diff --git a/CHANGELOG.md b/CHANGELOG.md index f7014370ea..a419ddcda6 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -1,5 +1,9 @@ # Changelog +## Release 555 Entries + +### [555.42.02] 2024-05-21 + ## Release 550 Entries ### [550.78] 2024-04-25 diff --git a/README.md b/README.md index fcf5f46ba8..9aeb30be48 100644 --- a/README.md +++ b/README.md @@ -1,7 +1,7 @@ # NVIDIA Linux Open GPU Kernel Module Source This is the source release of the NVIDIA Linux open GPU kernel modules, -version 550.78. +version 555.42.02. ## How to Build @@ -17,7 +17,7 @@ as root: Note that the kernel modules built here must be used with GSP firmware and user-space NVIDIA GPU driver components from a corresponding -550.78 driver release. This can be achieved by installing +555.42.02 driver release. This can be achieved by installing the NVIDIA GPU driver from the .run file using the `--no-kernel-modules` option. E.g., @@ -74,7 +74,7 @@ kernel. The NVIDIA open kernel modules support the same range of Linux kernel versions that are supported with the proprietary NVIDIA kernel modules. -This is currently Linux kernel 3.10 or newer. +This is currently Linux kernel 4.15 or newer. ## How to Contribute @@ -188,7 +188,7 @@ encountered specific to them. For details on feature support and limitations, see the NVIDIA GPU driver end user README here: -https://us.download.nvidia.com/XFree86/Linux-x86_64/550.78/README/kernel_open.html +https://us.download.nvidia.com/XFree86/Linux-x86_64/555.42.02/README/kernel_open.html For vGPU support, please refer to the README.vgpu packaged in the vGPU Host Package for more details. @@ -856,6 +856,7 @@ Subsystem Device ID. | NVIDIA RTX A500 Embedded GPU | 25FB | | NVIDIA GeForce RTX 4090 | 2684 | | NVIDIA GeForce RTX 4090 D | 2685 | +| NVIDIA GeForce RTX 4070 Ti SUPER | 2689 | | NVIDIA RTX 6000 Ada Generation | 26B1 1028 16A1 | | NVIDIA RTX 6000 Ada Generation | 26B1 103C 16A1 | | NVIDIA RTX 6000 Ada Generation | 26B1 10DE 16A1 | diff --git a/kernel-open/Kbuild b/kernel-open/Kbuild index e4959d54ca..e8153f3417 100644 --- a/kernel-open/Kbuild +++ b/kernel-open/Kbuild @@ -72,7 +72,7 @@ EXTRA_CFLAGS += -I$(src)/common/inc EXTRA_CFLAGS += -I$(src) EXTRA_CFLAGS += -Wall $(DEFINES) $(INCLUDES) -Wno-cast-qual -Wno-format-extra-args EXTRA_CFLAGS += -D__KERNEL__ -DMODULE -DNVRM -EXTRA_CFLAGS += -DNV_VERSION_STRING=\"550.78\" +EXTRA_CFLAGS += -DNV_VERSION_STRING=\"555.42.02\" ifneq ($(SYSSRCHOST1X),) EXTRA_CFLAGS += -I$(SYSSRCHOST1X) @@ -118,7 +118,7 @@ ifeq ($(ARCH),x86_64) endif ifeq ($(ARCH),powerpc) - EXTRA_CFLAGS += -mlittle-endian -mno-strict-align -mno-altivec + EXTRA_CFLAGS += -mlittle-endian -mno-strict-align endif EXTRA_CFLAGS += -DNV_UVM_ENABLE @@ -172,6 +172,7 @@ NV_CFLAGS_FROM_CONFTEST := $(shell $(NV_CONFTEST_CMD) build_cflags) NV_CONFTEST_CFLAGS = $(NV_CFLAGS_FROM_CONFTEST) $(EXTRA_CFLAGS) -fno-pie NV_CONFTEST_CFLAGS += $(call cc-disable-warning,pointer-sign) NV_CONFTEST_CFLAGS += $(call cc-option,-fshort-wchar,) +NV_CONFTEST_CFLAGS += $(call cc-option,-Werror=incompatible-pointer-types,) NV_CONFTEST_CFLAGS += -Wno-error NV_CONFTEST_COMPILE_TEST_HEADERS := $(obj)/conftest/macros.h diff --git a/kernel-open/Makefile b/kernel-open/Makefile index cee56f1061..baafdbfc95 100644 --- a/kernel-open/Makefile +++ b/kernel-open/Makefile @@ -28,7 +28,7 @@ else else KERNEL_UNAME ?= $(shell uname -r) KERNEL_MODLIB := /lib/modules/$(KERNEL_UNAME) - KERNEL_SOURCES := $(shell test -d $(KERNEL_MODLIB)/source && echo $(KERNEL_MODLIB)/source || echo $(KERNEL_MODLIB)/build) + KERNEL_SOURCES := $(shell ((test -d $(KERNEL_MODLIB)/source && echo $(KERNEL_MODLIB)/source) || (test -d $(KERNEL_MODLIB)/build/source && echo $(KERNEL_MODLIB)/build/source)) || echo $(KERNEL_MODLIB)/build) endif KERNEL_OUTPUT := $(KERNEL_SOURCES) @@ -42,7 +42,11 @@ else else KERNEL_UNAME ?= $(shell uname -r) KERNEL_MODLIB := /lib/modules/$(KERNEL_UNAME) - ifeq ($(KERNEL_SOURCES), $(KERNEL_MODLIB)/source) + # $(filter patter...,text) - Returns all whitespace-separated words in text that + # do match any of the pattern words, removing any words that do not match. + # Set the KERNEL_OUTPUT only if either $(KERNEL_MODLIB)/source or + # $(KERNEL_MODLIB)/build/source path matches the KERNEL_SOURCES. + ifneq ($(filter $(KERNEL_SOURCES),$(KERNEL_MODLIB)/source $(KERNEL_MODLIB)/build/source),) KERNEL_OUTPUT := $(KERNEL_MODLIB)/build KBUILD_PARAMS := KBUILD_OUTPUT=$(KERNEL_OUTPUT) endif diff --git a/kernel-open/common/inc/nv-hypervisor.h b/kernel-open/common/inc/nv-hypervisor.h index 93bcdd6e67..a2b2649758 100644 --- a/kernel-open/common/inc/nv-hypervisor.h +++ b/kernel-open/common/inc/nv-hypervisor.h @@ -37,13 +37,11 @@ typedef enum _HYPERVISOR_TYPE OS_HYPERVISOR_UNKNOWN } HYPERVISOR_TYPE; -#define CMD_VGPU_VFIO_WAKE_WAIT_QUEUE 0 -#define CMD_VGPU_VFIO_INJECT_INTERRUPT 1 -#define CMD_VGPU_VFIO_REGISTER_MDEV 2 -#define CMD_VGPU_VFIO_PRESENT 3 -#define CMD_VFIO_PCI_CORE_PRESENT 4 +#define CMD_VFIO_WAKE_REMOVE_GPU 1 +#define CMD_VGPU_VFIO_PRESENT 2 +#define CMD_VFIO_PCI_CORE_PRESENT 3 -#define MAX_VF_COUNT_PER_GPU 64 +#define MAX_VF_COUNT_PER_GPU 64 typedef enum _VGPU_TYPE_INFO { @@ -54,17 +52,11 @@ typedef enum _VGPU_TYPE_INFO typedef struct { - void *vgpuVfioRef; - void *waitQueue; void *nv; - NvU32 *vgpuTypeIds; - NvU8 **vgpuNames; - NvU32 numVgpuTypes; - NvU32 domain; - NvU8 bus; - NvU8 slot; - NvU8 function; - NvBool is_virtfn; + NvU32 domain; + NvU32 bus; + NvU32 device; + NvU32 return_status; } vgpu_vfio_info; typedef struct diff --git a/kernel-open/common/inc/nv-linux.h b/kernel-open/common/inc/nv-linux.h index 43d7c80a94..e70b0cca85 100644 --- a/kernel-open/common/inc/nv-linux.h +++ b/kernel-open/common/inc/nv-linux.h @@ -58,14 +58,10 @@ #include #include -#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 32) -#error "This driver does not support kernels older than 2.6.32!" -#elif LINUX_VERSION_CODE < KERNEL_VERSION(2, 7, 0) -# define KERNEL_2_6 -#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0) -# define KERNEL_3 -#else -#error "This driver does not support development kernels!" +#if LINUX_VERSION_CODE == KERNEL_VERSION(4, 4, 0) +// Version 4.4 is allowed, temporarily, although not officially supported. +#elif LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) +#error "This driver does not support kernels older than Linux 4.15!" #endif #if defined (CONFIG_SMP) && !defined (__SMP__) @@ -836,16 +832,16 @@ static inline dma_addr_t nv_phys_to_dma(struct device *dev, NvU64 pa) #define NV_PRINT_AT(nv_debug_level,at) \ { \ nv_printf(nv_debug_level, \ - "NVRM: VM: %s:%d: 0x%p, %d page(s), count = %d, flags = 0x%08x, " \ + "NVRM: VM: %s:%d: 0x%p, %d page(s), count = %d, " \ "page_table = 0x%p\n", __FUNCTION__, __LINE__, at, \ at->num_pages, NV_ATOMIC_READ(at->usage_count), \ - at->flags, at->page_table); \ + at->page_table); \ } #define NV_PRINT_VMA(nv_debug_level,vma) \ { \ nv_printf(nv_debug_level, \ - "NVRM: VM: %s:%d: 0x%lx - 0x%lx, 0x%08x bytes @ 0x%016llx, 0x%p, 0x%p\n", \ + "NVRM: VM: %s:%d: 0x%lx - 0x%lx, 0x%08lx bytes @ 0x%016llx, 0x%p, 0x%p\n", \ __FUNCTION__, __LINE__, vma->vm_start, vma->vm_end, NV_VMA_SIZE(vma), \ NV_VMA_OFFSET(vma), NV_VMA_PRIVATE(vma), NV_VMA_FILE(vma)); \ } @@ -1078,6 +1074,8 @@ static inline void nv_kmem_ctor_dummy(void *arg) kmem_cache_destroy(kmem_cache); \ } +#define NV_KMEM_CACHE_ALLOC_ATOMIC(kmem_cache) \ + kmem_cache_alloc(kmem_cache, GFP_ATOMIC) #define NV_KMEM_CACHE_ALLOC(kmem_cache) \ kmem_cache_alloc(kmem_cache, GFP_KERNEL) #define NV_KMEM_CACHE_FREE(ptr, kmem_cache) \ @@ -1104,6 +1102,23 @@ static inline void *nv_kmem_cache_zalloc(struct kmem_cache *k, gfp_t flags) #endif } +static inline int nv_kmem_cache_alloc_stack_atomic(nvidia_stack_t **stack) +{ + nvidia_stack_t *sp = NULL; +#if defined(NVCPU_X86_64) + if (rm_is_altstack_in_use()) + { + sp = NV_KMEM_CACHE_ALLOC_ATOMIC(nvidia_stack_t_cache); + if (sp == NULL) + return -ENOMEM; + sp->size = sizeof(sp->stack); + sp->top = sp->stack + sp->size; + } +#endif + *stack = sp; + return 0; +} + static inline int nv_kmem_cache_alloc_stack(nvidia_stack_t **stack) { nvidia_stack_t *sp = NULL; @@ -1614,6 +1629,10 @@ typedef struct nv_linux_state_s { nv_kthread_q_t open_q; NvBool is_accepting_opens; struct semaphore open_q_lock; +#if defined(NV_VGPU_KVM_BUILD) + wait_queue_head_t wait; + NvS32 return_status; +#endif } nv_linux_state_t; extern nv_linux_state_t *nv_linux_devices; diff --git a/kernel-open/common/inc/nv-mm.h b/kernel-open/common/inc/nv-mm.h index 83363fa12d..c81c125297 100644 --- a/kernel-open/common/inc/nv-mm.h +++ b/kernel-open/common/inc/nv-mm.h @@ -29,17 +29,17 @@ typedef int vm_fault_t; #endif -/* pin_user_pages - * Presence of pin_user_pages() also implies the presence of unpin-user_page(). - * Both were added in the v5.6-rc1 +/* + * pin_user_pages() * - * pin_user_pages() was added by commit eddb1c228f7951d399240 - * ("mm/gup: introduce pin_user_pages*() and FOLL_PIN") in v5.6-rc1 (2020-01-30) + * Presence of pin_user_pages() also implies the presence of unpin-user_page(). + * Both were added in the v5.6. * - * Removed vmas parameter from pin_user_pages() by commit 40896a02751 - * ("mm/gup: remove vmas parameter from pin_user_pages()") - * in linux-next, expected in v6.5-rc1 (2023-05-17) + * pin_user_pages() was added by commit eddb1c228f79 + * ("mm/gup: introduce pin_user_pages*() and FOLL_PIN") in v5.6. * + * Removed vmas parameter from pin_user_pages() by commit 4c630f307455 + * ("mm/gup: remove vmas parameter from pin_user_pages()") in v6.5. */ #include @@ -63,25 +63,28 @@ typedef int vm_fault_t; #define NV_UNPIN_USER_PAGE put_page #endif // NV_PIN_USER_PAGES_PRESENT -/* get_user_pages +/* + * get_user_pages() * - * The 8-argument version of get_user_pages was deprecated by commit - * (2016 Feb 12: cde70140fed8429acf7a14e2e2cbd3e329036653)for the non-remote case + * The 8-argument version of get_user_pages() was deprecated by commit + * cde70140fed8 ("mm/gup: Overload get_user_pages() functions") in v4.6-rc1. * (calling get_user_pages with current and current->mm). * - * Completely moved to the 6 argument version of get_user_pages - - * 2016 Apr 4: c12d2da56d0e07d230968ee2305aaa86b93a6832 + * Completely moved to the 6 argument version of get_user_pages() by + * commit c12d2da56d0e ("mm/gup: Remove the macro overload API migration + * helpers from the get_user*() APIs") in v4.6-rc4. * - * write and force parameters were replaced with gup_flags by - - * 2016 Oct 12: 768ae309a96103ed02eb1e111e838c87854d8b51 + * write and force parameters were replaced with gup_flags by + * commit 768ae309a961 ("mm: replace get_user_pages() write/force parameters + * with gup_flags") in v4.9. * * A 7-argument version of get_user_pages was introduced into linux-4.4.y by - * commit 8e50b8b07f462ab4b91bc1491b1c91bd75e4ad40 which cherry-picked the - * replacement of the write and force parameters with gup_flags + * commit 8e50b8b07f462 ("mm: replace get_user_pages() write/force parameters + * with gup_flags") which cherry-picked the replacement of the write and + * force parameters with gup_flags. * - * Removed vmas parameter from get_user_pages() by commit 7bbf9c8c99 - * ("mm/gup: remove unused vmas parameter from get_user_pages()") - * in linux-next, expected in v6.5-rc1 (2023-05-17) + * Removed vmas parameter from get_user_pages() by commit 54d020692b34 + * ("mm/gup: remove unused vmas parameter from get_user_pages()") in v6.5. * */ @@ -112,18 +115,19 @@ typedef int vm_fault_t; } #endif // NV_GET_USER_PAGES_HAS_ARGS_FLAGS -/* pin_user_pages_remote +/* + * pin_user_pages_remote() * - * pin_user_pages_remote() was added by commit eddb1c228f7951d399240 - * ("mm/gup: introduce pin_user_pages*() and FOLL_PIN") in v5.6 (2020-01-30) + * pin_user_pages_remote() was added by commit eddb1c228f79 + * ("mm/gup: introduce pin_user_pages*() and FOLL_PIN") in v5.6. * * pin_user_pages_remote() removed 'tsk' parameter by commit - * 64019a2e467a ("mm/gup: remove task_struct pointer for all gup code") - * in v5.9-rc1 (2020-08-11). * + * 64019a2e467a ("mm/gup: remove task_struct pointer for all gup code") + * in v5.9. * * Removed unused vmas parameter from pin_user_pages_remote() by commit - * 83bcc2e132("mm/gup: remove unused vmas parameter from pin_user_pages_remote()") - * in linux-next, expected in v6.5-rc1 (2023-05-14) + * 0b295316b3a9 ("mm/gup: remove unused vmas parameter from + * pin_user_pages_remote()") in v6.5. * */ @@ -143,7 +147,7 @@ typedef int vm_fault_t; /* * get_user_pages_remote() was added by commit 1e9877902dc7 - * ("mm/gup: Introduce get_user_pages_remote()") in v4.6 (2016-02-12). + * ("mm/gup: Introduce get_user_pages_remote()") in v4.6. * * Note that get_user_pages_remote() requires the caller to hold a reference on * the task_struct (if non-NULL and if this API has tsk argument) and the mm_struct. @@ -153,19 +157,17 @@ typedef int vm_fault_t; * * get_user_pages_remote() write/force parameters were replaced * with gup_flags by commit 9beae1ea8930 ("mm: replace get_user_pages_remote() - * write/force parameters with gup_flags") in v4.9 (2016-10-13). + * write/force parameters with gup_flags") in v4.9. * * get_user_pages_remote() added 'locked' parameter by commit 5b56d49fc31d - * ("mm: add locked parameter to get_user_pages_remote()") in - * v4.10 (2016-12-14). + * ("mm: add locked parameter to get_user_pages_remote()") in v4.10. * * get_user_pages_remote() removed 'tsk' parameter by * commit 64019a2e467a ("mm/gup: remove task_struct pointer for - * all gup code") in v5.9-rc1 (2020-08-11). + * all gup code") in v5.9. * - * Removed vmas parameter from get_user_pages_remote() by commit a4bde14d549 - * ("mm/gup: remove vmas parameter from get_user_pages_remote()") - * in linux-next, expected in v6.5-rc1 (2023-05-14) + * Removed vmas parameter from get_user_pages_remote() by commit ca5e863233e8 + * ("mm/gup: remove vmas parameter from get_user_pages_remote()") in v6.5. * */ diff --git a/kernel-open/common/inc/nv.h b/kernel-open/common/inc/nv.h index 5766baa0a0..766e6b34d3 100644 --- a/kernel-open/common/inc/nv.h +++ b/kernel-open/common/inc/nv.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1999-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1999-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -609,6 +609,15 @@ typedef enum NV_POWER_STATE_RUNNING } nv_power_state_t; +typedef struct +{ + const char *vidmem_power_status; + const char *dynamic_power_status; + const char *gc6_support; + const char *gcoff_support; + const char *s0ix_status; +} nv_power_info_t; + #define NV_PRIMARY_VGA(nv) ((nv)->primary_vga) #define NV_IS_CTL_DEVICE(nv) ((nv)->flags & NV_FLAG_CONTROL) @@ -778,7 +787,7 @@ nv_state_t* NV_API_CALL nv_get_ctl_state (void); void NV_API_CALL nv_set_dma_address_size (nv_state_t *, NvU32 ); -NV_STATUS NV_API_CALL nv_alias_pages (nv_state_t *, NvU32, NvU32, NvU32, NvU64, NvU64 *, void **); +NV_STATUS NV_API_CALL nv_alias_pages (nv_state_t *, NvU32, NvU64, NvU32, NvU32, NvU64, NvU64 *, void **); NV_STATUS NV_API_CALL nv_alloc_pages (nv_state_t *, NvU32, NvU64, NvBool, NvU32, NvBool, NvBool, NvS32, NvU64 *, void **); NV_STATUS NV_API_CALL nv_free_pages (nv_state_t *, NvU32, NvBool, NvU32, void *); @@ -822,6 +831,7 @@ void NV_API_CALL nv_acpi_methods_init (NvU32 *); void NV_API_CALL nv_acpi_methods_uninit (void); NV_STATUS NV_API_CALL nv_acpi_method (NvU32, NvU32, NvU32, void *, NvU16, NvU32 *, void *, NvU16 *); +NV_STATUS NV_API_CALL nv_acpi_d3cold_dsm_for_upstream_port (nv_state_t *, NvU8 *, NvU32, NvU32, NvU32 *); NV_STATUS NV_API_CALL nv_acpi_dsm_method (nv_state_t *, NvU8 *, NvU32, NvBool, NvU32, void *, NvU16, NvU32 *, void *, NvU16 *); NV_STATUS NV_API_CALL nv_acpi_ddc_method (nv_state_t *, void *, NvU32 *, NvBool); NV_STATUS NV_API_CALL nv_acpi_dod_method (nv_state_t *, NvU32 *, NvU32 *); @@ -990,10 +1000,10 @@ NV_STATUS NV_API_CALL rm_p2p_init_mapping (nvidia_stack_t *, NvU64, NvU6 NV_STATUS NV_API_CALL rm_p2p_destroy_mapping (nvidia_stack_t *, NvU64); NV_STATUS NV_API_CALL rm_p2p_get_pages (nvidia_stack_t *, NvU64, NvU32, NvU64, NvU64, NvU64 *, NvU32 *, NvU32 *, NvU32 *, NvU8 **, void *); NV_STATUS NV_API_CALL rm_p2p_get_gpu_info (nvidia_stack_t *, NvU64, NvU64, NvU8 **, void **); -NV_STATUS NV_API_CALL rm_p2p_get_pages_persistent (nvidia_stack_t *, NvU64, NvU64, void **, NvU64 *, NvU32 *, void *, void *); +NV_STATUS NV_API_CALL rm_p2p_get_pages_persistent (nvidia_stack_t *, NvU64, NvU64, void **, NvU64 *, NvU32 *, void *, void *, void **); NV_STATUS NV_API_CALL rm_p2p_register_callback (nvidia_stack_t *, NvU64, NvU64, NvU64, void *, void (*)(void *), void *); NV_STATUS NV_API_CALL rm_p2p_put_pages (nvidia_stack_t *, NvU64, NvU32, NvU64, void *); -NV_STATUS NV_API_CALL rm_p2p_put_pages_persistent(nvidia_stack_t *, void *, void *); +NV_STATUS NV_API_CALL rm_p2p_put_pages_persistent(nvidia_stack_t *, void *, void *, void *); NV_STATUS NV_API_CALL rm_p2p_dma_map_pages (nvidia_stack_t *, nv_dma_device_t *, NvU8 *, NvU64, NvU32, NvU64 *, void **); NV_STATUS NV_API_CALL rm_dma_buf_dup_mem_handle (nvidia_stack_t *, nv_state_t *, NvHandle, NvHandle, NvHandle, NvHandle, void *, NvHandle, NvU64, NvU64, NvHandle *, void **); void NV_API_CALL rm_dma_buf_undup_mem_handle(nvidia_stack_t *, nv_state_t *, NvHandle, NvHandle); @@ -1027,9 +1037,7 @@ void NV_API_CALL rm_enable_dynamic_power_management(nvidia_stack_t *, nv_s NV_STATUS NV_API_CALL rm_ref_dynamic_power(nvidia_stack_t *, nv_state_t *, nv_dynamic_power_mode_t); void NV_API_CALL rm_unref_dynamic_power(nvidia_stack_t *, nv_state_t *, nv_dynamic_power_mode_t); NV_STATUS NV_API_CALL rm_transition_dynamic_power(nvidia_stack_t *, nv_state_t *, NvBool, NvBool *); -const char* NV_API_CALL rm_get_vidmem_power_status(nvidia_stack_t *, nv_state_t *); -const char* NV_API_CALL rm_get_dynamic_power_management_status(nvidia_stack_t *, nv_state_t *); -const char* NV_API_CALL rm_get_gpu_gcx_support(nvidia_stack_t *, nv_state_t *, NvBool); +void NV_API_CALL rm_get_power_info(nvidia_stack_t *, nv_state_t *, nv_power_info_t *); void NV_API_CALL rm_acpi_notify(nvidia_stack_t *, nv_state_t *, NvU32); void NV_API_CALL rm_acpi_nvpcf_notify(nvidia_stack_t *); @@ -1041,13 +1049,12 @@ NV_STATUS NV_API_CALL nv_vgpu_create_request(nvidia_stack_t *, nv_state_t *, c NV_STATUS NV_API_CALL nv_vgpu_delete(nvidia_stack_t *, const NvU8 *, NvU16); NV_STATUS NV_API_CALL nv_vgpu_get_type_ids(nvidia_stack_t *, nv_state_t *, NvU32 *, NvU32 *, NvBool, NvU8, NvBool); NV_STATUS NV_API_CALL nv_vgpu_get_type_info(nvidia_stack_t *, nv_state_t *, NvU32, char *, int, NvU8); -NV_STATUS NV_API_CALL nv_vgpu_get_bar_info(nvidia_stack_t *, nv_state_t *, const NvU8 *, NvU64 *, NvU32, void *, NvBool *); +NV_STATUS NV_API_CALL nv_vgpu_get_bar_info(nvidia_stack_t *, nv_state_t *, const NvU8 *, NvU64 *, + NvU64 *, NvU64 *, NvU32 *, NvBool *, NvU8 *); NV_STATUS NV_API_CALL nv_vgpu_get_hbm_info(nvidia_stack_t *, nv_state_t *, const NvU8 *, NvU64 *, NvU64 *); -NV_STATUS NV_API_CALL nv_vgpu_start(nvidia_stack_t *, const NvU8 *, void *, NvS32 *, NvU8 *, NvU32); -NV_STATUS NV_API_CALL nv_vgpu_get_sparse_mmap(nvidia_stack_t *, nv_state_t *, const NvU8 *, NvU64 **, NvU64 **, NvU32 *); NV_STATUS NV_API_CALL nv_vgpu_process_vf_info(nvidia_stack_t *, nv_state_t *, NvU8, NvU32, NvU8, NvU8, NvU8, NvBool, void *); -NV_STATUS NV_API_CALL nv_vgpu_update_request(nvidia_stack_t *, const NvU8 *, NvU32, NvU64 *, NvU64 *, const char *); NV_STATUS NV_API_CALL nv_gpu_bind_event(nvidia_stack_t *); +NV_STATUS NV_API_CALL nv_gpu_unbind_event(nvidia_stack_t *, NvU32, NvBool *); NV_STATUS NV_API_CALL nv_get_usermap_access_params(nv_state_t*, nv_usermap_access_params_t*); nv_soc_irq_type_t NV_API_CALL nv_get_current_irq_type(nv_state_t*); diff --git a/kernel-open/common/inc/nv_uvm_interface.h b/kernel-open/common/inc/nv_uvm_interface.h index 3bdb28c943..e375725ec7 100644 --- a/kernel-open/common/inc/nv_uvm_interface.h +++ b/kernel-open/common/inc/nv_uvm_interface.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2013-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2013-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -1462,6 +1462,29 @@ NV_STATUS nvUvmInterfacePagingChannelPushStream(UvmGpuPagingChannelHandle channe char *methodStream, NvU32 methodStreamSize); +/******************************************************************************* + nvUvmInterfaceKeyRotationChannelDisable + + This function notifies RM that the given channels are idle. + + This function is called after RM has notified UVM that keys need to be rotated. + When called RM will disable the channels, rotate their keys, and then re-enable + the channels. + + Locking: This function acquires an API and GPU lock. + Memory : This function dynamically allocates memory. + + Arguments: + channelList[IN] - An array of channel handles whose channels are idle. + channelListCount[IN] - Number of channels in channelList. Its value must be + greater than 0. + + Error codes: + NV_ERR_INVALID_ARGUMENT - channelList is NULL or channeListCount is 0. +*/ +NV_STATUS nvUvmInterfaceKeyRotationChannelDisable(uvmGpuChannelHandle channelList[], + NvU32 channeListCount); + /******************************************************************************* Cryptography Services Library (CSL) Interface */ @@ -1507,7 +1530,7 @@ void nvUvmInterfaceDeinitCslContext(UvmCslContext *uvmCslContext); /******************************************************************************* nvUvmInterfaceCslUpdateContext - Updates a context after a key rotation event and can only be called once per + Updates contexts after a key rotation event and can only be called once per key rotation event. Following a key rotation event, and before nvUvmInterfaceCslUpdateContext is called, data encrypted by the GPU with the previous key can be decrypted with nvUvmInterfaceCslDecrypt. @@ -1516,12 +1539,14 @@ void nvUvmInterfaceDeinitCslContext(UvmCslContext *uvmCslContext); Memory : This function does not dynamically allocate memory. Arguments: - uvmCslContext[IN] - The CSL context associated with a channel. - + contextList[IN/OUT] - An array of pointers to CSL contexts. + contextListCount[IN] - Number of CSL contexts in contextList. Its value + must be greater than 0. Error codes: - NV_ERR_INVALID_ARGUMENT - The CSL context is not associated with a channel. + NV_ERR_INVALID_ARGUMENT - contextList is NULL or contextListCount is 0. */ -NV_STATUS nvUvmInterfaceCslUpdateContext(UvmCslContext *uvmCslContext); +NV_STATUS nvUvmInterfaceCslUpdateContext(UvmCslContext *contextList[], + NvU32 contextListCount); /******************************************************************************* nvUvmInterfaceCslRotateIv @@ -1739,7 +1764,14 @@ NV_STATUS nvUvmInterfaceCslIncrementIv(UvmCslContext *uvmCslContext, Checks and logs information about non-CSL encryptions, such as those that originate from the GPU. - This function does not modify elements of the UvmCslContext. + For contexts associated with channels, this function does not modify elements of + the UvmCslContext and must be called for each external encryption invocation. + + For the context associated with fault buffers, bufferSize can encompass multiple + encryption invocations, and the UvmCslContext will be updated following a key + rotation event. + + In either case the IV remains unmodified after this function is called. Locking: This function does not acquire an API or GPU lock. Memory : This function does not dynamically allocate memory. @@ -1748,7 +1780,7 @@ NV_STATUS nvUvmInterfaceCslIncrementIv(UvmCslContext *uvmCslContext, Arguments: uvmCslContext[IN/OUT] - The CSL context. - bufferSize[OUT] - The size of the buffer encrypted by the + bufferSize[OUT] - The size of the buffer(s) encrypted by the external entity in units of bytes. Error codes: diff --git a/kernel-open/common/inc/nv_uvm_types.h b/kernel-open/common/inc/nv_uvm_types.h index 8bd0880195..f405bf2c5e 100644 --- a/kernel-open/common/inc/nv_uvm_types.h +++ b/kernel-open/common/inc/nv_uvm_types.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2014-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2014-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -39,12 +39,12 @@ // are multiple BIG page sizes in RM. These defines are used as flags to "0" // should be OK when user is not sure which pagesize allocation it wants // -#define UVM_PAGE_SIZE_DEFAULT 0x0 -#define UVM_PAGE_SIZE_4K 0x1000 -#define UVM_PAGE_SIZE_64K 0x10000 -#define UVM_PAGE_SIZE_128K 0x20000 -#define UVM_PAGE_SIZE_2M 0x200000 -#define UVM_PAGE_SIZE_512M 0x20000000 +#define UVM_PAGE_SIZE_DEFAULT 0x0ULL +#define UVM_PAGE_SIZE_4K 0x1000ULL +#define UVM_PAGE_SIZE_64K 0x10000ULL +#define UVM_PAGE_SIZE_128K 0x20000ULL +#define UVM_PAGE_SIZE_2M 0x200000ULL +#define UVM_PAGE_SIZE_512M 0x20000000ULL // // When modifying flags, make sure they are compatible with the mirrored @@ -267,6 +267,7 @@ typedef struct UvmGpuChannelInfo_tag // The errorNotifier is filled out when the channel hits an RC error. NvNotification *errorNotifier; + NvNotification *keyRotationNotifier; NvU32 hwRunlistId; NvU32 hwChannelId; @@ -292,13 +293,13 @@ typedef struct UvmGpuChannelInfo_tag // GPU VAs of both GPFIFO and GPPUT are needed in Confidential Computing // so a channel can be controlled via another channel (SEC2 or WLC/LCIC) - NvU64 gpFifoGpuVa; - NvU64 gpPutGpuVa; - NvU64 gpGetGpuVa; + NvU64 gpFifoGpuVa; + NvU64 gpPutGpuVa; + NvU64 gpGetGpuVa; // GPU VA of work submission offset is needed in Confidential Computing // so CE channels can ring doorbell of other channels as required for // WLC/LCIC work submission - NvU64 workSubmissionOffsetGpuVa; + NvU64 workSubmissionOffsetGpuVa; } UvmGpuChannelInfo; typedef enum @@ -1086,4 +1087,21 @@ typedef enum UvmCslOperation UVM_CSL_OPERATION_DECRYPT } UvmCslOperation; +typedef enum UVM_KEY_ROTATION_STATUS { + // Key rotation complete/not in progress + UVM_KEY_ROTATION_STATUS_IDLE = 0, + // RM is waiting for clients to report their channels are idle for key rotation + UVM_KEY_ROTATION_STATUS_PENDING = 1, + // Key rotation is in progress + UVM_KEY_ROTATION_STATUS_IN_PROGRESS = 2, + // Key rotation timeout failure, RM will RC non-idle channels. + // UVM should never see this status value. + UVM_KEY_ROTATION_STATUS_FAILED_TIMEOUT = 3, + // Key rotation failed because upper threshold was crossed, RM will RC non-idle channels + UVM_KEY_ROTATION_STATUS_FAILED_THRESHOLD = 4, + // Internal RM failure while rotating keys for a certain channel, RM will RC the channel. + UVM_KEY_ROTATION_STATUS_FAILED_ROTATION = 5, + UVM_KEY_ROTATION_STATUS_MAX_COUNT = 6, +} UVM_KEY_ROTATION_STATUS; + #endif // _NV_UVM_TYPES_H_ diff --git a/kernel-open/common/inc/nvmisc.h b/kernel-open/common/inc/nvmisc.h index 6c47b6d3e1..4d288f679b 100644 --- a/kernel-open/common/inc/nvmisc.h +++ b/kernel-open/common/inc/nvmisc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -494,6 +494,23 @@ do \ // #define NV_TWO_N_MINUS_ONE(n) (((1ULL<<(n/2))<<((n+1)/2))-1) +// +// Create a 64b bitmask with n bits set +// This is the same as ((1ULL<>((n>64) ? 0 : (64-n)))) + #define DRF_READ_1WORD_BS(d,r,f,v) \ ((DRF_EXTENT_MW(NV##d##r##f)<8)?DRF_READ_1BYTE_BS(NV##d##r##f,(v)): \ ((DRF_EXTENT_MW(NV##d##r##f)<16)?DRF_READ_2BYTE_BS(NV##d##r##f,(v)): \ @@ -574,6 +591,13 @@ nvMaskPos32(const NvU32 mask, const NvU32 bitIdx) n32 = BIT_IDX_32(LOWESTBIT(n32));\ } +// Destructive operation on n64 +#define LOWESTBITIDX_64(n64) \ +{ \ + n64 = BIT_IDX_64(LOWESTBIT(n64));\ +} + + // Destructive operation on n32 #define HIGHESTBITIDX_32(n32) \ { \ @@ -918,6 +942,11 @@ static NV_FORCEINLINE void *NV_NVUPTR_TO_PTR(NvUPtr address) // Use (lo) if (b) is less than 64, and (hi) if >= 64. // #define NV_BIT_SET_128(b, lo, hi) { nvAssert( (b) < 128 ); if ( (b) < 64 ) (lo) |= NVBIT64(b); else (hi) |= NVBIT64( b & 0x3F ); } +// +// Clear the bit at pos (b) for U64 which is < 128. +// Use (lo) if (b) is less than 64, and (hi) if >= 64. +// +#define NV_BIT_CLEAR_128(b, lo, hi) { nvAssert( (b) < 128 ); if ( (b) < 64 ) (lo) &= ~NVBIT64(b); else (hi) &= ~NVBIT64( b & 0x3F ); } // Get the number of elements the specified fixed-size array #define NV_ARRAY_ELEMENTS(x) ((sizeof(x)/sizeof((x)[0]))) diff --git a/kernel-open/common/inc/nvstatuscodes.h b/kernel-open/common/inc/nvstatuscodes.h index 552207f212..78739349e6 100644 --- a/kernel-open/common/inc/nvstatuscodes.h +++ b/kernel-open/common/inc/nvstatuscodes.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2014-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2014-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -152,6 +152,7 @@ NV_STATUS_CODE(NV_ERR_FABRIC_MANAGER_NOT_PRESENT, 0x0000007A, "Fabric Manag NV_STATUS_CODE(NV_ERR_ALREADY_SIGNALLED, 0x0000007B, "Semaphore Surface value already >= requested wait value") NV_STATUS_CODE(NV_ERR_QUEUE_TASK_SLOT_NOT_AVAILABLE, 0x0000007C, "PMU RPC error due to no queue slot available for this event") NV_STATUS_CODE(NV_ERR_KEY_ROTATION_IN_PROGRESS, 0x0000007D, "Operation not allowed as key rotation is in progress") +NV_STATUS_CODE(NV_ERR_TEST_ONLY_CODE_NOT_ENABLED, 0x0000007E, "Test-only code path not enabled") // Warnings: NV_STATUS_CODE(NV_WARN_HOT_SWITCH, 0x00010001, "WARNING Hot switch") diff --git a/kernel-open/common/inc/nvtypes.h b/kernel-open/common/inc/nvtypes.h index 98a9323e3d..f8d426f41f 100644 --- a/kernel-open/common/inc/nvtypes.h +++ b/kernel-open/common/inc/nvtypes.h @@ -152,6 +152,12 @@ typedef signed short NvS16; /* -32768 to 32767 */ (((NvU32)(c) & 0xff) << 8) | \ (((NvU32)(d) & 0xff)))) +// Macro to build an NvU64 from two DWORDS, listed from msb to lsb +#define NvU64_BUILD(a, b) \ + ((NvU64)( \ + (((NvU64)(a) & ~0U) << 32) | \ + (((NvU64)(b) & ~0U)))) + #if NVTYPES_USE_STDINT typedef uint32_t NvV32; /* "void": enumerated or multiple fields */ typedef uint32_t NvU32; /* 0 to 4294967295 */ diff --git a/kernel-open/common/inc/rm-gpu-ops.h b/kernel-open/common/inc/rm-gpu-ops.h index 4943c1be5b..d54b671b96 100644 --- a/kernel-open/common/inc/rm-gpu-ops.h +++ b/kernel-open/common/inc/rm-gpu-ops.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1999-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1999-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -101,9 +101,10 @@ NV_STATUS NV_API_CALL rm_gpu_ops_paging_channels_map(nvidia_stack_t *, nvgpuAdd void NV_API_CALL rm_gpu_ops_paging_channels_unmap(nvidia_stack_t *, nvgpuAddressSpaceHandle_t, NvU64, nvgpuDeviceHandle_t); NV_STATUS NV_API_CALL rm_gpu_ops_paging_channel_push_stream(nvidia_stack_t *, nvgpuPagingChannelHandle_t, char *, NvU32); +NV_STATUS NV_API_CALL rm_gpu_ops_key_rotation_channel_disable(nvidia_stack_t *, nvgpuChannelHandle_t [], NvU32); NV_STATUS NV_API_CALL rm_gpu_ops_ccsl_context_init(nvidia_stack_t *, struct ccslContext_t **, nvgpuChannelHandle_t); NV_STATUS NV_API_CALL rm_gpu_ops_ccsl_context_clear(nvidia_stack_t *, struct ccslContext_t *); -NV_STATUS NV_API_CALL rm_gpu_ops_ccsl_context_update(nvidia_stack_t *, struct ccslContext_t *); +NV_STATUS NV_API_CALL rm_gpu_ops_ccsl_context_update(nvidia_stack_t *, UvmCslContext *[], NvU32); NV_STATUS NV_API_CALL rm_gpu_ops_ccsl_rotate_iv(nvidia_stack_t *, struct ccslContext_t *, NvU8); NV_STATUS NV_API_CALL rm_gpu_ops_ccsl_encrypt(nvidia_stack_t *, struct ccslContext_t *, NvU32, NvU8 const *, NvU8 *, NvU8 *); NV_STATUS NV_API_CALL rm_gpu_ops_ccsl_encrypt_with_iv(nvidia_stack_t *, struct ccslContext_t *, NvU32, NvU8 const *, NvU8*, NvU8 *, NvU8 *); diff --git a/kernel-open/conftest.sh b/kernel-open/conftest.sh index 964241ee65..d5f3c94c8c 100755 --- a/kernel-open/conftest.sh +++ b/kernel-open/conftest.sh @@ -1416,6 +1416,42 @@ compile_test() { compile_check_conftest "$CODE" "NV_VFIO_REGISTER_EMULATED_IOMMU_DEV_PRESENT" "" "functions" ;; + bus_type_has_iommu_ops) + # + # Determine if 'bus_type' structure has a 'iommu_ops' field. + # + # This field was removed by commit 17de3f5fdd35 (iommu: Retire bus ops) + # in v6.8 + # + CODE=" + #include + + int conftest_bus_type_has_iommu_ops(void) { + return offsetof(struct bus_type, iommu_ops); + }" + + compile_check_conftest "$CODE" "NV_BUS_TYPE_HAS_IOMMU_OPS" "" "types" + ;; + + eventfd_signal_has_counter_arg) + # + # Determine if eventfd_signal() function has an additional 'counter' argument. + # + # This argument was removed by commit 3652117f8548 (eventfd: simplify + # eventfd_signal()) in v6.8 + # + CODE=" + #include + + void conftest_eventfd_signal_has_counter_arg(void) { + struct eventfd_ctx *ctx; + + eventfd_signal(ctx, 1); + }" + + compile_check_conftest "$CODE" "NV_EVENTFD_SIGNAL_HAS_COUNTER_ARG" "" "types" + ;; + drm_available) # Determine if the DRM subsystem is usable CODE=" @@ -5520,7 +5556,8 @@ compile_test() { of_dma_configure) # - # Determine if of_dma_configure() function is present + # Determine if of_dma_configure() function is present, and how + # many arguments it takes. # # Added by commit 591c1ee465ce ("of: configure the platform # device dma parameters") in v3.16. However, it was a static, @@ -5530,17 +5567,69 @@ compile_test() { # commit 1f5c69aa51f9 ("of: Move of_dma_configure() to device.c # to help re-use") in v4.1. # - CODE=" + # It subsequently began taking a third parameter with commit + # 3d6ce86ee794 ("drivers: remove force dma flag from buses") + # in v4.18. + # + + echo "$CONFTEST_PREAMBLE #if defined(NV_LINUX_OF_DEVICE_H_PRESENT) #include #endif + void conftest_of_dma_configure(void) { of_dma_configure(); } - " + " > conftest$$.c + + $CC $CFLAGS -c conftest$$.c > /dev/null 2>&1 + rm -f conftest$$.c + + if [ -f conftest$$.o ]; then + rm -f conftest$$.o + + echo "#undef NV_OF_DMA_CONFIGURE_PRESENT" | append_conftest "functions" + echo "#undef NV_OF_DMA_CONFIGURE_ARGUMENT_COUNT" | append_conftest "functions" + else + echo "#define NV_OF_DMA_CONFIGURE_PRESENT" | append_conftest "functions" + + echo "$CONFTEST_PREAMBLE + #if defined(NV_LINUX_OF_DEVICE_H_PRESENT) + #include + #endif + + void conftest_of_dma_configure(void) { + of_dma_configure(NULL, NULL, false); + }" > conftest$$.c + + $CC $CFLAGS -c conftest$$.c > /dev/null 2>&1 + rm -f conftest$$.c + + if [ -f conftest$$.o ]; then + rm -f conftest$$.o + echo "#define NV_OF_DMA_CONFIGURE_ARGUMENT_COUNT 3" | append_conftest "functions" + return + fi - compile_check_conftest "$CODE" "NV_OF_DMA_CONFIGURE_PRESENT" "" "functions" + echo "$CONFTEST_PREAMBLE + #if defined(NV_LINUX_OF_DEVICE_H_PRESENT) + #include + #endif + + void conftest_of_dma_configure(void) { + of_dma_configure(NULL, NULL); + }" > conftest$$.c + + $CC $CFLAGS -c conftest$$.c > /dev/null 2>&1 + rm -f conftest$$.c + + if [ -f conftest$$.o ]; then + rm -f conftest$$.o + echo "#define NV_OF_DMA_CONFIGURE_ARGUMENT_COUNT 2" | append_conftest "functions" + return + fi + fi ;; icc_get) @@ -6761,12 +6850,45 @@ compile_test() { compile_check_conftest "$CODE" "NV_DRM_MODE_CREATE_DP_COLORSPACE_PROPERTY_HAS_SUPPORTED_COLORSPACES_ARG" "" "types" ;; + drm_syncobj_features_present) + # Determine if DRIVER_SYNCOBJ and DRIVER_SYNCOBJ_TIMELINE DRM + # driver features are present. Timeline DRM synchronization objects + # may only be used if both of these are supported by the driver. + # + # DRIVER_SYNCOBJ_TIMELINE Added by commit 060cebb20cdb ("drm: + # introduce a capability flag for syncobj timeline support") in + # v5.2 + # + # DRIVER_SYNCOBJ Added by commit e9083420bbac ("drm: introduce + # sync objects (v4)") in v4.12 + CODE=" + #if defined(NV_DRM_DRM_DRV_H_PRESENT) + #include + #endif + int features = DRIVER_SYNCOBJ | DRIVER_SYNCOBJ_TIMELINE;" + + compile_check_conftest "$CODE" "NV_DRM_SYNCOBJ_FEATURES_PRESENT" "" "types" + ;; + + stack_trace) + # Determine if functions stack_trace_{save,print} are present. + # Added by commit e9b98e162 ("stacktrace: Provide helpers for + # common stack trace operations") in v5.2. + CODE=" + #include + void conftest_stack_trace(void) { + stack_trace_save(); + stack_trace_print(); + }" + + compile_check_conftest "$CODE" "NV_STACK_TRACE_PRESENT" "" "functions" + ;; + drm_unlocked_ioctl_flag_present) # Determine if DRM_UNLOCKED IOCTL flag is present. # # DRM_UNLOCKED was removed by commit 2798ffcc1d6a ("drm: Remove - # locking for legacy ioctls and DRM_UNLOCKED") in Linux - # next-20231208. + # locking for legacy ioctls and DRM_UNLOCKED") in v6.8. # # DRM_UNLOCKED definition was moved from drmP.h to drm_ioctl.h by # commit 2640981f3600 ("drm: document drm_ioctl.[hc]") in v4.12. diff --git a/kernel-open/header-presence-tests.mk b/kernel-open/header-presence-tests.mk index 472e97fc2b..49ad819af4 100644 --- a/kernel-open/header-presence-tests.mk +++ b/kernel-open/header-presence-tests.mk @@ -52,6 +52,7 @@ NV_HEADER_PRESENCE_TESTS = \ linux/dma-resv.h \ soc/tegra/chip-id.h \ soc/tegra/fuse.h \ + soc/tegra/fuse-helper.h \ soc/tegra/tegra_bpmp.h \ video/nv_internal.h \ linux/platform/tegra/dce/dce-client-ipc.h \ diff --git a/kernel-open/nvidia-drm/nvidia-drm-crtc.c b/kernel-open/nvidia-drm/nvidia-drm-crtc.c index 6c8f082c25..0c651436ac 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-crtc.c +++ b/kernel-open/nvidia-drm/nvidia-drm-crtc.c @@ -176,12 +176,10 @@ cursor_plane_req_config_update(struct drm_plane *plane, return; } - *req_config = (struct NvKmsKapiCursorRequestedConfig) { - .surface = to_nv_framebuffer(plane_state->fb)->pSurface, - - .dstX = plane_state->crtc_x, - .dstY = plane_state->crtc_y, - }; + memset(req_config, 0, sizeof(*req_config)); + req_config->surface = to_nv_framebuffer(plane_state->fb)->pSurface; + req_config->dstX = plane_state->crtc_x; + req_config->dstY = plane_state->crtc_y; #if defined(NV_DRM_ALPHA_BLENDING_AVAILABLE) if (plane->blend_mode_property != NULL && plane->alpha_property != NULL) { @@ -275,24 +273,22 @@ plane_req_config_update(struct drm_plane *plane, return 0; } - *req_config = (struct NvKmsKapiLayerRequestedConfig) { - .config = { - .surface = to_nv_framebuffer(plane_state->fb)->pSurface, + memset(req_config, 0, sizeof(*req_config)); - /* Source values are 16.16 fixed point */ - .srcX = plane_state->src_x >> 16, - .srcY = plane_state->src_y >> 16, - .srcWidth = plane_state->src_w >> 16, - .srcHeight = plane_state->src_h >> 16, + req_config->config.surface = to_nv_framebuffer(plane_state->fb)->pSurface; - .dstX = plane_state->crtc_x, - .dstY = plane_state->crtc_y, - .dstWidth = plane_state->crtc_w, - .dstHeight = plane_state->crtc_h, + /* Source values are 16.16 fixed point */ + req_config->config.srcX = plane_state->src_x >> 16; + req_config->config.srcY = plane_state->src_y >> 16; + req_config->config.srcWidth = plane_state->src_w >> 16; + req_config->config.srcHeight = plane_state->src_h >> 16; - .csc = old_config.csc - }, - }; + req_config->config.dstX = plane_state->crtc_x; + req_config->config.dstY = plane_state->crtc_y; + req_config->config.dstWidth = plane_state->crtc_w; + req_config->config.dstHeight = plane_state->crtc_h; + + req_config->config.csc = old_config.csc; #if defined(NV_DRM_ROTATION_AVAILABLE) /* @@ -688,9 +684,7 @@ static int nv_drm_plane_atomic_set_property( to_nv_drm_plane_state(state); if (property == nv_dev->nv_out_fence_property) { -#if defined(NV_LINUX_NVHOST_H_PRESENT) && defined(CONFIG_TEGRA_GRHOST) - nv_drm_plane_state->fd_user_ptr = u64_to_user_ptr(val); -#endif + nv_drm_plane_state->fd_user_ptr = (void __user *)(uintptr_t)(val); return 0; } else if (property == nv_dev->nv_input_colorspace_property) { nv_drm_plane_state->input_colorspace = val; @@ -875,14 +869,12 @@ static inline void nv_drm_crtc_duplicate_req_head_modeset_config( * there is no change in new configuration yet with respect * to older one! */ - *new = (struct NvKmsKapiHeadRequestedConfig) { - .modeSetConfig = old->modeSetConfig, - }; + memset(new, 0, sizeof(*new)); + new->modeSetConfig = old->modeSetConfig; for (i = 0; i < ARRAY_SIZE(old->layerRequestedConfig); i++) { - new->layerRequestedConfig[i] = (struct NvKmsKapiLayerRequestedConfig) { - .config = old->layerRequestedConfig[i].config, - }; + new->layerRequestedConfig[i].config = + old->layerRequestedConfig[i].config; } } diff --git a/kernel-open/nvidia-drm/nvidia-drm-drv.c b/kernel-open/nvidia-drm/nvidia-drm-drv.c index 9de3f3fa71..ec2e1f29b7 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-drv.c +++ b/kernel-open/nvidia-drm/nvidia-drm-drv.c @@ -373,18 +373,14 @@ static int nv_drm_create_properties(struct nv_drm_device *nv_dev) len++; } -#if defined(NV_LINUX_NVHOST_H_PRESENT) && defined(CONFIG_TEGRA_GRHOST) - if (!nv_dev->supportsSyncpts) { - return 0; - } - - nv_dev->nv_out_fence_property = - drm_property_create_range(nv_dev->dev, DRM_MODE_PROP_ATOMIC, - "NV_DRM_OUT_FENCE_PTR", 0, U64_MAX); - if (nv_dev->nv_out_fence_property == NULL) { - return -ENOMEM; + if (nv_dev->supportsSyncpts) { + nv_dev->nv_out_fence_property = + drm_property_create_range(nv_dev->dev, DRM_MODE_PROP_ATOMIC, + "NV_DRM_OUT_FENCE_PTR", 0, U64_MAX); + if (nv_dev->nv_out_fence_property == NULL) { + return -ENOMEM; + } } -#endif nv_dev->nv_input_colorspace_property = drm_property_create_enum(nv_dev->dev, 0, "NV_INPUT_COLORSPACE", @@ -480,6 +476,22 @@ static int nv_drm_load(struct drm_device *dev, unsigned long flags) return -ENODEV; } +#if defined(NV_DRM_FBDEV_GENERIC_AVAILABLE) + /* + * If fbdev is enabled, take modeset ownership now before other DRM clients + * can take master (and thus NVKMS ownership). + */ + if (nv_drm_fbdev_module_param) { + if (!nvKms->grabOwnership(pDevice)) { + nvKms->freeDevice(pDevice); + NV_DRM_DEV_LOG_ERR(nv_dev, "Failed to grab NVKMS modeset ownership"); + return -EBUSY; + } + + nv_dev->hasFramebufferConsole = NV_TRUE; + } +#endif + mutex_lock(&nv_dev->lock); /* Set NvKmsKapiDevice */ @@ -590,6 +602,15 @@ static void __nv_drm_unload(struct drm_device *dev) return; } + /* Release modeset ownership if fbdev is enabled */ + +#if defined(NV_DRM_FBDEV_GENERIC_AVAILABLE) + if (nv_dev->hasFramebufferConsole) { + drm_atomic_helper_shutdown(dev); + nvKms->releaseOwnership(nv_dev->pDevice); + } +#endif + cancel_delayed_work_sync(&nv_dev->hotplug_event_work); mutex_lock(&nv_dev->lock); @@ -781,6 +802,14 @@ static int nv_drm_get_dev_info_ioctl(struct drm_device *dev, return 0; } +static int nv_drm_get_drm_file_unique_id_ioctl(struct drm_device *dev, + void *data, struct drm_file *filep) +{ + struct drm_nvidia_get_drm_file_unique_id_params *params = data; + params->id = (u64)(filep->driver_priv); + return 0; +} + static int nv_drm_dmabuf_supported_ioctl(struct drm_device *dev, void *data, struct drm_file *filep) { @@ -1279,6 +1308,17 @@ static void nv_drm_postclose(struct drm_device *dev, struct drm_file *filep) } #endif /* NV_DRM_ATOMIC_MODESET_AVAILABLE */ +static int nv_drm_open(struct drm_device *dev, struct drm_file *filep) +{ + _Static_assert(sizeof(filep->driver_priv) >= sizeof(u64), + "filep->driver_priv can not hold an u64"); + static atomic64_t id = ATOMIC_INIT(0); + + filep->driver_priv = (void *)atomic64_inc_return(&id); + + return 0; +} + #if defined(NV_DRM_MASTER_HAS_LEASES) static struct drm_master *nv_drm_find_lessee(struct drm_master *master, int lessee_id) @@ -1522,6 +1562,9 @@ static const struct drm_ioctl_desc nv_drm_ioctls[] = { DRM_IOCTL_DEF_DRV(NVIDIA_GET_DEV_INFO, nv_drm_get_dev_info_ioctl, DRM_RENDER_ALLOW|DRM_UNLOCKED), + DRM_IOCTL_DEF_DRV(NVIDIA_GET_DRM_FILE_UNIQUE_ID, + nv_drm_get_drm_file_unique_id_ioctl, + DRM_RENDER_ALLOW|DRM_UNLOCKED), #if defined(NV_DRM_FENCE_AVAILABLE) DRM_IOCTL_DEF_DRV(NVIDIA_FENCE_SUPPORTED, @@ -1604,6 +1647,9 @@ static struct drm_driver nv_drm_driver = { .driver_features = #if defined(NV_DRM_DRIVER_PRIME_FLAG_PRESENT) DRIVER_PRIME | +#endif +#if defined(NV_DRM_SYNCOBJ_FEATURES_PRESENT) + DRIVER_SYNCOBJ | DRIVER_SYNCOBJ_TIMELINE | #endif DRIVER_GEM | DRIVER_RENDER, @@ -1615,14 +1661,14 @@ static struct drm_driver nv_drm_driver = { .num_ioctls = ARRAY_SIZE(nv_drm_ioctls), /* - * linux-next commit 71a7974ac701 ("drm/prime: Unexport helpers for fd/handle - * conversion") unexports drm_gem_prime_handle_to_fd() and + * Linux kernel v6.6 commit 71a7974ac701 ("drm/prime: Unexport helpers + * for fd/handle conversion") unexports drm_gem_prime_handle_to_fd() and * drm_gem_prime_fd_to_handle(). * - * Prior linux-next commit 6b85aa68d9d5 ("drm: Enable PRIME import/export for - * all drivers") made these helpers the default when .prime_handle_to_fd / - * .prime_fd_to_handle are unspecified, so it's fine to just skip specifying - * them if the helpers aren't present. + * Prior Linux kernel v6.6 commit 6b85aa68d9d5 ("drm: Enable PRIME + * import/export for all drivers") made these helpers the default when + * .prime_handle_to_fd / .prime_fd_to_handle are unspecified, so it's fine + * to just skip specifying them if the helpers aren't present. */ #if NV_IS_EXPORT_SYMBOL_PRESENT_drm_gem_prime_handle_to_fd .prime_handle_to_fd = drm_gem_prime_handle_to_fd, @@ -1656,6 +1702,7 @@ static struct drm_driver nv_drm_driver = { #if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE) .postclose = nv_drm_postclose, #endif + .open = nv_drm_open, .fops = &nv_drm_fops, @@ -1714,6 +1761,7 @@ void nv_drm_register_drm_device(const nv_gpu_info_t *gpu_info) struct nv_drm_device *nv_dev = NULL; struct drm_device *dev = NULL; struct device *device = gpu_info->os_device_ptr; + bool bus_is_pci; DRM_DEBUG( "Registering device for NVIDIA GPU ID 0x08%x", @@ -1747,7 +1795,7 @@ void nv_drm_register_drm_device(const nv_gpu_info_t *gpu_info) dev->dev_private = nv_dev; nv_dev->dev = dev; - bool bus_is_pci = + bus_is_pci = #if defined(NV_LINUX) device->bus == &pci_bus_type; #elif defined(NV_BSD) @@ -1771,11 +1819,6 @@ void nv_drm_register_drm_device(const nv_gpu_info_t *gpu_info) if (nv_drm_fbdev_module_param && drm_core_check_feature(dev, DRIVER_MODESET)) { - if (!nvKms->grabOwnership(nv_dev->pDevice)) { - NV_DRM_DEV_LOG_ERR(nv_dev, "Failed to grab NVKMS modeset ownership"); - goto failed_grab_ownership; - } - if (bus_is_pci) { struct pci_dev *pdev = to_pci_dev(device); @@ -1786,8 +1829,6 @@ void nv_drm_register_drm_device(const nv_gpu_info_t *gpu_info) #endif } drm_fbdev_generic_setup(dev, 32); - - nv_dev->hasFramebufferConsole = NV_TRUE; } #endif /* defined(NV_DRM_FBDEV_GENERIC_AVAILABLE) */ @@ -1798,12 +1839,6 @@ void nv_drm_register_drm_device(const nv_gpu_info_t *gpu_info) return; /* Success */ -#if defined(NV_DRM_FBDEV_GENERIC_AVAILABLE) -failed_grab_ownership: - - drm_dev_unregister(dev); -#endif - failed_drm_register: nv_drm_dev_free(dev); @@ -1870,12 +1905,6 @@ void nv_drm_remove_devices(void) struct nv_drm_device *next = dev_list->next; struct drm_device *dev = dev_list->dev; -#if defined(NV_DRM_FBDEV_GENERIC_AVAILABLE) - if (dev_list->hasFramebufferConsole) { - drm_atomic_helper_shutdown(dev); - nvKms->releaseOwnership(dev_list->pDevice); - } -#endif drm_dev_unregister(dev); nv_drm_dev_free(dev); diff --git a/kernel-open/nvidia-drm/nvidia-drm-fence.c b/kernel-open/nvidia-drm/nvidia-drm-fence.c index e6621178f4..0143d6a163 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-fence.c +++ b/kernel-open/nvidia-drm/nvidia-drm-fence.c @@ -293,14 +293,12 @@ __nv_drm_prime_fence_context_new( * to check a return value. */ - *nv_prime_fence_context = (struct nv_drm_prime_fence_context) { - .base.ops = &nv_drm_prime_fence_context_ops, - .base.nv_dev = nv_dev, - .base.context = nv_dma_fence_context_alloc(1), - .base.fenceSemIndex = p->index, - .pSemSurface = pSemSurface, - .pLinearAddress = pLinearAddress, - }; + nv_prime_fence_context->base.ops = &nv_drm_prime_fence_context_ops; + nv_prime_fence_context->base.nv_dev = nv_dev; + nv_prime_fence_context->base.context = nv_dma_fence_context_alloc(1); + nv_prime_fence_context->base.fenceSemIndex = p->index; + nv_prime_fence_context->pSemSurface = pSemSurface; + nv_prime_fence_context->pLinearAddress = pLinearAddress; INIT_LIST_HEAD(&nv_prime_fence_context->pending); @@ -1261,18 +1259,16 @@ __nv_drm_semsurf_fence_ctx_new( * to check a return value. */ - *ctx = (struct nv_drm_semsurf_fence_ctx) { - .base.ops = &nv_drm_semsurf_fence_ctx_ops, - .base.nv_dev = nv_dev, - .base.context = nv_dma_fence_context_alloc(1), - .base.fenceSemIndex = p->index, - .pSemSurface = pSemSurface, - .pSemMapping.pVoid = semMapping, - .pMaxSubmittedMapping = (volatile NvU64 *)maxSubmittedMapping, - .callback.local = NULL, - .callback.nvKms = NULL, - .current_wait_value = 0, - }; + ctx->base.ops = &nv_drm_semsurf_fence_ctx_ops; + ctx->base.nv_dev = nv_dev; + ctx->base.context = nv_dma_fence_context_alloc(1); + ctx->base.fenceSemIndex = p->index; + ctx->pSemSurface = pSemSurface; + ctx->pSemMapping.pVoid = semMapping; + ctx->pMaxSubmittedMapping = (volatile NvU64 *)maxSubmittedMapping; + ctx->callback.local = NULL; + ctx->callback.nvKms = NULL; + ctx->current_wait_value = 0; spin_lock_init(&ctx->lock); INIT_LIST_HEAD(&ctx->pending_fences); diff --git a/kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.c b/kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.c index 468a9c2bcb..c652d6e477 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.c +++ b/kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.c @@ -551,14 +551,12 @@ static struct drm_gem_object *__nv_drm_gem_nvkms_prime_dup( { struct nv_drm_device *nv_dev = to_nv_device(dev); const struct nv_drm_device *nv_dev_src; - const struct nv_drm_gem_nvkms_memory *nv_nvkms_memory_src; struct nv_drm_gem_nvkms_memory *nv_nvkms_memory; struct NvKmsKapiMemory *pMemory; BUG_ON(nv_gem_src == NULL || nv_gem_src->ops != &nv_gem_nvkms_memory_ops); nv_dev_src = to_nv_device(nv_gem_src->base.dev); - nv_nvkms_memory_src = to_nv_nvkms_memory_const(nv_gem_src); if ((nv_nvkms_memory = nv_drm_calloc(1, sizeof(*nv_nvkms_memory))) == NULL) { diff --git a/kernel-open/nvidia-drm/nvidia-drm-helper.c b/kernel-open/nvidia-drm/nvidia-drm-helper.c index dd6f89a7cd..7525d3addf 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-helper.c +++ b/kernel-open/nvidia-drm/nvidia-drm-helper.c @@ -45,8 +45,7 @@ /* * The inclusion of drm_framebuffer.h was removed from drm_crtc.h by commit - * 720cf96d8fecde29b72e1101f8a567a0ce99594f ("drm: Drop drm_framebuffer.h from - * drm_crtc.h") in linux-next, expected in v5.19-rc7. + * 720cf96d8fec ("drm: Drop drm_framebuffer.h from drm_crtc.h") in v6.0. * * We only need drm_framebuffer.h for drm_framebuffer_put(), and it is always * present (v4.9+) when drm_framebuffer_{put,get}() is present (v4.12+), so it diff --git a/kernel-open/nvidia-drm/nvidia-drm-helper.h b/kernel-open/nvidia-drm/nvidia-drm-helper.h index 94d48db9fd..f6fdfd74e3 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-helper.h +++ b/kernel-open/nvidia-drm/nvidia-drm-helper.h @@ -613,8 +613,8 @@ static inline int nv_drm_format_num_planes(uint32_t format) #endif /* defined(NV_DRM_FORMAT_MODIFIERS_PRESENT) */ /* - * DRM_UNLOCKED was removed with linux-next commit 2798ffcc1d6a ("drm: Remove - * locking for legacy ioctls and DRM_UNLOCKED"), but it was previously made + * DRM_UNLOCKED was removed with commit 2798ffcc1d6a ("drm: Remove locking for + * legacy ioctls and DRM_UNLOCKED") in v6.8, but it was previously made * implicit for all non-legacy DRM driver IOCTLs since Linux v4.10 commit * fa5386459f06 "drm: Used DRM_LEGACY for all legacy functions" (Linux v4.4 * commit ea487835e887 "drm: Enforce unlocked ioctl operation for kms driver diff --git a/kernel-open/nvidia-drm/nvidia-drm-ioctl.h b/kernel-open/nvidia-drm/nvidia-drm-ioctl.h index 98b8bdd4ac..3b25620f3e 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-ioctl.h +++ b/kernel-open/nvidia-drm/nvidia-drm-ioctl.h @@ -52,6 +52,7 @@ #define DRM_NVIDIA_SEMSURF_FENCE_CREATE 0x15 #define DRM_NVIDIA_SEMSURF_FENCE_WAIT 0x16 #define DRM_NVIDIA_SEMSURF_FENCE_ATTACH 0x17 +#define DRM_NVIDIA_GET_DRM_FILE_UNIQUE_ID 0x18 #define DRM_IOCTL_NVIDIA_GEM_IMPORT_NVKMS_MEMORY \ DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GEM_IMPORT_NVKMS_MEMORY), \ @@ -157,6 +158,11 @@ DRM_NVIDIA_SEMSURF_FENCE_ATTACH), \ struct drm_nvidia_semsurf_fence_attach_params) +#define DRM_IOCTL_NVIDIA_GET_DRM_FILE_UNIQUE_ID \ + DRM_IOWR((DRM_COMMAND_BASE + \ + DRM_NVIDIA_GET_DRM_FILE_UNIQUE_ID), \ + struct drm_nvidia_get_drm_file_unique_id_params) + struct drm_nvidia_gem_import_nvkms_memory_params { uint64_t mem_size; /* IN */ @@ -385,4 +391,8 @@ struct drm_nvidia_semsurf_fence_attach_params { uint64_t wait_value; /* IN Semaphore value to reach before signal */ }; +struct drm_nvidia_get_drm_file_unique_id_params { + uint64_t id; /* OUT Unique ID of the DRM file */ +}; + #endif /* _UAPI_NVIDIA_DRM_IOCTL_H_ */ diff --git a/kernel-open/nvidia-drm/nvidia-drm-modeset.c b/kernel-open/nvidia-drm/nvidia-drm-modeset.c index a8112825f8..887642ee9d 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-modeset.c +++ b/kernel-open/nvidia-drm/nvidia-drm-modeset.c @@ -587,6 +587,9 @@ int nv_drm_atomic_commit(struct drm_device *dev, NV_DRM_DEV_LOG_ERR( nv_dev, "Flip event timeout on head %u", nv_crtc->head); + while (!list_empty(&nv_crtc->flip_list)) { + __nv_drm_handle_flip_event(nv_crtc); + } } } } diff --git a/kernel-open/nvidia-drm/nvidia-drm-sources.mk b/kernel-open/nvidia-drm/nvidia-drm-sources.mk index 9eea228577..7ef0c5b8fd 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-sources.mk +++ b/kernel-open/nvidia-drm/nvidia-drm-sources.mk @@ -128,4 +128,5 @@ NV_CONFTEST_TYPE_COMPILE_TESTS += drm_driver_has_dumb_destroy NV_CONFTEST_TYPE_COMPILE_TESTS += fence_ops_use_64bit_seqno NV_CONFTEST_TYPE_COMPILE_TESTS += drm_aperture_remove_conflicting_pci_framebuffers_has_driver_arg NV_CONFTEST_TYPE_COMPILE_TESTS += drm_mode_create_dp_colorspace_property_has_supported_colorspaces_arg +NV_CONFTEST_TYPE_COMPILE_TESTS += drm_syncobj_features_present NV_CONFTEST_TYPE_COMPILE_TESTS += drm_unlocked_ioctl_flag_present diff --git a/kernel-open/nvidia-modeset/nvidia-modeset-linux.c b/kernel-open/nvidia-modeset/nvidia-modeset-linux.c index f1f40c41c8..dc242f5713 100644 --- a/kernel-open/nvidia-modeset/nvidia-modeset-linux.c +++ b/kernel-open/nvidia-modeset/nvidia-modeset-linux.c @@ -77,10 +77,10 @@ module_param_named(disable_hdmi_frl, disable_hdmi_frl, bool, 0400); static bool disable_vrr_memclk_switch = false; module_param_named(disable_vrr_memclk_switch, disable_vrr_memclk_switch, bool, 0400); -static bool hdmi_deepcolor = false; +static bool hdmi_deepcolor = true; module_param_named(hdmi_deepcolor, hdmi_deepcolor, bool, 0400); -static bool vblank_sem_control = false; +static bool vblank_sem_control = true; module_param_named(vblank_sem_control, vblank_sem_control, bool, 0400); static bool opportunistic_display_sync = true; @@ -139,6 +139,20 @@ NvBool nvkms_opportunistic_display_sync(void) return opportunistic_display_sync; } +NvBool nvkms_kernel_supports_syncpts(void) +{ +/* + * Note this only checks that the kernel has the prerequisite + * support for syncpts; callers must also check that the hardware + * supports syncpts. + */ +#if (defined(CONFIG_TEGRA_GRHOST) || defined(NV_LINUX_HOST1X_NEXT_H_PRESENT)) + return NV_TRUE; +#else + return NV_FALSE; +#endif +} + #define NVKMS_SYNCPT_STUBS_NEEDED /************************************************************************* @@ -1234,6 +1248,26 @@ void nvkms_close_from_kapi(struct nvkms_per_open *popen) nvkms_close_pm_unlocked(popen); } +NvBool nvkms_ioctl_from_kapi_try_pmlock +( + struct nvkms_per_open *popen, + NvU32 cmd, void *params_address, const size_t param_size +) +{ + NvBool ret; + + if (nvkms_read_trylock_pm_lock()) { + return NV_FALSE; + } + + ret = nvkms_ioctl_common(popen, + cmd, + (NvU64)(NvUPtr)params_address, param_size) == 0; + nvkms_read_unlock_pm_lock(); + + return ret; +} + NvBool nvkms_ioctl_from_kapi ( struct nvkms_per_open *popen, diff --git a/kernel-open/nvidia-modeset/nvidia-modeset-os-interface.h b/kernel-open/nvidia-modeset/nvidia-modeset-os-interface.h index af8d501417..82309a8d6b 100644 --- a/kernel-open/nvidia-modeset/nvidia-modeset-os-interface.h +++ b/kernel-open/nvidia-modeset/nvidia-modeset-os-interface.h @@ -304,6 +304,11 @@ NvU32 nvkms_enumerate_gpus(nv_gpu_info_t *gpu_info); NvBool nvkms_allow_write_combining(void); +/*! + * Check if OS supports syncpoints. + */ +NvBool nvkms_kernel_supports_syncpts(void); + /*! * Checks whether the fd is associated with an nvidia character device. */ @@ -328,6 +333,16 @@ NvBool nvkms_ioctl_from_kapi NvU32 cmd, void *params_address, const size_t params_size ); +/*! + * Like nvkms_ioctl_from_kapi, but return NV_FALSE instead of waiting if the + * power management read lock cannot be acquired. + */ +NvBool nvkms_ioctl_from_kapi_try_pmlock +( + struct nvkms_per_open *popen, + NvU32 cmd, void *params_address, const size_t params_size +); + /*! * APIs for locking. */ diff --git a/kernel-open/nvidia-modeset/nvidia-modeset.Kbuild b/kernel-open/nvidia-modeset/nvidia-modeset.Kbuild index e50d42d710..9698b59e24 100644 --- a/kernel-open/nvidia-modeset/nvidia-modeset.Kbuild +++ b/kernel-open/nvidia-modeset/nvidia-modeset.Kbuild @@ -105,3 +105,4 @@ NV_CONFTEST_FUNCTION_COMPILE_TESTS += list_is_first NV_CONFTEST_FUNCTION_COMPILE_TESTS += ktime_get_real_ts64 NV_CONFTEST_FUNCTION_COMPILE_TESTS += ktime_get_raw_ts64 NV_CONFTEST_FUNCTION_COMPILE_TESTS += acpi_video_backlight_use_native +NV_CONFTEST_FUNCTION_COMPILE_TESTS += kernel_read_has_pointer_pos_arg diff --git a/kernel-open/nvidia-uvm/uvm.h b/kernel-open/nvidia-uvm/uvm.h index 94efb2b6ba..8aa14a7ee0 100644 --- a/kernel-open/nvidia-uvm/uvm.h +++ b/kernel-open/nvidia-uvm/uvm.h @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2013-2023 NVIDIA Corporation + Copyright (c) 2013-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -3463,8 +3463,7 @@ NV_STATUS UvmToolsDestroySession(UvmToolsSessionHandle session); // #if UVM_API_REV_IS_AT_MOST(10) -// This is deprecated and replaced by sizeof(UvmToolsEventControlData_V1) or -// sizeof(UvmToolsEventControlData_V2). +// This is deprecated and replaced by sizeof(UvmToolsEventControlData). NvLength UvmToolsGetEventControlSize(void); // This is deprecated and replaced by sizeof(UvmEventEntry_V1) or @@ -3488,8 +3487,6 @@ NvLength UvmToolsGetNumberOfCounters(void); // version: (INPUT) // Requested version for events or counters. // See UvmEventEntry_V1 and UvmEventEntry_V2. -// UvmToolsEventControlData_V2::version records the entry version that -// will be generated. // // event_buffer: (INPUT) // User allocated buffer. Must be page-aligned. Must be large enough to @@ -3502,8 +3499,7 @@ NvLength UvmToolsGetNumberOfCounters(void); // // event_control (INPUT) // User allocated buffer. Must be page-aligned. Must be large enough to -// hold UvmToolsEventControlData_V1 if version is UvmEventEntry_V1 or -// UvmToolsEventControlData_V2 (although single page-size allocation +// hold UvmToolsEventControlData (although single page-size allocation // should be more than enough). Gets pinned until queue is destroyed. // // queue: (OUTPUT) diff --git a/kernel-open/nvidia-uvm/uvm_ampere_host.c b/kernel-open/nvidia-uvm/uvm_ampere_host.c index d0817b54cc..acd3249eaa 100644 --- a/kernel-open/nvidia-uvm/uvm_ampere_host.c +++ b/kernel-open/nvidia-uvm/uvm_ampere_host.c @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2018-2023 NVIDIA Corporation + Copyright (c) 2018-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -205,17 +205,18 @@ void uvm_hal_ampere_host_clear_faulted_channel_sw_method(uvm_push_t *push, CLEAR_FAULTED_B, HWVALUE(C076, CLEAR_FAULTED_B, INST_HI, instance_ptr_hi)); } -// Copy from Pascal, this version sets TLB_INVALIDATE_INVAL_SCOPE. +// Copy from Turing, this version sets TLB_INVALIDATE_INVAL_SCOPE. void uvm_hal_ampere_host_tlb_invalidate_all(uvm_push_t *push, - uvm_gpu_phys_address_t pdb, - NvU32 depth, - uvm_membar_t membar) + uvm_gpu_phys_address_t pdb, + NvU32 depth, + uvm_membar_t membar) { NvU32 aperture_value; NvU32 page_table_level; NvU32 pdb_lo; NvU32 pdb_hi; NvU32 ack_value = 0; + NvU32 sysmembar_value = 0; UVM_ASSERT_MSG(pdb.aperture == UVM_APERTURE_VID || pdb.aperture == UVM_APERTURE_SYS, "aperture: %u", pdb.aperture); @@ -230,8 +231,8 @@ void uvm_hal_ampere_host_tlb_invalidate_all(uvm_push_t *push, pdb_lo = pdb.address & HWMASK(C56F, MEM_OP_C, TLB_INVALIDATE_PDB_ADDR_LO); pdb_hi = pdb.address >> HWSIZE(C56F, MEM_OP_C, TLB_INVALIDATE_PDB_ADDR_LO); - // PDE3 is the highest level on Pascal, see the comment in uvm_pascal_mmu.c - // for details. + // PDE3 is the highest level on Pascal-Ampere, see the comment in + // uvm_pascal_mmu.c for details. UVM_ASSERT_MSG(depth < NVC56F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE3, "depth %u", depth); page_table_level = NVC56F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE3 - depth; @@ -242,7 +243,12 @@ void uvm_hal_ampere_host_tlb_invalidate_all(uvm_push_t *push, ack_value = HWCONST(C56F, MEM_OP_C, TLB_INVALIDATE_ACK_TYPE, GLOBALLY); } - NV_PUSH_4U(C56F, MEM_OP_A, HWCONST(C56F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, DIS) | + if (membar == UVM_MEMBAR_SYS) + sysmembar_value = HWCONST(C56F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, EN); + else + sysmembar_value = HWCONST(C56F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, DIS); + + NV_PUSH_4U(C56F, MEM_OP_A, sysmembar_value | HWCONST(C56F, MEM_OP_A, TLB_INVALIDATE_INVAL_SCOPE, NON_LINK_TLBS), MEM_OP_B, 0, MEM_OP_C, HWCONST(C56F, MEM_OP_C, TLB_INVALIDATE_PDB, ONE) | @@ -255,16 +261,18 @@ void uvm_hal_ampere_host_tlb_invalidate_all(uvm_push_t *push, MEM_OP_D, HWCONST(C56F, MEM_OP_D, OPERATION, MMU_TLB_INVALIDATE) | HWVALUE(C56F, MEM_OP_D, TLB_INVALIDATE_PDB_ADDR_HI, pdb_hi)); - uvm_hal_tlb_invalidate_membar(push, membar); + // GPU membar still requires an explicit membar method. + if (membar == UVM_MEMBAR_GPU) + uvm_push_get_gpu(push)->parent->host_hal->membar_gpu(push); } -// Copy from Volta, this version sets TLB_INVALIDATE_INVAL_SCOPE. +// Copy from Turing, this version sets TLB_INVALIDATE_INVAL_SCOPE. void uvm_hal_ampere_host_tlb_invalidate_va(uvm_push_t *push, uvm_gpu_phys_address_t pdb, NvU32 depth, NvU64 base, NvU64 size, - NvU32 page_size, + NvU64 page_size, uvm_membar_t membar) { NvU32 aperture_value; @@ -272,6 +280,7 @@ void uvm_hal_ampere_host_tlb_invalidate_va(uvm_push_t *push, NvU32 pdb_lo; NvU32 pdb_hi; NvU32 ack_value = 0; + NvU32 sysmembar_value = 0; NvU32 va_lo; NvU32 va_hi; NvU64 end; @@ -281,9 +290,9 @@ void uvm_hal_ampere_host_tlb_invalidate_va(uvm_push_t *push, NvU32 log2_invalidation_size; uvm_gpu_t *gpu = uvm_push_get_gpu(push); - UVM_ASSERT_MSG(IS_ALIGNED(page_size, 1 << 12), "page_size 0x%x\n", page_size); - UVM_ASSERT_MSG(IS_ALIGNED(base, page_size), "base 0x%llx page_size 0x%x\n", base, page_size); - UVM_ASSERT_MSG(IS_ALIGNED(size, page_size), "size 0x%llx page_size 0x%x\n", size, page_size); + UVM_ASSERT_MSG(IS_ALIGNED(page_size, 1 << 12), "page_size 0x%llx\n", page_size); + UVM_ASSERT_MSG(IS_ALIGNED(base, page_size), "base 0x%llx page_size 0x%llx\n", base, page_size); + UVM_ASSERT_MSG(IS_ALIGNED(size, page_size), "size 0x%llx page_size 0x%llx\n", size, page_size); UVM_ASSERT_MSG(size > 0, "size 0x%llx\n", size); // The invalidation size must be a power-of-two number of pages containing @@ -325,7 +334,7 @@ void uvm_hal_ampere_host_tlb_invalidate_va(uvm_push_t *push, pdb_lo = pdb.address & HWMASK(C56F, MEM_OP_C, TLB_INVALIDATE_PDB_ADDR_LO); pdb_hi = pdb.address >> HWSIZE(C56F, MEM_OP_C, TLB_INVALIDATE_PDB_ADDR_LO); - // PDE3 is the highest level on Pascal-Ampere , see the comment in + // PDE3 is the highest level on Pascal-Ampere, see the comment in // uvm_pascal_mmu.c for details. UVM_ASSERT_MSG(depth < NVC56F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE3, "depth %u", depth); page_table_level = NVC56F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE3 - depth; @@ -337,10 +346,15 @@ void uvm_hal_ampere_host_tlb_invalidate_va(uvm_push_t *push, ack_value = HWCONST(C56F, MEM_OP_C, TLB_INVALIDATE_ACK_TYPE, GLOBALLY); } + if (membar == UVM_MEMBAR_SYS) + sysmembar_value = HWCONST(C56F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, EN); + else + sysmembar_value = HWCONST(C56F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, DIS); + NV_PUSH_4U(C56F, MEM_OP_A, HWVALUE(C56F, MEM_OP_A, TLB_INVALIDATE_INVALIDATION_SIZE, log2_invalidation_size) | - HWCONST(C56F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, DIS) | - HWVALUE(C56F, MEM_OP_A, TLB_INVALIDATE_TARGET_ADDR_LO, va_lo) | - HWCONST(C56F, MEM_OP_A, TLB_INVALIDATE_INVAL_SCOPE, NON_LINK_TLBS), + HWCONST(C56F, MEM_OP_A, TLB_INVALIDATE_INVAL_SCOPE, NON_LINK_TLBS) | + sysmembar_value | + HWVALUE(C56F, MEM_OP_A, TLB_INVALIDATE_TARGET_ADDR_LO, va_lo), MEM_OP_B, HWVALUE(C56F, MEM_OP_B, TLB_INVALIDATE_TARGET_ADDR_HI, va_hi), MEM_OP_C, HWCONST(C56F, MEM_OP_C, TLB_INVALIDATE_PDB, ONE) | HWVALUE(C56F, MEM_OP_C, TLB_INVALIDATE_PDB_ADDR_LO, pdb_lo) | @@ -352,21 +366,23 @@ void uvm_hal_ampere_host_tlb_invalidate_va(uvm_push_t *push, MEM_OP_D, HWCONST(C56F, MEM_OP_D, OPERATION, MMU_TLB_INVALIDATE_TARGETED) | HWVALUE(C56F, MEM_OP_D, TLB_INVALIDATE_PDB_ADDR_HI, pdb_hi)); - uvm_hal_tlb_invalidate_membar(push, membar); + // GPU membar still requires an explicit membar method. + if (membar == UVM_MEMBAR_GPU) + gpu->parent->host_hal->membar_gpu(push); } -// Copy from Pascal, this version sets TLB_INVALIDATE_INVAL_SCOPE. +// Copy from Turing, this version sets TLB_INVALIDATE_INVAL_SCOPE. void uvm_hal_ampere_host_tlb_invalidate_test(uvm_push_t *push, uvm_gpu_phys_address_t pdb, UVM_TEST_INVALIDATE_TLB_PARAMS *params) { NvU32 ack_value = 0; + NvU32 sysmembar_value = 0; NvU32 invalidate_gpc_value = 0; NvU32 aperture_value = 0; NvU32 pdb_lo = 0; NvU32 pdb_hi = 0; NvU32 page_table_level = 0; - uvm_membar_t membar; UVM_ASSERT_MSG(pdb.aperture == UVM_APERTURE_VID || pdb.aperture == UVM_APERTURE_SYS, "aperture: %u", pdb.aperture); if (pdb.aperture == UVM_APERTURE_VID) @@ -381,7 +397,7 @@ void uvm_hal_ampere_host_tlb_invalidate_test(uvm_push_t *push, pdb_hi = pdb.address >> HWSIZE(C56F, MEM_OP_C, TLB_INVALIDATE_PDB_ADDR_LO); if (params->page_table_level != UvmInvalidatePageTableLevelAll) { - // PDE3 is the highest level on Pascal, see the comment in + // PDE3 is the highest level on Pascal-Ampere, see the comment in // uvm_pascal_mmu.c for details. page_table_level = min((NvU32)UvmInvalidatePageTableLevelPde3, params->page_table_level) - 1; } @@ -393,6 +409,11 @@ void uvm_hal_ampere_host_tlb_invalidate_test(uvm_push_t *push, ack_value = HWCONST(C56F, MEM_OP_C, TLB_INVALIDATE_ACK_TYPE, GLOBALLY); } + if (params->membar == UvmInvalidateTlbMemBarSys) + sysmembar_value = HWCONST(C56F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, EN); + else + sysmembar_value = HWCONST(C56F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, DIS); + if (params->disable_gpc_invalidate) invalidate_gpc_value = HWCONST(C56F, MEM_OP_C, TLB_INVALIDATE_GPC, DISABLE); else @@ -403,9 +424,9 @@ void uvm_hal_ampere_host_tlb_invalidate_test(uvm_push_t *push, NvU32 va_lo = va & HWMASK(C56F, MEM_OP_A, TLB_INVALIDATE_TARGET_ADDR_LO); NvU32 va_hi = va >> HWSIZE(C56F, MEM_OP_A, TLB_INVALIDATE_TARGET_ADDR_LO); - NV_PUSH_4U(C56F, MEM_OP_A, HWCONST(C56F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, DIS) | - HWVALUE(C56F, MEM_OP_A, TLB_INVALIDATE_TARGET_ADDR_LO, va_lo) | - HWCONST(C56F, MEM_OP_A, TLB_INVALIDATE_INVAL_SCOPE, NON_LINK_TLBS), + NV_PUSH_4U(C56F, MEM_OP_A, sysmembar_value | + HWCONST(C56F, MEM_OP_A, TLB_INVALIDATE_INVAL_SCOPE, NON_LINK_TLBS) | + HWVALUE(C56F, MEM_OP_A, TLB_INVALIDATE_TARGET_ADDR_LO, va_lo), MEM_OP_B, HWVALUE(C56F, MEM_OP_B, TLB_INVALIDATE_TARGET_ADDR_HI, va_hi), MEM_OP_C, HWCONST(C56F, MEM_OP_C, TLB_INVALIDATE_REPLAY, NONE) | HWVALUE(C56F, MEM_OP_C, TLB_INVALIDATE_PAGE_TABLE_LEVEL, page_table_level) | @@ -418,7 +439,7 @@ void uvm_hal_ampere_host_tlb_invalidate_test(uvm_push_t *push, HWVALUE(C56F, MEM_OP_D, TLB_INVALIDATE_PDB_ADDR_HI, pdb_hi)); } else { - NV_PUSH_4U(C56F, MEM_OP_A, HWCONST(C56F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, DIS) | + NV_PUSH_4U(C56F, MEM_OP_A, sysmembar_value | HWCONST(C56F, MEM_OP_A, TLB_INVALIDATE_INVAL_SCOPE, NON_LINK_TLBS), MEM_OP_B, 0, MEM_OP_C, HWCONST(C56F, MEM_OP_C, TLB_INVALIDATE_REPLAY, NONE) | @@ -432,12 +453,7 @@ void uvm_hal_ampere_host_tlb_invalidate_test(uvm_push_t *push, HWVALUE(C56F, MEM_OP_D, TLB_INVALIDATE_PDB_ADDR_HI, pdb_hi)); } - if (params->membar == UvmInvalidateTlbMemBarSys) - membar = UVM_MEMBAR_SYS; - else if (params->membar == UvmInvalidateTlbMemBarLocal) - membar = UVM_MEMBAR_GPU; - else - membar = UVM_MEMBAR_NONE; - - uvm_hal_tlb_invalidate_membar(push, membar); + // GPU membar still requires an explicit membar method. + if (params->membar == UvmInvalidateTlbMemBarLocal) + uvm_push_get_gpu(push)->parent->host_hal->membar_gpu(push); } diff --git a/kernel-open/nvidia-uvm/uvm_ampere_mmu.c b/kernel-open/nvidia-uvm/uvm_ampere_mmu.c index 8f35f5a357..80c907a9ff 100644 --- a/kernel-open/nvidia-uvm/uvm_ampere_mmu.c +++ b/kernel-open/nvidia-uvm/uvm_ampere_mmu.c @@ -51,7 +51,7 @@ uvm_mmu_engine_type_t uvm_hal_ampere_mmu_engine_id_to_type(NvU16 mmu_engine_id) return UVM_MMU_ENGINE_TYPE_GRAPHICS; } -static NvU32 page_table_depth_ampere(NvU32 page_size) +static NvU32 page_table_depth_ampere(NvU64 page_size) { // The common-case is page_size == UVM_PAGE_SIZE_2M, hence the first check if (page_size == UVM_PAGE_SIZE_2M) @@ -62,14 +62,14 @@ static NvU32 page_table_depth_ampere(NvU32 page_size) return 4; } -static NvU32 page_sizes_ampere(void) +static NvU64 page_sizes_ampere(void) { return UVM_PAGE_SIZE_512M | UVM_PAGE_SIZE_2M | UVM_PAGE_SIZE_64K | UVM_PAGE_SIZE_4K; } static uvm_mmu_mode_hal_t ampere_mmu_mode_hal; -uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_ampere(NvU32 big_page_size) +uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_ampere(NvU64 big_page_size) { static bool initialized = false; diff --git a/kernel-open/nvidia-uvm/uvm_ats.c b/kernel-open/nvidia-uvm/uvm_ats.c index b4bf46415f..65376f7fcc 100644 --- a/kernel-open/nvidia-uvm/uvm_ats.c +++ b/kernel-open/nvidia-uvm/uvm_ats.c @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2018-2021 NVIDIA Corporation + Copyright (c) 2018-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to diff --git a/kernel-open/nvidia-uvm/uvm_ats.h b/kernel-open/nvidia-uvm/uvm_ats.h index a44eaa4a8c..8a49fd8c94 100644 --- a/kernel-open/nvidia-uvm/uvm_ats.h +++ b/kernel-open/nvidia-uvm/uvm_ats.h @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2018-2021 NVIDIA Corporation + Copyright (c) 2018-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -29,10 +29,9 @@ #include "uvm_ats_ibm.h" #include "nv_uvm_types.h" #include "uvm_lock.h" +#include "uvm_ats_sva.h" - #include "uvm_ats_sva.h" - - #define UVM_ATS_SUPPORTED() (UVM_ATS_IBM_SUPPORTED() || UVM_ATS_SVA_SUPPORTED()) +#define UVM_ATS_SUPPORTED() (UVM_ATS_IBM_SUPPORTED() || UVM_ATS_SVA_SUPPORTED()) typedef struct { diff --git a/kernel-open/nvidia-uvm/uvm_channel.c b/kernel-open/nvidia-uvm/uvm_channel.c index ac8b54ce69..e3267d70dc 100644 --- a/kernel-open/nvidia-uvm/uvm_channel.c +++ b/kernel-open/nvidia-uvm/uvm_channel.c @@ -1541,14 +1541,14 @@ static uvm_gpfifo_entry_t *uvm_channel_get_first_pending_entry(uvm_channel_t *ch NV_STATUS uvm_channel_get_status(uvm_channel_t *channel) { uvm_gpu_t *gpu; - NvNotification *errorNotifier; + NvNotification *error_notifier; if (uvm_channel_is_proxy(channel)) - errorNotifier = channel->proxy.channel_info.shadowErrorNotifier; + error_notifier = channel->proxy.channel_info.shadowErrorNotifier; else - errorNotifier = channel->channel_info.errorNotifier; + error_notifier = channel->channel_info.errorNotifier; - if (errorNotifier->status == 0) + if (error_notifier->status == 0) return NV_OK; // In case we hit a channel error, check the ECC error notifier as well so @@ -2584,16 +2584,18 @@ static NV_STATUS channel_manager_pick_copy_engines(uvm_channel_manager_t *manage // Return the pool corresponding to the given CE index // -// This function cannot be used to access the proxy pool in SR-IOV heavy. +// Used to retrieve pools of type UVM_CHANNEL_POOL_TYPE_CE only. static uvm_channel_pool_t *channel_manager_ce_pool(uvm_channel_manager_t *manager, NvU32 ce) { - uvm_channel_pool_t *pool; + uvm_channel_pool_t *pool = uvm_channel_pool_first(manager, UVM_CHANNEL_POOL_TYPE_CE); + UVM_ASSERT(pool != NULL); UVM_ASSERT(test_bit(ce, manager->ce_mask)); - // The index of the pool associated with 'ce' is the number of usable CEs - // in [0, ce) - pool = manager->channel_pools + bitmap_weight(manager->ce_mask, ce); + // Pools of type UVM_CHANNEL_POOL_TYPE_CE are stored contiguously. The + // offset of the pool associated with 'ce' is the number of usable CEs in + // [0, ce). + pool += bitmap_weight(manager->ce_mask, ce); UVM_ASSERT(pool->pool_type == UVM_CHANNEL_POOL_TYPE_CE); UVM_ASSERT(pool->engine_index == ce); @@ -2811,6 +2813,7 @@ static unsigned channel_manager_get_max_pools(uvm_channel_manager_t *manager) static NV_STATUS channel_manager_create_ce_pools(uvm_channel_manager_t *manager, unsigned *preferred_ce) { unsigned ce; + unsigned type; // A pool is created for each usable CE, even if it has not been selected as // the preferred CE for any type, because as more information is discovered @@ -2818,18 +2821,20 @@ static NV_STATUS channel_manager_create_ce_pools(uvm_channel_manager_t *manager, // previously idle pools. for_each_set_bit(ce, manager->ce_mask, UVM_COPY_ENGINE_COUNT_MAX) { NV_STATUS status; - unsigned type; uvm_channel_pool_t *pool = NULL; status = channel_pool_add(manager, UVM_CHANNEL_POOL_TYPE_CE, ce, &pool); if (status != NV_OK) return status; + } - for (type = 0; type < UVM_CHANNEL_TYPE_CE_COUNT; type++) { - // Set pool type if it hasn't been set before. - if (preferred_ce[type] == ce && manager->pool_to_use.default_for_type[type] == NULL) - manager->pool_to_use.default_for_type[type] = pool; - } + for (type = 0; type < UVM_CHANNEL_TYPE_CE_COUNT; type++) { + // Avoid overwriting previously set defaults. + if (manager->pool_to_use.default_for_type[type] != NULL) + continue; + + ce = preferred_ce[type]; + manager->pool_to_use.default_for_type[type] = channel_manager_ce_pool(manager, ce); } return NV_OK; diff --git a/kernel-open/nvidia-uvm/uvm_gpu.c b/kernel-open/nvidia-uvm/uvm_gpu.c index dfff7e4d8a..db63f72ef2 100644 --- a/kernel-open/nvidia-uvm/uvm_gpu.c +++ b/kernel-open/nvidia-uvm/uvm_gpu.c @@ -218,8 +218,9 @@ static NV_STATUS alloc_and_init_address_space(uvm_gpu_t *gpu) if (status != NV_OK) return status; - gpu->big_page.internal_size = gpu_address_space_info.bigPageSize; + UVM_ASSERT(gpu_address_space_info.bigPageSize <= NV_U32_MAX); + gpu->big_page.internal_size = gpu_address_space_info.bigPageSize; gpu->time.time0_register = gpu_address_space_info.time0Offset; gpu->time.time1_register = gpu_address_space_info.time1Offset; @@ -458,6 +459,7 @@ static const char *uvm_gpu_virt_type_string(UVM_VIRT_MODE virtMode) static const char *uvm_gpu_link_type_string(uvm_gpu_link_type_t link_type) { + BUILD_BUG_ON(UVM_GPU_LINK_MAX != 7); switch (link_type) { @@ -1082,9 +1084,6 @@ static NV_STATUS configure_address_space(uvm_gpu_t *gpu) gpu->parent->rm_va_size, va_per_entry); - UVM_ASSERT(uvm_mmu_page_size_supported(&gpu->address_space_tree, gpu->big_page.internal_size)); - UVM_ASSERT(uvm_mmu_page_size_supported(&gpu->address_space_tree, gpu->mem_info.max_vidmem_page_size)); - tree_alloc = uvm_page_tree_pdb(&gpu->address_space_tree); status = uvm_rm_locked_call(nvUvmInterfaceSetPageDirectory(gpu->rm_address_space, tree_alloc->addr.address, @@ -2364,9 +2363,7 @@ static NV_STATUS init_peer_access(uvm_gpu_t *gpu0, // check for peer-to-peer compatibility (PCI-E or NvLink). peer_caps->link_type = get_gpu_link_type(p2p_caps_params->p2pLink); - if (peer_caps->link_type == UVM_GPU_LINK_INVALID - || peer_caps->link_type == UVM_GPU_LINK_C2C - ) + if (peer_caps->link_type == UVM_GPU_LINK_INVALID || peer_caps->link_type == UVM_GPU_LINK_C2C) return NV_ERR_NOT_SUPPORTED; peer_caps->total_link_line_rate_mbyte_per_s = p2p_caps_params->totalLinkLineRateMBps; @@ -3296,7 +3293,10 @@ void uvm_parent_gpu_dma_free_page(uvm_parent_gpu_t *parent_gpu, void *va, NvU64 atomic64_sub(PAGE_SIZE, &parent_gpu->mapped_cpu_pages_size); } -NV_STATUS uvm_parent_gpu_map_cpu_pages(uvm_parent_gpu_t *parent_gpu, struct page *page, size_t size, NvU64 *dma_address_out) +NV_STATUS uvm_parent_gpu_map_cpu_pages(uvm_parent_gpu_t *parent_gpu, + struct page *page, + size_t size, + NvU64 *dma_address_out) { NvU64 dma_addr; diff --git a/kernel-open/nvidia-uvm/uvm_gpu.h b/kernel-open/nvidia-uvm/uvm_gpu.h index 09335483bd..bffbe53ebc 100644 --- a/kernel-open/nvidia-uvm/uvm_gpu.h +++ b/kernel-open/nvidia-uvm/uvm_gpu.h @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2015-2023 NVIDIA Corporation + Copyright (c) 2015-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to diff --git a/kernel-open/nvidia-uvm/uvm_hal.c b/kernel-open/nvidia-uvm/uvm_hal.c index 84b8d09933..18f2100a49 100644 --- a/kernel-open/nvidia-uvm/uvm_hal.c +++ b/kernel-open/nvidia-uvm/uvm_hal.c @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2015-2023 NVIDIA Corporation + Copyright (c) 2015-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -251,6 +251,9 @@ static uvm_hal_class_ops_t host_table[] = .semaphore_release = uvm_hal_turing_host_semaphore_release, .clear_faulted_channel_method = uvm_hal_turing_host_clear_faulted_channel_method, .set_gpfifo_entry = uvm_hal_turing_host_set_gpfifo_entry, + .tlb_invalidate_all = uvm_hal_turing_host_tlb_invalidate_all, + .tlb_invalidate_va = uvm_hal_turing_host_tlb_invalidate_va, + .tlb_invalidate_test = uvm_hal_turing_host_tlb_invalidate_test, } }, { @@ -632,13 +635,19 @@ NV_STATUS uvm_hal_init_table(void) return status; } - status = ops_init_from_parent(host_table, ARRAY_SIZE(host_table), HOST_OP_COUNT, offsetof(uvm_hal_class_ops_t, u.host_ops)); + status = ops_init_from_parent(host_table, + ARRAY_SIZE(host_table), + HOST_OP_COUNT, + offsetof(uvm_hal_class_ops_t, u.host_ops)); if (status != NV_OK) { UVM_ERR_PRINT("ops_init_from_parent(host_table) failed: %s\n", nvstatusToString(status)); return status; } - status = ops_init_from_parent(arch_table, ARRAY_SIZE(arch_table), ARCH_OP_COUNT, offsetof(uvm_hal_class_ops_t, u.arch_ops)); + status = ops_init_from_parent(arch_table, + ARRAY_SIZE(arch_table), + ARCH_OP_COUNT, + offsetof(uvm_hal_class_ops_t, u.arch_ops)); if (status != NV_OK) { UVM_ERR_PRINT("ops_init_from_parent(arch_table) failed: %s\n", nvstatusToString(status)); return status; @@ -932,14 +941,16 @@ const char *uvm_mmu_engine_type_string(uvm_mmu_engine_type_t mmu_engine_type) void uvm_hal_print_fault_entry(const uvm_fault_buffer_entry_t *entry) { UVM_DBG_PRINT("fault_address: 0x%llx\n", entry->fault_address); - UVM_DBG_PRINT(" fault_instance_ptr: {0x%llx:%s}\n", entry->instance_ptr.address, - uvm_aperture_string(entry->instance_ptr.aperture)); + UVM_DBG_PRINT(" fault_instance_ptr: {0x%llx:%s}\n", + entry->instance_ptr.address, + uvm_aperture_string(entry->instance_ptr.aperture)); UVM_DBG_PRINT(" fault_type: %s\n", uvm_fault_type_string(entry->fault_type)); UVM_DBG_PRINT(" fault_access_type: %s\n", uvm_fault_access_type_string(entry->fault_access_type)); UVM_DBG_PRINT(" is_replayable: %s\n", entry->is_replayable? "true": "false"); UVM_DBG_PRINT(" is_virtual: %s\n", entry->is_virtual? "true": "false"); UVM_DBG_PRINT(" in_protected_mode: %s\n", entry->in_protected_mode? "true": "false"); - UVM_DBG_PRINT(" fault_source.client_type: %s\n", uvm_fault_client_type_string(entry->fault_source.client_type)); + UVM_DBG_PRINT(" fault_source.client_type: %s\n", + uvm_fault_client_type_string(entry->fault_source.client_type)); UVM_DBG_PRINT(" fault_source.client_id: %d\n", entry->fault_source.client_id); UVM_DBG_PRINT(" fault_source.gpc_id: %d\n", entry->fault_source.gpc_id); UVM_DBG_PRINT(" fault_source.mmu_engine_id: %d\n", entry->fault_source.mmu_engine_id); @@ -962,13 +973,15 @@ const char *uvm_access_counter_type_string(uvm_access_counter_type_t access_coun void uvm_hal_print_access_counter_buffer_entry(const uvm_access_counter_buffer_entry_t *entry) { if (!entry->address.is_virtual) { - UVM_DBG_PRINT("physical address: {0x%llx:%s}\n", entry->address.address, - uvm_aperture_string(entry->address.aperture)); + UVM_DBG_PRINT("physical address: {0x%llx:%s}\n", + entry->address.address, + uvm_aperture_string(entry->address.aperture)); } else { UVM_DBG_PRINT("virtual address: 0x%llx\n", entry->address.address); - UVM_DBG_PRINT(" instance_ptr {0x%llx:%s}\n", entry->virtual_info.instance_ptr.address, - uvm_aperture_string(entry->virtual_info.instance_ptr.aperture)); + UVM_DBG_PRINT(" instance_ptr {0x%llx:%s}\n", + entry->virtual_info.instance_ptr.address, + uvm_aperture_string(entry->virtual_info.instance_ptr.aperture)); UVM_DBG_PRINT(" mmu_engine_type %s\n", uvm_mmu_engine_type_string(entry->virtual_info.mmu_engine_type)); UVM_DBG_PRINT(" mmu_engine_id %u\n", entry->virtual_info.mmu_engine_id); UVM_DBG_PRINT(" ve_id %u\n", entry->virtual_info.ve_id); diff --git a/kernel-open/nvidia-uvm/uvm_hal.h b/kernel-open/nvidia-uvm/uvm_hal.h index 0b46caa35a..5c10b3fdf8 100644 --- a/kernel-open/nvidia-uvm/uvm_hal.h +++ b/kernel-open/nvidia-uvm/uvm_hal.h @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2015-2023 NVIDIA Corporation + Copyright (c) 2015-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -112,6 +112,10 @@ void uvm_hal_pascal_host_tlb_invalidate_all(uvm_push_t *push, uvm_gpu_phys_address_t pdb, NvU32 depth, uvm_membar_t membar); +void uvm_hal_turing_host_tlb_invalidate_all(uvm_push_t *push, + uvm_gpu_phys_address_t pdb, + NvU32 depth, + uvm_membar_t membar); void uvm_hal_ampere_host_tlb_invalidate_all(uvm_push_t *push, uvm_gpu_phys_address_t pdb, NvU32 depth, @@ -149,42 +153,49 @@ typedef void (*uvm_hal_host_tlb_invalidate_va_t)(uvm_push_t *push, NvU32 depth, NvU64 base, NvU64 size, - NvU32 page_size, + NvU64 page_size, uvm_membar_t membar); void uvm_hal_maxwell_host_tlb_invalidate_va(uvm_push_t *push, uvm_gpu_phys_address_t pdb, NvU32 depth, NvU64 base, NvU64 size, - NvU32 page_size, + NvU64 page_size, uvm_membar_t membar); void uvm_hal_pascal_host_tlb_invalidate_va(uvm_push_t *push, uvm_gpu_phys_address_t pdb, NvU32 depth, NvU64 base, NvU64 size, - NvU32 page_size, + NvU64 page_size, uvm_membar_t membar); void uvm_hal_volta_host_tlb_invalidate_va(uvm_push_t *push, uvm_gpu_phys_address_t pdb, NvU32 depth, NvU64 base, NvU64 size, - NvU32 page_size, + NvU64 page_size, uvm_membar_t membar); +void uvm_hal_turing_host_tlb_invalidate_va(uvm_push_t *push, + uvm_gpu_phys_address_t pdb, + NvU32 depth, + NvU64 base, + NvU64 size, + NvU64 page_size, + uvm_membar_t membar); void uvm_hal_ampere_host_tlb_invalidate_va(uvm_push_t *push, uvm_gpu_phys_address_t pdb, NvU32 depth, NvU64 base, NvU64 size, - NvU32 page_size, + NvU64 page_size, uvm_membar_t membar); void uvm_hal_hopper_host_tlb_invalidate_va(uvm_push_t *push, uvm_gpu_phys_address_t pdb, NvU32 depth, NvU64 base, NvU64 size, - NvU32 page_size, + NvU64 page_size, uvm_membar_t membar); typedef void (*uvm_hal_host_tlb_invalidate_test_t)(uvm_push_t *push, @@ -196,6 +207,9 @@ void uvm_hal_maxwell_host_tlb_invalidate_test(uvm_push_t *push, void uvm_hal_pascal_host_tlb_invalidate_test(uvm_push_t *push, uvm_gpu_phys_address_t pdb, UVM_TEST_INVALIDATE_TLB_PARAMS *params); +void uvm_hal_turing_host_tlb_invalidate_test(uvm_push_t *push, + uvm_gpu_phys_address_t pdb, + UVM_TEST_INVALIDATE_TLB_PARAMS *params); void uvm_hal_ampere_host_tlb_invalidate_test(uvm_push_t *push, uvm_gpu_phys_address_t pdb, UVM_TEST_INVALIDATE_TLB_PARAMS *params); @@ -445,15 +459,15 @@ void uvm_hal_ada_arch_init_properties(uvm_parent_gpu_t *parent_gpu); void uvm_hal_hopper_arch_init_properties(uvm_parent_gpu_t *parent_gpu); // Retrieve the page-tree HAL for a given big page size -typedef uvm_mmu_mode_hal_t *(*uvm_hal_lookup_mode_hal_t)(NvU32 big_page_size); +typedef uvm_mmu_mode_hal_t *(*uvm_hal_lookup_mode_hal_t)(NvU64 big_page_size); typedef void (*uvm_hal_mmu_enable_prefetch_faults_t)(uvm_parent_gpu_t *parent_gpu); typedef void (*uvm_hal_mmu_disable_prefetch_faults_t)(uvm_parent_gpu_t *parent_gpu); -uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_maxwell(NvU32 big_page_size); -uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_pascal(NvU32 big_page_size); -uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_volta(NvU32 big_page_size); -uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_turing(NvU32 big_page_size); -uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_ampere(NvU32 big_page_size); -uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_hopper(NvU32 big_page_size); +uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_maxwell(NvU64 big_page_size); +uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_pascal(NvU64 big_page_size); +uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_volta(NvU64 big_page_size); +uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_turing(NvU64 big_page_size); +uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_ampere(NvU64 big_page_size); +uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_hopper(NvU64 big_page_size); void uvm_hal_maxwell_mmu_enable_prefetch_faults_unsupported(uvm_parent_gpu_t *parent_gpu); void uvm_hal_maxwell_mmu_disable_prefetch_faults_unsupported(uvm_parent_gpu_t *parent_gpu); void uvm_hal_pascal_mmu_enable_prefetch_faults(uvm_parent_gpu_t *parent_gpu); diff --git a/kernel-open/nvidia-uvm/uvm_hmm.c b/kernel-open/nvidia-uvm/uvm_hmm.c index 5060e6ca59..41f3af7b26 100644 --- a/kernel-open/nvidia-uvm/uvm_hmm.c +++ b/kernel-open/nvidia-uvm/uvm_hmm.c @@ -1599,7 +1599,7 @@ static void hmm_va_block_cpu_unpopulate_chunk(uvm_va_block_t *va_block, UVM_ASSERT(uvm_cpu_chunk_get_size(chunk) == PAGE_SIZE); uvm_cpu_chunk_remove_from_block(va_block, chunk_nid, page_index); - uvm_va_block_unmap_cpu_chunk_on_gpus(va_block, chunk, page_index); + uvm_va_block_unmap_cpu_chunk_on_gpus(va_block, chunk); uvm_cpu_chunk_free(chunk); } diff --git a/kernel-open/nvidia-uvm/uvm_hopper_host.c b/kernel-open/nvidia-uvm/uvm_hopper_host.c index 7fd2e4ca02..9b59bccee9 100644 --- a/kernel-open/nvidia-uvm/uvm_hopper_host.c +++ b/kernel-open/nvidia-uvm/uvm_hopper_host.c @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2020-2022 NVIDIA Corporation + Copyright (c) 2020-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -157,6 +157,7 @@ void uvm_hal_hopper_host_tlb_invalidate_all(uvm_push_t *push, NvU32 pdb_lo; NvU32 pdb_hi; NvU32 ack_value = 0; + NvU32 sysmembar_value = 0; UVM_ASSERT_MSG(pdb.aperture == UVM_APERTURE_VID || pdb.aperture == UVM_APERTURE_SYS, "aperture: %u", pdb.aperture); @@ -183,7 +184,12 @@ void uvm_hal_hopper_host_tlb_invalidate_all(uvm_push_t *push, ack_value = HWCONST(C86F, MEM_OP_C, TLB_INVALIDATE_ACK_TYPE, GLOBALLY); } - NV_PUSH_4U(C86F, MEM_OP_A, HWCONST(C86F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, DIS) | + if (membar == UVM_MEMBAR_SYS) + sysmembar_value = HWCONST(C86F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, EN); + else + sysmembar_value = HWCONST(C86F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, DIS); + + NV_PUSH_4U(C86F, MEM_OP_A, sysmembar_value | HWCONST(C86F, MEM_OP_A, TLB_INVALIDATE_INVAL_SCOPE, NON_LINK_TLBS), MEM_OP_B, 0, MEM_OP_C, HWCONST(C86F, MEM_OP_C, TLB_INVALIDATE_PDB, ONE) | @@ -196,7 +202,9 @@ void uvm_hal_hopper_host_tlb_invalidate_all(uvm_push_t *push, MEM_OP_D, HWCONST(C86F, MEM_OP_D, OPERATION, MMU_TLB_INVALIDATE) | HWVALUE(C86F, MEM_OP_D, TLB_INVALIDATE_PDB_ADDR_HI, pdb_hi)); - uvm_hal_tlb_invalidate_membar(push, membar); + // GPU membar still requires an explicit membar method. + if (membar == UVM_MEMBAR_GPU) + uvm_push_get_gpu(push)->parent->host_hal->membar_gpu(push); } void uvm_hal_hopper_host_tlb_invalidate_va(uvm_push_t *push, @@ -204,7 +212,7 @@ void uvm_hal_hopper_host_tlb_invalidate_va(uvm_push_t *push, NvU32 depth, NvU64 base, NvU64 size, - NvU32 page_size, + NvU64 page_size, uvm_membar_t membar) { NvU32 aperture_value; @@ -212,6 +220,7 @@ void uvm_hal_hopper_host_tlb_invalidate_va(uvm_push_t *push, NvU32 pdb_lo; NvU32 pdb_hi; NvU32 ack_value = 0; + NvU32 sysmembar_value = 0; NvU32 va_lo; NvU32 va_hi; NvU64 end; @@ -221,9 +230,9 @@ void uvm_hal_hopper_host_tlb_invalidate_va(uvm_push_t *push, NvU32 log2_invalidation_size; uvm_gpu_t *gpu = uvm_push_get_gpu(push); - UVM_ASSERT_MSG(IS_ALIGNED(page_size, 1 << 12), "page_size 0x%x\n", page_size); - UVM_ASSERT_MSG(IS_ALIGNED(base, page_size), "base 0x%llx page_size 0x%x\n", base, page_size); - UVM_ASSERT_MSG(IS_ALIGNED(size, page_size), "size 0x%llx page_size 0x%x\n", size, page_size); + UVM_ASSERT_MSG(IS_ALIGNED(page_size, 1 << 12), "page_size 0x%llx\n", page_size); + UVM_ASSERT_MSG(IS_ALIGNED(base, page_size), "base 0x%llx page_size 0x%llx\n", base, page_size); + UVM_ASSERT_MSG(IS_ALIGNED(size, page_size), "size 0x%llx page_size 0x%llx\n", size, page_size); UVM_ASSERT_MSG(size > 0, "size 0x%llx\n", size); // The invalidation size must be a power-of-two number of pages containing @@ -277,8 +286,13 @@ void uvm_hal_hopper_host_tlb_invalidate_va(uvm_push_t *push, ack_value = HWCONST(C86F, MEM_OP_C, TLB_INVALIDATE_ACK_TYPE, GLOBALLY); } + if (membar == UVM_MEMBAR_SYS) + sysmembar_value = HWCONST(C86F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, EN); + else + sysmembar_value = HWCONST(C86F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, DIS); + NV_PUSH_4U(C86F, MEM_OP_A, HWVALUE(C86F, MEM_OP_A, TLB_INVALIDATE_INVALIDATION_SIZE, log2_invalidation_size) | - HWCONST(C86F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, DIS) | + sysmembar_value | HWCONST(C86F, MEM_OP_A, TLB_INVALIDATE_INVAL_SCOPE, NON_LINK_TLBS) | HWVALUE(C86F, MEM_OP_A, TLB_INVALIDATE_TARGET_ADDR_LO, va_lo), MEM_OP_B, HWVALUE(C86F, MEM_OP_B, TLB_INVALIDATE_TARGET_ADDR_HI, va_hi), @@ -292,7 +306,9 @@ void uvm_hal_hopper_host_tlb_invalidate_va(uvm_push_t *push, MEM_OP_D, HWCONST(C86F, MEM_OP_D, OPERATION, MMU_TLB_INVALIDATE_TARGETED) | HWVALUE(C86F, MEM_OP_D, TLB_INVALIDATE_PDB_ADDR_HI, pdb_hi)); - uvm_hal_tlb_invalidate_membar(push, membar); + // GPU membar still requires an explicit membar method. + if (membar == UVM_MEMBAR_GPU) + gpu->parent->host_hal->membar_gpu(push); } void uvm_hal_hopper_host_tlb_invalidate_test(uvm_push_t *push, @@ -300,12 +316,12 @@ void uvm_hal_hopper_host_tlb_invalidate_test(uvm_push_t *push, UVM_TEST_INVALIDATE_TLB_PARAMS *params) { NvU32 ack_value = 0; + NvU32 sysmembar_value = 0; NvU32 invalidate_gpc_value = 0; NvU32 aperture_value = 0; NvU32 pdb_lo = 0; NvU32 pdb_hi = 0; NvU32 page_table_level = 0; - uvm_membar_t membar; UVM_ASSERT_MSG(pdb.aperture == UVM_APERTURE_VID || pdb.aperture == UVM_APERTURE_SYS, "aperture: %u", pdb.aperture); if (pdb.aperture == UVM_APERTURE_VID) @@ -332,6 +348,11 @@ void uvm_hal_hopper_host_tlb_invalidate_test(uvm_push_t *push, ack_value = HWCONST(C86F, MEM_OP_C, TLB_INVALIDATE_ACK_TYPE, GLOBALLY); } + if (params->membar == UvmInvalidateTlbMemBarSys) + sysmembar_value = HWCONST(C86F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, EN); + else + sysmembar_value = HWCONST(C86F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, DIS); + if (params->disable_gpc_invalidate) invalidate_gpc_value = HWCONST(C86F, MEM_OP_C, TLB_INVALIDATE_GPC, DISABLE); else @@ -343,7 +364,7 @@ void uvm_hal_hopper_host_tlb_invalidate_test(uvm_push_t *push, NvU32 va_lo = va & HWMASK(C86F, MEM_OP_A, TLB_INVALIDATE_TARGET_ADDR_LO); NvU32 va_hi = va >> HWSIZE(C86F, MEM_OP_A, TLB_INVALIDATE_TARGET_ADDR_LO); - NV_PUSH_4U(C86F, MEM_OP_A, HWCONST(C86F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, DIS) | + NV_PUSH_4U(C86F, MEM_OP_A, sysmembar_value | HWCONST(C86F, MEM_OP_A, TLB_INVALIDATE_INVAL_SCOPE, NON_LINK_TLBS) | HWVALUE(C86F, MEM_OP_A, TLB_INVALIDATE_TARGET_ADDR_LO, va_lo), MEM_OP_B, HWVALUE(C86F, MEM_OP_B, TLB_INVALIDATE_TARGET_ADDR_HI, va_hi), @@ -358,7 +379,7 @@ void uvm_hal_hopper_host_tlb_invalidate_test(uvm_push_t *push, HWVALUE(C86F, MEM_OP_D, TLB_INVALIDATE_PDB_ADDR_HI, pdb_hi)); } else { - NV_PUSH_4U(C86F, MEM_OP_A, HWCONST(C86F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, DIS) | + NV_PUSH_4U(C86F, MEM_OP_A, sysmembar_value | HWCONST(C86F, MEM_OP_A, TLB_INVALIDATE_INVAL_SCOPE, NON_LINK_TLBS), MEM_OP_B, 0, MEM_OP_C, HWCONST(C86F, MEM_OP_C, TLB_INVALIDATE_REPLAY, NONE) | @@ -372,14 +393,9 @@ void uvm_hal_hopper_host_tlb_invalidate_test(uvm_push_t *push, HWVALUE(C86F, MEM_OP_D, TLB_INVALIDATE_PDB_ADDR_HI, pdb_hi)); } - if (params->membar == UvmInvalidateTlbMemBarSys) - membar = UVM_MEMBAR_SYS; - else if (params->membar == UvmInvalidateTlbMemBarLocal) - membar = UVM_MEMBAR_GPU; - else - membar = UVM_MEMBAR_NONE; - - uvm_hal_tlb_invalidate_membar(push, membar); + // GPU membar still requires an explicit membar method. + if (params->membar == UvmInvalidateTlbMemBarLocal) + uvm_push_get_gpu(push)->parent->host_hal->membar_gpu(push); } void uvm_hal_hopper_host_set_gpfifo_pushbuffer_segment_base(NvU64 *fifo_entry, NvU64 pushbuffer_va) diff --git a/kernel-open/nvidia-uvm/uvm_hopper_mmu.c b/kernel-open/nvidia-uvm/uvm_hopper_mmu.c index 025343d25b..7b512698f5 100644 --- a/kernel-open/nvidia-uvm/uvm_hopper_mmu.c +++ b/kernel-open/nvidia-uvm/uvm_hopper_mmu.c @@ -61,7 +61,7 @@ uvm_mmu_engine_type_t uvm_hal_hopper_mmu_engine_id_to_type(NvU16 mmu_engine_id) return UVM_MMU_ENGINE_TYPE_GRAPHICS; } -static NvU32 page_table_depth_hopper(NvU32 page_size) +static NvU32 page_table_depth_hopper(NvU64 page_size) { // The common-case is page_size == UVM_PAGE_SIZE_2M, hence the first check if (page_size == UVM_PAGE_SIZE_2M) @@ -79,7 +79,7 @@ static NvU32 entries_per_index_hopper(NvU32 depth) return 1; } -static NvLength entry_offset_hopper(NvU32 depth, NvU32 page_size) +static NvLength entry_offset_hopper(NvU32 depth, NvU64 page_size) { UVM_ASSERT(depth < 6); if ((page_size == UVM_PAGE_SIZE_4K) && (depth == 4)) @@ -92,7 +92,7 @@ static NvLength entry_size_hopper(NvU32 depth) return entries_per_index_hopper(depth) * 8; } -static NvU32 index_bits_hopper(NvU32 depth, NvU32 page_size) +static NvU32 index_bits_hopper(NvU32 depth, NvU64 page_size) { static const NvU32 bit_widths[] = {1, 9, 9, 9, 8}; @@ -120,7 +120,7 @@ static NvU32 num_va_bits_hopper(void) return 57; } -static NvLength allocation_size_hopper(NvU32 depth, NvU32 page_size) +static NvLength allocation_size_hopper(NvU32 depth, NvU64 page_size) { UVM_ASSERT(depth < 6); if (depth == 5 && page_size == UVM_PAGE_SIZE_64K) @@ -233,7 +233,7 @@ static NvU64 make_sparse_pte_hopper(void) HWCONST64(_MMU_VER3, PTE, PCF, SPARSE); } -static NvU64 unmapped_pte_hopper(NvU32 page_size) +static NvU64 unmapped_pte_hopper(NvU64 page_size) { // Setting PCF to NO_VALID_4KB_PAGE on an otherwise-zeroed big PTE causes // the corresponding 4k PTEs to be ignored. This allows the invalidation of @@ -490,7 +490,7 @@ static void make_pde_hopper(void *entry, static uvm_mmu_mode_hal_t hopper_mmu_mode_hal; -uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_hopper(NvU32 big_page_size) +uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_hopper(NvU64 big_page_size) { static bool initialized = false; diff --git a/kernel-open/nvidia-uvm/uvm_ioctl.h b/kernel-open/nvidia-uvm/uvm_ioctl.h index caf426c7f1..42a7ec843d 100644 --- a/kernel-open/nvidia-uvm/uvm_ioctl.h +++ b/kernel-open/nvidia-uvm/uvm_ioctl.h @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2013-2023 NVidia Corporation + Copyright (c) 2013-2024 NVidia Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -494,7 +494,7 @@ typedef struct NvU64 base NV_ALIGN_BYTES(8); // IN NvU64 length NV_ALIGN_BYTES(8); // IN NvU64 offset NV_ALIGN_BYTES(8); // IN - UvmGpuMappingAttributes perGpuAttributes[UVM_MAX_GPUS_V2]; // IN + UvmGpuMappingAttributes perGpuAttributes[UVM_MAX_GPUS]; // IN NvU64 gpuAttributesCount NV_ALIGN_BYTES(8); // IN NvS32 rmCtrlFd; // IN NvU32 hClient; // IN @@ -952,7 +952,6 @@ typedef struct NvU32 version; // OUT } UVM_TOOLS_GET_PROCESSOR_UUID_TABLE_PARAMS; - // // UvmMapDynamicParallelismRegion // @@ -995,7 +994,7 @@ typedef struct { NvU64 base NV_ALIGN_BYTES(8); // IN NvU64 length NV_ALIGN_BYTES(8); // IN - UvmGpuMappingAttributes perGpuAttributes[UVM_MAX_GPUS_V2]; // IN + UvmGpuMappingAttributes perGpuAttributes[UVM_MAX_GPUS]; // IN NvU64 gpuAttributesCount NV_ALIGN_BYTES(8); // IN NV_STATUS rmStatus; // OUT } UVM_ALLOC_SEMAPHORE_POOL_PARAMS; diff --git a/kernel-open/nvidia-uvm/uvm_map_external.c b/kernel-open/nvidia-uvm/uvm_map_external.c index 99c84134b4..a57c98997b 100644 --- a/kernel-open/nvidia-uvm/uvm_map_external.c +++ b/kernel-open/nvidia-uvm/uvm_map_external.c @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2016-2023 NVIDIA Corporation + Copyright (c) 2016-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -39,6 +39,7 @@ #include "uvm_pte_batch.h" #include "uvm_tlb_batch.h" #include "nv_uvm_interface.h" +#include "nv_uvm_types.h" #include "uvm_pushbuffer.h" @@ -60,7 +61,7 @@ typedef struct size_t buffer_size; // Page size in bytes - NvU32 page_size; + NvU64 page_size; // Size of a single PTE in bytes NvU32 pte_size; @@ -90,7 +91,7 @@ static NV_STATUS uvm_pte_buffer_init(uvm_va_range_t *va_range, uvm_gpu_t *gpu, const uvm_map_rm_params_t *map_rm_params, NvU64 length, - NvU32 page_size, + NvU64 page_size, uvm_pte_buffer_t *pte_buffer) { uvm_gpu_va_space_t *gpu_va_space = uvm_gpu_va_space_get(va_range->va_space, gpu); @@ -101,11 +102,11 @@ static NV_STATUS uvm_pte_buffer_init(uvm_va_range_t *va_range, pte_buffer->va_range = va_range; pte_buffer->gpu = gpu; - pte_buffer->mapping_info.cachingType = map_rm_params->caching_type; - pte_buffer->mapping_info.mappingType = map_rm_params->mapping_type; - pte_buffer->mapping_info.formatType = map_rm_params->format_type; - pte_buffer->mapping_info.elementBits = map_rm_params->element_bits; - pte_buffer->mapping_info.compressionType = map_rm_params->compression_type; + pte_buffer->mapping_info.cachingType = (UvmRmGpuCachingType) map_rm_params->caching_type; + pte_buffer->mapping_info.mappingType = (UvmRmGpuMappingType) map_rm_params->mapping_type; + pte_buffer->mapping_info.formatType = (UvmRmGpuFormatType) map_rm_params->format_type; + pte_buffer->mapping_info.elementBits = (UvmRmGpuFormatElementBits) map_rm_params->element_bits; + pte_buffer->mapping_info.compressionType = (UvmRmGpuCompressionType) map_rm_params->compression_type; if (va_range->type == UVM_VA_RANGE_TYPE_EXTERNAL) pte_buffer->mapping_info.mappingPageSize = page_size; @@ -649,9 +650,7 @@ static NV_STATUS set_ext_gpu_map_location(uvm_ext_gpu_map_t *ext_gpu_map, return NV_OK; } // This is a local or peer allocation, so the owning GPU must have been - // registered. - // This also checks for if EGM owning GPU is registered. - + // registered. This also checks for if EGM owning GPU is registered. owning_gpu = uvm_va_space_get_gpu_by_uuid(va_space, &mem_info->uuid); if (!owning_gpu) return NV_ERR_INVALID_DEVICE; @@ -664,7 +663,6 @@ static NV_STATUS set_ext_gpu_map_location(uvm_ext_gpu_map_t *ext_gpu_map, // semantics of sysmem allocations. // Check if peer access for peer memory is enabled. - // This path also handles EGM allocations. if (owning_gpu != mapping_gpu && (!mem_info->sysmem || mem_info->egm)) { // TODO: Bug 1757136: In SLI, the returned UUID may be different but a // local mapping must be used. We need to query SLI groups to know @@ -855,9 +853,10 @@ static NV_STATUS uvm_map_external_allocation_on_gpu(uvm_va_range_t *va_range, uvm_ext_gpu_range_tree_t *range_tree = uvm_ext_gpu_range_tree(va_range, mapping_gpu); UvmGpuMemoryInfo mem_info; uvm_gpu_va_space_t *gpu_va_space = uvm_gpu_va_space_get(va_space, mapping_gpu); - NvU32 mapping_page_size; + NvU64 mapping_page_size; + NvU64 biggest_mapping_page_size; NvU64 alignments; - NvU32 smallest_alignment; + NvU64 smallest_alignment; NV_STATUS status; uvm_assert_rwsem_locked_read(&va_space->lock); @@ -946,9 +945,11 @@ static NV_STATUS uvm_map_external_allocation_on_gpu(uvm_va_range_t *va_range, // Check for the maximum page size for the mapping of vidmem allocations, // the vMMU segment size may limit the range of page sizes. + biggest_mapping_page_size = uvm_mmu_biggest_page_size_up_to(&gpu_va_space->page_tables, + mapping_gpu->mem_info.max_vidmem_page_size); if (!ext_gpu_map->is_sysmem && (ext_gpu_map->gpu == ext_gpu_map->owning_gpu) && - (mapping_page_size > mapping_gpu->mem_info.max_vidmem_page_size)) - mapping_page_size = mapping_gpu->mem_info.max_vidmem_page_size; + (mapping_page_size > biggest_mapping_page_size)) + mapping_page_size = biggest_mapping_page_size; mem_info.pageSize = mapping_page_size; @@ -985,7 +986,7 @@ static NV_STATUS uvm_map_external_allocation(uvm_va_space_t *va_space, UVM_MAP_E if (uvm_api_range_invalid_4k(params->base, params->length)) return NV_ERR_INVALID_ADDRESS; - if (params->gpuAttributesCount == 0 || params->gpuAttributesCount > UVM_MAX_GPUS_V2) + if (params->gpuAttributesCount == 0 || params->gpuAttributesCount > UVM_MAX_GPUS) return NV_ERR_INVALID_ARGUMENT; mapped_gpus = uvm_processor_mask_cache_alloc(); diff --git a/kernel-open/nvidia-uvm/uvm_maxwell_host.c b/kernel-open/nvidia-uvm/uvm_maxwell_host.c index e8f47ec311..7073271521 100644 --- a/kernel-open/nvidia-uvm/uvm_maxwell_host.c +++ b/kernel-open/nvidia-uvm/uvm_maxwell_host.c @@ -108,7 +108,7 @@ void uvm_hal_maxwell_host_tlb_invalidate_va(uvm_push_t *push, NvU32 depth, NvU64 base, NvU64 size, - NvU32 page_size, + NvU64 page_size, uvm_membar_t membar) { // No per VA invalidate on Maxwell, redirect to invalidate all. diff --git a/kernel-open/nvidia-uvm/uvm_maxwell_mmu.c b/kernel-open/nvidia-uvm/uvm_maxwell_mmu.c index d2107844d0..2698a522b0 100644 --- a/kernel-open/nvidia-uvm/uvm_maxwell_mmu.c +++ b/kernel-open/nvidia-uvm/uvm_maxwell_mmu.c @@ -52,7 +52,7 @@ static NvU32 entries_per_index_maxwell(NvU32 depth) return 1; } -static NvLength entry_offset_maxwell(NvU32 depth, NvU32 page_size) +static NvLength entry_offset_maxwell(NvU32 depth, NvU64 page_size) { UVM_ASSERT(depth < 2); if (page_size == UVM_PAGE_SIZE_4K && depth == 0) @@ -128,7 +128,7 @@ static NvLength entry_size_maxwell(NvU32 depth) return 8; } -static NvU32 index_bits_maxwell_64(NvU32 depth, NvU32 page_size) +static NvU32 index_bits_maxwell_64(NvU32 depth, NvU64 page_size) { UVM_ASSERT(depth < 2); UVM_ASSERT(page_size == UVM_PAGE_SIZE_4K || @@ -146,7 +146,7 @@ static NvU32 index_bits_maxwell_64(NvU32 depth, NvU32 page_size) } } -static NvU32 index_bits_maxwell_128(NvU32 depth, NvU32 page_size) +static NvU32 index_bits_maxwell_128(NvU32 depth, NvU64 page_size) { UVM_ASSERT(depth < 2); UVM_ASSERT(page_size == UVM_PAGE_SIZE_4K || @@ -169,32 +169,32 @@ static NvU32 num_va_bits_maxwell(void) return 40; } -static NvLength allocation_size_maxwell_64(NvU32 depth, NvU32 page_size) +static NvLength allocation_size_maxwell_64(NvU32 depth, NvU64 page_size) { return entry_size_maxwell(depth) << index_bits_maxwell_64(depth, page_size); } -static NvLength allocation_size_maxwell_128(NvU32 depth, NvU32 page_size) +static NvLength allocation_size_maxwell_128(NvU32 depth, NvU64 page_size) { return entry_size_maxwell(depth) << index_bits_maxwell_128(depth, page_size); } -static NvU32 page_table_depth_maxwell(NvU32 page_size) +static NvU32 page_table_depth_maxwell(NvU64 page_size) { return 1; } -static NvU32 page_sizes_maxwell_128(void) +static NvU64 page_sizes_maxwell_128(void) { return UVM_PAGE_SIZE_128K | UVM_PAGE_SIZE_4K; } -static NvU32 page_sizes_maxwell_64(void) +static NvU64 page_sizes_maxwell_64(void) { return UVM_PAGE_SIZE_64K | UVM_PAGE_SIZE_4K; } -static NvU64 unmapped_pte_maxwell(NvU32 page_size) +static NvU64 unmapped_pte_maxwell(NvU64 page_size) { // Setting the privilege bit on an otherwise-zeroed big PTE causes the // corresponding 4k PTEs to be ignored. This allows the invalidation of a @@ -356,7 +356,7 @@ static uvm_mmu_mode_hal_t maxwell_128_mmu_mode_hal = .page_sizes = page_sizes_maxwell_128 }; -uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_maxwell(NvU32 big_page_size) +uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_maxwell(NvU64 big_page_size) { UVM_ASSERT(big_page_size == UVM_PAGE_SIZE_64K || big_page_size == UVM_PAGE_SIZE_128K); if (big_page_size == UVM_PAGE_SIZE_64K) diff --git a/kernel-open/nvidia-uvm/uvm_mem.c b/kernel-open/nvidia-uvm/uvm_mem.c index b80af4fa83..e85b30d4d1 100644 --- a/kernel-open/nvidia-uvm/uvm_mem.c +++ b/kernel-open/nvidia-uvm/uvm_mem.c @@ -290,15 +290,15 @@ uvm_chunk_sizes_mask_t uvm_mem_kernel_chunk_sizes(uvm_gpu_t *gpu) // Get the mmu mode hal directly as the internal address space tree has not // been created yet. uvm_mmu_mode_hal_t *hal = gpu->parent->arch_hal->mmu_mode_hal(gpu->big_page.internal_size); - NvU32 page_sizes = hal->page_sizes(); + NvU64 page_sizes = hal->page_sizes(); return (uvm_chunk_sizes_mask_t)(page_sizes & UVM_CHUNK_SIZES_MASK); } -static NvU32 mem_pick_chunk_size(uvm_mem_t *mem) +static NvU64 mem_pick_chunk_size(uvm_mem_t *mem) { - NvU32 biggest_page_size; - NvU32 chunk_size; + NvU64 biggest_page_size; + NvU64 chunk_size; if (uvm_mem_is_sysmem(mem)) return PAGE_SIZE; @@ -315,12 +315,12 @@ static NvU32 mem_pick_chunk_size(uvm_mem_t *mem) // When UVM_PAGE_SIZE_DEFAULT is used on NUMA-enabled GPUs, we force // chunk_size to be PAGE_SIZE at least, to allow CPU mappings. if (mem->backing_gpu->mem_info.numa.enabled) - chunk_size = max(chunk_size, (NvU32)PAGE_SIZE); + chunk_size = max(chunk_size, (NvU64)PAGE_SIZE); return chunk_size; } -static NvU32 mem_pick_gpu_page_size(uvm_mem_t *mem, uvm_gpu_t *gpu, uvm_page_tree_t *gpu_page_tree) +static NvU64 mem_pick_gpu_page_size(uvm_mem_t *mem, uvm_gpu_t *gpu, uvm_page_tree_t *gpu_page_tree) { if (uvm_mem_is_vidmem(mem)) { // For vidmem allocations the chunk size is picked out of the supported @@ -467,7 +467,7 @@ static NV_STATUS mem_alloc_sysmem_dma_chunks(uvm_mem_t *mem, gfp_t gfp_flags) NvU64 *dma_addrs; UVM_ASSERT_MSG(mem->chunk_size == PAGE_SIZE, - "mem->chunk_size is 0x%x. PAGE_SIZE is only supported.", + "mem->chunk_size is 0x%llx. PAGE_SIZE is only supported.", mem->chunk_size); UVM_ASSERT(uvm_mem_is_sysmem_dma(mem)); @@ -528,10 +528,9 @@ static NV_STATUS mem_alloc_sysmem_chunks(uvm_mem_t *mem, gfp_t gfp_flags) // In case of failure, the caller is required to handle cleanup by calling // uvm_mem_free -static NV_STATUS mem_alloc_vidmem_chunks(uvm_mem_t *mem, bool zero, bool is_unprotected) +static NV_STATUS mem_alloc_vidmem_chunks(uvm_mem_t *mem, bool zero) { NV_STATUS status; - uvm_pmm_gpu_memory_type_t mem_type; UVM_ASSERT(uvm_mem_is_vidmem(mem)); @@ -548,23 +547,15 @@ static NV_STATUS mem_alloc_vidmem_chunks(uvm_mem_t *mem, bool zero, bool is_unpr if (!mem->vidmem.chunks) return NV_ERR_NO_MEMORY; - // When CC is disabled the behavior is identical to that of PMM, and the - // protection flag is ignored (squashed by PMM internally). - if (is_unprotected) - mem_type = UVM_PMM_GPU_MEMORY_TYPE_KERNEL_UNPROTECTED; - else - mem_type = UVM_PMM_GPU_MEMORY_TYPE_KERNEL_PROTECTED; - - status = uvm_pmm_gpu_alloc(&mem->backing_gpu->pmm, - mem->chunks_count, - mem->chunk_size, - mem_type, - UVM_PMM_ALLOC_FLAGS_NONE, - mem->vidmem.chunks, - NULL); + status = uvm_pmm_gpu_alloc_kernel(&mem->backing_gpu->pmm, + mem->chunks_count, + mem->chunk_size, + UVM_PMM_ALLOC_FLAGS_NONE, + mem->vidmem.chunks, + NULL); if (status != NV_OK) { - UVM_ERR_PRINT("uvm_pmm_gpu_alloc (count=%zd, size=0x%x) failed: %s\n", + UVM_ERR_PRINT("uvm_pmm_gpu_alloc_kernel (count=%zd, size=0x%llx) failed: %s\n", mem->chunks_count, mem->chunk_size, nvstatusToString(status)); @@ -574,7 +565,7 @@ static NV_STATUS mem_alloc_vidmem_chunks(uvm_mem_t *mem, bool zero, bool is_unpr return NV_OK; } -static NV_STATUS mem_alloc_chunks(uvm_mem_t *mem, struct mm_struct *mm, bool zero, bool is_unprotected) +static NV_STATUS mem_alloc_chunks(uvm_mem_t *mem, struct mm_struct *mm, bool zero) { if (uvm_mem_is_sysmem(mem)) { gfp_t gfp_flags; @@ -596,7 +587,7 @@ static NV_STATUS mem_alloc_chunks(uvm_mem_t *mem, struct mm_struct *mm, bool zer return status; } - return mem_alloc_vidmem_chunks(mem, zero, is_unprotected); + return mem_alloc_vidmem_chunks(mem, zero); } NV_STATUS uvm_mem_map_kernel(uvm_mem_t *mem, const uvm_processor_mask_t *mask) @@ -626,7 +617,6 @@ NV_STATUS uvm_mem_alloc(const uvm_mem_alloc_params_t *params, uvm_mem_t **mem_ou NV_STATUS status; NvU64 physical_size; uvm_mem_t *mem = NULL; - bool is_unprotected = false; UVM_ASSERT(params->size > 0); @@ -648,12 +638,7 @@ NV_STATUS uvm_mem_alloc(const uvm_mem_alloc_params_t *params, uvm_mem_t **mem_ou physical_size = UVM_ALIGN_UP(mem->size, mem->chunk_size); mem->chunks_count = physical_size / mem->chunk_size; - if (params->is_unprotected) - UVM_ASSERT(uvm_mem_is_vidmem(mem)); - - is_unprotected = params->is_unprotected; - - status = mem_alloc_chunks(mem, params->mm, params->zero, is_unprotected); + status = mem_alloc_chunks(mem, params->mm, params->zero); if (status != NV_OK) goto error; @@ -1050,7 +1035,7 @@ static NV_STATUS mem_map_gpu(uvm_mem_t *mem, uvm_page_table_range_vec_t **range_vec) { NV_STATUS status; - NvU32 page_size; + NvU64 page_size; uvm_pmm_alloc_flags_t pmm_flags = UVM_PMM_ALLOC_FLAGS_EVICT; uvm_mem_pte_maker_data_t pte_maker_data = { @@ -1059,7 +1044,7 @@ static NV_STATUS mem_map_gpu(uvm_mem_t *mem, }; page_size = mem_pick_gpu_page_size(mem, gpu, tree); - UVM_ASSERT_MSG(uvm_mmu_page_size_supported(tree, page_size), "page_size 0x%x\n", page_size); + UVM_ASSERT_MSG(uvm_mmu_page_size_supported(tree, page_size), "page_size 0x%llx\n", page_size); // When the Confidential Computing feature is enabled, DMA allocations are // majoritarily allocated and managed by a per-GPU DMA buffer pool diff --git a/kernel-open/nvidia-uvm/uvm_mem.h b/kernel-open/nvidia-uvm/uvm_mem.h index 65e37ef811..0475a9fb95 100644 --- a/kernel-open/nvidia-uvm/uvm_mem.h +++ b/kernel-open/nvidia-uvm/uvm_mem.h @@ -126,12 +126,7 @@ typedef struct // // CPU mappings will always use PAGE_SIZE, so the physical allocation chunk // has to be aligned to PAGE_SIZE. - NvU32 page_size; - - // The protection flag is only observed for vidmem allocations when CC is - // enabled. If set to true, the allocation returns unprotected vidmem; - // otherwise, the allocation returns protected vidmem. - bool is_unprotected; + NvU64 page_size; // If true, the allocation is zeroed (scrubbed). bool zero; @@ -199,7 +194,7 @@ struct uvm_mem_struct size_t chunks_count; // Size of each physical chunk (vidmem) or CPU page (sysmem) - NvU32 chunk_size; + NvU64 chunk_size; // Size of the allocation NvU64 size; diff --git a/kernel-open/nvidia-uvm/uvm_mem_test.c b/kernel-open/nvidia-uvm/uvm_mem_test.c index 0c3d6d2894..d3e61bc996 100644 --- a/kernel-open/nvidia-uvm/uvm_mem_test.c +++ b/kernel-open/nvidia-uvm/uvm_mem_test.c @@ -153,7 +153,7 @@ static NV_STATUS check_accessible_from_gpu(uvm_gpu_t *gpu, uvm_mem_t *mem) for (i = 0; i < verif_size / sizeof(*sys_verif); ++i) { if (sys_verif[i] != mem->size + i) { - UVM_TEST_PRINT("Verif failed for %zd = 0x%llx instead of 0x%llx, verif_size=0x%llx mem(size=0x%llx, page_size=%u, processor=%u)\n", + UVM_TEST_PRINT("Verif failed for %zd = 0x%llx instead of 0x%llx, verif_size=0x%llx mem(size=0x%llx, page_size=%llu, processor=%u)\n", i, sys_verif[i], (NvU64)(verif_size + i), @@ -241,7 +241,7 @@ static NV_STATUS test_map_cpu(uvm_mem_t *mem) return NV_OK; } -static NV_STATUS test_alloc_sysmem(uvm_va_space_t *va_space, NvU32 page_size, size_t size, uvm_mem_t **mem_out) +static NV_STATUS test_alloc_sysmem(uvm_va_space_t *va_space, NvU64 page_size, size_t size, uvm_mem_t **mem_out) { NV_STATUS status; uvm_mem_t *mem; @@ -299,7 +299,7 @@ static NV_STATUS test_alloc_sysmem_dma(uvm_va_space_t *va_space, uvm_gpu_t *dma_ return status; } -static NV_STATUS test_alloc_vidmem(uvm_gpu_t *gpu, NvU32 page_size, size_t size, uvm_mem_t **mem_out) +static NV_STATUS test_alloc_vidmem(uvm_gpu_t *gpu, NvU64 page_size, size_t size, uvm_mem_t **mem_out) { NV_STATUS status; uvm_mem_t *mem; @@ -334,7 +334,7 @@ static NV_STATUS test_alloc_vidmem(uvm_gpu_t *gpu, NvU32 page_size, size_t size, return status; } -static bool should_test_page_size(size_t alloc_size, NvU32 page_size) +static bool should_test_page_size(size_t alloc_size, NvU64 page_size) { if (g_uvm_global.num_simulated_devices == 0) return true; @@ -359,7 +359,7 @@ static NV_STATUS test_all(uvm_va_space_t *va_space) // size on pre-Pascal GPUs with 128K big page size. // Ampere+ also supports 512M PTEs, but since UVM's maximum chunk size is // 2M, we don't test for this page size. - static const NvU32 cpu_chunk_sizes = PAGE_SIZE | UVM_PAGE_SIZE_64K | UVM_PAGE_SIZE_128K | UVM_PAGE_SIZE_2M; + static const NvU64 cpu_chunk_sizes = PAGE_SIZE | UVM_PAGE_SIZE_64K | UVM_PAGE_SIZE_128K | UVM_PAGE_SIZE_2M; // All supported page sizes will be tested, CPU has the most with 4 and +1 // for the default. @@ -494,41 +494,6 @@ static NV_STATUS test_basic_vidmem(uvm_gpu_t *gpu) return status; } -static NV_STATUS test_basic_vidmem_unprotected(uvm_gpu_t *gpu) -{ - NV_STATUS status = NV_OK; - uvm_mem_t *mem = NULL; - - uvm_mem_alloc_params_t params = { 0 }; - params.size = UVM_PAGE_SIZE_4K; - params.backing_gpu = gpu; - params.page_size = UVM_PAGE_SIZE_4K; - - // If CC is enabled, the protection flag is observed. Because currently all - // vidmem is in the protected region, the allocation should succeed. - // - // If CC is disabled, the protection flag is ignored. - params.is_unprotected = false; - TEST_NV_CHECK_RET(uvm_mem_alloc(¶ms, &mem)); - - uvm_mem_free(mem); - mem = NULL; - - // If CC is enabled, the allocation should fail because currently the - // unprotected region is empty. - // - // If CC is disabled, the behavior should be identical to that of a - // protected allocation. - params.is_unprotected = true; - if (g_uvm_global.conf_computing_enabled) - TEST_CHECK_RET(uvm_mem_alloc(¶ms, &mem) == NV_ERR_NO_MEMORY); - else - TEST_NV_CHECK_RET(uvm_mem_alloc(¶ms, &mem)); - - uvm_mem_free(mem); - return status; -} - static NV_STATUS test_basic_sysmem(void) { NV_STATUS status = NV_OK; @@ -613,7 +578,6 @@ static NV_STATUS test_basic(uvm_va_space_t *va_space) for_each_va_space_gpu(gpu, va_space) { TEST_NV_CHECK_RET(test_basic_vidmem(gpu)); TEST_NV_CHECK_RET(test_basic_sysmem_dma(gpu)); - TEST_NV_CHECK_RET(test_basic_vidmem_unprotected(gpu)); TEST_NV_CHECK_RET(test_basic_dma_pool(gpu)); } diff --git a/kernel-open/nvidia-uvm/uvm_mmu.c b/kernel-open/nvidia-uvm/uvm_mmu.c index a66b23a2b8..89d9c94f29 100644 --- a/kernel-open/nvidia-uvm/uvm_mmu.c +++ b/kernel-open/nvidia-uvm/uvm_mmu.c @@ -153,20 +153,17 @@ static NV_STATUS phys_mem_allocate_sysmem(uvm_page_tree_t *tree, NvLength size, // - UVM_APERTURE_VID biggest page size on vidmem mappings // - UVM_APERTURE_SYS biggest page size on sysmem mappings // - UVM_APERTURE_PEER_0-7 biggest page size on peer mappings -static NvU32 mmu_biggest_page_size(uvm_page_tree_t *tree, uvm_aperture_t aperture) +static NvU64 mmu_biggest_page_size(uvm_page_tree_t *tree, uvm_aperture_t aperture) { UVM_ASSERT(aperture < UVM_APERTURE_DEFAULT); // There may be scenarios where the GMMU must use a subset of the supported // page sizes, e.g., to comply with the vMMU supported page sizes due to // segmentation sizes. - if (aperture == UVM_APERTURE_VID) { - UVM_ASSERT(tree->gpu->mem_info.max_vidmem_page_size <= NV_U32_MAX); - return (NvU32) tree->gpu->mem_info.max_vidmem_page_size; - } - else { - return 1 << __fls(tree->hal->page_sizes()); - } + if (aperture == UVM_APERTURE_VID) + return uvm_mmu_biggest_page_size_up_to(tree, tree->gpu->mem_info.max_vidmem_page_size); + + return 1ULL << __fls(tree->hal->page_sizes()); } static NV_STATUS phys_mem_allocate_vidmem(uvm_page_tree_t *tree, @@ -254,7 +251,7 @@ static void phys_mem_deallocate(uvm_page_tree_t *tree, uvm_mmu_page_table_alloc_ } static void page_table_range_init(uvm_page_table_range_t *range, - NvU32 page_size, + NvU64 page_size, uvm_page_directory_t *dir, NvU32 start_index, NvU32 end_index) @@ -444,9 +441,9 @@ static void pde_fill(uvm_page_tree_t *tree, pde_fill_cpu(tree, directory, start_index, pde_count, phys_addr); } -static void phys_mem_init(uvm_page_tree_t *tree, NvU32 page_size, uvm_page_directory_t *dir, uvm_push_t *push) +static void phys_mem_init(uvm_page_tree_t *tree, NvU64 page_size, uvm_page_directory_t *dir, uvm_push_t *push) { - NvU32 entries_count = uvm_mmu_page_tree_entries(tree, dir->depth, page_size); + NvU64 entries_count = uvm_mmu_page_tree_entries(tree, dir->depth, page_size); NvU8 max_pde_depth = tree->hal->page_table_depth(UVM_PAGE_SIZE_AGNOSTIC) - 1; // Passing in NULL for the phys_allocs will mark the child entries as @@ -497,7 +494,7 @@ static void phys_mem_init(uvm_page_tree_t *tree, NvU32 page_size, uvm_page_direc } static uvm_page_directory_t *allocate_directory(uvm_page_tree_t *tree, - NvU32 page_size, + NvU64 page_size, NvU32 depth, uvm_pmm_alloc_flags_t pmm_flags) { @@ -546,7 +543,7 @@ static inline NvU32 entry_index_from_vaddr(NvU64 vaddr, NvU32 addr_bit_shift, Nv return (NvU32)((vaddr >> addr_bit_shift) & mask); } -static inline NvU32 index_to_entry(uvm_mmu_mode_hal_t *hal, NvU32 entry_index, NvU32 depth, NvU32 page_size) +static inline NvU32 index_to_entry(uvm_mmu_mode_hal_t *hal, NvU32 entry_index, NvU32 depth, NvU64 page_size) { return hal->entries_per_index(depth) * entry_index + hal->entry_offset(depth, page_size); } @@ -583,7 +580,7 @@ static void pde_write(uvm_page_tree_t *tree, pde_fill(tree, dir, entry_index, 1, phys_allocs, push); } -static void host_pde_clear(uvm_page_tree_t *tree, uvm_page_directory_t *dir, NvU32 entry_index, NvU32 page_size) +static void host_pde_clear(uvm_page_tree_t *tree, uvm_page_directory_t *dir, NvU32 entry_index, NvU64 page_size) { UVM_ASSERT(dir->ref_count > 0); @@ -594,35 +591,38 @@ static void host_pde_clear(uvm_page_tree_t *tree, uvm_page_directory_t *dir, NvU static void pde_clear(uvm_page_tree_t *tree, uvm_page_directory_t *dir, NvU32 entry_index, - NvU32 page_size, + NvU64 page_size, uvm_push_t *push) { host_pde_clear(tree, dir, entry_index, page_size); pde_write(tree, dir, entry_index, false, push); } -static uvm_chunk_sizes_mask_t allocation_sizes_for_big_page_size(uvm_parent_gpu_t *parent_gpu, NvU32 big_page_size) +static uvm_chunk_sizes_mask_t allocation_sizes_for_big_page_size(uvm_parent_gpu_t *parent_gpu, NvU64 big_page_size) { - uvm_chunk_sizes_mask_t alloc_sizes = 0; uvm_mmu_mode_hal_t *hal = parent_gpu->arch_hal->mmu_mode_hal(big_page_size); + unsigned long page_sizes, page_size_log2; + uvm_chunk_sizes_mask_t alloc_sizes; - if (hal != NULL) { - unsigned long page_size_log2; - unsigned long page_sizes = hal->page_sizes(); - BUILD_BUG_ON(sizeof(hal->page_sizes()) > sizeof(page_sizes)); + if (hal == NULL) + return 0; - for_each_set_bit(page_size_log2, &page_sizes, BITS_PER_LONG) { - NvU32 i; - NvU32 page_size = (NvU32)(1ULL << page_size_log2); - for (i = 0; i <= hal->page_table_depth(page_size); i++) - alloc_sizes |= hal->allocation_size(i, page_size); - } + page_sizes = hal->page_sizes(); + alloc_sizes = 0; + + BUILD_BUG_ON(sizeof(hal->page_sizes()) > sizeof(page_sizes)); + + for_each_set_bit(page_size_log2, &page_sizes, BITS_PER_LONG) { + NvU32 i; + NvU64 page_size = 1ULL << page_size_log2; + for (i = 0; i <= hal->page_table_depth(page_size); i++) + alloc_sizes |= hal->allocation_size(i, page_size); } return alloc_sizes; } -static NvU32 page_sizes_for_big_page_size(uvm_parent_gpu_t *parent_gpu, NvU32 big_page_size) +static NvU64 page_sizes_for_big_page_size(uvm_parent_gpu_t *parent_gpu, NvU64 big_page_size) { uvm_mmu_mode_hal_t *hal = parent_gpu->arch_hal->mmu_mode_hal(big_page_size); @@ -662,7 +662,7 @@ static NV_STATUS page_tree_end_and_wait(uvm_page_tree_t *tree, uvm_push_t *push) } static NV_STATUS write_gpu_state_cpu(uvm_page_tree_t *tree, - NvU32 page_size, + NvU64 page_size, NvS32 invalidate_depth, NvU32 used_count, uvm_page_directory_t **dirs_used) @@ -713,7 +713,7 @@ static NV_STATUS write_gpu_state_cpu(uvm_page_tree_t *tree, } static NV_STATUS write_gpu_state_gpu(uvm_page_tree_t *tree, - NvU32 page_size, + NvU64 page_size, NvS32 invalidate_depth, NvU32 used_count, uvm_page_directory_t **dirs_used) @@ -805,7 +805,7 @@ static NV_STATUS write_gpu_state_gpu(uvm_page_tree_t *tree, // initialize new page tables and insert them into the tree static NV_STATUS write_gpu_state(uvm_page_tree_t *tree, - NvU32 page_size, + NvU64 page_size, NvS32 invalidate_depth, NvU32 used_count, uvm_page_directory_t **dirs_used) @@ -842,7 +842,7 @@ static void free_unused_directories(uvm_page_tree_t *tree, } } -static NV_STATUS allocate_page_table(uvm_page_tree_t *tree, NvU32 page_size, uvm_mmu_page_table_alloc_t *out) +static NV_STATUS allocate_page_table(uvm_page_tree_t *tree, NvU64 page_size, uvm_mmu_page_table_alloc_t *out) { NvU32 depth = tree->hal->page_table_depth(page_size); NvLength alloc_size = tree->hal->allocation_size(depth, page_size); @@ -871,7 +871,7 @@ static NV_STATUS page_tree_ats_init(uvm_page_tree_t *tree) { NV_STATUS status; NvU64 min_va_upper, max_va_lower; - NvU32 page_size; + NvU64 page_size; if (!page_tree_ats_init_required(tree)) return NV_OK; @@ -1090,7 +1090,7 @@ static void page_tree_set_location(uvm_page_tree_t *tree, uvm_aperture_t locatio NV_STATUS uvm_page_tree_init(uvm_gpu_t *gpu, uvm_gpu_va_space_t *gpu_va_space, uvm_page_tree_type_t type, - NvU32 big_page_size, + NvU64 big_page_size, uvm_aperture_t location, uvm_page_tree_t *tree) { @@ -1110,7 +1110,7 @@ NV_STATUS uvm_page_tree_init(uvm_gpu_t *gpu, tree->gpu_va_space = gpu_va_space; tree->big_page_size = big_page_size; - UVM_ASSERT(gpu->mem_info.max_vidmem_page_size & tree->hal->page_sizes()); + UVM_ASSERT(uvm_mmu_page_size_supported(tree, big_page_size)); page_tree_set_location(tree, location); @@ -1347,7 +1347,7 @@ NV_STATUS uvm_page_tree_wait(uvm_page_tree_t *tree) } static NV_STATUS try_get_ptes(uvm_page_tree_t *tree, - NvU32 page_size, + NvU64 page_size, NvU64 start, NvLength size, uvm_page_table_range_t *range, @@ -1379,7 +1379,7 @@ static NV_STATUS try_get_ptes(uvm_page_tree_t *tree, // This algorithm will work with unaligned ranges, but the caller's intent // is unclear UVM_ASSERT_MSG(start % page_size == 0 && size % page_size == 0, - "start 0x%llx size 0x%zx page_size 0x%x\n", + "start 0x%llx size 0x%zx page_size 0x%llx\n", start, (size_t)size, page_size); @@ -1448,7 +1448,7 @@ static NV_STATUS map_remap(uvm_page_tree_t *tree, NvU64 start, NvLength size, uv { NV_STATUS status; uvm_push_t push; - NvU32 page_sizes; + NvU64 page_sizes; uvm_mmu_page_table_alloc_t *phys_alloc[1]; // TODO: Bug 2734399 @@ -1460,7 +1460,7 @@ static NV_STATUS map_remap(uvm_page_tree_t *tree, NvU64 start, NvLength size, uv status = page_tree_begin_acquire(tree, &tree->tracker, &push, - "map remap: [0x%llx, 0x%llx), page_size: %d", + "map remap: [0x%llx, 0x%llx), page_size: %lld", start, start + size, range->page_size); @@ -1500,7 +1500,7 @@ static NV_STATUS map_remap(uvm_page_tree_t *tree, NvU64 start, NvLength size, uv } NV_STATUS uvm_page_tree_get_ptes_async(uvm_page_tree_t *tree, - NvU32 page_size, + NvU64 page_size, NvU64 start, NvLength size, uvm_pmm_alloc_flags_t pmm_flags, @@ -1545,7 +1545,7 @@ NV_STATUS uvm_page_tree_get_ptes_async(uvm_page_tree_t *tree, } NV_STATUS uvm_page_tree_get_ptes(uvm_page_tree_t *tree, - NvU32 page_size, + NvU64 page_size, NvU64 start, NvLength size, uvm_pmm_alloc_flags_t pmm_flags, @@ -1596,7 +1596,7 @@ void uvm_page_table_range_shrink(uvm_page_tree_t *tree, uvm_page_table_range_t * } NV_STATUS uvm_page_tree_get_entry(uvm_page_tree_t *tree, - NvU32 page_size, + NvU64 page_size, NvU64 start, uvm_pmm_alloc_flags_t pmm_flags, uvm_page_table_range_t *single) @@ -1621,7 +1621,7 @@ void uvm_page_tree_clear_pde(uvm_page_tree_t *tree, uvm_page_table_range_t *sing static NV_STATUS poison_ptes(uvm_page_tree_t *tree, uvm_page_directory_t *pte_dir, uvm_page_directory_t *parent, - NvU32 page_size) + NvU64 page_size) { NV_STATUS status; uvm_push_t push; @@ -1633,7 +1633,7 @@ static NV_STATUS poison_ptes(uvm_page_tree_t *tree, // The flat mappings should always be set up when executing this path UVM_ASSERT(!uvm_mmu_use_cpu(tree)); - status = page_tree_begin_acquire(tree, &tree->tracker, &push, "Poisoning child table of page size %u", page_size); + status = page_tree_begin_acquire(tree, &tree->tracker, &push, "Poisoning child table of page size %llu", page_size); if (status != NV_OK) return status; @@ -1660,7 +1660,7 @@ static NV_STATUS poison_ptes(uvm_page_tree_t *tree, } NV_STATUS uvm_page_tree_alloc_table(uvm_page_tree_t *tree, - NvU32 page_size, + NvU64 page_size, uvm_pmm_alloc_flags_t pmm_flags, uvm_page_table_range_t *single, uvm_page_table_range_t *children) @@ -1768,7 +1768,7 @@ static size_t range_vec_calc_range_index(uvm_page_table_range_vec_t *range_vec, NV_STATUS uvm_page_table_range_vec_init(uvm_page_tree_t *tree, NvU64 start, NvU64 size, - NvU32 page_size, + NvU64 page_size, uvm_pmm_alloc_flags_t pmm_flags, uvm_page_table_range_vec_t *range_vec) { @@ -1776,8 +1776,8 @@ NV_STATUS uvm_page_table_range_vec_init(uvm_page_tree_t *tree, size_t i; UVM_ASSERT(size != 0); - UVM_ASSERT_MSG(IS_ALIGNED(start, page_size), "start 0x%llx page_size 0x%x\n", start, page_size); - UVM_ASSERT_MSG(IS_ALIGNED(size, page_size), "size 0x%llx page_size 0x%x\n", size, page_size); + UVM_ASSERT_MSG(IS_ALIGNED(start, page_size), "start 0x%llx page_size 0x%llx\n", start, page_size); + UVM_ASSERT_MSG(IS_ALIGNED(size, page_size), "size 0x%llx page_size 0x%llx\n", size, page_size); range_vec->tree = tree; range_vec->page_size = page_size; @@ -1826,7 +1826,7 @@ NV_STATUS uvm_page_table_range_vec_init(uvm_page_tree_t *tree, NV_STATUS uvm_page_table_range_vec_create(uvm_page_tree_t *tree, NvU64 start, NvU64 size, - NvU32 page_size, + NvU64 page_size, uvm_pmm_alloc_flags_t pmm_flags, uvm_page_table_range_vec_t **range_vec_out) { @@ -1952,7 +1952,7 @@ static NV_STATUS uvm_page_table_range_vec_clear_ptes_gpu(uvm_page_table_range_ve size_t i; uvm_page_tree_t *tree = range_vec->tree; uvm_gpu_t *gpu = tree->gpu; - NvU32 page_size = range_vec->page_size; + NvU64 page_size = range_vec->page_size; NvU32 entry_size = uvm_mmu_pte_size(tree, page_size); NvU64 invalid_pte = 0; uvm_push_t push; @@ -2237,7 +2237,7 @@ static NV_STATUS create_identity_mapping(uvm_gpu_t *gpu, NvU64 size, uvm_aperture_t aperture, NvU64 phys_offset, - NvU32 page_size, + NvU64 page_size, uvm_pmm_alloc_flags_t pmm_flags) { NV_STATUS status; @@ -2312,7 +2312,7 @@ bool uvm_mmu_parent_gpu_needs_dynamic_sysmem_mapping(uvm_parent_gpu_t *parent_gp NV_STATUS create_static_vidmem_mapping(uvm_gpu_t *gpu) { - NvU32 page_size; + NvU64 page_size; NvU64 size; uvm_aperture_t aperture = UVM_APERTURE_VID; NvU64 phys_offset = 0; @@ -2351,7 +2351,7 @@ static void destroy_static_vidmem_mapping(uvm_gpu_t *gpu) NV_STATUS uvm_mmu_create_peer_identity_mappings(uvm_gpu_t *gpu, uvm_gpu_t *peer) { - NvU32 page_size; + NvU64 page_size; NvU64 size; uvm_aperture_t aperture; NvU64 phys_offset; @@ -2535,7 +2535,7 @@ static void root_chunk_mapping_destroy(uvm_gpu_t *gpu, uvm_gpu_root_chunk_mappin uvm_push_t push; NvU32 entry_size; uvm_pte_batch_t pte_batch; - NvU32 page_size; + NvU64 page_size; NvU64 size; NvU64 invalid_pte; uvm_page_table_range_t *range = root_chunk_mapping->range; @@ -2585,7 +2585,7 @@ static NV_STATUS root_chunk_mapping_create(uvm_gpu_t *gpu, uvm_gpu_root_chunk_ma uvm_push_t push; NvU64 pte_bits; NvU32 entry_size; - NvU32 page_size = UVM_CHUNK_SIZE_MAX; + NvU64 page_size = UVM_CHUNK_SIZE_MAX; NvU64 size = UVM_CHUNK_SIZE_MAX; range = uvm_kvmalloc_zero(sizeof(*range)); @@ -2852,7 +2852,7 @@ NV_STATUS uvm_mmu_sysmem_map(uvm_gpu_t *gpu, NvU64 pa, NvU64 size) if (sysmem_mapping->range_vec == NULL) { uvm_gpu_address_t virtual_address = uvm_parent_gpu_address_virtual_from_sysmem_phys(gpu->parent, curr_pa); NvU64 phys_offset = curr_pa; - NvU32 page_size = mmu_biggest_page_size(&gpu->address_space_tree, UVM_APERTURE_SYS); + NvU64 page_size = mmu_biggest_page_size(&gpu->address_space_tree, UVM_APERTURE_SYS); uvm_pmm_alloc_flags_t pmm_flags; // No eviction is requested when allocating the page tree storage, diff --git a/kernel-open/nvidia-uvm/uvm_mmu.h b/kernel-open/nvidia-uvm/uvm_mmu.h index 430670c0bc..22672f5443 100644 --- a/kernel-open/nvidia-uvm/uvm_mmu.h +++ b/kernel-open/nvidia-uvm/uvm_mmu.h @@ -208,7 +208,7 @@ struct uvm_mmu_mode_hal_struct // This is an optimization which reduces TLB pressure, reduces the number of // TLB invalidates we must issue, and means we don't have to initialize the // 4k PTEs which are covered by big PTEs since the MMU will never read them. - NvU64 (*unmapped_pte)(NvU32 page_size); + NvU64 (*unmapped_pte)(NvU64 page_size); // Bit pattern used for debug purposes to clobber PTEs which ought to be // unused. In practice this will generate a PRIV violation or a physical @@ -234,23 +234,23 @@ struct uvm_mmu_mode_hal_struct // For dual PDEs, this is ether 1 or 0, depending on the page size. // This is used to index the host copy only. GPU PDEs are always entirely // re-written using make_pde. - NvLength (*entry_offset)(NvU32 depth, NvU32 page_size); + NvLength (*entry_offset)(NvU32 depth, NvU64 page_size); // number of virtual address bits used to index the directory/table at a // given depth - NvU32 (*index_bits)(NvU32 depth, NvU32 page_size); + NvU32 (*index_bits)(NvU32 depth, NvU64 page_size); // total number of bits that represent the virtual address space NvU32 (*num_va_bits)(void); // the size, in bytes, of a directory/table at a given depth. - NvLength (*allocation_size)(NvU32 depth, NvU32 page_size); + NvLength (*allocation_size)(NvU32 depth, NvU64 page_size); // the depth which corresponds to the page tables - NvU32 (*page_table_depth)(NvU32 page_size); + NvU32 (*page_table_depth)(NvU64 page_size); // bitwise-or of supported page sizes - NvU32 (*page_sizes)(void); + NvU64 (*page_sizes)(void); }; struct uvm_page_table_range_struct @@ -258,7 +258,7 @@ struct uvm_page_table_range_struct uvm_page_directory_t *table; NvU32 start_index; NvU32 entry_count; - NvU32 page_size; + NvU64 page_size; }; typedef enum @@ -275,7 +275,7 @@ struct uvm_page_tree_struct uvm_page_directory_t *root; uvm_mmu_mode_hal_t *hal; uvm_page_tree_type_t type; - NvU32 big_page_size; + NvU64 big_page_size; // Pointer to the GPU VA space containing the page tree. // This pointer is set only for page trees of type @@ -325,7 +325,7 @@ struct uvm_page_table_range_vec_struct NvU64 size; // Page size used for all the page table ranges - NvU32 page_size; + NvU64 page_size; // Page table ranges covering the VA uvm_page_table_range_t *ranges; @@ -352,7 +352,7 @@ void uvm_mmu_init_gpu_peer_addresses(uvm_gpu_t *gpu); NV_STATUS uvm_page_tree_init(uvm_gpu_t *gpu, uvm_gpu_va_space_t *gpu_va_space, uvm_page_tree_type_t type, - NvU32 big_page_size, + NvU64 big_page_size, uvm_aperture_t location, uvm_page_tree_t *tree_out); @@ -374,7 +374,7 @@ void uvm_page_tree_deinit(uvm_page_tree_t *tree); // an existing range or change the size of an existing range, use // uvm_page_table_range_get_upper() and/or uvm_page_table_range_shrink(). NV_STATUS uvm_page_tree_get_ptes(uvm_page_tree_t *tree, - NvU32 page_size, + NvU64 page_size, NvU64 start, NvLength size, uvm_pmm_alloc_flags_t pmm_flags, @@ -384,7 +384,7 @@ NV_STATUS uvm_page_tree_get_ptes(uvm_page_tree_t *tree, // // All pending operations can be waited on with uvm_page_tree_wait(). NV_STATUS uvm_page_tree_get_ptes_async(uvm_page_tree_t *tree, - NvU32 page_size, + NvU64 page_size, NvU64 start, NvLength size, uvm_pmm_alloc_flags_t pmm_flags, @@ -395,7 +395,7 @@ NV_STATUS uvm_page_tree_get_ptes_async(uvm_page_tree_t *tree, // This is equivalent to calling uvm_page_tree_get_ptes() with size equal to // page_size. NV_STATUS uvm_page_tree_get_entry(uvm_page_tree_t *tree, - NvU32 page_size, + NvU64 page_size, NvU64 start, uvm_pmm_alloc_flags_t pmm_flags, uvm_page_table_range_t *single); @@ -426,7 +426,7 @@ void uvm_page_tree_clear_pde(uvm_page_tree_t *tree, uvm_page_table_range_t *sing // It is the caller's responsibility to initialize the returned table before // calling uvm_page_tree_write_pde. NV_STATUS uvm_page_tree_alloc_table(uvm_page_tree_t *tree, - NvU32 page_size, + NvU64 page_size, uvm_pmm_alloc_flags_t pmm_flags, uvm_page_table_range_t *single, uvm_page_table_range_t *children); @@ -480,7 +480,7 @@ static uvm_mmu_page_table_alloc_t *uvm_page_tree_pdb(uvm_page_tree_t *tree) NV_STATUS uvm_page_table_range_vec_init(uvm_page_tree_t *tree, NvU64 start, NvU64 size, - NvU32 page_size, + NvU64 page_size, uvm_pmm_alloc_flags_t pmm_flags, uvm_page_table_range_vec_t *range_vec); @@ -489,7 +489,7 @@ NV_STATUS uvm_page_table_range_vec_init(uvm_page_tree_t *tree, NV_STATUS uvm_page_table_range_vec_create(uvm_page_tree_t *tree, NvU64 start, NvU64 size, - NvU32 page_size, + NvU64 page_size, uvm_pmm_alloc_flags_t pmm_flags, uvm_page_table_range_vec_t **range_vec_out); @@ -601,12 +601,12 @@ void uvm_mmu_chunk_unmap(uvm_gpu_chunk_t *chunk, uvm_tracker_t *tracker); // uvm_parent_gpu_map_cpu_pages for the given GPU. NV_STATUS uvm_mmu_sysmem_map(uvm_gpu_t *gpu, NvU64 pa, NvU64 size); -static NvU64 uvm_mmu_page_tree_entries(uvm_page_tree_t *tree, NvU32 depth, NvU32 page_size) +static NvU64 uvm_mmu_page_tree_entries(uvm_page_tree_t *tree, NvU32 depth, NvU64 page_size) { return 1ull << tree->hal->index_bits(depth, page_size); } -static NvU64 uvm_mmu_pde_coverage(uvm_page_tree_t *tree, NvU32 page_size) +static NvU64 uvm_mmu_pde_coverage(uvm_page_tree_t *tree, NvU64 page_size) { NvU32 depth = tree->hal->page_table_depth(page_size); return uvm_mmu_page_tree_entries(tree, depth, page_size) * page_size; @@ -615,21 +615,21 @@ static NvU64 uvm_mmu_pde_coverage(uvm_page_tree_t *tree, NvU32 page_size) // Page sizes supported by the GPU. Use uvm_mmu_biggest_page_size() to retrieve // the largest page size supported in a given system, which considers the GMMU // and vMMU page sizes and segment sizes. -static bool uvm_mmu_page_size_supported(uvm_page_tree_t *tree, NvU32 page_size) +static bool uvm_mmu_page_size_supported(uvm_page_tree_t *tree, NvU64 page_size) { - UVM_ASSERT_MSG(is_power_of_2(page_size), "0x%x\n", page_size); + UVM_ASSERT_MSG(is_power_of_2(page_size), "0x%llx\n", page_size); return (tree->hal->page_sizes() & page_size) != 0; } -static NvU32 uvm_mmu_biggest_page_size_up_to(uvm_page_tree_t *tree, NvU32 max_page_size) +static NvU64 uvm_mmu_biggest_page_size_up_to(uvm_page_tree_t *tree, NvU64 max_page_size) { - NvU32 gpu_page_sizes = tree->hal->page_sizes(); - NvU32 smallest_gpu_page_size = gpu_page_sizes & ~(gpu_page_sizes - 1); - NvU32 page_sizes; - NvU32 page_size; + NvU64 gpu_page_sizes = tree->hal->page_sizes(); + NvU64 smallest_gpu_page_size = gpu_page_sizes & ~(gpu_page_sizes - 1); + NvU64 page_sizes; + NvU64 page_size; - UVM_ASSERT_MSG(is_power_of_2(max_page_size), "0x%x\n", max_page_size); + UVM_ASSERT_MSG(is_power_of_2(max_page_size), "0x%llx\n", max_page_size); if (max_page_size < smallest_gpu_page_size) return 0; @@ -638,14 +638,14 @@ static NvU32 uvm_mmu_biggest_page_size_up_to(uvm_page_tree_t *tree, NvU32 max_pa page_sizes = gpu_page_sizes & (max_page_size | (max_page_size - 1)); // And pick the biggest one of them - page_size = 1 << __fls(page_sizes); + page_size = 1ULL << __fls(page_sizes); - UVM_ASSERT_MSG(uvm_mmu_page_size_supported(tree, page_size), "page_size 0x%x", page_size); + UVM_ASSERT_MSG(uvm_mmu_page_size_supported(tree, page_size), "page_size 0x%llx", page_size); return page_size; } -static NvU32 uvm_mmu_pte_size(uvm_page_tree_t *tree, NvU32 page_size) +static NvU32 uvm_mmu_pte_size(uvm_page_tree_t *tree, NvU64 page_size) { return tree->hal->entry_size(tree->hal->page_table_depth(page_size)); } diff --git a/kernel-open/nvidia-uvm/uvm_page_tree_test.c b/kernel-open/nvidia-uvm/uvm_page_tree_test.c index 782ac51138..2371eb072f 100644 --- a/kernel-open/nvidia-uvm/uvm_page_tree_test.c +++ b/kernel-open/nvidia-uvm/uvm_page_tree_test.c @@ -96,7 +96,7 @@ typedef struct { NvU64 base; NvU64 size; - NvU32 page_size; + NvU64 page_size; NvU32 depth; uvm_membar_t membar; } fake_tlb_invalidate_t; @@ -153,7 +153,7 @@ static void fake_tlb_invalidate_va(uvm_push_t *push, NvU32 depth, NvU64 base, NvU64 size, - NvU32 page_size, + NvU64 page_size, uvm_membar_t membar) { if (!g_fake_tlb_invals_tracking_enabled) @@ -249,7 +249,11 @@ static bool assert_last_invalidate_all(NvU32 expected_depth, bool expected_memba } static bool assert_invalidate_range_specific(fake_tlb_invalidate_t *inval, - NvU64 base, NvU64 size, NvU32 page_size, NvU32 expected_depth, bool expected_membar) + NvU64 base, + NvU64 size, + NvU64 page_size, + NvU32 expected_depth, + bool expected_membar) { UVM_ASSERT(g_fake_tlb_invals_tracking_enabled); @@ -271,7 +275,7 @@ static bool assert_invalidate_range_specific(fake_tlb_invalidate_t *inval, return false; } if (inval->page_size != page_size && inval->base != 0 && inval->size != -1) { - UVM_TEST_PRINT("Expected page size %u, got %u instead\n", page_size, inval->page_size); + UVM_TEST_PRINT("Expected page size %llu, got %llu instead\n", page_size, inval->page_size); return false; } @@ -280,7 +284,7 @@ static bool assert_invalidate_range_specific(fake_tlb_invalidate_t *inval, static bool assert_invalidate_range(NvU64 base, NvU64 size, - NvU32 page_size, + NvU64 page_size, bool allow_inval_all, NvU32 range_depth, NvU32 all_depth, @@ -325,7 +329,7 @@ static NV_STATUS test_page_tree_init_kernel(uvm_gpu_t *gpu, NvU32 big_page_size, } static NV_STATUS test_page_tree_get_ptes(uvm_page_tree_t *tree, - NvU32 page_size, + NvU64 page_size, NvU64 start, NvLength size, uvm_page_table_range_t *range) @@ -341,7 +345,7 @@ static NV_STATUS test_page_tree_get_ptes(uvm_page_tree_t *tree, } static NV_STATUS test_page_tree_get_entry(uvm_page_tree_t *tree, - NvU32 page_size, + NvU64 page_size, NvU64 start, uvm_page_table_range_t *single) { @@ -355,14 +359,14 @@ static NV_STATUS test_page_tree_get_entry(uvm_page_tree_t *tree, } static NV_STATUS test_page_tree_alloc_table(uvm_page_tree_t *tree, - NvU32 page_size, + NvU64 page_size, uvm_page_table_range_t *single, uvm_page_table_range_t *children) { return uvm_page_tree_alloc_table(tree, page_size, UVM_PMM_ALLOC_FLAGS_NONE, single, children); } -static bool assert_entry_no_invalidate(uvm_page_tree_t *tree, NvU32 page_size, NvU64 start) +static bool assert_entry_no_invalidate(uvm_page_tree_t *tree, NvU64 page_size, NvU64 start) { uvm_page_table_range_t entry; bool result = true; @@ -378,7 +382,7 @@ static bool assert_entry_no_invalidate(uvm_page_tree_t *tree, NvU32 page_size, N return assert_no_invalidate() && result; } -static bool assert_entry_invalidate(uvm_page_tree_t *tree, NvU32 page_size, NvU64 start, NvU32 depth, bool membar) +static bool assert_entry_invalidate(uvm_page_tree_t *tree, NvU64 page_size, NvU64 start, NvU32 depth, bool membar) { uvm_page_table_range_t entry; bool result = true; @@ -932,8 +936,8 @@ static NV_STATUS split_and_free(uvm_gpu_t *gpu) static NV_STATUS check_sizes(uvm_gpu_t *gpu) { - NvU32 user_sizes = UVM_PAGE_SIZE_2M; - NvU32 kernel_sizes = UVM_PAGE_SIZE_4K | 256; + NvU64 user_sizes = UVM_PAGE_SIZE_2M; + NvU64 kernel_sizes = UVM_PAGE_SIZE_4K | 256; if (UVM_PAGE_SIZE_64K >= PAGE_SIZE) user_sizes |= UVM_PAGE_SIZE_64K; @@ -1161,7 +1165,7 @@ static NV_STATUS test_tlb_batch_invalidates_case(uvm_page_tree_t *tree, return status; } -static NV_STATUS test_tlb_batch_invalidates(uvm_gpu_t *gpu, const NvU32 *page_sizes, const NvU32 page_sizes_count) +static NV_STATUS test_tlb_batch_invalidates(uvm_gpu_t *gpu, const NvU64 *page_sizes, const NvU32 page_sizes_count) { NV_STATUS status = NV_OK; uvm_page_tree_t tree; @@ -1177,8 +1181,8 @@ static NV_STATUS test_tlb_batch_invalidates(uvm_gpu_t *gpu, const NvU32 *page_si for (min_index = 0; min_index < page_sizes_count; ++min_index) { for (max_index = min_index; max_index < page_sizes_count; ++max_index) { for (size_index = 0; size_index < ARRAY_SIZE(sizes_in_max_pages); ++size_index) { - NvU32 min_page_size = page_sizes[min_index]; - NvU32 max_page_size = page_sizes[max_index]; + NvU64 min_page_size = page_sizes[min_index]; + NvU64 max_page_size = page_sizes[max_index]; NvU64 size = (NvU64)sizes_in_max_pages[size_index] * max_page_size; TEST_CHECK_GOTO(test_tlb_batch_invalidates_case(&tree, @@ -1282,7 +1286,7 @@ static NV_STATUS test_range_vec_clear_ptes(uvm_page_table_range_vec_t *range_vec static NV_STATUS test_range_vec_create(uvm_page_tree_t *tree, NvU64 start, NvU64 size, - NvU32 page_size, + NvU64 page_size, uvm_page_table_range_vec_t **range_vec_out) { uvm_page_table_range_vec_t *range_vec; @@ -1303,7 +1307,7 @@ static NV_STATUS test_range_vec_create(uvm_page_tree_t *tree, // Test page table range vector APIs. // Notably the test leaks the page_tree and range_vec on error as it's hard to // clean up on failure and the destructors would likely assert. -static NV_STATUS test_range_vec(uvm_gpu_t *gpu, NvU32 big_page_size, NvU32 page_size) +static NV_STATUS test_range_vec(uvm_gpu_t *gpu, NvU32 big_page_size, NvU64 page_size) { NV_STATUS status = NV_OK; uvm_page_tree_t tree; @@ -1511,7 +1515,7 @@ static uvm_mmu_page_table_alloc_t fake_table_alloc(uvm_aperture_t aperture, NvU6 // Queries the supported page sizes of the GPU(uvm_gpu_t) and fills the // page_sizes array up to MAX_NUM_PAGE_SIZE. Returns the number of elements in // page_sizes; -size_t get_page_sizes(uvm_gpu_t *gpu, NvU32 *page_sizes) +size_t get_page_sizes(uvm_gpu_t *gpu, NvU64 *page_sizes) { unsigned long page_size_log2; unsigned long page_sizes_bitvec; @@ -1524,7 +1528,7 @@ size_t get_page_sizes(uvm_gpu_t *gpu, NvU32 *page_sizes) page_sizes_bitvec = hal->page_sizes(); for_each_set_bit(page_size_log2, &page_sizes_bitvec, BITS_PER_LONG) { - NvU32 page_size = (NvU32)(1ULL << page_size_log2); + NvU64 page_size = 1ULL << page_size_log2; UVM_ASSERT(count < MAX_NUM_PAGE_SIZES); page_sizes[count++] = page_size; } @@ -1572,7 +1576,7 @@ typedef NV_STATUS (*entry_test_page_size_func)(uvm_gpu_t *gpu, size_t page_size) static NV_STATUS entry_test_maxwell(uvm_gpu_t *gpu) { - static const NvU32 big_page_sizes[] = {UVM_PAGE_SIZE_64K, UVM_PAGE_SIZE_128K}; + static const NvU64 big_page_sizes[] = {UVM_PAGE_SIZE_64K, UVM_PAGE_SIZE_128K}; NvU64 pde_bits; uvm_mmu_page_table_alloc_t *phys_allocs[2]; uvm_mmu_page_table_alloc_t alloc_sys = fake_table_alloc(UVM_APERTURE_SYS, 0x9999999000LL); @@ -1663,7 +1667,7 @@ static NV_STATUS entry_test_maxwell(uvm_gpu_t *gpu) static NV_STATUS entry_test_pascal(uvm_gpu_t *gpu, entry_test_page_size_func entry_test_page_size) { - NvU32 page_sizes[MAX_NUM_PAGE_SIZES]; + NvU64 page_sizes[MAX_NUM_PAGE_SIZES]; NvU64 pde_bits[2]; size_t i, num_page_sizes; uvm_mmu_page_table_alloc_t *phys_allocs[2] = {NULL, NULL}; @@ -1759,7 +1763,7 @@ static NV_STATUS entry_test_pascal(uvm_gpu_t *gpu, entry_test_page_size_func ent static NV_STATUS entry_test_volta(uvm_gpu_t *gpu, entry_test_page_size_func entry_test_page_size) { - NvU32 page_sizes[MAX_NUM_PAGE_SIZES]; + NvU64 page_sizes[MAX_NUM_PAGE_SIZES]; NvU64 pde_bits[2]; size_t i, num_page_sizes; uvm_mmu_page_table_alloc_t *phys_allocs[2] = {NULL, NULL}; @@ -1833,7 +1837,7 @@ static NV_STATUS entry_test_volta(uvm_gpu_t *gpu, entry_test_page_size_func entr static NV_STATUS entry_test_ampere(uvm_gpu_t *gpu, entry_test_page_size_func entry_test_page_size) { - NvU32 page_sizes[MAX_NUM_PAGE_SIZES]; + NvU64 page_sizes[MAX_NUM_PAGE_SIZES]; NvU32 i, num_page_sizes; num_page_sizes = get_page_sizes(gpu, page_sizes); @@ -1847,7 +1851,7 @@ static NV_STATUS entry_test_ampere(uvm_gpu_t *gpu, entry_test_page_size_func ent static NV_STATUS entry_test_hopper(uvm_gpu_t *gpu, entry_test_page_size_func entry_test_page_size) { NV_STATUS status = NV_OK; - NvU32 page_sizes[MAX_NUM_PAGE_SIZES]; + NvU64 page_sizes[MAX_NUM_PAGE_SIZES]; NvU64 pde_bits[2]; uvm_page_directory_t *dirs[5]; size_t i, num_page_sizes; @@ -2290,8 +2294,8 @@ static NV_STATUS fake_gpu_init_hopper(uvm_gpu_t *fake_gpu) static NV_STATUS maxwell_test_page_tree(uvm_gpu_t *maxwell) { // create a fake Maxwell GPU for this test. - static const NvU32 big_page_sizes[] = {UVM_PAGE_SIZE_64K, UVM_PAGE_SIZE_128K}; - NvU32 i, j, big_page_size, page_size; + static const NvU64 big_page_sizes[] = {UVM_PAGE_SIZE_64K, UVM_PAGE_SIZE_128K}; + NvU64 i, j, big_page_size, page_size; TEST_CHECK_RET(fake_gpu_init_maxwell(maxwell) == NV_OK); @@ -2320,7 +2324,7 @@ static NV_STATUS pascal_test_page_tree(uvm_gpu_t *pascal) // create a fake Pascal GPU for this test. NvU32 tlb_batch_saved_max_pages; NvU32 i; - NvU32 page_sizes[MAX_NUM_PAGE_SIZES]; + NvU64 page_sizes[MAX_NUM_PAGE_SIZES]; size_t num_page_sizes; TEST_CHECK_RET(fake_gpu_init_pascal(pascal) == NV_OK); @@ -2381,7 +2385,7 @@ static NV_STATUS volta_test_page_tree(uvm_gpu_t *volta) static NV_STATUS ampere_test_page_tree(uvm_gpu_t *ampere) { NvU32 i, tlb_batch_saved_max_pages; - NvU32 page_sizes[MAX_NUM_PAGE_SIZES]; + NvU64 page_sizes[MAX_NUM_PAGE_SIZES]; size_t num_page_sizes; TEST_CHECK_RET(fake_gpu_init_ampere(ampere) == NV_OK); diff --git a/kernel-open/nvidia-uvm/uvm_pascal_host.c b/kernel-open/nvidia-uvm/uvm_pascal_host.c index 7c57aa0c38..c171cb4896 100644 --- a/kernel-open/nvidia-uvm/uvm_pascal_host.c +++ b/kernel-open/nvidia-uvm/uvm_pascal_host.c @@ -92,7 +92,13 @@ void uvm_hal_pascal_host_tlb_invalidate_all(uvm_push_t *push, uvm_gpu_phys_addre uvm_hal_tlb_invalidate_membar(push, membar); } -void uvm_hal_pascal_host_tlb_invalidate_va(uvm_push_t *push, uvm_gpu_phys_address_t pdb, NvU32 depth, NvU64 base, NvU64 size, NvU32 page_size, uvm_membar_t membar) +void uvm_hal_pascal_host_tlb_invalidate_va(uvm_push_t *push, + uvm_gpu_phys_address_t pdb, + NvU32 depth, + NvU64 base, + NvU64 size, + NvU64 page_size, + uvm_membar_t membar) { NvU32 aperture_value; NvU32 page_table_level; @@ -127,9 +133,9 @@ void uvm_hal_pascal_host_tlb_invalidate_va(uvm_push_t *push, uvm_gpu_phys_addres ack_value = HWCONST(C06F, MEM_OP_C, TLB_INVALIDATE_ACK_TYPE, GLOBALLY); } - UVM_ASSERT_MSG(IS_ALIGNED(page_size, 1 << 12), "page_size 0x%x\n", page_size); - UVM_ASSERT_MSG(IS_ALIGNED(base, page_size), "base 0x%llx page_size 0x%x\n", base, page_size); - UVM_ASSERT_MSG(IS_ALIGNED(size, page_size), "size 0x%llx page_size 0x%x\n", size, page_size); + UVM_ASSERT_MSG(IS_ALIGNED(page_size, 1 << 12), "page_size 0x%llx\n", page_size); + UVM_ASSERT_MSG(IS_ALIGNED(base, page_size), "base 0x%llx page_size 0x%llx\n", base, page_size); + UVM_ASSERT_MSG(IS_ALIGNED(size, page_size), "size 0x%llx page_size 0x%llx\n", size, page_size); UVM_ASSERT_MSG(size > 0, "size 0x%llx\n", size); base >>= 12; diff --git a/kernel-open/nvidia-uvm/uvm_pascal_mmu.c b/kernel-open/nvidia-uvm/uvm_pascal_mmu.c index a1d8cd9040..e6d490cb93 100644 --- a/kernel-open/nvidia-uvm/uvm_pascal_mmu.c +++ b/kernel-open/nvidia-uvm/uvm_pascal_mmu.c @@ -54,7 +54,7 @@ static NvU32 entries_per_index_pascal(NvU32 depth) return 1; } -static NvLength entry_offset_pascal(NvU32 depth, NvU32 page_size) +static NvLength entry_offset_pascal(NvU32 depth, NvU64 page_size) { UVM_ASSERT(depth < 5); if (page_size == UVM_PAGE_SIZE_4K && depth == 3) @@ -178,7 +178,7 @@ static NvLength entry_size_pascal(NvU32 depth) return 8; } -static NvU32 index_bits_pascal(NvU32 depth, NvU32 page_size) +static NvU32 index_bits_pascal(NvU32 depth, NvU64 page_size) { static const NvU32 bit_widths[] = {2, 9, 9, 8}; // some code paths keep on querying this until they get a 0, meaning only the page offset remains. @@ -204,7 +204,7 @@ static NvU32 num_va_bits_pascal(void) return 49; } -static NvLength allocation_size_pascal(NvU32 depth, NvU32 page_size) +static NvLength allocation_size_pascal(NvU32 depth, NvU64 page_size) { UVM_ASSERT(depth < 5); if (depth == 4 && page_size == UVM_PAGE_SIZE_64K) @@ -213,7 +213,7 @@ static NvLength allocation_size_pascal(NvU32 depth, NvU32 page_size) return 4096; } -static NvU32 page_table_depth_pascal(NvU32 page_size) +static NvU32 page_table_depth_pascal(NvU64 page_size) { if (page_size == UVM_PAGE_SIZE_2M) return 3; @@ -221,12 +221,12 @@ static NvU32 page_table_depth_pascal(NvU32 page_size) return 4; } -static NvU32 page_sizes_pascal(void) +static NvU64 page_sizes_pascal(void) { return UVM_PAGE_SIZE_2M | UVM_PAGE_SIZE_64K | UVM_PAGE_SIZE_4K; } -static NvU64 unmapped_pte_pascal(NvU32 page_size) +static NvU64 unmapped_pte_pascal(NvU64 page_size) { // Setting the privilege bit on an otherwise-zeroed big PTE causes the // corresponding 4k PTEs to be ignored. This allows the invalidation of a @@ -362,7 +362,7 @@ static uvm_mmu_mode_hal_t pascal_mmu_mode_hal = .page_sizes = page_sizes_pascal }; -uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_pascal(NvU32 big_page_size) +uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_pascal(NvU64 big_page_size) { UVM_ASSERT(big_page_size == UVM_PAGE_SIZE_64K || big_page_size == UVM_PAGE_SIZE_128K); diff --git a/kernel-open/nvidia-uvm/uvm_perf_prefetch.c b/kernel-open/nvidia-uvm/uvm_perf_prefetch.c index 16380db4e4..76a9795d75 100644 --- a/kernel-open/nvidia-uvm/uvm_perf_prefetch.c +++ b/kernel-open/nvidia-uvm/uvm_perf_prefetch.c @@ -162,7 +162,7 @@ static void grow_fault_granularity_if_no_thrashing(uvm_perf_prefetch_bitmap_tree } static void grow_fault_granularity(uvm_perf_prefetch_bitmap_tree_t *bitmap_tree, - NvU32 big_page_size, + NvU64 big_page_size, uvm_va_block_region_t big_pages_region, uvm_va_block_region_t max_prefetch_region, const uvm_page_mask_t *faulted_pages, @@ -245,7 +245,7 @@ static void update_bitmap_tree_from_va_block(uvm_perf_prefetch_bitmap_tree_t *bi uvm_va_block_region_t max_prefetch_region) { - NvU32 big_page_size; + NvU64 big_page_size; uvm_va_block_region_t big_pages_region; uvm_va_space_t *va_space; const uvm_page_mask_t *thrashing_pages; diff --git a/kernel-open/nvidia-uvm/uvm_perf_thrashing.c b/kernel-open/nvidia-uvm/uvm_perf_thrashing.c index 2858e6f06b..d0be3ebd52 100644 --- a/kernel-open/nvidia-uvm/uvm_perf_thrashing.c +++ b/kernel-open/nvidia-uvm/uvm_perf_thrashing.c @@ -1987,21 +1987,12 @@ NV_STATUS uvm_perf_thrashing_init(void) UVM_PERF_THRASHING_PIN_THRESHOLD_DEFAULT, UVM_PERF_THRASHING_PIN_THRESHOLD_MAX); - - - // In Confidential Computing, the DMA path is slower due to cryptographic - // operations & other associated overhead. Enforce a larger window to allow - // the thrashing mitigation mechanisms to work properly. - if (g_uvm_global.conf_computing_enabled) - INIT_THRASHING_PARAMETER_NONZERO(uvm_perf_thrashing_lapse_usec, UVM_PERF_THRASHING_LAPSE_USEC_DEFAULT * 10); - else - INIT_THRASHING_PARAMETER_NONZERO(uvm_perf_thrashing_lapse_usec, UVM_PERF_THRASHING_LAPSE_USEC_DEFAULT); + INIT_THRASHING_PARAMETER_NONZERO(uvm_perf_thrashing_lapse_usec, UVM_PERF_THRASHING_LAPSE_USEC_DEFAULT); INIT_THRASHING_PARAMETER_NONZERO_MAX(uvm_perf_thrashing_nap, UVM_PERF_THRASHING_NAP_DEFAULT, UVM_PERF_THRASHING_NAP_MAX); - INIT_THRASHING_PARAMETER_NONZERO(uvm_perf_thrashing_epoch, UVM_PERF_THRASHING_EPOCH_DEFAULT); INIT_THRASHING_PARAMETER(uvm_perf_thrashing_pin, UVM_PERF_THRASHING_PIN_DEFAULT); diff --git a/kernel-open/nvidia-uvm/uvm_pmm_gpu.c b/kernel-open/nvidia-uvm/uvm_pmm_gpu.c index b12911c19b..e76aeeb491 100644 --- a/kernel-open/nvidia-uvm/uvm_pmm_gpu.c +++ b/kernel-open/nvidia-uvm/uvm_pmm_gpu.c @@ -1890,8 +1890,11 @@ static uvm_gpu_chunk_t *claim_free_chunk(uvm_pmm_gpu_t *pmm, uvm_pmm_gpu_memory_ if (!chunk) goto out; - UVM_ASSERT_MSG(uvm_gpu_chunk_get_size(chunk) == chunk_size, "chunk size %u expected %u\n", - uvm_gpu_chunk_get_size(chunk), chunk_size); + UVM_ASSERT_MSG(uvm_gpu_chunk_get_size(chunk) == chunk_size, + "chunk size %u expected %u\n", + uvm_gpu_chunk_get_size(chunk), + chunk_size); + UVM_ASSERT(chunk->type == type); UVM_ASSERT(chunk->state == UVM_PMM_GPU_CHUNK_STATE_FREE); UVM_ASSERT(!chunk_is_in_eviction(pmm, chunk)); @@ -2756,7 +2759,7 @@ static bool uvm_pmm_should_inject_pma_eviction_error(uvm_pmm_gpu_t *pmm) // See the documentation of pmaEvictPagesCb_t in pma.h for details of the // expected semantics. static NV_STATUS uvm_pmm_gpu_pma_evict_pages(void *void_pmm, - NvU32 page_size, + NvU64 page_size, NvU64 *pages, NvU32 num_pages_to_evict, NvU64 phys_start, @@ -2861,7 +2864,7 @@ static NV_STATUS uvm_pmm_gpu_pma_evict_pages(void *void_pmm, } static NV_STATUS uvm_pmm_gpu_pma_evict_pages_wrapper(void *void_pmm, - NvU32 page_size, + NvU64 page_size, NvU64 *pages, NvU32 num_pages_to_evict, NvU64 phys_start, diff --git a/kernel-open/nvidia-uvm/uvm_pmm_gpu.h b/kernel-open/nvidia-uvm/uvm_pmm_gpu.h index c28e2e2de0..e2df1be72c 100644 --- a/kernel-open/nvidia-uvm/uvm_pmm_gpu.h +++ b/kernel-open/nvidia-uvm/uvm_pmm_gpu.h @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2015-2023 NVIDIA Corporation + Copyright (c) 2015-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -65,30 +65,30 @@ typedef enum { - UVM_CHUNK_SIZE_1 = 1ULL, - UVM_CHUNK_SIZE_2 = 2ULL, - UVM_CHUNK_SIZE_4 = 4ULL, - UVM_CHUNK_SIZE_8 = 8ULL, - UVM_CHUNK_SIZE_16 = 16ULL, - UVM_CHUNK_SIZE_32 = 32ULL, - UVM_CHUNK_SIZE_64 = 64ULL, - UVM_CHUNK_SIZE_128 = 128ULL, - UVM_CHUNK_SIZE_256 = 256ULL, - UVM_CHUNK_SIZE_512 = 512ULL, - UVM_CHUNK_SIZE_1K = 1024ULL, - UVM_CHUNK_SIZE_2K = 2*1024ULL, - UVM_CHUNK_SIZE_4K = 4*1024ULL, - UVM_CHUNK_SIZE_8K = 8*1024ULL, - UVM_CHUNK_SIZE_16K = 16*1024ULL, - UVM_CHUNK_SIZE_32K = 32*1024ULL, - UVM_CHUNK_SIZE_64K = 64*1024ULL, - UVM_CHUNK_SIZE_128K = 128*1024ULL, - UVM_CHUNK_SIZE_256K = 256*1024ULL, - UVM_CHUNK_SIZE_512K = 512*1024ULL, - UVM_CHUNK_SIZE_1M = 1024*1024ULL, - UVM_CHUNK_SIZE_2M = 2*1024*1024ULL, + UVM_CHUNK_SIZE_1 = 1, + UVM_CHUNK_SIZE_2 = 2, + UVM_CHUNK_SIZE_4 = 4, + UVM_CHUNK_SIZE_8 = 8, + UVM_CHUNK_SIZE_16 = 16, + UVM_CHUNK_SIZE_32 = 32, + UVM_CHUNK_SIZE_64 = 64, + UVM_CHUNK_SIZE_128 = 128, + UVM_CHUNK_SIZE_256 = 256, + UVM_CHUNK_SIZE_512 = 512, + UVM_CHUNK_SIZE_1K = 1024, + UVM_CHUNK_SIZE_2K = 2*1024, + UVM_CHUNK_SIZE_4K = 4*1024, + UVM_CHUNK_SIZE_8K = 8*1024, + UVM_CHUNK_SIZE_16K = 16*1024, + UVM_CHUNK_SIZE_32K = 32*1024, + UVM_CHUNK_SIZE_64K = 64*1024, + UVM_CHUNK_SIZE_128K = 128*1024, + UVM_CHUNK_SIZE_256K = 256*1024, + UVM_CHUNK_SIZE_512K = 512*1024, + UVM_CHUNK_SIZE_1M = 1024*1024, + UVM_CHUNK_SIZE_2M = 2*1024*1024, UVM_CHUNK_SIZE_MAX = UVM_CHUNK_SIZE_2M, - UVM_CHUNK_SIZE_INVALID = UVM_CHUNK_SIZE_MAX * 2ULL + UVM_CHUNK_SIZE_INVALID = UVM_CHUNK_SIZE_MAX * 2 } uvm_chunk_size_t; #define UVM_CHUNK_SIZES_MASK (uvm_chunk_sizes_mask_t)(UVM_CHUNK_SIZE_MAX | (UVM_CHUNK_SIZE_MAX-1)) diff --git a/kernel-open/nvidia-uvm/uvm_pmm_sysmem.c b/kernel-open/nvidia-uvm/uvm_pmm_sysmem.c index deae45704f..eafa04430a 100644 --- a/kernel-open/nvidia-uvm/uvm_pmm_sysmem.c +++ b/kernel-open/nvidia-uvm/uvm_pmm_sysmem.c @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2017-2023 NVIDIA Corporation + Copyright (c) 2017-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -43,7 +43,7 @@ NV_STATUS uvm_pmm_sysmem_init(void) // Ensure that only supported CPU chunk sizes are enabled. uvm_cpu_chunk_allocation_sizes &= UVM_CPU_CHUNK_SIZES; if (!uvm_cpu_chunk_allocation_sizes || !(uvm_cpu_chunk_allocation_sizes & PAGE_SIZE)) { - pr_info("Invalid value for uvm_cpu_chunk_allocation_sizes = 0x%x, using 0x%lx instead\n", + pr_info("Invalid value for uvm_cpu_chunk_allocation_sizes = 0x%x, using 0x%llx instead\n", uvm_cpu_chunk_allocation_sizes, UVM_CPU_CHUNK_SIZES); uvm_cpu_chunk_allocation_sizes = UVM_CPU_CHUNK_SIZES; @@ -461,69 +461,12 @@ static NvU32 compute_gpu_mappings_entry_index(uvm_parent_processor_mask_t *dma_a return uvm_parent_processor_mask_get_gpu_count(&subset_mask); } -static void cpu_chunk_release(nv_kref_t *kref) -{ - uvm_cpu_chunk_t *chunk = container_of(kref, uvm_cpu_chunk_t, refcount); - uvm_parent_processor_mask_t *mapping_mask; - uvm_parent_processor_id_t id; - uvm_cpu_physical_chunk_t *phys_chunk = NULL; - uvm_cpu_logical_chunk_t *logical_chunk = NULL; - - if (uvm_cpu_chunk_is_physical(chunk)) { - phys_chunk = uvm_cpu_chunk_to_physical(chunk); - uvm_assert_mutex_unlocked(&phys_chunk->lock); - mapping_mask = &phys_chunk->gpu_mappings.dma_addrs_mask; - } - else { - logical_chunk = uvm_cpu_chunk_to_logical(chunk); - mapping_mask = &logical_chunk->mapped_gpus; - } - - for_each_parent_id_in_mask(id, mapping_mask) { - uvm_parent_gpu_t *parent_gpu = uvm_parent_gpu_get(id); - uvm_cpu_chunk_unmap_parent_gpu_phys(chunk, parent_gpu); - } - - if (uvm_cpu_chunk_is_physical(chunk)) { - if (phys_chunk->gpu_mappings.max_entries > 1) - uvm_kvfree(phys_chunk->gpu_mappings.dynamic_entries); - - if (uvm_cpu_chunk_get_size(chunk) > PAGE_SIZE && - !bitmap_empty(phys_chunk->dirty_bitmap, uvm_cpu_chunk_num_pages(chunk))) - SetPageDirty(phys_chunk->common.page); - - uvm_kvfree(phys_chunk->dirty_bitmap); - - if (chunk->type != UVM_CPU_CHUNK_TYPE_HMM) - put_page(phys_chunk->common.page); - } - else { - uvm_cpu_chunk_free(logical_chunk->parent); - } - - uvm_kvfree(chunk); -} - -static void uvm_cpu_chunk_get(uvm_cpu_chunk_t *chunk) -{ - UVM_ASSERT(chunk); - nv_kref_get(&chunk->refcount); -} - -void uvm_cpu_chunk_free(uvm_cpu_chunk_t *chunk) -{ - if (!chunk) - return; - - nv_kref_put(&chunk->refcount, cpu_chunk_release); -} - static uvm_cpu_physical_chunk_t *get_physical_parent(uvm_cpu_chunk_t *chunk) { UVM_ASSERT(chunk); UVM_ASSERT(chunk->page); - while (!uvm_cpu_chunk_is_physical(chunk)) + while (uvm_cpu_chunk_is_logical(chunk)) chunk = uvm_cpu_chunk_to_logical(chunk)->parent; return uvm_cpu_chunk_to_physical(chunk); @@ -581,6 +524,7 @@ static uvm_cpu_phys_mapping_t *chunk_phys_mapping_alloc(uvm_cpu_physical_chunk_t static uvm_cpu_phys_mapping_t *chunk_phys_mapping_get(uvm_cpu_physical_chunk_t *chunk, uvm_parent_gpu_id_t id) { uvm_assert_mutex_locked(&chunk->lock); + if (uvm_parent_processor_mask_test(&chunk->gpu_mappings.dma_addrs_mask, id)) { if (chunk->gpu_mappings.max_entries == 1) { return &chunk->gpu_mappings.static_entry; @@ -598,7 +542,6 @@ static void chunk_inc_gpu_mapping(uvm_cpu_physical_chunk_t *chunk, uvm_parent_gp { uvm_cpu_phys_mapping_t *mapping; - uvm_assert_mutex_locked(&chunk->lock); mapping = chunk_phys_mapping_get(chunk, id); UVM_ASSERT(mapping); mapping->map_count++; @@ -608,7 +551,6 @@ static void chunk_dec_gpu_mapping(uvm_cpu_physical_chunk_t *chunk, uvm_parent_gp { uvm_cpu_phys_mapping_t *mapping; - uvm_assert_mutex_locked(&chunk->lock); mapping = chunk_phys_mapping_get(chunk, id); UVM_ASSERT(mapping); UVM_ASSERT(mapping->dma_addr && mapping->map_count); @@ -616,6 +558,8 @@ static void chunk_dec_gpu_mapping(uvm_cpu_physical_chunk_t *chunk, uvm_parent_gp if (mapping->map_count == 0) { uvm_parent_gpu_t *parent_gpu = uvm_parent_gpu_get(id); + UVM_ASSERT(uvm_sub_processor_mask_empty(&mapping->sub_processors)); + uvm_parent_gpu_unmap_cpu_pages(parent_gpu, mapping->dma_addr, uvm_cpu_chunk_get_size(&chunk->common)); mapping->dma_addr = 0; if (chunk->gpu_mappings.max_entries > 1) { @@ -631,7 +575,7 @@ static void chunk_dec_gpu_mapping(uvm_cpu_physical_chunk_t *chunk, uvm_parent_gp } } -NvU64 uvm_cpu_chunk_get_parent_gpu_phys_addr(uvm_cpu_chunk_t *chunk, uvm_parent_gpu_t *parent_gpu) +NvU64 uvm_cpu_chunk_get_gpu_phys_addr(uvm_cpu_chunk_t *chunk, uvm_gpu_t *gpu) { uvm_cpu_physical_chunk_t *phys_chunk = get_physical_parent(chunk); uvm_cpu_phys_mapping_t *mapping; @@ -641,36 +585,41 @@ NvU64 uvm_cpu_chunk_get_parent_gpu_phys_addr(uvm_cpu_chunk_t *chunk, uvm_parent_ if (uvm_cpu_chunk_is_logical(chunk)) { uvm_cpu_logical_chunk_t *logical_chunk = uvm_cpu_chunk_to_logical(chunk); - if (!uvm_parent_processor_mask_test(&logical_chunk->mapped_gpus, parent_gpu->id)) + if (!uvm_processor_mask_test(&logical_chunk->mapped_gpus, gpu->id)) return 0; parent_offset = cpu_chunk_get_phys_index(logical_chunk); } uvm_mutex_lock(&phys_chunk->lock); - mapping = chunk_phys_mapping_get(phys_chunk, parent_gpu->id); - if (mapping) + mapping = chunk_phys_mapping_get(phys_chunk, gpu->parent->id); + if (mapping && + (uvm_cpu_chunk_is_logical(chunk) || + uvm_sub_processor_mask_test(&mapping->sub_processors, uvm_id_sub_processor_index(gpu->id)))) dma_addr = mapping->dma_addr + (parent_offset * PAGE_SIZE); - uvm_mutex_unlock(&phys_chunk->lock); + return dma_addr; } -// Create a DMA mapping for the chunk on the given parent GPU. This will map the -// entire parent physical chunk on the GPU. +// Create a DMA mapping for the chunk on the given GPU. This will map the +// entire physical chunk on the parent GPU and record that a given MIG +// partition is using the mapping. // // Returns NV_OK on success. On error, any of the errors returned by // uvm_parent_gpu_map_cpu_pages() can be returned. In the case that the DMA // mapping structure could not be allocated, NV_ERR_NO_MEMORY is returned. -static NV_STATUS cpu_chunk_map_parent_gpu_phys(uvm_cpu_chunk_t *chunk, uvm_parent_gpu_t *parent_gpu) +static NV_STATUS cpu_chunk_map_gpu_phys(uvm_cpu_chunk_t *chunk, uvm_gpu_t *gpu) { + uvm_parent_gpu_t *parent_gpu = gpu->parent; uvm_cpu_physical_chunk_t *phys_chunk; uvm_cpu_logical_chunk_t *logical_chunk = NULL; + uvm_cpu_phys_mapping_t *mapping; NV_STATUS status = NV_OK; if (uvm_cpu_chunk_is_logical(chunk)) { logical_chunk = uvm_cpu_chunk_to_logical(chunk); - if (uvm_parent_processor_mask_test(&logical_chunk->mapped_gpus, parent_gpu->id)) + if (uvm_processor_mask_test(&logical_chunk->mapped_gpus, gpu->id)) return status; } @@ -679,7 +628,6 @@ static NV_STATUS cpu_chunk_map_parent_gpu_phys(uvm_cpu_chunk_t *chunk, uvm_paren if (!uvm_parent_processor_mask_test(&phys_chunk->gpu_mappings.dma_addrs_mask, parent_gpu->id)) { uvm_chunk_size_t chunk_size = uvm_cpu_chunk_get_size(&phys_chunk->common); - uvm_cpu_phys_mapping_t *mapping; NvU64 dma_addr; status = uvm_parent_gpu_map_cpu_pages(parent_gpu, phys_chunk->common.page, chunk_size, &dma_addr); @@ -695,39 +643,59 @@ static NV_STATUS cpu_chunk_map_parent_gpu_phys(uvm_cpu_chunk_t *chunk, uvm_paren mapping->dma_addr = dma_addr; mapping->map_count = 1; + uvm_sub_processor_mask_zero(&mapping->sub_processors); + if (!logical_chunk) + uvm_sub_processor_mask_set(&mapping->sub_processors, uvm_id_sub_processor_index(gpu->id)); + uvm_parent_processor_mask_set(&phys_chunk->gpu_mappings.dma_addrs_mask, parent_gpu->id); } else { - // The mapping count on the physical chunk is only increased when - // mapping logical chunks. - if (uvm_cpu_chunk_is_logical(chunk)) - chunk_inc_gpu_mapping(phys_chunk, parent_gpu->id); + mapping = chunk_phys_mapping_get(phys_chunk, parent_gpu->id); + UVM_ASSERT(mapping); + + // Increment the map_count for logical chunks or the first time a + // MIG partition is sharing a physical chunk. + if (logical_chunk || + !uvm_sub_processor_mask_test_and_set(&mapping->sub_processors, uvm_id_sub_processor_index(gpu->id))) + mapping->map_count++; + } + + if (logical_chunk) { + uvm_processor_mask_set(&logical_chunk->mapped_gpus, gpu->id); + UVM_ASSERT(uvm_sub_processor_mask_empty(&mapping->sub_processors)); + } + else { + UVM_ASSERT(!uvm_sub_processor_mask_empty(&mapping->sub_processors)); + UVM_ASSERT(uvm_sub_processor_mask_get_count(&mapping->sub_processors) == mapping->map_count); } done: uvm_mutex_unlock(&phys_chunk->lock); - if (status == NV_OK && uvm_cpu_chunk_is_logical(chunk)) - uvm_parent_processor_mask_set(&logical_chunk->mapped_gpus, parent_gpu->id); - return status; } -void uvm_cpu_chunk_unmap_parent_gpu_phys(uvm_cpu_chunk_t *chunk, uvm_parent_gpu_t *parent_gpu) +static void cpu_chunk_unmap_gpu_phys(uvm_cpu_chunk_t *chunk, uvm_gpu_id_t gpu_id) { - uvm_cpu_physical_chunk_t *phys_chunk; - uvm_cpu_logical_chunk_t *logical_chunk; + uvm_cpu_physical_chunk_t *phys_chunk = get_physical_parent(chunk); + uvm_parent_gpu_id_t id = uvm_parent_gpu_id_from_gpu_id(gpu_id); + + uvm_mutex_lock(&phys_chunk->lock); if (uvm_cpu_chunk_is_logical(chunk)) { - logical_chunk = uvm_cpu_chunk_to_logical(chunk); - if (!uvm_parent_processor_mask_test_and_clear(&logical_chunk->mapped_gpus, parent_gpu->id)) - return; + uvm_processor_mask_t *mapping_mask = &uvm_cpu_chunk_to_logical(chunk)->mapped_gpus; + + if (uvm_processor_mask_test_and_clear(mapping_mask, gpu_id)) + chunk_dec_gpu_mapping(phys_chunk, id); } + else { + if (uvm_parent_processor_mask_test(&phys_chunk->gpu_mappings.dma_addrs_mask, id)) { + uvm_cpu_phys_mapping_t *mapping = chunk_phys_mapping_get(phys_chunk, id); - phys_chunk = get_physical_parent(chunk); - uvm_mutex_lock(&phys_chunk->lock); - if (uvm_parent_processor_mask_test(&phys_chunk->gpu_mappings.dma_addrs_mask, parent_gpu->id)) - chunk_dec_gpu_mapping(phys_chunk, parent_gpu->id); + if (uvm_sub_processor_mask_test_and_clear(&mapping->sub_processors, uvm_id_sub_processor_index(gpu_id))) + chunk_dec_gpu_mapping(phys_chunk, id); + } + } uvm_mutex_unlock(&phys_chunk->lock); } @@ -737,17 +705,112 @@ NV_STATUS uvm_cpu_chunk_map_gpu(uvm_cpu_chunk_t *chunk, uvm_gpu_t *gpu) NV_STATUS status; uvm_chunk_size_t chunk_size = uvm_cpu_chunk_get_size(chunk); - status = cpu_chunk_map_parent_gpu_phys(chunk, gpu->parent); + status = cpu_chunk_map_gpu_phys(chunk, gpu); if (status != NV_OK) return status; - status = uvm_mmu_sysmem_map(gpu, uvm_cpu_chunk_get_parent_gpu_phys_addr(chunk, gpu->parent), chunk_size); + status = uvm_mmu_sysmem_map(gpu, uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu), chunk_size); if (status != NV_OK) - uvm_cpu_chunk_unmap_parent_gpu_phys(chunk, gpu->parent); + cpu_chunk_unmap_gpu_phys(chunk, gpu->id); return status; } +void uvm_cpu_chunk_unmap_gpu(uvm_cpu_chunk_t *chunk, uvm_gpu_t *gpu) +{ + cpu_chunk_unmap_gpu_phys(chunk, gpu->id); + + // Note: there is no corresponding uvm_mmu_sysmem_unmap() for + // uvm_mmu_sysmem_map(). +} + +static void cpu_logical_chunk_release(uvm_cpu_logical_chunk_t *logical_chunk) +{ + uvm_cpu_physical_chunk_t *phys_chunk = get_physical_parent(logical_chunk->parent); + uvm_processor_id_t gpu_id; + + uvm_mutex_lock(&phys_chunk->lock); + + for_each_id_in_mask(gpu_id, &logical_chunk->mapped_gpus) + chunk_dec_gpu_mapping(phys_chunk, uvm_parent_gpu_id_from_gpu_id(gpu_id)); + + uvm_mutex_unlock(&phys_chunk->lock); + + uvm_cpu_chunk_free(logical_chunk->parent); +} + +static void cpu_physical_chunk_release(uvm_cpu_chunk_t *chunk) +{ + uvm_cpu_physical_chunk_t *phys_chunk = uvm_cpu_chunk_to_physical(chunk); + uvm_parent_processor_id_t id; + + uvm_assert_mutex_unlocked(&phys_chunk->lock); + + // There should be no other threads using this chunk but we lock it because + // of assertions in chunk_phys_mapping_get() and chunk_dec_gpu_mapping(). + uvm_mutex_lock(&phys_chunk->lock); + + for_each_parent_id_in_mask(id, &phys_chunk->gpu_mappings.dma_addrs_mask) { + uvm_cpu_phys_mapping_t *mapping = chunk_phys_mapping_get(phys_chunk, id); + NvU32 count; + + UVM_ASSERT(mapping); + UVM_ASSERT(!uvm_sub_processor_mask_empty(&mapping->sub_processors)); + + // Get a count of set bits in the sub_processors mask then clear it so + // that chunk_dec_gpu_mapping() sees an empty mask when map_count == 0. + // Using for_each_sub_processor_in_mask could try to dereference + // mapping after map_count == 0 in the loop below. + count = uvm_sub_processor_mask_get_count(&mapping->sub_processors); + uvm_sub_processor_mask_zero(&mapping->sub_processors); + + for (; count; count--) + chunk_dec_gpu_mapping(phys_chunk, id); + } + + uvm_mutex_unlock(&phys_chunk->lock); + + UVM_ASSERT(uvm_parent_processor_mask_empty(&phys_chunk->gpu_mappings.dma_addrs_mask)); + + if (phys_chunk->gpu_mappings.max_entries > 1) + uvm_kvfree(phys_chunk->gpu_mappings.dynamic_entries); + + if (uvm_cpu_chunk_get_size(chunk) > PAGE_SIZE && + !bitmap_empty(phys_chunk->dirty_bitmap, uvm_cpu_chunk_num_pages(chunk))) + SetPageDirty(chunk->page); + + uvm_kvfree(phys_chunk->dirty_bitmap); + + if (chunk->type != UVM_CPU_CHUNK_TYPE_HMM) + put_page(chunk->page); +} + +static void cpu_chunk_release(nv_kref_t *kref) +{ + uvm_cpu_chunk_t *chunk = container_of(kref, uvm_cpu_chunk_t, refcount); + + if (uvm_cpu_chunk_is_logical(chunk)) + cpu_logical_chunk_release(uvm_cpu_chunk_to_logical(chunk)); + else + cpu_physical_chunk_release(chunk); + + uvm_kvfree(chunk); +} + +static void uvm_cpu_chunk_get(uvm_cpu_chunk_t *chunk) +{ + UVM_ASSERT(chunk); + nv_kref_get(&chunk->refcount); +} + +void uvm_cpu_chunk_free(uvm_cpu_chunk_t *chunk) +{ + if (!chunk) + return; + + nv_kref_put(&chunk->refcount, cpu_chunk_release); +} + static struct page *uvm_cpu_chunk_alloc_page(uvm_chunk_size_t alloc_size, int nid, uvm_cpu_chunk_alloc_flags_t alloc_flags) @@ -876,14 +939,37 @@ int uvm_cpu_chunk_get_numa_node(uvm_cpu_chunk_t *chunk) return page_to_nid(chunk->page); } +// Convert the mask of DMA mapped parent GPUs and the sub-processor mask into +// one uvm_processor_mask_t in 'dma_map_mask'. +static void get_dma_map_mask(uvm_cpu_physical_chunk_t *chunk, uvm_processor_mask_t *dma_map_mask) +{ + uvm_parent_processor_id_t id; + NvU32 sub_index; + + uvm_assert_mutex_locked(&chunk->lock); + + for_each_parent_id_in_mask(id, &chunk->gpu_mappings.dma_addrs_mask) { + uvm_cpu_phys_mapping_t *mapping = chunk_phys_mapping_get(chunk, id); + + for_each_sub_processor_index_in_mask(sub_index, &mapping->sub_processors) { + uvm_processor_id_t gpu_id = uvm_gpu_id_from_sub_processor(id, sub_index); + + uvm_sub_processor_mask_clear(&mapping->sub_processors, sub_index); + uvm_processor_mask_set(dma_map_mask, gpu_id); + } + + UVM_ASSERT(uvm_sub_processor_mask_empty(&mapping->sub_processors)); + } +} + NV_STATUS uvm_cpu_chunk_split(uvm_cpu_chunk_t *chunk, uvm_cpu_chunk_t **new_chunks) { NV_STATUS status = NV_OK; uvm_cpu_logical_chunk_t *new_chunk; uvm_cpu_physical_chunk_t *phys_chunk = get_physical_parent(chunk); uvm_cpu_logical_chunk_t *logical_chunk = NULL; - uvm_parent_processor_id_t id; - uvm_parent_processor_mask_t *dma_map_mask; + uvm_processor_id_t gpu_id; + uvm_processor_mask_t *dma_map_mask = NULL; uvm_chunk_size_t new_size; size_t num_new_chunks; size_t num_subchunk_pages; @@ -902,21 +988,20 @@ NV_STATUS uvm_cpu_chunk_split(uvm_cpu_chunk_t *chunk, uvm_cpu_chunk_t **new_chun // Get the largest size below the size of the input chunk. new_size = uvm_chunk_find_prev_size(uvm_cpu_chunk_get_allocation_sizes(), uvm_cpu_chunk_get_size(chunk)); + UVM_ASSERT(new_size); UVM_ASSERT(new_size != UVM_CHUNK_SIZE_INVALID); num_new_chunks = uvm_cpu_chunk_get_size(chunk) / new_size; num_subchunk_pages = new_size / PAGE_SIZE; - if (uvm_cpu_chunk_is_physical(chunk)) { - dma_map_mask = &phys_chunk->gpu_mappings.dma_addrs_mask; - } - else { + if (uvm_cpu_chunk_is_logical(chunk)) { logical_chunk = uvm_cpu_chunk_to_logical(chunk); dma_map_mask = &logical_chunk->mapped_gpus; } uvm_mutex_lock(&phys_chunk->lock); + for (i = 0; i < num_new_chunks; i++) { - new_chunk = uvm_kvmalloc_zero(sizeof(*logical_chunk)); + new_chunk = uvm_kvmalloc_zero(sizeof(*new_chunk)); if (!new_chunk) { uvm_mutex_unlock(&phys_chunk->lock); status = NV_ERR_NO_MEMORY; @@ -929,19 +1014,25 @@ NV_STATUS uvm_cpu_chunk_split(uvm_cpu_chunk_t *chunk, uvm_cpu_chunk_t **new_chun nv_kref_init(&new_chunk->common.refcount); new_chunk->parent = chunk; uvm_cpu_chunk_get(new_chunk->parent); - for_each_parent_id_in_mask(id, dma_map_mask) - chunk_inc_gpu_mapping(phys_chunk, id); - uvm_parent_processor_mask_copy(&new_chunk->mapped_gpus, dma_map_mask); + if (i == 0 && !logical_chunk) { + dma_map_mask = &new_chunk->mapped_gpus; + get_dma_map_mask(phys_chunk, dma_map_mask); + } + else { + uvm_processor_mask_copy(&new_chunk->mapped_gpus, dma_map_mask); + } + for_each_id_in_mask(gpu_id, dma_map_mask) + chunk_inc_gpu_mapping(phys_chunk, uvm_parent_gpu_id_from_gpu_id(gpu_id)); new_chunks[i] = &new_chunk->common; } // Release the references that are held by the chunk being split. - for_each_parent_id_in_mask(id, dma_map_mask) - chunk_dec_gpu_mapping(phys_chunk, id); + for_each_id_in_mask(gpu_id, dma_map_mask) + chunk_dec_gpu_mapping(phys_chunk, uvm_parent_gpu_id_from_gpu_id(gpu_id)); // If the chunk being split is a logical chunk clear it's mapped_gpus mask. - if (uvm_cpu_chunk_is_logical(chunk)) - uvm_parent_processor_mask_zero(&logical_chunk->mapped_gpus); + if (logical_chunk) + uvm_processor_mask_zero(&logical_chunk->mapped_gpus); uvm_mutex_unlock(&phys_chunk->lock); @@ -963,7 +1054,7 @@ static bool verify_merging_chunks(uvm_cpu_chunk_t **chunks, size_t num_chunks) { uvm_cpu_logical_chunk_t *logical_chunk; uvm_cpu_chunk_t *first_chunk_parent; - uvm_parent_processor_mask_t *first_chunk_mapped_gpus; + uvm_processor_mask_t *first_chunk_mapped_gpus; uvm_chunk_size_t first_chunk_size; size_t i; @@ -994,7 +1085,7 @@ static bool verify_merging_chunks(uvm_cpu_chunk_t **chunks, size_t num_chunks) // 2.1 All mappings to GPUs in each of child chunks' masks that are // not also present in the parent chunk's mask are destroyed. // 2.2 mapped_gpus mask of the parent chunk remains unmodified. - UVM_ASSERT(uvm_parent_processor_mask_equal(&logical_chunk->mapped_gpus, first_chunk_mapped_gpus)); + UVM_ASSERT(uvm_processor_mask_equal(&logical_chunk->mapped_gpus, first_chunk_mapped_gpus)); } return true; @@ -1005,14 +1096,14 @@ uvm_cpu_chunk_t *uvm_cpu_chunk_merge(uvm_cpu_chunk_t **chunks) uvm_cpu_chunk_t *parent; uvm_cpu_logical_chunk_t *logical_chunk; uvm_cpu_physical_chunk_t *phys_chunk; - uvm_parent_processor_id_t id; + uvm_processor_id_t gpu_id; uvm_chunk_size_t chunk_size; uvm_chunk_size_t parent_chunk_size; size_t num_merge_chunks; size_t i; UVM_ASSERT(chunks); - UVM_ASSERT(!uvm_cpu_chunk_is_physical(chunks[0])); + UVM_ASSERT(uvm_cpu_chunk_is_logical(chunks[0])); logical_chunk = uvm_cpu_chunk_to_logical(chunks[0]); parent = logical_chunk->parent; @@ -1033,11 +1124,22 @@ uvm_cpu_chunk_t *uvm_cpu_chunk_merge(uvm_cpu_chunk_t **chunks) phys_chunk = get_physical_parent(chunks[0]); uvm_mutex_lock(&phys_chunk->lock); - for_each_parent_id_in_mask(id, &logical_chunk->mapped_gpus) - chunk_inc_gpu_mapping(phys_chunk, id); - if (!uvm_cpu_chunk_is_physical(parent)) - uvm_parent_processor_mask_copy(&uvm_cpu_chunk_to_logical(parent)->mapped_gpus, &logical_chunk->mapped_gpus); + for_each_id_in_mask(gpu_id, &logical_chunk->mapped_gpus) + chunk_inc_gpu_mapping(phys_chunk, uvm_parent_gpu_id_from_gpu_id(gpu_id)); + + if (uvm_cpu_chunk_is_logical(parent)) { + uvm_processor_mask_copy(&uvm_cpu_chunk_to_logical(parent)->mapped_gpus, &logical_chunk->mapped_gpus); + } + else { + // Restore the mapping->sub_processors mask for each mapped GPU. + for_each_id_in_mask(gpu_id, &logical_chunk->mapped_gpus) { + uvm_cpu_phys_mapping_t *mapping = chunk_phys_mapping_get(phys_chunk, uvm_parent_gpu_id_from_gpu_id(gpu_id)); + + UVM_ASSERT(mapping); + uvm_sub_processor_mask_set(&mapping->sub_processors, uvm_id_sub_processor_index(gpu_id)); + } + } uvm_mutex_unlock(&phys_chunk->lock); diff --git a/kernel-open/nvidia-uvm/uvm_pmm_sysmem.h b/kernel-open/nvidia-uvm/uvm_pmm_sysmem.h index 1f9c122069..15d206a9dc 100644 --- a/kernel-open/nvidia-uvm/uvm_pmm_sysmem.h +++ b/kernel-open/nvidia-uvm/uvm_pmm_sysmem.h @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2017-2023 NVIDIA Corporation + Copyright (c) 2017-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -246,8 +246,19 @@ struct uvm_cpu_chunk_struct typedef struct { + // Physical GPU DMA address of the CPU chunk. NvU64 dma_addr; + + // Reference count of all sub_processors using this mapping across logical + // and physical chunks. NvU32 map_count; + + // Mask of MIG instances or physical GPU. + // This is only valid for physical CPU chunks that have not been split into + // logical chunks. When the chunk is split, all the + // uvm_cpu_logical_chunk_t::mapped_gpus masks have a bit set for each + // count in map_count and sub_processors is set to zero. + uvm_sub_processor_mask_t sub_processors; } uvm_cpu_phys_mapping_t; typedef struct @@ -304,7 +315,9 @@ typedef struct // Pointer to the parent chunk (which could also be a logical chunk). uvm_cpu_chunk_t *parent; - uvm_parent_processor_mask_t mapped_gpus; + + // This is a reference per bit but also recorded in mapping->map_count. + uvm_processor_mask_t mapped_gpus; } uvm_cpu_logical_chunk_t; // Return the set of allowed CPU chunk allocation sizes. @@ -417,15 +430,15 @@ void uvm_cpu_chunk_free(uvm_cpu_chunk_t *chunk); // For more details see uvm_mmu_sysmem_map(). NV_STATUS uvm_cpu_chunk_map_gpu(uvm_cpu_chunk_t *chunk, uvm_gpu_t *gpu); -// Destroy a CPU chunk's DMA mapping for the parent GPU. +// Destroy a CPU chunk's DMA mapping for the given GPU. // If chunk is a logical chunk, this call may not necessarily destroy the DMA -// mapping of the parent physical chunk since all logical chunks share the -// parent's DMA mapping. -void uvm_cpu_chunk_unmap_parent_gpu_phys(uvm_cpu_chunk_t *chunk, uvm_parent_gpu_t *parent_gpu); +// mapping of the parent physical chunk since all logical chunks and MIG +// partitions share the parent's DMA mapping. +void uvm_cpu_chunk_unmap_gpu(uvm_cpu_chunk_t *chunk, uvm_gpu_t *gpu); // Get the CPU chunk's DMA mapping address for the specified GPU ID. // If there is no mapping for the GPU, 0 is returned. -NvU64 uvm_cpu_chunk_get_parent_gpu_phys_addr(uvm_cpu_chunk_t *chunk, uvm_parent_gpu_t *parent_gpu); +NvU64 uvm_cpu_chunk_get_gpu_phys_addr(uvm_cpu_chunk_t *chunk, uvm_gpu_t *gpu); // Split a CPU chunk into a set of CPU chunks of the next size down from the set // of enabled CPU chunk sizes. diff --git a/kernel-open/nvidia-uvm/uvm_pmm_sysmem_test.c b/kernel-open/nvidia-uvm/uvm_pmm_sysmem_test.c index 0d1b971a90..0486960632 100644 --- a/kernel-open/nvidia-uvm/uvm_pmm_sysmem_test.c +++ b/kernel-open/nvidia-uvm/uvm_pmm_sysmem_test.c @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2017-2023 NVIDIA Corporation + Copyright (c) 2017-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -626,7 +626,7 @@ static NV_STATUS test_cpu_chunk_mapping_access(uvm_cpu_chunk_t *chunk, uvm_gpu_t TEST_NV_CHECK_RET(cpu_chunk_map_on_cpu(chunk, (void **)&cpu_addr)); memset(cpu_addr, 0, chunk_size); - dma_addr = uvm_cpu_chunk_get_parent_gpu_phys_addr(chunk, gpu->parent); + dma_addr = uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu); gpu_addr = uvm_gpu_address_copy(gpu, uvm_gpu_phys_address(UVM_APERTURE_SYS, dma_addr)); TEST_NV_CHECK_GOTO(uvm_push_begin_acquire(gpu->channel_manager, @@ -733,21 +733,21 @@ static NV_STATUS test_cpu_chunk_mapping_basic_verify(uvm_gpu_t *gpu, // - no GPU mapping address. TEST_CHECK_GOTO(phys_chunk->gpu_mappings.max_entries == 1, done); TEST_CHECK_GOTO(uvm_parent_processor_mask_get_gpu_count(&phys_chunk->gpu_mappings.dma_addrs_mask) == 0, done); - TEST_CHECK_GOTO(uvm_cpu_chunk_get_parent_gpu_phys_addr(chunk, gpu->parent) == 0, done); + TEST_CHECK_GOTO(uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu) == 0, done); TEST_NV_CHECK_GOTO(uvm_cpu_chunk_map_gpu(chunk, gpu), done); // Test basic access. TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_access(chunk, gpu), done); // Test double map is harmless. - dma_addr = uvm_cpu_chunk_get_parent_gpu_phys_addr(chunk, gpu->parent); + dma_addr = uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu); TEST_NV_CHECK_GOTO(uvm_cpu_chunk_map_gpu(chunk, gpu), done); - TEST_CHECK_GOTO(uvm_cpu_chunk_get_parent_gpu_phys_addr(chunk, gpu->parent) == dma_addr, done); + TEST_CHECK_GOTO(uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu) == dma_addr, done); TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_access(chunk, gpu), done); // Test unmap, remap. - uvm_cpu_chunk_unmap_parent_gpu_phys(chunk, gpu->parent); - TEST_CHECK_GOTO(uvm_cpu_chunk_get_parent_gpu_phys_addr(chunk, gpu->parent) == 0, done); + uvm_cpu_chunk_unmap_gpu(chunk, gpu); + TEST_CHECK_GOTO(uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu) == 0, done); TEST_NV_CHECK_GOTO(uvm_cpu_chunk_map_gpu(chunk, gpu), done); TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_access(chunk, gpu), done); @@ -768,6 +768,39 @@ static NV_STATUS test_cpu_chunk_mapping_basic(uvm_gpu_t *gpu, uvm_cpu_chunk_allo return NV_OK; } +// TODO: Bug 4351121: This won't actually test anything until uvm_test +// enumerates multiple MIG instances. +static NV_STATUS test_cpu_chunk_mig(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1) +{ + NV_STATUS status = NV_OK; + uvm_cpu_chunk_t *chunk; + uvm_cpu_physical_chunk_t *phys_chunk; + NvU64 dma_addr_gpu0; + + UVM_ASSERT(gpu0->parent == gpu1->parent); + + TEST_NV_CHECK_RET(test_cpu_chunk_alloc(PAGE_SIZE, UVM_CPU_CHUNK_ALLOC_FLAGS_NONE, NUMA_NO_NODE, &chunk)); + phys_chunk = uvm_cpu_chunk_to_physical(chunk); + + TEST_NV_CHECK_GOTO(uvm_cpu_chunk_map_gpu(chunk, gpu0), done); + TEST_NV_CHECK_GOTO(uvm_cpu_chunk_map_gpu(chunk, gpu1), done); + TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_access(chunk, gpu0), done); + TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_access(chunk, gpu1), done); + + // MIG instances in the same physical GPU share the same DMA addresses. + dma_addr_gpu0 = uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu0); + TEST_CHECK_GOTO(uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu1) == dma_addr_gpu0, done); + + // Unmapping one GPU shouldn't affect the other. + uvm_cpu_chunk_unmap_gpu(chunk, gpu0); + TEST_CHECK_GOTO(uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu0) == 0, done); + TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_access(chunk, gpu1), done); + +done: + uvm_cpu_chunk_free(chunk); + return status; +} + static NV_STATUS test_cpu_chunk_mapping_array(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1, uvm_gpu_t *gpu2) { NV_STATUS status = NV_OK; @@ -783,8 +816,8 @@ static NV_STATUS test_cpu_chunk_mapping_array(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1, TEST_NV_CHECK_GOTO(uvm_cpu_chunk_map_gpu(chunk, gpu2), done); TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_access(chunk, gpu1), done); TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_access(chunk, gpu2), done); - dma_addr_gpu1 = uvm_cpu_chunk_get_parent_gpu_phys_addr(chunk, gpu1->parent); - uvm_cpu_chunk_unmap_parent_gpu_phys(chunk, gpu2->parent); + dma_addr_gpu1 = uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu1); + uvm_cpu_chunk_unmap_gpu(chunk, gpu2); TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_access(chunk, gpu1), done); TEST_NV_CHECK_GOTO(uvm_cpu_chunk_map_gpu(chunk, gpu0), done); TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_access(chunk, gpu0), done); @@ -798,7 +831,9 @@ static NV_STATUS test_cpu_chunk_mapping_array(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1, // GPU1. It's true that we may get a false negative if both addresses // happened to alias and we had a bug in how the addresses are shifted in // the dense array, but that's better than intermittent failure. - TEST_CHECK_GOTO(uvm_cpu_chunk_get_parent_gpu_phys_addr(chunk, gpu1->parent) == dma_addr_gpu1, done); + // Also note that multiple MIG instances in the same physical GPU share the + // parent's physical DMA mapping. + TEST_CHECK_GOTO(uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu1) == dma_addr_gpu1, done); done: uvm_cpu_chunk_free(chunk); @@ -828,7 +863,7 @@ static NV_STATUS do_test_cpu_chunk_split_and_merge(uvm_cpu_chunk_t *chunk, uvm_g TEST_NV_CHECK_GOTO(uvm_cpu_chunk_map_gpu(chunk, gpu), done_free); TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_access(chunk, gpu), done_free); - uvm_cpu_chunk_unmap_parent_gpu_phys(chunk, gpu->parent); + uvm_cpu_chunk_unmap_gpu(chunk, gpu); TEST_NV_CHECK_GOTO(uvm_cpu_chunk_split(chunk, split_chunks), done_free); TEST_CHECK_GOTO(nv_kref_read(&chunk->refcount) == num_split_chunks, done); @@ -845,13 +880,14 @@ static NV_STATUS do_test_cpu_chunk_split_and_merge(uvm_cpu_chunk_t *chunk, uvm_g merged_chunk = uvm_cpu_chunk_merge(split_chunks); TEST_CHECK_GOTO(uvm_cpu_chunk_get_size(merged_chunk) == size, done_free); TEST_CHECK_GOTO(merged_chunk == chunk, done_free); + TEST_CHECK_GOTO(nv_kref_read(&chunk->refcount) == 1, done_free); // Since all logical chunks were mapped, the entire merged chunk should // be accessible without needing to map it. TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_access(merged_chunk, gpu), done_free); // Test that GPU mappings are transferred after a split - phys_dma_addr = uvm_cpu_chunk_get_parent_gpu_phys_addr(chunk, gpu->parent); + phys_dma_addr = uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu); TEST_NV_CHECK_GOTO(uvm_cpu_chunk_split(chunk, split_chunks), done_free); @@ -859,9 +895,9 @@ static NV_STATUS do_test_cpu_chunk_split_and_merge(uvm_cpu_chunk_t *chunk, uvm_g NvU64 dma_addr; TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_access(split_chunks[i], gpu), done); - dma_addr = uvm_cpu_chunk_get_parent_gpu_phys_addr(split_chunks[i], gpu->parent); + dma_addr = uvm_cpu_chunk_get_gpu_phys_addr(split_chunks[i], gpu); TEST_CHECK_GOTO(dma_addr == phys_dma_addr + (i * split_size), done); - uvm_cpu_chunk_unmap_parent_gpu_phys(split_chunks[i], gpu->parent); + uvm_cpu_chunk_unmap_gpu(split_chunks[i], gpu); } // Test that mapping one logical chunk does not affect others. @@ -871,7 +907,7 @@ static NV_STATUS do_test_cpu_chunk_split_and_merge(uvm_cpu_chunk_t *chunk, uvm_g for (i = 0; i < num_split_chunks; i++) { if (i != map_chunk) - TEST_CHECK_GOTO(uvm_cpu_chunk_get_parent_gpu_phys_addr(split_chunks[i], gpu->parent) == 0, done); + TEST_CHECK_GOTO(uvm_cpu_chunk_get_gpu_phys_addr(split_chunks[i], gpu) == 0, done); } if (split_size > PAGE_SIZE) { @@ -927,6 +963,118 @@ static NV_STATUS test_cpu_chunk_split_and_merge(uvm_gpu_t *gpu) return NV_OK; } +static NV_STATUS do_test_cpu_chunk_split_and_merge_2(uvm_cpu_chunk_t *chunk, uvm_gpu_t *gpu0, uvm_gpu_t *gpu1) +{ + NV_STATUS status = NV_OK; + uvm_chunk_size_t size = uvm_cpu_chunk_get_size(chunk); + uvm_chunk_sizes_mask_t alloc_sizes = uvm_cpu_chunk_get_allocation_sizes(); + size_t num_split_chunks; + uvm_cpu_chunk_t **split_chunks; + uvm_cpu_chunk_t *merged_chunk; + uvm_chunk_size_t split_size; + size_t i; + + split_size = uvm_chunk_find_prev_size(alloc_sizes, size); + UVM_ASSERT(split_size != UVM_CHUNK_SIZE_INVALID); + num_split_chunks = size / split_size; + split_chunks = uvm_kvmalloc_zero(num_split_chunks * sizeof(*split_chunks)); + + if (!split_chunks) + return NV_ERR_NO_MEMORY; + + // Map both GPUs. + TEST_NV_CHECK_GOTO(uvm_cpu_chunk_map_gpu(chunk, gpu0), done_free); + TEST_NV_CHECK_GOTO(uvm_cpu_chunk_map_gpu(chunk, gpu1), done_free); + TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_access(chunk, gpu0), done_free); + TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_access(chunk, gpu1), done_free); + + // Then split. + TEST_NV_CHECK_GOTO(uvm_cpu_chunk_split(chunk, split_chunks), done_free); + TEST_CHECK_GOTO(nv_kref_read(&chunk->refcount) == num_split_chunks, done); + + // Unmap gpu0 from all split chunks. + for (i = 0; i < num_split_chunks; i++) { + TEST_CHECK_GOTO(split_chunks[i], done); + TEST_CHECK_GOTO(uvm_cpu_chunk_is_logical(split_chunks[i]), done); + TEST_CHECK_GOTO(uvm_cpu_chunk_get_size(split_chunks[i]) == split_size, done); + uvm_cpu_chunk_unmap_gpu(split_chunks[i], gpu0); + TEST_CHECK_GOTO(uvm_cpu_chunk_get_gpu_phys_addr(split_chunks[i], gpu0) == 0, done); + + // Test that gpu1 still has access. + TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_access(split_chunks[i], gpu1), done); + } + + // Test CPU chunk merging. + merged_chunk = uvm_cpu_chunk_merge(split_chunks); + TEST_CHECK_GOTO(uvm_cpu_chunk_get_size(merged_chunk) == size, done_free); + TEST_CHECK_GOTO(merged_chunk == chunk, done_free); + TEST_CHECK_GOTO(nv_kref_read(&chunk->refcount) == 1, done_free); + + // Since all logical chunks were mapped, the entire merged chunk should + // be accessible without needing to map it. + TEST_CHECK_GOTO(uvm_cpu_chunk_get_gpu_phys_addr(merged_chunk, gpu0) == 0, done_free); + TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_access(merged_chunk, gpu1), done_free); + + // Unmap gpu1 so we start with a fully unmapped physical chunk. + uvm_cpu_chunk_unmap_gpu(chunk, gpu1); + + // Split the physical chunk. + TEST_NV_CHECK_GOTO(uvm_cpu_chunk_split(chunk, split_chunks), done_free); + + // Now map everything. + for (i = 0; i < num_split_chunks; i++) { + TEST_NV_CHECK_GOTO(uvm_cpu_chunk_map_gpu(split_chunks[i], gpu0), done); + TEST_NV_CHECK_GOTO(uvm_cpu_chunk_map_gpu(split_chunks[i], gpu1), done); + } + + // Test CPU chunk merging with everything mapped. + merged_chunk = uvm_cpu_chunk_merge(split_chunks); + + // At this point, all split chunks have been merged. + num_split_chunks = 0; + + TEST_CHECK_GOTO(uvm_cpu_chunk_get_size(merged_chunk) == size, done_free); + TEST_CHECK_GOTO(merged_chunk == chunk, done_free); + + // Since all logical chunks were mapped, the entire merged chunk should + // be accessible without needing to map it. + TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_access(merged_chunk, gpu0), done_free); + TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_access(merged_chunk, gpu1), done_free); + +done: + for (i = 0; i < num_split_chunks; i++) + uvm_cpu_chunk_free(split_chunks[i]); + +done_free: + uvm_kvfree(split_chunks); + + return status; +} + +static NV_STATUS test_cpu_chunk_split_and_merge_2(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1) +{ + uvm_chunk_sizes_mask_t alloc_sizes = uvm_cpu_chunk_get_allocation_sizes(); + uvm_chunk_size_t size; + + size = uvm_chunk_find_next_size(alloc_sizes, PAGE_SIZE); + for_each_chunk_size_from(size, alloc_sizes) { + uvm_cpu_chunk_t *chunk; + NV_STATUS status; + + // It is possible that the allocation fails due to lack of large pages + // rather than an API issue, which will result in a false negative. + // However, that should be very rare. + TEST_NV_CHECK_RET(test_cpu_chunk_alloc(size, UVM_CPU_CHUNK_ALLOC_FLAGS_NONE, NUMA_NO_NODE, &chunk)); + status = do_test_cpu_chunk_split_and_merge_2(chunk, gpu0, gpu1); + uvm_cpu_chunk_free(chunk); + + if (status != NV_OK) + return status; + } + + return NV_OK; +} + static NV_STATUS test_cpu_chunk_dirty_split(uvm_cpu_chunk_t *chunk) { uvm_chunk_size_t size = uvm_cpu_chunk_get_size(chunk); @@ -1072,7 +1220,9 @@ static NV_STATUS test_cpu_chunk_dirty(uvm_gpu_t *gpu) return status; } -NV_STATUS do_test_cpu_chunk_free(uvm_cpu_chunk_t *chunk, uvm_va_space_t *va_space, uvm_processor_mask_t *test_gpus) +NV_STATUS do_test_cpu_chunk_free(uvm_cpu_chunk_t *chunk, + uvm_va_space_t *va_space, + const uvm_processor_mask_t *test_gpus) { NV_STATUS status = NV_OK; uvm_cpu_chunk_t **split_chunks; @@ -1099,7 +1249,7 @@ NV_STATUS do_test_cpu_chunk_free(uvm_cpu_chunk_t *chunk, uvm_va_space_t *va_spac chunk = NULL; // Map every other chunk. - // The call to uvm_cpu_chunk_unmap_parent_gpu_phys() is here in case this + // The call to uvm_cpu_chunk_unmap_gpu() is here in case this // is part of a double split (see below). In that case, the parent chunk // would be either mapped or unmapped. // @@ -1111,7 +1261,7 @@ NV_STATUS do_test_cpu_chunk_free(uvm_cpu_chunk_t *chunk, uvm_va_space_t *va_spac if (i & (1 << uvm_id_gpu_index(gpu->id))) TEST_NV_CHECK_GOTO(uvm_cpu_chunk_map_gpu(split_chunks[i], gpu), done); else - uvm_cpu_chunk_unmap_parent_gpu_phys(split_chunks[i], gpu->parent); + uvm_cpu_chunk_unmap_gpu(split_chunks[i], gpu); } } @@ -1147,9 +1297,9 @@ NV_STATUS do_test_cpu_chunk_free(uvm_cpu_chunk_t *chunk, uvm_va_space_t *va_spac TEST_CHECK_GOTO(uvm_cpu_chunk_get_size(split_chunks[j]) == split_size, done); for_each_va_space_gpu_in_mask(gpu, va_space, test_gpus) { if (j & (1 << uvm_id_gpu_index(gpu->id))) - TEST_CHECK_GOTO(uvm_cpu_chunk_get_parent_gpu_phys_addr(split_chunks[j], gpu->parent), done); + TEST_CHECK_GOTO(uvm_cpu_chunk_get_gpu_phys_addr(split_chunks[j], gpu), done); else - TEST_CHECK_GOTO(!uvm_cpu_chunk_get_parent_gpu_phys_addr(split_chunks[j], gpu->parent), done); + TEST_CHECK_GOTO(!uvm_cpu_chunk_get_gpu_phys_addr(split_chunks[j], gpu), done); } } } @@ -1168,7 +1318,8 @@ NV_STATUS do_test_cpu_chunk_free(uvm_cpu_chunk_t *chunk, uvm_va_space_t *va_spac return status; } -NV_STATUS test_cpu_chunk_free(uvm_va_space_t *va_space, uvm_processor_mask_t *test_gpus) +NV_STATUS test_cpu_chunk_free(uvm_va_space_t *va_space, + const uvm_processor_mask_t *test_gpus) { uvm_cpu_chunk_t *chunk; uvm_chunk_sizes_mask_t alloc_sizes = uvm_cpu_chunk_get_allocation_sizes(); @@ -1204,6 +1355,50 @@ static NV_STATUS test_cpu_chunk_numa_alloc(uvm_va_space_t *va_space) return NV_OK; } +static uvm_gpu_t *find_first_parent_gpu(const uvm_processor_mask_t *test_gpus, + uvm_va_space_t *va_space) +{ + return uvm_processor_mask_find_first_va_space_gpu(test_gpus, va_space); +} + +static uvm_gpu_t *find_next_parent_gpu(const uvm_processor_mask_t *test_gpus, + uvm_va_space_t *va_space, + uvm_gpu_t *gpu) +{ + uvm_gpu_t *next_gpu = gpu; + + while (next_gpu) { + next_gpu = uvm_processor_mask_find_next_va_space_gpu(test_gpus, va_space, next_gpu); + if (!next_gpu || next_gpu->parent != gpu->parent) + break; + } + + return next_gpu; +} + +static void find_shared_gpu_pair(const uvm_processor_mask_t *test_gpus, + uvm_va_space_t *va_space, + uvm_gpu_t **out_gpu0, + uvm_gpu_t **out_gpu1) +{ + uvm_gpu_t *gpu0 = uvm_processor_mask_find_first_va_space_gpu(test_gpus, va_space); + uvm_gpu_t *gpu1 = uvm_processor_mask_find_next_va_space_gpu(test_gpus, va_space, gpu0); + + while (gpu1) { + if (gpu0->parent == gpu1->parent) { + *out_gpu0 = gpu0; + *out_gpu1 = gpu1; + return; + } + + gpu0 = gpu1; + gpu1 = uvm_processor_mask_find_next_va_space_gpu(test_gpus, va_space, gpu0); + } + + *out_gpu0 = NULL; + *out_gpu1 = NULL; +} + NV_STATUS uvm_test_cpu_chunk_api(UVM_TEST_CPU_CHUNK_API_PARAMS *params, struct file *filp) { uvm_va_space_t *va_space = uvm_va_space_get(filp); @@ -1228,13 +1423,29 @@ NV_STATUS uvm_test_cpu_chunk_api(UVM_TEST_CPU_CHUNK_API_PARAMS *params, struct f TEST_NV_CHECK_GOTO(test_cpu_chunk_free(va_space, test_gpus), done); TEST_NV_CHECK_GOTO(test_cpu_chunk_numa_alloc(va_space), done); - if (uvm_processor_mask_get_gpu_count(test_gpus) >= 3) { - uvm_gpu_t *gpu2, *gpu3; + if (uvm_processor_mask_get_gpu_count(test_gpus) >= 2) { + uvm_gpu_t *gpu2, *gpu3 = NULL; + + // Look for a pair of GPUs that don't share a common parent. + gpu = find_first_parent_gpu(test_gpus, va_space); + gpu2 = find_next_parent_gpu(test_gpus, va_space, gpu); + if (gpu2) { + TEST_NV_CHECK_GOTO(test_cpu_chunk_split_and_merge_2(gpu, gpu2), done); + + // Look for a third physical GPU. + gpu3 = find_next_parent_gpu(test_gpus, va_space, gpu2); - gpu = uvm_processor_mask_find_first_va_space_gpu(test_gpus, va_space); - gpu2 = uvm_processor_mask_find_next_va_space_gpu(test_gpus, va_space, gpu); - gpu3 = uvm_processor_mask_find_next_va_space_gpu(test_gpus, va_space, gpu2); - TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_array(gpu, gpu2, gpu3), done); + if (gpu3) + TEST_NV_CHECK_GOTO(test_cpu_chunk_mapping_array(gpu, gpu2, gpu3), done); + } + + // Look for a pair of GPUs that share a common parent. + find_shared_gpu_pair(test_gpus, va_space, &gpu, &gpu2); + if (gpu) { + // Test MIG instances within the same parent GPU. + TEST_NV_CHECK_GOTO(test_cpu_chunk_split_and_merge_2(gpu, gpu2), done); + TEST_NV_CHECK_GOTO(test_cpu_chunk_mig(gpu, gpu2), done); + } } done: diff --git a/kernel-open/nvidia-uvm/uvm_processors.c b/kernel-open/nvidia-uvm/uvm_processors.c index 9ffc6c8c20..b8d28df9e1 100644 --- a/kernel-open/nvidia-uvm/uvm_processors.c +++ b/kernel-open/nvidia-uvm/uvm_processors.c @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2023 NVIDIA Corporation + Copyright (c) 2023-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -30,6 +30,8 @@ const uvm_processor_mask_t g_uvm_processor_mask_empty = { }; NV_STATUS uvm_processor_mask_cache_init(void) { + BUILD_BUG_ON((8 * sizeof(((uvm_sub_processor_mask_t *)0)->bitmap)) < UVM_PARENT_ID_MAX_SUB_PROCESSORS); + g_uvm_processor_mask_cache = NV_KMEM_CACHE_CREATE("uvm_processor_mask_t", uvm_processor_mask_t); if (!g_uvm_processor_mask_cache) return NV_ERR_NO_MEMORY; diff --git a/kernel-open/nvidia-uvm/uvm_processors.h b/kernel-open/nvidia-uvm/uvm_processors.h index e79e335cfb..beb8a2e44b 100644 --- a/kernel-open/nvidia-uvm/uvm_processors.h +++ b/kernel-open/nvidia-uvm/uvm_processors.h @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2016-2023 NVIDIA Corporation + Copyright (c) 2016-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -277,8 +277,6 @@ typedef uvm_processor_id_t uvm_gpu_id_t; #define UVM_PARENT_ID_MAX_GPUS NV_MAX_DEVICES #define UVM_PARENT_ID_MAX_PROCESSORS (UVM_PARENT_ID_MAX_GPUS + 1) -#define UVM_PARENT_ID_MAX_SUB_PROCESSORS 8 - #define UVM_ID_MAX_GPUS (UVM_PARENT_ID_MAX_GPUS * UVM_PARENT_ID_MAX_SUB_PROCESSORS) #define UVM_ID_MAX_PROCESSORS (UVM_ID_MAX_GPUS + 1) #define UVM_MAX_UNIQUE_GPU_PAIRS SUM_FROM_0_TO_N(UVM_ID_MAX_GPUS - 1) @@ -292,6 +290,9 @@ typedef uvm_processor_id_t uvm_gpu_id_t; #define UVM_ID_CHECK_BOUNDS(id) UVM_ASSERT_MSG(id.val <= UVM_ID_MAX_PROCESSORS, "id %u\n", id.val) +#define UVM_SUB_PROCESSOR_INDEX_CHECK_BOUNDS(sub_index) \ + UVM_ASSERT_MSG((sub_index) < UVM_PARENT_ID_MAX_SUB_PROCESSORS, "sub_index %u\n", (sub_index)) + static int uvm_parent_id_cmp(uvm_parent_processor_id_t id1, uvm_parent_processor_id_t id2) { UVM_PARENT_ID_CHECK_BOUNDS(id1); @@ -493,11 +494,16 @@ static uvm_gpu_id_t uvm_gpu_id_from_parent_gpu_id(const uvm_parent_gpu_id_t id) static uvm_gpu_id_t uvm_gpu_id_from_sub_processor_index(NvU32 index, NvU32 sub_index) { UVM_ASSERT(index < UVM_PARENT_ID_MAX_GPUS); - UVM_ASSERT(sub_index < UVM_PARENT_ID_MAX_SUB_PROCESSORS); + UVM_SUB_PROCESSOR_INDEX_CHECK_BOUNDS(sub_index); return uvm_gpu_id_from_index(index * UVM_PARENT_ID_MAX_SUB_PROCESSORS + sub_index); } +static uvm_gpu_id_t uvm_gpu_id_from_sub_processor(uvm_parent_gpu_id_t id, NvU32 sub_index) +{ + return uvm_gpu_id_from_sub_processor_index(uvm_parent_id_gpu_index(id), sub_index); +} + static uvm_parent_gpu_id_t uvm_parent_gpu_id_from_gpu_id(const uvm_gpu_id_t id) { UVM_ASSERT(UVM_ID_IS_GPU(id)); @@ -525,6 +531,71 @@ UVM_PROCESSOR_MASK(uvm_processor_mask_t, \ extern const uvm_processor_mask_t g_uvm_processor_mask_cpu; extern const uvm_processor_mask_t g_uvm_processor_mask_empty; +// This is similar to uvm_parent_processor_mask_t and uvm_processor_mask_t +// but defined as a NvU8 in order to save memory since DECLARE_BITMAP() uses +// unsigned long. It also means we need to define our own bitops. +// Note that these are not atomic operations. +typedef struct +{ + NvU8 bitmap; +} uvm_sub_processor_mask_t; + +static bool uvm_sub_processor_mask_test(const uvm_sub_processor_mask_t *mask, NvU32 sub_index) +{ + UVM_SUB_PROCESSOR_INDEX_CHECK_BOUNDS(sub_index); + + return mask->bitmap & (1 << sub_index); +} + +static void uvm_sub_processor_mask_set(uvm_sub_processor_mask_t *mask, NvU32 sub_index) +{ + UVM_SUB_PROCESSOR_INDEX_CHECK_BOUNDS(sub_index); + + mask->bitmap |= 1 << sub_index; +} + +static void uvm_sub_processor_mask_clear(uvm_sub_processor_mask_t *mask, NvU32 sub_index) +{ + UVM_SUB_PROCESSOR_INDEX_CHECK_BOUNDS(sub_index); + + mask->bitmap &= ~(1 << sub_index); +} + +static bool uvm_sub_processor_mask_test_and_set(uvm_sub_processor_mask_t *mask, NvU32 sub_index) +{ + bool result = uvm_sub_processor_mask_test(mask, sub_index); + + if (!result) + uvm_sub_processor_mask_set(mask, sub_index); + + return result; +} + +static bool uvm_sub_processor_mask_test_and_clear(uvm_sub_processor_mask_t *mask, NvU32 sub_index) +{ + bool result = uvm_sub_processor_mask_test(mask, sub_index); + + if (result) + uvm_sub_processor_mask_clear(mask, sub_index); + + return result; +} + +static void uvm_sub_processor_mask_zero(uvm_sub_processor_mask_t *mask) +{ + mask->bitmap = 0; +} + +static bool uvm_sub_processor_mask_empty(const uvm_sub_processor_mask_t *mask) +{ + return mask->bitmap == 0; +} + +static NvU32 uvm_sub_processor_mask_get_count(const uvm_sub_processor_mask_t *mask) +{ + return hweight8(mask->bitmap); +} + // Like uvm_processor_mask_subset() but ignores the CPU in the subset mask. // Returns whether the GPUs in subset are a subset of the GPUs in mask. bool uvm_processor_mask_gpu_subset(const uvm_processor_mask_t *subset, @@ -571,8 +642,28 @@ void uvm_parent_gpus_from_processor_mask(uvm_parent_processor_mask_t *parent_mas i = uvm_gpu_id_next(i)) // Helper to iterate over all sub processor indexes. -#define for_each_sub_processor_index(i) \ - for (i = 0; i < UVM_PARENT_ID_MAX_SUB_PROCESSORS; i++) +#define for_each_sub_processor_index(sub_index) \ + for ((sub_index) = 0; (sub_index) < UVM_PARENT_ID_MAX_SUB_PROCESSORS; (sub_index)++) + +static NvU32 uvm_sub_processor_mask_find_first_index(const uvm_sub_processor_mask_t *mask) +{ + unsigned long bitmap = mask->bitmap; + + return find_first_bit(&bitmap, UVM_PARENT_ID_MAX_SUB_PROCESSORS); +} + +static NvU32 uvm_sub_processor_mask_find_next_index(const uvm_sub_processor_mask_t *mask, NvU32 min_index) +{ + unsigned long bitmap = mask->bitmap; + + return find_next_bit(&bitmap, UVM_PARENT_ID_MAX_SUB_PROCESSORS, min_index); +} + +// Helper to iterate over all sub processor indexes in a given mask. +#define for_each_sub_processor_index_in_mask(sub_index, sub_mask) \ + for ((sub_index) = uvm_sub_processor_mask_find_first_index((sub_mask)); \ + (sub_index) < UVM_PARENT_ID_MAX_SUB_PROCESSORS; \ + (sub_index) = uvm_sub_processor_mask_find_next_index((sub_mask), (sub_index) + 1)) // Helper to iterate over all valid processor ids. #define for_each_id(i) for (i = UVM_ID_CPU; UVM_ID_IS_VALID(i); i = uvm_id_next(i)) diff --git a/kernel-open/nvidia-uvm/uvm_test_ioctl.h b/kernel-open/nvidia-uvm/uvm_test_ioctl.h index d7e146434b..10867fe33e 100644 --- a/kernel-open/nvidia-uvm/uvm_test_ioctl.h +++ b/kernel-open/nvidia-uvm/uvm_test_ioctl.h @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2015-2022 NVidia Corporation + Copyright (c) 2015-2024 NVidia Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -191,7 +191,7 @@ typedef struct NvU32 read_duplication; // Out (UVM_TEST_READ_DUPLICATION_POLICY) NvProcessorUuid preferred_location; // Out NvS32 preferred_cpu_nid; // Out - NvProcessorUuid accessed_by[UVM_MAX_PROCESSORS_V2]; // Out + NvProcessorUuid accessed_by[UVM_MAX_PROCESSORS]; // Out NvU32 accessed_by_count; // Out NvU32 type; // Out (UVM_TEST_VA_RANGE_TYPE) union @@ -624,7 +624,7 @@ typedef struct // Array of processors which have a resident copy of the page containing // lookup_address. - NvProcessorUuid resident_on[UVM_MAX_PROCESSORS_V2]; // Out + NvProcessorUuid resident_on[UVM_MAX_PROCESSORS]; // Out NvU32 resident_on_count; // Out // If the memory is resident on the CPU, the NUMA node on which the page @@ -635,24 +635,24 @@ typedef struct // system-page-sized portion of this allocation which contains // lookup_address is guaranteed to be resident on the corresponding // processor. - NvU32 resident_physical_size[UVM_MAX_PROCESSORS_V2]; // Out + NvU32 resident_physical_size[UVM_MAX_PROCESSORS]; // Out // The physical address of the physical allocation backing lookup_address. - NvU64 resident_physical_address[UVM_MAX_PROCESSORS_V2] NV_ALIGN_BYTES(8); // Out + NvU64 resident_physical_address[UVM_MAX_PROCESSORS] NV_ALIGN_BYTES(8); // Out // Array of processors which have a virtual mapping covering lookup_address. - NvProcessorUuid mapped_on[UVM_MAX_PROCESSORS_V2]; // Out - NvU32 mapping_type[UVM_MAX_PROCESSORS_V2]; // Out - NvU64 mapping_physical_address[UVM_MAX_PROCESSORS_V2] NV_ALIGN_BYTES(8); // Out + NvProcessorUuid mapped_on[UVM_MAX_PROCESSORS]; // Out + NvU32 mapping_type[UVM_MAX_PROCESSORS]; // Out + NvU64 mapping_physical_address[UVM_MAX_PROCESSORS] NV_ALIGN_BYTES(8); // Out NvU32 mapped_on_count; // Out // The size of the virtual mapping covering lookup_address on each // mapped_on processor. - NvU32 page_size[UVM_MAX_PROCESSORS_V2]; // Out + NvU32 page_size[UVM_MAX_PROCESSORS]; // Out // Array of processors which have physical memory populated that would back // lookup_address if it was resident. - NvProcessorUuid populated_on[UVM_MAX_PROCESSORS_V2]; // Out + NvProcessorUuid populated_on[UVM_MAX_PROCESSORS]; // Out NvU32 populated_on_count; // Out NV_STATUS rmStatus; // Out diff --git a/kernel-open/nvidia-uvm/uvm_tlb_batch.c b/kernel-open/nvidia-uvm/uvm_tlb_batch.c index ecd516637c..69295f0642 100644 --- a/kernel-open/nvidia-uvm/uvm_tlb_batch.c +++ b/kernel-open/nvidia-uvm/uvm_tlb_batch.c @@ -30,18 +30,18 @@ void uvm_tlb_batch_begin(uvm_page_tree_t *tree, uvm_tlb_batch_t *batch) batch->tree = tree; } -static NvU32 smallest_page_size(NvU32 page_sizes) +static NvU64 smallest_page_size(NvU64 page_sizes) { UVM_ASSERT(page_sizes != 0); - return 1u << __ffs(page_sizes); + return 1ULL << __ffs(page_sizes); } -static NvU32 biggest_page_size(NvU32 page_sizes) +static NvU64 biggest_page_size(NvU64 page_sizes) { UVM_ASSERT(page_sizes != 0); - return 1u << __fls(page_sizes); + return 1ULL << __fls(page_sizes); } static void tlb_batch_flush_invalidate_per_va(uvm_tlb_batch_t *batch, uvm_push_t *push) @@ -53,8 +53,8 @@ static void tlb_batch_flush_invalidate_per_va(uvm_tlb_batch_t *batch, uvm_push_t for (i = 0; i < batch->count; ++i) { uvm_tlb_batch_range_t *entry = &batch->ranges[i]; - NvU32 min_page_size = smallest_page_size(entry->page_sizes); - NvU32 max_page_size = biggest_page_size(entry->page_sizes); + NvU64 min_page_size = smallest_page_size(entry->page_sizes); + NvU64 max_page_size = biggest_page_size(entry->page_sizes); // Use the depth of the max page size as it's the broadest NvU32 depth = tree->hal->page_table_depth(max_page_size); @@ -113,7 +113,7 @@ void uvm_tlb_batch_end(uvm_tlb_batch_t *batch, uvm_push_t *push, uvm_membar_t tl tlb_batch_flush_invalidate_per_va(batch, push); } -void uvm_tlb_batch_invalidate(uvm_tlb_batch_t *batch, NvU64 start, NvU64 size, NvU32 page_sizes, uvm_membar_t tlb_membar) +void uvm_tlb_batch_invalidate(uvm_tlb_batch_t *batch, NvU64 start, NvU64 size, NvU64 page_sizes, uvm_membar_t tlb_membar) { uvm_tlb_batch_range_t *new_entry; diff --git a/kernel-open/nvidia-uvm/uvm_tlb_batch.h b/kernel-open/nvidia-uvm/uvm_tlb_batch.h index c5f833bd63..e160cda3d0 100644 --- a/kernel-open/nvidia-uvm/uvm_tlb_batch.h +++ b/kernel-open/nvidia-uvm/uvm_tlb_batch.h @@ -41,7 +41,7 @@ typedef struct NvU64 size; // Min and max page size ored together - NvU32 page_sizes; + NvU64 page_sizes; } uvm_tlb_batch_range_t; struct uvm_tlb_batch_struct @@ -63,7 +63,7 @@ struct uvm_tlb_batch_struct NvU32 count; // Biggest page size across all queued up invalidates - NvU32 biggest_page_size; + NvU64 biggest_page_size; // Max membar across all queued up invalidates uvm_membar_t membar; @@ -81,7 +81,7 @@ void uvm_tlb_batch_begin(uvm_page_tree_t *tree, uvm_tlb_batch_t *batch); // If the membar parameter is not UVM_MEMBAR_NONE, the specified membar will // be performed logically after the TLB invalidate such that all physical memory // accesses using the old translations are ordered to the scope of the membar. -void uvm_tlb_batch_invalidate(uvm_tlb_batch_t *batch, NvU64 start, NvU64 size, NvU32 page_sizes, uvm_membar_t tlb_membar); +void uvm_tlb_batch_invalidate(uvm_tlb_batch_t *batch, NvU64 start, NvU64 size, NvU64 page_sizes, uvm_membar_t tlb_membar); // End a TLB invalidate batch // @@ -97,8 +97,12 @@ void uvm_tlb_batch_end(uvm_tlb_batch_t *batch, uvm_push_t *push, uvm_membar_t tl // Helper for invalidating a single range immediately. // // Internally begins and ends a TLB batch. -static void uvm_tlb_batch_single_invalidate(uvm_page_tree_t *tree, uvm_push_t *push, - NvU64 start, NvU64 size, NvU32 page_sizes, uvm_membar_t tlb_membar) +static void uvm_tlb_batch_single_invalidate(uvm_page_tree_t *tree, + uvm_push_t *push, + NvU64 start, + NvU64 size, + NvU64 page_sizes, + uvm_membar_t tlb_membar) { uvm_tlb_batch_t batch; diff --git a/kernel-open/nvidia-uvm/uvm_tools.c b/kernel-open/nvidia-uvm/uvm_tools.c index cb7bc4dca4..f667abcd4a 100644 --- a/kernel-open/nvidia-uvm/uvm_tools.c +++ b/kernel-open/nvidia-uvm/uvm_tools.c @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2016-2023 NVIDIA Corporation + Copyright (c) 2016-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -57,20 +57,12 @@ typedef struct struct list_head queue_nodes[UvmEventNumTypesAll]; struct page **queue_buffer_pages; - union - { - UvmEventEntry_V1 *queue_v1; - UvmEventEntry_V2 *queue_v2; - }; + void *queue_buffer; NvU32 queue_buffer_count; NvU32 notification_threshold; struct page **control_buffer_pages; - union - { - UvmToolsEventControlData_V1 *control_v1; - UvmToolsEventControlData_V2 *control_v2; - }; + UvmToolsEventControlData *control; wait_queue_head_t wait_queue; bool is_wakeup_get_valid; @@ -398,16 +390,12 @@ static void destroy_event_tracker(uvm_tools_event_tracker_t *event_tracker) if (event_tracker->is_queue) { uvm_tools_queue_t *queue = &event_tracker->queue; - NvU64 buffer_size, control_size; + NvU64 buffer_size; - if (event_tracker->version == UvmToolsEventQueueVersion_V1) { + if (event_tracker->version == UvmToolsEventQueueVersion_V1) buffer_size = queue->queue_buffer_count * sizeof(UvmEventEntry_V1); - control_size = sizeof(UvmToolsEventControlData_V1); - } - else { + else buffer_size = queue->queue_buffer_count * sizeof(UvmEventEntry_V2); - control_size = sizeof(UvmToolsEventControlData_V2); - } remove_event_tracker(va_space, queue->queue_nodes, @@ -415,16 +403,16 @@ static void destroy_event_tracker(uvm_tools_event_tracker_t *event_tracker) queue->subscribed_queues, &queue->subscribed_queues); - if (queue->queue_v2 != NULL) { + if (queue->queue_buffer != NULL) { unmap_user_pages(queue->queue_buffer_pages, - queue->queue_v2, + queue->queue_buffer, buffer_size); } - if (queue->control_v2 != NULL) { + if (queue->control != NULL) { unmap_user_pages(queue->control_buffer_pages, - queue->control_v2, - control_size); + queue->control, + sizeof(UvmToolsEventControlData)); } } else { @@ -456,9 +444,9 @@ static void destroy_event_tracker(uvm_tools_event_tracker_t *event_tracker) kmem_cache_free(g_tools_event_tracker_cache, event_tracker); } -static void enqueue_event_v1(const UvmEventEntry_V1 *entry, uvm_tools_queue_t *queue) +static void enqueue_event(const void *entry, size_t entry_size, NvU8 eventType, uvm_tools_queue_t *queue) { - UvmToolsEventControlData_V1 *ctrl = queue->control_v1; + UvmToolsEventControlData *ctrl = queue->control; uvm_tools_queue_snapshot_t sn; NvU32 queue_size = queue->queue_buffer_count; NvU32 queue_mask = queue_size - 1; @@ -481,11 +469,11 @@ static void enqueue_event_v1(const UvmEventEntry_V1 *entry, uvm_tools_queue_t *q // one free element means that the queue is full if (((queue_size + sn.get_behind - sn.put_behind) & queue_mask) == 1) { - atomic64_inc((atomic64_t *)&ctrl->dropped + entry->eventData.eventType); + atomic64_inc((atomic64_t *)&ctrl->dropped + eventType); goto unlock; } - memcpy(queue->queue_v1 + sn.put_behind, entry, sizeof(*entry)); + memcpy((char *)queue->queue_buffer + sn.put_behind * entry_size, entry, entry_size); sn.put_behind = sn.put_ahead; @@ -509,79 +497,45 @@ static void enqueue_event_v1(const UvmEventEntry_V1 *entry, uvm_tools_queue_t *q uvm_spin_unlock(&queue->lock); } -static void enqueue_event_v2(const UvmEventEntry_V2 *entry, uvm_tools_queue_t *queue) +static void enqueue_event_v1(const UvmEventEntry_V1 *entry, uvm_tools_queue_t *queue) { - UvmToolsEventControlData_V2 *ctrl = queue->control_v2; - uvm_tools_queue_snapshot_t sn; - NvU32 queue_size = queue->queue_buffer_count; - NvU32 queue_mask = queue_size - 1; - - // Prevent processor speculation prior to accessing user-mapped memory to - // avoid leaking information from side-channel attacks. There are many - // possible paths leading to this point and it would be difficult and error- - // prone to audit all of them to determine whether user mode could guide - // this access to kernel memory under speculative execution, so to be on the - // safe side we'll just always block speculation. - nv_speculation_barrier(); - - uvm_spin_lock(&queue->lock); - - // ctrl is mapped into user space with read and write permissions, - // so its values cannot be trusted. - sn.get_behind = atomic_read((atomic_t *)&ctrl->get_behind) & queue_mask; - sn.put_behind = atomic_read((atomic_t *)&ctrl->put_behind) & queue_mask; - sn.put_ahead = (sn.put_behind + 1) & queue_mask; - - // one free element means that the queue is full - if (((queue_size + sn.get_behind - sn.put_behind) & queue_mask) == 1) { - atomic64_inc((atomic64_t *)&ctrl->dropped + entry->eventData.eventType); - goto unlock; - } + enqueue_event(entry, sizeof(*entry), entry->eventData.eventType, queue); +} - memcpy(queue->queue_v2 + sn.put_behind, entry, sizeof(*entry)); +static void enqueue_event_v2(const UvmEventEntry_V2 *entry, uvm_tools_queue_t *queue) +{ + enqueue_event(entry, sizeof(*entry), entry->eventData.eventType, queue); +} - sn.put_behind = sn.put_ahead; - // put_ahead and put_behind will always be the same outside of queue->lock - // this allows the user-space consumer to choose either a 2 or 4 pointer synchronization approach - atomic_set((atomic_t *)&ctrl->put_ahead, sn.put_behind); - atomic_set((atomic_t *)&ctrl->put_behind, sn.put_behind); +static void uvm_tools_record_event(struct list_head *head, + const void *entry, + size_t entry_size, + NvU8 eventType) +{ + uvm_tools_queue_t *queue; - sn.get_ahead = atomic_read((atomic_t *)&ctrl->get_ahead); - // if the queue needs to be woken up, only signal if we haven't signaled before for this value of get_ahead - if (queue_needs_wakeup(queue, &sn) && !(queue->is_wakeup_get_valid && queue->wakeup_get == sn.get_ahead)) { - queue->is_wakeup_get_valid = true; - queue->wakeup_get = sn.get_ahead; - wake_up_all(&queue->wait_queue); - } + UVM_ASSERT(eventType < UvmEventNumTypesAll); -unlock: - uvm_spin_unlock(&queue->lock); + list_for_each_entry(queue, head + eventType, queue_nodes[eventType]) + enqueue_event(entry, entry_size, eventType, queue); } static void uvm_tools_record_event_v1(uvm_va_space_t *va_space, const UvmEventEntry_V1 *entry) { NvU8 eventType = entry->eventData.eventType; - uvm_tools_queue_t *queue; - - UVM_ASSERT(eventType < UvmEventNumTypesAll); uvm_assert_rwsem_locked(&va_space->tools.lock); - list_for_each_entry(queue, va_space->tools.queues_v1 + eventType, queue_nodes[eventType]) - enqueue_event_v1(entry, queue); + uvm_tools_record_event(va_space->tools.queues_v1, entry, sizeof(*entry), eventType); } static void uvm_tools_record_event_v2(uvm_va_space_t *va_space, const UvmEventEntry_V2 *entry) { NvU8 eventType = entry->eventData.eventType; - uvm_tools_queue_t *queue; - - UVM_ASSERT(eventType < UvmEventNumTypesAll); uvm_assert_rwsem_locked(&va_space->tools.lock); - list_for_each_entry(queue, va_space->tools.queues_v2 + eventType, queue_nodes[eventType]) - enqueue_event_v2(entry, queue); + uvm_tools_record_event(va_space->tools.queues_v2, entry, sizeof(*entry), eventType); } static bool counter_matches_processor(UvmCounterName counter, const NvProcessorUuid *processor) @@ -751,7 +705,7 @@ static unsigned uvm_tools_poll(struct file *filp, poll_table *wait) int flags = 0; uvm_tools_queue_snapshot_t sn; uvm_tools_event_tracker_t *event_tracker; - UvmToolsEventControlData_V2 *ctrl; + UvmToolsEventControlData *ctrl; if (uvm_global_get_status() != NV_OK) return POLLERR; @@ -763,7 +717,7 @@ static unsigned uvm_tools_poll(struct file *filp, poll_table *wait) uvm_spin_lock(&event_tracker->queue.lock); event_tracker->queue.is_wakeup_get_valid = false; - ctrl = event_tracker->queue.control_v2; + ctrl = event_tracker->queue.control; sn.get_ahead = atomic_read((atomic_t *)&ctrl->get_ahead); sn.put_behind = atomic_read((atomic_t *)&ctrl->put_behind); @@ -878,6 +832,24 @@ static void record_gpu_fault_instance(uvm_gpu_t *gpu, } } +static void record_cpu_fault(UvmEventCpuFaultInfo *info, uvm_perf_event_data_t *event_data) +{ + info->eventType = UvmEventTypeCpuFault; + if (event_data->fault.cpu.is_write) + info->accessType = UvmEventMemoryAccessTypeWrite; + else + info->accessType = UvmEventMemoryAccessTypeRead; + + info->address = event_data->fault.cpu.fault_va; + info->timeStamp = NV_GETTIME(); + // assume that current owns va_space + info->pid = uvm_get_stale_process_id(); + info->threadId = uvm_get_stale_thread_id(); + info->pc = event_data->fault.cpu.pc; + // TODO: Bug 4515381: set info->nid when we decide if it's NUMA node ID or + // CPU ID. +} + static void uvm_tools_record_fault(uvm_perf_event_t event_id, uvm_perf_event_data_t *event_data) { uvm_va_space_t *va_space = event_data->fault.space; @@ -895,41 +867,17 @@ static void uvm_tools_record_fault(uvm_perf_event_t event_id, uvm_perf_event_dat if (UVM_ID_IS_CPU(event_data->fault.proc_id)) { if (tools_is_event_enabled_version(va_space, UvmEventTypeCpuFault, UvmToolsEventQueueVersion_V1)) { UvmEventEntry_V1 entry; - UvmEventCpuFaultInfo_V1 *info = &entry.eventData.cpuFault; memset(&entry, 0, sizeof(entry)); - info->eventType = UvmEventTypeCpuFault; - if (event_data->fault.cpu.is_write) - info->accessType = UvmEventMemoryAccessTypeWrite; - else - info->accessType = UvmEventMemoryAccessTypeRead; - - info->address = event_data->fault.cpu.fault_va; - info->timeStamp = NV_GETTIME(); - // assume that current owns va_space - info->pid = uvm_get_stale_process_id(); - info->threadId = uvm_get_stale_thread_id(); - info->pc = event_data->fault.cpu.pc; + record_cpu_fault(&entry.eventData.cpuFault, event_data); uvm_tools_record_event_v1(va_space, &entry); } if (tools_is_event_enabled_version(va_space, UvmEventTypeCpuFault, UvmToolsEventQueueVersion_V2)) { UvmEventEntry_V2 entry; - UvmEventCpuFaultInfo_V2 *info = &entry.eventData.cpuFault; memset(&entry, 0, sizeof(entry)); - info->eventType = UvmEventTypeCpuFault; - if (event_data->fault.cpu.is_write) - info->accessType = UvmEventMemoryAccessTypeWrite; - else - info->accessType = UvmEventMemoryAccessTypeRead; - - info->address = event_data->fault.cpu.fault_va; - info->timeStamp = NV_GETTIME(); - // assume that current owns va_space - info->pid = uvm_get_stale_process_id(); - info->threadId = uvm_get_stale_thread_id(); - info->pc = event_data->fault.cpu.pc; + record_cpu_fault(&entry.eventData.cpuFault, event_data); uvm_tools_record_event_v2(va_space, &entry); } @@ -1834,7 +1782,7 @@ void uvm_tools_record_thrashing(uvm_va_space_t *va_space, info->size = region_size; info->timeStamp = NV_GETTIME(); - BUILD_BUG_ON(UVM_MAX_PROCESSORS_V2 < UVM_ID_MAX_PROCESSORS); + BUILD_BUG_ON(UVM_MAX_PROCESSORS < UVM_ID_MAX_PROCESSORS); bitmap_copy((long unsigned *)&info->processors, processors->bitmap, UVM_ID_MAX_PROCESSORS); uvm_tools_record_event_v2(va_space, &entry); @@ -2151,7 +2099,7 @@ NV_STATUS uvm_api_tools_init_event_tracker(UVM_TOOLS_INIT_EVENT_TRACKER_PARAMS * event_tracker->is_queue = params->queueBufferSize != 0; if (event_tracker->is_queue) { uvm_tools_queue_t *queue = &event_tracker->queue; - NvU64 buffer_size, control_size; + NvU64 buffer_size; uvm_spin_lock_init(&queue->lock, UVM_LOCK_ORDER_LEAF); init_waitqueue_head(&queue->wait_queue); @@ -2170,25 +2118,21 @@ NV_STATUS uvm_api_tools_init_event_tracker(UVM_TOOLS_INIT_EVENT_TRACKER_PARAMS * goto fail; } - if (event_tracker->version == UvmToolsEventQueueVersion_V1) { + if (event_tracker->version == UvmToolsEventQueueVersion_V1) buffer_size = queue->queue_buffer_count * sizeof(UvmEventEntry_V1); - control_size = sizeof(UvmToolsEventControlData_V1); - } - else { + else buffer_size = queue->queue_buffer_count * sizeof(UvmEventEntry_V2); - control_size = sizeof(UvmToolsEventControlData_V2); - } status = map_user_pages(params->queueBuffer, buffer_size, - (void **)&queue->queue_v2, + &queue->queue_buffer, &queue->queue_buffer_pages); if (status != NV_OK) goto fail; status = map_user_pages(params->controlBuffer, - control_size, - (void **)&queue->control_v2, + sizeof(UvmToolsEventControlData), + (void **)&queue->control, &queue->control_buffer_pages); if (status != NV_OK) @@ -2224,6 +2168,7 @@ NV_STATUS uvm_api_tools_set_notification_threshold(UVM_TOOLS_SET_NOTIFICATION_TH { uvm_tools_queue_snapshot_t sn; uvm_tools_event_tracker_t *event_tracker = tools_event_tracker(filp); + UvmToolsEventControlData *ctrl; if (!tracker_is_queue(event_tracker)) return NV_ERR_INVALID_ARGUMENT; @@ -2232,18 +2177,9 @@ NV_STATUS uvm_api_tools_set_notification_threshold(UVM_TOOLS_SET_NOTIFICATION_TH event_tracker->queue.notification_threshold = params->notificationThreshold; - if (event_tracker->version == UvmToolsEventQueueVersion_V1) { - UvmToolsEventControlData_V1 *ctrl = event_tracker->queue.control_v1; - - sn.put_behind = atomic_read((atomic_t *)&ctrl->put_behind); - sn.get_ahead = atomic_read((atomic_t *)&ctrl->get_ahead); - } - else { - UvmToolsEventControlData_V2 *ctrl = event_tracker->queue.control_v2; - - sn.put_behind = atomic_read((atomic_t *)&ctrl->put_behind); - sn.get_ahead = atomic_read((atomic_t *)&ctrl->get_ahead); - } + ctrl = event_tracker->queue.control; + sn.put_behind = atomic_read((atomic_t *)&ctrl->put_behind); + sn.get_ahead = atomic_read((atomic_t *)&ctrl->get_ahead); if (queue_needs_wakeup(&event_tracker->queue, &sn)) wake_up_all(&event_tracker->queue.wait_queue); diff --git a/kernel-open/nvidia-uvm/uvm_turing_host.c b/kernel-open/nvidia-uvm/uvm_turing_host.c index 403af652a8..488afdd696 100644 --- a/kernel-open/nvidia-uvm/uvm_turing_host.c +++ b/kernel-open/nvidia-uvm/uvm_turing_host.c @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2017-2021 NVIDIA Corporation + Copyright (c) 2017-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -104,3 +104,248 @@ void uvm_hal_turing_host_set_gpfifo_entry(NvU64 *fifo_entry, *fifo_entry = fifo_entry_value; } +void uvm_hal_turing_host_tlb_invalidate_all(uvm_push_t *push, + uvm_gpu_phys_address_t pdb, + NvU32 depth, + uvm_membar_t membar) +{ + NvU32 aperture_value; + NvU32 page_table_level; + NvU32 pdb_lo; + NvU32 pdb_hi; + NvU32 ack_value = 0; + NvU32 sysmembar_value = 0; + + UVM_ASSERT_MSG(pdb.aperture == UVM_APERTURE_VID || pdb.aperture == UVM_APERTURE_SYS, "aperture: %u", pdb.aperture); + + if (pdb.aperture == UVM_APERTURE_VID) + aperture_value = HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_PDB_APERTURE, VID_MEM); + else + aperture_value = HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_PDB_APERTURE, SYS_MEM_COHERENT); + + UVM_ASSERT_MSG(IS_ALIGNED(pdb.address, 1 << 12), "pdb 0x%llx\n", pdb.address); + pdb.address >>= 12; + + pdb_lo = pdb.address & HWMASK(C46F, MEM_OP_C, TLB_INVALIDATE_PDB_ADDR_LO); + pdb_hi = pdb.address >> HWSIZE(C46F, MEM_OP_C, TLB_INVALIDATE_PDB_ADDR_LO); + + // PDE3 is the highest level on Pascal-Turing, see the comment in + // uvm_pascal_mmu.c for details. + UVM_ASSERT_MSG(depth < NVC46F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE3, "depth %u", depth); + page_table_level = NVC46F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE3 - depth; + + if (membar != UVM_MEMBAR_NONE) { + // If a GPU or SYS membar is needed, ACK_TYPE needs to be set to + // GLOBALLY to make sure all the pending accesses can be picked up by + // the membar. + ack_value = HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_ACK_TYPE, GLOBALLY); + } + + if (membar == UVM_MEMBAR_SYS) + sysmembar_value = HWCONST(C46F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, EN); + else + sysmembar_value = HWCONST(C46F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, DIS); + + NV_PUSH_4U(C46F, MEM_OP_A, sysmembar_value, + MEM_OP_B, 0, + MEM_OP_C, HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_PDB, ONE) | + HWVALUE(C46F, MEM_OP_C, TLB_INVALIDATE_PDB_ADDR_LO, pdb_lo) | + HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_GPC, ENABLE) | + HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_REPLAY, NONE) | + HWVALUE(C46F, MEM_OP_C, TLB_INVALIDATE_PAGE_TABLE_LEVEL, page_table_level) | + aperture_value | + ack_value, + MEM_OP_D, HWCONST(C46F, MEM_OP_D, OPERATION, MMU_TLB_INVALIDATE) | + HWVALUE(C46F, MEM_OP_D, TLB_INVALIDATE_PDB_ADDR_HI, pdb_hi)); + + // GPU membar still requires an explicit membar method. + if (membar == UVM_MEMBAR_GPU) + uvm_push_get_gpu(push)->parent->host_hal->membar_gpu(push); +} + +void uvm_hal_turing_host_tlb_invalidate_va(uvm_push_t *push, + uvm_gpu_phys_address_t pdb, + NvU32 depth, + NvU64 base, + NvU64 size, + NvU64 page_size, + uvm_membar_t membar) +{ + NvU32 aperture_value; + NvU32 page_table_level; + NvU32 pdb_lo; + NvU32 pdb_hi; + NvU32 ack_value = 0; + NvU32 sysmembar_value = 0; + NvU32 va_lo; + NvU32 va_hi; + NvU64 end; + NvU64 actual_base; + NvU64 actual_size; + NvU64 actual_end; + NvU32 log2_invalidation_size; + uvm_gpu_t *gpu = uvm_push_get_gpu(push); + + UVM_ASSERT_MSG(IS_ALIGNED(page_size, 1 << 12), "page_size 0x%llx\n", page_size); + UVM_ASSERT_MSG(IS_ALIGNED(base, page_size), "base 0x%llx page_size 0x%llx\n", base, page_size); + UVM_ASSERT_MSG(IS_ALIGNED(size, page_size), "size 0x%llx page_size 0x%llx\n", size, page_size); + UVM_ASSERT_MSG(size > 0, "size 0x%llx\n", size); + + // The invalidation size must be a power-of-two number of pages containing + // the passed interval + end = base + size - 1; + log2_invalidation_size = __fls((unsigned long)(end ^ base)) + 1; + + if (log2_invalidation_size == 64) { + // Invalidate everything + gpu->parent->host_hal->tlb_invalidate_all(push, pdb, depth, membar); + return; + } + + // The hardware aligns the target address down to the invalidation size. + actual_size = 1ULL << log2_invalidation_size; + actual_base = UVM_ALIGN_DOWN(base, actual_size); + actual_end = actual_base + actual_size - 1; + UVM_ASSERT(actual_end >= end); + + // The invalidation size field expects log2(invalidation size in 4K), not + // log2(invalidation size in bytes) + log2_invalidation_size -= 12; + + // Address to invalidate, as a multiple of 4K. + base >>= 12; + va_lo = base & HWMASK(C46F, MEM_OP_A, TLB_INVALIDATE_TARGET_ADDR_LO); + va_hi = base >> HWSIZE(C46F, MEM_OP_A, TLB_INVALIDATE_TARGET_ADDR_LO); + + UVM_ASSERT_MSG(pdb.aperture == UVM_APERTURE_VID || pdb.aperture == UVM_APERTURE_SYS, "aperture: %u", pdb.aperture); + + if (pdb.aperture == UVM_APERTURE_VID) + aperture_value = HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_PDB_APERTURE, VID_MEM); + else + aperture_value = HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_PDB_APERTURE, SYS_MEM_COHERENT); + + UVM_ASSERT_MSG(IS_ALIGNED(pdb.address, 1 << 12), "pdb 0x%llx\n", pdb.address); + pdb.address >>= 12; + + pdb_lo = pdb.address & HWMASK(C46F, MEM_OP_C, TLB_INVALIDATE_PDB_ADDR_LO); + pdb_hi = pdb.address >> HWSIZE(C46F, MEM_OP_C, TLB_INVALIDATE_PDB_ADDR_LO); + + // PDE3 is the highest level on Pascal-Turing, see the comment in + // uvm_pascal_mmu.c for details. + UVM_ASSERT_MSG(depth < NVC46F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE3, "depth %u", depth); + page_table_level = NVC46F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE3 - depth; + + if (membar != UVM_MEMBAR_NONE) { + // If a GPU or SYS membar is needed, ACK_TYPE needs to be set to + // GLOBALLY to make sure all the pending accesses can be picked up by + // the membar. + ack_value = HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_ACK_TYPE, GLOBALLY); + } + + if (membar == UVM_MEMBAR_SYS) + sysmembar_value = HWCONST(C46F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, EN); + else + sysmembar_value = HWCONST(C46F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, DIS); + + NV_PUSH_4U(C46F, MEM_OP_A, HWVALUE(C46F, MEM_OP_A, TLB_INVALIDATE_INVALIDATION_SIZE, log2_invalidation_size) | + sysmembar_value | + HWVALUE(C46F, MEM_OP_A, TLB_INVALIDATE_TARGET_ADDR_LO, va_lo), + MEM_OP_B, HWVALUE(C46F, MEM_OP_B, TLB_INVALIDATE_TARGET_ADDR_HI, va_hi), + MEM_OP_C, HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_PDB, ONE) | + HWVALUE(C46F, MEM_OP_C, TLB_INVALIDATE_PDB_ADDR_LO, pdb_lo) | + HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_GPC, ENABLE) | + HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_REPLAY, NONE) | + HWVALUE(C46F, MEM_OP_C, TLB_INVALIDATE_PAGE_TABLE_LEVEL, page_table_level) | + aperture_value | + ack_value, + MEM_OP_D, HWCONST(C46F, MEM_OP_D, OPERATION, MMU_TLB_INVALIDATE_TARGETED) | + HWVALUE(C46F, MEM_OP_D, TLB_INVALIDATE_PDB_ADDR_HI, pdb_hi)); + + // GPU membar still requires an explicit membar method. + if (membar == UVM_MEMBAR_GPU) + gpu->parent->host_hal->membar_gpu(push); +} + +void uvm_hal_turing_host_tlb_invalidate_test(uvm_push_t *push, + uvm_gpu_phys_address_t pdb, + UVM_TEST_INVALIDATE_TLB_PARAMS *params) +{ + NvU32 ack_value = 0; + NvU32 sysmembar_value = 0; + NvU32 invalidate_gpc_value = 0; + NvU32 aperture_value = 0; + NvU32 pdb_lo = 0; + NvU32 pdb_hi = 0; + NvU32 page_table_level = 0; + + UVM_ASSERT_MSG(pdb.aperture == UVM_APERTURE_VID || pdb.aperture == UVM_APERTURE_SYS, "aperture: %u", pdb.aperture); + if (pdb.aperture == UVM_APERTURE_VID) + aperture_value = HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_PDB_APERTURE, VID_MEM); + else + aperture_value = HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_PDB_APERTURE, SYS_MEM_COHERENT); + + UVM_ASSERT_MSG(IS_ALIGNED(pdb.address, 1 << 12), "pdb 0x%llx\n", pdb.address); + pdb.address >>= 12; + + pdb_lo = pdb.address & HWMASK(C46F, MEM_OP_C, TLB_INVALIDATE_PDB_ADDR_LO); + pdb_hi = pdb.address >> HWSIZE(C46F, MEM_OP_C, TLB_INVALIDATE_PDB_ADDR_LO); + + if (params->page_table_level != UvmInvalidatePageTableLevelAll) { + // PDE3 is the highest level on Pascal-Turing, see the comment in + // uvm_pascal_mmu.c for details. + page_table_level = min((NvU32)UvmInvalidatePageTableLevelPde3, params->page_table_level) - 1; + } + + if (params->membar != UvmInvalidateTlbMemBarNone) { + // If a GPU or SYS membar is needed, ack_value needs to be set to + // GLOBALLY to make sure all the pending accesses can be picked up by + // the membar. + ack_value = HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_ACK_TYPE, GLOBALLY); + } + + if (params->membar == UvmInvalidateTlbMemBarSys) + sysmembar_value = HWCONST(C46F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, EN); + else + sysmembar_value = HWCONST(C46F, MEM_OP_A, TLB_INVALIDATE_SYSMEMBAR, DIS); + + if (params->disable_gpc_invalidate) + invalidate_gpc_value = HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_GPC, DISABLE); + else + invalidate_gpc_value = HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_GPC, ENABLE); + + if (params->target_va_mode == UvmTargetVaModeTargeted) { + NvU64 va = params->va >> 12; + + NvU32 va_lo = va & HWMASK(C46F, MEM_OP_A, TLB_INVALIDATE_TARGET_ADDR_LO); + NvU32 va_hi = va >> HWSIZE(C46F, MEM_OP_A, TLB_INVALIDATE_TARGET_ADDR_LO); + NV_PUSH_4U(C46F, MEM_OP_A, sysmembar_value | + HWVALUE(C46F, MEM_OP_A, TLB_INVALIDATE_TARGET_ADDR_LO, va_lo), + MEM_OP_B, HWVALUE(C46F, MEM_OP_B, TLB_INVALIDATE_TARGET_ADDR_HI, va_hi), + MEM_OP_C, HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_REPLAY, NONE) | + HWVALUE(C46F, MEM_OP_C, TLB_INVALIDATE_PAGE_TABLE_LEVEL, page_table_level) | + HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_PDB, ONE) | + HWVALUE(C46F, MEM_OP_C, TLB_INVALIDATE_PDB_ADDR_LO, pdb_lo) | + invalidate_gpc_value | + aperture_value | + ack_value, + MEM_OP_D, HWCONST(C46F, MEM_OP_D, OPERATION, MMU_TLB_INVALIDATE_TARGETED) | + HWVALUE(C46F, MEM_OP_D, TLB_INVALIDATE_PDB_ADDR_HI, pdb_hi)); + } + else { + NV_PUSH_4U(C46F, MEM_OP_A, sysmembar_value, + MEM_OP_B, 0, + MEM_OP_C, HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_REPLAY, NONE) | + HWVALUE(C46F, MEM_OP_C, TLB_INVALIDATE_PAGE_TABLE_LEVEL, page_table_level) | + HWCONST(C46F, MEM_OP_C, TLB_INVALIDATE_PDB, ONE) | + HWVALUE(C46F, MEM_OP_C, TLB_INVALIDATE_PDB_ADDR_LO, pdb_lo) | + invalidate_gpc_value | + aperture_value | + ack_value, + MEM_OP_D, HWCONST(C46F, MEM_OP_D, OPERATION, MMU_TLB_INVALIDATE) | + HWVALUE(C46F, MEM_OP_D, TLB_INVALIDATE_PDB_ADDR_HI, pdb_hi)); + } + + // GPU membar still requires an explicit membar method. + if (params->membar == UvmInvalidateTlbMemBarLocal) + uvm_push_get_gpu(push)->parent->host_hal->membar_gpu(push); +} diff --git a/kernel-open/nvidia-uvm/uvm_turing_mmu.c b/kernel-open/nvidia-uvm/uvm_turing_mmu.c index d0324b72dc..b59ccd0896 100644 --- a/kernel-open/nvidia-uvm/uvm_turing_mmu.c +++ b/kernel-open/nvidia-uvm/uvm_turing_mmu.c @@ -138,7 +138,7 @@ static NvU64 poisoned_pte_turing(void) static uvm_mmu_mode_hal_t turing_mmu_mode_hal; -uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_turing(NvU32 big_page_size) +uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_turing(NvU64 big_page_size) { static bool initialized = false; diff --git a/kernel-open/nvidia-uvm/uvm_types.h b/kernel-open/nvidia-uvm/uvm_types.h index d00bc4a161..7dd5c76f1b 100644 --- a/kernel-open/nvidia-uvm/uvm_types.h +++ b/kernel-open/nvidia-uvm/uvm_types.h @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2013-2023 NVidia Corporation + Copyright (c) 2013-2024 NVidia Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -52,19 +52,18 @@ typedef enum typedef unsigned long long UvmStream; +// The maximum number of sub-processors per parent GPU. +#define UVM_PARENT_ID_MAX_SUB_PROCESSORS 8 + // The maximum number of GPUs changed when multiple MIG instances per -// uvm_parent_gpu_t were added. See UvmEventQueueCreate(). +// uvm_parent_gpu_t were added. The old version is kept as a convenience +// for code that needs to maintain forward compatibility. #define UVM_MAX_GPUS_V1 NV_MAX_DEVICES #define UVM_MAX_PROCESSORS_V1 (UVM_MAX_GPUS_V1 + 1) -#define UVM_MAX_GPUS_V2 (NV_MAX_DEVICES * NV_MAX_SUBDEVICES) -#define UVM_MAX_PROCESSORS_V2 (UVM_MAX_GPUS_V2 + 1) - -// For backward compatibility: -// TODO: Bug 4465348: remove these after replacing old references. -#define UVM_MAX_GPUS UVM_MAX_GPUS_V1 -#define UVM_MAX_PROCESSORS UVM_MAX_PROCESSORS_V1 +#define UVM_MAX_GPUS (NV_MAX_DEVICES * UVM_PARENT_ID_MAX_SUB_PROCESSORS) +#define UVM_MAX_PROCESSORS (UVM_MAX_GPUS + 1) -#define UVM_PROCESSOR_MASK_SIZE ((UVM_MAX_PROCESSORS_V2 + (sizeof(NvU64) * 8) - 1) / (sizeof(NvU64) * 8)) +#define UVM_PROCESSOR_MASK_SIZE ((UVM_MAX_PROCESSORS + (sizeof(NvU64) * 8) - 1) / (sizeof(NvU64) * 8)) #define UVM_INIT_FLAGS_DISABLE_HMM ((NvU64)0x1) #define UVM_INIT_FLAGS_MULTI_PROCESS_SHARING_MODE ((NvU64)0x2) @@ -423,29 +422,7 @@ typedef struct NvU32 pid; // process id causing the fault NvU32 threadId; // thread id causing the fault NvU64 pc; // address of the instruction causing the fault -} UvmEventCpuFaultInfo_V1; - -typedef struct -{ - // - // eventType has to be 1st argument of this structure. Setting eventType to - // UvmEventTypeMemoryViolation helps to identify event data in a queue. - // - NvU8 eventType; - NvU8 accessType; // read/write violation (UvmEventMemoryAccessType) - // - // This structure is shared between UVM kernel and tools. - // Manually padding the structure so that compiler options like pragma pack - // or malign-double will have no effect on the field offsets. - // - NvU16 padding16Bits; - NvS32 nid; // NUMA node ID of faulting CPU - NvU64 address; // faulting address - NvU64 timeStamp; // cpu time when the fault occurred - NvU32 pid; // process id causing the fault - NvU32 threadId; // thread id causing the fault - NvU64 pc; // address of the instruction causing the fault -} UvmEventCpuFaultInfo_V2; +} UvmEventCpuFaultInfo; typedef enum { @@ -721,13 +698,7 @@ typedef struct // NvU8 eventType; NvU8 faultType; // type of gpu fault, refer UvmEventFaultType - NvU8 accessType; // memory access type, refer UvmEventMemoryAccessType - // - // This structure is shared between UVM kernel and tools. - // Manually padding the structure so that compiler options like pragma pack - // or malign-double will have no effect on the field offsets - // - NvU8 padding8Bits_1; + NvU16 gpuIndex; // GPU that experienced the fault union { NvU16 gpcId; // If this is a replayable fault, this field contains @@ -759,14 +730,13 @@ typedef struct // UvmEventFaultClientTypeGpc indicates replayable // fault, while UvmEventFaultClientTypeHub indicates // non-replayable fault. - + NvU8 accessType; // memory access type, refer UvmEventMemoryAccessType // // This structure is shared between UVM kernel and tools. // Manually padding the structure so that compiler options like pragma pack // or malign-double will have no effect on the field offsets // - NvU8 padding8Bits_2; - NvU16 gpuIndex; // GPU that experienced the fault + NvU16 padding16bits; } UvmEventGpuFaultInfo_V2; //------------------------------------------------------------------------------ @@ -1108,8 +1078,8 @@ typedef struct // or malign-double will have no effect on the field offsets // NvU8 padding8bits; - NvU16 padding16bits[2]; NvU16 processorIndex; // index of the cpu/gpu that was throttled + NvU32 padding32bits; NvU64 address; // address of the page whose servicing is being // throttled NvU64 timeStamp; // cpu start time stamp for the throttling operation @@ -1150,8 +1120,8 @@ typedef struct // or malign-double will have no effect on the field offsets // NvU8 padding8bits; - NvU16 padding16bits[2]; NvU16 processorIndex; // index of the cpu/gpu that was throttled + NvU32 padding32bits; NvU64 address; // address of the page whose servicing is being // throttled NvU64 timeStamp; // cpu end time stamp for the throttling operation @@ -1409,7 +1379,7 @@ typedef struct NvU8 eventType; UvmEventMigrationInfo_Lite migration_Lite; - UvmEventCpuFaultInfo_V1 cpuFault; + UvmEventCpuFaultInfo cpuFault; UvmEventMigrationInfo_V1 migration; UvmEventGpuFaultInfo_V1 gpuFault; UvmEventGpuFaultReplayInfo_V1 gpuFaultReplay; @@ -1443,7 +1413,7 @@ typedef struct NvU8 eventType; UvmEventMigrationInfo_Lite migration_Lite; - UvmEventCpuFaultInfo_V2 cpuFault; + UvmEventCpuFaultInfo cpuFault; UvmEventMigrationInfo_V2 migration; UvmEventGpuFaultInfo_V2 gpuFault; UvmEventGpuFaultReplayInfo_V2 gpuFaultReplay; @@ -1510,19 +1480,7 @@ typedef enum { UvmToolsEventQueueVersion_V2 = 2, } UvmToolsEventQueueVersion; -typedef struct UvmEventControlData_V1_tag { - // entries between get_ahead and get_behind are currently being read - volatile NvU32 get_ahead; - volatile NvU32 get_behind; - // entries between put_ahead and put_behind are currently being written - volatile NvU32 put_ahead; - volatile NvU32 put_behind; - - // counter of dropped events - NvU64 dropped[UvmEventNumTypesAll]; -} UvmToolsEventControlData_V1; - -typedef struct UvmEventControlData_V2_tag { +typedef struct UvmEventControlData_tag { // entries between get_ahead and get_behind are currently being read volatile NvU32 get_ahead; volatile NvU32 get_behind; @@ -1531,19 +1489,12 @@ typedef struct UvmEventControlData_V2_tag { volatile NvU32 put_ahead; volatile NvU32 put_behind; - // The version values are limited to UvmToolsEventQueueVersion and - // initialized by UvmToolsCreateEventQueue(). - NvU32 version; - NvU32 padding32Bits; - // counter of dropped events NvU64 dropped[UvmEventNumTypesAll]; -} UvmToolsEventControlData_V2; +} UvmToolsEventControlData; -// For backward compatibility: -// TODO: Bug 4465348: remove these after replacing old references. -typedef UvmToolsEventControlData_V1 UvmToolsEventControlData; -typedef UvmEventEntry_V1 UvmEventEntry; +// TODO: Bug 4465348: remove this after replacing old references. +typedef UvmToolsEventControlData UvmToolsEventControlData_V1; //------------------------------------------------------------------------------ // UVM Tools forward types (handles) definitions diff --git a/kernel-open/nvidia-uvm/uvm_va_block.c b/kernel-open/nvidia-uvm/uvm_va_block.c index 906a4dae70..245fefcbfb 100644 --- a/kernel-open/nvidia-uvm/uvm_va_block.c +++ b/kernel-open/nvidia-uvm/uvm_va_block.c @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2015-2023 NVIDIA Corporation + Copyright (c) 2015-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -1328,12 +1328,12 @@ NV_STATUS uvm_va_block_create(uvm_va_range_t *va_range, static void cpu_chunk_remove_sysmem_gpu_mapping(uvm_cpu_chunk_t *chunk, uvm_gpu_t *gpu) { - NvU64 gpu_mapping_addr = uvm_cpu_chunk_get_parent_gpu_phys_addr(chunk, gpu->parent); + NvU64 gpu_mapping_addr = uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu); if (gpu_mapping_addr == 0) return; uvm_pmm_sysmem_mappings_remove_gpu_mapping(&gpu->pmm_reverse_sysmem_mappings, gpu_mapping_addr); - uvm_cpu_chunk_unmap_parent_gpu_phys(chunk, gpu->parent); + uvm_cpu_chunk_unmap_gpu(chunk, gpu); } static NV_STATUS cpu_chunk_add_sysmem_gpu_mapping(uvm_cpu_chunk_t *chunk, @@ -1356,17 +1356,14 @@ static NV_STATUS cpu_chunk_add_sysmem_gpu_mapping(uvm_cpu_chunk_t *chunk, chunk_size = uvm_cpu_chunk_get_size(chunk); - // TODO: Bug 3744779: Handle benign assertion in - // pmm_sysmem_mappings_remove_gpu_mapping() in case of a - // failure. status = uvm_pmm_sysmem_mappings_add_gpu_mapping(&gpu->pmm_reverse_sysmem_mappings, - uvm_cpu_chunk_get_parent_gpu_phys_addr(chunk, gpu->parent), + uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu), uvm_va_block_cpu_page_address(block, page_index), chunk_size, block, UVM_ID_CPU); if (status != NV_OK) - cpu_chunk_remove_sysmem_gpu_mapping(chunk, gpu); + uvm_cpu_chunk_unmap_gpu(chunk, gpu); return status; } @@ -1395,10 +1392,10 @@ static NV_STATUS block_gpu_map_phys_all_cpu_pages(uvm_va_block_t *block, uvm_gpu for_each_possible_uvm_node(nid) { for_each_cpu_chunk_in_block(chunk, page_index, block, nid) { - UVM_ASSERT_MSG(uvm_cpu_chunk_get_parent_gpu_phys_addr(chunk, gpu->parent) == 0, + UVM_ASSERT_MSG(uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu) == 0, "GPU%u DMA address 0x%llx\n", uvm_id_value(gpu->id), - uvm_cpu_chunk_get_parent_gpu_phys_addr(chunk, gpu->parent)); + uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu)); status = cpu_chunk_add_sysmem_gpu_mapping(chunk, block, page_index, gpu); if (status != NV_OK) @@ -1561,8 +1558,7 @@ NV_STATUS uvm_va_block_gpu_state_alloc(uvm_va_block_t *va_block) } void uvm_va_block_unmap_cpu_chunk_on_gpus(uvm_va_block_t *block, - uvm_cpu_chunk_t *chunk, - uvm_page_index_t page_index) + uvm_cpu_chunk_t *chunk) { uvm_gpu_id_t id; @@ -1601,7 +1597,7 @@ NV_STATUS uvm_va_block_map_cpu_chunk_on_gpus(uvm_va_block_t *block, return NV_OK; error: - uvm_va_block_unmap_cpu_chunk_on_gpus(block, chunk, page_index); + uvm_va_block_unmap_cpu_chunk_on_gpus(block, chunk); return status; } @@ -1620,7 +1616,7 @@ void uvm_va_block_remove_cpu_chunks(uvm_va_block_t *va_block, uvm_va_block_regio uvm_page_mask_region_clear(&va_block->cpu.pte_bits[UVM_PTE_BITS_CPU_WRITE], chunk_region); uvm_va_block_cpu_clear_resident_region(va_block, nid, chunk_region); uvm_cpu_chunk_remove_from_block(va_block, nid, page_index); - uvm_va_block_unmap_cpu_chunk_on_gpus(va_block, chunk, page_index); + uvm_va_block_unmap_cpu_chunk_on_gpus(va_block, chunk); uvm_cpu_chunk_free(chunk); } } @@ -2308,7 +2304,7 @@ static bool block_gpu_supports_2m(uvm_va_block_t *block, uvm_gpu_t *gpu) return uvm_mmu_page_size_supported(&gpu_va_space->page_tables, UVM_PAGE_SIZE_2M); } -NvU32 uvm_va_block_gpu_big_page_size(uvm_va_block_t *va_block, uvm_gpu_t *gpu) +NvU64 uvm_va_block_gpu_big_page_size(uvm_va_block_t *va_block, uvm_gpu_t *gpu) { uvm_gpu_va_space_t *gpu_va_space; @@ -2316,7 +2312,7 @@ NvU32 uvm_va_block_gpu_big_page_size(uvm_va_block_t *va_block, uvm_gpu_t *gpu) return gpu_va_space->page_tables.big_page_size; } -static uvm_va_block_region_t range_big_page_region_all(NvU64 start, NvU64 end, NvU32 big_page_size) +static uvm_va_block_region_t range_big_page_region_all(NvU64 start, NvU64 end, NvU64 big_page_size) { NvU64 first_addr = UVM_ALIGN_UP(start, big_page_size); NvU64 outer_addr = UVM_ALIGN_DOWN(end + 1, big_page_size); @@ -2330,20 +2326,20 @@ static uvm_va_block_region_t range_big_page_region_all(NvU64 start, NvU64 end, N return uvm_va_block_region((first_addr - start) / PAGE_SIZE, (outer_addr - start) / PAGE_SIZE); } -static size_t range_num_big_pages(NvU64 start, NvU64 end, NvU32 big_page_size) +static size_t range_num_big_pages(NvU64 start, NvU64 end, NvU64 big_page_size) { uvm_va_block_region_t region = range_big_page_region_all(start, end, big_page_size); return (size_t)uvm_div_pow2_64(uvm_va_block_region_size(region), big_page_size); } -uvm_va_block_region_t uvm_va_block_big_page_region_all(uvm_va_block_t *va_block, NvU32 big_page_size) +uvm_va_block_region_t uvm_va_block_big_page_region_all(uvm_va_block_t *va_block, NvU64 big_page_size) { return range_big_page_region_all(va_block->start, va_block->end, big_page_size); } uvm_va_block_region_t uvm_va_block_big_page_region_subset(uvm_va_block_t *va_block, uvm_va_block_region_t region, - NvU32 big_page_size) + NvU64 big_page_size) { NvU64 start = uvm_va_block_region_start(va_block, region); NvU64 end = uvm_va_block_region_end(va_block, region); @@ -2361,12 +2357,12 @@ uvm_va_block_region_t uvm_va_block_big_page_region_subset(uvm_va_block_t *va_blo return big_region; } -size_t uvm_va_block_num_big_pages(uvm_va_block_t *va_block, NvU32 big_page_size) +size_t uvm_va_block_num_big_pages(uvm_va_block_t *va_block, NvU64 big_page_size) { return range_num_big_pages(va_block->start, va_block->end, big_page_size); } -NvU64 uvm_va_block_big_page_addr(uvm_va_block_t *va_block, size_t big_page_index, NvU32 big_page_size) +NvU64 uvm_va_block_big_page_addr(uvm_va_block_t *va_block, size_t big_page_index, NvU64 big_page_size) { NvU64 addr = UVM_ALIGN_UP(va_block->start, big_page_size) + (big_page_index * big_page_size); UVM_ASSERT(addr >= va_block->start); @@ -2374,7 +2370,7 @@ NvU64 uvm_va_block_big_page_addr(uvm_va_block_t *va_block, size_t big_page_index return addr; } -uvm_va_block_region_t uvm_va_block_big_page_region(uvm_va_block_t *va_block, size_t big_page_index, NvU32 big_page_size) +uvm_va_block_region_t uvm_va_block_big_page_region(uvm_va_block_t *va_block, size_t big_page_index, NvU64 big_page_size) { NvU64 page_addr = uvm_va_block_big_page_addr(va_block, big_page_index, big_page_size); @@ -2390,7 +2386,7 @@ uvm_va_block_region_t uvm_va_block_big_page_region(uvm_va_block_t *va_block, siz // uvm_va_block_gpu_state_t::big_ptes) corresponding to page_index. If // page_index cannot be covered by a big PTE due to alignment or block size, // MAX_BIG_PAGES_PER_UVM_VA_BLOCK is returned. -size_t uvm_va_block_big_page_index(uvm_va_block_t *va_block, uvm_page_index_t page_index, NvU32 big_page_size) +size_t uvm_va_block_big_page_index(uvm_va_block_t *va_block, uvm_page_index_t page_index, NvU64 big_page_size) { uvm_va_block_region_t big_region_all = uvm_va_block_big_page_region_all(va_block, big_page_size); size_t big_index; @@ -2415,7 +2411,7 @@ static void uvm_page_mask_init_from_big_ptes(uvm_va_block_t *block, { uvm_va_block_region_t big_region; size_t big_page_index; - NvU32 big_page_size = uvm_va_block_gpu_big_page_size(block, gpu); + NvU64 big_page_size = uvm_va_block_gpu_big_page_size(block, gpu); uvm_page_mask_zero(mask_out); @@ -2425,7 +2421,7 @@ static void uvm_page_mask_init_from_big_ptes(uvm_va_block_t *block, } } -NvU32 uvm_va_block_page_size_cpu(uvm_va_block_t *va_block, uvm_page_index_t page_index) +NvU64 uvm_va_block_page_size_cpu(uvm_va_block_t *va_block, uvm_page_index_t page_index) { if (!uvm_page_mask_test(&va_block->cpu.pte_bits[UVM_PTE_BITS_CPU_READ], page_index)) return 0; @@ -2439,7 +2435,7 @@ NvU32 uvm_va_block_page_size_cpu(uvm_va_block_t *va_block, uvm_page_index_t page return PAGE_SIZE; } -NvU32 uvm_va_block_page_size_gpu(uvm_va_block_t *va_block, uvm_gpu_id_t gpu_id, uvm_page_index_t page_index) +NvU64 uvm_va_block_page_size_gpu(uvm_va_block_t *va_block, uvm_gpu_id_t gpu_id, uvm_page_index_t page_index) { uvm_va_block_gpu_state_t *gpu_state = uvm_va_block_gpu_state_get(va_block, gpu_id); size_t big_page_size, big_page_index; @@ -2467,7 +2463,7 @@ NvU32 uvm_va_block_page_size_gpu(uvm_va_block_t *va_block, uvm_gpu_id_t gpu_id, // resident. Note that this is different from uvm_va_block_page_size_* because // those return the size of the PTE which maps the page index, which may be // smaller than the physical allocation. -static NvU32 block_phys_page_size(uvm_va_block_t *block, block_phys_page_t page) +static NvU64 block_phys_page_size(uvm_va_block_t *block, block_phys_page_t page) { uvm_va_block_gpu_state_t *gpu_state; uvm_chunk_size_t chunk_size; @@ -2480,7 +2476,7 @@ static NvU32 block_phys_page_size(uvm_va_block_t *block, block_phys_page_t page) return 0; UVM_ASSERT(uvm_processor_mask_test(&block->resident, UVM_ID_CPU)); - return (NvU32)uvm_cpu_chunk_get_size(chunk); + return uvm_cpu_chunk_get_size(chunk); } gpu_state = uvm_va_block_gpu_state_get(block, page.processor); @@ -2489,10 +2485,10 @@ static NvU32 block_phys_page_size(uvm_va_block_t *block, block_phys_page_t page) UVM_ASSERT(uvm_processor_mask_test(&block->resident, page.processor)); block_gpu_chunk_index(block, block_get_gpu(block, page.processor), page.page_index, &chunk_size); - return (NvU32)chunk_size; + return chunk_size; } -NvU32 uvm_va_block_get_physical_size(uvm_va_block_t *block, +NvU64 uvm_va_block_get_physical_size(uvm_va_block_t *block, uvm_processor_id_t processor, uvm_page_index_t page_index) { @@ -3344,7 +3340,7 @@ static uvm_gpu_phys_address_t block_phys_page_address(uvm_va_block_t *block, if (UVM_ID_IS_CPU(block_page.processor)) { uvm_cpu_chunk_t *chunk = uvm_cpu_chunk_get_chunk_for_page(block, block_page.nid, block_page.page_index); - NvU64 dma_addr = uvm_cpu_chunk_get_parent_gpu_phys_addr(chunk, gpu->parent); + NvU64 dma_addr = uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu); uvm_va_block_region_t chunk_region = uvm_va_block_chunk_region(block, uvm_cpu_chunk_get_size(chunk), block_page.page_index); @@ -5387,7 +5383,7 @@ static bool block_check_gpu_chunks(uvm_va_block_t *block, uvm_gpu_id_t id) if (chunk) { if (chunk_size != uvm_gpu_chunk_get_size(chunk)) { - UVM_ERR_PRINT("chunk size mismatch: calc %u, actual %u. VA block [0x%llx, 0x%llx) GPU: %u page_index: %u chunk index: %zu\n", + UVM_ERR_PRINT("chunk size mismatch: calc %u, actual %u. VA block [0x%llx, 0x%llx) GPU: %u page_index: %u chunk index: %lu\n", chunk_size, uvm_gpu_chunk_get_size(chunk), block->start, @@ -5399,7 +5395,7 @@ static bool block_check_gpu_chunks(uvm_va_block_t *block, uvm_gpu_id_t id) } if (chunk->state != UVM_PMM_GPU_CHUNK_STATE_ALLOCATED) { - UVM_ERR_PRINT("Invalid chunk state %s. VA block [0x%llx, 0x%llx) GPU: %u page_index: %u chunk index: %zu chunk_size: %u\n", + UVM_ERR_PRINT("Invalid chunk state %s. VA block [0x%llx, 0x%llx) GPU: %u page_index: %u chunk index: %lu chunk_size: llu\n", uvm_pmm_gpu_chunk_state_string(chunk->state), block->start, block->end + 1, @@ -5718,7 +5714,7 @@ static bool block_check_mappings_ptes(uvm_va_block_t *block, uvm_va_block_contex uvm_pte_bits_gpu_t pte_bit; uvm_processor_id_t resident_id; uvm_prot_t prot; - NvU32 big_page_size; + NvU64 big_page_size; size_t num_big_pages, big_page_index; uvm_va_block_region_t big_region, chunk_region; uvm_gpu_chunk_t *chunk; @@ -6170,7 +6166,7 @@ static void block_gpu_pte_big_split_write_4k(uvm_va_block_t *block, size_t big_page_index; uvm_processor_id_t curr_resident_id; uvm_prot_t curr_prot; - NvU32 big_page_size = uvm_va_block_gpu_big_page_size(block, gpu); + NvU64 big_page_size = uvm_va_block_gpu_big_page_size(block, gpu); if (UVM_ID_IS_INVALID(resident_id)) UVM_ASSERT(new_prot == UVM_PROT_NONE); @@ -6252,7 +6248,7 @@ static void block_gpu_pte_clear_big(uvm_va_block_t *block, { uvm_va_block_gpu_state_t *gpu_state = uvm_va_block_gpu_state_get(block, gpu->id); uvm_gpu_va_space_t *gpu_va_space = uvm_va_block_get_gpu_va_space(block, gpu); - NvU32 big_page_size = gpu_va_space->page_tables.big_page_size; + NvU64 big_page_size = gpu_va_space->page_tables.big_page_size; uvm_gpu_phys_address_t pte_addr; NvU32 pte_size = uvm_mmu_pte_size(&gpu_va_space->page_tables, big_page_size); size_t big_page_index; @@ -6298,7 +6294,7 @@ static void block_gpu_pte_write_big(uvm_va_block_t *block, uvm_va_block_gpu_state_t *gpu_state = uvm_va_block_gpu_state_get(block, gpu->id); uvm_gpu_va_space_t *gpu_va_space = uvm_va_block_get_gpu_va_space(block, gpu); uvm_page_tree_t *tree = &gpu_va_space->page_tables; - NvU32 big_page_size = tree->big_page_size; + NvU64 big_page_size = tree->big_page_size; NvU32 pte_size = uvm_mmu_pte_size(tree, big_page_size); size_t big_page_index; uvm_va_block_region_t contig_region = {0}; @@ -6376,7 +6372,7 @@ static void block_gpu_pte_merge_big_and_end(uvm_va_block_t *block, { uvm_va_block_gpu_state_t *gpu_state = uvm_va_block_gpu_state_get(block, gpu->id); uvm_page_tree_t *tree = &uvm_va_block_get_gpu_va_space(block, gpu)->page_tables; - NvU32 big_page_size = tree->big_page_size; + NvU64 big_page_size = tree->big_page_size; NvU64 unmapped_pte_val = tree->hal->unmapped_pte(big_page_size); size_t big_page_index; DECLARE_BITMAP(dummy_big_ptes, MAX_BIG_PAGES_PER_UVM_VA_BLOCK); @@ -6937,7 +6933,7 @@ static void block_gpu_split_big(uvm_va_block_t *block, uvm_page_tree_t *tree = &uvm_va_block_get_gpu_va_space(block, gpu)->page_tables; uvm_pte_batch_t *pte_batch = &block_context->mapping.pte_batch; uvm_tlb_batch_t *tlb_batch = &block_context->mapping.tlb_batch; - NvU32 big_page_size = tree->big_page_size; + NvU64 big_page_size = tree->big_page_size; uvm_va_block_region_t big_region; uvm_processor_id_t resident_id; size_t big_page_index; @@ -7039,7 +7035,7 @@ static void block_gpu_map_big_and_4k(uvm_va_block_t *block, DECLARE_BITMAP(big_ptes_mask, MAX_BIG_PAGES_PER_UVM_VA_BLOCK); uvm_va_block_region_t big_region; size_t big_page_index; - NvU32 big_page_size = tree->big_page_size; + NvU64 big_page_size = tree->big_page_size; uvm_membar_t tlb_membar = block_pte_op_membar(pte_op, gpu, resident_id); UVM_ASSERT(!gpu_state->pte_is_2m); @@ -7341,7 +7337,7 @@ static void block_gpu_unmap_big_and_4k(uvm_va_block_t *block, DECLARE_BITMAP(big_ptes_split, MAX_BIG_PAGES_PER_UVM_VA_BLOCK); DECLARE_BITMAP(big_ptes_before_or_after, MAX_BIG_PAGES_PER_UVM_VA_BLOCK); DECLARE_BITMAP(big_ptes_mask, MAX_BIG_PAGES_PER_UVM_VA_BLOCK); - NvU32 big_page_size = tree->big_page_size; + NvU64 big_page_size = tree->big_page_size; NvU64 unmapped_pte_val = tree->hal->unmapped_pte(big_page_size); UVM_ASSERT(!gpu_state->pte_is_2m); @@ -7487,7 +7483,7 @@ static void block_gpu_compute_new_pte_state(uvm_va_block_t *block, { uvm_va_block_gpu_state_t *gpu_state = uvm_va_block_gpu_state_get(block, gpu->id); uvm_va_block_region_t big_region_all, big_page_region, region; - NvU32 big_page_size; + NvU64 big_page_size; uvm_page_index_t page_index; size_t big_page_index; DECLARE_BITMAP(big_ptes_not_covered, MAX_BIG_PAGES_PER_UVM_VA_BLOCK); @@ -7640,7 +7636,7 @@ static void block_gpu_compute_new_pte_state(uvm_va_block_t *block, // happens, the pending tracker is added to the block's tracker. static NV_STATUS block_alloc_pt_range_with_retry(uvm_va_block_t *va_block, uvm_gpu_t *gpu, - NvU32 page_size, + NvU64 page_size, uvm_page_table_range_t *page_table_range, uvm_tracker_t *pending_tracker) { @@ -7763,13 +7759,13 @@ static NV_STATUS block_alloc_pt_range_with_retry(uvm_va_block_t *va_block, // sizes. See block_alloc_pt_range_with_retry. static NV_STATUS block_alloc_ptes_with_retry(uvm_va_block_t *va_block, uvm_gpu_t *gpu, - NvU32 page_sizes, + NvU64 page_sizes, uvm_tracker_t *pending_tracker) { uvm_va_block_gpu_state_t *gpu_state = uvm_va_block_gpu_state_get(va_block, gpu->id); uvm_gpu_va_space_t *gpu_va_space = uvm_va_block_get_gpu_va_space(va_block, gpu); uvm_page_table_range_t *range; - NvU32 page_size; + NvU64 page_size; NV_STATUS status, final_status = NV_OK; UVM_ASSERT(gpu_state); @@ -7821,7 +7817,7 @@ static NV_STATUS block_alloc_ptes_new_state(uvm_va_block_t *va_block, uvm_va_block_new_pte_state_t *new_pte_state, uvm_tracker_t *pending_tracker) { - NvU32 page_sizes = 0; + NvU64 page_sizes = 0; if (new_pte_state->pte_is_2m) { page_sizes |= UVM_PAGE_SIZE_2M; @@ -7853,8 +7849,8 @@ static NV_STATUS block_pre_populate_pde1_gpu(uvm_va_block_t *block, uvm_gpu_va_space_t *gpu_va_space, uvm_tracker_t *pending_tracker) { - NvU32 page_sizes; - NvU32 big_page_size; + NvU64 page_sizes; + NvU64 big_page_size; uvm_gpu_t *gpu; uvm_va_block_gpu_state_t *gpu_state; @@ -9509,7 +9505,6 @@ static void block_kill(uvm_va_block_t *block) // Free CPU pages for_each_possible_uvm_node(nid) { uvm_va_block_cpu_node_state_t *node_state = block_node_state_get(block, nid); - size_t index = node_to_index(nid); for_each_cpu_chunk_in_block_safe(chunk, page_index, next_page_index, block, nid) { // be conservative. @@ -9524,9 +9519,20 @@ static void block_kill(uvm_va_block_t *block) UVM_ASSERT(uvm_page_mask_empty(&node_state->allocated)); UVM_ASSERT(node_state->chunks == 0); - kmem_cache_free(g_uvm_va_block_cpu_node_state_cache, block->cpu.node_state[index]); } + // While a per-NUMA node_state array is in use, all of its elements are + // expected to be valid. Therefore the teardown of these elements must occur + // as a single "transaction". This teardown must take place after freeing + // the CPU pages (see the "Free CPU pages" loop above). This is because as + // part of removing chunks from VA blocks, the per-page allocated bitmap is + // recomputed using the per-NUMA node_state array elements. + for_each_possible_uvm_node(nid) { + uvm_va_block_cpu_node_state_t *node_state; + + node_state = block_node_state_get(block, nid); + kmem_cache_free(g_uvm_va_block_cpu_node_state_cache, node_state); + } uvm_kvfree((void *)block->cpu.node_state); block->cpu.node_state = NULL; @@ -9642,8 +9648,8 @@ static NV_STATUS block_split_presplit_ptes_gpu(uvm_va_block_t *existing, uvm_va_ uvm_va_block_gpu_state_t *existing_gpu_state = uvm_va_block_gpu_state_get(existing, gpu->id); uvm_va_space_t *va_space = uvm_va_block_get_va_space(existing); uvm_va_block_context_t *block_context = uvm_va_space_block_context(va_space, NULL); - NvU32 big_page_size = uvm_va_block_gpu_big_page_size(existing, gpu); - NvU32 alloc_sizes; + NvU64 big_page_size = uvm_va_block_gpu_big_page_size(existing, gpu); + NvU64 alloc_sizes; DECLARE_BITMAP(new_big_ptes, MAX_BIG_PAGES_PER_UVM_VA_BLOCK); uvm_page_index_t new_start_page_index = uvm_va_block_cpu_page_index(existing, new->start); size_t big_page_index; @@ -9986,7 +9992,7 @@ static NV_STATUS block_split_cpu_chunk_one(uvm_va_block_t *block, uvm_page_index gpu = block_get_gpu(block, id); // If the parent chunk has not been mapped, there is nothing to split. - gpu_mapping_addr = uvm_cpu_chunk_get_parent_gpu_phys_addr(chunk, gpu->parent); + gpu_mapping_addr = uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu); if (gpu_mapping_addr == 0) continue; @@ -10008,7 +10014,7 @@ static NV_STATUS block_split_cpu_chunk_one(uvm_va_block_t *block, uvm_page_index merge: for_each_gpu_id_in_mask(id, gpu_split_mask) { gpu = block_get_gpu(block, id); - gpu_mapping_addr = uvm_cpu_chunk_get_parent_gpu_phys_addr(chunk, gpu->parent); + gpu_mapping_addr = uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu); uvm_pmm_sysmem_mappings_merge_gpu_mappings(&gpu->pmm_reverse_sysmem_mappings, gpu_mapping_addr, chunk_size); @@ -10194,7 +10200,7 @@ static void block_merge_cpu_chunks_one(uvm_va_block_t *block, uvm_page_index_t p continue; gpu = block_get_gpu(block, id); - gpu_mapping_addr = uvm_cpu_chunk_get_parent_gpu_phys_addr(chunk, gpu->parent); + gpu_mapping_addr = uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu); if (gpu_mapping_addr == 0) continue; @@ -10646,8 +10652,7 @@ static void block_split_gpu(uvm_va_block_t *existing, uvm_va_block_t *new, uvm_g for_each_possible_uvm_node(nid) { for_each_cpu_chunk_in_block(cpu_chunk, page_index, new, nid) { uvm_pmm_sysmem_mappings_reparent_gpu_mapping(&gpu->pmm_reverse_sysmem_mappings, - uvm_cpu_chunk_get_parent_gpu_phys_addr(cpu_chunk, - gpu->parent), + uvm_cpu_chunk_get_gpu_phys_addr(cpu_chunk, gpu), new); } } @@ -10685,7 +10690,7 @@ static void block_split_gpu(uvm_va_block_t *existing, uvm_va_block_t *new, uvm_g gpu_va_space = uvm_gpu_va_space_get(va_space, gpu); if (gpu_va_space) { if (existing_gpu_state->page_table_range_big.table) { - NvU32 big_page_size = uvm_va_block_gpu_big_page_size(existing, gpu); + NvU64 big_page_size = uvm_va_block_gpu_big_page_size(existing, gpu); // existing's end has not been adjusted yet existing_pages_big = range_num_big_pages(existing->start, new->start - 1, big_page_size); @@ -13614,7 +13619,7 @@ NV_STATUS uvm_test_va_residency_info(UVM_TEST_VA_RESIDENCY_INFO_PARAMS *params, for_each_id_in_mask(id, &block->mapped) { uvm_processor_id_t processor_to_map; block_phys_page_t block_page; - NvU32 page_size = uvm_va_block_page_size_processor(block, id, page_index); + NvU64 page_size = uvm_va_block_page_size_processor(block, id, page_index); int nid = NUMA_NO_NODE; if (page_size == 0) @@ -13650,7 +13655,7 @@ NV_STATUS uvm_test_va_residency_info(UVM_TEST_VA_RESIDENCY_INFO_PARAMS *params, if (uvm_processor_mask_test(resident_on_mask, UVM_ID_CPU)) { if (uvm_pmm_sysmem_mappings_indirect_supported()) { for_each_gpu_id(id) { - NvU32 page_size = uvm_va_block_page_size_processor(block, id, page_index); + NvU64 page_size = uvm_va_block_page_size_processor(block, id, page_index); uvm_reverse_map_t sysmem_page; uvm_cpu_chunk_t *chunk = uvm_cpu_chunk_get_chunk_for_page_resident(block, page_index); size_t num_pages; @@ -13665,8 +13670,7 @@ NV_STATUS uvm_test_va_residency_info(UVM_TEST_VA_RESIDENCY_INFO_PARAMS *params, continue; num_pages = uvm_pmm_sysmem_mappings_dma_to_virt(&gpu->pmm_reverse_sysmem_mappings, - uvm_cpu_chunk_get_parent_gpu_phys_addr(chunk, - gpu->parent), + uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu), uvm_cpu_chunk_get_size(chunk), &sysmem_page, 1); diff --git a/kernel-open/nvidia-uvm/uvm_va_block.h b/kernel-open/nvidia-uvm/uvm_va_block.h index 220df10b03..4e0fdb9f18 100644 --- a/kernel-open/nvidia-uvm/uvm_va_block.h +++ b/kernel-open/nvidia-uvm/uvm_va_block.h @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2015-2023 NVIDIA Corporation + Copyright (c) 2015-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -111,8 +111,6 @@ typedef struct // Pages that have been evicted to sysmem uvm_page_mask_t evicted; - NvU64 *cpu_chunks_dma_addrs; - // Array of naturally-aligned chunks. Each chunk has the largest possible // size which can fit within the block, so they are not uniform size. // @@ -2155,8 +2153,7 @@ NV_STATUS uvm_va_block_map_cpu_chunk_on_gpus(uvm_va_block_t *va_block, // Physically unmap a CPU chunk from all registered GPUs. // Locking: The va_block lock must be held. void uvm_va_block_unmap_cpu_chunk_on_gpus(uvm_va_block_t *va_block, - uvm_cpu_chunk_t *chunk, - uvm_page_index_t page_index); + uvm_cpu_chunk_t *chunk); // Remove any CPU chunks in the given region. // Locking: The va_block lock must be held. @@ -2166,19 +2163,19 @@ void uvm_va_block_remove_cpu_chunks(uvm_va_block_t *va_block, uvm_va_block_regio // specified processor in the block. Returns 0 if the address is not resident on // the specified processor. // Locking: The va_block lock must be held. -NvU32 uvm_va_block_get_physical_size(uvm_va_block_t *block, +NvU64 uvm_va_block_get_physical_size(uvm_va_block_t *block, uvm_processor_id_t processor, uvm_page_index_t page_index); // Get CPU page size or 0 if it is not mapped -NvU32 uvm_va_block_page_size_cpu(uvm_va_block_t *va_block, +NvU64 uvm_va_block_page_size_cpu(uvm_va_block_t *va_block, uvm_page_index_t page_index); // Get GPU page size or 0 if it is not mapped on the given GPU -NvU32 uvm_va_block_page_size_gpu(uvm_va_block_t *va_block, uvm_gpu_id_t gpu_id, uvm_page_index_t page_index); +NvU64 uvm_va_block_page_size_gpu(uvm_va_block_t *va_block, uvm_gpu_id_t gpu_id, uvm_page_index_t page_index); // Get page size or 0 if it is not mapped on the given processor -static NvU32 uvm_va_block_page_size_processor(uvm_va_block_t *va_block, +static NvU64 uvm_va_block_page_size_processor(uvm_va_block_t *va_block, uvm_processor_id_t processor_id, uvm_page_index_t page_index) { @@ -2189,10 +2186,10 @@ static NvU32 uvm_va_block_page_size_processor(uvm_va_block_t *va_block, } // Returns the big page size for the GPU VA space of the block -NvU32 uvm_va_block_gpu_big_page_size(uvm_va_block_t *va_block, uvm_gpu_t *gpu); +NvU64 uvm_va_block_gpu_big_page_size(uvm_va_block_t *va_block, uvm_gpu_t *gpu); // Returns the number of big pages in the VA block for the given size -size_t uvm_va_block_num_big_pages(uvm_va_block_t *va_block, NvU32 big_page_size); +size_t uvm_va_block_num_big_pages(uvm_va_block_t *va_block, NvU64 big_page_size); // Returns the number of big pages in the VA block for the big page size on the // given GPU @@ -2202,29 +2199,29 @@ static size_t uvm_va_block_gpu_num_big_pages(uvm_va_block_t *va_block, uvm_gpu_t } // Returns the start address of the given big page index and big page size -NvU64 uvm_va_block_big_page_addr(uvm_va_block_t *va_block, size_t big_page_index, NvU32 big_page_size); +NvU64 uvm_va_block_big_page_addr(uvm_va_block_t *va_block, size_t big_page_index, NvU64 big_page_size); // Returns the region [start, end] of the given big page index and big page size uvm_va_block_region_t uvm_va_block_big_page_region(uvm_va_block_t *va_block, size_t big_page_index, - NvU32 big_page_size); + NvU64 big_page_size); // Returns the largest sub-region region of [start, end] which can fit big // pages. If the region cannot fit any big pages, an invalid region (0, 0) is // returned. -uvm_va_block_region_t uvm_va_block_big_page_region_all(uvm_va_block_t *va_block, NvU32 big_page_size); +uvm_va_block_region_t uvm_va_block_big_page_region_all(uvm_va_block_t *va_block, NvU64 big_page_size); // Returns the largest sub-region region of 'region' which can fit big pages. // If the region cannot fit any big pages, an invalid region (0, 0) is returned. uvm_va_block_region_t uvm_va_block_big_page_region_subset(uvm_va_block_t *va_block, uvm_va_block_region_t region, - NvU32 big_page_size); + NvU64 big_page_size); // Returns the big page index (the bit index within // uvm_va_block_gpu_state_t::big_ptes) corresponding to page_index. If // page_index cannot be covered by a big PTE due to alignment or block size, // MAX_BIG_PAGES_PER_UVM_VA_BLOCK is returned. -size_t uvm_va_block_big_page_index(uvm_va_block_t *va_block, uvm_page_index_t page_index, NvU32 big_page_size); +size_t uvm_va_block_big_page_index(uvm_va_block_t *va_block, uvm_page_index_t page_index, NvU64 big_page_size); // Returns the new residency for a page that faulted or triggered access counter // notifications. The read_duplicate output parameter indicates if the page diff --git a/kernel-open/nvidia-uvm/uvm_va_range.c b/kernel-open/nvidia-uvm/uvm_va_range.c index c4bbaa8c24..1cef97080a 100644 --- a/kernel-open/nvidia-uvm/uvm_va_range.c +++ b/kernel-open/nvidia-uvm/uvm_va_range.c @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2015-2023 NVIDIA Corporation + Copyright (c) 2015-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -1853,7 +1853,7 @@ NV_STATUS uvm_api_alloc_semaphore_pool(UVM_ALLOC_SEMAPHORE_POOL_PARAMS *params, if (uvm_api_range_invalid(params->base, params->length)) return NV_ERR_INVALID_ADDRESS; - if (params->gpuAttributesCount > UVM_MAX_GPUS_V2) + if (params->gpuAttributesCount > UVM_MAX_GPUS) return NV_ERR_INVALID_ARGUMENT; if (g_uvm_global.conf_computing_enabled && params->gpuAttributesCount == 0) diff --git a/kernel-open/nvidia-uvm/uvm_va_range.h b/kernel-open/nvidia-uvm/uvm_va_range.h index 7ca40f8416..995300407b 100644 --- a/kernel-open/nvidia-uvm/uvm_va_range.h +++ b/kernel-open/nvidia-uvm/uvm_va_range.h @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2015-2022 NVIDIA Corporation + Copyright (c) 2015-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -188,8 +188,7 @@ typedef struct // GPU which owns the allocation. For sysmem, this is the GPU that the // sysmem was originally allocated under. For the allocation to remain valid // we need to prevent the GPU from going away, similarly to P2P mapped - // memory. - // Similarly for EGM memory. + // memory and to EGM memory. // // This field is not used for sparse mappings as they don't have an // allocation and, hence, owning GPU. @@ -212,6 +211,7 @@ typedef struct // EGM memory. If true is_sysmem also has to be true and owning_gpu // has to be valid. bool is_egm; + // GPU page tables mapping the allocation uvm_page_table_range_vec_t pt_range_vec; diff --git a/kernel-open/nvidia-uvm/uvm_volta_host.c b/kernel-open/nvidia-uvm/uvm_volta_host.c index b54931e8c8..2d30082240 100644 --- a/kernel-open/nvidia-uvm/uvm_volta_host.c +++ b/kernel-open/nvidia-uvm/uvm_volta_host.c @@ -199,7 +199,7 @@ void uvm_hal_volta_host_tlb_invalidate_va(uvm_push_t *push, NvU32 depth, NvU64 base, NvU64 size, - NvU32 page_size, + NvU64 page_size, uvm_membar_t membar) { NvU32 aperture_value; @@ -216,9 +216,9 @@ void uvm_hal_volta_host_tlb_invalidate_va(uvm_push_t *push, NvU32 log2_invalidation_size; uvm_gpu_t *gpu = uvm_push_get_gpu(push); - UVM_ASSERT_MSG(IS_ALIGNED(page_size, 1 << 12), "page_size 0x%x\n", page_size); - UVM_ASSERT_MSG(IS_ALIGNED(base, page_size), "base 0x%llx page_size 0x%x\n", base, page_size); - UVM_ASSERT_MSG(IS_ALIGNED(size, page_size), "size 0x%llx page_size 0x%x\n", size, page_size); + UVM_ASSERT_MSG(IS_ALIGNED(page_size, 1 << 12), "page_size 0x%llx\n", page_size); + UVM_ASSERT_MSG(IS_ALIGNED(base, page_size), "base 0x%llx page_size 0x%llx\n", base, page_size); + UVM_ASSERT_MSG(IS_ALIGNED(size, page_size), "size 0x%llx page_size 0x%llx\n", size, page_size); UVM_ASSERT_MSG(size > 0, "size 0x%llx\n", size); // The invalidation size must be a power-of-two number of pages containing diff --git a/kernel-open/nvidia-uvm/uvm_volta_mmu.c b/kernel-open/nvidia-uvm/uvm_volta_mmu.c index 76da47ab4b..7f0a4549da 100644 --- a/kernel-open/nvidia-uvm/uvm_volta_mmu.c +++ b/kernel-open/nvidia-uvm/uvm_volta_mmu.c @@ -42,7 +42,7 @@ static NvU32 entries_per_index_volta(NvU32 depth) return 1; } -static NvLength entry_offset_volta(NvU32 depth, NvU32 page_size) +static NvLength entry_offset_volta(NvU32 depth, NvU64 page_size) { UVM_ASSERT(depth < 5); if (page_size == UVM_PAGE_SIZE_4K && depth == 3) @@ -252,7 +252,7 @@ static NvU64 make_pte_volta(uvm_aperture_t aperture, NvU64 address, uvm_prot_t p static uvm_mmu_mode_hal_t volta_mmu_mode_hal; -uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_volta(NvU32 big_page_size) +uvm_mmu_mode_hal_t *uvm_hal_mmu_mode_volta(NvU64 big_page_size) { static bool initialized = false; diff --git a/kernel-open/nvidia/libspdm_aead.c b/kernel-open/nvidia/libspdm_aead.c index f7eca74147..3844da487a 100644 --- a/kernel-open/nvidia/libspdm_aead.c +++ b/kernel-open/nvidia/libspdm_aead.c @@ -159,14 +159,7 @@ static int lkca_aead_internal(struct crypto_aead *aead, } if (rc != 0) { - if (enc) { - pr_info("aead.c: Encryption failed with error %i\n", rc); - } else { - pr_info("aead.c: Decryption failed with error %i\n", rc); - if (rc == -EBADMSG) { - pr_info("aead.c: Authentication tag mismatch!\n"); - } - } + pr_info("Encryption FAILED\n"); } *data_out_size = data_in_size; diff --git a/kernel-open/nvidia/libspdm_rsa.c b/kernel-open/nvidia/libspdm_rsa.c index 874422cc92..8bedea3a7d 100644 --- a/kernel-open/nvidia/libspdm_rsa.c +++ b/kernel-open/nvidia/libspdm_rsa.c @@ -39,7 +39,9 @@ #define RSA_PSS_PADDING_ZEROS_SIZE_BYTE (8) #define RSA_PSS_TRAILER_FIELD (0xbc) #define SHIFT_RIGHT_AND_GET_BYTE(val, x) ((val >> x) & 0xFF) +#ifndef BITS_TO_BYTES #define BITS_TO_BYTES(b) (b >> 3) +#endif static const unsigned char zeroes[RSA_PSS_PADDING_ZEROS_SIZE_BYTE] = { 0 }; diff --git a/kernel-open/nvidia/nv-acpi.c b/kernel-open/nvidia/nv-acpi.c index 3c892a1baa..48efa1ffd1 100644 --- a/kernel-open/nvidia/nv-acpi.c +++ b/kernel-open/nvidia/nv-acpi.c @@ -66,6 +66,9 @@ static NvBool battery_present = NV_FALSE; #define ACPI_VIDEO_CLASS "video" #endif +/* Maximum size of ACPI _DSM method's 4th argument */ +#define NV_MAX_ACPI_DSM_PARAM_SIZE 1024 + // Used for NVPCF event handling static acpi_handle nvpcf_handle = NULL; static acpi_handle nvpcf_device_handle = NULL; @@ -73,21 +76,6 @@ static nv_acpi_t *nvpcf_nv_acpi_object = NULL; #define ACPI_NVPCF_EVENT_CHANGE 0xC0 -static int nv_acpi_get_device_handle(nv_state_t *nv, acpi_handle *dev_handle) -{ - nv_linux_state_t *nvl = NV_GET_NVL_FROM_NV_STATE(nv); - -#if defined(DEVICE_ACPI_HANDLE) - *dev_handle = DEVICE_ACPI_HANDLE(nvl->dev); - return NV_TRUE; -#elif defined (ACPI_HANDLE) - *dev_handle = ACPI_HANDLE(nvl->dev); - return NV_TRUE; -#else - return NV_FALSE; -#endif -} - /* * This callback will be invoked by the acpi_notifier_call_chain() */ @@ -174,7 +162,7 @@ static void nv_acpi_nvpcf_event(acpi_handle handle, u32 event_type, void *data) } else { - nv_printf(NV_DBG_INFO,"NVRM: %s: NVPCF event 0x%x is not supported\n", event_type, __FUNCTION__); + nv_printf(NV_DBG_INFO,"NVRM: %s: NVPCF event 0x%x is not supported\n", __FUNCTION__, event_type); } } @@ -267,11 +255,10 @@ static void nv_acpi_notify_event(acpi_handle handle, u32 event_type, void *data) void nv_acpi_register_notifier(nv_linux_state_t *nvl) { - acpi_handle dev_handle = NULL; + acpi_handle dev_handle = ACPI_HANDLE(nvl->dev); /* Install the ACPI notifier corresponding to dGPU ACPI device. */ if ((nvl->nv_acpi_object == NULL) && - nv_acpi_get_device_handle(NV_STATE_PTR(nvl), &dev_handle) && (dev_handle != NULL)) { nvl->nv_acpi_object = nv_install_notifier(dev_handle, nv_acpi_notify_event, nvl); @@ -657,64 +644,36 @@ static NV_STATUS nv_acpi_nvif_method( return NV_OK; } -#define MAX_INPUT_PARAM_SIZE 1024 -/* - * This function executes a _DSM ACPI method. - */ -NV_STATUS NV_API_CALL nv_acpi_dsm_method( - nv_state_t *nv, - NvU8 *pAcpiDsmGuid, - NvU32 acpiDsmRev, - NvBool acpiNvpcfDsmFunction, - NvU32 acpiDsmSubFunction, - void *pInParams, - NvU16 inParamSize, - NvU32 *outStatus, - void *pOutData, - NvU16 *pSize +static NV_STATUS nv_acpi_evaluate_dsm_method( + acpi_handle dev_handle, + NvU8 *pathname, + NvU8 *pAcpiDsmGuid, + NvU32 acpiDsmRev, + NvU32 acpiDsmSubFunction, + void *arg3, + NvU16 arg3Size, + NvBool bArg3Integer, + NvU32 *outStatus, + void *pOutData, + NvU16 *pSize ) { - NV_STATUS status = NV_ERR_OPERATING_SYSTEM; - acpi_status acpi_status; + NV_STATUS rmStatus = NV_OK; + acpi_status status; struct acpi_object_list input; union acpi_object *dsm = NULL; struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL }; union acpi_object dsm_params[4]; - NvU8 *argument3 = NULL; NvU32 data_size; - acpi_handle dev_handle = NULL; - - if (!nv_acpi_get_device_handle(nv, &dev_handle)) - return NV_ERR_NOT_SUPPORTED; - - if (!dev_handle) - return NV_ERR_INVALID_ARGUMENT; - - if ((!pInParams) || (inParamSize > MAX_INPUT_PARAM_SIZE) || (!pOutData) || (!pSize)) - { - nv_printf(NV_DBG_INFO, - "NVRM: %s: invalid argument(s)!\n", __FUNCTION__); - return NV_ERR_INVALID_ARGUMENT; - } if (!NV_MAY_SLEEP()) { #if defined(DEBUG) - nv_printf(NV_DBG_INFO, - "NVRM: %s: invalid argument(s)!\n", __FUNCTION__); + nv_printf(NV_DBG_ERRORS, "NVRM: %s: invalid context!\n", __FUNCTION__); #endif return NV_ERR_NOT_SUPPORTED; } - status = os_alloc_mem((void **)&argument3, inParamSize); - if (status != NV_OK) - return status; - - // - // dsm_params[0].buffer.pointer and dsm_params[1].integer.value set in - // switch below based on acpiDsmFunction - // - dsm_params[0].buffer.type = ACPI_TYPE_BUFFER; dsm_params[0].buffer.length = 0x10; dsm_params[0].buffer.pointer = pAcpiDsmGuid; @@ -725,35 +684,28 @@ NV_STATUS NV_API_CALL nv_acpi_dsm_method( dsm_params[2].integer.type = ACPI_TYPE_INTEGER; dsm_params[2].integer.value = acpiDsmSubFunction; - dsm_params[3].buffer.type = ACPI_TYPE_BUFFER; - dsm_params[3].buffer.length = inParamSize; - memcpy(argument3, pInParams, dsm_params[3].buffer.length); - dsm_params[3].buffer.pointer = argument3; - - // parameters for dsm calls (GUID, rev, subfunction, data) - input.count = 4; - input.pointer = dsm_params; - - if (acpiNvpcfDsmFunction) + if (bArg3Integer) { - // - // acpi_evaluate_object() can operate with either valid object pathname or - // valid object handle. For NVPCF DSM function, use valid pathname as we do - // not have device handle for NVPCF device - // - dev_handle = NULL; - acpi_status = acpi_evaluate_object(dev_handle, "\\_SB.NPCF._DSM", &input, &output); + dsm_params[3].integer.type = ACPI_TYPE_INTEGER; + dsm_params[3].integer.value = *((NvU32 *)arg3); } else { - acpi_status = acpi_evaluate_object(dev_handle, "_DSM", &input, &output); + dsm_params[3].buffer.type = ACPI_TYPE_BUFFER; + dsm_params[3].buffer.length = arg3Size; + dsm_params[3].buffer.pointer = arg3; } - if (ACPI_FAILURE(acpi_status)) + // parameters for dsm calls (GUID, rev, subfunction, data) + input.count = 4; + input.pointer = dsm_params; + + status = acpi_evaluate_object(dev_handle, pathname, &input, &output); + if (ACPI_FAILURE(status)) { nv_printf(NV_DBG_INFO, "NVRM: %s: failed to evaluate _DSM method!\n", __FUNCTION__); - goto exit; + return NV_ERR_OPERATING_SYSTEM; } dsm = output.pointer; @@ -767,20 +719,80 @@ NV_STATUS NV_API_CALL nv_acpi_dsm_method( dsm->buffer.pointer[0]; } - status = nv_acpi_extract_object(dsm, pOutData, *pSize, &data_size); + rmStatus = nv_acpi_extract_object(dsm, pOutData, *pSize, &data_size); *pSize = data_size; kfree(output.pointer); } - if (status != NV_OK) + else + { + *pSize = 0; + } + + if (rmStatus != NV_OK) { nv_printf(NV_DBG_ERRORS, "NVRM: %s: DSM data invalid!\n", __FUNCTION__); } -exit: + return rmStatus; +} + +/* + * This function executes a _DSM ACPI method. + */ +NV_STATUS NV_API_CALL nv_acpi_dsm_method( + nv_state_t *nv, + NvU8 *pAcpiDsmGuid, + NvU32 acpiDsmRev, + NvBool acpiNvpcfDsmFunction, + NvU32 acpiDsmSubFunction, + void *pInParams, + NvU16 inParamSize, + NvU32 *outStatus, + void *pOutData, + NvU16 *pSize +) +{ + NV_STATUS rmStatus = NV_ERR_OPERATING_SYSTEM; + NvU8 *argument3 = NULL; + nv_linux_state_t *nvl = NV_GET_NVL_FROM_NV_STATE(nv); + acpi_handle dev_handle = ACPI_HANDLE(nvl->dev); + NvU8 *pathname = "_DSM"; + + if (!dev_handle) + return NV_ERR_INVALID_ARGUMENT; + + if ((!pInParams) || (inParamSize > NV_MAX_ACPI_DSM_PARAM_SIZE) || (!pOutData) || (!pSize)) + { + nv_printf(NV_DBG_INFO, + "NVRM: %s: invalid argument(s)!\n", __FUNCTION__); + return NV_ERR_INVALID_ARGUMENT; + } + + rmStatus = os_alloc_mem((void **)&argument3, inParamSize); + if (rmStatus != NV_OK) + return rmStatus; + + memcpy(argument3, pInParams, inParamSize); + + if (acpiNvpcfDsmFunction) + { + // + // acpi_evaluate_object() can operate with either valid object pathname or + // valid object handle. For NVPCF DSM function, use valid pathname as we do + // not have device handle for NVPCF device + // + dev_handle = NULL; + pathname = "\\_SB.NPCF._DSM"; + } + + rmStatus = nv_acpi_evaluate_dsm_method(dev_handle, pathname, pAcpiDsmGuid, acpiDsmRev, + acpiDsmSubFunction, argument3, inParamSize, + NV_FALSE, NULL, pOutData, pSize); + os_free_mem(argument3); - return status; + return rmStatus; } /* @@ -796,13 +808,11 @@ NV_STATUS NV_API_CALL nv_acpi_ddc_method( acpi_status status; union acpi_object *ddc = NULL; NvU32 i, largestEdidSize; - acpi_handle dev_handle = NULL; + nv_linux_state_t *nvl = NV_GET_NVL_FROM_NV_STATE(nv); + acpi_handle dev_handle = ACPI_HANDLE(nvl->dev); acpi_handle lcd_dev_handle = NULL; acpi_handle handle = NULL; - if (!nv_acpi_get_device_handle(nv, &dev_handle)) - return NV_ERR_NOT_SUPPORTED; - if (!dev_handle) return NV_ERR_INVALID_ARGUMENT; @@ -836,7 +846,7 @@ NV_STATUS NV_API_CALL nv_acpi_ddc_method( case 0x0400: case 0xA420: lcd_dev_handle = handle; - nv_printf(NV_DBG_INFO, "NVRM: %s Found LCD: %x\n", + nv_printf(NV_DBG_INFO, "NVRM: %s Found LCD: %llx\n", __FUNCTION__, device_id); break; default: @@ -915,12 +925,10 @@ NV_STATUS NV_API_CALL nv_acpi_rom_method( union acpi_object *rom; union acpi_object rom_arg[2]; struct acpi_object_list input = { 2, rom_arg }; - acpi_handle dev_handle = NULL; + nv_linux_state_t *nvl = NV_GET_NVL_FROM_NV_STATE(nv); + acpi_handle dev_handle = ACPI_HANDLE(nvl->dev); uint32_t offset, length; - if (!nv_acpi_get_device_handle(nv, &dev_handle)) - return NV_ERR_NOT_SUPPORTED; - if (!dev_handle) return NV_ERR_INVALID_ARGUMENT; @@ -982,12 +990,10 @@ NV_STATUS NV_API_CALL nv_acpi_dod_method( acpi_status status; struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL }; union acpi_object *dod; - acpi_handle dev_handle = NULL; + nv_linux_state_t *nvl = NV_GET_NVL_FROM_NV_STATE(nv); + acpi_handle dev_handle = ACPI_HANDLE(nvl->dev); NvU32 i, count = (*pSize / sizeof(NvU32)); - if (!nv_acpi_get_device_handle(nv, &dev_handle)) - return NV_ERR_NOT_SUPPORTED; - if (!dev_handle) return NV_ERR_INVALID_ARGUMENT; @@ -1129,17 +1135,11 @@ NvBool nv_acpi_power_resource_method_present( struct pci_dev *pdev ) { - acpi_handle handle = NULL; + acpi_handle handle = ACPI_HANDLE(&pdev->dev); struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; union acpi_object *object_package, *object_reference; acpi_status status; -#if defined(DEVICE_ACPI_HANDLE) - handle = DEVICE_ACPI_HANDLE(&pdev->dev); -#elif defined (ACPI_HANDLE) - handle = ACPI_HANDLE(&pdev->dev); -#endif - if (!handle) return NV_FALSE; @@ -1198,7 +1198,8 @@ NV_STATUS NV_API_CALL nv_acpi_mux_method( union acpi_object *mux = NULL; union acpi_object mux_arg = { ACPI_TYPE_INTEGER }; struct acpi_object_list input = { 1, &mux_arg }; - acpi_handle dev_handle = NULL; + nv_linux_state_t *nvl = NV_GET_NVL_FROM_NV_STATE(nv); + acpi_handle dev_handle = ACPI_HANDLE(nvl->dev); acpi_handle mux_dev_handle = NULL; acpi_handle handle = NULL; unsigned long long device_id = 0; @@ -1216,9 +1217,6 @@ NV_STATUS NV_API_CALL nv_acpi_mux_method( __FUNCTION__, pMethodName); } - if (!nv_acpi_get_device_handle(nv, &dev_handle)) - return NV_ERR_NOT_SUPPORTED; - if (!dev_handle) return NV_ERR_INVALID_ARGUMENT; @@ -1384,6 +1382,34 @@ NvBool NV_API_CALL nv_acpi_is_battery_present(void) return NV_FALSE; } +NV_STATUS NV_API_CALL nv_acpi_d3cold_dsm_for_upstream_port( + nv_state_t *nv, + NvU8 *pAcpiDsmGuid, + NvU32 acpiDsmRev, + NvU32 acpiDsmSubFunction, + NvU32 *data +) +{ + NV_STATUS rmStatus = NV_ERR_OPERATING_SYSTEM; + nv_linux_state_t *nvl = NV_GET_NVL_FROM_NV_STATE(nv); + acpi_handle dev_handle = ACPI_HANDLE(nvl->dev->parent); + NvU32 outData = 0; + NvU16 outDatasize = sizeof(NvU32); + NvU16 inParamSize = sizeof(NvU32); + + if (!dev_handle) + return NV_ERR_INVALID_ARGUMENT; + + rmStatus = nv_acpi_evaluate_dsm_method(dev_handle, "_DSM", pAcpiDsmGuid, acpiDsmRev, + acpiDsmSubFunction, data, inParamSize, NV_TRUE, + NULL, &outData, &outDatasize); + + if (rmStatus == NV_OK) + *data = outData; + + return rmStatus; +} + #else // NV_LINUX_ACPI_EVENTS_SUPPORTED void NV_API_CALL nv_acpi_methods_init(NvU32 *handlePresent) @@ -1426,6 +1452,17 @@ NV_STATUS NV_API_CALL nv_acpi_dsm_method( return NV_ERR_NOT_SUPPORTED; } +NV_STATUS NV_API_CALL nv_acpi_d3cold_dsm_for_upstream_port( + nv_state_t *nv, + NvU8 *pAcpiDsmGuid, + NvU32 acpiDsmRev, + NvU32 acpiDsmSubFunction, + NvU32 *data +) +{ + return NV_ERR_NOT_SUPPORTED; +} + NV_STATUS NV_API_CALL nv_acpi_ddc_method( nv_state_t *nv, void *pEdidBuffer, diff --git a/kernel-open/nvidia/nv-caps-imex.c b/kernel-open/nvidia/nv-caps-imex.c index b9fca3f0e0..7106adb075 100644 --- a/kernel-open/nvidia/nv-caps-imex.c +++ b/kernel-open/nvidia/nv-caps-imex.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -24,6 +24,7 @@ #include "nv-linux.h" extern int NVreg_ImexChannelCount; +extern int NVreg_CreateImexChannel0; static int nv_caps_imex_open(struct inode *inode, struct file *file) { @@ -104,6 +105,10 @@ int NV_API_CALL nv_caps_imex_init(void) if (NVreg_ImexChannelCount == 0) { nv_printf(NV_DBG_INFO, "nv-caps-imex is disabled.\n"); + + // Disable channel creation as well + NVreg_CreateImexChannel0 = 0; + return 0; } diff --git a/kernel-open/nvidia/nv-caps.c b/kernel-open/nvidia/nv-caps.c index 6d20610077..840f47a9bb 100644 --- a/kernel-open/nvidia/nv-caps.c +++ b/kernel-open/nvidia/nv-caps.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -26,6 +26,8 @@ #include "nv-procfs.h" #include "nv-hash.h" +#include "nvmisc.h" + extern int NVreg_ModifyDeviceFiles; /* sys_close() or __close_fd() */ @@ -49,7 +51,7 @@ typedef struct nv_cap_table_entry struct hlist_node hlist; } nv_cap_table_entry_t; -#define NV_CAP_NUM_ENTRIES(_table) (sizeof(_table) / sizeof(_table[0])) +#define NV_CAP_NUM_ENTRIES(_table) (NV_ARRAY_ELEMENTS(_table)) static nv_cap_table_entry_t g_nv_cap_nvlink_table[] = { @@ -361,18 +363,28 @@ static ssize_t nv_cap_procfs_write(struct file *file, nv_cap_file_private_t *private = NULL; unsigned long bytes_left; char *proc_buffer; + int status; + + status = nv_down_read_interruptible(&nv_system_pm_lock); + if (status < 0) + { + nv_printf(NV_DBG_ERRORS, "nv-caps: failed to lock the nv_system_pm_lock!\n"); + return status; + } private = ((struct seq_file *)file->private_data)->private; bytes_left = (sizeof(private->buffer) - private->offset - 1); if (count == 0) { - return -EINVAL; + count = -EINVAL; + goto done; } if ((bytes_left == 0) || (count > bytes_left)) { - return -ENOSPC; + count = -ENOSPC; + goto done; } proc_buffer = &private->buffer[private->offset]; @@ -380,7 +392,8 @@ static ssize_t nv_cap_procfs_write(struct file *file, if (copy_from_user(proc_buffer, buffer, count)) { nv_printf(NV_DBG_ERRORS, "nv-caps: failed to copy in proc data!\n"); - return -EFAULT; + count = -EFAULT; + goto done; } private->offset += count; @@ -388,17 +401,28 @@ static ssize_t nv_cap_procfs_write(struct file *file, *pos = private->offset; +done: + up_read(&nv_system_pm_lock); + return count; } static int nv_cap_procfs_read(struct seq_file *s, void *v) { + int status; nv_cap_file_private_t *private = s->private; + status = nv_down_read_interruptible(&nv_system_pm_lock); + if (status < 0) + { + return status; + } + seq_printf(s, "%s: %d\n", "DeviceFileMinor", private->minor); seq_printf(s, "%s: %d\n", "DeviceFileMode", private->permissions); seq_printf(s, "%s: %d\n", "DeviceFileModify", private->modify); + up_read(&nv_system_pm_lock); return 0; } @@ -423,14 +447,6 @@ static int nv_cap_procfs_open(struct inode *inode, struct file *file) if (rc < 0) { NV_KFREE(private, sizeof(nv_cap_file_private_t)); - return rc; - } - - rc = nv_down_read_interruptible(&nv_system_pm_lock); - if (rc < 0) - { - single_release(inode, file); - NV_KFREE(private, sizeof(nv_cap_file_private_t)); } return rc; @@ -449,8 +465,6 @@ static int nv_cap_procfs_release(struct inode *inode, struct file *file) private = s->private; } - up_read(&nv_system_pm_lock); - single_release(inode, file); if (private != NULL) diff --git a/kernel-open/nvidia/nv-memdbg.c b/kernel-open/nvidia/nv-memdbg.c index 033a421600..952bd5208c 100644 --- a/kernel-open/nvidia/nv-memdbg.c +++ b/kernel-open/nvidia/nv-memdbg.c @@ -28,12 +28,21 @@ * teardown. */ +#define NV_MEM_LOGGER_STACK_TRACE 0 + +#if defined(NV_STACK_TRACE_PRESENT) && defined(NV_MEM_LOGGER) && defined(DEBUG) +#define NV_MEM_LOGGER_STACK_TRACE 1 +#endif + typedef struct { struct rb_node rb_node; void *addr; NvU64 size; NvU32 line; const char *file; +#if NV_MEM_LOGGER_STACK_TRACE == 1 + unsigned long stack_trace[32]; +#endif } nv_memdbg_node_t; struct @@ -117,6 +126,12 @@ void nv_memdbg_add(void *addr, NvU64 size, const char *file, int line) node->size = size; node->file = file; node->line = line; + +#if NV_MEM_LOGGER_STACK_TRACE == 1 + memset(node->stack_trace, '\0', sizeof(node->stack_trace)); + + stack_trace_save(node->stack_trace, NV_ARRAY_ELEMENTS(node->stack_trace), 0); +#endif } NV_SPIN_LOCK_IRQSAVE(&g_nv_memdbg.lock, flags); @@ -209,6 +224,10 @@ void nv_memdbg_exit(void) node->size, node->addr); } +#if NV_MEM_LOGGER_STACK_TRACE == 1 + stack_trace_print(node->stack_trace, NV_ARRAY_ELEMENTS(node->stack_trace), 1); +#endif + rb_erase(&node->rb_node, &g_nv_memdbg.rb_root); kfree(node); } diff --git a/kernel-open/nvidia/nv-nano-timer.c b/kernel-open/nvidia/nv-nano-timer.c index 35220b4914..6549c82f43 100644 --- a/kernel-open/nvidia/nv-nano-timer.c +++ b/kernel-open/nvidia/nv-nano-timer.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -62,7 +62,7 @@ nvidia_nano_timer_callback( nv_linux_state_t *nvl = nv_nstimer->nv_linux_state; nvidia_stack_t *sp = NULL; - if (nv_kmem_cache_alloc_stack(&sp) != 0) + if (nv_kmem_cache_alloc_stack_atomic(&sp) != 0) { nv_printf(NV_DBG_ERRORS, "NVRM: no cache memory \n"); return; @@ -189,12 +189,6 @@ void NV_API_CALL nv_start_nano_timer( NvU32 time_us; time_us = (NvU32)(time_ns / 1000); - - if (time_us == 0) - { - nv_printf(NV_DBG_WARNINGS, "NVRM: Timer value cannot be less than 1 usec.\n"); - } - time_jiffies = usecs_to_jiffies(time_us); mod_timer(&nv_nstimer->jiffy_timer, jiffies + time_jiffies); #endif diff --git a/kernel-open/nvidia/nv-p2p.c b/kernel-open/nvidia/nv-p2p.c index a1fc9c686e..ea4d9aedb3 100644 --- a/kernel-open/nvidia/nv-p2p.c +++ b/kernel-open/nvidia/nv-p2p.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2011-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2011-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -31,6 +31,8 @@ #include "nv-p2p.h" #include "rmp2pdefines.h" +#include "nvmisc.h" + typedef enum nv_p2p_page_table_type { NV_P2P_PAGE_TABLE_TYPE_NON_PERSISTENT = 0, NV_P2P_PAGE_TABLE_TYPE_PERSISTENT, @@ -50,6 +52,7 @@ typedef struct nv_p2p_mem_info { struct semaphore lock; } dma_mapping_list; void *private; + void *mig_info; } nv_p2p_mem_info_t; // declared and created in nv.c @@ -73,7 +76,7 @@ static struct nvidia_status_mapping { }; #define NVIDIA_STATUS_MAPPINGS \ - (sizeof(nvidia_status_mappings) / sizeof(struct nvidia_status_mapping)) + NV_ARRAY_ELEMENTS(nvidia_status_mappings) static int nvidia_p2p_map_status(NV_STATUS status) { @@ -314,7 +317,7 @@ static NV_STATUS nv_p2p_put_pages( * callback which can free it unlike non-persistent page_table. */ mem_info = container_of(*page_table, nv_p2p_mem_info_t, page_table); - status = rm_p2p_put_pages_persistent(sp, mem_info->private, *page_table); + status = rm_p2p_put_pages_persistent(sp, mem_info->private, *page_table, mem_info->mig_info); } else { @@ -412,6 +415,17 @@ static int nv_p2p_get_pages( NvU8 uuid[NVIDIA_P2P_GPU_UUID_LEN] = {0}; int rc; + if (!NV_IS_ALIGNED64(virtual_address, NVRM_P2P_PAGESIZE_BIG_64K) || + !NV_IS_ALIGNED64(length, NVRM_P2P_PAGESIZE_BIG_64K)) + { + nv_printf(NV_DBG_ERRORS, + "NVRM: Invalid argument in nv_p2p_get_pages," + "address or length are not aligned " + "address=0x%llx, length=0x%llx\n", + virtual_address, length); + return -EINVAL; + } + rc = nv_kmem_cache_alloc_stack(&sp); if (rc != 0) { @@ -495,7 +509,7 @@ static int nv_p2p_get_pages( status = rm_p2p_get_pages_persistent(sp, virtual_address, length, &mem_info->private, physical_addresses, &entries, - *page_table, gpu_info); + *page_table, gpu_info, &mem_info->mig_info); if (status != NV_OK) { goto failed; diff --git a/kernel-open/nvidia/nv-pci.c b/kernel-open/nvidia/nv-pci.c index 40cf248c38..fae36c2ba4 100644 --- a/kernel-open/nvidia/nv-pci.c +++ b/kernel-open/nvidia/nv-pci.c @@ -37,6 +37,10 @@ #include #endif +#if !defined(NV_BUS_TYPE_HAS_IOMMU_OPS) +#include +#endif + static void nv_check_and_exclude_gpu( nvidia_stack_t *sp, @@ -324,7 +328,7 @@ static NvU32 find_gpu_numa_nodes_in_srat(nv_linux_state_t *nvl) gi = (struct acpi_srat_generic_affinity *) subtable_header; gi_dbdf = *((NvU16 *)(&gi->device_handle[0])) << 16 | *((NvU16 *)(&gi->device_handle[2])); - + if (gi_dbdf == dev_dbdf) { numa_node = pxm_to_node(gi->proximity_domain); if (numa_node < MAX_NUMNODES) { @@ -349,7 +353,6 @@ static NvU32 find_gpu_numa_nodes_in_srat(nv_linux_state_t *nvl) acpi_put_table(table_header); return pxm_count; } - #endif static void @@ -375,6 +378,7 @@ nv_init_coherent_link_info return; gi_found = find_gpu_numa_nodes_in_srat(nvl); + if (!gi_found && (device_property_read_u64(nvl->dev, "nvidia,gpu-mem-pxm-start", &pxm_start) != 0 || device_property_read_u64(nvl->dev, "nvidia,gpu-mem-pxm-count", &pxm_count) != 0)) @@ -530,35 +534,20 @@ nv_pci_probe if (pci_dev->is_virtfn) { #if defined(NV_VGPU_KVM_BUILD) - nvl = pci_get_drvdata(pci_dev->physfn); - if (!nvl) +#if defined(NV_BUS_TYPE_HAS_IOMMU_OPS) + if (pci_dev->dev.bus->iommu_ops == NULL) +#else + if ((pci_dev->dev.iommu != NULL) && (pci_dev->dev.iommu->iommu_dev != NULL) && + (pci_dev->dev.iommu->iommu_dev->ops == NULL)) +#endif { nv_printf(NV_DBG_ERRORS, "NVRM: Aborting probe for VF %04x:%02x:%02x.%x " - "since PF is not bound to nvidia driver.\n", + "since IOMMU is not present on the system.\n", NV_PCI_DOMAIN_NUMBER(pci_dev), NV_PCI_BUS_NUMBER(pci_dev), NV_PCI_SLOT_NUMBER(pci_dev), PCI_FUNC(pci_dev->devfn)); goto failed; } - if (pci_dev->dev.bus->iommu_ops == NULL) - { - nv = NV_STATE_PTR(nvl); - if (rm_is_iommu_needed_for_sriov(sp, nv)) - { - nv_printf(NV_DBG_ERRORS, "NVRM: Aborting probe for VF %04x:%02x:%02x.%x " - "since IOMMU is not present on the system.\n", - NV_PCI_DOMAIN_NUMBER(pci_dev), NV_PCI_BUS_NUMBER(pci_dev), - NV_PCI_SLOT_NUMBER(pci_dev), PCI_FUNC(pci_dev->devfn)); - goto failed; - } - } - - if (nvidia_vgpu_vfio_probe(pci_dev) != NV_OK) - { - nv_printf(NV_DBG_ERRORS, "NVRM: Failed to register device to vGPU VFIO module"); - goto failed; - } - nv_kmem_cache_free_stack(sp); return 0; #else @@ -687,8 +676,8 @@ nv_pci_probe // Invalid 32 or 64-bit BAR. nv_printf(NV_DBG_ERRORS, "NVRM: This PCI I/O region assigned to your NVIDIA device is invalid:\n" - "NVRM: BAR%d is %dM @ 0x%llx (PCI:%04x:%02x:%02x.%x)\n", i, - (NV_PCI_RESOURCE_SIZE(pci_dev, i) >> 20), + "NVRM: BAR%d is %" NvU64_fmtu "M @ 0x%" NvU64_fmtx " (PCI:%04x:%02x:%02x.%x)\n", i, + (NvU64)(NV_PCI_RESOURCE_SIZE(pci_dev, i) >> 20), (NvU64)NV_PCI_RESOURCE_START(pci_dev, i), NV_PCI_DOMAIN_NUMBER(pci_dev), NV_PCI_BUS_NUMBER(pci_dev), NV_PCI_SLOT_NUMBER(pci_dev), PCI_FUNC(pci_dev->devfn)); @@ -708,10 +697,10 @@ nv_pci_probe nv_device_name)) { nv_printf(NV_DBG_ERRORS, - "NVRM: request_mem_region failed for %dM @ 0x%llx. This can\n" + "NVRM: request_mem_region failed for %" NvU64_fmtu "M @ 0x%" NvU64_fmtx ". This can\n" "NVRM: occur when a driver such as rivatv is loaded and claims\n" "NVRM: ownership of the device's registers.\n", - (NV_PCI_RESOURCE_SIZE(pci_dev, regs_bar_index) >> 20), + (NvU64)(NV_PCI_RESOURCE_SIZE(pci_dev, regs_bar_index) >> 20), (NvU64)NV_PCI_RESOURCE_START(pci_dev, regs_bar_index)); goto failed; } diff --git a/kernel-open/nvidia/nv-procfs.c b/kernel-open/nvidia/nv-procfs.c index 63a0fe597f..ca92413cd8 100644 --- a/kernel-open/nvidia/nv-procfs.c +++ b/kernel-open/nvidia/nv-procfs.c @@ -197,28 +197,25 @@ nv_procfs_read_power( { nv_state_t *nv = s->private; nvidia_stack_t *sp = NULL; - const char *vidmem_power_status; - const char *dynamic_power_status; - const char *gc6_support; - const char *gcoff_support; + nv_power_info_t power_info; if (nv_kmem_cache_alloc_stack(&sp) != 0) { return 0; } - dynamic_power_status = rm_get_dynamic_power_management_status(sp, nv); - seq_printf(s, "Runtime D3 status: %s\n", dynamic_power_status); - - vidmem_power_status = rm_get_vidmem_power_status(sp, nv); - seq_printf(s, "Video Memory: %s\n\n", vidmem_power_status); + rm_get_power_info(sp, nv, &power_info); + seq_printf(s, "Runtime D3 status: %s\n", power_info.dynamic_power_status); + seq_printf(s, "Video Memory: %s\n\n", power_info.vidmem_power_status); seq_printf(s, "GPU Hardware Support:\n"); - gc6_support = rm_get_gpu_gcx_support(sp, nv, NV_TRUE); - seq_printf(s, " Video Memory Self Refresh: %s\n", gc6_support); + seq_printf(s, " Video Memory Self Refresh: %s\n", power_info.gc6_support); + seq_printf(s, " Video Memory Off: %s\n\n", power_info.gcoff_support); - gcoff_support = rm_get_gpu_gcx_support(sp, nv, NV_FALSE); - seq_printf(s, " Video Memory Off: %s\n", gcoff_support); + seq_printf(s, "S0ix Power Management:\n"); + seq_printf(s, " Platform Support: %s\n", + nv_platform_supports_s0ix() ? "Supported" : "Not Supported"); + seq_printf(s, " Status: %s\n", power_info.s0ix_status); nv_kmem_cache_free_stack(sp); return 0; diff --git a/kernel-open/nvidia/nv-reg.h b/kernel-open/nvidia/nv-reg.h index 4a5616de3e..e6c20ca13b 100644 --- a/kernel-open/nvidia/nv-reg.h +++ b/kernel-open/nvidia/nv-reg.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2006-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2006-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -869,6 +869,8 @@ * NVreg_ModifyDeviceFiles, NVreg_DeviceFileGID, NVreg_DeviceFileUID * and NVreg_DeviceFileMode will be honored by nvidia-modprobe. * + * Also, refer to the NVreg_CreateImexChannel0 option. + * * Possible values: * 0 - Disable IMEX using CUDA driver's fabric handles. * N - N IMEX channels will be enabled in the driver to facilitate N @@ -878,6 +880,29 @@ #define __NV_IMEX_CHANNEL_COUNT ImexChannelCount #define NV_REG_IMEX_CHANNEL_COUNT NV_REG_STRING(__NV_IMEX_CHANNEL_COUNT) +/* + * Option: NVreg_CreateImexChannel0 + * + * Description: + * + * This option allows users to specify whether the NVIDIA driver must create + * the IMEX channel 0 by default. The channel will be created automatically + * when an application (e.g. nvidia-smi, nvidia-persistenced) is run. + * + * Note that users are advised to enable this option only in trusted + * environments where it is acceptable for applications to share the same + * IMEX channel. + * + * For more details on IMEX channels, refer to the NVreg_ImexChannelCount + * option. + * + * Possible values: + * 0 - Do not create IMEX channel 0 (default). + * 1 - Create IMEX channel 0. + */ +#define __NV_CREATE_IMEX_CHANNEL_0 CreateImexChannel0 +#define NV_CREATE_IMEX_CHANNEL_0 NV_REG_STRING(__CREATE_IMEX_CHANNEL_0) + #if defined(NV_DEFINE_REGISTRY_KEY_TABLE) /* @@ -927,6 +952,7 @@ NV_DEFINE_REG_STRING_ENTRY(__NV_EXCLUDED_GPUS, NULL); NV_DEFINE_REG_ENTRY(__NV_DMA_REMAP_PEER_MMIO, NV_DMA_REMAP_PEER_MMIO_ENABLE); NV_DEFINE_REG_STRING_ENTRY(__NV_RM_NVLINK_BW, NULL); NV_DEFINE_REG_ENTRY_GLOBAL(__NV_IMEX_CHANNEL_COUNT, 2048); +NV_DEFINE_REG_ENTRY_GLOBAL(__NV_CREATE_IMEX_CHANNEL_0, 0); /* *----------------registry database definition---------------------- @@ -974,6 +1000,7 @@ nv_parm_t nv_parms[] = { NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_OPENRM_ENABLE_UNSUPPORTED_GPUS), NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_DMA_REMAP_PEER_MMIO), NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_IMEX_CHANNEL_COUNT), + NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_CREATE_IMEX_CHANNEL_0), {NULL, NULL} }; diff --git a/kernel-open/nvidia/nv-vm.c b/kernel-open/nvidia/nv-vm.c index 0f5dc505d6..2f29776739 100644 --- a/kernel-open/nvidia/nv-vm.c +++ b/kernel-open/nvidia/nv-vm.c @@ -514,7 +514,6 @@ NV_STATUS nv_alloc_system_pages( struct device *dev = at->dev; dma_addr_t bus_addr; - // Order should be zero except for EGM allocations. unsigned int alloc_page_size = PAGE_SIZE << at->order; unsigned int alloc_num_pages = NV_CEIL(at->num_pages * PAGE_SIZE, alloc_page_size); @@ -523,7 +522,7 @@ NV_STATUS nv_alloc_system_pages( unsigned int os_pages_in_page = alloc_page_size / PAGE_SIZE; nv_printf(NV_DBG_MEMINFO, - "NVRM: VM: %u: %u order0 pages, %u order\n", __FUNCTION__, at->num_pages, at->order); + "NVRM: VM: %s: %u order0 pages, %u order\n", __FUNCTION__, at->num_pages, at->order); gfp_mask = nv_compute_gfp_mask(nv, at); @@ -641,7 +640,6 @@ void nv_free_system_pages( unsigned int i; struct device *dev = at->dev; - // Order should be zero except for EGM allocations. unsigned int alloc_page_size = PAGE_SIZE << at->order; unsigned int os_pages_in_page = alloc_page_size / PAGE_SIZE; diff --git a/kernel-open/nvidia/nv-vtophys.c b/kernel-open/nvidia/nv-vtophys.c index df2a01e0e8..fcae701a45 100644 --- a/kernel-open/nvidia/nv-vtophys.c +++ b/kernel-open/nvidia/nv-vtophys.c @@ -29,7 +29,7 @@ NvU64 NV_API_CALL nv_get_kern_phys_address(NvU64 address) { /* direct-mapped kernel address */ - if (virt_addr_valid(address)) + if (virt_addr_valid((void *)address)) return __pa(address); nv_printf(NV_DBG_ERRORS, diff --git a/kernel-open/nvidia/nv.c b/kernel-open/nvidia/nv.c index ae2b19d978..99792de963 100644 --- a/kernel-open/nvidia/nv.c +++ b/kernel-open/nvidia/nv.c @@ -3131,6 +3131,7 @@ NV_STATUS NV_API_CALL nv_alias_pages( nv_state_t *nv, NvU32 page_cnt, + NvU64 page_size, NvU32 contiguous, NvU32 cache_type, NvU64 guest_id, @@ -3152,7 +3153,14 @@ nv_alias_pages( at->cache_type = cache_type; if (contiguous) + { at->flags.contig = NV_TRUE; + at->order = get_order(at->num_pages * PAGE_SIZE); + } + else + { + at->order = get_order(page_size); + } #if defined(NVCPU_AARCH64) if (at->cache_type != NV_MEMORY_CACHED) at->flags.aliased = NV_TRUE; @@ -3160,8 +3168,6 @@ nv_alias_pages( at->flags.guest = NV_TRUE; - at->order = get_order(at->num_pages * PAGE_SIZE); - for (i=0; i < at->num_pages; ++i) { page_ptr = at->page_table[i]; @@ -3271,7 +3277,7 @@ NV_STATUS NV_API_CALL nv_register_user_pages( nv_linux_state_t *nvl; nvidia_pte_t *page_ptr; - nv_printf(NV_DBG_MEMINFO, "NVRM: VM: nv_register_user_pages: 0x%x\n", page_count); + nv_printf(NV_DBG_MEMINFO, "NVRM: VM: nv_register_user_pages: 0x%" NvU64_fmtx"\n", page_count); user_pages = *priv_data; nvl = NV_GET_NVL_FROM_NV_STATE(nv); @@ -3332,7 +3338,7 @@ void NV_API_CALL nv_unregister_user_pages( { nv_alloc_t *at = *priv_data; - nv_printf(NV_DBG_MEMINFO, "NVRM: VM: nv_unregister_user_pages: 0x%x\n", page_count); + nv_printf(NV_DBG_MEMINFO, "NVRM: VM: nv_unregister_user_pages: 0x%" NvU64_fmtx "\n", page_count); NV_PRINT_AT(NV_DBG_MEMINFO, at); @@ -6133,7 +6139,10 @@ void NV_API_CALL nv_get_screen_info( { NvU64 physAddr = screen_info.lfb_base; #if defined(VIDEO_CAPABILITY_64BIT_BASE) - physAddr |= (NvU64)screen_info.ext_lfb_base << 32; + if (screen_info.capabilities & VIDEO_CAPABILITY_64BIT_BASE) + { + physAddr |= (NvU64)screen_info.ext_lfb_base << 32; + } #endif /* Make sure base address is mapped to GPU BAR */ diff --git a/kernel-open/nvidia/nv_gpu_ops.h b/kernel-open/nvidia/nv_gpu_ops.h index 91939c2051..aea829545f 100644 --- a/kernel-open/nvidia/nv_gpu_ops.h +++ b/kernel-open/nvidia/nv_gpu_ops.h @@ -285,12 +285,15 @@ NV_STATUS nvGpuOpsFlushReplayableFaultBuffer(gpuFaultInfo *pFaultInfo, NV_STATUS nvGpuOpsTogglePrefetchFaults(gpuFaultInfo *pFaultInfo, NvBool bEnable); -// Interface used for CCSL +NV_STATUS nvGpuOpsKeyRotationChannelDisable(struct gpuChannel *channelList[], + NvU32 channelListCount); +// Interface used for CCSL NV_STATUS nvGpuOpsCcslContextInit(struct ccslContext_t **ctx, gpuChannelHandle channel); NV_STATUS nvGpuOpsCcslContextClear(struct ccslContext_t *ctx); -NV_STATUS nvGpuOpsCcslContextUpdate(struct ccslContext_t *ctx); +NV_STATUS nvGpuOpsCcslContextUpdate(UvmCslContext *contextList[], + NvU32 contextListCount); NV_STATUS nvGpuOpsCcslRotateIv(struct ccslContext_t *ctx, NvU8 direction); NV_STATUS nvGpuOpsCcslEncrypt(struct ccslContext_t *ctx, diff --git a/kernel-open/nvidia/nv_uvm_interface.c b/kernel-open/nvidia/nv_uvm_interface.c index 36830512bd..bcaf9164d1 100644 --- a/kernel-open/nvidia/nv_uvm_interface.c +++ b/kernel-open/nvidia/nv_uvm_interface.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2013-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2013-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -1478,6 +1478,15 @@ NV_STATUS nvUvmInterfacePagingChannelPushStream(UvmGpuPagingChannelHandle channe } EXPORT_SYMBOL(nvUvmInterfacePagingChannelPushStream); +NV_STATUS nvUvmInterfaceKeyRotationChannelDisable(uvmGpuChannelHandle channelList[], + NvU32 channeListCount) +{ + nvidia_stack_t *sp = nvUvmGetSafeStack(); + + return rm_gpu_ops_key_rotation_channel_disable(sp, ((gpuChannelHandle *)channelList), channeListCount); +} +EXPORT_SYMBOL(nvUvmInterfaceKeyRotationChannelDisable); + NV_STATUS nvUvmInterfaceCslInitContext(UvmCslContext *uvmCslContext, uvmGpuChannelHandle channel) { @@ -1516,12 +1525,13 @@ void nvUvmInterfaceDeinitCslContext(UvmCslContext *uvmCslContext) } EXPORT_SYMBOL(nvUvmInterfaceDeinitCslContext); -NV_STATUS nvUvmInterfaceCslUpdateContext(UvmCslContext *uvmCslContext) +NV_STATUS nvUvmInterfaceCslUpdateContext(UvmCslContext *contextList[], + NvU32 contextListCount) { NV_STATUS status; - nvidia_stack_t *sp = uvmCslContext->nvidia_stack; + nvidia_stack_t *sp = contextList[0]->nvidia_stack; - status = rm_gpu_ops_ccsl_context_update(sp, uvmCslContext->ctx); + status = rm_gpu_ops_ccsl_context_update(sp, contextList, contextListCount); return status; } diff --git a/kernel-open/nvidia/nvidia.Kbuild b/kernel-open/nvidia/nvidia.Kbuild index 5766c9223c..40323f4ef1 100644 --- a/kernel-open/nvidia/nvidia.Kbuild +++ b/kernel-open/nvidia/nvidia.Kbuild @@ -195,6 +195,7 @@ NV_CONFTEST_FUNCTION_COMPILE_TESTS += devm_clk_bulk_get_all NV_CONFTEST_FUNCTION_COMPILE_TESTS += get_task_ioprio NV_CONFTEST_FUNCTION_COMPILE_TESTS += mdev_set_iommu_device NV_CONFTEST_FUNCTION_COMPILE_TESTS += offline_and_remove_memory +NV_CONFTEST_FUNCTION_COMPILE_TESTS += stack_trace NV_CONFTEST_FUNCTION_COMPILE_TESTS += crypto_tfm_ctx_aligned NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_gpl_of_node_to_nid @@ -227,6 +228,8 @@ NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_tsec_comms_clear_in NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_tsec_comms_alloc_mem_from_gscco NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_tsec_comms_free_gscco_mem NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_memory_block_size_bytes +NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_tegra_platform_is_fpga +NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_tegra_platform_is_sim NV_CONFTEST_SYMBOL_COMPILE_TESTS += crypto NV_CONFTEST_TYPE_COMPILE_TESTS += dma_ops @@ -251,6 +254,7 @@ NV_CONFTEST_TYPE_COMPILE_TESTS += pci_driver_has_driver_managed_dma NV_CONFTEST_TYPE_COMPILE_TESTS += vm_area_struct_has_const_vm_flags NV_CONFTEST_TYPE_COMPILE_TESTS += memory_failure_has_trapno_arg NV_CONFTEST_TYPE_COMPILE_TESTS += foll_longterm_present +NV_CONFTEST_TYPE_COMPILE_TESTS += bus_type_has_iommu_ops NV_CONFTEST_GENERIC_COMPILE_TESTS += dom0_kernel_present NV_CONFTEST_GENERIC_COMPILE_TESTS += nvidia_vgpu_kvm_build diff --git a/src/common/displayport/inc/dp_configcaps.h b/src/common/displayport/inc/dp_configcaps.h index cdf0a7ab53..5006f37b4a 100644 --- a/src/common/displayport/inc/dp_configcaps.h +++ b/src/common/displayport/inc/dp_configcaps.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -464,6 +464,9 @@ namespace DisplayPort virtual bool getStreamStatusChanged() = 0; virtual void clearStreamStatusChanged() =0; + virtual bool getDpTunnelingIrq() = 0; + virtual void clearDpTunnelingIrq() = 0; + virtual void setDirtyLinkStatus(bool dirty) = 0; virtual void refreshLinkStatus() = 0; virtual bool isLinkStatusValid(unsigned lanes) = 0; @@ -529,6 +532,15 @@ namespace DisplayPort virtual bool readPsrEvtIndicator(vesaPsrEventIndicator *psrErr) = 0; virtual bool readPrSinkDebugInfo(panelReplaySinkDebugInfo *prDbgInfo) = 0; + virtual bool getDpTunnelBwAllocationSupported() = 0; + virtual bool getDpTunnelEstimatedBw(NvU8 &estimatedBw) = 0; + virtual bool getDpTunnelGranularityMultiplier(NvU8 &granularityMultiplier) = 0; + virtual TriState getDpTunnelBwRequestStatus() = 0; + virtual bool setDpTunnelBwAllocation(bool bEnable) = 0; + virtual bool hasDpTunnelEstimatedBwChanged() = 0; + virtual bool hasDpTunnelBwAllocationCapabilityChanged() = 0; + virtual bool writeDpTunnelRequestedBw(NvU8 requestedBw) = 0; + virtual ~DPCDHAL() {} }; @@ -536,7 +548,876 @@ namespace DisplayPort // // Implement interface // - DPCDHAL * MakeDPCDHAL(AuxBus * bus, Timer * timer); + DPCDHAL * MakeDPCDHAL(AuxBus * bus, Timer * timer, MainLink * main); + + struct DPCDHALImpl : DPCDHAL + { + AuxRetry bus; + Timer * timer; + bool dpcdOffline; + bool bGrantsPostLtRequest; + bool pc2Disabled; + bool uprequestEnable; + bool upstreamIsSource; + bool bMultistream; + bool bGpuFECSupported; + bool bLttprSupported; + bool bBypassILREdpRevCheck; + NvU32 overrideDpcdMaxLinkRate; + NvU32 overrideDpcdRev; + NvU32 overrideDpcdMaxLaneCount; + + NvU32 gpuDPSupportedVersions; + + struct _LegacyPort: public LegacyPort + { + DwnStreamPortType type; + DwnStreamPortAttribute nonEDID; + + NvU64 maxTmdsClkRate; + + DwnStreamPortType getDownstreamPortType() + { + return type; + } + + DwnStreamPortAttribute getDownstreamNonEDIDPortAttribute() + { + return nonEDID; + } + + NvU64 getMaxTmdsClkRate() + { + return maxTmdsClkRate; + } + + } legacyPort[16]; + + struct + { + unsigned revisionMajor, revisionMinor; // DPCD offset 0 + bool supportsESI; + LinkRate maxLinkRate; // DPCD offset 1 + unsigned maxLaneCount; // DPCD offset 2 + unsigned maxLanesAtHBR; + unsigned maxLanesAtRBR; + bool enhancedFraming; + bool bPostLtAdjustmentSupport; + + bool supportsNoHandshakeTraining; + bool bSupportsTPS4; + unsigned NORP; // DPCD offset 4 + + bool detailedCapInfo; // DPCD offset 5 + bool downStreamPortPresent; + NvU8 downStreamPortType; + + unsigned downStreamPortCount; // DPCD offset 7 + bool ouiSupported; + bool msaTimingParIgnored; + + NvU16 linkRateTable[NV_DPCD_SUPPORTED_LINK_RATES__SIZE]; // DPCD offset 10 ~ 1F + + bool supportsMultistream; // DPCD offset 21 + unsigned numberAudioEndpoints; // DPCD offset 22 + bool overrideToSST; // force to SST even if MST capable + bool noLinkTraining; // DPCD offset 330h + + bool extendedRxCapsPresent; // DPCD offset 000Eh [7] - Extended Receiver Capability present + + // DPCD Offset 2211h; + unsigned extendedSleepWakeTimeoutRequestMs; + // DPCD Offset 0119h [0] - If we grant the extendedSleepWakeTimeoutRequest + bool bExtendedSleepWakeTimeoutGranted; + + bool bFECSupported; + + // DPCD Offset F0002h - Number of Physical Repeaters present (after mapping) between Source and Sink + unsigned phyRepeaterCount; + // DPCD offset 700 - EDP_DPCD_REV + unsigned eDpRevision; + + struct + { + unsigned revisionMajor, revisionMinor; // DPCD offset F0000h + LinkRate maxLinkRate; // DPCD offset F0001h + unsigned maxLaneCount; // DPCD offset F0004h + unsigned phyRepeaterExtendedWakeTimeoutMs; // DPCD offset F0005h + // The array to keep track of FEC capability of each LTTPR + bool bFECSupportedRepeater[NV_DPCD14_PHY_REPEATER_CNT_MAX]; + // If all the LTTPRs supports FEC + bool bFECSupported; + + } repeaterCaps; + + struct + { + bool bIsSupported; + bool bUsb4DriverSupport; + bool bIsPanelReplayOptimizationSupported; + bool bIsBwAllocationSupported; + NvU8 maxLaneCount; + LinkRate maxLinkRate; + } dpInTunnelingCaps; + + PCONCaps pconCaps; + vesaPsrSinkCaps psrCaps; + NvU32 videoFallbackFormats; // DPCD offset 0200h + + } caps; + + bool bIsDpTunnelBwAllocationEnabled; + + struct + { + unsigned sinkCount; // DPCD offset 200 + bool automatedTestRequest; + bool cpIRQ; + bool mccsIRQ; + bool downRepMsgRdy; + bool upReqMsgRdy; + bool prErrorStatus; // DPCD offset 2004h[3] + bool rxCapChanged; // DPCD offset 2005 + bool linkStatusChanged; // DPCD offset 2005 + bool streamStatusChanged; // DPCD offset 2005 + bool hdmiLinkStatusChanged; // DPCD offset 2005 + bool dpTunnelingIrq; // DPCD offset 2005 + NvU8 eightyBitCustomPat[10]; // DPCD offset 250 - 259 + + struct + { + struct + { + bool clockRecoveryDone; + bool channelEqualizationDone; + bool symbolLocked; + } laneStatus[4]; // DPCD offset 202, 203 + + bool interlaneAlignDone; // DPCD offset 204 + bool downstmPortChng; + bool linkStatusUpdated; + + // + // (ESI specific) signifies that we have link trained and should + // update the link status in the next query to isLinkLost. Keep in + // mind that linkStatusChanged might still be zero. + // + bool linkStatusDirtied; + } laneStatusIntr; + + struct + { + bool testRequestTraining; // DPCD offset 218 + LinkRate testRequestLinkRate; // DPCD offset 219 + unsigned testRequestLaneCount; // DPCD offset 220 + } testTraining; + + struct + { + bool testRequestEdidRead; // DPCD offset 218 + } testEdid; + + struct + { + bool testRequestPattern; // DPCD offset 218 + TestPatternType testPatRequested; // DPCD offset 221 + NvU16 testHorTotalPixels; // DPCD offset 222, 223 + NvU16 testVerTotalLines; // DPCD offset 224, 225 + NvU16 testHorStartPixels; // DPCD offset 226, 227 + NvU16 testVerStartLines; // DPCD offset 228, 229 + NvU16 testHsyncWidthPixels; // DPCD offset 22A, 22B + bool testHsyncPolarity; + NvU16 testVsyncWidthLines; // DPCD offset 22C, 22D + bool testVsyncPolarity; + NvU16 testActiveWidthPixels; // DPCD offset 22E, 22F + NvU16 testActiveHeightLines; // DPCD offset 230, 231 + } testPattern; + + struct + { + bool testRequestPhyCompliance; // DPCD offset 218 + LinkQualityPatternType phyTestPattern; // DPCD offset 248 + } testPhyCompliance; + + } interrupts; + + bool bIndexedLinkrateCapable, bIndexedLinkrateEnabled; + + public: + DPCDHALImpl(AuxBus * bus, Timer * timer) + : bus(bus), timer(timer), bGrantsPostLtRequest(false), uprequestEnable(false), + upstreamIsSource(false), bMultistream(false), bGpuFECSupported(false), + bBypassILREdpRevCheck(false), overrideDpcdMaxLinkRate(0), + overrideDpcdRev(0), gpuDPSupportedVersions(0), bIsDpTunnelBwAllocationEnabled(false) + { + // start with default caps. + dpcdOffline = true; + + // + // fill out the bare minimum caps required ... + // this should be extended in for more dpcd offsets in future. + // + caps.revisionMajor = 0x1; + caps.revisionMinor = 0x1; + caps.supportsESI = false; + caps.maxLinkRate = HBR3; + caps.maxLaneCount = 4; + caps.enhancedFraming = true; + caps.downStreamPortPresent = true; + caps.downStreamPortCount = 1; + + // populate the sinkcount interrupt + interrupts.sinkCount = 1; + } + + ~DPCDHALImpl() + { + } + + virtual void setAuxBus(AuxBus * bus) + { + this->bus = bus; + } + + bool isDpcdOffline() + { + return dpcdOffline; + } + + void setDPCDOffline(bool bOffline) + { + dpcdOffline = bOffline; + } + + void updateDPCDOffline(); + + void setPC2Disabled(bool disabled) + { + pc2Disabled = disabled; + } + + void setLttprSupported(bool isLttprSupported) + { + bLttprSupported = isLttprSupported; + } + + bool isPC2Disabled() + { + return pc2Disabled; + } + + virtual void parseAndReadCaps(); + virtual PCONCaps * getPCONCaps() + { + return &(caps.pconCaps); + } + + // DPCD offset 0 + virtual unsigned getRevisionMajor() + { + return caps.revisionMajor; + } + + virtual unsigned getRevisionMinor() + { + return caps.revisionMinor; + } + + // DPCD offset F0000h + virtual unsigned lttprGetRevisionMajor() + { + return caps.repeaterCaps.revisionMajor; + } + + virtual unsigned lttprGetRevisionMinor() + { + return caps.repeaterCaps.revisionMinor; + } + + virtual LinkRate getMaxLinkRate(); + + // DPCD offset 2 + virtual unsigned getMaxLaneCount(); + + virtual bool getNoLinkTraining() + { + return caps.noLinkTraining; + } + + virtual unsigned getPhyRepeaterCount() + { + return caps.phyRepeaterCount; + } + + // Max lanes supported at the desired link rate. + virtual unsigned getMaxLaneCountSupportedAtLinkRate(LinkRate linkRate); + + virtual bool getEnhancedFraming() + { + return caps.enhancedFraming; + } + + // DPCD offset 5 + virtual bool getDownstreamPort(NvU8 *portType) + { + *portType = caps.downStreamPortType; + return caps.downStreamPortPresent; + } + + virtual bool getSupportsNoHandshakeTraining() + { + return caps.supportsNoHandshakeTraining; + } + + // DPCD offset 7 + virtual unsigned getLegacyPortCount() + { + return caps.downStreamPortCount; + } + + virtual LegacyPort * getLegacyPort(unsigned index) + { + return &legacyPort[index]; + } + + virtual bool getMsaTimingparIgnored() + { + return caps.msaTimingParIgnored; + } + + virtual bool getOuiSupported() + { + return caps.ouiSupported; + } + + virtual bool getSDPExtnForColorimetry(); + + virtual bool getRootAsyncSDPSupported(); + + virtual AuxRetry::status setOuiSource(unsigned ouiId, const char * model, + size_t modelNameLength, NvU8 chipRevision); + virtual bool getOuiSource(unsigned &ouiId, char * modelName, + size_t modelNameBufferSize, NvU8 & chipRevision); + virtual bool getOuiSink(unsigned &ouiId, char * modelName, + size_t modelNameBufferSize, NvU8 & chipRevision); + + // DPCD offset 21h + virtual bool getSupportsMultistream() + { + return caps.supportsMultistream && (!caps.overrideToSST); + } + + virtual void setSupportsESI(bool bIsESISupported) + { + caps.supportsESI = bIsESISupported; + } + + // + // Single stream specific caps + // DPCD offset 22h + // + virtual unsigned getNumberOfAudioEndpoints(); + + // DPCD offset 30h + virtual bool getGUID(GUID & guid); + virtual AuxRetry::status setGUID(GUID & guid); + + void parsePortDescriptors(); + + // + // Notifications of external events + // + virtual void notifyIRQ() + { + parseAndReadInterrupts(); + } + + virtual void populateFakeDpcd(); + + // DPCD override routine: Max link rate override. + void overrideMaxLinkRate(NvU32 overrideMaxLinkRate); + + // DPCD override routine: Max lane count override. + void overrideMaxLaneCount(NvU32 maxLaneCount) + { + caps.maxLaneCount = maxLaneCount; + overrideDpcdMaxLaneCount = maxLaneCount; + } + + // DPCD override routine: Max lane count override at a given link rate. + void skipCableBWCheck(NvU32 maxLaneAtHighRate, NvU32 maxLaneAtLowRate) + { + caps.maxLanesAtHBR = maxLaneAtHighRate; + caps.maxLanesAtRBR = maxLaneAtLowRate; + } + + // DPCD override routine: Optimal link config (link rate and lane count) override. + void overrideOptimalLinkCfg(LinkRate optimalLinkRate, + NvU32 optimalLaneCount) + { + caps.maxLinkRate = optimalLinkRate; + caps.maxLaneCount = optimalLaneCount; + } + + // DPCD override routine: Optimal link rate + void overrideOptimalLinkRate(LinkRate optimalLinkRate) + { + caps.maxLinkRate = optimalLinkRate; + } + + virtual void notifyHPD(bool status, bool bSkipDPCDRead); + virtual bool isPostLtAdjustRequestSupported() + { + // + // If the upstream DPTX and downstream DPRX both support TPS4, + // TPS4 shall be used instead of POST_LT_ADJ_REQ. + // + NvBool bTps4Supported = FLD_TEST_DRF(0073_CTRL_CMD_DP, _GET_CAPS_DP_VERSIONS_SUPPORTED, + _DP1_4, _YES, gpuDPSupportedVersions) && + caps.bSupportsTPS4; + return bGrantsPostLtRequest && !bTps4Supported; + } + + virtual void setPostLtAdjustRequestGranted(bool bGrantPostLtRequest); + virtual bool getIsPostLtAdjRequestInProgress(); + virtual TrainingPatternSelectType getTrainingPatternSelect(); + virtual bool setTrainingMultiLaneSet(NvU8 numLanes, + NvU8 *voltSwingSet, + NvU8 *preEmphasisSet); + + virtual AuxRetry::status setIgnoreMSATimingParamters(bool msaTimingParamIgnoreEn); + + virtual AuxRetry::status setLinkQualPatternSet(LinkQualityPatternType linkQualPattern, unsigned laneCount); + virtual AuxRetry::status setLinkQualLaneSet(unsigned lane, LinkQualityPatternType linkQualPattern); + + virtual AuxRetry::status setMessagingEnable(bool _uprequestEnable, bool _upstreamIsSource); + virtual AuxRetry::status setMultistreamLink(bool enable); + virtual AuxRetry::status setMultistreamHotplugMode(MultistreamHotplugMode notifyType); + + bool parseTestRequestTraining(NvU8 * buffer /* 0x18-0x28 valid */); + void parseAutomatedTestRequest(bool testRequestPending); + + virtual bool parseTestRequestPhy(); + + virtual bool interruptCapabilitiesChanged() + { + return interrupts.rxCapChanged; + } + + virtual void clearInterruptCapabilitiesChanged() + { + NvU8 irqVector = 0; + irqVector = FLD_SET_DRF(_DPCD, _LINK_SERVICE_IRQ_VECTOR_ESI0, _RX_CAP_CHANGED, _YES, irqVector); + bus.write(NV_DPCD_LINK_SERVICE_IRQ_VECTOR_ESI0, &irqVector, sizeof irqVector); + } + + virtual bool isPanelReplayErrorSet() + { + return interrupts.prErrorStatus; + } + + virtual void readPanelReplayError(); + virtual void clearPanelReplayError() + { + NvU8 irqVector = 0U; + irqVector = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI1, + _PANEL_REPLAY_ERROR_STATUS, _YES, irqVector); + bus.write(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR_ESI1, &irqVector, + sizeof irqVector); + } + + virtual bool getLinkStatusChanged() + { + return interrupts.linkStatusChanged; + } + + virtual void clearLinkStatusChanged() + { + NvU8 irqVector = 0; + irqVector = FLD_SET_DRF(_DPCD, _LINK_SERVICE_IRQ_VECTOR_ESI0, _LINK_STATUS_CHANGED, _YES, irqVector); + bus.write(NV_DPCD_LINK_SERVICE_IRQ_VECTOR_ESI0, &irqVector, sizeof irqVector); + } + + virtual bool getHdmiLinkStatusChanged() + { + return interrupts.hdmiLinkStatusChanged; + } + + virtual void clearHdmiLinkStatusChanged() + { + NvU8 irqVector = 0; + irqVector = FLD_SET_DRF(_DPCD, _LINK_SERVICE_IRQ_VECTOR_ESI0, _HDMI_LINK_STATUS_CHANGED, _YES, irqVector); + bus.write(NV_DPCD_LINK_SERVICE_IRQ_VECTOR_ESI0, &irqVector, sizeof irqVector); + } + + virtual bool getStreamStatusChanged() + { + return interrupts.streamStatusChanged; + } + + virtual void clearStreamStatusChanged() + { + NvU8 irqVector = 0; + irqVector = FLD_SET_DRF(_DPCD, _LINK_SERVICE_IRQ_VECTOR_ESI0, _STREAM_STATUS_CHANGED, _YES, irqVector); + bus.write(NV_DPCD_LINK_SERVICE_IRQ_VECTOR_ESI0, &irqVector, sizeof irqVector); + } + + virtual bool getDpTunnelingIrq() + { + return interrupts.dpTunnelingIrq; + } + + virtual void clearDpTunnelingIrq() + { + NvU8 irqVector = 0; + irqVector = FLD_SET_DRF(_DPCD20, _LINK_SERVICE_IRQ_VECTOR_ESI0, _DP_TUNNELING_IRQ, _YES, irqVector); + bus.write(NV_DPCD20_LINK_SERVICE_IRQ_VECTOR_ESI0, &irqVector, sizeof irqVector); + } + + virtual bool isLinkStatusValid(unsigned lanes); + virtual void refreshLinkStatus(); + virtual void setDirtyLinkStatus(bool dirty) + { + interrupts.laneStatusIntr.linkStatusDirtied = dirty; + } + + void parseAndReadInterruptsESI(); + + void readLTTPRLinkStatus(NvS32 rxIndex, NvU8 *buffer); + void resetIntrLaneStatus(); + + void fetchLinkStatusESI(); + void fetchLinkStatusLegacy(); + + virtual bool readTraining(NvU8* voltageSwingLane, NvU8* preemphasisLane, + NvU8* trainingScoreLane, NvU8* postCursor, + NvU8 activeLaneCount); + + virtual bool isLaneSettingsChanged(NvU8* oldVoltageSwingLane, + NvU8* newVoltageSwingLane, + NvU8* oldPreemphasisLane, + NvU8* newPreemphasisLane, + NvU8 activeLaneCount); + + void parseAndReadInterruptsLegacy(); + + void parseAndReadInterrupts() + { + if (caps.supportsESI) + parseAndReadInterruptsESI(); // DP 1.2 should use the new ESI region + else + parseAndReadInterruptsLegacy(); + + } + + virtual int getSinkCount() // DPCD offset 200 + { + return interrupts.sinkCount; + } + + // + // This was introduced as part of WAR for HP SDC Panel since their + // TCON sets DPCD 0x200 SINK_COUNT=0. It should never be called to + // set the SinkCount in other cases since SinkCount comes from DPCD. + // + virtual void setSinkCount(int sinkCount) + { + interrupts.sinkCount = sinkCount; + } + + virtual bool interruptContentProtection() + { + return interrupts.cpIRQ; + } + + virtual void clearInterruptContentProtection(); + + virtual bool intteruptMCCS() + { + return interrupts.mccsIRQ; + } + + virtual void clearInterruptMCCS(); + + virtual bool interruptDownReplyReady() + { + return interrupts.downRepMsgRdy; + } + + virtual bool interruptUpRequestReady() + { + return interrupts.upReqMsgRdy; + } + + virtual void clearInterruptDownReplyReady(); + virtual void clearInterruptUpRequestReady(); + + virtual bool getLaneStatusSymbolLock(int lane) + { + return interrupts.laneStatusIntr.laneStatus[lane].symbolLocked; + } + + virtual bool getLaneStatusClockRecoveryDone(int lane) + { + return interrupts.laneStatusIntr.laneStatus[lane].clockRecoveryDone; + } + + virtual bool getInterlaneAlignDone() // DPCD offset 204 + { + return interrupts.laneStatusIntr.interlaneAlignDone; + } + + virtual bool getDownStreamPortStatusChange() + { + return interrupts.laneStatusIntr.downstmPortChng; + } + + virtual bool getPendingTestRequestTraining() // DPCD offset 218 + { + return interrupts.testTraining.testRequestTraining; + } + + virtual bool getPendingAutomatedTestRequest() + { + return interrupts.automatedTestRequest; + } + + virtual bool getPendingTestRequestEdidRead() + { + return interrupts.testEdid.testRequestEdidRead; + } + + virtual bool getPendingTestRequestPhyCompliance() + { + return interrupts.testPhyCompliance.testRequestPhyCompliance; + } + + virtual void getTestRequestTraining(LinkRate & rate, unsigned & lanes) // DPCD offset 219, 220 + { + rate = interrupts.testTraining.testRequestLinkRate; + lanes = interrupts.testTraining.testRequestLaneCount; + } + + virtual LinkQualityPatternType getPhyTestPattern() // DPCD offset 248 + { + return interrupts.testPhyCompliance.phyTestPattern; + } + + virtual void getCustomTestPattern(NvU8 *testPattern) // DPCD offset 250 - 259 + { + int i; + + for (i = 0; i < 10; i++) + { + testPattern[i] = interrupts.eightyBitCustomPat[i]; + } + } + + virtual bool getBKSV(NvU8 *bKSV); + virtual bool getBCaps(BCaps &bCaps, NvU8 * rawByte); + virtual bool getHdcp22BCaps(BCaps &bCaps, NvU8 *rawByte); + virtual bool getBinfo(BInfo &bInfo); + virtual bool getRxStatus(const HDCPState &hdcpState, NvU8 *data); + + virtual AuxRetry::status setTestResponseChecksum(NvU8 checksum) + { + if (caps.revisionMajor <= 0) + DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); + + return bus.write(NV_DPCD_TEST_EDID_CHKSUM, &checksum, sizeof checksum); + } + + virtual AuxRetry::status setTestResponse(bool ack, bool edidChecksumWrite); + + // Message box encoding + virtual AuxRetry::status writeDownRequestMessageBox(NvU8 * data, size_t length) + { + // + // We can assume no message was sent if this fails. + // Reasoning: + // Sinks are not allowed to DEFER except on the first 16 byte write. + // If there isn't enough room for the 48 byte packet, that write + // will defer. + // + return bus.write(NV_DPCD_MBOX_DOWN_REQ, data, (unsigned)length); + } + + virtual size_t getDownRequestMessageBoxSize() + { + return DP_MESSAGEBOX_SIZE; + } + + virtual AuxRetry::status writeUpReplyMessageBox(NvU8 * data, size_t length) + { + if (caps.revisionMajor <= 0) + DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); + + // + // We can assume no message was sent if this fails. + // Reasoning: + // Sinks are not allowed to DEFER except on the first 16 byte write. + // If there isn't enough room for the 48 byte packet, that write + // will defer. + // + return bus.write(NV_DPCD_MBOX_UP_REP, data, (unsigned)length); + } + + virtual size_t getUpReplyMessageBoxSize() + { + return DP_MESSAGEBOX_SIZE; + } + + virtual AuxRetry::status readDownReplyMessageBox(NvU32 offset, NvU8 * data, size_t length) + { + // if (caps.revisionMajor <= 0) + // DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); + + DP_ASSERT(offset + length <= DP_MESSAGEBOX_SIZE); + + return bus.read(NV_DPCD_MBOX_DOWN_REP + offset, data, (unsigned)length); + } + + virtual size_t getDownReplyMessageBoxSize() + { + return DP_MESSAGEBOX_SIZE; + } + + virtual AuxRetry::status readUpRequestMessageBox(NvU32 offset, NvU8 * data, size_t length) + { + if (caps.revisionMajor <= 0) + DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); + + DP_ASSERT(offset + length <= DP_MESSAGEBOX_SIZE); + + return bus.read(NV_DPCD_MBOX_UP_REQ + offset, data, (unsigned)length); + } + + virtual size_t getUpRequestMessageBoxSize() + { + return DP_MESSAGEBOX_SIZE; + } + + virtual size_t getTransactionSize() + { + return bus.getDirect()->transactionSize(); + } + + virtual PowerState getPowerState(); + virtual bool setPowerState(PowerState newState); + virtual void payloadTableClearACT(); + virtual bool payloadWaitForACTReceived(); + virtual bool payloadAllocate(unsigned streamId, unsigned begin, unsigned count); + + void overrideMultiStreamCap(bool mstCapable) + { + caps.overrideToSST = !mstCapable; + } + + bool getMultiStreamCapOverride() + { + return caps.overrideToSST; + } + + bool getDpcdMultiStreamCap(void) + { + return caps.supportsMultistream; + } + + virtual void setGpuDPSupportedVersions(NvU32 _gpuDPSupportedVersions); + + void setGpuFECSupported(bool bSupportFEC) + { + bGpuFECSupported = bSupportFEC; + } + + void applyRegkeyOverrides(const DP_REGKEY_DATABASE& dpRegkeyDatabase); + + // To clear pending message {DOWN_REP/UP_REQ} and reply true if existed. + virtual bool clearPendingMsg(); + + virtual bool isMessagingEnabled(); + + virtual void setIndexedLinkrateEnabled(bool val) + { + bIndexedLinkrateEnabled = val; + } + + virtual bool isIndexedLinkrateEnabled() + { + return bIndexedLinkrateEnabled; + } + + virtual bool isIndexedLinkrateCapable() + { + return bIndexedLinkrateCapable; + } + + virtual NvU16 *getLinkRateTable(); + + virtual NvU32 getVideoFallbackSupported() + { + return caps.videoFallbackFormats; + } + + virtual bool getRawLinkRateTable(NvU8 *buffer); + + virtual void resetProtocolConverter() + { + NvU8 data = 0; + bus.write(NV_DPCD14_PCON_FRL_LINK_CONFIG_1, &data, sizeof(data)); + bus.write(NV_DPCD14_PCON_FRL_LINK_CONFIG_2, &data, sizeof(data)); + } + + virtual bool setSourceControlMode(bool bEnableSourceControlMode, bool bEnableFRLMode); + + virtual bool checkPCONFrlReady(bool *bFrlReady); + + virtual bool setupPCONFrlLinkAssessment(NvU32 linkBwMask, + bool bEnableExtendLTMode = false, + bool bEnableConcurrentMode = false); + + virtual bool checkPCONFrlLinkStatus(NvU32 *frlRateMask); + virtual bool queryHdmiLinkStatus(bool *bLinkActive, bool *bLinkReady); + + virtual NvU32 restorePCONFrlLink(NvU32 linkBwMask, + bool bEnableExtendLTMode = false, + bool bEnableConcurrentMode = false); + + virtual void readPsrCapabilities(vesaPsrSinkCaps *caps) + { + dpMemCopy(caps, &this->caps.psrCaps, sizeof(vesaPsrSinkCaps)); + } + + virtual bool updatePsrConfiguration(vesaPsrConfig psrcfg); + virtual bool readPsrConfiguration(vesaPsrConfig *psrcfg); + + virtual bool readPsrState(vesaPsrState *psrState); + virtual bool readPsrDebugInfo(vesaPsrDebugStatus *psrDbgState); + + virtual bool writePsrErrorStatus(vesaPsrErrorStatus psrErr); + virtual bool readPsrErrorStatus(vesaPsrErrorStatus *psrErr); + + virtual bool writePsrEvtIndicator(vesaPsrEventIndicator psrEvt); + virtual bool readPsrEvtIndicator(vesaPsrEventIndicator *psrEvt); + + virtual bool readPrSinkDebugInfo(panelReplaySinkDebugInfo *prDbgInfo); + + bool getDpTunnelBwAllocationSupported() + { + return false; + } + + virtual bool getDpTunnelGranularityMultiplier(NvU8 &granularityMultiplier); + virtual TriState getDpTunnelBwRequestStatus(); + virtual bool setDpTunnelBwAllocation(bool bEnable); + + bool getDpTunnelEstimatedBw(NvU8 &estimatedBw); + bool hasDpTunnelEstimatedBwChanged(); + bool hasDpTunnelBwAllocationCapabilityChanged(); + bool writeDpTunnelRequestedBw(NvU8 requestedBw); + + }; + } #endif //INCLUDED_DP_CONFIGCAPS_H diff --git a/src/common/displayport/inc/dp_connector.h b/src/common/displayport/inc/dp_connector.h index b9388d215b..236984c933 100644 --- a/src/common/displayport/inc/dp_connector.h +++ b/src/common/displayport/inc/dp_connector.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -65,6 +65,7 @@ namespace DisplayPort DP_IMP_ERROR_INSUFFICIENT_BANDWIDTH, DP_IMP_ERROR_INSUFFICIENT_BANDWIDTH_DSC, DP_IMP_ERROR_INSUFFICIENT_BANDWIDTH_NO_DSC, + DP_IMP_ERROR_INSUFFICIENT_DP_TUNNELING_BANDWIDTH, DP_IMP_ERROR_WATERMARK_BLANKING, DP_IMP_ERROR_PPS_COLOR_FORMAT_NOT_SUPPORTED, DP_IMP_ERROR_PPS_INVALID_HBLANK, @@ -274,6 +275,10 @@ namespace DisplayPort virtual DscCaps getDscCaps() = 0; + virtual NvBool isDynamicPPSSupported() = 0; + + virtual NvBool isDynamicDscToggleSupported() = 0; + // // This function returns the device itself or its parent device that is doing // DSC decompression for it. @@ -321,8 +326,14 @@ namespace DisplayPort virtual bool isMSAOverMSTCapable() = 0; virtual bool isFakedMuxDevice() = 0; virtual bool setPanelReplayConfig(panelReplayConfig prcfg) = 0; + virtual bool getPanelReplayConfig(panelReplayConfig *pPrcfg) = 0; virtual bool isPanelReplaySupported() = 0; virtual bool getPanelReplayStatus(PanelReplayStatus *pPrStatus) = 0; + virtual bool getDeviceSpecificData(NvU8 *oui, NvU8 *deviceIdString, + NvU8 *hwRevision, NvU8 *swMajorRevision, + NvU8 *swMinorRevision) = 0; + + virtual bool setModeList(DisplayPort::DpModesetParams *pModeList, unsigned numModes) = 0; protected: virtual ~Device() {} @@ -594,6 +605,8 @@ namespace DisplayPort virtual void notifyGPUCapabilityChange() = 0; virtual void notifyHBR2WAREngage() = 0; + virtual bool dpUpdateDscStream(Group *target, NvU32 dscBpp) = 0; + // Create a new Group. Note that if you wish to do a modeset but send the // stream nowhere, you may do a modeset with an EMPTY group. This is expected // to be the mechanism by which monitor faking is implemented. @@ -710,6 +723,7 @@ namespace DisplayPort virtual bool setTestPattern(NV0073_CTRL_DP_TESTPATTERN testPattern, NvU8 laneMask, NV0073_CTRL_DP_CSTM cstm, NvBool bIsHBR2, NvBool bSkipLaneDataOverride) = 0; + // "data" is an array of NV0073_CTRL_MAX_LANES unsigned ints virtual bool getLaneConfig(NvU32 *numLanes, NvU32 *data) = 0; // "data" is an array of NV0073_CTRL_MAX_LANES unsigned ints @@ -735,6 +749,7 @@ namespace DisplayPort virtual bool updatePsrLinkState(bool bTurnOnLink) = 0; virtual bool readPrSinkDebugInfo(panelReplaySinkDebugInfo *prDbgInfo) = 0; + virtual void enableDpTunnelingBwAllocationSupport() = 0; protected: virtual ~Connector() {} diff --git a/src/common/displayport/inc/dp_connectorimpl.h b/src/common/displayport/inc/dp_connectorimpl.h index 4e88ea21a2..763572c26e 100644 --- a/src/common/displayport/inc/dp_connectorimpl.h +++ b/src/common/displayport/inc/dp_connectorimpl.h @@ -49,6 +49,9 @@ #define HDCP_FLAGS_ABORT_DEVICE_INVALID 0x00080000 // Abort due to an invalid device in DP1.2 topology #define HDCP_FLAGS_ABORT_HOP_LIMIT_EXCEEDED 0x80000000 // Abort, number of devices in DP1.2 topology exceeds supported limit +#define DP_TUNNEL_REQUEST_BW_MAX_TIME_MS (1000U) +#define DP_TUNNEL_REQUEST_BW_POLLING_INTERVAL_MS (10U) + static inline unsigned getDataClockMultiplier(NvU64 linkRate, NvU64 laneCount) { // @@ -192,6 +195,7 @@ namespace DisplayPort bool compoundQueryResult; unsigned compoundQueryCount; unsigned compoundQueryLocalLinkPBN; + NvU64 compoundQueryUsedTunnelingBw; bool compoundQueryForceEnableFEC; unsigned freeSlots; @@ -309,7 +313,6 @@ namespace DisplayPort bool bNoFallbackInPostLQA; bool bReportDeviceLostBeforeNew; - bool bEnableAudioBeyond48K; bool bDisableSSC; bool bEnableFastLT; NvU32 maxLinkRateFromRegkey; @@ -348,9 +351,6 @@ namespace DisplayPort // bool bPowerDownPhyBeforeD3; - // Force DSC on sink irrespective of LT status - bool bForceDscOnSink; - // // Reset the MSTM_CTRL registers on branch device irrespective of // IRQ VECTOR register having stale message. Certain branch devices @@ -362,6 +362,11 @@ namespace DisplayPort bool bForceClearPendingMsg; bool bSkipFakeDeviceDpcdAccess; + NvU64 allocatedDpTunnelBw; + NvU64 allocatedDpTunnelBwShadow; + bool bForceDisableTunnelBwAllocation; + bool bClientRequestedDpTunnelBwAllocation; + bool bIsDpTunnelBwAllocationEnabled; Group *perHeadAttachedGroup[NV_MAX_HEADS]; NvU32 inTransitionHeadMask; @@ -444,6 +449,9 @@ namespace DisplayPort const DpModesetParams &modesetParams, // Modeset info DscParams *pDscParams = NULL, // DSC parameters DP_IMP_ERROR *pErrorCode = NULL); // Error Status code + virtual bool compoundQueryAttachTunneling(const DpModesetParams &modesetParams, + DscParams *pDscParams = NULL, + DP_IMP_ERROR *pErrorCode = NULL); virtual bool endCompoundQuery(); @@ -495,6 +503,7 @@ namespace DisplayPort char tagHDCPReauthentication; char tagDelayedHdcpCapRead; char tagDelayedHDCPCPIrqHandling; + char tagDpBwAllocationChanged; // // Enable disable TMDS mode @@ -563,6 +572,18 @@ namespace DisplayPort bool willLinkSupportModeSST(const LinkConfiguration & linkConfig, const ModesetInfo & modesetInfo); void forceLinkTraining(); + bool updateDpTunnelBwAllocation(); + void configureDpTunnelBwAllocation(); + TriState requestDpTunnelBw(NvU8 requestedBw); + bool allocateDpTunnelBw(NvU64 bandwidth); + bool allocateMaxDpTunnelBw(); + NvU64 getMaxTunnelBw(); + + void enableDpTunnelingBwAllocationSupport() + { + bClientRequestedDpTunnelBwAllocation = true; + } + void assessLink(LinkTrainingType trainType = NORMAL_LINK_TRAINING); bool isLinkInD3(); @@ -594,8 +615,8 @@ namespace DisplayPort void populateDscBranchCaps(DSC_INFO* dscInfo, DeviceImpl * dev); void populateDscModesetInfo(MODESET_INFO * pModesetInfo, const DpModesetParams * pModesetParams); - bool train(const LinkConfiguration & lConfig, bool force, LinkTrainingType trainType = NORMAL_LINK_TRAINING); - bool validateLinkConfiguration(const LinkConfiguration & lConfig); + virtual bool train(const LinkConfiguration & lConfig, bool force, LinkTrainingType trainType = NORMAL_LINK_TRAINING); + virtual bool validateLinkConfiguration(const LinkConfiguration & lConfig); virtual bool assessPCONLinkCapability(PCONLinkControl *params); bool trainPCONFrlLink(PCONLinkControl *pConControl); @@ -606,12 +627,12 @@ namespace DisplayPort // the lowest level function(nearest to the hal) for the connector. bool rawTrain(const LinkConfiguration & lConfig, bool force, LinkTrainingType linkTrainingType); - bool enableFlush(); - bool beforeAddStream(GroupImpl * group, bool force=false, bool forFlushMode = false); - void afterAddStream(GroupImpl * group); - void beforeDeleteStream(GroupImpl * group, bool forFlushMode = false); - void afterDeleteStream(GroupImpl * group); - void disableFlush(bool test=false); + virtual bool enableFlush(); + virtual bool beforeAddStream(GroupImpl * group, bool force=false, bool forFlushMode = false); + virtual void afterAddStream(GroupImpl * group); + virtual void beforeDeleteStream(GroupImpl * group, bool forFlushMode = false); + virtual void afterDeleteStream(GroupImpl * group); + virtual void disableFlush(bool test=false); bool beforeAddStreamMST(GroupImpl * group, bool force = false, bool forFlushMode = false); @@ -619,7 +640,7 @@ namespace DisplayPort bool deleteAllVirtualChannels(); void clearTimeslices(); - bool allocateTimeslice(GroupImpl * targetGroup); + virtual bool allocateTimeslice(GroupImpl * targetGroup); void freeTimeslice(GroupImpl * targetGroup); void flushTimeslotsToHardware(); bool getHDCPAbortCodesDP12(NvU32 &hdcpAbortCodesDP12); @@ -629,6 +650,7 @@ namespace DisplayPort bool handleCPIRQ(); void handleSSC(); void handleMCCSIRQ(); + void handleDpTunnelingIrq(); void handleHdmiLinkStatusChanged(); void sortActiveGroups(bool ascending); void configInit(); @@ -639,7 +661,7 @@ namespace DisplayPort void notifyLongPulseInternal(bool statusConnected); virtual void notifyLongPulse(bool status); virtual void notifyShortPulse(); - virtual Group * newGroup() ; + virtual Group * newGroup(); virtual void destroy(); virtual void createFakeMuxDevice(const NvU8 *buffer, NvU32 bufferSize); virtual void deleteFakeMuxDevice(); @@ -664,6 +686,7 @@ namespace DisplayPort Group * createFirmwareGroup(); virtual void notifyGPUCapabilityChange(); virtual void notifyHBR2WAREngage(); + bool dpUpdateDscStream(Group *target, NvU32 dscBpp); bool getTestPattern(NV0073_CTRL_DP_TESTPATTERN *testPattern); bool setTestPattern(NV0073_CTRL_DP_TESTPATTERN testPattern, NvU8 laneMask, NV0073_CTRL_DP_CSTM cstm, NvBool bIsHBR2, NvBool bSkipLaneDataOverride = false); @@ -707,16 +730,16 @@ namespace DisplayPort // struct DevicePendingEDIDRead : protected EdidReadMultistream::EdidReadMultistreamEventSink, public ListElement { - EdidReadMultistream reader; - DiscoveryManager::Device device; ConnectorImpl * parent; + DiscoveryManager::Device device; + EdidReadMultistream reader; void mstEdidCompleted(EdidReadMultistream * from); void mstEdidReadFailed(EdidReadMultistream * from); public: DevicePendingEDIDRead(ConnectorImpl * _parent, MessageManager * manager, DiscoveryManager::Device dev) - : reader(_parent->timer, manager, this, dev.address), device(dev), parent(_parent) + : parent(_parent), device(dev), reader(_parent->timer, manager, this, dev.address) { } }; diff --git a/src/common/displayport/inc/dp_deviceimpl.h b/src/common/displayport/inc/dp_deviceimpl.h index cc0a90cd2b..a1b0b6e878 100644 --- a/src/common/displayport/inc/dp_deviceimpl.h +++ b/src/common/displayport/inc/dp_deviceimpl.h @@ -44,6 +44,7 @@ namespace DisplayPort #define HDCP_BCAPS_DDC_EN_BIT 0x80 #define HDCP_BCAPS_DP_EN_BIT 0x01 #define HDCP_I2C_CLIENT_ADDR 0x74 + #define DEVICE_OUI_SIZE 3 struct GroupImpl; struct ConnectorImpl; @@ -170,7 +171,6 @@ namespace DisplayPort // Panel replay Caps PanelReplayCaps prCaps; - bool bIsFakedMuxDevice; bool bIsPreviouslyFakedMuxDevice; bool bisMarkedForDeletion; @@ -202,6 +202,8 @@ namespace DisplayPort bool bSkipFakeDeviceDpcdAccess; DeviceImpl(DPCDHAL * hal, ConnectorImpl * connector, DeviceImpl * parent, bool bSkipFakeDeviceDpcdAccess); + NvU64 maxModeBwRequired; + ~DeviceImpl(); virtual bool isCableOk(); @@ -380,6 +382,11 @@ namespace DisplayPort return dpcdRevisionMinor >= minor; } + NvU64 getMaxModeBwRequired() + { + return maxModeBwRequired; + } + virtual void queryGUID2(); virtual bool getSDPExtnForColorimetrySupported(); @@ -445,6 +452,7 @@ namespace DisplayPort bool isPanelReplaySupported(void); void getPanelReplayCaps(void); bool setPanelReplayConfig(panelReplayConfig prcfg); + bool getPanelReplayConfig(panelReplayConfig *pPrcfg); bool getPanelReplayStatus(PanelReplayStatus *pPrStatus); NvBool getDSCSupport(); @@ -481,6 +489,11 @@ namespace DisplayPort unsigned getDscMaxSliceWidth(); unsigned getDscDecoderColorDepthSupportMask(); void setDscDecompressionDevice(bool bDscCapBasedOnParent); + virtual bool getDeviceSpecificData(NvU8 *oui, NvU8 *deviceIdString, + NvU8 *hwRevision, NvU8 *swMajorRevision, + NvU8 *swMinorRevision); + + virtual bool setModeList(DisplayPort::DpModesetParams *pModeList, unsigned numModes); }; class DeviceHDCPDetection : public Object, MessageManager::Message::MessageEventSink, Timer::TimerCallback { diff --git a/src/common/displayport/inc/dp_edid.h b/src/common/displayport/inc/dp_edid.h index 95eb53f2bf..903dffa647 100644 --- a/src/common/displayport/inc/dp_edid.h +++ b/src/common/displayport/inc/dp_edid.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2010-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2010-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -124,26 +124,7 @@ namespace DisplayPort return this->patchedChecksum; } - bool isValidHeader() const - { - NvU8 validHeaderData[8] = { - 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0x00}; - - if (buffer.getLength() < 0x8) - return false; - - for (unsigned i = 0; i < 8; i++) - { - if (buffer.data[i] != validHeaderData[i]) - { - DP_LOG(("DP-EDID> Invalid EDID Header")); - return false; - } - } - - return true; - } + bool isValidHeader() const; unsigned getManufId() const { diff --git a/src/common/displayport/inc/dp_evoadapter.h b/src/common/displayport/inc/dp_evoadapter.h index b91b47091d..8389e402a4 100644 --- a/src/common/displayport/inc/dp_evoadapter.h +++ b/src/common/displayport/inc/dp_evoadapter.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -147,6 +147,7 @@ namespace DisplayPort // Defines the same as NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS.dpVersionsSupported // NvU32 _gpuSupportedDpVersions; + bool _isStreamCloningEnabled; bool _needForceRmEdid; bool _skipPowerdownEDPPanelWhenHeadDetach; @@ -156,10 +157,11 @@ namespace DisplayPort bool _useDfpMaxLinkRateCaps; bool _applyLinkBwOverrideWarRegVal; bool _isDynamicMuxCapable; + bool _isMDMEnabled; bool _enableMSAOverrideOverMST; - bool _isLTPhyRepeaterSupported; bool _isMSTPCONCapsReadDisabled; + bool _isDownspreadSupported; // // LTTPR count reported by RM, it might not be the same with DPLib probe // For example, some Intel LTTPR might not be ready to response 0xF0000 probe @@ -258,6 +260,16 @@ namespace DisplayPort return (_isDynamicMuxCapable && _isEDP); } + virtual bool isMDMEnabled() + { + return (_isMDMEnabled && _isEDP); + } + + virtual bool isDownspreadSupported() + { + return _isDownspreadSupported; + } + // Get GPU DSC capabilities virtual void getDscCaps(bool *pbDscSupported, unsigned *pEncoderColorFormatMask, @@ -313,6 +325,11 @@ namespace DisplayPort return this->_isLTPhyRepeaterSupported; } + EvoInterface * getProvider() + { + return this->provider; + } + // Return the current mux state. Returns false if device is not mux capable bool getDynamicMuxState(NvU32 *muxState); @@ -334,8 +351,8 @@ namespace DisplayPort virtual bool getMaxLinkConfigFromUefi(NvU8 &linkRate, NvU8 &laneCount); virtual bool setDpMSAParameters(bool bStereoEnable, const NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_PARAMS &msaparams); virtual bool setDpStereoMSAParameters(bool bStereoEnable, const NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_PARAMS &msaparams); - virtual bool setFlushMode(); - virtual void clearFlushMode(unsigned headMask, bool testMode=false); + bool setFlushMode(); + void clearFlushMode(unsigned headMask, bool testMode=false); virtual bool dscCrcTransaction(NvBool bEnable, gpuDscCrc *data, NvU16 *headIndex); diff --git a/src/common/displayport/inc/dp_hostimp.h b/src/common/displayport/inc/dp_hostimp.h index aa96fabda3..847f21fd1e 100644 --- a/src/common/displayport/inc/dp_hostimp.h +++ b/src/common/displayport/inc/dp_hostimp.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -32,12 +32,14 @@ #include "nvtypes.h" #include "dp_tracing.h" +#include "dp_printf.h" extern "C" void * dpMalloc(NvLength size); extern "C" void dpFree(void * ptr); extern "C" void dpDebugBreakpoint(); // Note: dpPrint() implementations are expected to append a newline themselves. extern "C" void dpPrint(const char * formatter, ...); +extern "C" void dpPrintf(DP_LOG_LEVEL severity, const char * formatter, ...); extern "C" void dpTraceEvent(NV_DP_TRACING_EVENT event, NV_DP_TRACING_PRIORITY priority, NvU32 numArgs, ...); diff --git a/src/common/displayport/inc/dp_internal.h b/src/common/displayport/inc/dp_internal.h index e233a7555e..571e90076a 100644 --- a/src/common/displayport/inc/dp_internal.h +++ b/src/common/displayport/inc/dp_internal.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -108,13 +108,6 @@ template void dp_used(const T & /*x*/) {} // #if NV_DP_ASSERT_ENABLED -#define DP_LOG(x) \ - do \ - { \ - dpPrint x; \ - addDpLogRecord x; \ - }while (false) - #define DP_ASSERT(x) \ if (!(x)) \ { \ @@ -123,9 +116,6 @@ template void dp_used(const T & /*x*/) {} dpDebugBreakpoint(); \ } #else - -#define DP_LOG(x) - #define DP_ASSERT(x) \ { \ DP_USED(x); \ diff --git a/src/common/displayport/inc/dp_linkconfig.h b/src/common/displayport/inc/dp_linkconfig.h index 3204b00f0e..f5a13c1295 100644 --- a/src/common/displayport/inc/dp_linkconfig.h +++ b/src/common/displayport/inc/dp_linkconfig.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2010-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2010-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -303,7 +303,6 @@ namespace DisplayPort void enableFEC(bool setFEC) { bEnableFEC = setFEC; - // If FEC is enabled, update minRate with FEC+downspread overhead. minRate = linkOverhead(peakRate); } @@ -567,5 +566,11 @@ namespace DisplayPort } } }; + +#define IS_DP2X_UHBR_LINK_DATA_RATE(val) (((NvU32)(val) == UHBR_2_50GHZ) || \ + ((NvU32)(val) == UHBR_2_70GHZ) || \ + ((NvU32)(val) == UHBR_10_0GHZ) || \ + ((NvU32)(val) == UHBR_13_5GHZ) || \ + ((NvU32)(val) == UHBR_20_0GHZ)) } #endif //INCLUDED_DP_LINKCONFIG_H diff --git a/src/common/displayport/inc/dp_mainlink.h b/src/common/displayport/inc/dp_mainlink.h index 0db0809834..da72d57241 100644 --- a/src/common/displayport/inc/dp_mainlink.h +++ b/src/common/displayport/inc/dp_mainlink.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -141,6 +141,9 @@ namespace DisplayPort // Return if Internal panel is Dynamic Mux capable virtual bool isInternalPanelDynamicMuxCapable() = 0; + // Return if MDM is enabled on internal panel + virtual bool isMDMEnabled() = 0; + // Check if we should skip power down eDP when head detached. virtual bool skipPowerdownEdpPanelWhenHeadDetach() = 0; diff --git a/src/common/displayport/inc/dp_printf.h b/src/common/displayport/inc/dp_printf.h new file mode 100644 index 0000000000..be39a57104 --- /dev/null +++ b/src/common/displayport/inc/dp_printf.h @@ -0,0 +1,52 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/******************************* DisplayPort *******************************\ +* * +* Module: dp_printf.h * +* * +\***************************************************************************/ + +#ifndef INCLUDED_DP_PRINTF_H +#define INCLUDED_DP_PRINTF_H + +#define DPLIB_LOG_BUFFER_SIZE 512 + +typedef enum +{ + DP_SILENT, + DP_INFO, + DP_NOTICE, + DP_WARNING, + DP_ERROR, + DP_HW_ERROR, + DP_FATAL, +} DP_LOG_LEVEL; + +#if defined(_DEBUG) || defined(DEBUG) +#define DP_PRINTF(severity, format, ...) dpPrintf(severity, format, ##__VA_ARGS__) +#else +#define DP_PRINTF(severity, format, ...) +#endif // _DEBUG || DEBUG + +#endif // INCLUDED_DP_PRINTF_H diff --git a/src/common/displayport/inc/dp_regkeydatabase.h b/src/common/displayport/inc/dp_regkeydatabase.h index 866bbb5fb7..d837fe75ca 100644 --- a/src/common/displayport/inc/dp_regkeydatabase.h +++ b/src/common/displayport/inc/dp_regkeydatabase.h @@ -34,7 +34,6 @@ #include "dp_auxdefs.h" // Regkey Names -#define NV_DP_REGKEY_ENABLE_AUDIO_BEYOND_48K "ENABLE_AUDIO_BEYOND48K" #define NV_DP_REGKEY_OVERRIDE_DPCD_REV "OVERRIDE_DPCD_REV" #define NV_DP_REGKEY_DISABLE_SSC "DISABLE_SSC" #define NV_DP_REGKEY_ENABLE_FAST_LINK_TRAINING "ENABLE_FAST_LINK_TRAINING" @@ -84,6 +83,7 @@ // #define NV_DP_REGKEY_FORCE_DSC_ON_SINK "DP_FORCE_DSC_ON_SINK" #define NV_DP_REGKEY_ENABLE_SKIP_DPCD_READS_WAR "DP_BUG_4478047_WAR" +#define NV_DP_REGKEY_DISABLE_TUNNEL_BW_ALLOCATION "DP_DISABLE_TUNNEL_BW_ALLOCATION" // // Data Base used to store all the regkey values. @@ -96,7 +96,6 @@ struct DP_REGKEY_DATABASE { bool bInitialized; // set to true after the first EvoMainLink instance is constructed // Below are regkey values - bool bAudioBeyond48kEnabled; NvU32 dpcdRevOveride; bool bSscDisabled; bool bFastLinkTrainingEnabled; @@ -121,7 +120,10 @@ struct DP_REGKEY_DATABASE bool bMSTPCONCapsReadDisabled; bool bForceDscOnSink; bool bSkipFakeDeviceDpcdAccess; + bool bForceDisableTunnelBwAllocation; }; +extern struct DP_REGKEY_DATABASE dpRegkeyDatabase; + #endif //INCLUDED_DP_REGKEYDATABASE_H diff --git a/src/common/displayport/src/dp_auxretry.cpp b/src/common/displayport/src/dp_auxretry.cpp index bcc214352a..79bb131df9 100644 --- a/src/common/displayport/src/dp_auxretry.cpp +++ b/src/common/displayport/src/dp_auxretry.cpp @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -31,6 +31,7 @@ #include "dp_auxbus.h" #include "dp_auxretry.h" #include "dp_messageheader.h" +#include "dp_printf.h" #include "displayport.h" @@ -289,12 +290,12 @@ AuxBus::status AuxLogger::transaction(Action action, Type type, int address, if (header.isTransactionStart && action==write && len > header.headerSizeBits/8) name = getRequestId(buffer[header.headerSizeBits/8]); - DP_LOG(("DP-AUX> %s%s%s%s%04Xh hint(to:%s %s%s %s #%d) { %s| %s}", - sizeRequested == *sizeCompleted ? "" : "INCOMPLETE ", getStatus(result), - getAction(action), getType(type), address, - header.address.toString(sb), header.isTransactionStart ? "S" : "", - header.isTransactionEnd ? "E" : "", name, header.messageNumber, - hex, hex_body)); + DP_PRINTF(DP_NOTICE, "DP-AUX> %s%s%s%s%04Xh hint(to:%s %s%s %s #%d) { %s| %s}", + sizeRequested == *sizeCompleted ? "" : "INCOMPLETE ", getStatus(result), + getAction(action), getType(type), address, + header.address.toString(sb), header.isTransactionStart ? "S" : "", + header.isTransactionEnd ? "E" : "", name, header.messageNumber, + hex, hex_body); #endif return result; } @@ -303,8 +304,8 @@ AuxBus::status AuxLogger::transaction(Action action, Type type, int address, hex[0] = 0; dpHexDump(&hex[0], sizeof(hex), buffer, *sizeCompleted); - DP_LOG(("DP-AUX> %s%s%s%s%04Xh { %s }", sizeRequested == *sizeCompleted ? "" : "INCOMPLETE ", - getStatus(result), getAction(action), getType(type), address, hex)); + DP_PRINTF(DP_NOTICE, "DP-AUX> %s%s%s%s%04Xh { %s }", sizeRequested == *sizeCompleted ? "" : "INCOMPLETE ", + getStatus(result), getAction(action), getType(type), address, hex); return result; } diff --git a/src/common/displayport/src/dp_configcaps.cpp b/src/common/displayport/src/dp_configcaps.cpp index 125b9c20ce..2dd29298c5 100644 --- a/src/common/displayport/src/dp_configcaps.cpp +++ b/src/common/displayport/src/dp_configcaps.cpp @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -31,3280 +31,2878 @@ #include "dp_auxbus.h" #include "dp_configcaps.h" #include "dp_auxdefs.h" +#include "dp_printf.h" #include "displayport.h" using namespace DisplayPort; -struct DPCDHALImpl : DPCDHAL +void DPCDHALImpl::updateDPCDOffline() { - AuxRetry bus; - Timer * timer; - bool dpcdOffline; - bool bGrantsPostLtRequest; - bool pc2Disabled; - bool uprequestEnable; - bool upstreamIsSource; - bool bMultistream; - bool bGpuFECSupported; - bool bLttprSupported; - bool bBypassILREdpRevCheck; - NvU32 overrideDpcdMaxLinkRate; - NvU32 overrideDpcdRev; - NvU32 overrideDpcdMaxLaneCount; - - NvU32 gpuDPSupportedVersions; - - struct _LegacyPort: public LegacyPort + NvU8 buffer[16]; + unsigned retries = 16; + // Burst read from 0x00 to 0x0F. + if (AuxRetry::ack != bus.read(NV_DPCD_REV, &buffer[0], sizeof buffer, retries)) { - DwnStreamPortType type; - DwnStreamPortAttribute nonEDID; - - NvU64 maxTmdsClkRate; - - DwnStreamPortType getDownstreamPortType() - { - return type; - } - - DwnStreamPortAttribute getDownstreamNonEDIDPortAttribute() - { - return nonEDID; - } - - NvU64 getMaxTmdsClkRate() - { - return maxTmdsClkRate; - } - - } legacyPort[16]; - - struct + dpcdOffline = true; + } + else { - unsigned revisionMajor, revisionMinor; // DPCD offset 0 - bool supportsESI; - LinkRate maxLinkRate; // DPCD offset 1 - unsigned maxLaneCount; // DPCD offset 2 - unsigned maxLanesAtHBR; - unsigned maxLanesAtRBR; - bool enhancedFraming; - bool bPostLtAdjustmentSupport; - - bool supportsNoHandshakeTraining; - bool bSupportsTPS4; - unsigned NORP; // DPCD offset 4 - - bool detailedCapInfo; // DPCD offset 5 - bool downStreamPortPresent; - NvU8 downStreamPortType; - - unsigned downStreamPortCount; // DPCD offset 7 - bool ouiSupported; - bool msaTimingParIgnored; - - NvU16 linkRateTable[NV_DPCD_SUPPORTED_LINK_RATES__SIZE]; // DPCD offset 10 ~ 1F - - bool supportsMultistream; // DPCD offset 21 - unsigned numberAudioEndpoints; // DPCD offset 22 - bool overrideToSST; // force to SST even if MST capable - bool noLinkTraining; // DPCD offset 330h - - bool extendedRxCapsPresent; // DPCD offset 000Eh [7] - Extended Receiver Capability present - - // DPCD Offset 2211h; - unsigned extendedSleepWakeTimeoutRequestMs; - // DPCD Offset 0119h [0] - If we grant the extendedSleepWakeTimeoutRequest - bool bExtendedSleepWakeTimeoutGranted; - - bool bFECSupported; - - // DPCD Offset F0002h - Number of Physical Repeaters present (after mapping) between Source and Sink - unsigned phyRepeaterCount; - // DPCD offset 700 - EDP_DPCD_REV - unsigned eDpRevision; - - struct - { - unsigned revisionMajor, revisionMinor; // DPCD offset F0000h - LinkRate maxLinkRate; // DPCD offset F0001h - unsigned maxLaneCount; // DPCD offset F0004h - unsigned phyRepeaterExtendedWakeTimeoutMs; // DPCD offset F0005h - // The array to keep track of FEC capability of each LTTPR - bool bFECSupportedRepeater[NV_DPCD14_PHY_REPEATER_CNT_MAX]; - // If all the LTTPRs supports FEC - bool bFECSupported; - } repeaterCaps; - - PCONCaps pconCaps; - vesaPsrSinkCaps psrCaps; - NvU32 videoFallbackFormats; // DPCD offset 0200h - - } caps; - - struct - { - unsigned sinkCount; // DPCD offset 200 - bool automatedTestRequest; - bool cpIRQ; - bool mccsIRQ; - bool downRepMsgRdy; - bool upReqMsgRdy; - bool prErrorStatus; // DPCD offset 2004h[3] - bool rxCapChanged; // DPCD offset 2005 - bool linkStatusChanged; // DPCD offset 2005 - bool streamStatusChanged; // DPCD offset 2005 - bool hdmiLinkStatusChanged; // DPCD offset 2005 - NvU8 eightyBitCustomPat[10]; // DPCD offset 250 - 259 - - struct - { - struct - { - bool clockRecoveryDone; - bool channelEqualizationDone; - bool symbolLocked; - } laneStatus[4]; // DPCD offset 202, 203 - - bool interlaneAlignDone; // DPCD offset 204 - bool downstmPortChng; - bool linkStatusUpdated; - - // - // (ESI specific) signifies that we have link trained and should - // update the link status in the next query to isLinkLost. Keep in - // mind that linkStatusChanged might still be zero. - // - bool linkStatusDirtied; - } laneStatusIntr; + dpcdOffline = false; + } +} - struct - { - bool testRequestTraining; // DPCD offset 218 - LinkRate testRequestLinkRate; // DPCD offset 219 - unsigned testRequestLaneCount; // DPCD offset 220 - } testTraining; +void DPCDHALImpl::parseAndReadCaps() +{ + NvU8 buffer[16]; + NvU8 byte = 0; + AuxRetry::status status; + unsigned retries = 16; - struct - { - bool testRequestEdidRead; // DPCD offset 218 - } testEdid; + NvU8 lttprIdx = 0; - struct - { - bool testRequestPattern; // DPCD offset 218 - TestPatternType testPatRequested; // DPCD offset 221 - NvU16 testHorTotalPixels; // DPCD offset 222, 223 - NvU16 testVerTotalLines; // DPCD offset 224, 225 - NvU16 testHorStartPixels; // DPCD offset 226, 227 - NvU16 testVerStartLines; // DPCD offset 228, 229 - NvU16 testHsyncWidthPixels; // DPCD offset 22A, 22B - bool testHsyncPolarity; - NvU16 testVsyncWidthLines; // DPCD offset 22C, 22D - bool testVsyncPolarity; - NvU16 testActiveWidthPixels; // DPCD offset 22E, 22F - NvU16 testActiveHeightLines; // DPCD offset 230, 231 - } testPattern; - - struct - { - bool testRequestPhyCompliance; // DPCD offset 218 - LinkQualityPatternType phyTestPattern; // DPCD offset 248 - } testPhyCompliance; - - } interrupts; - - bool bIndexedLinkrateCapable, bIndexedLinkrateEnabled; - - public: - DPCDHALImpl(AuxBus * bus, Timer * timer) - : bus(bus), - timer(timer), - bGrantsPostLtRequest(false), - uprequestEnable(false), - upstreamIsSource(false), - bMultistream(false), - bGpuFECSupported(false), - bBypassILREdpRevCheck(false), - overrideDpcdMaxLinkRate(0), - overrideDpcdRev(0), - gpuDPSupportedVersions(0) - { - // start with default caps. - populateFakeDpcd(); - } + caps.phyRepeaterCount = 0; - ~DPCDHALImpl() - { - } + // Burst read from 0x00 to 0x0F. - virtual void setAuxBus(AuxBus * bus) + // + // The Extended Receiver Capability field at DPCD Addresses 02200h through 022FFh is valid + // with DPCD Rev. 1.4 (and higher). + // + // A DPRX that supports the Extended Receiver Capability field must set the + // EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT bit in the TRAINING_AUX_RD_INTERVAL + // register (DPCD Address 0000Eh, bit 7) to 1 + // + caps.extendedRxCapsPresent = false; + if (AuxRetry::ack == bus.read(NV_DPCD_TRAINING_AUX_RD_INTERVAL, &byte, sizeof byte)) { - this->bus = bus; + caps.extendedRxCapsPresent = DRF_VAL(_DPCD14, _TRAINING_AUX_RD_INTERVAL, _EXTENDED_RX_CAP, byte); } - bool isDpcdOffline() + if (caps.extendedRxCapsPresent) { - return dpcdOffline; + status = bus.read(NV_DPCD14_EXTENDED_REV, &buffer[0], sizeof buffer, retries); } - - void setDPCDOffline(bool bOffline) + else { - dpcdOffline = bOffline; + status = bus.read(NV_DPCD_REV, &buffer[0], sizeof buffer, retries); } - void updateDPCDOffline() + if (AuxRetry::ack != status) { - NvU8 buffer[16]; - unsigned retries = 16; - // Burst read from 0x00 to 0x0F. - if (AuxRetry::ack != bus.read(NV_DPCD_REV, &buffer[0], sizeof buffer, retries)) - { - dpcdOffline = true; - } - else - { - dpcdOffline = false; - } + // Failed to read caps. + // Set an invalid state here and make sure we REMEMBER we couldn't get the caps + caps.revisionMajor = 0; + dpcdOffline = true; + return; } - void setPC2Disabled(bool disabled) - { - pc2Disabled = disabled; - } + // reset the faked dpcd flag since real LT should be possible now. + dpcdOffline = false; - void setLttprSupported(bool isLttprSupported) - { - bLttprSupported = isLttprSupported; - } + // reset edp revision to 0 + caps.eDpRevision = 0; - bool isPC2Disabled() + if (overrideDpcdRev) { - return pc2Disabled; + // Override the revision no. as DPCD override regkey is set + caps.revisionMajor = DRF_VAL(_DPCD, _REV, _MAJOR, overrideDpcdRev); + caps.revisionMinor = DRF_VAL(_DPCD, _REV, _MINOR, overrideDpcdRev); } - void parseAndReadCaps() + else { - NvU8 buffer[16]; - NvU8 byte = 0; - AuxRetry::status status; - unsigned retries = 16; - - NvU8 lttprIdx = 0; - - caps.phyRepeaterCount = 0; - - // Burst read from 0x00 to 0x0F. - - // - // The Extended Receiver Capability field at DPCD Addresses 02200h through 022FFh is valid - // with DPCD Rev. 1.4 (and higher). - // - // A DPRX that supports the Extended Receiver Capability field must set the - // EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT bit in the TRAINING_AUX_RD_INTERVAL - // register (DPCD Address 0000Eh, bit 7) to 1 - // - caps.extendedRxCapsPresent = false; - if (AuxRetry::ack == bus.read(NV_DPCD_TRAINING_AUX_RD_INTERVAL, &byte, sizeof byte)) - { - caps.extendedRxCapsPresent = DRF_VAL(_DPCD14, _TRAINING_AUX_RD_INTERVAL, _EXTENDED_RX_CAP, byte); - } - - if (caps.extendedRxCapsPresent) - { - status = bus.read(NV_DPCD14_EXTENDED_REV, &buffer[0], sizeof buffer, retries); - } - else - { - status = bus.read(NV_DPCD_REV, &buffer[0], sizeof buffer, retries); - } - - if (AuxRetry::ack != status) - { - // Failed to read caps. - // Set an invalid state here and make sure we REMEMBER we couldn't get the caps - caps.revisionMajor = 0; - dpcdOffline = true; - return; - } - - // reset the faked dpcd flag since real LT should be possible now. - dpcdOffline = false; - - // reset edp revision to 0 - caps.eDpRevision = 0; - - if (overrideDpcdRev) + caps.revisionMajor = DRF_VAL(_DPCD, _REV, _MAJOR, buffer[0]); + caps.revisionMinor = DRF_VAL(_DPCD, _REV, _MINOR, buffer[0]); + if (isAtLeastVersion(1, 2)) { - // Override the revision no. as DPCD override regkey is set - caps.revisionMajor = DRF_VAL(_DPCD, _REV, _MAJOR, overrideDpcdRev); - caps.revisionMinor = DRF_VAL(_DPCD, _REV, _MINOR, overrideDpcdRev); - } - else - { - caps.revisionMajor = DRF_VAL(_DPCD, _REV, _MAJOR, buffer[0]); - caps.revisionMinor = DRF_VAL(_DPCD, _REV, _MINOR, buffer[0]); - if (isAtLeastVersion(1, 2)) + // + // WAR required for panels with MSTAR chip as they report themselves as + // DP1.2 but they don't support DP1.2. Check OUI & ESI sinkCount. if OUI + // is not supported & sinkCount is "0", downgrade the revision to 1.1. + // + if (FLD_TEST_DRF(_DPCD, _DOWN_STREAM_PORT, _OUI_SUPPORT, _NO, buffer[7])) { + // Read the ESI sinkCount & overwrite revision no. if ESI not supported + NvU8 esiBuffer[1] = {0}; + NvU32 sinkCount; + AuxRetry::status status; // - // WAR required for panels with MSTAR chip as they report themselves as - // DP1.2 but they don't support DP1.2. Check OUI & ESI sinkCount. if OUI - // is not supported & sinkCount is "0", downgrade the revision to 1.1. + // Don't just check the transaction status as not-supporting ESI means it may + // NACK a transaction to ESI space or may return "0" as sinkCount. We need + // to override the revision Minor in both cases. // - if (FLD_TEST_DRF(_DPCD, _DOWN_STREAM_PORT, _OUI_SUPPORT, _NO, buffer[7])) - { - // Read the ESI sinkCount & overwrite revision no. if ESI not supported - NvU8 esiBuffer[1] = {0}; - NvU32 sinkCount; - AuxRetry::status status; - // - // Don't just check the transaction status as not-supporting ESI means it may - // NACK a transaction to ESI space or may return "0" as sinkCount. We need - // to override the revision Minor in both cases. - // - status = bus.read(NV_DPCD_SINK_COUNT_ESI, &esiBuffer[0], sizeof esiBuffer); - sinkCount = DRF_VAL(_DPCD, _SINK_COUNT_ESI, _SINK_COUNT, esiBuffer[0]); - - if ((sinkCount == 0) || (status != AuxRetry::ack)) - { - // If ESI not supported then overwrite the revision - caps.revisionMajor = 1; - caps.revisionMinor = 1; - } - } + status = bus.read(NV_DPCD_SINK_COUNT_ESI, &esiBuffer[0], sizeof esiBuffer); + sinkCount = DRF_VAL(_DPCD, _SINK_COUNT_ESI, _SINK_COUNT, esiBuffer[0]); - // Check if DPCD_DISPLAY_CONTROL_CAPABLE = 1 - if (FLD_TEST_DRF(_DPCD, _EDP_CONFIG_CAP, _DISPLAY_CONTROL_CAPABLE, _YES, buffer[0x0D])) + if ((sinkCount == 0) || (status != AuxRetry::ack)) { - NvU8 edpBuffer[1] = {0}; - status = bus.read(NV_DPCD_EDP_REV, &edpBuffer[0], sizeof edpBuffer); - caps.eDpRevision = DRF_VAL(_DPCD, _EDP, _REV_VAL, edpBuffer[0]); + // If ESI not supported then overwrite the revision + caps.revisionMajor = 1; + caps.revisionMinor = 1; } } + + // Check if DPCD_DISPLAY_CONTROL_CAPABLE = 1 + if (FLD_TEST_DRF(_DPCD, _EDP_CONFIG_CAP, _DISPLAY_CONTROL_CAPABLE, _YES, buffer[0x0D])) + { + NvU8 edpBuffer[1] = {0}; + status = bus.read(NV_DPCD_EDP_REV, &edpBuffer[0], sizeof edpBuffer); + caps.eDpRevision = DRF_VAL(_DPCD, _EDP, _REV_VAL, edpBuffer[0]); + } } + } - bIndexedLinkrateCapable = false; + bIndexedLinkrateCapable = false; - if (isAtLeastVersion(1,4) && caps.extendedRxCapsPresent == false) - { - DP_ASSERT(0 && "A DPRX with DPCD Rev. 1.4 (or higher) must have Extended Receiver Capability field."); - } - // Support ESI register space only when GPU support DP1.2MST - caps.supportsESI = (isAtLeastVersion(1,2) && - FLD_TEST_DRF(0073_CTRL_CMD_DP, _GET_CAPS_DP_VERSIONS_SUPPORTED, _DP1_2, _YES, gpuDPSupportedVersions)); + if (isAtLeastVersion(1,4) && caps.extendedRxCapsPresent == false) + { + DP_ASSERT(0 && "A DPRX with DPCD Rev. 1.4 (or higher) must have Extended Receiver Capability field."); + } + // Support ESI register space only when GPU support DP1.2MST + caps.supportsESI = (isAtLeastVersion(1,2) && + FLD_TEST_DRF(0073_CTRL_CMD_DP, _GET_CAPS_DP_VERSIONS_SUPPORTED, _DP1_2, _YES, gpuDPSupportedVersions)); - if (caps.eDpRevision >= NV_DPCD_EDP_REV_VAL_1_4 || this->bBypassILREdpRevCheck) + if (caps.eDpRevision >= NV_DPCD_EDP_REV_VAL_1_4 || this->bBypassILREdpRevCheck) + { + NvU16 linkRate = 0; + if (getRawLinkRateTable((NvU8*)&caps.linkRateTable[0])) { - NvU16 linkRate = 0; - if (getRawLinkRateTable((NvU8*)&caps.linkRateTable[0])) + // First entry must be non-zero for validation + if (caps.linkRateTable[0] != 0) { - // First entry must be non-zero for validation - if (caps.linkRateTable[0] != 0) + bIndexedLinkrateCapable = true; + for (int i = 0; (i < NV_DPCD_SUPPORTED_LINK_RATES__SIZE) && caps.linkRateTable[i]; i++) { - bIndexedLinkrateCapable = true; - for (int i = 0; (i < NV_DPCD_SUPPORTED_LINK_RATES__SIZE) && caps.linkRateTable[i]; i++) - { - if (linkRate < caps.linkRateTable[i]) - linkRate = caps.linkRateTable[i]; - } - if (linkRate) - caps.maxLinkRate = LINK_RATE_KHZ_TO_MBPS((NvU64)linkRate * DP_LINK_RATE_TABLE_MULTIPLIER_KHZ); + if (linkRate < caps.linkRateTable[i]) + linkRate = caps.linkRateTable[i]; } + if (linkRate) + caps.maxLinkRate = LINK_RATE_KHZ_TO_MBPS((NvU64)linkRate * DP_LINK_RATE_TABLE_MULTIPLIER_KHZ); } } - if (!bIndexedLinkrateCapable) - { - if (FLD_TEST_DRF(_DPCD, _MAX_LINK_BANDWIDTH, _VAL, _1_62_GBPS, buffer[1])) - caps.maxLinkRate = RBR; - else if (FLD_TEST_DRF(_DPCD, _MAX_LINK_BANDWIDTH, _VAL, _2_70_GBPS, buffer[1])) - caps.maxLinkRate = HBR; - else if (FLD_TEST_DRF(_DPCD, _MAX_LINK_BANDWIDTH, _VAL, _5_40_GBPS, buffer[1])) - caps.maxLinkRate = HBR2; - else if (FLD_TEST_DRF(_DPCD14, _MAX_LINK_BANDWIDTH, _VAL, _8_10_GBPS, buffer[1])) - caps.maxLinkRate = HBR3; - else - { - DP_ASSERT(0 && "Unknown max link rate. Assuming DP 1.1 defaults"); - caps.maxLinkRate = HBR; - } - } - - // - // To prevent WAR being overridden. - // - if (overrideDpcdMaxLaneCount) - { - caps.maxLaneCount = overrideDpcdMaxLaneCount; - } + } + if (!bIndexedLinkrateCapable) + { + if (FLD_TEST_DRF(_DPCD, _MAX_LINK_BANDWIDTH, _VAL, _1_62_GBPS, buffer[1])) + caps.maxLinkRate = RBR; + else if (FLD_TEST_DRF(_DPCD, _MAX_LINK_BANDWIDTH, _VAL, _2_70_GBPS, buffer[1])) + caps.maxLinkRate = HBR; + else if (FLD_TEST_DRF(_DPCD, _MAX_LINK_BANDWIDTH, _VAL, _5_40_GBPS, buffer[1])) + caps.maxLinkRate = HBR2; + else if (FLD_TEST_DRF(_DPCD14, _MAX_LINK_BANDWIDTH, _VAL, _8_10_GBPS, buffer[1])) + caps.maxLinkRate = HBR3; else { - caps.maxLaneCount = DRF_VAL(_DPCD, _MAX_LANE_COUNT, _LANE, buffer[0x2]); + DP_ASSERT(0 && "Unknown max link rate. Assuming DP 1.1 defaults"); + caps.maxLinkRate = HBR; } + } - if (!IS_VALID_LANECOUNT(caps.maxLaneCount)) - { - DP_ASSERT(0 && "Invalid lane count. Assuming 1"); - caps.maxLaneCount = 1; - } + // + // To prevent WAR being overridden. + // + if (overrideDpcdMaxLaneCount) + { + caps.maxLaneCount = overrideDpcdMaxLaneCount; + } + else + { + caps.maxLaneCount = DRF_VAL(_DPCD, _MAX_LANE_COUNT, _LANE, buffer[0x2]); + } - caps.bPostLtAdjustmentSupport = FLD_TEST_DRF(_DPCD, _MAX_LANE_COUNT, _POST_LT_ADJ_REQ_SUPPORT, _YES, buffer[0x2]); - caps.enhancedFraming = FLD_TEST_DRF(_DPCD, _MAX_LANE_COUNT, _ENHANCED_FRAMING, _YES, buffer[0x2]); - if (isAtLeastVersion(1,1) && (!caps.enhancedFraming)) - { - DP_ASSERT(0 && "A DPRX with DPCD Rev. 1.1 (or higher) must have enhanced framing capability."); - } + if (!IS_VALID_LANECOUNT(caps.maxLaneCount)) + { + DP_ASSERT(0 && "Invalid lane count. Assuming 1"); + caps.maxLaneCount = 1; + } - if (isAtLeastVersion(1,2) && - FLD_TEST_DRF(0073_CTRL_CMD_DP, _GET_CAPS_DP_VERSIONS_SUPPORTED, _DP1_2, _YES, gpuDPSupportedVersions) && - caps.bPostLtAdjustmentSupport) - { - // Source grants post Link training adjustment support - bGrantsPostLtRequest = true; - } - else - { - // Disable post Link training adjustment support whenever sink does not report capability - // This covers the case of MST to SST transition during which initially this flag is set, we need to explicitly reset this - // in order to avoid PostLTAdjustment during LT. - bGrantsPostLtRequest = false; - } + caps.bPostLtAdjustmentSupport = FLD_TEST_DRF(_DPCD, _MAX_LANE_COUNT, _POST_LT_ADJ_REQ_SUPPORT, _YES, buffer[0x2]); + caps.enhancedFraming = FLD_TEST_DRF(_DPCD, _MAX_LANE_COUNT, _ENHANCED_FRAMING, _YES, buffer[0x2]); + if (isAtLeastVersion(1,1) && (!caps.enhancedFraming)) + { + DP_ASSERT(0 && "A DPRX with DPCD Rev. 1.1 (or higher) must have enhanced framing capability."); + } + + if (isAtLeastVersion(1,2) && + FLD_TEST_DRF(0073_CTRL_CMD_DP, _GET_CAPS_DP_VERSIONS_SUPPORTED, _DP1_2, _YES, gpuDPSupportedVersions) && + caps.bPostLtAdjustmentSupport) + { + // Source grants post Link training adjustment support + bGrantsPostLtRequest = true; + } + else + { + // Disable post Link training adjustment support whenever sink does not report capability + // This covers the case of MST to SST transition during which initially this flag is set, we need to explicitly reset this + // in order to avoid PostLTAdjustment during LT. + bGrantsPostLtRequest = false; + } - caps.supportsNoHandshakeTraining = FLD_TEST_DRF(_DPCD, _MAX_DOWNSPREAD, _NO_AUX_HANDSHAKE_LT, _TRUE, buffer[0x3]); - caps.bSupportsTPS4 = FLD_TEST_DRF(_DPCD14, _MAX_DOWNSPREAD, _TPS4_SUPPORTED, _YES, buffer[0x3]); + caps.supportsNoHandshakeTraining = FLD_TEST_DRF(_DPCD, _MAX_DOWNSPREAD, _NO_AUX_HANDSHAKE_LT, _TRUE, buffer[0x3]); + caps.bSupportsTPS4 = FLD_TEST_DRF(_DPCD14, _MAX_DOWNSPREAD, _TPS4_SUPPORTED, _YES, buffer[0x3]); - caps.NORP = DRF_VAL(_DPCD, _NORP, _VAL, buffer[0x4]) + 1; + caps.NORP = DRF_VAL(_DPCD, _NORP, _VAL, buffer[0x4]) + 1; - caps.downStreamPortPresent = FLD_TEST_DRF(_DPCD, _DOWNSTREAMPORT, _PRESENT, _YES, buffer[0x5]); - caps.detailedCapInfo = FLD_TEST_DRF(_DPCD, _DOWNSTREAMPORT, _DETAILED_CAP_INFO_AVAILABLE, _YES, buffer[0x5]); - caps.downStreamPortType = DRF_VAL(_DPCD, _DOWNSTREAMPORT, _TYPE, buffer[0x5]); + caps.downStreamPortPresent = FLD_TEST_DRF(_DPCD, _DOWNSTREAMPORT, _PRESENT, _YES, buffer[0x5]); + caps.detailedCapInfo = FLD_TEST_DRF(_DPCD, _DOWNSTREAMPORT, _DETAILED_CAP_INFO_AVAILABLE, _YES, buffer[0x5]); + caps.downStreamPortType = DRF_VAL(_DPCD, _DOWNSTREAMPORT, _TYPE, buffer[0x5]); - switch (DRF_VAL(_DPCD, _DOWNSTREAMPORT, _TYPE, buffer[0x5])) - { - case 0: legacyPort[0].type = DISPLAY_PORT; break; - case 1: legacyPort[0].type = ANALOG_VGA; break; - case 2: legacyPort[0].type = DVI; break; - case 3: legacyPort[0].type = WITHOUT_EDID; break; - default: DP_ASSERT(0 && "Unknown port type"); break; - } + switch (DRF_VAL(_DPCD, _DOWNSTREAMPORT, _TYPE, buffer[0x5])) + { + case 0: legacyPort[0].type = DISPLAY_PORT; break; + case 1: legacyPort[0].type = ANALOG_VGA; break; + case 2: legacyPort[0].type = DVI; break; + case 3: legacyPort[0].type = WITHOUT_EDID; break; + default: DP_ASSERT(0 && "Unknown port type"); break; + } - caps.downStreamPortCount = DRF_VAL(_DPCD, _DOWN_STREAM_PORT, _COUNT, buffer[0x7]); - caps.msaTimingParIgnored = FLD_TEST_DRF(_DPCD, _DOWN_STREAM_PORT, _MSA_TIMING_PAR_IGNORED, _YES, buffer[0x7]); - caps.ouiSupported = FLD_TEST_DRF(_DPCD, _DOWN_STREAM_PORT, _OUI_SUPPORT, _YES, buffer[0x7]); + caps.downStreamPortCount = DRF_VAL(_DPCD, _DOWN_STREAM_PORT, _COUNT, buffer[0x7]); + caps.msaTimingParIgnored = FLD_TEST_DRF(_DPCD, _DOWN_STREAM_PORT, _MSA_TIMING_PAR_IGNORED, _YES, buffer[0x7]); + caps.ouiSupported = FLD_TEST_DRF(_DPCD, _DOWN_STREAM_PORT, _OUI_SUPPORT, _YES, buffer[0x7]); - if (caps.downStreamPortPresent && !caps.downStreamPortCount) - { - DP_LOG(("DPHAL> Non-compliant device, reporting downstream port present, but no downstream ports. Overriding port count to 1.")); - caps.downStreamPortCount = 1; - } + if (caps.downStreamPortPresent && !caps.downStreamPortCount) + { + DP_PRINTF(DP_WARNING, "DPHAL> Non-compliant device, reporting downstream port present, but no downstream ports. Overriding port count to 1."); + caps.downStreamPortCount = 1; + } - // Burst read from 0x20 to 0x22. - bus.read(NV_DPCD_SINK_VIDEO_FALLBACK_FORMATS, &buffer[0], 0x22 - 0x20 + 1); + // Burst read from 0x20 to 0x22. + bus.read(NV_DPCD_SINK_VIDEO_FALLBACK_FORMATS, &buffer[0], 0x22 - 0x20 + 1); - caps.videoFallbackFormats = buffer[0]; + caps.videoFallbackFormats = buffer[0]; - caps.supportsMultistream = FLD_TEST_DRF(_DPCD, _MSTM, _CAP, _YES, buffer[0x1]); + caps.supportsMultistream = FLD_TEST_DRF(_DPCD, _MSTM, _CAP, _YES, buffer[0x1]); - caps.numberAudioEndpoints = (unsigned)(DRF_VAL(_DPCD, _NUMBER_OF_AUDIO_ENDPOINTS, _VALUE, buffer[0x2])); + caps.numberAudioEndpoints = (unsigned)(DRF_VAL(_DPCD, _NUMBER_OF_AUDIO_ENDPOINTS, _VALUE, buffer[0x2])); - if (bLttprSupported) + if (bLttprSupported) + { + // Burst read from 0xF0000 to 0xF0007 + if (AuxRetry::ack == bus.read(NV_DPCD14_LT_TUNABLE_PHY_REPEATER_REV, &buffer[0], 0x8, retries)) { - // Burst read from 0xF0000 to 0xF0007 - if (AuxRetry::ack == bus.read(NV_DPCD14_LT_TUNABLE_PHY_REPEATER_REV, &buffer[0], 0x8, retries)) + caps.repeaterCaps.revisionMinor = DRF_VAL(_DPCD14, _LT_TUNABLE_PHY_REPEATER_REV, _MINOR, buffer[0x0]); + caps.repeaterCaps.revisionMajor = DRF_VAL(_DPCD14, _LT_TUNABLE_PHY_REPEATER_REV, _MAJOR, buffer[0x0]); + + if (lttprIsAtLeastVersion(1, 4)) { - caps.repeaterCaps.revisionMinor = DRF_VAL(_DPCD14, _LT_TUNABLE_PHY_REPEATER_REV, _MINOR, buffer[0x0]); - caps.repeaterCaps.revisionMajor = DRF_VAL(_DPCD14, _LT_TUNABLE_PHY_REPEATER_REV, _MAJOR, buffer[0x0]); + caps.phyRepeaterCount = mapPhyRepeaterVal(DRF_VAL(_DPCD14, _PHY_REPEATER_CNT, _VAL, buffer[0x2])); - if (lttprIsAtLeastVersion(1, 4)) + if (caps.phyRepeaterCount != 0) { - caps.phyRepeaterCount = mapPhyRepeaterVal(DRF_VAL(_DPCD14, _PHY_REPEATER_CNT, _VAL, buffer[0x2])); - - if (caps.phyRepeaterCount != 0) + if (FLD_TEST_DRF(_DPCD14, _MAX_LINK_RATE_PHY_REPEATER, _VAL, _1_62_GBPS, buffer[1])) + caps.repeaterCaps.maxLinkRate = RBR; + else if (FLD_TEST_DRF(_DPCD14, _MAX_LINK_RATE_PHY_REPEATER, _VAL, _2_70_GBPS, buffer[1])) + caps.repeaterCaps.maxLinkRate = HBR; + else if (FLD_TEST_DRF(_DPCD14, _MAX_LINK_RATE_PHY_REPEATER, _VAL, _5_40_GBPS, buffer[1])) + caps.repeaterCaps.maxLinkRate = HBR2; + else if (FLD_TEST_DRF(_DPCD14, _MAX_LINK_RATE_PHY_REPEATER, _VAL, _8_10_GBPS, buffer[1])) + caps.repeaterCaps.maxLinkRate = HBR3; + else { - if (FLD_TEST_DRF(_DPCD14, _MAX_LINK_RATE_PHY_REPEATER, _VAL, _1_62_GBPS, buffer[1])) - caps.repeaterCaps.maxLinkRate = RBR; - else if (FLD_TEST_DRF(_DPCD14, _MAX_LINK_RATE_PHY_REPEATER, _VAL, _2_70_GBPS, buffer[1])) - caps.repeaterCaps.maxLinkRate = HBR; - else if (FLD_TEST_DRF(_DPCD14, _MAX_LINK_RATE_PHY_REPEATER, _VAL, _5_40_GBPS, buffer[1])) - caps.repeaterCaps.maxLinkRate = HBR2; - else if (FLD_TEST_DRF(_DPCD14, _MAX_LINK_RATE_PHY_REPEATER, _VAL, _8_10_GBPS, buffer[1])) - caps.repeaterCaps.maxLinkRate = HBR3; - else - { - DP_ASSERT(0 && "Unknown max link rate or HBR2 without at least DP 1.2. Assuming DP 1.1 defaults"); - caps.repeaterCaps.maxLinkRate = HBR; - } + DP_ASSERT(0 && "Unknown max link rate or HBR2 without at least DP 1.2. Assuming DP 1.1 defaults"); + caps.repeaterCaps.maxLinkRate = HBR; + } - caps.repeaterCaps.maxLaneCount = - DRF_VAL(_DPCD14, _MAX_LANE_COUNT_PHY_REPEATER, - _VAL, buffer[0x4]); + caps.repeaterCaps.maxLaneCount = + DRF_VAL(_DPCD14, _MAX_LANE_COUNT_PHY_REPEATER, + _VAL, buffer[0x4]); - // The cumulative number of 10ms. - caps.repeaterCaps.phyRepeaterExtendedWakeTimeoutMs = - DRF_VAL(_DPCD14, - _PHY_REPEATER_EXTENDED_WAKE_TIMEOUT, - _REQ, buffer[0x5]) * 10; + // The cumulative number of 10ms. + caps.repeaterCaps.phyRepeaterExtendedWakeTimeoutMs = + DRF_VAL(_DPCD14, + _PHY_REPEATER_EXTENDED_WAKE_TIMEOUT, + _REQ, buffer[0x5]) * 10; - for (lttprIdx = 0; lttprIdx < caps.phyRepeaterCount; lttprIdx++) + // Set FEC to Capable for repeater by default. + caps.repeaterCaps.bFECSupported = true; + for (lttprIdx = 0; lttprIdx < caps.phyRepeaterCount; lttprIdx++) + { + if (AuxRetry::ack == + bus.read(NV_DPCD14_PHY_REPEATER_FEC_CAP_0(lttprIdx), &byte, 1)) { - caps.repeaterCaps.bFECSupported = true; - if (AuxRetry::ack == - bus.read(NV_DPCD14_PHY_REPEATER_FEC_CAP_0(lttprIdx), &byte, 1)) - { - caps.repeaterCaps.bFECSupportedRepeater[lttprIdx] = - FLD_TEST_DRF(_DPCD14, - _PHY_REPEATER_FEC_CAP_0, - _FEC_CAPABLE, - _YES, - byte); - - // bFECSupported is only true if all LTTPR supports FEC. - caps.repeaterCaps.bFECSupported &= - caps.repeaterCaps.bFECSupportedRepeater[lttprIdx]; - } + caps.repeaterCaps.bFECSupportedRepeater[lttprIdx] = + FLD_TEST_DRF(_DPCD14, + _PHY_REPEATER_FEC_CAP_0, + _FEC_CAPABLE, + _YES, + byte); + + // bFECSupported is only true if all LTTPR supports FEC. + caps.repeaterCaps.bFECSupported &= + caps.repeaterCaps.bFECSupportedRepeater[lttprIdx]; } } - else - { - caps.repeaterCaps.maxLinkRate = 0; - } + } else { - // not supported DP revision, we should not be doing LTTPR training - caps.phyRepeaterCount = 0; caps.repeaterCaps.maxLinkRate = 0; } } - } - - // Check if the device requests extended sleep wake timeout - if (AuxRetry::ack == bus.read(NV_DPCD14_EXTENDED_DPRX_SLEEP_WAKE_TIMEOUT_REQUEST, &buffer[0], 1)) - { - if (buffer[0] == NV_DPCD14_EXTENDED_DPRX_SLEEP_WAKE_TIMEOUT_REQUEST_PERIOD_1MS) - { - caps.extendedSleepWakeTimeoutRequestMs = DP_EXTENDED_DPRX_SLEEP_WAKE_TIMEOUT_DEFAULT_MS; - } else { - caps.extendedSleepWakeTimeoutRequestMs = buffer[0] * 20; + // not supported DP revision, we should not be doing LTTPR training + caps.phyRepeaterCount = 0; + caps.repeaterCaps.maxLinkRate = 0; } } + } + + // Check if the device requests extended sleep wake timeout + if (AuxRetry::ack == bus.read(NV_DPCD14_EXTENDED_DPRX_SLEEP_WAKE_TIMEOUT_REQUEST, &buffer[0], 1)) + { + if (buffer[0] == NV_DPCD14_EXTENDED_DPRX_SLEEP_WAKE_TIMEOUT_REQUEST_PERIOD_1MS) + { + caps.extendedSleepWakeTimeoutRequestMs = DP_EXTENDED_DPRX_SLEEP_WAKE_TIMEOUT_DEFAULT_MS; + } else { - caps.extendedSleepWakeTimeoutRequestMs = 0; + caps.extendedSleepWakeTimeoutRequestMs = buffer[0] * 20; } + } + else + { + caps.extendedSleepWakeTimeoutRequestMs = 0; + } - byte = 0U; - dpMemZero(&caps.psrCaps, sizeof(vesaPsrSinkCaps)); + byte = 0U; + dpMemZero(&caps.psrCaps, sizeof(vesaPsrSinkCaps)); + + status = bus.read(NV_DPCD_EDP_PSR_VERSION, &byte, sizeof byte); + if (status == AuxRetry::ack && byte > 0U) + { + caps.psrCaps.psrVersion = byte; + } - status = bus.read(NV_DPCD_EDP_PSR_VERSION, &byte, sizeof byte); - if (status == AuxRetry::ack && byte > 0U) + if (caps.psrCaps.psrVersion) + { + unsigned psrSetupTimeMap[8] = { 330U, 275U, 220U, 165U, 110U, 55U, 0U }; + byte = 0U; + if (AuxRetry::ack == bus.read(NV_DPCD_EDP_PSR_CAP, &byte, sizeof byte)) { - caps.psrCaps.psrVersion = byte; + caps.psrCaps.linkTrainingRequired = + FLD_TEST_DRF(_DPCD_EDP, _PSR_CAP, _LT_NEEDED, _YES, byte); + caps.psrCaps.psrSetupTime = + psrSetupTimeMap[DRF_VAL(_DPCD_EDP, _PSR_CAP,_SETUP_TIME, byte)]; + caps.psrCaps.yCoordinateRequired = + FLD_TEST_DRF(_DPCD_EDP, _PSR_CAP,_Y_COORD_NEEDED, _YES, byte); + caps.psrCaps.psr2UpdateGranularityRequired = + FLD_TEST_DRF(_DPCD_EDP, _PSR_CAP,_GRAN_REQUIRED, _YES, byte); } - if (caps.psrCaps.psrVersion) + // Version 2 supports PSR2 and SU + if (caps.psrCaps.psrVersion == 2U) { - unsigned psrSetupTimeMap[8] = { 330U, 275U, 220U, 165U, 110U, 55U, 0U }; - byte = 0U; - if (AuxRetry::ack == bus.read(NV_DPCD_EDP_PSR_CAP, &byte, sizeof byte)) + NvU16 xGranular = 0U; + if (AuxRetry::ack == bus.read(NV_DPCD_EDP_PSR2_X_GRANULARITY_H, &byte, sizeof byte)) { - caps.psrCaps.linkTrainingRequired = - FLD_TEST_DRF(_DPCD_EDP, _PSR_CAP, _LT_NEEDED, _YES, byte); - caps.psrCaps.psrSetupTime = - psrSetupTimeMap[DRF_VAL(_DPCD_EDP, _PSR_CAP,_SETUP_TIME, byte)]; - caps.psrCaps.yCoordinateRequired = - FLD_TEST_DRF(_DPCD_EDP, _PSR_CAP,_Y_COORD_NEEDED, _YES, byte); - caps.psrCaps.psr2UpdateGranularityRequired = - FLD_TEST_DRF(_DPCD_EDP, _PSR_CAP,_GRAN_REQUIRED, _YES, byte); + xGranular = byte; } - // Version 2 supports PSR2 and SU - if (caps.psrCaps.psrVersion == 2U) + byte = 0U; + if (AuxRetry::ack == bus.read(NV_DPCD_EDP_PSR2_X_GRANULARITY_L, &byte, sizeof byte)) { - NvU16 xGranular = 0U; - if (AuxRetry::ack == bus.read(NV_DPCD_EDP_PSR2_X_GRANULARITY_H, &byte, sizeof byte)) - { - xGranular = byte; - } - - byte = 0U; - if (AuxRetry::ack == bus.read(NV_DPCD_EDP_PSR2_X_GRANULARITY_L, &byte, sizeof byte)) - { - xGranular = (xGranular << 8U) | byte; - } - - caps.psrCaps.suXGranularity = xGranular; + xGranular = (xGranular << 8U) | byte; } - // version 3 supports Y coordinate - if (caps.psrCaps.psrVersion > 2U) + caps.psrCaps.suXGranularity = xGranular; + } + + // version 3 supports Y coordinate + if (caps.psrCaps.psrVersion > 2U) + { + if (AuxRetry::ack == bus.read(NV_DPCD_EDP_PSR2_Y_GRANULARITY, &byte, sizeof byte)) { - if (AuxRetry::ack == bus.read(NV_DPCD_EDP_PSR2_Y_GRANULARITY, &byte, sizeof byte)) - { - caps.psrCaps.suYGranularity = byte; - } + caps.psrCaps.suYGranularity = byte; } } - - parsePortDescriptors(); } - virtual PCONCaps * getPCONCaps() + if (AuxRetry::ack == + bus.read(NV_DPCD20_DP_TUNNEL_CAPABILITIES, &byte, sizeof byte)) { - return &(caps.pconCaps); - } + caps.dpInTunnelingCaps.bIsSupported = + FLD_TEST_DRF(_DPCD20, _DP_TUNNEL_CAPABILITIES, + _DPTUNNELING_SUPPORT, _YES, byte); - virtual unsigned getRevisionMajor() // DPCD offset 0 - { - return caps.revisionMajor; - } + caps.dpInTunnelingCaps.bIsPanelReplayOptimizationSupported = + FLD_TEST_DRF(_DPCD20, _DP_TUNNEL_CAPABILITIES, + _PANEL_REPLAY_TUNNELING_OPTIMIZATION_SUPPORT, + _YES, byte); - virtual unsigned getRevisionMinor() - { - return caps.revisionMinor; + caps.dpInTunnelingCaps.bIsBwAllocationSupported = + FLD_TEST_DRF(_DPCD20, _DP_TUNNEL_CAPABILITIES, + _DPIN_BW_ALLOCATION_MODE_SUPPORT, + _YES, byte); } - virtual unsigned lttprGetRevisionMajor() // DPCD offset F0000h + if (caps.dpInTunnelingCaps.bIsSupported) { - return caps.repeaterCaps.revisionMajor; - } + if (AuxRetry::ack == + bus.read(NV_DPCD20_USB4_DRIVER_BW_CAPABILITY, &byte, sizeof byte)) + { + caps.dpInTunnelingCaps.bUsb4DriverSupport = + FLD_TEST_DRF(_DPCD20, _USB4_DRIVER, _BW_ALLOCATION, _YES, byte); + } - virtual unsigned lttprGetRevisionMinor() - { - return caps.repeaterCaps.revisionMinor; - } + AuxRetry::status busReadStatus = bus.read(NV_DPCD20_DP_TUNNELING_MAX_LANE_COUNT, &byte, sizeof byte); - // - // Legacy link rates: DPCD offset 1 * 27000000 - // ILRs: DPCD offset: 0x10~0x1F - // - virtual LinkRate getMaxLinkRate() - { - if (caps.phyRepeaterCount == 0) + if (AuxRetry::ack == busReadStatus) { - return caps.maxLinkRate; + caps.dpInTunnelingCaps.maxLaneCount = DRF_VAL(_DPCD20, _DP_TUNNELING_MAX_LANE_COUNT, _LANE, byte); } else { - return DP_MIN(caps.maxLinkRate, caps.repeaterCaps.maxLinkRate); + DP_PRINTF(DP_ERROR, "Failed to read NV_DPCD20_DP_TUNNELING_MAX_LANE_COUNT. Return: %d", busReadStatus); } - } - - virtual unsigned getMaxLaneCount() // DPCD offset 2 - { - if (caps.phyRepeaterCount == 0) - return caps.maxLaneCount; - else - return DP_MIN(caps.maxLaneCount, caps.repeaterCaps.maxLaneCount); - } - - virtual bool getNoLinkTraining() - { - return caps.noLinkTraining; - } - virtual unsigned getPhyRepeaterCount() - { - return caps.phyRepeaterCount; - } - - // Max lanes supported at the desired link rate. - virtual unsigned getMaxLaneCountSupportedAtLinkRate(LinkRate linkRate) - { - if (linkRate == HBR) + busReadStatus = bus.read(NV_DPCD20_DP_TUNNELING_8B10B_MAX_LINK_RATE, &byte, sizeof byte); + if (AuxRetry::ack == busReadStatus) { - if (caps.maxLanesAtHBR) + if (FLD_TEST_DRF(_DPCD20, _DP_TUNNELING_8B10B, _MAX_LINK_RATE_VAL, _1_62_GBPS, byte)) { - return DP_MIN(caps.maxLanesAtHBR, getMaxLaneCount()); + caps.dpInTunnelingCaps.maxLinkRate = RBR; } - } - else if (linkRate == RBR) - { - if (caps.maxLanesAtRBR) + else if (FLD_TEST_DRF(_DPCD20, _DP_TUNNELING_8B10B, _MAX_LINK_RATE_VAL, _2_70_GBPS, byte)) + { + caps.dpInTunnelingCaps.maxLinkRate = HBR; + } + else if (FLD_TEST_DRF(_DPCD20, _DP_TUNNELING_8B10B, _MAX_LINK_RATE_VAL, _5_40_GBPS, byte)) { - return DP_MIN(caps.maxLanesAtRBR, getMaxLaneCount()); + caps.dpInTunnelingCaps.maxLinkRate = HBR2; + } + else if (FLD_TEST_DRF(_DPCD20, _DP_TUNNELING_8B10B, _MAX_LINK_RATE_VAL, _8_10_GBPS, byte)) + { + caps.dpInTunnelingCaps.maxLinkRate = HBR3; + } + else + { + DP_ASSERT(0 && "Unknown max link rate. Assuming DP 1.1 defaults"); + caps.dpInTunnelingCaps.maxLinkRate = HBR; } } - // None of the above cases got hit, simply return the max lane count - return getMaxLaneCount(); - } + else + { + DP_PRINTF(DP_ERROR, "Failed to read NV_DPCD20_DP_TUNNELING_8B10B_MAX_LINK_RATE. Return: %d", busReadStatus); + } - virtual bool getEnhancedFraming() - { - return caps.enhancedFraming; } + parsePortDescriptors(); +} - virtual bool getDownstreamPort(NvU8 *portType) // DPCD offset 5 - { - *portType = caps.downStreamPortType; - return caps.downStreamPortPresent; - } +// +// Legacy link rates: DPCD offset 1 * 27000000 +// ILRs: DPCD offset: 0x10~0x1F +// +LinkRate DPCDHALImpl::getMaxLinkRate() +{ + LinkRate maxLinkRate = caps.maxLinkRate; - virtual bool getSupportsNoHandshakeTraining() + if (caps.phyRepeaterCount > 0) { - return caps.supportsNoHandshakeTraining; + maxLinkRate = DP_MIN(maxLinkRate, caps.repeaterCaps.maxLinkRate); } - virtual unsigned getLegacyPortCount() // DPCD offset 7 + if (caps.dpInTunnelingCaps.bIsSupported && bIsDpTunnelBwAllocationEnabled) { - return caps.downStreamPortCount; + maxLinkRate = DP_MIN(maxLinkRate, caps.dpInTunnelingCaps.maxLinkRate); } - virtual LegacyPort * getLegacyPort(unsigned index) - { - return &legacyPort[index]; - } + return maxLinkRate; +} + +unsigned DPCDHALImpl::getMaxLaneCount() +{ + unsigned maxLaneCount = caps.maxLaneCount; - virtual bool getMsaTimingparIgnored() + if (caps.phyRepeaterCount > 0) { - return caps.msaTimingParIgnored; + maxLaneCount = DP_MIN(maxLaneCount, caps.repeaterCaps.maxLaneCount); } - virtual bool getOuiSupported() + if (caps.dpInTunnelingCaps.bIsSupported && bIsDpTunnelBwAllocationEnabled) { - return caps.ouiSupported; + maxLaneCount = DP_MIN(maxLaneCount, caps.dpInTunnelingCaps.maxLaneCount); } - virtual bool getSDPExtnForColorimetry() + return maxLaneCount; +} + +// Max lanes supported at the desired link rate. +unsigned DPCDHALImpl::getMaxLaneCountSupportedAtLinkRate(LinkRate linkRate) +{ + if (linkRate == HBR) { - bool bSDPExtnForColorimetry = false; - NvU8 byte = 0; - if (caps.extendedRxCapsPresent) + if (caps.maxLanesAtHBR) { - if (AuxRetry::ack == bus.read(NV_DPCD14_EXTENDED_DPRX_FEATURE_ENUM_LIST, &byte, sizeof byte)) - { - bSDPExtnForColorimetry = FLD_TEST_DRF(_DPCD14, _EXTENDED_DPRX_FEATURE_ENUM_LIST, - _VSC_SDP_EXT_FOR_COLORIMETRY, _YES, byte); - } + return DP_MIN(caps.maxLanesAtHBR, getMaxLaneCount()); } - return bSDPExtnForColorimetry; } - - virtual bool getRootAsyncSDPSupported() + else if (linkRate == RBR) { - NvU8 byte = 0; - if (!caps.extendedRxCapsPresent) - return false; - if (AuxRetry::ack != bus.read(NV_DPCD14_DPRX_FEATURE_ENUM_LIST, &byte, sizeof byte) || - FLD_TEST_DRF(_DPCD14, _DPRX_FEATURE_ENUM_LIST, _ADAPTIVE_SYNC_SDP_SUPPORTED, _NO, byte)) - { - return false; - } - if (AuxRetry::ack != bus.read(NV_DPCD_DOWN_STREAM_PORT, &byte, sizeof byte) || - FLD_TEST_DRF(_DPCD, _DOWN_STREAM_PORT, _MSA_TIMING_PAR_IGNORED, _NO, byte)) + if (caps.maxLanesAtRBR) { - return false; + return DP_MIN(caps.maxLanesAtRBR, getMaxLaneCount()); } - return true; } + // None of the above cases got hit, simply return the max lane count + return getMaxLaneCount(); +} - virtual AuxRetry::status setOuiSource(unsigned ouiId, const char * model, size_t modelNameLength, NvU8 chipRevision) - { - NvU8 ouiBuffer[16]; - - // The first 3 bytes are IEEE_OUI. 2 hex digits per register. - ouiBuffer[0] = (ouiId >> 16) & 0xFF; - ouiBuffer[1] = (ouiId >> 8) & 0xFF; - ouiBuffer[2] = ouiId & 0xFF; - - if (caps.revisionMajor <= 0) - DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - - if (modelNameLength > NV_DPCD_SOURCE_DEV_ID_STRING__SIZE) - { - DP_LOG(("DPHAL> setOuiSource(): modelNameLength should not be greater than 6")); - modelNameLength = NV_DPCD_SOURCE_DEV_ID_STRING__SIZE; - } +// +// Single stream specific caps +// DPCD offset 22h +// +unsigned DPCDHALImpl::getNumberOfAudioEndpoints() +{ + if (caps.numberAudioEndpoints) + return caps.numberAudioEndpoints; + else + return caps.NORP > 1; +} - // Next 6 bytes are Device Identification String. - for (unsigned int i = 0; i < modelNameLength; i++) +bool DPCDHALImpl::getSDPExtnForColorimetry() +{ + bool bSDPExtnForColorimetry = false; + NvU8 byte = 0; + if (caps.extendedRxCapsPresent) + { + if (AuxRetry::ack == bus.read(NV_DPCD14_EXTENDED_DPRX_FEATURE_ENUM_LIST, &byte, sizeof byte)) { - ouiBuffer[3+i] = *model; - if (*model) - model++; + bSDPExtnForColorimetry = FLD_TEST_DRF(_DPCD14, _EXTENDED_DPRX_FEATURE_ENUM_LIST, + _VSC_SDP_EXT_FOR_COLORIMETRY, _YES, byte); } - ouiBuffer[9] = chipRevision; - - for (int i = 0xA; i<=0xF; ++i) - ouiBuffer[i] = 0; - - return bus.write(NV_DPCD_SOURCE_IEEE_OUI, &ouiBuffer[0], sizeof ouiBuffer); } + return bSDPExtnForColorimetry; +} - virtual bool getOuiSource(unsigned &ouiId, char * modelName, - size_t modelNameBufferSize, NvU8 & chipRevision) +bool DPCDHALImpl::getRootAsyncSDPSupported() +{ + NvU8 byte = 0; + if (!caps.extendedRxCapsPresent) + return false; + if (AuxRetry::ack != bus.read(NV_DPCD14_DPRX_FEATURE_ENUM_LIST, &byte, sizeof byte) || + FLD_TEST_DRF(_DPCD14, _DPRX_FEATURE_ENUM_LIST, _ADAPTIVE_SYNC_SDP_SUPPORTED, _NO, byte)) { - NvU8 ouiBuffer[16]; - int address = NV_DPCD_SOURCE_IEEE_OUI; - - if (caps.revisionMajor <= 0) - DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - - // If buffer size is larger than dev_id size, the extras are not used. - // If buffer size is smaller, than we can only get certain bytes. - if (modelNameBufferSize > NV_DPCD_SOURCE_DEV_ID_STRING__SIZE) - { - modelNameBufferSize = NV_DPCD_SOURCE_DEV_ID_STRING__SIZE; - } + return false; + } + if (AuxRetry::ack != bus.read(NV_DPCD_DOWN_STREAM_PORT, &byte, sizeof byte) || + FLD_TEST_DRF(_DPCD, _DOWN_STREAM_PORT, _MSA_TIMING_PAR_IGNORED, _NO, byte)) + { + return false; + } + return true; +} - if (AuxRetry::ack != bus.read(address, &ouiBuffer[0], sizeof ouiBuffer)) - { - *modelName = 0; - ouiId = 0; - chipRevision = 0; - return false; - } - // The first 3 bytes are IEEE_OUI. 2 hex digits per register. - ouiId = ouiBuffer[2] | (ouiBuffer[1] << 8) | (ouiBuffer[0] << 16); +AuxRetry::status DPCDHALImpl::setOuiSource +( + unsigned ouiId, + const char * model, + size_t modelNameLength, + NvU8 chipRevision +) +{ + NvU8 ouiBuffer[16]; - // Next 6 bytes are Device Identification String, copy as much as we can (limited buffer case). - unsigned int i; - for (i = 0; i < modelNameBufferSize; i++) - modelName[i] = ouiBuffer[3+i]; + // The first 3 bytes are IEEE_OUI. 2 hex digits per register. + ouiBuffer[0] = (ouiId >> 16) & 0xFF; + ouiBuffer[1] = (ouiId >> 8) & 0xFF; + ouiBuffer[2] = ouiId & 0xFF; - chipRevision = ouiBuffer[9]; + if (caps.revisionMajor <= 0) + DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - return true; + if (modelNameLength > NV_DPCD_SOURCE_DEV_ID_STRING__SIZE) + { + DP_PRINTF(DP_WARNING, "DPHAL> setOuiSource(): modelNameLength should not be greater than 6"); + modelNameLength = NV_DPCD_SOURCE_DEV_ID_STRING__SIZE; } - virtual bool getOuiSink(unsigned &ouiId, char * modelName, size_t modelNameBufferSize, NvU8 & chipRevision) + // Next 6 bytes are Device Identification String. + for (unsigned int i = 0; i < modelNameLength; i++) { - NvU8 ouiBuffer[16]; - int address = NV_DPCD_SINK_IEEE_OUI; - - if (caps.revisionMajor <= 0) - DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - - // If buffer size is larger than dev_id size, the extras are not used. - // If buffer size is smaller, than we can only get certain bytes. - if (modelNameBufferSize > NV_DPCD_SOURCE_DEV_ID_STRING__SIZE) - { - modelNameBufferSize = NV_DPCD_SOURCE_DEV_ID_STRING__SIZE; - } + ouiBuffer[3+i] = *model; + if (*model) + model++; + } + ouiBuffer[9] = chipRevision; - // - // Check if there is a downstream facing port (DFP) - // If DFP is present, device is a branch device - use branch offset - // Else device is a sink device - use sink offset - // - if(caps.downStreamPortPresent) - { - address = NV_DPCD_BRANCH_IEEE_OUI; - } + for (int i = 0xA; i<=0xF; ++i) + ouiBuffer[i] = 0; - if (AuxRetry::ack != bus.read(address, &ouiBuffer[0], sizeof ouiBuffer)) - { - *modelName = 0; - ouiId = 0; - chipRevision = 0; - return false; - } - // The first 3 bytes are IEEE_OUI. 2 hex digits per register. - ouiId = ouiBuffer[0] | (ouiBuffer[1] << 8) | (ouiBuffer[2] << 16); + return bus.write(NV_DPCD_SOURCE_IEEE_OUI, &ouiBuffer[0], sizeof ouiBuffer); +} - // Next 6 bytes are Device Identification String, copy as much as we can (limited buffer case). - unsigned int i; - for (i = 0; i < modelNameBufferSize; i++) - modelName[i] = ouiBuffer[3+i]; +bool DPCDHALImpl::getOuiSource(unsigned &ouiId, char * modelName, + size_t modelNameBufferSize, NvU8 & chipRevision) +{ + NvU8 ouiBuffer[16]; + int address = NV_DPCD_SOURCE_IEEE_OUI; - chipRevision = ouiBuffer[9]; + if (caps.revisionMajor <= 0) + DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - return true; + // If buffer size is larger than dev_id size, the extras are not used. + // If buffer size is smaller, than we can only get certain bytes. + if (modelNameBufferSize > NV_DPCD_SOURCE_DEV_ID_STRING__SIZE) + { + modelNameBufferSize = NV_DPCD_SOURCE_DEV_ID_STRING__SIZE; } - virtual bool getSupportsMultistream() // DPCD offset 21h + if (AuxRetry::ack != bus.read(address, &ouiBuffer[0], sizeof ouiBuffer)) { - return caps.supportsMultistream && (!caps.overrideToSST); + *modelName = 0; + ouiId = 0; + chipRevision = 0; + return false; } + // The first 3 bytes are IEEE_OUI. 2 hex digits per register. + ouiId = ouiBuffer[2] | (ouiBuffer[1] << 8) | (ouiBuffer[0] << 16); + + // Next 6 bytes are Device Identification String, copy as much as we can (limited buffer case). + unsigned int i; + for (i = 0; i < modelNameBufferSize; i++) + modelName[i] = ouiBuffer[3+i]; + + chipRevision = ouiBuffer[9]; + + return true; +} + +bool DPCDHALImpl::getOuiSink +( + unsigned &ouiId, + char * modelName, + size_t modelNameBufferSize, + NvU8 & chipRevision +) +{ + NvU8 ouiBuffer[16]; + int address = NV_DPCD_SINK_IEEE_OUI; + + if (caps.revisionMajor <= 0) + DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - virtual void setSupportsESI(bool bIsESISupported) + // If buffer size is larger than dev_id size, the extras are not used. + // If buffer size is smaller, than we can only get certain bytes. + if (modelNameBufferSize > NV_DPCD_SOURCE_DEV_ID_STRING__SIZE) { - caps.supportsESI = bIsESISupported; + modelNameBufferSize = NV_DPCD_SOURCE_DEV_ID_STRING__SIZE; } // - // Single stream specific caps + // Check if there is a downstream facing port (DFP) + // If DFP is present, device is a branch device - use branch offset + // Else device is a sink device - use sink offset // - virtual unsigned getNumberOfAudioEndpoints() // DPCD offset 22h + if(caps.downStreamPortPresent) { - if (caps.numberAudioEndpoints) - return caps.numberAudioEndpoints; - else - return caps.NORP > 1; + address = NV_DPCD_BRANCH_IEEE_OUI; } - virtual bool getGUID(GUID & guid) // DPCD offset 30h + if (AuxRetry::ack != bus.read(address, &ouiBuffer[0], sizeof ouiBuffer)) { - NvU8 buffer[DPCD_GUID_SIZE]; + *modelName = 0; + ouiId = 0; + chipRevision = 0; + return false; + } + // The first 3 bytes are IEEE_OUI. 2 hex digits per register. + ouiId = ouiBuffer[0] | (ouiBuffer[1] << 8) | (ouiBuffer[2] << 16); - if (caps.revisionMajor <= 0) - DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); + // Next 6 bytes are Device Identification String, copy as much as we can (limited buffer case). + unsigned int i; + for (i = 0; i < modelNameBufferSize; i++) + modelName[i] = ouiBuffer[3+i]; - bus.read(NV_DPCD_GUID, &buffer[0], sizeof(buffer)); + chipRevision = ouiBuffer[9]; - for (unsigned i = 0; i < DPCD_GUID_SIZE; i++) - { - guid.data[i] = buffer[i]; - } - return true; - } + return true; +} - virtual AuxRetry::status setGUID(GUID & guid) - { - NvU8 buffer[DPCD_GUID_SIZE]; +// DPCD offset 30h +bool DPCDHALImpl::getGUID(DisplayPort::GUID & guid) +{ + NvU8 buffer[DPCD_GUID_SIZE]; - if (caps.revisionMajor <= 0) - DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); + if (caps.revisionMajor <= 0) + DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - for (unsigned i = 0; i < DPCD_GUID_SIZE; i++) - { - buffer[i] = guid.data[i]; - } + bus.read(NV_DPCD_GUID, &buffer[0], sizeof(buffer)); - return bus.write(NV_DPCD_GUID, buffer, sizeof(buffer)); + for (unsigned i = 0; i < DPCD_GUID_SIZE; i++) + { + guid.data[i] = buffer[i]; } + return true; +} + +AuxRetry::status DPCDHALImpl::setGUID(DisplayPort::GUID & guid) +{ + NvU8 buffer[DPCD_GUID_SIZE]; - void parsePortDescriptors() + if (caps.revisionMajor <= 0) + DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); + + for (unsigned i = 0; i < DPCD_GUID_SIZE; i++) { - NvU8 basicCaps[128]; - unsigned bytesPerPort = caps.detailedCapInfo ? 4 : 1; - // When Detailed_cap_info_available bit is set to 1, the max number - // of downstream port is limited to 32. Otherwise it supports up to 127 - unsigned maxPorts = caps.detailedCapInfo ? 32 : 127; - unsigned infoByte0; - if (caps.downStreamPortCount > maxPorts) - caps.downStreamPortCount = 1; - unsigned size = (bytesPerPort * caps.downStreamPortCount); + buffer[i] = guid.data[i]; + } - if (AuxRetry::ack != bus.read(NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT(0), &basicCaps[0], size)) - { - DP_LOG(("DPHAL> Unable to read detailed caps!")); - caps.downStreamPortCount = 0; - return; - } + return bus.write(NV_DPCD_GUID, buffer, sizeof(buffer)); +} + +void DPCDHALImpl::parsePortDescriptors() +{ + NvU8 basicCaps[128]; + unsigned bytesPerPort = caps.detailedCapInfo ? 4 : 1; + // When Detailed_cap_info_available bit is set to 1, the max number + // of downstream port is limited to 32. Otherwise it supports up to 127 + unsigned maxPorts = caps.detailedCapInfo ? 32 : 127; + unsigned infoByte0; + if (caps.downStreamPortCount > maxPorts) + caps.downStreamPortCount = 1; + unsigned size = (bytesPerPort * caps.downStreamPortCount); + + if (AuxRetry::ack != bus.read(NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT(0), &basicCaps[0], size)) + { + DP_PRINTF(DP_ERROR, "DPHAL> Unable to read detailed caps!"); + caps.downStreamPortCount = 0; + return; + } - if (!((isVersion(1,0)) || - (isVersion(1,1) && basicCaps[0] == 0 && - legacyPort[0].type == ANALOG_VGA))) + if (!((isVersion(1,0)) || + (isVersion(1,1) && basicCaps[0] == 0 && + legacyPort[0].type == ANALOG_VGA))) + { + for (unsigned port = 0; port < caps.downStreamPortCount; port++) { - for (unsigned port = 0; port < caps.downStreamPortCount; port++) + // The index to access detailed info byte 0 + infoByte0 = port * bytesPerPort; + switch (DRF_VAL(_DPCD, _DETAILED_CAP_INFO_DWNSTRM_PORT, _TX_TYPE, basicCaps[infoByte0])) { - // The index to access detailed info byte 0 - infoByte0 = port * bytesPerPort; - switch (DRF_VAL(_DPCD, _DETAILED_CAP_INFO_DWNSTRM_PORT, _TX_TYPE, basicCaps[infoByte0])) + case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_TX_TYPE_DISPLAYPORT: { - case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_TX_TYPE_DISPLAYPORT: - { - legacyPort[port].type = DISPLAY_PORT; - break; - } - case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_TX_TYPE_ANALOG: - { - legacyPort[port].type = ANALOG_VGA; - break; - } - case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_TX_TYPE_DVI: - { - legacyPort[port].type = DVI; - break; - } - case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_TX_TYPE_HDMI: - { - NvU8 pConCaps = basicCaps[infoByte0+2]; - - legacyPort[port].type = HDMI; + legacyPort[port].type = DISPLAY_PORT; + break; + } + case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_TX_TYPE_ANALOG: + { + legacyPort[port].type = ANALOG_VGA; + break; + } + case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_TX_TYPE_DVI: + { + legacyPort[port].type = DVI; + break; + } + case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_TX_TYPE_HDMI: + { + NvU8 pConCaps = basicCaps[infoByte0+2]; - caps.pconCaps.maxTmdsClkRate = basicCaps[infoByte0+1]; + legacyPort[port].type = HDMI; - caps.pconCaps.bSourceControlModeSupported = - FLD_TEST_DRF(_DPCD, _DETAILED_CAP_INFO, _SRC_CONTROL_MODE_SUPPORT, _YES, pConCaps); - caps.pconCaps.bConcurrentLTSupported = - FLD_TEST_DRF(_DPCD, _DETAILED_CAP_INFO, _CONCURRENT_LT_SUPPORT, _YES, pConCaps); - caps.pconCaps.maxHdmiLinkBandwidthGbps = - DRF_VAL(_DPCD, _DETAILED_CAP_INFO, _MAX_FRL_LINK_BW_SUPPORT, pConCaps); + caps.pconCaps.maxTmdsClkRate = basicCaps[infoByte0+1]; - switch (DRF_VAL(_DPCD, _DETAILED_CAP_INFO, _MAX_BITS_PER_COMPONENT_DEF, pConCaps)) - { - case NV_DPCD_DETAILED_CAP_INFO_MAX_BITS_PER_COMPONENT_DEF_10BPC: - caps.pconCaps.maxBpc = 10; - break; - case NV_DPCD_DETAILED_CAP_INFO_MAX_BITS_PER_COMPONENT_DEF_12BPC: - caps.pconCaps.maxBpc = 12; - break; - case NV_DPCD_DETAILED_CAP_INFO_MAX_BITS_PER_COMPONENT_DEF_16BPC: - caps.pconCaps.maxBpc = 16; - break; - case NV_DPCD_DETAILED_CAP_INFO_MAX_BITS_PER_COMPONENT_DEF_8BPC: - default: - caps.pconCaps.maxBpc = 8; - break; - } + caps.pconCaps.bSourceControlModeSupported = + FLD_TEST_DRF(_DPCD, _DETAILED_CAP_INFO, _SRC_CONTROL_MODE_SUPPORT, _YES, pConCaps); + caps.pconCaps.bConcurrentLTSupported = + FLD_TEST_DRF(_DPCD, _DETAILED_CAP_INFO, _CONCURRENT_LT_SUPPORT, _YES, pConCaps); + caps.pconCaps.maxHdmiLinkBandwidthGbps = + DRF_VAL(_DPCD, _DETAILED_CAP_INFO, _MAX_FRL_LINK_BW_SUPPORT, pConCaps); - NvU8 pConColorConvCaps = basicCaps[infoByte0+3]; - caps.pconCaps.bConv444To420Supported = FLD_TEST_DRF(_DPCD, _DETAILED_CAP, _CONV_YCBCR444_TO_YCBCR420_SUPPORTED, _YES, pConColorConvCaps); - break; - } - case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_TX_TYPE_OTHERS_NO_EDID: + switch (DRF_VAL(_DPCD, _DETAILED_CAP_INFO, _MAX_BITS_PER_COMPONENT_DEF, pConCaps)) { - legacyPort[port].type = WITHOUT_EDID; - switch (DRF_VAL(_DPCD, _DETAILED_CAP_INFO_DWNSTRM_PORT, _NON_EDID_ATTR, basicCaps[infoByte0])) - { + case NV_DPCD_DETAILED_CAP_INFO_MAX_BITS_PER_COMPONENT_DEF_10BPC: + caps.pconCaps.maxBpc = 10; + break; + case NV_DPCD_DETAILED_CAP_INFO_MAX_BITS_PER_COMPONENT_DEF_12BPC: + caps.pconCaps.maxBpc = 12; + break; + case NV_DPCD_DETAILED_CAP_INFO_MAX_BITS_PER_COMPONENT_DEF_16BPC: + caps.pconCaps.maxBpc = 16; + break; + case NV_DPCD_DETAILED_CAP_INFO_MAX_BITS_PER_COMPONENT_DEF_8BPC: default: - { - DP_ASSERT(0 && "Unknown non-edid type, assume Reserved"); - legacyPort[port].nonEDID = RESERVED; - break; - } - case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_NON_EDID_480I_60HZ: - { - legacyPort[port].nonEDID = IL_720_480_60HZ; - break; - } - case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_NON_EDID_480I_50HZ: - { - legacyPort[port].nonEDID = IL_720_480_50HZ; - break; - } - case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_NON_EDID_1080I_60HZ: - { - legacyPort[port].nonEDID = IL_1920_1080_60HZ; - break; - } - case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_NON_EDID_1080I_50HZ: - { - legacyPort[port].nonEDID = IL_1920_1080_50HZ; - break; - } - case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_NON_EDID_720P_60HZ: - { - legacyPort[port].nonEDID = PG_1280_720_60HZ; - break; - } - case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_NON_EDID_720P_50HZ: - { - legacyPort[port].nonEDID = PG_1280_720_50_HZ; - break; - } - } - break; - } - case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_TX_TYPE_DP_PLUSPLUS: - { - legacyPort[port].type = DISPLAY_PORT_PLUSPLUS; - break; + caps.pconCaps.maxBpc = 8; + break; } - default: + + NvU8 pConColorConvCaps = basicCaps[infoByte0+3]; + caps.pconCaps.bConv444To420Supported = FLD_TEST_DRF(_DPCD, _DETAILED_CAP, _CONV_YCBCR444_TO_YCBCR420_SUPPORTED, _YES, pConColorConvCaps); + break; + } + case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_TX_TYPE_OTHERS_NO_EDID: + { + legacyPort[port].type = WITHOUT_EDID; + switch (DRF_VAL(_DPCD, _DETAILED_CAP_INFO_DWNSTRM_PORT, _NON_EDID_ATTR, basicCaps[infoByte0])) { - DP_ASSERT(0 && "Unknown port type"); - break; + default: + { + DP_ASSERT(0 && "Unknown non-edid type, assume Reserved"); + legacyPort[port].nonEDID = RESERVED; + break; + } + case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_NON_EDID_480I_60HZ: + { + legacyPort[port].nonEDID = IL_720_480_60HZ; + break; + } + case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_NON_EDID_480I_50HZ: + { + legacyPort[port].nonEDID = IL_720_480_50HZ; + break; + } + case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_NON_EDID_1080I_60HZ: + { + legacyPort[port].nonEDID = IL_1920_1080_60HZ; + break; + } + case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_NON_EDID_1080I_50HZ: + { + legacyPort[port].nonEDID = IL_1920_1080_50HZ; + break; + } + case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_NON_EDID_720P_60HZ: + { + legacyPort[port].nonEDID = PG_1280_720_60HZ; + break; + } + case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_NON_EDID_720P_50HZ: + { + legacyPort[port].nonEDID = PG_1280_720_50_HZ; + break; + } } + break; } + case NV_DPCD_DETAILED_CAP_INFO_DWNSTRM_PORT_TX_TYPE_DP_PLUSPLUS: + { + legacyPort[port].type = DISPLAY_PORT_PLUSPLUS; + break; + } + default: + { + DP_ASSERT(0 && "Unknown port type"); + break; + } + } - // Set the Init value to Zero - legacyPort[port].maxTmdsClkRate = 0; + // Set the Init value to Zero + legacyPort[port].maxTmdsClkRate = 0; - if (legacyPort[port].type == DVI || - legacyPort[port].type == HDMI || - legacyPort[port].type == DISPLAY_PORT_PLUSPLUS) + if (legacyPort[port].type == DVI || + legacyPort[port].type == HDMI || + legacyPort[port].type == DISPLAY_PORT_PLUSPLUS) + { + legacyPort[port].maxTmdsClkRate = ((NvU64)basicCaps[infoByte0 + 1]) * 2500000; + if (legacyPort[port].maxTmdsClkRate == 0) { - legacyPort[port].maxTmdsClkRate = ((NvU64)basicCaps[infoByte0 + 1]) * 2500000; - if (legacyPort[port].maxTmdsClkRate == 0) - { - DP_ASSERT(legacyPort[port].maxTmdsClkRate && "No Max TMDS clock rate limits."); - } + DP_ASSERT(legacyPort[port].maxTmdsClkRate && "No Max TMDS clock rate limits."); + } - /* - Bug : 3202060 - Parse Byte 2 as well to check the Dongle supports HDMI FRL Output - If HDMI FRL is supported, the maxTmdsClkRate limit should be removed. - */ + /* + Bug : 3202060 + Parse Byte 2 as well to check the Dongle supports HDMI FRL Output + If HDMI FRL is supported, the maxTmdsClkRate limit should be removed. + */ - if (DRF_VAL(_DPCD, _DETAILED_CAP_INFO, _MAX_FRL_LINK_BW_SUPPORT, basicCaps[infoByte0 + 2])) - { - // Disable the TMDS CLK Limit - legacyPort[port].maxTmdsClkRate = 0; - } + if (DRF_VAL(_DPCD, _DETAILED_CAP_INFO, _MAX_FRL_LINK_BW_SUPPORT, basicCaps[infoByte0 + 2])) + { + // Disable the TMDS CLK Limit + legacyPort[port].maxTmdsClkRate = 0; } } } } +} + +void DPCDHALImpl::populateFakeDpcd() +{ + dpcdOffline = true; // - // Notifications of external events + // fill out the bare minimum caps required ... + // this should be extended in for more dpcd offsets in future. // - virtual void notifyIRQ() + caps.revisionMajor = 0x1; + caps.revisionMinor = 0x1; + caps.supportsESI = false; + caps.maxLinkRate = HBR3; + caps.maxLaneCount = 4; + caps.enhancedFraming = true; + caps.downStreamPortPresent = true; + caps.downStreamPortCount = 1; + + // populate the sinkcount interrupt + interrupts.sinkCount = 1; +} + +// DPCD override routine: Max link rate override. +void DPCDHALImpl::overrideMaxLinkRate(NvU32 overrideMaxLinkRate) +{ + if (overrideMaxLinkRate) { - parseAndReadInterrupts(); + caps.maxLinkRate = mapLinkBandiwdthToLinkrate(overrideMaxLinkRate); } +} - virtual void populateFakeDpcd() +void DPCDHALImpl::notifyHPD(bool status, bool bSkipDPCDRead) +{ + if (!status) { - dpcdOffline = true; - // fill out the bare minimum caps required ... this should be extended in for more dpcd offsets in future. - caps.revisionMajor = 0x1; - caps.revisionMinor = 0x1; - caps.supportsESI = false; - caps.maxLinkRate = HBR3; - caps.maxLaneCount = 4; - caps.enhancedFraming = true; - caps.downStreamPortPresent = true; - caps.downStreamPortCount = 1; + // check if dpcd is alive + NvU8 buffer; + unsigned retries = 16; + if (AuxRetry::ack == bus.read(NV_DPCD_REV, &buffer, sizeof buffer, retries)) + return; - // populate the sinkcount interrupt - interrupts.sinkCount = 1; + // Support for EDID locking: + // Refill the cache with "default" dpcd data on an unplug event as later on + // the client may send a hot-plug event for edid locked fake device (no real dpcd). + // Also raise flag "dpcdOffline" so that dpcd accesses may be optimized. + populateFakeDpcd(); + return; } - // DPCD override routine: Max link rate override. - void overrideMaxLinkRate(NvU32 overrideMaxLinkRate) + // Skip DPCD read if requested. + if (!bSkipDPCDRead) { - if (overrideMaxLinkRate) - { - caps.maxLinkRate = mapLinkBandiwdthToLinkrate(overrideMaxLinkRate); - } + parseAndReadCaps(); } - // DPCD override routine: Max lane count override. - void overrideMaxLaneCount(NvU32 maxLaneCount) + // + // For Allienware eDp Panel more time is required to assert the HPD & + // power on the AUX link. Retry 1 more time if it has failed. This is + // a BAD way to do it but no EDID is available to differentiate here + // this is the first access which happens before EDID read to read caps. + // We also found that some LG panels on HP NBs goes in a bad state after + // factory reset. Retyring 3 times works for them. So making faultyRetries as 3. + // + NvU32 faultyRetries = 3; + while ((dpcdOffline) && (faultyRetries > 0)) { - caps.maxLaneCount = maxLaneCount; - overrideDpcdMaxLaneCount = maxLaneCount; + // Read the caps again + parseAndReadCaps(); + --faultyRetries; } - // DPCD override routine: Max lane count override at a given link rate. - void skipCableBWCheck(NvU32 maxLaneAtHighRate, NvU32 maxLaneAtLowRate) + parseAndReadInterrupts(); +} + +void DPCDHALImpl::setPostLtAdjustRequestGranted(bool bGrantPostLtRequest) +{ + NvU8 data = 0; + + bus.read(NV_DPCD_LANE_COUNT_SET, &data, sizeof data); + + if (bGrantPostLtRequest) { - caps.maxLanesAtHBR = maxLaneAtHighRate; - caps.maxLanesAtRBR = maxLaneAtLowRate; + data = FLD_SET_DRF(_DPCD, _LANE_COUNT_SET, _POST_LT_ADJ_REQ_GRANTED, _YES, data); } - // DPCD override routine: Optimal link config (link rate and lane count) override. - void overrideOptimalLinkCfg(LinkRate optimalLinkRate, - NvU32 optimalLaneCount) + else { - caps.maxLinkRate = optimalLinkRate; - caps.maxLaneCount = optimalLaneCount; + data = FLD_SET_DRF(_DPCD, _LANE_COUNT_SET, _POST_LT_ADJ_REQ_GRANTED, _NO, data); } - // DPCD override routine: Optimal link rate - void overrideOptimalLinkRate(LinkRate optimalLinkRate) + if (AuxRetry::ack != bus.write(NV_DPCD_LANE_COUNT_SET, &data, sizeof data)) { - caps.maxLinkRate = optimalLinkRate; + DP_PRINTF(DP_ERROR, "DPCONN> Failed to set POST_LT_ADJ_REQ_GRANTED bit."); } +} + +// DPCD offset 204 +bool DPCDHALImpl::getIsPostLtAdjRequestInProgress() +{ + NvU8 buffer; - virtual void notifyHPD(bool status, bool bSkipDPCDRead) + if (AuxRetry::ack != bus.read(NV_DPCD_LANE_ALIGN_STATUS_UPDATED, &buffer, 1)) { - if (!status) - { - // check if dpcd is alive - NvU8 buffer; - unsigned retries = 16; - if (AuxRetry::ack == bus.read(NV_DPCD_REV, &buffer, sizeof buffer, retries)) - return; - - // Support for EDID locking: - // Refill the cache with "default" dpcd data on an unplug event as later on - // the client may send a hot-plug event for edid locked fake device (no real dpcd). - // Also raise flag "dpcdOffline" so that dpcd accesses may be optimized. - populateFakeDpcd(); - return; - } + DP_PRINTF(DP_ERROR, "DPCONN> Post Link Training : Failed to read POST_LT_ADJ_REQ_IN_PROGRESS"); + return false; + } - // Skip DPCD read if requested. - if (!bSkipDPCDRead) - { - parseAndReadCaps(); - } + return FLD_TEST_DRF(_DPCD, _LANE_ALIGN_STATUS_UPDATED, + _POST_LT_ADJ_REQ_IN_PROGRESS, _YES, buffer); +} - // - // For Allienware eDp Panel more time is required to assert the HPD & - // power on the AUX link. Retry 1 more time if it has failed. This is - // a BAD way to do it but no EDID is available to differentiate here - // this is the first access which happens before EDID read to read caps. - // We also found that some LG panels on HP NBs goes in a bad state after - // factory reset. Retyring 3 times works for them. So making faultyRetries as 3. - // - NvU32 faultyRetries = 3; - while ((dpcdOffline) && (faultyRetries > 0)) - { - // Read the caps again - parseAndReadCaps(); - --faultyRetries; - } +TrainingPatternSelectType DPCDHALImpl::getTrainingPatternSelect() +{ + NvU8 trainingPat = 0; + TrainingPatternSelectType pattern = TRAINING_DISABLED; - parseAndReadInterrupts(); - } + if (caps.revisionMajor <= 0) + DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - virtual bool isPostLtAdjustRequestSupported() - { - // - // If the upstream DPTX and downstream DPRX both support TPS4, - // TPS4 shall be used instead of POST_LT_ADJ_REQ. - // - NvBool bTps4Supported = FLD_TEST_DRF(0073_CTRL_CMD_DP, _GET_CAPS_DP_VERSIONS_SUPPORTED, _DP1_4, _YES, gpuDPSupportedVersions) && - caps.bSupportsTPS4; - return bGrantsPostLtRequest && !bTps4Supported; - } + bus.read(NV_DPCD_TRAINING_PATTERN_SET, &trainingPat, sizeof trainingPat); - virtual void setPostLtAdjustRequestGranted(bool bGrantPostLtRequest) - { - NvU8 data = 0; + trainingPat = DRF_VAL(_DPCD, _TRAINING_PATTERN_SET, _TPS, trainingPat); + + if (trainingPat == NV_DPCD_TRAINING_PATTERN_SET_TPS_NONE) + pattern = TRAINING_DISABLED; + if (trainingPat == NV_DPCD_TRAINING_PATTERN_SET_TPS_TP1) + pattern = TRAINING_PAT_ONE; + if (trainingPat == NV_DPCD_TRAINING_PATTERN_SET_TPS_TP2) + pattern = TRAINING_PAT_TWO; + if (trainingPat == NV_DPCD_TRAINING_PATTERN_SET_TPS_TP3) + pattern = TRAINING_PAT_THREE; + + return pattern; +} + +bool +DPCDHALImpl::setTrainingMultiLaneSet +( + NvU8 numLanes, + NvU8 *voltSwingSet, + NvU8 *preEmphasisSet +) +{ + NvU8 trainingCtrl[DP_MAX_LANES] = {0}; + unsigned writeAddress = NV_DPCD_TRAINING_LANE_SET(0); + NvU8 laneIndex; - bus.read(NV_DPCD_LANE_COUNT_SET, &data, sizeof data); + if (caps.revisionMajor <= 0) + DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - if (bGrantPostLtRequest) + for (laneIndex = 0; laneIndex < numLanes; laneIndex++) + { + if (voltSwingSet[laneIndex] <= NV_DPCD_MAX_VOLTAGE_SWING) { - data = FLD_SET_DRF(_DPCD, _LANE_COUNT_SET, _POST_LT_ADJ_REQ_GRANTED, _YES, data); + trainingCtrl[laneIndex] = FLD_SET_DRF_NUM(_DPCD, _TRAINING_LANE_SET, + _VOLTAGE_SWING, voltSwingSet[laneIndex], + trainingCtrl[laneIndex]); } - else { - data = FLD_SET_DRF(_DPCD, _LANE_COUNT_SET, _POST_LT_ADJ_REQ_GRANTED, _NO, data); + DP_ASSERT(0 && "Out of bounds voltage swing. Assuming 0"); } - if (AuxRetry::ack != bus.write(NV_DPCD_LANE_COUNT_SET, &data, sizeof data)) + if (voltSwingSet[laneIndex] == NV_DPCD_MAX_VOLTAGE_SWING) { - DP_LOG(("DPCONN> Failed to set POST_LT_ADJ_REQ_GRANTED bit.")); + trainingCtrl[laneIndex] = FLD_SET_DRF(_DPCD, _TRAINING_LANE_SET, + _VOLTAGE_SWING_MAX_REACHED, + _TRUE, trainingCtrl[laneIndex]); } - } - virtual bool getIsPostLtAdjRequestInProgress() // DPCD offset 204 - { - NvU8 buffer; - - if (AuxRetry::ack != bus.read(NV_DPCD_LANE_ALIGN_STATUS_UPDATED, &buffer, 1)) + if (preEmphasisSet[laneIndex] <= NV_DPCD_MAX_VOLTAGE_PREEMPHASIS) { - DP_LOG(("DPCONN> Post Link Training : Failed to read POST_LT_ADJ_REQ_IN_PROGRESS")); - return false; + trainingCtrl[laneIndex] = FLD_SET_DRF_NUM(_DPCD, _TRAINING_LANE_SET, + _PREEMPHASIS, preEmphasisSet[laneIndex], + trainingCtrl[laneIndex]); + } + else + { + DP_ASSERT(0 && "Out of bounds preemphasis. Assuming 0"); } - return FLD_TEST_DRF(_DPCD, _LANE_ALIGN_STATUS_UPDATED, - _POST_LT_ADJ_REQ_IN_PROGRESS, _YES, buffer); + if (preEmphasisSet[laneIndex] == NV_DPCD_MAX_VOLTAGE_PREEMPHASIS) + { + trainingCtrl[laneIndex] = FLD_SET_DRF(_DPCD, _TRAINING_LANE_SET, + _PREEMPHASIS_MAX_REACHED, _TRUE, + trainingCtrl[laneIndex]); + } } - virtual TrainingPatternSelectType getTrainingPatternSelect() - { - NvU8 trainingPat = 0; - TrainingPatternSelectType pattern = TRAINING_DISABLED; + return(AuxRetry::ack == bus.write(writeAddress, trainingCtrl, (unsigned)numLanes)); +} + +AuxRetry::status DPCDHALImpl::setIgnoreMSATimingParamters(bool msaTimingParamIgnoreEn) +{ + + NvU8 downspreadCtrl = 0; - if (caps.revisionMajor <= 0) - DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); + if (caps.revisionMajor <= 0) + DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - bus.read(NV_DPCD_TRAINING_PATTERN_SET, &trainingPat, sizeof trainingPat); + bus.read(NV_DPCD_DOWNSPREAD_CTRL, &downspreadCtrl, sizeof downspreadCtrl); - trainingPat = DRF_VAL(_DPCD, _TRAINING_PATTERN_SET, _TPS, trainingPat); + if (msaTimingParamIgnoreEn) + downspreadCtrl = FLD_SET_DRF(_DPCD, _DOWNSPREAD_CTRL, _MSA_TIMING_PAR_IGNORED, _TRUE, downspreadCtrl); + else + downspreadCtrl = FLD_SET_DRF(_DPCD, _DOWNSPREAD_CTRL, _MSA_TIMING_PAR_IGNORED, _FALSE, downspreadCtrl); - if (trainingPat == NV_DPCD_TRAINING_PATTERN_SET_TPS_NONE) - pattern = TRAINING_DISABLED; - if (trainingPat == NV_DPCD_TRAINING_PATTERN_SET_TPS_TP1) - pattern = TRAINING_PAT_ONE; - if (trainingPat == NV_DPCD_TRAINING_PATTERN_SET_TPS_TP2) - pattern = TRAINING_PAT_TWO; - if (trainingPat == NV_DPCD_TRAINING_PATTERN_SET_TPS_TP3) - pattern = TRAINING_PAT_THREE; + return bus.write(NV_DPCD_DOWNSPREAD_CTRL, &downspreadCtrl, sizeof downspreadCtrl); +} - return pattern; +AuxRetry::status DPCDHALImpl::setLinkQualPatternSet +( + LinkQualityPatternType linkQualPattern, + unsigned laneCount +) +{ + if (caps.revisionMajor <= 0) + { + DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); + return AuxRetry::nack; } - virtual bool setTrainingMultiLaneSet(NvU8 numLanes, - NvU8 *voltSwingSet, - NvU8 *preEmphasisSet) + if (this->isVersion(1, 1) == true) { - NvU8 trainingCtrl[DP_MAX_LANES] = {0}; - unsigned writeAddress = NV_DPCD_TRAINING_LANE_SET(0); - NvU8 laneIndex; + NvU8 buffer = 0; + if (AuxRetry::ack != bus.read(NV_DPCD_TRAINING_PATTERN_SET, &buffer, 1)) + { + DP_ASSERT(0 && "Can't read from NV_DPCD_TRAINING_PATTERN_SET."); + return AuxRetry::nack; + } - if (caps.revisionMajor <= 0) - DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); + // write on bits 3:2 + NvU8 value = ((linkQualPattern << 2) & 0xc) | (buffer & (~0xc)); + return bus.write(NV_DPCD_TRAINING_PATTERN_SET, &value, sizeof value); + } + else if (isAtLeastVersion(1,2) == true) + { + AuxRetry::status requestStatus = AuxRetry::nack ; - for (laneIndex = 0; laneIndex < numLanes; laneIndex++) + // Set test patterns for all requested lanes + for (unsigned i = 0; i < laneCount; i++) { - if (voltSwingSet[laneIndex] <= NV_DPCD_MAX_VOLTAGE_SWING) - { - trainingCtrl[laneIndex] = FLD_SET_DRF_NUM(_DPCD, _TRAINING_LANE_SET, - _VOLTAGE_SWING, voltSwingSet[laneIndex], - trainingCtrl[laneIndex]); - } - else - { - DP_ASSERT(0 && "Out of bounds voltage swing. Assuming 0"); - } + requestStatus = setLinkQualLaneSet(i, linkQualPattern); + if (requestStatus != AuxRetry::ack) + break; + } - if (voltSwingSet[laneIndex] == NV_DPCD_MAX_VOLTAGE_SWING) - { - trainingCtrl[laneIndex] = FLD_SET_DRF(_DPCD, _TRAINING_LANE_SET, - _VOLTAGE_SWING_MAX_REACHED, - _TRUE, trainingCtrl[laneIndex]); - } + return requestStatus; + } + else + { + DP_ASSERT(0 && "Regs only supported for DP1.2"); + return AuxRetry::unsupportedRegister; + } +} - if (preEmphasisSet[laneIndex] <= NV_DPCD_MAX_VOLTAGE_PREEMPHASIS) - { - trainingCtrl[laneIndex] = FLD_SET_DRF_NUM(_DPCD, _TRAINING_LANE_SET, - _PREEMPHASIS, preEmphasisSet[laneIndex], - trainingCtrl[laneIndex]); - } - else - { - DP_ASSERT(0 && "Out of bounds preemphasis. Assuming 0"); - } +AuxRetry::status DPCDHALImpl::setLinkQualLaneSet(unsigned lane, LinkQualityPatternType linkQualPattern) +{ + NvU8 linkQuality = 0; + unsigned writeAddress = NV_DPCD_LINK_QUAL_LANE_SET(lane); - if (preEmphasisSet[laneIndex] == NV_DPCD_MAX_VOLTAGE_PREEMPHASIS) - { - trainingCtrl[laneIndex] = FLD_SET_DRF(_DPCD, _TRAINING_LANE_SET, - _PREEMPHASIS_MAX_REACHED, _TRUE, - trainingCtrl[laneIndex]); - } - } + if (caps.revisionMajor <= 0) + DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - return(AuxRetry::ack == bus.write(writeAddress, trainingCtrl, (unsigned)numLanes)); + if (isAtLeastVersion(1,2) == false) + { + DP_ASSERT(0 && "Regs only supported for DP1.2"); + return AuxRetry::unsupportedRegister; } - virtual AuxRetry::status setIgnoreMSATimingParamters(bool msaTimingParamIgnoreEn) + // check if parameter is valid + if (lane >= displayPort_LaneSupported) { + DP_ASSERT(0 && "Unknown lane selected. Assuming Lane 0"); + writeAddress = NV_DPCD_LINK_QUAL_LANE_SET(0); + } - NvU8 downspreadCtrl = 0; - - if (caps.revisionMajor <= 0) - DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); + if (linkQualPattern == LINK_QUAL_DISABLED) + linkQuality = FLD_SET_DRF(_DPCD, _LINK_QUAL_LANE_SET, _LQS, _NO, linkQuality); + if (linkQualPattern == LINK_QUAL_D10_2) + linkQuality = FLD_SET_DRF(_DPCD, _LINK_QUAL_LANE_SET, _LQS, _D10_2, linkQuality); + if (linkQualPattern == LINK_QUAL_SYM_ERROR) + linkQuality = FLD_SET_DRF(_DPCD, _LINK_QUAL_LANE_SET, _LQS, _SYM_ERR_MEASUREMENT_CNT, linkQuality); + if (linkQualPattern == LINK_QUAL_PRBS7) + linkQuality = FLD_SET_DRF(_DPCD, _LINK_QUAL_LANE_SET, _LQS, _PRBS7, linkQuality); + if (linkQualPattern == LINK_QUAL_80BIT_CUST) + linkQuality = FLD_SET_DRF(_DPCD, _LINK_QUAL_LANE_SET, _LQS, _80_BIT_CUSTOM, linkQuality); + if (linkQualPattern == LINK_QUAL_HBR2_COMPLIANCE_EYE) + linkQuality = FLD_SET_DRF(_DPCD, _LINK_QUAL_LANE_SET, _LQS, _HBR2, linkQuality); + if (linkQualPattern == LINK_QUAL_CP2520PAT3) + linkQuality = FLD_SET_DRF(_DPCD14, _LINK_QUAL_LANE_SET, _LQS, _CP2520PAT3, linkQuality); - bus.read(NV_DPCD_DOWNSPREAD_CTRL, &downspreadCtrl, sizeof downspreadCtrl); + return bus.write(writeAddress, &linkQuality, sizeof linkQuality); +} - if (msaTimingParamIgnoreEn) - downspreadCtrl = FLD_SET_DRF(_DPCD, _DOWNSPREAD_CTRL, _MSA_TIMING_PAR_IGNORED, _TRUE, downspreadCtrl); - else - downspreadCtrl = FLD_SET_DRF(_DPCD, _DOWNSPREAD_CTRL, _MSA_TIMING_PAR_IGNORED, _FALSE, downspreadCtrl); +AuxRetry::status DPCDHALImpl::setMessagingEnable(bool _uprequestEnable, bool _upstreamIsSource) +{ + NvU8 mstmCtrl = 0; - return bus.write(NV_DPCD_DOWNSPREAD_CTRL, &downspreadCtrl, sizeof downspreadCtrl); + if (!this->isAtLeastVersion(1, 2)) + { + DP_ASSERT(!_uprequestEnable && "Can't enable multistream on DP 1.1"); + return AuxRetry::nack; } - virtual AuxRetry::status setLinkQualPatternSet(LinkQualityPatternType linkQualPattern, unsigned laneCount) + uprequestEnable = _uprequestEnable; + upstreamIsSource = _upstreamIsSource; + + // + // Lets not touch the MST enable bit here. + // Branch might be getting driven in MST mode and we do not want to + // change that unless we are sure there are no more streams being driven. + // + if (AuxRetry::ack != bus.read(NV_DPCD_MSTM_CTRL, &mstmCtrl, 1)) { - if (caps.revisionMajor <= 0) - { - DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - return AuxRetry::nack; - } + DP_PRINTF(DP_ERROR, "DPHAL> ERROR! Unable to read 00111h MSTM_CTRL."); + } - if (this->isVersion(1, 1) == true) - { - NvU8 buffer = 0; - if (AuxRetry::ack != bus.read(NV_DPCD_TRAINING_PATTERN_SET, &buffer, 1)) - { - DP_ASSERT(0 && "Can't read from NV_DPCD_TRAINING_PATTERN_SET."); - return AuxRetry::nack; - } - - // write on bits 3:2 - NvU8 value = ((linkQualPattern << 2) & 0xc) | (buffer & (~0xc)); - return bus.write(NV_DPCD_TRAINING_PATTERN_SET, &value, sizeof value); - } - else if (isAtLeastVersion(1,2) == true) - { - AuxRetry::status requestStatus = AuxRetry::nack ; - - // Set test patterns for all requested lanes - for (unsigned i = 0; i < laneCount; i++) - { - requestStatus = setLinkQualLaneSet(i, linkQualPattern); - if (requestStatus != AuxRetry::ack) - break; - } - - return requestStatus; - } - else - { - DP_ASSERT(0 && "Regs only supported for DP1.2"); - return AuxRetry::unsupportedRegister; - } + if (_uprequestEnable) + { + bMultistream = FLD_TEST_DRF(_DPCD, _MSTM_CTRL, _EN, _YES, mstmCtrl); } - - virtual AuxRetry::status setLinkQualLaneSet(unsigned lane, LinkQualityPatternType linkQualPattern) + else { - NvU8 linkQuality = 0; - unsigned writeAddress = NV_DPCD_LINK_QUAL_LANE_SET(lane); + bMultistream = false; + } + mstmCtrl = 0; + if (bMultistream) + mstmCtrl = FLD_SET_DRF(_DPCD, _MSTM_CTRL, _EN, _YES, mstmCtrl); + if (uprequestEnable) + mstmCtrl = FLD_SET_DRF(_DPCD, _MSTM_CTRL, _UP_REQ_EN, _YES, mstmCtrl); + if (upstreamIsSource) + mstmCtrl = FLD_SET_DRF(_DPCD, _MSTM_CTRL, _UPSTREAM_IS_SRC, _YES, mstmCtrl); - if (caps.revisionMajor <= 0) - DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); + return bus.write(NV_DPCD_MSTM_CTRL, &mstmCtrl, sizeof mstmCtrl); +} - if (isAtLeastVersion(1,2) == false) - { - DP_ASSERT(0 && "Regs only supported for DP1.2"); - return AuxRetry::unsupportedRegister; - } +AuxRetry::status DPCDHALImpl::setMultistreamLink(bool enable) +{ + NvU8 mstmCtrl = 0; - // check if parameter is valid - if (lane >= displayPort_LaneSupported) - { - DP_ASSERT(0 && "Unknown lane selected. Assuming Lane 0"); - writeAddress = NV_DPCD_LINK_QUAL_LANE_SET(0); - } + if (!this->isAtLeastVersion(1, 2)) + { + DP_ASSERT(!enable && "Can't enable multistream on DP 1.1"); + return AuxRetry::nack; + } - if (linkQualPattern == LINK_QUAL_DISABLED) - linkQuality = FLD_SET_DRF(_DPCD, _LINK_QUAL_LANE_SET, _LQS, _NO, linkQuality); - if (linkQualPattern == LINK_QUAL_D10_2) - linkQuality = FLD_SET_DRF(_DPCD, _LINK_QUAL_LANE_SET, _LQS, _D10_2, linkQuality); - if (linkQualPattern == LINK_QUAL_SYM_ERROR) - linkQuality = FLD_SET_DRF(_DPCD, _LINK_QUAL_LANE_SET, _LQS, _SYM_ERR_MEASUREMENT_CNT, linkQuality); - if (linkQualPattern == LINK_QUAL_PRBS7) - linkQuality = FLD_SET_DRF(_DPCD, _LINK_QUAL_LANE_SET, _LQS, _PRBS7, linkQuality); - if (linkQualPattern == LINK_QUAL_80BIT_CUST) - linkQuality = FLD_SET_DRF(_DPCD, _LINK_QUAL_LANE_SET, _LQS, _80_BIT_CUSTOM, linkQuality); - if (linkQualPattern == LINK_QUAL_HBR2_COMPLIANCE_EYE) - linkQuality = FLD_SET_DRF(_DPCD, _LINK_QUAL_LANE_SET, _LQS, _HBR2, linkQuality); - if (linkQualPattern == LINK_QUAL_CP2520PAT3) - linkQuality = FLD_SET_DRF(_DPCD14, _LINK_QUAL_LANE_SET, _LQS, _CP2520PAT3, linkQuality); + bMultistream = enable; - return bus.write(writeAddress, &linkQuality, sizeof linkQuality); - } + if (bMultistream) + mstmCtrl = FLD_SET_DRF(_DPCD, _MSTM_CTRL, _EN, _YES, mstmCtrl); + if (uprequestEnable) + mstmCtrl = FLD_SET_DRF(_DPCD, _MSTM_CTRL, _UP_REQ_EN, _YES, mstmCtrl); + if (upstreamIsSource) + mstmCtrl = FLD_SET_DRF(_DPCD, _MSTM_CTRL, _UPSTREAM_IS_SRC, _YES, mstmCtrl); - virtual AuxRetry::status setMessagingEnable(bool _uprequestEnable, bool _upstreamIsSource) - { - NvU8 mstmCtrl = 0; + return bus.write(NV_DPCD_MSTM_CTRL, &mstmCtrl, sizeof mstmCtrl); +} - if (!this->isAtLeastVersion(1, 2)) - { - DP_ASSERT(!_uprequestEnable && "Can't enable multistream on DP 1.1"); - return AuxRetry::nack; - } +AuxRetry::status DPCDHALImpl::setMultistreamHotplugMode(MultistreamHotplugMode notifyType) +{ + NvU8 deviceCtrl = 0; - uprequestEnable = _uprequestEnable; - upstreamIsSource = _upstreamIsSource; + if (caps.revisionMajor <= 0) + DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - // - // Lets not touch the MST enable bit here. - // Branch might be getting driven in MST mode and we do not want to - // change that unless we are sure there are no more streams being driven. - // - if (AuxRetry::ack != bus.read(NV_DPCD_MSTM_CTRL, &mstmCtrl, 1)) - { - DP_LOG(("DPHAL> ERROR! Unable to read 00111h MSTM_CTRL.")); - } + // notifytype == HPD_LONG_PULSE, adapter 0 + if (notifyType == IRQ_HPD) + deviceCtrl = FLD_SET_DRF(_DPCD, _BRANCH_DEV_CTRL, _HOTPLUG_EVENT_TYPE, _IRQ_HPD, deviceCtrl); - if (_uprequestEnable) - { - bMultistream = FLD_TEST_DRF(_DPCD, _MSTM_CTRL, _EN, _YES, mstmCtrl); - } - else - { - bMultistream = false; - } - mstmCtrl = 0; - if (bMultistream) - mstmCtrl = FLD_SET_DRF(_DPCD, _MSTM_CTRL, _EN, _YES, mstmCtrl); - if (uprequestEnable) - mstmCtrl = FLD_SET_DRF(_DPCD, _MSTM_CTRL, _UP_REQ_EN, _YES, mstmCtrl); - if (upstreamIsSource) - mstmCtrl = FLD_SET_DRF(_DPCD, _MSTM_CTRL, _UPSTREAM_IS_SRC, _YES, mstmCtrl); + return bus.write(NV_DPCD_BRANCH_DEV_CTRL, &deviceCtrl, sizeof deviceCtrl); +} - return bus.write(NV_DPCD_MSTM_CTRL, &mstmCtrl, sizeof mstmCtrl); +bool DPCDHALImpl::parseTestRequestTraining(NvU8 * buffer /* 0x18-0x28 valid */) +{ + if (buffer[1] == 0x6) + interrupts.testTraining.testRequestLinkRate = RBR; + else if (buffer[1] == 0xa) + interrupts.testTraining.testRequestLinkRate = HBR; + else if (buffer[1] == 0x14) + interrupts.testTraining.testRequestLinkRate = HBR2; + else if (buffer[1] == 0x1E) + interrupts.testTraining.testRequestLinkRate = HBR3; + else + { + DP_ASSERT(0 && "Unknown max link rate. Assuming RBR"); + interrupts.testTraining.testRequestLinkRate = RBR; } - virtual AuxRetry::status setMultistreamLink(bool enable) - { - NvU8 mstmCtrl = 0; + interrupts.testTraining.testRequestLaneCount = buffer[(0x220 - 0x218)] & 0xf; - if (!this->isAtLeastVersion(1, 2)) - { - DP_ASSERT(!enable && "Can't enable multistream on DP 1.1"); - return AuxRetry::nack; - } + return true; +} - bMultistream = enable; +void DPCDHALImpl::parseAutomatedTestRequest(bool testRequestPending) +{ + NvU8 buffer[16]; - if (bMultistream) - mstmCtrl = FLD_SET_DRF(_DPCD, _MSTM_CTRL, _EN, _YES, mstmCtrl); - if (uprequestEnable) - mstmCtrl = FLD_SET_DRF(_DPCD, _MSTM_CTRL, _UP_REQ_EN, _YES, mstmCtrl); - if (upstreamIsSource) - mstmCtrl = FLD_SET_DRF(_DPCD, _MSTM_CTRL, _UPSTREAM_IS_SRC, _YES, mstmCtrl); + interrupts.automatedTestRequest = false; + interrupts.testEdid.testRequestEdidRead = false; + interrupts.testTraining.testRequestTraining = false; + interrupts.testPhyCompliance.testRequestPhyCompliance = false; - return bus.write(NV_DPCD_MSTM_CTRL, &mstmCtrl, sizeof mstmCtrl); + if (!testRequestPending) + { + return; } + interrupts.automatedTestRequest = true; - virtual AuxRetry::status setMultistreamHotplugMode(MultistreamHotplugMode notifyType) + if (AuxRetry::ack != bus.read(NV_DPCD_TEST_REQUEST, &buffer[0], 16)) { - NvU8 deviceCtrl = 0; - - if (caps.revisionMajor <= 0) - DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - - // notifytype == HPD_LONG_PULSE, adapter 0 - if (notifyType == IRQ_HPD) - deviceCtrl = FLD_SET_DRF(_DPCD, _BRANCH_DEV_CTRL, _HOTPLUG_EVENT_TYPE, _IRQ_HPD, deviceCtrl); - - return bus.write(NV_DPCD_BRANCH_DEV_CTRL, &deviceCtrl, sizeof deviceCtrl); + DP_PRINTF(DP_ERROR, "DPHAL> ERROR! Automated test request found. Unable to read 0x218 register."); + return; } - - bool parseTestRequestTraining(NvU8 * buffer /* 0x18-0x28 valid */) + if (FLD_TEST_DRF(_DPCD, _TEST_REQUEST, _TEST_LINK_TRAINING, _YES, buffer[0])) { - if (buffer[1] == 0x6) - interrupts.testTraining.testRequestLinkRate = RBR; - else if (buffer[1] == 0xa) - interrupts.testTraining.testRequestLinkRate = HBR; - else if (buffer[1] == 0x14) - interrupts.testTraining.testRequestLinkRate = HBR2; - else if (buffer[1] == 0x1E) - interrupts.testTraining.testRequestLinkRate = HBR3; - else - { - DP_ASSERT(0 && "Unknown max link rate. Assuming RBR"); - interrupts.testTraining.testRequestLinkRate = RBR; - } - - interrupts.testTraining.testRequestLaneCount = buffer[(0x220 - 0x218)] & 0xf; + interrupts.testTraining.testRequestTraining = parseTestRequestTraining(&buffer[0]); + } - return true; + if (FLD_TEST_DRF(_DPCD, _TEST_REQUEST, _TEST_EDID_READ, _YES, buffer[0])) + { + interrupts.testEdid.testRequestEdidRead = true; } - void parseAutomatedTestRequest(bool testRequestPending) + if (FLD_TEST_DRF(_DPCD, _TEST_REQUEST, _TEST_PHY_TEST_PATTERN, _YES, buffer[0])) { - NvU8 buffer[16]; + interrupts.testPhyCompliance.testRequestPhyCompliance = parseTestRequestPhy(); + } +} - interrupts.automatedTestRequest = false; - interrupts.testEdid.testRequestEdidRead = false; - interrupts.testTraining.testRequestTraining = false; - interrupts.testPhyCompliance.testRequestPhyCompliance = false; +bool DPCDHALImpl::parseTestRequestPhy() +{ + NvU8 buffer = 0; + NvU8 bits = 0; + if (AuxRetry::ack != bus.read(NV_DPCD_PHY_TEST_PATTERN, &buffer, 1)) + { + DP_PRINTF(DP_ERROR, "DPHAL> ERROR! Test pattern request found but unable to read NV_DPCD_PHY_TEST_PATTERN register."); + return false; + } - if (!testRequestPending) - { - return; - } - interrupts.automatedTestRequest = true; + if (isVersion(1,0)) + bits = 0; + else + bits = DRF_VAL(_DPCD, _PHY_TEST_PATTERN_SEL, _DP12, buffer); + + if (bits == NV_DPCD_PHY_TEST_PATTERN_SEL_NO) + interrupts.testPhyCompliance.phyTestPattern = LINK_QUAL_DISABLED; + else if (bits == NV_DPCD_PHY_TEST_PATTERN_SEL_D10_2) + interrupts.testPhyCompliance.phyTestPattern = LINK_QUAL_D10_2; + else if (bits == NV_DPCD_PHY_TEST_PATTERN_SEL_SYM_ERR_MEASUREMENT_CNT) + interrupts.testPhyCompliance.phyTestPattern = LINK_QUAL_SYM_ERROR; + else if (bits == NV_DPCD_LINK_QUAL_LANE_SET_LQS_PRBS7) + interrupts.testPhyCompliance.phyTestPattern = LINK_QUAL_PRBS7; + else if (bits == NV_DPCD_LINK_QUAL_LANE_SET_LQS_80_BIT_CUSTOM) + interrupts.testPhyCompliance.phyTestPattern = LINK_QUAL_80BIT_CUST; + else if (bits == NV_DPCD_LINK_QUAL_LANE_SET_LQS_HBR2) + interrupts.testPhyCompliance.phyTestPattern = LINK_QUAL_HBR2_COMPLIANCE_EYE; + else if (bits == NV_DPCD14_PHY_TEST_PATTERN_SEL_CP2520PAT3) + interrupts.testPhyCompliance.phyTestPattern = LINK_QUAL_CP2520PAT3; + else + { + DP_ASSERT(0 && "Unknown pattern type, assuming none"); + interrupts.testPhyCompliance.phyTestPattern = LINK_QUAL_DISABLED; + return false; + } - if (AuxRetry::ack != bus.read(NV_DPCD_TEST_REQUEST, &buffer[0], 16)) + if (interrupts.testPhyCompliance.phyTestPattern == LINK_QUAL_80BIT_CUST) + { + NvU8 buffer[NV_DPCD_TEST_80BIT_CUSTOM_PATTERN__SIZE] = {0}; + if (AuxRetry::ack != bus.read(NV_DPCD_TEST_80BIT_CUSTOM_PATTERN(0), &buffer[0], + NV_DPCD_TEST_80BIT_CUSTOM_PATTERN__SIZE)) { - DP_LOG(("DPHAL> ERROR! Automated test request found. Unable to read 0x218 register.")); - return; + DP_PRINTF(DP_ERROR, "DPHAL> ERROR! Request for 80 bit custom pattern. Can't read from 250h."); + return false; } - if (FLD_TEST_DRF(_DPCD, _TEST_REQUEST, _TEST_LINK_TRAINING, _YES, buffer[0])) + for (unsigned i = 0; i < NV_DPCD_TEST_80BIT_CUSTOM_PATTERN__SIZE; i++) { - interrupts.testTraining.testRequestTraining = parseTestRequestTraining(&buffer[0]); + interrupts.eightyBitCustomPat[i] = buffer[i]; } + } - if (FLD_TEST_DRF(_DPCD, _TEST_REQUEST, _TEST_EDID_READ, _YES, buffer[0])) - { - interrupts.testEdid.testRequestEdidRead = true; - } + return true; +} - if (FLD_TEST_DRF(_DPCD, _TEST_REQUEST, _TEST_PHY_TEST_PATTERN, _YES, buffer[0])) - { - interrupts.testPhyCompliance.testRequestPhyCompliance = parseTestRequestPhy(); - } - } +void DPCDHALImpl::readPanelReplayError() +{ + NvU8 config = 0U; + bool bRetVal = (AuxRetry::ack == bus.read(NV_DPCD20_PANEL_REPLAY_ERROR_STATUS, + &config, sizeof(config))); - virtual bool parseTestRequestPhy() + if (bRetVal) { - NvU8 buffer = 0; - NvU8 bits = 0; - if (AuxRetry::ack != bus.read(NV_DPCD_PHY_TEST_PATTERN, &buffer, 1)) + if (FLD_TEST_DRF(_DPCD20_PANEL_REPLAY, _ERROR_STATUS, + _ACTIVE_FRAME_CRC_ERROR, _YES, config)) { - DP_LOG(("DPHAL> ERROR! Test pattern request found but unable to read NV_DPCD_PHY_TEST_PATTERN register.")); - return false; + DP_PRINTF(DP_ERROR, "DPHAL> ERROR! Active Frame CRC Error set in PanelReplay status register"); } - - if (isVersion(1,0)) - bits = 0; - else - bits = DRF_VAL(_DPCD, _PHY_TEST_PATTERN_SEL, _DP12, buffer); - - if (bits == NV_DPCD_PHY_TEST_PATTERN_SEL_NO) - interrupts.testPhyCompliance.phyTestPattern = LINK_QUAL_DISABLED; - else if (bits == NV_DPCD_PHY_TEST_PATTERN_SEL_D10_2) - interrupts.testPhyCompliance.phyTestPattern = LINK_QUAL_D10_2; - else if (bits == NV_DPCD_PHY_TEST_PATTERN_SEL_SYM_ERR_MEASUREMENT_CNT) - interrupts.testPhyCompliance.phyTestPattern = LINK_QUAL_SYM_ERROR; - else if (bits == NV_DPCD_LINK_QUAL_LANE_SET_LQS_PRBS7) - interrupts.testPhyCompliance.phyTestPattern = LINK_QUAL_PRBS7; - else if (bits == NV_DPCD_LINK_QUAL_LANE_SET_LQS_80_BIT_CUSTOM) - interrupts.testPhyCompliance.phyTestPattern = LINK_QUAL_80BIT_CUST; - else if (bits == NV_DPCD_LINK_QUAL_LANE_SET_LQS_HBR2) - interrupts.testPhyCompliance.phyTestPattern = LINK_QUAL_HBR2_COMPLIANCE_EYE; - else if (bits == NV_DPCD14_PHY_TEST_PATTERN_SEL_CP2520PAT3) - interrupts.testPhyCompliance.phyTestPattern = LINK_QUAL_CP2520PAT3; - else + if (FLD_TEST_DRF(_DPCD20_PANEL_REPLAY, _ERROR_STATUS, + _RFB_STORAGE_ERROR, _YES, config)) { - DP_ASSERT(0 && "Unknown pattern type, assuming none"); - interrupts.testPhyCompliance.phyTestPattern = LINK_QUAL_DISABLED; - return false; + DP_PRINTF(DP_ERROR, "DPHAL> ERROR! RFB Storage Error set in PanelReplay status register"); } - - if (interrupts.testPhyCompliance.phyTestPattern == LINK_QUAL_80BIT_CUST) + if (FLD_TEST_DRF(_DPCD20_PANEL_REPLAY, _ERROR_STATUS, + _VSC_SDP_UNCORRECTABLE_ERROR, _YES, config)) { - NvU8 buffer[NV_DPCD_TEST_80BIT_CUSTOM_PATTERN__SIZE] = {0}; - if (AuxRetry::ack != bus.read(NV_DPCD_TEST_80BIT_CUSTOM_PATTERN(0), &buffer[0], - NV_DPCD_TEST_80BIT_CUSTOM_PATTERN__SIZE)) - { - DP_LOG(("DPHAL> ERROR! Request for 80 bit custom pattern. Can't read from 250h.")); - return false; - } - - for (unsigned i = 0; i < NV_DPCD_TEST_80BIT_CUSTOM_PATTERN__SIZE; i++) - { - interrupts.eightyBitCustomPat[i] = buffer[i]; - } + DP_PRINTF(DP_ERROR, "DPHAL> ERROR! VSC SDP Uncorrectable Error set in PanelReplay status register"); } - - return true; } - - virtual bool interruptCapabilitiesChanged() + else { - return interrupts.rxCapChanged; + DP_PRINTF(DP_ERROR, "DPHAL> readPanelReplayError: Failed to read PanelReplay error status"); } +} - virtual void clearInterruptCapabilitiesChanged() - { - NvU8 irqVector = 0; - irqVector = FLD_SET_DRF(_DPCD, _LINK_SERVICE_IRQ_VECTOR_ESI0, _RX_CAP_CHANGED, _YES, irqVector); - bus.write(NV_DPCD_LINK_SERVICE_IRQ_VECTOR_ESI0, &irqVector, sizeof irqVector); - } +bool DPCDHALImpl::isLinkStatusValid(unsigned lanes) +{ + bool linkStatus = true; - virtual bool isPanelReplayErrorSet() + this->setDirtyLinkStatus(true); + this->refreshLinkStatus(); + + for (unsigned lane = 0; lane < lanes ; lane++) { - return interrupts.prErrorStatus; + linkStatus = linkStatus && interrupts.laneStatusIntr.laneStatus[lane].clockRecoveryDone && + interrupts.laneStatusIntr.laneStatus[lane].channelEqualizationDone && + interrupts.laneStatusIntr.laneStatus[lane].symbolLocked; } - virtual void readPanelReplayError() - { - NvU8 config = 0U; - bool bRetVal = (AuxRetry::ack == - bus.read(NV_DPCD20_PANEL_REPLAY_ERROR_STATUS, - &config, sizeof(config))); + linkStatus = linkStatus && interrupts.laneStatusIntr.interlaneAlignDone; + + return linkStatus; +} - if (bRetVal) +void DPCDHALImpl::refreshLinkStatus() +{ + if (interrupts.laneStatusIntr.linkStatusDirtied) + { + if (caps.supportsESI && + (caps.eDpRevision != NV_DPCD_EDP_REV_VAL_1_4) && + (caps.eDpRevision != NV_DPCD_EDP_REV_VAL_1_4A)) { - if (FLD_TEST_DRF(_DPCD20_PANEL_REPLAY, _ERROR_STATUS, - _ACTIVE_FRAME_CRC_ERROR, _YES, config)) - { - DP_LOG(("DPHAL> ERROR! Active Frame CRC Error set in PanelReplay status register")); - } - if (FLD_TEST_DRF(_DPCD20_PANEL_REPLAY, _ERROR_STATUS, - _RFB_STORAGE_ERROR, _YES, config)) - { - DP_LOG(("DPHAL> ERROR! RFB Storage Error set in PanelReplay status register")); - } - if (FLD_TEST_DRF(_DPCD20_PANEL_REPLAY, _ERROR_STATUS, - _VSC_SDP_UNCORRECTABLE_ERROR, _YES, config)) - { - DP_LOG(("DPHAL> ERROR! VSC SDP Uncorrectable Error set in PanelReplay status register")); - } + this->fetchLinkStatusESI(); } else { - DP_LOG(("DPHAL> readPanelReplayError: Failed to read PanelReplay error status")); + this->fetchLinkStatusLegacy(); } } +} - virtual void clearPanelReplayError() - { - NvU8 irqVector = 0U; - irqVector = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI1, - _PANEL_REPLAY_ERROR_STATUS, _YES, irqVector); - bus.write(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR_ESI1, &irqVector, - sizeof irqVector); - } +void DPCDHALImpl::parseAndReadInterruptsESI() +{ + NvU8 buffer[16] = {0}; + bool automatedTestRequest; - virtual bool getLinkStatusChanged() - { - return interrupts.linkStatusChanged; - } + if (AuxRetry::ack != bus.read(NV_DPCD_SINK_COUNT_ESI, &buffer[2], 0x2005 - 0x2002 + 1)) + return; + + interrupts.sinkCount = DRF_VAL(_DPCD, _SINK_COUNT_ESI, _SINK_COUNT, buffer[2]); - virtual void clearLinkStatusChanged() + // check if edp revision is v1.4 or v1.4a + if ((caps.eDpRevision != NV_DPCD_EDP_REV_VAL_1_4) && (caps.eDpRevision != NV_DPCD_EDP_REV_VAL_1_4A)) { - NvU8 irqVector = 0; - irqVector = FLD_SET_DRF(_DPCD, _LINK_SERVICE_IRQ_VECTOR_ESI0, _LINK_STATUS_CHANGED, _YES, irqVector); - bus.write(NV_DPCD_LINK_SERVICE_IRQ_VECTOR_ESI0, &irqVector, sizeof irqVector); + automatedTestRequest = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _AUTO_TEST, _YES, buffer[3]); } - - virtual bool getHdmiLinkStatusChanged() + else { - return interrupts.hdmiLinkStatusChanged; + // if edp rev is v1.4 or v1.4a, then use legacy address for auto test. + NvU8 legacy = 0; + if (AuxRetry::ack != bus.read(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR, &legacy, 1)) + return; + automatedTestRequest = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR, _AUTO_TEST, _YES, legacy); } - virtual void clearHdmiLinkStatusChanged() + interrupts.cpIRQ = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _CP, _YES, buffer[3]); + interrupts.mccsIRQ = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _MCCS_IRQ, _YES, buffer[3]); + interrupts.downRepMsgRdy = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _DOWN_REP_MSG_RDY, _YES, buffer[3]); + interrupts.upReqMsgRdy = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _UP_REQ_MSG_RDY, _YES, buffer[3]); + + interrupts.prErrorStatus = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI1, + _PANEL_REPLAY_ERROR_STATUS, _YES, buffer[4]); + + interrupts.rxCapChanged = FLD_TEST_DRF(_DPCD, _LINK_SERVICE_IRQ_VECTOR_ESI0, + _RX_CAP_CHANGED, _YES, buffer[5]); + interrupts.linkStatusChanged = FLD_TEST_DRF(_DPCD, _LINK_SERVICE_IRQ_VECTOR_ESI0, + _LINK_STATUS_CHANGED, _YES, buffer[5]); + interrupts.streamStatusChanged = FLD_TEST_DRF(_DPCD, _LINK_SERVICE_IRQ_VECTOR_ESI0, + _STREAM_STATUS_CHANGED, _YES, buffer[5]); + interrupts.hdmiLinkStatusChanged = FLD_TEST_DRF(_DPCD, _LINK_SERVICE_IRQ_VECTOR_ESI0, + _HDMI_LINK_STATUS_CHANGED, _YES, buffer[5]); + + // + // Link status changed bit is not necessarily set at all times when the sink + // loses the lane status. Refresh the lane status in any case on an IRQ + // + if ((caps.eDpRevision != NV_DPCD_EDP_REV_VAL_1_4) && + (caps.eDpRevision != NV_DPCD_EDP_REV_VAL_1_4A)) { - NvU8 irqVector = 0; - irqVector = FLD_SET_DRF(_DPCD, _LINK_SERVICE_IRQ_VECTOR_ESI0, _HDMI_LINK_STATUS_CHANGED, _YES, irqVector); - bus.write(NV_DPCD_LINK_SERVICE_IRQ_VECTOR_ESI0, &irqVector, sizeof irqVector); + fetchLinkStatusESI(); } - - virtual bool getStreamStatusChanged() + else { - return interrupts.streamStatusChanged; + fetchLinkStatusLegacy(); } - virtual void clearStreamStatusChanged() + if (interrupts.linkStatusChanged) { - NvU8 irqVector = 0; - irqVector = FLD_SET_DRF(_DPCD, _LINK_SERVICE_IRQ_VECTOR_ESI0, _STREAM_STATUS_CHANGED, _YES, irqVector); - bus.write(NV_DPCD_LINK_SERVICE_IRQ_VECTOR_ESI0, &irqVector, sizeof irqVector); + this->clearLinkStatusChanged(); } - virtual bool isLinkStatusValid(unsigned lanes) + if (interrupts.rxCapChanged) { - bool linkStatus = true; - this->setDirtyLinkStatus(true); - this->refreshLinkStatus(); - - for (unsigned lane = 0; lane < lanes ; lane++) - { - linkStatus = linkStatus && interrupts.laneStatusIntr.laneStatus[lane].clockRecoveryDone && - interrupts.laneStatusIntr.laneStatus[lane].channelEqualizationDone && - interrupts.laneStatusIntr.laneStatus[lane].symbolLocked; - } - - linkStatus = linkStatus && interrupts.laneStatusIntr.interlaneAlignDone; - - return linkStatus; + DP_PRINTF(DP_WARNING, "DPHAL> RX Capabilities have changed!"); + parseAndReadCaps(); + this->clearInterruptCapabilitiesChanged(); } - virtual void refreshLinkStatus() + if (interrupts.hdmiLinkStatusChanged) { - if (interrupts.laneStatusIntr.linkStatusDirtied) - { - if (caps.supportsESI && - (caps.eDpRevision != NV_DPCD_EDP_REV_VAL_1_4) && - (caps.eDpRevision != NV_DPCD_EDP_REV_VAL_1_4A)) - { - this->fetchLinkStatusESI(); - } - else - { - this->fetchLinkStatusLegacy(); - } - } + this->clearHdmiLinkStatusChanged(); } - virtual void setDirtyLinkStatus(bool dirty) + if (interrupts.prErrorStatus) { - interrupts.laneStatusIntr.linkStatusDirtied = dirty; + this->clearPanelReplayError(); } - void parseAndReadInterruptsESI() - { - NvU8 buffer[16] = {0}; - bool automatedTestRequest; + parseAutomatedTestRequest(automatedTestRequest); +} - if (AuxRetry::ack != bus.read(NV_DPCD_SINK_COUNT_ESI, &buffer[2], 0x2005 - 0x2002 + 1)) - return; +void DPCDHALImpl::readLTTPRLinkStatus(NvS32 rxIndex, NvU8 *buffer) +{ + int addrLane01Status; + // LINK_STATUS for LTTPR is 3 bytes. (NV_DPCD14_PHY_REPEATER_START(i) + 0x20 ~ 0x22) + int bytesToRead = 3; - interrupts.sinkCount = DRF_VAL(_DPCD, _SINK_COUNT_ESI, _SINK_COUNT, buffer[2]); + DP_ASSERT((rxIndex > 0 && rxIndex <= 8) && "Invalid rxIndex"); + // + // NV_DPCD14_PHY_REPEATER_START is 0-based. + // rxIndex is 1-based. + // + addrLane01Status = NV_DPCD14_PHY_REPEATER_START(rxIndex - 1) + + NV_DPCD14_LANE0_1_STATUS_PHY_REPEATER; + bus.read(addrLane01Status, buffer, bytesToRead); +} - // check if edp revision is v1.4 or v1.4a - if ((caps.eDpRevision != NV_DPCD_EDP_REV_VAL_1_4) && (caps.eDpRevision != NV_DPCD_EDP_REV_VAL_1_4A)) - { - automatedTestRequest = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _AUTO_TEST, _YES, buffer[3]); - } - else - { - // if edp rev is v1.4 or v1.4a, then use legacy address for auto test. - NvU8 legacy = 0; - if (AuxRetry::ack != bus.read(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR, &legacy, 1)) - return; - automatedTestRequest = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR, _AUTO_TEST, _YES, legacy); - } +void DPCDHALImpl::resetIntrLaneStatus() +{ + // + // Reset all laneStatus to true. + // These bits can only set to true when all DPRX (including sink and LTTPRs) set + // the corresponding bit to true. Set to true as init value, and later will do &= + // through all the lanes. + // + for (int lane = 0; lane < 4; lane++) + { + interrupts.laneStatusIntr.laneStatus[lane].clockRecoveryDone = true; + interrupts.laneStatusIntr.laneStatus[lane].channelEqualizationDone = true; + interrupts.laneStatusIntr.laneStatus[lane].symbolLocked = true; + } + interrupts.laneStatusIntr.interlaneAlignDone = true; + interrupts.laneStatusIntr.downstmPortChng = true; + interrupts.laneStatusIntr.linkStatusUpdated = true; +} + +void DPCDHALImpl::fetchLinkStatusESI() +{ + NvU8 buffer[16] = {0}; + NvS32 rxIndex; - interrupts.cpIRQ = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _CP, _YES, buffer[3]); - interrupts.mccsIRQ = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _MCCS_IRQ, _YES, buffer[3]); - interrupts.downRepMsgRdy = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _DOWN_REP_MSG_RDY, _YES, buffer[3]); - interrupts.upReqMsgRdy = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _UP_REQ_MSG_RDY, _YES, buffer[3]); + // LINK_STATUS_ESI from 0x200C to 0x200E + int bytesToRead = 3; - interrupts.prErrorStatus = FLD_TEST_DRF(_DPCD, - _DEVICE_SERVICE_IRQ_VECTOR_ESI1, _PANEL_REPLAY_ERROR_STATUS, _YES, buffer[4]); + // Reset all laneStatus to true. + resetIntrLaneStatus(); - interrupts.rxCapChanged = FLD_TEST_DRF(_DPCD, _LINK_SERVICE_IRQ_VECTOR_ESI0, _RX_CAP_CHANGED, _YES, buffer[5]); - interrupts.linkStatusChanged = FLD_TEST_DRF(_DPCD, _LINK_SERVICE_IRQ_VECTOR_ESI0, _LINK_STATUS_CHANGED, _YES, buffer[5]); - interrupts.streamStatusChanged = FLD_TEST_DRF(_DPCD, _LINK_SERVICE_IRQ_VECTOR_ESI0, _STREAM_STATUS_CHANGED, _YES, buffer[5]); - interrupts.hdmiLinkStatusChanged = FLD_TEST_DRF(_DPCD, _LINK_SERVICE_IRQ_VECTOR_ESI0, _HDMI_LINK_STATUS_CHANGED, _YES, buffer[5]); - // - // Link status changed bit is not necessarily set at all times when the sink - // loses the lane status. Refresh the lane status in any case on an IRQ - // - if ((caps.eDpRevision != NV_DPCD_EDP_REV_VAL_1_4) && - (caps.eDpRevision != NV_DPCD_EDP_REV_VAL_1_4A)) + for (rxIndex = caps.phyRepeaterCount; rxIndex >= (NvS32) NV0073_CTRL_DP_DATA_TARGET_SINK; rxIndex--) + { + if (rxIndex != NV0073_CTRL_DP_DATA_TARGET_SINK) { - fetchLinkStatusESI(); + readLTTPRLinkStatus(rxIndex, &buffer[0xC]); } else { - fetchLinkStatusLegacy(); + bus.read(NV_DPCD_LANE0_1_STATUS_ESI, &buffer[0xC], bytesToRead); } - if (interrupts.linkStatusChanged) + for (int lane = 0; lane < 4; lane++) { - this->clearLinkStatusChanged(); + unsigned laneBits = buffer[0xC+lane/2] >> (4*(lane & 1)); + interrupts.laneStatusIntr.laneStatus[lane].clockRecoveryDone &= !!(laneBits & 1); + interrupts.laneStatusIntr.laneStatus[lane].channelEqualizationDone &= !!(laneBits & 2); + interrupts.laneStatusIntr.laneStatus[lane].symbolLocked &= !!(laneBits & 4); } - if (interrupts.rxCapChanged) - { + interrupts.laneStatusIntr.interlaneAlignDone &= + FLD_TEST_DRF(_DPCD, _LANE_ALIGN_STATUS_UPDATED_ESI, _INTERLANE_ALIGN_DONE, _YES, buffer[0xE]); + interrupts.laneStatusIntr.downstmPortChng &= + FLD_TEST_DRF(_DPCD, _LANE_ALIGN_STATUS_UPDATED_ESI, _DOWNSTRM_PORT_STATUS_DONE, _YES, buffer[0xE]); + interrupts.laneStatusIntr.linkStatusUpdated &= + FLD_TEST_DRF(_DPCD, _LANE_ALIGN_STATUS_UPDATED_ESI, _LINK_STATUS_UPDATED, _YES, buffer[0xE]); + } + this->setDirtyLinkStatus(false); +} - DP_LOG(("DPHAL> RX Capabilities have changed!")); - parseAndReadCaps(); - this->clearInterruptCapabilitiesChanged(); - } +void DPCDHALImpl::fetchLinkStatusLegacy() +{ + NvU8 buffer[16] = {0}; + NvS32 rxIndex; + // LINK_STATUS from 0x202 to 0x204 + int bytesToRead = 3; + + // Reset all laneStatus to true. + resetIntrLaneStatus(); - if (interrupts.hdmiLinkStatusChanged) + for (rxIndex = caps.phyRepeaterCount; rxIndex >= (NvS32) NV0073_CTRL_DP_DATA_TARGET_SINK; rxIndex--) + { + if (rxIndex != NV0073_CTRL_DP_DATA_TARGET_SINK) + { + readLTTPRLinkStatus(rxIndex, &buffer[2]); + } + else { - this->clearHdmiLinkStatusChanged(); + bus.read(NV_DPCD_LANE0_1_STATUS, &buffer[2], bytesToRead); } - if (interrupts.prErrorStatus) + for (int lane = 0; lane < 4; lane++) { - this->clearPanelReplayError(); + unsigned laneBits = buffer[2+lane/2] >> (4*(lane & 1)); + interrupts.laneStatusIntr.laneStatus[lane].clockRecoveryDone &= !!(laneBits & 1); + interrupts.laneStatusIntr.laneStatus[lane].channelEqualizationDone &= !!(laneBits & 2); + interrupts.laneStatusIntr.laneStatus[lane].symbolLocked &= !!(laneBits & 4); } - parseAutomatedTestRequest(automatedTestRequest); + interrupts.laneStatusIntr.interlaneAlignDone &= + FLD_TEST_DRF(_DPCD, _LANE_ALIGN_STATUS_UPDATED, _INTERLANE_ALIGN_DONE, _YES, buffer[4]); + interrupts.laneStatusIntr.downstmPortChng &= + FLD_TEST_DRF(_DPCD, _LANE_ALIGN_STATUS_UPDATED, _D0WNSTRM_PORT_STATUS_DONE, _YES, buffer[4]); + interrupts.laneStatusIntr.linkStatusUpdated &= + FLD_TEST_DRF(_DPCD, _LANE_ALIGN_STATUS_UPDATED, _LINK_STATUS_UPDATED, _YES, buffer[4]); } + this->setDirtyLinkStatus(false); +} - void readLTTPRLinkStatus(NvS32 rxIndex, NvU8 *buffer) +bool DPCDHALImpl::readTraining(NvU8* voltageSwingLane, NvU8* preemphasisLane, + NvU8* trainingScoreLane, NvU8* postCursor, + NvU8 activeLaneCount) +{ + NvU8 buffer[0xd] = {0}; + if (voltageSwingLane && preemphasisLane) { - int addrLane01Status; - // LINK_STATUS for LTTPR is 3 bytes. (NV_DPCD14_PHY_REPEATER_START(i) + 0x20 ~ 0x22) - int bytesToRead = 3; + if (AuxRetry::ack != bus.read(NV_DPCD_LANE0_1_ADJUST_REQ, &buffer[0x6], 2)) + { + DP_ASSERT(0 && "Can't read NV_DPCD_LANE0_1_ADJUST_REQ."); + return false; + } + voltageSwingLane[0] = DRF_VAL(_DPCD, _LANEX_XPLUS1_ADJUST_REQ, _LANEX_DRIVE_CURRENT, buffer[6]); + voltageSwingLane[1] = DRF_VAL(_DPCD, _LANEX_XPLUS1_ADJUST_REQ, _LANEXPLUS1_DRIVE_CURRENT, buffer[6]); + voltageSwingLane[2] = DRF_VAL(_DPCD, _LANEX_XPLUS1_ADJUST_REQ, _LANEX_DRIVE_CURRENT, buffer[7]); + voltageSwingLane[3] = DRF_VAL(_DPCD, _LANEX_XPLUS1_ADJUST_REQ, _LANEXPLUS1_DRIVE_CURRENT, buffer[7]); - DP_ASSERT((rxIndex > 0 && rxIndex <= 8) && "Invalid rxIndex"); - // - // NV_DPCD14_PHY_REPEATER_START is 0-based. - // rxIndex is 1-based. - // - addrLane01Status = NV_DPCD14_PHY_REPEATER_START(rxIndex - 1) + - NV_DPCD14_LANE0_1_STATUS_PHY_REPEATER; - bus.read(addrLane01Status, buffer, bytesToRead); - } + preemphasisLane[0] = DRF_VAL(_DPCD, _LANEX_XPLUS1_ADJUST_REQ, _LANEX_PREEMPHASIS, buffer[6]); + preemphasisLane[1] = DRF_VAL(_DPCD, _LANEX_XPLUS1_ADJUST_REQ, _LANEXPLUS1_PREEMPHASIS, buffer[6]); + preemphasisLane[2] = DRF_VAL(_DPCD, _LANEX_XPLUS1_ADJUST_REQ, _LANEX_PREEMPHASIS, buffer[7]); + preemphasisLane[3] = DRF_VAL(_DPCD, _LANEX_XPLUS1_ADJUST_REQ, _LANEXPLUS1_PREEMPHASIS, buffer[7]); - void resetIntrLaneStatus() + } + if (trainingScoreLane) { - // - // Reset all laneStatus to true. - // These bits can only set to true when all DPRX (including sink and LTTPRs) set - // the corresponding bit to true. Set to true as init value, and later will do &= - // through all the lanes. - // - for (int lane = 0; lane < 4; lane++) + if (AuxRetry::ack != bus.read(NV_DPCD_TRAINING_SCORE_LANE(0), &buffer[0x8], 4)) { - interrupts.laneStatusIntr.laneStatus[lane].clockRecoveryDone = true; - interrupts.laneStatusIntr.laneStatus[lane].channelEqualizationDone = true; - interrupts.laneStatusIntr.laneStatus[lane].symbolLocked = true; + DP_ASSERT(0 && "Can't read NV_DPCD_TRAINING_SCORE_LANE(0)."); + return false; } - interrupts.laneStatusIntr.interlaneAlignDone = true; - interrupts.laneStatusIntr.downstmPortChng = true; - interrupts.laneStatusIntr.linkStatusUpdated = true; + trainingScoreLane[0] = buffer[0x8]; + trainingScoreLane[1] = buffer[0x9]; + trainingScoreLane[2] = buffer[0xa]; + trainingScoreLane[3] = buffer[0xb]; } - - void fetchLinkStatusESI() + if (postCursor) { - NvU8 buffer[16] = {0}; - NvS32 rxIndex; - - // LINK_STATUS_ESI from 0x200C to 0x200E - int bytesToRead = 3; - - // Reset all laneStatus to true. - resetIntrLaneStatus(); - - for (rxIndex = caps.phyRepeaterCount; rxIndex >= (NvS32) NV0073_CTRL_DP_DATA_TARGET_SINK; rxIndex--) + if (AuxRetry::ack != bus.read(NV_DPCD_ADJUST_REQ_POST_CURSOR2, &buffer[0xc], 1)) { - if (rxIndex != NV0073_CTRL_DP_DATA_TARGET_SINK) - { - readLTTPRLinkStatus(rxIndex, &buffer[0xC]); - } - else - { - bus.read(NV_DPCD_LANE0_1_STATUS_ESI, &buffer[0xC], bytesToRead); - } - - for (int lane = 0; lane < 4; lane++) - { - unsigned laneBits = buffer[0xC+lane/2] >> (4*(lane & 1)); - interrupts.laneStatusIntr.laneStatus[lane].clockRecoveryDone &= !!(laneBits & 1); - interrupts.laneStatusIntr.laneStatus[lane].channelEqualizationDone &= !!(laneBits & 2); - interrupts.laneStatusIntr.laneStatus[lane].symbolLocked &= !!(laneBits & 4); - } - - interrupts.laneStatusIntr.interlaneAlignDone &= - FLD_TEST_DRF(_DPCD, _LANE_ALIGN_STATUS_UPDATED_ESI, _INTERLANE_ALIGN_DONE, _YES, buffer[0xE]); - interrupts.laneStatusIntr.downstmPortChng &= - FLD_TEST_DRF(_DPCD, _LANE_ALIGN_STATUS_UPDATED_ESI, _DOWNSTRM_PORT_STATUS_DONE, _YES, buffer[0xE]); - interrupts.laneStatusIntr.linkStatusUpdated &= - FLD_TEST_DRF(_DPCD, _LANE_ALIGN_STATUS_UPDATED_ESI, _LINK_STATUS_UPDATED, _YES, buffer[0xE]); + DP_ASSERT(0 && "Can't read NV_DPCD_ADJUST_REQ_POST_CURSOR2."); + return false; } - this->setDirtyLinkStatus(false); + postCursor[0] = DRF_IDX_VAL(_DPCD, _ADJUST_REQ_POST_CURSOR2, _LANE, 0, buffer[0xc]); + postCursor[1] = DRF_IDX_VAL(_DPCD, _ADJUST_REQ_POST_CURSOR2, _LANE, 1, buffer[0xc]); + postCursor[2] = DRF_IDX_VAL(_DPCD, _ADJUST_REQ_POST_CURSOR2, _LANE, 2, buffer[0xc]); + postCursor[3] = DRF_IDX_VAL(_DPCD, _ADJUST_REQ_POST_CURSOR2, _LANE, 3, buffer[0xc]); } + return true; +} - void fetchLinkStatusLegacy() +bool DPCDHALImpl::isLaneSettingsChanged(NvU8* oldVoltageSwingLane, + NvU8* newVoltageSwingLane, + NvU8* oldPreemphasisLane, + NvU8* newPreemphasisLane, + NvU8 activeLaneCount) +{ + for (unsigned i = 0; i < activeLaneCount; i++) { - NvU8 buffer[16] = {0}; - NvS32 rxIndex; - // LINK_STATUS from 0x202 to 0x204 - int bytesToRead = 3; - - // Reset all laneStatus to true. - resetIntrLaneStatus(); - - for (rxIndex = caps.phyRepeaterCount; rxIndex >= (NvS32) NV0073_CTRL_DP_DATA_TARGET_SINK; rxIndex--) + if (oldVoltageSwingLane[i] != newVoltageSwingLane[i] || + oldPreemphasisLane[i] != newPreemphasisLane[i] ) { - if (rxIndex != NV0073_CTRL_DP_DATA_TARGET_SINK) - { - readLTTPRLinkStatus(rxIndex, &buffer[2]); - } - else - { - bus.read(NV_DPCD_LANE0_1_STATUS, &buffer[2], bytesToRead); - } - - for (int lane = 0; lane < 4; lane++) - { - unsigned laneBits = buffer[2+lane/2] >> (4*(lane & 1)); - interrupts.laneStatusIntr.laneStatus[lane].clockRecoveryDone &= !!(laneBits & 1); - interrupts.laneStatusIntr.laneStatus[lane].channelEqualizationDone &= !!(laneBits & 2); - interrupts.laneStatusIntr.laneStatus[lane].symbolLocked &= !!(laneBits & 4); - } - - interrupts.laneStatusIntr.interlaneAlignDone &= - FLD_TEST_DRF(_DPCD, _LANE_ALIGN_STATUS_UPDATED, _INTERLANE_ALIGN_DONE, _YES, buffer[4]); - interrupts.laneStatusIntr.downstmPortChng &= - FLD_TEST_DRF(_DPCD, _LANE_ALIGN_STATUS_UPDATED, _D0WNSTRM_PORT_STATUS_DONE, _YES, buffer[4]); - interrupts.laneStatusIntr.linkStatusUpdated &= - FLD_TEST_DRF(_DPCD, _LANE_ALIGN_STATUS_UPDATED, _LINK_STATUS_UPDATED, _YES, buffer[4]); + return true; } - this->setDirtyLinkStatus(false); } + return false; +} - virtual bool readTraining(NvU8* voltageSwingLane, NvU8* preemphasisLane, - NvU8* trainingScoreLane, NvU8* postCursor, - NvU8 activeLaneCount) - { - NvU8 buffer[0xd] = {0}; - if (voltageSwingLane && preemphasisLane) - { - if (AuxRetry::ack != bus.read(NV_DPCD_LANE0_1_ADJUST_REQ, &buffer[0x6], 2)) - { - DP_ASSERT(0 && "Can't read NV_DPCD_LANE0_1_ADJUST_REQ."); - return false; - } - voltageSwingLane[0] = DRF_VAL(_DPCD, _LANEX_XPLUS1_ADJUST_REQ, _LANEX_DRIVE_CURRENT, buffer[6]); - voltageSwingLane[1] = DRF_VAL(_DPCD, _LANEX_XPLUS1_ADJUST_REQ, _LANEXPLUS1_DRIVE_CURRENT, buffer[6]); - voltageSwingLane[2] = DRF_VAL(_DPCD, _LANEX_XPLUS1_ADJUST_REQ, _LANEX_DRIVE_CURRENT, buffer[7]); - voltageSwingLane[3] = DRF_VAL(_DPCD, _LANEX_XPLUS1_ADJUST_REQ, _LANEXPLUS1_DRIVE_CURRENT, buffer[7]); +bool DPCDHALImpl::setPowerState(PowerState newState) +{ + NvU8 timeoutMs = 0; - preemphasisLane[0] = DRF_VAL(_DPCD, _LANEX_XPLUS1_ADJUST_REQ, _LANEX_PREEMPHASIS, buffer[6]); - preemphasisLane[1] = DRF_VAL(_DPCD, _LANEX_XPLUS1_ADJUST_REQ, _LANEXPLUS1_PREEMPHASIS, buffer[6]); - preemphasisLane[2] = DRF_VAL(_DPCD, _LANEX_XPLUS1_ADJUST_REQ, _LANEX_PREEMPHASIS, buffer[7]); - preemphasisLane[3] = DRF_VAL(_DPCD, _LANEX_XPLUS1_ADJUST_REQ, _LANEXPLUS1_PREEMPHASIS, buffer[7]); + if (newState == PowerStateD0) + timeoutMs = caps.extendedSleepWakeTimeoutRequestMs; - } - if (trainingScoreLane) + // Default behavior is 2ms for better tolerance. + if (timeoutMs < 2) + timeoutMs = 2; + + // + // A Branch Device must forward this value to its downstream devices. + // When set to D3 state, a Sink Device may put its AUX CH circuit in a "power + // saving" state. In this mode the AUX CH circuit may only detect the presence of a + // differential signal input without replying to an AUX CH request transaction. Upon + // detecting the presence of a differential signal input, the Sink Device must exit the + // "power saving" state within 1ms. + // + if (isAtLeastVersion(1, 1)) + { + NvU8 data = 0; + if (newState == PowerStateD0) + data |= NV_DPCD_SET_POWER_VAL_D0_NORMAL; + else if (newState == PowerStateD3) { - if (AuxRetry::ack != bus.read(NV_DPCD_TRAINING_SCORE_LANE(0), &buffer[0x8], 4)) + if (caps.extendedSleepWakeTimeoutRequestMs > 1) { - DP_ASSERT(0 && "Can't read NV_DPCD_TRAINING_SCORE_LANE(0)."); - return false; + NvU8 grant = 0; + // Grant extended sleep wake timeout before go D3. + grant = FLD_SET_DRF(_DPCD, _EXTENDED_DPRX_WAKE_TIMEOUT, _PERIOD_GRANTED, _YES, grant); + if (AuxRetry::ack == bus.write(NV_DPCD_EXTENDED_DPRX_WAKE_TIMEOUT, &grant, sizeof(grant))) + { + DP_PRINTF(DP_ERROR, "DisplayPort: Failed to grant extended sleep wake timeout before D3"); + } } - trainingScoreLane[0] = buffer[0x8]; - trainingScoreLane[1] = buffer[0x9]; - trainingScoreLane[2] = buffer[0xa]; - trainingScoreLane[3] = buffer[0xb]; + data = NV_DPCD_SET_POWER_VAL_D3_PWRDWN; } - if (postCursor) + else { - if (AuxRetry::ack != bus.read(NV_DPCD_ADJUST_REQ_POST_CURSOR2, &buffer[0xc], 1)) - { - DP_ASSERT(0 && "Can't read NV_DPCD_ADJUST_REQ_POST_CURSOR2."); - return false; - } - postCursor[0] = DRF_IDX_VAL(_DPCD, _ADJUST_REQ_POST_CURSOR2, _LANE, 0, buffer[0xc]); - postCursor[1] = DRF_IDX_VAL(_DPCD, _ADJUST_REQ_POST_CURSOR2, _LANE, 1, buffer[0xc]); - postCursor[2] = DRF_IDX_VAL(_DPCD, _ADJUST_REQ_POST_CURSOR2, _LANE, 2, buffer[0xc]); - postCursor[3] = DRF_IDX_VAL(_DPCD, _ADJUST_REQ_POST_CURSOR2, _LANE, 3, buffer[0xc]); + DP_ASSERT(0 && "Unknown power state"); } - return true; - } - virtual bool isLaneSettingsChanged(NvU8* oldVoltageSwingLane, - NvU8* newVoltageSwingLane, - NvU8* oldPreemphasisLane, - NvU8* newPreemphasisLane, - NvU8 activeLaneCount) - { - for (unsigned i = 0; i < activeLaneCount; i++) + // + // If we're powering on, we need to allow up to 1ms for the power + // to come online. Ideally we'd handle this with a callback, + // but for now we're going to do a wait here. + // + Timeout timeout(timer, timeoutMs); + unsigned retries = 0; + + do { - if (oldVoltageSwingLane[i] != newVoltageSwingLane[i] || - oldPreemphasisLane[i] != newPreemphasisLane[i] ) + if (AuxRetry::ack == bus.write(NV_DPCD_SET_POWER, &data, sizeof(data))) { return true; } + retries++; } - return false; - } + while (timeout.valid() || (retries < 40) /* some panels need up to 40 retries */); - void parseAndReadInterruptsLegacy() + DP_PRINTF(DP_ERROR, "DisplayPort: Failed to bring panel back to wake state"); + } + else { - bool automatedTestRequest = false; - NvU8 buffer[16] = {0}; - - if (AuxRetry::ack != bus.read(NV_DPCD_SINK_COUNT, &buffer[0], 2)) - return; + // DP 1.0 devices cannot be put to sleep + if (newState == PowerStateD0) + return true; + } + + return false; +} - interrupts.sinkCount = NV_DPCD_SINK_COUNT_VAL(buffer[0]); +void DPCDHALImpl::parseAndReadInterruptsLegacy() +{ + bool automatedTestRequest = false; + NvU8 buffer[16] = {0}; - automatedTestRequest = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR, _AUTO_TEST, _YES, buffer[1]); - interrupts.cpIRQ = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR, _CP, _YES, buffer[1]); - interrupts.mccsIRQ = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR, _MCCS_IRQ, _YES, buffer[1]); - interrupts.downRepMsgRdy = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR, _DOWN_REP_MSG_RDY, _YES, buffer[1]); - interrupts.upReqMsgRdy = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR, _UP_REQ_MSG_RDY, _YES, buffer[1]); + if (AuxRetry::ack != bus.read(NV_DPCD_SINK_COUNT, &buffer[0], 2)) + return; - fetchLinkStatusLegacy(); - this->setDirtyLinkStatus(false); + interrupts.sinkCount = NV_DPCD_SINK_COUNT_VAL(buffer[0]); - parseAutomatedTestRequest(automatedTestRequest); - } + automatedTestRequest = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR, _AUTO_TEST, _YES, buffer[1]); + interrupts.cpIRQ = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR, _CP, _YES, buffer[1]); + interrupts.mccsIRQ = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR, _MCCS_IRQ, _YES, buffer[1]); + interrupts.downRepMsgRdy = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR, _DOWN_REP_MSG_RDY, _YES, buffer[1]); + interrupts.upReqMsgRdy = FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR, _UP_REQ_MSG_RDY, _YES, buffer[1]); - void parseAndReadInterrupts() + fetchLinkStatusLegacy(); + this->setDirtyLinkStatus(false); + + parseAutomatedTestRequest(automatedTestRequest); +} + +void DPCDHALImpl::clearInterruptContentProtection() +{ + if (caps.supportsESI) { - if (caps.supportsESI) - parseAndReadInterruptsESI(); // DP 1.2 should use the new ESI region - else - parseAndReadInterruptsLegacy(); + NvU8 irqVector = 0; - } + irqVector = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _CP, _YES, irqVector); - virtual int getSinkCount() // DPCD offset 200 + bus.write(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR_ESI0, &irqVector, sizeof irqVector); + } + else { - return interrupts.sinkCount; + NvU8 irqVector = 0; + + irqVector = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR, _CP, _YES, irqVector); + + bus.write(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR, &irqVector, sizeof irqVector); } +} - // - // This was introduced as part of WAR for HP SDC Panel since their - // TCON sets DPCD 0x200 SINK_COUNT=0. It should never be called to - // set the SinkCount in other cases since SinkCount comes from DPCD. - // - virtual void setSinkCount(int sinkCount) +void DPCDHALImpl::clearInterruptMCCS() +{ + if (caps.supportsESI) + { + NvU8 irqVector = 0; + irqVector = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _MCCS_IRQ, _YES, irqVector); + bus.write(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR_ESI0, &irqVector, sizeof irqVector); + } + else { - interrupts.sinkCount = sinkCount; + NvU8 irqVector = 0; + irqVector = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR, _MCCS_IRQ, _YES, irqVector); + bus.write(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR, &irqVector, sizeof irqVector); } +} - virtual bool interruptContentProtection() +void DPCDHALImpl::clearInterruptDownReplyReady() +{ + if (caps.supportsESI) + { + NvU8 irqVector = 0; + irqVector = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _DOWN_REP_MSG_RDY, _YES, irqVector); + bus.write(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR_ESI0, &irqVector, sizeof irqVector); + } + else { - return interrupts.cpIRQ; + NvU8 irqVector = 0; + irqVector = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR, _DOWN_REP_MSG_RDY, _YES, irqVector); + bus.write(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR, &irqVector, sizeof irqVector); } +} - virtual void clearInterruptContentProtection() +void DPCDHALImpl::clearInterruptUpRequestReady() +{ + if (caps.supportsESI) { - if (caps.supportsESI) - { - NvU8 irqVector = 0; + NvU8 irqVector = 0; + irqVector = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _UP_REQ_MSG_RDY, _YES, irqVector); + bus.write(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR_ESI0, &irqVector, sizeof irqVector); + } + else + { + NvU8 irqVector = 0; + irqVector = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR, _UP_REQ_MSG_RDY, _YES, irqVector); + bus.write(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR, &irqVector, sizeof irqVector); + } +} - irqVector = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _CP, _YES, irqVector); +// DPCD offset 0x68000 +bool DPCDHALImpl::getBKSV(NvU8 *bKSV) +{ + if (caps.revisionMajor <= 0) + DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - bus.write(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR_ESI0, &irqVector, sizeof irqVector); - } - else - { - NvU8 irqVector = 0; + if (AuxRetry::ack == bus.read(NV_DPCD_HDCP_BKSV_OFFSET, &bKSV[0], HDCP_KSV_SIZE)) + { + DP_PRINTF(DP_NOTICE, "Found HDCP Bksv= %02x %02x %02x %02x %02x", + bKSV[4], bKSV[3], bKSV[2], bKSV[1], bKSV[0]); + return true; + } + return false; +} - irqVector = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR, _CP, _YES, irqVector); +// DPCD offset 0x68028 +bool DPCDHALImpl::getBCaps(BCaps &bCaps, NvU8 * rawByte) +{ + NvU8 buffer; + if (caps.revisionMajor <= 0) + DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - bus.write(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR, &irqVector, sizeof irqVector); - } + if (AuxRetry::ack == bus.read(NV_DPCD_HDCP_BCAPS_OFFSET, &buffer, sizeof buffer)) + { + bCaps.HDCPCapable = FLD_TEST_DRF(_DPCD, _HDCP_BCAPS_OFFSET, _HDCP_CAPABLE, _YES, buffer); + bCaps.repeater = FLD_TEST_DRF(_DPCD, _HDCP_BCAPS_OFFSET, _HDCP_REPEATER, _YES, buffer); + if (rawByte) + *rawByte = buffer; + return true; } - virtual bool intteruptMCCS() + DP_ASSERT(!"Unable to get BCaps"); + return false; +} + +// DPCD offset 0x6921D +bool DPCDHALImpl::getHdcp22BCaps(BCaps &bCaps, NvU8 *rawByte) +{ + NvU8 buffer; + if (caps.revisionMajor <= 0) + DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); + + if (AuxRetry::ack == bus.read(NV_DPCD_HDCP22_BCAPS_OFFSET, &buffer, sizeof buffer)) { - return interrupts.mccsIRQ; + bCaps.HDCPCapable = FLD_TEST_DRF(_DPCD, _HDCP22_BCAPS_OFFSET, _HDCP_CAPABLE, _YES, buffer); + bCaps.repeater = FLD_TEST_DRF(_DPCD, _HDCP22_BCAPS_OFFSET, _HDCP_REPEATER, _YES, buffer); + if (rawByte) + *rawByte = buffer; + return true; } - virtual void clearInterruptMCCS() + DP_ASSERT(!"Unable to get 22BCaps"); + return false; +} + +// DPCD offset 0x6802A +bool DPCDHALImpl::getBinfo(BInfo &bInfo) +{ + NvU16 buffer; + if (caps.revisionMajor <= 0) + DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); + + if (AuxRetry::ack == bus.read(NV_DPCD_HDCP_BINFO_OFFSET, (NvU8*)&buffer, sizeof buffer)) { - if (caps.supportsESI) - { - NvU8 irqVector = 0; - irqVector = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _MCCS_IRQ, _YES, irqVector); - bus.write(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR_ESI0, &irqVector, sizeof irqVector); - } - else - { - NvU8 irqVector = 0; - irqVector = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR, _MCCS_IRQ, _YES, irqVector); - bus.write(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR, &irqVector, sizeof irqVector); - } + bInfo.maxCascadeExceeded = FLD_TEST_DRF(_DPCD_HDCP, _BINFO_OFFSET, _MAX_CASCADE_EXCEEDED, _TRUE, buffer); + bInfo.depth = DRF_VAL(_DPCD_HDCP, _BINFO_OFFSET, _DEPTH, buffer); + bInfo.maxDevsExceeded = FLD_TEST_DRF(_DPCD_HDCP, _BINFO_OFFSET, _MAX_DEVS_EXCEEDED, _TRUE, buffer); + bInfo.deviceCount = DRF_VAL(_DPCD_HDCP, _BINFO_OFFSET, _DEVICE_COUNT, buffer); + return true; } - virtual bool interruptDownReplyReady() + DP_ASSERT(!"Unable to get Binfo"); + return false; +} + +// Get RxStatus per provided HDCP cap +bool DPCDHALImpl::getRxStatus(const HDCPState &hdcpState, NvU8 *data) +{ + if (caps.revisionMajor <= 0) + DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); + + NvU32 addr = hdcpState.HDCP_State_22_Capable ? + NV_DPCD_HDCP22_RX_STATUS : NV_DPCD_HDCP_BSTATUS_OFFSET; + + if (AuxRetry::ack == bus.read(addr, data, sizeof(NvU8))) { - return interrupts.downRepMsgRdy; + return true; } - virtual bool interruptUpRequestReady() + DP_ASSERT(!"Unable to get RxStatus//Bstatus"); + return false; +} + +AuxRetry::status DPCDHALImpl::setTestResponse(bool ack, bool edidChecksumWrite) +{ + NvU8 testResponse = 0; + + if (caps.revisionMajor <= 0) + DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); + + if (ack) + testResponse = FLD_SET_DRF(_DPCD, _TEST_RESPONSE, _TEST_ACK, _YES, testResponse); + else + testResponse = FLD_SET_DRF(_DPCD, _TEST_RESPONSE, _TEST_NACK, _YES, testResponse); + + if (edidChecksumWrite) + testResponse = FLD_SET_DRF(_DPCD, _TEST_RESPONSE, _TEST_EDID_CHKSUM_WRITE, _YES, testResponse); + + return bus.write(NV_DPCD_TEST_RESPONSE, &testResponse, sizeof testResponse); +} + +PowerState DPCDHALImpl::getPowerState() +{ + NvU8 data; + if (AuxRetry::ack != bus.read(NV_DPCD_SET_POWER, &data, sizeof data, 0)) { - return interrupts.upReqMsgRdy; + // Assume powerdown state + return PowerStateD3; } - virtual void clearInterruptDownReplyReady() + switch (DRF_VAL(_DPCD, _SET_POWER, _VAL, data)) { - if (caps.supportsESI) - { - NvU8 irqVector = 0; - irqVector = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _DOWN_REP_MSG_RDY, _YES, irqVector); - bus.write(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR_ESI0, &irqVector, sizeof irqVector); - } - else + case NV_DPCD_SET_POWER_VAL_D3_PWRDWN: + return PowerStateD3; + + case NV_DPCD_SET_POWER_VAL_D0_NORMAL: + return PowerStateD0; + + case NV_DPCD_SET_POWER_VAL_D3_AUX_ON: { - NvU8 irqVector = 0; - irqVector = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR, _DOWN_REP_MSG_RDY, _YES, irqVector); - bus.write(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR, &irqVector, sizeof irqVector); + DP_ASSERT(isAtLeastVersion(1, 2) && "DP 1.2 specific power state to be set on a non-DP1.2 system!?"); + return PowerStateD3AuxOn; } + default: + DP_ASSERT(0 && "Unknown power state! Assuming device is asleep"); + return PowerStateD3; } +} + +void DPCDHALImpl::payloadTableClearACT() +{ + NvU8 byte = NV_DPCD_PAYLOAD_TABLE_UPDATE_STATUS_UPDATED_YES; + bus.write(NV_DPCD_PAYLOAD_TABLE_UPDATE_STATUS, &byte, sizeof byte); +} + +bool DPCDHALImpl::payloadWaitForACTReceived() +{ + NvU8 byte = 0; + int retries = 0; - virtual void clearInterruptUpRequestReady() + while (true) { - if (caps.supportsESI) + if (++retries > 40) { - NvU8 irqVector = 0; - irqVector = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _UP_REQ_MSG_RDY, _YES, irqVector); - bus.write(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR_ESI0, &irqVector, sizeof irqVector); + DP_PRINTF(DP_ERROR, "DPHAL> ACT Not received by sink device!"); + return false; } - else + + if (AuxRetry::ack == bus.read(NV_DPCD_PAYLOAD_TABLE_UPDATE_STATUS, &byte, sizeof byte)) { - NvU8 irqVector = 0; - irqVector = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR, _UP_REQ_MSG_RDY, _YES, irqVector); - bus.write(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR, &irqVector, sizeof irqVector); + if (FLD_TEST_DRF(_DPCD, _PAYLOAD_TABLE_UPDATE_STATUS, _ACT_HANDLED, _YES, byte)) + { + DP_PRINTF(DP_NOTICE, "DPHAL> ACT Received"); + return true; + } } } +} - virtual bool getLaneStatusSymbolLock(int lane) - { - return interrupts.laneStatusIntr.laneStatus[lane].symbolLocked; - } +bool DPCDHALImpl::payloadAllocate(unsigned streamId, unsigned begin, unsigned count) +{ + bool bResult = false; + NvU8 payloadAllocate[3]; + DP_ASSERT(streamId < 64 && "Invalid stream location"); + payloadAllocate[0] = (NvU8)streamId; + payloadAllocate[1] = (NvU8)begin; + payloadAllocate[2] = (NvU8)count; - virtual bool getLaneStatusClockRecoveryDone(int lane) - { - return interrupts.laneStatusIntr.laneStatus[lane].clockRecoveryDone; - } + AuxRetry::status status = bus.write(NV_DPCD_PAYLOAD_ALLOC_SET, (NvU8*)&payloadAllocate, sizeof payloadAllocate); - virtual bool getInterlaneAlignDone() // DPCD offset 204 + if (status == AuxRetry::ack) { - return interrupts.laneStatusIntr.interlaneAlignDone; - } + // + // Bit 0 = VC Payload Table Updated(Change/Read only) + // 1 = Update, cleared to zero when u Packet Source writes 1 + // 0 = Not updated since the last time this bit was cleared + // + NvU8 payloadStatus; + int retries = 0; - virtual bool getDownStreamPortStatusChange() + // + // Bug 1385165 that Synaptics branch revision 1.0 found to spend more than 200ms before table updated. + // Retries without delay is too soon for device to complete table update process. + // That will hit bug 1334070 and trigger monitor unplug/hotplug at early return. + // + do + { + if ((bus.read(NV_DPCD_PAYLOAD_TABLE_UPDATE_STATUS, &payloadStatus, sizeof(payloadStatus)) == AuxRetry::ack)) + { + if (FLD_TEST_DRF(_DPCD, _PAYLOAD_TABLE_UPDATE_STATUS, _UPDATED, _YES, payloadStatus)) + { + bResult = true; + break; + } + } + else + { + DP_PRINTF(DP_ERROR, "DPHAL> Read NV_DPCD_PAYLOAD_TABLE_UPDATE_STATUS failed."); + } + + timer->sleep(1); + } while (++retries < PAYLOADIDTABLE_UPDATED_CHECK_RETRIES); + } + else { - return interrupts.laneStatusIntr.downstmPortChng; + DP_PRINTF(DP_ERROR, "DPHAL> Send NV_DPCD_PAYLOAD_ALLOC_SET failed."); } - virtual bool getPendingTestRequestTraining() // DPCD offset 218 + DP_PRINTF(DP_NOTICE, "DPHAL> Requesting allocation Stream:%d | First Slot:%d | Count:%d (%s)", + streamId, begin, count, bResult ? "OK" : "FAILED"); + return bResult; +} + +void DPCDHALImpl::setGpuDPSupportedVersions(NvU32 _gpuDPSupportedVersions) +{ + bool bSupportDp1_2 = FLD_TEST_DRF(0073_CTRL_CMD_DP, _GET_CAPS_DP_VERSIONS_SUPPORTED, _DP1_2, + _YES, _gpuDPSupportedVersions); + bool bSupportDp1_4 = FLD_TEST_DRF(0073_CTRL_CMD_DP, _GET_CAPS_DP_VERSIONS_SUPPORTED, _DP1_4, + _YES, _gpuDPSupportedVersions); + + if (bSupportDp1_4) { - return interrupts.testTraining.testRequestTraining; + DP_ASSERT(bSupportDp1_2 && "GPU supports DP1.4 should also support DP1.2!"); } - virtual bool getPendingAutomatedTestRequest() + gpuDPSupportedVersions = _gpuDPSupportedVersions; +} + +void DPCDHALImpl::applyRegkeyOverrides(const DP_REGKEY_DATABASE& dpRegkeyDatabase) +{ + DP_ASSERT(dpRegkeyDatabase.bInitialized && + "All regkeys are invalid because dpRegkeyDatabase is not initialized!"); + overrideDpcdRev = dpRegkeyDatabase.dpcdRevOveride; + bBypassILREdpRevCheck = dpRegkeyDatabase.bBypassEDPRevCheck; +} + +bool DPCDHALImpl::clearPendingMsg() +{ + NvU8 irqVector, data = 0; + if (AuxRetry::ack == bus.read(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR_ESI0, + &irqVector, sizeof(irqVector))) { - return interrupts.automatedTestRequest; - } + if (FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _DOWN_REP_MSG_RDY, _YES, irqVector)) + { + // Clear pending DOWN_REP. + data = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _DOWN_REP_MSG_RDY, _YES, 0); + } + if (FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _UP_REQ_MSG_RDY, _YES, irqVector)) + { + // Clear pending UP_REQ + data = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _UP_REQ_MSG_RDY, _YES, data); + } + if (!data || + (AuxRetry::ack != bus.write(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR_ESI0, + &data, sizeof(data)))) + { + DP_PRINTF(DP_ERROR, "DPCONN> %s(): No Pending Message or " + "Failed to clear pending message: irqVector/data = 0x%08x/0x%08x", + __FUNCTION__, irqVector, data); + return false; + } - virtual bool getPendingTestRequestEdidRead() + return true; + } + else { - return interrupts.testEdid.testRequestEdidRead; + DP_PRINTF(DP_ERROR, "DPCONN> Clear Pending MSG: Failed to read ESI0"); } - virtual bool getPendingTestRequestPhyCompliance() + return false; +} + +bool DPCDHALImpl::isMessagingEnabled() +{ + NvU8 mstmCtrl; + + if ((AuxRetry::ack == bus.read(NV_DPCD_MSTM_CTRL, &mstmCtrl, 1)) && + (FLD_TEST_DRF(_DPCD, _MSTM_CTRL, _EN, _YES, mstmCtrl))) { - return interrupts.testPhyCompliance.testRequestPhyCompliance; + return true; } + return false; +} - virtual void getTestRequestTraining(LinkRate & rate, unsigned & lanes) // DPCD offset 219, 220 +NvU16 * DPCDHALImpl::getLinkRateTable() +{ + if (!bIndexedLinkrateCapable) { - rate = interrupts.testTraining.testRequestLinkRate; - lanes = interrupts.testTraining.testRequestLaneCount; + DP_PRINTF(DP_ERROR, "DPCONN> link rate table is invalid"); } + return &caps.linkRateTable[0]; +} + +bool DPCDHALImpl::getRawLinkRateTable(NvU8 *buffer) +{ + NvU16 temp[NV_DPCD_SUPPORTED_LINK_RATES__SIZE]; + NvU8 *data = (buffer == NULL) ? (NvU8*)&temp[0] : buffer; - virtual LinkQualityPatternType getPhyTestPattern() // DPCD offset 248 + if (AuxRetry::ack != bus.read(NV_DPCD_SUPPORTED_LINK_RATES(0), data, + NV_DPCD_SUPPORTED_LINK_RATES__SIZE * sizeof(NvU16))) { - return interrupts.testPhyCompliance.phyTestPattern; + return false; } + return true; +} - virtual void getCustomTestPattern(NvU8 *testPattern) // DPCD offset 250 - 259 - { - int i; +bool DPCDHALImpl::setSourceControlMode(bool bEnableSourceControlMode, bool bEnableFRLMode) +{ + NvU8 data = 0; - for (i = 0; i < 10; i++) + if (bEnableSourceControlMode) + { + data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _SRC_CONTROL_MODE, _ENABLE, data); + if (bEnableFRLMode) { - testPattern[i] = interrupts.eightyBitCustomPat[i]; + data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _LINK_FRL_MODE, _ENABLE, data); + data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _IRQ_LINK_FRL_MODE, _ENABLE, data); } - } - - virtual bool getBKSV(NvU8 *bKSV) //DPCD offset 0x68000 - { - if (caps.revisionMajor <= 0) - DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - - if (AuxRetry::ack == bus.read(NV_DPCD_HDCP_BKSV_OFFSET, &bKSV[0], HDCP_KSV_SIZE)) + else { - DP_LOG(("Found HDCP Bksv= %02x %02x %02x %02x %02x", - bKSV[4], bKSV[3], bKSV[2], bKSV[1], bKSV[0])); - return true; + data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _LINK_FRL_MODE, _DISABLE, data); + data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _IRQ_LINK_FRL_MODE, _DISABLE, data); } - return false; } - - virtual bool getBCaps(BCaps &bCaps, NvU8 * rawByte) //DPCD offset 0x68028 + else { - NvU8 buffer; - if (caps.revisionMajor <= 0) - DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - - if (AuxRetry::ack == bus.read(NV_DPCD_HDCP_BCAPS_OFFSET, &buffer, sizeof buffer)) - { - bCaps.HDCPCapable = FLD_TEST_DRF(_DPCD, _HDCP_BCAPS_OFFSET, _HDCP_CAPABLE, _YES, buffer); - bCaps.repeater = FLD_TEST_DRF(_DPCD, _HDCP_BCAPS_OFFSET, _HDCP_REPEATER, _YES, buffer); - if (rawByte) - *rawByte = buffer; - return true; - } + data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _SRC_CONTROL_MODE, _DISABLE, data); + data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _LINK_FRL_MODE, _DISABLE, data); + data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _IRQ_LINK_FRL_MODE, _DISABLE, data); + } - DP_ASSERT(!"Unable to get BCaps"); + if (AuxRetry::ack != bus.write(NV_DPCD14_PCON_FRL_LINK_CONFIG_1, &data, sizeof(data))) + { return false; } + return true; +} + +bool DPCDHALImpl::checkPCONFrlReady(bool *bFrlReady) +{ + NvU8 data = 0; - virtual bool getHdcp22BCaps(BCaps &bCaps, NvU8 *rawByte) //DPCD offset 0x6921D + if (bFrlReady == NULL) { - NvU8 buffer; - if (caps.revisionMajor <= 0) - DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); + DP_ASSERT(0); + return true; + } - if (AuxRetry::ack == bus.read(NV_DPCD_HDCP22_BCAPS_OFFSET, &buffer, sizeof buffer)) - { - bCaps.HDCPCapable = FLD_TEST_DRF(_DPCD, _HDCP22_BCAPS_OFFSET, _HDCP_CAPABLE, _YES, buffer); - bCaps.repeater = FLD_TEST_DRF(_DPCD, _HDCP22_BCAPS_OFFSET, _HDCP_REPEATER, _YES, buffer); - if (rawByte) - *rawByte = buffer; - return true; - } + *bFrlReady = false; - DP_ASSERT(!"Unable to get 22BCaps"); + if (AuxRetry::ack != bus.read(NV_DPCD_LINK_SERVICE_IRQ_VECTOR_ESI0, &data, sizeof(data))) + { return false; } - virtual bool getBinfo(BInfo &bInfo) //DPCD offset 0x6802A + if (data == 0) { - NvU16 buffer; - if (caps.revisionMajor <= 0) - DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - - if (AuxRetry::ack == bus.read(NV_DPCD_HDCP_BINFO_OFFSET, (NvU8*)&buffer, sizeof buffer)) - { - bInfo.maxCascadeExceeded = FLD_TEST_DRF(_DPCD_HDCP, _BINFO_OFFSET, _MAX_CASCADE_EXCEEDED, _TRUE, buffer); - bInfo.depth = DRF_VAL(_DPCD_HDCP, _BINFO_OFFSET, _DEPTH, buffer); - bInfo.maxDevsExceeded = FLD_TEST_DRF(_DPCD_HDCP, _BINFO_OFFSET, _MAX_DEVS_EXCEEDED, _TRUE, buffer); - bInfo.deviceCount = DRF_VAL(_DPCD_HDCP, _BINFO_OFFSET, _DEVICE_COUNT, buffer); - return true; - } - - DP_ASSERT(!"Unable to get Binfo"); return false; } - // Get RxStatus per provided HDCP cap - virtual bool getRxStatus(const HDCPState &hdcpState, NvU8 *data) + if (FLD_TEST_DRF(_DPCD, _LINK_SERVICE_IRQ_VECTOR_ESI0, _HDMI_LINK_STATUS_CHANGED, _NO, data)) { - if (caps.revisionMajor <= 0) - DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - - NvU32 addr = hdcpState.HDCP_State_22_Capable ? - NV_DPCD_HDCP22_RX_STATUS : NV_DPCD_HDCP_BSTATUS_OFFSET; - - if (AuxRetry::ack == bus.read(addr, data, sizeof(NvU8))) - { - return true; - } - - DP_ASSERT(!"Unable to get RxStatus//Bstatus"); + parseAndReadInterruptsESI(); return false; } - virtual AuxRetry::status setTestResponseChecksum(NvU8 checksum) - { - if (caps.revisionMajor <= 0) - DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); + // Clear only this interrupt bit. + this->clearHdmiLinkStatusChanged(); - return bus.write(NV_DPCD_TEST_EDID_CHKSUM, &checksum, sizeof checksum); + if (AuxRetry::ack != bus.read(NV_DPCD14_PCON_HDMI_TX_LINK_STATUS, &data, sizeof(data))) + { + return false; } - virtual AuxRetry::status setTestResponse(bool ack, bool edidChecksumWrite) + if (FLD_TEST_DRF(_DPCD14, _PCON_HDMI_TX_LINK_STATUS, _LINK_READY, _YES, data)) { - NvU8 testResponse = 0; - - if (caps.revisionMajor <= 0) - DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - - if (ack) - testResponse = FLD_SET_DRF(_DPCD, _TEST_RESPONSE, _TEST_ACK, _YES, testResponse); - else - testResponse = FLD_SET_DRF(_DPCD, _TEST_RESPONSE, _TEST_NACK, _YES, testResponse); + *bFrlReady = true; + } + return true; +} - if (edidChecksumWrite) - testResponse = FLD_SET_DRF(_DPCD, _TEST_RESPONSE, _TEST_EDID_CHKSUM_WRITE, _YES, testResponse); +bool DPCDHALImpl::setupPCONFrlLinkAssessment(NvU32 linkBwMask, + bool bEnableExtendLTMode, + bool bEnableConcurrentMode) +{ + NvU8 data = 0; - return bus.write(NV_DPCD_TEST_RESPONSE, &testResponse, sizeof testResponse); - } + // +1 to convert PCONHdmiLinkBw enum to DPCD FRL BW cap definition + NvU32 requestedMaxBw = (NvU32)(getMaxFrlBwFromMask(linkBwMask)) + 1; + NvU32 targetBw = NV_MIN(caps.pconCaps.maxHdmiLinkBandwidthGbps, + requestedMaxBw); - // Message box encoding - virtual AuxRetry::status writeDownRequestMessageBox(NvU8 * data, size_t length) + // Step 1: Configure FRL Link (FRL BW, BW mask / Concurrent) + if (bEnableExtendLTMode) { // - // We can assume no message was sent if this fails. - // Reasoning: - // Sinks are not allowed to DEFER except on the first 16 byte write. - // If there isn't enough room for the 48 byte packet, that write - // will defer. + // Set FRL_LT_CONTROL to Extended mode: + // PCON FW trains for all Link BW selected in Link BW Mask (Bit 0~5) // - return bus.write(NV_DPCD_MBOX_DOWN_REQ, data, (unsigned)length); + data = linkBwMask; + data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_2, _FRL_LT_CONTROL, + _EXTENDED, data); + } + else + { + // Set FRL_LT_CONTROL to Normal mode, so PCON stops when first FRL LT succeed. + data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_2, _FRL_LT_CONTROL, + _NORMAL, data); } - virtual size_t getDownRequestMessageBoxSize() + if (AuxRetry::ack != bus.write(NV_DPCD14_PCON_FRL_LINK_CONFIG_2, &data, sizeof(data))) { - return DP_MESSAGEBOX_SIZE; + return false; } - virtual AuxRetry::status writeUpReplyMessageBox(NvU8 * data, size_t length) + if (AuxRetry::ack != bus.read(NV_DPCD14_PCON_FRL_LINK_CONFIG_1, &data, sizeof(data))) { - if (caps.revisionMajor <= 0) - DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); + return false; + } + if (bEnableConcurrentMode && caps.pconCaps.bConcurrentLTSupported) + { + // Client selects concurrent. + data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _CONCURRENT_LT_MODE, + _ENABLE, data); + } + else + { // - // We can assume no message was sent if this fails. - // Reasoning: - // Sinks are not allowed to DEFER except on the first 16 byte write. - // If there isn't enough room for the 48 byte packet, that write - // will defer. + // Don't do concurrent LT for now. // - return bus.write(NV_DPCD_MBOX_UP_REP, data, (unsigned)length); + data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _CONCURRENT_LT_MODE, + _DISABLE, data); } + data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _HDMI_LINK, + _ENABLE, data); + data = FLD_SET_DRF_NUM(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _MAX_LINK_BW, + targetBw, data); - virtual size_t getUpReplyMessageBoxSize() + if (AuxRetry::ack != bus.write(NV_DPCD14_PCON_FRL_LINK_CONFIG_1, &data, sizeof(data))) { - return 48; + return false; } - virtual AuxRetry::status readDownReplyMessageBox(NvU32 offset, NvU8 * data, size_t length) - { - // if (caps.revisionMajor <= 0) - // DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - - DP_ASSERT(offset + length <= DP_MESSAGEBOX_SIZE); + return true; +} - return bus.read(NV_DPCD_MBOX_DOWN_REP + offset, data, (unsigned)length); - } +bool DPCDHALImpl::checkPCONFrlLinkStatus(NvU32 *frlRateMask) +{ + NvU8 data = 0; - virtual size_t getDownReplyMessageBoxSize() + if (frlRateMask == NULL) { - return DP_MESSAGEBOX_SIZE; + DP_ASSERT(0); + return true; } - virtual AuxRetry::status readUpRequestMessageBox(NvU32 offset, NvU8 * data, size_t length) + *frlRateMask = 0; + // Check if IRQ happens. + if (AuxRetry::ack != bus.read(NV_DPCD_LINK_SERVICE_IRQ_VECTOR_ESI0, &data, sizeof(data))) { - if (caps.revisionMajor <= 0) - DP_ASSERT(0 && "Something is wrong, revision major should be > 0"); - - DP_ASSERT(offset + length <= DP_MESSAGEBOX_SIZE); - - return bus.read(NV_DPCD_MBOX_UP_REQ + offset, data, (unsigned)length); + return false; } - virtual size_t getUpRequestMessageBoxSize() + if (FLD_TEST_DRF(_DPCD, _LINK_SERVICE_IRQ_VECTOR_ESI0, _HDMI_LINK_STATUS_CHANGED, _NO, data)) { - return DP_MESSAGEBOX_SIZE; + return false; } - - virtual size_t getTransactionSize() + // Check HDMI Link Active status (0x303B Bit 0) and Link Config (0x3036) + if (AuxRetry::ack != bus.read(NV_DPCD14_PCON_HDMI_TX_LINK_STATUS, &data, sizeof(data))) { - return bus.getDirect()->transactionSize(); + return false; } - virtual PowerState getPowerState() + if (FLD_TEST_DRF(_DPCD14, _PCON_HDMI_TX_LINK_STATUS, _LINK_ACTIVE, _YES, data)) { - NvU8 data; - if (AuxRetry::ack != bus.read(NV_DPCD_SET_POWER, &data, sizeof data, 0)) + if (AuxRetry::ack == bus.read(NV_DPCD14_PCON_HDMI_LINK_CONFIG_STATUS, &data, sizeof(data))) { - // Assume powerdown state - return PowerStateD3; + *frlRateMask = DRF_VAL(_DPCD14, _PCON_HDMI_LINK_CONFIG_STATUS, _LT_RESULT, data); } - switch (DRF_VAL(_DPCD, _SET_POWER, _VAL, data)) - { - case NV_DPCD_SET_POWER_VAL_D3_PWRDWN: - return PowerStateD3; + } - case NV_DPCD_SET_POWER_VAL_D0_NORMAL: - return PowerStateD0; + return true; +} - case NV_DPCD_SET_POWER_VAL_D3_AUX_ON: - { - DP_ASSERT(isAtLeastVersion(1, 2) && "DP 1.2 specific power state to be set on a non-DP1.2 system!?"); - return PowerStateD3AuxOn; - } - default: - DP_ASSERT(0 && "Unknown power state! Assuming device is asleep"); - return PowerStateD3; - } - } +bool DPCDHALImpl::queryHdmiLinkStatus(bool *bLinkActive, bool *bLinkReady) +{ + NvU8 data = 0; - virtual bool setPowerState(PowerState newState) - { - NvU8 timeoutMs = 0; + if (bLinkActive == NULL && bLinkReady == NULL) + return false; - if (newState == PowerStateD0) - timeoutMs = caps.extendedSleepWakeTimeoutRequestMs; + if (AuxRetry::ack != bus.read(NV_DPCD14_PCON_HDMI_TX_LINK_STATUS, &data, sizeof(data))) + { + return false; + } + if (bLinkReady != NULL) + { + *bLinkReady = (FLD_TEST_DRF(_DPCD14, _PCON_HDMI_TX_LINK_STATUS, + _LINK_READY, _YES, data)); + } + if (bLinkActive != NULL) + { + *bLinkActive = (FLD_TEST_DRF(_DPCD14, _PCON_HDMI_TX_LINK_STATUS, + _LINK_ACTIVE, _YES, data)); + } + return true; +} - // Default behavior is 2ms for better tolerance. - if (timeoutMs < 2) - timeoutMs = 2; +NvU32 DPCDHALImpl::restorePCONFrlLink(NvU32 linkBwMask, + bool bEnableExtendLTMode, + bool bEnableConcurrentMode) +{ + // Restore HDMI Link. + // 1. Clear HDMI link enable bit (305A bit 7) + NvU8 data = 0; + NvU32 loopCount; + NvU32 frlRate; + if (AuxRetry::ack != bus.read(NV_DPCD14_PCON_FRL_LINK_CONFIG_1, &data, sizeof(data))) + { + return false; + } + data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _HDMI_LINK, _DISABLE, data); + if (AuxRetry::ack != bus.write(NV_DPCD14_PCON_FRL_LINK_CONFIG_1, &data, sizeof(data))) + { + return false; + } + // 2. Set FRL or TMDS (Optional if not changed) (305A bit 5) + // 3. Read FRL Ready Bit (303B bit 1) - // - // A Branch Device must forward this value to its downstream devices. - // When set to D3 state, a Sink Device may put its AUX CH circuit in a "power - // saving" state. In this mode the AUX CH circuit may only detect the presence of a - // differential signal input without replying to an AUX CH request transaction. Upon - // detecting the presence of a differential signal input, the Sink Device must exit the - // "power saving" state within 1ms. - // - if (isAtLeastVersion(1, 1)) - { - NvU8 data = 0; - if (newState == PowerStateD0) - data |= NV_DPCD_SET_POWER_VAL_D0_NORMAL; - else if (newState == PowerStateD3) - { - if (caps.extendedSleepWakeTimeoutRequestMs > 1) - { - NvU8 grant = 0; - // Grant extended sleep wake timeout before go D3. - grant = FLD_SET_DRF(_DPCD, _EXTENDED_DPRX_WAKE_TIMEOUT, _PERIOD_GRANTED, _YES, grant); - if (AuxRetry::ack == bus.write(NV_DPCD_EXTENDED_DPRX_WAKE_TIMEOUT, &grant, sizeof(grant))) - { - DP_LOG(("DisplayPort: Failed to grant extended sleep wake timeout before D3\n")); - } - } - data = NV_DPCD_SET_POWER_VAL_D3_PWRDWN; - } - else - { - DP_ASSERT(0 && "Unknown power state"); - } - - // - // If we're powering on, we need to allow up to 1ms for the power - // to come online. Ideally we'd handle this with a callback, - // but for now we're going to do a wait here. - // - Timeout timeout(timer, timeoutMs); - unsigned retries = 0; - - do - { - if (AuxRetry::ack == bus.write(NV_DPCD_SET_POWER, &data, sizeof(data))) - { - return true; - } - retries++; - } - while (timeout.valid() || (retries < 40) /* some panels need up to 40 retries */); - - DP_LOG(("DisplayPort: Failed to bring panel back to wake state")); - } - else - { - // DP 1.0 devices cannot be put to sleep - if (newState == PowerStateD0) - return true; - } + Timeout timeout(timer, 500 /* 500ms */); + data = 0; + do + { + if (AuxRetry::ack != bus.read(NV_DPCD14_PCON_HDMI_TX_LINK_STATUS, + &data, sizeof(data))) + continue; + if (FLD_TEST_DRF(_DPCD14, _PCON_HDMI_TX_LINK_STATUS, _LINK_READY, _YES, data)) + break; + } while (timeout.valid()); + if (FLD_TEST_DRF(_DPCD14, _PCON_HDMI_TX_LINK_STATUS, _LINK_READY, _NO, data)) + { return false; } - virtual void payloadTableClearACT() + // 4. Configure FRL Link (Optional if not changed) + // 5. Set HDMI Enable Bit. + data = 0; + + if (AuxRetry::ack != bus.read(NV_DPCD14_PCON_FRL_LINK_CONFIG_1, &data, sizeof(data))) { - NvU8 byte = NV_DPCD_PAYLOAD_TABLE_UPDATE_STATUS_UPDATED_YES; - bus.write(NV_DPCD_PAYLOAD_TABLE_UPDATE_STATUS, &byte, sizeof byte); + return false; } - - virtual bool payloadWaitForACTReceived() + data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _HDMI_LINK, _ENABLE, data); + if (AuxRetry::ack != bus.write(NV_DPCD14_PCON_FRL_LINK_CONFIG_1, &data, sizeof(data))) { - NvU8 byte = 0; - int retries = 0; - - while (true) - { - if (++retries > 40) - { - DP_LOG(("DPHAL> ACT Not received by sink device!")); - return false; - } - - if (AuxRetry::ack == bus.read(NV_DPCD_PAYLOAD_TABLE_UPDATE_STATUS, &byte, sizeof byte)) - { - if (FLD_TEST_DRF(_DPCD, _PAYLOAD_TABLE_UPDATE_STATUS, _ACT_HANDLED, _YES, byte)) - { - DP_LOG(("DPHAL> ACT Received")); - return true; - } - } - } + return false; } - virtual bool payloadAllocate(unsigned streamId, unsigned begin, unsigned count) + // 6. Read HDMI Link Status link active bit (2005 bit 3) + // 7. Read HDMI link active status bit and link config status (303b bit0 / 3036) + loopCount = NV_PCON_FRL_LT_TIMEOUT_THRESHOLD; + do { - bool bResult = false; - NvU8 payloadAllocate[3]; - DP_ASSERT(streamId < 64 && "Invalid stream location"); - payloadAllocate[0] = (NvU8)streamId; - payloadAllocate[1] = (NvU8)begin; - payloadAllocate[2] = (NvU8)count; - - AuxRetry::status status = bus.write(NV_DPCD_PAYLOAD_ALLOC_SET, (NvU8*)&payloadAllocate, sizeof payloadAllocate); - - if (status == AuxRetry::ack) + if (checkPCONFrlLinkStatus(&frlRate) == true) { - // - // Bit 0 = VC Payload Table Updated(Change/Read only) - // 1 = Update, cleared to zero when u Packet Source writes 1 - // 0 = Not updated since the last time this bit was cleared - // - NvU8 payloadStatus; - int retries = 0; + break; + } + Timeout timeout(this->timer, NV_PCON_FRL_LT_TIMEOUT_INTERVAL_MS); + while(timeout.valid()); + continue; + } while (--loopCount); - // - // Bug 1385165 that Synaptics branch revision 1.0 found to spend more than 200ms before table updated. - // Retries without delay is too soon for device to complete table update process. - // That will hit bug 1334070 and trigger monitor unplug/hotplug at early return. - // - do - { - if ((bus.read(NV_DPCD_PAYLOAD_TABLE_UPDATE_STATUS, &payloadStatus, sizeof(payloadStatus)) == AuxRetry::ack)) - { - if (FLD_TEST_DRF(_DPCD, _PAYLOAD_TABLE_UPDATE_STATUS, _UPDATED, _YES, payloadStatus)) - { - bResult = true; - break; - } - } - else - { - DP_LOG(("DPHAL> Read NV_DPCD_PAYLOAD_TABLE_UPDATE_STATUS failed.")); - } + return frlRate; +} - timer->sleep(1); - } while (++retries < PAYLOADIDTABLE_UPDATED_CHECK_RETRIES); - } - else - { - DP_LOG(("DPHAL> Send NV_DPCD_PAYLOAD_ALLOC_SET failed.")); - } +bool DPCDHALImpl::updatePsrConfiguration(vesaPsrConfig psrcfg) +{ + NvU8 config = 0U; - DP_LOG(("DPHAL> Requesting allocation Stream:%d | First Slot:%d | Count:%d (%s)", streamId, begin, count, bResult ? "OK" : "FAILED")); - return bResult; + if (psrcfg.psrCfgEnable) + { + config = FLD_SET_DRF(_DPCD_EDP, _PSR_CONFIG, + _SINK_ENABLE, _YES, config); } - - void overrideMultiStreamCap(bool mstCapable) + if (psrcfg.srcTxEnabledInPsrActive) { - caps.overrideToSST = !mstCapable; + config = FLD_SET_DRF(_DPCD_EDP, _PSR_CONFIG, + _SOURCE_LINK_ACTIVE, _YES, config); } - - bool getMultiStreamCapOverride() + if (psrcfg.crcVerifEnabledInPsrActive) { - return caps.overrideToSST; + config = FLD_SET_DRF(_DPCD_EDP, _PSR_CONFIG, + _CRC_VERIFICATION_ACTIVE, _YES, config); } - - bool getDpcdMultiStreamCap(void) + if (psrcfg.frameCaptureSecondActiveFrame) { - return caps.supportsMultistream; + config = FLD_SET_DRF(_DPCD_EDP, _PSR_CONFIG, + _FRAME_CAPTURE_INDICATION, _SECOND, config); } - - void setGpuDPSupportedVersions(NvU32 _gpuDPSupportedVersions) + if (psrcfg.selectiveUpdateOnSecondActiveline) { - bool bSupportDp1_2 = FLD_TEST_DRF(0073_CTRL_CMD_DP, _GET_CAPS_DP_VERSIONS_SUPPORTED, _DP1_2, _YES, gpuDPSupportedVersions); - bool bSupportDp1_4 = FLD_TEST_DRF(0073_CTRL_CMD_DP, _GET_CAPS_DP_VERSIONS_SUPPORTED, _DP1_4, _YES, gpuDPSupportedVersions); - if (bSupportDp1_4) - { - DP_ASSERT(bSupportDp1_2 && "GPU supports DP1.4 should also support DP1.2!"); - } - - gpuDPSupportedVersions = _gpuDPSupportedVersions; + config = FLD_SET_DRF(_DPCD_EDP, _PSR_CONFIG, + _SU_LINE_CAPTURE_INDICATION, _SECOND, config); } - - void setGpuFECSupported(bool bSupportFEC) + if (psrcfg.enableHpdIrqOnCrcMismatch) { - bGpuFECSupported = bSupportFEC; + config = FLD_SET_DRF(_DPCD_EDP, _PSR_CONFIG, + _HPD_IRQ_ON_CRC_ERROR, _YES, config); } - - void applyRegkeyOverrides(const DP_REGKEY_DATABASE& dpRegkeyDatabase) + if (psrcfg.enablePsr2) { - DP_ASSERT(dpRegkeyDatabase.bInitialized && - "All regkeys are invalid because dpRegkeyDatabase is not initialized!"); - overrideDpcdRev = dpRegkeyDatabase.dpcdRevOveride; - bBypassILREdpRevCheck = dpRegkeyDatabase.bBypassEDPRevCheck; + config = FLD_SET_DRF(_DPCD_EDP, _PSR_CONFIG, + _ENABLE_PSR2, _YES, config); } - // To clear pending message {DOWN_REP/UP_REQ} and reply true if existed. - virtual bool clearPendingMsg() - { - NvU8 irqVector, data = 0; - if (AuxRetry::ack == bus.read(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR_ESI0, - &irqVector, sizeof(irqVector))) - { - if (FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _DOWN_REP_MSG_RDY, _YES, irqVector)) - { - // Clear pending DOWN_REP. - data = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _DOWN_REP_MSG_RDY, _YES, 0); - } - if (FLD_TEST_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _UP_REQ_MSG_RDY, _YES, irqVector)) - { - // Clear pending UP_REQ - data = FLD_SET_DRF(_DPCD, _DEVICE_SERVICE_IRQ_VECTOR_ESI0, _UP_REQ_MSG_RDY, _YES, data); - } - if (!data || - (AuxRetry::ack != bus.write(NV_DPCD_DEVICE_SERVICE_IRQ_VECTOR_ESI0, - &data, sizeof(data)))) - { - DP_LOG(("DPCONN> %s(): No Pending Message or " - "Failed to clear pending message: irqVector/data = 0x%08x/0x%08x", - __FUNCTION__, irqVector, data)); - return false; - } + return AuxRetry::ack == + bus.write(NV_DPCD_EDP_PSR_CONFIG, &config, 1); +} - return true; - } - else - { - DP_LOG(("DPCONN> Clear Pending MSG: Failed to read ESI0")); - } +bool DPCDHALImpl::readPsrConfiguration(vesaPsrConfig *psrcfg) +{ + NvU8 config = 0U; + bool retVal = AuxRetry::ack == + bus.read(NV_DPCD_EDP_PSR_CONFIG, &config, 1); + + psrcfg->psrCfgEnable = + FLD_TEST_DRF(_DPCD_EDP, _PSR_CONFIG, _SINK_ENABLE, _YES, config); + psrcfg->srcTxEnabledInPsrActive = + FLD_TEST_DRF(_DPCD_EDP, _PSR_CONFIG, _SOURCE_LINK_ACTIVE, _YES, config); + psrcfg->crcVerifEnabledInPsrActive = + FLD_TEST_DRF(_DPCD_EDP, _PSR_CONFIG, _CRC_VERIFICATION_ACTIVE, + _YES, config); + psrcfg->frameCaptureSecondActiveFrame = + FLD_TEST_DRF(_DPCD_EDP, _PSR_CONFIG, _FRAME_CAPTURE_INDICATION, + _SECOND, config); + psrcfg->selectiveUpdateOnSecondActiveline = + FLD_TEST_DRF(_DPCD_EDP, _PSR_CONFIG, + _SU_LINE_CAPTURE_INDICATION, _SECOND, config); + psrcfg->enableHpdIrqOnCrcMismatch = + FLD_TEST_DRF(_DPCD_EDP, _PSR_CONFIG, _HPD_IRQ_ON_CRC_ERROR, _YES, config); + psrcfg->enablePsr2 = + FLD_TEST_DRF(_DPCD_EDP, _PSR_CONFIG, _ENABLE_PSR2, _YES, config); + + return retVal; +} - return false; - } +bool DPCDHALImpl::readPsrState(vesaPsrState *psrState) +{ + NvU8 config = 0U; + bool retVal = AuxRetry::ack == + bus.read(NV_DPCD_PANEL_SELF_REFRESH_STATUS, &config, 1); - virtual bool isMessagingEnabled() + if (retVal) { - NvU8 mstmCtrl; - - if ((AuxRetry::ack == bus.read(NV_DPCD_MSTM_CTRL, &mstmCtrl, 1)) && - (FLD_TEST_DRF(_DPCD, _MSTM_CTRL, _EN, _YES, mstmCtrl))) - { - return true; - } - return false; + *psrState = + (vesaPsrState)DRF_VAL(_DPCD, _PANEL_SELF_REFRESH_STATUS, + _VAL, config); } + return retVal; +} - virtual void setIndexedLinkrateEnabled(bool val) - { - bIndexedLinkrateEnabled = val; - } +bool DPCDHALImpl::readPsrDebugInfo(vesaPsrDebugStatus *psrDbgState) +{ + NvU8 config[2] = { 0U , 0U }; + bool retVal = AuxRetry::ack == + bus.read(NV_DPCD_PANEL_SELF_REFRESH_DEBUG0, + &config[0], sizeof(config)); + + if (retVal) + { + psrDbgState->maxResyncFrames = + DRF_VAL(_DPCD_PANEL_SELF_REFRESH, + _DEBUG0, _MAX_RESYNC_FRAME_CNT, config[0]); + psrDbgState->actualResyncFrames = + DRF_VAL(_DPCD_PANEL_SELF_REFRESH, + _DEBUG0, _LAST_RESYNC_FRAME_CNT, config[0]); + + psrDbgState->lastSdpPsrState = + !!DRF_VAL(_DPCD_PANEL_SELF_REFRESH, _LAST_SDP, + _PSR_STATE_BIT, config[1]); + psrDbgState->lastSdpUpdateRfb = + !!DRF_VAL(_DPCD_PANEL_SELF_REFRESH, _LAST_SDP, + _RFB_BIT, config[1]); + psrDbgState->lastSdpCrcValid = + !!DRF_VAL(_DPCD_PANEL_SELF_REFRESH, _LAST_SDP, + _CRC_VALID_BIT, config[1]); + psrDbgState->lastSdpSuValid = + !!DRF_VAL(_DPCD_PANEL_SELF_REFRESH, _LAST_SDP, + _SU_VALID_BIT, config[1]); + psrDbgState->lastSdpFirstSURcvd = + !!DRF_VAL(_DPCD_PANEL_SELF_REFRESH, _LAST_SDP, + _SU_FIRST_LINE_RCVD, config[1]); + psrDbgState->lastSdpLastSURcvd = + !!DRF_VAL(_DPCD_PANEL_SELF_REFRESH, _LAST_SDP, + _SU_LAST_LINE_RCVD, config[1]); + psrDbgState->lastSdpYCoordValid = + !!DRF_VAL(_DPCD_PANEL_SELF_REFRESH, _LAST_SDP, + _Y_CORD_VALID, config[1]); + } + return retVal; +} - virtual bool isIndexedLinkrateEnabled() - { - return bIndexedLinkrateEnabled; - } +bool DPCDHALImpl::writePsrErrorStatus(vesaPsrErrorStatus psrErr) +{ + NvU8 config = 0U; + config = FLD_SET_DRF_NUM(_DPCD_PANEL_SELF_REFRESH, + _ERR_STATUS, + _LINK_CRC_ERR, + psrErr.linkCrcError, + config); + config = FLD_SET_DRF_NUM(_DPCD_PANEL_SELF_REFRESH, + _ERR_STATUS, + _RFB_ERR, + psrErr.rfbStoreError, + config); + config = FLD_SET_DRF_NUM(_DPCD_PANEL_SELF_REFRESH, + _ERR_STATUS, + _VSC_SDP_ERR, + psrErr.vscSdpError, + config); + + return AuxRetry::ack == bus.write( + NV_DPCD_PANEL_SELF_REFRESH_ERR_STATUS, &config, 1); +} - virtual bool isIndexedLinkrateCapable() - { - return bIndexedLinkrateCapable; - } +bool DPCDHALImpl::readPsrErrorStatus(vesaPsrErrorStatus *psrErr) +{ + NvU8 config = 0U; + bool retVal; + retVal = AuxRetry::ack == bus.read( + NV_DPCD_PANEL_SELF_REFRESH_ERR_STATUS, + &config, sizeof(config)); + + if (retVal) + { + psrErr->vscSdpError = FLD_TEST_DRF(_DPCD, + _PANEL_SELF_REFRESH_ERR_STATUS, + _LINK_CRC_ERR, _YES, config); + psrErr->rfbStoreError = FLD_TEST_DRF(_DPCD, + _PANEL_SELF_REFRESH_ERR_STATUS, + _RFB_ERR, _YES, config); + psrErr->linkCrcError = FLD_TEST_DRF(_DPCD, + _PANEL_SELF_REFRESH_ERR_STATUS, + _VSC_SDP_ERR, + _YES, config); + } + return retVal; +} - virtual NvU16 *getLinkRateTable() +bool DPCDHALImpl::writePsrEvtIndicator(vesaPsrEventIndicator psrEvt) +{ + NvU8 config = 0U; + + if (psrEvt.sinkCapChange) { - if (!bIndexedLinkrateCapable) - { - DP_LOG(("DPCONN> link rate table should be invalid")); - } - return &caps.linkRateTable[0]; + config = FLD_SET_DRF(_DPCD, + _PANEL_SELF_REFRESH_EVENT_STATUS, + _CAP_CHANGE, + _YES, config); } + return AuxRetry::ack == bus.write( + NV_DPCD_PANEL_SELF_REFRESH_EVENT_STATUS, &config, 1); +} - virtual NvU32 getVideoFallbackSupported() +bool DPCDHALImpl::readPsrEvtIndicator(vesaPsrEventIndicator *psrEvt) +{ + NvU8 config = 0U; + bool retVal; + retVal = AuxRetry::ack == bus.read( + NV_DPCD_PANEL_SELF_REFRESH_EVENT_STATUS, + &config, sizeof(config)); + + if (retVal) { - return caps.videoFallbackFormats; + psrEvt->sinkCapChange = DRF_VAL(_DPCD, + _PANEL_SELF_REFRESH_EVENT_STATUS, + _CAP_CHANGE, + config); } + return retVal; +} - virtual bool getRawLinkRateTable(NvU8 *buffer) - { - NvU16 temp[NV_DPCD_SUPPORTED_LINK_RATES__SIZE]; - NvU8 *data = (buffer == NULL) ? (NvU8*)&temp[0] : buffer; +bool DPCDHALImpl::readPrSinkDebugInfo(panelReplaySinkDebugInfo *prDbgInfo) +{ + NvU8 config = 0U; + bool bRetVal = (AuxRetry::ack == + bus.read(NV_DPCD20_PANEL_REPLAY_ERROR_STATUS, + &config, sizeof(config))); - if (AuxRetry::ack != bus.read(NV_DPCD_SUPPORTED_LINK_RATES(0), data, - NV_DPCD_SUPPORTED_LINK_RATES__SIZE * sizeof(NvU16))) - { - return false; - } - return true; + if (bRetVal) + { + prDbgInfo->activeFrameCrcError = + FLD_TEST_DRF(_DPCD20_PANEL_REPLAY, _ERROR_STATUS, + _ACTIVE_FRAME_CRC_ERROR, _YES, config); + prDbgInfo->rfbStorageError = + FLD_TEST_DRF(_DPCD20_PANEL_REPLAY, _ERROR_STATUS, + _RFB_STORAGE_ERROR, _YES, config); + prDbgInfo->vscSdpUncorrectableError = + FLD_TEST_DRF(_DPCD20_PANEL_REPLAY, _ERROR_STATUS, + _VSC_SDP_UNCORRECTABLE_ERROR, _YES, config); + prDbgInfo->adaptiveSyncSdpMissing = + FLD_TEST_DRF(_DPCD20_PANEL_REPLAY, _ERROR_STATUS, + _ADAPTIVE_SYNC_SDP_MISSING, _YES, config); } - - virtual void resetProtocolConverter() + else { - NvU8 data = 0; - bus.write(NV_DPCD14_PCON_FRL_LINK_CONFIG_1, &data, sizeof(data)); - bus.write(NV_DPCD14_PCON_FRL_LINK_CONFIG_2, &data, sizeof(data)); - + DP_PRINTF(DP_ERROR, "DPHAL> readPrSinkDebugInfo: Failed to read PanelReplay error status"); + return bRetVal; } - virtual bool setSourceControlMode(bool bEnableSourceControlMode, bool bEnableFRLMode) + config = 0U; + bRetVal = (AuxRetry::ack == + bus.read(NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS, + &config, sizeof(config))); + if (bRetVal) { - NvU8 data = 0; + prDbgInfo->sinkPrStatus = DRF_VAL(_DPCD20, + _PANEL_REPLAY_AND_FRAME_LOCK_STATUS, _PR_STATUS, config); - if (bEnableSourceControlMode) - { - data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _SRC_CONTROL_MODE, _ENABLE, data); - if (bEnableFRLMode) - { - data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _LINK_FRL_MODE, _ENABLE, data); - data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _IRQ_LINK_FRL_MODE, _ENABLE, data); - } - else - { - data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _LINK_FRL_MODE, _DISABLE, data); - data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _IRQ_LINK_FRL_MODE, _DISABLE, data); - } - } - else - { - data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _SRC_CONTROL_MODE, _DISABLE, data); - data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _LINK_FRL_MODE, _DISABLE, data); - data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _IRQ_LINK_FRL_MODE, _DISABLE, data); - } + prDbgInfo->sinkFramelocked = DRF_VAL(_DPCD20, + _PANEL_REPLAY_AND_FRAME_LOCK_STATUS, _SINK_FRAME_LOCKED, config); - if (AuxRetry::ack != bus.write(NV_DPCD14_PCON_FRL_LINK_CONFIG_1, &data, sizeof(data))) - { - return false; - } - return true; + prDbgInfo->sinkFrameLockedValid = + FLD_TEST_DRF(_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS, + _SINK_FRAME_LOCKED, _VALID, _YES, config); } - - virtual bool checkPCONFrlReady(bool *bFrlReady) + else { - NvU8 data = 0; - - if (bFrlReady == NULL) - { - DP_ASSERT(0); - return true; - } - - *bFrlReady = false; - - if (AuxRetry::ack != bus.read(NV_DPCD_LINK_SERVICE_IRQ_VECTOR_ESI0, &data, sizeof(data))) - { - return false; - } - - if (data == 0) - { - return false; - } - - if (FLD_TEST_DRF(_DPCD, _LINK_SERVICE_IRQ_VECTOR_ESI0, _HDMI_LINK_STATUS_CHANGED, _NO, data)) - { - parseAndReadInterruptsESI(); - return false; - } - - // Clear only this interrupt bit. - this->clearHdmiLinkStatusChanged(); - - if (AuxRetry::ack != bus.read(NV_DPCD14_PCON_HDMI_TX_LINK_STATUS, &data, sizeof(data))) - { - return false; - } - - if (FLD_TEST_DRF(_DPCD14, _PCON_HDMI_TX_LINK_STATUS, _LINK_READY, _YES, data)) - { - *bFrlReady = true; - } - return true; + DP_PRINTF(DP_ERROR, "DPHAL> readPanelReplayError: Failed to read PanelReplay frame lock status"); + return bRetVal; } - virtual bool setupPCONFrlLinkAssessment(NvU32 linkBwMask, - bool bEnableExtendLTMode = false, - bool bEnableConcurrentMode = false) + config = 0U; + bRetVal = AuxRetry::ack == + bus.read(NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO, + &config, sizeof(config)); + if (bRetVal) { - NvU8 data = 0; - - NvU32 requestedMaxBw = (NvU32)(getMaxFrlBwFromMask(linkBwMask)) + 1; // +1 to convert PCONHdmiLinkBw enum to DPCD FRL BW cap definition - NvU32 targetBw = NV_MIN(caps.pconCaps.maxHdmiLinkBandwidthGbps, - requestedMaxBw); - - // Step 1: Configure FRL Link (FRL BW, BW mask / Concurrent) - if (bEnableExtendLTMode) - { - // - // Set FRL_LT_CONTROL to Extended mode: - // PCON FW trains for all Link BW selected in Link BW Mask (Bit 0~5) - // - data = linkBwMask; - data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_2, _FRL_LT_CONTROL, - _EXTENDED, data); - } - else - { - // Set FRL_LT_CONTROL to Normal mode, so PCON stops when first FRL LT succeed. - data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_2, _FRL_LT_CONTROL, - _NORMAL, data); - } - - if (AuxRetry::ack != bus.write(NV_DPCD14_PCON_FRL_LINK_CONFIG_2, &data, sizeof(data))) - { - return false; - } - - if (AuxRetry::ack != bus.read(NV_DPCD14_PCON_FRL_LINK_CONFIG_1, &data, sizeof(data))) - { - return false; - } - - if (bEnableConcurrentMode && caps.pconCaps.bConcurrentLTSupported) - { - // Client selects concurrent. - data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _CONCURRENT_LT_MODE, - _ENABLE, data); - } - else - { - // - // Don't do concurrent LT for now. - // - data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _CONCURRENT_LT_MODE, - _DISABLE, data); - } - data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _HDMI_LINK, - _ENABLE, data); - data = FLD_SET_DRF_NUM(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _MAX_LINK_BW, - targetBw, data); - - if (AuxRetry::ack != bus.write(NV_DPCD14_PCON_FRL_LINK_CONFIG_1, &data, sizeof(data))) - { - return false; - } - - return true; + prDbgInfo->currentPrState = + FLD_TEST_DRF(_DPCD20_PANEL_REPLAY_DEBUG_LAST, + _VSC_SDP_CARRYING_PR_INFO, _STATE, _ACTIVE, config); + prDbgInfo->crcValid = + FLD_TEST_DRF(_DPCD20_PANEL_REPLAY_DEBUG_LAST, + _VSC_SDP_CARRYING_PR_INFO, _CRC_VALID, _YES, config); + prDbgInfo->suCoordinatesValid = + FLD_TEST_DRF(_DPCD20_PANEL_REPLAY_DEBUG_LAST, + _VSC_SDP_CARRYING_PR_INFO, _SU_COORDINATE_VALID, + _YES, config); } - - virtual bool checkPCONFrlLinkStatus(NvU32 *frlRateMask) + else { - NvU8 data = 0; - - if (frlRateMask == NULL) - { - DP_ASSERT(0); - return true; - } - - *frlRateMask = 0; - // Check if IRQ happens. - if (AuxRetry::ack != bus.read(NV_DPCD_LINK_SERVICE_IRQ_VECTOR_ESI0, &data, sizeof(data))) - { - return false; - } - - if (FLD_TEST_DRF(_DPCD, _LINK_SERVICE_IRQ_VECTOR_ESI0, _HDMI_LINK_STATUS_CHANGED, _NO, data)) - { - return false; - } - // Check HDMI Link Active status (0x303B Bit 0) and Link Config (0x3036) - if (AuxRetry::ack != bus.read(NV_DPCD14_PCON_HDMI_TX_LINK_STATUS, &data, sizeof(data))) - { - return false; - } - - if (FLD_TEST_DRF(_DPCD14, _PCON_HDMI_TX_LINK_STATUS, _LINK_ACTIVE, _YES, data)) - { - if (AuxRetry::ack == bus.read(NV_DPCD14_PCON_HDMI_LINK_CONFIG_STATUS, &data, sizeof(data))) - { - *frlRateMask = DRF_VAL(_DPCD14, _PCON_HDMI_LINK_CONFIG_STATUS, _LT_RESULT, data); - } - - } - - return true; + DP_PRINTF(DP_ERROR, "DPHAL> readPanelReplayError: Failed to read PanelReplay VSC SDP status"); + return bRetVal; } + return bRetVal; +} - virtual bool queryHdmiLinkStatus(bool *bLinkActive, bool *bLinkReady) +bool DPCDHALImpl::getDpTunnelGranularityMultiplier(NvU8 &granularityMultiplier) +{ + NvU8 granularity = 0; + if (AuxRetry::ack != + bus.read(NV_DPCD20_DP_TUNNEL_BW_GRANULARITY, &granularity, sizeof(granularity))) { - NvU8 data = 0; - - if (bLinkActive == NULL && bLinkReady == NULL) - return false; - - if (AuxRetry::ack != bus.read(NV_DPCD14_PCON_HDMI_TX_LINK_STATUS, &data, sizeof(data))) - { - return false; - } - if (bLinkReady != NULL) - { - *bLinkReady = (FLD_TEST_DRF(_DPCD14, _PCON_HDMI_TX_LINK_STATUS, - _LINK_READY, _YES, data)); - } - if (bLinkActive != NULL) - { - *bLinkActive = (FLD_TEST_DRF(_DPCD14, _PCON_HDMI_TX_LINK_STATUS, - _LINK_ACTIVE, _YES, data)); - } - return true; + DP_PRINTF(DP_ERROR, "Failed to read DP Tunnel granularity"); + return false; } - virtual NvU32 restorePCONFrlLink(NvU32 linkBwMask, - bool bEnableExtendLTMode = false, - bool bEnableConcurrentMode = false) + switch (DRF_VAL(_DPCD20, _DP_TUNNEL_BW_GRANULARITY, _VAL, granularity)) { - // Restore HDMI Link. - // 1. Clear HDMI link enable bit (305A bit 7) - NvU8 data = 0; - NvU32 loopCount; - NvU32 frlRate; - if (AuxRetry::ack != bus.read(NV_DPCD14_PCON_FRL_LINK_CONFIG_1, &data, sizeof(data))) - { - return false; - } - data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _HDMI_LINK, _DISABLE, data); - if (AuxRetry::ack != bus.write(NV_DPCD14_PCON_FRL_LINK_CONFIG_1, &data, sizeof(data))) - { - return false; - } - // 2. Set FRL or TMDS (Optional if not changed) (305A bit 5) - // 3. Read FRL Ready Bit (303B bit 1) - - Timeout timeout(timer, 500 /* 500ms */); - data = 0; - do - { - if (AuxRetry::ack != bus.read(NV_DPCD14_PCON_HDMI_TX_LINK_STATUS, - &data, sizeof(data))) - continue; - if (FLD_TEST_DRF(_DPCD14, _PCON_HDMI_TX_LINK_STATUS, _LINK_READY, _YES, data)) - break; - } while (timeout.valid()); - - if (FLD_TEST_DRF(_DPCD14, _PCON_HDMI_TX_LINK_STATUS, _LINK_READY, _NO, data)) - { - return false; - } - - // 4. Configure FRL Link (Optional if not changed) - // 5. Set HDMI Enable Bit. - data = 0; - - if (AuxRetry::ack != bus.read(NV_DPCD14_PCON_FRL_LINK_CONFIG_1, &data, sizeof(data))) - { - return false; - } - data = FLD_SET_DRF(_DPCD14, _PCON_FRL_LINK_CONFIG_1, _HDMI_LINK, _ENABLE, data); - if (AuxRetry::ack != bus.write(NV_DPCD14_PCON_FRL_LINK_CONFIG_1, &data, sizeof(data))) - { - return false; - } - - // 6. Read HDMI Link Status link active bit (2005 bit 3) - // 7. Read HDMI link active status bit and link config status (303b bit0 / 3036) - loopCount = NV_PCON_FRL_LT_TIMEOUT_THRESHOLD; - do - { - if (checkPCONFrlLinkStatus(&frlRate) == true) - { - break; - } - Timeout timeout(this->timer, NV_PCON_FRL_LT_TIMEOUT_INTERVAL_MS); - while(timeout.valid()); - continue; - } while (--loopCount); - - return frlRate; + case NV_DPCD20_DP_TUNNEL_BW_GRANULARITY_VAL_0_25_GBPS: + granularityMultiplier = 4; + break; + case NV_DPCD20_DP_TUNNEL_BW_GRANULARITY_VAL_0_50_GBPS: + granularityMultiplier = 2; + break; + case NV_DPCD20_DP_TUNNEL_BW_GRANULARITY_VAL_1_00_GBPS: + granularityMultiplier = 1; + break; + default: + DP_PRINTF(DP_WARNING, "Unknown DP Tunnel granularity read from sink. Assuming 1 Gbps"); + granularityMultiplier = 1; + break; } - virtual void readPsrCapabilities(vesaPsrSinkCaps *caps) + return true; +} + +TriState DPCDHALImpl::getDpTunnelBwRequestStatus() +{ + NvU8 bwRequestStatus = 0; + TriState status = Indeterminate; + if (AuxRetry::ack != + bus.read(NV_DPCD20_DP_TUNNELING_STATUS, &bwRequestStatus, sizeof(bwRequestStatus))) { - dpMemCopy(caps, &this->caps.psrCaps, sizeof(vesaPsrSinkCaps)); + DP_PRINTF(DP_ERROR, "Failed to read DP Tunneling status"); + return status; } - virtual bool updatePsrConfiguration(vesaPsrConfig psrcfg) + if (FLD_TEST_DRF(_DPCD20, _DP_TUNNELING_BW_REQUEST, _FAILED, _YES, bwRequestStatus)) { - NvU8 config = 0U; - - if (psrcfg.psrCfgEnable) - { - config = FLD_SET_DRF(_DPCD_EDP, _PSR_CONFIG, - _SINK_ENABLE, _YES, config); - } - if (psrcfg.srcTxEnabledInPsrActive) - { - config = FLD_SET_DRF(_DPCD_EDP, _PSR_CONFIG, - _SOURCE_LINK_ACTIVE, _YES, config); - } - if (psrcfg.crcVerifEnabledInPsrActive) - { - config = FLD_SET_DRF(_DPCD_EDP, _PSR_CONFIG, - _CRC_VERIFICATION_ACTIVE, _YES, config); - } - if (psrcfg.frameCaptureSecondActiveFrame) - { - config = FLD_SET_DRF(_DPCD_EDP, _PSR_CONFIG, - _FRAME_CAPTURE_INDICATION, _SECOND, config); - } - if (psrcfg.selectiveUpdateOnSecondActiveline) - { - config = FLD_SET_DRF(_DPCD_EDP, _PSR_CONFIG, - _SU_LINE_CAPTURE_INDICATION, _SECOND, config); - } - if (psrcfg.enableHpdIrqOnCrcMismatch) - { - config = FLD_SET_DRF(_DPCD_EDP, _PSR_CONFIG, - _HPD_IRQ_ON_CRC_ERROR, _YES, config); - } - if (psrcfg.enablePsr2) - { - config = FLD_SET_DRF(_DPCD_EDP, _PSR_CONFIG, - _ENABLE_PSR2, _YES, config); - } - - return AuxRetry::ack == - bus.write(NV_DPCD_EDP_PSR_CONFIG, &config, 1); + status = False; } - - virtual bool readPsrConfiguration(vesaPsrConfig *psrcfg) + else if (FLD_TEST_DRF(_DPCD20, _DP_TUNNELING_BW_REQUEST, _SUCCEEDED, _YES, bwRequestStatus)) { - NvU8 config = 0U; - bool retVal = AuxRetry::ack == - bus.read(NV_DPCD_EDP_PSR_CONFIG, &config, 1); + status = True; + } - psrcfg->psrCfgEnable = - FLD_TEST_DRF(_DPCD_EDP, _PSR_CONFIG, _SINK_ENABLE, _YES, config); - psrcfg->srcTxEnabledInPsrActive = - FLD_TEST_DRF(_DPCD_EDP, _PSR_CONFIG, _SOURCE_LINK_ACTIVE, _YES, config); - psrcfg->crcVerifEnabledInPsrActive = - FLD_TEST_DRF(_DPCD_EDP, _PSR_CONFIG, _CRC_VERIFICATION_ACTIVE, - _YES, config); - psrcfg->frameCaptureSecondActiveFrame = - FLD_TEST_DRF(_DPCD_EDP, _PSR_CONFIG, _FRAME_CAPTURE_INDICATION, - _SECOND, config); - psrcfg->selectiveUpdateOnSecondActiveline = - FLD_TEST_DRF(_DPCD_EDP, _PSR_CONFIG, - _SU_LINE_CAPTURE_INDICATION, _SECOND, config); - psrcfg->enableHpdIrqOnCrcMismatch = - FLD_TEST_DRF(_DPCD_EDP, _PSR_CONFIG, _HPD_IRQ_ON_CRC_ERROR, _YES, config); - psrcfg->enablePsr2 = - FLD_TEST_DRF(_DPCD_EDP, _PSR_CONFIG, _ENABLE_PSR2, _YES, config); + return status; +} - return retVal; +bool DPCDHALImpl::setDpTunnelBwAllocation(bool bEnable) +{ + DP_PRINTF(DP_INFO, "requested: %d", bEnable); + NvU8 bwAllocationControl = 0; + if(AuxRetry::ack != bus.read(NV_DPCD20_DPTX_BW_ALLOCATION_MODE_CONTROL, + &bwAllocationControl, sizeof(bwAllocationControl))) + { + return false; } - virtual bool readPsrState(vesaPsrState *psrState) + if (bEnable) { - NvU8 config = 0U; - bool retVal = AuxRetry::ack == - bus.read(NV_DPCD_PANEL_SELF_REFRESH_STATUS, &config, 1); - - if (retVal) - { - *psrState = - (vesaPsrState)DRF_VAL(_DPCD, _PANEL_SELF_REFRESH_STATUS, - _VAL, config); - } - return retVal; + bwAllocationControl = FLD_SET_DRF(_DPCD20, _DPTX, _UNMASK_BW_ALLOCATION_IRQ, _YES, bwAllocationControl); + bwAllocationControl = FLD_SET_DRF(_DPCD20, _DPTX, _DISPLAY_DRIVER_BW_ALLOCATION_MODE_ENABLE, + _YES, bwAllocationControl); } - - virtual bool readPsrDebugInfo(vesaPsrDebugStatus *psrDbgState) + else { - NvU8 config[2] = { 0U , 0U }; - bool retVal = AuxRetry::ack == - bus.read(NV_DPCD_PANEL_SELF_REFRESH_DEBUG0, - &config[0], sizeof(config)); - - if (retVal) - { - psrDbgState->maxResyncFrames = - DRF_VAL(_DPCD_PANEL_SELF_REFRESH, - _DEBUG0, _MAX_RESYNC_FRAME_CNT, config[0]); - psrDbgState->actualResyncFrames = - DRF_VAL(_DPCD_PANEL_SELF_REFRESH, - _DEBUG0, _LAST_RESYNC_FRAME_CNT, config[0]); - - psrDbgState->lastSdpPsrState = - !!DRF_VAL(_DPCD_PANEL_SELF_REFRESH, _LAST_SDP, - _PSR_STATE_BIT, config[1]); - psrDbgState->lastSdpUpdateRfb = - !!DRF_VAL(_DPCD_PANEL_SELF_REFRESH, _LAST_SDP, - _RFB_BIT, config[1]); - psrDbgState->lastSdpCrcValid = - !!DRF_VAL(_DPCD_PANEL_SELF_REFRESH, _LAST_SDP, - _CRC_VALID_BIT, config[1]); - psrDbgState->lastSdpSuValid = - !!DRF_VAL(_DPCD_PANEL_SELF_REFRESH, _LAST_SDP, - _SU_VALID_BIT, config[1]); - psrDbgState->lastSdpFirstSURcvd = - !!DRF_VAL(_DPCD_PANEL_SELF_REFRESH, _LAST_SDP, - _SU_FIRST_LINE_RCVD, config[1]); - psrDbgState->lastSdpLastSURcvd = - !!DRF_VAL(_DPCD_PANEL_SELF_REFRESH, _LAST_SDP, - _SU_LAST_LINE_RCVD, config[1]); - psrDbgState->lastSdpYCoordValid = - !!DRF_VAL(_DPCD_PANEL_SELF_REFRESH, _LAST_SDP, - _Y_CORD_VALID, config[1]); - } - return retVal; + bwAllocationControl = FLD_SET_DRF(_DPCD20, _DPTX, _UNMASK_BW_ALLOCATION_IRQ, _NO, bwAllocationControl); + bwAllocationControl = FLD_SET_DRF(_DPCD20, _DPTX, _DISPLAY_DRIVER_BW_ALLOCATION_MODE_ENABLE, + _NO, bwAllocationControl); } - virtual bool writePsrErrorStatus(vesaPsrErrorStatus psrErr) + if (AuxRetry::ack != + bus.write(NV_DPCD20_DPTX_BW_ALLOCATION_MODE_CONTROL, &bwAllocationControl, sizeof(bwAllocationControl))) { - NvU8 config = 0U; - config = FLD_SET_DRF_NUM(_DPCD_PANEL_SELF_REFRESH, - _ERR_STATUS, - _LINK_CRC_ERR, - psrErr.linkCrcError, - config); - config = FLD_SET_DRF_NUM(_DPCD_PANEL_SELF_REFRESH, - _ERR_STATUS, - _RFB_ERR, - psrErr.rfbStoreError, - config); - config = FLD_SET_DRF_NUM(_DPCD_PANEL_SELF_REFRESH, - _ERR_STATUS, - _VSC_SDP_ERR, - psrErr.vscSdpError, - config); - - return AuxRetry::ack == bus.write( - NV_DPCD_PANEL_SELF_REFRESH_ERR_STATUS, &config, 1); + DP_PRINTF(DP_ERROR, "Failed to write bw allocation control: %d", bwAllocationControl); + return false; } - virtual bool readPsrErrorStatus(vesaPsrErrorStatus *psrErr) - { - NvU8 config = 0U; - bool retVal; - retVal = AuxRetry::ack == bus.read( - NV_DPCD_PANEL_SELF_REFRESH_ERR_STATUS, - &config, sizeof(config)); + bIsDpTunnelBwAllocationEnabled = bEnable; - if (retVal) - { - psrErr->vscSdpError = FLD_TEST_DRF(_DPCD, - _PANEL_SELF_REFRESH_ERR_STATUS, - _LINK_CRC_ERR, _YES, config); - psrErr->rfbStoreError = FLD_TEST_DRF(_DPCD, - _PANEL_SELF_REFRESH_ERR_STATUS, - _RFB_ERR, _YES, config); - psrErr->linkCrcError = FLD_TEST_DRF(_DPCD, - _PANEL_SELF_REFRESH_ERR_STATUS, - _VSC_SDP_ERR, - _YES, config); - } - return retVal; - } + return true; +} - virtual bool writePsrEvtIndicator(vesaPsrEventIndicator psrEvt) +bool DPCDHALImpl::getDpTunnelEstimatedBw(NvU8 &estimatedBw) +{ + if (AuxRetry::ack != + bus.read(NV_DPCD20_DP_TUNNEL_ESTIMATED_BW, &estimatedBw, sizeof(estimatedBw))) { - NvU8 config = 0U; - - if (psrEvt.sinkCapChange) - { - config = FLD_SET_DRF(_DPCD, - _PANEL_SELF_REFRESH_EVENT_STATUS, - _CAP_CHANGE, - _YES, config); - } - return AuxRetry::ack == bus.write( - NV_DPCD_PANEL_SELF_REFRESH_EVENT_STATUS, &config, 1); + DP_PRINTF(DP_ERROR, "Failed to read DP Tunnel estimated BW"); + return false; } - virtual bool readPsrEvtIndicator(vesaPsrEventIndicator *psrEvt) - { - NvU8 config = 0U; - bool retVal; - retVal = AuxRetry::ack == bus.read( - NV_DPCD_PANEL_SELF_REFRESH_EVENT_STATUS, - &config, sizeof(config)); + return true; +} - if (retVal) - { - psrEvt->sinkCapChange = DRF_VAL(_DPCD, - _PANEL_SELF_REFRESH_EVENT_STATUS, - _CAP_CHANGE, - config); - } - return retVal; +bool DPCDHALImpl::hasDpTunnelEstimatedBwChanged() +{ + NvU8 byte = 0; + if (AuxRetry::ack != + bus.read(NV_DPCD20_DP_TUNNELING_STATUS, &byte, sizeof(byte))) + { + DP_PRINTF(DP_ERROR, "Failed to read DP Tunneling status"); + return false; } - virtual bool readPrSinkDebugInfo(panelReplaySinkDebugInfo *prDbgInfo) - { - NvU8 config = 0U; - bool bRetVal = (AuxRetry::ack == - bus.read(NV_DPCD20_PANEL_REPLAY_ERROR_STATUS, - &config, sizeof(config))); + return FLD_TEST_DRF(_DPCD20, _DP_TUNNELING, _ESTIMATED_BW_CHANGED, _YES, byte); +} - if (bRetVal) - { - prDbgInfo->activeFrameCrcError = - FLD_TEST_DRF(_DPCD20_PANEL_REPLAY, _ERROR_STATUS, - _ACTIVE_FRAME_CRC_ERROR, _YES, config); - prDbgInfo->rfbStorageError = - FLD_TEST_DRF(_DPCD20_PANEL_REPLAY, _ERROR_STATUS, - _RFB_STORAGE_ERROR, _YES, config); - prDbgInfo->vscSdpUncorrectableError = - FLD_TEST_DRF(_DPCD20_PANEL_REPLAY, _ERROR_STATUS, - _VSC_SDP_UNCORRECTABLE_ERROR, _YES, config); - prDbgInfo->adaptiveSyncSdpMissing = - FLD_TEST_DRF(_DPCD20_PANEL_REPLAY, _ERROR_STATUS, - _ADAPTIVE_SYNC_SDP_MISSING, _YES, config); - } - else - { - DP_LOG(("DPHAL> readPrSinkDebugInfo: Failed to read PanelReplay error status")); - return bRetVal; - } +bool DPCDHALImpl::hasDpTunnelBwAllocationCapabilityChanged() +{ + NvU8 byte = 0; + if (AuxRetry::ack != + bus.read(NV_DPCD20_DP_TUNNELING_STATUS, &byte, sizeof(byte))) + { + DP_PRINTF(DP_ERROR, "Failed to read DP Tunneling status"); + return false; + } - config = 0U; - bRetVal = (AuxRetry::ack == - bus.read(NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS, - &config, sizeof(config))); - if (bRetVal) - { - prDbgInfo->sinkPrStatus = DRF_VAL(_DPCD20, - _PANEL_REPLAY_AND_FRAME_LOCK_STATUS, _PR_STATUS, config); - - prDbgInfo->sinkFramelocked = DRF_VAL(_DPCD20, - _PANEL_REPLAY_AND_FRAME_LOCK_STATUS, _SINK_FRAME_LOCKED, config); - - prDbgInfo->sinkFrameLockedValid = - FLD_TEST_DRF(_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS, - _SINK_FRAME_LOCKED, _VALID, _YES, config); - } - else - { - DP_LOG(("DPHAL> readPanelReplayError: Failed to read PanelReplay frame lock status")); - return bRetVal; - } + return FLD_TEST_DRF(_DPCD20, _DP_TUNNELING, + _BW_ALLOCATION_CAPABILITY_CHANGED, _YES, byte); +} - config = 0U; - bRetVal = AuxRetry::ack == - bus.read(NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO, - &config, sizeof(config)); - if (bRetVal) - { - prDbgInfo->currentPrState = - FLD_TEST_DRF(_DPCD20_PANEL_REPLAY_DEBUG_LAST, - _VSC_SDP_CARRYING_PR_INFO, _STATE, _ACTIVE, config); - prDbgInfo->crcValid = - FLD_TEST_DRF(_DPCD20_PANEL_REPLAY_DEBUG_LAST, - _VSC_SDP_CARRYING_PR_INFO, _CRC_VALID, _YES, config); - prDbgInfo->suCoordinatesValid = - FLD_TEST_DRF(_DPCD20_PANEL_REPLAY_DEBUG_LAST, - _VSC_SDP_CARRYING_PR_INFO, _SU_COORDINATE_VALID, - _YES, config); - } - else - { - DP_LOG(("DPHAL> readPanelReplayError: Failed to read PanelReplay VSC SDP status")); - return bRetVal; - } - return bRetVal; +bool DPCDHALImpl::writeDpTunnelRequestedBw(NvU8 requestedBw) +{ + if (AuxRetry::ack != + bus.write(NV_DPCD20_DP_TUNNEL_REQUESTED_BW, &requestedBw, sizeof(requestedBw))) + { + DP_PRINTF(DP_ERROR, "Failed to write requested BW"); + return false; } -}; + return true; +} -DPCDHAL * DisplayPort::MakeDPCDHAL(AuxBus * bus, Timer * timer) +DPCDHAL * DisplayPort::MakeDPCDHAL(AuxBus * bus, Timer * timer, MainLink * main) { return new DPCDHALImpl(bus, timer); } + diff --git a/src/common/displayport/src/dp_connectorimpl.cpp b/src/common/displayport/src/dp_connectorimpl.cpp index 1984a54a38..0974d32798 100644 --- a/src/common/displayport/src/dp_connectorimpl.cpp +++ b/src/common/displayport/src/dp_connectorimpl.cpp @@ -40,6 +40,7 @@ #include "dp_groupimpl.h" #include "dp_deviceimpl.h" #include "dp_connectorimpl.h" +#include "dp_printf.h" #include "dp_auxbus.h" #include "dpringbuffertypes.h" @@ -103,16 +104,13 @@ ConnectorImpl::ConnectorImpl(MainLink * main, AuxBus * auxBus, Timer * timer, Co LT2FecLatencyMs(0), bFECEnable(false), bDscCapBasedOnParent(false), + allocatedDpTunnelBw(0), + bClientRequestedDpTunnelBwAllocation(false), + bIsDpTunnelBwAllocationEnabled(false), inTransitionHeadMask(0x0), ResStatus(this) { clearTimeslices(); - hal = MakeDPCDHAL(auxBus, timer); - if (hal == NULL) - { - constructorFailed = true; - return; - } firmwareGroup = createFirmwareGroup(); if (firmwareGroup == NULL) @@ -123,6 +121,12 @@ ConnectorImpl::ConnectorImpl(MainLink * main, AuxBus * auxBus, Timer * timer, Co main->queryGPUCapability(); main->queryAndUpdateDfpParams(); + hal = MakeDPCDHAL(auxBus, timer, main); + if (hal == NULL) + { + constructorFailed = true; + return; + } hal->setPC2Disabled(main->isPC2Disabled()); @@ -166,16 +170,15 @@ void ConnectorImpl::applyRegkeyOverrides(const DP_REGKEY_DATABASE& dpRegkeyDatab this->bKeepLinkAliveMST = dpRegkeyDatabase.bOptLinkKeptAliveMst; this->bKeepLinkAliveSST = dpRegkeyDatabase.bOptLinkKeptAliveSst; } - this->bReportDeviceLostBeforeNew = dpRegkeyDatabase.bReportDeviceLostBeforeNew; - this->maxLinkRateFromRegkey = dpRegkeyDatabase.applyMaxLinkRateOverrides; - this->bEnableAudioBeyond48K = dpRegkeyDatabase.bAudioBeyond48kEnabled; - this->bDisableSSC = dpRegkeyDatabase.bSscDisabled; - this->bEnableFastLT = dpRegkeyDatabase.bFastLinkTrainingEnabled; - this->bDscMstCapBug3143315 = dpRegkeyDatabase.bDscMstCapBug3143315; - this->bPowerDownPhyBeforeD3 = dpRegkeyDatabase.bPowerDownPhyBeforeD3; - this->bReassessMaxLink = dpRegkeyDatabase.bReassessMaxLink; - this->bForceDscOnSink = dpRegkeyDatabase.bForceDscOnSink; - this->bSkipFakeDeviceDpcdAccess = dpRegkeyDatabase.bSkipFakeDeviceDpcdAccess; + this->bReportDeviceLostBeforeNew = dpRegkeyDatabase.bReportDeviceLostBeforeNew; + this->maxLinkRateFromRegkey = dpRegkeyDatabase.applyMaxLinkRateOverrides; + this->bDisableSSC = dpRegkeyDatabase.bSscDisabled; + this->bEnableFastLT = dpRegkeyDatabase.bFastLinkTrainingEnabled; + this->bDscMstCapBug3143315 = dpRegkeyDatabase.bDscMstCapBug3143315; + this->bPowerDownPhyBeforeD3 = dpRegkeyDatabase.bPowerDownPhyBeforeD3; + this->bReassessMaxLink = dpRegkeyDatabase.bReassessMaxLink; + this->bForceDisableTunnelBwAllocation = dpRegkeyDatabase.bForceDisableTunnelBwAllocation; + this->bSkipFakeDeviceDpcdAccess = dpRegkeyDatabase.bSkipFakeDeviceDpcdAccess; } void ConnectorImpl::setPolicyModesetOrderMitigation(bool enabled) @@ -245,9 +248,9 @@ void DisplayPort::DevicePendingEDIDRead::mstEdidCompleted(EdidReadMultistream * { Address::StringBuffer sb; DP_USED(sb); - DP_LOG(("DP-CONN> Edid read complete: %s %s", - from->topologyAddress.toString(sb), - from->edid.getName())); + DP_PRINTF(DP_NOTICE, "DP-CONN> Edid read complete: %s %s", + from->topologyAddress.toString(sb), + from->edid.getName()); ConnectorImpl * connector = parent; parent->applyEdidWARs(from->edid, device); parent->processNewDevice(device, from->edid, true, DISPLAY_PORT, RESERVED); @@ -259,8 +262,8 @@ void DisplayPort::DevicePendingEDIDRead::mstEdidReadFailed(EdidReadMultistream * { Address::StringBuffer sb; DP_USED(sb); - DP_LOG(("DP-CONN> Edid read failed: %s (using fallback)", - from->topologyAddress.toString(sb))); + DP_PRINTF(DP_ERROR, "DP-CONN> Edid read failed: %s (using fallback)", + from->topologyAddress.toString(sb)); ConnectorImpl * connector = parent; parent->processNewDevice(device, Edid(), true, DISPLAY_PORT, RESERVED); delete this; @@ -538,7 +541,7 @@ void ConnectorImpl::processNewDevice(const DiscoveryManager::Device & device, while((retries < WAR_MAX_REASSESS_ATTEMPT) && (highestAssessedLC != getMaxLinkConfig())) { - DP_LOG(("DP> Assessed link is not equal to highest possible config. Reassess link.")); + DP_PRINTF(DP_WARNING, "DP> Assessed link is not equal to highest possible config. Reassess link."); this->assessLink(); retries++; } @@ -792,7 +795,7 @@ void ConnectorImpl::populateAllDpConfigs() // if (numPossibleLnkCfg) { - DP_LOG(("DP> DPCONN> Rebuild possible link rate confgiurations")); + DP_PRINTF(DP_NOTICE, "DP> DPCONN> Rebuild possible link rate confgiurations"); delete[] allPossibleLinkCfgs; numPossibleLnkCfg = 0; } @@ -802,8 +805,8 @@ void ConnectorImpl::populateAllDpConfigs() numPossibleLnkCfg = laneSets * pConnectorLinkRates->getNumLinkRates(); if (numPossibleLnkCfg == 0) { - DP_LOG(("DPCONN> %s: lane count %d or link rates %d!", - __FUNCTION__, pConnectorLinkRates->getNumLinkRates(), laneSets)); + DP_PRINTF(DP_ERROR, "DPCONN> %s: lane count %d or link rates %d!", + __FUNCTION__, pConnectorLinkRates->getNumLinkRates(), laneSets); DP_ASSERT(0 && "Invalid lane count or link rates!"); return; } @@ -812,8 +815,8 @@ void ConnectorImpl::populateAllDpConfigs() if (allPossibleLinkCfgs == NULL) { - DP_LOG(("DPCONN> %s: Failed to allocate allPossibleLinkCfgs array", - __FUNCTION__)); + DP_PRINTF(DP_ERROR, "DPCONN> %s: Failed to allocate allPossibleLinkCfgs array", + __FUNCTION__); numPossibleLnkCfg = 0; return; } @@ -922,7 +925,7 @@ Group * ConnectorImpl::resume(bool firmwareLinkHandsOff, } else if (firmwareDPActive) { - DP_LOG(("CONN> Detected firmware panel is active on head %d.", firmwareHead)); + DP_PRINTF(DP_NOTICE, "CONN> Detected firmware panel is active on head %d.", firmwareHead); ((GroupImpl *)firmwareGroup)->setHeadAttached(true); ((GroupImpl *)firmwareGroup)->headIndex = firmwareHead; ((GroupImpl *)firmwareGroup)->streamIndex = 1; @@ -948,13 +951,28 @@ Group * ConnectorImpl::resume(bool firmwareLinkHandsOff, // bDeferNotifyLostDevice = plugged; bAttachOnResume = true; + + // + // If we are resuming, record the allocatedDpTunnelBw before calling NLP + // NLP will reset and try to allocate BW = LinkConfiguration + // The previous CQA would have been performed with this allocated BW + // If this is different from the new allocation, we will queue a DP allocation changed event + // + NvU64 previousAllocatedDpTunnelBw = allocatedDpTunnelBw; notifyLongPulse(plugged); + + // Reallocate DP BW for all connected and known clients + updateDpTunnelBwAllocation(); + if (previousAllocatedDpTunnelBw != allocatedDpTunnelBw) + { + timer->queueCallback(this, &tagDpBwAllocationChanged, 0, false /* not allowed in sleep */); + } + bAttachOnResume = false; return result; } - void ConnectorImpl::pause() { connectorActive = false; @@ -1038,6 +1056,7 @@ void ConnectorImpl::beginCompoundQuery(const bool bForceEnableFEC) compoundQueryCount = 0; compoundQueryResult = true; compoundQueryLocalLinkPBN = 0; + compoundQueryUsedTunnelingBw = 0; compoundQueryForceEnableFEC = bForceEnableFEC; for (Device * i = enumDevices(0); i; i=enumDevices(i)) @@ -1128,6 +1147,35 @@ static DP_IMP_ERROR translatePpsErrorToDpImpError(NVT_STATUS ppsErrorCode) } } +bool ConnectorImpl::compoundQueryAttachTunneling(const DpModesetParams &modesetParams, + DscParams *pDscParams, + DP_IMP_ERROR *pErrorCode) +{ + if (!bIsDpTunnelBwAllocationEnabled) + { + return true; + } + + NvU64 bpp = modesetParams.modesetInfo.depth; + if (pDscParams->bEnableDsc) + { + bpp = divide_ceil(pDscParams->bitsPerPixelX16, 16); + } + + NvU64 modeBwRequired = modesetParams.modesetInfo.pixelClockHz * bpp; + NvU64 freeTunnelingBw = allocatedDpTunnelBw - compoundQueryUsedTunnelingBw; + + if (modeBwRequired > freeTunnelingBw) + { + SET_DP_IMP_ERROR(pErrorCode, DP_IMP_ERROR_INSUFFICIENT_DP_TUNNELING_BANDWIDTH); + return false; + } + + compoundQueryUsedTunnelingBw += modeBwRequired; + + return true; +} + // // This call will be deprecated as soon as all clients move to the new API // @@ -1170,20 +1218,6 @@ bool ConnectorImpl::compoundQueryAttach(Group * target, return false; } - // - // Bug 925211: In some case we need to clamp the supporting frequencies to <= 48KHz. - // Check if audio frequency is greater than 48Khz & is not overridden by regkey - // "ENABLE_AUDIO_BEYOND48K" simply return false. - // - if (((modesetParams.modesetInfo.twoChannelAudioHz > WAR_AUDIOCLAMPING_FREQ) - || (modesetParams.modesetInfo.eightChannelAudioHz > WAR_AUDIOCLAMPING_FREQ)) - && !(bEnableAudioBeyond48K)) - { - compoundQueryResult = false; - SET_DP_IMP_ERROR(pErrorCode, DP_IMP_ERROR_AUDIO_BEYOND_48K) - return false; - } - if (linkUseMultistream()) { compoundQueryResult = compoundQueryAttachMST(target, modesetParams, @@ -1195,6 +1229,11 @@ bool ConnectorImpl::compoundQueryAttach(Group * target, pDscParams, pErrorCode); } + if (compoundQueryResult) + { + compoundQueryResult = compoundQueryAttachTunneling(modesetParams, pDscParams, pErrorCode); + } + return compoundQueryResult; } @@ -1288,11 +1327,6 @@ bool ConnectorImpl::compoundQueryAttachMST(Group * target, { return false; } - - if (!pDscParams->bEnableDsc) - { - DP_LOG(("CompoundQueryAttach failed with DSC, will try non-DSC path")); - } } return compoundQueryAttachMSTGeneric(target, modesetParams, &localInfo, @@ -1321,11 +1355,11 @@ bool ConnectorImpl::compoundQueryAttachMSTIsDscPossible (dev->isLogical() && dev->parent))) { // - // If DSC decoding is going to happen at sink's parent or + // If DSC decoding is going to happen at sink's parent or // decoding will be done by sink but sink is a logical port, - // where intermediate link between Branch DFP and Rx Panel can be - // anything other than DP (i.e. DSI, LVDS or something else), - // then we have to only make sure the path from source to sink's + // where intermediate link between Branch DFP and Rx Panel can be + // anything other than DP (i.e. DSI, LVDS or something else), + // then we have to only make sure the path from source to sink's // parent is fec is capable. // Refer DP 1.4 Spec 5.4.5 // @@ -1414,8 +1448,8 @@ bool ConnectorImpl::compoundQueryAttachMSTDsc(Group * target, (dscInfo.sinkCaps.algorithmRevision.versionMinor == 1) && (modesetParams.colorFormat == dpColorFormat_YCbCr444 )) { - DP_LOG(("WARNING: DSC v1.2 or higher is recommended for using YUV444")); - DP_LOG(("Current version is 1.1")); + DP_PRINTF(DP_WARNING, "WARNING: DSC v1.2 or higher is recommended for using YUV444"); + DP_PRINTF(DP_WARNING, "Current version is 1.1"); } if ((dev->devDoingDscDecompression == dev) && dev->parent) @@ -1468,16 +1502,8 @@ bool ConnectorImpl::compoundQueryAttachMSTDsc(Group * target, warData.dpData.hBlank = modesetParams.modesetInfo.rasterWidth - modesetParams.modesetInfo.surfaceWidth; warData.connectorType = DSC_DP; - DSC_GENERATE_PPS_OPAQUE_WORKAREA *pScratchBuffer = nullptr; - pScratchBuffer = (DSC_GENERATE_PPS_OPAQUE_WORKAREA*) - dpMalloc(sizeof(DSC_GENERATE_PPS_OPAQUE_WORKAREA)); - result = DSC_GeneratePPS(&dscInfo, &modesetInfoDSC, - &warData, availableBandwidthBitsPerSecond, - pScratchBuffer, - (NvU32*)(PPS), (NvU32*)(&bitsPerPixelX16)); - // - // From NVD 5.0 later, Dplib needs to pass sliceCountMask to clients + // Dplib needs to pass sliceCountMask to clients // with all slice counts that can support the mode since clients // might need to use a slice count other than the minimum slice count // that supports the mode. Currently we keep the same policy of @@ -1485,46 +1511,23 @@ bool ConnectorImpl::compoundQueryAttachMSTDsc(Group * target, // with dynamic PPS update, this will be moved a better algorithm, // that optimizes bpp for requested mode on each display. // - if (dscInfo.gpuCaps.maxNumHztSlices > 4U) + + result = DSC_GeneratePPSWithSliceCountMask(&dscInfo, &modesetInfoDSC, + &warData, availableBandwidthBitsPerSecond, + (NvU32*)(PPS), + (NvU32*)(&bitsPerPixelX16), + &(pDscParams->sliceCountMask)); + + // Try max dsc compression bpp = 8 once to check if that can support that mode. + if (result != NVT_STATUS_SUCCESS && !bDscBppForced) { + pDscParams->bitsPerPixelX16 = MAX_DSC_COMPRESSION_BPPX16; + bitsPerPixelX16 = pDscParams->bitsPerPixelX16; result = DSC_GeneratePPSWithSliceCountMask(&dscInfo, &modesetInfoDSC, &warData, availableBandwidthBitsPerSecond, (NvU32*)(PPS), (NvU32*)(&bitsPerPixelX16), &(pDscParams->sliceCountMask)); - // Try max dsc compression bpp = 8 once to check if that can support that mode. - if (result != NVT_STATUS_SUCCESS && !bDscBppForced) - { - pDscParams->bitsPerPixelX16 = MAX_DSC_COMPRESSION_BPPX16; - bitsPerPixelX16 = pDscParams->bitsPerPixelX16; - result = DSC_GeneratePPSWithSliceCountMask(&dscInfo, &modesetInfoDSC, - &warData, availableBandwidthBitsPerSecond, - (NvU32*)(PPS), - (NvU32*)(&bitsPerPixelX16), - &(pDscParams->sliceCountMask)); - } - } - else - { - result = DSC_GeneratePPS(&dscInfo, &modesetInfoDSC, - &warData, availableBandwidthBitsPerSecond, - pScratchBuffer, (NvU32*)(PPS), - (NvU32*)(&bitsPerPixelX16)); - // Try max dsc compression bpp = 8 once to check if that can support that mode. - if (result != NVT_STATUS_SUCCESS && !bDscBppForced) - { - pDscParams->bitsPerPixelX16 = MAX_DSC_COMPRESSION_BPPX16; - bitsPerPixelX16 = pDscParams->bitsPerPixelX16; - result = DSC_GeneratePPS(&dscInfo, &modesetInfoDSC, - &warData, availableBandwidthBitsPerSecond, - pScratchBuffer, (NvU32*)(PPS), - (NvU32*)(&bitsPerPixelX16)); - } - } - if (pScratchBuffer != nullptr) - { - dpFree(pScratchBuffer); - pScratchBuffer = nullptr; } if (result != NVT_STATUS_SUCCESS) @@ -1734,6 +1737,8 @@ bool ConnectorImpl::compoundQueryAttachSST(Group * target, { ModesetInfo localModesetInfo = modesetParams.modesetInfo; bool bGpuDscSupported; + NVT_STATUS ppsStatus; + main->getDscCaps(&bGpuDscSupported); DeviceImpl * nativeDev = findDeviceInList(Address()); @@ -1837,8 +1842,8 @@ bool ConnectorImpl::compoundQueryAttachSST(Group * target, (dscInfo.sinkCaps.algorithmRevision.versionMinor == 1) && (modesetParams.colorFormat == dpColorFormat_YCbCr444 )) { - DP_LOG(("WARNING: DSC v1.2 or higher is recommended for using YUV444")); - DP_LOG(("Current version is 1.1")); + DP_PRINTF(DP_WARNING, "WARNING: DSC v1.2 or higher is recommended for using YUV444"); + DP_PRINTF(DP_WARNING, "Current version is 1.1"); } availableBandwidthBitsPerSecond = lc.minRate * 8 * lc.lanes; @@ -1849,19 +1854,13 @@ bool ConnectorImpl::compoundQueryAttachSST(Group * target, warData.dpData.dpMode = DSC_DP_SST; warData.connectorType = DSC_DP; - DSC_GENERATE_PPS_OPAQUE_WORKAREA *pScratchBuffer = nullptr; - pScratchBuffer = (DSC_GENERATE_PPS_OPAQUE_WORKAREA*) - dpMalloc(sizeof(DSC_GENERATE_PPS_OPAQUE_WORKAREA)); - NVT_STATUS ppsStatus = DSC_GeneratePPS(&dscInfo, &modesetInfoDSC, - &warData, availableBandwidthBitsPerSecond, - pScratchBuffer, - (NvU32*)(PPS), - (NvU32*)(&bitsPerPixelX16)); - if (pScratchBuffer != nullptr) - { - dpFree(pScratchBuffer); - pScratchBuffer = nullptr; - } + ppsStatus = DSC_GeneratePPSWithSliceCountMask(&dscInfo, + &modesetInfoDSC, + &warData, + availableBandwidthBitsPerSecond, + (NvU32*)(PPS), + (NvU32*)(&bitsPerPixelX16), + &(pDscParams->sliceCountMask)); if (ppsStatus != NVT_STATUS_SUCCESS) { @@ -2228,7 +2227,7 @@ void ConnectorImpl::releaseLinkHandsOff() { if (!isLinkQuiesced) { - DP_LOG(("DPCONN> Link is already in use.")); + DP_PRINTF(DP_ERROR, "DPCONN> Link is already in use."); return; } @@ -2243,8 +2242,18 @@ void ConnectorImpl::expired(const void * tag) { if (tag == &tagFireEvents) fireEventsInternal(); + else if (tag == &tagDpBwAllocationChanged) + { + for (Device * i = enumDevices(0); i; i = enumDevices(i)) + { + DeviceImpl * dev = (DeviceImpl *)i; + sink->bandwidthChangeNotification(dev, false); + } + } else + { DP_ASSERT(0); + } } // Generate Events. @@ -2276,10 +2285,12 @@ void ConnectorImpl::fireEvents() // If there were any queue an immediate callback to handle them if (eventsPending || isDiscoveryDetectComplete) { - // Queue the fireEventsInternal. - // It's critical we don't allow this to be processed in a sleep - // since DD may do a modeset in response - timer->queueCallback(this, &tagFireEvents, 0, false /* not allowed in sleep */); + { + // Queue the fireEventsInternal. + // It's critical we don't allow this to be processed in a sleep + // since DD may do a modeset in response + timer->queueCallback(this, &tagFireEvents, 0, false /* not allowed in sleep */); + } } } @@ -2309,7 +2320,7 @@ void ConnectorImpl::fireEventsInternal() continue; } dev->shadow.plugged = false; - DP_LOG(("DPCONN> Lost device %s", dev->address.toString(sb))); + DP_PRINTF(DP_ERROR, "DPCONN> Lost device %s", dev->address.toString(sb)); Address::NvU32Buffer addrBuffer; dpMemZero(addrBuffer, sizeof(addrBuffer)); dev->address.toNvU32Buffer(addrBuffer); @@ -2334,6 +2345,15 @@ void ConnectorImpl::fireEventsInternal() } #endif delete dev; + + // Now that the device is deleted, update the DP Tunnel BW allocation + NvU64 previousAllocatedDpTunnelBw = allocatedDpTunnelBw; + updateDpTunnelBwAllocation(); + if (previousAllocatedDpTunnelBw != allocatedDpTunnelBw) + { + timer->queueCallback(this, &tagDpBwAllocationChanged, 0, false /* not allowed in sleep */); + } + continue; } @@ -2349,11 +2369,11 @@ void ConnectorImpl::fireEventsInternal() if (dev->complianceDeviceEdidReadTest) { // the zombie event will be hidden for DD/OS - DP_LOG(("DPCONN> Compliance: Device Internal Zombie? : %d 0x%x", dev->shadow.zombie ? 1 : 0, dev)); + DP_PRINTF(DP_WARNING, "DPCONN> Compliance: Device Internal Zombie? : %d 0x%x", dev->shadow.zombie ? 1 : 0, dev); return; } bMitigateZombie = false; - DP_LOG(("DPCONN> Zombie? : %d 0x%x", dev->shadow.zombie ? 1 : 0, dev)); + DP_PRINTF(DP_WARNING, "DPCONN> Zombie? : %d 0x%x", dev->shadow.zombie ? 1 : 0, dev); sink->notifyZombieStateChange(dev, dev->shadow.zombie); } @@ -2377,7 +2397,7 @@ void ConnectorImpl::fireEventsInternal() } sink->notifyHDCPCapDone(dev, !!dev->isHDCPCap); - DP_LOG(("DPCONN> Notify HDCP cap Done : %x", !!dev->isHDCPCap)); + DP_PRINTF(DP_NOTICE, "DPCONN> Notify HDCP cap Done : %x", !!dev->isHDCPCap); } else { @@ -2418,7 +2438,7 @@ void ConnectorImpl::fireEventsInternal() { // If yes, then we need to report this lost device first. _device->shadow.plugged = false; - DP_LOG(("DPCONN> Lost device 0x%x", _device)); + DP_PRINTF(DP_WARNING, "DPCONN> Lost device 0x%x", _device); sink->lostDevice(_device); DP_ASSERT(!_device->activeGroup && "DD didn't remove panel from group"); delete _device; @@ -2427,14 +2447,22 @@ void ConnectorImpl::fireEventsInternal() dev->shadow.plugged = true; if (dev->isDSCPossible()) { - DP_LOG(("DPCONN> New device %s | Native DSC Capability - %s | DSC Decompression Device - %s", - dev->address.toString(sb), - (dev->isDSCSupported() ? "Capable" : "Not Capable"), - (dev->devDoingDscDecompression) ? dev->devDoingDscDecompression->address.toString(sb1):"NA")); + if (dev->isDSCSupported()) + { + DP_PRINTF(DP_NOTICE, "DPCONN> New device %s | Native DSC Capability - Capable | " + "DSC Decompression Device - %s", dev->address.toString(sb), + (dev->devDoingDscDecompression) ? dev->devDoingDscDecompression->address.toString(sb1):"NA"); + } + else + { + DP_PRINTF(DP_NOTICE, "DPCONN> New device %s | Native DSC Capability - Not Capable | " + "DSC Decompression Device - %s", dev->address.toString(sb), + (dev->devDoingDscDecompression) ? dev->devDoingDscDecompression->address.toString(sb1):"NA"); + } } else { - DP_LOG(("DPCONN> New device %s", dev->address.toString(sb))); + DP_PRINTF(DP_NOTICE, "DPCONN> New device %s | DSC Not Possible", dev->address.toString(sb)); } Address::NvU32Buffer addrBuffer; @@ -2443,6 +2471,17 @@ void ConnectorImpl::fireEventsInternal() NV_DPTRACE_INFO(NEW_SINK_REPORTED, dev->address.size(), addrBuffer[0], addrBuffer[1], addrBuffer[2], addrBuffer[3]); + // + // During newDevice, clients would run CQA for modelist validation and to identify the max BW + // For these calls, we expect to run CQA as if the monitor is driven independently + // Update the SW cache of the allocatedDpTunnelBw to Link Configuration + // The newDevice sequence would call dev->setModeList() which would allocate the BW required for all devices + // and set the right value for allocatedDpTunnelBw. + // Additionally, the client is expected to lock DPLib during all the operations so that no + // other thread/IRQ can update allocatedDpTunnelBw + // + allocatedDpTunnelBwShadow = allocatedDpTunnelBw; + allocatedDpTunnelBw = getMaxTunnelBw(); sink->newDevice(dev); } } @@ -2480,7 +2519,7 @@ void ConnectorImpl::fireEventsInternal() if (!bDeferNotifyDetectComplete) { isDiscoveryDetectComplete = false; - DP_LOG(("DP-CONN> NotifyDetectComplete")); + DP_PRINTF(DP_NOTICE, "DP-CONN> NotifyDetectComplete"); sink->notifyDetectComplete(); } } @@ -2742,8 +2781,8 @@ bool DisplayPort::SetConfigSingleHeadMultiStreamMode(Group **targets, if (numStreams > NV0073_CTRL_CMD_DP_SINGLE_HEAD_MAX_STREAMS || numStreams <= 0) { - DP_LOG(("DP-CONN> ERROR: in configuring single head multistream mode " - "invalid number of streams")); + DP_PRINTF(DP_ERROR, "DP-CONN> ERROR: in configuring single head multistream mode " + "invalid number of streams"); return false; } @@ -2753,8 +2792,8 @@ bool DisplayPort::SetConfigSingleHeadMultiStreamMode(Group **targets, if(pTargetImpl == NULL) { - DP_LOG(("DP-CONN> ERROR: in configuring single head multistream mode:" - "invalid target passed by client")); + DP_PRINTF(DP_ERROR, "DP-CONN> ERROR: in configuring single head multistream mode:" + "invalid target passed by client"); return false; } @@ -2872,7 +2911,7 @@ bool ConnectorImpl::setDeviceDscState(Device * dev, bool bEnableDsc) // Get Current DSC Enable State if (!((DeviceImpl *)dev)->getDscEnable(&bCurrDscEnable)) { - DP_LOG(("DP> Not able to get DSC Enable State!")); + DP_PRINTF(DP_WARNING, "DP> Not able to get DSC Enable State!"); } if (bCurrDscEnable) @@ -2884,7 +2923,7 @@ bool ConnectorImpl::setDeviceDscState(Device * dev, bool bEnableDsc) { if ((i != dev) && (((DeviceImpl *)i)->parent == ((DeviceImpl *)dev)->parent)) { - DP_LOG(("Parent is shared among devices and other device has DSC enabled so we can't disable DSC")); + DP_PRINTF(DP_WARNING, "Parent is shared among devices and other device has DSC enabled so we can't disable DSC"); bDisableDsc = false; break; } @@ -2997,6 +3036,21 @@ bool ConnectorImpl::notifyAttachBegin(Group * target, // Gr bool bEnableFEC; bool bEnablePassThroughForPCON = modesetParams.modesetInfo.bEnablePassThroughForPCON; + if (bIsDpTunnelBwAllocationEnabled && + ((allocatedDpTunnelBwShadow != 0) || + (allocatedDpTunnelBw == 0))) + { + // + // We should never be here. + // One possible reason this could happen is if client missed calling setModeList after a newDevice. + // At this point we are definitely in need for mode BW than allocated. + // We could either try to greedily allocate BW = LC or assert and fail. + // However given that DpLib's SW state is possibly incorrect, safer to could assert and fail. + // + DP_ASSERT(!"Shadow BW non zero or no BW allocated. Failing notifyAttachBegin"); + return false; + } + if(preferredLinkConfig.isValid()) { bEnableFEC = preferredLinkConfig.bEnableFEC; @@ -3015,8 +3069,8 @@ bool ConnectorImpl::notifyAttachBegin(Group * target, // Gr } } - DP_LOG(("DPCONN> Notify Attach Begin (Head %d, pclk %d raster %d x %d %d bpp", - modesetParams.headIndex, pixelClockHz, rasterWidth, rasterHeight, depth)); + DP_PRINTF(DP_NOTICE, "DPCONN> Notify Attach Begin (Head %d, pclk %d raster %d x %d %d bpp)", + modesetParams.headIndex, pixelClockHz, rasterWidth, rasterHeight, depth); NV_DPTRACE_INFO(NOTIFY_ATTACH_BEGIN, modesetParams.headIndex, pixelClockHz, rasterWidth, rasterHeight, depth, bEnableDsc, bEnableFEC); @@ -3041,7 +3095,14 @@ bool ConnectorImpl::notifyAttachBegin(Group * target, // Gr { Address::StringBuffer buffer; DP_USED(buffer); - DP_LOG(("DPCONN> | %s (%s) |", dev->getTopologyAddress().toString(buffer), dev->isVideoSink() ? "VIDEO" : "BRANCH")); + if (dev->isVideoSink()) + { + DP_PRINTF(DP_NOTICE, "DPCONN> | %s (VIDEO) |", dev->getTopologyAddress().toString(buffer)); + } + else + { + DP_PRINTF(DP_NOTICE, "DPCONN> | %s (BRANCH) |", dev->getTopologyAddress().toString(buffer)); + } } if (firmwareGroup && ((GroupImpl *)firmwareGroup)->headInFirmware) @@ -3053,7 +3114,22 @@ bool ConnectorImpl::notifyAttachBegin(Group * target, // Gr if (bEnableDsc) { - DP_LOG(("DPCONN> DSC Mode = %s", (modesetParams.modesetInfo.mode == DSC_SINGLE) ? "SINGLE" : "DUAL")); + switch (modesetParams.modesetInfo.mode) + { + case DSC_SINGLE: + DP_PRINTF(DP_NOTICE, "DPCONN> DSC Mode = SINGLE"); + break; + case DSC_DUAL: + DP_PRINTF(DP_NOTICE, "DPCONN> DSC Mode = DUAL"); + break; + case DSC_DROP: + DP_PRINTF(DP_NOTICE, "DPCONN> DSC Mode = DROP"); + break; + case DSC_MODE_NONE: + DP_PRINTF(DP_NOTICE, "DPCONN> DSC Mode = NONE"); + break; + } + targetImpl->dscModeRequest = modesetParams.modesetInfo.mode; } @@ -3129,24 +3205,22 @@ bool ConnectorImpl::notifyAttachBegin(Group * target, // Gr // isZombie() will catch this bLinkTrainingStatus = trainLinkOptimized(getMaxLinkConfig()); - // if LT is successful, see if panel supports DSC and if so, set DSC enabled/disabled + // If panel supports DSC, set DSC enabled/disabled // according to the mode requested. - if(bLinkTrainingStatus || bForceDscOnSink) + + for (Device * dev = target->enumDevices(0); dev; dev = target->enumDevices(dev)) { - for (Device * dev = target->enumDevices(0); dev; dev = target->enumDevices(dev)) + if (bPConConnected) { - if (bPConConnected) + if (!(((DeviceImpl *)dev)->setDscEnableDPToHDMIPCON(bEnableDsc, bEnablePassThroughForPCON))) { - if (!(((DeviceImpl *)dev)->setDscEnableDPToHDMIPCON(bEnableDsc, bEnablePassThroughForPCON))) - { - DP_ASSERT(!"DP-CONN> Failed to configure DSC on DP to HDMI PCON!"); - } - } - else if(!setDeviceDscState(dev, bEnableDsc)) - { - DP_ASSERT(!"DP-CONN> Failed to configure DSC on Sink!"); + DP_ASSERT(!"DP-CONN> Failed to configure DSC on DP to HDMI PCON!"); } } + else if(!setDeviceDscState(dev, bEnableDsc)) + { + DP_ASSERT(!"DP-CONN> Failed to configure DSC on Sink!"); + } } // TODO: Need to check if we can completely remove DP_OPTION_HDCP_12_ENABLED and remove it @@ -3214,7 +3288,7 @@ bool ConnectorImpl::notifyAttachBegin(Group * target, // Gr void ConnectorImpl::notifyAttachEnd(bool modesetCancelled) { GroupImpl* currentModesetDeviceGroup = NULL; - DP_LOG(("DPCONN> Notify Attach End")); + DP_PRINTF(DP_NOTICE, "DPCONN> Notify Attach End"); NV_DPTRACE_INFO(NOTIFY_ATTACH_END); bFromResumeToNAB = false; @@ -3304,7 +3378,7 @@ void ConnectorImpl::notifyDetachBegin(Group * target) GroupImpl * group = (GroupImpl*)target; - DP_LOG(("DPCONN> Notify detach begin")); + DP_PRINTF(DP_NOTICE, "DPCONN> Notify detach begin"); DP_ASSERT((group->headInFirmware || group->isHeadAttached()) && "Disconnecting an inactive device"); // check to see if a pattern request was on. if yes clear the pattern @@ -3335,7 +3409,7 @@ void ConnectorImpl::notifyDetachBegin(Group * target) main->triggerACT(); if (!hal->payloadWaitForACTReceived()) { - DP_LOG(("DP-TS> Downstream device did not receive ACT during stream clear")); + DP_PRINTF(DP_ERROR, "DP-TS> Downstream device did not receive ACT during stream clear"); DP_ASSERT(0); } } @@ -3353,7 +3427,7 @@ void ConnectorImpl::notifyDetachBegin(Group * target) void ConnectorImpl::notifyDetachEnd(bool bKeepOdAlive) { GroupImpl* currentModesetDeviceGroup = NULL; - DP_LOG(("DPCONN> Notify detach end")); + DP_PRINTF(DP_NOTICE, "DPCONN> Notify detach end"); NV_DPTRACE_INFO(NOTIFY_DETACH_END); if (intransitionGroups.isEmpty()) @@ -3647,10 +3721,10 @@ bool ConnectorImpl::performIeeeOuiHandshake() // parse client OUI. if (hal->getOuiSink(ouiId, &modelName[0], sizeof(modelName), chipRevision)) { - DP_LOG(("DP> SINK-OUI id(0x%08x) %s: rev:%d.%d", ouiId, - (NvU8*)modelName, - (unsigned)DRF_VAL(_DPCD, _SINK_HARDWARE_REV, _MAJOR, chipRevision), - (unsigned)DRF_VAL(_DPCD, _SINK_HARDWARE_REV, _MINOR, chipRevision))); + DP_PRINTF(DP_NOTICE, "DP> SINK-OUI id(0x%08x) %s: rev:%d.%d", ouiId, + (NvU8*)modelName, + (unsigned)DRF_VAL(_DPCD, _SINK_HARDWARE_REV, _MAJOR, chipRevision), + (unsigned)DRF_VAL(_DPCD, _SINK_HARDWARE_REV, _MINOR, chipRevision)); return true; } } @@ -3703,13 +3777,15 @@ void ConnectorImpl::forceLinkTraining() void ConnectorImpl::powerdownLink(bool bPowerdownPanel) { - LinkConfiguration powerOff = getMaxLinkConfig(); bool bPanelPwrSts = true; - powerOff.lanes = 0; - // Inform Sink about Main Link Power Down. + + LinkConfiguration powerOff = getMaxLinkConfig(); + powerOff.lanes = 0; + powerOff.peakRate = RBR; // Set to lowest peakRate if (linkUseMultistream() && bPowerDownPhyBeforeD3) { + // Inform Sink about Main Link Power Down. PowerDownPhyMessage powerDownPhyMsg; NakData nack; @@ -3736,7 +3812,7 @@ void ConnectorImpl::powerdownLink(bool bPowerdownPanel) hal->setPowerState(PowerStateD3); } - train(powerOff, !bPowerdownPanel); // Train to 0 links 0 BW + train(powerOff, !bPowerdownPanel); // Train to 0 laneCount, RBR linkRate (powerDown sequence) // // If FEC is enabled, put panel to D3 here for non-eDP. @@ -3825,6 +3901,150 @@ bool ConnectorImpl::trainSingleHeadMultipleSSTLinkNotAlive(GroupImpl *pGroupAtta return true; } +TriState ConnectorImpl::requestDpTunnelBw(NvU8 requestBw) +{ + TriState status = Indeterminate; + + if (!hal->writeDpTunnelRequestedBw(requestBw)) + { + return status; + } + + Timeout timeout(this->timer, DP_TUNNEL_REQUEST_BW_MAX_TIME_MS); + do + { + timer->sleep(DP_TUNNEL_REQUEST_BW_POLLING_INTERVAL_MS); + status = hal->getDpTunnelBwRequestStatus(); + if (status != Indeterminate) + { + break; + } + } while(timeout.valid()); + + return status; +} + +/*! + * @brief Allocate the requested Tunnel BW + * + * @return maximum tunnel bw required for this connector + * + */ +NvU64 ConnectorImpl::getMaxTunnelBw() +{ + return highestAssessedLC.peakRate * highestAssessedLC.lanes * 8; +} + +/*! + * @brief Allocate the requested Tunnel BW + * + * @param[in] bandwidth Requested BW in bps + * @return boolean to indicate success/failure + * + */ +bool ConnectorImpl::allocateDpTunnelBw(NvU64 bandwidth) +{ + NvU8 estimatedBw = 0; + NvU8 granularityMultiplier = 0; + NvU8 requestBw = 0; + TriState requestStatus = Indeterminate; + + if (!bIsDpTunnelBwAllocationEnabled) + { + return false; + } + + // Threshold the request bw to the max link configuration + if (bandwidth > getMaxTunnelBw()) + { + bandwidth = getMaxTunnelBw(); + } + + if (!hal->getDpTunnelEstimatedBw(estimatedBw)) + { + return false; + } + + if (!hal->getDpTunnelGranularityMultiplier(granularityMultiplier)) + { + return false; + } + + // + // Granularity is in Gbps. Eg: 0.25 Gpbs, 0.5 Gpbs, 1 Gbps + // bandwidth is in bps + // granularityMultiplier is 1/Granularity + // bandwidth = DPCD Value * Granularity + // = DPCD Value / granularityMultiplier + // DPCD Value = bandwidth * granularityMultiplier + // + requestBw = (NvU8) divide_ceil(bandwidth * granularityMultiplier, 1000 * 1000 * 1000); + + if (requestBw > estimatedBw) + { + requestBw = estimatedBw; + } + + requestStatus = requestDpTunnelBw(requestBw); + // This shouldn't be Indeterminate. The request can succeed or fail. Indeterminate means something else went wrong + if (requestStatus == Indeterminate) + { + return false; + } + + if (requestStatus == False) + { + // As per DP spec, if the allocation fails, the Estimated BW now contains the actual BW. Request estimatedBW now + if (!hal->getDpTunnelEstimatedBw(estimatedBw)) + { + return false; + } + + if (!hal->getDpTunnelGranularityMultiplier(granularityMultiplier)) + { + return false; + } + + requestBw = estimatedBw; + requestStatus = requestDpTunnelBw(requestBw); + // + // This shouldn't be Indeterminate. The request can succeed or fail. + // Intrdeterminate means something else went wrong + // + if (requestStatus == Indeterminate) + { + return false; + } + } + + if (requestStatus == True) + { + // Convert this back to bps and record the allocated BW + this->allocatedDpTunnelBw = ((NvU64) requestBw * 1000 * 1000 * 1000) / (NvU64) granularityMultiplier; + this->allocatedDpTunnelBwShadow = 0; + } + + return requestStatus; +} + +bool ConnectorImpl::allocateMaxDpTunnelBw() +{ + if (!bIsDpTunnelBwAllocationEnabled) + { + return true; + } + + NvU64 bandwidth = getMaxTunnelBw(); + if (!allocateDpTunnelBw(bandwidth)) + { + DP_PRINTF(DP_ERROR, "Failed to allocate DP Tunnel BW. Requested BW: %d Mbps", + bandwidth / (1000 * 1000)); + return false; + } + + return true; +} + void ConnectorImpl::assessLink(LinkTrainingType trainType) { this->bSkipLt = false; // Assesslink should never skip LT, so let's reset it in case it was set. @@ -3920,7 +4140,7 @@ void ConnectorImpl::assessLink(LinkTrainingType trainType) else if (!linkGuessed) { // We failed to query max link config from UEFI. Mark link as guessed. - DP_LOG(("DP CONN> Failed to query max link config from UEFI.")); + DP_PRINTF(DP_WARNING, "DP CONN> Failed to query max link config from UEFI."); linkGuessed = true; } @@ -3946,6 +4166,7 @@ void ConnectorImpl::assessLink(LinkTrainingType trainType) linkGuessed = true; } + allocateMaxDpTunnelBw(); return; } @@ -4071,7 +4292,7 @@ void ConnectorImpl::assessLink(LinkTrainingType trainType) if (bLinkStateToggle) { - DP_LOG(("DP> Link state toggled, reading DSC caps now")); + DP_PRINTF(DP_NOTICE, "DP> Link state toggled, reading DSC caps now"); // Read panel DSC support only if GPU supports DSC bool bGpuDscSupported; main->getDscCaps(&bGpuDscSupported); @@ -4092,6 +4313,14 @@ void ConnectorImpl::assessLink(LinkTrainingType trainType) } } } + + + // + // Now that we know the max link rate and lane count possible, try to acquire the full BW. + // Ideally clients are expected to call into DpLib to update the BW requirements + // This however is a failsafe to ensure that at least some BW is allocated on the DP Tunnel IN + // + allocateMaxDpTunnelBw(); } bool ConnectorImpl::handleCPIRQ() @@ -4101,7 +4330,7 @@ bool ConnectorImpl::handleCPIRQ() if (!isLinkActive()) { - DP_LOG(("DP> CP_IRQ: Ignored with link down")); + DP_PRINTF(DP_WARNING, "DP> CP_IRQ: Ignored with link down"); return true; } @@ -4110,11 +4339,11 @@ bool ConnectorImpl::handleCPIRQ() { NvBool bReAuthReq = NV_FALSE; NvBool bRxIDMsgPending = NV_FALSE; - DP_LOG(("DP> CP_IRQ HDCP ver:%s RxStatus:0x%2x HDCP Authenticated:%s Encryption:%s", - hdcpState.HDCP_State_22_Capable ? "2.2" : "1.x", - bStatus, - hdcpState.HDCP_State_Authenticated ? "YES" : "NO", - hdcpState.HDCP_State_Encryption ? "ON" : "OFF")); + DP_PRINTF(DP_NOTICE, "DP> CP_IRQ HDCP ver:%s RxStatus:0x%2x HDCP Authenticated:%s Encryption:%s", + hdcpState.HDCP_State_22_Capable ? "2.2" : "1.x", + bStatus, + hdcpState.HDCP_State_Authenticated ? "YES" : "NO", + hdcpState.HDCP_State_Encryption ? "ON" : "OFF"); // Check device if HDCP2.2 capable instead actual encryption status, if (hdcpState.HDCP_State_22_Capable) @@ -4139,7 +4368,7 @@ bool ConnectorImpl::handleCPIRQ() } else { - DP_LOG(("DP>Ignore integrity failure or ReAuth in transition or before AKE_INIT.")); + DP_PRINTF(DP_NOTICE, "DP>Ignore integrity failure or ReAuth in transition or before AKE_INIT."); } } else @@ -4164,7 +4393,7 @@ bool ConnectorImpl::handleCPIRQ() if (bReAuthReq || bRxIDMsgPending) { - DP_LOG(("DP> CP_IRQ: REAUTHENTICATION/RXIDPENDING REQUEST")); + DP_PRINTF(DP_NOTICE, "DP> CP_IRQ: REAUTHENTICATION/RXIDPENDING REQUEST"); if (bReAuthReq) { @@ -4198,7 +4427,7 @@ bool ConnectorImpl::handleCPIRQ() } else { - DP_LOG(("DP> CP_IRQ: RxStatus Read failed.")); + DP_PRINTF(DP_ERROR, "DP> CP_IRQ: RxStatus Read failed."); return false; } } @@ -4311,7 +4540,7 @@ bool ConnectorImpl::trainLinkOptimizedSingleHeadMultipleSST(GroupImpl *pGroupAtt { if (!pGroupAttached) { - DP_LOG(("DP-CONN> 2-sst group not valid")); + DP_PRINTF(DP_ERROR, "DP-CONN> 2-sst group not valid"); return false; } @@ -4332,7 +4561,7 @@ bool ConnectorImpl::trainLinkOptimizedSingleHeadMultipleSST(GroupImpl *pGroupAtt preferredLinkConfig.policy.setSkipFallBack(true); if (!train(preferredLinkConfig, false)) { - DP_LOG(("DP-CONN> Unable to set preferred linkconfig on 2-SST display")); + DP_PRINTF(DP_ERROR, "DP-CONN> Unable to set preferred linkconfig on 2-SST display"); return false; } if (pGroupAttached->singleHeadMultiStreamID == DP_SINGLE_HEAD_MULTI_STREAM_PIPELINE_ID_SECONDARY) @@ -4343,7 +4572,7 @@ bool ConnectorImpl::trainLinkOptimizedSingleHeadMultipleSST(GroupImpl *pGroupAtt } else { - DP_LOG(("DP-CONN> Invalid 2-SST Preferred link configuration")); + DP_PRINTF(DP_ERROR, "DP-CONN> Invalid 2-SST Preferred link configuration"); return false; } } @@ -4359,7 +4588,7 @@ bool ConnectorImpl::trainLinkOptimizedSingleHeadMultipleSST(GroupImpl *pGroupAtt this->pCoupledConnector->oneHeadSSTSecPrefLnkCfg.policy.setSkipFallBack(true); if (!train(this->pCoupledConnector->oneHeadSSTSecPrefLnkCfg, false)) { - DP_LOG(("DP-CONN> Unable set the primary configuration on secondary display")); + DP_PRINTF(DP_ERROR, "DP-CONN> Unable set the primary configuration on secondary display"); trainDone = false; } else @@ -4434,7 +4663,8 @@ bool ConnectorImpl::isNoActiveStreamAndPowerdown() (!bKeepLinkAliveForPCON) && (!bIsDiscoveryDetectActive) && (pendingRemoteHdcpDetections == 0) && - (!main->isInternalPanelDynamicMuxCapable())) + (!main->isInternalPanelDynamicMuxCapable()) && + (!main->isMDMEnabled())) { powerdownLink(); @@ -4523,7 +4753,7 @@ bool ConnectorImpl::trainLinkOptimized(LinkConfiguration lConfig) return false; if (!train(preferredLinkConfig, false)) { - DP_LOG(("DP-CONN> Preferred linkconfig could not be applied. Forcing on gpu side.")); + DP_PRINTF(DP_ERROR, "DP-CONN> Preferred linkconfig could not be applied. Forcing on gpu side."); train(preferredLinkConfig, true); } this->disableFlush(); @@ -4531,7 +4761,7 @@ bool ConnectorImpl::trainLinkOptimized(LinkConfiguration lConfig) } else { - DP_LOG(("DP-CONN> Preferred linkconfig does not support the mode")); + DP_PRINTF(DP_ERROR, "DP-CONN> Preferred linkconfig does not support the mode"); return false; } } @@ -4604,7 +4834,7 @@ bool ConnectorImpl::trainLinkOptimized(LinkConfiguration lConfig) if (bSkipRedundantLt || main->isInternalPanelDynamicMuxCapable()) { // Skip LT if the links are already trained to desired config. - DP_LOG(("DP-CONN> Skipping redundant LT.")); + DP_PRINTF(DP_NOTICE, "DP-CONN> Skipping redundant LT."); return true; } else @@ -4613,7 +4843,7 @@ bool ConnectorImpl::trainLinkOptimized(LinkConfiguration lConfig) if (activeLinkConfig.lanes && hal->isLinkStatusValid(activeLinkConfig.lanes)) { // Pass on a flag to RM ctrl call to skip LT at RM level. - DP_LOG(("DP-CONN> Skipping redundant LT from RM.")); + DP_PRINTF(DP_NOTICE, "DP-CONN> Skipping redundant LT from RM."); bSkipLt = true; } } @@ -4654,14 +4884,14 @@ bool ConnectorImpl::trainLinkOptimized(LinkConfiguration lConfig) if (!train(getMaxLinkConfig(), false)) { // - // Note here that if highest link config fails and a lower - // link config passes, link training will be returned as + // Note here that if highest link config fails and a lower + // link config passes, link training will be returned as // failure but activeLinkConfig will be set to that passing config. - // + // if (!willLinkSupportModeSST(activeLinkConfig, groupAttached->lastModesetInfo)) { // - // If none of the link configs pass LT or a fall back link config passed LT + // If none of the link configs pass LT or a fall back link config passed LT // but cannot support the mode, then we will force the optimized link config // on the link and mark LT as fail. // @@ -4671,7 +4901,7 @@ bool ConnectorImpl::trainLinkOptimized(LinkConfiguration lConfig) else { // - // If a fallback link config pass LT and can support + // If a fallback link config pass LT and can support // the mode, mark LT as pass. // bLinkTrainingSuccessful = true; @@ -4727,7 +4957,7 @@ bool ConnectorImpl::trainLinkOptimized(LinkConfiguration lConfig) { if (!train(preferredLinkConfig, false)) { - DP_LOG(("DP-CONN> Preferred linkconfig could not be applied. Forcing on gpu side.")); + DP_PRINTF(DP_ERROR, "DP-CONN> Preferred linkconfig could not be applied. Forcing on gpu side."); train(preferredLinkConfig, true); } return true; @@ -4776,7 +5006,7 @@ bool ConnectorImpl::trainLinkOptimized(LinkConfiguration lConfig) train(desired, false); if (!activeLinkConfig.isValid()) { - DP_LOG(("DPCONN> Unable to train link (at all). Forcing training (picture won't show up)")); + DP_PRINTF(DP_ERROR, "DPCONN> Unable to train link (at all). Forcing training (picture won't show up)"); train(getMaxLinkConfig(), true); // Mark link training as failed since we forced it @@ -4878,12 +5108,12 @@ bool ConnectorImpl::postLTAdjustment(const LinkConfiguration & lConfig, bool for lastPostCursor, (NvU8)activeLinkConfig.lanes)) { - DP_LOG(("DPCONN> Post Link Training : Unable to read current training values")); + DP_PRINTF(DP_ERROR, "DPCONN> Post Link Training : Unable to read current training values"); } if (hal->getTrainingPatternSelect() != TRAINING_DISABLED) { - DP_LOG(("DPCONN> Post Link Training : Training pattern is not disabled.")); + DP_PRINTF(DP_WARNING, "DPCONN> Post Link Training : Training pattern is not disabled."); } // @@ -4918,7 +5148,7 @@ bool ConnectorImpl::postLTAdjustment(const LinkConfiguration & lConfig, bool for currPostCursor, (NvU8)activeLinkConfig.lanes)) { - DP_LOG(("DPCONN> Post Link Training : Unable to read current training values")); + DP_PRINTF(DP_ERROR, "DPCONN> Post Link Training : Unable to read current training values"); } else { @@ -4931,7 +5161,7 @@ bool ConnectorImpl::postLTAdjustment(const LinkConfiguration & lConfig, bool for // Check if we have exceeded DP_POST_LT_ADJ_REQ_TIMER (200 ms) if ((timer->getTimeUs() - startTime) > DP_POST_LT_ADJ_REQ_TIMER) { - DP_LOG(("DPCONN> Post Link Training : DP_POST_LT_ADJ_REQ_TIMER is timed out.")); + DP_PRINTF(DP_ERROR, "DPCONN> Post Link Training : DP_POST_LT_ADJ_REQ_TIMER is timed out."); // Clear POST_LT_ADJ_REQ_GRANTED bit and start normal AV transmission hal->setPostLtAdjustRequestGranted(false); return true; @@ -4949,7 +5179,7 @@ bool ConnectorImpl::postLTAdjustment(const LinkConfiguration & lConfig, bool for currVoltageSwingLane, currPreemphasisLane)) { - DP_LOG(("DPCONN> Post Link Training : Failed to set RX drive setting according to DPCD 00206h & 00207h.")); + DP_PRINTF(DP_ERROR, "DPCONN> Post Link Training : Failed to set RX drive setting according to DPCD 00206h & 00207h."); } // Populate updated lane settings for currently active lanes @@ -4958,7 +5188,7 @@ bool ConnectorImpl::postLTAdjustment(const LinkConfiguration & lConfig, bool for // Change TX drive settings according to DPCD 00206h & 00207h if (!setLaneConfig(activeLinkConfig.lanes, updatedLaneSettings)) { - DP_LOG(("DPCONN> Post Link Training : Failed to set TX drive setting according to DPCD 00206h & 00207h.")); + DP_PRINTF(DP_ERROR, "DPCONN> Post Link Training : Failed to set TX drive setting according to DPCD 00206h & 00207h."); } // Update last Voltage Swing and Preemphasis values @@ -4968,7 +5198,7 @@ bool ConnectorImpl::postLTAdjustment(const LinkConfiguration & lConfig, bool for lastPostCursor, (NvU8)activeLinkConfig.lanes)) { - DP_LOG(("DPCONN> Post Link Training : Unable to read current training values")); + DP_PRINTF(DP_ERROR, "DPCONN> Post Link Training : Unable to read current training values"); } } } @@ -4999,7 +5229,7 @@ bool ConnectorImpl::postLTAdjustment(const LinkConfiguration & lConfig, bool for // if (!linkConfig.lowerConfig()) { - DP_LOG(("DPCONN> Post Link Training : Already at the lowest link rate. Cannot reduce further")); + DP_PRINTF(DP_ERROR, "DPCONN> Post Link Training : Already at the lowest link rate. Cannot reduce further"); return false; } train(linkConfig, force); @@ -5154,7 +5384,7 @@ bool ConnectorImpl::train(const LinkConfiguration & lConfig, bool force, if (AuxRetry::ack != hal->setMultistreamLink(lConfig.multistream)) { - DP_LOG(("DP> Failed to enable multistream mode on current link")); + DP_PRINTF(DP_WARNING, "DP> Failed to enable multistream mode on current link"); } } @@ -5303,7 +5533,7 @@ bool ConnectorImpl::enableFlush() if (activeGroup && !activeGroup->isHeadAttached() && intransitionGroups.isEmpty()) { - DP_LOG(("DPCONN> SST-Flush mode should not be called when head is not attached. Returning early without enabling flush")); + DP_PRINTF(DP_ERROR, "DPCONN> SST-Flush mode should not be called when head is not attached. Returning early without enabling flush"); return true; } } @@ -5321,7 +5551,7 @@ bool ConnectorImpl::enableFlush() if (!bHeadAttached) { - DP_LOG(("DPCONN> MST-Flush mode should not be called when head is not attached. Returning early without enabling flush")); + DP_PRINTF(DP_ERROR, "DPCONN> MST-Flush mode should not be called when head is not attached. Returning early without enabling flush"); return true; } } @@ -5396,11 +5626,11 @@ bool ConnectorImpl::deleteAllVirtualChannels() hal->payloadTableClearACT(); if (!hal->payloadAllocate(0, 0, 63)) { - DP_LOG(("DPCONN> Payload table could not be cleared")); + DP_PRINTF(DP_WARNING, "DPCONN> Payload table could not be cleared"); } // send clear_payload_id_table - DP_LOG(("DPCONN> Sending CLEAR_PAYLOAD_ID_TABLE broadcast")); + DP_PRINTF(DP_NOTICE, "DPCONN> Sending CLEAR_PAYLOAD_ID_TABLE broadcast"); for (unsigned retries = 0 ; retries < 7; retries++) { @@ -5517,8 +5747,6 @@ bool ConnectorImpl::allocateTimeslice(GroupImpl * targetGroup) } } - DP_ASSERT((maximumSlots - firstFreeSlot + 1) == freeSlots && "Timeslot allocation table corrupted"); - // Already allocated? DP_ASSERT(!targetGroup->timeslot.count && "Reallocation of stream that is already present"); @@ -5531,7 +5759,6 @@ bool ConnectorImpl::allocateTimeslice(GroupImpl * targetGroup) return true; } - void ConnectorImpl::flushTimeslotsToHardware() { for (ListElement * i = activeGroups.begin(); i != activeGroups.end(); i = i->next) @@ -5647,7 +5874,7 @@ void ConnectorImpl::afterDeleteStream(GroupImpl * group) { if (!hal->payloadWaitForACTReceived()) { - DP_LOG(("DP> Delete stream failed. Device did not acknowledge stream deletion ACT!")); + DP_PRINTF(DP_ERROR, "DP> Delete stream failed. Device did not acknowledge stream deletion ACT!"); DP_ASSERT(0); } } @@ -5674,7 +5901,7 @@ void ConnectorImpl::afterAddStream(GroupImpl * group) if (!hal->payloadWaitForACTReceived()) { - DP_LOG(("ACT has not been received.Triggering ACT once more")); + DP_PRINTF(DP_ERROR, "ACT has not been received.Triggering ACT once more"); DP_ASSERT(0); // @@ -5686,7 +5913,7 @@ void ConnectorImpl::afterAddStream(GroupImpl * group) main->triggerACT(); if (!hal->payloadWaitForACTReceived()) { - DP_LOG(("DP-TS> Downstream device did not receive ACT during stream re-add.")); + DP_PRINTF(DP_ERROR, "DP-TS> Downstream device did not receive ACT during stream re-add."); return; } } @@ -5794,7 +6021,7 @@ bool ConnectorImpl::beforeAddStream(GroupImpl * group, bool test, bool forFlushM DP_SINGLE_HEAD_MULTI_STREAM_MODE_NONE, false /*bEnableAudioOverRightPanel*/, bEnable2Head1Or); - DP_LOG(("DP-TS> Unable to allocate stream. Setting RG_DIV mode")); + DP_PRINTF(DP_ERROR, "DP-TS> Unable to allocate stream. Setting RG_DIV mode"); res = true; } else @@ -5838,7 +6065,7 @@ bool ConnectorImpl::beforeAddStreamMST(GroupImpl * group, bool test, bool forFlu { if (!test) { - DP_LOG(("DP-TS> Unable to allocate stream. Should call mainLink->configureStream to trigger RG_DIV mode")); + DP_PRINTF(DP_ERROR, "DP-TS> Unable to allocate stream. Should call mainLink->configureStream to trigger RG_DIV mode"); main->configureMultiStream(group->headIndex, group->timeslot.watermarks.hBlankSym, group->timeslot.watermarks.vBlankSym, 1, 0, 0, 0, group->colorFormat, group->singleHeadMultiStreamID, group->singleHeadMultiStreamMode, bAudioOverRightPanel); @@ -5855,7 +6082,7 @@ bool ConnectorImpl::beforeAddStreamMST(GroupImpl * group, bool test, bool forFlu hal->payloadAllocate(group->streamIndex, group->timeslot.begin, group->timeslot.count); } - DP_LOG(("DP-TS> Unable to allocate stream. Setting RG_DIV mode")); + DP_PRINTF(DP_ERROR, "DP-TS> Unable to allocate stream. Setting RG_DIV mode"); res = true; } } @@ -5882,7 +6109,7 @@ void ConnectorImpl::disableFlush( bool test) if (activeGroup && !activeGroup->isHeadAttached() && intransitionGroups.isEmpty()) { - DP_LOG(("DPCONN> SST-Flush mode disable should not be called when head is not attached. Returning early without disabling flush\n")); + DP_PRINTF(DP_ERROR, "DPCONN> SST-Flush mode disable should not be called when head is not attached. Returning early without disabling flush"); return; } } @@ -5900,7 +6127,7 @@ void ConnectorImpl::disableFlush( bool test) if (!bHeadAttached) { - DP_LOG(("DPCONN> MST-Flush mode disable should not be called when head is not attached. Returning early without disabling flush\n")); + DP_PRINTF(DP_ERROR, "DPCONN> MST-Flush mode disable should not be called when head is not attached. Returning early without disabling flush"); return; } } @@ -6008,7 +6235,7 @@ void ConnectorImpl::notifyLongPulse(bool statusConnected) if (!connectorActive) { - DP_LOG(("DP> Got a long pulse before any connector is active!!")); + DP_PRINTF(DP_ERROR, "DP> Got a long pulse before any connector is active!!"); return; } @@ -6019,17 +6246,17 @@ void ConnectorImpl::notifyLongPulse(bool statusConnected) if (existingDev && existingDev->isFakedMuxDevice() && !bIsMuxOnDgpu) { - DP_LOG((" NotifyLongPulse ignored as mux is not pointing to dGPU and there is a faked device. Marking detect complete")); + DP_PRINTF(DP_ERROR, "NotifyLongPulse ignored as mux is not pointing to dGPU and there is a faked device. Marking detect complete"); sink->notifyDetectComplete(); return; } if (existingDev && existingDev->isPreviouslyFakedMuxDevice() && !existingDev->isMarkedForDeletion()) { - DP_LOG((" NotifyLongPulse ignored as there is a previously faked device but it is not marked for deletion")); + DP_PRINTF(DP_NOTICE, "NotifyLongPulse ignored as there is a previously faked device but it is not marked for deletion"); if (!statusConnected) { - DP_LOG((" Calling notifyDetectComplete")); + DP_PRINTF(DP_NOTICE, "Calling notifyDetectComplete"); sink->notifyDetectComplete(); } return; @@ -6038,16 +6265,22 @@ void ConnectorImpl::notifyLongPulse(bool statusConnected) if (previousPlugged && statusConnected) { - if (main->isInternalPanelDynamicMuxCapable()) + if (main->isInternalPanelDynamicMuxCapable() || + main->isMDMEnabled()) + { return; + } + + DP_PRINTF(DP_NOTICE, "DP> Redundant plug"); + // When tunneling is enabled send out BW changed event for client to call set modelist again + timer->queueCallback(this, &tagDpBwAllocationChanged, 0, false /* not allowed in sleep */); - DP_LOG(("DP> Redundant plug")); for (Device * i = enumDevices(0); i; i=enumDevices(i)) { DeviceImpl * dev = (DeviceImpl *)i; if (dev->ignoreRedundantHotplug()) { - DP_LOG(("DP> Skipping link assessment")); + DP_PRINTF(DP_NOTICE, "DP> Skipping link assessment"); return; } } @@ -6064,8 +6297,7 @@ void ConnectorImpl::notifyLongPulse(bool statusConnected) (!(firmwareGroup && ((GroupImpl *)firmwareGroup)->headInFirmware)) && (hal->isMessagingEnabled())) { - DP_LOG(("DP> Bail out early on redundant hotplug with active" - "MST stream")); + DP_PRINTF(DP_ERROR, "DP> Bail out early on redundant hotplug with active MST stream"); return; } } @@ -6073,6 +6305,72 @@ void ConnectorImpl::notifyLongPulse(bool statusConnected) this->notifyLongPulseInternal(statusConnected); } +/*! + * @brief Compute the max BW required across all devices and try to allocate that BW + * + * @return Boolean to indicate success or failure + */ +bool ConnectorImpl::updateDpTunnelBwAllocation() +{ + NvU64 connectorTunnelBw = 0; + if (!bIsDpTunnelBwAllocationEnabled) + { + DP_PRINTF(DP_NOTICE, "Bw allocation not enabled"); + return true; + } + + for (Device * i = enumDevices(0); i; i = enumDevices(i)) + { + DeviceImpl * dev = (DeviceImpl *)i; + NvU64 devMaxModeBwRequired = dev->getMaxModeBwRequired(); + connectorTunnelBw += devMaxModeBwRequired; + } + + NvU64 maxTunnelBw = getMaxTunnelBw(); + if (connectorTunnelBw > maxTunnelBw) + { + connectorTunnelBw = maxTunnelBw; + } + + if (!allocateDpTunnelBw(connectorTunnelBw)) + { + DP_PRINTF(DP_ERROR, "Failed to allocate Dp Tunnel BW: %d", connectorTunnelBw); + return false; + } + return true; +} + +/*! + * @brief Enable/Disable DP Tunnel BW allocation depending on support and client request + * + * @return Boolean to indicate success or failure + */ +void ConnectorImpl::configureDpTunnelBwAllocation() +{ + bool bIsDpTunnelBwAllocationSupported = hal->getDpTunnelBwAllocationSupported(); + + if (this->bForceDisableTunnelBwAllocation) + { + bIsDpTunnelBwAllocationEnabled = false; + return; + } + + bIsDpTunnelBwAllocationSupported = bIsDpTunnelBwAllocationSupported && bClientRequestedDpTunnelBwAllocation; + + if (bIsDpTunnelBwAllocationEnabled == bIsDpTunnelBwAllocationSupported) + { + DP_PRINTF(DP_NOTICE, "Bw Allocation already in requested state: %d", bIsDpTunnelBwAllocationSupported); + return; + } + + bIsDpTunnelBwAllocationEnabled = hal->setDpTunnelBwAllocation(bIsDpTunnelBwAllocationSupported); + + if (bIsDpTunnelBwAllocationEnabled != bIsDpTunnelBwAllocationSupported) + { + DP_PRINTF(DP_WARNING, "Unable to set BW allocation to requested state: %d", bIsDpTunnelBwAllocationSupported); + } +} + // // notifyLongPulse() filters redundant hotplug notifications and calls into // notifyLongPulseInternal(). @@ -6135,7 +6433,7 @@ void ConnectorImpl::notifyLongPulseInternal(bool statusConnected) if (!hal->isAtLeastVersion(1, 0)) goto completed; - DP_LOG(("DP> HPD v%d.%d", hal->getRevisionMajor(), hal->getRevisionMinor())); + DP_PRINTF(DP_NOTICE, "DP> HPD v%d.%d", hal->getRevisionMajor(), hal->getRevisionMinor()); // // Handle to clear pending CP_IRQ that throw short pulse before L-HPD. There's no @@ -6144,7 +6442,7 @@ void ConnectorImpl::notifyLongPulseInternal(bool statusConnected) // if (hal->interruptContentProtection()) { - DP_LOG(("DP>clear pending CP interrupt at hpd")); + DP_PRINTF(DP_NOTICE, "DP>clear pending CP interrupt at hpd"); hal->clearInterruptContentProtection(); } @@ -6155,7 +6453,7 @@ void ConnectorImpl::notifyLongPulseInternal(bool statusConnected) // if (!performIeeeOuiHandshake() && hal->isAtLeastVersion(1, 2)) { - DP_LOG(("DP> OUI Noncompliance! Sink is DP 1.2 and is required to implement")); + DP_PRINTF(DP_WARNING, "DP> OUI Noncompliance! Sink is DP 1.2 and is required to implement"); } // Apply Oui WARs here @@ -6179,7 +6477,7 @@ void ConnectorImpl::notifyLongPulseInternal(bool statusConnected) if (linkUseMultistream() != hal->getSupportsMultistream()) { linkAwaitingTransition = true; - DP_LOG(("CONN> Link Awaiting Transition.")); + DP_PRINTF(DP_NOTICE, "CONN> Link Awaiting Transition."); } else { @@ -6217,11 +6515,12 @@ void ConnectorImpl::notifyLongPulseInternal(bool statusConnected) discoveryManager = 0; cancelHdcpCallbacks(); + configureDpTunnelBwAllocation(); if (hal->getSupportsMultistream() && main->hasMultistream()) { bool bDeleteFirmwareVC = false; - DP_LOG(("DP> Multistream panel detected, building message manager")); + DP_PRINTF(DP_NOTICE, "DP> Multistream panel detected, building message manager"); // // Rebuild the message manager to reset and half received messages @@ -6235,12 +6534,12 @@ void ConnectorImpl::notifyLongPulseInternal(bool statusConnected) // if (AuxRetry::ack != hal->setMessagingEnable(true, true)) { - DP_LOG(("DP> Failed to enable messaging for multistream panel")); + DP_PRINTF(DP_WARNING, "DP> Failed to enable messaging for multistream panel"); } if (AuxRetry::ack != hal->setMultistreamHotplugMode(IRQ_HPD)) { - DP_LOG(("DP> Failed to enable hotplug mode for multistream panel")); + DP_PRINTF(DP_WARNING, "DP> Failed to enable hotplug mode for multistream panel"); } discoveryManager = new DiscoveryManager(messageManager, this, timer, hal); @@ -6248,7 +6547,7 @@ void ConnectorImpl::notifyLongPulseInternal(bool statusConnected) // Check and clear if any pending message here if (hal->clearPendingMsg() || bForceClearPendingMsg) { - DP_LOG(("DP> Stale MSG found: set branch to D3 and back to D0...")); + DP_PRINTF(DP_NOTICE, "DP> Stale MSG found: set branch to D3 and back to D0..."); if (hal->isAtLeastVersion(1, 4)) { hal->setMessagingEnable(false, true); @@ -6333,7 +6632,7 @@ void ConnectorImpl::notifyLongPulseInternal(bool statusConnected) if (!status) { // corrupt edid - DP_LOG(("DP-CONN> Corrupt Edid!")); + DP_PRINTF(DP_ERROR, "DP-CONN> Corrupt Edid!"); // Reading the EDID can fail if AUX is dead. // So update DPCD state after max number of retries. @@ -6341,7 +6640,7 @@ void ConnectorImpl::notifyLongPulseInternal(bool statusConnected) } } - DP_LOG(("DP-CONN> Edid read complete: Manuf Id: 0x%x, Name: %s", tmpEdid.getManufId(), tmpEdid.getName())); + DP_PRINTF(DP_NOTICE, "DP-CONN> Edid read complete: Manuf Id: 0x%x, Name: %s", tmpEdid.getManufId(), tmpEdid.getName()); dev.branch = false; dev.dpcdRevisionMajor = hal->getRevisionMajor(); dev.dpcdRevisionMinor = hal->getRevisionMinor(); @@ -6378,7 +6677,7 @@ void ConnectorImpl::notifyLongPulseInternal(bool statusConnected) // if (tmpEdid.WARFlags.keepLinkAlive) { - DP_LOG(("tmpEdid.WARFlags.keepLinkAlive = true, set bKeepOptLinkAlive to true. (keep link alive after assessLink())\n")); + DP_PRINTF(DP_NOTICE, "tmpEdid.WARFlags.keepLinkAlive = true, set bKeepOptLinkAlive to true. (keep link alive after assessLink())"); bKeepOptLinkAlive = true; } // Ack the test response, no matter it is a ref sink or not @@ -6402,7 +6701,7 @@ void ConnectorImpl::notifyLongPulseInternal(bool statusConnected) if (existingDev && existingDev->isVrrMonitorEnabled() && !existingDev->isVrrDriverEnabled()) { - DP_LOG(("DP> Re-enabling previously enabled zombie VRR monitor")); + DP_PRINTF(DP_NOTICE, "DP> Re-enabling previously enabled zombie VRR monitor"); existingDev->resetVrrEnablement(); existingDev->startVrrEnablement(); } @@ -6445,7 +6744,7 @@ void ConnectorImpl::notifyLongPulseInternal(bool statusConnected) while((retries < WAR_MAX_REASSESS_ATTEMPT) && (highestAssessedLC != maxLinkConfig)) { - DP_LOG(("DP> Assessed link is not equal to highest possible config. Reassess link.")); + DP_PRINTF(DP_WARNING, "DP> Assessed link is not equal to highest possible config. Reassess link."); this->assessLink(); retries++; } @@ -6489,9 +6788,8 @@ void ConnectorImpl::notifyLongPulseInternal(bool statusConnected) } completed: previousPlugged = statusConnected; - { - fireEvents(); - } + + fireEvents(); if (!statusConnected) { @@ -6505,6 +6803,43 @@ void ConnectorImpl::notifyLongPulseInternal(bool statusConnected) } } +void ConnectorImpl::handleDpTunnelingIrq() +{ + bool notifyClient = false; + if (hal->hasDpTunnelEstimatedBwChanged()) + { + NvU64 previousAllocatedDpTunnelBw = allocatedDpTunnelBw; + updateDpTunnelBwAllocation(); + if (previousAllocatedDpTunnelBw < allocatedDpTunnelBw) + { + notifyClient = true; + } + } + + if (hal->hasDpTunnelBwAllocationCapabilityChanged()) + { + bool bIsDpTunnelBwAllocationPreviouslyEnabled = bIsDpTunnelBwAllocationEnabled; + // Enables/disables the BW allocation support by reading the capability and client request + configureDpTunnelBwAllocation(); + + // Tunneling BW Capability has changed. Notify client + if (bIsDpTunnelBwAllocationPreviouslyEnabled != bIsDpTunnelBwAllocationEnabled) + { + notifyClient = true; + // Try to allocate max tunnel BW if we enabled BW allocation above + if (bIsDpTunnelBwAllocationEnabled) + { + allocateMaxDpTunnelBw(); + } + } + } + + if (notifyClient) + { + timer->queueCallback(this, &tagDpBwAllocationChanged, 0, false /* not allowed in sleep */); + } +} + void ConnectorImpl::notifyShortPulse() { // @@ -6514,10 +6849,10 @@ void ConnectorImpl::notifyShortPulse() // if (!connectorActive || !previousPlugged) { - DP_LOG(("DP> Got a short pulse after an unplug or before any connector is active!!")); + DP_PRINTF(DP_ERROR, "DP> Got a short pulse after an unplug or before any connector is active!!"); return; } - DP_LOG(("DP> IRQ")); + DP_PRINTF(DP_INFO, "DP> IRQ"); hal->notifyIRQ(); // Handle CP_IRQ @@ -6541,7 +6876,7 @@ void ConnectorImpl::notifyShortPulse() { if (!messageManager) { - DP_LOG(("DP> Received Stream status changed Interrupt, but not in multistream mode. Ignoring.")); + DP_PRINTF(DP_NOTICE, "DP> Received Stream status changed Interrupt, but not in multistream mode. Ignoring."); } else { @@ -6558,7 +6893,7 @@ void ConnectorImpl::notifyShortPulse() if (hal->interruptCapabilitiesChanged()) { - DP_LOG(("DP> Sink capabilities changed, re-reading caps and reinitializing the link.")); + DP_PRINTF(DP_NOTICE, "DP> Sink capabilities changed, re-reading caps and reinitializing the link."); // We need to set dpcdOffline to re-read the caps hal->setDPCDOffline(true); hal->clearInterruptCapabilitiesChanged(); @@ -6568,7 +6903,7 @@ void ConnectorImpl::notifyShortPulse() if (detectSinkCountChange()) { - DP_LOG(("DP> Change in downstream sink count. Re-analysing link.")); + DP_PRINTF(DP_NOTICE, "DP> Change in downstream sink count. Re-analysing link."); // We need to set dpcdOffline to re-read the caps hal->setDPCDOffline(true); notifyLongPulse(true); @@ -6579,7 +6914,7 @@ void ConnectorImpl::notifyShortPulse() { if (!messageManager) { - DP_LOG(("DP> Received DownReply Interrupt, but not in multistream mode. Ignoring.")); + DP_PRINTF(DP_NOTICE, "DP> Received DownReply Interrupt, but not in multistream mode. Ignoring."); } else { @@ -6591,7 +6926,7 @@ void ConnectorImpl::notifyShortPulse() { if (!messageManager) { - DP_LOG(("DP> Received UpRequest Interrupt, but not in multistream mode. Ignoring.")); + DP_PRINTF(DP_NOTICE, "DP> Received UpRequest Interrupt, but not in multistream mode. Ignoring."); } else { @@ -6604,7 +6939,7 @@ void ConnectorImpl::notifyShortPulse() Edid target; if (!EdidReadSST(target, auxBus, timer, hal->getPendingTestRequestEdidRead())) { - DP_LOG(("DP> Failed to read EDID.")); + DP_PRINTF(DP_WARNING, "DP> Failed to read EDID."); } return; @@ -6671,7 +7006,7 @@ void ConnectorImpl::notifyShortPulse() DP_ASSERT(0 && "Compliance: no group attached"); } - DP_LOG(("DP> Compliance: LT on IRQ request: 0x%x, %d.", requestedRate, requestedLanes)); + DP_PRINTF(DP_NOTICE, "DP> Compliance: LT on IRQ request: 0x%x, %d.", requestedRate, requestedLanes); // now see whether the current resolution is supported on the requested link config LinkConfiguration lc(&linkPolicy, requestedLanes, requestedRate, hal->getEnhancedFraming(), false); @@ -6679,7 +7014,7 @@ void ConnectorImpl::notifyShortPulse() { if (willLinkSupportModeSST(lc, groupAttached->lastModesetInfo)) { - DP_LOG(("DP> Compliance: Executing LT on IRQ: 0x%x, %d.", requestedRate, requestedLanes)); + DP_PRINTF(DP_NOTICE, "DP> Compliance: Executing LT on IRQ: 0x%x, %d.", requestedRate, requestedLanes); // we need to force the requirement irrespective of whether is supported or not. if (!enableFlush()) { @@ -6703,10 +7038,10 @@ void ConnectorImpl::notifyShortPulse() else // linkconfig is not supporting bandwidth. Fallback to default edid and notify DD. { // override the device with fallback edid and notify a bw change to DD. - DP_LOG(("DP> Compliance: Switching to compliance fallback EDID after IMP failure.")); + DP_PRINTF(DP_NOTICE, "DP> Compliance: Switching to compliance fallback EDID after IMP failure."); dev->switchToComplianceFallback(); - DP_LOG(("DP> Compliance: Notifying bandwidth change to DD after IMP failure.")); + DP_PRINTF(DP_NOTICE, "DP> Compliance: Notifying bandwidth change to DD after IMP failure."); // notify a bandwidth change to DD sink->bandwidthChangeNotification(dev, true); } @@ -6714,7 +7049,7 @@ void ConnectorImpl::notifyShortPulse() else { hal->setTestResponse(true); - DP_LOG(("DP> Compliance: Link Training when the head is not attached.")); + DP_PRINTF(DP_NOTICE, "DP> Compliance: Link Training when the head is not attached."); if (!train(lc, false)) train(lc, true); } @@ -6732,24 +7067,30 @@ void ConnectorImpl::notifyShortPulse() // Handle MCCS_IRQ if (hal->intteruptMCCS()) { - DP_LOG(("DP> MCCS_IRQ")); + DP_PRINTF(DP_NOTICE, "DP> MCCS_IRQ"); handleMCCSIRQ(); hal->clearInterruptMCCS(); } if (hal->getHdmiLinkStatusChanged()) { - DP_LOG(("DP> HDMI Link Status Changed")); + DP_PRINTF(DP_NOTICE, "DP> HDMI Link Status Changed"); handleHdmiLinkStatusChanged(); } if (hal->isPanelReplayErrorSet()) { - DP_LOG(("DP> Sink set Panel replay error")); + DP_PRINTF(DP_ERROR, "DP> Sink set Panel replay error"); handlePanelReplayError(); hal->clearPanelReplayError(); } + if (hal->getDpTunnelingIrq()) + { + handleDpTunnelingIrq(); + hal->clearDpTunnelingIrq(); + } + // // Check to make sure sink is not in D3 low power mode // and interlane alignment is good, etc @@ -6770,7 +7111,7 @@ void ConnectorImpl::notifyShortPulse() NvU8 retries = VRR_MAX_RETRIES; if (!dev->isVrrDriverEnabled()) { - DP_LOG(("DP> VRR enablement state is not synced. Re-enable it.")); + DP_PRINTF(DP_NOTICE, "DP> VRR enablement state is not synced. Re-enable it."); do { if (!dev->startVrrEnablement()) @@ -6783,7 +7124,7 @@ void ConnectorImpl::notifyShortPulse() if (!retries) { - DP_LOG(("DP> VRR enablement failed on multiple retries.")); + DP_PRINTF(DP_WARNING, "DP> VRR enablement failed on multiple retries."); } } } @@ -6797,7 +7138,7 @@ void ConnectorImpl::notifyShortPulse() return; } - DP_LOG(("DP> Link not alive, Try to restore link configuration")); + DP_PRINTF(DP_WARNING, "DP> Link not alive, Try to restore link configuration"); if (trainSingleHeadMultipleSSTLinkNotAlive(getActiveGroupForSST())) { @@ -6854,7 +7195,7 @@ bool ConnectorImpl::setPreferredLinkConfig(LinkConfiguration & lc, bool commit, if (!validateLinkConfiguration(lc)) { - DP_LOG(("Client requested bad LinkConfiguration.")); + DP_PRINTF(DP_ERROR, "Client requested bad LinkConfiguration."); return false; } @@ -6909,7 +7250,7 @@ void ConnectorImpl::notifyAcpiInitDone() // Fill the data in device's ddcEdid & mark ACPI Init done for (Device * i = enumDevices(0); i; i=enumDevices(i)) { - DP_LOG(("DPCONN> ACPI Init Done. DDC EDID Read completed!!")); + DP_PRINTF(DP_NOTICE, "DPCONN> ACPI Init Done. DDC EDID Read completed!!"); DeviceImpl * dev = (DeviceImpl*)i; dev->ddcEdid = ddcReadEdid; @@ -7118,7 +7459,8 @@ Connector * DisplayPort::createConnector Connector::EventSink * sink ) { - ConnectorImpl *connector = new ConnectorImpl(main, aux, timer, sink); + ConnectorImpl *connector; + connector = new ConnectorImpl(main, aux, timer, sink); if (connector == NULL || connector->constructorFailed) { delete connector; @@ -7500,5 +7842,13 @@ void ConnectorImpl::configInit() LT2FecLatencyMs = 0; bDscCapBasedOnParent = false; bForceClearPendingMsg = false; + allocatedDpTunnelBw = 0; + allocatedDpTunnelBwShadow = 0; + bIsDpTunnelBwAllocationEnabled = false; } +bool ConnectorImpl::dpUpdateDscStream(Group *target, NvU32 dscBpp) +{ + // TODO : Implement logic + return true; +} diff --git a/src/common/displayport/src/dp_deviceimpl.cpp b/src/common/displayport/src/dp_deviceimpl.cpp index 458f2b17dd..d0b3e483a2 100644 --- a/src/common/displayport/src/dp_deviceimpl.cpp +++ b/src/common/displayport/src/dp_deviceimpl.cpp @@ -32,6 +32,7 @@ #include "dp_deviceimpl.h" #include "dp_auxdefs.h" #include "dp_groupimpl.h" +#include "dp_printf.h" #include "ctrl/ctrl0073/ctrl0073dp.h" using namespace DisplayPort; @@ -96,7 +97,8 @@ DeviceImpl::DeviceImpl(DPCDHAL * hal, ConnectorImpl * connector, DeviceImpl * pa bSdpExtCapable(Indeterminate), bAsyncSDPCapable(Indeterminate), bDscPassThroughColorFormatWar(false), - bSkipFakeDeviceDpcdAccess(bSkipFakeDeviceDpcdAccess) + bSkipFakeDeviceDpcdAccess(bSkipFakeDeviceDpcdAccess), + maxModeBwRequired(0) { bandwidth.enum_path.dataValid = false; shadow.plugged = false; @@ -272,7 +274,7 @@ bool DeviceImpl::getI2cData(unsigned offset, NvU8 * buffer, unsigned sizeRequest if (status != AuxBus::success) { - DP_LOG(("DPDEV> %s: Failed read transaction", __FUNCTION__)); + DP_PRINTF(DP_ERROR, "DPDEV> %s: Failed read transaction", __FUNCTION__); break; } @@ -318,7 +320,7 @@ bool DeviceImpl::setI2cData(unsigned offset, NvU8 * buffer, unsigned sizeRequest if (status != AuxBus::success) { - DP_LOG(("DPDEV> %s: Failed write transaction", __FUNCTION__)); + DP_PRINTF(DP_ERROR, "DPDEV> %s: Failed write transaction", __FUNCTION__); return false; } *sizeCompleted = dataCompleted; @@ -356,7 +358,7 @@ bool DeviceImpl::setI2cData(unsigned offset, NvU8 * buffer, unsigned sizeRequest if (status != AuxBus::success) { - DP_LOG(("DPDEV> %s: Failed write transaction", __FUNCTION__)); + DP_PRINTF(DP_ERROR, "DPDEV> Failed write transaction"); break; } @@ -378,7 +380,7 @@ AuxBus::status DeviceImpl::getDpcdData(unsigned offset, NvU8 * buffer, { if (this->bSkipFakeDeviceDpcdAccess && isFakedMuxDevice()) { - DP_LOG(("Device is faked, returning nack\n")); + DP_PRINTF(DP_INFO, "Device is faked, returning nack\n"); return AuxBus::nack; } @@ -412,7 +414,7 @@ AuxBus::status DeviceImpl::setDpcdData(unsigned offset, NvU8 * buffer, { if (this->bSkipFakeDeviceDpcdAccess && isFakedMuxDevice()) { - DP_LOG(("Device is faked, returning nack\n")); + DP_PRINTF(DP_INFO, "Device is faked, returning nack\n"); return AuxBus::nack; } @@ -522,7 +524,7 @@ AuxBus::status DeviceImpl::transaction(Action action, Type type, int address, *sizeCompleted = read.replyNumOfBytesReadDPCD(); if (*sizeCompleted > sizeRequested) { - DP_LOG(("DPDEV> DPCD Read return more data than requested. Clamping buffer to requested size!")); + DP_PRINTF(DP_ERROR, "DPDEV> DPCD Read return more data than requested. Clamping buffer to requested size!"); *sizeCompleted = sizeRequested; } @@ -542,7 +544,7 @@ AuxBus::status DeviceImpl::transaction(Action action, Type type, int address, if (nWriteTransactions > 1) { - DP_LOG(("DPDEV> Set function will fail for transactions > 1, please incraease the array size!")); + DP_PRINTF(DP_ERROR, "DPDEV> Set function will fail for transactions > 1, please increase the array size!"); return AuxBus::nack; } @@ -568,7 +570,7 @@ AuxBus::status DeviceImpl::transaction(Action action, Type type, int address, *sizeCompleted = remoteI2cRead.replyNumOfBytesReadI2C(); if (*sizeCompleted > sizeRequested) { - DP_LOG(("DPDEV> I2C Read return more data than requested. Clamping buffer to requested size!")); + DP_PRINTF(DP_ERROR, "DPDEV> I2C Read return more data than requested. Clamping buffer to requested size!"); *sizeCompleted = sizeRequested; } @@ -667,7 +669,7 @@ static AuxBus::status _QueryFecStatus if (status != AuxBus::success) { - DP_LOG(("DP> Error querying FEC status!")); + DP_PRINTF(DP_ERROR, "DP> Error querying FEC status!"); return AuxBus::nack; } return AuxBus::success; @@ -691,7 +693,7 @@ static AuxBus::status _QueryFecErrorCount if (status != AuxBus::success) { - DP_LOG(("DP> Error querying FEC error count!")); + DP_PRINTF(DP_ERROR, "DP> Error querying FEC error count!"); return AuxBus::nack; } else @@ -719,7 +721,7 @@ static AuxBus::status _WriteFecConfiguration if (status != AuxBus::success) { - DP_LOG(("DP> Error setting FEC configuration!")); + DP_PRINTF(DP_ERROR, "DP> Error setting FEC configuration!"); return AuxBus::nack; } return AuxBus::success; @@ -732,7 +734,7 @@ AuxBus::status DeviceImpl::fecTransaction(NvU8 *fecStatus, NvU16 **fecErrorCount NvU8 data, lane, counter, laneData, offset; if (!bFECSupported) { - DP_LOG(("DP> FEC capability not correct!")); + DP_PRINTF(DP_ERROR, "DP> FEC capability not correct!"); return nack; } @@ -749,7 +751,7 @@ AuxBus::status DeviceImpl::fecTransaction(NvU8 *fecStatus, NvU16 **fecErrorCount fecErrorCount[i][j] = NV_DP_FEC_ERROR_COUNT_INVALID; } } - DP_LOG(("DP> FEC capability not correct!")); + DP_PRINTF(DP_ERROR, "DP> FEC capability not correct!"); return success; } } @@ -766,7 +768,7 @@ AuxBus::status DeviceImpl::fecTransaction(NvU8 *fecStatus, NvU16 **fecErrorCount fecErrorCount[i][j] = NV_DP_FEC_ERROR_COUNT_INVALID; } } - DP_LOG(("DP> FEC capability not correct!")); + DP_PRINTF(DP_ERROR, "DP> FEC capability not correct!"); return success; } } @@ -783,7 +785,7 @@ AuxBus::status DeviceImpl::fecTransaction(NvU8 *fecStatus, NvU16 **fecErrorCount fecErrorCount[i][j] = NV_DP_FEC_ERROR_COUNT_INVALID; } } - DP_LOG(("DP> FEC capability not correct!")); + DP_PRINTF(DP_ERROR, "DP> FEC capability not correct!"); return success; } } @@ -800,7 +802,7 @@ AuxBus::status DeviceImpl::fecTransaction(NvU8 *fecStatus, NvU16 **fecErrorCount fecErrorCount[i][j] = NV_DP_FEC_ERROR_COUNT_INVALID; } } - DP_LOG(("DP> FEC capability not correct!")); + DP_PRINTF(DP_ERROR, "DP> FEC capability not correct!"); return success; } } @@ -817,7 +819,7 @@ AuxBus::status DeviceImpl::fecTransaction(NvU8 *fecStatus, NvU16 **fecErrorCount fecErrorCount[i][j] = NV_DP_FEC_ERROR_COUNT_INVALID; } } - DP_LOG(("DP> FEC capability not correct!")); + DP_PRINTF(DP_ERROR, "DP> FEC capability not correct!"); return success; } } @@ -901,7 +903,7 @@ void DeviceImpl::dpcdOverrides() break; default: optimalLinkRate = RBR; - DP_LOG(("DP-DEV> Invalid link rate supplied. Falling back to RBR")); + DP_PRINTF(DP_ERROR, "DP-DEV> Invalid link rate supplied. Falling back to RBR"); break; } hal->overrideOptimalLinkCfg(optimalLinkRate, processedEdid.WARData.optimalLaneCount); @@ -1201,7 +1203,7 @@ void DeviceImpl::setPanelPowerParams(bool bSinkPowerStateD0, bool bPanelPowerSta { if (this->bypassDpcdPowerOff()) { - DP_LOG(("DP-DEV> Bypassing 600h write for this display")); + DP_PRINTF(DP_NOTICE, "DP-DEV> Bypassing 600h write for this display"); return; } @@ -1430,7 +1432,7 @@ bool DeviceImpl::getRawEpr(unsigned * totalEpr, unsigned * freeEpr, rawEprState if (nack.reason == NakDefer) continue; - DP_LOG(("DP-DEV> EPR message failed while getting RAW EPR")); + DP_PRINTF(DP_ERROR, "DP-DEV> EPR message failed while getting RAW EPR"); break; } @@ -1589,7 +1591,7 @@ NvBool DeviceImpl::getDSCSupport() else { - DP_LOG(("DP-DEV> DSC Support AUX READ failed for %s!", address.toString(sb))); + DP_PRINTF(DP_ERROR, "DP-DEV> DSC Support AUX READ failed for %s!", address.toString(sb)); } if (dscCaps.bDSCDecompressionSupported || dscCaps.bDSCPassThroughSupported) @@ -1602,27 +1604,34 @@ NvBool DeviceImpl::getDSCSupport() bool DeviceImpl::isPanelReplaySupported() { - return prCaps.panelReplaySupported; + return prCaps.bPanelReplaySupported; } void DeviceImpl::getPanelReplayCaps() { - NvU8 byte = 0; - unsigned size = 0; + NvU8 buffer[10] = {0U}; + unsigned size; + unsigned sizeCompleted; unsigned nakReason = NakUndefined; + size = 1U; if (AuxBus::success == this->getDpcdData(NV_DPCD20_PANEL_REPLAY_CAPABILITY, - &byte, sizeof(byte), &size, &nakReason)) + &buffer[0], size, &sizeCompleted, &nakReason)) { - prCaps.panelReplaySupported = - FLD_TEST_DRF(_DPCD20_PANEL, _REPLAY_CAPABILITY, _SUPPORTED, _YES, byte); + prCaps.bPanelReplaySupported = + FLD_TEST_DRF(_DPCD20_PANEL, _REPLAY_CAPABILITY, _SUPPORTED, + _YES, buffer[0]); + } + else + { + DP_PRINTF(DP_ERROR, "DP-DEV> Aux Read to DPCD offset 0xB0 failed!"); } } bool DeviceImpl::setPanelReplayConfig(panelReplayConfig prcfg) { - NvU8 config = 0; - unsigned size = 0; + NvU8 config = 0U; + unsigned size = 0U; unsigned nakReason = NakUndefined; if (prcfg.enablePanelReplay) @@ -1636,19 +1645,110 @@ bool DeviceImpl::setPanelReplayConfig(panelReplayConfig prcfg) _ENABLE_PR_MODE, _NO, config); } - if (AuxBus::success == this->setDpcdData(NV_DPCD20_PANEL_REPLAY_CONFIGURATION, + if (prcfg.bEnableCrcWithPr) + { + config = FLD_SET_DRF(_DPCD20_PANEL, _REPLAY_CONFIGURATION, + _ENABLE_CRC, _YES, config); + } + else + { + config = FLD_SET_DRF(_DPCD20_PANEL, _REPLAY_CONFIGURATION, + _ENABLE_CRC, _NO, config); + } + + if (prcfg.bHpdOnAdaptiveSyncSdpMissing) + { + config = FLD_SET_DRF(_DPCD20_PANEL, _REPLAY_CONFIGURATION, + _HPD_ADAPTIVE_SYNC_SDP_MISSING, _YES, config); + } + else + { + config = FLD_SET_DRF(_DPCD20_PANEL, _REPLAY_CONFIGURATION, + _HPD_ADAPTIVE_SYNC_SDP_MISSING, _NO, config); + } + + if (prcfg.bHpdOnSdpUncorrectableError) + { + config = FLD_SET_DRF(_DPCD20_PANEL, _REPLAY_CONFIGURATION, + _HPD_SDP_UNCORRECTABLE_ERROR, _YES, config); + } + else + { + config = FLD_SET_DRF(_DPCD20_PANEL, _REPLAY_CONFIGURATION, + _HPD_SDP_UNCORRECTABLE_ERROR, _NO, config); + } + + if (prcfg.bHpdOnRfbStorageErrors) + { + config = FLD_SET_DRF(_DPCD20_PANEL, _REPLAY_CONFIGURATION, + _HPD_RFB_STORAGE_ERRORS, _YES, config); + } + else + { + config = FLD_SET_DRF(_DPCD20_PANEL, _REPLAY_CONFIGURATION, + _HPD_RFB_STORAGE_ERRORS, _NO, config); + } + + if (prcfg.bHpdOnRfbActiveFrameCrcError) + { + config = FLD_SET_DRF(_DPCD20_PANEL, _REPLAY_CONFIGURATION, + _HPD_RFB_ACTIVE_FRAME_CRC_ERROR, _YES, config); + } + else + { + config = FLD_SET_DRF(_DPCD20_PANEL, _REPLAY_CONFIGURATION, + _HPD_RFB_ACTIVE_FRAME_CRC_ERROR, _NO, config); + } + + if (AuxBus::success != + this->setDpcdData(NV_DPCD20_PANEL_REPLAY_CONFIGURATION, &config, sizeof(config), &size, &nakReason)) { - return true; + return false; } - return false; + return true; +} + +bool DeviceImpl::getPanelReplayConfig(panelReplayConfig *pPrcfg) +{ + NvU8 config = 0U; + unsigned size = 0U; + unsigned nakReason = NakUndefined; + + if (AuxBus::success != + this->getDpcdData(NV_DPCD20_PANEL_REPLAY_CONFIGURATION, + &config, sizeof(config), &size, &nakReason)) + { + return false; + } + + pPrcfg->enablePanelReplay = FLD_TEST_DRF(_DPCD20_PANEL, _REPLAY_CONFIGURATION, + _ENABLE_PR_MODE, _YES, config); + + pPrcfg->bEnableCrcWithPr = FLD_TEST_DRF(_DPCD20_PANEL, _REPLAY_CONFIGURATION, + _ENABLE_CRC, _YES, config); + + pPrcfg->bHpdOnAdaptiveSyncSdpMissing = FLD_TEST_DRF(_DPCD20_PANEL, _REPLAY_CONFIGURATION, + _HPD_ADAPTIVE_SYNC_SDP_MISSING, _YES, config); + + pPrcfg->bHpdOnSdpUncorrectableError = FLD_TEST_DRF(_DPCD20_PANEL, _REPLAY_CONFIGURATION, + _HPD_SDP_UNCORRECTABLE_ERROR, _YES, config); + + pPrcfg->bHpdOnRfbStorageErrors = FLD_TEST_DRF(_DPCD20_PANEL, _REPLAY_CONFIGURATION, + _HPD_RFB_STORAGE_ERRORS, _YES, config); + + pPrcfg->bHpdOnRfbActiveFrameCrcError = FLD_TEST_DRF(_DPCD20_PANEL, _REPLAY_CONFIGURATION, + _HPD_RFB_ACTIVE_FRAME_CRC_ERROR, _YES, config); + + + return true; } bool DeviceImpl::getPanelReplayStatus(PanelReplayStatus *pPrStatus) { - NvU8 state = 0; - unsigned size = 0; + NvU8 state = 0U; + unsigned size = 0U; unsigned nakReason = NakUndefined; if (pPrStatus == NULL) @@ -1657,7 +1757,7 @@ bool DeviceImpl::getPanelReplayStatus(PanelReplayStatus *pPrStatus) return false; } - if(AuxBus::success == this->getDpcdData(NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS, + if (AuxBus::success == this->getDpcdData(NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS, &state, sizeof(state), &size, &nakReason)) { switch (DRF_VAL(_DPCD20, _PANEL_REPLAY_AND_FRAME_LOCK_STATUS, _PR_STATUS, state)) @@ -1680,11 +1780,10 @@ bool DeviceImpl::getPanelReplayStatus(PanelReplayStatus *pPrStatus) } return true; } - else - { - return false; - } + + return false; } + bool DeviceImpl::getFECSupport() { NvU8 byte = 0; @@ -1750,7 +1849,7 @@ bool DeviceImpl::parseDscCaps(const NvU8 *buffer, NvU32 bufferSize) if (bufferSize < 16) { - DP_LOG((" DSC caps buffer must be greater than or equal to 16")); + DP_PRINTF(DP_ERROR, "DSC caps buffer must be greater than or equal to 16"); return false; } @@ -1896,7 +1995,7 @@ bool DeviceImpl::parseBranchSpecificDscCaps(const NvU8 *buffer, NvU32 bufferSize { if (bufferSize < 3) { - DP_LOG((" Branch DSC caps buffer must be greater than or equal to 3")); + DP_PRINTF(DP_ERROR, "Branch DSC caps buffer must be greater than or equal to 3"); return false; } @@ -1930,7 +2029,7 @@ bool DeviceImpl::parseBranchSpecificDscCaps(const NvU8 *buffer, NvU32 bufferSize else { dscCaps.branchDSCMaximumLineBufferWidth = 0; - DP_LOG(("Value of branch DSC maximum line buffer width is invalid, so setting it to 0.")); + DP_PRINTF(DP_WARNING, "Value of branch DSC maximum line buffer width is invalid, so setting it to 0."); } } return true; @@ -1948,7 +2047,7 @@ bool DeviceImpl::readAndParseDSCCaps() if(AuxBus::success != this->getDpcdData(NV_DPCD14_DSC_SUPPORT, &rawDscCaps[0], sizeof(rawDscCaps), &sizeCompleted, &nakReason)) { - DP_LOG(("DP-DEV> Error querying DSC Caps on %s!", this->address.toString(sb))); + DP_PRINTF(DP_ERROR, "DP-DEV> Error querying DSC Caps on %s!", this->address.toString(sb)); return false; } @@ -1989,7 +2088,7 @@ void DeviceImpl::queryGUID2() } else { - DP_LOG(("DP-DEV> Error querying GUID2 on %s!", this->address.toString(sb))); + DP_PRINTF(DP_ERROR, "DP-DEV> Error querying GUID2 on %s!", this->address.toString(sb)); } } @@ -2016,7 +2115,7 @@ bool DeviceImpl::getDscEnable(bool *pEnable) if (status != AuxBus::success) { - DP_LOG(("DP-DEV> Error querying DSC Enable State!")); + DP_PRINTF(DP_ERROR, "DP-DEV> Error querying DSC Enable State!"); return false; } @@ -2163,7 +2262,7 @@ bool DeviceImpl::setDscEnable(bool enable) // if (!getDscEnable(&bCurrDscEnable)) { - DP_LOG(("DP-DEV> Not able to get DSC Enable State!")); + DP_PRINTF(DP_ERROR, "DP-DEV> Not able to get DSC Enable State!"); return false; } @@ -2172,20 +2271,20 @@ bool DeviceImpl::setDscEnable(bool enable) if(bDscPassThrough) { dscPassthroughByte = FLD_SET_DRF(_DPCD20, _DSC_ENABLE, _PASS_THROUGH, _YES, dscPassthroughByte); - DP_LOG(("DP-DEV> Enabling DSC Pass through on branch device - %s", - this->parent->getTopologyAddress().toString(buffer))); + DP_PRINTF(DP_NOTICE, "DP-DEV> Enabling DSC Pass through on branch device - %s", + this->parent->getTopologyAddress().toString(buffer)); } if (!bCurrDscEnable) { dscEnableByte = FLD_SET_DRF(_DPCD14, _DSC_ENABLE, _DECOMPRESSION, _YES, dscEnableByte); - DP_LOG(("DP-DEV> Enabling DSC decompression on device - %s", - this->devDoingDscDecompression->getTopologyAddress().toString(buffer))); + DP_PRINTF(DP_NOTICE, "DP-DEV> Enabling DSC decompression on device - %s", + this->devDoingDscDecompression->getTopologyAddress().toString(buffer)); } else { - DP_LOG(("DP-DEV> DSC decompression is already enabled on device - %s", - this->devDoingDscDecompression->getTopologyAddress().toString(buffer))); + DP_PRINTF(DP_NOTICE, "DP-DEV> DSC decompression is already enabled on device - %s", + this->devDoingDscDecompression->getTopologyAddress().toString(buffer)); } } else @@ -2193,20 +2292,20 @@ bool DeviceImpl::setDscEnable(bool enable) if(bDscPassThrough) { dscPassthroughByte = FLD_SET_DRF(_DPCD20, _DSC_ENABLE, _PASS_THROUGH, _NO, dscPassthroughByte); - DP_LOG(("DP-DEV> Disabling DSC Pass through on branch device - %s", - this->parent->getTopologyAddress().toString(buffer))); + DP_PRINTF(DP_NOTICE, "DP-DEV> Disabling DSC Pass through on branch device - %s", + this->parent->getTopologyAddress().toString(buffer)); } if (bCurrDscEnable) { dscEnableByte = FLD_SET_DRF(_DPCD14, _DSC_ENABLE, _DECOMPRESSION, _NO, dscEnableByte); - DP_LOG(("DP-DEV> Disabling DSC decompression on device - %s", - this->devDoingDscDecompression->getTopologyAddress().toString(buffer))); + DP_PRINTF(DP_NOTICE, "DP-DEV> Disabling DSC decompression on device - %s", + this->devDoingDscDecompression->getTopologyAddress().toString(buffer)); } else { - DP_LOG(("DP-DEV> DSC decompression is already disabled on device - %s", - this->devDoingDscDecompression->getTopologyAddress().toString(buffer))); + DP_PRINTF(DP_NOTICE, "DP-DEV> DSC decompression is already disabled on device - %s", + this->devDoingDscDecompression->getTopologyAddress().toString(buffer)); } } @@ -2216,8 +2315,8 @@ bool DeviceImpl::setDscEnable(bool enable) &dscPassthroughByte, sizeof dscPassthroughByte, &size, &nakReason); if (dscPassThroughStatus != AuxBus::success) { - DP_LOG(("DP-DEV> Setting DSC Passthrough on parent branch %s failed", - this->parent->getTopologyAddress().toString(buffer))); + DP_PRINTF(DP_ERROR, "DP-DEV> Setting DSC Passthrough on parent branch %s failed", + this->parent->getTopologyAddress().toString(buffer)); } } @@ -2227,8 +2326,8 @@ bool DeviceImpl::setDscEnable(bool enable) &dscEnableByte, sizeof dscEnableByte, &size, &nakReason); if (dscEnableStatus != AuxBus::success) { - DP_LOG(("DP-DEV> Setting DSC Enable on sink %s failed", - this->devDoingDscDecompression->getTopologyAddress().toString(buffer))); + DP_PRINTF(DP_ERROR, "DP-DEV> Setting DSC Enable on sink %s failed", + this->devDoingDscDecompression->getTopologyAddress().toString(buffer)); } } @@ -2256,7 +2355,8 @@ bool DeviceImpl::setDscEnableDPToHDMIPCON(bool bDscEnable, bool bEnablePassThrou if (!this->isDSCPossible()) { - DP_LOG(("DP-DEV> DSC is not supported on DP to HDMI PCON - %s")); + DP_PRINTF(DP_ERROR, "DP-DEV> DSC is not supported on DP to HDMI PCON - %s", + this->getTopologyAddress().toString(buffer)); return false; } @@ -2265,14 +2365,14 @@ bool DeviceImpl::setDscEnableDPToHDMIPCON(bool bDscEnable, bool bEnablePassThrou if(bEnablePassThroughForPCON) { dscEnableByte = FLD_SET_DRF(_DPCD20, _DSC_ENABLE, _PASS_THROUGH, _YES, dscEnableByte); - DP_LOG(("DP-DEV> Enabling DSC Pass through on DP to HDMI PCON device - %s", - this->getTopologyAddress().toString(buffer))); + DP_PRINTF(DP_NOTICE, "DP-DEV> Enabling DSC Pass through on DP to HDMI PCON device - %s", + this->getTopologyAddress().toString(buffer)); } else { dscEnableByte = FLD_SET_DRF(_DPCD14, _DSC_ENABLE, _DECOMPRESSION, _YES, dscEnableByte); - DP_LOG(("DP-DEV> Enabling DSC decompression on DP to HDMI PCON device - %s", - this->getTopologyAddress().toString(buffer))); + DP_PRINTF(DP_NOTICE, "DP-DEV> Enabling DSC decompression on DP to HDMI PCON device - %s", + this->getTopologyAddress().toString(buffer)); } } @@ -2282,8 +2382,8 @@ bool DeviceImpl::setDscEnableDPToHDMIPCON(bool bDscEnable, bool bEnablePassThrou if (dscEnableStatus != AuxBus::success) { - DP_LOG(("DP-DEV> Setting DSC Enable on DP to HDMI PCON %s failed", - this->getTopologyAddress().toString(buffer))); + DP_PRINTF(DP_ERROR, "DP-DEV> Setting DSC Enable on DP to HDMI PCON %s failed", + this->getTopologyAddress().toString(buffer)); return false; } @@ -2517,13 +2617,13 @@ bool DeviceImpl::getPCONCaps(PCONCaps *pPCONCaps) break; } - DP_LOG((" DP2HDMI PCON caps - Max TMDS Clk: %u LinkBWGbps: %u MaxBpc: %u", - pPCONCaps->maxTmdsClkRate, pPCONCaps->maxHdmiLinkBandwidthGbps, pPCONCaps->maxBpc)); + DP_PRINTF(DP_NOTICE, "DP2HDMI PCON caps - Max TMDS Clk: %u LinkBWGbps: %u MaxBpc: %u", + pPCONCaps->maxTmdsClkRate, pPCONCaps->maxHdmiLinkBandwidthGbps, pPCONCaps->maxBpc); } } else { - DP_LOG((" DP-DEV> Error - DPCD Read for detailed port capabilities (0x80) failed.")); + DP_PRINTF(DP_ERROR, "DP-DEV> Error - DPCD Read for detailed port capabilities (0x80) failed."); return false; } return true; @@ -2571,7 +2671,7 @@ bool DeviceImpl::getIgnoreMSACap() } else { - DP_LOG(("DP-DEV> Aux Read from DPCD offset 0x7 failed!")); + DP_PRINTF(DP_ERROR, "DP-DEV> Aux Read from DPCD offset 0x7 failed!"); return false; } } @@ -2589,7 +2689,7 @@ bool DeviceImpl::getIgnoreMSACap() } else { - DP_LOG(("DP-DEV> Aux Read from DPCD offset 0x7 failed!")); + DP_PRINTF(DP_ERROR, "DP-DEV> Aux Read from DPCD offset 0x7 failed!"); return false; } } @@ -2632,13 +2732,13 @@ AuxRetry::status DeviceImpl::setIgnoreMSAEnable(bool msaTimingParamIgnoreEn) } else { - DP_LOG(("DP-DEV> Aux Write to DPCD offset 0x107 failed!")); + DP_PRINTF(DP_ERROR, "DP-DEV> Aux Write to DPCD offset 0x107 failed!"); return AuxRetry::nack; } } else { - DP_LOG(("DP-DEV> Aux Read from DPCD offset 0x7 failed!")); + DP_PRINTF(DP_ERROR, "DP-DEV> Aux Read from DPCD offset 0x107 failed!"); return AuxRetry::nack; } } @@ -2648,6 +2748,102 @@ AuxRetry::status DeviceImpl::setIgnoreMSAEnable(bool msaTimingParamIgnoreEn) } } +bool DeviceImpl::getDeviceSpecificData(NvU8 *oui, NvU8 *devIdString, + NvU8 *hwRevision, NvU8 *swMajorRevision, + NvU8 *swMinorRevision) +{ + NvU8 buffer[16] = {0}; + unsigned size = 13U; + unsigned sizeCompleted = 0U; + unsigned nakReason = NakUndefined; + unsigned i = 0U; + unsigned address; + + if (oui == NULL || devIdString == NULL || hwRevision == NULL || + swMajorRevision == NULL || swMinorRevision == NULL) + { + return false; + } + + if (!this->audioSink && !this->videoSink) + { + address = NV_DPCD_BRANCH_IEEE_OUI; + } + else + { + address = NV_DPCD_SINK_IEEE_OUI; + } + + if (AuxBus::success != this->getDpcdData(address, &buffer[0], + size, &sizeCompleted, &nakReason)) + { + return false; + } + + // 0x400-0x402 for sink device and 0x500-0x502 for branch device gives OUI. + for (i = 0U; i < DEVICE_OUI_SIZE; i++) + { + oui[i] = buffer[i]; + } + + // + // 0x403-0x408 for sink device and 0x503-0x508 for branch device provides + // device Identification string. + // + for (unsigned j = 0U; j < NV_DPCD_SOURCE_DEV_ID_STRING__SIZE; i++, j++) + { + devIdString[j] = buffer[i]; + } + + // 0x409 for sink and 0x509 for branch provides HW revision. + // 0x40A-0x40B for sink and 0x50A-0x50B for branch provides SW/Firmware revision. + *hwRevision = buffer[9]; + *swMajorRevision = buffer[10]; + *swMinorRevision = buffer[11]; + + return true; +} + +bool DeviceImpl::setModeList(DisplayPort::DpModesetParams *modeList, unsigned numModes) +{ + // Create a dummy group for compoundQuery + GroupImpl g(connector); + g.insert(this); + + maxModeBwRequired = 0; + + for (unsigned modeItr = 0; modeItr < numModes; modeItr++) + { + connector->beginCompoundQuery(); + DscParams dscParams = DscParams(); + dscParams.bCheckWithDsc = true; + + DpModesetParams &modesetParams = modeList[modeItr]; + NvU64 bpp = modesetParams.modesetInfo.depth; + DP_IMP_ERROR dpImpError = DP_IMP_ERROR_NONE; + + if (connector->compoundQueryAttach((Group *)&g, modesetParams, &dscParams, &dpImpError)) + { + if (dscParams.bEnableDsc) + { + bpp = divide_ceil(dscParams.bitsPerPixelX16, 16); + } + + NvU64 modeBwRequired = modesetParams.modesetInfo.pixelClockHz * bpp; + if (maxModeBwRequired < modeBwRequired) + { + maxModeBwRequired = modeBwRequired; + } + } + + connector->endCompoundQuery(); + } + + connector->updateDpTunnelBwAllocation(); + + return true; +} + void DeviceHDCPDetection::start() { @@ -2750,9 +2946,9 @@ DeviceHDCPDetection::handleRemoteDpcdReadDownReply { bksvReadCompleted = true; bBKSVReadMessagePending = false; - DP_LOG(("DP-QM> REMOTE_DPCD_READ(BKSV) {%p} at '%s' completed", - (MessageManager::Message *)&remoteBKSVReadMessage, - parent->address.toString(sb))); + DP_PRINTF(DP_NOTICE, "DP-QM> REMOTE_DPCD_READ(BKSV) {%p} at '%s' completed", + (MessageManager::Message *)&remoteBKSVReadMessage, + parent->address.toString(sb)); if (remoteBKSVReadMessage.replyNumOfBytesReadDPCD() != HDCP_KSV_SIZE) { @@ -2775,17 +2971,17 @@ DeviceHDCPDetection::handleRemoteDpcdReadDownReply for (unsigned i=0; iBKSV[i] = (remoteBKSVReadMessage.replyGetData())[i]; - DP_LOG(("DP-QM> Device at '%s' is with valid BKSV.", - parent->address.toString(sb))); + DP_PRINTF(DP_NOTICE, "DP-QM> Device at '%s' is with valid BKSV.", + parent->address.toString(sb)); } } else if (from == &remoteBCapsReadMessage) { bCapsReadCompleted = true; bBCapsReadMessagePending = false; - DP_LOG(("DP-QM> REMOTE_DPCD_READ(BCaps) {%p} at '%s' completed", - (MessageManager::Message *)&remoteBCapsReadMessage, - parent->address.toString(sb))); + DP_PRINTF(DP_NOTICE, "DP-QM> REMOTE_DPCD_READ(BCaps) {%p} at '%s' completed", + (MessageManager::Message *)&remoteBCapsReadMessage, + parent->address.toString(sb)); if (remoteBCapsReadMessage.replyNumOfBytesReadDPCD() != HDCP_BCAPS_SIZE) { @@ -2807,22 +3003,22 @@ DeviceHDCPDetection::handleRemoteDpcdReadDownReply *(parent->nvBCaps) = *(parent->BCAPS) = *remoteBCapsReadMessage.replyGetData(); isBCapsHDCP = true; - DP_LOG(("DP-QM> Device at '%s' is with valid BCAPS : %x", - parent->address.toString(sb), *remoteBCapsReadMessage.replyGetData())); + DP_PRINTF(DP_NOTICE, "DP-QM> Device at '%s' is with valid BCAPS : %x", + parent->address.toString(sb), *remoteBCapsReadMessage.replyGetData()); } else { if (isValidBKSV) { - DP_LOG(("DP-QM> Device at '%s' is with valid BKSV but Invalid BCAPS : %x", - parent->address.toString(sb), *remoteBCapsReadMessage.replyGetData())); + DP_PRINTF(DP_WARNING, "DP-QM> Device at '%s' is with valid BKSV but Invalid BCAPS : %x", + parent->address.toString(sb), *remoteBCapsReadMessage.replyGetData()); // Read the BCAPS DDC offset parent->transaction(AuxBus::read, AuxBus::i2cMot, HDCP_I2C_CLIENT_ADDR, &i2cBcaps, 1, &dataCompleted, &defaultReason, HDCP_BCAPS_DDC_OFFSET, 1); - DP_LOG(("DP-QM> Device at '%s' is with DDC BACPS: %x", - parent->address.toString(sb), i2cBcaps)); + DP_PRINTF(DP_NOTICE, "DP-QM> Device at '%s' is with DDC BACPS: %x", + parent->address.toString(sb), i2cBcaps); // If the Reserved Bit is SET, Device supports HDCP if (i2cBcaps & HDCP_BCAPS_DDC_EN_BIT) @@ -2835,7 +3031,7 @@ DeviceHDCPDetection::handleRemoteDpcdReadDownReply } else { - DP_LOG(("DP-QM> Device at '%s' is without valid BKSV and BCAPS, thus try 22BCAPS")); + DP_PRINTF(DP_NOTICE, "DP-QM> Device at '%s' is without valid BKSV and BCAPS, thus try 22BCAPS", parent->address.toString(sb)); Address parentAddress = parent->address.parent(); remote22BCapsReadMessage.setMessagePriority(NV_DP_SBMSG_PRIORITY_LEVEL_DEFAULT); @@ -2850,9 +3046,9 @@ DeviceHDCPDetection::handleRemoteDpcdReadDownReply { bCapsReadCompleted = true; bBCapsReadMessagePending = false; - DP_LOG(("DP-QM> REMOTE_DPCD_READ(22BCaps) {%p} at '%s' completed", - (MessageManager::Message *)&remote22BCapsReadMessage, - parent->address.toString(sb))); + DP_PRINTF(DP_NOTICE, "DP-QM> REMOTE_DPCD_READ(22BCaps) {%p} at '%s' completed", + (MessageManager::Message *)&remote22BCapsReadMessage, + parent->address.toString(sb)); if (remote22BCapsReadMessage.replyNumOfBytesReadDPCD() != HDCP22_BCAPS_SIZE) { @@ -2884,8 +3080,8 @@ DeviceHDCPDetection::handleRemoteDpcdReadDownReply // hdcp22 will validate certificate's bksv directly. isBCapsHDCP = isValidBKSV = true; - DP_LOG(("DP-QM> Device at '%s' is with valid 22BCAPS : %x", - parent->address.toString(sb), *remote22BCapsReadMessage.replyGetData())); + DP_PRINTF(DP_NOTICE, "DP-QM> Device at '%s' is with valid 22BCAPS : %x", + parent->address.toString(sb), *remote22BCapsReadMessage.replyGetData()); } } @@ -3012,11 +3208,11 @@ DeviceHDCPDetection::messageFailed parent->isHDCPCap = False; Address::StringBuffer sb; DP_USED(sb); - DP_LOG(("DP-QM> Message %s {%p} at '%s' failed. Device marked as not HDCP support.", - from == &remoteBKSVReadMessage ? "REMOTE_DPCD_READ(BKSV)" : - from == &remoteBCapsReadMessage ? "REMOTE_DPC_READ(BCaps)" : - from == &remote22BCapsReadMessage ? "REMOTE_DPC_READ(22BCaps)" : "???", - from, parent->address.toString(sb))); + DP_PRINTF(DP_ERROR, "DP-QM> Message %s {%p} at '%s' failed. Device marked as not HDCP support.", + from == &remoteBKSVReadMessage ? "REMOTE_DPCD_READ(BKSV)" : + from == &remoteBCapsReadMessage ? "REMOTE_DPC_READ(BCaps)" : + from == &remote22BCapsReadMessage ? "REMOTE_DPC_READ(22BCaps)" : "???", + from, parent->address.toString(sb)); // Destruct only when no message is pending if (!(bBKSVReadMessagePending || bBCapsReadMessagePending)) @@ -3073,11 +3269,11 @@ DeviceHDCPDetection::expired Address::StringBuffer sb; DP_USED(sb); - DP_LOG(("DP-QM> Requeing REMOTE_DPCD_READ_MESSAGE(BKSV) to %s", parentAddress.toString(sb))); + DP_PRINTF(DP_NOTICE, "DP-QM> Requeing REMOTE_DPCD_READ_MESSAGE(BKSV) to %s", parentAddress.toString(sb)); retryRemoteBKSVReadMessage = false; remoteBKSVReadMessage.set(parentAddress, parent->address.tail(), NV_DPCD_HDCP_BKSV_OFFSET, HDCP_KSV_SIZE); - DP_LOG(("DP-QM> Get BKSV (remotely) for '%s' sent REMOTE_DPCD_READ {%p}", parent->address.toString(sb), &remoteBKSVReadMessage)); + DP_PRINTF(DP_NOTICE, "DP-QM> Get BKSV (remotely) for '%s' sent REMOTE_DPCD_READ {%p}", parent->address.toString(sb), &remoteBKSVReadMessage); bBKSVReadMessagePending = true; messageManager->post(&remoteBKSVReadMessage, this); @@ -3089,11 +3285,11 @@ DeviceHDCPDetection::expired Address::StringBuffer sb; DP_USED(sb); - DP_LOG(("DP-QM> Requeing REMOTE_DPCD_READ_MESSAGE(BCAPS) to %s", parentAddress.toString(sb))); + DP_PRINTF(DP_NOTICE, "DP-QM> Requeing REMOTE_DPCD_READ_MESSAGE(BCAPS) to %s", parentAddress.toString(sb)); retryRemoteBCapsReadMessage = false; remoteBCapsReadMessage.set(parentAddress, parent->address.tail(), NV_DPCD_HDCP_BCAPS_OFFSET, HDCP_BCAPS_SIZE); - DP_LOG(("DP-QM> Get BCaps (remotely) for '%s' sent REMOTE_DPCD_READ {%p}", parent->address.toString(sb), &remoteBCapsReadMessage)); + DP_PRINTF(DP_NOTICE, "DP-QM> Get BCaps (remotely) for '%s' sent REMOTE_DPCD_READ {%p}", parent->address.toString(sb), &remoteBCapsReadMessage); bBCapsReadMessagePending = true; messageManager->post(&remoteBCapsReadMessage, this); @@ -3105,11 +3301,11 @@ DeviceHDCPDetection::expired Address::StringBuffer sb; DP_USED(sb); - DP_LOG(("DP-QM> Requeing REMOTE_DPCD_READ_MESSAGE(22BCAPS) to %s", parentAddress.toString(sb))); + DP_PRINTF(DP_NOTICE, "DP-QM> Requeing REMOTE_DPCD_READ_MESSAGE(22BCAPS) to %s", parentAddress.toString(sb)); retryRemote22BCapsReadMessage = false; remote22BCapsReadMessage.set(parentAddress, parent->address.tail(), NV_DPCD_HDCP22_BCAPS_OFFSET, HDCP22_BCAPS_SIZE); - DP_LOG(("DP-QM> Get 22BCaps (remotely) for '%s' sent REMOTE_DPCD_READ {%p}", parent->address.toString(sb), &remote22BCapsReadMessage)); + DP_PRINTF(DP_NOTICE, "DP-QM> Get 22BCaps (remotely) for '%s' sent REMOTE_DPCD_READ {%p}", parent->address.toString(sb), &remote22BCapsReadMessage); bBCapsReadMessagePending = true; messageManager->post(&remote22BCapsReadMessage, this); diff --git a/src/common/displayport/src/dp_discovery.cpp b/src/common/displayport/src/dp_discovery.cpp index 59c7207898..c5456d280e 100644 --- a/src/common/displayport/src/dp_discovery.cpp +++ b/src/common/displayport/src/dp_discovery.cpp @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2010-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2010-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -31,6 +31,7 @@ #include "dp_discovery.h" #include "dp_messages.h" #include "dp_tracing.h" +#include "dp_printf.h" using namespace DisplayPort; @@ -62,7 +63,7 @@ void DiscoveryManager::detectBranch(Device device) // *alternatively* we may have to use the local DPCD HAL to write this // 3. Enumerate any children that we may wish to queue detect on. // - DP_LOG(("%s(): target = %s", __FUNCTION__, device.address.toString(sb))); + DP_PRINTF(DP_NOTICE, "%s(): target = %s", __FUNCTION__, device.address.toString(sb)); BranchDetection * branchDetection = new BranchDetection(this, device); outstandingBranchDetections.insertBack(branchDetection); @@ -74,7 +75,7 @@ void DiscoveryManager::detectSink(DiscoveryManager::Device device, bool bFromCSN Address::StringBuffer sb; DP_USED(sb); - DP_LOG(("%s(): target = %s", __FUNCTION__, device.address.toString(sb))); + DP_PRINTF(DP_NOTICE, "%s(): target = %s", __FUNCTION__, device.address.toString(sb)); SinkDetection * sinkDetection = new SinkDetection(this, device, bFromCSN); sinkDetection->start(); } @@ -130,10 +131,10 @@ void DiscoveryManager::addDevice(const DiscoveryManager::Device & device) DP_ASSERT(!findDevice(device.address) && "Redundant add"); sink->discoveryNewDevice(device); - DP_LOG(("DP-DM> New device '%s' %s %s %s", device.address.toString(sb), - device.branch ? "Branch" : "", device.legacy ? "Legacy" : "", - device.peerDevice == Dongle ? "Dongle" : - device.peerDevice == DownstreamSink ? "DownstreamSink" : "")); + DP_PRINTF(DP_NOTICE, "DP-DM> New device '%s' %s %s %s", device.address.toString(sb), + device.branch ? "Branch" : "", device.legacy ? "Legacy" : "", + device.peerDevice == Dongle ? "Dongle" : + device.peerDevice == DownstreamSink ? "DownstreamSink" : ""); Address::NvU32Buffer addrBuffer; dpMemZero(addrBuffer, sizeof(addrBuffer)); @@ -152,10 +153,10 @@ void DiscoveryManager::removeDevice(Device * device) Address::StringBuffer sb; DP_USED(sb); - DP_LOG(("DP-DM> Lost device '%s' %s %s %s", device->address.toString(sb), - device->branch ? "Branch" : "", device->legacy ? "Legacy" : "", - device->peerDevice == Dongle ? "Dongle" : - device->peerDevice == DownstreamSink ? "DownstreamSink" : "")); + DP_PRINTF(DP_NOTICE, "DP-DM> Lost device '%s' %s %s %s", device->address.toString(sb), + device->branch ? "Branch" : "", device->legacy ? "Legacy" : "", + device->peerDevice == Dongle ? "Dongle" : + device->peerDevice == DownstreamSink ? "DownstreamSink" : ""); sink->discoveryLostDevice(device->address); @@ -184,7 +185,7 @@ DiscoveryManager::Device * DiscoveryManager::findChildDeviceForBranchWithGuid DiscoveryManager::Device * parentDevice = findDevice(guid); if (!parentDevice) { - DP_LOG(("DM> No Parent present for the device in DB.")); + DP_PRINTF(DP_ERROR, "DM> No Parent present for the device in DB."); return 0; } @@ -207,8 +208,8 @@ void DiscoveryManager::SinkDetection::detectCompleted(bool passed) { Address::StringBuffer sb; DP_USED(sb); - DP_LOG(("DP-DM> sink at '%s' failed GUID identification, demote to 1.1 sink.", - address.toString(sb))); + DP_PRINTF(DP_ERROR, "DP-DM> sink at '%s' failed GUID identification, demote to 1.1 sink.", + address.toString(sb)); device.dpcdRevisionMajor = 1; device.dpcdRevisionMinor = 1; } @@ -378,7 +379,7 @@ void DiscoveryManager::BranchDetection::expired(const void * tag) { Address::StringBuffer sb; DP_USED(sb); - DP_LOG(("DP-DM> Requeing LINK_ADDRESS_MESSAGE to %s", address.toString(sb))); + DP_PRINTF(DP_NOTICE, "DP-DM> Requeing LINK_ADDRESS_MESSAGE to %s", address.toString(sb)); retryLinkAddressMessage = false; linkAddressMessage.set(address); @@ -391,11 +392,11 @@ void DiscoveryManager::BranchDetection::expired(const void * tag) Address::StringBuffer sb; DP_USED(sb); - DP_LOG(("DP-DM> Requeing REMOTE_DPCD_WRITE_MESSAGE to %s", parentAddress.toString(sb))); + DP_PRINTF(DP_NOTICE, "DP-DM> Requeing REMOTE_DPCD_WRITE_MESSAGE to %s", parentAddress.toString(sb)); retryRemoteDpcdWriteMessage = false; remoteDpcdWriteMessage.set(parentAddress, parentAddress.tail(), NV_DPCD_GUID, sizeof(GUID), (NvU8 *)&parentDevice.peerGuid); - DP_LOG(("DP-DM> Setting GUID (remotely) for '%s' sent REMOTE_DPCD_WRITE {%p}", address.toString(sb), &remoteDpcdWriteMessage)); + DP_PRINTF(DP_NOTICE, "DP-DM> Setting GUID (remotely) for '%s' sent REMOTE_DPCD_WRITE {%p}", address.toString(sb), &remoteDpcdWriteMessage); parent->messageManager->post(&remoteDpcdWriteMessage, this); } @@ -410,7 +411,7 @@ void DiscoveryManager::SinkDetection::expired(const void * tag) Address::StringBuffer sb; DP_USED(sb); - DP_LOG(("DP-DM> Requeueing LAM message to %s", parentAddress.toString(sb))); + DP_PRINTF(DP_NOTICE, "DP-DM> Requeueing LAM message to %s", parentAddress.toString(sb)); retryLinkAddressMessage = false; linkAddressMessage.set(parentAddress); @@ -424,11 +425,11 @@ void DiscoveryManager::SinkDetection::expired(const void * tag) Address::StringBuffer sb; DP_USED(sb); - DP_LOG(("DP-DM> Requeueing REMOTE_DPCD_READ_MESSAGE to %s", parentAddress.toString(sb))); + DP_PRINTF(DP_NOTICE, "DP-DM> Requeueing REMOTE_DPCD_READ_MESSAGE to %s", parentAddress.toString(sb)); retryRemoteDpcdReadMessage = false; remoteDpcdReadMessage.set(parentAddress, parentAddress.tail(), NV_DPCD_GUID, sizeof(GUID)); - DP_LOG(("DP-DM> Setting GUID (remotely) for '%s' sent REMOTE_DPCD_READ {%p}", address.toString(sb), &remoteDpcdReadMessage)); + DP_PRINTF(DP_NOTICE, "DP-DM> Setting GUID (remotely) for '%s' sent REMOTE_DPCD_READ {%p}", address.toString(sb), &remoteDpcdReadMessage); parent->messageManager->post(&remoteDpcdReadMessage, this); } @@ -439,14 +440,14 @@ void DiscoveryManager::SinkDetection::expired(const void * tag) Address::StringBuffer sb; DP_USED(sb); - DP_LOG(("DP-DM> Requeueing REMOTE_DPCD_WRITE_MESSAGE to %s", parentAddress.toString(sb))); + DP_PRINTF(DP_NOTICE, "DP-DM> Requeueing REMOTE_DPCD_WRITE_MESSAGE to %s", parentAddress.toString(sb)); retryRemoteDpcdWriteMessage = false; remoteDpcdWriteMessage.set(parentAddress, parentAddress.tail(), NV_DPCD_GUID, sizeof(GUID), (NvU8 *)&device.peerGuid); - DP_LOG(("DP-DM> Setting GUID (remotely) for '%s' sent REMOTE_DPCD_WRITE {%p}", address.toString(sb), &remoteDpcdWriteMessage)); + DP_PRINTF(DP_NOTICE, "DP-DM> Setting GUID (remotely) for '%s' sent REMOTE_DPCD_WRITE {%p}", address.toString(sb), &remoteDpcdWriteMessage); parent->messageManager->post(&remoteDpcdWriteMessage, this); } @@ -484,10 +485,10 @@ void DiscoveryManager::BranchDetection::messageFailed(MessageManager::Message * Address::StringBuffer sb; DP_USED(sb); - DP_LOG(("DP-DM> Message %s {%p} at '%s' failed. Device marked not present.", - from == &linkAddressMessage ? "LINK_ADDRESS_MESSAGE" : - from == &remoteDpcdWriteMessage ? "REMOTE_DPCD_WRITE(GUID)" : "???", - from, address.toString(sb))); + DP_PRINTF(DP_ERROR, "DP-DM> Message %s {%p} at '%s' failed. Device marked not present.", + from == &linkAddressMessage ? "LINK_ADDRESS_MESSAGE" : + from == &remoteDpcdWriteMessage ? "REMOTE_DPCD_WRITE(GUID)" : "???", + from, address.toString(sb)); // @@ -537,11 +538,11 @@ void DiscoveryManager::SinkDetection::messageFailed(MessageManager::Message * fr Address::StringBuffer sb; DP_USED(sb); - DP_LOG(("DP-DM> Message %s {%p} at '%s' failed.", - from == &remoteDpcdWriteMessage ? "REMOTE_DPCD_WRITE(GUID)" : - from == &remoteDpcdReadMessage ? "REMOTE_DPCD_READ(GUID)" : - from == &linkAddressMessage ? "LINK_ADDRESS_MESSAGE" : "???", - from, address.toString(sb))); + DP_PRINTF(DP_ERROR, "DP-DM> Message %s {%p} at '%s' failed.", + from == &remoteDpcdWriteMessage ? "REMOTE_DPCD_WRITE(GUID)" : + from == &remoteDpcdReadMessage ? "REMOTE_DPCD_READ(GUID)" : + from == &linkAddressMessage ? "LINK_ADDRESS_MESSAGE" : "???", + from, address.toString(sb)); detectCompleted(false); } @@ -564,8 +565,8 @@ void DiscoveryManager::SinkDetection::handleLinkAddressDownReply() } device.portMap.inputMap |= (1 << child.portNumber); - DP_LOG(("DP-DM> handleLinkAddressDownReply for sink device on '%s': DPCD Rev = %d.%d", - address.toString(sb), device.dpcdRevisionMajor, device.dpcdRevisionMinor)); + DP_PRINTF(DP_NOTICE, "DP-DM> handleLinkAddressDownReply for sink device on '%s': DPCD Rev = %d.%d", + address.toString(sb), device.dpcdRevisionMajor, device.dpcdRevisionMinor); // Check if the device already has a GUID // or it is a dongle or on a logical port ; in which case no GUID is required. @@ -590,9 +591,9 @@ void DiscoveryManager::SinkDetection::handleRemoteDpcdReadDownReply() { Address::StringBuffer sb; DP_USED(sb); - DP_LOG(("DP-DM> REMOTE_DPCD_READ {%p} at '%s' completed", - (MessageManager::Message *)&remoteDpcdReadMessage, - address.toString(sb))); + DP_PRINTF(DP_NOTICE, "DP-DM> REMOTE_DPCD_READ {%p} at '%s' completed", + (MessageManager::Message *)&remoteDpcdReadMessage, + address.toString(sb)); if (remoteDpcdReadMessage.replyNumOfBytesReadDPCD() != sizeof(GUID)) { DP_ASSERT(0 && "Incomplete GUID in remote DPCD read message"); @@ -621,8 +622,8 @@ void DiscoveryManager::SinkDetection::handleRemoteDpcdReadDownReply() NV_DPCD_GUID, sizeof(GUID), (NvU8 *)&device.peerGuid); - DP_LOG(("DP-DM> Setting GUID (remotely) for '%s' sent REMOTE_DPCD_WRITE {%p}", - address.toString(sb), &remoteDpcdWriteMessage)); + DP_PRINTF(DP_NOTICE, "DP-DM> Setting GUID (remotely) for '%s' sent REMOTE_DPCD_WRITE {%p}", + address.toString(sb), &remoteDpcdWriteMessage); parent->messageManager->post(&remoteDpcdWriteMessage, this); } @@ -677,7 +678,7 @@ void DiscoveryManager::BranchDetection::handleLinkAddressDownReply() if (address == Address(0)) { - DP_LOG(("DP-DM> Setting GUID (locally) for '%s'", address.toString(sb))); + DP_PRINTF(DP_NOTICE, "DP-DM> Setting GUID (locally) for '%s'", address.toString(sb)); // // We're locally connected, use the DPCD HAL to write the new GUID // @@ -701,8 +702,8 @@ void DiscoveryManager::BranchDetection::handleLinkAddressDownReply() NV_DPCD_GUID, sizeof(GUID), (NvU8 *)&parentDevice.peerGuid); - DP_LOG(("DP-DM> Setting GUID (remotely) for '%s' sent REMOTE_DPCD_WRITE {%p}", - address.toString(sb), &remoteDpcdWriteMessage)); + DP_PRINTF(DP_NOTICE, "DP-DM> Setting GUID (remotely) for '%s' sent REMOTE_DPCD_WRITE {%p}", + address.toString(sb), &remoteDpcdWriteMessage); parent->messageManager->post(&remoteDpcdWriteMessage, this); } @@ -747,9 +748,9 @@ void DiscoveryManager::BranchDetection::start() Address::StringBuffer sb; DP_USED(sb); - DP_LOG(("DP-DM> Detecting '%s' (sending LINK_ADDRESS_MESSAGE {%p})", - address.toString(sb), - (MessageManager::Message *)&linkAddressMessage)); + DP_PRINTF(DP_NOTICE, "DP-DM> Detecting '%s' (sending LINK_ADDRESS_MESSAGE {%p})", + address.toString(sb), + (MessageManager::Message *)&linkAddressMessage); parent->messageManager->post(&linkAddressMessage, this); } @@ -774,9 +775,9 @@ void DiscoveryManager::SinkDetection::start() // Create a LINK_ADDRESS_MESSAGE to send to parent of this target linkAddressMessage.set(address.parent()); - DP_LOG(("DP-DM> Detecting '%s' (sending LINK_ADDRESS_MESSAGE {%p})", - address.toString(sb), - (MessageManager::Message *)&linkAddressMessage)); + DP_PRINTF(DP_NOTICE, "DP-DM> Detecting '%s' (sending LINK_ADDRESS_MESSAGE {%p})", + address.toString(sb), + (MessageManager::Message *)&linkAddressMessage); parent->messageManager->post(&linkAddressMessage, this); } else // The sink is found in LAM sent for branch, and with DPCD rev. @@ -839,7 +840,7 @@ void DiscoveryManager::ReceiverSink::messageProcessed(MessageManager::MessageRec if (csnMessage->getUpRequestData()->isInputPort) { - DP_LOG(("Concentrator?? Got CSN for an upstream port!")); + DP_PRINTF(DP_ERROR, "Concentrator?? Got CSN for an upstream port!"); return; } diff --git a/src/common/displayport/src/dp_edid.cpp b/src/common/displayport/src/dp_edid.cpp index 41f3ea9178..935ab375b4 100644 --- a/src/common/displayport/src/dp_edid.cpp +++ b/src/common/displayport/src/dp_edid.cpp @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2010-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2010-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -31,6 +31,7 @@ #include "dp_buffer.h" #include "dp_internal.h" #include "dp_edid.h" +#include "dp_printf.h" using namespace DisplayPort; @@ -259,13 +260,13 @@ NvU8 Edid::getLastPageChecksum() if (bufferSize == 0 || bufferSize < (this->getBlockCount() * 128)) { - DP_LOG(("DP-EDID> Edid length is 0 or less than required")); + DP_PRINTF(DP_ERROR, "DP-EDID> Edid length is 0 or less than required"); return 0; } if (bufferSize % 128 != 0) { - DP_LOG(("DP-EDID> Edid length is not a multiple of 128")); + DP_PRINTF(DP_ERROR, "DP-EDID> Edid length is not a multiple of 128"); return 0; } @@ -358,9 +359,8 @@ unsigned Edid::getBlockCount() if (blockCount > EDID_MAX_BLOCK_COUNT) { - DP_LOG(("DPEDID> %s: DDC read returned questionable results: " - "Total block Count too high: %d", - __FUNCTION__, blockCount)); + DP_PRINTF(DP_ERROR, "DPEDID> %s: DDC read returned questionable results: " + "Total block Count too high: %d", __FUNCTION__, blockCount); return 1; } // @@ -404,7 +404,7 @@ unsigned Edid::getBlockCount() else { // Unknown EDID version. Skip it. - DP_LOG(("DPEDID> %s: Unknown EDID Version!",__FUNCTION__)); + DP_PRINTF(DP_ERROR, "DPEDID> %s: Unknown EDID Version!",__FUNCTION__); DP_ASSERT(0 && "Unknown EDID version!"); return 1; } @@ -625,3 +625,24 @@ NvU8 DisplayPort::getEDIDBlockChecksum(const Buffer & buffer) chksum = chksum & 0xFF; return (NvU8)chksum; } + +bool DisplayPort::Edid::isValidHeader() const +{ + NvU8 validHeaderData[8] = { + 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0x00}; + + if (buffer.getLength() < 0x8) + return false; + + for (unsigned i = 0; i < 8; i++) + { + if (buffer.data[i] != validHeaderData[i]) + { + DP_PRINTF(DP_WARNING, "DP-EDID> Invalid EDID Header"); + return false; + } + } + + return true; +} \ No newline at end of file diff --git a/src/common/displayport/src/dp_evoadapter.cpp b/src/common/displayport/src/dp_evoadapter.cpp index 3bf4938d9e..d92ccf97ad 100644 --- a/src/common/displayport/src/dp_evoadapter.cpp +++ b/src/common/displayport/src/dp_evoadapter.cpp @@ -33,6 +33,7 @@ #include "dp_auxdefs.h" #include "dp_tracing.h" #include "dp_vrr.h" +#include "dp_printf.h" #include #include @@ -55,7 +56,7 @@ using namespace DisplayPort; // The first EvoMainLink constructor will populate that data base. // Later EvoMainLink will use values from that data base. // -static struct DP_REGKEY_DATABASE dpRegkeyDatabase = {0}; +struct DP_REGKEY_DATABASE dpRegkeyDatabase = {0}; enum DP_REG_VAL_TYPE { @@ -72,7 +73,6 @@ const struct DP_REG_VAL_TYPE valueType; } DP_REGKEY_TABLE [] = { - {NV_DP_REGKEY_ENABLE_AUDIO_BEYOND_48K, &dpRegkeyDatabase.bAudioBeyond48kEnabled, DP_REG_VAL_BOOL}, {NV_DP_REGKEY_OVERRIDE_DPCD_REV, &dpRegkeyDatabase.dpcdRevOveride, DP_REG_VAL_U32}, {NV_DP_REGKEY_DISABLE_SSC, &dpRegkeyDatabase.bSscDisabled, DP_REG_VAL_BOOL}, {NV_DP_REGKEY_ENABLE_FAST_LINK_TRAINING, &dpRegkeyDatabase.bFastLinkTrainingEnabled, DP_REG_VAL_BOOL}, @@ -96,7 +96,8 @@ const struct {NV_DP_REGKEY_REASSESS_MAX_LINK, &dpRegkeyDatabase.bReassessMaxLink, DP_REG_VAL_BOOL}, {NV_DP_REGKEY_MST_PCON_CAPS_READ_DISABLED, &dpRegkeyDatabase.bMSTPCONCapsReadDisabled, DP_REG_VAL_BOOL}, {NV_DP_REGKEY_FORCE_DSC_ON_SINK, &dpRegkeyDatabase.bForceDscOnSink, DP_REG_VAL_BOOL}, - {NV_DP_REGKEY_ENABLE_SKIP_DPCD_READS_WAR, &dpRegkeyDatabase.bSkipFakeDeviceDpcdAccess, DP_REG_VAL_BOOL} + {NV_DP_REGKEY_ENABLE_SKIP_DPCD_READS_WAR, &dpRegkeyDatabase.bSkipFakeDeviceDpcdAccess, DP_REG_VAL_BOOL}, + {NV_DP_REGKEY_DISABLE_TUNNEL_BW_ALLOCATION, &dpRegkeyDatabase.bForceDisableTunnelBwAllocation, DP_REG_VAL_BOOL} }; EvoMainLink::EvoMainLink(EvoInterface * provider, Timer * timer) : @@ -115,6 +116,7 @@ EvoMainLink::EvoMainLink(EvoInterface * provider, Timer * timer) : this->applyRegkeyOverrides(); _isDynamicMuxCapable = false; + _isMDMEnabled = false; _isLTPhyRepeaterSupported = true; _rmPhyRepeaterCount = 0; dpMemZero(&_DSC, sizeof(_DSC)); @@ -275,18 +277,15 @@ bool EvoMainLink::queryGPUCapability() // Check if MST feature needs to be disabled by regkey. This is requirement by few OEMs, they don't want to support // MST feature on particular sku, whenever requested through INF. // - _hasMultistream = (dpParams.bIsMultistreamSupported == NV_TRUE) && !_isMstDisabledByRegkey; + _hasMultistream = (dpParams.bIsMultistreamSupported == NV_TRUE) && !_isMstDisabledByRegkey; + _isStreamCloningEnabled = (dpParams.bIsSCEnabled == NV_TRUE) ? true : false; + _hasIncreasedWatermarkLimits = (dpParams.bHasIncreasedWatermarkLimits == NV_TRUE) ? true : false; + _isFECSupported = (dpParams.bFECSupported == NV_TRUE) ? true : false; + _useDfpMaxLinkRateCaps = (dpParams.bOverrideLinkBw == NV_TRUE) ? true : false; + _isLTPhyRepeaterSupported = (dpParams.bIsTrainPhyRepeater == NV_TRUE) ? true : false; + _isDownspreadSupported = (dpParams.bSupportDPDownSpread == NV_TRUE) ? true : false; - _gpuSupportedDpVersions = dpParams.dpVersionsSupported; - - _isStreamCloningEnabled = (dpParams.bIsSCEnabled == NV_TRUE) ? true : false; - _hasIncreasedWatermarkLimits = (dpParams.bHasIncreasedWatermarkLimits == NV_TRUE) ? true : false; - - _isFECSupported = (dpParams.bFECSupported == NV_TRUE) ? true : false; - - _useDfpMaxLinkRateCaps = (dpParams.bOverrideLinkBw == NV_TRUE) ? true : false; - - _isLTPhyRepeaterSupported = (dpParams.bIsTrainPhyRepeater == NV_TRUE) ? true : false; + _gpuSupportedDpVersions = dpParams.dpVersionsSupported; if (FLD_TEST_DRF(0073, _CTRL_CMD_DP_GET_CAPS, _MAX_LINK_RATE, _1_62, dpParams.maxLinkRate)) _maxLinkRateSupportedGpu = RBR; //in Hz @@ -616,7 +615,7 @@ void EvoMainLink::clearFlushMode(unsigned headMask, bool testMode) NvU32 ret = provider->rmControl5070(NV5070_CTRL_CMD_SET_SOR_FLUSH_MODE, ¶ms, sizeof params); if (ret != NVOS_STATUS_SUCCESS) { - DP_LOG(("DP_EVO> Disabling flush mode failed!")); + DP_PRINTF(DP_ERROR, "DP_EVO> Disabling flush mode failed!"); } } @@ -727,7 +726,7 @@ AuxBus::status EvoAuxBus::transaction(Action action, Type type, int address, // if ((sizeRequested == 0) && (type & (i2cMot | i2c)) && (action == write)) { - DP_LOG(("DP> Client requested address-only transaction")); + DP_PRINTF(DP_NOTICE, "DP> Client requested address-only transaction"); params.bAddrOnly = NV_TRUE; } else if ((sizeRequested == 0) && (type == native)) @@ -778,7 +777,7 @@ AuxBus::status EvoAuxBus::transaction(Action action, Type type, int address, // error, the request still went out on the DPAUX channel as part of // the last IC-over-AUX write transaction. So the error should be ignored. // - DP_LOG(("DP> %s: Ignore ERROR_NOT_SUPPORTED for writeStatusUpdateRequest. Returning Success", __FUNCTION__)); + DP_PRINTF(DP_NOTICE, "DP> %s: Ignore ERROR_NOT_SUPPORTED for writeStatusUpdateRequest. Returning Success", __FUNCTION__); return AuxBus::success; } @@ -787,7 +786,7 @@ AuxBus::status EvoAuxBus::transaction(Action action, Type type, int address, { if (devicePlugged) { - DP_LOG(("DP> AuxChCtl Failing, if a device is connected you shouldn't be seeing this")); + DP_PRINTF(DP_ERROR, "DP> AuxChCtl Failing, if a device is connected you shouldn't be seeing this"); } return nack; } @@ -856,8 +855,10 @@ void EvoMainLink::postLinkTraining(NvU32 head) void EvoMainLink::initializeRegkeyDatabase() { NvU32 i; + if (dpRegkeyDatabase.bInitialized) return; + for (i = 0; i < sizeof(DP_REGKEY_TABLE)/sizeof(DP_REGKEY_TABLE[0]); i++) { NvU32 tempValue = 0; @@ -878,6 +879,7 @@ void EvoMainLink::initializeRegkeyDatabase() break; } } + dpRegkeyDatabase.bInitialized = true; } @@ -975,25 +977,25 @@ bool EvoMainLink::train(const LinkConfiguration & link, bool force, DRF_DEF(0073_CTRL, _DP_CMD, _SET_LINK_BW, _TRUE); if (link.multistream) - dpCtrlCmd |= DRF_DEF(0073_CTRL, _DP_CMD, _SET_FORMAT_MODE, _MULTI_STREAM ); + dpCtrlCmd |= DRF_DEF(0073_CTRL, _DP_CMD, _SET_FORMAT_MODE, _MULTI_STREAM); if(link.bEnableFEC) dpCtrlCmd |= DRF_DEF(0073_CTRL, _DP_CMD, _ENABLE_FEC, _TRUE); if (isPostLtAdjRequestGranted) - dpCtrlCmd |= DRF_DEF(0073_CTRL, _DP_CMD, _POST_LT_ADJ_REQ_GRANTED, _YES ); + dpCtrlCmd |= DRF_DEF(0073_CTRL, _DP_CMD, _POST_LT_ADJ_REQ_GRANTED, _YES); if (link.enhancedFraming) - dpCtrlCmd |= DRF_DEF(0073_CTRL, _DP_CMD, _SET_ENHANCED_FRAMING, _TRUE ); + dpCtrlCmd |= DRF_DEF(0073_CTRL, _DP_CMD, _SET_ENHANCED_FRAMING, _TRUE); if (bSkipLt) - dpCtrlCmd |= DRF_DEF(0073_CTRL, _DP_CMD, _SKIP_HW_PROGRAMMING, _YES ); + dpCtrlCmd |= DRF_DEF(0073_CTRL, _DP_CMD, _SKIP_HW_PROGRAMMING, _YES); if (force) - dpCtrlCmd |= DRF_DEF(0073_CTRL, _DP_CMD, _FAKE_LINK_TRAINING, _DONOT_TOGGLE_TRANSMISSION ); + dpCtrlCmd |= DRF_DEF(0073_CTRL, _DP_CMD, _FAKE_LINK_TRAINING, _DONOT_TOGGLE_TRANSMISSION); if (linkTrainingType == NO_LINK_TRAINING) - dpCtrlCmd |= DRF_DEF(0073_CTRL, _DP_CMD, _NO_LINK_TRAINING, _YES ); + dpCtrlCmd |= DRF_DEF(0073_CTRL, _DP_CMD, _NO_LINK_TRAINING, _YES); else if (linkTrainingType == FAST_LINK_TRAINING) - dpCtrlCmd |= DRF_DEF(0073_CTRL, _DP_CMD, _FAST_LINK_TRAINING, _YES ); + dpCtrlCmd |= DRF_DEF(0073_CTRL, _DP_CMD, _FAST_LINK_TRAINING, _YES); targetIndex = NV0073_CTRL_DP_DATA_TARGET_SINK; if (bTrainPhyRepeater && (_rmPhyRepeaterCount != phyRepeaterCount)) @@ -1004,14 +1006,20 @@ bool EvoMainLink::train(const LinkConfiguration & link, bool force, if (bTrainPhyRepeater) { - - dpCtrlCmd |= DRF_DEF(0073_CTRL, _DP_CMD, _TRAIN_PHY_REPEATER, _YES ); + dpCtrlCmd |= DRF_DEF(0073_CTRL, _DP_CMD, _TRAIN_PHY_REPEATER, _YES); // // Start from the one closest to GPU. Note this is 1-based index. // targetIndex = phyRepeaterCount; } + if (!this->isDownspreadSupported()) + { + // If GPU does not support downspread, disabling downspread. + dpCtrlCmd |= DRF_DEF(0073_CTRL, _DP_CMD, _USE_DOWNSPREAD_SETTING, _FORCE); + dpCtrlCmd |= DRF_DEF(0073_CTRL, _DP_CMD, _DISABLE_DOWNSPREAD, _TRUE); + } + NV_DPTRACE_INFO(LINK_TRAINING_START, link.multistream, link.peakRate, link.lanes, phyRepeaterCount, _rmPhyRepeaterCount, bTrainPhyRepeater, targetIndex); @@ -1344,7 +1352,6 @@ void EvoMainLink::getLinkConfig(unsigned &laneCount, NvU64 & linkRate) if (params.linkBW != 0) { - // BUG: Beware, turbo mode need to be taken into account linkRate = ((NvU64)params.linkBW) * DP_LINK_BW_FREQ_MULTI_MBPS; } else @@ -1425,6 +1432,7 @@ bool EvoMainLink::queryAndUpdateDfpParams() _isDynamicMuxCapable = FLD_TEST_DRF(0073, _CTRL_DFP_FLAGS, _DYNAMIC_MUX_CAPABLE, _TRUE, dfpFlags); + _isMDMEnabled = FLD_TEST_DRF(0073, _CTRL_DFP_FLAGS, _MDM, _ENABLED, dfpFlags); return true; } @@ -1721,7 +1729,9 @@ void EvoMainLink::configureTriggerAll(NvU32 head, bool enable) MainLink * DisplayPort::MakeEvoMainLink(EvoInterface * provider, Timer * timer) { - return new EvoMainLink(provider, timer); + MainLink *main; + main = new EvoMainLink(provider, timer); + return main; } AuxBus * DisplayPort::MakeEvoAuxBus(EvoInterface * provider, Timer * timer) @@ -1753,7 +1763,7 @@ bool EvoMainLink::dscCrcTransaction(NvBool bEnable, gpuDscCrc *data, NvU16 *head code = provider->rmControl0073(NV0073_CTRL_CMD_DFP_DSC_CRC_CONTROL, ¶ms, sizeof(params)); if (code != NVOS_STATUS_SUCCESS) { - DP_LOG(("DP> Crc control failed.")); + DP_PRINTF(DP_ERROR, "DP> Crc control failed."); return false; } @@ -1822,8 +1832,8 @@ bool EvoMainLink::configureLinkRateTable pLinkRates->import((NvU8)params.linkBwTbl[i]); break; default: - DP_LOG(("DP_EVO> %s: Unsupported link rate received", - __FUNCTION__)); + DP_PRINTF(DP_ERROR, "DP_EVO> %s: Unsupported link rate received", + __FUNCTION__); DP_ASSERT(0); break; } diff --git a/src/common/displayport/src/dp_groupimpl.cpp b/src/common/displayport/src/dp_groupimpl.cpp index d6c54e39f3..4859efa872 100644 --- a/src/common/displayport/src/dp_groupimpl.cpp +++ b/src/common/displayport/src/dp_groupimpl.cpp @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -35,6 +35,7 @@ #include "dp_deviceimpl.h" #include "dp_groupimpl.h" #include "dp_connectorimpl.h" +#include "dp_printf.h" using namespace DisplayPort; @@ -110,11 +111,11 @@ void GroupImpl::update(Device * dev, bool allocationState) { if (allocationState) { - DP_LOG(("DP-TM> Attached stream:%d to %s", streamIndex, dev->getTopologyAddress().toString(sb))); + DP_PRINTF(DP_NOTICE, "DP-TM> Attached stream:%d to %s", streamIndex, dev->getTopologyAddress().toString(sb)); } else { - DP_LOG(("DP-TM> Detached stream:%d from %s", streamIndex, dev->getTopologyAddress().toString(sb))); + DP_PRINTF(DP_NOTICE, "DP-TM> Detached stream:%d from %s", streamIndex, dev->getTopologyAddress().toString(sb)); } ((DeviceImpl *)dev)->payloadAllocated = allocationState; @@ -126,12 +127,12 @@ void GroupImpl::update(Device * dev, bool allocationState) // we should not have ideally reached here unless allocate payload failed. if (allocationState) { - DP_LOG(("DP-TM> Allocate_payload: Failed to ATTACH stream:%d to %s", streamIndex, dev->getTopologyAddress().toString(sb))); + DP_PRINTF(DP_ERROR, "DP-TM> Allocate_payload: Failed to ATTACH stream:%d to %s", streamIndex, dev->getTopologyAddress().toString(sb)); DP_ASSERT(0); } else { - DP_LOG(("DP-TM> Allocate_payload: Failed to DETACH stream:%d from %s", streamIndex, dev->getTopologyAddress().toString(sb))); + DP_PRINTF(DP_ERROR, "DP-TM> Allocate_payload: Failed to DETACH stream:%d from %s", streamIndex, dev->getTopologyAddress().toString(sb)); DP_ASSERT(0); } diff --git a/src/common/displayport/src/dp_merger.cpp b/src/common/displayport/src/dp_merger.cpp index 362fc030d7..fbd207a33f 100644 --- a/src/common/displayport/src/dp_merger.cpp +++ b/src/common/displayport/src/dp_merger.cpp @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -34,6 +34,7 @@ #include "dp_auxdefs.h" #include "dp_crc.h" #include "dp_messageheader.h" +#include "dp_printf.h" using namespace DisplayPort; @@ -50,7 +51,7 @@ EncodedMessage * MessageTransactionMerger::pushTransaction(MessageHeader * heade if (!imsg) { - DP_LOG(("DP-MM> Ignore message due to OOM")); + DP_PRINTF(DP_WARNING, "DP-MM> Ignore message due to OOM"); return 0; } @@ -63,7 +64,7 @@ EncodedMessage * MessageTransactionMerger::pushTransaction(MessageHeader * heade { if (imsg->message.buffer.length == 0) { - DP_LOG(("DP-MM> Expected transaction-start, ignoring message transaction")); + DP_PRINTF(DP_NOTICE, "DP-MM> Expected transaction-start, ignoring message transaction"); return 0; } @@ -79,7 +80,7 @@ EncodedMessage * MessageTransactionMerger::pushTransaction(MessageHeader * heade // if (header->isTransactionStart && imsg->message.buffer.length) { - DP_LOG(("DP-MM> Unexpected repeated transaction-start, resetting message state.")); + DP_PRINTF(DP_WARNING, "DP-MM> Unexpected repeated transaction-start, resetting message state."); // We must have seen a previous incomplete transaction from this device // they've begun a new packet. Forget about the old thing @@ -93,7 +94,7 @@ EncodedMessage * MessageTransactionMerger::pushTransaction(MessageHeader * heade { freeOnNextCall = imsg; imsg->message.buffer.reset(); - DP_LOG(("DP-MM> Received truncated or corrupted message transaction")); + DP_PRINTF(DP_ERROR, "DP-MM> Received truncated or corrupted message transaction"); return 0; } @@ -108,7 +109,7 @@ EncodedMessage * MessageTransactionMerger::pushTransaction(MessageHeader * heade if (dataCrc != data->data[header->headerSizeBits/8 + header->payloadBytes - 1] || header->payloadBytes == 0) { - DP_LOG(("DP-MM> Received corruption message transactions")); + DP_PRINTF(DP_ERROR, "DP-MM> Received corruption message transactions"); freeOnNextCall = imsg; imsg->message.buffer.reset(); return 0; diff --git a/src/common/displayport/src/dp_messageheader.cpp b/src/common/displayport/src/dp_messageheader.cpp index c453724cd1..caaa1860c6 100644 --- a/src/common/displayport/src/dp_messageheader.cpp +++ b/src/common/displayport/src/dp_messageheader.cpp @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -32,6 +32,7 @@ #include "dp_bitstream.h" #include "dp_crc.h" #include "dp_messageheader.h" +#include "dp_printf.h" bool DisplayPort::decodeHeader(BitStreamReader * reader, MessageHeader * header, const Address & address) @@ -75,7 +76,7 @@ bool DisplayPort::decodeHeader(BitStreamReader * reader, MessageHeader * header, // Corrupt packet received char buffer[48*3+1]; dpHexDump(&buffer[0], sizeof(buffer), (NvU8*)reader->buffer() + startOffset, reader->offset() - startOffset); - DP_LOG(("DP-MM> Corrupt message transaction. Expected CRC %d. Message = {%s}", dpCalculateHeaderCRC(&crcReader), buffer)); + DP_PRINTF(DP_ERROR, "DP-MM> Corrupt message transaction. Expected CRC %d. Message = {%s}", dpCalculateHeaderCRC(&crcReader), buffer); return false; } diff --git a/src/common/displayport/src/dp_messages.cpp b/src/common/displayport/src/dp_messages.cpp index e8012b1ae1..730626b166 100644 --- a/src/common/displayport/src/dp_messages.cpp +++ b/src/common/displayport/src/dp_messages.cpp @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2010-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2010-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -34,6 +34,7 @@ #include "dp_merger.h" #include "dp_list.h" #include "dp_tracing.h" +#include "dp_printf.h" using namespace DisplayPort; namespace DisplayPort @@ -77,8 +78,8 @@ bool MessageManager::send(MessageManager::Message * message, NakData & nakData) hal->updateDPCDOffline(); if (hal->isDpcdOffline()) { - DP_LOG(("DP-MM> Device went offline while waiting for reply and so ignoring message %p (ID = %02X, target = %s)", - message, message->requestIdentifier, ((message->state).target).toString(sb))); + DP_PRINTF(DP_WARNING, "DP-MM> Device went offline while waiting for reply and so ignoring message %p (ID = %02X, target = %s)", + message, message->requestIdentifier, ((message->state).target).toString(sb)); completion.nakData.reason = NakDpcdFail; nakData = completion.nakData; completion.failed = true; @@ -197,8 +198,8 @@ void MessageManager::Message::expired(const void * tag) Address::StringBuffer sb; DP_USED(sb); - DP_LOG(("DP-MM> Message transmit time expired on message %p (ID = %02X, target = %s)", - (Message*)this, ((Message*)this)->requestIdentifier, (((Message*)this)->state.target).toString(sb))); + DP_PRINTF(DP_WARNING, "DP-MM> Message transmit time expired on message %p (ID = %02X, target = %s)", + (Message*)this, ((Message*)this)->requestIdentifier, (((Message*)this)->state.target).toString(sb)); Address::NvU32Buffer addrBuffer; dpMemZero(addrBuffer, sizeof(addrBuffer)); @@ -444,7 +445,7 @@ void MessageManager::onDownReplyReceived(bool status, EncodedMessage * message) } } - DP_LOG(("DPMM> Warning: Unmatched reply message")); + DP_PRINTF(DP_WARNING, "DPMM> Warning: Unmatched reply message"); nextMessage: transmitAwaitingUpReplies(); transmitAwaitingDownRequests(); @@ -475,7 +476,7 @@ MessageManager::~MessageManager() for (ListElement * i = notYetSentDownRequest.begin(); i!=notYetSentDownRequest.end(); ) { ListElement * next = i->next; - DP_LOG(("Down request message type 0x%x client is not cleaning up.", ((Message *)i)->requestIdentifier)); + DP_PRINTF(DP_WARNING, "Down request message type 0x%x client is not cleaning up.", ((Message *)i)->requestIdentifier); i = next; } } @@ -493,7 +494,7 @@ MessageManager::~MessageManager() for (ListElement * i = notYetSentUpReply.begin(); i!=notYetSentUpReply.end(); ) { ListElement * next = i->next; - DP_LOG(("Up reply message type 0x%x client is not cleaning up.", ((Message *)i)->requestIdentifier)); + DP_PRINTF(DP_WARNING, "Up reply message type 0x%x client is not cleaning up.", ((Message *)i)->requestIdentifier); i = next; } } @@ -511,7 +512,7 @@ MessageManager::~MessageManager() for (ListElement * i = awaitingReplyDownRequest.begin(); i!=awaitingReplyDownRequest.end(); ) { ListElement * next = i->next; - DP_LOG(("Down request message type 0x%x client is not cleaning up.", ((Message *)i)->requestIdentifier)); + DP_PRINTF(DP_WARNING, "Down request message type 0x%x client is not cleaning up.", ((Message *)i)->requestIdentifier); i = next; } } @@ -532,7 +533,7 @@ ParseResponseStatus MessageManager::Message::parseResponse(EncodedMessage * mess unsigned requestId = reader.readOrDefault(7, 0); if (requestId != requestIdentifier) { - DP_LOG(("DP-MM> Requested = %x Received = %x", requestId, requestIdentifier)); + DP_PRINTF(DP_NOTICE, "DP-MM> Requested = %x Received = %x", requestId, requestIdentifier); DP_ASSERT(0 && "Reply type doesn't match"); return ParseResponseWrong; } diff --git a/src/common/displayport/src/dp_mst_edid.cpp b/src/common/displayport/src/dp_mst_edid.cpp index 547316aa71..161f61523f 100644 --- a/src/common/displayport/src/dp_mst_edid.cpp +++ b/src/common/displayport/src/dp_mst_edid.cpp @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2010-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2010-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -33,6 +33,7 @@ #include "dp_address.h" #include "dp_messagecodings.h" #include "dp_messages.h" +#include "dp_printf.h" using namespace DisplayPort; @@ -47,8 +48,8 @@ void EdidReadMultistream::startReadingEdid() I2cWriteTransaction i2cWriteTransactions[1]; Address::StringBuffer buffer; DP_USED(buffer); - DP_LOG(("%s(): start for %s", __FUNCTION__, - topologyAddress.toString(buffer))); + DP_PRINTF(DP_NOTICE, "%s(): start for %s", __FUNCTION__, + topologyAddress.toString(buffer)); edidReaderManager.reset(); edid.resetData(); @@ -82,7 +83,7 @@ void EdidReadMultistream::messageCompleted(MessageManager::Message * from) NvU8 seg; NvU8 offset; - DP_LOG(("%s for %s", __FUNCTION__, topologyAddress.toString(buffer))); + DP_PRINTF(DP_NOTICE, "%s for %s", __FUNCTION__, topologyAddress.toString(buffer)); DP_ASSERT(DDCAddress && "DDCAddress is 0, it is wrong"); @@ -126,9 +127,9 @@ void EdidReadMultistream::readNextBlock(NvU8 seg, NvU8 offset) DP_ASSERT(sizeof(seg) == 1); DP_ASSERT(sizeof(offset) == 1); - DP_LOG(("%s(): for %s (seg/offset) = %d/%d", __FUNCTION__, - topologyAddress.toString(buffer), - seg, offset)); + DP_PRINTF(DP_NOTICE, "%s(): for %s (seg/offset) = %d/%d", __FUNCTION__, + topologyAddress.toString(buffer), + seg, offset); unsigned nWriteTransactions = 2; if (seg) @@ -161,7 +162,7 @@ void EdidReadMultistream::expired(const void * tag) { Address::StringBuffer buffer; DP_USED(buffer); - DP_LOG(("%s on %s", __FUNCTION__, topologyAddress.toString(buffer))); + DP_PRINTF(DP_NOTICE, "%s on %s", __FUNCTION__, topologyAddress.toString(buffer)); startReadingEdid(); } @@ -169,7 +170,7 @@ void EdidReadMultistream::messageFailed(MessageManager::Message * from, NakData { Address::StringBuffer buffer; DP_USED(buffer); - DP_LOG(("%s on %s", __FUNCTION__, topologyAddress.toString(buffer))); + DP_PRINTF(DP_NOTICE, "%s on %s", __FUNCTION__, topologyAddress.toString(buffer)); if (nakData->reason == NakDefer || nakData->reason == NakTimeout) { diff --git a/src/common/displayport/src/dp_splitter.cpp b/src/common/displayport/src/dp_splitter.cpp index 8b5e40d7f9..cdcc117394 100644 --- a/src/common/displayport/src/dp_splitter.cpp +++ b/src/common/displayport/src/dp_splitter.cpp @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -34,6 +34,7 @@ #include "dp_auxdefs.h" #include "dp_crc.h" #include "dp_configcaps.h" +#include "dp_printf.h" using namespace DisplayPort; @@ -210,7 +211,7 @@ void OutgoingTransactionManager::writeToWindow( bool firstAttempt) } retriesLeft--; - DP_LOG(("DP-MM> Messagebox write defer-ed. Q-ing retry.")); + DP_PRINTF(DP_WARNING, "DP-MM> Messagebox write defer-ed. Q-ing retry."); this->timer->queueCallback(this, "SPDE", DOWNSTREAM_RETRY_ON_DEFER_PERIOD); return; diff --git a/src/common/displayport/src/dp_sst_edid.cpp b/src/common/displayport/src/dp_sst_edid.cpp index 76ff92a512..94ec105088 100644 --- a/src/common/displayport/src/dp_sst_edid.cpp +++ b/src/common/displayport/src/dp_sst_edid.cpp @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2010-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2010-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -32,6 +32,7 @@ #include "dp_auxbus.h" #include "dp_internal.h" #include "dp_edid.h" +#include "dp_printf.h" using namespace DisplayPort; @@ -135,8 +136,8 @@ static bool readNextBlock(AuxBus * auxBus, NvU8 seg, NvU8 offset, Buffer & buffe if (retries >= EDID_MAX_AUX_RETRIES) return false; - DP_LOG(("DisplayPort: %s: Retrying at totalRead 0x%08x (replyType %x, size %x)", - __FUNCTION__, totalRead, auxStatus, sizeRequested)); + DP_PRINTF(DP_WARNING, "DisplayPort: %s: Retrying at totalRead 0x%08x (replyType %x, size %x)", + __FUNCTION__, totalRead, auxStatus, sizeRequested); // Wait for sometime between retries timer->sleep(EDID_AUX_WAIT_TIME); @@ -149,8 +150,8 @@ static bool readNextBlock(AuxBus * auxBus, NvU8 seg, NvU8 offset, Buffer & buffe if ((sizeRequested != sizeCompleted) && (totalRead + transactionSize < EDID_BLOCK_SIZE)) { - DP_LOG(("DisplayPort: %s: dpAux returned edid block smaller than expected. Read from totalRead 0x%08x (replyType %x, size %x)", - __FUNCTION__, totalRead, auxStatus, sizeRequested)); + DP_PRINTF(DP_ERROR, "DisplayPort: %s: dpAux returned edid block smaller than expected. Read from totalRead 0x%08x (replyType %x, size %x)", + __FUNCTION__, totalRead, auxStatus, sizeRequested); DP_ASSERT(0); } @@ -293,7 +294,7 @@ bool DisplayPort::EdidReadSST(Edid & edid, AuxBus * auxBus, Timer* timer, } else { - DP_LOG(("EDID> Failed to read EDID from RM and DPLib")); + DP_PRINTF(DP_ERROR, "EDID> Failed to read EDID from RM and DPLib"); } } } @@ -336,7 +337,7 @@ bool DisplayPort::EdidReadSST(Edid & edid, AuxBus * auxBus, Timer* timer, } while (elapsedTime < (EDID_READ_RETRY_TIMEOUT_MS * 1000)); } - DP_LOG(("EDID> Failed to ping sst DDC addresses")); + DP_PRINTF(DP_ERROR, "EDID> Failed to ping sst DDC addresses"); return false; } diff --git a/src/common/displayport/src/dp_timer.cpp b/src/common/displayport/src/dp_timer.cpp index f34431b8c3..22c4c62df2 100644 --- a/src/common/displayport/src/dp_timer.cpp +++ b/src/common/displayport/src/dp_timer.cpp @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2010-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2010-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -28,6 +28,7 @@ \***************************************************************************/ #include "dp_internal.h" #include "dp_timer.h" +#include "dp_printf.h" using namespace DisplayPort; void Timer::expired() @@ -99,8 +100,8 @@ void Timer::queueCallback(Timer::TimerCallback * target, const void * context, PendingCallback * callback = new PendingCallback(); if (callback == NULL) { - DP_LOG(("DP> %s: Failed to allocate callback", - __FUNCTION__)); + DP_PRINTF(DP_ERROR, "DP> %s: Failed to allocate callback", + __FUNCTION__); return; } callback->target = target; diff --git a/src/common/displayport/src/dp_vrr.cpp b/src/common/displayport/src/dp_vrr.cpp index f2253f8351..4c4d981c76 100644 --- a/src/common/displayport/src/dp_vrr.cpp +++ b/src/common/displayport/src/dp_vrr.cpp @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +29,7 @@ \***************************************************************************/ #include "dp_connectorimpl.h" #include "dp_vrr.h" +#include "dp_printf.h" using namespace DisplayPort; @@ -36,7 +37,7 @@ bool VrrEnablement::start() { bool rc; - DP_LOG(("DPHAL_VRR_ENABLE> **** VRR Enablement Started ****")); + DP_PRINTF(DP_NOTICE, "DPHAL_VRR_ENABLE> **** VRR Enablement Started ****"); rc = vrrGetPublicInfo(); if(rc) { @@ -56,7 +57,7 @@ bool VrrEnablement::start() return false; } - DP_LOG(("DPHAL_VRR_ENABLE> **** VRR Enablement Ends ****")); + DP_PRINTF(DP_NOTICE, "DPHAL_VRR_ENABLE> **** VRR Enablement Ends ****"); return true; } @@ -92,7 +93,7 @@ bool VrrEnablement::vrrEnableMonitor() { MainLink *main = this->parent->connector->main; - DP_LOG(("DPHAL_VRR_ENABLE> ** VRR_MON_ENABLE starts **")); + DP_PRINTF(DP_NOTICE, "DPHAL_VRR_ENABLE> ** VRR_MON_ENABLE starts **"); // Always set the enable F/W state m/c to a known state. if(main->vrrRunEnablementStage(VRR_ENABLE_STAGE_RESET_MONITOR, NULL) != true) @@ -130,7 +131,7 @@ bool VrrEnablement::vrrEnableMonitor() this->bMonitorEnabled = true; } - DP_LOG(("DPHAL_VRR_ENABLE> ** VRR_MON_ENABLE ends **")); + DP_PRINTF(DP_NOTICE, "DPHAL_VRR_ENABLE> ** VRR_MON_ENABLE ends **"); return this->bMonitorEnabled; } @@ -141,7 +142,7 @@ bool VrrEnablement::vrrEnableDriver() MainLink *main = this->parent->connector->main; - DP_LOG(("DPHAL_VRR_ENABLE> ** VRR_DRV_ENABLE starts **")); + DP_PRINTF(DP_NOTICE, "DPHAL_VRR_ENABLE> ** VRR_DRV_ENABLE starts **"); // Always set the enable F/W state m/c to a known state. if(main->vrrRunEnablementStage(VRR_ENABLE_STAGE_RESET_MONITOR, NULL) != true) @@ -189,7 +190,7 @@ bool VrrEnablement::vrrEnableDriver() return false; } - DP_LOG(("DPHAL_VRR_ENABLE> ** VRR_DRV_ENABLE ends **")); + DP_PRINTF(DP_NOTICE, "DPHAL_VRR_ENABLE> ** VRR_DRV_ENABLE ends **"); return true; } diff --git a/src/common/displayport/src/dp_wardatabase.cpp b/src/common/displayport/src/dp_wardatabase.cpp index 024d9621c7..f32ee05e65 100644 --- a/src/common/displayport/src/dp_wardatabase.cpp +++ b/src/common/displayport/src/dp_wardatabase.cpp @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -30,6 +30,7 @@ #include "dp_wardatabase.h" #include "dp_edid.h" #include "dp_connectorimpl.h" +#include "dp_printf.h" using namespace DisplayPort; @@ -116,8 +117,8 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen if (0x9227 == ProductID) { this->WARFlags.powerOnBeforeLt = true; - DP_LOG(("DP-WAR> WAR for Apple thunderbolt J29 panel")); - DP_LOG(("DP-WAR> - Monitor needs to be powered up before LT. Bug 933051")); + DP_PRINTF(DP_NOTICE, "DP-WAR> WAR for Apple thunderbolt J29 panel"); + DP_PRINTF(DP_NOTICE, "DP-WAR> - Monitor needs to be powered up before LT. Bug 933051"); } break; @@ -130,8 +131,8 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen buffer.data[0x7E] = 0; this->WARFlags.extensionCountDisabled = true; this->WARFlags.dataForced = true; - DP_LOG(("DP-WAR> Edid override on Acer AL1512")); - DP_LOG(("DP-WAR> - Disabling extension count.Bug 451868")); + DP_PRINTF(DP_NOTICE, "DP-WAR> Edid override on Acer AL1512"); + DP_PRINTF(DP_NOTICE, "DP-WAR> - Disabling extension count.Bug 451868"); } break; @@ -155,8 +156,8 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen buffer.data[0x7E] = 0; this->WARFlags.extensionCountDisabled = true; this->WARFlags.dataForced = true; - DP_LOG(("DP-WAR> Edid overrid on Westinghouse AL1512 LVM- <37/42> w <2/3>")); - DP_LOG(("DP-WAR> - Disabling extension count.")); + DP_PRINTF(DP_NOTICE, "DP-WAR> Edid overrid on Westinghouse AL1512 LVM- <37/42> w <2/3>"); + DP_PRINTF(DP_NOTICE, "DP-WAR> - Disabling extension count."); } } break; @@ -176,8 +177,8 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen buffer.data[0x36] = 0x32; buffer.data[0x37] = 0x3E; this->WARFlags.dataForced = true; - DP_LOG(("DP-WAR> Edid overrid on IBM T210")); - DP_LOG(("DP-WAR> 2048x1536x60Hz(misreported) -> 2048x1536x40Hz. Bug 76347")); + DP_PRINTF(DP_NOTICE, "DP-WAR> Edid overrid on IBM T210"); + DP_PRINTF(DP_NOTICE, "DP-WAR> 2048x1536x60Hz(misreported) -> 2048x1536x40Hz. Bug 76347"); } } break; @@ -197,8 +198,8 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen buffer.data[0x36] = 0x9E; buffer.data[0x37] = 0x29; this->WARFlags.dataForced = true; - DP_LOG(("DP-WAR> Edid overrid on GWY/EMA")); - DP_LOG(("DP-WAR> 106.50MHz(misreported) -> 106.50MHz.Bug 343870")); + DP_PRINTF(DP_NOTICE, "DP-WAR> Edid overrid on GWY/EMA"); + DP_PRINTF(DP_NOTICE, "DP-WAR> 106.50MHz(misreported) -> 106.50MHz.Bug 343870"); } } break; @@ -213,8 +214,8 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen buffer.data[0x6d] = 0x0; buffer.data[0x6e] = 0x0; this->WARFlags.dataForced = true; - DP_LOG(("DP-WAR> Edid overrid on INX L15CX")); - DP_LOG(("DP-WAR> Removing invalid detailed timing 10x311 @ 78Hz")); + DP_PRINTF(DP_NOTICE, "DP-WAR> Edid overrid on INX L15CX"); + DP_PRINTF(DP_NOTICE, "DP-WAR> Removing invalid detailed timing 10x311 @ 78Hz"); } break; @@ -229,19 +230,19 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen buffer.data[0x39] = 0x4B; // new hblank width: 75 buffer.data[0x3F] = 0x1B; // new hsync pulse width: 27 this->WARFlags.dataForced = true; - DP_LOG(("DP-WAR> Edid overrid on AUO eDP panel")); - DP_LOG(("DP-WAR> Modifying HBlank and HSync pulse width.")); - DP_LOG(("DP-WAR> Bugs 907998, 1001160")); + DP_PRINTF(DP_NOTICE, "DP-WAR> Edid overrid on AUO eDP panel"); + DP_PRINTF(DP_NOTICE, "DP-WAR> Modifying HBlank and HSync pulse width."); + DP_PRINTF(DP_NOTICE, "DP-WAR> Bugs 907998, 1001160"); } else if (ProductID == 0x109B || ProductID == 0x119B) { this->WARFlags.useLegacyAddress = true; - DP_LOG(("DP-WAR> AUO eDP")); - DP_LOG(("implements only Legacy interrupt address range")); + DP_PRINTF(DP_NOTICE, "DP-WAR> AUO eDP"); + DP_PRINTF(DP_NOTICE, "implements only Legacy interrupt address range"); // Bug 1792962 - Panel got glitch on D3 write, apply this WAR. this->WARFlags.disableDpcdPowerOff = true; - DP_LOG(("DP-WAR> Disable DPCD Power Off")); + DP_PRINTF(DP_NOTICE, "DP-WAR> Disable DPCD Power Off"); } break; @@ -280,8 +281,8 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen // buffer.data[0x36] = 0x9F; this->WARFlags.dataForced = true; - DP_LOG(("DP-WAR> Edid overrid on Quanta - Toshiba LG 1440x900")); - DP_LOG(("DP-WAR> Correcting pclk. Bug 201428")); + DP_PRINTF(DP_NOTICE, "DP-WAR> Edid overrid on Quanta - Toshiba LG 1440x900"); + DP_PRINTF(DP_NOTICE, "DP-WAR> Correcting pclk. Bug 201428"); } } else @@ -318,8 +319,8 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen // buffer.data[0x36] = 0xC7; this->WARFlags.dataForced = true; - DP_LOG(("DP-WAR> Edid overrid on MSI - LG LPL 1280x800")); - DP_LOG(("DP-WAR> Correcting pclk. Bug 359313")); + DP_PRINTF(DP_NOTICE, "DP-WAR> Edid overrid on MSI - LG LPL 1280x800"); + DP_PRINTF(DP_NOTICE, "DP-WAR> Correcting pclk. Bug 359313"); } } break; @@ -353,8 +354,8 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen buffer.data[0x47] = 0x1E; this->WARFlags.dataForced = true; - DP_LOG(("DP-WAR> Edid overrid on Haier TV.")); - DP_LOG(("DP-WAR> Removing 1366x768. bug 351680 & 327891")); + DP_PRINTF(DP_NOTICE, "DP-WAR> Edid overrid on Haier TV."); + DP_PRINTF(DP_NOTICE, "DP-WAR> Removing 1366x768. bug 351680 & 327891"); } break; @@ -369,8 +370,8 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen // Bug 1559465 will address the right power down sequence. We need to revisit this WAR once Bug 1559465 is fixed. // this->WARFlags.disableDpcdPowerOff = true; - DP_LOG(("DP-WAR> Disable DPCD Power Off")); - DP_LOG(("DP-WAR> HP Z1 G2 (Zeus) AIO Bug 1643712")); + DP_PRINTF(DP_NOTICE, "DP-WAR> Disable DPCD Power Off"); + DP_PRINTF(DP_NOTICE, "DP-WAR> HP Z1 G2 (Zeus) AIO Bug 1643712"); break; } break; @@ -385,8 +386,8 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen // after D3 to avoid black screen issues. // this->WARFlags.delayAfterD3 = true; - DP_LOG(("DP-WAR> HP Valor QHD+ N15P-Q3 Sharp EDP needs 50 ms after D3")); - DP_LOG(("DP-WAR> bug 1520011")); + DP_PRINTF(DP_NOTICE, "DP-WAR> HP Valor QHD+ N15P-Q3 Sharp EDP needs 50 ms after D3"); + DP_PRINTF(DP_NOTICE, "DP-WAR> bug 1520011"); break; //Sharp EDPs that declares DP1.2 but doesn't implement ESI address space @@ -402,7 +403,7 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen // Use Legacy address space for DP1.2 panel // this->WARFlags.useLegacyAddress = true; - DP_LOG(("DP-WAR> Sharp EDP implements only Legacy interrupt address range")); + DP_PRINTF(DP_NOTICE, "DP-WAR> Sharp EDP implements only Legacy interrupt address range"); break; case 0x143B: @@ -427,7 +428,7 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen (buffer.data[0x7D] == 0x20)) { this->WARFlags.useLegacyAddress = true; - DP_LOG(("DP-WAR> Sharp EDP implements only Legacy interrupt address range")); + DP_PRINTF(DP_NOTICE, "DP-WAR> Sharp EDP implements only Legacy interrupt address range"); } break; } @@ -444,8 +445,8 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen // loop. // this->WARFlags.ignoreRedundantHotplug = true; - DP_LOG(("DP-WAR> EIZO FlexScan SX2762W generates redundant")); - DP_LOG(("DP-WAR> hotplugs (bug 1048796)")); + DP_PRINTF(DP_NOTICE, "DP-WAR> EIZO FlexScan SX2762W generates redundant"); + DP_PRINTF(DP_NOTICE, "DP-WAR> hotplugs (bug 1048796)"); break; } break; @@ -475,8 +476,8 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen (buffer.data[0x7D] == 0x0A)) { this->WARFlags.useLegacyAddress = true; - DP_LOG(("DP-WAR> MEI-Panasonic EDP")); - DP_LOG(("implements only Legacy interrupt address range")); + DP_PRINTF(DP_NOTICE, "DP-WAR> MEI-Panasonic EDP"); + DP_PRINTF(DP_NOTICE, "implements only Legacy interrupt address range"); } } break; @@ -490,8 +491,8 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen // Force max link config // this->WARFlags.forceMaxLinkConfig = true; - DP_LOG(("DP-WAR> Force maximum link config WAR required on LG panel.")); - DP_LOG(("DP-WAR> bug 1649626")); + DP_PRINTF(DP_NOTICE, "DP-WAR> Force maximum link config WAR required on LG panel."); + DP_PRINTF(DP_NOTICE, "DP-WAR> bug 1649626"); break; } break; @@ -499,7 +500,7 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen if (ProductID == 0xAA55) { this->WARFlags.forceMaxLinkConfig = true; - DP_LOG(("DP-WAR> Force maximum link config WAR required on Sharp-CerebrEx panel.")); + DP_PRINTF(DP_NOTICE, "DP-WAR> Force maximum link config WAR required on Sharp-CerebrEx panel."); } break; @@ -517,8 +518,8 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen if (ProductID == 0x1747) { this->WARFlags.useLegacyAddress = true; - DP_LOG(("DP-WAR> CMN eDP")); - DP_LOG(("implements only Legacy interrupt address range")); + DP_PRINTF(DP_NOTICE, "DP-WAR> CMN eDP"); + DP_PRINTF(DP_NOTICE, "implements only Legacy interrupt address range"); } break; @@ -527,7 +528,7 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen if ((ProductID == 0x7F2B) || (ProductID == 0x7F2F)) { this->WARFlags.ignoreRedundantHotplug = true; - DP_LOG(("DP-WAR> BenQ GSync power on/off redundant hotplug")); + DP_PRINTF(DP_NOTICE, "DP-WAR> BenQ GSync power on/off redundant hotplug"); } break; @@ -536,8 +537,8 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen if (ProductID == 0x4C48) { this->WARFlags.useLegacyAddress = true; - DP_LOG(("DP-WAR> MSI eDP\n")); - DP_LOG(("implements only Legacy interrupt address range\n")); + DP_PRINTF(DP_NOTICE, "DP-WAR> MSI eDP\n"); + DP_PRINTF(DP_NOTICE, "implements only Legacy interrupt address range\n"); } break; @@ -545,7 +546,7 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen case 0xC754: case 0x1863: { - DP_LOG(("DP-WAR> Unigraf device, keep link alive during detection\n")); + DP_PRINTF(DP_NOTICE, "DP-WAR> Unigraf device, keep link alive during detection\n"); this->WARFlags.keepLinkAlive = true; } break; @@ -555,7 +556,7 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen if ((ProductID == 0x977) || (ProductID == 0x974) || (ProductID == 0x9D9)) { this->WARFlags.bIgnoreDscCap = true; - DP_LOG(("DP-WAR> BOE panels incorrectly exposing DSC capability. Ignoring it.")); + DP_PRINTF(DP_NOTICE, "DP-WAR> BOE panels incorrectly exposing DSC capability. Ignoring it."); } break; @@ -564,7 +565,7 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen if (ProductID == 0x005F) { this->WARFlags.bIgnoreDscCap = true; - DP_LOG(("DP-WAR> NCP panels incorrectly exposing DSC capability. Ignoring it.")); + DP_PRINTF(DP_NOTICE, "DP-WAR> NCP panels incorrectly exposing DSC capability. Ignoring it."); } break; @@ -576,8 +577,8 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen if (ProductID == 0x1609) { this->WARFlags.bIgnoreDscCap = true; - DP_LOG(("DP-WAR> Ignoring DSC capability on Lenovo CSOT 1609 Panel.")); - DP_LOG(("DP-WAR> Bug 3444252")); + DP_PRINTF(DP_NOTICE, "DP-WAR> Ignoring DSC capability on Lenovo CSOT 1609 Panel."); + DP_PRINTF(DP_NOTICE, "DP-WAR> Bug 3444252"); } break; @@ -586,8 +587,8 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen if(ProductID == 0x7707) { this->WARFlags.bIgnoreDscCap = true; - DP_LOG(("DP-WAR> Panel incorrectly exposing DSC capability. Ignoring it.")); - DP_LOG(("DP-WAR> Bug 3543158")); + DP_PRINTF(DP_NOTICE, "DP-WAR> Panel incorrectly exposing DSC capability. Ignoring it."); + DP_PRINTF(DP_NOTICE, "DP-WAR> Bug 3543158"); } break; @@ -614,7 +615,7 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen { // all HP monitors need to be powered up before link training this->WARFlags.powerOnBeforeLt = true; - DP_LOG(("DP-WAR> HP monitors need to be powered up before LT")); + DP_PRINTF(DP_NOTICE, "DP-WAR> HP monitors need to be powered up before LT"); } if (warFlag & DP_MONITOR_CAPABILITY_DP_OVERRIDE_OPTIMAL_LINK_CONFIG) @@ -629,8 +630,8 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen this->WARFlags.forceMaxLinkConfig = true; this->WARData.optimalLinkRate = pDenylistData->dpOverrideOptimalLinkConfig.linkRate; this->WARData.optimalLaneCount = pDenylistData->dpOverrideOptimalLinkConfig.laneCount; - DP_LOG(("DP-WAR> Overriding optimal link config on Dell U2410.")); - DP_LOG(("DP-WAR> bug 632801")); + DP_PRINTF(DP_NOTICE, "DP-WAR> Overriding optimal link config on Dell U2410."); + DP_PRINTF(DP_NOTICE, "DP-WAR> bug 632801"); } if (warFlag & DP_MONITOR_CAPABILITY_DP_OVERRIDE_MAX_LANE_COUNT) @@ -642,14 +643,14 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen // this->WARFlags.overrideMaxLaneCount = true; this->WARData.maxLaneCount = pDenylistData->dpMaxLaneCountOverride; - DP_LOG(("DP-WAR> Overriding max lane count on Lenovo L2440x.")); - DP_LOG(("DP-WAR> bug 687952")); + DP_PRINTF(DP_NOTICE, "DP-WAR> Overriding max lane count on Lenovo L2440x."); + DP_PRINTF(DP_NOTICE, "DP-WAR> bug 687952"); } } if (this->WARFlags.dataForced) { - DP_LOG(("DP-WAR> EDID was overridden for some data. Patching CRC.")); + DP_PRINTF(DP_NOTICE, "DP-WAR> EDID was overridden for some data. Patching CRC."); this->patchCrc(); } } diff --git a/src/common/displayport/src/dp_watermark.cpp b/src/common/displayport/src/dp_watermark.cpp index daf89009b6..d399421fbc 100644 --- a/src/common/displayport/src/dp_watermark.cpp +++ b/src/common/displayport/src/dp_watermark.cpp @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -30,6 +30,7 @@ #include "dp_internal.h" #include "dp_watermark.h" #include "dp_linkconfig.h" +#include "dp_printf.h" #include "displayport.h" #define FEC_TOTAL_SYMBOLS_PER_BLK(lanes) ((NvU32)((lanes == 1) ? 512U : 256U)) @@ -85,16 +86,14 @@ bool DisplayPort::isModePossibleMST if (minHBlank > modesetInfo.rasterWidth - modesetInfo.surfaceWidth) { - DP_LOG(("NVRM: %s:", __FUNCTION__)); - DP_LOG(("\t\tERROR: Blanking Width is smaller than minimum permissible value.")); + DP_PRINTF(DP_ERROR, "ERROR: Blanking Width is smaller than minimum permissible value."); return false; } // Bug 702290 - Active Width should be greater than 60 if (modesetInfo.surfaceWidth <= 60) { - DP_LOG(("NVRM: %s:", __FUNCTION__)); - DP_LOG(("\t\tERROR: Minimum Horizontal Active Width <= 60 not supported.")); + DP_PRINTF(DP_ERROR, "ERROR: Minimum Horizontal Active Width <= 60 not supported."); return false; } @@ -207,11 +206,10 @@ bool DisplayPort::isModePossibleSST // Print debug message and Assert. All calculations assume a max of 8 lanes // & any increase in lanes should cause these calculation to be updated // - DP_LOG(("NVRM: %s: ERROR: LaneCount - %d is not supported for waterMark calculations.", - __FUNCTION__, linkConfig.lanes)); - DP_LOG(("Current support is only up to 4-Lanes & any change/increase in supported lanes " - "should be reflected in waterMark calculations algorithm. " - "Ex: See calc for minHBlank variable below")); + DP_PRINTF(DP_ERROR, "ERROR: LaneCount - %d is not supported for waterMark calculations.", linkConfig.lanes); + DP_PRINTF(DP_ERROR, "Current support is only up to 4-Lanes & any change/increase in supported lanes " + "should be reflected in waterMark calculations algorithm. " + "Ex: See calc for minHBlank variable below"); DP_ASSERT(0); return false; @@ -256,8 +254,7 @@ bool DisplayPort::isModePossibleSST if (dpInfo->waterMark > 39 || dpInfo->waterMark > numSymbolsPerLine) { - DP_LOG(("NVRM: %s:", __FUNCTION__)); - DP_LOG(("\t\tERROR: watermark should not be greater than 39.")); + DP_PRINTF(DP_ERROR, "ERROR: watermark should not be greater than 39."); return false; } @@ -286,16 +283,14 @@ bool DisplayPort::isModePossibleSST if (MinHBlank > modesetInfo.rasterWidth - modesetInfo.surfaceWidth) { - DP_LOG(("NVRM: %s:", __FUNCTION__)); - DP_LOG(("\t\tERROR: Blanking Width is smaller than minimum permissible value.")); + DP_PRINTF(DP_ERROR, "ERROR: Blanking Width is smaller than minimum permissible value."); return false; } // Bug 702290 - Active Width should be greater than 60 if (modesetInfo.surfaceWidth <= 60) { - DP_LOG(("NVRM: %s:", __FUNCTION__)); - DP_LOG(("\t\tERROR: Minimum Horizontal Active Width <= 60 not supported.")); + DP_PRINTF(DP_ERROR, "ERROR: Minimum Horizontal Active Width <= 60 not supported."); return false; } @@ -453,11 +448,10 @@ bool DisplayPort::isModePossibleSSTWithFEC // Print debug message and Assert. All calculations assume a max of 8 lanes // & any increase in lanes should cause these calculation to be updated // - DP_LOG(("NVRM: %s: ERROR: LaneCount - %d is not supported for waterMark calculations.", - __FUNCTION__, linkConfig.lanes)); - DP_LOG(("Current support is only up to 4-Lanes & any change/increase in supported lanes " - "should be reflected in waterMark calculations algorithm. " - "Ex: See calc for minHBlank variable below")); + DP_PRINTF(DP_ERROR, "ERROR: LaneCount - %d is not supported for waterMark calculations.", linkConfig.lanes); + DP_PRINTF(DP_ERROR, "Current support is only up to 4-Lanes & any change/increase in supported lanes " + "should be reflected in waterMark calculations algorithm. " + "Ex: See calc for minHBlank variable below"); DP_ASSERT(0); return false; @@ -517,8 +511,7 @@ bool DisplayPort::isModePossibleSSTWithFEC if (dpInfo->waterMark > numSymbolsPerLine) { - DP_LOG(("NVRM: %s:", __FUNCTION__)); - DP_LOG(("\t\tERROR: watermark = %d should not be greater than numSymbolsPerLine = %d.", dpInfo->waterMark, numSymbolsPerLine)); + DP_PRINTF(DP_ERROR, "ERROR: watermark = %d should not be greater than numSymbolsPerLine = %d.", dpInfo->waterMark, numSymbolsPerLine); return false; } @@ -592,16 +585,14 @@ bool DisplayPort::isModePossibleSSTWithFEC if (MinHBlank > HBlank) { - DP_LOG(("NVRM: %s:", __FUNCTION__)); - DP_LOG(("\t\tERROR: Blanking Width is smaller than minimum permissible value.")); + DP_PRINTF(DP_ERROR, "ERROR: Blanking Width is smaller than minimum permissible value."); return false; } // Bug 702290 - Active Width should be greater than 60 if (modesetInfo.surfaceWidth <= 60) { - DP_LOG(("NVRM: %s:", __FUNCTION__)); - DP_LOG(("\t\tERROR: Minimum Horizontal Active Width <= 60 not supported.")); + DP_PRINTF(DP_ERROR, "ERROR: Minimum Horizontal Active Width <= 60 not supported."); return false; } @@ -830,16 +821,14 @@ bool DisplayPort::isModePossibleMSTWithFEC if (MinHBlank > HBlank) { - DP_LOG(("NVRM: %s:", __FUNCTION__)); - DP_LOG(("\t\tERROR: Blanking Width is smaller than minimum permissible value.")); + DP_PRINTF(DP_ERROR, "ERROR: Blanking Width is smaller than minimum permissible value."); return false; } // Bug 702290 - Active Width should be greater than 60 if (modesetInfo.surfaceWidth <= 60) { - DP_LOG(("NVRM: %s:", __FUNCTION__)); - DP_LOG(("\t\tERROR: Minimum Horizontal Active Width <= 60 not supported.")); + DP_PRINTF(DP_ERROR, "ERROR: Minimum Horizontal Active Width <= 60 not supported."); return false; } diff --git a/src/common/inc/displayport/displayport.h b/src/common/inc/displayport/displayport.h index daa7003a6a..6e2df17223 100644 --- a/src/common/inc/displayport/displayport.h +++ b/src/common/inc/displayport/displayport.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -459,12 +459,35 @@ typedef struct VesaPsrSinkCaps typedef struct PanelReplayCaps { - NvBool panelReplaySupported; + // Indicates if Panel replay is supported or not + NvBool bPanelReplaySupported; } panelReplayCaps; typedef struct PanelReplayConfig { + // This field is used to configure Panel replay on sink device NvBool enablePanelReplay; + + // This field is used to configure CRC with Panel replay on sink device + NvBool bEnableCrcWithPr; + + // Configures sink to Generate an IRQ_HPD when DPCD 02020h[3] = 1. + NvBool bHpdOnAdaptiveSyncSdpMissing; + + // + // Used to configure sink to Generate an IRQ_HPD after finding a VSC SDP + // for PR uncorrectable error. + // + NvBool bHpdOnSdpUncorrectableError; + + // Configures sink to Generate an IRQ_HPD for RFB storage error. + NvBool bHpdOnRfbStorageErrors; + + // + // Configures sink to generate an IRQ_HPD after finding an active video image + // CRC mismatch. + // + NvBool bHpdOnRfbActiveFrameCrcError; } panelReplayConfig; // PR state @@ -500,6 +523,7 @@ typedef struct // Maximum link rate of Main Link lanes = Value x 270M. // To get it to KHz unit, we need to multiply 270K. #define DP_LINK_BW_FREQUENCY_MULTIPLIER_KHZ (270*1000) +#define DP_LINK_BW_FREQUENCY_MULTIPLIER_270MHZ_TO_KHZ DP_LINK_BW_FREQUENCY_MULTIPLIER_KHZ // Multiplier constant to get link rate table's in KHZ #define DP_LINK_RATE_TABLE_MULTIPLIER_KHZ 200 diff --git a/src/common/inc/displayport/dpcd.h b/src/common/inc/displayport/dpcd.h index d8896d75bf..deda0514af 100644 --- a/src/common/inc/displayport/dpcd.h +++ b/src/common/inc/displayport/dpcd.h @@ -443,13 +443,17 @@ number of Downstream ports will be limited to 32. #define NV_DPCD_TRAINING_LANEX_SET_PREEMPHASIS_MAX_REACHED 5:5 /* RWXUF */ #define NV_DPCD_TRAINING_LANEX_SET_PREEMPHASIS_MAX_REACHED_TRUE (0x00000001) /* RWXUV */ -#define NV_DPCD_DOWNSPREAD_CTRL (0x00000107) /* RWXUR */ -#define NV_DPCD_DOWNSPREAD_CTRL_SPREAD_AMP 4:4 /* RWXUF */ -#define NV_DPCD_DOWNSPREAD_CTRL_SPREAD_AMP_NONE (0x00000000) /* RWXUV */ -#define NV_DPCD_DOWNSPREAD_CTRL_SPREAD_AMP_LESS_THAN_0_5 (0x00000001) /* RWXUV */ -#define NV_DPCD_DOWNSPREAD_CTRL_MSA_TIMING_PAR_IGNORED 7:7 /* RWXUF */ -#define NV_DPCD_DOWNSPREAD_CTRL_MSA_TIMING_PAR_IGNORED_FALSE (0x00000000) /* RWXUV */ -#define NV_DPCD_DOWNSPREAD_CTRL_MSA_TIMING_PAR_IGNORED_TRUE (0x00000001) /* RWXUV */ +#define NV_DPCD_DOWNSPREAD_CTRL (0x00000107) /* RWXUR */ +#define NV_DPCD_DOWNSPREAD_CTRL_SPREAD_AMP 4:4 /* RWXUF */ +#define NV_DPCD_DOWNSPREAD_CTRL_SPREAD_AMP_NONE (0x00000000) /* RWXUV */ +#define NV_DPCD_DOWNSPREAD_CTRL_SPREAD_AMP_LESS_THAN_0_5 (0x00000001) /* RWXUV */ +#define NV_DPCD_DOWNSPREAD_CTRL_FIXED_VTOTAL_AS_SDP_EN_IN_PR_ACTIVE 6:6 /* RWXUF */ +#define NV_DPCD_DOWNSPREAD_CTRL_FIXED_VTOTAL_AS_SDP_EN_IN_PR_ACTIVE_NO (0x00000000) /* RWXUV */ +#define NV_DPCD_DOWNSPREAD_CTRL_FIXED_VTOTAL_AS_SDP_EN_IN_PR_ACTIVE_YES (0x00000001) /* RWXUV */ +#define NV_DPCD_DOWNSPREAD_CTRL_MSA_TIMING_PAR_IGNORED 7:7 /* RWXUF */ +#define NV_DPCD_DOWNSPREAD_CTRL_MSA_TIMING_PAR_IGNORED_FALSE (0x00000000) /* RWXUV */ +#define NV_DPCD_DOWNSPREAD_CTRL_MSA_TIMING_PAR_IGNORED_TRUE (0x00000001) /* RWXUV */ + #define NV_DPCD_MAIN_LINK_CHANNEL_CODING_SET (0x00000108) /* RWXUR */ #define NV_DPCD_MAIN_LINK_CHANNEL_CODING_SET_ANSI_8B_10B 0:0 /* RWXUF */ @@ -1074,6 +1078,9 @@ number of Downstream ports will be limited to 32. #define NV_DPCD_EDP_GENERAL_CAP2_PANEL_LUMINANCE_CONTROL_CAP 4:4 /* R-XUF */ #define NV_DPCD_EDP_GENERAL_CAP2_PANEL_LUMINANCE_CONTROL_CAP_NO (0x00000000) /* R-XUV */ #define NV_DPCD_EDP_GENERAL_CAP2_PANEL_LUMINANCE_CONTROL_CAP_YES (0x00000001) /* R-XUV */ +#define NV_DPCD_EDP_GENERAL_CAP2_VARIABLE_BKLGHT_CONTROL_CAP 5:5 /* R-XUF */ +#define NV_DPCD_EDP_GENERAL_CAP2_VARIABLE_BKLGHT_CONTROL_CAP_NO (0x00000000) /* R-XUV */ +#define NV_DPCD_EDP_GENERAL_CAP2_VARIABLE_BKLGHT_CONTROL_CAP_YES (0x00000001) /* R-XUV */ #define NV_DPCD_EDP_GENERAL_CAP3 (0x00000704) /* R-XUV */ #define NV_DPCD_EDP_GENERAL_CAP3_X_REGION_CAP 3:0 /* R-XUF */ #define NV_DPCD_EDP_GENERAL_CAP3_X_REGION_CAP_NOT_SUPPORTED (0x00000000) /* R-XUV */ @@ -1099,6 +1106,9 @@ number of Downstream ports will be limited to 32. #define NV_DPCD_EDP_DISPLAY_CTL_OVERDRIVE_CTL_AUTONOMOUS_1 (0x00000001) /* RWXUV */ #define NV_DPCD_EDP_DISPLAY_CTL_OVERDRIVE_CTL_DISABLE (0x00000002) /* RWXUV */ #define NV_DPCD_EDP_DISPLAY_CTL_OVERDRIVE_CTL_ENABLE (0x00000003) /* RWXUV */ +#define NV_DPCD_EDP_DISPLAY_CTL_VARIABLE_BKLGHT_CTRL 6:6 /* RWXUF */ +#define NV_DPCD_EDP_DISPLAY_CTL_VARIABLE_BKLGHT_CTRL_ENABLED (0x00000001) /* RWXUV */ +#define NV_DPCD_EDP_DISPLAY_CTL_VARIABLE_BKLGHT_CTRL_DISABLED (0x00000000) /* RWXUV */ #define NV_DPCD_EDP_DISPLAY_CTL_VBLANK_BKLGHT_UPDATE_EN 7:7 /* RWXUF */ #define NV_DPCD_EDP_DISPLAY_CTL_VBLANK_BKLGHT_UPDATE_EN_ENABLED (0x00000001) /* RWXUV */ #define NV_DPCD_EDP_DISPLAY_CTL_VBLANK_BKLGHT_UPDATE_EN_DISABLED (0x00000000) /* RWXUV */ @@ -1151,6 +1161,9 @@ number of Downstream ports will be limited to 32. #define NV_DPCD_EDP_BKLGHT_CTL_STATUS_FAULT_CONDITION_INIT (0x00000000) /* R-XUV */ #define NV_DPCD_EDP_BKLGHT_CTL_STATUS_FAULT_CONDITION_FAULT (0x00000001) /* R-XUV */ #define NV_DPCD_EDP_BKLGHT_CTL_STATUS_FAULT_CONDITION_NORMAL (0x00000000) /* R-XUV */ +#define NV_DPCD_EDP_BKLGHT_CTL_STATUS_VARIABLE_BKLGHT_STATUS 1:1 /* R-XUF */ +#define NV_DPCD_EDP_BKLGHT_CTL_STATUS_VARIABLE_BKLGHT_STATUS_DISABLED (0x00000000) /* R-XUV */ +#define NV_DPCD_EDP_BKLGHT_CTL_STATUS_VARIABLE_BKLGHT_STATUS_ENABLED (0x00000001) /* R-XUV */ #define NV_DPCD_EDP_BKLGHT_FREQ_SET (0x00000728) /* RWXUR */ #define NV_DPCD_EDP_BKLGHT_FREQ_SET_VAL 7:0 /* RWXUF */ #define NV_DPCD_EDP_BKLGHT_FREQ_SET_VAL_INIT (0x00000000) /* RWXUV */ diff --git a/src/common/inc/displayport/dpcd20.h b/src/common/inc/displayport/dpcd20.h index 7742f31623..51410a16f7 100644 --- a/src/common/inc/displayport/dpcd20.h +++ b/src/common/inc/displayport/dpcd20.h @@ -44,57 +44,148 @@ #define NV_DPCD20_DSC_SUPPORT_DYNAMIC_PPS_UNCOMPRESSED_TO_FROM_COMPRESSED_YES (0x00000001) // PANEL REPLAY RELATED DPCD -#define NV_DPCD20_PANEL_REPLAY_CAPABILITY (0x000000B0) -#define NV_DPCD20_PANEL_REPLAY_CAPABILITY_SUPPORTED 0:0 -#define NV_DPCD20_PANEL_REPLAY_CAPABILITY_SUPPORTED_NO (0x00000000) -#define NV_DPCD20_PANEL_REPLAY_CAPABILITY_SUPPORTED_YES (0x00000001) -#define NV_DPCD20_PANEL_REPLAY_CAPABILITY_SEL_UPDATE 1:1 -#define NV_DPCD20_PANEL_REPLAY_CAPABILITY_SEL_UPDATE_NO (0x00000000) -#define NV_DPCD20_PANEL_REPLAY_CAPABILITY_SEL_UPDATE_YES (0x00000001) - -#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION (0x000001B0) -#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_ENABLE_PR_MODE 0:0 -#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_ENABLE_PR_MODE_NO (0x00000000) -#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_ENABLE_PR_MODE_YES (0x00000001) - -#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS (0x00002020) -#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_ACTIVE_FRAME_CRC_ERROR 0:0 -#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_ACTIVE_FRAME_CRC_ERROR_NO (0x00000000) -#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_ACTIVE_FRAME_CRC_ERROR_YES (0x00000001) -#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_RFB_STORAGE_ERROR 1:1 -#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_RFB_STORAGE_ERROR_NO (0x00000000) -#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_RFB_STORAGE_ERROR_YES (0x00000001) -#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_VSC_SDP_UNCORRECTABLE_ERROR 2:2 -#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_VSC_SDP_UNCORRECTABLE_ERROR_NO (0x00000000) -#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_VSC_SDP_UNCORRECTABLE_ERROR_YES (0x00000001) -#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_ADAPTIVE_SYNC_SDP_MISSING 3:3 -#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_ADAPTIVE_SYNC_SDP_MISSING_NO (0x00000000) -#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_ADAPTIVE_SYNC_SDP_MISSING_YES (0x00000001) - -#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS (0x00002022) -#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_PR_STATUS 2:0 -#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_PR_STATUS_STATE_0 (0x00000000) -#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_PR_STATUS_STATE_1 (0x00000001) -#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_PR_STATUS_STATE_2 (0x00000002) -#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_PR_STATUS_STATE_ERROR (0x00000007) -#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_SINK_FRAME_LOCKED 4:3 -#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_SINK_FRAME_LOCKED_LOCKED (0x00000000) -#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_SINK_FRAME_LOCKED_COASTING (0x00000001) -#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_SINK_FRAME_LOCKED_GOVERNING (0x00000002) -#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_SINK_FRAME_LOCKED_RELOCKING (0x00000003) -#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_SINK_FRAME_LOCKED_VALID 5:5 -#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_SINK_FRAME_LOCKED_VALID_NO (0x00000000) -#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_SINK_FRAME_LOCKED_VALID_YES (0x00000001) - -#define NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO (0x00002024) -#define NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO_STATE 0:0 -#define NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO_STATE_INACTIVE (0x00000000) -#define NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO_STATE_ACTIVE (0x00000001) -#define NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO_CRC_VALID 2:2 -#define NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO_CRC_VALID_NO (0x00000000) -#define NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO_CRC_VALID_YES (0x00000001) -#define NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO_SU_COORDINATE_VALID 3:3 -#define NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO_SU_COORDINATE_VALID_NO (0x00000000) -#define NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO_SU_COORDINATE_VALID_YES (0x00000001) +#define NV_DPCD20_PANEL_REPLAY_CAPABILITY (0x000000B0) /* R-XUR */ +#define NV_DPCD20_PANEL_REPLAY_CAPABILITY_SUPPORTED 0:0 /* R-XUF */ +#define NV_DPCD20_PANEL_REPLAY_CAPABILITY_SUPPORTED_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_CAPABILITY_SUPPORTED_YES (0x00000001) /* R-XUV */ + +#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION (0x000001B0) /* R-XUR */ +#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_ENABLE_PR_MODE 0:0 /* R-XUF */ +#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_ENABLE_PR_MODE_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_ENABLE_PR_MODE_YES (0x00000001) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_ENABLE_CRC 1:1 /* R-XUF */ +#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_ENABLE_CRC_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_ENABLE_CRC_YES (0x00000001) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_HPD_ADAPTIVE_SYNC_SDP_MISSING 2:2 /* R-XUF */ +#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_HPD_ADAPTIVE_SYNC_SDP_MISSING_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_HPD_ADAPTIVE_SYNC_SDP_MISSING_YES (0x00000001) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_HPD_SDP_UNCORRECTABLE_ERROR 3:3 /* R-XUF */ +#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_HPD_SDP_UNCORRECTABLE_ERROR_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_HPD_SDP_UNCORRECTABLE_ERROR_YES (0x00000001) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_HPD_RFB_STORAGE_ERRORS 4:4 /* R-XUF */ +#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_HPD_RFB_STORAGE_ERRORS_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_HPD_RFB_STORAGE_ERRORS_YES (0x00000001) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_HPD_RFB_ACTIVE_FRAME_CRC_ERROR 5:5 /* R-XUF */ +#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_HPD_RFB_ACTIVE_FRAME_CRC_ERROR_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_CONFIGURATION_HPD_RFB_ACTIVE_FRAME_CRC_ERROR_YES (0x00000001) /* R-XUV */ + + +#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS (0x00002020) /* R-XUR */ +#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_ACTIVE_FRAME_CRC_ERROR 0:0 /* R-XUF */ +#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_ACTIVE_FRAME_CRC_ERROR_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_ACTIVE_FRAME_CRC_ERROR_YES (0x00000001) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_RFB_STORAGE_ERROR 1:1 /* R-XUF */ +#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_RFB_STORAGE_ERROR_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_RFB_STORAGE_ERROR_YES (0x00000001) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_VSC_SDP_UNCORRECTABLE_ERROR 2:2 /* R-XUF */ +#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_VSC_SDP_UNCORRECTABLE_ERROR_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_VSC_SDP_UNCORRECTABLE_ERROR_YES (0x00000001) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_ADAPTIVE_SYNC_SDP_MISSING 3:3 /* R-XUF */ +#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_ADAPTIVE_SYNC_SDP_MISSING_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_ERROR_STATUS_ADAPTIVE_SYNC_SDP_MISSING_YES (0x00000001) /* R-XUV */ + +#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS (0x00002022) /* R-XUR */ +#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_PR_STATUS 2:0 /* R-XUF */ +#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_PR_STATUS_STATE_0 (0x00000000) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_PR_STATUS_STATE_1 (0x00000001) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_PR_STATUS_STATE_2 (0x00000002) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_PR_STATUS_STATE_ERROR (0x00000007) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_SINK_FRAME_LOCKED 4:3 /* R-XUF */ +#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_SINK_FRAME_LOCKED_LOCKED (0x00000000) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_SINK_FRAME_LOCKED_COASTING (0x00000001) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_SINK_FRAME_LOCKED_GOVERNING (0x00000002) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_SINK_FRAME_LOCKED_RELOCKING (0x00000003) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_SINK_FRAME_LOCKED_VALID 5:5 /* R-XUF */ +#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_SINK_FRAME_LOCKED_VALID_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_AND_FRAME_LOCK_STATUS_SINK_FRAME_LOCKED_VALID_YES (0x00000001) /* R-XUV */ + +#define NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO (0x00002024) /* R-XUR */ +#define NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO_STATE 0:0 /* R-XUF */ +#define NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO_STATE_INACTIVE (0x00000000) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO_STATE_ACTIVE (0x00000001) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO_CRC_VALID 2:2 /* R-XUF */ +#define NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO_CRC_VALID_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO_CRC_VALID_YES (0x00000001) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO_SU_COORDINATE_VALID 3:3 /* R-XUF */ +#define NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO_SU_COORDINATE_VALID_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_PANEL_REPLAY_DEBUG_LAST_VSC_SDP_CARRYING_PR_INFO_SU_COORDINATE_VALID_YES (0x00000001) /* R-XUV */ + + +// +// Adding DPCD registers for DP Tunneling feature. +// +#define NV_DPCD20_DP_TUNNEL_CAPABILITIES (0x000E000D) /* R-XUR */ +#define NV_DPCD20_DP_TUNNEL_CAPABILITIES_DPTUNNELING_SUPPORT 0:0 /* R-XUF */ +#define NV_DPCD20_DP_TUNNEL_CAPABILITIES_DPTUNNELING_SUPPORT_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_DP_TUNNEL_CAPABILITIES_DPTUNNELING_SUPPORT_YES (0x00000001) /* R-XUV */ +#define NV_DPCD20_DP_TUNNEL_CAPABILITIES_PANEL_REPLAY_TUNNELING_OPTIMIZATION_SUPPORT 6:6 /* R-XUF */ +#define NV_DPCD20_DP_TUNNEL_CAPABILITIES_PANEL_REPLAY_TUNNELING_OPTIMIZATION_SUPPORT_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_DP_TUNNEL_CAPABILITIES_PANEL_REPLAY_TUNNELING_OPTIMIZATION_SUPPORT_YES (0x00000001) /* R-XUV */ +#define NV_DPCD20_DP_TUNNEL_CAPABILITIES_DPIN_BW_ALLOCATION_MODE_SUPPORT 7:7 /* R-XUF */ +#define NV_DPCD20_DP_TUNNEL_CAPABILITIES_DPIN_BW_ALLOCATION_MODE_SUPPORT_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_DP_TUNNEL_CAPABILITIES_DPIN_BW_ALLOCATION_MODE_SUPPORT_YES (0x00000001) /* R-XUV */ + +// DPCD Registers for DPRX Event Status Indicator Field +#define NV_DPCD20_LINK_SERVICE_IRQ_VECTOR_ESI0 (0x00002005) /* R-XUR */ +#define NV_DPCD20_LINK_SERVICE_IRQ_VECTOR_ESI0_DP_TUNNELING_IRQ 5:5 /* R-XUF */ +#define NV_DPCD20_LINK_SERVICE_IRQ_VECTOR_ESI0_DP_TUNNELING_IRQ_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_LINK_SERVICE_IRQ_VECTOR_ESI0_DP_TUNNELING_IRQ_YES (0x00000001) /* R-XUV */ + +// DPCD Registers for DP IN BW Allocation +#define NV_DPCD20_USB4_DRIVER_BW_CAPABILITY (0x000E0020) /* R-XUR */ +#define NV_DPCD20_USB4_DRIVER_BW_ALLOCATION 7:7 /* R-XUF */ +#define NV_DPCD20_USB4_DRIVER_BW_ALLOCATION_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_USB4_DRIVER_BW_ALLOCATION_YES (0x00000001) /* R-XUV */ + +#define NV_DPCD20_DP_TUNNEL_BW_GRANULARITY (0x000E0022) /* R-XUR */ +#define NV_DPCD20_DP_TUNNEL_BW_GRANULARITY_VAL 1:0 /* R-XUF */ +#define NV_DPCD20_DP_TUNNEL_BW_GRANULARITY_VAL_0_25_GBPS (0x00000000) /* R-XUV */ +#define NV_DPCD20_DP_TUNNEL_BW_GRANULARITY_VAL_0_50_GBPS (0x00000001) /* R-XUV */ +#define NV_DPCD20_DP_TUNNEL_BW_GRANULARITY_VAL_1_00_GBPS (0x00000002) /* R-XUV */ + +#define NV_DPCD20_DP_TUNNEL_ESTIMATED_BW (0x000E0023) /* R-XUR */ + +#define NV_DPCD20_DP_TUNNEL_ALLOCATED_BW (0x000E0024) /* R-XUR */ + +#define NV_DPCD20_DP_TUNNEL_REQUESTED_BW (0x000E0031) /* R-XUR */ + +#define NV_DPCD20_DP_TUNNELING_STATUS (0x000E0025) /* R-XUR */ +#define NV_DPCD20_DP_TUNNELING_BW_REQUEST_FAILED 0:0 /* R-XUF */ +#define NV_DPCD20_DP_TUNNELING_BW_REQUEST_FAILED_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_DP_TUNNELING_BW_REQUEST_FAILED_YES (0x00000001) /* R-XUV */ +#define NV_DPCD20_DP_TUNNELING_BW_REQUEST_SUCCEEDED 1:1 /* R-XUF */ +#define NV_DPCD20_DP_TUNNELING_BW_REQUEST_SUCCEEDED_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_DP_TUNNELING_BW_REQUEST_SUCCEEDED_YES (0x00000001) /* R-XUV */ +#define NV_DPCD20_DP_TUNNELING_ESTIMATED_BW_CHANGED 2:2 /* R-XUF */ +#define NV_DPCD20_DP_TUNNELING_ESTIMATED_BW_CHANGED_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_DP_TUNNELING_ESTIMATED_BW_CHANGED_YES (0x00000001) /* R-XUV */ +#define NV_DPCD20_DP_TUNNELING_BW_ALLOCATION_CAPABILITY_CHANGED 3:3 /* R-XUF */ +#define NV_DPCD20_DP_TUNNELING_BW_ALLOCATION_CAPABILITY_CHANGED_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_DP_TUNNELING_BW_ALLOCATION_CAPABILITY_CHANGED_YES (0x00000001) /* R-XUV */ +#define NV_DPCD20_DP_TUNNELING_EXIT_DISCOVERY_MODE 4:4 /* R-XUF */ +#define NV_DPCD20_DP_TUNNELING_EXIT_DISCOVERY_MODE_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_DP_TUNNELING_EXIT_DISCOVERY_MODE_YES (0x00000001) /* R-XUV */ + +#define NV_DPCD20_DP_TUNNELING_8B10B_MAX_LINK_RATE (0x000E0028) /* R-XUR */ +#define NV_DPCD20_DP_TUNNELING_8B10B_MAX_LINK_RATE_VAL 7:0 /* R-XUF */ +#define NV_DPCD20_DP_TUNNELING_8B10B_MAX_LINK_RATE_VAL_1_62_GBPS (0x00000006) /* R-XUV */ +#define NV_DPCD20_DP_TUNNELING_8B10B_MAX_LINK_RATE_VAL_2_70_GBPS (0x0000000A) /* R-XUV */ +#define NV_DPCD20_DP_TUNNELING_8B10B_MAX_LINK_RATE_VAL_5_40_GBPS (0x00000014) /* R-XUV */ +#define NV_DPCD20_DP_TUNNELING_8B10B_MAX_LINK_RATE_VAL_8_10_GBPS (0x0000001E) /* R-XUV */ + +#define NV_DPCD20_DP_TUNNELING_MAX_LANE_COUNT (0x000E0029) /* R-XUR */ +#define NV_DPCD20_DP_TUNNELING_MAX_LANE_COUNT_LANE 7:0 /* R-XUF */ +#define NV_DPCD20_DP_TUNNELING_MAX_LANE_COUNT_LANE_ONE (0x00000001) /* R-XUV */ +#define NV_DPCD20_DP_TUNNELING_MAX_LANE_COUNT_LANE_TWO (0x00000002) /* R-XUV */ +#define NV_DPCD20_DP_TUNNELING_MAX_LANE_COUNT_LANE_FOUR (0x00000004) /* R-XUV */ + +#define NV_DPCD20_DPTX_BW_ALLOCATION_MODE_CONTROL (0x000E0030) /* R-XUR */ +#define NV_DPCD20_DPTX_UNMASK_BW_ALLOCATION_IRQ 6:6 /* R-XUF */ +#define NV_DPCD20_DPTX_UNMASK_BW_ALLOCATION_IRQ_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_DPTX_UNMASK_BW_ALLOCATION_IRQ_YES (0x00000001) /* R-XUV */ +#define NV_DPCD20_DPTX_DISPLAY_DRIVER_BW_ALLOCATION_MODE_ENABLE 7:7 /* R-XUF */ +#define NV_DPCD20_DPTX_DISPLAY_DRIVER_BW_ALLOCATION_MODE_ENABLE_NO (0x00000000) /* R-XUV */ +#define NV_DPCD20_DPTX_DISPLAY_DRIVER_BW_ALLOCATION_MODE_ENABLE_YES (0x00000001) /* R-XUV */ + #endif // #ifndef _DISPLAYPORT20_H_ diff --git a/src/common/inc/nvBldVer.h b/src/common/inc/nvBldVer.h index b8a8fd2985..f4a2d97326 100644 --- a/src/common/inc/nvBldVer.h +++ b/src/common/inc/nvBldVer.h @@ -36,26 +36,26 @@ // and then checked back in. You cannot make changes to these sections without // corresponding changes to the buildmeister script #ifndef NV_BUILD_BRANCH - #define NV_BUILD_BRANCH r550_00 + #define NV_BUILD_BRANCH r555_79 #endif #ifndef NV_PUBLIC_BRANCH - #define NV_PUBLIC_BRANCH r550_00 + #define NV_PUBLIC_BRANCH r555_79 #endif #if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS) -#define NV_BUILD_BRANCH_VERSION "rel/gpu_drv/r550/r550_00-242" -#define NV_BUILD_CHANGELIST_NUM (34157620) +#define NV_BUILD_BRANCH_VERSION "rel/gpu_drv/r555/r555_79-111" +#define NV_BUILD_CHANGELIST_NUM (34260717) #define NV_BUILD_TYPE "Official" -#define NV_BUILD_NAME "rel/gpu_drv/r550/r550_00-242" -#define NV_LAST_OFFICIAL_CHANGELIST_NUM (34157620) +#define NV_BUILD_NAME "rel/gpu_drv/r555/r555_79-111" +#define NV_LAST_OFFICIAL_CHANGELIST_NUM (34260717) #else /* Windows builds */ -#define NV_BUILD_BRANCH_VERSION "r550_00-233" -#define NV_BUILD_CHANGELIST_NUM (34158633) +#define NV_BUILD_BRANCH_VERSION "r555_79-1" +#define NV_BUILD_CHANGELIST_NUM (34253977) #define NV_BUILD_TYPE "Official" -#define NV_BUILD_NAME "552.25" -#define NV_LAST_OFFICIAL_CHANGELIST_NUM (34158633) -#define NV_BUILD_BRANCH_BASE_VERSION R550 +#define NV_BUILD_NAME "555.81" +#define NV_LAST_OFFICIAL_CHANGELIST_NUM (34253977) +#define NV_BUILD_BRANCH_BASE_VERSION R555 #endif // End buildmeister python edited section diff --git a/src/common/inc/nvUnixVersion.h b/src/common/inc/nvUnixVersion.h index d7e15236bd..a7efea7c63 100644 --- a/src/common/inc/nvUnixVersion.h +++ b/src/common/inc/nvUnixVersion.h @@ -4,7 +4,7 @@ #if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS) || defined(NV_VMWARE) || defined(NV_QNX) || defined(NV_INTEGRITY) || \ (defined(RMCFG_FEATURE_PLATFORM_GSP) && RMCFG_FEATURE_PLATFORM_GSP == 1) -#define NV_VERSION_STRING "550.78" +#define NV_VERSION_STRING "555.42.02" #else diff --git a/src/common/inc/nvctassert.h b/src/common/inc/nvctassert.h index f2bae18fac..89a70832d6 100644 --- a/src/common/inc/nvctassert.h +++ b/src/common/inc/nvctassert.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1997-2019 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1997-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -139,14 +139,14 @@ // Adding this macro to fix MISRA 2012 rule 20.12 #define NV_CTASSERT_STRINGIFY_MACRO(b) #b -#if !defined(NVOC) && ((defined(__STDC_VERSION__) && __STDC_VERSION__ >= 201112L) || CLANG_C_STATIC_ASSERT) - // ISO C11 defines the _Static_assert keyword -# define ct_assert(b) _Static_assert((b), "Compile time assertion failed: " NV_CTASSERT_STRINGIFY_MACRO(b)) -# define ct_assert_i(b,line) _Static_assert((b), "Compile time assertion failed: " NV_CTASSERT_STRINGIFY_MACRO(b)NV_CTASSERT_STRINGIFY_MACRO(line)) -#elif (defined(__cplusplus) && __cplusplus >= 201103L) || (defined(_MSVC_LANG) && _MSVC_LANG >= 201103L) +#if (defined(__cplusplus) && __cplusplus >= 201103L) || (defined(_MSVC_LANG) && _MSVC_LANG >= 201103L) // ISO C++11 defines the static_assert keyword # define ct_assert(b) static_assert((b), "Compile time assertion failed: " NV_CTASSERT_STRINGIFY_MACRO(b)) # define ct_assert_i(b,line) static_assert((b), "Compile time assertion failed: " NV_CTASSERT_STRINGIFY_MACRO(b)NV_CTASSERT_STRINGIFY_MACRO(line)) +#elif !defined(NVOC) && ((defined(__STDC_VERSION__) && __STDC_VERSION__ >= 201112L) || CLANG_C_STATIC_ASSERT) + // ISO C11 defines the _Static_assert keyword +# define ct_assert(b) _Static_assert((b), "Compile time assertion failed: " NV_CTASSERT_STRINGIFY_MACRO(b)) +# define ct_assert_i(b,line) _Static_assert((b), "Compile time assertion failed: " NV_CTASSERT_STRINGIFY_MACRO(b)NV_CTASSERT_STRINGIFY_MACRO(line)) #else // For compilers which don't support ISO C11 or C++11, we fall back to an // array (type) declaration diff --git a/src/common/inc/nvlog_defs.h b/src/common/inc/nvlog_defs.h index 2bdbe92ff7..142a40b85f 100644 --- a/src/common/inc/nvlog_defs.h +++ b/src/common/inc/nvlog_defs.h @@ -438,6 +438,26 @@ typedef enum _NVLOG_ARGTYPE NVLOG_ARGTYPE__COUNT } NVLOG_ARGTYPE; +// Default flags for NvLog registry, used for single-buffer option or the read fails +#ifndef NVLOG_DEFAULT_FLAGS +#define NVLOG_DEFAULT_FLAGS \ + ( \ + DRF_NUM(_REG_STR_RM, _NVLOG, _BUFFER_FLAGS, \ + ( \ + DRF_DEF(LOG, _BUFFER_FLAGS, _DISABLED, _NO) | \ + DRF_DEF(LOG, _BUFFER_FLAGS, _TYPE, _RING) | \ + DRF_DEF(LOG, _BUFFER_FLAGS, _EXPANDABLE, _NO) | \ + DRF_DEF(LOG, _BUFFER_FLAGS, _NONPAGED, _YES) | \ + DRF_DEF(LOG, _BUFFER_FLAGS, _LOCKING, _STATE) | \ + DRF_DEF(LOG, _BUFFER_FLAGS, _OCA, _YES) \ + )) | \ + DRF_DEF(_REG_STR_RM, _NVLOG, _BUFFER_SIZE, _DEFAULT) | \ + DRF_NUM(_REG_STR_RM, _NVLOG, _RUNTIME_LEVEL, 0) | \ + DRF_DEF(_REG_STR_RM, _NVLOG, _TIMESTAMP, _32) | \ + DRF_DEF(_REG_STR_RM, _NVLOG, _INITED, _YES) \ + ) +#endif // NVLOG_DEFAULT_FLAGS + /** * @brief General info about the NvLog Print system */ diff --git a/src/common/inc/pex.h b/src/common/inc/pex.h index e21ab56df2..19b3e2ecbc 100644 --- a/src/common/inc/pex.h +++ b/src/common/inc/pex.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2012-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2012-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -36,5 +36,36 @@ #define PEX_FUNC_GETLTRLATENCY 0x00000006 // Get PCI Express Latency Tolerance Reporting Info #define PEX_FUNC_NAMEPCIDEVICE 0x00000007 // Get name of PCI or PCIE device #define PEX_FUNC_SETLTRLATENCY 0x00000008 // Set PCI Express Latency Tolerance Reporting Values +#define PEX_FUNC_AUXPOWERLIMIT 0x0000000A // Set Aux power limit +#define PEX_FUNC_PEXRST_DELAY 0x0000000B // Set Pex reset delay + + +/* + * 0h: Denied. + * Indicates that the platform cannot support the power requested. + * 1h: Granted. + * Indicates that the device is permitted to draw the requested auxiliary power. + * 2h: Granted. + * Indicates that the platform will not remove main power from the slot + * while the system is in S0. + */ +#define NV_AUX_POWER_REQUEST_STATUS 1:0 +#define NV_AUX_POWER_REQUEST_STATUS_DENIED 0x00 +#define NV_AUX_POWER_REQUEST_STATUS_GRANTED_WITHOUT_12V_POWER 0x01 +#define NV_AUX_POWER_REQUEST_STATUS_GRANTED_WITH_12V_POWER 0x02 + +/* + * Retry, with interval. + * Bit 4, is a status bit. If set, it indicates that the platform cannot support + * the power requested at this time, but it may be able to do so in the future. + * Bits 3:0 contains the waiting time, in seconds, after which request can be made again. + */ +#define NV_AUX_POWER_REQUEST_STATUS_RETRY_LATER 4:0 +#define NV_AUX_POWER_REQUEST_STATUS_RETRY_LATER_STATUS 4:4 +#define NV_AUX_POWER_REQUEST_STATUS_RETRY_LATER_STATUS_FALSE 0x0 +#define NV_AUX_POWER_REQUEST_STATUS_RETRY_LATER_STATUS_TRUE 0x1 +#define NV_AUX_POWER_REQUEST_STATUS_RETRY_LATER_INTERVAL 3:0 +#define NV_AUX_POWER_REQUEST_STATUS_RETRY_LATER_INTERVAL_MIN 0x1 +#define NV_AUX_POWER_REQUEST_STATUS_RETRY_LATER_INTERVAL_MAX 0xF #endif // PEX_H diff --git a/src/common/inc/swref/published/ampere/ga100/dev_nv_xve.h b/src/common/inc/swref/published/ampere/ga100/dev_nv_xve.h index a5bdd018fe..8658139357 100644 --- a/src/common/inc/swref/published/ampere/ga100/dev_nv_xve.h +++ b/src/common/inc/swref/published/ampere/ga100/dev_nv_xve.h @@ -26,6 +26,11 @@ #define NV_PCFG 0x00088FFF:0x00088000 /* RW--D */ #define NV_XVE_LINK_CONTROL_STATUS 0x00000088 /* RW-4R */ #define NV_XVE_LINK_CONTROL_STATUS_LINK_SPEED 19:16 /* R--VF */ +#define NV_XVE_DBG0 0x0000084C /* RW-4R */ +#define NV_XVE_DBG0_OUTSTANDING_DOWNSTREAM_READ_CNTR_RESET 9:9 /* RWCVF */ +#define NV_XVE_DBG0_OUTSTANDING_DOWNSTREAM_READ_CNTR_RESET_TRIGGER 0x00000001 /* -W--T */ +#define NV_XVE_DBG0_OUTSTANDING_DOWNSTREAM_READ_CNTR_RESET_DONE 0x00000000 /* R-C-V */ +#define NV_XVE_DBG0_OUTSTANDING_DOWNSTREAM_READ_CNTR_RESET_PENDING 0x00000001 /* R---V */ #define NV_XVE_DBG_CYA_0 0x00000898 /* RW-4R */ #define NV_XVE_DBG_CYA_0_BAR0_ADDR_WIDTH 19:19 /* RWCVF */ #define NV_XVE_DBG_CYA_0_BAR0_ADDR_WIDTH_32BIT 0x00000000 /* RWC-V */ diff --git a/src/common/inc/swref/published/hopper/gh100/dev_gc6_island_addendum.h b/src/common/inc/swref/published/hopper/gh100/dev_gc6_island_addendum.h index 87967bfc1a..4dda835047 100644 --- a/src/common/inc/swref/published/hopper/gh100/dev_gc6_island_addendum.h +++ b/src/common/inc/swref/published/hopper/gh100/dev_gc6_island_addendum.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2003-2024 NVIDIA CORPORATION & AFFILIATES + * SPDX-FileCopyrightText: Copyright (c) 2003-2021 NVIDIA CORPORATION & AFFILIATES * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -26,15 +26,12 @@ #define NV_PGC6_AON_FRTS_INPUT_WPR_SIZE_SECURE_SCRATCH_GROUP_03_0_WPR_SIZE_1MB_IN_4K 0x100 -#define NV_PGC6_AON_SECURE_SCRATCH_GROUP_20_CC NV_PGC6_AON_SECURE_SCRATCH_GROUP_20 -#define NV_PGC6_AON_SECURE_SCRATCH_GROUP_20_CC_MODE_ENABLED 0:0 -#define NV_PGC6_AON_SECURE_SCRATCH_GROUP_20_CC_MODE_ENABLED_TRUE 0x1 -#define NV_PGC6_AON_SECURE_SCRATCH_GROUP_20_CC_MODE_ENABLED_FALSE 0x0 -#define NV_PGC6_AON_SECURE_SCRATCH_GROUP_20_CC_DEV_ENABLED 1:1 -#define NV_PGC6_AON_SECURE_SCRATCH_GROUP_20_CC_DEV_ENABLED_TRUE 0x1 -#define NV_PGC6_AON_SECURE_SCRATCH_GROUP_20_CC_DEV_ENABLED_FALSE 0x0 -#define NV_PGC6_AON_SECURE_SCRATCH_GROUP_20_CC_MULTI_GPU_MODE 7:6 -#define NV_PGC6_AON_SECURE_SCRATCH_GROUP_20_CC_MULTI_GPU_MODE_NONE 0x0 -#define NV_PGC6_AON_SECURE_SCRATCH_GROUP_20_CC_MULTI_GPU_MODE_PROTECTED_PCIE 0x1 +#define NV_PGC6_AON_SECURE_SCRATCH_GROUP_20_CC NV_PGC6_AON_SECURE_SCRATCH_GROUP_20 +#define NV_PGC6_AON_SECURE_SCRATCH_GROUP_20_CC_MODE_ENABLED 0:0 +#define NV_PGC6_AON_SECURE_SCRATCH_GROUP_20_CC_MODE_ENABLED_TRUE 0x1 +#define NV_PGC6_AON_SECURE_SCRATCH_GROUP_20_CC_MODE_ENABLED_FALSE 0x0 +#define NV_PGC6_AON_SECURE_SCRATCH_GROUP_20_CC_DEV_ENABLED 1:1 +#define NV_PGC6_AON_SECURE_SCRATCH_GROUP_20_CC_DEV_ENABLED_TRUE 0x1 +#define NV_PGC6_AON_SECURE_SCRATCH_GROUP_20_CC_DEV_ENABLED_FALSE 0x0 #endif // __gh100_dev_gc6_island_addendum_h__ diff --git a/src/common/inc/swref/published/maxwell/gm107/dev_boot.h b/src/common/inc/swref/published/maxwell/gm107/dev_boot.h index 3d0a2d762a..8a1be9357f 100644 --- a/src/common/inc/swref/published/maxwell/gm107/dev_boot.h +++ b/src/common/inc/swref/published/maxwell/gm107/dev_boot.h @@ -43,4 +43,30 @@ #define NV_PMC_ENABLE_PDISP 30:30 /* RWIVF */ #define NV_PMC_ENABLE_PDISP_DISABLED 0x00000000 /* RW--V */ #define NV_PMC_ENABLE_PDISP_ENABLED 0x00000001 /* RWI-V */ +#define NV_PMC_ENABLE_MSPPP 1:1 /* */ +#define NV_PMC_ENABLE_MSPPP_ENABLE 0x00000001 /* */ +#define NV_PMC_ENABLE_PMEDIA 4:4 /* */ +#define NV_PMC_ENABLE_PMEDIA_DISABLED 0x00000000 /* */ +#define NV_PMC_ENABLE_PMEDIA_ENABLED 0x00000001 /* */ +#define NV_PMC_ENABLE_CE0 6:6 /* */ +#define NV_PMC_ENABLE_CE0_DISABLED 0x00000000 /* */ +#define NV_PMC_ENABLE_CE0_ENABLED 0x00000001 /* */ +#define NV_PMC_ENABLE_CE1 7:7 /* */ +#define NV_PMC_ENABLE_CE1_DISABLED 0x00000000 /* */ +#define NV_PMC_ENABLE_CE1_ENABLED 0x00000001 /* */ +#define NV_PMC_ENABLE_PFIFO 8:8 /* RWIVF */ +#define NV_PMC_ENABLE_PFIFO_DISABLED 0x00000000 /* RWI-V */ +#define NV_PMC_ENABLE_PFIFO_ENABLED 0x00000001 /* RW--V */ +#define NV_PMC_ENABLE_PGRAPH 12:12 /* */ +#define NV_PMC_ENABLE_PGRAPH_DISABLED 0x00000000 /* */ +#define NV_PMC_ENABLE_PGRAPH_ENABLED 0x00000001 /* */ +#define NV_PMC_ENABLE_PWR 13:13 /* RWIVF */ +#define NV_PMC_ENABLE_PWR_DISABLED 0x00000000 /* RW--V */ +#define NV_PMC_ENABLE_PWR_ENABLED 0x00000001 /* RWI-V */ +#define NV_PMC_ENABLE_MSVLD 15:15 /* */ +#define NV_PMC_ENABLE_MSVLD_DISABLED 0x00000000 /* */ +#define NV_PMC_ENABLE_MSVLD_ENABLED 0x00000001 /* */ +#define NV_PMC_ENABLE_MSPDEC 17:17 /* */ +#define NV_PMC_ENABLE_MSPDEC_DISABLED 0x00000000 /* */ +#define NV_PMC_ENABLE_MSPDEC_ENABLED 0x00000001 /* */ #endif // __gm107_dev_boot_h__ diff --git a/src/common/inc/swref/published/maxwell/gm107/dev_nv_xp.h b/src/common/inc/swref/published/maxwell/gm107/dev_nv_xp.h new file mode 100644 index 0000000000..a5f359dcb4 --- /dev/null +++ b/src/common/inc/swref/published/maxwell/gm107/dev_nv_xp.h @@ -0,0 +1,28 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gm107_dev_nv_xp_h__ +#define __gm107_dev_nv_xp_h__ +#define NV_XP_PL_CYA_1(i) (0x0008C300+(i)*4) /* RW-4A */ +#define NV_XP_PL_CYA_1_BLOCK_HOST2XP_HOLD_LTSSM 4:4 /* RWIVF */ +#endif // __gm107_dev_nv_xp_h__ diff --git a/src/common/inc/swref/published/maxwell/gm107/dev_nv_xve.h b/src/common/inc/swref/published/maxwell/gm107/dev_nv_xve.h index 4e53e8720b..25b3136959 100644 --- a/src/common/inc/swref/published/maxwell/gm107/dev_nv_xve.h +++ b/src/common/inc/swref/published/maxwell/gm107/dev_nv_xve.h @@ -163,4 +163,6 @@ #define NV_XVE_CYA_2 0x00000704 /* RW-4R */ #define NV_XVE_DEVICE_CONTROL_STATUS_2 0x000000A0 /* RWI4R */ #define NV_XVE_L1_PM_SUBSTATES_CTRL1 0x00000260 /* RW-4R */ +#define NV_XVE_SW_RESET 0x00000718 /* RW-4R */ +#define NV_XVE_SW_RESET_RESET 0:0 /* RWCVF */ #endif // __gm107_dev_nv_xve_h__ diff --git a/src/common/inc/swref/published/maxwell/gm107/dev_nv_xve_addendum.h b/src/common/inc/swref/published/maxwell/gm107/dev_nv_xve_addendum.h new file mode 100644 index 0000000000..6aba612345 --- /dev/null +++ b/src/common/inc/swref/published/maxwell/gm107/dev_nv_xve_addendum.h @@ -0,0 +1,28 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gm107_dev_nv_xve_addendum_h__ +#define __gm107_dev_nv_xve_addendum_h__ +#define NV_XVE_SW_RESET_RESET_ENABLE 0x00000001 +#define NV_XVE_SW_RESET_RESET_DISABLE 0x00000000 +#endif // __gm107_dev_nv_xve_addendum_h__ diff --git a/src/common/inc/swref/published/maxwell/gm200/dev_nv_xp.h b/src/common/inc/swref/published/maxwell/gm200/dev_nv_xp.h new file mode 100644 index 0000000000..dc9e1a2d9c --- /dev/null +++ b/src/common/inc/swref/published/maxwell/gm200/dev_nv_xp.h @@ -0,0 +1,28 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gm200_dev_nv_xp_h__ +#define __gm200_dev_nv_xp_h__ +#define NV_XP_PL_CYA_1(i) (0x0008C300+(i)*4) /* RW-4A */ +#define NV_XP_PL_CYA_1_BLOCK_HOST2XP_HOLD_LTSSM 4:4 /* RWIVF */ +#endif // __gm200_dev_nv_xp_h__ diff --git a/src/common/inc/swref/published/maxwell/gm200/dev_nv_xve.h b/src/common/inc/swref/published/maxwell/gm200/dev_nv_xve.h new file mode 100644 index 0000000000..b57300c1ae --- /dev/null +++ b/src/common/inc/swref/published/maxwell/gm200/dev_nv_xve.h @@ -0,0 +1,36 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gm200_dev_nv_xve_h__ +#define __gm200_dev_nv_xve_h__ +#define NV_XVE_SW_RESET 0x00000718 /* RW-4R */ +#define NV_XVE_SW_RESET_RESET 0:0 /* RWCVF */ +#define NV_XVE_SW_RESET_GPU_ON_SW_RESET_ENABLE 0x00000001 /* RW--V */ +#define NV_XVE_SW_RESET_GPU_ON_SW_RESET_DISABLE 0x00000000 /* RW--V */ +#define NV_XVE_SW_RESET_GPU_ON_SW_RESET 1:1 /* RWCVF */ +#define NV_XVE_SW_RESET_COUNTER_EN 2:2 /* RWCVF */ +#define NV_XVE_SW_RESET_COUNTER_VAL 14:4 /* RWCVF */ +#define NV_XVE_SW_RESET_CLOCK_ON_SW_RESET 15:15 /* RWCVF */ +#define NV_XVE_SW_RESET_CLOCK_COUNTER_EN 16:16 /* RWCVF */ +#define NV_XVE_SW_RESET_CLOCK_COUNTER_VAL 27:17 /* RWCVF */ +#endif // __gm200_dev_nv_xve_h__ diff --git a/src/common/inc/swref/published/maxwell/gm200/dev_nv_xve_addendum.h b/src/common/inc/swref/published/maxwell/gm200/dev_nv_xve_addendum.h new file mode 100644 index 0000000000..26e952ee5b --- /dev/null +++ b/src/common/inc/swref/published/maxwell/gm200/dev_nv_xve_addendum.h @@ -0,0 +1,28 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gm200_dev_nv_xve_addendum_h__ +#define __gm200_dev_nv_xve_addendum_h__ +#define NV_XVE_SW_RESET_RESET_ENABLE 0x00000001 +#define NV_XVE_SW_RESET_RESET_DISABLE 0x00000000 +#endif // __gm200_dev_nv_xve_addendum_h__ diff --git a/src/common/inc/swref/published/nv_ref.h b/src/common/inc/swref/published/nv_ref.h index 4f85cf1586..3c07205c37 100644 --- a/src/common/inc/swref/published/nv_ref.h +++ b/src/common/inc/swref/published/nv_ref.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -153,6 +153,7 @@ #define NV_PMC_BOOT_42_ARCHITECTURE_GA100 0x00000017 /* */ #define NV_PMC_BOOT_42_ARCHITECTURE_GH100 0x00000018 /* */ #define NV_PMC_BOOT_42_ARCHITECTURE_AD100 0x00000019 /* */ +#define NV_PMC_BOOT_42_ARCHITECTURE_AMODEL 0x0000001F /* */ #define NV_PMC_BOOT_42_CHIP_ID_GA100 0x00000170 /* */ diff --git a/src/common/inc/swref/published/nvswitch/ls10/dev_nport_ip.h b/src/common/inc/swref/published/nvswitch/ls10/dev_nport_ip.h index b639325099..6398bc5f2e 100644 --- a/src/common/inc/swref/published/nvswitch/ls10/dev_nport_ip.h +++ b/src/common/inc/swref/published/nvswitch/ls10/dev_nport_ip.h @@ -467,4 +467,9 @@ #define NV_NPORT_SCRATCH_WARM 0x00000fc0 /* RW-4R */ #define NV_NPORT_SCRATCH_WARM_DATA 31:0 /* RWEVF */ #define NV_NPORT_SCRATCH_WARM_DATA_INIT 0xdeadbaad /* RWE-V */ +#define NV_NPORT_STATUS 0x00000474 /* R--4R */ +#define NV_NPORT_STATUS_INGRESS_IDLE 0:0 /* R-XVF */ +#define NV_NPORT_STATUS_INGRESS_IDLE_IDLE 0x00000001 /* R---V */ +#define NV_NPORT_STATUS_ROUTE_IDLE 1:1 /* R-XVF */ +#define NV_NPORT_STATUS_ROUTE_IDLE_IDLE 0x00000001 /* R---V */ #endif // __ls10_dev_nport_ip_h__ diff --git a/src/common/inc/swref/published/nvswitch/ls10/dev_nvlsaw_ip.h b/src/common/inc/swref/published/nvswitch/ls10/dev_nvlsaw_ip.h index ab5293a5f7..2565c7a6db 100644 --- a/src/common/inc/swref/published/nvswitch/ls10/dev_nvlsaw_ip.h +++ b/src/common/inc/swref/published/nvswitch/ls10/dev_nvlsaw_ip.h @@ -96,5 +96,8 @@ #define NV_NVLSAW_SECURE_SCRATCH_WARM_GROUP_1__SIZE_1 4 /* */ #define NV_NVLSAW_SECURE_SCRATCH_WARM_GROUP_1_VALUE 31:0 /* RWEVF */ #define NV_NVLSAW_SECURE_SCRATCH_WARM_GROUP_1_VALUE_INIT 0x00000000 /* RWE-V */ -#define NV_NVLSAW_SECURE_SCRATCH_WARM_GROUP_3(i) (0x00000c50+(i)*0x4) /* RW-4A */ +#define NV_NVLSAW_SECURE_SCRATCH_WARM_GROUP_3(i) (0x00000c50+(i)*0x4) /* RW-4A */ +#define NV_NVLSAW_SECURE_SCRATCH_WARM_GROUP_3__SIZE_1 4 /* */ +#define NV_NVLSAW_SECURE_SCRATCH_WARM_GROUP_3_VALUE 31:0 /* RWEVF */ +#define NV_NVLSAW_SECURE_SCRATCH_WARM_GROUP_3_VALUE_INIT 0x00000000 /* RWE-V */ #endif // __ls10_dev_nvlsaw_ip_h__ diff --git a/src/common/inc/swref/published/pascal/gp102/dev_nv_xp.h b/src/common/inc/swref/published/pascal/gp102/dev_nv_xp.h new file mode 100644 index 0000000000..23c605787f --- /dev/null +++ b/src/common/inc/swref/published/pascal/gp102/dev_nv_xp.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gp102_dev_nv_xp_h__ +#define __gp102_dev_nv_xp_h__ +#define NV_XP_PL_CYA_1(i) (0x0008C300+(i)*4) /* RW-4A */ +#define NV_XP_PL_CYA_1_BLOCK_HOST2XP_HOLD_LTSSM 4:4 /* RWIVF */ +#define NV_XP_PL_CYA_1_BLOCK_HOST2XP_HOLD_LTSSM_ENABLE 0x00000001 /* RW--V */ +#endif // __gp102_dev_nv_xp_h__ diff --git a/src/common/inc/swref/published/pascal/gp102/dev_nv_xve.h b/src/common/inc/swref/published/pascal/gp102/dev_nv_xve.h new file mode 100644 index 0000000000..406d894f94 --- /dev/null +++ b/src/common/inc/swref/published/pascal/gp102/dev_nv_xve.h @@ -0,0 +1,37 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gp102_dev_nv_xve_h__ +#define __gp102_dev_nv_xve_h__ +#define NV_XVE_SW_RESET 0x00000718 /* RW-4R */ +#define NV_XVE_SW_RESET_RESET 0:0 /* RWCVF */ +#define NV_XVE_SW_RESET_GPU_ON_SW_RESET_INIT 0x00000001 /* RWC-V */ +#define NV_XVE_SW_RESET_GPU_ON_SW_RESET_ENABLE 0x00000001 /* RW--V */ +#define NV_XVE_SW_RESET_GPU_ON_SW_RESET_DISABLE 0x00000000 /* RW--V */ +#define NV_XVE_SW_RESET_GPU_ON_SW_RESET 1:1 /* RWCVF */ +#define NV_XVE_SW_RESET_COUNTER_EN 2:2 /* RWCVF */ +#define NV_XVE_SW_RESET_COUNTER_VAL 14:4 /* RWCVF */ +#define NV_XVE_SW_RESET_CLOCK_ON_SW_RESET 15:15 /* RWCVF */ +#define NV_XVE_SW_RESET_CLOCK_COUNTER_EN 16:16 /* RWCVF */ +#define NV_XVE_SW_RESET_CLOCK_COUNTER_VAL 27:17 /* RWCVF */ +#endif // __gp102_dev_nv_xve_h__ diff --git a/src/common/inc/swref/published/pascal/gp102/dev_nv_xve_addendum.h b/src/common/inc/swref/published/pascal/gp102/dev_nv_xve_addendum.h new file mode 100644 index 0000000000..a67189e70a --- /dev/null +++ b/src/common/inc/swref/published/pascal/gp102/dev_nv_xve_addendum.h @@ -0,0 +1,28 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gp102_dev_nv_xve_addendum_h__ +#define __gp102_dev_nv_xve_addendum_h__ +#define NV_XVE_SW_RESET_RESET_ENABLE 0x00000001 +#define NV_XVE_SW_RESET_RESET_DISABLE 0x00000000 +#endif // __gp102_dev_nv_xve_addendum_h__ diff --git a/src/common/modeset/timing/dpsdp.h b/src/common/modeset/timing/dpsdp.h index ee987703e1..b35b218a44 100644 --- a/src/common/modeset/timing/dpsdp.h +++ b/src/common/modeset/timing/dpsdp.h @@ -47,6 +47,7 @@ typedef enum tagSDP_PACKET_TYPE typedef enum tagSDP_VSC_REVNUM { + SDP_VSC_REVNUM_DISABLED = 0, SDP_VSC_REVNUM_STEREO = 1, SDP_VSC_REVNUM_STEREO_PSR, SDP_VSC_REVNUM_STEREO_PSR2, @@ -58,6 +59,7 @@ typedef enum tagSDP_VSC_REVNUM typedef enum tagSDP_VSC_VALID_DATA_BYTES { + SDP_VSC_VALID_DATA_BYTES_DISABLED = 0, SDP_VSC_VALID_DATA_BYTES_STEREO = 1, SDP_VSC_VALID_DATA_BYTES_STEREO_PSR = 8, SDP_VSC_VALID_DATA_BYTES_PSR2 = 12, diff --git a/src/common/modeset/timing/nvt_displayid20.c b/src/common/modeset/timing/nvt_displayid20.c index 38ea670e0b..295962f8a7 100644 --- a/src/common/modeset/timing/nvt_displayid20.c +++ b/src/common/modeset/timing/nvt_displayid20.c @@ -117,7 +117,7 @@ NvTiming_parseDisplayId20Info( } CODE_SEGMENT(PAGE_DD_CODE) -NvU32 +NvU32 NvTiming_DisplayID2ValidationMask( NVT_DISPLAYID_2_0_INFO *pDisplayId20Info, NvBool bIsStrongValidation) @@ -130,13 +130,13 @@ NvTiming_DisplayID2ValidationMask( { ret |= NVT_DID2_VALIDATION_ERR_MASK(NVT_DID2_VALIDATION_ERR_VERSION); } - + if (!pDisplayId20Info->valid_data_blocks.product_id_present) { ret |= NVT_DID2_VALIDATION_ERR_MASK(NVT_DID2_VALIDATION_ERR_PRODUCT_IDENTIFY); } - - if (pDisplayId20Info->primary_use_case >= PRODUCT_PRIMARY_USE_GENERIC_DISPLAY && + + if (pDisplayId20Info->primary_use_case >= PRODUCT_PRIMARY_USE_GENERIC_DISPLAY && pDisplayId20Info->primary_use_case <= PRODUCT_PRIMARY_USE_HEAD_MOUNT_AUGMENTED_REALITY) { if (!(pDisplayId20Info->valid_data_blocks.parameters_present && @@ -155,7 +155,7 @@ NvTiming_DisplayID2ValidationMask( // Type 7 Timings data block for (j = 0; j <= pDisplayId20Info->total_timings; j++) { - if ( NVT_PREFERRED_TIMING_IS_DISPLAYID(pDisplayId20Info->timing[j].etc.flag) && + if ( NVT_PREFERRED_TIMING_IS_DISPLAYID(pDisplayId20Info->timing[j].etc.flag) && (pDisplayId20Info->display_param.h_pixels != 0) && (pDisplayId20Info->display_param.v_pixels != 0)) { @@ -175,12 +175,12 @@ NvTiming_DisplayID2ValidationMask( } CODE_SEGMENT(PAGE_DD_CODE) -NVT_STATUS +NVT_STATUS NvTiming_DisplayID2ValidationDataBlocks( - NVT_DISPLAYID_2_0_INFO *pDisplayIdInfo, + NVT_DISPLAYID_2_0_INFO *pDisplayIdInfo, NvBool bIsStrongValidation) { - if (NvTiming_DisplayID2ValidationMask(pDisplayIdInfo, bIsStrongValidation) != 0) + if (NvTiming_DisplayID2ValidationMask(pDisplayIdInfo, bIsStrongValidation) != 0) { return NVT_STATUS_ERR; } @@ -272,7 +272,7 @@ parseDisplayId20SectionDataBlocks( break; } - // check data block is valid. + // check data block is valid. if ((offset + DISPLAYID_2_0_DATA_BLOCK_SIZE_TOTAL(pDataBlock)) > pSection->header.section_bytes) { return NVT_STATUS_ERR; @@ -284,7 +284,7 @@ parseDisplayId20SectionDataBlocks( { return status; } - + switch (pDataBlock->type) { case DISPLAYID_2_0_BLOCK_TYPE_PRODUCT_IDENTITY: @@ -312,7 +312,7 @@ parseDisplayId20SectionDataBlocks( case DISPLAYID_2_0_BLOCK_TYPE_INTERFACE_FEATURES: pDisplayIdInfo->valid_data_blocks.interface_feature_present = NV_TRUE; - // Supported - Color depth is supported for all supported timings. Supported timing includes all Display-ID exposed timings + // Supported - Color depth is supported for all supported timings. Supported timing includes all Display-ID exposed timings // (that is timing exposed using DisplayID timing types and CTA VICs) if (IS_BPC_SUPPORTED_COLORFORMAT(pDisplayIdInfo->interface_features.yuv444.bpcs)) { @@ -324,8 +324,8 @@ parseDisplayId20SectionDataBlocks( pDisplayIdInfo->basic_caps |= NVT_DISPLAY_2_0_CAP_YCbCr_422; } - if (pDisplayIdInfo->interface_features.audio_capability.support_48khz || - pDisplayIdInfo->interface_features.audio_capability.support_44_1khz || + if (pDisplayIdInfo->interface_features.audio_capability.support_48khz || + pDisplayIdInfo->interface_features.audio_capability.support_44_1khz || pDisplayIdInfo->interface_features.audio_capability.support_32khz) { pDisplayIdInfo->basic_caps |= NVT_DISPLAY_2_0_CAP_BASIC_AUDIO; @@ -344,7 +344,7 @@ parseDisplayId20SectionDataBlocks( pDisplayIdInfo->valid_data_blocks.type10Timing_present = NV_TRUE; break; case DISPLAYID_2_0_BLOCK_TYPE_ADAPTIVE_SYNC: - pDisplayIdInfo->valid_data_blocks.adaptive_sync_present = NV_TRUE; + pDisplayIdInfo->valid_data_blocks.adaptive_sync_present = NV_TRUE; break; case DISPLAYID_2_0_BLOCK_TYPE_ARVR_HMD: pDisplayIdInfo->valid_data_blocks.arvr_hmd_present = NV_TRUE; @@ -371,15 +371,15 @@ parseDisplayId20SectionDataBlocks( return status; } - + CODE_SEGMENT(PAGE_DD_CODE) -NVT_STATUS +NVT_STATUS parseDisplayId20DataBlock( const DISPLAYID_2_0_DATA_BLOCK_HEADER *pDataBlock, NVT_DISPLAYID_2_0_INFO *pDisplayIdInfo) { NVT_STATUS status = NVT_STATUS_SUCCESS; - + switch (pDataBlock->type) { case DISPLAYID_2_0_BLOCK_TYPE_PRODUCT_IDENTITY: @@ -452,7 +452,7 @@ parseDisplayId20ProductIdentity( pProductIdBlock = (const DISPLAYID_2_0_PROD_IDENTIFICATION_BLOCK *)pDataBlock; - // add more validation if needed + // add more validation if needed if (pDisplayIdInfo == NULL) return status; @@ -487,7 +487,7 @@ parseDisplayId20ProductIdentity( CODE_SEGMENT(PAGE_DD_CODE) NVT_STATUS -parseDisplayId20DisplayParam( +parseDisplayId20DisplayParam( const DISPLAYID_2_0_DATA_BLOCK_HEADER *pDataBlock, NVT_DISPLAYID_2_0_INFO *pDisplayIdInfo) { @@ -580,7 +580,7 @@ parseDisplayId20DisplayParam( return status; } -CODE_SEGMENT(PAGE_DD_CODE) +CODE_SEGMENT(PAGE_DD_CODE) NVT_STATUS parseDisplayId20Timing7( const DISPLAYID_2_0_DATA_BLOCK_HEADER *pDataBlock, @@ -603,7 +603,6 @@ parseDisplayId20Timing7( { if (pDataBlock->data_bytes % sizeof(DISPLAYID_2_0_TIMING_7_DESCRIPTOR) != 0) { - nvt_assert(0); return NVT_STATUS_ERR; } @@ -612,7 +611,6 @@ parseDisplayId20Timing7( if (descriptorCount < 1 || descriptorCount > DISPLAYID_2_0_TIMING_7_MAX_DESCRIPTORS) { - nvt_assert(0); return NVT_STATUS_ERR; } @@ -620,7 +618,7 @@ parseDisplayId20Timing7( { startSeqNumber = getExistedTimingSeqNumber(pDisplayIdInfo, NVT_TYPE_DISPLAYID_7); } - + for (i = 0; i < descriptorCount; i++) { NVMISC_MEMSET(&newTiming, 0, sizeof(newTiming)); @@ -644,9 +642,9 @@ parseDisplayId20Timing7( newTiming.etc.flag |= pTiming7Block->descriptors[i].options.is_preferred_or_ycc420 ? NVT_FLAG_DISPLAYID_DTD_PREFERRED_TIMING : 0; } - NVT_SNPRINTF((char *)newTiming.etc.name, sizeof(newTiming.etc.name), "DID20-Type7:#%2d:%dx%dx%3d.%03dHz/%s", + NVT_SNPRINTF((char *)newTiming.etc.name, sizeof(newTiming.etc.name), "DID20-Type7:#%2d:%dx%dx%3d.%03dHz/%s", (int)NVT_GET_TIMING_STATUS_SEQ(newTiming.etc.status), - (int)newTiming.HVisible, + (int)newTiming.HVisible, (int)((newTiming.interlaced ? 2 : 1)*newTiming.VVisible), (int)newTiming.etc.rrx1k/1000, (int)newTiming.etc.rrx1k%1000, @@ -669,7 +667,7 @@ parseDisplayId20Timing7( return status; } -CODE_SEGMENT(PAGE_DD_CODE) +CODE_SEGMENT(PAGE_DD_CODE) NVT_STATUS parseDisplayId20Timing8( const DISPLAYID_2_0_DATA_BLOCK_HEADER *pDataBlock, @@ -707,22 +705,22 @@ parseDisplayId20Timing8( { NVMISC_MEMSET(&newTiming, 0, sizeof(newTiming)); - if (parseDisplayId20Timing8Descriptor(&pTiming8Block->timingCode, &newTiming, - pTiming8Block->header.timing_code_type, + if (parseDisplayId20Timing8Descriptor(&pTiming8Block->timingCode, &newTiming, + pTiming8Block->header.timing_code_type, pTiming8Block->header.timing_code_size, i, startSeqNumber+i) == NVT_STATUS_SUCCESS) { - newTiming.etc.flag |= ((pTiming8Block->header.revision == 1) && pTiming8Block->header.is_support_yuv420) ? + newTiming.etc.flag |= ((pTiming8Block->header.revision == 1) && pTiming8Block->header.is_support_yuv420) ? NVT_FLAG_DISPLAYID_T7_T8_EXPLICT_YUV420 : 0; - + NVT_SNPRINTF((char *)newTiming.etc.name, sizeof(newTiming.etc.name), "DID20-Type8:#%3d:%dx%dx%3d.%03dHz/%s", (int)NVT_GET_TIMING_STATUS_SEQ(newTiming.etc.status), (int)newTiming.HVisible, (int)newTiming.VVisible, - (int)newTiming.etc.rrx1k/1000, (int)newTiming.etc.rrx1k%1000, + (int)newTiming.etc.rrx1k/1000, (int)newTiming.etc.rrx1k%1000, (newTiming.interlaced ? "I":"P")); newTiming.etc.name[sizeof(newTiming.etc.name) - 1] = '\0'; newTiming.etc.rep = 0x1; - + if (!assignNextAvailableDisplayId20Timing(pDisplayIdInfo, &newTiming)) { break; @@ -733,7 +731,7 @@ parseDisplayId20Timing8( return status; } -CODE_SEGMENT(PAGE_DD_CODE) +CODE_SEGMENT(PAGE_DD_CODE) NVT_STATUS parseDisplayId20Timing9( const DISPLAYID_2_0_DATA_BLOCK_HEADER *pDataBlock, @@ -745,11 +743,10 @@ parseDisplayId20Timing9( NvU32 descriptorCount = 0; NvU8 startSeqNumber = 0; NvU8 i = 0; - + descriptorCount = pDataBlock->data_bytes / sizeof(DISPLAYID_2_0_TIMING_9_DESCRIPTOR); if (descriptorCount < 1 || descriptorCount > DISPLAYID_2_0_TIMING_9_MAX_DESCRIPTORS) { - nvt_assert(0); return NVT_STATUS_ERR; } @@ -771,7 +768,7 @@ parseDisplayId20Timing9( break; } } - else + else { if (pDisplayIdInfo == NULL) return NVT_STATUS_ERR; } @@ -780,7 +777,7 @@ parseDisplayId20Timing9( return status; } -CODE_SEGMENT(PAGE_DD_CODE) +CODE_SEGMENT(PAGE_DD_CODE) NVT_STATUS parseDisplayId20Timing10( const DISPLAYID_2_0_DATA_BLOCK_HEADER *pDataBlock, @@ -801,7 +798,6 @@ parseDisplayId20Timing10( if (pTiming10Block->header.type != DISPLAYID_2_0_BLOCK_TYPE_TIMING_10) { - nvt_assert(0); return NVT_STATUS_ERR; } @@ -811,7 +807,6 @@ parseDisplayId20Timing10( if (descriptorCount < 1 || descriptorCount > DISPLAYID_2_0_TIMING_10_MAX_6BYTES_DESCRIPTORS) { - nvt_assert(0); return NVT_STATUS_ERR; } } @@ -821,7 +816,6 @@ parseDisplayId20Timing10( if (descriptorCount < 1 || descriptorCount > DISPLAYID_2_0_TIMING_10_MAX_7BYTES_DESCRIPTORS) { - nvt_assert(0); return NVT_STATUS_ERR; } } @@ -836,9 +830,9 @@ parseDisplayId20Timing10( for (i = 0; i < descriptorCount; i++) { NVMISC_MEMSET(&newTiming, 0, sizeof(newTiming)); - if (NVT_STATUS_SUCCESS == parseDisplayId20Timing10Descriptor(&pTiming10Block->descriptors[i*eachOfDescriptorsSize], - &newTiming, - pTiming10Block->header.payload_bytes_len, + if (NVT_STATUS_SUCCESS == parseDisplayId20Timing10Descriptor(&pTiming10Block->descriptors[i*eachOfDescriptorsSize], + &newTiming, + pTiming10Block->header.payload_bytes_len, startSeqNumber+i)) { p6bytesDescriptor = (const DISPLAYID_2_0_TIMING_10_6BYTES_DESCRIPTOR *)&pTiming10Block->descriptors[i*eachOfDescriptorsSize]; @@ -852,10 +846,10 @@ parseDisplayId20Timing10( { NVT_SNPRINTF((char *)newTiming.etc.name, sizeof(newTiming.etc.name), "DID20-Type10:#%3d:%dx%dx%3d.%03dHz/%s", (int)NVT_GET_TIMING_STATUS_SEQ(newTiming.etc.status), - (int)newTiming.HVisible, + (int)newTiming.HVisible, (int)newTiming.VVisible, - (int)newTiming.etc.rrx1k/1000, - (int)newTiming.etc.rrx1k%1000, + (int)newTiming.etc.rrx1k/1000, + (int)newTiming.etc.rrx1k%1000, (newTiming.interlaced ? "I":"P")); } else @@ -863,10 +857,10 @@ parseDisplayId20Timing10( NVT_SNPRINTF((char *)newTiming.etc.name, sizeof(newTiming.etc.name), "DID20-Type10RB%d:#%3d:%dx%dx%3d.%03dHz/%s", p6bytesDescriptor->options.timing_formula, (int)NVT_GET_TIMING_STATUS_SEQ(newTiming.etc.status), - (int)newTiming.HVisible, + (int)newTiming.HVisible, (int)newTiming.VVisible, - (int)newTiming.etc.rrx1k/1000, - (int)newTiming.etc.rrx1k%1000, + (int)newTiming.etc.rrx1k/1000, + (int)newTiming.etc.rrx1k%1000, (newTiming.interlaced ? "I":"P")); } @@ -907,7 +901,7 @@ parseDisplayId20RangeLimit( return NVT_STATUS_ERR; } - pRangeLimitsBlock = (const DISPLAYID_2_0_RANGE_LIMITS_BLOCK *)pDataBlock; + pRangeLimitsBlock = (const DISPLAYID_2_0_RANGE_LIMITS_BLOCK *)pDataBlock; rangeLimits.revision = pDataBlock->revision; @@ -923,7 +917,7 @@ parseDisplayId20RangeLimit( rangeLimits.vfreq_max = pRangeLimitsBlock->dynamic_video_timing_range_support.vertical_frequency_max_9_8 << 8 | pRangeLimitsBlock->vertical_frequency_max_7_0; } - else + else { rangeLimits.vfreq_max = pRangeLimitsBlock->vertical_frequency_max_7_0; } @@ -940,9 +934,9 @@ parseDisplayId20RangeLimit( } return status; } - + NVMISC_MEMCPY(&pDisplayIdInfo->range_limits, &rangeLimits, sizeof(NVT_DISPLAYID_RANGE_LIMITS)); - + return status; } @@ -1006,7 +1000,7 @@ parseDisplayId20DisplayInterfaceFeatures( pInterfaceFeaturesBlock->interface_color_depth_ycbcr420.bit_per_primary_14, pInterfaceFeaturesBlock->interface_color_depth_ycbcr420.bit_per_primary_16); - // * 74.25MP/s + // * 74.25MP/s pInterfaceFeatures->yuv420_min_pclk = pInterfaceFeaturesBlock->min_pixel_rate_ycbcr420 * 7425; @@ -1201,7 +1195,7 @@ parseDisplayId20AdaptiveSync( NvU8 i = 0; NvU8 minRR = 0; NvU16 maxRR = 0; - + pAdaptiveSyncBlock = (const DISPLAYID_2_0_ADAPTIVE_SYNC_BLOCK *)pDataBlock; if (pAdaptiveSyncBlock->header.payload_bytes_adaptive_sync_len == 0) @@ -1209,7 +1203,6 @@ parseDisplayId20AdaptiveSync( // Sanity check if (pDataBlock->data_bytes % sizeof(DISPLAYID_2_0_ADAPTIVE_SYNC_DESCRIPTOR) != 0) { - nvt_assert(0); status = NVT_STATUS_ERR; } @@ -1226,7 +1219,6 @@ parseDisplayId20AdaptiveSync( pAdaptiveSyncBlock->descriptors[i].max_refresh_rate.max_rr_7_0) + 1; if (minRR > (maxRR + 1) || minRR == 0 || maxRR == 0) { - nvt_assert(0); status = NVT_STATUS_ERR; } } @@ -1236,7 +1228,7 @@ parseDisplayId20AdaptiveSync( pDisplayIdInfo->total_adaptive_sync_descriptor = descriptorCnt; for (i = 0; i < descriptorCnt; i++) - { + { // Byte 0 Adaptive-Sync Operation and Range Information pDisplayIdInfo->adaptive_sync_descriptor[i].u.information.adaptive_sync_range = pAdaptiveSyncBlock->descriptors[i].operation_range_info.range; pDisplayIdInfo->adaptive_sync_descriptor[i].u.information.duration_inc_flicker_perf = pAdaptiveSyncBlock->descriptors[i].operation_range_info.successive_frame_inc_tolerance; @@ -1247,7 +1239,7 @@ parseDisplayId20AdaptiveSync( // 6.2 format (six integer bits and two fractional bits) a value range of 0.00 to 63.75ms pDisplayIdInfo->adaptive_sync_descriptor[i].max_duration_inc = pAdaptiveSyncBlock->descriptors[i].max_single_frame_inc; pDisplayIdInfo->adaptive_sync_descriptor[i].min_rr = pAdaptiveSyncBlock->descriptors[i].min_refresh_rate; - pDisplayIdInfo->adaptive_sync_descriptor[i].max_rr = (pAdaptiveSyncBlock->descriptors[i].max_refresh_rate.max_rr_9_8 << 8 | + pDisplayIdInfo->adaptive_sync_descriptor[i].max_rr = (pAdaptiveSyncBlock->descriptors[i].max_refresh_rate.max_rr_9_8 << 8 | pAdaptiveSyncBlock->descriptors[i].max_refresh_rate.max_rr_7_0) + 1; // 6.2 format (six integer bits and two fractional bits) a value range of 0.00 to 63.75ms pDisplayIdInfo->adaptive_sync_descriptor[i].max_duration_dec = pAdaptiveSyncBlock->descriptors[i].max_single_frame_dec; @@ -1322,7 +1314,7 @@ parseDisplayId20BrightnessLuminanceRange( CODE_SEGMENT(PAGE_DD_CODE) NVT_STATUS parseDisplayId20VendorSpecific( - const DISPLAYID_2_0_DATA_BLOCK_HEADER *pDataBlock, + const DISPLAYID_2_0_DATA_BLOCK_HEADER *pDataBlock, NVT_DISPLAYID_2_0_INFO *pDisplayIdInfo) { NVT_STATUS status = NVT_STATUS_SUCCESS; @@ -1336,10 +1328,10 @@ parseDisplayId20VendorSpecific( block = (const DISPLAYID_2_0_VENDOR_SPECIFIC_BLOCK*)pDataBlock; pVendorSpecific = &pDisplayIdInfo->vendor_specific; - - ieee_oui = (NvU32)((block->vendor_id[0] << 16) | - (block->vendor_id[1] << 8) | - (block->vendor_id[2])); + + ieee_oui = (NvU32)((block->vendor_id[0] << 16) | + (block->vendor_id[1] << 8) | + (block->vendor_id[2])); switch (ieee_oui) { @@ -1347,17 +1339,17 @@ parseDisplayId20VendorSpecific( // TODO: below parser shall be updated if DID21 changed in the future if (pDataBlock->data_bytes == NVT_VESA_VENDOR_SPECIFIC_LENGTH) { - pVendorSpecific->vesaVsdb.data_struct_type.type = + pVendorSpecific->vesaVsdb.data_struct_type.type = block->vendor_specific_data[3] & NVT_VESA_ORG_VSDB_DATA_TYPE_MASK; - pVendorSpecific->vesaVsdb.data_struct_type.color_space_and_eotf = + pVendorSpecific->vesaVsdb.data_struct_type.color_space_and_eotf = (block->vendor_specific_data[3] & NVT_VESA_ORG_VSDB_COLOR_SPACE_AND_EOTF_MASK) >> NVT_VESA_ORG_VSDB_COLOR_SPACE_AND_EOTF_SHIFT; - pVendorSpecific->vesaVsdb.overlapping.pixels_overlapping_count = + pVendorSpecific->vesaVsdb.overlapping.pixels_overlapping_count = block->vendor_specific_data[4] & NVT_VESA_ORG_VSDB_PIXELS_OVERLAPPING_MASK; - pVendorSpecific->vesaVsdb.overlapping.multi_sst = + pVendorSpecific->vesaVsdb.overlapping.multi_sst = (block->vendor_specific_data[4] & NVT_VESA_ORG_VSDB_MULTI_SST_MODE_MASK) >> NVT_VESA_ORG_VSDB_MULTI_SST_MODE_SHIFT; - pVendorSpecific->vesaVsdb.pass_through_integer.pass_through_integer_dsc = + pVendorSpecific->vesaVsdb.pass_through_integer.pass_through_integer_dsc = block->vendor_specific_data[5] & NVT_VESA_ORG_VSDB_PASS_THROUGH_INTEGER_MASK; - pVendorSpecific->vesaVsdb.pass_through_fractional.pass_through_fraction_dsc = + pVendorSpecific->vesaVsdb.pass_through_fractional.pass_through_fraction_dsc = block->vendor_specific_data[6] & NVT_VESA_ORG_VSDB_PASS_THROUGH_FRACTIOINAL_MASK; } else @@ -1380,7 +1372,7 @@ parseDisplayId20CtaData( NVT_DISPLAYID_2_0_INFO *pDisplayIdInfo) { NVT_STATUS status = NVT_STATUS_SUCCESS; - + NVT_EDID_CEA861_INFO *p861Info = NULL; const DISPLAYID_2_0_CTA_BLOCK * ctaBlock = NULL; NvU8 *pcta_data = NULL; @@ -1399,12 +1391,12 @@ parseDisplayId20CtaData( { status = parseCta861DataBlockInfo(pcta_data, pDataBlock->data_bytes, &pDisplayIdInfo->cta.cta861_info); } - + if (status != NVT_STATUS_SUCCESS) { return status; - } - + } + p861Info = &(pDisplayIdInfo->cta.cta861_info); parseCta861VsdbBlocks(p861Info, pDisplayIdInfo, FROM_DISPLAYID_20_DATA_BLOCK); @@ -1416,7 +1408,10 @@ parseDisplayId20CtaData( // yuv420-only video parse861bShortYuv420Timing(p861Info, pDisplayIdInfo, FROM_DISPLAYID_20_DATA_BLOCK); - parseCea861HdrStaticMetadataDataBlock(p861Info, pDisplayIdInfo, FROM_DISPLAYID_20_DATA_BLOCK); + if (pDisplayIdInfo->cta.cta861_info.valid.hdr_static_metadata != 0) + { + parseCta861HdrStaticMetadataDataBlock(p861Info, pDisplayIdInfo, FROM_DISPLAYID_20_DATA_BLOCK); + } // CEA861-F at 7.5.12 section about VFPDB block. if (p861Info->total_svr > 0) @@ -1446,9 +1441,9 @@ greatestCommonDenominator( } CODE_SEGMENT(PAGE_DD_CODE) -static NVT_STATUS +static NVT_STATUS getPrimaryUseCase( - NvU8 product_type, + NvU8 product_type, NVT_DISPLAYID_PRODUCT_PRIMARY_USE_CASE *primary_use_case) { NVT_STATUS status = NVT_STATUS_SUCCESS; @@ -1517,7 +1512,7 @@ computeDisplayId20SectionCheckSum( CODE_SEGMENT(PAGE_DD_CODE) NvBool assignNextAvailableDisplayId20Timing( - NVT_DISPLAYID_2_0_INFO *pDisplayIdInfo, + NVT_DISPLAYID_2_0_INFO *pDisplayIdInfo, const NVT_TIMING *pTiming) { if (pDisplayIdInfo == NULL) return NV_TRUE; @@ -1582,7 +1577,7 @@ parseDisplayId20Timing7Descriptor( NVT_H_SYNC_NEGATIVE; pTiming->VSyncPol = pDescriptor->vertical.sync_polarity ? NVT_V_SYNC_POSITIVE : NVT_V_SYNC_NEGATIVE; - + // EDID used in DP1.4 Compliance test had incorrect HBlank listed, leading to wrong raster sizes being set by driver (bug 2714607) // Filter incorrect timings here. HTotal must cover sufficient blanking time if (pTiming->HTotal < (pTiming->HVisible + pTiming->HFrontPorch + pTiming->HSyncWidth)) @@ -1641,7 +1636,7 @@ parseDisplayId20Timing7Descriptor( pTiming->etc.rrx1k = NvTiming_CalcRRx1k(pTiming->pclk, pTiming->interlaced, pTiming->HTotal, - pTiming->VTotal); + pTiming->VTotal); pTiming->etc.status = NVT_STATUS_DISPLAYID_7N(++count); @@ -1669,7 +1664,7 @@ parseDisplayId20Timing8Descriptor( { case DISPLAYID_2_0_TIMING_CODE_DMT: //single-byte DMT ID Codes status = NvTiming_EnumDMT((NvU32)(pTimingCode[idx]), pTiming); - break; + break; case DISPLAYID_2_0_TIMING_CODE_CTA_VIC: status = NvTiming_EnumCEA861bTiming((NvU32)(pTimingCode[idx]), pTiming); break; @@ -1678,7 +1673,7 @@ parseDisplayId20Timing8Descriptor( break; default: { - nvt_assert(0 && "RESERVED timing code type"); + nvt_assert(0 && "RESERVED timing code type"); status = NVT_STATUS_ERR; } break; @@ -1725,7 +1720,7 @@ parseDisplayId20Timing9Descriptor( { case DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_STANDARD: status = NvTiming_CalcCVT(width, height, rr, NVT_PROGRESSIVE, pTiming); - break; + break; case DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_REDUCED_BLANKING_1: status = NvTiming_CalcCVT_RB(width, height, rr, NVT_PROGRESSIVE, pTiming); break; @@ -1734,7 +1729,7 @@ parseDisplayId20Timing9Descriptor( break; default: { - nvt_assert(0 && "Unknown timing formula"); + nvt_assert(0 && "Unknown timing formula"); status = NVT_STATUS_ERR; } break; @@ -1749,10 +1744,10 @@ parseDisplayId20Timing9Descriptor( { NVT_SNPRINTF((char *)pTiming->etc.name, sizeof(pTiming->etc.name), "DID20-Type9:#%3d:%dx%dx%3d.%03dHz/%s", (int)NVT_GET_TIMING_STATUS_SEQ(pTiming->etc.status), - (int)pTiming->HVisible, + (int)pTiming->HVisible, (int)pTiming->VVisible, - (int)pTiming->etc.rrx1k/1000, - (int)pTiming->etc.rrx1k%1000, + (int)pTiming->etc.rrx1k/1000, + (int)pTiming->etc.rrx1k%1000, (pTiming->interlaced ? "I":"P")); } else @@ -1760,10 +1755,10 @@ parseDisplayId20Timing9Descriptor( NVT_SNPRINTF((char *)pTiming->etc.name, sizeof(pTiming->etc.name), "DID20-Type9RB%d:#%3d:%dx%dx%3d.%03dHz/%s", pDescriptor->options.timing_formula, (int)NVT_GET_TIMING_STATUS_SEQ(pTiming->etc.status), - (int)pTiming->HVisible, + (int)pTiming->HVisible, (int)pTiming->VVisible, - (int)pTiming->etc.rrx1k/1000, - (int)pTiming->etc.rrx1k%1000, + (int)pTiming->etc.rrx1k/1000, + (int)pTiming->etc.rrx1k%1000, (pTiming->interlaced ? "I":"P")); } } @@ -1804,7 +1799,7 @@ parseDisplayId20Timing10Descriptor( { case DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_STANDARD: status = NvTiming_CalcCVT(width, height, rr, NVT_PROGRESSIVE, pTiming); - break; + break; case DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_REDUCED_BLANKING_1: status = NvTiming_CalcCVT_RB(width, height, rr, NVT_PROGRESSIVE, pTiming); break; @@ -1839,15 +1834,15 @@ parseDisplayId20Timing10Descriptor( } } break; - default: + default: { - nvt_assert(0 && "Unknown timing formula"); + nvt_assert(0 && "Unknown timing formula"); status = NVT_STATUS_ERR; } break; } - if (status == NVT_STATUS_SUCCESS) + if (status == NVT_STATUS_SUCCESS) { pTiming->etc.status = NVT_STATUS_DISPLAYID_10N(++count); return status; @@ -1858,9 +1853,9 @@ parseDisplayId20Timing10Descriptor( // get the existed stored timing sequence number CODE_SEGMENT(PAGE_DD_CODE) -static NvU8 +static NvU8 getExistedTimingSeqNumber( - NVT_DISPLAYID_2_0_INFO *pDisplayIdInfo, + NVT_DISPLAYID_2_0_INFO *pDisplayIdInfo, enum NVT_TIMING_TYPE timingType) { NvU8 count = 0; @@ -1906,16 +1901,16 @@ NvU32 getDID2Version(NvU8 *pData, NvU32 *pVer) } CODE_SEGMENT(PAGE_DD_CODE) -void +void updateColorFormatForDisplayId20Timings( - NVT_DISPLAYID_2_0_INFO *pDisplayId20Info, + NVT_DISPLAYID_2_0_INFO *pDisplayId20Info, NvU32 timingIdx) { - // pDisplayId20Info parsed displayID20 info + // pDisplayId20Info parsed displayID20 info NVT_TIMING *pT= &pDisplayId20Info->timing[timingIdx]; - + nvt_assert(timingIdx <= COUNT(pDisplayId20Info->timing)); - + // rgb444 (always support 6bpc and 8bpc as per DP spec 5.1.1.1.1 RGB Colorimetry) UPDATE_BPC_FOR_COLORFORMAT(pT->etc.rgb444, 1, 1, @@ -1925,14 +1920,14 @@ updateColorFormatForDisplayId20Timings( pDisplayId20Info->interface_features.rgb444.bpc.bpc16); // yuv444 - UPDATE_BPC_FOR_COLORFORMAT(pT->etc.yuv444, 0, // yuv444 does not support 6bpc + UPDATE_BPC_FOR_COLORFORMAT(pT->etc.yuv444, 0, // yuv444 does not support 6bpc pDisplayId20Info->interface_features.yuv444.bpc.bpc8, pDisplayId20Info->interface_features.yuv444.bpc.bpc10, pDisplayId20Info->interface_features.yuv444.bpc.bpc12, pDisplayId20Info->interface_features.yuv444.bpc.bpc14, pDisplayId20Info->interface_features.yuv444.bpc.bpc16); // yuv422 - UPDATE_BPC_FOR_COLORFORMAT(pT->etc.yuv422, 0, // yuv422 does not support 6bpc + UPDATE_BPC_FOR_COLORFORMAT(pT->etc.yuv422, 0, // yuv422 does not support 6bpc pDisplayId20Info->interface_features.yuv422.bpc.bpc8, pDisplayId20Info->interface_features.yuv422.bpc.bpc10, pDisplayId20Info->interface_features.yuv422.bpc.bpc12, @@ -1942,7 +1937,7 @@ updateColorFormatForDisplayId20Timings( if (!NVT_DID20_TIMING_IS_CTA861(pT->etc.flag, pT->etc.status)) { // yuv420 - UPDATE_BPC_FOR_COLORFORMAT(pT->etc.yuv420, 0, // yuv420 does not support 6bpc + UPDATE_BPC_FOR_COLORFORMAT(pT->etc.yuv420, 0, // yuv420 does not support 6bpc pDisplayId20Info->interface_features.yuv420.bpc.bpc8, pDisplayId20Info->interface_features.yuv420.bpc.bpc10, pDisplayId20Info->interface_features.yuv420.bpc.bpc12, diff --git a/src/common/modeset/timing/nvt_dsc_pps.c b/src/common/modeset/timing/nvt_dsc_pps.c index a8793a816f..e1bba89b67 100644 --- a/src/common/modeset/timing/nvt_dsc_pps.c +++ b/src/common/modeset/timing/nvt_dsc_pps.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2017-2019 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -2093,13 +2093,21 @@ DSC_GeneratePPSWithSliceCountMask sliceArrayCount = sizeof(validSliceNum)/sizeof(NvU32); - maxSliceCount = MIN(pDscInfo->sinkCaps.maxNumHztSlices, pDscInfo->gpuCaps.maxNumHztSlices); + // For 2Head1OR mode, slice count supported by GPU is always 8. + maxSliceCount = MIN(pDscInfo->sinkCaps.maxNumHztSlices, + pModesetInfo->bDualMode ? 8U : pDscInfo->gpuCaps.maxNumHztSlices); // lineBufferSize is reported in 1024 units by HW, so need to multiply by 1024 to get pixels. maxSliceWidth = MIN(pDscInfo->sinkCaps.maxSliceWidth, pDscInfo->gpuCaps.lineBufferSize * 1024); gpuSliceCountMask = DSC_GetSliceCountMask(maxSliceCount, NV_TRUE /*bInclusive*/); + if (pModesetInfo->bDualMode) + { + // For DSC_DUAL, slice counts 1 and 6 are invalid. + gpuSliceCountMask &= ~(0x11); + } + commonSliceCountMask = gpuSliceCountMask & pDscInfo->sinkCaps.sliceCountSupportedMask; if (commonSliceCountMask == 0x0) @@ -2107,8 +2115,12 @@ DSC_GeneratePPSWithSliceCountMask return NVT_STATUS_DSC_SLICE_ERROR; } - if (pModesetInfo->colorFormat == NVT_COLOR_FORMAT_YCbCr422 || - pModesetInfo->colorFormat == NVT_COLOR_FORMAT_YCbCr420) + if ((pModesetInfo->colorFormat == NVT_COLOR_FORMAT_YCbCr422 && + ((pDscInfo->gpuCaps.encoderColorFormatMask & DSC_ENCODER_COLOR_FORMAT_Y_CB_CR_NATIVE_422) && + (pDscInfo->sinkCaps.decoderColorFormatMask & DSC_DECODER_COLOR_FORMAT_Y_CB_CR_NATIVE_422))) || + (pModesetInfo->colorFormat == NVT_COLOR_FORMAT_YCbCr420 && + ((pDscInfo->gpuCaps.encoderColorFormatMask & DSC_ENCODER_COLOR_FORMAT_Y_CB_CR_NATIVE_420) && + (pDscInfo->sinkCaps.decoderColorFormatMask & DSC_DECODER_COLOR_FORMAT_Y_CB_CR_NATIVE_420)))) { peakThroughPutIndex = pDscInfo->sinkCaps.peakThroughputMode1; } @@ -2149,7 +2161,7 @@ DSC_GeneratePPSWithSliceCountMask for(i = 0U ; i < sliceArrayCount; i++) { - if (possibleSliceCountMask & NVBIT(validSliceNum[i] - 1)) + if (possibleSliceCountMask & DSC_SliceCountMaskforSliceNum(validSliceNum[i])) { ppsOut = NULL; localDscInfo.forcedDscParams.sliceCount = validSliceNum[i]; @@ -2162,11 +2174,23 @@ DSC_GeneratePPSWithSliceCountMask // ppsOut = pps; } - if (DSC_GeneratePPS(&localDscInfo, pModesetInfo, pWARData, - availableBandwidthBitsPerSecond, &scratchBuffer, - ppsOut, pBitsPerPixelX16) == NVT_STATUS_SUCCESS) + status = DSC_GeneratePPS(&localDscInfo, pModesetInfo, pWARData, + availableBandwidthBitsPerSecond, &scratchBuffer, + ppsOut, pBitsPerPixelX16); + + if (status == NVT_STATUS_SUCCESS) { - validSliceCountMask |= NVBIT(validSliceNum[i] - 1); + // + // DPlib and PPSlib follows DP spec to set slice count indices + // in slice count mask. This mapping of index to slice count + // is not 1:1. For eg. slice count 8 corresponds to bit + // index 5 as per spec. PPSLib clients are spec agnostic + // and prefer indices to indicate corresponding slice count. + // For eg. slice count = 8 should be set at bit index 7. + // So while passing the mask back to clients, here we set + // corresponding bit index. + // + validSliceCountMask |= NVBIT32((validSliceNum[i]) - 1U); } } } @@ -2176,6 +2200,12 @@ DSC_GeneratePPSWithSliceCountMask return NVT_STATUS_PPS_SLICE_COUNT_ERROR; } + if (validSliceCountMask == 0U) + { + // Reason for failure with hightest possible slice count will be returned. + return status; + } + *pSliceCountMask = validSliceCountMask; return NVT_STATUS_SUCCESS; @@ -2270,8 +2300,8 @@ DSC_GeneratePPS case NVT_COLOR_FORMAT_YCbCr420: in->convert_rgb = 0; - if ((pDscInfo->gpuCaps.encoderColorFormatMask & DSC_ENCODER_COLOR_FORMAT_Y_CB_CR_NATIVE_422) && - (pDscInfo->sinkCaps.decoderColorFormatMask & DSC_DECODER_COLOR_FORMAT_Y_CB_CR_NATIVE_422)) + if ((pDscInfo->gpuCaps.encoderColorFormatMask & DSC_ENCODER_COLOR_FORMAT_Y_CB_CR_NATIVE_420) && + (pDscInfo->sinkCaps.decoderColorFormatMask & DSC_DECODER_COLOR_FORMAT_Y_CB_CR_NATIVE_420)) { in->native_420 = 1; } @@ -2477,6 +2507,9 @@ DSC_GeneratePPS if (in->native_422) { + // bits_per_pixel in PPS is defined as 5 fractional bits in native422 mode + in->bits_per_pixel *= 2; + if (in->dsc_version_minor == 1) { // Error! DSC1.1 can't support native422! @@ -2484,8 +2517,8 @@ DSC_GeneratePPS goto done; } //the bpp in native 422 mode is doubled. - if((((NvS32)(in->bits_per_pixel)) < (NvS32)(2*6*BPP_UNIT)) || - (((NvS32)(in->bits_per_pixel)) > (NvS32)(2*32*BPP_UNIT-1))) + if((((NvS32)(in->bits_per_pixel)) < (NvS32)(2*7*BPP_UNIT)) || + (((NvS32)(in->bits_per_pixel)) > (NvS32)(2*2*(in->bits_per_component)*BPP_UNIT-1))) { // ERROR - bits_per_pixelx16 outside valid range ret = NVT_STATUS_INVALID_BPP; diff --git a/src/common/modeset/timing/nvt_edid.c b/src/common/modeset/timing/nvt_edid.c index 0d199f51d7..0a31c6e339 100644 --- a/src/common/modeset/timing/nvt_edid.c +++ b/src/common/modeset/timing/nvt_edid.c @@ -1056,7 +1056,10 @@ NVT_STATUS NV_STDCALL NvTiming_ParseEDIDInfo(NvU8 *pEdid, NvU32 length, NVT_EDID parseCta861VsvdbBlocks(p861Info, pInfo, FROM_CTA861_EXTENSION); // parse HDR related information from the HDR static metadata data block - parseCea861HdrStaticMetadataDataBlock(p861Info, pInfo, FROM_CTA861_EXTENSION); + if (p861Info->valid.hdr_static_metadata != 0) + { + parseCta861HdrStaticMetadataDataBlock(p861Info, pInfo, FROM_CTA861_EXTENSION); + } // Timings are listed (or shall) be listed in priority order // So read SVD, yuv420 SVDs first before reading detailed timings diff --git a/src/common/modeset/timing/nvt_edidext_861.c b/src/common/modeset/timing/nvt_edidext_861.c index d614bae31a..5848eae79c 100644 --- a/src/common/modeset/timing/nvt_edidext_861.c +++ b/src/common/modeset/timing/nvt_edidext_861.c @@ -57,7 +57,7 @@ static const NVT_TIMING EIA861B[]= { // all 64 EIA/CEA-861E timings EIA_TIMING( 640, 16, 96, 800,'-', 480,10,2, 525,'-', 59940,'p', 4:3, 0x1, 1),//640 x 480p @59.94/60 (Format 1) - EIA_TIMING( 720, 16, 62, 858,'-', 480, 9,6, 525,'-', 59940,'p', 4:3, 0x1, 2),//720 x 480p @59.94/60 (Format 2) + EIA_TIMING( 720, 16, 62, 858,'-', 480, 9,6, 525,'-', 59940,'p', 4:3, 0x1, 2),//720 x 480p @59.94/60 (Format 2) EIA_TIMING( 720, 16, 62, 858,'-', 480, 9,6, 525,'-', 59940,'p',16:9, 0x1, 3),//720 x 480p @59.94/60 (Format 3) EIA_TIMING(1280, 110, 40,1650,'+', 720, 5,5, 750,'+', 59940,'p',16:9, 0x1, 4),//1280 x 720p @59.94/60 (Format 4) EIA_TIMING(1920, 88, 44,2200,'+', 540, 2,5, 562,'+', 59940,'i',16:9, 0x1, 5),//1920 x 1080i @59.94/60 (Format 5) @@ -170,7 +170,7 @@ static const NVT_TIMING EIA861B[]= EIA_TIMING(1680, 810, 40, 2750,'+', 720, 5, 5, 750,'+', 47950,'p', 64:27, 0x1,110),//1680 x 720p @47.95/48 (Format 110) EIA_TIMING(1920, 638, 44, 2750,'+',1080, 4, 5,1125,'+', 47950,'p', 16:9, 0x1,111),//1920 x 1080p @47.95/48 (Format 111) EIA_TIMING(1920, 638, 44, 2750,'+',1080, 4, 5,1125,'+', 47950,'p', 64:27, 0x1,112),//1920 x 1080p @47.95/48 (Format 112) - EIA_TIMING(2560, 998, 44, 3750,'+',1080, 4, 5,1100,'+', 47950,'p', 64:27, 0x1,113),//2560 x 1080p @47.95/48 (Format 113) + EIA_TIMING(2560, 998, 44, 3750,'+',1080, 4, 5,1100,'+', 47950,'p', 64:27, 0x1,113),//2560 x 1080p @47.95/48 (Format 113) EIA_TIMING(3840,1276, 88, 5500,'+',2160, 8,10,2250,'+', 47950,'p', 16:9, 0x1,114),//3840 x 2160p @47.95/48 (Format 114) EIA_TIMING(4096,1020, 88, 5500,'+',2160, 8,10,2250,'+', 47950,'p',256:135, 0x1,115),//4096 x 2160p @47.95/48 (Format 115) EIA_TIMING(3840,1276, 88, 5500,'+',2160, 8,10,2250,'+', 47950,'p', 64:27, 0x1,116),//3840 x 2160p @47.95/48 (Format 116) @@ -181,11 +181,11 @@ static const NVT_TIMING EIA861B[]= EIA_TIMING(5120,1996, 88, 7500,'+',2160, 8,10,2200,'+', 23976,'p', 64:27, 0x1,121),//5120 x 2160p @23.98/24 (Format 121) EIA_TIMING(5120,1696, 88, 7200,'+',2160, 8,10,2200,'+', 25000,'p', 64:27, 0x1,122),//5120 x 2160p @25 (Format 122) EIA_TIMING(5120, 664, 88, 6000,'+',2160, 8,10,2200,'+', 29970,'p', 64:27, 0x1,123),//5120 x 2160p @29.97/30 (Format 123) - EIA_TIMING(5120, 746, 88, 6250,'+',2160, 8,10,2475,'+', 47950,'p', 64:27, 0x1,124),//5120 x 2160p @47.95/48 (Format 124) - EIA_TIMING(5120,1096, 88, 6600,'+',2160, 8,10,2250,'+', 50000,'p', 64:27, 0x1,125),//5120 x 2160p @50 (Format 125) - EIA_TIMING(5120, 164, 88, 5500,'+',2160, 8,10,2250,'+', 59940,'p', 64:27, 0x1,126),//5120 x 2160p @59.94/60 (Format 126) + EIA_TIMING(5120, 746, 88, 6250,'+',2160, 8,10,2475,'+', 47950,'p', 64:27, 0x1,124),//5120 x 2160p @47.95/48 (Format 124) + EIA_TIMING(5120,1096, 88, 6600,'+',2160, 8,10,2250,'+', 50000,'p', 64:27, 0x1,125),//5120 x 2160p @50 (Format 125) + EIA_TIMING(5120, 164, 88, 5500,'+',2160, 8,10,2250,'+', 59940,'p', 64:27, 0x1,126),//5120 x 2160p @59.94/60 (Format 126) EIA_TIMING(5120,1096, 88, 6600,'+',2160, 8,10,2250,'+',100000,'p', 64:27, 0x1,127),//5120 x 2160p @100 (Format 127) - // VIC 128-192 are Forbidden and should be never used. But to simplify the SVD access, put a default timing here. + // VIC 128-192 are Forbidden and should be never used. But to simplify the SVD access, put a default timing here. // We can remove these after adding a function to access CEA Timings. EIA_TIMING( 640, 16, 96, 800,'-', 480,10,2, 525,'-', 59940,'p', 4:3, 0x1, 0),//640 x 480p @59.94/60 //Forbidden (Format 128) EIA_TIMING( 640, 16, 96, 800,'-', 480,10,2, 525,'-', 59940,'p', 4:3, 0x1, 0),//640 x 480p @59.94/60 //Forbidden (Format 129) @@ -287,7 +287,7 @@ static const NVT_TIMING EIA861B[]= static NvU32 MAX_CEA861B_FORMAT = sizeof(EIA861B)/sizeof(EIA861B[0]) - 1; static const NvU32 EIA861B_DUAL_ASPECT_VICS[][2] = -{ +{ { 2, 3 }, // 720x480p 59.94Hz/60Hz { 4, 69 }, // 1280x720p 59.94Hz/60Hz { 6, 7 }, // 720(1440)x480i 59.94Hz/60Hz @@ -321,7 +321,7 @@ static const NvU32 EIA861B_DUAL_ASPECT_VICS[][2] = { 50, 51 }, // 720(1440)x480i 119.88/120Hz { 52, 53 }, // 720x576p 200Hz - { 54, 55 }, // 720(1440)x576i 200Hz + { 54, 55 }, // 720(1440)x576i 200Hz { 56, 57 }, // 720x480p 239.76/240Hz { 58, 59 }, // 720(1440)x480i 239.76/240Hz @@ -375,7 +375,7 @@ static const NVT_RID_CODES RID[] = static NvU32 MAX_RID_CODES_COUNT = sizeof(RID) / sizeof(RID[0]) - 1; // RID to VIC Mapping -static const NvU8 RID_VIC_MAP[][8] = +static const NvU8 RID_VIC_MAP[][8] = { { 0, 0, 0, 0, 0, 0, 0, 0 }, { 60, 61, 62, 108, 19, 4, 41, 47 }, // RID 01 @@ -408,7 +408,7 @@ static const NvU8 RID_VIC_MAP[][8] = }; // All the frame rate supported in VF -static const NvU16 VF_FRAME_RATE[] = +static const NvU16 VF_FRAME_RATE[] = { 0, 24, 25, 30, 48, 50, 60, 100, 120, 144, 200, 240, 300, 360, 400, 480 }; @@ -436,9 +436,9 @@ static const NVT_TIMING HDMI_EXT_4Kx2K_TIMING[]= }; static NvU32 MAX_HDMI_EXT_4Kx2K_FORMAT = sizeof(HDMI_EXT_4Kx2K_TIMING)/sizeof(HDMI_EXT_4Kx2K_TIMING[0]) - 1; -// HDMI 1.4a mandatory 3D video formats. +// HDMI 1.4a mandatory 3D video formats. // From HDMI 1.4a specification page 147 of 201, table 8-15. And HDMI 1.4a Complaince test specification page 190. -static const HDMI3DDETAILS HDMI_MANDATORY_3D_FORMATS[] = +static const HDMI3DDETAILS HDMI_MANDATORY_3D_FORMATS[] = { {32, NVT_HDMI_3D_SUPPORTED_FRAMEPACK_MASK | NVT_HDMI_3D_SUPPORTED_TOPBOTTOM_MASK, 0}, // 1920 x 1080p @ 24 Hz { 4, NVT_HDMI_3D_SUPPORTED_FRAMEPACK_MASK | NVT_HDMI_3D_SUPPORTED_TOPBOTTOM_MASK, 0}, // 1280 x 720p @ 60 Hz @@ -451,9 +451,9 @@ static const NVT_VIDEO_INFOFRAME DEFAULT_VIDEO_INFOFRAME = {/*header*/2,2,13, /* static const NVT_AUDIO_INFOFRAME DEFAULT_AUDIO_INFOFRAME = {/*header*/4,1,10, /*byte1*/0, /*byte2*/0, /*byte3*/0, /*byte*/0, /*byte5*/0, /*byte6~10*/0,0,0,0,0}; CODE_SEGMENT(PAGE_DD_CODE) -static NvU8 +static NvU8 getExistedCTATimingSeqNumber( - NVT_EDID_INFO *pInfo, + NVT_EDID_INFO *pInfo, enum NVT_TIMING_TYPE timingType) { NvU8 count = 0; @@ -501,7 +501,7 @@ static NvBool isVFDRefreshRate(NvU8 vfdSize, NvU8 *vfd, NvU8 rateIdx) rid = ((const VFD_ONE_BYTE*)vfd)->rid; if (rid == 0) return NV_FALSE; - + bBFR50 = ((const VFD_ONE_BYTE*)vfd)->bfr50; // frame rate factor // If Byte 2 is not present in the VFD, flags 0.5X, 1X and BFR60 shall be considered set @@ -511,15 +511,15 @@ static NvBool isVFDRefreshRate(NvU8 vfdSize, NvU8 *vfd, NvU8 rateIdx) // individual frame rate bFR24 = ((const VFD_ONE_BYTE*)vfd)->fr24; if (rr == 24) return bFR24; - + // individual frame rate bFR48 = vfdSize > 2 ? ((const VFD_THREE_BYTE*)vfd)->fr48 : 0; if (rr == 48) return bFR48; - + // individual frame rate bFR144 = vfdSize > 1 ? ((const VFD_TWO_BYTE*)vfd)->fr144 : 0; if (rr == 144) return bFR144; - + if (rr % (50/2) == 0) { if (!bBFR50) return NV_FALSE; @@ -541,7 +541,7 @@ static NvBool isVFDRefreshRate(NvU8 vfdSize, NvU8 *vfd, NvU8 rateIdx) break; } } - + return NV_FALSE; } @@ -607,7 +607,7 @@ void parse861bShortTiming(NVT_EDID_CEA861_INFO *pExt861, NVT_DISPLAYID_2_0_INFO *pDisplayID20 = NULL; NvU8 *pVic = pExt861->video; - NvU32 total_svd = pExt861->total_svd; + NvU32 total_svd = pExt861->total_svd; NvU8 *pYuv420Map = pExt861->valid.y420cmdb ? pExt861->map_y420cmdb : NULL; NvU8 yuv420MapCount = pExt861->total_y420cmdb; @@ -629,7 +629,7 @@ void parse861bShortTiming(NVT_EDID_CEA861_INFO *pExt861, for (i = 0; i < total_svd; i++) { vic = NVT_GET_CTA_8BIT_VIC(pVic[i]); - + if (vic == 0 || vic > MAX_CEA861B_FORMAT) continue; @@ -637,12 +637,12 @@ void parse861bShortTiming(NVT_EDID_CEA861_INFO *pExt861, newTiming = EIA861B[vic-1]; newTiming.etc.status = NVT_STATUS_EDID_861STn(vic); - // set CEA format to location of _CEA_FORMAT. _CEA_FORMAT isn't set in pre-defined CE timing from + // set CEA format to location of _CEA_FORMAT. _CEA_FORMAT isn't set in pre-defined CE timing from // EIA861B table if (NVT_GET_TIMING_STATUS_SEQ(newTiming.etc.status) != NVT_CEA861_640X480P_59940HZ_4X3) { - // Although IT 640x480 video timing has a CE id, it is not a CE timing. See 3.1 + // Although IT 640x480 video timing has a CE id, it is not a CE timing. See 3.1 // "General Video Format Requirements" section in CEA-861-E spec NVT_SET_CEA_FORMAT(newTiming.etc.status, NVT_GET_TIMING_STATUS_SEQ(newTiming.etc.status)); @@ -650,7 +650,7 @@ void parse861bShortTiming(NVT_EDID_CEA861_INFO *pExt861, // calculate the pixel clock newTiming.pclk = RRx1kToPclk(&newTiming); - + if ((vic <= 64) && (pVic[i] & NVT_CTA861_VIDEO_NATIVE_MASK)) { NVT_SET_NATIVE_TIMING_FLAG(newTiming.etc.status); @@ -716,7 +716,7 @@ void parseCta861VideoFormatDataBlock(NVT_EDID_CEA861_INFO *pExt861, void *pRawIn NvU8 eachOfDescSize = 0; NvU32 width = 0; NvU32 height = 0; - + const VFD_ONE_BYTE *pVFDOneByte = 0 ; NVT_TIMING newTiming; @@ -728,7 +728,7 @@ void parseCta861VideoFormatDataBlock(NVT_EDID_CEA861_INFO *pExt861, void *pRawIn if (eachOfDescSize == 0) { - nvt_assert(0 && "Video Format Descriptor length is 0!\n"); + // Video Format Descriptor length is 0!; return; } @@ -743,23 +743,23 @@ void parseCta861VideoFormatDataBlock(NVT_EDID_CEA861_INFO *pExt861, void *pRawIn pVFDOneByte = (const VFD_ONE_BYTE *)&pExt861->vfdb[vfdb_idx].video_format_desc[i*eachOfDescSize]; - /* + /* * If any of the following is true, then the RID shall be set to 0: * 1. If a Video Format not listed in "Table 12 - Resolution Identification (RID) is sent * 2. if a Video Format with Frame Rates not listed in "Table 13 - AVI InfoFrame Video Format Frame Rate" is sent * 3. if a Video Format listed in "Table 14 - RID To VIC Mapping" is sent. */ - // For 1. + // For 1. if ((pVFDOneByte->rid & NVT_CTA861_VF_RID_MASK) == 0 || pVFDOneByte->rid > MAX_RID_CODES_COUNT) { - nvt_assert(0 && "shall have a non-zero RID value or RID code value larger than 28"); + // shall have a non-zero RID value or RID code value larger than 28 continue; } width = RID[pVFDOneByte->rid].HVisible; height = RID[pVFDOneByte->rid].VVisible; - // If the Source is sending a Video Format that can be indicated by RID and FR, + // If the Source is sending a Video Format that can be indicated by RID and FR, // and is not listed in Table 14 (RID to VIC), then it shall set the RID and FR fields to the proper codes for (rateIdx = 1; rateIdx <= MAX_VF_FRAME_RATE_COUNT; rateIdx++) { @@ -783,9 +783,9 @@ void parseCta861VideoFormatDataBlock(NVT_EDID_CEA861_INFO *pExt861, void *pRawIn if (NvTiming_CalcOVT(width, height, VF_FRAME_RATE[rateIdx], &newTiming) == NVT_STATUS_SUCCESS) { if (pExt861->vfdb[vfdb_idx].info.y420 && newTiming.pclk > NVT_HDMI_YUV_420_PCLK_SUPPORTED_MIN) - { - UPDATE_BPC_FOR_COLORFORMAT(newTiming.etc.yuv420, 0, 1, - pInfo->hdmiForumInfo.dc_30bit_420, + { + UPDATE_BPC_FOR_COLORFORMAT(newTiming.etc.yuv420, 0, 1, + pInfo->hdmiForumInfo.dc_30bit_420, pInfo->hdmiForumInfo.dc_36bit_420, 0, pInfo->hdmiForumInfo.dc_48bit_420); } @@ -806,7 +806,7 @@ void parseCta861VideoFormatDataBlock(NVT_EDID_CEA861_INFO *pExt861, void *pRawIn (int)newTiming.etc.rrx1k%1000, (newTiming.interlaced ? "I":"P")); newTiming.etc.name[sizeof(newTiming.etc.name) - 1] = '\0'; - if (!assignNextAvailableTiming(pInfo, &newTiming)) + if (!assignNextAvailableTiming(pInfo, &newTiming)) { continue; } @@ -850,7 +850,7 @@ void parse861bShortYuv420Timing(NVT_EDID_CEA861_INFO *pExt861, pHfvs = &pDisplayID20->vendor_specific.hfvs; total_timings = pDisplayID20->total_timings; } - else + else { return; } @@ -863,13 +863,13 @@ void parse861bShortYuv420Timing(NVT_EDID_CEA861_INFO *pExt861, for (i = 0; i < total_y420vdb; i++) { vic = NVT_GET_CTA_8BIT_VIC(pYuv420Vic[i]); - + if (vic == 0 || vic > MAX_CEA861B_FORMAT) continue; // assign corresponding CEA format's timing from pre-defined CE timing table, EIA861B newTiming = EIA861B[vic-1]; - + // if yuv420 is supported in the video SVDs, it is indicated by yuv420vdb if(total_svd > 0) { @@ -896,7 +896,7 @@ void parse861bShortYuv420Timing(NVT_EDID_CEA861_INFO *pExt861, { bFound = NV_TRUE; // we found one in pExt861->video[]. pHfvs->dcXXX are only for YCbCr420, so we can support: - // 1. 8bpc yuv420 always supported. + // 1. 8bpc yuv420 always supported. // 2. only add yuv420 and its deep colour caps into Video Data Block UPDATE_BPC_FOR_COLORFORMAT(timing->etc.yuv420, 0, 1, pHfvs->dc_30bit_420, @@ -906,18 +906,18 @@ void parse861bShortYuv420Timing(NVT_EDID_CEA861_INFO *pExt861, } } } - } + } if (bFound) continue; } newTiming.etc.status = NVT_STATUS_EDID_861STn(vic); - // set CEA format to location of _CEA_FORMAT. _CEA_FORMAT isn't set in pre-defined CE timing from + // set CEA format to location of _CEA_FORMAT. _CEA_FORMAT isn't set in pre-defined CE timing from // EIA861B table if (NVT_GET_TIMING_STATUS_SEQ(newTiming.etc.status) != NVT_CEA861_640X480P_59940HZ_4X3) { - // Although IT 640x480 video timing has a CE id, it is not a CE timing. See 3.1 + // Although IT 640x480 video timing has a CE id, it is not a CE timing. See 3.1 // "General Video Format Requirements" section in CEA-861-E spec NVT_SET_CEA_FORMAT(newTiming.etc.status, NVT_GET_TIMING_STATUS_SEQ(newTiming.etc.status)); @@ -926,7 +926,7 @@ void parse861bShortYuv420Timing(NVT_EDID_CEA861_INFO *pExt861, // calculate the pixel clock newTiming.pclk = RRx1kToPclk(&newTiming); - // From CTA-861-F: By default, Y420VDB SVDs, when present in the EDID, shall be less preferred than all regular Video Data Block SVDs. + // From CTA-861-F: By default, Y420VDB SVDs, when present in the EDID, shall be less preferred than all regular Video Data Block SVDs. // So it should use normal VIC code without native flag. //if ((vic <= 64) && (pVic[i] & NVT_CTA861_VIDEO_NATIVE_MASK)) //{ @@ -962,7 +962,7 @@ void parse861bShortYuv420Timing(NVT_EDID_CEA861_INFO *pExt861, if (assignNextAvailableDisplayId20Timing(pDisplayID20, &newTiming)) { - + break; } } @@ -1001,7 +1001,7 @@ void parseCta861NativeOrPreferredTiming(NVT_EDID_CEA861_INFO *pExt861, { pDisplayID20 = (NVT_DISPLAYID_2_0_INFO *)pRawInfo; } - else + else { return; } @@ -1040,25 +1040,25 @@ void parseCta861NativeOrPreferredTiming(NVT_EDID_CEA861_INFO *pExt861, // Reserved if (svr == 0 || svr == 128 || (svr >= 176 && svr <= 192) || svr == 255) continue; - + // Interpret as the Kth 18-byte DTD, where K = SVR - 128 (for K = 1 to 16) in both base0 and CTA block if (svr >= 129 && svr <= 144) { kth = svr - 128; - // only base EDID and CTA861 can support 18bytes + // only base EDID and CTA861 can support 18bytes if (flag == FROM_CTA861_EXTENSION) { for (j = 0; j < pInfo->total_timings; j++) { if (kth <= DTDCount) { - if (NVT_IS_DTDn(pInfo->timing[j].etc.status, kth)) + if (NVT_IS_DTDn(pInfo->timing[j].etc.status, kth)) break; } else { extKth = kth - DTDCount; - if (NVT_IS_EXT_DTDn(pInfo->timing[j].etc.status, extKth)) + if (NVT_IS_EXT_DTDn(pInfo->timing[j].etc.status, extKth)) break; } } @@ -1084,7 +1084,7 @@ void parseCta861NativeOrPreferredTiming(NVT_EDID_CEA861_INFO *pExt861, extKth = kth - DIDT7Count; // pick the T10 CVT-based timing then if (NVT_IS_CTA861_DID_T10n(pInfo->timing[j].etc.status, extKth)) break; - } + } } } } @@ -1121,7 +1121,7 @@ void parseCta861NativeOrPreferredTiming(NVT_EDID_CEA861_INFO *pExt861, } } else // assign corresponding CEA format's timing from pre-defined CE timing table, EIA861B - { + { // ( SVR >= 1 and SVR <= 127) and (SVR >= 193 and SVR <= 253) vic = NVT_GET_CTA_8BIT_VIC(svr); preferTiming = EIA861B[vic-1]; @@ -1129,14 +1129,14 @@ void parseCta861NativeOrPreferredTiming(NVT_EDID_CEA861_INFO *pExt861, if (flag == FROM_CTA861_EXTENSION || flag == FROM_DISPLAYID_13_DATA_BLOCK) { for (j = 0; j < pInfo->total_timings; j++) - { + { isMatch = NvTiming_IsTimingExactEqual(&pInfo->timing[j], &preferTiming); if (isMatch && (NVT_GET_TIMING_STATUS_TYPE(pInfo->timing[j].etc.status) == NVT_TYPE_EDID_861ST)) break; - } + } } - else if (flag == FROM_DISPLAYID_20_DATA_BLOCK) - { + else if (flag == FROM_DISPLAYID_20_DATA_BLOCK) + { for (j = 0; j < pDisplayID20->total_timings; j++) { isMatch = NvTiming_IsTimingExactEqual(&pDisplayID20->timing[j], &preferTiming); @@ -1164,7 +1164,7 @@ void parseCta861NativeOrPreferredTiming(NVT_EDID_CEA861_INFO *pExt861, } CODE_SEGMENT(PAGE_DD_CODE) -void parseCea861HdrStaticMetadataDataBlock(NVT_EDID_CEA861_INFO *pExt861, +void parseCta861HdrStaticMetadataDataBlock(NVT_EDID_CEA861_INFO *pExt861, void *pRawInfo, NVT_CTA861_ORIGIN flag) { @@ -1215,10 +1215,6 @@ void parseCea861HdrStaticMetadataDataBlock(NVT_EDID_CEA861_INFO *pExt861, { pHdrInfo->static_metadata_type = 1; } - else - { - pHdrInfo->static_metadata_type = 0; - } pHdrInfo->max_cll = pExt861->hdr_static_metadata.byte3 & NVT_CEA861_MAX_CLL_MASK; pHdrInfo->max_fall = pExt861->hdr_static_metadata.byte4 & NVT_CEA861_MAX_FALL_MASK; @@ -1338,7 +1334,7 @@ void parseCta861DvStaticMetadataDataBlock(VSVDB_DATA* pVsvdb, NVT_DV_STATIC_META { return; } - + break; case 2: if (pVsvdb->vendor_data_size < sizeof(NVT_DV_STATIC_METADATA_TYPE2)) @@ -1363,7 +1359,7 @@ void parseCta861DvStaticMetadataDataBlock(VSVDB_DATA* pVsvdb, NVT_DV_STATIC_META pDvInfo->cc_red_x = NVT_DOLBY_CHROMATICITY_MSB_RX | pDvType2->unique_Rx; pDvInfo->cc_red_y = NVT_DOLBY_CHROMATICITY_MSB_RY | pDvType2->unique_Ry; pDvInfo->supports_10b_12b_444 = pDvType2->supports_10b_12b_444_bit0 | (pDvType2->supports_10b_12b_444_bit1 << 1); - pDvInfo->colorimetry = 0; + pDvInfo->colorimetry = 0; pDvInfo->supports_2160p60hz = 0; pDvInfo->cc_white_x = 0; pDvInfo->cc_white_y = 0; @@ -1376,24 +1372,24 @@ void parseCta861DvStaticMetadataDataBlock(VSVDB_DATA* pVsvdb, NVT_DV_STATIC_META // find both hdmi llc and hdmi forum vendor specific data block and return basic hdmi information CODE_SEGMENT(PAGE_DD_CODE) void parseCta861VsdbBlocks(NVT_EDID_CEA861_INFO *pExt861, - void *pRawInfo, + void *pRawInfo, NVT_CTA861_ORIGIN flag ) { NvU32 i; - + NVT_EDID_INFO *pInfo = NULL; NVT_DISPLAYID_2_0_INFO *pDisplayID20 = NULL; NVT_HDMI_LLC_INFO *pHdmiLlc = NULL; NVT_HDMI_FORUM_INFO *pHfvs = NULL; NVDA_VSDB_PARSED_INFO *pNvVsdb = NULL; MSFT_VSDB_PARSED_INFO *pMsftVsdb = NULL; - + if (pExt861 == NULL || pRawInfo == NULL) { return; } - + if (flag == FROM_CTA861_EXTENSION || flag == FROM_DISPLAYID_13_DATA_BLOCK) { pInfo = (NVT_EDID_INFO *)pRawInfo; @@ -1410,7 +1406,7 @@ void parseCta861VsdbBlocks(NVT_EDID_CEA861_INFO *pExt861, pNvVsdb = &pDisplayID20->vendor_specific.nvVsdb; pMsftVsdb = &pDisplayID20->vendor_specific.msftVsdb; } - else + else { return; } @@ -1430,7 +1426,7 @@ void parseCta861VsdbBlocks(NVT_EDID_CEA861_INFO *pExt861, parseEdidHdmiLlcBasicInfo((VSDB_DATA *)(&pExt861->vsdb[i]), pHdmiLlc); pExt861->valid.H14B_VSDB = 1; break; - + case NVT_CEA861_HDMI_FORUM_IEEE_ID: parseEdidHdmiForumVSDB((VSDB_DATA *)(&pExt861->vsdb[i]), pHfvs); pExt861->valid.H20_HF_VSDB = 1; @@ -1449,7 +1445,7 @@ void parseCta861VsdbBlocks(NVT_EDID_CEA861_INFO *pExt861, } } - // H20_HF_VSDB shall be listed only if H14B_VSDB is also listed + // H20_HF_VSDB shall be listed only if H14B_VSDB is also listed // H20_HF_VSDB should not specify > 600MHz nvt_assert(!pExt861->valid.H20_HF_VSDB || (pExt861->valid.H14B_VSDB && (pHfvs->max_TMDS_char_rate <= 0x78))); @@ -1467,7 +1463,7 @@ void parseCta861VsdbBlocks(NVT_EDID_CEA861_INFO *pExt861, // Pick updated TMDS clock rate pHdmiLlc->effective_tmds_clock = (pExt861->valid.H20_HF_VSDB) ? - MAX(pHdmiLlc->max_tmds_clock, pHfvs->max_TMDS_char_rate) : + MAX(pHdmiLlc->max_tmds_clock, pHfvs->max_TMDS_char_rate) : MIN(pHdmiLlc->max_tmds_clock, 0x44); } @@ -1476,22 +1472,22 @@ void parseCta861VsdbBlocks(NVT_EDID_CEA861_INFO *pExt861, // parse vendor specific video data block (VSVDB) information CODE_SEGMENT(PAGE_DD_CODE) void parseCta861VsvdbBlocks(NVT_EDID_CEA861_INFO *pExt861, - void *pRawInfo, + void *pRawInfo, NVT_CTA861_ORIGIN flag ) { NvU32 i; - + NVT_EDID_INFO *pInfo = NULL; NVT_DISPLAYID_2_0_INFO *pDisplayID20 = NULL; NVT_DV_STATIC_METADATA *pDvInfo = NULL; NVT_HDR10PLUS_INFO *pHdr10PlusInfo = NULL; - + if (pExt861 == NULL || pRawInfo == NULL) { return; } - + if (flag == FROM_CTA861_EXTENSION || flag == FROM_DISPLAYID_13_DATA_BLOCK) { pInfo = (NVT_EDID_INFO *)pRawInfo; @@ -1504,7 +1500,7 @@ void parseCta861VsvdbBlocks(NVT_EDID_CEA861_INFO *pExt861, pDvInfo = &pDisplayID20->cta.dvInfo; pHdr10PlusInfo = &pDisplayID20->cta.hdr10PlusInfo; } - else + else { return; } @@ -1524,7 +1520,7 @@ void parseCta861VsvdbBlocks(NVT_EDID_CEA861_INFO *pExt861, parseCta861DvStaticMetadataDataBlock(&pExt861->vsvdb[i], pDvInfo); pExt861->valid.dv_static_metadata = 1; break; - + case NVT_CEA861_HDR10PLUS_IEEE_ID: // parse HDR10+ related information from the HDR10+ LLC Vendor Specific Video Data Block parseCta861Hdr10PlusDataBlock(&pExt861->vsvdb[i], pHdr10PlusInfo); @@ -1617,12 +1613,12 @@ NVT_STATUS get861ExtInfo(NvU8 *p, NvU32 size, NVT_EDID_CEA861_INFO *p861info) } // make sure we have 861 extension - if (p[0] != 0x2 || p[1] < NVT_CEA861_REV_ORIGINAL) + if (p[0] != 0x2 || p[1] < NVT_CEA861_REV_ORIGINAL) { return NVT_STATUS_ERR; } - // DTD offset sanity check + // DTD offset sanity check if (p[2] >= 1 && p[2] <= 3) { return NVT_STATUS_ERR; @@ -1639,7 +1635,7 @@ NVT_STATUS get861ExtInfo(NvU8 *p, NvU32 size, NVT_EDID_CEA861_INFO *p861info) // get the revision number p861info->revision = p[1]; - + // no extra info for 861-original, returning from here if (p861info->revision == NVT_CEA861_REV_ORIGINAL) { @@ -1668,8 +1664,8 @@ NVT_STATUS get861ExtInfo(NvU8 *p, NvU32 size, NVT_EDID_CEA861_INFO *p861info) // 1. get the 861 extension tags info // 2. or validation purpose if p861info == NULL CODE_SEGMENT(PAGE_DD_CODE) -NVT_STATUS parseCta861DataBlockInfo(NvU8 *p, - NvU32 size, +NVT_STATUS parseCta861DataBlockInfo(NvU8 *p, + NvU32 size, NVT_EDID_CEA861_INFO *p861info) { NvU32 i, j; @@ -1696,13 +1692,13 @@ NVT_STATUS parseCta861DataBlockInfo(NvU8 *p, payload = NVT_CEA861_GET_SHORT_DESCRIPTOR_SIZE(p[i]); /*don't allow data colleciton totally size larger than [127 - 5 (tag, revision, offset, describing native video format, checksum)]*/ - if ((i + payload > size) || (i + payload > 122)) + if ((i + payload > size) || (i + payload > 122)) { break; } // move the pointer to the payload section or extended Tag Code i++; - + // NvTiming_EDIDValidationMask will use the different tag/payload value to make sure each of cta861 data block legal if (p861info == NULL) { @@ -1723,7 +1719,7 @@ NVT_STATUS parseCta861DataBlockInfo(NvU8 *p, case NVT_CEA861_TAG_EXTENDED_FLAG: if (payload >= 1) { - ext_tag = p[i]; + ext_tag = p[i]; if (ext_tag == NVT_CEA861_EXT_TAG_VIDEO_CAP && (payload != 2)) return NVT_STATUS_ERR; else if (ext_tag == NVT_CEA861_EXT_TAG_COLORIMETRY && payload != 3) return NVT_STATUS_ERR; else if (ext_tag == NVT_CEA861_EXT_TAG_VIDEO_FORMAT_PREFERENCE && payload < 2) return NVT_STATUS_ERR; @@ -1740,7 +1736,7 @@ NVT_STATUS parseCta861DataBlockInfo(NvU8 *p, { if (payload != 2 && payload != 3 && payload != 7) return NVT_STATUS_ERR; } - + if (payload > 2) { if (ext_tag == NVT_CTA861_EXT_TAG_DID_TYPE_VII) @@ -1758,7 +1754,7 @@ NVT_STATUS parseCta861DataBlockInfo(NvU8 *p, else if (ext_tag == NVT_CTA861_EXT_TAG_DID_TYPE_X) { if ((p[i+1] & 0x7) != 0) return NVT_STATUS_ERR; // Block Revision shall be 0 - if (((p[i+1] & 0x70) >> 4 == 0) && (payload-2) % 6) return NVT_STATUS_ERR; // supported 6-bytes descriptors + if (((p[i+1] & 0x70) >> 4 == 0) && (payload-2) % 6) return NVT_STATUS_ERR; // supported 6-bytes descriptors if (((p[i+1] & 0x70) >> 4 == 1) && (payload-2) % 7) return NVT_STATUS_ERR; // supported 7-bytes descriptors } } @@ -1839,7 +1835,7 @@ NVT_STATUS parseCta861DataBlockInfo(NvU8 *p, p861info->vsdb[vendor_index].vendor_data_size = payload - 3; - // move the pointer to the payload + // move the pointer to the vsdb payload i += 3; // get the other vendor specific data @@ -2001,7 +1997,7 @@ NVT_STATUS parseCta861DataBlockInfo(NvU8 *p, else { // skip the extended block that we don't have a room for, - // the NVT_CEA861_VSVDB_MAX_BLOCKS should be incremented for new VSVDB types + // the NVT_CEA861_VSVDB_MAX_BLOCKS should be incremented for new VSVDB types nvt_assert(vsvdb_index >= NVT_CEA861_VSVDB_MAX_BLOCKS); i += payload; } @@ -2037,14 +2033,14 @@ NVT_STATUS parseCta861DataBlockInfo(NvU8 *p, i++; payload--; p861info->did_type7_data_block[didT7_index].version.revision = p[i] & 0x07; p861info->did_type7_data_block[didT7_index].version.dsc_pt = (p[i] & 0x08) >> 3; - p861info->did_type7_data_block[didT7_index].version.t7_m = (p[i] & 0x70) >> 4; + p861info->did_type7_data_block[didT7_index].version.t7_m = (p[i] & 0x70) >> 4; //do not consider Byte 3 i++; payload--; - p861info->did_type7_data_block[didT7_index].total_descriptors = + p861info->did_type7_data_block[didT7_index].total_descriptors = (NvU8)(payload / (NVT_CTA861_DID_TYPE7_DESCRIPTORS_LENGTH + p861info->did_type7_data_block[didT7_index].version.t7_m)); - + for (j = 0; j < payload; j++, i++) { p861info->did_type7_data_block[didT7_index].payload[j] = p[i]; @@ -2069,7 +2065,7 @@ NVT_STATUS parseCta861DataBlockInfo(NvU8 *p, p861info->did_type8_data_block[didT8_index].total_descriptors = (NvU8)payload; else if (p861info->did_type8_data_block[didT8_index].version.tcs == 1) p861info->did_type8_data_block[didT8_index].total_descriptors = (NvU8)(payload / 2); - + for (j = 0; j < payload; j++, i++) { p861info->did_type8_data_block[didT8_index].payload[j] = p[i]; @@ -2107,7 +2103,7 @@ NVT_STATUS parseCta861DataBlockInfo(NvU8 *p, // Sinks will expose HF-SCDB if they do not expose HF-VSDB. // move pointer to SCDS - i += 3; + i += 3; // Copy SCDS over to p861info->vsdb[vendor_index]. Parsing will later be handled in parseEdidHdmiForumVSDB(). for (j = 0; (j < payload - 3) && (j < NVT_CTA861_EXT_SCDB_PAYLOAD_MAX_LENGTH); j ++, i ++) @@ -2140,7 +2136,7 @@ NVT_STATUS parseCta861DataBlockInfo(NvU8 *p, } } - if (p861info) + if (p861info) { p861info->total_vsdb = (NvU8)vendor_index; } @@ -2175,7 +2171,7 @@ NVT_STATUS NvTiming_EnumCEA861bTiming(NvU32 ceaFormat, NVT_TIMING *pT) } -// Check whether the given timing is a CEA 861 timing. +// Check whether the given timing is a CEA 861 timing. CODE_SEGMENT(PAGE_DD_CODE) NvU32 NvTiming_GetCEA861TimingIndex (NVT_TIMING *pT) { @@ -2199,7 +2195,7 @@ NvU32 NvTiming_GetCEA861TimingIndex (NVT_TIMING *pT) aspect_y = nvt_aspect_y(pT->etc.aspect); // loop through the pre-defined CEA 861 table - // Skip VIC1 - Although IT 640x480 video timing has a CE id, it is not a CE timing. See 3.1 + // Skip VIC1 - Although IT 640x480 video timing has a CE id, it is not a CE timing. See 3.1 // "General Video Format Requirements" section in CEA-861-E spec for (i = 1; i < MAX_CEA861B_FORMAT; i++) { @@ -2212,7 +2208,7 @@ NvU32 NvTiming_GetCEA861TimingIndex (NVT_TIMING *pT) { return ceaIndex; } - + // for the dual-aspect ratio timings we should further check the aspect ratio matching(16:9 or 4:3) based on the integer rounding error for (j = 0; j < MAX_EIA861B_DUAL_ASPECT_VICS; j++) { @@ -2232,7 +2228,7 @@ NvU32 NvTiming_GetCEA861TimingIndex (NVT_TIMING *pT) } break; } - else if (ceaIndex < EIA861B_DUAL_ASPECT_VICS[j][0]) // not a dual-dspect ratio timing + else if (ceaIndex < EIA861B_DUAL_ASPECT_VICS[j][0]) // not a dual-dspect ratio timing { break; } @@ -2260,8 +2256,8 @@ NVT_STATUS NvTiming_CalcCEA861bTiming(NvU32 width, NvU32 height, NvU32 rr, NvU32 // loop through the table for (i = 0; i < MAX_CEA861B_FORMAT; i ++) - { - if ((EIA861B[i].etc.rep & pixelRepeatMask) == 0) + { + if ((EIA861B[i].etc.rep & pixelRepeatMask) == 0) { continue; } @@ -2305,7 +2301,7 @@ NVT_STATUS NvTiming_ConstructVideoInfoframeCtrl(const NVT_TIMING *pTiming, NVT_V { // Prior RFE 543088 if (pCtrl->video_format_id == 0 && - !(NVT_FRR_TIMING_IS_OVT(pTiming->etc.flag) || NVT_TIMING_IS_OVT(pTiming->etc.flag)) && + !(NVT_FRR_TIMING_IS_OVT(pTiming->etc.flag) || NVT_TIMING_IS_OVT(pTiming->etc.flag)) && NVT_GET_TIMING_STATUS_TYPE(pTiming->etc.status) == NVT_TYPE_EDID_861ST) { pCtrl->video_format_id = (NvU8)NVT_GET_TIMING_STATUS_SEQ(pTiming->etc.status); @@ -2321,10 +2317,10 @@ NVT_STATUS NvTiming_ConstructVideoInfoframeCtrl(const NVT_TIMING *pTiming, NVT_V } } - // setup RID code + // setup RID code if (pCtrl->rid == NVT_INFOFRAME_CTRL_DONTCARE) { - if (NVT_TYPE_EDID_861ST == NVT_GET_TIMING_STATUS_TYPE(pTiming->etc.status) && + if (NVT_TYPE_EDID_861ST == NVT_GET_TIMING_STATUS_TYPE(pTiming->etc.status) && NVT_TIMING_IS_OVT(pTiming->etc.flag)) { NvU8 ridIdx = 0; @@ -2340,7 +2336,7 @@ NVT_STATUS NvTiming_ConstructVideoInfoframeCtrl(const NVT_TIMING *pTiming, NVT_V ridIdx = 10 * (pTiming->etc.name[10] - '0') + (pTiming->etc.name[11] - '0'); } - if (ridIdx > NVT_CTA861_RID_1280x720p_16x9 && + if (ridIdx > NVT_CTA861_RID_1280x720p_16x9 && ridIdx < NVT_CTA861_RID_20480x8640p_64x27) { pCtrl->rid = ridIdx; @@ -2525,10 +2521,10 @@ NVT_STATUS NvTiming_ConstructVideoInfoframe(NVT_EDID_INFO *pEdidInfo, NVT_VIDEO_ { *pInfoFrame = DEFAULT_VIDEO_INFOFRAME; } - + // init the header pInfoFrame->type = NVT_INFOFRAME_TYPE_VIDEO; - + // see 6.4 Format of Version 2, 3, and 4 AVI InfoFrames in CTA861-I if (pCtrl) { @@ -2542,14 +2538,14 @@ NVT_STATUS NvTiming_ConstructVideoInfoframe(NVT_EDID_INFO *pEdidInfo, NVT_VIDEO_ else if ((nvt_get_bits(pInfoFrame->byte2, NVT_VIDEO_INFOFRAME_BYTE2_C1C0_MASK, NVT_VIDEO_INFOFRAME_BYTE2_C1C0_SHIFT) == NVT_VIDEO_INFOFRAME_BYTE2_C1C0_EXT_COLORIMETRY) && //EC2-0 is based on the 7.5.5 at CTA861-G which DCI-P3 bit defined or notat byte4 - (nvt_get_bits(pInfoFrame->byte3, NVT_VIDEO_INFOFRAME_BYTE3_EC_MASK, NVT_VIDEO_INFOFRAME_BYTE3_EC_SHIFT) == NVT_VIDEO_INFOFRAME_BYTE3_EC_AdditionalColorExt)) + (nvt_get_bits(pInfoFrame->byte3, NVT_VIDEO_INFOFRAME_BYTE3_EC_MASK, NVT_VIDEO_INFOFRAME_BYTE3_EC_SHIFT) == NVT_VIDEO_INFOFRAME_BYTE3_EC_AdditionalColorExt)) { pInfoFrame->version = NVT_VIDEO_INFOFRAME_VERSION_4; // just put the logic to get the correct version 4, but it shall not be used at currently stage. pInfoFrame->length = 14; } else { - pInfoFrame->version = (((pCtrl->video_format_id & NVT_VIDEO_INFOFRAME_BYTE4_VIC7) != 0) ? NVT_VIDEO_INFOFRAME_VERSION_3 : + pInfoFrame->version = (((pCtrl->video_format_id & NVT_VIDEO_INFOFRAME_BYTE4_VIC7) != 0) ? NVT_VIDEO_INFOFRAME_VERSION_3 : ((pEdidInfo->ext861.revision >= NVT_CEA861_REV_B) ? NVT_VIDEO_INFOFRAME_VERSION_2 : NVT_VIDEO_INFOFRAME_VERSION_1)); pInfoFrame->length = 13; } @@ -2565,18 +2561,18 @@ NVT_STATUS NvTiming_ConstructVideoInfoframe(NVT_EDID_INFO *pEdidInfo, NVT_VIDEO_ pInfoFrame->version = (pEdidInfo->ext861.revision >= NVT_CEA861_REV_B) ? NVT_VIDEO_INFOFRAME_VERSION_2 : NVT_VIDEO_INFOFRAME_VERSION_1; pInfoFrame->length = 13; } - + if (pInfoFrame->version < NVT_VIDEO_INFOFRAME_VERSION_3) { nvt_nvu8_set_bits(pInfoFrame->byte1, 0, NVT_VIDEO_INFOFRAME_BYTE1_RESERVED_MASK, NVT_VIDEO_INFOFRAME_BYTE1_RESERVED_SHIFT); } - + if (pInfoFrame->version == NVT_VIDEO_INFOFRAME_VERSION_2) - { + { nvt_nvu8_set_bits(pInfoFrame->byte4, 0, NVT_VIDEO_INFOFRAME_BYTE4_RESERVED_V2_MASK, NVT_VIDEO_INFOFRAME_BYTE4_RESERVED_V2_SHIFT); } else if (pInfoFrame->version == NVT_VIDEO_INFOFRAME_VERSION_1) - { + { nvt_nvu8_set_bits(pInfoFrame->byte3, 0, NVT_VIDEO_INFOFRAME_BYTE3_RESERVED_V1_MASK, NVT_VIDEO_INFOFRAME_BYTE3_RESERVED_V1_SHIFT); nvt_nvu8_set_bits(pInfoFrame->byte4, 0, NVT_VIDEO_INFOFRAME_BYTE4_RESERVED_V1_MASK, NVT_VIDEO_INFOFRAME_BYTE4_RESERVED_V1_SHIFT); nvt_nvu8_set_bits(pInfoFrame->byte5, 0, NVT_VIDEO_INFOFRAME_BYTE5_RESERVED_V1_MASK, NVT_VIDEO_INFOFRAME_BYTE5_RESERVED_V1_SHIFT); @@ -2643,7 +2639,7 @@ NVT_STATUS NvTiming_ConstructVideoInfoframe(NVT_EDID_INFO *pEdidInfo, NVT_VIDEO_ nvt_nvu8_set_bits(pInfoFrame->byte3, pCtrl->nonuniform_scaling, NVT_VIDEO_INFOFRAME_BYTE3_SC_MASK, NVT_VIDEO_INFOFRAME_BYTE3_SC_SHIFT); } - // byte 4 and byte 5 only supported on InfoFrame 2.0 + // byte 4 and byte 5 only supported on InfoFrame 2.0 if (pInfoFrame->version >= NVT_VIDEO_INFOFRAME_VERSION_2) { // byte 4 @@ -2694,13 +2690,13 @@ NVT_STATUS NvTiming_ConstructVideoInfoframe(NVT_EDID_INFO *pEdidInfo, NVT_VIDEO_ { nvt_nvu8_set_bits(pInfoFrame->byte14, pCtrl->addition_colorimetry_ext, NVT_VIDEO_INFOFRAME_BYTE14_ACE0_3_MASK, NVT_VIDEO_INFOFRAME_BYTE14_ACE0_3_SHIFT); } - + if (pCtrl->frame_rate != NVT_INFOFRAME_CTRL_DONTCARE) { // Frame rate nvt_nvu8_set_bits(pInfoFrame->byte14, pCtrl->frame_rate, NVT_VIDEO_INFOFRAME_BYTE14_FR0_FR3_MASK, NVT_VIDEO_INFOFRAME_BYTE14_FR0_FR3_SHIFT); pInfoFrame->byte15 &= NVT_VIDEO_INFOFRAME_BYTE15_FR4_MASK^0xFFU; - pInfoFrame->byte15 |= ((pCtrl->frame_rate & NVT_VIDEO_INFOFRAME_BYTE14_FR4_ONE_BIT_MASK) << NVT_VIDEO_INFOFRAME_BYTE15_FR4_SHIFT) & NVT_VIDEO_INFOFRAME_BYTE15_FR4_MASK; + pInfoFrame->byte15 |= ((pCtrl->frame_rate & NVT_VIDEO_INFOFRAME_BYTE14_FR4_ONE_BIT_MASK) << NVT_VIDEO_INFOFRAME_BYTE15_FR4_SHIFT) & NVT_VIDEO_INFOFRAME_BYTE15_FR4_MASK; } if (pCtrl->rid != NVT_INFOFRAME_CTRL_DONTCARE) @@ -2860,7 +2856,7 @@ NVT_STATUS NvTiming_ConstructVendorSpecificInfoframe(NVT_EDID_INFO *pEdidInfo, N pInfoFrame->Header.length = offsetof(NVT_VENDOR_SPECIFIC_INFOFRAME_PAYLOAD, optionalBytes); // construct the desired infoframe contents based on the control - + // clear all static reserved fields nvt_nvu8_set_bits(pInfoFrame->Data.byte4, 0, NVT_HDMI_VS_BYTE4_RSVD_MASK, NVT_HDMI_VS_BYTE4_RSVD_SHIFT); @@ -2961,7 +2957,7 @@ NVT_STATUS NvTiming_ConstructVendorSpecificInfoframe(NVT_EDID_INFO *pEdidInfo, N { nvt_nvu8_set_bits(pInfoFrame->Data.optionalBytes[optIdx], NVT_HDMI_VS_BYTENv_RSVD, NVT_HDMI_VS_BYTENv_RSVD_MASK, NVT_HDMI_VS_BYTENv_RSVD_SHIFT); } - + return RetCode; } @@ -2991,7 +2987,7 @@ NVT_STATUS NvTiming_ConstructExtendedMetadataPacketInfoframe( NVT_HDMI_EMP_BYTE1_SYNC_MASK, NVT_HDMI_EMP_BYTE1_SYNC_SHIFT); } - + nvt_nvu8_set_bits(pInfoFrame->Data.byte1, NVT_HDMI_EMP_BYTE1_VFR_ENABLE, NVT_HDMI_EMP_BYTE1_VFR_MASK, NVT_HDMI_EMP_BYTE1_VFR_SHIFT); @@ -3044,7 +3040,7 @@ NVT_STATUS NvTiming_ConstructExtendedMetadataPacketInfoframe( pCtrl->BaseVFP, NVT_HDMI_EMP_BYTE8_MD1_BASE_VFRONT_MASK, NVT_HDMI_EMP_BYTE8_MD1_BASE_VFRONT_SHIFT); - + // In HDMI2.1, MD2 bit 2 is set when RB timing is used. // In HDMI2.1A, MD2 bit 2 is RSVD as 0 if (pCtrl->version == NVT_EXTENDED_METADATA_PACKET_INFOFRAME_VER_HDMI21) @@ -3095,7 +3091,7 @@ void NvTiming_ConstructAdaptiveSyncSDP( // Construct an infoframe to enable or disable Adaptive Sync SDP pSdp->header.type = NVT_DP_ADAPTIVE_SYNC_SDP_PACKET_TYPE; - pSdp->header.version = NVT_DP_ADAPTIVE_SYNC_SDP_VERSION; + pSdp->header.version = NVT_DP_ADAPTIVE_SYNC_SDP_VERSION; pSdp->header.length = NVT_DP_ADAPTIVE_SYNC_SDP_LENGTH; // Payload @@ -3326,7 +3322,7 @@ void parseEdidHdmiLlcBasicInfo(VSDB_DATA *pVsdb, NVT_HDMI_LLC_INFO *pHdmiLlc) { return; } - + p = (NVT_HDMI_LLC_VSDB_PAYLOAD *)(&pVsdb->vendor_data); // Minimum vendor_data_size is 2 @@ -3555,7 +3551,7 @@ void parseEdidHDMILLCTiming(NVT_EDID_INFO *pInfo, VSDB_DATA *pVsdb, NvU32 *pMapS NVT_3D_MULTI_LIST * pMultiListEntry = (NVT_3D_MULTI_LIST *) &pHdmiLLC->Data[DataCnt]; // apply the specified structure to the Support Map - pM->map[pMultiListEntry->TwoD_VIC_order].StereoStructureMask = + pM->map[pMultiListEntry->TwoD_VIC_order].StereoStructureMask = pM->map[pMultiListEntry->TwoD_VIC_order].StereoStructureMask | NVT_HDMI_3D_SUPPORTED_STRUCT_MASK(pMultiListEntry->ThreeD_Structure); // increment the Data count by 2 if this is side by side half, @@ -3574,7 +3570,7 @@ void parseEdidHDMILLCTiming(NVT_EDID_INFO *pInfo, VSDB_DATA *pVsdb, NvU32 *pMapS } } } - + // compress out entries where there is no 3D support. for (i = 0, j = 0; i < pM->total; ++i) @@ -3648,7 +3644,7 @@ NVT_STATUS NvTiming_EnumHdmiVsdbExtendedTiming(NvU32 hdmi_vic, NVT_TIMING *pT) CODE_SEGMENT(PAGE_DD_CODE) void parseEdidNvidiaVSDBBlock(VSDB_DATA *pVsdb, NVDA_VSDB_PARSED_INFO *vsdbInfo) -{ +{ NVT_NVDA_VSDB_PAYLOAD *pNvda; if ((pVsdb == NULL) || (vsdbInfo == NULL)) @@ -3661,8 +3657,7 @@ void parseEdidNvidiaVSDBBlock(VSDB_DATA *pVsdb, NVDA_VSDB_PARSED_INFO *vsdbInfo) { pNvda = (NVT_NVDA_VSDB_PAYLOAD *)(&pVsdb->vendor_data); - // only version 0x1 is supported - if (pNvda->opcode == 0x1) + if (pNvda->opcode == 0x1 || pNvda->opcode == 0x2) { vsdbInfo->vsdbVersion = pNvda->opcode; } @@ -3670,11 +3665,11 @@ void parseEdidNvidiaVSDBBlock(VSDB_DATA *pVsdb, NVDA_VSDB_PARSED_INFO *vsdbInfo) switch (vsdbInfo->vsdbVersion) { case 1: + case 2: vsdbInfo->valid = NV_TRUE; vsdbInfo->vrrData.v1.supportsVrr = NV_TRUE; vsdbInfo->vrrData.v1.minRefreshRate = pNvda->vrrMinRefreshRate; break; - default: break; } @@ -3699,9 +3694,9 @@ void parseEdidMsftVsdbBlock(VSDB_DATA *pVsdb, MSFT_VSDB_PARSED_INFO *pVsdbInfo) pVsdbInfo->version = pMsftVsdbPayload->version; - if (pVsdbInfo->version >= 1) + if (pVsdbInfo->version >= 1) { - for (i = 0; i < MSFT_VSDB_CONTAINER_ID_SIZE; i++) + for (i = 0; i < MSFT_VSDB_CONTAINER_ID_SIZE; i++) { pVsdbInfo->containerId[i] = pMsftVsdbPayload->containerId[i]; } @@ -3711,7 +3706,7 @@ void parseEdidMsftVsdbBlock(VSDB_DATA *pVsdb, MSFT_VSDB_PARSED_INFO *pVsdbInfo) pVsdbInfo->valid = NV_TRUE; } // Version 3 is the latest version of MSFT VSDB at the time of writing this code - // Any update from newer version will be ignored and be parsed as Version 3, till + // Any update from newer version will be ignored and be parsed as Version 3, till // we have an explicit handling for newer version here. if (pVsdbInfo->version >= 3) { @@ -3731,22 +3726,22 @@ void parseEdidHdmiForumVSDB(VSDB_DATA *pVsdb, NVT_HDMI_FORUM_INFO *pHdmiInfo) { return; } - + pHdmiForum = (NVT_HDMI_FORUM_VSDB_PAYLOAD *)(&pVsdb->vendor_data); switch(pHdmiForum->Version) { case 1: // From HDMI spec the payload data size is from 7 to 31 - // In parseCta861DataBlockInfo(), the payload size recorded in pHdmiForum is + // In parseCta861DataBlockInfo(), the payload size recorded in pHdmiForum is // subtracted by 3. Thus the expected range here is 4 - 28. // Assert if the the vendor_data_size < 4. nvt_assert(pVsdb->vendor_data_size >= 4); remainingSize = pVsdb->vendor_data_size; - + // second byte pHdmiInfo->max_TMDS_char_rate = pHdmiForum->Max_TMDS_Character_Rate; - + // third byte pHdmiInfo->threeD_Osd_Disparity = pHdmiForum->ThreeD_Osd_Disparity; pHdmiInfo->dual_view = pHdmiForum->Dual_View; @@ -3756,7 +3751,7 @@ void parseEdidHdmiForumVSDB(VSDB_DATA *pVsdb, NVT_HDMI_FORUM_INFO *pHdmiInfo) pHdmiInfo->cable_status = pHdmiForum->CABLE_STATUS; pHdmiInfo->rr_capable = pHdmiForum->RR_Capable; pHdmiInfo->scdc_present = pHdmiForum->SCDC_Present; - + // fourth byte pHdmiInfo->dc_30bit_420 = pHdmiForum->DC_30bit_420; pHdmiInfo->dc_36bit_420 = pHdmiForum->DC_36bit_420; @@ -3765,7 +3760,7 @@ void parseEdidHdmiForumVSDB(VSDB_DATA *pVsdb, NVT_HDMI_FORUM_INFO *pHdmiInfo) pHdmiInfo->max_FRL_Rate = pHdmiForum->Max_FRL_Rate; remainingSize -= 4; - + // fifth byte if (!remainingSize--) { @@ -3779,7 +3774,7 @@ void parseEdidHdmiForumVSDB(VSDB_DATA *pVsdb, NVT_HDMI_FORUM_INFO *pHdmiInfo) pHdmiInfo->m_delta = pHdmiForum->M_delta; pHdmiInfo->qms = pHdmiForum->QMS; pHdmiInfo->fapa_end_extended = pHdmiForum->FAPA_End_Extended; - + // sixth byte if (!remainingSize--) { @@ -3787,14 +3782,14 @@ void parseEdidHdmiForumVSDB(VSDB_DATA *pVsdb, NVT_HDMI_FORUM_INFO *pHdmiInfo) } pHdmiInfo->vrr_min = pHdmiForum->VRR_min; pHdmiInfo->vrr_max = ((NvU16)pHdmiForum->VRR_max_high) << 8; - + // seventh byte if (!remainingSize--) { break; } pHdmiInfo->vrr_max |= (pHdmiForum->VRR_max_low); - + // eighth byte if (!remainingSize--) { @@ -3829,21 +3824,21 @@ void parseEdidHdmiForumVSDB(VSDB_DATA *pVsdb, NVT_HDMI_FORUM_INFO *pHdmiInfo) } pHdmiInfo->dsc_Max_FRL_Rate = pHdmiForum->DSC_Max_FRL_Rate; - + // tenth byte if (!remainingSize--) { break; } - // Per spec, number of bytes has to be computed as 1024 x (1 + DSC_TotalChunkKBytes). + // Per spec, number of bytes has to be computed as 1024 x (1 + DSC_TotalChunkKBytes). // For driver parser purposes, add 1 here so that the field means max num of KBytes in a link of chunks pHdmiInfo->dsc_totalChunkKBytes = (pHdmiForum->DSC_totalChunkKBytes == 0) ? 0 : pHdmiForum->DSC_totalChunkKBytes + 1; break; default: break; - } + } } CODE_SEGMENT(PAGE_DD_CODE) @@ -3852,7 +3847,7 @@ void parseCta861Hdr10PlusDataBlock(VSVDB_DATA* pVsvdb, NVT_HDR10PLUS_INFO* pHdr1 if (pVsvdb == NULL || pHdr10PlusInfo == NULL) return; - if(pVsvdb->ieee_id != NVT_CEA861_HDR10PLUS_IEEE_ID) + if(pVsvdb->ieee_id != NVT_CEA861_HDR10PLUS_IEEE_ID) return; NVMISC_MEMSET(pHdr10PlusInfo, 0, sizeof(NVT_HDR10PLUS_INFO)); @@ -3882,7 +3877,7 @@ void parseCta861DIDType7VideoTimingDataBlock(NVT_EDID_CEA861_INFO *pExt861, void if (pExt861->did_type7_data_block[t7db_idx].total_descriptors != NVT_CTA861_DID_TYPE7_DESCRIPTORS_MAX) { - nvt_assert(0 && "payload descriptor invalid. expect T7VTDB only 1 descriptor"); + // payload descriptor invalid. expect T7VTDB only 1 descriptor continue; } @@ -3897,11 +3892,11 @@ void parseCta861DIDType7VideoTimingDataBlock(NVT_EDID_CEA861_INFO *pExt861, void { NVMISC_MEMSET(&newTiming, 0, sizeof(newTiming)); if (NVT_STATUS_SUCCESS == parseDisplayId20Timing7Descriptor(&pExt861->did_type7_data_block[t7db_idx].payload[i*eachOfDescSize], - &newTiming, + &newTiming, startSeqNum+i)) { // T7VTDB shall not be used with video timing that can be expressed in an 18-byte DTD - if (newTiming.HVisible < 4096 && newTiming.VVisible < 4096 && newTiming.pclk < 65536) + if (newTiming.HVisible < 4096 && newTiming.VVisible < 4096 && newTiming.pclk < 65536) { nvt_assert(0 && "The timing can be expressed in an 18-byte DTD"); continue; @@ -3909,7 +3904,7 @@ void parseCta861DIDType7VideoTimingDataBlock(NVT_EDID_CEA861_INFO *pExt861, void pT7Descriptor = (const DISPLAYID_2_0_TIMING_7_DESCRIPTOR *) &pExt861->did_type7_data_block[t7db_idx].payload[i*eachOfDescSize]; - + if (pT7Descriptor->options.is_preferred_or_ycc420 == 1 && newTiming.pclk > NVT_HDMI_YUV_420_PCLK_SUPPORTED_MIN) { newTiming.etc.yuv420.bpcs = 0; @@ -3921,10 +3916,10 @@ void parseCta861DIDType7VideoTimingDataBlock(NVT_EDID_CEA861_INFO *pExt861, void NVT_SNPRINTF((char *)newTiming.etc.name, sizeof(newTiming.etc.name), "CTA861-T7:#%3d:%dx%dx%3d.%03dHz/%s", (int)NVT_GET_TIMING_STATUS_SEQ(newTiming.etc.status), - (int)newTiming.HVisible, + (int)newTiming.HVisible, (int)newTiming.VVisible, - (int)newTiming.etc.rrx1k/1000, - (int)newTiming.etc.rrx1k%1000, + (int)newTiming.etc.rrx1k/1000, + (int)newTiming.etc.rrx1k%1000, (newTiming.interlaced ? "I":"P")); newTiming.etc.status = NVT_STATUS_CTA861_DID_T7N(NVT_GET_TIMING_STATUS_SEQ(newTiming.etc.status)); newTiming.etc.name[sizeof(newTiming.etc.name) - 1] = '\0'; @@ -3968,7 +3963,7 @@ void parseCta861DIDType8VideoTimingDataBlock(NVT_EDID_CEA861_INFO *pExt861, void { NVMISC_MEMSET(&newTiming, 0, sizeof(newTiming)); - if (parseDisplayId20Timing8Descriptor(pExt861->did_type8_data_block[t8db_idx].payload, + if (parseDisplayId20Timing8Descriptor(pExt861->did_type8_data_block[t8db_idx].payload, &newTiming, codeType, codeSize, i, startSeqNum + i) == NVT_STATUS_SUCCESS) { if (pExt861->did_type8_data_block[t8db_idx].version.t8y420 == 1 && newTiming.pclk > NVT_HDMI_YUV_420_PCLK_SUPPORTED_MIN) @@ -3981,7 +3976,7 @@ void parseCta861DIDType8VideoTimingDataBlock(NVT_EDID_CEA861_INFO *pExt861, void NVT_SNPRINTF((char *)newTiming.etc.name, sizeof(newTiming.etc.name), "CTA861-T8:#%3d:%dx%dx%3d.%03dHz/%s", (int)NVT_GET_TIMING_STATUS_SEQ(newTiming.etc.status), (int)newTiming.HVisible, (int)newTiming.VVisible, - (int)newTiming.etc.rrx1k/1000, (int)newTiming.etc.rrx1k%1000, + (int)newTiming.etc.rrx1k/1000, (int)newTiming.etc.rrx1k%1000, (newTiming.interlaced ? "I":"P")); newTiming.etc.status = NVT_STATUS_CTA861_DID_T8N(NVT_GET_TIMING_STATUS_SEQ(newTiming.etc.status)); newTiming.etc.name[sizeof(newTiming.etc.name) - 1] = '\0'; @@ -3999,7 +3994,7 @@ void parseCta861DIDType8VideoTimingDataBlock(NVT_EDID_CEA861_INFO *pExt861, void CODE_SEGMENT(PAGE_DD_CODE) void parseCta861DIDType10VideoTimingDataBlock(NVT_EDID_CEA861_INFO *pExt861, void *pRawInfo) { - NvU8 i = 0; + NvU8 i = 0; NvU8 t10db_idx = 0; NvU8 startSeqNum = 0; @@ -4017,7 +4012,7 @@ void parseCta861DIDType10VideoTimingDataBlock(NVT_EDID_CEA861_INFO *pExt861, voi for (i = 0; i < pExt861->did_type10_data_block[t10db_idx].total_descriptors; i++) { - if (pExt861->did_type10_data_block[t10db_idx].total_descriptors < NVT_CTA861_DID_TYPE10_DESCRIPTORS_MIN || + if (pExt861->did_type10_data_block[t10db_idx].total_descriptors < NVT_CTA861_DID_TYPE10_DESCRIPTORS_MIN || pExt861->did_type10_data_block[t10db_idx].total_descriptors > NVT_CTA861_DID_TYPE10_DESCRIPTORS_MAX) { nvt_assert(0 && "payload descriptor invalid. expect T10VTDB has minimum 1 descriptor, maximum 4 descriptors"); @@ -4026,16 +4021,16 @@ void parseCta861DIDType10VideoTimingDataBlock(NVT_EDID_CEA861_INFO *pExt861, voi NVMISC_MEMSET(&newTiming, 0, sizeof(newTiming)); if (NVT_STATUS_SUCCESS == parseDisplayId20Timing10Descriptor(&pExt861->did_type10_data_block[t10db_idx].payload[i*eachOfDescriptorsSize], - &newTiming, + &newTiming, pExt861->did_type10_data_block[t10db_idx].version.t10_m, startSeqNum+i)) { p6bytesDescriptor = (const DISPLAYID_2_0_TIMING_10_6BYTES_DESCRIPTOR *) &pExt861->did_type10_data_block[t10db_idx].payload[i*eachOfDescriptorsSize]; if (p6bytesDescriptor->options.ycc420_support && newTiming.pclk > NVT_HDMI_YUV_420_PCLK_SUPPORTED_MIN) - { - UPDATE_BPC_FOR_COLORFORMAT(newTiming.etc.yuv420, 0, 1, - pInfo->hdmiForumInfo.dc_30bit_420, + { + UPDATE_BPC_FOR_COLORFORMAT(newTiming.etc.yuv420, 0, 1, + pInfo->hdmiForumInfo.dc_30bit_420, pInfo->hdmiForumInfo.dc_36bit_420, 0, pInfo->hdmiForumInfo.dc_48bit_420); } @@ -4044,10 +4039,10 @@ void parseCta861DIDType10VideoTimingDataBlock(NVT_EDID_CEA861_INFO *pExt861, voi { NVT_SNPRINTF((char *)newTiming.etc.name, sizeof(newTiming.etc.name), "CTA861-T10:#%3d:%dx%dx%3d.%03dHz/%s", (int)NVT_GET_TIMING_STATUS_SEQ(newTiming.etc.status), - (int)newTiming.HVisible, + (int)newTiming.HVisible, (int)newTiming.VVisible, - (int)newTiming.etc.rrx1k/1000, - (int)newTiming.etc.rrx1k%1000, + (int)newTiming.etc.rrx1k/1000, + (int)newTiming.etc.rrx1k%1000, (newTiming.interlaced ? "I":"P")); } else @@ -4055,10 +4050,10 @@ void parseCta861DIDType10VideoTimingDataBlock(NVT_EDID_CEA861_INFO *pExt861, voi NVT_SNPRINTF((char *)newTiming.etc.name, sizeof(newTiming.etc.name), "CTA861-T10RB%d:#%3d:%dx%dx%3d.%03dHz/%s", p6bytesDescriptor->options.timing_formula, (int)NVT_GET_TIMING_STATUS_SEQ(newTiming.etc.status), - (int)newTiming.HVisible, + (int)newTiming.HVisible, (int)newTiming.VVisible, - (int)newTiming.etc.rrx1k/1000, - (int)newTiming.etc.rrx1k%1000, + (int)newTiming.etc.rrx1k/1000, + (int)newTiming.etc.rrx1k%1000, (newTiming.interlaced ? "I":"P")); } newTiming.etc.status = NVT_STATUS_CTA861_DID_T10N(NVT_GET_TIMING_STATUS_SEQ(newTiming.etc.status)); diff --git a/src/common/modeset/timing/nvt_edidext_displayid.c b/src/common/modeset/timing/nvt_edidext_displayid.c index 53cd4c8903..5d9a61a5b1 100644 --- a/src/common/modeset/timing/nvt_edidext_displayid.c +++ b/src/common/modeset/timing/nvt_edidext_displayid.c @@ -377,8 +377,6 @@ static NVT_STATUS parseDisplayIdColorChar(NvU8 * block, NVT_DISPLAYID_INFO *pInf if ((prim_num + wp_num) * sizeof(DISPLAYID_COLOR_POINT) + 1 != blk->header.data_bytes) { - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } @@ -416,8 +414,6 @@ static NVT_STATUS parseDisplayIdProdIdentityBlock(NvU8 * block, NVT_DISPLAYID_IN DISPLAYID_PROD_IDENTIFICATION_BLOCK * blk = (DISPLAYID_PROD_IDENTIFICATION_BLOCK *)block; if (blk->header.data_bytes - blk->productid_string_size != NVT_DISPLAYID_PRODUCT_IDENTITY_MIN_LEN) { - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } @@ -442,8 +438,6 @@ static NVT_STATUS parseDisplayIdParam(NvU8 * block, NVT_DISPLAYID_INFO *pInfo) DISPLAYID_DISPLAY_PARAM_BLOCK * blk = (DISPLAYID_DISPLAY_PARAM_BLOCK *)block; if (blk->header.data_bytes != NVT_DISPLAYID_DISPLAY_PARAM_BLOCK_LEN) { - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } @@ -479,8 +473,6 @@ static NVT_STATUS parseDisplayIdTiming1(NvU8 * block, NVT_EDID_INFO *pEdidInfo) DISPLAYID_TIMING_1_BLOCK * blk = (DISPLAYID_TIMING_1_BLOCK *)block; if (blk->header.data_bytes % sizeof(DISPLAYID_TIMING_1_DESCRIPTOR) != 0) { - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } @@ -607,8 +599,6 @@ static NVT_STATUS parseDisplayIdTiming2(NvU8 * block, NVT_EDID_INFO *pEdidInfo) if (blk->header.data_bytes % sizeof(DISPLAYID_TIMING_2_DESCRIPTOR) != 0) { - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } @@ -766,8 +756,6 @@ static NVT_STATUS parseDisplayIdTiming3(NvU8 * block, NVT_EDID_INFO *pEdidInfo) if (blk->header.data_bytes % sizeof(DISPLAYID_TIMING_3_DESCRIPTOR) != 0) { - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } @@ -801,8 +789,6 @@ static NVT_STATUS parseDisplayIdTiming4(NvU8 * block, NVT_EDID_INFO *pEdidInfo) DISPLAYID_TIMING_4_BLOCK * blk = (DISPLAYID_TIMING_4_BLOCK *)block; if (blk->header.data_bytes < 1 || blk->header.data_bytes > NVT_DISPLAYID_DATABLOCK_MAX_PAYLOAD_LEN) { - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } @@ -857,8 +843,6 @@ static NVT_STATUS parseDisplayIdTiming5(NvU8 * block, NVT_EDID_INFO *pEdidInfo) DISPLAYID_TIMING_5_BLOCK * blk = (DISPLAYID_TIMING_5_BLOCK *)block; if (blk->header.data_bytes < 1 || blk->header.data_bytes > NVT_DISPLAYID_DATABLOCK_MAX_PAYLOAD_LEN) { - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } for (i = 0; i * sizeof(DISPLAYID_TIMING_5_DESCRIPTOR) < blk->header.data_bytes; i++) @@ -890,8 +874,6 @@ static NVT_STATUS parseDisplayIdTimingVesa(NvU8 * block, NVT_EDID_INFO *pEdidInf DISPLAYID_TIMING_MODE_BLOCK * blk = (DISPLAYID_TIMING_MODE_BLOCK *)block; if (blk->header.data_bytes != DISPLAYID_TIMING_VESA_BLOCK_SIZE) { - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } @@ -931,8 +913,6 @@ static NVT_STATUS parseDisplayIdTimingEIA(NvU8 * block, NVT_EDID_INFO *pEdidInfo DISPLAYID_TIMING_MODE_BLOCK * blk = (DISPLAYID_TIMING_MODE_BLOCK *)block; if (blk->header.data_bytes != DISPLAYID_TIMING_CEA_BLOCK_SIZE) { - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } @@ -975,8 +955,6 @@ static NVT_STATUS parseDisplayIdRangeLimits(NvU8 * block, NVT_DISPLAYID_INFO *pI if (blk->header.data_bytes != DISPLAYID_RANGE_LIMITS_BLOCK_LEN) { - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } @@ -987,7 +965,7 @@ static NVT_STATUS parseDisplayIdRangeLimits(NvU8 * block, NVT_DISPLAYID_INFO *pI blk->vertical_refresh_rate_min > blk->vertical_refresh_rate_max || minPclk > maxPclk) { - nvt_assert(0 && "wrong range limit"); + // wrong range limit status = NVT_STATUS_ERR; } @@ -995,8 +973,6 @@ static NVT_STATUS parseDisplayIdRangeLimits(NvU8 * block, NVT_DISPLAYID_INFO *pI if (pInfo->rl_num >= NVT_DISPLAYID_RANGE_LIMITS_MAX_COUNT) { - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } @@ -1027,8 +1003,6 @@ static NVT_STATUS parseDisplayIdSerialNumber(NvU8 * block, NVT_DISPLAYID_INFO *p DISPLAYID_ASCII_STRING_BLOCK * blk = (DISPLAYID_ASCII_STRING_BLOCK *)block; if (blk->header.data_bytes > NVT_DISPLAYID_DATABLOCK_MAX_PAYLOAD_LEN) { - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } @@ -1046,8 +1020,6 @@ static NVT_STATUS parseDisplayIdAsciiString(NvU8 * block, NVT_DISPLAYID_INFO *pI DISPLAYID_ASCII_STRING_BLOCK * blk = (DISPLAYID_ASCII_STRING_BLOCK *)block; if (blk->header.data_bytes > NVT_DISPLAYID_DATABLOCK_MAX_PAYLOAD_LEN) { - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } @@ -1065,8 +1037,6 @@ static NVT_STATUS parseDisplayIdDeviceData(NvU8 * block, NVT_DISPLAYID_INFO *pIn DISPLAYID_DEVICE_DATA_BLOCK * blk = (DISPLAYID_DEVICE_DATA_BLOCK *)block; if (blk->header.data_bytes != DISPLAYID_DEVICE_DATA_BLOCK_LEN) { - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } @@ -1103,8 +1073,6 @@ static NVT_STATUS parseDisplayIdInterfacePower(NvU8 * block, NVT_DISPLAYID_INFO DISPLAYID_INTERFACE_POWER_BLOCK * blk = (DISPLAYID_INTERFACE_POWER_BLOCK *)block; if (blk->header.data_bytes != DISPLAYID_INTERFACE_POWER_BLOCK_LEN) { - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } @@ -1141,8 +1109,6 @@ static NVT_STATUS parseDisplayIdDisplayInterface(NvU8 * block, NVT_DISPLAYID_INF DISPLAYID_INTERFACE_DATA_BLOCK * blk = (DISPLAYID_INTERFACE_DATA_BLOCK *)block; if (blk->header.data_bytes != DISPLAYID_INTERFACE_DATA_BLOCK_LEN) { - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } @@ -1177,7 +1143,7 @@ static NVT_STATUS parseDisplayIdDisplayInterface(NvU8 * block, NVT_DISPLAYID_INF // Content Protection pInfo->u4.display_interface.content_protection = DRF_VAL(T_DISPLAYID, _INTERFACE, _CONTENT, blk->content_protection); pInfo->u4.display_interface.content_protection_version = blk->content_protection_version; - + // Spread pInfo->u4.display_interface.spread_spectrum = DRF_VAL(T_DISPLAYID, _INTERFACE, _SPREAD_TYPE, blk->spread); pInfo->u4.display_interface.spread_percent = DRF_VAL(T_DISPLAYID, _INTERFACE, _SPREAD_PER, blk->spread); @@ -1214,8 +1180,6 @@ static NVT_STATUS parseDisplayIdStereo(NvU8 * block, NVT_DISPLAYID_INFO *pInfo) DISPLAYID_STEREO_INTERFACE_METHOD_BLOCK * blk = (DISPLAYID_STEREO_INTERFACE_METHOD_BLOCK *)block; if (blk->header.data_bytes > NVT_DISPLAYID_DATABLOCK_MAX_PAYLOAD_LEN) { - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } @@ -1246,8 +1210,6 @@ static NVT_STATUS parseDisplayIdStereo(NvU8 * block, NVT_DISPLAYID_INFO *pInfo) case NVT_DISPLAYID_STEREO_PROPRIETARY: break; default: - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } @@ -1260,8 +1222,6 @@ static NVT_STATUS parseDisplayIdTiledDisplay(NvU8 * block, NVT_DISPLAYID_INFO *p DISPLAYID_TILED_DISPLAY_BLOCK * blk = (DISPLAYID_TILED_DISPLAY_BLOCK *)block; if (blk->header.data_bytes > NVT_DISPLAYID_DATABLOCK_MAX_PAYLOAD_LEN) { - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } @@ -1314,8 +1274,6 @@ static NVT_STATUS parseDisplayIdCtaData(NvU8 * block, NVT_EDID_INFO *pInfo) NVT_EDID_CEA861_INFO *p861info; if (blk->data_bytes > NVT_DISPLAYID_DATABLOCK_MAX_PAYLOAD_LEN) { - // Assert since this error is ignored - nvt_assert(0); return NVT_STATUS_ERR; } @@ -1337,7 +1295,10 @@ static NVT_STATUS parseDisplayIdCtaData(NvU8 * block, NVT_EDID_INFO *pInfo) parseCta861HfScdb(p861info, pInfo, FROM_DISPLAYID_13_DATA_BLOCK); //parse HDR related information from the HDR static metadata data block - parseCea861HdrStaticMetadataDataBlock(p861info, pInfo, FROM_DISPLAYID_13_DATA_BLOCK); + if (p861info->valid.hdr_static_metadata != 0) + { + parseCta861HdrStaticMetadataDataBlock(p861info, pInfo, FROM_DISPLAYID_13_DATA_BLOCK); + } // base video parse861bShortTiming(p861info, pInfo, FROM_DISPLAYID_13_DATA_BLOCK); @@ -1359,8 +1320,7 @@ static NVT_STATUS parseDisplayIdDisplayInterfaceFeatures(NvU8 * block, NVT_DISPL DISPLAYID_INTERFACE_FEATURES_DATA_BLOCK * blk = (DISPLAYID_INTERFACE_FEATURES_DATA_BLOCK *)block; if (blk->header.data_bytes > DISPLAYID_INTERFACE_FEATURES_DATA_BLOCK_MAX_LEN) { - // Assert since this error is ignored - nvt_assert(0); + return NVT_STATUS_ERR; } diff --git a/src/common/modeset/timing/nvt_edidext_displayid20.c b/src/common/modeset/timing/nvt_edidext_displayid20.c index b2fbc383b2..c6c41043c2 100644 --- a/src/common/modeset/timing/nvt_edidext_displayid20.c +++ b/src/common/modeset/timing/nvt_edidext_displayid20.c @@ -44,9 +44,9 @@ PUSH_SEGMENTS * the timings */ CODE_SEGMENT(PAGE_DD_CODE) -NVT_STATUS +NVT_STATUS getDisplayId20EDIDExtInfo( - NvU8 *p, + NvU8 *p, NvU32 size, NVT_EDID_INFO *pEdidInfo) { @@ -62,10 +62,12 @@ getDisplayId20EDIDExtInfo( } // Calculate the All DisplayID20 Extension checksum - // The function name + // The function name if (computeDisplayId20SectionCheckSum(p, sizeof(EDIDV1STRUC)) != 0) { - nvt_assert(0 && "displayid2ext invalid checksum"); +#ifdef DD_UNITTEST + return NVT_STATUS_ERR; +#endif } extSection = (DISPLAYID_2_0_SECTION *)(p + 1); @@ -77,7 +79,7 @@ getDisplayId20EDIDExtInfo( * @brief DisplayId20 as EDID extension block's "Section" entry point functions */ CODE_SEGMENT(PAGE_DD_CODE) -NVT_STATUS +NVT_STATUS parseDisplayId20EDIDExtSection( DISPLAYID_2_0_SECTION * extSection, NVT_EDID_INFO *pEdidInfo) @@ -92,8 +94,8 @@ parseDisplayId20EDIDExtSection( return NVT_STATUS_ERR; } - // It is based on the DisplayID v2.0 Errata E7 - // First DisplayID2.0 section as EDID extension shall populate "Display Product Primary Use Case" byte with a value from 1h-8h based on the intended primary use case of the sink. + // It is based on the DisplayID v2.0 Errata E7 + // First DisplayID2.0 section as EDID extension shall populate "Display Product Primary Use Case" byte with a value from 1h-8h based on the intended primary use case of the sink. // Any subsequent DisplayID2.0 section EDID extension shall set the "Display Product Primary Use Case" byte to 0h. pEdidInfo->total_did2_extensions++; @@ -104,7 +106,9 @@ parseDisplayId20EDIDExtSection( extSection->header.extension_count != DISPLAYID_2_0_PROD_EXTENSION)) || (pEdidInfo->total_did2_extensions > 1 && extSection->header.product_type != DISPLAYID_2_0_PROD_EXTENSION)) { - nvt_assert(0); // product_type value set incorrect in Display Product Primary Use Case field +#ifdef DD_UNITTEST + return NVT_STATUS_ERR; +#endif } pEdidInfo->ext_displayid20.version = extSection->header.version; @@ -202,7 +206,7 @@ parseDisplayId20EDIDExtDataBlocks( status = parseDisplayId20DataBlock(block_header, pDisplayId20Info); if (pDisplayId20Info == NULL) return status; - + // TODO : All the data blocks shall sync the data from the datablock in DisplayID2_0 to pEdidInfo if (status == NVT_STATUS_SUCCESS && pDisplayId20Info->as_edid_extension == NV_TRUE) { @@ -214,7 +218,7 @@ parseDisplayId20EDIDExtDataBlocks( case DISPLAYID_2_0_BLOCK_TYPE_INTERFACE_FEATURES: pDisplayId20Info->valid_data_blocks.interface_feature_present = NV_TRUE; - // Supported - Color depth is supported for all supported timings. Supported timing includes all Display-ID exposed timings + // Supported - Color depth is supported for all supported timings. Supported timing includes all Display-ID exposed timings // (that is timing exposed using DisplayID timing types and CTA VICs) if (IS_BPC_SUPPORTED_COLORFORMAT(pDisplayId20Info->interface_features.yuv444.bpcs)) { @@ -226,8 +230,8 @@ parseDisplayId20EDIDExtDataBlocks( pDisplayId20Info->basic_caps |= NVT_DISPLAY_2_0_CAP_YCbCr_422; } - if (pDisplayId20Info->interface_features.audio_capability.support_48khz || - pDisplayId20Info->interface_features.audio_capability.support_44_1khz || + if (pDisplayId20Info->interface_features.audio_capability.support_48khz || + pDisplayId20Info->interface_features.audio_capability.support_44_1khz || pDisplayId20Info->interface_features.audio_capability.support_32khz) { pDisplayId20Info->basic_caps |= NVT_DISPLAY_2_0_CAP_BASIC_AUDIO; @@ -244,7 +248,7 @@ parseDisplayId20EDIDExtDataBlocks( pEdidInfo->ext861.hdr_static_metadata.byte1 |= NVT_CEA861_EOTF_SMPTE_ST2084; pEdidInfo->ext861.colorimetry.byte1 |= NVT_CEA861_COLORIMETRY_BT2020RGB; - if (IS_BPC_SUPPORTED_COLORFORMAT(pDisplayId20Info->interface_features.yuv444.bpcs) || + if (IS_BPC_SUPPORTED_COLORFORMAT(pDisplayId20Info->interface_features.yuv444.bpcs) || IS_BPC_SUPPORTED_COLORFORMAT(pDisplayId20Info->interface_features.yuv422.bpcs)) { pEdidInfo->ext861.colorimetry.byte1 |= NVT_CEA861_COLORIMETRY_BT2020YCC; @@ -253,8 +257,8 @@ parseDisplayId20EDIDExtDataBlocks( } break; - // DisplayID_v2.0 E5 defined - // if inside CTA embedded block existed 420 VDB/CMDB, then we follow these two blocks only. + // DisplayID_v2.0 E5 defined + // if inside CTA embedded block existed 420 VDB/CMDB, then we follow these two blocks only. // * support for 420 pixel encoding is limited to the timings exposed in the restricted set exposed in the CTA data block. // * field of "Mini Pixel Rate at YCbCr420" shall be set 00h case DISPLAYID_2_0_BLOCK_TYPE_CTA_DATA: @@ -285,11 +289,23 @@ parseDisplayId20EDIDExtDataBlocks( pDisplayId20Info->basic_caps = pEdidInfo->ext861.basic_caps; } - // this is the DisplayID20 Extension, so we need to copy the data from the CTA in DID20 to CTA section + // this is the DisplayID20 Extension, just copy needed data block value here: if (pEdidInfo->ext861.revision == 0) - NVMISC_MEMCPY(&pEdidInfo->ext861, &pDisplayId20Info->cta.cta861_info, sizeof(NVT_EDID_CEA861_INFO)); + { + if (pDisplayId20Info->cta.cta861_info.valid.colorimetry) + { + pEdidInfo->ext861.colorimetry.byte1 = pDisplayId20Info->cta.cta861_info.colorimetry.byte1; + pEdidInfo->ext861.colorimetry.byte2 = pDisplayId20Info->cta.cta861_info.colorimetry.byte2; + } + } else if (pEdidInfo->ext861_2.revision == 0) - NVMISC_MEMCPY(&pEdidInfo->ext861_2, &pDisplayId20Info->cta.cta861_info, sizeof(NVT_EDID_CEA861_INFO)); + { + if (pDisplayId20Info->cta.cta861_info.valid.colorimetry) + { + pEdidInfo->ext861_2.colorimetry.byte1 = pDisplayId20Info->cta.cta861_info.colorimetry.byte1; + pEdidInfo->ext861_2.colorimetry.byte2 = pDisplayId20Info->cta.cta861_info.colorimetry.byte2; + } + } break; case DISPLAYID_2_0_BLOCK_TYPE_DISPLAY_PARAM: @@ -335,11 +351,11 @@ parseDisplayId20EDIDExtDataBlocks( pDisplayId20Info->valid_data_blocks.dynamic_range_limit_present = NV_TRUE; break; case DISPLAYID_2_0_BLOCK_TYPE_ADAPTIVE_SYNC: - pDisplayId20Info->valid_data_blocks.adaptive_sync_present = NV_TRUE; + pDisplayId20Info->valid_data_blocks.adaptive_sync_present = NV_TRUE; break; case DISPLAYID_2_0_BLOCK_TYPE_BRIGHTNESS_LUMINANCE_RANGE: pDisplayId20Info->valid_data_blocks.brightness_luminance_range_present = NV_TRUE; - break; + break; case DISPLAYID_2_0_BLOCK_TYPE_VENDOR_SPEC: pDisplayId20Info->valid_data_blocks.vendor_specific_present = NV_TRUE; break; @@ -354,21 +370,21 @@ parseDisplayId20EDIDExtDataBlocks( /* @brief Update the correct color format / attribute of timings from interface feature data block */ CODE_SEGMENT(PAGE_DD_CODE) -void +void updateColorFormatForDisplayId20ExtnTimings( - NVT_EDID_INFO *pInfo, + NVT_EDID_INFO *pInfo, NvU32 timingIdx) -{ +{ // pDisplayId20Info parsed displayID20 info NVT_DISPLAYID_2_0_INFO *pDisplayId20Info = &pInfo->ext_displayid20; NVT_TIMING *pT= &pInfo->timing[timingIdx]; - + nvt_assert(timingIdx <= COUNT(pInfo->timing)); - + if (pDisplayId20Info->as_edid_extension) { if ((pInfo->input.u.digital.video_interface == NVT_EDID_DIGITAL_VIDEO_INTERFACE_STANDARD_HDMI_A_SUPPORTED || - pInfo->input.u.digital.video_interface == NVT_EDID_DIGITAL_VIDEO_INTERFACE_STANDARD_HDMI_B_SUPPORTED || + pInfo->input.u.digital.video_interface == NVT_EDID_DIGITAL_VIDEO_INTERFACE_STANDARD_HDMI_B_SUPPORTED || pInfo->ext861.valid.H14B_VSDB || pInfo->ext861.valid.H20_HF_VSDB) && pInfo->ext861.revision >= NVT_CEA861_REV_A) { UPDATE_BPC_FOR_COLORFORMAT(pT->etc.rgb444, 0, diff --git a/src/common/modeset/timing/nvt_ovt.c b/src/common/modeset/timing/nvt_ovt.c index f1bc73a033..7da3ac2bc0 100644 --- a/src/common/modeset/timing/nvt_ovt.c +++ b/src/common/modeset/timing/nvt_ovt.c @@ -128,6 +128,7 @@ NVT_STATUS NvTiming_CalcOVT(NvU32 width, NvU32 height, NvU32 refreshRate, NVT_TI // ** Preparation ** // 1. Determine maximum Vrate of frame rate group (see Table 13) and V-Total granularity: + // Currently client doesn't have customize refresh rate value as it only from VFDB switch (refreshRate) { case 24: case 25: case 30: @@ -161,7 +162,7 @@ NVT_STATUS NvTiming_CalcOVT(NvU32 width, NvU32 height, NvU32 refreshRate, NVT_TI default: vTotalGranularity = 1; maxVRate = refreshRate; - nvt_assert (0 && "invalid input refresh rate!"); + break; } // 2. Minimum Vtotal is found from highest frame rate of Vrate group, Vactive and the minimum Vblank time of 460 μSec: diff --git a/src/common/modeset/timing/nvtiming.h b/src/common/modeset/timing/nvtiming.h index dcc7eb731f..1d12e7ea54 100644 --- a/src/common/modeset/timing/nvtiming.h +++ b/src/common/modeset/timing/nvtiming.h @@ -4183,7 +4183,7 @@ typedef struct tagNVT_HDMI_LLC_DATA typedef struct tagNVT_NVDA_VSDB_PAYLOAD { - NvU8 opcode; // Nvidia specific opcode - please refer to VRR monitor spec v5 + NvU8 opcode; // Nvidia specific opcode - please refer to VRR monitor spec v17 NvU8 vrrMinRefreshRate; // Minimum refresh rate supported by this monitor } NVT_NVDA_VSDB_PAYLOAD; diff --git a/src/common/modeset/timing/nvtiming_pvt.h b/src/common/modeset/timing/nvtiming_pvt.h index c353e501aa..be60ed9678 100644 --- a/src/common/modeset/timing/nvtiming_pvt.h +++ b/src/common/modeset/timing/nvtiming_pvt.h @@ -23,7 +23,7 @@ // // File: nvtiming_pvt.h // -// Purpose: the private functions/structures which are only used inside +// Purpose: the private functions/structures which are only used inside // the nv timing library. // //***************************************************************************** @@ -44,6 +44,11 @@ #define nvt_assert(p) ((void)0) +#ifdef DD_UNITTEST +#undef nvt_assert(p) +#define nvt_assert(p) ((void)0) +#endif // DD_UNITTEST + #include // NULL #ifdef __cplusplus @@ -84,7 +89,7 @@ void parseEdidHdmiForumVSDB(VSDB_DATA *pVsdb, NVT_HDMI_FORUM_INFO *pHdmiIn void getEdidHDM1_4bVsdbTiming(NVT_EDID_INFO *pInfo); void parseEdidHDMILLCTiming(NVT_EDID_INFO *pInfo, VSDB_DATA *pVsdb, NvU32 *pSupported, HDMI3DSUPPORTMAP * pM); void parseEdidNvidiaVSDBBlock(VSDB_DATA *pVsdb, NVDA_VSDB_PARSED_INFO *vsdbInfo); -void parseCea861HdrStaticMetadataDataBlock(NVT_EDID_CEA861_INFO *pExt861, void *pRawInfo, NVT_CTA861_ORIGIN flag); +void parseCta861HdrStaticMetadataDataBlock(NVT_EDID_CEA861_INFO *pExt861, void *pRawInfo, NVT_CTA861_ORIGIN flag); void parseCta861DvStaticMetadataDataBlock(VSVDB_DATA* pVsvdb, NVT_DV_STATIC_METADATA* pDvInfo); void parseCta861Hdr10PlusDataBlock(VSVDB_DATA* pVsvdb, NVT_HDR10PLUS_INFO* pHdr10PlusInfo); void parseCta861DIDType7VideoTimingDataBlock(NVT_EDID_CEA861_INFO *pExt861, void *pRawInfo); diff --git a/src/common/nvlink/inband/interface/nvlink_inband_msg.h b/src/common/nvlink/inband/interface/nvlink_inband_msg.h index 08f8d4cdf4..2c52cf72da 100644 --- a/src/common/nvlink/inband/interface/nvlink_inband_msg.h +++ b/src/common/nvlink/inband/interface/nvlink_inband_msg.h @@ -81,6 +81,7 @@ typedef struct #define NVLINK_INBAND_GPU_PROBE_CAPS_SRIOV_ENABLED NVBIT(0) #define NVLINK_INBAND_GPU_PROBE_CAPS_PROBE_UPDATE NVBIT(1) #define NVLINK_INBAND_GPU_PROBE_CAPS_EGM_SUPPORT NVBIT(2) +#define NVLINK_INBAND_GPU_PROBE_CAPS_ATS_SUPPORT NVBIT(3) /* Add more caps as need in the future */ @@ -116,6 +117,7 @@ typedef struct #define NVLINK_INBAND_FM_CAPS_BW_MODE_3QUARTER NVBIT64(4) #define NVLINK_INBAND_FM_CAPS_MC_TEAM_SETUP_V2 NVBIT64(5) #define NVLINK_INBAND_FM_CAPS_EGM_ENABLED NVBIT64(6) +#define NVLINK_INBAND_FM_CAPS_ATS_ENABLED NVBIT64(7) #define NVLINK_INBAND_FABRIC_HEALTH_MASK_DEGRADED_BW 1:0 #define NVLINK_INBAND_FABRIC_HEALTH_MASK_DEGRADED_BW_NOT_SUPPORTED 0 diff --git a/src/common/nvlink/kernel/nvlink/core/nvlink_conn_mgmt.c b/src/common/nvlink/kernel/nvlink/core/nvlink_conn_mgmt.c index 8fd41d877f..cb38bec187 100644 --- a/src/common/nvlink/kernel/nvlink/core/nvlink_conn_mgmt.c +++ b/src/common/nvlink/kernel/nvlink/core/nvlink_conn_mgmt.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2019-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -331,6 +331,7 @@ nvlink_core_check_intranode_conn_state case NVLINK_LINKSTATE_RESET: { + if ((nvlink_core_check_link_state(conn->end0, NVLINK_LINKSTATE_RESET)) && (nvlink_core_check_link_state(conn->end1, NVLINK_LINKSTATE_RESET))) { @@ -357,6 +358,7 @@ nvlink_core_check_intranode_conn_state case NVLINK_LINKSTATE_SAFE: { + // Check if both ends and their sublinks are already in SAFE mode if ((nvlink_core_check_link_state(conn->end0, NVLINK_LINKSTATE_SAFE)) && (nvlink_core_check_link_state(conn->end1, NVLINK_LINKSTATE_SAFE))) diff --git a/src/common/nvlink/kernel/nvlink/core/nvlink_discovery.c b/src/common/nvlink/kernel/nvlink/core/nvlink_discovery.c index 27d5cb3cb3..869a92bb0c 100644 --- a/src/common/nvlink/kernel/nvlink/core/nvlink_discovery.c +++ b/src/common/nvlink/kernel/nvlink/core/nvlink_discovery.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2019-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2019-2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/common/nvlink/kernel/nvlink/core/nvlink_initialize.c b/src/common/nvlink/kernel/nvlink/core/nvlink_initialize.c index 0721cf935a..833e64c731 100644 --- a/src/common/nvlink/kernel/nvlink/core/nvlink_initialize.c +++ b/src/common/nvlink/kernel/nvlink/core/nvlink_initialize.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2019-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2019-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/common/nvlink/kernel/nvlink/core/nvlink_link_mgmt.c b/src/common/nvlink/kernel/nvlink/core/nvlink_link_mgmt.c index 47230aec8f..6d15221c36 100644 --- a/src/common/nvlink/kernel/nvlink/core/nvlink_link_mgmt.c +++ b/src/common/nvlink/kernel/nvlink/core/nvlink_link_mgmt.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2019-2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -53,9 +53,11 @@ nvlink_core_check_link_state switch (linkState) { - case NVLINK_LINKSTATE_OFF: case NVLINK_LINKSTATE_RESET: case NVLINK_LINKSTATE_SAFE: + + // fall-through + case NVLINK_LINKSTATE_OFF: case NVLINK_LINKSTATE_HS: { status = link->link_handlers->get_dl_link_mode(link, &crntDlLinkMode); diff --git a/src/common/nvlink/kernel/nvlink/core/nvlink_shutdown.c b/src/common/nvlink/kernel/nvlink/core/nvlink_shutdown.c index 519e994434..8e8feb484b 100644 --- a/src/common/nvlink/kernel/nvlink/core/nvlink_shutdown.c +++ b/src/common/nvlink/kernel/nvlink/core/nvlink_shutdown.c @@ -185,104 +185,110 @@ nvlink_core_powerdown_intranode_conns_from_active_to_L2 } else if (status == NVL_SUCCESS) { - // STEP 2: Change link state from ACTIVE to SWCFG on all endpoints - conns[i]->end0->link_handlers->set_dl_link_mode(conns[i]->end0, - NVLINK_LINKSTATE_SAFE, - flags); - // Only send if not in loopback - if (conns[i]->end0 != conns[i]->end1) + if (version <= NVLINK_DEVICE_VERSION_40) { - conns[i]->end1->link_handlers->set_dl_link_mode(conns[i]->end1, - NVLINK_LINKSTATE_SAFE, - flags); + // STEP 2: Change link state from ACTIVE to SWCFG on all endpoints + conns[i]->end0->link_handlers->set_dl_link_mode(conns[i]->end0, + NVLINK_LINKSTATE_SAFE, + flags); + // Only send if not in loopback + if (conns[i]->end0 != conns[i]->end1) + { + conns[i]->end1->link_handlers->set_dl_link_mode(conns[i]->end1, + NVLINK_LINKSTATE_SAFE, + flags); + } } } } - // - // All the endpoints should now either be in SWCFG or transitioning to SWCFG. Poll for all - // endpoints to reach SWCFG. If any endpoint does not transition to SWCFG, return error - // - for (i = 0; i < connCount; i++) + if (version <= NVLINK_DEVICE_VERSION_40) { - if (conns[i] == NULL) - continue; - - // Wait for the end0 to go to SWCFG - status = nvlink_core_poll_link_state(conns[i]->end0, - NVLINK_LINKSTATE_SAFE, - NVLINK_TRANSITION_SAFE_TIMEOUT); - if (status != NVL_SUCCESS) - { - NVLINK_PRINT((DBG_MODULE_NVLINK_CORE, NVLINK_DBG_LEVEL_ERRORS, - "%s: Unable to set endpoint %s:%s in SWCFG\n", - __FUNCTION__, conns[i]->end0->dev->deviceName, conns[i]->end0->linkName)); - } - - // Wait for the end1 to go to SWCFG - status = nvlink_core_poll_link_state(conns[i]->end1, - NVLINK_LINKSTATE_SAFE, - NVLINK_TRANSITION_SAFE_TIMEOUT); - if (status != NVL_SUCCESS) + // + // All the endpoints should now either be in SWCFG or transitioning to SWCFG. Poll for all + // endpoints to reach SWCFG. If any endpoint does not transition to SWCFG, return error + // + for (i = 0; i < connCount; i++) { - NVLINK_PRINT((DBG_MODULE_NVLINK_CORE, NVLINK_DBG_LEVEL_ERRORS, - "%s: Unable to set endpoint %s:%s in SWCFG\n", - __FUNCTION__, conns[i]->end1->dev->deviceName, conns[i]->end1->linkName)); - } - } + if (conns[i] == NULL) + continue; - // STEP 3: Change sub-link state to SAFE on all endpoints - for (i = 0; i < connCount; i++) - { - if (conns[i] == NULL) - continue; + // Wait for the end0 to go to SWCFG + status = nvlink_core_poll_link_state(conns[i]->end0, + NVLINK_LINKSTATE_SAFE, + NVLINK_TRANSITION_SAFE_TIMEOUT); + if (status != NVL_SUCCESS) + { + NVLINK_PRINT((DBG_MODULE_NVLINK_CORE, NVLINK_DBG_LEVEL_ERRORS, + "%s: Unable to set endpoint %s:%s in SWCFG\n", + __FUNCTION__, conns[i]->end0->dev->deviceName, conns[i]->end0->linkName)); + } - conns[i]->end0->link_handlers->set_tx_mode(conns[i]->end0, - NVLINK_SUBLINK_STATE_TX_SAFE, - flags); + // Wait for the end1 to go to SWCFG + status = nvlink_core_poll_link_state(conns[i]->end1, + NVLINK_LINKSTATE_SAFE, + NVLINK_TRANSITION_SAFE_TIMEOUT); + if (status != NVL_SUCCESS) + { + NVLINK_PRINT((DBG_MODULE_NVLINK_CORE, NVLINK_DBG_LEVEL_ERRORS, + "%s: Unable to set endpoint %s:%s in SWCFG\n", + __FUNCTION__, conns[i]->end1->dev->deviceName, conns[i]->end1->linkName)); + } + } - // Only send if not in loopback - if (conns[i]->end0 != conns[i]->end1) + // STEP 3: Change sub-link state to SAFE on all endpoints + for (i = 0; i < connCount; i++) { - conns[i]->end1->link_handlers->set_tx_mode(conns[i]->end1, - NVLINK_SUBLINK_STATE_TX_SAFE, - flags); - } - } + if (conns[i] == NULL) + continue; - // Poll for all endpoints sub-link state to reach SAFE - for (i = 0; i < connCount; i++) - { - if (conns[i] == NULL) - continue; + conns[i]->end0->link_handlers->set_tx_mode(conns[i]->end0, + NVLINK_SUBLINK_STATE_TX_SAFE, + flags); - // Wait for sublinks to go to SAFE - status = nvlink_core_poll_sublink_state(conns[i]->end0, - NVLINK_SUBLINK_STATE_TX_SAFE, - NVLINK_SUBLINK_SUBSTATE_TX_STABLE, - conns[i]->end1, - NVLINK_SUBLINK_STATE_RX_SAFE, - NVLINK_SUBLINK_SUBSTATE_RX_STABLE, - NVLINK_TRANSITION_SAFE_TIMEOUT); - if (status != NVL_SUCCESS) - { - NVLINK_PRINT((DBG_MODULE_NVLINK_CORE, NVLINK_DBG_LEVEL_ERRORS, - "%s: Unable to set sublinks to SAFE\n", - __FUNCTION__)); + // Only send if not in loopback + if (conns[i]->end0 != conns[i]->end1) + { + conns[i]->end1->link_handlers->set_tx_mode(conns[i]->end1, + NVLINK_SUBLINK_STATE_TX_SAFE, + flags); + } } - status = nvlink_core_poll_sublink_state(conns[i]->end1, - NVLINK_SUBLINK_STATE_TX_SAFE, - NVLINK_SUBLINK_SUBSTATE_TX_STABLE, - conns[i]->end0, - NVLINK_SUBLINK_STATE_RX_SAFE, - NVLINK_SUBLINK_SUBSTATE_RX_STABLE, - NVLINK_TRANSITION_SAFE_TIMEOUT); - if (status != NVL_SUCCESS) + // Poll for all endpoints sub-link state to reach SAFE + for (i = 0; i < connCount; i++) { - NVLINK_PRINT((DBG_MODULE_NVLINK_CORE, NVLINK_DBG_LEVEL_ERRORS, - "%s: Unable to set sublinks to SAFE\n", - __FUNCTION__)); + if (conns[i] == NULL) + continue; + + // Wait for sublinks to go to SAFE + status = nvlink_core_poll_sublink_state(conns[i]->end0, + NVLINK_SUBLINK_STATE_TX_SAFE, + NVLINK_SUBLINK_SUBSTATE_TX_STABLE, + conns[i]->end1, + NVLINK_SUBLINK_STATE_RX_SAFE, + NVLINK_SUBLINK_SUBSTATE_RX_STABLE, + NVLINK_TRANSITION_SAFE_TIMEOUT); + if (status != NVL_SUCCESS) + { + NVLINK_PRINT((DBG_MODULE_NVLINK_CORE, NVLINK_DBG_LEVEL_ERRORS, + "%s: Unable to set sublinks to SAFE\n", + __FUNCTION__)); + } + + status = nvlink_core_poll_sublink_state(conns[i]->end1, + NVLINK_SUBLINK_STATE_TX_SAFE, + NVLINK_SUBLINK_SUBSTATE_TX_STABLE, + conns[i]->end0, + NVLINK_SUBLINK_STATE_RX_SAFE, + NVLINK_SUBLINK_SUBSTATE_RX_STABLE, + NVLINK_TRANSITION_SAFE_TIMEOUT); + if (status != NVL_SUCCESS) + { + NVLINK_PRINT((DBG_MODULE_NVLINK_CORE, NVLINK_DBG_LEVEL_ERRORS, + "%s: Unable to set sublinks to SAFE\n", + __FUNCTION__)); + } } } diff --git a/src/common/nvlink/kernel/nvlink/interface/nvlink_ioctl_entry.c b/src/common/nvlink/kernel/nvlink/interface/nvlink_ioctl_entry.c index 6b2aedf579..7bd41b307e 100644 --- a/src/common/nvlink/kernel/nvlink/interface/nvlink_ioctl_entry.c +++ b/src/common/nvlink/kernel/nvlink/interface/nvlink_ioctl_entry.c @@ -2602,7 +2602,7 @@ nvlink_lib_ctrl_train_intranode_conns_parallel case nvlink_train_conn_off_to_active_ali_non_blocking: case nvlink_train_conn_off_to_active_ali_blocking: { - if (srcLink->version >= NVLINK_DEVICE_VERSION_40 && + if (srcLink->version == NVLINK_DEVICE_VERSION_40 && srcLink->dev->enableALI) { status = nvlink_core_train_intranode_conns_from_off_to_active_ALI( diff --git a/src/common/nvlink/kernel/nvlink/interface/nvlink_kern_shutdown_entry.c b/src/common/nvlink/kernel/nvlink/interface/nvlink_kern_shutdown_entry.c index 80c0f6527c..b6e838f127 100644 --- a/src/common/nvlink/kernel/nvlink/interface/nvlink_kern_shutdown_entry.c +++ b/src/common/nvlink/kernel/nvlink/interface/nvlink_kern_shutdown_entry.c @@ -378,21 +378,6 @@ nvlink_lib_powerdown_links_from_active_to_off lockLinkCount++; } - if (lockLinkCount == 0) - { - if (conns != NULL) - nvlink_free((void *)conns); - - if (lockLinks != NULL) - nvlink_free((void *)lockLinks); - - // Release the top-level lock - nvlink_lib_top_lock_release(); - NVLINK_PRINT((DBG_MODULE_NVLINK_CORE, NVLINK_DBG_LEVEL_ERRORS, - "%s: No conns were found\n", __FUNCTION__)); - return NVL_NOT_FOUND; - } - // Acquire the per-link locks for all links captured status = nvlink_lib_link_locks_acquire(lockLinks, lockLinkCount); if (status != NVL_SUCCESS) @@ -938,3 +923,4 @@ nvlink_lib_powerdown_floorswept_links_to_off return status; } + diff --git a/src/common/nvswitch/common/inc/soe/soeifcore.h b/src/common/nvswitch/common/inc/soe/soeifcore.h index 1e1056cd48..a41a9c32d4 100644 --- a/src/common/nvswitch/common/inc/soe/soeifcore.h +++ b/src/common/nvswitch/common/inc/soe/soeifcore.h @@ -208,6 +208,13 @@ typedef struct NvBool bEnable; } RM_SOE_CORE_CMD_NPORT_INTRS; +typedef struct +{ + NvU8 cmdType; + NvU32 nport; + NvBool bStop; +} RM_SOE_CORE_CMD_INGRESS_STOP; + typedef struct { NvU8 cmdType; @@ -284,6 +291,7 @@ typedef union RM_SOE_CORE_CMD_WRITE_CPLD writeCpld; RM_SOE_CORE_CMD_PERFORM_ONBOARD_PHASE performOnboardPhase; RM_SOE_CORE_CMD_NPORT_FATAL_INTR nportDisableIntr; + RM_SOE_CORE_CMD_INGRESS_STOP ingressStop; } RM_SOE_CORE_CMD; typedef struct diff --git a/src/common/nvswitch/kernel/inc/haldef_nvswitch.h b/src/common/nvswitch/kernel/inc/haldef_nvswitch.h index ea0d874fd3..5c8dd78b65 100644 --- a/src/common/nvswitch/kernel/inc/haldef_nvswitch.h +++ b/src/common/nvswitch/kernel/inc/haldef_nvswitch.h @@ -288,6 +288,7 @@ _op(NvlStatus, nvswitch_fsp_error_code_to_nvlstatus_map, (nvswitch_device *device, NvU32 errorCode), _arch) \ _op(NvlStatus, nvswitch_fsp_get_packet_info, (nvswitch_device *device, NvU8 *pBuffer, NvU32 size, NvU8 *pPacketState, NvU8 *pTag), _arch) \ _op(NvlStatus, nvswitch_fsprpc_get_caps, (nvswitch_device *device, NVSWITCH_FSPRPC_GET_CAPS_PARAMS *params), _arch) \ + _op(NvlStatus, nvswitch_soe_issue_ingress_stop, (nvswitch_device *device, NvU32 nport, NvBool bStop), _arch) \ _op(NvlStatus, nvswitch_detect_tnvl_mode, (nvswitch_device *device), _arch) \ _op(NvBool, nvswitch_is_tnvl_mode_enabled, (nvswitch_device *device), _arch) \ _op(NvBool, nvswitch_is_tnvl_mode_locked, (nvswitch_device *device), _arch) \ diff --git a/src/common/nvswitch/kernel/inc/intr_nvswitch.h b/src/common/nvswitch/kernel/inc/intr_nvswitch.h index 5b4a5e52d2..0e2420c898 100644 --- a/src/common/nvswitch/kernel/inc/intr_nvswitch.h +++ b/src/common/nvswitch/kernel/inc/intr_nvswitch.h @@ -42,7 +42,8 @@ __FUNCTION__, __LINE__, _unhandled); \ NVSWITCH_PRINT_SXID(_device, \ NVSWITCH_ERR_HW_HOST_UNHANDLED_INTERRUPT, \ - "Fatal, unhandled interrupt\n"); \ + "Fatal, unhandled interrupt in %s(%d)\n", \ + __FUNCTION__, __LINE__); \ NVSWITCH_LOG_FATAL_DATA(_device, _HW, \ _HW_HOST_UNHANDLED_INTERRUPT, 0, 0, NV_FALSE, &_unhandled);\ } \ diff --git a/src/common/nvswitch/kernel/inc/lr10/soe_lr10.h b/src/common/nvswitch/kernel/inc/lr10/soe_lr10.h index b29954b42c..af3b757694 100644 --- a/src/common/nvswitch/kernel/inc/lr10/soe_lr10.h +++ b/src/common/nvswitch/kernel/inc/lr10/soe_lr10.h @@ -62,5 +62,6 @@ void nvswitch_soe_unregister_events_lr10(nvswitch_device *device); void nvswitch_therm_soe_callback_lr10(nvswitch_device *device, union RM_FLCN_MSG *pMsg, void *pParams, NvU32 seqDesc, NV_STATUS status); NvlStatus nvswitch_soe_register_event_callbacks_lr10(nvswitch_device *device); -void nvswitch_soe_init_l2_state_lr10(nvswitch_device *device); +void nvswitch_soe_init_l2_state_lr10(nvswitch_device *device); +NvlStatus nvswitch_soe_issue_ingress_stop_lr10(nvswitch_device *device, NvU32 nport, NvBool bStop); #endif //_SOE_LR10_H_ diff --git a/src/common/nvswitch/kernel/inc/ls10/ls10.h b/src/common/nvswitch/kernel/inc/ls10/ls10.h index 3bea3ba535..427dd92bfb 100644 --- a/src/common/nvswitch/kernel/inc/ls10/ls10.h +++ b/src/common/nvswitch/kernel/inc/ls10/ls10.h @@ -188,7 +188,7 @@ #define SOE_VBIOS_VERSION_MASK 0xFF0000 #define SOE_VBIOS_REVLOCK_DISABLE_NPORT_FATAL_INTR 0x370000 -#define SOE_VBIOS_REVLOCK_ISSUE_INGRESS_STOP 0x440000 +#define SOE_VBIOS_REVLOCK_ISSUE_INGRESS_STOP 0x4C0000 // LS10 Saved LED state #define ACCESS_LINK_LED_STATE CPLD_MACHXO3_ACCESS_LINK_LED_CTL_NVL_CABLE_LED @@ -220,12 +220,6 @@ #define NVSWITCH_MINION_WR32_BCAST_LS10(_d, _dev, _reg, _data) \ NVSWITCH_ENG_WR32(_d, MINION, _BCAST, 0, _dev, _reg, _data) -#define NVSWITCH_NPG_WR32_LS10(_d, _engidx, _dev, _reg, _data) \ - NVSWITCH_ENG_WR32(_d, NPG, , _engidx, _dev, _reg, _data) - -#define NVSWITCH_NPG_RD32_LS10(_d, _engidx, _dev, _reg) \ - NVSWITCH_ENG_RD32(_d, NPG, , _engidx, _dev, _reg) - // // Per-chip device information // @@ -613,6 +607,7 @@ typedef struct // Nvlink error reporting management NVLINK_LINK_ERROR_REPORTING deferredLinkErrors[NVSWITCH_NUM_LINKS_LS10]; + NVSWITCH_DEFERRED_ERROR_REPORTING_ARGS deferredLinkErrorsArgs[NVSWITCH_NUM_LINKS_LS10]; } ls10_device; @@ -857,7 +852,6 @@ typedef const struct #define nvswitch_link_lane_reversed_ls10 nvswitch_link_lane_reversed_lr10 -#define nvswitch_i2c_get_port_info_ls10 nvswitch_i2c_get_port_info_lr10 #define nvswitch_i2c_set_hw_speed_mode_ls10 nvswitch_i2c_set_hw_speed_mode_lr10 #define nvswitch_ctrl_get_err_info_ls10 nvswitch_ctrl_get_err_info_lr10 @@ -938,6 +932,7 @@ NvlStatus nvswitch_request_tl_link_state_lr10(nvlink_link *link, NvU32 tlLinkSta NvlStatus nvswitch_wait_for_tl_request_ready_lr10(nvlink_link *link); NvlStatus nvswitch_parse_bios_image_lr10(nvswitch_device *device); +NvU32 nvswitch_i2c_get_port_info_ls10(nvswitch_device *device, NvU32 port); NvU32 nvswitch_i2c_get_port_info_lr10(nvswitch_device *device, NvU32 port); void nvswitch_i2c_set_hw_speed_mode_lr10(nvswitch_device *device, NvU32 port, NvU32 speedMode); NvlStatus nvswitch_ctrl_i2c_indexed_lr10(nvswitch_device *device, NVSWITCH_CTRL_I2C_INDEXED_PARAMS *pParams); diff --git a/src/common/nvswitch/kernel/inc/ls10/soe_ls10.h b/src/common/nvswitch/kernel/inc/ls10/soe_ls10.h index abdc5f3c6d..c693379024 100644 --- a/src/common/nvswitch/kernel/inc/ls10/soe_ls10.h +++ b/src/common/nvswitch/kernel/inc/ls10/soe_ls10.h @@ -50,5 +50,5 @@ void nvswitch_heartbeat_soe_callback_ls10(nvswitch_device *device, RM_FLCN_ NvlStatus nvswitch_soe_set_nport_interrupts_ls10(nvswitch_device *device, NvU32 nport, NvBool bEnable); void nvswitch_soe_disable_nport_fatal_interrupts_ls10(nvswitch_device *device, NvU32 nport, NvU32 nportIntrEnable, NvU8 nportIntrType); - +NvlStatus nvswitch_soe_issue_ingress_stop_ls10(nvswitch_device *device, NvU32 nport, NvBool bStop); #endif //_SOE_LS10_H_ diff --git a/src/common/nvswitch/kernel/lr10/lr10.c b/src/common/nvswitch/kernel/lr10/lr10.c index 1b7adae4bf..15e6ee1f5e 100644 --- a/src/common/nvswitch/kernel/lr10/lr10.c +++ b/src/common/nvswitch/kernel/lr10/lr10.c @@ -2419,6 +2419,7 @@ nvswitch_ctrl_set_routing_id_valid_lr10 NvU32 ram_address = p->firstIndex; NvU32 i; NvU32 ram_size; + NvlStatus retval; if (!NVSWITCH_IS_LINK_ENG_VALID_LR10(device, NPORT, p->portNum)) { @@ -2441,6 +2442,15 @@ nvswitch_ctrl_set_routing_id_valid_lr10 return -NVL_BAD_ARGS; } + // Stop traffic on the port + retval = nvswitch_soe_issue_ingress_stop(device, p->portNum, NV_TRUE); + if (retval != NVL_SUCCESS) + { + NVSWITCH_PRINT(device, ERROR, + "Failed to stop traffic on nport %d\n", p->portNum); + return retval; + } + // Select RID RAM and disable Auto Increment. rid_ctrl = DRF_DEF(_INGRESS, _REQRSPMAPADDR, _RAM_SEL, _SELECTSRIDROUTERAM) | @@ -2472,6 +2482,14 @@ nvswitch_ctrl_set_routing_id_valid_lr10 NVSWITCH_LINK_WR32_LR10(device, p->portNum, NPORT, _INGRESS, _RIDTABDATA0, rid_tab_data0); } + // Allow traffic on the port + retval = nvswitch_soe_issue_ingress_stop(device, p->portNum, NV_FALSE); + if (retval != NVL_SUCCESS) + { + NVSWITCH_PRINT(device, ERROR, + "Failed to restart traffic on nport %d\n", p->portNum); + return retval; + } return NVL_SUCCESS; } @@ -2543,8 +2561,26 @@ nvswitch_ctrl_set_routing_id_lr10 } } + // Stop traffic on the port + retval = nvswitch_soe_issue_ingress_stop(device, p->portNum, NV_TRUE); + if (retval != NVL_SUCCESS) + { + NVSWITCH_PRINT(device, ERROR, + "Failed to stop traffic on nport %d\n", p->portNum); + return retval; + } + _nvswitch_set_routing_id_lr10(device, p->portNum, p->firstIndex, p->numEntries, p->routingId); + // Allow traffic on the port + retval = nvswitch_soe_issue_ingress_stop(device, p->portNum, NV_FALSE); + if (retval != NVL_SUCCESS) + { + NVSWITCH_PRINT(device, ERROR, + "Failed to restart traffic on nport %d\n", p->portNum); + return retval; + } + return retval; } @@ -2702,8 +2738,26 @@ nvswitch_ctrl_set_routing_lan_lr10 } } + // Stop traffic on the port + retval = nvswitch_soe_issue_ingress_stop(device, p->portNum, NV_TRUE); + if (retval != NVL_SUCCESS) + { + NVSWITCH_PRINT(device, ERROR, + "Failed to stop traffic on nport %d\n", p->portNum); + return retval; + } + _nvswitch_set_routing_lan_lr10(device, p->portNum, p->firstIndex, p->numEntries, p->routingLan); + // Allow traffic on the port + retval = nvswitch_soe_issue_ingress_stop(device, p->portNum, NV_FALSE); + if (retval != NVL_SUCCESS) + { + NVSWITCH_PRINT(device, ERROR, + "Failed to restart traffic on nport %d\n", p->portNum); + return retval; + } + return retval; } @@ -2907,6 +2961,7 @@ nvswitch_ctrl_set_routing_lan_valid_lr10 NvU32 ram_address = p->firstIndex; NvU32 i; NvU32 ram_size; + NvlStatus retval; if (!NVSWITCH_IS_LINK_ENG_VALID_LR10(device, NPORT, p->portNum)) { @@ -2929,6 +2984,15 @@ nvswitch_ctrl_set_routing_lan_valid_lr10 return -NVL_BAD_ARGS; } + // Stop traffic on the port + retval = nvswitch_soe_issue_ingress_stop(device, p->portNum, NV_TRUE); + if (retval != NVL_SUCCESS) + { + NVSWITCH_PRINT(device, ERROR, + "Failed to stop traffic on nport %d\n", p->portNum); + return retval; + } + // Select RLAN RAM and disable Auto Increament. rlan_ctrl = DRF_DEF(_INGRESS, _REQRSPMAPADDR, _RAM_SEL, _SELECTSRLANROUTERAM) | @@ -2959,6 +3023,15 @@ nvswitch_ctrl_set_routing_lan_valid_lr10 NVSWITCH_LINK_WR32_LR10(device, p->portNum, NPORT, _INGRESS, _RLANTABDATA0, rlan_tab_data[0]); } + // Allow traffic on the port + retval = nvswitch_soe_issue_ingress_stop(device, p->portNum, NV_FALSE); + if (retval != NVL_SUCCESS) + { + NVSWITCH_PRINT(device, ERROR, + "Failed to restart traffic on nport %d\n", p->portNum); + return retval; + } + return NVL_SUCCESS; } diff --git a/src/common/nvswitch/kernel/lr10/soe_lr10.c b/src/common/nvswitch/kernel/lr10/soe_lr10.c index 70d21eeb70..41c270c155 100644 --- a/src/common/nvswitch/kernel/lr10/soe_lr10.c +++ b/src/common/nvswitch/kernel/lr10/soe_lr10.c @@ -2552,6 +2552,18 @@ _soeWaitForInitAck_LR10 return NV_OK; } +NvlStatus +nvswitch_soe_issue_ingress_stop_lr10 +( + nvswitch_device *device, + NvU32 nport, + NvBool bStop +) +{ + // Not supported on LR10 + return NVL_SUCCESS; +} + /*! * @brief set hal function pointers for functions defined in LR10 (i.e. this file) * diff --git a/src/common/nvswitch/kernel/ls10/discovery_ls10.c b/src/common/nvswitch/kernel/ls10/discovery_ls10.c index 650396e02e..01af0303d2 100644 --- a/src/common/nvswitch/kernel/ls10/discovery_ls10.c +++ b/src/common/nvswitch/kernel/ls10/discovery_ls10.c @@ -1354,7 +1354,6 @@ nvswitch_process_discovery_ls10 NVSWITCH_PRINT(device, SETUP, "%s: Disable link #%d\n", __FUNCTION__, i); - nvswitch_link_disable_interrupts_ls10(device, i); device->link[i].valid = NV_FALSE; chip_device->engNPORT[i].valid = NV_FALSE; chip_device->engNPORT_PERFMON[i].valid = NV_FALSE; diff --git a/src/common/nvswitch/kernel/ls10/intr_ls10.c b/src/common/nvswitch/kernel/ls10/intr_ls10.c index 055dc72682..9157e1cbab 100644 --- a/src/common/nvswitch/kernel/ls10/intr_ls10.c +++ b/src/common/nvswitch/kernel/ls10/intr_ls10.c @@ -135,6 +135,7 @@ _nvswitch_initialize_nvlipt_interrupts_ls10 { NvU32 i; NvU32 regval = 0; + NvU64 link_enable_mask; // // NVLipt interrupt routing (NVLIPT_COMMON, NVLIPT_LNK, NVLDL, NVLTLC) @@ -234,6 +235,24 @@ _nvswitch_initialize_nvlipt_interrupts_ls10 regval = DRF_DEF(_CPR_SYS, _NVLW_INTR_2_MASK, _CPR_INTR, _DISABLE) | DRF_DEF(_CPR_SYS, _NVLW_INTR_2_MASK, _INTR2, _ENABLE); NVSWITCH_ENG_WR32(device, CPR, _BCAST, 0, _CPR_SYS, _NVLW_INTR_2_MASK, regval); + + // + // Disable engine interrupts requested by regkey "LinkEnableMask". + // All the links are enabled by default. + // + link_enable_mask = ((NvU64)device->regkeys.link_enable_mask2 << 32 | + (NvU64)device->regkeys.link_enable_mask); + + for (i = 0; i < NVSWITCH_NUM_LINKS_LS10; i++) + { + if ((NVBIT64(i) & link_enable_mask) == 0) + { + NVSWITCH_PRINT(device, SETUP, + "%s: Disabling interrupts for link #%d\n", + __FUNCTION__, i); + nvswitch_link_disable_interrupts_ls10(device, i); + } + } } static void @@ -5860,8 +5879,6 @@ _nvswitch_deferred_link_state_check_ls10 // Sanity Check NVSWITCH_ASSERT(nvswitch_is_link_valid(device, link)); - nvswitch_os_free(pErrorReportParams); - pErrorReportParams = NULL; chip_device->deferredLinkErrors[link].state.bLinkStateCallBackEnabled = NV_FALSE; bRedeferLinkStateCheck = NV_FALSE; @@ -5922,18 +5939,17 @@ nvswitch_create_deferred_link_state_check_task_ls10 } status = NVL_ERR_GENERIC; - pErrorReportParams = nvswitch_os_malloc(sizeof(NVSWITCH_DEFERRED_ERROR_REPORTING_ARGS)); - if(pErrorReportParams != NULL) - { - pErrorReportParams->nvlipt_instance = nvlipt_instance; - pErrorReportParams->link = link; - - status = nvswitch_task_create_args(device, (void*)pErrorReportParams, - &_nvswitch_deferred_link_state_check_ls10, - NVSWITCH_DEFERRED_LINK_STATE_CHECK_INTERVAL_NS, - NVSWITCH_TASK_TYPE_FLAGS_RUN_ONCE | - NVSWITCH_TASK_TYPE_FLAGS_VOID_PTR_ARGS); - } + pErrorReportParams = &chip_device->deferredLinkErrorsArgs[link]; + nvswitch_os_memset(pErrorReportParams, 0, sizeof(NVSWITCH_DEFERRED_ERROR_REPORTING_ARGS)); + + pErrorReportParams->nvlipt_instance = nvlipt_instance; + pErrorReportParams->link = link; + + status = nvswitch_task_create_args(device, (void*)pErrorReportParams, + &_nvswitch_deferred_link_state_check_ls10, + NVSWITCH_DEFERRED_LINK_STATE_CHECK_INTERVAL_NS, + NVSWITCH_TASK_TYPE_FLAGS_RUN_ONCE | + NVSWITCH_TASK_TYPE_FLAGS_VOID_PTR_ARGS); if (status == NVL_SUCCESS) { @@ -5946,7 +5962,6 @@ nvswitch_create_deferred_link_state_check_task_ls10 __FUNCTION__); _nvswitch_emit_deferred_link_errors_ls10(device, nvlipt_instance, link); _nvswitch_clear_deferred_link_errors_ls10(device, link); - nvswitch_os_free(pErrorReportParams); } } @@ -5964,9 +5979,6 @@ _nvswitch_deferred_link_errors_check_ls10 ls10_device *chip_device; NvU32 pending; - nvswitch_os_free(pErrorReportParams); - pErrorReportParams = NULL; - chip_device = NVSWITCH_GET_CHIP_DEVICE_LS10(device); chip_device->deferredLinkErrors[link].state.bLinkErrorsCallBackEnabled = NV_FALSE; @@ -6007,18 +6019,18 @@ _nvswitch_create_deferred_link_errors_task_ls10 } status = NVL_ERR_GENERIC; - pErrorReportParams = nvswitch_os_malloc(sizeof(NVSWITCH_DEFERRED_ERROR_REPORTING_ARGS)); - if(pErrorReportParams != NULL) - { - pErrorReportParams->nvlipt_instance = nvlipt_instance; - pErrorReportParams->link = link; - - status = nvswitch_task_create_args(device, (void*)pErrorReportParams, - &_nvswitch_deferred_link_errors_check_ls10, - NVSWITCH_DEFERRED_FAULT_UP_CHECK_INTERVAL_NS, - NVSWITCH_TASK_TYPE_FLAGS_RUN_ONCE | - NVSWITCH_TASK_TYPE_FLAGS_VOID_PTR_ARGS); - } + pErrorReportParams = &chip_device->deferredLinkErrorsArgs[link]; + nvswitch_os_memset(pErrorReportParams, 0, sizeof(NVSWITCH_DEFERRED_ERROR_REPORTING_ARGS)); + + pErrorReportParams->nvlipt_instance = nvlipt_instance; + pErrorReportParams->link = link; + + status = nvswitch_task_create_args(device, (void*)pErrorReportParams, + &_nvswitch_deferred_link_errors_check_ls10, + NVSWITCH_DEFERRED_FAULT_UP_CHECK_INTERVAL_NS, + NVSWITCH_TASK_TYPE_FLAGS_RUN_ONCE | + NVSWITCH_TASK_TYPE_FLAGS_VOID_PTR_ARGS); + if (status == NVL_SUCCESS) { @@ -6031,7 +6043,6 @@ _nvswitch_create_deferred_link_errors_task_ls10 __FUNCTION__); _nvswitch_emit_deferred_link_errors_ls10(device, nvlipt_instance, link); _nvswitch_clear_deferred_link_errors_ls10(device, link); - nvswitch_os_free(pErrorReportParams); } } diff --git a/src/common/nvswitch/kernel/ls10/link_ls10.c b/src/common/nvswitch/kernel/ls10/link_ls10.c index a7dcb066ea..f9ddbf1b67 100644 --- a/src/common/nvswitch/kernel/ls10/link_ls10.c +++ b/src/common/nvswitch/kernel/ls10/link_ls10.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -148,9 +148,9 @@ nvswitch_init_lpwr_regs_ls10 if (status != NVL_SUCCESS) { NVSWITCH_PRINT(device, ERROR, "%s: Failed to set L1 Threshold\n", - __FUNCTION__); + __FUNCTION__); } - } +} void nvswitch_corelib_training_complete_ls10 @@ -708,8 +708,16 @@ nvswitch_init_buffer_ready_ls10 FLD_TEST_DRF(_SWITCH_REGKEY, _SKIP_BUFFER_READY, _NPORT, _NO, device->regkeys.skip_buffer_ready)) { - val = DRF_NUM(_NPORT, _CTRL_BUFFER_READY, _BUFFERRDY, 0x1); - NVSWITCH_LINK_WR32_LS10(device, linkNum, NPORT, _NPORT, _CTRL_BUFFER_READY, val); + if (nvswitch_is_tnvl_mode_locked(device)) + { + NVSWITCH_PRINT(device, ERROR, + "%s(%d): Security locked\n", __FUNCTION__, __LINE__); + } + else + { + val = DRF_NUM(_NPORT, _CTRL_BUFFER_READY, _BUFFERRDY, 0x1); + NVSWITCH_LINK_WR32_LS10(device, linkNum, NPORT, _NPORT, _CTRL_BUFFER_READY, val); + } } } @@ -1438,7 +1446,7 @@ nvswitch_load_link_disable_settings_ls10 nvswitch_device *device, nvlink_link *link ) -{ +{ NvU32 regVal; // Read state from NVLIPT HW @@ -1447,8 +1455,15 @@ nvswitch_load_link_disable_settings_ls10 if (FLD_TEST_DRF(_NVLIPT_LNK, _CTRL_LINK_STATE_STATUS, _CURRENTLINKSTATE, _DISABLE, regVal)) { - NVSWITCH_ASSERT(!cciIsLinkManaged(device, link->linkNumber)); + if(cciIsLinkManaged(device, link->linkNumber)) + { + NVSWITCH_PRINT(device, ERROR, + "%s: link #%d is cci managed and should not be disabled.\n", + __FUNCTION__, link->linkNumber); + return; + } + // Set link to invalid and unregister from corelib device->link[link->linkNumber].valid = NV_FALSE; nvlink_lib_unregister_link(link); @@ -1594,7 +1609,7 @@ nvswitch_reset_and_train_link_ls10 link_intr_subcode = DRF_VAL(_NVLSTAT, _MN00, _LINK_INTR_SUBCODE, stat_data); if ((link_state == NV_NVLIPT_LNK_CTRL_LINK_STATE_REQUEST_STATUS_MINION_REQUEST_FAIL) && - (link_intr_subcode == MINION_ALARM_BUSY)) + (link_intr_subcode == MINION_ALARM_BUSY)) { status = nvswitch_request_tl_link_state_ls10(link, @@ -1785,8 +1800,8 @@ nvswitch_request_tl_link_state_ls10 { keepPolling = (nvswitch_timeout_check(&timeout)) ? NV_FALSE : NV_TRUE; - // Check for state requested - linkStatus = NVSWITCH_LINK_RD32_LS10(device, link->linkNumber, + // Check for state requested + linkStatus = NVSWITCH_LINK_RD32_LS10(device, link->linkNumber, NVLIPT_LNK , _NVLIPT_LNK , _CTRL_LINK_STATE_STATUS); if (DRF_VAL(_NVLIPT_LNK, _CTRL_LINK_STATE_STATUS, _CURRENTLINKSTATE, linkStatus) == @@ -1807,18 +1822,17 @@ nvswitch_request_tl_link_state_ls10 linkStatus = NVSWITCH_LINK_RD32_LS10(device, link->linkNumber, NVLIPT_LNK , _NVLIPT_LNK , _CTRL_LINK_STATE_STATUS); - if (DRF_VAL(_NVLIPT_LNK, _CTRL_LINK_STATE_STATUS, _CURRENTLINKSTATE, linkStatus) != - tlLinkState) - { - NVSWITCH_PRINT(device, ERROR, - "%s: TL link state request to state 0x%x for link #%d did not complete!\n", - __FUNCTION__, tlLinkState, link->linkNumber); - return -NVL_ERR_GENERIC; + if (DRF_VAL(_NVLIPT_LNK, _CTRL_LINK_STATE_STATUS, _CURRENTLINKSTATE, linkStatus) != + tlLinkState) + { + NVSWITCH_PRINT(device, ERROR, + "%s: TL link state request to state 0x%x for link #%d did not complete!\n", + __FUNCTION__, tlLinkState, link->linkNumber); + return -NVL_ERR_GENERIC; + } } } - } - return status; } diff --git a/src/common/nvswitch/kernel/ls10/ls10.c b/src/common/nvswitch/kernel/ls10/ls10.c index cc7edba468..749bace96a 100644 --- a/src/common/nvswitch/kernel/ls10/ls10.c +++ b/src/common/nvswitch/kernel/ls10/ls10.c @@ -1232,6 +1232,13 @@ nvswitch_internal_latency_bin_log_ls10 return; } + if (nvswitch_is_tnvl_mode_locked(device)) + { + NVSWITCH_PRINT(device, ERROR, + "%s(%d): Security locked\n", __FUNCTION__, __LINE__); + return; + } + time_nsec = nvswitch_os_get_platform_time(); last_visited_time_nsec = chip_device->latency_stats->last_visited_time_nsec; @@ -1568,7 +1575,6 @@ _nvswitch_reset_and_drain_links_ls10 // // Step 4.0 : Send command to SOE to perform the following steps : // - Backup NPORT state before reset - // - Set the INGRESS_STOP bit of CTRL_STOP (0x48) // - Assert debug_clear for the given port NPORT by writing to the // DEBUG_CLEAR (0x144) register // - Assert NPortWarmReset[i] using the WARMRESET (0x140) register @@ -1641,7 +1647,6 @@ _nvswitch_reset_and_drain_links_ls10 // // Step 6.0 : Send command to SOE to perform the following steps : - // - Clear the INGRESS_STOP bit of CTRL_STOP (0x48) // - Clear the CONTAIN_AND_DRAIN (0x5c) status // - Assert NPORT INITIALIZATION and program the state tracking RAMS // - Restore NPORT state after reset @@ -3357,6 +3362,13 @@ _nvswitch_set_remap_policy_ls10 NvU32 address_limit; NvU32 rfunc; + if (nvswitch_is_tnvl_mode_locked(device)) + { + NVSWITCH_PRINT(device, ERROR, + "%s(%d): Security locked\n", __FUNCTION__, __LINE__); + return; + } + NVSWITCH_LINK_WR32_LS10(device, portNum, NPORT, _INGRESS, _REQRSPMAPADDR, DRF_NUM(_INGRESS, _REQRSPMAPADDR, _RAM_ADDRESS, firstIndex) | DRF_NUM(_INGRESS, _REQRSPMAPADDR, _RAM_SEL, remap_ram_sel) | @@ -3431,6 +3443,13 @@ _nvswitch_set_mc_remap_policy_ls10 NvU32 rfunc; NvU32 reflective; + if (nvswitch_is_tnvl_mode_locked(device)) + { + NVSWITCH_PRINT(device, ERROR, + "%s(%d): Security locked\n", __FUNCTION__, __LINE__); + return; + } + NVSWITCH_LINK_WR32_LS10(device, portNum, NPORT, _INGRESS, _MCREMAPTABADDR, DRF_NUM(_INGRESS, _MCREMAPTABADDR, _RAM_ADDRESS, firstIndex) | DRF_DEF(_INGRESS, _MCREMAPTABADDR, _AUTO_INCR, _ENABLE)); @@ -3702,13 +3721,38 @@ nvswitch_ctrl_set_remap_policy_ls10 } } + if (nvswitch_is_tnvl_mode_locked(device)) + { + NVSWITCH_PRINT(device, ERROR, + "%s(%d): Security locked\n", __FUNCTION__, __LINE__); + return -NVL_ERR_INSUFFICIENT_PERMISSIONS; + } + if (p->tableSelect == NVSWITCH_TABLE_SELECT_REMAP_MULTICAST) { _nvswitch_set_mc_remap_policy_ls10(device, p->portNum, p->firstIndex, p->numEntries, p->remapPolicy); } else { + // Stop traffic on the port + retval = nvswitch_soe_issue_ingress_stop(device, p->portNum, NV_TRUE); + if (retval != NVL_SUCCESS) + { + NVSWITCH_PRINT(device, ERROR, + "Failed to stop traffic on nport %d\n", p->portNum); + return retval; + } + _nvswitch_set_remap_policy_ls10(device, p->portNum, remap_ram_sel, p->firstIndex, p->numEntries, p->remapPolicy); + + // Allow traffic on the port + retval = nvswitch_soe_issue_ingress_stop(device, p->portNum, NV_FALSE); + if (retval != NVL_SUCCESS) + { + NVSWITCH_PRINT(device, ERROR, + "Failed to restart traffic on nport %d\n", p->portNum); + return retval; + } } return retval; @@ -3764,6 +3808,13 @@ nvswitch_ctrl_get_remap_policy_ls10 return -NVL_BAD_ARGS; } + if (nvswitch_is_tnvl_mode_locked(device)) + { + NVSWITCH_PRINT(device, ERROR, + "%s(%d): Security locked\n", __FUNCTION__, __LINE__); + return -NVL_ERR_INSUFFICIENT_PERMISSIONS; + } + nvswitch_os_memset(params->entry, 0, (NVSWITCH_REMAP_POLICY_ENTRIES_MAX * sizeof(NVSWITCH_REMAP_POLICY_ENTRY))); @@ -3938,6 +3989,22 @@ nvswitch_ctrl_set_remap_policy_valid_ls10 return -NVL_BAD_ARGS; } + if (nvswitch_is_tnvl_mode_locked(device)) + { + NVSWITCH_PRINT(device, ERROR, + "%s(%d): Security locked\n", __FUNCTION__, __LINE__); + return -NVL_ERR_INSUFFICIENT_PERMISSIONS; + } + + // Stop traffic on the port + retval = nvswitch_soe_issue_ingress_stop(device, p->portNum, NV_TRUE); + if (retval != NVL_SUCCESS) + { + NVSWITCH_PRINT(device, ERROR, + "Failed to stop traffic on nport %d\n", p->portNum); + return retval; + } + if (p->tableSelect == NVSWITCH_TABLE_SELECT_REMAP_MULTICAST) { for (i = 0; i < p->numEntries; i++) @@ -3996,6 +4063,15 @@ nvswitch_ctrl_set_remap_policy_valid_ls10 } } + // Allow traffic on the port + retval = nvswitch_soe_issue_ingress_stop(device, p->portNum, NV_FALSE); + if (retval != NVL_SUCCESS) + { + NVSWITCH_PRINT(device, ERROR, + "Failed to restart traffic on nport %d\n", p->portNum); + return retval; + } + return NVL_SUCCESS; } @@ -4113,6 +4189,13 @@ NvlStatus nvswitch_ctrl_get_mc_rid_table_ls10 return -NVL_BAD_ARGS; } + if (nvswitch_is_tnvl_mode_locked(device)) + { + NVSWITCH_PRINT(device, ERROR, + "%s(%d): Security locked\n", __FUNCTION__, __LINE__); + return -NVL_ERR_INSUFFICIENT_PERMISSIONS; + } + nvswitch_os_memset(&table_entry, 0, sizeof(NVSWITCH_MC_RID_ENTRY_LS10)); table_entry.index = (NvU8)p->index; @@ -4863,6 +4946,13 @@ nvswitch_ctrl_get_residency_bins_ls10 return -NVL_BAD_ARGS; } + if (nvswitch_is_tnvl_mode_locked(device)) + { + NVSWITCH_PRINT(device, ERROR, + "%s(%d): Security locked\n", __FUNCTION__, __LINE__); + return -NVL_ERR_INSUFFICIENT_PERMISSIONS; + } + if (p->table_select == NVSWITCH_TABLE_SELECT_MULTICAST) { // Snap the histogram @@ -4978,6 +5068,13 @@ nvswitch_ctrl_get_rb_stall_busy_ls10 return -NVL_BAD_ARGS; } + if (nvswitch_is_tnvl_mode_locked(device)) + { + NVSWITCH_PRINT(device, ERROR, + "%s(%d): Security locked\n", __FUNCTION__, __LINE__); + return -NVL_ERR_INSUFFICIENT_PERMISSIONS; + } + if (p->table_select == NVSWITCH_TABLE_SELECT_MULTICAST) { // Snap the histogram @@ -6189,7 +6286,7 @@ _nvswitch_set_led_state_ls10 regVal = FLD_SET_REF_NUM(CPLD_MACHXO3_ACCESS_LINK_LED_CTL_NVL_CABLE_LED, _nvswitch_get_led_state_regval_ls10(device, ledState), regVal); - + // Set state for LED retval = nvswitch_cci_ports_cpld_write(device, CPLD_MACHXO3_ACCESS_LINK_LED_CTL, regVal); if (retval != NVL_SUCCESS) diff --git a/src/common/nvswitch/kernel/ls10/minion_ls10.c b/src/common/nvswitch/kernel/ls10/minion_ls10.c index 0db7bb7cb4..69cfe07f63 100644 --- a/src/common/nvswitch/kernel/ls10/minion_ls10.c +++ b/src/common/nvswitch/kernel/ls10/minion_ls10.c @@ -208,6 +208,13 @@ nvswitch_minion_send_command_ls10 NVSWITCH_GET_LINK_ENG_INST(device, linkNumber, MINION), _MINION, _MISC_0, data); break; case NV_MINION_NVLINK_DL_CMD_COMMAND_INITPHASE1: + if (nvswitch_is_tnvl_mode_locked(device)) + { + NVSWITCH_PRINT(device, ERROR, + "%s(%d): Security locked\n", __FUNCTION__, __LINE__); + return -NVL_ERR_INSUFFICIENT_PERMISSIONS; + } + // // WAR bug 2708497 // Before INITPHASE1, we must clear these values, then set back to diff --git a/src/common/nvswitch/kernel/ls10/multicast_ls10.c b/src/common/nvswitch/kernel/ls10/multicast_ls10.c index faec64e036..649d763fad 100644 --- a/src/common/nvswitch/kernel/ls10/multicast_ls10.c +++ b/src/common/nvswitch/kernel/ls10/multicast_ls10.c @@ -1510,6 +1510,13 @@ nvswitch_mc_invalidate_mc_rid_entry_ls10 return -NVL_BAD_ARGS; } + if (nvswitch_is_tnvl_mode_locked(device)) + { + NVSWITCH_PRINT(device, ERROR, + "%s(%d): Security locked\n", __FUNCTION__, __LINE__); + return -NVL_ERR_INSUFFICIENT_PERMISSIONS; + } + if (use_extended_table) reg = FLD_SET_DRF(_ROUTE, _RIDTABADDR, _RAM_SEL, _SELECTSEXTMCRIDROUTERAM, 0); else @@ -1608,6 +1615,13 @@ nvswitch_mc_program_mc_rid_entry_ls10 return -NVL_BAD_ARGS; } + if (nvswitch_is_tnvl_mode_locked(device)) + { + NVSWITCH_PRINT(device, ERROR, + "%s(%d): Security locked\n", __FUNCTION__, __LINE__); + return -NVL_ERR_INSUFFICIENT_PERMISSIONS; + } + if (table_entry->use_extended_table) reg = FLD_SET_DRF(_ROUTE, _RIDTABADDR, _RAM_SEL, _SELECTSEXTMCRIDROUTERAM, 0); else @@ -1749,6 +1763,13 @@ nvswitch_mc_read_mc_rid_entry_ls10 return -NVL_BAD_ARGS; } + if (nvswitch_is_tnvl_mode_locked(device)) + { + NVSWITCH_PRINT(device, ERROR, + "%s(%d): Security locked\n", __FUNCTION__, __LINE__); + return -NVL_ERR_INSUFFICIENT_PERMISSIONS; + } + // set the address if (table_entry->use_extended_table) reg = FLD_SET_DRF(_ROUTE, _RIDTABADDR, _RAM_SEL, _SELECTSEXTMCRIDROUTERAM, 0); diff --git a/src/common/nvswitch/kernel/ls10/pmgr_ls10.c b/src/common/nvswitch/kernel/ls10/pmgr_ls10.c index 890b7c1734..4ccb12fa3f 100644 --- a/src/common/nvswitch/kernel/ls10/pmgr_ls10.c +++ b/src/common/nvswitch/kernel/ls10/pmgr_ls10.c @@ -23,6 +23,7 @@ #include "common_nvswitch.h" +#include "boards_nvswitch.h" #include "regkey_nvswitch.h" #include "ls10/ls10.h" #include "ls10/pmgr_ls10.h" @@ -32,7 +33,6 @@ #include "export_nvswitch.h" #include "soe/soe_nvswitch.h" #include "soe/soeifcore.h" -#include "boards_nvswitch.h" #include "nvswitch/ls10/dev_pmgr.h" @@ -375,3 +375,34 @@ nvswitch_i2c_is_device_access_allowed_ls10 // Check will be performed in SOE return NV_TRUE; } + +/*! + * @brief Return I2c port info used in PMGR implementation. + */ +NvU32 +nvswitch_i2c_get_port_info_ls10 +( + nvswitch_device *device, + NvU32 port +) +{ + NvU16 boardId; + NvlStatus status; + + status = nvswitch_get_board_id(device, &boardId); + if (status != NVL_SUCCESS) + { + return 0; + } + + // + // Board has no devices we care about on I2C port C + // Bug 4312082 + // + if ((boardId == NVSWITCH_BOARD_LS10_4262_0000_895) && + (port == NVSWITCH_I2C_PORT_I2CC)) + { + return 0; + } + return nvswitch_i2c_get_port_info_lr10(device, port); +} diff --git a/src/common/nvswitch/kernel/ls10/soe_ls10.c b/src/common/nvswitch/kernel/ls10/soe_ls10.c index efde1de439..f94adaecdb 100644 --- a/src/common/nvswitch/kernel/ls10/soe_ls10.c +++ b/src/common/nvswitch/kernel/ls10/soe_ls10.c @@ -38,6 +38,7 @@ #include "nvswitch/ls10/dev_nvlsaw_ip.h" #include "nvswitch/ls10/dev_nvlsaw_ip_addendum.h" #include "nvswitch/ls10/dev_riscv_pri.h" +#include "nvswitch/ls10/dev_nport_ip.h" #include "flcn/flcnable_nvswitch.h" #include "flcn/flcn_nvswitch.h" @@ -517,22 +518,23 @@ nvswitch_soe_disable_nport_fatal_interrupts_ls10 if ((status != NVL_SUCCESS) || ((p.version & SOE_VBIOS_VERSION_MASK) < SOE_VBIOS_REVLOCK_DISABLE_NPORT_FATAL_INTR)) { - NVSWITCH_PRINT(device, ERROR, + NVSWITCH_PRINT(device, INFO, "%s: Skipping DISABLE_NPORT_FATAL_INTR command to SOE. Update firmware " "from .%02X to .%02X\n", __FUNCTION__, (NvU32)((p.version & SOE_VBIOS_VERSION_MASK) >> 16), - SOE_VBIOS_REVLOCK_DISABLE_NPORT_FATAL_INTR); + SOE_VBIOS_REVLOCK_DISABLE_NPORT_FATAL_INTR); return; } if (!nvswitch_is_soe_supported(device)) { - NVSWITCH_PRINT(device, INFO, "%s: SOE is not supported\n", - __FUNCTION__); + NVSWITCH_PRINT(device, INFO, + "%s: SOE is not supported\n", + __FUNCTION__); return; } - pFlcn = device->pSoe->pFlcn; + pFlcn = device->pSoe->pFlcn; nvswitch_os_memset(&cmd, 0, sizeof(cmd)); cmd.hdr.unitId = RM_SOE_UNIT_CORE; @@ -554,9 +556,114 @@ nvswitch_soe_disable_nport_fatal_interrupts_ls10 &timeout); if (status != NV_OK) { - NVSWITCH_PRINT(device, ERROR, "%s: Failed to send DISABLE_NPORT_FATAL_INTR command to SOE, status 0x%x\n", - __FUNCTION__, status); + NVSWITCH_PRINT(device, ERROR, + "%s: Failed to send DISABLE_NPORT_FATAL_INTR command to SOE, status 0x%x\n", + __FUNCTION__, status); + } +} + +/* + * @Brief : Issue INGRESS STOP in SOE + * + * @param[in] device + * @param[in] nport + * @param[in] bStop + */ +NvlStatus +nvswitch_soe_issue_ingress_stop_ls10 +( + nvswitch_device *device, + NvU32 nport, + NvBool bStop +) +{ + FLCN *pFlcn; + NvU32 cmdSeqDesc = 0; + NV_STATUS status; + RM_FLCN_CMD_SOE cmd; + NVSWITCH_TIMEOUT timeout; + RM_SOE_CORE_CMD_INGRESS_STOP *pIngressStop; + NVSWITCH_GET_BIOS_INFO_PARAMS params = { 0 }; + NvBool bKeepPolling; + NvU32 val; + + if (!nvswitch_is_soe_supported(device)) + { + NVSWITCH_PRINT(device, INFO, + "%s: SOE is not supported\n", + __FUNCTION__); + return NVL_SUCCESS; // -NVL_ERR_NOT_SUPPORTED + } + + status = device->hal.nvswitch_ctrl_get_bios_info(device, ¶ms); + if ((status != NVL_SUCCESS) || ((params.version & SOE_VBIOS_VERSION_MASK) < + SOE_VBIOS_REVLOCK_ISSUE_INGRESS_STOP)) + { + return NVL_SUCCESS; // -NVL_ERR_NOT_SUPPORTED } + + pFlcn = device->pSoe->pFlcn; + + nvswitch_os_memset(&cmd, 0, sizeof(cmd)); + + cmd.hdr.unitId = RM_SOE_UNIT_CORE; + cmd.hdr.size = RM_SOE_CMD_SIZE(CORE, INGRESS_STOP); + + pIngressStop = &cmd.cmd.core.ingressStop; + pIngressStop->nport = nport; + pIngressStop->cmdType = RM_SOE_CORE_CMD_ISSUE_INGRESS_STOP; + pIngressStop->bStop = bStop; + + nvswitch_timeout_create(NVSWITCH_INTERVAL_5MSEC_IN_NS, &timeout); + status = flcnQueueCmdPostBlocking(device, pFlcn, + (PRM_FLCN_CMD)&cmd, + NULL, // pMsg + NULL, // pPayload + SOE_RM_CMDQ_LOG_ID, + &cmdSeqDesc, + &timeout); + if (status != NV_OK) + { + NVSWITCH_PRINT(device, ERROR, + "%s: Failed to send INGRESS STOP command to SOE status 0x%x\n", + __FUNCTION__, status); + return -NVL_ERR_GENERIC; + } + + // + // After asserting INGRESS_STOP, wait until nport is idle + // to indicate that traffic is drained out. + // + if (bStop) + { + nvswitch_timeout_create(NVSWITCH_INTERVAL_1MSEC_IN_NS, &timeout); + do + { + bKeepPolling = (nvswitch_timeout_check(&timeout)) ? NV_FALSE : NV_TRUE; + + val = NVSWITCH_NPORT_RD32_LS10(device, nport, _NPORT, _STATUS); + + if (FLD_TEST_DRF(_NPORT, _STATUS, _INGRESS_IDLE, _IDLE, val) && + FLD_TEST_DRF(_NPORT, _STATUS, _ROUTE_IDLE, _IDLE, val)) + { + break; + } + + NVSWITCH_NSEC_DELAY(2 * NVSWITCH_INTERVAL_1USEC_IN_NS); + + } while (bKeepPolling); + + if (!FLD_TEST_DRF(_NPORT, _STATUS, _INGRESS_IDLE, _IDLE, val) || + !FLD_TEST_DRF(_NPORT, _STATUS, _ROUTE_IDLE, _IDLE, val)) + { + NVSWITCH_PRINT(device, ERROR, + "%s: Traffic failed to drain after ingress stop is asserted, val = 0x%x\n", + __FUNCTION__, val); + return -NVL_ERR_GENERIC; + } + } + + return NVL_SUCCESS; } /* diff --git a/src/common/nvswitch/kernel/nvswitch.c b/src/common/nvswitch/kernel/nvswitch.c index 98aa777253..922da01a9a 100644 --- a/src/common/nvswitch/kernel/nvswitch.c +++ b/src/common/nvswitch/kernel/nvswitch.c @@ -291,7 +291,7 @@ _nvswitch_corelib_get_uphy_load ) { nvswitch_device *device = link->dev->pDevInfo; - return device->hal.nvswitch_corelib_get_uphy_load(link, bUnlocked); + device->hal.nvswitch_corelib_get_uphy_load(link, bUnlocked); } @@ -805,6 +805,17 @@ nvswitch_soe_init_l2_state device->hal.nvswitch_soe_init_l2_state(device); } +NvlStatus +nvswitch_soe_issue_ingress_stop +( + nvswitch_device *device, + NvU32 nport, + NvBool bStop +) +{ + return device->hal.nvswitch_soe_issue_ingress_stop(device, nport, bStop); +} + void nvswitch_fsp_update_cmdq_head_tail ( @@ -813,7 +824,7 @@ nvswitch_fsp_update_cmdq_head_tail NvU32 queueTail ) { - return device->hal.nvswitch_fsp_update_cmdq_head_tail(device, queueHead, queueTail); + device->hal.nvswitch_fsp_update_cmdq_head_tail(device, queueHead, queueTail); } void @@ -824,7 +835,7 @@ nvswitch_fsp_get_cmdq_head_tail NvU32 *pQueueTail ) { - return device->hal.nvswitch_fsp_get_cmdq_head_tail(device, pQueueHead, pQueueTail); + device->hal.nvswitch_fsp_get_cmdq_head_tail(device, pQueueHead, pQueueTail); } void @@ -835,7 +846,7 @@ nvswitch_fsp_update_msgq_head_tail NvU32 msgqTail ) { - return device->hal.nvswitch_fsp_update_msgq_head_tail(device, msgqHead, msgqTail); + device->hal.nvswitch_fsp_update_msgq_head_tail(device, msgqHead, msgqTail); } void @@ -846,7 +857,7 @@ nvswitch_fsp_get_msgq_head_tail NvU32 *pMsgqTail ) { - return device->hal.nvswitch_fsp_get_msgq_head_tail(device, pMsgqHead, pMsgqTail); + device->hal.nvswitch_fsp_get_msgq_head_tail(device, pMsgqHead, pMsgqTail); } NvU32 @@ -3417,7 +3428,7 @@ nvswitch_init_npg_multicast nvswitch_device *device ) { - return device->hal.nvswitch_init_npg_multicast(device); + device->hal.nvswitch_init_npg_multicast(device); } void @@ -3426,7 +3437,7 @@ nvswitch_init_warm_reset nvswitch_device *device ) { - return device->hal.nvswitch_init_warm_reset(device); + device->hal.nvswitch_init_warm_reset(device); } static NvlStatus @@ -4500,15 +4511,15 @@ nvswitch_filter_messages if (nvswitch_is_message_persistent(device, msghdr)) { - if (nvListCount(&device->link[linkId].inbandData.persistent_list) < - device->hal.nvswitch_get_max_persistent_message_count(device)) - { - nvListAdd(&msg->entry, &device->link[linkId].inbandData.persistent_list); - } - else - { - bSendNackOrDrop = NV_TRUE; - } + if (nvListCount(&device->link[linkId].inbandData.persistent_list) < + device->hal.nvswitch_get_max_persistent_message_count(device)) + { + nvListAdd(&msg->entry, &device->link[linkId].inbandData.persistent_list); + } + else + { + bSendNackOrDrop = NV_TRUE; + } } else { @@ -4530,13 +4541,13 @@ nvswitch_filter_messages } else { - status = nvswitch_lib_notify_client_events(device, - NVSWITCH_DEVICE_EVENT_INBAND_DATA); - if (status != NVL_SUCCESS) - { - NVSWITCH_PRINT(device, ERROR, "%s: Failed to notify INBAND_DATA event\n", - __FUNCTION__); - } + status = nvswitch_lib_notify_client_events(device, + NVSWITCH_DEVICE_EVENT_INBAND_DATA); + if (status != NVL_SUCCESS) + { + NVSWITCH_PRINT(device, ERROR, "%s: Failed to notify INBAND_DATA event\n", + __FUNCTION__); + } } device->link[linkId].inbandData.message = NULL; @@ -5101,7 +5112,7 @@ nvswitch_init_clock_gating nvswitch_device *device ) { - return device->hal.nvswitch_init_clock_gating(device); + device->hal.nvswitch_init_clock_gating(device); } void @@ -5494,7 +5505,7 @@ nvswitch_setup_link_loopback_mode NvU32 linkNumber ) { - return device->hal.nvswitch_setup_link_loopback_mode(device, linkNumber); + device->hal.nvswitch_setup_link_loopback_mode(device, linkNumber); } void @@ -5504,7 +5515,7 @@ nvswitch_reset_persistent_link_hw_state NvU32 linkNumber ) { - return device->hal.nvswitch_reset_persistent_link_hw_state(device, linkNumber); + device->hal.nvswitch_reset_persistent_link_hw_state(device, linkNumber); } void @@ -5514,7 +5525,7 @@ nvswitch_store_topology_information nvlink_link *link ) { - return device->hal.nvswitch_store_topology_information(device, link); + device->hal.nvswitch_store_topology_information(device, link); } void @@ -5603,7 +5614,7 @@ nvswitch_init_buffer_ready NvBool bNportBufferReady ) { - return device->hal.nvswitch_init_buffer_ready(device, link, bNportBufferReady); + device->hal.nvswitch_init_buffer_ready(device, link, bNportBufferReady); } void @@ -5613,7 +5624,7 @@ nvswitch_apply_recal_settings nvlink_link *link ) { - return device->hal.nvswitch_apply_recal_settings(device, link); + device->hal.nvswitch_apply_recal_settings(device, link); } NvlStatus diff --git a/src/common/sdk/nvidia/inc/class/cl0000_notification.h b/src/common/sdk/nvidia/inc/class/cl0000_notification.h index 79b51d9ed0..e49a3ec42d 100644 --- a/src/common/sdk/nvidia/inc/class/cl0000_notification.h +++ b/src/common/sdk/nvidia/inc/class/cl0000_notification.h @@ -31,7 +31,7 @@ extern "C" { /*event values*/ #define NV0000_NOTIFIERS_DISPLAY_CHANGE (0) #define NV0000_NOTIFIERS_EVENT_NONE_PENDING (1) -#define NV0000_NOTIFIERS_VM_START (2) +#define NV0000_NOTIFIERS_GPU_UNBIND_EVENT (2) #define NV0000_NOTIFIERS_GPU_BIND_EVENT (3) #define NV0000_NOTIFIERS_NVTELEMETRY_REPORT_EVENT (4) #define NV0000_NOTIFIERS_MAXCOUNT (5) diff --git a/src/common/sdk/nvidia/inc/class/cl0050.h b/src/common/sdk/nvidia/inc/class/cl0050.h index 7ed9fe4d84..b681e9d884 100644 --- a/src/common/sdk/nvidia/inc/class/cl0050.h +++ b/src/common/sdk/nvidia/inc/class/cl0050.h @@ -30,8 +30,6 @@ // Source file: class/cl0050.finn // -#include "nvcfg_sdk.h" - #define NV_CE_UTILS (0x50U) /* finn: Evaluated from "NV0050_ALLOCATION_PARAMETERS_MESSAGE_ID" */ #define NV0050_ALLOCATION_PARAMETERS_MESSAGE_ID (0x0050U) @@ -58,13 +56,12 @@ typedef struct NV0050_ALLOCATION_PARAMETERS { #define NV0050_CEUTILS_FLAGS_FIFO_LITE_FALSE (0x00000000) #define NV0050_CEUTILS_FLAGS_FIFO_LITE_TRUE (0x00000001) +// Whether the CeUtils will use BAR1 or BAR2 for data copy +#define NV0050_CEUTILS_FLAGS_NO_BAR1_USE 3:3 +#define NV0050_CEUTILS_FLAGS_NO_BAR1_USE_FALSE (0x00000000) +#define NV0050_CEUTILS_FLAGS_NO_BAR1_USE_TRUE (0x00000001) + // Force a specific CE engine to be used be setting forceCeId #define NV0050_CEUTILS_FLAGS_FORCE_CE_ID 4:4 #define NV0050_CEUTILS_FLAGS_FORCE_CE_ID_FALSE (0x00000000) #define NV0050_CEUTILS_FLAGS_FORCE_CE_ID_TRUE (0x00000001) - -// Use a CC secure channel -#define NV0050_CEUTILS_FLAGS_CC_SECURE 5:5 -#define NV0050_CEUTILS_FLAGS_CC_SECURE_FALSE (0x00000000) -#define NV0050_CEUTILS_FLAGS_CC_SECURE_TRUE (0x00000001) - diff --git a/src/common/sdk/nvidia/inc/class/cl00de.h b/src/common/sdk/nvidia/inc/class/cl00de.h index 4a784bec9a..51aaabcf99 100644 --- a/src/common/sdk/nvidia/inc/class/cl00de.h +++ b/src/common/sdk/nvidia/inc/class/cl00de.h @@ -98,9 +98,21 @@ typedef struct RUSD_CLK_PUBLIC_DOMAIN_INFOS { RUSD_CLK_PUBLIC_DOMAIN_INFO info[RUSD_CLK_PUBLIC_DOMAIN_MAX_TYPE]; } RUSD_CLK_PUBLIC_DOMAIN_INFOS; +typedef struct RUSD_ENG_UTILIZATION { + NvU32 clkPercentBusy; + NvU32 samplingPeriodUs; +} RUSD_ENG_UTILIZATION; + +#define RUSD_ENG_UTILIZATION_VID_ENG_NVENC 0 +#define RUSD_ENG_UTILIZATION_VID_ENG_NVDEC 1 +#define RUSD_ENG_UTILIZATION_VID_ENG_NVJPG 2 +#define RUSD_ENG_UTILIZATION_VID_ENG_NVOFA 3 +#define RUSD_ENG_UTILIZATION_COUNT 4 + typedef struct RUSD_PERF_DEVICE_UTILIZATION_INFO { - NvU8 gpuPercentBusy; - NvU8 memoryPercentBusy; + NvU32 gpuPercentBusy; + NvU32 memoryPercentBusy; + RUSD_ENG_UTILIZATION engUtil[RUSD_ENG_UTILIZATION_COUNT]; } RUSD_PERF_DEVICE_UTILIZATION_INFO; typedef struct RUSD_PERF_DEVICE_UTILIZATION { @@ -115,7 +127,7 @@ typedef struct RUSD_PERF_CURRENT_PSTATE { typedef struct RUSD_CLK_THROTTLE_REASON { volatile NvU64 lastModifiedTimestamp; - NvU32 reasonMask; + NvU32 reasonMask; // Bitmask of RUSD_CLK_THROTTLE_REASON } RUSD_CLK_THROTTLE_REASON; typedef struct RUSD_MEM_ERROR_COUNTS { @@ -140,12 +152,12 @@ typedef struct RUSD_POWER_LIMIT_INFO { NvU32 enforcedmW; } RUSD_POWER_LIMIT_INFO; -typedef struct RUSD_ENFORCED_POWER_LIMITS { +typedef struct RUSD_POWER_LIMITS { volatile NvU64 lastModifiedTimestamp; RUSD_POWER_LIMIT_INFO info; } RUSD_POWER_LIMITS; -typedef struct RUSD_TEMPERATURE_INFO{ +typedef struct RUSD_TEMPERATURE_INFO { NvTemp gpuTemperature; NvTemp hbmTemperature; } RUSD_TEMPERATURE_INFO; @@ -194,6 +206,11 @@ typedef struct RUSD_INST_POWER_USAGE { RUSD_INST_POWER_INFO info; } RUSD_INST_POWER_USAGE; +typedef struct RUSD_SHADOW_ERR_CONT { + volatile NvU64 lastModifiedTimestamp; + NvU32 shadowErrContVal; +} RUSD_SHADOW_ERR_CONT; + typedef struct NV00DE_SHARED_DATA { volatile NvU64 seq; @@ -202,19 +219,56 @@ typedef struct NV00DE_SHARED_DATA { NvU64 totalPmaMemory; NvU64 freePmaMemory; + // gpuUpdateUserSharedData is sensitive to these two sections being contiguous + + // // GSP polling data section + // All data structs are a volatile NvU64 timestamp followed by data contents. + // Access by reading timestamp, then copying the struct contents, then reading the timestamp again. + // If time0 matches time1, data has not changed during the read, and contents are valid. + // If timestamp is RUSD_TIMESTAMP_WRITE_IN_PROGRESS, data was edited during the read, retry. + // If timestamp is RUSD_TIMESTAMP_INVALID, data is not available or not supported on this platform. + // + + // POLL_CLOCK NV_DECLARE_ALIGNED(RUSD_CLK_PUBLIC_DOMAIN_INFOS clkPublicDomainInfos, 8); + + // POLL_PERF NV_DECLARE_ALIGNED(RUSD_CLK_THROTTLE_REASON clkThrottleReason, 8); + + // POLL_PERF NV_DECLARE_ALIGNED(RUSD_PERF_DEVICE_UTILIZATION perfDevUtil, 8); + + // POLL_MEMORY NV_DECLARE_ALIGNED(RUSD_MEM_ECC memEcc, 8); + + // POLL_PERF NV_DECLARE_ALIGNED(RUSD_PERF_CURRENT_PSTATE perfCurrentPstate, 8); - NV_DECLARE_ALIGNED(RUSD_POWER_LIMITS powerLimitGpu, 8); // Module Limit is not supported on Ampere/Hopper + + // POLL_POWER + // Module Limit is not supported on Ampere/Hopper + NV_DECLARE_ALIGNED(RUSD_POWER_LIMITS powerLimitGpu, 8); + + // POLL_THERMAL NV_DECLARE_ALIGNED(RUSD_TEMPERATURE temperature, 8); + + // POLL_MEMORY NV_DECLARE_ALIGNED(RUSD_MEM_ROW_REMAP memRowRemap, 8); + + // POLL_POWER NV_DECLARE_ALIGNED(RUSD_AVG_POWER_USAGE avgPowerUsage, 8); + + // POLL_POWER NV_DECLARE_ALIGNED(RUSD_INST_POWER_USAGE instPowerUsage, 8); + + // Non-polled GSP data section + NV_DECLARE_ALIGNED(RUSD_SHADOW_ERR_CONT shadowErrCont, 8); } NV00DE_SHARED_DATA; +// +// Polling mask bits, pass into ALLOC_PARAMETERS or NV00DE_CTRL_REQEUSET_DATA_POLL +// to request above polled data to be provided +// #define NV00DE_RUSD_POLL_CLOCK 0x1 #define NV00DE_RUSD_POLL_PERF 0x2 #define NV00DE_RUSD_POLL_MEMORY 0x4 diff --git a/src/common/sdk/nvidia/inc/class/cl00fe.h b/src/common/sdk/nvidia/inc/class/cl00fe.h index b0235a6b08..c76d509b57 100644 --- a/src/common/sdk/nvidia/inc/class/cl00fe.h +++ b/src/common/sdk/nvidia/inc/class/cl00fe.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -43,5 +43,11 @@ typedef struct NV_MEMORY_MAPPER_ALLOCATION_PARAMS { NvHandle hSemaphoreSurface; NvU32 maxQueueSize; + NvHandle hNotificationMemory; + NV_DECLARE_ALIGNED(NvU64 notificationOffset, 8); } NV_MEMORY_MAPPER_ALLOCATION_PARAMS; +typedef struct NV_MEMORY_MAPPER_NOTIFICATION { + NvU32 status; // NV_STATUS error code +} NV_MEMORY_MAPPER_NOTIFICATION; + diff --git a/src/common/sdk/nvidia/inc/class/cl0100.h b/src/common/sdk/nvidia/inc/class/cl0100.h new file mode 100644 index 0000000000..8795e82500 --- /dev/null +++ b/src/common/sdk/nvidia/inc/class/cl0100.h @@ -0,0 +1,51 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl0100.finn +// + + + +/* + * The lock stress object (LOCK_STRESS_OBJECT) is a test-only object that exports + * multiple RM controls which exercise acquiring different combinations of RM locks in + * order to stress and properly test RM locking specifically. These API's only exercise + * legal combinations of RM locks that are in use elsewhere in RM but they are intended + * to be exhaustive in covering all possible combinations of RM locks. The API's + * themselves, don't do much outside of incrementing/decrementing global integers that + * can be validated later on within a test executable to ensure that all accesses to + * these global integers were synchronous. + * + * The lock stress object is not allocatable without the "RmEnableLockStress" registry + * key being turned on, which is off by default. The creation/destruction of the object + * does not accomplish anything useful but simply serves as a way to check for the + * registry key's enablement before allowing executing any of the test API's this object + * provides. + */ + +#define LOCK_STRESS_OBJECT 0x0100U + diff --git a/src/common/sdk/nvidia/inc/class/cl2080_notification.h b/src/common/sdk/nvidia/inc/class/cl2080_notification.h index 2af8fae956..f4309b0cb7 100644 --- a/src/common/sdk/nvidia/inc/class/cl2080_notification.h +++ b/src/common/sdk/nvidia/inc/class/cl2080_notification.h @@ -202,7 +202,7 @@ extern "C" { #define NV2080_NOTIFIERS_INFOROM_PBL_OBJECT_UPDATED (161) #define NV2080_NOTIFIERS_LPWR_DIFR_PREFETCH_REQUEST (162) #define NV2080_NOTIFIERS_SEC_FAULT_ERROR (163) -#define NV2080_NOTIFIERS_POSSIBLE_ERROR (164) +#define NV2080_NOTIFIERS_UNUSED_1 (164) // Unused #define NV2080_NOTIFIERS_NVLINK_INFO_LINK_UP (165) #define NV2080_NOTIFIERS_RESERVED166 (166) #define NV2080_NOTIFIERS_RESERVED167 (167) diff --git a/src/common/sdk/nvidia/inc/class/cl90cdtrace.h b/src/common/sdk/nvidia/inc/class/cl90cdtrace.h new file mode 100644 index 0000000000..e792373731 --- /dev/null +++ b/src/common/sdk/nvidia/inc/class/cl90cdtrace.h @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl90cdtrace_h_ +#define _cl90cdtrace_h_ + +#include + +/* This file defines parameters for RATS/RM tracing */ + +typedef struct NV_RATS_GSP_TRACE_RECORD_V1 +{ + NvU16 seqNo; + NvU16 gspSeqNo; + NvU32 info; + NvU64 recordType; + NvU64 timeStamp; + NvU64 threadId; +} NV_RATS_GSP_TRACE_RECORD_V1; + +typedef NV_RATS_GSP_TRACE_RECORD_V1 NV_RATS_GSP_TRACE_RECORD; + +#endif diff --git a/src/common/sdk/nvidia/inc/class/cla084.h b/src/common/sdk/nvidia/inc/class/cla084.h index e31346179b..f4331deacf 100644 --- a/src/common/sdk/nvidia/inc/class/cla084.h +++ b/src/common/sdk/nvidia/inc/class/cla084.h @@ -77,6 +77,7 @@ typedef struct NVA084_ALLOC_PARAMETERS { NvHandle hPluginClient; NvU32 numGuestFbHandles; NvHandle guestFbHandleList[NVA084_MAX_VMMU_SEGMENTS]; + NvU8 vgpuDevName[VM_UUID_SIZE]; NvHandle hPluginHeapMemory; NvHandle hMigRmHeapMemory; NV_DECLARE_ALIGNED(NvU64 ctrlBuffOffset, 8); diff --git a/src/common/sdk/nvidia/inc/class/clc8b5.h b/src/common/sdk/nvidia/inc/class/clc8b5.h index a62a75ad2f..38fd8be9a8 100644 --- a/src/common/sdk/nvidia/inc/class/clc8b5.h +++ b/src/common/sdk/nvidia/inc/class/clc8b5.h @@ -52,10 +52,6 @@ #define NVC8B5_LAUNCH_DMA_SRC_TYPE_PHYSICAL (0x00000001) #define NVC8B5_LAUNCH_DMA_DST_TYPE 13:13 #define NVC8B5_LAUNCH_DMA_DST_TYPE_PHYSICAL (0x00000001) -#define NVC8B5_LAUNCH_DMA_COPY_TYPE 21:20 -#define NVC8B5_LAUNCH_DMA_COPY_TYPE_PROT2PROT (0x00000000) -#define NVC8B5_LAUNCH_DMA_COPY_TYPE_DEFAULT (0x00000000) -#define NVC8B5_LAUNCH_DMA_COPY_TYPE_SECURE (0x00000001) #define NVC8B5_LAUNCH_DMA_MEMORY_SCRUB_ENABLE 23:23 #define NVC8B5_LAUNCH_DMA_MEMORY_SCRUB_ENABLE_TRUE (0x00000001) #define NVC8B5_LAUNCH_DMA_DISABLE_PLC 26:26 @@ -65,22 +61,6 @@ #define NVC8B5_OFFSET_OUT_LOWER (0x0000040C) #define NVC8B5_OFFSET_OUT_LOWER_VALUE 31:0 #define NVC8B5_LINE_LENGTH_IN (0x00000418) -#define NVC8B5_SET_SECURE_COPY_MODE (0x00000500) -#define NVC8B5_SET_SECURE_COPY_MODE_MODE 0:0 -#define NVC8B5_SET_SECURE_COPY_MODE_MODE_ENCRYPT (0x00000000) -#define NVC8B5_SET_SECURE_COPY_MODE_MODE_DECRYPT (0x00000001) -#define NVC8B5_SET_DECRYPT_AUTH_TAG_COMPARE_ADDR_UPPER (0x00000514) -#define NVC8B5_SET_DECRYPT_AUTH_TAG_COMPARE_ADDR_UPPER_UPPER 24:0 -#define NVC8B5_SET_DECRYPT_AUTH_TAG_COMPARE_ADDR_LOWER (0x00000518) -#define NVC8B5_SET_DECRYPT_AUTH_TAG_COMPARE_ADDR_LOWER_LOWER 31:0 -#define NVC8B5_SET_ENCRYPT_AUTH_TAG_ADDR_UPPER (0x00000530) -#define NVC8B5_SET_ENCRYPT_AUTH_TAG_ADDR_UPPER_UPPER 24:0 -#define NVC8B5_SET_ENCRYPT_AUTH_TAG_ADDR_LOWER (0x00000534) -#define NVC8B5_SET_ENCRYPT_AUTH_TAG_ADDR_LOWER_LOWER 31:0 -#define NVC8B5_SET_ENCRYPT_IV_ADDR_UPPER (0x00000538) -#define NVC8B5_SET_ENCRYPT_IV_ADDR_UPPER_UPPER 24:0 -#define NVC8B5_SET_ENCRYPT_IV_ADDR_LOWER (0x0000053C) -#define NVC8B5_SET_ENCRYPT_IV_ADDR_LOWER_LOWER 31:0 #define NVC8B5_SET_MEMORY_SCRUB_PARAMETERS (0x000006FC) #define NVC8B5_SET_MEMORY_SCRUB_PARAMETERS_DISCARDABLE 0:0 #define NVC8B5_SET_MEMORY_SCRUB_PARAMETERS_DISCARDABLE_FALSE (0x00000000) diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000system.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000system.h index 42c8e0908c..7637162f29 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000system.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000system.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2005-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2005-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -44,8 +44,6 @@ * * NV0000_CTRL_GET_FEATURES_SLI * When this bit is set, SLI is supported. - * NV0000_CTRL_GET_FEATURES_UEFI - * When this bit is set, it is a UEFI system. * NV0000_CTRL_SYSTEM_GET_FEATURES_IS_EFI_INIT * When this bit is set, EFI has initialized core channel * @@ -68,10 +66,6 @@ typedef struct NV0000_CTRL_SYSTEM_GET_FEATURES_PARAMS { #define NV0000_CTRL_SYSTEM_GET_FEATURES_SLI_FALSE (0x00000000U) #define NV0000_CTRL_SYSTEM_GET_FEATURES_SLI_TRUE (0x00000001U) -#define NV0000_CTRL_SYSTEM_GET_FEATURES_UEFI 1:1 -#define NV0000_CTRL_SYSTEM_GET_FEATURES_UEFI_FALSE (0x00000000U) -#define NV0000_CTRL_SYSTEM_GET_FEATURES_UEFI_TRUE (0x00000001U) - #define NV0000_CTRL_SYSTEM_GET_FEATURES_IS_EFI_INIT 2:2 #define NV0000_CTRL_SYSTEM_GET_FEATURES_IS_EFI_INIT_FALSE (0x00000000U) #define NV0000_CTRL_SYSTEM_GET_FEATURES_IS_EFI_INIT_TRUE (0x00000001U) diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000vgpu.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000vgpu.h index a8def9dbc1..fb66038e74 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000vgpu.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000vgpu.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2016-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -36,24 +36,27 @@ #include "ctrl/ctrla081.h" #include "class/cl0000.h" #include "nv_vgpu_types.h" + /* - * NV0000_CTRL_CMD_VGPU_GET_START_DATA - * - * This command gets data associated with NV0000_NOTIFIERS_VGPU_MGR_START to - * start VGPU process. + * NV0000_CTRL_CMD_VGPU_CREATE_DEVICE * - * mdevUuid - * This parameter gives mdev device UUID for which nvidia-vgpu-mgr should - * init process. + * This command informs RM to create a vGPU device on KVM. * - * qemuPid - * This parameter specifies the QEMU process ID of the VM. + * vgpuName [IN] + * This parameter provides the MDEV UUID or VF BDF depending on whether MDEV + * or vfio-pci-core framework is used. * - * gpuPciId + * gpuPciId [IN] * This parameter provides gpuId of GPU on which vgpu device is created. * - * configParams - * This parameter specifies the configuration parameters for vGPU + * gpuPciBdf + * This parameter specifies the BDF of the VF. (Same as PF for non-sriov) + * + * vgpuTypeId [IN] + * This parameter specifies the vGPU type ID for the device to be created. + * + * vgpuId [OUT] + * This parameter returns the vgpu id allocated by RM for the device * * Possible status values returned are: * NV_OK @@ -62,17 +65,114 @@ * NV_ERR_INVALID_CLIENT * */ -#define NV0000_CTRL_CMD_VGPU_GET_START_DATA (0xc01) /* finn: Evaluated from "(FINN_NV01_ROOT_VGPU_INTERFACE_ID << 8) | NV0000_CTRL_VGPU_GET_START_DATA_PARAMS_MESSAGE_ID" */ -#define NV0000_CTRL_VGPU_GET_START_DATA_PARAMS_MESSAGE_ID (0x1U) +#define NV0000_CTRL_CMD_VGPU_CREATE_DEVICE (0xc02) /* finn: Evaluated from "(FINN_NV01_ROOT_VGPU_INTERFACE_ID << 8) | NV0000_CTRL_VGPU_CREATE_DEVICE_PARAMS_MESSAGE_ID" */ -typedef struct NV0000_CTRL_VGPU_GET_START_DATA_PARAMS { - NvU8 mdevUuid[VM_UUID_SIZE]; - NvU8 configParams[1024]; - NvU32 qemuPid; +#define NV0000_CTRL_VGPU_CREATE_DEVICE_PARAMS_MESSAGE_ID (0x2U) + +typedef struct NV0000_CTRL_VGPU_CREATE_DEVICE_PARAMS { + NvU8 vgpuName[VM_UUID_SIZE]; NvU32 gpuPciId; + NvU32 gpuPciBdf; + NvU32 vgpuTypeId; NvU16 vgpuId; +} NV0000_CTRL_VGPU_CREATE_DEVICE_PARAMS; + +/* + * NV0000_CTRL_CMD_VGPU_GET_INSTANCES + * + * This command queries RM for available instances for a particular vGPU type ID + * on KVM. + * + * gpuPciId [IN] + * This parameter specifies gpuId of GPU on which vGPU instances are being + * queried. + * + * gpuPciBdf [IN] + * This parameter specifies the BDF of the VF. (Same as PF for non-sriov) + * + * numVgpuTypes [IN] + * This parameter specifies the count of vgpuTypeIds supplied and the + * count of availableInstances values to be returned. + * + * vgpuTypeIds [IN] + * This parameter specifies a total of numVgpuTypes vGPU type IDs for which + * the available instances are to be queried. + * + * availableInstances [OUT] + * This parameter returns a total of numVgpuTypes available instances for + * the respective vGPU type IDs supplied in vgpuTypeIds input parameter. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_EVENT + * NV_ERR_OBJECT_NOT_FOUND + * NV_ERR_INVALID_CLIENT + * NV_ERR_INVALID_STATE + * + */ + +#define NV0000_CTRL_CMD_VGPU_GET_INSTANCES (0xc03) /* finn: Evaluated from "(FINN_NV01_ROOT_VGPU_INTERFACE_ID << 8) | NV0000_CTRL_VGPU_GET_INSTANCES_PARAMS_MESSAGE_ID" */ + +#define NV0000_CTRL_VGPU_GET_INSTANCES_PARAMS_MESSAGE_ID (0x3U) + +typedef struct NV0000_CTRL_VGPU_GET_INSTANCES_PARAMS { + NvU32 gpuPciId; NvU32 gpuPciBdf; -} NV0000_CTRL_VGPU_GET_START_DATA_PARAMS; + NvU32 numVgpuTypes; + NvU32 vgpuTypeIds[NVA081_MAX_VGPU_TYPES_PER_PGPU]; + NvU32 availableInstances[NVA081_MAX_VGPU_TYPES_PER_PGPU]; +} NV0000_CTRL_VGPU_GET_INSTANCES_PARAMS; + +/* + * NV0000_CTRL_CMD_VGPU_DELETE_DEVICE + * + * This command informs RM to delete a vGPU device on KVM. + * + * vgpuName [IN] + * This parameter provides the MDEV UUID or VF BDF depending on whether MDEV + * or vfio-pci-core framework is used. + * + * vgpuId [IN] + * This parameter provides the vgpu id allocated by RM for the device to be + * deleted. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_EVENT + * NV_ERR_OBJECT_NOT_FOUND + * NV_ERR_INVALID_CLIENT + * + */ + +#define NV0000_CTRL_CMD_VGPU_DELETE_DEVICE (0xc04) /* finn: Evaluated from "(FINN_NV01_ROOT_VGPU_INTERFACE_ID << 8) | NV0000_CTRL_VGPU_DELETE_DEVICE_PARAMS_MESSAGE_ID" */ + +#define NV0000_CTRL_VGPU_DELETE_DEVICE_PARAMS_MESSAGE_ID (0x4U) + +typedef struct NV0000_CTRL_VGPU_DELETE_DEVICE_PARAMS { + NvU8 vgpuName[VM_UUID_SIZE]; + NvU16 vgpuId; +} NV0000_CTRL_VGPU_DELETE_DEVICE_PARAMS; + +/* + * NV0000_CTRL_CMD_VGPU_VFIO_UNREGISTER_STATUS + * + * This command informs RM the status vgpu-vfio unregister for a GPU. + * + * returnStatus [IN] + * This parameter provides the status vgpu-vfio unregister operation. + * + * gpuPciId [IN] + * This parameter provides the gpu id of the GPU + */ + +#define NV0000_CTRL_CMD_VGPU_VFIO_UNREGISTER_STATUS (0xc05) /* finn: Evaluated from "(FINN_NV01_ROOT_VGPU_INTERFACE_ID << 8) | NV0000_CTRL_VGPU_VFIO_UNREGISTER_STATUS_PARAMS_MESSAGE_ID" */ + +#define NV0000_CTRL_VGPU_VFIO_UNREGISTER_STATUS_PARAMS_MESSAGE_ID (0x5U) + +typedef struct NV0000_CTRL_VGPU_VFIO_UNREGISTER_STATUS_PARAMS { + NvU32 returnStatus; + NvU32 gpuId; +} NV0000_CTRL_VGPU_VFIO_UNREGISTER_STATUS_PARAMS; /* _ctrl0000vgpu_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dfp.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dfp.h index 537c0c75eb..b25ada567a 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dfp.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dfp.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2005-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2005-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -106,7 +106,9 @@ * NV0073_CTRL_DFP_FLAGS_DSI_DEVICE_ID * This indicates whether this SOR uses DSI-A, DSI-B or both (ganged mode). * NV0073_CTRL_DFP_FLAGS_DYNAMIC_MUX_CAPABLE - * This indicates whether this DFP supports Dynamic MUX + * This indicates whether this DFP supports DDS (NV dynamic display mux). + * NV0073_CTRL_DFP_FLAGS_MDM + * This indicates whether this DFP supports MDM (Microsoft dynamic display mux). * UHBRSupportedByDfp * Bitmask to specify the UHBR link rates supported by this dfp. * @@ -194,6 +196,9 @@ typedef struct NV0073_CTRL_DFP_GET_INFO_PARAMS { #define NV0073_CTRL_DFP_FLAGS_DYNAMIC_MUX_CAPABLE 30:30 #define NV0073_CTRL_DFP_FLAGS_DYNAMIC_MUX_CAPABLE_FALSE (0x00000000U) #define NV0073_CTRL_DFP_FLAGS_DYNAMIC_MUX_CAPABLE_TRUE (0x00000001U) +#define NV0073_CTRL_DFP_FLAGS_MDM 31:31 +#define NV0073_CTRL_DFP_FLAGS_MDM_DISABLED (0x00000000U) +#define NV0073_CTRL_DFP_FLAGS_MDM_ENABLED (0x00000001U) @@ -1287,6 +1292,140 @@ typedef struct NV0073_CTRL_DFP_GET_FIXED_MODE_TIMING_PARAMS { +/* + * NV0073_CTRL_DFP_ENTER_DISPLAY_POWER_GATING_DIAGNOSTIC_DATA + * + * This structure describes diagnostic information about display power + * gating entry sequence + * + * totalRmEntryLatencyUs + * Duration in microseconds that RM took to service 'Enter + * Display Power Gating' command. This includes time for all + * steps that RM performs as part of display power gating entry + * sequence including the below parameters. + * hwOkToGateLatencyUs + * Duration in microseconds that HW took to assert ok_to_gate. + * Only valid when displayId is not equal to 0xFFFFFFFF + * jadeApiLatencyUs + * Duration in microseconds that Jade took to service 'Enter + * Display Power Gating' command + * + */ + +typedef struct NV0073_CTRL_DFP_ENTER_DISPLAY_POWER_GATING_DIAGNOSTIC_DATA { + NvU32 totalRmEntryLatencyUs; + NvU32 hwOkToGateLatencyUs; + NvU32 jadeEntryApiLatencyUs; +} NV0073_CTRL_DFP_ENTER_DISPLAY_POWER_GATING_DIAGNOSTIC_DATA; + +/* + * NV0073_CTRL_CMD_DFP_ENTER_DISPLAY_POWER_GATING + * + * This command can be used to enter display power gating with an option to + * save-restore settings for the specified displayId. + * + * subDeviceInstance + * This parameter specifies the subdevice instance within the + * NV04_DISPLAY_COMMON parent device to which the operation should be + * directed. This parameter must specify a value between zero and the + * total number of subdevices within the parent device. This parameter + * should be set to zero for default behavior. + * displayId + * This parameter specifies the ID of the display for which the state + * needs to be saved-restored during exit of Display Power Gating. + * The display ID must be a dfp display as determined with the + * NV0073_CTRL_CMD_SPECIFIC_GET_TYPE command. If more than one + * displayId bit is set or the displayId is not a dfp, this call will + * return NV_ERR_INVALID_ARGUMENT. For the case where no save-restore + * is needed, displayId should be set to 0xFFFFFFFF. + * flags + * This parameter specifies special request from client for RM(for future use) + * diagnosticData + * This parameter provides diagnostic information about display power + * gating entry sequence + * + * Possible status values returned are: + * NV_OK - If Display Power Gating Entry was successful + * NV_ERR_GENERIC - If Display Power Gating Entry failed + * NV_ERR_INVALID_ARGUMENT - If incorrect parameters are sent + */ +#define NV0073_CTRL_CMD_DFP_ENTER_DISPLAY_POWER_GATING (0x731174U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DFP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DFP_ENTER_DISPLAY_POWER_GATING_PARAMS_MESSAGE_ID" */ + +#define NV0073_CTRL_CMD_DFP_ENTER_DISPLAY_POWER_GATING_PARAMS_MESSAGE_ID (0x74U) + +typedef struct NV0073_CTRL_CMD_DFP_ENTER_DISPLAY_POWER_GATING_PARAMS { + NvU32 subDeviceInstance; + NvU32 displayId; + NvU32 flag; + NV0073_CTRL_DFP_ENTER_DISPLAY_POWER_GATING_DIAGNOSTIC_DATA diagnosticData; +} NV0073_CTRL_CMD_DFP_ENTER_DISPLAY_POWER_GATING_PARAMS; + +#define NV0073_CTRL_DFP_ENTER_DISPLAY_POWER_GATING_FLAGS_RESERVED 31:0 +#define NV0073_CTRL_DFP_ENTER_DISPLAY_POWER_GATING_FLAGS_RESERVED_INIT (0x00000000U) + +/* + * NV0073_CTRL_DFP_EXIT_DISPLAY_POWER_GATING_DIAGNOSTIC_DATA + * + * This structure describes diagnostic information about display power + * gating exit sequence + * + * totalRmExitLatencyUs + * Duration in microseconds that RM took to service 'Exit + * Display Power Gating' command. This includes time for all + * steps that RM performs as part of display power gating exit + * sequence including the below parameters. + * riscvBootupLatencyUs + * Duration in microseconds that LTM RISCV took to bootup. + * jadeExitApiLatencyUs + * Duration in microseconds that Jade took to service 'Exit + * Display Power Gating' command + * + */ +typedef struct NV0073_CTRL_DFP_EXIT_DISPLAY_POWER_GATING_DIAGNOSTIC_DATA { + NvU32 totalRmExitLatencyUs; + NvU32 riscvBootupLatencyUs; + NvU32 jadeExitApiLatencyUs; +} NV0073_CTRL_DFP_EXIT_DISPLAY_POWER_GATING_DIAGNOSTIC_DATA; + +/* + * NV0073_CTRL_CMD_DFP_EXIT_DISPLAY_POWER_GATING + * + * This command can be used to exit display power gating. If preceding + * NV0073_CTRL_CMD_DFP_ENTER_DISPLAY_POWER_GATING command requested for + * save-restore of settings for a particular displayId then this command + * will restore settings for that displayId. + * + * subDeviceInstance + * This parameter specifies the subdevice instance within the + * NV04_DISPLAY_COMMON parent device to which the operation should be + * directed. This parameter must specify a value between zero and the + * total number of subdevices within the parent device. This parameter + * should be set to zero for default behavior. + * flags + * This parameter specifies special request from client for RM(for future use) + * diagnosticData + * This parameter provides diagnostic information about display power + * gating exit sequence + * + * Possible status values returned are: + * NV_OK - When Display Power Gating Exit was successful + * NV_ERR_GENERIC - When Display Power Gating Exit failed + * NV_ERR_INVALID_ARGUMENT - When incorrect parameters are sent + */ + +#define NV0073_CTRL_CMD_DFP_EXIT_DISPLAY_POWER_GATING (0x731175U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DFP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DFP_EXIT_DISPLAY_POWER_GATING_PARAMS_MESSAGE_ID" */ + +#define NV0073_CTRL_CMD_DFP_EXIT_DISPLAY_POWER_GATING_PARAMS_MESSAGE_ID (0x75U) + +typedef struct NV0073_CTRL_CMD_DFP_EXIT_DISPLAY_POWER_GATING_PARAMS { + NvU32 subDeviceInstance; + NvU32 flag; + NV0073_CTRL_DFP_EXIT_DISPLAY_POWER_GATING_DIAGNOSTIC_DATA diagnosticData; +} NV0073_CTRL_CMD_DFP_EXIT_DISPLAY_POWER_GATING_PARAMS; + +#define NV0073_CTRL_DFP_EXIT_DISPLAY_POWER_GATING_FLAGS_RESERVED 31:0 +#define NV0073_CTRL_DFP_EXIT_DISPLAY_POWER_GATING_FLAGS_RESERVED_INIT (0x00000000U) + /* * NV0073_CTRL_CMD_DFP_EDP_DRIVER_UNLOAD * @@ -1307,9 +1446,9 @@ typedef struct NV0073_CTRL_DFP_GET_FIXED_MODE_TIMING_PARAMS { * NV_ERR_INVALID_ARGUMENT * NV_ERR_NOT_SUPPORTED */ -#define NV0073_CTRL_CMD_DFP_EDP_DRIVER_UNLOAD (0x731174U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DFP_INTERFACE_ID << 8) | NV0073_CTRL_DFP_EDP_DRIVER_UNLOAD_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_DFP_EDP_DRIVER_UNLOAD (0x731176U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DFP_INTERFACE_ID << 8) | NV0073_CTRL_DFP_EDP_DRIVER_UNLOAD_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_DFP_EDP_DRIVER_UNLOAD_PARAMS_MESSAGE_ID (0x74U) +#define NV0073_CTRL_DFP_EDP_DRIVER_UNLOAD_PARAMS_MESSAGE_ID (0x76U) typedef struct NV0073_CTRL_DFP_EDP_DRIVER_UNLOAD_PARAMS { NvU32 subDeviceInstance; diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dp.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dp.h index fe9e6a9b98..200e367223 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dp.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dp.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2005-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2005-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -1562,15 +1562,6 @@ typedef struct NV0073_CTRL_DP_GET_EDP_DATA_PARAMS { * Specifies TU size value * watermark * Specifies stream watermark. - * linkClkFreqHz -- moving to MvidWarParams. Use that instead. - * Specifies the link freq in Hz. Note that this is the byte clock. - * eg: = (5.4 Ghz / 10) - * actualPclkHz; -- moving to MvidWarParams. Use that instead. - * Specifies the actual pclk freq in Hz. - * mvidWarEnabled - * Specifies whether MVID WAR is enabled. - * MvidWarParams - * Is valid if mvidWarEnabled is true. * bEnableTwoHeadOneOr * Whether two head one OR is enabled. If this is set then RM will * replicate SF settings of Master head on Slave head. Head index @@ -1614,19 +1605,7 @@ typedef struct NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS { NvBool bEnhancedFraming; NvU32 tuSize; NvU32 waterMark; - NvU32 actualPclkHz; // deprecated -Use MvidWarParams - NvU32 linkClkFreqHz; // deprecated -Use MvidWarParams NvBool bEnableAudioOverRightPanel; - struct { - NvU32 activeCnt; - NvU32 activeFrac; - NvU32 activePolarity; - NvBool mvidWarEnabled; - struct { - NvU32 actualPclkHz; - NvU32 linkClkFreqHz; - } MvidWarParams; - } Legacy; } SST; } NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS; @@ -1817,6 +1796,10 @@ typedef struct NV0073_CTRL_CMD_DP_SEND_ACT_PARAMS { * Returns NV_TRUE if LTTPR Link Training feature is set * bOverrideLinkBw * Returns NV_TRUE if DFP limits defined in DCB have to be honored, else NV_FALSE + * bUseRgFlushSequence + * Returns NV_TRUE if GPU uses the new RG flush design + * bSupportDPDownSpread + * Returns NV_TRUE if GPU support downspread. * * DSC caps * @@ -1845,6 +1828,8 @@ typedef struct NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS { NvBool bFECSupported; NvBool bIsTrainPhyRepeater; NvBool bOverrideLinkBw; + NvBool bUseRgFlushSequence; + NvBool bSupportDPDownSpread; NV0073_CTRL_CMD_DSC_CAP_PARAMS DSC; } NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS; @@ -2837,4 +2822,65 @@ typedef struct NV0073_CTRL_DP_EXECUTE_OVERDRIVE_POLICY_PARAMS { } NV0073_CTRL_DP_EXECUTE_OVERDRIVE_POLICY_PARAMS; + +/* + * NV0073_CTRL_CMD_DP_AUXCH_VBL_CTRL + * + * This command is used to query VBL capability and status as well as + * control enable/disable of VBL feature of eDP LCD panels. + * + * subDeviceInstance [in] + * This parameter specifies the subdevice instance within the + * NV04_DISPLAY_COMMON parent device to which the operation should be + * directed. This parameter must specify a value between zero and the + * total number of subdevices within the parent device. This parameter + * should be set to zero for default behavior. + * displayId [in] + * This parameter specifies the ID of the DP display which owns + * the Main Link to be adjusted. The display ID must a DP display + * as determined with the NV0073_CTRL_CMD_SPECIFIC_GET_TYPE command. + * If more than one displayId bit is set or the displayId is not a DP, + * this call will return NV_ERR_INVALID_ARGUMENT. + * cmd [in] + * This parameter is an input to this command. The cmd parameter tells + * whether we have to get the value of a specific field or set the + * value in case of a writeable field. + * control [in] + * This parameter is input by the user. It is used by the user to decide the control + * value to be written to the VBL control field. The command to write is + * the NV0073_CTRL_CMD_DP_AUXCH_VBL_CTL_SET command. + * bVblControlCapable [out] + * This parameter reflects the VBL control capability of the Sink which can be + * fetched by using the NV0073_CTRL_CMD_DP_AUXCH_VBL_CTL_CAPABLE_QUERY command. + * bVblStatus [out] + * This parameter reflects the Sink VBL status which can be + * fetched by using the NV0073_CTRL_CMD_DP_AUXCH_VBL_STATUS_QUERY command. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_ARGUMENT + * NV_ERR_NOT_SUPPORTED + */ + +#define NV0073_CTRL_CMD_DP_AUXCH_VBL_CTRL (0x731386U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_AUXCH_VBL_CTRL_PARAMS_MESSAGE_ID" */ + +/* valid commands */ +#define NV0073_CTRL_CMD_DP_AUXCH_QUERY_VBL_CTL_CAPABLE 0x00000000 +#define NV0073_CTRL_CMD_DP_AUXCH_QUERY_VBL_STATUS 0x00000001 +#define NV0073_CTRL_CMD_DP_AUXCH_SET_VBL_CTL 0x00000002 + +/* valid state values */ +#define NV0073_CTRL_CMD_DP_AUXCH_SET_VBL_CTL_DISABLE 0x00000000 +#define NV0073_CTRL_CMD_DP_AUXCH_SET_VBL_CTL_ENABLE 0x00000001 + +#define NV0073_CTRL_CMD_DP_AUXCH_VBL_CTRL_PARAMS_MESSAGE_ID (0x86U) + +typedef struct NV0073_CTRL_CMD_DP_AUXCH_VBL_CTRL_PARAMS { + NvU32 subDeviceInstance; + NvU32 displayId; + NvU8 cmd; + NvU8 control; + NvBool bVblControlCapable; + NvBool bVblStatus; +} NV0073_CTRL_CMD_DP_AUXCH_VBL_CTRL_PARAMS; /* _ctrl0073dp_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073internal.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073internal.h index bd7c235079..b95c952f6e 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073internal.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073internal.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -56,10 +56,22 @@ typedef NV0073_CTRL_CMD_DFP_SWITCH_DISP_MUX_PARAMS NV0073_CTRL_CMD_INTERNAL_DFP_ typedef NV0073_CTRL_CMD_DFP_GET_DISP_MUX_STATUS_PARAMS NV0073_CTRL_CMD_INTERNAL_DFP_GET_DISP_MUX_STATUS_PARAMS; -#define NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL (0x730405U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_INTERNAL_INTERFACE_ID << 8) | NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_ENABLE (0x730405U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_INTERNAL_INTERFACE_ID << 8) | NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_ENABLE_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_PARAMS_MESSAGE_ID (0x5U) +#define NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_ENABLE_PARAMS_MESSAGE_ID (0x5U) -typedef NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_PARAMS NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_PARAMS; +typedef NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE_PARAMS NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_ENABLE_PARAMS; + +#define NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_DISABLE (0x730406U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_INTERNAL_INTERFACE_ID << 8) | NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_DISABLE_PARAMS_MESSAGE_ID" */ + +#define NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_DISABLE_PARAMS_MESSAGE_ID (0x6U) + +typedef NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE_PARAMS NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_DISABLE_PARAMS; + +#define NV0073_CTRL_CMD_INTERNAL_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR (0x730407U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_INTERNAL_INTERFACE_ID << 8) | NV0073_CTRL_INTERNAL_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR_PARAMS_MESSAGE_ID" */ + +#define NV0073_CTRL_INTERNAL_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR_PARAMS_MESSAGE_ID (0x7U) + +typedef NV0073_CTRL_SYSTEM_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR_PARAMS NV0073_CTRL_INTERNAL_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR_PARAMS; /* ctrl0073internal_h */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073system.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073system.h index bf598c0c5c..679b1b4d12 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073system.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073system.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2005-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2005-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -30,6 +30,7 @@ // Source file: ctrl/ctrl0073/ctrl0073system.finn // +#include "nvlimits.h" #include "ctrl/ctrl0073/ctrl0073base.h" /* NV04_DISPLAY_COMMON system-level control commands and parameters */ @@ -89,9 +90,9 @@ * Possible status values returned are: * NV_OK */ -#define NV0073_CTRL_CMD_SYSTEM_GET_CAPS_V2 (0x730138U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_CAPS_V2_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_GET_CAPS_V2 (0x730101U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_CAPS_V2_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_GET_CAPS_V2_PARAMS_MESSAGE_ID (0x38U) +#define NV0073_CTRL_SYSTEM_GET_CAPS_V2_PARAMS_MESSAGE_ID (0x01U) typedef struct NV0073_CTRL_SYSTEM_GET_CAPS_V2_PARAMS { NvU8 capsTbl[NV0073_CTRL_SYSTEM_CAPS_TBL_SIZE]; @@ -130,7 +131,7 @@ typedef struct NV0073_CTRL_SYSTEM_GET_CAPS_V2_PARAMS { */ #define NV0073_CTRL_CMD_SYSTEM_GET_NUM_HEADS (0x730102U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_NUM_HEADS_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_GET_NUM_HEADS_PARAMS_MESSAGE_ID (0x2U) +#define NV0073_CTRL_SYSTEM_GET_NUM_HEADS_PARAMS_MESSAGE_ID (0x02U) typedef struct NV0073_CTRL_SYSTEM_GET_NUM_HEADS_PARAMS { NvU32 subDeviceInstance; @@ -184,12 +185,12 @@ typedef struct NV0073_CTRL_SYSTEM_GET_NUM_HEADS_PARAMS { * NV_ERR_INVALID_PARAM_STRUCT * NV_ERR_INVALID_ARGUMENT */ -#define NV0073_CTRL_CMD_SYSTEM_GET_SCANLINE (0x730108U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_SCANLINE_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_GET_SCANLINE (0x730104U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_SCANLINE_PARAMS_MESSAGE_ID" */ #define NV0073_CTRL_CMD_SYSTEM_GET_SCANLINE_RIGHT_EYE 0x00000000U #define NV0073_CTRL_CMD_SYSTEM_GET_SCANLINE_LEFT_EYE 0x00000001U -#define NV0073_CTRL_SYSTEM_GET_SCANLINE_PARAMS_MESSAGE_ID (0x8U) +#define NV0073_CTRL_SYSTEM_GET_SCANLINE_PARAMS_MESSAGE_ID (0x04U) typedef struct NV0073_CTRL_SYSTEM_GET_SCANLINE_PARAMS { NvU32 subDeviceInstance; @@ -224,9 +225,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_SCANLINE_PARAMS { * NV_ERR_INVALID_PARAM_STRUCT * NV_ERR_INVALID_ARGUMENT */ -#define NV0073_CTRL_CMD_SYSTEM_GET_VBLANK_COUNTER (0x730109U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_VBLANK_COUNTER_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_GET_VBLANK_COUNTER (0x730105U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_VBLANK_COUNTER_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_GET_VBLANK_COUNTER_PARAMS_MESSAGE_ID (0x9U) +#define NV0073_CTRL_SYSTEM_GET_VBLANK_COUNTER_PARAMS_MESSAGE_ID (0x05U) typedef struct NV0073_CTRL_SYSTEM_GET_VBLANK_COUNTER_PARAMS { NvU32 subDeviceInstance; @@ -261,9 +262,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_VBLANK_COUNTER_PARAMS { * NV_ERR_INVALID_PARAM_STRUCT * NV_ERR_INVALID_ARGUMENT */ -#define NV0073_CTRL_CMD_SYSTEM_GET_VBLANK_ENABLE (0x73010aU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_VBLANK_ENABLE_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_GET_VBLANK_ENABLE (0x730106U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_VBLANK_ENABLE_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_GET_VBLANK_ENABLE_PARAMS_MESSAGE_ID (0xAU) +#define NV0073_CTRL_SYSTEM_GET_VBLANK_ENABLE_PARAMS_MESSAGE_ID (0x06U) typedef struct NV0073_CTRL_SYSTEM_GET_VBLANK_ENABLE_PARAMS { NvU32 subDeviceInstance; @@ -303,9 +304,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_VBLANK_ENABLE_PARAMS { * NV_ERR_INVALID_PARAM_STRUCT * NV_ERR_INVALID_ARGUMENT */ -#define NV0073_CTRL_CMD_SYSTEM_GET_SUPPORTED (0x730120U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_SUPPORTED_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_GET_SUPPORTED (0x730107U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_SUPPORTED_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_GET_SUPPORTED_PARAMS_MESSAGE_ID (0x20U) +#define NV0073_CTRL_SYSTEM_GET_SUPPORTED_PARAMS_MESSAGE_ID (0x07U) typedef struct NV0073_CTRL_SYSTEM_GET_SUPPORTED_PARAMS { NvU32 subDeviceInstance; @@ -385,9 +386,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_SUPPORTED_PARAMS { * NV_ERR_INVALID_ARGUMENT * NVOS_STATUS_ERROR_RETRY */ -#define NV0073_CTRL_CMD_SYSTEM_GET_CONNECT_STATE (0x730122U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_CONNECT_STATE_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_GET_CONNECT_STATE (0x730108U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_CONNECT_STATE_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_GET_CONNECT_STATE_PARAMS_MESSAGE_ID (0x22U) +#define NV0073_CTRL_SYSTEM_GET_CONNECT_STATE_PARAMS_MESSAGE_ID (0x08U) typedef struct NV0073_CTRL_SYSTEM_GET_CONNECT_STATE_PARAMS { NvU32 subDeviceInstance; @@ -455,9 +456,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_CONNECT_STATE_PARAMS { */ -#define NV0073_CTRL_CMD_SYSTEM_GET_HOTPLUG_CONFIG (0x730123U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_GET_HOTPLUG_CONFIG (0x730109U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS_MESSAGE_ID (0x23U) +#define NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS_MESSAGE_ID (0x09U) typedef struct NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS { NvU32 subDeviceInstance; @@ -509,9 +510,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS { */ -#define NV0073_CTRL_CMD_SYSTEM_GET_HOTPLUG_STATE (0x730124U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_HOTPLUG_STATE_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_GET_HOTPLUG_STATE (0x73010aU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_HOTPLUG_STATE_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_GET_HOTPLUG_STATE_PARAMS_MESSAGE_ID (0x24U) +#define NV0073_CTRL_SYSTEM_GET_HOTPLUG_STATE_PARAMS_MESSAGE_ID (0x0AU) typedef struct NV0073_CTRL_SYSTEM_GET_HOTPLUG_STATE_PARAMS { NvU32 subDeviceInstance; @@ -576,9 +577,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_HOTPLUG_STATE_PARAMS { * NV_ERR_INVALID_PARAM_STRUCT * NV_ERR_INVALID_ARGUMENT */ -#define NV0073_CTRL_CMD_SYSTEM_GET_HEAD_ROUTING_MAP (0x730125U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_HEAD_ROUTING_MAP_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_GET_HEAD_ROUTING_MAP (0x73010bU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_HEAD_ROUTING_MAP_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_GET_HEAD_ROUTING_MAP_PARAMS_MESSAGE_ID (0x25U) +#define NV0073_CTRL_SYSTEM_GET_HEAD_ROUTING_MAP_PARAMS_MESSAGE_ID (0x0BU) typedef struct NV0073_CTRL_SYSTEM_GET_HEAD_ROUTING_MAP_PARAMS { NvU32 subDeviceInstance; @@ -639,9 +640,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_HEAD_ROUTING_MAP_PARAMS { * NV_ERR_INVALID_PARAM_STRUCT * NV_ERR_INVALID_ARGUMENT */ -#define NV0073_CTRL_CMD_SYSTEM_GET_ACTIVE (0x730126U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_ACTIVE_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_GET_ACTIVE (0x73010cU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_ACTIVE_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_GET_ACTIVE_PARAMS_MESSAGE_ID (0x26U) +#define NV0073_CTRL_SYSTEM_GET_ACTIVE_PARAMS_MESSAGE_ID (0x0CU) typedef struct NV0073_CTRL_SYSTEM_GET_ACTIVE_PARAMS { NvU32 subDeviceInstance; @@ -763,10 +764,10 @@ typedef struct NV0073_CTRL_SYSTEM_ACPI_ID_MAP_PARAMS { * Only returned if subdeviceInstance was not valid. */ -#define NV0073_CTRL_CMD_SYSTEM_GET_ACPI_ID_MAP (0x73015aU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_GET_ACPI_ID_MAP (0x730115U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS_MESSAGE_ID (0x5AU) +#define NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS_MESSAGE_ID (0x15U) typedef struct NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS { NvU32 subDeviceInstance; @@ -799,9 +800,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS { * NV_ERR_INVALID_PARAM_STRUCT * NV_ERR_INVALID_ARGUMENT */ -#define NV0073_CTRL_CMD_SYSTEM_GET_INTERNAL_DISPLAYS (0x73015bU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_GET_INTERNAL_DISPLAYS (0x730116U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS_MESSAGE_ID (0x5BU) +#define NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS_MESSAGE_ID (0x16U) typedef struct NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS { NvU32 subDeviceInstance; @@ -837,13 +838,13 @@ typedef struct NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS { * */ -#define NV0073_CTRL_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED_PARAMS_MESSAGE_ID (0x5CU) +#define NV0073_CTRL_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED_PARAMS_MESSAGE_ID (0x17U) typedef struct NV0073_CTRL_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED_PARAMS { NvU32 subDeviceInstance; } NV0073_CTRL_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED_PARAMS; -#define NV0073_CTRL_CMD_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED (0x73015cU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED (0x730117U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED_PARAMS_MESSAGE_ID" */ /* @@ -945,12 +946,12 @@ typedef struct NV0073_CTRL_SYSTEM_CONNECTOR_INFO { * NV_ERR_INVALID_ARGUMENT * */ -#define NV0073_CTRL_CMD_SYSTEM_GET_CONNECTOR_TABLE (0x730165U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_GET_CONNECTOR_TABLE (0x73011dU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_PARAMS_MESSAGE_ID" */ /* maximum number of connector table entries */ #define NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_MAX_ENTRIES (16U) -#define NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_PARAMS_MESSAGE_ID (0x65U) +#define NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_PARAMS_MESSAGE_ID (0x1DU) typedef struct NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_PARAMS { NvU32 subDeviceInstance; @@ -995,9 +996,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_PARAMS { * NV_OK * NV_ERR_INVALID_PARAM_STRUCT */ -#define NV0073_CTRL_CMD_SYSTEM_GET_BOOT_DISPLAYS (0x730166U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_BOOT_DISPLAYS_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_GET_BOOT_DISPLAYS (0x73011eU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_BOOT_DISPLAYS_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_GET_BOOT_DISPLAYS_PARAMS_MESSAGE_ID (0x66U) +#define NV0073_CTRL_SYSTEM_GET_BOOT_DISPLAYS_PARAMS_MESSAGE_ID (0x1EU) typedef struct NV0073_CTRL_SYSTEM_GET_BOOT_DISPLAYS_PARAMS { NvU32 subDeviceInstance; @@ -1174,9 +1175,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_BOOT_DISPLAYS_PARAMS { * NV_ERR_INVALID_ARGUMENT */ -#define NV0073_CTRL_CMD_SYSTEM_EXECUTE_ACPI_METHOD (0x730168U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_EXECUTE_ACPI_METHOD (0x730120U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS_MESSAGE_ID (0x68U) +#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS_MESSAGE_ID (0x20U) typedef struct NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS { NvU32 method; @@ -1285,9 +1286,9 @@ typedef struct NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS { * When set to NV_FALSE, signifies that the vrr monitor is to be removed. * */ -#define NV0073_CTRL_CMD_SYSTEM_VRR_DISPLAY_INFO (0x730185U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_VRR_DISPLAY_INFO_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_VRR_DISPLAY_INFO (0x73012cU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_VRR_DISPLAY_INFO_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_VRR_DISPLAY_INFO_PARAMS_MESSAGE_ID (0x85U) +#define NV0073_CTRL_SYSTEM_VRR_DISPLAY_INFO_PARAMS_MESSAGE_ID (0x2CU) typedef struct NV0073_CTRL_SYSTEM_VRR_DISPLAY_INFO_PARAMS { NvU32 subDeviceInstance; @@ -1340,9 +1341,9 @@ typedef struct NV0073_CTRL_SYSTEM_VRR_DISPLAY_INFO_PARAMS { * NV_ERR_INVALID_ARGUMENT */ -#define NV0073_CTRL_CMD_SYSTEM_GET_HOTPLUG_UNPLUG_STATE (0x73017bU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_GET_HOTPLUG_UNPLUG_STATE (0x73012dU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS_MESSAGE_ID (0x7BU) +#define NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS_MESSAGE_ID (0x2DU) typedef struct NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS { NvU32 subDeviceInstance; @@ -1381,9 +1382,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS { * NV_ERR_INVALID_STATE */ -#define NV0073_CTRL_CMD_SYSTEM_CLEAR_ELV_BLOCK (0x73017dU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_CLEAR_ELV_BLOCK_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_CLEAR_ELV_BLOCK (0x73012eU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_CLEAR_ELV_BLOCK_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_CLEAR_ELV_BLOCK_PARAMS_MESSAGE_ID (0x7DU) +#define NV0073_CTRL_SYSTEM_CLEAR_ELV_BLOCK_PARAMS_MESSAGE_ID (0x2EU) typedef struct NV0073_CTRL_SYSTEM_CLEAR_ELV_BLOCK_PARAMS { NvU32 subDeviceInstance; @@ -1433,9 +1434,9 @@ typedef struct NV0073_CTRL_SYSTEM_CLEAR_ELV_BLOCK_PARAMS { * NV_ERR_INVALID_STATE */ -#define NV0073_CTRL_CMD_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR (0x73017eU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR (0x73012fU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR_PARAMS_MESSAGE_ID (0x7EU) +#define NV0073_CTRL_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR_PARAMS_MESSAGE_ID (0x2FU) typedef struct NV0073_CTRL_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR_PARAMS { NvU32 subDeviceInstance; @@ -1485,9 +1486,9 @@ typedef struct NV0073_CTRL_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR_PARAMS { * minVblankExtension * When VRR is enabled, this is the minimum amount of lines that should be present in the Vblank. The purpose is to cap the maximum refresh (currently only for HDMI 2.1 VRR compliance) */ -#define NV0073_CTRL_CMD_SYSTEM_CONFIG_VRR_PSTATE_SWITCH (0x730184U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_CONFIG_VRR_PSTATE_SWITCH (0x730134U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS_MESSAGE_ID (0x84U) +#define NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS_MESSAGE_ID (0x34U) typedef struct NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS { NvU32 subDeviceInstance; @@ -1500,6 +1501,38 @@ typedef struct NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS { NvU32 minVblankExtension; } NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS; +/* + * NV0073_CTRL_CMD_SYSTEM_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR + * + * This command engages the WAR when VR devices are connected, + * where the Pstate switching can cause delay in Vblank callbacks + * reported to KMD, by servicing disp interrupts inline and reporting the + * callbacks to KMD. Without the WAR, there can be stutters during pstate switch. + * Bug#1778552 + * + * subDeviceInstance + * This parameter specifies the subdevice instance within the + * NV04_DISPLAY_COMMON parent device to which the operation should be + * directed. + * bEngageWAR + * Indicates if inline disp interrupt serving WAR has to be engaged or + * disengaged. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_PARAM_STRUCT + * NV_ERR_INVALID_ARGUMENT + */ + +#define NV0073_CTRL_CMD_SYSTEM_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR (0x730187U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR_PARAMS_MESSAGE_ID" */ + +#define NV0073_CTRL_SYSTEM_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR_PARAMS_MESSAGE_ID (0x87U) + +typedef struct NV0073_CTRL_SYSTEM_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR_PARAMS { + NvU32 subDeviceInstance; + NvBool bEngageWAR; +} NV0073_CTRL_SYSTEM_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR_PARAMS; + /* @@ -1522,9 +1555,9 @@ typedef struct NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS { * NV_ERR_NOT_SUPPORTED */ -#define NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX (0x730190U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX (0x73013dU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS_MESSAGE_ID (0x90U) +#define NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS_MESSAGE_ID (0x3DU) typedef struct NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS { NvU32 subDeviceInstance; @@ -1568,9 +1601,9 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS { * NV_ERR_GENERIC */ -#define NV0073_CTRL_CMD_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH (0x730196U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH (0x730143U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS_MESSAGE_ID (0x96U) +#define NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS_MESSAGE_ID (0x43U) typedef struct NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS { NvU32 subDeviceInstance; @@ -1619,9 +1652,9 @@ typedef struct NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS { * the parameters. */ -#define NV0073_CTRL_CMD_SYSTEM_GET_HOTPLUG_EVENT_CONFIG (0x730197U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_HOTPLUG_EVENT_CONFIG_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_GET_HOTPLUG_EVENT_CONFIG (0x730144U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_HOTPLUG_EVENT_CONFIG_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_GET_HOTPLUG_EVENT_CONFIG_PARAMS_MESSAGE_ID (0x97U) +#define NV0073_CTRL_SYSTEM_GET_HOTPLUG_EVENT_CONFIG_PARAMS_MESSAGE_ID (0x44U) typedef NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS NV0073_CTRL_SYSTEM_GET_HOTPLUG_EVENT_CONFIG_PARAMS; @@ -1634,9 +1667,9 @@ typedef NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS NV0073_CTRL_SYSTEM_GET_HO * the parameters. */ -#define NV0073_CTRL_CMD_SYSTEM_SET_HOTPLUG_EVENT_CONFIG (0x730198U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_SET_HOTPLUG_EVENT_CONFIG_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_SET_HOTPLUG_EVENT_CONFIG (0x730145U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_SET_HOTPLUG_EVENT_CONFIG_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_SYSTEM_SET_HOTPLUG_EVENT_CONFIG_PARAMS_MESSAGE_ID (0x98U) +#define NV0073_CTRL_SYSTEM_SET_HOTPLUG_EVENT_CONFIG_PARAMS_MESSAGE_ID (0x45U) typedef NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS NV0073_CTRL_SYSTEM_SET_HOTPLUG_EVENT_CONFIG_PARAMS; @@ -1665,9 +1698,9 @@ typedef NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS NV0073_CTRL_SYSTEM_SET_HO * NV_ERR_INVALID_ARGUMENT * NV_ERR_NOT_SUPPORTED */ -#define NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS (0x73019bU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS (0x73014aU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS_PARAMS_MESSAGE_ID (0x9BU) +#define NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS_PARAMS_MESSAGE_ID (0x4AU) typedef struct NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS_PARAMS { NvU32 subDeviceInstance; @@ -1694,9 +1727,9 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS_PARAMS { * NV_ERR_INVALID_ARGUMENT * NV_ERR_NOT_SUPPORTED */ -#define NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT (0x73019cU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT (0x73014bU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS_MESSAGE_ID (0x9CU) +#define NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS_MESSAGE_ID (0x4BU) typedef struct NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS { NvU32 subDeviceInstance; @@ -1726,9 +1759,9 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS { * NV_ERR_INVALID_ARGUMENT * NV_ERR_NOT_SUPPORTED */ -#define NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT (0x73019dU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT (0x73014cU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS_MESSAGE_ID (0x9DU) +#define NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS_MESSAGE_ID (0x4CU) typedef struct NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS { NvU32 subDeviceInstance; @@ -1777,9 +1810,9 @@ typedef struct NV0073_CTRL_RM_VRR_SHARED_DATA { NV_DECLARE_ALIGNED(NvU64 dataTimeStamp, 8); } NV0073_CTRL_RM_VRR_SHARED_DATA; -#define NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE (0x73019eU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE (0x73014dU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS_MESSAGE_ID (0x9EU) +#define NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS_MESSAGE_ID (0x4DU) typedef struct NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS { NvU32 subDeviceInstance; @@ -1797,20 +1830,22 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS { * The VBlank Semaphore Control API ("VBlank Sem Control") allows clients to * register for a semaphore release to be performed on the specified memory. * - * One or more clients may register a memory allocation + offset by specifying - * _PARAMS::bEnabled = NV_TRUE and describing a video memory object with - * _PARAMS::hMemory and an offset within that memory object - * (_PARAMS::memoryOffset). Until the hMemory + memoryOffset combination is - * disabled by a subsequent call with bEnabled = NV_FALSE, during each vblank on - * the specified head, RM will interpret the specified memory location as an - * NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA data structure. + * One or more clients may register a memory allocation + offset by describing a + * video memory object with _PARAMS::hMemory and an offset within that memory + * object (_PARAMS::memoryOffset). Until the hMemory + memoryOffset combination + * is disabled, during each vblank on the specified heads, RM will interpret the + * specified memory location as an + * NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA data structure. Each enabled + * head will inspect the corresponding + * NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA_ONE_HEAD at + * NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA::head[head]. * * _PARAMS::memoryOffset must be a multiple of 8, so that GPU semaphore releases * and GSP can write to 8-byte fields within - * NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA with natural alignment. + * NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA_ONE_HEAD with natural alignment. * - * During vblank, the _CONTROL_DATA::control field will be read, and the - * following pseudocode will be performed: + * During vblank, the _CONTROL_DATA_ONE_HEAD::requestCounter field will be read, + * and the following pseudocode will be performed: * * swapInterval = DRF_VAL(data->flags) * useMinimumGpuTime = DRV_VAL(data->flags) @@ -1832,16 +1867,16 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS { * previousVblankCount = currentVblankCount * * I.e., if the client-described conditions are met, the RM will write - * _CONTROL_DATA::semaphore to the client-requested 'requestCounter' along with - * several informational fields (vblankCount, releaseGpuTime). + * _CONTROL_DATA_ONE_HEAD::semaphore to the client-requested 'requestCounter' + * along with several informational fields (vblankCount, releaseGpuTime). * * The intent is for clients to use semaphore releases to write: * - * _CONTROL_DATA::minimumGpuTime (if desired) - * _CONTROL_DATA::swapInterval - * _CONTROL_DATA::requestCounter + * _CONTROL_DATA_ONE_HEAD::minimumGpuTime (if desired) + * _CONTROL_DATA_ONE_HEAD::swapInterval + * _CONTROL_DATA_ONE_HEAD::requestCounter * - * and then perform a semaphore acquire on _CONTROL_DATA::semaphore >= + * and then perform a semaphore acquire on _CONTROL_DATA_ONE_HEAD::semaphore >= * requestCounter (using the ACQ_GEQ semaphore operation). This will block any * following methods in the client's channel (e.g., a blit) until the requested * conditions are met. Note the ::requestCounter should be written last, @@ -1849,10 +1884,10 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS { * vblank callback, to inspect the other fields. * * Additionally, clients should use the CPU (not semaphore releases in their - * channel) to write the field _CONTROL_DATA::requestCounterAccel at the same - * time that they enqueue the semaphore release to write to - * _CONTROL_DATA::requestCounter. ::requestCounterAccel will be used by resman - * to "accelerate" the vblank sem control by copying the value from + * channel) to write the field _CONTROL_DATA_ONE_HEAD::requestCounterAccel at + * the same time that they enqueue the semaphore release to write to + * _CONTROL_DATA_ONE_HEAD::requestCounter. ::requestCounterAccel will be used + * by resman to "accelerate" the vblank sem control by copying the value from * ::requestCounterAccel to ::semaphore. This will be done when the vblank sem * control is disabled, and when a client calls * NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS. It is important for resman @@ -1866,13 +1901,35 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS { * * The same hMemory (with difference memoryOffsets) may be used by multiple * VBlank Sem Controls. + * + * Lastly, the bUseHeadIndexMap field in the enable params is used to tell + * resman to honor the headIndexMap[] table in the enable params. Normally, the + * N-th bit in the enable params headMask corresponds to element N in the + * _CONTROL_DATA::head[] array. But, headIndexMap[] allows the N-th bit in + * headMask to be remapped to a different index in the head[] array. E.g., + * + * NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA *pData = ...; + * + * FOR_EACH_INDEX_IN_MASK(32, head, pParams->headMask) + * { + * NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA_ONE_HEAD *pDataOneHead; + * NvU32 headIndex = pParams->bUseHeadIndexMap ? + * pParams->headIndexMap[head] : head; + * pDataOneHead = &pData->head[headIndex]; + * ... + * } + * FOR_EACH_INDEX_IN_MASK_END; + * + * This remapping is important for nvkms' use of the RMAPI. To support + * 2head1or, nvkms may remap head indices between the headMask passed to RM and + * the array indices in _CONTROL_DATA::head[] as used by OpenGL. */ -/* Fields within NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA::flags */ +/* Fields within NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA_ONE_HEAD::flags */ #define NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_SWAP_INTERVAL 15:0 #define NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_USE_MINIMUM_GPU_TIME 16:16 -typedef struct NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA { +typedef struct NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA_ONE_HEAD { NvU32 requestCounterAccel; NvU32 requestCounter; NvU32 flags; @@ -1881,19 +1938,34 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA { NvU32 semaphore; NV_DECLARE_ALIGNED(NvU64 vblankCount, 8); NV_DECLARE_ALIGNED(NvU64 releaseGpuTime, 8); +} NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA_ONE_HEAD; + +typedef struct NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA { + NV_DECLARE_ALIGNED(NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA_ONE_HEAD head[NV_MAX_HEADS], 8); } NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA; -#define NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL (0x73019fU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE (0x73014eU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_PARAMS_MESSAGE_ID (0x9FU) +#define NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE_PARAMS_MESSAGE_ID (0x4EU) -typedef struct NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_PARAMS { +typedef struct NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE_PARAMS { + NvU32 subDeviceInstance; + NvU32 headMask; + NvU8 headIndexMap[NV_MAX_HEADS]; + NvHandle hMemory; + NV_DECLARE_ALIGNED(NvU64 memoryOffset, 8); + NvBool bUseHeadIndexMap; +} NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE_PARAMS; + +#define NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE (0x73014fU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE_PARAMS_MESSAGE_ID" */ + +#define NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE_PARAMS_MESSAGE_ID (0x4FU) + +typedef struct NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE_PARAMS { NvU32 subDeviceInstance; - NvBool bEnable; - NvU32 head; NvHandle hMemory; NV_DECLARE_ALIGNED(NvU64 memoryOffset, 8); -} NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_PARAMS; +} NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE_PARAMS; /* * Accelerate all VBlank Sem Controls on the specified heads. @@ -1902,9 +1974,9 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_PARAMS { * their pending ::semaphore fields to the value in their ::requestCounterAccel * field. */ -#define NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS (0x7301a2U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS (0x730150U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS_PARAMS_MESSAGE_ID (0xA2U) +#define NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS_PARAMS_MESSAGE_ID (0x50U) typedef struct NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS_PARAMS { NvU32 subDeviceInstance; @@ -1929,9 +2001,9 @@ typedef struct NV0073_CTRL_SHARED_MEMDESC_INFO { NvU32 cpuCacheAttrib; } NV0073_CTRL_SHARED_MEMDESC_INFO; -#define NV0073_CTRL_CMD_SYSTEM_MAP_SHARED_DATA (0x7301a3U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_MAP_SHARED_DATA_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_MAP_SHARED_DATA (0x730151U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_MAP_SHARED_DATA_PARAMS_MESSAGE_ID" */ -#define NV0073_CTRL_CMD_SYSTEM_MAP_SHARED_DATA_PARAMS_MESSAGE_ID (0xA3U) +#define NV0073_CTRL_CMD_SYSTEM_MAP_SHARED_DATA_PARAMS_MESSAGE_ID (0x51U) typedef struct NV0073_CTRL_CMD_SYSTEM_MAP_SHARED_DATA_PARAMS { NV_DECLARE_ALIGNED(NV0073_CTRL_SHARED_MEMDESC_INFO memDescInfo, 8); diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080gpu.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080gpu.h index 0cacb00464..2c3eda19dc 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080gpu.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080gpu.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2004-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2004-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -309,7 +309,8 @@ typedef struct NV0080_CTRL_GPU_QUERY_SW_STATE_PERSISTENCE_PARAMS { #define NV0080_CTRL_GPU_GET_VIRTUALIZATION_MODE_PARAMS_MESSAGE_ID (0x89U) typedef struct NV0080_CTRL_GPU_GET_VIRTUALIZATION_MODE_PARAMS { - NvU32 virtualizationMode; + NvU32 virtualizationMode; + NvBool isGridBuild; } NV0080_CTRL_GPU_GET_VIRTUALIZATION_MODE_PARAMS; @@ -502,7 +503,7 @@ typedef struct NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS { // Update this macro if new HW exceeds GPU Classlist MAX_SIZE -#define NV0080_CTRL_GPU_CLASSLIST_MAX_SIZE 174 +#define NV0080_CTRL_GPU_CLASSLIST_MAX_SIZE 100 #define NV0080_CTRL_CMD_GPU_GET_CLASSLIST_V2 (0x800292) /* finn: Evaluated from "(FINN_NV01_DEVICE_0_GPU_INTERFACE_ID << 8) | NV0080_CTRL_GPU_GET_CLASSLIST_V2_PARAMS_MESSAGE_ID" */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl00de.h b/src/common/sdk/nvidia/inc/ctrl/ctrl00de.h index 856941944c..0e2d569e6f 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl00de.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl00de.h @@ -40,6 +40,8 @@ * NV00DE_CTRL_CMD_REQUEST_DATA_POLL * * @brief Request some polled data elements to be updated + * Equivalent to requesting polling using NV00DE_ALLOC_PARAMETERS->polledDataMask + * See cl00de.h for mask bits * * @param[in] polledDataMask Bitmask of data to be updated * diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl00fe.h b/src/common/sdk/nvidia/inc/ctrl/ctrl00fe.h index e80f7d8362..e83f286987 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl00fe.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl00fe.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -89,3 +89,18 @@ typedef struct NV00FE_CTRL_SUBMIT_OPERATIONS_PARAMS { NvU32 operationsProcessedCount; } NV00FE_CTRL_SUBMIT_OPERATIONS_PARAMS; +/* + * NV00FE_CTRL_CMD_RESIZE_QUEUE + * + * Resize the MemoryMapper command queue + * All pending commands remain in queue + * + */ +#define NV00FE_CTRL_CMD_RESIZE_QUEUE (0xfe0102U) /* finn: Evaluated from "(FINN_NV_MEMORY_MAPPER_INTERFACE_ID << 8) | NV00FE_CTRL_RESIZE_QUEUE_PARAMS_MESSAGE_ID" */ + +#define NV00FE_CTRL_RESIZE_QUEUE_PARAMS_MESSAGE_ID (0x2U) + +typedef struct NV00FE_CTRL_RESIZE_QUEUE_PARAMS { + NvU32 maxQueueSize; +} NV00FE_CTRL_RESIZE_QUEUE_PARAMS; + diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0100.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0100.h new file mode 100644 index 0000000000..3c44f90fbe --- /dev/null +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0100.h @@ -0,0 +1,237 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: ctrl/ctrl0100.finn +// + +#include "ctrl/ctrlxxxx.h" + +#define NV0100_CTRL_CMD(cat,idx) NVXXXX_CTRL_CMD(0x0100, NV0100_CTRL_##cat, idx) + +/* Client command categories (6bits) */ +#define NV0100_CTRL_RESERVED (0x00U) +#define NV0100_CTRL_LOCK_STRESS (0x01U) + +/* + * NV0100_CTRL_CMD_NULL + * + * This command does nothing. + * This command does not take any parameters. + * + * Possible status values returned are: + * NV_OK + */ +#define NV0100_CTRL_CMD_NULL (0x1000000U) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_RESERVED_INTERFACE_ID << 8) | 0x0" */ + + + +/* + * NV0100_CTRL_CMD_RESET_LOCK_STRESS_STATE + * + * This command resets RM's lock stress counters to 0, allowing for a new lock stress + * run to start. + * + * Possible status values returned are: + * NV_OK + */ +#define NV0100_CTRL_CMD_RESET_LOCK_STRESS_STATE (0x1000101U) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | 0x1" */ + +/* + * Bit fields to indicate to the caller whether an action was performed on a counter + * Setting any of these fields to 1 means to increment/decrement the respective counter. + * Setting any of these fields to 0 means to ignore the respective counter. + */ +#define NV0100_CTRL_GLOBAL_RMAPI_LOCK_STRESS_COUNTER_ACTION 0:0 +#define NV0100_CTRL_GPU_LOCK_STRESS_COUNTER_ACTION 1:1 +#define NV0100_CTRL_CLIENT_LOCK_STRESS_COUNTER_ACTION 2:2 +#define NV0100_CTRL_INTERNAL_CLIENT_LOCK_STRESS_COUNTER_ACTION 3:3 +#define NV0100_CTRL_ALL_LOCK_STRESS_COUNTER_ACTION 3:0 + +/* + * Bit fields to indicate to the caller what type of action was performed on a counter + * Setting any of these fields to 1 means to increment the respective counter. + * Setting any of these fields to 0 means to decrement the respective counter. + */ +#define NV0100_CTRL_GLOBAL_RMAPI_LOCK_STRESS_COUNTER_INCREMENT 4:4 +#define NV0100_CTRL_GPU_LOCK_STRESS_COUNTER_INCREMENT 5:5 +#define NV0100_CTRL_CLIENT_LOCK_STRESS_COUNTER_INCREMENT 6:6 +#define NV0100_CTRL_INTERNAL_CLIENT_LOCK_STRESS_COUNTER_INCREMENT 7:7 +#define NV0100_CTRL_ALL_LOCK_STRESS_COUNTER_INCREMENT 7:4 + +typedef struct NV0100_CTRL_LOCK_STRESS_OUTPUT { + NvU8 action; +} NV0100_CTRL_LOCK_STRESS_OUTPUT; + +/* + * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_ALL_RM_LOCKS + * + * This command does a random increment/decrement on global counters in RM and reports + * the operation performed back to the caller. This is done with all RM locks held. + * + * Possible status values returned are: + * NV_OK + */ +#define NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_ALL_RM_LOCKS (0x1000102U) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | NV0100_CTRL_PERFORM_LOCK_STRESS_ALL_RM_LOCKS_PARAMS_MESSAGE_ID" */ + +#define NV0100_CTRL_PERFORM_LOCK_STRESS_ALL_RM_LOCKS_PARAMS_MESSAGE_ID (0x2U) + +typedef NV0100_CTRL_LOCK_STRESS_OUTPUT NV0100_CTRL_PERFORM_LOCK_STRESS_ALL_RM_LOCKS_PARAMS; + +/* + * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_NO_GPUS_LOCK + * + * This command does a random increment/decrement on global counters in RM and reports + * the operation performed back to the caller. This is done with all RM locks held except + * for the GPU locks. + * + * Possible status values returned are: + * NV_OK + */ +#define NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_NO_GPUS_LOCK (0x1000103U) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_PARAMS_MESSAGE_ID" */ + +#define NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_PARAMS_MESSAGE_ID (0x3U) + +typedef NV0100_CTRL_LOCK_STRESS_OUTPUT NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_PARAMS; + +/* + * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE + * + * This command does a random increment/decrement on global counters in RM and reports + * the operation performed back to the caller. This is done with the API lock held in + * read mode and GPU locks held. + * + * Possible status values returned are: + * NV_OK + */ +#define NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE (0x1000104U) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | NV0100_CTRL_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE_PARAMS_MESSAGE_ID" */ + +#define NV0100_CTRL_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE_PARAMS_MESSAGE_ID (0x4U) + +typedef NV0100_CTRL_LOCK_STRESS_OUTPUT NV0100_CTRL_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE_PARAMS; + +/* + * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE + * + * This command does a random increment/decrement on global counters in RM and reports + * the operation performed back to the caller. This is done with the API lock held in + * read mode. + * + * Possible status values returned are: + * NV_OK + */ +#define NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE (0x1000105U) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS_MESSAGE_ID" */ + +#define NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS_MESSAGE_ID (0x5U) + +typedef NV0100_CTRL_LOCK_STRESS_OUTPUT NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS; + +/* + * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_INTERNAL_ALL_RM_LOCKS + * + * This command does a random increment/decrement on global counters in RM and reports + * the operation performed back to the caller. This is done with all RM locks held in the + * internal RM API path. + * + * Possible status values returned are: + * NV_OK + */ +#define NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_INTERNAL_ALL_RM_LOCKS (0x1000106U) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_ALL_RM_LOCKS_PARAMS_MESSAGE_ID" */ + +#define NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_ALL_RM_LOCKS_PARAMS_MESSAGE_ID (0x6U) + +typedef NV0100_CTRL_LOCK_STRESS_OUTPUT NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_ALL_RM_LOCKS_PARAMS; + +/* + * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK + * + * This command does a random increment/decrement on global counters in RM and reports + * the operation performed back to the caller. This is done with all RM locks held except + * for the GPU locks in the internal RM API path. + * + * Possible status values returned are: + * NV_OK + */ +#define NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK (0x1000107U) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_PARAMS_MESSAGE_ID" */ + +#define NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_PARAMS_MESSAGE_ID (0x7U) + +typedef NV0100_CTRL_LOCK_STRESS_OUTPUT NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_PARAMS; + +/* + * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_INTERNAL_API_LOCK_READ_MODE + * + * This command does a random increment/decrement on global counters in RM and reports + * the operation performed back to the caller. This is done with the API lock taken in + * read mode and GPU locks held in the internal RM API path. + * + * Possible status values returned are: + * NV_OK + */ +#define NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_INTERNAL_API_LOCK_READ_MODE (0x1000108U) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_API_LOCK_READ_MODE_PARAMS_MESSAGE_ID" */ + +#define NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_API_LOCK_READ_MODE_PARAMS_MESSAGE_ID (0x8U) + +typedef NV0100_CTRL_LOCK_STRESS_OUTPUT NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_API_LOCK_READ_MODE_PARAMS; + +/* + * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_API_LOCK_READ_MODE + * + * This command does a random increment/decrement on global counters in RM and reports + * the operation performed back to the caller. This is done with the API lock held in read + * mode in the internal RM API path. + * + * Possible status values returned are: + * NV_OK + */ +#define NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_API_LOCK_READ_MODE (0x1000109U) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS_MESSAGE_ID" */ + +#define NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS_MESSAGE_ID (0x9U) + +typedef NV0100_CTRL_LOCK_STRESS_OUTPUT NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS; + +/* + * NV0100_CTRL_CMD_GET_LOCK_STRESS_COUNTERS + * + * This command gets the value of the global lock stress counters in RM at the end of + * the lock stress test. + * + * Possible status values returned are: + * NV_OK + */ +#define NV0100_CTRL_CMD_GET_LOCK_STRESS_COUNTERS (0x100010aU) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | NV0100_CTRL_GET_LOCK_STRESS_COUNTERS_PARAMS_MESSAGE_ID" */ + +#define NV0100_CTRL_GET_LOCK_STRESS_COUNTERS_PARAMS_MESSAGE_ID (0xAU) + +typedef struct NV0100_CTRL_GET_LOCK_STRESS_COUNTERS_PARAMS { + NvS32 globalLockStressCounter; + NvS32 gpuLockStressCounter; + NvS32 clientLockStressCounter; + NvS32 internalClientLockStressCounter; +} NV0100_CTRL_GET_LOCK_STRESS_COUNTERS_PARAMS; + diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080bios.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080bios.h index 47ffccf626..0213cd7166 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080bios.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080bios.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2005-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2005-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080bus.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080bus.h index f3ef290b3a..75284b5490 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080bus.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080bus.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2005-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2005-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -705,75 +705,13 @@ typedef struct NV2080_CTRL_BUS_SET_PCIE_SPEED_PARAMS { NvU32 busSpeed; } NV2080_CTRL_BUS_SET_PCIE_SPEED_PARAMS; -#define NV2080_CTRL_BUS_SET_PCIE_SPEED_2500MBPS (0x00000001) -#define NV2080_CTRL_BUS_SET_PCIE_SPEED_5000MBPS (0x00000002) -#define NV2080_CTRL_BUS_SET_PCIE_SPEED_8000MBPS (0x00000003) -#define NV2080_CTRL_BUS_SET_PCIE_SPEED_16000MBPS (0x00000004) -#define NV2080_CTRL_BUS_SET_PCIE_SPEED_32000MBPS (0x00000005) -#define NV2080_CTRL_BUS_SET_PCIE_SPEED_64000MBPS (0x00000006) +#define NV2080_CTRL_BUS_SET_PCIE_SPEED_2500MBPS (0x00000001) +#define NV2080_CTRL_BUS_SET_PCIE_SPEED_5000MBPS (0x00000002) +#define NV2080_CTRL_BUS_SET_PCIE_SPEED_8000MBPS (0x00000003) +#define NV2080_CTRL_BUS_SET_PCIE_SPEED_16000MBPS (0x00000004) +#define NV2080_CTRL_BUS_SET_PCIE_SPEED_32000MBPS (0x00000005) +#define NV2080_CTRL_BUS_SET_PCIE_SPEED_64000MBPS (0x00000006) -/* - * NV2080_CTRL_CMD_BUS_SET_HWBC_UPSTREAM_PCIE_SPEED - * - * This command Initiates a change in PCIE Bus Speed for a HWBC device's upstream - * link. - * - * busSpeed - * This field specifies the target speed to which to train. - * Legal values for this parameter are: - * NV2080_CTRL_BUS_SET_PCIE_SPEED_2500MBPS - * NV2080_CTRL_BUS_SET_PCIE_SPEED_5000MBPS - * primaryBus - * This field is the PCI Express Primary Bus number that uniquely identifies - * a HWBC device's upstream port, i.e. the BR04 Upstream Port. - * - * Possible status values returned are: - * NV_OK - * NV_ERR_INVALID_ARGUMENT - */ -#define NV2080_CTRL_CMD_BUS_SET_HWBC_UPSTREAM_PCIE_SPEED (0x20801806) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_BUS_INTERFACE_ID << 8) | NV2080_CTRL_BUS_SET_HWBC_UPSTREAM_PCIE_SPEED_PARAMS_MESSAGE_ID" */ - -#define NV2080_CTRL_BUS_SET_HWBC_UPSTREAM_PCIE_SPEED_PARAMS_MESSAGE_ID (0x6U) - -typedef struct NV2080_CTRL_BUS_SET_HWBC_UPSTREAM_PCIE_SPEED_PARAMS { - NvU32 busSpeed; - NvU8 primaryBus; -} NV2080_CTRL_BUS_SET_HWBC_UPSTREAM_PCIE_SPEED_PARAMS; - -#define NV2080_CTRL_BUS_SET_HWBC_UPSTREAM_PCIE_SPEED_2500MBPS (0x00000001) -#define NV2080_CTRL_BUS_SET_HWBC_UPSTREAM_PCIE_SPEED_5000MBPS (0x00000002) - -/* - * NV2080_CTRL_CMD_BUS_GET_HWBC_UPSTREAM_PCIE_SPEED - * - * This command gets the current PCIE Bus Speed for a HWBC device's upstream - * link. - * - * primaryBus - * This field is the PCI Express Primary Bus number that uniquely identifies - * a HWBC device's upstream port, i.e. the BR04 Upstream Port. - * busSpeed - * This field specifies a pointer in the caller's address space - * to the NvU32 variable into which the bus speed is to be returned. - * On success, this parameter will contain one of the following values: - * NV2080_CTRL_BUS_SET_PCIE_SPEED_2500MBPS - * NV2080_CTRL_BUS_SET_PCIE_SPEED_5000MBPS - * - * Possible status values returned are: - * NV_OK - * NV_ERR_INVALID_ARGUMENT - */ -#define NV2080_CTRL_CMD_BUS_GET_HWBC_UPSTREAM_PCIE_SPEED (0x20801807) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_BUS_INTERFACE_ID << 8) | NV2080_CTRL_BUS_GET_HWBC_UPSTREAM_PCIE_SPEED_PARAMS_MESSAGE_ID" */ - -#define NV2080_CTRL_BUS_GET_HWBC_UPSTREAM_PCIE_SPEED_PARAMS_MESSAGE_ID (0x7U) - -typedef struct NV2080_CTRL_BUS_GET_HWBC_UPSTREAM_PCIE_SPEED_PARAMS { - NvU32 busSpeed; - NvU8 primaryBus; -} NV2080_CTRL_BUS_GET_HWBC_UPSTREAM_PCIE_SPEED_PARAMS; - -#define NV2080_CTRL_BUS_GET_HWBC_UPSTREAM_PCIE_SPEED_2500MBPS (0x00000001) -#define NV2080_CTRL_BUS_GET_HWBC_UPSTREAM_PCIE_SPEED_5000MBPS (0x00000002) /* * NV2080_CTRL_CMD_BUS_MAP_BAR2 @@ -791,7 +729,7 @@ typedef struct NV2080_CTRL_BUS_GET_HWBC_UPSTREAM_PCIE_SPEED_PARAMS { * NV_ERR_NOT_SUPPORTED * */ -#define NV2080_CTRL_CMD_BUS_MAP_BAR2 (0x20801809) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_BUS_INTERFACE_ID << 8) | NV2080_CTRL_BUS_MAP_BAR2_PARAMS_MESSAGE_ID" */ +#define NV2080_CTRL_CMD_BUS_MAP_BAR2 (0x20801809) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_BUS_INTERFACE_ID << 8) | NV2080_CTRL_BUS_MAP_BAR2_PARAMS_MESSAGE_ID" */ #define NV2080_CTRL_BUS_MAP_BAR2_PARAMS_MESSAGE_ID (0x9U) @@ -853,31 +791,6 @@ typedef struct NV2080_CTRL_BUS_VERIFY_BAR2_PARAMS { NvU32 size; } NV2080_CTRL_BUS_VERIFY_BAR2_PARAMS; -/* - * NV2080_CTRL_CMD_BUS_HWBC_GET_UPSTREAM_BAR0 - * - * This command gets the BAR0 for a HWBC device's upstream port. - * - * primaryBus - * This field is the PCI Express Primary Bus number that uniquely identifies - * a HWBC device's upstream port, i.e. the BR04 Upstream Port. - * physBAR0 - * This field returns the BAR0 physical address of the HWBC device's - * upstream port. - * - * Possible status values returned are: - * NV_OK - * NV_ERR_INVALID_ARGUMENT - */ -#define NV2080_CTRL_CMD_BUS_HWBC_GET_UPSTREAM_BAR0 (0x2080180e) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_BUS_INTERFACE_ID << 8) | NV2080_CTRL_BUS_HWBC_GET_UPSTREAM_BAR0_PARAMS_MESSAGE_ID" */ - -#define NV2080_CTRL_BUS_HWBC_GET_UPSTREAM_BAR0_PARAMS_MESSAGE_ID (0xEU) - -typedef struct NV2080_CTRL_BUS_HWBC_GET_UPSTREAM_BAR0_PARAMS { - NV_DECLARE_ALIGNED(NvU64 physBAR0, 8); - NvU8 primaryBus; -} NV2080_CTRL_BUS_HWBC_GET_UPSTREAM_BAR0_PARAMS; - /* * NV2080_CTRL_CMD_BUS_SERVICE_GPU_MULTIFUNC_STATE * This command would reports the current Audio device power state or Sets new power state. @@ -1417,15 +1330,9 @@ typedef struct NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS { * * remoteType[OUT] * NV2080_CTRL_BUS_GET_C2C_INFO_REMOTE_TYPE_CPU - connected to a CPU + * in either self-hosted mode or externally-hostedmode. */ - /* - * in either self-hosted mode or - * externally-hostedmode. - */ - - - #define NV2080_CTRL_CMD_BUS_GET_C2C_INFO (0x2080182b) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_BUS_INTERFACE_ID << 8) | NV2080_CTRL_CMD_BUS_GET_C2C_INFO_PARAMS_MESSAGE_ID" */ #define NV2080_CTRL_CMD_BUS_GET_C2C_INFO_PARAMS_MESSAGE_ID (0x2BU) diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fb.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fb.h index 8dec1fd07f..17e4d687a7 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fb.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fb.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2006-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2006-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -2151,7 +2151,7 @@ typedef struct NV2080_CTRL_FB_FS_INFO_INVALID_QUERY_PARAMS { */ typedef struct NV2080_CTRL_FB_FS_INFO_FBP_MASK_PARAMS { /*! - * [IN]: swizzId + * [in]: swizzId * PartitionID associated with a created smc partition. Currently used only for a * device monitoring client to get the physical values of the FB. The client needs to pass * 'NV2080_CTRL_GPU_PARTITION_ID_INVALID' explicitly if it wants RM to ignore the swizzId. @@ -2160,7 +2160,7 @@ typedef struct NV2080_CTRL_FB_FS_INFO_FBP_MASK_PARAMS { */ NvU32 swizzId; /*! - * [OUT]: physical/local fbp mask. + * [out]: physical/local fbp mask. */ NV_DECLARE_ALIGNED(NvU64 fbpEnMask, 8); } NV2080_CTRL_FB_FS_INFO_FBP_MASK_PARAMS; @@ -2170,11 +2170,11 @@ typedef struct NV2080_CTRL_FB_FS_INFO_FBP_MASK_PARAMS { */ typedef struct NV2080_CTRL_FB_FS_INFO_LTC_MASK_PARAMS { /*! - * [IN]: physical/local FB partition index. + * [in]: physical/local FB partition index. */ NvU32 fbpIndex; /*! - * [OUT]: physical/local ltc mask. + * [out]: physical/local ltc mask. */ NvU32 ltcEnMask; } NV2080_CTRL_FB_FS_INFO_LTC_MASK_PARAMS; @@ -2184,11 +2184,11 @@ typedef struct NV2080_CTRL_FB_FS_INFO_LTC_MASK_PARAMS { */ typedef struct NV2080_CTRL_FB_FS_INFO_LTS_MASK_PARAMS { /*! - * [IN]: physical/local FB partition index. + * [in]: physical/local FB partition index. */ NvU32 fbpIndex; /*! - * [OUT]: physical/local lts mask. + * [out]: physical/local lts mask. * Note that lts bits are flattened out for all ltc with in a fbp. */ NvU32 ltsEnMask; @@ -2199,11 +2199,11 @@ typedef struct NV2080_CTRL_FB_FS_INFO_LTS_MASK_PARAMS { */ typedef struct NV2080_CTRL_FB_FS_INFO_FBPA_MASK_PARAMS { /*! - * [IN]: physical/local FB partition index. + * [in]: physical/local FB partition index. */ NvU32 fbpIndex; /*! - * [OUT]: physical/local FBPA mask. + * [out]: physical/local FBPA mask. */ NvU32 fbpaEnMask; } NV2080_CTRL_FB_FS_INFO_FBPA_MASK_PARAMS; @@ -2213,11 +2213,11 @@ typedef struct NV2080_CTRL_FB_FS_INFO_FBPA_MASK_PARAMS { */ typedef struct NV2080_CTRL_FB_FS_INFO_FBPA_SUBP_MASK_PARAMS { /*! - * [IN]: physical/local FB partition index. + * [in]: physical/local FB partition index. */ NvU32 fbpIndex; /*! - * [OUT]: physical/local FBPA-SubPartition mask. + * [out]: physical/local FBPA-SubPartition mask. */ NvU32 fbpaSubpEnMask; } NV2080_CTRL_FB_FS_INFO_FBPA_SUBP_MASK_PARAMS; @@ -2227,11 +2227,11 @@ typedef struct NV2080_CTRL_FB_FS_INFO_FBPA_SUBP_MASK_PARAMS { */ typedef struct NV2080_CTRL_FB_FS_INFO_FBP_LOGICAL_MAP_PARAMS { /*! - * [IN]: physical/local FB partition index. + * [in]: physical/local FB partition index. */ NvU32 fbpIndex; /*! - * [OUT]: Logical/local FBP index + * [out]: Logical/local FBP index */ NvU32 fbpLogicalIndex; } NV2080_CTRL_FB_FS_INFO_FBP_LOGICAL_MAP_PARAMS; @@ -2241,11 +2241,11 @@ typedef struct NV2080_CTRL_FB_FS_INFO_FBP_LOGICAL_MAP_PARAMS { */ typedef struct NV2080_CTRL_FB_FS_INFO_ROP_MASK_PARAMS { /*! - * [IN]: physical/local FB partition index. + * [in]: physical/local FB partition index. */ NvU32 fbpIndex; /*! - * [OUT]: physical/local ROP mask. + * [out]: physical/local ROP mask. */ NvU32 ropEnMask; } NV2080_CTRL_FB_FS_INFO_ROP_MASK_PARAMS; @@ -2255,16 +2255,16 @@ typedef struct NV2080_CTRL_FB_FS_INFO_ROP_MASK_PARAMS { */ typedef struct NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTC_MASK_PARAMS { /*! - * [IN]: Physical FB partition index. + * [in]: Physical FB partition index. */ NvU32 fbpIndex; /*! - * [IN]: swizzId + * [in]: swizzId * PartitionID associated with a created smc partition. */ NvU32 swizzId; /*! - * [OUT]: physical ltc mask. + * [out]: physical ltc mask. */ NvU32 ltcEnMask; } NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTC_MASK_PARAMS; @@ -2274,16 +2274,16 @@ typedef struct NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTC_MASK_PARAMS { */ typedef struct NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTS_MASK_PARAMS { /*! - * [IN]: Physical FB partition index. + * [in]: Physical FB partition index. */ NvU32 fbpIndex; /*! - * [IN]: swizzId + * [in]: swizzId * PartitionID associated with a created smc partition. */ NvU32 swizzId; /*! - * [OUT]: physical lts mask. + * [out]: physical lts mask. */ NvU32 ltsEnMask; } NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTS_MASK_PARAMS; @@ -2293,16 +2293,16 @@ typedef struct NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTS_MASK_PARAMS { */ typedef struct NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_MASK_PARAMS { /*! - * [IN]: Physical FB partition index. + * [in]: Physical FB partition index. */ NvU32 fbpIndex; /*! - * [IN]: swizzId + * [in]: swizzId * PartitionID associated with a created smc partition. */ NvU32 swizzId; /*! - * [OUT]: physical fbpa mask. + * [out]: physical fbpa mask. */ NvU32 fbpaEnMask; } NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_MASK_PARAMS; @@ -2312,16 +2312,16 @@ typedef struct NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_MASK_PARAMS { */ typedef struct NV2080_CTRL_FB_FS_INFO_PROFILER_MON_ROP_MASK_PARAMS { /*! - * [IN]: Physical FB partition index. + * [in]: Physical FB partition index. */ NvU32 fbpIndex; /*! - * [IN]: swizzId + * [in]: swizzId * PartitionID associated with a created smc partition. */ NvU32 swizzId; /*! - * [OUT]: physical rop mask. + * [out]: physical rop mask. */ NvU32 ropEnMask; } NV2080_CTRL_FB_FS_INFO_PROFILER_MON_ROP_MASK_PARAMS; @@ -2331,11 +2331,11 @@ typedef struct NV2080_CTRL_FB_FS_INFO_PROFILER_MON_ROP_MASK_PARAMS { */ typedef struct NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_SUBP_MASK_PARAMS { /*! - * [IN]: Physical FB partition index. + * [in]: Physical FB partition index. */ NvU32 fbpIndex; /*! - * [IN]: swizzId + * [in]: swizzId * PartitionID associated with a created smc partition. Currently used only for a * device monitoring client to get the physical values of the FB. The client needs to pass * 'NV2080_CTRL_GPU_PARTITION_ID_INVALID' explicitly if it wants RM to ignore the swizzId. @@ -2344,7 +2344,7 @@ typedef struct NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_SUBP_MASK_PARAMS { */ NvU32 swizzId; /*! - * [OUT]: physical FBPA_SubPartition mask associated with requested partition. + * [out]: physical FBPA_SubPartition mask associated with requested partition. */ NV_DECLARE_ALIGNED(NvU64 fbpaSubpEnMask, 8); } NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_SUBP_MASK_PARAMS; @@ -2354,11 +2354,11 @@ typedef struct NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_SUBP_MASK_PARAMS { */ typedef struct NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK_PARAMS { /*! - * [IN]: physical/local sys Id. + * [in]: physical/local sys Id. */ NvU32 sysIdx; /*! - * [OUT]: physical/local sysltc mask. + * [out]: physical/local sysltc mask. */ NvU32 sysl2LtcEnMask; } NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK_PARAMS; @@ -2368,31 +2368,66 @@ typedef struct NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK_PARAMS { */ typedef struct NV2080_CTRL_FB_FS_INFO_PAC_MASK_PARAMS { /*! - * [IN]: physical/local FB partition index. + * [in]: physical/local FB partition index. */ NvU32 fbpIndex; /*! - * [OUT]: physical/local PAC mask. + * [out]: physical/local PAC mask. */ NvU32 pacEnMask; } NV2080_CTRL_FB_FS_INFO_PAC_MASK_PARAMS; +/*! + * Structure holding the in/out params for NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK. + */ +typedef struct NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK_PARAMS { + /*! + * [in]: physical/local FB partition index. + */ + NvU32 fbpIndex; + /*! + * [out]: logical/local ltc mask. + */ + NV_DECLARE_ALIGNED(NvU64 logicalLtcEnMask, 8); +} NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK_PARAMS; + +/*! + * Structure holding the in/out params for NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK. + */ +typedef struct NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK_PARAMS { + /*! + * [in]: Physical FB partition index. + */ + NvU32 fbpIndex; + /*! + * [in]: swizzId + * PartitionID associated with a created smc partition. + */ + NvU32 swizzId; + /*! + * [out]: logical ltc mask. + */ + NV_DECLARE_ALIGNED(NvU64 logicalLtcEnMask, 8); +} NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK_PARAMS; + // Possible values for queryType -#define NV2080_CTRL_FB_FS_INFO_INVALID_QUERY 0x0U -#define NV2080_CTRL_FB_FS_INFO_FBP_MASK 0x1U -#define NV2080_CTRL_FB_FS_INFO_LTC_MASK 0x2U -#define NV2080_CTRL_FB_FS_INFO_LTS_MASK 0x3U -#define NV2080_CTRL_FB_FS_INFO_FBPA_MASK 0x4U -#define NV2080_CTRL_FB_FS_INFO_ROP_MASK 0x5U -#define NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTC_MASK 0x6U -#define NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTS_MASK 0x7U -#define NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_MASK 0x8U -#define NV2080_CTRL_FB_FS_INFO_PROFILER_MON_ROP_MASK 0x9U -#define NV2080_CTRL_FB_FS_INFO_FBPA_SUBP_MASK 0xAU -#define NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_SUBP_MASK 0xBU -#define NV2080_CTRL_FB_FS_INFO_FBP_LOGICAL_MAP 0xCU -#define NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK 0xDU -#define NV2080_CTRL_FB_FS_INFO_PAC_MASK 0xEU +#define NV2080_CTRL_FB_FS_INFO_INVALID_QUERY 0x0U +#define NV2080_CTRL_FB_FS_INFO_FBP_MASK 0x1U +#define NV2080_CTRL_FB_FS_INFO_LTC_MASK 0x2U +#define NV2080_CTRL_FB_FS_INFO_LTS_MASK 0x3U +#define NV2080_CTRL_FB_FS_INFO_FBPA_MASK 0x4U +#define NV2080_CTRL_FB_FS_INFO_ROP_MASK 0x5U +#define NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTC_MASK 0x6U +#define NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTS_MASK 0x7U +#define NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_MASK 0x8U +#define NV2080_CTRL_FB_FS_INFO_PROFILER_MON_ROP_MASK 0x9U +#define NV2080_CTRL_FB_FS_INFO_FBPA_SUBP_MASK 0xAU +#define NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_SUBP_MASK 0xBU +#define NV2080_CTRL_FB_FS_INFO_FBP_LOGICAL_MAP 0xCU +#define NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK 0xDU +#define NV2080_CTRL_FB_FS_INFO_PAC_MASK 0xEU +#define NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK 0xFU +#define NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK 0x10U typedef struct NV2080_CTRL_FB_FS_INFO_QUERY { NvU16 queryType; @@ -2414,6 +2449,8 @@ typedef struct NV2080_CTRL_FB_FS_INFO_QUERY { NV2080_CTRL_FB_FS_INFO_FBP_LOGICAL_MAP_PARAMS fbpLogicalMap; NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK_PARAMS sysl2Ltc; NV2080_CTRL_FB_FS_INFO_PAC_MASK_PARAMS pac; + NV_DECLARE_ALIGNED(NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK_PARAMS logicalLtc, 8); + NV_DECLARE_ALIGNED(NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK_PARAMS dmLogicalLtc, 8); } queryParams; } NV2080_CTRL_FB_FS_INFO_QUERY; @@ -2761,6 +2798,30 @@ typedef struct NV2080_CTRL_CMD_FB_STATS_ENTRY { NV_DECLARE_ALIGNED(NvU64 freeSize, 8); } NV2080_CTRL_CMD_FB_STATS_ENTRY; +/* + * NV2080_CTRL_CMD_GMMU_COMMIT_TLB_INVALIDATE + * + * This control command is used by clients to commit TLB invalidates + * + * gfid[OUT] + * - Specifices GPU function ID. + * + * invalidateAll[OUT] + * - Specifies whether to invalidate all using boolean + * + * @returns Possible status values returned are: + * NV_OK + * NV_ERR_NOT_SUPPORTED + * + */ +#define NV2080_CTRL_CMD_GMMU_COMMIT_TLB_INVALIDATE (0x20801353U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | NV2080_CTRL_GMMU_COMMIT_TLB_INVALIDATE_PARAMS_MESSAGE_ID" */ +#define NV2080_CTRL_GMMU_COMMIT_TLB_INVALIDATE_PARAMS_MESSAGE_ID (0x53U) + +typedef struct NV2080_CTRL_GMMU_COMMIT_TLB_INVALIDATE_PARAMS { + NvU32 gfid; + NvBool invalidateAll; +} NV2080_CTRL_GMMU_COMMIT_TLB_INVALIDATE_PARAMS; + typedef struct NV2080_CTRL_CMD_FB_STATS_OWNER_INFO { //! Total allocated size for this owner NV_DECLARE_ALIGNED(NvU64 allocSize, 8); diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080flcn.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080flcn.h index 1485d6366f..14a694f921 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080flcn.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080flcn.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2014-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2014-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h index e85c339244..3b47518719 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2006-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2006-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -60,8 +60,12 @@ typedef NVXXXX_CTRL_XXX_INFO NV2080_CTRL_GPU_INFO; /* valid gpu info index values */ +#define NV2080_CTRL_GPU_INFO_INDEX_INDEX 23:0 + +#define NV2080_CTRL_GPU_INFO_INDEX_ECID_LO32 (0x00000001U) +#define NV2080_CTRL_GPU_INFO_INDEX_ECID_HI32 (0x00000002U) #define NV2080_CTRL_GPU_INFO_INDEX_MINOR_REVISION_EXT (0x00000004U) @@ -69,6 +73,7 @@ typedef NVXXXX_CTRL_XXX_INFO NV2080_CTRL_GPU_INFO; #define NV2080_CTRL_GPU_INFO_INDEX_NETLIST_REV1 (0x00000013U) +#define NV2080_CTRL_GPU_INFO_INDEX_ECID_EXTENDED (0x0000001bU) #define NV2080_CTRL_GPU_INFO_INDEX_SYSMEM_ACCESS (0x0000001fU) @@ -100,8 +105,6 @@ typedef NVXXXX_CTRL_XXX_INFO NV2080_CTRL_GPU_INFO; #define NV2080_CTRL_GPU_INFO_INDEX_GPU_LOCAL_EGM_CAPABILITY (0x0000003aU) #define NV2080_CTRL_GPU_INFO_INDEX_GPU_SELF_HOSTED_CAPABILITY (0x0000003bU) - - #define NV2080_CTRL_GPU_INFO_INDEX_CMP_SKU (0x0000003cU) #define NV2080_CTRL_GPU_INFO_INDEX_DMABUF_CAPABILITY (0x0000003dU) @@ -112,6 +115,9 @@ typedef NVXXXX_CTRL_XXX_INFO NV2080_CTRL_GPU_INFO; #define NV2080_CTRL_GPU_INFO_MAX_LIST_SIZE (0x00000041U) + +#define NV2080_CTRL_GPU_INFO_INDEX_RESERVED 31:31 + /* valid minor revision extended values */ #define NV2080_CTRL_GPU_INFO_MINOR_REVISION_EXT_NONE (0x00000000U) #define NV2080_CTRL_GPU_INFO_MINOR_REVISION_EXT_P (0x00000001U) @@ -201,6 +207,7 @@ typedef NVXXXX_CTRL_XXX_INFO NV2080_CTRL_GPU_INFO; #define NV2080_CTRL_GPU_INFO_INDEX_GPU_DEBUGGING_CAPABILITY_ENABLED (0x00000001U) + /* valid local EGM supported values */ #define NV2080_CTRL_GPU_INFO_INDEX_GPU_LOCAL_EGM_CAPABILITY_NO (0x00000000U) #define NV2080_CTRL_GPU_INFO_INDEX_GPU_LOCAL_EGM_CAPABILITY_YES (0x00000001U) @@ -210,8 +217,6 @@ typedef NVXXXX_CTRL_XXX_INFO NV2080_CTRL_GPU_INFO; #define NV2080_CTRL_GPU_INFO_INDEX_GPU_SELF_HOSTED_CAPABILITY_NO (0x00000000U) #define NV2080_CTRL_GPU_INFO_INDEX_GPU_SELF_HOSTED_CAPABILITY_YES (0x00000001U) - - /* valid CMP (Crypto Mining Processor) SKU values */ #define NV2080_CTRL_GPU_INFO_INDEX_CMP_SKU_NO (0x00000000U) #define NV2080_CTRL_GPU_INFO_INDEX_CMP_SKU_YES (0x00000001U) @@ -1121,7 +1126,7 @@ typedef struct NV2080_CTRL_GPU_QUERY_ECC_INTR_PARAMS { #define NV2080_CTRL_CMD_GPU_QUERY_ECC_STATUS (0x2080012fU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_GPU_INTERFACE_ID << 8) | NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_MESSAGE_ID" */ -#define NV2080_CTRL_GPU_ECC_UNIT_COUNT (0x00000019U) +#define NV2080_CTRL_GPU_ECC_UNIT_COUNT (0x0000001EU) @@ -3805,8 +3810,6 @@ typedef struct NV2080_CTRL_GPU_SET_EGM_GPA_FABRIC_BASE_ADDR_PARAMS { NV_DECLARE_ALIGNED(NvU64 egmGpaFabricBaseAddr, 8); } NV2080_CTRL_GPU_SET_EGM_GPA_FABRIC_BASE_ADDR_PARAMS; - - /* * NV2080_CTRL_CMD_GPU_GET_ENGINE_LOAD_TIMES * @@ -3931,6 +3934,9 @@ typedef struct NV2080_CTRL_GPU_EXEC_REG_OPS_NOPTRS_PARAMS { * [out] busPeerId * Bus peer ID. For an invalid or a non-existent peer this field * has the value NV0000_CTRL_SYSTEM_GET_P2P_CAPS_INVALID_PEER. + * [out] busEgmPeerId + * Bus EGM peer ID. For an invalid or a non-existent peer this field + * has the value NV0000_CTRL_SYSTEM_GET_P2P_CAPS_INVALID_PEER. */ #define NV2080_GET_P2P_CAPS_UUID_LEN 16U @@ -3942,6 +3948,7 @@ typedef struct NV2080_CTRL_GPU_P2P_PEER_CAPS_PEER_INFO { NvU32 p2pOptimalWriteCEs; NvU8 p2pCapsStatus[NV0000_CTRL_P2P_CAPS_INDEX_TABLE_SIZE]; NvU32 busPeerId; + NvU32 busEgmPeerId; } NV2080_CTRL_GPU_P2P_PEER_CAPS_PEER_INFO; /*! diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080internal.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080internal.h index 5a0d091230..fe9341a9f3 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080internal.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080internal.h @@ -74,7 +74,6 @@ typedef struct NV2080_CTRL_INTERNAL_DISPLAY_GET_STATIC_INFO_PARAMS { NvU32 windowPresentMask; NvBool bFbRemapperEnabled; NvU32 numHeads; - NvBool bPrimaryVga; NvU32 i2cPort; NvU32 internalDispActiveMask; NvU32 embeddedDisplayPortMask; @@ -212,23 +211,6 @@ typedef struct NV2080_CTRL_INTERNAL_STATIC_GR_GET_CAPS_PARAMS { typedef NV2080_CTRL_INTERNAL_STATIC_GR_GET_CAPS_PARAMS NV2080_CTRL_INTERNAL_STATIC_KGR_GET_CAPS_PARAMS; -/* - * NV2080_CTRL_CMD_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_FLAGS - * - * Set flags for use by the video event buffer - * - * flags - * VIDEO_TRACE_FLAG__* - * - */ -#define NV2080_CTRL_CMD_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_FLAGS (0x20800a21) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_FLAGS_PARAMS_MESSAGE_ID" */ - -#define NV2080_CTRL_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_FLAGS_PARAMS_MESSAGE_ID (0x21U) - -typedef struct NV2080_CTRL_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_FLAGS_PARAMS { - NvU32 flags; -} NV2080_CTRL_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_FLAGS_PARAMS; - /*! * @ref NV2080_CTRL_CMD_GR_GET_GLOBAL_SM_ORDER * @ref NV2080_CTRL_CMD_GR_GET_SM_TO_GPC_TPC_MAPPINGS @@ -265,36 +247,30 @@ typedef struct NV2080_CTRL_INTERNAL_STATIC_GR_GET_GLOBAL_SM_ORDER_PARAMS { typedef NV2080_CTRL_INTERNAL_STATIC_GR_GET_GLOBAL_SM_ORDER_PARAMS NV2080_CTRL_INTERNAL_STATIC_KGR_GET_GLOBAL_SM_ORDER_PARAMS; /*! - * Retrieve BSP Static data. + * BSP Static data. */ -#define NV2080_CTRL_CMD_INTERNAL_BSP_GET_CAPS (0x20800a24) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_BSP_GET_CAPS_PARAMS_MESSAGE_ID" */ -#define NV2080_CTRL_CMD_INTERNAL_MAX_BSPS 8 +#define NV2080_CTRL_CMD_INTERNAL_MAX_BSPS 8 typedef struct NV2080_CTRL_INTERNAL_BSP_CAPS { NvU8 capsTbl[NV0080_CTRL_BSP_CAPS_TBL_SIZE]; } NV2080_CTRL_INTERNAL_BSP_CAPS; -#define NV2080_CTRL_INTERNAL_BSP_GET_CAPS_PARAMS_MESSAGE_ID (0x24U) - typedef struct NV2080_CTRL_INTERNAL_BSP_GET_CAPS_PARAMS { NV2080_CTRL_INTERNAL_BSP_CAPS caps[NV2080_CTRL_CMD_INTERNAL_MAX_BSPS]; NvBool valid[NV2080_CTRL_CMD_INTERNAL_MAX_BSPS]; } NV2080_CTRL_INTERNAL_BSP_GET_CAPS_PARAMS; /*! - * Retrieve MSENC Static data. + * MSENC Static data. */ -#define NV2080_CTRL_CMD_INTERNAL_MSENC_GET_CAPS (0x20800a25) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_MSENC_GET_CAPS_PARAMS_MESSAGE_ID" */ -#define NV2080_CTRL_CMD_INTERNAL_MAX_MSENCS 8 +#define NV2080_CTRL_CMD_INTERNAL_MAX_MSENCS 8 typedef struct NV2080_CTRL_INTERNAL_MSENC_CAPS { NvU8 capsTbl[NV0080_CTRL_MSENC_CAPS_TBL_SIZE]; } NV2080_CTRL_INTERNAL_MSENC_CAPS; -#define NV2080_CTRL_INTERNAL_MSENC_GET_CAPS_PARAMS_MESSAGE_ID (0x25U) - typedef struct NV2080_CTRL_INTERNAL_MSENC_GET_CAPS_PARAMS { NV2080_CTRL_INTERNAL_MSENC_CAPS caps[NV2080_CTRL_CMD_INTERNAL_MAX_MSENCS]; NvBool valid[NV2080_CTRL_CMD_INTERNAL_MAX_MSENCS]; @@ -411,30 +387,6 @@ typedef struct NV2080_CTRL_INTERNAL_MEMDESC_INFO { NvU32 cpuCacheAttrib; } NV2080_CTRL_INTERNAL_MEMDESC_INFO; -/* - * NV2080_CTRL_CMD_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_MEMORY - * - * Set memory for use by the video event buffer - * - * memDescInfo - * Information to set up memory descriptor on GSP - * - * engDesc - * Video engdesc to find correct engine - * - * bEngineFound - * Bool for whether or not the engine is actually assigned to a video object - */ -#define NV2080_CTRL_CMD_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_MEMORY (0x20800a29) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_MEMORY_PARAMS_MESSAGE_ID" */ - -#define NV2080_CTRL_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_MEMORY_PARAMS_MESSAGE_ID (0x29U) - -typedef struct NV2080_CTRL_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_MEMORY_PARAMS { - NV_DECLARE_ALIGNED(NV2080_CTRL_INTERNAL_MEMDESC_INFO memDescInfo, 8); - NvU32 engDesc; - NvBool bEngineFound; -} NV2080_CTRL_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_MEMORY_PARAMS; - /*! * @ref NV0080_CTRL_CMD_GR_GET_INFO * @ref NV0080_CTRL_CMD_GR_GET_INFO_V2 @@ -2372,8 +2324,6 @@ typedef struct NV2080_CTRL_INTERNAL_HSHUB_EGM_CONFIG_PARAMS { NvU32 egmPeerId; } NV2080_CTRL_INTERNAL_HSHUB_EGM_CONFIG_PARAMS; - - /* * NV2080_CTRL_CMD_INTERNAL_NVLINK_ENABLE_COMPUTE_PEER_ADDR * @@ -2468,6 +2418,21 @@ typedef struct NV2080_CTRL_INTERNAL_MEMSYS_PROGRAM_RAW_COMPRESSION_MODE_PARAMS { NvBool bRawMode; } NV2080_CTRL_INTERNAL_MEMSYS_PROGRAM_RAW_COMPRESSION_MODE_PARAMS; +/* + * NV2080_CTRL_CMD_INTERNAL_CCU_GET_SAMPLE_INFO + * + * This command gets the CCU samples Info from physical-RM. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_NOT_SUPPORTED + */ +#define NV2080_CTRL_CMD_INTERNAL_CCU_GET_SAMPLE_INFO (0x20800ab2) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | 0xB2" */ + +typedef struct NV2080_CTRL_INTERNAL_CCU_SAMPLE_INFO_PARAMS { + NvU32 ccuSampleSize; +} NV2080_CTRL_INTERNAL_CCU_SAMPLE_INFO_PARAMS; + /* * NV2080_CTRL_CMD_INTERNAL_CCU_MAP * @@ -2482,11 +2447,19 @@ typedef struct NV2080_CTRL_INTERNAL_MEMSYS_PROGRAM_RAW_COMPRESSION_MODE_PARAMS { #define NV2080_CTRL_CMD_INTERNAL_CCU_MAP (0x20800ab3) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_CCU_MAP_INFO_PARAMS_MESSAGE_ID" */ #define NV2080_CTRL_INTERNAL_CCU_DEV_SHRBUF_COUNT_MAX 1 + +typedef struct NV2080_CTRL_INTERNAL_CCU_MAP_INFO { + NV_DECLARE_ALIGNED(NvU64 phyAddr, 8); + NvU32 shrBufSize; + NvU32 cntBlkSize; +} NV2080_CTRL_INTERNAL_CCU_MAP_INFO; + #define NV2080_CTRL_INTERNAL_CCU_MAP_INFO_PARAMS_MESSAGE_ID (0xB3U) typedef struct NV2080_CTRL_INTERNAL_CCU_MAP_INFO_PARAMS { - NV_DECLARE_ALIGNED(NvU64 phyAddr[NV2080_CTRL_INTERNAL_MEMSYS_GET_MIG_MEMORY_PARTITION_TABLE_SIZE + NV2080_CTRL_INTERNAL_CCU_DEV_SHRBUF_COUNT_MAX], 8); + NV_DECLARE_ALIGNED(NV2080_CTRL_INTERNAL_CCU_MAP_INFO mapInfo[NV2080_CTRL_INTERNAL_MEMSYS_GET_MIG_MEMORY_PARTITION_TABLE_SIZE + NV2080_CTRL_INTERNAL_CCU_DEV_SHRBUF_COUNT_MAX], 8); } NV2080_CTRL_INTERNAL_CCU_MAP_INFO_PARAMS; + /* * NV2080_CTRL_CMD_INTERNAL_CCU_UNMAP * @@ -2524,6 +2497,9 @@ typedef struct NV2080_CTRL_INTERNAL_CCU_UNMAP_INFO_PARAMS { * [in] busPeerId * Bus peer ID. For an invalid or a non-existent peer this field * has the value NV0000_CTRL_SYSTEM_GET_P2P_CAPS_INVALID_PEER. + * [in] busEgmPeerId + * Bus EGM peer ID. For an invalid or a non-existent peer this field + * has the value NV0000_CTRL_SYSTEM_GET_P2P_CAPS_INVALID_PEER. */ typedef struct NV2080_CTRL_INTERNAL_SET_P2P_CAPS_PEER_INFO { NvU32 gpuId; @@ -2533,6 +2509,7 @@ typedef struct NV2080_CTRL_INTERNAL_SET_P2P_CAPS_PEER_INFO { NvU32 p2pOptimalWriteCEs; NvU8 p2pCapsStatus[NV0000_CTRL_P2P_CAPS_INDEX_TABLE_SIZE]; NvU32 busPeerId; + NvU32 busEgmPeerId; } NV2080_CTRL_INTERNAL_SET_P2P_CAPS_PEER_INFO; /*! @@ -2955,16 +2932,10 @@ typedef struct NV2080_CTRL_INTERNAL_GSYNC_SET_OR_RESTORE_RASTER_SYNC_PARAMS { * * Initialize FBSR on GSP to prepare for suspend-resume * - * [in] fbsrType - * Fbsr object type - * [in] numRegions - * Number of regions that GSP should allocate records for * [in] hClient * Handle to client of SYSMEM memlist object * [in] hSysMem * Handle to SYSMEM memlist object - * [in] gspFbAllocsSysOffset - * Offset in SYSMEM for GSP's FB Allocations * [in] bEnteringGcoffState * Value of PDB_PROP_GPU_GCOFF_STATE_ENTERING * @@ -2979,44 +2950,29 @@ typedef struct NV2080_CTRL_INTERNAL_GSYNC_SET_OR_RESTORE_RASTER_SYNC_PARAMS { #define NV2080_CTRL_INTERNAL_FBSR_INIT_PARAMS_MESSAGE_ID (0xC2U) typedef struct NV2080_CTRL_INTERNAL_FBSR_INIT_PARAMS { - NvU32 fbsrType; - NvU32 numRegions; NvHandle hClient; NvHandle hSysMem; - NV_DECLARE_ALIGNED(NvU64 gspFbAllocsSysOffset, 8); NvBool bEnteringGcoffState; } NV2080_CTRL_INTERNAL_FBSR_INIT_PARAMS; /*! - * NV2080_CTRL_CMD_INTERNAL_FBSR_SEND_REGION_INFO + * NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING * - * Send info of FB region that will be saved/restored by GSP on suspend-resume + * Disable all the active channels during suspend + * Resume FIFO scheduling from GSP after resume on Kernel-RM * - * [in] fbsrType - * Fbsr object type - * [in] hClient - * Handle to client of FBMEM memlist object - * [in] hVidMem - * Handle to FBMEM memlist object - * [in] vidOffset - * Offset in FBMEM region to save/restore - * [in] sysOffset - * Offset in SYSMEM region to save to/restore from - * [in] size - * Size of region being saved/restored - */ -#define NV2080_CTRL_CMD_INTERNAL_FBSR_SEND_REGION_INFO (0x20800ac3) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_FBSR_SEND_REGION_INFO_PARAMS_MESSAGE_ID" */ - -#define NV2080_CTRL_INTERNAL_FBSR_SEND_REGION_INFO_PARAMS_MESSAGE_ID (0xC3U) - -typedef struct NV2080_CTRL_INTERNAL_FBSR_SEND_REGION_INFO_PARAMS { - NvU32 fbsrType; - NvHandle hClient; - NvHandle hVidMem; - NV_DECLARE_ALIGNED(NvU64 vidOffset, 8); - NV_DECLARE_ALIGNED(NvU64 sysOffset, 8); - NV_DECLARE_ALIGNED(NvU64 size, 8); -} NV2080_CTRL_INTERNAL_FBSR_SEND_REGION_INFO_PARAMS; + * Possible status values returned are: + * NV_OK + * NV_ERR_NOT_SUPPORTED + */ + +#define NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING (0x20800ac3) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING_PARAMS_MESSAGE_ID" */ + +#define NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING_PARAMS_MESSAGE_ID (0xC3U) + +typedef struct NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING_PARAMS { + NvBool bDisableActiveChannels; +} NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING_PARAMS; /* * NV2080_CTRL_CMD_INTERNAL_MEMMGR_GET_VGPU_CONFIG_HOST_RESERVED_FB @@ -3213,22 +3169,6 @@ typedef NV2080_CTRL_INTERNAL_PFM_REQ_HNDLR_STATE_SYNC_PARAMS NV2080_CTRL_INTERNA typedef NV2080_CTRL_INTERNAL_PFM_REQ_HNDLR_STATE_SYNC_PARAMS NV2080_CTRL_INTERNAL_THERM_PFM_REQ_HNDLR_STATE_INIT_SYNC_PARAMS; -/*! - * NV2080_CTRL_CMD_INTERNAL_GET_COHERENT_FB_APERTURE_SIZE - * - * Query Coherent FB Aperture Size. - * - */ -#define NV2080_CTRL_CMD_INTERNAL_GET_COHERENT_FB_APERTURE_SIZE (0x20800ada) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_GET_COHERENT_FB_APERTURE_SIZE_PARAMS_MESSAGE_ID" */ - -#define NV2080_CTRL_INTERNAL_GET_COHERENT_FB_APERTURE_SIZE_PARAMS_MESSAGE_ID (0xDAU) - -typedef struct NV2080_CTRL_INTERNAL_GET_COHERENT_FB_APERTURE_SIZE_PARAMS { - // Get Coherent Fb Aperture Size - NV_DECLARE_ALIGNED(NvU64 coherentFbApertureSize, 8); -} NV2080_CTRL_INTERNAL_GET_COHERENT_FB_APERTURE_SIZE_PARAMS; - - /*! * Macros for NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_GET_PM1_STATE flag */ @@ -3634,15 +3574,11 @@ typedef struct NV2080_CTRL_CMD_INTERNAL_GET_GPU_FABRIC_PROBE_INFO_PARAMS { * * bwMode[IN] * - Nvlink Bandwidth mode - * - * bLocalEgmEnabled[IN] - * - EGM Enablement Status that needs to be set in GSP-RM */ #define NV2080_CTRL_CMD_INTERNAL_START_GPU_FABRIC_PROBE_INFO_PARAMS_MESSAGE_ID (0xF5U) typedef struct NV2080_CTRL_CMD_INTERNAL_START_GPU_FABRIC_PROBE_INFO_PARAMS { - NvU8 bwMode; - NvBool bLocalEgmEnabled; + NvU8 bwMode; } NV2080_CTRL_CMD_INTERNAL_START_GPU_FABRIC_PROBE_INFO_PARAMS; /*! @@ -3776,7 +3712,7 @@ typedef struct NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS { } NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS; /*! - * NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_ROTATE_KEYS + * NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_ROTATE_KEY * * This command handles key rotation for a given H2D key (and corresponding D2H key) * by deriving new key on GSP and updating the key on relevant SEC2 or LCE. @@ -3868,6 +3804,22 @@ typedef struct NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_SET_SECURITY_POLICY_PARAMS +/*! + * NV2080_CTRL_CMD_INTERNAL_FIFO_GET_LOGICAL_UPROC_ID + * + * This command is an internal command sent from Kernel RM to Physical RM + * to update the logical Uproc Id for the configuration. + * + * logicalUprocId [OUT] + */ +#define NV2080_CTRL_CMD_INTERNAL_FIFO_GET_LOGICAL_UPROC_ID (0x20800aef) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_FIFO_GET_LOGICAL_UPROC_ID_PARAMS_MESSAGE_ID" */ + +#define NV2080_CTRL_INTERNAL_FIFO_GET_LOGICAL_UPROC_ID_PARAMS_MESSAGE_ID (0xEFU) + +typedef struct NV2080_CTRL_INTERNAL_FIFO_GET_LOGICAL_UPROC_ID_PARAMS { + NvU8 logicalUprocId; +} NV2080_CTRL_INTERNAL_FIFO_GET_LOGICAL_UPROC_ID_PARAMS; + /* * NV2080_CTRL_CMD_INTERNAL_MEMMGR_MEMORY_TRANSFER_WITH_GSP * @@ -4137,4 +4089,39 @@ typedef struct NV2080_CTRL_CMD_INTERNAL_GET_ENABLED_SEC2_CLASSES_PARAMS { typedef NV2080_CTRL_GR_CTXSW_SETUP_BIND_PARAMS NV2080_CTRL_INTERNAL_GR_CTXSW_SETUP_BIND_PARAMS; +/*! + * NV2080_CTRL_INTERNAL_GPU_CLIENT_LOW_POWER_MODE_ENTER + * + * @brief Notify the offloaded RM that CPU-RM enters the power management cycle. + * + * bInPMTransition : [IN] + * newPMLevel : [IN] + * New PM Level : NV2080_CTRL_GPU_SET_POWER_STATE_GPU_LEVEL_[0-7] + * + * @return NV_OK on success + * @return NV_ERR_ otherwise + */ +#define NV2080_CTRL_INTERNAL_GPU_CLIENT_LOW_POWER_MODE_ENTER_PARAMS_MESSAGE_ID (0xE9U) + +typedef struct NV2080_CTRL_INTERNAL_GPU_CLIENT_LOW_POWER_MODE_ENTER_PARAMS { + NvBool bInPMTransition; + NvU32 newPMLevel; +} NV2080_CTRL_INTERNAL_GPU_CLIENT_LOW_POWER_MODE_ENTER_PARAMS; +#define NV2080_CTRL_INTERNAL_GPU_CLIENT_LOW_POWER_MODE_ENTER (0x20800ae9) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_GPU_CLIENT_LOW_POWER_MODE_ENTER_PARAMS_MESSAGE_ID" */ + +/*! + * NV2080_CTRL_CMD_INTERNAL_GPU_GET_GSP_RM_FREE_HEAP + * + * @brief To get the free heap size of GSP-RM + * + * freeHeapSize : [OUT] + * + * @return NV_OK + */ +#define NV2080_CTRL_INTERNAL_GPU_GET_GSP_RM_FREE_HEAP_PARAMS_MESSAGE_ID (0xEBU) + +typedef struct NV2080_CTRL_INTERNAL_GPU_GET_GSP_RM_FREE_HEAP_PARAMS { + NV_DECLARE_ALIGNED(NvU64 freeHeapSize, 8); +} NV2080_CTRL_INTERNAL_GPU_GET_GSP_RM_FREE_HEAP_PARAMS; +#define NV2080_CTRL_CMD_INTERNAL_GPU_GET_GSP_RM_FREE_HEAP (0x20800aeb) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_GPU_GET_GSP_RM_FREE_HEAP_PARAMS_MESSAGE_ID" */ /* ctrl2080internal_h */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080nvlink.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080nvlink.h index 2558100e01..487645c377 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080nvlink.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080nvlink.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2014-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2014-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -136,6 +136,7 @@ typedef struct NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS { #define NV2080_CTRL_NVLINK_CAPS_NVLINK_VERSION_3_1 (0x00000006U) #define NV2080_CTRL_NVLINK_CAPS_NVLINK_VERSION_4_0 (0x00000007U) + #define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_INVALID (0x00000000U) #define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_1_0 (0x00000001U) #define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_2_0 (0x00000002U) @@ -259,6 +260,12 @@ typedef struct NV2080_CTRL_NVLINK_DEVICE_INFO { * This field specifies the link number on the remote end of the link * remoteDeviceInfo * This field stores the device information for the remote end of the link + * nvlinkMinL1Threshold + * This field stores the Min L1 Thresohld of the link + * nvlinkMaxL1Threshold + * This field stores the Max L1 Threshold of the link + * nvlinkL1ThresholdUnits + * This field stores the L1 Threshold Units of the link * */ typedef struct NV2080_CTRL_NVLINK_LINK_STATUS_INFO { @@ -310,6 +317,11 @@ typedef struct NV2080_CTRL_NVLINK_LINK_STATUS_INFO { // Ampere+ only NvU32 laneRxdetStatusMask; + // L1 Threshold Info + NvU32 nvlinkMinL1Threshold; + NvU32 nvlinkMaxL1Threshold; + NvU32 nvlinkL1ThresholdUnits; + NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_DEVICE_INFO remoteDeviceInfo, 8); NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_DEVICE_INFO localDeviceInfo, 8); } NV2080_CTRL_NVLINK_LINK_STATUS_INFO; @@ -361,6 +373,8 @@ typedef struct NV2080_CTRL_NVLINK_LINK_STATUS_INFO { #define NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_3_0 (0x00000005U) #define NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_3_1 (0x00000006U) #define NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_4_0 (0x00000007U) + + #define NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_INVALID (0x000000FFU) #define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_1_0 (0x00000001U) @@ -369,6 +383,8 @@ typedef struct NV2080_CTRL_NVLINK_LINK_STATUS_INFO { #define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_3_0 (0x00000005U) #define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_3_1 (0x00000006U) #define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_4_0 (0x00000007U) + + #define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_INVALID (0x000000FFU) #define NV2080_CTRL_NVLINK_STATUS_NVHS_VERSION_1_0 (0x00000001U) @@ -387,12 +403,18 @@ typedef struct NV2080_CTRL_NVLINK_LINK_STATUS_INFO { #define NV2080_CTRL_NVLINK_STATUS_REMOTE_LINK_NUMBER_INVALID (0x000000FFU) -#define NV2080_CTRL_NVLINK_MAX_LINKS 32 +// L1 Threshold Units +typedef enum NV2080_CTRL_NVLINK_STATUS_L1_THRESHOLD_UNIT { + NV2080_CTRL_NVLINK_STATUS_L1_THRESHOLD_UNIT_100US = 0, + NV2080_CTRL_NVLINK_STATUS_L1_THRESHOLD_UNIT_50US = 1, +} NV2080_CTRL_NVLINK_STATUS_L1_THRESHOLD_UNIT; + +#define NV2080_CTRL_NVLINK_MAX_LINKS 32 // NVLink REFCLK types -#define NV2080_CTRL_NVLINK_REFCLK_TYPE_INVALID (0x00U) -#define NV2080_CTRL_NVLINK_REFCLK_TYPE_NVHS (0x01U) -#define NV2080_CTRL_NVLINK_REFCLK_TYPE_PEX (0x02U) +#define NV2080_CTRL_NVLINK_REFCLK_TYPE_INVALID (0x00U) +#define NV2080_CTRL_NVLINK_REFCLK_TYPE_NVHS (0x01U) +#define NV2080_CTRL_NVLINK_REFCLK_TYPE_PEX (0x02U) #define NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS_PARAMS_MESSAGE_ID (0x2U) @@ -811,6 +833,96 @@ typedef struct NV2080_CTRL_NVLINK_CLEAR_COUNTERS_PARAMS { } NV2080_CTRL_NVLINK_CLEAR_COUNTERS_PARAMS; +#define NV2080_CTRL_NVLINK_COUNTER_TP_TL_TX0 0U +#define NV2080_CTRL_NVLINK_COUNTER_TP_TL_TX1 1U +#define NV2080_CTRL_NVLINK_COUNTER_TP_TL_RX0 2U +#define NV2080_CTRL_NVLINK_COUNTER_TP_TL_RX1 3U + +#define NV2080_CTRL_NVLINK_COUNTER_ERR_DL_RX_ERR_ECC_LANE_SIZE 4U +#define NV2080_CTRL_NVLINK_COUNTER_ERR_DL_RX_ERR_ECC_LANE_L0 4U +#define NV2080_CTRL_NVLINK_COUNTER_ERR_DL_RX_ERR_ECC_LANE_L1 5U +#define NV2080_CTRL_NVLINK_COUNTER_ERR_DL_RX_ERR_ECC_LANE_L2 6U +#define NV2080_CTRL_NVLINK_COUNTER_ERR_DL_RX_ERR_ECC_LANE_L3 7U + +#define NV2080_CTRL_NVLINK_COUNTER_ERR_DL_RX_ERR_CRC_LANE_SIZE 8U +#define NV2080_CTRL_NVLINK_COUNTER_ERR_DL_RX_ERR_CRC_LANE_L0 8U +#define NV2080_CTRL_NVLINK_COUNTER_ERR_DL_RX_ERR_CRC_LANE_L1 9U +#define NV2080_CTRL_NVLINK_COUNTER_ERR_DL_RX_ERR_CRC_LANE_L2 10U +#define NV2080_CTRL_NVLINK_COUNTER_ERR_DL_RX_ERR_CRC_LANE_L3 11U +#define NV2080_CTRL_NVLINK_COUNTER_ERR_DL_RX_ERR_CRC_LANE_L4 12U +#define NV2080_CTRL_NVLINK_COUNTER_ERR_DL_RX_ERR_CRC_LANE_L5 13U +#define NV2080_CTRL_NVLINK_COUNTER_ERR_DL_RX_ERR_CRC_LANE_L6 14U +#define NV2080_CTRL_NVLINK_COUNTER_ERR_DL_RX_ERR_CRC_LANE_L7 15U + +#define NV2080_CTRL_NVLINK_COUNTER_ERR_DL_TX_ERR_RECOVERY 16U + +#define NV2080_CTRL_NVLINK_COUNTER_ERR_DL_TX_ERR_REPLAY 17U +#define NV2080_CTRL_NVLINK_COUNTER_ERR_DL_RX_ERR_REPLAY 18U + +#define NV2080_CTRL_NVLINK_COUNTER_ERR_DL_RX_ERR_CRC_MASKED 19U +#define NV2080_CTRL_NVLINK_COUNTER_ERR_DL_RX_ERR_CRC_FLIT 20U + +#define NV2080_CTRL_NVLINK_COUNTER_LP_DL 21U + +#define NV2080_CTRL_NVLINK_COUNTER_V1_MAX_COUNTER NV2080_CTRL_NVLINK_COUNTER_LP_DL + + + +#define NV2080_CTRL_NVLINK_COUNTER_MAX_GROUPS 2U +#define NV2080_CTRL_NVLINK_COUNTER_MAX_COUNTERS_PER_LINK_IN_REQ 28 +#define NV2080_CTRL_NVLINK_COUNTER_V2_GROUP(i) ((i) / 64) +#define NV2080_CTRL_NVLINK_COUNTER_V2_COUNTER_MASK(i) ((NvU64)1 << ((i) % 64)) + +/* + * NV2080_CTRL_CMD_NVLINK_GET_COUNTERS_V2 + * This command gets the counts for different counter types. + * + * [in] linkMask + * Mask of links to be queried + * + * [in] counterMask + * Mask of counter types to be queried + * One of NV2080_CTRL_NVLINK_COUNTERS_TYPE_* macros + * + * [out] counter + * This array contains the error counts for each error type as requested from + * the counterMask. The array indexes correspond to the mask bits one-to-one. + */ + +typedef struct NV2080_CTRL_NVLINK_COUNTERS_V2_VALUES { + NvBool overFlow; + NV_DECLARE_ALIGNED(NvU64 value, 8); +} NV2080_CTRL_NVLINK_COUNTERS_V2_VALUES; + +#define NV2080_CTRL_NVLINK_GET_COUNTERS_V2_PARAMS_MESSAGE_ID (0x50U) + +typedef struct NV2080_CTRL_NVLINK_GET_COUNTERS_V2_PARAMS { + NV_DECLARE_ALIGNED(NvU64 linkMask, 8); + NV_DECLARE_ALIGNED(NvU64 counterMask[NV2080_CTRL_NVLINK_COUNTER_MAX_GROUPS], 8); + NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_COUNTERS_V2_VALUES counter[NV2080_CTRL_NVLINK_MAX_LINKS][NV2080_CTRL_NVLINK_COUNTER_MAX_COUNTERS_PER_LINK_IN_REQ], 8); +} NV2080_CTRL_NVLINK_GET_COUNTERS_V2_PARAMS; +#define NV2080_CTRL_CMD_NVLINK_GET_COUNTERS_V2 (0x20803050U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8 | NV2080_CTRL_NVLINK_GET_COUNTERS_V2_PARAMS_MESSAGE_ID)" */ + +/* + * NV2080_CTRL_CMD_NVLINK_CLEAR_COUNTERS_V2 + * This command clears/resets the counters for the specified types. + * + * [in] linkMask + * This parameter specifies for which links we want to clear the + * counters. + * + * [in] counterMask + * This parameter specifies the input mask for desired counters to be + * cleared. Note that all counters cannot be cleared. +*/ + +#define NV2080_CTRL_NVLINK_CLEAR_COUNTERS_V2_PARAMS_MESSAGE_ID (0x51U) + +typedef struct NV2080_CTRL_NVLINK_CLEAR_COUNTERS_V2_PARAMS { + NV_DECLARE_ALIGNED(NvU64 linkMask, 8); + NV_DECLARE_ALIGNED(NvU64 counterMask[NV2080_CTRL_NVLINK_COUNTER_MAX_GROUPS], 8); +} NV2080_CTRL_NVLINK_CLEAR_COUNTERS_V2_PARAMS; +#define NV2080_CTRL_CMD_NVLINK_CLEAR_COUNTERS_V2 (0x20803051U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8 | NV2080_CTRL_NVLINK_CLEAR_COUNTERS_V2_PARAMS_MESSAGE_ID)" */ /* * NV2080_CTRL_CMD_NVLINK_INJECT_ERROR @@ -2225,6 +2337,9 @@ typedef struct NV2080_CTRL_NVLINK_UPDATE_CURRENT_CONFIG_PARAMS { #define NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_NEA (0x00000001) #define NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_NEDR (0x00000002) #define NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_NEDW (0x00000003) +#define NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_PHY_REMOTE (0x00000004) +#define NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_PHY_LOCAL (0x00000005) +#define NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_EXT_LOCAL (0x00000006) /* * NV2080_CTRL_CMD_NVLINK_SET_LOOPBACK_MODE @@ -2395,11 +2510,14 @@ typedef struct NV2080_CTRL_NVLINK_CLEAR_REFRESH_COUNTERS_PARAMS { * * [Out] postRxDetLinkMask * Mask of links discovered + * [Out] laneRxdetStatusMask + * RXDET per-lane status mask */ #define NV2080_CTRL_NVLINK_GET_LINK_MASK_POST_RX_DET_PARAMS_MESSAGE_ID (0x2aU) typedef struct NV2080_CTRL_NVLINK_GET_LINK_MASK_POST_RX_DET_PARAMS { NvU32 postRxDetLinkMask; + NvU32 laneRxdetStatusMask[NV2080_CTRL_NVLINK_MAX_LINKS]; } NV2080_CTRL_NVLINK_GET_LINK_MASK_POST_RX_DET_PARAMS; #define NV2080_CTRL_CMD_NVLINK_GET_LINK_MASK_POST_RX_DET (0x2080302aU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_LINK_MASK_POST_RX_DET_PARAMS_MESSAGE_ID" */ @@ -2609,6 +2727,12 @@ typedef struct NV2080_CTRL_NVLINK_DISABLE_DL_INTERRUPTS_PARAMS { * Current Nvlink refclk source * [Out] nvlinkReqLinkClockMhz * Requested link clock value + * [Out] nvlinkMinL1Threshold + * Requested link Min L1 Threshold + * [Out] nvlinkMaxL1Threshold + * Requested link Max L1 Threshold + * [Out] nvlinkL1ThresholdUnits + * Requested link L1 Threshold Units */ typedef struct NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_VALUES { NvBool bLinkConnectedToSystem; @@ -2625,6 +2749,9 @@ typedef struct NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_VALUES { NvU32 nvlinkLinkDataRateKiBps; NvU8 nvlinkRefClkType; NvU32 nvlinkReqLinkClockMhz; + NvU32 nvlinkMinL1Threshold; + NvU32 nvlinkMaxL1Threshold; + NvU32 nvlinkL1ThresholdUnits; } NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_VALUES; /* @@ -2642,7 +2769,7 @@ typedef struct NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_VALUES { typedef struct NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_INFO_PARAMS { NvU32 linkMask; NvU32 nvlinkRefClkSpeedKHz; - NvBool bSublinkStateInst; // whether instantaneous sublink state is needed + NvBool bSublinkStateInst; // whether instantaneous sublink state is needed NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_VALUES linkInfo[NV2080_CTRL_NVLINK_MAX_LINKS]; } NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_INFO_PARAMS; @@ -2694,15 +2821,12 @@ typedef struct NV2080_CTRL_NVLINK_PROCESS_FORCED_CONFIGS_PARAMS { * * Sync the NVLink lane shutdown properties with GSP-RM * - * [In] bLaneShutdownEnabled - * Whether nvlink shutdown is enabled for the chip * [In] bLaneShutdownOnUnload * Whether nvlink shutdown should be triggered on driver unload */ #define NV2080_CTRL_NVLINK_SYNC_NVLINK_SHUTDOWN_PROPS_PARAMS_MESSAGE_ID (0x35U) typedef struct NV2080_CTRL_NVLINK_SYNC_NVLINK_SHUTDOWN_PROPS_PARAMS { - NvBool bLaneShutdownEnabled; NvBool bLaneShutdownOnUnload; } NV2080_CTRL_NVLINK_SYNC_NVLINK_SHUTDOWN_PROPS_PARAMS; @@ -2888,19 +3012,26 @@ typedef struct NV2080_CTRL_NVLINK_INBAND_RECEIVED_DATA_PARAMS { #define NV2080_CTRL_CMD_READ_NVLINK_INBAND_RESPONSE (0x2080303d) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_INBAND_RECEIVED_DATA_PARAMS_MESSAGE_ID" */ +#define NV2080_CTRL_NVLINK_L1_THRESHOLD_VALUE_DEFAULT (0xFFFFFFFF) + /* * NV2080_CTRL_CMD_NVLINK_SET_L1_THRESHOLD * - * This command is used to set the L1 threshold value + * This command is used to set the L1 threshold value. + * A value of NV2080_CTRL_NVLINK_L1_THRESHOLD_VALUE_DEFAULT + * will reset the L1 Threshold to the default values. * * [in] l1Threshold * Used to set the L1 threshold value * + * [in] l1ExitThreshold + * Used to set the L1 Exit threshold value */ #define NV2080_CTRL_NVLINK_SET_L1_THRESHOLD_PARAMS_MESSAGE_ID (0x3eU) typedef struct NV2080_CTRL_NVLINK_SET_L1_THRESHOLD_PARAMS { NvU32 l1Threshold; + NvU32 l1ExitThreshold; } NV2080_CTRL_NVLINK_SET_L1_THRESHOLD_PARAMS; #define NV2080_CTRL_CMD_NVLINK_SET_L1_THRESHOLD (0x2080303eU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_SET_L1_THRESHOLD_PARAMS_MESSAGE_ID" */ @@ -2913,11 +3044,14 @@ typedef struct NV2080_CTRL_NVLINK_SET_L1_THRESHOLD_PARAMS { * [out] l1Threshold * Used to get the L1 threshold value * + * [out] l1ExitThreshold + * Used to get the L1 Exit Thrshold value */ #define NV2080_CTRL_NVLINK_GET_L1_THRESHOLD_PARAMS_MESSAGE_ID (0x3fU) typedef struct NV2080_CTRL_NVLINK_GET_L1_THRESHOLD_PARAMS { NvU32 l1Threshold; + NvU32 l1ExitThreshold; } NV2080_CTRL_NVLINK_GET_L1_THRESHOLD_PARAMS; #define NV2080_CTRL_CMD_NVLINK_GET_L1_THRESHOLD (0x2080303fU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_L1_THRESHOLD_PARAMS_MESSAGE_ID" */ @@ -3113,5 +3247,6 @@ typedef struct NV2080_CTRL_NVLINK_IS_REDUCED_CONFIG_PARAMS { #define NV2080_CTRL_CMD_NVLINK_FATAL_ERROR_RECOVERY (0x20803048U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | 0x48" */ + /* _ctrl2080nvlink_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080spdm.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080spdm.h index 60faeea51b..9fb34dd656 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080spdm.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080spdm.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -168,20 +168,20 @@ typedef union RM_GSP_SPDM_CMD *PRM_GSP_SPDM_CMD; * SPDM message structure. */ typedef struct RM_GSP_SPDM_MSG { - NvU8 msgType; + NvU8 msgType; // status returned from GSP message infrastructure. - NvU32 status; + NvU32 status; - NvU32 rsvd1; + NvU32 rsvd1; - NvU32 rsvd2; + NvU32 rsvd2; - NvU32 rsvd3; + NvU32 rsvd3; - NvU32 rsvd4; + NvU32 rsvd4; - NvU32 rsvd5; + NvBool rsvd5; } RM_GSP_SPDM_MSG; typedef struct RM_GSP_SPDM_MSG *PRM_GSP_SPDM_MSG; diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ucodefuzzer.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ucodefuzzer.h index 7a3cd3a564..56463fb359 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ucodefuzzer.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ucodefuzzer.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl208f.h b/src/common/sdk/nvidia/inc/ctrl/ctrl208f.h index f54223736b..38929e0367 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl208f.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl208f.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2006-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2006-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -47,5 +47,6 @@ #include "ctrl208f/ctrl208fpmgr.h" #include "ctrl208f/ctrl208fdma.h" #include "ctrl208f/ctrl208fmmu.h" +#include "ctrl208f/ctrl208fucodecoverage.h" diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fbase.h b/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fbase.h index 82c65ea1e2..c57bca9be1 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fbase.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fbase.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2019-2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -53,9 +53,8 @@ #define NV208F_CTRL_PMGR (0x13) #define NV208F_CTRL_DMA (0x14) // const NV208F_CTRL_TMR = (0x15); // not supported -#define NV208F_CTRL_RMFS (0x16) -#define NV208F_CTRL_GSPMSGTIMING (0x17) -#define NV208F_CTRL_BUS (0x18) +#define NV208F_CTRL_GSPMSGTIMING (0x16) +#define NV208F_CTRL_BUS (0x17) /* * NV208F_CTRL_CMD_NULL diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208ffb.h b/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208ffb.h index 343605bad3..c894537391 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208ffb.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208ffb.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2009-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2009-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -591,25 +591,4 @@ typedef struct NV208F_CTRL_FB_CLEAR_REMAPPED_ROWS_PARAMS { NvBool bForcePurge; } NV208F_CTRL_FB_CLEAR_REMAPPED_ROWS_PARAMS; -/* - * NV208F_CTRL_CMD_FB_GET_FLOORSWEPT_FBPA_MASK - * - * This command calculates the floorswept fbpa mask by taking 1/2 HBM - * floorsweeping into account - * - * fbpaMask - * This value of the mask. - * - * Possbile status values returned are: - * NV_OK - * NV_ERR_NOT_SUPPORTED - */ -#define NV208F_CTRL_CMD_FB_GET_FLOORSWEPT_FBPA_MASK (0x208f0516) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_GET_FLOORSWEPT_FBPA_MASK_PARAMS_MESSAGE_ID" */ - -#define NV208F_CTRL_FB_GET_FLOORSWEPT_FBPA_MASK_PARAMS_MESSAGE_ID (0x16U) - -typedef struct NV208F_CTRL_FB_GET_FLOORSWEPT_FBPA_MASK_PARAMS { - NvU32 fbpaMask; -} NV208F_CTRL_FB_GET_FLOORSWEPT_FBPA_MASK_PARAMS; - /* _ctrl208ffb_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fucodecoverage.h b/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fucodecoverage.h new file mode 100644 index 0000000000..c054514729 --- /dev/null +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fucodecoverage.h @@ -0,0 +1,137 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: ctrl/ctrl208f/ctrl208fucodecoverage.finn +// + +#include "ctrl/ctrl208f/ctrl208fbase.h" + +/* Numerical ID for each ucode */ +#define NV208F_UCODE_COVERAGE_SEC2 1 +#define NV208F_UCODE_COVERAGE_PMU 2 +#define NV208F_UCODE_COVERAGE_GSP_TASK_RM 3 +#define NV208F_UCODE_COVERAGE_GSP_TASK_VGPU 4 + + +/* + * NV208F_CTRL_UCODE_COVERAGE_STATE_PARAMS + * + * Parameters struct shared by the control calls + * NV208F_CTRL_CMD_UCODE_COVERAGE_GET_STATE and + * NV208F_CTRL_CMD_UCODE_COVERAGE_SET_STATE. + */ +typedef struct NV208F_CTRL_UCODE_COVERAGE_STATE_PARAMS { + NvU32 ucode; + NvU32 gfid; + NvBool bEnabled; + NvBool bClear; +} NV208F_CTRL_UCODE_COVERAGE_STATE_PARAMS; + +/* + * NV208F_CTRL_CMD_UCODE_COVERAGE_GET_STATE + * + * Retrieves the status of the target ucode's coverage + * + * ucode numeric id of the desired ucode to target + * gfid specifies which partition to send the command to + * (applies to ucode=NV208F_UCODE_COVERAGE_GSP_TASK_VGPU only) + * bEnabled whether the ucode's SanitizerCoverage run-time data gathering + * is enabled (NV_TRUE) or not (NV_FALSE) + * + * Possible status values returned are + * NV_OK + * NV_ERR_INVALID_ARGUMENT + * NV_ERR_INVALID_STATE + */ +#define NV208F_CTRL_CMD_UCODE_COVERAGE_GET_STATE (0x208f1901) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_UCODE_COVERAGE_INTERFACE_ID << 8) | NV208F_CTRL_UCODE_COVERAGE_GET_STATE_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_UCODE_COVERAGE_GET_STATE_PARAMS_MESSAGE_ID (0x1U) + +typedef NV208F_CTRL_UCODE_COVERAGE_STATE_PARAMS NV208F_CTRL_UCODE_COVERAGE_GET_STATE_PARAMS; + +/* + * NV208F_CTRL_CMD_UCODE_COVERAGE_SET_STATE + * + * Enables/disables and optionally clears coverage data of the target ucode + * + * ucode numeric id of the desired ucode to target + * gfid specifies which partition to send the command to + * (applies to ucode=NV208F_UCODE_COVERAGE_GSP_TASK_VGPU only) + * bEnabled whether to enable (NV_TRUE) or disable (NV_FALSE) coverage for the given ucode + * bClear whether to clear coverage prior to enabling enabling coverage collection + * + * Possible status values returned are + * NV_OK + * NV_ERR_INVALID_ARGUMENT + * NV_ERR_INVALID_STATE + */ +#define NV208F_CTRL_CMD_UCODE_COVERAGE_SET_STATE (0x208f1902) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_UCODE_COVERAGE_INTERFACE_ID << 8) | NV208F_CTRL_UCODE_COVERAGE_SET_STATE_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_UCODE_COVERAGE_SET_STATE_PARAMS_MESSAGE_ID (0x2U) + +typedef NV208F_CTRL_UCODE_COVERAGE_STATE_PARAMS NV208F_CTRL_UCODE_COVERAGE_SET_STATE_PARAMS; + +/* + * NV208F_UCODE_COVERAGE_RPC_MAX_BYTES_* + * + * Maximum number of bytes that can be retrieved by one RPC call + * (potentially differs per-ucode). These are used to size the buffer in the + * respective ucode RPC parameters. + */ +#define NV208F_UCODE_COVERAGE_RPC_MAX_BYTES_PMU 128 +#define NV208F_UCODE_COVERAGE_RPC_MAX_BYTES_GSPRM 65536 + +/* + * NV208F_CTRL_CMD_UCODE_COVERAGE_GET_DATA + * + * Retrieves coverage data of the target ucode + * + * data buffer to retrieve data into + * ucode numeric id of the desired ucode to retrieve data from + * gfid specifies which partition to send the command to + * (applies to ucode=NV208F_UCODE_FUZZER_GSP_TASK_VGPU only) + * offset offset of internal buffer to copy from + * + * Possible status values returned are + * NV_OK + * NV_ERR_INVALID_ARGUMENT + * NV_ERR_INVALID_STATE + */ +#define NV208F_CTRL_CMD_UCODE_COVERAGE_GET_DATA (0x208f1903) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_UCODE_COVERAGE_INTERFACE_ID << 8) | NV208F_CTRL_UCODE_COVERAGE_GET_DATA_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_UCODE_COVERAGE_GET_DATA_PARAMS_MESSAGE_ID (0x3U) + +typedef struct NV208F_CTRL_UCODE_COVERAGE_GET_DATA_PARAMS { + NvU8 data[NV208F_UCODE_COVERAGE_RPC_MAX_BYTES_GSPRM]; + NvU32 ucode; + NvU32 gfid; + NvU32 offset; +} NV208F_CTRL_UCODE_COVERAGE_GET_DATA_PARAMS; + +/* _ctrl208fucodecoverage_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl5070/ctrl5070base.h b/src/common/sdk/nvidia/inc/ctrl/ctrl5070/ctrl5070base.h index 1364253b11..fe285420f7 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl5070/ctrl5070base.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl5070/ctrl5070base.h @@ -39,7 +39,6 @@ #define NV5070_CTRL_RESERVED (0x00) #define NV5070_CTRL_CHNCTL (0x01) #define NV5070_CTRL_RG (0x02) -#define NV5070_CTRL_SEQ (0x03) #define NV5070_CTRL_OR (0x04) #define NV5070_CTRL_INST (0x05) #define NV5070_CTRL_VERIF (0x06) diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl5070/ctrl5070or.h b/src/common/sdk/nvidia/inc/ctrl/ctrl5070/ctrl5070or.h index 255ce96cf6..0585186194 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl5070/ctrl5070or.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl5070/ctrl5070or.h @@ -33,8 +33,6 @@ #include "ctrl5070common.h" #include "ctrl/ctrl5070/ctrl5070base.h" - - /* * NV5070_CTRL_CMD_SET_DAC_PWR * @@ -151,8 +149,6 @@ typedef struct NV5070_CTRL_CMD_SET_DAC_PWR_PARAMS { NvU32 flags; } NV5070_CTRL_CMD_SET_DAC_PWR_PARAMS; - - /* * NV5070_CTRL_CMD_GET_SOR_PWM * @@ -193,7 +189,7 @@ typedef struct NV5070_CTRL_CMD_SET_DAC_PWR_PARAMS { * NV_ERR_INVALID_ARGUMENT * NV_ERR_GENERIC */ -#define NV5070_CTRL_CMD_GET_SOR_PWM (0x50700420) /* finn: Evaluated from "(FINN_NV50_DISPLAY_OR_INTERFACE_ID << 8) | NV5070_CTRL_CMD_GET_SOR_PWM_PARAMS_MESSAGE_ID" */ +#define NV5070_CTRL_CMD_GET_SOR_PWM (0x50700420) /* finn: Evaluated from "(FINN_NV50_DISPLAY_OR_INTERFACE_ID << 8) | NV5070_CTRL_CMD_GET_SOR_PWM_PARAMS_MESSAGE_ID" */ #define NV5070_CTRL_CMD_GET_SOR_PWM_PARAMS_MESSAGE_ID (0x20U) diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl5070/ctrl5070seq.h b/src/common/sdk/nvidia/inc/ctrl/ctrl5070/ctrl5070seq.h deleted file mode 100644 index a4da5e5468..0000000000 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl5070/ctrl5070seq.h +++ /dev/null @@ -1,521 +0,0 @@ -/* - * SPDX-FileCopyrightText: Copyright (c) 2001-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. - * SPDX-License-Identifier: MIT - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#pragma once - -#include - -// -// This file was generated with FINN, an NVIDIA coding tool. -// Source file: ctrl/ctrl5070/ctrl5070seq.finn -// - -#include "ctrl/ctrl5070/ctrl5070base.h" - -/* - * NV5070_CTRL_CMD_GET_SOR_SEQ_CTL - * - * This command returns SOR sequencer's power up and down PCs and sequencer - * program to be used for power up and dowm. - * - * orNumber - * The OR number for which the seq ctrls are to be modified. - * - * puPcAlt - * Alternate power up PC. - * - * pdPc - * Power down PC. - * - * pdPcAlt - * Alternate power down PC. - * - * normalStart - * Whether normal mode is using normal or alt PC - * - * safeStart - * Whether safe mode is using normal or alt PC - * - * normalState - * Whether normal state is PD or PU. - * - * safeState - * Whether safe state is PD or PU. - * - * flags - * There is only one flag defined currently - * 1. GET_SEQ_PROG: Whether or not current seq program must be - * return back. Caller should set this to _YES to read the - * current seq program. - * - * seqProgram - * The sequencer program consisting of power up and down sequences. - * For NV50, this consists of 16 DWORDS. The program is - * relevant only when GET_SEQ_PROG flags is set to _YES. - * - * Possible status values returned are: - * NV_OK - * NV_ERR_INVALID_ARGUMENT - * NV_ERR_GENERIC - */ -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL (0x50700301U) /* finn: Evaluated from "(FINN_NV50_DISPLAY_SEQ_INTERFACE_ID << 8) | NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_PARAMS_MESSAGE_ID" */ - -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_PU_PC_ALT_VALUE 3:0 - -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_PD_PC_VALUE 3:0 - -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_PD_PC_ALT_VALUE 3:0 - -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_NORMAL_START_VAL 0:0 -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_NORMAL_START_VAL_NORMAL (0x00000000U) -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_NORMAL_START_VAL_ALT (0x00000001U) - -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_SAFE_START_VAL 0:0 -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_SAFE_START_VAL_NORMAL (0x00000000U) -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_SAFE_START_VAL_ALT (0x00000001U) - -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_NORMAL_STATE_VAL 0:0 -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_NORMAL_STATE_VAL_PD (0x00000000U) -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_NORMAL_STATE_VAL_PU (0x00000001U) - -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_SAFE_STATE_VAL 0:0 -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_SAFE_STATE_VAL_PD (0x00000000U) -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_SAFE_STATE_VAL_PU (0x00000001U) - -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_FLAGS_GET_SEQ_PROG 0:0 -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_FLAGS_GET_SEQ_PROG_NO (0x00000000U) -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_FLAGS_GET_SEQ_PROG_YES (0x00000001U) - -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_SEQ_PROG_SIZE 16U -#define NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_PARAMS_MESSAGE_ID (0x1U) - -typedef struct NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_PARAMS { - NV5070_CTRL_CMD_BASE_PARAMS base; - NvU32 orNumber; - - NvU32 puPcAlt; - NvU32 pdPc; - NvU32 pdPcAlt; - NvU32 normalStart; - NvU32 safeStart; - NvU32 normalState; - NvU32 safeState; - NvU32 flags; - NvU32 seqProgram[NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_SEQ_PROG_SIZE]; -} NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_PARAMS; - -/* - * NV5070_CTRL_CMD_SET_SOR_SEQ_CTL - * - * This command does the following in that order - * (a) Loads a specified sequencer program for power up and down. - * (b) Updates SOR sequencer's power up and down PCs, tells seq to SKIP - * current wait for vsync and waits until sequencer actually SKIPs or halts - * (see more below under SKIP_WAIT_FOR_VSYNC flag) and - * (c) Update power settings (safe/normal start and state). - * - * orNumber - * The OR number for which the seq ctrls are to be modified. - * - * puPcAlt - * Alternate power up PC. - * - * pdPc - * Power down PC. - * - * pdPcAlt - * Alternate power down PC. - * - * normalStart - * Whether normal mode should use normal or alt PC. - * - * safeStart - * Whether safe mode should use normal or alt PC. - * - * normalState - * Whether normal state should be PD or PU. - * - * safeState - * Whether safe state should be PD or PU. - * - * flags - * The following flags have been defined - * 1. SKIP_WAIT_FOR_VSYNC: Should seq be forced to skip waiting - * for vsync if it's currently waiting on such an instruction. - * If the current instruction doesn't have a wait for vsync, - * SKIP will be applied to the next one and so on until - * either sequencer halts or an instruction with a wait for - * vsync is found. The call will block until seq halts or - * SKIPs a wait for vsync. - * 2. SEQ_PROG_PRESENT: Whether or not a new seq program has - * been specified. - * - * seqProgram - * The sequencer program consisting of power up and down sequences. - * For NV50, this consists of 16 DWORDS. The program is - * relevant only when SEQ_PROG_PRESENT flags is set to _YES. - * - * Possible status values returned are: - * NV_OK - * NV_ERR_INVALID_ARGUMENT - * NV_ERR_GENERIC - */ -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL (0x50700302U) /* finn: Evaluated from "(FINN_NV50_DISPLAY_SEQ_INTERFACE_ID << 8) | NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_PARAMS_MESSAGE_ID" */ - -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_PU_PC_ALT_VALUE 3:0 -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_PU_PC_ALT_SPECIFIED 31:31 -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_PU_PC_ALT_SPECIFIED_NO (0x00000000U) -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_PU_PC_ALT_SPECIFIED_YES (0x00000001U) - -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_PD_PC_VALUE 3:0 -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_PD_PC_SPECIFIED 31:31 -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_PD_PC_SPECIFIED_NO (0x00000000U) -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_PD_PC_SPECIFIED_YES (0x00000001U) - -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_PD_PC_ALT_VALUE 3:0 -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_PD_PC_ALT_SPECIFIED 31:31 -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_PD_PC_ALT_SPECIFIED_NO (0x00000000U) -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_PD_PC_ALT_SPECIFIED_YES (0x00000001U) - -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_NORMAL_START_VAL 0:0 -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_NORMAL_START_VAL_NORMAL (0x00000000U) -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_NORMAL_START_VAL_ALT (0x00000001U) -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_NORMAL_START_SPECIFIED 31:31 -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_NORMAL_START_SPECIFIED_NO (0x00000000U) -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_NORMAL_START_SPECIFIED_YES (0x00000001U) - -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_SAFE_START_VAL 0:0 -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_SAFE_START_VAL_NORMAL (0x00000000U) -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_SAFE_START_VAL_ALT (0x00000001U) -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_SAFE_START_SPECIFIED 31:31 -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_SAFE_START_SPECIFIED_NO (0x00000000U) -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_SAFE_START_SPECIFIED_YES (0x00000001U) - -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_NORMAL_STATE_VAL 0:0 -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_NORMAL_STATE_VAL_PD (0x00000000U) -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_NORMAL_STATE_VAL_PU (0x00000001U) -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_NORMAL_STATE_SPECIFIED 31:31 -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_NORMAL_STATE_SPECIFIED_NO (0x00000000U) -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_NORMAL_STATE_SPECIFIED_YES (0x00000001U) - -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_SAFE_STATE_VAL 0:0 -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_SAFE_STATE_VAL_PD (0x00000000U) -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_SAFE_STATE_VAL_PU (0x00000001U) -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_SAFE_STATE_SPECIFIED 31:31 -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_SAFE_STATE_SPECIFIED_NO (0x00000000U) -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_SAFE_STATE_SPECIFIED_YES (0x00000001U) - -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_FLAGS_SKIP_WAIT_FOR_VSYNC 0:0 -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_FLAGS_SKIP_WAIT_FOR_VSYNC_NO (0x00000000U) -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_FLAGS_SKIP_WAIT_FOR_VSYNC_YES (0x00000001U) - -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_FLAGS_SEQ_PROG_PRESENT 1:1 -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_FLAGS_SEQ_PROG_PRESENT_NO (0x00000000U) -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_FLAGS_SEQ_PROG_PRESENT_YES (0x00000001U) - - -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_SEQ_PROG_SIZE 16U -#define NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_PARAMS_MESSAGE_ID (0x2U) - -typedef struct NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_PARAMS { - NV5070_CTRL_CMD_BASE_PARAMS base; - NvU32 orNumber; - - NvU32 puPcAlt; - NvU32 pdPc; - NvU32 pdPcAlt; - NvU32 normalStart; - NvU32 safeStart; - NvU32 normalState; - NvU32 safeState; - NvU32 flags; - NvU32 seqProgram[NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_SEQ_PROG_SIZE]; -} NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_PARAMS; - -/* - * NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL - * - * This command returns PIOR sequencer's power up and down PCs and sequencer - * program to be used for power up and dowm. - * - * orNumber - * The OR number for which the seq ctrls are to be modified. - * - * puPcAlt - * Alternate power up PC. - * - * pdPc - * Power down PC. - * - * pdPcAlt - * Alternate power down PC. - * - * normalStart - * Whether normal mode is using normal or alt PC - * - * safeStart - * Whether safe mode is using normal or alt PC - * - * normalState - * Whether normal state is PD or PU. - * - * safeState - * Whether safe state is PD or PU. - * - * flags - * There is only one flag defined currently - * 1. GET_SEQ_PROG: Whether or not current seq program must be - * return back. Caller should set this to _YES to read the - * current seq program. - * - * seqProgram - * The sequencer program consisting of power up and down sequences. - * For NV50, this consists of 16 DWORDS. The program is - * relevant only when GET_SEQ_PROG flags is set to _YES. - * - * Possible status values returned are: - * NV_OK - * NV_ERR_INVALID_ARGUMENT - * NV_ERR_GENERIC - */ -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL (0x50700303U) /* finn: Evaluated from "(FINN_NV50_DISPLAY_SEQ_INTERFACE_ID << 8) | NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_PARAMS_MESSAGE_ID" */ - -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_PU_PC_ALT_VALUE 3:0 - -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_PD_PC_VALUE 3:0 - -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_PD_PC_ALT_VALUE 3:0 - -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_NORMAL_START_VAL 0:0 -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_NORMAL_START_VAL_NORMAL (0x00000000U) -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_NORMAL_START_VAL_ALT (0x00000001U) - -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_SAFE_START_VAL 0:0 -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_SAFE_START_VAL_NORMAL (0x00000000U) -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_SAFE_START_VAL_ALT (0x00000001U) - -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_NORMAL_STATE_VAL 0:0 -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_NORMAL_STATE_VAL_PD (0x00000000U) -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_NORMAL_STATE_VAL_PU (0x00000001U) - -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_SAFE_STATE_VAL 0:0 -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_SAFE_STATE_VAL_PD (0x00000000U) -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_SAFE_STATE_VAL_PU (0x00000001U) - -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_FLAGS_GET_SEQ_PROG 0:0 -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_FLAGS_GET_SEQ_PROG_NO (0x00000000U) -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_FLAGS_GET_SEQ_PROG_YES (0x00000001U) - -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_SEQ_PROG_SIZE 8U -#define NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_PARAMS_MESSAGE_ID (0x3U) - -typedef struct NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_PARAMS { - NV5070_CTRL_CMD_BASE_PARAMS base; - NvU32 orNumber; - - NvU32 puPcAlt; - NvU32 pdPc; - NvU32 pdPcAlt; - NvU32 normalStart; - NvU32 safeStart; - NvU32 normalState; - NvU32 safeState; - NvU32 flags; - NvU32 seqProgram[NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_SEQ_PROG_SIZE]; -} NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_PARAMS; - -/* - * NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL - * - * This command does the following in that order - * (a) Loads a specified sequencer program for power up and down. - * (b) Updates PIOR sequencer's power up and down PCs, tells seq to SKIP - * current wait for vsync and waits until sequencer actually SKIPs or halts - * (see more below under SKIP_WAIT_FOR_VSYNC flag) and - * (c) Update power settings (safe/normal start and state). - * - * orNumber - * The OR number for which the seq ctrls are to be modified. - * - * puPcAlt - * Alternate power up PC. - * - * pdPc - * Power down PC. - * - * pdPcAlt - * Alternate power down PC. - * - * normalStart - * Whether normal mode should use normal or alt PC - * - * safeStart - * Whether safe mode should use normal or alt PC - * - * normalState - * Whether normal state should be PD or PU. - * - * safeState - * Whether safe state should be PD or PU. - * - * flags - * The following flags have been defined - * 1. SKIP_WAIT_FOR_VSYNC: Should seq be forced to skip waiting - * for vsync if it's currently waiting on such an instruction. - * If the current instruction doesn't have a wait for vsync, - * SKIP will be applied to the next one and so on until - * either sequencer halts or an instruction with a wait for - * vsync is found. The call will block until seq halts or - * SKIPs a wait for vsync. - * 2. SEQ_PROG_PRESENT: Whether or not a new seq program has - * been specified. - * - * seqProgram - * The sequencer program consisting of power up and down sequences. - * For NV50, this consists of 8 DWORDS. The program is - * relevant only when SEQ_PROG_PRESENT flags is set to _YES. - * - * Possible status values returned are: - * NV_OK - * NV_ERR_INVALID_ARGUMENT - * NV_ERR_GENERIC - */ -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL (0x50700304U) /* finn: Evaluated from "(FINN_NV50_DISPLAY_SEQ_INTERFACE_ID << 8) | NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_PARAMS_MESSAGE_ID" */ - -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_PU_PC_ALT_VALUE 3:0 -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_PU_PC_ALT_SPECIFIED 31:31 -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_PU_PC_ALT_SPECIFIED_NO (0x00000000U) -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_PU_PC_ALT_SPECIFIED_YES (0x00000001U) - -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_PD_PC_VALUE 3:0 -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_PD_PC_SPECIFIED 31:31 -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_PD_PC_SPECIFIED_NO (0x00000000U) -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_PD_PC_SPECIFIED_YES (0x00000001U) - -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_PD_PC_ALT_VALUE 3:0 -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_PD_PC_ALT_SPECIFIED 31:31 -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_PD_PC_ALT_SPECIFIED_NO (0x00000000U) -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_PD_PC_ALT_SPECIFIED_YES (0x00000001U) - - -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_NORMAL_START_VAL 0:0 -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_NORMAL_START_VAL_NORMAL (0x00000000U) -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_NORMAL_START_VAL_ALT (0x00000001U) -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_NORMAL_START_SPECIFIED 31:31 -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_NORMAL_START_SPECIFIED_NO (0x00000000U) -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_NORMAL_START_SPECIFIED_YES (0x00000001U) - -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_SAFE_START_VAL 0:0 -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_SAFE_START_VAL_NORMAL (0x00000000U) -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_SAFE_START_VAL_ALT (0x00000001U) -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_SAFE_START_SPECIFIED 31:31 -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_SAFE_START_SPECIFIED_NO (0x00000000U) -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_SAFE_START_SPECIFIED_YES (0x00000001U) - -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_NORMAL_STATE_VAL 0:0 -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_NORMAL_STATE_VAL_PD (0x00000000U) -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_NORMAL_STATE_VAL_PU (0x00000001U) -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_NORMAL_STATE_SPECIFIED 31:31 -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_NORMAL_STATE_SPECIFIED_NO (0x00000000U) -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_NORMAL_STATE_SPECIFIED_YES (0x00000001U) - -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_SAFE_STATE_VAL 0:0 -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_SAFE_STATE_VAL_PD (0x00000000U) -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_SAFE_STATE_VAL_PU (0x00000001U) -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_SAFE_STATE_SPECIFIED 31:31 -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_SAFE_STATE_SPECIFIED_NO (0x00000000U) -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_SAFE_STATE_SPECIFIED_YES (0x00000001U) - -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_FLAGS_SKIP_WAIT_FOR_VSYNC 0:0 -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_FLAGS_SKIP_WAIT_FOR_VSYNC_NO (0x00000000U) -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_FLAGS_SKIP_WAIT_FOR_VSYNC_YES (0x00000001U) - -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_FLAGS_SEQ_PROG_PRESENT 1:1 -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_FLAGS_SEQ_PROG_PRESENT_NO (0x00000000U) -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_FLAGS_SEQ_PROG_PRESENT_YES (0x00000001U) - -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_SEQ_PROG_SIZE 8U -#define NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_PARAMS_MESSAGE_ID (0x4U) - -typedef struct NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_PARAMS { - NV5070_CTRL_CMD_BASE_PARAMS base; - NvU32 orNumber; - - NvU32 puPcAlt; - NvU32 pdPc; - NvU32 pdPcAlt; - NvU32 normalStart; - NvU32 safeStart; - NvU32 normalState; - NvU32 safeState; - NvU32 flags; - NvU32 seqProgram[NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_SEQ_PROG_SIZE]; -} NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_PARAMS; - -/* - * NV5070_CTRL_CMD_CTRL_SEQ_PROG_SPEED - * - * This call allows a fast sequencer program to be selected. It's intended for - * situations where panel sequencing is not required and the usual sequencing - * delays cost too much time. - * - * displayId - * The corresponding display ID. (Note that this call is currently only - * supported for LVDS on an internal encoder, i.e. a SOR.) - * cmd - * The command to perform. Valid values are: - * NV5070_CTRL_SEQ_PROG_SPEED_CMD_GET - * Get the current state. - * NV5070_CTRL_SEQ_PROG_SPEED_CMD_SET - * Set the current state. - * state - * The state of panel sequencing for this displayId. This is an input - * when cmd = SET and an output when cmd = GET. - * - * Possible status values returned are: - * NV_OK - * NV_ERR_INVALID_PARAM_STRUCT - * NV_ERR_NOT_SUPPORTED - * - */ - -#define NV5070_CTRL_CMD_CTRL_SEQ_PROG_SPEED (0x50700305U) /* finn: Evaluated from "(FINN_NV50_DISPLAY_SEQ_INTERFACE_ID << 8) | NV5070_CTRL_SEQ_PROG_SPEED_PARAMS_MESSAGE_ID" */ - -#define NV5070_CTRL_SEQ_PROG_SPEED_CMD_GET (0x00000000U) -#define NV5070_CTRL_SEQ_PROG_SPEED_CMD_SET (0x00000001U) - -#define NV5070_CTRL_SEQ_PROG_SPEED_STATE_NORMAL (0x00000000U) -#define NV5070_CTRL_SEQ_PROG_SPEED_STATE_FAST (0x00000001U) - -#define NV5070_CTRL_SEQ_PROG_SPEED_PARAMS_MESSAGE_ID (0x5U) - -typedef struct NV5070_CTRL_SEQ_PROG_SPEED_PARAMS { - NV5070_CTRL_CMD_BASE_PARAMS base; - - NvU32 displayId; - - NvU32 cmd; - NvU32 state; -} NV5070_CTRL_SEQ_PROG_SPEED_PARAMS; - -/* _ctrl5070seq_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl5080.h b/src/common/sdk/nvidia/inc/ctrl/ctrl5080.h index 58bd2728f8..52d027a002 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl5080.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl5080.h @@ -188,6 +188,14 @@ typedef struct NV5080_CTRL_DEFERRED_API_V2_PARAMS { } api_bundle; } NV5080_CTRL_DEFERRED_API_V2_PARAMS; +/* This is just used to forward NV5080_CTRL_CMD_DEFERRED_API_V2 from kernel RM + * to physical RM. The parameters are unchanged. */ +#define NV5080_CTRL_CMD_DEFERRED_API_INTERNAL (0x50800104) /* finn: Evaluated from "(FINN_NV50_DEFERRED_API_CLASS_DEFERRED_INTERFACE_ID << 8) | NV5080_CTRL_DEFERRED_API_INTERNAL_PARAMS_MESSAGE_ID" */ + +#define NV5080_CTRL_DEFERRED_API_INTERNAL_PARAMS_MESSAGE_ID (0x4U) + +typedef NV5080_CTRL_DEFERRED_API_V2_PARAMS NV5080_CTRL_DEFERRED_API_INTERNAL_PARAMS; + /* * NV5080_CTRL_CMD_REMOVE_API * diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl90e7.h b/src/common/sdk/nvidia/inc/ctrl/ctrl90e7.h index f3ea79e77a..b9a8cf755a 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl90e7.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl90e7.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2013-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2013-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -23,50 +23,12 @@ #pragma once -#include - // // This file was generated with FINN, an NVIDIA coding tool. // Source file: ctrl/ctrl90e7.finn // -#include "nvfixedtypes.h" -#include "ctrl/ctrlxxxx.h" -/* GF100_SUBDEVICE_INFOROM control commands and parameters */ - -#define NV90E7_CTRL_CMD(cat,idx) NVXXXX_CTRL_CMD(0x90E7, NV90E7_CTRL_##cat, idx) - -/* Command categories (6 bits) */ -#define NV90E7_CTRL_RESERVED (0x00) -#define NV90E7_CTRL_BBX (0x01) - - - -/* - * NV90E7_CTRL_CMD_BBX_GET_LAST_FLUSH_TIME - * - * This command is used to query the last BBX flush timestamp and duration. If BBX has not yet - * been flushed, the status returned is NV_ERR_NOT_READY. - * - * timestamp - * This parameter specifies the start timestamp of the last BBX flush. - * - * durationUs - * This parameter specifies the duration (us) of the last BBX flush. - * - * Possible status values returned are: - * NV_OK - * NV_ERR_NOT_READY - * NV_ERR_NOT_SUPPORTED - */ -#define NV90E7_CTRL_CMD_BBX_GET_LAST_FLUSH_TIME (0x90e70113) /* finn: Evaluated from "(FINN_GF100_SUBDEVICE_INFOROM_BBX_INTERFACE_ID << 8) | NV90E7_CTRL_BBX_GET_LAST_FLUSH_TIME_PARAMS_MESSAGE_ID" */ - -#define NV90E7_CTRL_BBX_GET_LAST_FLUSH_TIME_PARAMS_MESSAGE_ID (0x13U) - -typedef struct NV90E7_CTRL_BBX_GET_LAST_FLUSH_TIME_PARAMS { - NV_DECLARE_ALIGNED(NvU64 timestamp, 8); - NvU32 durationUs; -} NV90E7_CTRL_BBX_GET_LAST_FLUSH_TIME_PARAMS; +#include "ctrl90e7/ctrl90e7bbx.h" diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl90e7/ctrl90e7base.h b/src/common/sdk/nvidia/inc/ctrl/ctrl90e7/ctrl90e7base.h new file mode 100644 index 0000000000..f0e5bb347b --- /dev/null +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl90e7/ctrl90e7base.h @@ -0,0 +1,56 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: ctrl/ctrl90e7/ctrl90e7base.finn +// + +#include "ctrl/ctrlxxxx.h" + +/* GF100_SUBDEVICE_INFOROM control commands and parameters */ + +#define NV90E7_CTRL_CMD(cat,idx) NVXXXX_CTRL_CMD(0x90E7, NV90E7_CTRL_##cat, idx) + +/* Command categories (6 bits) */ +#define NV90E7_CTRL_RESERVED (0x00) +#define NV90E7_CTRL_BBX_LEGACY_PRIVILEGED (0xc1) /* finn: Evaluated from "(NV90E7_CTRL_BBX | NVxxxx_CTRL_LEGACY_PRIVILEGED)" */ +#define NV90E7_CTRL_BBX (0x01) +#define NV90E7_CTRL_RPR (0x02) + +/* + * NV90E7_CTRL_CMD_NULL + * + * This command does nothing. + * This command does not take any parameters. + * + * Possible status values returned are: + * NV_OK + */ + +#define NV90E7_CTRL_CMD_NULL (0x90e70000) /* finn: Evaluated from "(FINN_GF100_SUBDEVICE_INFOROM_RESERVED_INTERFACE_ID << 8) | 0x0" */ + + + diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl90e7/ctrl90e7bbx.h b/src/common/sdk/nvidia/inc/ctrl/ctrl90e7/ctrl90e7bbx.h new file mode 100644 index 0000000000..dfe589fc6a --- /dev/null +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl90e7/ctrl90e7bbx.h @@ -0,0 +1,65 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: ctrl/ctrl90e7/ctrl90e7bbx.finn +// + +#include "nvfixedtypes.h" +#include "ctrl/ctrl90e7/ctrl90e7base.h" + + + +/* + * NV90E7_CTRL_CMD_BBX_GET_LAST_FLUSH_TIME + * + * This command is used to query the last BBX flush timestamp and duration. If BBX has not yet + * been flushed, the status returned is NV_ERR_NOT_READY. + * + * timestamp + * This parameter specifies the start timestamp of the last BBX flush. + * + * durationUs + * This parameter specifies the duration (us) of the last BBX flush. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_NOT_READY + * NV_ERR_NOT_SUPPORTED + */ +#define NV90E7_CTRL_CMD_BBX_GET_LAST_FLUSH_TIME (0x90e70113) /* finn: Evaluated from "(FINN_GF100_SUBDEVICE_INFOROM_BBX_INTERFACE_ID << 8) | NV90E7_CTRL_BBX_GET_LAST_FLUSH_TIME_PARAMS_MESSAGE_ID" */ + +#define NV90E7_CTRL_BBX_GET_LAST_FLUSH_TIME_PARAMS_MESSAGE_ID (0x13U) + +typedef struct NV90E7_CTRL_BBX_GET_LAST_FLUSH_TIME_PARAMS { + NV_DECLARE_ALIGNED(NvU64 timestamp, 8); + NvU32 durationUs; +} NV90E7_CTRL_BBX_GET_LAST_FLUSH_TIME_PARAMS; + + + diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrla06f/ctrla06fgpfifo.h b/src/common/sdk/nvidia/inc/ctrl/ctrla06f/ctrla06fgpfifo.h index 41a5b4f1d3..b944d15b04 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrla06f/ctrla06fgpfifo.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrla06f/ctrla06fgpfifo.h @@ -1,17 +1,17 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2007-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2007-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT - * + * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL @@ -32,29 +32,6 @@ #include "ctrl/ctrla06f/ctrla06fbase.h" -/* - * NVA06F_CTRL_GET_CLASS_ENGINEID - * - * Please see description of NV906F_CTRL_GET_CLASS_ENGINEID for more information. - * - */ -#define NVA06F_CTRL_GET_CLASS_ENGINEID (0xa06f0101) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVA06F_CTRL_GET_CLASS_ENGINEID_PARAMS_MESSAGE_ID" */ - -#define NVA06F_CTRL_GET_CLASS_ENGINEID_PARAMS_MESSAGE_ID (0x1U) - -typedef NV906F_CTRL_GET_CLASS_ENGINEID_PARAMS NVA06F_CTRL_GET_CLASS_ENGINEID_PARAMS; - -/* - * NVA06F_CTRL_RESET_CHANNEL - * - * Please see description of NV906F_CTRL_RESET_CHANNEL for more information. - */ -#define NVA06F_CTRL_CMD_RESET_CHANNEL (0xa06f0102) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVA06F_CTRL_CMD_RESET_CHANNEL_PARAMS_MESSAGE_ID" */ - -#define NVA06F_CTRL_CMD_RESET_CHANNEL_PARAMS_MESSAGE_ID (0x2U) - -typedef NV906F_CTRL_CMD_RESET_CHANNEL_PARAMS NVA06F_CTRL_CMD_RESET_CHANNEL_PARAMS; - /* * NVA06F_CTRL_CMD_GPFIFO_SCHEDULE * @@ -111,20 +88,6 @@ typedef struct NVA06F_CTRL_BIND_PARAMS { NvU32 engineType; } NVA06F_CTRL_BIND_PARAMS; - - -/* - * NVA06F_CTRL_CMD_GET_MMU_FAULT_INFO - * - * Please see description of NV906F_CTRL_CMD_GET_MMU_FAULT_INFO for more information. - * - */ -#define NVA06F_CTRL_CMD_GET_MMU_FAULT_INFO (0xa06f0107) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVA06F_CTRL_GET_MMU_FAULT_INFO_PARAMS_MESSAGE_ID" */ - -#define NVA06F_CTRL_GET_MMU_FAULT_INFO_PARAMS_MESSAGE_ID (0x7U) - -typedef NV906F_CTRL_GET_MMU_FAULT_INFO_PARAMS NVA06F_CTRL_GET_MMU_FAULT_INFO_PARAMS; - /* * NVA06F_CTRL_CMD_SET_ERROR_NOTIFIER * @@ -132,7 +95,7 @@ typedef NV906F_CTRL_GET_MMU_FAULT_INFO_PARAMS NVA06F_CTRL_GET_MMU_FAULT_INFO_PAR * bNotifyEachChannelInTSG * When true, the error notifier will be set on every channel in * the TSG that contains the channel. - * + * * Possible status values returned are: * NV_OK */ @@ -248,7 +211,7 @@ typedef struct NVA06F_CTRL_RESTART_RUNLIST_PARAMS { * Also set an error notifier to notify user space that channel is stopped. * * bImmediate - * Input parameter. If NV_FALSE, we will wait for default RM timeout + * Input parameter. If NV_FALSE, we will wait for default RM timeout * for channel to idle. If NV_TRUE, we don't wait for channel to idle. * If channel is not idle, we forcefully preempt it off the runlist. * If the preempt times out, we will RC the channel. @@ -266,4 +229,20 @@ typedef struct NVA06F_CTRL_STOP_CHANNEL_PARAMS { NvBool bImmediate; } NVA06F_CTRL_STOP_CHANNEL_PARAMS; +/* + * NVA06F_CTRL_CMD_GET_CONTEXT_ID + * + * This command returns the context ID of a given channel. + * + * Possible status values returned are: + * NV_OK + */ +#define NVA06F_CTRL_CMD_GET_CONTEXT_ID (0xa06f0113) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVA06F_CTRL_GET_CONTEXT_ID_PARAMS_MESSAGE_ID" */ + +#define NVA06F_CTRL_GET_CONTEXT_ID_PARAMS_MESSAGE_ID (0x13U) + +typedef struct NVA06F_CTRL_GET_CONTEXT_ID_PARAMS { + NvU32 contextId; +} NVA06F_CTRL_GET_CONTEXT_ID_PARAMS; + /* _ctrla06fgpfifo_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrla06f/ctrla06finternal.h b/src/common/sdk/nvidia/inc/ctrl/ctrla06f/ctrla06finternal.h index 903a5bb18d..354a75043c 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrla06f/ctrla06finternal.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrla06f/ctrla06finternal.h @@ -1,17 +1,17 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2007-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2007-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT - * + * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL @@ -46,21 +46,6 @@ typedef NVA06F_CTRL_STOP_CHANNEL_PARAMS NVA06F_CTRL_INTERNAL_STOP_CHANNEL_PARAMS; -/* - * NVA06F_CTRL_CMD_INTERNAL_RESET_CHANNEL - * - * This command is an internal command sent from Kernel RM to Physical RM - * to perform the channel reset operations in hardware - * - * Please see description of NV906F_CTRL_CMD_RESET_CHANNEL for more information. - * - */ -#define NVA06F_CTRL_CMD_INTERNAL_RESET_CHANNEL (0xa06f0302) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_A_INTERNAL_INTERFACE_ID << 8) | NVA06F_CTRL_INTERNAL_RESET_CHANNEL_PARAMS_MESSAGE_ID" */ - -#define NVA06F_CTRL_INTERNAL_RESET_CHANNEL_PARAMS_MESSAGE_ID (0x2U) - -typedef NVA06F_CTRL_CMD_RESET_CHANNEL_PARAMS NVA06F_CTRL_INTERNAL_RESET_CHANNEL_PARAMS; - /* * NVA06F_CTRL_CMD_INTERNAL_GPFIFO_SCHEDULE * diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrla081.h b/src/common/sdk/nvidia/inc/ctrl/ctrla081.h index 6001d7799e..334a9619c6 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrla081.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrla081.h @@ -52,6 +52,10 @@ #define NVA081_PGPU_METADATA_STRING_SIZE 256 #define NVA081_EXTRA_PARAMETERS_SIZE 1024 #define NVA081_PLACEMENT_ID_INVALID 0xFFFFU +#define NVA081_CONFIG_PARAMS_MAX_LENGTH 1024 + +#define NVA081_MAX_BAR_REGION_COUNT 4 +#define NVA081_MAX_SPARSE_REGION_COUNT 5 /* * NVA081_CTRL_CMD_VGPU_CONFIG_SET_INFO @@ -430,45 +434,9 @@ typedef struct NVA081_CTRL_VGPU_CONFIG_EVENT_SET_NOTIFICATION_PARAMS { /* valid event action values */ -#define NVA081_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE (0x00000000) -#define NVA081_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE (0x00000001) -#define NVA081_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT (0x00000002) - -/* - * NVA081_CTRL_CMD_VGPU_CONFIG_NOTIFY_START - * - * This command notifies the nvidia-vgpu-vfio module with start status. - * It notifies whether start has been successful or not. - * - * mdevUuid - * This parameter specifies the uuid of the mdev device for which start has - * been called. - * vmUuid - * The UUID of VM for which vGPU has been created. - * vmName - * The name of VM for which vGPU has been created. - * returnStatus - * This parameter species whether the vGPU plugin is initialized or not. - * it specifies the error code in case plugin initialization has failed - * - * Possible status values returned are: - * NV_OK - * NV_ERR_OBJECT_NOT_FOUND - */ -#define NVA081_CTRL_CMD_VGPU_CONFIG_NOTIFY_START (0xa0810107) /* finn: Evaluated from "(FINN_NVA081_VGPU_CONFIG_VGPU_CONFIG_INTERFACE_ID << 8) | NVA081_CTRL_VGPU_CONFIG_NOTIFY_START_PARAMS_MESSAGE_ID" */ - -/* - * NVA081_CTRL_VGPU_CONFIG_NOTIFY_START_PARAMS - * This structure represents information of plugin init status. - */ -#define NVA081_CTRL_VGPU_CONFIG_NOTIFY_START_PARAMS_MESSAGE_ID (0x7U) - -typedef struct NVA081_CTRL_VGPU_CONFIG_NOTIFY_START_PARAMS { - NvU8 mdevUuid[VM_UUID_SIZE]; - NvU8 vmUuid[VM_UUID_SIZE]; - NvU8 vmName[NVA081_VM_NAME_SIZE]; - NvU32 returnStatus; -} NVA081_CTRL_VGPU_CONFIG_NOTIFY_START_PARAMS; +#define NVA081_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE (0x00000000) +#define NVA081_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE (0x00000001) +#define NVA081_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT (0x00000002) /* * NVA081_CTRL_CMD_VGPU_CONFIG_UPDATE_PGPU_INFO @@ -908,4 +876,80 @@ typedef struct NVA081_CTRL_VGPU_GET_CAPABILITY_PARAMS { NvBool state; } NVA081_CTRL_VGPU_GET_CAPABILITY_PARAMS; +/* + * NVA081_CTRL_CMD_VGPU_SET_VM_NAME + * + * This command is to set VM name for KVM. + * + * vgpuName [IN] + * This param provides the vGPU device name to RM. + * + * vmName [IN] + * This param provides the VM name of the vGPU device attached. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_OBJECT_NOT_FOUND + * NV_ERR_INVALID_ARGUMENT + */ + +#define NVA081_CTRL_CMD_VGPU_SET_VM_NAME (0xa0810120) /* finn: Evaluated from "(FINN_NVA081_VGPU_CONFIG_VGPU_CONFIG_INTERFACE_ID << 8) | NVA081_CTRL_VGPU_SET_VM_NAME_PARAMS_MESSAGE_ID" */ + +#define NVA081_CTRL_VGPU_SET_VM_NAME_PARAMS_MESSAGE_ID (0x20U) + +typedef struct NVA081_CTRL_VGPU_SET_VM_NAME_PARAMS { + NvU8 vgpuName[VM_UUID_SIZE]; + NvU8 vmName[NVA081_VM_NAME_SIZE]; +} NVA081_CTRL_VGPU_SET_VM_NAME_PARAMS; + +/* + * NVA081_CTRL_CMD_VGPU_GET_BAR_INFO + * + * This command is to get the bar info for a vGPU. + * + * gpuPciId [IN] + * This param specifies the PCI device ID of VF on which VM is running + * + * vgpuName [IN] + * This param provides the vGPU device name to RM. + * + * configParams [IN] + * This param provides the vGPU config params to RM + * + * barSizes [OUT] + * This param provides the BAR size for each region index of the device + * + * sparseOffsets [OUT] + * This param provides the offset of each sparse mmap region in BAR0 + * + * sparseSizes [OUT] + * This param provides the size of each sparse mmap region in BAR0 + * + * sparseCount [OUT] + * This param provides the number of sparse mmap regions in BAR0 + * + * isBar064bit [OUT] + * This param provides whether the BAR0 is 64bit of the vGPU device + * + * Possible status values returned are: + * NV_OK + * NV_ERR_OBJECT_NOT_FOUND + * NV_ERR_INVALID_ARGUMENT + */ + +#define NVA081_CTRL_CMD_VGPU_GET_BAR_INFO (0xa0810121) /* finn: Evaluated from "(FINN_NVA081_VGPU_CONFIG_VGPU_CONFIG_INTERFACE_ID << 8) | NVA081_CTRL_VGPU_GET_BAR_INFO_PARAMS_MESSAGE_ID" */ + +#define NVA081_CTRL_VGPU_GET_BAR_INFO_PARAMS_MESSAGE_ID (0x21U) + +typedef struct NVA081_CTRL_VGPU_GET_BAR_INFO_PARAMS { + NvU32 gpuPciId; + NvU8 vgpuName[VM_UUID_SIZE]; + NvU8 configParams[NVA081_CONFIG_PARAMS_MAX_LENGTH]; + NV_DECLARE_ALIGNED(NvU64 barSizes[NVA081_MAX_BAR_REGION_COUNT], 8); + NV_DECLARE_ALIGNED(NvU64 sparseOffsets[NVA081_MAX_SPARSE_REGION_COUNT], 8); + NV_DECLARE_ALIGNED(NvU64 sparseSizes[NVA081_MAX_SPARSE_REGION_COUNT], 8); + NvU32 sparseCount; + NvBool isBar064bit; +} NVA081_CTRL_VGPU_GET_BAR_INFO_PARAMS; + /* _ctrlA081vgpuconfig_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrla16f.h b/src/common/sdk/nvidia/inc/ctrl/ctrla16f.h index f59b0b5f28..fc1b06c37a 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrla16f.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrla16f.h @@ -1,17 +1,17 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2007-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2007-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT - * + * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL @@ -57,92 +57,11 @@ - - -/* - * NVA16F_CTRL_GET_CLASS_ENGINEID - * - * Please see description of NVA06F_CTRL_GET_CLASS_ENGINEID for more information. - * - */ -#define NVA16F_CTRL_GET_CLASS_ENGINEID (0xa16f0101) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_B_GPFIFO_INTERFACE_ID << 8) | NVA16F_CTRL_GET_CLASS_ENGINEID_PARAMS_MESSAGE_ID" */ - -#define NVA16F_CTRL_GET_CLASS_ENGINEID_PARAMS_MESSAGE_ID (0x1U) - -typedef NVA06F_CTRL_GET_CLASS_ENGINEID_PARAMS NVA16F_CTRL_GET_CLASS_ENGINEID_PARAMS; - -/* - * NVA16F_CTRL_RESET_CHANNEL - * - * Please see description of NVA06F_CTRL_RESET_CHANNEL for more information. - * - */ -#define NVA16F_CTRL_CMD_RESET_CHANNEL (0xa16f0102) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_B_GPFIFO_INTERFACE_ID << 8) | NVA16F_CTRL_CMD_RESET_CHANNEL_PARAMS_MESSAGE_ID" */ - -#define NVA16F_CTRL_CMD_RESET_CHANNEL_PARAMS_MESSAGE_ID (0x2U) - -typedef NVA06F_CTRL_CMD_RESET_CHANNEL_PARAMS NVA16F_CTRL_CMD_RESET_CHANNEL_PARAMS; - -/* - * NVA16F_CTRL_CMD_GPFIFO_SCHEDULE - * - * Please see description of NVA06F_CTRL_CMD_GPFIFO_SCHEDULE for more information. - * - */ -#define NVA16F_CTRL_CMD_GPFIFO_SCHEDULE (0xa16f0103) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_B_GPFIFO_INTERFACE_ID << 8) | NVA16F_CTRL_GPFIFO_SCHEDULE_PARAMS_MESSAGE_ID" */ - -#define NVA16F_CTRL_GPFIFO_SCHEDULE_PARAMS_MESSAGE_ID (0x3U) - -typedef NVA06F_CTRL_GPFIFO_SCHEDULE_PARAMS NVA16F_CTRL_GPFIFO_SCHEDULE_PARAMS; - -/* - * NVA16F_CTRL_CMD_BIND - * - * Please see description of NVA06F_CTRL_CMD_BIND for more information. - */ -#define NVA16F_CTRL_CMD_BIND (0xa16f0104) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_B_GPFIFO_INTERFACE_ID << 8) | NVA16F_CTRL_BIND_PARAMS_MESSAGE_ID" */ - -#define NVA16F_CTRL_BIND_PARAMS_MESSAGE_ID (0x4U) - -typedef NVA06F_CTRL_BIND_PARAMS NVA16F_CTRL_BIND_PARAMS; - -/* - * NVA16F_CTRL_CMD_EVENT_SET_NOTIFICATION - * - * Please see description of NVA06F_CTRL_CMD_EVENT_SET_NOTIFICATION for more information. -*/ -#define NVA16F_CTRL_CMD_EVENT_SET_NOTIFICATION (0xa16f0205) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_B_EVENT_INTERFACE_ID << 8) | NVA16F_CTRL_EVENT_SET_NOTIFICATION_PARAMS_MESSAGE_ID" */ - -#define NVA16F_CTRL_EVENT_SET_NOTIFICATION_PARAMS_MESSAGE_ID (0x5U) - -typedef NVA06F_CTRL_EVENT_SET_NOTIFICATION_PARAMS NVA16F_CTRL_EVENT_SET_NOTIFICATION_PARAMS; - -/* valid action values */ -#define NVA16F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE -#define NVA16F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE -#define NVA16F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT - /* * NVA16F_CTRL_CMD_EVENT_SET_TRIGGER * * Please see description of NVA06F_CTRL_CMD_EVENT_SET_TRIGGER for more information. */ -#define NVA16F_CTRL_CMD_EVENT_SET_TRIGGER (0xa16f0206) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_B_EVENT_INTERFACE_ID << 8) | 0x6" */ - - - - - -/* - * NVA16F_CTRL_CMD_GET_MMU_FAULT_INFO - * - * Please see description of NV906F_CTRL_CMD_GET_MMU_FAULT_INFO for more information. - * - */ -#define NVA16F_CTRL_CMD_GET_MMU_FAULT_INFO (0xa16f0107) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_B_GPFIFO_INTERFACE_ID << 8) | NVA16F_CTRL_GET_MMU_FAULT_INFO_PARAMS_MESSAGE_ID" */ - -#define NVA16F_CTRL_GET_MMU_FAULT_INFO_PARAMS_MESSAGE_ID (0x7U) - -typedef NV906F_CTRL_GET_MMU_FAULT_INFO_PARAMS NVA16F_CTRL_GET_MMU_FAULT_INFO_PARAMS; +#define NVA16F_CTRL_CMD_EVENT_SET_TRIGGER (0xa16f0106) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_B_EVENT_INTERFACE_ID << 8) | 0x6" */ /* _ctrla16f.h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrla26f.h b/src/common/sdk/nvidia/inc/ctrl/ctrla26f.h index 8c3e90fcd9..98de590a8a 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrla26f.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrla26f.h @@ -1,17 +1,17 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2011-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2011-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT - * + * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL @@ -57,92 +57,11 @@ - - -/* - * NVA26F_CTRL_GET_CLASS_ENGINEID - * - * Please see description of NV906F_CTRL_GET_CLASS_ENGINEID for more information. - * - */ -#define NVA26F_CTRL_GET_CLASS_ENGINEID (0xa26f0101) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_C_GPFIFO_INTERFACE_ID << 8) | NVA26F_CTRL_GET_CLASS_ENGINEID_PARAMS_MESSAGE_ID" */ - -#define NVA26F_CTRL_GET_CLASS_ENGINEID_PARAMS_MESSAGE_ID (0x1U) - -typedef NV906F_CTRL_GET_CLASS_ENGINEID_PARAMS NVA26F_CTRL_GET_CLASS_ENGINEID_PARAMS; - -/* - * NVA26F_CTRL_RESET_CHANNEL - * - * Please see description of NVA06F_CTRL_CMD_RESET_CHANNEL for more information. - * - */ -#define NVA26F_CTRL_CMD_RESET_CHANNEL (0xa26f0102) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_C_GPFIFO_INTERFACE_ID << 8) | NVA26F_CTRL_CMD_RESET_CHANNEL_PARAMS_MESSAGE_ID" */ - -#define NVA26F_CTRL_CMD_RESET_CHANNEL_PARAMS_MESSAGE_ID (0x2U) - -typedef NVA06F_CTRL_CMD_RESET_CHANNEL_PARAMS NVA26F_CTRL_CMD_RESET_CHANNEL_PARAMS; - -/* - * NVA26F_CTRL_CMD_GPFIFO_SCHEDULE - * - * Please see description of NVA06F_CTRL_CMD_GPFIFO_SCHEDULE for more information. - * - */ -#define NVA26F_CTRL_CMD_GPFIFO_SCHEDULE (0xa26f0103) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_C_GPFIFO_INTERFACE_ID << 8) | NVA26F_CTRL_GPFIFO_SCHEDULE_PARAMS_MESSAGE_ID" */ - -#define NVA26F_CTRL_GPFIFO_SCHEDULE_PARAMS_MESSAGE_ID (0x3U) - -typedef NVA06F_CTRL_GPFIFO_SCHEDULE_PARAMS NVA26F_CTRL_GPFIFO_SCHEDULE_PARAMS; - -/* - * NVA26F_CTRL_CMD_BIND - * - * Please see description of NVA06F_CTRL_CMD_BIND for more information. - */ -#define NVA26F_CTRL_CMD_BIND (0xa26f0104) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_C_GPFIFO_INTERFACE_ID << 8) | NVA26F_CTRL_BIND_PARAMS_MESSAGE_ID" */ - -#define NVA26F_CTRL_BIND_PARAMS_MESSAGE_ID (0x4U) - -typedef NVA06F_CTRL_BIND_PARAMS NVA26F_CTRL_BIND_PARAMS; - -/* - * NVA26F_CTRL_CMD_EVENT_SET_NOTIFICATION - * - * Please see description of NVA06F_CTRL_CMD_EVENT_SET_NOTIFICATION for more information. -*/ -#define NVA26F_CTRL_CMD_EVENT_SET_NOTIFICATION (0xa26f0205) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_C_EVENT_INTERFACE_ID << 8) | NVA26F_CTRL_EVENT_SET_NOTIFICATION_PARAMS_MESSAGE_ID" */ - -#define NVA26F_CTRL_EVENT_SET_NOTIFICATION_PARAMS_MESSAGE_ID (0x5U) - -typedef NVA06F_CTRL_EVENT_SET_NOTIFICATION_PARAMS NVA26F_CTRL_EVENT_SET_NOTIFICATION_PARAMS; - -/* valid action values */ -#define NVA26F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE -#define NVA26F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE -#define NVA26F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT - /* * NVA26F_CTRL_CMD_EVENT_SET_TRIGGER * * Please see description of NVA06F_CTRL_CMD_EVENT_SET_TRIGGER for more information. */ -#define NVA26F_CTRL_CMD_EVENT_SET_TRIGGER (0xa26f0206) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_C_EVENT_INTERFACE_ID << 8) | 0x6" */ - - - - - -/* - * NVA26F_CTRL_CMD_GET_MMU_FAULT_INFO - * - * Please see description of NV906F_CTRL_CMD_GET_MMU_FAULT_INFO for more information. - * - */ -#define NVA26F_CTRL_CMD_GET_MMU_FAULT_INFO (0xa26f0107) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_C_GPFIFO_INTERFACE_ID << 8) | NVA26F_CTRL_GET_MMU_FAULT_INFO_PARAMS_MESSAGE_ID" */ - -#define NVA26F_CTRL_GET_MMU_FAULT_INFO_PARAMS_MESSAGE_ID (0x7U) - -typedef NV906F_CTRL_GET_MMU_FAULT_INFO_PARAMS NVA26F_CTRL_GET_MMU_FAULT_INFO_PARAMS; +#define NVA26F_CTRL_CMD_EVENT_SET_TRIGGER (0xa26f0106) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_C_EVENT_INTERFACE_ID << 8) | 0x6" */ /* _ctrla26f.h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrlb06f.h b/src/common/sdk/nvidia/inc/ctrl/ctrlb06f.h index 88906d1ac9..173201f8b7 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrlb06f.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrlb06f.h @@ -1,17 +1,17 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2012-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2012-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT - * + * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL @@ -59,94 +59,6 @@ - - -/* - * NVB06F_CTRL_GET_CLASS_ENGINEID - * - * Please see description of NV906F_CTRL_GET_CLASS_ENGINEID for more information. - * - */ -#define NVB06F_CTRL_GET_CLASS_ENGINEID (0xb06f0101) /* finn: Evaluated from "(FINN_MAXWELL_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVB06F_CTRL_GET_CLASS_ENGINEID_PARAMS_MESSAGE_ID" */ - -#define NVB06F_CTRL_GET_CLASS_ENGINEID_PARAMS_MESSAGE_ID (0x1U) - -typedef NV906F_CTRL_GET_CLASS_ENGINEID_PARAMS NVB06F_CTRL_GET_CLASS_ENGINEID_PARAMS; - -/* - * NVB06F_CTRL_RESET_CHANNEL - * - * Please see description of NVA06F_CTRL_RESET_CHANNEL for more information. - * - */ -#define NVB06F_CTRL_CMD_RESET_CHANNEL (0xb06f0102) /* finn: Evaluated from "(FINN_MAXWELL_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVB06F_CTRL_CMD_RESET_CHANNEL_PARAMS_MESSAGE_ID" */ - -#define NVB06F_CTRL_CMD_RESET_CHANNEL_PARAMS_MESSAGE_ID (0x2U) - -typedef NVA06F_CTRL_CMD_RESET_CHANNEL_PARAMS NVB06F_CTRL_CMD_RESET_CHANNEL_PARAMS; - -/* - * NVB06F_CTRL_CMD_GPFIFO_SCHEDULE - * - * Please see description of NVA06F_CTRL_CMD_GPFIFO_SCHEDULE for more information. - * - */ -#define NVB06F_CTRL_CMD_GPFIFO_SCHEDULE (0xb06f0103) /* finn: Evaluated from "(FINN_MAXWELL_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVB06F_CTRL_GPFIFO_SCHEDULE_PARAMS_MESSAGE_ID" */ - -#define NVB06F_CTRL_GPFIFO_SCHEDULE_PARAMS_MESSAGE_ID (0x3U) - -typedef NVA06F_CTRL_GPFIFO_SCHEDULE_PARAMS NVB06F_CTRL_GPFIFO_SCHEDULE_PARAMS; - -/* - * NVB06F_CTRL_CMD_BIND - * - * Please see description of NVA06F_CTRL_CMD_BIND for more information. - */ -#define NVB06F_CTRL_CMD_BIND (0xb06f0104) /* finn: Evaluated from "(FINN_MAXWELL_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVB06F_CTRL_BIND_PARAMS_MESSAGE_ID" */ - -#define NVB06F_CTRL_BIND_PARAMS_MESSAGE_ID (0x4U) - -typedef NVA06F_CTRL_BIND_PARAMS NVB06F_CTRL_BIND_PARAMS; - -/* - * NVB06F_CTRL_CMD_EVENT_SET_NOTIFICATION - * - * Please see description of NVA06F_CTRL_CMD_EVENT_SET_NOTIFICATION for more information. -*/ -#define NVB06F_CTRL_CMD_EVENT_SET_NOTIFICATION (0xb06f0205) /* finn: Evaluated from "(FINN_MAXWELL_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID << 8) | NVB06F_CTRL_EVENT_SET_NOTIFICATION_PARAMS_MESSAGE_ID" */ - -#define NVB06F_CTRL_EVENT_SET_NOTIFICATION_PARAMS_MESSAGE_ID (0x5U) - -typedef NVA06F_CTRL_EVENT_SET_NOTIFICATION_PARAMS NVB06F_CTRL_EVENT_SET_NOTIFICATION_PARAMS; - -/* valid action values */ -#define NVB06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE -#define NVB06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE -#define NVB06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT - -/* - * NVB06F_CTRL_CMD_EVENT_SET_TRIGGER - * - * Please see description of NVA06F_CTRL_CMD_EVENT_SET_TRIGGER for more information. - */ -#define NVB06F_CTRL_CMD_EVENT_SET_TRIGGER (0xb06f0206) /* finn: Evaluated from "(FINN_MAXWELL_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID << 8) | 0x6" */ - - - - - -/* - * NVB06F_CTRL_CMD_GET_MMU_FAULT_INFO - * - * Please see description of NV906F_CTRL_CMD_GET_MMU_FAULT_INFO for more information. - * - */ -#define NVB06F_CTRL_CMD_GET_MMU_FAULT_INFO (0xb06f0107) /* finn: Evaluated from "(FINN_MAXWELL_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVB06F_CTRL_GET_MMU_FAULT_INFO_PARAMS_MESSAGE_ID" */ - -#define NVB06F_CTRL_GET_MMU_FAULT_INFO_PARAMS_MESSAGE_ID (0x7U) - -typedef NV906F_CTRL_GET_MMU_FAULT_INFO_PARAMS NVB06F_CTRL_GET_MMU_FAULT_INFO_PARAMS; - /* * NVB06F_CTRL_CMD_GET_ENGINE_CTX_SIZE * @@ -321,7 +233,7 @@ typedef struct NVB06F_CTRL_GET_ENGINE_CTX_STATE_PARAMS { * * ACQUIRE_FAIL * A value of NV_TRUE indicates that the engine scheduler failed to - * acquire a semaphore for this channel. + * acquire a semaphore for this channel. * * Possible status values returned are: * NV_OK @@ -382,7 +294,7 @@ typedef NVB06F_CTRL_CHANNEL_HW_STATE_PARAMS NVB06F_CTRL_GET_CHANNEL_HW_STATE_PAR * * ACQUIRE_FAIL * A value of NV_TRUE indicates that the engine scheduler failed to - * acquire a semaphore for this channel. + * acquire a semaphore for this channel. * * Possible status values returned are: * NV_OK @@ -456,4 +368,11 @@ typedef struct NVB06F_CTRL_CMD_RESTORE_ENGINE_CTX_DATA_FINN_PARAMS { +/* + * NVB06F_CTRL_CMD_EVENT_SET_TRIGGER + * + * Please see description of NVA06F_CTRL_CMD_EVENT_SET_TRIGGER for more information. + */ +#define NVB06F_CTRL_CMD_EVENT_SET_TRIGGER (0xb06f0206) /* finn: Evaluated from "(FINN_MAXWELL_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID << 8) | 0x6" */ + /* _ctrlb06f.h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrlc06f.h b/src/common/sdk/nvidia/inc/ctrl/ctrlc06f.h index e999a8db31..9b58e37695 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrlc06f.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrlc06f.h @@ -1,17 +1,17 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2013-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2013-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT - * + * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL @@ -57,92 +57,10 @@ - - -/* - * NVC06F_CTRL_GET_CLASS_ENGINEID - * - * Please see description of NV906F_CTRL_GET_CLASS_ENGINEID for more information. - * - */ -#define NVC06F_CTRL_GET_CLASS_ENGINEID (0xc06f0101) /* finn: Evaluated from "(FINN_PASCAL_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVC06F_CTRL_GET_CLASS_ENGINEID_PARAMS_MESSAGE_ID" */ - -#define NVC06F_CTRL_GET_CLASS_ENGINEID_PARAMS_MESSAGE_ID (0x1U) - -typedef NV906F_CTRL_GET_CLASS_ENGINEID_PARAMS NVC06F_CTRL_GET_CLASS_ENGINEID_PARAMS; - -/* - * NVC06F_CTRL_RESET_CHANNEL - * - * Please see description of NVA06F_CTRL_RESET_CHANNEL for more information. - * - */ -#define NVC06F_CTRL_CMD_RESET_CHANNEL (0xc06f0102) /* finn: Evaluated from "(FINN_PASCAL_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVC06F_CTRL_CMD_RESET_CHANNEL_PARAMS_MESSAGE_ID" */ - -#define NVC06F_CTRL_CMD_RESET_CHANNEL_PARAMS_MESSAGE_ID (0x2U) - -typedef NVA06F_CTRL_CMD_RESET_CHANNEL_PARAMS NVC06F_CTRL_CMD_RESET_CHANNEL_PARAMS; - -/* - * NVC06F_CTRL_CMD_GPFIFO_SCHEDULE - * - * Please see description of NVA06F_CTRL_CMD_GPFIFO_SCHEDULE for more information. - * - */ -#define NVC06F_CTRL_CMD_GPFIFO_SCHEDULE (0xc06f0103) /* finn: Evaluated from "(FINN_PASCAL_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVC06F_CTRL_GPFIFO_SCHEDULE_PARAMS_MESSAGE_ID" */ - -#define NVC06F_CTRL_GPFIFO_SCHEDULE_PARAMS_MESSAGE_ID (0x3U) - -typedef NVA06F_CTRL_GPFIFO_SCHEDULE_PARAMS NVC06F_CTRL_GPFIFO_SCHEDULE_PARAMS; - -/* - * NVC06F_CTRL_CMD_BIND - * - * Please see description of NVA06F_CTRL_CMD_BIND for more information. - */ -#define NVC06F_CTRL_CMD_BIND (0xc06f0104) /* finn: Evaluated from "(FINN_PASCAL_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVC06F_CTRL_BIND_PARAMS_MESSAGE_ID" */ - -#define NVC06F_CTRL_BIND_PARAMS_MESSAGE_ID (0x4U) - -typedef NVA06F_CTRL_BIND_PARAMS NVC06F_CTRL_BIND_PARAMS; - -/* - * NVC06F_CTRL_CMD_EVENT_SET_NOTIFICATION - * - * Please see description of NVA06F_CTRL_CMD_EVENT_SET_NOTIFICATION for more information. -*/ -#define NVC06F_CTRL_CMD_EVENT_SET_NOTIFICATION (0xc06f0205) /* finn: Evaluated from "(FINN_PASCAL_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID << 8) | NVC06F_CTRL_EVENT_SET_NOTIFICATION_PARAMS_MESSAGE_ID" */ - -#define NVC06F_CTRL_EVENT_SET_NOTIFICATION_PARAMS_MESSAGE_ID (0x5U) - -typedef NVA06F_CTRL_EVENT_SET_NOTIFICATION_PARAMS NVC06F_CTRL_EVENT_SET_NOTIFICATION_PARAMS; - -/* valid action values */ -#define NVC06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE -#define NVC06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE -#define NVC06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT - /* * NVC06F_CTRL_CMD_EVENT_SET_TRIGGER * * Please see description of NVA06F_CTRL_CMD_EVENT_SET_TRIGGER for more information. */ -#define NVC06F_CTRL_CMD_EVENT_SET_TRIGGER (0xc06f0206) /* finn: Evaluated from "(FINN_PASCAL_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID << 8) | 0x6" */ - - - - - -/* - * NVC06F_CTRL_CMD_GET_MMU_FAULT_INFO - * - * Please see description of NV906F_CTRL_CMD_GET_MMU_FAULT_INFO for more information. - * - */ -#define NVC06F_CTRL_CMD_GET_MMU_FAULT_INFO (0xc06f0107) /* finn: Evaluated from "(FINN_PASCAL_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVC06F_CTRL_GET_MMU_FAULT_INFO_PARAMS_MESSAGE_ID" */ - -#define NVC06F_CTRL_GET_MMU_FAULT_INFO_PARAMS_MESSAGE_ID (0x7U) - -typedef NV906F_CTRL_GET_MMU_FAULT_INFO_PARAMS NVC06F_CTRL_GET_MMU_FAULT_INFO_PARAMS; +#define NVC06F_CTRL_CMD_EVENT_SET_TRIGGER (0xc06f0106) /* finn: Evaluated from "(FINN_PASCAL_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID << 8) | 0x6" */ -/* _ctrlc06f.h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrlc36f.h b/src/common/sdk/nvidia/inc/ctrl/ctrlc36f.h index 979f55c5fb..edb0d08427 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrlc36f.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrlc36f.h @@ -1,17 +1,17 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT - * + * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL @@ -58,56 +58,6 @@ - - - -/* - * NVC36F_CTRL_GET_CLASS_ENGINEID - * - * Please see description of NV906F_CTRL_GET_CLASS_ENGINEID for more information. - * - */ -#define NVC36F_CTRL_GET_CLASS_ENGINEID (0xc36f0101) /* finn: Evaluated from "(FINN_VOLTA_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVC36F_CTRL_GET_CLASS_ENGINEID_PARAMS_MESSAGE_ID" */ - -#define NVC36F_CTRL_GET_CLASS_ENGINEID_PARAMS_MESSAGE_ID (0x1U) - -typedef NV906F_CTRL_GET_CLASS_ENGINEID_PARAMS NVC36F_CTRL_GET_CLASS_ENGINEID_PARAMS; - -/* - * NVC36F_CTRL_RESET_CHANNEL - * - * Please see description of NV906F_CTRL_CMD_RESET_CHANNEL for more information. - * - */ -#define NVC36F_CTRL_CMD_RESET_CHANNEL (0xc36f0102) /* finn: Evaluated from "(FINN_VOLTA_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVC36F_CTRL_CMD_RESET_CHANNEL_PARAMS_MESSAGE_ID" */ - -#define NVC36F_CTRL_CMD_RESET_CHANNEL_PARAMS_MESSAGE_ID (0x2U) - -typedef NV906F_CTRL_CMD_RESET_CHANNEL_PARAMS NVC36F_CTRL_CMD_RESET_CHANNEL_PARAMS; - -/* - * NVC36F_CTRL_CMD_GPFIFO_SCHEDULE - * - * Please see description of NVA06F_CTRL_CMD_GPFIFO_SCHEDULE for more information. - * - */ -#define NVC36F_CTRL_CMD_GPFIFO_SCHEDULE (0xc36f0103) /* finn: Evaluated from "(FINN_VOLTA_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVC36F_CTRL_GPFIFO_SCHEDULE_PARAMS_MESSAGE_ID" */ - -#define NVC36F_CTRL_GPFIFO_SCHEDULE_PARAMS_MESSAGE_ID (0x3U) - -typedef NVA06F_CTRL_GPFIFO_SCHEDULE_PARAMS NVC36F_CTRL_GPFIFO_SCHEDULE_PARAMS; - -/* - * NVC36F_CTRL_CMD_BIND - * - * Please see description of NVA06F_CTRL_CMD_BIND for more information. - */ -#define NVC36F_CTRL_CMD_BIND (0xc36f0104) /* finn: Evaluated from "(FINN_VOLTA_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVC36F_CTRL_BIND_PARAMS_MESSAGE_ID" */ - -#define NVC36F_CTRL_BIND_PARAMS_MESSAGE_ID (0x4U) - -typedef NVA06F_CTRL_BIND_PARAMS NVC36F_CTRL_BIND_PARAMS; - /* * NVC36F_CTRL_CMD_EVENT_SET_NOTIFICATION * @@ -115,35 +65,14 @@ typedef NVA06F_CTRL_BIND_PARAMS NVC36F_CTRL_BIND_PARAMS; */ #define NVC36F_CTRL_CMD_EVENT_SET_NOTIFICATION (0xc36f0205) /* finn: Evaluated from "(FINN_VOLTA_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID << 8) | 0x5" */ -typedef NVA06F_CTRL_EVENT_SET_NOTIFICATION_PARAMS NVC36F_CTRL_EVENT_SET_NOTIFICATION_PARAMS; - -/* valid action values */ -#define NVC36F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE -#define NVC36F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE -#define NVC36F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT - /* * NVC36F_CTRL_CMD_EVENT_SET_TRIGGER * * Please see description of NVA06F_CTRL_CMD_EVENT_SET_TRIGGER for more information. */ -#define NVC36F_CTRL_CMD_EVENT_SET_TRIGGER (0xc36f0206) /* finn: Evaluated from "(FINN_VOLTA_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID << 8) | 0x6" */ - - - - - -/* - * NVC36F_CTRL_CMD_GET_MMU_FAULT_INFO - * - * Please see description of NV906F_CTRL_CMD_GET_MMU_FAULT_INFO for more information. - * - */ -#define NVC36F_CTRL_CMD_GET_MMU_FAULT_INFO (0xc36f0107) /* finn: Evaluated from "(FINN_VOLTA_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVC36F_CTRL_GET_MMU_FAULT_INFO_PARAMS_MESSAGE_ID" */ +#define NVC36F_CTRL_CMD_EVENT_SET_TRIGGER (0xc36f0206) /* finn: Evaluated from "(FINN_VOLTA_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID << 8) | 0x6" */ -#define NVC36F_CTRL_GET_MMU_FAULT_INFO_PARAMS_MESSAGE_ID (0x7U) -typedef NV906F_CTRL_GET_MMU_FAULT_INFO_PARAMS NVC36F_CTRL_GET_MMU_FAULT_INFO_PARAMS; /* * NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrlc370/ctrlc370base.h b/src/common/sdk/nvidia/inc/ctrl/ctrlc370/ctrlc370base.h index 7e4ac399e4..99612e85ea 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrlc370/ctrlc370base.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrlc370/ctrlc370base.h @@ -39,7 +39,6 @@ #define NVC370_CTRL_RESERVED (0x00) #define NVC370_CTRL_CHNCTL (0x01) #define NVC370_CTRL_RG (0x02) -#define NVC370_CTRL_SEQ (0x03) #define NVC370_CTRL_OR (0x04) #define NVC370_CTRL_INST (0x05) #define NVC370_CTRL_VERIF (0x06) diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrlc46f.h b/src/common/sdk/nvidia/inc/ctrl/ctrlc46f.h index ef7cc63e14..50a1652895 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrlc46f.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrlc46f.h @@ -1,17 +1,17 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2017-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2017-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT - * + * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL @@ -23,8 +23,6 @@ #pragma once -#include - // // This file was generated with FINN, an NVIDIA coding tool. // Source file: ctrl/ctrlc46f.finn @@ -58,105 +56,3 @@ */ #define NVC46F_CTRL_CMD_NULL (NVC36F_CTRL_CMD_NULL) - - - - - -/* - * NVC46F_CTRL_GET_CLASS_ENGINEID - * - * Please see description of NV906F_CTRL_GET_CLASS_ENGINEID for more information. - * - */ -#define NVC46F_CTRL_GET_CLASS_ENGINEID (NVC36F_CTRL_GET_CLASS_ENGINEID) - -typedef NV906F_CTRL_GET_CLASS_ENGINEID_PARAMS NVC46F_CTRL_GET_CLASS_ENGINEID_PARAMS; - -/* - * NVC46F_CTRL_RESET_CHANNEL - * - * Please see description of NV906F_CTRL_CMD_RESET_CHANNEL for more information. - * - */ -#define NVC46F_CTRL_CMD_RESET_CHANNEL (NVC36F_CTRL_CMD_RESET_CHANNEL) - -typedef NV906F_CTRL_CMD_RESET_CHANNEL_PARAMS NVC46F_CTRL_CMD_RESET_CHANNEL_PARAMS; - -/* - * NVC46F_CTRL_CMD_GPFIFO_SCHEDULE - * - * Please see description of NVA06F_CTRL_CMD_GPFIFO_SCHEDULE for more information. - * - */ -#define NVC46F_CTRL_CMD_GPFIFO_SCHEDULE (NVC36F_CTRL_CMD_GPFIFO_SCHEDULE) - -typedef NVA06F_CTRL_GPFIFO_SCHEDULE_PARAMS NVC46F_CTRL_GPFIFO_SCHEDULE_PARAMS; - -/* - * NVC46F_CTRL_CMD_BIND - * - * Please see description of NVA06F_CTRL_CMD_BIND for more information. - */ -#define NVC46F_CTRL_CMD_BIND (NVC36F_CTRL_CMD_BIND) - -typedef NVA06F_CTRL_BIND_PARAMS NVC46F_CTRL_BIND_PARAMS; - -/* - * NVC46F_CTRL_CMD_EVENT_SET_NOTIFICATION - * - * Please see description of NVA06F_CTRL_CMD_EVENT_SET_NOTIFICATION for more information. -*/ -#define NVC46F_CTRL_CMD_EVENT_SET_NOTIFICATION (NVC36F_CTRL_CMD_EVENT_SET_NOTIFICATION) - -typedef NVA06F_CTRL_EVENT_SET_NOTIFICATION_PARAMS NVC46F_CTRL_EVENT_SET_NOTIFICATION_PARAMS; - -/* valid action values */ -#define NVC46F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE -#define NVC46F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE -#define NVC46F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT - -/* - * NVC46F_CTRL_CMD_EVENT_SET_TRIGGER - * - * Please see description of NVA06F_CTRL_CMD_EVENT_SET_TRIGGER for more information. - */ -#define NVC46F_CTRL_CMD_EVENT_SET_TRIGGER (NVC36F_CTRL_CMD_EVENT_SET_TRIGGER) - - - - - -/* - * NVC46F_CTRL_CMD_GET_MMU_FAULT_INFO - * - * Please see description of NV906F_CTRL_CMD_GET_MMU_FAULT_INFO for more information. - * - */ -#define NVC46F_CTRL_CMD_GET_MMU_FAULT_INFO (NVC36F_CTRL_CMD_GET_MMU_FAULT_INFO) - -typedef NV906F_CTRL_GET_MMU_FAULT_INFO_PARAMS NVC46F_CTRL_GET_MMU_FAULT_INFO_PARAMS; - -/* - * NVC46F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN - * - * This command returns an opaque work submit token to the caller which - * can be used to write to doorbell register to finish submitting work. - * - * workSubmitToken The 32-bit work submit token - * - * Possible status values returned are: - * NV_OK - * NV_ERR_INVALID_OBJECT_HANDLE - * NV_ERR_INVALID_ARGUMENT - * - */ - -#define NVC46F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN (NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN) - -typedef struct NVC46F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS { - NvU32 workSubmitToken; -} NVC46F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS; - -/* _ctrlc46f.h_ */ - diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrlc56f.h b/src/common/sdk/nvidia/inc/ctrl/ctrlc56f.h index 8e96bf072a..82352eb0f9 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrlc56f.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrlc56f.h @@ -1,17 +1,17 @@ /* * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT - * + * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL @@ -62,106 +62,6 @@ */ #define NVC56F_CTRL_CMD_NULL (NVC36F_CTRL_CMD_NULL) - - - - - -/* - * NVC56F_CTRL_GET_CLASS_ENGINEID - * - * Please see description of NV906F_CTRL_GET_CLASS_ENGINEID for more information. - * - */ -#define NVC56F_CTRL_GET_CLASS_ENGINEID (NVC36F_CTRL_GET_CLASS_ENGINEID) - -typedef NV906F_CTRL_GET_CLASS_ENGINEID_PARAMS NVC56F_CTRL_GET_CLASS_ENGINEID_PARAMS; - -/* - * NVC56F_CTRL_RESET_CHANNEL - * - * Please see description of NV906F_CTRL_CMD_RESET_CHANNEL for more information. - * - */ -#define NVC56F_CTRL_CMD_RESET_CHANNEL (NVC36F_CTRL_CMD_RESET_CHANNEL) - -typedef NV906F_CTRL_CMD_RESET_CHANNEL_PARAMS NVC56F_CTRL_CMD_RESET_CHANNEL_PARAMS; - -/* - * NVC56F_CTRL_CMD_GPFIFO_SCHEDULE - * - * Please see description of NVA06F_CTRL_CMD_GPFIFO_SCHEDULE for more information. - * - */ -#define NVC56F_CTRL_CMD_GPFIFO_SCHEDULE (NVC36F_CTRL_CMD_GPFIFO_SCHEDULE) - -typedef NVA06F_CTRL_GPFIFO_SCHEDULE_PARAMS NVC56F_CTRL_GPFIFO_SCHEDULE_PARAMS; - -/* - * NVC56F_CTRL_CMD_BIND - * - * Please see description of NVA06F_CTRL_CMD_BIND for more information. - */ -#define NVC56F_CTRL_CMD_BIND (NVC36F_CTRL_CMD_BIND) - -typedef NVA06F_CTRL_BIND_PARAMS NVC56F_CTRL_BIND_PARAMS; - -/* - * NVC56F_CTRL_CMD_EVENT_SET_NOTIFICATION - * - * Please see description of NVA06F_CTRL_CMD_EVENT_SET_NOTIFICATION for more information. -*/ -#define NVC56F_CTRL_CMD_EVENT_SET_NOTIFICATION (NVC36F_CTRL_CMD_EVENT_SET_NOTIFICATION) - -typedef NVA06F_CTRL_EVENT_SET_NOTIFICATION_PARAMS NVC56F_CTRL_EVENT_SET_NOTIFICATION_PARAMS; - -/* valid action values */ -#define NVC56F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE -#define NVC56F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE -#define NVC56F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT - -/* - * NVC56F_CTRL_CMD_EVENT_SET_TRIGGER - * - * Please see description of NVA06F_CTRL_CMD_EVENT_SET_TRIGGER for more information. - */ -#define NVC56F_CTRL_CMD_EVENT_SET_TRIGGER (NVC36F_CTRL_CMD_EVENT_SET_TRIGGER) - - - - - -/* - * NVC56F_CTRL_CMD_GET_MMU_FAULT_INFO - * - * Please see description of NV906F_CTRL_CMD_GET_MMU_FAULT_INFO for more information. - * - */ -#define NVC56F_CTRL_CMD_GET_MMU_FAULT_INFO (NVC36F_CTRL_CMD_GET_MMU_FAULT_INFO) - -typedef NV906F_CTRL_GET_MMU_FAULT_INFO_PARAMS NVC56F_CTRL_GET_MMU_FAULT_INFO_PARAMS; - -/* - * NVC56F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN - * - * This command returns an opaque work submit token to the caller which - * can be used to write to doorbell register to finish submitting work. - * - * workSubmitToken The 32-bit work submit token - * - * Possible status values returned are: - * NV_OK - * NV_ERR_INVALID_OBJECT_HANDLE - * NV_ERR_INVALID_ARGUMENT - * - */ - -#define NVC56F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN (NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN) - -typedef struct NVC56F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS { - NvU32 workSubmitToken; -} NVC56F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS; - /* * NVC56F_CTRL_CMD_GET_KMB_STAT_ADDR * diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrlc86f.h b/src/common/sdk/nvidia/inc/ctrl/ctrlc86f.h index 0f2113dd80..0c29242189 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrlc86f.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrlc86f.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -23,8 +23,6 @@ #pragma once -#include - // // This file was generated with FINN, an NVIDIA coding tool. // Source file: ctrl/ctrlc86f.finn @@ -61,105 +59,3 @@ */ #define NVC86F_CTRL_CMD_NULL (NVC36F_CTRL_CMD_NULL) - - - - - -/* - * NVC86F_CTRL_GET_CLASS_ENGINEID - * - * Please see description of NV906F_CTRL_GET_CLASS_ENGINEID for more information. - * - */ -#define NVC86F_CTRL_GET_CLASS_ENGINEID (NVC36F_CTRL_GET_CLASS_ENGINEID) - -typedef NV906F_CTRL_GET_CLASS_ENGINEID_PARAMS NVC86F_CTRL_GET_CLASS_ENGINEID_PARAMS; - -/* - * NVC86F_CTRL_RESET_CHANNEL - * - * Please see description of NV906F_CTRL_CMD_RESET_CHANNEL for more information. - * - */ -#define NVC86F_CTRL_CMD_RESET_CHANNEL (NVC36F_CTRL_CMD_RESET_CHANNEL) - -typedef NV906F_CTRL_CMD_RESET_CHANNEL_PARAMS NVC86F_CTRL_CMD_RESET_CHANNEL_PARAMS; - -/* - * NVC86F_CTRL_CMD_GPFIFO_SCHEDULE - * - * Please see description of NVA06F_CTRL_CMD_GPFIFO_SCHEDULE for more information. - * - */ -#define NVC86F_CTRL_CMD_GPFIFO_SCHEDULE (NVC36F_CTRL_CMD_GPFIFO_SCHEDULE) - -typedef NVA06F_CTRL_GPFIFO_SCHEDULE_PARAMS NVC86F_CTRL_GPFIFO_SCHEDULE_PARAMS; - -/* - * NVC86F_CTRL_CMD_BIND - * - * Please see description of NVA06F_CTRL_CMD_BIND for more information. - */ -#define NVC86F_CTRL_CMD_BIND (NVC36F_CTRL_CMD_BIND) - -typedef NVA06F_CTRL_BIND_PARAMS NVC86F_CTRL_BIND_PARAMS; - -/* - * NVC86F_CTRL_CMD_EVENT_SET_NOTIFICATION - * - * Please see description of NVA06F_CTRL_CMD_EVENT_SET_NOTIFICATION for more information. -*/ -#define NVC86F_CTRL_CMD_EVENT_SET_NOTIFICATION (NVC36F_CTRL_CMD_EVENT_SET_NOTIFICATION) - -typedef NVA06F_CTRL_EVENT_SET_NOTIFICATION_PARAMS NVC86F_CTRL_EVENT_SET_NOTIFICATION_PARAMS; - -/* valid action values */ -#define NVC86F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE -#define NVC86F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE -#define NVC86F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT - -/* - * NVC86F_CTRL_CMD_EVENT_SET_TRIGGER - * - * Please see description of NVA06F_CTRL_CMD_EVENT_SET_TRIGGER for more information. - */ -#define NVC86F_CTRL_CMD_EVENT_SET_TRIGGER (NVC36F_CTRL_CMD_EVENT_SET_TRIGGER) - - - - - -/* - * NVC86F_CTRL_CMD_GET_MMU_FAULT_INFO - * - * Please see description of NV906F_CTRL_CMD_GET_MMU_FAULT_INFO for more information. - * - */ -#define NVC86F_CTRL_CMD_GET_MMU_FAULT_INFO (NVC36F_CTRL_CMD_GET_MMU_FAULT_INFO) - -typedef NV906F_CTRL_GET_MMU_FAULT_INFO_PARAMS NVC86F_CTRL_GET_MMU_FAULT_INFO_PARAMS; - -/* - * NVC86F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN - * - * This command returns an opaque work submit token to the caller which - * can be used to write to doorbell register to finish submitting work. - * - * workSubmitToken The 32-bit work submit token - * - * Possible status values returned are: - * NV_OK - * NV_ERR_INVALID_OBJECT_HANDLE - * NV_ERR_INVALID_ARGUMENT - * - */ - -#define NVC86F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN (NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN) - -typedef struct NVC86F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS { - NvU32 workSubmitToken; -} NVC86F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS; - -/* _ctrlC86F.h_ */ - diff --git a/src/common/sdk/nvidia/inc/g_finn_rm_api.h b/src/common/sdk/nvidia/inc/g_finn_rm_api.h index f699582ea1..5855496e2a 100644 --- a/src/common/sdk/nvidia/inc/g_finn_rm_api.h +++ b/src/common/sdk/nvidia/inc/g_finn_rm_api.h @@ -40,7 +40,7 @@ * FINN compiler version */ #define FINN_VERSION_MAJOR 1 -#define FINN_VERSION_MINOR 21 +#define FINN_VERSION_MINOR 22 #define FINN_VERSION_PATCH 0 typedef struct FINN_RM_API @@ -318,6 +318,10 @@ typedef FINN_RM_API FINN_NV_MEMORY_MULTICAST_FABRIC_RESERVED; typedef FINN_RM_API FINN_NV_MEMORY_MULTICAST_FABRIC_FABRIC; #define FINN_NV_MEMORY_MAPPER_INTERFACE_ID (0xfe01U) typedef FINN_RM_API FINN_NV_MEMORY_MAPPER; +#define FINN_LOCK_STRESS_OBJECT_RESERVED_INTERFACE_ID (0x10000U) +typedef FINN_RM_API FINN_LOCK_STRESS_OBJECT_RESERVED; +#define FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID (0x10001U) +typedef FINN_RM_API FINN_LOCK_STRESS_OBJECT_LOCK_STRESS; #define FINN_NV20_SUBDEVICE_0_RESERVED_INTERFACE_ID (0x208000U) typedef FINN_RM_API FINN_NV20_SUBDEVICE_0_RESERVED; @@ -442,6 +446,8 @@ typedef FINN_RM_API FINN_NV20_SUBDEVICE_DIAG_GR; #define FINN_NV20_SUBDEVICE_DIAG_MMU_INTERFACE_ID (0x208f0bU) typedef FINN_RM_API FINN_NV20_SUBDEVICE_DIAG_MMU; +#define FINN_NV20_SUBDEVICE_DIAG_UCODE_COVERAGE_INTERFACE_ID (0x208f19U) +typedef FINN_RM_API FINN_NV20_SUBDEVICE_DIAG_UCODE_COVERAGE; #define FINN_NV30_GSYNC_RESERVED_INTERFACE_ID (0x30f100U) typedef FINN_RM_API FINN_NV30_GSYNC_RESERVED; #define FINN_NV30_GSYNC_GSYNC_INTERFACE_ID (0x30f101U) @@ -468,8 +474,6 @@ typedef FINN_RM_API FINN_NV50_DISPLAY_EVENT; typedef FINN_RM_API FINN_NV50_DISPLAY_OR; #define FINN_NV50_DISPLAY_RG_INTERFACE_ID (0x507002U) typedef FINN_RM_API FINN_NV50_DISPLAY_RG; -#define FINN_NV50_DISPLAY_SEQ_INTERFACE_ID (0x507003U) -typedef FINN_RM_API FINN_NV50_DISPLAY_SEQ; #define FINN_NV50_DISPLAY_SYSTEM_INTERFACE_ID (0x507007U) typedef FINN_RM_API FINN_NV50_DISPLAY_SYSTEM; @@ -600,15 +604,11 @@ typedef FINN_RM_API FINN_GK110_SUBDEVICE_FB_RESERVED; typedef FINN_RM_API FINN_GK110_SUBDEVICE_FB_FB; #define FINN_KEPLER_CHANNEL_GPFIFO_B_RESERVED_INTERFACE_ID (0xa16f00U) typedef FINN_RM_API FINN_KEPLER_CHANNEL_GPFIFO_B_RESERVED; -#define FINN_KEPLER_CHANNEL_GPFIFO_B_GPFIFO_INTERFACE_ID (0xa16f01U) -typedef FINN_RM_API FINN_KEPLER_CHANNEL_GPFIFO_B_GPFIFO; -#define FINN_KEPLER_CHANNEL_GPFIFO_B_EVENT_INTERFACE_ID (0xa16f02U) +#define FINN_KEPLER_CHANNEL_GPFIFO_B_EVENT_INTERFACE_ID (0xa16f01U) typedef FINN_RM_API FINN_KEPLER_CHANNEL_GPFIFO_B_EVENT; #define FINN_KEPLER_CHANNEL_GPFIFO_C_RESERVED_INTERFACE_ID (0xa26f00U) typedef FINN_RM_API FINN_KEPLER_CHANNEL_GPFIFO_C_RESERVED; -#define FINN_KEPLER_CHANNEL_GPFIFO_C_GPFIFO_INTERFACE_ID (0xa26f01U) -typedef FINN_RM_API FINN_KEPLER_CHANNEL_GPFIFO_C_GPFIFO; -#define FINN_KEPLER_CHANNEL_GPFIFO_C_EVENT_INTERFACE_ID (0xa26f02U) +#define FINN_KEPLER_CHANNEL_GPFIFO_C_EVENT_INTERFACE_ID (0xa26f01U) typedef FINN_RM_API FINN_KEPLER_CHANNEL_GPFIFO_C_EVENT; #define FINN_MAXWELL_FAULT_BUFFER_A_RESERVED_INTERFACE_ID (0xb06900U) typedef FINN_RM_API FINN_MAXWELL_FAULT_BUFFER_A_RESERVED; @@ -639,9 +639,7 @@ typedef FINN_RM_API FINN_MAXWELL_PROFILER_DEVICE_RESERVED; typedef FINN_RM_API FINN_MAXWELL_SEC2_SEC2; #define FINN_PASCAL_CHANNEL_GPFIFO_A_RESERVED_INTERFACE_ID (0xc06f00U) typedef FINN_RM_API FINN_PASCAL_CHANNEL_GPFIFO_A_RESERVED; -#define FINN_PASCAL_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID (0xc06f01U) -typedef FINN_RM_API FINN_PASCAL_CHANNEL_GPFIFO_A_GPFIFO; -#define FINN_PASCAL_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID (0xc06f02U) +#define FINN_PASCAL_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID (0xc06f01U) typedef FINN_RM_API FINN_PASCAL_CHANNEL_GPFIFO_A_EVENT; #define FINN_GP100_SUBDEVICE_GRAPHICS_RESERVED_INTERFACE_ID (0xc0e000U) typedef FINN_RM_API FINN_GP100_SUBDEVICE_GRAPHICS_RESERVED; @@ -694,16 +692,10 @@ typedef FINN_RM_API FINN_GV100_SUBDEVICE_FB_RESERVED; typedef FINN_RM_API FINN_GV100_SUBDEVICE_FB_FB; #define FINN_TURING_CHANNEL_GPFIFO_A_RESERVED_INTERFACE_ID (0xc46f00U) typedef FINN_RM_API FINN_TURING_CHANNEL_GPFIFO_A_RESERVED; -#define FINN_TURING_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID (0xc46f01U) -typedef FINN_RM_API FINN_TURING_CHANNEL_GPFIFO_A_GPFIFO; -#define FINN_TURING_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID (0xc46f02U) -typedef FINN_RM_API FINN_TURING_CHANNEL_GPFIFO_A_EVENT; #define FINN_AMPERE_CHANNEL_GPFIFO_A_RESERVED_INTERFACE_ID (0xc56f00U) typedef FINN_RM_API FINN_AMPERE_CHANNEL_GPFIFO_A_RESERVED; #define FINN_AMPERE_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID (0xc56f01U) typedef FINN_RM_API FINN_AMPERE_CHANNEL_GPFIFO_A_GPFIFO; -#define FINN_AMPERE_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID (0xc56f02U) -typedef FINN_RM_API FINN_AMPERE_CHANNEL_GPFIFO_A_EVENT; #define FINN_AMPERE_SMC_PARTITION_REF_RESERVED_INTERFACE_ID (0xc63700U) typedef FINN_RM_API FINN_AMPERE_SMC_PARTITION_REF_RESERVED; #define FINN_AMPERE_SMC_PARTITION_REF_EXEC_PARTITIONS_INTERFACE_ID (0xc63701U) @@ -718,10 +710,6 @@ typedef FINN_RM_API FINN_MMU_VIDMEM_ACCESS_BIT_BUFFER_RESERVED; typedef FINN_RM_API FINN_MMU_VIDMEM_ACCESS_BIT_BUFFER_VIDMEM_ACCESS_BIT_BUFFER; #define FINN_HOPPER_CHANNEL_GPFIFO_A_RESERVED_INTERFACE_ID (0xc86f00U) typedef FINN_RM_API FINN_HOPPER_CHANNEL_GPFIFO_A_RESERVED; -#define FINN_HOPPER_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID (0xc86f01U) -typedef FINN_RM_API FINN_HOPPER_CHANNEL_GPFIFO_A_GPFIFO; -#define FINN_HOPPER_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID (0xc86f02U) -typedef FINN_RM_API FINN_HOPPER_CHANNEL_GPFIFO_A_EVENT; #define FINN_NV_CONFIDENTIAL_COMPUTE_RESERVED_INTERFACE_ID (0xcb3300U) typedef FINN_RM_API FINN_NV_CONFIDENTIAL_COMPUTE_RESERVED; diff --git a/src/common/sdk/nvidia/inc/nv-hypervisor.h b/src/common/sdk/nvidia/inc/nv-hypervisor.h index 93bcdd6e67..a2b2649758 100644 --- a/src/common/sdk/nvidia/inc/nv-hypervisor.h +++ b/src/common/sdk/nvidia/inc/nv-hypervisor.h @@ -37,13 +37,11 @@ typedef enum _HYPERVISOR_TYPE OS_HYPERVISOR_UNKNOWN } HYPERVISOR_TYPE; -#define CMD_VGPU_VFIO_WAKE_WAIT_QUEUE 0 -#define CMD_VGPU_VFIO_INJECT_INTERRUPT 1 -#define CMD_VGPU_VFIO_REGISTER_MDEV 2 -#define CMD_VGPU_VFIO_PRESENT 3 -#define CMD_VFIO_PCI_CORE_PRESENT 4 +#define CMD_VFIO_WAKE_REMOVE_GPU 1 +#define CMD_VGPU_VFIO_PRESENT 2 +#define CMD_VFIO_PCI_CORE_PRESENT 3 -#define MAX_VF_COUNT_PER_GPU 64 +#define MAX_VF_COUNT_PER_GPU 64 typedef enum _VGPU_TYPE_INFO { @@ -54,17 +52,11 @@ typedef enum _VGPU_TYPE_INFO typedef struct { - void *vgpuVfioRef; - void *waitQueue; void *nv; - NvU32 *vgpuTypeIds; - NvU8 **vgpuNames; - NvU32 numVgpuTypes; - NvU32 domain; - NvU8 bus; - NvU8 slot; - NvU8 function; - NvBool is_virtfn; + NvU32 domain; + NvU32 bus; + NvU32 device; + NvU32 return_status; } vgpu_vfio_info; typedef struct diff --git a/src/common/sdk/nvidia/inc/nverror.h b/src/common/sdk/nvidia/inc/nverror.h index aa0231f835..d5710f4f5f 100644 --- a/src/common/sdk/nvidia/inc/nverror.h +++ b/src/common/sdk/nvidia/inc/nverror.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 1993-2023, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 1993-2024, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -67,9 +67,9 @@ #define PMU_BREAKPOINT (61) #define PMU_HALT_ERROR (62) #define INFOROM_PAGE_RETIREMENT_EVENT (63) +#define INFOROM_DRAM_RETIREMENT_EVENT INFOROM_PAGE_RETIREMENT_EVENT #define INFOROM_PAGE_RETIREMENT_FAILURE (64) -#define INFOROM_DRAM_RETIREMENT_EVENT (63) -#define INFOROM_DRAM_RETIREMENT_FAILURE (64) +#define INFOROM_DRAM_RETIREMENT_FAILURE INFOROM_PAGE_RETIREMENT_FAILURE #define ROBUST_CHANNEL_NVENC1_ERROR (65) #define ROBUST_CHANNEL_NVDEC0_ERROR (68) #define ROBUST_CHANNEL_GR_CLASS_ERROR (69) @@ -124,8 +124,15 @@ #define UNRECOVERABLE_ECC_ERROR_ESCAPE (140) #define ROBUST_CHANNEL_FAST_PATH_ERROR (141) #define GPU_INIT_ERROR (143) -#define ROBUST_CHANNEL_KEY_ROTATION_ERROR (144) -#define ROBUST_CHANNEL_LAST_ERROR (ROBUST_CHANNEL_KEY_ROTATION_ERROR) +#define RESERVED0_ERROR (144) +#define RESERVED1_ERROR (145) +#define RESERVED2_ERROR (146) +#define RESERVED3_ERROR (147) +#define RESERVED4_ERROR (148) +#define RESERVED5_ERROR (149) +#define RESERVED6_ERROR (150) +#define ROBUST_CHANNEL_KEY_ROTATION_ERROR (151) +#define ROBUST_CHANNEL_LAST_ERROR (151) // Indexed CE reference diff --git a/src/common/sdk/nvidia/inc/nvimpshared.h b/src/common/sdk/nvidia/inc/nvimpshared.h index c86d71879a..7b821ff09c 100644 --- a/src/common/sdk/nvidia/inc/nvimpshared.h +++ b/src/common/sdk/nvidia/inc/nvimpshared.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -66,10 +66,6 @@ typedef struct DRAM_CLK_INSTANCE { // This table is used to collect information from other modules that is needed // for RM IMP calculations. (Used on Tegra only.) // -#define TEGRA_IMP_IMPORT_DATA_DRAM_TYPE_UNKNOWN 0U -#define TEGRA_IMP_IMPORT_DATA_DRAM_TYPE_LPDDR4 1U -#define TEGRA_IMP_IMPORT_DATA_DRAM_TYPE_LPDDR5 2U - typedef struct TEGRA_IMP_IMPORT_DATA { // // max_iso_bw_kbps stores the maximum possible ISO bandwidth available to @@ -79,7 +75,6 @@ typedef struct TEGRA_IMP_IMPORT_DATA { // NvU32 max_iso_bw_kbps; - NvU32 dram_type; // On Orin, each dram channel is 16 bits wide. NvU32 num_dram_channels; diff --git a/src/common/sdk/nvidia/inc/nvmisc.h b/src/common/sdk/nvidia/inc/nvmisc.h index 6c47b6d3e1..4d288f679b 100644 --- a/src/common/sdk/nvidia/inc/nvmisc.h +++ b/src/common/sdk/nvidia/inc/nvmisc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -494,6 +494,23 @@ do \ // #define NV_TWO_N_MINUS_ONE(n) (((1ULL<<(n/2))<<((n+1)/2))-1) +// +// Create a 64b bitmask with n bits set +// This is the same as ((1ULL<>((n>64) ? 0 : (64-n)))) + #define DRF_READ_1WORD_BS(d,r,f,v) \ ((DRF_EXTENT_MW(NV##d##r##f)<8)?DRF_READ_1BYTE_BS(NV##d##r##f,(v)): \ ((DRF_EXTENT_MW(NV##d##r##f)<16)?DRF_READ_2BYTE_BS(NV##d##r##f,(v)): \ @@ -574,6 +591,13 @@ nvMaskPos32(const NvU32 mask, const NvU32 bitIdx) n32 = BIT_IDX_32(LOWESTBIT(n32));\ } +// Destructive operation on n64 +#define LOWESTBITIDX_64(n64) \ +{ \ + n64 = BIT_IDX_64(LOWESTBIT(n64));\ +} + + // Destructive operation on n32 #define HIGHESTBITIDX_32(n32) \ { \ @@ -918,6 +942,11 @@ static NV_FORCEINLINE void *NV_NVUPTR_TO_PTR(NvUPtr address) // Use (lo) if (b) is less than 64, and (hi) if >= 64. // #define NV_BIT_SET_128(b, lo, hi) { nvAssert( (b) < 128 ); if ( (b) < 64 ) (lo) |= NVBIT64(b); else (hi) |= NVBIT64( b & 0x3F ); } +// +// Clear the bit at pos (b) for U64 which is < 128. +// Use (lo) if (b) is less than 64, and (hi) if >= 64. +// +#define NV_BIT_CLEAR_128(b, lo, hi) { nvAssert( (b) < 128 ); if ( (b) < 64 ) (lo) &= ~NVBIT64(b); else (hi) &= ~NVBIT64( b & 0x3F ); } // Get the number of elements the specified fixed-size array #define NV_ARRAY_ELEMENTS(x) ((sizeof(x)/sizeof((x)[0]))) diff --git a/src/common/sdk/nvidia/inc/nvos.h b/src/common/sdk/nvidia/inc/nvos.h index d9f23bdf99..3e3cf83f6d 100644 --- a/src/common/sdk/nvidia/inc/nvos.h +++ b/src/common/sdk/nvidia/inc/nvos.h @@ -257,6 +257,14 @@ typedef struct #define NVOS02_FLAGS_MEMORY_PROTECTION_PROTECTED (0x00000001) #define NVOS02_FLAGS_MEMORY_PROTECTION_UNPROTECTED (0x00000002) +// +// When allocating memory, register the memory descriptor to GSP-RM +// so that GSP-RM is aware of and can access it +// +#define NVOS02_FLAGS_REGISTER_MEMDESC_TO_PHYS_RM 27:27 +#define NVOS02_FLAGS_REGISTER_MEMDESC_TO_PHYS_RM_FALSE (0x00000000) +#define NVOS02_FLAGS_REGISTER_MEMDESC_TO_PHYS_RM_TRUE (0x00000001) + // // If _NO_MAP is requested, the RM in supported platforms will not map the // allocated system or IO memory into user space. The client can later map @@ -2053,6 +2061,7 @@ typedef struct #define NVOS46_FLAGS_PAGE_SIZE_BIG (0x00000002) #define NVOS46_FLAGS_PAGE_SIZE_BOTH (0x00000003) #define NVOS46_FLAGS_PAGE_SIZE_HUGE (0x00000004) +#define NVOS46_FLAGS_PAGE_SIZE_512M (0x00000005) // Some systems allow the device to use the system L3 cache when accessing the // system memory. For example, the iGPU on T19X can allocate from the system L3 @@ -2292,6 +2301,8 @@ typedef struct NvU8 forceMonitorState; NvU8 bForcePerfBiosLevel; NvU8 bIsD3HotTransition; // [OUT] To tell client if it's a D3Hot transition + NvU8 bForcePowerStateFail; + NvU32 errorStatus; // [OUT] To tell client if there is bubble up errors NvU32 fastBootPowerState; } NVPOWERSTATE_PARAMETERS, *PNVPOWERSTATE_PARAMETERS; diff --git a/src/common/sdk/nvidia/inc/nvstatuscodes.h b/src/common/sdk/nvidia/inc/nvstatuscodes.h index 552207f212..78739349e6 100644 --- a/src/common/sdk/nvidia/inc/nvstatuscodes.h +++ b/src/common/sdk/nvidia/inc/nvstatuscodes.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2014-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2014-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -152,6 +152,7 @@ NV_STATUS_CODE(NV_ERR_FABRIC_MANAGER_NOT_PRESENT, 0x0000007A, "Fabric Manag NV_STATUS_CODE(NV_ERR_ALREADY_SIGNALLED, 0x0000007B, "Semaphore Surface value already >= requested wait value") NV_STATUS_CODE(NV_ERR_QUEUE_TASK_SLOT_NOT_AVAILABLE, 0x0000007C, "PMU RPC error due to no queue slot available for this event") NV_STATUS_CODE(NV_ERR_KEY_ROTATION_IN_PROGRESS, 0x0000007D, "Operation not allowed as key rotation is in progress") +NV_STATUS_CODE(NV_ERR_TEST_ONLY_CODE_NOT_ENABLED, 0x0000007E, "Test-only code path not enabled") // Warnings: NV_STATUS_CODE(NV_WARN_HOT_SWITCH, 0x00010001, "WARNING Hot switch") diff --git a/src/common/sdk/nvidia/inc/nvtypes.h b/src/common/sdk/nvidia/inc/nvtypes.h index f20a927de3..0bbbae9a44 100644 --- a/src/common/sdk/nvidia/inc/nvtypes.h +++ b/src/common/sdk/nvidia/inc/nvtypes.h @@ -148,6 +148,12 @@ typedef signed short NvS16; /* -32768 to 32767 */ (((NvU32)(c) & 0xff) << 8) | \ (((NvU32)(d) & 0xff)))) +// Macro to build an NvU64 from two DWORDS, listed from msb to lsb +#define NvU64_BUILD(a, b) \ + ((NvU64)( \ + (((NvU64)(a) & ~0U) << 32) | \ + (((NvU64)(b) & ~0U)))) + #if NVTYPES_USE_STDINT typedef uint32_t NvV32; /* "void": enumerated or multiple fields */ typedef uint32_t NvU32; /* 0 to 4294967295 */ diff --git a/src/common/shared/inc/g_vgpu_chip_flags.h b/src/common/shared/inc/g_vgpu_chip_flags.h index b9cba127b1..3f9ed342d8 100644 --- a/src/common/shared/inc/g_vgpu_chip_flags.h +++ b/src/common/shared/inc/g_vgpu_chip_flags.h @@ -20,15 +20,6 @@ typedef struct _VGPU_USM_TYPES { #define ENTRY(a,b,c,d) { a, b, c } #endif -static const VGPU_USM_TYPES sVgpuUsmTypesAC[] = { -ENTRY(0x2684, 0x17D1, 0x10de, "NVIDIA AC AD102 12Q"), -ENTRY(0x2684, 0x17D2, 0x10de, "NVIDIA AC AD102 20Q"), -ENTRY(0x2785, 0x17D1, 0x10de, "NVIDIA AC AD104 12Q"), -ENTRY(0x2785, 0x17D2, 0x10de, "NVIDIA AC AD104 20Q"), -ENTRY(0x2785, 0x17D3, 0x10de, "NVIDIA AC AD104-A 4Q"), -ENTRY(0x2785, 0x17D4, 0x10de, "NVIDIA AC AD104-A 8Q"), -}; - static const VGPU_USM_TYPES sVgpuUsmTypes[] = { ENTRY(0x13BD, 0x11CC, 0x10de, "GRID M10-0B"), ENTRY(0x13BD, 0x11CD, 0x10de, "GRID M10-1B"), diff --git a/src/common/uproc/os/common/include/libos_status.h b/src/common/uproc/os/common/include/libos_status.h index 36fe31bd71..1bfa854862 100644 --- a/src/common/uproc/os/common/include/libos_status.h +++ b/src/common/uproc/os/common/include/libos_status.h @@ -33,19 +33,20 @@ typedef enum __attribute__ ((__packed__)) { - LibosOk = 0u, + LibosOk = 0u, - LibosErrorArgument = 1u, - LibosErrorAccess = 2u, - LibosErrorTimeout = 3u, - LibosErrorIncomplete = 4u, - LibosErrorFailed = 5u, - LibosErrorOutOfMemory= 6u, - LibosErrorSpoofed = 7u, - LibosErrorPortLost = 8u, - LibosErrorShuttleReset = 10u, + LibosErrorArgument = 1u, + LibosErrorAccess = 2u, + LibosErrorTimeout = 3u, + LibosErrorIncomplete = 4u, + LibosErrorFailed = 5u, + LibosErrorOutOfMemory = 6u, + LibosErrorSpoofed = 7u, + LibosErrorPortLost = 8u, LibosErrorExhaustedHandles = 9u, - LibosErrorNotDeviceMapped = 11u + LibosErrorShuttleReset = 10u, + LibosErrorNotDeviceMapped = 11u, + LibosErrorUnavailable = 12u, } LibosStatus; #define LIBOS_OK LibosOk diff --git a/src/common/uproc/os/libos-v3.1.0/lib/libdwarf.c b/src/common/uproc/os/libos-v3.1.0/lib/libdwarf.c index bd33eefbae..311bce6ef9 100644 --- a/src/common/uproc/os/libos-v3.1.0/lib/libdwarf.c +++ b/src/common/uproc/os/libos-v3.1.0/lib/libdwarf.c @@ -830,8 +830,9 @@ static void dwarfBuildARangeTable(LibosDebugResolver *pThis) NvU64 combAddress = 0; NvU64 combLength = 0; + NvBool lastEntry = NV_FALSE; - while (NV_TRUE) + while (!lastEntry) { NvU64 address; NvU64 length; @@ -842,6 +843,12 @@ static void dwarfBuildARangeTable(LibosDebugResolver *pThis) length = 0; } + lastEntry = unit.offset >= unit_size; + + // Skip empty entries, but don't skip the last entry. + if (address == 0 && length == 0 && !lastEntry) + continue; + if (address == combAddress + combLength) { combLength += length; @@ -864,9 +871,6 @@ static void dwarfBuildARangeTable(LibosDebugResolver *pThis) combAddress = address; combLength = length; } - - if (address == 0 && length == 0) - break; } } diff --git a/src/common/uproc/os/libos-v3.1.0/lib/liblogdecode.c b/src/common/uproc/os/libos-v3.1.0/lib/liblogdecode.c index 5114675d60..4ac4d8388e 100644 --- a/src/common/uproc/os/libos-v3.1.0/lib/liblogdecode.c +++ b/src/common/uproc/os/libos-v3.1.0/lib/liblogdecode.c @@ -1,7 +1,7 @@ /* * ---------------------------------------------------------------------- * Copyright (c) 2005-2014 Rich Felker, et al. - * Copyright (c) 2019-2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * Copyright (c) 2019-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining * a copy of this software and associated documentation files (the @@ -324,6 +324,7 @@ static void flush_line_buffer(LIBOS_LOG_DECODE *logDecode) // FIXME (bug 3924763): by default, nv_printf prints messages at level >= NV_DBG_WARNINGS=3. // We want to show all prints >= LEVEL_NOTICE=2, so bump LEVEL_NOTICE=2 to LEVEL_WARNING=3 for now. // This will be fixed by remapping log levels correctly. + // NB: This is not needed for MODS, because LEVEL_NOTICE is still recorded in MODS logs. // if (logLevel == LEVEL_NOTICE) logLevel = LEVEL_WARNING; diff --git a/src/nvidia-modeset/include/dp/nvdp-connector.h b/src/nvidia-modeset/include/dp/nvdp-connector.h index 6f99db260a..9a17863890 100644 --- a/src/nvidia-modeset/include/dp/nvdp-connector.h +++ b/src/nvidia-modeset/include/dp/nvdp-connector.h @@ -59,8 +59,7 @@ NvBool nvDPLibIsModePossible(const NVDPLibConnectorRec *pDpLibConnector, NvBool nvDPValidateModeForDpyEvo( const NVDpyEvoRec *pDpyEvo, - const enum NvKmsDpyAttributeCurrentColorSpaceValue colorSpace, - const enum NvKmsDpyAttributeColorBpcValue colorBpc, + const NVDpyAttributeColor *pDpyColor, const struct NvKmsModeValidationParams *pModeValidationParams, const NVHwModeTimingsEvo *pTimings, const NvBool b2Heads1Or, @@ -90,6 +89,8 @@ enum NVDpLinkMode { enum NVDpLinkMode nvDPGetActiveLinkMode(NVDPLibConnectorPtr pDpLibConnector); +void nvDPSetLinkHandoff(NVDPLibConnectorPtr pDpLibConnector, NvBool enable); + #ifdef __cplusplus }; #endif diff --git a/src/nvidia-modeset/include/nvkms-evo.h b/src/nvidia-modeset/include/nvkms-evo.h index 486b6ed944..7d7b0f841a 100644 --- a/src/nvidia-modeset/include/nvkms-evo.h +++ b/src/nvidia-modeset/include/nvkms-evo.h @@ -163,6 +163,7 @@ NvBool nvConstructHwModeTimingsEvo(const NVDpyEvoRec *pDpyEvo, const struct NvKmsMode *pKmsMode, const struct NvKmsSize *pViewPortSizeIn, const struct NvKmsRect *pViewPortOut, + NVDpyAttributeColor *pDpyColor, NVHwModeTimingsEvoPtr pTimings, const struct NvKmsModeValidationParams *pParams, @@ -173,23 +174,21 @@ NvBool nvConstructHwModeTimingsImpCheckEvo( const NVHwModeTimingsEvo *pTimings, const NvBool enableDsc, const NvBool b2Heads1Or, - const enum NvKmsDpyAttributeCurrentColorSpaceValue colorSpace, - const enum NvKmsDpyAttributeColorBpcValue colorBpc, + const NVDpyAttributeColor *pDpyColor, const struct NvKmsModeValidationParams *pParams, NVHwModeTimingsEvo timings[NVKMS_MAX_HEADS_PER_DISP], NvU32 *pNumHeads, NVEvoInfoStringPtr pInfoString); +NvBool nvDowngradeColorBpc(NVDpyAttributeColor *pDpyColor); + NvBool nvDowngradeColorSpaceAndBpc( const NVColorFormatInfoRec *pSupportedColorFormats, - enum NvKmsDpyAttributeCurrentColorSpaceValue *pColorSpace, - enum NvKmsDpyAttributeColorBpcValue *pColorBpc, - enum NvKmsDpyAttributeColorRangeValue *pColorRange); + NVDpyAttributeColor *pDpyColor); NvBool nvDPValidateModeEvo(NVDpyEvoPtr pDpyEvo, NVHwModeTimingsEvoPtr pTimings, - enum NvKmsDpyAttributeCurrentColorSpaceValue *pColorSpace, - enum NvKmsDpyAttributeColorBpcValue *pColorBpc, + NVDpyAttributeColor *pDpyColor, const NvBool b2Heads1Or, NVDscInfoEvoRec *pDscInfo, const struct NvKmsModeValidationParams *pParams); @@ -257,8 +256,7 @@ NvBool nvChooseColorRangeEvo( NvBool nvChooseCurrentColorSpaceAndRangeEvo( const NVDpyEvoRec *pDpyEvo, - const NVHwModeTimingsEvo *pHwTimings, - NvU8 hdmiFrlBpc, + const enum NvYuv420Mode yuv420Mode, enum NvKmsOutputColorimetry colorimetry, const enum NvKmsDpyAttributeRequestedColorSpaceValue requestedColorSpace, const enum NvKmsDpyAttributeColorRangeValue requestedColorRange, @@ -269,13 +267,13 @@ NvBool nvChooseCurrentColorSpaceAndRangeEvo( void nvUpdateCurrentHardwareColorSpaceAndRangeEvo( NVDispEvoPtr pDispEvo, const NvU32 head, - const enum NvKmsOutputColorimetry colorimetry, - const enum NvKmsDpyAttributeCurrentColorSpaceValue colorSpace, - const enum NvKmsDpyAttributeColorRangeValue colorRange, + const NVDpyAttributeColor *pDpyColor, NVEvoUpdateState *pUpdateState); -NvBool nvAssignSOREvo(const NVDispEvoRec *pDispEvo, const NvU32 displayId, - const NvBool b2Heads1Or, const NvU32 sorExcludeMask); +NvBool nvAssignSOREvo(const NVConnectorEvoRec *pConnectorEvo, + const NvU32 targetDisplayId, + const NvBool b2Heads1Or, + const NvU32 sorExcludeMask); void nvSetSwapBarrierNotifyEvo(NVDispEvoPtr pDispEvo, NvBool enable, NvBool isPre); @@ -343,17 +341,14 @@ NvBool nvNeedsTmoLut(NVDevEvoPtr pDevEvo, NvBool nvIsCscMatrixIdentity(const struct NvKmsCscMatrix *matrix); -enum nvKmsPixelDepth nvEvoColorSpaceBpcToPixelDepth( - const enum NvKmsDpyAttributeCurrentColorSpaceValue colorSpace, - const enum NvKmsDpyAttributeColorBpcValue colorBpc); +enum nvKmsPixelDepth nvEvoDpyColorToPixelDepth( + const NVDpyAttributeColor *pDpyColor); void nvSuspendDevEvo(NVDevEvoRec *pDevEvo); NvBool nvResumeDevEvo(NVDevEvoRec *pDevEvo); -NvBool nvGetDefaultColorSpace( - const NVColorFormatInfoRec *pColorFormatsInfo, - enum NvKmsDpyAttributeCurrentColorSpaceValue *pColorSpace, - enum NvKmsDpyAttributeColorBpcValue *pColorBpc); +NvBool nvGetDefaultDpyColor(const NVColorFormatInfoRec *pColorFormatsInfo, + NVDpyAttributeColor *pDpyColor); static inline void nvEvoSetFlipOccurredEvent(const NVDispEvoRec *pDispEvo, const NvU32 head, diff --git a/src/nvidia-modeset/include/nvkms-evo3.h b/src/nvidia-modeset/include/nvkms-evo3.h index 974cfd8983..2f450e7603 100644 --- a/src/nvidia-modeset/include/nvkms-evo3.h +++ b/src/nvidia-modeset/include/nvkms-evo3.h @@ -29,6 +29,8 @@ #include "nvkms-softfloat.h" #include // NVC57D_CORE_CHANNEL_DMA +#include + #define NV_EVO3_X_EMULATED_SURFACE_MEMORY_FORMATS_C6 \ (NVBIT64(NvKmsSurfaceMemoryFormatRF16GF16BF16XF16) | \ NVBIT64(NvKmsSurfaceMemoryFormatX2B10G10R10)) @@ -106,6 +108,15 @@ void nvEvoUpdateC3(NVDevEvoPtr pDevEvo, const NVEvoUpdateState *updateState, NvBool releaseElv); +NvBool +nvEvoSetCtrlIsModePossibleParams3(NVDispEvoPtr pDispEvo, + const NVEvoIsModePossibleDispInput *pInput, + NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS *pImp); +void +nvEvoSetIsModePossibleDispOutput3(const NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS *pImp, + const NvBool result, + NVEvoIsModePossibleDispOutput *pOutput); + void nvEvoIsModePossibleC3(NVDispEvoPtr pDispEvo, const NVEvoIsModePossibleDispInput *pInput, diff --git a/src/nvidia-modeset/include/nvkms-flip-workarea.h b/src/nvidia-modeset/include/nvkms-flip-workarea.h index 2899192b76..1833ba103c 100644 --- a/src/nvidia-modeset/include/nvkms-flip-workarea.h +++ b/src/nvidia-modeset/include/nvkms-flip-workarea.h @@ -29,12 +29,9 @@ typedef struct { struct { enum NvKmsOutputTf tf; - enum NvKmsOutputColorimetry colorimetry; + NVDpyAttributeColor dpyColor; NvBool infoFrameOverride; NvU32 staticMetadataLayerMask; - enum NvKmsDpyAttributeCurrentColorSpaceValue colorSpace; - enum NvKmsDpyAttributeColorBpcValue colorBpc; - enum NvKmsDpyAttributeColorRangeValue colorRange; } hdr; struct NvKmsPoint viewPortPointIn; diff --git a/src/nvidia-modeset/include/nvkms-hdmi.h b/src/nvidia-modeset/include/nvkms-hdmi.h index 2cd8303fcf..ec427b0f23 100644 --- a/src/nvidia-modeset/include/nvkms-hdmi.h +++ b/src/nvidia-modeset/include/nvkms-hdmi.h @@ -32,7 +32,7 @@ extern "C" { void nvUpdateHdmiInfoFrames(const NVDispEvoRec *pDispEvo, const NvU32 head, - const NVAttributesSetEvoRec *pAttributesSet, + const NVDpyAttributeColor *pDpyColor, const NVDispHeadInfoFrameStateEvoRec *pInfoFrameState, NVDpyEvoRec *pDpyEvo); @@ -64,10 +64,10 @@ NvBool nvHdmiDpySupportsFrl(const NVDpyEvoRec *pDpyEvo); NvBool nvHdmiFrlQueryConfig(const NVDpyEvoRec *pDpyEvo, const NvModeTimings *pModeTimings, const NVHwModeTimingsEvo *pHwTimings, + NVDpyAttributeColor *pDpyColor, const NvBool b2Heads1Or, const struct NvKmsModeValidationParams *pValidationParams, HDMI_FRL_CONFIG *pConfig, - NvU8 *pHdmiFrlBpc, NVDscInfoEvoRec *pDscInfo); void nvHdmiFrlClearConfig(NVDispEvoRec *pDispEvo, NvU32 activeRmId); void nvHdmiFrlSetConfig(NVDispEvoRec *pDispEvo, NvU32 head); @@ -76,9 +76,9 @@ void nvHdmiDpConstructHeadAudioState(const NvU32 displayId, const NVDpyEvoRec *pDpyEvo, NVDispHeadAudioStateEvoRec *pAudioState); -NvBool nvHdmiTimingsNeedFrl(const NVDpyEvoRec *pDpyEvo, - const NVHwModeTimingsEvo *pHwTimings, - NvU8 bpc); +NvU32 nvHdmiGetEffectivePixelClockKHz(const NVDpyEvoRec *pDpyEvo, + const NVHwModeTimingsEvo *pHwTimings, + const NVDpyAttributeColor *pDpyColor); static inline NvBool nvHdmiDpySupportsDsc(const NVDpyEvoRec *pDpyEvo) { diff --git a/src/nvidia-modeset/include/nvkms-modepool.h b/src/nvidia-modeset/include/nvkms-modepool.h index f3ce047f33..18e779eee6 100644 --- a/src/nvidia-modeset/include/nvkms-modepool.h +++ b/src/nvidia-modeset/include/nvkms-modepool.h @@ -49,6 +49,7 @@ NvBool nvValidateModeForModeset(NVDpyEvoRec *pDpyEvo, const struct NvKmsMode *pKmsMode, const struct NvKmsSize *pViewPortSizeIn, const struct NvKmsRect *pViewPortOut, + NVDpyAttributeColor *pDpyColor, NVHwModeTimingsEvo *pTimingsEvo, NVT_VIDEO_INFOFRAME_CTRL *pInfoFrameCtrl); diff --git a/src/nvidia-modeset/include/nvkms-modeset-types.h b/src/nvidia-modeset/include/nvkms-modeset-types.h index 782c1c74f3..da2d85e117 100644 --- a/src/nvidia-modeset/include/nvkms-modeset-types.h +++ b/src/nvidia-modeset/include/nvkms-modeset-types.h @@ -41,7 +41,6 @@ typedef struct { NVDscInfoEvoRec dscInfo; NVDispHeadInfoFrameStateEvoRec infoFrame; enum NvKmsOutputTf tf; - enum NvKmsOutputColorimetry colorimetry; NvBool hdrInfoFrameOverride; NvU32 hdrStaticMetadataLayerMask; NvBool colorSpaceSpecified : 1; @@ -55,7 +54,6 @@ typedef struct { NVHwModeTimingsEvo timings; NVConnectorEvoRec *pConnectorEvo; HDMI_FRL_CONFIG hdmiFrlConfig; - NvU8 hdmiFrlBpc; NVDPLibModesetStatePtr pDpLibModesetState; NVDispHeadAudioStateEvoRec audio; } NVProposedModeSetHwStateOneHead; diff --git a/src/nvidia-modeset/include/nvkms-modeset.h b/src/nvidia-modeset/include/nvkms-modeset.h index 2fd91f4997..16656e7b46 100644 --- a/src/nvidia-modeset/include/nvkms-modeset.h +++ b/src/nvidia-modeset/include/nvkms-modeset.h @@ -33,8 +33,10 @@ extern "C" { NvBool nvGetHwModeTimings(const NVDispEvoRec *pDispEvo, + const NvU32 apiHead, const struct NvKmsSetModeOneHeadRequest *pRequestHead, NVHwModeTimingsEvo *pTimings, + NVDpyAttributeColor *pDpyColor, NVT_VIDEO_INFOFRAME_CTRL *pInfoFrameCtrl); NvBool nvGetAllowHeadSurfaceInNvKms(const NVDevEvoRec *pDevEvo, diff --git a/src/nvidia-modeset/include/nvkms-surface.h b/src/nvidia-modeset/include/nvkms-surface.h index 6de358f67d..d03eece204 100644 --- a/src/nvidia-modeset/include/nvkms-surface.h +++ b/src/nvidia-modeset/include/nvkms-surface.h @@ -64,6 +64,11 @@ NVSurfaceEvoPtr nvEvoGetSurfaceFromHandleNoDispHWAccessOk( const NVEvoApiHandlesRec *pOpenDevSurfaceHandles, NvKmsSurfaceHandle surfaceHandle); +NVSurfaceEvoPtr nvEvoGetSurfaceFromHandleNoHWAccess( + const NVDevEvoRec *pDevEvo, + const NVEvoApiHandlesRec *pOpenDevSurfaceHandles, + NvKmsSurfaceHandle surfaceHandle); + NVDeferredRequestFifoRec *nvEvoRegisterDeferredRequestFifo( NVDevEvoPtr pDevEvo, NVSurfaceEvoPtr pSurfaceEvo); @@ -75,7 +80,7 @@ void nvEvoUnregisterDeferredRequestFifo( NVVblankSemControl *nvEvoEnableVblankSemControl( NVDevEvoRec *pDevEvo, NVDispEvoRec *pDispEvo, - NvU32 hwHead, + NvU32 apiHeadMask, NVSurfaceEvoRec *pSurfaceEvo, NvU64 surfaceOffset); diff --git a/src/nvidia-modeset/include/nvkms-types.h b/src/nvidia-modeset/include/nvkms-types.h index 1b190176cb..e81eabbffd 100644 --- a/src/nvidia-modeset/include/nvkms-types.h +++ b/src/nvidia-modeset/include/nvkms-types.h @@ -178,7 +178,9 @@ typedef struct _NVEvoApiHandlesRec { typedef struct _NVSurfaceDescriptor { NvU32 ctxDmaHandle; - NvU64 iovaAddress; + NvU32 memAperture; + NvU64 memOffset; + NvBool bValid; } NVSurfaceDescriptor; typedef struct _NVEvoDma @@ -705,8 +707,6 @@ typedef struct { struct NvKmsHDRStaticMetadata staticMetadata; } hdrInfoFrame; - enum NvKmsOutputColorimetry colorimetry; - NvBool skipLayerPendingFlips[NVKMS_MAX_LAYERS_PER_HEAD]; struct { @@ -715,7 +715,6 @@ typedef struct { NvBool cursorPosition : 1; NvBool tf : 1; NvBool hdrStaticMetadata : 1; - NvBool colorimetry : 1; NvBool layerPosition[NVKMS_MAX_LAYERS_PER_HEAD]; NvBool layerSyncObjects[NVKMS_MAX_LAYERS_PER_HEAD]; @@ -1661,14 +1660,7 @@ typedef struct _NVDpyAttributeCurrentDitheringConfigRec { enum NvKmsDpyAttributeCurrentDitheringModeValue mode; } NVDpyAttributeCurrentDitheringConfig; -typedef struct __NVAttributesSetEvoRec { - -#define NV_EVO_DVC_MIN (-1024) -#define NV_EVO_DVC_MAX 1023 -#define NV_EVO_DVC_DEFAULT 0 - - NvS32 dvc; - +typedef struct __NVDpyAttributeColorRec { /* * For both colorSpace and colorRange, the value for * NV_KMS_DPY_ATTRIBUTE_REQUESTED_COLOR_{SPACE,RANGE} sent by the client is @@ -1685,10 +1677,26 @@ typedef struct __NVAttributesSetEvoRec { * * For SW YUV420 mode, these values are ignored in * HEAD_SET_PROCAMP and applied in the headSurface composite shader. + * + * XXX Rename NvKmsDpyAttributeCurrentColorSpaceValue to + * NvKmsDpyAttributeCurrentFormatValue. */ - enum NvKmsDpyAttributeCurrentColorSpaceValue colorSpace; - enum NvKmsDpyAttributeColorBpcValue colorBpc; - enum NvKmsDpyAttributeColorRangeValue colorRange; + enum NvKmsDpyAttributeCurrentColorSpaceValue format; + enum NvKmsDpyAttributeColorBpcValue bpc; + enum NvKmsDpyAttributeColorRangeValue range; + + enum NvKmsOutputColorimetry colorimetry; +} NVDpyAttributeColor; + +typedef struct __NVAttributesSetEvoRec { + +#define NV_EVO_DVC_MIN (-1024) +#define NV_EVO_DVC_MAX 1023 +#define NV_EVO_DVC_DEFAULT 0 + + NvS32 dvc; + + NVDpyAttributeColor color; NVDpyAttributeCurrentDitheringConfig dithering; @@ -1709,8 +1717,10 @@ typedef struct __NVAttributesSetEvoRec { #define NV_EVO_DEFAULT_ATTRIBUTES_SET \ (NVAttributesSetEvoRec) { \ .dvc = NV_EVO_DVC_DEFAULT, \ - .colorSpace = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB, \ - .colorRange = NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_FULL, \ + .color = { \ + .format = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB, \ + .range = NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_FULL, \ + }, \ .dithering = { \ .enabled = FALSE, \ .mode = NV_KMS_DPY_ATTRIBUTE_CURRENT_DITHERING_MODE_NONE, \ @@ -1801,7 +1811,6 @@ typedef struct _NVDispHeadStateEvoRec { NVConnectorEvoRec *pConnectorEvo; /* NULL if the head is not active */ HDMI_FRL_CONFIG hdmiFrlConfig; - NvU8 hdmiFrlBpc; NVDscInfoEvoRec dscInfo; @@ -1811,8 +1820,6 @@ typedef struct _NVDispHeadStateEvoRec { enum NvKmsOutputTf tf; - enum NvKmsOutputColorimetry colorimetry; - struct { NvBool enabled; enum NvKmsInfoFrameEOTF eotf; @@ -1869,8 +1876,6 @@ typedef struct _NVDispApiHeadStateEvoRec { enum NvKmsOutputTf tf; - enum NvKmsOutputColorimetry colorimetry; - NvBool hdrInfoFrameOverride; NvU32 hdrStaticMetadataLayerMask; @@ -3059,36 +3064,43 @@ typedef const struct _nv_evo_hal { NVEvoChannelPtr pChannel, NVSurfaceDescriptor *pSurfaceDesc); - void (*SetTmoLutSurfaceAddress) (NVEvoChannelPtr pChannel, + void (*SetTmoLutSurfaceAddress) (const NVDevEvoRec *pDevEvo, + NVEvoChannelPtr pChannel, const NVSurfaceDescriptor *pSurfaceDesc, NvU32 offset); - void (*SetILUTSurfaceAddress) (NVEvoChannelPtr pChannel, + void (*SetILUTSurfaceAddress) (const NVDevEvoRec *pDevEvo, + NVEvoChannelPtr pChannel, const NVSurfaceDescriptor *pSurfaceDesc, NvU32 offset); - void (*SetISOSurfaceAddress) (NVEvoChannelPtr pChannel, + void (*SetISOSurfaceAddress) (const NVDevEvoRec *pDevEvo, + NVEvoChannelPtr pChannel, const NVSurfaceDescriptor *pSurfaceDesc, NvU32 offset, NvU32 ctxDmaIdx, NvBool isBlocklinear); - void (*SetCoreNotifierSurfaceAddressAndControl) (NVEvoChannelPtr pChannel, + void (*SetCoreNotifierSurfaceAddressAndControl) (const NVDevEvoRec *pDevEvo, + NVEvoChannelPtr pChannel, const NVSurfaceDescriptor *pSurfaceDesc, NvU32 notifierOffset, NvU32 ctrlVal); - void (*SetWinNotifierSurfaceAddressAndControl) (NVEvoChannelPtr pChannel, + void (*SetWinNotifierSurfaceAddressAndControl) (const NVDevEvoRec *pDevEvo, + NVEvoChannelPtr pChannel, const NVSurfaceDescriptor *pSurfaceDesc, NvU32 notifierOffset, NvU32 ctrlVal); - void (*SetSemaphoreSurfaceAddressAndControl) (NVEvoChannelPtr pChannel, + void (*SetSemaphoreSurfaceAddressAndControl) (const NVDevEvoRec *pDevEvo, + NVEvoChannelPtr pChannel, const NVSurfaceDescriptor *pSurfaceDesc, NvU32 semaphoreOffset, NvU32 ctrlVal); - void (*SetAcqSemaphoreSurfaceAddressAndControl) (NVEvoChannelPtr pChannel, + void (*SetAcqSemaphoreSurfaceAddressAndControl) (const NVDevEvoRec *pDevEvo, + NVEvoChannelPtr pChannel, const NVSurfaceDescriptor *pSurfaceDesc, NvU32 semaphoreOffset, NvU32 ctrlVal); @@ -3111,6 +3123,7 @@ typedef const struct _nv_evo_hal { NvU32 requiresScalingTapsInBothDimensions :1; NvU32 supportsMergeMode :1; NvU32 supportsHDMI10BPC :1; + NvU32 supportsDPAudio192KHz :1; NvU32 supportedDitheringModes; size_t impStructSize; @@ -3172,7 +3185,7 @@ static inline void nvAssignHwHeadsMaskApiHeadState( typedef struct _NVVblankSemControl { NvU32 dispIndex; - NvU32 hwHead; + NvU32 hwHeadMask; NvU64 surfaceOffset; NVSurfaceEvoRec *pSurfaceEvo; } NVVblankSemControl; diff --git a/src/nvidia-modeset/interface/nvkms-api.h b/src/nvidia-modeset/interface/nvkms-api.h index 8a776db3ce..a73a596607 100644 --- a/src/nvidia-modeset/interface/nvkms-api.h +++ b/src/nvidia-modeset/interface/nvkms-api.h @@ -1599,6 +1599,12 @@ struct NvKmsValidateModeIndexReply { * NvKmsSetModeOneHeadReply. */ struct NvKmsUsageBounds modeUsage; + + /* + * Whether this mode supports stereo mode hdmi3D, but wasn't + * requested. + */ + NvBool hdmi3DAvailable; }; struct NvKmsValidateModeIndexParams { @@ -4092,7 +4098,7 @@ struct NvKmsSetFlipLockGroupParams { * NVKMS_IOCTL_DISABLE_VBLANK_SEM_CONTROL * NVKMS_IOCTL_ACCEL_VBLANK_SEM_CONTROLS * - * Enable or disable vblank semaphore control for the given head using the + * Enable or disable vblank semaphore control for the given heads using the * specified surface and surface offset. The memory at that location is * interpreted as an NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA. See the * RMAPI documentation for NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA for @@ -4118,7 +4124,7 @@ struct NvKmsSetFlipLockGroupParams { struct NvKmsEnableVblankSemControlRequest { NvKmsDeviceHandle deviceHandle; NvKmsDispHandle dispHandle; - NvU32 head; + NvU32 headMask; NvKmsSurfaceHandle surfaceHandle; NvU64 surfaceOffset NV_ALIGN_BYTES(8); }; diff --git a/src/nvidia-modeset/interface/nvkms-modetimings.h b/src/nvidia-modeset/interface/nvkms-modetimings.h new file mode 100644 index 0000000000..e4db871ce5 --- /dev/null +++ b/src/nvidia-modeset/interface/nvkms-modetimings.h @@ -0,0 +1,61 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#if !defined(NVKMS_MODETIMINGS_H) +#define NVKMS_MODETIMINGS_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" +#include "nv_mode_timings.h" + +/* + * For Kepler HW HDMI 1.4 frame packed stereo, HW combines two flips + * into a single top-down double-height frame, and it needs a + * doubled refresh rate to accommodate this. + */ +static inline void nvKmsUpdateNvModeTimingsForHdmi3D(NvModeTimings *pModeTimings, + NvBool hdmi3D) +{ + if (pModeTimings->hdmi3D == hdmi3D) { + return; + } + + if (hdmi3D) { + pModeTimings->pixelClockHz *= 2; + pModeTimings->RRx1k *= 2; + } else { + pModeTimings->pixelClockHz /= 2; + pModeTimings->RRx1k /= 2; + } + + pModeTimings->hdmi3D = hdmi3D; +} + +#ifdef __cplusplus +}; +#endif + +#endif /* NVKMS_MODETIMINGS_H */ diff --git a/src/nvidia-modeset/kapi/include/nvkms-kapi-internal.h b/src/nvidia-modeset/kapi/include/nvkms-kapi-internal.h index 91b9e9fc2a..cbda5cae8c 100644 --- a/src/nvidia-modeset/kapi/include/nvkms-kapi-internal.h +++ b/src/nvidia-modeset/kapi/include/nvkms-kapi-internal.h @@ -25,6 +25,8 @@ #define __NVKMS_KAPI_INTERNAL_H__ + + #include "unix_rm_handle.h" #include "nvkms-utils.h" diff --git a/src/nvidia-modeset/kapi/src/nvkms-kapi.c b/src/nvidia-modeset/kapi/src/nvkms-kapi.c index d7d5a761e8..7555246788 100644 --- a/src/nvidia-modeset/kapi/src/nvkms-kapi.c +++ b/src/nvidia-modeset/kapi/src/nvkms-kapi.c @@ -52,7 +52,6 @@ #include "ctrl/ctrl003e.h" /* NV003E_CTRL_CMD_GET_SURFACE_PHYS_PAGES */ #include "ctrl/ctrl0041.h" /* NV0041_CTRL_SURFACE_INFO */ - ct_assert(NVKMS_KAPI_LAYER_PRIMARY_IDX == NVKMS_MAIN_LAYER); ct_assert(NVKMS_KAPI_LAYER_MAX == NVKMS_MAX_LAYERS_PER_HEAD); @@ -74,6 +73,7 @@ static NvU32 EnumerateGpus(nv_gpu_info_t *gpuInfo) */ static void RmFreeDevice(struct NvKmsKapiDevice *device) { + if (device->hRmSubDevice != 0x0) { nvRmApiFree(device->hRmClient, device->hRmDevice, @@ -3010,9 +3010,9 @@ static NvBool KmsSetMode( goto done; } - status = nvkms_ioctl_from_kapi(device->pKmsOpen, - NVKMS_IOCTL_SET_MODE, - params, sizeof(*params)); + status = nvkms_ioctl_from_kapi_try_pmlock(device->pKmsOpen, + NVKMS_IOCTL_SET_MODE, + params, sizeof(*params)); replyConfig->flipResult = (params->reply.status == NVKMS_SET_MODE_STATUS_SUCCESS) ? @@ -3198,9 +3198,9 @@ static NvBool KmsFlip( goto done; } - status = nvkms_ioctl_from_kapi(device->pKmsOpen, - NVKMS_IOCTL_FLIP, - params, sizeof(*params)); + status = nvkms_ioctl_from_kapi_try_pmlock(device->pKmsOpen, + NVKMS_IOCTL_FLIP, + params, sizeof(*params)); replyConfig->flipResult = params->reply.flipResult; diff --git a/src/nvidia-modeset/os-interface/include/nvidia-modeset-os-interface.h b/src/nvidia-modeset/os-interface/include/nvidia-modeset-os-interface.h index af8d501417..82309a8d6b 100644 --- a/src/nvidia-modeset/os-interface/include/nvidia-modeset-os-interface.h +++ b/src/nvidia-modeset/os-interface/include/nvidia-modeset-os-interface.h @@ -304,6 +304,11 @@ NvU32 nvkms_enumerate_gpus(nv_gpu_info_t *gpu_info); NvBool nvkms_allow_write_combining(void); +/*! + * Check if OS supports syncpoints. + */ +NvBool nvkms_kernel_supports_syncpts(void); + /*! * Checks whether the fd is associated with an nvidia character device. */ @@ -328,6 +333,16 @@ NvBool nvkms_ioctl_from_kapi NvU32 cmd, void *params_address, const size_t params_size ); +/*! + * Like nvkms_ioctl_from_kapi, but return NV_FALSE instead of waiting if the + * power management read lock cannot be acquired. + */ +NvBool nvkms_ioctl_from_kapi_try_pmlock +( + struct nvkms_per_open *popen, + NvU32 cmd, void *params_address, const size_t params_size +); + /*! * APIs for locking. */ diff --git a/src/nvidia-modeset/src/dp/nvdp-connector-event-sink.hpp b/src/nvidia-modeset/src/dp/nvdp-connector-event-sink.hpp index 167c2e898c..7a0c6b8559 100644 --- a/src/nvidia-modeset/src/dp/nvdp-connector-event-sink.hpp +++ b/src/nvidia-modeset/src/dp/nvdp-connector-event-sink.hpp @@ -83,6 +83,11 @@ struct _nv_dplibconnector { // Connector::resume() and gets updated by // Connector::notifyLongPulse(). NvBool plugged; + + // Indicates whether the HDMI/DVI half of the connector is active + // If so link is being driven by HDMI/DVI and avoid LT etc on DP + // link of the connector + NvBool linkHandoffEnabled; }; struct _nv_dplibdevice { diff --git a/src/nvidia-modeset/src/dp/nvdp-connector.cpp b/src/nvidia-modeset/src/dp/nvdp-connector.cpp index a812a14f98..00d05acb11 100644 --- a/src/nvidia-modeset/src/dp/nvdp-connector.cpp +++ b/src/nvidia-modeset/src/dp/nvdp-connector.cpp @@ -109,10 +109,11 @@ void nvDPNotifyLongPulse(NVConnectorEvoPtr pConnectorEvo, pNVDpLibConnector->plugged = connected; - if (connected && !nvAssignSOREvo(pConnectorEvo->pDispEvo, - nvDpyIdToNvU32(pConnectorEvo->displayId), - FALSE /* b2Heads1Or */, - 0 /* sorExcludeMask */)) { + if (!pNVDpLibConnector->linkHandoffEnabled && + connected && !nvAssignSOREvo(pConnectorEvo, + nvDpyIdToNvU32(pConnectorEvo->displayId), + FALSE /* b2Heads1Or */, + 0 /* sorExcludeMask */)) { // DPLib takes care of skipping LT on unassigned SOR Display. } @@ -592,8 +593,7 @@ NvBool nvDPLibIsModePossible(const NVDPLibConnectorRec *pDpLibConnector, NvBool nvDPValidateModeForDpyEvo( const NVDpyEvoRec *pDpyEvo, - const enum NvKmsDpyAttributeCurrentColorSpaceValue colorSpace, - const enum NvKmsDpyAttributeColorBpcValue colorBpc, + const NVDpyAttributeColor *pDpyColor, const struct NvKmsModeValidationParams *pModeValidationParams, const NVHwModeTimingsEvo *pTimings, const NvBool b2Heads1Or, @@ -617,8 +617,8 @@ NvBool nvDPValidateModeForDpyEvo( pParams->head[head].displayId = 0; pParams->head[head].dpyIdList = nvAddDpyIdToEmptyDpyIdList(pDpyEvo->id); - pParams->head[head].colorSpace = colorSpace; - pParams->head[head].colorBpc = colorBpc; + pParams->head[head].colorSpace = pDpyColor->format; + pParams->head[head].colorBpc = pDpyColor->bpc; pParams->head[head].pModeValidationParams = pModeValidationParams; pParams->head[head].pTimings = pTimings; pParams->head[head].b2Heads1Or = b2Heads1Or; @@ -863,16 +863,18 @@ static NvU32 GetFirmwareHead(NVConnectorEvoPtr pConnectorEvo) /*! * Determine whether an active connector shares an OR with this connector. */ -static bool ConnectorIsSharedWithActiveOR(NVConnectorEvoPtr pConnectorEvo) +static bool IsDDCPartnerActive(NVDPLibConnectorPtr pNVDpLibConnector) { + NVConnectorEvoRec *pConnectorEvo = + pNVDpLibConnector->pConnectorEvo; NVDispEvoPtr pDispEvo = pConnectorEvo->pDispEvo; NVConnectorEvoPtr pOtherConnectorEvo; FOR_ALL_EVO_CONNECTORS(pOtherConnectorEvo, pDispEvo) { if (pOtherConnectorEvo != pConnectorEvo && nvIsConnectorActiveEvo(pOtherConnectorEvo) && - (pOtherConnectorEvo->or.primary == pConnectorEvo->or.primary)) { - nvAssert(pOtherConnectorEvo->or.primary != NV_INVALID_OR); + nvDpyIdIsInDpyIdList(pOtherConnectorEvo->displayId, + pConnectorEvo->ddcPartnerDpyIdsList)) { return true; } } @@ -887,11 +889,13 @@ NvBool nvDPResume(NVDPLibConnectorPtr pNVDpLibConnector, NvBool plugged) NVDispEvoPtr pDispEvo = pConnectorEvo->pDispEvo; DisplayPort::Connector *c = pNVDpLibConnector->connector; const unsigned int firmwareHead = GetFirmwareHead(pConnectorEvo); - const bool firmwareLinkHandsOff = ConnectorIsSharedWithActiveOR(pConnectorEvo); bool dpyIdIsDynamic = false; /* By default allow MST */ bool allowMST = true; + pNVDpLibConnector->linkHandoffEnabled = + IsDDCPartnerActive(pNVDpLibConnector); + if (firmwareHead != NV_INVALID_HEAD) { NVDpyId firmwareDpyId = nvInvalidDpyId(); @@ -920,7 +924,7 @@ NvBool nvDPResume(NVDPLibConnectorPtr pNVDpLibConnector, NvBool plugged) pNVDpLibConnector->plugged = plugged; if (plugged && !pNVDpLibConnector->headInFirmware) { - NvBool ret = nvAssignSOREvo(pDispEvo, + NvBool ret = nvAssignSOREvo(pConnectorEvo, nvDpyIdToNvU32(pConnectorEvo->displayId), FALSE /* b2Heads1Or */, 0 /* sorExcludeMask */); @@ -931,7 +935,7 @@ NvBool nvDPResume(NVDPLibConnectorPtr pNVDpLibConnector, NvBool plugged) } } - c->resume(firmwareLinkHandsOff, + c->resume(pNVDpLibConnector->linkHandoffEnabled, pNVDpLibConnector->headInFirmware, plugged, false /* isUefiSystem */, @@ -1093,3 +1097,14 @@ enum NVDpLinkMode nvDPGetActiveLinkMode(NVDPLibConnectorPtr pDpLibConnector) return linkConfig.multistream ? NV_DP_LINK_MODE_MST : NV_DP_LINK_MODE_SST; } + +void nvDPSetLinkHandoff(NVDPLibConnectorPtr pDpLibConnector, NvBool enable) +{ + if (enable) { + pDpLibConnector->connector->enableLinkHandsOff(); + pDpLibConnector->linkHandoffEnabled = TRUE; + } else { + pDpLibConnector->linkHandoffEnabled = FALSE; + pDpLibConnector->connector->releaseLinkHandsOff(); + } +} diff --git a/src/nvidia-modeset/src/dp/nvdp-evo-interface.cpp b/src/nvidia-modeset/src/dp/nvdp-evo-interface.cpp index d4fa13503f..fa7e823b73 100644 --- a/src/nvidia-modeset/src/dp/nvdp-evo-interface.cpp +++ b/src/nvidia-modeset/src/dp/nvdp-evo-interface.cpp @@ -29,6 +29,8 @@ #include "nvkms-rmapi.h" +#include "nvdp-connector-event-sink.hpp" + namespace nvkmsDisplayPort { EvoInterface::EvoInterface(NVConnectorEvoPtr pConnectorEvo) @@ -110,7 +112,15 @@ NvU32 EvoInterface::getDisplayId() NvU32 EvoInterface::getSorIndex() { - return pConnectorEvo->or.primary; + if (pConnectorEvo->pDpLibConnector) { + if (pConnectorEvo->pDpLibConnector->linkHandoffEnabled) { + return DP_INVALID_SOR_INDEX; + } else { + return pConnectorEvo->or.primary; + } + } else { + return pConnectorEvo->or.primary; + } } NvU32 EvoInterface::getLinkIndex() diff --git a/src/nvidia-modeset/src/dp/nvdp-host.cpp b/src/nvidia-modeset/src/dp/nvdp-host.cpp index 371483f0bd..9cc6614799 100644 --- a/src/nvidia-modeset/src/dp/nvdp-host.cpp +++ b/src/nvidia-modeset/src/dp/nvdp-host.cpp @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2008-2018 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2008-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -28,6 +28,7 @@ #include "nvkms-utils.h" #include "dp_hostimp.h" +#include "dp_printf.h" void *dpMalloc(NvLength sz) { @@ -39,6 +40,12 @@ void dpFree(void *p) nvFree(p); } +static NVEvoLogType dpSeverityToNvkmsMap(DP_LOG_LEVEL severity) +{ + NVEvoLogType level = EVO_LOG_INFO; + return level; +} + void dpPrint(const char *format, ...) { va_list ap; @@ -47,6 +54,16 @@ void dpPrint(const char *format, ...) va_end(ap); } +void dpPrintf(DP_LOG_LEVEL severity, const char *format, ...) +{ + if (severity == DP_SILENT) return; + + va_list ap; + va_start(ap, format); + nvVEvoLog(dpSeverityToNvkmsMap(severity), NV_INVALID_GPU_LOG_INDEX, format, ap); + va_end(ap); +} + void dpDebugBreakpoint(void) { nvAssert(!"DisplayPort library debug breakpoint"); diff --git a/src/nvidia-modeset/src/nvkms-attributes.c b/src/nvidia-modeset/src/nvkms-attributes.c index d27d488a66..c50f03fd9e 100644 --- a/src/nvidia-modeset/src/nvkms-attributes.c +++ b/src/nvidia-modeset/src/nvkms-attributes.c @@ -232,7 +232,7 @@ static void SetDitheringCommon(NVDpyEvoPtr pDpyEvo) (nvDpyIdIsInDpyIdList(pDpyEvo->id, pApiHeadState->activeDpys))); nvChooseDitheringEvo(pConnectorEvo, - pApiHeadState->attributes.colorBpc, + pApiHeadState->attributes.color.bpc, &pDpyEvo->requestedDithering, &pApiHeadState->attributes.dithering); @@ -610,11 +610,7 @@ static void DpyPostColorSpaceOrRangeSetEvo(NVDpyEvoPtr pDpyEvo) NVEvoUpdateState updateState = { }; NVDispEvoRec *pDispEvo = pDpyEvo->pDispEvo; NVDispApiHeadStateEvoRec *pApiHeadState; - NvU8 hdmiFrlBpc; NvU32 head; -#if defined(DEBUG) - NvU32 hwHead; -#endif if (pDpyEvo->apiHead == NV_INVALID_HEAD) { return; @@ -624,23 +620,13 @@ static void DpyPostColorSpaceOrRangeSetEvo(NVDpyEvoPtr pDpyEvo) nvAssert((pApiHeadState->hwHeadsMask) != 0x0 && (nvDpyIdIsInDpyIdList(pDpyEvo->id, pApiHeadState->activeDpys))); - head = nvGetPrimaryHwHead(pDispEvo, pDpyEvo->apiHead); - hdmiFrlBpc = pDispEvo->headState[head].hdmiFrlBpc; -#if defined(DEBUG) - FOR_EACH_EVO_HW_HEAD_IN_MASK(pApiHeadState->hwHeadsMask, hwHead) { - nvAssert(pDispEvo->headState[head].timings.yuv420Mode == - pDispEvo->headState[hwHead].timings.yuv420Mode); - } -#endif - /* * Choose current colorSpace and colorRange based on the current mode * timings and the requested color space and range. */ if (!nvChooseCurrentColorSpaceAndRangeEvo(pDpyEvo, - &pDispEvo->headState[head].timings, - hdmiFrlBpc, - pApiHeadState->colorimetry, + pApiHeadState->timings.yuv420Mode, + pApiHeadState->attributes.color.colorimetry, pDpyEvo->requestedColorSpace, pDpyEvo->requestedColorRange, &colorSpace, @@ -652,26 +638,68 @@ static void DpyPostColorSpaceOrRangeSetEvo(NVDpyEvoPtr pDpyEvo) /* For DP, neither color space nor bpc can be changed without a modeset */ if (nvConnectorUsesDPLib(pDpyEvo->pConnectorEvo) && - ((pApiHeadState->attributes.colorSpace != colorSpace) || - (pApiHeadState->attributes.colorBpc != colorBpc))) { + ((pApiHeadState->attributes.color.format != colorSpace) || + (pApiHeadState->attributes.color.bpc != colorBpc))) { return; } - pApiHeadState->attributes.colorSpace = colorSpace; - pApiHeadState->attributes.colorRange = colorRange; - pApiHeadState->attributes.colorBpc = colorBpc; + /* + * Hardware does not support HDMI FRL with YUV422, and it is not possible + * to downgrade current color bpc on HDMI FRL at this point. + */ + if ((pApiHeadState->timings.protocol == NVKMS_PROTOCOL_SOR_HDMI_FRL) && + ((colorSpace == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr422) || + (pApiHeadState->attributes.color.bpc > colorBpc))) { + return; + } + + if (nvDpyIsHdmiEvo(pDpyEvo) && + (colorBpc > pApiHeadState->attributes.color.bpc)) { + NVDpyAttributeColor tmpDpyColor = pApiHeadState->attributes.color; + + tmpDpyColor.format = colorSpace; + tmpDpyColor.range = colorRange; + tmpDpyColor.bpc = colorBpc; + + /* + * For HDMI FRL, downgrade the selected color bpc to the current color + * bpc so that the current color bpc remains unchanged. + */ + if (pApiHeadState->timings.protocol == NVKMS_PROTOCOL_SOR_HDMI_FRL) { + tmpDpyColor.bpc = pApiHeadState->attributes.color.bpc; + } else { + const NVColorFormatInfoRec colorFormatsInfo = + nvGetColorFormatInfo(pDpyEvo); + + while (nvHdmiGetEffectivePixelClockKHz(pDpyEvo, + &pApiHeadState->timings, + &tmpDpyColor) > + pDpyEvo->maxSingleLinkPixelClockKHz) { + + if(!nvDowngradeColorSpaceAndBpc(&colorFormatsInfo, + &tmpDpyColor)) { + return; + } + } + } + + pApiHeadState->attributes.color.format = tmpDpyColor.format; + pApiHeadState->attributes.color.range = tmpDpyColor.range; + pApiHeadState->attributes.color.bpc = tmpDpyColor.bpc; + } else { + pApiHeadState->attributes.color.format = colorSpace; + pApiHeadState->attributes.color.range = colorRange; + pApiHeadState->attributes.color.bpc = colorBpc; + } /* Update hardware's current colorSpace and colorRange */ FOR_EACH_EVO_HW_HEAD_IN_MASK(pApiHeadState->hwHeadsMask, head) { enum nvKmsPixelDepth newPixelDepth = - nvEvoColorSpaceBpcToPixelDepth(pApiHeadState->attributes.colorSpace, - pApiHeadState->attributes.colorBpc); + nvEvoDpyColorToPixelDepth(&pApiHeadState->attributes.color); nvUpdateCurrentHardwareColorSpaceAndRangeEvo(pDispEvo, head, - pApiHeadState->colorimetry, - pApiHeadState->attributes.colorSpace, - pApiHeadState->attributes.colorRange, + &pApiHeadState->attributes.color, &updateState); if (newPixelDepth != pDispEvo->headState[head].pixelDepth) { @@ -739,7 +767,7 @@ static NvBool GetCurrentColorSpace(const NVDpyEvoRec *pDpyEvo, NvS64 *pValue) return FALSE; } - *pValue = pDpyEvo->currentAttributes.colorSpace; + *pValue = pDpyEvo->currentAttributes.color.format; return TRUE; } @@ -812,7 +840,7 @@ static NvBool GetCurrentColorRange(const NVDpyEvoRec *pDpyEvo, NvS64 *pValue) return FALSE; } - *pValue = pDpyEvo->currentAttributes.colorRange; + *pValue = pDpyEvo->currentAttributes.color.range; return TRUE; } diff --git a/src/nvidia-modeset/src/nvkms-cursor.c b/src/nvidia-modeset/src/nvkms-cursor.c index 316d7d22d9..a2eaf56fcf 100644 --- a/src/nvidia-modeset/src/nvkms-cursor.c +++ b/src/nvidia-modeset/src/nvkms-cursor.c @@ -430,6 +430,7 @@ extern NVEvoCursorHAL nvEvoCursorC3; extern NVEvoCursorHAL nvEvoCursorC5; extern NVEvoCursorHAL nvEvoCursorC6; + enum NvKmsAllocDeviceStatus nvInitDispHalCursorEvo(NVDevEvoPtr pDevEvo) { static const NVEvoCursorHALPtr cursorTable[] = { diff --git a/src/nvidia-modeset/src/nvkms-dpy.c b/src/nvidia-modeset/src/nvkms-dpy.c index d6bd98b486..cca3bbaa9b 100644 --- a/src/nvidia-modeset/src/nvkms-dpy.c +++ b/src/nvidia-modeset/src/nvkms-dpy.c @@ -667,7 +667,6 @@ static void ReadAndApplyEdidEvo( nvFree(pParsedEdid); } - /*! * Get the maximum allowed pixel clock for pDpyEvo. * @@ -768,7 +767,7 @@ void nvDpyProbeMaxPixelClock(NVDpyEvoPtr pDpyEvo) * those driving heads, we don't need to exclude RM from * selecting any SOR, so an sorExcludeMask of 0 is appropriate. */ - if (nvAssignSOREvo(pDispEvo, + if (nvAssignSOREvo(pConnectorEvo, nvDpyIdToNvU32(pConnectorEvo->displayId), FALSE /* b2Heads1Or */, 0 /* sorExcludeMask */) && @@ -2509,7 +2508,7 @@ static void UpdateDpHDRInfoFrame(const NVDispEvoRec *pDispEvo, const NvU32 head) */ static void UpdateDpYUV420InfoFrame(const NVDispEvoRec *pDispEvo, const NvU32 head, - const NVAttributesSetEvoRec *pAttributesSet) + const NVDpyAttributeColor *pDpyColor) { const NVDispHeadStateEvoRec *pHeadState = &pDispEvo->headState[head]; @@ -2520,8 +2519,7 @@ static void UpdateDpYUV420InfoFrame(const NVDispEvoRec *pDispEvo, params.subDeviceInstance = pDispEvo->displayOwner; params.displayId = pHeadState->activeRmId; - if (pAttributesSet->colorSpace == - NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr420) { + if (pDpyColor->format == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr420) { // DPSDP_DP_VSC_SDP_DESCRIPTOR has a (dataSize, hb, db) layout, while // NV0073_CTRL_SPECIFIC_SET_OD_PACKET_PARAMS.aPacket needs to contain @@ -2545,7 +2543,7 @@ static void UpdateDpYUV420InfoFrame(const NVDispEvoRec *pDispEvo, sdp->db.pixEncoding = SDP_VSC_PIX_ENC_YCBCR420; sdp->db.colorimetryFormat = SDP_VSC_COLOR_FMT_YCBCR_COLORIMETRY_ITU_R_BT709; - switch (pAttributesSet->colorBpc) { + switch (pDpyColor->bpc) { case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_10: sdp->db.bitDepth = SDP_VSC_BIT_DEPTH_YCBCR_10BPC; break; @@ -2557,7 +2555,7 @@ static void UpdateDpYUV420InfoFrame(const NVDispEvoRec *pDispEvo, break; } - switch (pAttributesSet->colorRange) { + switch (pDpyColor->range) { case NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_FULL: sdp->db.dynamicRange = SDP_VSC_DYNAMIC_RANGE_VESA; break; @@ -2594,11 +2592,11 @@ static void UpdateDpYUV420InfoFrame(const NVDispEvoRec *pDispEvo, static void UpdateDpInfoFrames(const NVDispEvoRec *pDispEvo, const NvU32 head, - const NVAttributesSetEvoRec *pAttributesSet) + const NVDpyAttributeColor *pDpyColor) { UpdateDpHDRInfoFrame(pDispEvo, head); - UpdateDpYUV420InfoFrame(pDispEvo, head, pAttributesSet); + UpdateDpYUV420InfoFrame(pDispEvo, head, pDpyColor); } void nvCancelSDRTransitionTimer(NVDpyEvoRec *pDpyEvo) @@ -2666,11 +2664,11 @@ void nvUpdateInfoFrames(NVDpyEvoRec *pDpyEvo) pHeadState = &pDispEvo->headState[head]; if (nvConnectorUsesDPLib(pDpyEvo->pConnectorEvo)) { - UpdateDpInfoFrames(pDispEvo, head, &pApiHeadState->attributes); + UpdateDpInfoFrames(pDispEvo, head, &pApiHeadState->attributes.color); } else { nvUpdateHdmiInfoFrames(pDispEvo, head, - &pApiHeadState->attributes, + &pApiHeadState->attributes.color, &pApiHeadState->infoFrame, pDpyEvo); } @@ -3035,20 +3033,20 @@ void nvDpyUpdateCurrentAttributes(NVDpyEvoRec *pDpyEvo) newAttributes.numberOfHardwareHeadsUsed = 0; } - if (newAttributes.colorSpace != - pDpyEvo->currentAttributes.colorSpace) { + if (newAttributes.color.format != + pDpyEvo->currentAttributes.color.format) { nvSendDpyAttributeChangedEventEvo( pDpyEvo, NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE, - newAttributes.colorSpace); + newAttributes.color.format); } - if (newAttributes.colorRange != - pDpyEvo->currentAttributes.colorRange) { + if (newAttributes.color.range != + pDpyEvo->currentAttributes.color.range) { nvSendDpyAttributeChangedEventEvo( pDpyEvo, NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_RANGE, - newAttributes.colorRange); + newAttributes.color.range); } if (newAttributes.dithering.enabled != diff --git a/src/nvidia-modeset/src/nvkms-evo.c b/src/nvidia-modeset/src/nvkms-evo.c index caeaee9576..8362027244 100644 --- a/src/nvidia-modeset/src/nvkms-evo.c +++ b/src/nvidia-modeset/src/nvkms-evo.c @@ -139,11 +139,6 @@ static void ScheduleLutUpdate(NVDispEvoRec *pDispEvo, const NvU32 apiHead, const NvU32 data, const NvU64 usec); -static NvBool DowngradeColorBpc( - const enum NvKmsDpyAttributeCurrentColorSpaceValue colorSpace, - enum NvKmsDpyAttributeColorBpcValue *pColorBpc, - enum NvKmsDpyAttributeColorRangeValue *pColorRange); - NVEvoGlobal nvEvoGlobal = { .clientHandle = 0, .frameLockList = NV_LIST_INIT(&nvEvoGlobal.frameLockList), @@ -2729,7 +2724,7 @@ void nvEnableMidFrameAndDWCFWatermark(NVDevEvoPtr pDevEvo, pUpdateState); } -NvBool nvGetDefaultColorSpace( +static NvBool GetDefaultColorSpace( const NVColorFormatInfoRec *pColorFormatsInfo, enum NvKmsDpyAttributeCurrentColorSpaceValue *pColorSpace, enum NvKmsDpyAttributeColorBpcValue *pColorBpc) @@ -2758,6 +2753,27 @@ NvBool nvGetDefaultColorSpace( return FALSE; } +NvBool nvGetDefaultDpyColor(const NVColorFormatInfoRec *pColorFormatsInfo, + NVDpyAttributeColor *pDpyColor) +{ + nvkms_memset(pDpyColor, 0, sizeof(*pDpyColor)); + + if (!GetDefaultColorSpace(pColorFormatsInfo, &pDpyColor->format, + &pDpyColor->bpc)) { + return FALSE; + } + + if (pDpyColor->format != NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB) { + pDpyColor->range = NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_LIMITED; + } else { + pDpyColor->range = NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_FULL; + } + + pDpyColor->colorimetry = NVKMS_OUTPUT_COLORIMETRY_DEFAULT; + + return TRUE; +} + NvBool nvChooseColorRangeEvo( enum NvKmsOutputColorimetry colorimetry, const enum NvKmsDpyAttributeColorRangeValue requestedColorRange, @@ -2804,8 +2820,7 @@ NvBool nvChooseColorRangeEvo( */ NvBool nvChooseCurrentColorSpaceAndRangeEvo( const NVDpyEvoRec *pDpyEvo, - const NVHwModeTimingsEvo *pHwTimings, - NvU8 hdmiFrlBpc, + const enum NvYuv420Mode yuv420Mode, enum NvKmsOutputColorimetry colorimetry, const enum NvKmsDpyAttributeRequestedColorSpaceValue requestedColorSpace, const enum NvKmsDpyAttributeColorRangeValue requestedColorRange, @@ -2830,13 +2845,13 @@ NvBool nvChooseCurrentColorSpaceAndRangeEvo( * requested color space with RGB. We cannot support yuv420Mode in * that configuration, so fail in that case. */ - if (pHwTimings->yuv420Mode != NV_YUV420_MODE_NONE) { + if (yuv420Mode != NV_YUV420_MODE_NONE) { return FALSE; } newColorSpace = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB; newColorBpc = colorFormatsInfo.rgb444.maxBpc; - } else if (pHwTimings->yuv420Mode != NV_YUV420_MODE_NONE) { + } else if (yuv420Mode != NV_YUV420_MODE_NONE) { /* * If the current mode timing requires YUV420 compression, we override the * requested color space with YUV420. @@ -2871,25 +2886,12 @@ NvBool nvChooseCurrentColorSpaceAndRangeEvo( if ((newColorBpc == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_UNKNOWN) && - !nvGetDefaultColorSpace(&colorFormatsInfo, &newColorSpace, - &newColorBpc)) { + !GetDefaultColorSpace(&colorFormatsInfo, &newColorSpace, + &newColorBpc)) { return FALSE; } } - /* - * Downgrade BPC if HDMI configuration does not support current selection - * with TMDS or FRL. - */ - if (nvDpyIsHdmiEvo(pDpyEvo) && - nvHdmiTimingsNeedFrl(pDpyEvo, pHwTimings, newColorBpc) && - (newColorBpc > hdmiFrlBpc)) { - - newColorBpc = - hdmiFrlBpc ? hdmiFrlBpc : NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8; - nvAssert(newColorBpc >= NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8); - } - // 10 BPC required for HDR // XXX HDR TODO: Handle other colorimetries // XXX HDR TODO: Handle YUV @@ -2912,9 +2914,7 @@ NvBool nvChooseCurrentColorSpaceAndRangeEvo( void nvUpdateCurrentHardwareColorSpaceAndRangeEvo( NVDispEvoPtr pDispEvo, const NvU32 head, - enum NvKmsOutputColorimetry colorimetry, - const enum NvKmsDpyAttributeCurrentColorSpaceValue colorSpace, - const enum NvKmsDpyAttributeColorRangeValue colorRange, + const NVDpyAttributeColor *pDpyColor, NVEvoUpdateState *pUpdateState) { NVDevEvoPtr pDevEvo = pDispEvo->pDevEvo; @@ -2924,16 +2924,17 @@ void nvUpdateCurrentHardwareColorSpaceAndRangeEvo( nvAssert(pConnectorEvo != NULL); // XXX HDR TODO: Support more output colorimetries - if (colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100) { + if (pDpyColor->colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100) { nvAssert(pHeadState->timings.yuv420Mode == NV_YUV420_MODE_NONE); - nvAssert(colorSpace == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB); - nvAssert(colorRange == NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_LIMITED); + nvAssert(pDpyColor->format == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB); + nvAssert(pDpyColor->range == NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_LIMITED); pHeadState->procAmp.colorimetry = NVT_COLORIMETRY_BT2020RGB; pHeadState->procAmp.colorRange = NVT_COLOR_RANGE_LIMITED; pHeadState->procAmp.colorFormat = NVT_COLOR_FORMAT_RGB; } else if ((pHeadState->timings.yuv420Mode == NV_YUV420_MODE_SW) && - (colorSpace == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr420)) { + (pDpyColor->format == + NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr420)) { /* * In SW YUV420 mode, HW is programmed with RGB color space and full * color range. The color space conversion and color range compression @@ -2949,7 +2950,7 @@ void nvUpdateCurrentHardwareColorSpaceAndRangeEvo( pHeadState->procAmp.colorRange = NVT_COLOR_RANGE_FULL; // Set color format - switch (colorSpace) { + switch (pDpyColor->format) { case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB: pHeadState->procAmp.colorFormat = NVT_COLOR_FORMAT_RGB; break; @@ -2969,7 +2970,7 @@ void nvUpdateCurrentHardwareColorSpaceAndRangeEvo( switch (pConnectorEvo->legacyType) { case NV0073_CTRL_SPECIFIC_DISPLAY_TYPE_DFP: // program HW with RGB/YCbCr - switch (colorSpace) { + switch (pDpyColor->format) { case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB: pHeadState->procAmp.colorimetry = NVT_COLORIMETRY_RGB; break; @@ -2990,7 +2991,8 @@ void nvUpdateCurrentHardwareColorSpaceAndRangeEvo( // colorSpace isn't used for DEVICE_TYPE_CRT and // hence should be set to the "unchanged" value // (i.e. the default - RGB) - nvAssert(colorSpace == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB); + nvAssert(pDpyColor->format == + NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB); // program HW with RGB only pHeadState->procAmp.colorimetry = NVT_COLORIMETRY_RGB; @@ -3000,18 +3002,20 @@ void nvUpdateCurrentHardwareColorSpaceAndRangeEvo( } /* YCbCr444 should be advertise only for DisplayPort and HDMI */ - nvAssert((colorSpace != NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr444) || + nvAssert((pDpyColor->format != + NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr444) || nvConnectorUsesDPLib(pConnectorEvo) || pConnectorEvo->isHdmiEnabled); /* YcbCr422 should be advertised only for HDMI and DP on supported GPUs */ - nvAssert((colorSpace != NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr422) || + nvAssert((pDpyColor->format != + NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr422) || (((pDevEvo->caps.hdmiYCbCr422MaxBpc != 0) && pConnectorEvo->isHdmiEnabled)) || ((pDevEvo->caps.dpYCbCr422MaxBpc != 0) && nvConnectorUsesDPLib(pConnectorEvo))); - switch (colorRange) { + switch (pDpyColor->range) { case NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_FULL: pHeadState->procAmp.colorRange = NVT_COLOR_RANGE_FULL; break; @@ -5387,9 +5391,12 @@ static void RefreshSORAssignments(const NVDispEvoRec *pDispEvo, * pConnectorEvo->or.secondaryMask on *every* connector after calling * NV0073_CTRL_CMD_DFP_ASSIGN_SOR for *any* connector. */ -NvBool nvAssignSOREvo(const NVDispEvoRec *pDispEvo, const NvU32 displayId, - const NvBool b2Heads1Or, const NvU32 sorExcludeMask) +NvBool nvAssignSOREvo(const NVConnectorEvoRec *pConnectorEvo, + const NvU32 targetDisplayId, + const NvBool b2Heads1Or, + const NvU32 sorExcludeMask) { + const NVDispEvoRec *pDispEvo = pConnectorEvo->pDispEvo; const NVDevEvoRec *pDevEvo = pDispEvo->pDevEvo; NV0073_CTRL_DFP_ASSIGN_SOR_PARAMS params = { 0 }; NvU32 ret; @@ -5400,7 +5407,7 @@ NvBool nvAssignSOREvo(const NVDispEvoRec *pDispEvo, const NvU32 displayId, } params.subDeviceInstance = pDispEvo->displayOwner; - params.displayId = displayId; + params.displayId = targetDisplayId; params.bIs2Head1Or = b2Heads1Or; params.sorExcludeMask = sorExcludeMask; @@ -5920,8 +5927,7 @@ NvBool nvConstructHwModeTimingsImpCheckEvo( const NVHwModeTimingsEvo *pTimings, const NvBool enableDsc, const NvBool b2Heads1Or, - const enum NvKmsDpyAttributeCurrentColorSpaceValue colorSpace, - const enum NvKmsDpyAttributeColorBpcValue colorBpc, + const NVDpyAttributeColor *pColor, const struct NvKmsModeValidationParams *pParams, NVHwModeTimingsEvo timings[NVKMS_MAX_HEADS_PER_DISP], NvU32 *pNumHeads, @@ -5946,8 +5952,7 @@ NvBool nvConstructHwModeTimingsImpCheckEvo( for (head = 0; head < numHeads; head++) { timingsParams[head].pConnectorEvo = pConnectorEvo; timingsParams[head].activeRmId = activeRmId; - timingsParams[head].pixelDepth = - nvEvoColorSpaceBpcToPixelDepth(colorSpace, colorBpc); + timingsParams[head].pixelDepth = nvEvoDpyColorToPixelDepth(pColor); if (!nvEvoGetSingleTileHwModeTimings(pTimings, numHeads, &timings[head])) { ret = FALSE; @@ -6648,6 +6653,80 @@ ConstructHwModeTimingsViewPort(const NVDispEvoRec *pDispEvo, } +static NvBool GetDefaultFrlDpyColor(const NVColorFormatInfoRec *pColorFormatsInfo, + NVDpyAttributeColor *pDpyColor) +{ + nvkms_memset(pDpyColor, 0, sizeof(*pDpyColor)); + pDpyColor->colorimetry = NVKMS_OUTPUT_COLORIMETRY_DEFAULT; + + if (pColorFormatsInfo->rgb444.maxBpc >= + NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8) { + pDpyColor->format = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB; + pDpyColor->bpc = pColorFormatsInfo->rgb444.maxBpc; + pDpyColor->range = NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_FULL; + return TRUE; + } + + if (pColorFormatsInfo->yuv444.maxBpc >= + NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8) { + pDpyColor->format = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr444; + pDpyColor->bpc = pColorFormatsInfo->yuv444.maxBpc; + pDpyColor->range = NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_LIMITED; + return TRUE; + } + + return FALSE; +} + +static NvBool GetDfpHdmiProtocol(const NVDpyEvoRec *pDpyEvo, + const NvU32 overrides, + NVDpyAttributeColor *pDpyColor, + NVHwModeTimingsEvoPtr pTimings, + enum nvKmsTimingsProtocol *pTimingsProtocol) +{ + NVConnectorEvoPtr pConnectorEvo = pDpyEvo->pConnectorEvo; + const NvU32 rmProtocol = pConnectorEvo->or.protocol; + const NVColorFormatInfoRec colorFormatsInfo = + nvGetColorFormatInfo(pDpyEvo); + const NvBool forceHdmiFrlIsSupported = FALSE; + + nvAssert(rmProtocol == NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_SINGLE_TMDS_A || + rmProtocol == NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_SINGLE_TMDS_B); + + /* Override protocol if this mode requires HDMI FRL. */ + /* If we don't require boot clocks... */ + if (((overrides & NVKMS_MODE_VALIDATION_REQUIRE_BOOT_CLOCKS) == 0) && + ((nvHdmiGetEffectivePixelClockKHz(pDpyEvo, pTimings, pDpyColor) > + pDpyEvo->maxSingleLinkPixelClockKHz) || + forceHdmiFrlIsSupported) && + /* If FRL is supported... */ + nvHdmiDpySupportsFrl(pDpyEvo)) { + + /* Hardware does not support HDMI FRL with YUV422 */ + if ((pDpyColor->format == + NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr422) && + !GetDefaultFrlDpyColor(&colorFormatsInfo, pDpyColor)) { + return FALSE; + } + + *pTimingsProtocol = NVKMS_PROTOCOL_SOR_HDMI_FRL; + return TRUE; + } + + do { + if (nvHdmiGetEffectivePixelClockKHz(pDpyEvo, pTimings, pDpyColor) <= + pDpyEvo->maxSingleLinkPixelClockKHz) { + + *pTimingsProtocol = (rmProtocol == + NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_SINGLE_TMDS_A) ? + NVKMS_PROTOCOL_SOR_SINGLE_TMDS_A : + NVKMS_PROTOCOL_SOR_SINGLE_TMDS_B; + return TRUE; + } + } while (nvDowngradeColorSpaceAndBpc(&colorFormatsInfo, + pDpyColor)); + return FALSE; +} /* * GetDfpProtocol()- determine the protocol to use on the given pDpy @@ -6656,6 +6735,7 @@ ConstructHwModeTimingsViewPort(const NVDispEvoRec *pDispEvo, static NvBool GetDfpProtocol(const NVDpyEvoRec *pDpyEvo, const struct NvKmsModeValidationParams *pParams, + NVDpyAttributeColor *pDpyColor, NVHwModeTimingsEvoPtr pTimings) { NVConnectorEvoPtr pConnectorEvo = pDpyEvo->pConnectorEvo; @@ -6667,31 +6747,13 @@ static NvBool GetDfpProtocol(const NVDpyEvoRec *pDpyEvo, NV0073_CTRL_SPECIFIC_DISPLAY_TYPE_DFP); if (pConnectorEvo->or.type == NV0073_CTRL_SPECIFIC_OR_TYPE_SOR) { - /* Override protocol if this mode requires HDMI FRL. */ - if (nvDpyIsHdmiEvo(pDpyEvo) && - /* If we don't require boot clocks... */ - ((overrides & NVKMS_MODE_VALIDATION_REQUIRE_BOOT_CLOCKS) == 0) && - /* If FRL is supported... */ - nvHdmiDpySupportsFrl(pDpyEvo) && - /* Use FRL for 10 BPC if needed. */ - ((nvDpyIsHdmiDepth30Evo(pDpyEvo) && - nvHdmiTimingsNeedFrl(pDpyEvo, pTimings, HDMI_BPC10)) || - /* Use FRL for 8 BPC if needed. */ - nvHdmiTimingsNeedFrl(pDpyEvo, pTimings, HDMI_BPC8))) { - - nvAssert(nvDpyIsHdmiEvo(pDpyEvo)); - nvAssert(rmProtocol == NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_SINGLE_TMDS_A || - rmProtocol == NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_SINGLE_TMDS_B); - timingsProtocol = NVKMS_PROTOCOL_SOR_HDMI_FRL; - } else { - /* If HDMI FRL is needed for 8 BPC, but not supported, fail. */ - if (nvDpyIsHdmiEvo(pDpyEvo) && - nvHdmiTimingsNeedFrl(pDpyEvo, pTimings, HDMI_BPC8) && - ((overrides & NVKMS_MODE_VALIDATION_NO_MAX_PCLK_CHECK) == 0)) { - nvAssert(!nvHdmiDpySupportsFrl(pDpyEvo)); + if (nvDpyIsHdmiEvo(pDpyEvo)) { + if (!GetDfpHdmiProtocol(pDpyEvo, overrides, pDpyColor, pTimings, + &timingsProtocol)) { return FALSE; } + } else { switch (rmProtocol) { default: nvAssert(!"unrecognized SOR RM protocol"); @@ -6799,6 +6861,7 @@ static NvBool ConstructHwModeTimingsEvoDfp(const NVDpyEvoRec *pDpyEvo, const NvModeTimings *pModeTimings, const struct NvKmsSize *pViewPortSizeIn, const struct NvKmsRect *pViewPortOut, + NVDpyAttributeColor *pDpyColor, NVHwModeTimingsEvoPtr pTimings, const struct NvKmsModeValidationParams *pParams, @@ -6808,7 +6871,7 @@ static NvBool ConstructHwModeTimingsEvoDfp(const NVDpyEvoRec *pDpyEvo, ConstructHwModeTimingsFromNvModeTimings(pModeTimings, pTimings); - ret = GetDfpProtocol(pDpyEvo, pParams, pTimings); + ret = GetDfpProtocol(pDpyEvo, pParams, pDpyColor, pTimings); if (!ret) { return ret; @@ -6825,20 +6888,20 @@ static NvBool ConstructHwModeTimingsEvoDfp(const NVDpyEvoRec *pDpyEvo, pViewPortOut); } -static NvBool DowngradeColorBpc( - const enum NvKmsDpyAttributeCurrentColorSpaceValue colorSpace, - enum NvKmsDpyAttributeColorBpcValue *pColorBpc, - enum NvKmsDpyAttributeColorRangeValue *pColorRange) +NvBool nvDowngradeColorBpc(NVDpyAttributeColor *pDpyColor) { - switch (*pColorBpc) { + switch (pDpyColor->bpc) { case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_10: - *pColorBpc = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8; + if (pDpyColor->colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100) { + return FALSE; + } + pDpyColor->bpc = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8; break; case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8: /* At depth 18 only RGB and full range are allowed */ - if (colorSpace == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB) { - *pColorBpc = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_6; - *pColorRange = NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_FULL; + if (pDpyColor->format == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB) { + pDpyColor->bpc = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_6; + pDpyColor->range = NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_FULL; } else { return FALSE; } @@ -6853,22 +6916,25 @@ static NvBool DowngradeColorBpc( NvBool nvDowngradeColorSpaceAndBpc( const NVColorFormatInfoRec *pSupportedColorFormats, - enum NvKmsDpyAttributeCurrentColorSpaceValue *pColorSpace, - enum NvKmsDpyAttributeColorBpcValue *pColorBpc, - enum NvKmsDpyAttributeColorRangeValue *pColorRange) + NVDpyAttributeColor *pDpyColor) { - if (DowngradeColorBpc(*pColorSpace, pColorBpc, pColorRange)) { + if (nvDowngradeColorBpc(pDpyColor)) { return TRUE; } - switch (*pColorSpace) { - case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB: /* fallthrough */ + switch (pDpyColor->format) { + case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB: + /* XXX Add support for downgrading to YUV with BT2100 */ + if (pDpyColor->colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100) { + return FALSE; + } + /* fallthrough */ case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr444: if (pSupportedColorFormats->yuv422.maxBpc != NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_UNKNOWN) { - *pColorSpace = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr422; - *pColorBpc = pSupportedColorFormats->yuv422.maxBpc; - *pColorRange = NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_LIMITED; + pDpyColor->format = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr422; + pDpyColor->bpc = pSupportedColorFormats->yuv422.maxBpc; + pDpyColor->range = NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_LIMITED; return TRUE; } break; @@ -6888,16 +6954,13 @@ NvBool nvDowngradeColorSpaceAndBpc( NvBool nvDPValidateModeEvo(NVDpyEvoPtr pDpyEvo, NVHwModeTimingsEvoPtr pTimings, - enum NvKmsDpyAttributeCurrentColorSpaceValue *pColorSpace, - enum NvKmsDpyAttributeColorBpcValue *pColorBpc, + NVDpyAttributeColor *pDpyColor, const NvBool b2Heads1Or, NVDscInfoEvoRec *pDscInfo, const struct NvKmsModeValidationParams *pParams) { NVConnectorEvoPtr pConnectorEvo = pDpyEvo->pConnectorEvo; - enum NvKmsDpyAttributeCurrentColorSpaceValue colorSpace = *pColorSpace; - enum NvKmsDpyAttributeColorBpcValue colorBpc = *pColorBpc; - enum NvKmsDpyAttributeColorRangeValue colorRange; + NVDpyAttributeColor dpyColor = *pDpyColor; const NVColorFormatInfoRec supportedColorFormats = nvGetColorFormatInfo(pDpyEvo); @@ -6911,21 +6974,14 @@ NvBool nvDPValidateModeEvo(NVDpyEvoPtr pDpyEvo, return TRUE; } - if (colorSpace != NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB) { - colorRange = NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_LIMITED; - } else { - colorRange = NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_FULL; - } - nvAssert(nvDpyUsesDPLib(pDpyEvo)); nvAssert(pConnectorEvo->or.type == NV0073_CTRL_SPECIFIC_OR_TYPE_SOR); tryAgain: - if (!nvDPValidateModeForDpyEvo(pDpyEvo, colorSpace, colorBpc, pParams, - pTimings, b2Heads1Or, pDscInfo)) { - if (nvDowngradeColorSpaceAndBpc(&supportedColorFormats, &colorSpace, - &colorBpc, &colorRange)) { + if (!nvDPValidateModeForDpyEvo(pDpyEvo, &dpyColor, pParams, pTimings, + b2Heads1Or, pDscInfo)) { + if (nvDowngradeColorSpaceAndBpc(&supportedColorFormats, &dpyColor)) { goto tryAgain; } /* @@ -6936,8 +6992,7 @@ NvBool nvDPValidateModeEvo(NVDpyEvoPtr pDpyEvo, return FALSE; } - *pColorSpace = colorSpace; - *pColorBpc = colorBpc; + *pDpyColor = dpyColor; return TRUE; } @@ -6950,6 +7005,7 @@ NvBool nvConstructHwModeTimingsEvo(const NVDpyEvoRec *pDpyEvo, const struct NvKmsMode *pKmsMode, const struct NvKmsSize *pViewPortSizeIn, const struct NvKmsRect *pViewPortOut, + NVDpyAttributeColor *pDpyColor, NVHwModeTimingsEvoPtr pTimings, const struct NvKmsModeValidationParams *pParams, @@ -6965,7 +7021,8 @@ NvBool nvConstructHwModeTimingsEvo(const NVDpyEvoRec *pDpyEvo, ret = ConstructHwModeTimingsEvoDfp(pDpyEvo, &pKmsMode->timings, pViewPortSizeIn, pViewPortOut, - pTimings, pParams, pInfoString); + pDpyColor, pTimings, pParams, + pInfoString); } else if (pConnectorEvo->legacyType == NV0073_CTRL_SPECIFIC_DISPLAY_TYPE_CRT) { ret = ConstructHwModeTimingsEvoCrt(pConnectorEvo, @@ -9338,15 +9395,14 @@ NvBool nvIsCscMatrixIdentity(const struct NvKmsCscMatrix *matrix) return TRUE; } -enum nvKmsPixelDepth nvEvoColorSpaceBpcToPixelDepth( - const enum NvKmsDpyAttributeCurrentColorSpaceValue colorSpace, - const enum NvKmsDpyAttributeColorBpcValue colorBpc) +enum nvKmsPixelDepth nvEvoDpyColorToPixelDepth( + const NVDpyAttributeColor *pDpyColor) { - switch (colorSpace) { + switch (pDpyColor->format) { case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB: case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr444: case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr420: - switch (colorBpc) { + switch (pDpyColor->bpc) { case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_10: return NVKMS_PIXEL_DEPTH_30_444; case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8: @@ -9357,8 +9413,8 @@ enum nvKmsPixelDepth nvEvoColorSpaceBpcToPixelDepth( } break; case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr422: - nvAssert(colorBpc != NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_6); - switch (colorBpc) { + nvAssert(pDpyColor->bpc != NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_6); + switch (pDpyColor->bpc) { case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_10: return NVKMS_PIXEL_DEPTH_20_422; case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_6: /* fallthrough */ diff --git a/src/nvidia-modeset/src/nvkms-evo2.c b/src/nvidia-modeset/src/nvkms-evo2.c index 7a9de9abdd..44a3adc932 100644 --- a/src/nvidia-modeset/src/nvkms-evo2.c +++ b/src/nvidia-modeset/src/nvkms-evo2.c @@ -3914,6 +3914,7 @@ NVEvoHAL nvEvo94 = { TRUE, /* requiresScalingTapsInBothDimensions */ FALSE, /* supportsMergeMode */ FALSE, /* supportsHDMI10BPC */ + FALSE, /* supportsDPAudio192KHz */ NV_EVO2_SUPPORTED_DITHERING_MODES, /* supportedDitheringModes */ sizeof(NV5070_CTRL_CMD_IS_MODE_POSSIBLE_PARAMS), /* impStructSize */ NV_EVO_SCALER_1TAP, /* minScalerTaps */ diff --git a/src/nvidia-modeset/src/nvkms-evo3.c b/src/nvidia-modeset/src/nvkms-evo3.c index 29cb321cdc..a48f75e693 100644 --- a/src/nvidia-modeset/src/nvkms-evo3.c +++ b/src/nvidia-modeset/src/nvkms-evo3.c @@ -765,6 +765,7 @@ static NvBool UpdateTmoParams(NVEvoChannelPtr pChannel, } static void EvoSetTmoLutSurfaceAddressC5( + const NVDevEvoRec *pDevEvo, NVEvoChannelPtr pChannel, const NVSurfaceDescriptor *pSurfaceDesc, NvU32 offset) @@ -812,7 +813,7 @@ static void ConfigureTmoLut(NVDevEvoPtr pDevEvo, } if (!pChannel->tmoParams.enabled) { - pDevEvo->hal->SetTmoLutSurfaceAddress(pChannel, + pDevEvo->hal->SetTmoLutSurfaceAddress(pDevEvo, pChannel, NULL /* pSurfaceDesc */, 0 /* offset */); return; } @@ -835,7 +836,7 @@ static void ConfigureTmoLut(NVDevEvoPtr pDevEvo, DRF_DEF(C57E, _SET_TMO_CONTROL, _INTERPOLATE, _ENABLE) | DRF_NUM(C57E, _SET_TMO_CONTROL, _SAT_MODE, tmoLutSettings->satMode)); - pDevEvo->hal->SetTmoLutSurfaceAddress(pChannel, + pDevEvo->hal->SetTmoLutSurfaceAddress(pDevEvo, pChannel, &pHwState->tmoLut.pLutSurfaceEvo->surfaceDesc, offset); // Low Intensity @@ -2602,6 +2603,7 @@ NvBool nvEvoSetUsageBoundsC5(NVDevEvoPtr pDevEvo, NvU32 sd, NvU32 head, } static void EvoSetCoreNotifierSurfaceAddressAndControlC3( + const NVDevEvoRec *pDevEvo, NVEvoChannelPtr pChannel, const NVSurfaceDescriptor *pSurfaceDesc, NvU32 notifierOffset, @@ -2652,14 +2654,14 @@ void nvEvoSetNotifierC3(NVDevEvoRec *pDevEvo, for (sd = 0; sd < pDevEvo->numSubDevices; sd++) { if (nvPeekEvoSubDevMask(pDevEvo) & (1 << sd)) { nvPushEvoSubDevMask(pDevEvo, NVBIT(sd)); - pDevEvo->hal->SetCoreNotifierSurfaceAddressAndControl(pChannel, - &pDevEvo->core->notifiersDma[sd].surfaceDesc, + pDevEvo->hal->SetCoreNotifierSurfaceAddressAndControl(pDevEvo, + pChannel, &pDevEvo->core->notifiersDma[sd].surfaceDesc, notifier, ctrlVal); nvPopEvoSubDevMask(pDevEvo); } } } else { - pDevEvo->hal->SetCoreNotifierSurfaceAddressAndControl(pChannel, + pDevEvo->hal->SetCoreNotifierSurfaceAddressAndControl(pDevEvo, pChannel, NULL /* pSurfaceDesc */, 0 /* offset */ , 0 /* ctrlVal */); } } @@ -3202,18 +3204,14 @@ static void AssignPerWindowImpParams(NVC372_CTRL_IMP_WINDOW *pImpWindow, pImpWindow->tmoLut = NVC372_CTRL_IMP_LUT_USAGE_1025; } -void -nvEvoIsModePossibleC3(NVDispEvoPtr pDispEvo, - const NVEvoIsModePossibleDispInput *pInput, - NVEvoIsModePossibleDispOutput *pOutput) +NvBool +nvEvoSetCtrlIsModePossibleParams3(NVDispEvoPtr pDispEvo, + const NVEvoIsModePossibleDispInput *pInput, + NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS *pImp) { NVDevEvoPtr pDevEvo = pDispEvo->pDevEvo; const NVEvoCapabilitiesPtr pEvoCaps = &pDevEvo->gpus[0].capabilities; - NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS *pImp = - nvPreallocGet(pDevEvo, PREALLOC_TYPE_IMP_PARAMS, sizeof(*pImp)); - NvBool result = FALSE; NvU32 head; - NvU32 ret; nvkms_memset(pImp, 0, sizeof(*pImp)); @@ -3242,7 +3240,7 @@ nvEvoIsModePossibleC3(NVDispEvoPtr pDispEvo, b2Heads1Or, head, &pEvoCaps->head[head].scalerCaps)) { - goto done; + return FALSE; } /* XXXnvdisplay: This assumes a fixed window<->head mapping */ @@ -3282,6 +3280,36 @@ nvEvoIsModePossibleC3(NVDispEvoPtr pDispEvo, pImp->options = NVC372_CTRL_IS_MODE_POSSIBLE_OPTIONS_NEED_MIN_VPSTATE; } + return TRUE; +} + +void +nvEvoSetIsModePossibleDispOutput3(const NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS *pImp, + const NvBool result, + NVEvoIsModePossibleDispOutput *pOutput) +{ + pOutput->possible = result; + if (pOutput->possible) { + pOutput->minRequiredBandwidthKBPS = pImp->minRequiredBandwidthKBPS; + pOutput->floorBandwidthKBPS = pImp->floorBandwidthKBPS; + } +} + +void +nvEvoIsModePossibleC3(NVDispEvoPtr pDispEvo, + const NVEvoIsModePossibleDispInput *pInput, + NVEvoIsModePossibleDispOutput *pOutput) +{ + NVDevEvoPtr pDevEvo = pDispEvo->pDevEvo; + NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS *pImp = + nvPreallocGet(pDevEvo, PREALLOC_TYPE_IMP_PARAMS, sizeof(*pImp)); + NvBool result = FALSE; + NvU32 ret; + + if (!nvEvoSetCtrlIsModePossibleParams3(pDispEvo, pInput, pImp)) { + goto done; + } + ret = nvRmApiControl(nvEvoGlobal.clientHandle, pDevEvo->rmCtrlHandle, NVC372_CTRL_CMD_IS_MODE_POSSIBLE, @@ -3296,11 +3324,7 @@ nvEvoIsModePossibleC3(NVDispEvoPtr pDispEvo, result = TRUE; done: - pOutput->possible = result; - if (pOutput->possible) { - pOutput->minRequiredBandwidthKBPS = pImp->minRequiredBandwidthKBPS; - pOutput->floorBandwidthKBPS = pImp->floorBandwidthKBPS; - } + nvEvoSetIsModePossibleDispOutput3(pImp, result, pOutput); nvPreallocRelease(pDevEvo, PREALLOC_TYPE_IMP_PARAMS); } @@ -3530,6 +3554,7 @@ EvoProgramSemaphore3(NVDevEvoPtr pDevEvo, } static void EvoSetSemaphoreSurfaceAddressAndControlC6( + const NVDevEvoRec *pDevEvo, NVEvoChannelPtr pChannel, const NVSurfaceDescriptor *pSurfaceDesc, NvU32 semaphoreOffset, @@ -3548,6 +3573,7 @@ static void EvoSetSemaphoreSurfaceAddressAndControlC6( } static void EvoSetAcqSemaphoreSurfaceAddressAndControlC6( + const NVDevEvoRec *pDevEvo, NVEvoChannelPtr pChannel, const NVSurfaceDescriptor *pSurfaceDesc, NvU32 semaphoreOffset, @@ -3603,7 +3629,7 @@ EvoProgramSemaphore6(NVDevEvoPtr pDevEvo, } } - pDevEvo->hal->SetAcqSemaphoreSurfaceAddressAndControl(pChannel, + pDevEvo->hal->SetAcqSemaphoreSurfaceAddressAndControl(pDevEvo, pChannel, pSurfaceDesc, offset, acqMode); /*! set semaphore value */ @@ -3633,7 +3659,7 @@ EvoProgramSemaphore6(NVDevEvoPtr pDevEvo, } } - pDevEvo->hal->SetSemaphoreSurfaceAddressAndControl(pChannel, + pDevEvo->hal->SetSemaphoreSurfaceAddressAndControl(pDevEvo, pChannel, pSurfaceDesc, offset, (acqMode | relMode)); /*! set semaphore value */ @@ -3643,6 +3669,7 @@ EvoProgramSemaphore6(NVDevEvoPtr pDevEvo, } static void EvoSetWinNotifierSurfaceAddressAndControlC3( + const NVDevEvoRec *pDevEvo, NVEvoChannelPtr pChannel, const NVSurfaceDescriptor *pSurfaceDesc, NvU32 notifierOffset, @@ -3660,6 +3687,7 @@ static void EvoSetWinNotifierSurfaceAddressAndControlC3( } static void EvoSetISOSurfaceAddressC3( + const NVDevEvoRec *pDevEvo, NVEvoChannelPtr pChannel, const NVSurfaceDescriptor *pSurfaceDesc, NvU32 offset, @@ -3708,12 +3736,12 @@ EvoFlipC3Common(NVDevEvoPtr pDevEvo, pSurfaceDesc = &pChannel->notifiersDma[sd].surfaceDesc; offset = nvPrepareNextVrrNotifier(pChannel, sd, head); ctrlVal = DRF_DEF(C37E, _SET_NOTIFIER_CONTROL, _MODE, _WRITE_AWAKEN); - pDevEvo->hal->SetWinNotifierSurfaceAddressAndControl(pChannel, - pSurfaceDesc, offset, ctrlVal); + pDevEvo->hal->SetWinNotifierSurfaceAddressAndControl(pDevEvo, + pChannel, pSurfaceDesc, offset, ctrlVal); } else { offset = ctrlVal = 0; - pDevEvo->hal->SetWinNotifierSurfaceAddressAndControl(pChannel, - NULL, offset, ctrlVal); + pDevEvo->hal->SetWinNotifierSurfaceAddressAndControl(pDevEvo, + pChannel, NULL, offset, ctrlVal); } } else { const NVFlipNIsoSurfaceEvoHwState *pNIso = @@ -3734,8 +3762,8 @@ EvoFlipC3Common(NVDevEvoPtr pDevEvo, _WRITE, ctrlVal); } - pDevEvo->hal->SetWinNotifierSurfaceAddressAndControl(pChannel, - pSurfaceDesc, offset, ctrlVal); + pDevEvo->hal->SetWinNotifierSurfaceAddressAndControl(pDevEvo, + pChannel, pSurfaceDesc, offset, ctrlVal); } if (!pHwState->pSurfaceEvo[NVKMS_LEFT]) { @@ -3745,7 +3773,7 @@ EvoFlipC3Common(NVDevEvoPtr pDevEvo, planeIndex < NVKMS_MAX_PLANES_PER_SURFACE; planeIndex++) { const NvU8 ctxDmaIdx = EyeAndPlaneToCtxDmaIdx(eye, planeIndex); - pDevEvo->hal->SetISOSurfaceAddress(pChannel, + pDevEvo->hal->SetISOSurfaceAddress(pDevEvo, pChannel, NULL /* pSurfaceDec */, 0 /* offset */, ctxDmaIdx, NV_FALSE /* isBlocklinear */); } @@ -3823,7 +3851,7 @@ EvoFlipC3Common(NVDevEvoPtr pDevEvo, offset = pSurfaceEvoPerEye->planes[planeIndex].offset; } - pDevEvo->hal->SetISOSurfaceAddress(pChannel, + pDevEvo->hal->SetISOSurfaceAddress(pDevEvo, pChannel, pSurfaceDesc, offset, ctxDmaIdx, isBlockLinear); } } @@ -4367,6 +4395,7 @@ EvoSetupIdentityBaseLutC5(NVEvoLutDataRec *pData, } static void EvoSetILUTSurfaceAddressC5( + const NVDevEvoRec *pDevEvo, NVEvoChannelPtr pChannel, const NVSurfaceDescriptor *pSurfaceDesc, NvU32 offset) @@ -4515,10 +4544,10 @@ EvoFlipC5Common(NVDevEvoPtr pDevEvo, DRF_DEF(C57E, _SET_ILUT_CONTROL, _MODE, _DIRECT10)) | DRF_NUM(C57E, _SET_ILUT_CONTROL, _SIZE, lutSize)); - pDevEvo->hal->SetILUTSurfaceAddress(pChannel, + pDevEvo->hal->SetILUTSurfaceAddress(pDevEvo, pChannel, &pLutSurfaceEvo->surfaceDesc, origin); } else { - pDevEvo->hal->SetILUTSurfaceAddress(pChannel, + pDevEvo->hal->SetILUTSurfaceAddress(pDevEvo, pChannel, NULL /* pSurfaceDesc */, 0 /* offset */); } @@ -7945,6 +7974,7 @@ NVEvoHAL nvEvoC3 = { FALSE, /* requiresScalingTapsInBothDimensions */ FALSE, /* supportsMergeMode */ FALSE, /* supportsHDMI10BPC */ + FALSE, /* supportsDPAudio192KHz */ NV_EVO3_SUPPORTED_DITHERING_MODES, /* supportedDitheringModes */ sizeof(NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS), /* impStructSize */ NV_EVO_SCALER_2TAPS, /* minScalerTaps */ @@ -8034,6 +8064,7 @@ NVEvoHAL nvEvoC5 = { FALSE, /* requiresScalingTapsInBothDimensions */ TRUE, /* supportsMergeMode */ FALSE, /* supportsHDMI10BPC */ + FALSE, /* supportsDPAudio192KHz */ NV_EVO3_SUPPORTED_DITHERING_MODES, /* supportedDitheringModes */ sizeof(NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS), /* impStructSize */ NV_EVO_SCALER_2TAPS, /* minScalerTaps */ @@ -8123,6 +8154,7 @@ NVEvoHAL nvEvoC6 = { FALSE, /* requiresScalingTapsInBothDimensions */ TRUE, /* supportsMergeMode */ TRUE, /* supportsHDMI10BPC */ + FALSE, /* supportsDPAudio192KHz */ NV_EVO3_SUPPORTED_DITHERING_MODES, /* supportedDitheringModes */ sizeof(NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS), /* impStructSize */ NV_EVO_SCALER_2TAPS, /* minScalerTaps */ diff --git a/src/nvidia-modeset/src/nvkms-flip.c b/src/nvidia-modeset/src/nvkms-flip.c index 96d018b1d1..95afc1ac1d 100644 --- a/src/nvidia-modeset/src/nvkms-flip.c +++ b/src/nvidia-modeset/src/nvkms-flip.c @@ -140,7 +140,7 @@ static NvBool UpdateProposedFlipStateOneApiHead( if (pParams->colorimetry.specified) { pProposedApiHead->dirty.hdr = TRUE; - pProposedApiHead->hdr.colorimetry = pParams->colorimetry.val; + pProposedApiHead->hdr.dpyColor.colorimetry = pParams->colorimetry.val; } if (pParams->hdrInfoFrame.specified) { @@ -172,7 +172,7 @@ static NvBool UpdateProposedFlipStateOneApiHead( } /* NVKMS_OUTPUT_TF_PQ requires the RGB color space */ - if (pProposedApiHead->hdr.colorSpace != + if (pProposedApiHead->hdr.dpyColor.format != NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB) { return FALSE; } @@ -182,7 +182,8 @@ static NvBool UpdateProposedFlipStateOneApiHead( // XXX HDR TODO: Handle other colorimetries if (pProposedApiHead->hdr.infoFrameOverride || (pProposedApiHead->hdr.staticMetadataLayerMask != 0) || - (pProposedApiHead->hdr.colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100)) { + (pProposedApiHead->hdr.dpyColor.colorimetry == + NVKMS_OUTPUT_COLORIMETRY_BT2100)) { const NVDpyEvoRec *pDpyEvoIter; // All dpys on apiHead must support HDR. @@ -195,11 +196,11 @@ static NvBool UpdateProposedFlipStateOneApiHead( } } - if (!nvChooseColorRangeEvo(pProposedApiHead->hdr.colorimetry, + if (!nvChooseColorRangeEvo(pProposedApiHead->hdr.dpyColor.colorimetry, pDpyEvo->requestedColorRange, - pProposedApiHead->hdr.colorSpace, - pProposedApiHead->hdr.colorBpc, - &pProposedApiHead->hdr.colorRange)) { + pProposedApiHead->hdr.dpyColor.format, + pProposedApiHead->hdr.dpyColor.bpc, + &pProposedApiHead->hdr.dpyColor.range)) { return FALSE; } } @@ -336,17 +337,11 @@ static void InitNvKmsFlipWorkArea(const NVDevEvoRec *pDevEvo, &pDispEvo->apiHeadState[apiHead]; pProposedApiHead->hdr.tf = pApiHeadState->tf; - pProposedApiHead->hdr.colorimetry = pApiHeadState->colorimetry; + pProposedApiHead->hdr.dpyColor = pApiHeadState->attributes.color; pProposedApiHead->hdr.infoFrameOverride = pApiHeadState->hdrInfoFrameOverride; pProposedApiHead->hdr.staticMetadataLayerMask = pApiHeadState->hdrStaticMetadataLayerMask; - pProposedApiHead->hdr.colorSpace = - pApiHeadState->attributes.colorSpace; - pProposedApiHead->hdr.colorBpc = - pApiHeadState->attributes.colorBpc; - pProposedApiHead->hdr.colorRange = - pApiHeadState->attributes.colorRange; pProposedApiHead->viewPortPointIn = pApiHeadState->viewPortPointIn; @@ -399,9 +394,7 @@ static void FlipEvoOneApiHead(NVDispEvoRec *pDispEvo, nvUpdateCurrentHardwareColorSpaceAndRangeEvo( pDispEvo, head, - pProposedApiHead->hdr.colorimetry, - pProposedApiHead->hdr.colorSpace, - pProposedApiHead->hdr.colorRange, + &pProposedApiHead->hdr.dpyColor, pUpdateState); } @@ -413,17 +406,9 @@ static void FlipEvoOneApiHead(NVDispEvoRec *pDispEvo, } if (pProposedApiHead->dirty.hdr) { - pApiHeadState->attributes.colorSpace = - pProposedApiHead->hdr.colorSpace; - pApiHeadState->attributes.colorBpc = - pProposedApiHead->hdr.colorBpc; - pApiHeadState->attributes.colorRange = - pProposedApiHead->hdr.colorRange; - + pApiHeadState->attributes.color = pProposedApiHead->hdr.dpyColor; pApiHeadState->tf = pProposedApiHead->hdr.tf; - pApiHeadState->colorimetry = pProposedApiHead->hdr.colorimetry; - pApiHeadState->hdrInfoFrameOverride = pProposedApiHead->hdr.infoFrameOverride; pApiHeadState->hdrStaticMetadataLayerMask = diff --git a/src/nvidia-modeset/src/nvkms-hdmi.c b/src/nvidia-modeset/src/nvkms-hdmi.c index eaf5f5238d..3356088234 100644 --- a/src/nvidia-modeset/src/nvkms-hdmi.c +++ b/src/nvidia-modeset/src/nvkms-hdmi.c @@ -67,8 +67,7 @@ static inline const NVT_EDID_CEA861_INFO *GetExt861(const NVParsedEdidEvoRec *pP * colorimetry and colorrange for video infoframe. */ static void CalculateVideoInfoFrameColorFormat( - const NVAttributesSetEvoRec *pAttributesSet, - enum NvKmsOutputColorimetry colorimetry, + const NVDpyAttributeColor *pDpyColor, const NvU32 hdTimings, NVT_VIDEO_INFOFRAME_CTRL *pCtrl) { @@ -77,12 +76,12 @@ static void CalculateVideoInfoFrameColorFormat( * is RGB. This is enforced when the colorSpace is selected. * XXX HDR TODO: Support YUV */ - nvAssert((colorimetry != NVKMS_OUTPUT_COLORIMETRY_BT2100) || - (pAttributesSet->colorSpace == + nvAssert((pDpyColor->colorimetry != NVKMS_OUTPUT_COLORIMETRY_BT2100) || + (pDpyColor->format == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB)); // sets video infoframe colorspace (RGB/YUV). - switch (pAttributesSet->colorSpace) { + switch (pDpyColor->format) { case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB: pCtrl->color_space = NVT_VIDEO_INFOFRAME_BYTE1_Y1Y0_RGB; break; @@ -101,9 +100,9 @@ static void CalculateVideoInfoFrameColorFormat( } // sets video infoframe colorimetry. - switch (pAttributesSet->colorSpace) { + switch (pDpyColor->format) { case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB: - if (colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100) { + if (pDpyColor->colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100) { pCtrl->colorimetry = NVT_COLORIMETRY_BT2020RGB; } else { pCtrl->colorimetry = NVT_COLORIMETRY_RGB; @@ -126,7 +125,7 @@ static void CalculateVideoInfoFrameColorFormat( } // sets video infoframe colorrange. - switch (pAttributesSet->colorRange) { + switch (pDpyColor->range) { case NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_FULL: pCtrl->rgb_quantization_range = NVT_VIDEO_INFOFRAME_BYTE3_Q1Q0_FULL_RANGE; @@ -524,7 +523,7 @@ static void SendInfoFrame(const NVDispEvoRec *pDispEvo, */ static void SendVideoInfoFrame(const NVDispEvoRec *pDispEvo, const NvU32 head, - const NVAttributesSetEvoRec *pAttributesSet, + const NVDpyAttributeColor *pDpyColor, const NVDispHeadInfoFrameStateEvoRec *pInfoFrameState, NVT_EDID_INFO *pEdidInfo) { @@ -534,11 +533,7 @@ static void SendVideoInfoFrame(const NVDispEvoRec *pDispEvo, NVT_STATUS status; - CalculateVideoInfoFrameColorFormat( - pAttributesSet, - pDispEvo->headState[head].colorimetry, - hdTimings, - &videoCtrl); + CalculateVideoInfoFrameColorFormat(pDpyColor, hdTimings, &videoCtrl); status = NvTiming_ConstructVideoInfoframe(pEdidInfo, &videoCtrl, @@ -675,7 +670,7 @@ SendHDRInfoFrame(const NVDispEvoRec *pDispEvo, const NvU32 head, */ void nvUpdateHdmiInfoFrames(const NVDispEvoRec *pDispEvo, const NvU32 head, - const NVAttributesSetEvoRec *pAttributesSet, + const NVDpyAttributeColor *pDpyColor, const NVDispHeadInfoFrameStateEvoRec *pInfoFrameState, NVDpyEvoRec *pDpyEvo) { @@ -692,7 +687,7 @@ void nvUpdateHdmiInfoFrames(const NVDispEvoRec *pDispEvo, SendVideoInfoFrame(pDispEvo, head, - pAttributesSet, + pDpyColor, pInfoFrameState, &pDpyEvo->parsedEdid.info); @@ -844,9 +839,11 @@ static void EnableHdmiAudio(const NVDispEvoRec *pDispEvo, } static const NVT_EDID_CEA861_INFO *GetMaxSampleRateExtBlock( + const NVDpyEvoRec *pDpyEvo, const NVParsedEdidEvoRec *pParsedEdid, NvU32 *pMaxFreqSupported) { + const NVDevEvoRec *pDevEvo = pDpyEvo->pDispEvo->pDevEvo; const NVT_EDID_CEA861_INFO *pExt861 = NULL; int extIndex; int i; @@ -903,6 +900,15 @@ static const NVT_EDID_CEA861_INFO *GetMaxSampleRateExtBlock( NV0073_CTRL_DFP_ELD_AUDIO_CAPS_MAX_FREQ_SUPPORTED_0480KHZ; } + /* Cap DP audio to 48 KHz unless device supports 192 KHz */ + if (nvConnectorUsesDPLib(pDpyEvo->pConnectorEvo) && + !pDevEvo->hal->caps.supportsDPAudio192KHz && + (maxFreqSupported > + NV0073_CTRL_DFP_ELD_AUDIO_CAPS_MAX_FREQ_SUPPORTED_0480KHZ)) { + maxFreqSupported = + NV0073_CTRL_DFP_ELD_AUDIO_CAPS_MAX_FREQ_SUPPORTED_0480KHZ; + } + if (maxFreqSupported > *pMaxFreqSupported) { *pMaxFreqSupported = maxFreqSupported; pExt861 = pTmpExt861; @@ -932,8 +938,8 @@ static const VSDB_DATA *GetVsdb(const NVT_EDID_CEA861_INFO *pExt861) return pVsdb; } -static NvBool FillELDBuffer(const NvU32 displayId, - const NvBool isDisplayPort, +static NvBool FillELDBuffer(const NVDpyEvoRec *pDpyEvo, + const NvU32 displayId, const NVParsedEdidEvoRec *pParsedEdid, NVEldEvoRec *pEld, NvU32 *pMaxFreqSupported) @@ -946,8 +952,9 @@ static NvBool FillELDBuffer(const NvU32 displayId, NvU8 EldSAI = 0; NvU8 EldAudSynchDelay = 0; const VSDB_DATA *pVsdb; + NvBool isDisplayPort = nvConnectorUsesDPLib(pDpyEvo->pConnectorEvo); - pExt861 = GetMaxSampleRateExtBlock(pParsedEdid, pMaxFreqSupported); + pExt861 = GetMaxSampleRateExtBlock(pDpyEvo, pParsedEdid, pMaxFreqSupported); if (pExt861 == NULL) { return FALSE; @@ -1110,8 +1117,8 @@ void nvHdmiDpConstructHeadAudioState(const NvU32 displayId, pAudioState->isAudioOverHdmi = nvDpyIsHdmiEvo(pDpyEvo); - if (FillELDBuffer(displayId, - nvConnectorUsesDPLib(pDpyEvo->pConnectorEvo), + if (FillELDBuffer(pDpyEvo, + displayId, &pDpyEvo->parsedEdid, &pAudioState->eld, &pAudioState->maxFreqSupported)) { @@ -2142,30 +2149,30 @@ NvBool nvHdmiDpySupportsFrl(const NVDpyEvoRec *pDpyEvo) return TRUE; } -/* - * Determine if HDMI FRL is needed to drive timings with the given pixel clock - * on the given dpy. - * - * Returns TRUE if FRL is needed, or FALSE otherwise. - * */ -NvBool nvHdmiTimingsNeedFrl(const NVDpyEvoRec *pDpyEvo, - const NVHwModeTimingsEvo *pHwTimings, - NvU8 bpc) +NvU32 nvHdmiGetEffectivePixelClockKHz(const NVDpyEvoRec *pDpyEvo, + const NVHwModeTimingsEvo *pHwTimings, + const NVDpyAttributeColor *pDpyColor) { const NvU32 pixelClock = (pHwTimings->yuv420Mode == NV_YUV420_MODE_HW) ? (pHwTimings->pixelClock / 2) : pHwTimings->pixelClock; + nvAssert((pHwTimings->yuv420Mode == NV_YUV420_MODE_NONE) || + (pDpyColor->format == + NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr420)); nvAssert(nvDpyIsHdmiEvo(pDpyEvo)); - nvAssert(bpc >= 8); + nvAssert(pDpyColor->bpc >= NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8); + + /* YCbCr422 does not change the effective pixel clock. */ + if (pDpyColor->format == + NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr422) { + return pixelClock; + } /* - * For HDMI, maxSingleLinkPixelClockKHz is the maximum non-FRL rate. - * If the rate is higher than that, try to use FRL for the mode. - * * For > 8 BPC, the effective pixel clock is adjusted upwards according to * the ratio of the given BPC and 8 BPC. */ - return ((pixelClock * bpc) / 8) > pDpyEvo->maxSingleLinkPixelClockKHz; + return ((pixelClock * pDpyColor->bpc) / 8ULL); } static NvU64 GetHdmiFrlLinkRate(HDMI_FRL_DATA_RATE frlRate) @@ -2205,11 +2212,10 @@ static NvBool nvHdmiFrlQueryConfigOneBpc( const NVDpyEvoRec *pDpyEvo, const NvModeTimings *pModeTimings, const NVHwModeTimingsEvo *pHwTimings, + const NVDpyAttributeColor *pDpyColor, const NvBool b2Heads1Or, const struct NvKmsModeValidationParams *pValidationParams, - NvU8 bpc, HDMI_FRL_CONFIG *pConfig, - NvU8 *pHdmiFrlBpc, NVDscInfoEvoRec *pDscInfo) { const NVDispEvoRec *pDispEvo = pDpyEvo->pDispEvo; @@ -2220,17 +2226,16 @@ static NvBool nvHdmiFrlQueryConfigOneBpc( NVT_TIMING nvtTiming = { }; NVHDMIPKT_RESULT ret; - *pHdmiFrlBpc = 0; - if (pHwTimings->protocol != NVKMS_PROTOCOL_SOR_HDMI_FRL) { nvkms_memset(pDscInfo, 0, sizeof(*pDscInfo)); nvkms_memset(pConfig, 0, sizeof(*pConfig)); return TRUE; } - nvAssert(nvDpyIsHdmiEvo(pDpyEvo) && - nvHdmiDpySupportsFrl(pDpyEvo) && - nvHdmiTimingsNeedFrl(pDpyEvo, pHwTimings, bpc)); + nvAssert(nvDpyIsHdmiEvo(pDpyEvo)); + nvAssert(nvHdmiDpySupportsFrl(pDpyEvo)); + nvAssert(nvHdmiGetEffectivePixelClockKHz(pDpyEvo, pHwTimings, pDpyColor) > + pDpyEvo->maxSingleLinkPixelClockKHz); /* See if we can find an NVT_TIMING for this mode from the EDID. */ pNvtTiming = nvFindEdidNVT_TIMING(pDpyEvo, pModeTimings, pValidationParams); @@ -2273,7 +2278,17 @@ static NvBool nvHdmiFrlQueryConfigOneBpc( * This matches the non-DP default assigned later in * nvConstructHwModeTimingsEvo(). */ - videoTransportInfo.bpc = bpc; + switch(pDpyColor->bpc) { + case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_10: + videoTransportInfo.bpc = HDMI_BPC10; + break; + case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8: + videoTransportInfo.bpc = HDMI_BPC8; + break; + default: + return FALSE; + } + /* TODO: support YUV/YCbCr 444 and 422 packing modes. */ switch (pModeTimings->yuv420Mode) { case NV_YUV420_MODE_NONE: @@ -2331,8 +2346,6 @@ static NvBool nvHdmiFrlQueryConfigOneBpc( } if (ret == NVHDMIPKT_SUCCESS) { - *pHdmiFrlBpc = bpc; - if (pDscInfo != NULL) { const NvU64 hdmiLinkRate = GetHdmiFrlLinkRate(pConfig->frlRate); @@ -2391,37 +2404,28 @@ NvBool nvHdmiFrlQueryConfig( const NVDpyEvoRec *pDpyEvo, const NvModeTimings *pModeTimings, const NVHwModeTimingsEvo *pHwTimings, + NVDpyAttributeColor *pDpyColor, const NvBool b2Heads1Or, const struct NvKmsModeValidationParams *pValidationParams, HDMI_FRL_CONFIG *pConfig, - NvU8 *pHdmiFrlBpc, NVDscInfoEvoRec *pDscInfo) { - if (nvDpyIsHdmiDepth30Evo(pDpyEvo)) { - // Try first with 10 BPC + NVDpyAttributeColor dpyColor = *pDpyColor; + do { if (nvHdmiFrlQueryConfigOneBpc(pDpyEvo, pModeTimings, pHwTimings, + &dpyColor, b2Heads1Or, pValidationParams, - HDMI_BPC10, pConfig, - pHdmiFrlBpc, pDscInfo)) { + *pDpyColor = dpyColor; return TRUE; } - } - - // Try again with 8 BPC - return nvHdmiFrlQueryConfigOneBpc(pDpyEvo, - pModeTimings, - pHwTimings, - b2Heads1Or, - pValidationParams, - HDMI_BPC8, - pConfig, - pHdmiFrlBpc, - pDscInfo); + } while(nvDowngradeColorBpc(&dpyColor) && + (dpyColor.bpc >= NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8)); + return FALSE; } void nvHdmiFrlSetConfig(NVDispEvoRec *pDispEvo, NvU32 head) diff --git a/src/nvidia-modeset/src/nvkms-headsurface-config.c b/src/nvidia-modeset/src/nvkms-headsurface-config.c index 21a96f1739..a9e1470af6 100644 --- a/src/nvidia-modeset/src/nvkms-headsurface-config.c +++ b/src/nvidia-modeset/src/nvkms-headsurface-config.c @@ -831,7 +831,8 @@ NvBool nvHsConfigInitModeset( sizeof(*pTimings)); nvkms_memset(pTimings, 0, sizeof(*pTimings)); - if (!nvGetHwModeTimings(pDispEvo, pRequestHead, pTimings, + if (!nvGetHwModeTimings(pDispEvo, apiHead, pRequestHead, + pTimings, NULL /* pDpyColor */, NULL /* pInfoFrameCtrl */)) { nvPreallocRelease(pDevEvo, PREALLOC_TYPE_HS_INIT_CONFIG_HW_TIMINGS); return FALSE; @@ -1247,7 +1248,8 @@ NvBool nvHsConfigDowngrade( sizeof(*pTimings)); nvkms_memset(pTimings, 0, sizeof(*pTimings)); - if (!nvGetHwModeTimings(pDispEvo, pRequestHead, pTimings, + if (!nvGetHwModeTimings(pDispEvo, apiHead, pRequestHead, + pTimings, NULL /* pDpyColor */, NULL /* pInfoFrameCtrl */)) { nvPreallocRelease(pDevEvo, PREALLOC_TYPE_HS_INIT_CONFIG_HW_TIMINGS); return FALSE; diff --git a/src/nvidia-modeset/src/nvkms-hw-flip.c b/src/nvidia-modeset/src/nvkms-hw-flip.c index f85751073e..f1c0491656 100644 --- a/src/nvidia-modeset/src/nvkms-hw-flip.c +++ b/src/nvidia-modeset/src/nvkms-hw-flip.c @@ -227,8 +227,6 @@ void nvInitFlipEvoHwState( pFlipState->hdrInfoFrame.eotf = pHeadState->hdrInfoFrameOverride.eotf; pFlipState->hdrInfoFrame.staticMetadata = pHeadState->hdrInfoFrameOverride.staticMetadata; - - pFlipState->colorimetry = pHeadState->colorimetry; } @@ -1008,11 +1006,6 @@ NvBool nvUpdateFlipEvoHwState( pFlipState->tf = pParams->tf.val; } - if (pParams->colorimetry.specified) { - pFlipState->dirty.colorimetry = TRUE; - pFlipState->colorimetry = pParams->colorimetry.val; - } - if (pParams->hdrInfoFrame.specified) { pFlipState->dirty.hdrStaticMetadata = TRUE; @@ -1670,11 +1663,6 @@ static void UpdateHDR(NVDevEvoPtr pDevEvo, dirty = TRUE; } - if (pFlipState->dirty.colorimetry) { - pHeadState->colorimetry = pFlipState->colorimetry; - dirty = TRUE; - } - if (dirty) { // Update OCSC / OLUT nvEvoSetLUTContextDma(pDispEvo, head, updateState); diff --git a/src/nvidia-modeset/src/nvkms-modepool.c b/src/nvidia-modeset/src/nvkms-modepool.c index 07d75fa880..4d1a8ae787 100644 --- a/src/nvidia-modeset/src/nvkms-modepool.c +++ b/src/nvidia-modeset/src/nvkms-modepool.c @@ -29,6 +29,7 @@ #include "nvkms-3dvision.h" #include "nvkms-evo.h" #include "nvkms-ioctl.h" +#include "nvkms-modetimings.h" #include "nv_mode_timings_utils.h" #include "nv_vasprintf.h" @@ -177,17 +178,21 @@ nvValidateModeEvo(NVDpyEvoPtr pDpyEvo, * * Currently only frame packed 3D modes are supported, as we rely on * Kepler's HW support for this mode. + * + * If hdmi 3D is supported, then only one of hdmi3D or hdmi3DAvailable + * will be returned true, based on if it was requested. */ -static NvBool GetHdmi3DValue(const NVDpyEvoRec *pDpyEvo, - const struct NvKmsModeValidationParams *pParams, - const NVT_TIMING *pTiming) +static void GetHdmi3DValue(const NVDpyEvoRec *pDpyEvo, + const struct NvKmsModeValidationParams *pParams, + const NVT_TIMING *pTiming, + NvBool *hdmi3D, + NvBool *hdmi3DAvailable) { /* This should only be used in paths where we have a valid parsed EDID. */ nvAssert(pDpyEvo->parsedEdid.valid); - if ((pParams->stereoMode == NVKMS_STEREO_HDMI_3D) && - (NVT_GET_TIMING_STATUS_TYPE(pTiming->etc.status) == + if ((NVT_GET_TIMING_STATUS_TYPE(pTiming->etc.status) == NVT_TYPE_EDID_861ST) && nvDpyEvoSupportsHdmi3D(pDpyEvo)) { @@ -200,32 +205,15 @@ static NvBool GetHdmi3DValue(const NVDpyEvoRec *pDpyEvo, if ((vic == hdmi3DMap.Vic) && (hdmi3DMap.StereoStructureMask & NVT_HDMI_3D_SUPPORTED_FRAMEPACK_MASK)) { - return TRUE; + *hdmi3D = pParams->stereoMode == NVKMS_STEREO_HDMI_3D; + *hdmi3DAvailable = pParams->stereoMode != NVKMS_STEREO_HDMI_3D; + return; } } } - return FALSE; -} - -/* - * For Kepler HW HDMI 1.4 frame packed stereo, HW combines two flips - * into a single top-down double-height frame, and it needs a - * doubled refresh rate to accommodate this. - */ -static void UpdateNvModeTimingsForHdmi3D(NvModeTimings *pModeTimings, - NvBool enableHdmi3D) -{ - if (enableHdmi3D) { - pModeTimings->pixelClockHz *= 2; - pModeTimings->RRx1k *= 2; - } else { - nvAssert((pModeTimings->pixelClockHz % 2) == 0); - pModeTimings->pixelClockHz /= 2; - - nvAssert((pModeTimings->RRx1k % 2) == 0); - pModeTimings->RRx1k /= 2; - } + *hdmi3D = FALSE; + *hdmi3DAvailable = FALSE; } /* @@ -359,6 +347,7 @@ ValidateModeIndexEdid(NVDpyEvoPtr pDpyEvo, NVT_TIMING timing = pDpyEvo->parsedEdid.info.timing[i]; EvoValidateModeFlags flags; struct NvKmsMode kmsMode = { }; + NvBool hdmi3D = FALSE; /* Skip this mode if it was marked invalid by nvtiming. */ @@ -405,11 +394,9 @@ ValidateModeIndexEdid(NVDpyEvoPtr pDpyEvo, * Currently only frame packed 3D modes are supported, as we rely on * Kepler's HW support for this mode. */ - kmsMode.timings.hdmi3D = GetHdmi3DValue(pDpyEvo, pParams, &timing); - - if (kmsMode.timings.hdmi3D) { - UpdateNvModeTimingsForHdmi3D(&kmsMode.timings, TRUE); - } + GetHdmi3DValue(pDpyEvo, pParams, &timing, &hdmi3D, + &pReply->hdmi3DAvailable); + nvKmsUpdateNvModeTimingsForHdmi3D(&kmsMode.timings, hdmi3D); kmsMode.timings.yuv420Mode = GetYUV420Value(pDpyEvo, pParams, &timing); @@ -422,6 +409,49 @@ ValidateModeIndexEdid(NVDpyEvoPtr pDpyEvo, pInfoString, &pReply->validSyncs, &pReply->modeUsage); + + /* + * The client did not request hdmi3D, but this mode supports hdmi3D. + * Re-validate the mode with hdmi3D enabled. If that passes, report + * to the client that the mode could be used with hdmi3D if they choose + * later. + */ + if (pReply->valid && pReply->hdmi3DAvailable) { + /* + * Use dummy validSyncs and modeUsage so the original result isn't + * affected. + * + * Create a temporary KMS mode so that we can enable hdmi3D in it + * without perturbing the currently validated mode. + * + * Put all of this in a temporary heap allocation, to conserve + * stack. + */ + struct workArea { + struct NvKmsModeValidationValidSyncs stereoValidSyncs; + struct NvKmsUsageBounds stereoModeUsage; + struct NvKmsMode stereoKmsMode; + } *pWorkArea = nvCalloc(1, sizeof(*pWorkArea)); + + if (pWorkArea == NULL) { + pReply->hdmi3DAvailable = FALSE; + } else { + pWorkArea->stereoKmsMode = kmsMode; + nvKmsUpdateNvModeTimingsForHdmi3D( + &pWorkArea->stereoKmsMode.timings, TRUE); + + pReply->hdmi3DAvailable = + ValidateMode(pDpyEvo, + &pWorkArea->stereoKmsMode, + &flags, + pParams, + pInfoString, + &pWorkArea->stereoValidSyncs, + &pWorkArea->stereoModeUsage); + nvFree(pWorkArea); + } + } + /* * if this is a detailed timing, then flag it as such; this * will be used later when searching for the AutoSelect mode @@ -458,16 +488,13 @@ ValidateModeIndexEdid(NVDpyEvoPtr pDpyEvo, */ if (flags.patchedStereoTimings) { enum NvYuv420Mode yuv420Mode = kmsMode.timings.yuv420Mode; - NvBool hdmi3D = kmsMode.timings.hdmi3D; + hdmi3D = kmsMode.timings.hdmi3D; NVT_TIMINGtoNvModeTimings(&pDpyEvo->parsedEdid.info.timing[i], &kmsMode.timings); kmsMode.timings.yuv420Mode = yuv420Mode; - kmsMode.timings.hdmi3D = hdmi3D; - if (hdmi3D) { - UpdateNvModeTimingsForHdmi3D(&kmsMode.timings, TRUE); - } + nvKmsUpdateNvModeTimingsForHdmi3D(&kmsMode.timings, hdmi3D); } pReply->mode.timings = kmsMode.timings; @@ -1643,12 +1670,10 @@ static NvBool ValidateMode(NVDpyEvoPtr pDpyEvo, NVKMS_MAX_HEADS_PER_DISP); NvU32 impOutNumHeads = 0x0; NvU32 head; - NvU8 hdmiFrlBpc; NvBool ret = FALSE; const NVColorFormatInfoRec supportedColorFormats = nvGetColorFormatInfo(pDpyEvo); - enum NvKmsDpyAttributeCurrentColorSpaceValue colorSpace; - enum NvKmsDpyAttributeColorBpcValue colorBpc; + NVDpyAttributeColor dpyColor; if (modeName[0] == '\0') { nvBuildModeName(pModeTimings->hVisible, pModeTimings->vVisible, @@ -1672,6 +1697,17 @@ static NvBool ValidateMode(NVDpyEvoPtr pDpyEvo, goto done; } + if (pTimingsEvo->yuv420Mode != NV_YUV420_MODE_NONE) { + dpyColor.format = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr420; + dpyColor.bpc = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8; + dpyColor.range = NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_LIMITED; + dpyColor.colorimetry = NVKMS_OUTPUT_COLORIMETRY_DEFAULT; + } else if (!nvGetDefaultDpyColor(&supportedColorFormats, &dpyColor)) { + LogModeValidationEnd(pDispEvo, pInfoString, + "Failed to get default color space and Bpc"); + goto done; + } + /* * we made it past the rest of mode validation; now construct the * hw modetimings to use for this mode; we do this here so that we @@ -1695,6 +1731,7 @@ static NvBool ValidateMode(NVDpyEvoPtr pDpyEvo, pKmsMode, NULL, /* pViewPortSizeIn */ NULL, /* pViewPortOut */ + &dpyColor, pTimingsEvo, pParams, pInfoString)) { @@ -1706,32 +1743,22 @@ static NvBool ValidateMode(NVDpyEvoPtr pDpyEvo, b2Heads1Or = nvEvoUse2Heads1OR(pDpyEvo, pTimingsEvo, pParams); - if (pTimingsEvo->yuv420Mode != NV_YUV420_MODE_NONE) { - colorSpace = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr420; - colorBpc = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8; - } else if (!nvGetDefaultColorSpace(&supportedColorFormats, &colorSpace, - &colorBpc)) { - LogModeValidationEnd(pDispEvo, pInfoString, - "Failed to get default color space and Bpc"); - goto done; - } - if (nvDpyIsHdmiEvo(pDpyEvo)) { if (!nvHdmiFrlQueryConfig(pDpyEvo, &pKmsMode->timings, pTimingsEvo, + &dpyColor, b2Heads1Or, pParams, pHdmiFrlConfig, - &hdmiFrlBpc, pDscInfo)) { LogModeValidationEnd(pDispEvo, pInfoString, "Unable to determine HDMI 2.1 Fixed Rate Link configuration."); goto done; } } else { - if (!nvDPValidateModeEvo(pDpyEvo, pTimingsEvo, &colorSpace, &colorBpc, - b2Heads1Or, pDscInfo, pParams)) { + if (!nvDPValidateModeEvo(pDpyEvo, pTimingsEvo, &dpyColor, b2Heads1Or, + pDscInfo, pParams)) { LogModeValidationEnd(pDispEvo, pInfoString, "DP Bandwidth check failed"); goto done; @@ -1755,8 +1782,7 @@ static NvBool ValidateMode(NVDpyEvoPtr pDpyEvo, (pDscInfo->type != NV_DSC_INFO_EVO_TYPE_DISABLED), b2Heads1Or, - colorSpace, - colorBpc, + &dpyColor, pParams, impOutTimings, &impOutNumHeads, @@ -1857,16 +1883,13 @@ const NVT_TIMING *nvFindEdidNVT_TIMING * in ValidateModeIndexEdid(), so that the modeTimings can be * compared with the NVT_TIMINGs in the parsed EDID. */ - if (tmpModeTimings.hdmi3D) { - UpdateNvModeTimingsForHdmi3D(&tmpModeTimings, FALSE); - } + nvKmsUpdateNvModeTimingsForHdmi3D(&tmpModeTimings, FALSE); /* * The NVT_TIMINGs we compare against below won't have hdmi3D or * yuv420 set; clear those flags in tmpModeTimings so that we can * do a more meaningful comparison. */ - tmpModeTimings.hdmi3D = FALSE; tmpModeTimings.yuv420Mode = NV_YUV420_MODE_NONE; for (i = 0; i < pDpyEvo->parsedEdid.info.total_timings; i++) { @@ -1943,12 +1966,9 @@ static NvBool ConstructModeTimingsMetaData( /* Restore the yuv420 and hdmi3D flags from the client's mode. */ modeTimings.yuv420Mode = pKmsMode->timings.yuv420Mode; - modeTimings.hdmi3D = pKmsMode->timings.hdmi3D; /* Re-apply adjustments for hdmi3D. */ - if (modeTimings.hdmi3D) { - UpdateNvModeTimingsForHdmi3D(&modeTimings, TRUE); - } + nvKmsUpdateNvModeTimingsForHdmi3D(&modeTimings, pKmsMode->timings.hdmi3D); } @@ -1959,7 +1979,10 @@ static NvBool ConstructModeTimingsMetaData( } /* Validate hdmi3D. */ - if (modeTimings.hdmi3D != GetHdmi3DValue(pDpyEvo, pParams, &timing)) { + NvBool hdmi3D = FALSE; + NvBool hdmi3DAvailable = FALSE; + GetHdmi3DValue(pDpyEvo, pParams, &timing, &hdmi3D, &hdmi3DAvailable); + if ((modeTimings.hdmi3D != hdmi3D) && !hdmi3DAvailable) { return FALSE; } @@ -2027,6 +2050,7 @@ NvBool nvValidateModeForModeset(NVDpyEvoRec *pDpyEvo, const struct NvKmsMode *pKmsMode, const struct NvKmsSize *pViewPortSizeIn, const struct NvKmsRect *pViewPortOut, + NVDpyAttributeColor *pDpyColor, NVHwModeTimingsEvo *pTimingsEvo, NVT_VIDEO_INFOFRAME_CTRL *pInfoFrameCtrl) { @@ -2058,6 +2082,7 @@ NvBool nvValidateModeForModeset(NVDpyEvoRec *pDpyEvo, &kmsMode, pViewPortSizeIn, pViewPortOut, + pDpyColor, pTimingsEvo, pParams, &dummyInfoString)) { diff --git a/src/nvidia-modeset/src/nvkms-modeset.c b/src/nvidia-modeset/src/nvkms-modeset.c index 4dd8628539..9628c6d5a9 100644 --- a/src/nvidia-modeset/src/nvkms-modeset.c +++ b/src/nvidia-modeset/src/nvkms-modeset.c @@ -92,6 +92,7 @@ #include "nvkms-dma.h" #include "dp/nvdp-connector.h" +#include "dp/nvdp-device.h" #include "nvkms-api.h" @@ -101,6 +102,13 @@ #include "nvkms-attributes.h" #include "nvkms-headsurface-config.h" +static NvBool +GetColorSpaceAndColorRange( + const NVDispEvoRec *pDispEvo, + const NvU32 apiHead, + const struct NvKmsSetModeOneHeadRequest *pRequestHead, + NVDpyAttributeColor *pDpyColor); + static void ClearProposedModeSetHwState(const NVDevEvoRec *pDevEvo, NVProposedModeSetHwState *pProposed, @@ -168,11 +176,14 @@ InheritPreviousModesetState(const NVDevEvoRec *pDevEvo, */ NvBool nvGetHwModeTimings(const NVDispEvoRec *pDispEvo, + const NvU32 apiHead, const struct NvKmsSetModeOneHeadRequest *pRequestHead, NVHwModeTimingsEvo *pTimings, + NVDpyAttributeColor *pDpyColor, NVT_VIDEO_INFOFRAME_CTRL *pInfoFrameCtrl) { NVDpyEvoPtr pDpyEvo; + NVDpyAttributeColor dpyColor = { }; if (nvDpyIdListIsEmpty(pRequestHead->dpyIdList)) { return TRUE; @@ -184,14 +195,28 @@ nvGetHwModeTimings(const NVDispEvoRec *pDispEvo, return FALSE; } - return nvValidateModeForModeset(pDpyEvo, - &pRequestHead->modeValidationParams, - &pRequestHead->mode, - &pRequestHead->viewPortSizeIn, - pRequestHead->viewPortOutSpecified ? - &pRequestHead->viewPortOut : NULL, - pTimings, - pInfoFrameCtrl); + if (!GetColorSpaceAndColorRange(pDispEvo, apiHead, pRequestHead, + &dpyColor)) { + return FALSE; + } + + if (!nvValidateModeForModeset(pDpyEvo, + &pRequestHead->modeValidationParams, + &pRequestHead->mode, + &pRequestHead->viewPortSizeIn, + pRequestHead->viewPortOutSpecified ? + &pRequestHead->viewPortOut : NULL, + &dpyColor, + pTimings, + pInfoFrameCtrl)) { + return FALSE; + } + + if (pDpyColor != NULL) { + *pDpyColor = dpyColor; + } + + return TRUE; } static NvBool IsPreSyncptSpecified( @@ -215,11 +240,12 @@ static NvBool IsPreSyncptSpecified( static NvBool GetColorSpaceAndColorRange( - const NVDispEvoPtr pDispEvo, + const NVDispEvoRec *pDispEvo, + const NvU32 apiHead, const struct NvKmsSetModeOneHeadRequest *pRequestHead, - const NVProposedModeSetHwStateOneHead *pProposedPrimaryHead, - NVProposedModeSetStateOneApiHead *pProposedApiHead) + NVDpyAttributeColor *pDpyColor) { + enum NvKmsOutputColorimetry colorimetry; enum NvKmsDpyAttributeColorRangeValue requestedColorRange; enum NvKmsDpyAttributeRequestedColorSpaceValue requestedColorSpace; NVDpyEvoRec *pOneArbitraryDpyEvo = @@ -249,29 +275,43 @@ GetColorSpaceAndColorRange( requestedColorRange = pOneArbitraryDpyEvo->requestedColorRange; } + if (pRequestHead->flip.colorimetry.specified) { + colorimetry = pRequestHead->flip.colorimetry.val; + } else { + colorimetry = + pDispEvo->apiHeadState[apiHead].attributes.color.colorimetry; + } + /* * Choose current colorSpace and colorRange based on the current mode * timings and the requested color space and range. */ if (!nvChooseCurrentColorSpaceAndRangeEvo(pOneArbitraryDpyEvo, - &pProposedApiHead->timings, - pProposedPrimaryHead->hdmiFrlBpc, - pProposedApiHead->colorimetry, + pRequestHead->mode.timings.yuv420Mode, + colorimetry, requestedColorSpace, requestedColorRange, - &pProposedApiHead->attributes.colorSpace, - &pProposedApiHead->attributes.colorBpc, - &pProposedApiHead->attributes.colorRange)) { + &pDpyColor->format, + &pDpyColor->bpc, + &pDpyColor->range)) { return FALSE; } + pDpyColor->colorimetry = colorimetry; + return TRUE; +} + +static NvBool AssignProposedModeSetColorSpaceAndColorRangeSpecified( + const struct NvKmsSetModeOneHeadRequest *pRequestHead, + NVProposedModeSetStateOneApiHead *pProposedApiHead) +{ /* * When colorspace is specified in modeset request, it should * match the proposed colorspace. */ if (pRequestHead->colorSpaceSpecified) { NvBool ret = FALSE; - switch (pProposedApiHead->attributes.colorSpace) { + switch (pProposedApiHead->attributes.color.format) { case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB: ret = (pRequestHead->colorSpace == NV_KMS_DPY_ATTRIBUTE_REQUESTED_COLOR_SPACE_RGB); @@ -297,13 +337,12 @@ GetColorSpaceAndColorRange( * match the proposed color range. */ if (pRequestHead->colorRangeSpecified && - (pProposedApiHead->attributes.colorRange != pRequestHead->colorRange)) { + (pProposedApiHead->attributes.color.range != pRequestHead->colorRange)) { return FALSE; } pProposedApiHead->colorSpaceSpecified = pRequestHead->colorSpaceSpecified; pProposedApiHead->colorRangeSpecified = pRequestHead->colorRangeSpecified; - return TRUE; } @@ -434,7 +473,6 @@ InitNVProposedModeSetStateOneApiHead( pProposedApiHead->infoFrame = pDispEvo->apiHeadState[apiHead].infoFrame; pProposedApiHead->tf = pDispEvo->apiHeadState[apiHead].tf; - pProposedApiHead->colorimetry = pDispEvo->apiHeadState[apiHead].colorimetry; pProposedApiHead->hdrInfoFrameOverride = pDispEvo->apiHeadState[apiHead].hdrInfoFrameOverride; pProposedApiHead->hdrStaticMetadataLayerMask = @@ -491,7 +529,6 @@ InitProposedModeSetHwState(const NVDevEvoRec *pDevEvo, NVFlipEvoHwState *pFlip = &pProposed->sd[sd].head[head].flip; pFlip->dirty.tf = TRUE; pFlip->dirty.hdrStaticMetadata = TRUE; - pFlip->dirty.colorimetry = TRUE; for (layer = 0; layer < pDevEvo->head[head].numLayers; layer++) { pFlip->dirty.layer[layer] = TRUE; } @@ -525,7 +562,6 @@ InitProposedModeSetHwState(const NVDevEvoRec *pDevEvo, pProposedHead->timings = pHeadState->timings; pProposedHead->pConnectorEvo = pHeadState->pConnectorEvo; pProposedHead->hdmiFrlConfig = pHeadState->hdmiFrlConfig; - pProposedHead->hdmiFrlBpc = pHeadState->hdmiFrlBpc; pProposedHead->audio = pHeadState->audio; } } @@ -567,7 +603,6 @@ AssignProposedModeSetNVFlipEvoHwState( pFlip->dirty.tf = TRUE; pFlip->dirty.hdrStaticMetadata = TRUE; - pFlip->dirty.colorimetry = TRUE; for (layer = 0; layer < pDevEvo->head[head].numLayers; layer++) { pFlip->dirty.layer[layer] = TRUE; @@ -748,6 +783,7 @@ static NvU32 GetFree2Heads1ORHeadsMask(const NVDevEvoRec *pDevEvo, static NvU32 GetFreeHeads(const NVDevEvoRec *pDevEvo, const NvU32 apiHead, + const NVDpyEvoRec *pDpyEvo, const NvU32 freeHwHeadsMask) { NvU32 foundHead = NV_INVALID_HEAD; @@ -812,7 +848,8 @@ static NvBool AssignProposedHwHeadsGeneric( &pProposedApiHead->timings, &pProposedApiHead->modeValidationParams)); - NvU32 foundHead = GetFreeHeads(pDevEvo, apiHead, freeHwHeadsMask); + NvU32 foundHead = GetFreeHeads(pDevEvo, apiHead, pDpyEvo, + freeHwHeadsMask); if (foundHead != NV_INVALID_HEAD) { foundHeadsMask = NVBIT(foundHead); } @@ -1057,8 +1094,10 @@ AssignProposedModeSetHwState(NVDevEvoRec *pDevEvo, * more complete failure information to the client. */ if (!nvGetHwModeTimings(pDispEvo, + apiHead, pRequestHead, &pProposedApiHead->timings, + &pProposedApiHead->attributes.color, &pProposedApiHead->infoFrame.ctrl)) { pReply->disp[sd].head[apiHead].status = NVKMS_SET_MODE_ONE_HEAD_STATUS_INVALID_MODE; @@ -1066,6 +1105,14 @@ AssignProposedModeSetHwState(NVDevEvoRec *pDevEvo, continue; } + if (!AssignProposedModeSetColorSpaceAndColorRangeSpecified( + pRequestHead, pProposedApiHead)) { + pReply->disp[sd].head[apiHead].status = + NVKMS_SET_MODE_ONE_HEAD_STATUS_INVALID_MODE; + ret = FALSE; + continue; + } + AdjustHwModeTimingsForVrr(pDispEvo, pRequestHead, prohibitAdaptiveSync, @@ -1139,7 +1186,7 @@ AssignProposedModeSetHwState(NVDevEvoRec *pDevEvo, } /* NVKMS_OUTPUT_TF_PQ requires the RGB color space */ - if (pProposedApiHead->attributes.colorSpace != + if (pProposedApiHead->attributes.color.format != NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB) { ret = FALSE; pReply->disp[sd].head[apiHead].status = @@ -1149,10 +1196,6 @@ AssignProposedModeSetHwState(NVDevEvoRec *pDevEvo, } } - if (pRequestHead->flip.colorimetry.specified) { - pProposedApiHead->colorimetry = pRequestHead->flip.colorimetry.val; - } - if (pRequestHead->flip.hdrInfoFrame.specified) { pProposedApiHead->hdrInfoFrameOverride = pRequestHead->flip.hdrInfoFrame.enabled; @@ -1174,7 +1217,8 @@ AssignProposedModeSetHwState(NVDevEvoRec *pDevEvo, // XXX HDR TODO: Handle other colorimetries if (pProposedApiHead->hdrInfoFrameOverride || (pProposedApiHead->hdrStaticMetadataLayerMask != 0) || - (pProposedApiHead->colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100)) { + (pProposedApiHead->attributes.color.colorimetry == + NVKMS_OUTPUT_COLORIMETRY_BT2100)) { const NVDpyEvoRec *pDpyEvo; // All dpys on apiHead must support HDR. @@ -1291,11 +1335,11 @@ AssignProposedModeSetHwState(NVDevEvoRec *pDevEvo, if (!nvHdmiFrlQueryConfig(pDpyEvo, &pRequestHead->mode.timings, &pProposedApiHead->timings, + &pProposedApiHead->attributes.color, (nvPopCount32(pProposedApiHead->hwHeadsMask) > 1) /* b2Heads1Or */, &pProposedApiHead->modeValidationParams, &pProposedPrimaryHead->hdmiFrlConfig, - &pProposedPrimaryHead->hdmiFrlBpc, &pProposedApiHead->dscInfo)) { pReply->disp[sd].head[apiHead].status = NVKMS_SET_MODE_ONE_HEAD_STATUS_INVALID_MODE; @@ -1303,15 +1347,6 @@ AssignProposedModeSetHwState(NVDevEvoRec *pDevEvo, continue; } - if (!GetColorSpaceAndColorRange(pDispEvo, pRequestHead, - pProposedPrimaryHead, - pProposedApiHead)) { - pReply->disp[sd].head[apiHead].status = - NVKMS_SET_MODE_ONE_HEAD_STATUS_INVALID_MODE; - ret = FALSE; - continue; - } - /* * Construct the api head audio state, and pass it * to the primary hardware head. @@ -1412,8 +1447,7 @@ ValidateProposedModeSetHwStateOneDispImp(NVDispEvoPtr pDispEvo, timingsParams[head].pConnectorEvo = pProposedHead->pConnectorEvo; timingsParams[head].activeRmId = pProposedApiHead->activeRmId; timingsParams[head].pixelDepth = - nvEvoColorSpaceBpcToPixelDepth(pProposedApiHead->attributes.colorSpace, - pProposedApiHead->attributes.colorBpc); + nvEvoDpyColorToPixelDepth(&pProposedApiHead->attributes.color); timingsParams[head].pTimings = &pProposedHead->timings; timingsParams[head].enableDsc = (pProposedApiHead->dscInfo.type != NV_DSC_INFO_EVO_TYPE_DISABLED); @@ -1501,37 +1535,28 @@ static NvBool DowngradeColorSpaceAndBpcOneHead( const NVDispEvoRec *pDispEvo, NVProposedModeSetStateOneApiHead *pProposedApiHead) { - enum NvKmsDpyAttributeColorRangeValue colorRange = - pProposedApiHead->attributes.colorRange; - enum NvKmsDpyAttributeCurrentColorSpaceValue colorSpace = - pProposedApiHead->attributes.colorSpace; - enum NvKmsDpyAttributeColorBpcValue colorBpc = - pProposedApiHead->attributes.colorBpc; + NVDpyAttributeColor dpyColor = pProposedApiHead->attributes.color; NVDpyEvoRec *pDpyEvo = nvGetOneArbitraryDpyEvo(pProposedApiHead->dpyIdList, pDispEvo); const NVColorFormatInfoRec supportedColorFormats = nvGetColorFormatInfo(pDpyEvo); - if (!nvDowngradeColorSpaceAndBpc(&supportedColorFormats, - &colorSpace, &colorBpc, &colorRange)) { + if (!nvDowngradeColorSpaceAndBpc(&supportedColorFormats, &dpyColor)) { return FALSE; } if (pProposedApiHead->colorRangeSpecified && - (colorRange != pProposedApiHead->attributes.colorRange)) { + (dpyColor.range != pProposedApiHead->attributes.color.range)) { return FALSE; } if (pProposedApiHead->colorSpaceSpecified && - (colorSpace != pProposedApiHead->attributes.colorSpace)) { + (dpyColor.format != pProposedApiHead->attributes.color.format)) { return FALSE; } - pProposedApiHead->attributes.colorRange = colorRange; - pProposedApiHead->attributes.colorSpace = colorSpace; - pProposedApiHead->attributes.colorBpc = colorBpc; - + pProposedApiHead->attributes.color = dpyColor; return TRUE; } @@ -1599,8 +1624,8 @@ static NvU32 SetDpLibImpParamsOneConnectorEvo( pParams->head[head].displayId = pProposedApiHead->activeRmId; pParams->head[head].dpyIdList = pProposedApiHead->dpyIdList; - pParams->head[head].colorSpace = pProposedApiHead->attributes.colorSpace; - pParams->head[head].colorBpc = pProposedApiHead->attributes.colorBpc; + pParams->head[head].colorSpace = pProposedApiHead->attributes.color.format; + pParams->head[head].colorBpc = pProposedApiHead->attributes.color.bpc; pParams->head[head].pModeValidationParams = &pProposedApiHead->modeValidationParams; pParams->head[head].pTimings = &pProposedApiHead->timings; @@ -1766,8 +1791,8 @@ static NvBool ValidateProposedModeSetHwStateOneDispDPlib( primaryHead, pProposedApiHead->activeRmId, pProposedApiHead->dpyIdList, - pProposedApiHead->attributes.colorSpace, - pProposedApiHead->attributes.colorBpc, + pProposedApiHead->attributes.color.format, + pProposedApiHead->attributes.color.bpc, &pProposedApiHead->timings, &pProposedApiHead->dscInfo); if (pProposedPrimaryHead->pDpLibModesetState == NULL) { @@ -1925,7 +1950,7 @@ ValidateProposedModeSetHwStateOneDisp( } nvChooseDitheringEvo(pDpyEvo->pConnectorEvo, - pProposedApiHead->attributes.colorBpc, + pProposedApiHead->attributes.color.bpc, &pDpyEvo->requestedDithering, &pProposedApiHead->attributes.dithering); } @@ -2111,7 +2136,7 @@ static void AssignSor(const NVDispEvoRec *pDispEvo, return; } - if (nvAssignSOREvo(pDispEvo, displayId, b2Heads1Or, sorExcludeMask)) { + if (nvAssignSOREvo(pDpyEvo->pConnectorEvo, displayId, b2Heads1Or, sorExcludeMask)) { nvAssert(pConnectorEvo->or.primary != NV_INVALID_OR); pWorkArea->sd[sd].assignedSorMask |= nvConnectorGetORMaskEvo(pConnectorEvo); } else { @@ -2119,6 +2144,20 @@ static void AssignSor(const NVDispEvoRec *pDispEvo, } } +static void +SetLinkHandOffOnDpDdcPartners(NVConnectorEvoRec *pConnectorEvo, NVDispEvoPtr pDispEvo, NvBool enable) +{ + NVConnectorEvoRec *pTmpConnectorEvo; + FOR_ALL_EVO_CONNECTORS(pTmpConnectorEvo, pDispEvo) { + if (nvDpyIdIsInDpyIdList(pTmpConnectorEvo->displayId, + pConnectorEvo->ddcPartnerDpyIdsList)) { + if (nvConnectorUsesDPLib(pTmpConnectorEvo)) { + nvDPSetLinkHandoff(pTmpConnectorEvo->pDpLibConnector, enable); + } + } + } +} + static void KickoffModesetUpdateState( NVDispEvoPtr pDispEvo, @@ -2145,6 +2184,10 @@ KickoffModesetUpdateState( modesetUpdateState); } else if (nvConnectorIsDPSerializer(pConnectorEvo)) { nvDPSerializerPreSetMode(pDispEvo, pConnectorEvo); + } else { + if (nvIsConnectorActiveEvo(pConnectorEvo)) { + SetLinkHandOffOnDpDdcPartners(pConnectorEvo, pDispEvo, TRUE); + } } } } @@ -2166,6 +2209,10 @@ KickoffModesetUpdateState( modesetUpdateState); } else if (nvConnectorIsDPSerializer(pConnectorEvo)) { nvDPSerializerPostSetMode(pDispEvo, pConnectorEvo); + } else { + if (!nvIsConnectorActiveEvo(pConnectorEvo)) { + SetLinkHandOffOnDpDdcPartners(pConnectorEvo, pDispEvo, FALSE); + } } } } @@ -2233,6 +2280,7 @@ IsProposedModeSetStateOneApiHeadIncompatible( &pProposedDisp->apiHead[tmpApiHead]; const NVDpyEvoRec *pDpyEvoTmp = nvGetOneArbitraryDpyEvo(pTmpProposedApiHead->dpyIdList, pDispEvo); + NVDpyIdList dpyIdList; if (!pTmpProposedApiHead->changed) { continue; @@ -2248,13 +2296,30 @@ IsProposedModeSetStateOneApiHeadIncompatible( return TRUE; } + /* + * For the remaining tests, we compare apiHead against all other heads + * in the tmpApiHead loop. + */ + if (tmpApiHead == apiHead) { + continue; + } + /* * Consider this api-head incompatible if its current hardware heads * are proposed to map onto the different api-head. */ - if ((tmpApiHead != apiHead) && - ((pTmpProposedApiHead->hwHeadsMask & - pApiHeadState->hwHeadsMask) != 0x0)) { + if ((pTmpProposedApiHead->hwHeadsMask & + pApiHeadState->hwHeadsMask) != 0x0) { + return TRUE; + } + + /* + * Consider this api-head incompatible if its current + * dpy(s) are proposed to attach to a different api-head. + */ + dpyIdList = nvIntersectDpyIdListAndDpyIdList(pTmpProposedApiHead->dpyIdList, + pApiHeadState->activeDpys); + if (!nvDpyIdListIsEmpty(dpyIdList)) { return TRUE; } } @@ -2491,9 +2556,6 @@ ApplyProposedModeSetStateOneDispFlip( pDispEvo->apiHeadState[apiHead].tf = pProposedApiHead->tf; - pDispEvo->apiHeadState[apiHead].colorimetry = - pProposedApiHead->colorimetry; - pDispEvo->apiHeadState[apiHead].hdrInfoFrameOverride = pProposedApiHead->hdrInfoFrameOverride; @@ -2551,10 +2613,8 @@ ApplyProposedModeSetHwStateOneHeadPreUpdate( pHeadState->timings = pProposedHead->timings; pHeadState->dscInfo = pProposedApiHead->dscInfo; pHeadState->hdmiFrlConfig = pProposedHead->hdmiFrlConfig; - pHeadState->hdmiFrlBpc = pProposedHead->hdmiFrlBpc; pHeadState->pixelDepth = - nvEvoColorSpaceBpcToPixelDepth(pProposedApiHead->attributes.colorSpace, - pProposedApiHead->attributes.colorBpc); + nvEvoDpyColorToPixelDepth(&pProposedApiHead->attributes.color); pHeadState->audio = pProposedHead->audio; /* Update current LUT to hardware */ @@ -2572,9 +2632,7 @@ ApplyProposedModeSetHwStateOneHeadPreUpdate( /* Update hardware's current colorSpace and colorRange */ nvUpdateCurrentHardwareColorSpaceAndRangeEvo(pDispEvo, head, - pProposedApiHead->colorimetry, - pProposedApiHead->attributes.colorSpace, - pProposedApiHead->attributes.colorRange, + &pProposedApiHead->attributes.color, updateState); nvEvoAttachConnector(pProposedHead->pConnectorEvo, @@ -2744,7 +2802,6 @@ ApplyProposedModeSetStateOneApiHeadPreUpdate( pApiHeadState->attributes = pProposedApiHead->attributes; pApiHeadState->tf = pProposedApiHead->tf; - pApiHeadState->colorimetry = pProposedApiHead->colorimetry; pApiHeadState->hdrInfoFrameOverride = pProposedApiHead->hdrInfoFrameOverride; pApiHeadState->hdrStaticMetadataLayerMask = diff --git a/src/nvidia-modeset/src/nvkms-rm.c b/src/nvidia-modeset/src/nvkms-rm.c index b8ce0560f1..8a3aa15da9 100644 --- a/src/nvidia-modeset/src/nvkms-rm.c +++ b/src/nvidia-modeset/src/nvkms-rm.c @@ -199,8 +199,17 @@ static NvBool QueryGpuCapabilities(NVDevEvoPtr pDevEvo) /* TODO: This cap bit should be queried from RM */ pDevEvo->requiresAllAllocationsInSysmem = pDevEvo->isSOCDisplay; + /* + * Prohibit vblank_sem_control if: + * - on tegra, or + * - the kernel interface layer says so, or + * - (RM-based) SLI mosaic is enabled (WAR for bug 4552673, until RM-based + * SLI is dropped) + */ pDevEvo->supportsVblankSemControl = - !pDevEvo->isSOCDisplay && nvkms_vblank_sem_control(); + !pDevEvo->isSOCDisplay && + nvkms_vblank_sem_control() && + !pDevEvo->sli.mosaic; /* ctxDma{,Non}CoherentAllowed */ @@ -906,6 +915,15 @@ static NvBool ProbeHeadCountAndWindowAssignment(NVDevEvoPtr pDevEvo) return FALSE; } + if (numHeadsParams.numHeads > NV_MAX_HEADS) + { + nvEvoLog(EVO_LOG_WARN, + "HW supports %d heads. Limiting to %d heads", + numHeadsParams.numHeads, NV_MAX_HEADS); + + numHeadsParams.numHeads = NV_MAX_HEADS; + } + if (numHeads == 0) { numHeads = numHeadsParams.numHeads; } else { diff --git a/src/nvidia-modeset/src/nvkms-surface.c b/src/nvidia-modeset/src/nvkms-surface.c index d88b448b9e..8ba5cd5065 100644 --- a/src/nvidia-modeset/src/nvkms-surface.c +++ b/src/nvidia-modeset/src/nvkms-surface.c @@ -1076,7 +1076,8 @@ static NVSurfaceEvoPtr GetSurfaceFromHandle( const NvKmsSurfaceHandle surfaceHandle, const NvBool isUsedByCursorChannel, const NvBool isUsedByLayerChannel, - const NvBool requireDisplayHardwareAccess) + const NvBool requireDisplayHardwareAccess, + const NvBool maybeUsedBy3d) { NVSurfaceEvoPtr pSurfaceEvo = nvEvoGetPointerFromApiHandle(pOpenDevSurfaceHandles, surfaceHandle); @@ -1102,15 +1103,13 @@ static NVSurfaceEvoPtr GetSurfaceFromHandle( } /* - * XXX If !requireDisplayHardwareAccess, fetched surfaces aren't going to be - * accessed by the display hardware, so they shouldn't need to be checked by - * nvEvoGetHeadSetStoragePitchValue(). These surfaces will be used as a - * texture by the 3d engine. But previously all surfaces were checked by + * XXX If maybeUsedBy3d, the fetched surface may be used as a texture by the + * 3d engine. Previously, all surfaces were checked by * nvEvoGetHeadSetStoragePitchValue() at registration time, and we don't * know if nvEvoGetHeadSetStoragePitchValue() was protecting us from any * surface dimensions that could cause trouble for the 3d engine. */ - if (isUsedByLayerChannel || !requireDisplayHardwareAccess) { + if (isUsedByLayerChannel || maybeUsedBy3d) { NvU8 planeIndex; FOR_ALL_VALID_PLANES(planeIndex, pSurfaceEvo) { @@ -1138,7 +1137,8 @@ NVSurfaceEvoPtr nvEvoGetSurfaceFromHandle( surfaceHandle, isUsedByCursorChannel, isUsedByLayerChannel, - TRUE /* requireDisplayHardwareAccess */); + TRUE /* requireDisplayHardwareAccess */, + TRUE /* maybeUsedBy3d */); } NVSurfaceEvoPtr nvEvoGetSurfaceFromHandleNoDispHWAccessOk( @@ -1151,7 +1151,22 @@ NVSurfaceEvoPtr nvEvoGetSurfaceFromHandleNoDispHWAccessOk( surfaceHandle, FALSE /* isUsedByCursorChannel */, FALSE /* isUsedByLayerChannel */, - FALSE /* requireDisplayHardwareAccess */); + FALSE /* requireDisplayHardwareAccess */, + TRUE /* maybeUsedBy3d */); +} + +NVSurfaceEvoPtr nvEvoGetSurfaceFromHandleNoHWAccess( + const NVDevEvoRec *pDevEvo, + const NVEvoApiHandlesRec *pOpenDevSurfaceHandles, + NvKmsSurfaceHandle surfaceHandle) +{ + return GetSurfaceFromHandle(pDevEvo, + pOpenDevSurfaceHandles, + surfaceHandle, + FALSE /* isUsedByCursorChannel */, + FALSE /* isUsedByLayerChannel */, + FALSE /* requireDisplayHardwareAccess */, + FALSE /* maybeUsedBy3d */); } /*! @@ -1226,38 +1241,47 @@ void nvEvoUnregisterDeferredRequestFifo( nvFree(pDeferredRequestFifo); } -static NvBool UpdateVblankSemControl( - NVDevEvoRec *pDevEvo, - NVVblankSemControl *pVblankSemControl, - NvBool enable) +static NvBool AssignVblankSemControlHwHeadMask( + NVDispEvoRec *pDispEvo, + NvU32 apiHeadMask, + NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE_PARAMS *pParams) { - NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_PARAMS params = { }; + NvU32 apiHead; - params.subDeviceInstance = pVblankSemControl->dispIndex; - params.head = pVblankSemControl->hwHead; - params.hMemory = pVblankSemControl->pSurfaceEvo->planes[0].rmHandle; - params.memoryOffset = pVblankSemControl->surfaceOffset; - params.bEnable = enable; + FOR_ALL_HEADS(apiHead, apiHeadMask) { - return nvRmApiControl(nvEvoGlobal.clientHandle, - pDevEvo->displayCommonHandle, - NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL, - ¶ms, sizeof(params)) == NVOS_STATUS_SUCCESS; + NvU32 hwHead = nvGetPrimaryHwHead(pDispEvo, apiHead); + + if (hwHead == NV_INVALID_HEAD) { + return FALSE; + } + + pParams->headMask |= NVBIT(hwHead); + pParams->headIndexMap[hwHead] = apiHead; + } + + pParams->bUseHeadIndexMap = TRUE; + return TRUE; } NVVblankSemControl *nvEvoEnableVblankSemControl( NVDevEvoRec *pDevEvo, NVDispEvoRec *pDispEvo, - NvU32 hwHead, + NvU32 apiHeadMask, NVSurfaceEvoRec *pSurfaceEvo, NvU64 surfaceOffset) { + NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE_PARAMS params = { }; NVVblankSemControl *pVblankSemControl; if (!pDevEvo->supportsVblankSemControl) { return NULL; } + if (!AssignVblankSemControlHwHeadMask(pDispEvo, apiHeadMask, ¶ms)) { + return NULL; + } + /* * We cannot enable VblankSemControl if the requested offset within the * surface is too large. @@ -1279,14 +1303,19 @@ NVVblankSemControl *nvEvoEnableVblankSemControl( return NULL; } - pVblankSemControl->hwHead = hwHead; pVblankSemControl->dispIndex = pDispEvo->displayOwner; pVblankSemControl->surfaceOffset = surfaceOffset; pVblankSemControl->pSurfaceEvo = pSurfaceEvo; - if (UpdateVblankSemControl(pDevEvo, - pVblankSemControl, - TRUE /* enable */)) { + params.subDeviceInstance = pVblankSemControl->dispIndex; + params.hMemory = pVblankSemControl->pSurfaceEvo->planes[0].rmHandle; + params.memoryOffset = pVblankSemControl->surfaceOffset; + + if (nvRmApiControl(nvEvoGlobal.clientHandle, + pDevEvo->displayCommonHandle, + NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE, + ¶ms, sizeof(params)) == NVOS_STATUS_SUCCESS) { + nvEvoIncrementSurfaceRefCnts(pSurfaceEvo); return pVblankSemControl; } else { @@ -1299,13 +1328,21 @@ NvBool nvEvoDisableVblankSemControl( NVDevEvoRec *pDevEvo, NVVblankSemControl *pVblankSemControl) { + NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE_PARAMS params = { }; + if (!pDevEvo->supportsVblankSemControl) { return FALSE; } - if (UpdateVblankSemControl(pDevEvo, - pVblankSemControl, - FALSE /* enable */)) { + params.subDeviceInstance = pVblankSemControl->dispIndex; + params.hMemory = pVblankSemControl->pSurfaceEvo->planes[0].rmHandle; + params.memoryOffset = pVblankSemControl->surfaceOffset; + + if (nvRmApiControl(nvEvoGlobal.clientHandle, + pDevEvo->displayCommonHandle, + NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE, + ¶ms, sizeof(params)) == NVOS_STATUS_SUCCESS) { + nvEvoDecrementSurfaceRefCnts(pDevEvo, pVblankSemControl->pSurfaceEvo); nvFree(pVblankSemControl); return TRUE; diff --git a/src/nvidia-modeset/src/nvkms.c b/src/nvidia-modeset/src/nvkms.c index 50c46bd357..7e4805e3da 100644 --- a/src/nvidia-modeset/src/nvkms.c +++ b/src/nvidia-modeset/src/nvkms.c @@ -38,6 +38,7 @@ #include "nvkms-attributes.h" #include "nvkms-dpy-override.h" #include "nvkms-framelock.h" +#include "nvkms-stereo.h" #include "nvkms-surface.h" #include "nvkms-3dvision.h" #include "nvkms-ioctl.h" @@ -2737,9 +2738,9 @@ static NvBool GrantSurface(struct NvKmsPerOpen *pOpen, void *pParamsVoid) } pSurfaceEvo = - nvEvoGetSurfaceFromHandleNoDispHWAccessOk(pOpenDev->pDevEvo, - &pOpenDev->surfaceHandles, - pParams->request.surfaceHandle); + nvEvoGetSurfaceFromHandleNoHWAccess(pOpenDev->pDevEvo, + &pOpenDev->surfaceHandles, + pParams->request.surfaceHandle); if (pSurfaceEvo == NULL) { return FALSE; } @@ -3567,6 +3568,28 @@ static NvBool IsHeadRevoked(const NVDispEvoRec *pDispEvo, pPermissions->modeset.disp[pDispEvo->displayOwner].head[apiHead].dpyIdList); } +static void DisableStereoPin(struct NvKmsPerOpenDev *pOpenDev, + const struct NvKmsModesetPermissions *pModeset) +{ + NVDispEvoPtr pDispEvo; + NvU32 dispIndex, apiHead; + NvBool stereoEnabled; + + FOR_ALL_EVO_DISPLAYS(pDispEvo, dispIndex, pOpenDev->pDevEvo) { + for (apiHead = 0; apiHead < pOpenDev->pDevEvo->numApiHeads; apiHead++) { + const NVDpyIdList dpyIdList = + pModeset->disp[dispIndex].head[apiHead].dpyIdList; + if (!nvDpyIdListIsEmpty(dpyIdList)) { + stereoEnabled = nvGetStereo(pDispEvo, apiHead); + + if (stereoEnabled) { + nvSetStereo(pDispEvo, apiHead, FALSE); + } + } + } + } +} + static NvBool RevokePermissions(struct NvKmsPerOpen *pOpen, void *pParamsVoid) { struct NvKmsRevokePermissionsParams *pParams = pParamsVoid; @@ -3637,6 +3660,9 @@ static NvBool RevokePermissions(struct NvKmsPerOpen *pOpen, void *pParamsVoid) * being able to be leased again. */ if (pParams->request.permissions.type == NV_KMS_PERMISSIONS_TYPE_MODESET) { + // Also disable stereo pins if enabled. + DisableStereoPin(pOpenDev, &pParams->request.permissions.modeset); + nvShutDownApiHeads(pOpenDev->pDevEvo, pOpenDev, IsHeadRevoked, &pParams->request.permissions, TRUE /* doRasterLock */); @@ -3661,7 +3687,7 @@ static NvBool RegisterDeferredRequestFifo(struct NvKmsPerOpen *pOpen, return FALSE; } - pSurfaceEvo = nvEvoGetSurfaceFromHandleNoDispHWAccessOk( + pSurfaceEvo = nvEvoGetSurfaceFromHandleNoHWAccess( pOpenDev->pDevEvo, &pOpenDev->surfaceHandles, pParams->request.surfaceHandle); @@ -4726,7 +4752,6 @@ static NvBool EnableVblankSemControl( NVSurfaceEvoPtr pSurfaceEvo; NVVblankSemControl *pVblankSemControl; NvKmsVblankSemControlHandle vblankSemControlHandle; - NvU32 hwHead; if (!GetPerOpenDevAndDisp(pOpen, pParams->request.deviceHandle, @@ -4740,7 +4765,7 @@ static NvBool EnableVblankSemControl( pDispEvo = pOpenDisp->pDispEvo; pSurfaceEvo = - nvEvoGetSurfaceFromHandleNoDispHWAccessOk( + nvEvoGetSurfaceFromHandleNoHWAccess( pDevEvo, &pOpenDev->surfaceHandles, pParams->request.surfaceHandle); @@ -4749,16 +4774,10 @@ static NvBool EnableVblankSemControl( return FALSE; } - hwHead = nvGetPrimaryHwHead(pDispEvo, pParams->request.head); - - if (hwHead == NV_INVALID_HEAD) { - return FALSE; - } - pVblankSemControl = nvEvoEnableVblankSemControl( pDevEvo, pDispEvo, - hwHead, + pParams->request.headMask, pSurfaceEvo, pParams->request.surfaceOffset); diff --git a/src/nvidia/Makefile b/src/nvidia/Makefile index 0f70514b7f..423414afc7 100644 --- a/src/nvidia/Makefile +++ b/src/nvidia/Makefile @@ -216,6 +216,7 @@ $(NV_KERNEL_O): $(OBJS) $(EXPORTS_LINK_COMMAND) $(LINKER_SCRIPT) $(call quiet_cmd,OBJCOPY) \ --localize-symbol=memset \ --localize-symbol=memcpy \ + --remove-section=.note.gnu.property \ $@ .PHONY: clean diff --git a/src/nvidia/arch/nvalloc/common/inc/dev_ctrl_defines.h b/src/nvidia/arch/nvalloc/common/inc/dev_ctrl_defines.h index fa06bcfe85..ea5dad1a35 100644 --- a/src/nvidia/arch/nvalloc/common/inc/dev_ctrl_defines.h +++ b/src/nvidia/arch/nvalloc/common/inc/dev_ctrl_defines.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -77,9 +77,6 @@ #define NV_CTRL_INTR_GPU_VECTOR_TO_SUBTREE(i) \ ((NV_CTRL_INTR_GPU_VECTOR_TO_LEAF_REG(i)) / 2) -// First index of doorbell which is controlled by VF -#define NV_CTRL_INTR_GPU_DOORBELL_INDEX_VF_START 2048 - // The max number of leaf registers we expect #define NV_MAX_INTR_LEAVES 16 diff --git a/src/nvidia/arch/nvalloc/common/inc/flcnifcmn.h b/src/nvidia/arch/nvalloc/common/inc/flcnifcmn.h index c315524edc..df4ba6cc67 100644 --- a/src/nvidia/arch/nvalloc/common/inc/flcnifcmn.h +++ b/src/nvidia/arch/nvalloc/common/inc/flcnifcmn.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2014-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2014-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -31,10 +31,6 @@ #include "nvtypes.h" #include "flcnretval.h" -#ifndef NV_ARRAY_ELEMENTS -#define NV_ARRAY_ELEMENTS(x) ((sizeof(x)/sizeof((x)[0]))) -#endif - /*! * @ref NvU64_ALIGN32 , NvU64_ALIGN32_PACK, NvU64_ALIGN32_UNPACK * TODO: Use NV types directly diff --git a/src/nvidia/arch/nvalloc/common/inc/gsp/gsp_fw_wpr_meta.h b/src/nvidia/arch/nvalloc/common/inc/gsp/gsp_fw_wpr_meta.h index b2a5153844..b7a0951dae 100644 --- a/src/nvidia/arch/nvalloc/common/inc/gsp/gsp_fw_wpr_meta.h +++ b/src/nvidia/arch/nvalloc/common/inc/gsp/gsp_fw_wpr_meta.h @@ -39,7 +39,9 @@ * | VGA WORKSPACE | * ---------------------------- <- vbiosReservedOffset (64K? aligned) * | (potential align. gap) | - * ---------------------------- <- gspFwWprEnd (128K aligned) + * ---------------------------- <- gspFwWprEnd + frtsSize + pmuReservedSize + * | PMU mem reservation | + * ---------------------------- <- gspFwWprEnd (128K aligned) + frtsSize * | FRTS data | (frtsSize is 0 on GA100) * | ------------------------ | <- frtsOffset * | BOOT BIN (e.g. SK + BL) | @@ -192,7 +194,14 @@ typedef struct // Pad structure to exactly 256 bytes. Can replace padding with additional // fields without incrementing revision. Padding initialized to 0. - NvU8 padding[6]; + NvU8 padding[2]; + + // + // Starts at gspFwWprEnd+frtsSize b/c FRTS is positioned + // to end where this allocation starts (when RM requests FSP to create + // FRTS). + // + NvU32 pmuReservedSize; // BL to use for verification (i.e. Booter says OK to boot) NvU64 verified; // 0x0 -> unverified, 0xa0a0a0a0a0a0a0a0 -> verified diff --git a/src/nvidia/arch/nvalloc/common/inc/inforom/ifrecc.h b/src/nvidia/arch/nvalloc/common/inc/inforom/ifrecc.h index ef2f97024e..646b8a62e7 100644 --- a/src/nvidia/arch/nvalloc/common/inc/inforom/ifrecc.h +++ b/src/nvidia/arch/nvalloc/common/inc/inforom/ifrecc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2017-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/arch/nvalloc/common/inc/rmlsfm.h b/src/nvidia/arch/nvalloc/common/inc/rmlsfm.h index 914982b702..ac9ba96165 100644 --- a/src/nvidia/arch/nvalloc/common/inc/rmlsfm.h +++ b/src/nvidia/arch/nvalloc/common/inc/rmlsfm.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2011-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2011-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -151,7 +151,10 @@ #define LSF_FALCON_ID_OFA_RISCV_EB (24U) #define LSF_FALCON_ID_NVENC_RISCV_EB (25U) #define LSF_FALCON_ID_PMU_RISCV_EB (26U) -#define LSF_FALCON_ID_END (27U) +#define LSF_FALCON_ID_NVDEC0_RISCV_EB (27U) +#define LSF_FALCON_ID_GSPLITE_RISCV_EB (28U) +#define LSF_FALCON_ID_DISPLAY_RISCV_EB (29U) +#define LSF_FALCON_ID_END (30U) #define LSF_FALCON_ID_INVALID (0xFFFFFFFFU) @@ -176,6 +179,7 @@ #define LSF_FALCON_ID_END_17 (17U) #define LSF_FALCON_ID_END_18 (18U) #define LSF_FALCON_ID_END_21 (21U) +#define LSF_FALCON_ID_END_30 (30U) #define LSF_FALCON_INSTANCE_DEFAULT_0 (0x0U) #define LSF_FALCON_INSTANCE_COUNT_DEFAULT_1 (0x1U) @@ -192,12 +196,16 @@ * to uniquely identify it. * @note this macro should be updated as needed whenever LSF_FALCON_ID* defines are added. See Bug: 3833461 */ -#define LSF_FALCON_USES_INSTANCE(falconId) ((falconId == LSF_FALCON_ID_NVDEC_RISCV_EB) || \ - (falconId == LSF_FALCON_ID_NVJPG) || \ - (falconId == LSF_FALCON_ID_NVJPG_RISCV_EB) || \ - (falconId == LSF_FALCON_ID_NVENC_RISCV_EB) || \ +#define LSF_FALCON_USES_INSTANCE(falconId) ((falconId == LSF_FALCON_ID_NVDEC_RISCV_EB) || \ + (falconId == LSF_FALCON_ID_NVJPG) || \ + (falconId == LSF_FALCON_ID_NVJPG_RISCV_EB) || \ + (falconId == LSF_FALCON_ID_NVENC_RISCV_EB) || \ + (falconId == LSF_FALCON_ID_FECS_RISCV_EB) || \ + (falconId == LSF_FALCON_ID_GPCCS_RISCV_EB) || \ + (falconId == LSF_FALCON_ID_GSPLITE_RISCV_EB) || \ (falconId == LSF_FALCON_ID_OFA_RISCV_EB)) + /*! * Size in entries of the ucode descriptor's dependency map. * This used to be LSF_FALCON_ID_END, but since that had to grow and we did not want to break any @@ -205,7 +213,7 @@ * * Increasing this number should be done with care. */ -#define LSF_FALCON_DEPMAP_SIZE (11) +#define LSF_FALCON_DEPMAP_SIZE (11U) /*! * Falcon Binaries version defines diff --git a/src/nvidia/arch/nvalloc/unix/include/nv-reg.h b/src/nvidia/arch/nvalloc/unix/include/nv-reg.h index 4a5616de3e..e6c20ca13b 100644 --- a/src/nvidia/arch/nvalloc/unix/include/nv-reg.h +++ b/src/nvidia/arch/nvalloc/unix/include/nv-reg.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2006-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2006-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -869,6 +869,8 @@ * NVreg_ModifyDeviceFiles, NVreg_DeviceFileGID, NVreg_DeviceFileUID * and NVreg_DeviceFileMode will be honored by nvidia-modprobe. * + * Also, refer to the NVreg_CreateImexChannel0 option. + * * Possible values: * 0 - Disable IMEX using CUDA driver's fabric handles. * N - N IMEX channels will be enabled in the driver to facilitate N @@ -878,6 +880,29 @@ #define __NV_IMEX_CHANNEL_COUNT ImexChannelCount #define NV_REG_IMEX_CHANNEL_COUNT NV_REG_STRING(__NV_IMEX_CHANNEL_COUNT) +/* + * Option: NVreg_CreateImexChannel0 + * + * Description: + * + * This option allows users to specify whether the NVIDIA driver must create + * the IMEX channel 0 by default. The channel will be created automatically + * when an application (e.g. nvidia-smi, nvidia-persistenced) is run. + * + * Note that users are advised to enable this option only in trusted + * environments where it is acceptable for applications to share the same + * IMEX channel. + * + * For more details on IMEX channels, refer to the NVreg_ImexChannelCount + * option. + * + * Possible values: + * 0 - Do not create IMEX channel 0 (default). + * 1 - Create IMEX channel 0. + */ +#define __NV_CREATE_IMEX_CHANNEL_0 CreateImexChannel0 +#define NV_CREATE_IMEX_CHANNEL_0 NV_REG_STRING(__CREATE_IMEX_CHANNEL_0) + #if defined(NV_DEFINE_REGISTRY_KEY_TABLE) /* @@ -927,6 +952,7 @@ NV_DEFINE_REG_STRING_ENTRY(__NV_EXCLUDED_GPUS, NULL); NV_DEFINE_REG_ENTRY(__NV_DMA_REMAP_PEER_MMIO, NV_DMA_REMAP_PEER_MMIO_ENABLE); NV_DEFINE_REG_STRING_ENTRY(__NV_RM_NVLINK_BW, NULL); NV_DEFINE_REG_ENTRY_GLOBAL(__NV_IMEX_CHANNEL_COUNT, 2048); +NV_DEFINE_REG_ENTRY_GLOBAL(__NV_CREATE_IMEX_CHANNEL_0, 0); /* *----------------registry database definition---------------------- @@ -974,6 +1000,7 @@ nv_parm_t nv_parms[] = { NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_OPENRM_ENABLE_UNSUPPORTED_GPUS), NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_DMA_REMAP_PEER_MMIO), NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_IMEX_CHANNEL_COUNT), + NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_CREATE_IMEX_CHANNEL_0), {NULL, NULL} }; diff --git a/src/nvidia/arch/nvalloc/unix/include/nv.h b/src/nvidia/arch/nvalloc/unix/include/nv.h index e24dd9ecd0..7690bb51b1 100644 --- a/src/nvidia/arch/nvalloc/unix/include/nv.h +++ b/src/nvidia/arch/nvalloc/unix/include/nv.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1999-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1999-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -609,6 +609,15 @@ typedef enum NV_POWER_STATE_RUNNING } nv_power_state_t; +typedef struct +{ + const char *vidmem_power_status; + const char *dynamic_power_status; + const char *gc6_support; + const char *gcoff_support; + const char *s0ix_status; +} nv_power_info_t; + #define NV_PRIMARY_VGA(nv) ((nv)->primary_vga) #define NV_IS_CTL_DEVICE(nv) ((nv)->flags & NV_FLAG_CONTROL) @@ -778,7 +787,7 @@ nv_state_t* NV_API_CALL nv_get_ctl_state (void); void NV_API_CALL nv_set_dma_address_size (nv_state_t *, NvU32 ); -NV_STATUS NV_API_CALL nv_alias_pages (nv_state_t *, NvU32, NvU32, NvU32, NvU64, NvU64 *, void **); +NV_STATUS NV_API_CALL nv_alias_pages (nv_state_t *, NvU32, NvU64, NvU32, NvU32, NvU64, NvU64 *, void **); NV_STATUS NV_API_CALL nv_alloc_pages (nv_state_t *, NvU32, NvU64, NvBool, NvU32, NvBool, NvBool, NvS32, NvU64 *, void **); NV_STATUS NV_API_CALL nv_free_pages (nv_state_t *, NvU32, NvBool, NvU32, void *); @@ -822,6 +831,7 @@ void NV_API_CALL nv_acpi_methods_init (NvU32 *); void NV_API_CALL nv_acpi_methods_uninit (void); NV_STATUS NV_API_CALL nv_acpi_method (NvU32, NvU32, NvU32, void *, NvU16, NvU32 *, void *, NvU16 *); +NV_STATUS NV_API_CALL nv_acpi_d3cold_dsm_for_upstream_port (nv_state_t *, NvU8 *, NvU32, NvU32, NvU32 *); NV_STATUS NV_API_CALL nv_acpi_dsm_method (nv_state_t *, NvU8 *, NvU32, NvBool, NvU32, void *, NvU16, NvU32 *, void *, NvU16 *); NV_STATUS NV_API_CALL nv_acpi_ddc_method (nv_state_t *, void *, NvU32 *, NvBool); NV_STATUS NV_API_CALL nv_acpi_dod_method (nv_state_t *, NvU32 *, NvU32 *); @@ -990,10 +1000,10 @@ NV_STATUS NV_API_CALL rm_p2p_init_mapping (nvidia_stack_t *, NvU64, NvU6 NV_STATUS NV_API_CALL rm_p2p_destroy_mapping (nvidia_stack_t *, NvU64); NV_STATUS NV_API_CALL rm_p2p_get_pages (nvidia_stack_t *, NvU64, NvU32, NvU64, NvU64, NvU64 *, NvU32 *, NvU32 *, NvU32 *, NvU8 **, void *); NV_STATUS NV_API_CALL rm_p2p_get_gpu_info (nvidia_stack_t *, NvU64, NvU64, NvU8 **, void **); -NV_STATUS NV_API_CALL rm_p2p_get_pages_persistent (nvidia_stack_t *, NvU64, NvU64, void **, NvU64 *, NvU32 *, void *, void *); +NV_STATUS NV_API_CALL rm_p2p_get_pages_persistent (nvidia_stack_t *, NvU64, NvU64, void **, NvU64 *, NvU32 *, void *, void *, void **); NV_STATUS NV_API_CALL rm_p2p_register_callback (nvidia_stack_t *, NvU64, NvU64, NvU64, void *, void (*)(void *), void *); NV_STATUS NV_API_CALL rm_p2p_put_pages (nvidia_stack_t *, NvU64, NvU32, NvU64, void *); -NV_STATUS NV_API_CALL rm_p2p_put_pages_persistent(nvidia_stack_t *, void *, void *); +NV_STATUS NV_API_CALL rm_p2p_put_pages_persistent(nvidia_stack_t *, void *, void *, void *); NV_STATUS NV_API_CALL rm_p2p_dma_map_pages (nvidia_stack_t *, nv_dma_device_t *, NvU8 *, NvU64, NvU32, NvU64 *, void **); NV_STATUS NV_API_CALL rm_dma_buf_dup_mem_handle (nvidia_stack_t *, nv_state_t *, NvHandle, NvHandle, NvHandle, NvHandle, void *, NvHandle, NvU64, NvU64, NvHandle *, void **); void NV_API_CALL rm_dma_buf_undup_mem_handle(nvidia_stack_t *, nv_state_t *, NvHandle, NvHandle); @@ -1027,9 +1037,7 @@ void NV_API_CALL rm_enable_dynamic_power_management(nvidia_stack_t *, nv_s NV_STATUS NV_API_CALL rm_ref_dynamic_power(nvidia_stack_t *, nv_state_t *, nv_dynamic_power_mode_t); void NV_API_CALL rm_unref_dynamic_power(nvidia_stack_t *, nv_state_t *, nv_dynamic_power_mode_t); NV_STATUS NV_API_CALL rm_transition_dynamic_power(nvidia_stack_t *, nv_state_t *, NvBool, NvBool *); -const char* NV_API_CALL rm_get_vidmem_power_status(nvidia_stack_t *, nv_state_t *); -const char* NV_API_CALL rm_get_dynamic_power_management_status(nvidia_stack_t *, nv_state_t *); -const char* NV_API_CALL rm_get_gpu_gcx_support(nvidia_stack_t *, nv_state_t *, NvBool); +void NV_API_CALL rm_get_power_info(nvidia_stack_t *, nv_state_t *, nv_power_info_t *); void NV_API_CALL rm_acpi_notify(nvidia_stack_t *, nv_state_t *, NvU32); void NV_API_CALL rm_acpi_nvpcf_notify(nvidia_stack_t *); @@ -1041,13 +1049,12 @@ NV_STATUS NV_API_CALL nv_vgpu_create_request(nvidia_stack_t *, nv_state_t *, c NV_STATUS NV_API_CALL nv_vgpu_delete(nvidia_stack_t *, const NvU8 *, NvU16); NV_STATUS NV_API_CALL nv_vgpu_get_type_ids(nvidia_stack_t *, nv_state_t *, NvU32 *, NvU32 *, NvBool, NvU8, NvBool); NV_STATUS NV_API_CALL nv_vgpu_get_type_info(nvidia_stack_t *, nv_state_t *, NvU32, char *, int, NvU8); -NV_STATUS NV_API_CALL nv_vgpu_get_bar_info(nvidia_stack_t *, nv_state_t *, const NvU8 *, NvU64 *, NvU32, void *, NvBool *); +NV_STATUS NV_API_CALL nv_vgpu_get_bar_info(nvidia_stack_t *, nv_state_t *, const NvU8 *, NvU64 *, + NvU64 *, NvU64 *, NvU32 *, NvBool *, NvU8 *); NV_STATUS NV_API_CALL nv_vgpu_get_hbm_info(nvidia_stack_t *, nv_state_t *, const NvU8 *, NvU64 *, NvU64 *); -NV_STATUS NV_API_CALL nv_vgpu_start(nvidia_stack_t *, const NvU8 *, void *, NvS32 *, NvU8 *, NvU32); -NV_STATUS NV_API_CALL nv_vgpu_get_sparse_mmap(nvidia_stack_t *, nv_state_t *, const NvU8 *, NvU64 **, NvU64 **, NvU32 *); NV_STATUS NV_API_CALL nv_vgpu_process_vf_info(nvidia_stack_t *, nv_state_t *, NvU8, NvU32, NvU8, NvU8, NvU8, NvBool, void *); -NV_STATUS NV_API_CALL nv_vgpu_update_request(nvidia_stack_t *, const NvU8 *, NvU32, NvU64 *, NvU64 *, const char *); NV_STATUS NV_API_CALL nv_gpu_bind_event(nvidia_stack_t *); +NV_STATUS NV_API_CALL nv_gpu_unbind_event(nvidia_stack_t *, NvU32, NvBool *); NV_STATUS NV_API_CALL nv_get_usermap_access_params(nv_state_t*, nv_usermap_access_params_t*); nv_soc_irq_type_t NV_API_CALL nv_get_current_irq_type(nv_state_t*); diff --git a/src/nvidia/arch/nvalloc/unix/include/osapi.h b/src/nvidia/arch/nvalloc/unix/include/osapi.h index 368866e0d9..f91e3aa515 100644 --- a/src/nvidia/arch/nvalloc/unix/include/osapi.h +++ b/src/nvidia/arch/nvalloc/unix/include/osapi.h @@ -68,7 +68,7 @@ if ((i * sizeof(NvU32)) < ((sp)->size / 8)) \ { \ nv_printf(NV_DBG_ERRORS, "NVRM: altstack: used %d of %d bytes!\n", \ - ((sp)->size - (i * sizeof(NvU32))), (sp)->size); \ + ((sp)->size - (i * (NvU32)sizeof(NvU32))), (sp)->size); \ NV_ASSERT_PRECOMP((i * sizeof(NvU32)) >= ((sp)->size / 8)); \ } \ } diff --git a/src/nvidia/arch/nvalloc/unix/include/osfuncs.h b/src/nvidia/arch/nvalloc/unix/include/osfuncs.h index f6c9e85085..332a72bde3 100644 --- a/src/nvidia/arch/nvalloc/unix/include/osfuncs.h +++ b/src/nvidia/arch/nvalloc/unix/include/osfuncs.h @@ -34,7 +34,6 @@ #if defined(NVCPU_X86_64) OSnv_rdcr4 nv_rdcr4; -NvU64 nv_rdcr3(OBJOS *); OSnv_cpuid nv_cpuid; #endif diff --git a/src/nvidia/arch/nvalloc/unix/src/asm/x86/nv_rdcr.c b/src/nvidia/arch/nvalloc/unix/src/asm/x86/nv_rdcr.c index 56e6bfd770..559a919cdc 100644 --- a/src/nvidia/arch/nvalloc/unix/src/asm/x86/nv_rdcr.c +++ b/src/nvidia/arch/nvalloc/unix/src/asm/x86/nv_rdcr.c @@ -34,11 +34,4 @@ NvU32 nv_rdcr4(OBJOS *pOS) return (NvU32)val; } -NvU64 nv_rdcr3(OBJOS *pOS) -{ - NvU64 val; - asm volatile ("movq %%cr3,%0" : "=r" (val)); - return val; -} - #endif diff --git a/src/nvidia/arch/nvalloc/unix/src/dynamic-power.c b/src/nvidia/arch/nvalloc/unix/src/dynamic-power.c index e0079e30bc..a4126d24e5 100644 --- a/src/nvidia/arch/nvalloc/unix/src/dynamic-power.c +++ b/src/nvidia/arch/nvalloc/unix/src/dynamic-power.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -564,135 +564,43 @@ subdeviceCtrlCmdOsUnixAudioDynamicPower_IMPL return NV_OK; } -/*! - * @brief: Function to indicate if Video Memory is powered off or not by - * checking if GPU is in GCOFF state. - * - * @param[in] sp nvidia_stack_t pointer. - * @param[in] pNv nv_state_t pointer. - * - * @return String indicating Video Memory power status. - */ - -const char* NV_API_CALL rm_get_vidmem_power_status( - nvidia_stack_t *sp, - nv_state_t *pNv -) -{ - THREAD_STATE_NODE threadState; - void *fp; - GPU_MASK gpuMask; - const char *pVidmemPowerStatus = "?"; - - NV_ENTER_RM_RUNTIME(sp,fp); - threadStateInit(&threadState, THREAD_STATE_FLAGS_NONE); - - // LOCK: acquire API lock - if ((rmapiLockAcquire(API_LOCK_FLAGS_NONE, RM_LOCK_MODULES_DYN_POWER)) == NV_OK) - { - OBJGPU *pGpu = NV_GET_NV_PRIV_PGPU(pNv); - - // LOCK: acquire per device lock - if ((pGpu != NULL) && - ((rmGpuGroupLockAcquire(pGpu->gpuInstance, GPU_LOCK_GRP_SUBDEVICE, - GPUS_LOCK_FLAGS_NONE, RM_LOCK_MODULES_DYN_POWER, - &gpuMask)) == NV_OK)) - { - if (pGpu->getProperty(pGpu, PDB_PROP_GPU_GCOFF_STATE_ENTERED)) - { - pVidmemPowerStatus = "Off"; - } - else - { - pVidmemPowerStatus = "Active"; - } - - // UNLOCK: release per device lock - rmGpuGroupLockRelease(gpuMask, GPUS_LOCK_FLAGS_NONE); - } - - // UNLOCK: release API lock - rmapiLockRelease(); - } - - threadStateFree(&threadState, THREAD_STATE_FLAGS_NONE); - NV_EXIT_RM_RUNTIME(sp,fp); - - return pVidmemPowerStatus; -} - /*! * @brief: Function to indicate if GC6/GC-OFF is supported * or not on the SKU. * - * @param[in] sp nvidia_stack_t pointer. - * @param[in] pNv nv_state_t pointer. + * @param[in] pGpu OBJGPU pointer. * @param[in] bGcxTypeGc6 If true, returns string indicating GC6 support * otherwise returns GC-OFF support. * * @return String indicating GC6/GC-OFF support status. */ -const char* NV_API_CALL rm_get_gpu_gcx_support( - nvidia_stack_t *sp, - nv_state_t *pNv, - NvBool bGcxTypeGC6 +static const char* RmGetGpuGcxSupport( + OBJGPU *pGpu, + NvBool bGcxTypeGC6 ) { - THREAD_STATE_NODE threadState; - void *fp; - GPU_MASK gpuMask; - const char *pSupported = "?"; - - NV_ENTER_RM_RUNTIME(sp,fp); - threadStateInit(&threadState, THREAD_STATE_FLAGS_NONE); - - // LOCK: acquire API lock - if ((rmapiLockAcquire(API_LOCK_FLAGS_NONE, RM_LOCK_MODULES_DYN_POWER)) == NV_OK) + if (!pGpu->getProperty(pGpu, PDB_PROP_GPU_UNIX_DYNAMIC_POWER_SUPPORTED)) { - OBJGPU *pGpu = NV_GET_NV_PRIV_PGPU(pNv); + return "Not Supported"; + } - // LOCK: acquire per device lock - if ((pGpu != NULL) && - ((rmGpuGroupLockAcquire(pGpu->gpuInstance, GPU_LOCK_GRP_SUBDEVICE, - GPUS_LOCK_FLAGS_NONE, RM_LOCK_MODULES_DYN_POWER, - &gpuMask)) == NV_OK)) + if (bGcxTypeGC6) + { + if (pGpu->getProperty(pGpu, PDB_PROP_GPU_RTD3_GC6_SUPPORTED)) { - pSupported = "Not Supported"; - - if (!pGpu->getProperty(pGpu, PDB_PROP_GPU_UNIX_DYNAMIC_POWER_SUPPORTED)) - { - goto done; - } - - if (bGcxTypeGC6) - { - if (pGpu->getProperty(pGpu, PDB_PROP_GPU_RTD3_GC6_SUPPORTED)) - { - pSupported = "Supported"; - } - } - else - { - if ((pGpu->getProperty(pGpu, PDB_PROP_GPU_RTD3_GCOFF_SUPPORTED)) || - (pGpu->getProperty(pGpu, PDB_PROP_GPU_LEGACY_GCOFF_SUPPORTED))) - { - pSupported = "Supported"; - } - } - -done: - // UNLOCK: release per device lock - rmGpuGroupLockRelease(gpuMask, GPUS_LOCK_FLAGS_NONE); + return "Supported"; + } + } + else + { + if ((pGpu->getProperty(pGpu, PDB_PROP_GPU_RTD3_GCOFF_SUPPORTED)) || + (pGpu->getProperty(pGpu, PDB_PROP_GPU_LEGACY_GCOFF_SUPPORTED))) + { + return "Supported"; } - - //UNLOCK: release API lock - rmapiLockRelease(); } - threadStateFree(&threadState, THREAD_STATE_FLAGS_NONE); - NV_EXIT_RM_RUNTIME(sp,fp); - - return pSupported; + return "Not Supported"; } /*! @@ -2555,8 +2463,12 @@ NV_STATUS NV_API_CALL rm_transition_dynamic_power( status = rmGpuLocksAcquire(GPUS_LOCK_FLAGS_NONE, RM_LOCK_MODULES_DYN_POWER); if (status == NV_OK) { + rmapiEnterRtd3PmPath(); + status = RmTransitionDynamicPower(pGpu, bEnter, bTryAgain); + rmapiLeaveRtd3PmPath(); + // UNLOCK: release GPUs lock rmGpuLocksRelease(GPUS_LOCK_FLAGS_NONE, NULL); } @@ -2632,64 +2544,40 @@ void RmHandleDisplayChange( /*! * @brief: Function to query Dynamic Power Management * - * @param[in] sp nvidia_stack_t pointer. - * @param[in] pNv nv_state_t pointer. + * @param[in] nvp nv_priv_t pointer. * * @return String indicating Dynamic Power Management status. */ -const char* NV_API_CALL rm_get_dynamic_power_management_status( - nvidia_stack_t *sp, - nv_state_t *pNv +static const char* RmGetDynamicPowerManagementStatus( + nv_priv_t *nvp ) { - void *fp; - nv_priv_t *nvp = NV_GET_NV_PRIV(pNv); - const char *returnString = "?"; - - NV_ENTER_RM_RUNTIME(sp,fp); - - // LOCK: acquire API lock - if ((rmapiLockAcquire(API_LOCK_FLAGS_NONE, RM_LOCK_MODULES_DYN_POWER)) == NV_OK) + /* + * If the platform/driver does not support Dynamic Power Management, + * we set mode as NV_DYNAMIC_PM_NEVER. Hence, after RmInit if the + * mode is still NV_DYNAMIC_PM_FINE, we are sure that it is + * supported and enabled. Also see NOTE. + */ + if (nvp->dynamic_power.mode == NV_DYNAMIC_PM_FINE) { - OBJGPU *pGpu = NV_GET_NV_PRIV_PGPU(pNv); - - // Check if RM is inited - if (pGpu != NULL) - { - /* - * If the platform/driver does not support Dynamic Power Management, - * we set mode as NV_DYNAMIC_PM_NEVER. Hence, after RmInit if the - * mode is still NV_DYNAMIC_PM_FINE, we are sure that it is - * supported and enabled. Also see NOTE. - */ - if (nvp->dynamic_power.mode == NV_DYNAMIC_PM_FINE) - { - returnString = "Enabled (fine-grained)"; - } - else if (nvp->dynamic_power.mode == NV_DYNAMIC_PM_COARSE) - { - returnString = "Enabled (coarse-grained)"; - } - else if (nvp->dynamic_power.mode == NV_DYNAMIC_PM_NEVER) - { - - if (nvp->dynamic_power.dynamic_power_regkey == - NV_REG_DYNAMIC_POWER_MANAGEMENT_NEVER) - returnString = "Disabled"; - else if (nvp->dynamic_power.dynamic_power_regkey == - NV_REG_DYNAMIC_POWER_MANAGEMENT_DEFAULT) - returnString = "Disabled by default"; - else - returnString = "Not supported"; - } - } - //UNLOCK: release API lock - rmapiLockRelease(); + return "Enabled (fine-grained)"; + } + else if (nvp->dynamic_power.mode == NV_DYNAMIC_PM_COARSE) + { + return "Enabled (coarse-grained)"; } + else if (nvp->dynamic_power.mode == NV_DYNAMIC_PM_NEVER) + { - NV_EXIT_RM_RUNTIME(sp,fp); + if (nvp->dynamic_power.dynamic_power_regkey == + NV_REG_DYNAMIC_POWER_MANAGEMENT_NEVER) + return "Disabled"; + else if (nvp->dynamic_power.dynamic_power_regkey == + NV_REG_DYNAMIC_POWER_MANAGEMENT_DEFAULT) + return "Disabled by default"; + } - return returnString; + return "Not supported"; } static void RmHandleIdleSustained( @@ -2789,3 +2677,60 @@ RmInitS0ixPowerManagement( } } } + +void NV_API_CALL rm_get_power_info( + nvidia_stack_t *sp, + nv_state_t *pNv, + nv_power_info_t *powerInfo +) +{ + THREAD_STATE_NODE threadState; + void *fp; + GPU_MASK gpuMask; + const char *pVidmemPowerStatus = "?"; + const char *pGc6Supported = "?"; + const char *pGcoffSupported = "?"; + const char *pDynamicPowerStatus = "?"; + const char *pS0ixStatus = "?"; + + NV_ENTER_RM_RUNTIME(sp,fp); + threadStateInit(&threadState, THREAD_STATE_FLAGS_NONE); + + // LOCK: acquire API lock + if ((rmapiLockAcquire(API_LOCK_FLAGS_NONE, RM_LOCK_MODULES_DYN_POWER)) == NV_OK) + { + OBJGPU *pGpu = NV_GET_NV_PRIV_PGPU(pNv); + + // LOCK: acquire per device lock + if ((pGpu != NULL) && + ((rmGpuGroupLockAcquire(pGpu->gpuInstance, GPU_LOCK_GRP_SUBDEVICE, + GPUS_LOCK_FLAGS_NONE, RM_LOCK_MODULES_DYN_POWER, + &gpuMask)) == NV_OK)) + { + nv_priv_t *pNvp = NV_GET_NV_PRIV(pNv); + + pVidmemPowerStatus = pGpu->getProperty(pGpu, PDB_PROP_GPU_GCOFF_STATE_ENTERED) ? + "Off" : "Active"; + pDynamicPowerStatus = RmGetDynamicPowerManagementStatus(pNvp); + pGc6Supported = RmGetGpuGcxSupport(pGpu, NV_TRUE); + pGcoffSupported = RmGetGpuGcxSupport(pGpu, NV_FALSE); + pS0ixStatus = pNvp->s0ix_pm_enabled ? "Enabled" : "Disabled"; + + // UNLOCK: release per device lock + rmGpuGroupLockRelease(gpuMask, GPUS_LOCK_FLAGS_NONE); + } + + // UNLOCK: release API lock + rmapiLockRelease(); + } + + threadStateFree(&threadState, THREAD_STATE_FLAGS_NONE); + NV_EXIT_RM_RUNTIME(sp,fp); + + powerInfo->vidmem_power_status = pVidmemPowerStatus; + powerInfo->dynamic_power_status = pDynamicPowerStatus; + powerInfo->gc6_support = pGc6Supported; + powerInfo->gcoff_support = pGcoffSupported; + powerInfo->s0ix_status = pS0ixStatus; +} + diff --git a/src/nvidia/arch/nvalloc/unix/src/os-hypervisor.c b/src/nvidia/arch/nvalloc/unix/src/os-hypervisor.c index ee9f85b847..58698132b4 100644 --- a/src/nvidia/arch/nvalloc/unix/src/os-hypervisor.c +++ b/src/nvidia/arch/nvalloc/unix/src/os-hypervisor.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2014-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2014-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -55,6 +55,7 @@ static NV_STATUS nv_parse_config_params(const char *, const char *, const char, NvU32 *); + void hypervisorSetHypervVgpuSupported_IMPL(OBJHYPERVISOR *pHypervisor) { pHypervisor->bIsHypervVgpuSupported = NV_TRUE; @@ -73,7 +74,7 @@ NV_STATUS hypervisorInjectInterrupt_IMPL { NV_STATUS status = NV_ERR_NOT_SUPPORTED; - if (pVgpuNsIntr->pVgpuVfioRef) + if (osIsVgpuVfioPresent() == NV_TRUE) return NV_ERR_NOT_SUPPORTED; else { @@ -95,135 +96,6 @@ HYPERVISOR_TYPE NV_API_CALL nv_get_hypervisor_type(void) return hypervisorGetHypervisorType(pHypervisor); } -static NV_STATUS get_available_instances( - NvU32 *avail_instances, - nv_state_t *pNv, - VGPU_TYPE *vgpuTypeInfo, - NvU32 pgpuIndex, - NvU8 devfn -) -{ - NV_STATUS rmStatus = NV_OK; - OBJGPU *pGpu = NULL; - OBJSYS *pSys = SYS_GET_INSTANCE(); - KernelVgpuMgr *pKernelVgpuMgr = SYS_GET_KERNEL_VGPUMGR(pSys); - OBJHYPERVISOR *pHypervisor = SYS_GET_HYPERVISOR(pSys); - - *avail_instances = 0; - - pGpu = NV_GET_NV_PRIV_PGPU(pNv); - if (pGpu == NULL) - { - NV_PRINTF(LEVEL_ERROR, "%s GPU handle is not valid \n", __FUNCTION__); - rmStatus = NV_ERR_INVALID_STATE; - goto exit; - } - - /* TODO: Needs to have a proper fix this for DriverVM config */ - if (gpuIsSriovEnabled(pGpu) && - !(pHypervisor->getProperty(pHypervisor, PDB_PROP_HYPERVISOR_DRIVERVM_ENABLED))) - { - NvU8 fnId = devfn - pGpu->sriovState.firstVFOffset; - - if (fnId > 63) - { - NV_ASSERT(0); - rmStatus = NV_ERR_INVALID_ARGUMENT; - goto exit; - } - - if (IS_MIG_ENABLED(pGpu)) - { - if (IS_MIG_IN_USE(pGpu)) { - NvU64 swizzIdInUseMask = 0; - NvU32 partitionFlag = PARTITIONID_INVALID; - KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); - NvU32 id; - - swizzIdInUseMask = kmigmgrGetSwizzIdInUseMask(pGpu, pKernelMIGManager); - - if (!vgpuTypeInfo->gpuInstanceSize) - { - // Query for a non MIG vgpuType - NV_PRINTF(LEVEL_INFO, "%s Query for a non MIG vGPU type \n", - __FUNCTION__); - rmStatus = NV_OK; - goto exit; - } - - rmStatus = kvgpumgrGetPartitionFlag(vgpuTypeInfo->vgpuTypeId, - &partitionFlag); - if (rmStatus != NV_OK) - { - // Query for a non MIG vgpuType - NV_PRINTF(LEVEL_ERROR, "%s failed to get partition flags.\n", - __FUNCTION__); - goto exit; - } - - // Determine valid swizzids not assigned to any vGPU device. - FOR_EACH_INDEX_IN_MASK(64, id, swizzIdInUseMask) - { - KERNEL_MIG_GPU_INSTANCE *pKernelMIGGpuInstance; - NvU64 mask = 0; - - rmStatus = kmigmgrGetGPUInstanceInfo(pGpu, pKernelMIGManager, - id, &pKernelMIGGpuInstance); - if (rmStatus != NV_OK) - { - // Didn't find requested GPU instance - NV_PRINTF(LEVEL_ERROR, - "No valid GPU instance with SwizzId - %d found\n", id); - goto exit; - } - - mask = NVBIT64(id); - - if (pKernelMIGGpuInstance->partitionFlag == partitionFlag) - { - // Validate that same ID is not already set and VF is available - if (!(mask & pKernelVgpuMgr->pgpuInfo[pgpuIndex].assignedSwizzIdMask) && - !(pKernelVgpuMgr->pgpuInfo[pgpuIndex].createdVfMask & NVBIT64(fnId))) - { - *avail_instances = 1; - break; - } - } - } - FOR_EACH_INDEX_IN_MASK_END; - } - } - else - { - if (pKernelVgpuMgr->pgpuInfo[pgpuIndex].numCreatedVgpu < vgpuTypeInfo->maxInstance) - { - if (vgpuTypeInfo->gpuInstanceSize) - { - // Query for a MIG vgpuType - NV_PRINTF(LEVEL_INFO, "%s Query for a MIG vGPU type \n", - __FUNCTION__); - rmStatus = NV_OK; - goto exit; - } - - if (!(pKernelVgpuMgr->pgpuInfo[pgpuIndex].createdVfMask & NVBIT64(fnId))) - { - if (kvgpumgrCheckVgpuTypeCreatable(pGpu, &pKernelVgpuMgr->pgpuInfo[pgpuIndex], vgpuTypeInfo) == NV_OK) - *avail_instances = 1; - } - } - } - } - else - { - if (kvgpumgrCheckVgpuTypeCreatable(pGpu, &pKernelVgpuMgr->pgpuInfo[pgpuIndex], vgpuTypeInfo) == NV_OK) - *avail_instances = vgpuTypeInfo->maxInstance - pKernelVgpuMgr->pgpuInfo[pgpuIndex].numCreatedVgpu; - } - -exit: - return rmStatus; -} - #define MAX_STR_LEN 256 NV_STATUS NV_API_CALL nv_vgpu_get_type_info( nvidia_stack_t *sp, @@ -240,6 +112,7 @@ NV_STATUS NV_API_CALL nv_vgpu_get_type_info( NV_STATUS rmStatus = NV_OK; VGPU_TYPE *vgpuTypeInfo; NvU32 pgpuIndex, i, avail_instances = 0; + OBJGPU *pGpu = NULL; void *fp; NV_ENTER_RM_RUNTIME(sp,fp); @@ -262,24 +135,19 @@ NV_STATUS NV_API_CALL nv_vgpu_get_type_info( switch (type_info) { - case VGPU_TYPE_NAME: - os_snprintf(buffer, VGPU_STRING_BUFFER_SIZE, "%s\n", - vgpuTypeInfo->vgpuName); - break; - case VGPU_TYPE_DESCRIPTION: - os_snprintf(buffer, MAX_STR_LEN, - "num_heads=%d, frl_config=%d, " - "framebuffer=%lluM, max_resolution=%dx%d, max_instance=%d\n", - vgpuTypeInfo->numHeads, vgpuTypeInfo->frlConfig, - vgpuTypeInfo->profileSize >> 20, - vgpuTypeInfo->maxResolutionX, - vgpuTypeInfo->maxResolutionY, - vgpuTypeInfo->maxInstance); - break; case VGPU_TYPE_INSTANCES: - rmStatus = get_available_instances(&avail_instances, pNv, - vgpuTypeInfo, - pgpuIndex, devfn); + pGpu = NV_GET_NV_PRIV_PGPU(pNv); + if (pGpu == NULL) + { + NV_PRINTF(LEVEL_ERROR, "%s GPU handle is not valid \n", + __FUNCTION__); + rmStatus = NV_ERR_INVALID_STATE; + goto exit; + } + + rmStatus = kvgpumgrGetAvailableInstances(&avail_instances, pGpu, + vgpuTypeInfo, + pgpuIndex, devfn); if (rmStatus != NV_OK) goto exit; @@ -315,6 +183,7 @@ NV_STATUS NV_API_CALL nv_vgpu_get_type_ids( { THREAD_STATE_NODE threadState; OBJSYS *pSys = SYS_GET_INSTANCE(); + OBJGPU *pGpu = NULL; KernelVgpuMgr *pKernelVgpuMgr = SYS_GET_KERNEL_VGPUMGR(pSys); NV_STATUS rmStatus = NV_OK; NvU32 pgpuIndex, i, avail_instances = 0; @@ -355,9 +224,17 @@ NV_STATUS NV_API_CALL nv_vgpu_get_type_ids( continue; } - rmStatus = get_available_instances(&avail_instances, pNv, - vgpuTypeInfo, pgpuIndex, - devfn); + pGpu = NV_GET_NV_PRIV_PGPU(pNv); + if (pGpu == NULL) + { + NV_PRINTF(LEVEL_ERROR, "%s GPU handle is not valid \n", + __FUNCTION__); + goto exit; + } + + rmStatus = kvgpumgrGetAvailableInstances(&avail_instances, pGpu, + vgpuTypeInfo, pgpuIndex, + devfn); if (rmStatus != NV_OK) { NV_PRINTF(LEVEL_ERROR, "Failed to get available instances for vGPU ID: %d, status: 0x%x\n", @@ -374,6 +251,7 @@ NV_STATUS NV_API_CALL nv_vgpu_get_type_ids( } } +exit: // UNLOCK: release API lock rmapiLockRelease(); } @@ -517,79 +395,19 @@ static NV_STATUS is_bar_64bit( return rmStatus; } -NV_STATUS NV_API_CALL nv_vgpu_get_bar_info( - nvidia_stack_t *sp, - nv_state_t *pNv, - const NvU8 *pMdevUuid, - NvU64 *size, - NvU32 regionIndex, - void *pVgpuVfioRef, - NvBool *isBar64bit -) +static NV_STATUS +_nv_vgpu_get_bar_size(OBJGPU *pGpu, KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice, + NvU32 regionIndex, NvU64 *size, NvU8 *configParams) { - REQUEST_VGPU_INFO_NODE *pRequestVgpu = NULL; - THREAD_STATE_NODE threadState; - NV_STATUS rmStatus = NV_OK, status; - OBJGPU *pGpu = NULL; - KernelBus *pKernelBus; - KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice; - void *fp = NULL; - NvU32 value = 0; - OBJSYS *pSys = SYS_GET_INSTANCE(); - KernelVgpuMgr * pKernelVgpuMgr = SYS_GET_KERNEL_VGPUMGR(pSys); - - NV_ENTER_RM_RUNTIME(sp,fp); - threadStateInit(&threadState, THREAD_STATE_FLAGS_NONE); - - /* - * This function can be used to query both BAR 64bit state and/or BAR size - * If neither is queried, return with error. - */ - if ((size == NULL) && (isBar64bit == NULL)) - { - rmStatus = NV_ERR_INVALID_ARGUMENT; - goto exit; - } - - // LOCK: acquire API lock - NV_CHECK_OK_OR_GOTO(rmStatus, LEVEL_SILENT, rmapiLockAcquire(API_LOCK_FLAGS_NONE, RM_LOCK_MODULES_HYPERVISOR), exit); - - pGpu = NV_GET_NV_PRIV_PGPU(pNv); - if (pGpu == NULL) - { - NV_PRINTF(LEVEL_ERROR, "%s GPU handle is not valid \n", __FUNCTION__); - rmStatus = NV_ERR_INVALID_STATE; - goto release_lock; - } - - /* Get input BAR index 64bit state */ - if (isBar64bit != NULL) - { - NV_CHECK_OK_OR_GOTO(rmStatus, LEVEL_SILENT, - is_bar_64bit(pGpu, regionIndex, isBar64bit), release_lock); - - /* Query is only for BAR index 64bit state*/ - if (size == NULL) - goto release_lock; - } + OBJSYS *pSys = SYS_GET_INSTANCE(); + KernelVgpuMgr *pKernelVgpuMgr = SYS_GET_KERNEL_VGPUMGR(pSys); + NV_STATUS status; + KernelBus *pKernelBus; + NvU32 value = 0; pKernelBus = GPU_GET_KERNEL_BUS(pGpu); *size = kbusGetPciBarSize(pKernelBus, regionIndex); - NV_CHECK_OK_OR_GOTO(rmStatus, LEVEL_SILENT, - kvgpumgrGetHostVgpuDeviceFromMdevUuid(pNv->gpu_id, - pMdevUuid, - &pKernelHostVgpuDevice), release_lock); - - pRequestVgpu = pKernelHostVgpuDevice->pRequestVgpuInfoNode; - if (pRequestVgpu == NULL) - { - rmStatus = NV_ERR_INVALID_POINTER; - goto release_lock; - } - - pKernelHostVgpuDevice->pVgpuVfioRef = pVgpuVfioRef; - if (regionIndex == NV_VFIO_PCI_BAR1_REGION_INDEX) { VGPU_TYPE *vgpuTypeInfo; @@ -597,30 +415,30 @@ NV_STATUS NV_API_CALL nv_vgpu_get_bar_info( NvBool bOverrideBar1Size = NV_FALSE; // Read BAR1 length from vgpuTypeInfo - NV_CHECK_OK_OR_GOTO(rmStatus, LEVEL_SILENT, - kvgpumgrGetVgpuTypeInfo(pKernelHostVgpuDevice->vgpuType, &vgpuTypeInfo), release_lock); - - *size = vgpuTypeInfo->bar1Length << 20; + NV_ASSERT_OK_OR_RETURN(kvgpumgrGetVgpuTypeInfo(pKernelHostVgpuDevice->vgpuType, + &vgpuTypeInfo)); - NV_CHECK_OK_OR_GOTO(rmStatus, LEVEL_SILENT, - kvgpumgrGetPgpuIndex(pKernelVgpuMgr, pNv->gpu_id, &pgpuIndex), release_lock); + *size = vgpuTypeInfo->bar1Length << 20; + NV_ASSERT_OK_OR_RETURN(kvgpumgrGetPgpuIndex(pKernelVgpuMgr, pGpu->gpuId, &pgpuIndex)); - /* + /* * check for 'override_bar1_size' param in vgpuExtraParams list first, * if param is missing there then check it in vgpu_params list */ status = nv_parse_config_params((const char*)vgpuTypeInfo->vgpuExtraParams, "override_bar1_size", ';', &value); - - if (status == NV_OK && value) { + if (status == NV_OK && value) + { bOverrideBar1Size = NV_TRUE; - } else if (status == NV_ERR_OBJECT_NOT_FOUND) { - status = nv_parse_config_params(pRequestVgpu->configParams, + } + else if (status == NV_ERR_OBJECT_NOT_FOUND) + { + status = nv_parse_config_params((const char *)configParams, "override_bar1_size", ',', &value); if (status == NV_OK && value) bOverrideBar1Size = NV_TRUE; } - + if (gpuIsVfResizableBAR1Supported(pGpu)) { if ((*size > pGpu->sriovState.vfBarSize[1]) || @@ -628,13 +446,14 @@ NV_STATUS NV_API_CALL nv_vgpu_get_bar_info( { *size = pGpu->sriovState.vfBarSize[1]; } - } + } - if (bOverrideBar1Size) { + if (bOverrideBar1Size) + { NvU64 bar1SizeInBytes, guestBar1; NvU64 gpuBar1LowerLimit = 256 * 1024 * 1024; // bar1 lower limit for override_bar1_length parameter - bar1SizeInBytes = kbusGetPciBarSize(pKernelBus, NV_VFIO_PCI_BAR1_REGION_INDEX); + if (pKernelVgpuMgr->pgpuInfo[pgpuIndex].sriovEnabled) { *size = pGpu->sriovState.vfBarSize[1]; @@ -649,7 +468,7 @@ NV_STATUS NV_API_CALL nv_vgpu_get_bar_info( else if (regionIndex == NV_VFIO_PCI_BAR2_REGION_INDEX || regionIndex == NV_VFIO_PCI_BAR3_REGION_INDEX) { - status = nv_parse_config_params(pRequestVgpu->configParams, + status = nv_parse_config_params((const char *)configParams, "address64", ',', &value); if ((status != NV_OK) || ((status == NV_OK) && (value != 0))) @@ -661,6 +480,48 @@ NV_STATUS NV_API_CALL nv_vgpu_get_bar_info( } } + return NV_OK; +} + +NV_STATUS NV_API_CALL nv_vgpu_get_bar_info +( + nvidia_stack_t *sp, + nv_state_t *pNv, + const NvU8 *pMdevUuid, + NvU64 *barSizes, + NvU64 *sparseOffsets, + NvU64 *sparseSizes, + NvU32 *sparseCount, + NvBool *isBar064bit, + NvU8 *configParams +) +{ + THREAD_STATE_NODE threadState; + NV_STATUS rmStatus = NV_OK; + OBJGPU *pGpu = NULL; + void *fp = NULL; + + NV_ENTER_RM_RUNTIME(sp,fp); + threadStateInit(&threadState, THREAD_STATE_FLAGS_NONE); + + // LOCK: acquire API lock + NV_CHECK_OK_OR_GOTO(rmStatus, LEVEL_SILENT, + rmapiLockAcquire(API_LOCK_FLAGS_NONE, RM_LOCK_MODULES_HYPERVISOR), exit); + + pGpu = NV_GET_NV_PRIV_PGPU(pNv); + if (pGpu == NULL) + { + NV_PRINTF(LEVEL_ERROR, "%s GPU handle is not valid \n", __FUNCTION__); + rmStatus = NV_ERR_INVALID_STATE; + goto release_lock; + } + + NV_CHECK_OK_OR_GOTO(rmStatus, LEVEL_SILENT, + nv_vgpu_rm_get_bar_info(pGpu, pMdevUuid, barSizes, + sparseOffsets, sparseSizes, + sparseCount, isBar064bit, + configParams), + release_lock); release_lock: // UNLOCK: release API lock rmapiLockRelease(); @@ -737,48 +598,6 @@ NV_STATUS NV_API_CALL nv_vgpu_get_hbm_info( return rmStatus; } -NV_STATUS osVgpuVfioWake( - void *waitQueue -) -{ - vgpu_vfio_info vgpu_info; - - vgpu_info.waitQueue = waitQueue; - - return os_call_vgpu_vfio((void *) &vgpu_info, CMD_VGPU_VFIO_WAKE_WAIT_QUEUE); -} - -NV_STATUS NV_API_CALL nv_vgpu_start( - nvidia_stack_t *sp, - const NvU8 *pMdevUuid, - void *waitQueue, - NvS32 *returnStatus, - NvU8 *vmName, - NvU32 qemuPid -) -{ - THREAD_STATE_NODE threadState; - NV_STATUS rmStatus = NV_OK; - void *fp = NULL; - - NV_ENTER_RM_RUNTIME(sp,fp); - threadStateInit(&threadState, THREAD_STATE_FLAGS_NONE); - - // LOCK: acquire API lock - if ((rmStatus = rmapiLockAcquire(API_LOCK_FLAGS_NONE, RM_LOCK_MODULES_HYPERVISOR)) == NV_OK) - { - rmStatus = kvgpumgrStart(pMdevUuid, waitQueue, returnStatus, - vmName, qemuPid); - - // UNLOCK: release API lock - rmapiLockRelease(); - } - threadStateFree(&threadState, THREAD_STATE_FLAGS_NONE); - NV_EXIT_RM_RUNTIME(sp,fp); - - return rmStatus; -} - static NV_STATUS nv_parse_config_params( const char *config_params, const char *key, @@ -815,216 +634,159 @@ static NV_STATUS nv_parse_config_params( return rmStatus; } -NV_STATUS NV_API_CALL nv_vgpu_get_sparse_mmap( - nvidia_stack_t *sp , - nv_state_t *pNv, - const NvU8 *pMdevUuid, - NvU64 **offsets, - NvU64 **sizes, - NvU32 *numAreas +static NV_STATUS _nv_vgpu_get_sparse_mmap( + OBJGPU *pGpu, + KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice, + NvU64 *offsets, + NvU64 *sizes, + NvU32 *numAreas, + NvU8 *configParams ) { - THREAD_STATE_NODE threadState; - NV_STATUS rmStatus = NV_ERR_INVALID_STATE, status; - OBJGPU *pGpu = NULL; - OBJTMR *pTmr = NULL; - KernelFifo *pKernelFifo = NULL; - void *fp = NULL; - REQUEST_VGPU_INFO_NODE *pRequestVgpu = NULL; - KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice; - NvU32 bar0TmrMapSize = 0, bar0FifoMapSize = 0, value = 0; - NvU64 bar0TmrMapOffset = 0, bar0FifoMapOffset = 0; - NvU64 *vfRegionSizes = NULL; - NvU64 *vfRegionOffsets = NULL; - KernelBif *pKernelBif = NULL; + NV_STATUS rmStatus = NV_OK, status; + OBJTMR *pTmr = GPU_GET_TIMER(pGpu);; + KernelFifo *pKernelFifo = GPU_GET_KERNEL_FIFO(pGpu);; + KernelBif *pKernelBif = GPU_GET_KERNEL_BIF(pGpu); + NvU32 value = 0; - - NV_ENTER_RM_RUNTIME(sp,fp); - threadStateInit(&threadState, THREAD_STATE_FLAGS_NONE); - - // LOCK: acquire API lock - if ((rmStatus = rmapiLockAcquire(API_LOCK_FLAGS_NONE, RM_LOCK_MODULES_HYPERVISOR)) == NV_OK) + *numAreas = 0; + if (pKernelHostVgpuDevice->gfid != 0) { - pGpu = NV_GET_NV_PRIV_PGPU(pNv); - - if (pGpu == NULL) - { - rmStatus = NV_ERR_INVALID_STATE; - goto cleanup; - } - pTmr = GPU_GET_TIMER(pGpu); - pKernelFifo = GPU_GET_KERNEL_FIFO(pGpu); - pKernelBif = GPU_GET_KERNEL_BIF(pGpu); - *numAreas = 0; - rmStatus = kvgpumgrGetHostVgpuDeviceFromMdevUuid(pNv->gpu_id, pMdevUuid, - &pKernelHostVgpuDevice); + rmStatus = kbifGetVFSparseMmapRegions_HAL(pGpu, pKernelBif, pKernelHostVgpuDevice, + os_page_size, numAreas, NULL, NULL); if (rmStatus == NV_OK) { - if (pKernelHostVgpuDevice->gfid != 0) + if (*numAreas > NVA081_MAX_SPARSE_REGION_COUNT) { - rmStatus = kbifGetVFSparseMmapRegions_HAL(pGpu, pKernelBif, pKernelHostVgpuDevice, os_page_size, - numAreas, NULL, NULL); - if (rmStatus == NV_OK) - { - rmStatus = os_alloc_mem((void **)&vfRegionOffsets, sizeof(NvU64) * (*numAreas)); - if (rmStatus != NV_OK) - goto cleanup; + NV_PRINTF(LEVEL_ERROR, "Not enough space for sparse mmap region info\n"); + return NV_ERR_INSUFFICIENT_RESOURCES; + } - rmStatus = os_alloc_mem((void **)&vfRegionSizes, sizeof (NvU64) * (*numAreas)); - if (rmStatus != NV_OK) - { - os_free_mem(vfRegionOffsets); - goto cleanup; - } - if (vfRegionOffsets && vfRegionSizes) - { - rmStatus = kbifGetVFSparseMmapRegions_HAL(pGpu, pKernelBif, pKernelHostVgpuDevice, os_page_size, - numAreas, vfRegionOffsets, vfRegionSizes); - if (rmStatus == NV_OK) - { - *offsets = vfRegionOffsets; - *sizes = vfRegionSizes; - } - else - { - os_free_mem(vfRegionOffsets); - os_free_mem(vfRegionSizes); - } - } - else - { - if (vfRegionOffsets != NULL) - os_free_mem(vfRegionOffsets); + rmStatus = kbifGetVFSparseMmapRegions_HAL(pGpu, pKernelBif, pKernelHostVgpuDevice, os_page_size, + numAreas, offsets, sizes); + if (rmStatus != NV_OK) + return rmStatus; + } + } + else + { + status = nv_parse_config_params((const char *)configParams, + "direct_gpu_timer_access", ',', &value); + if ((status == NV_OK) && (value != 0)) + { + NvU64 offset = 0; + NvU32 size = 0; - if (vfRegionSizes != NULL) - os_free_mem(vfRegionSizes); + rmStatus = tmrGetTimerBar0MapInfo_HAL(pGpu, pTmr, &offset, &size); - rmStatus = NV_ERR_INSUFFICIENT_RESOURCES; - } - } - } - else + if (rmStatus == NV_OK) { - pRequestVgpu = pKernelHostVgpuDevice->pRequestVgpuInfoNode; - if (pRequestVgpu == NULL) - { - rmStatus = NV_ERR_INVALID_POINTER; - goto cleanup; - } + offsets[*numAreas] = offset; + sizes[*numAreas] = size; + (*numAreas)++; + } + } - status = nv_parse_config_params(pRequestVgpu->configParams, "direct_gpu_timer_access", ',', &value); - if ((status == NV_OK) && (value != 0)) - { - rmStatus = tmrGetTimerBar0MapInfo_HAL(pGpu, pTmr, - &bar0TmrMapOffset, - &bar0TmrMapSize); - if (rmStatus == NV_OK) - (*numAreas)++; - else - NV_PRINTF(LEVEL_ERROR, - "%s Failed to get NV_PTIMER region \n", - __FUNCTION__); - } + value = 0; + { + NvU64 offset = 0; + NvU32 size = 0; - value = 0; - { - status = kfifoGetUsermodeMapInfo_HAL(pGpu, pKernelFifo, - &bar0FifoMapOffset, - &bar0FifoMapSize); - if (status == NV_OK) - (*numAreas)++; - } + status = kfifoGetUsermodeMapInfo_HAL(pGpu, pKernelFifo, &offset, &size); - if (*numAreas != 0) - { - NvU32 i = 0; - NvU64 *tmpOffset, *tmpSize; - rmStatus = os_alloc_mem((void **)offsets, sizeof(NvU64) * (*numAreas)); - if (rmStatus != NV_OK) - goto cleanup; + if (status == NV_OK) + { + offsets[*numAreas] = offset; + sizes[*numAreas] = size; + (*numAreas)++; + } + } + } - rmStatus = os_alloc_mem((void **)sizes, sizeof (NvU64) * (*numAreas)); - if (rmStatus != NV_OK) - { - os_free_mem(*offsets); - goto cleanup; - } + return rmStatus; +} - tmpOffset = *offsets; - tmpSize = *sizes; +NV_STATUS nv_vgpu_rm_get_bar_info +( + OBJGPU *pGpu, + const NvU8 *pMdevUuid, + NvU64 *barSizes, + NvU64 *sparseOffsets, + NvU64 *sparseSizes, + NvU32 *sparseCount, + NvBool *isBar064bit, + NvU8 *configParams +) +{ + KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice; + NV_STATUS rmStatus; + NvU32 i = 0; - if (bar0TmrMapSize != 0) - { - tmpOffset[i] = bar0TmrMapOffset; - tmpSize[i] = bar0TmrMapSize; - i++; - } + NV_CHECK_OK_OR_GOTO(rmStatus, LEVEL_SILENT, + is_bar_64bit(pGpu, NV_VFIO_PCI_BAR0_REGION_INDEX, isBar064bit), + exit); - if (bar0FifoMapSize != 0) - { - tmpOffset[i] = bar0FifoMapOffset; - tmpSize[i] = bar0FifoMapSize; - } - } - } + NV_CHECK_OK_OR_GOTO(rmStatus, LEVEL_SILENT, + kvgpumgrGetHostVgpuDeviceFromMdevUuid(pGpu->gpuId, + pMdevUuid, + &pKernelHostVgpuDevice), + exit); + + for (i = 0; i < NVA081_MAX_BAR_REGION_COUNT; i++) + { + /* + * For SRIOV, only VF BAR1 is queried via RM, others BARs are directly + * queried via VF config space in vgpu-vfio + */ + if (gpuIsSriovEnabled(pGpu) && (i != NV_VFIO_PCI_BAR1_REGION_INDEX)) + { + barSizes[i] = 0; + continue; } -cleanup: - // UNLOCK: release API lock - rmapiLockRelease(); + rmStatus = _nv_vgpu_get_bar_size(pGpu, pKernelHostVgpuDevice, i, + &barSizes[i], configParams); + if (rmStatus != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "Failed to query BAR size for index %u 0x%x\n", + i, rmStatus); + goto exit; + } } - threadStateFree(&threadState, THREAD_STATE_FLAGS_NONE); - NV_EXIT_RM_RUNTIME(sp,fp); + NV_CHECK_OK_OR_GOTO(rmStatus, LEVEL_SILENT, + _nv_vgpu_get_sparse_mmap(pGpu, pKernelHostVgpuDevice, + sparseOffsets, sparseSizes, + sparseCount, configParams), + exit); +exit: return rmStatus; } -NV_STATUS NV_API_CALL nv_vgpu_update_request( - nvidia_stack_t *sp , - const NvU8 *pMdevUuid, - VGPU_DEVICE_STATE deviceState, - NvU64 *offsets, - NvU64 *sizes, - const char *configParams +NV_STATUS NV_API_CALL nv_gpu_unbind_event +( + nvidia_stack_t *sp, + NvU32 gpuId, + NvBool *isEventNotified ) { THREAD_STATE_NODE threadState; - NV_STATUS rmStatus = NV_ERR_OBJECT_NOT_FOUND; + NV_STATUS rmStatus = NV_OK; void *fp = NULL; - REQUEST_VGPU_INFO_NODE *pRequestVgpu = NULL; - OBJSYS *pSys = SYS_GET_INSTANCE(); - KernelVgpuMgr *pKernelVgpuMgr = SYS_GET_KERNEL_VGPUMGR(pSys); NV_ENTER_RM_RUNTIME(sp,fp); threadStateInit(&threadState, THREAD_STATE_FLAGS_NONE); - if (offsets != NULL) - os_free_mem(offsets); - - if (sizes != NULL) - os_free_mem(sizes); - // LOCK: acquire API lock if ((rmStatus = rmapiLockAcquire(API_LOCK_FLAGS_NONE, RM_LOCK_MODULES_HYPERVISOR)) == NV_OK) { - for (pRequestVgpu = listHead(&pKernelVgpuMgr->listRequestVgpuHead); - pRequestVgpu != NULL; - pRequestVgpu = listNext(&pKernelVgpuMgr->listRequestVgpuHead, pRequestVgpu)) - { - if (portMemCmp(pRequestVgpu->mdevUuid, pMdevUuid, VGPU_UUID_SIZE) == 0) - { - - if (configParams != NULL) - portStringCopy(pRequestVgpu->configParams, - sizeof(pRequestVgpu->configParams), - configParams, (portStringLength(configParams) + 1)); - - pRequestVgpu->deviceState = deviceState; - rmStatus = NV_OK; - } - } + /* + * Send gpu_id in "status" field of the event so that nvidia-vgpu-mgr + * daemon knows which GPU is being unbound + */ + CliAddSystemEvent(NV0000_NOTIFIERS_GPU_UNBIND_EVENT, gpuId, isEventNotified); // UNLOCK: release API lock rmapiLockRelease(); @@ -1050,7 +812,7 @@ NV_STATUS NV_API_CALL nv_gpu_bind_event( // LOCK: acquire API lock if ((rmStatus = rmapiLockAcquire(API_LOCK_FLAGS_NONE, RM_LOCK_MODULES_HYPERVISOR)) == NV_OK) { - CliAddSystemEvent(NV0000_NOTIFIERS_GPU_BIND_EVENT, 0); + CliAddSystemEvent(NV0000_NOTIFIERS_GPU_BIND_EVENT, 0, NULL); // UNLOCK: release API lock rmapiLockRelease(); @@ -1062,117 +824,33 @@ NV_STATUS NV_API_CALL nv_gpu_bind_event( return rmStatus; } -NV_STATUS osVgpuInjectInterrupt(void *vgpuVfioRef) +NV_STATUS osIsVgpuVfioPresent(void) { vgpu_vfio_info vgpu_info; - vgpu_info.vgpuVfioRef = vgpuVfioRef; - - return os_call_vgpu_vfio((void *) &vgpu_info, CMD_VGPU_VFIO_INJECT_INTERRUPT); -} - -NV_STATUS osVgpuRegisterMdev -( - OS_GPU_INFO *pOsGpuInfo -) -{ - NV_STATUS status = NV_OK; - vgpu_vfio_info vgpu_info = {0}; - OBJSYS *pSys = SYS_GET_INSTANCE(); - KernelVgpuMgr *pKernelVgpuMgr = SYS_GET_KERNEL_VGPUMGR(pSys); - KERNEL_PHYS_GPU_INFO *pPhysGpuInfo; - NvU32 pgpuIndex, i; - OBJHYPERVISOR *pHypervisor = SYS_GET_HYPERVISOR(pSys); - - status = kvgpumgrGetPgpuIndex(pKernelVgpuMgr, pOsGpuInfo->gpu_id, &pgpuIndex); - if (status != NV_OK) - return status; - - pPhysGpuInfo = &(pKernelVgpuMgr->pgpuInfo[pgpuIndex]); - - vgpu_info.numVgpuTypes = pKernelVgpuMgr->pgpuInfo[pgpuIndex].numVgpuTypes; - - status = os_alloc_mem((void **)&vgpu_info.vgpuTypeIds, - ((vgpu_info.numVgpuTypes) * sizeof(NvU32))); - if (status != NV_OK) - goto free_mem; - - status = os_alloc_mem((void **)&vgpu_info.vgpuNames, - ((vgpu_info.numVgpuTypes) * sizeof(char *))); - if (status != NV_OK) - goto free_mem; - - vgpu_info.nv = pOsGpuInfo; - for (i = 0; i < pPhysGpuInfo->numVgpuTypes; i++) - { - status = os_alloc_mem((void *)&vgpu_info.vgpuNames[i], (VGPU_STRING_BUFFER_SIZE * sizeof(char))); - if (status != NV_OK) - goto free_mem; - - vgpu_info.vgpuTypeIds[i] = pPhysGpuInfo->vgpuTypes[i]->vgpuTypeId; - os_snprintf((char *) vgpu_info.vgpuNames[i], VGPU_STRING_BUFFER_SIZE, "%s\n", pPhysGpuInfo->vgpuTypes[i]->vgpuName); - } - - if ((!pPhysGpuInfo->sriovEnabled) || - (pHypervisor->getProperty(pHypervisor, PDB_PROP_HYPERVISOR_DRIVERVM_ENABLED))) - { - vgpu_info.is_virtfn = NV_FALSE; - status = os_call_vgpu_vfio((void *)&vgpu_info, CMD_VGPU_VFIO_REGISTER_MDEV); - } - else - { - for (i = 0; i < MAX_VF_COUNT_PER_GPU; i++) - { - if (pPhysGpuInfo->vfPciInfo[i].isNvidiaAttached) - { - vgpu_info.is_virtfn = NV_TRUE; - vgpu_info.domain = pPhysGpuInfo->vfPciInfo[i].domain; - vgpu_info.bus = pPhysGpuInfo->vfPciInfo[i].bus; - vgpu_info.slot = pPhysGpuInfo->vfPciInfo[i].slot; - vgpu_info.function = pPhysGpuInfo->vfPciInfo[i].function; - - status = os_call_vgpu_vfio((void *)&vgpu_info, CMD_VGPU_VFIO_REGISTER_MDEV); - if (status == NV_OK) - { - pPhysGpuInfo->vfPciInfo[i].isMdevAttached = NV_TRUE; - } - } - } - } - -free_mem: - if (vgpu_info.vgpuTypeIds) - os_free_mem(vgpu_info.vgpuTypeIds); - - if (vgpu_info.vgpuNames) - { - for (i = 0; i < pPhysGpuInfo->numVgpuTypes; i++) - { - if (vgpu_info.vgpuNames[i]) - { - os_free_mem(vgpu_info.vgpuNames[i]); - } - } - os_free_mem(vgpu_info.vgpuNames); - } - - return status; + return os_call_vgpu_vfio((void *) &vgpu_info, CMD_VGPU_VFIO_PRESENT); } -NV_STATUS osIsVgpuVfioPresent(void) +NV_STATUS osIsVfioPciCorePresent(void) { vgpu_vfio_info vgpu_info; - return os_call_vgpu_vfio((void *) &vgpu_info, CMD_VGPU_VFIO_PRESENT); + return os_call_vgpu_vfio((void *) &vgpu_info, CMD_VFIO_PCI_CORE_PRESENT); } -NV_STATUS osIsVfioPciCorePresent(void) +void osWakeRemoveVgpu(NvU32 gpuId, NvU32 returnStatus) { vgpu_vfio_info vgpu_info; - return os_call_vgpu_vfio((void *) &vgpu_info, CMD_VFIO_PCI_CORE_PRESENT); + vgpu_info.return_status = returnStatus; + vgpu_info.domain = gpuDecodeDomain(gpuId); + vgpu_info.bus = gpuDecodeBus(gpuId); + vgpu_info.device = gpuDecodeDevice(gpuId); + + os_call_vgpu_vfio((void *)&vgpu_info, CMD_VFIO_WAKE_REMOVE_GPU); } + NvU32 osGetGridCspSupport(void) { return os_get_grid_csp_support(); diff --git a/src/nvidia/arch/nvalloc/unix/src/os.c b/src/nvidia/arch/nvalloc/unix/src/os.c index b565b8a097..adec2df91a 100644 --- a/src/nvidia/arch/nvalloc/unix/src/os.c +++ b/src/nvidia/arch/nvalloc/unix/src/os.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1999-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1999-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -345,11 +345,13 @@ static NV_STATUS setNumaPrivData MEMORY_DESCRIPTOR *pMemDesc ) { - NV_STATUS rmStatus = NV_OK; - void *pAllocPrivate = NULL; - NvU64 *addrArray = NULL; - NvU64 numPages = pMemDesc->PageCount; - NvU64 i; + NV_STATUS rmStatus = NV_OK; + void *pAllocPrivate = NULL; + NvU64 *addrArray = NULL; + NvU64 numPages = pMemDesc->PageCount; + NvU64 numOsPages = numPages; + RmPhysAddr *pteArray = memdescGetPteArray(pMemDesc, AT_CPU); + NvU64 i; addrArray = portMemAllocNonPaged(numPages * sizeof(NvU64)); if (addrArray == NULL) @@ -357,24 +359,45 @@ static NV_STATUS setNumaPrivData return NV_ERR_NO_MEMORY; } - portMemCopy((void*)addrArray, - (numPages * sizeof(NvU64)), - (void*)memdescGetPteArray(pMemDesc, AT_CPU), - (numPages * sizeof(NvU64))); - if (NV_RM_PAGE_SIZE < os_page_size) { - RmDeflateRmToOsPageArray(addrArray, numPages); - numPages = NV_RM_PAGES_TO_OS_PAGES(numPages); + numOsPages = NV_RM_PAGES_TO_OS_PAGES(numPages); } - for (i = 0; i < numPages; i++) + if (!memdescGetContiguity(pMemDesc, AT_CPU)) { - // Update GPA to system physical address - addrArray[i] += pKernelMemorySystem->coherentCpuFbBase; + portMemCopy((void*)addrArray, + (numPages * sizeof(NvU64)), + (void*)pteArray, + (numPages * sizeof(NvU64))); + + if (NV_RM_PAGE_SIZE < os_page_size) + { + RmDeflateRmToOsPageArray(addrArray, numPages); + } + + for (i = 0; i < numOsPages; i++) + { + // Update GPA to system physical address + addrArray[i] += pKernelMemorySystem->coherentCpuFbBase; + } } + else + { + // + // Original PTE array in contiguous memdesc only holds start address. + // We need to fill the OS page array with adjacent page addresses to + // map contiguously. + // + NvU64 offset = pteArray[0] + pKernelMemorySystem->coherentCpuFbBase; - rmStatus = nv_register_phys_pages(nv, addrArray, numPages, NV_MEMORY_CACHED, &pAllocPrivate); + for (i = 0; i < numOsPages; i++, offset += os_page_size) + { + addrArray[i] = offset; + } + } + + rmStatus = nv_register_phys_pages(nv, addrArray, numOsPages, NV_MEMORY_CACHED, &pAllocPrivate); if (rmStatus != NV_OK) { goto errors; @@ -445,7 +468,7 @@ NV_STATUS osMapSystemMemory void *pAddress; void *pPrivate = NULL; NvU64 pageIndex; - NvU32 pageOffset; + NvU32 pageOffset = (Offset & ~os_page_mask); if (pGpu != NULL && pGpu->getProperty(pGpu, PDB_PROP_GPU_COHERENT_CPU_MAPPING) && @@ -456,6 +479,8 @@ NV_STATUS osMapSystemMemory rmStatus = setNumaPrivData(pKernelMemorySystem, nv, pMemDesc); if (rmStatus != NV_OK) return rmStatus; + + pageOffset = memdescGetPhysAddr(pMemDesc, FORCE_VMMU_TRANSLATION(pMemDesc, AT_GPU), Offset) & ~os_page_mask; } *ppAddress = NvP64_NULL; @@ -467,7 +492,6 @@ NV_STATUS osMapSystemMemory return NV_ERR_INVALID_ARGUMENT; pageIndex = (Offset >> os_page_shift); - pageOffset = (Offset & ~os_page_mask); pAllocPrivate = memdescGetMemData(pMemDesc); if (!pAllocPrivate) @@ -716,8 +740,8 @@ NV_STATUS osQueueWorkItemWithFlags( pWi->flags |= OS_QUEUE_WORKITEM_FLAGS_LOCK_SEMA; if (flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_API_RW) pWi->flags |= OS_QUEUE_WORKITEM_FLAGS_LOCK_API_RW; - if (flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS_RW) - pWi->flags |= OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS_RW; + if (flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS) + pWi->flags |= OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS; if (flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_DEVICE_RW) pWi->flags |= OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_DEVICE_RW; if (flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_SUBDEVICE_RW) @@ -814,6 +838,7 @@ NV_STATUS osAllocPagesInternal( NV_STATUS status; NvS32 nodeId = NV0000_CTRL_NO_NUMA_NODE; NV_ADDRESS_SPACE addrSpace = memdescGetAddressSpace(pMemDesc); + NvU64 pageSize = osGetPageSize(); memdescSetAddress(pMemDesc, NvP64_NULL); memdescSetMemData(pMemDesc, NULL, NULL); @@ -832,6 +857,7 @@ NV_STATUS osAllocPagesInternal( status = nv_alias_pages( NV_GET_NV_STATE(pGpu), NV_RM_PAGES_TO_OS_PAGES(pMemDesc->PageCount), + pageSize, memdescGetContiguity(pMemDesc, AT_CPU), memdescGetCpuCacheAttrib(pMemDesc), memdescGetGuestId(pMemDesc), @@ -869,8 +895,6 @@ NV_STATUS osAllocPagesInternal( } else { - NvU64 pageSize = osGetPageSize(); - // // Bug 4270864: Only non-contig EGM memory needs to specify order. Contig memory // calculates it within nv_alloc_pages. The long term goal is to expand the ability @@ -1809,6 +1833,7 @@ void osGetTimeoutParams(OBJGPU *pGpu, NvU32 *pTimeoutUs, NvU32 *pScale, NvU32 *p { *pScale = 60; // 1s -> 1m } + return; } @@ -2712,24 +2737,6 @@ void osModifyGpuSwStatePersistence } } -NV_STATUS -osSystemGetBatteryDrain(NvS32 *pChargeRate) -{ - NV_PRINTF(LEVEL_WARNING, "%s: Platform not supported!\n", __FUNCTION__); - return NV_ERR_NOT_SUPPORTED; -} - -NV_STATUS -osPexRecoveryCallback -( - OS_GPU_INFO *pOsGpuInfo, - OS_PEX_RECOVERY_STATUS Status -) -{ - NV_ASSERT_FAILED("Not supported"); - return NV_ERR_NOT_SUPPORTED; -} - // //osCallACPI_MXDS // @@ -2864,67 +2871,6 @@ NV_STATUS osGetVersion(NvU32 *majorVer, NvU32 *minorVer, NvU32 *buildNum, NvU16 return rmStatus; } -NV_STATUS -osGetSystemCpuLogicalCoreCounts -( - NvU32 *pCpuCoreCount -) -{ - return NV_ERR_NOT_SUPPORTED; -} - -NV_STATUS -osGetSystemCpuC0AndAPerfCounters -( - NvU32 coreIndex, - POS_CPU_CORE_PERF_COUNTERS pCpuPerfData -) -{ - return NV_ERR_NOT_SUPPORTED; -} - -void -osEnableCpuPerformanceCounters -( - OBJOS *pOS -) -{ - NV_ASSERT_FAILED("Not supported"); - return; -} - -NV_STATUS -osCpuDpcObjInit -( - void **ppCpuDpcObj, - OBJGPU *pGpu, - NvU32 coreCount -) -{ - NV_ASSERT_FAILED("Not supported"); - return NV_ERR_NOT_SUPPORTED; -} - -void -osCpuDpcObjQueue -( - void **ppCpuDpcObj, - NvU32 coreCount, - POS_CPU_CORE_PERF_COUNTERS pCpuPerfData -) -{ - NV_ASSERT_FAILED("Not supported"); -} - -void -osCpuDpcObjFree -( - void **ppCpuDpcObj -) -{ - NV_ASSERT_FAILED("Not supported"); -} - NV_STATUS osGetCarveoutInfo ( @@ -3240,10 +3186,16 @@ osIovaMap KernelMemorySystem *pRootKernelMemorySystem = GPU_GET_KERNEL_MEMORY_SYSTEM(pRootMemDesc->pGpu); if (bIsIndirectPeerMapping) { + // + // If the first page from the memdesc is in FB then the remaining pages + // should also be in FB. If the memdesc is contiguous, check that it is + // contained within the coherent CPU FB range. memdescGetNvLinkGpa() + // will check that each page is in FB to handle the discontiguous case. + // NvU64 atsBase = base + pRootKernelMemorySystem->coherentCpuFbBase; + NvU64 atsEnd = bIsContig ? (atsBase + pIovaMapping->pPhysMemDesc->Size) : atsBase; if ((atsBase >= pRootKernelMemorySystem->coherentCpuFbBase) && - (atsBase + pIovaMapping->pPhysMemDesc->Size <= - pRootKernelMemorySystem->coherentCpuFbEnd)) + (atsEnd <= pRootKernelMemorySystem->coherentCpuFbEnd)) { bIsFbOffset = NV_TRUE; } diff --git a/src/nvidia/arch/nvalloc/unix/src/osapi.c b/src/nvidia/arch/nvalloc/unix/src/osapi.c index e24c563929..fd31246618 100644 --- a/src/nvidia/arch/nvalloc/unix/src/osapi.c +++ b/src/nvidia/arch/nvalloc/unix/src/osapi.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1999-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1999-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -606,7 +606,7 @@ static void RmExecuteWorkItem( NvU32 releaseLocks = 0; if (!(pWi->flags & NV_WORK_ITEM_FLAGS_REQUIRES_GPU) && - ((pWi->flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS_RW) || + ((pWi->flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS) || (pWi->flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_DEVICE_RW) || (pWi->flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_SUBDEVICE_RW) || (pWi->flags & OS_QUEUE_WORKITEM_FLAGS_FULL_GPU_SANITY))) @@ -626,17 +626,27 @@ static void RmExecuteWorkItem( // Some work items may not require a valid GPU instance if (pWi->flags & NV_WORK_ITEM_FLAGS_REQUIRES_GPU) { - pWi->func.pGpuFunction(pWi->gpuInstance, pWi->pData); + // Make sure that pGpu is present + OBJGPU *pGpu = gpumgrGetGpu(pWi->gpuInstance); + if (pGpu != NULL) + { + pWi->func.pGpuFunction(pWi->gpuInstance, pWi->pData); + } + else + { + NV_PRINTF(LEVEL_ERROR, "Invalid GPU instance for workitem\n"); + goto done; + } } else { pWi->func.pSystemFunction(pWi->pData); } +done: // Release any locks taken workItemLocksRelease(releaseLocks, gpuMask); -done: if ((pWi->pData != NULL) && !(pWi->flags & NV_WORK_ITEM_FLAGS_DONT_FREE_DATA)) { @@ -694,13 +704,13 @@ static NV_STATUS RmAccessRegistry( NvU32 *Entry ) { - NvU32 gpuMask = 0, gpuInstance = 0; - OBJGPU *pGpu; - NvBool isDevice = NV_FALSE; - NV_STATUS RmStatus = NV_ERR_OPERATING_SYSTEM; - RsClient *pClient; - Device *pDevice; - Subdevice *pSubdevice; + NvU32 gpuMask = 0, gpuInstance = 0; + OBJGPU *pGpu; + NvBool isDevice = NV_FALSE; + NV_STATUS RmStatus = NV_ERR_OPERATING_SYSTEM; + CLIENT_ENTRY *pClientEntry; + Device *pDevice; + Subdevice *pSubdevice; RMAPI_PARAM_COPY devNodeParamCopy; NvU8 *tmpDevNode = NULL; @@ -715,8 +725,11 @@ static NV_STATUS RmAccessRegistry( NvU32 BinaryDataLength = 0; NvU32 copyOutBinaryDataLength = 0; - if (NV_OK != serverAcquireClient(&g_resServ, hClient, LOCK_ACCESS_WRITE, &pClient)) + if (NV_OK != serverAcquireClient(&g_resServ, hClient, LOCK_ACCESS_WRITE, + &pClientEntry)) + { return NV_ERR_INVALID_CLIENT; + } if (hClient == hObject) { @@ -724,6 +737,8 @@ static NV_STATUS RmAccessRegistry( } else { + RsClient *pClient = pClientEntry->pClient; + RmStatus = deviceGetByHandle(pClient, hObject, &pDevice); if (RmStatus != NV_OK) { @@ -939,7 +954,7 @@ static NV_STATUS RmAccessRegistry( *pBinaryDataLength = copyOutBinaryDataLength; } - serverReleaseClient(&g_resServ, LOCK_ACCESS_WRITE, pClient); + serverReleaseClient(&g_resServ, LOCK_ACCESS_WRITE, pClientEntry); return RmStatus; } @@ -952,6 +967,7 @@ static NV_STATUS RmUpdateDeviceMappingInfo( ) { NV_STATUS status; + CLIENT_ENTRY *pClientEntry; RsClient *pClient; RsResourceRef *pMappableRef; RsCpuMapping *pCpuMapping; @@ -959,10 +975,12 @@ static NV_STATUS RmUpdateDeviceMappingInfo( Subdevice *pSubdevice; NvU32 gpuMask = 0; - status = serverAcquireClient(&g_resServ, hClient, LOCK_ACCESS_WRITE, &pClient); + status = serverAcquireClient(&g_resServ, hClient, LOCK_ACCESS_WRITE, &pClientEntry); if (status != NV_OK) return status; + pClient = pClientEntry->pClient; + status = deviceGetByHandle(pClient, hDevice, &pDevice); if (status != NV_OK) { @@ -1018,7 +1036,7 @@ static NV_STATUS RmUpdateDeviceMappingInfo( if (gpuMask != 0) rmGpuGroupLockRelease(gpuMask, GPUS_LOCK_FLAGS_NONE); - serverReleaseClient(&g_resServ, LOCK_ACCESS_WRITE, pClient); + serverReleaseClient(&g_resServ, LOCK_ACCESS_WRITE, pClientEntry); return status; } @@ -1345,32 +1363,6 @@ RmDmabufVerifyMemHandle( return NV_OK; } -static NV_STATUS -RmDmabufGetParentDevice( - OBJGPU *pGpu, - NvHandle hClient, - NvHandle hMemory, - Device **ppDevice -) -{ - RsClient *pClient; - RsResourceRef *pDeviceRef; - RsResourceRef *pMemoryRef; - - NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, - serverGetClientUnderLock(&g_resServ, hClient, &pClient)); - - NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, - clientGetResourceRef(pClient, hMemory, &pMemoryRef)); - - NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, - refFindAncestorOfType(pMemoryRef, classId(Device), &pDeviceRef)); - - *ppDevice = dynamicCast(pDeviceRef->pResource, Device); - - return NV_OK; -} - static NV_STATUS RmDmabufGetClientAndDevice( OBJGPU *pGpu, @@ -1386,30 +1378,23 @@ RmDmabufGetClientAndDevice( if (IS_MIG_ENABLED(pGpu)) { - NV_STATUS status; MIG_INSTANCE_REF ref; - Device *pParentDevice; + RsClient *pClient; + Memory *pMemory; KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); - status = RmDmabufGetParentDevice(pGpu, hClient, hMemory, - &pParentDevice); - if (status != NV_OK) - { - return status; - } + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + serverGetClientUnderLock(&g_resServ, hClient, &pClient)); - status = kmigmgrGetInstanceRefFromDevice(pGpu, pKernelMIGManager, - pParentDevice, &ref); - if (status != NV_OK) - { - return status; - } + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + memGetByHandle(pClient, hMemory, &pMemory)); - status = kmigmgrIncRefCount(ref.pKernelMIGGpuInstance->pShare); - if (status != NV_OK) - { - return status; - } + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + kmigmgrGetInstanceRefFromDevice(pGpu, pKernelMIGManager, + pMemory->pDevice, &ref)); + + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + kmigmgrIncRefCount(ref.pKernelMIGGpuInstance->pShare)); *phClient = ref.pKernelMIGGpuInstance->instanceHandles.hClient; *phDevice = ref.pKernelMIGGpuInstance->instanceHandles.hDevice; @@ -2320,9 +2305,11 @@ NV_STATUS rm_create_mmap_context( // LOCK: acquire API lock if ((rmStatus = rmapiLockAcquire(RMAPI_LOCK_FLAGS_READ, RM_LOCK_MODULES_OSAPI)) == NV_OK) { + CLIENT_ENTRY *pClientEntry; RmClient *pRmClient; - if (NV_OK != serverutilAcquireClient(hClient, LOCK_ACCESS_READ, &pRmClient)) + if (NV_OK != serverutilAcquireClient(hClient, LOCK_ACCESS_READ, &pClientEntry, + &pRmClient)) { // UNLOCK: release API lock rmapiLockRelease(); @@ -2343,7 +2330,7 @@ NV_STATUS rm_create_mmap_context( rmGpuLocksRelease(GPUS_LOCK_FLAGS_NONE, NULL); } - serverutilReleaseClient(LOCK_ACCESS_READ, pRmClient); + serverutilReleaseClient(LOCK_ACCESS_READ, pClientEntry); // UNLOCK: release API lock rmapiLockRelease(); @@ -3552,10 +3539,10 @@ NV_STATUS NV_API_CALL rm_is_supported_device( { NvBool bIsFirmwareCapable; - bIsFirmwareCapable = gpumgrIsDeviceRmFirmwareCapable(pNv->pci_info.device_id, - pmc_boot_42, + bIsFirmwareCapable = gpumgrIsDeviceRmFirmwareCapable(pmc_boot_42, NV_IS_SOC_DISPLAY_DEVICE(pNv), - NULL); + NULL, + NV_FALSE /* isMCDM */); if (!bIsFirmwareCapable) { if (hypervisorIsVgxHyper()) @@ -3569,7 +3556,7 @@ NV_STATUS NV_API_CALL rm_is_supported_device( "NVRM: Software documentation, available at docs.nvidia.com.\n", pNv->pci_info.domain, pNv->pci_info.bus, pNv->pci_info.slot, pNv->pci_info.function, pNv->pci_info.vendor_id, - pNv->pci_info.device_id, NV_VERSION_STRING); + pNv->pci_info.device_id); } else { @@ -3584,7 +3571,7 @@ NV_STATUS NV_API_CALL rm_is_supported_device( "NVRM: www.nvidia.com.\n", pNv->pci_info.domain, pNv->pci_info.bus, pNv->pci_info.slot, pNv->pci_info.function, pNv->pci_info.vendor_id, - pNv->pci_info.device_id, NV_VERSION_STRING); + pNv->pci_info.device_id); } goto threadfree; } @@ -3604,7 +3591,7 @@ NV_STATUS NV_API_CALL rm_is_supported_device( "NVRM: Software documentation, available at docs.nvidia.com.\n", pNv->pci_info.domain, pNv->pci_info.bus, pNv->pci_info.slot, pNv->pci_info.function, pNv->pci_info.vendor_id, - pNv->pci_info.device_id, NV_VERSION_STRING); + pNv->pci_info.device_id); goto threadfree; } goto threadfree; @@ -4532,7 +4519,8 @@ NV_STATUS NV_API_CALL rm_p2p_get_pages_persistent( NvU64 *pPhysicalAddresses, NvU32 *pEntries, void *pPlatformData, - void *pGpuInfo + void *pGpuInfo, + void **ppMigInfo ) { THREAD_STATE_NODE threadState; @@ -4551,7 +4539,8 @@ NV_STATUS NV_API_CALL rm_p2p_get_pages_persistent( pPhysicalAddresses, pEntries, pPlatformData, - pGpuInfo); + pGpuInfo, + ppMigInfo); // UNLOCK: release API lock rmapiLockRelease(); } @@ -4664,7 +4653,8 @@ NV_STATUS NV_API_CALL rm_p2p_register_callback( NV_STATUS NV_API_CALL rm_p2p_put_pages_persistent( nvidia_stack_t *sp, void *p2pObject, - void *pKey + void *pKey, + void *pMigInfo ) { THREAD_STATE_NODE threadState; @@ -4677,7 +4667,7 @@ NV_STATUS NV_API_CALL rm_p2p_put_pages_persistent( // LOCK: acquire API lock if ((rmStatus = rmapiLockAcquire(API_LOCK_FLAGS_NONE, RM_LOCK_MODULES_P2P)) == NV_OK) { - rmStatus = RmP2PPutPagesPersistent(p2pObject, pKey); + rmStatus = RmP2PPutPagesPersistent(p2pObject, pKey, pMigInfo); // UNLOCK: release API lock rmapiLockRelease(); @@ -5321,18 +5311,13 @@ NvBool NV_API_CALL rm_is_device_sequestered( NV_ENTER_RM_RUNTIME(sp,fp); threadStateInit(&threadState, THREAD_STATE_FLAGS_NONE); - if (rmapiLockAcquire(RMAPI_LOCK_FLAGS_READ, RM_LOCK_MODULES_GPU) == NV_OK) - { - // - // If gpumgrQueryGpuDrainState succeeds, bDrain will be set as needed. - // If gpumgrQueryGpuDrainState fails, bDrain will stay false; we assume - // that if core RM can't tell us the drain state, it must not be - // attached and the "sequestered" question is not relevant. - // - (void) gpumgrQueryGpuDrainState(pNv->gpu_id, &bDrain, NULL); - - rmapiLockRelease(); - } + // + // If gpumgrQueryGpuDrainState succeeds, bDrain will be set as needed. + // If gpumgrQueryGpuDrainState fails, bDrain will stay false; we assume + // that if core RM can't tell us the drain state, it must not be + // attached and the "sequestered" question is not relevant. + // + (void) gpumgrQueryGpuDrainState(pNv->gpu_id, &bDrain, NULL); threadStateFree(&threadState, THREAD_STATE_FLAGS_NONE); NV_EXIT_RM_RUNTIME(sp,fp); diff --git a/src/nvidia/arch/nvalloc/unix/src/osinit.c b/src/nvidia/arch/nvalloc/unix/src/osinit.c index 55f7ca4741..3349d791b9 100644 --- a/src/nvidia/arch/nvalloc/unix/src/osinit.c +++ b/src/nvidia/arch/nvalloc/unix/src/osinit.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1999-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1999-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -80,8 +80,6 @@ #include #include -#include - #include // RMCONFIG: need definition of REGISTER_ALL_HALS() #include "g_hal_register.h" @@ -188,11 +186,10 @@ static void initVendorSpecificRegistry(OBJGPU *, NvU16); static NV_STATUS teardownCoreLogic(OBJOS *, OBJGPU *); static void initUnixSpecificRegistry(OBJGPU *); -NvBool osRmInitRm(OBJOS *pOS) +NV_STATUS osRmInitRm(void) { OBJSYS *pSys = SYS_GET_INSTANCE(); - - NV_PRINTF(LEVEL_INFO, "init rm\n"); + NV_STATUS status; if (os_is_efi_enabled()) { @@ -268,10 +265,11 @@ NvBool osRmInitRm(OBJOS *pOS) NVLOG_UPDATE(); // Register all supported hals - if (REGISTER_ALL_HALS() != NV_OK) + status = REGISTER_ALL_HALS(); + if (status != NV_OK) { RmDestroyRegistry(NULL); - return NV_FALSE; + return status; } // Setup any ThreadState defaults @@ -280,7 +278,7 @@ NvBool osRmInitRm(OBJOS *pOS) THREAD_STATE_SETUP_FLAGS_SLI_LOGIC_ENABLED | THREAD_STATE_SETUP_FLAGS_DO_NOT_INCLUDE_SLEEP_TIME_ENABLED); - return NV_TRUE; + return NV_OK; } void RmShutdownRm(void) @@ -367,6 +365,8 @@ osHandleGpuLost nvErrorLog_va((void *)pGpu, ROBUST_CHANNEL_GPU_HAS_FALLEN_OFF_THE_BUS, "GPU has fallen off the bus."); + gpuNotifySubDeviceEvent(pGpu, NV2080_NOTIFIERS_RC_ERROR, NULL, 0, ROBUST_CHANNEL_GPU_HAS_FALLEN_OFF_THE_BUS, 0); + NV_DEV_PRINTF(NV_DBG_ERRORS, nv, "GPU has fallen off the bus.\n"); if (pGpu->boardInfo != NULL && pGpu->boardInfo->serialNumber[0] != '\0') @@ -871,6 +871,91 @@ osTeardownScalability( return clTeardownPcie(pGpu, pCl); } +#define NV_DBG_PRINT_VGA_STATUS(nv, src) \ + NV_DEV_PRINTF(NV_DBG_SETUP, nv, "%s reports GPU is %s VGA\n", \ + src, NV_PRIMARY_VGA(nv) ? "primary" : "not primary"); + +static void +RmAssignPrimaryVga( + nv_state_t *nv, + OBJGPU *pGpu +) +{ + // + // Check with the OS for the primary VGA status of the adapter. If it knows + // definitively (nv_set_primary_vga_status() returns NV_OK), then we should + // use that value. + // + // Otherwise, check the I/O access and VGA decoding along the path from the + // adapter to the root. We expect that the primary VGA will be the only + // non-3D controller with these properties enabled along the entire path. + // + if (nv_set_primary_vga_status(nv) != NV_OK) + { + KernelBif *pKernelBif = GPU_GET_KERNEL_BIF(pGpu); + OBJSYS *pSys = SYS_GET_INSTANCE(); + OBJCL *pCl = SYS_GET_CL(pSys); + + nv->primary_vga = (kbifIsPciIoAccessEnabled_HAL(pGpu, pKernelBif) && + !kbifIs3dController_HAL(pGpu, pKernelBif) && (pCl != NULL) && + clUpstreamVgaDecodeEnabled(pGpu, pCl)); + + NV_DBG_PRINT_VGA_STATUS(nv, "PCI config space"); + } + else + { + NV_DBG_PRINT_VGA_STATUS(nv, "OS"); + } +} + +static void +RmDeterminePrimaryDevice(OBJGPU *pGpu) +{ + nv_state_t *nv = NV_GET_NV_STATE(pGpu); + NvBool bFrameBufferConsoleDevice = NV_FALSE; + + // Skip updating nv->primary_vga while RM is recovering after GPU reset + if (nv->flags & NV_FLAG_IN_RECOVERY) + { + return; + } + + nv->primary_vga = NV_FALSE; + + // + // In case of Passthru, GPU will always be secondary + // + if (IS_PASSTHRU(pGpu)) + { + return; + } + + // + // In case of VIRTUAL GPU, there is no display, hence it will be secondary + // + if (IS_VIRTUAL(pGpu)) + { + return; + } + + RmAssignPrimaryVga(nv, pGpu); + + NV_DEV_PRINTF(NV_DBG_SETUP, nv, " is %s VGA\n", + !!nv->primary_vga ? "primary" : "not primary"); + + // + // If GPU is driving any frame buffer console(vesafb, efifb etc) + // mark the GPU as Primary. + // + bFrameBufferConsoleDevice = rm_get_uefi_console_status(nv); + + NV_DEV_PRINTF(NV_DBG_SETUP, nv, " is %s UEFI console device\n", + bFrameBufferConsoleDevice ? "primary" : "not primary"); + + pGpu->setProperty(pGpu, PDB_PROP_GPU_PRIMARY_DEVICE, + (bFrameBufferConsoleDevice || !!nv->primary_vga)); +} + static void RmSetConsolePreservationParams(OBJGPU *pGpu) { @@ -910,29 +995,8 @@ RmSetConsolePreservationParams(OBJGPU *pGpu) // mode, so we need to create a BAR1 mapping for the console // driver to use. // - // If the console driver is not using _either_ of those - // mappings, then the console driver will not be able to - // access the memory we reserve. This happens on some - // UEFI systems with multiple GPUs, because the firmware - // initializes the GOP driver on more than one GPU. In - // that case, just skip reserving anything for GPUs where - // neither BAR1 nor BAR2 match the console's base - // address. - // fbConsoleSize = rm_get_uefi_console_size(nv, &fbBaseAddress); - if (fbConsoleSize == 0) - { - if (!pGpu->getProperty(pGpu, PDB_PROP_GPU_IS_UEFI)) - { - fbConsoleSize = 0x40000; - } - else - { - NV_PRINTF(LEVEL_INFO, "No Frame Buffer Present\n"); - } - } - if ((fbConsoleSize > 0) && (fbBaseAddress != 0)) { KernelBus *pKernelBus = GPU_GET_KERNEL_BUS(pGpu); @@ -940,6 +1004,16 @@ RmSetConsolePreservationParams(OBJGPU *pGpu) (fbBaseAddress == nv->fb->cpu_address); } + // + // Case for legacy console, where OS will not give console size + // and primary_vga will be set for the device. + // Hence, reserving default size for VGA text modes. + // + if ((fbConsoleSize == 0) && nv->primary_vga) + { + fbConsoleSize = 0x40000; + } + pMemoryManager->Ram.ReservedConsoleDispMemSize = NV_ALIGN_UP(fbConsoleSize, 0x10000); } @@ -1209,12 +1283,12 @@ RmSetupRegisters( NV_DEV_PRINTF(NV_DBG_SETUP, nv, "RmSetupRegisters for 0x%x:0x%x\n", nv->pci_info.vendor_id, nv->pci_info.device_id); NV_DEV_PRINTF(NV_DBG_SETUP, nv, "pci config info:\n"); - NV_DEV_PRINTF(NV_DBG_SETUP, nv, " registers look like: " NvP64_fmt " " NvP64_fmt, + NV_DEV_PRINTF(NV_DBG_SETUP, nv, " registers look like: 0x%" NvU64_fmtx " 0x%" NvU64_fmtx, nv->regs->cpu_address, nv->regs->size); if (nv->fb != NULL) { - NV_DEV_PRINTF(NV_DBG_SETUP, nv, " fb looks like: " NvP64_fmt " " NvP64_fmt, + NV_DEV_PRINTF(NV_DBG_SETUP, nv, " fb looks like: 0x%" NvU64_fmtx " 0x%" NvU64_fmtx, nv->fb->cpu_address, nv->fb->size); } @@ -1231,7 +1305,7 @@ RmSetupRegisters( } NV_DEV_PRINTF(NV_DBG_SETUP, nv, "Successfully mapped framebuffer and registers\n"); NV_DEV_PRINTF(NV_DBG_SETUP, nv, "final mappings:\n"); - NV_DEV_PRINTF(NV_DBG_SETUP, nv, " regs: " NvP64_fmt " " NvP64_fmt " 0x%p\n", + NV_DEV_PRINTF(NV_DBG_SETUP, nv, " regs: 0x%" NvU64_fmtx " 0x%" NvU64_fmtx " 0x%p\n", nv->regs->cpu_address, nv->regs->size, nv->regs->map); ret = RmSetupDpauxRegisters(nv, status); @@ -1755,6 +1829,8 @@ NvBool RmInitAdapter( } } + RmDeterminePrimaryDevice(pGpu); + RmSetConsolePreservationParams(pGpu); RmInitAcpiMethods(pOS, pSys, pGpu); @@ -1808,21 +1884,19 @@ NvBool RmInitAdapter( if (IS_PASSTHRU(pGpu)) nv->flags |= NV_FLAG_PASSTHRU; - initVendorSpecificRegistry(pGpu, nv->pci_info.device_id); - if (!IS_VIRTUAL(pGpu)) + status.rmStatus = RmInitX86Emu(pGpu); + if (status.rmStatus != NV_OK) { - initNbsiTable(pGpu); + RM_SET_ERROR(status, RM_INIT_VBIOS_X86EMU_FAILED); + NV_PRINTF(LEVEL_ERROR, + "RmInitX86Emu failed, bailing out of RmInitAdapter\n"); + goto shutdown; } - // - // Load GSP proxy if early init is required. We need to do this - // before we trigger a full gpuStateInit and gpuStateLoad in - // RmInitNvDevice - // TODO: Check bug 200744430 - // - if (gpuIsCCFeatureEnabled(pGpu)) + initVendorSpecificRegistry(pGpu, nv->pci_info.device_id); + if (!IS_VIRTUAL(pGpu)) { - confComputeEarlyInit(pGpu, GPU_GET_CONF_COMPUTE(pGpu)); + initNbsiTable(pGpu); } // finally, initialize the device @@ -1937,15 +2011,6 @@ NvBool RmInitAdapter( goto shutdown; } - status.rmStatus = RmInitX86Emu(pGpu); - if (status.rmStatus != NV_OK) - { - RM_SET_ERROR(status, RM_INIT_VBIOS_X86EMU_FAILED); - NV_PRINTF(LEVEL_ERROR, - "RmInitX86Emu failed, bailing out of RmInitAdapter\n"); - goto shutdown; - } - // i2c only on master device?? RmI2cAddGpuPorts(nv); nvp->flags |= NV_INIT_FLAG_PUBLIC_I2C; @@ -2057,86 +2122,97 @@ void RmShutdownAdapter( nv->ud.cpu_address = 0; nv->ud.size = 0; - // LOCK: acquire GPUs lock - if (rmGpuLocksAcquire(GPUS_LOCK_FLAGS_NONE, RM_LOCK_MODULES_DESTROY) == NV_OK) + // + // LOCK: lock all clients in case of eGPU hot unplug, which + // will not wait for all existing RM clients to stop using the GPU. + // + if (!nv->is_external_gpu || serverLockAllClients(&g_resServ) == NV_OK) { - // - // Shutdown path requires expanded GPU visibility in GPUMGR in order - // to access the GPU undergoing shutdown which may not be fully - // initialized, and to continue accessing the GPU undergoing shutdown - // after state destroy. - // - NV_ASSERT_OK(gpumgrThreadEnableExpandedGpuVisibility()); + // LOCK: acquire GPUs lock + if (rmGpuLocksAcquire(GPUS_LOCK_FLAGS_NONE, RM_LOCK_MODULES_DESTROY) == NV_OK) + { + // + // Shutdown path requires expanded GPU visibility in GPUMGR in order + // to access the GPU undergoing shutdown which may not be fully + // initialized, and to continue accessing the GPU undergoing shutdown + // after state destroy. + // + NV_ASSERT_OK(gpumgrThreadEnableExpandedGpuVisibility()); - RmDestroyDeferredDynamicPowerManagement(nv); + RmDestroyDeferredDynamicPowerManagement(nv); - freeNbsiTable(pGpu); + freeNbsiTable(pGpu); - gpuFreeEventHandle(pGpu); + gpuFreeEventHandle(pGpu); - OBJCL *pCl = SYS_GET_CL(pSys); - OBJOS *pOS = GPU_GET_OS(pGpu); - if (pCl != NULL) - { - if (nvp->flags & NV_INIT_FLAG_CORE_LOGIC) + OBJCL *pCl = SYS_GET_CL(pSys); + OBJOS *pOS = GPU_GET_OS(pGpu); + if (pCl != NULL) { - teardownCoreLogic(pOS, pGpu); + if (nvp->flags & NV_INIT_FLAG_CORE_LOGIC) + { + teardownCoreLogic(pOS, pGpu); + } + else if (nvp->flags & NV_INIT_FLAG_SCALABILITY) + { + osTeardownScalability(pGpu); + } } - else if (nvp->flags & NV_INIT_FLAG_SCALABILITY) - { - osTeardownScalability(pGpu); - } - } - rmapiSetDelPendingClientResourcesFromGpuMask(NVBIT(gpuInstance)); - rmapiDelPendingDevices(NVBIT(gpuInstance)); + rmapiSetDelPendingClientResourcesFromGpuMask(NVBIT(gpuInstance)); + rmapiDelPendingDevices(NVBIT(gpuInstance)); - os_disable_console_access(); + os_disable_console_access(); - if (nvp->flags & NV_INIT_FLAG_GPU_STATE_LOAD) - { - rmStatus = gpuStateUnload(pGpu, GPU_STATE_DEFAULT); - NV_ASSERT(rmStatus == NV_OK); - } + if (nvp->flags & NV_INIT_FLAG_GPU_STATE_LOAD) + { + rmStatus = gpuStateUnload(pGpu, GPU_STATE_DEFAULT); + NV_ASSERT(rmStatus == NV_OK); + } - if (nvp->flags & NV_INIT_FLAG_GPU_STATE) - { - rmStatus = gpuStateDestroy(pGpu); - NV_ASSERT(rmStatus == NV_OK); - } + if (nvp->flags & NV_INIT_FLAG_GPU_STATE) + { + rmStatus = gpuStateDestroy(pGpu); + NV_ASSERT(rmStatus == NV_OK); + } - os_enable_console_access(); + os_enable_console_access(); - //if (nvp->flags & NV_INIT_FLAG_HAL) - // destroyHal(pDev); + //if (nvp->flags & NV_INIT_FLAG_HAL) + // destroyHal(pDev); #if NVCPU_IS_X86_64 - RmFreeX86EmuState(pGpu); + RmFreeX86EmuState(pGpu); #endif - gpumgrDetachGpu(gpuInstance); - gpumgrDestroyDevice(deviceInstance); + gpumgrDetachGpu(gpuInstance); + gpumgrDestroyDevice(deviceInstance); - // - // Expanded GPU visibility in GPUMGR is no longer needed once the - // GPU is removed from GPUMGR. - // - gpumgrThreadDisableExpandedGpuVisibility(); + // + // Expanded GPU visibility in GPUMGR is no longer needed once the + // GPU is removed from GPUMGR. + // + gpumgrThreadDisableExpandedGpuVisibility(); - if (nvp->flags & NV_INIT_FLAG_DMA) - { - RmTeardownDeviceDma(nv); - } + if (nvp->flags & NV_INIT_FLAG_DMA) + { + RmTeardownDeviceDma(nv); + } - RmClearPrivateState(nv); + RmClearPrivateState(nv); - RmUnInitAcpiMethods(pSys); + RmUnInitAcpiMethods(pSys); - // UNLOCK: release GPUs lock - rmGpuLocksRelease(GPUS_LOCK_FLAGS_NONE, NULL); + // UNLOCK: release GPUs lock + rmGpuLocksRelease(GPUS_LOCK_FLAGS_NONE, NULL); + + // RM_BASIC_LOCK_MODEL: free GPU lock + rmGpuLockFree(deviceInstance); + } - // RM_BASIC_LOCK_MODEL: free GPU lock - rmGpuLockFree(deviceInstance); + // UNLOCK: unlock all clients for eGPU hot unplug path + if (nv->is_external_gpu) + serverUnlockAllClients(&g_resServ); } } else @@ -2189,54 +2265,66 @@ void RmDisableAdapter( } // - // Free the client allocated resources. - // - // This needs to happen prior to tearing down SLI state when SLI is enabled. - // - // Note this doesn't free RM internal resource allocations. Those are - // freed during (gpumgrUpdateSLIConfig->...->)gpuStateUnload. - // - // We need to free resources for all GPUs linked in a group as - // gpumgrUpdateSLIConfig will teardown GPU state for the entire set. + // LOCK: lock all clients in case of eGPU hot unplug, which + // will not wait for all existing RM clients to stop using the GPU. // - gpuMask = gpumgrGetGpuMask(pGpu); - - rmapiSetDelPendingClientResourcesFromGpuMask(gpuMask); - rmapiDelPendingDevices(gpuMask); - - // LOCK: acquire GPUs lock - if (rmGpuLocksAcquire(GPUS_LOCK_FLAGS_NONE, RM_LOCK_MODULES_DESTROY) == NV_OK) + if (!nv->is_external_gpu || serverLockAllClients(&g_resServ) == NV_OK) { - nv_stop_rc_timer(nv); - OBJSYS *pSys = SYS_GET_INSTANCE(); - OBJCL *pCl = SYS_GET_CL(pSys); - OBJOS *pOS = SYS_GET_OS(pSys); - if (pCl != NULL) + // LOCK: acquire GPUs lock + if (rmGpuLocksAcquire(GPUS_LOCK_FLAGS_NONE, RM_LOCK_MODULES_DESTROY) == NV_OK) { - teardownCoreLogic(pOS, pGpu); - nvp->flags &= ~NV_INIT_FLAG_CORE_LOGIC; - } + // + // Free the client allocated resources. + // + // This needs to happen prior to tearing down SLI state when SLI is enabled. + // + // Note this doesn't free RM internal resource allocations. Those are + // freed during (gpumgrUpdateSLIConfig->...->)gpuStateUnload. + // + // We need to free resources for all GPUs linked in a group as + // gpumgrUpdateSLIConfig will teardown GPU state for the entire set. + // + gpuMask = gpumgrGetGpuMask(pGpu); - if (nvp->flags & NV_INIT_FLAG_FIFO_WATCHDOG) - { - krcWatchdogShutdown(pGpu, GPU_GET_KERNEL_RC(pGpu)); - nvp->flags &= ~NV_INIT_FLAG_FIFO_WATCHDOG; - } + rmapiSetDelPendingClientResourcesFromGpuMask(gpuMask); + rmapiDelPendingDevices(gpuMask); - os_disable_console_access(); + nv_stop_rc_timer(nv); - if (nvp->flags & NV_INIT_FLAG_GPU_STATE_LOAD) - { - rmStatus = gpuStateUnload(pGpu, GPU_STATE_DEFAULT); - NV_ASSERT(rmStatus == NV_OK); - nvp->flags &= ~NV_INIT_FLAG_GPU_STATE_LOAD; - } + OBJSYS *pSys = SYS_GET_INSTANCE(); + OBJCL *pCl = SYS_GET_CL(pSys); + OBJOS *pOS = SYS_GET_OS(pSys); + if (pCl != NULL) + { + teardownCoreLogic(pOS, pGpu); + nvp->flags &= ~NV_INIT_FLAG_CORE_LOGIC; + } - os_enable_console_access(); + if (nvp->flags & NV_INIT_FLAG_FIFO_WATCHDOG) + { + krcWatchdogShutdown(pGpu, GPU_GET_KERNEL_RC(pGpu)); + nvp->flags &= ~NV_INIT_FLAG_FIFO_WATCHDOG; + } - // UNLOCK: release GPUs lock - rmGpuLocksRelease(GPUS_LOCK_FLAGS_NONE, NULL); + os_disable_console_access(); + + if (nvp->flags & NV_INIT_FLAG_GPU_STATE_LOAD) + { + rmStatus = gpuStateUnload(pGpu, GPU_STATE_DEFAULT); + NV_ASSERT(rmStatus == NV_OK); + nvp->flags &= ~NV_INIT_FLAG_GPU_STATE_LOAD; + } + + os_enable_console_access(); + + // UNLOCK: release GPUs lock + rmGpuLocksRelease(GPUS_LOCK_FLAGS_NONE, NULL); + } + + // UNLOCK: unlock all clients for eGPU hot unplug path + if (nv->is_external_gpu) + serverUnlockAllClients(&g_resServ); } } diff --git a/src/nvidia/arch/nvalloc/unix/src/rm-gpu-ops.c b/src/nvidia/arch/nvalloc/unix/src/rm-gpu-ops.c index caec272622..6c2f0abfb9 100644 --- a/src/nvidia/arch/nvalloc/unix/src/rm-gpu-ops.c +++ b/src/nvidia/arch/nvalloc/unix/src/rm-gpu-ops.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -848,6 +848,18 @@ rm_gpu_ops_paging_channel_push_stream(nvidia_stack_t *sp, return rmStatus; } +NV_STATUS NV_API_CALL rm_gpu_ops_key_rotation_channel_disable(nvidia_stack_t *sp, + gpuChannelHandle channelList[], + NvU32 channeListCount) +{ + NV_STATUS rmStatus; + void *fp; + NV_ENTER_RM_RUNTIME(sp,fp); + rmStatus = nvGpuOpsKeyRotationChannelDisable(channelList, channeListCount); + NV_EXIT_RM_RUNTIME(sp,fp); + return rmStatus; +} + NV_STATUS NV_API_CALL rm_gpu_ops_ccsl_context_init(nvidia_stack_t *sp, struct ccslContext_t **ctx, gpuChannelHandle channel) @@ -872,12 +884,13 @@ NV_STATUS NV_API_CALL rm_gpu_ops_ccsl_context_clear(nvidia_stack_t *sp, } NV_STATUS NV_API_CALL rm_gpu_ops_ccsl_context_update(nvidia_stack_t *sp, - struct ccslContext_t *ctx) + UvmCslContext *contextList[], + NvU32 contextListCount) { NV_STATUS rmStatus; void *fp; NV_ENTER_RM_RUNTIME(sp,fp); - rmStatus = nvGpuOpsCcslContextUpdate(ctx); + rmStatus = nvGpuOpsCcslContextUpdate(contextList, contextListCount); NV_EXIT_RM_RUNTIME(sp,fp); return rmStatus; } diff --git a/src/nvidia/arch/nvalloc/unix/src/unix_intr.c b/src/nvidia/arch/nvalloc/unix/src/unix_intr.c index bfda9da527..1685f2cf35 100644 --- a/src/nvidia/arch/nvalloc/unix/src/unix_intr.c +++ b/src/nvidia/arch/nvalloc/unix/src/unix_intr.c @@ -33,7 +33,6 @@ #include "gpu/mmu/kern_gmmu.h" #include "gpu/disp/kern_disp.h" #include -#include "objtmr.h" static NvBool osInterruptPending( OBJGPU *pGpu, @@ -107,45 +106,31 @@ static NvBool osInterruptPending( pIsrAllocator = portMemAllocatorCreateOnExistingBlock(stackAllocator, sizeof(stackAllocator)); tlsIsrInit(pIsrAllocator); - // - // For SWRL granular locking process the countdown timer interrupt. - // GSP-RM handles SWRL interrupts if GSP-RM is active - // - if ((!IS_GSP_CLIENT(pGpu)) && (pGpu->getProperty(pGpu, PDB_PROP_GPU_SWRL_GRANULAR_LOCKING))) - { - threadStateInitISRLockless(&threadState, pDeviceLockGpu, THREAD_STATE_FLAGS_IS_ISR_LOCKLESS); - - gpuMask = gpumgrGetGpuMask(pDeviceLockGpu); - - gpuInstance = 0; - while ((pGpu = gpumgrGetNextGpu(gpuMask, &gpuInstance)) != NULL) - { - pIntr = GPU_GET_INTR(pGpu); - - if (INTERRUPT_TYPE_HARDWARE == intrGetIntrEn(pIntr)) - { - // If interrupt enable is garbage the GPU is probably in a bad state - if (intrGetIntrEnFromHw_HAL(pGpu, pIntr, &threadState) > INTERRUPT_TYPE_MAX) - { - continue; - } - - OBJTMR *pTmr = GPU_GET_TIMER(pGpu); - *serviced = tmrServiceSwrlWrapper(pGpu, pTmr, &threadState); - } - } - - threadStateFreeISRLockless(&threadState, pDeviceLockGpu, THREAD_STATE_FLAGS_IS_ISR_LOCKLESS); - } - // // Service nonstall interrupts before possibly acquiring GPUs lock // so that we don't unnecesarily hold the lock while servicing them. // + // Also check if we need to acquire the GPU lock at all and get critical interrupts + // This should not violate (1) from above since we are not servicing the GPUs in SLI, + // only checking their state. + // + // To do so, two steps are required: + // Step 1: Check if we can service nonstall interrupts outside the GPUs lock. This is true + // if the two PDBs are true. Otherwise we have to acquire the GPUs lock to service the nonstall + // interrupts anyway, and we can't get around acquiring the GPUs lock. + // + // Step 2 is inline below + // + NvBool bIsAnyStallIntrPending = NV_TRUE; + NvBool bIsAnyBottomHalfStallPending = NV_FALSE; + NvU32 isDispPendingPerGpu = 0; + NvU32 isTmrPendingPerGpu = 0; + if (pDeviceLockGpu->getProperty(pDeviceLockGpu, PDB_PROP_GPU_ALTERNATE_TREE_ENABLED) && pDeviceLockGpu->getProperty(pDeviceLockGpu, PDB_PROP_GPU_ALTERNATE_TREE_HANDLE_LOCKLESS)) { threadStateInitISRLockless(&threadState, pDeviceLockGpu, THREAD_STATE_FLAGS_IS_ISR_LOCKLESS); + bIsAnyStallIntrPending = NV_FALSE; gpuMask = gpumgrGetGpuMask(pDeviceLockGpu); gpuInstance = 0; @@ -162,13 +147,53 @@ static NvBool osInterruptPending( intrServiceNonStall_HAL(pGpu, pIntr, &intr1Pending, &threadState); *serviced = NV_TRUE; } + + // + // Step 2: Service nonstall interrupts and check if there are any stall interrupts + // pending on any GPUs. If there are, then we will take the GPU lock. + // + // Bug 4223192: calling intrGetPendingStall_HAL is rather expensive, + // so save off the critical interrupts to be handled in the top half. + // + intrGetPendingStall_HAL(pGpu, pIntr, &intr0Pending, &threadState); + if (!bitVectorTestAllCleared(&intr0Pending)) + { + if (bitVectorTest(&intr0Pending, MC_ENGINE_IDX_DISP)) + { + isDispPendingPerGpu |= NVBIT32(gpuGetInstance(pGpu)); + + // We will attempt to handle this separately from the other stall interrupts + bitVectorClr(&intr0Pending, MC_ENGINE_IDX_DISP); + } + + if (IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu) && + !IS_VIRTUAL(pGpu) && bitVectorTest(&intr0Pending, MC_ENGINE_IDX_TMR)) + { + isTmrPendingPerGpu |= NVBIT32(gpuGetInstance(pGpu)); + + // We will clear this in the top half + bitVectorClr(&intr0Pending, MC_ENGINE_IDX_TMR); + } + + if (!bitVectorTestAllCleared(&intr0Pending)) + { + // + // If any other stall interrupts are pending, + // they will be handled in the bottom half. + // + bIsAnyBottomHalfStallPending = NV_TRUE; + } + + bIsAnyStallIntrPending = NV_TRUE; + } } } threadStateFreeISRLockless(&threadState, pDeviceLockGpu, THREAD_STATE_FLAGS_IS_ISR_LOCKLESS); } // LOCK: try to acquire GPUs lock - if (rmDeviceGpuLocksAcquire(pDeviceLockGpu, GPU_LOCK_FLAGS_COND_ACQUIRE, RM_LOCK_MODULES_ISR) == NV_OK) + if (bIsAnyStallIntrPending && + (rmDeviceGpuLocksAcquire(pDeviceLockGpu, GPU_LOCK_FLAGS_COND_ACQUIRE, RM_LOCK_MODULES_ISR) == NV_OK)) { threadStateInitISRAndDeferredIntHandler(&threadState, pDeviceLockGpu, THREAD_STATE_FLAGS_IS_ISR); @@ -191,17 +216,52 @@ static NvBool osInterruptPending( if (intrGetIntrEnFromHw_HAL(pGpu, pIntr, &threadState) > INTERRUPT_TYPE_MAX) continue; - intrGetPendingStall_HAL(pGpu, pIntr, &intr0Pending, &threadState); + // + // If lockless interrupt handling was enabled, we have already cached which critical + // interrupts are pending. We only set the appropriate bits in the intr0Pending bitvector + // for the subsequent code to service them in the same manner as the lockless nonstall + // interrupt handling disabled case. But we also clear them from intr0Pending and + // for disp, check if they're still pending afterwards. We already checked whether any + // other bottom half stall interrupts are pending in bIsAnyBottomHalfStallPending above. + // + // After all this, the combination of bIsAnyBottomHalfStallPending and intr0Pending + // contains whether any stall interrupts are still pending, so check both to determine if + // we need a bottom half. + // + if (pDeviceLockGpu->getProperty(pDeviceLockGpu, PDB_PROP_GPU_ALTERNATE_TREE_ENABLED) && + pDeviceLockGpu->getProperty(pDeviceLockGpu, PDB_PROP_GPU_ALTERNATE_TREE_HANDLE_LOCKLESS)) + { + bitVectorClrAll(&intr0Pending); + if ((isDispPendingPerGpu & NVBIT32(gpuGetInstance(pGpu))) != 0) + { + bitVectorSet(&intr0Pending, MC_ENGINE_IDX_DISP); + } + + if ((isTmrPendingPerGpu & NVBIT32(gpuGetInstance(pGpu))) != 0) + { + bitVectorSet(&intr0Pending, MC_ENGINE_IDX_TMR); + } + } + else + { + intrGetPendingStall_HAL(pGpu, pIntr, &intr0Pending, &threadState); + } + if (bitVectorTest(&intr0Pending, MC_ENGINE_IDX_DISP)) { if (pKernelDisplay != NULL) { + MC_ENGINE_BITVECTOR intrDispPending; + kdispServiceVblank_HAL(pGpu, pKernelDisplay, 0, (VBLANK_STATE_PROCESS_LOW_LATENCY | VBLANK_STATE_PROCESS_CALLED_FROM_ISR), &threadState); *serviced = NV_TRUE; - intrGetPendingStall_HAL(pGpu, pIntr, &intr0Pending, &threadState); + bitVectorClr(&intr0Pending, MC_ENGINE_IDX_DISP); + + intrGetPendingDisplayIntr_HAL(pGpu, pIntr, &intrDispPending, &threadState); + bitVectorOr(&intr0Pending, &intr0Pending, &intrDispPending); } } @@ -211,7 +271,7 @@ static NvBool osInterruptPending( // We have to clear the top level interrupt bit here since otherwise // the bottom half will attempt to service the interrupt on the CPU // side before GSP receives the notification and services it - intrClearLeafVector_HAL(pGpu, pIntr, MC_ENGINE_IDX_TMR, &threadState); + intrClearLeafVector_HAL(pGpu, pIntr, intrGetVectorFromEngineId(pGpu, pIntr, MC_ENGINE_IDX_TMR, NV_FALSE), &threadState); bitVectorClr(&intr0Pending, MC_ENGINE_IDX_TMR); NV_ASSERT_OK(intrTriggerPrivDoorbell_HAL(pGpu, pIntr, NV_DOORBELL_NOTIFY_LEAF_SERVICE_TMR_HANDLE)); @@ -228,8 +288,13 @@ static NvBool osInterruptPending( intrCheckFecsEventbufferPending(pGpu, pIntr, &intr1Pending, &bCtxswLog); } } + else + { + bitVectorClrAll(&intr1Pending); + } - if (!bitVectorTestAllCleared(&intr0Pending) || + if (bIsAnyBottomHalfStallPending || + !bitVectorTestAllCleared(&intr0Pending) || !bitVectorTestAllCleared(&intr1Pending)) { pending = NV_TRUE; diff --git a/src/nvidia/exports_link_command.txt b/src/nvidia/exports_link_command.txt index 63d1588790..de3cf86df1 100644 --- a/src/nvidia/exports_link_command.txt +++ b/src/nvidia/exports_link_command.txt @@ -124,6 +124,7 @@ --undefined=rm_gpu_ops_paging_channel_push_stream --undefined=rm_gpu_ops_device_create --undefined=rm_gpu_ops_device_destroy +--undefined=rm_gpu_ops_key_rotation_channel_disable --undefined=rm_gpu_ops_ccsl_sign --undefined=rm_gpu_ops_ccsl_encrypt --undefined=rm_gpu_ops_ccsl_encrypt_with_iv @@ -186,13 +187,11 @@ --undefined=nv_vgpu_delete --undefined=nv_vgpu_get_bar_info --undefined=nv_vgpu_get_hbm_info ---undefined=nv_vgpu_start --undefined=nv_vgpu_get_type_ids --undefined=nv_vgpu_get_type_info ---undefined=nv_vgpu_get_sparse_mmap ---undefined=nv_vgpu_update_request --undefined=nv_vgpu_process_vf_info --undefined=nv_gpu_bind_event +--undefined=nv_gpu_unbind_event --undefined=rm_check_for_gpu_surprise_removal --undefined=rm_set_external_kernel_client_count --undefined=rm_schedule_gpu_wakeup @@ -202,10 +201,8 @@ --undefined=rm_ref_dynamic_power --undefined=rm_unref_dynamic_power --undefined=rm_transition_dynamic_power ---undefined=rm_get_vidmem_power_status --undefined=rm_acpi_notify ---undefined=rm_get_dynamic_power_management_status ---undefined=rm_get_gpu_gcx_support +--undefined=rm_get_power_info --undefined=rm_is_iommu_needed_for_sriov --undefined=rm_disable_iomap_wc --undefined=rm_is_altstack_in_use diff --git a/src/nvidia/generated/g_access_cntr_buffer_nvoc.c b/src/nvidia/generated/g_access_cntr_buffer_nvoc.c index 72d64bc662..99c2fde8b6 100644 --- a/src/nvidia/generated/g_access_cntr_buffer_nvoc.c +++ b/src/nvidia/generated/g_access_cntr_buffer_nvoc.c @@ -111,126 +111,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_AccessCounterBuffer = /*pExportInfo=*/ &__nvoc_export_info_AccessCounterBuffer }; -static NV_STATUS __nvoc_thunk_AccessCounterBuffer_gpuresMap(struct GpuResource *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return accesscntrMap((struct AccessCounterBuffer *)(((unsigned char *)pAccessCounterBuffer) - __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_AccessCounterBuffer_gpuresUnmap(struct GpuResource *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return accesscntrUnmap((struct AccessCounterBuffer *)(((unsigned char *)pAccessCounterBuffer) - __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_AccessCounterBuffer_gpuresGetMapAddrSpace(struct GpuResource *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return accesscntrGetMapAddrSpace((struct AccessCounterBuffer *)(((unsigned char *)pAccessCounterBuffer) - __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} - -static NvBool __nvoc_thunk_GpuResource_accesscntrShareCallback(struct AccessCounterBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_accesscntrCheckMemInterUnmap(struct AccessCounterBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_Notifier_accesscntrGetOrAllocNotifShare(struct AccessCounterBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_AccessCounterBuffer_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); -} - -static NV_STATUS __nvoc_thunk_RsResource_accesscntrMapTo(struct AccessCounterBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset), pParams); -} - -static void __nvoc_thunk_Notifier_accesscntrSetNotificationShare(struct AccessCounterBuffer *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_AccessCounterBuffer_Notifier.offset), pNotifShare); -} - -static NvU32 __nvoc_thunk_RsResource_accesscntrGetRefCount(struct AccessCounterBuffer *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_accesscntrAddAdditionalDependants(struct RsClient *pClient, struct AccessCounterBuffer *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_accesscntrControl_Prologue(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_accesscntrGetRegBaseOffsetAndSize(struct AccessCounterBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), pGpu, pOffset, pSize); -} - -static NV_STATUS __nvoc_thunk_GpuResource_accesscntrInternalControlForward(struct AccessCounterBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), command, pParams, size); -} - -static NV_STATUS __nvoc_thunk_RsResource_accesscntrUnmapFrom(struct AccessCounterBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_accesscntrControl_Epilogue(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), pCallContext, pParams); -} - -static NvHandle __nvoc_thunk_GpuResource_accesscntrGetInternalObjectHandle(struct AccessCounterBuffer *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_AccessCounterBuffer_GpuResource.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_accesscntrControl(struct AccessCounterBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_accesscntrGetMemInterMapParams(struct AccessCounterBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_accesscntrGetMemoryMappingDescriptor(struct AccessCounterBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_accesscntrControlFilter(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_Notifier_accesscntrUnregisterEvent(struct AccessCounterBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_AccessCounterBuffer_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static NV_STATUS __nvoc_thunk_RmResource_accesscntrControlSerialization_Prologue(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_accesscntrCanCopy(struct AccessCounterBuffer *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_accesscntrIsPartialUnmapSupported(struct AccessCounterBuffer *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_accesscntrPreDestruct(struct AccessCounterBuffer *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_accesscntrIsDuplicate(struct AccessCounterBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_accesscntrControlSerialization_Epilogue(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), pCallContext, pParams); -} - -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_accesscntrGetNotificationListPtr(struct AccessCounterBuffer *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_AccessCounterBuffer_Notifier.offset)); -} - -static struct NotifShare *__nvoc_thunk_Notifier_accesscntrGetNotificationShare(struct AccessCounterBuffer *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_AccessCounterBuffer_Notifier.offset)); -} - -static NvBool __nvoc_thunk_RmResource_accesscntrAccessCallback(struct AccessCounterBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -343,12 +223,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_AccessCo #endif }, { /* [7] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) accesscntrCtrlCmdAccessCntrBufferResetCounters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) - /*flags=*/ 0x0u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0xc3650108u, /*paramSize=*/ sizeof(NVC365_CTRL_ACCESS_CNTR_BUFFER_RESET_COUNTERS_PARAMS), @@ -390,6 +270,162 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_AccessCo }; +// 3 down-thunk(s) defined to bridge methods in AccessCounterBuffer from superclasses + +// accesscntrMap: virtual override (res) base (gpures) +static NV_STATUS __nvoc_down_thunk_AccessCounterBuffer_gpuresMap(struct GpuResource *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return accesscntrMap((struct AccessCounterBuffer *)(((unsigned char *) pAccessCounterBuffer) - __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// accesscntrUnmap: virtual override (res) base (gpures) +static NV_STATUS __nvoc_down_thunk_AccessCounterBuffer_gpuresUnmap(struct GpuResource *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return accesscntrUnmap((struct AccessCounterBuffer *)(((unsigned char *) pAccessCounterBuffer) - __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), pCallContext, pCpuMapping); +} + +// accesscntrGetMapAddrSpace: virtual override (gpures) base (gpures) +static NV_STATUS __nvoc_down_thunk_AccessCounterBuffer_gpuresGetMapAddrSpace(struct GpuResource *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return accesscntrGetMapAddrSpace((struct AccessCounterBuffer *)(((unsigned char *) pAccessCounterBuffer) - __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + + +// 27 up-thunk(s) defined to bridge methods in AccessCounterBuffer to superclasses + +// accesscntrControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_accesscntrControl(struct AccessCounterBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), pCallContext, pParams); +} + +// accesscntrShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_accesscntrShareCallback(struct AccessCounterBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// accesscntrGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_accesscntrGetRegBaseOffsetAndSize(struct AccessCounterBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), pGpu, pOffset, pSize); +} + +// accesscntrInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_accesscntrInternalControlForward(struct AccessCounterBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), command, pParams, size); +} + +// accesscntrGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_accesscntrGetInternalObjectHandle(struct AccessCounterBuffer *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_AccessCounterBuffer_GpuResource.offset)); +} + +// accesscntrAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_accesscntrAccessCallback(struct AccessCounterBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// accesscntrGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_accesscntrGetMemInterMapParams(struct AccessCounterBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), pParams); +} + +// accesscntrCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_accesscntrCheckMemInterUnmap(struct AccessCounterBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), bSubdeviceHandleProvided); +} + +// accesscntrGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_accesscntrGetMemoryMappingDescriptor(struct AccessCounterBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), ppMemDesc); +} + +// accesscntrControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_accesscntrControlSerialization_Prologue(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), pCallContext, pParams); +} + +// accesscntrControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_accesscntrControlSerialization_Epilogue(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), pCallContext, pParams); +} + +// accesscntrControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_accesscntrControl_Prologue(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), pCallContext, pParams); +} + +// accesscntrControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_accesscntrControl_Epilogue(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), pCallContext, pParams); +} + +// accesscntrCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_accesscntrCanCopy(struct AccessCounterBuffer *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset)); +} + +// accesscntrIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_accesscntrIsDuplicate(struct AccessCounterBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset), hMemory, pDuplicate); +} + +// accesscntrPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_accesscntrPreDestruct(struct AccessCounterBuffer *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset)); +} + +// accesscntrControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_accesscntrControlFilter(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset), pCallContext, pParams); +} + +// accesscntrIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_accesscntrIsPartialUnmapSupported(struct AccessCounterBuffer *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset)); +} + +// accesscntrMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_accesscntrMapTo(struct AccessCounterBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset), pParams); +} + +// accesscntrUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_accesscntrUnmapFrom(struct AccessCounterBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset), pParams); +} + +// accesscntrGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_accesscntrGetRefCount(struct AccessCounterBuffer *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset)); +} + +// accesscntrAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_accesscntrAddAdditionalDependants(struct RsClient *pClient, struct AccessCounterBuffer *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset), pReference); +} + +// accesscntrGetNotificationListPtr: virtual inherited (notify) base (notify) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_accesscntrGetNotificationListPtr(struct AccessCounterBuffer *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_AccessCounterBuffer_Notifier.offset)); +} + +// accesscntrGetNotificationShare: virtual inherited (notify) base (notify) +static struct NotifShare * __nvoc_up_thunk_Notifier_accesscntrGetNotificationShare(struct AccessCounterBuffer *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_AccessCounterBuffer_Notifier.offset)); +} + +// accesscntrSetNotificationShare: virtual inherited (notify) base (notify) +static void __nvoc_up_thunk_Notifier_accesscntrSetNotificationShare(struct AccessCounterBuffer *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_AccessCounterBuffer_Notifier.offset), pNotifShare); +} + +// accesscntrUnregisterEvent: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_accesscntrUnregisterEvent(struct AccessCounterBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_AccessCounterBuffer_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +} + +// accesscntrGetOrAllocNotifShare: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_accesscntrGetOrAllocNotifShare(struct AccessCounterBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_AccessCounterBuffer_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_AccessCounterBuffer = { /*numEntries=*/ 10, @@ -433,117 +469,159 @@ NV_STATUS __nvoc_ctor_AccessCounterBuffer(AccessCounterBuffer *pThis, struct CAL return status; } +// Vtable initialization static void __nvoc_init_funcTable_AccessCounterBuffer_1(AccessCounterBuffer *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // accesscntrMap -- virtual override (res) base (gpures) pThis->__accesscntrMap__ = &accesscntrMap_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresMap__ = &__nvoc_down_thunk_AccessCounterBuffer_gpuresMap; + // accesscntrUnmap -- virtual override (res) base (gpures) pThis->__accesscntrUnmap__ = &accesscntrUnmap_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresUnmap__ = &__nvoc_down_thunk_AccessCounterBuffer_gpuresUnmap; + // accesscntrGetMapAddrSpace -- virtual override (gpures) base (gpures) pThis->__accesscntrGetMapAddrSpace__ = &accesscntrGetMapAddrSpace_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_down_thunk_AccessCounterBuffer_gpuresGetMapAddrSpace; + // accesscntrCtrlCmdAccessCntrBufferReadGet -- exported (id=0xc3650101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__accesscntrCtrlCmdAccessCntrBufferReadGet__ = &accesscntrCtrlCmdAccessCntrBufferReadGet_IMPL; #endif + // accesscntrCtrlCmdAccessCntrBufferReadPut -- exported (id=0xc3650103) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__accesscntrCtrlCmdAccessCntrBufferReadPut__ = &accesscntrCtrlCmdAccessCntrBufferReadPut_IMPL; #endif + // accesscntrCtrlCmdAccessCntrBufferWriteGet -- exported (id=0xc3650102) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__accesscntrCtrlCmdAccessCntrBufferWriteGet__ = &accesscntrCtrlCmdAccessCntrBufferWriteGet_IMPL; #endif + // accesscntrCtrlCmdAccessCntrBufferEnable -- exported (id=0xc3650104) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__accesscntrCtrlCmdAccessCntrBufferEnable__ = &accesscntrCtrlCmdAccessCntrBufferEnable_IMPL; #endif + // accesscntrCtrlCmdAccessCntrBufferGetSize -- exported (id=0xc3650105) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__accesscntrCtrlCmdAccessCntrBufferGetSize__ = &accesscntrCtrlCmdAccessCntrBufferGetSize_IMPL; #endif + // accesscntrCtrlCmdAccessCntrBufferGetRegisterMappings -- exported (id=0xc3650106) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__accesscntrCtrlCmdAccessCntrBufferGetRegisterMappings__ = &accesscntrCtrlCmdAccessCntrBufferGetRegisterMappings_IMPL; #endif + // accesscntrCtrlCmdAccessCntrBufferGetFullInfo -- exported (id=0xc3650107) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__accesscntrCtrlCmdAccessCntrBufferGetFullInfo__ = &accesscntrCtrlCmdAccessCntrBufferGetFullInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) + // accesscntrCtrlCmdAccessCntrBufferResetCounters -- exported (id=0xc3650108) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__accesscntrCtrlCmdAccessCntrBufferResetCounters__ = &accesscntrCtrlCmdAccessCntrBufferResetCounters_IMPL; #endif + // accesscntrCtrlCmdAccessCntrSetConfig -- exported (id=0xc3650109) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__accesscntrCtrlCmdAccessCntrSetConfig__ = &accesscntrCtrlCmdAccessCntrSetConfig_IMPL; #endif + // accesscntrCtrlCmdAccessCntrBufferEnableIntr -- exported (id=0xc365010b) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__accesscntrCtrlCmdAccessCntrBufferEnableIntr__ = &accesscntrCtrlCmdAccessCntrBufferEnableIntr_IMPL; #endif - pThis->__nvoc_base_GpuResource.__gpuresMap__ = &__nvoc_thunk_AccessCounterBuffer_gpuresMap; + // accesscntrControl -- virtual inherited (gpures) base (gpures) + pThis->__accesscntrControl__ = &__nvoc_up_thunk_GpuResource_accesscntrControl; - pThis->__nvoc_base_GpuResource.__gpuresUnmap__ = &__nvoc_thunk_AccessCounterBuffer_gpuresUnmap; + // accesscntrShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__accesscntrShareCallback__ = &__nvoc_up_thunk_GpuResource_accesscntrShareCallback; - pThis->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_thunk_AccessCounterBuffer_gpuresGetMapAddrSpace; + // accesscntrGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__accesscntrGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_accesscntrGetRegBaseOffsetAndSize; - pThis->__accesscntrShareCallback__ = &__nvoc_thunk_GpuResource_accesscntrShareCallback; + // accesscntrInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__accesscntrInternalControlForward__ = &__nvoc_up_thunk_GpuResource_accesscntrInternalControlForward; - pThis->__accesscntrCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_accesscntrCheckMemInterUnmap; + // accesscntrGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__accesscntrGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_accesscntrGetInternalObjectHandle; - pThis->__accesscntrGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_accesscntrGetOrAllocNotifShare; + // accesscntrAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__accesscntrAccessCallback__ = &__nvoc_up_thunk_RmResource_accesscntrAccessCallback; - pThis->__accesscntrMapTo__ = &__nvoc_thunk_RsResource_accesscntrMapTo; + // accesscntrGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__accesscntrGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_accesscntrGetMemInterMapParams; - pThis->__accesscntrSetNotificationShare__ = &__nvoc_thunk_Notifier_accesscntrSetNotificationShare; + // accesscntrCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__accesscntrCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_accesscntrCheckMemInterUnmap; - pThis->__accesscntrGetRefCount__ = &__nvoc_thunk_RsResource_accesscntrGetRefCount; + // accesscntrGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__accesscntrGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_accesscntrGetMemoryMappingDescriptor; - pThis->__accesscntrAddAdditionalDependants__ = &__nvoc_thunk_RsResource_accesscntrAddAdditionalDependants; + // accesscntrControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__accesscntrControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_accesscntrControlSerialization_Prologue; - pThis->__accesscntrControl_Prologue__ = &__nvoc_thunk_RmResource_accesscntrControl_Prologue; + // accesscntrControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__accesscntrControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_accesscntrControlSerialization_Epilogue; - pThis->__accesscntrGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_accesscntrGetRegBaseOffsetAndSize; + // accesscntrControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__accesscntrControl_Prologue__ = &__nvoc_up_thunk_RmResource_accesscntrControl_Prologue; - pThis->__accesscntrInternalControlForward__ = &__nvoc_thunk_GpuResource_accesscntrInternalControlForward; + // accesscntrControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__accesscntrControl_Epilogue__ = &__nvoc_up_thunk_RmResource_accesscntrControl_Epilogue; - pThis->__accesscntrUnmapFrom__ = &__nvoc_thunk_RsResource_accesscntrUnmapFrom; + // accesscntrCanCopy -- virtual inherited (res) base (gpures) + pThis->__accesscntrCanCopy__ = &__nvoc_up_thunk_RsResource_accesscntrCanCopy; - pThis->__accesscntrControl_Epilogue__ = &__nvoc_thunk_RmResource_accesscntrControl_Epilogue; + // accesscntrIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__accesscntrIsDuplicate__ = &__nvoc_up_thunk_RsResource_accesscntrIsDuplicate; - pThis->__accesscntrGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_accesscntrGetInternalObjectHandle; + // accesscntrPreDestruct -- virtual inherited (res) base (gpures) + pThis->__accesscntrPreDestruct__ = &__nvoc_up_thunk_RsResource_accesscntrPreDestruct; - pThis->__accesscntrControl__ = &__nvoc_thunk_GpuResource_accesscntrControl; + // accesscntrControlFilter -- virtual inherited (res) base (gpures) + pThis->__accesscntrControlFilter__ = &__nvoc_up_thunk_RsResource_accesscntrControlFilter; - pThis->__accesscntrGetMemInterMapParams__ = &__nvoc_thunk_RmResource_accesscntrGetMemInterMapParams; + // accesscntrIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__accesscntrIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_accesscntrIsPartialUnmapSupported; - pThis->__accesscntrGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_accesscntrGetMemoryMappingDescriptor; + // accesscntrMapTo -- virtual inherited (res) base (gpures) + pThis->__accesscntrMapTo__ = &__nvoc_up_thunk_RsResource_accesscntrMapTo; - pThis->__accesscntrControlFilter__ = &__nvoc_thunk_RsResource_accesscntrControlFilter; + // accesscntrUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__accesscntrUnmapFrom__ = &__nvoc_up_thunk_RsResource_accesscntrUnmapFrom; - pThis->__accesscntrUnregisterEvent__ = &__nvoc_thunk_Notifier_accesscntrUnregisterEvent; + // accesscntrGetRefCount -- virtual inherited (res) base (gpures) + pThis->__accesscntrGetRefCount__ = &__nvoc_up_thunk_RsResource_accesscntrGetRefCount; - pThis->__accesscntrControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_accesscntrControlSerialization_Prologue; + // accesscntrAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__accesscntrAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_accesscntrAddAdditionalDependants; - pThis->__accesscntrCanCopy__ = &__nvoc_thunk_RsResource_accesscntrCanCopy; + // accesscntrGetNotificationListPtr -- virtual inherited (notify) base (notify) + pThis->__accesscntrGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_accesscntrGetNotificationListPtr; - pThis->__accesscntrIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_accesscntrIsPartialUnmapSupported; + // accesscntrGetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__accesscntrGetNotificationShare__ = &__nvoc_up_thunk_Notifier_accesscntrGetNotificationShare; - pThis->__accesscntrPreDestruct__ = &__nvoc_thunk_RsResource_accesscntrPreDestruct; + // accesscntrSetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__accesscntrSetNotificationShare__ = &__nvoc_up_thunk_Notifier_accesscntrSetNotificationShare; - pThis->__accesscntrIsDuplicate__ = &__nvoc_thunk_RsResource_accesscntrIsDuplicate; + // accesscntrUnregisterEvent -- virtual inherited (notify) base (notify) + pThis->__accesscntrUnregisterEvent__ = &__nvoc_up_thunk_Notifier_accesscntrUnregisterEvent; - pThis->__accesscntrControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_accesscntrControlSerialization_Epilogue; + // accesscntrGetOrAllocNotifShare -- virtual inherited (notify) base (notify) + pThis->__accesscntrGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_accesscntrGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_AccessCounterBuffer_1 with approximately 43 basic block(s). - pThis->__accesscntrGetNotificationListPtr__ = &__nvoc_thunk_Notifier_accesscntrGetNotificationListPtr; - - pThis->__accesscntrGetNotificationShare__ = &__nvoc_thunk_Notifier_accesscntrGetNotificationShare; - - pThis->__accesscntrAccessCallback__ = &__nvoc_thunk_RmResource_accesscntrAccessCallback; -} +// Initialize vtable(s) for 40 virtual method(s). void __nvoc_init_funcTable_AccessCounterBuffer(AccessCounterBuffer *pThis) { + + // Initialize vtable(s) with 40 per-object function pointer(s). __nvoc_init_funcTable_AccessCounterBuffer_1(pThis); } diff --git a/src/nvidia/generated/g_access_cntr_buffer_nvoc.h b/src/nvidia/generated/g_access_cntr_buffer_nvoc.h index 40ad3f851d..6f93ca759b 100644 --- a/src/nvidia/generated/g_access_cntr_buffer_nvoc.h +++ b/src/nvidia/generated/g_access_cntr_buffer_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_ACCESS_CNTR_BUFFER_NVOC_H_ #define _G_ACCESS_CNTR_BUFFER_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_access_cntr_buffer_nvoc.h" #ifndef ACCESS_CNTR_BUFFER_H @@ -52,58 +60,69 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct AccessCounterBuffer { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; struct Notifier __nvoc_base_Notifier; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct AccessCounterBuffer *__nvoc_pbase_AccessCounterBuffer; - NV_STATUS (*__accesscntrMap__)(struct AccessCounterBuffer *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NV_STATUS (*__accesscntrUnmap__)(struct AccessCounterBuffer *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__accesscntrGetMapAddrSpace__)(struct AccessCounterBuffer *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferReadGet__)(struct AccessCounterBuffer *, NVC365_CTRL_ACCESS_CNTR_BUFFER_READ_GET_PARAMS *); - NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferReadPut__)(struct AccessCounterBuffer *, NVC365_CTRL_ACCESS_CNTR_BUFFER_READ_PUT_PARAMS *); - NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferWriteGet__)(struct AccessCounterBuffer *, NVC365_CTRL_ACCESS_CNTR_BUFFER_WRITE_GET_PARAMS *); - NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferEnable__)(struct AccessCounterBuffer *, NVC365_CTRL_ACCESS_CNTR_BUFFER_ENABLE_PARAMS *); - NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferGetSize__)(struct AccessCounterBuffer *, NVC365_CTRL_ACCESS_CNTR_BUFFER_GET_SIZE_PARAMS *); - NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferGetRegisterMappings__)(struct AccessCounterBuffer *, NVC365_CTRL_ACCESS_CNTR_BUFFER_GET_REGISTER_MAPPINGS_PARAMS *); - NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferGetFullInfo__)(struct AccessCounterBuffer *, NVC365_CTRL_ACCESS_CNTR_BUFFER_GET_FULL_INFO_PARAMS *); - NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferResetCounters__)(struct AccessCounterBuffer *, NVC365_CTRL_ACCESS_CNTR_BUFFER_RESET_COUNTERS_PARAMS *); - NV_STATUS (*__accesscntrCtrlCmdAccessCntrSetConfig__)(struct AccessCounterBuffer *, NVC365_CTRL_ACCESS_CNTR_SET_CONFIG_PARAMS *); - NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferEnableIntr__)(struct AccessCounterBuffer *, NVC365_CTRL_ACCESS_CNTR_BUFFER_ENABLE_INTR_PARAMS *); - NvBool (*__accesscntrShareCallback__)(struct AccessCounterBuffer *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__accesscntrCheckMemInterUnmap__)(struct AccessCounterBuffer *, NvBool); - NV_STATUS (*__accesscntrGetOrAllocNotifShare__)(struct AccessCounterBuffer *, NvHandle, NvHandle, struct NotifShare **); - NV_STATUS (*__accesscntrMapTo__)(struct AccessCounterBuffer *, RS_RES_MAP_TO_PARAMS *); - void (*__accesscntrSetNotificationShare__)(struct AccessCounterBuffer *, struct NotifShare *); - NvU32 (*__accesscntrGetRefCount__)(struct AccessCounterBuffer *); - void (*__accesscntrAddAdditionalDependants__)(struct RsClient *, struct AccessCounterBuffer *, RsResourceRef *); - NV_STATUS (*__accesscntrControl_Prologue__)(struct AccessCounterBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__accesscntrGetRegBaseOffsetAndSize__)(struct AccessCounterBuffer *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__accesscntrInternalControlForward__)(struct AccessCounterBuffer *, NvU32, void *, NvU32); - NV_STATUS (*__accesscntrUnmapFrom__)(struct AccessCounterBuffer *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__accesscntrControl_Epilogue__)(struct AccessCounterBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__accesscntrGetInternalObjectHandle__)(struct AccessCounterBuffer *); - NV_STATUS (*__accesscntrControl__)(struct AccessCounterBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__accesscntrGetMemInterMapParams__)(struct AccessCounterBuffer *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__accesscntrGetMemoryMappingDescriptor__)(struct AccessCounterBuffer *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__accesscntrControlFilter__)(struct AccessCounterBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__accesscntrUnregisterEvent__)(struct AccessCounterBuffer *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__accesscntrControlSerialization_Prologue__)(struct AccessCounterBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__accesscntrCanCopy__)(struct AccessCounterBuffer *); - NvBool (*__accesscntrIsPartialUnmapSupported__)(struct AccessCounterBuffer *); - void (*__accesscntrPreDestruct__)(struct AccessCounterBuffer *); - NV_STATUS (*__accesscntrIsDuplicate__)(struct AccessCounterBuffer *, NvHandle, NvBool *); - void (*__accesscntrControlSerialization_Epilogue__)(struct AccessCounterBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__accesscntrGetNotificationListPtr__)(struct AccessCounterBuffer *); - struct NotifShare *(*__accesscntrGetNotificationShare__)(struct AccessCounterBuffer *); - NvBool (*__accesscntrAccessCallback__)(struct AccessCounterBuffer *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct INotifier *__nvoc_pbase_INotifier; // inotify super^2 + struct Notifier *__nvoc_pbase_Notifier; // notify super + struct AccessCounterBuffer *__nvoc_pbase_AccessCounterBuffer; // accesscntr + + // Vtable with 40 per-object function pointers + NV_STATUS (*__accesscntrMap__)(struct AccessCounterBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual override (res) base (gpures) + NV_STATUS (*__accesscntrUnmap__)(struct AccessCounterBuffer * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual override (res) base (gpures) + NV_STATUS (*__accesscntrGetMapAddrSpace__)(struct AccessCounterBuffer * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (gpures) base (gpures) + NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferReadGet__)(struct AccessCounterBuffer * /*this*/, NVC365_CTRL_ACCESS_CNTR_BUFFER_READ_GET_PARAMS *); // exported (id=0xc3650101) + NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferReadPut__)(struct AccessCounterBuffer * /*this*/, NVC365_CTRL_ACCESS_CNTR_BUFFER_READ_PUT_PARAMS *); // exported (id=0xc3650103) + NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferWriteGet__)(struct AccessCounterBuffer * /*this*/, NVC365_CTRL_ACCESS_CNTR_BUFFER_WRITE_GET_PARAMS *); // exported (id=0xc3650102) + NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferEnable__)(struct AccessCounterBuffer * /*this*/, NVC365_CTRL_ACCESS_CNTR_BUFFER_ENABLE_PARAMS *); // exported (id=0xc3650104) + NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferGetSize__)(struct AccessCounterBuffer * /*this*/, NVC365_CTRL_ACCESS_CNTR_BUFFER_GET_SIZE_PARAMS *); // exported (id=0xc3650105) + NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferGetRegisterMappings__)(struct AccessCounterBuffer * /*this*/, NVC365_CTRL_ACCESS_CNTR_BUFFER_GET_REGISTER_MAPPINGS_PARAMS *); // exported (id=0xc3650106) + NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferGetFullInfo__)(struct AccessCounterBuffer * /*this*/, NVC365_CTRL_ACCESS_CNTR_BUFFER_GET_FULL_INFO_PARAMS *); // exported (id=0xc3650107) + NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferResetCounters__)(struct AccessCounterBuffer * /*this*/, NVC365_CTRL_ACCESS_CNTR_BUFFER_RESET_COUNTERS_PARAMS *); // exported (id=0xc3650108) + NV_STATUS (*__accesscntrCtrlCmdAccessCntrSetConfig__)(struct AccessCounterBuffer * /*this*/, NVC365_CTRL_ACCESS_CNTR_SET_CONFIG_PARAMS *); // exported (id=0xc3650109) + NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferEnableIntr__)(struct AccessCounterBuffer * /*this*/, NVC365_CTRL_ACCESS_CNTR_BUFFER_ENABLE_INTR_PARAMS *); // exported (id=0xc365010b) + NV_STATUS (*__accesscntrControl__)(struct AccessCounterBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NvBool (*__accesscntrShareCallback__)(struct AccessCounterBuffer * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__accesscntrGetRegBaseOffsetAndSize__)(struct AccessCounterBuffer * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__accesscntrInternalControlForward__)(struct AccessCounterBuffer * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__accesscntrGetInternalObjectHandle__)(struct AccessCounterBuffer * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__accesscntrAccessCallback__)(struct AccessCounterBuffer * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__accesscntrGetMemInterMapParams__)(struct AccessCounterBuffer * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__accesscntrCheckMemInterUnmap__)(struct AccessCounterBuffer * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__accesscntrGetMemoryMappingDescriptor__)(struct AccessCounterBuffer * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__accesscntrControlSerialization_Prologue__)(struct AccessCounterBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__accesscntrControlSerialization_Epilogue__)(struct AccessCounterBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__accesscntrControl_Prologue__)(struct AccessCounterBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__accesscntrControl_Epilogue__)(struct AccessCounterBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__accesscntrCanCopy__)(struct AccessCounterBuffer * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__accesscntrIsDuplicate__)(struct AccessCounterBuffer * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__accesscntrPreDestruct__)(struct AccessCounterBuffer * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__accesscntrControlFilter__)(struct AccessCounterBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__accesscntrIsPartialUnmapSupported__)(struct AccessCounterBuffer * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__accesscntrMapTo__)(struct AccessCounterBuffer * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__accesscntrUnmapFrom__)(struct AccessCounterBuffer * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__accesscntrGetRefCount__)(struct AccessCounterBuffer * /*this*/); // virtual inherited (res) base (gpures) + void (*__accesscntrAddAdditionalDependants__)(struct RsClient *, struct AccessCounterBuffer * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + PEVENTNOTIFICATION * (*__accesscntrGetNotificationListPtr__)(struct AccessCounterBuffer * /*this*/); // virtual inherited (notify) base (notify) + struct NotifShare * (*__accesscntrGetNotificationShare__)(struct AccessCounterBuffer * /*this*/); // virtual inherited (notify) base (notify) + void (*__accesscntrSetNotificationShare__)(struct AccessCounterBuffer * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) + NV_STATUS (*__accesscntrUnregisterEvent__)(struct AccessCounterBuffer * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) + NV_STATUS (*__accesscntrGetOrAllocNotifShare__)(struct AccessCounterBuffer * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) + + // Data members struct MEMORY_DESCRIPTOR *pUvmAccessCntrAllocMemDesc; NvU32 accessCounterIndex; }; @@ -117,6 +136,7 @@ typedef struct AccessCounterBuffer AccessCounterBuffer; #define __nvoc_class_id_AccessCounterBuffer 0x1f0074 #endif /* __nvoc_class_id_AccessCounterBuffer */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_AccessCounterBuffer; #define __staticCast_AccessCounterBuffer(pThis) \ @@ -129,239 +149,282 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_AccessCounterBuffer; ((AccessCounterBuffer*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(AccessCounterBuffer))) #endif //__nvoc_access_cntr_buffer_h_disabled - NV_STATUS __nvoc_objCreateDynamic_AccessCounterBuffer(AccessCounterBuffer**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_AccessCounterBuffer(AccessCounterBuffer**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_AccessCounterBuffer(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_AccessCounterBuffer((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define accesscntrMap_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__accesscntrMap__ #define accesscntrMap(pAccessCounterBuffer, pCallContext, pParams, pCpuMapping) accesscntrMap_DISPATCH(pAccessCounterBuffer, pCallContext, pParams, pCpuMapping) +#define accesscntrUnmap_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__accesscntrUnmap__ #define accesscntrUnmap(pAccessCounterBuffer, pCallContext, pCpuMapping) accesscntrUnmap_DISPATCH(pAccessCounterBuffer, pCallContext, pCpuMapping) +#define accesscntrGetMapAddrSpace_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__accesscntrGetMapAddrSpace__ #define accesscntrGetMapAddrSpace(pAccessCounterBuffer, pCallContext, mapFlags, pAddrSpace) accesscntrGetMapAddrSpace_DISPATCH(pAccessCounterBuffer, pCallContext, mapFlags, pAddrSpace) +#define accesscntrCtrlCmdAccessCntrBufferReadGet_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrBufferReadGet__ #define accesscntrCtrlCmdAccessCntrBufferReadGet(pAccessCounterBuffer, pGetParams) accesscntrCtrlCmdAccessCntrBufferReadGet_DISPATCH(pAccessCounterBuffer, pGetParams) +#define accesscntrCtrlCmdAccessCntrBufferReadPut_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrBufferReadPut__ #define accesscntrCtrlCmdAccessCntrBufferReadPut(pAccessCounterBuffer, pParams) accesscntrCtrlCmdAccessCntrBufferReadPut_DISPATCH(pAccessCounterBuffer, pParams) +#define accesscntrCtrlCmdAccessCntrBufferWriteGet_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrBufferWriteGet__ #define accesscntrCtrlCmdAccessCntrBufferWriteGet(pAccessCounterBuffer, pGetParams) accesscntrCtrlCmdAccessCntrBufferWriteGet_DISPATCH(pAccessCounterBuffer, pGetParams) +#define accesscntrCtrlCmdAccessCntrBufferEnable_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrBufferEnable__ #define accesscntrCtrlCmdAccessCntrBufferEnable(pAccessCounterBuffer, pGetParams) accesscntrCtrlCmdAccessCntrBufferEnable_DISPATCH(pAccessCounterBuffer, pGetParams) +#define accesscntrCtrlCmdAccessCntrBufferGetSize_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrBufferGetSize__ #define accesscntrCtrlCmdAccessCntrBufferGetSize(pAccessCounterBuffer, pGetParams) accesscntrCtrlCmdAccessCntrBufferGetSize_DISPATCH(pAccessCounterBuffer, pGetParams) +#define accesscntrCtrlCmdAccessCntrBufferGetRegisterMappings_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrBufferGetRegisterMappings__ #define accesscntrCtrlCmdAccessCntrBufferGetRegisterMappings(pAccessCounterBuffer, pParams) accesscntrCtrlCmdAccessCntrBufferGetRegisterMappings_DISPATCH(pAccessCounterBuffer, pParams) +#define accesscntrCtrlCmdAccessCntrBufferGetFullInfo_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrBufferGetFullInfo__ #define accesscntrCtrlCmdAccessCntrBufferGetFullInfo(pAccessCounterBuffer, pParams) accesscntrCtrlCmdAccessCntrBufferGetFullInfo_DISPATCH(pAccessCounterBuffer, pParams) +#define accesscntrCtrlCmdAccessCntrBufferResetCounters_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrBufferResetCounters__ #define accesscntrCtrlCmdAccessCntrBufferResetCounters(pAccessCounterBuffer, pParams) accesscntrCtrlCmdAccessCntrBufferResetCounters_DISPATCH(pAccessCounterBuffer, pParams) +#define accesscntrCtrlCmdAccessCntrSetConfig_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrSetConfig__ #define accesscntrCtrlCmdAccessCntrSetConfig(pAccessCounterBuffer, pParams) accesscntrCtrlCmdAccessCntrSetConfig_DISPATCH(pAccessCounterBuffer, pParams) +#define accesscntrCtrlCmdAccessCntrBufferEnableIntr_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrBufferEnableIntr__ #define accesscntrCtrlCmdAccessCntrBufferEnableIntr(pAccessCounterBuffer, pGetParams) accesscntrCtrlCmdAccessCntrBufferEnableIntr_DISPATCH(pAccessCounterBuffer, pGetParams) +#define accesscntrControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define accesscntrControl(pGpuResource, pCallContext, pParams) accesscntrControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define accesscntrShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define accesscntrShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) accesscntrShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define accesscntrCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) accesscntrCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define accesscntrGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) accesscntrGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -#define accesscntrMapTo(pResource, pParams) accesscntrMapTo_DISPATCH(pResource, pParams) -#define accesscntrSetNotificationShare(pNotifier, pNotifShare) accesscntrSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define accesscntrGetRefCount(pResource) accesscntrGetRefCount_DISPATCH(pResource) -#define accesscntrAddAdditionalDependants(pClient, pResource, pReference) accesscntrAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define accesscntrControl_Prologue(pResource, pCallContext, pParams) accesscntrControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define accesscntrGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define accesscntrGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) accesscntrGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define accesscntrInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define accesscntrInternalControlForward(pGpuResource, command, pParams, size) accesscntrInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define accesscntrUnmapFrom(pResource, pParams) accesscntrUnmapFrom_DISPATCH(pResource, pParams) -#define accesscntrControl_Epilogue(pResource, pCallContext, pParams) accesscntrControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define accesscntrGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define accesscntrGetInternalObjectHandle(pGpuResource) accesscntrGetInternalObjectHandle_DISPATCH(pGpuResource) -#define accesscntrControl(pGpuResource, pCallContext, pParams) accesscntrControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define accesscntrAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define accesscntrAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) accesscntrAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define accesscntrGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define accesscntrGetMemInterMapParams(pRmResource, pParams) accesscntrGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define accesscntrCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define accesscntrCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) accesscntrCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define accesscntrGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define accesscntrGetMemoryMappingDescriptor(pRmResource, ppMemDesc) accesscntrGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define accesscntrControlFilter(pResource, pCallContext, pParams) accesscntrControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define accesscntrUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) accesscntrUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define accesscntrControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define accesscntrControlSerialization_Prologue(pResource, pCallContext, pParams) accesscntrControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define accesscntrControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define accesscntrControlSerialization_Epilogue(pResource, pCallContext, pParams) accesscntrControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define accesscntrControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define accesscntrControl_Prologue(pResource, pCallContext, pParams) accesscntrControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define accesscntrControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define accesscntrControl_Epilogue(pResource, pCallContext, pParams) accesscntrControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define accesscntrCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define accesscntrCanCopy(pResource) accesscntrCanCopy_DISPATCH(pResource) -#define accesscntrIsPartialUnmapSupported(pResource) accesscntrIsPartialUnmapSupported_DISPATCH(pResource) -#define accesscntrPreDestruct(pResource) accesscntrPreDestruct_DISPATCH(pResource) +#define accesscntrIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define accesscntrIsDuplicate(pResource, hMemory, pDuplicate) accesscntrIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define accesscntrControlSerialization_Epilogue(pResource, pCallContext, pParams) accesscntrControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define accesscntrPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define accesscntrPreDestruct(pResource) accesscntrPreDestruct_DISPATCH(pResource) +#define accesscntrControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define accesscntrControlFilter(pResource, pCallContext, pParams) accesscntrControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define accesscntrIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define accesscntrIsPartialUnmapSupported(pResource) accesscntrIsPartialUnmapSupported_DISPATCH(pResource) +#define accesscntrMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define accesscntrMapTo(pResource, pParams) accesscntrMapTo_DISPATCH(pResource, pParams) +#define accesscntrUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define accesscntrUnmapFrom(pResource, pParams) accesscntrUnmapFrom_DISPATCH(pResource, pParams) +#define accesscntrGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define accesscntrGetRefCount(pResource) accesscntrGetRefCount_DISPATCH(pResource) +#define accesscntrAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define accesscntrAddAdditionalDependants(pClient, pResource, pReference) accesscntrAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define accesscntrGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define accesscntrGetNotificationListPtr(pNotifier) accesscntrGetNotificationListPtr_DISPATCH(pNotifier) +#define accesscntrGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ #define accesscntrGetNotificationShare(pNotifier) accesscntrGetNotificationShare_DISPATCH(pNotifier) -#define accesscntrAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) accesscntrAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS accesscntrMap_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); +#define accesscntrSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define accesscntrSetNotificationShare(pNotifier, pNotifShare) accesscntrSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define accesscntrUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define accesscntrUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) accesscntrUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define accesscntrGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define accesscntrGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) accesscntrGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) +// Dispatch functions static inline NV_STATUS accesscntrMap_DISPATCH(struct AccessCounterBuffer *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return pAccessCounterBuffer->__accesscntrMap__(pAccessCounterBuffer, pCallContext, pParams, pCpuMapping); } -NV_STATUS accesscntrUnmap_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); - static inline NV_STATUS accesscntrUnmap_DISPATCH(struct AccessCounterBuffer *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return pAccessCounterBuffer->__accesscntrUnmap__(pAccessCounterBuffer, pCallContext, pCpuMapping); } -NV_STATUS accesscntrGetMapAddrSpace_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); - static inline NV_STATUS accesscntrGetMapAddrSpace_DISPATCH(struct AccessCounterBuffer *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pAccessCounterBuffer->__accesscntrGetMapAddrSpace__(pAccessCounterBuffer, pCallContext, mapFlags, pAddrSpace); } -NV_STATUS accesscntrCtrlCmdAccessCntrBufferReadGet_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_READ_GET_PARAMS *pGetParams); - static inline NV_STATUS accesscntrCtrlCmdAccessCntrBufferReadGet_DISPATCH(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_READ_GET_PARAMS *pGetParams) { return pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrBufferReadGet__(pAccessCounterBuffer, pGetParams); } -NV_STATUS accesscntrCtrlCmdAccessCntrBufferReadPut_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_READ_PUT_PARAMS *pParams); - static inline NV_STATUS accesscntrCtrlCmdAccessCntrBufferReadPut_DISPATCH(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_READ_PUT_PARAMS *pParams) { return pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrBufferReadPut__(pAccessCounterBuffer, pParams); } -NV_STATUS accesscntrCtrlCmdAccessCntrBufferWriteGet_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_WRITE_GET_PARAMS *pGetParams); - static inline NV_STATUS accesscntrCtrlCmdAccessCntrBufferWriteGet_DISPATCH(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_WRITE_GET_PARAMS *pGetParams) { return pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrBufferWriteGet__(pAccessCounterBuffer, pGetParams); } -NV_STATUS accesscntrCtrlCmdAccessCntrBufferEnable_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_ENABLE_PARAMS *pGetParams); - static inline NV_STATUS accesscntrCtrlCmdAccessCntrBufferEnable_DISPATCH(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_ENABLE_PARAMS *pGetParams) { return pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrBufferEnable__(pAccessCounterBuffer, pGetParams); } -NV_STATUS accesscntrCtrlCmdAccessCntrBufferGetSize_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_GET_SIZE_PARAMS *pGetParams); - static inline NV_STATUS accesscntrCtrlCmdAccessCntrBufferGetSize_DISPATCH(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_GET_SIZE_PARAMS *pGetParams) { return pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrBufferGetSize__(pAccessCounterBuffer, pGetParams); } -NV_STATUS accesscntrCtrlCmdAccessCntrBufferGetRegisterMappings_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_GET_REGISTER_MAPPINGS_PARAMS *pParams); - static inline NV_STATUS accesscntrCtrlCmdAccessCntrBufferGetRegisterMappings_DISPATCH(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_GET_REGISTER_MAPPINGS_PARAMS *pParams) { return pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrBufferGetRegisterMappings__(pAccessCounterBuffer, pParams); } -NV_STATUS accesscntrCtrlCmdAccessCntrBufferGetFullInfo_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_GET_FULL_INFO_PARAMS *pParams); - static inline NV_STATUS accesscntrCtrlCmdAccessCntrBufferGetFullInfo_DISPATCH(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_GET_FULL_INFO_PARAMS *pParams) { return pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrBufferGetFullInfo__(pAccessCounterBuffer, pParams); } -NV_STATUS accesscntrCtrlCmdAccessCntrBufferResetCounters_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_RESET_COUNTERS_PARAMS *pParams); - static inline NV_STATUS accesscntrCtrlCmdAccessCntrBufferResetCounters_DISPATCH(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_RESET_COUNTERS_PARAMS *pParams) { return pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrBufferResetCounters__(pAccessCounterBuffer, pParams); } -NV_STATUS accesscntrCtrlCmdAccessCntrSetConfig_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_SET_CONFIG_PARAMS *pParams); - static inline NV_STATUS accesscntrCtrlCmdAccessCntrSetConfig_DISPATCH(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_SET_CONFIG_PARAMS *pParams) { return pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrSetConfig__(pAccessCounterBuffer, pParams); } -NV_STATUS accesscntrCtrlCmdAccessCntrBufferEnableIntr_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_ENABLE_INTR_PARAMS *pGetParams); - static inline NV_STATUS accesscntrCtrlCmdAccessCntrBufferEnableIntr_DISPATCH(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_ENABLE_INTR_PARAMS *pGetParams) { return pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrBufferEnableIntr__(pAccessCounterBuffer, pGetParams); } +static inline NV_STATUS accesscntrControl_DISPATCH(struct AccessCounterBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__accesscntrControl__(pGpuResource, pCallContext, pParams); +} + static inline NvBool accesscntrShareCallback_DISPATCH(struct AccessCounterBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return pGpuResource->__accesscntrShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline NV_STATUS accesscntrCheckMemInterUnmap_DISPATCH(struct AccessCounterBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__accesscntrCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS accesscntrGetRegBaseOffsetAndSize_DISPATCH(struct AccessCounterBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__accesscntrGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS accesscntrGetOrAllocNotifShare_DISPATCH(struct AccessCounterBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__accesscntrGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); +static inline NV_STATUS accesscntrInternalControlForward_DISPATCH(struct AccessCounterBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__accesscntrInternalControlForward__(pGpuResource, command, pParams, size); } -static inline NV_STATUS accesscntrMapTo_DISPATCH(struct AccessCounterBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__accesscntrMapTo__(pResource, pParams); +static inline NvHandle accesscntrGetInternalObjectHandle_DISPATCH(struct AccessCounterBuffer *pGpuResource) { + return pGpuResource->__accesscntrGetInternalObjectHandle__(pGpuResource); } -static inline void accesscntrSetNotificationShare_DISPATCH(struct AccessCounterBuffer *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__accesscntrSetNotificationShare__(pNotifier, pNotifShare); +static inline NvBool accesscntrAccessCallback_DISPATCH(struct AccessCounterBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__accesscntrAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NvU32 accesscntrGetRefCount_DISPATCH(struct AccessCounterBuffer *pResource) { - return pResource->__accesscntrGetRefCount__(pResource); +static inline NV_STATUS accesscntrGetMemInterMapParams_DISPATCH(struct AccessCounterBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__accesscntrGetMemInterMapParams__(pRmResource, pParams); } -static inline void accesscntrAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct AccessCounterBuffer *pResource, RsResourceRef *pReference) { - pResource->__accesscntrAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS accesscntrCheckMemInterUnmap_DISPATCH(struct AccessCounterBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__accesscntrCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS accesscntrControl_Prologue_DISPATCH(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__accesscntrControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS accesscntrGetMemoryMappingDescriptor_DISPATCH(struct AccessCounterBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__accesscntrGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NV_STATUS accesscntrGetRegBaseOffsetAndSize_DISPATCH(struct AccessCounterBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__accesscntrGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS accesscntrControlSerialization_Prologue_DISPATCH(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__accesscntrControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS accesscntrInternalControlForward_DISPATCH(struct AccessCounterBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__accesscntrInternalControlForward__(pGpuResource, command, pParams, size); +static inline void accesscntrControlSerialization_Epilogue_DISPATCH(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__accesscntrControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS accesscntrUnmapFrom_DISPATCH(struct AccessCounterBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__accesscntrUnmapFrom__(pResource, pParams); +static inline NV_STATUS accesscntrControl_Prologue_DISPATCH(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__accesscntrControl_Prologue__(pResource, pCallContext, pParams); } static inline void accesscntrControl_Epilogue_DISPATCH(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { pResource->__accesscntrControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NvHandle accesscntrGetInternalObjectHandle_DISPATCH(struct AccessCounterBuffer *pGpuResource) { - return pGpuResource->__accesscntrGetInternalObjectHandle__(pGpuResource); -} - -static inline NV_STATUS accesscntrControl_DISPATCH(struct AccessCounterBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__accesscntrControl__(pGpuResource, pCallContext, pParams); +static inline NvBool accesscntrCanCopy_DISPATCH(struct AccessCounterBuffer *pResource) { + return pResource->__accesscntrCanCopy__(pResource); } -static inline NV_STATUS accesscntrGetMemInterMapParams_DISPATCH(struct AccessCounterBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__accesscntrGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS accesscntrIsDuplicate_DISPATCH(struct AccessCounterBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__accesscntrIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS accesscntrGetMemoryMappingDescriptor_DISPATCH(struct AccessCounterBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__accesscntrGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void accesscntrPreDestruct_DISPATCH(struct AccessCounterBuffer *pResource) { + pResource->__accesscntrPreDestruct__(pResource); } static inline NV_STATUS accesscntrControlFilter_DISPATCH(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__accesscntrControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS accesscntrUnregisterEvent_DISPATCH(struct AccessCounterBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__accesscntrUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline NvBool accesscntrIsPartialUnmapSupported_DISPATCH(struct AccessCounterBuffer *pResource) { + return pResource->__accesscntrIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS accesscntrControlSerialization_Prologue_DISPATCH(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__accesscntrControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS accesscntrMapTo_DISPATCH(struct AccessCounterBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__accesscntrMapTo__(pResource, pParams); } -static inline NvBool accesscntrCanCopy_DISPATCH(struct AccessCounterBuffer *pResource) { - return pResource->__accesscntrCanCopy__(pResource); +static inline NV_STATUS accesscntrUnmapFrom_DISPATCH(struct AccessCounterBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__accesscntrUnmapFrom__(pResource, pParams); } -static inline NvBool accesscntrIsPartialUnmapSupported_DISPATCH(struct AccessCounterBuffer *pResource) { - return pResource->__accesscntrIsPartialUnmapSupported__(pResource); +static inline NvU32 accesscntrGetRefCount_DISPATCH(struct AccessCounterBuffer *pResource) { + return pResource->__accesscntrGetRefCount__(pResource); } -static inline void accesscntrPreDestruct_DISPATCH(struct AccessCounterBuffer *pResource) { - pResource->__accesscntrPreDestruct__(pResource); +static inline void accesscntrAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct AccessCounterBuffer *pResource, RsResourceRef *pReference) { + pResource->__accesscntrAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NV_STATUS accesscntrIsDuplicate_DISPATCH(struct AccessCounterBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__accesscntrIsDuplicate__(pResource, hMemory, pDuplicate); +static inline PEVENTNOTIFICATION * accesscntrGetNotificationListPtr_DISPATCH(struct AccessCounterBuffer *pNotifier) { + return pNotifier->__accesscntrGetNotificationListPtr__(pNotifier); } -static inline void accesscntrControlSerialization_Epilogue_DISPATCH(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__accesscntrControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline struct NotifShare * accesscntrGetNotificationShare_DISPATCH(struct AccessCounterBuffer *pNotifier) { + return pNotifier->__accesscntrGetNotificationShare__(pNotifier); } -static inline PEVENTNOTIFICATION *accesscntrGetNotificationListPtr_DISPATCH(struct AccessCounterBuffer *pNotifier) { - return pNotifier->__accesscntrGetNotificationListPtr__(pNotifier); +static inline void accesscntrSetNotificationShare_DISPATCH(struct AccessCounterBuffer *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__accesscntrSetNotificationShare__(pNotifier, pNotifShare); } -static inline struct NotifShare *accesscntrGetNotificationShare_DISPATCH(struct AccessCounterBuffer *pNotifier) { - return pNotifier->__accesscntrGetNotificationShare__(pNotifier); +static inline NV_STATUS accesscntrUnregisterEvent_DISPATCH(struct AccessCounterBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__accesscntrUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static inline NvBool accesscntrAccessCallback_DISPATCH(struct AccessCounterBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__accesscntrAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS accesscntrGetOrAllocNotifShare_DISPATCH(struct AccessCounterBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return pNotifier->__accesscntrGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } +NV_STATUS accesscntrMap_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); + +NV_STATUS accesscntrUnmap_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); + +NV_STATUS accesscntrGetMapAddrSpace_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); + +NV_STATUS accesscntrCtrlCmdAccessCntrBufferReadGet_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_READ_GET_PARAMS *pGetParams); + +NV_STATUS accesscntrCtrlCmdAccessCntrBufferReadPut_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_READ_PUT_PARAMS *pParams); + +NV_STATUS accesscntrCtrlCmdAccessCntrBufferWriteGet_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_WRITE_GET_PARAMS *pGetParams); + +NV_STATUS accesscntrCtrlCmdAccessCntrBufferEnable_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_ENABLE_PARAMS *pGetParams); + +NV_STATUS accesscntrCtrlCmdAccessCntrBufferGetSize_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_GET_SIZE_PARAMS *pGetParams); + +NV_STATUS accesscntrCtrlCmdAccessCntrBufferGetRegisterMappings_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_GET_REGISTER_MAPPINGS_PARAMS *pParams); + +NV_STATUS accesscntrCtrlCmdAccessCntrBufferGetFullInfo_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_GET_FULL_INFO_PARAMS *pParams); + +NV_STATUS accesscntrCtrlCmdAccessCntrBufferResetCounters_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_RESET_COUNTERS_PARAMS *pParams); + +NV_STATUS accesscntrCtrlCmdAccessCntrSetConfig_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_SET_CONFIG_PARAMS *pParams); + +NV_STATUS accesscntrCtrlCmdAccessCntrBufferEnableIntr_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_ENABLE_INTR_PARAMS *pGetParams); + NV_STATUS accesscntrConstruct_IMPL(struct AccessCounterBuffer *arg_pAccessCounterBuffer, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_accesscntrConstruct(arg_pAccessCounterBuffer, arg_pCallContext, arg_pParams) accesscntrConstruct_IMPL(arg_pAccessCounterBuffer, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_allclasses.h b/src/nvidia/generated/g_allclasses.h index 8e7fe01795..70ec2e171f 100644 --- a/src/nvidia/generated/g_allclasses.h +++ b/src/nvidia/generated/g_allclasses.h @@ -75,6 +75,7 @@ #include // NV01_EVENT_KERNEL_CALLBACK_EX #include // NV01_TIMER #include // KERNEL_GRAPHICS_CONTEXT +#include // LOCK_STRESS_OBJECT #include // NV50_CHANNEL_GPFIFO #include // GF100_CHANNEL_GPFIFO #include // KEPLER_CHANNEL_GPFIFO_A @@ -426,6 +427,10 @@ #define KERNEL_GRAPHICS_CONTEXT (0x00000090) #endif +#ifndef LOCK_STRESS_OBJECT +#define LOCK_STRESS_OBJECT (0x00000100) +#endif + #ifndef NV50_CHANNEL_GPFIFO #define NV50_CHANNEL_GPFIFO (0x0000506f) #endif diff --git a/src/nvidia/generated/g_binary_api_nvoc.c b/src/nvidia/generated/g_binary_api_nvoc.c index dd151b6a7d..d05d8b3817 100644 --- a/src/nvidia/generated/g_binary_api_nvoc.c +++ b/src/nvidia/generated/g_binary_api_nvoc.c @@ -93,106 +93,137 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_BinaryApi = /*pExportInfo=*/ &__nvoc_export_info_BinaryApi }; -static NV_STATUS __nvoc_thunk_BinaryApi_gpuresControl(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return binapiControl((struct BinaryApi *)(((unsigned char *)pResource) - __nvoc_rtti_BinaryApi_GpuResource.offset), pCallContext, pParams); +// 1 down-thunk(s) defined to bridge methods in BinaryApi from superclasses + +// binapiControl: virtual override (res) base (gpures) +static NV_STATUS __nvoc_down_thunk_BinaryApi_gpuresControl(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return binapiControl((struct BinaryApi *)(((unsigned char *) pResource) - __nvoc_rtti_BinaryApi_GpuResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_GpuResource_binapiShareCallback(struct BinaryApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); + +// 24 up-thunk(s) defined to bridge methods in BinaryApi to superclasses + +// binapiMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_binapiMap(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RmResource_binapiCheckMemInterUnmap(struct BinaryApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_BinaryApi_RmResource.offset), bSubdeviceHandleProvided); +// binapiUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_binapiUnmap(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_binapiMapTo(struct BinaryApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApi_RsResource.offset), pParams); +// binapiShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_binapiShareCallback(struct BinaryApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_GpuResource_binapiGetMapAddrSpace(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// binapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_binapiGetRegBaseOffsetAndSize(struct BinaryApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset), pGpu, pOffset, pSize); } -static NvU32 __nvoc_thunk_RsResource_binapiGetRefCount(struct BinaryApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApi_RsResource.offset)); +// binapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_binapiGetMapAddrSpace(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static void __nvoc_thunk_RsResource_binapiAddAdditionalDependants(struct RsClient *pClient, struct BinaryApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApi_RsResource.offset), pReference); +// binapiInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_binapiInternalControlForward(struct BinaryApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_RmResource_binapiControl_Prologue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApi_RmResource.offset), pCallContext, pParams); +// binapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_binapiGetInternalObjectHandle(struct BinaryApi *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_binapiGetRegBaseOffsetAndSize(struct BinaryApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset), pGpu, pOffset, pSize); +// binapiAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_binapiAccessCallback(struct BinaryApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_GpuResource_binapiInternalControlForward(struct BinaryApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset), command, pParams, size); +// binapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_binapiGetMemInterMapParams(struct BinaryApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_BinaryApi_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_binapiUnmapFrom(struct BinaryApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApi_RsResource.offset), pParams); +// binapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_binapiCheckMemInterUnmap(struct BinaryApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_BinaryApi_RmResource.offset), bSubdeviceHandleProvided); } -static void __nvoc_thunk_RmResource_binapiControl_Epilogue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApi_RmResource.offset), pCallContext, pParams); +// binapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_binapiGetMemoryMappingDescriptor(struct BinaryApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_BinaryApi_RmResource.offset), ppMemDesc); } -static NvHandle __nvoc_thunk_GpuResource_binapiGetInternalObjectHandle(struct BinaryApi *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset)); +// binapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_binapiControlSerialization_Prologue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_binapiUnmap(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset), pCallContext, pCpuMapping); +// binapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_binapiControlSerialization_Epilogue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_binapiGetMemInterMapParams(struct BinaryApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_BinaryApi_RmResource.offset), pParams); +// binapiControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_binapiControl_Prologue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_binapiGetMemoryMappingDescriptor(struct BinaryApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_BinaryApi_RmResource.offset), ppMemDesc); +// binapiControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_binapiControl_Epilogue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_binapiControlFilter(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApi_RsResource.offset), pCallContext, pParams); +// binapiCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_binapiCanCopy(struct BinaryApi *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RmResource_binapiControlSerialization_Prologue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApi_RmResource.offset), pCallContext, pParams); +// binapiIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_binapiIsDuplicate(struct BinaryApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RsResource.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_RsResource_binapiCanCopy(struct BinaryApi *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApi_RsResource.offset)); +// binapiPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_binapiPreDestruct(struct BinaryApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_binapiIsPartialUnmapSupported(struct BinaryApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApi_RsResource.offset)); +// binapiControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_binapiControlFilter(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_binapiPreDestruct(struct BinaryApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApi_RsResource.offset)); +// binapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_binapiIsPartialUnmapSupported(struct BinaryApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_binapiIsDuplicate(struct BinaryApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApi_RsResource.offset), hMemory, pDuplicate); +// binapiMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_binapiMapTo(struct BinaryApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_binapiControlSerialization_Epilogue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApi_RmResource.offset), pCallContext, pParams); +// binapiUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_binapiUnmapFrom(struct BinaryApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_binapiMap(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// binapiGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_binapiGetRefCount(struct BinaryApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_binapiAccessCallback(struct BinaryApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// binapiAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_binapiAddAdditionalDependants(struct RsClient *pClient, struct BinaryApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_BinaryApi = { /*numEntries=*/ 0, @@ -228,63 +259,92 @@ NV_STATUS __nvoc_ctor_BinaryApi(BinaryApi *pThis, struct CALL_CONTEXT * arg_pCal return status; } +// Vtable initialization static void __nvoc_init_funcTable_BinaryApi_1(BinaryApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // binapiControl -- virtual override (res) base (gpures) pThis->__binapiControl__ = &binapiControl_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresControl__ = &__nvoc_down_thunk_BinaryApi_gpuresControl; - pThis->__nvoc_base_GpuResource.__gpuresControl__ = &__nvoc_thunk_BinaryApi_gpuresControl; + // binapiMap -- virtual inherited (gpures) base (gpures) + pThis->__binapiMap__ = &__nvoc_up_thunk_GpuResource_binapiMap; - pThis->__binapiShareCallback__ = &__nvoc_thunk_GpuResource_binapiShareCallback; + // binapiUnmap -- virtual inherited (gpures) base (gpures) + pThis->__binapiUnmap__ = &__nvoc_up_thunk_GpuResource_binapiUnmap; - pThis->__binapiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_binapiCheckMemInterUnmap; + // binapiShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__binapiShareCallback__ = &__nvoc_up_thunk_GpuResource_binapiShareCallback; - pThis->__binapiMapTo__ = &__nvoc_thunk_RsResource_binapiMapTo; + // binapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__binapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_binapiGetRegBaseOffsetAndSize; - pThis->__binapiGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_binapiGetMapAddrSpace; + // binapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__binapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_binapiGetMapAddrSpace; - pThis->__binapiGetRefCount__ = &__nvoc_thunk_RsResource_binapiGetRefCount; + // binapiInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__binapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_binapiInternalControlForward; - pThis->__binapiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_binapiAddAdditionalDependants; + // binapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__binapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_binapiGetInternalObjectHandle; - pThis->__binapiControl_Prologue__ = &__nvoc_thunk_RmResource_binapiControl_Prologue; + // binapiAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__binapiAccessCallback__ = &__nvoc_up_thunk_RmResource_binapiAccessCallback; - pThis->__binapiGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_binapiGetRegBaseOffsetAndSize; + // binapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__binapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_binapiGetMemInterMapParams; - pThis->__binapiInternalControlForward__ = &__nvoc_thunk_GpuResource_binapiInternalControlForward; + // binapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__binapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_binapiCheckMemInterUnmap; - pThis->__binapiUnmapFrom__ = &__nvoc_thunk_RsResource_binapiUnmapFrom; + // binapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__binapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_binapiGetMemoryMappingDescriptor; - pThis->__binapiControl_Epilogue__ = &__nvoc_thunk_RmResource_binapiControl_Epilogue; + // binapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__binapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_binapiControlSerialization_Prologue; - pThis->__binapiGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_binapiGetInternalObjectHandle; + // binapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__binapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_binapiControlSerialization_Epilogue; - pThis->__binapiUnmap__ = &__nvoc_thunk_GpuResource_binapiUnmap; + // binapiControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__binapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_binapiControl_Prologue; - pThis->__binapiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_binapiGetMemInterMapParams; + // binapiControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__binapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_binapiControl_Epilogue; - pThis->__binapiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_binapiGetMemoryMappingDescriptor; + // binapiCanCopy -- virtual inherited (res) base (gpures) + pThis->__binapiCanCopy__ = &__nvoc_up_thunk_RsResource_binapiCanCopy; - pThis->__binapiControlFilter__ = &__nvoc_thunk_RsResource_binapiControlFilter; + // binapiIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__binapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_binapiIsDuplicate; - pThis->__binapiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_binapiControlSerialization_Prologue; + // binapiPreDestruct -- virtual inherited (res) base (gpures) + pThis->__binapiPreDestruct__ = &__nvoc_up_thunk_RsResource_binapiPreDestruct; - pThis->__binapiCanCopy__ = &__nvoc_thunk_RsResource_binapiCanCopy; + // binapiControlFilter -- virtual inherited (res) base (gpures) + pThis->__binapiControlFilter__ = &__nvoc_up_thunk_RsResource_binapiControlFilter; - pThis->__binapiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_binapiIsPartialUnmapSupported; + // binapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__binapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_binapiIsPartialUnmapSupported; - pThis->__binapiPreDestruct__ = &__nvoc_thunk_RsResource_binapiPreDestruct; + // binapiMapTo -- virtual inherited (res) base (gpures) + pThis->__binapiMapTo__ = &__nvoc_up_thunk_RsResource_binapiMapTo; - pThis->__binapiIsDuplicate__ = &__nvoc_thunk_RsResource_binapiIsDuplicate; + // binapiUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__binapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_binapiUnmapFrom; - pThis->__binapiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_binapiControlSerialization_Epilogue; + // binapiGetRefCount -- virtual inherited (res) base (gpures) + pThis->__binapiGetRefCount__ = &__nvoc_up_thunk_RsResource_binapiGetRefCount; - pThis->__binapiMap__ = &__nvoc_thunk_GpuResource_binapiMap; + // binapiAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__binapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_binapiAddAdditionalDependants; +} // End __nvoc_init_funcTable_BinaryApi_1 with approximately 26 basic block(s). - pThis->__binapiAccessCallback__ = &__nvoc_thunk_RmResource_binapiAccessCallback; -} +// Initialize vtable(s) for 25 virtual method(s). void __nvoc_init_funcTable_BinaryApi(BinaryApi *pThis) { + + // Initialize vtable(s) with 25 per-object function pointer(s). __nvoc_init_funcTable_BinaryApi_1(pThis); } @@ -463,106 +523,137 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_BinaryApiPrivileged = /*pExportInfo=*/ &__nvoc_export_info_BinaryApiPrivileged }; -static NV_STATUS __nvoc_thunk_BinaryApiPrivileged_binapiControl(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return binapiprivControl((struct BinaryApiPrivileged *)(((unsigned char *)pResource) - __nvoc_rtti_BinaryApiPrivileged_BinaryApi.offset), pCallContext, pParams); +// 1 down-thunk(s) defined to bridge methods in BinaryApiPrivileged from superclasses + +// binapiprivControl: virtual override (res) base (binapi) +static NV_STATUS __nvoc_down_thunk_BinaryApiPrivileged_binapiControl(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return binapiprivControl((struct BinaryApiPrivileged *)(((unsigned char *) pResource) - __nvoc_rtti_BinaryApiPrivileged_BinaryApi.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_GpuResource_binapiprivShareCallback(struct BinaryApiPrivileged *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); + +// 24 up-thunk(s) defined to bridge methods in BinaryApiPrivileged to superclasses + +// binapiprivMap: virtual inherited (gpures) base (binapi) +static NV_STATUS __nvoc_up_thunk_GpuResource_binapiprivMap(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RmResource_binapiprivCheckMemInterUnmap(struct BinaryApiPrivileged *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), bSubdeviceHandleProvided); +// binapiprivUnmap: virtual inherited (gpures) base (binapi) +static NV_STATUS __nvoc_up_thunk_GpuResource_binapiprivUnmap(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_binapiprivMapTo(struct BinaryApiPrivileged *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset), pParams); +// binapiprivShareCallback: virtual inherited (gpures) base (binapi) +static NvBool __nvoc_up_thunk_GpuResource_binapiprivShareCallback(struct BinaryApiPrivileged *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_GpuResource_binapiprivGetMapAddrSpace(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// binapiprivGetRegBaseOffsetAndSize: virtual inherited (gpures) base (binapi) +static NV_STATUS __nvoc_up_thunk_GpuResource_binapiprivGetRegBaseOffsetAndSize(struct BinaryApiPrivileged *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset), pGpu, pOffset, pSize); } -static NvU32 __nvoc_thunk_RsResource_binapiprivGetRefCount(struct BinaryApiPrivileged *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset)); +// binapiprivGetMapAddrSpace: virtual inherited (gpures) base (binapi) +static NV_STATUS __nvoc_up_thunk_GpuResource_binapiprivGetMapAddrSpace(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static void __nvoc_thunk_RsResource_binapiprivAddAdditionalDependants(struct RsClient *pClient, struct BinaryApiPrivileged *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset), pReference); +// binapiprivInternalControlForward: virtual inherited (gpures) base (binapi) +static NV_STATUS __nvoc_up_thunk_GpuResource_binapiprivInternalControlForward(struct BinaryApiPrivileged *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_RmResource_binapiprivControl_Prologue(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), pCallContext, pParams); +// binapiprivGetInternalObjectHandle: virtual inherited (gpures) base (binapi) +static NvHandle __nvoc_up_thunk_GpuResource_binapiprivGetInternalObjectHandle(struct BinaryApiPrivileged *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_binapiprivGetRegBaseOffsetAndSize(struct BinaryApiPrivileged *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset), pGpu, pOffset, pSize); +// binapiprivAccessCallback: virtual inherited (rmres) base (binapi) +static NvBool __nvoc_up_thunk_RmResource_binapiprivAccessCallback(struct BinaryApiPrivileged *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_GpuResource_binapiprivInternalControlForward(struct BinaryApiPrivileged *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset), command, pParams, size); +// binapiprivGetMemInterMapParams: virtual inherited (rmres) base (binapi) +static NV_STATUS __nvoc_up_thunk_RmResource_binapiprivGetMemInterMapParams(struct BinaryApiPrivileged *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_binapiprivUnmapFrom(struct BinaryApiPrivileged *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset), pParams); +// binapiprivCheckMemInterUnmap: virtual inherited (rmres) base (binapi) +static NV_STATUS __nvoc_up_thunk_RmResource_binapiprivCheckMemInterUnmap(struct BinaryApiPrivileged *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), bSubdeviceHandleProvided); } -static void __nvoc_thunk_RmResource_binapiprivControl_Epilogue(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), pCallContext, pParams); +// binapiprivGetMemoryMappingDescriptor: virtual inherited (rmres) base (binapi) +static NV_STATUS __nvoc_up_thunk_RmResource_binapiprivGetMemoryMappingDescriptor(struct BinaryApiPrivileged *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), ppMemDesc); } -static NvHandle __nvoc_thunk_GpuResource_binapiprivGetInternalObjectHandle(struct BinaryApiPrivileged *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset)); +// binapiprivControlSerialization_Prologue: virtual inherited (rmres) base (binapi) +static NV_STATUS __nvoc_up_thunk_RmResource_binapiprivControlSerialization_Prologue(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_binapiprivUnmap(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset), pCallContext, pCpuMapping); +// binapiprivControlSerialization_Epilogue: virtual inherited (rmres) base (binapi) +static void __nvoc_up_thunk_RmResource_binapiprivControlSerialization_Epilogue(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_binapiprivGetMemInterMapParams(struct BinaryApiPrivileged *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), pParams); +// binapiprivControl_Prologue: virtual inherited (rmres) base (binapi) +static NV_STATUS __nvoc_up_thunk_RmResource_binapiprivControl_Prologue(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_binapiprivGetMemoryMappingDescriptor(struct BinaryApiPrivileged *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), ppMemDesc); +// binapiprivControl_Epilogue: virtual inherited (rmres) base (binapi) +static void __nvoc_up_thunk_RmResource_binapiprivControl_Epilogue(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_binapiprivControlFilter(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset), pCallContext, pParams); +// binapiprivCanCopy: virtual inherited (res) base (binapi) +static NvBool __nvoc_up_thunk_RsResource_binapiprivCanCopy(struct BinaryApiPrivileged *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RmResource_binapiprivControlSerialization_Prologue(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), pCallContext, pParams); +// binapiprivIsDuplicate: virtual inherited (res) base (binapi) +static NV_STATUS __nvoc_up_thunk_RsResource_binapiprivIsDuplicate(struct BinaryApiPrivileged *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_RsResource_binapiprivCanCopy(struct BinaryApiPrivileged *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset)); +// binapiprivPreDestruct: virtual inherited (res) base (binapi) +static void __nvoc_up_thunk_RsResource_binapiprivPreDestruct(struct BinaryApiPrivileged *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_binapiprivIsPartialUnmapSupported(struct BinaryApiPrivileged *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset)); +// binapiprivControlFilter: virtual inherited (res) base (binapi) +static NV_STATUS __nvoc_up_thunk_RsResource_binapiprivControlFilter(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_binapiprivPreDestruct(struct BinaryApiPrivileged *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset)); +// binapiprivIsPartialUnmapSupported: inline virtual inherited (res) base (binapi) body +static NvBool __nvoc_up_thunk_RsResource_binapiprivIsPartialUnmapSupported(struct BinaryApiPrivileged *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_binapiprivIsDuplicate(struct BinaryApiPrivileged *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset), hMemory, pDuplicate); +// binapiprivMapTo: virtual inherited (res) base (binapi) +static NV_STATUS __nvoc_up_thunk_RsResource_binapiprivMapTo(struct BinaryApiPrivileged *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_binapiprivControlSerialization_Epilogue(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), pCallContext, pParams); +// binapiprivUnmapFrom: virtual inherited (res) base (binapi) +static NV_STATUS __nvoc_up_thunk_RsResource_binapiprivUnmapFrom(struct BinaryApiPrivileged *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_binapiprivMap(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// binapiprivGetRefCount: virtual inherited (res) base (binapi) +static NvU32 __nvoc_up_thunk_RsResource_binapiprivGetRefCount(struct BinaryApiPrivileged *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_binapiprivAccessCallback(struct BinaryApiPrivileged *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// binapiprivAddAdditionalDependants: virtual inherited (res) base (binapi) +static void __nvoc_up_thunk_RsResource_binapiprivAddAdditionalDependants(struct RsClient *pClient, struct BinaryApiPrivileged *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_BinaryApiPrivileged = { /*numEntries=*/ 0, @@ -598,63 +689,92 @@ NV_STATUS __nvoc_ctor_BinaryApiPrivileged(BinaryApiPrivileged *pThis, struct CAL return status; } +// Vtable initialization static void __nvoc_init_funcTable_BinaryApiPrivileged_1(BinaryApiPrivileged *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // binapiprivControl -- virtual override (res) base (binapi) pThis->__binapiprivControl__ = &binapiprivControl_IMPL; + pThis->__nvoc_base_BinaryApi.__binapiControl__ = &__nvoc_down_thunk_BinaryApiPrivileged_binapiControl; - pThis->__nvoc_base_BinaryApi.__binapiControl__ = &__nvoc_thunk_BinaryApiPrivileged_binapiControl; + // binapiprivMap -- virtual inherited (gpures) base (binapi) + pThis->__binapiprivMap__ = &__nvoc_up_thunk_GpuResource_binapiprivMap; - pThis->__binapiprivShareCallback__ = &__nvoc_thunk_GpuResource_binapiprivShareCallback; + // binapiprivUnmap -- virtual inherited (gpures) base (binapi) + pThis->__binapiprivUnmap__ = &__nvoc_up_thunk_GpuResource_binapiprivUnmap; - pThis->__binapiprivCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_binapiprivCheckMemInterUnmap; + // binapiprivShareCallback -- virtual inherited (gpures) base (binapi) + pThis->__binapiprivShareCallback__ = &__nvoc_up_thunk_GpuResource_binapiprivShareCallback; - pThis->__binapiprivMapTo__ = &__nvoc_thunk_RsResource_binapiprivMapTo; + // binapiprivGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (binapi) + pThis->__binapiprivGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_binapiprivGetRegBaseOffsetAndSize; - pThis->__binapiprivGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_binapiprivGetMapAddrSpace; + // binapiprivGetMapAddrSpace -- virtual inherited (gpures) base (binapi) + pThis->__binapiprivGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_binapiprivGetMapAddrSpace; - pThis->__binapiprivGetRefCount__ = &__nvoc_thunk_RsResource_binapiprivGetRefCount; + // binapiprivInternalControlForward -- virtual inherited (gpures) base (binapi) + pThis->__binapiprivInternalControlForward__ = &__nvoc_up_thunk_GpuResource_binapiprivInternalControlForward; - pThis->__binapiprivAddAdditionalDependants__ = &__nvoc_thunk_RsResource_binapiprivAddAdditionalDependants; + // binapiprivGetInternalObjectHandle -- virtual inherited (gpures) base (binapi) + pThis->__binapiprivGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_binapiprivGetInternalObjectHandle; - pThis->__binapiprivControl_Prologue__ = &__nvoc_thunk_RmResource_binapiprivControl_Prologue; + // binapiprivAccessCallback -- virtual inherited (rmres) base (binapi) + pThis->__binapiprivAccessCallback__ = &__nvoc_up_thunk_RmResource_binapiprivAccessCallback; - pThis->__binapiprivGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_binapiprivGetRegBaseOffsetAndSize; + // binapiprivGetMemInterMapParams -- virtual inherited (rmres) base (binapi) + pThis->__binapiprivGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_binapiprivGetMemInterMapParams; - pThis->__binapiprivInternalControlForward__ = &__nvoc_thunk_GpuResource_binapiprivInternalControlForward; + // binapiprivCheckMemInterUnmap -- virtual inherited (rmres) base (binapi) + pThis->__binapiprivCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_binapiprivCheckMemInterUnmap; - pThis->__binapiprivUnmapFrom__ = &__nvoc_thunk_RsResource_binapiprivUnmapFrom; + // binapiprivGetMemoryMappingDescriptor -- virtual inherited (rmres) base (binapi) + pThis->__binapiprivGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_binapiprivGetMemoryMappingDescriptor; - pThis->__binapiprivControl_Epilogue__ = &__nvoc_thunk_RmResource_binapiprivControl_Epilogue; + // binapiprivControlSerialization_Prologue -- virtual inherited (rmres) base (binapi) + pThis->__binapiprivControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_binapiprivControlSerialization_Prologue; - pThis->__binapiprivGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_binapiprivGetInternalObjectHandle; + // binapiprivControlSerialization_Epilogue -- virtual inherited (rmres) base (binapi) + pThis->__binapiprivControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_binapiprivControlSerialization_Epilogue; - pThis->__binapiprivUnmap__ = &__nvoc_thunk_GpuResource_binapiprivUnmap; + // binapiprivControl_Prologue -- virtual inherited (rmres) base (binapi) + pThis->__binapiprivControl_Prologue__ = &__nvoc_up_thunk_RmResource_binapiprivControl_Prologue; - pThis->__binapiprivGetMemInterMapParams__ = &__nvoc_thunk_RmResource_binapiprivGetMemInterMapParams; + // binapiprivControl_Epilogue -- virtual inherited (rmres) base (binapi) + pThis->__binapiprivControl_Epilogue__ = &__nvoc_up_thunk_RmResource_binapiprivControl_Epilogue; - pThis->__binapiprivGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_binapiprivGetMemoryMappingDescriptor; + // binapiprivCanCopy -- virtual inherited (res) base (binapi) + pThis->__binapiprivCanCopy__ = &__nvoc_up_thunk_RsResource_binapiprivCanCopy; - pThis->__binapiprivControlFilter__ = &__nvoc_thunk_RsResource_binapiprivControlFilter; + // binapiprivIsDuplicate -- virtual inherited (res) base (binapi) + pThis->__binapiprivIsDuplicate__ = &__nvoc_up_thunk_RsResource_binapiprivIsDuplicate; - pThis->__binapiprivControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_binapiprivControlSerialization_Prologue; + // binapiprivPreDestruct -- virtual inherited (res) base (binapi) + pThis->__binapiprivPreDestruct__ = &__nvoc_up_thunk_RsResource_binapiprivPreDestruct; - pThis->__binapiprivCanCopy__ = &__nvoc_thunk_RsResource_binapiprivCanCopy; + // binapiprivControlFilter -- virtual inherited (res) base (binapi) + pThis->__binapiprivControlFilter__ = &__nvoc_up_thunk_RsResource_binapiprivControlFilter; - pThis->__binapiprivIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_binapiprivIsPartialUnmapSupported; + // binapiprivIsPartialUnmapSupported -- inline virtual inherited (res) base (binapi) body + pThis->__binapiprivIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_binapiprivIsPartialUnmapSupported; - pThis->__binapiprivPreDestruct__ = &__nvoc_thunk_RsResource_binapiprivPreDestruct; + // binapiprivMapTo -- virtual inherited (res) base (binapi) + pThis->__binapiprivMapTo__ = &__nvoc_up_thunk_RsResource_binapiprivMapTo; - pThis->__binapiprivIsDuplicate__ = &__nvoc_thunk_RsResource_binapiprivIsDuplicate; + // binapiprivUnmapFrom -- virtual inherited (res) base (binapi) + pThis->__binapiprivUnmapFrom__ = &__nvoc_up_thunk_RsResource_binapiprivUnmapFrom; - pThis->__binapiprivControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_binapiprivControlSerialization_Epilogue; + // binapiprivGetRefCount -- virtual inherited (res) base (binapi) + pThis->__binapiprivGetRefCount__ = &__nvoc_up_thunk_RsResource_binapiprivGetRefCount; - pThis->__binapiprivMap__ = &__nvoc_thunk_GpuResource_binapiprivMap; + // binapiprivAddAdditionalDependants -- virtual inherited (res) base (binapi) + pThis->__binapiprivAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_binapiprivAddAdditionalDependants; +} // End __nvoc_init_funcTable_BinaryApiPrivileged_1 with approximately 26 basic block(s). - pThis->__binapiprivAccessCallback__ = &__nvoc_thunk_RmResource_binapiprivAccessCallback; -} +// Initialize vtable(s) for 25 virtual method(s). void __nvoc_init_funcTable_BinaryApiPrivileged(BinaryApiPrivileged *pThis) { + + // Initialize vtable(s) with 25 per-object function pointer(s). __nvoc_init_funcTable_BinaryApiPrivileged_1(pThis); } diff --git a/src/nvidia/generated/g_binary_api_nvoc.h b/src/nvidia/generated/g_binary_api_nvoc.h index 131de8db31..19e9fd0a78 100644 --- a/src/nvidia/generated/g_binary_api_nvoc.h +++ b/src/nvidia/generated/g_binary_api_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_BINARY_API_NVOC_H_ #define _G_BINARY_API_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_binary_api_nvoc.h" #ifndef BINARY_API_H @@ -50,40 +58,49 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct BinaryApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct BinaryApi *__nvoc_pbase_BinaryApi; - NV_STATUS (*__binapiControl__)(struct BinaryApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__binapiShareCallback__)(struct BinaryApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__binapiCheckMemInterUnmap__)(struct BinaryApi *, NvBool); - NV_STATUS (*__binapiMapTo__)(struct BinaryApi *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__binapiGetMapAddrSpace__)(struct BinaryApi *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__binapiGetRefCount__)(struct BinaryApi *); - void (*__binapiAddAdditionalDependants__)(struct RsClient *, struct BinaryApi *, RsResourceRef *); - NV_STATUS (*__binapiControl_Prologue__)(struct BinaryApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__binapiGetRegBaseOffsetAndSize__)(struct BinaryApi *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__binapiInternalControlForward__)(struct BinaryApi *, NvU32, void *, NvU32); - NV_STATUS (*__binapiUnmapFrom__)(struct BinaryApi *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__binapiControl_Epilogue__)(struct BinaryApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__binapiGetInternalObjectHandle__)(struct BinaryApi *); - NV_STATUS (*__binapiUnmap__)(struct BinaryApi *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__binapiGetMemInterMapParams__)(struct BinaryApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__binapiGetMemoryMappingDescriptor__)(struct BinaryApi *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__binapiControlFilter__)(struct BinaryApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__binapiControlSerialization_Prologue__)(struct BinaryApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__binapiCanCopy__)(struct BinaryApi *); - NvBool (*__binapiIsPartialUnmapSupported__)(struct BinaryApi *); - void (*__binapiPreDestruct__)(struct BinaryApi *); - NV_STATUS (*__binapiIsDuplicate__)(struct BinaryApi *, NvHandle, NvBool *); - void (*__binapiControlSerialization_Epilogue__)(struct BinaryApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__binapiMap__)(struct BinaryApi *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__binapiAccessCallback__)(struct BinaryApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct BinaryApi *__nvoc_pbase_BinaryApi; // binapi + + // Vtable with 25 per-object function pointers + NV_STATUS (*__binapiControl__)(struct BinaryApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) + NV_STATUS (*__binapiMap__)(struct BinaryApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__binapiUnmap__)(struct BinaryApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__binapiShareCallback__)(struct BinaryApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__binapiGetRegBaseOffsetAndSize__)(struct BinaryApi * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__binapiGetMapAddrSpace__)(struct BinaryApi * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__binapiInternalControlForward__)(struct BinaryApi * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__binapiGetInternalObjectHandle__)(struct BinaryApi * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__binapiAccessCallback__)(struct BinaryApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__binapiGetMemInterMapParams__)(struct BinaryApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__binapiCheckMemInterUnmap__)(struct BinaryApi * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__binapiGetMemoryMappingDescriptor__)(struct BinaryApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__binapiControlSerialization_Prologue__)(struct BinaryApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__binapiControlSerialization_Epilogue__)(struct BinaryApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__binapiControl_Prologue__)(struct BinaryApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__binapiControl_Epilogue__)(struct BinaryApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__binapiCanCopy__)(struct BinaryApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__binapiIsDuplicate__)(struct BinaryApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__binapiPreDestruct__)(struct BinaryApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__binapiControlFilter__)(struct BinaryApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__binapiIsPartialUnmapSupported__)(struct BinaryApi * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__binapiMapTo__)(struct BinaryApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__binapiUnmapFrom__)(struct BinaryApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__binapiGetRefCount__)(struct BinaryApi * /*this*/); // virtual inherited (res) base (gpures) + void (*__binapiAddAdditionalDependants__)(struct RsClient *, struct BinaryApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) }; #ifndef __NVOC_CLASS_BinaryApi_TYPEDEF__ @@ -95,6 +112,7 @@ typedef struct BinaryApi BinaryApi; #define __nvoc_class_id_BinaryApi 0xb7a47c #endif /* __nvoc_class_id_BinaryApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_BinaryApi; #define __staticCast_BinaryApi(pThis) \ @@ -107,139 +125,167 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_BinaryApi; ((BinaryApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(BinaryApi))) #endif //__nvoc_binary_api_h_disabled - NV_STATUS __nvoc_objCreateDynamic_BinaryApi(BinaryApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_BinaryApi(BinaryApi**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_BinaryApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_BinaryApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define binapiControl_FNPTR(pResource) pResource->__binapiControl__ #define binapiControl(pResource, pCallContext, pParams) binapiControl_DISPATCH(pResource, pCallContext, pParams) +#define binapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define binapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) binapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define binapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define binapiUnmap(pGpuResource, pCallContext, pCpuMapping) binapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define binapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define binapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) binapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define binapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) binapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define binapiMapTo(pResource, pParams) binapiMapTo_DISPATCH(pResource, pParams) -#define binapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) binapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define binapiGetRefCount(pResource) binapiGetRefCount_DISPATCH(pResource) -#define binapiAddAdditionalDependants(pClient, pResource, pReference) binapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define binapiControl_Prologue(pResource, pCallContext, pParams) binapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define binapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define binapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) binapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define binapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define binapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) binapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define binapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define binapiInternalControlForward(pGpuResource, command, pParams, size) binapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define binapiUnmapFrom(pResource, pParams) binapiUnmapFrom_DISPATCH(pResource, pParams) -#define binapiControl_Epilogue(pResource, pCallContext, pParams) binapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define binapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define binapiGetInternalObjectHandle(pGpuResource) binapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define binapiUnmap(pGpuResource, pCallContext, pCpuMapping) binapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define binapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define binapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) binapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define binapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define binapiGetMemInterMapParams(pRmResource, pParams) binapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define binapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define binapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) binapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define binapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define binapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) binapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define binapiControlFilter(pResource, pCallContext, pParams) binapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define binapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define binapiControlSerialization_Prologue(pResource, pCallContext, pParams) binapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define binapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define binapiControlSerialization_Epilogue(pResource, pCallContext, pParams) binapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define binapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define binapiControl_Prologue(pResource, pCallContext, pParams) binapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define binapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define binapiControl_Epilogue(pResource, pCallContext, pParams) binapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define binapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define binapiCanCopy(pResource) binapiCanCopy_DISPATCH(pResource) -#define binapiIsPartialUnmapSupported(pResource) binapiIsPartialUnmapSupported_DISPATCH(pResource) -#define binapiPreDestruct(pResource) binapiPreDestruct_DISPATCH(pResource) +#define binapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define binapiIsDuplicate(pResource, hMemory, pDuplicate) binapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define binapiControlSerialization_Epilogue(pResource, pCallContext, pParams) binapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define binapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) binapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define binapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) binapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS binapiControl_IMPL(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); +#define binapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define binapiPreDestruct(pResource) binapiPreDestruct_DISPATCH(pResource) +#define binapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define binapiControlFilter(pResource, pCallContext, pParams) binapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define binapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define binapiIsPartialUnmapSupported(pResource) binapiIsPartialUnmapSupported_DISPATCH(pResource) +#define binapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define binapiMapTo(pResource, pParams) binapiMapTo_DISPATCH(pResource, pParams) +#define binapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define binapiUnmapFrom(pResource, pParams) binapiUnmapFrom_DISPATCH(pResource, pParams) +#define binapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define binapiGetRefCount(pResource) binapiGetRefCount_DISPATCH(pResource) +#define binapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define binapiAddAdditionalDependants(pClient, pResource, pReference) binapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS binapiControl_DISPATCH(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__binapiControl__(pResource, pCallContext, pParams); } -static inline NvBool binapiShareCallback_DISPATCH(struct BinaryApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__binapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS binapiMap_DISPATCH(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__binapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS binapiCheckMemInterUnmap_DISPATCH(struct BinaryApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__binapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS binapiUnmap_DISPATCH(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__binapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS binapiMapTo_DISPATCH(struct BinaryApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__binapiMapTo__(pResource, pParams); +static inline NvBool binapiShareCallback_DISPATCH(struct BinaryApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__binapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +} + +static inline NV_STATUS binapiGetRegBaseOffsetAndSize_DISPATCH(struct BinaryApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__binapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS binapiGetMapAddrSpace_DISPATCH(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__binapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NvU32 binapiGetRefCount_DISPATCH(struct BinaryApi *pResource) { - return pResource->__binapiGetRefCount__(pResource); +static inline NV_STATUS binapiInternalControlForward_DISPATCH(struct BinaryApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__binapiInternalControlForward__(pGpuResource, command, pParams, size); } -static inline void binapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct BinaryApi *pResource, RsResourceRef *pReference) { - pResource->__binapiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvHandle binapiGetInternalObjectHandle_DISPATCH(struct BinaryApi *pGpuResource) { + return pGpuResource->__binapiGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS binapiControl_Prologue_DISPATCH(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__binapiControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool binapiAccessCallback_DISPATCH(struct BinaryApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__binapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS binapiGetRegBaseOffsetAndSize_DISPATCH(struct BinaryApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__binapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS binapiGetMemInterMapParams_DISPATCH(struct BinaryApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__binapiGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS binapiInternalControlForward_DISPATCH(struct BinaryApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__binapiInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS binapiCheckMemInterUnmap_DISPATCH(struct BinaryApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__binapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS binapiUnmapFrom_DISPATCH(struct BinaryApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__binapiUnmapFrom__(pResource, pParams); +static inline NV_STATUS binapiGetMemoryMappingDescriptor_DISPATCH(struct BinaryApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__binapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline void binapiControl_Epilogue_DISPATCH(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__binapiControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS binapiControlSerialization_Prologue_DISPATCH(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__binapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvHandle binapiGetInternalObjectHandle_DISPATCH(struct BinaryApi *pGpuResource) { - return pGpuResource->__binapiGetInternalObjectHandle__(pGpuResource); +static inline void binapiControlSerialization_Epilogue_DISPATCH(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__binapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS binapiUnmap_DISPATCH(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__binapiUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NV_STATUS binapiControl_Prologue_DISPATCH(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__binapiControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS binapiGetMemInterMapParams_DISPATCH(struct BinaryApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__binapiGetMemInterMapParams__(pRmResource, pParams); +static inline void binapiControl_Epilogue_DISPATCH(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__binapiControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS binapiGetMemoryMappingDescriptor_DISPATCH(struct BinaryApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__binapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NvBool binapiCanCopy_DISPATCH(struct BinaryApi *pResource) { + return pResource->__binapiCanCopy__(pResource); } -static inline NV_STATUS binapiControlFilter_DISPATCH(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__binapiControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS binapiIsDuplicate_DISPATCH(struct BinaryApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__binapiIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS binapiControlSerialization_Prologue_DISPATCH(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__binapiControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline void binapiPreDestruct_DISPATCH(struct BinaryApi *pResource) { + pResource->__binapiPreDestruct__(pResource); } -static inline NvBool binapiCanCopy_DISPATCH(struct BinaryApi *pResource) { - return pResource->__binapiCanCopy__(pResource); +static inline NV_STATUS binapiControlFilter_DISPATCH(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__binapiControlFilter__(pResource, pCallContext, pParams); } static inline NvBool binapiIsPartialUnmapSupported_DISPATCH(struct BinaryApi *pResource) { return pResource->__binapiIsPartialUnmapSupported__(pResource); } -static inline void binapiPreDestruct_DISPATCH(struct BinaryApi *pResource) { - pResource->__binapiPreDestruct__(pResource); +static inline NV_STATUS binapiMapTo_DISPATCH(struct BinaryApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__binapiMapTo__(pResource, pParams); } -static inline NV_STATUS binapiIsDuplicate_DISPATCH(struct BinaryApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__binapiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS binapiUnmapFrom_DISPATCH(struct BinaryApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__binapiUnmapFrom__(pResource, pParams); } -static inline void binapiControlSerialization_Epilogue_DISPATCH(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__binapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 binapiGetRefCount_DISPATCH(struct BinaryApi *pResource) { + return pResource->__binapiGetRefCount__(pResource); } -static inline NV_STATUS binapiMap_DISPATCH(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__binapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void binapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct BinaryApi *pResource, RsResourceRef *pReference) { + pResource->__binapiAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NvBool binapiAccessCallback_DISPATCH(struct BinaryApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__binapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} +NV_STATUS binapiControl_IMPL(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); NV_STATUS binapiConstruct_IMPL(struct BinaryApi *arg_pResource, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); @@ -257,41 +303,50 @@ NV_STATUS binapiConstruct_IMPL(struct BinaryApi *arg_pResource, struct CALL_CONT #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct BinaryApiPrivileged { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct BinaryApi __nvoc_base_BinaryApi; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct BinaryApi *__nvoc_pbase_BinaryApi; - struct BinaryApiPrivileged *__nvoc_pbase_BinaryApiPrivileged; - NV_STATUS (*__binapiprivControl__)(struct BinaryApiPrivileged *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__binapiprivShareCallback__)(struct BinaryApiPrivileged *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__binapiprivCheckMemInterUnmap__)(struct BinaryApiPrivileged *, NvBool); - NV_STATUS (*__binapiprivMapTo__)(struct BinaryApiPrivileged *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__binapiprivGetMapAddrSpace__)(struct BinaryApiPrivileged *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__binapiprivGetRefCount__)(struct BinaryApiPrivileged *); - void (*__binapiprivAddAdditionalDependants__)(struct RsClient *, struct BinaryApiPrivileged *, RsResourceRef *); - NV_STATUS (*__binapiprivControl_Prologue__)(struct BinaryApiPrivileged *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__binapiprivGetRegBaseOffsetAndSize__)(struct BinaryApiPrivileged *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__binapiprivInternalControlForward__)(struct BinaryApiPrivileged *, NvU32, void *, NvU32); - NV_STATUS (*__binapiprivUnmapFrom__)(struct BinaryApiPrivileged *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__binapiprivControl_Epilogue__)(struct BinaryApiPrivileged *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__binapiprivGetInternalObjectHandle__)(struct BinaryApiPrivileged *); - NV_STATUS (*__binapiprivUnmap__)(struct BinaryApiPrivileged *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__binapiprivGetMemInterMapParams__)(struct BinaryApiPrivileged *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__binapiprivGetMemoryMappingDescriptor__)(struct BinaryApiPrivileged *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__binapiprivControlFilter__)(struct BinaryApiPrivileged *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__binapiprivControlSerialization_Prologue__)(struct BinaryApiPrivileged *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__binapiprivCanCopy__)(struct BinaryApiPrivileged *); - NvBool (*__binapiprivIsPartialUnmapSupported__)(struct BinaryApiPrivileged *); - void (*__binapiprivPreDestruct__)(struct BinaryApiPrivileged *); - NV_STATUS (*__binapiprivIsDuplicate__)(struct BinaryApiPrivileged *, NvHandle, NvBool *); - void (*__binapiprivControlSerialization_Epilogue__)(struct BinaryApiPrivileged *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__binapiprivMap__)(struct BinaryApiPrivileged *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__binapiprivAccessCallback__)(struct BinaryApiPrivileged *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super^2 + struct BinaryApi *__nvoc_pbase_BinaryApi; // binapi super + struct BinaryApiPrivileged *__nvoc_pbase_BinaryApiPrivileged; // binapipriv + + // Vtable with 25 per-object function pointers + NV_STATUS (*__binapiprivControl__)(struct BinaryApiPrivileged * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (binapi) + NV_STATUS (*__binapiprivMap__)(struct BinaryApiPrivileged * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (binapi) + NV_STATUS (*__binapiprivUnmap__)(struct BinaryApiPrivileged * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (binapi) + NvBool (*__binapiprivShareCallback__)(struct BinaryApiPrivileged * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (binapi) + NV_STATUS (*__binapiprivGetRegBaseOffsetAndSize__)(struct BinaryApiPrivileged * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (binapi) + NV_STATUS (*__binapiprivGetMapAddrSpace__)(struct BinaryApiPrivileged * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (binapi) + NV_STATUS (*__binapiprivInternalControlForward__)(struct BinaryApiPrivileged * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (binapi) + NvHandle (*__binapiprivGetInternalObjectHandle__)(struct BinaryApiPrivileged * /*this*/); // virtual inherited (gpures) base (binapi) + NvBool (*__binapiprivAccessCallback__)(struct BinaryApiPrivileged * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (binapi) + NV_STATUS (*__binapiprivGetMemInterMapParams__)(struct BinaryApiPrivileged * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (binapi) + NV_STATUS (*__binapiprivCheckMemInterUnmap__)(struct BinaryApiPrivileged * /*this*/, NvBool); // virtual inherited (rmres) base (binapi) + NV_STATUS (*__binapiprivGetMemoryMappingDescriptor__)(struct BinaryApiPrivileged * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (binapi) + NV_STATUS (*__binapiprivControlSerialization_Prologue__)(struct BinaryApiPrivileged * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (binapi) + void (*__binapiprivControlSerialization_Epilogue__)(struct BinaryApiPrivileged * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (binapi) + NV_STATUS (*__binapiprivControl_Prologue__)(struct BinaryApiPrivileged * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (binapi) + void (*__binapiprivControl_Epilogue__)(struct BinaryApiPrivileged * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (binapi) + NvBool (*__binapiprivCanCopy__)(struct BinaryApiPrivileged * /*this*/); // virtual inherited (res) base (binapi) + NV_STATUS (*__binapiprivIsDuplicate__)(struct BinaryApiPrivileged * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (binapi) + void (*__binapiprivPreDestruct__)(struct BinaryApiPrivileged * /*this*/); // virtual inherited (res) base (binapi) + NV_STATUS (*__binapiprivControlFilter__)(struct BinaryApiPrivileged * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (binapi) + NvBool (*__binapiprivIsPartialUnmapSupported__)(struct BinaryApiPrivileged * /*this*/); // inline virtual inherited (res) base (binapi) body + NV_STATUS (*__binapiprivMapTo__)(struct BinaryApiPrivileged * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (binapi) + NV_STATUS (*__binapiprivUnmapFrom__)(struct BinaryApiPrivileged * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (binapi) + NvU32 (*__binapiprivGetRefCount__)(struct BinaryApiPrivileged * /*this*/); // virtual inherited (res) base (binapi) + void (*__binapiprivAddAdditionalDependants__)(struct RsClient *, struct BinaryApiPrivileged * /*this*/, RsResourceRef *); // virtual inherited (res) base (binapi) }; #ifndef __NVOC_CLASS_BinaryApiPrivileged_TYPEDEF__ @@ -303,6 +358,7 @@ typedef struct BinaryApiPrivileged BinaryApiPrivileged; #define __nvoc_class_id_BinaryApiPrivileged 0x1c0579 #endif /* __nvoc_class_id_BinaryApiPrivileged */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_BinaryApiPrivileged; #define __staticCast_BinaryApiPrivileged(pThis) \ @@ -315,139 +371,167 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_BinaryApiPrivileged; ((BinaryApiPrivileged*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(BinaryApiPrivileged))) #endif //__nvoc_binary_api_h_disabled - NV_STATUS __nvoc_objCreateDynamic_BinaryApiPrivileged(BinaryApiPrivileged**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_BinaryApiPrivileged(BinaryApiPrivileged**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_BinaryApiPrivileged(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_BinaryApiPrivileged((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define binapiprivControl_FNPTR(pResource) pResource->__binapiprivControl__ #define binapiprivControl(pResource, pCallContext, pParams) binapiprivControl_DISPATCH(pResource, pCallContext, pParams) +#define binapiprivMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__gpuresMap__ +#define binapiprivMap(pGpuResource, pCallContext, pParams, pCpuMapping) binapiprivMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define binapiprivUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__gpuresUnmap__ +#define binapiprivUnmap(pGpuResource, pCallContext, pCpuMapping) binapiprivUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define binapiprivShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__gpuresShareCallback__ #define binapiprivShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) binapiprivShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define binapiprivCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) binapiprivCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define binapiprivMapTo(pResource, pParams) binapiprivMapTo_DISPATCH(pResource, pParams) -#define binapiprivGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) binapiprivGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define binapiprivGetRefCount(pResource) binapiprivGetRefCount_DISPATCH(pResource) -#define binapiprivAddAdditionalDependants(pClient, pResource, pReference) binapiprivAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define binapiprivControl_Prologue(pResource, pCallContext, pParams) binapiprivControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define binapiprivGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define binapiprivGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) binapiprivGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define binapiprivGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define binapiprivGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) binapiprivGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define binapiprivInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define binapiprivInternalControlForward(pGpuResource, command, pParams, size) binapiprivInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define binapiprivUnmapFrom(pResource, pParams) binapiprivUnmapFrom_DISPATCH(pResource, pParams) -#define binapiprivControl_Epilogue(pResource, pCallContext, pParams) binapiprivControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define binapiprivGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define binapiprivGetInternalObjectHandle(pGpuResource) binapiprivGetInternalObjectHandle_DISPATCH(pGpuResource) -#define binapiprivUnmap(pGpuResource, pCallContext, pCpuMapping) binapiprivUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define binapiprivAccessCallback_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define binapiprivAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) binapiprivAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define binapiprivGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define binapiprivGetMemInterMapParams(pRmResource, pParams) binapiprivGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define binapiprivCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define binapiprivCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) binapiprivCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define binapiprivGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define binapiprivGetMemoryMappingDescriptor(pRmResource, ppMemDesc) binapiprivGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define binapiprivControlFilter(pResource, pCallContext, pParams) binapiprivControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define binapiprivControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define binapiprivControlSerialization_Prologue(pResource, pCallContext, pParams) binapiprivControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define binapiprivControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define binapiprivControlSerialization_Epilogue(pResource, pCallContext, pParams) binapiprivControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define binapiprivControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define binapiprivControl_Prologue(pResource, pCallContext, pParams) binapiprivControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define binapiprivControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define binapiprivControl_Epilogue(pResource, pCallContext, pParams) binapiprivControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define binapiprivCanCopy_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define binapiprivCanCopy(pResource) binapiprivCanCopy_DISPATCH(pResource) -#define binapiprivIsPartialUnmapSupported(pResource) binapiprivIsPartialUnmapSupported_DISPATCH(pResource) -#define binapiprivPreDestruct(pResource) binapiprivPreDestruct_DISPATCH(pResource) +#define binapiprivIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define binapiprivIsDuplicate(pResource, hMemory, pDuplicate) binapiprivIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define binapiprivControlSerialization_Epilogue(pResource, pCallContext, pParams) binapiprivControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define binapiprivMap(pGpuResource, pCallContext, pParams, pCpuMapping) binapiprivMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define binapiprivAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) binapiprivAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS binapiprivControl_IMPL(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); +#define binapiprivPreDestruct_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define binapiprivPreDestruct(pResource) binapiprivPreDestruct_DISPATCH(pResource) +#define binapiprivControlFilter_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define binapiprivControlFilter(pResource, pCallContext, pParams) binapiprivControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define binapiprivIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define binapiprivIsPartialUnmapSupported(pResource) binapiprivIsPartialUnmapSupported_DISPATCH(pResource) +#define binapiprivMapTo_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define binapiprivMapTo(pResource, pParams) binapiprivMapTo_DISPATCH(pResource, pParams) +#define binapiprivUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define binapiprivUnmapFrom(pResource, pParams) binapiprivUnmapFrom_DISPATCH(pResource, pParams) +#define binapiprivGetRefCount_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define binapiprivGetRefCount(pResource) binapiprivGetRefCount_DISPATCH(pResource) +#define binapiprivAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define binapiprivAddAdditionalDependants(pClient, pResource, pReference) binapiprivAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS binapiprivControl_DISPATCH(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__binapiprivControl__(pResource, pCallContext, pParams); } -static inline NvBool binapiprivShareCallback_DISPATCH(struct BinaryApiPrivileged *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__binapiprivShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS binapiprivMap_DISPATCH(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__binapiprivMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS binapiprivCheckMemInterUnmap_DISPATCH(struct BinaryApiPrivileged *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__binapiprivCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS binapiprivUnmap_DISPATCH(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__binapiprivUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS binapiprivMapTo_DISPATCH(struct BinaryApiPrivileged *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__binapiprivMapTo__(pResource, pParams); +static inline NvBool binapiprivShareCallback_DISPATCH(struct BinaryApiPrivileged *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__binapiprivShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +} + +static inline NV_STATUS binapiprivGetRegBaseOffsetAndSize_DISPATCH(struct BinaryApiPrivileged *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__binapiprivGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS binapiprivGetMapAddrSpace_DISPATCH(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__binapiprivGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NvU32 binapiprivGetRefCount_DISPATCH(struct BinaryApiPrivileged *pResource) { - return pResource->__binapiprivGetRefCount__(pResource); +static inline NV_STATUS binapiprivInternalControlForward_DISPATCH(struct BinaryApiPrivileged *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__binapiprivInternalControlForward__(pGpuResource, command, pParams, size); } -static inline void binapiprivAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct BinaryApiPrivileged *pResource, RsResourceRef *pReference) { - pResource->__binapiprivAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvHandle binapiprivGetInternalObjectHandle_DISPATCH(struct BinaryApiPrivileged *pGpuResource) { + return pGpuResource->__binapiprivGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS binapiprivControl_Prologue_DISPATCH(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__binapiprivControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool binapiprivAccessCallback_DISPATCH(struct BinaryApiPrivileged *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__binapiprivAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS binapiprivGetRegBaseOffsetAndSize_DISPATCH(struct BinaryApiPrivileged *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__binapiprivGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS binapiprivGetMemInterMapParams_DISPATCH(struct BinaryApiPrivileged *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__binapiprivGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS binapiprivInternalControlForward_DISPATCH(struct BinaryApiPrivileged *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__binapiprivInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS binapiprivCheckMemInterUnmap_DISPATCH(struct BinaryApiPrivileged *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__binapiprivCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS binapiprivUnmapFrom_DISPATCH(struct BinaryApiPrivileged *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__binapiprivUnmapFrom__(pResource, pParams); +static inline NV_STATUS binapiprivGetMemoryMappingDescriptor_DISPATCH(struct BinaryApiPrivileged *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__binapiprivGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline void binapiprivControl_Epilogue_DISPATCH(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__binapiprivControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS binapiprivControlSerialization_Prologue_DISPATCH(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__binapiprivControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvHandle binapiprivGetInternalObjectHandle_DISPATCH(struct BinaryApiPrivileged *pGpuResource) { - return pGpuResource->__binapiprivGetInternalObjectHandle__(pGpuResource); +static inline void binapiprivControlSerialization_Epilogue_DISPATCH(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__binapiprivControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS binapiprivUnmap_DISPATCH(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__binapiprivUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NV_STATUS binapiprivControl_Prologue_DISPATCH(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__binapiprivControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS binapiprivGetMemInterMapParams_DISPATCH(struct BinaryApiPrivileged *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__binapiprivGetMemInterMapParams__(pRmResource, pParams); +static inline void binapiprivControl_Epilogue_DISPATCH(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__binapiprivControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS binapiprivGetMemoryMappingDescriptor_DISPATCH(struct BinaryApiPrivileged *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__binapiprivGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NvBool binapiprivCanCopy_DISPATCH(struct BinaryApiPrivileged *pResource) { + return pResource->__binapiprivCanCopy__(pResource); } -static inline NV_STATUS binapiprivControlFilter_DISPATCH(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__binapiprivControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS binapiprivIsDuplicate_DISPATCH(struct BinaryApiPrivileged *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__binapiprivIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS binapiprivControlSerialization_Prologue_DISPATCH(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__binapiprivControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline void binapiprivPreDestruct_DISPATCH(struct BinaryApiPrivileged *pResource) { + pResource->__binapiprivPreDestruct__(pResource); } -static inline NvBool binapiprivCanCopy_DISPATCH(struct BinaryApiPrivileged *pResource) { - return pResource->__binapiprivCanCopy__(pResource); +static inline NV_STATUS binapiprivControlFilter_DISPATCH(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__binapiprivControlFilter__(pResource, pCallContext, pParams); } static inline NvBool binapiprivIsPartialUnmapSupported_DISPATCH(struct BinaryApiPrivileged *pResource) { return pResource->__binapiprivIsPartialUnmapSupported__(pResource); } -static inline void binapiprivPreDestruct_DISPATCH(struct BinaryApiPrivileged *pResource) { - pResource->__binapiprivPreDestruct__(pResource); +static inline NV_STATUS binapiprivMapTo_DISPATCH(struct BinaryApiPrivileged *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__binapiprivMapTo__(pResource, pParams); } -static inline NV_STATUS binapiprivIsDuplicate_DISPATCH(struct BinaryApiPrivileged *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__binapiprivIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS binapiprivUnmapFrom_DISPATCH(struct BinaryApiPrivileged *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__binapiprivUnmapFrom__(pResource, pParams); } -static inline void binapiprivControlSerialization_Epilogue_DISPATCH(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__binapiprivControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 binapiprivGetRefCount_DISPATCH(struct BinaryApiPrivileged *pResource) { + return pResource->__binapiprivGetRefCount__(pResource); } -static inline NV_STATUS binapiprivMap_DISPATCH(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__binapiprivMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void binapiprivAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct BinaryApiPrivileged *pResource, RsResourceRef *pReference) { + pResource->__binapiprivAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NvBool binapiprivAccessCallback_DISPATCH(struct BinaryApiPrivileged *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__binapiprivAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} +NV_STATUS binapiprivControl_IMPL(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); NV_STATUS binapiprivConstruct_IMPL(struct BinaryApiPrivileged *arg_pResource, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveConcatenatedFMC_GH100.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveConcatenatedFMC_GH100.c index c75829266b..c067f3305f 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveConcatenatedFMC_GH100.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveConcatenatedFMC_GH100.c @@ -39,10406 +39,10406 @@ // static BINDATA_CONST NvU8 kgspBinArchiveConcatenatedFMC_GH100_ucode_image_prod_data[] = { - 0xad, 0xa9, 0x9d, 0x3f, 0x32, 0x6f, 0x6b, 0xe2, 0xed, 0x42, 0x9d, 0x87, 0xe1, 0x73, 0x69, 0xe6, - 0x67, 0x1d, 0x0f, 0x22, 0xca, 0x98, 0xe2, 0x27, 0x93, 0x36, 0x96, 0xef, 0xf8, 0x7a, 0x9a, 0x65, - 0x09, 0x2d, 0xf7, 0x8b, 0xfb, 0x69, 0xf6, 0x37, 0xe3, 0xfd, 0x8f, 0x3a, 0xac, 0xa8, 0xad, 0x89, - 0x32, 0x65, 0xfb, 0xae, 0x29, 0x9b, 0xbd, 0xc9, 0xb2, 0x28, 0x3d, 0xe3, 0x41, 0x60, 0xa3, 0x90, - 0x3e, 0x51, 0xef, 0x4a, 0xa1, 0xfe, 0x6a, 0x6c, 0x5a, 0xaf, 0xe6, 0x15, 0x58, 0x43, 0x34, 0xe5, - 0x08, 0xce, 0x4e, 0x44, 0xb0, 0xdb, 0x26, 0xd4, 0x90, 0x97, 0x64, 0xce, 0x0b, 0x8a, 0xbc, 0xe5, - 0x70, 0x0e, 0x31, 0x08, 0xaa, 0xaa, 0xd5, 0x77, 0x9b, 0x83, 0xdb, 0x84, 0xc5, 0xc9, 0xd3, 0xfc, - 0xc8, 0xec, 0x30, 0xc8, 0xfa, 0x26, 0x48, 0xc2, 0xef, 0x0f, 0xb6, 0xb9, 0x0a, 0xe7, 0xe8, 0xcd, - 0xd7, 0x3c, 0x0e, 0x8c, 0x4e, 0x45, 0xfb, 0x7c, 0xdd, 0x68, 0xac, 0x96, 0x57, 0xf8, 0x41, 0x31, - 0x62, 0x43, 0xea, 0xe4, 0x78, 0x08, 0x78, 0xfe, 0x07, 0x71, 0x69, 0x58, 0x30, 0x78, 0x32, 0x96, - 0x6c, 0xe6, 0xb3, 0x75, 0xf3, 0x68, 0x4e, 0x73, 0x47, 0x66, 0xe3, 0x9f, 0xd2, 0x28, 0x3f, 0x7c, - 0x0c, 0x79, 0x82, 0xdb, 0x71, 0x2f, 0x40, 0x97, 0x36, 0xeb, 0x1b, 0xe1, 0x3b, 0x20, 0x58, 0x90, - 0x6b, 0x19, 0x76, 0xcb, 0xfa, 0xf7, 0xbc, 0xd0, 0x19, 0x57, 0x11, 0x66, 0x41, 0xbf, 0x0b, 0x13, - 0x06, 0x49, 0x67, 0xee, 0x42, 0x19, 0x92, 0x0a, 0x9d, 0x4b, 0x43, 0x17, 0xc3, 0x99, 0x89, 0x71, - 0xc3, 0x35, 0xc5, 0x0e, 0xd6, 0x22, 0x91, 0xd7, 0xed, 0x5a, 0xf4, 0x7b, 0x4b, 0x35, 0x46, 0xd6, - 0x89, 0x7a, 0x18, 0x51, 0xa5, 0xb8, 0xd4, 0x8b, 0x24, 0x97, 0x53, 0x67, 0xbd, 0xa4, 0x6a, 0x52, - 0x76, 0xba, 0xc7, 0x4c, 0x6a, 0x57, 0xfc, 0xff, 0x9e, 0xcc, 0xd4, 0x5c, 0xfa, 0x61, 0x87, 0x15, - 0xdc, 0x56, 0x13, 0x83, 0xf6, 0xe6, 0x13, 0x83, 0x39, 0x9c, 0xd1, 0x1b, 0xb8, 0x9c, 0x38, 0xe6, - 0xd7, 0x4c, 0xb7, 0x57, 0x8e, 0x23, 0x0a, 0x9f, 0x5d, 0x63, 0x06, 0x62, 0x48, 0x7d, 0x19, 0xf7, - 0x3a, 0x0f, 0x62, 0x03, 0x4c, 0x7d, 0xc5, 0xbd, 0x89, 0xe4, 0xb1, 0x0c, 0x9e, 0x35, 0x72, 0xef, - 0xde, 0xdc, 0x4e, 0xb5, 0xbf, 0xa4, 0x1a, 0x9b, 0x5a, 0xf1, 0x4c, 0xb3, 0x92, 0xad, 0x37, 0x4b, - 0xe4, 0x5b, 0xd8, 0xa4, 0xf3, 0xe1, 0xe3, 0x54, 0x8e, 0xed, 0x3a, 0xe3, 0x9e, 0x02, 0x36, 0xec, - 0xdf, 0x20, 0x91, 0xe6, 0xad, 0x97, 0xe8, 0x70, 0xca, 0xfc, 0xa7, 0x73, 0x8b, 0xd9, 0x55, 0xed, - 0xd8, 0x89, 0x30, 0x5d, 0xce, 0x54, 0x6a, 0xc7, 0x18, 0xb1, 0x46, 0x9a, 0x13, 0x33, 0x85, 0x98, - 0x79, 0x98, 0x74, 0x30, 0x14, 0x5d, 0x42, 0x27, 0x5a, 0x1b, 0x21, 0xfc, 0x4e, 0x07, 0xc1, 0xa6, - 0x8b, 0xe9, 0x91, 0x0e, 0x1d, 0xc2, 0xd2, 0x6f, 0x89, 0x9b, 0x13, 0x4c, 0xef, 0x22, 0x69, 0x2f, - 0xaf, 0xe6, 0x08, 0x60, 0xfd, 0x19, 0xa6, 0xaa, 0x77, 0x78, 0x87, 0x6b, 0x0d, 0x7f, 0x0e, 0x7c, - 0x3a, 0x10, 0x05, 0x08, 0x3f, 0x05, 0x02, 0x5d, 0x17, 0x9f, 0x99, 0xc5, 0x6e, 0xdb, 0xd7, 0x91, - 0x67, 0x44, 0x7a, 0x7a, 0xf1, 0xb6, 0xef, 0x76, 0x60, 0x98, 0x69, 0x0e, 0x10, 0x2f, 0x73, 0xbc, - 0xa4, 0x54, 0x5c, 0x3b, 0xc5, 0xa4, 0x3f, 0xff, 0xa3, 0xfa, 0x22, 0x51, 0xfc, 0x4c, 0x92, 0x8e, - 0xe8, 0xd9, 0x27, 0x1b, 0x8e, 0x2e, 0xa3, 0xb0, 0x51, 0x5e, 0x0f, 0xd0, 0xea, 0x05, 0xff, 0x64, - 0xa8, 0x01, 0x02, 0x73, 0x4a, 0x31, 0x63, 0xa1, 0xa8, 0x83, 0x84, 0xac, 0x1b, 0x92, 0x78, 0x37, - 0x53, 0xc7, 0xf9, 0xc3, 0x03, 0xe6, 0x4d, 0x15, 0x22, 0xc5, 0x07, 0xdb, 0xbf, 0x0c, 0xd9, 0xec, - 0xbb, 0x1c, 0x18, 0xa6, 0x7d, 0x92, 0xa8, 0x2d, 0x4b, 0x6c, 0x80, 0x8f, 0x45, 0x3f, 0x9a, 0xd7, - 0x1b, 0x6b, 0x47, 0xd3, 0x50, 0xd2, 0xcc, 0xda, 0x5f, 0xb1, 0x5a, 0x8d, 0xc4, 0xf2, 0x58, 0x9b, - 0xd4, 0x30, 0x5e, 0x76, 0x88, 0xe9, 0x92, 0xd8, 0xe0, 0x66, 0xfd, 0x2e, 0xf7, 0xb1, 0xec, 0x66, - 0xdb, 0x1d, 0x8b, 0x95, 0xe3, 0xa1, 0x5d, 0x08, 0xea, 0xa1, 0x67, 0xcf, 0xee, 0x0a, 0xcc, 0x6d, - 0x79, 0xe3, 0xfc, 0xee, 0xb7, 0x4e, 0x32, 0x47, 0x1e, 0x22, 0xb6, 0xc6, 0x6e, 0xac, 0x3a, 0x78, - 0x41, 0xd1, 0x31, 0x29, 0xca, 0xd9, 0x7d, 0xc3, 0x4e, 0x15, 0x22, 0x17, 0xa9, 0x8a, 0xaa, 0x39, - 0x2b, 0xdd, 0xec, 0x4d, 0xc5, 0x9a, 0xf6, 0xab, 0x5b, 0x3b, 0xf9, 0x76, 0x1b, 0x12, 0x5d, 0x8b, - 0x65, 0xe7, 0xa7, 0xcc, 0xcb, 0x7f, 0xa2, 0x16, 0x5a, 0x38, 0x1a, 0x55, 0xcf, 0xed, 0x6a, 0x1a, - 0x4e, 0x1c, 0x80, 0x15, 0xc5, 0x2c, 0xfe, 0x70, 0x7d, 0x4c, 0xa5, 0x74, 0x4a, 0x02, 0x1b, 0xd6, - 0x84, 0x9a, 0x35, 0xc8, 0x9f, 0x69, 0x4e, 0x5c, 0x10, 0xed, 0xaa, 0x70, 0xe8, 0xb7, 0x6a, 0x36, - 0xb5, 0xe9, 0x42, 0x03, 0xd3, 0xdd, 0xef, 0x16, 0xd9, 0x3d, 0x7a, 0x44, 0xa6, 0xa8, 0x14, 0x44, - 0xbd, 0xb6, 0x97, 0x84, 0xd1, 0x19, 0x76, 0xb0, 0x50, 0x71, 0x75, 0x5b, 0x08, 0x4a, 0x8c, 0xd0, - 0x7d, 0x6e, 0xdc, 0xc5, 0x59, 0x8f, 0x9e, 0xc1, 0xf8, 0x1b, 0x72, 0xea, 0x96, 0x1b, 0x91, 0xee, - 0xec, 0x63, 0xb5, 0xe2, 0xf9, 0xb8, 0x61, 0x1f, 0xb6, 0x19, 0x25, 0x49, 0x48, 0x51, 0x4b, 0x7f, - 0x86, 0xe9, 0x3a, 0xf1, 0x39, 0x6d, 0x4a, 0x0b, 0xc2, 0xcf, 0x81, 0x31, 0xe2, 0xaf, 0x04, 0xc1, + 0xc5, 0xf7, 0x55, 0x17, 0x9d, 0x9d, 0x14, 0x21, 0x03, 0x88, 0x21, 0x74, 0x14, 0xcd, 0xaa, 0xdd, + 0x99, 0xb3, 0xab, 0x78, 0x55, 0xf5, 0x2c, 0x98, 0xc7, 0xf0, 0x19, 0x4c, 0x2a, 0x2f, 0xf2, 0x20, + 0x94, 0x0f, 0xee, 0x09, 0x5d, 0x18, 0xef, 0x67, 0x20, 0x17, 0x01, 0xcb, 0x66, 0xae, 0xae, 0x86, + 0x20, 0x43, 0xe8, 0xa0, 0xb9, 0xbd, 0xf0, 0x65, 0x9f, 0xc6, 0x0e, 0x6b, 0x7f, 0x31, 0xb4, 0x6a, + 0x60, 0xf2, 0xcd, 0x44, 0xa7, 0x24, 0xe1, 0xc4, 0x4c, 0xee, 0x03, 0x10, 0x78, 0x31, 0x38, 0x48, + 0x5b, 0xc0, 0x32, 0xda, 0x00, 0x70, 0x7c, 0x98, 0xb0, 0x39, 0xaa, 0x9b, 0x40, 0xc4, 0x7f, 0x51, + 0x89, 0x80, 0xb7, 0x45, 0x44, 0x31, 0xc8, 0xe7, 0xa4, 0x80, 0xba, 0x89, 0x75, 0xd1, 0xd1, 0x71, + 0x15, 0xbd, 0x23, 0xb1, 0x75, 0x6b, 0x2e, 0xf0, 0x23, 0x26, 0xc2, 0x53, 0x10, 0x1c, 0xc7, 0x67, + 0xca, 0xdf, 0x19, 0x46, 0xa8, 0x2b, 0x43, 0xc6, 0xb5, 0x9a, 0x30, 0x0f, 0x68, 0x3c, 0x46, 0x0e, + 0xa0, 0x77, 0xfd, 0x3a, 0x2e, 0x2f, 0x96, 0xcb, 0x9f, 0xeb, 0x1e, 0x62, 0x33, 0xf2, 0xcc, 0xdf, + 0x70, 0xb1, 0xe2, 0x77, 0xa4, 0xf4, 0x24, 0x10, 0x35, 0xd0, 0xee, 0x2f, 0x89, 0x24, 0x64, 0x2d, + 0x2c, 0x82, 0x55, 0x1d, 0x11, 0x79, 0xab, 0x4e, 0x32, 0xfc, 0x28, 0xfc, 0x9c, 0x6a, 0x93, 0x54, + 0x5a, 0x15, 0xd7, 0xe5, 0x0a, 0xff, 0x76, 0x1e, 0x1c, 0xf4, 0x0c, 0x7e, 0xc7, 0x76, 0x93, 0x8d, + 0xf2, 0xaf, 0x3f, 0xe9, 0x2f, 0x90, 0x19, 0xc4, 0x78, 0x7a, 0xb3, 0x8e, 0x07, 0x34, 0x99, 0xd6, + 0xae, 0x87, 0x10, 0x19, 0xe0, 0x94, 0xec, 0x7d, 0x51, 0x23, 0xaf, 0xa7, 0x51, 0xa9, 0xb3, 0x56, + 0xb3, 0x12, 0x0f, 0xee, 0x78, 0x2b, 0x67, 0xcf, 0x61, 0x7b, 0x0a, 0x6f, 0xf4, 0x49, 0x9f, 0xa6, + 0xd4, 0xc9, 0x20, 0x49, 0x9c, 0xcb, 0xdf, 0x27, 0xb7, 0x46, 0x24, 0xdc, 0x31, 0x4b, 0x10, 0x4c, + 0x17, 0x03, 0x55, 0x99, 0xec, 0x9f, 0xe5, 0x66, 0x91, 0xbc, 0xba, 0x6a, 0x9b, 0xf7, 0x91, 0xd1, + 0xa9, 0x84, 0xeb, 0x31, 0x59, 0xe7, 0xfa, 0x94, 0x38, 0x28, 0x78, 0x31, 0xf2, 0x84, 0x5b, 0x6b, + 0xbf, 0x9d, 0xdc, 0xdc, 0x27, 0xdd, 0x24, 0x95, 0x2d, 0x3b, 0x31, 0xd0, 0x3c, 0xb5, 0xf5, 0xe5, + 0xee, 0xa1, 0x59, 0x04, 0xf4, 0xea, 0xf6, 0x1d, 0x91, 0xbc, 0xb0, 0x87, 0xf0, 0x91, 0x7d, 0xf3, + 0x28, 0x6c, 0x48, 0xd5, 0x1a, 0xd7, 0xa7, 0xbf, 0x81, 0x9c, 0x86, 0x95, 0x49, 0x2a, 0xea, 0xab, + 0x99, 0xad, 0x29, 0xac, 0x71, 0x40, 0x8a, 0x49, 0x3a, 0x74, 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0x5a, 0x4a, 0xd4, 0xff, 0x28, 0x67, 0x1f, 0xf6, 0x77, 0x05, 0x69, 0x1d, 0xac, 0x24, 0x87, + 0x84, 0x44, 0xf0, 0xcb, 0x78, 0xb2, 0xad, 0xdd, 0xa7, 0x1b, 0x64, 0x3e, 0xaa, 0x73, 0xf1, 0x41, + 0xad, 0xc0, 0x7f, 0x9b, 0x93, 0x86, 0xb8, 0xbd, 0x25, 0x62, 0x1b, 0xd0, 0x0b, 0x3a, 0x80, 0xf1, + 0x59, 0x15, 0xc7, 0xf3, 0x6a, 0x17, 0xeb, 0x9e, 0x22, 0xbb, 0x15, 0x04, 0xf2, 0xbf, 0x15, 0xf9, + 0xba, 0x52, 0x94, 0x68, 0x45, 0x09, 0x71, 0xe8, 0xf7, 0x1f, 0x36, 0x5c, 0x84, 0x20, 0x6b, 0xd6, + 0xfd, 0x82, 0xc9, 0x5e, 0xe8, 0x87, 0xed, 0x5f, 0xef, 0x0f, 0xd7, 0x65, 0x76, 0x33, 0xc6, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -10791,14086 +10791,14086 @@ static BINDATA_CONST NvU8 kgspBinArchiveConcatenatedFMC_GH100_ucode_image_prod_d 0x00, 0x00, 0x00, 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0x62, 0xf0, 0x38, 0xc8, 0xdf, 0x78, 0xac, 0xbb, + 0xcc, 0x8b, 0x36, 0x79, 0xcf, 0x0f, 0x73, 0x18, 0x5a, 0xf6, 0xf6, 0xde, 0x7f, 0xde, 0xb1, 0x55, + 0xb9, 0x65, 0xa6, 0xaa, 0x70, 0x2b, 0xad, 0xb4, 0xa4, 0x04, 0x33, 0xfc, 0x08, 0x8f, 0x9b, 0x01, + 0xfb, 0xe5, 0xd0, 0xf6, 0xb4, 0xa1, 0xb2, 0x74, 0x9c, 0x9e, 0xc0, 0xc2, 0xde, 0xc7, 0x0b, 0x45, + 0x56, 0x3c, 0x1c, 0xc6, 0x03, 0x29, 0x00, 0x37, 0xbe, 0xc2, 0x87, 0xc4, 0xb3, 0xc7, 0x98, 0x68, }; #endif // defined(BINDATA_INCLUDE_DATA) diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmBoot_GH100.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmBoot_GH100.c index 759d53ed28..fd8a6a4867 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmBoot_GH100.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmBoot_GH100.c @@ -63,10318 +63,10318 @@ static BINDATA_CONST NvU8 kgspBinArchiveGspRmBoot_GH100_ucode_image_dbg_data[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x27, 0x8c, 0x97, 0x09, 0x7e, 0x4c, 0x31, 0x06, 0x0f, 0xb3, + 0xe2, 0xe0, 0xa2, 0xf0, 0xd2, 0x94, 0x40, 0x17, 0x59, 0x33, 0x73, 0x15, 0x54, 0x7f, 0x6e, 0xfa, + 0xbc, 0xa1, 0x08, 0x4e, 0x86, 0xe2, 0x07, 0xbe, 0x96, 0x7f, 0x97, 0xba, 0x14, 0x14, 0xe7, 0x64, + 0x1d, 0x86, 0xc6, 0x9b, 0x6f, 0x8d, 0xcc, 0xe5, 0xa2, 0x98, 0xcb, 0x3a, 0x56, 0xfd, 0x3c, 0x6d, + 0xb6, 0x1e, 0x23, 0x26, 0xfe, 0x35, 0xf9, 0x89, 0xf9, 0xbd, 0xb1, 0xe0, 0xa4, 0xb9, 0xea, 0xdd, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -10601,10342 +10601,10342 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmBoot_GH100_ucode_desc_dbg_storage_pvt; // static BINDATA_CONST NvU8 kgspBinArchiveGspRmBoot_GH100_ucode_image_prod_data[] = { - 0xb3, 0x40, 0x9d, 0xf5, 0x81, 0xfe, 0x04, 0x85, 0x52, 0x13, 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0xb7, + 0x51, 0x16, 0x1c, 0xb6, 0xa0, 0x2a, 0x28, 0x70, 0x54, 0x71, 0xd3, 0x24, 0xf2, 0xef, 0x7b, 0x34, + 0x7f, 0xba, 0x1d, 0x7d, 0xc2, 0x9e, 0x02, 0xd8, 0x72, 0x08, 0x15, 0x9c, 0x8a, 0x76, 0x36, 0xc6, + 0x84, 0x8f, 0xe5, 0xbf, 0x58, 0x13, 0x5d, 0xa7, 0x6a, 0x3b, 0x5b, 0x0c, 0xfb, 0x60, 0x11, 0x17, + 0xf8, 0x71, 0xb7, 0x42, 0x89, 0x78, 0x30, 0x4c, 0xa8, 0x0d, 0xd8, 0xdd, 0xbd, 0x4b, 0x75, 0x96, + 0x09, 0xb7, 0xbc, 0x6c, 0xfa, 0xd2, 0x21, 0x00, 0xdc, 0x0f, 0xa8, 0x68, 0x1a, 0x99, 0x9a, 0xf2, + 0xb9, 0x37, 0x52, 0x80, 0x72, 0xff, 0xcf, 0xfe, 0x0f, 0xf4, 0x8d, 0x17, 0x91, 0x63, 0x3e, 0xd0, + 0x8a, 0xbd, 0x49, 0xfa, 0x61, 0x0f, 0x93, 0x48, 0x9c, 0xf2, 0x28, 0x53, 0x92, 0x3d, 0x16, 0xbb, + 0x47, 0xc2, 0x15, 0x79, 0xae, 0x0d, 0x7b, 0x7f, 0x83, 0xcf, 0x11, 0xe7, 0x01, 0xf0, 0x1a, 0x49, + 0x1d, 0x91, 0xd3, 0x74, 0xbd, 0xfb, 0x6f, 0xe9, 0x97, 0x56, 0x70, 0x7a, 0x15, 0xfa, 0x03, 0xdb, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmCcFmcGfwProdSigned_GH100.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmCcFmcGfwProdSigned_GH100.c index f462f66b19..0b363c2d8e 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmCcFmcGfwProdSigned_GH100.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmCcFmcGfwProdSigned_GH100.c @@ -43,10407 +43,10407 @@ static BINDATA_CONST NvU8 kgspBinArchiveGspRmCcFmcGfwProdSigned_GH100_ucode_imag 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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0xdd, 0x5e, 0x77, 0x97, 0x43, 0xb9, + 0xd3, 0x4f, 0xa0, 0x25, 0x19, 0xa8, 0xaa, 0xe9, 0xa5, 0x51, 0xc9, 0x35, 0x26, 0xc7, 0xdc, 0xb7, + 0xc0, 0x17, 0xf4, 0xd6, 0xf8, 0x28, 0x21, 0xd3, 0x96, 0xe3, 0xcc, 0x41, 0xe1, 0xf6, 0xd8, 0x7f, + 0x11, 0x77, 0x9e, 0x51, 0x18, 0x0d, 0x2a, 0xf4, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -10476,9 +10476,9 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmCcFmcGfwProdSigned_GH100_ucode_image_stor // static BINDATA_CONST NvU8 kgspBinArchiveGspRmCcFmcGfwProdSigned_GH100_ucode_hash_data[] = { - 0x6d, 0x53, 0x61, 0xe8, 0x95, 0x09, 0x3f, 0x95, 0x28, 0xd7, 0xfe, 0x8f, 0xea, 0x6a, 0x8c, 0xfa, - 0x6a, 0x85, 0xc8, 0xdd, 0xa9, 0x51, 0xde, 0xf0, 0x84, 0xe9, 0xc1, 0x33, 0x09, 0x4d, 0x65, 0xc2, - 0xfc, 0xdb, 0x42, 0x20, 0x32, 0x70, 0x78, 0xcf, 0x2c, 0x70, 0xc1, 0x2a, 0x81, 0x4d, 0x4f, 0xe8, + 0xd7, 0x2f, 0x06, 0x14, 0x24, 0xeb, 0xad, 0x60, 0x02, 0x47, 0xe2, 0x04, 0x11, 0x8e, 0x80, 0x5a, + 0x9c, 0x06, 0x1a, 0x36, 0xf4, 0xe4, 0x44, 0x49, 0xd5, 0x46, 0xce, 0x59, 0xed, 0x48, 0x66, 0x29, + 0x8c, 0x72, 0xcf, 0x64, 0xe3, 0x87, 0x00, 0x73, 0x13, 0x9e, 0x88, 0xe2, 0xe2, 0x92, 0x7f, 0xf1, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -10511,30 +10511,30 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmCcFmcGfwProdSigned_GH100_ucode_hash_stora // static BINDATA_CONST NvU8 kgspBinArchiveGspRmCcFmcGfwProdSigned_GH100_ucode_sig_data[] = { - 0x99, 0x74, 0xc5, 0x87, 0x70, 0x92, 0x82, 0x9f, 0xdf, 0xe8, 0x75, 0x9b, 0x84, 0x56, 0x32, 0xcc, - 0xaa, 0xed, 0xbe, 0x44, 0x0f, 0x31, 0xcb, 0xb8, 0xad, 0x12, 0x53, 0xd8, 0x9c, 0x6f, 0xaa, 0x7e, - 0x53, 0x2f, 0x9a, 0xa5, 0x1e, 0x21, 0xc7, 0xb7, 0x05, 0x6b, 0x20, 0xf1, 0xaa, 0x26, 0xa1, 0x8f, - 0xb7, 0xff, 0x2d, 0xdf, 0x59, 0x22, 0x5b, 0x3c, 0x7f, 0x05, 0xb2, 0xf3, 0x2c, 0x56, 0x64, 0x4b, - 0xb7, 0x33, 0xbd, 0xca, 0x48, 0x93, 0xa2, 0x72, 0xc9, 0xde, 0x53, 0x19, 0x12, 0xc5, 0x4e, 0x40, - 0x11, 0x35, 0xa9, 0x27, 0xae, 0xdf, 0x39, 0x2b, 0xfd, 0x73, 0x1b, 0x83, 0x75, 0x17, 0xaf, 0x63, - 0x2e, 0x80, 0x95, 0xef, 0x50, 0x24, 0xbc, 0xb2, 0x13, 0xf1, 0x70, 0x5d, 0x76, 0x76, 0xc2, 0x25, - 0x87, 0x3b, 0x55, 0xed, 0x9b, 0xfc, 0x6e, 0x3b, 0xcb, 0x73, 0x10, 0x89, 0xce, 0x96, 0x62, 0x17, - 0xfd, 0xad, 0xcd, 0x99, 0x94, 0xc9, 0x67, 0xd0, 0x5e, 0x44, 0x12, 0x4a, 0xd8, 0x6d, 0xe0, 0x7f, - 0xdb, 0x51, 0x60, 0xd1, 0x81, 0x55, 0x88, 0x6b, 0x57, 0xf4, 0x7c, 0xd0, 0xf6, 0xa5, 0xed, 0xca, - 0x7f, 0xd7, 0xa6, 0x04, 0x27, 0xd7, 0xf5, 0xf1, 0x48, 0x9b, 0x5f, 0x63, 0xb1, 0xd6, 0x73, 0xe7, - 0x70, 0x07, 0x78, 0x5d, 0x0b, 0xc4, 0xd4, 0x8d, 0x62, 0x21, 0x24, 0x4f, 0x65, 0x24, 0xcb, 0x4f, - 0x27, 0xbc, 0xa1, 0x4b, 0x13, 0xec, 0xba, 0xda, 0x18, 0xf8, 0xad, 0x47, 0xc8, 0xdb, 0x87, 0x2f, - 0xa2, 0x24, 0x2a, 0x21, 0x64, 0x39, 0x3b, 0x5a, 0xb5, 0xb6, 0x65, 0xf1, 0x87, 0xec, 0x16, 0xba, - 0x63, 0x0e, 0x2a, 0x18, 0xc7, 0x74, 0x06, 0x8f, 0x07, 0xec, 0x6c, 0xa9, 0x41, 0x8c, 0x1f, 0x9a, - 0x49, 0x68, 0xd0, 0x25, 0x08, 0x0f, 0xef, 0xb8, 0x73, 0xc0, 0x5c, 0x9b, 0x1b, 0x53, 0xce, 0xf9, - 0x4d, 0xa8, 0x2a, 0x8e, 0x2e, 0xf5, 0xd4, 0x5b, 0x77, 0xd2, 0x61, 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0xa7, 0xd2, 0x1a, 0x07, 0xfd, 0xa6, 0x3e, 0xdc, 0x20, 0x0c, 0x22, 0x06, }; #endif // defined(BINDATA_INCLUDE_DATA) diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwDebugSigned_GH100.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwDebugSigned_GH100.c index 0c7002ec3c..1d835643ba 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwDebugSigned_GH100.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwDebugSigned_GH100.c @@ -43,10183 +43,10183 @@ static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwDebugSigned_GH100_ucode_image 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0xfd, 0xe2, 0xdd, 0x5a, 0x8e, 0xb2, 0x78, - 0x47, 0x0c, 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0x9b, 0xad, 0x07, 0xc2, 0x05, 0x02, 0xdd, 0x4f, 0xa8, 0xef, 0x5b, 0x71, 0xa8, 0xad, + 0x4d, 0x1b, 0x29, 0xf2, 0x0d, 0xc4, 0x94, 0x81, 0x3f, 0xd0, 0xa6, 0x12, 0x2a, 0xdb, 0xe5, 0x64, + 0x8d, 0x83, 0x65, 0xc7, 0x54, 0xd8, 0x4b, 0x82, 0xdc, 0x74, 0xd9, 0x0d, 0x87, 0x70, 0x43, 0xe0, + 0x88, 0x31, 0x25, 0xc1, 0x05, 0xed, 0x4d, 0xd7, 0x1f, 0x2f, 0x3e, 0x16, 0x5c, 0xf9, 0x40, 0x24, + 0x6f, 0x60, 0xf3, 0xeb, 0xb8, 0x1b, 0x7b, 0x0d, 0x2b, 0x6a, 0xbd, 0x45, 0x1f, 0x68, 0xb9, 0x7d, + 0x37, 0xbe, 0x40, 0x4d, 0x5d, 0xd1, 0xc1, 0x40, 0xa2, 0x38, 0x05, 0x9d, 0xe1, 0x71, 0x1f, 0xbd, + 0x66, 0xe3, 0xe2, 0xb7, 0x9f, 0x48, 0x77, 0x4c, 0xfd, 0xb4, 0xac, 0x7d, 0xb4, 0x86, 0xdd, 0xa2, + 0x3c, 0x13, 0xce, 0xf3, 0x5f, 0x2b, 0x09, 0x8c, 0xc6, 0xe4, 0x5b, 0x10, 0xed, 0xd2, 0xe3, 0x7f, + 0x00, 0xd9, 0xdf, 0x29, 0xc4, 0x96, 0x6f, 0x28, 0xeb, 0xe1, 0x36, 0xb5, 0x16, 0xc0, 0xb8, 0x07, + 0xbd, 0xb2, 0x88, 0x35, 0xa5, 0x4c, 0x45, 0xb8, 0xc6, 0xbb, 0x82, 0xcd, 0xe9, 0x87, 0x42, 0x94, + 0xec, 0x33, 0xdc, 0x45, 0x95, 0xdf, 0x98, 0xdf, 0x9a, 0x2b, 0xda, 0x2d, 0xac, 0x78, 0xac, 0xab, + 0x63, 0xa9, 0x71, 0x16, 0x36, 0x9f, 0x5f, 0x3e, 0x40, 0x04, 0x12, 0x89, 0xf4, 0x66, 0x4c, 0x99, + 0x60, 0x83, 0xaf, 0xcb, 0xf3, 0x08, 0x6d, 0xba, 0x88, 0xd6, 0xf7, 0xdf, 0x46, 0xbc, 0xca, 0xdf, + 0x25, 0x53, 0x19, 0x96, 0x25, 0x6d, 0x48, 0xc7, 0x3b, 0x67, 0xb4, 0xe4, 0xa1, 0x57, 0xe4, 0xcd, + 0x05, 0xca, 0xf9, 0x24, 0xed, 0x44, 0xa3, 0x51, 0xbd, 0xc3, 0x17, 0x3e, 0x89, 0xd8, 0xc6, 0x0e, + 0x32, 0x62, 0xe4, 0x2c, 0x50, 0xa5, 0x3a, 0x33, 0x47, 0x3c, 0x02, 0xaf, 0x53, 0xbb, 0x7b, 0x99, + 0x6b, 0x49, 0x63, 0x0a, 0xef, 0xf8, 0xe7, 0x5c, 0xbe, 0xcc, 0xad, 0x08, 0xfb, 0xdf, 0xf9, 0x7e, + 0xd2, 0x58, 0x52, 0x8c, 0x36, 0xd8, 0xef, 0x55, 0xb4, 0x6e, 0x24, 0x03, 0x90, 0xbb, 0x63, 0xc9, + 0xc5, 0x98, 0x51, 0x4d, 0x62, 0x84, 0x32, 0x60, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -10412,9 +10412,9 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwDebugSigned_GH100_ucode_image_stora // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwDebugSigned_GH100_ucode_hash_data[] = { - 0x7d, 0x21, 0xc9, 0x0d, 0x9a, 0x60, 0xa3, 0xb2, 0x2e, 0xab, 0x93, 0x37, 0x79, 0x00, 0xdf, 0x74, - 0x8e, 0x99, 0xba, 0xae, 0x8a, 0xa1, 0x9a, 0x6f, 0x45, 0xcb, 0x0c, 0xfa, 0x89, 0x76, 0xf9, 0xd5, - 0x62, 0x42, 0x66, 0x6e, 0x09, 0x32, 0xfc, 0x5e, 0xa4, 0x3d, 0xe2, 0x4c, 0x57, 0x8b, 0x96, 0x54, + 0x30, 0xf6, 0xa5, 0xe0, 0xb5, 0x7c, 0xec, 0x95, 0x83, 0xe2, 0x70, 0x11, 0x4a, 0x5a, 0xd7, 0x5d, + 0xb9, 0xab, 0x48, 0xd2, 0x4a, 0x27, 0x78, 0xb6, 0x24, 0x5a, 0x7d, 0x91, 0x1b, 0x68, 0xce, 0x87, + 0x58, 0x89, 0xab, 0x20, 0xc4, 0x82, 0xa5, 0x72, 0x22, 0x78, 0xf7, 0x2d, 0x8c, 0x9d, 0xc7, 0x14, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -10447,30 +10447,30 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwDebugSigned_GH100_ucode_hash_storag // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwDebugSigned_GH100_ucode_sig_data[] = { - 0x29, 0x8c, 0xed, 0xad, 0xd9, 0x52, 0x8f, 0x7c, 0xcc, 0x50, 0xd4, 0x32, 0x1e, 0xcd, 0x55, 0xba, - 0x86, 0x43, 0x4c, 0xb7, 0x74, 0xf8, 0x4c, 0xd4, 0xf7, 0x26, 0x64, 0x0b, 0x48, 0x5a, 0xf0, 0x8d, - 0x4f, 0xff, 0x82, 0x1f, 0xac, 0x1d, 0x77, 0xee, 0x7a, 0x8b, 0xd9, 0xfc, 0x83, 0x2e, 0x8e, 0x36, - 0x6d, 0x82, 0x1f, 0x6f, 0x21, 0x36, 0x7d, 0xb5, 0x51, 0xdb, 0x18, 0x08, 0xb8, 0xe3, 0x6a, 0x71, - 0xbb, 0x36, 0x05, 0x36, 0x89, 0x3c, 0x20, 0x77, 0xed, 0x50, 0x26, 0x15, 0x90, 0x9b, 0x83, 0xcb, - 0x5f, 0x06, 0x8e, 0xf5, 0xb2, 0x0b, 0xd2, 0x58, 0x46, 0x48, 0xe4, 0x6a, 0xbf, 0xbd, 0x04, 0xde, - 0x4e, 0xe1, 0xd4, 0x38, 0x4d, 0x8f, 0x78, 0x25, 0xf4, 0x54, 0xef, 0x64, 0x8c, 0x0b, 0xad, 0x62, - 0x5a, 0x2c, 0x40, 0x92, 0xd7, 0x7c, 0x07, 0xe1, 0x0d, 0x2b, 0x6d, 0x09, 0xbb, 0x2a, 0xd1, 0x74, - 0xaf, 0x2f, 0x23, 0xa8, 0x5e, 0xb2, 0x88, 0x37, 0xc8, 0xd8, 0x24, 0xef, 0x25, 0x6b, 0xee, 0xf1, - 0x35, 0x52, 0xf6, 0xcc, 0xab, 0xf8, 0xf8, 0x5b, 0x87, 0xe7, 0x0d, 0xc7, 0x33, 0x74, 0x39, 0xa2, - 0xb9, 0x3c, 0xa4, 0xf4, 0x1a, 0xd8, 0x11, 0x99, 0x43, 0x38, 0x09, 0x9c, 0x3a, 0xd7, 0x73, 0x60, - 0xdc, 0x43, 0xe8, 0x05, 0x03, 0x2f, 0xe5, 0x1d, 0x75, 0x88, 0xa8, 0x68, 0xfb, 0xf4, 0x40, 0xb2, - 0x29, 0x43, 0x55, 0xe7, 0x84, 0x8f, 0x7a, 0x37, 0x5a, 0x8f, 0x15, 0x89, 0x1f, 0x5d, 0xd4, 0x63, - 0x78, 0x85, 0xe1, 0x1d, 0x9f, 0x08, 0x97, 0xbb, 0xf7, 0xd8, 0x65, 0xb0, 0x23, 0x4e, 0xfe, 0x54, - 0xc5, 0x99, 0x2b, 0xda, 0xfe, 0xe0, 0x23, 0x1e, 0x25, 0x91, 0x67, 0xdf, 0x19, 0x1f, 0x92, 0xdc, - 0x37, 0x3a, 0x34, 0xd4, 0x0f, 0xf0, 0x50, 0x46, 0xba, 0x78, 0xf4, 0x4a, 0xb6, 0x3a, 0x8e, 0xdf, - 0xe6, 0xf2, 0x18, 0x75, 0x3a, 0x77, 0x3c, 0x62, 0x7b, 0xf2, 0x60, 0x87, 0x8e, 0x6d, 0x59, 0x94, - 0x04, 0x20, 0xbd, 0xd8, 0xcb, 0xac, 0xfa, 0x50, 0x3a, 0x08, 0xa7, 0xd9, 0xb5, 0x93, 0x3e, 0x41, - 0xc5, 0x33, 0x01, 0xae, 0x9b, 0x4f, 0x2e, 0x00, 0x4b, 0x68, 0xa8, 0x44, 0x65, 0x5b, 0xc2, 0x69, - 0x18, 0xbb, 0x55, 0x3b, 0x66, 0x6e, 0x22, 0xc6, 0xca, 0xec, 0xb6, 0xee, 0x58, 0x17, 0x0d, 0x70, - 0x6d, 0xfd, 0xea, 0x72, 0x49, 0x47, 0x14, 0x02, 0x22, 0xea, 0x99, 0xeb, 0x41, 0x77, 0x7e, 0x7b, - 0x28, 0x3b, 0x4e, 0xe2, 0xa7, 0x31, 0x8e, 0x5c, 0x88, 0xdd, 0xc1, 0x73, 0x04, 0x31, 0xc9, 0xfa, - 0x48, 0x5f, 0x39, 0x7e, 0x47, 0x16, 0xa5, 0x46, 0x73, 0xbb, 0xec, 0x64, 0x33, 0x51, 0x10, 0x12, - 0x73, 0x54, 0xd3, 0x5f, 0x29, 0x87, 0x16, 0xd7, 0xfc, 0xfd, 0x7d, 0x93, 0x6e, 0x96, 0x76, 0xb4, + 0x57, 0xeb, 0x87, 0x38, 0xfe, 0x21, 0x34, 0xf7, 0xae, 0x8c, 0x38, 0xcc, 0x33, 0xa0, 0x40, 0x52, + 0x2f, 0x06, 0x43, 0x73, 0xb9, 0xbd, 0xdd, 0x79, 0x95, 0xae, 0x61, 0x4b, 0x00, 0x99, 0x6b, 0x17, + 0xb3, 0x21, 0x8f, 0xc7, 0xef, 0x90, 0x83, 0xd6, 0x0b, 0x0b, 0x96, 0xe6, 0x4a, 0xaa, 0xc5, 0x1d, + 0x11, 0x84, 0x44, 0xae, 0x54, 0xdb, 0x86, 0xa4, 0x46, 0x87, 0x80, 0xef, 0xcf, 0x0f, 0xf7, 0xe8, + 0x68, 0xa4, 0x2a, 0x63, 0xc4, 0x6c, 0xdc, 0x88, 0xb7, 0x83, 0x45, 0xa1, 0x4c, 0x87, 0xe3, 0xc9, + 0xb5, 0x30, 0x63, 0x64, 0x50, 0x9b, 0x1e, 0x49, 0xc2, 0x1c, 0x4b, 0x48, 0x8a, 0xc4, 0xf2, 0xb6, + 0xb2, 0xa8, 0xbf, 0x91, 0x5b, 0x91, 0xe0, 0x1e, 0x07, 0x96, 0x7c, 0x24, 0x82, 0xba, 0xe1, 0x48, + 0x9d, 0xa1, 0xc9, 0xd2, 0x42, 0x86, 0x49, 0x25, 0x3b, 0x5e, 0x72, 0x9e, 0x27, 0xdc, 0xef, 0x67, + 0x61, 0xd7, 0x28, 0xe4, 0x6b, 0xa7, 0x9b, 0xcb, 0x58, 0xd9, 0x55, 0x34, 0x55, 0x6a, 0x9b, 0xb2, + 0x0f, 0x1e, 0xcb, 0xbe, 0x68, 0xef, 0xb6, 0x66, 0x98, 0x52, 0xc3, 0x81, 0x0f, 0xcc, 0x9a, 0x25, + 0x9d, 0x8d, 0x24, 0x85, 0x94, 0x14, 0x3f, 0x8e, 0xe3, 0x24, 0x0a, 0x40, 0xb7, 0x3b, 0x26, 0x19, + 0x1c, 0x60, 0xd3, 0x43, 0x4f, 0x84, 0xfe, 0xae, 0x54, 0xbe, 0x7b, 0x0c, 0x38, 0x55, 0x7c, 0x56, + 0x1d, 0xa3, 0x47, 0x45, 0x38, 0xb8, 0xd9, 0xe0, 0x9e, 0x3e, 0x0b, 0x7f, 0xf3, 0x30, 0x87, 0x8b, + 0x39, 0x5b, 0x40, 0xee, 0x57, 0x78, 0x0f, 0x08, 0x0b, 0x0d, 0x3f, 0xbb, 0x39, 0x21, 0x2f, 0x67, + 0xb2, 0x3c, 0x91, 0x22, 0x77, 0xad, 0x16, 0x40, 0x5e, 0x5a, 0xfc, 0x6e, 0xf2, 0x07, 0x84, 0x53, + 0x7a, 0xc1, 0xcb, 0x21, 0xeb, 0x08, 0x7e, 0xb6, 0xb7, 0xc0, 0x62, 0xc2, 0x10, 0x7c, 0xf2, 0xa3, + 0x29, 0x82, 0xf3, 0xbb, 0x21, 0xe1, 0x88, 0x1d, 0xa8, 0x72, 0x41, 0xd8, 0xf3, 0xf9, 0x9d, 0xb3, + 0x03, 0x6e, 0x89, 0x5e, 0x9d, 0xe4, 0xae, 0x60, 0x01, 0x77, 0x9a, 0xbe, 0x58, 0xaf, 0xa9, 0xcb, + 0xa3, 0xf1, 0x36, 0x76, 0xac, 0x45, 0x49, 0x50, 0x9c, 0x14, 0xed, 0xeb, 0x9b, 0xec, 0x48, 0x6a, + 0xc4, 0x62, 0x68, 0x22, 0x29, 0xf9, 0x91, 0x29, 0x2f, 0xb0, 0xb5, 0x90, 0xdb, 0x31, 0xf0, 0x83, + 0x84, 0xfe, 0x5f, 0x0a, 0xdb, 0xf1, 0x90, 0x50, 0xe7, 0x94, 0xa1, 0x6e, 0x3f, 0x3d, 0x1b, 0xd7, + 0x2d, 0x35, 0x7c, 0xf2, 0xbb, 0x6b, 0x3b, 0xe1, 0x72, 0x3b, 0xc2, 0xc8, 0xd9, 0x38, 0xb5, 0x06, + 0xa3, 0x5a, 0x12, 0x78, 0x16, 0x43, 0x3b, 0x88, 0x63, 0xdd, 0xf4, 0x19, 0x51, 0xff, 0xbe, 0xad, + 0x4c, 0xad, 0xd7, 0x3f, 0xd5, 0x3a, 0x9d, 0x6a, 0xf0, 0x08, 0x34, 0xbf, 0xa8, 0x1a, 0x60, 0xef, }; #endif // defined(BINDATA_INCLUDE_DATA) diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwProdSigned_GH100.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwProdSigned_GH100.c index 38aa41ad3f..f994c59e3b 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwProdSigned_GH100.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwProdSigned_GH100.c @@ -43,10343 +43,10343 @@ static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwProdSigned_GH100_ucode_image_ 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8b, 0xdc, 0xff, 0xdb, 0x1c, 0xd7, 0x7e, 0x70, - 0x54, 0x29, 0x72, 0x91, 0x0b, 0xaa, 0x43, 0x03, 0x3a, 0x58, 0xe0, 0x81, 0x04, 0xbb, 0x11, 0xc4, - 0x9b, 0x2a, 0xb9, 0x09, 0x20, 0x11, 0xe7, 0xbb, 0x39, 0x87, 0x71, 0x11, 0x18, 0xd2, 0xa8, 0xa5, - 0xc2, 0xa7, 0xf5, 0x07, 0x8b, 0x27, 0x33, 0x61, 0xab, 0xda, 0x76, 0xd2, 0xdc, 0x86, 0xd6, 0xe0, - 0xd0, 0x0e, 0xc6, 0xb6, 0xd3, 0xf4, 0xd5, 0xd1, 0x22, 0xbc, 0x22, 0xad, 0xfd, 0xb2, 0x8a, 0x3d, - 0x2b, 0xc0, 0x43, 0x58, 0xe5, 0x8e, 0x7b, 0x67, 0x25, 0x56, 0x0e, 0xaa, 0x89, 0x36, 0x3c, 0x8a, - 0x4c, 0x96, 0x5c, 0x91, 0xef, 0x7a, 0xa3, 0xea, 0xdd, 0xc9, 0xf3, 0x89, 0x1e, 0xb3, 0xb9, 0xb7, - 0xf3, 0x37, 0xd6, 0xa4, 0x21, 0x23, 0x67, 0x70, 0x46, 0xe3, 0x15, 0x13, 0x42, 0xfa, 0x3d, 0x48, - 0xfe, 0xc5, 0x29, 0xb4, 0x14, 0x55, 0xd7, 0xee, 0x34, 0x86, 0xa6, 0xba, 0x92, 0x95, 0x94, 0x84, - 0x62, 0x76, 0x70, 0x45, 0xc7, 0x1e, 0x05, 0xf2, 0x2f, 0x0b, 0x44, 0xc8, 0xdc, 0xd1, 0x28, 0xcc, - 0xe5, 0xca, 0x4d, 0x59, 0x05, 0x9c, 0xc5, 0x45, 0xaa, 0x2e, 0xc3, 0x11, 0x9f, 0xda, 0x8a, 0x1a, - 0x9b, 0xe9, 0x43, 0x5d, 0x2a, 0x91, 0x0e, 0x5e, 0x84, 0xdf, 0x59, 0xe4, 0x5a, 0x7c, 0x2c, 0xfb, - 0x8b, 0xaf, 0xcb, 0x1d, 0x86, 0xeb, 0x9a, 0x1c, 0x33, 0xb7, 0x6a, 0xe2, 0x47, 0xf7, 0x77, 0xce, - 0x74, 0xdf, 0x4b, 0xdf, 0x99, 0x28, 0x9f, 0x99, 0x9c, 0xf7, 0x52, 0x69, 0xd1, 0x60, 0xc1, 0x05, - 0xf8, 0x82, 0x09, 0xc7, 0x0d, 0x87, 0x22, 0x1f, 0xfb, 0x81, 0x05, 0x32, 0x46, 0x38, 0xbe, 0x33, - 0xfb, 0x07, 0x50, 0xab, 0xd7, 0xa4, 0x52, 0xc8, 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0x15, 0x0f, 0x56, 0x3f, + 0xde, 0x4a, 0xbe, 0xfd, 0xd0, 0x69, 0x22, 0x12, 0xaf, 0x13, 0x8d, 0x91, 0x5b, 0xf4, 0x94, 0xff, + 0x87, 0x94, 0x15, 0x91, 0xd9, 0xf6, 0xb3, 0x56, 0x9a, 0xf6, 0x01, 0xd5, 0x06, 0x96, 0x75, 0x9d, + 0xad, 0xf9, 0xa6, 0x87, 0x27, 0x08, 0xc0, 0xed, 0xf2, 0xef, 0xa7, 0xec, 0xf4, 0x09, 0x87, 0x37, + 0xd4, 0xd1, 0x65, 0x49, 0x2b, 0xda, 0x48, 0x45, 0xaf, 0xf3, 0x83, 0x36, 0xf5, 0x39, 0x99, 0x79, + 0xbd, 0x03, 0xfd, 0xea, 0xaa, 0x7d, 0x6e, 0xb5, 0xea, 0x36, 0x1f, 0xdd, 0x27, 0x0f, 0xd5, 0xe7, + 0x3d, 0xb2, 0x24, 0x03, 0x0e, 0x9b, 0xbd, 0x0b, 0xaf, 0xad, 0x9b, 0x0a, 0xc8, 0xfb, 0x50, 0xce, + 0xf7, 0x7e, 0x35, 0x91, 0xbd, 0x44, 0xd8, 0x8b, 0x0c, 0xec, 0x6f, 0xae, 0x0f, 0x08, 0x01, 0xf6, + 0x2f, 0x06, 0x22, 0x7b, 0xc6, 0x0f, 0x27, 0xea, 0x85, 0x1d, 0xec, 0xe4, 0x26, 0x10, 0xaf, 0x85, + 0xa3, 0xa3, 0x43, 0xaf, 0xb7, 0x51, 0xb4, 0xb1, 0x55, 0x97, 0x91, 0xf8, 0x9e, 0x27, 0x6e, 0x72, + 0xd3, 0x28, 0xef, 0xd0, 0x4a, 0x55, 0xdd, 0x14, 0x7f, 0xb4, 0xf8, 0x87, 0x68, 0xf0, 0x5c, 0x48, + 0xc2, 0xab, 0xf8, 0xd3, 0x72, 0xc2, 0x73, 0x2d, 0x2d, 0x7d, 0x60, 0x43, 0x9d, 0xf3, 0x7d, 0xbc, + 0x92, 0xc0, 0x5d, 0xf1, 0xa2, 0x7b, 0x8c, 0xbb, 0x3f, 0x52, 0xb4, 0x79, 0x1b, 0x12, 0x23, 0x05, + 0x82, 0xf3, 0x1e, 0x24, 0xcd, 0x0b, 0x00, 0x05, 0x18, 0xd5, 0x0e, 0xcb, 0x23, 0xfb, 0xb2, 0x17, + 0x19, 0x56, 0xae, 0x68, 0x60, 0xae, 0xd3, 0xaa, 0x26, 0x61, 0x85, 0x84, 0x3e, 0xa7, 0x62, 0xe4, + 0x93, 0x8c, 0x8a, 0xe7, 0x96, 0xb0, 0x13, 0xd4, 0xdb, 0xc0, 0x2b, 0x48, 0x3b, 0x49, 0x72, 0x9f, + 0x89, 0xd4, 0xf2, 0xb3, 0x7b, 0x92, 0x5e, 0x85, 0xdc, 0x65, 0x99, 0x94, 0x09, 0xb6, 0xdb, 0x85, + 0x8e, 0x29, 0xef, 0x60, 0x33, 0x88, 0xd8, 0xd8, 0x8a, 0xf9, 0xbd, 0x88, 0x29, 0xc7, 0x70, 0xf6, + 0x43, 0xf6, 0xe0, 0xd1, 0x7c, 0x8b, 0x25, 0xad, 0x0a, 0x69, 0x15, 0x95, 0x53, 0xc1, 0x38, 0xb8, + 0xbe, 0x70, 0xfe, 0x9a, 0x7c, 0x9e, 0xdb, 0xde, 0x3f, 0xcf, 0xda, 0xc0, 0xd6, 0x65, 0x89, 0x9e, + 0xfd, 0xd3, 0x49, 0xc7, 0x01, 0xc7, 0x8a, 0xd1, 0x79, 0x71, 0x6c, 0x31, 0xcb, 0xa8, 0x73, 0x13, + 0xe3, 0xc9, 0x60, 0xfa, 0x95, 0x9f, 0x32, 0x16, 0x2c, 0x28, 0x7b, 0x9f, 0x64, 0x81, 0x18, 0x1f, + 0xa3, 0xb2, 0x1c, 0xb9, 0xbb, 0x85, 0x57, 0xa6, 0x82, 0x45, 0x67, 0x31, 0xf0, 0x09, 0x8d, 0xfb, + 0xd8, 0xbb, 0x9f, 0xa7, 0x8e, 0x50, 0xa9, 0x2b, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -10412,9 +10412,9 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwProdSigned_GH100_ucode_image_storag // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwProdSigned_GH100_ucode_hash_data[] = { - 0x79, 0x84, 0xf4, 0xc0, 0x20, 0x39, 0xf6, 0x29, 0xb7, 0x68, 0x79, 0x91, 0x69, 0xad, 0x30, 0xec, - 0xe5, 0x56, 0x78, 0xdc, 0x3e, 0x39, 0xa5, 0x04, 0x55, 0x0a, 0xac, 0x39, 0xfc, 0x06, 0xf1, 0x55, - 0x85, 0x2e, 0x71, 0x1b, 0x96, 0x68, 0x5b, 0xd0, 0x42, 0x77, 0x6d, 0x88, 0x0b, 0x80, 0x4f, 0x7e, + 0xee, 0x3a, 0x88, 0x1e, 0xa2, 0xb7, 0x64, 0x5a, 0xa6, 0xb2, 0x0a, 0x54, 0x7b, 0xba, 0xd5, 0x82, + 0x8d, 0xf1, 0x39, 0x37, 0xd2, 0x24, 0xd7, 0x55, 0x80, 0x69, 0xee, 0x45, 0x41, 0xdf, 0xfa, 0x7b, + 0xd0, 0xbe, 0xc8, 0xec, 0xb0, 0x01, 0x71, 0xfd, 0xdd, 0xb7, 0xd1, 0xcc, 0xf0, 0x22, 0xbf, 0xb5, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -10447,30 +10447,30 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwProdSigned_GH100_ucode_hash_storage // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwProdSigned_GH100_ucode_sig_data[] = { - 0x84, 0x9c, 0xe6, 0x74, 0xaa, 0x21, 0xec, 0xd6, 0xc2, 0x57, 0x4b, 0xf0, 0x01, 0xfd, 0xeb, 0xcb, - 0xd2, 0xa2, 0x49, 0x19, 0xaf, 0xdb, 0xcb, 0xc9, 0xd7, 0x1d, 0x37, 0xcb, 0x1e, 0xcf, 0x6f, 0x30, - 0x6a, 0x48, 0x2c, 0x6e, 0xf1, 0x6f, 0x93, 0x96, 0x91, 0x20, 0x2d, 0x08, 0xaf, 0xb4, 0xb6, 0x8d, - 0x90, 0xcb, 0x1a, 0xb5, 0x57, 0x79, 0xa8, 0xf3, 0x10, 0x5b, 0x3d, 0x31, 0x0f, 0xca, 0x13, 0x28, - 0xaf, 0x1f, 0xff, 0x8b, 0x91, 0x6f, 0x53, 0x06, 0x4f, 0x88, 0x3e, 0xc3, 0xd2, 0xcb, 0x8b, 0xfb, - 0x30, 0x0e, 0xf7, 0xe7, 0x46, 0x2c, 0xb8, 0x9a, 0xd8, 0x66, 0xea, 0x49, 0x65, 0xba, 0xa6, 0xe4, - 0x9d, 0x0d, 0xfe, 0xee, 0x7b, 0x98, 0x3a, 0x9c, 0xda, 0x6e, 0x7e, 0xa8, 0x18, 0x08, 0xcd, 0x07, - 0xab, 0x30, 0xa4, 0xc3, 0x06, 0x92, 0xae, 0x50, 0x6d, 0x42, 0xca, 0xd0, 0x18, 0xc8, 0x76, 0xd9, - 0x9d, 0x93, 0x90, 0x2c, 0x2b, 0x76, 0xe7, 0x17, 0xe9, 0x35, 0x9c, 0x87, 0x31, 0x32, 0x21, 0x31, - 0xb6, 0xf0, 0x98, 0x67, 0x60, 0xfb, 0xb6, 0x39, 0x06, 0x69, 0x90, 0xa0, 0xdc, 0xc9, 0x8d, 0xbf, - 0xbb, 0x5f, 0x0b, 0xef, 0xdc, 0x25, 0x2d, 0xa4, 0x0d, 0x94, 0xc5, 0x8c, 0xf2, 0xf0, 0xed, 0xe9, - 0x07, 0x85, 0x7d, 0x47, 0x10, 0xcd, 0xd2, 0xa7, 0xfd, 0xbf, 0x27, 0x97, 0xef, 0xae, 0x01, 0x81, - 0x3b, 0xda, 0x58, 0xdf, 0xee, 0x05, 0x4a, 0x5a, 0xbe, 0xb9, 0x6e, 0xcb, 0x02, 0xd0, 0xfb, 0x0d, - 0x3d, 0x33, 0x15, 0xf0, 0xb7, 0x58, 0x6d, 0x33, 0xec, 0xd6, 0x33, 0xd5, 0xf0, 0xcc, 0x65, 0x4d, - 0xfb, 0xc1, 0x20, 0xaa, 0x84, 0x40, 0xd4, 0x9b, 0xee, 0x40, 0x5c, 0xc1, 0x3c, 0xd9, 0xcf, 0xc5, - 0xc0, 0x0a, 0xd4, 0x56, 0x6f, 0xed, 0xd0, 0x34, 0x25, 0xc6, 0x13, 0x2b, 0x52, 0xa6, 0x96, 0x3d, - 0x28, 0x26, 0x78, 0xe5, 0xf6, 0x77, 0x8c, 0xea, 0x23, 0xb4, 0xf2, 0x0b, 0x02, 0x12, 0x5f, 0x08, - 0x3b, 0x04, 0x32, 0x4e, 0x5e, 0x35, 0xa8, 0x4e, 0xb8, 0x9b, 0x49, 0xae, 0x19, 0xdf, 0x7f, 0x86, - 0x3d, 0x20, 0x92, 0x71, 0xd5, 0xe6, 0x17, 0x16, 0x81, 0xa9, 0xf6, 0xcc, 0xc8, 0x51, 0x40, 0x05, - 0x3c, 0x50, 0xc4, 0x8d, 0x19, 0x3c, 0x63, 0x69, 0xec, 0xc2, 0xf2, 0x77, 0x7f, 0x97, 0xdc, 0x80, - 0xd6, 0x45, 0x7b, 0xdc, 0xce, 0x7a, 0x02, 0x7f, 0x1d, 0xb1, 0x99, 0xfe, 0xbc, 0x0c, 0x75, 0x68, - 0x5e, 0x24, 0xf4, 0x90, 0xaf, 0x8f, 0x24, 0x7c, 0x1a, 0xc1, 0xf4, 0xbe, 0xbc, 0xe3, 0x51, 0x74, - 0x11, 0xba, 0xeb, 0xce, 0xc6, 0x93, 0xf4, 0xac, 0xb2, 0xa7, 0xc3, 0x67, 0xef, 0x89, 0x3a, 0xb9, - 0xca, 0x51, 0x58, 0xa6, 0xbc, 0x23, 0xcd, 0x6e, 0xfb, 0xa6, 0x45, 0x6d, 0xd8, 0xfa, 0x57, 0x9f, + 0x0f, 0x8f, 0x07, 0xba, 0xb2, 0xde, 0x51, 0x21, 0xd8, 0x32, 0x87, 0x73, 0x8d, 0x17, 0x7e, 0xc6, + 0x2c, 0xfd, 0x7c, 0x0e, 0x83, 0x8f, 0x66, 0x1c, 0xb9, 0xcb, 0x6e, 0x29, 0x4e, 0xc2, 0x39, 0xf5, + 0xa1, 0xde, 0x14, 0xe9, 0x66, 0x85, 0x8a, 0x2e, 0x60, 0x86, 0x33, 0x4c, 0xbe, 0x72, 0xb1, 0x15, + 0xa8, 0x9a, 0xef, 0x5e, 0x0a, 0xfe, 0x05, 0x52, 0xcc, 0xfc, 0xd2, 0xc9, 0xb7, 0x7a, 0x0d, 0xc0, + 0x6b, 0x58, 0x26, 0x2a, 0xe7, 0xe8, 0x9f, 0x74, 0x91, 0xe6, 0xd1, 0x57, 0x26, 0x2b, 0xf1, 0xfc, + 0x88, 0xca, 0x0a, 0xe6, 0x05, 0xf3, 0xb2, 0xc2, 0x73, 0x2b, 0x52, 0xd1, 0x3d, 0x33, 0x1a, 0x2f, + 0xef, 0x46, 0x48, 0x4f, 0x51, 0x6c, 0x53, 0x8b, 0xf3, 0x8a, 0xa9, 0xd0, 0xb0, 0xd6, 0xb2, 0x96, + 0x35, 0x55, 0x97, 0xd9, 0x0b, 0xdc, 0x40, 0x9a, 0x05, 0xab, 0x60, 0xf3, 0xaa, 0x80, 0xb0, 0x7a, + 0x97, 0x78, 0x01, 0x63, 0x65, 0xc0, 0x71, 0xc8, 0xab, 0xa3, 0x64, 0x86, 0x53, 0xe0, 0x26, 0x89, + 0x0e, 0x69, 0xc4, 0xe0, 0x2a, 0xab, 0x6d, 0x9a, 0xdf, 0xb8, 0xf4, 0xca, 0xd9, 0xd4, 0x98, 0xfb, + 0xd2, 0xad, 0x69, 0xc4, 0x23, 0x23, 0x03, 0x46, 0xdc, 0x38, 0x5e, 0xab, 0x44, 0x5b, 0xb7, 0xd6, + 0x27, 0xc0, 0x15, 0x77, 0xe2, 0x9c, 0x9a, 0x39, 0x0d, 0xc9, 0x93, 0xf9, 0xa4, 0x3b, 0x55, 0x6c, + 0xce, 0x19, 0x8d, 0xae, 0x44, 0x9e, 0x39, 0x68, 0x7c, 0x37, 0x70, 0x5d, 0x51, 0x85, 0xf2, 0x62, + 0x06, 0x2c, 0xbe, 0x06, 0x98, 0xea, 0xd8, 0xf4, 0xb5, 0x5c, 0xab, 0x16, 0x73, 0x62, 0x3d, 0x48, + 0x30, 0x63, 0xf7, 0xda, 0x2c, 0x3f, 0x7d, 0xc4, 0x19, 0x70, 0x95, 0xc9, 0xb4, 0x04, 0x2d, 0x7c, + 0xa6, 0x3a, 0xb2, 0xb5, 0xf0, 0xbd, 0x00, 0x0a, 0x42, 0x1e, 0xe4, 0x1a, 0xe0, 0x08, 0x4e, 0x77, + 0x8b, 0xfb, 0x06, 0x26, 0x71, 0xa8, 0x31, 0x8f, 0x43, 0xc4, 0xf3, 0x23, 0xc1, 0x90, 0xf7, 0x5d, + 0x77, 0x9d, 0x27, 0x3c, 0x8c, 0xf4, 0x75, 0x9a, 0xf3, 0xb4, 0x81, 0x9b, 0xd5, 0x2d, 0xb4, 0xc6, + 0xcc, 0x2c, 0xe7, 0x1e, 0xe3, 0x14, 0x78, 0x89, 0xed, 0xd1, 0x7f, 0xf8, 0x24, 0x13, 0x86, 0xc8, + 0xae, 0xc9, 0x56, 0x79, 0xb7, 0x7b, 0xe4, 0x07, 0xed, 0x5e, 0xac, 0xb4, 0xa2, 0x40, 0xdc, 0x0b, + 0xb1, 0xa8, 0xfc, 0xae, 0x23, 0xca, 0x11, 0x06, 0x91, 0xbf, 0x29, 0x7f, 0xea, 0x93, 0x3c, 0x3a, + 0x42, 0x56, 0x14, 0xf0, 0xba, 0x54, 0x42, 0x0d, 0x37, 0x5b, 0xe7, 0x45, 0xb6, 0xeb, 0xe6, 0xef, + 0x81, 0x76, 0x11, 0x5f, 0x8f, 0x06, 0x67, 0x5b, 0x88, 0x7d, 0x62, 0x43, 0x28, 0xae, 0x93, 0x03, + 0x39, 0x54, 0x79, 0xed, 0xb0, 0x0a, 0x42, 0xb0, 0x1f, 0x24, 0xe7, 0xcf, 0x5e, 0x31, 0x9d, 0x19, }; #endif // defined(BINDATA_INCLUDE_DATA) diff --git a/src/nvidia/generated/g_ccsl_nvoc.c b/src/nvidia/generated/g_ccsl_nvoc.c index 466c8ae5cf..39051b689d 100644 --- a/src/nvidia/generated/g_ccsl_nvoc.c +++ b/src/nvidia/generated/g_ccsl_nvoc.c @@ -73,10 +73,13 @@ NV_STATUS __nvoc_ctor_Ccsl(Ccsl *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_Ccsl_1(Ccsl *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_Ccsl_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_Ccsl(Ccsl *pThis) { __nvoc_init_funcTable_Ccsl_1(pThis); } diff --git a/src/nvidia/generated/g_ccsl_nvoc.h b/src/nvidia/generated/g_ccsl_nvoc.h index 554cdcda42..cce19fe754 100644 --- a/src/nvidia/generated/g_ccsl_nvoc.h +++ b/src/nvidia/generated/g_ccsl_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_CCSL_NVOC_H_ #define _G_CCSL_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_ccsl_nvoc.h" #ifndef CCSL_H @@ -57,9 +65,14 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct Ccsl { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; - struct Ccsl *__nvoc_pbase_Ccsl; + + // Ancestor object pointers for `staticCast` feature + struct Ccsl *__nvoc_pbase_Ccsl; // ccsl }; #ifndef __NVOC_CLASS_Ccsl_TYPEDEF__ @@ -71,6 +84,7 @@ typedef struct Ccsl Ccsl; #define __nvoc_class_id_Ccsl 0x9bf1a1 #endif /* __nvoc_class_id_Ccsl */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_Ccsl; #define __staticCast_Ccsl(pThis) \ @@ -83,13 +97,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_Ccsl; ((Ccsl*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(Ccsl))) #endif //__nvoc_ccsl_h_disabled - NV_STATUS __nvoc_objCreateDynamic_Ccsl(Ccsl**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_Ccsl(Ccsl**, Dynamic*, NvU32); #define __objCreate_Ccsl(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_Ccsl((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS ccslContextInitViaChannel_IMPL(pCcslContext *ppCtx, NvHandle hClient, NvHandle hChannel); diff --git a/src/nvidia/generated/g_ce_utils_nvoc.c b/src/nvidia/generated/g_ce_utils_nvoc.c index 57aeec3f15..03fb84e3b1 100644 --- a/src/nvidia/generated/g_ce_utils_nvoc.c +++ b/src/nvidia/generated/g_ce_utils_nvoc.c @@ -93,10 +93,13 @@ NV_STATUS __nvoc_ctor_CeUtils(CeUtils *pThis, struct OBJGPU * arg_pGpu, KERNEL_M return status; } +// Vtable initialization static void __nvoc_init_funcTable_CeUtils_1(CeUtils *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_CeUtils_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_CeUtils(CeUtils *pThis) { __nvoc_init_funcTable_CeUtils_1(pThis); } @@ -264,159 +267,187 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_CeUtilsApi = /*pExportInfo=*/ &__nvoc_export_info_CeUtilsApi }; -static NvBool __nvoc_thunk_GpuResource_ceutilsapiShareCallback(struct CeUtilsApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NV_STATUS __nvoc_thunk_RmResource_ceutilsapiCheckMemInterUnmap(struct CeUtilsApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), bSubdeviceHandleProvided); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_CeUtilsApi[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x104u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) ceutilsapiCtrlCmdMemset_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x104u) + /*flags=*/ 0x104u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x500101u, + /*paramSize=*/ sizeof(NV0050_CTRL_MEMSET_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_CeUtilsApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "ceutilsapiCtrlCmdMemset" +#endif + }, + { /* [1] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x104u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) ceutilsapiCtrlCmdMemcopy_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x104u) + /*flags=*/ 0x104u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x500102u, + /*paramSize=*/ sizeof(NV0050_CTRL_MEMCOPY_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_CeUtilsApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "ceutilsapiCtrlCmdMemcopy" +#endif + }, + { /* [2] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x104u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) ceutilsapiCtrlCmdCheckProgress_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x104u) + /*flags=*/ 0x104u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x500103u, + /*paramSize=*/ sizeof(NV0050_CTRL_CHECK_PROGRESS_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_CeUtilsApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "ceutilsapiCtrlCmdCheckProgress" +#endif + }, + +}; + +// 25 up-thunk(s) defined to bridge methods in CeUtilsApi to superclasses -static NV_STATUS __nvoc_thunk_RsResource_ceutilsapiMapTo(struct CeUtilsApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset), pParams); +// ceutilsapiControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiControl(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_ceutilsapiGetMapAddrSpace(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// ceutilsapiMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiMap(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_ceutilsapiGetRefCount(struct CeUtilsApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset)); +// ceutilsapiUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiUnmap(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_RsResource_ceutilsapiAddAdditionalDependants(struct RsClient *pClient, struct CeUtilsApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset), pReference); +// ceutilsapiShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_ceutilsapiShareCallback(struct CeUtilsApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RmResource_ceutilsapiControl_Prologue(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), pCallContext, pParams); +// ceutilsapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiGetRegBaseOffsetAndSize(struct CeUtilsApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_GpuResource_ceutilsapiGetRegBaseOffsetAndSize(struct CeUtilsApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), pGpu, pOffset, pSize); +// ceutilsapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiGetMapAddrSpace(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_GpuResource_ceutilsapiInternalControlForward(struct CeUtilsApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), command, pParams, size); +// ceutilsapiInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiInternalControlForward(struct CeUtilsApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_RsResource_ceutilsapiUnmapFrom(struct CeUtilsApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset), pParams); +// ceutilsapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_ceutilsapiGetInternalObjectHandle(struct CeUtilsApi *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset)); } -static void __nvoc_thunk_RmResource_ceutilsapiControl_Epilogue(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), pCallContext, pParams); +// ceutilsapiAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_ceutilsapiAccessCallback(struct CeUtilsApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NvHandle __nvoc_thunk_GpuResource_ceutilsapiGetInternalObjectHandle(struct CeUtilsApi *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset)); +// ceutilsapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_ceutilsapiGetMemInterMapParams(struct CeUtilsApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_ceutilsapiControl(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), pCallContext, pParams); +// ceutilsapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_ceutilsapiCheckMemInterUnmap(struct CeUtilsApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_GpuResource_ceutilsapiUnmap(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), pCallContext, pCpuMapping); +// ceutilsapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_ceutilsapiGetMemoryMappingDescriptor(struct CeUtilsApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_RmResource_ceutilsapiGetMemInterMapParams(struct CeUtilsApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), pParams); +// ceutilsapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_ceutilsapiControlSerialization_Prologue(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_ceutilsapiGetMemoryMappingDescriptor(struct CeUtilsApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), ppMemDesc); +// ceutilsapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_ceutilsapiControlSerialization_Epilogue(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_ceutilsapiControlFilter(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset), pCallContext, pParams); +// ceutilsapiControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_ceutilsapiControl_Prologue(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_ceutilsapiControlSerialization_Prologue(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), pCallContext, pParams); +// ceutilsapiControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_ceutilsapiControl_Epilogue(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_ceutilsapiCanCopy(struct CeUtilsApi *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset)); +// ceutilsapiCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_ceutilsapiCanCopy(struct CeUtilsApi *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_ceutilsapiIsPartialUnmapSupported(struct CeUtilsApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset)); +// ceutilsapiIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_ceutilsapiIsDuplicate(struct CeUtilsApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset), hMemory, pDuplicate); } -static void __nvoc_thunk_RsResource_ceutilsapiPreDestruct(struct CeUtilsApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset)); +// ceutilsapiPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_ceutilsapiPreDestruct(struct CeUtilsApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_ceutilsapiIsDuplicate(struct CeUtilsApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset), hMemory, pDuplicate); +// ceutilsapiControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_ceutilsapiControlFilter(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RmResource_ceutilsapiControlSerialization_Epilogue(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), pCallContext, pParams); +// ceutilsapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_ceutilsapiIsPartialUnmapSupported(struct CeUtilsApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_ceutilsapiMap(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// ceutilsapiMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_ceutilsapiMapTo(struct CeUtilsApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RmResource_ceutilsapiAccessCallback(struct CeUtilsApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// ceutilsapiUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_ceutilsapiUnmapFrom(struct CeUtilsApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset), pParams); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// ceutilsapiGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_ceutilsapiGetRefCount(struct CeUtilsApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset)); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_CeUtilsApi[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x804u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) ceutilsapiCtrlCmdMemset_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x804u) - /*flags=*/ 0x804u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x500101u, - /*paramSize=*/ sizeof(NV0050_CTRL_MEMSET_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_CeUtilsApi.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "ceutilsapiCtrlCmdMemset" -#endif - }, - { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x804u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) ceutilsapiCtrlCmdMemcopy_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x804u) - /*flags=*/ 0x804u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x500102u, - /*paramSize=*/ sizeof(NV0050_CTRL_MEMCOPY_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_CeUtilsApi.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "ceutilsapiCtrlCmdMemcopy" -#endif - }, - { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x804u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) ceutilsapiCtrlCmdCheckProgress_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x804u) - /*flags=*/ 0x804u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x500103u, - /*paramSize=*/ sizeof(NV0050_CTRL_CHECK_PROGRESS_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_CeUtilsApi.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "ceutilsapiCtrlCmdCheckProgress" -#endif - }, +// ceutilsapiAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_ceutilsapiAddAdditionalDependants(struct RsClient *pClient, struct CeUtilsApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset), pReference); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_CeUtilsApi = { @@ -454,73 +485,106 @@ NV_STATUS __nvoc_ctor_CeUtilsApi(CeUtilsApi *pThis, CALL_CONTEXT * arg_pCallCont return status; } +// Vtable initialization static void __nvoc_init_funcTable_CeUtilsApi_1(CeUtilsApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x804u) + // ceutilsapiCtrlCmdMemset -- exported (id=0x500101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x104u) pThis->__ceutilsapiCtrlCmdMemset__ = &ceutilsapiCtrlCmdMemset_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x804u) + // ceutilsapiCtrlCmdMemcopy -- exported (id=0x500102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x104u) pThis->__ceutilsapiCtrlCmdMemcopy__ = &ceutilsapiCtrlCmdMemcopy_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x804u) + // ceutilsapiCtrlCmdCheckProgress -- exported (id=0x500103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x104u) pThis->__ceutilsapiCtrlCmdCheckProgress__ = &ceutilsapiCtrlCmdCheckProgress_IMPL; #endif - pThis->__ceutilsapiShareCallback__ = &__nvoc_thunk_GpuResource_ceutilsapiShareCallback; + // ceutilsapiControl -- virtual inherited (gpures) base (gpures) + pThis->__ceutilsapiControl__ = &__nvoc_up_thunk_GpuResource_ceutilsapiControl; - pThis->__ceutilsapiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_ceutilsapiCheckMemInterUnmap; + // ceutilsapiMap -- virtual inherited (gpures) base (gpures) + pThis->__ceutilsapiMap__ = &__nvoc_up_thunk_GpuResource_ceutilsapiMap; - pThis->__ceutilsapiMapTo__ = &__nvoc_thunk_RsResource_ceutilsapiMapTo; + // ceutilsapiUnmap -- virtual inherited (gpures) base (gpures) + pThis->__ceutilsapiUnmap__ = &__nvoc_up_thunk_GpuResource_ceutilsapiUnmap; - pThis->__ceutilsapiGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_ceutilsapiGetMapAddrSpace; + // ceutilsapiShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__ceutilsapiShareCallback__ = &__nvoc_up_thunk_GpuResource_ceutilsapiShareCallback; - pThis->__ceutilsapiGetRefCount__ = &__nvoc_thunk_RsResource_ceutilsapiGetRefCount; + // ceutilsapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__ceutilsapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_ceutilsapiGetRegBaseOffsetAndSize; - pThis->__ceutilsapiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_ceutilsapiAddAdditionalDependants; + // ceutilsapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__ceutilsapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_ceutilsapiGetMapAddrSpace; - pThis->__ceutilsapiControl_Prologue__ = &__nvoc_thunk_RmResource_ceutilsapiControl_Prologue; + // ceutilsapiInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__ceutilsapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_ceutilsapiInternalControlForward; - pThis->__ceutilsapiGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_ceutilsapiGetRegBaseOffsetAndSize; + // ceutilsapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__ceutilsapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_ceutilsapiGetInternalObjectHandle; - pThis->__ceutilsapiInternalControlForward__ = &__nvoc_thunk_GpuResource_ceutilsapiInternalControlForward; + // ceutilsapiAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__ceutilsapiAccessCallback__ = &__nvoc_up_thunk_RmResource_ceutilsapiAccessCallback; - pThis->__ceutilsapiUnmapFrom__ = &__nvoc_thunk_RsResource_ceutilsapiUnmapFrom; + // ceutilsapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__ceutilsapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_ceutilsapiGetMemInterMapParams; - pThis->__ceutilsapiControl_Epilogue__ = &__nvoc_thunk_RmResource_ceutilsapiControl_Epilogue; + // ceutilsapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__ceutilsapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_ceutilsapiCheckMemInterUnmap; - pThis->__ceutilsapiGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_ceutilsapiGetInternalObjectHandle; + // ceutilsapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__ceutilsapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_ceutilsapiGetMemoryMappingDescriptor; - pThis->__ceutilsapiControl__ = &__nvoc_thunk_GpuResource_ceutilsapiControl; + // ceutilsapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__ceutilsapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_ceutilsapiControlSerialization_Prologue; - pThis->__ceutilsapiUnmap__ = &__nvoc_thunk_GpuResource_ceutilsapiUnmap; + // ceutilsapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__ceutilsapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_ceutilsapiControlSerialization_Epilogue; - pThis->__ceutilsapiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_ceutilsapiGetMemInterMapParams; + // ceutilsapiControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__ceutilsapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_ceutilsapiControl_Prologue; - pThis->__ceutilsapiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_ceutilsapiGetMemoryMappingDescriptor; + // ceutilsapiControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__ceutilsapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_ceutilsapiControl_Epilogue; - pThis->__ceutilsapiControlFilter__ = &__nvoc_thunk_RsResource_ceutilsapiControlFilter; + // ceutilsapiCanCopy -- virtual inherited (res) base (gpures) + pThis->__ceutilsapiCanCopy__ = &__nvoc_up_thunk_RsResource_ceutilsapiCanCopy; - pThis->__ceutilsapiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_ceutilsapiControlSerialization_Prologue; + // ceutilsapiIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__ceutilsapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_ceutilsapiIsDuplicate; - pThis->__ceutilsapiCanCopy__ = &__nvoc_thunk_RsResource_ceutilsapiCanCopy; + // ceutilsapiPreDestruct -- virtual inherited (res) base (gpures) + pThis->__ceutilsapiPreDestruct__ = &__nvoc_up_thunk_RsResource_ceutilsapiPreDestruct; - pThis->__ceutilsapiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_ceutilsapiIsPartialUnmapSupported; + // ceutilsapiControlFilter -- virtual inherited (res) base (gpures) + pThis->__ceutilsapiControlFilter__ = &__nvoc_up_thunk_RsResource_ceutilsapiControlFilter; - pThis->__ceutilsapiPreDestruct__ = &__nvoc_thunk_RsResource_ceutilsapiPreDestruct; + // ceutilsapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__ceutilsapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_ceutilsapiIsPartialUnmapSupported; - pThis->__ceutilsapiIsDuplicate__ = &__nvoc_thunk_RsResource_ceutilsapiIsDuplicate; + // ceutilsapiMapTo -- virtual inherited (res) base (gpures) + pThis->__ceutilsapiMapTo__ = &__nvoc_up_thunk_RsResource_ceutilsapiMapTo; - pThis->__ceutilsapiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_ceutilsapiControlSerialization_Epilogue; + // ceutilsapiUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__ceutilsapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_ceutilsapiUnmapFrom; - pThis->__ceutilsapiMap__ = &__nvoc_thunk_GpuResource_ceutilsapiMap; + // ceutilsapiGetRefCount -- virtual inherited (res) base (gpures) + pThis->__ceutilsapiGetRefCount__ = &__nvoc_up_thunk_RsResource_ceutilsapiGetRefCount; - pThis->__ceutilsapiAccessCallback__ = &__nvoc_thunk_RmResource_ceutilsapiAccessCallback; -} + // ceutilsapiAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__ceutilsapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_ceutilsapiAddAdditionalDependants; +} // End __nvoc_init_funcTable_CeUtilsApi_1 with approximately 28 basic block(s). + +// Initialize vtable(s) for 28 virtual method(s). void __nvoc_init_funcTable_CeUtilsApi(CeUtilsApi *pThis) { + + // Initialize vtable(s) with 28 per-object function pointer(s). __nvoc_init_funcTable_CeUtilsApi_1(pThis); } diff --git a/src/nvidia/generated/g_ce_utils_nvoc.h b/src/nvidia/generated/g_ce_utils_nvoc.h index 6c30aa9b38..cc33a182e1 100644 --- a/src/nvidia/generated/g_ce_utils_nvoc.h +++ b/src/nvidia/generated/g_ce_utils_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_CE_UTILS_NVOC_H_ #define _G_CE_UTILS_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_ce_utils_nvoc.h" #ifndef CE_UTILS_H @@ -59,14 +67,9 @@ typedef struct NvU64 length; NvU64 flags; NvU64 submittedWorkId; // Payload to poll for async completion - - NvBool bSecureCopy; // The copy encrypts/decrypts when copying to/from unprotected memory - NvBool bEncrypt; // Toggle encrypt/decrypt - NvU64 authTagAddr; // encryption authTag address. Same aperture as unencrypted operand assumed. 16 byte aligned - NvU64 encryptIvAddr; // IV value that was used for ecryption, requirements are the same as for authTagAddr. Required - } CEUTILS_MEMCOPY_PARAMS; + struct KernelChannel; #ifndef __NVOC_CLASS_KernelChannel_TYPEDEF__ @@ -90,11 +93,20 @@ typedef struct KernelChannel KernelChannel; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct CeUtils { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct CeUtils *__nvoc_pbase_CeUtils; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct CeUtils *__nvoc_pbase_CeUtils; // ceutils + + // Data members NvHandle hClient; OBJCHANNEL *pChannel; struct OBJGPU *pGpu; @@ -115,6 +127,7 @@ typedef struct CeUtils CeUtils; #define __nvoc_class_id_CeUtils 0x8b8bae #endif /* __nvoc_class_id_CeUtils */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_CeUtils; #define __staticCast_CeUtils(pThis) \ @@ -127,13 +140,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_CeUtils; ((CeUtils*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(CeUtils))) #endif //__nvoc_ce_utils_h_disabled - NV_STATUS __nvoc_objCreateDynamic_CeUtils(CeUtils**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_CeUtils(CeUtils**, Dynamic*, NvU32, struct OBJGPU * arg_pGpu, KERNEL_MIG_GPU_INSTANCE * arg_pKernelMIGGPUInstance, NV0050_ALLOCATION_PARAMETERS * arg_pAllocParams); #define __objCreate_CeUtils(ppNewObj, pParent, createFlags, arg_pGpu, arg_pKernelMIGGPUInstance, arg_pAllocParams) \ __nvoc_objCreate_CeUtils((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pGpu, arg_pKernelMIGGPUInstance, arg_pAllocParams) + +// Wrapper macros + +// Dispatch functions NV_STATUS ceutilsConstruct_IMPL(struct CeUtils *arg_pCeUtils, struct OBJGPU *arg_pGpu, KERNEL_MIG_GPU_INSTANCE *arg_pKernelMIGGPUInstance, NV0050_ALLOCATION_PARAMETERS *arg_pAllocParams); #define __nvoc_ceutilsConstruct(arg_pCeUtils, arg_pGpu, arg_pKernelMIGGPUInstance, arg_pAllocParams) ceutilsConstruct_IMPL(arg_pCeUtils, arg_pGpu, arg_pKernelMIGGPUInstance, arg_pAllocParams) @@ -197,43 +213,54 @@ static inline void ceutilsServiceInterrupts(struct CeUtils *pCeUtils) { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct CeUtilsApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct CeUtilsApi *__nvoc_pbase_CeUtilsApi; - NV_STATUS (*__ceutilsapiCtrlCmdMemset__)(struct CeUtilsApi *, NV0050_CTRL_MEMSET_PARAMS *); - NV_STATUS (*__ceutilsapiCtrlCmdMemcopy__)(struct CeUtilsApi *, NV0050_CTRL_MEMCOPY_PARAMS *); - NV_STATUS (*__ceutilsapiCtrlCmdCheckProgress__)(struct CeUtilsApi *, NV0050_CTRL_CHECK_PROGRESS_PARAMS *); - NvBool (*__ceutilsapiShareCallback__)(struct CeUtilsApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__ceutilsapiCheckMemInterUnmap__)(struct CeUtilsApi *, NvBool); - NV_STATUS (*__ceutilsapiMapTo__)(struct CeUtilsApi *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__ceutilsapiGetMapAddrSpace__)(struct CeUtilsApi *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__ceutilsapiGetRefCount__)(struct CeUtilsApi *); - void (*__ceutilsapiAddAdditionalDependants__)(struct RsClient *, struct CeUtilsApi *, RsResourceRef *); - NV_STATUS (*__ceutilsapiControl_Prologue__)(struct CeUtilsApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__ceutilsapiGetRegBaseOffsetAndSize__)(struct CeUtilsApi *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__ceutilsapiInternalControlForward__)(struct CeUtilsApi *, NvU32, void *, NvU32); - NV_STATUS (*__ceutilsapiUnmapFrom__)(struct CeUtilsApi *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__ceutilsapiControl_Epilogue__)(struct CeUtilsApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__ceutilsapiGetInternalObjectHandle__)(struct CeUtilsApi *); - NV_STATUS (*__ceutilsapiControl__)(struct CeUtilsApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__ceutilsapiUnmap__)(struct CeUtilsApi *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__ceutilsapiGetMemInterMapParams__)(struct CeUtilsApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__ceutilsapiGetMemoryMappingDescriptor__)(struct CeUtilsApi *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__ceutilsapiControlFilter__)(struct CeUtilsApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__ceutilsapiControlSerialization_Prologue__)(struct CeUtilsApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__ceutilsapiCanCopy__)(struct CeUtilsApi *); - NvBool (*__ceutilsapiIsPartialUnmapSupported__)(struct CeUtilsApi *); - void (*__ceutilsapiPreDestruct__)(struct CeUtilsApi *); - NV_STATUS (*__ceutilsapiIsDuplicate__)(struct CeUtilsApi *, NvHandle, NvBool *); - void (*__ceutilsapiControlSerialization_Epilogue__)(struct CeUtilsApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__ceutilsapiMap__)(struct CeUtilsApi *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__ceutilsapiAccessCallback__)(struct CeUtilsApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct CeUtilsApi *__nvoc_pbase_CeUtilsApi; // ceutilsapi + + // Vtable with 28 per-object function pointers + NV_STATUS (*__ceutilsapiCtrlCmdMemset__)(struct CeUtilsApi * /*this*/, NV0050_CTRL_MEMSET_PARAMS *); // exported (id=0x500101) + NV_STATUS (*__ceutilsapiCtrlCmdMemcopy__)(struct CeUtilsApi * /*this*/, NV0050_CTRL_MEMCOPY_PARAMS *); // exported (id=0x500102) + NV_STATUS (*__ceutilsapiCtrlCmdCheckProgress__)(struct CeUtilsApi * /*this*/, NV0050_CTRL_CHECK_PROGRESS_PARAMS *); // exported (id=0x500103) + NV_STATUS (*__ceutilsapiControl__)(struct CeUtilsApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__ceutilsapiMap__)(struct CeUtilsApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__ceutilsapiUnmap__)(struct CeUtilsApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__ceutilsapiShareCallback__)(struct CeUtilsApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__ceutilsapiGetRegBaseOffsetAndSize__)(struct CeUtilsApi * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__ceutilsapiGetMapAddrSpace__)(struct CeUtilsApi * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__ceutilsapiInternalControlForward__)(struct CeUtilsApi * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__ceutilsapiGetInternalObjectHandle__)(struct CeUtilsApi * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__ceutilsapiAccessCallback__)(struct CeUtilsApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__ceutilsapiGetMemInterMapParams__)(struct CeUtilsApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__ceutilsapiCheckMemInterUnmap__)(struct CeUtilsApi * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__ceutilsapiGetMemoryMappingDescriptor__)(struct CeUtilsApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__ceutilsapiControlSerialization_Prologue__)(struct CeUtilsApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__ceutilsapiControlSerialization_Epilogue__)(struct CeUtilsApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__ceutilsapiControl_Prologue__)(struct CeUtilsApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__ceutilsapiControl_Epilogue__)(struct CeUtilsApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__ceutilsapiCanCopy__)(struct CeUtilsApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__ceutilsapiIsDuplicate__)(struct CeUtilsApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__ceutilsapiPreDestruct__)(struct CeUtilsApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__ceutilsapiControlFilter__)(struct CeUtilsApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__ceutilsapiIsPartialUnmapSupported__)(struct CeUtilsApi * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__ceutilsapiMapTo__)(struct CeUtilsApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__ceutilsapiUnmapFrom__)(struct CeUtilsApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__ceutilsapiGetRefCount__)(struct CeUtilsApi * /*this*/); // virtual inherited (res) base (gpures) + void (*__ceutilsapiAddAdditionalDependants__)(struct RsClient *, struct CeUtilsApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members struct CeUtils *pCeUtils; }; @@ -246,6 +273,7 @@ typedef struct CeUtilsApi CeUtilsApi; #define __nvoc_class_id_CeUtilsApi 0x2eb528 #endif /* __nvoc_class_id_CeUtilsApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_CeUtilsApi; #define __staticCast_CeUtilsApi(pThis) \ @@ -258,159 +286,190 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_CeUtilsApi; ((CeUtilsApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(CeUtilsApi))) #endif //__nvoc_ce_utils_h_disabled - NV_STATUS __nvoc_objCreateDynamic_CeUtilsApi(CeUtilsApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_CeUtilsApi(CeUtilsApi**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_CeUtilsApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_CeUtilsApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define ceutilsapiCtrlCmdMemset_FNPTR(pCeUtilsApi) pCeUtilsApi->__ceutilsapiCtrlCmdMemset__ #define ceutilsapiCtrlCmdMemset(pCeUtilsApi, pParams) ceutilsapiCtrlCmdMemset_DISPATCH(pCeUtilsApi, pParams) +#define ceutilsapiCtrlCmdMemcopy_FNPTR(pCeUtilsApi) pCeUtilsApi->__ceutilsapiCtrlCmdMemcopy__ #define ceutilsapiCtrlCmdMemcopy(pCeUtilsApi, pParams) ceutilsapiCtrlCmdMemcopy_DISPATCH(pCeUtilsApi, pParams) +#define ceutilsapiCtrlCmdCheckProgress_FNPTR(pCeUtilsApi) pCeUtilsApi->__ceutilsapiCtrlCmdCheckProgress__ #define ceutilsapiCtrlCmdCheckProgress(pCeUtilsApi, pParams) ceutilsapiCtrlCmdCheckProgress_DISPATCH(pCeUtilsApi, pParams) +#define ceutilsapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define ceutilsapiControl(pGpuResource, pCallContext, pParams) ceutilsapiControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define ceutilsapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define ceutilsapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) ceutilsapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define ceutilsapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define ceutilsapiUnmap(pGpuResource, pCallContext, pCpuMapping) ceutilsapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define ceutilsapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define ceutilsapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) ceutilsapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define ceutilsapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) ceutilsapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define ceutilsapiMapTo(pResource, pParams) ceutilsapiMapTo_DISPATCH(pResource, pParams) -#define ceutilsapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) ceutilsapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define ceutilsapiGetRefCount(pResource) ceutilsapiGetRefCount_DISPATCH(pResource) -#define ceutilsapiAddAdditionalDependants(pClient, pResource, pReference) ceutilsapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define ceutilsapiControl_Prologue(pResource, pCallContext, pParams) ceutilsapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define ceutilsapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define ceutilsapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) ceutilsapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define ceutilsapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define ceutilsapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) ceutilsapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define ceutilsapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define ceutilsapiInternalControlForward(pGpuResource, command, pParams, size) ceutilsapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define ceutilsapiUnmapFrom(pResource, pParams) ceutilsapiUnmapFrom_DISPATCH(pResource, pParams) -#define ceutilsapiControl_Epilogue(pResource, pCallContext, pParams) ceutilsapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define ceutilsapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define ceutilsapiGetInternalObjectHandle(pGpuResource) ceutilsapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define ceutilsapiControl(pGpuResource, pCallContext, pParams) ceutilsapiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define ceutilsapiUnmap(pGpuResource, pCallContext, pCpuMapping) ceutilsapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define ceutilsapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define ceutilsapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) ceutilsapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define ceutilsapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define ceutilsapiGetMemInterMapParams(pRmResource, pParams) ceutilsapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define ceutilsapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define ceutilsapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) ceutilsapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define ceutilsapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define ceutilsapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) ceutilsapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define ceutilsapiControlFilter(pResource, pCallContext, pParams) ceutilsapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define ceutilsapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define ceutilsapiControlSerialization_Prologue(pResource, pCallContext, pParams) ceutilsapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define ceutilsapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define ceutilsapiControlSerialization_Epilogue(pResource, pCallContext, pParams) ceutilsapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define ceutilsapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define ceutilsapiControl_Prologue(pResource, pCallContext, pParams) ceutilsapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define ceutilsapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define ceutilsapiControl_Epilogue(pResource, pCallContext, pParams) ceutilsapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define ceutilsapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define ceutilsapiCanCopy(pResource) ceutilsapiCanCopy_DISPATCH(pResource) -#define ceutilsapiIsPartialUnmapSupported(pResource) ceutilsapiIsPartialUnmapSupported_DISPATCH(pResource) -#define ceutilsapiPreDestruct(pResource) ceutilsapiPreDestruct_DISPATCH(pResource) +#define ceutilsapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define ceutilsapiIsDuplicate(pResource, hMemory, pDuplicate) ceutilsapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define ceutilsapiControlSerialization_Epilogue(pResource, pCallContext, pParams) ceutilsapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define ceutilsapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) ceutilsapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define ceutilsapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) ceutilsapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS ceutilsapiCtrlCmdMemset_IMPL(struct CeUtilsApi *pCeUtilsApi, NV0050_CTRL_MEMSET_PARAMS *pParams); +#define ceutilsapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define ceutilsapiPreDestruct(pResource) ceutilsapiPreDestruct_DISPATCH(pResource) +#define ceutilsapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define ceutilsapiControlFilter(pResource, pCallContext, pParams) ceutilsapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define ceutilsapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define ceutilsapiIsPartialUnmapSupported(pResource) ceutilsapiIsPartialUnmapSupported_DISPATCH(pResource) +#define ceutilsapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define ceutilsapiMapTo(pResource, pParams) ceutilsapiMapTo_DISPATCH(pResource, pParams) +#define ceutilsapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define ceutilsapiUnmapFrom(pResource, pParams) ceutilsapiUnmapFrom_DISPATCH(pResource, pParams) +#define ceutilsapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define ceutilsapiGetRefCount(pResource) ceutilsapiGetRefCount_DISPATCH(pResource) +#define ceutilsapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define ceutilsapiAddAdditionalDependants(pClient, pResource, pReference) ceutilsapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS ceutilsapiCtrlCmdMemset_DISPATCH(struct CeUtilsApi *pCeUtilsApi, NV0050_CTRL_MEMSET_PARAMS *pParams) { return pCeUtilsApi->__ceutilsapiCtrlCmdMemset__(pCeUtilsApi, pParams); } -NV_STATUS ceutilsapiCtrlCmdMemcopy_IMPL(struct CeUtilsApi *pCeUtilsApi, NV0050_CTRL_MEMCOPY_PARAMS *pParams); - static inline NV_STATUS ceutilsapiCtrlCmdMemcopy_DISPATCH(struct CeUtilsApi *pCeUtilsApi, NV0050_CTRL_MEMCOPY_PARAMS *pParams) { return pCeUtilsApi->__ceutilsapiCtrlCmdMemcopy__(pCeUtilsApi, pParams); } -NV_STATUS ceutilsapiCtrlCmdCheckProgress_IMPL(struct CeUtilsApi *pCeUtilsApi, NV0050_CTRL_CHECK_PROGRESS_PARAMS *pParams); - static inline NV_STATUS ceutilsapiCtrlCmdCheckProgress_DISPATCH(struct CeUtilsApi *pCeUtilsApi, NV0050_CTRL_CHECK_PROGRESS_PARAMS *pParams) { return pCeUtilsApi->__ceutilsapiCtrlCmdCheckProgress__(pCeUtilsApi, pParams); } -static inline NvBool ceutilsapiShareCallback_DISPATCH(struct CeUtilsApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__ceutilsapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS ceutilsapiCheckMemInterUnmap_DISPATCH(struct CeUtilsApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__ceutilsapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); -} - -static inline NV_STATUS ceutilsapiMapTo_DISPATCH(struct CeUtilsApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__ceutilsapiMapTo__(pResource, pParams); -} - -static inline NV_STATUS ceutilsapiGetMapAddrSpace_DISPATCH(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__ceutilsapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +static inline NV_STATUS ceutilsapiControl_DISPATCH(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__ceutilsapiControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 ceutilsapiGetRefCount_DISPATCH(struct CeUtilsApi *pResource) { - return pResource->__ceutilsapiGetRefCount__(pResource); +static inline NV_STATUS ceutilsapiMap_DISPATCH(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__ceutilsapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void ceutilsapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct CeUtilsApi *pResource, RsResourceRef *pReference) { - pResource->__ceutilsapiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS ceutilsapiUnmap_DISPATCH(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__ceutilsapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS ceutilsapiControl_Prologue_DISPATCH(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ceutilsapiControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool ceutilsapiShareCallback_DISPATCH(struct CeUtilsApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__ceutilsapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS ceutilsapiGetRegBaseOffsetAndSize_DISPATCH(struct CeUtilsApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__ceutilsapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS ceutilsapiInternalControlForward_DISPATCH(struct CeUtilsApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__ceutilsapiInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS ceutilsapiUnmapFrom_DISPATCH(struct CeUtilsApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__ceutilsapiUnmapFrom__(pResource, pParams); +static inline NV_STATUS ceutilsapiGetMapAddrSpace_DISPATCH(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__ceutilsapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void ceutilsapiControl_Epilogue_DISPATCH(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__ceutilsapiControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS ceutilsapiInternalControlForward_DISPATCH(struct CeUtilsApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__ceutilsapiInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle ceutilsapiGetInternalObjectHandle_DISPATCH(struct CeUtilsApi *pGpuResource) { return pGpuResource->__ceutilsapiGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS ceutilsapiControl_DISPATCH(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__ceutilsapiControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS ceutilsapiUnmap_DISPATCH(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__ceutilsapiUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool ceutilsapiAccessCallback_DISPATCH(struct CeUtilsApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__ceutilsapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS ceutilsapiGetMemInterMapParams_DISPATCH(struct CeUtilsApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__ceutilsapiGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS ceutilsapiGetMemoryMappingDescriptor_DISPATCH(struct CeUtilsApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__ceutilsapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS ceutilsapiCheckMemInterUnmap_DISPATCH(struct CeUtilsApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__ceutilsapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS ceutilsapiControlFilter_DISPATCH(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ceutilsapiControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS ceutilsapiGetMemoryMappingDescriptor_DISPATCH(struct CeUtilsApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__ceutilsapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS ceutilsapiControlSerialization_Prologue_DISPATCH(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__ceutilsapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void ceutilsapiControlSerialization_Epilogue_DISPATCH(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__ceutilsapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS ceutilsapiControl_Prologue_DISPATCH(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__ceutilsapiControl_Prologue__(pResource, pCallContext, pParams); +} + +static inline void ceutilsapiControl_Epilogue_DISPATCH(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__ceutilsapiControl_Epilogue__(pResource, pCallContext, pParams); +} + static inline NvBool ceutilsapiCanCopy_DISPATCH(struct CeUtilsApi *pResource) { return pResource->__ceutilsapiCanCopy__(pResource); } -static inline NvBool ceutilsapiIsPartialUnmapSupported_DISPATCH(struct CeUtilsApi *pResource) { - return pResource->__ceutilsapiIsPartialUnmapSupported__(pResource); +static inline NV_STATUS ceutilsapiIsDuplicate_DISPATCH(struct CeUtilsApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__ceutilsapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void ceutilsapiPreDestruct_DISPATCH(struct CeUtilsApi *pResource) { pResource->__ceutilsapiPreDestruct__(pResource); } -static inline NV_STATUS ceutilsapiIsDuplicate_DISPATCH(struct CeUtilsApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__ceutilsapiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS ceutilsapiControlFilter_DISPATCH(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__ceutilsapiControlFilter__(pResource, pCallContext, pParams); } -static inline void ceutilsapiControlSerialization_Epilogue_DISPATCH(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__ceutilsapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool ceutilsapiIsPartialUnmapSupported_DISPATCH(struct CeUtilsApi *pResource) { + return pResource->__ceutilsapiIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS ceutilsapiMap_DISPATCH(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__ceutilsapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS ceutilsapiMapTo_DISPATCH(struct CeUtilsApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__ceutilsapiMapTo__(pResource, pParams); } -static inline NvBool ceutilsapiAccessCallback_DISPATCH(struct CeUtilsApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__ceutilsapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS ceutilsapiUnmapFrom_DISPATCH(struct CeUtilsApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__ceutilsapiUnmapFrom__(pResource, pParams); } +static inline NvU32 ceutilsapiGetRefCount_DISPATCH(struct CeUtilsApi *pResource) { + return pResource->__ceutilsapiGetRefCount__(pResource); +} + +static inline void ceutilsapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct CeUtilsApi *pResource, RsResourceRef *pReference) { + pResource->__ceutilsapiAddAdditionalDependants__(pClient, pResource, pReference); +} + +NV_STATUS ceutilsapiCtrlCmdMemset_IMPL(struct CeUtilsApi *pCeUtilsApi, NV0050_CTRL_MEMSET_PARAMS *pParams); + +NV_STATUS ceutilsapiCtrlCmdMemcopy_IMPL(struct CeUtilsApi *pCeUtilsApi, NV0050_CTRL_MEMCOPY_PARAMS *pParams); + +NV_STATUS ceutilsapiCtrlCmdCheckProgress_IMPL(struct CeUtilsApi *pCeUtilsApi, NV0050_CTRL_CHECK_PROGRESS_PARAMS *pParams); + NV_STATUS ceutilsapiConstruct_IMPL(struct CeUtilsApi *arg_pCeUtilsApi, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_ceutilsapiConstruct(arg_pCeUtilsApi, arg_pCallContext, arg_pParams) ceutilsapiConstruct_IMPL(arg_pCeUtilsApi, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_channel_descendant_nvoc.c b/src/nvidia/generated/g_channel_descendant_nvoc.c index 8f942e7ef9..68ede2bd7e 100644 --- a/src/nvidia/generated/g_channel_descendant_nvoc.c +++ b/src/nvidia/generated/g_channel_descendant_nvoc.c @@ -111,126 +111,162 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_ChannelDescendant = /*pExportInfo=*/ &__nvoc_export_info_ChannelDescendant }; -static NV_STATUS __nvoc_thunk_ChannelDescendant_rmresCheckMemInterUnmap(struct RmResource *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) - __nvoc_rtti_ChannelDescendant_RmResource.offset), bSubdeviceHandleProvided); +// 1 down-thunk(s) defined to bridge methods in ChannelDescendant from superclasses + +// chandesCheckMemInterUnmap: virtual override (rmres) base (gpures) +static NV_STATUS __nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap(struct RmResource *pChannelDescendant, NvBool bSubdeviceHandleProvided) { + return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) - __nvoc_rtti_ChannelDescendant_RmResource.offset), bSubdeviceHandleProvided); } -static NvBool __nvoc_thunk_GpuResource_chandesShareCallback(struct ChannelDescendant *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); + +// 29 up-thunk(s) defined to bridge methods in ChannelDescendant to superclasses + +// chandesControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_chandesControl(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Notifier_chandesGetOrAllocNotifShare(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_ChannelDescendant_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +// chandesMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_chandesMap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_chandesMapTo(struct ChannelDescendant *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset), pParams); +// chandesUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_chandesUnmap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_GpuResource_chandesGetMapAddrSpace(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// chandesShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_chandesShareCallback(struct ChannelDescendant *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static void __nvoc_thunk_Notifier_chandesSetNotificationShare(struct ChannelDescendant *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_ChannelDescendant_Notifier.offset), pNotifShare); +// chandesGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize(struct ChannelDescendant *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), pGpu, pOffset, pSize); } -static NvU32 __nvoc_thunk_RsResource_chandesGetRefCount(struct ChannelDescendant *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset)); +// chandesGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static void __nvoc_thunk_RsResource_chandesAddAdditionalDependants(struct RsClient *pClient, struct ChannelDescendant *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset), pReference); +// chandesInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_chandesInternalControlForward(struct ChannelDescendant *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_RmResource_chandesControl_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), pCallContext, pParams); +// chandesGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle(struct ChannelDescendant *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_chandesGetRegBaseOffsetAndSize(struct ChannelDescendant *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), pGpu, pOffset, pSize); +// chandesAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_chandesAccessCallback(struct ChannelDescendant *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_GpuResource_chandesInternalControlForward(struct ChannelDescendant *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), command, pParams, size); +// chandesGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemInterMapParams(struct ChannelDescendant *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_chandesUnmapFrom(struct ChannelDescendant *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset), pParams); +// chandesGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor(struct ChannelDescendant *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), ppMemDesc); } -static void __nvoc_thunk_RmResource_chandesControl_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), pCallContext, pParams); +// chandesControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), pCallContext, pParams); } -static NvHandle __nvoc_thunk_GpuResource_chandesGetInternalObjectHandle(struct ChannelDescendant *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset)); +// chandesControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_chandesControl(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), pCallContext, pParams); +// chandesControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_chandesControl_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_chandesUnmap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), pCallContext, pCpuMapping); +// chandesControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_chandesControl_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_chandesGetMemInterMapParams(struct ChannelDescendant *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), pParams); +// chandesCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_chandesCanCopy(struct ChannelDescendant *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RmResource_chandesGetMemoryMappingDescriptor(struct ChannelDescendant *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), ppMemDesc); +// chandesIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_chandesIsDuplicate(struct ChannelDescendant *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_chandesControlFilter(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset), pCallContext, pParams); +// chandesPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_chandesPreDestruct(struct ChannelDescendant *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_chandesUnregisterEvent(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_ChannelDescendant_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// chandesControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_chandesControlFilter(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_chandesControlSerialization_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), pCallContext, pParams); +// chandesIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported(struct ChannelDescendant *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_chandesCanCopy(struct ChannelDescendant *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset)); +// chandesMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_chandesMapTo(struct ChannelDescendant *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RsResource_chandesIsPartialUnmapSupported(struct ChannelDescendant *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset)); +// chandesUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_chandesUnmapFrom(struct ChannelDescendant *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset), pParams); } -static void __nvoc_thunk_RsResource_chandesPreDestruct(struct ChannelDescendant *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset)); +// chandesGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_chandesGetRefCount(struct ChannelDescendant *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_chandesIsDuplicate(struct ChannelDescendant *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset), hMemory, pDuplicate); +// chandesAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_chandesAddAdditionalDependants(struct RsClient *pClient, struct ChannelDescendant *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset), pReference); } -static void __nvoc_thunk_RmResource_chandesControlSerialization_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), pCallContext, pParams); +// chandesGetNotificationListPtr: virtual inherited (notify) base (notify) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_chandesGetNotificationListPtr(struct ChannelDescendant *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_ChannelDescendant_Notifier.offset)); } -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_chandesGetNotificationListPtr(struct ChannelDescendant *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_ChannelDescendant_Notifier.offset)); +// chandesGetNotificationShare: virtual inherited (notify) base (notify) +static struct NotifShare * __nvoc_up_thunk_Notifier_chandesGetNotificationShare(struct ChannelDescendant *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_ChannelDescendant_Notifier.offset)); } -static struct NotifShare *__nvoc_thunk_Notifier_chandesGetNotificationShare(struct ChannelDescendant *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_ChannelDescendant_Notifier.offset)); +// chandesSetNotificationShare: virtual inherited (notify) base (notify) +static void __nvoc_up_thunk_Notifier_chandesSetNotificationShare(struct ChannelDescendant *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_ChannelDescendant_Notifier.offset), pNotifShare); } -static NV_STATUS __nvoc_thunk_GpuResource_chandesMap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// chandesUnregisterEvent: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_chandesUnregisterEvent(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_ChannelDescendant_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static NvBool __nvoc_thunk_RmResource_chandesAccessCallback(struct ChannelDescendant *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// chandesGetOrAllocNotifShare: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_ChannelDescendant_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_ChannelDescendant = { /*numEntries=*/ 0, @@ -279,6 +315,7 @@ NV_STATUS __nvoc_ctor_ChannelDescendant(ChannelDescendant *pThis, RmHalspecOwner return status; } +// Vtable initialization static void __nvoc_init_funcTable_ChannelDescendant_1(ChannelDescendant *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -287,74 +324,109 @@ static void __nvoc_init_funcTable_ChannelDescendant_1(ChannelDescendant *pThis, PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); + // chandesGetSwMethods -- virtual pThis->__chandesGetSwMethods__ = &chandesGetSwMethods_IMPL; + // chandesIsSwMethodStalling -- virtual pThis->__chandesIsSwMethodStalling__ = &chandesIsSwMethodStalling_IMPL; + // chandesCheckMemInterUnmap -- virtual override (rmres) base (gpures) pThis->__chandesCheckMemInterUnmap__ = &chandesCheckMemInterUnmap_IMPL; + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap; - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_thunk_ChannelDescendant_rmresCheckMemInterUnmap; + // chandesControl -- virtual inherited (gpures) base (gpures) + pThis->__chandesControl__ = &__nvoc_up_thunk_GpuResource_chandesControl; - pThis->__chandesShareCallback__ = &__nvoc_thunk_GpuResource_chandesShareCallback; + // chandesMap -- virtual inherited (gpures) base (gpures) + pThis->__chandesMap__ = &__nvoc_up_thunk_GpuResource_chandesMap; - pThis->__chandesGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_chandesGetOrAllocNotifShare; + // chandesUnmap -- virtual inherited (gpures) base (gpures) + pThis->__chandesUnmap__ = &__nvoc_up_thunk_GpuResource_chandesUnmap; - pThis->__chandesMapTo__ = &__nvoc_thunk_RsResource_chandesMapTo; + // chandesShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__chandesShareCallback__ = &__nvoc_up_thunk_GpuResource_chandesShareCallback; - pThis->__chandesGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_chandesGetMapAddrSpace; + // chandesGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__chandesGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize; - pThis->__chandesSetNotificationShare__ = &__nvoc_thunk_Notifier_chandesSetNotificationShare; + // chandesGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__chandesGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace; - pThis->__chandesGetRefCount__ = &__nvoc_thunk_RsResource_chandesGetRefCount; + // chandesInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__chandesInternalControlForward__ = &__nvoc_up_thunk_GpuResource_chandesInternalControlForward; - pThis->__chandesAddAdditionalDependants__ = &__nvoc_thunk_RsResource_chandesAddAdditionalDependants; + // chandesGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__chandesGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle; - pThis->__chandesControl_Prologue__ = &__nvoc_thunk_RmResource_chandesControl_Prologue; + // chandesAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__chandesAccessCallback__ = &__nvoc_up_thunk_RmResource_chandesAccessCallback; - pThis->__chandesGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_chandesGetRegBaseOffsetAndSize; + // chandesGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__chandesGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_chandesGetMemInterMapParams; - pThis->__chandesInternalControlForward__ = &__nvoc_thunk_GpuResource_chandesInternalControlForward; + // chandesGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__chandesGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor; - pThis->__chandesUnmapFrom__ = &__nvoc_thunk_RsResource_chandesUnmapFrom; + // chandesControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__chandesControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue; - pThis->__chandesControl_Epilogue__ = &__nvoc_thunk_RmResource_chandesControl_Epilogue; + // chandesControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__chandesControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue; - pThis->__chandesGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_chandesGetInternalObjectHandle; + // chandesControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__chandesControl_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControl_Prologue; - pThis->__chandesControl__ = &__nvoc_thunk_GpuResource_chandesControl; + // chandesControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__chandesControl_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControl_Epilogue; - pThis->__chandesUnmap__ = &__nvoc_thunk_GpuResource_chandesUnmap; + // chandesCanCopy -- virtual inherited (res) base (gpures) + pThis->__chandesCanCopy__ = &__nvoc_up_thunk_RsResource_chandesCanCopy; - pThis->__chandesGetMemInterMapParams__ = &__nvoc_thunk_RmResource_chandesGetMemInterMapParams; + // chandesIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__chandesIsDuplicate__ = &__nvoc_up_thunk_RsResource_chandesIsDuplicate; - pThis->__chandesGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_chandesGetMemoryMappingDescriptor; + // chandesPreDestruct -- virtual inherited (res) base (gpures) + pThis->__chandesPreDestruct__ = &__nvoc_up_thunk_RsResource_chandesPreDestruct; - pThis->__chandesControlFilter__ = &__nvoc_thunk_RsResource_chandesControlFilter; + // chandesControlFilter -- virtual inherited (res) base (gpures) + pThis->__chandesControlFilter__ = &__nvoc_up_thunk_RsResource_chandesControlFilter; - pThis->__chandesUnregisterEvent__ = &__nvoc_thunk_Notifier_chandesUnregisterEvent; + // chandesIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__chandesIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported; - pThis->__chandesControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_chandesControlSerialization_Prologue; + // chandesMapTo -- virtual inherited (res) base (gpures) + pThis->__chandesMapTo__ = &__nvoc_up_thunk_RsResource_chandesMapTo; - pThis->__chandesCanCopy__ = &__nvoc_thunk_RsResource_chandesCanCopy; + // chandesUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__chandesUnmapFrom__ = &__nvoc_up_thunk_RsResource_chandesUnmapFrom; - pThis->__chandesIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_chandesIsPartialUnmapSupported; + // chandesGetRefCount -- virtual inherited (res) base (gpures) + pThis->__chandesGetRefCount__ = &__nvoc_up_thunk_RsResource_chandesGetRefCount; - pThis->__chandesPreDestruct__ = &__nvoc_thunk_RsResource_chandesPreDestruct; + // chandesAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__chandesAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_chandesAddAdditionalDependants; - pThis->__chandesIsDuplicate__ = &__nvoc_thunk_RsResource_chandesIsDuplicate; + // chandesGetNotificationListPtr -- virtual inherited (notify) base (notify) + pThis->__chandesGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationListPtr; - pThis->__chandesControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_chandesControlSerialization_Epilogue; + // chandesGetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__chandesGetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationShare; - pThis->__chandesGetNotificationListPtr__ = &__nvoc_thunk_Notifier_chandesGetNotificationListPtr; + // chandesSetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__chandesSetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesSetNotificationShare; - pThis->__chandesGetNotificationShare__ = &__nvoc_thunk_Notifier_chandesGetNotificationShare; + // chandesUnregisterEvent -- virtual inherited (notify) base (notify) + pThis->__chandesUnregisterEvent__ = &__nvoc_up_thunk_Notifier_chandesUnregisterEvent; - pThis->__chandesMap__ = &__nvoc_thunk_GpuResource_chandesMap; + // chandesGetOrAllocNotifShare -- virtual inherited (notify) base (notify) + pThis->__chandesGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_ChannelDescendant_1 with approximately 33 basic block(s). - pThis->__chandesAccessCallback__ = &__nvoc_thunk_RmResource_chandesAccessCallback; -} +// Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_ChannelDescendant(ChannelDescendant *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 32 per-object function pointer(s). __nvoc_init_funcTable_ChannelDescendant_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_channel_descendant_nvoc.h b/src/nvidia/generated/g_channel_descendant_nvoc.h index 6fead0185f..63a5d4f584 100644 --- a/src/nvidia/generated/g_channel_descendant_nvoc.h +++ b/src/nvidia/generated/g_channel_descendant_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_CHANNEL_DESCENDANT_NVOC_H_ #define _G_CHANNEL_DESCENDANT_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_channel_descendant_nvoc.h" #ifndef _CHANNEL_DESCENDANT_H_ @@ -43,6 +51,7 @@ extern "C" { #include "gpu/gpu_resource_desc.h" #include "kernel/gpu/gpu_halspec.h" + struct ChannelDescendant; #ifndef __NVOC_CLASS_ChannelDescendant_TYPEDEF__ @@ -55,6 +64,7 @@ typedef struct ChannelDescendant ChannelDescendant; #endif /* __nvoc_class_id_ChannelDescendant */ + struct ContextDma; #ifndef __NVOC_CLASS_ContextDma_TYPEDEF__ @@ -67,6 +77,7 @@ typedef struct ContextDma ContextDma; #endif /* __nvoc_class_id_ContextDma */ + struct KernelChannel; #ifndef __NVOC_CLASS_KernelChannel_TYPEDEF__ @@ -115,50 +126,61 @@ typedef ENGDESCRIPTOR PARAM_TO_ENGDESC_FUNCTION(OBJGPU *pGpu, NvU32 externalClas #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct ChannelDescendant { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; struct Notifier __nvoc_base_Notifier; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; - NV_STATUS (*__chandesGetSwMethods__)(struct ChannelDescendant *, const METHOD **, NvU32 *); - NvBool (*__chandesIsSwMethodStalling__)(struct ChannelDescendant *, NvU32); - NV_STATUS (*__chandesCheckMemInterUnmap__)(struct ChannelDescendant *, NvBool); - NvBool (*__chandesShareCallback__)(struct ChannelDescendant *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__chandesGetOrAllocNotifShare__)(struct ChannelDescendant *, NvHandle, NvHandle, struct NotifShare **); - NV_STATUS (*__chandesMapTo__)(struct ChannelDescendant *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__chandesGetMapAddrSpace__)(struct ChannelDescendant *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__chandesSetNotificationShare__)(struct ChannelDescendant *, struct NotifShare *); - NvU32 (*__chandesGetRefCount__)(struct ChannelDescendant *); - void (*__chandesAddAdditionalDependants__)(struct RsClient *, struct ChannelDescendant *, RsResourceRef *); - NV_STATUS (*__chandesControl_Prologue__)(struct ChannelDescendant *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__chandesGetRegBaseOffsetAndSize__)(struct ChannelDescendant *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__chandesInternalControlForward__)(struct ChannelDescendant *, NvU32, void *, NvU32); - NV_STATUS (*__chandesUnmapFrom__)(struct ChannelDescendant *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__chandesControl_Epilogue__)(struct ChannelDescendant *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__chandesGetInternalObjectHandle__)(struct ChannelDescendant *); - NV_STATUS (*__chandesControl__)(struct ChannelDescendant *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__chandesUnmap__)(struct ChannelDescendant *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__chandesGetMemInterMapParams__)(struct ChannelDescendant *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__chandesGetMemoryMappingDescriptor__)(struct ChannelDescendant *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__chandesControlFilter__)(struct ChannelDescendant *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__chandesUnregisterEvent__)(struct ChannelDescendant *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__chandesControlSerialization_Prologue__)(struct ChannelDescendant *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__chandesCanCopy__)(struct ChannelDescendant *); - NvBool (*__chandesIsPartialUnmapSupported__)(struct ChannelDescendant *); - void (*__chandesPreDestruct__)(struct ChannelDescendant *); - NV_STATUS (*__chandesIsDuplicate__)(struct ChannelDescendant *, NvHandle, NvBool *); - void (*__chandesControlSerialization_Epilogue__)(struct ChannelDescendant *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__chandesGetNotificationListPtr__)(struct ChannelDescendant *); - struct NotifShare *(*__chandesGetNotificationShare__)(struct ChannelDescendant *); - NV_STATUS (*__chandesMap__)(struct ChannelDescendant *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__chandesAccessCallback__)(struct ChannelDescendant *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct INotifier *__nvoc_pbase_INotifier; // inotify super^2 + struct Notifier *__nvoc_pbase_Notifier; // notify super + struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes + + // Vtable with 32 per-object function pointers + NV_STATUS (*__chandesGetSwMethods__)(struct ChannelDescendant * /*this*/, const METHOD **, NvU32 *); // virtual + NvBool (*__chandesIsSwMethodStalling__)(struct ChannelDescendant * /*this*/, NvU32); // virtual + NV_STATUS (*__chandesCheckMemInterUnmap__)(struct ChannelDescendant * /*this*/, NvBool); // virtual override (rmres) base (gpures) + NV_STATUS (*__chandesControl__)(struct ChannelDescendant * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__chandesMap__)(struct ChannelDescendant * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__chandesUnmap__)(struct ChannelDescendant * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__chandesShareCallback__)(struct ChannelDescendant * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__chandesGetRegBaseOffsetAndSize__)(struct ChannelDescendant * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__chandesGetMapAddrSpace__)(struct ChannelDescendant * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__chandesInternalControlForward__)(struct ChannelDescendant * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__chandesGetInternalObjectHandle__)(struct ChannelDescendant * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__chandesAccessCallback__)(struct ChannelDescendant * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__chandesGetMemInterMapParams__)(struct ChannelDescendant * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__chandesGetMemoryMappingDescriptor__)(struct ChannelDescendant * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__chandesControlSerialization_Prologue__)(struct ChannelDescendant * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__chandesControlSerialization_Epilogue__)(struct ChannelDescendant * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__chandesControl_Prologue__)(struct ChannelDescendant * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__chandesControl_Epilogue__)(struct ChannelDescendant * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__chandesCanCopy__)(struct ChannelDescendant * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__chandesIsDuplicate__)(struct ChannelDescendant * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__chandesPreDestruct__)(struct ChannelDescendant * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__chandesControlFilter__)(struct ChannelDescendant * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__chandesIsPartialUnmapSupported__)(struct ChannelDescendant * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__chandesMapTo__)(struct ChannelDescendant * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__chandesUnmapFrom__)(struct ChannelDescendant * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__chandesGetRefCount__)(struct ChannelDescendant * /*this*/); // virtual inherited (res) base (gpures) + void (*__chandesAddAdditionalDependants__)(struct RsClient *, struct ChannelDescendant * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + PEVENTNOTIFICATION * (*__chandesGetNotificationListPtr__)(struct ChannelDescendant * /*this*/); // virtual inherited (notify) base (notify) + struct NotifShare * (*__chandesGetNotificationShare__)(struct ChannelDescendant * /*this*/); // virtual inherited (notify) base (notify) + void (*__chandesSetNotificationShare__)(struct ChannelDescendant * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) + NV_STATUS (*__chandesUnregisterEvent__)(struct ChannelDescendant * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) + NV_STATUS (*__chandesGetOrAllocNotifShare__)(struct ChannelDescendant * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) + + // Data members struct KernelChannel *pKernelChannel; GPU_RESOURCE_DESC resourceDesc; NvU16 classID; @@ -175,6 +197,7 @@ typedef struct ChannelDescendant ChannelDescendant; #define __nvoc_class_id_ChannelDescendant 0x43d7c4 #endif /* __nvoc_class_id_ChannelDescendant */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_ChannelDescendant; #define __staticCast_ChannelDescendant(pThis) \ @@ -187,209 +210,244 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_ChannelDescendant; ((ChannelDescendant*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(ChannelDescendant))) #endif //__nvoc_channel_descendant_h_disabled - NV_STATUS __nvoc_objCreateDynamic_ChannelDescendant(ChannelDescendant**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_ChannelDescendant(ChannelDescendant**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams, PARAM_TO_ENGDESC_FUNCTION * arg_pParamToEngDescFn); #define __objCreate_ChannelDescendant(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams, arg_pParamToEngDescFn) \ __nvoc_objCreate_ChannelDescendant((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams, arg_pParamToEngDescFn) + +// Wrapper macros +#define chandesGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__chandesGetSwMethods__ #define chandesGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) chandesGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) +#define chandesIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__chandesIsSwMethodStalling__ #define chandesIsSwMethodStalling(pChannelDescendant, hHandle) chandesIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) +#define chandesCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__chandesCheckMemInterUnmap__ #define chandesCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) chandesCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) +#define chandesControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define chandesControl(pGpuResource, pCallContext, pParams) chandesControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define chandesMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define chandesMap(pGpuResource, pCallContext, pParams, pCpuMapping) chandesMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define chandesUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define chandesUnmap(pGpuResource, pCallContext, pCpuMapping) chandesUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define chandesShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define chandesShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) chandesShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define chandesGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) chandesGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -#define chandesMapTo(pResource, pParams) chandesMapTo_DISPATCH(pResource, pParams) -#define chandesGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) chandesGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define chandesSetNotificationShare(pNotifier, pNotifShare) chandesSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define chandesGetRefCount(pResource) chandesGetRefCount_DISPATCH(pResource) -#define chandesAddAdditionalDependants(pClient, pResource, pReference) chandesAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define chandesControl_Prologue(pResource, pCallContext, pParams) chandesControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define chandesGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define chandesGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) chandesGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define chandesGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define chandesGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) chandesGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define chandesInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define chandesInternalControlForward(pGpuResource, command, pParams, size) chandesInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define chandesUnmapFrom(pResource, pParams) chandesUnmapFrom_DISPATCH(pResource, pParams) -#define chandesControl_Epilogue(pResource, pCallContext, pParams) chandesControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define chandesGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define chandesGetInternalObjectHandle(pGpuResource) chandesGetInternalObjectHandle_DISPATCH(pGpuResource) -#define chandesControl(pGpuResource, pCallContext, pParams) chandesControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define chandesUnmap(pGpuResource, pCallContext, pCpuMapping) chandesUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define chandesAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define chandesAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) chandesAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define chandesGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define chandesGetMemInterMapParams(pRmResource, pParams) chandesGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define chandesGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define chandesGetMemoryMappingDescriptor(pRmResource, ppMemDesc) chandesGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define chandesControlFilter(pResource, pCallContext, pParams) chandesControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define chandesUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) chandesUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define chandesControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define chandesControlSerialization_Prologue(pResource, pCallContext, pParams) chandesControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define chandesControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define chandesControlSerialization_Epilogue(pResource, pCallContext, pParams) chandesControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define chandesControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define chandesControl_Prologue(pResource, pCallContext, pParams) chandesControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define chandesControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define chandesControl_Epilogue(pResource, pCallContext, pParams) chandesControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define chandesCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define chandesCanCopy(pResource) chandesCanCopy_DISPATCH(pResource) -#define chandesIsPartialUnmapSupported(pResource) chandesIsPartialUnmapSupported_DISPATCH(pResource) -#define chandesPreDestruct(pResource) chandesPreDestruct_DISPATCH(pResource) +#define chandesIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define chandesIsDuplicate(pResource, hMemory, pDuplicate) chandesIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define chandesControlSerialization_Epilogue(pResource, pCallContext, pParams) chandesControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define chandesPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define chandesPreDestruct(pResource) chandesPreDestruct_DISPATCH(pResource) +#define chandesControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define chandesControlFilter(pResource, pCallContext, pParams) chandesControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define chandesIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define chandesIsPartialUnmapSupported(pResource) chandesIsPartialUnmapSupported_DISPATCH(pResource) +#define chandesMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define chandesMapTo(pResource, pParams) chandesMapTo_DISPATCH(pResource, pParams) +#define chandesUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define chandesUnmapFrom(pResource, pParams) chandesUnmapFrom_DISPATCH(pResource, pParams) +#define chandesGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define chandesGetRefCount(pResource) chandesGetRefCount_DISPATCH(pResource) +#define chandesAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define chandesAddAdditionalDependants(pClient, pResource, pReference) chandesAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define chandesGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define chandesGetNotificationListPtr(pNotifier) chandesGetNotificationListPtr_DISPATCH(pNotifier) +#define chandesGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ #define chandesGetNotificationShare(pNotifier) chandesGetNotificationShare_DISPATCH(pNotifier) -#define chandesMap(pGpuResource, pCallContext, pParams, pCpuMapping) chandesMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define chandesAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) chandesAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -static inline void chandesIsolateOnDestruct_b3696a(struct ChannelDescendant *pChannelDescendant) { - return; -} - - -#ifdef __nvoc_channel_descendant_h_disabled -static inline void chandesIsolateOnDestruct(struct ChannelDescendant *pChannelDescendant) { - NV_ASSERT_FAILED_PRECOMP("ChannelDescendant was disabled!"); -} -#else //__nvoc_channel_descendant_h_disabled -#define chandesIsolateOnDestruct(pChannelDescendant) chandesIsolateOnDestruct_b3696a(pChannelDescendant) -#endif //__nvoc_channel_descendant_h_disabled - -#define chandesIsolateOnDestruct_HAL(pChannelDescendant) chandesIsolateOnDestruct(pChannelDescendant) - -static inline void chandesDestroy_b3696a(struct ChannelDescendant *pChannelDescendant) { - return; -} - - -#ifdef __nvoc_channel_descendant_h_disabled -static inline void chandesDestroy(struct ChannelDescendant *pChannelDescendant) { - NV_ASSERT_FAILED_PRECOMP("ChannelDescendant was disabled!"); -} -#else //__nvoc_channel_descendant_h_disabled -#define chandesDestroy(pChannelDescendant) chandesDestroy_b3696a(pChannelDescendant) -#endif //__nvoc_channel_descendant_h_disabled - -#define chandesDestroy_HAL(pChannelDescendant) chandesDestroy(pChannelDescendant) - -NV_STATUS chandesGetSwMethods_IMPL(struct ChannelDescendant *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods); +#define chandesSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define chandesSetNotificationShare(pNotifier, pNotifShare) chandesSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define chandesUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define chandesUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) chandesUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define chandesGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define chandesGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) chandesGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) +// Dispatch functions static inline NV_STATUS chandesGetSwMethods_DISPATCH(struct ChannelDescendant *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { return pChannelDescendant->__chandesGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); } -NvBool chandesIsSwMethodStalling_IMPL(struct ChannelDescendant *pChannelDescendant, NvU32 hHandle); - static inline NvBool chandesIsSwMethodStalling_DISPATCH(struct ChannelDescendant *pChannelDescendant, NvU32 hHandle) { return pChannelDescendant->__chandesIsSwMethodStalling__(pChannelDescendant, hHandle); } -NV_STATUS chandesCheckMemInterUnmap_IMPL(struct ChannelDescendant *pChannelDescendant, NvBool bSubdeviceHandleProvided); - static inline NV_STATUS chandesCheckMemInterUnmap_DISPATCH(struct ChannelDescendant *pChannelDescendant, NvBool bSubdeviceHandleProvided) { return pChannelDescendant->__chandesCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } -static inline NvBool chandesShareCallback_DISPATCH(struct ChannelDescendant *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__chandesShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS chandesControl_DISPATCH(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__chandesControl__(pGpuResource, pCallContext, pParams); } -static inline NV_STATUS chandesGetOrAllocNotifShare_DISPATCH(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__chandesGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); +static inline NV_STATUS chandesMap_DISPATCH(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__chandesMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS chandesMapTo_DISPATCH(struct ChannelDescendant *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__chandesMapTo__(pResource, pParams); +static inline NV_STATUS chandesUnmap_DISPATCH(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__chandesUnmap__(pGpuResource, pCallContext, pCpuMapping); +} + +static inline NvBool chandesShareCallback_DISPATCH(struct ChannelDescendant *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__chandesShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +} + +static inline NV_STATUS chandesGetRegBaseOffsetAndSize_DISPATCH(struct ChannelDescendant *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__chandesGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS chandesGetMapAddrSpace_DISPATCH(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__chandesGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void chandesSetNotificationShare_DISPATCH(struct ChannelDescendant *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__chandesSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS chandesInternalControlForward_DISPATCH(struct ChannelDescendant *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__chandesInternalControlForward__(pGpuResource, command, pParams, size); } -static inline NvU32 chandesGetRefCount_DISPATCH(struct ChannelDescendant *pResource) { - return pResource->__chandesGetRefCount__(pResource); +static inline NvHandle chandesGetInternalObjectHandle_DISPATCH(struct ChannelDescendant *pGpuResource) { + return pGpuResource->__chandesGetInternalObjectHandle__(pGpuResource); } -static inline void chandesAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ChannelDescendant *pResource, RsResourceRef *pReference) { - pResource->__chandesAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvBool chandesAccessCallback_DISPATCH(struct ChannelDescendant *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__chandesAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS chandesControl_Prologue_DISPATCH(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__chandesControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS chandesGetMemInterMapParams_DISPATCH(struct ChannelDescendant *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__chandesGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS chandesGetRegBaseOffsetAndSize_DISPATCH(struct ChannelDescendant *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__chandesGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS chandesGetMemoryMappingDescriptor_DISPATCH(struct ChannelDescendant *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__chandesGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NV_STATUS chandesInternalControlForward_DISPATCH(struct ChannelDescendant *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__chandesInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS chandesControlSerialization_Prologue_DISPATCH(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__chandesControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS chandesUnmapFrom_DISPATCH(struct ChannelDescendant *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__chandesUnmapFrom__(pResource, pParams); +static inline void chandesControlSerialization_Epilogue_DISPATCH(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__chandesControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS chandesControl_Prologue_DISPATCH(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__chandesControl_Prologue__(pResource, pCallContext, pParams); } static inline void chandesControl_Epilogue_DISPATCH(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { pResource->__chandesControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NvHandle chandesGetInternalObjectHandle_DISPATCH(struct ChannelDescendant *pGpuResource) { - return pGpuResource->__chandesGetInternalObjectHandle__(pGpuResource); +static inline NvBool chandesCanCopy_DISPATCH(struct ChannelDescendant *pResource) { + return pResource->__chandesCanCopy__(pResource); } -static inline NV_STATUS chandesControl_DISPATCH(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__chandesControl__(pGpuResource, pCallContext, pParams); +static inline NV_STATUS chandesIsDuplicate_DISPATCH(struct ChannelDescendant *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__chandesIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS chandesUnmap_DISPATCH(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__chandesUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline void chandesPreDestruct_DISPATCH(struct ChannelDescendant *pResource) { + pResource->__chandesPreDestruct__(pResource); } -static inline NV_STATUS chandesGetMemInterMapParams_DISPATCH(struct ChannelDescendant *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__chandesGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS chandesControlFilter_DISPATCH(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__chandesControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS chandesGetMemoryMappingDescriptor_DISPATCH(struct ChannelDescendant *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__chandesGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NvBool chandesIsPartialUnmapSupported_DISPATCH(struct ChannelDescendant *pResource) { + return pResource->__chandesIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS chandesControlFilter_DISPATCH(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__chandesControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS chandesMapTo_DISPATCH(struct ChannelDescendant *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__chandesMapTo__(pResource, pParams); } -static inline NV_STATUS chandesUnregisterEvent_DISPATCH(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__chandesUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline NV_STATUS chandesUnmapFrom_DISPATCH(struct ChannelDescendant *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__chandesUnmapFrom__(pResource, pParams); } -static inline NV_STATUS chandesControlSerialization_Prologue_DISPATCH(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__chandesControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NvU32 chandesGetRefCount_DISPATCH(struct ChannelDescendant *pResource) { + return pResource->__chandesGetRefCount__(pResource); } -static inline NvBool chandesCanCopy_DISPATCH(struct ChannelDescendant *pResource) { - return pResource->__chandesCanCopy__(pResource); +static inline void chandesAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ChannelDescendant *pResource, RsResourceRef *pReference) { + pResource->__chandesAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NvBool chandesIsPartialUnmapSupported_DISPATCH(struct ChannelDescendant *pResource) { - return pResource->__chandesIsPartialUnmapSupported__(pResource); +static inline PEVENTNOTIFICATION * chandesGetNotificationListPtr_DISPATCH(struct ChannelDescendant *pNotifier) { + return pNotifier->__chandesGetNotificationListPtr__(pNotifier); } -static inline void chandesPreDestruct_DISPATCH(struct ChannelDescendant *pResource) { - pResource->__chandesPreDestruct__(pResource); +static inline struct NotifShare * chandesGetNotificationShare_DISPATCH(struct ChannelDescendant *pNotifier) { + return pNotifier->__chandesGetNotificationShare__(pNotifier); } -static inline NV_STATUS chandesIsDuplicate_DISPATCH(struct ChannelDescendant *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__chandesIsDuplicate__(pResource, hMemory, pDuplicate); +static inline void chandesSetNotificationShare_DISPATCH(struct ChannelDescendant *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__chandesSetNotificationShare__(pNotifier, pNotifShare); } -static inline void chandesControlSerialization_Epilogue_DISPATCH(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__chandesControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS chandesUnregisterEvent_DISPATCH(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__chandesUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static inline PEVENTNOTIFICATION *chandesGetNotificationListPtr_DISPATCH(struct ChannelDescendant *pNotifier) { - return pNotifier->__chandesGetNotificationListPtr__(pNotifier); +static inline NV_STATUS chandesGetOrAllocNotifShare_DISPATCH(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return pNotifier->__chandesGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } -static inline struct NotifShare *chandesGetNotificationShare_DISPATCH(struct ChannelDescendant *pNotifier) { - return pNotifier->__chandesGetNotificationShare__(pNotifier); +static inline void chandesIsolateOnDestruct_b3696a(struct ChannelDescendant *pChannelDescendant) { + return; } -static inline NV_STATUS chandesMap_DISPATCH(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__chandesMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + +#ifdef __nvoc_channel_descendant_h_disabled +static inline void chandesIsolateOnDestruct(struct ChannelDescendant *pChannelDescendant) { + NV_ASSERT_FAILED_PRECOMP("ChannelDescendant was disabled!"); } +#else //__nvoc_channel_descendant_h_disabled +#define chandesIsolateOnDestruct(pChannelDescendant) chandesIsolateOnDestruct_b3696a(pChannelDescendant) +#endif //__nvoc_channel_descendant_h_disabled -static inline NvBool chandesAccessCallback_DISPATCH(struct ChannelDescendant *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__chandesAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +#define chandesIsolateOnDestruct_HAL(pChannelDescendant) chandesIsolateOnDestruct(pChannelDescendant) + +static inline void chandesDestroy_b3696a(struct ChannelDescendant *pChannelDescendant) { + return; } + +#ifdef __nvoc_channel_descendant_h_disabled +static inline void chandesDestroy(struct ChannelDescendant *pChannelDescendant) { + NV_ASSERT_FAILED_PRECOMP("ChannelDescendant was disabled!"); +} +#else //__nvoc_channel_descendant_h_disabled +#define chandesDestroy(pChannelDescendant) chandesDestroy_b3696a(pChannelDescendant) +#endif //__nvoc_channel_descendant_h_disabled + +#define chandesDestroy_HAL(pChannelDescendant) chandesDestroy(pChannelDescendant) + +NV_STATUS chandesGetSwMethods_IMPL(struct ChannelDescendant *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods); + +NvBool chandesIsSwMethodStalling_IMPL(struct ChannelDescendant *pChannelDescendant, NvU32 hHandle); + +NV_STATUS chandesCheckMemInterUnmap_IMPL(struct ChannelDescendant *pChannelDescendant, NvBool bSubdeviceHandleProvided); + NV_STATUS chandesConstruct_IMPL(struct ChannelDescendant *arg_pChannelDescendant, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams, PARAM_TO_ENGDESC_FUNCTION *arg_pParamToEngDescFn); #define __nvoc_chandesConstruct(arg_pChannelDescendant, arg_pCallContext, arg_pParams, arg_pParamToEngDescFn) chandesConstruct_IMPL(arg_pChannelDescendant, arg_pCallContext, arg_pParams, arg_pParamToEngDescFn) diff --git a/src/nvidia/generated/g_chips2halspec_nvoc.c b/src/nvidia/generated/g_chips2halspec_nvoc.c index eccbf9a6b9..48a33d45f9 100644 --- a/src/nvidia/generated/g_chips2halspec_nvoc.c +++ b/src/nvidia/generated/g_chips2halspec_nvoc.c @@ -144,7 +144,7 @@ void __nvoc_init_halspec_DispIpHal(DispIpHal *pDispIpHal, NvU32 ipver) // DISPv0000 else if(ipver == 0x0) { - pDispIpHal->__nvoc_HalVarIdx = 17; + pDispIpHal->__nvoc_HalVarIdx = 18; } } diff --git a/src/nvidia/generated/g_chips2halspec_nvoc.h b/src/nvidia/generated/g_chips2halspec_nvoc.h index 76c6220d0d..272ccc2d09 100644 --- a/src/nvidia/generated/g_chips2halspec_nvoc.h +++ b/src/nvidia/generated/g_chips2halspec_nvoc.h @@ -1,11 +1,19 @@ + #ifndef _G_CHIPS2HALSPEC_NVOC_H_ #define _G_CHIPS2HALSPEC_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif +#pragma once #include "g_chips2halspec_nvoc.h" #ifndef _CHIPS_2_HALSPEC_H_ diff --git a/src/nvidia/generated/g_chipset_nvoc.c b/src/nvidia/generated/g_chipset_nvoc.c index 301e926504..3edb272845 100644 --- a/src/nvidia/generated/g_chipset_nvoc.c +++ b/src/nvidia/generated/g_chipset_nvoc.c @@ -95,10 +95,13 @@ NV_STATUS __nvoc_ctor_OBJCL(OBJCL *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJCL_1(OBJCL *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_OBJCL_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_OBJCL(OBJCL *pThis) { __nvoc_init_funcTable_OBJCL_1(pThis); } diff --git a/src/nvidia/generated/g_chipset_nvoc.h b/src/nvidia/generated/g_chipset_nvoc.h index 1eaea35cb1..78d0b432f5 100644 --- a/src/nvidia/generated/g_chipset_nvoc.h +++ b/src/nvidia/generated/g_chipset_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_CHIPSET_NVOC_H_ #define _G_CHIPSET_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_chipset_nvoc.h" #ifndef CHIPSET_H @@ -255,11 +263,20 @@ typedef struct GspSystemInfo GspSystemInfo; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJCL { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct OBJCL *__nvoc_pbase_OBJCL; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct OBJCL *__nvoc_pbase_OBJCL; // cl + + // 37 PDB properties NvBool PDB_PROP_CL_PCIE_CONFIG_ACCESSIBLE; NvBool PDB_PROP_CL_DISABLE_BR03_FLOW_CONTROL; NvBool PDB_PROP_CL_ASLM_SUPPORTS_NV_LINK_UPGRADE; @@ -297,6 +314,8 @@ struct OBJCL { NvBool PDB_PROP_CL_HAS_RESIZABLE_BAR_ISSUE; NvBool PDB_PROP_CL_BUG_3751839_GEN_SPEED_WAR; NvBool PDB_PROP_CL_BUG_3562968_WAR_ALLOW_PCIE_ATOMICS; + + // Data members NBADDR NBAddr; NvBool EnteredRecoverySinceErrorsLastChecked; struct OBJHWBC *pHWBC; @@ -321,6 +340,7 @@ typedef struct OBJCL OBJCL; #define __nvoc_class_id_OBJCL 0x547dbb #endif /* __nvoc_class_id_OBJCL */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJCL; #define __staticCast_OBJCL(pThis) \ @@ -333,6 +353,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJCL; ((OBJCL*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJCL))) #endif //__nvoc_chipset_h_disabled +// Property macros #define PDB_PROP_CL_PCIE_CONFIG_SKIP_MCFG_READ_BASE_CAST #define PDB_PROP_CL_PCIE_CONFIG_SKIP_MCFG_READ_BASE_NAME PDB_PROP_CL_PCIE_CONFIG_SKIP_MCFG_READ #define PDB_PROP_CL_EXTENDED_TAG_FIELD_NOT_CAPABLE_BASE_CAST @@ -414,266 +435,270 @@ NV_STATUS __nvoc_objCreate_OBJCL(OBJCL**, Dynamic*, NvU32); #define __objCreate_OBJCL(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJCL((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -NV_STATUS clInit_IMPL(struct OBJGPU *arg0, struct OBJCL *pCl); + +// Wrapper macros + +// Dispatch functions +NV_STATUS clInit_IMPL(struct OBJGPU *arg1, struct OBJCL *pCl); #ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clInit(struct OBJGPU *arg0, struct OBJCL *pCl) { +static inline NV_STATUS clInit(struct OBJGPU *arg1, struct OBJCL *pCl) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_chipset_h_disabled -#define clInit(arg0, pCl) clInit_IMPL(arg0, pCl) +#define clInit(arg1, pCl) clInit_IMPL(arg1, pCl) #endif //__nvoc_chipset_h_disabled -#define clInit_HAL(arg0, pCl) clInit(arg0, pCl) +#define clInit_HAL(arg1, pCl) clInit(arg1, pCl) -void clUpdateConfig_IMPL(struct OBJGPU *arg0, struct OBJCL *pCl); +void clUpdateConfig_IMPL(struct OBJGPU *arg1, struct OBJCL *pCl); #ifdef __nvoc_chipset_h_disabled -static inline void clUpdateConfig(struct OBJGPU *arg0, struct OBJCL *pCl) { +static inline void clUpdateConfig(struct OBJGPU *arg1, struct OBJCL *pCl) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); } #else //__nvoc_chipset_h_disabled -#define clUpdateConfig(arg0, pCl) clUpdateConfig_IMPL(arg0, pCl) +#define clUpdateConfig(arg1, pCl) clUpdateConfig_IMPL(arg1, pCl) #endif //__nvoc_chipset_h_disabled -#define clUpdateConfig_HAL(arg0, pCl) clUpdateConfig(arg0, pCl) +#define clUpdateConfig_HAL(arg1, pCl) clUpdateConfig(arg1, pCl) -NV_STATUS clTeardown_IMPL(struct OBJGPU *arg0, struct OBJCL *pCl); +NV_STATUS clTeardown_IMPL(struct OBJGPU *arg1, struct OBJCL *pCl); #ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clTeardown(struct OBJGPU *arg0, struct OBJCL *pCl) { +static inline NV_STATUS clTeardown(struct OBJGPU *arg1, struct OBJCL *pCl) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_chipset_h_disabled -#define clTeardown(arg0, pCl) clTeardown_IMPL(arg0, pCl) +#define clTeardown(arg1, pCl) clTeardown_IMPL(arg1, pCl) #endif //__nvoc_chipset_h_disabled -#define clTeardown_HAL(arg0, pCl) clTeardown(arg0, pCl) +#define clTeardown_HAL(arg1, pCl) clTeardown(arg1, pCl) -void clInitPropertiesFromRegistry_IMPL(struct OBJGPU *arg0, struct OBJCL *pCl); +void clInitPropertiesFromRegistry_IMPL(struct OBJGPU *arg1, struct OBJCL *pCl); #ifdef __nvoc_chipset_h_disabled -static inline void clInitPropertiesFromRegistry(struct OBJGPU *arg0, struct OBJCL *pCl) { +static inline void clInitPropertiesFromRegistry(struct OBJGPU *arg1, struct OBJCL *pCl) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); } #else //__nvoc_chipset_h_disabled -#define clInitPropertiesFromRegistry(arg0, pCl) clInitPropertiesFromRegistry_IMPL(arg0, pCl) +#define clInitPropertiesFromRegistry(arg1, pCl) clInitPropertiesFromRegistry_IMPL(arg1, pCl) #endif //__nvoc_chipset_h_disabled -#define clInitPropertiesFromRegistry_HAL(arg0, pCl) clInitPropertiesFromRegistry(arg0, pCl) +#define clInitPropertiesFromRegistry_HAL(arg1, pCl) clInitPropertiesFromRegistry(arg1, pCl) -NvU32 clInitMappingPciBusDevice_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1); +NvU32 clInitMappingPciBusDevice_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2); #ifdef __nvoc_chipset_h_disabled -static inline NvU32 clInitMappingPciBusDevice(struct OBJGPU *arg0, struct OBJCL *arg1) { +static inline NvU32 clInitMappingPciBusDevice(struct OBJGPU *arg1, struct OBJCL *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return 0; } #else //__nvoc_chipset_h_disabled -#define clInitMappingPciBusDevice(arg0, arg1) clInitMappingPciBusDevice_IMPL(arg0, arg1) +#define clInitMappingPciBusDevice(arg1, arg2) clInitMappingPciBusDevice_IMPL(arg1, arg2) #endif //__nvoc_chipset_h_disabled -#define clInitMappingPciBusDevice_HAL(arg0, arg1) clInitMappingPciBusDevice(arg0, arg1) +#define clInitMappingPciBusDevice_HAL(arg1, arg2) clInitMappingPciBusDevice(arg1, arg2) -NV_STATUS clFindFHBAndGetChipsetInfoIndex_IMPL(struct OBJCL *arg0, NvU16 *arg1); +NV_STATUS clFindFHBAndGetChipsetInfoIndex_IMPL(struct OBJCL *arg1, NvU16 *arg2); #ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clFindFHBAndGetChipsetInfoIndex(struct OBJCL *arg0, NvU16 *arg1) { +static inline NV_STATUS clFindFHBAndGetChipsetInfoIndex(struct OBJCL *arg1, NvU16 *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_chipset_h_disabled -#define clFindFHBAndGetChipsetInfoIndex(arg0, arg1) clFindFHBAndGetChipsetInfoIndex_IMPL(arg0, arg1) +#define clFindFHBAndGetChipsetInfoIndex(arg1, arg2) clFindFHBAndGetChipsetInfoIndex_IMPL(arg1, arg2) #endif //__nvoc_chipset_h_disabled -#define clFindFHBAndGetChipsetInfoIndex_HAL(arg0, arg1) clFindFHBAndGetChipsetInfoIndex(arg0, arg1) +#define clFindFHBAndGetChipsetInfoIndex_HAL(arg1, arg2) clFindFHBAndGetChipsetInfoIndex(arg1, arg2) -NV_STATUS clInitPcie_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1); +NV_STATUS clInitPcie_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2); #ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clInitPcie(struct OBJGPU *arg0, struct OBJCL *arg1) { +static inline NV_STATUS clInitPcie(struct OBJGPU *arg1, struct OBJCL *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_chipset_h_disabled -#define clInitPcie(arg0, arg1) clInitPcie_IMPL(arg0, arg1) +#define clInitPcie(arg1, arg2) clInitPcie_IMPL(arg1, arg2) #endif //__nvoc_chipset_h_disabled -#define clInitPcie_HAL(arg0, arg1) clInitPcie(arg0, arg1) +#define clInitPcie_HAL(arg1, arg2) clInitPcie(arg1, arg2) -void clUpdatePcieConfig_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1); +void clUpdatePcieConfig_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2); #ifdef __nvoc_chipset_h_disabled -static inline void clUpdatePcieConfig(struct OBJGPU *arg0, struct OBJCL *arg1) { +static inline void clUpdatePcieConfig(struct OBJGPU *arg1, struct OBJCL *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); } #else //__nvoc_chipset_h_disabled -#define clUpdatePcieConfig(arg0, arg1) clUpdatePcieConfig_IMPL(arg0, arg1) +#define clUpdatePcieConfig(arg1, arg2) clUpdatePcieConfig_IMPL(arg1, arg2) #endif //__nvoc_chipset_h_disabled -#define clUpdatePcieConfig_HAL(arg0, arg1) clUpdatePcieConfig(arg0, arg1) +#define clUpdatePcieConfig_HAL(arg1, arg2) clUpdatePcieConfig(arg1, arg2) -NV_STATUS clTeardownPcie_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1); +NV_STATUS clTeardownPcie_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2); #ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clTeardownPcie(struct OBJGPU *arg0, struct OBJCL *arg1) { +static inline NV_STATUS clTeardownPcie(struct OBJGPU *arg1, struct OBJCL *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_chipset_h_disabled -#define clTeardownPcie(arg0, arg1) clTeardownPcie_IMPL(arg0, arg1) +#define clTeardownPcie(arg1, arg2) clTeardownPcie_IMPL(arg1, arg2) #endif //__nvoc_chipset_h_disabled -#define clTeardownPcie_HAL(arg0, arg1) clTeardownPcie(arg0, arg1) +#define clTeardownPcie_HAL(arg1, arg2) clTeardownPcie(arg1, arg2) -NV_STATUS clPcieReadPortConfigReg_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1, PORTDATA *arg2, NvU32 arg3, NvU32 *arg4); +NV_STATUS clPcieReadPortConfigReg_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2, PORTDATA *arg3, NvU32 arg4, NvU32 *arg5); #ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clPcieReadPortConfigReg(struct OBJGPU *arg0, struct OBJCL *arg1, PORTDATA *arg2, NvU32 arg3, NvU32 *arg4) { +static inline NV_STATUS clPcieReadPortConfigReg(struct OBJGPU *arg1, struct OBJCL *arg2, PORTDATA *arg3, NvU32 arg4, NvU32 *arg5) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_chipset_h_disabled -#define clPcieReadPortConfigReg(arg0, arg1, arg2, arg3, arg4) clPcieReadPortConfigReg_IMPL(arg0, arg1, arg2, arg3, arg4) +#define clPcieReadPortConfigReg(arg1, arg2, arg3, arg4, arg5) clPcieReadPortConfigReg_IMPL(arg1, arg2, arg3, arg4, arg5) #endif //__nvoc_chipset_h_disabled -#define clPcieReadPortConfigReg_HAL(arg0, arg1, arg2, arg3, arg4) clPcieReadPortConfigReg(arg0, arg1, arg2, arg3, arg4) +#define clPcieReadPortConfigReg_HAL(arg1, arg2, arg3, arg4, arg5) clPcieReadPortConfigReg(arg1, arg2, arg3, arg4, arg5) -NV_STATUS clPcieWriteRootPortConfigReg_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1, NvU32 arg2, NvU32 arg3); +NV_STATUS clPcieWriteRootPortConfigReg_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2, NvU32 arg3, NvU32 arg4); #ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clPcieWriteRootPortConfigReg(struct OBJGPU *arg0, struct OBJCL *arg1, NvU32 arg2, NvU32 arg3) { +static inline NV_STATUS clPcieWriteRootPortConfigReg(struct OBJGPU *arg1, struct OBJCL *arg2, NvU32 arg3, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_chipset_h_disabled -#define clPcieWriteRootPortConfigReg(arg0, arg1, arg2, arg3) clPcieWriteRootPortConfigReg_IMPL(arg0, arg1, arg2, arg3) +#define clPcieWriteRootPortConfigReg(arg1, arg2, arg3, arg4) clPcieWriteRootPortConfigReg_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_chipset_h_disabled -#define clPcieWriteRootPortConfigReg_HAL(arg0, arg1, arg2, arg3) clPcieWriteRootPortConfigReg(arg0, arg1, arg2, arg3) +#define clPcieWriteRootPortConfigReg_HAL(arg1, arg2, arg3, arg4) clPcieWriteRootPortConfigReg(arg1, arg2, arg3, arg4) -NV_STATUS clPcieReadAerCapability_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1, struct PcieAerCapability *arg2); +NV_STATUS clPcieReadAerCapability_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2, struct PcieAerCapability *arg3); #ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clPcieReadAerCapability(struct OBJGPU *arg0, struct OBJCL *arg1, struct PcieAerCapability *arg2) { +static inline NV_STATUS clPcieReadAerCapability(struct OBJGPU *arg1, struct OBJCL *arg2, struct PcieAerCapability *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_chipset_h_disabled -#define clPcieReadAerCapability(arg0, arg1, arg2) clPcieReadAerCapability_IMPL(arg0, arg1, arg2) +#define clPcieReadAerCapability(arg1, arg2, arg3) clPcieReadAerCapability_IMPL(arg1, arg2, arg3) #endif //__nvoc_chipset_h_disabled -#define clPcieReadAerCapability_HAL(arg0, arg1, arg2) clPcieReadAerCapability(arg0, arg1, arg2) +#define clPcieReadAerCapability_HAL(arg1, arg2, arg3) clPcieReadAerCapability(arg1, arg2, arg3) -NV_STATUS clPcieReadL1SsCapability_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1, struct PexL1SubstateCapability *arg2); +NV_STATUS clPcieReadL1SsCapability_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2, struct PexL1SubstateCapability *arg3); #ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clPcieReadL1SsCapability(struct OBJGPU *arg0, struct OBJCL *arg1, struct PexL1SubstateCapability *arg2) { +static inline NV_STATUS clPcieReadL1SsCapability(struct OBJGPU *arg1, struct OBJCL *arg2, struct PexL1SubstateCapability *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_chipset_h_disabled -#define clPcieReadL1SsCapability(arg0, arg1, arg2) clPcieReadL1SsCapability_IMPL(arg0, arg1, arg2) +#define clPcieReadL1SsCapability(arg1, arg2, arg3) clPcieReadL1SsCapability_IMPL(arg1, arg2, arg3) #endif //__nvoc_chipset_h_disabled -#define clPcieReadL1SsCapability_HAL(arg0, arg1, arg2) clPcieReadL1SsCapability(arg0, arg1, arg2) +#define clPcieReadL1SsCapability_HAL(arg1, arg2, arg3) clPcieReadL1SsCapability(arg1, arg2, arg3) -NV_STATUS clPcieReadDevCtrlStatus_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1, NvU32 *arg2, NvU32 *arg3); +NV_STATUS clPcieReadDevCtrlStatus_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2, NvU32 *arg3, NvU32 *arg4); #ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clPcieReadDevCtrlStatus(struct OBJGPU *arg0, struct OBJCL *arg1, NvU32 *arg2, NvU32 *arg3) { +static inline NV_STATUS clPcieReadDevCtrlStatus(struct OBJGPU *arg1, struct OBJCL *arg2, NvU32 *arg3, NvU32 *arg4) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_chipset_h_disabled -#define clPcieReadDevCtrlStatus(arg0, arg1, arg2, arg3) clPcieReadDevCtrlStatus_IMPL(arg0, arg1, arg2, arg3) +#define clPcieReadDevCtrlStatus(arg1, arg2, arg3, arg4) clPcieReadDevCtrlStatus_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_chipset_h_disabled -#define clPcieReadDevCtrlStatus_HAL(arg0, arg1, arg2, arg3) clPcieReadDevCtrlStatus(arg0, arg1, arg2, arg3) +#define clPcieReadDevCtrlStatus_HAL(arg1, arg2, arg3, arg4) clPcieReadDevCtrlStatus(arg1, arg2, arg3, arg4) -NV_STATUS clPcieClearDevCtrlStatus_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1, NvU32 *arg2); +NV_STATUS clPcieClearDevCtrlStatus_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2, NvU32 *arg3); #ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clPcieClearDevCtrlStatus(struct OBJGPU *arg0, struct OBJCL *arg1, NvU32 *arg2) { +static inline NV_STATUS clPcieClearDevCtrlStatus(struct OBJGPU *arg1, struct OBJCL *arg2, NvU32 *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_chipset_h_disabled -#define clPcieClearDevCtrlStatus(arg0, arg1, arg2) clPcieClearDevCtrlStatus_IMPL(arg0, arg1, arg2) +#define clPcieClearDevCtrlStatus(arg1, arg2, arg3) clPcieClearDevCtrlStatus_IMPL(arg1, arg2, arg3) #endif //__nvoc_chipset_h_disabled -#define clPcieClearDevCtrlStatus_HAL(arg0, arg1, arg2) clPcieClearDevCtrlStatus(arg0, arg1, arg2) +#define clPcieClearDevCtrlStatus_HAL(arg1, arg2, arg3) clPcieClearDevCtrlStatus(arg1, arg2, arg3) -NvU16 clPcieReadWord_IMPL(struct OBJCL *arg0, NvU32 arg1, NvU8 arg2, NvU8 arg3, NvU8 arg4, NvU32 arg5); +NvU16 clPcieReadWord_IMPL(struct OBJCL *arg1, NvU32 arg2, NvU8 arg3, NvU8 arg4, NvU8 arg5, NvU32 arg6); #ifdef __nvoc_chipset_h_disabled -static inline NvU16 clPcieReadWord(struct OBJCL *arg0, NvU32 arg1, NvU8 arg2, NvU8 arg3, NvU8 arg4, NvU32 arg5) { +static inline NvU16 clPcieReadWord(struct OBJCL *arg1, NvU32 arg2, NvU8 arg3, NvU8 arg4, NvU8 arg5, NvU32 arg6) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return 0; } #else //__nvoc_chipset_h_disabled -#define clPcieReadWord(arg0, arg1, arg2, arg3, arg4, arg5) clPcieReadWord_IMPL(arg0, arg1, arg2, arg3, arg4, arg5) +#define clPcieReadWord(arg1, arg2, arg3, arg4, arg5, arg6) clPcieReadWord_IMPL(arg1, arg2, arg3, arg4, arg5, arg6) #endif //__nvoc_chipset_h_disabled -#define clPcieReadWord_HAL(arg0, arg1, arg2, arg3, arg4, arg5) clPcieReadWord(arg0, arg1, arg2, arg3, arg4, arg5) +#define clPcieReadWord_HAL(arg1, arg2, arg3, arg4, arg5, arg6) clPcieReadWord(arg1, arg2, arg3, arg4, arg5, arg6) -NvU32 clPcieReadDword_IMPL(struct OBJCL *arg0, NvU32 arg1, NvU8 arg2, NvU8 arg3, NvU8 arg4, NvU32 arg5); +NvU32 clPcieReadDword_IMPL(struct OBJCL *arg1, NvU32 arg2, NvU8 arg3, NvU8 arg4, NvU8 arg5, NvU32 arg6); #ifdef __nvoc_chipset_h_disabled -static inline NvU32 clPcieReadDword(struct OBJCL *arg0, NvU32 arg1, NvU8 arg2, NvU8 arg3, NvU8 arg4, NvU32 arg5) { +static inline NvU32 clPcieReadDword(struct OBJCL *arg1, NvU32 arg2, NvU8 arg3, NvU8 arg4, NvU8 arg5, NvU32 arg6) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return 0; } #else //__nvoc_chipset_h_disabled -#define clPcieReadDword(arg0, arg1, arg2, arg3, arg4, arg5) clPcieReadDword_IMPL(arg0, arg1, arg2, arg3, arg4, arg5) +#define clPcieReadDword(arg1, arg2, arg3, arg4, arg5, arg6) clPcieReadDword_IMPL(arg1, arg2, arg3, arg4, arg5, arg6) #endif //__nvoc_chipset_h_disabled -#define clPcieReadDword_HAL(arg0, arg1, arg2, arg3, arg4, arg5) clPcieReadDword(arg0, arg1, arg2, arg3, arg4, arg5) +#define clPcieReadDword_HAL(arg1, arg2, arg3, arg4, arg5, arg6) clPcieReadDword(arg1, arg2, arg3, arg4, arg5, arg6) -void clPcieWriteWord_IMPL(struct OBJCL *arg0, NvU32 arg1, NvU8 arg2, NvU8 arg3, NvU8 arg4, NvU32 arg5, NvU16 arg6); +void clPcieWriteWord_IMPL(struct OBJCL *arg1, NvU32 arg2, NvU8 arg3, NvU8 arg4, NvU8 arg5, NvU32 arg6, NvU16 arg7); #ifdef __nvoc_chipset_h_disabled -static inline void clPcieWriteWord(struct OBJCL *arg0, NvU32 arg1, NvU8 arg2, NvU8 arg3, NvU8 arg4, NvU32 arg5, NvU16 arg6) { +static inline void clPcieWriteWord(struct OBJCL *arg1, NvU32 arg2, NvU8 arg3, NvU8 arg4, NvU8 arg5, NvU32 arg6, NvU16 arg7) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); } #else //__nvoc_chipset_h_disabled -#define clPcieWriteWord(arg0, arg1, arg2, arg3, arg4, arg5, arg6) clPcieWriteWord_IMPL(arg0, arg1, arg2, arg3, arg4, arg5, arg6) +#define clPcieWriteWord(arg1, arg2, arg3, arg4, arg5, arg6, arg7) clPcieWriteWord_IMPL(arg1, arg2, arg3, arg4, arg5, arg6, arg7) #endif //__nvoc_chipset_h_disabled -#define clPcieWriteWord_HAL(arg0, arg1, arg2, arg3, arg4, arg5, arg6) clPcieWriteWord(arg0, arg1, arg2, arg3, arg4, arg5, arg6) +#define clPcieWriteWord_HAL(arg1, arg2, arg3, arg4, arg5, arg6, arg7) clPcieWriteWord(arg1, arg2, arg3, arg4, arg5, arg6, arg7) -void clPcieWriteDword_IMPL(struct OBJCL *arg0, NvU32 arg1, NvU8 arg2, NvU8 arg3, NvU8 arg4, NvU32 arg5, NvU32 arg6); +void clPcieWriteDword_IMPL(struct OBJCL *arg1, NvU32 arg2, NvU8 arg3, NvU8 arg4, NvU8 arg5, NvU32 arg6, NvU32 arg7); #ifdef __nvoc_chipset_h_disabled -static inline void clPcieWriteDword(struct OBJCL *arg0, NvU32 arg1, NvU8 arg2, NvU8 arg3, NvU8 arg4, NvU32 arg5, NvU32 arg6) { +static inline void clPcieWriteDword(struct OBJCL *arg1, NvU32 arg2, NvU8 arg3, NvU8 arg4, NvU8 arg5, NvU32 arg6, NvU32 arg7) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); } #else //__nvoc_chipset_h_disabled -#define clPcieWriteDword(arg0, arg1, arg2, arg3, arg4, arg5, arg6) clPcieWriteDword_IMPL(arg0, arg1, arg2, arg3, arg4, arg5, arg6) +#define clPcieWriteDword(arg1, arg2, arg3, arg4, arg5, arg6, arg7) clPcieWriteDword_IMPL(arg1, arg2, arg3, arg4, arg5, arg6, arg7) #endif //__nvoc_chipset_h_disabled -#define clPcieWriteDword_HAL(arg0, arg1, arg2, arg3, arg4, arg5, arg6) clPcieWriteDword(arg0, arg1, arg2, arg3, arg4, arg5, arg6) +#define clPcieWriteDword_HAL(arg1, arg2, arg3, arg4, arg5, arg6, arg7) clPcieWriteDword(arg1, arg2, arg3, arg4, arg5, arg6, arg7) NvBool clFindBR04_IMPL(POBJGPU *pGpus, NvU32 NumGpus, NvBool flat, NvU32 devId, struct OBJCL *pCl); @@ -703,89 +728,47 @@ static inline NV_STATUS clResumeBridge(struct OBJCL *pCl) { #define clResumeBridge_HAL(pCl) clResumeBridge(pCl) -NV_STATUS clChangeUpstreamBusSpeed_IMPL(NvU8 primaryBus, struct OBJCL *pCl, NvU32 cmd); - - -#ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clChangeUpstreamBusSpeed(NvU8 primaryBus, struct OBJCL *pCl, NvU32 cmd) { - NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_chipset_h_disabled -#define clChangeUpstreamBusSpeed(primaryBus, pCl, cmd) clChangeUpstreamBusSpeed_IMPL(primaryBus, pCl, cmd) -#endif //__nvoc_chipset_h_disabled - -#define clChangeUpstreamBusSpeed_HAL(primaryBus, pCl, cmd) clChangeUpstreamBusSpeed(primaryBus, pCl, cmd) - -NV_STATUS clGetUpstreamBusSpeed_IMPL(NvU8 primaryBus, struct OBJCL *pCl, NvU32 *speed); - - -#ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clGetUpstreamBusSpeed(NvU8 primaryBus, struct OBJCL *pCl, NvU32 *speed) { - NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_chipset_h_disabled -#define clGetUpstreamBusSpeed(primaryBus, pCl, speed) clGetUpstreamBusSpeed_IMPL(primaryBus, pCl, speed) -#endif //__nvoc_chipset_h_disabled - -#define clGetUpstreamBusSpeed_HAL(primaryBus, pCl, speed) clGetUpstreamBusSpeed(primaryBus, pCl, speed) - -NV_STATUS clHWBCGetUpstreamBAR0_IMPL(NvU8 primaryBus, struct OBJCL *pCl, RmPhysAddr *pBAR0); - - -#ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clHWBCGetUpstreamBAR0(NvU8 primaryBus, struct OBJCL *pCl, RmPhysAddr *pBAR0) { - NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_chipset_h_disabled -#define clHWBCGetUpstreamBAR0(primaryBus, pCl, pBAR0) clHWBCGetUpstreamBAR0_IMPL(primaryBus, pCl, pBAR0) -#endif //__nvoc_chipset_h_disabled - -#define clHWBCGetUpstreamBAR0_HAL(primaryBus, pCl, pBAR0) clHWBCGetUpstreamBAR0(primaryBus, pCl, pBAR0) - -void *clFindP2PBrdg_IMPL(struct OBJCL *arg0, NvU32 arg1, NvU8 arg2, NvU8 *arg3, NvU8 *arg4, NvU8 *arg5, NvU16 *arg6, NvU16 *arg7); +void *clFindP2PBrdg_IMPL(struct OBJCL *arg1, NvU32 arg2, NvU8 arg3, NvU8 *arg4, NvU8 *arg5, NvU8 *arg6, NvU16 *arg7, NvU16 *arg8); #ifdef __nvoc_chipset_h_disabled -static inline void *clFindP2PBrdg(struct OBJCL *arg0, NvU32 arg1, NvU8 arg2, NvU8 *arg3, NvU8 *arg4, NvU8 *arg5, NvU16 *arg6, NvU16 *arg7) { +static inline void *clFindP2PBrdg(struct OBJCL *arg1, NvU32 arg2, NvU8 arg3, NvU8 *arg4, NvU8 *arg5, NvU8 *arg6, NvU16 *arg7, NvU16 *arg8) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NULL; } #else //__nvoc_chipset_h_disabled -#define clFindP2PBrdg(arg0, arg1, arg2, arg3, arg4, arg5, arg6, arg7) clFindP2PBrdg_IMPL(arg0, arg1, arg2, arg3, arg4, arg5, arg6, arg7) +#define clFindP2PBrdg(arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8) clFindP2PBrdg_IMPL(arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8) #endif //__nvoc_chipset_h_disabled -#define clFindP2PBrdg_HAL(arg0, arg1, arg2, arg3, arg4, arg5, arg6, arg7) clFindP2PBrdg(arg0, arg1, arg2, arg3, arg4, arg5, arg6, arg7) +#define clFindP2PBrdg_HAL(arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8) clFindP2PBrdg(arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8) -void *clFindBrdgUpstreamPort_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1, NvBool arg2, NvU8 *arg3, NvU8 *arg4, NvU8 *arg5, NvU16 *arg6, NvU16 *arg7, NvU8 *arg8); +void *clFindBrdgUpstreamPort_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2, NvBool arg3, NvU8 *arg4, NvU8 *arg5, NvU8 *arg6, NvU16 *arg7, NvU16 *arg8, NvU8 *arg9); #ifdef __nvoc_chipset_h_disabled -static inline void *clFindBrdgUpstreamPort(struct OBJGPU *arg0, struct OBJCL *arg1, NvBool arg2, NvU8 *arg3, NvU8 *arg4, NvU8 *arg5, NvU16 *arg6, NvU16 *arg7, NvU8 *arg8) { +static inline void *clFindBrdgUpstreamPort(struct OBJGPU *arg1, struct OBJCL *arg2, NvBool arg3, NvU8 *arg4, NvU8 *arg5, NvU8 *arg6, NvU16 *arg7, NvU16 *arg8, NvU8 *arg9) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NULL; } #else //__nvoc_chipset_h_disabled -#define clFindBrdgUpstreamPort(arg0, arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8) clFindBrdgUpstreamPort_IMPL(arg0, arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8) +#define clFindBrdgUpstreamPort(arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8, arg9) clFindBrdgUpstreamPort_IMPL(arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8, arg9) #endif //__nvoc_chipset_h_disabled -#define clFindBrdgUpstreamPort_HAL(arg0, arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8) clFindBrdgUpstreamPort(arg0, arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8) +#define clFindBrdgUpstreamPort_HAL(arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8, arg9) clFindBrdgUpstreamPort(arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8, arg9) -NV_STATUS clSetPortPcieCapOffset_IMPL(struct OBJCL *arg0, void *arg1, NvU32 *arg2); +NV_STATUS clSetPortPcieCapOffset_IMPL(struct OBJCL *arg1, void *arg2, NvU32 *arg3); #ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clSetPortPcieCapOffset(struct OBJCL *arg0, void *arg1, NvU32 *arg2) { +static inline NV_STATUS clSetPortPcieCapOffset(struct OBJCL *arg1, void *arg2, NvU32 *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_chipset_h_disabled -#define clSetPortPcieCapOffset(arg0, arg1, arg2) clSetPortPcieCapOffset_IMPL(arg0, arg1, arg2) +#define clSetPortPcieCapOffset(arg1, arg2, arg3) clSetPortPcieCapOffset_IMPL(arg1, arg2, arg3) #endif //__nvoc_chipset_h_disabled -#define clSetPortPcieCapOffset_HAL(arg0, arg1, arg2) clSetPortPcieCapOffset(arg0, arg1, arg2) +#define clSetPortPcieCapOffset_HAL(arg1, arg2, arg3) clSetPortPcieCapOffset(arg1, arg2, arg3) NV_STATUS clStorePcieConfigSpaceBaseFromMcfg_IMPL(struct OBJCL *pCl); @@ -801,35 +784,35 @@ static inline NV_STATUS clStorePcieConfigSpaceBaseFromMcfg(struct OBJCL *pCl) { #define clStorePcieConfigSpaceBaseFromMcfg_HAL(pCl) clStorePcieConfigSpaceBaseFromMcfg(pCl) -NV_STATUS clInsertPcieConfigSpaceBase_IMPL(struct OBJCL *arg0, RmPhysAddr arg1, NvU32 arg2, NvU8 arg3, NvU8 arg4); +NV_STATUS clInsertPcieConfigSpaceBase_IMPL(struct OBJCL *arg1, RmPhysAddr arg2, NvU32 arg3, NvU8 arg4, NvU8 arg5); #ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clInsertPcieConfigSpaceBase(struct OBJCL *arg0, RmPhysAddr arg1, NvU32 arg2, NvU8 arg3, NvU8 arg4) { +static inline NV_STATUS clInsertPcieConfigSpaceBase(struct OBJCL *arg1, RmPhysAddr arg2, NvU32 arg3, NvU8 arg4, NvU8 arg5) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_chipset_h_disabled -#define clInsertPcieConfigSpaceBase(arg0, arg1, arg2, arg3, arg4) clInsertPcieConfigSpaceBase_IMPL(arg0, arg1, arg2, arg3, arg4) +#define clInsertPcieConfigSpaceBase(arg1, arg2, arg3, arg4, arg5) clInsertPcieConfigSpaceBase_IMPL(arg1, arg2, arg3, arg4, arg5) #endif //__nvoc_chipset_h_disabled -#define clInsertPcieConfigSpaceBase_HAL(arg0, arg1, arg2, arg3, arg4) clInsertPcieConfigSpaceBase(arg0, arg1, arg2, arg3, arg4) +#define clInsertPcieConfigSpaceBase_HAL(arg1, arg2, arg3, arg4, arg5) clInsertPcieConfigSpaceBase(arg1, arg2, arg3, arg4, arg5) -RmPhysAddr clFindPcieConfigSpaceBase_IMPL(struct OBJCL *arg0, NvU32 arg1, NvU8 arg2); +RmPhysAddr clFindPcieConfigSpaceBase_IMPL(struct OBJCL *arg1, NvU32 arg2, NvU8 arg3); #ifdef __nvoc_chipset_h_disabled -static inline RmPhysAddr clFindPcieConfigSpaceBase(struct OBJCL *arg0, NvU32 arg1, NvU8 arg2) { +static inline RmPhysAddr clFindPcieConfigSpaceBase(struct OBJCL *arg1, NvU32 arg2, NvU8 arg3) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); RmPhysAddr ret; portMemSet(&ret, 0, sizeof(RmPhysAddr)); return ret; } #else //__nvoc_chipset_h_disabled -#define clFindPcieConfigSpaceBase(arg0, arg1, arg2) clFindPcieConfigSpaceBase_IMPL(arg0, arg1, arg2) +#define clFindPcieConfigSpaceBase(arg1, arg2, arg3) clFindPcieConfigSpaceBase_IMPL(arg1, arg2, arg3) #endif //__nvoc_chipset_h_disabled -#define clFindPcieConfigSpaceBase_HAL(arg0, arg1, arg2) clFindPcieConfigSpaceBase(arg0, arg1, arg2) +#define clFindPcieConfigSpaceBase_HAL(arg1, arg2, arg3) clFindPcieConfigSpaceBase(arg1, arg2, arg3) void clFreePcieConfigSpaceBase_IMPL(struct OBJCL *pCl); @@ -844,32 +827,32 @@ static inline void clFreePcieConfigSpaceBase(struct OBJCL *pCl) { #define clFreePcieConfigSpaceBase_HAL(pCl) clFreePcieConfigSpaceBase(pCl) -NV_STATUS clInitDeviceInfo_IMPL(struct OBJCL *arg0, struct OBJGPU *arg1); +NV_STATUS clInitDeviceInfo_IMPL(struct OBJCL *arg1, struct OBJGPU *arg2); #ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clInitDeviceInfo(struct OBJCL *arg0, struct OBJGPU *arg1) { +static inline NV_STATUS clInitDeviceInfo(struct OBJCL *arg1, struct OBJGPU *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_chipset_h_disabled -#define clInitDeviceInfo(arg0, arg1) clInitDeviceInfo_IMPL(arg0, arg1) +#define clInitDeviceInfo(arg1, arg2) clInitDeviceInfo_IMPL(arg1, arg2) #endif //__nvoc_chipset_h_disabled -#define clInitDeviceInfo_HAL(arg0, arg1) clInitDeviceInfo(arg0, arg1) +#define clInitDeviceInfo_HAL(arg1, arg2) clInitDeviceInfo(arg1, arg2) -void clCountBR_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1, NvU8 *arg2); +void clCountBR_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2, NvU8 *arg3); #ifdef __nvoc_chipset_h_disabled -static inline void clCountBR(struct OBJGPU *arg0, struct OBJCL *arg1, NvU8 *arg2) { +static inline void clCountBR(struct OBJGPU *arg1, struct OBJCL *arg2, NvU8 *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); } #else //__nvoc_chipset_h_disabled -#define clCountBR(arg0, arg1, arg2) clCountBR_IMPL(arg0, arg1, arg2) +#define clCountBR(arg1, arg2, arg3) clCountBR_IMPL(arg1, arg2, arg3) #endif //__nvoc_chipset_h_disabled -#define clCountBR_HAL(arg0, arg1, arg2) clCountBR(arg0, arg1, arg2) +#define clCountBR_HAL(arg1, arg2, arg3) clCountBR(arg1, arg2, arg3) void clFindCommonBR_IMPL(struct OBJGPU *pGpu1, struct OBJGPU *pGpu2, struct OBJCL *pCl, NvU8 *pBR04Bus, NvBool bScanAll); @@ -978,103 +961,103 @@ static inline void clFreeBusTopologyCache(struct OBJCL *pCl) { #define clFreeBusTopologyCache_HAL(pCl) clFreeBusTopologyCache(pCl) -NvBool clIsL1MaskEnabledForUpstreamPort_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1); +NvBool clIsL1MaskEnabledForUpstreamPort_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2); #ifdef __nvoc_chipset_h_disabled -static inline NvBool clIsL1MaskEnabledForUpstreamPort(struct OBJGPU *arg0, struct OBJCL *arg1) { +static inline NvBool clIsL1MaskEnabledForUpstreamPort(struct OBJGPU *arg1, struct OBJCL *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_FALSE; } #else //__nvoc_chipset_h_disabled -#define clIsL1MaskEnabledForUpstreamPort(arg0, arg1) clIsL1MaskEnabledForUpstreamPort_IMPL(arg0, arg1) +#define clIsL1MaskEnabledForUpstreamPort(arg1, arg2) clIsL1MaskEnabledForUpstreamPort_IMPL(arg1, arg2) #endif //__nvoc_chipset_h_disabled -#define clIsL1MaskEnabledForUpstreamPort_HAL(arg0, arg1) clIsL1MaskEnabledForUpstreamPort(arg0, arg1) +#define clIsL1MaskEnabledForUpstreamPort_HAL(arg1, arg2) clIsL1MaskEnabledForUpstreamPort(arg1, arg2) -NvBool clIsL0sMaskEnabledForUpstreamPort_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1); +NvBool clIsL0sMaskEnabledForUpstreamPort_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2); #ifdef __nvoc_chipset_h_disabled -static inline NvBool clIsL0sMaskEnabledForUpstreamPort(struct OBJGPU *arg0, struct OBJCL *arg1) { +static inline NvBool clIsL0sMaskEnabledForUpstreamPort(struct OBJGPU *arg1, struct OBJCL *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_FALSE; } #else //__nvoc_chipset_h_disabled -#define clIsL0sMaskEnabledForUpstreamPort(arg0, arg1) clIsL0sMaskEnabledForUpstreamPort_IMPL(arg0, arg1) +#define clIsL0sMaskEnabledForUpstreamPort(arg1, arg2) clIsL0sMaskEnabledForUpstreamPort_IMPL(arg1, arg2) #endif //__nvoc_chipset_h_disabled -#define clIsL0sMaskEnabledForUpstreamPort_HAL(arg0, arg1) clIsL0sMaskEnabledForUpstreamPort(arg0, arg1) +#define clIsL0sMaskEnabledForUpstreamPort_HAL(arg1, arg2) clIsL0sMaskEnabledForUpstreamPort(arg1, arg2) -NV_STATUS clControlL0sL1LinkControlUpstreamPort_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1, NvBool arg2); +NV_STATUS clControlL0sL1LinkControlUpstreamPort_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2, NvBool arg3); #ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clControlL0sL1LinkControlUpstreamPort(struct OBJGPU *arg0, struct OBJCL *arg1, NvBool arg2) { +static inline NV_STATUS clControlL0sL1LinkControlUpstreamPort(struct OBJGPU *arg1, struct OBJCL *arg2, NvBool arg3) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_chipset_h_disabled -#define clControlL0sL1LinkControlUpstreamPort(arg0, arg1, arg2) clControlL0sL1LinkControlUpstreamPort_IMPL(arg0, arg1, arg2) +#define clControlL0sL1LinkControlUpstreamPort(arg1, arg2, arg3) clControlL0sL1LinkControlUpstreamPort_IMPL(arg1, arg2, arg3) #endif //__nvoc_chipset_h_disabled -#define clControlL0sL1LinkControlUpstreamPort_HAL(arg0, arg1, arg2) clControlL0sL1LinkControlUpstreamPort(arg0, arg1, arg2) +#define clControlL0sL1LinkControlUpstreamPort_HAL(arg1, arg2, arg3) clControlL0sL1LinkControlUpstreamPort(arg1, arg2, arg3) -NV_STATUS clChipsetAspmPublicControl_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1, NvU32 arg2); +NV_STATUS clChipsetAspmPublicControl_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2, NvU32 arg3); #ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clChipsetAspmPublicControl(struct OBJGPU *arg0, struct OBJCL *arg1, NvU32 arg2) { +static inline NV_STATUS clChipsetAspmPublicControl(struct OBJGPU *arg1, struct OBJCL *arg2, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_chipset_h_disabled -#define clChipsetAspmPublicControl(arg0, arg1, arg2) clChipsetAspmPublicControl_IMPL(arg0, arg1, arg2) +#define clChipsetAspmPublicControl(arg1, arg2, arg3) clChipsetAspmPublicControl_IMPL(arg1, arg2, arg3) #endif //__nvoc_chipset_h_disabled -#define clChipsetAspmPublicControl_HAL(arg0, arg1, arg2) clChipsetAspmPublicControl(arg0, arg1, arg2) +#define clChipsetAspmPublicControl_HAL(arg1, arg2, arg3) clChipsetAspmPublicControl(arg1, arg2, arg3) -NvBool clRootportNeedsNosnoopWAR_FWCLIENT(struct OBJGPU *arg0, struct OBJCL *arg1); +NvBool clRootportNeedsNosnoopWAR_FWCLIENT(struct OBJGPU *arg1, struct OBJCL *arg2); #ifdef __nvoc_chipset_h_disabled -static inline NvBool clRootportNeedsNosnoopWAR(struct OBJGPU *arg0, struct OBJCL *arg1) { +static inline NvBool clRootportNeedsNosnoopWAR(struct OBJGPU *arg1, struct OBJCL *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_FALSE; } #else //__nvoc_chipset_h_disabled -#define clRootportNeedsNosnoopWAR(arg0, arg1) clRootportNeedsNosnoopWAR_FWCLIENT(arg0, arg1) +#define clRootportNeedsNosnoopWAR(arg1, arg2) clRootportNeedsNosnoopWAR_FWCLIENT(arg1, arg2) #endif //__nvoc_chipset_h_disabled -#define clRootportNeedsNosnoopWAR_HAL(arg0, arg1) clRootportNeedsNosnoopWAR(arg0, arg1) +#define clRootportNeedsNosnoopWAR_HAL(arg1, arg2) clRootportNeedsNosnoopWAR(arg1, arg2) -NvU16 clPcieGetGpuLostDiagnosticData_IMPL(struct OBJGPU *pGpu, struct OBJCL *arg0, NvU8 *pBuffer, NvU32 size); +NvU16 clPcieGetGpuLostDiagnosticData_IMPL(struct OBJGPU *pGpu, struct OBJCL *arg2, NvU8 *pBuffer, NvU32 size); #ifdef __nvoc_chipset_h_disabled -static inline NvU16 clPcieGetGpuLostDiagnosticData(struct OBJGPU *pGpu, struct OBJCL *arg0, NvU8 *pBuffer, NvU32 size) { +static inline NvU16 clPcieGetGpuLostDiagnosticData(struct OBJGPU *pGpu, struct OBJCL *arg2, NvU8 *pBuffer, NvU32 size) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return 0; } #else //__nvoc_chipset_h_disabled -#define clPcieGetGpuLostDiagnosticData(pGpu, arg0, pBuffer, size) clPcieGetGpuLostDiagnosticData_IMPL(pGpu, arg0, pBuffer, size) +#define clPcieGetGpuLostDiagnosticData(pGpu, arg2, pBuffer, size) clPcieGetGpuLostDiagnosticData_IMPL(pGpu, arg2, pBuffer, size) #endif //__nvoc_chipset_h_disabled -#define clPcieGetGpuLostDiagnosticData_HAL(pGpu, arg0, pBuffer, size) clPcieGetGpuLostDiagnosticData(pGpu, arg0, pBuffer, size) +#define clPcieGetGpuLostDiagnosticData_HAL(pGpu, arg2, pBuffer, size) clPcieGetGpuLostDiagnosticData(pGpu, arg2, pBuffer, size) -NvU32 clGetChipsetL1ClockPMSupport_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1); +NvU32 clGetChipsetL1ClockPMSupport_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2); #ifdef __nvoc_chipset_h_disabled -static inline NvU32 clGetChipsetL1ClockPMSupport(struct OBJGPU *arg0, struct OBJCL *arg1) { +static inline NvU32 clGetChipsetL1ClockPMSupport(struct OBJGPU *arg1, struct OBJCL *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return 0; } #else //__nvoc_chipset_h_disabled -#define clGetChipsetL1ClockPMSupport(arg0, arg1) clGetChipsetL1ClockPMSupport_IMPL(arg0, arg1) +#define clGetChipsetL1ClockPMSupport(arg1, arg2) clGetChipsetL1ClockPMSupport_IMPL(arg1, arg2) #endif //__nvoc_chipset_h_disabled -#define clGetChipsetL1ClockPMSupport_HAL(arg0, arg1) clGetChipsetL1ClockPMSupport(arg0, arg1) +#define clGetChipsetL1ClockPMSupport_HAL(arg1, arg2) clGetChipsetL1ClockPMSupport(arg1, arg2) NV_STATUS clConstruct_IMPL(struct OBJCL *arg_pCl); @@ -1082,69 +1065,69 @@ NV_STATUS clConstruct_IMPL(struct OBJCL *arg_pCl); void clDestruct_IMPL(struct OBJCL *pCl); #define __nvoc_clDestruct(pCl) clDestruct_IMPL(pCl) -NvBool clUpstreamVgaDecodeEnabled_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1); +NvBool clUpstreamVgaDecodeEnabled_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2); #ifdef __nvoc_chipset_h_disabled -static inline NvBool clUpstreamVgaDecodeEnabled(struct OBJGPU *arg0, struct OBJCL *arg1) { +static inline NvBool clUpstreamVgaDecodeEnabled(struct OBJGPU *arg1, struct OBJCL *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_FALSE; } #else //__nvoc_chipset_h_disabled -#define clUpstreamVgaDecodeEnabled(arg0, arg1) clUpstreamVgaDecodeEnabled_IMPL(arg0, arg1) +#define clUpstreamVgaDecodeEnabled(arg1, arg2) clUpstreamVgaDecodeEnabled_IMPL(arg1, arg2) #endif //__nvoc_chipset_h_disabled -NV_STATUS clPcieGetRootGenSpeed_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1, NvU8 *arg2); +NV_STATUS clPcieGetRootGenSpeed_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2, NvU8 *arg3); #ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clPcieGetRootGenSpeed(struct OBJGPU *arg0, struct OBJCL *arg1, NvU8 *arg2) { +static inline NV_STATUS clPcieGetRootGenSpeed(struct OBJGPU *arg1, struct OBJCL *arg2, NvU8 *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_chipset_h_disabled -#define clPcieGetRootGenSpeed(arg0, arg1, arg2) clPcieGetRootGenSpeed_IMPL(arg0, arg1, arg2) +#define clPcieGetRootGenSpeed(arg1, arg2, arg3) clPcieGetRootGenSpeed_IMPL(arg1, arg2, arg3) #endif //__nvoc_chipset_h_disabled -NV_STATUS clPcieGetDownstreamPortLinkCap2_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1, NvU32 *arg2); +NV_STATUS clPcieGetDownstreamPortLinkCap2_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2, NvU32 *arg3); #ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clPcieGetDownstreamPortLinkCap2(struct OBJGPU *arg0, struct OBJCL *arg1, NvU32 *arg2) { +static inline NV_STATUS clPcieGetDownstreamPortLinkCap2(struct OBJGPU *arg1, struct OBJCL *arg2, NvU32 *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_chipset_h_disabled -#define clPcieGetDownstreamPortLinkCap2(arg0, arg1, arg2) clPcieGetDownstreamPortLinkCap2_IMPL(arg0, arg1, arg2) +#define clPcieGetDownstreamPortLinkCap2(arg1, arg2, arg3) clPcieGetDownstreamPortLinkCap2_IMPL(arg1, arg2, arg3) #endif //__nvoc_chipset_h_disabled -NV_STATUS clCheckUpstreamLtrSupport_IMPL(struct OBJGPU *arg0, struct OBJCL *arg1, NvBool *arg2); +NV_STATUS clCheckUpstreamLtrSupport_IMPL(struct OBJGPU *arg1, struct OBJCL *arg2, NvBool *arg3); #ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clCheckUpstreamLtrSupport(struct OBJGPU *arg0, struct OBJCL *arg1, NvBool *arg2) { +static inline NV_STATUS clCheckUpstreamLtrSupport(struct OBJGPU *arg1, struct OBJCL *arg2, NvBool *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_chipset_h_disabled -#define clCheckUpstreamLtrSupport(arg0, arg1, arg2) clCheckUpstreamLtrSupport_IMPL(arg0, arg1, arg2) +#define clCheckUpstreamLtrSupport(arg1, arg2, arg3) clCheckUpstreamLtrSupport_IMPL(arg1, arg2, arg3) #endif //__nvoc_chipset_h_disabled -NV_STATUS clGetAtomicTypesSupported_IMPL(NvU32 arg0, NvU8 arg1, struct OBJCL *arg2, NvU32 *arg3); +NV_STATUS clGetAtomicTypesSupported_IMPL(NvU32 arg1, NvU8 arg2, struct OBJCL *arg3, NvU32 *arg4); #ifdef __nvoc_chipset_h_disabled -static inline NV_STATUS clGetAtomicTypesSupported(NvU32 arg0, NvU8 arg1, struct OBJCL *arg2, NvU32 *arg3) { +static inline NV_STATUS clGetAtomicTypesSupported(NvU32 arg1, NvU8 arg2, struct OBJCL *arg3, NvU32 *arg4) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_chipset_h_disabled -#define clGetAtomicTypesSupported(arg0, arg1, arg2, arg3) clGetAtomicTypesSupported_IMPL(arg0, arg1, arg2, arg3) +#define clGetAtomicTypesSupported(arg1, arg2, arg3, arg4) clGetAtomicTypesSupported_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_chipset_h_disabled -void clSyncWithGsp_IMPL(struct OBJCL *arg0, GspSystemInfo *arg1); +void clSyncWithGsp_IMPL(struct OBJCL *arg1, GspSystemInfo *arg2); #ifdef __nvoc_chipset_h_disabled -static inline void clSyncWithGsp(struct OBJCL *arg0, GspSystemInfo *arg1) { +static inline void clSyncWithGsp(struct OBJCL *arg1, GspSystemInfo *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJCL was disabled!"); } #else //__nvoc_chipset_h_disabled -#define clSyncWithGsp(arg0, arg1) clSyncWithGsp_IMPL(arg0, arg1) +#define clSyncWithGsp(arg1, arg2) clSyncWithGsp_IMPL(arg1, arg2) #endif //__nvoc_chipset_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_client_nvoc.c b/src/nvidia/generated/g_client_nvoc.c index 26b7f838ce..ab8e8d880e 100644 --- a/src/nvidia/generated/g_client_nvoc.c +++ b/src/nvidia/generated/g_client_nvoc.c @@ -102,10 +102,13 @@ NV_STATUS __nvoc_ctor_UserInfo(UserInfo *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_UserInfo_1(UserInfo *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_UserInfo_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_UserInfo(UserInfo *pThis) { __nvoc_init_funcTable_UserInfo_1(pThis); } @@ -244,50 +247,72 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_RmClient = /*pExportInfo=*/ &__nvoc_export_info_RmClient }; -static NV_STATUS __nvoc_thunk_RmClient_clientValidate(struct RsClient *pClient, const API_SECURITY_INFO *pSecInfo) { - return rmclientValidate((struct RmClient *)(((unsigned char *)pClient) - __nvoc_rtti_RmClient_RsClient.offset), pSecInfo); +// 8 down-thunk(s) defined to bridge methods in RmClient from superclasses + +// rmclientValidate: virtual override (client) base (client) +static NV_STATUS __nvoc_down_thunk_RmClient_clientValidate(struct RsClient *pClient, const API_SECURITY_INFO *pSecInfo) { + return rmclientValidate((struct RmClient *)(((unsigned char *) pClient) - __nvoc_rtti_RmClient_RsClient.offset), pSecInfo); } -static NV_STATUS __nvoc_thunk_RmClient_clientFreeResource(struct RsClient *pClient, struct RsServer *pServer, struct RS_RES_FREE_PARAMS_INTERNAL *pParams) { - return rmclientFreeResource((struct RmClient *)(((unsigned char *)pClient) - __nvoc_rtti_RmClient_RsClient.offset), pServer, pParams); +// rmclientValidateLocks: virtual override (client) base (client) +static NV_STATUS __nvoc_down_thunk_RmClient_clientValidateLocks(struct RsClient *pClient, struct RsServer *pServer, const struct CLIENT_ENTRY *pClientEntry) { + return rmclientValidateLocks((struct RmClient *)(((unsigned char *) pClient) - __nvoc_rtti_RmClient_RsClient.offset), pServer, pClientEntry); } -static NV_STATUS __nvoc_thunk_RmClient_clientInterMap(struct RsClient *pClient, struct RsResourceRef *pMapperRef, struct RsResourceRef *pMappableRef, struct RS_INTER_MAP_PARAMS *pParams) { - return rmclientInterMap((struct RmClient *)(((unsigned char *)pClient) - __nvoc_rtti_RmClient_RsClient.offset), pMapperRef, pMappableRef, pParams); +// rmclientFreeResource: virtual override (client) base (client) +static NV_STATUS __nvoc_down_thunk_RmClient_clientFreeResource(struct RsClient *pClient, struct RsServer *pServer, struct RS_RES_FREE_PARAMS_INTERNAL *pParams) { + return rmclientFreeResource((struct RmClient *)(((unsigned char *) pClient) - __nvoc_rtti_RmClient_RsClient.offset), pServer, pParams); } -static NV_STATUS __nvoc_thunk_RmClient_clientInterUnmap(struct RsClient *pClient, struct RsResourceRef *pMapperRef, struct RS_INTER_UNMAP_PARAMS *pParams) { - return rmclientInterUnmap((struct RmClient *)(((unsigned char *)pClient) - __nvoc_rtti_RmClient_RsClient.offset), pMapperRef, pParams); +// rmclientInterMap: virtual override (client) base (client) +static NV_STATUS __nvoc_down_thunk_RmClient_clientInterMap(struct RsClient *pClient, struct RsResourceRef *pMapperRef, struct RsResourceRef *pMappableRef, struct RS_INTER_MAP_PARAMS *pParams) { + return rmclientInterMap((struct RmClient *)(((unsigned char *) pClient) - __nvoc_rtti_RmClient_RsClient.offset), pMapperRef, pMappableRef, pParams); } -static NV_STATUS __nvoc_thunk_RmClient_clientPostProcessPendingFreeList(struct RsClient *pClient, struct RsResourceRef **ppFirstLowPriRef) { - return rmclientPostProcessPendingFreeList((struct RmClient *)(((unsigned char *)pClient) - __nvoc_rtti_RmClient_RsClient.offset), ppFirstLowPriRef); +// rmclientInterUnmap: virtual override (client) base (client) +static NV_STATUS __nvoc_down_thunk_RmClient_clientInterUnmap(struct RsClient *pClient, struct RsResourceRef *pMapperRef, struct RS_INTER_UNMAP_PARAMS *pParams) { + return rmclientInterUnmap((struct RmClient *)(((unsigned char *) pClient) - __nvoc_rtti_RmClient_RsClient.offset), pMapperRef, pParams); } -static RS_PRIV_LEVEL __nvoc_thunk_RmClient_clientGetCachedPrivilege(struct RsClient *pClient) { - return rmclientGetCachedPrivilege((struct RmClient *)(((unsigned char *)pClient) - __nvoc_rtti_RmClient_RsClient.offset)); +// rmclientPostProcessPendingFreeList: virtual override (client) base (client) +static NV_STATUS __nvoc_down_thunk_RmClient_clientPostProcessPendingFreeList(struct RsClient *pClient, struct RsResourceRef **ppFirstLowPriRef) { + return rmclientPostProcessPendingFreeList((struct RmClient *)(((unsigned char *) pClient) - __nvoc_rtti_RmClient_RsClient.offset), ppFirstLowPriRef); } -static NvBool __nvoc_thunk_RmClient_clientIsAdmin(struct RsClient *pClient, RS_PRIV_LEVEL privLevel) { - return rmclientIsAdmin((struct RmClient *)(((unsigned char *)pClient) - __nvoc_rtti_RmClient_RsClient.offset), privLevel); +// rmclientGetCachedPrivilege: virtual override (client) base (client) +static RS_PRIV_LEVEL __nvoc_down_thunk_RmClient_clientGetCachedPrivilege(struct RsClient *pClient) { + return rmclientGetCachedPrivilege((struct RmClient *)(((unsigned char *) pClient) - __nvoc_rtti_RmClient_RsClient.offset)); } -static NV_STATUS __nvoc_thunk_RsClient_rmclientDestructResourceRef(struct RmClient *pClient, RsServer *pServer, struct RsResourceRef *pResourceRef) { - return clientDestructResourceRef((struct RsClient *)(((unsigned char *)pClient) + __nvoc_rtti_RmClient_RsClient.offset), pServer, pResourceRef); +// rmclientIsAdmin: virtual override (client) base (client) +static NvBool __nvoc_down_thunk_RmClient_clientIsAdmin(struct RsClient *pClient, RS_PRIV_LEVEL privLevel) { + return rmclientIsAdmin((struct RmClient *)(((unsigned char *) pClient) - __nvoc_rtti_RmClient_RsClient.offset), privLevel); } -static NV_STATUS __nvoc_thunk_RsClient_rmclientValidateNewResourceHandle(struct RmClient *pClient, NvHandle hResource, NvBool bRestrict) { - return clientValidateNewResourceHandle((struct RsClient *)(((unsigned char *)pClient) + __nvoc_rtti_RmClient_RsClient.offset), hResource, bRestrict); + +// 4 up-thunk(s) defined to bridge methods in RmClient to superclasses + +// rmclientDestructResourceRef: virtual inherited (client) base (client) +static NV_STATUS __nvoc_up_thunk_RsClient_rmclientDestructResourceRef(struct RmClient *pClient, RsServer *pServer, struct RsResourceRef *pResourceRef) { + return clientDestructResourceRef((struct RsClient *)(((unsigned char *) pClient) + __nvoc_rtti_RmClient_RsClient.offset), pServer, pResourceRef); } -static NV_STATUS __nvoc_thunk_RsClient_rmclientShareResource(struct RmClient *pClient, struct RsResourceRef *pResourceRef, RS_SHARE_POLICY *pSharePolicy, struct CALL_CONTEXT *pCallContext) { - return clientShareResource((struct RsClient *)(((unsigned char *)pClient) + __nvoc_rtti_RmClient_RsClient.offset), pResourceRef, pSharePolicy, pCallContext); +// rmclientUnmapMemory: virtual inherited (client) base (client) +static NV_STATUS __nvoc_up_thunk_RsClient_rmclientUnmapMemory(struct RmClient *pClient, struct RsResourceRef *pResourceRef, struct RS_LOCK_INFO *pLockInfo, struct RsCpuMapping **ppCpuMapping, API_SECURITY_INFO *pSecInfo) { + return clientUnmapMemory((struct RsClient *)(((unsigned char *) pClient) + __nvoc_rtti_RmClient_RsClient.offset), pResourceRef, pLockInfo, ppCpuMapping, pSecInfo); } -static NV_STATUS __nvoc_thunk_RsClient_rmclientUnmapMemory(struct RmClient *pClient, struct RsResourceRef *pResourceRef, struct RS_LOCK_INFO *pLockInfo, struct RsCpuMapping **ppCpuMapping, API_SECURITY_INFO *pSecInfo) { - return clientUnmapMemory((struct RsClient *)(((unsigned char *)pClient) + __nvoc_rtti_RmClient_RsClient.offset), pResourceRef, pLockInfo, ppCpuMapping, pSecInfo); +// rmclientValidateNewResourceHandle: virtual inherited (client) base (client) +static NV_STATUS __nvoc_up_thunk_RsClient_rmclientValidateNewResourceHandle(struct RmClient *pClient, NvHandle hResource, NvBool bRestrict) { + return clientValidateNewResourceHandle((struct RsClient *)(((unsigned char *) pClient) + __nvoc_rtti_RmClient_RsClient.offset), hResource, bRestrict); } +// rmclientShareResource: virtual inherited (client) base (client) +static NV_STATUS __nvoc_up_thunk_RsClient_rmclientShareResource(struct RmClient *pClient, struct RsResourceRef *pResourceRef, RS_SHARE_POLICY *pSharePolicy, struct CALL_CONTEXT *pCallContext) { + return clientShareResource((struct RsClient *)(((unsigned char *) pClient) + __nvoc_rtti_RmClient_RsClient.offset), pResourceRef, pSharePolicy, pCallContext); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_RmClient = { /*numEntries=*/ 0, @@ -324,47 +349,60 @@ NV_STATUS __nvoc_ctor_RmClient(RmClient *pThis, struct PORT_MEM_ALLOCATOR * arg_ return status; } +// Vtable initialization static void __nvoc_init_funcTable_RmClient_1(RmClient *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // rmclientValidate -- virtual override (client) base (client) pThis->__rmclientValidate__ = &rmclientValidate_IMPL; + pThis->__nvoc_base_RsClient.__clientValidate__ = &__nvoc_down_thunk_RmClient_clientValidate; + + // rmclientValidateLocks -- virtual override (client) base (client) + pThis->__rmclientValidateLocks__ = &rmclientValidateLocks_IMPL; + pThis->__nvoc_base_RsClient.__clientValidateLocks__ = &__nvoc_down_thunk_RmClient_clientValidateLocks; + // rmclientFreeResource -- virtual override (client) base (client) pThis->__rmclientFreeResource__ = &rmclientFreeResource_IMPL; + pThis->__nvoc_base_RsClient.__clientFreeResource__ = &__nvoc_down_thunk_RmClient_clientFreeResource; + // rmclientInterMap -- virtual override (client) base (client) pThis->__rmclientInterMap__ = &rmclientInterMap_IMPL; + pThis->__nvoc_base_RsClient.__clientInterMap__ = &__nvoc_down_thunk_RmClient_clientInterMap; + // rmclientInterUnmap -- virtual override (client) base (client) pThis->__rmclientInterUnmap__ = &rmclientInterUnmap_IMPL; + pThis->__nvoc_base_RsClient.__clientInterUnmap__ = &__nvoc_down_thunk_RmClient_clientInterUnmap; + // rmclientPostProcessPendingFreeList -- virtual override (client) base (client) pThis->__rmclientPostProcessPendingFreeList__ = &rmclientPostProcessPendingFreeList_IMPL; + pThis->__nvoc_base_RsClient.__clientPostProcessPendingFreeList__ = &__nvoc_down_thunk_RmClient_clientPostProcessPendingFreeList; + // rmclientGetCachedPrivilege -- virtual override (client) base (client) pThis->__rmclientGetCachedPrivilege__ = &rmclientGetCachedPrivilege_IMPL; + pThis->__nvoc_base_RsClient.__clientGetCachedPrivilege__ = &__nvoc_down_thunk_RmClient_clientGetCachedPrivilege; + // rmclientIsAdmin -- virtual override (client) base (client) pThis->__rmclientIsAdmin__ = &rmclientIsAdmin_IMPL; + pThis->__nvoc_base_RsClient.__clientIsAdmin__ = &__nvoc_down_thunk_RmClient_clientIsAdmin; - pThis->__nvoc_base_RsClient.__clientValidate__ = &__nvoc_thunk_RmClient_clientValidate; + // rmclientDestructResourceRef -- virtual inherited (client) base (client) + pThis->__rmclientDestructResourceRef__ = &__nvoc_up_thunk_RsClient_rmclientDestructResourceRef; - pThis->__nvoc_base_RsClient.__clientFreeResource__ = &__nvoc_thunk_RmClient_clientFreeResource; + // rmclientUnmapMemory -- virtual inherited (client) base (client) + pThis->__rmclientUnmapMemory__ = &__nvoc_up_thunk_RsClient_rmclientUnmapMemory; - pThis->__nvoc_base_RsClient.__clientInterMap__ = &__nvoc_thunk_RmClient_clientInterMap; + // rmclientValidateNewResourceHandle -- virtual inherited (client) base (client) + pThis->__rmclientValidateNewResourceHandle__ = &__nvoc_up_thunk_RsClient_rmclientValidateNewResourceHandle; - pThis->__nvoc_base_RsClient.__clientInterUnmap__ = &__nvoc_thunk_RmClient_clientInterUnmap; + // rmclientShareResource -- virtual inherited (client) base (client) + pThis->__rmclientShareResource__ = &__nvoc_up_thunk_RsClient_rmclientShareResource; +} // End __nvoc_init_funcTable_RmClient_1 with approximately 20 basic block(s). - pThis->__nvoc_base_RsClient.__clientPostProcessPendingFreeList__ = &__nvoc_thunk_RmClient_clientPostProcessPendingFreeList; - - pThis->__nvoc_base_RsClient.__clientGetCachedPrivilege__ = &__nvoc_thunk_RmClient_clientGetCachedPrivilege; - - pThis->__nvoc_base_RsClient.__clientIsAdmin__ = &__nvoc_thunk_RmClient_clientIsAdmin; - - pThis->__rmclientDestructResourceRef__ = &__nvoc_thunk_RsClient_rmclientDestructResourceRef; - - pThis->__rmclientValidateNewResourceHandle__ = &__nvoc_thunk_RsClient_rmclientValidateNewResourceHandle; - - pThis->__rmclientShareResource__ = &__nvoc_thunk_RsClient_rmclientShareResource; - - pThis->__rmclientUnmapMemory__ = &__nvoc_thunk_RsClient_rmclientUnmapMemory; -} +// Initialize vtable(s) for 12 virtual method(s). void __nvoc_init_funcTable_RmClient(RmClient *pThis) { + + // Initialize vtable(s) with 12 per-object function pointer(s). __nvoc_init_funcTable_RmClient_1(pThis); } diff --git a/src/nvidia/generated/g_client_nvoc.h b/src/nvidia/generated/g_client_nvoc.h index c5ac903a12..45085f2980 100644 --- a/src/nvidia/generated/g_client_nvoc.h +++ b/src/nvidia/generated/g_client_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_CLIENT_NVOC_H_ #define _G_CLIENT_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_client_nvoc.h" #ifndef _CLIENT_H_ @@ -59,12 +67,21 @@ typedef struct _def_client_system_event_info CLI_SYSTEM_EVENT_INFO, *PCLI_SYSTEM #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct UserInfo { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RsShared __nvoc_base_RsShared; - struct Object *__nvoc_pbase_Object; - struct RsShared *__nvoc_pbase_RsShared; - struct UserInfo *__nvoc_pbase_UserInfo; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct RsShared *__nvoc_pbase_RsShared; // shr super + struct UserInfo *__nvoc_pbase_UserInfo; // userinfo + + // Data members PUID_TOKEN pUidToken; }; @@ -77,6 +94,7 @@ typedef struct UserInfo UserInfo; #define __nvoc_class_id_UserInfo 0x21d236 #endif /* __nvoc_class_id_UserInfo */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_UserInfo; #define __staticCast_UserInfo(pThis) \ @@ -89,13 +107,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_UserInfo; ((UserInfo*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(UserInfo))) #endif //__nvoc_client_h_disabled - NV_STATUS __nvoc_objCreateDynamic_UserInfo(UserInfo**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_UserInfo(UserInfo**, Dynamic*, NvU32); #define __objCreate_UserInfo(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_UserInfo((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS userinfoConstruct_IMPL(struct UserInfo *arg_pUserInfo); #define __nvoc_userinfoConstruct(arg_pUserInfo) userinfoConstruct_IMPL(arg_pUserInfo) @@ -124,23 +145,35 @@ void userinfoDestruct_IMPL(struct UserInfo *pUserInfo); #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct RmClient { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RsClient __nvoc_base_RsClient; - struct Object *__nvoc_pbase_Object; - struct RsClient *__nvoc_pbase_RsClient; - struct RmClient *__nvoc_pbase_RmClient; - NV_STATUS (*__rmclientValidate__)(struct RmClient *, const API_SECURITY_INFO *); - NV_STATUS (*__rmclientFreeResource__)(struct RmClient *, struct RsServer *, struct RS_RES_FREE_PARAMS_INTERNAL *); - NV_STATUS (*__rmclientInterMap__)(struct RmClient *, struct RsResourceRef *, struct RsResourceRef *, struct RS_INTER_MAP_PARAMS *); - NV_STATUS (*__rmclientInterUnmap__)(struct RmClient *, struct RsResourceRef *, struct RS_INTER_UNMAP_PARAMS *); - NV_STATUS (*__rmclientPostProcessPendingFreeList__)(struct RmClient *, struct RsResourceRef **); - RS_PRIV_LEVEL (*__rmclientGetCachedPrivilege__)(struct RmClient *); - NvBool (*__rmclientIsAdmin__)(struct RmClient *, RS_PRIV_LEVEL); - NV_STATUS (*__rmclientDestructResourceRef__)(struct RmClient *, RsServer *, struct RsResourceRef *); - NV_STATUS (*__rmclientValidateNewResourceHandle__)(struct RmClient *, NvHandle, NvBool); - NV_STATUS (*__rmclientShareResource__)(struct RmClient *, struct RsResourceRef *, RS_SHARE_POLICY *, struct CALL_CONTEXT *); - NV_STATUS (*__rmclientUnmapMemory__)(struct RmClient *, struct RsResourceRef *, struct RS_LOCK_INFO *, struct RsCpuMapping **, API_SECURITY_INFO *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct RsClient *__nvoc_pbase_RsClient; // client super + struct RmClient *__nvoc_pbase_RmClient; // rmclient + + // Vtable with 12 per-object function pointers + NV_STATUS (*__rmclientValidate__)(struct RmClient * /*this*/, const API_SECURITY_INFO *); // virtual override (client) base (client) + NV_STATUS (*__rmclientValidateLocks__)(struct RmClient * /*this*/, struct RsServer *, const struct CLIENT_ENTRY *); // virtual override (client) base (client) + NV_STATUS (*__rmclientFreeResource__)(struct RmClient * /*this*/, struct RsServer *, struct RS_RES_FREE_PARAMS_INTERNAL *); // virtual override (client) base (client) + NV_STATUS (*__rmclientInterMap__)(struct RmClient * /*this*/, struct RsResourceRef *, struct RsResourceRef *, struct RS_INTER_MAP_PARAMS *); // virtual override (client) base (client) + NV_STATUS (*__rmclientInterUnmap__)(struct RmClient * /*this*/, struct RsResourceRef *, struct RS_INTER_UNMAP_PARAMS *); // virtual override (client) base (client) + NV_STATUS (*__rmclientPostProcessPendingFreeList__)(struct RmClient * /*this*/, struct RsResourceRef **); // virtual override (client) base (client) + RS_PRIV_LEVEL (*__rmclientGetCachedPrivilege__)(struct RmClient * /*this*/); // virtual override (client) base (client) + NvBool (*__rmclientIsAdmin__)(struct RmClient * /*this*/, RS_PRIV_LEVEL); // virtual override (client) base (client) + NV_STATUS (*__rmclientDestructResourceRef__)(struct RmClient * /*this*/, RsServer *, struct RsResourceRef *); // virtual inherited (client) base (client) + NV_STATUS (*__rmclientUnmapMemory__)(struct RmClient * /*this*/, struct RsResourceRef *, struct RS_LOCK_INFO *, struct RsCpuMapping **, API_SECURITY_INFO *); // virtual inherited (client) base (client) + NV_STATUS (*__rmclientValidateNewResourceHandle__)(struct RmClient * /*this*/, NvHandle, NvBool); // virtual inherited (client) base (client) + NV_STATUS (*__rmclientShareResource__)(struct RmClient * /*this*/, struct RsResourceRef *, RS_SHARE_POLICY *, struct CALL_CONTEXT *); // virtual inherited (client) base (client) + + // Data members RS_PRIV_LEVEL cachedPrivilege; NvBool bIsRootNonPriv; NvU32 ProcID; @@ -158,6 +191,7 @@ struct RmClient { NvBool bIsClientVirtualMode; NvS32 imexChannel; PNODE pCliSyncGpuBoostTree; + NvS32 lockStressCounter; }; #ifndef __NVOC_CLASS_RmClient_TYPEDEF__ @@ -169,6 +203,7 @@ typedef struct RmClient RmClient; #define __nvoc_class_id_RmClient 0xb23d83 #endif /* __nvoc_class_id_RmClient */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmClient; #define __staticCast_RmClient(pThis) \ @@ -181,62 +216,68 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmClient; ((RmClient*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(RmClient))) #endif //__nvoc_client_h_disabled - NV_STATUS __nvoc_objCreateDynamic_RmClient(RmClient**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_RmClient(RmClient**, Dynamic*, NvU32, struct PORT_MEM_ALLOCATOR * arg_pAllocator, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_RmClient(ppNewObj, pParent, createFlags, arg_pAllocator, arg_pParams) \ __nvoc_objCreate_RmClient((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pAllocator, arg_pParams) + +// Wrapper macros +#define rmclientValidate_FNPTR(pClient) pClient->__rmclientValidate__ #define rmclientValidate(pClient, pSecInfo) rmclientValidate_DISPATCH(pClient, pSecInfo) +#define rmclientValidateLocks_FNPTR(pClient) pClient->__rmclientValidateLocks__ +#define rmclientValidateLocks(pClient, pServer, pClientEntry) rmclientValidateLocks_DISPATCH(pClient, pServer, pClientEntry) +#define rmclientFreeResource_FNPTR(pClient) pClient->__rmclientFreeResource__ #define rmclientFreeResource(pClient, pServer, pParams) rmclientFreeResource_DISPATCH(pClient, pServer, pParams) +#define rmclientInterMap_FNPTR(pClient) pClient->__rmclientInterMap__ #define rmclientInterMap(pClient, pMapperRef, pMappableRef, pParams) rmclientInterMap_DISPATCH(pClient, pMapperRef, pMappableRef, pParams) +#define rmclientInterUnmap_FNPTR(pClient) pClient->__rmclientInterUnmap__ #define rmclientInterUnmap(pClient, pMapperRef, pParams) rmclientInterUnmap_DISPATCH(pClient, pMapperRef, pParams) +#define rmclientPostProcessPendingFreeList_FNPTR(pClient) pClient->__rmclientPostProcessPendingFreeList__ #define rmclientPostProcessPendingFreeList(pClient, ppFirstLowPriRef) rmclientPostProcessPendingFreeList_DISPATCH(pClient, ppFirstLowPriRef) +#define rmclientGetCachedPrivilege_FNPTR(pClient) pClient->__rmclientGetCachedPrivilege__ #define rmclientGetCachedPrivilege(pClient) rmclientGetCachedPrivilege_DISPATCH(pClient) +#define rmclientIsAdmin_FNPTR(pClient) pClient->__rmclientIsAdmin__ #define rmclientIsAdmin(pClient, privLevel) rmclientIsAdmin_DISPATCH(pClient, privLevel) +#define rmclientDestructResourceRef_FNPTR(pClient) pClient->__nvoc_base_RsClient.__clientDestructResourceRef__ #define rmclientDestructResourceRef(pClient, pServer, pResourceRef) rmclientDestructResourceRef_DISPATCH(pClient, pServer, pResourceRef) +#define rmclientUnmapMemory_FNPTR(pClient) pClient->__nvoc_base_RsClient.__clientUnmapMemory__ +#define rmclientUnmapMemory(pClient, pResourceRef, pLockInfo, ppCpuMapping, pSecInfo) rmclientUnmapMemory_DISPATCH(pClient, pResourceRef, pLockInfo, ppCpuMapping, pSecInfo) +#define rmclientValidateNewResourceHandle_FNPTR(pClient) pClient->__nvoc_base_RsClient.__clientValidateNewResourceHandle__ #define rmclientValidateNewResourceHandle(pClient, hResource, bRestrict) rmclientValidateNewResourceHandle_DISPATCH(pClient, hResource, bRestrict) +#define rmclientShareResource_FNPTR(pClient) pClient->__nvoc_base_RsClient.__clientShareResource__ #define rmclientShareResource(pClient, pResourceRef, pSharePolicy, pCallContext) rmclientShareResource_DISPATCH(pClient, pResourceRef, pSharePolicy, pCallContext) -#define rmclientUnmapMemory(pClient, pResourceRef, pLockInfo, ppCpuMapping, pSecInfo) rmclientUnmapMemory_DISPATCH(pClient, pResourceRef, pLockInfo, ppCpuMapping, pSecInfo) -NV_STATUS rmclientValidate_IMPL(struct RmClient *pClient, const API_SECURITY_INFO *pSecInfo); +// Dispatch functions static inline NV_STATUS rmclientValidate_DISPATCH(struct RmClient *pClient, const API_SECURITY_INFO *pSecInfo) { return pClient->__rmclientValidate__(pClient, pSecInfo); } -NV_STATUS rmclientFreeResource_IMPL(struct RmClient *pClient, struct RsServer *pServer, struct RS_RES_FREE_PARAMS_INTERNAL *pParams); +static inline NV_STATUS rmclientValidateLocks_DISPATCH(struct RmClient *pClient, struct RsServer *pServer, const struct CLIENT_ENTRY *pClientEntry) { + return pClient->__rmclientValidateLocks__(pClient, pServer, pClientEntry); +} static inline NV_STATUS rmclientFreeResource_DISPATCH(struct RmClient *pClient, struct RsServer *pServer, struct RS_RES_FREE_PARAMS_INTERNAL *pParams) { return pClient->__rmclientFreeResource__(pClient, pServer, pParams); } -NV_STATUS rmclientInterMap_IMPL(struct RmClient *pClient, struct RsResourceRef *pMapperRef, struct RsResourceRef *pMappableRef, struct RS_INTER_MAP_PARAMS *pParams); - static inline NV_STATUS rmclientInterMap_DISPATCH(struct RmClient *pClient, struct RsResourceRef *pMapperRef, struct RsResourceRef *pMappableRef, struct RS_INTER_MAP_PARAMS *pParams) { return pClient->__rmclientInterMap__(pClient, pMapperRef, pMappableRef, pParams); } -NV_STATUS rmclientInterUnmap_IMPL(struct RmClient *pClient, struct RsResourceRef *pMapperRef, struct RS_INTER_UNMAP_PARAMS *pParams); - static inline NV_STATUS rmclientInterUnmap_DISPATCH(struct RmClient *pClient, struct RsResourceRef *pMapperRef, struct RS_INTER_UNMAP_PARAMS *pParams) { return pClient->__rmclientInterUnmap__(pClient, pMapperRef, pParams); } -NV_STATUS rmclientPostProcessPendingFreeList_IMPL(struct RmClient *pClient, struct RsResourceRef **ppFirstLowPriRef); - static inline NV_STATUS rmclientPostProcessPendingFreeList_DISPATCH(struct RmClient *pClient, struct RsResourceRef **ppFirstLowPriRef) { return pClient->__rmclientPostProcessPendingFreeList__(pClient, ppFirstLowPriRef); } -RS_PRIV_LEVEL rmclientGetCachedPrivilege_IMPL(struct RmClient *pClient); - static inline RS_PRIV_LEVEL rmclientGetCachedPrivilege_DISPATCH(struct RmClient *pClient) { return pClient->__rmclientGetCachedPrivilege__(pClient); } -NvBool rmclientIsAdmin_IMPL(struct RmClient *pClient, RS_PRIV_LEVEL privLevel); - static inline NvBool rmclientIsAdmin_DISPATCH(struct RmClient *pClient, RS_PRIV_LEVEL privLevel) { return pClient->__rmclientIsAdmin__(pClient, privLevel); } @@ -245,6 +286,10 @@ static inline NV_STATUS rmclientDestructResourceRef_DISPATCH(struct RmClient *pC return pClient->__rmclientDestructResourceRef__(pClient, pServer, pResourceRef); } +static inline NV_STATUS rmclientUnmapMemory_DISPATCH(struct RmClient *pClient, struct RsResourceRef *pResourceRef, struct RS_LOCK_INFO *pLockInfo, struct RsCpuMapping **ppCpuMapping, API_SECURITY_INFO *pSecInfo) { + return pClient->__rmclientUnmapMemory__(pClient, pResourceRef, pLockInfo, ppCpuMapping, pSecInfo); +} + static inline NV_STATUS rmclientValidateNewResourceHandle_DISPATCH(struct RmClient *pClient, NvHandle hResource, NvBool bRestrict) { return pClient->__rmclientValidateNewResourceHandle__(pClient, hResource, bRestrict); } @@ -253,9 +298,21 @@ static inline NV_STATUS rmclientShareResource_DISPATCH(struct RmClient *pClient, return pClient->__rmclientShareResource__(pClient, pResourceRef, pSharePolicy, pCallContext); } -static inline NV_STATUS rmclientUnmapMemory_DISPATCH(struct RmClient *pClient, struct RsResourceRef *pResourceRef, struct RS_LOCK_INFO *pLockInfo, struct RsCpuMapping **ppCpuMapping, API_SECURITY_INFO *pSecInfo) { - return pClient->__rmclientUnmapMemory__(pClient, pResourceRef, pLockInfo, ppCpuMapping, pSecInfo); -} +NV_STATUS rmclientValidate_IMPL(struct RmClient *pClient, const API_SECURITY_INFO *pSecInfo); + +NV_STATUS rmclientValidateLocks_IMPL(struct RmClient *pClient, struct RsServer *pServer, const struct CLIENT_ENTRY *pClientEntry); + +NV_STATUS rmclientFreeResource_IMPL(struct RmClient *pClient, struct RsServer *pServer, struct RS_RES_FREE_PARAMS_INTERNAL *pParams); + +NV_STATUS rmclientInterMap_IMPL(struct RmClient *pClient, struct RsResourceRef *pMapperRef, struct RsResourceRef *pMappableRef, struct RS_INTER_MAP_PARAMS *pParams); + +NV_STATUS rmclientInterUnmap_IMPL(struct RmClient *pClient, struct RsResourceRef *pMapperRef, struct RS_INTER_UNMAP_PARAMS *pParams); + +NV_STATUS rmclientPostProcessPendingFreeList_IMPL(struct RmClient *pClient, struct RsResourceRef **ppFirstLowPriRef); + +RS_PRIV_LEVEL rmclientGetCachedPrivilege_IMPL(struct RmClient *pClient); + +NvBool rmclientIsAdmin_IMPL(struct RmClient *pClient, RS_PRIV_LEVEL privLevel); NV_STATUS rmclientConstruct_IMPL(struct RmClient *arg_pClient, struct PORT_MEM_ALLOCATOR *arg_pAllocator, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_client_resource_nvoc.c b/src/nvidia/generated/g_client_resource_nvoc.c index 47478a522a..71a0c00c0a 100644 --- a/src/nvidia/generated/g_client_resource_nvoc.c +++ b/src/nvidia/generated/g_client_resource_nvoc.c @@ -102,98 +102,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_RmClientResource = /*pExportInfo=*/ &__nvoc_export_info_RmClientResource }; -static NvBool __nvoc_thunk_RmClientResource_resAccessCallback(struct RsResource *pRmCliRes, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return cliresAccessCallback((struct RmClientResource *)(((unsigned char *)pRmCliRes) - __nvoc_rtti_RmClientResource_RsResource.offset), pInvokingClient, pAllocParams, accessRight); -} - -static NvBool __nvoc_thunk_RmClientResource_resShareCallback(struct RsResource *pRmCliRes, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return cliresShareCallback((struct RmClientResource *)(((unsigned char *)pRmCliRes) - __nvoc_rtti_RmClientResource_RsResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmClientResource_resControl_Prologue(struct RsResource *pRmCliRes, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return cliresControl_Prologue((struct RmClientResource *)(((unsigned char *)pRmCliRes) - __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams); -} - -static void __nvoc_thunk_RmClientResource_resControl_Epilogue(struct RsResource *pRmCliRes, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - cliresControl_Epilogue((struct RmClientResource *)(((unsigned char *)pRmCliRes) - __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_cliresControl(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControl((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_cliresUnmap(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RsResource_cliresMapTo(struct RmClientResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pParams); -} - -static void __nvoc_thunk_Notifier_cliresSetNotificationShare(struct RmClientResource *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_RmClientResource_Notifier.offset), pNotifShare); -} - -static NV_STATUS __nvoc_thunk_RsResource_cliresControlFilter(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams); -} - -static void __nvoc_thunk_RsResource_cliresAddAdditionalDependants(struct RsClient *pClient, struct RmClientResource *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pReference); -} - -static NvU32 __nvoc_thunk_RsResource_cliresGetRefCount(struct RmClientResource *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmClientResource_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_Notifier_cliresUnregisterEvent(struct RmClientResource *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_RmClientResource_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static NV_STATUS __nvoc_thunk_RsResource_cliresControlSerialization_Prologue(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlSerialization_Prologue((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_cliresCanCopy(struct RmClientResource *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmClientResource_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_cliresIsPartialUnmapSupported(struct RmClientResource *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmClientResource_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_cliresPreDestruct(struct RmClientResource *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmClientResource_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_cliresUnmapFrom(struct RmClientResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_cliresIsDuplicate(struct RmClientResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RsResource_cliresControlSerialization_Epilogue(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - resControlSerialization_Epilogue((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams); -} - -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_cliresGetNotificationListPtr(struct RmClientResource *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_RmClientResource_Notifier.offset)); -} - -static struct NotifShare *__nvoc_thunk_Notifier_cliresGetNotificationShare(struct RmClientResource *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_RmClientResource_Notifier.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_cliresMap(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_Notifier_cliresGetOrAllocNotifShare(struct RmClientResource *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_RmClientResource_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -201,12 +109,12 @@ static NV_STATUS __nvoc_thunk_Notifier_cliresGetOrAllocNotifShare(struct RmClien static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClientResource[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGetCpuInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, /*accessRight=*/0x0u, /*methodId=*/ 0x102u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GET_CPU_INFO_PARAMS), @@ -216,12 +124,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4013u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGetChipsetInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4013u) - /*flags=*/ 0x4013u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40bu) + /*flags=*/ 0x40bu, /*accessRight=*/0x0u, /*methodId=*/ 0x104u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GET_CHIPSET_INFO_PARAMS), @@ -231,12 +139,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGetClassList_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x108u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GET_CLASSLIST_PARAMS), @@ -246,12 +154,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x805u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x105u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGetLockTimes_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x805u) - /*flags=*/ 0x805u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x105u) + /*flags=*/ 0x105u, /*accessRight=*/0x0u, /*methodId=*/ 0x109u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GET_LOCK_TIMES_PARAMS), @@ -261,12 +169,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemNotifyEvent_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x110u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_NOTIFY_EVENT_PARAMS), @@ -276,12 +184,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [5] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGetPlatformType_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x111u, /*paramSize=*/ sizeof(NV0000_CTRL_CMD_SYSTEM_GET_PLATFORM_TYPE_PARAMS), @@ -291,12 +199,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [6] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemDebugCtrlRmMsg_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x121u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_DEBUG_RMMSG_CTRL_PARAMS), @@ -306,12 +214,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [7] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGpsControl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x122u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GPS_CONTROL_PARAMS), @@ -321,12 +229,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [8] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGpsBatchControl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x123u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GPS_BATCH_CONTROL_PARAMS), @@ -336,12 +244,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [9] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGetHwbcInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x124u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GET_HWBC_INFO_PARAMS), @@ -351,12 +259,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [10] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGetP2pCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) - /*flags=*/ 0x810u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*flags=*/ 0x108u, /*accessRight=*/0x0u, /*methodId=*/ 0x127u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS), @@ -366,12 +274,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [11] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGpsCtrl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x12au, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GPS_CTRL_PARAMS), @@ -381,12 +289,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [12] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGetP2pCapsV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) - /*flags=*/ 0x810u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*flags=*/ 0x108u, /*accessRight=*/0x0u, /*methodId=*/ 0x12bu, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GET_P2P_CAPS_V2_PARAMS), @@ -396,12 +304,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [13] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGetPerfSensorCounters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x12cu, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GPS_GET_PERF_SENSOR_COUNTERS_PARAMS), @@ -411,12 +319,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [14] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGpsCallAcpi_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x12du, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GPS_CALL_ACPI_PARAMS), @@ -426,12 +334,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [15] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGetExtendedPerfSensorCounters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x12eu, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GPS_GET_PERF_SENSOR_COUNTERS_PARAMS), @@ -441,12 +349,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [16] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGpsGetFrmData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x12fu, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GPS_GET_FRM_DATA_PARAMS), @@ -456,12 +364,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [17] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemExecuteAcpiMethod_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x130u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS), @@ -471,12 +379,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [18] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGpsSetFrmData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x132u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GPS_SET_FRM_DATA_PARAMS), @@ -486,12 +394,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [19] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGetVgxSystemInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x133u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GET_VGX_SYSTEM_INFO_PARAMS), @@ -501,12 +409,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [20] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGetGpusPowerStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x134u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GET_GPUS_POWER_STATUS_PARAMS), @@ -516,12 +424,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [21] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGetPrivilegedStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x135u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GET_PRIVILEGED_STATUS_PARAMS), @@ -531,12 +439,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [22] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGetFabricStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x136u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GET_FABRIC_STATUS_PARAMS), @@ -546,12 +454,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [23] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdVgpuGetVgpuVersion_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x137u, /*paramSize=*/ sizeof(NV0000_CTRL_VGPU_GET_VGPU_VERSION_PARAMS), @@ -561,12 +469,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [24] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdVgpuSetVgpuVersion_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x138u, /*paramSize=*/ sizeof(NV0000_CTRL_VGPU_SET_VGPU_VERSION_PARAMS), @@ -576,12 +484,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [25] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGetRmInstanceId_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, /*accessRight=*/0x0u, /*methodId=*/ 0x139u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GET_RM_INSTANCE_ID_PARAMS), @@ -591,12 +499,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [26] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGetP2pCapsMatrix_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) - /*flags=*/ 0x810u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*flags=*/ 0x108u, /*accessRight=*/0x0u, /*methodId=*/ 0x13au, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GET_P2P_CAPS_MATRIX_PARAMS), @@ -606,12 +514,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [27] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemNVPCFGetPowerModeInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x13bu, /*paramSize=*/ sizeof(NV0000_CTRL_CMD_SYSTEM_NVPCF_GET_POWER_MODE_INFO_PARAMS), @@ -636,12 +544,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [29] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x807u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x107u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGetClientDatabaseInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x807u) - /*flags=*/ 0x807u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x107u) + /*flags=*/ 0x107u, /*accessRight=*/0x0u, /*methodId=*/ 0x13du, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GET_CLIENT_DATABASE_INFO_PARAMS), @@ -651,12 +559,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [30] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGetBuildVersionV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4811u) - /*flags=*/ 0x4811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) + /*flags=*/ 0x509u, /*accessRight=*/0x0u, /*methodId=*/ 0x13eu, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_V2_PARAMS), @@ -681,12 +589,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [32] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemPfmreqhndlrControl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x140u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_CONTROL_PARAMS), @@ -696,12 +604,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [33] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemPfmreqhndlrBatchControl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x141u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_BATCH_CONTROL_PARAMS), @@ -711,12 +619,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [34] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemPfmreqhndlrCtrl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x142u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_CTRL_PARAMS), @@ -726,12 +634,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [35] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemPfmreqhndlrCallAcpi_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x143u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_CALL_ACPI_PARAMS), @@ -741,12 +649,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [36] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemPfmreqhndlrGetFrmData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x144u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_FRM_DATA_PARAMS), @@ -756,12 +664,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [37] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemPfmreqhndlrSetFrmData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x145u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_SET_FRM_DATA_PARAMS), @@ -771,12 +679,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [38] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemPfmreqhndlrGetPerfSensorCounters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x146u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_PERF_SENSOR_COUNTERS_PARAMS), @@ -786,12 +694,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [39] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x147u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_PERF_SENSOR_COUNTERS_PARAMS), @@ -801,12 +709,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [40] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSystemGetFeatures_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x1f0u, /*paramSize=*/ sizeof(NV0000_CTRL_SYSTEM_GET_FEATURES_PARAMS), @@ -816,12 +724,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [41] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuGetAttachedIds_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, /*accessRight=*/0x0u, /*methodId=*/ 0x201u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_GET_ATTACHED_IDS_PARAMS), @@ -831,12 +739,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [42] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuGetIdInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x202u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_GET_ID_INFO_PARAMS), @@ -846,12 +754,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [43] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuGetInitStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x203u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_GET_INIT_STATUS_PARAMS), @@ -861,12 +769,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [44] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuGetDeviceIds_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, /*accessRight=*/0x0u, /*methodId=*/ 0x204u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_GET_DEVICE_IDS_PARAMS), @@ -876,12 +784,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [45] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuGetIdInfoV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x205u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_GET_ID_INFO_V2_PARAMS), @@ -891,12 +799,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [46] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuGetProbedIds_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x214u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_GET_PROBED_IDS_PARAMS), @@ -906,12 +814,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [47] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuAttachIds_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x215u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_ATTACH_IDS_PARAMS), @@ -921,12 +829,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [48] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuDetachIds_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x216u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_DETACH_IDS_PARAMS), @@ -936,12 +844,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [49] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuGetVideoLinks_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x219u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_GET_VIDEO_LINKS_PARAMS), @@ -951,12 +859,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [50] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuGetPciInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x21bu, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_GET_PCI_INFO_PARAMS), @@ -966,12 +874,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [51] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuGetSvmSize_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x240u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_GET_SVM_SIZE_PARAMS), @@ -981,12 +889,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [52] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuGetUuidInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x274u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_GET_UUID_INFO_PARAMS), @@ -996,12 +904,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [53] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuGetUuidFromGpuId_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x275u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_GET_UUID_FROM_GPU_ID_PARAMS), @@ -1026,12 +934,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [55] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuQueryGpuDrainState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x279u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_QUERY_DRAIN_STATE_PARAMS), @@ -1041,12 +949,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [56] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuGetMemOpEnable_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4811u) - /*flags=*/ 0x4811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) + /*flags=*/ 0x509u, /*accessRight=*/0x0u, /*methodId=*/ 0x27bu, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_GET_MEMOP_ENABLE_PARAMS), @@ -1056,12 +964,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [57] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x13u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xbu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuDisableNvlinkInit_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x13u) - /*flags=*/ 0x13u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xbu) + /*flags=*/ 0xbu, /*accessRight=*/0x0u, /*methodId=*/ 0x281u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_DISABLE_NVLINK_INIT_PARAMS), @@ -1071,12 +979,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [58] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdLegacyConfig_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x282u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_LEGACY_CONFIG_PARAMS), @@ -1086,12 +994,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [59] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdIdleChannels_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x283u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_IDLE_CHANNELS_PARAMS), @@ -1101,12 +1009,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [60] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdPushGspUcode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x285u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_PUSH_GSP_UCODE_PARAMS), @@ -1131,12 +1039,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [62] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuGetNvlinkBwMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, /*accessRight=*/0x0u, /*methodId=*/ 0x287u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_GET_NVLINK_BW_MODE_PARAMS), @@ -1146,12 +1054,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [63] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuGetActiveDeviceIds_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, /*accessRight=*/0x0u, /*methodId=*/ 0x288u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_GET_ACTIVE_DEVICE_IDS_PARAMS), @@ -1161,12 +1069,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [64] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuAsyncAttachId_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x289u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_ASYNC_ATTACH_ID_PARAMS), @@ -1176,12 +1084,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [65] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuWaitAttachId_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x290u, /*paramSize=*/ sizeof(NV0000_CTRL_GPU_WAIT_ATTACH_ID_PARAMS), @@ -1191,12 +1099,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [66] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGsyncGetAttachedIds_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) - /*flags=*/ 0x810u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*flags=*/ 0x108u, /*accessRight=*/0x0u, /*methodId=*/ 0x301u, /*paramSize=*/ sizeof(NV0000_CTRL_GSYNC_GET_ATTACHED_IDS_PARAMS), @@ -1206,12 +1114,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [67] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGsyncGetIdInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x302u, /*paramSize=*/ sizeof(NV0000_CTRL_GSYNC_GET_ID_INFO_PARAMS), @@ -1221,12 +1129,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [68] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdDiagProfileRpc_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x488u, /*paramSize=*/ sizeof(NV0000_CTRL_DIAG_PROFILE_RPC_PARAMS), @@ -1236,12 +1144,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [69] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdDiagDumpRpc_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x489u, /*paramSize=*/ sizeof(NV0000_CTRL_DIAG_DUMP_RPC_PARAMS), @@ -1251,12 +1159,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [70] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdEventSetNotification_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x501u, /*paramSize=*/ sizeof(NV0000_CTRL_EVENT_SET_NOTIFICATION_PARAMS), @@ -1266,12 +1174,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [71] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdEventGetSystemEventStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x502u, /*paramSize=*/ sizeof(NV0000_CTRL_GET_SYSTEM_EVENT_STATUS_PARAMS), @@ -1281,12 +1189,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [72] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdNvdGetDumpSize_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x601u, /*paramSize=*/ sizeof(NV0000_CTRL_NVD_GET_DUMP_SIZE_PARAMS), @@ -1311,12 +1219,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [74] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdNvdGetTimestamp_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, /*accessRight=*/0x0u, /*methodId=*/ 0x603u, /*paramSize=*/ sizeof(NV0000_CTRL_NVD_GET_TIMESTAMP_PARAMS), @@ -1371,12 +1279,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [78] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdNvdGetRcerrRpt_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x607u, /*paramSize=*/ sizeof(NV0000_CTRL_CMD_NVD_GET_RCERR_RPT_PARAMS), @@ -1386,12 +1294,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [79] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSetSubProcessID_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x901u, /*paramSize=*/ sizeof(NV0000_CTRL_SET_SUB_PROCESS_ID_PARAMS), @@ -1401,12 +1309,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [80] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdDisableSubProcessUserdIsolation_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x902u, /*paramSize=*/ sizeof(NV0000_CTRL_DISABLE_SUB_PROCESS_USERD_ISOLATION_PARAMS), @@ -1416,12 +1324,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [81] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSyncGpuBoostInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0xa01u, /*paramSize=*/ sizeof(NV0000_SYNC_GPU_BOOST_INFO_PARAMS), @@ -1461,12 +1369,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [84] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdSyncGpuBoostGroupInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0xa04u, /*paramSize=*/ sizeof(NV0000_SYNC_GPU_BOOST_GROUP_INFO_PARAMS), @@ -1476,12 +1384,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [85] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x140004u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuAcctSetAccountingState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x140004u) - /*flags=*/ 0x140004u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) + /*flags=*/ 0x14004u, /*accessRight=*/0x0u, /*methodId=*/ 0xb01u, /*paramSize=*/ sizeof(NV0000_CTRL_GPUACCT_SET_ACCOUNTING_STATE_PARAMS), @@ -1491,12 +1399,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [86] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuAcctGetAccountingState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xb02u, /*paramSize=*/ sizeof(NV0000_CTRL_GPUACCT_GET_ACCOUNTING_STATE_PARAMS), @@ -1506,12 +1414,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [87] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuAcctGetProcAccountingInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xb03u, /*paramSize=*/ sizeof(NV0000_CTRL_GPUACCT_GET_PROC_ACCOUNTING_INFO_PARAMS), @@ -1521,12 +1429,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [88] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuAcctGetAccountingPids_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xb04u, /*paramSize=*/ sizeof(NV0000_CTRL_GPUACCT_GET_ACCOUNTING_PIDS_PARAMS), @@ -1536,12 +1444,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [89] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x140004u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdGpuAcctClearAccountingData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x140004u) - /*flags=*/ 0x140004u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) + /*flags=*/ 0x14004u, /*accessRight=*/0x0u, /*methodId=*/ 0xb05u, /*paramSize=*/ sizeof(NV0000_CTRL_GPUACCT_CLEAR_ACCOUNTING_DATA_PARAMS), @@ -1551,27 +1459,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient #endif }, { /* [90] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) cliresCtrlCmdVgpuGetStartData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xc01u, - /*paramSize=*/ sizeof(NV0000_CTRL_VGPU_GET_START_DATA_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_RmClientResource.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "cliresCtrlCmdVgpuGetStartData" -#endif - }, - { /* [91] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdClientGetAddrSpaceType_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0xd01u, /*paramSize=*/ sizeof(NV0000_CTRL_CLIENT_GET_ADDR_SPACE_TYPE_PARAMS), @@ -1580,13 +1473,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient /*func=*/ "cliresCtrlCmdClientGetAddrSpaceType" #endif }, - { /* [92] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + { /* [91] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdClientGetHandleInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0xd02u, /*paramSize=*/ sizeof(NV0000_CTRL_CLIENT_GET_HANDLE_INFO_PARAMS), @@ -1595,13 +1488,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient /*func=*/ "cliresCtrlCmdClientGetHandleInfo" #endif }, - { /* [93] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + { /* [92] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdClientGetAccessRights_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0xd03u, /*paramSize=*/ sizeof(NV0000_CTRL_CLIENT_GET_ACCESS_RIGHTS_PARAMS), @@ -1610,13 +1503,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient /*func=*/ "cliresCtrlCmdClientGetAccessRights" #endif }, - { /* [94] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + { /* [93] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdClientSetInheritedSharePolicy_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0xd04u, /*paramSize=*/ sizeof(NV0000_CTRL_CLIENT_SET_INHERITED_SHARE_POLICY_PARAMS), @@ -1625,13 +1518,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient /*func=*/ "cliresCtrlCmdClientSetInheritedSharePolicy" #endif }, - { /* [95] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + { /* [94] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdClientGetChildHandle_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0xd05u, /*paramSize=*/ sizeof(NV0000_CTRL_CMD_CLIENT_GET_CHILD_HANDLE_PARAMS), @@ -1640,13 +1533,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient /*func=*/ "cliresCtrlCmdClientGetChildHandle" #endif }, - { /* [96] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + { /* [95] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdClientShareObject_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0xd06u, /*paramSize=*/ sizeof(NV0000_CTRL_CLIENT_SHARE_OBJECT_PARAMS), @@ -1655,13 +1548,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient /*func=*/ "cliresCtrlCmdClientShareObject" #endif }, - { /* [97] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + { /* [96] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdObjectsAreDuplicates_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0xd07u, /*paramSize=*/ sizeof(NV0000_CTRL_CLIENT_OBJECTS_ARE_DUPLICATES_PARAMS), @@ -1670,13 +1563,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient /*func=*/ "cliresCtrlCmdObjectsAreDuplicates" #endif }, - { /* [98] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + { /* [97] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdClientSubscribeToImexChannel_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0xd08u, /*paramSize=*/ sizeof(NV0000_CTRL_CLIENT_SUBSCRIBE_TO_IMEX_CHANNEL_PARAMS), @@ -1685,13 +1578,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient /*func=*/ "cliresCtrlCmdClientSubscribeToImexChannel" #endif }, - { /* [99] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [98] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdOsUnixFlushUserCache_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x3d02u, /*paramSize=*/ sizeof(NV0000_CTRL_OS_UNIX_FLUSH_USER_CACHE_PARAMS), @@ -1700,13 +1593,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient /*func=*/ "cliresCtrlCmdOsUnixFlushUserCache" #endif }, - { /* [100] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + { /* [99] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdOsUnixExportObjectToFd_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x3d05u, /*paramSize=*/ sizeof(NV0000_CTRL_OS_UNIX_EXPORT_OBJECT_TO_FD_PARAMS), @@ -1715,13 +1608,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient /*func=*/ "cliresCtrlCmdOsUnixExportObjectToFd" #endif }, - { /* [101] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + { /* [100] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdOsUnixImportObjectFromFd_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x3d06u, /*paramSize=*/ sizeof(NV0000_CTRL_OS_UNIX_IMPORT_OBJECT_FROM_FD_PARAMS), @@ -1730,13 +1623,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient /*func=*/ "cliresCtrlCmdOsUnixImportObjectFromFd" #endif }, - { /* [102] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + { /* [101] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdOsUnixGetExportObjectInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, /*accessRight=*/0x0u, /*methodId=*/ 0x3d08u, /*paramSize=*/ sizeof(NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS), @@ -1745,13 +1638,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient /*func=*/ "cliresCtrlCmdOsUnixGetExportObjectInfo" #endif }, - { /* [103] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + { /* [102] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdOsUnixCreateExportObjectFd_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x3d0au, /*paramSize=*/ sizeof(NV0000_CTRL_OS_UNIX_CREATE_EXPORT_OBJECT_FD_PARAMS), @@ -1760,13 +1653,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient /*func=*/ "cliresCtrlCmdOsUnixCreateExportObjectFd" #endif }, - { /* [104] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + { /* [103] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdOsUnixExportObjectsToFd_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x3d0bu, /*paramSize=*/ sizeof(NV0000_CTRL_OS_UNIX_EXPORT_OBJECTS_TO_FD_PARAMS), @@ -1775,13 +1668,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient /*func=*/ "cliresCtrlCmdOsUnixExportObjectsToFd" #endif }, - { /* [105] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + { /* [104] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) cliresCtrlCmdOsUnixImportObjectsFromFd_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x3d0cu, /*paramSize=*/ sizeof(NV0000_CTRL_OS_UNIX_IMPORT_OBJECTS_FROM_FD_PARAMS), @@ -1793,9 +1686,130 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient }; +// 4 down-thunk(s) defined to bridge methods in RmClientResource from superclasses + +// cliresAccessCallback: virtual override (res) base (clientres) +static NvBool __nvoc_down_thunk_RmClientResource_resAccessCallback(struct RsResource *pRmCliRes, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return cliresAccessCallback((struct RmClientResource *)(((unsigned char *) pRmCliRes) - __nvoc_rtti_RmClientResource_RsResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// cliresShareCallback: virtual override (res) base (clientres) +static NvBool __nvoc_down_thunk_RmClientResource_resShareCallback(struct RsResource *pRmCliRes, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return cliresShareCallback((struct RmClientResource *)(((unsigned char *) pRmCliRes) - __nvoc_rtti_RmClientResource_RsResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// cliresControl_Prologue: virtual override (res) base (clientres) +static NV_STATUS __nvoc_down_thunk_RmClientResource_resControl_Prologue(struct RsResource *pRmCliRes, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return cliresControl_Prologue((struct RmClientResource *)(((unsigned char *) pRmCliRes) - __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams); +} + +// cliresControl_Epilogue: virtual override (res) base (clientres) +static void __nvoc_down_thunk_RmClientResource_resControl_Epilogue(struct RsResource *pRmCliRes, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + cliresControl_Epilogue((struct RmClientResource *)(((unsigned char *) pRmCliRes) - __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams); +} + + +// 19 up-thunk(s) defined to bridge methods in RmClientResource to superclasses + +// cliresCanCopy: virtual inherited (res) base (clientres) +static NvBool __nvoc_up_thunk_RsResource_cliresCanCopy(struct RmClientResource *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset)); +} + +// cliresIsDuplicate: virtual inherited (res) base (clientres) +static NV_STATUS __nvoc_up_thunk_RsResource_cliresIsDuplicate(struct RmClientResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), hMemory, pDuplicate); +} + +// cliresPreDestruct: virtual inherited (res) base (clientres) +static void __nvoc_up_thunk_RsResource_cliresPreDestruct(struct RmClientResource *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset)); +} + +// cliresControl: virtual inherited (res) base (clientres) +static NV_STATUS __nvoc_up_thunk_RsResource_cliresControl(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams); +} + +// cliresControlFilter: virtual inherited (res) base (clientres) +static NV_STATUS __nvoc_up_thunk_RsResource_cliresControlFilter(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams); +} + +// cliresControlSerialization_Prologue: virtual inherited (res) base (clientres) +static NV_STATUS __nvoc_up_thunk_RsResource_cliresControlSerialization_Prologue(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlSerialization_Prologue((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams); +} + +// cliresControlSerialization_Epilogue: virtual inherited (res) base (clientres) +static void __nvoc_up_thunk_RsResource_cliresControlSerialization_Epilogue(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + resControlSerialization_Epilogue((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams); +} + +// cliresMap: virtual inherited (res) base (clientres) +static NV_STATUS __nvoc_up_thunk_RsResource_cliresMap(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams, pCpuMapping); +} + +// cliresUnmap: virtual inherited (res) base (clientres) +static NV_STATUS __nvoc_up_thunk_RsResource_cliresUnmap(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pCpuMapping); +} + +// cliresIsPartialUnmapSupported: inline virtual inherited (res) base (clientres) body +static NvBool __nvoc_up_thunk_RsResource_cliresIsPartialUnmapSupported(struct RmClientResource *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset)); +} + +// cliresMapTo: virtual inherited (res) base (clientres) +static NV_STATUS __nvoc_up_thunk_RsResource_cliresMapTo(struct RmClientResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pParams); +} + +// cliresUnmapFrom: virtual inherited (res) base (clientres) +static NV_STATUS __nvoc_up_thunk_RsResource_cliresUnmapFrom(struct RmClientResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pParams); +} + +// cliresGetRefCount: virtual inherited (res) base (clientres) +static NvU32 __nvoc_up_thunk_RsResource_cliresGetRefCount(struct RmClientResource *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset)); +} + +// cliresAddAdditionalDependants: virtual inherited (res) base (clientres) +static void __nvoc_up_thunk_RsResource_cliresAddAdditionalDependants(struct RsClient *pClient, struct RmClientResource *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pReference); +} + +// cliresGetNotificationListPtr: virtual inherited (notify) base (notify) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_cliresGetNotificationListPtr(struct RmClientResource *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_RmClientResource_Notifier.offset)); +} + +// cliresGetNotificationShare: virtual inherited (notify) base (notify) +static struct NotifShare * __nvoc_up_thunk_Notifier_cliresGetNotificationShare(struct RmClientResource *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_RmClientResource_Notifier.offset)); +} + +// cliresSetNotificationShare: virtual inherited (notify) base (notify) +static void __nvoc_up_thunk_Notifier_cliresSetNotificationShare(struct RmClientResource *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_RmClientResource_Notifier.offset), pNotifShare); +} + +// cliresUnregisterEvent: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_cliresUnregisterEvent(struct RmClientResource *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_RmClientResource_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +} + +// cliresGetOrAllocNotifShare: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_cliresGetOrAllocNotifShare(struct RmClientResource *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_RmClientResource_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_RmClientResource = { - /*numEntries=*/ 106, + /*numEntries=*/ 105, /*pExportEntries=*/ __nvoc_exported_method_def_RmClientResource }; @@ -1843,489 +1857,614 @@ NV_STATUS __nvoc_ctor_RmClientResource(RmClientResource *pThis, struct CALL_CONT return status; } +// Vtable initialization static void __nvoc_init_funcTable_RmClientResource_1(RmClientResource *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // cliresAccessCallback -- virtual override (res) base (clientres) pThis->__cliresAccessCallback__ = &cliresAccessCallback_IMPL; + pThis->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmClientResource_resAccessCallback; + // cliresShareCallback -- virtual override (res) base (clientres) pThis->__cliresShareCallback__ = &cliresShareCallback_IMPL; + pThis->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmClientResource_resShareCallback; + // cliresControl_Prologue -- virtual override (res) base (clientres) pThis->__cliresControl_Prologue__ = &cliresControl_Prologue_IMPL; + pThis->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmClientResource_resControl_Prologue; + // cliresControl_Epilogue -- virtual override (res) base (clientres) pThis->__cliresControl_Epilogue__ = &cliresControl_Epilogue_IMPL; + pThis->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmClientResource_resControl_Epilogue; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // cliresCtrlCmdSystemGetCpuInfo -- exported (id=0x102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__cliresCtrlCmdSystemGetCpuInfo__ = &cliresCtrlCmdSystemGetCpuInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemGetFeatures -- exported (id=0x1f0) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemGetFeatures__ = &cliresCtrlCmdSystemGetFeatures_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4811u) + // cliresCtrlCmdSystemGetBuildVersionV2 -- exported (id=0x13e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) pThis->__cliresCtrlCmdSystemGetBuildVersionV2__ = &cliresCtrlCmdSystemGetBuildVersionV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemExecuteAcpiMethod -- exported (id=0x130) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemExecuteAcpiMethod__ = &cliresCtrlCmdSystemExecuteAcpiMethod_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4013u) + // cliresCtrlCmdSystemGetChipsetInfo -- exported (id=0x104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40bu) pThis->__cliresCtrlCmdSystemGetChipsetInfo__ = &cliresCtrlCmdSystemGetChipsetInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x805u) + // cliresCtrlCmdSystemGetLockTimes -- exported (id=0x109) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x105u) pThis->__cliresCtrlCmdSystemGetLockTimes__ = &cliresCtrlCmdSystemGetLockTimes_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemGetClassList -- exported (id=0x108) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemGetClassList__ = &cliresCtrlCmdSystemGetClassList_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemNotifyEvent -- exported (id=0x110) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemNotifyEvent__ = &cliresCtrlCmdSystemNotifyEvent_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // cliresCtrlCmdSystemGetPlatformType -- exported (id=0x111) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__cliresCtrlCmdSystemGetPlatformType__ = &cliresCtrlCmdSystemGetPlatformType_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemDebugCtrlRmMsg -- exported (id=0x121) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemDebugCtrlRmMsg__ = &cliresCtrlCmdSystemDebugCtrlRmMsg_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemGpsControl -- exported (id=0x122) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemGpsControl__ = &cliresCtrlCmdSystemGpsControl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemGpsBatchControl -- exported (id=0x123) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemGpsBatchControl__ = &cliresCtrlCmdSystemGpsBatchControl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemGetHwbcInfo -- exported (id=0x124) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemGetHwbcInfo__ = &cliresCtrlCmdSystemGetHwbcInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) + // cliresCtrlCmdSystemGetP2pCaps -- exported (id=0x127) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) pThis->__cliresCtrlCmdSystemGetP2pCaps__ = &cliresCtrlCmdSystemGetP2pCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) + // cliresCtrlCmdSystemGetP2pCapsV2 -- exported (id=0x12b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) pThis->__cliresCtrlCmdSystemGetP2pCapsV2__ = &cliresCtrlCmdSystemGetP2pCapsV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) + // cliresCtrlCmdSystemGetP2pCapsMatrix -- exported (id=0x13a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) pThis->__cliresCtrlCmdSystemGetP2pCapsMatrix__ = &cliresCtrlCmdSystemGetP2pCapsMatrix_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemGpsCtrl -- exported (id=0x12a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemGpsCtrl__ = &cliresCtrlCmdSystemGpsCtrl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemGpsGetFrmData -- exported (id=0x12f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemGpsGetFrmData__ = &cliresCtrlCmdSystemGpsGetFrmData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemGpsSetFrmData -- exported (id=0x132) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemGpsSetFrmData__ = &cliresCtrlCmdSystemGpsSetFrmData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemGpsCallAcpi -- exported (id=0x12d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemGpsCallAcpi__ = &cliresCtrlCmdSystemGpsCallAcpi_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemGetPerfSensorCounters -- exported (id=0x12c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemGetPerfSensorCounters__ = &cliresCtrlCmdSystemGetPerfSensorCounters_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemGetExtendedPerfSensorCounters -- exported (id=0x12e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemGetExtendedPerfSensorCounters__ = &cliresCtrlCmdSystemGetExtendedPerfSensorCounters_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // cliresCtrlCmdSystemGetVgxSystemInfo -- exported (id=0x133) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__cliresCtrlCmdSystemGetVgxSystemInfo__ = &cliresCtrlCmdSystemGetVgxSystemInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // cliresCtrlCmdSystemGetGpusPowerStatus -- exported (id=0x134) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__cliresCtrlCmdSystemGetGpusPowerStatus__ = &cliresCtrlCmdSystemGetGpusPowerStatus_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdSystemGetPrivilegedStatus -- exported (id=0x135) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdSystemGetPrivilegedStatus__ = &cliresCtrlCmdSystemGetPrivilegedStatus_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdSystemGetFabricStatus -- exported (id=0x136) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdSystemGetFabricStatus__ = &cliresCtrlCmdSystemGetFabricStatus_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // cliresCtrlCmdSystemGetRmInstanceId -- exported (id=0x139) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__cliresCtrlCmdSystemGetRmInstanceId__ = &cliresCtrlCmdSystemGetRmInstanceId_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x807u) + // cliresCtrlCmdSystemGetClientDatabaseInfo -- exported (id=0x13d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x107u) pThis->__cliresCtrlCmdSystemGetClientDatabaseInfo__ = &cliresCtrlCmdSystemGetClientDatabaseInfo_IMPL; #endif + // cliresCtrlCmdSystemRmctrlCacheModeCtrl -- exported (id=0x13f) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) pThis->__cliresCtrlCmdSystemRmctrlCacheModeCtrl__ = &cliresCtrlCmdSystemRmctrlCacheModeCtrl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdNvdGetDumpSize -- exported (id=0x601) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdNvdGetDumpSize__ = &cliresCtrlCmdNvdGetDumpSize_IMPL; #endif + // cliresCtrlCmdNvdGetDump -- exported (id=0x602) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__cliresCtrlCmdNvdGetDump__ = &cliresCtrlCmdNvdGetDump_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // cliresCtrlCmdNvdGetTimestamp -- exported (id=0x603) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__cliresCtrlCmdNvdGetTimestamp__ = &cliresCtrlCmdNvdGetTimestamp_IMPL; #endif + // cliresCtrlCmdNvdGetNvlogInfo -- exported (id=0x604) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) pThis->__cliresCtrlCmdNvdGetNvlogInfo__ = &cliresCtrlCmdNvdGetNvlogInfo_IMPL; #endif + // cliresCtrlCmdNvdGetNvlogBufferInfo -- exported (id=0x605) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) pThis->__cliresCtrlCmdNvdGetNvlogBufferInfo__ = &cliresCtrlCmdNvdGetNvlogBufferInfo_IMPL; #endif + // cliresCtrlCmdNvdGetNvlog -- exported (id=0x606) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) pThis->__cliresCtrlCmdNvdGetNvlog__ = &cliresCtrlCmdNvdGetNvlog_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdNvdGetRcerrRpt -- exported (id=0x607) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdNvdGetRcerrRpt__ = &cliresCtrlCmdNvdGetRcerrRpt_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdClientGetAddrSpaceType -- exported (id=0xd01) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdClientGetAddrSpaceType__ = &cliresCtrlCmdClientGetAddrSpaceType_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdClientGetHandleInfo -- exported (id=0xd02) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdClientGetHandleInfo__ = &cliresCtrlCmdClientGetHandleInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // cliresCtrlCmdClientGetAccessRights -- exported (id=0xd03) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__cliresCtrlCmdClientGetAccessRights__ = &cliresCtrlCmdClientGetAccessRights_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // cliresCtrlCmdClientSetInheritedSharePolicy -- exported (id=0xd04) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__cliresCtrlCmdClientSetInheritedSharePolicy__ = &cliresCtrlCmdClientSetInheritedSharePolicy_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // cliresCtrlCmdClientShareObject -- exported (id=0xd06) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__cliresCtrlCmdClientShareObject__ = &cliresCtrlCmdClientShareObject_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // cliresCtrlCmdClientGetChildHandle -- exported (id=0xd05) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__cliresCtrlCmdClientGetChildHandle__ = &cliresCtrlCmdClientGetChildHandle_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdObjectsAreDuplicates -- exported (id=0xd07) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdObjectsAreDuplicates__ = &cliresCtrlCmdObjectsAreDuplicates_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdClientSubscribeToImexChannel -- exported (id=0xd08) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdClientSubscribeToImexChannel__ = &cliresCtrlCmdClientSubscribeToImexChannel_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // cliresCtrlCmdGpuGetAttachedIds -- exported (id=0x201) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__cliresCtrlCmdGpuGetAttachedIds__ = &cliresCtrlCmdGpuGetAttachedIds_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdGpuGetIdInfo -- exported (id=0x202) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdGpuGetIdInfo__ = &cliresCtrlCmdGpuGetIdInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdGpuGetIdInfoV2 -- exported (id=0x205) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdGpuGetIdInfoV2__ = &cliresCtrlCmdGpuGetIdInfoV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdGpuGetInitStatus -- exported (id=0x203) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdGpuGetInitStatus__ = &cliresCtrlCmdGpuGetInitStatus_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // cliresCtrlCmdGpuGetDeviceIds -- exported (id=0x204) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__cliresCtrlCmdGpuGetDeviceIds__ = &cliresCtrlCmdGpuGetDeviceIds_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // cliresCtrlCmdGpuGetActiveDeviceIds -- exported (id=0x288) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__cliresCtrlCmdGpuGetActiveDeviceIds__ = &cliresCtrlCmdGpuGetActiveDeviceIds_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdGpuGetProbedIds -- exported (id=0x214) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdGpuGetProbedIds__ = &cliresCtrlCmdGpuGetProbedIds_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdGpuAttachIds -- exported (id=0x215) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdGpuAttachIds__ = &cliresCtrlCmdGpuAttachIds_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdGpuAsyncAttachId -- exported (id=0x289) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdGpuAsyncAttachId__ = &cliresCtrlCmdGpuAsyncAttachId_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdGpuWaitAttachId -- exported (id=0x290) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdGpuWaitAttachId__ = &cliresCtrlCmdGpuWaitAttachId_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdGpuDetachIds -- exported (id=0x216) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdGpuDetachIds__ = &cliresCtrlCmdGpuDetachIds_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdGpuGetSvmSize -- exported (id=0x240) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdGpuGetSvmSize__ = &cliresCtrlCmdGpuGetSvmSize_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdGpuGetPciInfo -- exported (id=0x21b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdGpuGetPciInfo__ = &cliresCtrlCmdGpuGetPciInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdGpuGetUuidInfo -- exported (id=0x274) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdGpuGetUuidInfo__ = &cliresCtrlCmdGpuGetUuidInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdGpuGetUuidFromGpuId -- exported (id=0x275) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdGpuGetUuidFromGpuId__ = &cliresCtrlCmdGpuGetUuidFromGpuId_IMPL; #endif + // cliresCtrlCmdGpuModifyGpuDrainState -- exported (id=0x278) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__cliresCtrlCmdGpuModifyGpuDrainState__ = &cliresCtrlCmdGpuModifyGpuDrainState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdGpuQueryGpuDrainState -- exported (id=0x279) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdGpuQueryGpuDrainState__ = &cliresCtrlCmdGpuQueryGpuDrainState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4811u) + // cliresCtrlCmdGpuGetMemOpEnable -- exported (id=0x27b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) pThis->__cliresCtrlCmdGpuGetMemOpEnable__ = &cliresCtrlCmdGpuGetMemOpEnable_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x13u) + // cliresCtrlCmdGpuDisableNvlinkInit -- exported (id=0x281) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xbu) pThis->__cliresCtrlCmdGpuDisableNvlinkInit__ = &cliresCtrlCmdGpuDisableNvlinkInit_IMPL; #endif + // cliresCtrlCmdGpuSetNvlinkBwMode -- exported (id=0x286) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__cliresCtrlCmdGpuSetNvlinkBwMode__ = &cliresCtrlCmdGpuSetNvlinkBwMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // cliresCtrlCmdGpuGetNvlinkBwMode -- exported (id=0x287) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__cliresCtrlCmdGpuGetNvlinkBwMode__ = &cliresCtrlCmdGpuGetNvlinkBwMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdLegacyConfig -- exported (id=0x282) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdLegacyConfig__ = &cliresCtrlCmdLegacyConfig_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdIdleChannels -- exported (id=0x283) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdIdleChannels__ = &cliresCtrlCmdIdleChannels_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdPushGspUcode -- exported (id=0x285) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdPushGspUcode__ = &cliresCtrlCmdPushGspUcode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // cliresCtrlCmdGpuGetVideoLinks -- exported (id=0x219) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__cliresCtrlCmdGpuGetVideoLinks__ = &cliresCtrlCmdGpuGetVideoLinks_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) + // cliresCtrlCmdGsyncGetAttachedIds -- exported (id=0x301) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) pThis->__cliresCtrlCmdGsyncGetAttachedIds__ = &cliresCtrlCmdGsyncGetAttachedIds_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdGsyncGetIdInfo -- exported (id=0x302) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdGsyncGetIdInfo__ = &cliresCtrlCmdGsyncGetIdInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdDiagProfileRpc -- exported (id=0x488) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdDiagProfileRpc__ = &cliresCtrlCmdDiagProfileRpc_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdDiagDumpRpc -- exported (id=0x489) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdDiagDumpRpc__ = &cliresCtrlCmdDiagDumpRpc_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdEventSetNotification -- exported (id=0x501) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdEventSetNotification__ = &cliresCtrlCmdEventSetNotification_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdEventGetSystemEventStatus -- exported (id=0x502) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdEventGetSystemEventStatus__ = &cliresCtrlCmdEventGetSystemEventStatus_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // cliresCtrlCmdOsUnixExportObjectToFd -- exported (id=0x3d05) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__cliresCtrlCmdOsUnixExportObjectToFd__ = &cliresCtrlCmdOsUnixExportObjectToFd_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // cliresCtrlCmdOsUnixImportObjectFromFd -- exported (id=0x3d06) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__cliresCtrlCmdOsUnixImportObjectFromFd__ = &cliresCtrlCmdOsUnixImportObjectFromFd_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // cliresCtrlCmdOsUnixGetExportObjectInfo -- exported (id=0x3d08) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__cliresCtrlCmdOsUnixGetExportObjectInfo__ = &cliresCtrlCmdOsUnixGetExportObjectInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // cliresCtrlCmdOsUnixCreateExportObjectFd -- exported (id=0x3d0a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__cliresCtrlCmdOsUnixCreateExportObjectFd__ = &cliresCtrlCmdOsUnixCreateExportObjectFd_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // cliresCtrlCmdOsUnixExportObjectsToFd -- exported (id=0x3d0b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__cliresCtrlCmdOsUnixExportObjectsToFd__ = &cliresCtrlCmdOsUnixExportObjectsToFd_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // cliresCtrlCmdOsUnixImportObjectsFromFd -- exported (id=0x3d0c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__cliresCtrlCmdOsUnixImportObjectsFromFd__ = &cliresCtrlCmdOsUnixImportObjectsFromFd_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdOsUnixFlushUserCache -- exported (id=0x3d02) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdOsUnixFlushUserCache__ = &cliresCtrlCmdOsUnixFlushUserCache_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x140004u) + // cliresCtrlCmdGpuAcctSetAccountingState -- exported (id=0xb01) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) pThis->__cliresCtrlCmdGpuAcctSetAccountingState__ = &cliresCtrlCmdGpuAcctSetAccountingState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdGpuAcctGetAccountingState -- exported (id=0xb02) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdGpuAcctGetAccountingState__ = &cliresCtrlCmdGpuAcctGetAccountingState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdGpuAcctGetProcAccountingInfo -- exported (id=0xb03) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdGpuAcctGetProcAccountingInfo__ = &cliresCtrlCmdGpuAcctGetProcAccountingInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdGpuAcctGetAccountingPids -- exported (id=0xb04) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdGpuAcctGetAccountingPids__ = &cliresCtrlCmdGpuAcctGetAccountingPids_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x140004u) + // cliresCtrlCmdGpuAcctClearAccountingData -- exported (id=0xb05) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) pThis->__cliresCtrlCmdGpuAcctClearAccountingData__ = &cliresCtrlCmdGpuAcctClearAccountingData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdSetSubProcessID -- exported (id=0x901) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdSetSubProcessID__ = &cliresCtrlCmdSetSubProcessID_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdDisableSubProcessUserdIsolation -- exported (id=0x902) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdDisableSubProcessUserdIsolation__ = &cliresCtrlCmdDisableSubProcessUserdIsolation_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdSyncGpuBoostInfo -- exported (id=0xa01) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdSyncGpuBoostInfo__ = &cliresCtrlCmdSyncGpuBoostInfo_IMPL; #endif + // cliresCtrlCmdSyncGpuBoostGroupCreate -- exported (id=0xa02) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x5u) pThis->__cliresCtrlCmdSyncGpuBoostGroupCreate__ = &cliresCtrlCmdSyncGpuBoostGroupCreate_IMPL; #endif + // cliresCtrlCmdSyncGpuBoostGroupDestroy -- exported (id=0xa03) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x5u) pThis->__cliresCtrlCmdSyncGpuBoostGroupDestroy__ = &cliresCtrlCmdSyncGpuBoostGroupDestroy_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // cliresCtrlCmdSyncGpuBoostGroupInfo -- exported (id=0xa04) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__cliresCtrlCmdSyncGpuBoostGroupInfo__ = &cliresCtrlCmdSyncGpuBoostGroupInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__cliresCtrlCmdVgpuGetStartData__ = &cliresCtrlCmdVgpuGetStartData_IMPL; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdVgpuGetVgpuVersion -- exported (id=0x137) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdVgpuGetVgpuVersion__ = &cliresCtrlCmdVgpuGetVgpuVersion_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdVgpuSetVgpuVersion -- exported (id=0x138) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdVgpuSetVgpuVersion__ = &cliresCtrlCmdVgpuSetVgpuVersion_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemNVPCFGetPowerModeInfo -- exported (id=0x13b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemNVPCFGetPowerModeInfo__ = &cliresCtrlCmdSystemNVPCFGetPowerModeInfo_IMPL; #endif + // cliresCtrlCmdSystemSyncExternalFabricMgmt -- exported (id=0x13c) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__cliresCtrlCmdSystemSyncExternalFabricMgmt__ = &cliresCtrlCmdSystemSyncExternalFabricMgmt_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemPfmreqhndlrCtrl -- exported (id=0x142) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemPfmreqhndlrCtrl__ = &cliresCtrlCmdSystemPfmreqhndlrCtrl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemPfmreqhndlrGetFrmData -- exported (id=0x144) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemPfmreqhndlrGetFrmData__ = &cliresCtrlCmdSystemPfmreqhndlrGetFrmData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemPfmreqhndlrSetFrmData -- exported (id=0x145) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemPfmreqhndlrSetFrmData__ = &cliresCtrlCmdSystemPfmreqhndlrSetFrmData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemPfmreqhndlrCallAcpi -- exported (id=0x143) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemPfmreqhndlrCallAcpi__ = &cliresCtrlCmdSystemPfmreqhndlrCallAcpi_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemPfmreqhndlrControl -- exported (id=0x140) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemPfmreqhndlrControl__ = &cliresCtrlCmdSystemPfmreqhndlrControl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemPfmreqhndlrBatchControl -- exported (id=0x141) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemPfmreqhndlrBatchControl__ = &cliresCtrlCmdSystemPfmreqhndlrBatchControl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemPfmreqhndlrGetPerfSensorCounters -- exported (id=0x146) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemPfmreqhndlrGetPerfSensorCounters__ = &cliresCtrlCmdSystemPfmreqhndlrGetPerfSensorCounters_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters -- exported (id=0x147) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters__ = &cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters_IMPL; #endif - pThis->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resAccessCallback__ = &__nvoc_thunk_RmClientResource_resAccessCallback; - - pThis->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resShareCallback__ = &__nvoc_thunk_RmClientResource_resShareCallback; + // cliresCanCopy -- virtual inherited (res) base (clientres) + pThis->__cliresCanCopy__ = &__nvoc_up_thunk_RsResource_cliresCanCopy; - pThis->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resControl_Prologue__ = &__nvoc_thunk_RmClientResource_resControl_Prologue; + // cliresIsDuplicate -- virtual inherited (res) base (clientres) + pThis->__cliresIsDuplicate__ = &__nvoc_up_thunk_RsResource_cliresIsDuplicate; - pThis->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resControl_Epilogue__ = &__nvoc_thunk_RmClientResource_resControl_Epilogue; + // cliresPreDestruct -- virtual inherited (res) base (clientres) + pThis->__cliresPreDestruct__ = &__nvoc_up_thunk_RsResource_cliresPreDestruct; - pThis->__cliresControl__ = &__nvoc_thunk_RsResource_cliresControl; + // cliresControl -- virtual inherited (res) base (clientres) + pThis->__cliresControl__ = &__nvoc_up_thunk_RsResource_cliresControl; - pThis->__cliresUnmap__ = &__nvoc_thunk_RsResource_cliresUnmap; + // cliresControlFilter -- virtual inherited (res) base (clientres) + pThis->__cliresControlFilter__ = &__nvoc_up_thunk_RsResource_cliresControlFilter; - pThis->__cliresMapTo__ = &__nvoc_thunk_RsResource_cliresMapTo; + // cliresControlSerialization_Prologue -- virtual inherited (res) base (clientres) + pThis->__cliresControlSerialization_Prologue__ = &__nvoc_up_thunk_RsResource_cliresControlSerialization_Prologue; - pThis->__cliresSetNotificationShare__ = &__nvoc_thunk_Notifier_cliresSetNotificationShare; + // cliresControlSerialization_Epilogue -- virtual inherited (res) base (clientres) + pThis->__cliresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RsResource_cliresControlSerialization_Epilogue; - pThis->__cliresControlFilter__ = &__nvoc_thunk_RsResource_cliresControlFilter; + // cliresMap -- virtual inherited (res) base (clientres) + pThis->__cliresMap__ = &__nvoc_up_thunk_RsResource_cliresMap; - pThis->__cliresAddAdditionalDependants__ = &__nvoc_thunk_RsResource_cliresAddAdditionalDependants; + // cliresUnmap -- virtual inherited (res) base (clientres) + pThis->__cliresUnmap__ = &__nvoc_up_thunk_RsResource_cliresUnmap; - pThis->__cliresGetRefCount__ = &__nvoc_thunk_RsResource_cliresGetRefCount; + // cliresIsPartialUnmapSupported -- inline virtual inherited (res) base (clientres) body + pThis->__cliresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_cliresIsPartialUnmapSupported; - pThis->__cliresUnregisterEvent__ = &__nvoc_thunk_Notifier_cliresUnregisterEvent; + // cliresMapTo -- virtual inherited (res) base (clientres) + pThis->__cliresMapTo__ = &__nvoc_up_thunk_RsResource_cliresMapTo; - pThis->__cliresControlSerialization_Prologue__ = &__nvoc_thunk_RsResource_cliresControlSerialization_Prologue; + // cliresUnmapFrom -- virtual inherited (res) base (clientres) + pThis->__cliresUnmapFrom__ = &__nvoc_up_thunk_RsResource_cliresUnmapFrom; - pThis->__cliresCanCopy__ = &__nvoc_thunk_RsResource_cliresCanCopy; + // cliresGetRefCount -- virtual inherited (res) base (clientres) + pThis->__cliresGetRefCount__ = &__nvoc_up_thunk_RsResource_cliresGetRefCount; - pThis->__cliresIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_cliresIsPartialUnmapSupported; + // cliresAddAdditionalDependants -- virtual inherited (res) base (clientres) + pThis->__cliresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_cliresAddAdditionalDependants; - pThis->__cliresPreDestruct__ = &__nvoc_thunk_RsResource_cliresPreDestruct; + // cliresGetNotificationListPtr -- virtual inherited (notify) base (notify) + pThis->__cliresGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_cliresGetNotificationListPtr; - pThis->__cliresUnmapFrom__ = &__nvoc_thunk_RsResource_cliresUnmapFrom; + // cliresGetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__cliresGetNotificationShare__ = &__nvoc_up_thunk_Notifier_cliresGetNotificationShare; - pThis->__cliresIsDuplicate__ = &__nvoc_thunk_RsResource_cliresIsDuplicate; + // cliresSetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__cliresSetNotificationShare__ = &__nvoc_up_thunk_Notifier_cliresSetNotificationShare; - pThis->__cliresControlSerialization_Epilogue__ = &__nvoc_thunk_RsResource_cliresControlSerialization_Epilogue; + // cliresUnregisterEvent -- virtual inherited (notify) base (notify) + pThis->__cliresUnregisterEvent__ = &__nvoc_up_thunk_Notifier_cliresUnregisterEvent; - pThis->__cliresGetNotificationListPtr__ = &__nvoc_thunk_Notifier_cliresGetNotificationListPtr; + // cliresGetOrAllocNotifShare -- virtual inherited (notify) base (notify) + pThis->__cliresGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_cliresGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_RmClientResource_1 with approximately 132 basic block(s). - pThis->__cliresGetNotificationShare__ = &__nvoc_thunk_Notifier_cliresGetNotificationShare; - - pThis->__cliresMap__ = &__nvoc_thunk_RsResource_cliresMap; - - pThis->__cliresGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_cliresGetOrAllocNotifShare; -} +// Initialize vtable(s) for 128 virtual method(s). void __nvoc_init_funcTable_RmClientResource(RmClientResource *pThis) { + + // Initialize vtable(s) with 128 per-object function pointer(s). __nvoc_init_funcTable_RmClientResource_1(pThis); } diff --git a/src/nvidia/generated/g_client_resource_nvoc.h b/src/nvidia/generated/g_client_resource_nvoc.h index daeb8aafc0..6222a17106 100644 --- a/src/nvidia/generated/g_client_resource_nvoc.h +++ b/src/nvidia/generated/g_client_resource_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_CLIENT_RESOURCE_NVOC_H_ #define _G_CLIENT_RESOURCE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_client_resource_nvoc.h" @@ -67,147 +75,155 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct RmClientResource { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RsClientResource __nvoc_base_RsClientResource; struct RmResourceCommon __nvoc_base_RmResourceCommon; struct Notifier __nvoc_base_Notifier; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RsClientResource *__nvoc_pbase_RsClientResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct RmClientResource *__nvoc_pbase_RmClientResource; - NvBool (*__cliresAccessCallback__)(struct RmClientResource *, struct RsClient *, void *, RsAccessRight); - NvBool (*__cliresShareCallback__)(struct RmClientResource *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__cliresControl_Prologue__)(struct RmClientResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__cliresControl_Epilogue__)(struct RmClientResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__cliresCtrlCmdSystemGetCpuInfo__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GET_CPU_INFO_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGetFeatures__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GET_FEATURES_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGetBuildVersionV2__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_V2_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemExecuteAcpiMethod__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGetChipsetInfo__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GET_CHIPSET_INFO_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGetLockTimes__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GET_LOCK_TIMES_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGetClassList__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GET_CLASSLIST_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemNotifyEvent__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_NOTIFY_EVENT_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGetPlatformType__)(struct RmClientResource *, NV0000_CTRL_CMD_SYSTEM_GET_PLATFORM_TYPE_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemDebugCtrlRmMsg__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_DEBUG_RMMSG_CTRL_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGpsControl__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GPS_CONTROL_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGpsBatchControl__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GPS_BATCH_CONTROL_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGetHwbcInfo__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GET_HWBC_INFO_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGetP2pCaps__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGetP2pCapsV2__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GET_P2P_CAPS_V2_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGetP2pCapsMatrix__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GET_P2P_CAPS_MATRIX_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGpsCtrl__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GPS_CTRL_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGpsGetFrmData__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GPS_GET_FRM_DATA_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGpsSetFrmData__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GPS_SET_FRM_DATA_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGpsCallAcpi__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GPS_CALL_ACPI_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGetPerfSensorCounters__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GPS_GET_PERF_SENSOR_COUNTERS_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGetExtendedPerfSensorCounters__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GPS_GET_PERF_SENSOR_COUNTERS_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGetVgxSystemInfo__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GET_VGX_SYSTEM_INFO_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGetGpusPowerStatus__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GET_GPUS_POWER_STATUS_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGetPrivilegedStatus__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GET_PRIVILEGED_STATUS_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGetFabricStatus__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GET_FABRIC_STATUS_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGetRmInstanceId__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GET_RM_INSTANCE_ID_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemGetClientDatabaseInfo__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_GET_CLIENT_DATABASE_INFO_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemRmctrlCacheModeCtrl__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_RMCTRL_CACHE_MODE_CTRL_PARAMS *); - NV_STATUS (*__cliresCtrlCmdNvdGetDumpSize__)(struct RmClientResource *, NV0000_CTRL_NVD_GET_DUMP_SIZE_PARAMS *); - NV_STATUS (*__cliresCtrlCmdNvdGetDump__)(struct RmClientResource *, NV0000_CTRL_NVD_GET_DUMP_PARAMS *); - NV_STATUS (*__cliresCtrlCmdNvdGetTimestamp__)(struct RmClientResource *, NV0000_CTRL_NVD_GET_TIMESTAMP_PARAMS *); - NV_STATUS (*__cliresCtrlCmdNvdGetNvlogInfo__)(struct RmClientResource *, NV0000_CTRL_NVD_GET_NVLOG_INFO_PARAMS *); - NV_STATUS (*__cliresCtrlCmdNvdGetNvlogBufferInfo__)(struct RmClientResource *, NV0000_CTRL_NVD_GET_NVLOG_BUFFER_INFO_PARAMS *); - NV_STATUS (*__cliresCtrlCmdNvdGetNvlog__)(struct RmClientResource *, NV0000_CTRL_NVD_GET_NVLOG_PARAMS *); - NV_STATUS (*__cliresCtrlCmdNvdGetRcerrRpt__)(struct RmClientResource *, NV0000_CTRL_CMD_NVD_GET_RCERR_RPT_PARAMS *); - NV_STATUS (*__cliresCtrlCmdClientGetAddrSpaceType__)(struct RmClientResource *, NV0000_CTRL_CLIENT_GET_ADDR_SPACE_TYPE_PARAMS *); - NV_STATUS (*__cliresCtrlCmdClientGetHandleInfo__)(struct RmClientResource *, NV0000_CTRL_CLIENT_GET_HANDLE_INFO_PARAMS *); - NV_STATUS (*__cliresCtrlCmdClientGetAccessRights__)(struct RmClientResource *, NV0000_CTRL_CLIENT_GET_ACCESS_RIGHTS_PARAMS *); - NV_STATUS (*__cliresCtrlCmdClientSetInheritedSharePolicy__)(struct RmClientResource *, NV0000_CTRL_CLIENT_SET_INHERITED_SHARE_POLICY_PARAMS *); - NV_STATUS (*__cliresCtrlCmdClientShareObject__)(struct RmClientResource *, NV0000_CTRL_CLIENT_SHARE_OBJECT_PARAMS *); - NV_STATUS (*__cliresCtrlCmdClientGetChildHandle__)(struct RmClientResource *, NV0000_CTRL_CMD_CLIENT_GET_CHILD_HANDLE_PARAMS *); - NV_STATUS (*__cliresCtrlCmdObjectsAreDuplicates__)(struct RmClientResource *, NV0000_CTRL_CLIENT_OBJECTS_ARE_DUPLICATES_PARAMS *); - NV_STATUS (*__cliresCtrlCmdClientSubscribeToImexChannel__)(struct RmClientResource *, NV0000_CTRL_CLIENT_SUBSCRIBE_TO_IMEX_CHANNEL_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuGetAttachedIds__)(struct RmClientResource *, NV0000_CTRL_GPU_GET_ATTACHED_IDS_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuGetIdInfo__)(struct RmClientResource *, NV0000_CTRL_GPU_GET_ID_INFO_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuGetIdInfoV2__)(struct RmClientResource *, NV0000_CTRL_GPU_GET_ID_INFO_V2_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuGetInitStatus__)(struct RmClientResource *, NV0000_CTRL_GPU_GET_INIT_STATUS_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuGetDeviceIds__)(struct RmClientResource *, NV0000_CTRL_GPU_GET_DEVICE_IDS_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuGetActiveDeviceIds__)(struct RmClientResource *, NV0000_CTRL_GPU_GET_ACTIVE_DEVICE_IDS_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuGetProbedIds__)(struct RmClientResource *, NV0000_CTRL_GPU_GET_PROBED_IDS_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuAttachIds__)(struct RmClientResource *, NV0000_CTRL_GPU_ATTACH_IDS_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuAsyncAttachId__)(struct RmClientResource *, NV0000_CTRL_GPU_ASYNC_ATTACH_ID_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuWaitAttachId__)(struct RmClientResource *, NV0000_CTRL_GPU_WAIT_ATTACH_ID_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuDetachIds__)(struct RmClientResource *, NV0000_CTRL_GPU_DETACH_IDS_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuGetSvmSize__)(struct RmClientResource *, NV0000_CTRL_GPU_GET_SVM_SIZE_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuGetPciInfo__)(struct RmClientResource *, NV0000_CTRL_GPU_GET_PCI_INFO_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuGetUuidInfo__)(struct RmClientResource *, NV0000_CTRL_GPU_GET_UUID_INFO_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuGetUuidFromGpuId__)(struct RmClientResource *, NV0000_CTRL_GPU_GET_UUID_FROM_GPU_ID_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuModifyGpuDrainState__)(struct RmClientResource *, NV0000_CTRL_GPU_MODIFY_DRAIN_STATE_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuQueryGpuDrainState__)(struct RmClientResource *, NV0000_CTRL_GPU_QUERY_DRAIN_STATE_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuGetMemOpEnable__)(struct RmClientResource *, NV0000_CTRL_GPU_GET_MEMOP_ENABLE_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuDisableNvlinkInit__)(struct RmClientResource *, NV0000_CTRL_GPU_DISABLE_NVLINK_INIT_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuSetNvlinkBwMode__)(struct RmClientResource *, NV0000_CTRL_GPU_SET_NVLINK_BW_MODE_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuGetNvlinkBwMode__)(struct RmClientResource *, NV0000_CTRL_GPU_GET_NVLINK_BW_MODE_PARAMS *); - NV_STATUS (*__cliresCtrlCmdLegacyConfig__)(struct RmClientResource *, NV0000_CTRL_GPU_LEGACY_CONFIG_PARAMS *); - NV_STATUS (*__cliresCtrlCmdIdleChannels__)(struct RmClientResource *, NV0000_CTRL_GPU_IDLE_CHANNELS_PARAMS *); - NV_STATUS (*__cliresCtrlCmdPushGspUcode__)(struct RmClientResource *, NV0000_CTRL_GPU_PUSH_GSP_UCODE_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuGetVideoLinks__)(struct RmClientResource *, NV0000_CTRL_GPU_GET_VIDEO_LINKS_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGsyncGetAttachedIds__)(struct RmClientResource *, NV0000_CTRL_GSYNC_GET_ATTACHED_IDS_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGsyncGetIdInfo__)(struct RmClientResource *, NV0000_CTRL_GSYNC_GET_ID_INFO_PARAMS *); - NV_STATUS (*__cliresCtrlCmdDiagProfileRpc__)(struct RmClientResource *, NV0000_CTRL_DIAG_PROFILE_RPC_PARAMS *); - NV_STATUS (*__cliresCtrlCmdDiagDumpRpc__)(struct RmClientResource *, NV0000_CTRL_DIAG_DUMP_RPC_PARAMS *); - NV_STATUS (*__cliresCtrlCmdEventSetNotification__)(struct RmClientResource *, NV0000_CTRL_EVENT_SET_NOTIFICATION_PARAMS *); - NV_STATUS (*__cliresCtrlCmdEventGetSystemEventStatus__)(struct RmClientResource *, NV0000_CTRL_GET_SYSTEM_EVENT_STATUS_PARAMS *); - NV_STATUS (*__cliresCtrlCmdOsUnixExportObjectToFd__)(struct RmClientResource *, NV0000_CTRL_OS_UNIX_EXPORT_OBJECT_TO_FD_PARAMS *); - NV_STATUS (*__cliresCtrlCmdOsUnixImportObjectFromFd__)(struct RmClientResource *, NV0000_CTRL_OS_UNIX_IMPORT_OBJECT_FROM_FD_PARAMS *); - NV_STATUS (*__cliresCtrlCmdOsUnixGetExportObjectInfo__)(struct RmClientResource *, NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS *); - NV_STATUS (*__cliresCtrlCmdOsUnixCreateExportObjectFd__)(struct RmClientResource *, NV0000_CTRL_OS_UNIX_CREATE_EXPORT_OBJECT_FD_PARAMS *); - NV_STATUS (*__cliresCtrlCmdOsUnixExportObjectsToFd__)(struct RmClientResource *, NV0000_CTRL_OS_UNIX_EXPORT_OBJECTS_TO_FD_PARAMS *); - NV_STATUS (*__cliresCtrlCmdOsUnixImportObjectsFromFd__)(struct RmClientResource *, NV0000_CTRL_OS_UNIX_IMPORT_OBJECTS_FROM_FD_PARAMS *); - NV_STATUS (*__cliresCtrlCmdOsUnixFlushUserCache__)(struct RmClientResource *, NV0000_CTRL_OS_UNIX_FLUSH_USER_CACHE_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuAcctSetAccountingState__)(struct RmClientResource *, NV0000_CTRL_GPUACCT_SET_ACCOUNTING_STATE_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuAcctGetAccountingState__)(struct RmClientResource *, NV0000_CTRL_GPUACCT_GET_ACCOUNTING_STATE_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuAcctGetProcAccountingInfo__)(struct RmClientResource *, NV0000_CTRL_GPUACCT_GET_PROC_ACCOUNTING_INFO_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuAcctGetAccountingPids__)(struct RmClientResource *, NV0000_CTRL_GPUACCT_GET_ACCOUNTING_PIDS_PARAMS *); - NV_STATUS (*__cliresCtrlCmdGpuAcctClearAccountingData__)(struct RmClientResource *, NV0000_CTRL_GPUACCT_CLEAR_ACCOUNTING_DATA_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSetSubProcessID__)(struct RmClientResource *, NV0000_CTRL_SET_SUB_PROCESS_ID_PARAMS *); - NV_STATUS (*__cliresCtrlCmdDisableSubProcessUserdIsolation__)(struct RmClientResource *, NV0000_CTRL_DISABLE_SUB_PROCESS_USERD_ISOLATION_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSyncGpuBoostInfo__)(struct RmClientResource *, NV0000_SYNC_GPU_BOOST_INFO_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSyncGpuBoostGroupCreate__)(struct RmClientResource *, NV0000_SYNC_GPU_BOOST_GROUP_CREATE_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSyncGpuBoostGroupDestroy__)(struct RmClientResource *, NV0000_SYNC_GPU_BOOST_GROUP_DESTROY_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSyncGpuBoostGroupInfo__)(struct RmClientResource *, NV0000_SYNC_GPU_BOOST_GROUP_INFO_PARAMS *); - NV_STATUS (*__cliresCtrlCmdVgpuGetStartData__)(struct RmClientResource *, NV0000_CTRL_VGPU_GET_START_DATA_PARAMS *); - NV_STATUS (*__cliresCtrlCmdVgpuGetVgpuVersion__)(struct RmClientResource *, NV0000_CTRL_VGPU_GET_VGPU_VERSION_PARAMS *); - NV_STATUS (*__cliresCtrlCmdVgpuSetVgpuVersion__)(struct RmClientResource *, NV0000_CTRL_VGPU_SET_VGPU_VERSION_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemNVPCFGetPowerModeInfo__)(struct RmClientResource *, NV0000_CTRL_CMD_SYSTEM_NVPCF_GET_POWER_MODE_INFO_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemSyncExternalFabricMgmt__)(struct RmClientResource *, NV0000_CTRL_CMD_SYSTEM_SYNC_EXTERNAL_FABRIC_MGMT_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemPfmreqhndlrCtrl__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_CTRL_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemPfmreqhndlrGetFrmData__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_FRM_DATA_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemPfmreqhndlrSetFrmData__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_SET_FRM_DATA_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemPfmreqhndlrCallAcpi__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_CALL_ACPI_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemPfmreqhndlrControl__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_CONTROL_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemPfmreqhndlrBatchControl__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_BATCH_CONTROL_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemPfmreqhndlrGetPerfSensorCounters__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_PERF_SENSOR_COUNTERS_PARAMS *); - NV_STATUS (*__cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters__)(struct RmClientResource *, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_PERF_SENSOR_COUNTERS_PARAMS *); - NV_STATUS (*__cliresControl__)(struct RmClientResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__cliresUnmap__)(struct RmClientResource *, struct CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__cliresMapTo__)(struct RmClientResource *, RS_RES_MAP_TO_PARAMS *); - void (*__cliresSetNotificationShare__)(struct RmClientResource *, struct NotifShare *); - NV_STATUS (*__cliresControlFilter__)(struct RmClientResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__cliresAddAdditionalDependants__)(struct RsClient *, struct RmClientResource *, RsResourceRef *); - NvU32 (*__cliresGetRefCount__)(struct RmClientResource *); - NV_STATUS (*__cliresUnregisterEvent__)(struct RmClientResource *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__cliresControlSerialization_Prologue__)(struct RmClientResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__cliresCanCopy__)(struct RmClientResource *); - NvBool (*__cliresIsPartialUnmapSupported__)(struct RmClientResource *); - void (*__cliresPreDestruct__)(struct RmClientResource *); - NV_STATUS (*__cliresUnmapFrom__)(struct RmClientResource *, RS_RES_UNMAP_FROM_PARAMS *); - NV_STATUS (*__cliresIsDuplicate__)(struct RmClientResource *, NvHandle, NvBool *); - void (*__cliresControlSerialization_Epilogue__)(struct RmClientResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__cliresGetNotificationListPtr__)(struct RmClientResource *); - struct NotifShare *(*__cliresGetNotificationShare__)(struct RmClientResource *); - NV_STATUS (*__cliresMap__)(struct RmClientResource *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NV_STATUS (*__cliresGetOrAllocNotifShare__)(struct RmClientResource *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^3 + struct RsResource *__nvoc_pbase_RsResource; // res super^2 + struct RsClientResource *__nvoc_pbase_RsClientResource; // clientres super + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super + struct INotifier *__nvoc_pbase_INotifier; // inotify super^2 + struct Notifier *__nvoc_pbase_Notifier; // notify super + struct RmClientResource *__nvoc_pbase_RmClientResource; // clires + + // Vtable with 128 per-object function pointers + NvBool (*__cliresAccessCallback__)(struct RmClientResource * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual override (res) base (clientres) + NvBool (*__cliresShareCallback__)(struct RmClientResource * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual override (res) base (clientres) + NV_STATUS (*__cliresControl_Prologue__)(struct RmClientResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (clientres) + void (*__cliresControl_Epilogue__)(struct RmClientResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (clientres) + NV_STATUS (*__cliresCtrlCmdSystemGetCpuInfo__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GET_CPU_INFO_PARAMS *); // exported (id=0x102) + NV_STATUS (*__cliresCtrlCmdSystemGetFeatures__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GET_FEATURES_PARAMS *); // exported (id=0x1f0) + NV_STATUS (*__cliresCtrlCmdSystemGetBuildVersionV2__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_V2_PARAMS *); // exported (id=0x13e) + NV_STATUS (*__cliresCtrlCmdSystemExecuteAcpiMethod__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS *); // exported (id=0x130) + NV_STATUS (*__cliresCtrlCmdSystemGetChipsetInfo__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GET_CHIPSET_INFO_PARAMS *); // exported (id=0x104) + NV_STATUS (*__cliresCtrlCmdSystemGetLockTimes__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GET_LOCK_TIMES_PARAMS *); // exported (id=0x109) + NV_STATUS (*__cliresCtrlCmdSystemGetClassList__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GET_CLASSLIST_PARAMS *); // exported (id=0x108) + NV_STATUS (*__cliresCtrlCmdSystemNotifyEvent__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_NOTIFY_EVENT_PARAMS *); // exported (id=0x110) + NV_STATUS (*__cliresCtrlCmdSystemGetPlatformType__)(struct RmClientResource * /*this*/, NV0000_CTRL_CMD_SYSTEM_GET_PLATFORM_TYPE_PARAMS *); // exported (id=0x111) + NV_STATUS (*__cliresCtrlCmdSystemDebugCtrlRmMsg__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_DEBUG_RMMSG_CTRL_PARAMS *); // exported (id=0x121) + NV_STATUS (*__cliresCtrlCmdSystemGpsControl__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GPS_CONTROL_PARAMS *); // exported (id=0x122) + NV_STATUS (*__cliresCtrlCmdSystemGpsBatchControl__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GPS_BATCH_CONTROL_PARAMS *); // exported (id=0x123) + NV_STATUS (*__cliresCtrlCmdSystemGetHwbcInfo__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GET_HWBC_INFO_PARAMS *); // exported (id=0x124) + NV_STATUS (*__cliresCtrlCmdSystemGetP2pCaps__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS *); // exported (id=0x127) + NV_STATUS (*__cliresCtrlCmdSystemGetP2pCapsV2__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GET_P2P_CAPS_V2_PARAMS *); // exported (id=0x12b) + NV_STATUS (*__cliresCtrlCmdSystemGetP2pCapsMatrix__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GET_P2P_CAPS_MATRIX_PARAMS *); // exported (id=0x13a) + NV_STATUS (*__cliresCtrlCmdSystemGpsCtrl__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GPS_CTRL_PARAMS *); // exported (id=0x12a) + NV_STATUS (*__cliresCtrlCmdSystemGpsGetFrmData__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GPS_GET_FRM_DATA_PARAMS *); // exported (id=0x12f) + NV_STATUS (*__cliresCtrlCmdSystemGpsSetFrmData__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GPS_SET_FRM_DATA_PARAMS *); // exported (id=0x132) + NV_STATUS (*__cliresCtrlCmdSystemGpsCallAcpi__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GPS_CALL_ACPI_PARAMS *); // exported (id=0x12d) + NV_STATUS (*__cliresCtrlCmdSystemGetPerfSensorCounters__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GPS_GET_PERF_SENSOR_COUNTERS_PARAMS *); // exported (id=0x12c) + NV_STATUS (*__cliresCtrlCmdSystemGetExtendedPerfSensorCounters__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GPS_GET_PERF_SENSOR_COUNTERS_PARAMS *); // exported (id=0x12e) + NV_STATUS (*__cliresCtrlCmdSystemGetVgxSystemInfo__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GET_VGX_SYSTEM_INFO_PARAMS *); // exported (id=0x133) + NV_STATUS (*__cliresCtrlCmdSystemGetGpusPowerStatus__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GET_GPUS_POWER_STATUS_PARAMS *); // exported (id=0x134) + NV_STATUS (*__cliresCtrlCmdSystemGetPrivilegedStatus__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GET_PRIVILEGED_STATUS_PARAMS *); // exported (id=0x135) + NV_STATUS (*__cliresCtrlCmdSystemGetFabricStatus__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GET_FABRIC_STATUS_PARAMS *); // exported (id=0x136) + NV_STATUS (*__cliresCtrlCmdSystemGetRmInstanceId__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GET_RM_INSTANCE_ID_PARAMS *); // exported (id=0x139) + NV_STATUS (*__cliresCtrlCmdSystemGetClientDatabaseInfo__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GET_CLIENT_DATABASE_INFO_PARAMS *); // exported (id=0x13d) + NV_STATUS (*__cliresCtrlCmdSystemRmctrlCacheModeCtrl__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_RMCTRL_CACHE_MODE_CTRL_PARAMS *); // exported (id=0x13f) + NV_STATUS (*__cliresCtrlCmdNvdGetDumpSize__)(struct RmClientResource * /*this*/, NV0000_CTRL_NVD_GET_DUMP_SIZE_PARAMS *); // exported (id=0x601) + NV_STATUS (*__cliresCtrlCmdNvdGetDump__)(struct RmClientResource * /*this*/, NV0000_CTRL_NVD_GET_DUMP_PARAMS *); // exported (id=0x602) + NV_STATUS (*__cliresCtrlCmdNvdGetTimestamp__)(struct RmClientResource * /*this*/, NV0000_CTRL_NVD_GET_TIMESTAMP_PARAMS *); // exported (id=0x603) + NV_STATUS (*__cliresCtrlCmdNvdGetNvlogInfo__)(struct RmClientResource * /*this*/, NV0000_CTRL_NVD_GET_NVLOG_INFO_PARAMS *); // exported (id=0x604) + NV_STATUS (*__cliresCtrlCmdNvdGetNvlogBufferInfo__)(struct RmClientResource * /*this*/, NV0000_CTRL_NVD_GET_NVLOG_BUFFER_INFO_PARAMS *); // exported (id=0x605) + NV_STATUS (*__cliresCtrlCmdNvdGetNvlog__)(struct RmClientResource * /*this*/, NV0000_CTRL_NVD_GET_NVLOG_PARAMS *); // exported (id=0x606) + NV_STATUS (*__cliresCtrlCmdNvdGetRcerrRpt__)(struct RmClientResource * /*this*/, NV0000_CTRL_CMD_NVD_GET_RCERR_RPT_PARAMS *); // exported (id=0x607) + NV_STATUS (*__cliresCtrlCmdClientGetAddrSpaceType__)(struct RmClientResource * /*this*/, NV0000_CTRL_CLIENT_GET_ADDR_SPACE_TYPE_PARAMS *); // exported (id=0xd01) + NV_STATUS (*__cliresCtrlCmdClientGetHandleInfo__)(struct RmClientResource * /*this*/, NV0000_CTRL_CLIENT_GET_HANDLE_INFO_PARAMS *); // exported (id=0xd02) + NV_STATUS (*__cliresCtrlCmdClientGetAccessRights__)(struct RmClientResource * /*this*/, NV0000_CTRL_CLIENT_GET_ACCESS_RIGHTS_PARAMS *); // exported (id=0xd03) + NV_STATUS (*__cliresCtrlCmdClientSetInheritedSharePolicy__)(struct RmClientResource * /*this*/, NV0000_CTRL_CLIENT_SET_INHERITED_SHARE_POLICY_PARAMS *); // exported (id=0xd04) + NV_STATUS (*__cliresCtrlCmdClientShareObject__)(struct RmClientResource * /*this*/, NV0000_CTRL_CLIENT_SHARE_OBJECT_PARAMS *); // exported (id=0xd06) + NV_STATUS (*__cliresCtrlCmdClientGetChildHandle__)(struct RmClientResource * /*this*/, NV0000_CTRL_CMD_CLIENT_GET_CHILD_HANDLE_PARAMS *); // exported (id=0xd05) + NV_STATUS (*__cliresCtrlCmdObjectsAreDuplicates__)(struct RmClientResource * /*this*/, NV0000_CTRL_CLIENT_OBJECTS_ARE_DUPLICATES_PARAMS *); // exported (id=0xd07) + NV_STATUS (*__cliresCtrlCmdClientSubscribeToImexChannel__)(struct RmClientResource * /*this*/, NV0000_CTRL_CLIENT_SUBSCRIBE_TO_IMEX_CHANNEL_PARAMS *); // exported (id=0xd08) + NV_STATUS (*__cliresCtrlCmdGpuGetAttachedIds__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_GET_ATTACHED_IDS_PARAMS *); // exported (id=0x201) + NV_STATUS (*__cliresCtrlCmdGpuGetIdInfo__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_GET_ID_INFO_PARAMS *); // exported (id=0x202) + NV_STATUS (*__cliresCtrlCmdGpuGetIdInfoV2__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_GET_ID_INFO_V2_PARAMS *); // exported (id=0x205) + NV_STATUS (*__cliresCtrlCmdGpuGetInitStatus__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_GET_INIT_STATUS_PARAMS *); // exported (id=0x203) + NV_STATUS (*__cliresCtrlCmdGpuGetDeviceIds__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_GET_DEVICE_IDS_PARAMS *); // exported (id=0x204) + NV_STATUS (*__cliresCtrlCmdGpuGetActiveDeviceIds__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_GET_ACTIVE_DEVICE_IDS_PARAMS *); // exported (id=0x288) + NV_STATUS (*__cliresCtrlCmdGpuGetProbedIds__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_GET_PROBED_IDS_PARAMS *); // exported (id=0x214) + NV_STATUS (*__cliresCtrlCmdGpuAttachIds__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_ATTACH_IDS_PARAMS *); // exported (id=0x215) + NV_STATUS (*__cliresCtrlCmdGpuAsyncAttachId__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_ASYNC_ATTACH_ID_PARAMS *); // exported (id=0x289) + NV_STATUS (*__cliresCtrlCmdGpuWaitAttachId__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_WAIT_ATTACH_ID_PARAMS *); // exported (id=0x290) + NV_STATUS (*__cliresCtrlCmdGpuDetachIds__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_DETACH_IDS_PARAMS *); // exported (id=0x216) + NV_STATUS (*__cliresCtrlCmdGpuGetSvmSize__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_GET_SVM_SIZE_PARAMS *); // exported (id=0x240) + NV_STATUS (*__cliresCtrlCmdGpuGetPciInfo__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_GET_PCI_INFO_PARAMS *); // exported (id=0x21b) + NV_STATUS (*__cliresCtrlCmdGpuGetUuidInfo__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_GET_UUID_INFO_PARAMS *); // exported (id=0x274) + NV_STATUS (*__cliresCtrlCmdGpuGetUuidFromGpuId__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_GET_UUID_FROM_GPU_ID_PARAMS *); // exported (id=0x275) + NV_STATUS (*__cliresCtrlCmdGpuModifyGpuDrainState__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_MODIFY_DRAIN_STATE_PARAMS *); // exported (id=0x278) + NV_STATUS (*__cliresCtrlCmdGpuQueryGpuDrainState__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_QUERY_DRAIN_STATE_PARAMS *); // exported (id=0x279) + NV_STATUS (*__cliresCtrlCmdGpuGetMemOpEnable__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_GET_MEMOP_ENABLE_PARAMS *); // exported (id=0x27b) + NV_STATUS (*__cliresCtrlCmdGpuDisableNvlinkInit__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_DISABLE_NVLINK_INIT_PARAMS *); // exported (id=0x281) + NV_STATUS (*__cliresCtrlCmdGpuSetNvlinkBwMode__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_SET_NVLINK_BW_MODE_PARAMS *); // exported (id=0x286) + NV_STATUS (*__cliresCtrlCmdGpuGetNvlinkBwMode__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_GET_NVLINK_BW_MODE_PARAMS *); // exported (id=0x287) + NV_STATUS (*__cliresCtrlCmdLegacyConfig__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_LEGACY_CONFIG_PARAMS *); // exported (id=0x282) + NV_STATUS (*__cliresCtrlCmdIdleChannels__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_IDLE_CHANNELS_PARAMS *); // exported (id=0x283) + NV_STATUS (*__cliresCtrlCmdPushGspUcode__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_PUSH_GSP_UCODE_PARAMS *); // exported (id=0x285) + NV_STATUS (*__cliresCtrlCmdGpuGetVideoLinks__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPU_GET_VIDEO_LINKS_PARAMS *); // exported (id=0x219) + NV_STATUS (*__cliresCtrlCmdGsyncGetAttachedIds__)(struct RmClientResource * /*this*/, NV0000_CTRL_GSYNC_GET_ATTACHED_IDS_PARAMS *); // exported (id=0x301) + NV_STATUS (*__cliresCtrlCmdGsyncGetIdInfo__)(struct RmClientResource * /*this*/, NV0000_CTRL_GSYNC_GET_ID_INFO_PARAMS *); // exported (id=0x302) + NV_STATUS (*__cliresCtrlCmdDiagProfileRpc__)(struct RmClientResource * /*this*/, NV0000_CTRL_DIAG_PROFILE_RPC_PARAMS *); // exported (id=0x488) + NV_STATUS (*__cliresCtrlCmdDiagDumpRpc__)(struct RmClientResource * /*this*/, NV0000_CTRL_DIAG_DUMP_RPC_PARAMS *); // exported (id=0x489) + NV_STATUS (*__cliresCtrlCmdEventSetNotification__)(struct RmClientResource * /*this*/, NV0000_CTRL_EVENT_SET_NOTIFICATION_PARAMS *); // exported (id=0x501) + NV_STATUS (*__cliresCtrlCmdEventGetSystemEventStatus__)(struct RmClientResource * /*this*/, NV0000_CTRL_GET_SYSTEM_EVENT_STATUS_PARAMS *); // exported (id=0x502) + NV_STATUS (*__cliresCtrlCmdOsUnixExportObjectToFd__)(struct RmClientResource * /*this*/, NV0000_CTRL_OS_UNIX_EXPORT_OBJECT_TO_FD_PARAMS *); // exported (id=0x3d05) + NV_STATUS (*__cliresCtrlCmdOsUnixImportObjectFromFd__)(struct RmClientResource * /*this*/, NV0000_CTRL_OS_UNIX_IMPORT_OBJECT_FROM_FD_PARAMS *); // exported (id=0x3d06) + NV_STATUS (*__cliresCtrlCmdOsUnixGetExportObjectInfo__)(struct RmClientResource * /*this*/, NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS *); // exported (id=0x3d08) + NV_STATUS (*__cliresCtrlCmdOsUnixCreateExportObjectFd__)(struct RmClientResource * /*this*/, NV0000_CTRL_OS_UNIX_CREATE_EXPORT_OBJECT_FD_PARAMS *); // exported (id=0x3d0a) + NV_STATUS (*__cliresCtrlCmdOsUnixExportObjectsToFd__)(struct RmClientResource * /*this*/, NV0000_CTRL_OS_UNIX_EXPORT_OBJECTS_TO_FD_PARAMS *); // exported (id=0x3d0b) + NV_STATUS (*__cliresCtrlCmdOsUnixImportObjectsFromFd__)(struct RmClientResource * /*this*/, NV0000_CTRL_OS_UNIX_IMPORT_OBJECTS_FROM_FD_PARAMS *); // exported (id=0x3d0c) + NV_STATUS (*__cliresCtrlCmdOsUnixFlushUserCache__)(struct RmClientResource * /*this*/, NV0000_CTRL_OS_UNIX_FLUSH_USER_CACHE_PARAMS *); // exported (id=0x3d02) + NV_STATUS (*__cliresCtrlCmdGpuAcctSetAccountingState__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPUACCT_SET_ACCOUNTING_STATE_PARAMS *); // exported (id=0xb01) + NV_STATUS (*__cliresCtrlCmdGpuAcctGetAccountingState__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPUACCT_GET_ACCOUNTING_STATE_PARAMS *); // exported (id=0xb02) + NV_STATUS (*__cliresCtrlCmdGpuAcctGetProcAccountingInfo__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPUACCT_GET_PROC_ACCOUNTING_INFO_PARAMS *); // exported (id=0xb03) + NV_STATUS (*__cliresCtrlCmdGpuAcctGetAccountingPids__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPUACCT_GET_ACCOUNTING_PIDS_PARAMS *); // exported (id=0xb04) + NV_STATUS (*__cliresCtrlCmdGpuAcctClearAccountingData__)(struct RmClientResource * /*this*/, NV0000_CTRL_GPUACCT_CLEAR_ACCOUNTING_DATA_PARAMS *); // exported (id=0xb05) + NV_STATUS (*__cliresCtrlCmdSetSubProcessID__)(struct RmClientResource * /*this*/, NV0000_CTRL_SET_SUB_PROCESS_ID_PARAMS *); // exported (id=0x901) + NV_STATUS (*__cliresCtrlCmdDisableSubProcessUserdIsolation__)(struct RmClientResource * /*this*/, NV0000_CTRL_DISABLE_SUB_PROCESS_USERD_ISOLATION_PARAMS *); // exported (id=0x902) + NV_STATUS (*__cliresCtrlCmdSyncGpuBoostInfo__)(struct RmClientResource * /*this*/, NV0000_SYNC_GPU_BOOST_INFO_PARAMS *); // exported (id=0xa01) + NV_STATUS (*__cliresCtrlCmdSyncGpuBoostGroupCreate__)(struct RmClientResource * /*this*/, NV0000_SYNC_GPU_BOOST_GROUP_CREATE_PARAMS *); // exported (id=0xa02) + NV_STATUS (*__cliresCtrlCmdSyncGpuBoostGroupDestroy__)(struct RmClientResource * /*this*/, NV0000_SYNC_GPU_BOOST_GROUP_DESTROY_PARAMS *); // exported (id=0xa03) + NV_STATUS (*__cliresCtrlCmdSyncGpuBoostGroupInfo__)(struct RmClientResource * /*this*/, NV0000_SYNC_GPU_BOOST_GROUP_INFO_PARAMS *); // exported (id=0xa04) + NV_STATUS (*__cliresCtrlCmdVgpuGetVgpuVersion__)(struct RmClientResource * /*this*/, NV0000_CTRL_VGPU_GET_VGPU_VERSION_PARAMS *); // exported (id=0x137) + NV_STATUS (*__cliresCtrlCmdVgpuSetVgpuVersion__)(struct RmClientResource * /*this*/, NV0000_CTRL_VGPU_SET_VGPU_VERSION_PARAMS *); // exported (id=0x138) + NV_STATUS (*__cliresCtrlCmdSystemNVPCFGetPowerModeInfo__)(struct RmClientResource * /*this*/, NV0000_CTRL_CMD_SYSTEM_NVPCF_GET_POWER_MODE_INFO_PARAMS *); // exported (id=0x13b) + NV_STATUS (*__cliresCtrlCmdSystemSyncExternalFabricMgmt__)(struct RmClientResource * /*this*/, NV0000_CTRL_CMD_SYSTEM_SYNC_EXTERNAL_FABRIC_MGMT_PARAMS *); // exported (id=0x13c) + NV_STATUS (*__cliresCtrlCmdSystemPfmreqhndlrCtrl__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_CTRL_PARAMS *); // exported (id=0x142) + NV_STATUS (*__cliresCtrlCmdSystemPfmreqhndlrGetFrmData__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_FRM_DATA_PARAMS *); // exported (id=0x144) + NV_STATUS (*__cliresCtrlCmdSystemPfmreqhndlrSetFrmData__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_SET_FRM_DATA_PARAMS *); // exported (id=0x145) + NV_STATUS (*__cliresCtrlCmdSystemPfmreqhndlrCallAcpi__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_CALL_ACPI_PARAMS *); // exported (id=0x143) + NV_STATUS (*__cliresCtrlCmdSystemPfmreqhndlrControl__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_CONTROL_PARAMS *); // exported (id=0x140) + NV_STATUS (*__cliresCtrlCmdSystemPfmreqhndlrBatchControl__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_BATCH_CONTROL_PARAMS *); // exported (id=0x141) + NV_STATUS (*__cliresCtrlCmdSystemPfmreqhndlrGetPerfSensorCounters__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_PERF_SENSOR_COUNTERS_PARAMS *); // exported (id=0x146) + NV_STATUS (*__cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_PERF_SENSOR_COUNTERS_PARAMS *); // exported (id=0x147) + NvBool (*__cliresCanCopy__)(struct RmClientResource * /*this*/); // virtual inherited (res) base (clientres) + NV_STATUS (*__cliresIsDuplicate__)(struct RmClientResource * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (clientres) + void (*__cliresPreDestruct__)(struct RmClientResource * /*this*/); // virtual inherited (res) base (clientres) + NV_STATUS (*__cliresControl__)(struct RmClientResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (clientres) + NV_STATUS (*__cliresControlFilter__)(struct RmClientResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (clientres) + NV_STATUS (*__cliresControlSerialization_Prologue__)(struct RmClientResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (clientres) + void (*__cliresControlSerialization_Epilogue__)(struct RmClientResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (clientres) + NV_STATUS (*__cliresMap__)(struct RmClientResource * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (clientres) + NV_STATUS (*__cliresUnmap__)(struct RmClientResource * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (clientres) + NvBool (*__cliresIsPartialUnmapSupported__)(struct RmClientResource * /*this*/); // inline virtual inherited (res) base (clientres) body + NV_STATUS (*__cliresMapTo__)(struct RmClientResource * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (clientres) + NV_STATUS (*__cliresUnmapFrom__)(struct RmClientResource * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (clientres) + NvU32 (*__cliresGetRefCount__)(struct RmClientResource * /*this*/); // virtual inherited (res) base (clientres) + void (*__cliresAddAdditionalDependants__)(struct RsClient *, struct RmClientResource * /*this*/, RsResourceRef *); // virtual inherited (res) base (clientres) + PEVENTNOTIFICATION * (*__cliresGetNotificationListPtr__)(struct RmClientResource * /*this*/); // virtual inherited (notify) base (notify) + struct NotifShare * (*__cliresGetNotificationShare__)(struct RmClientResource * /*this*/); // virtual inherited (notify) base (notify) + void (*__cliresSetNotificationShare__)(struct RmClientResource * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) + NV_STATUS (*__cliresUnregisterEvent__)(struct RmClientResource * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) + NV_STATUS (*__cliresGetOrAllocNotifShare__)(struct RmClientResource * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) }; #ifndef __NVOC_CLASS_RmClientResource_TYPEDEF__ @@ -219,6 +235,7 @@ typedef struct RmClientResource RmClientResource; #define __nvoc_class_id_RmClientResource 0x37a701 #endif /* __nvoc_class_id_RmClientResource */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmClientResource; #define __staticCast_RmClientResource(pThis) \ @@ -231,878 +248,1002 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmClientResource; ((RmClientResource*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(RmClientResource))) #endif //__nvoc_client_resource_h_disabled - NV_STATUS __nvoc_objCreateDynamic_RmClientResource(RmClientResource**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_RmClientResource(RmClientResource**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_RmClientResource(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_RmClientResource((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define cliresAccessCallback_FNPTR(pRmCliRes) pRmCliRes->__cliresAccessCallback__ #define cliresAccessCallback(pRmCliRes, pInvokingClient, pAllocParams, accessRight) cliresAccessCallback_DISPATCH(pRmCliRes, pInvokingClient, pAllocParams, accessRight) +#define cliresShareCallback_FNPTR(pRmCliRes) pRmCliRes->__cliresShareCallback__ #define cliresShareCallback(pRmCliRes, pInvokingClient, pParentRef, pSharePolicy) cliresShareCallback_DISPATCH(pRmCliRes, pInvokingClient, pParentRef, pSharePolicy) +#define cliresControl_Prologue_FNPTR(pRmCliRes) pRmCliRes->__cliresControl_Prologue__ #define cliresControl_Prologue(pRmCliRes, pCallContext, pParams) cliresControl_Prologue_DISPATCH(pRmCliRes, pCallContext, pParams) +#define cliresControl_Epilogue_FNPTR(pRmCliRes) pRmCliRes->__cliresControl_Epilogue__ #define cliresControl_Epilogue(pRmCliRes, pCallContext, pParams) cliresControl_Epilogue_DISPATCH(pRmCliRes, pCallContext, pParams) +#define cliresCtrlCmdSystemGetCpuInfo_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGetCpuInfo__ #define cliresCtrlCmdSystemGetCpuInfo(pRmCliRes, pCpuInfoParams) cliresCtrlCmdSystemGetCpuInfo_DISPATCH(pRmCliRes, pCpuInfoParams) +#define cliresCtrlCmdSystemGetFeatures_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGetFeatures__ #define cliresCtrlCmdSystemGetFeatures(pRmCliRes, pParams) cliresCtrlCmdSystemGetFeatures_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemGetBuildVersionV2_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGetBuildVersionV2__ #define cliresCtrlCmdSystemGetBuildVersionV2(pRmCliRes, pParams) cliresCtrlCmdSystemGetBuildVersionV2_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemExecuteAcpiMethod_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemExecuteAcpiMethod__ #define cliresCtrlCmdSystemExecuteAcpiMethod(pRmCliRes, pAcpiMethodParams) cliresCtrlCmdSystemExecuteAcpiMethod_DISPATCH(pRmCliRes, pAcpiMethodParams) +#define cliresCtrlCmdSystemGetChipsetInfo_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGetChipsetInfo__ #define cliresCtrlCmdSystemGetChipsetInfo(pRmCliRes, pChipsetInfo) cliresCtrlCmdSystemGetChipsetInfo_DISPATCH(pRmCliRes, pChipsetInfo) +#define cliresCtrlCmdSystemGetLockTimes_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGetLockTimes__ #define cliresCtrlCmdSystemGetLockTimes(pRmCliRes, pParams) cliresCtrlCmdSystemGetLockTimes_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemGetClassList_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGetClassList__ #define cliresCtrlCmdSystemGetClassList(pRmCliRes, pParams) cliresCtrlCmdSystemGetClassList_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemNotifyEvent_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemNotifyEvent__ #define cliresCtrlCmdSystemNotifyEvent(pRmCliRes, pParams) cliresCtrlCmdSystemNotifyEvent_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemGetPlatformType_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGetPlatformType__ #define cliresCtrlCmdSystemGetPlatformType(pRmCliRes, pSysParams) cliresCtrlCmdSystemGetPlatformType_DISPATCH(pRmCliRes, pSysParams) +#define cliresCtrlCmdSystemDebugCtrlRmMsg_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemDebugCtrlRmMsg__ #define cliresCtrlCmdSystemDebugCtrlRmMsg(pRmCliRes, pParams) cliresCtrlCmdSystemDebugCtrlRmMsg_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemGpsControl_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGpsControl__ #define cliresCtrlCmdSystemGpsControl(pRmCliRes, controlParams) cliresCtrlCmdSystemGpsControl_DISPATCH(pRmCliRes, controlParams) +#define cliresCtrlCmdSystemGpsBatchControl_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGpsBatchControl__ #define cliresCtrlCmdSystemGpsBatchControl(pRmCliRes, controlParams) cliresCtrlCmdSystemGpsBatchControl_DISPATCH(pRmCliRes, controlParams) +#define cliresCtrlCmdSystemGetHwbcInfo_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGetHwbcInfo__ #define cliresCtrlCmdSystemGetHwbcInfo(pRmCliRes, pParams) cliresCtrlCmdSystemGetHwbcInfo_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemGetP2pCaps_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGetP2pCaps__ #define cliresCtrlCmdSystemGetP2pCaps(pRmCliRes, pP2PParams) cliresCtrlCmdSystemGetP2pCaps_DISPATCH(pRmCliRes, pP2PParams) +#define cliresCtrlCmdSystemGetP2pCapsV2_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGetP2pCapsV2__ #define cliresCtrlCmdSystemGetP2pCapsV2(pRmCliRes, pP2PParams) cliresCtrlCmdSystemGetP2pCapsV2_DISPATCH(pRmCliRes, pP2PParams) +#define cliresCtrlCmdSystemGetP2pCapsMatrix_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGetP2pCapsMatrix__ #define cliresCtrlCmdSystemGetP2pCapsMatrix(pRmCliRes, pP2PParams) cliresCtrlCmdSystemGetP2pCapsMatrix_DISPATCH(pRmCliRes, pP2PParams) +#define cliresCtrlCmdSystemGpsCtrl_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGpsCtrl__ #define cliresCtrlCmdSystemGpsCtrl(pRmCliRes, pParams) cliresCtrlCmdSystemGpsCtrl_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemGpsGetFrmData_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGpsGetFrmData__ #define cliresCtrlCmdSystemGpsGetFrmData(pRmCliRes, pParams) cliresCtrlCmdSystemGpsGetFrmData_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemGpsSetFrmData_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGpsSetFrmData__ #define cliresCtrlCmdSystemGpsSetFrmData(pRmCliRes, pParams) cliresCtrlCmdSystemGpsSetFrmData_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemGpsCallAcpi_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGpsCallAcpi__ #define cliresCtrlCmdSystemGpsCallAcpi(pRmCliRes, pParams) cliresCtrlCmdSystemGpsCallAcpi_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemGetPerfSensorCounters_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGetPerfSensorCounters__ #define cliresCtrlCmdSystemGetPerfSensorCounters(pRmCliRes, pParams) cliresCtrlCmdSystemGetPerfSensorCounters_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemGetExtendedPerfSensorCounters_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGetExtendedPerfSensorCounters__ #define cliresCtrlCmdSystemGetExtendedPerfSensorCounters(pRmCliRes, pParams) cliresCtrlCmdSystemGetExtendedPerfSensorCounters_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemGetVgxSystemInfo_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGetVgxSystemInfo__ #define cliresCtrlCmdSystemGetVgxSystemInfo(pRmCliRes, pParams) cliresCtrlCmdSystemGetVgxSystemInfo_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemGetGpusPowerStatus_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGetGpusPowerStatus__ #define cliresCtrlCmdSystemGetGpusPowerStatus(pRmCliRes, pGpusPowerStatus) cliresCtrlCmdSystemGetGpusPowerStatus_DISPATCH(pRmCliRes, pGpusPowerStatus) +#define cliresCtrlCmdSystemGetPrivilegedStatus_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGetPrivilegedStatus__ #define cliresCtrlCmdSystemGetPrivilegedStatus(pRmCliRes, pParams) cliresCtrlCmdSystemGetPrivilegedStatus_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemGetFabricStatus_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGetFabricStatus__ #define cliresCtrlCmdSystemGetFabricStatus(pRmCliRes, pParams) cliresCtrlCmdSystemGetFabricStatus_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemGetRmInstanceId_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGetRmInstanceId__ #define cliresCtrlCmdSystemGetRmInstanceId(pRmCliRes, pRmInstanceIdParams) cliresCtrlCmdSystemGetRmInstanceId_DISPATCH(pRmCliRes, pRmInstanceIdParams) +#define cliresCtrlCmdSystemGetClientDatabaseInfo_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGetClientDatabaseInfo__ #define cliresCtrlCmdSystemGetClientDatabaseInfo(pRmCliRes, pParams) cliresCtrlCmdSystemGetClientDatabaseInfo_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemRmctrlCacheModeCtrl_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemRmctrlCacheModeCtrl__ #define cliresCtrlCmdSystemRmctrlCacheModeCtrl(pRmCliRes, pParams) cliresCtrlCmdSystemRmctrlCacheModeCtrl_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdNvdGetDumpSize_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdNvdGetDumpSize__ #define cliresCtrlCmdNvdGetDumpSize(pRmCliRes, pDumpSizeParams) cliresCtrlCmdNvdGetDumpSize_DISPATCH(pRmCliRes, pDumpSizeParams) +#define cliresCtrlCmdNvdGetDump_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdNvdGetDump__ #define cliresCtrlCmdNvdGetDump(pRmCliRes, pDumpParams) cliresCtrlCmdNvdGetDump_DISPATCH(pRmCliRes, pDumpParams) +#define cliresCtrlCmdNvdGetTimestamp_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdNvdGetTimestamp__ #define cliresCtrlCmdNvdGetTimestamp(pRmCliRes, pTimestampParams) cliresCtrlCmdNvdGetTimestamp_DISPATCH(pRmCliRes, pTimestampParams) +#define cliresCtrlCmdNvdGetNvlogInfo_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdNvdGetNvlogInfo__ #define cliresCtrlCmdNvdGetNvlogInfo(pRmCliRes, pParams) cliresCtrlCmdNvdGetNvlogInfo_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdNvdGetNvlogBufferInfo_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdNvdGetNvlogBufferInfo__ #define cliresCtrlCmdNvdGetNvlogBufferInfo(pRmCliRes, pParams) cliresCtrlCmdNvdGetNvlogBufferInfo_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdNvdGetNvlog_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdNvdGetNvlog__ #define cliresCtrlCmdNvdGetNvlog(pRmCliRes, pParams) cliresCtrlCmdNvdGetNvlog_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdNvdGetRcerrRpt_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdNvdGetRcerrRpt__ #define cliresCtrlCmdNvdGetRcerrRpt(pRmCliRes, pReportParams) cliresCtrlCmdNvdGetRcerrRpt_DISPATCH(pRmCliRes, pReportParams) +#define cliresCtrlCmdClientGetAddrSpaceType_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdClientGetAddrSpaceType__ #define cliresCtrlCmdClientGetAddrSpaceType(pRmCliRes, pParams) cliresCtrlCmdClientGetAddrSpaceType_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdClientGetHandleInfo_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdClientGetHandleInfo__ #define cliresCtrlCmdClientGetHandleInfo(pRmCliRes, pParams) cliresCtrlCmdClientGetHandleInfo_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdClientGetAccessRights_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdClientGetAccessRights__ #define cliresCtrlCmdClientGetAccessRights(pRmCliRes, pParams) cliresCtrlCmdClientGetAccessRights_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdClientSetInheritedSharePolicy_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdClientSetInheritedSharePolicy__ #define cliresCtrlCmdClientSetInheritedSharePolicy(pRmCliRes, pParams) cliresCtrlCmdClientSetInheritedSharePolicy_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdClientShareObject_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdClientShareObject__ #define cliresCtrlCmdClientShareObject(pRmCliRes, pParams) cliresCtrlCmdClientShareObject_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdClientGetChildHandle_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdClientGetChildHandle__ #define cliresCtrlCmdClientGetChildHandle(pRmCliRes, pParams) cliresCtrlCmdClientGetChildHandle_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdObjectsAreDuplicates_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdObjectsAreDuplicates__ #define cliresCtrlCmdObjectsAreDuplicates(pRmCliRes, pParams) cliresCtrlCmdObjectsAreDuplicates_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdClientSubscribeToImexChannel_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdClientSubscribeToImexChannel__ #define cliresCtrlCmdClientSubscribeToImexChannel(pRmCliRes, pParams) cliresCtrlCmdClientSubscribeToImexChannel_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdGpuGetAttachedIds_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuGetAttachedIds__ #define cliresCtrlCmdGpuGetAttachedIds(pRmCliRes, pGpuAttachedIds) cliresCtrlCmdGpuGetAttachedIds_DISPATCH(pRmCliRes, pGpuAttachedIds) +#define cliresCtrlCmdGpuGetIdInfo_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuGetIdInfo__ #define cliresCtrlCmdGpuGetIdInfo(pRmCliRes, pGpuIdInfoParams) cliresCtrlCmdGpuGetIdInfo_DISPATCH(pRmCliRes, pGpuIdInfoParams) +#define cliresCtrlCmdGpuGetIdInfoV2_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuGetIdInfoV2__ #define cliresCtrlCmdGpuGetIdInfoV2(pRmCliRes, pGpuIdInfoParams) cliresCtrlCmdGpuGetIdInfoV2_DISPATCH(pRmCliRes, pGpuIdInfoParams) +#define cliresCtrlCmdGpuGetInitStatus_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuGetInitStatus__ #define cliresCtrlCmdGpuGetInitStatus(pRmCliRes, pGpuInitStatusParams) cliresCtrlCmdGpuGetInitStatus_DISPATCH(pRmCliRes, pGpuInitStatusParams) +#define cliresCtrlCmdGpuGetDeviceIds_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuGetDeviceIds__ #define cliresCtrlCmdGpuGetDeviceIds(pRmCliRes, pDeviceIdsParams) cliresCtrlCmdGpuGetDeviceIds_DISPATCH(pRmCliRes, pDeviceIdsParams) +#define cliresCtrlCmdGpuGetActiveDeviceIds_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuGetActiveDeviceIds__ #define cliresCtrlCmdGpuGetActiveDeviceIds(pRmCliRes, pActiveDeviceIdsParams) cliresCtrlCmdGpuGetActiveDeviceIds_DISPATCH(pRmCliRes, pActiveDeviceIdsParams) +#define cliresCtrlCmdGpuGetProbedIds_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuGetProbedIds__ #define cliresCtrlCmdGpuGetProbedIds(pRmCliRes, pGpuProbedIds) cliresCtrlCmdGpuGetProbedIds_DISPATCH(pRmCliRes, pGpuProbedIds) +#define cliresCtrlCmdGpuAttachIds_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuAttachIds__ #define cliresCtrlCmdGpuAttachIds(pRmCliRes, pGpuAttachIds) cliresCtrlCmdGpuAttachIds_DISPATCH(pRmCliRes, pGpuAttachIds) +#define cliresCtrlCmdGpuAsyncAttachId_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuAsyncAttachId__ #define cliresCtrlCmdGpuAsyncAttachId(pRmCliRes, pAsyncAttachIdParams) cliresCtrlCmdGpuAsyncAttachId_DISPATCH(pRmCliRes, pAsyncAttachIdParams) +#define cliresCtrlCmdGpuWaitAttachId_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuWaitAttachId__ #define cliresCtrlCmdGpuWaitAttachId(pRmCliRes, pWaitAttachIdParams) cliresCtrlCmdGpuWaitAttachId_DISPATCH(pRmCliRes, pWaitAttachIdParams) +#define cliresCtrlCmdGpuDetachIds_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuDetachIds__ #define cliresCtrlCmdGpuDetachIds(pRmCliRes, pGpuDetachIds) cliresCtrlCmdGpuDetachIds_DISPATCH(pRmCliRes, pGpuDetachIds) +#define cliresCtrlCmdGpuGetSvmSize_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuGetSvmSize__ #define cliresCtrlCmdGpuGetSvmSize(pRmCliRes, pSvmSizeGetParams) cliresCtrlCmdGpuGetSvmSize_DISPATCH(pRmCliRes, pSvmSizeGetParams) +#define cliresCtrlCmdGpuGetPciInfo_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuGetPciInfo__ #define cliresCtrlCmdGpuGetPciInfo(pRmCliRes, pPciInfoParams) cliresCtrlCmdGpuGetPciInfo_DISPATCH(pRmCliRes, pPciInfoParams) +#define cliresCtrlCmdGpuGetUuidInfo_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuGetUuidInfo__ #define cliresCtrlCmdGpuGetUuidInfo(pRmCliRes, pParams) cliresCtrlCmdGpuGetUuidInfo_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdGpuGetUuidFromGpuId_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuGetUuidFromGpuId__ #define cliresCtrlCmdGpuGetUuidFromGpuId(pRmCliRes, pParams) cliresCtrlCmdGpuGetUuidFromGpuId_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdGpuModifyGpuDrainState_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuModifyGpuDrainState__ #define cliresCtrlCmdGpuModifyGpuDrainState(pRmCliRes, pParams) cliresCtrlCmdGpuModifyGpuDrainState_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdGpuQueryGpuDrainState_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuQueryGpuDrainState__ #define cliresCtrlCmdGpuQueryGpuDrainState(pRmCliRes, pParams) cliresCtrlCmdGpuQueryGpuDrainState_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdGpuGetMemOpEnable_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuGetMemOpEnable__ #define cliresCtrlCmdGpuGetMemOpEnable(pRmCliRes, pMemOpEnableParams) cliresCtrlCmdGpuGetMemOpEnable_DISPATCH(pRmCliRes, pMemOpEnableParams) +#define cliresCtrlCmdGpuDisableNvlinkInit_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuDisableNvlinkInit__ #define cliresCtrlCmdGpuDisableNvlinkInit(pRmCliRes, pParams) cliresCtrlCmdGpuDisableNvlinkInit_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdGpuSetNvlinkBwMode_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuSetNvlinkBwMode__ #define cliresCtrlCmdGpuSetNvlinkBwMode(pRmCliRes, pParams) cliresCtrlCmdGpuSetNvlinkBwMode_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdGpuGetNvlinkBwMode_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuGetNvlinkBwMode__ #define cliresCtrlCmdGpuGetNvlinkBwMode(pRmCliRes, pParams) cliresCtrlCmdGpuGetNvlinkBwMode_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdLegacyConfig_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdLegacyConfig__ #define cliresCtrlCmdLegacyConfig(pRmCliRes, pParams) cliresCtrlCmdLegacyConfig_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdIdleChannels_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdIdleChannels__ #define cliresCtrlCmdIdleChannels(pRmCliRes, pParams) cliresCtrlCmdIdleChannels_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdPushGspUcode_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdPushGspUcode__ #define cliresCtrlCmdPushGspUcode(pRmCliRes, pParams) cliresCtrlCmdPushGspUcode_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdGpuGetVideoLinks_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuGetVideoLinks__ #define cliresCtrlCmdGpuGetVideoLinks(pRmCliRes, pParams) cliresCtrlCmdGpuGetVideoLinks_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdGsyncGetAttachedIds_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGsyncGetAttachedIds__ #define cliresCtrlCmdGsyncGetAttachedIds(pRmCliRes, pGsyncAttachedIds) cliresCtrlCmdGsyncGetAttachedIds_DISPATCH(pRmCliRes, pGsyncAttachedIds) +#define cliresCtrlCmdGsyncGetIdInfo_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGsyncGetIdInfo__ #define cliresCtrlCmdGsyncGetIdInfo(pRmCliRes, pGsyncIdInfoParams) cliresCtrlCmdGsyncGetIdInfo_DISPATCH(pRmCliRes, pGsyncIdInfoParams) +#define cliresCtrlCmdDiagProfileRpc_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdDiagProfileRpc__ #define cliresCtrlCmdDiagProfileRpc(pRmCliRes, pRpcProfileParams) cliresCtrlCmdDiagProfileRpc_DISPATCH(pRmCliRes, pRpcProfileParams) +#define cliresCtrlCmdDiagDumpRpc_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdDiagDumpRpc__ #define cliresCtrlCmdDiagDumpRpc(pRmCliRes, pRpcDumpParams) cliresCtrlCmdDiagDumpRpc_DISPATCH(pRmCliRes, pRpcDumpParams) +#define cliresCtrlCmdEventSetNotification_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdEventSetNotification__ #define cliresCtrlCmdEventSetNotification(pRmCliRes, pEventSetNotificationParams) cliresCtrlCmdEventSetNotification_DISPATCH(pRmCliRes, pEventSetNotificationParams) +#define cliresCtrlCmdEventGetSystemEventStatus_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdEventGetSystemEventStatus__ #define cliresCtrlCmdEventGetSystemEventStatus(pRmCliRes, pSystemEventStatusParams) cliresCtrlCmdEventGetSystemEventStatus_DISPATCH(pRmCliRes, pSystemEventStatusParams) +#define cliresCtrlCmdOsUnixExportObjectToFd_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdOsUnixExportObjectToFd__ #define cliresCtrlCmdOsUnixExportObjectToFd(pRmCliRes, pParams) cliresCtrlCmdOsUnixExportObjectToFd_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdOsUnixImportObjectFromFd_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdOsUnixImportObjectFromFd__ #define cliresCtrlCmdOsUnixImportObjectFromFd(pRmCliRes, pParams) cliresCtrlCmdOsUnixImportObjectFromFd_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdOsUnixGetExportObjectInfo_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdOsUnixGetExportObjectInfo__ #define cliresCtrlCmdOsUnixGetExportObjectInfo(pRmCliRes, pParams) cliresCtrlCmdOsUnixGetExportObjectInfo_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdOsUnixCreateExportObjectFd_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdOsUnixCreateExportObjectFd__ #define cliresCtrlCmdOsUnixCreateExportObjectFd(pRmCliRes, pParams) cliresCtrlCmdOsUnixCreateExportObjectFd_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdOsUnixExportObjectsToFd_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdOsUnixExportObjectsToFd__ #define cliresCtrlCmdOsUnixExportObjectsToFd(pRmCliRes, pParams) cliresCtrlCmdOsUnixExportObjectsToFd_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdOsUnixImportObjectsFromFd_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdOsUnixImportObjectsFromFd__ #define cliresCtrlCmdOsUnixImportObjectsFromFd(pRmCliRes, pParams) cliresCtrlCmdOsUnixImportObjectsFromFd_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdOsUnixFlushUserCache_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdOsUnixFlushUserCache__ #define cliresCtrlCmdOsUnixFlushUserCache(pRmCliRes, pAddressSpaceParams) cliresCtrlCmdOsUnixFlushUserCache_DISPATCH(pRmCliRes, pAddressSpaceParams) +#define cliresCtrlCmdGpuAcctSetAccountingState_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuAcctSetAccountingState__ #define cliresCtrlCmdGpuAcctSetAccountingState(pRmCliRes, pParams) cliresCtrlCmdGpuAcctSetAccountingState_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdGpuAcctGetAccountingState_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuAcctGetAccountingState__ #define cliresCtrlCmdGpuAcctGetAccountingState(pRmCliRes, pParams) cliresCtrlCmdGpuAcctGetAccountingState_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdGpuAcctGetProcAccountingInfo_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuAcctGetProcAccountingInfo__ #define cliresCtrlCmdGpuAcctGetProcAccountingInfo(pRmCliRes, pAcctInfoParams) cliresCtrlCmdGpuAcctGetProcAccountingInfo_DISPATCH(pRmCliRes, pAcctInfoParams) +#define cliresCtrlCmdGpuAcctGetAccountingPids_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuAcctGetAccountingPids__ #define cliresCtrlCmdGpuAcctGetAccountingPids(pRmCliRes, pAcctPidsParams) cliresCtrlCmdGpuAcctGetAccountingPids_DISPATCH(pRmCliRes, pAcctPidsParams) +#define cliresCtrlCmdGpuAcctClearAccountingData_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdGpuAcctClearAccountingData__ #define cliresCtrlCmdGpuAcctClearAccountingData(pRmCliRes, pParams) cliresCtrlCmdGpuAcctClearAccountingData_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSetSubProcessID_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSetSubProcessID__ #define cliresCtrlCmdSetSubProcessID(pRmCliRes, pParams) cliresCtrlCmdSetSubProcessID_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdDisableSubProcessUserdIsolation_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdDisableSubProcessUserdIsolation__ #define cliresCtrlCmdDisableSubProcessUserdIsolation(pRmCliRes, pParams) cliresCtrlCmdDisableSubProcessUserdIsolation_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSyncGpuBoostInfo_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSyncGpuBoostInfo__ #define cliresCtrlCmdSyncGpuBoostInfo(pRmCliRes, pParams) cliresCtrlCmdSyncGpuBoostInfo_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSyncGpuBoostGroupCreate_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSyncGpuBoostGroupCreate__ #define cliresCtrlCmdSyncGpuBoostGroupCreate(pRmCliRes, pParams) cliresCtrlCmdSyncGpuBoostGroupCreate_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSyncGpuBoostGroupDestroy_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSyncGpuBoostGroupDestroy__ #define cliresCtrlCmdSyncGpuBoostGroupDestroy(pRmCliRes, pParams) cliresCtrlCmdSyncGpuBoostGroupDestroy_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSyncGpuBoostGroupInfo_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSyncGpuBoostGroupInfo__ #define cliresCtrlCmdSyncGpuBoostGroupInfo(pRmCliRes, pParams) cliresCtrlCmdSyncGpuBoostGroupInfo_DISPATCH(pRmCliRes, pParams) -#define cliresCtrlCmdVgpuGetStartData(pRmCliRes, pVgpuStartParams) cliresCtrlCmdVgpuGetStartData_DISPATCH(pRmCliRes, pVgpuStartParams) +#define cliresCtrlCmdVgpuGetVgpuVersion_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdVgpuGetVgpuVersion__ #define cliresCtrlCmdVgpuGetVgpuVersion(pRmCliRes, vgpuVersionInfo) cliresCtrlCmdVgpuGetVgpuVersion_DISPATCH(pRmCliRes, vgpuVersionInfo) +#define cliresCtrlCmdVgpuSetVgpuVersion_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdVgpuSetVgpuVersion__ #define cliresCtrlCmdVgpuSetVgpuVersion(pRmCliRes, vgpuVersionInfo) cliresCtrlCmdVgpuSetVgpuVersion_DISPATCH(pRmCliRes, vgpuVersionInfo) +#define cliresCtrlCmdSystemNVPCFGetPowerModeInfo_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemNVPCFGetPowerModeInfo__ #define cliresCtrlCmdSystemNVPCFGetPowerModeInfo(pRmCliRes, pParams) cliresCtrlCmdSystemNVPCFGetPowerModeInfo_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemSyncExternalFabricMgmt_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemSyncExternalFabricMgmt__ #define cliresCtrlCmdSystemSyncExternalFabricMgmt(pRmCliRes, pExtFabricMgmtParams) cliresCtrlCmdSystemSyncExternalFabricMgmt_DISPATCH(pRmCliRes, pExtFabricMgmtParams) +#define cliresCtrlCmdSystemPfmreqhndlrCtrl_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemPfmreqhndlrCtrl__ #define cliresCtrlCmdSystemPfmreqhndlrCtrl(pRmCliRes, pParams) cliresCtrlCmdSystemPfmreqhndlrCtrl_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemPfmreqhndlrGetFrmData_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemPfmreqhndlrGetFrmData__ #define cliresCtrlCmdSystemPfmreqhndlrGetFrmData(pRmCliRes, pParams) cliresCtrlCmdSystemPfmreqhndlrGetFrmData_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemPfmreqhndlrSetFrmData_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemPfmreqhndlrSetFrmData__ #define cliresCtrlCmdSystemPfmreqhndlrSetFrmData(pRmCliRes, pParams) cliresCtrlCmdSystemPfmreqhndlrSetFrmData_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemPfmreqhndlrCallAcpi_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemPfmreqhndlrCallAcpi__ #define cliresCtrlCmdSystemPfmreqhndlrCallAcpi(pRmCliRes, pParams) cliresCtrlCmdSystemPfmreqhndlrCallAcpi_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemPfmreqhndlrControl_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemPfmreqhndlrControl__ #define cliresCtrlCmdSystemPfmreqhndlrControl(pRmCliRes, controlParams) cliresCtrlCmdSystemPfmreqhndlrControl_DISPATCH(pRmCliRes, controlParams) +#define cliresCtrlCmdSystemPfmreqhndlrBatchControl_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemPfmreqhndlrBatchControl__ #define cliresCtrlCmdSystemPfmreqhndlrBatchControl(pRmCliRes, controlParams) cliresCtrlCmdSystemPfmreqhndlrBatchControl_DISPATCH(pRmCliRes, controlParams) +#define cliresCtrlCmdSystemPfmreqhndlrGetPerfSensorCounters_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemPfmreqhndlrGetPerfSensorCounters__ #define cliresCtrlCmdSystemPfmreqhndlrGetPerfSensorCounters(pRmCliRes, pParams) cliresCtrlCmdSystemPfmreqhndlrGetPerfSensorCounters_DISPATCH(pRmCliRes, pParams) +#define cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters__ #define cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters(pRmCliRes, pParams) cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters_DISPATCH(pRmCliRes, pParams) +#define cliresCanCopy_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resCanCopy__ +#define cliresCanCopy(pResource) cliresCanCopy_DISPATCH(pResource) +#define cliresIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define cliresIsDuplicate(pResource, hMemory, pDuplicate) cliresIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define cliresPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resPreDestruct__ +#define cliresPreDestruct(pResource) cliresPreDestruct_DISPATCH(pResource) +#define cliresControl_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resControl__ #define cliresControl(pResource, pCallContext, pParams) cliresControl_DISPATCH(pResource, pCallContext, pParams) -#define cliresUnmap(pResource, pCallContext, pCpuMapping) cliresUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define cliresMapTo(pResource, pParams) cliresMapTo_DISPATCH(pResource, pParams) -#define cliresSetNotificationShare(pNotifier, pNotifShare) cliresSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define cliresControlFilter_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resControlFilter__ #define cliresControlFilter(pResource, pCallContext, pParams) cliresControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define cliresAddAdditionalDependants(pClient, pResource, pReference) cliresAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define cliresGetRefCount(pResource) cliresGetRefCount_DISPATCH(pResource) -#define cliresUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) cliresUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define cliresControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resControlSerialization_Prologue__ #define cliresControlSerialization_Prologue(pResource, pCallContext, pParams) cliresControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define cliresCanCopy(pResource) cliresCanCopy_DISPATCH(pResource) +#define cliresControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resControlSerialization_Epilogue__ +#define cliresControlSerialization_Epilogue(pResource, pCallContext, pParams) cliresControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define cliresMap_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resMap__ +#define cliresMap(pResource, pCallContext, pParams, pCpuMapping) cliresMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define cliresUnmap_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resUnmap__ +#define cliresUnmap(pResource, pCallContext, pCpuMapping) cliresUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define cliresIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ #define cliresIsPartialUnmapSupported(pResource) cliresIsPartialUnmapSupported_DISPATCH(pResource) -#define cliresPreDestruct(pResource) cliresPreDestruct_DISPATCH(pResource) +#define cliresMapTo_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resMapTo__ +#define cliresMapTo(pResource, pParams) cliresMapTo_DISPATCH(pResource, pParams) +#define cliresUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resUnmapFrom__ #define cliresUnmapFrom(pResource, pParams) cliresUnmapFrom_DISPATCH(pResource, pParams) -#define cliresIsDuplicate(pResource, hMemory, pDuplicate) cliresIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define cliresControlSerialization_Epilogue(pResource, pCallContext, pParams) cliresControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define cliresGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resGetRefCount__ +#define cliresGetRefCount(pResource) cliresGetRefCount_DISPATCH(pResource) +#define cliresAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define cliresAddAdditionalDependants(pClient, pResource, pReference) cliresAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define cliresGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define cliresGetNotificationListPtr(pNotifier) cliresGetNotificationListPtr_DISPATCH(pNotifier) +#define cliresGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ #define cliresGetNotificationShare(pNotifier) cliresGetNotificationShare_DISPATCH(pNotifier) -#define cliresMap(pResource, pCallContext, pParams, pCpuMapping) cliresMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define cliresSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define cliresSetNotificationShare(pNotifier, pNotifShare) cliresSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define cliresUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define cliresUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) cliresUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define cliresGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ #define cliresGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) cliresGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -NvBool cliresAccessCallback_IMPL(struct RmClientResource *pRmCliRes, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); +// Dispatch functions static inline NvBool cliresAccessCallback_DISPATCH(struct RmClientResource *pRmCliRes, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return pRmCliRes->__cliresAccessCallback__(pRmCliRes, pInvokingClient, pAllocParams, accessRight); } -NvBool cliresShareCallback_IMPL(struct RmClientResource *pRmCliRes, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); - static inline NvBool cliresShareCallback_DISPATCH(struct RmClientResource *pRmCliRes, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return pRmCliRes->__cliresShareCallback__(pRmCliRes, pInvokingClient, pParentRef, pSharePolicy); } -NV_STATUS cliresControl_Prologue_IMPL(struct RmClientResource *pRmCliRes, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline NV_STATUS cliresControl_Prologue_DISPATCH(struct RmClientResource *pRmCliRes, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pRmCliRes->__cliresControl_Prologue__(pRmCliRes, pCallContext, pParams); } -void cliresControl_Epilogue_IMPL(struct RmClientResource *pRmCliRes, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline void cliresControl_Epilogue_DISPATCH(struct RmClientResource *pRmCliRes, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { pRmCliRes->__cliresControl_Epilogue__(pRmCliRes, pCallContext, pParams); } -NV_STATUS cliresCtrlCmdSystemGetCpuInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_CPU_INFO_PARAMS *pCpuInfoParams); - static inline NV_STATUS cliresCtrlCmdSystemGetCpuInfo_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_CPU_INFO_PARAMS *pCpuInfoParams) { return pRmCliRes->__cliresCtrlCmdSystemGetCpuInfo__(pRmCliRes, pCpuInfoParams); } -NV_STATUS cliresCtrlCmdSystemGetFeatures_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_FEATURES_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemGetFeatures_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_FEATURES_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemGetFeatures__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemGetBuildVersionV2_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_V2_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemGetBuildVersionV2_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_V2_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemGetBuildVersionV2__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemExecuteAcpiMethod_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS *pAcpiMethodParams); - static inline NV_STATUS cliresCtrlCmdSystemExecuteAcpiMethod_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS *pAcpiMethodParams) { return pRmCliRes->__cliresCtrlCmdSystemExecuteAcpiMethod__(pRmCliRes, pAcpiMethodParams); } -NV_STATUS cliresCtrlCmdSystemGetChipsetInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_CHIPSET_INFO_PARAMS *pChipsetInfo); - static inline NV_STATUS cliresCtrlCmdSystemGetChipsetInfo_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_CHIPSET_INFO_PARAMS *pChipsetInfo) { return pRmCliRes->__cliresCtrlCmdSystemGetChipsetInfo__(pRmCliRes, pChipsetInfo); } -NV_STATUS cliresCtrlCmdSystemGetLockTimes_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_LOCK_TIMES_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemGetLockTimes_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_LOCK_TIMES_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemGetLockTimes__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemGetClassList_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_CLASSLIST_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemGetClassList_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_CLASSLIST_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemGetClassList__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemNotifyEvent_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_NOTIFY_EVENT_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemNotifyEvent_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_NOTIFY_EVENT_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemNotifyEvent__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemGetPlatformType_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CMD_SYSTEM_GET_PLATFORM_TYPE_PARAMS *pSysParams); - static inline NV_STATUS cliresCtrlCmdSystemGetPlatformType_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_CMD_SYSTEM_GET_PLATFORM_TYPE_PARAMS *pSysParams) { return pRmCliRes->__cliresCtrlCmdSystemGetPlatformType__(pRmCliRes, pSysParams); } -NV_STATUS cliresCtrlCmdSystemDebugCtrlRmMsg_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_DEBUG_RMMSG_CTRL_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemDebugCtrlRmMsg_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_DEBUG_RMMSG_CTRL_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemDebugCtrlRmMsg__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemGpsControl_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_CONTROL_PARAMS *controlParams); - static inline NV_STATUS cliresCtrlCmdSystemGpsControl_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_CONTROL_PARAMS *controlParams) { return pRmCliRes->__cliresCtrlCmdSystemGpsControl__(pRmCliRes, controlParams); } -NV_STATUS cliresCtrlCmdSystemGpsBatchControl_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_BATCH_CONTROL_PARAMS *controlParams); - static inline NV_STATUS cliresCtrlCmdSystemGpsBatchControl_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_BATCH_CONTROL_PARAMS *controlParams) { return pRmCliRes->__cliresCtrlCmdSystemGpsBatchControl__(pRmCliRes, controlParams); } -NV_STATUS cliresCtrlCmdSystemGetHwbcInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_HWBC_INFO_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemGetHwbcInfo_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_HWBC_INFO_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemGetHwbcInfo__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemGetP2pCaps_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS *pP2PParams); - static inline NV_STATUS cliresCtrlCmdSystemGetP2pCaps_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS *pP2PParams) { return pRmCliRes->__cliresCtrlCmdSystemGetP2pCaps__(pRmCliRes, pP2PParams); } -NV_STATUS cliresCtrlCmdSystemGetP2pCapsV2_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_P2P_CAPS_V2_PARAMS *pP2PParams); - static inline NV_STATUS cliresCtrlCmdSystemGetP2pCapsV2_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_P2P_CAPS_V2_PARAMS *pP2PParams) { return pRmCliRes->__cliresCtrlCmdSystemGetP2pCapsV2__(pRmCliRes, pP2PParams); } -NV_STATUS cliresCtrlCmdSystemGetP2pCapsMatrix_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_P2P_CAPS_MATRIX_PARAMS *pP2PParams); - static inline NV_STATUS cliresCtrlCmdSystemGetP2pCapsMatrix_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_P2P_CAPS_MATRIX_PARAMS *pP2PParams) { return pRmCliRes->__cliresCtrlCmdSystemGetP2pCapsMatrix__(pRmCliRes, pP2PParams); } -NV_STATUS cliresCtrlCmdSystemGpsCtrl_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_CTRL_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemGpsCtrl_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_CTRL_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemGpsCtrl__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemGpsGetFrmData_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_GET_FRM_DATA_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemGpsGetFrmData_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_GET_FRM_DATA_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemGpsGetFrmData__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemGpsSetFrmData_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_SET_FRM_DATA_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemGpsSetFrmData_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_SET_FRM_DATA_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemGpsSetFrmData__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemGpsCallAcpi_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_CALL_ACPI_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemGpsCallAcpi_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_CALL_ACPI_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemGpsCallAcpi__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemGetPerfSensorCounters_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_GET_PERF_SENSOR_COUNTERS_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemGetPerfSensorCounters_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_GET_PERF_SENSOR_COUNTERS_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemGetPerfSensorCounters__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemGetExtendedPerfSensorCounters_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_GET_PERF_SENSOR_COUNTERS_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemGetExtendedPerfSensorCounters_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_GET_PERF_SENSOR_COUNTERS_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemGetExtendedPerfSensorCounters__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemGetVgxSystemInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_VGX_SYSTEM_INFO_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemGetVgxSystemInfo_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_VGX_SYSTEM_INFO_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemGetVgxSystemInfo__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemGetGpusPowerStatus_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_GPUS_POWER_STATUS_PARAMS *pGpusPowerStatus); - static inline NV_STATUS cliresCtrlCmdSystemGetGpusPowerStatus_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_GPUS_POWER_STATUS_PARAMS *pGpusPowerStatus) { return pRmCliRes->__cliresCtrlCmdSystemGetGpusPowerStatus__(pRmCliRes, pGpusPowerStatus); } -NV_STATUS cliresCtrlCmdSystemGetPrivilegedStatus_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_PRIVILEGED_STATUS_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemGetPrivilegedStatus_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_PRIVILEGED_STATUS_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemGetPrivilegedStatus__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemGetFabricStatus_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_FABRIC_STATUS_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemGetFabricStatus_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_FABRIC_STATUS_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemGetFabricStatus__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemGetRmInstanceId_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_RM_INSTANCE_ID_PARAMS *pRmInstanceIdParams); - static inline NV_STATUS cliresCtrlCmdSystemGetRmInstanceId_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_RM_INSTANCE_ID_PARAMS *pRmInstanceIdParams) { return pRmCliRes->__cliresCtrlCmdSystemGetRmInstanceId__(pRmCliRes, pRmInstanceIdParams); } -NV_STATUS cliresCtrlCmdSystemGetClientDatabaseInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_CLIENT_DATABASE_INFO_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemGetClientDatabaseInfo_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_CLIENT_DATABASE_INFO_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemGetClientDatabaseInfo__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemRmctrlCacheModeCtrl_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_RMCTRL_CACHE_MODE_CTRL_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemRmctrlCacheModeCtrl_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_RMCTRL_CACHE_MODE_CTRL_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemRmctrlCacheModeCtrl__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdNvdGetDumpSize_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_NVD_GET_DUMP_SIZE_PARAMS *pDumpSizeParams); - static inline NV_STATUS cliresCtrlCmdNvdGetDumpSize_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_NVD_GET_DUMP_SIZE_PARAMS *pDumpSizeParams) { return pRmCliRes->__cliresCtrlCmdNvdGetDumpSize__(pRmCliRes, pDumpSizeParams); } -NV_STATUS cliresCtrlCmdNvdGetDump_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_NVD_GET_DUMP_PARAMS *pDumpParams); - static inline NV_STATUS cliresCtrlCmdNvdGetDump_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_NVD_GET_DUMP_PARAMS *pDumpParams) { return pRmCliRes->__cliresCtrlCmdNvdGetDump__(pRmCliRes, pDumpParams); } -NV_STATUS cliresCtrlCmdNvdGetTimestamp_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_NVD_GET_TIMESTAMP_PARAMS *pTimestampParams); - static inline NV_STATUS cliresCtrlCmdNvdGetTimestamp_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_NVD_GET_TIMESTAMP_PARAMS *pTimestampParams) { return pRmCliRes->__cliresCtrlCmdNvdGetTimestamp__(pRmCliRes, pTimestampParams); } -NV_STATUS cliresCtrlCmdNvdGetNvlogInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_NVD_GET_NVLOG_INFO_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdNvdGetNvlogInfo_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_NVD_GET_NVLOG_INFO_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdNvdGetNvlogInfo__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdNvdGetNvlogBufferInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_NVD_GET_NVLOG_BUFFER_INFO_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdNvdGetNvlogBufferInfo_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_NVD_GET_NVLOG_BUFFER_INFO_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdNvdGetNvlogBufferInfo__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdNvdGetNvlog_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_NVD_GET_NVLOG_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdNvdGetNvlog_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_NVD_GET_NVLOG_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdNvdGetNvlog__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdNvdGetRcerrRpt_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CMD_NVD_GET_RCERR_RPT_PARAMS *pReportParams); - static inline NV_STATUS cliresCtrlCmdNvdGetRcerrRpt_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_CMD_NVD_GET_RCERR_RPT_PARAMS *pReportParams) { return pRmCliRes->__cliresCtrlCmdNvdGetRcerrRpt__(pRmCliRes, pReportParams); } -NV_STATUS cliresCtrlCmdClientGetAddrSpaceType_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_GET_ADDR_SPACE_TYPE_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdClientGetAddrSpaceType_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_GET_ADDR_SPACE_TYPE_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdClientGetAddrSpaceType__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdClientGetHandleInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_GET_HANDLE_INFO_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdClientGetHandleInfo_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_GET_HANDLE_INFO_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdClientGetHandleInfo__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdClientGetAccessRights_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_GET_ACCESS_RIGHTS_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdClientGetAccessRights_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_GET_ACCESS_RIGHTS_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdClientGetAccessRights__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdClientSetInheritedSharePolicy_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_SET_INHERITED_SHARE_POLICY_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdClientSetInheritedSharePolicy_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_SET_INHERITED_SHARE_POLICY_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdClientSetInheritedSharePolicy__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdClientShareObject_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_SHARE_OBJECT_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdClientShareObject_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_SHARE_OBJECT_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdClientShareObject__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdClientGetChildHandle_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CMD_CLIENT_GET_CHILD_HANDLE_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdClientGetChildHandle_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_CMD_CLIENT_GET_CHILD_HANDLE_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdClientGetChildHandle__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdObjectsAreDuplicates_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_OBJECTS_ARE_DUPLICATES_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdObjectsAreDuplicates_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_OBJECTS_ARE_DUPLICATES_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdObjectsAreDuplicates__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdClientSubscribeToImexChannel_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_SUBSCRIBE_TO_IMEX_CHANNEL_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdClientSubscribeToImexChannel_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_SUBSCRIBE_TO_IMEX_CHANNEL_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdClientSubscribeToImexChannel__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdGpuGetAttachedIds_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_ATTACHED_IDS_PARAMS *pGpuAttachedIds); - static inline NV_STATUS cliresCtrlCmdGpuGetAttachedIds_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_ATTACHED_IDS_PARAMS *pGpuAttachedIds) { return pRmCliRes->__cliresCtrlCmdGpuGetAttachedIds__(pRmCliRes, pGpuAttachedIds); } -NV_STATUS cliresCtrlCmdGpuGetIdInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_ID_INFO_PARAMS *pGpuIdInfoParams); - static inline NV_STATUS cliresCtrlCmdGpuGetIdInfo_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_ID_INFO_PARAMS *pGpuIdInfoParams) { return pRmCliRes->__cliresCtrlCmdGpuGetIdInfo__(pRmCliRes, pGpuIdInfoParams); } -NV_STATUS cliresCtrlCmdGpuGetIdInfoV2_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_ID_INFO_V2_PARAMS *pGpuIdInfoParams); - static inline NV_STATUS cliresCtrlCmdGpuGetIdInfoV2_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_ID_INFO_V2_PARAMS *pGpuIdInfoParams) { return pRmCliRes->__cliresCtrlCmdGpuGetIdInfoV2__(pRmCliRes, pGpuIdInfoParams); } -NV_STATUS cliresCtrlCmdGpuGetInitStatus_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_INIT_STATUS_PARAMS *pGpuInitStatusParams); - static inline NV_STATUS cliresCtrlCmdGpuGetInitStatus_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_INIT_STATUS_PARAMS *pGpuInitStatusParams) { return pRmCliRes->__cliresCtrlCmdGpuGetInitStatus__(pRmCliRes, pGpuInitStatusParams); } -NV_STATUS cliresCtrlCmdGpuGetDeviceIds_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_DEVICE_IDS_PARAMS *pDeviceIdsParams); - static inline NV_STATUS cliresCtrlCmdGpuGetDeviceIds_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_DEVICE_IDS_PARAMS *pDeviceIdsParams) { return pRmCliRes->__cliresCtrlCmdGpuGetDeviceIds__(pRmCliRes, pDeviceIdsParams); } -NV_STATUS cliresCtrlCmdGpuGetActiveDeviceIds_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_ACTIVE_DEVICE_IDS_PARAMS *pActiveDeviceIdsParams); - static inline NV_STATUS cliresCtrlCmdGpuGetActiveDeviceIds_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_ACTIVE_DEVICE_IDS_PARAMS *pActiveDeviceIdsParams) { return pRmCliRes->__cliresCtrlCmdGpuGetActiveDeviceIds__(pRmCliRes, pActiveDeviceIdsParams); } -NV_STATUS cliresCtrlCmdGpuGetProbedIds_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_PROBED_IDS_PARAMS *pGpuProbedIds); - static inline NV_STATUS cliresCtrlCmdGpuGetProbedIds_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_PROBED_IDS_PARAMS *pGpuProbedIds) { return pRmCliRes->__cliresCtrlCmdGpuGetProbedIds__(pRmCliRes, pGpuProbedIds); } -NV_STATUS cliresCtrlCmdGpuAttachIds_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_ATTACH_IDS_PARAMS *pGpuAttachIds); - static inline NV_STATUS cliresCtrlCmdGpuAttachIds_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_ATTACH_IDS_PARAMS *pGpuAttachIds) { return pRmCliRes->__cliresCtrlCmdGpuAttachIds__(pRmCliRes, pGpuAttachIds); } -NV_STATUS cliresCtrlCmdGpuAsyncAttachId_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_ASYNC_ATTACH_ID_PARAMS *pAsyncAttachIdParams); - static inline NV_STATUS cliresCtrlCmdGpuAsyncAttachId_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_ASYNC_ATTACH_ID_PARAMS *pAsyncAttachIdParams) { return pRmCliRes->__cliresCtrlCmdGpuAsyncAttachId__(pRmCliRes, pAsyncAttachIdParams); } -NV_STATUS cliresCtrlCmdGpuWaitAttachId_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_WAIT_ATTACH_ID_PARAMS *pWaitAttachIdParams); - static inline NV_STATUS cliresCtrlCmdGpuWaitAttachId_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_WAIT_ATTACH_ID_PARAMS *pWaitAttachIdParams) { return pRmCliRes->__cliresCtrlCmdGpuWaitAttachId__(pRmCliRes, pWaitAttachIdParams); } -NV_STATUS cliresCtrlCmdGpuDetachIds_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_DETACH_IDS_PARAMS *pGpuDetachIds); - static inline NV_STATUS cliresCtrlCmdGpuDetachIds_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_DETACH_IDS_PARAMS *pGpuDetachIds) { return pRmCliRes->__cliresCtrlCmdGpuDetachIds__(pRmCliRes, pGpuDetachIds); } -NV_STATUS cliresCtrlCmdGpuGetSvmSize_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_SVM_SIZE_PARAMS *pSvmSizeGetParams); - static inline NV_STATUS cliresCtrlCmdGpuGetSvmSize_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_SVM_SIZE_PARAMS *pSvmSizeGetParams) { return pRmCliRes->__cliresCtrlCmdGpuGetSvmSize__(pRmCliRes, pSvmSizeGetParams); } -NV_STATUS cliresCtrlCmdGpuGetPciInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_PCI_INFO_PARAMS *pPciInfoParams); - static inline NV_STATUS cliresCtrlCmdGpuGetPciInfo_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_PCI_INFO_PARAMS *pPciInfoParams) { return pRmCliRes->__cliresCtrlCmdGpuGetPciInfo__(pRmCliRes, pPciInfoParams); } -NV_STATUS cliresCtrlCmdGpuGetUuidInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_UUID_INFO_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdGpuGetUuidInfo_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_UUID_INFO_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdGpuGetUuidInfo__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdGpuGetUuidFromGpuId_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_UUID_FROM_GPU_ID_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdGpuGetUuidFromGpuId_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_UUID_FROM_GPU_ID_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdGpuGetUuidFromGpuId__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdGpuModifyGpuDrainState_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_MODIFY_DRAIN_STATE_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdGpuModifyGpuDrainState_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_MODIFY_DRAIN_STATE_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdGpuModifyGpuDrainState__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdGpuQueryGpuDrainState_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_QUERY_DRAIN_STATE_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdGpuQueryGpuDrainState_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_QUERY_DRAIN_STATE_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdGpuQueryGpuDrainState__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdGpuGetMemOpEnable_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_MEMOP_ENABLE_PARAMS *pMemOpEnableParams); - static inline NV_STATUS cliresCtrlCmdGpuGetMemOpEnable_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_MEMOP_ENABLE_PARAMS *pMemOpEnableParams) { return pRmCliRes->__cliresCtrlCmdGpuGetMemOpEnable__(pRmCliRes, pMemOpEnableParams); } -NV_STATUS cliresCtrlCmdGpuDisableNvlinkInit_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_DISABLE_NVLINK_INIT_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdGpuDisableNvlinkInit_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_DISABLE_NVLINK_INIT_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdGpuDisableNvlinkInit__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdGpuSetNvlinkBwMode_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_SET_NVLINK_BW_MODE_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdGpuSetNvlinkBwMode_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_SET_NVLINK_BW_MODE_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdGpuSetNvlinkBwMode__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdGpuGetNvlinkBwMode_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_NVLINK_BW_MODE_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdGpuGetNvlinkBwMode_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_NVLINK_BW_MODE_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdGpuGetNvlinkBwMode__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdLegacyConfig_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_LEGACY_CONFIG_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdLegacyConfig_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_LEGACY_CONFIG_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdLegacyConfig__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdIdleChannels_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_IDLE_CHANNELS_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdIdleChannels_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_IDLE_CHANNELS_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdIdleChannels__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdPushGspUcode_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_PUSH_GSP_UCODE_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdPushGspUcode_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_PUSH_GSP_UCODE_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdPushGspUcode__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdGpuGetVideoLinks_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_VIDEO_LINKS_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdGpuGetVideoLinks_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_VIDEO_LINKS_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdGpuGetVideoLinks__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdGsyncGetAttachedIds_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GSYNC_GET_ATTACHED_IDS_PARAMS *pGsyncAttachedIds); - static inline NV_STATUS cliresCtrlCmdGsyncGetAttachedIds_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GSYNC_GET_ATTACHED_IDS_PARAMS *pGsyncAttachedIds) { return pRmCliRes->__cliresCtrlCmdGsyncGetAttachedIds__(pRmCliRes, pGsyncAttachedIds); } -NV_STATUS cliresCtrlCmdGsyncGetIdInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GSYNC_GET_ID_INFO_PARAMS *pGsyncIdInfoParams); - static inline NV_STATUS cliresCtrlCmdGsyncGetIdInfo_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GSYNC_GET_ID_INFO_PARAMS *pGsyncIdInfoParams) { return pRmCliRes->__cliresCtrlCmdGsyncGetIdInfo__(pRmCliRes, pGsyncIdInfoParams); } -NV_STATUS cliresCtrlCmdDiagProfileRpc_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_DIAG_PROFILE_RPC_PARAMS *pRpcProfileParams); - static inline NV_STATUS cliresCtrlCmdDiagProfileRpc_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_DIAG_PROFILE_RPC_PARAMS *pRpcProfileParams) { return pRmCliRes->__cliresCtrlCmdDiagProfileRpc__(pRmCliRes, pRpcProfileParams); } -NV_STATUS cliresCtrlCmdDiagDumpRpc_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_DIAG_DUMP_RPC_PARAMS *pRpcDumpParams); - static inline NV_STATUS cliresCtrlCmdDiagDumpRpc_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_DIAG_DUMP_RPC_PARAMS *pRpcDumpParams) { return pRmCliRes->__cliresCtrlCmdDiagDumpRpc__(pRmCliRes, pRpcDumpParams); } -NV_STATUS cliresCtrlCmdEventSetNotification_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_EVENT_SET_NOTIFICATION_PARAMS *pEventSetNotificationParams); - static inline NV_STATUS cliresCtrlCmdEventSetNotification_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_EVENT_SET_NOTIFICATION_PARAMS *pEventSetNotificationParams) { return pRmCliRes->__cliresCtrlCmdEventSetNotification__(pRmCliRes, pEventSetNotificationParams); } -NV_STATUS cliresCtrlCmdEventGetSystemEventStatus_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GET_SYSTEM_EVENT_STATUS_PARAMS *pSystemEventStatusParams); - static inline NV_STATUS cliresCtrlCmdEventGetSystemEventStatus_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GET_SYSTEM_EVENT_STATUS_PARAMS *pSystemEventStatusParams) { return pRmCliRes->__cliresCtrlCmdEventGetSystemEventStatus__(pRmCliRes, pSystemEventStatusParams); } -NV_STATUS cliresCtrlCmdOsUnixExportObjectToFd_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_EXPORT_OBJECT_TO_FD_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdOsUnixExportObjectToFd_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_EXPORT_OBJECT_TO_FD_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdOsUnixExportObjectToFd__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdOsUnixImportObjectFromFd_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_IMPORT_OBJECT_FROM_FD_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdOsUnixImportObjectFromFd_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_IMPORT_OBJECT_FROM_FD_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdOsUnixImportObjectFromFd__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdOsUnixGetExportObjectInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdOsUnixGetExportObjectInfo_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdOsUnixGetExportObjectInfo__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdOsUnixCreateExportObjectFd_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_CREATE_EXPORT_OBJECT_FD_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdOsUnixCreateExportObjectFd_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_CREATE_EXPORT_OBJECT_FD_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdOsUnixCreateExportObjectFd__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdOsUnixExportObjectsToFd_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_EXPORT_OBJECTS_TO_FD_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdOsUnixExportObjectsToFd_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_EXPORT_OBJECTS_TO_FD_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdOsUnixExportObjectsToFd__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdOsUnixImportObjectsFromFd_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_IMPORT_OBJECTS_FROM_FD_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdOsUnixImportObjectsFromFd_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_IMPORT_OBJECTS_FROM_FD_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdOsUnixImportObjectsFromFd__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdOsUnixFlushUserCache_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_FLUSH_USER_CACHE_PARAMS *pAddressSpaceParams); - static inline NV_STATUS cliresCtrlCmdOsUnixFlushUserCache_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_FLUSH_USER_CACHE_PARAMS *pAddressSpaceParams) { return pRmCliRes->__cliresCtrlCmdOsUnixFlushUserCache__(pRmCliRes, pAddressSpaceParams); } -NV_STATUS cliresCtrlCmdGpuAcctSetAccountingState_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPUACCT_SET_ACCOUNTING_STATE_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdGpuAcctSetAccountingState_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPUACCT_SET_ACCOUNTING_STATE_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdGpuAcctSetAccountingState__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdGpuAcctGetAccountingState_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPUACCT_GET_ACCOUNTING_STATE_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdGpuAcctGetAccountingState_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPUACCT_GET_ACCOUNTING_STATE_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdGpuAcctGetAccountingState__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdGpuAcctGetProcAccountingInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPUACCT_GET_PROC_ACCOUNTING_INFO_PARAMS *pAcctInfoParams); - static inline NV_STATUS cliresCtrlCmdGpuAcctGetProcAccountingInfo_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPUACCT_GET_PROC_ACCOUNTING_INFO_PARAMS *pAcctInfoParams) { return pRmCliRes->__cliresCtrlCmdGpuAcctGetProcAccountingInfo__(pRmCliRes, pAcctInfoParams); } -NV_STATUS cliresCtrlCmdGpuAcctGetAccountingPids_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPUACCT_GET_ACCOUNTING_PIDS_PARAMS *pAcctPidsParams); - static inline NV_STATUS cliresCtrlCmdGpuAcctGetAccountingPids_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPUACCT_GET_ACCOUNTING_PIDS_PARAMS *pAcctPidsParams) { return pRmCliRes->__cliresCtrlCmdGpuAcctGetAccountingPids__(pRmCliRes, pAcctPidsParams); } -NV_STATUS cliresCtrlCmdGpuAcctClearAccountingData_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPUACCT_CLEAR_ACCOUNTING_DATA_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdGpuAcctClearAccountingData_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPUACCT_CLEAR_ACCOUNTING_DATA_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdGpuAcctClearAccountingData__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSetSubProcessID_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SET_SUB_PROCESS_ID_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSetSubProcessID_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SET_SUB_PROCESS_ID_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSetSubProcessID__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdDisableSubProcessUserdIsolation_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_DISABLE_SUB_PROCESS_USERD_ISOLATION_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdDisableSubProcessUserdIsolation_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_DISABLE_SUB_PROCESS_USERD_ISOLATION_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdDisableSubProcessUserdIsolation__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSyncGpuBoostInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_SYNC_GPU_BOOST_INFO_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSyncGpuBoostInfo_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_SYNC_GPU_BOOST_INFO_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSyncGpuBoostInfo__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSyncGpuBoostGroupCreate_IMPL(struct RmClientResource *pRmCliRes, NV0000_SYNC_GPU_BOOST_GROUP_CREATE_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSyncGpuBoostGroupCreate_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_SYNC_GPU_BOOST_GROUP_CREATE_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSyncGpuBoostGroupCreate__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSyncGpuBoostGroupDestroy_IMPL(struct RmClientResource *pRmCliRes, NV0000_SYNC_GPU_BOOST_GROUP_DESTROY_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSyncGpuBoostGroupDestroy_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_SYNC_GPU_BOOST_GROUP_DESTROY_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSyncGpuBoostGroupDestroy__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSyncGpuBoostGroupInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_SYNC_GPU_BOOST_GROUP_INFO_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSyncGpuBoostGroupInfo_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_SYNC_GPU_BOOST_GROUP_INFO_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSyncGpuBoostGroupInfo__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdVgpuGetStartData_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_VGPU_GET_START_DATA_PARAMS *pVgpuStartParams); - -static inline NV_STATUS cliresCtrlCmdVgpuGetStartData_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_VGPU_GET_START_DATA_PARAMS *pVgpuStartParams) { - return pRmCliRes->__cliresCtrlCmdVgpuGetStartData__(pRmCliRes, pVgpuStartParams); -} - -NV_STATUS cliresCtrlCmdVgpuGetVgpuVersion_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_VGPU_GET_VGPU_VERSION_PARAMS *vgpuVersionInfo); - static inline NV_STATUS cliresCtrlCmdVgpuGetVgpuVersion_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_VGPU_GET_VGPU_VERSION_PARAMS *vgpuVersionInfo) { return pRmCliRes->__cliresCtrlCmdVgpuGetVgpuVersion__(pRmCliRes, vgpuVersionInfo); } -NV_STATUS cliresCtrlCmdVgpuSetVgpuVersion_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_VGPU_SET_VGPU_VERSION_PARAMS *vgpuVersionInfo); - static inline NV_STATUS cliresCtrlCmdVgpuSetVgpuVersion_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_VGPU_SET_VGPU_VERSION_PARAMS *vgpuVersionInfo) { return pRmCliRes->__cliresCtrlCmdVgpuSetVgpuVersion__(pRmCliRes, vgpuVersionInfo); } -NV_STATUS cliresCtrlCmdSystemNVPCFGetPowerModeInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CMD_SYSTEM_NVPCF_GET_POWER_MODE_INFO_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemNVPCFGetPowerModeInfo_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_CMD_SYSTEM_NVPCF_GET_POWER_MODE_INFO_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemNVPCFGetPowerModeInfo__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemSyncExternalFabricMgmt_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CMD_SYSTEM_SYNC_EXTERNAL_FABRIC_MGMT_PARAMS *pExtFabricMgmtParams); - static inline NV_STATUS cliresCtrlCmdSystemSyncExternalFabricMgmt_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_CMD_SYSTEM_SYNC_EXTERNAL_FABRIC_MGMT_PARAMS *pExtFabricMgmtParams) { return pRmCliRes->__cliresCtrlCmdSystemSyncExternalFabricMgmt__(pRmCliRes, pExtFabricMgmtParams); } -NV_STATUS cliresCtrlCmdSystemPfmreqhndlrCtrl_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_CTRL_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemPfmreqhndlrCtrl_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_CTRL_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemPfmreqhndlrCtrl__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemPfmreqhndlrGetFrmData_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_FRM_DATA_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemPfmreqhndlrGetFrmData_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_FRM_DATA_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemPfmreqhndlrGetFrmData__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemPfmreqhndlrSetFrmData_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_SET_FRM_DATA_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemPfmreqhndlrSetFrmData_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_SET_FRM_DATA_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemPfmreqhndlrSetFrmData__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemPfmreqhndlrCallAcpi_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_CALL_ACPI_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemPfmreqhndlrCallAcpi_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_CALL_ACPI_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemPfmreqhndlrCallAcpi__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemPfmreqhndlrControl_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_CONTROL_PARAMS *controlParams); - static inline NV_STATUS cliresCtrlCmdSystemPfmreqhndlrControl_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_CONTROL_PARAMS *controlParams) { return pRmCliRes->__cliresCtrlCmdSystemPfmreqhndlrControl__(pRmCliRes, controlParams); } -NV_STATUS cliresCtrlCmdSystemPfmreqhndlrBatchControl_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_BATCH_CONTROL_PARAMS *controlParams); - static inline NV_STATUS cliresCtrlCmdSystemPfmreqhndlrBatchControl_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_BATCH_CONTROL_PARAMS *controlParams) { return pRmCliRes->__cliresCtrlCmdSystemPfmreqhndlrBatchControl__(pRmCliRes, controlParams); } -NV_STATUS cliresCtrlCmdSystemPfmreqhndlrGetPerfSensorCounters_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_PERF_SENSOR_COUNTERS_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemPfmreqhndlrGetPerfSensorCounters_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_PERF_SENSOR_COUNTERS_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemPfmreqhndlrGetPerfSensorCounters__(pRmCliRes, pParams); } -NV_STATUS cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_PERF_SENSOR_COUNTERS_PARAMS *pParams); - static inline NV_STATUS cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_PERF_SENSOR_COUNTERS_PARAMS *pParams) { return pRmCliRes->__cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters__(pRmCliRes, pParams); } -static inline NV_STATUS cliresControl_DISPATCH(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__cliresControl__(pResource, pCallContext, pParams); +static inline NvBool cliresCanCopy_DISPATCH(struct RmClientResource *pResource) { + return pResource->__cliresCanCopy__(pResource); } -static inline NV_STATUS cliresUnmap_DISPATCH(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__cliresUnmap__(pResource, pCallContext, pCpuMapping); +static inline NV_STATUS cliresIsDuplicate_DISPATCH(struct RmClientResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__cliresIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS cliresMapTo_DISPATCH(struct RmClientResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__cliresMapTo__(pResource, pParams); +static inline void cliresPreDestruct_DISPATCH(struct RmClientResource *pResource) { + pResource->__cliresPreDestruct__(pResource); } -static inline void cliresSetNotificationShare_DISPATCH(struct RmClientResource *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__cliresSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS cliresControl_DISPATCH(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__cliresControl__(pResource, pCallContext, pParams); } static inline NV_STATUS cliresControlFilter_DISPATCH(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__cliresControlFilter__(pResource, pCallContext, pParams); } -static inline void cliresAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct RmClientResource *pResource, RsResourceRef *pReference) { - pResource->__cliresAddAdditionalDependants__(pClient, pResource, pReference); -} - -static inline NvU32 cliresGetRefCount_DISPATCH(struct RmClientResource *pResource) { - return pResource->__cliresGetRefCount__(pResource); +static inline NV_STATUS cliresControlSerialization_Prologue_DISPATCH(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__cliresControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS cliresUnregisterEvent_DISPATCH(struct RmClientResource *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__cliresUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline void cliresControlSerialization_Epilogue_DISPATCH(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__cliresControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS cliresControlSerialization_Prologue_DISPATCH(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__cliresControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS cliresMap_DISPATCH(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__cliresMap__(pResource, pCallContext, pParams, pCpuMapping); } -static inline NvBool cliresCanCopy_DISPATCH(struct RmClientResource *pResource) { - return pResource->__cliresCanCopy__(pResource); +static inline NV_STATUS cliresUnmap_DISPATCH(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pResource->__cliresUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool cliresIsPartialUnmapSupported_DISPATCH(struct RmClientResource *pResource) { return pResource->__cliresIsPartialUnmapSupported__(pResource); } -static inline void cliresPreDestruct_DISPATCH(struct RmClientResource *pResource) { - pResource->__cliresPreDestruct__(pResource); +static inline NV_STATUS cliresMapTo_DISPATCH(struct RmClientResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__cliresMapTo__(pResource, pParams); } static inline NV_STATUS cliresUnmapFrom_DISPATCH(struct RmClientResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return pResource->__cliresUnmapFrom__(pResource, pParams); } -static inline NV_STATUS cliresIsDuplicate_DISPATCH(struct RmClientResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__cliresIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NvU32 cliresGetRefCount_DISPATCH(struct RmClientResource *pResource) { + return pResource->__cliresGetRefCount__(pResource); } -static inline void cliresControlSerialization_Epilogue_DISPATCH(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__cliresControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline void cliresAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct RmClientResource *pResource, RsResourceRef *pReference) { + pResource->__cliresAddAdditionalDependants__(pClient, pResource, pReference); } -static inline PEVENTNOTIFICATION *cliresGetNotificationListPtr_DISPATCH(struct RmClientResource *pNotifier) { +static inline PEVENTNOTIFICATION * cliresGetNotificationListPtr_DISPATCH(struct RmClientResource *pNotifier) { return pNotifier->__cliresGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *cliresGetNotificationShare_DISPATCH(struct RmClientResource *pNotifier) { +static inline struct NotifShare * cliresGetNotificationShare_DISPATCH(struct RmClientResource *pNotifier) { return pNotifier->__cliresGetNotificationShare__(pNotifier); } -static inline NV_STATUS cliresMap_DISPATCH(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__cliresMap__(pResource, pCallContext, pParams, pCpuMapping); +static inline void cliresSetNotificationShare_DISPATCH(struct RmClientResource *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__cliresSetNotificationShare__(pNotifier, pNotifShare); +} + +static inline NV_STATUS cliresUnregisterEvent_DISPATCH(struct RmClientResource *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__cliresUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS cliresGetOrAllocNotifShare_DISPATCH(struct RmClientResource *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return pNotifier->__cliresGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } +NvBool cliresAccessCallback_IMPL(struct RmClientResource *pRmCliRes, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); + +NvBool cliresShareCallback_IMPL(struct RmClientResource *pRmCliRes, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); + +NV_STATUS cliresControl_Prologue_IMPL(struct RmClientResource *pRmCliRes, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +void cliresControl_Epilogue_IMPL(struct RmClientResource *pRmCliRes, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +NV_STATUS cliresCtrlCmdSystemGetCpuInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_CPU_INFO_PARAMS *pCpuInfoParams); + +NV_STATUS cliresCtrlCmdSystemGetFeatures_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_FEATURES_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemGetBuildVersionV2_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_V2_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemExecuteAcpiMethod_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS *pAcpiMethodParams); + +NV_STATUS cliresCtrlCmdSystemGetChipsetInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_CHIPSET_INFO_PARAMS *pChipsetInfo); + +NV_STATUS cliresCtrlCmdSystemGetLockTimes_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_LOCK_TIMES_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemGetClassList_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_CLASSLIST_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemNotifyEvent_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_NOTIFY_EVENT_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemGetPlatformType_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CMD_SYSTEM_GET_PLATFORM_TYPE_PARAMS *pSysParams); + +NV_STATUS cliresCtrlCmdSystemDebugCtrlRmMsg_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_DEBUG_RMMSG_CTRL_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemGpsControl_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_CONTROL_PARAMS *controlParams); + +NV_STATUS cliresCtrlCmdSystemGpsBatchControl_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_BATCH_CONTROL_PARAMS *controlParams); + +NV_STATUS cliresCtrlCmdSystemGetHwbcInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_HWBC_INFO_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemGetP2pCaps_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS *pP2PParams); + +NV_STATUS cliresCtrlCmdSystemGetP2pCapsV2_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_P2P_CAPS_V2_PARAMS *pP2PParams); + +NV_STATUS cliresCtrlCmdSystemGetP2pCapsMatrix_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_P2P_CAPS_MATRIX_PARAMS *pP2PParams); + +NV_STATUS cliresCtrlCmdSystemGpsCtrl_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_CTRL_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemGpsGetFrmData_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_GET_FRM_DATA_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemGpsSetFrmData_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_SET_FRM_DATA_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemGpsCallAcpi_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_CALL_ACPI_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemGetPerfSensorCounters_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_GET_PERF_SENSOR_COUNTERS_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemGetExtendedPerfSensorCounters_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GPS_GET_PERF_SENSOR_COUNTERS_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemGetVgxSystemInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_VGX_SYSTEM_INFO_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemGetGpusPowerStatus_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_GPUS_POWER_STATUS_PARAMS *pGpusPowerStatus); + +NV_STATUS cliresCtrlCmdSystemGetPrivilegedStatus_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_PRIVILEGED_STATUS_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemGetFabricStatus_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_FABRIC_STATUS_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemGetRmInstanceId_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_RM_INSTANCE_ID_PARAMS *pRmInstanceIdParams); + +NV_STATUS cliresCtrlCmdSystemGetClientDatabaseInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_CLIENT_DATABASE_INFO_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemRmctrlCacheModeCtrl_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_RMCTRL_CACHE_MODE_CTRL_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdNvdGetDumpSize_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_NVD_GET_DUMP_SIZE_PARAMS *pDumpSizeParams); + +NV_STATUS cliresCtrlCmdNvdGetDump_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_NVD_GET_DUMP_PARAMS *pDumpParams); + +NV_STATUS cliresCtrlCmdNvdGetTimestamp_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_NVD_GET_TIMESTAMP_PARAMS *pTimestampParams); + +NV_STATUS cliresCtrlCmdNvdGetNvlogInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_NVD_GET_NVLOG_INFO_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdNvdGetNvlogBufferInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_NVD_GET_NVLOG_BUFFER_INFO_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdNvdGetNvlog_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_NVD_GET_NVLOG_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdNvdGetRcerrRpt_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CMD_NVD_GET_RCERR_RPT_PARAMS *pReportParams); + +NV_STATUS cliresCtrlCmdClientGetAddrSpaceType_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_GET_ADDR_SPACE_TYPE_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdClientGetHandleInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_GET_HANDLE_INFO_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdClientGetAccessRights_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_GET_ACCESS_RIGHTS_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdClientSetInheritedSharePolicy_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_SET_INHERITED_SHARE_POLICY_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdClientShareObject_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_SHARE_OBJECT_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdClientGetChildHandle_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CMD_CLIENT_GET_CHILD_HANDLE_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdObjectsAreDuplicates_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_OBJECTS_ARE_DUPLICATES_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdClientSubscribeToImexChannel_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CLIENT_SUBSCRIBE_TO_IMEX_CHANNEL_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdGpuGetAttachedIds_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_ATTACHED_IDS_PARAMS *pGpuAttachedIds); + +NV_STATUS cliresCtrlCmdGpuGetIdInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_ID_INFO_PARAMS *pGpuIdInfoParams); + +NV_STATUS cliresCtrlCmdGpuGetIdInfoV2_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_ID_INFO_V2_PARAMS *pGpuIdInfoParams); + +NV_STATUS cliresCtrlCmdGpuGetInitStatus_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_INIT_STATUS_PARAMS *pGpuInitStatusParams); + +NV_STATUS cliresCtrlCmdGpuGetDeviceIds_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_DEVICE_IDS_PARAMS *pDeviceIdsParams); + +NV_STATUS cliresCtrlCmdGpuGetActiveDeviceIds_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_ACTIVE_DEVICE_IDS_PARAMS *pActiveDeviceIdsParams); + +NV_STATUS cliresCtrlCmdGpuGetProbedIds_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_PROBED_IDS_PARAMS *pGpuProbedIds); + +NV_STATUS cliresCtrlCmdGpuAttachIds_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_ATTACH_IDS_PARAMS *pGpuAttachIds); + +NV_STATUS cliresCtrlCmdGpuAsyncAttachId_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_ASYNC_ATTACH_ID_PARAMS *pAsyncAttachIdParams); + +NV_STATUS cliresCtrlCmdGpuWaitAttachId_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_WAIT_ATTACH_ID_PARAMS *pWaitAttachIdParams); + +NV_STATUS cliresCtrlCmdGpuDetachIds_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_DETACH_IDS_PARAMS *pGpuDetachIds); + +NV_STATUS cliresCtrlCmdGpuGetSvmSize_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_SVM_SIZE_PARAMS *pSvmSizeGetParams); + +NV_STATUS cliresCtrlCmdGpuGetPciInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_PCI_INFO_PARAMS *pPciInfoParams); + +NV_STATUS cliresCtrlCmdGpuGetUuidInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_UUID_INFO_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdGpuGetUuidFromGpuId_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_UUID_FROM_GPU_ID_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdGpuModifyGpuDrainState_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_MODIFY_DRAIN_STATE_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdGpuQueryGpuDrainState_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_QUERY_DRAIN_STATE_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdGpuGetMemOpEnable_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_MEMOP_ENABLE_PARAMS *pMemOpEnableParams); + +NV_STATUS cliresCtrlCmdGpuDisableNvlinkInit_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_DISABLE_NVLINK_INIT_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdGpuSetNvlinkBwMode_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_SET_NVLINK_BW_MODE_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdGpuGetNvlinkBwMode_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_NVLINK_BW_MODE_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdLegacyConfig_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_LEGACY_CONFIG_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdIdleChannels_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_IDLE_CHANNELS_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdPushGspUcode_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_PUSH_GSP_UCODE_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdGpuGetVideoLinks_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPU_GET_VIDEO_LINKS_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdGsyncGetAttachedIds_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GSYNC_GET_ATTACHED_IDS_PARAMS *pGsyncAttachedIds); + +NV_STATUS cliresCtrlCmdGsyncGetIdInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GSYNC_GET_ID_INFO_PARAMS *pGsyncIdInfoParams); + +NV_STATUS cliresCtrlCmdDiagProfileRpc_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_DIAG_PROFILE_RPC_PARAMS *pRpcProfileParams); + +NV_STATUS cliresCtrlCmdDiagDumpRpc_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_DIAG_DUMP_RPC_PARAMS *pRpcDumpParams); + +NV_STATUS cliresCtrlCmdEventSetNotification_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_EVENT_SET_NOTIFICATION_PARAMS *pEventSetNotificationParams); + +NV_STATUS cliresCtrlCmdEventGetSystemEventStatus_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GET_SYSTEM_EVENT_STATUS_PARAMS *pSystemEventStatusParams); + +NV_STATUS cliresCtrlCmdOsUnixExportObjectToFd_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_EXPORT_OBJECT_TO_FD_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdOsUnixImportObjectFromFd_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_IMPORT_OBJECT_FROM_FD_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdOsUnixGetExportObjectInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdOsUnixCreateExportObjectFd_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_CREATE_EXPORT_OBJECT_FD_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdOsUnixExportObjectsToFd_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_EXPORT_OBJECTS_TO_FD_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdOsUnixImportObjectsFromFd_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_IMPORT_OBJECTS_FROM_FD_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdOsUnixFlushUserCache_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_OS_UNIX_FLUSH_USER_CACHE_PARAMS *pAddressSpaceParams); + +NV_STATUS cliresCtrlCmdGpuAcctSetAccountingState_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPUACCT_SET_ACCOUNTING_STATE_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdGpuAcctGetAccountingState_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPUACCT_GET_ACCOUNTING_STATE_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdGpuAcctGetProcAccountingInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPUACCT_GET_PROC_ACCOUNTING_INFO_PARAMS *pAcctInfoParams); + +NV_STATUS cliresCtrlCmdGpuAcctGetAccountingPids_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPUACCT_GET_ACCOUNTING_PIDS_PARAMS *pAcctPidsParams); + +NV_STATUS cliresCtrlCmdGpuAcctClearAccountingData_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_GPUACCT_CLEAR_ACCOUNTING_DATA_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSetSubProcessID_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SET_SUB_PROCESS_ID_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdDisableSubProcessUserdIsolation_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_DISABLE_SUB_PROCESS_USERD_ISOLATION_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSyncGpuBoostInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_SYNC_GPU_BOOST_INFO_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSyncGpuBoostGroupCreate_IMPL(struct RmClientResource *pRmCliRes, NV0000_SYNC_GPU_BOOST_GROUP_CREATE_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSyncGpuBoostGroupDestroy_IMPL(struct RmClientResource *pRmCliRes, NV0000_SYNC_GPU_BOOST_GROUP_DESTROY_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSyncGpuBoostGroupInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_SYNC_GPU_BOOST_GROUP_INFO_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdVgpuGetVgpuVersion_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_VGPU_GET_VGPU_VERSION_PARAMS *vgpuVersionInfo); + +NV_STATUS cliresCtrlCmdVgpuSetVgpuVersion_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_VGPU_SET_VGPU_VERSION_PARAMS *vgpuVersionInfo); + +NV_STATUS cliresCtrlCmdSystemNVPCFGetPowerModeInfo_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CMD_SYSTEM_NVPCF_GET_POWER_MODE_INFO_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemSyncExternalFabricMgmt_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_CMD_SYSTEM_SYNC_EXTERNAL_FABRIC_MGMT_PARAMS *pExtFabricMgmtParams); + +NV_STATUS cliresCtrlCmdSystemPfmreqhndlrCtrl_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_CTRL_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemPfmreqhndlrGetFrmData_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_FRM_DATA_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemPfmreqhndlrSetFrmData_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_SET_FRM_DATA_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemPfmreqhndlrCallAcpi_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_CALL_ACPI_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemPfmreqhndlrControl_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_CONTROL_PARAMS *controlParams); + +NV_STATUS cliresCtrlCmdSystemPfmreqhndlrBatchControl_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_BATCH_CONTROL_PARAMS *controlParams); + +NV_STATUS cliresCtrlCmdSystemPfmreqhndlrGetPerfSensorCounters_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_PERF_SENSOR_COUNTERS_PARAMS *pParams); + +NV_STATUS cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters_IMPL(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_PERF_SENSOR_COUNTERS_PARAMS *pParams); + NV_STATUS cliresConstruct_IMPL(struct RmClientResource *arg_pRmCliRes, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_cliresConstruct(arg_pRmCliRes, arg_pCallContext, arg_pParams) cliresConstruct_IMPL(arg_pRmCliRes, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_compute_instance_subscription_nvoc.c b/src/nvidia/generated/g_compute_instance_subscription_nvoc.c index 971b5fd35f..ca2002d22a 100644 --- a/src/nvidia/generated/g_compute_instance_subscription_nvoc.c +++ b/src/nvidia/generated/g_compute_instance_subscription_nvoc.c @@ -93,129 +93,160 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_ComputeInstanceSubscription = /*pExportInfo=*/ &__nvoc_export_info_ComputeInstanceSubscription }; -static NvBool __nvoc_thunk_ComputeInstanceSubscription_resCanCopy(struct RsResource *arg0) { - return cisubscriptionCanCopy((struct ComputeInstanceSubscription *)(((unsigned char *)arg0) - __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset)); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NvBool __nvoc_thunk_GpuResource_cisubscriptionShareCallback(struct ComputeInstanceSubscription *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ComputeInstanceSubscription[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) cisubscriptionCtrlCmdGetUuid_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0xc6380101u, + /*paramSize=*/ sizeof(NVC638_CTRL_GET_UUID_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_ComputeInstanceSubscription.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "cisubscriptionCtrlCmdGetUuid" +#endif + }, + +}; -static NV_STATUS __nvoc_thunk_RmResource_cisubscriptionCheckMemInterUnmap(struct ComputeInstanceSubscription *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), bSubdeviceHandleProvided); +// 1 down-thunk(s) defined to bridge methods in ComputeInstanceSubscription from superclasses + +// cisubscriptionCanCopy: virtual override (res) base (gpures) +static NvBool __nvoc_down_thunk_ComputeInstanceSubscription_resCanCopy(struct RsResource *arg_this) { + return cisubscriptionCanCopy((struct ComputeInstanceSubscription *)(((unsigned char *) arg_this) - __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_cisubscriptionMapTo(struct ComputeInstanceSubscription *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset), pParams); + +// 24 up-thunk(s) defined to bridge methods in ComputeInstanceSubscription to superclasses + +// cisubscriptionControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionControl(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_cisubscriptionGetMapAddrSpace(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// cisubscriptionMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionMap(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_cisubscriptionGetRefCount(struct ComputeInstanceSubscription *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset)); +// cisubscriptionUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionUnmap(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_RsResource_cisubscriptionAddAdditionalDependants(struct RsClient *pClient, struct ComputeInstanceSubscription *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset), pReference); +// cisubscriptionShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_cisubscriptionShareCallback(struct ComputeInstanceSubscription *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RmResource_cisubscriptionControl_Prologue(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), pCallContext, pParams); +// cisubscriptionGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionGetRegBaseOffsetAndSize(struct ComputeInstanceSubscription *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_GpuResource_cisubscriptionGetRegBaseOffsetAndSize(struct ComputeInstanceSubscription *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), pGpu, pOffset, pSize); +// cisubscriptionGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionGetMapAddrSpace(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_GpuResource_cisubscriptionInternalControlForward(struct ComputeInstanceSubscription *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), command, pParams, size); +// cisubscriptionInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionInternalControlForward(struct ComputeInstanceSubscription *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_RsResource_cisubscriptionUnmapFrom(struct ComputeInstanceSubscription *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset), pParams); +// cisubscriptionGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_cisubscriptionGetInternalObjectHandle(struct ComputeInstanceSubscription *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset)); } -static void __nvoc_thunk_RmResource_cisubscriptionControl_Epilogue(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), pCallContext, pParams); +// cisubscriptionAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_cisubscriptionAccessCallback(struct ComputeInstanceSubscription *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NvHandle __nvoc_thunk_GpuResource_cisubscriptionGetInternalObjectHandle(struct ComputeInstanceSubscription *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset)); +// cisubscriptionGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_cisubscriptionGetMemInterMapParams(struct ComputeInstanceSubscription *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_cisubscriptionControl(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), pCallContext, pParams); +// cisubscriptionCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_cisubscriptionCheckMemInterUnmap(struct ComputeInstanceSubscription *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_GpuResource_cisubscriptionUnmap(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), pCallContext, pCpuMapping); +// cisubscriptionGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_cisubscriptionGetMemoryMappingDescriptor(struct ComputeInstanceSubscription *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_RmResource_cisubscriptionGetMemInterMapParams(struct ComputeInstanceSubscription *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), pParams); +// cisubscriptionControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_cisubscriptionControlSerialization_Prologue(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_cisubscriptionGetMemoryMappingDescriptor(struct ComputeInstanceSubscription *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), ppMemDesc); +// cisubscriptionControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_cisubscriptionControlSerialization_Epilogue(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_cisubscriptionControlFilter(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset), pCallContext, pParams); +// cisubscriptionControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_cisubscriptionControl_Prologue(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_cisubscriptionControlSerialization_Prologue(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), pCallContext, pParams); +// cisubscriptionControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_cisubscriptionControl_Epilogue(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_cisubscriptionIsPartialUnmapSupported(struct ComputeInstanceSubscription *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset)); +// cisubscriptionIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_cisubscriptionIsDuplicate(struct ComputeInstanceSubscription *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset), hMemory, pDuplicate); } -static void __nvoc_thunk_RsResource_cisubscriptionPreDestruct(struct ComputeInstanceSubscription *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset)); +// cisubscriptionPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_cisubscriptionPreDestruct(struct ComputeInstanceSubscription *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_cisubscriptionIsDuplicate(struct ComputeInstanceSubscription *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset), hMemory, pDuplicate); +// cisubscriptionControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_cisubscriptionControlFilter(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RmResource_cisubscriptionControlSerialization_Epilogue(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), pCallContext, pParams); +// cisubscriptionIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_cisubscriptionIsPartialUnmapSupported(struct ComputeInstanceSubscription *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_cisubscriptionMap(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// cisubscriptionMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_cisubscriptionMapTo(struct ComputeInstanceSubscription *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RmResource_cisubscriptionAccessCallback(struct ComputeInstanceSubscription *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// cisubscriptionUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_cisubscriptionUnmapFrom(struct ComputeInstanceSubscription *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset), pParams); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// cisubscriptionGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_cisubscriptionGetRefCount(struct ComputeInstanceSubscription *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset)); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ComputeInstanceSubscription[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) cisubscriptionCtrlCmdGetUuid_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xc6380101u, - /*paramSize=*/ sizeof(NVC638_CTRL_GET_UUID_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_ComputeInstanceSubscription.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "cisubscriptionCtrlCmdGetUuid" -#endif - }, +// cisubscriptionAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_cisubscriptionAddAdditionalDependants(struct RsClient *pClient, struct ComputeInstanceSubscription *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset), pReference); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_ComputeInstanceSubscription = { @@ -253,67 +284,97 @@ NV_STATUS __nvoc_ctor_ComputeInstanceSubscription(ComputeInstanceSubscription *p return status; } +// Vtable initialization static void __nvoc_init_funcTable_ComputeInstanceSubscription_1(ComputeInstanceSubscription *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // cisubscriptionCanCopy -- virtual override (res) base (gpures) pThis->__cisubscriptionCanCopy__ = &cisubscriptionCanCopy_IMPL; + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_ComputeInstanceSubscription_resCanCopy; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // cisubscriptionCtrlCmdGetUuid -- exported (id=0xc6380101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cisubscriptionCtrlCmdGetUuid__ = &cisubscriptionCtrlCmdGetUuid_IMPL; #endif - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_ComputeInstanceSubscription_resCanCopy; + // cisubscriptionControl -- virtual inherited (gpures) base (gpures) + pThis->__cisubscriptionControl__ = &__nvoc_up_thunk_GpuResource_cisubscriptionControl; - pThis->__cisubscriptionShareCallback__ = &__nvoc_thunk_GpuResource_cisubscriptionShareCallback; + // cisubscriptionMap -- virtual inherited (gpures) base (gpures) + pThis->__cisubscriptionMap__ = &__nvoc_up_thunk_GpuResource_cisubscriptionMap; - pThis->__cisubscriptionCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_cisubscriptionCheckMemInterUnmap; + // cisubscriptionUnmap -- virtual inherited (gpures) base (gpures) + pThis->__cisubscriptionUnmap__ = &__nvoc_up_thunk_GpuResource_cisubscriptionUnmap; - pThis->__cisubscriptionMapTo__ = &__nvoc_thunk_RsResource_cisubscriptionMapTo; + // cisubscriptionShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__cisubscriptionShareCallback__ = &__nvoc_up_thunk_GpuResource_cisubscriptionShareCallback; - pThis->__cisubscriptionGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_cisubscriptionGetMapAddrSpace; + // cisubscriptionGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__cisubscriptionGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_cisubscriptionGetRegBaseOffsetAndSize; - pThis->__cisubscriptionGetRefCount__ = &__nvoc_thunk_RsResource_cisubscriptionGetRefCount; + // cisubscriptionGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__cisubscriptionGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_cisubscriptionGetMapAddrSpace; - pThis->__cisubscriptionAddAdditionalDependants__ = &__nvoc_thunk_RsResource_cisubscriptionAddAdditionalDependants; + // cisubscriptionInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__cisubscriptionInternalControlForward__ = &__nvoc_up_thunk_GpuResource_cisubscriptionInternalControlForward; - pThis->__cisubscriptionControl_Prologue__ = &__nvoc_thunk_RmResource_cisubscriptionControl_Prologue; + // cisubscriptionGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__cisubscriptionGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_cisubscriptionGetInternalObjectHandle; - pThis->__cisubscriptionGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_cisubscriptionGetRegBaseOffsetAndSize; + // cisubscriptionAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__cisubscriptionAccessCallback__ = &__nvoc_up_thunk_RmResource_cisubscriptionAccessCallback; - pThis->__cisubscriptionInternalControlForward__ = &__nvoc_thunk_GpuResource_cisubscriptionInternalControlForward; + // cisubscriptionGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__cisubscriptionGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_cisubscriptionGetMemInterMapParams; - pThis->__cisubscriptionUnmapFrom__ = &__nvoc_thunk_RsResource_cisubscriptionUnmapFrom; + // cisubscriptionCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__cisubscriptionCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_cisubscriptionCheckMemInterUnmap; - pThis->__cisubscriptionControl_Epilogue__ = &__nvoc_thunk_RmResource_cisubscriptionControl_Epilogue; + // cisubscriptionGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__cisubscriptionGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_cisubscriptionGetMemoryMappingDescriptor; - pThis->__cisubscriptionGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_cisubscriptionGetInternalObjectHandle; + // cisubscriptionControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__cisubscriptionControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_cisubscriptionControlSerialization_Prologue; - pThis->__cisubscriptionControl__ = &__nvoc_thunk_GpuResource_cisubscriptionControl; + // cisubscriptionControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__cisubscriptionControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_cisubscriptionControlSerialization_Epilogue; - pThis->__cisubscriptionUnmap__ = &__nvoc_thunk_GpuResource_cisubscriptionUnmap; + // cisubscriptionControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__cisubscriptionControl_Prologue__ = &__nvoc_up_thunk_RmResource_cisubscriptionControl_Prologue; - pThis->__cisubscriptionGetMemInterMapParams__ = &__nvoc_thunk_RmResource_cisubscriptionGetMemInterMapParams; + // cisubscriptionControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__cisubscriptionControl_Epilogue__ = &__nvoc_up_thunk_RmResource_cisubscriptionControl_Epilogue; - pThis->__cisubscriptionGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_cisubscriptionGetMemoryMappingDescriptor; + // cisubscriptionIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__cisubscriptionIsDuplicate__ = &__nvoc_up_thunk_RsResource_cisubscriptionIsDuplicate; - pThis->__cisubscriptionControlFilter__ = &__nvoc_thunk_RsResource_cisubscriptionControlFilter; + // cisubscriptionPreDestruct -- virtual inherited (res) base (gpures) + pThis->__cisubscriptionPreDestruct__ = &__nvoc_up_thunk_RsResource_cisubscriptionPreDestruct; - pThis->__cisubscriptionControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_cisubscriptionControlSerialization_Prologue; + // cisubscriptionControlFilter -- virtual inherited (res) base (gpures) + pThis->__cisubscriptionControlFilter__ = &__nvoc_up_thunk_RsResource_cisubscriptionControlFilter; - pThis->__cisubscriptionIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_cisubscriptionIsPartialUnmapSupported; + // cisubscriptionIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__cisubscriptionIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_cisubscriptionIsPartialUnmapSupported; - pThis->__cisubscriptionPreDestruct__ = &__nvoc_thunk_RsResource_cisubscriptionPreDestruct; + // cisubscriptionMapTo -- virtual inherited (res) base (gpures) + pThis->__cisubscriptionMapTo__ = &__nvoc_up_thunk_RsResource_cisubscriptionMapTo; - pThis->__cisubscriptionIsDuplicate__ = &__nvoc_thunk_RsResource_cisubscriptionIsDuplicate; + // cisubscriptionUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__cisubscriptionUnmapFrom__ = &__nvoc_up_thunk_RsResource_cisubscriptionUnmapFrom; - pThis->__cisubscriptionControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_cisubscriptionControlSerialization_Epilogue; + // cisubscriptionGetRefCount -- virtual inherited (res) base (gpures) + pThis->__cisubscriptionGetRefCount__ = &__nvoc_up_thunk_RsResource_cisubscriptionGetRefCount; - pThis->__cisubscriptionMap__ = &__nvoc_thunk_GpuResource_cisubscriptionMap; + // cisubscriptionAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__cisubscriptionAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_cisubscriptionAddAdditionalDependants; +} // End __nvoc_init_funcTable_ComputeInstanceSubscription_1 with approximately 27 basic block(s). - pThis->__cisubscriptionAccessCallback__ = &__nvoc_thunk_RmResource_cisubscriptionAccessCallback; -} +// Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_ComputeInstanceSubscription(ComputeInstanceSubscription *pThis) { + + // Initialize vtable(s) with 26 per-object function pointer(s). __nvoc_init_funcTable_ComputeInstanceSubscription_1(pThis); } diff --git a/src/nvidia/generated/g_compute_instance_subscription_nvoc.h b/src/nvidia/generated/g_compute_instance_subscription_nvoc.h index df20f5562f..b09305d38b 100644 --- a/src/nvidia/generated/g_compute_instance_subscription_nvoc.h +++ b/src/nvidia/generated/g_compute_instance_subscription_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_COMPUTE_INSTANCE_SUBSCRIPTION_NVOC_H_ #define _G_COMPUTE_INSTANCE_SUBSCRIPTION_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -36,6 +43,7 @@ extern "C" { * *****************************************************************************/ +#pragma once #include "g_compute_instance_subscription_nvoc.h" #ifndef COMPUTE_INSTANCE_SUBSCRIPTION_H @@ -60,80 +68,102 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct ComputeInstanceSubscription { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct ComputeInstanceSubscription *__nvoc_pbase_ComputeInstanceSubscription; - NvBool (*__cisubscriptionCanCopy__)(struct ComputeInstanceSubscription *); - NV_STATUS (*__cisubscriptionCtrlCmdGetUuid__)(struct ComputeInstanceSubscription *, NVC638_CTRL_GET_UUID_PARAMS *); - NvBool (*__cisubscriptionShareCallback__)(struct ComputeInstanceSubscription *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__cisubscriptionCheckMemInterUnmap__)(struct ComputeInstanceSubscription *, NvBool); - NV_STATUS (*__cisubscriptionMapTo__)(struct ComputeInstanceSubscription *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__cisubscriptionGetMapAddrSpace__)(struct ComputeInstanceSubscription *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__cisubscriptionGetRefCount__)(struct ComputeInstanceSubscription *); - void (*__cisubscriptionAddAdditionalDependants__)(struct RsClient *, struct ComputeInstanceSubscription *, RsResourceRef *); - NV_STATUS (*__cisubscriptionControl_Prologue__)(struct ComputeInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__cisubscriptionGetRegBaseOffsetAndSize__)(struct ComputeInstanceSubscription *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__cisubscriptionInternalControlForward__)(struct ComputeInstanceSubscription *, NvU32, void *, NvU32); - NV_STATUS (*__cisubscriptionUnmapFrom__)(struct ComputeInstanceSubscription *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__cisubscriptionControl_Epilogue__)(struct ComputeInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__cisubscriptionGetInternalObjectHandle__)(struct ComputeInstanceSubscription *); - NV_STATUS (*__cisubscriptionControl__)(struct ComputeInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__cisubscriptionUnmap__)(struct ComputeInstanceSubscription *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__cisubscriptionGetMemInterMapParams__)(struct ComputeInstanceSubscription *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__cisubscriptionGetMemoryMappingDescriptor__)(struct ComputeInstanceSubscription *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__cisubscriptionControlFilter__)(struct ComputeInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__cisubscriptionControlSerialization_Prologue__)(struct ComputeInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__cisubscriptionIsPartialUnmapSupported__)(struct ComputeInstanceSubscription *); - void (*__cisubscriptionPreDestruct__)(struct ComputeInstanceSubscription *); - NV_STATUS (*__cisubscriptionIsDuplicate__)(struct ComputeInstanceSubscription *, NvHandle, NvBool *); - void (*__cisubscriptionControlSerialization_Epilogue__)(struct ComputeInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__cisubscriptionMap__)(struct ComputeInstanceSubscription *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__cisubscriptionAccessCallback__)(struct ComputeInstanceSubscription *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct ComputeInstanceSubscription *__nvoc_pbase_ComputeInstanceSubscription; // cisubscription + + // Vtable with 26 per-object function pointers + NvBool (*__cisubscriptionCanCopy__)(struct ComputeInstanceSubscription * /*this*/); // virtual override (res) base (gpures) + NV_STATUS (*__cisubscriptionCtrlCmdGetUuid__)(struct ComputeInstanceSubscription * /*this*/, NVC638_CTRL_GET_UUID_PARAMS *); // exported (id=0xc6380101) + NV_STATUS (*__cisubscriptionControl__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__cisubscriptionMap__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__cisubscriptionUnmap__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__cisubscriptionShareCallback__)(struct ComputeInstanceSubscription * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__cisubscriptionGetRegBaseOffsetAndSize__)(struct ComputeInstanceSubscription * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__cisubscriptionGetMapAddrSpace__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__cisubscriptionInternalControlForward__)(struct ComputeInstanceSubscription * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__cisubscriptionGetInternalObjectHandle__)(struct ComputeInstanceSubscription * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__cisubscriptionAccessCallback__)(struct ComputeInstanceSubscription * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__cisubscriptionGetMemInterMapParams__)(struct ComputeInstanceSubscription * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__cisubscriptionCheckMemInterUnmap__)(struct ComputeInstanceSubscription * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__cisubscriptionGetMemoryMappingDescriptor__)(struct ComputeInstanceSubscription * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__cisubscriptionControlSerialization_Prologue__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__cisubscriptionControlSerialization_Epilogue__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__cisubscriptionControl_Prologue__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__cisubscriptionControl_Epilogue__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__cisubscriptionIsDuplicate__)(struct ComputeInstanceSubscription * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__cisubscriptionPreDestruct__)(struct ComputeInstanceSubscription * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__cisubscriptionControlFilter__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__cisubscriptionIsPartialUnmapSupported__)(struct ComputeInstanceSubscription * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__cisubscriptionMapTo__)(struct ComputeInstanceSubscription * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__cisubscriptionUnmapFrom__)(struct ComputeInstanceSubscription * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__cisubscriptionGetRefCount__)(struct ComputeInstanceSubscription * /*this*/); // virtual inherited (res) base (gpures) + void (*__cisubscriptionAddAdditionalDependants__)(struct RsClient *, struct ComputeInstanceSubscription * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members MIG_COMPUTE_INSTANCE *PRIVATE_FIELD(pMIGComputeInstance); NvU64 PRIVATE_FIELD(dupedCapDescriptor); }; + struct ComputeInstanceSubscription_PRIVATE { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct ComputeInstanceSubscription *__nvoc_pbase_ComputeInstanceSubscription; - NvBool (*__cisubscriptionCanCopy__)(struct ComputeInstanceSubscription *); - NV_STATUS (*__cisubscriptionCtrlCmdGetUuid__)(struct ComputeInstanceSubscription *, NVC638_CTRL_GET_UUID_PARAMS *); - NvBool (*__cisubscriptionShareCallback__)(struct ComputeInstanceSubscription *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__cisubscriptionCheckMemInterUnmap__)(struct ComputeInstanceSubscription *, NvBool); - NV_STATUS (*__cisubscriptionMapTo__)(struct ComputeInstanceSubscription *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__cisubscriptionGetMapAddrSpace__)(struct ComputeInstanceSubscription *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__cisubscriptionGetRefCount__)(struct ComputeInstanceSubscription *); - void (*__cisubscriptionAddAdditionalDependants__)(struct RsClient *, struct ComputeInstanceSubscription *, RsResourceRef *); - NV_STATUS (*__cisubscriptionControl_Prologue__)(struct ComputeInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__cisubscriptionGetRegBaseOffsetAndSize__)(struct ComputeInstanceSubscription *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__cisubscriptionInternalControlForward__)(struct ComputeInstanceSubscription *, NvU32, void *, NvU32); - NV_STATUS (*__cisubscriptionUnmapFrom__)(struct ComputeInstanceSubscription *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__cisubscriptionControl_Epilogue__)(struct ComputeInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__cisubscriptionGetInternalObjectHandle__)(struct ComputeInstanceSubscription *); - NV_STATUS (*__cisubscriptionControl__)(struct ComputeInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__cisubscriptionUnmap__)(struct ComputeInstanceSubscription *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__cisubscriptionGetMemInterMapParams__)(struct ComputeInstanceSubscription *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__cisubscriptionGetMemoryMappingDescriptor__)(struct ComputeInstanceSubscription *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__cisubscriptionControlFilter__)(struct ComputeInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__cisubscriptionControlSerialization_Prologue__)(struct ComputeInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__cisubscriptionIsPartialUnmapSupported__)(struct ComputeInstanceSubscription *); - void (*__cisubscriptionPreDestruct__)(struct ComputeInstanceSubscription *); - NV_STATUS (*__cisubscriptionIsDuplicate__)(struct ComputeInstanceSubscription *, NvHandle, NvBool *); - void (*__cisubscriptionControlSerialization_Epilogue__)(struct ComputeInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__cisubscriptionMap__)(struct ComputeInstanceSubscription *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__cisubscriptionAccessCallback__)(struct ComputeInstanceSubscription *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct ComputeInstanceSubscription *__nvoc_pbase_ComputeInstanceSubscription; // cisubscription + + // Vtable with 26 per-object function pointers + NvBool (*__cisubscriptionCanCopy__)(struct ComputeInstanceSubscription * /*this*/); // virtual override (res) base (gpures) + NV_STATUS (*__cisubscriptionCtrlCmdGetUuid__)(struct ComputeInstanceSubscription * /*this*/, NVC638_CTRL_GET_UUID_PARAMS *); // exported (id=0xc6380101) + NV_STATUS (*__cisubscriptionControl__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__cisubscriptionMap__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__cisubscriptionUnmap__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__cisubscriptionShareCallback__)(struct ComputeInstanceSubscription * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__cisubscriptionGetRegBaseOffsetAndSize__)(struct ComputeInstanceSubscription * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__cisubscriptionGetMapAddrSpace__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__cisubscriptionInternalControlForward__)(struct ComputeInstanceSubscription * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__cisubscriptionGetInternalObjectHandle__)(struct ComputeInstanceSubscription * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__cisubscriptionAccessCallback__)(struct ComputeInstanceSubscription * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__cisubscriptionGetMemInterMapParams__)(struct ComputeInstanceSubscription * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__cisubscriptionCheckMemInterUnmap__)(struct ComputeInstanceSubscription * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__cisubscriptionGetMemoryMappingDescriptor__)(struct ComputeInstanceSubscription * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__cisubscriptionControlSerialization_Prologue__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__cisubscriptionControlSerialization_Epilogue__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__cisubscriptionControl_Prologue__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__cisubscriptionControl_Epilogue__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__cisubscriptionIsDuplicate__)(struct ComputeInstanceSubscription * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__cisubscriptionPreDestruct__)(struct ComputeInstanceSubscription * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__cisubscriptionControlFilter__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__cisubscriptionIsPartialUnmapSupported__)(struct ComputeInstanceSubscription * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__cisubscriptionMapTo__)(struct ComputeInstanceSubscription * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__cisubscriptionUnmapFrom__)(struct ComputeInstanceSubscription * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__cisubscriptionGetRefCount__)(struct ComputeInstanceSubscription * /*this*/); // virtual inherited (res) base (gpures) + void (*__cisubscriptionAddAdditionalDependants__)(struct RsClient *, struct ComputeInstanceSubscription * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members MIG_COMPUTE_INSTANCE *pMIGComputeInstance; NvU64 dupedCapDescriptor; }; @@ -147,6 +177,7 @@ typedef struct ComputeInstanceSubscription ComputeInstanceSubscription; #define __nvoc_class_id_ComputeInstanceSubscription 0xd1f238 #endif /* __nvoc_class_id_ComputeInstanceSubscription */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_ComputeInstanceSubscription; #define __staticCast_ComputeInstanceSubscription(pThis) \ @@ -159,172 +190,201 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_ComputeInstanceSubscription; ((ComputeInstanceSubscription*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(ComputeInstanceSubscription))) #endif //__nvoc_compute_instance_subscription_h_disabled - NV_STATUS __nvoc_objCreateDynamic_ComputeInstanceSubscription(ComputeInstanceSubscription**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_ComputeInstanceSubscription(ComputeInstanceSubscription**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_ComputeInstanceSubscription(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_ComputeInstanceSubscription((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) -#define cisubscriptionCanCopy(arg0) cisubscriptionCanCopy_DISPATCH(arg0) -#define cisubscriptionCtrlCmdGetUuid(arg0, arg1) cisubscriptionCtrlCmdGetUuid_DISPATCH(arg0, arg1) + +// Wrapper macros +#define cisubscriptionCanCopy_FNPTR(arg_this) arg_this->__cisubscriptionCanCopy__ +#define cisubscriptionCanCopy(arg_this) cisubscriptionCanCopy_DISPATCH(arg_this) +#define cisubscriptionCtrlCmdGetUuid_FNPTR(arg_this) arg_this->__cisubscriptionCtrlCmdGetUuid__ +#define cisubscriptionCtrlCmdGetUuid(arg_this, arg2) cisubscriptionCtrlCmdGetUuid_DISPATCH(arg_this, arg2) +#define cisubscriptionControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define cisubscriptionControl(pGpuResource, pCallContext, pParams) cisubscriptionControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define cisubscriptionMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define cisubscriptionMap(pGpuResource, pCallContext, pParams, pCpuMapping) cisubscriptionMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define cisubscriptionUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define cisubscriptionUnmap(pGpuResource, pCallContext, pCpuMapping) cisubscriptionUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define cisubscriptionShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define cisubscriptionShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) cisubscriptionShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define cisubscriptionCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) cisubscriptionCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define cisubscriptionMapTo(pResource, pParams) cisubscriptionMapTo_DISPATCH(pResource, pParams) -#define cisubscriptionGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) cisubscriptionGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define cisubscriptionGetRefCount(pResource) cisubscriptionGetRefCount_DISPATCH(pResource) -#define cisubscriptionAddAdditionalDependants(pClient, pResource, pReference) cisubscriptionAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define cisubscriptionControl_Prologue(pResource, pCallContext, pParams) cisubscriptionControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define cisubscriptionGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define cisubscriptionGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) cisubscriptionGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define cisubscriptionGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define cisubscriptionGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) cisubscriptionGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define cisubscriptionInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define cisubscriptionInternalControlForward(pGpuResource, command, pParams, size) cisubscriptionInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define cisubscriptionUnmapFrom(pResource, pParams) cisubscriptionUnmapFrom_DISPATCH(pResource, pParams) -#define cisubscriptionControl_Epilogue(pResource, pCallContext, pParams) cisubscriptionControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define cisubscriptionGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define cisubscriptionGetInternalObjectHandle(pGpuResource) cisubscriptionGetInternalObjectHandle_DISPATCH(pGpuResource) -#define cisubscriptionControl(pGpuResource, pCallContext, pParams) cisubscriptionControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define cisubscriptionUnmap(pGpuResource, pCallContext, pCpuMapping) cisubscriptionUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define cisubscriptionAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define cisubscriptionAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) cisubscriptionAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define cisubscriptionGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define cisubscriptionGetMemInterMapParams(pRmResource, pParams) cisubscriptionGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define cisubscriptionCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define cisubscriptionCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) cisubscriptionCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define cisubscriptionGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define cisubscriptionGetMemoryMappingDescriptor(pRmResource, ppMemDesc) cisubscriptionGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define cisubscriptionControlFilter(pResource, pCallContext, pParams) cisubscriptionControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define cisubscriptionControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define cisubscriptionControlSerialization_Prologue(pResource, pCallContext, pParams) cisubscriptionControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define cisubscriptionIsPartialUnmapSupported(pResource) cisubscriptionIsPartialUnmapSupported_DISPATCH(pResource) -#define cisubscriptionPreDestruct(pResource) cisubscriptionPreDestruct_DISPATCH(pResource) -#define cisubscriptionIsDuplicate(pResource, hMemory, pDuplicate) cisubscriptionIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define cisubscriptionControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ #define cisubscriptionControlSerialization_Epilogue(pResource, pCallContext, pParams) cisubscriptionControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define cisubscriptionMap(pGpuResource, pCallContext, pParams, pCpuMapping) cisubscriptionMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define cisubscriptionAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) cisubscriptionAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool cisubscriptionCanCopy_IMPL(struct ComputeInstanceSubscription *arg0); +#define cisubscriptionControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define cisubscriptionControl_Prologue(pResource, pCallContext, pParams) cisubscriptionControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define cisubscriptionControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define cisubscriptionControl_Epilogue(pResource, pCallContext, pParams) cisubscriptionControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define cisubscriptionIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define cisubscriptionIsDuplicate(pResource, hMemory, pDuplicate) cisubscriptionIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define cisubscriptionPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define cisubscriptionPreDestruct(pResource) cisubscriptionPreDestruct_DISPATCH(pResource) +#define cisubscriptionControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define cisubscriptionControlFilter(pResource, pCallContext, pParams) cisubscriptionControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define cisubscriptionIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define cisubscriptionIsPartialUnmapSupported(pResource) cisubscriptionIsPartialUnmapSupported_DISPATCH(pResource) +#define cisubscriptionMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define cisubscriptionMapTo(pResource, pParams) cisubscriptionMapTo_DISPATCH(pResource, pParams) +#define cisubscriptionUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define cisubscriptionUnmapFrom(pResource, pParams) cisubscriptionUnmapFrom_DISPATCH(pResource, pParams) +#define cisubscriptionGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define cisubscriptionGetRefCount(pResource) cisubscriptionGetRefCount_DISPATCH(pResource) +#define cisubscriptionAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define cisubscriptionAddAdditionalDependants(pClient, pResource, pReference) cisubscriptionAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -static inline NvBool cisubscriptionCanCopy_DISPATCH(struct ComputeInstanceSubscription *arg0) { - return arg0->__cisubscriptionCanCopy__(arg0); +// Dispatch functions +static inline NvBool cisubscriptionCanCopy_DISPATCH(struct ComputeInstanceSubscription *arg_this) { + return arg_this->__cisubscriptionCanCopy__(arg_this); } -NV_STATUS cisubscriptionCtrlCmdGetUuid_IMPL(struct ComputeInstanceSubscription *arg0, NVC638_CTRL_GET_UUID_PARAMS *arg1); +static inline NV_STATUS cisubscriptionCtrlCmdGetUuid_DISPATCH(struct ComputeInstanceSubscription *arg_this, NVC638_CTRL_GET_UUID_PARAMS *arg2) { + return arg_this->__cisubscriptionCtrlCmdGetUuid__(arg_this, arg2); +} -static inline NV_STATUS cisubscriptionCtrlCmdGetUuid_DISPATCH(struct ComputeInstanceSubscription *arg0, NVC638_CTRL_GET_UUID_PARAMS *arg1) { - return arg0->__cisubscriptionCtrlCmdGetUuid__(arg0, arg1); +static inline NV_STATUS cisubscriptionControl_DISPATCH(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__cisubscriptionControl__(pGpuResource, pCallContext, pParams); } -static inline NvBool cisubscriptionShareCallback_DISPATCH(struct ComputeInstanceSubscription *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__cisubscriptionShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS cisubscriptionMap_DISPATCH(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__cisubscriptionMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS cisubscriptionCheckMemInterUnmap_DISPATCH(struct ComputeInstanceSubscription *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__cisubscriptionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS cisubscriptionUnmap_DISPATCH(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__cisubscriptionUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS cisubscriptionMapTo_DISPATCH(struct ComputeInstanceSubscription *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__cisubscriptionMapTo__(pResource, pParams); +static inline NvBool cisubscriptionShareCallback_DISPATCH(struct ComputeInstanceSubscription *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__cisubscriptionShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +} + +static inline NV_STATUS cisubscriptionGetRegBaseOffsetAndSize_DISPATCH(struct ComputeInstanceSubscription *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__cisubscriptionGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS cisubscriptionGetMapAddrSpace_DISPATCH(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__cisubscriptionGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NvU32 cisubscriptionGetRefCount_DISPATCH(struct ComputeInstanceSubscription *pResource) { - return pResource->__cisubscriptionGetRefCount__(pResource); +static inline NV_STATUS cisubscriptionInternalControlForward_DISPATCH(struct ComputeInstanceSubscription *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__cisubscriptionInternalControlForward__(pGpuResource, command, pParams, size); } -static inline void cisubscriptionAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ComputeInstanceSubscription *pResource, RsResourceRef *pReference) { - pResource->__cisubscriptionAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvHandle cisubscriptionGetInternalObjectHandle_DISPATCH(struct ComputeInstanceSubscription *pGpuResource) { + return pGpuResource->__cisubscriptionGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS cisubscriptionControl_Prologue_DISPATCH(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__cisubscriptionControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool cisubscriptionAccessCallback_DISPATCH(struct ComputeInstanceSubscription *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__cisubscriptionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS cisubscriptionGetRegBaseOffsetAndSize_DISPATCH(struct ComputeInstanceSubscription *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__cisubscriptionGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS cisubscriptionGetMemInterMapParams_DISPATCH(struct ComputeInstanceSubscription *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__cisubscriptionGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS cisubscriptionInternalControlForward_DISPATCH(struct ComputeInstanceSubscription *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__cisubscriptionInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS cisubscriptionCheckMemInterUnmap_DISPATCH(struct ComputeInstanceSubscription *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__cisubscriptionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS cisubscriptionUnmapFrom_DISPATCH(struct ComputeInstanceSubscription *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__cisubscriptionUnmapFrom__(pResource, pParams); +static inline NV_STATUS cisubscriptionGetMemoryMappingDescriptor_DISPATCH(struct ComputeInstanceSubscription *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__cisubscriptionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline void cisubscriptionControl_Epilogue_DISPATCH(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__cisubscriptionControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS cisubscriptionControlSerialization_Prologue_DISPATCH(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__cisubscriptionControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvHandle cisubscriptionGetInternalObjectHandle_DISPATCH(struct ComputeInstanceSubscription *pGpuResource) { - return pGpuResource->__cisubscriptionGetInternalObjectHandle__(pGpuResource); +static inline void cisubscriptionControlSerialization_Epilogue_DISPATCH(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__cisubscriptionControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS cisubscriptionControl_DISPATCH(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__cisubscriptionControl__(pGpuResource, pCallContext, pParams); +static inline NV_STATUS cisubscriptionControl_Prologue_DISPATCH(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__cisubscriptionControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS cisubscriptionUnmap_DISPATCH(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__cisubscriptionUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline void cisubscriptionControl_Epilogue_DISPATCH(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__cisubscriptionControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS cisubscriptionGetMemInterMapParams_DISPATCH(struct ComputeInstanceSubscription *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__cisubscriptionGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS cisubscriptionIsDuplicate_DISPATCH(struct ComputeInstanceSubscription *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__cisubscriptionIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS cisubscriptionGetMemoryMappingDescriptor_DISPATCH(struct ComputeInstanceSubscription *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__cisubscriptionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void cisubscriptionPreDestruct_DISPATCH(struct ComputeInstanceSubscription *pResource) { + pResource->__cisubscriptionPreDestruct__(pResource); } static inline NV_STATUS cisubscriptionControlFilter_DISPATCH(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__cisubscriptionControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS cisubscriptionControlSerialization_Prologue_DISPATCH(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__cisubscriptionControlSerialization_Prologue__(pResource, pCallContext, pParams); -} - static inline NvBool cisubscriptionIsPartialUnmapSupported_DISPATCH(struct ComputeInstanceSubscription *pResource) { return pResource->__cisubscriptionIsPartialUnmapSupported__(pResource); } -static inline void cisubscriptionPreDestruct_DISPATCH(struct ComputeInstanceSubscription *pResource) { - pResource->__cisubscriptionPreDestruct__(pResource); +static inline NV_STATUS cisubscriptionMapTo_DISPATCH(struct ComputeInstanceSubscription *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__cisubscriptionMapTo__(pResource, pParams); } -static inline NV_STATUS cisubscriptionIsDuplicate_DISPATCH(struct ComputeInstanceSubscription *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__cisubscriptionIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS cisubscriptionUnmapFrom_DISPATCH(struct ComputeInstanceSubscription *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__cisubscriptionUnmapFrom__(pResource, pParams); } -static inline void cisubscriptionControlSerialization_Epilogue_DISPATCH(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__cisubscriptionControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 cisubscriptionGetRefCount_DISPATCH(struct ComputeInstanceSubscription *pResource) { + return pResource->__cisubscriptionGetRefCount__(pResource); } -static inline NV_STATUS cisubscriptionMap_DISPATCH(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__cisubscriptionMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void cisubscriptionAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ComputeInstanceSubscription *pResource, RsResourceRef *pReference) { + pResource->__cisubscriptionAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NvBool cisubscriptionAccessCallback_DISPATCH(struct ComputeInstanceSubscription *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__cisubscriptionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} +NvBool cisubscriptionCanCopy_IMPL(struct ComputeInstanceSubscription *arg1); + +NV_STATUS cisubscriptionCtrlCmdGetUuid_IMPL(struct ComputeInstanceSubscription *arg1, NVC638_CTRL_GET_UUID_PARAMS *arg2); static inline MIG_COMPUTE_INSTANCE *cisubscriptionGetMIGComputeInstance(struct ComputeInstanceSubscription *pComputeInstanceSubscription) { struct ComputeInstanceSubscription_PRIVATE *pComputeInstanceSubscription_PRIVATE = (struct ComputeInstanceSubscription_PRIVATE *)pComputeInstanceSubscription; return pComputeInstanceSubscription_PRIVATE->pMIGComputeInstance; } -NV_STATUS cisubscriptionGetComputeInstanceSubscription_IMPL(struct RsClient *arg0, NvHandle arg1, struct ComputeInstanceSubscription **arg2); +NV_STATUS cisubscriptionGetComputeInstanceSubscription_IMPL(struct RsClient *arg1, NvHandle arg2, struct ComputeInstanceSubscription **arg3); -#define cisubscriptionGetComputeInstanceSubscription(arg0, arg1, arg2) cisubscriptionGetComputeInstanceSubscription_IMPL(arg0, arg1, arg2) +#define cisubscriptionGetComputeInstanceSubscription(arg1, arg2, arg3) cisubscriptionGetComputeInstanceSubscription_IMPL(arg1, arg2, arg3) NV_STATUS cisubscriptionConstruct_IMPL(struct ComputeInstanceSubscription *arg_pComputeInstanceSubscription, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_cisubscriptionConstruct(arg_pComputeInstanceSubscription, arg_pCallContext, arg_pParams) cisubscriptionConstruct_IMPL(arg_pComputeInstanceSubscription, arg_pCallContext, arg_pParams) -NV_STATUS cisubscriptionCopyConstruct_IMPL(struct ComputeInstanceSubscription *arg0, CALL_CONTEXT *arg1, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg2); +NV_STATUS cisubscriptionCopyConstruct_IMPL(struct ComputeInstanceSubscription *arg1, CALL_CONTEXT *arg2, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg3); #ifdef __nvoc_compute_instance_subscription_h_disabled -static inline NV_STATUS cisubscriptionCopyConstruct(struct ComputeInstanceSubscription *arg0, CALL_CONTEXT *arg1, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg2) { +static inline NV_STATUS cisubscriptionCopyConstruct(struct ComputeInstanceSubscription *arg1, CALL_CONTEXT *arg2, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg3) { NV_ASSERT_FAILED_PRECOMP("ComputeInstanceSubscription was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_compute_instance_subscription_h_disabled -#define cisubscriptionCopyConstruct(arg0, arg1, arg2) cisubscriptionCopyConstruct_IMPL(arg0, arg1, arg2) +#define cisubscriptionCopyConstruct(arg1, arg2, arg3) cisubscriptionCopyConstruct_IMPL(arg1, arg2, arg3) #endif //__nvoc_compute_instance_subscription_h_disabled -void cisubscriptionDestruct_IMPL(struct ComputeInstanceSubscription *arg0); +void cisubscriptionDestruct_IMPL(struct ComputeInstanceSubscription *arg1); -#define __nvoc_cisubscriptionDestruct(arg0) cisubscriptionDestruct_IMPL(arg0) +#define __nvoc_cisubscriptionDestruct(arg1) cisubscriptionDestruct_IMPL(arg1) #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_conf_compute_api_nvoc.c b/src/nvidia/generated/g_conf_compute_api_nvoc.c index aaada168dd..c8c8b2fd7c 100644 --- a/src/nvidia/generated/g_conf_compute_api_nvoc.c +++ b/src/nvidia/generated/g_conf_compute_api_nvoc.c @@ -84,90 +84,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_ConfidentialComputeApi = /*pExportInfo=*/ &__nvoc_export_info_ConfidentialComputeApi }; -static NvBool __nvoc_thunk_RmResource_confComputeApiShareCallback(struct ConfidentialComputeApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_confComputeApiCheckMemInterUnmap(struct ConfidentialComputeApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RsResource_confComputeApiControl(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControl((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_confComputeApiGetMemInterMapParams(struct ConfidentialComputeApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_confComputeApiGetMemoryMappingDescriptor(struct ConfidentialComputeApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), ppMemDesc); -} - -static NvU32 __nvoc_thunk_RsResource_confComputeApiGetRefCount(struct ConfidentialComputeApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_confComputeApiControlFilter(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pCallContext, pParams); -} - -static void __nvoc_thunk_RsResource_confComputeApiAddAdditionalDependants(struct RsClient *pClient, struct ConfidentialComputeApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_confComputeApiControlSerialization_Prologue(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_confComputeApiControl_Prologue(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_confComputeApiCanCopy(struct ConfidentialComputeApi *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_confComputeApiUnmap(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pCallContext, pCpuMapping); -} - -static NvBool __nvoc_thunk_RsResource_confComputeApiIsPartialUnmapSupported(struct ConfidentialComputeApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_confComputeApiPreDestruct(struct ConfidentialComputeApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_confComputeApiMapTo(struct ConfidentialComputeApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_confComputeApiIsDuplicate(struct ConfidentialComputeApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_confComputeApiControlSerialization_Epilogue(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pCallContext, pParams); -} - -static void __nvoc_thunk_RmResource_confComputeApiControl_Epilogue(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_confComputeApiUnmapFrom(struct ConfidentialComputeApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_confComputeApiMap(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_confComputeApiAccessCallback(struct ConfidentialComputeApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -190,12 +106,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Confiden #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) confComputeApiCtrlCmdSystemGetSecurityPolicy_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xc56f010eu, /*paramSize=*/ sizeof(NV_CONF_COMPUTE_CTRL_GET_SECURITY_POLICY_PARAMS), @@ -205,12 +121,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Confiden #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) confComputeApiCtrlCmdSystemGetCapabilities_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xcb330101u, /*paramSize=*/ sizeof(NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_CAPABILITIES_PARAMS), @@ -220,12 +136,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Confiden #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) confComputeApiCtrlCmdSystemGetGpusState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xcb330104u, /*paramSize=*/ sizeof(NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_GPUS_STATE_PARAMS), @@ -250,12 +166,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Confiden #endif }, { /* [5] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) confComputeApiCtrlCmdGpuGetVidmemSize_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xcb330106u, /*paramSize=*/ sizeof(NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_VIDMEM_SIZE_PARAMS), @@ -280,12 +196,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Confiden #endif }, { /* [7] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) confComputeApiCtrlCmdGetGpuCertificate_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xcb330109u, /*paramSize=*/ sizeof(NV_CONF_COMPUTE_CTRL_CMD_GET_GPU_CERTIFICATE_PARAMS), @@ -295,12 +211,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Confiden #endif }, { /* [8] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) confComputeApiCtrlCmdGetGpuAttestationReport_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xcb33010au, /*paramSize=*/ sizeof(NV_CONF_COMPUTE_CTRL_CMD_GET_GPU_ATTESTATION_REPORT_PARAMS), @@ -310,12 +226,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Confiden #endif }, { /* [9] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) confComputeApiCtrlCmdGpuGetNumSecureChannels_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xcb33010bu, /*paramSize=*/ sizeof(NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_NUM_SECURE_CHANNELS_PARAMS), @@ -327,6 +243,114 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Confiden }; +// 21 up-thunk(s) defined to bridge methods in ConfidentialComputeApi to superclasses + +// confComputeApiAccessCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_confComputeApiAccessCallback(struct ConfidentialComputeApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// confComputeApiShareCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_confComputeApiShareCallback(struct ConfidentialComputeApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// confComputeApiGetMemInterMapParams: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_confComputeApiGetMemInterMapParams(struct ConfidentialComputeApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pParams); +} + +// confComputeApiCheckMemInterUnmap: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_confComputeApiCheckMemInterUnmap(struct ConfidentialComputeApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), bSubdeviceHandleProvided); +} + +// confComputeApiGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_confComputeApiGetMemoryMappingDescriptor(struct ConfidentialComputeApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), ppMemDesc); +} + +// confComputeApiControlSerialization_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_confComputeApiControlSerialization_Prologue(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pCallContext, pParams); +} + +// confComputeApiControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_confComputeApiControlSerialization_Epilogue(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pCallContext, pParams); +} + +// confComputeApiControl_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_confComputeApiControl_Prologue(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pCallContext, pParams); +} + +// confComputeApiControl_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_confComputeApiControl_Epilogue(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pCallContext, pParams); +} + +// confComputeApiCanCopy: virtual inherited (res) base (rmres) +static NvBool __nvoc_up_thunk_RsResource_confComputeApiCanCopy(struct ConfidentialComputeApi *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset)); +} + +// confComputeApiIsDuplicate: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiIsDuplicate(struct ConfidentialComputeApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), hMemory, pDuplicate); +} + +// confComputeApiPreDestruct: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_confComputeApiPreDestruct(struct ConfidentialComputeApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset)); +} + +// confComputeApiControl: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiControl(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pCallContext, pParams); +} + +// confComputeApiControlFilter: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiControlFilter(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pCallContext, pParams); +} + +// confComputeApiMap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiMap(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pCallContext, pParams, pCpuMapping); +} + +// confComputeApiUnmap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiUnmap(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pCallContext, pCpuMapping); +} + +// confComputeApiIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body +static NvBool __nvoc_up_thunk_RsResource_confComputeApiIsPartialUnmapSupported(struct ConfidentialComputeApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset)); +} + +// confComputeApiMapTo: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiMapTo(struct ConfidentialComputeApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pParams); +} + +// confComputeApiUnmapFrom: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiUnmapFrom(struct ConfidentialComputeApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pParams); +} + +// confComputeApiGetRefCount: virtual inherited (res) base (rmres) +static NvU32 __nvoc_up_thunk_RsResource_confComputeApiGetRefCount(struct ConfidentialComputeApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset)); +} + +// confComputeApiAddAdditionalDependants: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_confComputeApiAddAdditionalDependants(struct RsClient *pClient, struct ConfidentialComputeApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pReference); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_ConfidentialComputeApi = { /*numEntries=*/ 10, @@ -363,93 +387,129 @@ NV_STATUS __nvoc_ctor_ConfidentialComputeApi(ConfidentialComputeApi *pThis, CALL return status; } +// Vtable initialization static void __nvoc_init_funcTable_ConfidentialComputeApi_1(ConfidentialComputeApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // confComputeApiCtrlCmdSystemGetCapabilities -- exported (id=0xcb330101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__confComputeApiCtrlCmdSystemGetCapabilities__ = &confComputeApiCtrlCmdSystemGetCapabilities_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // confComputeApiCtrlCmdSystemGetGpusState -- exported (id=0xcb330104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__confComputeApiCtrlCmdSystemGetGpusState__ = &confComputeApiCtrlCmdSystemGetGpusState_IMPL; #endif + // confComputeApiCtrlCmdSystemSetGpusState -- exported (id=0xcb330105) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__confComputeApiCtrlCmdSystemSetGpusState__ = &confComputeApiCtrlCmdSystemSetGpusState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // confComputeApiCtrlCmdGpuGetVidmemSize -- exported (id=0xcb330106) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__confComputeApiCtrlCmdGpuGetVidmemSize__ = &confComputeApiCtrlCmdGpuGetVidmemSize_IMPL; #endif + // confComputeApiCtrlCmdGpuSetVidmemSize -- exported (id=0xcb330107) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__confComputeApiCtrlCmdGpuSetVidmemSize__ = &confComputeApiCtrlCmdGpuSetVidmemSize_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // confComputeApiCtrlCmdGetGpuCertificate -- exported (id=0xcb330109) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__confComputeApiCtrlCmdGetGpuCertificate__ = &confComputeApiCtrlCmdGetGpuCertificate_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // confComputeApiCtrlCmdGetGpuAttestationReport -- exported (id=0xcb33010a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__confComputeApiCtrlCmdGetGpuAttestationReport__ = &confComputeApiCtrlCmdGetGpuAttestationReport_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // confComputeApiCtrlCmdGpuGetNumSecureChannels -- exported (id=0xcb33010b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__confComputeApiCtrlCmdGpuGetNumSecureChannels__ = &confComputeApiCtrlCmdGpuGetNumSecureChannels_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // confComputeApiCtrlCmdSystemGetSecurityPolicy -- exported (id=0xc56f010e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__confComputeApiCtrlCmdSystemGetSecurityPolicy__ = &confComputeApiCtrlCmdSystemGetSecurityPolicy_IMPL; #endif + // confComputeApiCtrlCmdSystemSetSecurityPolicy -- exported (id=0xc56f010d) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__confComputeApiCtrlCmdSystemSetSecurityPolicy__ = &confComputeApiCtrlCmdSystemSetSecurityPolicy_IMPL; #endif - pThis->__confComputeApiShareCallback__ = &__nvoc_thunk_RmResource_confComputeApiShareCallback; + // confComputeApiAccessCallback -- virtual inherited (rmres) base (rmres) + pThis->__confComputeApiAccessCallback__ = &__nvoc_up_thunk_RmResource_confComputeApiAccessCallback; - pThis->__confComputeApiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_confComputeApiCheckMemInterUnmap; + // confComputeApiShareCallback -- virtual inherited (rmres) base (rmres) + pThis->__confComputeApiShareCallback__ = &__nvoc_up_thunk_RmResource_confComputeApiShareCallback; - pThis->__confComputeApiControl__ = &__nvoc_thunk_RsResource_confComputeApiControl; + // confComputeApiGetMemInterMapParams -- virtual inherited (rmres) base (rmres) + pThis->__confComputeApiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_confComputeApiGetMemInterMapParams; - pThis->__confComputeApiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_confComputeApiGetMemInterMapParams; + // confComputeApiCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) + pThis->__confComputeApiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_confComputeApiCheckMemInterUnmap; - pThis->__confComputeApiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_confComputeApiGetMemoryMappingDescriptor; + // confComputeApiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) + pThis->__confComputeApiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_confComputeApiGetMemoryMappingDescriptor; - pThis->__confComputeApiGetRefCount__ = &__nvoc_thunk_RsResource_confComputeApiGetRefCount; + // confComputeApiControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__confComputeApiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_confComputeApiControlSerialization_Prologue; - pThis->__confComputeApiControlFilter__ = &__nvoc_thunk_RsResource_confComputeApiControlFilter; + // confComputeApiControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__confComputeApiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_confComputeApiControlSerialization_Epilogue; - pThis->__confComputeApiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_confComputeApiAddAdditionalDependants; + // confComputeApiControl_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__confComputeApiControl_Prologue__ = &__nvoc_up_thunk_RmResource_confComputeApiControl_Prologue; - pThis->__confComputeApiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_confComputeApiControlSerialization_Prologue; + // confComputeApiControl_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__confComputeApiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_confComputeApiControl_Epilogue; - pThis->__confComputeApiControl_Prologue__ = &__nvoc_thunk_RmResource_confComputeApiControl_Prologue; + // confComputeApiCanCopy -- virtual inherited (res) base (rmres) + pThis->__confComputeApiCanCopy__ = &__nvoc_up_thunk_RsResource_confComputeApiCanCopy; - pThis->__confComputeApiCanCopy__ = &__nvoc_thunk_RsResource_confComputeApiCanCopy; + // confComputeApiIsDuplicate -- virtual inherited (res) base (rmres) + pThis->__confComputeApiIsDuplicate__ = &__nvoc_up_thunk_RsResource_confComputeApiIsDuplicate; - pThis->__confComputeApiUnmap__ = &__nvoc_thunk_RsResource_confComputeApiUnmap; + // confComputeApiPreDestruct -- virtual inherited (res) base (rmres) + pThis->__confComputeApiPreDestruct__ = &__nvoc_up_thunk_RsResource_confComputeApiPreDestruct; - pThis->__confComputeApiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_confComputeApiIsPartialUnmapSupported; + // confComputeApiControl -- virtual inherited (res) base (rmres) + pThis->__confComputeApiControl__ = &__nvoc_up_thunk_RsResource_confComputeApiControl; - pThis->__confComputeApiPreDestruct__ = &__nvoc_thunk_RsResource_confComputeApiPreDestruct; + // confComputeApiControlFilter -- virtual inherited (res) base (rmres) + pThis->__confComputeApiControlFilter__ = &__nvoc_up_thunk_RsResource_confComputeApiControlFilter; - pThis->__confComputeApiMapTo__ = &__nvoc_thunk_RsResource_confComputeApiMapTo; + // confComputeApiMap -- virtual inherited (res) base (rmres) + pThis->__confComputeApiMap__ = &__nvoc_up_thunk_RsResource_confComputeApiMap; - pThis->__confComputeApiIsDuplicate__ = &__nvoc_thunk_RsResource_confComputeApiIsDuplicate; + // confComputeApiUnmap -- virtual inherited (res) base (rmres) + pThis->__confComputeApiUnmap__ = &__nvoc_up_thunk_RsResource_confComputeApiUnmap; - pThis->__confComputeApiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_confComputeApiControlSerialization_Epilogue; + // confComputeApiIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body + pThis->__confComputeApiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_confComputeApiIsPartialUnmapSupported; - pThis->__confComputeApiControl_Epilogue__ = &__nvoc_thunk_RmResource_confComputeApiControl_Epilogue; + // confComputeApiMapTo -- virtual inherited (res) base (rmres) + pThis->__confComputeApiMapTo__ = &__nvoc_up_thunk_RsResource_confComputeApiMapTo; - pThis->__confComputeApiUnmapFrom__ = &__nvoc_thunk_RsResource_confComputeApiUnmapFrom; + // confComputeApiUnmapFrom -- virtual inherited (res) base (rmres) + pThis->__confComputeApiUnmapFrom__ = &__nvoc_up_thunk_RsResource_confComputeApiUnmapFrom; - pThis->__confComputeApiMap__ = &__nvoc_thunk_RsResource_confComputeApiMap; + // confComputeApiGetRefCount -- virtual inherited (res) base (rmres) + pThis->__confComputeApiGetRefCount__ = &__nvoc_up_thunk_RsResource_confComputeApiGetRefCount; - pThis->__confComputeApiAccessCallback__ = &__nvoc_thunk_RmResource_confComputeApiAccessCallback; -} + // confComputeApiAddAdditionalDependants -- virtual inherited (res) base (rmres) + pThis->__confComputeApiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_confComputeApiAddAdditionalDependants; +} // End __nvoc_init_funcTable_ConfidentialComputeApi_1 with approximately 31 basic block(s). + +// Initialize vtable(s) for 31 virtual method(s). void __nvoc_init_funcTable_ConfidentialComputeApi(ConfidentialComputeApi *pThis) { + + // Initialize vtable(s) with 31 per-object function pointer(s). __nvoc_init_funcTable_ConfidentialComputeApi_1(pThis); } diff --git a/src/nvidia/generated/g_conf_compute_api_nvoc.h b/src/nvidia/generated/g_conf_compute_api_nvoc.h index 193819b588..c39d83506f 100644 --- a/src/nvidia/generated/g_conf_compute_api_nvoc.h +++ b/src/nvidia/generated/g_conf_compute_api_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_CONF_COMPUTE_API_NVOC_H_ #define _G_CONF_COMPUTE_API_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_conf_compute_api_nvoc.h" #ifndef CONF_COMPUTE_API_H @@ -58,45 +66,56 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct ConfidentialComputeApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct ConfidentialComputeApi *__nvoc_pbase_ConfidentialComputeApi; - NV_STATUS (*__confComputeApiCtrlCmdSystemGetCapabilities__)(struct ConfidentialComputeApi *, NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_CAPABILITIES_PARAMS *); - NV_STATUS (*__confComputeApiCtrlCmdSystemGetGpusState__)(struct ConfidentialComputeApi *, NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_GPUS_STATE_PARAMS *); - NV_STATUS (*__confComputeApiCtrlCmdSystemSetGpusState__)(struct ConfidentialComputeApi *, NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_SET_GPUS_STATE_PARAMS *); - NV_STATUS (*__confComputeApiCtrlCmdGpuGetVidmemSize__)(struct ConfidentialComputeApi *, NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_VIDMEM_SIZE_PARAMS *); - NV_STATUS (*__confComputeApiCtrlCmdGpuSetVidmemSize__)(struct ConfidentialComputeApi *, NV_CONF_COMPUTE_CTRL_CMD_GPU_SET_VIDMEM_SIZE_PARAMS *); - NV_STATUS (*__confComputeApiCtrlCmdGetGpuCertificate__)(struct ConfidentialComputeApi *, NV_CONF_COMPUTE_CTRL_CMD_GET_GPU_CERTIFICATE_PARAMS *); - NV_STATUS (*__confComputeApiCtrlCmdGetGpuAttestationReport__)(struct ConfidentialComputeApi *, NV_CONF_COMPUTE_CTRL_CMD_GET_GPU_ATTESTATION_REPORT_PARAMS *); - NV_STATUS (*__confComputeApiCtrlCmdGpuGetNumSecureChannels__)(struct ConfidentialComputeApi *, NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_NUM_SECURE_CHANNELS_PARAMS *); - NV_STATUS (*__confComputeApiCtrlCmdSystemGetSecurityPolicy__)(struct ConfidentialComputeApi *, NV_CONF_COMPUTE_CTRL_GET_SECURITY_POLICY_PARAMS *); - NV_STATUS (*__confComputeApiCtrlCmdSystemSetSecurityPolicy__)(struct ConfidentialComputeApi *, NV_CONF_COMPUTE_CTRL_SET_SECURITY_POLICY_PARAMS *); - NvBool (*__confComputeApiShareCallback__)(struct ConfidentialComputeApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__confComputeApiCheckMemInterUnmap__)(struct ConfidentialComputeApi *, NvBool); - NV_STATUS (*__confComputeApiControl__)(struct ConfidentialComputeApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__confComputeApiGetMemInterMapParams__)(struct ConfidentialComputeApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__confComputeApiGetMemoryMappingDescriptor__)(struct ConfidentialComputeApi *, struct MEMORY_DESCRIPTOR **); - NvU32 (*__confComputeApiGetRefCount__)(struct ConfidentialComputeApi *); - NV_STATUS (*__confComputeApiControlFilter__)(struct ConfidentialComputeApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__confComputeApiAddAdditionalDependants__)(struct RsClient *, struct ConfidentialComputeApi *, RsResourceRef *); - NV_STATUS (*__confComputeApiControlSerialization_Prologue__)(struct ConfidentialComputeApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__confComputeApiControl_Prologue__)(struct ConfidentialComputeApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__confComputeApiCanCopy__)(struct ConfidentialComputeApi *); - NV_STATUS (*__confComputeApiUnmap__)(struct ConfidentialComputeApi *, struct CALL_CONTEXT *, RsCpuMapping *); - NvBool (*__confComputeApiIsPartialUnmapSupported__)(struct ConfidentialComputeApi *); - void (*__confComputeApiPreDestruct__)(struct ConfidentialComputeApi *); - NV_STATUS (*__confComputeApiMapTo__)(struct ConfidentialComputeApi *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__confComputeApiIsDuplicate__)(struct ConfidentialComputeApi *, NvHandle, NvBool *); - void (*__confComputeApiControlSerialization_Epilogue__)(struct ConfidentialComputeApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__confComputeApiControl_Epilogue__)(struct ConfidentialComputeApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__confComputeApiUnmapFrom__)(struct ConfidentialComputeApi *, RS_RES_UNMAP_FROM_PARAMS *); - NV_STATUS (*__confComputeApiMap__)(struct ConfidentialComputeApi *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__confComputeApiAccessCallback__)(struct ConfidentialComputeApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^3 + struct RsResource *__nvoc_pbase_RsResource; // res super^2 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^2 + struct RmResource *__nvoc_pbase_RmResource; // rmres super + struct ConfidentialComputeApi *__nvoc_pbase_ConfidentialComputeApi; // confComputeApi + + // Vtable with 31 per-object function pointers + NV_STATUS (*__confComputeApiCtrlCmdSystemGetCapabilities__)(struct ConfidentialComputeApi * /*this*/, NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_CAPABILITIES_PARAMS *); // exported (id=0xcb330101) + NV_STATUS (*__confComputeApiCtrlCmdSystemGetGpusState__)(struct ConfidentialComputeApi * /*this*/, NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_GPUS_STATE_PARAMS *); // exported (id=0xcb330104) + NV_STATUS (*__confComputeApiCtrlCmdSystemSetGpusState__)(struct ConfidentialComputeApi * /*this*/, NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_SET_GPUS_STATE_PARAMS *); // exported (id=0xcb330105) + NV_STATUS (*__confComputeApiCtrlCmdGpuGetVidmemSize__)(struct ConfidentialComputeApi * /*this*/, NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_VIDMEM_SIZE_PARAMS *); // exported (id=0xcb330106) + NV_STATUS (*__confComputeApiCtrlCmdGpuSetVidmemSize__)(struct ConfidentialComputeApi * /*this*/, NV_CONF_COMPUTE_CTRL_CMD_GPU_SET_VIDMEM_SIZE_PARAMS *); // exported (id=0xcb330107) + NV_STATUS (*__confComputeApiCtrlCmdGetGpuCertificate__)(struct ConfidentialComputeApi * /*this*/, NV_CONF_COMPUTE_CTRL_CMD_GET_GPU_CERTIFICATE_PARAMS *); // exported (id=0xcb330109) + NV_STATUS (*__confComputeApiCtrlCmdGetGpuAttestationReport__)(struct ConfidentialComputeApi * /*this*/, NV_CONF_COMPUTE_CTRL_CMD_GET_GPU_ATTESTATION_REPORT_PARAMS *); // exported (id=0xcb33010a) + NV_STATUS (*__confComputeApiCtrlCmdGpuGetNumSecureChannels__)(struct ConfidentialComputeApi * /*this*/, NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_NUM_SECURE_CHANNELS_PARAMS *); // exported (id=0xcb33010b) + NV_STATUS (*__confComputeApiCtrlCmdSystemGetSecurityPolicy__)(struct ConfidentialComputeApi * /*this*/, NV_CONF_COMPUTE_CTRL_GET_SECURITY_POLICY_PARAMS *); // exported (id=0xc56f010e) + NV_STATUS (*__confComputeApiCtrlCmdSystemSetSecurityPolicy__)(struct ConfidentialComputeApi * /*this*/, NV_CONF_COMPUTE_CTRL_SET_SECURITY_POLICY_PARAMS *); // exported (id=0xc56f010d) + NvBool (*__confComputeApiAccessCallback__)(struct ConfidentialComputeApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) + NvBool (*__confComputeApiShareCallback__)(struct ConfidentialComputeApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__confComputeApiGetMemInterMapParams__)(struct ConfidentialComputeApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__confComputeApiCheckMemInterUnmap__)(struct ConfidentialComputeApi * /*this*/, NvBool); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__confComputeApiGetMemoryMappingDescriptor__)(struct ConfidentialComputeApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__confComputeApiControlSerialization_Prologue__)(struct ConfidentialComputeApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__confComputeApiControlSerialization_Epilogue__)(struct ConfidentialComputeApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__confComputeApiControl_Prologue__)(struct ConfidentialComputeApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__confComputeApiControl_Epilogue__)(struct ConfidentialComputeApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NvBool (*__confComputeApiCanCopy__)(struct ConfidentialComputeApi * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__confComputeApiIsDuplicate__)(struct ConfidentialComputeApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (rmres) + void (*__confComputeApiPreDestruct__)(struct ConfidentialComputeApi * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__confComputeApiControl__)(struct ConfidentialComputeApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__confComputeApiControlFilter__)(struct ConfidentialComputeApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__confComputeApiMap__)(struct ConfidentialComputeApi * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NV_STATUS (*__confComputeApiUnmap__)(struct ConfidentialComputeApi * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NvBool (*__confComputeApiIsPartialUnmapSupported__)(struct ConfidentialComputeApi * /*this*/); // inline virtual inherited (res) base (rmres) body + NV_STATUS (*__confComputeApiMapTo__)(struct ConfidentialComputeApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) + NV_STATUS (*__confComputeApiUnmapFrom__)(struct ConfidentialComputeApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) + NvU32 (*__confComputeApiGetRefCount__)(struct ConfidentialComputeApi * /*this*/); // virtual inherited (res) base (rmres) + void (*__confComputeApiAddAdditionalDependants__)(struct RsClient *, struct ConfidentialComputeApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) + + // Data members struct CONF_COMPUTE_CAPS *pCcCaps; }; @@ -109,6 +128,7 @@ typedef struct ConfidentialComputeApi ConfidentialComputeApi; #define __nvoc_class_id_ConfidentialComputeApi 0xea5cb0 #endif /* __nvoc_class_id_ConfidentialComputeApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_ConfidentialComputeApi; #define __staticCast_ConfidentialComputeApi(pThis) \ @@ -121,146 +141,176 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_ConfidentialComputeApi; ((ConfidentialComputeApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(ConfidentialComputeApi))) #endif //__nvoc_conf_compute_api_h_disabled - NV_STATUS __nvoc_objCreateDynamic_ConfidentialComputeApi(ConfidentialComputeApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_ConfidentialComputeApi(ConfidentialComputeApi**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_ConfidentialComputeApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_ConfidentialComputeApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define confComputeApiCtrlCmdSystemGetCapabilities_FNPTR(pConfComputeApi) pConfComputeApi->__confComputeApiCtrlCmdSystemGetCapabilities__ #define confComputeApiCtrlCmdSystemGetCapabilities(pConfComputeApi, pParams) confComputeApiCtrlCmdSystemGetCapabilities_DISPATCH(pConfComputeApi, pParams) +#define confComputeApiCtrlCmdSystemGetGpusState_FNPTR(pConfComputeApi) pConfComputeApi->__confComputeApiCtrlCmdSystemGetGpusState__ #define confComputeApiCtrlCmdSystemGetGpusState(pConfComputeApi, pParams) confComputeApiCtrlCmdSystemGetGpusState_DISPATCH(pConfComputeApi, pParams) +#define confComputeApiCtrlCmdSystemSetGpusState_FNPTR(pConfComputeApi) pConfComputeApi->__confComputeApiCtrlCmdSystemSetGpusState__ #define confComputeApiCtrlCmdSystemSetGpusState(pConfComputeApi, pParams) confComputeApiCtrlCmdSystemSetGpusState_DISPATCH(pConfComputeApi, pParams) +#define confComputeApiCtrlCmdGpuGetVidmemSize_FNPTR(pConfComputeApi) pConfComputeApi->__confComputeApiCtrlCmdGpuGetVidmemSize__ #define confComputeApiCtrlCmdGpuGetVidmemSize(pConfComputeApi, pParams) confComputeApiCtrlCmdGpuGetVidmemSize_DISPATCH(pConfComputeApi, pParams) +#define confComputeApiCtrlCmdGpuSetVidmemSize_FNPTR(pConfComputeApi) pConfComputeApi->__confComputeApiCtrlCmdGpuSetVidmemSize__ #define confComputeApiCtrlCmdGpuSetVidmemSize(pConfComputeApi, pParams) confComputeApiCtrlCmdGpuSetVidmemSize_DISPATCH(pConfComputeApi, pParams) +#define confComputeApiCtrlCmdGetGpuCertificate_FNPTR(pConfComputeApi) pConfComputeApi->__confComputeApiCtrlCmdGetGpuCertificate__ #define confComputeApiCtrlCmdGetGpuCertificate(pConfComputeApi, pParams) confComputeApiCtrlCmdGetGpuCertificate_DISPATCH(pConfComputeApi, pParams) +#define confComputeApiCtrlCmdGetGpuAttestationReport_FNPTR(pConfComputeApi) pConfComputeApi->__confComputeApiCtrlCmdGetGpuAttestationReport__ #define confComputeApiCtrlCmdGetGpuAttestationReport(pConfComputeApi, pParams) confComputeApiCtrlCmdGetGpuAttestationReport_DISPATCH(pConfComputeApi, pParams) +#define confComputeApiCtrlCmdGpuGetNumSecureChannels_FNPTR(pConfComputeApi) pConfComputeApi->__confComputeApiCtrlCmdGpuGetNumSecureChannels__ #define confComputeApiCtrlCmdGpuGetNumSecureChannels(pConfComputeApi, pParams) confComputeApiCtrlCmdGpuGetNumSecureChannels_DISPATCH(pConfComputeApi, pParams) +#define confComputeApiCtrlCmdSystemGetSecurityPolicy_FNPTR(pConfComputeApi) pConfComputeApi->__confComputeApiCtrlCmdSystemGetSecurityPolicy__ #define confComputeApiCtrlCmdSystemGetSecurityPolicy(pConfComputeApi, pParams) confComputeApiCtrlCmdSystemGetSecurityPolicy_DISPATCH(pConfComputeApi, pParams) +#define confComputeApiCtrlCmdSystemSetSecurityPolicy_FNPTR(pConfComputeApi) pConfComputeApi->__confComputeApiCtrlCmdSystemSetSecurityPolicy__ #define confComputeApiCtrlCmdSystemSetSecurityPolicy(pConfComputeApi, pParams) confComputeApiCtrlCmdSystemSetSecurityPolicy_DISPATCH(pConfComputeApi, pParams) +#define confComputeApiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define confComputeApiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) confComputeApiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define confComputeApiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ #define confComputeApiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) confComputeApiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define confComputeApiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) confComputeApiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define confComputeApiControl(pResource, pCallContext, pParams) confComputeApiControl_DISPATCH(pResource, pCallContext, pParams) +#define confComputeApiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define confComputeApiGetMemInterMapParams(pRmResource, pParams) confComputeApiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define confComputeApiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define confComputeApiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) confComputeApiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define confComputeApiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define confComputeApiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) confComputeApiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define confComputeApiGetRefCount(pResource) confComputeApiGetRefCount_DISPATCH(pResource) -#define confComputeApiControlFilter(pResource, pCallContext, pParams) confComputeApiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define confComputeApiAddAdditionalDependants(pClient, pResource, pReference) confComputeApiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define confComputeApiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define confComputeApiControlSerialization_Prologue(pResource, pCallContext, pParams) confComputeApiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define confComputeApiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define confComputeApiControlSerialization_Epilogue(pResource, pCallContext, pParams) confComputeApiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define confComputeApiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ #define confComputeApiControl_Prologue(pResource, pCallContext, pParams) confComputeApiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define confComputeApiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define confComputeApiControl_Epilogue(pResource, pCallContext, pParams) confComputeApiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define confComputeApiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define confComputeApiCanCopy(pResource) confComputeApiCanCopy_DISPATCH(pResource) +#define confComputeApiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define confComputeApiIsDuplicate(pResource, hMemory, pDuplicate) confComputeApiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define confComputeApiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define confComputeApiPreDestruct(pResource) confComputeApiPreDestruct_DISPATCH(pResource) +#define confComputeApiControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define confComputeApiControl(pResource, pCallContext, pParams) confComputeApiControl_DISPATCH(pResource, pCallContext, pParams) +#define confComputeApiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define confComputeApiControlFilter(pResource, pCallContext, pParams) confComputeApiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define confComputeApiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define confComputeApiMap(pResource, pCallContext, pParams, pCpuMapping) confComputeApiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define confComputeApiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ #define confComputeApiUnmap(pResource, pCallContext, pCpuMapping) confComputeApiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define confComputeApiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ #define confComputeApiIsPartialUnmapSupported(pResource) confComputeApiIsPartialUnmapSupported_DISPATCH(pResource) -#define confComputeApiPreDestruct(pResource) confComputeApiPreDestruct_DISPATCH(pResource) +#define confComputeApiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ #define confComputeApiMapTo(pResource, pParams) confComputeApiMapTo_DISPATCH(pResource, pParams) -#define confComputeApiIsDuplicate(pResource, hMemory, pDuplicate) confComputeApiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define confComputeApiControlSerialization_Epilogue(pResource, pCallContext, pParams) confComputeApiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define confComputeApiControl_Epilogue(pResource, pCallContext, pParams) confComputeApiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define confComputeApiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ #define confComputeApiUnmapFrom(pResource, pParams) confComputeApiUnmapFrom_DISPATCH(pResource, pParams) -#define confComputeApiMap(pResource, pCallContext, pParams, pCpuMapping) confComputeApiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define confComputeApiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) confComputeApiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS confComputeApiCtrlCmdSystemGetCapabilities_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_CAPABILITIES_PARAMS *pParams); +#define confComputeApiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define confComputeApiGetRefCount(pResource) confComputeApiGetRefCount_DISPATCH(pResource) +#define confComputeApiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define confComputeApiAddAdditionalDependants(pClient, pResource, pReference) confComputeApiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS confComputeApiCtrlCmdSystemGetCapabilities_DISPATCH(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_CAPABILITIES_PARAMS *pParams) { return pConfComputeApi->__confComputeApiCtrlCmdSystemGetCapabilities__(pConfComputeApi, pParams); } -NV_STATUS confComputeApiCtrlCmdSystemGetGpusState_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_GPUS_STATE_PARAMS *pParams); - static inline NV_STATUS confComputeApiCtrlCmdSystemGetGpusState_DISPATCH(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_GPUS_STATE_PARAMS *pParams) { return pConfComputeApi->__confComputeApiCtrlCmdSystemGetGpusState__(pConfComputeApi, pParams); } -NV_STATUS confComputeApiCtrlCmdSystemSetGpusState_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_SET_GPUS_STATE_PARAMS *pParams); - static inline NV_STATUS confComputeApiCtrlCmdSystemSetGpusState_DISPATCH(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_SET_GPUS_STATE_PARAMS *pParams) { return pConfComputeApi->__confComputeApiCtrlCmdSystemSetGpusState__(pConfComputeApi, pParams); } -NV_STATUS confComputeApiCtrlCmdGpuGetVidmemSize_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_VIDMEM_SIZE_PARAMS *pParams); - static inline NV_STATUS confComputeApiCtrlCmdGpuGetVidmemSize_DISPATCH(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_VIDMEM_SIZE_PARAMS *pParams) { return pConfComputeApi->__confComputeApiCtrlCmdGpuGetVidmemSize__(pConfComputeApi, pParams); } -NV_STATUS confComputeApiCtrlCmdGpuSetVidmemSize_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_GPU_SET_VIDMEM_SIZE_PARAMS *pParams); - static inline NV_STATUS confComputeApiCtrlCmdGpuSetVidmemSize_DISPATCH(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_GPU_SET_VIDMEM_SIZE_PARAMS *pParams) { return pConfComputeApi->__confComputeApiCtrlCmdGpuSetVidmemSize__(pConfComputeApi, pParams); } -NV_STATUS confComputeApiCtrlCmdGetGpuCertificate_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_GET_GPU_CERTIFICATE_PARAMS *pParams); - static inline NV_STATUS confComputeApiCtrlCmdGetGpuCertificate_DISPATCH(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_GET_GPU_CERTIFICATE_PARAMS *pParams) { return pConfComputeApi->__confComputeApiCtrlCmdGetGpuCertificate__(pConfComputeApi, pParams); } -NV_STATUS confComputeApiCtrlCmdGetGpuAttestationReport_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_GET_GPU_ATTESTATION_REPORT_PARAMS *pParams); - static inline NV_STATUS confComputeApiCtrlCmdGetGpuAttestationReport_DISPATCH(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_GET_GPU_ATTESTATION_REPORT_PARAMS *pParams) { return pConfComputeApi->__confComputeApiCtrlCmdGetGpuAttestationReport__(pConfComputeApi, pParams); } -NV_STATUS confComputeApiCtrlCmdGpuGetNumSecureChannels_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_NUM_SECURE_CHANNELS_PARAMS *pParams); - static inline NV_STATUS confComputeApiCtrlCmdGpuGetNumSecureChannels_DISPATCH(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_NUM_SECURE_CHANNELS_PARAMS *pParams) { return pConfComputeApi->__confComputeApiCtrlCmdGpuGetNumSecureChannels__(pConfComputeApi, pParams); } -NV_STATUS confComputeApiCtrlCmdSystemGetSecurityPolicy_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_GET_SECURITY_POLICY_PARAMS *pParams); - static inline NV_STATUS confComputeApiCtrlCmdSystemGetSecurityPolicy_DISPATCH(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_GET_SECURITY_POLICY_PARAMS *pParams) { return pConfComputeApi->__confComputeApiCtrlCmdSystemGetSecurityPolicy__(pConfComputeApi, pParams); } -NV_STATUS confComputeApiCtrlCmdSystemSetSecurityPolicy_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_SET_SECURITY_POLICY_PARAMS *pParams); - static inline NV_STATUS confComputeApiCtrlCmdSystemSetSecurityPolicy_DISPATCH(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_SET_SECURITY_POLICY_PARAMS *pParams) { return pConfComputeApi->__confComputeApiCtrlCmdSystemSetSecurityPolicy__(pConfComputeApi, pParams); } +static inline NvBool confComputeApiAccessCallback_DISPATCH(struct ConfidentialComputeApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__confComputeApiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +} + static inline NvBool confComputeApiShareCallback_DISPATCH(struct ConfidentialComputeApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return pResource->__confComputeApiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } +static inline NV_STATUS confComputeApiGetMemInterMapParams_DISPATCH(struct ConfidentialComputeApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__confComputeApiGetMemInterMapParams__(pRmResource, pParams); +} + static inline NV_STATUS confComputeApiCheckMemInterUnmap_DISPATCH(struct ConfidentialComputeApi *pRmResource, NvBool bSubdeviceHandleProvided) { return pRmResource->__confComputeApiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS confComputeApiControl_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__confComputeApiControl__(pResource, pCallContext, pParams); +static inline NV_STATUS confComputeApiGetMemoryMappingDescriptor_DISPATCH(struct ConfidentialComputeApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__confComputeApiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NV_STATUS confComputeApiGetMemInterMapParams_DISPATCH(struct ConfidentialComputeApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__confComputeApiGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS confComputeApiControlSerialization_Prologue_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__confComputeApiControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS confComputeApiGetMemoryMappingDescriptor_DISPATCH(struct ConfidentialComputeApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__confComputeApiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void confComputeApiControlSerialization_Epilogue_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__confComputeApiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NvU32 confComputeApiGetRefCount_DISPATCH(struct ConfidentialComputeApi *pResource) { - return pResource->__confComputeApiGetRefCount__(pResource); +static inline NV_STATUS confComputeApiControl_Prologue_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__confComputeApiControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS confComputeApiControlFilter_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__confComputeApiControlFilter__(pResource, pCallContext, pParams); +static inline void confComputeApiControl_Epilogue_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__confComputeApiControl_Epilogue__(pResource, pCallContext, pParams); } -static inline void confComputeApiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ConfidentialComputeApi *pResource, RsResourceRef *pReference) { - pResource->__confComputeApiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvBool confComputeApiCanCopy_DISPATCH(struct ConfidentialComputeApi *pResource) { + return pResource->__confComputeApiCanCopy__(pResource); } -static inline NV_STATUS confComputeApiControlSerialization_Prologue_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__confComputeApiControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS confComputeApiIsDuplicate_DISPATCH(struct ConfidentialComputeApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__confComputeApiIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS confComputeApiControl_Prologue_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__confComputeApiControl_Prologue__(pResource, pCallContext, pParams); +static inline void confComputeApiPreDestruct_DISPATCH(struct ConfidentialComputeApi *pResource) { + pResource->__confComputeApiPreDestruct__(pResource); } -static inline NvBool confComputeApiCanCopy_DISPATCH(struct ConfidentialComputeApi *pResource) { - return pResource->__confComputeApiCanCopy__(pResource); +static inline NV_STATUS confComputeApiControl_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__confComputeApiControl__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS confComputeApiControlFilter_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__confComputeApiControlFilter__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS confComputeApiMap_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__confComputeApiMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS confComputeApiUnmap_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { @@ -271,37 +321,41 @@ static inline NvBool confComputeApiIsPartialUnmapSupported_DISPATCH(struct Confi return pResource->__confComputeApiIsPartialUnmapSupported__(pResource); } -static inline void confComputeApiPreDestruct_DISPATCH(struct ConfidentialComputeApi *pResource) { - pResource->__confComputeApiPreDestruct__(pResource); -} - static inline NV_STATUS confComputeApiMapTo_DISPATCH(struct ConfidentialComputeApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return pResource->__confComputeApiMapTo__(pResource, pParams); } -static inline NV_STATUS confComputeApiIsDuplicate_DISPATCH(struct ConfidentialComputeApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__confComputeApiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS confComputeApiUnmapFrom_DISPATCH(struct ConfidentialComputeApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__confComputeApiUnmapFrom__(pResource, pParams); } -static inline void confComputeApiControlSerialization_Epilogue_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__confComputeApiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 confComputeApiGetRefCount_DISPATCH(struct ConfidentialComputeApi *pResource) { + return pResource->__confComputeApiGetRefCount__(pResource); } -static inline void confComputeApiControl_Epilogue_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__confComputeApiControl_Epilogue__(pResource, pCallContext, pParams); +static inline void confComputeApiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ConfidentialComputeApi *pResource, RsResourceRef *pReference) { + pResource->__confComputeApiAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NV_STATUS confComputeApiUnmapFrom_DISPATCH(struct ConfidentialComputeApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__confComputeApiUnmapFrom__(pResource, pParams); -} +NV_STATUS confComputeApiCtrlCmdSystemGetCapabilities_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_CAPABILITIES_PARAMS *pParams); -static inline NV_STATUS confComputeApiMap_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__confComputeApiMap__(pResource, pCallContext, pParams, pCpuMapping); -} +NV_STATUS confComputeApiCtrlCmdSystemGetGpusState_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_GPUS_STATE_PARAMS *pParams); -static inline NvBool confComputeApiAccessCallback_DISPATCH(struct ConfidentialComputeApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__confComputeApiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} +NV_STATUS confComputeApiCtrlCmdSystemSetGpusState_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_SET_GPUS_STATE_PARAMS *pParams); + +NV_STATUS confComputeApiCtrlCmdGpuGetVidmemSize_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_VIDMEM_SIZE_PARAMS *pParams); + +NV_STATUS confComputeApiCtrlCmdGpuSetVidmemSize_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_GPU_SET_VIDMEM_SIZE_PARAMS *pParams); + +NV_STATUS confComputeApiCtrlCmdGetGpuCertificate_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_GET_GPU_CERTIFICATE_PARAMS *pParams); + +NV_STATUS confComputeApiCtrlCmdGetGpuAttestationReport_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_GET_GPU_ATTESTATION_REPORT_PARAMS *pParams); + +NV_STATUS confComputeApiCtrlCmdGpuGetNumSecureChannels_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_NUM_SECURE_CHANNELS_PARAMS *pParams); + +NV_STATUS confComputeApiCtrlCmdSystemGetSecurityPolicy_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_GET_SECURITY_POLICY_PARAMS *pParams); + +NV_STATUS confComputeApiCtrlCmdSystemSetSecurityPolicy_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_SET_SECURITY_POLICY_PARAMS *pParams); NV_STATUS confComputeApiConstruct_IMPL(struct ConfidentialComputeApi *arg_pConfComputeApi, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_conf_compute_nvoc.c b/src/nvidia/generated/g_conf_compute_nvoc.c index f33d8d66f5..efd7da4649 100644 --- a/src/nvidia/generated/g_conf_compute_nvoc.c +++ b/src/nvidia/generated/g_conf_compute_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_ConfidentialCompute = /*pExportInfo=*/ &__nvoc_export_info_ConfidentialCompute }; -static NV_STATUS __nvoc_thunk_ConfidentialCompute_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute, ENGDESCRIPTOR engDesc) { - return confComputeConstructEngine(pGpu, (struct ConfidentialCompute *)(((unsigned char *)pConfCompute) - __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), engDesc); +// 5 down-thunk(s) defined to bridge methods in ConfidentialCompute from superclasses + +// confComputeConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_ConfidentialCompute_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute, ENGDESCRIPTOR engDesc) { + return confComputeConstructEngine(pGpu, (struct ConfidentialCompute *)(((unsigned char *) pConfCompute) - __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), engDesc); } -static NV_STATUS __nvoc_thunk_ConfidentialCompute_engstateStatePreInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute) { - return confComputeStatePreInitLocked(pGpu, (struct ConfidentialCompute *)(((unsigned char *)pConfCompute) - __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); +// confComputeStatePreInitLocked: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_ConfidentialCompute_engstateStatePreInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute) { + return confComputeStatePreInitLocked(pGpu, (struct ConfidentialCompute *)(((unsigned char *) pConfCompute) - __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_ConfidentialCompute_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute) { - return confComputeStateInitLocked(pGpu, (struct ConfidentialCompute *)(((unsigned char *)pConfCompute) - __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); +// confComputeStateInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_ConfidentialCompute_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute) { + return confComputeStateInitLocked(pGpu, (struct ConfidentialCompute *)(((unsigned char *) pConfCompute) - __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_ConfidentialCompute_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute, NvU32 flags) { - return confComputeStatePostLoad(pGpu, (struct ConfidentialCompute *)(((unsigned char *)pConfCompute) - __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), flags); +// confComputeStatePostLoad: virtual halified (2 hals) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_ConfidentialCompute_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute, NvU32 flags) { + return confComputeStatePostLoad(pGpu, (struct ConfidentialCompute *)(((unsigned char *) pConfCompute) - __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), flags); } -static NV_STATUS __nvoc_thunk_ConfidentialCompute_engstateStatePreUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute, NvU32 flags) { - return confComputeStatePreUnload(pGpu, (struct ConfidentialCompute *)(((unsigned char *)pConfCompute) - __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), flags); +// confComputeStatePreUnload: virtual halified (2 hals) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_ConfidentialCompute_engstateStatePreUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute, NvU32 flags) { + return confComputeStatePreUnload(pGpu, (struct ConfidentialCompute *)(((unsigned char *) pConfCompute) - __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), flags); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_confComputeStateLoad(POBJGPU pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg0) { - return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), arg0); + +// 9 up-thunk(s) defined to bridge methods in ConfidentialCompute to superclasses + +// confComputeInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_confComputeInitMissing(POBJGPU pGpu, struct ConfidentialCompute *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_confComputeStateUnload(POBJGPU pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg0) { - return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), arg0); +// confComputeStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStatePreInitUnlocked(POBJGPU pGpu, struct ConfidentialCompute *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_confComputeStatePreLoad(POBJGPU pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), arg0); +// confComputeStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStateInitUnlocked(POBJGPU pGpu, struct ConfidentialCompute *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_confComputeStatePostUnload(POBJGPU pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), arg0); +// confComputeStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStatePreLoad(POBJGPU pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_confComputeStateDestroy(POBJGPU pGpu, struct ConfidentialCompute *pEngstate) { - engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); +// confComputeStateLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStateLoad(POBJGPU pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3) { + return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_confComputeStateInitUnlocked(POBJGPU pGpu, struct ConfidentialCompute *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); +// confComputeStateUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStateUnload(POBJGPU pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3) { + return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_confComputeInitMissing(POBJGPU pGpu, struct ConfidentialCompute *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); +// confComputeStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStatePostUnload(POBJGPU pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_confComputeStatePreInitUnlocked(POBJGPU pGpu, struct ConfidentialCompute *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); +// confComputeStateDestroy: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_confComputeStateDestroy(POBJGPU pGpu, struct ConfidentialCompute *pEngstate) { + engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); } -static NvBool __nvoc_thunk_OBJENGSTATE_confComputeIsPresent(POBJGPU pGpu, struct ConfidentialCompute *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); +// confComputeIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_confComputeIsPresent(POBJGPU pGpu, struct ConfidentialCompute *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_ConfidentialCompute = { /*numEntries=*/ 0, @@ -165,6 +185,7 @@ void __nvoc_init_dataField_ConfidentialCompute(ConfidentialCompute *pThis, RmHal pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_SPDM_ENABLED, ((NvBool)(0 != 0))); pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_MULTI_GPU_PROTECTED_PCIE_MODE_ENABLED, ((NvBool)(0 != 0))); pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_ENABLED, ((NvBool)(0 != 0))); pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_DUMMY_KEY_ROTATION_ENABLED, ((NvBool)(0 != 0))); } @@ -182,6 +203,7 @@ NV_STATUS __nvoc_ctor_ConfidentialCompute(ConfidentialCompute *pThis, RmHalspecO return status; } +// Vtable initialization static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -194,9 +216,11 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); + // confComputeConstructEngine -- virtual override (engstate) base (engstate) pThis->__confComputeConstructEngine__ = &confComputeConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_ConfidentialCompute_engstateConstructEngine; - // Hal function -- confComputeDestruct + // confComputeDestruct -- halified (2 hals) override (engstate) base (engstate) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ { pThis->__confComputeDestruct__ = &confComputeDestruct_KERNEL; @@ -207,12 +231,15 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeDestruct__ = &confComputeDestruct_b3696a; } - // Hal function -- confComputeStatePreInitLocked + // confComputeStatePreInitLocked -- virtual halified (singleton optimized) override (engstate) base (engstate) body pThis->__confComputeStatePreInitLocked__ = &confComputeStatePreInitLocked_56cd7a; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_ConfidentialCompute_engstateStatePreInitLocked; + // confComputeStateInitLocked -- virtual override (engstate) base (engstate) pThis->__confComputeStateInitLocked__ = &confComputeStateInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_ConfidentialCompute_engstateStateInitLocked; - // Hal function -- confComputeStatePostLoad + // confComputeStatePostLoad -- virtual halified (2 hals) override (engstate) base (engstate) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ { pThis->__confComputeStatePostLoad__ = &confComputeStatePostLoad_IMPL; @@ -222,8 +249,9 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh { pThis->__confComputeStatePostLoad__ = &confComputeStatePostLoad_56cd7a; } + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_ConfidentialCompute_engstateStatePostLoad; - // Hal function -- confComputeStatePreUnload + // confComputeStatePreUnload -- virtual halified (2 hals) override (engstate) base (engstate) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ { pThis->__confComputeStatePreUnload__ = &confComputeStatePreUnload_KERNEL; @@ -233,8 +261,9 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh { pThis->__confComputeStatePreUnload__ = &confComputeStatePreUnload_56cd7a; } + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_ConfidentialCompute_engstateStatePreUnload; - // Hal function -- confComputeSetErrorState + // confComputeSetErrorState -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ { pThis->__confComputeSetErrorState__ = &confComputeSetErrorState_KERNEL; @@ -245,7 +274,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeSetErrorState__ = &confComputeSetErrorState_b3696a; } - // Hal function -- confComputeKeyStoreRetrieveViaChannel + // confComputeKeyStoreRetrieveViaChannel -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__confComputeKeyStoreRetrieveViaChannel__ = &confComputeKeyStoreRetrieveViaChannel_GH100; @@ -256,7 +285,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeKeyStoreRetrieveViaChannel__ = &confComputeKeyStoreRetrieveViaChannel_46f6a7; } - // Hal function -- confComputeKeyStoreRetrieveViaKeyId + // confComputeKeyStoreRetrieveViaKeyId -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__confComputeKeyStoreRetrieveViaKeyId__ = &confComputeKeyStoreRetrieveViaKeyId_GH100; @@ -267,7 +296,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeKeyStoreRetrieveViaKeyId__ = &confComputeKeyStoreRetrieveViaKeyId_46f6a7; } - // Hal function -- confComputeDeriveSecrets + // confComputeDeriveSecrets -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__confComputeDeriveSecrets__ = &confComputeDeriveSecrets_GH100; @@ -278,7 +307,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeDeriveSecrets__ = &confComputeDeriveSecrets_46f6a7; } - // Hal function -- confComputeUpdateSecrets + // confComputeUpdateSecrets -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__confComputeUpdateSecrets__ = &confComputeUpdateSecrets_GH100; @@ -289,7 +318,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeUpdateSecrets__ = &confComputeUpdateSecrets_46f6a7; } - // Hal function -- confComputeIsSpdmEnabled + // confComputeIsSpdmEnabled -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__confComputeIsSpdmEnabled__ = &confComputeIsSpdmEnabled_cbe027; @@ -300,7 +329,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeIsSpdmEnabled__ = &confComputeIsSpdmEnabled_491d52; } - // Hal function -- confComputeGetEngineIdFromKeySpace + // confComputeGetEngineIdFromKeySpace -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__confComputeGetEngineIdFromKeySpace__ = &confComputeGetEngineIdFromKeySpace_GH100; @@ -311,7 +340,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeGetEngineIdFromKeySpace__ = &confComputeGetEngineIdFromKeySpace_78ac8b; } - // Hal function -- confComputeGlobalKeyIsKernelPriv + // confComputeGlobalKeyIsKernelPriv -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__confComputeGlobalKeyIsKernelPriv__ = &confComputeGlobalKeyIsKernelPriv_GH100; @@ -322,7 +351,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeGlobalKeyIsKernelPriv__ = &confComputeGlobalKeyIsKernelPriv_491d52; } - // Hal function -- confComputeGetKeyPairByChannel + // confComputeGetKeyPairByChannel -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__confComputeGetKeyPairByChannel__ = &confComputeGetKeyPairByChannel_GH100; @@ -333,7 +362,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeGetKeyPairByChannel__ = &confComputeGetKeyPairByChannel_46f6a7; } - // Hal function -- confComputeTriggerKeyRotation + // confComputeTriggerKeyRotation -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__confComputeTriggerKeyRotation__ = &confComputeTriggerKeyRotation_46f6a7; @@ -351,7 +380,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh } } - // Hal function -- confComputeEnableKeyRotationCallback + // confComputeEnableKeyRotationCallback -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__confComputeEnableKeyRotationCallback__ = &confComputeEnableKeyRotationCallback_56cd7a; @@ -369,7 +398,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh } } - // Hal function -- confComputeEnableKeyRotationSupport + // confComputeEnableKeyRotationSupport -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__confComputeEnableKeyRotationSupport__ = &confComputeEnableKeyRotationSupport_56cd7a; @@ -387,7 +416,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh } } - // Hal function -- confComputeIsDebugModeEnabled + // confComputeIsDebugModeEnabled -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__confComputeIsDebugModeEnabled__ = &confComputeIsDebugModeEnabled_GH100; @@ -398,7 +427,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeIsDebugModeEnabled__ = &confComputeIsDebugModeEnabled_491d52; } - // Hal function -- confComputeIsGpuCcCapable + // confComputeIsGpuCcCapable -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__confComputeIsGpuCcCapable__ = &confComputeIsGpuCcCapable_GH100; @@ -409,7 +438,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeIsGpuCcCapable__ = &confComputeIsGpuCcCapable_491d52; } - // Hal function -- confComputeEstablishSpdmSessionAndKeys + // confComputeEstablishSpdmSessionAndKeys -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ { pThis->__confComputeEstablishSpdmSessionAndKeys__ = &confComputeEstablishSpdmSessionAndKeys_KERNEL; @@ -420,7 +449,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeEstablishSpdmSessionAndKeys__ = &confComputeEstablishSpdmSessionAndKeys_46f6a7; } - // Hal function -- confComputeKeyStoreDepositIvMask + // confComputeKeyStoreDepositIvMask -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__confComputeKeyStoreDepositIvMask__ = &confComputeKeyStoreDepositIvMask_GH100; @@ -431,7 +460,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeKeyStoreDepositIvMask__ = &confComputeKeyStoreDepositIvMask_b3696a; } - // Hal function -- confComputeKeyStoreInit + // confComputeKeyStoreInit -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__confComputeKeyStoreInit__ = &confComputeKeyStoreInit_GH100; @@ -442,7 +471,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeKeyStoreInit__ = &confComputeKeyStoreInit_46f6a7; } - // Hal function -- confComputeKeyStoreDeinit + // confComputeKeyStoreDeinit -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__confComputeKeyStoreDeinit__ = &confComputeKeyStoreDeinit_GH100; @@ -453,7 +482,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeKeyStoreDeinit__ = &confComputeKeyStoreDeinit_b3696a; } - // Hal function -- confComputeKeyStoreGetExportMasterKey + // confComputeKeyStoreGetExportMasterKey -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__confComputeKeyStoreGetExportMasterKey__ = &confComputeKeyStoreGetExportMasterKey_GH100; @@ -464,7 +493,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeKeyStoreGetExportMasterKey__ = &confComputeKeyStoreGetExportMasterKey_fa6e19; } - // Hal function -- confComputeKeyStoreDeriveKey + // confComputeKeyStoreDeriveKey -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__confComputeKeyStoreDeriveKey__ = &confComputeKeyStoreDeriveKey_GH100; @@ -475,7 +504,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeKeyStoreDeriveKey__ = &confComputeKeyStoreDeriveKey_46f6a7; } - // Hal function -- confComputeKeyStoreClearExportMasterKey + // confComputeKeyStoreClearExportMasterKey -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__confComputeKeyStoreClearExportMasterKey__ = &confComputeKeyStoreClearExportMasterKey_GH100; @@ -486,7 +515,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeKeyStoreClearExportMasterKey__ = &confComputeKeyStoreClearExportMasterKey_b3696a; } - // Hal function -- confComputeKeyStoreUpdateKey + // confComputeKeyStoreUpdateKey -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__confComputeKeyStoreUpdateKey__ = &confComputeKeyStoreUpdateKey_GH100; @@ -497,36 +526,39 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeKeyStoreUpdateKey__ = &confComputeKeyStoreUpdateKey_46f6a7; } - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_ConfidentialCompute_engstateConstructEngine; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_thunk_ConfidentialCompute_engstateStatePreInitLocked; + // confComputeInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__confComputeInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeInitMissing; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_thunk_ConfidentialCompute_engstateStateInitLocked; + // confComputeStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__confComputeStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStatePreInitUnlocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_thunk_ConfidentialCompute_engstateStatePostLoad; + // confComputeStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__confComputeStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStateInitUnlocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_thunk_ConfidentialCompute_engstateStatePreUnload; + // confComputeStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__confComputeStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStatePreLoad; - pThis->__confComputeStateLoad__ = &__nvoc_thunk_OBJENGSTATE_confComputeStateLoad; + // confComputeStateLoad -- virtual inherited (engstate) base (engstate) + pThis->__confComputeStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStateLoad; - pThis->__confComputeStateUnload__ = &__nvoc_thunk_OBJENGSTATE_confComputeStateUnload; + // confComputeStateUnload -- virtual inherited (engstate) base (engstate) + pThis->__confComputeStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStateUnload; - pThis->__confComputeStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_confComputeStatePreLoad; + // confComputeStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__confComputeStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStatePostUnload; - pThis->__confComputeStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_confComputeStatePostUnload; + // confComputeStateDestroy -- virtual inherited (engstate) base (engstate) + pThis->__confComputeStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStateDestroy; - pThis->__confComputeStateDestroy__ = &__nvoc_thunk_OBJENGSTATE_confComputeStateDestroy; + // confComputeIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__confComputeIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeIsPresent; +} // End __nvoc_init_funcTable_ConfidentialCompute_1 with approximately 70 basic block(s). - pThis->__confComputeStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_confComputeStateInitUnlocked; - - pThis->__confComputeInitMissing__ = &__nvoc_thunk_OBJENGSTATE_confComputeInitMissing; - - pThis->__confComputeStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_confComputeStatePreInitUnlocked; - - pThis->__confComputeIsPresent__ = &__nvoc_thunk_OBJENGSTATE_confComputeIsPresent; -} +// Initialize vtable(s) for 37 virtual method(s). void __nvoc_init_funcTable_ConfidentialCompute(ConfidentialCompute *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 37 per-object function pointer(s). __nvoc_init_funcTable_ConfidentialCompute_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_conf_compute_nvoc.h b/src/nvidia/generated/g_conf_compute_nvoc.h index ff3e30380a..0c49aad077 100644 --- a/src/nvidia/generated/g_conf_compute_nvoc.h +++ b/src/nvidia/generated/g_conf_compute_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_CONF_COMPUTE_NVOC_H_ #define _G_CONF_COMPUTE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_conf_compute_nvoc.h" #ifndef CONF_COMPUTE_H @@ -86,49 +94,60 @@ typedef struct #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct ConfidentialCompute { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct ConfidentialCompute *__nvoc_pbase_ConfidentialCompute; - NV_STATUS (*__confComputeConstructEngine__)(struct OBJGPU *, struct ConfidentialCompute *, ENGDESCRIPTOR); - void (*__confComputeDestruct__)(struct ConfidentialCompute *); - NV_STATUS (*__confComputeStatePreInitLocked__)(struct OBJGPU *, struct ConfidentialCompute *); - NV_STATUS (*__confComputeStateInitLocked__)(struct OBJGPU *, struct ConfidentialCompute *); - NV_STATUS (*__confComputeStatePostLoad__)(struct OBJGPU *, struct ConfidentialCompute *, NvU32); - NV_STATUS (*__confComputeStatePreUnload__)(struct OBJGPU *, struct ConfidentialCompute *, NvU32); - void (*__confComputeSetErrorState__)(struct OBJGPU *, struct ConfidentialCompute *); - NV_STATUS (*__confComputeKeyStoreRetrieveViaChannel__)(struct ConfidentialCompute *, struct KernelChannel *, ROTATE_IV_TYPE, NvBool, CC_KMB *); - NV_STATUS (*__confComputeKeyStoreRetrieveViaKeyId__)(struct ConfidentialCompute *, NvU32, ROTATE_IV_TYPE, NvBool, CC_KMB *); - NV_STATUS (*__confComputeDeriveSecrets__)(struct ConfidentialCompute *, NvU32); - NV_STATUS (*__confComputeUpdateSecrets__)(struct ConfidentialCompute *, NvU32); - NvBool (*__confComputeIsSpdmEnabled__)(struct OBJGPU *, struct ConfidentialCompute *); - RM_ENGINE_TYPE (*__confComputeGetEngineIdFromKeySpace__)(struct ConfidentialCompute *, NvU32); - NvBool (*__confComputeGlobalKeyIsKernelPriv__)(struct ConfidentialCompute *, NvU32); - NV_STATUS (*__confComputeGetKeyPairByChannel__)(struct OBJGPU *, struct ConfidentialCompute *, struct KernelChannel *, NvU32 *, NvU32 *); - NV_STATUS (*__confComputeTriggerKeyRotation__)(struct OBJGPU *, struct ConfidentialCompute *); - NV_STATUS (*__confComputeEnableKeyRotationCallback__)(struct OBJGPU *, struct ConfidentialCompute *, NvBool); - NV_STATUS (*__confComputeEnableKeyRotationSupport__)(struct OBJGPU *, struct ConfidentialCompute *); - NvBool (*__confComputeIsDebugModeEnabled__)(struct OBJGPU *, struct ConfidentialCompute *); - NvBool (*__confComputeIsGpuCcCapable__)(struct OBJGPU *, struct ConfidentialCompute *); - NV_STATUS (*__confComputeEstablishSpdmSessionAndKeys__)(struct OBJGPU *, struct ConfidentialCompute *); - void (*__confComputeKeyStoreDepositIvMask__)(struct ConfidentialCompute *, NvU32, void *); - NV_STATUS (*__confComputeKeyStoreInit__)(struct ConfidentialCompute *); - void (*__confComputeKeyStoreDeinit__)(struct ConfidentialCompute *); - void *(*__confComputeKeyStoreGetExportMasterKey__)(struct ConfidentialCompute *); - NV_STATUS (*__confComputeKeyStoreDeriveKey__)(struct ConfidentialCompute *, NvU32); - void (*__confComputeKeyStoreClearExportMasterKey__)(struct ConfidentialCompute *); - NV_STATUS (*__confComputeKeyStoreUpdateKey__)(struct ConfidentialCompute *, NvU32); - NV_STATUS (*__confComputeStateLoad__)(POBJGPU, struct ConfidentialCompute *, NvU32); - NV_STATUS (*__confComputeStateUnload__)(POBJGPU, struct ConfidentialCompute *, NvU32); - NV_STATUS (*__confComputeStatePreLoad__)(POBJGPU, struct ConfidentialCompute *, NvU32); - NV_STATUS (*__confComputeStatePostUnload__)(POBJGPU, struct ConfidentialCompute *, NvU32); - void (*__confComputeStateDestroy__)(POBJGPU, struct ConfidentialCompute *); - NV_STATUS (*__confComputeStateInitUnlocked__)(POBJGPU, struct ConfidentialCompute *); - void (*__confComputeInitMissing__)(POBJGPU, struct ConfidentialCompute *); - NV_STATUS (*__confComputeStatePreInitUnlocked__)(POBJGPU, struct ConfidentialCompute *); - NvBool (*__confComputeIsPresent__)(POBJGPU, struct ConfidentialCompute *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct ConfidentialCompute *__nvoc_pbase_ConfidentialCompute; // confCompute + + // Vtable with 37 per-object function pointers + NV_STATUS (*__confComputeConstructEngine__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + void (*__confComputeDestruct__)(struct ConfidentialCompute * /*this*/); // halified (2 hals) override (engstate) base (engstate) body + NV_STATUS (*__confComputeStatePreInitLocked__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__confComputeStateInitLocked__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__confComputeStatePostLoad__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/, NvU32); // virtual halified (2 hals) override (engstate) base (engstate) body + NV_STATUS (*__confComputeStatePreUnload__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/, NvU32); // virtual halified (2 hals) override (engstate) base (engstate) body + void (*__confComputeSetErrorState__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // halified (2 hals) body + NV_STATUS (*__confComputeKeyStoreRetrieveViaChannel__)(struct ConfidentialCompute * /*this*/, struct KernelChannel *, ROTATE_IV_TYPE, NvBool, CC_KMB *); // halified (2 hals) body + NV_STATUS (*__confComputeKeyStoreRetrieveViaKeyId__)(struct ConfidentialCompute * /*this*/, NvU32, ROTATE_IV_TYPE, NvBool, CC_KMB *); // halified (2 hals) body + NV_STATUS (*__confComputeDeriveSecrets__)(struct ConfidentialCompute * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__confComputeUpdateSecrets__)(struct ConfidentialCompute * /*this*/, NvU32); // halified (2 hals) body + NvBool (*__confComputeIsSpdmEnabled__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // halified (2 hals) body + RM_ENGINE_TYPE (*__confComputeGetEngineIdFromKeySpace__)(struct ConfidentialCompute * /*this*/, NvU32); // halified (2 hals) body + NvBool (*__confComputeGlobalKeyIsKernelPriv__)(struct ConfidentialCompute * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__confComputeGetKeyPairByChannel__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/, struct KernelChannel *, NvU32 *, NvU32 *); // halified (2 hals) body + NV_STATUS (*__confComputeTriggerKeyRotation__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // halified (3 hals) body + NV_STATUS (*__confComputeEnableKeyRotationCallback__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/, NvBool); // halified (3 hals) body + NV_STATUS (*__confComputeEnableKeyRotationSupport__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // halified (3 hals) body + NvBool (*__confComputeIsDebugModeEnabled__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // halified (2 hals) body + NvBool (*__confComputeIsGpuCcCapable__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // halified (2 hals) body + NV_STATUS (*__confComputeEstablishSpdmSessionAndKeys__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // halified (2 hals) body + void (*__confComputeKeyStoreDepositIvMask__)(struct ConfidentialCompute * /*this*/, NvU32, void *); // halified (2 hals) body + NV_STATUS (*__confComputeKeyStoreInit__)(struct ConfidentialCompute * /*this*/); // halified (2 hals) body + void (*__confComputeKeyStoreDeinit__)(struct ConfidentialCompute * /*this*/); // halified (2 hals) body + void * (*__confComputeKeyStoreGetExportMasterKey__)(struct ConfidentialCompute * /*this*/); // halified (2 hals) body + NV_STATUS (*__confComputeKeyStoreDeriveKey__)(struct ConfidentialCompute * /*this*/, NvU32); // halified (2 hals) body + void (*__confComputeKeyStoreClearExportMasterKey__)(struct ConfidentialCompute * /*this*/); // halified (2 hals) body + NV_STATUS (*__confComputeKeyStoreUpdateKey__)(struct ConfidentialCompute * /*this*/, NvU32); // halified (2 hals) body + void (*__confComputeInitMissing__)(POBJGPU, struct ConfidentialCompute * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__confComputeStatePreInitUnlocked__)(POBJGPU, struct ConfidentialCompute * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__confComputeStateInitUnlocked__)(POBJGPU, struct ConfidentialCompute * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__confComputeStatePreLoad__)(POBJGPU, struct ConfidentialCompute * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__confComputeStateLoad__)(POBJGPU, struct ConfidentialCompute * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__confComputeStateUnload__)(POBJGPU, struct ConfidentialCompute * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__confComputeStatePostUnload__)(POBJGPU, struct ConfidentialCompute * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__confComputeStateDestroy__)(POBJGPU, struct ConfidentialCompute * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__confComputeIsPresent__)(POBJGPU, struct ConfidentialCompute * /*this*/); // virtual inherited (engstate) base (engstate) + + // 12 PDB properties NvBool PDB_PROP_CONFCOMPUTE_ENABLED; NvBool PDB_PROP_CONFCOMPUTE_CC_FEATURE_ENABLED; NvBool PDB_PROP_CONFCOMPUTE_APM_FEATURE_ENABLED; @@ -138,7 +157,10 @@ struct ConfidentialCompute { NvBool PDB_PROP_CONFCOMPUTE_SPDM_ENABLED; NvBool PDB_PROP_CONFCOMPUTE_MULTI_GPU_PROTECTED_PCIE_MODE_ENABLED; NvBool PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED; + NvBool PDB_PROP_CONFCOMPUTE_KEY_ROTATION_ENABLED; NvBool PDB_PROP_CONFCOMPUTE_DUMMY_KEY_ROTATION_ENABLED; + + // Data members NvU32 gspProxyRegkeys; struct Spdm *pSpdm; NV2080_CTRL_INTERNAL_CONF_COMPUTE_GET_STATIC_INFO_PARAMS ccStaticInfo; @@ -147,8 +169,7 @@ struct ConfidentialCompute { struct ccslContext_t *pNonReplayableFaultCcslCtx; struct ccslContext_t *pReplayableFaultCcslCtx; struct ccslContext_t *pGspSec2RpcCcslCtx; - NvU32 keyRotationCallbackCount; - NvU32 keyRotationChannelRefCount; + NvU32 keyRotationCallbackCount[62]; NvBool bAcceptClientRequest; PTMR_EVENT pGspHeartbeatTimer; NvU32 heartbeatPeriodSec; @@ -162,6 +183,7 @@ struct ConfidentialCompute { KEY_ROTATION_STATS_INFO PRIVATE_FIELD(aggregateStats)[62]; KEY_ROTATION_STATS_INFO PRIVATE_FIELD(freedChannelAggregateStats)[62]; PTMR_EVENT PRIVATE_FIELD(ppKeyRotationTimer)[62]; + NvU32 PRIVATE_FIELD(keyRotationTimeout); NvU64 PRIVATE_FIELD(keyRotationLimitDelta); NvU64 PRIVATE_FIELD(keyRotationUpperLimit); NvU64 PRIVATE_FIELD(keyRotationLowerLimit); @@ -176,6 +198,7 @@ typedef struct ConfidentialCompute ConfidentialCompute; #define __nvoc_class_id_ConfidentialCompute 0x9798cc #endif /* __nvoc_class_id_ConfidentialCompute */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_ConfidentialCompute; #define __staticCast_ConfidentialCompute(pThis) \ @@ -188,8 +211,11 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_ConfidentialCompute; ((ConfidentialCompute*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(ConfidentialCompute))) #endif //__nvoc_conf_compute_h_disabled +// Property macros #define PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED_BASE_CAST #define PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED_BASE_NAME PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED +#define PDB_PROP_CONFCOMPUTE_KEY_ROTATION_ENABLED_BASE_CAST +#define PDB_PROP_CONFCOMPUTE_KEY_ROTATION_ENABLED_BASE_NAME PDB_PROP_CONFCOMPUTE_KEY_ROTATION_ENABLED #define PDB_PROP_CONFCOMPUTE_APM_FEATURE_ENABLED_BASE_CAST #define PDB_PROP_CONFCOMPUTE_APM_FEATURE_ENABLED_BASE_NAME PDB_PROP_CONFCOMPUTE_APM_FEATURE_ENABLED #define PDB_PROP_CONFCOMPUTE_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. @@ -217,122 +243,275 @@ NV_STATUS __nvoc_objCreate_ConfidentialCompute(ConfidentialCompute**, Dynamic*, #define __objCreate_ConfidentialCompute(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_ConfidentialCompute((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define confComputeConstructEngine_FNPTR(pConfCompute) pConfCompute->__confComputeConstructEngine__ #define confComputeConstructEngine(pGpu, pConfCompute, engDesc) confComputeConstructEngine_DISPATCH(pGpu, pConfCompute, engDesc) +#define confComputeDestruct_FNPTR(pConfCompute) pConfCompute->__confComputeDestruct__ #define __nvoc_confComputeDestruct(pConfCompute) confComputeDestruct_DISPATCH(pConfCompute) +#define confComputeStatePreInitLocked_FNPTR(pConfCompute) pConfCompute->__confComputeStatePreInitLocked__ #define confComputeStatePreInitLocked(pGpu, pConfCompute) confComputeStatePreInitLocked_DISPATCH(pGpu, pConfCompute) #define confComputeStatePreInitLocked_HAL(pGpu, pConfCompute) confComputeStatePreInitLocked_DISPATCH(pGpu, pConfCompute) +#define confComputeStateInitLocked_FNPTR(pConfCompute) pConfCompute->__confComputeStateInitLocked__ #define confComputeStateInitLocked(pGpu, pConfCompute) confComputeStateInitLocked_DISPATCH(pGpu, pConfCompute) +#define confComputeStatePostLoad_FNPTR(pConfCompute) pConfCompute->__confComputeStatePostLoad__ #define confComputeStatePostLoad(pGpu, pConfCompute, flags) confComputeStatePostLoad_DISPATCH(pGpu, pConfCompute, flags) #define confComputeStatePostLoad_HAL(pGpu, pConfCompute, flags) confComputeStatePostLoad_DISPATCH(pGpu, pConfCompute, flags) +#define confComputeStatePreUnload_FNPTR(pConfCompute) pConfCompute->__confComputeStatePreUnload__ #define confComputeStatePreUnload(pGpu, pConfCompute, flags) confComputeStatePreUnload_DISPATCH(pGpu, pConfCompute, flags) #define confComputeStatePreUnload_HAL(pGpu, pConfCompute, flags) confComputeStatePreUnload_DISPATCH(pGpu, pConfCompute, flags) +#define confComputeSetErrorState_FNPTR(pConfCompute) pConfCompute->__confComputeSetErrorState__ #define confComputeSetErrorState(pGpu, pConfCompute) confComputeSetErrorState_DISPATCH(pGpu, pConfCompute) #define confComputeSetErrorState_HAL(pGpu, pConfCompute) confComputeSetErrorState_DISPATCH(pGpu, pConfCompute) +#define confComputeKeyStoreRetrieveViaChannel_FNPTR(pConfCompute) pConfCompute->__confComputeKeyStoreRetrieveViaChannel__ #define confComputeKeyStoreRetrieveViaChannel(pConfCompute, pKernelChannel, rotateOperation, bIncludeIvOrNonce, keyMaterialBundle) confComputeKeyStoreRetrieveViaChannel_DISPATCH(pConfCompute, pKernelChannel, rotateOperation, bIncludeIvOrNonce, keyMaterialBundle) #define confComputeKeyStoreRetrieveViaChannel_HAL(pConfCompute, pKernelChannel, rotateOperation, bIncludeIvOrNonce, keyMaterialBundle) confComputeKeyStoreRetrieveViaChannel_DISPATCH(pConfCompute, pKernelChannel, rotateOperation, bIncludeIvOrNonce, keyMaterialBundle) +#define confComputeKeyStoreRetrieveViaKeyId_FNPTR(pConfCompute) pConfCompute->__confComputeKeyStoreRetrieveViaKeyId__ #define confComputeKeyStoreRetrieveViaKeyId(pConfCompute, globalKeyId, rotateOperation, bIncludeIvOrNonce, keyMaterialBundle) confComputeKeyStoreRetrieveViaKeyId_DISPATCH(pConfCompute, globalKeyId, rotateOperation, bIncludeIvOrNonce, keyMaterialBundle) #define confComputeKeyStoreRetrieveViaKeyId_HAL(pConfCompute, globalKeyId, rotateOperation, bIncludeIvOrNonce, keyMaterialBundle) confComputeKeyStoreRetrieveViaKeyId_DISPATCH(pConfCompute, globalKeyId, rotateOperation, bIncludeIvOrNonce, keyMaterialBundle) +#define confComputeDeriveSecrets_FNPTR(pConfCompute) pConfCompute->__confComputeDeriveSecrets__ #define confComputeDeriveSecrets(pConfCompute, engine) confComputeDeriveSecrets_DISPATCH(pConfCompute, engine) #define confComputeDeriveSecrets_HAL(pConfCompute, engine) confComputeDeriveSecrets_DISPATCH(pConfCompute, engine) +#define confComputeUpdateSecrets_FNPTR(pConfCompute) pConfCompute->__confComputeUpdateSecrets__ #define confComputeUpdateSecrets(pConfCompute, globalKeyId) confComputeUpdateSecrets_DISPATCH(pConfCompute, globalKeyId) #define confComputeUpdateSecrets_HAL(pConfCompute, globalKeyId) confComputeUpdateSecrets_DISPATCH(pConfCompute, globalKeyId) +#define confComputeIsSpdmEnabled_FNPTR(pConfCompute) pConfCompute->__confComputeIsSpdmEnabled__ #define confComputeIsSpdmEnabled(pGpu, pConfCompute) confComputeIsSpdmEnabled_DISPATCH(pGpu, pConfCompute) #define confComputeIsSpdmEnabled_HAL(pGpu, pConfCompute) confComputeIsSpdmEnabled_DISPATCH(pGpu, pConfCompute) +#define confComputeGetEngineIdFromKeySpace_FNPTR(pConfCompute) pConfCompute->__confComputeGetEngineIdFromKeySpace__ #define confComputeGetEngineIdFromKeySpace(pConfCompute, keySpace) confComputeGetEngineIdFromKeySpace_DISPATCH(pConfCompute, keySpace) #define confComputeGetEngineIdFromKeySpace_HAL(pConfCompute, keySpace) confComputeGetEngineIdFromKeySpace_DISPATCH(pConfCompute, keySpace) +#define confComputeGlobalKeyIsKernelPriv_FNPTR(pConfCompute) pConfCompute->__confComputeGlobalKeyIsKernelPriv__ #define confComputeGlobalKeyIsKernelPriv(pConfCompute, keyId) confComputeGlobalKeyIsKernelPriv_DISPATCH(pConfCompute, keyId) #define confComputeGlobalKeyIsKernelPriv_HAL(pConfCompute, keyId) confComputeGlobalKeyIsKernelPriv_DISPATCH(pConfCompute, keyId) +#define confComputeGetKeyPairByChannel_FNPTR(pConfCompute) pConfCompute->__confComputeGetKeyPairByChannel__ #define confComputeGetKeyPairByChannel(pGpu, pConfCompute, pKernelChannel, pH2DKey, pD2HKey) confComputeGetKeyPairByChannel_DISPATCH(pGpu, pConfCompute, pKernelChannel, pH2DKey, pD2HKey) #define confComputeGetKeyPairByChannel_HAL(pGpu, pConfCompute, pKernelChannel, pH2DKey, pD2HKey) confComputeGetKeyPairByChannel_DISPATCH(pGpu, pConfCompute, pKernelChannel, pH2DKey, pD2HKey) +#define confComputeTriggerKeyRotation_FNPTR(pConfCompute) pConfCompute->__confComputeTriggerKeyRotation__ #define confComputeTriggerKeyRotation(pGpu, pConfCompute) confComputeTriggerKeyRotation_DISPATCH(pGpu, pConfCompute) #define confComputeTriggerKeyRotation_HAL(pGpu, pConfCompute) confComputeTriggerKeyRotation_DISPATCH(pGpu, pConfCompute) +#define confComputeEnableKeyRotationCallback_FNPTR(pConfCompute) pConfCompute->__confComputeEnableKeyRotationCallback__ #define confComputeEnableKeyRotationCallback(pGpu, pConfCompute, bEnable) confComputeEnableKeyRotationCallback_DISPATCH(pGpu, pConfCompute, bEnable) #define confComputeEnableKeyRotationCallback_HAL(pGpu, pConfCompute, bEnable) confComputeEnableKeyRotationCallback_DISPATCH(pGpu, pConfCompute, bEnable) +#define confComputeEnableKeyRotationSupport_FNPTR(pConfCompute) pConfCompute->__confComputeEnableKeyRotationSupport__ #define confComputeEnableKeyRotationSupport(pGpu, pConfCompute) confComputeEnableKeyRotationSupport_DISPATCH(pGpu, pConfCompute) #define confComputeEnableKeyRotationSupport_HAL(pGpu, pConfCompute) confComputeEnableKeyRotationSupport_DISPATCH(pGpu, pConfCompute) +#define confComputeIsDebugModeEnabled_FNPTR(pConfCompute) pConfCompute->__confComputeIsDebugModeEnabled__ #define confComputeIsDebugModeEnabled(pGpu, pConfCompute) confComputeIsDebugModeEnabled_DISPATCH(pGpu, pConfCompute) #define confComputeIsDebugModeEnabled_HAL(pGpu, pConfCompute) confComputeIsDebugModeEnabled_DISPATCH(pGpu, pConfCompute) +#define confComputeIsGpuCcCapable_FNPTR(pConfCompute) pConfCompute->__confComputeIsGpuCcCapable__ #define confComputeIsGpuCcCapable(pGpu, pConfCompute) confComputeIsGpuCcCapable_DISPATCH(pGpu, pConfCompute) #define confComputeIsGpuCcCapable_HAL(pGpu, pConfCompute) confComputeIsGpuCcCapable_DISPATCH(pGpu, pConfCompute) +#define confComputeEstablishSpdmSessionAndKeys_FNPTR(pConfCompute) pConfCompute->__confComputeEstablishSpdmSessionAndKeys__ #define confComputeEstablishSpdmSessionAndKeys(pGpu, pConfCompute) confComputeEstablishSpdmSessionAndKeys_DISPATCH(pGpu, pConfCompute) #define confComputeEstablishSpdmSessionAndKeys_HAL(pGpu, pConfCompute) confComputeEstablishSpdmSessionAndKeys_DISPATCH(pGpu, pConfCompute) +#define confComputeKeyStoreDepositIvMask_FNPTR(pConfCompute) pConfCompute->__confComputeKeyStoreDepositIvMask__ #define confComputeKeyStoreDepositIvMask(pConfCompute, globalKeyId, ivMask) confComputeKeyStoreDepositIvMask_DISPATCH(pConfCompute, globalKeyId, ivMask) #define confComputeKeyStoreDepositIvMask_HAL(pConfCompute, globalKeyId, ivMask) confComputeKeyStoreDepositIvMask_DISPATCH(pConfCompute, globalKeyId, ivMask) +#define confComputeKeyStoreInit_FNPTR(pConfCompute) pConfCompute->__confComputeKeyStoreInit__ #define confComputeKeyStoreInit(pConfCompute) confComputeKeyStoreInit_DISPATCH(pConfCompute) #define confComputeKeyStoreInit_HAL(pConfCompute) confComputeKeyStoreInit_DISPATCH(pConfCompute) +#define confComputeKeyStoreDeinit_FNPTR(pConfCompute) pConfCompute->__confComputeKeyStoreDeinit__ #define confComputeKeyStoreDeinit(pConfCompute) confComputeKeyStoreDeinit_DISPATCH(pConfCompute) #define confComputeKeyStoreDeinit_HAL(pConfCompute) confComputeKeyStoreDeinit_DISPATCH(pConfCompute) +#define confComputeKeyStoreGetExportMasterKey_FNPTR(pConfCompute) pConfCompute->__confComputeKeyStoreGetExportMasterKey__ #define confComputeKeyStoreGetExportMasterKey(pConfCompute) confComputeKeyStoreGetExportMasterKey_DISPATCH(pConfCompute) #define confComputeKeyStoreGetExportMasterKey_HAL(pConfCompute) confComputeKeyStoreGetExportMasterKey_DISPATCH(pConfCompute) +#define confComputeKeyStoreDeriveKey_FNPTR(pConfCompute) pConfCompute->__confComputeKeyStoreDeriveKey__ #define confComputeKeyStoreDeriveKey(pConfCompute, globalKeyId) confComputeKeyStoreDeriveKey_DISPATCH(pConfCompute, globalKeyId) #define confComputeKeyStoreDeriveKey_HAL(pConfCompute, globalKeyId) confComputeKeyStoreDeriveKey_DISPATCH(pConfCompute, globalKeyId) +#define confComputeKeyStoreClearExportMasterKey_FNPTR(pConfCompute) pConfCompute->__confComputeKeyStoreClearExportMasterKey__ #define confComputeKeyStoreClearExportMasterKey(pConfCompute) confComputeKeyStoreClearExportMasterKey_DISPATCH(pConfCompute) #define confComputeKeyStoreClearExportMasterKey_HAL(pConfCompute) confComputeKeyStoreClearExportMasterKey_DISPATCH(pConfCompute) +#define confComputeKeyStoreUpdateKey_FNPTR(pConfCompute) pConfCompute->__confComputeKeyStoreUpdateKey__ #define confComputeKeyStoreUpdateKey(pConfCompute, globalKeyId) confComputeKeyStoreUpdateKey_DISPATCH(pConfCompute, globalKeyId) #define confComputeKeyStoreUpdateKey_HAL(pConfCompute, globalKeyId) confComputeKeyStoreUpdateKey_DISPATCH(pConfCompute, globalKeyId) -#define confComputeStateLoad(pGpu, pEngstate, arg0) confComputeStateLoad_DISPATCH(pGpu, pEngstate, arg0) -#define confComputeStateUnload(pGpu, pEngstate, arg0) confComputeStateUnload_DISPATCH(pGpu, pEngstate, arg0) -#define confComputeStatePreLoad(pGpu, pEngstate, arg0) confComputeStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define confComputeStatePostUnload(pGpu, pEngstate, arg0) confComputeStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define confComputeStateDestroy(pGpu, pEngstate) confComputeStateDestroy_DISPATCH(pGpu, pEngstate) -#define confComputeStateInitUnlocked(pGpu, pEngstate) confComputeStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define confComputeInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define confComputeInitMissing(pGpu, pEngstate) confComputeInitMissing_DISPATCH(pGpu, pEngstate) +#define confComputeStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define confComputeStatePreInitUnlocked(pGpu, pEngstate) confComputeStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) +#define confComputeStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define confComputeStateInitUnlocked(pGpu, pEngstate) confComputeStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define confComputeStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define confComputeStatePreLoad(pGpu, pEngstate, arg3) confComputeStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define confComputeStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define confComputeStateLoad(pGpu, pEngstate, arg3) confComputeStateLoad_DISPATCH(pGpu, pEngstate, arg3) +#define confComputeStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define confComputeStateUnload(pGpu, pEngstate, arg3) confComputeStateUnload_DISPATCH(pGpu, pEngstate, arg3) +#define confComputeStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define confComputeStatePostUnload(pGpu, pEngstate, arg3) confComputeStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define confComputeStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define confComputeStateDestroy(pGpu, pEngstate) confComputeStateDestroy_DISPATCH(pGpu, pEngstate) +#define confComputeIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define confComputeIsPresent(pGpu, pEngstate) confComputeIsPresent_DISPATCH(pGpu, pEngstate) -static inline NV_STATUS confComputeEarlyInit_56cd7a(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { - return NV_OK; + +// Dispatch functions +static inline NV_STATUS confComputeConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, ENGDESCRIPTOR engDesc) { + return pConfCompute->__confComputeConstructEngine__(pGpu, pConfCompute, engDesc); } +static inline void confComputeDestruct_DISPATCH(struct ConfidentialCompute *pConfCompute) { + pConfCompute->__confComputeDestruct__(pConfCompute); +} -#ifdef __nvoc_conf_compute_h_disabled -static inline NV_STATUS confComputeEarlyInit(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { - NV_ASSERT_FAILED_PRECOMP("ConfidentialCompute was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS confComputeStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { + return pConfCompute->__confComputeStatePreInitLocked__(pGpu, pConfCompute); } -#else //__nvoc_conf_compute_h_disabled -#define confComputeEarlyInit(pGpu, pConfCompute) confComputeEarlyInit_56cd7a(pGpu, pConfCompute) -#endif //__nvoc_conf_compute_h_disabled -#define confComputeEarlyInit_HAL(pGpu, pConfCompute) confComputeEarlyInit(pGpu, pConfCompute) +static inline NV_STATUS confComputeStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { + return pConfCompute->__confComputeStateInitLocked__(pGpu, pConfCompute); +} -NV_STATUS confComputeConstructEngine_IMPL(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, ENGDESCRIPTOR engDesc); +static inline NV_STATUS confComputeStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvU32 flags) { + return pConfCompute->__confComputeStatePostLoad__(pGpu, pConfCompute, flags); +} -static inline NV_STATUS confComputeConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, ENGDESCRIPTOR engDesc) { - return pConfCompute->__confComputeConstructEngine__(pGpu, pConfCompute, engDesc); +static inline NV_STATUS confComputeStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvU32 flags) { + return pConfCompute->__confComputeStatePreUnload__(pGpu, pConfCompute, flags); } -void confComputeDestruct_KERNEL(struct ConfidentialCompute *pConfCompute); +static inline void confComputeSetErrorState_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { + pConfCompute->__confComputeSetErrorState__(pGpu, pConfCompute); +} -static inline void confComputeDestruct_b3696a(struct ConfidentialCompute *pConfCompute) { - return; +static inline NV_STATUS confComputeKeyStoreRetrieveViaChannel_DISPATCH(struct ConfidentialCompute *pConfCompute, struct KernelChannel *pKernelChannel, ROTATE_IV_TYPE rotateOperation, NvBool bIncludeIvOrNonce, CC_KMB *keyMaterialBundle) { + return pConfCompute->__confComputeKeyStoreRetrieveViaChannel__(pConfCompute, pKernelChannel, rotateOperation, bIncludeIvOrNonce, keyMaterialBundle); } -static inline void confComputeDestruct_DISPATCH(struct ConfidentialCompute *pConfCompute) { - pConfCompute->__confComputeDestruct__(pConfCompute); +static inline NV_STATUS confComputeKeyStoreRetrieveViaKeyId_DISPATCH(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId, ROTATE_IV_TYPE rotateOperation, NvBool bIncludeIvOrNonce, CC_KMB *keyMaterialBundle) { + return pConfCompute->__confComputeKeyStoreRetrieveViaKeyId__(pConfCompute, globalKeyId, rotateOperation, bIncludeIvOrNonce, keyMaterialBundle); } -static inline NV_STATUS confComputeStatePreInitLocked_56cd7a(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { - return NV_OK; +static inline NV_STATUS confComputeDeriveSecrets_DISPATCH(struct ConfidentialCompute *pConfCompute, NvU32 engine) { + return pConfCompute->__confComputeDeriveSecrets__(pConfCompute, engine); } -static inline NV_STATUS confComputeStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { - return pConfCompute->__confComputeStatePreInitLocked__(pGpu, pConfCompute); +static inline NV_STATUS confComputeUpdateSecrets_DISPATCH(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId) { + return pConfCompute->__confComputeUpdateSecrets__(pConfCompute, globalKeyId); } -NV_STATUS confComputeStateInitLocked_IMPL(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute); +static inline NvBool confComputeIsSpdmEnabled_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { + return pConfCompute->__confComputeIsSpdmEnabled__(pGpu, pConfCompute); +} -static inline NV_STATUS confComputeStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { - return pConfCompute->__confComputeStateInitLocked__(pGpu, pConfCompute); +static inline RM_ENGINE_TYPE confComputeGetEngineIdFromKeySpace_DISPATCH(struct ConfidentialCompute *pConfCompute, NvU32 keySpace) { + return pConfCompute->__confComputeGetEngineIdFromKeySpace__(pConfCompute, keySpace); } -NV_STATUS confComputeStatePostLoad_IMPL(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvU32 flags); +static inline NvBool confComputeGlobalKeyIsKernelPriv_DISPATCH(struct ConfidentialCompute *pConfCompute, NvU32 keyId) { + return pConfCompute->__confComputeGlobalKeyIsKernelPriv__(pConfCompute, keyId); +} -static inline NV_STATUS confComputeStatePostLoad_56cd7a(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvU32 flags) { +static inline NV_STATUS confComputeGetKeyPairByChannel_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, struct KernelChannel *pKernelChannel, NvU32 *pH2DKey, NvU32 *pD2HKey) { + return pConfCompute->__confComputeGetKeyPairByChannel__(pGpu, pConfCompute, pKernelChannel, pH2DKey, pD2HKey); +} + +static inline NV_STATUS confComputeTriggerKeyRotation_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { + return pConfCompute->__confComputeTriggerKeyRotation__(pGpu, pConfCompute); +} + +static inline NV_STATUS confComputeEnableKeyRotationCallback_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvBool bEnable) { + return pConfCompute->__confComputeEnableKeyRotationCallback__(pGpu, pConfCompute, bEnable); +} + +static inline NV_STATUS confComputeEnableKeyRotationSupport_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { + return pConfCompute->__confComputeEnableKeyRotationSupport__(pGpu, pConfCompute); +} + +static inline NvBool confComputeIsDebugModeEnabled_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { + return pConfCompute->__confComputeIsDebugModeEnabled__(pGpu, pConfCompute); +} + +static inline NvBool confComputeIsGpuCcCapable_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { + return pConfCompute->__confComputeIsGpuCcCapable__(pGpu, pConfCompute); +} + +static inline NV_STATUS confComputeEstablishSpdmSessionAndKeys_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { + return pConfCompute->__confComputeEstablishSpdmSessionAndKeys__(pGpu, pConfCompute); +} + +static inline void confComputeKeyStoreDepositIvMask_DISPATCH(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId, void *ivMask) { + pConfCompute->__confComputeKeyStoreDepositIvMask__(pConfCompute, globalKeyId, ivMask); +} + +static inline NV_STATUS confComputeKeyStoreInit_DISPATCH(struct ConfidentialCompute *pConfCompute) { + return pConfCompute->__confComputeKeyStoreInit__(pConfCompute); +} + +static inline void confComputeKeyStoreDeinit_DISPATCH(struct ConfidentialCompute *pConfCompute) { + pConfCompute->__confComputeKeyStoreDeinit__(pConfCompute); +} + +static inline void * confComputeKeyStoreGetExportMasterKey_DISPATCH(struct ConfidentialCompute *pConfCompute) { + return pConfCompute->__confComputeKeyStoreGetExportMasterKey__(pConfCompute); +} + +static inline NV_STATUS confComputeKeyStoreDeriveKey_DISPATCH(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId) { + return pConfCompute->__confComputeKeyStoreDeriveKey__(pConfCompute, globalKeyId); +} + +static inline void confComputeKeyStoreClearExportMasterKey_DISPATCH(struct ConfidentialCompute *pConfCompute) { + pConfCompute->__confComputeKeyStoreClearExportMasterKey__(pConfCompute); +} + +static inline NV_STATUS confComputeKeyStoreUpdateKey_DISPATCH(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId) { + return pConfCompute->__confComputeKeyStoreUpdateKey__(pConfCompute, globalKeyId); +} + +static inline void confComputeInitMissing_DISPATCH(POBJGPU pGpu, struct ConfidentialCompute *pEngstate) { + pEngstate->__confComputeInitMissing__(pGpu, pEngstate); +} + +static inline NV_STATUS confComputeStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct ConfidentialCompute *pEngstate) { + return pEngstate->__confComputeStatePreInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS confComputeStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct ConfidentialCompute *pEngstate) { + return pEngstate->__confComputeStateInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS confComputeStatePreLoad_DISPATCH(POBJGPU pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3) { + return pEngstate->__confComputeStatePreLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS confComputeStateLoad_DISPATCH(POBJGPU pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3) { + return pEngstate->__confComputeStateLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS confComputeStateUnload_DISPATCH(POBJGPU pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3) { + return pEngstate->__confComputeStateUnload__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS confComputeStatePostUnload_DISPATCH(POBJGPU pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3) { + return pEngstate->__confComputeStatePostUnload__(pGpu, pEngstate, arg3); +} + +static inline void confComputeStateDestroy_DISPATCH(POBJGPU pGpu, struct ConfidentialCompute *pEngstate) { + pEngstate->__confComputeStateDestroy__(pGpu, pEngstate); +} + +static inline NvBool confComputeIsPresent_DISPATCH(POBJGPU pGpu, struct ConfidentialCompute *pEngstate) { + return pEngstate->__confComputeIsPresent__(pGpu, pEngstate); +} + +NV_STATUS confComputeConstructEngine_IMPL(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, ENGDESCRIPTOR engDesc); + +void confComputeDestruct_KERNEL(struct ConfidentialCompute *pConfCompute); + +static inline void confComputeDestruct_b3696a(struct ConfidentialCompute *pConfCompute) { + return; +} + +static inline NV_STATUS confComputeStatePreInitLocked_56cd7a(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { return NV_OK; } -static inline NV_STATUS confComputeStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvU32 flags) { - return pConfCompute->__confComputeStatePostLoad__(pGpu, pConfCompute, flags); +NV_STATUS confComputeStateInitLocked_IMPL(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute); + +NV_STATUS confComputeStatePostLoad_IMPL(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvU32 flags); + +static inline NV_STATUS confComputeStatePostLoad_56cd7a(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvU32 flags) { + return NV_OK; } NV_STATUS confComputeStatePreUnload_KERNEL(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvU32 flags); @@ -341,60 +520,36 @@ static inline NV_STATUS confComputeStatePreUnload_56cd7a(struct OBJGPU *pGpu, st return NV_OK; } -static inline NV_STATUS confComputeStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvU32 flags) { - return pConfCompute->__confComputeStatePreUnload__(pGpu, pConfCompute, flags); -} - void confComputeSetErrorState_KERNEL(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute); static inline void confComputeSetErrorState_b3696a(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { return; } -static inline void confComputeSetErrorState_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { - pConfCompute->__confComputeSetErrorState__(pGpu, pConfCompute); -} - NV_STATUS confComputeKeyStoreRetrieveViaChannel_GH100(struct ConfidentialCompute *pConfCompute, struct KernelChannel *pKernelChannel, ROTATE_IV_TYPE rotateOperation, NvBool bIncludeIvOrNonce, CC_KMB *keyMaterialBundle); static inline NV_STATUS confComputeKeyStoreRetrieveViaChannel_46f6a7(struct ConfidentialCompute *pConfCompute, struct KernelChannel *pKernelChannel, ROTATE_IV_TYPE rotateOperation, NvBool bIncludeIvOrNonce, CC_KMB *keyMaterialBundle) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS confComputeKeyStoreRetrieveViaChannel_DISPATCH(struct ConfidentialCompute *pConfCompute, struct KernelChannel *pKernelChannel, ROTATE_IV_TYPE rotateOperation, NvBool bIncludeIvOrNonce, CC_KMB *keyMaterialBundle) { - return pConfCompute->__confComputeKeyStoreRetrieveViaChannel__(pConfCompute, pKernelChannel, rotateOperation, bIncludeIvOrNonce, keyMaterialBundle); -} - NV_STATUS confComputeKeyStoreRetrieveViaKeyId_GH100(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId, ROTATE_IV_TYPE rotateOperation, NvBool bIncludeIvOrNonce, CC_KMB *keyMaterialBundle); static inline NV_STATUS confComputeKeyStoreRetrieveViaKeyId_46f6a7(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId, ROTATE_IV_TYPE rotateOperation, NvBool bIncludeIvOrNonce, CC_KMB *keyMaterialBundle) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS confComputeKeyStoreRetrieveViaKeyId_DISPATCH(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId, ROTATE_IV_TYPE rotateOperation, NvBool bIncludeIvOrNonce, CC_KMB *keyMaterialBundle) { - return pConfCompute->__confComputeKeyStoreRetrieveViaKeyId__(pConfCompute, globalKeyId, rotateOperation, bIncludeIvOrNonce, keyMaterialBundle); -} - NV_STATUS confComputeDeriveSecrets_GH100(struct ConfidentialCompute *pConfCompute, NvU32 engine); static inline NV_STATUS confComputeDeriveSecrets_46f6a7(struct ConfidentialCompute *pConfCompute, NvU32 engine) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS confComputeDeriveSecrets_DISPATCH(struct ConfidentialCompute *pConfCompute, NvU32 engine) { - return pConfCompute->__confComputeDeriveSecrets__(pConfCompute, engine); -} - NV_STATUS confComputeUpdateSecrets_GH100(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId); static inline NV_STATUS confComputeUpdateSecrets_46f6a7(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS confComputeUpdateSecrets_DISPATCH(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId) { - return pConfCompute->__confComputeUpdateSecrets__(pConfCompute, globalKeyId); -} - static inline NvBool confComputeIsSpdmEnabled_cbe027(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { return ((NvBool)(0 == 0)); } @@ -403,40 +558,24 @@ static inline NvBool confComputeIsSpdmEnabled_491d52(struct OBJGPU *pGpu, struct return ((NvBool)(0 != 0)); } -static inline NvBool confComputeIsSpdmEnabled_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { - return pConfCompute->__confComputeIsSpdmEnabled__(pGpu, pConfCompute); -} - RM_ENGINE_TYPE confComputeGetEngineIdFromKeySpace_GH100(struct ConfidentialCompute *pConfCompute, NvU32 keySpace); static inline RM_ENGINE_TYPE confComputeGetEngineIdFromKeySpace_78ac8b(struct ConfidentialCompute *pConfCompute, NvU32 keySpace) { return RM_ENGINE_TYPE_NULL; } -static inline RM_ENGINE_TYPE confComputeGetEngineIdFromKeySpace_DISPATCH(struct ConfidentialCompute *pConfCompute, NvU32 keySpace) { - return pConfCompute->__confComputeGetEngineIdFromKeySpace__(pConfCompute, keySpace); -} - NvBool confComputeGlobalKeyIsKernelPriv_GH100(struct ConfidentialCompute *pConfCompute, NvU32 keyId); static inline NvBool confComputeGlobalKeyIsKernelPriv_491d52(struct ConfidentialCompute *pConfCompute, NvU32 keyId) { return ((NvBool)(0 != 0)); } -static inline NvBool confComputeGlobalKeyIsKernelPriv_DISPATCH(struct ConfidentialCompute *pConfCompute, NvU32 keyId) { - return pConfCompute->__confComputeGlobalKeyIsKernelPriv__(pConfCompute, keyId); -} - NV_STATUS confComputeGetKeyPairByChannel_GH100(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, struct KernelChannel *pKernelChannel, NvU32 *pH2DKey, NvU32 *pD2HKey); static inline NV_STATUS confComputeGetKeyPairByChannel_46f6a7(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, struct KernelChannel *pKernelChannel, NvU32 *pH2DKey, NvU32 *pD2HKey) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS confComputeGetKeyPairByChannel_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, struct KernelChannel *pKernelChannel, NvU32 *pH2DKey, NvU32 *pD2HKey) { - return pConfCompute->__confComputeGetKeyPairByChannel__(pGpu, pConfCompute, pKernelChannel, pH2DKey, pD2HKey); -} - NV_STATUS confComputeTriggerKeyRotation_GH100(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute); static inline NV_STATUS confComputeTriggerKeyRotation_56cd7a(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { @@ -447,166 +586,78 @@ static inline NV_STATUS confComputeTriggerKeyRotation_46f6a7(struct OBJGPU *pGpu return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS confComputeTriggerKeyRotation_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { - return pConfCompute->__confComputeTriggerKeyRotation__(pGpu, pConfCompute); -} - NV_STATUS confComputeEnableKeyRotationCallback_GH100(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvBool bEnable); static inline NV_STATUS confComputeEnableKeyRotationCallback_56cd7a(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvBool bEnable) { return NV_OK; } -static inline NV_STATUS confComputeEnableKeyRotationCallback_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvBool bEnable) { - return pConfCompute->__confComputeEnableKeyRotationCallback__(pGpu, pConfCompute, bEnable); -} - NV_STATUS confComputeEnableKeyRotationSupport_GH100(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute); static inline NV_STATUS confComputeEnableKeyRotationSupport_56cd7a(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { return NV_OK; } -static inline NV_STATUS confComputeEnableKeyRotationSupport_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { - return pConfCompute->__confComputeEnableKeyRotationSupport__(pGpu, pConfCompute); -} - NvBool confComputeIsDebugModeEnabled_GH100(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute); static inline NvBool confComputeIsDebugModeEnabled_491d52(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { return ((NvBool)(0 != 0)); } -static inline NvBool confComputeIsDebugModeEnabled_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { - return pConfCompute->__confComputeIsDebugModeEnabled__(pGpu, pConfCompute); -} - NvBool confComputeIsGpuCcCapable_GH100(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute); static inline NvBool confComputeIsGpuCcCapable_491d52(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { return ((NvBool)(0 != 0)); } -static inline NvBool confComputeIsGpuCcCapable_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { - return pConfCompute->__confComputeIsGpuCcCapable__(pGpu, pConfCompute); -} - NV_STATUS confComputeEstablishSpdmSessionAndKeys_KERNEL(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute); static inline NV_STATUS confComputeEstablishSpdmSessionAndKeys_46f6a7(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS confComputeEstablishSpdmSessionAndKeys_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { - return pConfCompute->__confComputeEstablishSpdmSessionAndKeys__(pGpu, pConfCompute); -} - void confComputeKeyStoreDepositIvMask_GH100(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId, void *ivMask); static inline void confComputeKeyStoreDepositIvMask_b3696a(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId, void *ivMask) { return; } -static inline void confComputeKeyStoreDepositIvMask_DISPATCH(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId, void *ivMask) { - pConfCompute->__confComputeKeyStoreDepositIvMask__(pConfCompute, globalKeyId, ivMask); -} - NV_STATUS confComputeKeyStoreInit_GH100(struct ConfidentialCompute *pConfCompute); static inline NV_STATUS confComputeKeyStoreInit_46f6a7(struct ConfidentialCompute *pConfCompute) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS confComputeKeyStoreInit_DISPATCH(struct ConfidentialCompute *pConfCompute) { - return pConfCompute->__confComputeKeyStoreInit__(pConfCompute); -} - void confComputeKeyStoreDeinit_GH100(struct ConfidentialCompute *pConfCompute); static inline void confComputeKeyStoreDeinit_b3696a(struct ConfidentialCompute *pConfCompute) { return; } -static inline void confComputeKeyStoreDeinit_DISPATCH(struct ConfidentialCompute *pConfCompute) { - pConfCompute->__confComputeKeyStoreDeinit__(pConfCompute); -} - void *confComputeKeyStoreGetExportMasterKey_GH100(struct ConfidentialCompute *pConfCompute); static inline void *confComputeKeyStoreGetExportMasterKey_fa6e19(struct ConfidentialCompute *pConfCompute) { return ((void *)0); } -static inline void *confComputeKeyStoreGetExportMasterKey_DISPATCH(struct ConfidentialCompute *pConfCompute) { - return pConfCompute->__confComputeKeyStoreGetExportMasterKey__(pConfCompute); -} - NV_STATUS confComputeKeyStoreDeriveKey_GH100(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId); static inline NV_STATUS confComputeKeyStoreDeriveKey_46f6a7(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS confComputeKeyStoreDeriveKey_DISPATCH(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId) { - return pConfCompute->__confComputeKeyStoreDeriveKey__(pConfCompute, globalKeyId); -} - void confComputeKeyStoreClearExportMasterKey_GH100(struct ConfidentialCompute *pConfCompute); static inline void confComputeKeyStoreClearExportMasterKey_b3696a(struct ConfidentialCompute *pConfCompute) { return; } -static inline void confComputeKeyStoreClearExportMasterKey_DISPATCH(struct ConfidentialCompute *pConfCompute) { - pConfCompute->__confComputeKeyStoreClearExportMasterKey__(pConfCompute); -} - NV_STATUS confComputeKeyStoreUpdateKey_GH100(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId); static inline NV_STATUS confComputeKeyStoreUpdateKey_46f6a7(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS confComputeKeyStoreUpdateKey_DISPATCH(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId) { - return pConfCompute->__confComputeKeyStoreUpdateKey__(pConfCompute, globalKeyId); -} - -static inline NV_STATUS confComputeStateLoad_DISPATCH(POBJGPU pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg0) { - return pEngstate->__confComputeStateLoad__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS confComputeStateUnload_DISPATCH(POBJGPU pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg0) { - return pEngstate->__confComputeStateUnload__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS confComputeStatePreLoad_DISPATCH(POBJGPU pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg0) { - return pEngstate->__confComputeStatePreLoad__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS confComputeStatePostUnload_DISPATCH(POBJGPU pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg0) { - return pEngstate->__confComputeStatePostUnload__(pGpu, pEngstate, arg0); -} - -static inline void confComputeStateDestroy_DISPATCH(POBJGPU pGpu, struct ConfidentialCompute *pEngstate) { - pEngstate->__confComputeStateDestroy__(pGpu, pEngstate); -} - -static inline NV_STATUS confComputeStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct ConfidentialCompute *pEngstate) { - return pEngstate->__confComputeStateInitUnlocked__(pGpu, pEngstate); -} - -static inline void confComputeInitMissing_DISPATCH(POBJGPU pGpu, struct ConfidentialCompute *pEngstate) { - pEngstate->__confComputeInitMissing__(pGpu, pEngstate); -} - -static inline NV_STATUS confComputeStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct ConfidentialCompute *pEngstate) { - return pEngstate->__confComputeStatePreInitUnlocked__(pGpu, pEngstate); -} - -static inline NvBool confComputeIsPresent_DISPATCH(POBJGPU pGpu, struct ConfidentialCompute *pEngstate) { - return pEngstate->__confComputeIsPresent__(pGpu, pEngstate); -} - NvBool confComputeAcceptClientRequest_IMPL(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute); #ifdef __nvoc_conf_compute_h_disabled @@ -651,26 +702,26 @@ static inline NV_STATUS confComputeGetKeySlotFromGlobalKeyId(struct Confidential #define confComputeGetKeySlotFromGlobalKeyId(pConfCompute, globalKeyId, pSlot) confComputeGetKeySlotFromGlobalKeyId_IMPL(pConfCompute, globalKeyId, pSlot) #endif //__nvoc_conf_compute_h_disabled -NV_STATUS confComputeCheckAndScheduleKeyRotation_IMPL(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvU32 h2dKey, NvU32 d2hKey); +NV_STATUS confComputeCheckAndPerformKeyRotation_IMPL(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvU32 h2dKey, NvU32 d2hKey); #ifdef __nvoc_conf_compute_h_disabled -static inline NV_STATUS confComputeCheckAndScheduleKeyRotation(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvU32 h2dKey, NvU32 d2hKey) { +static inline NV_STATUS confComputeCheckAndPerformKeyRotation(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvU32 h2dKey, NvU32 d2hKey) { NV_ASSERT_FAILED_PRECOMP("ConfidentialCompute was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_conf_compute_h_disabled -#define confComputeCheckAndScheduleKeyRotation(pGpu, pConfCompute, h2dKey, d2hKey) confComputeCheckAndScheduleKeyRotation_IMPL(pGpu, pConfCompute, h2dKey, d2hKey) +#define confComputeCheckAndPerformKeyRotation(pGpu, pConfCompute, h2dKey, d2hKey) confComputeCheckAndPerformKeyRotation_IMPL(pGpu, pConfCompute, h2dKey, d2hKey) #endif //__nvoc_conf_compute_h_disabled -NV_STATUS confComputeScheduleKeyRotationWorkItem_IMPL(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvU32 h2dKey, NvU32 d2hKey); +NV_STATUS confComputePerformKeyRotation_IMPL(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvU32 h2dKey, NvU32 d2hKey, NvBool bWorkItem); #ifdef __nvoc_conf_compute_h_disabled -static inline NV_STATUS confComputeScheduleKeyRotationWorkItem(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvU32 h2dKey, NvU32 d2hKey) { +static inline NV_STATUS confComputePerformKeyRotation(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvU32 h2dKey, NvU32 d2hKey, NvBool bWorkItem) { NV_ASSERT_FAILED_PRECOMP("ConfidentialCompute was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_conf_compute_h_disabled -#define confComputeScheduleKeyRotationWorkItem(pGpu, pConfCompute, h2dKey, d2hKey) confComputeScheduleKeyRotationWorkItem_IMPL(pGpu, pConfCompute, h2dKey, d2hKey) +#define confComputePerformKeyRotation(pGpu, pConfCompute, h2dKey, d2hKey, bWorkItem) confComputePerformKeyRotation_IMPL(pGpu, pConfCompute, h2dKey, d2hKey, bWorkItem) #endif //__nvoc_conf_compute_h_disabled NV_STATUS confComputeSetKeyRotationStatus_IMPL(struct ConfidentialCompute *pConfCompute, NvU32 globalKey, KEY_ROTATION_STATUS status); diff --git a/src/nvidia/generated/g_console_mem_nvoc.c b/src/nvidia/generated/g_console_mem_nvoc.c index c5ae52f2d5..b0cff23271 100644 --- a/src/nvidia/generated/g_console_mem_nvoc.c +++ b/src/nvidia/generated/g_console_mem_nvoc.c @@ -93,110 +93,142 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_ConsoleMemory = /*pExportInfo=*/ &__nvoc_export_info_ConsoleMemory }; -static NvBool __nvoc_thunk_ConsoleMemory_resCanCopy(struct RsResource *pConsoleMemory) { - return conmemCanCopy((struct ConsoleMemory *)(((unsigned char *)pConsoleMemory) - __nvoc_rtti_ConsoleMemory_RsResource.offset)); +// 1 down-thunk(s) defined to bridge methods in ConsoleMemory from superclasses + +// conmemCanCopy: virtual override (res) base (mem) +static NvBool __nvoc_down_thunk_ConsoleMemory_resCanCopy(struct RsResource *pConsoleMemory) { + return conmemCanCopy((struct ConsoleMemory *)(((unsigned char *) pConsoleMemory) - __nvoc_rtti_ConsoleMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_conmemCheckMemInterUnmap(struct ConsoleMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), bSubdeviceHandleProvided); + +// 25 up-thunk(s) defined to bridge methods in ConsoleMemory to superclasses + +// conmemIsDuplicate: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_conmemIsDuplicate(struct ConsoleMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_RmResource_conmemShareCallback(struct ConsoleMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// conmemGetMapAddrSpace: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_conmemGetMapAddrSpace(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_RsResource_conmemMapTo(struct ConsoleMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pParams); +// conmemControl: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_conmemControl(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_conmemGetMapAddrSpace(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return memGetMapAddrSpace((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); +// conmemMap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_conmemMap(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } -static NvBool __nvoc_thunk_Memory_conmemIsExportAllowed(struct ConsoleMemory *pMemory) { - return memIsExportAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset)); +// conmemUnmap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_conmemUnmap(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pCallContext, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_conmemGetRefCount(struct ConsoleMemory *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset)); +// conmemGetMemInterMapParams: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_conmemGetMemInterMapParams(struct ConsoleMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pParams); } -static void __nvoc_thunk_RsResource_conmemAddAdditionalDependants(struct RsClient *pClient, struct ConsoleMemory *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pReference); +// conmemCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_conmemCheckMemInterUnmap(struct ConsoleMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RmResource_conmemControl_Prologue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pCallContext, pParams); +// conmemGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_conmemGetMemoryMappingDescriptor(struct ConsoleMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), ppMemDesc); } -static NvBool __nvoc_thunk_Memory_conmemIsGpuMapAllowed(struct ConsoleMemory *pMemory, struct OBJGPU *pGpu) { - return memIsGpuMapAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pGpu); +// conmemCheckCopyPermissions: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_conmemCheckCopyPermissions(struct ConsoleMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pDstGpu, pDstDevice); } -static NV_STATUS __nvoc_thunk_RsResource_conmemUnmapFrom(struct ConsoleMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pParams); +// conmemIsReady: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_conmemIsReady(struct ConsoleMemory *pMemory, NvBool bCopyConstructorContext) { + return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), bCopyConstructorContext); } -static void __nvoc_thunk_RmResource_conmemControl_Epilogue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pCallContext, pParams); +// conmemIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_conmemIsGpuMapAllowed(struct ConsoleMemory *pMemory, struct OBJGPU *pGpu) { + return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pGpu); } -static NV_STATUS __nvoc_thunk_Memory_conmemControl(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memControl((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pCallContext, pParams); +// conmemIsExportAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_conmemIsExportAllowed(struct ConsoleMemory *pMemory) { + return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset)); } -static NV_STATUS __nvoc_thunk_Memory_conmemUnmap(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pCallContext, pCpuMapping); +// conmemAccessCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_conmemAccessCallback(struct ConsoleMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_Memory_conmemGetMemInterMapParams(struct ConsoleMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pParams); +// conmemShareCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_conmemShareCallback(struct ConsoleMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_Memory_conmemGetMemoryMappingDescriptor(struct ConsoleMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), ppMemDesc); +// conmemControlSerialization_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_conmemControlSerialization_Prologue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_conmemControlFilter(struct ConsoleMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pCallContext, pParams); +// conmemControlSerialization_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_conmemControlSerialization_Epilogue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_conmemControlSerialization_Prologue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pCallContext, pParams); +// conmemControl_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_conmemControl_Prologue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_conmemIsPartialUnmapSupported(struct ConsoleMemory *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset)); +// conmemControl_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_conmemControl_Epilogue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_conmemIsReady(struct ConsoleMemory *pMemory, NvBool bCopyConstructorContext) { - return memIsReady((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), bCopyConstructorContext); +// conmemPreDestruct: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_conmemPreDestruct(struct ConsoleMemory *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_conmemCheckCopyPermissions(struct ConsoleMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return memCheckCopyPermissions((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pDstGpu, pDstDevice); +// conmemControlFilter: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_conmemControlFilter(struct ConsoleMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_conmemPreDestruct(struct ConsoleMemory *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset)); +// conmemIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body +static NvBool __nvoc_up_thunk_RsResource_conmemIsPartialUnmapSupported(struct ConsoleMemory *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_conmemIsDuplicate(struct ConsoleMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), hMemory, pDuplicate); +// conmemMapTo: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_conmemMapTo(struct ConsoleMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_conmemControlSerialization_Epilogue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pCallContext, pParams); +// conmemUnmapFrom: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_conmemUnmapFrom(struct ConsoleMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_Memory_conmemMap(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pCallContext, pParams, pCpuMapping); +// conmemGetRefCount: virtual inherited (res) base (mem) +static NvU32 __nvoc_up_thunk_RsResource_conmemGetRefCount(struct ConsoleMemory *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_conmemAccessCallback(struct ConsoleMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// conmemAddAdditionalDependants: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_conmemAddAdditionalDependants(struct RsClient *pClient, struct ConsoleMemory *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_ConsoleMemory = { /*numEntries=*/ 0, @@ -232,65 +264,95 @@ NV_STATUS __nvoc_ctor_ConsoleMemory(ConsoleMemory *pThis, CALL_CONTEXT * arg_pCa return status; } +// Vtable initialization static void __nvoc_init_funcTable_ConsoleMemory_1(ConsoleMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // conmemCanCopy -- virtual override (res) base (mem) pThis->__conmemCanCopy__ = &conmemCanCopy_IMPL; + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_ConsoleMemory_resCanCopy; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_ConsoleMemory_resCanCopy; + // conmemIsDuplicate -- virtual inherited (mem) base (mem) + pThis->__conmemIsDuplicate__ = &__nvoc_up_thunk_Memory_conmemIsDuplicate; - pThis->__conmemCheckMemInterUnmap__ = &__nvoc_thunk_Memory_conmemCheckMemInterUnmap; + // conmemGetMapAddrSpace -- virtual inherited (mem) base (mem) + pThis->__conmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_conmemGetMapAddrSpace; - pThis->__conmemShareCallback__ = &__nvoc_thunk_RmResource_conmemShareCallback; + // conmemControl -- virtual inherited (mem) base (mem) + pThis->__conmemControl__ = &__nvoc_up_thunk_Memory_conmemControl; - pThis->__conmemMapTo__ = &__nvoc_thunk_RsResource_conmemMapTo; + // conmemMap -- virtual inherited (mem) base (mem) + pThis->__conmemMap__ = &__nvoc_up_thunk_Memory_conmemMap; - pThis->__conmemGetMapAddrSpace__ = &__nvoc_thunk_Memory_conmemGetMapAddrSpace; + // conmemUnmap -- virtual inherited (mem) base (mem) + pThis->__conmemUnmap__ = &__nvoc_up_thunk_Memory_conmemUnmap; - pThis->__conmemIsExportAllowed__ = &__nvoc_thunk_Memory_conmemIsExportAllowed; + // conmemGetMemInterMapParams -- virtual inherited (mem) base (mem) + pThis->__conmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_conmemGetMemInterMapParams; - pThis->__conmemGetRefCount__ = &__nvoc_thunk_RsResource_conmemGetRefCount; + // conmemCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body + pThis->__conmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_conmemCheckMemInterUnmap; - pThis->__conmemAddAdditionalDependants__ = &__nvoc_thunk_RsResource_conmemAddAdditionalDependants; + // conmemGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) + pThis->__conmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_conmemGetMemoryMappingDescriptor; - pThis->__conmemControl_Prologue__ = &__nvoc_thunk_RmResource_conmemControl_Prologue; + // conmemCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body + pThis->__conmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_conmemCheckCopyPermissions; - pThis->__conmemIsGpuMapAllowed__ = &__nvoc_thunk_Memory_conmemIsGpuMapAllowed; + // conmemIsReady -- virtual inherited (mem) base (mem) + pThis->__conmemIsReady__ = &__nvoc_up_thunk_Memory_conmemIsReady; - pThis->__conmemUnmapFrom__ = &__nvoc_thunk_RsResource_conmemUnmapFrom; + // conmemIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__conmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_conmemIsGpuMapAllowed; - pThis->__conmemControl_Epilogue__ = &__nvoc_thunk_RmResource_conmemControl_Epilogue; + // conmemIsExportAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__conmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_conmemIsExportAllowed; - pThis->__conmemControl__ = &__nvoc_thunk_Memory_conmemControl; + // conmemAccessCallback -- virtual inherited (rmres) base (mem) + pThis->__conmemAccessCallback__ = &__nvoc_up_thunk_RmResource_conmemAccessCallback; - pThis->__conmemUnmap__ = &__nvoc_thunk_Memory_conmemUnmap; + // conmemShareCallback -- virtual inherited (rmres) base (mem) + pThis->__conmemShareCallback__ = &__nvoc_up_thunk_RmResource_conmemShareCallback; - pThis->__conmemGetMemInterMapParams__ = &__nvoc_thunk_Memory_conmemGetMemInterMapParams; + // conmemControlSerialization_Prologue -- virtual inherited (rmres) base (mem) + pThis->__conmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_conmemControlSerialization_Prologue; - pThis->__conmemGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_conmemGetMemoryMappingDescriptor; + // conmemControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__conmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_conmemControlSerialization_Epilogue; - pThis->__conmemControlFilter__ = &__nvoc_thunk_RsResource_conmemControlFilter; + // conmemControl_Prologue -- virtual inherited (rmres) base (mem) + pThis->__conmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_conmemControl_Prologue; - pThis->__conmemControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_conmemControlSerialization_Prologue; + // conmemControl_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__conmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_conmemControl_Epilogue; - pThis->__conmemIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_conmemIsPartialUnmapSupported; + // conmemPreDestruct -- virtual inherited (res) base (mem) + pThis->__conmemPreDestruct__ = &__nvoc_up_thunk_RsResource_conmemPreDestruct; - pThis->__conmemIsReady__ = &__nvoc_thunk_Memory_conmemIsReady; + // conmemControlFilter -- virtual inherited (res) base (mem) + pThis->__conmemControlFilter__ = &__nvoc_up_thunk_RsResource_conmemControlFilter; - pThis->__conmemCheckCopyPermissions__ = &__nvoc_thunk_Memory_conmemCheckCopyPermissions; + // conmemIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body + pThis->__conmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_conmemIsPartialUnmapSupported; - pThis->__conmemPreDestruct__ = &__nvoc_thunk_RsResource_conmemPreDestruct; + // conmemMapTo -- virtual inherited (res) base (mem) + pThis->__conmemMapTo__ = &__nvoc_up_thunk_RsResource_conmemMapTo; - pThis->__conmemIsDuplicate__ = &__nvoc_thunk_Memory_conmemIsDuplicate; + // conmemUnmapFrom -- virtual inherited (res) base (mem) + pThis->__conmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_conmemUnmapFrom; - pThis->__conmemControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_conmemControlSerialization_Epilogue; + // conmemGetRefCount -- virtual inherited (res) base (mem) + pThis->__conmemGetRefCount__ = &__nvoc_up_thunk_RsResource_conmemGetRefCount; - pThis->__conmemMap__ = &__nvoc_thunk_Memory_conmemMap; + // conmemAddAdditionalDependants -- virtual inherited (res) base (mem) + pThis->__conmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_conmemAddAdditionalDependants; +} // End __nvoc_init_funcTable_ConsoleMemory_1 with approximately 27 basic block(s). - pThis->__conmemAccessCallback__ = &__nvoc_thunk_RmResource_conmemAccessCallback; -} +// Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_ConsoleMemory(ConsoleMemory *pThis) { + + // Initialize vtable(s) with 26 per-object function pointer(s). __nvoc_init_funcTable_ConsoleMemory_1(pThis); } diff --git a/src/nvidia/generated/g_console_mem_nvoc.h b/src/nvidia/generated/g_console_mem_nvoc.h index e03dd0de81..2070f17bef 100644 --- a/src/nvidia/generated/g_console_mem_nvoc.h +++ b/src/nvidia/generated/g_console_mem_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_CONSOLE_MEM_NVOC_H_ #define _G_CONSOLE_MEM_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_console_mem_nvoc.h" #ifndef _CONSOLE_MEMORY_H_ @@ -49,41 +57,50 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct ConsoleMemory { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Memory *__nvoc_pbase_Memory; - struct ConsoleMemory *__nvoc_pbase_ConsoleMemory; - NvBool (*__conmemCanCopy__)(struct ConsoleMemory *); - NV_STATUS (*__conmemCheckMemInterUnmap__)(struct ConsoleMemory *, NvBool); - NvBool (*__conmemShareCallback__)(struct ConsoleMemory *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__conmemMapTo__)(struct ConsoleMemory *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__conmemGetMapAddrSpace__)(struct ConsoleMemory *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvBool (*__conmemIsExportAllowed__)(struct ConsoleMemory *); - NvU32 (*__conmemGetRefCount__)(struct ConsoleMemory *); - void (*__conmemAddAdditionalDependants__)(struct RsClient *, struct ConsoleMemory *, RsResourceRef *); - NV_STATUS (*__conmemControl_Prologue__)(struct ConsoleMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__conmemIsGpuMapAllowed__)(struct ConsoleMemory *, struct OBJGPU *); - NV_STATUS (*__conmemUnmapFrom__)(struct ConsoleMemory *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__conmemControl_Epilogue__)(struct ConsoleMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__conmemControl__)(struct ConsoleMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__conmemUnmap__)(struct ConsoleMemory *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__conmemGetMemInterMapParams__)(struct ConsoleMemory *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__conmemGetMemoryMappingDescriptor__)(struct ConsoleMemory *, MEMORY_DESCRIPTOR **); - NV_STATUS (*__conmemControlFilter__)(struct ConsoleMemory *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__conmemControlSerialization_Prologue__)(struct ConsoleMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__conmemIsPartialUnmapSupported__)(struct ConsoleMemory *); - NV_STATUS (*__conmemIsReady__)(struct ConsoleMemory *, NvBool); - NV_STATUS (*__conmemCheckCopyPermissions__)(struct ConsoleMemory *, struct OBJGPU *, struct Device *); - void (*__conmemPreDestruct__)(struct ConsoleMemory *); - NV_STATUS (*__conmemIsDuplicate__)(struct ConsoleMemory *, NvHandle, NvBool *); - void (*__conmemControlSerialization_Epilogue__)(struct ConsoleMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__conmemMap__)(struct ConsoleMemory *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__conmemAccessCallback__)(struct ConsoleMemory *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct Memory *__nvoc_pbase_Memory; // mem super + struct ConsoleMemory *__nvoc_pbase_ConsoleMemory; // conmem + + // Vtable with 26 per-object function pointers + NvBool (*__conmemCanCopy__)(struct ConsoleMemory * /*this*/); // virtual override (res) base (mem) + NV_STATUS (*__conmemIsDuplicate__)(struct ConsoleMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) + NV_STATUS (*__conmemGetMapAddrSpace__)(struct ConsoleMemory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) + NV_STATUS (*__conmemControl__)(struct ConsoleMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (mem) base (mem) + NV_STATUS (*__conmemMap__)(struct ConsoleMemory * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__conmemUnmap__)(struct ConsoleMemory * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__conmemGetMemInterMapParams__)(struct ConsoleMemory * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (mem) base (mem) + NV_STATUS (*__conmemCheckMemInterUnmap__)(struct ConsoleMemory * /*this*/, NvBool); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__conmemGetMemoryMappingDescriptor__)(struct ConsoleMemory * /*this*/, MEMORY_DESCRIPTOR **); // virtual inherited (mem) base (mem) + NV_STATUS (*__conmemCheckCopyPermissions__)(struct ConsoleMemory * /*this*/, struct OBJGPU *, struct Device *); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__conmemIsReady__)(struct ConsoleMemory * /*this*/, NvBool); // virtual inherited (mem) base (mem) + NvBool (*__conmemIsGpuMapAllowed__)(struct ConsoleMemory * /*this*/, struct OBJGPU *); // inline virtual inherited (mem) base (mem) body + NvBool (*__conmemIsExportAllowed__)(struct ConsoleMemory * /*this*/); // inline virtual inherited (mem) base (mem) body + NvBool (*__conmemAccessCallback__)(struct ConsoleMemory * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (mem) + NvBool (*__conmemShareCallback__)(struct ConsoleMemory * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__conmemControlSerialization_Prologue__)(struct ConsoleMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__conmemControlSerialization_Epilogue__)(struct ConsoleMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__conmemControl_Prologue__)(struct ConsoleMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__conmemControl_Epilogue__)(struct ConsoleMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__conmemPreDestruct__)(struct ConsoleMemory * /*this*/); // virtual inherited (res) base (mem) + NV_STATUS (*__conmemControlFilter__)(struct ConsoleMemory * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (mem) + NvBool (*__conmemIsPartialUnmapSupported__)(struct ConsoleMemory * /*this*/); // inline virtual inherited (res) base (mem) body + NV_STATUS (*__conmemMapTo__)(struct ConsoleMemory * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (mem) + NV_STATUS (*__conmemUnmapFrom__)(struct ConsoleMemory * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (mem) + NvU32 (*__conmemGetRefCount__)(struct ConsoleMemory * /*this*/); // virtual inherited (res) base (mem) + void (*__conmemAddAdditionalDependants__)(struct RsClient *, struct ConsoleMemory * /*this*/, RsResourceRef *); // virtual inherited (res) base (mem) }; #ifndef __NVOC_CLASS_ConsoleMemory_TYPEDEF__ @@ -95,6 +112,7 @@ typedef struct ConsoleMemory ConsoleMemory; #define __nvoc_class_id_ConsoleMemory 0xaac69e #endif /* __nvoc_class_id_ConsoleMemory */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_ConsoleMemory; #define __staticCast_ConsoleMemory(pThis) \ @@ -107,145 +125,174 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_ConsoleMemory; ((ConsoleMemory*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(ConsoleMemory))) #endif //__nvoc_console_mem_h_disabled - NV_STATUS __nvoc_objCreateDynamic_ConsoleMemory(ConsoleMemory**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_ConsoleMemory(ConsoleMemory**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_ConsoleMemory(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_ConsoleMemory((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define conmemCanCopy_FNPTR(pConsoleMemory) pConsoleMemory->__conmemCanCopy__ #define conmemCanCopy(pConsoleMemory) conmemCanCopy_DISPATCH(pConsoleMemory) -#define conmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) conmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define conmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) conmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define conmemMapTo(pResource, pParams) conmemMapTo_DISPATCH(pResource, pParams) +#define conmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define conmemIsDuplicate(pMemory, hMemory, pDuplicate) conmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) +#define conmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ #define conmemGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) conmemGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define conmemIsExportAllowed(pMemory) conmemIsExportAllowed_DISPATCH(pMemory) -#define conmemGetRefCount(pResource) conmemGetRefCount_DISPATCH(pResource) -#define conmemAddAdditionalDependants(pClient, pResource, pReference) conmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define conmemControl_Prologue(pResource, pCallContext, pParams) conmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define conmemIsGpuMapAllowed(pMemory, pGpu) conmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define conmemUnmapFrom(pResource, pParams) conmemUnmapFrom_DISPATCH(pResource, pParams) -#define conmemControl_Epilogue(pResource, pCallContext, pParams) conmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define conmemControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ #define conmemControl(pMemory, pCallContext, pParams) conmemControl_DISPATCH(pMemory, pCallContext, pParams) +#define conmemMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define conmemMap(pMemory, pCallContext, pParams, pCpuMapping) conmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define conmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ #define conmemUnmap(pMemory, pCallContext, pCpuMapping) conmemUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) +#define conmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ #define conmemGetMemInterMapParams(pMemory, pParams) conmemGetMemInterMapParams_DISPATCH(pMemory, pParams) +#define conmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define conmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) conmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) +#define conmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ #define conmemGetMemoryMappingDescriptor(pMemory, ppMemDesc) conmemGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define conmemControlFilter(pResource, pCallContext, pParams) conmemControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define conmemControlSerialization_Prologue(pResource, pCallContext, pParams) conmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define conmemIsPartialUnmapSupported(pResource) conmemIsPartialUnmapSupported_DISPATCH(pResource) -#define conmemIsReady(pMemory, bCopyConstructorContext) conmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define conmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ #define conmemCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) conmemCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define conmemPreDestruct(pResource) conmemPreDestruct_DISPATCH(pResource) -#define conmemIsDuplicate(pMemory, hMemory, pDuplicate) conmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define conmemControlSerialization_Epilogue(pResource, pCallContext, pParams) conmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define conmemMap(pMemory, pCallContext, pParams, pCpuMapping) conmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define conmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define conmemIsReady(pMemory, bCopyConstructorContext) conmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define conmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define conmemIsGpuMapAllowed(pMemory, pGpu) conmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) +#define conmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define conmemIsExportAllowed(pMemory) conmemIsExportAllowed_DISPATCH(pMemory) +#define conmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ #define conmemAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) conmemAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool conmemCanCopy_IMPL(struct ConsoleMemory *pConsoleMemory); +#define conmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define conmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) conmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define conmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define conmemControlSerialization_Prologue(pResource, pCallContext, pParams) conmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define conmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define conmemControlSerialization_Epilogue(pResource, pCallContext, pParams) conmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define conmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define conmemControl_Prologue(pResource, pCallContext, pParams) conmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define conmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define conmemControl_Epilogue(pResource, pCallContext, pParams) conmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define conmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define conmemPreDestruct(pResource) conmemPreDestruct_DISPATCH(pResource) +#define conmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define conmemControlFilter(pResource, pCallContext, pParams) conmemControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define conmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define conmemIsPartialUnmapSupported(pResource) conmemIsPartialUnmapSupported_DISPATCH(pResource) +#define conmemMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define conmemMapTo(pResource, pParams) conmemMapTo_DISPATCH(pResource, pParams) +#define conmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define conmemUnmapFrom(pResource, pParams) conmemUnmapFrom_DISPATCH(pResource, pParams) +#define conmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define conmemGetRefCount(pResource) conmemGetRefCount_DISPATCH(pResource) +#define conmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define conmemAddAdditionalDependants(pClient, pResource, pReference) conmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NvBool conmemCanCopy_DISPATCH(struct ConsoleMemory *pConsoleMemory) { return pConsoleMemory->__conmemCanCopy__(pConsoleMemory); } -static inline NV_STATUS conmemCheckMemInterUnmap_DISPATCH(struct ConsoleMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__conmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); -} - -static inline NvBool conmemShareCallback_DISPATCH(struct ConsoleMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__conmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS conmemMapTo_DISPATCH(struct ConsoleMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__conmemMapTo__(pResource, pParams); +static inline NV_STATUS conmemIsDuplicate_DISPATCH(struct ConsoleMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return pMemory->__conmemIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS conmemGetMapAddrSpace_DISPATCH(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pMemory->__conmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } -static inline NvBool conmemIsExportAllowed_DISPATCH(struct ConsoleMemory *pMemory) { - return pMemory->__conmemIsExportAllowed__(pMemory); +static inline NV_STATUS conmemControl_DISPATCH(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pMemory->__conmemControl__(pMemory, pCallContext, pParams); } -static inline NvU32 conmemGetRefCount_DISPATCH(struct ConsoleMemory *pResource) { - return pResource->__conmemGetRefCount__(pResource); +static inline NV_STATUS conmemMap_DISPATCH(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pMemory->__conmemMap__(pMemory, pCallContext, pParams, pCpuMapping); } -static inline void conmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ConsoleMemory *pResource, RsResourceRef *pReference) { - pResource->__conmemAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS conmemUnmap_DISPATCH(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pMemory->__conmemUnmap__(pMemory, pCallContext, pCpuMapping); } -static inline NV_STATUS conmemControl_Prologue_DISPATCH(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__conmemControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS conmemGetMemInterMapParams_DISPATCH(struct ConsoleMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pMemory->__conmemGetMemInterMapParams__(pMemory, pParams); } -static inline NvBool conmemIsGpuMapAllowed_DISPATCH(struct ConsoleMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__conmemIsGpuMapAllowed__(pMemory, pGpu); +static inline NV_STATUS conmemCheckMemInterUnmap_DISPATCH(struct ConsoleMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return pMemory->__conmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } -static inline NV_STATUS conmemUnmapFrom_DISPATCH(struct ConsoleMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__conmemUnmapFrom__(pResource, pParams); +static inline NV_STATUS conmemGetMemoryMappingDescriptor_DISPATCH(struct ConsoleMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return pMemory->__conmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } -static inline void conmemControl_Epilogue_DISPATCH(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__conmemControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS conmemCheckCopyPermissions_DISPATCH(struct ConsoleMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return pMemory->__conmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } -static inline NV_STATUS conmemControl_DISPATCH(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__conmemControl__(pMemory, pCallContext, pParams); +static inline NV_STATUS conmemIsReady_DISPATCH(struct ConsoleMemory *pMemory, NvBool bCopyConstructorContext) { + return pMemory->__conmemIsReady__(pMemory, bCopyConstructorContext); } -static inline NV_STATUS conmemUnmap_DISPATCH(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__conmemUnmap__(pMemory, pCallContext, pCpuMapping); +static inline NvBool conmemIsGpuMapAllowed_DISPATCH(struct ConsoleMemory *pMemory, struct OBJGPU *pGpu) { + return pMemory->__conmemIsGpuMapAllowed__(pMemory, pGpu); } -static inline NV_STATUS conmemGetMemInterMapParams_DISPATCH(struct ConsoleMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__conmemGetMemInterMapParams__(pMemory, pParams); +static inline NvBool conmemIsExportAllowed_DISPATCH(struct ConsoleMemory *pMemory) { + return pMemory->__conmemIsExportAllowed__(pMemory); } -static inline NV_STATUS conmemGetMemoryMappingDescriptor_DISPATCH(struct ConsoleMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__conmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); +static inline NvBool conmemAccessCallback_DISPATCH(struct ConsoleMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__conmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS conmemControlFilter_DISPATCH(struct ConsoleMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__conmemControlFilter__(pResource, pCallContext, pParams); +static inline NvBool conmemShareCallback_DISPATCH(struct ConsoleMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__conmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS conmemControlSerialization_Prologue_DISPATCH(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__conmemControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool conmemIsPartialUnmapSupported_DISPATCH(struct ConsoleMemory *pResource) { - return pResource->__conmemIsPartialUnmapSupported__(pResource); +static inline void conmemControlSerialization_Epilogue_DISPATCH(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__conmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS conmemIsReady_DISPATCH(struct ConsoleMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__conmemIsReady__(pMemory, bCopyConstructorContext); +static inline NV_STATUS conmemControl_Prologue_DISPATCH(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__conmemControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS conmemCheckCopyPermissions_DISPATCH(struct ConsoleMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__conmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); +static inline void conmemControl_Epilogue_DISPATCH(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__conmemControl_Epilogue__(pResource, pCallContext, pParams); } static inline void conmemPreDestruct_DISPATCH(struct ConsoleMemory *pResource) { pResource->__conmemPreDestruct__(pResource); } -static inline NV_STATUS conmemIsDuplicate_DISPATCH(struct ConsoleMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__conmemIsDuplicate__(pMemory, hMemory, pDuplicate); +static inline NV_STATUS conmemControlFilter_DISPATCH(struct ConsoleMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__conmemControlFilter__(pResource, pCallContext, pParams); } -static inline void conmemControlSerialization_Epilogue_DISPATCH(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__conmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool conmemIsPartialUnmapSupported_DISPATCH(struct ConsoleMemory *pResource) { + return pResource->__conmemIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS conmemMap_DISPATCH(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__conmemMap__(pMemory, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS conmemMapTo_DISPATCH(struct ConsoleMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__conmemMapTo__(pResource, pParams); } -static inline NvBool conmemAccessCallback_DISPATCH(struct ConsoleMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__conmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS conmemUnmapFrom_DISPATCH(struct ConsoleMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__conmemUnmapFrom__(pResource, pParams); } +static inline NvU32 conmemGetRefCount_DISPATCH(struct ConsoleMemory *pResource) { + return pResource->__conmemGetRefCount__(pResource); +} + +static inline void conmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ConsoleMemory *pResource, RsResourceRef *pReference) { + pResource->__conmemAddAdditionalDependants__(pClient, pResource, pReference); +} + +NvBool conmemCanCopy_IMPL(struct ConsoleMemory *pConsoleMemory); + NV_STATUS conmemConstruct_IMPL(struct ConsoleMemory *arg_pConsoleMemory, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_conmemConstruct(arg_pConsoleMemory, arg_pCallContext, arg_pParams) conmemConstruct_IMPL(arg_pConsoleMemory, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_context_dma_nvoc.c b/src/nvidia/generated/g_context_dma_nvoc.c index f8bd10d394..100b939a75 100644 --- a/src/nvidia/generated/g_context_dma_nvoc.c +++ b/src/nvidia/generated/g_context_dma_nvoc.c @@ -102,163 +102,195 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_ContextDma = /*pExportInfo=*/ &__nvoc_export_info_ContextDma }; -static NV_STATUS __nvoc_thunk_ContextDma_resMapTo(struct RsResource *pContextDma, struct RS_RES_MAP_TO_PARAMS *pParams) { - return ctxdmaMapTo((struct ContextDma *)(((unsigned char *)pContextDma) - __nvoc_rtti_ContextDma_RsResource.offset), pParams); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NV_STATUS __nvoc_thunk_ContextDma_resUnmapFrom(struct RsResource *pContextDma, struct RS_RES_UNMAP_FROM_PARAMS *pParams) { - return ctxdmaUnmapFrom((struct ContextDma *)(((unsigned char *)pContextDma) - __nvoc_rtti_ContextDma_RsResource.offset), pParams); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ContextDma[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) ctxdmaCtrlCmdUpdateContextdma_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) + /*flags=*/ 0x0u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20101u, + /*paramSize=*/ sizeof(NV0002_CTRL_UPDATE_CONTEXTDMA_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_ContextDma.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "ctxdmaCtrlCmdUpdateContextdma" +#endif + }, + { /* [1] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) ctxdmaCtrlCmdBindContextdma_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20102u, + /*paramSize=*/ sizeof(NV0002_CTRL_BIND_CONTEXTDMA_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_ContextDma.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "ctxdmaCtrlCmdBindContextdma" +#endif + }, + { /* [2] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) ctxdmaCtrlCmdUnbindContextdma_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20103u, + /*paramSize=*/ sizeof(NV0002_CTRL_UNBIND_CONTEXTDMA_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_ContextDma.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "ctxdmaCtrlCmdUnbindContextdma" +#endif + }, -static NvBool __nvoc_thunk_RmResource_ctxdmaShareCallback(struct ContextDma *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ContextDma_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +}; + +// 2 down-thunk(s) defined to bridge methods in ContextDma from superclasses + +// ctxdmaMapTo: virtual override (res) base (rmres) +static NV_STATUS __nvoc_down_thunk_ContextDma_resMapTo(struct RsResource *pContextDma, struct RS_RES_MAP_TO_PARAMS *pParams) { + return ctxdmaMapTo((struct ContextDma *)(((unsigned char *) pContextDma) - __nvoc_rtti_ContextDma_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RmResource_ctxdmaCheckMemInterUnmap(struct ContextDma *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ContextDma_RmResource.offset), bSubdeviceHandleProvided); +// ctxdmaUnmapFrom: virtual override (res) base (rmres) +static NV_STATUS __nvoc_down_thunk_ContextDma_resUnmapFrom(struct RsResource *pContextDma, struct RS_RES_UNMAP_FROM_PARAMS *pParams) { + return ctxdmaUnmapFrom((struct ContextDma *)(((unsigned char *) pContextDma) - __nvoc_rtti_ContextDma_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RmResource_ctxdmaAccessCallback(struct ContextDma *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ContextDma_RmResource.offset), pInvokingClient, pAllocParams, accessRight); + +// 24 up-thunk(s) defined to bridge methods in ContextDma to superclasses + +// ctxdmaAccessCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_ctxdmaAccessCallback(struct ContextDma *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static void __nvoc_thunk_Notifier_ctxdmaSetNotificationShare(struct ContextDma *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_ContextDma_Notifier.offset), pNotifShare); +// ctxdmaShareCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_ctxdmaShareCallback(struct ContextDma *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NvU32 __nvoc_thunk_RsResource_ctxdmaGetRefCount(struct ContextDma *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ContextDma_RsResource.offset)); +// ctxdmaGetMemInterMapParams: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_ctxdmaGetMemInterMapParams(struct ContextDma *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ContextDma_RmResource.offset), pParams); } -static void __nvoc_thunk_RsResource_ctxdmaAddAdditionalDependants(struct RsClient *pClient, struct ContextDma *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ContextDma_RsResource.offset), pReference); +// ctxdmaCheckMemInterUnmap: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_ctxdmaCheckMemInterUnmap(struct ContextDma *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ContextDma_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RmResource_ctxdmaControl_Prologue(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ContextDma_RmResource.offset), pCallContext, pParams); +// ctxdmaGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_ctxdmaGetMemoryMappingDescriptor(struct ContextDma *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ContextDma_RmResource.offset), ppMemDesc); } -static void __nvoc_thunk_RmResource_ctxdmaControl_Epilogue(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ContextDma_RmResource.offset), pCallContext, pParams); +// ctxdmaControlSerialization_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_ctxdmaControlSerialization_Prologue(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_ctxdmaControl(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControl((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ContextDma_RsResource.offset), pCallContext, pParams); +// ctxdmaControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_ctxdmaControlSerialization_Epilogue(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_ctxdmaUnmap(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ContextDma_RsResource.offset), pCallContext, pCpuMapping); +// ctxdmaControl_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_ctxdmaControl_Prologue(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_ctxdmaGetMemInterMapParams(struct ContextDma *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ContextDma_RmResource.offset), pParams); +// ctxdmaControl_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_ctxdmaControl_Epilogue(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_ctxdmaGetMemoryMappingDescriptor(struct ContextDma *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ContextDma_RmResource.offset), ppMemDesc); +// ctxdmaCanCopy: virtual inherited (res) base (rmres) +static NvBool __nvoc_up_thunk_RsResource_ctxdmaCanCopy(struct ContextDma *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_ctxdmaControlFilter(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ContextDma_RsResource.offset), pCallContext, pParams); +// ctxdmaIsDuplicate: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_ctxdmaIsDuplicate(struct ContextDma *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_Notifier_ctxdmaUnregisterEvent(struct ContextDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_ContextDma_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// ctxdmaPreDestruct: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_ctxdmaPreDestruct(struct ContextDma *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RmResource_ctxdmaControlSerialization_Prologue(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ContextDma_RmResource.offset), pCallContext, pParams); +// ctxdmaControl: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_ctxdmaControl(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RsResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_ctxdmaCanCopy(struct ContextDma *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ContextDma_RsResource.offset)); +// ctxdmaControlFilter: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_ctxdmaControlFilter(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RsResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_ctxdmaIsPartialUnmapSupported(struct ContextDma *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ContextDma_RsResource.offset)); +// ctxdmaMap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_ctxdmaMap(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RsResource.offset), pCallContext, pParams, pCpuMapping); } -static void __nvoc_thunk_RsResource_ctxdmaPreDestruct(struct ContextDma *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ContextDma_RsResource.offset)); +// ctxdmaUnmap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_ctxdmaUnmap(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RsResource.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_ctxdmaIsDuplicate(struct ContextDma *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ContextDma_RsResource.offset), hMemory, pDuplicate); +// ctxdmaIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body +static NvBool __nvoc_up_thunk_RsResource_ctxdmaIsPartialUnmapSupported(struct ContextDma *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RsResource.offset)); } -static void __nvoc_thunk_RmResource_ctxdmaControlSerialization_Epilogue(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ContextDma_RmResource.offset), pCallContext, pParams); +// ctxdmaGetRefCount: virtual inherited (res) base (rmres) +static NvU32 __nvoc_up_thunk_RsResource_ctxdmaGetRefCount(struct ContextDma *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RsResource.offset)); } -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_ctxdmaGetNotificationListPtr(struct ContextDma *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_ContextDma_Notifier.offset)); +// ctxdmaAddAdditionalDependants: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_ctxdmaAddAdditionalDependants(struct RsClient *pClient, struct ContextDma *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RsResource.offset), pReference); } -static struct NotifShare *__nvoc_thunk_Notifier_ctxdmaGetNotificationShare(struct ContextDma *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_ContextDma_Notifier.offset)); +// ctxdmaGetNotificationListPtr: virtual inherited (notify) base (notify) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_ctxdmaGetNotificationListPtr(struct ContextDma *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_ContextDma_Notifier.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_ctxdmaMap(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ContextDma_RsResource.offset), pCallContext, pParams, pCpuMapping); +// ctxdmaGetNotificationShare: virtual inherited (notify) base (notify) +static struct NotifShare * __nvoc_up_thunk_Notifier_ctxdmaGetNotificationShare(struct ContextDma *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_ContextDma_Notifier.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_ctxdmaGetOrAllocNotifShare(struct ContextDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_ContextDma_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +// ctxdmaSetNotificationShare: virtual inherited (notify) base (notify) +static void __nvoc_up_thunk_Notifier_ctxdmaSetNotificationShare(struct ContextDma *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_ContextDma_Notifier.offset), pNotifShare); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// ctxdmaUnregisterEvent: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_ctxdmaUnregisterEvent(struct ContextDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_ContextDma_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ContextDma[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) ctxdmaCtrlCmdUpdateContextdma_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) - /*flags=*/ 0x0u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x20101u, - /*paramSize=*/ sizeof(NV0002_CTRL_UPDATE_CONTEXTDMA_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_ContextDma.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "ctxdmaCtrlCmdUpdateContextdma" -#endif - }, - { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) ctxdmaCtrlCmdBindContextdma_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x20102u, - /*paramSize=*/ sizeof(NV0002_CTRL_BIND_CONTEXTDMA_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_ContextDma.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "ctxdmaCtrlCmdBindContextdma" -#endif - }, - { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) ctxdmaCtrlCmdUnbindContextdma_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x20103u, - /*paramSize=*/ sizeof(NV0002_CTRL_UNBIND_CONTEXTDMA_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_ContextDma.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "ctxdmaCtrlCmdUnbindContextdma" -#endif - }, +// ctxdmaGetOrAllocNotifShare: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_ctxdmaGetOrAllocNotifShare(struct ContextDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_ContextDma_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_ContextDma = { @@ -303,83 +335,111 @@ NV_STATUS __nvoc_ctor_ContextDma(ContextDma *pThis, struct CALL_CONTEXT * arg_pC return status; } +// Vtable initialization static void __nvoc_init_funcTable_ContextDma_1(ContextDma *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - pThis->__ctxdmaValidate__ = &ctxdmaValidate_IMPL; - - pThis->__ctxdmaGetKernelVA__ = &ctxdmaGetKernelVA_IMPL; - + // ctxdmaMapTo -- virtual override (res) base (rmres) pThis->__ctxdmaMapTo__ = &ctxdmaMapTo_IMPL; + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ = &__nvoc_down_thunk_ContextDma_resMapTo; + // ctxdmaUnmapFrom -- virtual override (res) base (rmres) pThis->__ctxdmaUnmapFrom__ = &ctxdmaUnmapFrom_IMPL; + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ = &__nvoc_down_thunk_ContextDma_resUnmapFrom; + // ctxdmaCtrlCmdUpdateContextdma -- exported (id=0x20101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__ctxdmaCtrlCmdUpdateContextdma__ = &ctxdmaCtrlCmdUpdateContextdma_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // ctxdmaCtrlCmdBindContextdma -- exported (id=0x20102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__ctxdmaCtrlCmdBindContextdma__ = &ctxdmaCtrlCmdBindContextdma_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // ctxdmaCtrlCmdUnbindContextdma -- exported (id=0x20103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__ctxdmaCtrlCmdUnbindContextdma__ = &ctxdmaCtrlCmdUnbindContextdma_IMPL; #endif - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ = &__nvoc_thunk_ContextDma_resMapTo; + // ctxdmaAccessCallback -- virtual inherited (rmres) base (rmres) + pThis->__ctxdmaAccessCallback__ = &__nvoc_up_thunk_RmResource_ctxdmaAccessCallback; - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ = &__nvoc_thunk_ContextDma_resUnmapFrom; + // ctxdmaShareCallback -- virtual inherited (rmres) base (rmres) + pThis->__ctxdmaShareCallback__ = &__nvoc_up_thunk_RmResource_ctxdmaShareCallback; - pThis->__ctxdmaShareCallback__ = &__nvoc_thunk_RmResource_ctxdmaShareCallback; + // ctxdmaGetMemInterMapParams -- virtual inherited (rmres) base (rmres) + pThis->__ctxdmaGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_ctxdmaGetMemInterMapParams; - pThis->__ctxdmaCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_ctxdmaCheckMemInterUnmap; + // ctxdmaCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) + pThis->__ctxdmaCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_ctxdmaCheckMemInterUnmap; - pThis->__ctxdmaAccessCallback__ = &__nvoc_thunk_RmResource_ctxdmaAccessCallback; + // ctxdmaGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) + pThis->__ctxdmaGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_ctxdmaGetMemoryMappingDescriptor; - pThis->__ctxdmaSetNotificationShare__ = &__nvoc_thunk_Notifier_ctxdmaSetNotificationShare; + // ctxdmaControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__ctxdmaControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_ctxdmaControlSerialization_Prologue; - pThis->__ctxdmaGetRefCount__ = &__nvoc_thunk_RsResource_ctxdmaGetRefCount; + // ctxdmaControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__ctxdmaControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_ctxdmaControlSerialization_Epilogue; - pThis->__ctxdmaAddAdditionalDependants__ = &__nvoc_thunk_RsResource_ctxdmaAddAdditionalDependants; + // ctxdmaControl_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__ctxdmaControl_Prologue__ = &__nvoc_up_thunk_RmResource_ctxdmaControl_Prologue; - pThis->__ctxdmaControl_Prologue__ = &__nvoc_thunk_RmResource_ctxdmaControl_Prologue; + // ctxdmaControl_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__ctxdmaControl_Epilogue__ = &__nvoc_up_thunk_RmResource_ctxdmaControl_Epilogue; - pThis->__ctxdmaControl_Epilogue__ = &__nvoc_thunk_RmResource_ctxdmaControl_Epilogue; + // ctxdmaCanCopy -- virtual inherited (res) base (rmres) + pThis->__ctxdmaCanCopy__ = &__nvoc_up_thunk_RsResource_ctxdmaCanCopy; - pThis->__ctxdmaControl__ = &__nvoc_thunk_RsResource_ctxdmaControl; + // ctxdmaIsDuplicate -- virtual inherited (res) base (rmres) + pThis->__ctxdmaIsDuplicate__ = &__nvoc_up_thunk_RsResource_ctxdmaIsDuplicate; - pThis->__ctxdmaUnmap__ = &__nvoc_thunk_RsResource_ctxdmaUnmap; + // ctxdmaPreDestruct -- virtual inherited (res) base (rmres) + pThis->__ctxdmaPreDestruct__ = &__nvoc_up_thunk_RsResource_ctxdmaPreDestruct; - pThis->__ctxdmaGetMemInterMapParams__ = &__nvoc_thunk_RmResource_ctxdmaGetMemInterMapParams; + // ctxdmaControl -- virtual inherited (res) base (rmres) + pThis->__ctxdmaControl__ = &__nvoc_up_thunk_RsResource_ctxdmaControl; - pThis->__ctxdmaGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_ctxdmaGetMemoryMappingDescriptor; + // ctxdmaControlFilter -- virtual inherited (res) base (rmres) + pThis->__ctxdmaControlFilter__ = &__nvoc_up_thunk_RsResource_ctxdmaControlFilter; - pThis->__ctxdmaControlFilter__ = &__nvoc_thunk_RsResource_ctxdmaControlFilter; + // ctxdmaMap -- virtual inherited (res) base (rmres) + pThis->__ctxdmaMap__ = &__nvoc_up_thunk_RsResource_ctxdmaMap; - pThis->__ctxdmaUnregisterEvent__ = &__nvoc_thunk_Notifier_ctxdmaUnregisterEvent; + // ctxdmaUnmap -- virtual inherited (res) base (rmres) + pThis->__ctxdmaUnmap__ = &__nvoc_up_thunk_RsResource_ctxdmaUnmap; - pThis->__ctxdmaControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_ctxdmaControlSerialization_Prologue; + // ctxdmaIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body + pThis->__ctxdmaIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_ctxdmaIsPartialUnmapSupported; - pThis->__ctxdmaCanCopy__ = &__nvoc_thunk_RsResource_ctxdmaCanCopy; + // ctxdmaGetRefCount -- virtual inherited (res) base (rmres) + pThis->__ctxdmaGetRefCount__ = &__nvoc_up_thunk_RsResource_ctxdmaGetRefCount; - pThis->__ctxdmaIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_ctxdmaIsPartialUnmapSupported; + // ctxdmaAddAdditionalDependants -- virtual inherited (res) base (rmres) + pThis->__ctxdmaAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_ctxdmaAddAdditionalDependants; - pThis->__ctxdmaPreDestruct__ = &__nvoc_thunk_RsResource_ctxdmaPreDestruct; + // ctxdmaGetNotificationListPtr -- virtual inherited (notify) base (notify) + pThis->__ctxdmaGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_ctxdmaGetNotificationListPtr; - pThis->__ctxdmaIsDuplicate__ = &__nvoc_thunk_RsResource_ctxdmaIsDuplicate; + // ctxdmaGetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__ctxdmaGetNotificationShare__ = &__nvoc_up_thunk_Notifier_ctxdmaGetNotificationShare; - pThis->__ctxdmaControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_ctxdmaControlSerialization_Epilogue; + // ctxdmaSetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__ctxdmaSetNotificationShare__ = &__nvoc_up_thunk_Notifier_ctxdmaSetNotificationShare; - pThis->__ctxdmaGetNotificationListPtr__ = &__nvoc_thunk_Notifier_ctxdmaGetNotificationListPtr; + // ctxdmaUnregisterEvent -- virtual inherited (notify) base (notify) + pThis->__ctxdmaUnregisterEvent__ = &__nvoc_up_thunk_Notifier_ctxdmaUnregisterEvent; - pThis->__ctxdmaGetNotificationShare__ = &__nvoc_thunk_Notifier_ctxdmaGetNotificationShare; + // ctxdmaGetOrAllocNotifShare -- virtual inherited (notify) base (notify) + pThis->__ctxdmaGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_ctxdmaGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_ContextDma_1 with approximately 31 basic block(s). - pThis->__ctxdmaMap__ = &__nvoc_thunk_RsResource_ctxdmaMap; - - pThis->__ctxdmaGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_ctxdmaGetOrAllocNotifShare; -} +// Initialize vtable(s) for 29 virtual method(s). void __nvoc_init_funcTable_ContextDma(ContextDma *pThis) { + + // Initialize vtable(s) with 29 per-object function pointer(s). __nvoc_init_funcTable_ContextDma_1(pThis); } diff --git a/src/nvidia/generated/g_context_dma_nvoc.h b/src/nvidia/generated/g_context_dma_nvoc.h index 02184472fc..300473d5b0 100644 --- a/src/nvidia/generated/g_context_dma_nvoc.h +++ b/src/nvidia/generated/g_context_dma_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_CONTEXT_DMA_NVOC_H_ #define _G_CONTEXT_DMA_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_context_dma_nvoc.h" #ifndef CONTEXT_DMA_H @@ -42,6 +50,7 @@ extern "C" { #include "rmapi/control.h" // for macro RMCTRL_EXPORT etc. #include "nvlimits.h" + struct Device; #ifndef __NVOC_CLASS_Device_TYPEDEF__ @@ -54,6 +63,7 @@ typedef struct Device Device; #endif /* __nvoc_class_id_Device */ + struct Memory; #ifndef __NVOC_CLASS_Memory_TYPEDEF__ @@ -80,48 +90,57 @@ typedef struct Memory Memory; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct ContextDma { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; struct Notifier __nvoc_base_Notifier; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct ContextDma *__nvoc_pbase_ContextDma; - NV_STATUS (*__ctxdmaValidate__)(struct ContextDma *, NvU64, NvU64); - NV_STATUS (*__ctxdmaGetKernelVA__)(struct ContextDma *, NvU64, NvU64, void **, NvU32); - NV_STATUS (*__ctxdmaMapTo__)(struct ContextDma *, struct RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__ctxdmaUnmapFrom__)(struct ContextDma *, struct RS_RES_UNMAP_FROM_PARAMS *); - NV_STATUS (*__ctxdmaCtrlCmdUpdateContextdma__)(struct ContextDma *, NV0002_CTRL_UPDATE_CONTEXTDMA_PARAMS *); - NV_STATUS (*__ctxdmaCtrlCmdBindContextdma__)(struct ContextDma *, NV0002_CTRL_BIND_CONTEXTDMA_PARAMS *); - NV_STATUS (*__ctxdmaCtrlCmdUnbindContextdma__)(struct ContextDma *, NV0002_CTRL_UNBIND_CONTEXTDMA_PARAMS *); - NvBool (*__ctxdmaShareCallback__)(struct ContextDma *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__ctxdmaCheckMemInterUnmap__)(struct ContextDma *, NvBool); - NvBool (*__ctxdmaAccessCallback__)(struct ContextDma *, struct RsClient *, void *, RsAccessRight); - void (*__ctxdmaSetNotificationShare__)(struct ContextDma *, struct NotifShare *); - NvU32 (*__ctxdmaGetRefCount__)(struct ContextDma *); - void (*__ctxdmaAddAdditionalDependants__)(struct RsClient *, struct ContextDma *, RsResourceRef *); - NV_STATUS (*__ctxdmaControl_Prologue__)(struct ContextDma *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__ctxdmaControl_Epilogue__)(struct ContextDma *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__ctxdmaControl__)(struct ContextDma *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__ctxdmaUnmap__)(struct ContextDma *, struct CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__ctxdmaGetMemInterMapParams__)(struct ContextDma *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__ctxdmaGetMemoryMappingDescriptor__)(struct ContextDma *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__ctxdmaControlFilter__)(struct ContextDma *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__ctxdmaUnregisterEvent__)(struct ContextDma *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__ctxdmaControlSerialization_Prologue__)(struct ContextDma *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__ctxdmaCanCopy__)(struct ContextDma *); - NvBool (*__ctxdmaIsPartialUnmapSupported__)(struct ContextDma *); - void (*__ctxdmaPreDestruct__)(struct ContextDma *); - NV_STATUS (*__ctxdmaIsDuplicate__)(struct ContextDma *, NvHandle, NvBool *); - void (*__ctxdmaControlSerialization_Epilogue__)(struct ContextDma *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__ctxdmaGetNotificationListPtr__)(struct ContextDma *); - struct NotifShare *(*__ctxdmaGetNotificationShare__)(struct ContextDma *); - NV_STATUS (*__ctxdmaMap__)(struct ContextDma *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NV_STATUS (*__ctxdmaGetOrAllocNotifShare__)(struct ContextDma *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^3 + struct RsResource *__nvoc_pbase_RsResource; // res super^2 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^2 + struct RmResource *__nvoc_pbase_RmResource; // rmres super + struct INotifier *__nvoc_pbase_INotifier; // inotify super^2 + struct Notifier *__nvoc_pbase_Notifier; // notify super + struct ContextDma *__nvoc_pbase_ContextDma; // ctxdma + + // Vtable with 29 per-object function pointers + NV_STATUS (*__ctxdmaMapTo__)(struct ContextDma * /*this*/, struct RS_RES_MAP_TO_PARAMS *); // virtual override (res) base (rmres) + NV_STATUS (*__ctxdmaUnmapFrom__)(struct ContextDma * /*this*/, struct RS_RES_UNMAP_FROM_PARAMS *); // virtual override (res) base (rmres) + NV_STATUS (*__ctxdmaCtrlCmdUpdateContextdma__)(struct ContextDma * /*this*/, NV0002_CTRL_UPDATE_CONTEXTDMA_PARAMS *); // exported (id=0x20101) + NV_STATUS (*__ctxdmaCtrlCmdBindContextdma__)(struct ContextDma * /*this*/, NV0002_CTRL_BIND_CONTEXTDMA_PARAMS *); // exported (id=0x20102) + NV_STATUS (*__ctxdmaCtrlCmdUnbindContextdma__)(struct ContextDma * /*this*/, NV0002_CTRL_UNBIND_CONTEXTDMA_PARAMS *); // exported (id=0x20103) + NvBool (*__ctxdmaAccessCallback__)(struct ContextDma * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) + NvBool (*__ctxdmaShareCallback__)(struct ContextDma * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__ctxdmaGetMemInterMapParams__)(struct ContextDma * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__ctxdmaCheckMemInterUnmap__)(struct ContextDma * /*this*/, NvBool); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__ctxdmaGetMemoryMappingDescriptor__)(struct ContextDma * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__ctxdmaControlSerialization_Prologue__)(struct ContextDma * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__ctxdmaControlSerialization_Epilogue__)(struct ContextDma * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__ctxdmaControl_Prologue__)(struct ContextDma * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__ctxdmaControl_Epilogue__)(struct ContextDma * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NvBool (*__ctxdmaCanCopy__)(struct ContextDma * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__ctxdmaIsDuplicate__)(struct ContextDma * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (rmres) + void (*__ctxdmaPreDestruct__)(struct ContextDma * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__ctxdmaControl__)(struct ContextDma * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__ctxdmaControlFilter__)(struct ContextDma * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__ctxdmaMap__)(struct ContextDma * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NV_STATUS (*__ctxdmaUnmap__)(struct ContextDma * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NvBool (*__ctxdmaIsPartialUnmapSupported__)(struct ContextDma * /*this*/); // inline virtual inherited (res) base (rmres) body + NvU32 (*__ctxdmaGetRefCount__)(struct ContextDma * /*this*/); // virtual inherited (res) base (rmres) + void (*__ctxdmaAddAdditionalDependants__)(struct RsClient *, struct ContextDma * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) + PEVENTNOTIFICATION * (*__ctxdmaGetNotificationListPtr__)(struct ContextDma * /*this*/); // virtual inherited (notify) base (notify) + struct NotifShare * (*__ctxdmaGetNotificationShare__)(struct ContextDma * /*this*/); // virtual inherited (notify) base (notify) + void (*__ctxdmaSetNotificationShare__)(struct ContextDma * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) + NV_STATUS (*__ctxdmaUnregisterEvent__)(struct ContextDma * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) + NV_STATUS (*__ctxdmaGetOrAllocNotifShare__)(struct ContextDma * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) + + // Data members NvU32 Class; NvU32 Flags; NvBool bReadOnly; @@ -151,6 +170,7 @@ typedef struct ContextDma ContextDma; #define __nvoc_class_id_ContextDma 0x88441b #endif /* __nvoc_class_id_ContextDma */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_ContextDma; #define __staticCast_ContextDma(pThis) \ @@ -163,108 +183,120 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_ContextDma; ((ContextDma*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(ContextDma))) #endif //__nvoc_context_dma_h_disabled - NV_STATUS __nvoc_objCreateDynamic_ContextDma(ContextDma**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_ContextDma(ContextDma**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_ContextDma(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_ContextDma((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) -#define ctxdmaValidate(pContextDma, start, len) ctxdmaValidate_DISPATCH(pContextDma, start, len) -#define ctxdmaGetKernelVA(pContextDma, start, len, arg0, VA_idx) ctxdmaGetKernelVA_DISPATCH(pContextDma, start, len, arg0, VA_idx) + +// Wrapper macros +#define ctxdmaMapTo_FNPTR(pContextDma) pContextDma->__ctxdmaMapTo__ #define ctxdmaMapTo(pContextDma, pParams) ctxdmaMapTo_DISPATCH(pContextDma, pParams) +#define ctxdmaUnmapFrom_FNPTR(pContextDma) pContextDma->__ctxdmaUnmapFrom__ #define ctxdmaUnmapFrom(pContextDma, pParams) ctxdmaUnmapFrom_DISPATCH(pContextDma, pParams) +#define ctxdmaCtrlCmdUpdateContextdma_FNPTR(pContextDma) pContextDma->__ctxdmaCtrlCmdUpdateContextdma__ #define ctxdmaCtrlCmdUpdateContextdma(pContextDma, pUpdateCtxtDmaParams) ctxdmaCtrlCmdUpdateContextdma_DISPATCH(pContextDma, pUpdateCtxtDmaParams) +#define ctxdmaCtrlCmdBindContextdma_FNPTR(pContextDma) pContextDma->__ctxdmaCtrlCmdBindContextdma__ #define ctxdmaCtrlCmdBindContextdma(pContextDma, pBindCtxtDmaParams) ctxdmaCtrlCmdBindContextdma_DISPATCH(pContextDma, pBindCtxtDmaParams) +#define ctxdmaCtrlCmdUnbindContextdma_FNPTR(pContextDma) pContextDma->__ctxdmaCtrlCmdUnbindContextdma__ #define ctxdmaCtrlCmdUnbindContextdma(pContextDma, pUnbindCtxtDmaParams) ctxdmaCtrlCmdUnbindContextdma_DISPATCH(pContextDma, pUnbindCtxtDmaParams) +#define ctxdmaAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define ctxdmaAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) ctxdmaAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define ctxdmaShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ #define ctxdmaShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) ctxdmaShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define ctxdmaGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define ctxdmaGetMemInterMapParams(pRmResource, pParams) ctxdmaGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define ctxdmaCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ #define ctxdmaCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) ctxdmaCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define ctxdmaAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) ctxdmaAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define ctxdmaSetNotificationShare(pNotifier, pNotifShare) ctxdmaSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define ctxdmaGetRefCount(pResource) ctxdmaGetRefCount_DISPATCH(pResource) -#define ctxdmaAddAdditionalDependants(pClient, pResource, pReference) ctxdmaAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define ctxdmaGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define ctxdmaGetMemoryMappingDescriptor(pRmResource, ppMemDesc) ctxdmaGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) +#define ctxdmaControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define ctxdmaControlSerialization_Prologue(pResource, pCallContext, pParams) ctxdmaControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define ctxdmaControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define ctxdmaControlSerialization_Epilogue(pResource, pCallContext, pParams) ctxdmaControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define ctxdmaControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ #define ctxdmaControl_Prologue(pResource, pCallContext, pParams) ctxdmaControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define ctxdmaControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ #define ctxdmaControl_Epilogue(pResource, pCallContext, pParams) ctxdmaControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define ctxdmaCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define ctxdmaCanCopy(pResource) ctxdmaCanCopy_DISPATCH(pResource) +#define ctxdmaIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define ctxdmaIsDuplicate(pResource, hMemory, pDuplicate) ctxdmaIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define ctxdmaPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define ctxdmaPreDestruct(pResource) ctxdmaPreDestruct_DISPATCH(pResource) +#define ctxdmaControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ #define ctxdmaControl(pResource, pCallContext, pParams) ctxdmaControl_DISPATCH(pResource, pCallContext, pParams) -#define ctxdmaUnmap(pResource, pCallContext, pCpuMapping) ctxdmaUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define ctxdmaGetMemInterMapParams(pRmResource, pParams) ctxdmaGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define ctxdmaGetMemoryMappingDescriptor(pRmResource, ppMemDesc) ctxdmaGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) +#define ctxdmaControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ #define ctxdmaControlFilter(pResource, pCallContext, pParams) ctxdmaControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define ctxdmaUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) ctxdmaUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define ctxdmaControlSerialization_Prologue(pResource, pCallContext, pParams) ctxdmaControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define ctxdmaCanCopy(pResource) ctxdmaCanCopy_DISPATCH(pResource) +#define ctxdmaMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define ctxdmaMap(pResource, pCallContext, pParams, pCpuMapping) ctxdmaMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define ctxdmaUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define ctxdmaUnmap(pResource, pCallContext, pCpuMapping) ctxdmaUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define ctxdmaIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ #define ctxdmaIsPartialUnmapSupported(pResource) ctxdmaIsPartialUnmapSupported_DISPATCH(pResource) -#define ctxdmaPreDestruct(pResource) ctxdmaPreDestruct_DISPATCH(pResource) -#define ctxdmaIsDuplicate(pResource, hMemory, pDuplicate) ctxdmaIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define ctxdmaControlSerialization_Epilogue(pResource, pCallContext, pParams) ctxdmaControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define ctxdmaGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define ctxdmaGetRefCount(pResource) ctxdmaGetRefCount_DISPATCH(pResource) +#define ctxdmaAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define ctxdmaAddAdditionalDependants(pClient, pResource, pReference) ctxdmaAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define ctxdmaGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define ctxdmaGetNotificationListPtr(pNotifier) ctxdmaGetNotificationListPtr_DISPATCH(pNotifier) +#define ctxdmaGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ #define ctxdmaGetNotificationShare(pNotifier) ctxdmaGetNotificationShare_DISPATCH(pNotifier) -#define ctxdmaMap(pResource, pCallContext, pParams, pCpuMapping) ctxdmaMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define ctxdmaSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define ctxdmaSetNotificationShare(pNotifier, pNotifShare) ctxdmaSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define ctxdmaUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define ctxdmaUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) ctxdmaUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define ctxdmaGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ #define ctxdmaGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) ctxdmaGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -NV_STATUS ctxdmaValidate_IMPL(struct ContextDma *pContextDma, NvU64 start, NvU64 len); - -static inline NV_STATUS ctxdmaValidate_DISPATCH(struct ContextDma *pContextDma, NvU64 start, NvU64 len) { - return pContextDma->__ctxdmaValidate__(pContextDma, start, len); -} - -NV_STATUS ctxdmaGetKernelVA_IMPL(struct ContextDma *pContextDma, NvU64 start, NvU64 len, void **arg0, NvU32 VA_idx); - -static inline NV_STATUS ctxdmaGetKernelVA_DISPATCH(struct ContextDma *pContextDma, NvU64 start, NvU64 len, void **arg0, NvU32 VA_idx) { - return pContextDma->__ctxdmaGetKernelVA__(pContextDma, start, len, arg0, VA_idx); -} - -NV_STATUS ctxdmaMapTo_IMPL(struct ContextDma *pContextDma, struct RS_RES_MAP_TO_PARAMS *pParams); +// Dispatch functions static inline NV_STATUS ctxdmaMapTo_DISPATCH(struct ContextDma *pContextDma, struct RS_RES_MAP_TO_PARAMS *pParams) { return pContextDma->__ctxdmaMapTo__(pContextDma, pParams); } -NV_STATUS ctxdmaUnmapFrom_IMPL(struct ContextDma *pContextDma, struct RS_RES_UNMAP_FROM_PARAMS *pParams); - static inline NV_STATUS ctxdmaUnmapFrom_DISPATCH(struct ContextDma *pContextDma, struct RS_RES_UNMAP_FROM_PARAMS *pParams) { return pContextDma->__ctxdmaUnmapFrom__(pContextDma, pParams); } -NV_STATUS ctxdmaCtrlCmdUpdateContextdma_IMPL(struct ContextDma *pContextDma, NV0002_CTRL_UPDATE_CONTEXTDMA_PARAMS *pUpdateCtxtDmaParams); - static inline NV_STATUS ctxdmaCtrlCmdUpdateContextdma_DISPATCH(struct ContextDma *pContextDma, NV0002_CTRL_UPDATE_CONTEXTDMA_PARAMS *pUpdateCtxtDmaParams) { return pContextDma->__ctxdmaCtrlCmdUpdateContextdma__(pContextDma, pUpdateCtxtDmaParams); } -NV_STATUS ctxdmaCtrlCmdBindContextdma_IMPL(struct ContextDma *pContextDma, NV0002_CTRL_BIND_CONTEXTDMA_PARAMS *pBindCtxtDmaParams); - static inline NV_STATUS ctxdmaCtrlCmdBindContextdma_DISPATCH(struct ContextDma *pContextDma, NV0002_CTRL_BIND_CONTEXTDMA_PARAMS *pBindCtxtDmaParams) { return pContextDma->__ctxdmaCtrlCmdBindContextdma__(pContextDma, pBindCtxtDmaParams); } -NV_STATUS ctxdmaCtrlCmdUnbindContextdma_IMPL(struct ContextDma *pContextDma, NV0002_CTRL_UNBIND_CONTEXTDMA_PARAMS *pUnbindCtxtDmaParams); - static inline NV_STATUS ctxdmaCtrlCmdUnbindContextdma_DISPATCH(struct ContextDma *pContextDma, NV0002_CTRL_UNBIND_CONTEXTDMA_PARAMS *pUnbindCtxtDmaParams) { return pContextDma->__ctxdmaCtrlCmdUnbindContextdma__(pContextDma, pUnbindCtxtDmaParams); } +static inline NvBool ctxdmaAccessCallback_DISPATCH(struct ContextDma *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__ctxdmaAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +} + static inline NvBool ctxdmaShareCallback_DISPATCH(struct ContextDma *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return pResource->__ctxdmaShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline NV_STATUS ctxdmaCheckMemInterUnmap_DISPATCH(struct ContextDma *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__ctxdmaCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS ctxdmaGetMemInterMapParams_DISPATCH(struct ContextDma *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__ctxdmaGetMemInterMapParams__(pRmResource, pParams); } -static inline NvBool ctxdmaAccessCallback_DISPATCH(struct ContextDma *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__ctxdmaAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS ctxdmaCheckMemInterUnmap_DISPATCH(struct ContextDma *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__ctxdmaCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline void ctxdmaSetNotificationShare_DISPATCH(struct ContextDma *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__ctxdmaSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS ctxdmaGetMemoryMappingDescriptor_DISPATCH(struct ContextDma *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__ctxdmaGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NvU32 ctxdmaGetRefCount_DISPATCH(struct ContextDma *pResource) { - return pResource->__ctxdmaGetRefCount__(pResource); +static inline NV_STATUS ctxdmaControlSerialization_Prologue_DISPATCH(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__ctxdmaControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline void ctxdmaAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ContextDma *pResource, RsResourceRef *pReference) { - pResource->__ctxdmaAddAdditionalDependants__(pClient, pResource, pReference); +static inline void ctxdmaControlSerialization_Epilogue_DISPATCH(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__ctxdmaControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS ctxdmaControl_Prologue_DISPATCH(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { @@ -275,76 +307,104 @@ static inline void ctxdmaControl_Epilogue_DISPATCH(struct ContextDma *pResource, pResource->__ctxdmaControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS ctxdmaControl_DISPATCH(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ctxdmaControl__(pResource, pCallContext, pParams); +static inline NvBool ctxdmaCanCopy_DISPATCH(struct ContextDma *pResource) { + return pResource->__ctxdmaCanCopy__(pResource); } -static inline NV_STATUS ctxdmaUnmap_DISPATCH(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__ctxdmaUnmap__(pResource, pCallContext, pCpuMapping); +static inline NV_STATUS ctxdmaIsDuplicate_DISPATCH(struct ContextDma *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__ctxdmaIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS ctxdmaGetMemInterMapParams_DISPATCH(struct ContextDma *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__ctxdmaGetMemInterMapParams__(pRmResource, pParams); +static inline void ctxdmaPreDestruct_DISPATCH(struct ContextDma *pResource) { + pResource->__ctxdmaPreDestruct__(pResource); } -static inline NV_STATUS ctxdmaGetMemoryMappingDescriptor_DISPATCH(struct ContextDma *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__ctxdmaGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS ctxdmaControl_DISPATCH(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__ctxdmaControl__(pResource, pCallContext, pParams); } static inline NV_STATUS ctxdmaControlFilter_DISPATCH(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__ctxdmaControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS ctxdmaUnregisterEvent_DISPATCH(struct ContextDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__ctxdmaUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static inline NV_STATUS ctxdmaControlSerialization_Prologue_DISPATCH(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ctxdmaControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS ctxdmaMap_DISPATCH(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__ctxdmaMap__(pResource, pCallContext, pParams, pCpuMapping); } -static inline NvBool ctxdmaCanCopy_DISPATCH(struct ContextDma *pResource) { - return pResource->__ctxdmaCanCopy__(pResource); +static inline NV_STATUS ctxdmaUnmap_DISPATCH(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pResource->__ctxdmaUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool ctxdmaIsPartialUnmapSupported_DISPATCH(struct ContextDma *pResource) { return pResource->__ctxdmaIsPartialUnmapSupported__(pResource); } -static inline void ctxdmaPreDestruct_DISPATCH(struct ContextDma *pResource) { - pResource->__ctxdmaPreDestruct__(pResource); -} - -static inline NV_STATUS ctxdmaIsDuplicate_DISPATCH(struct ContextDma *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__ctxdmaIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NvU32 ctxdmaGetRefCount_DISPATCH(struct ContextDma *pResource) { + return pResource->__ctxdmaGetRefCount__(pResource); } -static inline void ctxdmaControlSerialization_Epilogue_DISPATCH(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__ctxdmaControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline void ctxdmaAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ContextDma *pResource, RsResourceRef *pReference) { + pResource->__ctxdmaAddAdditionalDependants__(pClient, pResource, pReference); } -static inline PEVENTNOTIFICATION *ctxdmaGetNotificationListPtr_DISPATCH(struct ContextDma *pNotifier) { +static inline PEVENTNOTIFICATION * ctxdmaGetNotificationListPtr_DISPATCH(struct ContextDma *pNotifier) { return pNotifier->__ctxdmaGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *ctxdmaGetNotificationShare_DISPATCH(struct ContextDma *pNotifier) { +static inline struct NotifShare * ctxdmaGetNotificationShare_DISPATCH(struct ContextDma *pNotifier) { return pNotifier->__ctxdmaGetNotificationShare__(pNotifier); } -static inline NV_STATUS ctxdmaMap_DISPATCH(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__ctxdmaMap__(pResource, pCallContext, pParams, pCpuMapping); +static inline void ctxdmaSetNotificationShare_DISPATCH(struct ContextDma *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__ctxdmaSetNotificationShare__(pNotifier, pNotifShare); +} + +static inline NV_STATUS ctxdmaUnregisterEvent_DISPATCH(struct ContextDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__ctxdmaUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS ctxdmaGetOrAllocNotifShare_DISPATCH(struct ContextDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return pNotifier->__ctxdmaGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } +NV_STATUS ctxdmaMapTo_IMPL(struct ContextDma *pContextDma, struct RS_RES_MAP_TO_PARAMS *pParams); + +NV_STATUS ctxdmaUnmapFrom_IMPL(struct ContextDma *pContextDma, struct RS_RES_UNMAP_FROM_PARAMS *pParams); + +NV_STATUS ctxdmaCtrlCmdUpdateContextdma_IMPL(struct ContextDma *pContextDma, NV0002_CTRL_UPDATE_CONTEXTDMA_PARAMS *pUpdateCtxtDmaParams); + +NV_STATUS ctxdmaCtrlCmdBindContextdma_IMPL(struct ContextDma *pContextDma, NV0002_CTRL_BIND_CONTEXTDMA_PARAMS *pBindCtxtDmaParams); + +NV_STATUS ctxdmaCtrlCmdUnbindContextdma_IMPL(struct ContextDma *pContextDma, NV0002_CTRL_UNBIND_CONTEXTDMA_PARAMS *pUnbindCtxtDmaParams); + NV_STATUS ctxdmaConstruct_IMPL(struct ContextDma *arg_pCtxdma, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_ctxdmaConstruct(arg_pCtxdma, arg_pCallContext, arg_pParams) ctxdmaConstruct_IMPL(arg_pCtxdma, arg_pCallContext, arg_pParams) void ctxdmaDestruct_IMPL(struct ContextDma *pCtxdma); #define __nvoc_ctxdmaDestruct(pCtxdma) ctxdmaDestruct_IMPL(pCtxdma) +NV_STATUS ctxdmaValidate_IMPL(struct ContextDma *pContextDma, NvU64 start, NvU64 len); + +#ifdef __nvoc_context_dma_h_disabled +static inline NV_STATUS ctxdmaValidate(struct ContextDma *pContextDma, NvU64 start, NvU64 len) { + NV_ASSERT_FAILED_PRECOMP("ContextDma was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_context_dma_h_disabled +#define ctxdmaValidate(pContextDma, start, len) ctxdmaValidate_IMPL(pContextDma, start, len) +#endif //__nvoc_context_dma_h_disabled + +NV_STATUS ctxdmaGetKernelVA_IMPL(struct ContextDma *pContextDma, NvU64 start, NvU64 len, void **arg4, NvU32 VA_idx); + +#ifdef __nvoc_context_dma_h_disabled +static inline NV_STATUS ctxdmaGetKernelVA(struct ContextDma *pContextDma, NvU64 start, NvU64 len, void **arg4, NvU32 VA_idx) { + NV_ASSERT_FAILED_PRECOMP("ContextDma was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_context_dma_h_disabled +#define ctxdmaGetKernelVA(pContextDma, start, len, arg4, VA_idx) ctxdmaGetKernelVA_IMPL(pContextDma, start, len, arg4, VA_idx) +#endif //__nvoc_context_dma_h_disabled + NvBool ctxdmaIsBound_IMPL(struct ContextDma *pContextDma); #ifdef __nvoc_context_dma_h_disabled @@ -356,9 +416,9 @@ static inline NvBool ctxdmaIsBound(struct ContextDma *pContextDma) { #define ctxdmaIsBound(pContextDma) ctxdmaIsBound_IMPL(pContextDma) #endif //__nvoc_context_dma_h_disabled -NV_STATUS ctxdmaGetByHandle_IMPL(struct RsClient *pClient, NvHandle hContextDma, struct ContextDma **arg0); +NV_STATUS ctxdmaGetByHandle_IMPL(struct RsClient *pClient, NvHandle hContextDma, struct ContextDma **arg3); -#define ctxdmaGetByHandle(pClient, hContextDma, arg0) ctxdmaGetByHandle_IMPL(pClient, hContextDma, arg0) +#define ctxdmaGetByHandle(pClient, hContextDma, arg3) ctxdmaGetByHandle_IMPL(pClient, hContextDma, arg3) #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_crashcat_engine_nvoc.c b/src/nvidia/generated/g_crashcat_engine_nvoc.c index c50976f865..53698601c2 100644 --- a/src/nvidia/generated/g_crashcat_engine_nvoc.c +++ b/src/nvidia/generated/g_crashcat_engine_nvoc.c @@ -88,31 +88,46 @@ NV_STATUS __nvoc_ctor_CrashCatEngine(CrashCatEngine *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_CrashCatEngine_1(CrashCatEngine *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // crashcatEngineUnload -- virtual pThis->__crashcatEngineUnload__ = &crashcatEngineUnload_IMPL; + // crashcatEngineConfigured -- pure virtual pThis->__crashcatEngineConfigured__ = NULL; + // crashcatEngineVprintf -- pure virtual pThis->__crashcatEngineVprintf__ = NULL; + // crashcatEnginePriRead -- pure virtual pThis->__crashcatEnginePriRead__ = NULL; + // crashcatEnginePriWrite -- pure virtual pThis->__crashcatEnginePriWrite__ = NULL; + // crashcatEngineMapBufferDescriptor -- pure virtual pThis->__crashcatEngineMapBufferDescriptor__ = NULL; + // crashcatEngineUnmapBufferDescriptor -- pure virtual pThis->__crashcatEngineUnmapBufferDescriptor__ = NULL; + // crashcatEngineSyncBufferDescriptor -- pure virtual pThis->__crashcatEngineSyncBufferDescriptor__ = NULL; + // crashcatEngineGetScratchOffsets -- pure virtual pThis->__crashcatEngineGetScratchOffsets__ = NULL; + // crashcatEngineGetWFL0Offset -- pure virtual pThis->__crashcatEngineGetWFL0Offset__ = NULL; -} +} // End __nvoc_init_funcTable_CrashCatEngine_1 with approximately 10 basic block(s). + +// Initialize vtable(s) for 10 virtual method(s). void __nvoc_init_funcTable_CrashCatEngine(CrashCatEngine *pThis) { + + // Initialize vtable(s) with 10 per-object function pointer(s). __nvoc_init_funcTable_CrashCatEngine_1(pThis); } diff --git a/src/nvidia/generated/g_crashcat_engine_nvoc.h b/src/nvidia/generated/g_crashcat_engine_nvoc.h index 08839cb449..cfe53e5589 100644 --- a/src/nvidia/generated/g_crashcat_engine_nvoc.h +++ b/src/nvidia/generated/g_crashcat_engine_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_CRASHCAT_ENGINE_NVOC_H_ #define _G_CRASHCAT_ENGINE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_crashcat_engine_nvoc.h" #ifndef CRASHCAT_ENGINE_H @@ -39,6 +47,7 @@ extern "C" { #include "nvport/inline/util_valist.h" #include "nv-crashcat.h" + struct CrashCatReport; #ifndef __NVOC_CLASS_CrashCatReport_TYPEDEF__ @@ -51,6 +60,7 @@ typedef struct CrashCatReport CrashCatReport; #endif /* __nvoc_class_id_CrashCatReport */ + struct CrashCatWayfinder; #ifndef __NVOC_CLASS_CrashCatWayfinder_TYPEDEF__ @@ -89,19 +99,28 @@ MAKE_INTRUSIVE_MAP(CrashCatMappedBufferMap, CrashCatBufferDescriptor, mappedBuff #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct CrashCatEngine { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; - struct CrashCatEngine *__nvoc_pbase_CrashCatEngine; - void (*__crashcatEngineUnload__)(struct CrashCatEngine *); - NvBool (*__crashcatEngineConfigured__)(struct CrashCatEngine *); - void (*__crashcatEngineVprintf__)(struct CrashCatEngine *, NvBool, const char *, va_list); - NvU32 (*__crashcatEnginePriRead__)(struct CrashCatEngine *, NvU32); - void (*__crashcatEnginePriWrite__)(struct CrashCatEngine *, NvU32, NvU32); - void *(*__crashcatEngineMapBufferDescriptor__)(struct CrashCatEngine *, CrashCatBufferDescriptor *); - void (*__crashcatEngineUnmapBufferDescriptor__)(struct CrashCatEngine *, CrashCatBufferDescriptor *); - void (*__crashcatEngineSyncBufferDescriptor__)(struct CrashCatEngine *, CrashCatBufferDescriptor *, NvU32, NvU32); - const NvU32 *(*__crashcatEngineGetScratchOffsets__)(struct CrashCatEngine *, NV_CRASHCAT_SCRATCH_GROUP_ID); - NvU32 (*__crashcatEngineGetWFL0Offset__)(struct CrashCatEngine *); + + // Ancestor object pointers for `staticCast` feature + struct CrashCatEngine *__nvoc_pbase_CrashCatEngine; // crashcatEngine + + // Vtable with 10 per-object function pointers + void (*__crashcatEngineUnload__)(struct CrashCatEngine * /*this*/); // virtual + NvBool (*__crashcatEngineConfigured__)(struct CrashCatEngine * /*this*/); // pure virtual + void (*__crashcatEngineVprintf__)(struct CrashCatEngine * /*this*/, NvBool, const char *, va_list); // pure virtual + NvU32 (*__crashcatEnginePriRead__)(struct CrashCatEngine * /*this*/, NvU32); // pure virtual + void (*__crashcatEnginePriWrite__)(struct CrashCatEngine * /*this*/, NvU32, NvU32); // pure virtual + void * (*__crashcatEngineMapBufferDescriptor__)(struct CrashCatEngine * /*this*/, CrashCatBufferDescriptor *); // pure virtual + void (*__crashcatEngineUnmapBufferDescriptor__)(struct CrashCatEngine * /*this*/, CrashCatBufferDescriptor *); // pure virtual + void (*__crashcatEngineSyncBufferDescriptor__)(struct CrashCatEngine * /*this*/, CrashCatBufferDescriptor *, NvU32, NvU32); // pure virtual + const NvU32 * (*__crashcatEngineGetScratchOffsets__)(struct CrashCatEngine * /*this*/, NV_CRASHCAT_SCRATCH_GROUP_ID); // pure virtual + NvU32 (*__crashcatEngineGetWFL0Offset__)(struct CrashCatEngine * /*this*/); // pure virtual + + // Data members NvBool PRIVATE_FIELD(bEnabled); struct CrashCatWayfinder *PRIVATE_FIELD(pWayfinder); CrashCatRegisteredBufferMap PRIVATE_FIELD(registeredCrashBuffers); @@ -117,6 +136,7 @@ typedef struct CrashCatEngine CrashCatEngine; #define __nvoc_class_id_CrashCatEngine 0x654166 #endif /* __nvoc_class_id_CrashCatEngine */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_CrashCatEngine; #define __staticCast_CrashCatEngine(pThis) \ @@ -129,143 +149,156 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_CrashCatEngine; ((CrashCatEngine*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(CrashCatEngine))) #endif //__nvoc_crashcat_engine_h_disabled - NV_STATUS __nvoc_objCreateDynamic_CrashCatEngine(CrashCatEngine**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_CrashCatEngine(CrashCatEngine**, Dynamic*, NvU32); #define __objCreate_CrashCatEngine(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_CrashCatEngine((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define crashcatEngineUnload(arg0) crashcatEngineUnload_DISPATCH(arg0) -#define crashcatEngineConfigured(arg0) crashcatEngineConfigured_DISPATCH(arg0) -#define crashcatEngineVprintf(arg0, bReportStart, fmt, args) crashcatEngineVprintf_DISPATCH(arg0, bReportStart, fmt, args) -#define crashcatEnginePriRead(arg0, offset) crashcatEnginePriRead_DISPATCH(arg0, offset) -#define crashcatEnginePriWrite(arg0, offset, data) crashcatEnginePriWrite_DISPATCH(arg0, offset, data) -#define crashcatEngineMapBufferDescriptor(arg0, pBufDesc) crashcatEngineMapBufferDescriptor_DISPATCH(arg0, pBufDesc) -#define crashcatEngineUnmapBufferDescriptor(arg0, pBufDesc) crashcatEngineUnmapBufferDescriptor_DISPATCH(arg0, pBufDesc) -#define crashcatEngineSyncBufferDescriptor(arg0, pBufDesc, offset, size) crashcatEngineSyncBufferDescriptor_DISPATCH(arg0, pBufDesc, offset, size) -#define crashcatEngineGetScratchOffsets(arg0, scratchId) crashcatEngineGetScratchOffsets_DISPATCH(arg0, scratchId) -#define crashcatEngineGetWFL0Offset(arg0) crashcatEngineGetWFL0Offset_DISPATCH(arg0) -void crashcatEngineUnload_IMPL(struct CrashCatEngine *arg0); - -static inline void crashcatEngineUnload_DISPATCH(struct CrashCatEngine *arg0) { - arg0->__crashcatEngineUnload__(arg0); + +// Wrapper macros +#define crashcatEngineUnload_FNPTR(arg_this) arg_this->__crashcatEngineUnload__ +#define crashcatEngineUnload(arg_this) crashcatEngineUnload_DISPATCH(arg_this) +#define crashcatEngineConfigured_FNPTR(arg_this) arg_this->__crashcatEngineConfigured__ +#define crashcatEngineConfigured(arg_this) crashcatEngineConfigured_DISPATCH(arg_this) +#define crashcatEngineVprintf_FNPTR(arg_this) arg_this->__crashcatEngineVprintf__ +#define crashcatEngineVprintf(arg_this, bReportStart, fmt, args) crashcatEngineVprintf_DISPATCH(arg_this, bReportStart, fmt, args) +#define crashcatEnginePriRead_FNPTR(arg_this) arg_this->__crashcatEnginePriRead__ +#define crashcatEnginePriRead(arg_this, offset) crashcatEnginePriRead_DISPATCH(arg_this, offset) +#define crashcatEnginePriWrite_FNPTR(arg_this) arg_this->__crashcatEnginePriWrite__ +#define crashcatEnginePriWrite(arg_this, offset, data) crashcatEnginePriWrite_DISPATCH(arg_this, offset, data) +#define crashcatEngineMapBufferDescriptor_FNPTR(arg_this) arg_this->__crashcatEngineMapBufferDescriptor__ +#define crashcatEngineMapBufferDescriptor(arg_this, pBufDesc) crashcatEngineMapBufferDescriptor_DISPATCH(arg_this, pBufDesc) +#define crashcatEngineUnmapBufferDescriptor_FNPTR(arg_this) arg_this->__crashcatEngineUnmapBufferDescriptor__ +#define crashcatEngineUnmapBufferDescriptor(arg_this, pBufDesc) crashcatEngineUnmapBufferDescriptor_DISPATCH(arg_this, pBufDesc) +#define crashcatEngineSyncBufferDescriptor_FNPTR(arg_this) arg_this->__crashcatEngineSyncBufferDescriptor__ +#define crashcatEngineSyncBufferDescriptor(arg_this, pBufDesc, offset, size) crashcatEngineSyncBufferDescriptor_DISPATCH(arg_this, pBufDesc, offset, size) +#define crashcatEngineGetScratchOffsets_FNPTR(arg_this) arg_this->__crashcatEngineGetScratchOffsets__ +#define crashcatEngineGetScratchOffsets(arg_this, scratchId) crashcatEngineGetScratchOffsets_DISPATCH(arg_this, scratchId) +#define crashcatEngineGetWFL0Offset_FNPTR(arg_this) arg_this->__crashcatEngineGetWFL0Offset__ +#define crashcatEngineGetWFL0Offset(arg_this) crashcatEngineGetWFL0Offset_DISPATCH(arg_this) + +// Dispatch functions +static inline void crashcatEngineUnload_DISPATCH(struct CrashCatEngine *arg_this) { + arg_this->__crashcatEngineUnload__(arg_this); } -static inline NvBool crashcatEngineConfigured_DISPATCH(struct CrashCatEngine *arg0) { - return arg0->__crashcatEngineConfigured__(arg0); +static inline NvBool crashcatEngineConfigured_DISPATCH(struct CrashCatEngine *arg_this) { + return arg_this->__crashcatEngineConfigured__(arg_this); } -static inline void crashcatEngineVprintf_DISPATCH(struct CrashCatEngine *arg0, NvBool bReportStart, const char *fmt, va_list args) { - arg0->__crashcatEngineVprintf__(arg0, bReportStart, fmt, args); +static inline void crashcatEngineVprintf_DISPATCH(struct CrashCatEngine *arg_this, NvBool bReportStart, const char *fmt, va_list args) { + arg_this->__crashcatEngineVprintf__(arg_this, bReportStart, fmt, args); } -static inline NvU32 crashcatEnginePriRead_DISPATCH(struct CrashCatEngine *arg0, NvU32 offset) { - return arg0->__crashcatEnginePriRead__(arg0, offset); +static inline NvU32 crashcatEnginePriRead_DISPATCH(struct CrashCatEngine *arg_this, NvU32 offset) { + return arg_this->__crashcatEnginePriRead__(arg_this, offset); } -static inline void crashcatEnginePriWrite_DISPATCH(struct CrashCatEngine *arg0, NvU32 offset, NvU32 data) { - arg0->__crashcatEnginePriWrite__(arg0, offset, data); +static inline void crashcatEnginePriWrite_DISPATCH(struct CrashCatEngine *arg_this, NvU32 offset, NvU32 data) { + arg_this->__crashcatEnginePriWrite__(arg_this, offset, data); } -static inline void *crashcatEngineMapBufferDescriptor_DISPATCH(struct CrashCatEngine *arg0, CrashCatBufferDescriptor *pBufDesc) { - return arg0->__crashcatEngineMapBufferDescriptor__(arg0, pBufDesc); +static inline void * crashcatEngineMapBufferDescriptor_DISPATCH(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc) { + return arg_this->__crashcatEngineMapBufferDescriptor__(arg_this, pBufDesc); } -static inline void crashcatEngineUnmapBufferDescriptor_DISPATCH(struct CrashCatEngine *arg0, CrashCatBufferDescriptor *pBufDesc) { - arg0->__crashcatEngineUnmapBufferDescriptor__(arg0, pBufDesc); +static inline void crashcatEngineUnmapBufferDescriptor_DISPATCH(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc) { + arg_this->__crashcatEngineUnmapBufferDescriptor__(arg_this, pBufDesc); } -static inline void crashcatEngineSyncBufferDescriptor_DISPATCH(struct CrashCatEngine *arg0, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { - arg0->__crashcatEngineSyncBufferDescriptor__(arg0, pBufDesc, offset, size); +static inline void crashcatEngineSyncBufferDescriptor_DISPATCH(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { + arg_this->__crashcatEngineSyncBufferDescriptor__(arg_this, pBufDesc, offset, size); } -static inline const NvU32 *crashcatEngineGetScratchOffsets_DISPATCH(struct CrashCatEngine *arg0, NV_CRASHCAT_SCRATCH_GROUP_ID scratchId) { - return arg0->__crashcatEngineGetScratchOffsets__(arg0, scratchId); +static inline const NvU32 * crashcatEngineGetScratchOffsets_DISPATCH(struct CrashCatEngine *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchId) { + return arg_this->__crashcatEngineGetScratchOffsets__(arg_this, scratchId); } -static inline NvU32 crashcatEngineGetWFL0Offset_DISPATCH(struct CrashCatEngine *arg0) { - return arg0->__crashcatEngineGetWFL0Offset__(arg0); +static inline NvU32 crashcatEngineGetWFL0Offset_DISPATCH(struct CrashCatEngine *arg_this) { + return arg_this->__crashcatEngineGetWFL0Offset__(arg_this); } +void crashcatEngineUnload_IMPL(struct CrashCatEngine *arg1); + NV_STATUS crashcatEngineConstruct_IMPL(struct CrashCatEngine *arg_); #define __nvoc_crashcatEngineConstruct(arg_) crashcatEngineConstruct_IMPL(arg_) -void crashcatEngineDestruct_IMPL(struct CrashCatEngine *arg0); +void crashcatEngineDestruct_IMPL(struct CrashCatEngine *arg1); -#define __nvoc_crashcatEngineDestruct(arg0) crashcatEngineDestruct_IMPL(arg0) -struct CrashCatReport *crashcatEngineGetNextCrashReport_IMPL(struct CrashCatEngine *arg0); +#define __nvoc_crashcatEngineDestruct(arg1) crashcatEngineDestruct_IMPL(arg1) +struct CrashCatReport *crashcatEngineGetNextCrashReport_IMPL(struct CrashCatEngine *arg1); #ifdef __nvoc_crashcat_engine_h_disabled -static inline struct CrashCatReport *crashcatEngineGetNextCrashReport(struct CrashCatEngine *arg0) { +static inline struct CrashCatReport *crashcatEngineGetNextCrashReport(struct CrashCatEngine *arg1) { NV_ASSERT_FAILED_PRECOMP("CrashCatEngine was disabled!"); return NULL; } #else //__nvoc_crashcat_engine_h_disabled -#define crashcatEngineGetNextCrashReport(arg0) crashcatEngineGetNextCrashReport_IMPL(arg0) +#define crashcatEngineGetNextCrashReport(arg1) crashcatEngineGetNextCrashReport_IMPL(arg1) #endif //__nvoc_crashcat_engine_h_disabled -NV_STATUS crashcatEngineRegisterCrashBuffer_IMPL(struct CrashCatEngine *arg0, NV_CRASHCAT_MEM_APERTURE aperture, NvU64 offset, NvU64 size, void *pEngPriv); +NV_STATUS crashcatEngineRegisterCrashBuffer_IMPL(struct CrashCatEngine *arg1, NV_CRASHCAT_MEM_APERTURE aperture, NvU64 offset, NvU64 size, void *pEngPriv); #ifdef __nvoc_crashcat_engine_h_disabled -static inline NV_STATUS crashcatEngineRegisterCrashBuffer(struct CrashCatEngine *arg0, NV_CRASHCAT_MEM_APERTURE aperture, NvU64 offset, NvU64 size, void *pEngPriv) { +static inline NV_STATUS crashcatEngineRegisterCrashBuffer(struct CrashCatEngine *arg1, NV_CRASHCAT_MEM_APERTURE aperture, NvU64 offset, NvU64 size, void *pEngPriv) { NV_ASSERT_FAILED_PRECOMP("CrashCatEngine was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_crashcat_engine_h_disabled -#define crashcatEngineRegisterCrashBuffer(arg0, aperture, offset, size, pEngPriv) crashcatEngineRegisterCrashBuffer_IMPL(arg0, aperture, offset, size, pEngPriv) +#define crashcatEngineRegisterCrashBuffer(arg1, aperture, offset, size, pEngPriv) crashcatEngineRegisterCrashBuffer_IMPL(arg1, aperture, offset, size, pEngPriv) #endif //__nvoc_crashcat_engine_h_disabled -void crashcatEngineUnregisterCrashBuffer_IMPL(struct CrashCatEngine *arg0, NV_CRASHCAT_MEM_APERTURE aperture, NvU64 offset, NvU64 size); +void crashcatEngineUnregisterCrashBuffer_IMPL(struct CrashCatEngine *arg1, NV_CRASHCAT_MEM_APERTURE aperture, NvU64 offset, NvU64 size); #ifdef __nvoc_crashcat_engine_h_disabled -static inline void crashcatEngineUnregisterCrashBuffer(struct CrashCatEngine *arg0, NV_CRASHCAT_MEM_APERTURE aperture, NvU64 offset, NvU64 size) { +static inline void crashcatEngineUnregisterCrashBuffer(struct CrashCatEngine *arg1, NV_CRASHCAT_MEM_APERTURE aperture, NvU64 offset, NvU64 size) { NV_ASSERT_FAILED_PRECOMP("CrashCatEngine was disabled!"); } #else //__nvoc_crashcat_engine_h_disabled -#define crashcatEngineUnregisterCrashBuffer(arg0, aperture, offset, size) crashcatEngineUnregisterCrashBuffer_IMPL(arg0, aperture, offset, size) +#define crashcatEngineUnregisterCrashBuffer(arg1, aperture, offset, size) crashcatEngineUnregisterCrashBuffer_IMPL(arg1, aperture, offset, size) #endif //__nvoc_crashcat_engine_h_disabled -void *crashcatEngineMapCrashBuffer_IMPL(struct CrashCatEngine *arg0, NV_CRASHCAT_MEM_APERTURE aperture, NvU64 offset, NvU64 size); +void *crashcatEngineMapCrashBuffer_IMPL(struct CrashCatEngine *arg1, NV_CRASHCAT_MEM_APERTURE aperture, NvU64 offset, NvU64 size); #ifdef __nvoc_crashcat_engine_h_disabled -static inline void *crashcatEngineMapCrashBuffer(struct CrashCatEngine *arg0, NV_CRASHCAT_MEM_APERTURE aperture, NvU64 offset, NvU64 size) { +static inline void *crashcatEngineMapCrashBuffer(struct CrashCatEngine *arg1, NV_CRASHCAT_MEM_APERTURE aperture, NvU64 offset, NvU64 size) { NV_ASSERT_FAILED_PRECOMP("CrashCatEngine was disabled!"); return NULL; } #else //__nvoc_crashcat_engine_h_disabled -#define crashcatEngineMapCrashBuffer(arg0, aperture, offset, size) crashcatEngineMapCrashBuffer_IMPL(arg0, aperture, offset, size) +#define crashcatEngineMapCrashBuffer(arg1, aperture, offset, size) crashcatEngineMapCrashBuffer_IMPL(arg1, aperture, offset, size) #endif //__nvoc_crashcat_engine_h_disabled -void crashcatEngineUnmapCrashBuffer_IMPL(struct CrashCatEngine *arg0, void *ptr); +void crashcatEngineUnmapCrashBuffer_IMPL(struct CrashCatEngine *arg1, void *ptr); #ifdef __nvoc_crashcat_engine_h_disabled -static inline void crashcatEngineUnmapCrashBuffer(struct CrashCatEngine *arg0, void *ptr) { +static inline void crashcatEngineUnmapCrashBuffer(struct CrashCatEngine *arg1, void *ptr) { NV_ASSERT_FAILED_PRECOMP("CrashCatEngine was disabled!"); } #else //__nvoc_crashcat_engine_h_disabled -#define crashcatEngineUnmapCrashBuffer(arg0, ptr) crashcatEngineUnmapCrashBuffer_IMPL(arg0, ptr) +#define crashcatEngineUnmapCrashBuffer(arg1, ptr) crashcatEngineUnmapCrashBuffer_IMPL(arg1, ptr) #endif //__nvoc_crashcat_engine_h_disabled -void crashcatEngineSyncCrashBuffer_IMPL(struct CrashCatEngine *arg0, void *ptr, NvU32 offset, NvU32 size); +void crashcatEngineSyncCrashBuffer_IMPL(struct CrashCatEngine *arg1, void *ptr, NvU32 offset, NvU32 size); #ifdef __nvoc_crashcat_engine_h_disabled -static inline void crashcatEngineSyncCrashBuffer(struct CrashCatEngine *arg0, void *ptr, NvU32 offset, NvU32 size) { +static inline void crashcatEngineSyncCrashBuffer(struct CrashCatEngine *arg1, void *ptr, NvU32 offset, NvU32 size) { NV_ASSERT_FAILED_PRECOMP("CrashCatEngine was disabled!"); } #else //__nvoc_crashcat_engine_h_disabled -#define crashcatEngineSyncCrashBuffer(arg0, ptr, offset, size) crashcatEngineSyncCrashBuffer_IMPL(arg0, ptr, offset, size) +#define crashcatEngineSyncCrashBuffer(arg1, ptr, offset, size) crashcatEngineSyncCrashBuffer_IMPL(arg1, ptr, offset, size) #endif //__nvoc_crashcat_engine_h_disabled -NV_STATUS crashcatEngineLoadWayfinder_IMPL(struct CrashCatEngine *arg0); +NV_STATUS crashcatEngineLoadWayfinder_IMPL(struct CrashCatEngine *arg1); #ifdef __nvoc_crashcat_engine_h_disabled -static inline NV_STATUS crashcatEngineLoadWayfinder(struct CrashCatEngine *arg0) { +static inline NV_STATUS crashcatEngineLoadWayfinder(struct CrashCatEngine *arg1) { NV_ASSERT_FAILED_PRECOMP("CrashCatEngine was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_crashcat_engine_h_disabled -#define crashcatEngineLoadWayfinder(arg0) crashcatEngineLoadWayfinder_IMPL(arg0) +#define crashcatEngineLoadWayfinder(arg1) crashcatEngineLoadWayfinder_IMPL(arg1) #endif //__nvoc_crashcat_engine_h_disabled #undef PRIVATE_FIELD @@ -273,7 +306,7 @@ static inline NV_STATUS crashcatEngineLoadWayfinder(struct CrashCatEngine *arg0) #ifndef NVOC_CRASHCAT_ENGINE_H_PRIVATE_ACCESS_ALLOWED #ifndef __nvoc_crashcat_engine_h_disabled #undef crashcatEngineLoadWayfinder -NV_STATUS NVOC_PRIVATE_FUNCTION(crashcatEngineLoadWayfinder)(struct CrashCatEngine *arg0); +NV_STATUS NVOC_PRIVATE_FUNCTION(crashcatEngineLoadWayfinder)(struct CrashCatEngine *arg1); #endif //__nvoc_crashcat_engine_h_disabled #endif // NVOC_CRASHCAT_ENGINE_H_PRIVATE_ACCESS_ALLOWED diff --git a/src/nvidia/generated/g_crashcat_queue_nvoc.c b/src/nvidia/generated/g_crashcat_queue_nvoc.c index 1506e2d957..6759a9b208 100644 --- a/src/nvidia/generated/g_crashcat_queue_nvoc.c +++ b/src/nvidia/generated/g_crashcat_queue_nvoc.c @@ -98,6 +98,7 @@ NV_STATUS __nvoc_ctor_CrashCatQueue(CrashCatQueue *pThis, CrashCatWayfinder *pCr return status; } +// Vtable initialization static void __nvoc_init_funcTable_CrashCatQueue_1(CrashCatQueue *pThis, CrashCatWayfinder *pCrashcatWayfinder) { CrashCatWayfinderHal *wayfinderHal = &pCrashcatWayfinder->wayfinderHal; const unsigned long wayfinderHal_HalVarIdx = (unsigned long)wayfinderHal->__nvoc_HalVarIdx; @@ -105,8 +106,10 @@ static void __nvoc_init_funcTable_CrashCatQueue_1(CrashCatQueue *pThis, CrashCat PORT_UNREFERENCED_VARIABLE(pCrashcatWayfinder); PORT_UNREFERENCED_VARIABLE(wayfinderHal); PORT_UNREFERENCED_VARIABLE(wayfinderHal_HalVarIdx); -} +} // End __nvoc_init_funcTable_CrashCatQueue_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_CrashCatQueue(CrashCatQueue *pThis, CrashCatWayfinder *pCrashcatWayfinder) { __nvoc_init_funcTable_CrashCatQueue_1(pThis, pCrashcatWayfinder); } diff --git a/src/nvidia/generated/g_crashcat_queue_nvoc.h b/src/nvidia/generated/g_crashcat_queue_nvoc.h index 9a10bf01b1..c32f2d4eca 100644 --- a/src/nvidia/generated/g_crashcat_queue_nvoc.h +++ b/src/nvidia/generated/g_crashcat_queue_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_CRASHCAT_QUEUE_NVOC_H_ #define _G_CRASHCAT_QUEUE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_crashcat_queue_nvoc.h" #ifndef CRASHCAT_QUEUE_H @@ -38,6 +46,7 @@ extern "C" { #include "nv-crashcat.h" #include "crashcat/crashcat_wayfinder.h" // for CrashCatWayfinderHal spec + struct CrashCatEngine; #ifndef __NVOC_CLASS_CrashCatEngine_TYPEDEF__ @@ -50,6 +59,7 @@ typedef struct CrashCatEngine CrashCatEngine; #endif /* __nvoc_class_id_CrashCatEngine */ + struct CrashCatReport; #ifndef __NVOC_CLASS_CrashCatReport_TYPEDEF__ @@ -83,11 +93,20 @@ typedef struct #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct CrashCatQueue { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct CrashCatQueue *__nvoc_pbase_CrashCatQueue; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct CrashCatQueue *__nvoc_pbase_CrashCatQueue; // crashcatQueue + + // Data members CrashCatQueueConfig PRIVATE_FIELD(config); struct CrashCatEngine *PRIVATE_FIELD(pEngine); void *PRIVATE_FIELD(pMapping); @@ -102,6 +121,7 @@ typedef struct CrashCatQueue CrashCatQueue; #define __nvoc_class_id_CrashCatQueue 0xbaa900 #endif /* __nvoc_class_id_CrashCatQueue */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_CrashCatQueue; #define __staticCast_CrashCatQueue(pThis) \ @@ -114,33 +134,36 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_CrashCatQueue; ((CrashCatQueue*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(CrashCatQueue))) #endif //__nvoc_crashcat_queue_h_disabled - NV_STATUS __nvoc_objCreateDynamic_CrashCatQueue(CrashCatQueue**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_CrashCatQueue(CrashCatQueue**, Dynamic*, NvU32, CrashCatQueueConfig * arg_pQueueConfig); #define __objCreate_CrashCatQueue(ppNewObj, pParent, createFlags, arg_pQueueConfig) \ __nvoc_objCreate_CrashCatQueue((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pQueueConfig) -struct CrashCatReport *crashcatQueueConsumeNextReport_V1(struct CrashCatQueue *arg0); + +// Wrapper macros + +// Dispatch functions +struct CrashCatReport *crashcatQueueConsumeNextReport_V1(struct CrashCatQueue *arg1); #ifdef __nvoc_crashcat_queue_h_disabled -static inline struct CrashCatReport *crashcatQueueConsumeNextReport(struct CrashCatQueue *arg0) { +static inline struct CrashCatReport *crashcatQueueConsumeNextReport(struct CrashCatQueue *arg1) { NV_ASSERT_FAILED_PRECOMP("CrashCatQueue was disabled!"); return NULL; } #else //__nvoc_crashcat_queue_h_disabled -#define crashcatQueueConsumeNextReport(arg0) crashcatQueueConsumeNextReport_V1(arg0) +#define crashcatQueueConsumeNextReport(arg1) crashcatQueueConsumeNextReport_V1(arg1) #endif //__nvoc_crashcat_queue_h_disabled -#define crashcatQueueConsumeNextReport_HAL(arg0) crashcatQueueConsumeNextReport(arg0) +#define crashcatQueueConsumeNextReport_HAL(arg1) crashcatQueueConsumeNextReport(arg1) NV_STATUS crashcatQueueConstruct_IMPL(struct CrashCatQueue *arg_, CrashCatQueueConfig *arg_pQueueConfig); #define __nvoc_crashcatQueueConstruct(arg_, arg_pQueueConfig) crashcatQueueConstruct_IMPL(arg_, arg_pQueueConfig) -void crashcatQueueDestruct_IMPL(struct CrashCatQueue *arg0); +void crashcatQueueDestruct_IMPL(struct CrashCatQueue *arg1); -#define __nvoc_crashcatQueueDestruct(arg0) crashcatQueueDestruct_IMPL(arg0) +#define __nvoc_crashcatQueueDestruct(arg1) crashcatQueueDestruct_IMPL(arg1) #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_crashcat_report_nvoc.c b/src/nvidia/generated/g_crashcat_report_nvoc.c index 62c2a34db3..e82ca6137d 100644 --- a/src/nvidia/generated/g_crashcat_report_nvoc.c +++ b/src/nvidia/generated/g_crashcat_report_nvoc.c @@ -117,6 +117,7 @@ NV_STATUS __nvoc_ctor_CrashCatReport(CrashCatReport *pThis, void ** arg_ppReport return status; } +// Vtable initialization static void __nvoc_init_funcTable_CrashCatReport_1(CrashCatReport *pThis) { CrashCatReportHal *reportHal = &pThis->reportHal; const unsigned long reportHal_HalVarIdx = (unsigned long)reportHal->__nvoc_HalVarIdx; @@ -124,7 +125,7 @@ static void __nvoc_init_funcTable_CrashCatReport_1(CrashCatReport *pThis) { PORT_UNREFERENCED_VARIABLE(reportHal); PORT_UNREFERENCED_VARIABLE(reportHal_HalVarIdx); - // Hal function -- crashcatReportLogReporter + // crashcatReportLogReporter -- halified (3 hals) if (( ((reportHal_HalVarIdx >> 5) == 0UL) && ((1UL << (reportHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* CrashCatReportHal: V1_LIBOS2 */ { pThis->__crashcatReportLogReporter__ = &crashcatReportLogReporter_V1_LIBOS2; @@ -138,7 +139,7 @@ static void __nvoc_init_funcTable_CrashCatReport_1(CrashCatReport *pThis) { pThis->__crashcatReportLogReporter__ = &crashcatReportLogReporter_V1_GENERIC; } - // Hal function -- crashcatReportLogSource + // crashcatReportLogSource -- halified (3 hals) if (( ((reportHal_HalVarIdx >> 5) == 0UL) && ((1UL << (reportHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* CrashCatReportHal: V1_LIBOS2 */ { pThis->__crashcatReportLogSource__ = &crashcatReportLogSource_V1_LIBOS2; @@ -151,9 +152,13 @@ static void __nvoc_init_funcTable_CrashCatReport_1(CrashCatReport *pThis) { { pThis->__crashcatReportLogSource__ = &crashcatReportLogSource_V1_GENERIC; } -} +} // End __nvoc_init_funcTable_CrashCatReport_1 with approximately 6 basic block(s). + +// Initialize vtable(s) for 2 virtual method(s). void __nvoc_init_funcTable_CrashCatReport(CrashCatReport *pThis) { + + // Initialize vtable(s) with 2 per-object function pointer(s). __nvoc_init_funcTable_CrashCatReport_1(pThis); } diff --git a/src/nvidia/generated/g_crashcat_report_nvoc.h b/src/nvidia/generated/g_crashcat_report_nvoc.h index 71f40a22fe..620762f133 100644 --- a/src/nvidia/generated/g_crashcat_report_nvoc.h +++ b/src/nvidia/generated/g_crashcat_report_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_CRASHCAT_REPORT_NVOC_H_ #define _G_CRASHCAT_REPORT_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_crashcat_report_nvoc.h" #ifndef CRASHCAT_REPORT_H @@ -37,6 +45,7 @@ extern "C" { #include "nv-crashcat.h" #include "nvoc/object.h" + struct CrashCatEngine; #ifndef __NVOC_CLASS_CrashCatEngine_TYPEDEF__ @@ -82,13 +91,24 @@ struct __nvoc_inner_struc_CrashCatReport_1__ { }; + struct CrashCatReport { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct CrashCatReport *__nvoc_pbase_CrashCatReport; - void (*__crashcatReportLogReporter__)(struct CrashCatReport *); - void (*__crashcatReportLogSource__)(struct CrashCatReport *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct CrashCatReport *__nvoc_pbase_CrashCatReport; // crashcatReport + + // Vtable with 2 per-object function pointers + void (*__crashcatReportLogReporter__)(struct CrashCatReport * /*this*/); // halified (3 hals) + void (*__crashcatReportLogSource__)(struct CrashCatReport * /*this*/); // halified (3 hals) + + // Data members struct CrashCatReportHal reportHal; struct CrashCatEngine *PRIVATE_FIELD(pEngine); NvU32 PRIVATE_FIELD(validTags); @@ -104,6 +124,7 @@ typedef struct CrashCatReport CrashCatReport; #define __nvoc_class_id_CrashCatReport 0xde4777 #endif /* __nvoc_class_id_CrashCatReport */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_CrashCatReport; #define __staticCast_CrashCatReport(pThis) \ @@ -116,7 +137,6 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_CrashCatReport; ((CrashCatReport*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(CrashCatReport))) #endif //__nvoc_crashcat_report_h_disabled - NV_STATUS __nvoc_objCreateDynamic_CrashCatReport(CrashCatReport**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_CrashCatReport(CrashCatReport**, Dynamic*, NvU32, @@ -124,246 +144,252 @@ NV_STATUS __nvoc_objCreate_CrashCatReport(CrashCatReport**, Dynamic*, NvU32, #define __objCreate_CrashCatReport(ppNewObj, pParent, createFlags, CrashCatReportHal_version, CrashCatReportHal_implementer, arg_ppReportBytes, arg_bytesRemaining) \ __nvoc_objCreate_CrashCatReport((ppNewObj), staticCast((pParent), Dynamic), (createFlags), CrashCatReportHal_version, CrashCatReportHal_implementer, arg_ppReportBytes, arg_bytesRemaining) -#define crashcatReportLogReporter(arg0) crashcatReportLogReporter_DISPATCH(arg0) -#define crashcatReportLogReporter_HAL(arg0) crashcatReportLogReporter_DISPATCH(arg0) -#define crashcatReportLogSource(arg0) crashcatReportLogSource_DISPATCH(arg0) -#define crashcatReportLogSource_HAL(arg0) crashcatReportLogSource_DISPATCH(arg0) -void crashcatReportDestruct_V1(struct CrashCatReport *arg0); +// Wrapper macros +#define crashcatReportLogReporter_FNPTR(arg_this) arg_this->__crashcatReportLogReporter__ +#define crashcatReportLogReporter(arg_this) crashcatReportLogReporter_DISPATCH(arg_this) +#define crashcatReportLogReporter_HAL(arg_this) crashcatReportLogReporter_DISPATCH(arg_this) +#define crashcatReportLogSource_FNPTR(arg_this) arg_this->__crashcatReportLogSource__ +#define crashcatReportLogSource(arg_this) crashcatReportLogSource_DISPATCH(arg_this) +#define crashcatReportLogSource_HAL(arg_this) crashcatReportLogSource_DISPATCH(arg_this) + +// Dispatch functions +static inline void crashcatReportLogReporter_DISPATCH(struct CrashCatReport *arg_this) { + arg_this->__crashcatReportLogReporter__(arg_this); +} + +static inline void crashcatReportLogSource_DISPATCH(struct CrashCatReport *arg_this) { + arg_this->__crashcatReportLogSource__(arg_this); +} + +void crashcatReportDestruct_V1(struct CrashCatReport *arg1); -#define __nvoc_crashcatReportDestruct(arg0) crashcatReportDestruct_V1(arg0) -void *crashcatReportExtract_V1(struct CrashCatReport *arg0, void *pReportBytes, NvLength bytesRemaining); + +#define __nvoc_crashcatReportDestruct(arg1) crashcatReportDestruct_V1(arg1) +void *crashcatReportExtract_V1(struct CrashCatReport *arg1, void *pReportBytes, NvLength bytesRemaining); #ifdef __nvoc_crashcat_report_h_disabled -static inline void *crashcatReportExtract(struct CrashCatReport *arg0, void *pReportBytes, NvLength bytesRemaining) { +static inline void *crashcatReportExtract(struct CrashCatReport *arg1, void *pReportBytes, NvLength bytesRemaining) { NV_ASSERT_FAILED_PRECOMP("CrashCatReport was disabled!"); return NULL; } #else //__nvoc_crashcat_report_h_disabled -#define crashcatReportExtract(arg0, pReportBytes, bytesRemaining) crashcatReportExtract_V1(arg0, pReportBytes, bytesRemaining) +#define crashcatReportExtract(arg1, pReportBytes, bytesRemaining) crashcatReportExtract_V1(arg1, pReportBytes, bytesRemaining) #endif //__nvoc_crashcat_report_h_disabled -#define crashcatReportExtract_HAL(arg0, pReportBytes, bytesRemaining) crashcatReportExtract(arg0, pReportBytes, bytesRemaining) +#define crashcatReportExtract_HAL(arg1, pReportBytes, bytesRemaining) crashcatReportExtract(arg1, pReportBytes, bytesRemaining) -void *crashcatReportExtractReport_V1(struct CrashCatReport *arg0, void *pReportBytes, NvLength bytesRemaining); +void *crashcatReportExtractReport_V1(struct CrashCatReport *arg1, void *pReportBytes, NvLength bytesRemaining); #ifdef __nvoc_crashcat_report_h_disabled -static inline void *crashcatReportExtractReport(struct CrashCatReport *arg0, void *pReportBytes, NvLength bytesRemaining) { +static inline void *crashcatReportExtractReport(struct CrashCatReport *arg1, void *pReportBytes, NvLength bytesRemaining) { NV_ASSERT_FAILED_PRECOMP("CrashCatReport was disabled!"); return NULL; } #else //__nvoc_crashcat_report_h_disabled -#define crashcatReportExtractReport(arg0, pReportBytes, bytesRemaining) crashcatReportExtractReport_V1(arg0, pReportBytes, bytesRemaining) +#define crashcatReportExtractReport(arg1, pReportBytes, bytesRemaining) crashcatReportExtractReport_V1(arg1, pReportBytes, bytesRemaining) #endif //__nvoc_crashcat_report_h_disabled -#define crashcatReportExtractReport_HAL(arg0, pReportBytes, bytesRemaining) crashcatReportExtractReport(arg0, pReportBytes, bytesRemaining) +#define crashcatReportExtractReport_HAL(arg1, pReportBytes, bytesRemaining) crashcatReportExtractReport(arg1, pReportBytes, bytesRemaining) -void *crashcatReportExtractRiscv64CsrState_V1(struct CrashCatReport *arg0, void *pReportBytes, NvLength bytesRemaining); +void *crashcatReportExtractRiscv64CsrState_V1(struct CrashCatReport *arg1, void *pReportBytes, NvLength bytesRemaining); #ifdef __nvoc_crashcat_report_h_disabled -static inline void *crashcatReportExtractRiscv64CsrState(struct CrashCatReport *arg0, void *pReportBytes, NvLength bytesRemaining) { +static inline void *crashcatReportExtractRiscv64CsrState(struct CrashCatReport *arg1, void *pReportBytes, NvLength bytesRemaining) { NV_ASSERT_FAILED_PRECOMP("CrashCatReport was disabled!"); return NULL; } #else //__nvoc_crashcat_report_h_disabled -#define crashcatReportExtractRiscv64CsrState(arg0, pReportBytes, bytesRemaining) crashcatReportExtractRiscv64CsrState_V1(arg0, pReportBytes, bytesRemaining) +#define crashcatReportExtractRiscv64CsrState(arg1, pReportBytes, bytesRemaining) crashcatReportExtractRiscv64CsrState_V1(arg1, pReportBytes, bytesRemaining) #endif //__nvoc_crashcat_report_h_disabled -#define crashcatReportExtractRiscv64CsrState_HAL(arg0, pReportBytes, bytesRemaining) crashcatReportExtractRiscv64CsrState(arg0, pReportBytes, bytesRemaining) +#define crashcatReportExtractRiscv64CsrState_HAL(arg1, pReportBytes, bytesRemaining) crashcatReportExtractRiscv64CsrState(arg1, pReportBytes, bytesRemaining) -void *crashcatReportExtractRiscv64GprState_V1(struct CrashCatReport *arg0, void *pReportBytes, NvLength bytesRemaining); +void *crashcatReportExtractRiscv64GprState_V1(struct CrashCatReport *arg1, void *pReportBytes, NvLength bytesRemaining); #ifdef __nvoc_crashcat_report_h_disabled -static inline void *crashcatReportExtractRiscv64GprState(struct CrashCatReport *arg0, void *pReportBytes, NvLength bytesRemaining) { +static inline void *crashcatReportExtractRiscv64GprState(struct CrashCatReport *arg1, void *pReportBytes, NvLength bytesRemaining) { NV_ASSERT_FAILED_PRECOMP("CrashCatReport was disabled!"); return NULL; } #else //__nvoc_crashcat_report_h_disabled -#define crashcatReportExtractRiscv64GprState(arg0, pReportBytes, bytesRemaining) crashcatReportExtractRiscv64GprState_V1(arg0, pReportBytes, bytesRemaining) +#define crashcatReportExtractRiscv64GprState(arg1, pReportBytes, bytesRemaining) crashcatReportExtractRiscv64GprState_V1(arg1, pReportBytes, bytesRemaining) #endif //__nvoc_crashcat_report_h_disabled -#define crashcatReportExtractRiscv64GprState_HAL(arg0, pReportBytes, bytesRemaining) crashcatReportExtractRiscv64GprState(arg0, pReportBytes, bytesRemaining) +#define crashcatReportExtractRiscv64GprState_HAL(arg1, pReportBytes, bytesRemaining) crashcatReportExtractRiscv64GprState(arg1, pReportBytes, bytesRemaining) -void *crashcatReportExtractRiscv64Trace_V1(struct CrashCatReport *arg0, void *pReportBytes, NvLength bytesRemaining); +void *crashcatReportExtractRiscv64Trace_V1(struct CrashCatReport *arg1, void *pReportBytes, NvLength bytesRemaining); #ifdef __nvoc_crashcat_report_h_disabled -static inline void *crashcatReportExtractRiscv64Trace(struct CrashCatReport *arg0, void *pReportBytes, NvLength bytesRemaining) { +static inline void *crashcatReportExtractRiscv64Trace(struct CrashCatReport *arg1, void *pReportBytes, NvLength bytesRemaining) { NV_ASSERT_FAILED_PRECOMP("CrashCatReport was disabled!"); return NULL; } #else //__nvoc_crashcat_report_h_disabled -#define crashcatReportExtractRiscv64Trace(arg0, pReportBytes, bytesRemaining) crashcatReportExtractRiscv64Trace_V1(arg0, pReportBytes, bytesRemaining) +#define crashcatReportExtractRiscv64Trace(arg1, pReportBytes, bytesRemaining) crashcatReportExtractRiscv64Trace_V1(arg1, pReportBytes, bytesRemaining) #endif //__nvoc_crashcat_report_h_disabled -#define crashcatReportExtractRiscv64Trace_HAL(arg0, pReportBytes, bytesRemaining) crashcatReportExtractRiscv64Trace(arg0, pReportBytes, bytesRemaining) +#define crashcatReportExtractRiscv64Trace_HAL(arg1, pReportBytes, bytesRemaining) crashcatReportExtractRiscv64Trace(arg1, pReportBytes, bytesRemaining) -void *crashcatReportExtractIo32State_V1(struct CrashCatReport *arg0, void *pReportBytes, NvLength bytesRemaining); +void *crashcatReportExtractIo32State_V1(struct CrashCatReport *arg1, void *pReportBytes, NvLength bytesRemaining); #ifdef __nvoc_crashcat_report_h_disabled -static inline void *crashcatReportExtractIo32State(struct CrashCatReport *arg0, void *pReportBytes, NvLength bytesRemaining) { +static inline void *crashcatReportExtractIo32State(struct CrashCatReport *arg1, void *pReportBytes, NvLength bytesRemaining) { NV_ASSERT_FAILED_PRECOMP("CrashCatReport was disabled!"); return NULL; } #else //__nvoc_crashcat_report_h_disabled -#define crashcatReportExtractIo32State(arg0, pReportBytes, bytesRemaining) crashcatReportExtractIo32State_V1(arg0, pReportBytes, bytesRemaining) +#define crashcatReportExtractIo32State(arg1, pReportBytes, bytesRemaining) crashcatReportExtractIo32State_V1(arg1, pReportBytes, bytesRemaining) #endif //__nvoc_crashcat_report_h_disabled -#define crashcatReportExtractIo32State_HAL(arg0, pReportBytes, bytesRemaining) crashcatReportExtractIo32State(arg0, pReportBytes, bytesRemaining) +#define crashcatReportExtractIo32State_HAL(arg1, pReportBytes, bytesRemaining) crashcatReportExtractIo32State(arg1, pReportBytes, bytesRemaining) -void crashcatReportLogRiscv64CsrState_V1(struct CrashCatReport *arg0); +void crashcatReportLogRiscv64CsrState_V1(struct CrashCatReport *arg1); #ifdef __nvoc_crashcat_report_h_disabled -static inline void crashcatReportLogRiscv64CsrState(struct CrashCatReport *arg0) { +static inline void crashcatReportLogRiscv64CsrState(struct CrashCatReport *arg1) { NV_ASSERT_FAILED_PRECOMP("CrashCatReport was disabled!"); } #else //__nvoc_crashcat_report_h_disabled -#define crashcatReportLogRiscv64CsrState(arg0) crashcatReportLogRiscv64CsrState_V1(arg0) +#define crashcatReportLogRiscv64CsrState(arg1) crashcatReportLogRiscv64CsrState_V1(arg1) #endif //__nvoc_crashcat_report_h_disabled -#define crashcatReportLogRiscv64CsrState_HAL(arg0) crashcatReportLogRiscv64CsrState(arg0) +#define crashcatReportLogRiscv64CsrState_HAL(arg1) crashcatReportLogRiscv64CsrState(arg1) -void crashcatReportLogRiscv64GprState_V1(struct CrashCatReport *arg0); +void crashcatReportLogRiscv64GprState_V1(struct CrashCatReport *arg1); #ifdef __nvoc_crashcat_report_h_disabled -static inline void crashcatReportLogRiscv64GprState(struct CrashCatReport *arg0) { +static inline void crashcatReportLogRiscv64GprState(struct CrashCatReport *arg1) { NV_ASSERT_FAILED_PRECOMP("CrashCatReport was disabled!"); } #else //__nvoc_crashcat_report_h_disabled -#define crashcatReportLogRiscv64GprState(arg0) crashcatReportLogRiscv64GprState_V1(arg0) +#define crashcatReportLogRiscv64GprState(arg1) crashcatReportLogRiscv64GprState_V1(arg1) #endif //__nvoc_crashcat_report_h_disabled -#define crashcatReportLogRiscv64GprState_HAL(arg0) crashcatReportLogRiscv64GprState(arg0) +#define crashcatReportLogRiscv64GprState_HAL(arg1) crashcatReportLogRiscv64GprState(arg1) -void crashcatReportLogRiscv64Traces_V1(struct CrashCatReport *arg0); +void crashcatReportLogRiscv64Traces_V1(struct CrashCatReport *arg1); #ifdef __nvoc_crashcat_report_h_disabled -static inline void crashcatReportLogRiscv64Traces(struct CrashCatReport *arg0) { +static inline void crashcatReportLogRiscv64Traces(struct CrashCatReport *arg1) { NV_ASSERT_FAILED_PRECOMP("CrashCatReport was disabled!"); } #else //__nvoc_crashcat_report_h_disabled -#define crashcatReportLogRiscv64Traces(arg0) crashcatReportLogRiscv64Traces_V1(arg0) +#define crashcatReportLogRiscv64Traces(arg1) crashcatReportLogRiscv64Traces_V1(arg1) #endif //__nvoc_crashcat_report_h_disabled -#define crashcatReportLogRiscv64Traces_HAL(arg0) crashcatReportLogRiscv64Traces(arg0) +#define crashcatReportLogRiscv64Traces_HAL(arg1) crashcatReportLogRiscv64Traces(arg1) -void crashcatReportLogIo32State_V1(struct CrashCatReport *arg0); +void crashcatReportLogIo32State_V1(struct CrashCatReport *arg1); #ifdef __nvoc_crashcat_report_h_disabled -static inline void crashcatReportLogIo32State(struct CrashCatReport *arg0) { +static inline void crashcatReportLogIo32State(struct CrashCatReport *arg1) { NV_ASSERT_FAILED_PRECOMP("CrashCatReport was disabled!"); } #else //__nvoc_crashcat_report_h_disabled -#define crashcatReportLogIo32State(arg0) crashcatReportLogIo32State_V1(arg0) +#define crashcatReportLogIo32State(arg1) crashcatReportLogIo32State_V1(arg1) #endif //__nvoc_crashcat_report_h_disabled -#define crashcatReportLogIo32State_HAL(arg0) crashcatReportLogIo32State(arg0) - -void crashcatReportLogReporter_V1_GENERIC(struct CrashCatReport *arg0); +#define crashcatReportLogIo32State_HAL(arg1) crashcatReportLogIo32State(arg1) -void crashcatReportLogReporter_V1_LIBOS2(struct CrashCatReport *arg0); +void crashcatReportLogReporter_V1_GENERIC(struct CrashCatReport *arg1); -void crashcatReportLogReporter_V1_LIBOS3(struct CrashCatReport *arg0); +void crashcatReportLogReporter_V1_LIBOS2(struct CrashCatReport *arg1); -static inline void crashcatReportLogReporter_DISPATCH(struct CrashCatReport *arg0) { - arg0->__crashcatReportLogReporter__(arg0); -} +void crashcatReportLogReporter_V1_LIBOS3(struct CrashCatReport *arg1); -void crashcatReportLogSource_V1_GENERIC(struct CrashCatReport *arg0); +void crashcatReportLogSource_V1_GENERIC(struct CrashCatReport *arg1); -void crashcatReportLogSource_V1_LIBOS2(struct CrashCatReport *arg0); +void crashcatReportLogSource_V1_LIBOS2(struct CrashCatReport *arg1); -void crashcatReportLogSource_V1_LIBOS3(struct CrashCatReport *arg0); - -static inline void crashcatReportLogSource_DISPATCH(struct CrashCatReport *arg0) { - arg0->__crashcatReportLogSource__(arg0); -} +void crashcatReportLogSource_V1_LIBOS3(struct CrashCatReport *arg1); NV_STATUS crashcatReportConstruct_IMPL(struct CrashCatReport *arg_, void **arg_ppReportBytes, NvLength arg_bytesRemaining); #define __nvoc_crashcatReportConstruct(arg_, arg_ppReportBytes, arg_bytesRemaining) crashcatReportConstruct_IMPL(arg_, arg_ppReportBytes, arg_bytesRemaining) -void crashcatReportLog_IMPL(struct CrashCatReport *arg0); +void crashcatReportLog_IMPL(struct CrashCatReport *arg1); #ifdef __nvoc_crashcat_report_h_disabled -static inline void crashcatReportLog(struct CrashCatReport *arg0) { +static inline void crashcatReportLog(struct CrashCatReport *arg1) { NV_ASSERT_FAILED_PRECOMP("CrashCatReport was disabled!"); } #else //__nvoc_crashcat_report_h_disabled -#define crashcatReportLog(arg0) crashcatReportLog_IMPL(arg0) +#define crashcatReportLog(arg1) crashcatReportLog_IMPL(arg1) #endif //__nvoc_crashcat_report_h_disabled #undef PRIVATE_FIELD #ifndef NVOC_CRASHCAT_REPORT_H_PRIVATE_ACCESS_ALLOWED #undef crashcatReportLogReporter -void NVOC_PRIVATE_FUNCTION(crashcatReportLogReporter)(struct CrashCatReport *arg0); +void NVOC_PRIVATE_FUNCTION(crashcatReportLogReporter)(struct CrashCatReport *arg1); #undef crashcatReportLogReporter_HAL -void NVOC_PRIVATE_FUNCTION(crashcatReportLogReporter_HAL)(struct CrashCatReport *arg0); +void NVOC_PRIVATE_FUNCTION(crashcatReportLogReporter_HAL)(struct CrashCatReport *arg1); #undef crashcatReportLogSource -void NVOC_PRIVATE_FUNCTION(crashcatReportLogSource)(struct CrashCatReport *arg0); +void NVOC_PRIVATE_FUNCTION(crashcatReportLogSource)(struct CrashCatReport *arg1); #undef crashcatReportLogSource_HAL -void NVOC_PRIVATE_FUNCTION(crashcatReportLogSource_HAL)(struct CrashCatReport *arg0); +void NVOC_PRIVATE_FUNCTION(crashcatReportLogSource_HAL)(struct CrashCatReport *arg1); #ifndef __nvoc_crashcat_report_h_disabled #undef crashcatReportExtract -void *NVOC_PRIVATE_FUNCTION(crashcatReportExtract)(struct CrashCatReport *arg0, void *pReportBytes, NvLength bytesRemaining); +void *NVOC_PRIVATE_FUNCTION(crashcatReportExtract)(struct CrashCatReport *arg1, void *pReportBytes, NvLength bytesRemaining); #endif //__nvoc_crashcat_report_h_disabled #ifndef __nvoc_crashcat_report_h_disabled #undef crashcatReportExtractReport -void *NVOC_PRIVATE_FUNCTION(crashcatReportExtractReport)(struct CrashCatReport *arg0, void *pReportBytes, NvLength bytesRemaining); +void *NVOC_PRIVATE_FUNCTION(crashcatReportExtractReport)(struct CrashCatReport *arg1, void *pReportBytes, NvLength bytesRemaining); #endif //__nvoc_crashcat_report_h_disabled #ifndef __nvoc_crashcat_report_h_disabled #undef crashcatReportExtractRiscv64CsrState -void *NVOC_PRIVATE_FUNCTION(crashcatReportExtractRiscv64CsrState)(struct CrashCatReport *arg0, void *pReportBytes, NvLength bytesRemaining); +void *NVOC_PRIVATE_FUNCTION(crashcatReportExtractRiscv64CsrState)(struct CrashCatReport *arg1, void *pReportBytes, NvLength bytesRemaining); #endif //__nvoc_crashcat_report_h_disabled #ifndef __nvoc_crashcat_report_h_disabled #undef crashcatReportExtractRiscv64GprState -void *NVOC_PRIVATE_FUNCTION(crashcatReportExtractRiscv64GprState)(struct CrashCatReport *arg0, void *pReportBytes, NvLength bytesRemaining); +void *NVOC_PRIVATE_FUNCTION(crashcatReportExtractRiscv64GprState)(struct CrashCatReport *arg1, void *pReportBytes, NvLength bytesRemaining); #endif //__nvoc_crashcat_report_h_disabled #ifndef __nvoc_crashcat_report_h_disabled #undef crashcatReportExtractRiscv64Trace -void *NVOC_PRIVATE_FUNCTION(crashcatReportExtractRiscv64Trace)(struct CrashCatReport *arg0, void *pReportBytes, NvLength bytesRemaining); +void *NVOC_PRIVATE_FUNCTION(crashcatReportExtractRiscv64Trace)(struct CrashCatReport *arg1, void *pReportBytes, NvLength bytesRemaining); #endif //__nvoc_crashcat_report_h_disabled #ifndef __nvoc_crashcat_report_h_disabled #undef crashcatReportExtractIo32State -void *NVOC_PRIVATE_FUNCTION(crashcatReportExtractIo32State)(struct CrashCatReport *arg0, void *pReportBytes, NvLength bytesRemaining); +void *NVOC_PRIVATE_FUNCTION(crashcatReportExtractIo32State)(struct CrashCatReport *arg1, void *pReportBytes, NvLength bytesRemaining); #endif //__nvoc_crashcat_report_h_disabled #ifndef __nvoc_crashcat_report_h_disabled #undef crashcatReportLogRiscv64CsrState -void NVOC_PRIVATE_FUNCTION(crashcatReportLogRiscv64CsrState)(struct CrashCatReport *arg0); +void NVOC_PRIVATE_FUNCTION(crashcatReportLogRiscv64CsrState)(struct CrashCatReport *arg1); #endif //__nvoc_crashcat_report_h_disabled #ifndef __nvoc_crashcat_report_h_disabled #undef crashcatReportLogRiscv64GprState -void NVOC_PRIVATE_FUNCTION(crashcatReportLogRiscv64GprState)(struct CrashCatReport *arg0); +void NVOC_PRIVATE_FUNCTION(crashcatReportLogRiscv64GprState)(struct CrashCatReport *arg1); #endif //__nvoc_crashcat_report_h_disabled #ifndef __nvoc_crashcat_report_h_disabled #undef crashcatReportLogRiscv64Traces -void NVOC_PRIVATE_FUNCTION(crashcatReportLogRiscv64Traces)(struct CrashCatReport *arg0); +void NVOC_PRIVATE_FUNCTION(crashcatReportLogRiscv64Traces)(struct CrashCatReport *arg1); #endif //__nvoc_crashcat_report_h_disabled #ifndef __nvoc_crashcat_report_h_disabled #undef crashcatReportLogIo32State -void NVOC_PRIVATE_FUNCTION(crashcatReportLogIo32State)(struct CrashCatReport *arg0); +void NVOC_PRIVATE_FUNCTION(crashcatReportLogIo32State)(struct CrashCatReport *arg1); #endif //__nvoc_crashcat_report_h_disabled #endif // NVOC_CRASHCAT_REPORT_H_PRIVATE_ACCESS_ALLOWED diff --git a/src/nvidia/generated/g_crashcat_wayfinder_nvoc.c b/src/nvidia/generated/g_crashcat_wayfinder_nvoc.c index 8110e314a3..31a712664e 100644 --- a/src/nvidia/generated/g_crashcat_wayfinder_nvoc.c +++ b/src/nvidia/generated/g_crashcat_wayfinder_nvoc.c @@ -107,14 +107,17 @@ NV_STATUS __nvoc_ctor_CrashCatWayfinder(CrashCatWayfinder *pThis, NvU32 arg_wfl0 return status; } +// Vtable initialization static void __nvoc_init_funcTable_CrashCatWayfinder_1(CrashCatWayfinder *pThis) { CrashCatWayfinderHal *wayfinderHal = &pThis->wayfinderHal; const unsigned long wayfinderHal_HalVarIdx = (unsigned long)wayfinderHal->__nvoc_HalVarIdx; PORT_UNREFERENCED_VARIABLE(pThis); PORT_UNREFERENCED_VARIABLE(wayfinderHal); PORT_UNREFERENCED_VARIABLE(wayfinderHal_HalVarIdx); -} +} // End __nvoc_init_funcTable_CrashCatWayfinder_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_CrashCatWayfinder(CrashCatWayfinder *pThis) { __nvoc_init_funcTable_CrashCatWayfinder_1(pThis); } diff --git a/src/nvidia/generated/g_crashcat_wayfinder_nvoc.h b/src/nvidia/generated/g_crashcat_wayfinder_nvoc.h index 97b48faba6..b2bc03082a 100644 --- a/src/nvidia/generated/g_crashcat_wayfinder_nvoc.h +++ b/src/nvidia/generated/g_crashcat_wayfinder_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_CRASHCAT_WAYFINDER_NVOC_H_ #define _G_CRASHCAT_WAYFINDER_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_crashcat_wayfinder_nvoc.h" #ifndef CRASHCAT_WAYFINDER_H @@ -37,6 +45,7 @@ extern "C" { #include "nvoc/object.h" #include "nv-crashcat.h" + struct CrashCatQueue; #ifndef __NVOC_CLASS_CrashCatQueue_TYPEDEF__ @@ -49,6 +58,7 @@ typedef struct CrashCatQueue CrashCatQueue; #endif /* __nvoc_class_id_CrashCatQueue */ + struct CrashCatReport; #ifndef __NVOC_CLASS_CrashCatReport_TYPEDEF__ @@ -84,11 +94,20 @@ struct __nvoc_inner_struc_CrashCatWayfinder_1__ { }; + struct CrashCatWayfinder { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct CrashCatWayfinder *__nvoc_pbase_CrashCatWayfinder; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct CrashCatWayfinder *__nvoc_pbase_CrashCatWayfinder; // crashcatWayfinder + + // Data members struct CrashCatWayfinderHal wayfinderHal; struct CrashCatQueue *PRIVATE_FIELD(pQueue); struct __nvoc_inner_struc_CrashCatWayfinder_1__ PRIVATE_FIELD(v1); @@ -103,6 +122,7 @@ typedef struct CrashCatWayfinder CrashCatWayfinder; #define __nvoc_class_id_CrashCatWayfinder 0x085e32 #endif /* __nvoc_class_id_CrashCatWayfinder */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_CrashCatWayfinder; #define __staticCast_CrashCatWayfinder(pThis) \ @@ -115,7 +135,6 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_CrashCatWayfinder; ((CrashCatWayfinder*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(CrashCatWayfinder))) #endif //__nvoc_crashcat_wayfinder_h_disabled - NV_STATUS __nvoc_objCreateDynamic_CrashCatWayfinder(CrashCatWayfinder**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_CrashCatWayfinder(CrashCatWayfinder**, Dynamic*, NvU32, @@ -123,45 +142,49 @@ NV_STATUS __nvoc_objCreate_CrashCatWayfinder(CrashCatWayfinder**, Dynamic*, NvU3 #define __objCreate_CrashCatWayfinder(ppNewObj, pParent, createFlags, CrashCatWayfinderHal_version, arg_wfl0) \ __nvoc_objCreate_CrashCatWayfinder((ppNewObj), staticCast((pParent), Dynamic), (createFlags), CrashCatWayfinderHal_version, arg_wfl0) -struct CrashCatQueue *crashcatWayfinderGetReportQueue_V1(struct CrashCatWayfinder *arg0); + +// Wrapper macros + +// Dispatch functions +struct CrashCatQueue *crashcatWayfinderGetReportQueue_V1(struct CrashCatWayfinder *arg1); #ifdef __nvoc_crashcat_wayfinder_h_disabled -static inline struct CrashCatQueue *crashcatWayfinderGetReportQueue(struct CrashCatWayfinder *arg0) { +static inline struct CrashCatQueue *crashcatWayfinderGetReportQueue(struct CrashCatWayfinder *arg1) { NV_ASSERT_FAILED_PRECOMP("CrashCatWayfinder was disabled!"); return NULL; } #else //__nvoc_crashcat_wayfinder_h_disabled -#define crashcatWayfinderGetReportQueue(arg0) crashcatWayfinderGetReportQueue_V1(arg0) +#define crashcatWayfinderGetReportQueue(arg1) crashcatWayfinderGetReportQueue_V1(arg1) #endif //__nvoc_crashcat_wayfinder_h_disabled -#define crashcatWayfinderGetReportQueue_HAL(arg0) crashcatWayfinderGetReportQueue(arg0) +#define crashcatWayfinderGetReportQueue_HAL(arg1) crashcatWayfinderGetReportQueue(arg1) -void crashcatWayfinderSetWFL0_V1(struct CrashCatWayfinder *arg0, NvU32 wfl0); +void crashcatWayfinderSetWFL0_V1(struct CrashCatWayfinder *arg1, NvU32 wfl0); #ifdef __nvoc_crashcat_wayfinder_h_disabled -static inline void crashcatWayfinderSetWFL0(struct CrashCatWayfinder *arg0, NvU32 wfl0) { +static inline void crashcatWayfinderSetWFL0(struct CrashCatWayfinder *arg1, NvU32 wfl0) { NV_ASSERT_FAILED_PRECOMP("CrashCatWayfinder was disabled!"); } #else //__nvoc_crashcat_wayfinder_h_disabled -#define crashcatWayfinderSetWFL0(arg0, wfl0) crashcatWayfinderSetWFL0_V1(arg0, wfl0) +#define crashcatWayfinderSetWFL0(arg1, wfl0) crashcatWayfinderSetWFL0_V1(arg1, wfl0) #endif //__nvoc_crashcat_wayfinder_h_disabled -#define crashcatWayfinderSetWFL0_HAL(arg0, wfl0) crashcatWayfinderSetWFL0(arg0, wfl0) +#define crashcatWayfinderSetWFL0_HAL(arg1, wfl0) crashcatWayfinderSetWFL0(arg1, wfl0) NV_STATUS crashcatWayfinderConstruct_IMPL(struct CrashCatWayfinder *arg_, NvU32 arg_wfl0); #define __nvoc_crashcatWayfinderConstruct(arg_, arg_wfl0) crashcatWayfinderConstruct_IMPL(arg_, arg_wfl0) -void crashcatWayfinderDestruct_IMPL(struct CrashCatWayfinder *arg0); +void crashcatWayfinderDestruct_IMPL(struct CrashCatWayfinder *arg1); -#define __nvoc_crashcatWayfinderDestruct(arg0) crashcatWayfinderDestruct_IMPL(arg0) +#define __nvoc_crashcatWayfinderDestruct(arg1) crashcatWayfinderDestruct_IMPL(arg1) #undef PRIVATE_FIELD #ifndef NVOC_CRASHCAT_WAYFINDER_H_PRIVATE_ACCESS_ALLOWED #ifndef __nvoc_crashcat_wayfinder_h_disabled #undef crashcatWayfinderSetWFL0 -void NVOC_PRIVATE_FUNCTION(crashcatWayfinderSetWFL0)(struct CrashCatWayfinder *arg0, NvU32 wfl0); +void NVOC_PRIVATE_FUNCTION(crashcatWayfinderSetWFL0)(struct CrashCatWayfinder *arg1, NvU32 wfl0); #endif //__nvoc_crashcat_wayfinder_h_disabled #endif // NVOC_CRASHCAT_WAYFINDER_H_PRIVATE_ACCESS_ALLOWED diff --git a/src/nvidia/generated/g_dbgbuffer_nvoc.c b/src/nvidia/generated/g_dbgbuffer_nvoc.c index 84d715d91b..c66d500c11 100644 --- a/src/nvidia/generated/g_dbgbuffer_nvoc.c +++ b/src/nvidia/generated/g_dbgbuffer_nvoc.c @@ -93,106 +93,137 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DebugBufferApi = /*pExportInfo=*/ &__nvoc_export_info_DebugBufferApi }; -static NV_STATUS __nvoc_thunk_DebugBufferApi_gpuresMap(struct GpuResource *pDebugBufferApi, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return dbgbufMap((struct DebugBufferApi *)(((unsigned char *)pDebugBufferApi) - __nvoc_rtti_DebugBufferApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// 4 down-thunk(s) defined to bridge methods in DebugBufferApi from superclasses + +// dbgbufMap: virtual override (res) base (gpures) +static NV_STATUS __nvoc_down_thunk_DebugBufferApi_gpuresMap(struct GpuResource *pDebugBufferApi, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return dbgbufMap((struct DebugBufferApi *)(((unsigned char *) pDebugBufferApi) - __nvoc_rtti_DebugBufferApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_DebugBufferApi_gpuresUnmap(struct GpuResource *pDebugBufferApi, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return dbgbufUnmap((struct DebugBufferApi *)(((unsigned char *)pDebugBufferApi) - __nvoc_rtti_DebugBufferApi_GpuResource.offset), pCallContext, pCpuMapping); +// dbgbufUnmap: virtual override (res) base (gpures) +static NV_STATUS __nvoc_down_thunk_DebugBufferApi_gpuresUnmap(struct GpuResource *pDebugBufferApi, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return dbgbufUnmap((struct DebugBufferApi *)(((unsigned char *) pDebugBufferApi) - __nvoc_rtti_DebugBufferApi_GpuResource.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_DebugBufferApi_gpuresGetMapAddrSpace(struct GpuResource *pDebugBufferApi, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return dbgbufGetMapAddrSpace((struct DebugBufferApi *)(((unsigned char *)pDebugBufferApi) - __nvoc_rtti_DebugBufferApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// dbgbufGetMapAddrSpace: virtual override (gpures) base (gpures) +static NV_STATUS __nvoc_down_thunk_DebugBufferApi_gpuresGetMapAddrSpace(struct GpuResource *pDebugBufferApi, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return dbgbufGetMapAddrSpace((struct DebugBufferApi *)(((unsigned char *) pDebugBufferApi) - __nvoc_rtti_DebugBufferApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_DebugBufferApi_rmresGetMemoryMappingDescriptor(struct RmResource *pDebugBufferApi, MEMORY_DESCRIPTOR **ppMemDesc) { - return dbgbufGetMemoryMappingDescriptor((struct DebugBufferApi *)(((unsigned char *)pDebugBufferApi) - __nvoc_rtti_DebugBufferApi_RmResource.offset), ppMemDesc); +// dbgbufGetMemoryMappingDescriptor: virtual override (rmres) base (gpures) +static NV_STATUS __nvoc_down_thunk_DebugBufferApi_rmresGetMemoryMappingDescriptor(struct RmResource *pDebugBufferApi, MEMORY_DESCRIPTOR **ppMemDesc) { + return dbgbufGetMemoryMappingDescriptor((struct DebugBufferApi *)(((unsigned char *) pDebugBufferApi) - __nvoc_rtti_DebugBufferApi_RmResource.offset), ppMemDesc); } -static NvBool __nvoc_thunk_GpuResource_dbgbufShareCallback(struct DebugBufferApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DebugBufferApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); + +// 21 up-thunk(s) defined to bridge methods in DebugBufferApi to superclasses + +// dbgbufControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_dbgbufControl(struct DebugBufferApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DebugBufferApi_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_dbgbufCheckMemInterUnmap(struct DebugBufferApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), bSubdeviceHandleProvided); +// dbgbufShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_dbgbufShareCallback(struct DebugBufferApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DebugBufferApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RsResource_dbgbufMapTo(struct DebugBufferApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset), pParams); +// dbgbufGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_dbgbufGetRegBaseOffsetAndSize(struct DebugBufferApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DebugBufferApi_GpuResource.offset), pGpu, pOffset, pSize); } -static NvU32 __nvoc_thunk_RsResource_dbgbufGetRefCount(struct DebugBufferApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset)); +// dbgbufInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_dbgbufInternalControlForward(struct DebugBufferApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DebugBufferApi_GpuResource.offset), command, pParams, size); } -static void __nvoc_thunk_RsResource_dbgbufAddAdditionalDependants(struct RsClient *pClient, struct DebugBufferApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset), pReference); +// dbgbufGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_dbgbufGetInternalObjectHandle(struct DebugBufferApi *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DebugBufferApi_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_RmResource_dbgbufControl_Prologue(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), pCallContext, pParams); +// dbgbufAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_dbgbufAccessCallback(struct DebugBufferApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_GpuResource_dbgbufGetRegBaseOffsetAndSize(struct DebugBufferApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DebugBufferApi_GpuResource.offset), pGpu, pOffset, pSize); +// dbgbufGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_dbgbufGetMemInterMapParams(struct DebugBufferApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_dbgbufInternalControlForward(struct DebugBufferApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DebugBufferApi_GpuResource.offset), command, pParams, size); +// dbgbufCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_dbgbufCheckMemInterUnmap(struct DebugBufferApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RsResource_dbgbufUnmapFrom(struct DebugBufferApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset), pParams); +// dbgbufControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_dbgbufControlSerialization_Prologue(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RmResource_dbgbufControl_Epilogue(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), pCallContext, pParams); +// dbgbufControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_dbgbufControlSerialization_Epilogue(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), pCallContext, pParams); } -static NvHandle __nvoc_thunk_GpuResource_dbgbufGetInternalObjectHandle(struct DebugBufferApi *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DebugBufferApi_GpuResource.offset)); +// dbgbufControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_dbgbufControl_Prologue(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_dbgbufControl(struct DebugBufferApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DebugBufferApi_GpuResource.offset), pCallContext, pParams); +// dbgbufControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_dbgbufControl_Epilogue(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_dbgbufGetMemInterMapParams(struct DebugBufferApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), pParams); +// dbgbufCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_dbgbufCanCopy(struct DebugBufferApi *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_dbgbufControlFilter(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset), pCallContext, pParams); +// dbgbufIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_dbgbufIsDuplicate(struct DebugBufferApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RmResource_dbgbufControlSerialization_Prologue(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), pCallContext, pParams); +// dbgbufPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_dbgbufPreDestruct(struct DebugBufferApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_dbgbufCanCopy(struct DebugBufferApi *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset)); +// dbgbufControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_dbgbufControlFilter(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_dbgbufIsPartialUnmapSupported(struct DebugBufferApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset)); +// dbgbufIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_dbgbufIsPartialUnmapSupported(struct DebugBufferApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset)); } -static void __nvoc_thunk_RsResource_dbgbufPreDestruct(struct DebugBufferApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset)); +// dbgbufMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_dbgbufMapTo(struct DebugBufferApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_dbgbufIsDuplicate(struct DebugBufferApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset), hMemory, pDuplicate); +// dbgbufUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_dbgbufUnmapFrom(struct DebugBufferApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_dbgbufControlSerialization_Epilogue(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), pCallContext, pParams); +// dbgbufGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_dbgbufGetRefCount(struct DebugBufferApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_dbgbufAccessCallback(struct DebugBufferApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// dbgbufAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_dbgbufAddAdditionalDependants(struct RsClient *pClient, struct DebugBufferApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_DebugBufferApi = { /*numEntries=*/ 0, @@ -229,69 +260,95 @@ NV_STATUS __nvoc_ctor_DebugBufferApi(DebugBufferApi *pThis, CALL_CONTEXT * arg_p return status; } +// Vtable initialization static void __nvoc_init_funcTable_DebugBufferApi_1(DebugBufferApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // dbgbufMap -- virtual override (res) base (gpures) pThis->__dbgbufMap__ = &dbgbufMap_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresMap__ = &__nvoc_down_thunk_DebugBufferApi_gpuresMap; + // dbgbufUnmap -- virtual override (res) base (gpures) pThis->__dbgbufUnmap__ = &dbgbufUnmap_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresUnmap__ = &__nvoc_down_thunk_DebugBufferApi_gpuresUnmap; + // dbgbufGetMapAddrSpace -- virtual override (gpures) base (gpures) pThis->__dbgbufGetMapAddrSpace__ = &dbgbufGetMapAddrSpace_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_down_thunk_DebugBufferApi_gpuresGetMapAddrSpace; + // dbgbufGetMemoryMappingDescriptor -- virtual override (rmres) base (gpures) pThis->__dbgbufGetMemoryMappingDescriptor__ = &dbgbufGetMemoryMappingDescriptor_IMPL; + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_DebugBufferApi_rmresGetMemoryMappingDescriptor; - pThis->__nvoc_base_GpuResource.__gpuresMap__ = &__nvoc_thunk_DebugBufferApi_gpuresMap; - - pThis->__nvoc_base_GpuResource.__gpuresUnmap__ = &__nvoc_thunk_DebugBufferApi_gpuresUnmap; + // dbgbufControl -- virtual inherited (gpures) base (gpures) + pThis->__dbgbufControl__ = &__nvoc_up_thunk_GpuResource_dbgbufControl; - pThis->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_thunk_DebugBufferApi_gpuresGetMapAddrSpace; + // dbgbufShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__dbgbufShareCallback__ = &__nvoc_up_thunk_GpuResource_dbgbufShareCallback; - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_thunk_DebugBufferApi_rmresGetMemoryMappingDescriptor; + // dbgbufGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__dbgbufGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_dbgbufGetRegBaseOffsetAndSize; - pThis->__dbgbufShareCallback__ = &__nvoc_thunk_GpuResource_dbgbufShareCallback; + // dbgbufInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__dbgbufInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dbgbufInternalControlForward; - pThis->__dbgbufCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_dbgbufCheckMemInterUnmap; + // dbgbufGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__dbgbufGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dbgbufGetInternalObjectHandle; - pThis->__dbgbufMapTo__ = &__nvoc_thunk_RsResource_dbgbufMapTo; + // dbgbufAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__dbgbufAccessCallback__ = &__nvoc_up_thunk_RmResource_dbgbufAccessCallback; - pThis->__dbgbufGetRefCount__ = &__nvoc_thunk_RsResource_dbgbufGetRefCount; + // dbgbufGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__dbgbufGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dbgbufGetMemInterMapParams; - pThis->__dbgbufAddAdditionalDependants__ = &__nvoc_thunk_RsResource_dbgbufAddAdditionalDependants; + // dbgbufCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__dbgbufCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dbgbufCheckMemInterUnmap; - pThis->__dbgbufControl_Prologue__ = &__nvoc_thunk_RmResource_dbgbufControl_Prologue; + // dbgbufControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__dbgbufControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dbgbufControlSerialization_Prologue; - pThis->__dbgbufGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_dbgbufGetRegBaseOffsetAndSize; + // dbgbufControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__dbgbufControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dbgbufControlSerialization_Epilogue; - pThis->__dbgbufInternalControlForward__ = &__nvoc_thunk_GpuResource_dbgbufInternalControlForward; + // dbgbufControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__dbgbufControl_Prologue__ = &__nvoc_up_thunk_RmResource_dbgbufControl_Prologue; - pThis->__dbgbufUnmapFrom__ = &__nvoc_thunk_RsResource_dbgbufUnmapFrom; + // dbgbufControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__dbgbufControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dbgbufControl_Epilogue; - pThis->__dbgbufControl_Epilogue__ = &__nvoc_thunk_RmResource_dbgbufControl_Epilogue; + // dbgbufCanCopy -- virtual inherited (res) base (gpures) + pThis->__dbgbufCanCopy__ = &__nvoc_up_thunk_RsResource_dbgbufCanCopy; - pThis->__dbgbufGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_dbgbufGetInternalObjectHandle; + // dbgbufIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__dbgbufIsDuplicate__ = &__nvoc_up_thunk_RsResource_dbgbufIsDuplicate; - pThis->__dbgbufControl__ = &__nvoc_thunk_GpuResource_dbgbufControl; + // dbgbufPreDestruct -- virtual inherited (res) base (gpures) + pThis->__dbgbufPreDestruct__ = &__nvoc_up_thunk_RsResource_dbgbufPreDestruct; - pThis->__dbgbufGetMemInterMapParams__ = &__nvoc_thunk_RmResource_dbgbufGetMemInterMapParams; + // dbgbufControlFilter -- virtual inherited (res) base (gpures) + pThis->__dbgbufControlFilter__ = &__nvoc_up_thunk_RsResource_dbgbufControlFilter; - pThis->__dbgbufControlFilter__ = &__nvoc_thunk_RsResource_dbgbufControlFilter; + // dbgbufIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__dbgbufIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dbgbufIsPartialUnmapSupported; - pThis->__dbgbufControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_dbgbufControlSerialization_Prologue; + // dbgbufMapTo -- virtual inherited (res) base (gpures) + pThis->__dbgbufMapTo__ = &__nvoc_up_thunk_RsResource_dbgbufMapTo; - pThis->__dbgbufCanCopy__ = &__nvoc_thunk_RsResource_dbgbufCanCopy; + // dbgbufUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__dbgbufUnmapFrom__ = &__nvoc_up_thunk_RsResource_dbgbufUnmapFrom; - pThis->__dbgbufIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_dbgbufIsPartialUnmapSupported; + // dbgbufGetRefCount -- virtual inherited (res) base (gpures) + pThis->__dbgbufGetRefCount__ = &__nvoc_up_thunk_RsResource_dbgbufGetRefCount; - pThis->__dbgbufPreDestruct__ = &__nvoc_thunk_RsResource_dbgbufPreDestruct; + // dbgbufAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__dbgbufAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dbgbufAddAdditionalDependants; +} // End __nvoc_init_funcTable_DebugBufferApi_1 with approximately 29 basic block(s). - pThis->__dbgbufIsDuplicate__ = &__nvoc_thunk_RsResource_dbgbufIsDuplicate; - - pThis->__dbgbufControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_dbgbufControlSerialization_Epilogue; - - pThis->__dbgbufAccessCallback__ = &__nvoc_thunk_RmResource_dbgbufAccessCallback; -} +// Initialize vtable(s) for 25 virtual method(s). void __nvoc_init_funcTable_DebugBufferApi(DebugBufferApi *pThis) { + + // Initialize vtable(s) with 25 per-object function pointer(s). __nvoc_init_funcTable_DebugBufferApi_1(pThis); } diff --git a/src/nvidia/generated/g_dbgbuffer_nvoc.h b/src/nvidia/generated/g_dbgbuffer_nvoc.h index b33fff6f2c..4606a5dea0 100644 --- a/src/nvidia/generated/g_dbgbuffer_nvoc.h +++ b/src/nvidia/generated/g_dbgbuffer_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_DBGBUFFER_NVOC_H_ #define _G_DBGBUFFER_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_dbgbuffer_nvoc.h" #ifndef _DBGBUFFER_H_ @@ -57,40 +65,51 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct DebugBufferApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct DebugBufferApi *__nvoc_pbase_DebugBufferApi; - NV_STATUS (*__dbgbufMap__)(struct DebugBufferApi *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NV_STATUS (*__dbgbufUnmap__)(struct DebugBufferApi *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__dbgbufGetMapAddrSpace__)(struct DebugBufferApi *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NV_STATUS (*__dbgbufGetMemoryMappingDescriptor__)(struct DebugBufferApi *, MEMORY_DESCRIPTOR **); - NvBool (*__dbgbufShareCallback__)(struct DebugBufferApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__dbgbufCheckMemInterUnmap__)(struct DebugBufferApi *, NvBool); - NV_STATUS (*__dbgbufMapTo__)(struct DebugBufferApi *, RS_RES_MAP_TO_PARAMS *); - NvU32 (*__dbgbufGetRefCount__)(struct DebugBufferApi *); - void (*__dbgbufAddAdditionalDependants__)(struct RsClient *, struct DebugBufferApi *, RsResourceRef *); - NV_STATUS (*__dbgbufControl_Prologue__)(struct DebugBufferApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dbgbufGetRegBaseOffsetAndSize__)(struct DebugBufferApi *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__dbgbufInternalControlForward__)(struct DebugBufferApi *, NvU32, void *, NvU32); - NV_STATUS (*__dbgbufUnmapFrom__)(struct DebugBufferApi *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__dbgbufControl_Epilogue__)(struct DebugBufferApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__dbgbufGetInternalObjectHandle__)(struct DebugBufferApi *); - NV_STATUS (*__dbgbufControl__)(struct DebugBufferApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dbgbufGetMemInterMapParams__)(struct DebugBufferApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__dbgbufControlFilter__)(struct DebugBufferApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dbgbufControlSerialization_Prologue__)(struct DebugBufferApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__dbgbufCanCopy__)(struct DebugBufferApi *); - NvBool (*__dbgbufIsPartialUnmapSupported__)(struct DebugBufferApi *); - void (*__dbgbufPreDestruct__)(struct DebugBufferApi *); - NV_STATUS (*__dbgbufIsDuplicate__)(struct DebugBufferApi *, NvHandle, NvBool *); - void (*__dbgbufControlSerialization_Epilogue__)(struct DebugBufferApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__dbgbufAccessCallback__)(struct DebugBufferApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct DebugBufferApi *__nvoc_pbase_DebugBufferApi; // dbgbuf + + // Vtable with 25 per-object function pointers + NV_STATUS (*__dbgbufMap__)(struct DebugBufferApi * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual override (res) base (gpures) + NV_STATUS (*__dbgbufUnmap__)(struct DebugBufferApi * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual override (res) base (gpures) + NV_STATUS (*__dbgbufGetMapAddrSpace__)(struct DebugBufferApi * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (gpures) base (gpures) + NV_STATUS (*__dbgbufGetMemoryMappingDescriptor__)(struct DebugBufferApi * /*this*/, MEMORY_DESCRIPTOR **); // virtual override (rmres) base (gpures) + NV_STATUS (*__dbgbufControl__)(struct DebugBufferApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NvBool (*__dbgbufShareCallback__)(struct DebugBufferApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__dbgbufGetRegBaseOffsetAndSize__)(struct DebugBufferApi * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__dbgbufInternalControlForward__)(struct DebugBufferApi * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__dbgbufGetInternalObjectHandle__)(struct DebugBufferApi * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__dbgbufAccessCallback__)(struct DebugBufferApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__dbgbufGetMemInterMapParams__)(struct DebugBufferApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__dbgbufCheckMemInterUnmap__)(struct DebugBufferApi * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__dbgbufControlSerialization_Prologue__)(struct DebugBufferApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__dbgbufControlSerialization_Epilogue__)(struct DebugBufferApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__dbgbufControl_Prologue__)(struct DebugBufferApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__dbgbufControl_Epilogue__)(struct DebugBufferApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__dbgbufCanCopy__)(struct DebugBufferApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__dbgbufIsDuplicate__)(struct DebugBufferApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__dbgbufPreDestruct__)(struct DebugBufferApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__dbgbufControlFilter__)(struct DebugBufferApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__dbgbufIsPartialUnmapSupported__)(struct DebugBufferApi * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__dbgbufMapTo__)(struct DebugBufferApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__dbgbufUnmapFrom__)(struct DebugBufferApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__dbgbufGetRefCount__)(struct DebugBufferApi * /*this*/); // virtual inherited (res) base (gpures) + void (*__dbgbufAddAdditionalDependants__)(struct RsClient *, struct DebugBufferApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members MEMORY_DESCRIPTOR *pMemDesc; }; @@ -103,6 +122,7 @@ typedef struct DebugBufferApi DebugBufferApi; #define __nvoc_class_id_DebugBufferApi 0x5e7a1b #endif /* __nvoc_class_id_DebugBufferApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_DebugBufferApi; #define __staticCast_DebugBufferApi(pThis) \ @@ -115,146 +135,174 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_DebugBufferApi; ((DebugBufferApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(DebugBufferApi))) #endif //__nvoc_dbgbuffer_h_disabled - NV_STATUS __nvoc_objCreateDynamic_DebugBufferApi(DebugBufferApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_DebugBufferApi(DebugBufferApi**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_DebugBufferApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_DebugBufferApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define dbgbufMap_FNPTR(pDebugBufferApi) pDebugBufferApi->__dbgbufMap__ #define dbgbufMap(pDebugBufferApi, pCallContext, pParams, pCpuMapping) dbgbufMap_DISPATCH(pDebugBufferApi, pCallContext, pParams, pCpuMapping) +#define dbgbufUnmap_FNPTR(pDebugBufferApi) pDebugBufferApi->__dbgbufUnmap__ #define dbgbufUnmap(pDebugBufferApi, pCallContext, pCpuMapping) dbgbufUnmap_DISPATCH(pDebugBufferApi, pCallContext, pCpuMapping) +#define dbgbufGetMapAddrSpace_FNPTR(pDebugBufferApi) pDebugBufferApi->__dbgbufGetMapAddrSpace__ #define dbgbufGetMapAddrSpace(pDebugBufferApi, pCallContext, mapFlags, pAddrSpace) dbgbufGetMapAddrSpace_DISPATCH(pDebugBufferApi, pCallContext, mapFlags, pAddrSpace) +#define dbgbufGetMemoryMappingDescriptor_FNPTR(pDebugBufferApi) pDebugBufferApi->__dbgbufGetMemoryMappingDescriptor__ #define dbgbufGetMemoryMappingDescriptor(pDebugBufferApi, ppMemDesc) dbgbufGetMemoryMappingDescriptor_DISPATCH(pDebugBufferApi, ppMemDesc) +#define dbgbufControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define dbgbufControl(pGpuResource, pCallContext, pParams) dbgbufControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define dbgbufShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define dbgbufShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) dbgbufShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define dbgbufCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dbgbufCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define dbgbufMapTo(pResource, pParams) dbgbufMapTo_DISPATCH(pResource, pParams) -#define dbgbufGetRefCount(pResource) dbgbufGetRefCount_DISPATCH(pResource) -#define dbgbufAddAdditionalDependants(pClient, pResource, pReference) dbgbufAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define dbgbufControl_Prologue(pResource, pCallContext, pParams) dbgbufControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dbgbufGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define dbgbufGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) dbgbufGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define dbgbufInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define dbgbufInternalControlForward(pGpuResource, command, pParams, size) dbgbufInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define dbgbufUnmapFrom(pResource, pParams) dbgbufUnmapFrom_DISPATCH(pResource, pParams) -#define dbgbufControl_Epilogue(pResource, pCallContext, pParams) dbgbufControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dbgbufGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define dbgbufGetInternalObjectHandle(pGpuResource) dbgbufGetInternalObjectHandle_DISPATCH(pGpuResource) -#define dbgbufControl(pGpuResource, pCallContext, pParams) dbgbufControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define dbgbufAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define dbgbufAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dbgbufAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define dbgbufGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define dbgbufGetMemInterMapParams(pRmResource, pParams) dbgbufGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define dbgbufControlFilter(pResource, pCallContext, pParams) dbgbufControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define dbgbufCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define dbgbufCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dbgbufCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define dbgbufControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define dbgbufControlSerialization_Prologue(pResource, pCallContext, pParams) dbgbufControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dbgbufControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dbgbufControlSerialization_Epilogue(pResource, pCallContext, pParams) dbgbufControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dbgbufControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define dbgbufControl_Prologue(pResource, pCallContext, pParams) dbgbufControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dbgbufControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define dbgbufControl_Epilogue(pResource, pCallContext, pParams) dbgbufControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dbgbufCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define dbgbufCanCopy(pResource) dbgbufCanCopy_DISPATCH(pResource) -#define dbgbufIsPartialUnmapSupported(pResource) dbgbufIsPartialUnmapSupported_DISPATCH(pResource) -#define dbgbufPreDestruct(pResource) dbgbufPreDestruct_DISPATCH(pResource) +#define dbgbufIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define dbgbufIsDuplicate(pResource, hMemory, pDuplicate) dbgbufIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dbgbufControlSerialization_Epilogue(pResource, pCallContext, pParams) dbgbufControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dbgbufAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dbgbufAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS dbgbufMap_IMPL(struct DebugBufferApi *pDebugBufferApi, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); +#define dbgbufPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dbgbufPreDestruct(pResource) dbgbufPreDestruct_DISPATCH(pResource) +#define dbgbufControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dbgbufControlFilter(pResource, pCallContext, pParams) dbgbufControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define dbgbufIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dbgbufIsPartialUnmapSupported(pResource) dbgbufIsPartialUnmapSupported_DISPATCH(pResource) +#define dbgbufMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dbgbufMapTo(pResource, pParams) dbgbufMapTo_DISPATCH(pResource, pParams) +#define dbgbufUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dbgbufUnmapFrom(pResource, pParams) dbgbufUnmapFrom_DISPATCH(pResource, pParams) +#define dbgbufGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dbgbufGetRefCount(pResource) dbgbufGetRefCount_DISPATCH(pResource) +#define dbgbufAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dbgbufAddAdditionalDependants(pClient, pResource, pReference) dbgbufAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS dbgbufMap_DISPATCH(struct DebugBufferApi *pDebugBufferApi, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return pDebugBufferApi->__dbgbufMap__(pDebugBufferApi, pCallContext, pParams, pCpuMapping); } -NV_STATUS dbgbufUnmap_IMPL(struct DebugBufferApi *pDebugBufferApi, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); - static inline NV_STATUS dbgbufUnmap_DISPATCH(struct DebugBufferApi *pDebugBufferApi, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return pDebugBufferApi->__dbgbufUnmap__(pDebugBufferApi, pCallContext, pCpuMapping); } -NV_STATUS dbgbufGetMapAddrSpace_IMPL(struct DebugBufferApi *pDebugBufferApi, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); - static inline NV_STATUS dbgbufGetMapAddrSpace_DISPATCH(struct DebugBufferApi *pDebugBufferApi, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pDebugBufferApi->__dbgbufGetMapAddrSpace__(pDebugBufferApi, pCallContext, mapFlags, pAddrSpace); } -NV_STATUS dbgbufGetMemoryMappingDescriptor_IMPL(struct DebugBufferApi *pDebugBufferApi, MEMORY_DESCRIPTOR **ppMemDesc); - static inline NV_STATUS dbgbufGetMemoryMappingDescriptor_DISPATCH(struct DebugBufferApi *pDebugBufferApi, MEMORY_DESCRIPTOR **ppMemDesc) { return pDebugBufferApi->__dbgbufGetMemoryMappingDescriptor__(pDebugBufferApi, ppMemDesc); } +static inline NV_STATUS dbgbufControl_DISPATCH(struct DebugBufferApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__dbgbufControl__(pGpuResource, pCallContext, pParams); +} + static inline NvBool dbgbufShareCallback_DISPATCH(struct DebugBufferApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return pGpuResource->__dbgbufShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline NV_STATUS dbgbufCheckMemInterUnmap_DISPATCH(struct DebugBufferApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__dbgbufCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS dbgbufGetRegBaseOffsetAndSize_DISPATCH(struct DebugBufferApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__dbgbufGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS dbgbufMapTo_DISPATCH(struct DebugBufferApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dbgbufMapTo__(pResource, pParams); +static inline NV_STATUS dbgbufInternalControlForward_DISPATCH(struct DebugBufferApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__dbgbufInternalControlForward__(pGpuResource, command, pParams, size); } -static inline NvU32 dbgbufGetRefCount_DISPATCH(struct DebugBufferApi *pResource) { - return pResource->__dbgbufGetRefCount__(pResource); +static inline NvHandle dbgbufGetInternalObjectHandle_DISPATCH(struct DebugBufferApi *pGpuResource) { + return pGpuResource->__dbgbufGetInternalObjectHandle__(pGpuResource); } -static inline void dbgbufAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DebugBufferApi *pResource, RsResourceRef *pReference) { - pResource->__dbgbufAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvBool dbgbufAccessCallback_DISPATCH(struct DebugBufferApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__dbgbufAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS dbgbufControl_Prologue_DISPATCH(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dbgbufControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS dbgbufGetMemInterMapParams_DISPATCH(struct DebugBufferApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__dbgbufGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS dbgbufGetRegBaseOffsetAndSize_DISPATCH(struct DebugBufferApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__dbgbufGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS dbgbufCheckMemInterUnmap_DISPATCH(struct DebugBufferApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__dbgbufCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS dbgbufInternalControlForward_DISPATCH(struct DebugBufferApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__dbgbufInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS dbgbufControlSerialization_Prologue_DISPATCH(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dbgbufControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dbgbufUnmapFrom_DISPATCH(struct DebugBufferApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dbgbufUnmapFrom__(pResource, pParams); +static inline void dbgbufControlSerialization_Epilogue_DISPATCH(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__dbgbufControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS dbgbufControl_Prologue_DISPATCH(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dbgbufControl_Prologue__(pResource, pCallContext, pParams); } static inline void dbgbufControl_Epilogue_DISPATCH(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { pResource->__dbgbufControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NvHandle dbgbufGetInternalObjectHandle_DISPATCH(struct DebugBufferApi *pGpuResource) { - return pGpuResource->__dbgbufGetInternalObjectHandle__(pGpuResource); +static inline NvBool dbgbufCanCopy_DISPATCH(struct DebugBufferApi *pResource) { + return pResource->__dbgbufCanCopy__(pResource); } -static inline NV_STATUS dbgbufControl_DISPATCH(struct DebugBufferApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__dbgbufControl__(pGpuResource, pCallContext, pParams); +static inline NV_STATUS dbgbufIsDuplicate_DISPATCH(struct DebugBufferApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__dbgbufIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS dbgbufGetMemInterMapParams_DISPATCH(struct DebugBufferApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dbgbufGetMemInterMapParams__(pRmResource, pParams); +static inline void dbgbufPreDestruct_DISPATCH(struct DebugBufferApi *pResource) { + pResource->__dbgbufPreDestruct__(pResource); } static inline NV_STATUS dbgbufControlFilter_DISPATCH(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__dbgbufControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS dbgbufControlSerialization_Prologue_DISPATCH(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dbgbufControlSerialization_Prologue__(pResource, pCallContext, pParams); -} - -static inline NvBool dbgbufCanCopy_DISPATCH(struct DebugBufferApi *pResource) { - return pResource->__dbgbufCanCopy__(pResource); -} - static inline NvBool dbgbufIsPartialUnmapSupported_DISPATCH(struct DebugBufferApi *pResource) { return pResource->__dbgbufIsPartialUnmapSupported__(pResource); } -static inline void dbgbufPreDestruct_DISPATCH(struct DebugBufferApi *pResource) { - pResource->__dbgbufPreDestruct__(pResource); +static inline NV_STATUS dbgbufMapTo_DISPATCH(struct DebugBufferApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__dbgbufMapTo__(pResource, pParams); } -static inline NV_STATUS dbgbufIsDuplicate_DISPATCH(struct DebugBufferApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dbgbufIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS dbgbufUnmapFrom_DISPATCH(struct DebugBufferApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__dbgbufUnmapFrom__(pResource, pParams); } -static inline void dbgbufControlSerialization_Epilogue_DISPATCH(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dbgbufControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 dbgbufGetRefCount_DISPATCH(struct DebugBufferApi *pResource) { + return pResource->__dbgbufGetRefCount__(pResource); } -static inline NvBool dbgbufAccessCallback_DISPATCH(struct DebugBufferApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__dbgbufAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline void dbgbufAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DebugBufferApi *pResource, RsResourceRef *pReference) { + pResource->__dbgbufAddAdditionalDependants__(pClient, pResource, pReference); } +NV_STATUS dbgbufMap_IMPL(struct DebugBufferApi *pDebugBufferApi, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); + +NV_STATUS dbgbufUnmap_IMPL(struct DebugBufferApi *pDebugBufferApi, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); + +NV_STATUS dbgbufGetMapAddrSpace_IMPL(struct DebugBufferApi *pDebugBufferApi, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); + +NV_STATUS dbgbufGetMemoryMappingDescriptor_IMPL(struct DebugBufferApi *pDebugBufferApi, MEMORY_DESCRIPTOR **ppMemDesc); + NV_STATUS dbgbufConstruct_IMPL(struct DebugBufferApi *arg_pDebugBufferApi, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_dbgbufConstruct(arg_pDebugBufferApi, arg_pCallContext, arg_pParams) dbgbufConstruct_IMPL(arg_pDebugBufferApi, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_dce_client_nvoc.h b/src/nvidia/generated/g_dce_client_nvoc.h index b5bb169b79..3f40d703dc 100644 --- a/src/nvidia/generated/g_dce_client_nvoc.h +++ b/src/nvidia/generated/g_dce_client_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_DCE_CLIENT_NVOC_H_ #define _G_DCE_CLIENT_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_dce_client_nvoc.h" #ifndef _DCE_CLIENT_H_ @@ -63,28 +71,40 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJDCECLIENTRM { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct OBJDCECLIENTRM *__nvoc_pbase_OBJDCECLIENTRM; - NV_STATUS (*__dceclientConstructEngine__)(struct OBJGPU *, struct OBJDCECLIENTRM *, ENGDESCRIPTOR); - void (*__dceclientStateDestroy__)(struct OBJGPU *, struct OBJDCECLIENTRM *); - NV_STATUS (*__dceclientStateLoad__)(POBJGPU, struct OBJDCECLIENTRM *, NvU32); - NV_STATUS (*__dceclientStateUnload__)(POBJGPU, struct OBJDCECLIENTRM *, NvU32); - NV_STATUS (*__dceclientStateInitLocked__)(POBJGPU, struct OBJDCECLIENTRM *); - NV_STATUS (*__dceclientStatePreLoad__)(POBJGPU, struct OBJDCECLIENTRM *, NvU32); - NV_STATUS (*__dceclientStatePostUnload__)(POBJGPU, struct OBJDCECLIENTRM *, NvU32); - NV_STATUS (*__dceclientStatePreUnload__)(POBJGPU, struct OBJDCECLIENTRM *, NvU32); - NV_STATUS (*__dceclientStateInitUnlocked__)(POBJGPU, struct OBJDCECLIENTRM *); - void (*__dceclientInitMissing__)(POBJGPU, struct OBJDCECLIENTRM *); - NV_STATUS (*__dceclientStatePreInitLocked__)(POBJGPU, struct OBJDCECLIENTRM *); - NV_STATUS (*__dceclientStatePreInitUnlocked__)(POBJGPU, struct OBJDCECLIENTRM *); - NV_STATUS (*__dceclientStatePostLoad__)(POBJGPU, struct OBJDCECLIENTRM *, NvU32); - NvBool (*__dceclientIsPresent__)(POBJGPU, struct OBJDCECLIENTRM *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct OBJDCECLIENTRM *__nvoc_pbase_OBJDCECLIENTRM; // dceclient + + // Vtable with 14 per-object function pointers + NV_STATUS (*__dceclientConstructEngine__)(struct OBJGPU *, struct OBJDCECLIENTRM * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + void (*__dceclientStateDestroy__)(struct OBJGPU *, struct OBJDCECLIENTRM * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__dceclientStateLoad__)(struct OBJGPU *, struct OBJDCECLIENTRM * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__dceclientStateUnload__)(struct OBJGPU *, struct OBJDCECLIENTRM * /*this*/, NvU32); // virtual override (engstate) base (engstate) + void (*__dceclientInitMissing__)(POBJGPU, struct OBJDCECLIENTRM * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__dceclientStatePreInitLocked__)(POBJGPU, struct OBJDCECLIENTRM * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__dceclientStatePreInitUnlocked__)(POBJGPU, struct OBJDCECLIENTRM * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__dceclientStateInitLocked__)(POBJGPU, struct OBJDCECLIENTRM * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__dceclientStateInitUnlocked__)(POBJGPU, struct OBJDCECLIENTRM * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__dceclientStatePreLoad__)(POBJGPU, struct OBJDCECLIENTRM * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__dceclientStatePostLoad__)(POBJGPU, struct OBJDCECLIENTRM * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__dceclientStatePreUnload__)(POBJGPU, struct OBJDCECLIENTRM * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__dceclientStatePostUnload__)(POBJGPU, struct OBJDCECLIENTRM * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__dceclientIsPresent__)(POBJGPU, struct OBJDCECLIENTRM * /*this*/); // virtual inherited (engstate) base (engstate) + + // Data members struct OBJRPC *pRpc; NvU32 clientId[2]; + NvU32 hInternalClient; }; #ifndef __NVOC_CLASS_OBJDCECLIENTRM_TYPEDEF__ @@ -96,6 +116,7 @@ typedef struct OBJDCECLIENTRM OBJDCECLIENTRM; #define __nvoc_class_id_OBJDCECLIENTRM 0x61649c #endif /* __nvoc_class_id_OBJDCECLIENTRM */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJDCECLIENTRM; #define __staticCast_OBJDCECLIENTRM(pThis) \ @@ -108,6 +129,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJDCECLIENTRM; ((OBJDCECLIENTRM*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJDCECLIENTRM))) #endif //__nvoc_dce_client_h_disabled +// Property macros #define PDB_PROP_DCECLIENT_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_DCECLIENT_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -117,124 +139,146 @@ NV_STATUS __nvoc_objCreate_OBJDCECLIENTRM(OBJDCECLIENTRM**, Dynamic*, NvU32); #define __objCreate_OBJDCECLIENTRM(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJDCECLIENTRM((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define dceclientConstructEngine(arg0, arg1, arg2) dceclientConstructEngine_DISPATCH(arg0, arg1, arg2) -#define dceclientStateDestroy(arg0, arg1) dceclientStateDestroy_DISPATCH(arg0, arg1) -#define dceclientStateLoad(pGpu, pEngstate, arg0) dceclientStateLoad_DISPATCH(pGpu, pEngstate, arg0) -#define dceclientStateUnload(pGpu, pEngstate, arg0) dceclientStateUnload_DISPATCH(pGpu, pEngstate, arg0) -#define dceclientStateInitLocked(pGpu, pEngstate) dceclientStateInitLocked_DISPATCH(pGpu, pEngstate) -#define dceclientStatePreLoad(pGpu, pEngstate, arg0) dceclientStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define dceclientStatePostUnload(pGpu, pEngstate, arg0) dceclientStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define dceclientStatePreUnload(pGpu, pEngstate, arg0) dceclientStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define dceclientStateInitUnlocked(pGpu, pEngstate) dceclientStateInitUnlocked_DISPATCH(pGpu, pEngstate) + +// Wrapper macros +#define dceclientConstructEngine_FNPTR(arg_this) arg_this->__dceclientConstructEngine__ +#define dceclientConstructEngine(arg1, arg_this, arg3) dceclientConstructEngine_DISPATCH(arg1, arg_this, arg3) +#define dceclientStateDestroy_FNPTR(arg_this) arg_this->__dceclientStateDestroy__ +#define dceclientStateDestroy(arg1, arg_this) dceclientStateDestroy_DISPATCH(arg1, arg_this) +#define dceclientStateLoad_FNPTR(arg_this) arg_this->__dceclientStateLoad__ +#define dceclientStateLoad(arg1, arg_this, arg3) dceclientStateLoad_DISPATCH(arg1, arg_this, arg3) +#define dceclientStateUnload_FNPTR(arg_this) arg_this->__dceclientStateUnload__ +#define dceclientStateUnload(arg1, arg_this, arg3) dceclientStateUnload_DISPATCH(arg1, arg_this, arg3) +#define dceclientInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define dceclientInitMissing(pGpu, pEngstate) dceclientInitMissing_DISPATCH(pGpu, pEngstate) +#define dceclientStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define dceclientStatePreInitLocked(pGpu, pEngstate) dceclientStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define dceclientStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define dceclientStatePreInitUnlocked(pGpu, pEngstate) dceclientStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define dceclientStatePostLoad(pGpu, pEngstate, arg0) dceclientStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) +#define dceclientStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define dceclientStateInitLocked(pGpu, pEngstate) dceclientStateInitLocked_DISPATCH(pGpu, pEngstate) +#define dceclientStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define dceclientStateInitUnlocked(pGpu, pEngstate) dceclientStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define dceclientStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define dceclientStatePreLoad(pGpu, pEngstate, arg3) dceclientStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define dceclientStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define dceclientStatePostLoad(pGpu, pEngstate, arg3) dceclientStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define dceclientStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define dceclientStatePreUnload(pGpu, pEngstate, arg3) dceclientStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define dceclientStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define dceclientStatePostUnload(pGpu, pEngstate, arg3) dceclientStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define dceclientIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define dceclientIsPresent(pGpu, pEngstate) dceclientIsPresent_DISPATCH(pGpu, pEngstate) -NV_STATUS dceclientConstructEngine_IMPL(struct OBJGPU *arg0, struct OBJDCECLIENTRM *arg1, ENGDESCRIPTOR arg2); -static inline NV_STATUS dceclientConstructEngine_DISPATCH(struct OBJGPU *arg0, struct OBJDCECLIENTRM *arg1, ENGDESCRIPTOR arg2) { - return arg1->__dceclientConstructEngine__(arg0, arg1, arg2); +// Dispatch functions +static inline NV_STATUS dceclientConstructEngine_DISPATCH(struct OBJGPU *arg1, struct OBJDCECLIENTRM *arg_this, ENGDESCRIPTOR arg3) { + return arg_this->__dceclientConstructEngine__(arg1, arg_this, arg3); } -void dceclientStateDestroy_IMPL(struct OBJGPU *arg0, struct OBJDCECLIENTRM *arg1); - -static inline void dceclientStateDestroy_DISPATCH(struct OBJGPU *arg0, struct OBJDCECLIENTRM *arg1) { - arg1->__dceclientStateDestroy__(arg0, arg1); +static inline void dceclientStateDestroy_DISPATCH(struct OBJGPU *arg1, struct OBJDCECLIENTRM *arg_this) { + arg_this->__dceclientStateDestroy__(arg1, arg_this); } -static inline NV_STATUS dceclientStateLoad_DISPATCH(POBJGPU pGpu, struct OBJDCECLIENTRM *pEngstate, NvU32 arg0) { - return pEngstate->__dceclientStateLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS dceclientStateLoad_DISPATCH(struct OBJGPU *arg1, struct OBJDCECLIENTRM *arg_this, NvU32 arg3) { + return arg_this->__dceclientStateLoad__(arg1, arg_this, arg3); } -static inline NV_STATUS dceclientStateUnload_DISPATCH(POBJGPU pGpu, struct OBJDCECLIENTRM *pEngstate, NvU32 arg0) { - return pEngstate->__dceclientStateUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS dceclientStateUnload_DISPATCH(struct OBJGPU *arg1, struct OBJDCECLIENTRM *arg_this, NvU32 arg3) { + return arg_this->__dceclientStateUnload__(arg1, arg_this, arg3); } -static inline NV_STATUS dceclientStateInitLocked_DISPATCH(POBJGPU pGpu, struct OBJDCECLIENTRM *pEngstate) { - return pEngstate->__dceclientStateInitLocked__(pGpu, pEngstate); +static inline void dceclientInitMissing_DISPATCH(POBJGPU pGpu, struct OBJDCECLIENTRM *pEngstate) { + pEngstate->__dceclientInitMissing__(pGpu, pEngstate); } -static inline NV_STATUS dceclientStatePreLoad_DISPATCH(POBJGPU pGpu, struct OBJDCECLIENTRM *pEngstate, NvU32 arg0) { - return pEngstate->__dceclientStatePreLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS dceclientStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct OBJDCECLIENTRM *pEngstate) { + return pEngstate->__dceclientStatePreInitLocked__(pGpu, pEngstate); } -static inline NV_STATUS dceclientStatePostUnload_DISPATCH(POBJGPU pGpu, struct OBJDCECLIENTRM *pEngstate, NvU32 arg0) { - return pEngstate->__dceclientStatePostUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS dceclientStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct OBJDCECLIENTRM *pEngstate) { + return pEngstate->__dceclientStatePreInitUnlocked__(pGpu, pEngstate); } -static inline NV_STATUS dceclientStatePreUnload_DISPATCH(POBJGPU pGpu, struct OBJDCECLIENTRM *pEngstate, NvU32 arg0) { - return pEngstate->__dceclientStatePreUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS dceclientStateInitLocked_DISPATCH(POBJGPU pGpu, struct OBJDCECLIENTRM *pEngstate) { + return pEngstate->__dceclientStateInitLocked__(pGpu, pEngstate); } static inline NV_STATUS dceclientStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct OBJDCECLIENTRM *pEngstate) { return pEngstate->__dceclientStateInitUnlocked__(pGpu, pEngstate); } -static inline void dceclientInitMissing_DISPATCH(POBJGPU pGpu, struct OBJDCECLIENTRM *pEngstate) { - pEngstate->__dceclientInitMissing__(pGpu, pEngstate); +static inline NV_STATUS dceclientStatePreLoad_DISPATCH(POBJGPU pGpu, struct OBJDCECLIENTRM *pEngstate, NvU32 arg3) { + return pEngstate->__dceclientStatePreLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS dceclientStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct OBJDCECLIENTRM *pEngstate) { - return pEngstate->__dceclientStatePreInitLocked__(pGpu, pEngstate); +static inline NV_STATUS dceclientStatePostLoad_DISPATCH(POBJGPU pGpu, struct OBJDCECLIENTRM *pEngstate, NvU32 arg3) { + return pEngstate->__dceclientStatePostLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS dceclientStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct OBJDCECLIENTRM *pEngstate) { - return pEngstate->__dceclientStatePreInitUnlocked__(pGpu, pEngstate); +static inline NV_STATUS dceclientStatePreUnload_DISPATCH(POBJGPU pGpu, struct OBJDCECLIENTRM *pEngstate, NvU32 arg3) { + return pEngstate->__dceclientStatePreUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS dceclientStatePostLoad_DISPATCH(POBJGPU pGpu, struct OBJDCECLIENTRM *pEngstate, NvU32 arg0) { - return pEngstate->__dceclientStatePostLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS dceclientStatePostUnload_DISPATCH(POBJGPU pGpu, struct OBJDCECLIENTRM *pEngstate, NvU32 arg3) { + return pEngstate->__dceclientStatePostUnload__(pGpu, pEngstate, arg3); } static inline NvBool dceclientIsPresent_DISPATCH(POBJGPU pGpu, struct OBJDCECLIENTRM *pEngstate) { return pEngstate->__dceclientIsPresent__(pGpu, pEngstate); } -void dceclientDestruct_IMPL(struct OBJDCECLIENTRM *arg0); +NV_STATUS dceclientConstructEngine_IMPL(struct OBJGPU *arg1, struct OBJDCECLIENTRM *arg2, ENGDESCRIPTOR arg3); + +void dceclientStateDestroy_IMPL(struct OBJGPU *arg1, struct OBJDCECLIENTRM *arg2); + +NV_STATUS dceclientStateLoad_IMPL(struct OBJGPU *arg1, struct OBJDCECLIENTRM *arg2, NvU32 arg3); + +NV_STATUS dceclientStateUnload_IMPL(struct OBJGPU *arg1, struct OBJDCECLIENTRM *arg2, NvU32 arg3); + +void dceclientDestruct_IMPL(struct OBJDCECLIENTRM *arg1); -#define __nvoc_dceclientDestruct(arg0) dceclientDestruct_IMPL(arg0) -NV_STATUS dceclientInitRpcInfra_IMPL(struct OBJGPU *arg0, struct OBJDCECLIENTRM *arg1); +#define __nvoc_dceclientDestruct(arg1) dceclientDestruct_IMPL(arg1) +NV_STATUS dceclientInitRpcInfra_IMPL(struct OBJGPU *arg1, struct OBJDCECLIENTRM *arg2); #ifdef __nvoc_dce_client_h_disabled -static inline NV_STATUS dceclientInitRpcInfra(struct OBJGPU *arg0, struct OBJDCECLIENTRM *arg1) { +static inline NV_STATUS dceclientInitRpcInfra(struct OBJGPU *arg1, struct OBJDCECLIENTRM *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJDCECLIENTRM was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_dce_client_h_disabled -#define dceclientInitRpcInfra(arg0, arg1) dceclientInitRpcInfra_IMPL(arg0, arg1) +#define dceclientInitRpcInfra(arg1, arg2) dceclientInitRpcInfra_IMPL(arg1, arg2) #endif //__nvoc_dce_client_h_disabled -void dceclientDeinitRpcInfra_IMPL(struct OBJDCECLIENTRM *arg0); +void dceclientDeinitRpcInfra_IMPL(struct OBJDCECLIENTRM *arg1); #ifdef __nvoc_dce_client_h_disabled -static inline void dceclientDeinitRpcInfra(struct OBJDCECLIENTRM *arg0) { +static inline void dceclientDeinitRpcInfra(struct OBJDCECLIENTRM *arg1) { NV_ASSERT_FAILED_PRECOMP("OBJDCECLIENTRM was disabled!"); } #else //__nvoc_dce_client_h_disabled -#define dceclientDeinitRpcInfra(arg0) dceclientDeinitRpcInfra_IMPL(arg0) +#define dceclientDeinitRpcInfra(arg1) dceclientDeinitRpcInfra_IMPL(arg1) #endif //__nvoc_dce_client_h_disabled -NV_STATUS dceclientDceRmInit_IMPL(struct OBJGPU *arg0, struct OBJDCECLIENTRM *arg1, NvBool arg2); +NV_STATUS dceclientDceRmInit_IMPL(struct OBJGPU *arg1, struct OBJDCECLIENTRM *arg2, NvBool arg3); #ifdef __nvoc_dce_client_h_disabled -static inline NV_STATUS dceclientDceRmInit(struct OBJGPU *arg0, struct OBJDCECLIENTRM *arg1, NvBool arg2) { +static inline NV_STATUS dceclientDceRmInit(struct OBJGPU *arg1, struct OBJDCECLIENTRM *arg2, NvBool arg3) { NV_ASSERT_FAILED_PRECOMP("OBJDCECLIENTRM was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_dce_client_h_disabled -#define dceclientDceRmInit(arg0, arg1, arg2) dceclientDceRmInit_IMPL(arg0, arg1, arg2) +#define dceclientDceRmInit(arg1, arg2, arg3) dceclientDceRmInit_IMPL(arg1, arg2, arg3) #endif //__nvoc_dce_client_h_disabled -NV_STATUS dceclientSendRpc_IMPL(struct OBJDCECLIENTRM *arg0, void *arg1, NvU32 arg2); +NV_STATUS dceclientSendRpc_IMPL(struct OBJDCECLIENTRM *arg1, void *arg2, NvU32 arg3); #ifdef __nvoc_dce_client_h_disabled -static inline NV_STATUS dceclientSendRpc(struct OBJDCECLIENTRM *arg0, void *arg1, NvU32 arg2) { +static inline NV_STATUS dceclientSendRpc(struct OBJDCECLIENTRM *arg1, void *arg2, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("OBJDCECLIENTRM was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_dce_client_h_disabled -#define dceclientSendRpc(arg0, arg1, arg2) dceclientSendRpc_IMPL(arg0, arg1, arg2) +#define dceclientSendRpc(arg1, arg2, arg3) dceclientSendRpc_IMPL(arg1, arg2, arg3) #endif //__nvoc_dce_client_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_deferred_api_nvoc.c b/src/nvidia/generated/g_deferred_api_nvoc.c index d70c6a6fef..e112636f2d 100644 --- a/src/nvidia/generated/g_deferred_api_nvoc.c +++ b/src/nvidia/generated/g_deferred_api_nvoc.c @@ -120,191 +120,244 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DeferredApiObject = /*pExportInfo=*/ &__nvoc_export_info_DeferredApiObject }; -static NV_STATUS __nvoc_thunk_DeferredApiObject_chandesGetSwMethods(struct ChannelDescendant *pDeferredApi, const METHOD **ppMethods, NvU32 *pNumMethods) { - return defapiGetSwMethods((struct DeferredApiObject *)(((unsigned char *)pDeferredApi) - __nvoc_rtti_DeferredApiObject_ChannelDescendant.offset), ppMethods, pNumMethods); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NvBool __nvoc_thunk_DeferredApiObject_chandesIsSwMethodStalling(struct ChannelDescendant *pDeferredApi, NvU32 hDeferredApi) { - return defapiIsSwMethodStalling((struct DeferredApiObject *)(((unsigned char *)pDeferredApi) - __nvoc_rtti_DeferredApiObject_ChannelDescendant.offset), hDeferredApi); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DeferredApiObject[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) defapiCtrlCmdDeferredApi_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x50800101u, + /*paramSize=*/ sizeof(NV5080_CTRL_DEFERRED_API_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_DeferredApiObject.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "defapiCtrlCmdDeferredApi" +#endif + }, + { /* [1] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) defapiCtrlCmdRemoveApi_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x50800102u, + /*paramSize=*/ sizeof(NV5080_CTRL_REMOVE_API_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_DeferredApiObject.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "defapiCtrlCmdRemoveApi" +#endif + }, + { /* [2] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) defapiCtrlCmdDeferredApiV2_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x50800103u, + /*paramSize=*/ sizeof(NV5080_CTRL_DEFERRED_API_V2_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_DeferredApiObject.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "defapiCtrlCmdDeferredApiV2" +#endif + }, + { /* [3] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) defapiCtrlCmdDeferredApiInternal_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c8u) + /*flags=*/ 0x400c8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x50800104u, + /*paramSize=*/ sizeof(NV5080_CTRL_DEFERRED_API_INTERNAL_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_DeferredApiObject.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "defapiCtrlCmdDeferredApiInternal" +#endif + }, + +}; -static NV_STATUS __nvoc_thunk_ChannelDescendant_defapiCheckMemInterUnmap(struct DeferredApiObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_DeferredApiObject_ChannelDescendant.offset), bSubdeviceHandleProvided); +// 2 down-thunk(s) defined to bridge methods in DeferredApiObject from superclasses + +// defapiGetSwMethods: virtual override (chandes) base (chandes) +static NV_STATUS __nvoc_down_thunk_DeferredApiObject_chandesGetSwMethods(struct ChannelDescendant *pDeferredApi, const METHOD **ppMethods, NvU32 *pNumMethods) { + return defapiGetSwMethods((struct DeferredApiObject *)(((unsigned char *) pDeferredApi) - __nvoc_rtti_DeferredApiObject_ChannelDescendant.offset), ppMethods, pNumMethods); } -static NvBool __nvoc_thunk_GpuResource_defapiShareCallback(struct DeferredApiObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// defapiIsSwMethodStalling: virtual override (chandes) base (chandes) +static NvBool __nvoc_down_thunk_DeferredApiObject_chandesIsSwMethodStalling(struct ChannelDescendant *pDeferredApi, NvU32 hDeferredApi) { + return defapiIsSwMethodStalling((struct DeferredApiObject *)(((unsigned char *) pDeferredApi) - __nvoc_rtti_DeferredApiObject_ChannelDescendant.offset), hDeferredApi); } -static NvBool __nvoc_thunk_RmResource_defapiAccessCallback(struct DeferredApiObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), pInvokingClient, pAllocParams, accessRight); + +// 30 up-thunk(s) defined to bridge methods in DeferredApiObject to superclasses + +// defapiCheckMemInterUnmap: virtual inherited (chandes) base (chandes) +static NV_STATUS __nvoc_up_thunk_ChannelDescendant_defapiCheckMemInterUnmap(struct DeferredApiObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { + return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_DeferredApiObject_ChannelDescendant.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RsResource_defapiMapTo(struct DeferredApiObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset), pParams); +// defapiControl: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_defapiControl(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_defapiGetMapAddrSpace(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// defapiMap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_defapiMap(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static void __nvoc_thunk_Notifier_defapiSetNotificationShare(struct DeferredApiObject *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DeferredApiObject_Notifier.offset), pNotifShare); +// defapiUnmap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_defapiUnmap(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), pCallContext, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_defapiGetRefCount(struct DeferredApiObject *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset)); +// defapiShareCallback: virtual inherited (gpures) base (chandes) +static NvBool __nvoc_up_thunk_GpuResource_defapiShareCallback(struct DeferredApiObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static void __nvoc_thunk_RsResource_defapiAddAdditionalDependants(struct RsClient *pClient, struct DeferredApiObject *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset), pReference); +// defapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_defapiGetRegBaseOffsetAndSize(struct DeferredApiObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_RmResource_defapiControl_Prologue(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), pCallContext, pParams); +// defapiGetMapAddrSpace: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_defapiGetMapAddrSpace(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_GpuResource_defapiGetRegBaseOffsetAndSize(struct DeferredApiObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), pGpu, pOffset, pSize); +// defapiInternalControlForward: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_defapiInternalControlForward(struct DeferredApiObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_GpuResource_defapiInternalControlForward(struct DeferredApiObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), command, pParams, size); +// defapiGetInternalObjectHandle: virtual inherited (gpures) base (chandes) +static NvHandle __nvoc_up_thunk_GpuResource_defapiGetInternalObjectHandle(struct DeferredApiObject *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_defapiUnmapFrom(struct DeferredApiObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset), pParams); +// defapiAccessCallback: virtual inherited (rmres) base (chandes) +static NvBool __nvoc_up_thunk_RmResource_defapiAccessCallback(struct DeferredApiObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static void __nvoc_thunk_RmResource_defapiControl_Epilogue(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), pCallContext, pParams); +// defapiGetMemInterMapParams: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_defapiGetMemInterMapParams(struct DeferredApiObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), pParams); } -static NvHandle __nvoc_thunk_GpuResource_defapiGetInternalObjectHandle(struct DeferredApiObject *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset)); +// defapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_defapiGetMemoryMappingDescriptor(struct DeferredApiObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_GpuResource_defapiControl(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), pCallContext, pParams); +// defapiControlSerialization_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_defapiControlSerialization_Prologue(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_defapiUnmap(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), pCallContext, pCpuMapping); +// defapiControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_defapiControlSerialization_Epilogue(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_defapiGetMemInterMapParams(struct DeferredApiObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), pParams); +// defapiControl_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_defapiControl_Prologue(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_defapiGetMemoryMappingDescriptor(struct DeferredApiObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), ppMemDesc); +// defapiControl_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_defapiControl_Epilogue(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_defapiControlFilter(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset), pCallContext, pParams); +// defapiCanCopy: virtual inherited (res) base (chandes) +static NvBool __nvoc_up_thunk_RsResource_defapiCanCopy(struct DeferredApiObject *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_defapiUnregisterEvent(struct DeferredApiObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DeferredApiObject_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// defapiIsDuplicate: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_defapiIsDuplicate(struct DeferredApiObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RmResource_defapiControlSerialization_Prologue(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), pCallContext, pParams); +// defapiPreDestruct: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_defapiPreDestruct(struct DeferredApiObject *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_defapiCanCopy(struct DeferredApiObject *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset)); +// defapiControlFilter: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_defapiControlFilter(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_defapiIsPartialUnmapSupported(struct DeferredApiObject *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset)); +// defapiIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body +static NvBool __nvoc_up_thunk_RsResource_defapiIsPartialUnmapSupported(struct DeferredApiObject *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset)); } -static void __nvoc_thunk_RsResource_defapiPreDestruct(struct DeferredApiObject *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset)); +// defapiMapTo: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_defapiMapTo(struct DeferredApiObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_defapiIsDuplicate(struct DeferredApiObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset), hMemory, pDuplicate); +// defapiUnmapFrom: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_defapiUnmapFrom(struct DeferredApiObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_defapiControlSerialization_Epilogue(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), pCallContext, pParams); +// defapiGetRefCount: virtual inherited (res) base (chandes) +static NvU32 __nvoc_up_thunk_RsResource_defapiGetRefCount(struct DeferredApiObject *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset)); } -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_defapiGetNotificationListPtr(struct DeferredApiObject *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DeferredApiObject_Notifier.offset)); +// defapiAddAdditionalDependants: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_defapiAddAdditionalDependants(struct RsClient *pClient, struct DeferredApiObject *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset), pReference); } -static struct NotifShare *__nvoc_thunk_Notifier_defapiGetNotificationShare(struct DeferredApiObject *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DeferredApiObject_Notifier.offset)); +// defapiGetNotificationListPtr: virtual inherited (notify) base (chandes) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_defapiGetNotificationListPtr(struct DeferredApiObject *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DeferredApiObject_Notifier.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_defapiMap(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// defapiGetNotificationShare: virtual inherited (notify) base (chandes) +static struct NotifShare * __nvoc_up_thunk_Notifier_defapiGetNotificationShare(struct DeferredApiObject *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DeferredApiObject_Notifier.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_defapiGetOrAllocNotifShare(struct DeferredApiObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DeferredApiObject_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +// defapiSetNotificationShare: virtual inherited (notify) base (chandes) +static void __nvoc_up_thunk_Notifier_defapiSetNotificationShare(struct DeferredApiObject *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DeferredApiObject_Notifier.offset), pNotifShare); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// defapiUnregisterEvent: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_defapiUnregisterEvent(struct DeferredApiObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DeferredApiObject_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DeferredApiObject[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) defapiCtrlCmdDeferredApi_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x50800101u, - /*paramSize=*/ sizeof(NV5080_CTRL_DEFERRED_API_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_DeferredApiObject.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "defapiCtrlCmdDeferredApi" -#endif - }, - { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) defapiCtrlCmdRemoveApi_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x50800102u, - /*paramSize=*/ sizeof(NV5080_CTRL_REMOVE_API_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_DeferredApiObject.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "defapiCtrlCmdRemoveApi" -#endif - }, - { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) defapiCtrlCmdDeferredApiV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x50800103u, - /*paramSize=*/ sizeof(NV5080_CTRL_DEFERRED_API_V2_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_DeferredApiObject.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "defapiCtrlCmdDeferredApiV2" -#endif - }, +// defapiGetOrAllocNotifShare: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_defapiGetOrAllocNotifShare(struct DeferredApiObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DeferredApiObject_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_DeferredApiObject = { - /*numEntries=*/ 3, + /*numEntries=*/ 4, /*pExportEntries=*/ __nvoc_exported_method_def_DeferredApiObject }; @@ -338,91 +391,134 @@ NV_STATUS __nvoc_ctor_DeferredApiObject(DeferredApiObject *pThis, RmHalspecOwner return status; } +// Vtable initialization static void __nvoc_init_funcTable_DeferredApiObject_1(DeferredApiObject *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // defapiGetSwMethods -- virtual override (chandes) base (chandes) pThis->__defapiGetSwMethods__ = &defapiGetSwMethods_IMPL; + pThis->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ = &__nvoc_down_thunk_DeferredApiObject_chandesGetSwMethods; + // defapiIsSwMethodStalling -- virtual override (chandes) base (chandes) pThis->__defapiIsSwMethodStalling__ = &defapiIsSwMethodStalling_IMPL; + pThis->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ = &__nvoc_down_thunk_DeferredApiObject_chandesIsSwMethodStalling; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // defapiCtrlCmdDeferredApi -- exported (id=0x50800101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__defapiCtrlCmdDeferredApi__ = &defapiCtrlCmdDeferredApi_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) + // defapiCtrlCmdDeferredApiV2 -- exported (id=0x50800103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__defapiCtrlCmdDeferredApiV2__ = &defapiCtrlCmdDeferredApiV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - pThis->__defapiCtrlCmdRemoveApi__ = &defapiCtrlCmdRemoveApi_IMPL; + // defapiCtrlCmdDeferredApiInternal -- exported (id=0x50800104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c8u) + pThis->__defapiCtrlCmdDeferredApiInternal__ = &defapiCtrlCmdDeferredApiInternal_IMPL; #endif - pThis->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ = &__nvoc_thunk_DeferredApiObject_chandesGetSwMethods; + // defapiCtrlCmdRemoveApi -- exported (id=0x50800102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + pThis->__defapiCtrlCmdRemoveApi__ = &defapiCtrlCmdRemoveApi_IMPL; +#endif - pThis->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ = &__nvoc_thunk_DeferredApiObject_chandesIsSwMethodStalling; + // defapiCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) + pThis->__defapiCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_defapiCheckMemInterUnmap; - pThis->__defapiCheckMemInterUnmap__ = &__nvoc_thunk_ChannelDescendant_defapiCheckMemInterUnmap; + // defapiControl -- virtual inherited (gpures) base (chandes) + pThis->__defapiControl__ = &__nvoc_up_thunk_GpuResource_defapiControl; - pThis->__defapiShareCallback__ = &__nvoc_thunk_GpuResource_defapiShareCallback; + // defapiMap -- virtual inherited (gpures) base (chandes) + pThis->__defapiMap__ = &__nvoc_up_thunk_GpuResource_defapiMap; - pThis->__defapiAccessCallback__ = &__nvoc_thunk_RmResource_defapiAccessCallback; + // defapiUnmap -- virtual inherited (gpures) base (chandes) + pThis->__defapiUnmap__ = &__nvoc_up_thunk_GpuResource_defapiUnmap; - pThis->__defapiMapTo__ = &__nvoc_thunk_RsResource_defapiMapTo; + // defapiShareCallback -- virtual inherited (gpures) base (chandes) + pThis->__defapiShareCallback__ = &__nvoc_up_thunk_GpuResource_defapiShareCallback; - pThis->__defapiGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_defapiGetMapAddrSpace; + // defapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) + pThis->__defapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_defapiGetRegBaseOffsetAndSize; - pThis->__defapiSetNotificationShare__ = &__nvoc_thunk_Notifier_defapiSetNotificationShare; + // defapiGetMapAddrSpace -- virtual inherited (gpures) base (chandes) + pThis->__defapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_defapiGetMapAddrSpace; - pThis->__defapiGetRefCount__ = &__nvoc_thunk_RsResource_defapiGetRefCount; + // defapiInternalControlForward -- virtual inherited (gpures) base (chandes) + pThis->__defapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_defapiInternalControlForward; - pThis->__defapiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_defapiAddAdditionalDependants; + // defapiGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) + pThis->__defapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_defapiGetInternalObjectHandle; - pThis->__defapiControl_Prologue__ = &__nvoc_thunk_RmResource_defapiControl_Prologue; + // defapiAccessCallback -- virtual inherited (rmres) base (chandes) + pThis->__defapiAccessCallback__ = &__nvoc_up_thunk_RmResource_defapiAccessCallback; - pThis->__defapiGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_defapiGetRegBaseOffsetAndSize; + // defapiGetMemInterMapParams -- virtual inherited (rmres) base (chandes) + pThis->__defapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_defapiGetMemInterMapParams; - pThis->__defapiInternalControlForward__ = &__nvoc_thunk_GpuResource_defapiInternalControlForward; + // defapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) + pThis->__defapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_defapiGetMemoryMappingDescriptor; - pThis->__defapiUnmapFrom__ = &__nvoc_thunk_RsResource_defapiUnmapFrom; + // defapiControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__defapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_defapiControlSerialization_Prologue; - pThis->__defapiControl_Epilogue__ = &__nvoc_thunk_RmResource_defapiControl_Epilogue; + // defapiControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__defapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_defapiControlSerialization_Epilogue; - pThis->__defapiGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_defapiGetInternalObjectHandle; + // defapiControl_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__defapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_defapiControl_Prologue; - pThis->__defapiControl__ = &__nvoc_thunk_GpuResource_defapiControl; + // defapiControl_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__defapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_defapiControl_Epilogue; - pThis->__defapiUnmap__ = &__nvoc_thunk_GpuResource_defapiUnmap; + // defapiCanCopy -- virtual inherited (res) base (chandes) + pThis->__defapiCanCopy__ = &__nvoc_up_thunk_RsResource_defapiCanCopy; - pThis->__defapiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_defapiGetMemInterMapParams; + // defapiIsDuplicate -- virtual inherited (res) base (chandes) + pThis->__defapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_defapiIsDuplicate; - pThis->__defapiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_defapiGetMemoryMappingDescriptor; + // defapiPreDestruct -- virtual inherited (res) base (chandes) + pThis->__defapiPreDestruct__ = &__nvoc_up_thunk_RsResource_defapiPreDestruct; - pThis->__defapiControlFilter__ = &__nvoc_thunk_RsResource_defapiControlFilter; + // defapiControlFilter -- virtual inherited (res) base (chandes) + pThis->__defapiControlFilter__ = &__nvoc_up_thunk_RsResource_defapiControlFilter; - pThis->__defapiUnregisterEvent__ = &__nvoc_thunk_Notifier_defapiUnregisterEvent; + // defapiIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body + pThis->__defapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_defapiIsPartialUnmapSupported; - pThis->__defapiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_defapiControlSerialization_Prologue; + // defapiMapTo -- virtual inherited (res) base (chandes) + pThis->__defapiMapTo__ = &__nvoc_up_thunk_RsResource_defapiMapTo; - pThis->__defapiCanCopy__ = &__nvoc_thunk_RsResource_defapiCanCopy; + // defapiUnmapFrom -- virtual inherited (res) base (chandes) + pThis->__defapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_defapiUnmapFrom; - pThis->__defapiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_defapiIsPartialUnmapSupported; + // defapiGetRefCount -- virtual inherited (res) base (chandes) + pThis->__defapiGetRefCount__ = &__nvoc_up_thunk_RsResource_defapiGetRefCount; - pThis->__defapiPreDestruct__ = &__nvoc_thunk_RsResource_defapiPreDestruct; + // defapiAddAdditionalDependants -- virtual inherited (res) base (chandes) + pThis->__defapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_defapiAddAdditionalDependants; - pThis->__defapiIsDuplicate__ = &__nvoc_thunk_RsResource_defapiIsDuplicate; + // defapiGetNotificationListPtr -- virtual inherited (notify) base (chandes) + pThis->__defapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_defapiGetNotificationListPtr; - pThis->__defapiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_defapiControlSerialization_Epilogue; + // defapiGetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__defapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_defapiGetNotificationShare; - pThis->__defapiGetNotificationListPtr__ = &__nvoc_thunk_Notifier_defapiGetNotificationListPtr; + // defapiSetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__defapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_defapiSetNotificationShare; - pThis->__defapiGetNotificationShare__ = &__nvoc_thunk_Notifier_defapiGetNotificationShare; + // defapiUnregisterEvent -- virtual inherited (notify) base (chandes) + pThis->__defapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_defapiUnregisterEvent; - pThis->__defapiMap__ = &__nvoc_thunk_GpuResource_defapiMap; + // defapiGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) + pThis->__defapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_defapiGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_DeferredApiObject_1 with approximately 38 basic block(s). - pThis->__defapiGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_defapiGetOrAllocNotifShare; -} +// Initialize vtable(s) for 36 virtual method(s). void __nvoc_init_funcTable_DeferredApiObject(DeferredApiObject *pThis) { + + // Initialize vtable(s) with 36 per-object function pointer(s). __nvoc_init_funcTable_DeferredApiObject_1(pThis); } diff --git a/src/nvidia/generated/g_deferred_api_nvoc.h b/src/nvidia/generated/g_deferred_api_nvoc.h index 3647e14be6..a0b8be6c3f 100644 --- a/src/nvidia/generated/g_deferred_api_nvoc.h +++ b/src/nvidia/generated/g_deferred_api_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_DEFERRED_API_NVOC_H_ #define _G_DEFERRED_API_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_deferred_api_nvoc.h" #ifndef DEFERRED_API_H @@ -41,7 +49,6 @@ extern "C" { #define DEFERRED_API_INFO_FLAGS_HAS_EXECUTED 0x00000001 #define DEFERRED_API_INFO_FLAGS_HAS_TLB_FLUSHED 0x00000002 -#define DEFERRED_API_INFO_FLAGS_HAS_PRIVATE_DATA_ALLOC 0x00000004 typedef struct _def_deferred_api_info { @@ -50,7 +57,6 @@ typedef struct _def_deferred_api_info NvU32 Flags; // see DEFERRED_API_INFO_FLAGS_* defines RS_PRIV_LEVEL privLevel; // privilege level of the client that initiated deferred call. void * pDeferredApiInfo; - NvP64 pDeferredPrivateData; } DEFERRED_API_INFO; @@ -67,53 +73,65 @@ typedef struct _def_deferred_api_info #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct DeferredApiObject { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; - struct DeferredApiObject *__nvoc_pbase_DeferredApiObject; - NV_STATUS (*__defapiGetSwMethods__)(struct DeferredApiObject *, const METHOD **, NvU32 *); - NvBool (*__defapiIsSwMethodStalling__)(struct DeferredApiObject *, NvU32); - NV_STATUS (*__defapiCtrlCmdDeferredApi__)(struct DeferredApiObject *, NV5080_CTRL_DEFERRED_API_PARAMS *); - NV_STATUS (*__defapiCtrlCmdDeferredApiV2__)(struct DeferredApiObject *, NV5080_CTRL_DEFERRED_API_V2_PARAMS *); - NV_STATUS (*__defapiCtrlCmdRemoveApi__)(struct DeferredApiObject *, NV5080_CTRL_REMOVE_API_PARAMS *); - NV_STATUS (*__defapiCheckMemInterUnmap__)(struct DeferredApiObject *, NvBool); - NvBool (*__defapiShareCallback__)(struct DeferredApiObject *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NvBool (*__defapiAccessCallback__)(struct DeferredApiObject *, struct RsClient *, void *, RsAccessRight); - NV_STATUS (*__defapiMapTo__)(struct DeferredApiObject *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__defapiGetMapAddrSpace__)(struct DeferredApiObject *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__defapiSetNotificationShare__)(struct DeferredApiObject *, struct NotifShare *); - NvU32 (*__defapiGetRefCount__)(struct DeferredApiObject *); - void (*__defapiAddAdditionalDependants__)(struct RsClient *, struct DeferredApiObject *, RsResourceRef *); - NV_STATUS (*__defapiControl_Prologue__)(struct DeferredApiObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__defapiGetRegBaseOffsetAndSize__)(struct DeferredApiObject *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__defapiInternalControlForward__)(struct DeferredApiObject *, NvU32, void *, NvU32); - NV_STATUS (*__defapiUnmapFrom__)(struct DeferredApiObject *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__defapiControl_Epilogue__)(struct DeferredApiObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__defapiGetInternalObjectHandle__)(struct DeferredApiObject *); - NV_STATUS (*__defapiControl__)(struct DeferredApiObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__defapiUnmap__)(struct DeferredApiObject *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__defapiGetMemInterMapParams__)(struct DeferredApiObject *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__defapiGetMemoryMappingDescriptor__)(struct DeferredApiObject *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__defapiControlFilter__)(struct DeferredApiObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__defapiUnregisterEvent__)(struct DeferredApiObject *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__defapiControlSerialization_Prologue__)(struct DeferredApiObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__defapiCanCopy__)(struct DeferredApiObject *); - NvBool (*__defapiIsPartialUnmapSupported__)(struct DeferredApiObject *); - void (*__defapiPreDestruct__)(struct DeferredApiObject *); - NV_STATUS (*__defapiIsDuplicate__)(struct DeferredApiObject *, NvHandle, NvBool *); - void (*__defapiControlSerialization_Epilogue__)(struct DeferredApiObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__defapiGetNotificationListPtr__)(struct DeferredApiObject *); - struct NotifShare *(*__defapiGetNotificationShare__)(struct DeferredApiObject *); - NV_STATUS (*__defapiMap__)(struct DeferredApiObject *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NV_STATUS (*__defapiGetOrAllocNotifShare__)(struct DeferredApiObject *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super^2 + struct INotifier *__nvoc_pbase_INotifier; // inotify super^3 + struct Notifier *__nvoc_pbase_Notifier; // notify super^2 + struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super + struct DeferredApiObject *__nvoc_pbase_DeferredApiObject; // defapi + + // Vtable with 36 per-object function pointers + NV_STATUS (*__defapiGetSwMethods__)(struct DeferredApiObject * /*this*/, const METHOD **, NvU32 *); // virtual override (chandes) base (chandes) + NvBool (*__defapiIsSwMethodStalling__)(struct DeferredApiObject * /*this*/, NvU32); // virtual override (chandes) base (chandes) + NV_STATUS (*__defapiCtrlCmdDeferredApi__)(struct DeferredApiObject * /*this*/, NV5080_CTRL_DEFERRED_API_PARAMS *); // exported (id=0x50800101) + NV_STATUS (*__defapiCtrlCmdDeferredApiV2__)(struct DeferredApiObject * /*this*/, NV5080_CTRL_DEFERRED_API_V2_PARAMS *); // exported (id=0x50800103) + NV_STATUS (*__defapiCtrlCmdDeferredApiInternal__)(struct DeferredApiObject * /*this*/, NV5080_CTRL_DEFERRED_API_INTERNAL_PARAMS *); // exported (id=0x50800104) + NV_STATUS (*__defapiCtrlCmdRemoveApi__)(struct DeferredApiObject * /*this*/, NV5080_CTRL_REMOVE_API_PARAMS *); // exported (id=0x50800102) + NV_STATUS (*__defapiCheckMemInterUnmap__)(struct DeferredApiObject * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__defapiControl__)(struct DeferredApiObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__defapiMap__)(struct DeferredApiObject * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__defapiUnmap__)(struct DeferredApiObject * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NvBool (*__defapiShareCallback__)(struct DeferredApiObject * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__defapiGetRegBaseOffsetAndSize__)(struct DeferredApiObject * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__defapiGetMapAddrSpace__)(struct DeferredApiObject * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__defapiInternalControlForward__)(struct DeferredApiObject * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (chandes) + NvHandle (*__defapiGetInternalObjectHandle__)(struct DeferredApiObject * /*this*/); // virtual inherited (gpures) base (chandes) + NvBool (*__defapiAccessCallback__)(struct DeferredApiObject * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__defapiGetMemInterMapParams__)(struct DeferredApiObject * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__defapiGetMemoryMappingDescriptor__)(struct DeferredApiObject * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__defapiControlSerialization_Prologue__)(struct DeferredApiObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__defapiControlSerialization_Epilogue__)(struct DeferredApiObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__defapiControl_Prologue__)(struct DeferredApiObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__defapiControl_Epilogue__)(struct DeferredApiObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NvBool (*__defapiCanCopy__)(struct DeferredApiObject * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__defapiIsDuplicate__)(struct DeferredApiObject * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (chandes) + void (*__defapiPreDestruct__)(struct DeferredApiObject * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__defapiControlFilter__)(struct DeferredApiObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (chandes) + NvBool (*__defapiIsPartialUnmapSupported__)(struct DeferredApiObject * /*this*/); // inline virtual inherited (res) base (chandes) body + NV_STATUS (*__defapiMapTo__)(struct DeferredApiObject * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (chandes) + NV_STATUS (*__defapiUnmapFrom__)(struct DeferredApiObject * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (chandes) + NvU32 (*__defapiGetRefCount__)(struct DeferredApiObject * /*this*/); // virtual inherited (res) base (chandes) + void (*__defapiAddAdditionalDependants__)(struct RsClient *, struct DeferredApiObject * /*this*/, RsResourceRef *); // virtual inherited (res) base (chandes) + PEVENTNOTIFICATION * (*__defapiGetNotificationListPtr__)(struct DeferredApiObject * /*this*/); // virtual inherited (notify) base (chandes) + struct NotifShare * (*__defapiGetNotificationShare__)(struct DeferredApiObject * /*this*/); // virtual inherited (notify) base (chandes) + void (*__defapiSetNotificationShare__)(struct DeferredApiObject * /*this*/, struct NotifShare *); // virtual inherited (notify) base (chandes) + NV_STATUS (*__defapiUnregisterEvent__)(struct DeferredApiObject * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (chandes) + NV_STATUS (*__defapiGetOrAllocNotifShare__)(struct DeferredApiObject * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (chandes) + + // Data members PNODE DeferredApiList; NvU32 NumWaitingOnTLBFlush; }; @@ -127,6 +145,7 @@ typedef struct DeferredApiObject DeferredApiObject; #define __nvoc_class_id_DeferredApiObject 0x8ea933 #endif /* __nvoc_class_id_DeferredApiObject */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_DeferredApiObject; #define __staticCast_DeferredApiObject(pThis) \ @@ -139,73 +158,107 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_DeferredApiObject; ((DeferredApiObject*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(DeferredApiObject))) #endif //__nvoc_deferred_api_h_disabled - NV_STATUS __nvoc_objCreateDynamic_DeferredApiObject(DeferredApiObject**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_DeferredApiObject(DeferredApiObject**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_DeferredApiObject(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_DeferredApiObject((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define defapiGetSwMethods_FNPTR(pDeferredApi) pDeferredApi->__defapiGetSwMethods__ #define defapiGetSwMethods(pDeferredApi, ppMethods, pNumMethods) defapiGetSwMethods_DISPATCH(pDeferredApi, ppMethods, pNumMethods) +#define defapiIsSwMethodStalling_FNPTR(pDeferredApi) pDeferredApi->__defapiIsSwMethodStalling__ #define defapiIsSwMethodStalling(pDeferredApi, hDeferredApi) defapiIsSwMethodStalling_DISPATCH(pDeferredApi, hDeferredApi) +#define defapiCtrlCmdDeferredApi_FNPTR(pDeferredApiObj) pDeferredApiObj->__defapiCtrlCmdDeferredApi__ #define defapiCtrlCmdDeferredApi(pDeferredApiObj, pDeferredApi) defapiCtrlCmdDeferredApi_DISPATCH(pDeferredApiObj, pDeferredApi) +#define defapiCtrlCmdDeferredApiV2_FNPTR(pDeferredApiObj) pDeferredApiObj->__defapiCtrlCmdDeferredApiV2__ #define defapiCtrlCmdDeferredApiV2(pDeferredApiObj, pDeferredApi) defapiCtrlCmdDeferredApiV2_DISPATCH(pDeferredApiObj, pDeferredApi) +#define defapiCtrlCmdDeferredApiInternal_FNPTR(pDeferredApiObj) pDeferredApiObj->__defapiCtrlCmdDeferredApiInternal__ +#define defapiCtrlCmdDeferredApiInternal(pDeferredApiObj, pDeferredApi) defapiCtrlCmdDeferredApiInternal_DISPATCH(pDeferredApiObj, pDeferredApi) +#define defapiCtrlCmdRemoveApi_FNPTR(pDeferredApiObj) pDeferredApiObj->__defapiCtrlCmdRemoveApi__ #define defapiCtrlCmdRemoveApi(pDeferredApiObj, pRemoveApi) defapiCtrlCmdRemoveApi_DISPATCH(pDeferredApiObj, pRemoveApi) +#define defapiCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ #define defapiCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) defapiCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) +#define defapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define defapiControl(pGpuResource, pCallContext, pParams) defapiControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define defapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define defapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) defapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define defapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define defapiUnmap(pGpuResource, pCallContext, pCpuMapping) defapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define defapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ #define defapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) defapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define defapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) defapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define defapiMapTo(pResource, pParams) defapiMapTo_DISPATCH(pResource, pParams) -#define defapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) defapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define defapiSetNotificationShare(pNotifier, pNotifShare) defapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define defapiGetRefCount(pResource) defapiGetRefCount_DISPATCH(pResource) -#define defapiAddAdditionalDependants(pClient, pResource, pReference) defapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define defapiControl_Prologue(pResource, pCallContext, pParams) defapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define defapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define defapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) defapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define defapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define defapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) defapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define defapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define defapiInternalControlForward(pGpuResource, command, pParams, size) defapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define defapiUnmapFrom(pResource, pParams) defapiUnmapFrom_DISPATCH(pResource, pParams) -#define defapiControl_Epilogue(pResource, pCallContext, pParams) defapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define defapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define defapiGetInternalObjectHandle(pGpuResource) defapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define defapiControl(pGpuResource, pCallContext, pParams) defapiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define defapiUnmap(pGpuResource, pCallContext, pCpuMapping) defapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define defapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define defapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) defapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define defapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define defapiGetMemInterMapParams(pRmResource, pParams) defapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define defapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define defapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) defapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define defapiControlFilter(pResource, pCallContext, pParams) defapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define defapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) defapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define defapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define defapiControlSerialization_Prologue(pResource, pCallContext, pParams) defapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define defapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define defapiControlSerialization_Epilogue(pResource, pCallContext, pParams) defapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define defapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define defapiControl_Prologue(pResource, pCallContext, pParams) defapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define defapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define defapiControl_Epilogue(pResource, pCallContext, pParams) defapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define defapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define defapiCanCopy(pResource) defapiCanCopy_DISPATCH(pResource) -#define defapiIsPartialUnmapSupported(pResource) defapiIsPartialUnmapSupported_DISPATCH(pResource) -#define defapiPreDestruct(pResource) defapiPreDestruct_DISPATCH(pResource) +#define defapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define defapiIsDuplicate(pResource, hMemory, pDuplicate) defapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define defapiControlSerialization_Epilogue(pResource, pCallContext, pParams) defapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define defapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define defapiPreDestruct(pResource) defapiPreDestruct_DISPATCH(pResource) +#define defapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define defapiControlFilter(pResource, pCallContext, pParams) defapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define defapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define defapiIsPartialUnmapSupported(pResource) defapiIsPartialUnmapSupported_DISPATCH(pResource) +#define defapiMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define defapiMapTo(pResource, pParams) defapiMapTo_DISPATCH(pResource, pParams) +#define defapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define defapiUnmapFrom(pResource, pParams) defapiUnmapFrom_DISPATCH(pResource, pParams) +#define defapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define defapiGetRefCount(pResource) defapiGetRefCount_DISPATCH(pResource) +#define defapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define defapiAddAdditionalDependants(pClient, pResource, pReference) defapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define defapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define defapiGetNotificationListPtr(pNotifier) defapiGetNotificationListPtr_DISPATCH(pNotifier) +#define defapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ #define defapiGetNotificationShare(pNotifier) defapiGetNotificationShare_DISPATCH(pNotifier) -#define defapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) defapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define defapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define defapiSetNotificationShare(pNotifier, pNotifShare) defapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define defapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define defapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) defapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define defapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ #define defapiGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) defapiGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -NV_STATUS defapiGetSwMethods_IMPL(struct DeferredApiObject *pDeferredApi, const METHOD **ppMethods, NvU32 *pNumMethods); +// Dispatch functions static inline NV_STATUS defapiGetSwMethods_DISPATCH(struct DeferredApiObject *pDeferredApi, const METHOD **ppMethods, NvU32 *pNumMethods) { return pDeferredApi->__defapiGetSwMethods__(pDeferredApi, ppMethods, pNumMethods); } -NvBool defapiIsSwMethodStalling_IMPL(struct DeferredApiObject *pDeferredApi, NvU32 hDeferredApi); - static inline NvBool defapiIsSwMethodStalling_DISPATCH(struct DeferredApiObject *pDeferredApi, NvU32 hDeferredApi) { return pDeferredApi->__defapiIsSwMethodStalling__(pDeferredApi, hDeferredApi); } -NV_STATUS defapiCtrlCmdDeferredApi_IMPL(struct DeferredApiObject *pDeferredApiObj, NV5080_CTRL_DEFERRED_API_PARAMS *pDeferredApi); - static inline NV_STATUS defapiCtrlCmdDeferredApi_DISPATCH(struct DeferredApiObject *pDeferredApiObj, NV5080_CTRL_DEFERRED_API_PARAMS *pDeferredApi) { return pDeferredApiObj->__defapiCtrlCmdDeferredApi__(pDeferredApiObj, pDeferredApi); } -NV_STATUS defapiCtrlCmdDeferredApiV2_IMPL(struct DeferredApiObject *pDeferredApiObj, NV5080_CTRL_DEFERRED_API_V2_PARAMS *pDeferredApi); - static inline NV_STATUS defapiCtrlCmdDeferredApiV2_DISPATCH(struct DeferredApiObject *pDeferredApiObj, NV5080_CTRL_DEFERRED_API_V2_PARAMS *pDeferredApi) { return pDeferredApiObj->__defapiCtrlCmdDeferredApiV2__(pDeferredApiObj, pDeferredApi); } -NV_STATUS defapiCtrlCmdRemoveApi_IMPL(struct DeferredApiObject *pDeferredApiObj, NV5080_CTRL_REMOVE_API_PARAMS *pRemoveApi); +static inline NV_STATUS defapiCtrlCmdDeferredApiInternal_DISPATCH(struct DeferredApiObject *pDeferredApiObj, NV5080_CTRL_DEFERRED_API_INTERNAL_PARAMS *pDeferredApi) { + return pDeferredApiObj->__defapiCtrlCmdDeferredApiInternal__(pDeferredApiObj, pDeferredApi); +} static inline NV_STATUS defapiCtrlCmdRemoveApi_DISPATCH(struct DeferredApiObject *pDeferredApiObj, NV5080_CTRL_REMOVE_API_PARAMS *pRemoveApi) { return pDeferredApiObj->__defapiCtrlCmdRemoveApi__(pDeferredApiObj, pRemoveApi); @@ -215,64 +268,40 @@ static inline NV_STATUS defapiCheckMemInterUnmap_DISPATCH(struct DeferredApiObje return pChannelDescendant->__defapiCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } -static inline NvBool defapiShareCallback_DISPATCH(struct DeferredApiObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__defapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NvBool defapiAccessCallback_DISPATCH(struct DeferredApiObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__defapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} - -static inline NV_STATUS defapiMapTo_DISPATCH(struct DeferredApiObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__defapiMapTo__(pResource, pParams); -} - -static inline NV_STATUS defapiGetMapAddrSpace_DISPATCH(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__defapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); -} - -static inline void defapiSetNotificationShare_DISPATCH(struct DeferredApiObject *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__defapiSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS defapiControl_DISPATCH(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__defapiControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 defapiGetRefCount_DISPATCH(struct DeferredApiObject *pResource) { - return pResource->__defapiGetRefCount__(pResource); +static inline NV_STATUS defapiMap_DISPATCH(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__defapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void defapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DeferredApiObject *pResource, RsResourceRef *pReference) { - pResource->__defapiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS defapiUnmap_DISPATCH(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__defapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS defapiControl_Prologue_DISPATCH(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__defapiControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool defapiShareCallback_DISPATCH(struct DeferredApiObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__defapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS defapiGetRegBaseOffsetAndSize_DISPATCH(struct DeferredApiObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__defapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS defapiInternalControlForward_DISPATCH(struct DeferredApiObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__defapiInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS defapiUnmapFrom_DISPATCH(struct DeferredApiObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__defapiUnmapFrom__(pResource, pParams); +static inline NV_STATUS defapiGetMapAddrSpace_DISPATCH(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__defapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void defapiControl_Epilogue_DISPATCH(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__defapiControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS defapiInternalControlForward_DISPATCH(struct DeferredApiObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__defapiInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle defapiGetInternalObjectHandle_DISPATCH(struct DeferredApiObject *pGpuResource) { return pGpuResource->__defapiGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS defapiControl_DISPATCH(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__defapiControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS defapiUnmap_DISPATCH(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__defapiUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool defapiAccessCallback_DISPATCH(struct DeferredApiObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__defapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS defapiGetMemInterMapParams_DISPATCH(struct DeferredApiObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { @@ -283,54 +312,90 @@ static inline NV_STATUS defapiGetMemoryMappingDescriptor_DISPATCH(struct Deferre return pRmResource->__defapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NV_STATUS defapiControlFilter_DISPATCH(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__defapiControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS defapiControlSerialization_Prologue_DISPATCH(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__defapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS defapiUnregisterEvent_DISPATCH(struct DeferredApiObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__defapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline void defapiControlSerialization_Epilogue_DISPATCH(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__defapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS defapiControlSerialization_Prologue_DISPATCH(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__defapiControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS defapiControl_Prologue_DISPATCH(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__defapiControl_Prologue__(pResource, pCallContext, pParams); +} + +static inline void defapiControl_Epilogue_DISPATCH(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__defapiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool defapiCanCopy_DISPATCH(struct DeferredApiObject *pResource) { return pResource->__defapiCanCopy__(pResource); } -static inline NvBool defapiIsPartialUnmapSupported_DISPATCH(struct DeferredApiObject *pResource) { - return pResource->__defapiIsPartialUnmapSupported__(pResource); +static inline NV_STATUS defapiIsDuplicate_DISPATCH(struct DeferredApiObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__defapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void defapiPreDestruct_DISPATCH(struct DeferredApiObject *pResource) { pResource->__defapiPreDestruct__(pResource); } -static inline NV_STATUS defapiIsDuplicate_DISPATCH(struct DeferredApiObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__defapiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS defapiControlFilter_DISPATCH(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__defapiControlFilter__(pResource, pCallContext, pParams); } -static inline void defapiControlSerialization_Epilogue_DISPATCH(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__defapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool defapiIsPartialUnmapSupported_DISPATCH(struct DeferredApiObject *pResource) { + return pResource->__defapiIsPartialUnmapSupported__(pResource); } -static inline PEVENTNOTIFICATION *defapiGetNotificationListPtr_DISPATCH(struct DeferredApiObject *pNotifier) { +static inline NV_STATUS defapiMapTo_DISPATCH(struct DeferredApiObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__defapiMapTo__(pResource, pParams); +} + +static inline NV_STATUS defapiUnmapFrom_DISPATCH(struct DeferredApiObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__defapiUnmapFrom__(pResource, pParams); +} + +static inline NvU32 defapiGetRefCount_DISPATCH(struct DeferredApiObject *pResource) { + return pResource->__defapiGetRefCount__(pResource); +} + +static inline void defapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DeferredApiObject *pResource, RsResourceRef *pReference) { + pResource->__defapiAddAdditionalDependants__(pClient, pResource, pReference); +} + +static inline PEVENTNOTIFICATION * defapiGetNotificationListPtr_DISPATCH(struct DeferredApiObject *pNotifier) { return pNotifier->__defapiGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *defapiGetNotificationShare_DISPATCH(struct DeferredApiObject *pNotifier) { +static inline struct NotifShare * defapiGetNotificationShare_DISPATCH(struct DeferredApiObject *pNotifier) { return pNotifier->__defapiGetNotificationShare__(pNotifier); } -static inline NV_STATUS defapiMap_DISPATCH(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__defapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void defapiSetNotificationShare_DISPATCH(struct DeferredApiObject *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__defapiSetNotificationShare__(pNotifier, pNotifShare); +} + +static inline NV_STATUS defapiUnregisterEvent_DISPATCH(struct DeferredApiObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__defapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS defapiGetOrAllocNotifShare_DISPATCH(struct DeferredApiObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return pNotifier->__defapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } +NV_STATUS defapiGetSwMethods_IMPL(struct DeferredApiObject *pDeferredApi, const METHOD **ppMethods, NvU32 *pNumMethods); + +NvBool defapiIsSwMethodStalling_IMPL(struct DeferredApiObject *pDeferredApi, NvU32 hDeferredApi); + +NV_STATUS defapiCtrlCmdDeferredApi_IMPL(struct DeferredApiObject *pDeferredApiObj, NV5080_CTRL_DEFERRED_API_PARAMS *pDeferredApi); + +NV_STATUS defapiCtrlCmdDeferredApiV2_IMPL(struct DeferredApiObject *pDeferredApiObj, NV5080_CTRL_DEFERRED_API_V2_PARAMS *pDeferredApi); + +NV_STATUS defapiCtrlCmdDeferredApiInternal_IMPL(struct DeferredApiObject *pDeferredApiObj, NV5080_CTRL_DEFERRED_API_INTERNAL_PARAMS *pDeferredApi); + +NV_STATUS defapiCtrlCmdRemoveApi_IMPL(struct DeferredApiObject *pDeferredApiObj, NV5080_CTRL_REMOVE_API_PARAMS *pRemoveApi); + NV_STATUS defapiConstruct_IMPL(struct DeferredApiObject *arg_pDeferredApi, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_defapiConstruct(arg_pDeferredApi, arg_pCallContext, arg_pParams) defapiConstruct_IMPL(arg_pDeferredApi, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_device_nvoc.c b/src/nvidia/generated/g_device_nvoc.c index 5460f8a225..044751da4f 100644 --- a/src/nvidia/generated/g_device_nvoc.c +++ b/src/nvidia/generated/g_device_nvoc.c @@ -93,106 +93,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_Device = /*pExportInfo=*/ &__nvoc_export_info_Device }; -static NV_STATUS __nvoc_thunk_Device_gpuresControl(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return deviceControl((struct Device *)(((unsigned char *)pResource) - __nvoc_rtti_Device_GpuResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_Device_gpuresInternalControlForward(struct GpuResource *pDevice, NvU32 command, void *pParams, NvU32 size) { - return deviceInternalControlForward((struct Device *)(((unsigned char *)pDevice) - __nvoc_rtti_Device_GpuResource.offset), command, pParams, size); -} - -static NvBool __nvoc_thunk_GpuResource_deviceShareCallback(struct Device *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Device_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_deviceCheckMemInterUnmap(struct Device *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_Device_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RsResource_deviceMapTo(struct Device *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Device_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_deviceGetMapAddrSpace(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Device_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} - -static NvU32 __nvoc_thunk_RsResource_deviceGetRefCount(struct Device *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Device_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_deviceAddAdditionalDependants(struct RsClient *pClient, struct Device *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Device_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_deviceControl_Prologue(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Device_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_deviceGetRegBaseOffsetAndSize(struct Device *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Device_GpuResource.offset), pGpu, pOffset, pSize); -} - -static NV_STATUS __nvoc_thunk_RsResource_deviceUnmapFrom(struct Device *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Device_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_deviceControl_Epilogue(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Device_RmResource.offset), pCallContext, pParams); -} - -static NvHandle __nvoc_thunk_GpuResource_deviceGetInternalObjectHandle(struct Device *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Device_GpuResource.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_deviceUnmap(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Device_GpuResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_deviceGetMemInterMapParams(struct Device *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_Device_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_deviceGetMemoryMappingDescriptor(struct Device *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_Device_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_deviceControlFilter(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Device_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_deviceControlSerialization_Prologue(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Device_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_deviceCanCopy(struct Device *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Device_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_deviceIsPartialUnmapSupported(struct Device *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Device_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_devicePreDestruct(struct Device *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Device_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_deviceIsDuplicate(struct Device *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Device_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_deviceControlSerialization_Epilogue(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Device_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_deviceMap(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Device_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_deviceAccessCallback(struct Device *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Device_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -200,12 +100,12 @@ static NvBool __nvoc_thunk_RmResource_deviceAccessCallback(struct Device *pResou static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdBifGetDmaBaseSysmemAddr_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x800103u, /*paramSize=*/ sizeof(NV0080_CTRL_BIF_GET_DMA_BASE_SYSMEM_ADDR_PARAMS), @@ -215,12 +115,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdBifAspmFeatureSupported_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x800104u, /*paramSize=*/ sizeof(NV0080_CTRL_BIF_SET_ASPM_FEATURE_PARAMS), @@ -230,12 +130,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdBifAspmCyaUpdate_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x800105u, /*paramSize=*/ sizeof(NV0080_CTRL_BIF_ASPM_CYA_UPDATE_PARAMS), @@ -245,12 +145,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdBifGetPciePowerControlMask_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x800106u, /*paramSize=*/ sizeof(NV0080_CTRL_CMD_BIF_GET_PCIE_POWER_CONTROL_MASK_PARAMS), @@ -260,12 +160,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdGpuGetClasslist_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, /*accessRight=*/0x0u, /*methodId=*/ 0x800201u, /*paramSize=*/ sizeof(NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS), @@ -275,12 +175,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [5] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdGpuGetNumSubdevices_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4811u) - /*flags=*/ 0x4811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) + /*flags=*/ 0x509u, /*accessRight=*/0x0u, /*methodId=*/ 0x800280u, /*paramSize=*/ sizeof(NV0080_CTRL_GPU_GET_NUM_SUBDEVICES_PARAMS), @@ -305,12 +205,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [7] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdGpuQueryGpuSwStatePersistence_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x800288u, /*paramSize=*/ sizeof(NV0080_CTRL_GPU_QUERY_SW_STATE_PERSISTENCE_PARAMS), @@ -320,12 +220,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [8] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdGpuGetVirtualizationMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x800289u, /*paramSize=*/ sizeof(NV0080_CTRL_GPU_GET_VIRTUALIZATION_MODE_PARAMS), @@ -335,12 +235,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [9] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdGpuGetSparseTextureComputeMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x80028cu, /*paramSize=*/ sizeof(NV0080_CTRL_GPU_GET_SPARSE_TEXTURE_COMPUTE_MODE_PARAMS), @@ -350,12 +250,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [10] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdGpuSetSparseTextureComputeMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x80028du, /*paramSize=*/ sizeof(NV0080_CTRL_GPU_SET_SPARSE_TEXTURE_COMPUTE_MODE_PARAMS), @@ -365,12 +265,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [11] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdGpuGetVgxCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x80028eu, /*paramSize=*/ sizeof(NV0080_CTRL_GPU_GET_VGX_CAPS_PARAMS), @@ -380,12 +280,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [12] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdGpuVirtualizationSwitchToVga_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x800290u, /*paramSize=*/ 0, @@ -395,12 +295,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [13] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdGpuGetSriovCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x800291u, /*paramSize=*/ sizeof(NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS), @@ -410,12 +310,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [14] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdGpuGetClasslistV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, /*accessRight=*/0x0u, /*methodId=*/ 0x800292u, /*paramSize=*/ sizeof(NV0080_CTRL_GPU_GET_CLASSLIST_V2_PARAMS), @@ -425,12 +325,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [15] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdGpuGetFindSubDeviceHandle_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, /*accessRight=*/0x0u, /*methodId=*/ 0x800293u, /*paramSize=*/ sizeof(NV0080_CTRL_GPU_FIND_SUBDEVICE_HANDLE_PARAM), @@ -440,12 +340,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [16] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2211u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40049u) /*pFunc=*/ (void (*)(void)) NULL, #else - /*pFunc=*/ (void (*)(void)) deviceCtrlCmdGpuGetBrandCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2211u) - /*flags=*/ 0x2211u, + /*pFunc=*/ (void (*)(void)) deviceCtrlCmdGpuGetBrandCaps_DISPATCH, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40049u) + /*flags=*/ 0x40049u, /*accessRight=*/0x0u, /*methodId=*/ 0x800294u, /*paramSize=*/ sizeof(NV0080_CTRL_GPU_GET_BRAND_CAPS_PARAMS), @@ -455,12 +355,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [17] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdGpuSetVgpuVfBar1Size_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x800296u, /*paramSize=*/ sizeof(NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS), @@ -470,12 +370,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [18] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdGpuSetVgpuHeterogeneousMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x800297u, /*paramSize=*/ sizeof(NV0080_CTRL_GPU_SET_VGPU_HETEROGENEOUS_MODE_PARAMS), @@ -485,12 +385,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [19] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdGpuGetVgpuHeterogeneousMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x800298u, /*paramSize=*/ sizeof(NV0080_CTRL_GPU_GET_VGPU_HETEROGENEOUS_MODE_PARAMS), @@ -500,12 +400,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [20] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x812u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdKGrGetCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x812u) - /*flags=*/ 0x812u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) + /*flags=*/ 0x10au, /*accessRight=*/0x0u, /*methodId=*/ 0x801102u, /*paramSize=*/ sizeof(NV0080_CTRL_GR_GET_CAPS_PARAMS), @@ -515,12 +415,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [21] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdKGrGetInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) - /*flags=*/ 0x810u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*flags=*/ 0x108u, /*accessRight=*/0x0u, /*methodId=*/ 0x801104u, /*paramSize=*/ sizeof(NV0080_CTRL_GR_GET_INFO_PARAMS), @@ -530,12 +430,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [22] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdKGrGetTpcPartitionMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x801107u, /*paramSize=*/ sizeof(NV0080_CTRL_GR_TPC_PARTITION_MODE_PARAMS), @@ -545,12 +445,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [23] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdKGrSetTpcPartitionMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x801108u, /*paramSize=*/ sizeof(NV0080_CTRL_GR_TPC_PARTITION_MODE_PARAMS), @@ -560,12 +460,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [24] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x812u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdKGrGetCapsV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x812u) - /*flags=*/ 0x812u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) + /*flags=*/ 0x10au, /*accessRight=*/0x0u, /*methodId=*/ 0x801109u, /*paramSize=*/ sizeof(NV0080_CTRL_GR_GET_CAPS_V2_PARAMS), @@ -575,12 +475,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [25] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdKGrGetInfoV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x801110u, /*paramSize=*/ sizeof(NV0080_CTRL_GR_GET_INFO_V2_PARAMS), @@ -590,12 +490,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [26] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdFbGetCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x801301u, /*paramSize=*/ sizeof(NV0080_CTRL_FB_GET_CAPS_PARAMS), @@ -605,12 +505,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [27] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdFbGetCompbitStoreInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x801306u, /*paramSize=*/ sizeof(NV0080_CTRL_FB_GET_COMPBIT_STORE_INFO_PARAMS), @@ -620,12 +520,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [28] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdFbGetCapsV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4811u) - /*flags=*/ 0x4811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) + /*flags=*/ 0x509u, /*accessRight=*/0x0u, /*methodId=*/ 0x801307u, /*paramSize=*/ sizeof(NV0080_CTRL_FB_GET_CAPS_V2_PARAMS), @@ -635,12 +535,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [29] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdSetDefaultVidmemPhysicality_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x801308u, /*paramSize=*/ sizeof(NV0080_CTRL_FB_SET_DEFAULT_VIDMEM_PHYSICALITY_PARAMS), @@ -650,12 +550,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [30] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdHostGetCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x801401u, /*paramSize=*/ sizeof(NV0080_CTRL_HOST_GET_CAPS_PARAMS), @@ -665,12 +565,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [31] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x518u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdHostGetCapsV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4850u) - /*flags=*/ 0x4850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x518u) + /*flags=*/ 0x518u, /*accessRight=*/0x0u, /*methodId=*/ 0x801402u, /*paramSize=*/ sizeof(NV0080_CTRL_HOST_GET_CAPS_V2_PARAMS), @@ -680,12 +580,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [32] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdFifoGetCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) - /*flags=*/ 0x810u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*flags=*/ 0x108u, /*accessRight=*/0x0u, /*methodId=*/ 0x801701u, /*paramSize=*/ sizeof(NV0080_CTRL_FIFO_GET_CAPS_PARAMS), @@ -695,12 +595,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [33] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdFifoStartSelectedChannels_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x801705u, /*paramSize=*/ sizeof(NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS), @@ -710,12 +610,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [34] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2a10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40148u) /*pFunc=*/ (void (*)(void)) NULL, #else - /*pFunc=*/ (void (*)(void)) deviceCtrlCmdFifoGetEngineContextProperties_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2a10u) - /*flags=*/ 0x2a10u, + /*pFunc=*/ (void (*)(void)) deviceCtrlCmdFifoGetEngineContextProperties_DISPATCH, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40148u) + /*flags=*/ 0x40148u, /*accessRight=*/0x0u, /*methodId=*/ 0x801707u, /*paramSize=*/ sizeof(NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS), @@ -725,12 +625,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [35] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdFifoGetChannelList_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x80170du, /*paramSize=*/ sizeof(NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS), @@ -740,12 +640,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [36] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2211u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40049u) /*pFunc=*/ (void (*)(void)) NULL, #else - /*pFunc=*/ (void (*)(void)) deviceCtrlCmdFifoGetLatencyBufferSize_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2211u) - /*flags=*/ 0x2211u, + /*pFunc=*/ (void (*)(void)) deviceCtrlCmdFifoGetLatencyBufferSize_DISPATCH, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40049u) + /*flags=*/ 0x40049u, /*accessRight=*/0x0u, /*methodId=*/ 0x80170eu, /*paramSize=*/ sizeof(NV0080_CTRL_FIFO_GET_LATENCY_BUFFER_SIZE_PARAMS), @@ -755,12 +655,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [37] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdFifoSetChannelProperties_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x80170fu, /*paramSize=*/ sizeof(NV0080_CTRL_FIFO_SET_CHANNEL_PROPERTIES_PARAMS), @@ -770,12 +670,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [38] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdFifoStopRunlist_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2204u) - /*flags=*/ 0x2204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) + /*flags=*/ 0x244u, /*accessRight=*/0x0u, /*methodId=*/ 0x801711u, /*paramSize=*/ sizeof(NV0080_CTRL_FIFO_STOP_RUNLIST_PARAMS), @@ -785,12 +685,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [39] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdFifoStartRunlist_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2204u) - /*flags=*/ 0x2204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) + /*flags=*/ 0x244u, /*accessRight=*/0x0u, /*methodId=*/ 0x801712u, /*paramSize=*/ sizeof(NV0080_CTRL_FIFO_START_RUNLIST_PARAMS), @@ -800,12 +700,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [40] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdFifoGetCapsV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) - /*flags=*/ 0x810u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*flags=*/ 0x108u, /*accessRight=*/0x0u, /*methodId=*/ 0x801713u, /*paramSize=*/ sizeof(NV0080_CTRL_FIFO_GET_CAPS_V2_PARAMS), @@ -815,12 +715,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [41] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdFifoIdleChannels_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x801714u, /*paramSize=*/ sizeof(NV0080_CTRL_FIFO_IDLE_CHANNELS_PARAMS), @@ -830,12 +730,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [42] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdDmaGetPteInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x801801u, /*paramSize=*/ sizeof(NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS), @@ -845,12 +745,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [43] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdDmaFlush_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x801805u, /*paramSize=*/ sizeof(NV0080_CTRL_DMA_FLUSH_PARAMS), @@ -860,12 +760,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [44] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdDmaAdvSchedGetVaCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x801806u, /*paramSize=*/ sizeof(NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS), @@ -875,12 +775,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [45] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdDmaGetPdeInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x801809u, /*paramSize=*/ sizeof(NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS), @@ -890,12 +790,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [46] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdDmaSetPteInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x80180au, /*paramSize=*/ sizeof(NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS), @@ -905,12 +805,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [47] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdDmaInvalidateTLB_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x80180cu, /*paramSize=*/ sizeof(NV0080_CTRL_DMA_INVALIDATE_TLB_PARAMS), @@ -920,12 +820,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [48] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdDmaGetCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x80180du, /*paramSize=*/ sizeof(NV0080_CTRL_DMA_GET_CAPS_PARAMS), @@ -935,12 +835,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [49] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdDmaSetVASpaceSize_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x80180eu, /*paramSize=*/ sizeof(NV0080_CTRL_DMA_SET_VA_SPACE_SIZE_PARAMS), @@ -950,12 +850,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [50] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdDmaUpdatePde2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x80180fu, /*paramSize=*/ sizeof(NV0080_CTRL_DMA_UPDATE_PDE_2_PARAMS), @@ -965,12 +865,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [51] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdDmaEnablePrivilegedRange_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x801810u, /*paramSize=*/ sizeof(NV0080_CTRL_DMA_ENABLE_PRIVILEGED_RANGE_PARAMS), @@ -980,12 +880,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [52] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0000u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c000u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdDmaSetDefaultVASpace_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0000u) - /*flags=*/ 0x1c0000u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c000u) + /*flags=*/ 0x1c000u, /*accessRight=*/0x0u, /*methodId=*/ 0x801812u, /*paramSize=*/ sizeof(NV0080_CTRL_DMA_SET_DEFAULT_VASPACE_PARAMS), @@ -995,12 +895,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [53] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x140004u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdDmaSetPageDirectory_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x140004u) - /*flags=*/ 0x140004u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) + /*flags=*/ 0x14004u, /*accessRight=*/0x0u, /*methodId=*/ 0x801813u, /*paramSize=*/ sizeof(NV0080_CTRL_DMA_SET_PAGE_DIRECTORY_PARAMS), @@ -1010,12 +910,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [54] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x140004u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdDmaUnsetPageDirectory_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x140004u) - /*flags=*/ 0x140004u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) + /*flags=*/ 0x14004u, /*accessRight=*/0x0u, /*methodId=*/ 0x801814u, /*paramSize=*/ sizeof(NV0080_CTRL_DMA_UNSET_PAGE_DIRECTORY_PARAMS), @@ -1025,12 +925,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [55] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdKPerfCudaLimitSetControl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x801909u, /*paramSize=*/ sizeof(NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS), @@ -1040,12 +940,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [56] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400a10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40148u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdMsencGetCapsV2_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400a10u) - /*flags=*/ 0x400a10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40148u) + /*flags=*/ 0x40148u, /*accessRight=*/0x0u, /*methodId=*/ 0x801b02u, /*paramSize=*/ sizeof(NV0080_CTRL_MSENC_GET_CAPS_V2_PARAMS), @@ -1055,12 +955,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [57] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400a10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40148u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdBspGetCapsV2_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400a10u) - /*flags=*/ 0x400a10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40148u) + /*flags=*/ 0x40148u, /*accessRight=*/0x0u, /*methodId=*/ 0x801c02u, /*paramSize=*/ sizeof(NV0080_CTRL_BSP_GET_CAPS_PARAMS_V2), @@ -1100,12 +1000,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [60] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdNvjpgGetCapsV2_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x801f02u, /*paramSize=*/ sizeof(NV0080_CTRL_NVJPG_GET_CAPS_V2_PARAMS), @@ -1115,12 +1015,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [61] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdInternalPerfCudaLimitDisable_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x802004u, /*paramSize=*/ 0, @@ -1130,12 +1030,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] #endif }, { /* [62] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xe50u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdInternalPerfCudaLimitSetControl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xe50u) - /*flags=*/ 0xe50u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d8u) + /*flags=*/ 0x1d8u, /*accessRight=*/0x0u, /*methodId=*/ 0x802009u, /*paramSize=*/ sizeof(NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS), @@ -1147,6 +1047,137 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] }; +// 2 down-thunk(s) defined to bridge methods in Device from superclasses + +// deviceControl: virtual override (res) base (gpures) +static NV_STATUS __nvoc_down_thunk_Device_gpuresControl(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return deviceControl((struct Device *)(((unsigned char *) pResource) - __nvoc_rtti_Device_GpuResource.offset), pCallContext, pParams); +} + +// deviceInternalControlForward: virtual override (gpures) base (gpures) +static NV_STATUS __nvoc_down_thunk_Device_gpuresInternalControlForward(struct GpuResource *pDevice, NvU32 command, void *pParams, NvU32 size) { + return deviceInternalControlForward((struct Device *)(((unsigned char *) pDevice) - __nvoc_rtti_Device_GpuResource.offset), command, pParams, size); +} + + +// 23 up-thunk(s) defined to bridge methods in Device to superclasses + +// deviceMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_deviceMap(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Device_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// deviceUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_deviceUnmap(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Device_GpuResource.offset), pCallContext, pCpuMapping); +} + +// deviceShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_deviceShareCallback(struct Device *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Device_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// deviceGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_deviceGetRegBaseOffsetAndSize(struct Device *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Device_GpuResource.offset), pGpu, pOffset, pSize); +} + +// deviceGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_deviceGetMapAddrSpace(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Device_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + +// deviceGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_deviceGetInternalObjectHandle(struct Device *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Device_GpuResource.offset)); +} + +// deviceAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_deviceAccessCallback(struct Device *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// deviceGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_deviceGetMemInterMapParams(struct Device *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Device_RmResource.offset), pParams); +} + +// deviceCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_deviceCheckMemInterUnmap(struct Device *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Device_RmResource.offset), bSubdeviceHandleProvided); +} + +// deviceGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_deviceGetMemoryMappingDescriptor(struct Device *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Device_RmResource.offset), ppMemDesc); +} + +// deviceControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_deviceControlSerialization_Prologue(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RmResource.offset), pCallContext, pParams); +} + +// deviceControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_deviceControlSerialization_Epilogue(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RmResource.offset), pCallContext, pParams); +} + +// deviceControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_deviceControl_Prologue(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RmResource.offset), pCallContext, pParams); +} + +// deviceControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_deviceControl_Epilogue(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RmResource.offset), pCallContext, pParams); +} + +// deviceCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_deviceCanCopy(struct Device *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RsResource.offset)); +} + +// deviceIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_deviceIsDuplicate(struct Device *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RsResource.offset), hMemory, pDuplicate); +} + +// devicePreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_devicePreDestruct(struct Device *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RsResource.offset)); +} + +// deviceControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_deviceControlFilter(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RsResource.offset), pCallContext, pParams); +} + +// deviceIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_deviceIsPartialUnmapSupported(struct Device *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RsResource.offset)); +} + +// deviceMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_deviceMapTo(struct Device *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RsResource.offset), pParams); +} + +// deviceUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_deviceUnmapFrom(struct Device *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RsResource.offset), pParams); +} + +// deviceGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_deviceGetRefCount(struct Device *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RsResource.offset)); +} + +// deviceAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_deviceAddAdditionalDependants(struct RsClient *pClient, struct Device *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RsResource.offset), pReference); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_Device = { /*numEntries=*/ 63, @@ -1188,6 +1219,7 @@ NV_STATUS __nvoc_ctor_Device(Device *pThis, RmHalspecOwner *pRmhalspecowner, str return status; } +// Vtable initialization static void __nvoc_init_funcTable_Device_1(Device *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -1196,43 +1228,55 @@ static void __nvoc_init_funcTable_Device_1(Device *pThis, RmHalspecOwner *pRmhal PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); + // deviceControl -- virtual override (res) base (gpures) pThis->__deviceControl__ = &deviceControl_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresControl__ = &__nvoc_down_thunk_Device_gpuresControl; + // deviceInternalControlForward -- virtual override (gpures) base (gpures) pThis->__deviceInternalControlForward__ = &deviceInternalControlForward_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresInternalControlForward__ = &__nvoc_down_thunk_Device_gpuresInternalControlForward; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // deviceCtrlCmdBifGetDmaBaseSysmemAddr -- exported (id=0x800103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__deviceCtrlCmdBifGetDmaBaseSysmemAddr__ = &deviceCtrlCmdBifGetDmaBaseSysmemAddr_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // deviceCtrlCmdBifAspmFeatureSupported -- exported (id=0x800104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__deviceCtrlCmdBifAspmFeatureSupported__ = &deviceCtrlCmdBifAspmFeatureSupported_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // deviceCtrlCmdBifAspmCyaUpdate -- exported (id=0x800105) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__deviceCtrlCmdBifAspmCyaUpdate__ = &deviceCtrlCmdBifAspmCyaUpdate_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // deviceCtrlCmdBifGetPciePowerControlMask -- exported (id=0x800106) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__deviceCtrlCmdBifGetPciePowerControlMask__ = &deviceCtrlCmdBifGetPciePowerControlMask_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // deviceCtrlCmdDmaGetPteInfo -- exported (id=0x801801) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__deviceCtrlCmdDmaGetPteInfo__ = &deviceCtrlCmdDmaGetPteInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // deviceCtrlCmdDmaUpdatePde2 -- exported (id=0x80180f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__deviceCtrlCmdDmaUpdatePde2__ = &deviceCtrlCmdDmaUpdatePde2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x140004u) + // deviceCtrlCmdDmaSetPageDirectory -- exported (id=0x801813) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) pThis->__deviceCtrlCmdDmaSetPageDirectory__ = &deviceCtrlCmdDmaSetPageDirectory_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x140004u) + // deviceCtrlCmdDmaUnsetPageDirectory -- exported (id=0x801814) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) pThis->__deviceCtrlCmdDmaUnsetPageDirectory__ = &deviceCtrlCmdDmaUnsetPageDirectory_IMPL; #endif - // Hal function -- deviceCtrlCmdDmaFlush + // deviceCtrlCmdDmaFlush -- halified (2 hals) exported (id=0x801805) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__deviceCtrlCmdDmaFlush__ = &deviceCtrlCmdDmaFlush_VF; @@ -1242,203 +1286,267 @@ static void __nvoc_init_funcTable_Device_1(Device *pThis, RmHalspecOwner *pRmhal pThis->__deviceCtrlCmdDmaFlush__ = &deviceCtrlCmdDmaFlush_5baef9; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // deviceCtrlCmdDmaAdvSchedGetVaCaps -- exported (id=0x801806) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__deviceCtrlCmdDmaAdvSchedGetVaCaps__ = &deviceCtrlCmdDmaAdvSchedGetVaCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // deviceCtrlCmdDmaGetPdeInfo -- exported (id=0x801809) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__deviceCtrlCmdDmaGetPdeInfo__ = &deviceCtrlCmdDmaGetPdeInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // deviceCtrlCmdDmaSetPteInfo -- exported (id=0x80180a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__deviceCtrlCmdDmaSetPteInfo__ = &deviceCtrlCmdDmaSetPteInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // deviceCtrlCmdDmaInvalidateTLB -- exported (id=0x80180c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__deviceCtrlCmdDmaInvalidateTLB__ = &deviceCtrlCmdDmaInvalidateTLB_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // deviceCtrlCmdDmaGetCaps -- exported (id=0x80180d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__deviceCtrlCmdDmaGetCaps__ = &deviceCtrlCmdDmaGetCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // deviceCtrlCmdDmaSetVASpaceSize -- exported (id=0x80180e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__deviceCtrlCmdDmaSetVASpaceSize__ = &deviceCtrlCmdDmaSetVASpaceSize_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // deviceCtrlCmdDmaEnablePrivilegedRange -- exported (id=0x801810) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__deviceCtrlCmdDmaEnablePrivilegedRange__ = &deviceCtrlCmdDmaEnablePrivilegedRange_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0000u) + // deviceCtrlCmdDmaSetDefaultVASpace -- exported (id=0x801812) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c000u) pThis->__deviceCtrlCmdDmaSetDefaultVASpace__ = &deviceCtrlCmdDmaSetDefaultVASpace_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x812u) + // deviceCtrlCmdKGrGetCaps -- exported (id=0x801102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) pThis->__deviceCtrlCmdKGrGetCaps__ = &deviceCtrlCmdKGrGetCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x812u) + // deviceCtrlCmdKGrGetCapsV2 -- exported (id=0x801109) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) pThis->__deviceCtrlCmdKGrGetCapsV2__ = &deviceCtrlCmdKGrGetCapsV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) + // deviceCtrlCmdKGrGetInfo -- exported (id=0x801104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) pThis->__deviceCtrlCmdKGrGetInfo__ = &deviceCtrlCmdKGrGetInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // deviceCtrlCmdKGrGetInfoV2 -- exported (id=0x801110) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__deviceCtrlCmdKGrGetInfoV2__ = &deviceCtrlCmdKGrGetInfoV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // deviceCtrlCmdKGrGetTpcPartitionMode -- exported (id=0x801107) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__deviceCtrlCmdKGrGetTpcPartitionMode__ = &deviceCtrlCmdKGrGetTpcPartitionMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // deviceCtrlCmdKGrSetTpcPartitionMode -- exported (id=0x801108) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__deviceCtrlCmdKGrSetTpcPartitionMode__ = &deviceCtrlCmdKGrSetTpcPartitionMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // deviceCtrlCmdFbGetCompbitStoreInfo -- exported (id=0x801306) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__deviceCtrlCmdFbGetCompbitStoreInfo__ = &deviceCtrlCmdFbGetCompbitStoreInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // deviceCtrlCmdFbGetCaps -- exported (id=0x801301) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__deviceCtrlCmdFbGetCaps__ = &deviceCtrlCmdFbGetCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4811u) + // deviceCtrlCmdFbGetCapsV2 -- exported (id=0x801307) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) pThis->__deviceCtrlCmdFbGetCapsV2__ = &deviceCtrlCmdFbGetCapsV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // deviceCtrlCmdSetDefaultVidmemPhysicality -- exported (id=0x801308) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__deviceCtrlCmdSetDefaultVidmemPhysicality__ = &deviceCtrlCmdSetDefaultVidmemPhysicality_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) + // deviceCtrlCmdFifoGetCaps -- exported (id=0x801701) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) pThis->__deviceCtrlCmdFifoGetCaps__ = &deviceCtrlCmdFifoGetCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) + // deviceCtrlCmdFifoGetCapsV2 -- exported (id=0x801713) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) pThis->__deviceCtrlCmdFifoGetCapsV2__ = &deviceCtrlCmdFifoGetCapsV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // deviceCtrlCmdFifoStartSelectedChannels -- exported (id=0x801705) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__deviceCtrlCmdFifoStartSelectedChannels__ = &deviceCtrlCmdFifoStartSelectedChannels_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2a10u) - pThis->__deviceCtrlCmdFifoGetEngineContextProperties__ = &deviceCtrlCmdFifoGetEngineContextProperties_IMPL; -#endif + // deviceCtrlCmdFifoGetEngineContextProperties -- halified (2 hals) exported (id=0x801707) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__deviceCtrlCmdFifoGetEngineContextProperties__ = &deviceCtrlCmdFifoGetEngineContextProperties_VF; + } + else + { + pThis->__deviceCtrlCmdFifoGetEngineContextProperties__ = &deviceCtrlCmdFifoGetEngineContextProperties_92bfc3; + } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2204u) + // deviceCtrlCmdFifoStopRunlist -- exported (id=0x801711) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) pThis->__deviceCtrlCmdFifoStopRunlist__ = &deviceCtrlCmdFifoStopRunlist_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2204u) + // deviceCtrlCmdFifoStartRunlist -- exported (id=0x801712) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) pThis->__deviceCtrlCmdFifoStartRunlist__ = &deviceCtrlCmdFifoStartRunlist_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // deviceCtrlCmdFifoGetChannelList -- exported (id=0x80170d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__deviceCtrlCmdFifoGetChannelList__ = &deviceCtrlCmdFifoGetChannelList_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2211u) - pThis->__deviceCtrlCmdFifoGetLatencyBufferSize__ = &deviceCtrlCmdFifoGetLatencyBufferSize_IMPL; -#endif + // deviceCtrlCmdFifoGetLatencyBufferSize -- halified (2 hals) exported (id=0x80170e) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__deviceCtrlCmdFifoGetLatencyBufferSize__ = &deviceCtrlCmdFifoGetLatencyBufferSize_VF; + } + else + { + pThis->__deviceCtrlCmdFifoGetLatencyBufferSize__ = &deviceCtrlCmdFifoGetLatencyBufferSize_92bfc3; + } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // deviceCtrlCmdFifoSetChannelProperties -- exported (id=0x80170f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__deviceCtrlCmdFifoSetChannelProperties__ = &deviceCtrlCmdFifoSetChannelProperties_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // deviceCtrlCmdFifoIdleChannels -- exported (id=0x801714) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__deviceCtrlCmdFifoIdleChannels__ = &deviceCtrlCmdFifoIdleChannels_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // deviceCtrlCmdHostGetCaps -- exported (id=0x801401) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__deviceCtrlCmdHostGetCaps__ = &deviceCtrlCmdHostGetCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4850u) + // deviceCtrlCmdHostGetCapsV2 -- exported (id=0x801402) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x518u) pThis->__deviceCtrlCmdHostGetCapsV2__ = &deviceCtrlCmdHostGetCapsV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // deviceCtrlCmdKPerfCudaLimitSetControl -- exported (id=0x801909) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__deviceCtrlCmdKPerfCudaLimitSetControl__ = &deviceCtrlCmdKPerfCudaLimitSetControl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xe50u) + // deviceCtrlCmdInternalPerfCudaLimitSetControl -- exported (id=0x802009) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d8u) pThis->__deviceCtrlCmdInternalPerfCudaLimitSetControl__ = &deviceCtrlCmdInternalPerfCudaLimitSetControl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // deviceCtrlCmdInternalPerfCudaLimitDisable -- exported (id=0x802004) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__deviceCtrlCmdInternalPerfCudaLimitDisable__ = &deviceCtrlCmdInternalPerfCudaLimitDisable_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // deviceCtrlCmdGpuGetClasslist -- exported (id=0x800201) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__deviceCtrlCmdGpuGetClasslist__ = &deviceCtrlCmdGpuGetClasslist_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // deviceCtrlCmdGpuGetClasslistV2 -- exported (id=0x800292) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__deviceCtrlCmdGpuGetClasslistV2__ = &deviceCtrlCmdGpuGetClasslistV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4811u) + // deviceCtrlCmdGpuGetNumSubdevices -- exported (id=0x800280) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) pThis->__deviceCtrlCmdGpuGetNumSubdevices__ = &deviceCtrlCmdGpuGetNumSubdevices_IMPL; #endif + // deviceCtrlCmdGpuModifyGpuSwStatePersistence -- exported (id=0x800287) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x5u) pThis->__deviceCtrlCmdGpuModifyGpuSwStatePersistence__ = &deviceCtrlCmdGpuModifyGpuSwStatePersistence_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // deviceCtrlCmdGpuQueryGpuSwStatePersistence -- exported (id=0x800288) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__deviceCtrlCmdGpuQueryGpuSwStatePersistence__ = &deviceCtrlCmdGpuQueryGpuSwStatePersistence_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // deviceCtrlCmdGpuGetVirtualizationMode -- exported (id=0x800289) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__deviceCtrlCmdGpuGetVirtualizationMode__ = &deviceCtrlCmdGpuGetVirtualizationMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // deviceCtrlCmdGpuSetVgpuVfBar1Size -- exported (id=0x800296) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__deviceCtrlCmdGpuSetVgpuVfBar1Size__ = &deviceCtrlCmdGpuSetVgpuVfBar1Size_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // deviceCtrlCmdGpuGetSparseTextureComputeMode -- exported (id=0x80028c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__deviceCtrlCmdGpuGetSparseTextureComputeMode__ = &deviceCtrlCmdGpuGetSparseTextureComputeMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // deviceCtrlCmdGpuSetSparseTextureComputeMode -- exported (id=0x80028d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__deviceCtrlCmdGpuSetSparseTextureComputeMode__ = &deviceCtrlCmdGpuSetSparseTextureComputeMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // deviceCtrlCmdGpuGetVgxCaps -- exported (id=0x80028e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__deviceCtrlCmdGpuGetVgxCaps__ = &deviceCtrlCmdGpuGetVgxCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2211u) - pThis->__deviceCtrlCmdGpuGetBrandCaps__ = &deviceCtrlCmdGpuGetBrandCaps_IMPL; -#endif + // deviceCtrlCmdGpuGetBrandCaps -- halified (2 hals) exported (id=0x800294) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__deviceCtrlCmdGpuGetBrandCaps__ = &deviceCtrlCmdGpuGetBrandCaps_VF; + } + else + { + pThis->__deviceCtrlCmdGpuGetBrandCaps__ = &deviceCtrlCmdGpuGetBrandCaps_5baef9; + } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // deviceCtrlCmdGpuVirtualizationSwitchToVga -- exported (id=0x800290) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__deviceCtrlCmdGpuVirtualizationSwitchToVga__ = &deviceCtrlCmdGpuVirtualizationSwitchToVga_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // deviceCtrlCmdGpuSetVgpuHeterogeneousMode -- exported (id=0x800297) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__deviceCtrlCmdGpuSetVgpuHeterogeneousMode__ = &deviceCtrlCmdGpuSetVgpuHeterogeneousMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // deviceCtrlCmdGpuGetVgpuHeterogeneousMode -- exported (id=0x800298) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__deviceCtrlCmdGpuGetVgpuHeterogeneousMode__ = &deviceCtrlCmdGpuGetVgpuHeterogeneousMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // deviceCtrlCmdGpuGetSriovCaps -- exported (id=0x800291) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__deviceCtrlCmdGpuGetSriovCaps__ = &deviceCtrlCmdGpuGetSriovCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // deviceCtrlCmdGpuGetFindSubDeviceHandle -- exported (id=0x800293) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__deviceCtrlCmdGpuGetFindSubDeviceHandle__ = &deviceCtrlCmdGpuGetFindSubDeviceHandle_IMPL; #endif - // Hal function -- deviceCtrlCmdMsencGetCapsV2 + // deviceCtrlCmdMsencGetCapsV2 -- halified (2 hals) exported (id=0x801b02) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__deviceCtrlCmdMsencGetCapsV2__ = &deviceCtrlCmdMsencGetCapsV2_VF; @@ -1448,7 +1556,7 @@ static void __nvoc_init_funcTable_Device_1(Device *pThis, RmHalspecOwner *pRmhal pThis->__deviceCtrlCmdMsencGetCapsV2__ = &deviceCtrlCmdMsencGetCapsV2_5baef9; } - // Hal function -- deviceCtrlCmdBspGetCapsV2 + // deviceCtrlCmdBspGetCapsV2 -- halified (2 hals) exported (id=0x801c02) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__deviceCtrlCmdBspGetCapsV2__ = &deviceCtrlCmdBspGetCapsV2_VF; @@ -1458,7 +1566,7 @@ static void __nvoc_init_funcTable_Device_1(Device *pThis, RmHalspecOwner *pRmhal pThis->__deviceCtrlCmdBspGetCapsV2__ = &deviceCtrlCmdBspGetCapsV2_5baef9; } - // Hal function -- deviceCtrlCmdNvjpgGetCapsV2 + // deviceCtrlCmdNvjpgGetCapsV2 -- halified (2 hals) exported (id=0x801f02) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__deviceCtrlCmdNvjpgGetCapsV2__ = &deviceCtrlCmdNvjpgGetCapsV2_VF; @@ -1468,66 +1576,91 @@ static void __nvoc_init_funcTable_Device_1(Device *pThis, RmHalspecOwner *pRmhal pThis->__deviceCtrlCmdNvjpgGetCapsV2__ = &deviceCtrlCmdNvjpgGetCapsV2_c04480; } + // deviceCtrlCmdOsUnixVTSwitch -- exported (id=0x801e01) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1u) pThis->__deviceCtrlCmdOsUnixVTSwitch__ = &deviceCtrlCmdOsUnixVTSwitch_IMPL; #endif + // deviceCtrlCmdOsUnixVTGetFBInfo -- exported (id=0x801e02) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1u) pThis->__deviceCtrlCmdOsUnixVTGetFBInfo__ = &deviceCtrlCmdOsUnixVTGetFBInfo_IMPL; #endif - pThis->__nvoc_base_GpuResource.__gpuresControl__ = &__nvoc_thunk_Device_gpuresControl; - - pThis->__nvoc_base_GpuResource.__gpuresInternalControlForward__ = &__nvoc_thunk_Device_gpuresInternalControlForward; + // deviceMap -- virtual inherited (gpures) base (gpures) + pThis->__deviceMap__ = &__nvoc_up_thunk_GpuResource_deviceMap; - pThis->__deviceShareCallback__ = &__nvoc_thunk_GpuResource_deviceShareCallback; + // deviceUnmap -- virtual inherited (gpures) base (gpures) + pThis->__deviceUnmap__ = &__nvoc_up_thunk_GpuResource_deviceUnmap; - pThis->__deviceCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_deviceCheckMemInterUnmap; + // deviceShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__deviceShareCallback__ = &__nvoc_up_thunk_GpuResource_deviceShareCallback; - pThis->__deviceMapTo__ = &__nvoc_thunk_RsResource_deviceMapTo; + // deviceGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__deviceGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_deviceGetRegBaseOffsetAndSize; - pThis->__deviceGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_deviceGetMapAddrSpace; + // deviceGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__deviceGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_deviceGetMapAddrSpace; - pThis->__deviceGetRefCount__ = &__nvoc_thunk_RsResource_deviceGetRefCount; + // deviceGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__deviceGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_deviceGetInternalObjectHandle; - pThis->__deviceAddAdditionalDependants__ = &__nvoc_thunk_RsResource_deviceAddAdditionalDependants; + // deviceAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__deviceAccessCallback__ = &__nvoc_up_thunk_RmResource_deviceAccessCallback; - pThis->__deviceControl_Prologue__ = &__nvoc_thunk_RmResource_deviceControl_Prologue; + // deviceGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__deviceGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_deviceGetMemInterMapParams; - pThis->__deviceGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_deviceGetRegBaseOffsetAndSize; + // deviceCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__deviceCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_deviceCheckMemInterUnmap; - pThis->__deviceUnmapFrom__ = &__nvoc_thunk_RsResource_deviceUnmapFrom; + // deviceGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__deviceGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_deviceGetMemoryMappingDescriptor; - pThis->__deviceControl_Epilogue__ = &__nvoc_thunk_RmResource_deviceControl_Epilogue; + // deviceControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__deviceControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_deviceControlSerialization_Prologue; - pThis->__deviceGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_deviceGetInternalObjectHandle; + // deviceControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__deviceControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_deviceControlSerialization_Epilogue; - pThis->__deviceUnmap__ = &__nvoc_thunk_GpuResource_deviceUnmap; + // deviceControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__deviceControl_Prologue__ = &__nvoc_up_thunk_RmResource_deviceControl_Prologue; - pThis->__deviceGetMemInterMapParams__ = &__nvoc_thunk_RmResource_deviceGetMemInterMapParams; + // deviceControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__deviceControl_Epilogue__ = &__nvoc_up_thunk_RmResource_deviceControl_Epilogue; - pThis->__deviceGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_deviceGetMemoryMappingDescriptor; + // deviceCanCopy -- virtual inherited (res) base (gpures) + pThis->__deviceCanCopy__ = &__nvoc_up_thunk_RsResource_deviceCanCopy; - pThis->__deviceControlFilter__ = &__nvoc_thunk_RsResource_deviceControlFilter; + // deviceIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__deviceIsDuplicate__ = &__nvoc_up_thunk_RsResource_deviceIsDuplicate; - pThis->__deviceControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_deviceControlSerialization_Prologue; + // devicePreDestruct -- virtual inherited (res) base (gpures) + pThis->__devicePreDestruct__ = &__nvoc_up_thunk_RsResource_devicePreDestruct; - pThis->__deviceCanCopy__ = &__nvoc_thunk_RsResource_deviceCanCopy; + // deviceControlFilter -- virtual inherited (res) base (gpures) + pThis->__deviceControlFilter__ = &__nvoc_up_thunk_RsResource_deviceControlFilter; - pThis->__deviceIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_deviceIsPartialUnmapSupported; + // deviceIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__deviceIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_deviceIsPartialUnmapSupported; - pThis->__devicePreDestruct__ = &__nvoc_thunk_RsResource_devicePreDestruct; + // deviceMapTo -- virtual inherited (res) base (gpures) + pThis->__deviceMapTo__ = &__nvoc_up_thunk_RsResource_deviceMapTo; - pThis->__deviceIsDuplicate__ = &__nvoc_thunk_RsResource_deviceIsDuplicate; + // deviceUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__deviceUnmapFrom__ = &__nvoc_up_thunk_RsResource_deviceUnmapFrom; - pThis->__deviceControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_deviceControlSerialization_Epilogue; + // deviceGetRefCount -- virtual inherited (res) base (gpures) + pThis->__deviceGetRefCount__ = &__nvoc_up_thunk_RsResource_deviceGetRefCount; - pThis->__deviceMap__ = &__nvoc_thunk_GpuResource_deviceMap; + // deviceAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__deviceAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_deviceAddAdditionalDependants; +} // End __nvoc_init_funcTable_Device_1 with approximately 97 basic block(s). - pThis->__deviceAccessCallback__ = &__nvoc_thunk_RmResource_deviceAccessCallback; -} +// Initialize vtable(s) for 88 virtual method(s). void __nvoc_init_funcTable_Device(Device *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 88 per-object function pointer(s). __nvoc_init_funcTable_Device_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_device_nvoc.h b/src/nvidia/generated/g_device_nvoc.h index ca1e139c44..b25d6395e4 100644 --- a/src/nvidia/generated/g_device_nvoc.h +++ b/src/nvidia/generated/g_device_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_DEVICE_NVOC_H_ #define _G_DEVICE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_device_nvoc.h" #ifndef _DEVICE_H_ @@ -50,6 +58,7 @@ extern "C" { // Forward declaration struct KERNEL_HOST_VGPU_DEVICE; + struct OBJVASPACE; #ifndef __NVOC_CLASS_OBJVASPACE_TYPEDEF__ @@ -78,103 +87,114 @@ typedef struct OBJVASPACE OBJVASPACE; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct Device { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct Device *__nvoc_pbase_Device; - NV_STATUS (*__deviceControl__)(struct Device *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__deviceInternalControlForward__)(struct Device *, NvU32, void *, NvU32); - NV_STATUS (*__deviceCtrlCmdBifGetDmaBaseSysmemAddr__)(struct Device *, NV0080_CTRL_BIF_GET_DMA_BASE_SYSMEM_ADDR_PARAMS *); - NV_STATUS (*__deviceCtrlCmdBifAspmFeatureSupported__)(struct Device *, NV0080_CTRL_BIF_SET_ASPM_FEATURE_PARAMS *); - NV_STATUS (*__deviceCtrlCmdBifAspmCyaUpdate__)(struct Device *, NV0080_CTRL_BIF_ASPM_CYA_UPDATE_PARAMS *); - NV_STATUS (*__deviceCtrlCmdBifGetPciePowerControlMask__)(struct Device *, NV0080_CTRL_CMD_BIF_GET_PCIE_POWER_CONTROL_MASK_PARAMS *); - NV_STATUS (*__deviceCtrlCmdDmaGetPteInfo__)(struct Device *, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *); - NV_STATUS (*__deviceCtrlCmdDmaUpdatePde2__)(struct Device *, NV0080_CTRL_DMA_UPDATE_PDE_2_PARAMS *); - NV_STATUS (*__deviceCtrlCmdDmaSetPageDirectory__)(struct Device *, NV0080_CTRL_DMA_SET_PAGE_DIRECTORY_PARAMS *); - NV_STATUS (*__deviceCtrlCmdDmaUnsetPageDirectory__)(struct Device *, NV0080_CTRL_DMA_UNSET_PAGE_DIRECTORY_PARAMS *); - NV_STATUS (*__deviceCtrlCmdDmaFlush__)(struct Device *, NV0080_CTRL_DMA_FLUSH_PARAMS *); - NV_STATUS (*__deviceCtrlCmdDmaAdvSchedGetVaCaps__)(struct Device *, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *); - NV_STATUS (*__deviceCtrlCmdDmaGetPdeInfo__)(struct Device *, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *); - NV_STATUS (*__deviceCtrlCmdDmaSetPteInfo__)(struct Device *, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *); - NV_STATUS (*__deviceCtrlCmdDmaInvalidateTLB__)(struct Device *, NV0080_CTRL_DMA_INVALIDATE_TLB_PARAMS *); - NV_STATUS (*__deviceCtrlCmdDmaGetCaps__)(struct Device *, NV0080_CTRL_DMA_GET_CAPS_PARAMS *); - NV_STATUS (*__deviceCtrlCmdDmaSetVASpaceSize__)(struct Device *, NV0080_CTRL_DMA_SET_VA_SPACE_SIZE_PARAMS *); - NV_STATUS (*__deviceCtrlCmdDmaEnablePrivilegedRange__)(struct Device *, NV0080_CTRL_DMA_ENABLE_PRIVILEGED_RANGE_PARAMS *); - NV_STATUS (*__deviceCtrlCmdDmaSetDefaultVASpace__)(struct Device *, NV0080_CTRL_DMA_SET_DEFAULT_VASPACE_PARAMS *); - NV_STATUS (*__deviceCtrlCmdKGrGetCaps__)(struct Device *, NV0080_CTRL_GR_GET_CAPS_PARAMS *); - NV_STATUS (*__deviceCtrlCmdKGrGetCapsV2__)(struct Device *, NV0080_CTRL_GR_GET_CAPS_V2_PARAMS *); - NV_STATUS (*__deviceCtrlCmdKGrGetInfo__)(struct Device *, NV0080_CTRL_GR_GET_INFO_PARAMS *); - NV_STATUS (*__deviceCtrlCmdKGrGetInfoV2__)(struct Device *, NV0080_CTRL_GR_GET_INFO_V2_PARAMS *); - NV_STATUS (*__deviceCtrlCmdKGrGetTpcPartitionMode__)(struct Device *, NV0080_CTRL_GR_TPC_PARTITION_MODE_PARAMS *); - NV_STATUS (*__deviceCtrlCmdKGrSetTpcPartitionMode__)(struct Device *, NV0080_CTRL_GR_TPC_PARTITION_MODE_PARAMS *); - NV_STATUS (*__deviceCtrlCmdFbGetCompbitStoreInfo__)(struct Device *, NV0080_CTRL_FB_GET_COMPBIT_STORE_INFO_PARAMS *); - NV_STATUS (*__deviceCtrlCmdFbGetCaps__)(struct Device *, NV0080_CTRL_FB_GET_CAPS_PARAMS *); - NV_STATUS (*__deviceCtrlCmdFbGetCapsV2__)(struct Device *, NV0080_CTRL_FB_GET_CAPS_V2_PARAMS *); - NV_STATUS (*__deviceCtrlCmdSetDefaultVidmemPhysicality__)(struct Device *, NV0080_CTRL_FB_SET_DEFAULT_VIDMEM_PHYSICALITY_PARAMS *); - NV_STATUS (*__deviceCtrlCmdFifoGetCaps__)(struct Device *, NV0080_CTRL_FIFO_GET_CAPS_PARAMS *); - NV_STATUS (*__deviceCtrlCmdFifoGetCapsV2__)(struct Device *, NV0080_CTRL_FIFO_GET_CAPS_V2_PARAMS *); - NV_STATUS (*__deviceCtrlCmdFifoStartSelectedChannels__)(struct Device *, NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS *); - NV_STATUS (*__deviceCtrlCmdFifoGetEngineContextProperties__)(struct Device *, NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *); - NV_STATUS (*__deviceCtrlCmdFifoStopRunlist__)(struct Device *, NV0080_CTRL_FIFO_STOP_RUNLIST_PARAMS *); - NV_STATUS (*__deviceCtrlCmdFifoStartRunlist__)(struct Device *, NV0080_CTRL_FIFO_START_RUNLIST_PARAMS *); - NV_STATUS (*__deviceCtrlCmdFifoGetChannelList__)(struct Device *, NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS *); - NV_STATUS (*__deviceCtrlCmdFifoGetLatencyBufferSize__)(struct Device *, NV0080_CTRL_FIFO_GET_LATENCY_BUFFER_SIZE_PARAMS *); - NV_STATUS (*__deviceCtrlCmdFifoSetChannelProperties__)(struct Device *, NV0080_CTRL_FIFO_SET_CHANNEL_PROPERTIES_PARAMS *); - NV_STATUS (*__deviceCtrlCmdFifoIdleChannels__)(struct Device *, NV0080_CTRL_FIFO_IDLE_CHANNELS_PARAMS *); - NV_STATUS (*__deviceCtrlCmdHostGetCaps__)(struct Device *, NV0080_CTRL_HOST_GET_CAPS_PARAMS *); - NV_STATUS (*__deviceCtrlCmdHostGetCapsV2__)(struct Device *, NV0080_CTRL_HOST_GET_CAPS_V2_PARAMS *); - NV_STATUS (*__deviceCtrlCmdKPerfCudaLimitSetControl__)(struct Device *, NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS *); - NV_STATUS (*__deviceCtrlCmdInternalPerfCudaLimitSetControl__)(struct Device *, NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS *); - NV_STATUS (*__deviceCtrlCmdInternalPerfCudaLimitDisable__)(struct Device *); - NV_STATUS (*__deviceCtrlCmdGpuGetClasslist__)(struct Device *, NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS *); - NV_STATUS (*__deviceCtrlCmdGpuGetClasslistV2__)(struct Device *, NV0080_CTRL_GPU_GET_CLASSLIST_V2_PARAMS *); - NV_STATUS (*__deviceCtrlCmdGpuGetNumSubdevices__)(struct Device *, NV0080_CTRL_GPU_GET_NUM_SUBDEVICES_PARAMS *); - NV_STATUS (*__deviceCtrlCmdGpuModifyGpuSwStatePersistence__)(struct Device *, NV0080_CTRL_GPU_MODIFY_SW_STATE_PERSISTENCE_PARAMS *); - NV_STATUS (*__deviceCtrlCmdGpuQueryGpuSwStatePersistence__)(struct Device *, NV0080_CTRL_GPU_QUERY_SW_STATE_PERSISTENCE_PARAMS *); - NV_STATUS (*__deviceCtrlCmdGpuGetVirtualizationMode__)(struct Device *, NV0080_CTRL_GPU_GET_VIRTUALIZATION_MODE_PARAMS *); - NV_STATUS (*__deviceCtrlCmdGpuSetVgpuVfBar1Size__)(struct Device *, NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS *); - NV_STATUS (*__deviceCtrlCmdGpuGetSparseTextureComputeMode__)(struct Device *, NV0080_CTRL_GPU_GET_SPARSE_TEXTURE_COMPUTE_MODE_PARAMS *); - NV_STATUS (*__deviceCtrlCmdGpuSetSparseTextureComputeMode__)(struct Device *, NV0080_CTRL_GPU_SET_SPARSE_TEXTURE_COMPUTE_MODE_PARAMS *); - NV_STATUS (*__deviceCtrlCmdGpuGetVgxCaps__)(struct Device *, NV0080_CTRL_GPU_GET_VGX_CAPS_PARAMS *); - NV_STATUS (*__deviceCtrlCmdGpuGetBrandCaps__)(struct Device *, NV0080_CTRL_GPU_GET_BRAND_CAPS_PARAMS *); - NV_STATUS (*__deviceCtrlCmdGpuVirtualizationSwitchToVga__)(struct Device *); - NV_STATUS (*__deviceCtrlCmdGpuSetVgpuHeterogeneousMode__)(struct Device *, NV0080_CTRL_GPU_SET_VGPU_HETEROGENEOUS_MODE_PARAMS *); - NV_STATUS (*__deviceCtrlCmdGpuGetVgpuHeterogeneousMode__)(struct Device *, NV0080_CTRL_GPU_GET_VGPU_HETEROGENEOUS_MODE_PARAMS *); - NV_STATUS (*__deviceCtrlCmdGpuGetSriovCaps__)(struct Device *, NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS *); - NV_STATUS (*__deviceCtrlCmdGpuGetFindSubDeviceHandle__)(struct Device *, NV0080_CTRL_GPU_FIND_SUBDEVICE_HANDLE_PARAM *); - NV_STATUS (*__deviceCtrlCmdMsencGetCapsV2__)(struct Device *, NV0080_CTRL_MSENC_GET_CAPS_V2_PARAMS *); - NV_STATUS (*__deviceCtrlCmdBspGetCapsV2__)(struct Device *, NV0080_CTRL_BSP_GET_CAPS_PARAMS_V2 *); - NV_STATUS (*__deviceCtrlCmdNvjpgGetCapsV2__)(struct Device *, NV0080_CTRL_NVJPG_GET_CAPS_V2_PARAMS *); - NV_STATUS (*__deviceCtrlCmdOsUnixVTSwitch__)(struct Device *, NV0080_CTRL_OS_UNIX_VT_SWITCH_PARAMS *); - NV_STATUS (*__deviceCtrlCmdOsUnixVTGetFBInfo__)(struct Device *, NV0080_CTRL_OS_UNIX_VT_GET_FB_INFO_PARAMS *); - NvBool (*__deviceShareCallback__)(struct Device *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__deviceCheckMemInterUnmap__)(struct Device *, NvBool); - NV_STATUS (*__deviceMapTo__)(struct Device *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__deviceGetMapAddrSpace__)(struct Device *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__deviceGetRefCount__)(struct Device *); - void (*__deviceAddAdditionalDependants__)(struct RsClient *, struct Device *, RsResourceRef *); - NV_STATUS (*__deviceControl_Prologue__)(struct Device *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__deviceGetRegBaseOffsetAndSize__)(struct Device *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__deviceUnmapFrom__)(struct Device *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__deviceControl_Epilogue__)(struct Device *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__deviceGetInternalObjectHandle__)(struct Device *); - NV_STATUS (*__deviceUnmap__)(struct Device *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__deviceGetMemInterMapParams__)(struct Device *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__deviceGetMemoryMappingDescriptor__)(struct Device *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__deviceControlFilter__)(struct Device *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__deviceControlSerialization_Prologue__)(struct Device *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__deviceCanCopy__)(struct Device *); - NvBool (*__deviceIsPartialUnmapSupported__)(struct Device *); - void (*__devicePreDestruct__)(struct Device *); - NV_STATUS (*__deviceIsDuplicate__)(struct Device *, NvHandle, NvBool *); - void (*__deviceControlSerialization_Epilogue__)(struct Device *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__deviceMap__)(struct Device *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__deviceAccessCallback__)(struct Device *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct Device *__nvoc_pbase_Device; // device + + // Vtable with 88 per-object function pointers + NV_STATUS (*__deviceControl__)(struct Device * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) + NV_STATUS (*__deviceInternalControlForward__)(struct Device * /*this*/, NvU32, void *, NvU32); // virtual override (gpures) base (gpures) + NV_STATUS (*__deviceCtrlCmdBifGetDmaBaseSysmemAddr__)(struct Device * /*this*/, NV0080_CTRL_BIF_GET_DMA_BASE_SYSMEM_ADDR_PARAMS *); // exported (id=0x800103) + NV_STATUS (*__deviceCtrlCmdBifAspmFeatureSupported__)(struct Device * /*this*/, NV0080_CTRL_BIF_SET_ASPM_FEATURE_PARAMS *); // exported (id=0x800104) + NV_STATUS (*__deviceCtrlCmdBifAspmCyaUpdate__)(struct Device * /*this*/, NV0080_CTRL_BIF_ASPM_CYA_UPDATE_PARAMS *); // exported (id=0x800105) + NV_STATUS (*__deviceCtrlCmdBifGetPciePowerControlMask__)(struct Device * /*this*/, NV0080_CTRL_CMD_BIF_GET_PCIE_POWER_CONTROL_MASK_PARAMS *); // exported (id=0x800106) + NV_STATUS (*__deviceCtrlCmdDmaGetPteInfo__)(struct Device * /*this*/, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *); // exported (id=0x801801) + NV_STATUS (*__deviceCtrlCmdDmaUpdatePde2__)(struct Device * /*this*/, NV0080_CTRL_DMA_UPDATE_PDE_2_PARAMS *); // exported (id=0x80180f) + NV_STATUS (*__deviceCtrlCmdDmaSetPageDirectory__)(struct Device * /*this*/, NV0080_CTRL_DMA_SET_PAGE_DIRECTORY_PARAMS *); // exported (id=0x801813) + NV_STATUS (*__deviceCtrlCmdDmaUnsetPageDirectory__)(struct Device * /*this*/, NV0080_CTRL_DMA_UNSET_PAGE_DIRECTORY_PARAMS *); // exported (id=0x801814) + NV_STATUS (*__deviceCtrlCmdDmaFlush__)(struct Device * /*this*/, NV0080_CTRL_DMA_FLUSH_PARAMS *); // halified (2 hals) exported (id=0x801805) body + NV_STATUS (*__deviceCtrlCmdDmaAdvSchedGetVaCaps__)(struct Device * /*this*/, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *); // exported (id=0x801806) + NV_STATUS (*__deviceCtrlCmdDmaGetPdeInfo__)(struct Device * /*this*/, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *); // exported (id=0x801809) + NV_STATUS (*__deviceCtrlCmdDmaSetPteInfo__)(struct Device * /*this*/, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *); // exported (id=0x80180a) + NV_STATUS (*__deviceCtrlCmdDmaInvalidateTLB__)(struct Device * /*this*/, NV0080_CTRL_DMA_INVALIDATE_TLB_PARAMS *); // exported (id=0x80180c) + NV_STATUS (*__deviceCtrlCmdDmaGetCaps__)(struct Device * /*this*/, NV0080_CTRL_DMA_GET_CAPS_PARAMS *); // exported (id=0x80180d) + NV_STATUS (*__deviceCtrlCmdDmaSetVASpaceSize__)(struct Device * /*this*/, NV0080_CTRL_DMA_SET_VA_SPACE_SIZE_PARAMS *); // exported (id=0x80180e) + NV_STATUS (*__deviceCtrlCmdDmaEnablePrivilegedRange__)(struct Device * /*this*/, NV0080_CTRL_DMA_ENABLE_PRIVILEGED_RANGE_PARAMS *); // exported (id=0x801810) + NV_STATUS (*__deviceCtrlCmdDmaSetDefaultVASpace__)(struct Device * /*this*/, NV0080_CTRL_DMA_SET_DEFAULT_VASPACE_PARAMS *); // exported (id=0x801812) + NV_STATUS (*__deviceCtrlCmdKGrGetCaps__)(struct Device * /*this*/, NV0080_CTRL_GR_GET_CAPS_PARAMS *); // exported (id=0x801102) + NV_STATUS (*__deviceCtrlCmdKGrGetCapsV2__)(struct Device * /*this*/, NV0080_CTRL_GR_GET_CAPS_V2_PARAMS *); // exported (id=0x801109) + NV_STATUS (*__deviceCtrlCmdKGrGetInfo__)(struct Device * /*this*/, NV0080_CTRL_GR_GET_INFO_PARAMS *); // exported (id=0x801104) + NV_STATUS (*__deviceCtrlCmdKGrGetInfoV2__)(struct Device * /*this*/, NV0080_CTRL_GR_GET_INFO_V2_PARAMS *); // exported (id=0x801110) + NV_STATUS (*__deviceCtrlCmdKGrGetTpcPartitionMode__)(struct Device * /*this*/, NV0080_CTRL_GR_TPC_PARTITION_MODE_PARAMS *); // exported (id=0x801107) + NV_STATUS (*__deviceCtrlCmdKGrSetTpcPartitionMode__)(struct Device * /*this*/, NV0080_CTRL_GR_TPC_PARTITION_MODE_PARAMS *); // exported (id=0x801108) + NV_STATUS (*__deviceCtrlCmdFbGetCompbitStoreInfo__)(struct Device * /*this*/, NV0080_CTRL_FB_GET_COMPBIT_STORE_INFO_PARAMS *); // exported (id=0x801306) + NV_STATUS (*__deviceCtrlCmdFbGetCaps__)(struct Device * /*this*/, NV0080_CTRL_FB_GET_CAPS_PARAMS *); // exported (id=0x801301) + NV_STATUS (*__deviceCtrlCmdFbGetCapsV2__)(struct Device * /*this*/, NV0080_CTRL_FB_GET_CAPS_V2_PARAMS *); // exported (id=0x801307) + NV_STATUS (*__deviceCtrlCmdSetDefaultVidmemPhysicality__)(struct Device * /*this*/, NV0080_CTRL_FB_SET_DEFAULT_VIDMEM_PHYSICALITY_PARAMS *); // exported (id=0x801308) + NV_STATUS (*__deviceCtrlCmdFifoGetCaps__)(struct Device * /*this*/, NV0080_CTRL_FIFO_GET_CAPS_PARAMS *); // exported (id=0x801701) + NV_STATUS (*__deviceCtrlCmdFifoGetCapsV2__)(struct Device * /*this*/, NV0080_CTRL_FIFO_GET_CAPS_V2_PARAMS *); // exported (id=0x801713) + NV_STATUS (*__deviceCtrlCmdFifoStartSelectedChannels__)(struct Device * /*this*/, NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS *); // exported (id=0x801705) + NV_STATUS (*__deviceCtrlCmdFifoGetEngineContextProperties__)(struct Device * /*this*/, NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *); // halified (2 hals) exported (id=0x801707) body + NV_STATUS (*__deviceCtrlCmdFifoStopRunlist__)(struct Device * /*this*/, NV0080_CTRL_FIFO_STOP_RUNLIST_PARAMS *); // exported (id=0x801711) + NV_STATUS (*__deviceCtrlCmdFifoStartRunlist__)(struct Device * /*this*/, NV0080_CTRL_FIFO_START_RUNLIST_PARAMS *); // exported (id=0x801712) + NV_STATUS (*__deviceCtrlCmdFifoGetChannelList__)(struct Device * /*this*/, NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS *); // exported (id=0x80170d) + NV_STATUS (*__deviceCtrlCmdFifoGetLatencyBufferSize__)(struct Device * /*this*/, NV0080_CTRL_FIFO_GET_LATENCY_BUFFER_SIZE_PARAMS *); // halified (2 hals) exported (id=0x80170e) body + NV_STATUS (*__deviceCtrlCmdFifoSetChannelProperties__)(struct Device * /*this*/, NV0080_CTRL_FIFO_SET_CHANNEL_PROPERTIES_PARAMS *); // exported (id=0x80170f) + NV_STATUS (*__deviceCtrlCmdFifoIdleChannels__)(struct Device * /*this*/, NV0080_CTRL_FIFO_IDLE_CHANNELS_PARAMS *); // exported (id=0x801714) + NV_STATUS (*__deviceCtrlCmdHostGetCaps__)(struct Device * /*this*/, NV0080_CTRL_HOST_GET_CAPS_PARAMS *); // exported (id=0x801401) + NV_STATUS (*__deviceCtrlCmdHostGetCapsV2__)(struct Device * /*this*/, NV0080_CTRL_HOST_GET_CAPS_V2_PARAMS *); // exported (id=0x801402) + NV_STATUS (*__deviceCtrlCmdKPerfCudaLimitSetControl__)(struct Device * /*this*/, NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS *); // exported (id=0x801909) + NV_STATUS (*__deviceCtrlCmdInternalPerfCudaLimitSetControl__)(struct Device * /*this*/, NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS *); // exported (id=0x802009) + NV_STATUS (*__deviceCtrlCmdInternalPerfCudaLimitDisable__)(struct Device * /*this*/); // exported (id=0x802004) + NV_STATUS (*__deviceCtrlCmdGpuGetClasslist__)(struct Device * /*this*/, NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS *); // exported (id=0x800201) + NV_STATUS (*__deviceCtrlCmdGpuGetClasslistV2__)(struct Device * /*this*/, NV0080_CTRL_GPU_GET_CLASSLIST_V2_PARAMS *); // exported (id=0x800292) + NV_STATUS (*__deviceCtrlCmdGpuGetNumSubdevices__)(struct Device * /*this*/, NV0080_CTRL_GPU_GET_NUM_SUBDEVICES_PARAMS *); // exported (id=0x800280) + NV_STATUS (*__deviceCtrlCmdGpuModifyGpuSwStatePersistence__)(struct Device * /*this*/, NV0080_CTRL_GPU_MODIFY_SW_STATE_PERSISTENCE_PARAMS *); // exported (id=0x800287) + NV_STATUS (*__deviceCtrlCmdGpuQueryGpuSwStatePersistence__)(struct Device * /*this*/, NV0080_CTRL_GPU_QUERY_SW_STATE_PERSISTENCE_PARAMS *); // exported (id=0x800288) + NV_STATUS (*__deviceCtrlCmdGpuGetVirtualizationMode__)(struct Device * /*this*/, NV0080_CTRL_GPU_GET_VIRTUALIZATION_MODE_PARAMS *); // exported (id=0x800289) + NV_STATUS (*__deviceCtrlCmdGpuSetVgpuVfBar1Size__)(struct Device * /*this*/, NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS *); // exported (id=0x800296) + NV_STATUS (*__deviceCtrlCmdGpuGetSparseTextureComputeMode__)(struct Device * /*this*/, NV0080_CTRL_GPU_GET_SPARSE_TEXTURE_COMPUTE_MODE_PARAMS *); // exported (id=0x80028c) + NV_STATUS (*__deviceCtrlCmdGpuSetSparseTextureComputeMode__)(struct Device * /*this*/, NV0080_CTRL_GPU_SET_SPARSE_TEXTURE_COMPUTE_MODE_PARAMS *); // exported (id=0x80028d) + NV_STATUS (*__deviceCtrlCmdGpuGetVgxCaps__)(struct Device * /*this*/, NV0080_CTRL_GPU_GET_VGX_CAPS_PARAMS *); // exported (id=0x80028e) + NV_STATUS (*__deviceCtrlCmdGpuGetBrandCaps__)(struct Device * /*this*/, NV0080_CTRL_GPU_GET_BRAND_CAPS_PARAMS *); // halified (2 hals) exported (id=0x800294) body + NV_STATUS (*__deviceCtrlCmdGpuVirtualizationSwitchToVga__)(struct Device * /*this*/); // exported (id=0x800290) + NV_STATUS (*__deviceCtrlCmdGpuSetVgpuHeterogeneousMode__)(struct Device * /*this*/, NV0080_CTRL_GPU_SET_VGPU_HETEROGENEOUS_MODE_PARAMS *); // exported (id=0x800297) + NV_STATUS (*__deviceCtrlCmdGpuGetVgpuHeterogeneousMode__)(struct Device * /*this*/, NV0080_CTRL_GPU_GET_VGPU_HETEROGENEOUS_MODE_PARAMS *); // exported (id=0x800298) + NV_STATUS (*__deviceCtrlCmdGpuGetSriovCaps__)(struct Device * /*this*/, NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS *); // exported (id=0x800291) + NV_STATUS (*__deviceCtrlCmdGpuGetFindSubDeviceHandle__)(struct Device * /*this*/, NV0080_CTRL_GPU_FIND_SUBDEVICE_HANDLE_PARAM *); // exported (id=0x800293) + NV_STATUS (*__deviceCtrlCmdMsencGetCapsV2__)(struct Device * /*this*/, NV0080_CTRL_MSENC_GET_CAPS_V2_PARAMS *); // halified (2 hals) exported (id=0x801b02) body + NV_STATUS (*__deviceCtrlCmdBspGetCapsV2__)(struct Device * /*this*/, NV0080_CTRL_BSP_GET_CAPS_PARAMS_V2 *); // halified (2 hals) exported (id=0x801c02) body + NV_STATUS (*__deviceCtrlCmdNvjpgGetCapsV2__)(struct Device * /*this*/, NV0080_CTRL_NVJPG_GET_CAPS_V2_PARAMS *); // halified (2 hals) exported (id=0x801f02) body + NV_STATUS (*__deviceCtrlCmdOsUnixVTSwitch__)(struct Device * /*this*/, NV0080_CTRL_OS_UNIX_VT_SWITCH_PARAMS *); // exported (id=0x801e01) + NV_STATUS (*__deviceCtrlCmdOsUnixVTGetFBInfo__)(struct Device * /*this*/, NV0080_CTRL_OS_UNIX_VT_GET_FB_INFO_PARAMS *); // exported (id=0x801e02) + NV_STATUS (*__deviceMap__)(struct Device * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__deviceUnmap__)(struct Device * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__deviceShareCallback__)(struct Device * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__deviceGetRegBaseOffsetAndSize__)(struct Device * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__deviceGetMapAddrSpace__)(struct Device * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NvHandle (*__deviceGetInternalObjectHandle__)(struct Device * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__deviceAccessCallback__)(struct Device * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__deviceGetMemInterMapParams__)(struct Device * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__deviceCheckMemInterUnmap__)(struct Device * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__deviceGetMemoryMappingDescriptor__)(struct Device * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__deviceControlSerialization_Prologue__)(struct Device * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__deviceControlSerialization_Epilogue__)(struct Device * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__deviceControl_Prologue__)(struct Device * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__deviceControl_Epilogue__)(struct Device * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__deviceCanCopy__)(struct Device * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__deviceIsDuplicate__)(struct Device * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__devicePreDestruct__)(struct Device * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__deviceControlFilter__)(struct Device * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__deviceIsPartialUnmapSupported__)(struct Device * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__deviceMapTo__)(struct Device * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__deviceUnmapFrom__)(struct Device * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__deviceGetRefCount__)(struct Device * /*this*/); // virtual inherited (res) base (gpures) + void (*__deviceAddAdditionalDependants__)(struct RsClient *, struct Device * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members NvU32 deviceInst; NvU32 PerfReqCnt; PNODE DevMemoryTable; @@ -205,6 +225,7 @@ typedef struct Device Device; #define __nvoc_class_id_Device 0xe0ac20 #endif /* __nvoc_class_id_Device */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_Device; #define __staticCast_Device(pThis) \ @@ -217,603 +238,711 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_Device; ((Device*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(Device))) #endif //__nvoc_device_h_disabled - NV_STATUS __nvoc_objCreateDynamic_Device(Device**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_Device(Device**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_Device(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_Device((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define deviceControl_FNPTR(pResource) pResource->__deviceControl__ #define deviceControl(pResource, pCallContext, pParams) deviceControl_DISPATCH(pResource, pCallContext, pParams) +#define deviceInternalControlForward_FNPTR(pDevice) pDevice->__deviceInternalControlForward__ #define deviceInternalControlForward(pDevice, command, pParams, size) deviceInternalControlForward_DISPATCH(pDevice, command, pParams, size) +#define deviceCtrlCmdBifGetDmaBaseSysmemAddr_FNPTR(pDevice) pDevice->__deviceCtrlCmdBifGetDmaBaseSysmemAddr__ #define deviceCtrlCmdBifGetDmaBaseSysmemAddr(pDevice, pBifDmaBaseSysmemParams) deviceCtrlCmdBifGetDmaBaseSysmemAddr_DISPATCH(pDevice, pBifDmaBaseSysmemParams) +#define deviceCtrlCmdBifAspmFeatureSupported_FNPTR(pDevice) pDevice->__deviceCtrlCmdBifAspmFeatureSupported__ #define deviceCtrlCmdBifAspmFeatureSupported(pDevice, pBifAspmParams) deviceCtrlCmdBifAspmFeatureSupported_DISPATCH(pDevice, pBifAspmParams) +#define deviceCtrlCmdBifAspmCyaUpdate_FNPTR(pDevice) pDevice->__deviceCtrlCmdBifAspmCyaUpdate__ #define deviceCtrlCmdBifAspmCyaUpdate(pDevice, pBifAspmCyaParams) deviceCtrlCmdBifAspmCyaUpdate_DISPATCH(pDevice, pBifAspmCyaParams) +#define deviceCtrlCmdBifGetPciePowerControlMask_FNPTR(pDevice) pDevice->__deviceCtrlCmdBifGetPciePowerControlMask__ #define deviceCtrlCmdBifGetPciePowerControlMask(pDevice, pBifPciePowerControlParams) deviceCtrlCmdBifGetPciePowerControlMask_DISPATCH(pDevice, pBifPciePowerControlParams) +#define deviceCtrlCmdDmaGetPteInfo_FNPTR(pDevice) pDevice->__deviceCtrlCmdDmaGetPteInfo__ #define deviceCtrlCmdDmaGetPteInfo(pDevice, pParams) deviceCtrlCmdDmaGetPteInfo_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdDmaUpdatePde2_FNPTR(pDevice) pDevice->__deviceCtrlCmdDmaUpdatePde2__ #define deviceCtrlCmdDmaUpdatePde2(pDevice, pParams) deviceCtrlCmdDmaUpdatePde2_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdDmaSetPageDirectory_FNPTR(pDevice) pDevice->__deviceCtrlCmdDmaSetPageDirectory__ #define deviceCtrlCmdDmaSetPageDirectory(pDevice, pParams) deviceCtrlCmdDmaSetPageDirectory_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdDmaUnsetPageDirectory_FNPTR(pDevice) pDevice->__deviceCtrlCmdDmaUnsetPageDirectory__ #define deviceCtrlCmdDmaUnsetPageDirectory(pDevice, pParams) deviceCtrlCmdDmaUnsetPageDirectory_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdDmaFlush_FNPTR(pDevice) pDevice->__deviceCtrlCmdDmaFlush__ #define deviceCtrlCmdDmaFlush(pDevice, flushParams) deviceCtrlCmdDmaFlush_DISPATCH(pDevice, flushParams) #define deviceCtrlCmdDmaFlush_HAL(pDevice, flushParams) deviceCtrlCmdDmaFlush_DISPATCH(pDevice, flushParams) +#define deviceCtrlCmdDmaAdvSchedGetVaCaps_FNPTR(pDevice) pDevice->__deviceCtrlCmdDmaAdvSchedGetVaCaps__ #define deviceCtrlCmdDmaAdvSchedGetVaCaps(pDevice, pParams) deviceCtrlCmdDmaAdvSchedGetVaCaps_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdDmaGetPdeInfo_FNPTR(pDevice) pDevice->__deviceCtrlCmdDmaGetPdeInfo__ #define deviceCtrlCmdDmaGetPdeInfo(pDevice, pParams) deviceCtrlCmdDmaGetPdeInfo_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdDmaSetPteInfo_FNPTR(pDevice) pDevice->__deviceCtrlCmdDmaSetPteInfo__ #define deviceCtrlCmdDmaSetPteInfo(pDevice, pParams) deviceCtrlCmdDmaSetPteInfo_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdDmaInvalidateTLB_FNPTR(pDevice) pDevice->__deviceCtrlCmdDmaInvalidateTLB__ #define deviceCtrlCmdDmaInvalidateTLB(pDevice, pParams) deviceCtrlCmdDmaInvalidateTLB_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdDmaGetCaps_FNPTR(pDevice) pDevice->__deviceCtrlCmdDmaGetCaps__ #define deviceCtrlCmdDmaGetCaps(pDevice, pDmaCapsParams) deviceCtrlCmdDmaGetCaps_DISPATCH(pDevice, pDmaCapsParams) +#define deviceCtrlCmdDmaSetVASpaceSize_FNPTR(pDevice) pDevice->__deviceCtrlCmdDmaSetVASpaceSize__ #define deviceCtrlCmdDmaSetVASpaceSize(pDevice, pParams) deviceCtrlCmdDmaSetVASpaceSize_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdDmaEnablePrivilegedRange_FNPTR(pDevice) pDevice->__deviceCtrlCmdDmaEnablePrivilegedRange__ #define deviceCtrlCmdDmaEnablePrivilegedRange(pDevice, pParams) deviceCtrlCmdDmaEnablePrivilegedRange_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdDmaSetDefaultVASpace_FNPTR(pDevice) pDevice->__deviceCtrlCmdDmaSetDefaultVASpace__ #define deviceCtrlCmdDmaSetDefaultVASpace(pDevice, pParams) deviceCtrlCmdDmaSetDefaultVASpace_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdKGrGetCaps_FNPTR(pDevice) pDevice->__deviceCtrlCmdKGrGetCaps__ #define deviceCtrlCmdKGrGetCaps(pDevice, pParams) deviceCtrlCmdKGrGetCaps_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdKGrGetCapsV2_FNPTR(pDevice) pDevice->__deviceCtrlCmdKGrGetCapsV2__ #define deviceCtrlCmdKGrGetCapsV2(pDevice, pParams) deviceCtrlCmdKGrGetCapsV2_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdKGrGetInfo_FNPTR(pDevice) pDevice->__deviceCtrlCmdKGrGetInfo__ #define deviceCtrlCmdKGrGetInfo(pDevice, pParams) deviceCtrlCmdKGrGetInfo_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdKGrGetInfoV2_FNPTR(pDevice) pDevice->__deviceCtrlCmdKGrGetInfoV2__ #define deviceCtrlCmdKGrGetInfoV2(pDevice, pParams) deviceCtrlCmdKGrGetInfoV2_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdKGrGetTpcPartitionMode_FNPTR(pDevice) pDevice->__deviceCtrlCmdKGrGetTpcPartitionMode__ #define deviceCtrlCmdKGrGetTpcPartitionMode(pDevice, pParams) deviceCtrlCmdKGrGetTpcPartitionMode_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdKGrSetTpcPartitionMode_FNPTR(pDevice) pDevice->__deviceCtrlCmdKGrSetTpcPartitionMode__ #define deviceCtrlCmdKGrSetTpcPartitionMode(pDevice, pParams) deviceCtrlCmdKGrSetTpcPartitionMode_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdFbGetCompbitStoreInfo_FNPTR(pDevice) pDevice->__deviceCtrlCmdFbGetCompbitStoreInfo__ #define deviceCtrlCmdFbGetCompbitStoreInfo(pDevice, pCompbitStoreParams) deviceCtrlCmdFbGetCompbitStoreInfo_DISPATCH(pDevice, pCompbitStoreParams) +#define deviceCtrlCmdFbGetCaps_FNPTR(pDevice) pDevice->__deviceCtrlCmdFbGetCaps__ #define deviceCtrlCmdFbGetCaps(pDevice, pFbCapsParams) deviceCtrlCmdFbGetCaps_DISPATCH(pDevice, pFbCapsParams) +#define deviceCtrlCmdFbGetCapsV2_FNPTR(pDevice) pDevice->__deviceCtrlCmdFbGetCapsV2__ #define deviceCtrlCmdFbGetCapsV2(pDevice, pFbCapsParams) deviceCtrlCmdFbGetCapsV2_DISPATCH(pDevice, pFbCapsParams) +#define deviceCtrlCmdSetDefaultVidmemPhysicality_FNPTR(pDevice) pDevice->__deviceCtrlCmdSetDefaultVidmemPhysicality__ #define deviceCtrlCmdSetDefaultVidmemPhysicality(pDevice, pParams) deviceCtrlCmdSetDefaultVidmemPhysicality_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdFifoGetCaps_FNPTR(pDevice) pDevice->__deviceCtrlCmdFifoGetCaps__ #define deviceCtrlCmdFifoGetCaps(pDevice, pFifoCapsParams) deviceCtrlCmdFifoGetCaps_DISPATCH(pDevice, pFifoCapsParams) +#define deviceCtrlCmdFifoGetCapsV2_FNPTR(pDevice) pDevice->__deviceCtrlCmdFifoGetCapsV2__ #define deviceCtrlCmdFifoGetCapsV2(pDevice, pFifoCapsParams) deviceCtrlCmdFifoGetCapsV2_DISPATCH(pDevice, pFifoCapsParams) +#define deviceCtrlCmdFifoStartSelectedChannels_FNPTR(pDevice) pDevice->__deviceCtrlCmdFifoStartSelectedChannels__ #define deviceCtrlCmdFifoStartSelectedChannels(pDevice, pStartSel) deviceCtrlCmdFifoStartSelectedChannels_DISPATCH(pDevice, pStartSel) +#define deviceCtrlCmdFifoGetEngineContextProperties_FNPTR(pDevice) pDevice->__deviceCtrlCmdFifoGetEngineContextProperties__ #define deviceCtrlCmdFifoGetEngineContextProperties(pDevice, pParams) deviceCtrlCmdFifoGetEngineContextProperties_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdFifoGetEngineContextProperties_HAL(pDevice, pParams) deviceCtrlCmdFifoGetEngineContextProperties_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdFifoStopRunlist_FNPTR(pDevice) pDevice->__deviceCtrlCmdFifoStopRunlist__ #define deviceCtrlCmdFifoStopRunlist(pDevice, pStopRunlistParams) deviceCtrlCmdFifoStopRunlist_DISPATCH(pDevice, pStopRunlistParams) +#define deviceCtrlCmdFifoStartRunlist_FNPTR(pDevice) pDevice->__deviceCtrlCmdFifoStartRunlist__ #define deviceCtrlCmdFifoStartRunlist(pDevice, pStartRunlistParams) deviceCtrlCmdFifoStartRunlist_DISPATCH(pDevice, pStartRunlistParams) +#define deviceCtrlCmdFifoGetChannelList_FNPTR(pDevice) pDevice->__deviceCtrlCmdFifoGetChannelList__ #define deviceCtrlCmdFifoGetChannelList(pDevice, pChannelParams) deviceCtrlCmdFifoGetChannelList_DISPATCH(pDevice, pChannelParams) +#define deviceCtrlCmdFifoGetLatencyBufferSize_FNPTR(pDevice) pDevice->__deviceCtrlCmdFifoGetLatencyBufferSize__ #define deviceCtrlCmdFifoGetLatencyBufferSize(pDevice, pGetLatencyBufferSizeParams) deviceCtrlCmdFifoGetLatencyBufferSize_DISPATCH(pDevice, pGetLatencyBufferSizeParams) +#define deviceCtrlCmdFifoGetLatencyBufferSize_HAL(pDevice, pGetLatencyBufferSizeParams) deviceCtrlCmdFifoGetLatencyBufferSize_DISPATCH(pDevice, pGetLatencyBufferSizeParams) +#define deviceCtrlCmdFifoSetChannelProperties_FNPTR(pDevice) pDevice->__deviceCtrlCmdFifoSetChannelProperties__ #define deviceCtrlCmdFifoSetChannelProperties(pDevice, pSetChannelPropertiesParams) deviceCtrlCmdFifoSetChannelProperties_DISPATCH(pDevice, pSetChannelPropertiesParams) +#define deviceCtrlCmdFifoIdleChannels_FNPTR(pDevice) pDevice->__deviceCtrlCmdFifoIdleChannels__ #define deviceCtrlCmdFifoIdleChannels(pDevice, pParams) deviceCtrlCmdFifoIdleChannels_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdHostGetCaps_FNPTR(pDevice) pDevice->__deviceCtrlCmdHostGetCaps__ #define deviceCtrlCmdHostGetCaps(pDevice, pHostCapsParams) deviceCtrlCmdHostGetCaps_DISPATCH(pDevice, pHostCapsParams) +#define deviceCtrlCmdHostGetCapsV2_FNPTR(pDevice) pDevice->__deviceCtrlCmdHostGetCapsV2__ #define deviceCtrlCmdHostGetCapsV2(pDevice, pHostCapsParamsV2) deviceCtrlCmdHostGetCapsV2_DISPATCH(pDevice, pHostCapsParamsV2) +#define deviceCtrlCmdKPerfCudaLimitSetControl_FNPTR(pDevice) pDevice->__deviceCtrlCmdKPerfCudaLimitSetControl__ #define deviceCtrlCmdKPerfCudaLimitSetControl(pDevice, pParams) deviceCtrlCmdKPerfCudaLimitSetControl_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdInternalPerfCudaLimitSetControl_FNPTR(pDevice) pDevice->__deviceCtrlCmdInternalPerfCudaLimitSetControl__ #define deviceCtrlCmdInternalPerfCudaLimitSetControl(pDevice, pParams) deviceCtrlCmdInternalPerfCudaLimitSetControl_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdInternalPerfCudaLimitDisable_FNPTR(pDevice) pDevice->__deviceCtrlCmdInternalPerfCudaLimitDisable__ #define deviceCtrlCmdInternalPerfCudaLimitDisable(pDevice) deviceCtrlCmdInternalPerfCudaLimitDisable_DISPATCH(pDevice) +#define deviceCtrlCmdGpuGetClasslist_FNPTR(pDevice) pDevice->__deviceCtrlCmdGpuGetClasslist__ #define deviceCtrlCmdGpuGetClasslist(pDevice, pClassListParams) deviceCtrlCmdGpuGetClasslist_DISPATCH(pDevice, pClassListParams) +#define deviceCtrlCmdGpuGetClasslistV2_FNPTR(pDevice) pDevice->__deviceCtrlCmdGpuGetClasslistV2__ #define deviceCtrlCmdGpuGetClasslistV2(pDevice, pParams) deviceCtrlCmdGpuGetClasslistV2_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdGpuGetNumSubdevices_FNPTR(pDevice) pDevice->__deviceCtrlCmdGpuGetNumSubdevices__ #define deviceCtrlCmdGpuGetNumSubdevices(pDevice, pSubDeviceCountParams) deviceCtrlCmdGpuGetNumSubdevices_DISPATCH(pDevice, pSubDeviceCountParams) +#define deviceCtrlCmdGpuModifyGpuSwStatePersistence_FNPTR(pDevice) pDevice->__deviceCtrlCmdGpuModifyGpuSwStatePersistence__ #define deviceCtrlCmdGpuModifyGpuSwStatePersistence(pDevice, pParams) deviceCtrlCmdGpuModifyGpuSwStatePersistence_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdGpuQueryGpuSwStatePersistence_FNPTR(pDevice) pDevice->__deviceCtrlCmdGpuQueryGpuSwStatePersistence__ #define deviceCtrlCmdGpuQueryGpuSwStatePersistence(pDevice, pParams) deviceCtrlCmdGpuQueryGpuSwStatePersistence_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdGpuGetVirtualizationMode_FNPTR(pDevice) pDevice->__deviceCtrlCmdGpuGetVirtualizationMode__ #define deviceCtrlCmdGpuGetVirtualizationMode(pDevice, pParams) deviceCtrlCmdGpuGetVirtualizationMode_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdGpuSetVgpuVfBar1Size_FNPTR(pDevice) pDevice->__deviceCtrlCmdGpuSetVgpuVfBar1Size__ #define deviceCtrlCmdGpuSetVgpuVfBar1Size(pDevice, pParams) deviceCtrlCmdGpuSetVgpuVfBar1Size_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdGpuGetSparseTextureComputeMode_FNPTR(pDevice) pDevice->__deviceCtrlCmdGpuGetSparseTextureComputeMode__ #define deviceCtrlCmdGpuGetSparseTextureComputeMode(pDevice, pModeParams) deviceCtrlCmdGpuGetSparseTextureComputeMode_DISPATCH(pDevice, pModeParams) +#define deviceCtrlCmdGpuSetSparseTextureComputeMode_FNPTR(pDevice) pDevice->__deviceCtrlCmdGpuSetSparseTextureComputeMode__ #define deviceCtrlCmdGpuSetSparseTextureComputeMode(pDevice, pModeParams) deviceCtrlCmdGpuSetSparseTextureComputeMode_DISPATCH(pDevice, pModeParams) +#define deviceCtrlCmdGpuGetVgxCaps_FNPTR(pDevice) pDevice->__deviceCtrlCmdGpuGetVgxCaps__ #define deviceCtrlCmdGpuGetVgxCaps(pDevice, pParams) deviceCtrlCmdGpuGetVgxCaps_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdGpuGetBrandCaps_FNPTR(pDevice) pDevice->__deviceCtrlCmdGpuGetBrandCaps__ #define deviceCtrlCmdGpuGetBrandCaps(pDevice, pParams) deviceCtrlCmdGpuGetBrandCaps_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdGpuGetBrandCaps_HAL(pDevice, pParams) deviceCtrlCmdGpuGetBrandCaps_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdGpuVirtualizationSwitchToVga_FNPTR(pDevice) pDevice->__deviceCtrlCmdGpuVirtualizationSwitchToVga__ #define deviceCtrlCmdGpuVirtualizationSwitchToVga(pDevice) deviceCtrlCmdGpuVirtualizationSwitchToVga_DISPATCH(pDevice) +#define deviceCtrlCmdGpuSetVgpuHeterogeneousMode_FNPTR(pDevice) pDevice->__deviceCtrlCmdGpuSetVgpuHeterogeneousMode__ #define deviceCtrlCmdGpuSetVgpuHeterogeneousMode(pDevice, pParams) deviceCtrlCmdGpuSetVgpuHeterogeneousMode_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdGpuGetVgpuHeterogeneousMode_FNPTR(pDevice) pDevice->__deviceCtrlCmdGpuGetVgpuHeterogeneousMode__ #define deviceCtrlCmdGpuGetVgpuHeterogeneousMode(pDevice, pParams) deviceCtrlCmdGpuGetVgpuHeterogeneousMode_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdGpuGetSriovCaps_FNPTR(pDevice) pDevice->__deviceCtrlCmdGpuGetSriovCaps__ #define deviceCtrlCmdGpuGetSriovCaps(pDevice, pParams) deviceCtrlCmdGpuGetSriovCaps_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdGpuGetFindSubDeviceHandle_FNPTR(pDevice) pDevice->__deviceCtrlCmdGpuGetFindSubDeviceHandle__ #define deviceCtrlCmdGpuGetFindSubDeviceHandle(pDevice, pParams) deviceCtrlCmdGpuGetFindSubDeviceHandle_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdMsencGetCapsV2_FNPTR(pDevice) pDevice->__deviceCtrlCmdMsencGetCapsV2__ #define deviceCtrlCmdMsencGetCapsV2(pDevice, pMsencCapsParams) deviceCtrlCmdMsencGetCapsV2_DISPATCH(pDevice, pMsencCapsParams) #define deviceCtrlCmdMsencGetCapsV2_HAL(pDevice, pMsencCapsParams) deviceCtrlCmdMsencGetCapsV2_DISPATCH(pDevice, pMsencCapsParams) +#define deviceCtrlCmdBspGetCapsV2_FNPTR(pDevice) pDevice->__deviceCtrlCmdBspGetCapsV2__ #define deviceCtrlCmdBspGetCapsV2(pDevice, pBspCapParams) deviceCtrlCmdBspGetCapsV2_DISPATCH(pDevice, pBspCapParams) #define deviceCtrlCmdBspGetCapsV2_HAL(pDevice, pBspCapParams) deviceCtrlCmdBspGetCapsV2_DISPATCH(pDevice, pBspCapParams) +#define deviceCtrlCmdNvjpgGetCapsV2_FNPTR(pDevice) pDevice->__deviceCtrlCmdNvjpgGetCapsV2__ #define deviceCtrlCmdNvjpgGetCapsV2(pDevice, pNvjpgCapsParams) deviceCtrlCmdNvjpgGetCapsV2_DISPATCH(pDevice, pNvjpgCapsParams) #define deviceCtrlCmdNvjpgGetCapsV2_HAL(pDevice, pNvjpgCapsParams) deviceCtrlCmdNvjpgGetCapsV2_DISPATCH(pDevice, pNvjpgCapsParams) +#define deviceCtrlCmdOsUnixVTSwitch_FNPTR(pDevice) pDevice->__deviceCtrlCmdOsUnixVTSwitch__ #define deviceCtrlCmdOsUnixVTSwitch(pDevice, pParams) deviceCtrlCmdOsUnixVTSwitch_DISPATCH(pDevice, pParams) +#define deviceCtrlCmdOsUnixVTGetFBInfo_FNPTR(pDevice) pDevice->__deviceCtrlCmdOsUnixVTGetFBInfo__ #define deviceCtrlCmdOsUnixVTGetFBInfo(pDevice, pParams) deviceCtrlCmdOsUnixVTGetFBInfo_DISPATCH(pDevice, pParams) +#define deviceMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define deviceMap(pGpuResource, pCallContext, pParams, pCpuMapping) deviceMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define deviceUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define deviceUnmap(pGpuResource, pCallContext, pCpuMapping) deviceUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define deviceShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define deviceShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) deviceShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define deviceCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) deviceCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define deviceMapTo(pResource, pParams) deviceMapTo_DISPATCH(pResource, pParams) -#define deviceGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) deviceGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define deviceGetRefCount(pResource) deviceGetRefCount_DISPATCH(pResource) -#define deviceAddAdditionalDependants(pClient, pResource, pReference) deviceAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define deviceControl_Prologue(pResource, pCallContext, pParams) deviceControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define deviceGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define deviceGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) deviceGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define deviceUnmapFrom(pResource, pParams) deviceUnmapFrom_DISPATCH(pResource, pParams) -#define deviceControl_Epilogue(pResource, pCallContext, pParams) deviceControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define deviceGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define deviceGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) deviceGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define deviceGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define deviceGetInternalObjectHandle(pGpuResource) deviceGetInternalObjectHandle_DISPATCH(pGpuResource) -#define deviceUnmap(pGpuResource, pCallContext, pCpuMapping) deviceUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define deviceAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define deviceAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) deviceAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define deviceGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define deviceGetMemInterMapParams(pRmResource, pParams) deviceGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define deviceCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define deviceCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) deviceCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define deviceGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define deviceGetMemoryMappingDescriptor(pRmResource, ppMemDesc) deviceGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define deviceControlFilter(pResource, pCallContext, pParams) deviceControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define deviceControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define deviceControlSerialization_Prologue(pResource, pCallContext, pParams) deviceControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define deviceControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define deviceControlSerialization_Epilogue(pResource, pCallContext, pParams) deviceControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define deviceControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define deviceControl_Prologue(pResource, pCallContext, pParams) deviceControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define deviceControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define deviceControl_Epilogue(pResource, pCallContext, pParams) deviceControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define deviceCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define deviceCanCopy(pResource) deviceCanCopy_DISPATCH(pResource) -#define deviceIsPartialUnmapSupported(pResource) deviceIsPartialUnmapSupported_DISPATCH(pResource) -#define devicePreDestruct(pResource) devicePreDestruct_DISPATCH(pResource) +#define deviceIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define deviceIsDuplicate(pResource, hMemory, pDuplicate) deviceIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define deviceControlSerialization_Epilogue(pResource, pCallContext, pParams) deviceControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define deviceMap(pGpuResource, pCallContext, pParams, pCpuMapping) deviceMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define deviceAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) deviceAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS deviceControl_IMPL(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); +#define devicePreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define devicePreDestruct(pResource) devicePreDestruct_DISPATCH(pResource) +#define deviceControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define deviceControlFilter(pResource, pCallContext, pParams) deviceControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define deviceIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define deviceIsPartialUnmapSupported(pResource) deviceIsPartialUnmapSupported_DISPATCH(pResource) +#define deviceMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define deviceMapTo(pResource, pParams) deviceMapTo_DISPATCH(pResource, pParams) +#define deviceUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define deviceUnmapFrom(pResource, pParams) deviceUnmapFrom_DISPATCH(pResource, pParams) +#define deviceGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define deviceGetRefCount(pResource) deviceGetRefCount_DISPATCH(pResource) +#define deviceAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define deviceAddAdditionalDependants(pClient, pResource, pReference) deviceAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS deviceControl_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__deviceControl__(pResource, pCallContext, pParams); } -NV_STATUS deviceInternalControlForward_IMPL(struct Device *pDevice, NvU32 command, void *pParams, NvU32 size); - static inline NV_STATUS deviceInternalControlForward_DISPATCH(struct Device *pDevice, NvU32 command, void *pParams, NvU32 size) { return pDevice->__deviceInternalControlForward__(pDevice, command, pParams, size); } -NV_STATUS deviceCtrlCmdBifGetDmaBaseSysmemAddr_IMPL(struct Device *pDevice, NV0080_CTRL_BIF_GET_DMA_BASE_SYSMEM_ADDR_PARAMS *pBifDmaBaseSysmemParams); - static inline NV_STATUS deviceCtrlCmdBifGetDmaBaseSysmemAddr_DISPATCH(struct Device *pDevice, NV0080_CTRL_BIF_GET_DMA_BASE_SYSMEM_ADDR_PARAMS *pBifDmaBaseSysmemParams) { return pDevice->__deviceCtrlCmdBifGetDmaBaseSysmemAddr__(pDevice, pBifDmaBaseSysmemParams); } -NV_STATUS deviceCtrlCmdBifAspmFeatureSupported_IMPL(struct Device *pDevice, NV0080_CTRL_BIF_SET_ASPM_FEATURE_PARAMS *pBifAspmParams); - static inline NV_STATUS deviceCtrlCmdBifAspmFeatureSupported_DISPATCH(struct Device *pDevice, NV0080_CTRL_BIF_SET_ASPM_FEATURE_PARAMS *pBifAspmParams) { return pDevice->__deviceCtrlCmdBifAspmFeatureSupported__(pDevice, pBifAspmParams); } -NV_STATUS deviceCtrlCmdBifAspmCyaUpdate_IMPL(struct Device *pDevice, NV0080_CTRL_BIF_ASPM_CYA_UPDATE_PARAMS *pBifAspmCyaParams); - static inline NV_STATUS deviceCtrlCmdBifAspmCyaUpdate_DISPATCH(struct Device *pDevice, NV0080_CTRL_BIF_ASPM_CYA_UPDATE_PARAMS *pBifAspmCyaParams) { return pDevice->__deviceCtrlCmdBifAspmCyaUpdate__(pDevice, pBifAspmCyaParams); } -NV_STATUS deviceCtrlCmdBifGetPciePowerControlMask_IMPL(struct Device *pDevice, NV0080_CTRL_CMD_BIF_GET_PCIE_POWER_CONTROL_MASK_PARAMS *pBifPciePowerControlParams); - static inline NV_STATUS deviceCtrlCmdBifGetPciePowerControlMask_DISPATCH(struct Device *pDevice, NV0080_CTRL_CMD_BIF_GET_PCIE_POWER_CONTROL_MASK_PARAMS *pBifPciePowerControlParams) { return pDevice->__deviceCtrlCmdBifGetPciePowerControlMask__(pDevice, pBifPciePowerControlParams); } -NV_STATUS deviceCtrlCmdDmaGetPteInfo_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdDmaGetPteInfo_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams) { return pDevice->__deviceCtrlCmdDmaGetPteInfo__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdDmaUpdatePde2_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_UPDATE_PDE_2_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdDmaUpdatePde2_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_UPDATE_PDE_2_PARAMS *pParams) { return pDevice->__deviceCtrlCmdDmaUpdatePde2__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdDmaSetPageDirectory_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_SET_PAGE_DIRECTORY_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdDmaSetPageDirectory_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_SET_PAGE_DIRECTORY_PARAMS *pParams) { return pDevice->__deviceCtrlCmdDmaSetPageDirectory__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdDmaUnsetPageDirectory_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_UNSET_PAGE_DIRECTORY_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdDmaUnsetPageDirectory_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_UNSET_PAGE_DIRECTORY_PARAMS *pParams) { return pDevice->__deviceCtrlCmdDmaUnsetPageDirectory__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdDmaFlush_VF(struct Device *pDevice, NV0080_CTRL_DMA_FLUSH_PARAMS *flushParams); - -static inline NV_STATUS deviceCtrlCmdDmaFlush_5baef9(struct Device *pDevice, NV0080_CTRL_DMA_FLUSH_PARAMS *flushParams) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - static inline NV_STATUS deviceCtrlCmdDmaFlush_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_FLUSH_PARAMS *flushParams) { return pDevice->__deviceCtrlCmdDmaFlush__(pDevice, flushParams); } -NV_STATUS deviceCtrlCmdDmaAdvSchedGetVaCaps_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdDmaAdvSchedGetVaCaps_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) { return pDevice->__deviceCtrlCmdDmaAdvSchedGetVaCaps__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdDmaGetPdeInfo_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdDmaGetPdeInfo_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { return pDevice->__deviceCtrlCmdDmaGetPdeInfo__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdDmaSetPteInfo_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdDmaSetPteInfo_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { return pDevice->__deviceCtrlCmdDmaSetPteInfo__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdDmaInvalidateTLB_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_INVALIDATE_TLB_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdDmaInvalidateTLB_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_INVALIDATE_TLB_PARAMS *pParams) { return pDevice->__deviceCtrlCmdDmaInvalidateTLB__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdDmaGetCaps_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_GET_CAPS_PARAMS *pDmaCapsParams); - static inline NV_STATUS deviceCtrlCmdDmaGetCaps_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_GET_CAPS_PARAMS *pDmaCapsParams) { return pDevice->__deviceCtrlCmdDmaGetCaps__(pDevice, pDmaCapsParams); } -NV_STATUS deviceCtrlCmdDmaSetVASpaceSize_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_SET_VA_SPACE_SIZE_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdDmaSetVASpaceSize_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_SET_VA_SPACE_SIZE_PARAMS *pParams) { return pDevice->__deviceCtrlCmdDmaSetVASpaceSize__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdDmaEnablePrivilegedRange_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_ENABLE_PRIVILEGED_RANGE_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdDmaEnablePrivilegedRange_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_ENABLE_PRIVILEGED_RANGE_PARAMS *pParams) { return pDevice->__deviceCtrlCmdDmaEnablePrivilegedRange__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdDmaSetDefaultVASpace_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_SET_DEFAULT_VASPACE_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdDmaSetDefaultVASpace_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_SET_DEFAULT_VASPACE_PARAMS *pParams) { return pDevice->__deviceCtrlCmdDmaSetDefaultVASpace__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdKGrGetCaps_IMPL(struct Device *pDevice, NV0080_CTRL_GR_GET_CAPS_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdKGrGetCaps_DISPATCH(struct Device *pDevice, NV0080_CTRL_GR_GET_CAPS_PARAMS *pParams) { return pDevice->__deviceCtrlCmdKGrGetCaps__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdKGrGetCapsV2_IMPL(struct Device *pDevice, NV0080_CTRL_GR_GET_CAPS_V2_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdKGrGetCapsV2_DISPATCH(struct Device *pDevice, NV0080_CTRL_GR_GET_CAPS_V2_PARAMS *pParams) { return pDevice->__deviceCtrlCmdKGrGetCapsV2__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdKGrGetInfo_IMPL(struct Device *pDevice, NV0080_CTRL_GR_GET_INFO_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdKGrGetInfo_DISPATCH(struct Device *pDevice, NV0080_CTRL_GR_GET_INFO_PARAMS *pParams) { return pDevice->__deviceCtrlCmdKGrGetInfo__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdKGrGetInfoV2_IMPL(struct Device *pDevice, NV0080_CTRL_GR_GET_INFO_V2_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdKGrGetInfoV2_DISPATCH(struct Device *pDevice, NV0080_CTRL_GR_GET_INFO_V2_PARAMS *pParams) { return pDevice->__deviceCtrlCmdKGrGetInfoV2__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdKGrGetTpcPartitionMode_IMPL(struct Device *pDevice, NV0080_CTRL_GR_TPC_PARTITION_MODE_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdKGrGetTpcPartitionMode_DISPATCH(struct Device *pDevice, NV0080_CTRL_GR_TPC_PARTITION_MODE_PARAMS *pParams) { return pDevice->__deviceCtrlCmdKGrGetTpcPartitionMode__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdKGrSetTpcPartitionMode_IMPL(struct Device *pDevice, NV0080_CTRL_GR_TPC_PARTITION_MODE_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdKGrSetTpcPartitionMode_DISPATCH(struct Device *pDevice, NV0080_CTRL_GR_TPC_PARTITION_MODE_PARAMS *pParams) { return pDevice->__deviceCtrlCmdKGrSetTpcPartitionMode__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdFbGetCompbitStoreInfo_IMPL(struct Device *pDevice, NV0080_CTRL_FB_GET_COMPBIT_STORE_INFO_PARAMS *pCompbitStoreParams); - static inline NV_STATUS deviceCtrlCmdFbGetCompbitStoreInfo_DISPATCH(struct Device *pDevice, NV0080_CTRL_FB_GET_COMPBIT_STORE_INFO_PARAMS *pCompbitStoreParams) { return pDevice->__deviceCtrlCmdFbGetCompbitStoreInfo__(pDevice, pCompbitStoreParams); } -NV_STATUS deviceCtrlCmdFbGetCaps_IMPL(struct Device *pDevice, NV0080_CTRL_FB_GET_CAPS_PARAMS *pFbCapsParams); - static inline NV_STATUS deviceCtrlCmdFbGetCaps_DISPATCH(struct Device *pDevice, NV0080_CTRL_FB_GET_CAPS_PARAMS *pFbCapsParams) { return pDevice->__deviceCtrlCmdFbGetCaps__(pDevice, pFbCapsParams); } -NV_STATUS deviceCtrlCmdFbGetCapsV2_IMPL(struct Device *pDevice, NV0080_CTRL_FB_GET_CAPS_V2_PARAMS *pFbCapsParams); - static inline NV_STATUS deviceCtrlCmdFbGetCapsV2_DISPATCH(struct Device *pDevice, NV0080_CTRL_FB_GET_CAPS_V2_PARAMS *pFbCapsParams) { return pDevice->__deviceCtrlCmdFbGetCapsV2__(pDevice, pFbCapsParams); } -NV_STATUS deviceCtrlCmdSetDefaultVidmemPhysicality_IMPL(struct Device *pDevice, NV0080_CTRL_FB_SET_DEFAULT_VIDMEM_PHYSICALITY_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdSetDefaultVidmemPhysicality_DISPATCH(struct Device *pDevice, NV0080_CTRL_FB_SET_DEFAULT_VIDMEM_PHYSICALITY_PARAMS *pParams) { return pDevice->__deviceCtrlCmdSetDefaultVidmemPhysicality__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdFifoGetCaps_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_GET_CAPS_PARAMS *pFifoCapsParams); - static inline NV_STATUS deviceCtrlCmdFifoGetCaps_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_GET_CAPS_PARAMS *pFifoCapsParams) { return pDevice->__deviceCtrlCmdFifoGetCaps__(pDevice, pFifoCapsParams); } -NV_STATUS deviceCtrlCmdFifoGetCapsV2_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_GET_CAPS_V2_PARAMS *pFifoCapsParams); - static inline NV_STATUS deviceCtrlCmdFifoGetCapsV2_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_GET_CAPS_V2_PARAMS *pFifoCapsParams) { return pDevice->__deviceCtrlCmdFifoGetCapsV2__(pDevice, pFifoCapsParams); } -NV_STATUS deviceCtrlCmdFifoStartSelectedChannels_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS *pStartSel); - static inline NV_STATUS deviceCtrlCmdFifoStartSelectedChannels_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS *pStartSel) { return pDevice->__deviceCtrlCmdFifoStartSelectedChannels__(pDevice, pStartSel); } -NV_STATUS deviceCtrlCmdFifoGetEngineContextProperties_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdFifoGetEngineContextProperties_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *pParams) { return pDevice->__deviceCtrlCmdFifoGetEngineContextProperties__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdFifoStopRunlist_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_STOP_RUNLIST_PARAMS *pStopRunlistParams); - static inline NV_STATUS deviceCtrlCmdFifoStopRunlist_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_STOP_RUNLIST_PARAMS *pStopRunlistParams) { return pDevice->__deviceCtrlCmdFifoStopRunlist__(pDevice, pStopRunlistParams); } -NV_STATUS deviceCtrlCmdFifoStartRunlist_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_START_RUNLIST_PARAMS *pStartRunlistParams); - static inline NV_STATUS deviceCtrlCmdFifoStartRunlist_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_START_RUNLIST_PARAMS *pStartRunlistParams) { return pDevice->__deviceCtrlCmdFifoStartRunlist__(pDevice, pStartRunlistParams); } -NV_STATUS deviceCtrlCmdFifoGetChannelList_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS *pChannelParams); - static inline NV_STATUS deviceCtrlCmdFifoGetChannelList_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS *pChannelParams) { return pDevice->__deviceCtrlCmdFifoGetChannelList__(pDevice, pChannelParams); } -NV_STATUS deviceCtrlCmdFifoGetLatencyBufferSize_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_GET_LATENCY_BUFFER_SIZE_PARAMS *pGetLatencyBufferSizeParams); - static inline NV_STATUS deviceCtrlCmdFifoGetLatencyBufferSize_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_GET_LATENCY_BUFFER_SIZE_PARAMS *pGetLatencyBufferSizeParams) { return pDevice->__deviceCtrlCmdFifoGetLatencyBufferSize__(pDevice, pGetLatencyBufferSizeParams); } -NV_STATUS deviceCtrlCmdFifoSetChannelProperties_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_SET_CHANNEL_PROPERTIES_PARAMS *pSetChannelPropertiesParams); - static inline NV_STATUS deviceCtrlCmdFifoSetChannelProperties_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_SET_CHANNEL_PROPERTIES_PARAMS *pSetChannelPropertiesParams) { return pDevice->__deviceCtrlCmdFifoSetChannelProperties__(pDevice, pSetChannelPropertiesParams); } -NV_STATUS deviceCtrlCmdFifoIdleChannels_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_IDLE_CHANNELS_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdFifoIdleChannels_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_IDLE_CHANNELS_PARAMS *pParams) { return pDevice->__deviceCtrlCmdFifoIdleChannels__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdHostGetCaps_IMPL(struct Device *pDevice, NV0080_CTRL_HOST_GET_CAPS_PARAMS *pHostCapsParams); - static inline NV_STATUS deviceCtrlCmdHostGetCaps_DISPATCH(struct Device *pDevice, NV0080_CTRL_HOST_GET_CAPS_PARAMS *pHostCapsParams) { return pDevice->__deviceCtrlCmdHostGetCaps__(pDevice, pHostCapsParams); } -NV_STATUS deviceCtrlCmdHostGetCapsV2_IMPL(struct Device *pDevice, NV0080_CTRL_HOST_GET_CAPS_V2_PARAMS *pHostCapsParamsV2); - static inline NV_STATUS deviceCtrlCmdHostGetCapsV2_DISPATCH(struct Device *pDevice, NV0080_CTRL_HOST_GET_CAPS_V2_PARAMS *pHostCapsParamsV2) { return pDevice->__deviceCtrlCmdHostGetCapsV2__(pDevice, pHostCapsParamsV2); } -NV_STATUS deviceCtrlCmdKPerfCudaLimitSetControl_IMPL(struct Device *pDevice, NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdKPerfCudaLimitSetControl_DISPATCH(struct Device *pDevice, NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS *pParams) { return pDevice->__deviceCtrlCmdKPerfCudaLimitSetControl__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdInternalPerfCudaLimitSetControl_IMPL(struct Device *pDevice, NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdInternalPerfCudaLimitSetControl_DISPATCH(struct Device *pDevice, NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS *pParams) { return pDevice->__deviceCtrlCmdInternalPerfCudaLimitSetControl__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdInternalPerfCudaLimitDisable_IMPL(struct Device *pDevice); - static inline NV_STATUS deviceCtrlCmdInternalPerfCudaLimitDisable_DISPATCH(struct Device *pDevice) { return pDevice->__deviceCtrlCmdInternalPerfCudaLimitDisable__(pDevice); } -NV_STATUS deviceCtrlCmdGpuGetClasslist_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS *pClassListParams); - static inline NV_STATUS deviceCtrlCmdGpuGetClasslist_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS *pClassListParams) { return pDevice->__deviceCtrlCmdGpuGetClasslist__(pDevice, pClassListParams); } -NV_STATUS deviceCtrlCmdGpuGetClasslistV2_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_CLASSLIST_V2_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdGpuGetClasslistV2_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_GET_CLASSLIST_V2_PARAMS *pParams) { return pDevice->__deviceCtrlCmdGpuGetClasslistV2__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdGpuGetNumSubdevices_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_NUM_SUBDEVICES_PARAMS *pSubDeviceCountParams); - static inline NV_STATUS deviceCtrlCmdGpuGetNumSubdevices_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_GET_NUM_SUBDEVICES_PARAMS *pSubDeviceCountParams) { return pDevice->__deviceCtrlCmdGpuGetNumSubdevices__(pDevice, pSubDeviceCountParams); } -NV_STATUS deviceCtrlCmdGpuModifyGpuSwStatePersistence_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_MODIFY_SW_STATE_PERSISTENCE_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdGpuModifyGpuSwStatePersistence_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_MODIFY_SW_STATE_PERSISTENCE_PARAMS *pParams) { return pDevice->__deviceCtrlCmdGpuModifyGpuSwStatePersistence__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdGpuQueryGpuSwStatePersistence_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_QUERY_SW_STATE_PERSISTENCE_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdGpuQueryGpuSwStatePersistence_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_QUERY_SW_STATE_PERSISTENCE_PARAMS *pParams) { return pDevice->__deviceCtrlCmdGpuQueryGpuSwStatePersistence__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdGpuGetVirtualizationMode_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_VIRTUALIZATION_MODE_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdGpuGetVirtualizationMode_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_GET_VIRTUALIZATION_MODE_PARAMS *pParams) { return pDevice->__deviceCtrlCmdGpuGetVirtualizationMode__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdGpuSetVgpuVfBar1Size_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdGpuSetVgpuVfBar1Size_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS *pParams) { return pDevice->__deviceCtrlCmdGpuSetVgpuVfBar1Size__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdGpuGetSparseTextureComputeMode_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_SPARSE_TEXTURE_COMPUTE_MODE_PARAMS *pModeParams); - static inline NV_STATUS deviceCtrlCmdGpuGetSparseTextureComputeMode_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_GET_SPARSE_TEXTURE_COMPUTE_MODE_PARAMS *pModeParams) { return pDevice->__deviceCtrlCmdGpuGetSparseTextureComputeMode__(pDevice, pModeParams); } -NV_STATUS deviceCtrlCmdGpuSetSparseTextureComputeMode_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_SET_SPARSE_TEXTURE_COMPUTE_MODE_PARAMS *pModeParams); - static inline NV_STATUS deviceCtrlCmdGpuSetSparseTextureComputeMode_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_SET_SPARSE_TEXTURE_COMPUTE_MODE_PARAMS *pModeParams) { return pDevice->__deviceCtrlCmdGpuSetSparseTextureComputeMode__(pDevice, pModeParams); } -NV_STATUS deviceCtrlCmdGpuGetVgxCaps_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_VGX_CAPS_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdGpuGetVgxCaps_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_GET_VGX_CAPS_PARAMS *pParams) { return pDevice->__deviceCtrlCmdGpuGetVgxCaps__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdGpuGetBrandCaps_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_BRAND_CAPS_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdGpuGetBrandCaps_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_GET_BRAND_CAPS_PARAMS *pParams) { return pDevice->__deviceCtrlCmdGpuGetBrandCaps__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdGpuVirtualizationSwitchToVga_IMPL(struct Device *pDevice); - static inline NV_STATUS deviceCtrlCmdGpuVirtualizationSwitchToVga_DISPATCH(struct Device *pDevice) { return pDevice->__deviceCtrlCmdGpuVirtualizationSwitchToVga__(pDevice); } -NV_STATUS deviceCtrlCmdGpuSetVgpuHeterogeneousMode_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_SET_VGPU_HETEROGENEOUS_MODE_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdGpuSetVgpuHeterogeneousMode_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_SET_VGPU_HETEROGENEOUS_MODE_PARAMS *pParams) { return pDevice->__deviceCtrlCmdGpuSetVgpuHeterogeneousMode__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdGpuGetVgpuHeterogeneousMode_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_VGPU_HETEROGENEOUS_MODE_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdGpuGetVgpuHeterogeneousMode_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_GET_VGPU_HETEROGENEOUS_MODE_PARAMS *pParams) { return pDevice->__deviceCtrlCmdGpuGetVgpuHeterogeneousMode__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdGpuGetSriovCaps_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdGpuGetSriovCaps_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS *pParams) { return pDevice->__deviceCtrlCmdGpuGetSriovCaps__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdGpuGetFindSubDeviceHandle_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_FIND_SUBDEVICE_HANDLE_PARAM *pParams); - static inline NV_STATUS deviceCtrlCmdGpuGetFindSubDeviceHandle_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_FIND_SUBDEVICE_HANDLE_PARAM *pParams) { return pDevice->__deviceCtrlCmdGpuGetFindSubDeviceHandle__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdMsencGetCapsV2_VF(struct Device *pDevice, NV0080_CTRL_MSENC_GET_CAPS_V2_PARAMS *pMsencCapsParams); - -static inline NV_STATUS deviceCtrlCmdMsencGetCapsV2_5baef9(struct Device *pDevice, NV0080_CTRL_MSENC_GET_CAPS_V2_PARAMS *pMsencCapsParams) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - static inline NV_STATUS deviceCtrlCmdMsencGetCapsV2_DISPATCH(struct Device *pDevice, NV0080_CTRL_MSENC_GET_CAPS_V2_PARAMS *pMsencCapsParams) { return pDevice->__deviceCtrlCmdMsencGetCapsV2__(pDevice, pMsencCapsParams); } -NV_STATUS deviceCtrlCmdBspGetCapsV2_VF(struct Device *pDevice, NV0080_CTRL_BSP_GET_CAPS_PARAMS_V2 *pBspCapParams); - -static inline NV_STATUS deviceCtrlCmdBspGetCapsV2_5baef9(struct Device *pDevice, NV0080_CTRL_BSP_GET_CAPS_PARAMS_V2 *pBspCapParams) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - static inline NV_STATUS deviceCtrlCmdBspGetCapsV2_DISPATCH(struct Device *pDevice, NV0080_CTRL_BSP_GET_CAPS_PARAMS_V2 *pBspCapParams) { return pDevice->__deviceCtrlCmdBspGetCapsV2__(pDevice, pBspCapParams); } -NV_STATUS deviceCtrlCmdNvjpgGetCapsV2_VF(struct Device *pDevice, NV0080_CTRL_NVJPG_GET_CAPS_V2_PARAMS *pNvjpgCapsParams); - -static inline NV_STATUS deviceCtrlCmdNvjpgGetCapsV2_c04480(struct Device *pDevice, NV0080_CTRL_NVJPG_GET_CAPS_V2_PARAMS *pNvjpgCapsParams) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - static inline NV_STATUS deviceCtrlCmdNvjpgGetCapsV2_DISPATCH(struct Device *pDevice, NV0080_CTRL_NVJPG_GET_CAPS_V2_PARAMS *pNvjpgCapsParams) { return pDevice->__deviceCtrlCmdNvjpgGetCapsV2__(pDevice, pNvjpgCapsParams); } -NV_STATUS deviceCtrlCmdOsUnixVTSwitch_IMPL(struct Device *pDevice, NV0080_CTRL_OS_UNIX_VT_SWITCH_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdOsUnixVTSwitch_DISPATCH(struct Device *pDevice, NV0080_CTRL_OS_UNIX_VT_SWITCH_PARAMS *pParams) { return pDevice->__deviceCtrlCmdOsUnixVTSwitch__(pDevice, pParams); } -NV_STATUS deviceCtrlCmdOsUnixVTGetFBInfo_IMPL(struct Device *pDevice, NV0080_CTRL_OS_UNIX_VT_GET_FB_INFO_PARAMS *pParams); - static inline NV_STATUS deviceCtrlCmdOsUnixVTGetFBInfo_DISPATCH(struct Device *pDevice, NV0080_CTRL_OS_UNIX_VT_GET_FB_INFO_PARAMS *pParams) { return pDevice->__deviceCtrlCmdOsUnixVTGetFBInfo__(pDevice, pParams); } -static inline NvBool deviceShareCallback_DISPATCH(struct Device *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__deviceShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS deviceMap_DISPATCH(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__deviceMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS deviceCheckMemInterUnmap_DISPATCH(struct Device *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__deviceCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS deviceUnmap_DISPATCH(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__deviceUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS deviceMapTo_DISPATCH(struct Device *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__deviceMapTo__(pResource, pParams); +static inline NvBool deviceShareCallback_DISPATCH(struct Device *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__deviceShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +} + +static inline NV_STATUS deviceGetRegBaseOffsetAndSize_DISPATCH(struct Device *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__deviceGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS deviceGetMapAddrSpace_DISPATCH(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__deviceGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NvU32 deviceGetRefCount_DISPATCH(struct Device *pResource) { - return pResource->__deviceGetRefCount__(pResource); +static inline NvHandle deviceGetInternalObjectHandle_DISPATCH(struct Device *pGpuResource) { + return pGpuResource->__deviceGetInternalObjectHandle__(pGpuResource); } -static inline void deviceAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct Device *pResource, RsResourceRef *pReference) { - pResource->__deviceAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvBool deviceAccessCallback_DISPATCH(struct Device *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__deviceAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS deviceControl_Prologue_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__deviceControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS deviceGetMemInterMapParams_DISPATCH(struct Device *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__deviceGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS deviceGetRegBaseOffsetAndSize_DISPATCH(struct Device *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__deviceGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS deviceCheckMemInterUnmap_DISPATCH(struct Device *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__deviceCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS deviceUnmapFrom_DISPATCH(struct Device *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__deviceUnmapFrom__(pResource, pParams); +static inline NV_STATUS deviceGetMemoryMappingDescriptor_DISPATCH(struct Device *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__deviceGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline void deviceControl_Epilogue_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__deviceControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS deviceControlSerialization_Prologue_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__deviceControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvHandle deviceGetInternalObjectHandle_DISPATCH(struct Device *pGpuResource) { - return pGpuResource->__deviceGetInternalObjectHandle__(pGpuResource); +static inline void deviceControlSerialization_Epilogue_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__deviceControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS deviceUnmap_DISPATCH(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__deviceUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NV_STATUS deviceControl_Prologue_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__deviceControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS deviceGetMemInterMapParams_DISPATCH(struct Device *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__deviceGetMemInterMapParams__(pRmResource, pParams); +static inline void deviceControl_Epilogue_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__deviceControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS deviceGetMemoryMappingDescriptor_DISPATCH(struct Device *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__deviceGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NvBool deviceCanCopy_DISPATCH(struct Device *pResource) { + return pResource->__deviceCanCopy__(pResource); } -static inline NV_STATUS deviceControlFilter_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__deviceControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS deviceIsDuplicate_DISPATCH(struct Device *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__deviceIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS deviceControlSerialization_Prologue_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__deviceControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline void devicePreDestruct_DISPATCH(struct Device *pResource) { + pResource->__devicePreDestruct__(pResource); } -static inline NvBool deviceCanCopy_DISPATCH(struct Device *pResource) { - return pResource->__deviceCanCopy__(pResource); +static inline NV_STATUS deviceControlFilter_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__deviceControlFilter__(pResource, pCallContext, pParams); } static inline NvBool deviceIsPartialUnmapSupported_DISPATCH(struct Device *pResource) { return pResource->__deviceIsPartialUnmapSupported__(pResource); } -static inline void devicePreDestruct_DISPATCH(struct Device *pResource) { - pResource->__devicePreDestruct__(pResource); +static inline NV_STATUS deviceMapTo_DISPATCH(struct Device *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__deviceMapTo__(pResource, pParams); } -static inline NV_STATUS deviceIsDuplicate_DISPATCH(struct Device *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__deviceIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS deviceUnmapFrom_DISPATCH(struct Device *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__deviceUnmapFrom__(pResource, pParams); } -static inline void deviceControlSerialization_Epilogue_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__deviceControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 deviceGetRefCount_DISPATCH(struct Device *pResource) { + return pResource->__deviceGetRefCount__(pResource); } -static inline NV_STATUS deviceMap_DISPATCH(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__deviceMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void deviceAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct Device *pResource, RsResourceRef *pReference) { + pResource->__deviceAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NvBool deviceAccessCallback_DISPATCH(struct Device *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__deviceAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +NV_STATUS deviceControl_IMPL(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +NV_STATUS deviceInternalControlForward_IMPL(struct Device *pDevice, NvU32 command, void *pParams, NvU32 size); + +NV_STATUS deviceCtrlCmdBifGetDmaBaseSysmemAddr_IMPL(struct Device *pDevice, NV0080_CTRL_BIF_GET_DMA_BASE_SYSMEM_ADDR_PARAMS *pBifDmaBaseSysmemParams); + +NV_STATUS deviceCtrlCmdBifAspmFeatureSupported_IMPL(struct Device *pDevice, NV0080_CTRL_BIF_SET_ASPM_FEATURE_PARAMS *pBifAspmParams); + +NV_STATUS deviceCtrlCmdBifAspmCyaUpdate_IMPL(struct Device *pDevice, NV0080_CTRL_BIF_ASPM_CYA_UPDATE_PARAMS *pBifAspmCyaParams); + +NV_STATUS deviceCtrlCmdBifGetPciePowerControlMask_IMPL(struct Device *pDevice, NV0080_CTRL_CMD_BIF_GET_PCIE_POWER_CONTROL_MASK_PARAMS *pBifPciePowerControlParams); + +NV_STATUS deviceCtrlCmdDmaGetPteInfo_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdDmaUpdatePde2_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_UPDATE_PDE_2_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdDmaSetPageDirectory_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_SET_PAGE_DIRECTORY_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdDmaUnsetPageDirectory_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_UNSET_PAGE_DIRECTORY_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdDmaFlush_VF(struct Device *pDevice, NV0080_CTRL_DMA_FLUSH_PARAMS *flushParams); + +static inline NV_STATUS deviceCtrlCmdDmaFlush_5baef9(struct Device *pDevice, NV0080_CTRL_DMA_FLUSH_PARAMS *flushParams) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } +NV_STATUS deviceCtrlCmdDmaAdvSchedGetVaCaps_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdDmaGetPdeInfo_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdDmaSetPteInfo_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdDmaInvalidateTLB_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_INVALIDATE_TLB_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdDmaGetCaps_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_GET_CAPS_PARAMS *pDmaCapsParams); + +NV_STATUS deviceCtrlCmdDmaSetVASpaceSize_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_SET_VA_SPACE_SIZE_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdDmaEnablePrivilegedRange_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_ENABLE_PRIVILEGED_RANGE_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdDmaSetDefaultVASpace_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_SET_DEFAULT_VASPACE_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdKGrGetCaps_IMPL(struct Device *pDevice, NV0080_CTRL_GR_GET_CAPS_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdKGrGetCapsV2_IMPL(struct Device *pDevice, NV0080_CTRL_GR_GET_CAPS_V2_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdKGrGetInfo_IMPL(struct Device *pDevice, NV0080_CTRL_GR_GET_INFO_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdKGrGetInfoV2_IMPL(struct Device *pDevice, NV0080_CTRL_GR_GET_INFO_V2_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdKGrGetTpcPartitionMode_IMPL(struct Device *pDevice, NV0080_CTRL_GR_TPC_PARTITION_MODE_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdKGrSetTpcPartitionMode_IMPL(struct Device *pDevice, NV0080_CTRL_GR_TPC_PARTITION_MODE_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdFbGetCompbitStoreInfo_IMPL(struct Device *pDevice, NV0080_CTRL_FB_GET_COMPBIT_STORE_INFO_PARAMS *pCompbitStoreParams); + +NV_STATUS deviceCtrlCmdFbGetCaps_IMPL(struct Device *pDevice, NV0080_CTRL_FB_GET_CAPS_PARAMS *pFbCapsParams); + +NV_STATUS deviceCtrlCmdFbGetCapsV2_IMPL(struct Device *pDevice, NV0080_CTRL_FB_GET_CAPS_V2_PARAMS *pFbCapsParams); + +NV_STATUS deviceCtrlCmdSetDefaultVidmemPhysicality_IMPL(struct Device *pDevice, NV0080_CTRL_FB_SET_DEFAULT_VIDMEM_PHYSICALITY_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdFifoGetCaps_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_GET_CAPS_PARAMS *pFifoCapsParams); + +NV_STATUS deviceCtrlCmdFifoGetCapsV2_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_GET_CAPS_V2_PARAMS *pFifoCapsParams); + +NV_STATUS deviceCtrlCmdFifoStartSelectedChannels_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS *pStartSel); + +NV_STATUS deviceCtrlCmdFifoGetEngineContextProperties_VF(struct Device *pDevice, NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *pParams); + +static inline NV_STATUS deviceCtrlCmdFifoGetEngineContextProperties_92bfc3(struct Device *pDevice, NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *pParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS deviceCtrlCmdFifoStopRunlist_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_STOP_RUNLIST_PARAMS *pStopRunlistParams); + +NV_STATUS deviceCtrlCmdFifoStartRunlist_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_START_RUNLIST_PARAMS *pStartRunlistParams); + +NV_STATUS deviceCtrlCmdFifoGetChannelList_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS *pChannelParams); + +NV_STATUS deviceCtrlCmdFifoGetLatencyBufferSize_VF(struct Device *pDevice, NV0080_CTRL_FIFO_GET_LATENCY_BUFFER_SIZE_PARAMS *pGetLatencyBufferSizeParams); + +static inline NV_STATUS deviceCtrlCmdFifoGetLatencyBufferSize_92bfc3(struct Device *pDevice, NV0080_CTRL_FIFO_GET_LATENCY_BUFFER_SIZE_PARAMS *pGetLatencyBufferSizeParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS deviceCtrlCmdFifoSetChannelProperties_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_SET_CHANNEL_PROPERTIES_PARAMS *pSetChannelPropertiesParams); + +NV_STATUS deviceCtrlCmdFifoIdleChannels_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_IDLE_CHANNELS_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdHostGetCaps_IMPL(struct Device *pDevice, NV0080_CTRL_HOST_GET_CAPS_PARAMS *pHostCapsParams); + +NV_STATUS deviceCtrlCmdHostGetCapsV2_IMPL(struct Device *pDevice, NV0080_CTRL_HOST_GET_CAPS_V2_PARAMS *pHostCapsParamsV2); + +NV_STATUS deviceCtrlCmdKPerfCudaLimitSetControl_IMPL(struct Device *pDevice, NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdInternalPerfCudaLimitSetControl_IMPL(struct Device *pDevice, NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdInternalPerfCudaLimitDisable_IMPL(struct Device *pDevice); + +NV_STATUS deviceCtrlCmdGpuGetClasslist_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS *pClassListParams); + +NV_STATUS deviceCtrlCmdGpuGetClasslistV2_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_CLASSLIST_V2_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdGpuGetNumSubdevices_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_NUM_SUBDEVICES_PARAMS *pSubDeviceCountParams); + +NV_STATUS deviceCtrlCmdGpuModifyGpuSwStatePersistence_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_MODIFY_SW_STATE_PERSISTENCE_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdGpuQueryGpuSwStatePersistence_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_QUERY_SW_STATE_PERSISTENCE_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdGpuGetVirtualizationMode_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_VIRTUALIZATION_MODE_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdGpuSetVgpuVfBar1Size_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdGpuGetSparseTextureComputeMode_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_SPARSE_TEXTURE_COMPUTE_MODE_PARAMS *pModeParams); + +NV_STATUS deviceCtrlCmdGpuSetSparseTextureComputeMode_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_SET_SPARSE_TEXTURE_COMPUTE_MODE_PARAMS *pModeParams); + +NV_STATUS deviceCtrlCmdGpuGetVgxCaps_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_VGX_CAPS_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdGpuGetBrandCaps_VF(struct Device *pDevice, NV0080_CTRL_GPU_GET_BRAND_CAPS_PARAMS *pParams); + +static inline NV_STATUS deviceCtrlCmdGpuGetBrandCaps_5baef9(struct Device *pDevice, NV0080_CTRL_GPU_GET_BRAND_CAPS_PARAMS *pParams) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +} + +NV_STATUS deviceCtrlCmdGpuVirtualizationSwitchToVga_IMPL(struct Device *pDevice); + +NV_STATUS deviceCtrlCmdGpuSetVgpuHeterogeneousMode_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_SET_VGPU_HETEROGENEOUS_MODE_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdGpuGetVgpuHeterogeneousMode_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_VGPU_HETEROGENEOUS_MODE_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdGpuGetSriovCaps_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdGpuGetFindSubDeviceHandle_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_FIND_SUBDEVICE_HANDLE_PARAM *pParams); + +NV_STATUS deviceCtrlCmdMsencGetCapsV2_VF(struct Device *pDevice, NV0080_CTRL_MSENC_GET_CAPS_V2_PARAMS *pMsencCapsParams); + +static inline NV_STATUS deviceCtrlCmdMsencGetCapsV2_5baef9(struct Device *pDevice, NV0080_CTRL_MSENC_GET_CAPS_V2_PARAMS *pMsencCapsParams) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +} + +NV_STATUS deviceCtrlCmdBspGetCapsV2_VF(struct Device *pDevice, NV0080_CTRL_BSP_GET_CAPS_PARAMS_V2 *pBspCapParams); + +static inline NV_STATUS deviceCtrlCmdBspGetCapsV2_5baef9(struct Device *pDevice, NV0080_CTRL_BSP_GET_CAPS_PARAMS_V2 *pBspCapParams) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +} + +NV_STATUS deviceCtrlCmdNvjpgGetCapsV2_VF(struct Device *pDevice, NV0080_CTRL_NVJPG_GET_CAPS_V2_PARAMS *pNvjpgCapsParams); + +static inline NV_STATUS deviceCtrlCmdNvjpgGetCapsV2_c04480(struct Device *pDevice, NV0080_CTRL_NVJPG_GET_CAPS_V2_PARAMS *pNvjpgCapsParams) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +} + +NV_STATUS deviceCtrlCmdOsUnixVTSwitch_IMPL(struct Device *pDevice, NV0080_CTRL_OS_UNIX_VT_SWITCH_PARAMS *pParams); + +NV_STATUS deviceCtrlCmdOsUnixVTGetFBInfo_IMPL(struct Device *pDevice, NV0080_CTRL_OS_UNIX_VT_GET_FB_INFO_PARAMS *pParams); + NV_STATUS deviceConstruct_IMPL(struct Device *arg_pResource, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_deviceConstruct(arg_pResource, arg_pCallContext, arg_pParams) deviceConstruct_IMPL(arg_pResource, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_disp_capabilities_nvoc.c b/src/nvidia/generated/g_disp_capabilities_nvoc.c index 66aab01249..d66f0e33b3 100644 --- a/src/nvidia/generated/g_disp_capabilities_nvoc.c +++ b/src/nvidia/generated/g_disp_capabilities_nvoc.c @@ -93,106 +93,137 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DispCapabilities = /*pExportInfo=*/ &__nvoc_export_info_DispCapabilities }; -static NV_STATUS __nvoc_thunk_DispCapabilities_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pDispCapabilities, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return dispcapGetRegBaseOffsetAndSize((struct DispCapabilities *)(((unsigned char *)pDispCapabilities) - __nvoc_rtti_DispCapabilities_GpuResource.offset), pGpu, pOffset, pSize); +// 1 down-thunk(s) defined to bridge methods in DispCapabilities from superclasses + +// dispcapGetRegBaseOffsetAndSize: virtual override (gpures) base (gpures) +static NV_STATUS __nvoc_down_thunk_DispCapabilities_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pDispCapabilities, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return dispcapGetRegBaseOffsetAndSize((struct DispCapabilities *)(((unsigned char *) pDispCapabilities) - __nvoc_rtti_DispCapabilities_GpuResource.offset), pGpu, pOffset, pSize); } -static NvBool __nvoc_thunk_GpuResource_dispcapShareCallback(struct DispCapabilities *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); + +// 24 up-thunk(s) defined to bridge methods in DispCapabilities to superclasses + +// dispcapControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispcapControl(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_dispcapCheckMemInterUnmap(struct DispCapabilities *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), bSubdeviceHandleProvided); +// dispcapMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispcapMap(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_dispcapMapTo(struct DispCapabilities *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset), pParams); +// dispcapUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispcapUnmap(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_GpuResource_dispcapGetMapAddrSpace(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// dispcapShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_dispcapShareCallback(struct DispCapabilities *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NvU32 __nvoc_thunk_RsResource_dispcapGetRefCount(struct DispCapabilities *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset)); +// dispcapGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispcapGetMapAddrSpace(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static void __nvoc_thunk_RsResource_dispcapAddAdditionalDependants(struct RsClient *pClient, struct DispCapabilities *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset), pReference); +// dispcapInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispcapInternalControlForward(struct DispCapabilities *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_RmResource_dispcapControl_Prologue(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), pCallContext, pParams); +// dispcapGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_dispcapGetInternalObjectHandle(struct DispCapabilities *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_dispcapInternalControlForward(struct DispCapabilities *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset), command, pParams, size); +// dispcapAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_dispcapAccessCallback(struct DispCapabilities *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RsResource_dispcapUnmapFrom(struct DispCapabilities *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset), pParams); +// dispcapGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_dispcapGetMemInterMapParams(struct DispCapabilities *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), pParams); } -static void __nvoc_thunk_RmResource_dispcapControl_Epilogue(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), pCallContext, pParams); +// dispcapCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_dispcapCheckMemInterUnmap(struct DispCapabilities *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), bSubdeviceHandleProvided); } -static NvHandle __nvoc_thunk_GpuResource_dispcapGetInternalObjectHandle(struct DispCapabilities *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset)); +// dispcapGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_dispcapGetMemoryMappingDescriptor(struct DispCapabilities *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_GpuResource_dispcapControl(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset), pCallContext, pParams); +// dispcapControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_dispcapControlSerialization_Prologue(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_dispcapUnmap(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset), pCallContext, pCpuMapping); +// dispcapControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_dispcapControlSerialization_Epilogue(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_dispcapGetMemInterMapParams(struct DispCapabilities *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), pParams); +// dispcapControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_dispcapControl_Prologue(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_dispcapGetMemoryMappingDescriptor(struct DispCapabilities *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), ppMemDesc); +// dispcapControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_dispcapControl_Epilogue(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_dispcapControlFilter(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset), pCallContext, pParams); +// dispcapCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_dispcapCanCopy(struct DispCapabilities *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RmResource_dispcapControlSerialization_Prologue(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), pCallContext, pParams); +// dispcapIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_dispcapIsDuplicate(struct DispCapabilities *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_RsResource_dispcapCanCopy(struct DispCapabilities *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset)); +// dispcapPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_dispcapPreDestruct(struct DispCapabilities *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_dispcapIsPartialUnmapSupported(struct DispCapabilities *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset)); +// dispcapControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_dispcapControlFilter(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_dispcapPreDestruct(struct DispCapabilities *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset)); +// dispcapIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_dispcapIsPartialUnmapSupported(struct DispCapabilities *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_dispcapIsDuplicate(struct DispCapabilities *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset), hMemory, pDuplicate); +// dispcapMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_dispcapMapTo(struct DispCapabilities *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_dispcapControlSerialization_Epilogue(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), pCallContext, pParams); +// dispcapUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_dispcapUnmapFrom(struct DispCapabilities *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_dispcapMap(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// dispcapGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_dispcapGetRefCount(struct DispCapabilities *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_dispcapAccessCallback(struct DispCapabilities *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// dispcapAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_dispcapAddAdditionalDependants(struct RsClient *pClient, struct DispCapabilities *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_DispCapabilities = { /*numEntries=*/ 0, @@ -228,63 +259,92 @@ NV_STATUS __nvoc_ctor_DispCapabilities(DispCapabilities *pThis, struct CALL_CONT return status; } +// Vtable initialization static void __nvoc_init_funcTable_DispCapabilities_1(DispCapabilities *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // dispcapGetRegBaseOffsetAndSize -- virtual override (gpures) base (gpures) pThis->__dispcapGetRegBaseOffsetAndSize__ = &dispcapGetRegBaseOffsetAndSize_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &__nvoc_down_thunk_DispCapabilities_gpuresGetRegBaseOffsetAndSize; - pThis->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &__nvoc_thunk_DispCapabilities_gpuresGetRegBaseOffsetAndSize; + // dispcapControl -- virtual inherited (gpures) base (gpures) + pThis->__dispcapControl__ = &__nvoc_up_thunk_GpuResource_dispcapControl; - pThis->__dispcapShareCallback__ = &__nvoc_thunk_GpuResource_dispcapShareCallback; + // dispcapMap -- virtual inherited (gpures) base (gpures) + pThis->__dispcapMap__ = &__nvoc_up_thunk_GpuResource_dispcapMap; - pThis->__dispcapCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_dispcapCheckMemInterUnmap; + // dispcapUnmap -- virtual inherited (gpures) base (gpures) + pThis->__dispcapUnmap__ = &__nvoc_up_thunk_GpuResource_dispcapUnmap; - pThis->__dispcapMapTo__ = &__nvoc_thunk_RsResource_dispcapMapTo; + // dispcapShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__dispcapShareCallback__ = &__nvoc_up_thunk_GpuResource_dispcapShareCallback; - pThis->__dispcapGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_dispcapGetMapAddrSpace; + // dispcapGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__dispcapGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_dispcapGetMapAddrSpace; - pThis->__dispcapGetRefCount__ = &__nvoc_thunk_RsResource_dispcapGetRefCount; + // dispcapInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__dispcapInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dispcapInternalControlForward; - pThis->__dispcapAddAdditionalDependants__ = &__nvoc_thunk_RsResource_dispcapAddAdditionalDependants; + // dispcapGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__dispcapGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dispcapGetInternalObjectHandle; - pThis->__dispcapControl_Prologue__ = &__nvoc_thunk_RmResource_dispcapControl_Prologue; + // dispcapAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__dispcapAccessCallback__ = &__nvoc_up_thunk_RmResource_dispcapAccessCallback; - pThis->__dispcapInternalControlForward__ = &__nvoc_thunk_GpuResource_dispcapInternalControlForward; + // dispcapGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__dispcapGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispcapGetMemInterMapParams; - pThis->__dispcapUnmapFrom__ = &__nvoc_thunk_RsResource_dispcapUnmapFrom; + // dispcapCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__dispcapCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispcapCheckMemInterUnmap; - pThis->__dispcapControl_Epilogue__ = &__nvoc_thunk_RmResource_dispcapControl_Epilogue; + // dispcapGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__dispcapGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispcapGetMemoryMappingDescriptor; - pThis->__dispcapGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_dispcapGetInternalObjectHandle; + // dispcapControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__dispcapControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispcapControlSerialization_Prologue; - pThis->__dispcapControl__ = &__nvoc_thunk_GpuResource_dispcapControl; + // dispcapControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__dispcapControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispcapControlSerialization_Epilogue; - pThis->__dispcapUnmap__ = &__nvoc_thunk_GpuResource_dispcapUnmap; + // dispcapControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__dispcapControl_Prologue__ = &__nvoc_up_thunk_RmResource_dispcapControl_Prologue; - pThis->__dispcapGetMemInterMapParams__ = &__nvoc_thunk_RmResource_dispcapGetMemInterMapParams; + // dispcapControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__dispcapControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dispcapControl_Epilogue; - pThis->__dispcapGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_dispcapGetMemoryMappingDescriptor; + // dispcapCanCopy -- virtual inherited (res) base (gpures) + pThis->__dispcapCanCopy__ = &__nvoc_up_thunk_RsResource_dispcapCanCopy; - pThis->__dispcapControlFilter__ = &__nvoc_thunk_RsResource_dispcapControlFilter; + // dispcapIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__dispcapIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispcapIsDuplicate; - pThis->__dispcapControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_dispcapControlSerialization_Prologue; + // dispcapPreDestruct -- virtual inherited (res) base (gpures) + pThis->__dispcapPreDestruct__ = &__nvoc_up_thunk_RsResource_dispcapPreDestruct; - pThis->__dispcapCanCopy__ = &__nvoc_thunk_RsResource_dispcapCanCopy; + // dispcapControlFilter -- virtual inherited (res) base (gpures) + pThis->__dispcapControlFilter__ = &__nvoc_up_thunk_RsResource_dispcapControlFilter; - pThis->__dispcapIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_dispcapIsPartialUnmapSupported; + // dispcapIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__dispcapIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispcapIsPartialUnmapSupported; - pThis->__dispcapPreDestruct__ = &__nvoc_thunk_RsResource_dispcapPreDestruct; + // dispcapMapTo -- virtual inherited (res) base (gpures) + pThis->__dispcapMapTo__ = &__nvoc_up_thunk_RsResource_dispcapMapTo; - pThis->__dispcapIsDuplicate__ = &__nvoc_thunk_RsResource_dispcapIsDuplicate; + // dispcapUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__dispcapUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispcapUnmapFrom; - pThis->__dispcapControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_dispcapControlSerialization_Epilogue; + // dispcapGetRefCount -- virtual inherited (res) base (gpures) + pThis->__dispcapGetRefCount__ = &__nvoc_up_thunk_RsResource_dispcapGetRefCount; - pThis->__dispcapMap__ = &__nvoc_thunk_GpuResource_dispcapMap; + // dispcapAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__dispcapAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispcapAddAdditionalDependants; +} // End __nvoc_init_funcTable_DispCapabilities_1 with approximately 26 basic block(s). - pThis->__dispcapAccessCallback__ = &__nvoc_thunk_RmResource_dispcapAccessCallback; -} +// Initialize vtable(s) for 25 virtual method(s). void __nvoc_init_funcTable_DispCapabilities(DispCapabilities *pThis) { + + // Initialize vtable(s) with 25 per-object function pointer(s). __nvoc_init_funcTable_DispCapabilities_1(pThis); } diff --git a/src/nvidia/generated/g_disp_capabilities_nvoc.h b/src/nvidia/generated/g_disp_capabilities_nvoc.h index accfcbaf8f..7dfd925abd 100644 --- a/src/nvidia/generated/g_disp_capabilities_nvoc.h +++ b/src/nvidia/generated/g_disp_capabilities_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_DISP_CAPABILITIES_NVOC_H_ #define _G_DISP_CAPABILITIES_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -36,6 +43,7 @@ extern "C" { * ******************************************************************************/ +#pragma once #include "g_disp_capabilities_nvoc.h" #ifndef DISP_CAPABILITIES_H @@ -56,40 +64,51 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct DispCapabilities { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct DispCapabilities *__nvoc_pbase_DispCapabilities; - NV_STATUS (*__dispcapGetRegBaseOffsetAndSize__)(struct DispCapabilities *, struct OBJGPU *, NvU32 *, NvU32 *); - NvBool (*__dispcapShareCallback__)(struct DispCapabilities *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__dispcapCheckMemInterUnmap__)(struct DispCapabilities *, NvBool); - NV_STATUS (*__dispcapMapTo__)(struct DispCapabilities *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__dispcapGetMapAddrSpace__)(struct DispCapabilities *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__dispcapGetRefCount__)(struct DispCapabilities *); - void (*__dispcapAddAdditionalDependants__)(struct RsClient *, struct DispCapabilities *, RsResourceRef *); - NV_STATUS (*__dispcapControl_Prologue__)(struct DispCapabilities *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispcapInternalControlForward__)(struct DispCapabilities *, NvU32, void *, NvU32); - NV_STATUS (*__dispcapUnmapFrom__)(struct DispCapabilities *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__dispcapControl_Epilogue__)(struct DispCapabilities *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__dispcapGetInternalObjectHandle__)(struct DispCapabilities *); - NV_STATUS (*__dispcapControl__)(struct DispCapabilities *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispcapUnmap__)(struct DispCapabilities *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__dispcapGetMemInterMapParams__)(struct DispCapabilities *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__dispcapGetMemoryMappingDescriptor__)(struct DispCapabilities *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__dispcapControlFilter__)(struct DispCapabilities *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispcapControlSerialization_Prologue__)(struct DispCapabilities *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__dispcapCanCopy__)(struct DispCapabilities *); - NvBool (*__dispcapIsPartialUnmapSupported__)(struct DispCapabilities *); - void (*__dispcapPreDestruct__)(struct DispCapabilities *); - NV_STATUS (*__dispcapIsDuplicate__)(struct DispCapabilities *, NvHandle, NvBool *); - void (*__dispcapControlSerialization_Epilogue__)(struct DispCapabilities *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispcapMap__)(struct DispCapabilities *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__dispcapAccessCallback__)(struct DispCapabilities *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct DispCapabilities *__nvoc_pbase_DispCapabilities; // dispcap + + // Vtable with 25 per-object function pointers + NV_STATUS (*__dispcapGetRegBaseOffsetAndSize__)(struct DispCapabilities * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual override (gpures) base (gpures) + NV_STATUS (*__dispcapControl__)(struct DispCapabilities * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__dispcapMap__)(struct DispCapabilities * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__dispcapUnmap__)(struct DispCapabilities * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__dispcapShareCallback__)(struct DispCapabilities * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__dispcapGetMapAddrSpace__)(struct DispCapabilities * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__dispcapInternalControlForward__)(struct DispCapabilities * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__dispcapGetInternalObjectHandle__)(struct DispCapabilities * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__dispcapAccessCallback__)(struct DispCapabilities * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__dispcapGetMemInterMapParams__)(struct DispCapabilities * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__dispcapCheckMemInterUnmap__)(struct DispCapabilities * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__dispcapGetMemoryMappingDescriptor__)(struct DispCapabilities * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__dispcapControlSerialization_Prologue__)(struct DispCapabilities * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__dispcapControlSerialization_Epilogue__)(struct DispCapabilities * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__dispcapControl_Prologue__)(struct DispCapabilities * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__dispcapControl_Epilogue__)(struct DispCapabilities * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__dispcapCanCopy__)(struct DispCapabilities * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__dispcapIsDuplicate__)(struct DispCapabilities * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__dispcapPreDestruct__)(struct DispCapabilities * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__dispcapControlFilter__)(struct DispCapabilities * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__dispcapIsPartialUnmapSupported__)(struct DispCapabilities * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__dispcapMapTo__)(struct DispCapabilities * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__dispcapUnmapFrom__)(struct DispCapabilities * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__dispcapGetRefCount__)(struct DispCapabilities * /*this*/); // virtual inherited (res) base (gpures) + void (*__dispcapAddAdditionalDependants__)(struct RsClient *, struct DispCapabilities * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members NvU32 ControlOffset; NvU32 ControlLength; }; @@ -103,6 +122,7 @@ typedef struct DispCapabilities DispCapabilities; #define __nvoc_class_id_DispCapabilities 0x99db3e #endif /* __nvoc_class_id_DispCapabilities */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_DispCapabilities; #define __staticCast_DispCapabilities(pThis) \ @@ -115,139 +135,167 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_DispCapabilities; ((DispCapabilities*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(DispCapabilities))) #endif //__nvoc_disp_capabilities_h_disabled - NV_STATUS __nvoc_objCreateDynamic_DispCapabilities(DispCapabilities**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_DispCapabilities(DispCapabilities**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_DispCapabilities(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_DispCapabilities((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define dispcapGetRegBaseOffsetAndSize_FNPTR(pDispCapabilities) pDispCapabilities->__dispcapGetRegBaseOffsetAndSize__ #define dispcapGetRegBaseOffsetAndSize(pDispCapabilities, pGpu, pOffset, pSize) dispcapGetRegBaseOffsetAndSize_DISPATCH(pDispCapabilities, pGpu, pOffset, pSize) +#define dispcapControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define dispcapControl(pGpuResource, pCallContext, pParams) dispcapControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define dispcapMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define dispcapMap(pGpuResource, pCallContext, pParams, pCpuMapping) dispcapMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define dispcapUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define dispcapUnmap(pGpuResource, pCallContext, pCpuMapping) dispcapUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define dispcapShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define dispcapShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) dispcapShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define dispcapCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispcapCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define dispcapMapTo(pResource, pParams) dispcapMapTo_DISPATCH(pResource, pParams) +#define dispcapGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ #define dispcapGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) dispcapGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define dispcapGetRefCount(pResource) dispcapGetRefCount_DISPATCH(pResource) -#define dispcapAddAdditionalDependants(pClient, pResource, pReference) dispcapAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define dispcapControl_Prologue(pResource, pCallContext, pParams) dispcapControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dispcapInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define dispcapInternalControlForward(pGpuResource, command, pParams, size) dispcapInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define dispcapUnmapFrom(pResource, pParams) dispcapUnmapFrom_DISPATCH(pResource, pParams) -#define dispcapControl_Epilogue(pResource, pCallContext, pParams) dispcapControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispcapGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define dispcapGetInternalObjectHandle(pGpuResource) dispcapGetInternalObjectHandle_DISPATCH(pGpuResource) -#define dispcapControl(pGpuResource, pCallContext, pParams) dispcapControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define dispcapUnmap(pGpuResource, pCallContext, pCpuMapping) dispcapUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define dispcapAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define dispcapAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispcapAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define dispcapGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define dispcapGetMemInterMapParams(pRmResource, pParams) dispcapGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define dispcapCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define dispcapCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispcapCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define dispcapGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define dispcapGetMemoryMappingDescriptor(pRmResource, ppMemDesc) dispcapGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define dispcapControlFilter(pResource, pCallContext, pParams) dispcapControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define dispcapControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define dispcapControlSerialization_Prologue(pResource, pCallContext, pParams) dispcapControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dispcapControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dispcapControlSerialization_Epilogue(pResource, pCallContext, pParams) dispcapControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispcapControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define dispcapControl_Prologue(pResource, pCallContext, pParams) dispcapControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dispcapControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define dispcapControl_Epilogue(pResource, pCallContext, pParams) dispcapControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispcapCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define dispcapCanCopy(pResource) dispcapCanCopy_DISPATCH(pResource) -#define dispcapIsPartialUnmapSupported(pResource) dispcapIsPartialUnmapSupported_DISPATCH(pResource) -#define dispcapPreDestruct(pResource) dispcapPreDestruct_DISPATCH(pResource) +#define dispcapIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define dispcapIsDuplicate(pResource, hMemory, pDuplicate) dispcapIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dispcapControlSerialization_Epilogue(pResource, pCallContext, pParams) dispcapControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dispcapMap(pGpuResource, pCallContext, pParams, pCpuMapping) dispcapMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define dispcapAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispcapAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS dispcapGetRegBaseOffsetAndSize_IMPL(struct DispCapabilities *pDispCapabilities, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); +#define dispcapPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dispcapPreDestruct(pResource) dispcapPreDestruct_DISPATCH(pResource) +#define dispcapControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dispcapControlFilter(pResource, pCallContext, pParams) dispcapControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define dispcapIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dispcapIsPartialUnmapSupported(pResource) dispcapIsPartialUnmapSupported_DISPATCH(pResource) +#define dispcapMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dispcapMapTo(pResource, pParams) dispcapMapTo_DISPATCH(pResource, pParams) +#define dispcapUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dispcapUnmapFrom(pResource, pParams) dispcapUnmapFrom_DISPATCH(pResource, pParams) +#define dispcapGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dispcapGetRefCount(pResource) dispcapGetRefCount_DISPATCH(pResource) +#define dispcapAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dispcapAddAdditionalDependants(pClient, pResource, pReference) dispcapAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS dispcapGetRegBaseOffsetAndSize_DISPATCH(struct DispCapabilities *pDispCapabilities, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pDispCapabilities->__dispcapGetRegBaseOffsetAndSize__(pDispCapabilities, pGpu, pOffset, pSize); } -static inline NvBool dispcapShareCallback_DISPATCH(struct DispCapabilities *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__dispcapShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS dispcapControl_DISPATCH(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__dispcapControl__(pGpuResource, pCallContext, pParams); } -static inline NV_STATUS dispcapCheckMemInterUnmap_DISPATCH(struct DispCapabilities *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__dispcapCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS dispcapMap_DISPATCH(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__dispcapMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS dispcapMapTo_DISPATCH(struct DispCapabilities *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dispcapMapTo__(pResource, pParams); +static inline NV_STATUS dispcapUnmap_DISPATCH(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__dispcapUnmap__(pGpuResource, pCallContext, pCpuMapping); +} + +static inline NvBool dispcapShareCallback_DISPATCH(struct DispCapabilities *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__dispcapShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS dispcapGetMapAddrSpace_DISPATCH(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__dispcapGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NvU32 dispcapGetRefCount_DISPATCH(struct DispCapabilities *pResource) { - return pResource->__dispcapGetRefCount__(pResource); +static inline NV_STATUS dispcapInternalControlForward_DISPATCH(struct DispCapabilities *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__dispcapInternalControlForward__(pGpuResource, command, pParams, size); } -static inline void dispcapAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispCapabilities *pResource, RsResourceRef *pReference) { - pResource->__dispcapAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvHandle dispcapGetInternalObjectHandle_DISPATCH(struct DispCapabilities *pGpuResource) { + return pGpuResource->__dispcapGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS dispcapControl_Prologue_DISPATCH(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispcapControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool dispcapAccessCallback_DISPATCH(struct DispCapabilities *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__dispcapAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS dispcapInternalControlForward_DISPATCH(struct DispCapabilities *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__dispcapInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS dispcapGetMemInterMapParams_DISPATCH(struct DispCapabilities *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__dispcapGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS dispcapUnmapFrom_DISPATCH(struct DispCapabilities *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dispcapUnmapFrom__(pResource, pParams); +static inline NV_STATUS dispcapCheckMemInterUnmap_DISPATCH(struct DispCapabilities *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__dispcapCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline void dispcapControl_Epilogue_DISPATCH(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispcapControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS dispcapGetMemoryMappingDescriptor_DISPATCH(struct DispCapabilities *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__dispcapGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NvHandle dispcapGetInternalObjectHandle_DISPATCH(struct DispCapabilities *pGpuResource) { - return pGpuResource->__dispcapGetInternalObjectHandle__(pGpuResource); +static inline NV_STATUS dispcapControlSerialization_Prologue_DISPATCH(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dispcapControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispcapControl_DISPATCH(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__dispcapControl__(pGpuResource, pCallContext, pParams); +static inline void dispcapControlSerialization_Epilogue_DISPATCH(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__dispcapControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispcapUnmap_DISPATCH(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispcapUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NV_STATUS dispcapControl_Prologue_DISPATCH(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dispcapControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispcapGetMemInterMapParams_DISPATCH(struct DispCapabilities *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dispcapGetMemInterMapParams__(pRmResource, pParams); +static inline void dispcapControl_Epilogue_DISPATCH(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__dispcapControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispcapGetMemoryMappingDescriptor_DISPATCH(struct DispCapabilities *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__dispcapGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NvBool dispcapCanCopy_DISPATCH(struct DispCapabilities *pResource) { + return pResource->__dispcapCanCopy__(pResource); } -static inline NV_STATUS dispcapControlFilter_DISPATCH(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispcapControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS dispcapIsDuplicate_DISPATCH(struct DispCapabilities *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__dispcapIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS dispcapControlSerialization_Prologue_DISPATCH(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispcapControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline void dispcapPreDestruct_DISPATCH(struct DispCapabilities *pResource) { + pResource->__dispcapPreDestruct__(pResource); } -static inline NvBool dispcapCanCopy_DISPATCH(struct DispCapabilities *pResource) { - return pResource->__dispcapCanCopy__(pResource); +static inline NV_STATUS dispcapControlFilter_DISPATCH(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dispcapControlFilter__(pResource, pCallContext, pParams); } static inline NvBool dispcapIsPartialUnmapSupported_DISPATCH(struct DispCapabilities *pResource) { return pResource->__dispcapIsPartialUnmapSupported__(pResource); } -static inline void dispcapPreDestruct_DISPATCH(struct DispCapabilities *pResource) { - pResource->__dispcapPreDestruct__(pResource); +static inline NV_STATUS dispcapMapTo_DISPATCH(struct DispCapabilities *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__dispcapMapTo__(pResource, pParams); } -static inline NV_STATUS dispcapIsDuplicate_DISPATCH(struct DispCapabilities *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dispcapIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS dispcapUnmapFrom_DISPATCH(struct DispCapabilities *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__dispcapUnmapFrom__(pResource, pParams); } -static inline void dispcapControlSerialization_Epilogue_DISPATCH(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispcapControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 dispcapGetRefCount_DISPATCH(struct DispCapabilities *pResource) { + return pResource->__dispcapGetRefCount__(pResource); } -static inline NV_STATUS dispcapMap_DISPATCH(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispcapMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void dispcapAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispCapabilities *pResource, RsResourceRef *pReference) { + pResource->__dispcapAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NvBool dispcapAccessCallback_DISPATCH(struct DispCapabilities *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__dispcapAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} +NV_STATUS dispcapGetRegBaseOffsetAndSize_IMPL(struct DispCapabilities *pDispCapabilities, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); NV_STATUS dispcapConstruct_IMPL(struct DispCapabilities *arg_pDispCapabilities, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_disp_channel_nvoc.c b/src/nvidia/generated/g_disp_channel_nvoc.c index af1f42d0cf..0f15407d2b 100644 --- a/src/nvidia/generated/g_disp_channel_nvoc.c +++ b/src/nvidia/generated/g_disp_channel_nvoc.c @@ -111,126 +111,162 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DispChannel = /*pExportInfo=*/ &__nvoc_export_info_DispChannel }; -static NV_STATUS __nvoc_thunk_DispChannel_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return dispchnGetRegBaseOffsetAndSize((struct DispChannel *)(((unsigned char *)pDispChannel) - __nvoc_rtti_DispChannel_GpuResource.offset), pGpu, pOffset, pSize); +// 1 down-thunk(s) defined to bridge methods in DispChannel from superclasses + +// dispchnGetRegBaseOffsetAndSize: virtual override (gpures) base (gpures) +static NV_STATUS __nvoc_down_thunk_DispChannel_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return dispchnGetRegBaseOffsetAndSize((struct DispChannel *)(((unsigned char *) pDispChannel) - __nvoc_rtti_DispChannel_GpuResource.offset), pGpu, pOffset, pSize); } -static NvBool __nvoc_thunk_GpuResource_dispchnShareCallback(struct DispChannel *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); + +// 29 up-thunk(s) defined to bridge methods in DispChannel to superclasses + +// dispchnControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispchnControl(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_dispchnCheckMemInterUnmap(struct DispChannel *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispChannel_RmResource.offset), bSubdeviceHandleProvided); +// dispchnMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispchnMap(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_Notifier_dispchnGetOrAllocNotifShare(struct DispChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispChannel_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +// dispchnUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispchnUnmap(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_dispchnMapTo(struct DispChannel *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannel_RsResource.offset), pParams); +// dispchnShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_dispchnShareCallback(struct DispChannel *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_GpuResource_dispchnGetMapAddrSpace(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// dispchnGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispchnGetMapAddrSpace(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static void __nvoc_thunk_Notifier_dispchnSetNotificationShare(struct DispChannel *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispChannel_Notifier.offset), pNotifShare); +// dispchnInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispchnInternalControlForward(struct DispChannel *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset), command, pParams, size); } -static NvU32 __nvoc_thunk_RsResource_dispchnGetRefCount(struct DispChannel *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannel_RsResource.offset)); +// dispchnGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_dispchnGetInternalObjectHandle(struct DispChannel *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset)); } -static void __nvoc_thunk_RsResource_dispchnAddAdditionalDependants(struct RsClient *pClient, struct DispChannel *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannel_RsResource.offset), pReference); +// dispchnAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_dispchnAccessCallback(struct DispChannel *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RmResource_dispchnControl_Prologue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannel_RmResource.offset), pCallContext, pParams); +// dispchnGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_dispchnGetMemInterMapParams(struct DispChannel *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispChannel_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_dispchnInternalControlForward(struct DispChannel *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset), command, pParams, size); +// dispchnCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_dispchnCheckMemInterUnmap(struct DispChannel *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispChannel_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RsResource_dispchnUnmapFrom(struct DispChannel *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannel_RsResource.offset), pParams); +// dispchnGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_dispchnGetMemoryMappingDescriptor(struct DispChannel *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispChannel_RmResource.offset), ppMemDesc); } -static void __nvoc_thunk_RmResource_dispchnControl_Epilogue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannel_RmResource.offset), pCallContext, pParams); +// dispchnControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_dispchnControlSerialization_Prologue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RmResource.offset), pCallContext, pParams); } -static NvHandle __nvoc_thunk_GpuResource_dispchnGetInternalObjectHandle(struct DispChannel *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset)); +// dispchnControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_dispchnControlSerialization_Epilogue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_dispchnControl(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset), pCallContext, pParams); +// dispchnControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_dispchnControl_Prologue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_dispchnUnmap(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset), pCallContext, pCpuMapping); +// dispchnControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_dispchnControl_Epilogue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_dispchnGetMemInterMapParams(struct DispChannel *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispChannel_RmResource.offset), pParams); +// dispchnCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_dispchnCanCopy(struct DispChannel *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RmResource_dispchnGetMemoryMappingDescriptor(struct DispChannel *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispChannel_RmResource.offset), ppMemDesc); +// dispchnIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_dispchnIsDuplicate(struct DispChannel *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_dispchnControlFilter(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannel_RsResource.offset), pCallContext, pParams); +// dispchnPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_dispchnPreDestruct(struct DispChannel *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_dispchnUnregisterEvent(struct DispChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispChannel_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// dispchnControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_dispchnControlFilter(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_dispchnControlSerialization_Prologue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannel_RmResource.offset), pCallContext, pParams); +// dispchnIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_dispchnIsPartialUnmapSupported(struct DispChannel *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_dispchnCanCopy(struct DispChannel *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannel_RsResource.offset)); +// dispchnMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_dispchnMapTo(struct DispChannel *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RsResource_dispchnIsPartialUnmapSupported(struct DispChannel *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannel_RsResource.offset)); +// dispchnUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_dispchnUnmapFrom(struct DispChannel *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RsResource.offset), pParams); } -static void __nvoc_thunk_RsResource_dispchnPreDestruct(struct DispChannel *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannel_RsResource.offset)); +// dispchnGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_dispchnGetRefCount(struct DispChannel *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_dispchnIsDuplicate(struct DispChannel *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannel_RsResource.offset), hMemory, pDuplicate); +// dispchnAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_dispchnAddAdditionalDependants(struct RsClient *pClient, struct DispChannel *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RsResource.offset), pReference); } -static void __nvoc_thunk_RmResource_dispchnControlSerialization_Epilogue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannel_RmResource.offset), pCallContext, pParams); +// dispchnGetNotificationListPtr: virtual inherited (notify) base (notify) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispchnGetNotificationListPtr(struct DispChannel *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannel_Notifier.offset)); } -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_dispchnGetNotificationListPtr(struct DispChannel *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispChannel_Notifier.offset)); +// dispchnGetNotificationShare: virtual inherited (notify) base (notify) +static struct NotifShare * __nvoc_up_thunk_Notifier_dispchnGetNotificationShare(struct DispChannel *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannel_Notifier.offset)); } -static struct NotifShare *__nvoc_thunk_Notifier_dispchnGetNotificationShare(struct DispChannel *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispChannel_Notifier.offset)); +// dispchnSetNotificationShare: virtual inherited (notify) base (notify) +static void __nvoc_up_thunk_Notifier_dispchnSetNotificationShare(struct DispChannel *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannel_Notifier.offset), pNotifShare); } -static NV_STATUS __nvoc_thunk_GpuResource_dispchnMap(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// dispchnUnregisterEvent: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_dispchnUnregisterEvent(struct DispChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannel_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static NvBool __nvoc_thunk_RmResource_dispchnAccessCallback(struct DispChannel *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannel_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// dispchnGetOrAllocNotifShare: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_dispchnGetOrAllocNotifShare(struct DispChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannel_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_DispChannel = { /*numEntries=*/ 0, @@ -274,73 +310,107 @@ NV_STATUS __nvoc_ctor_DispChannel(DispChannel *pThis, struct CALL_CONTEXT * arg_ return status; } +// Vtable initialization static void __nvoc_init_funcTable_DispChannel_1(DispChannel *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // dispchnGetRegBaseOffsetAndSize -- virtual override (gpures) base (gpures) pThis->__dispchnGetRegBaseOffsetAndSize__ = &dispchnGetRegBaseOffsetAndSize_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &__nvoc_down_thunk_DispChannel_gpuresGetRegBaseOffsetAndSize; - pThis->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &__nvoc_thunk_DispChannel_gpuresGetRegBaseOffsetAndSize; + // dispchnControl -- virtual inherited (gpures) base (gpures) + pThis->__dispchnControl__ = &__nvoc_up_thunk_GpuResource_dispchnControl; - pThis->__dispchnShareCallback__ = &__nvoc_thunk_GpuResource_dispchnShareCallback; + // dispchnMap -- virtual inherited (gpures) base (gpures) + pThis->__dispchnMap__ = &__nvoc_up_thunk_GpuResource_dispchnMap; - pThis->__dispchnCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_dispchnCheckMemInterUnmap; + // dispchnUnmap -- virtual inherited (gpures) base (gpures) + pThis->__dispchnUnmap__ = &__nvoc_up_thunk_GpuResource_dispchnUnmap; - pThis->__dispchnGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_dispchnGetOrAllocNotifShare; + // dispchnShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__dispchnShareCallback__ = &__nvoc_up_thunk_GpuResource_dispchnShareCallback; - pThis->__dispchnMapTo__ = &__nvoc_thunk_RsResource_dispchnMapTo; + // dispchnGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__dispchnGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_dispchnGetMapAddrSpace; - pThis->__dispchnGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_dispchnGetMapAddrSpace; + // dispchnInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__dispchnInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dispchnInternalControlForward; - pThis->__dispchnSetNotificationShare__ = &__nvoc_thunk_Notifier_dispchnSetNotificationShare; + // dispchnGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__dispchnGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dispchnGetInternalObjectHandle; - pThis->__dispchnGetRefCount__ = &__nvoc_thunk_RsResource_dispchnGetRefCount; + // dispchnAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__dispchnAccessCallback__ = &__nvoc_up_thunk_RmResource_dispchnAccessCallback; - pThis->__dispchnAddAdditionalDependants__ = &__nvoc_thunk_RsResource_dispchnAddAdditionalDependants; + // dispchnGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__dispchnGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispchnGetMemInterMapParams; - pThis->__dispchnControl_Prologue__ = &__nvoc_thunk_RmResource_dispchnControl_Prologue; + // dispchnCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__dispchnCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispchnCheckMemInterUnmap; - pThis->__dispchnInternalControlForward__ = &__nvoc_thunk_GpuResource_dispchnInternalControlForward; + // dispchnGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__dispchnGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispchnGetMemoryMappingDescriptor; - pThis->__dispchnUnmapFrom__ = &__nvoc_thunk_RsResource_dispchnUnmapFrom; + // dispchnControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__dispchnControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispchnControlSerialization_Prologue; - pThis->__dispchnControl_Epilogue__ = &__nvoc_thunk_RmResource_dispchnControl_Epilogue; + // dispchnControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__dispchnControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchnControlSerialization_Epilogue; - pThis->__dispchnGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_dispchnGetInternalObjectHandle; + // dispchnControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__dispchnControl_Prologue__ = &__nvoc_up_thunk_RmResource_dispchnControl_Prologue; - pThis->__dispchnControl__ = &__nvoc_thunk_GpuResource_dispchnControl; + // dispchnControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__dispchnControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchnControl_Epilogue; - pThis->__dispchnUnmap__ = &__nvoc_thunk_GpuResource_dispchnUnmap; + // dispchnCanCopy -- virtual inherited (res) base (gpures) + pThis->__dispchnCanCopy__ = &__nvoc_up_thunk_RsResource_dispchnCanCopy; - pThis->__dispchnGetMemInterMapParams__ = &__nvoc_thunk_RmResource_dispchnGetMemInterMapParams; + // dispchnIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__dispchnIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispchnIsDuplicate; - pThis->__dispchnGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_dispchnGetMemoryMappingDescriptor; + // dispchnPreDestruct -- virtual inherited (res) base (gpures) + pThis->__dispchnPreDestruct__ = &__nvoc_up_thunk_RsResource_dispchnPreDestruct; - pThis->__dispchnControlFilter__ = &__nvoc_thunk_RsResource_dispchnControlFilter; + // dispchnControlFilter -- virtual inherited (res) base (gpures) + pThis->__dispchnControlFilter__ = &__nvoc_up_thunk_RsResource_dispchnControlFilter; - pThis->__dispchnUnregisterEvent__ = &__nvoc_thunk_Notifier_dispchnUnregisterEvent; + // dispchnIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__dispchnIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispchnIsPartialUnmapSupported; - pThis->__dispchnControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_dispchnControlSerialization_Prologue; + // dispchnMapTo -- virtual inherited (res) base (gpures) + pThis->__dispchnMapTo__ = &__nvoc_up_thunk_RsResource_dispchnMapTo; - pThis->__dispchnCanCopy__ = &__nvoc_thunk_RsResource_dispchnCanCopy; + // dispchnUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__dispchnUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispchnUnmapFrom; - pThis->__dispchnIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_dispchnIsPartialUnmapSupported; + // dispchnGetRefCount -- virtual inherited (res) base (gpures) + pThis->__dispchnGetRefCount__ = &__nvoc_up_thunk_RsResource_dispchnGetRefCount; - pThis->__dispchnPreDestruct__ = &__nvoc_thunk_RsResource_dispchnPreDestruct; + // dispchnAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__dispchnAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispchnAddAdditionalDependants; - pThis->__dispchnIsDuplicate__ = &__nvoc_thunk_RsResource_dispchnIsDuplicate; + // dispchnGetNotificationListPtr -- virtual inherited (notify) base (notify) + pThis->__dispchnGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispchnGetNotificationListPtr; - pThis->__dispchnControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_dispchnControlSerialization_Epilogue; + // dispchnGetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__dispchnGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchnGetNotificationShare; - pThis->__dispchnGetNotificationListPtr__ = &__nvoc_thunk_Notifier_dispchnGetNotificationListPtr; + // dispchnSetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__dispchnSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchnSetNotificationShare; - pThis->__dispchnGetNotificationShare__ = &__nvoc_thunk_Notifier_dispchnGetNotificationShare; + // dispchnUnregisterEvent -- virtual inherited (notify) base (notify) + pThis->__dispchnUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispchnUnregisterEvent; - pThis->__dispchnMap__ = &__nvoc_thunk_GpuResource_dispchnMap; + // dispchnGetOrAllocNotifShare -- virtual inherited (notify) base (notify) + pThis->__dispchnGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispchnGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_DispChannel_1 with approximately 31 basic block(s). - pThis->__dispchnAccessCallback__ = &__nvoc_thunk_RmResource_dispchnAccessCallback; -} +// Initialize vtable(s) for 30 virtual method(s). void __nvoc_init_funcTable_DispChannel(DispChannel *pThis) { + + // Initialize vtable(s) with 30 per-object function pointer(s). __nvoc_init_funcTable_DispChannel_1(pThis); } @@ -542,126 +612,159 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DispChannelPio = /*pExportInfo=*/ &__nvoc_export_info_DispChannelPio }; -static NvBool __nvoc_thunk_GpuResource_dispchnpioShareCallback(struct DispChannelPio *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// 30 up-thunk(s) defined to bridge methods in DispChannelPio to superclasses + +// dispchnpioGetRegBaseOffsetAndSize: virtual inherited (dispchn) base (dispchn) +static NV_STATUS __nvoc_up_thunk_DispChannel_dispchnpioGetRegBaseOffsetAndSize(struct DispChannelPio *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return dispchnGetRegBaseOffsetAndSize((struct DispChannel *)(((unsigned char *) pDispChannel) + __nvoc_rtti_DispChannelPio_DispChannel.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_RmResource_dispchnpioCheckMemInterUnmap(struct DispChannelPio *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), bSubdeviceHandleProvided); +// dispchnpioControl: virtual inherited (gpures) base (dispchn) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispchnpioControl(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Notifier_dispchnpioGetOrAllocNotifShare(struct DispChannelPio *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispChannelPio_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +// dispchnpioMap: virtual inherited (gpures) base (dispchn) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispchnpioMap(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_dispchnpioMapTo(struct DispChannelPio *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset), pParams); +// dispchnpioUnmap: virtual inherited (gpures) base (dispchn) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispchnpioUnmap(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_GpuResource_dispchnpioGetMapAddrSpace(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// dispchnpioShareCallback: virtual inherited (gpures) base (dispchn) +static NvBool __nvoc_up_thunk_GpuResource_dispchnpioShareCallback(struct DispChannelPio *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static void __nvoc_thunk_Notifier_dispchnpioSetNotificationShare(struct DispChannelPio *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispChannelPio_Notifier.offset), pNotifShare); +// dispchnpioGetMapAddrSpace: virtual inherited (gpures) base (dispchn) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispchnpioGetMapAddrSpace(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NvU32 __nvoc_thunk_RsResource_dispchnpioGetRefCount(struct DispChannelPio *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset)); +// dispchnpioInternalControlForward: virtual inherited (gpures) base (dispchn) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispchnpioInternalControlForward(struct DispChannelPio *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset), command, pParams, size); } -static void __nvoc_thunk_RsResource_dispchnpioAddAdditionalDependants(struct RsClient *pClient, struct DispChannelPio *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset), pReference); +// dispchnpioGetInternalObjectHandle: virtual inherited (gpures) base (dispchn) +static NvHandle __nvoc_up_thunk_GpuResource_dispchnpioGetInternalObjectHandle(struct DispChannelPio *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_RmResource_dispchnpioControl_Prologue(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), pCallContext, pParams); +// dispchnpioAccessCallback: virtual inherited (rmres) base (dispchn) +static NvBool __nvoc_up_thunk_RmResource_dispchnpioAccessCallback(struct DispChannelPio *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_DispChannel_dispchnpioGetRegBaseOffsetAndSize(struct DispChannelPio *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return dispchnGetRegBaseOffsetAndSize((struct DispChannel *)(((unsigned char *)pDispChannel) + __nvoc_rtti_DispChannelPio_DispChannel.offset), pGpu, pOffset, pSize); +// dispchnpioGetMemInterMapParams: virtual inherited (rmres) base (dispchn) +static NV_STATUS __nvoc_up_thunk_RmResource_dispchnpioGetMemInterMapParams(struct DispChannelPio *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_dispchnpioInternalControlForward(struct DispChannelPio *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset), command, pParams, size); +// dispchnpioCheckMemInterUnmap: virtual inherited (rmres) base (dispchn) +static NV_STATUS __nvoc_up_thunk_RmResource_dispchnpioCheckMemInterUnmap(struct DispChannelPio *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RsResource_dispchnpioUnmapFrom(struct DispChannelPio *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset), pParams); +// dispchnpioGetMemoryMappingDescriptor: virtual inherited (rmres) base (dispchn) +static NV_STATUS __nvoc_up_thunk_RmResource_dispchnpioGetMemoryMappingDescriptor(struct DispChannelPio *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), ppMemDesc); } -static void __nvoc_thunk_RmResource_dispchnpioControl_Epilogue(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), pCallContext, pParams); +// dispchnpioControlSerialization_Prologue: virtual inherited (rmres) base (dispchn) +static NV_STATUS __nvoc_up_thunk_RmResource_dispchnpioControlSerialization_Prologue(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), pCallContext, pParams); } -static NvHandle __nvoc_thunk_GpuResource_dispchnpioGetInternalObjectHandle(struct DispChannelPio *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset)); +// dispchnpioControlSerialization_Epilogue: virtual inherited (rmres) base (dispchn) +static void __nvoc_up_thunk_RmResource_dispchnpioControlSerialization_Epilogue(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_dispchnpioControl(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset), pCallContext, pParams); +// dispchnpioControl_Prologue: virtual inherited (rmres) base (dispchn) +static NV_STATUS __nvoc_up_thunk_RmResource_dispchnpioControl_Prologue(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_dispchnpioUnmap(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset), pCallContext, pCpuMapping); +// dispchnpioControl_Epilogue: virtual inherited (rmres) base (dispchn) +static void __nvoc_up_thunk_RmResource_dispchnpioControl_Epilogue(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_dispchnpioGetMemInterMapParams(struct DispChannelPio *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), pParams); +// dispchnpioCanCopy: virtual inherited (res) base (dispchn) +static NvBool __nvoc_up_thunk_RsResource_dispchnpioCanCopy(struct DispChannelPio *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RmResource_dispchnpioGetMemoryMappingDescriptor(struct DispChannelPio *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), ppMemDesc); +// dispchnpioIsDuplicate: virtual inherited (res) base (dispchn) +static NV_STATUS __nvoc_up_thunk_RsResource_dispchnpioIsDuplicate(struct DispChannelPio *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_dispchnpioControlFilter(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset), pCallContext, pParams); +// dispchnpioPreDestruct: virtual inherited (res) base (dispchn) +static void __nvoc_up_thunk_RsResource_dispchnpioPreDestruct(struct DispChannelPio *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_dispchnpioUnregisterEvent(struct DispChannelPio *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispChannelPio_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// dispchnpioControlFilter: virtual inherited (res) base (dispchn) +static NV_STATUS __nvoc_up_thunk_RsResource_dispchnpioControlFilter(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_dispchnpioControlSerialization_Prologue(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), pCallContext, pParams); +// dispchnpioIsPartialUnmapSupported: inline virtual inherited (res) base (dispchn) body +static NvBool __nvoc_up_thunk_RsResource_dispchnpioIsPartialUnmapSupported(struct DispChannelPio *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_dispchnpioCanCopy(struct DispChannelPio *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset)); +// dispchnpioMapTo: virtual inherited (res) base (dispchn) +static NV_STATUS __nvoc_up_thunk_RsResource_dispchnpioMapTo(struct DispChannelPio *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RsResource_dispchnpioIsPartialUnmapSupported(struct DispChannelPio *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset)); +// dispchnpioUnmapFrom: virtual inherited (res) base (dispchn) +static NV_STATUS __nvoc_up_thunk_RsResource_dispchnpioUnmapFrom(struct DispChannelPio *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset), pParams); } -static void __nvoc_thunk_RsResource_dispchnpioPreDestruct(struct DispChannelPio *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset)); +// dispchnpioGetRefCount: virtual inherited (res) base (dispchn) +static NvU32 __nvoc_up_thunk_RsResource_dispchnpioGetRefCount(struct DispChannelPio *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_dispchnpioIsDuplicate(struct DispChannelPio *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset), hMemory, pDuplicate); +// dispchnpioAddAdditionalDependants: virtual inherited (res) base (dispchn) +static void __nvoc_up_thunk_RsResource_dispchnpioAddAdditionalDependants(struct RsClient *pClient, struct DispChannelPio *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset), pReference); } -static void __nvoc_thunk_RmResource_dispchnpioControlSerialization_Epilogue(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), pCallContext, pParams); +// dispchnpioGetNotificationListPtr: virtual inherited (notify) base (dispchn) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispchnpioGetNotificationListPtr(struct DispChannelPio *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannelPio_Notifier.offset)); } -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_dispchnpioGetNotificationListPtr(struct DispChannelPio *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispChannelPio_Notifier.offset)); +// dispchnpioGetNotificationShare: virtual inherited (notify) base (dispchn) +static struct NotifShare * __nvoc_up_thunk_Notifier_dispchnpioGetNotificationShare(struct DispChannelPio *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannelPio_Notifier.offset)); } -static struct NotifShare *__nvoc_thunk_Notifier_dispchnpioGetNotificationShare(struct DispChannelPio *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispChannelPio_Notifier.offset)); +// dispchnpioSetNotificationShare: virtual inherited (notify) base (dispchn) +static void __nvoc_up_thunk_Notifier_dispchnpioSetNotificationShare(struct DispChannelPio *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannelPio_Notifier.offset), pNotifShare); } -static NV_STATUS __nvoc_thunk_GpuResource_dispchnpioMap(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// dispchnpioUnregisterEvent: virtual inherited (notify) base (dispchn) +static NV_STATUS __nvoc_up_thunk_Notifier_dispchnpioUnregisterEvent(struct DispChannelPio *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannelPio_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static NvBool __nvoc_thunk_RmResource_dispchnpioAccessCallback(struct DispChannelPio *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// dispchnpioGetOrAllocNotifShare: virtual inherited (notify) base (dispchn) +static NV_STATUS __nvoc_up_thunk_Notifier_dispchnpioGetOrAllocNotifShare(struct DispChannelPio *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannelPio_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_DispChannelPio = { /*numEntries=*/ 0, @@ -697,71 +800,106 @@ NV_STATUS __nvoc_ctor_DispChannelPio(DispChannelPio *pThis, struct CALL_CONTEXT return status; } +// Vtable initialization static void __nvoc_init_funcTable_DispChannelPio_1(DispChannelPio *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - pThis->__dispchnpioShareCallback__ = &__nvoc_thunk_GpuResource_dispchnpioShareCallback; + // dispchnpioGetRegBaseOffsetAndSize -- virtual inherited (dispchn) base (dispchn) + pThis->__dispchnpioGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_DispChannel_dispchnpioGetRegBaseOffsetAndSize; - pThis->__dispchnpioCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_dispchnpioCheckMemInterUnmap; + // dispchnpioControl -- virtual inherited (gpures) base (dispchn) + pThis->__dispchnpioControl__ = &__nvoc_up_thunk_GpuResource_dispchnpioControl; - pThis->__dispchnpioGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_dispchnpioGetOrAllocNotifShare; + // dispchnpioMap -- virtual inherited (gpures) base (dispchn) + pThis->__dispchnpioMap__ = &__nvoc_up_thunk_GpuResource_dispchnpioMap; - pThis->__dispchnpioMapTo__ = &__nvoc_thunk_RsResource_dispchnpioMapTo; + // dispchnpioUnmap -- virtual inherited (gpures) base (dispchn) + pThis->__dispchnpioUnmap__ = &__nvoc_up_thunk_GpuResource_dispchnpioUnmap; - pThis->__dispchnpioGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_dispchnpioGetMapAddrSpace; + // dispchnpioShareCallback -- virtual inherited (gpures) base (dispchn) + pThis->__dispchnpioShareCallback__ = &__nvoc_up_thunk_GpuResource_dispchnpioShareCallback; - pThis->__dispchnpioSetNotificationShare__ = &__nvoc_thunk_Notifier_dispchnpioSetNotificationShare; + // dispchnpioGetMapAddrSpace -- virtual inherited (gpures) base (dispchn) + pThis->__dispchnpioGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_dispchnpioGetMapAddrSpace; - pThis->__dispchnpioGetRefCount__ = &__nvoc_thunk_RsResource_dispchnpioGetRefCount; + // dispchnpioInternalControlForward -- virtual inherited (gpures) base (dispchn) + pThis->__dispchnpioInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dispchnpioInternalControlForward; - pThis->__dispchnpioAddAdditionalDependants__ = &__nvoc_thunk_RsResource_dispchnpioAddAdditionalDependants; + // dispchnpioGetInternalObjectHandle -- virtual inherited (gpures) base (dispchn) + pThis->__dispchnpioGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dispchnpioGetInternalObjectHandle; - pThis->__dispchnpioControl_Prologue__ = &__nvoc_thunk_RmResource_dispchnpioControl_Prologue; + // dispchnpioAccessCallback -- virtual inherited (rmres) base (dispchn) + pThis->__dispchnpioAccessCallback__ = &__nvoc_up_thunk_RmResource_dispchnpioAccessCallback; - pThis->__dispchnpioGetRegBaseOffsetAndSize__ = &__nvoc_thunk_DispChannel_dispchnpioGetRegBaseOffsetAndSize; + // dispchnpioGetMemInterMapParams -- virtual inherited (rmres) base (dispchn) + pThis->__dispchnpioGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispchnpioGetMemInterMapParams; - pThis->__dispchnpioInternalControlForward__ = &__nvoc_thunk_GpuResource_dispchnpioInternalControlForward; + // dispchnpioCheckMemInterUnmap -- virtual inherited (rmres) base (dispchn) + pThis->__dispchnpioCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispchnpioCheckMemInterUnmap; - pThis->__dispchnpioUnmapFrom__ = &__nvoc_thunk_RsResource_dispchnpioUnmapFrom; + // dispchnpioGetMemoryMappingDescriptor -- virtual inherited (rmres) base (dispchn) + pThis->__dispchnpioGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispchnpioGetMemoryMappingDescriptor; - pThis->__dispchnpioControl_Epilogue__ = &__nvoc_thunk_RmResource_dispchnpioControl_Epilogue; + // dispchnpioControlSerialization_Prologue -- virtual inherited (rmres) base (dispchn) + pThis->__dispchnpioControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispchnpioControlSerialization_Prologue; - pThis->__dispchnpioGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_dispchnpioGetInternalObjectHandle; + // dispchnpioControlSerialization_Epilogue -- virtual inherited (rmres) base (dispchn) + pThis->__dispchnpioControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchnpioControlSerialization_Epilogue; - pThis->__dispchnpioControl__ = &__nvoc_thunk_GpuResource_dispchnpioControl; + // dispchnpioControl_Prologue -- virtual inherited (rmres) base (dispchn) + pThis->__dispchnpioControl_Prologue__ = &__nvoc_up_thunk_RmResource_dispchnpioControl_Prologue; - pThis->__dispchnpioUnmap__ = &__nvoc_thunk_GpuResource_dispchnpioUnmap; + // dispchnpioControl_Epilogue -- virtual inherited (rmres) base (dispchn) + pThis->__dispchnpioControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchnpioControl_Epilogue; - pThis->__dispchnpioGetMemInterMapParams__ = &__nvoc_thunk_RmResource_dispchnpioGetMemInterMapParams; + // dispchnpioCanCopy -- virtual inherited (res) base (dispchn) + pThis->__dispchnpioCanCopy__ = &__nvoc_up_thunk_RsResource_dispchnpioCanCopy; - pThis->__dispchnpioGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_dispchnpioGetMemoryMappingDescriptor; + // dispchnpioIsDuplicate -- virtual inherited (res) base (dispchn) + pThis->__dispchnpioIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispchnpioIsDuplicate; - pThis->__dispchnpioControlFilter__ = &__nvoc_thunk_RsResource_dispchnpioControlFilter; + // dispchnpioPreDestruct -- virtual inherited (res) base (dispchn) + pThis->__dispchnpioPreDestruct__ = &__nvoc_up_thunk_RsResource_dispchnpioPreDestruct; - pThis->__dispchnpioUnregisterEvent__ = &__nvoc_thunk_Notifier_dispchnpioUnregisterEvent; + // dispchnpioControlFilter -- virtual inherited (res) base (dispchn) + pThis->__dispchnpioControlFilter__ = &__nvoc_up_thunk_RsResource_dispchnpioControlFilter; - pThis->__dispchnpioControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_dispchnpioControlSerialization_Prologue; + // dispchnpioIsPartialUnmapSupported -- inline virtual inherited (res) base (dispchn) body + pThis->__dispchnpioIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispchnpioIsPartialUnmapSupported; - pThis->__dispchnpioCanCopy__ = &__nvoc_thunk_RsResource_dispchnpioCanCopy; + // dispchnpioMapTo -- virtual inherited (res) base (dispchn) + pThis->__dispchnpioMapTo__ = &__nvoc_up_thunk_RsResource_dispchnpioMapTo; - pThis->__dispchnpioIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_dispchnpioIsPartialUnmapSupported; + // dispchnpioUnmapFrom -- virtual inherited (res) base (dispchn) + pThis->__dispchnpioUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispchnpioUnmapFrom; - pThis->__dispchnpioPreDestruct__ = &__nvoc_thunk_RsResource_dispchnpioPreDestruct; + // dispchnpioGetRefCount -- virtual inherited (res) base (dispchn) + pThis->__dispchnpioGetRefCount__ = &__nvoc_up_thunk_RsResource_dispchnpioGetRefCount; - pThis->__dispchnpioIsDuplicate__ = &__nvoc_thunk_RsResource_dispchnpioIsDuplicate; + // dispchnpioAddAdditionalDependants -- virtual inherited (res) base (dispchn) + pThis->__dispchnpioAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispchnpioAddAdditionalDependants; - pThis->__dispchnpioControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_dispchnpioControlSerialization_Epilogue; + // dispchnpioGetNotificationListPtr -- virtual inherited (notify) base (dispchn) + pThis->__dispchnpioGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispchnpioGetNotificationListPtr; - pThis->__dispchnpioGetNotificationListPtr__ = &__nvoc_thunk_Notifier_dispchnpioGetNotificationListPtr; + // dispchnpioGetNotificationShare -- virtual inherited (notify) base (dispchn) + pThis->__dispchnpioGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchnpioGetNotificationShare; - pThis->__dispchnpioGetNotificationShare__ = &__nvoc_thunk_Notifier_dispchnpioGetNotificationShare; + // dispchnpioSetNotificationShare -- virtual inherited (notify) base (dispchn) + pThis->__dispchnpioSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchnpioSetNotificationShare; - pThis->__dispchnpioMap__ = &__nvoc_thunk_GpuResource_dispchnpioMap; + // dispchnpioUnregisterEvent -- virtual inherited (notify) base (dispchn) + pThis->__dispchnpioUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispchnpioUnregisterEvent; + + // dispchnpioGetOrAllocNotifShare -- virtual inherited (notify) base (dispchn) + pThis->__dispchnpioGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispchnpioGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_DispChannelPio_1 with approximately 30 basic block(s). - pThis->__dispchnpioAccessCallback__ = &__nvoc_thunk_RmResource_dispchnpioAccessCallback; -} +// Initialize vtable(s) for 30 virtual method(s). void __nvoc_init_funcTable_DispChannelPio(DispChannelPio *pThis) { + + // Initialize vtable(s) with 30 per-object function pointer(s). __nvoc_init_funcTable_DispChannelPio_1(pThis); } @@ -961,126 +1099,159 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DispChannelDma = /*pExportInfo=*/ &__nvoc_export_info_DispChannelDma }; -static NvBool __nvoc_thunk_GpuResource_dispchndmaShareCallback(struct DispChannelDma *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// 30 up-thunk(s) defined to bridge methods in DispChannelDma to superclasses + +// dispchndmaGetRegBaseOffsetAndSize: virtual inherited (dispchn) base (dispchn) +static NV_STATUS __nvoc_up_thunk_DispChannel_dispchndmaGetRegBaseOffsetAndSize(struct DispChannelDma *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return dispchnGetRegBaseOffsetAndSize((struct DispChannel *)(((unsigned char *) pDispChannel) + __nvoc_rtti_DispChannelDma_DispChannel.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_RmResource_dispchndmaCheckMemInterUnmap(struct DispChannelDma *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), bSubdeviceHandleProvided); +// dispchndmaControl: virtual inherited (gpures) base (dispchn) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispchndmaControl(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Notifier_dispchndmaGetOrAllocNotifShare(struct DispChannelDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispChannelDma_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +// dispchndmaMap: virtual inherited (gpures) base (dispchn) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispchndmaMap(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_dispchndmaMapTo(struct DispChannelDma *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset), pParams); +// dispchndmaUnmap: virtual inherited (gpures) base (dispchn) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispchndmaUnmap(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_GpuResource_dispchndmaGetMapAddrSpace(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// dispchndmaShareCallback: virtual inherited (gpures) base (dispchn) +static NvBool __nvoc_up_thunk_GpuResource_dispchndmaShareCallback(struct DispChannelDma *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static void __nvoc_thunk_Notifier_dispchndmaSetNotificationShare(struct DispChannelDma *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispChannelDma_Notifier.offset), pNotifShare); +// dispchndmaGetMapAddrSpace: virtual inherited (gpures) base (dispchn) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispchndmaGetMapAddrSpace(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NvU32 __nvoc_thunk_RsResource_dispchndmaGetRefCount(struct DispChannelDma *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset)); +// dispchndmaInternalControlForward: virtual inherited (gpures) base (dispchn) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispchndmaInternalControlForward(struct DispChannelDma *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset), command, pParams, size); } -static void __nvoc_thunk_RsResource_dispchndmaAddAdditionalDependants(struct RsClient *pClient, struct DispChannelDma *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset), pReference); +// dispchndmaGetInternalObjectHandle: virtual inherited (gpures) base (dispchn) +static NvHandle __nvoc_up_thunk_GpuResource_dispchndmaGetInternalObjectHandle(struct DispChannelDma *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_RmResource_dispchndmaControl_Prologue(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), pCallContext, pParams); +// dispchndmaAccessCallback: virtual inherited (rmres) base (dispchn) +static NvBool __nvoc_up_thunk_RmResource_dispchndmaAccessCallback(struct DispChannelDma *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_DispChannel_dispchndmaGetRegBaseOffsetAndSize(struct DispChannelDma *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return dispchnGetRegBaseOffsetAndSize((struct DispChannel *)(((unsigned char *)pDispChannel) + __nvoc_rtti_DispChannelDma_DispChannel.offset), pGpu, pOffset, pSize); +// dispchndmaGetMemInterMapParams: virtual inherited (rmres) base (dispchn) +static NV_STATUS __nvoc_up_thunk_RmResource_dispchndmaGetMemInterMapParams(struct DispChannelDma *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_dispchndmaInternalControlForward(struct DispChannelDma *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset), command, pParams, size); +// dispchndmaCheckMemInterUnmap: virtual inherited (rmres) base (dispchn) +static NV_STATUS __nvoc_up_thunk_RmResource_dispchndmaCheckMemInterUnmap(struct DispChannelDma *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RsResource_dispchndmaUnmapFrom(struct DispChannelDma *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset), pParams); +// dispchndmaGetMemoryMappingDescriptor: virtual inherited (rmres) base (dispchn) +static NV_STATUS __nvoc_up_thunk_RmResource_dispchndmaGetMemoryMappingDescriptor(struct DispChannelDma *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), ppMemDesc); } -static void __nvoc_thunk_RmResource_dispchndmaControl_Epilogue(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), pCallContext, pParams); +// dispchndmaControlSerialization_Prologue: virtual inherited (rmres) base (dispchn) +static NV_STATUS __nvoc_up_thunk_RmResource_dispchndmaControlSerialization_Prologue(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), pCallContext, pParams); } -static NvHandle __nvoc_thunk_GpuResource_dispchndmaGetInternalObjectHandle(struct DispChannelDma *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset)); +// dispchndmaControlSerialization_Epilogue: virtual inherited (rmres) base (dispchn) +static void __nvoc_up_thunk_RmResource_dispchndmaControlSerialization_Epilogue(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_dispchndmaControl(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset), pCallContext, pParams); +// dispchndmaControl_Prologue: virtual inherited (rmres) base (dispchn) +static NV_STATUS __nvoc_up_thunk_RmResource_dispchndmaControl_Prologue(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_dispchndmaUnmap(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset), pCallContext, pCpuMapping); +// dispchndmaControl_Epilogue: virtual inherited (rmres) base (dispchn) +static void __nvoc_up_thunk_RmResource_dispchndmaControl_Epilogue(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_dispchndmaGetMemInterMapParams(struct DispChannelDma *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), pParams); +// dispchndmaCanCopy: virtual inherited (res) base (dispchn) +static NvBool __nvoc_up_thunk_RsResource_dispchndmaCanCopy(struct DispChannelDma *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RmResource_dispchndmaGetMemoryMappingDescriptor(struct DispChannelDma *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), ppMemDesc); +// dispchndmaIsDuplicate: virtual inherited (res) base (dispchn) +static NV_STATUS __nvoc_up_thunk_RsResource_dispchndmaIsDuplicate(struct DispChannelDma *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_dispchndmaControlFilter(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset), pCallContext, pParams); +// dispchndmaPreDestruct: virtual inherited (res) base (dispchn) +static void __nvoc_up_thunk_RsResource_dispchndmaPreDestruct(struct DispChannelDma *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_dispchndmaUnregisterEvent(struct DispChannelDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispChannelDma_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// dispchndmaControlFilter: virtual inherited (res) base (dispchn) +static NV_STATUS __nvoc_up_thunk_RsResource_dispchndmaControlFilter(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_dispchndmaControlSerialization_Prologue(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), pCallContext, pParams); +// dispchndmaIsPartialUnmapSupported: inline virtual inherited (res) base (dispchn) body +static NvBool __nvoc_up_thunk_RsResource_dispchndmaIsPartialUnmapSupported(struct DispChannelDma *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_dispchndmaCanCopy(struct DispChannelDma *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset)); +// dispchndmaMapTo: virtual inherited (res) base (dispchn) +static NV_STATUS __nvoc_up_thunk_RsResource_dispchndmaMapTo(struct DispChannelDma *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RsResource_dispchndmaIsPartialUnmapSupported(struct DispChannelDma *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset)); +// dispchndmaUnmapFrom: virtual inherited (res) base (dispchn) +static NV_STATUS __nvoc_up_thunk_RsResource_dispchndmaUnmapFrom(struct DispChannelDma *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset), pParams); } -static void __nvoc_thunk_RsResource_dispchndmaPreDestruct(struct DispChannelDma *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset)); +// dispchndmaGetRefCount: virtual inherited (res) base (dispchn) +static NvU32 __nvoc_up_thunk_RsResource_dispchndmaGetRefCount(struct DispChannelDma *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_dispchndmaIsDuplicate(struct DispChannelDma *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset), hMemory, pDuplicate); +// dispchndmaAddAdditionalDependants: virtual inherited (res) base (dispchn) +static void __nvoc_up_thunk_RsResource_dispchndmaAddAdditionalDependants(struct RsClient *pClient, struct DispChannelDma *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset), pReference); } -static void __nvoc_thunk_RmResource_dispchndmaControlSerialization_Epilogue(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), pCallContext, pParams); +// dispchndmaGetNotificationListPtr: virtual inherited (notify) base (dispchn) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispchndmaGetNotificationListPtr(struct DispChannelDma *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannelDma_Notifier.offset)); } -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_dispchndmaGetNotificationListPtr(struct DispChannelDma *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispChannelDma_Notifier.offset)); +// dispchndmaGetNotificationShare: virtual inherited (notify) base (dispchn) +static struct NotifShare * __nvoc_up_thunk_Notifier_dispchndmaGetNotificationShare(struct DispChannelDma *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannelDma_Notifier.offset)); } -static struct NotifShare *__nvoc_thunk_Notifier_dispchndmaGetNotificationShare(struct DispChannelDma *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispChannelDma_Notifier.offset)); +// dispchndmaSetNotificationShare: virtual inherited (notify) base (dispchn) +static void __nvoc_up_thunk_Notifier_dispchndmaSetNotificationShare(struct DispChannelDma *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannelDma_Notifier.offset), pNotifShare); } -static NV_STATUS __nvoc_thunk_GpuResource_dispchndmaMap(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// dispchndmaUnregisterEvent: virtual inherited (notify) base (dispchn) +static NV_STATUS __nvoc_up_thunk_Notifier_dispchndmaUnregisterEvent(struct DispChannelDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannelDma_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static NvBool __nvoc_thunk_RmResource_dispchndmaAccessCallback(struct DispChannelDma *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// dispchndmaGetOrAllocNotifShare: virtual inherited (notify) base (dispchn) +static NV_STATUS __nvoc_up_thunk_Notifier_dispchndmaGetOrAllocNotifShare(struct DispChannelDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannelDma_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_DispChannelDma = { /*numEntries=*/ 0, @@ -1116,71 +1287,106 @@ NV_STATUS __nvoc_ctor_DispChannelDma(DispChannelDma *pThis, struct CALL_CONTEXT return status; } +// Vtable initialization static void __nvoc_init_funcTable_DispChannelDma_1(DispChannelDma *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - pThis->__dispchndmaShareCallback__ = &__nvoc_thunk_GpuResource_dispchndmaShareCallback; + // dispchndmaGetRegBaseOffsetAndSize -- virtual inherited (dispchn) base (dispchn) + pThis->__dispchndmaGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_DispChannel_dispchndmaGetRegBaseOffsetAndSize; - pThis->__dispchndmaCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_dispchndmaCheckMemInterUnmap; + // dispchndmaControl -- virtual inherited (gpures) base (dispchn) + pThis->__dispchndmaControl__ = &__nvoc_up_thunk_GpuResource_dispchndmaControl; - pThis->__dispchndmaGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_dispchndmaGetOrAllocNotifShare; + // dispchndmaMap -- virtual inherited (gpures) base (dispchn) + pThis->__dispchndmaMap__ = &__nvoc_up_thunk_GpuResource_dispchndmaMap; - pThis->__dispchndmaMapTo__ = &__nvoc_thunk_RsResource_dispchndmaMapTo; + // dispchndmaUnmap -- virtual inherited (gpures) base (dispchn) + pThis->__dispchndmaUnmap__ = &__nvoc_up_thunk_GpuResource_dispchndmaUnmap; - pThis->__dispchndmaGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_dispchndmaGetMapAddrSpace; + // dispchndmaShareCallback -- virtual inherited (gpures) base (dispchn) + pThis->__dispchndmaShareCallback__ = &__nvoc_up_thunk_GpuResource_dispchndmaShareCallback; - pThis->__dispchndmaSetNotificationShare__ = &__nvoc_thunk_Notifier_dispchndmaSetNotificationShare; + // dispchndmaGetMapAddrSpace -- virtual inherited (gpures) base (dispchn) + pThis->__dispchndmaGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_dispchndmaGetMapAddrSpace; - pThis->__dispchndmaGetRefCount__ = &__nvoc_thunk_RsResource_dispchndmaGetRefCount; + // dispchndmaInternalControlForward -- virtual inherited (gpures) base (dispchn) + pThis->__dispchndmaInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dispchndmaInternalControlForward; - pThis->__dispchndmaAddAdditionalDependants__ = &__nvoc_thunk_RsResource_dispchndmaAddAdditionalDependants; + // dispchndmaGetInternalObjectHandle -- virtual inherited (gpures) base (dispchn) + pThis->__dispchndmaGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dispchndmaGetInternalObjectHandle; - pThis->__dispchndmaControl_Prologue__ = &__nvoc_thunk_RmResource_dispchndmaControl_Prologue; + // dispchndmaAccessCallback -- virtual inherited (rmres) base (dispchn) + pThis->__dispchndmaAccessCallback__ = &__nvoc_up_thunk_RmResource_dispchndmaAccessCallback; - pThis->__dispchndmaGetRegBaseOffsetAndSize__ = &__nvoc_thunk_DispChannel_dispchndmaGetRegBaseOffsetAndSize; + // dispchndmaGetMemInterMapParams -- virtual inherited (rmres) base (dispchn) + pThis->__dispchndmaGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispchndmaGetMemInterMapParams; - pThis->__dispchndmaInternalControlForward__ = &__nvoc_thunk_GpuResource_dispchndmaInternalControlForward; + // dispchndmaCheckMemInterUnmap -- virtual inherited (rmres) base (dispchn) + pThis->__dispchndmaCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispchndmaCheckMemInterUnmap; - pThis->__dispchndmaUnmapFrom__ = &__nvoc_thunk_RsResource_dispchndmaUnmapFrom; + // dispchndmaGetMemoryMappingDescriptor -- virtual inherited (rmres) base (dispchn) + pThis->__dispchndmaGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispchndmaGetMemoryMappingDescriptor; - pThis->__dispchndmaControl_Epilogue__ = &__nvoc_thunk_RmResource_dispchndmaControl_Epilogue; + // dispchndmaControlSerialization_Prologue -- virtual inherited (rmres) base (dispchn) + pThis->__dispchndmaControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispchndmaControlSerialization_Prologue; - pThis->__dispchndmaGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_dispchndmaGetInternalObjectHandle; + // dispchndmaControlSerialization_Epilogue -- virtual inherited (rmres) base (dispchn) + pThis->__dispchndmaControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchndmaControlSerialization_Epilogue; - pThis->__dispchndmaControl__ = &__nvoc_thunk_GpuResource_dispchndmaControl; + // dispchndmaControl_Prologue -- virtual inherited (rmres) base (dispchn) + pThis->__dispchndmaControl_Prologue__ = &__nvoc_up_thunk_RmResource_dispchndmaControl_Prologue; - pThis->__dispchndmaUnmap__ = &__nvoc_thunk_GpuResource_dispchndmaUnmap; + // dispchndmaControl_Epilogue -- virtual inherited (rmres) base (dispchn) + pThis->__dispchndmaControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchndmaControl_Epilogue; - pThis->__dispchndmaGetMemInterMapParams__ = &__nvoc_thunk_RmResource_dispchndmaGetMemInterMapParams; + // dispchndmaCanCopy -- virtual inherited (res) base (dispchn) + pThis->__dispchndmaCanCopy__ = &__nvoc_up_thunk_RsResource_dispchndmaCanCopy; - pThis->__dispchndmaGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_dispchndmaGetMemoryMappingDescriptor; + // dispchndmaIsDuplicate -- virtual inherited (res) base (dispchn) + pThis->__dispchndmaIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispchndmaIsDuplicate; - pThis->__dispchndmaControlFilter__ = &__nvoc_thunk_RsResource_dispchndmaControlFilter; + // dispchndmaPreDestruct -- virtual inherited (res) base (dispchn) + pThis->__dispchndmaPreDestruct__ = &__nvoc_up_thunk_RsResource_dispchndmaPreDestruct; - pThis->__dispchndmaUnregisterEvent__ = &__nvoc_thunk_Notifier_dispchndmaUnregisterEvent; + // dispchndmaControlFilter -- virtual inherited (res) base (dispchn) + pThis->__dispchndmaControlFilter__ = &__nvoc_up_thunk_RsResource_dispchndmaControlFilter; - pThis->__dispchndmaControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_dispchndmaControlSerialization_Prologue; + // dispchndmaIsPartialUnmapSupported -- inline virtual inherited (res) base (dispchn) body + pThis->__dispchndmaIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispchndmaIsPartialUnmapSupported; - pThis->__dispchndmaCanCopy__ = &__nvoc_thunk_RsResource_dispchndmaCanCopy; + // dispchndmaMapTo -- virtual inherited (res) base (dispchn) + pThis->__dispchndmaMapTo__ = &__nvoc_up_thunk_RsResource_dispchndmaMapTo; - pThis->__dispchndmaIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_dispchndmaIsPartialUnmapSupported; + // dispchndmaUnmapFrom -- virtual inherited (res) base (dispchn) + pThis->__dispchndmaUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispchndmaUnmapFrom; - pThis->__dispchndmaPreDestruct__ = &__nvoc_thunk_RsResource_dispchndmaPreDestruct; + // dispchndmaGetRefCount -- virtual inherited (res) base (dispchn) + pThis->__dispchndmaGetRefCount__ = &__nvoc_up_thunk_RsResource_dispchndmaGetRefCount; - pThis->__dispchndmaIsDuplicate__ = &__nvoc_thunk_RsResource_dispchndmaIsDuplicate; + // dispchndmaAddAdditionalDependants -- virtual inherited (res) base (dispchn) + pThis->__dispchndmaAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispchndmaAddAdditionalDependants; - pThis->__dispchndmaControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_dispchndmaControlSerialization_Epilogue; + // dispchndmaGetNotificationListPtr -- virtual inherited (notify) base (dispchn) + pThis->__dispchndmaGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispchndmaGetNotificationListPtr; - pThis->__dispchndmaGetNotificationListPtr__ = &__nvoc_thunk_Notifier_dispchndmaGetNotificationListPtr; + // dispchndmaGetNotificationShare -- virtual inherited (notify) base (dispchn) + pThis->__dispchndmaGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchndmaGetNotificationShare; - pThis->__dispchndmaGetNotificationShare__ = &__nvoc_thunk_Notifier_dispchndmaGetNotificationShare; + // dispchndmaSetNotificationShare -- virtual inherited (notify) base (dispchn) + pThis->__dispchndmaSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchndmaSetNotificationShare; - pThis->__dispchndmaMap__ = &__nvoc_thunk_GpuResource_dispchndmaMap; + // dispchndmaUnregisterEvent -- virtual inherited (notify) base (dispchn) + pThis->__dispchndmaUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispchndmaUnregisterEvent; - pThis->__dispchndmaAccessCallback__ = &__nvoc_thunk_RmResource_dispchndmaAccessCallback; -} + // dispchndmaGetOrAllocNotifShare -- virtual inherited (notify) base (dispchn) + pThis->__dispchndmaGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispchndmaGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_DispChannelDma_1 with approximately 30 basic block(s). + +// Initialize vtable(s) for 30 virtual method(s). void __nvoc_init_funcTable_DispChannelDma(DispChannelDma *pThis) { + + // Initialize vtable(s) with 30 per-object function pointer(s). __nvoc_init_funcTable_DispChannelDma_1(pThis); } diff --git a/src/nvidia/generated/g_disp_channel_nvoc.h b/src/nvidia/generated/g_disp_channel_nvoc.h index d3b2be709b..9ddf23adcb 100644 --- a/src/nvidia/generated/g_disp_channel_nvoc.h +++ b/src/nvidia/generated/g_disp_channel_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_DISP_CHANNEL_NVOC_H_ #define _G_DISP_CHANNEL_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -36,6 +43,7 @@ extern "C" { * ******************************************************************************/ +#pragma once #include "g_disp_channel_nvoc.h" #ifndef DISP_CHANNEL_H @@ -44,6 +52,7 @@ extern "C" { #include "gpu/gpu_resource.h" #include "rmapi/event.h" + struct ContextDma; #ifndef __NVOC_CLASS_ContextDma_TYPEDEF__ @@ -56,6 +65,7 @@ typedef struct ContextDma ContextDma; #endif /* __nvoc_class_id_ContextDma */ + struct DispObject; #ifndef __NVOC_CLASS_DispObject_TYPEDEF__ @@ -82,48 +92,59 @@ typedef struct DispObject DispObject; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct DispChannel { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; struct Notifier __nvoc_base_Notifier; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct DispChannel *__nvoc_pbase_DispChannel; - NV_STATUS (*__dispchnGetRegBaseOffsetAndSize__)(struct DispChannel *, struct OBJGPU *, NvU32 *, NvU32 *); - NvBool (*__dispchnShareCallback__)(struct DispChannel *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__dispchnCheckMemInterUnmap__)(struct DispChannel *, NvBool); - NV_STATUS (*__dispchnGetOrAllocNotifShare__)(struct DispChannel *, NvHandle, NvHandle, struct NotifShare **); - NV_STATUS (*__dispchnMapTo__)(struct DispChannel *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__dispchnGetMapAddrSpace__)(struct DispChannel *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__dispchnSetNotificationShare__)(struct DispChannel *, struct NotifShare *); - NvU32 (*__dispchnGetRefCount__)(struct DispChannel *); - void (*__dispchnAddAdditionalDependants__)(struct RsClient *, struct DispChannel *, RsResourceRef *); - NV_STATUS (*__dispchnControl_Prologue__)(struct DispChannel *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispchnInternalControlForward__)(struct DispChannel *, NvU32, void *, NvU32); - NV_STATUS (*__dispchnUnmapFrom__)(struct DispChannel *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__dispchnControl_Epilogue__)(struct DispChannel *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__dispchnGetInternalObjectHandle__)(struct DispChannel *); - NV_STATUS (*__dispchnControl__)(struct DispChannel *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispchnUnmap__)(struct DispChannel *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__dispchnGetMemInterMapParams__)(struct DispChannel *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__dispchnGetMemoryMappingDescriptor__)(struct DispChannel *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__dispchnControlFilter__)(struct DispChannel *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispchnUnregisterEvent__)(struct DispChannel *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__dispchnControlSerialization_Prologue__)(struct DispChannel *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__dispchnCanCopy__)(struct DispChannel *); - NvBool (*__dispchnIsPartialUnmapSupported__)(struct DispChannel *); - void (*__dispchnPreDestruct__)(struct DispChannel *); - NV_STATUS (*__dispchnIsDuplicate__)(struct DispChannel *, NvHandle, NvBool *); - void (*__dispchnControlSerialization_Epilogue__)(struct DispChannel *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__dispchnGetNotificationListPtr__)(struct DispChannel *); - struct NotifShare *(*__dispchnGetNotificationShare__)(struct DispChannel *); - NV_STATUS (*__dispchnMap__)(struct DispChannel *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__dispchnAccessCallback__)(struct DispChannel *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct INotifier *__nvoc_pbase_INotifier; // inotify super^2 + struct Notifier *__nvoc_pbase_Notifier; // notify super + struct DispChannel *__nvoc_pbase_DispChannel; // dispchn + + // Vtable with 30 per-object function pointers + NV_STATUS (*__dispchnGetRegBaseOffsetAndSize__)(struct DispChannel * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual override (gpures) base (gpures) + NV_STATUS (*__dispchnControl__)(struct DispChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__dispchnMap__)(struct DispChannel * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__dispchnUnmap__)(struct DispChannel * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__dispchnShareCallback__)(struct DispChannel * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__dispchnGetMapAddrSpace__)(struct DispChannel * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__dispchnInternalControlForward__)(struct DispChannel * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__dispchnGetInternalObjectHandle__)(struct DispChannel * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__dispchnAccessCallback__)(struct DispChannel * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__dispchnGetMemInterMapParams__)(struct DispChannel * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__dispchnCheckMemInterUnmap__)(struct DispChannel * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__dispchnGetMemoryMappingDescriptor__)(struct DispChannel * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__dispchnControlSerialization_Prologue__)(struct DispChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__dispchnControlSerialization_Epilogue__)(struct DispChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__dispchnControl_Prologue__)(struct DispChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__dispchnControl_Epilogue__)(struct DispChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__dispchnCanCopy__)(struct DispChannel * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__dispchnIsDuplicate__)(struct DispChannel * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__dispchnPreDestruct__)(struct DispChannel * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__dispchnControlFilter__)(struct DispChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__dispchnIsPartialUnmapSupported__)(struct DispChannel * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__dispchnMapTo__)(struct DispChannel * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__dispchnUnmapFrom__)(struct DispChannel * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__dispchnGetRefCount__)(struct DispChannel * /*this*/); // virtual inherited (res) base (gpures) + void (*__dispchnAddAdditionalDependants__)(struct RsClient *, struct DispChannel * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + PEVENTNOTIFICATION * (*__dispchnGetNotificationListPtr__)(struct DispChannel * /*this*/); // virtual inherited (notify) base (notify) + struct NotifShare * (*__dispchnGetNotificationShare__)(struct DispChannel * /*this*/); // virtual inherited (notify) base (notify) + void (*__dispchnSetNotificationShare__)(struct DispChannel * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) + NV_STATUS (*__dispchnUnregisterEvent__)(struct DispChannel * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) + NV_STATUS (*__dispchnGetOrAllocNotifShare__)(struct DispChannel * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) + + // Data members struct DispObject *pDispObject; NvU32 DispClass; NvU32 InstanceNumber; @@ -143,6 +164,7 @@ typedef struct DispChannel DispChannel; #define __nvoc_class_id_DispChannel 0xbd2ff3 #endif /* __nvoc_class_id_DispChannel */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_DispChannel; #define __staticCast_DispChannel(pThis) \ @@ -155,164 +177,197 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_DispChannel; ((DispChannel*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(DispChannel))) #endif //__nvoc_disp_channel_h_disabled - NV_STATUS __nvoc_objCreateDynamic_DispChannel(DispChannel**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_DispChannel(DispChannel**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams, NvU32 arg_isDma); #define __objCreate_DispChannel(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams, arg_isDma) \ __nvoc_objCreate_DispChannel((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams, arg_isDma) + +// Wrapper macros +#define dispchnGetRegBaseOffsetAndSize_FNPTR(pDispChannel) pDispChannel->__dispchnGetRegBaseOffsetAndSize__ #define dispchnGetRegBaseOffsetAndSize(pDispChannel, pGpu, pOffset, pSize) dispchnGetRegBaseOffsetAndSize_DISPATCH(pDispChannel, pGpu, pOffset, pSize) +#define dispchnControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define dispchnControl(pGpuResource, pCallContext, pParams) dispchnControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define dispchnMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define dispchnMap(pGpuResource, pCallContext, pParams, pCpuMapping) dispchnMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define dispchnUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define dispchnUnmap(pGpuResource, pCallContext, pCpuMapping) dispchnUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define dispchnShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define dispchnShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) dispchnShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define dispchnCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispchnCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define dispchnGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) dispchnGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -#define dispchnMapTo(pResource, pParams) dispchnMapTo_DISPATCH(pResource, pParams) +#define dispchnGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ #define dispchnGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) dispchnGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define dispchnSetNotificationShare(pNotifier, pNotifShare) dispchnSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define dispchnGetRefCount(pResource) dispchnGetRefCount_DISPATCH(pResource) -#define dispchnAddAdditionalDependants(pClient, pResource, pReference) dispchnAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define dispchnControl_Prologue(pResource, pCallContext, pParams) dispchnControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dispchnInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define dispchnInternalControlForward(pGpuResource, command, pParams, size) dispchnInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define dispchnUnmapFrom(pResource, pParams) dispchnUnmapFrom_DISPATCH(pResource, pParams) -#define dispchnControl_Epilogue(pResource, pCallContext, pParams) dispchnControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispchnGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define dispchnGetInternalObjectHandle(pGpuResource) dispchnGetInternalObjectHandle_DISPATCH(pGpuResource) -#define dispchnControl(pGpuResource, pCallContext, pParams) dispchnControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define dispchnUnmap(pGpuResource, pCallContext, pCpuMapping) dispchnUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define dispchnAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define dispchnAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispchnAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define dispchnGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define dispchnGetMemInterMapParams(pRmResource, pParams) dispchnGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define dispchnCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define dispchnCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispchnCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define dispchnGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define dispchnGetMemoryMappingDescriptor(pRmResource, ppMemDesc) dispchnGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define dispchnControlFilter(pResource, pCallContext, pParams) dispchnControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define dispchnUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispchnUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define dispchnControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define dispchnControlSerialization_Prologue(pResource, pCallContext, pParams) dispchnControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dispchnControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dispchnControlSerialization_Epilogue(pResource, pCallContext, pParams) dispchnControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispchnControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define dispchnControl_Prologue(pResource, pCallContext, pParams) dispchnControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dispchnControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define dispchnControl_Epilogue(pResource, pCallContext, pParams) dispchnControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispchnCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define dispchnCanCopy(pResource) dispchnCanCopy_DISPATCH(pResource) -#define dispchnIsPartialUnmapSupported(pResource) dispchnIsPartialUnmapSupported_DISPATCH(pResource) -#define dispchnPreDestruct(pResource) dispchnPreDestruct_DISPATCH(pResource) +#define dispchnIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define dispchnIsDuplicate(pResource, hMemory, pDuplicate) dispchnIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dispchnControlSerialization_Epilogue(pResource, pCallContext, pParams) dispchnControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispchnPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dispchnPreDestruct(pResource) dispchnPreDestruct_DISPATCH(pResource) +#define dispchnControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dispchnControlFilter(pResource, pCallContext, pParams) dispchnControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define dispchnIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dispchnIsPartialUnmapSupported(pResource) dispchnIsPartialUnmapSupported_DISPATCH(pResource) +#define dispchnMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dispchnMapTo(pResource, pParams) dispchnMapTo_DISPATCH(pResource, pParams) +#define dispchnUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dispchnUnmapFrom(pResource, pParams) dispchnUnmapFrom_DISPATCH(pResource, pParams) +#define dispchnGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dispchnGetRefCount(pResource) dispchnGetRefCount_DISPATCH(pResource) +#define dispchnAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dispchnAddAdditionalDependants(pClient, pResource, pReference) dispchnAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define dispchnGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define dispchnGetNotificationListPtr(pNotifier) dispchnGetNotificationListPtr_DISPATCH(pNotifier) +#define dispchnGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ #define dispchnGetNotificationShare(pNotifier) dispchnGetNotificationShare_DISPATCH(pNotifier) -#define dispchnMap(pGpuResource, pCallContext, pParams, pCpuMapping) dispchnMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define dispchnAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispchnAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS dispchnGetRegBaseOffsetAndSize_IMPL(struct DispChannel *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); +#define dispchnSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define dispchnSetNotificationShare(pNotifier, pNotifShare) dispchnSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define dispchnUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define dispchnUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispchnUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define dispchnGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define dispchnGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) dispchnGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) +// Dispatch functions static inline NV_STATUS dispchnGetRegBaseOffsetAndSize_DISPATCH(struct DispChannel *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pDispChannel->__dispchnGetRegBaseOffsetAndSize__(pDispChannel, pGpu, pOffset, pSize); } -static inline NvBool dispchnShareCallback_DISPATCH(struct DispChannel *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__dispchnShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS dispchnControl_DISPATCH(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__dispchnControl__(pGpuResource, pCallContext, pParams); } -static inline NV_STATUS dispchnCheckMemInterUnmap_DISPATCH(struct DispChannel *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__dispchnCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS dispchnMap_DISPATCH(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__dispchnMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS dispchnGetOrAllocNotifShare_DISPATCH(struct DispChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__dispchnGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); +static inline NV_STATUS dispchnUnmap_DISPATCH(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__dispchnUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS dispchnMapTo_DISPATCH(struct DispChannel *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dispchnMapTo__(pResource, pParams); +static inline NvBool dispchnShareCallback_DISPATCH(struct DispChannel *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__dispchnShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS dispchnGetMapAddrSpace_DISPATCH(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__dispchnGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void dispchnSetNotificationShare_DISPATCH(struct DispChannel *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__dispchnSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS dispchnInternalControlForward_DISPATCH(struct DispChannel *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__dispchnInternalControlForward__(pGpuResource, command, pParams, size); } -static inline NvU32 dispchnGetRefCount_DISPATCH(struct DispChannel *pResource) { - return pResource->__dispchnGetRefCount__(pResource); +static inline NvHandle dispchnGetInternalObjectHandle_DISPATCH(struct DispChannel *pGpuResource) { + return pGpuResource->__dispchnGetInternalObjectHandle__(pGpuResource); } -static inline void dispchnAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispChannel *pResource, RsResourceRef *pReference) { - pResource->__dispchnAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvBool dispchnAccessCallback_DISPATCH(struct DispChannel *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__dispchnAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS dispchnControl_Prologue_DISPATCH(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispchnControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS dispchnGetMemInterMapParams_DISPATCH(struct DispChannel *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__dispchnGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS dispchnInternalControlForward_DISPATCH(struct DispChannel *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__dispchnInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS dispchnCheckMemInterUnmap_DISPATCH(struct DispChannel *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__dispchnCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS dispchnUnmapFrom_DISPATCH(struct DispChannel *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dispchnUnmapFrom__(pResource, pParams); +static inline NV_STATUS dispchnGetMemoryMappingDescriptor_DISPATCH(struct DispChannel *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__dispchnGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline void dispchnControl_Epilogue_DISPATCH(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispchnControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS dispchnControlSerialization_Prologue_DISPATCH(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dispchnControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvHandle dispchnGetInternalObjectHandle_DISPATCH(struct DispChannel *pGpuResource) { - return pGpuResource->__dispchnGetInternalObjectHandle__(pGpuResource); +static inline void dispchnControlSerialization_Epilogue_DISPATCH(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__dispchnControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispchnControl_DISPATCH(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__dispchnControl__(pGpuResource, pCallContext, pParams); +static inline NV_STATUS dispchnControl_Prologue_DISPATCH(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dispchnControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispchnUnmap_DISPATCH(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispchnUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline void dispchnControl_Epilogue_DISPATCH(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__dispchnControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispchnGetMemInterMapParams_DISPATCH(struct DispChannel *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dispchnGetMemInterMapParams__(pRmResource, pParams); +static inline NvBool dispchnCanCopy_DISPATCH(struct DispChannel *pResource) { + return pResource->__dispchnCanCopy__(pResource); } -static inline NV_STATUS dispchnGetMemoryMappingDescriptor_DISPATCH(struct DispChannel *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__dispchnGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS dispchnIsDuplicate_DISPATCH(struct DispChannel *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__dispchnIsDuplicate__(pResource, hMemory, pDuplicate); +} + +static inline void dispchnPreDestruct_DISPATCH(struct DispChannel *pResource) { + pResource->__dispchnPreDestruct__(pResource); } static inline NV_STATUS dispchnControlFilter_DISPATCH(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__dispchnControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispchnUnregisterEvent_DISPATCH(struct DispChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__dispchnUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline NvBool dispchnIsPartialUnmapSupported_DISPATCH(struct DispChannel *pResource) { + return pResource->__dispchnIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS dispchnControlSerialization_Prologue_DISPATCH(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispchnControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS dispchnMapTo_DISPATCH(struct DispChannel *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__dispchnMapTo__(pResource, pParams); } -static inline NvBool dispchnCanCopy_DISPATCH(struct DispChannel *pResource) { - return pResource->__dispchnCanCopy__(pResource); +static inline NV_STATUS dispchnUnmapFrom_DISPATCH(struct DispChannel *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__dispchnUnmapFrom__(pResource, pParams); } -static inline NvBool dispchnIsPartialUnmapSupported_DISPATCH(struct DispChannel *pResource) { - return pResource->__dispchnIsPartialUnmapSupported__(pResource); +static inline NvU32 dispchnGetRefCount_DISPATCH(struct DispChannel *pResource) { + return pResource->__dispchnGetRefCount__(pResource); } -static inline void dispchnPreDestruct_DISPATCH(struct DispChannel *pResource) { - pResource->__dispchnPreDestruct__(pResource); +static inline void dispchnAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispChannel *pResource, RsResourceRef *pReference) { + pResource->__dispchnAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NV_STATUS dispchnIsDuplicate_DISPATCH(struct DispChannel *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dispchnIsDuplicate__(pResource, hMemory, pDuplicate); +static inline PEVENTNOTIFICATION * dispchnGetNotificationListPtr_DISPATCH(struct DispChannel *pNotifier) { + return pNotifier->__dispchnGetNotificationListPtr__(pNotifier); } -static inline void dispchnControlSerialization_Epilogue_DISPATCH(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispchnControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline struct NotifShare * dispchnGetNotificationShare_DISPATCH(struct DispChannel *pNotifier) { + return pNotifier->__dispchnGetNotificationShare__(pNotifier); } -static inline PEVENTNOTIFICATION *dispchnGetNotificationListPtr_DISPATCH(struct DispChannel *pNotifier) { - return pNotifier->__dispchnGetNotificationListPtr__(pNotifier); +static inline void dispchnSetNotificationShare_DISPATCH(struct DispChannel *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__dispchnSetNotificationShare__(pNotifier, pNotifShare); } -static inline struct NotifShare *dispchnGetNotificationShare_DISPATCH(struct DispChannel *pNotifier) { - return pNotifier->__dispchnGetNotificationShare__(pNotifier); +static inline NV_STATUS dispchnUnregisterEvent_DISPATCH(struct DispChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__dispchnUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static inline NV_STATUS dispchnMap_DISPATCH(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispchnMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS dispchnGetOrAllocNotifShare_DISPATCH(struct DispChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return pNotifier->__dispchnGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } -static inline NvBool dispchnAccessCallback_DISPATCH(struct DispChannel *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__dispchnAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} +NV_STATUS dispchnGetRegBaseOffsetAndSize_IMPL(struct DispChannel *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); NV_STATUS dispchnConstruct_IMPL(struct DispChannel *arg_pDispChannel, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams, NvU32 arg_isDma); @@ -379,48 +434,57 @@ NV_STATUS dispchnGetByHandle_IMPL(struct RsClient *pClient, NvHandle hDisplayCha #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct DispChannelPio { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct DispChannel __nvoc_base_DispChannel; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct DispChannel *__nvoc_pbase_DispChannel; - struct DispChannelPio *__nvoc_pbase_DispChannelPio; - NvBool (*__dispchnpioShareCallback__)(struct DispChannelPio *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__dispchnpioCheckMemInterUnmap__)(struct DispChannelPio *, NvBool); - NV_STATUS (*__dispchnpioGetOrAllocNotifShare__)(struct DispChannelPio *, NvHandle, NvHandle, struct NotifShare **); - NV_STATUS (*__dispchnpioMapTo__)(struct DispChannelPio *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__dispchnpioGetMapAddrSpace__)(struct DispChannelPio *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__dispchnpioSetNotificationShare__)(struct DispChannelPio *, struct NotifShare *); - NvU32 (*__dispchnpioGetRefCount__)(struct DispChannelPio *); - void (*__dispchnpioAddAdditionalDependants__)(struct RsClient *, struct DispChannelPio *, RsResourceRef *); - NV_STATUS (*__dispchnpioControl_Prologue__)(struct DispChannelPio *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispchnpioGetRegBaseOffsetAndSize__)(struct DispChannelPio *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__dispchnpioInternalControlForward__)(struct DispChannelPio *, NvU32, void *, NvU32); - NV_STATUS (*__dispchnpioUnmapFrom__)(struct DispChannelPio *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__dispchnpioControl_Epilogue__)(struct DispChannelPio *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__dispchnpioGetInternalObjectHandle__)(struct DispChannelPio *); - NV_STATUS (*__dispchnpioControl__)(struct DispChannelPio *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispchnpioUnmap__)(struct DispChannelPio *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__dispchnpioGetMemInterMapParams__)(struct DispChannelPio *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__dispchnpioGetMemoryMappingDescriptor__)(struct DispChannelPio *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__dispchnpioControlFilter__)(struct DispChannelPio *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispchnpioUnregisterEvent__)(struct DispChannelPio *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__dispchnpioControlSerialization_Prologue__)(struct DispChannelPio *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__dispchnpioCanCopy__)(struct DispChannelPio *); - NvBool (*__dispchnpioIsPartialUnmapSupported__)(struct DispChannelPio *); - void (*__dispchnpioPreDestruct__)(struct DispChannelPio *); - NV_STATUS (*__dispchnpioIsDuplicate__)(struct DispChannelPio *, NvHandle, NvBool *); - void (*__dispchnpioControlSerialization_Epilogue__)(struct DispChannelPio *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__dispchnpioGetNotificationListPtr__)(struct DispChannelPio *); - struct NotifShare *(*__dispchnpioGetNotificationShare__)(struct DispChannelPio *); - NV_STATUS (*__dispchnpioMap__)(struct DispChannelPio *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__dispchnpioAccessCallback__)(struct DispChannelPio *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super^2 + struct INotifier *__nvoc_pbase_INotifier; // inotify super^3 + struct Notifier *__nvoc_pbase_Notifier; // notify super^2 + struct DispChannel *__nvoc_pbase_DispChannel; // dispchn super + struct DispChannelPio *__nvoc_pbase_DispChannelPio; // dispchnpio + + // Vtable with 30 per-object function pointers + NV_STATUS (*__dispchnpioGetRegBaseOffsetAndSize__)(struct DispChannelPio * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (dispchn) base (dispchn) + NV_STATUS (*__dispchnpioControl__)(struct DispChannelPio * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (dispchn) + NV_STATUS (*__dispchnpioMap__)(struct DispChannelPio * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (dispchn) + NV_STATUS (*__dispchnpioUnmap__)(struct DispChannelPio * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (dispchn) + NvBool (*__dispchnpioShareCallback__)(struct DispChannelPio * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (dispchn) + NV_STATUS (*__dispchnpioGetMapAddrSpace__)(struct DispChannelPio * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (dispchn) + NV_STATUS (*__dispchnpioInternalControlForward__)(struct DispChannelPio * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (dispchn) + NvHandle (*__dispchnpioGetInternalObjectHandle__)(struct DispChannelPio * /*this*/); // virtual inherited (gpures) base (dispchn) + NvBool (*__dispchnpioAccessCallback__)(struct DispChannelPio * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (dispchn) + NV_STATUS (*__dispchnpioGetMemInterMapParams__)(struct DispChannelPio * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (dispchn) + NV_STATUS (*__dispchnpioCheckMemInterUnmap__)(struct DispChannelPio * /*this*/, NvBool); // virtual inherited (rmres) base (dispchn) + NV_STATUS (*__dispchnpioGetMemoryMappingDescriptor__)(struct DispChannelPio * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (dispchn) + NV_STATUS (*__dispchnpioControlSerialization_Prologue__)(struct DispChannelPio * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (dispchn) + void (*__dispchnpioControlSerialization_Epilogue__)(struct DispChannelPio * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (dispchn) + NV_STATUS (*__dispchnpioControl_Prologue__)(struct DispChannelPio * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (dispchn) + void (*__dispchnpioControl_Epilogue__)(struct DispChannelPio * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (dispchn) + NvBool (*__dispchnpioCanCopy__)(struct DispChannelPio * /*this*/); // virtual inherited (res) base (dispchn) + NV_STATUS (*__dispchnpioIsDuplicate__)(struct DispChannelPio * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (dispchn) + void (*__dispchnpioPreDestruct__)(struct DispChannelPio * /*this*/); // virtual inherited (res) base (dispchn) + NV_STATUS (*__dispchnpioControlFilter__)(struct DispChannelPio * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (dispchn) + NvBool (*__dispchnpioIsPartialUnmapSupported__)(struct DispChannelPio * /*this*/); // inline virtual inherited (res) base (dispchn) body + NV_STATUS (*__dispchnpioMapTo__)(struct DispChannelPio * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (dispchn) + NV_STATUS (*__dispchnpioUnmapFrom__)(struct DispChannelPio * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (dispchn) + NvU32 (*__dispchnpioGetRefCount__)(struct DispChannelPio * /*this*/); // virtual inherited (res) base (dispchn) + void (*__dispchnpioAddAdditionalDependants__)(struct RsClient *, struct DispChannelPio * /*this*/, RsResourceRef *); // virtual inherited (res) base (dispchn) + PEVENTNOTIFICATION * (*__dispchnpioGetNotificationListPtr__)(struct DispChannelPio * /*this*/); // virtual inherited (notify) base (dispchn) + struct NotifShare * (*__dispchnpioGetNotificationShare__)(struct DispChannelPio * /*this*/); // virtual inherited (notify) base (dispchn) + void (*__dispchnpioSetNotificationShare__)(struct DispChannelPio * /*this*/, struct NotifShare *); // virtual inherited (notify) base (dispchn) + NV_STATUS (*__dispchnpioUnregisterEvent__)(struct DispChannelPio * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (dispchn) + NV_STATUS (*__dispchnpioGetOrAllocNotifShare__)(struct DispChannelPio * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (dispchn) }; #ifndef __NVOC_CLASS_DispChannelPio_TYPEDEF__ @@ -432,6 +496,7 @@ typedef struct DispChannelPio DispChannelPio; #define __nvoc_class_id_DispChannelPio 0x10dec3 #endif /* __nvoc_class_id_DispChannelPio */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_DispChannelPio; #define __staticCast_DispChannelPio(pThis) \ @@ -444,161 +509,194 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_DispChannelPio; ((DispChannelPio*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(DispChannelPio))) #endif //__nvoc_disp_channel_h_disabled - NV_STATUS __nvoc_objCreateDynamic_DispChannelPio(DispChannelPio**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_DispChannelPio(DispChannelPio**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_DispChannelPio(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_DispChannelPio((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define dispchnpioGetRegBaseOffsetAndSize_FNPTR(pDispChannel) pDispChannel->__nvoc_base_DispChannel.__dispchnGetRegBaseOffsetAndSize__ +#define dispchnpioGetRegBaseOffsetAndSize(pDispChannel, pGpu, pOffset, pSize) dispchnpioGetRegBaseOffsetAndSize_DISPATCH(pDispChannel, pGpu, pOffset, pSize) +#define dispchnpioControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresControl__ +#define dispchnpioControl(pGpuResource, pCallContext, pParams) dispchnpioControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define dispchnpioMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresMap__ +#define dispchnpioMap(pGpuResource, pCallContext, pParams, pCpuMapping) dispchnpioMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define dispchnpioUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresUnmap__ +#define dispchnpioUnmap(pGpuResource, pCallContext, pCpuMapping) dispchnpioUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define dispchnpioShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresShareCallback__ #define dispchnpioShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) dispchnpioShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define dispchnpioCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispchnpioCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define dispchnpioGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) dispchnpioGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -#define dispchnpioMapTo(pResource, pParams) dispchnpioMapTo_DISPATCH(pResource, pParams) +#define dispchnpioGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ #define dispchnpioGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) dispchnpioGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define dispchnpioSetNotificationShare(pNotifier, pNotifShare) dispchnpioSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define dispchnpioGetRefCount(pResource) dispchnpioGetRefCount_DISPATCH(pResource) -#define dispchnpioAddAdditionalDependants(pClient, pResource, pReference) dispchnpioAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define dispchnpioControl_Prologue(pResource, pCallContext, pParams) dispchnpioControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define dispchnpioGetRegBaseOffsetAndSize(pDispChannel, pGpu, pOffset, pSize) dispchnpioGetRegBaseOffsetAndSize_DISPATCH(pDispChannel, pGpu, pOffset, pSize) +#define dispchnpioInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define dispchnpioInternalControlForward(pGpuResource, command, pParams, size) dispchnpioInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define dispchnpioUnmapFrom(pResource, pParams) dispchnpioUnmapFrom_DISPATCH(pResource, pParams) -#define dispchnpioControl_Epilogue(pResource, pCallContext, pParams) dispchnpioControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispchnpioGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define dispchnpioGetInternalObjectHandle(pGpuResource) dispchnpioGetInternalObjectHandle_DISPATCH(pGpuResource) -#define dispchnpioControl(pGpuResource, pCallContext, pParams) dispchnpioControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define dispchnpioUnmap(pGpuResource, pCallContext, pCpuMapping) dispchnpioUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define dispchnpioAccessCallback_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define dispchnpioAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispchnpioAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define dispchnpioGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define dispchnpioGetMemInterMapParams(pRmResource, pParams) dispchnpioGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define dispchnpioCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define dispchnpioCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispchnpioCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define dispchnpioGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define dispchnpioGetMemoryMappingDescriptor(pRmResource, ppMemDesc) dispchnpioGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define dispchnpioControlFilter(pResource, pCallContext, pParams) dispchnpioControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define dispchnpioUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispchnpioUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define dispchnpioControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define dispchnpioControlSerialization_Prologue(pResource, pCallContext, pParams) dispchnpioControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dispchnpioControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dispchnpioControlSerialization_Epilogue(pResource, pCallContext, pParams) dispchnpioControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispchnpioControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define dispchnpioControl_Prologue(pResource, pCallContext, pParams) dispchnpioControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dispchnpioControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define dispchnpioControl_Epilogue(pResource, pCallContext, pParams) dispchnpioControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispchnpioCanCopy_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define dispchnpioCanCopy(pResource) dispchnpioCanCopy_DISPATCH(pResource) -#define dispchnpioIsPartialUnmapSupported(pResource) dispchnpioIsPartialUnmapSupported_DISPATCH(pResource) -#define dispchnpioPreDestruct(pResource) dispchnpioPreDestruct_DISPATCH(pResource) +#define dispchnpioIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define dispchnpioIsDuplicate(pResource, hMemory, pDuplicate) dispchnpioIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dispchnpioControlSerialization_Epilogue(pResource, pCallContext, pParams) dispchnpioControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispchnpioPreDestruct_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dispchnpioPreDestruct(pResource) dispchnpioPreDestruct_DISPATCH(pResource) +#define dispchnpioControlFilter_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dispchnpioControlFilter(pResource, pCallContext, pParams) dispchnpioControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define dispchnpioIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dispchnpioIsPartialUnmapSupported(pResource) dispchnpioIsPartialUnmapSupported_DISPATCH(pResource) +#define dispchnpioMapTo_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dispchnpioMapTo(pResource, pParams) dispchnpioMapTo_DISPATCH(pResource, pParams) +#define dispchnpioUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dispchnpioUnmapFrom(pResource, pParams) dispchnpioUnmapFrom_DISPATCH(pResource, pParams) +#define dispchnpioGetRefCount_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dispchnpioGetRefCount(pResource) dispchnpioGetRefCount_DISPATCH(pResource) +#define dispchnpioAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dispchnpioAddAdditionalDependants(pClient, pResource, pReference) dispchnpioAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define dispchnpioGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define dispchnpioGetNotificationListPtr(pNotifier) dispchnpioGetNotificationListPtr_DISPATCH(pNotifier) +#define dispchnpioGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__notifyGetNotificationShare__ #define dispchnpioGetNotificationShare(pNotifier) dispchnpioGetNotificationShare_DISPATCH(pNotifier) -#define dispchnpioMap(pGpuResource, pCallContext, pParams, pCpuMapping) dispchnpioMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define dispchnpioAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispchnpioAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -static inline NvBool dispchnpioShareCallback_DISPATCH(struct DispChannelPio *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__dispchnpioShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +#define dispchnpioSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define dispchnpioSetNotificationShare(pNotifier, pNotifShare) dispchnpioSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define dispchnpioUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define dispchnpioUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispchnpioUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define dispchnpioGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define dispchnpioGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) dispchnpioGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) + +// Dispatch functions +static inline NV_STATUS dispchnpioGetRegBaseOffsetAndSize_DISPATCH(struct DispChannelPio *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pDispChannel->__dispchnpioGetRegBaseOffsetAndSize__(pDispChannel, pGpu, pOffset, pSize); } -static inline NV_STATUS dispchnpioCheckMemInterUnmap_DISPATCH(struct DispChannelPio *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__dispchnpioCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS dispchnpioControl_DISPATCH(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__dispchnpioControl__(pGpuResource, pCallContext, pParams); } -static inline NV_STATUS dispchnpioGetOrAllocNotifShare_DISPATCH(struct DispChannelPio *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__dispchnpioGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); +static inline NV_STATUS dispchnpioMap_DISPATCH(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__dispchnpioMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS dispchnpioMapTo_DISPATCH(struct DispChannelPio *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dispchnpioMapTo__(pResource, pParams); +static inline NV_STATUS dispchnpioUnmap_DISPATCH(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__dispchnpioUnmap__(pGpuResource, pCallContext, pCpuMapping); +} + +static inline NvBool dispchnpioShareCallback_DISPATCH(struct DispChannelPio *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__dispchnpioShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS dispchnpioGetMapAddrSpace_DISPATCH(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__dispchnpioGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void dispchnpioSetNotificationShare_DISPATCH(struct DispChannelPio *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__dispchnpioSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS dispchnpioInternalControlForward_DISPATCH(struct DispChannelPio *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__dispchnpioInternalControlForward__(pGpuResource, command, pParams, size); } -static inline NvU32 dispchnpioGetRefCount_DISPATCH(struct DispChannelPio *pResource) { - return pResource->__dispchnpioGetRefCount__(pResource); +static inline NvHandle dispchnpioGetInternalObjectHandle_DISPATCH(struct DispChannelPio *pGpuResource) { + return pGpuResource->__dispchnpioGetInternalObjectHandle__(pGpuResource); } -static inline void dispchnpioAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispChannelPio *pResource, RsResourceRef *pReference) { - pResource->__dispchnpioAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvBool dispchnpioAccessCallback_DISPATCH(struct DispChannelPio *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__dispchnpioAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS dispchnpioControl_Prologue_DISPATCH(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispchnpioControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS dispchnpioGetMemInterMapParams_DISPATCH(struct DispChannelPio *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__dispchnpioGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS dispchnpioGetRegBaseOffsetAndSize_DISPATCH(struct DispChannelPio *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pDispChannel->__dispchnpioGetRegBaseOffsetAndSize__(pDispChannel, pGpu, pOffset, pSize); +static inline NV_STATUS dispchnpioCheckMemInterUnmap_DISPATCH(struct DispChannelPio *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__dispchnpioCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS dispchnpioInternalControlForward_DISPATCH(struct DispChannelPio *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__dispchnpioInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS dispchnpioGetMemoryMappingDescriptor_DISPATCH(struct DispChannelPio *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__dispchnpioGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NV_STATUS dispchnpioUnmapFrom_DISPATCH(struct DispChannelPio *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dispchnpioUnmapFrom__(pResource, pParams); +static inline NV_STATUS dispchnpioControlSerialization_Prologue_DISPATCH(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dispchnpioControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline void dispchnpioControl_Epilogue_DISPATCH(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispchnpioControl_Epilogue__(pResource, pCallContext, pParams); +static inline void dispchnpioControlSerialization_Epilogue_DISPATCH(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__dispchnpioControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NvHandle dispchnpioGetInternalObjectHandle_DISPATCH(struct DispChannelPio *pGpuResource) { - return pGpuResource->__dispchnpioGetInternalObjectHandle__(pGpuResource); +static inline NV_STATUS dispchnpioControl_Prologue_DISPATCH(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dispchnpioControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispchnpioControl_DISPATCH(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__dispchnpioControl__(pGpuResource, pCallContext, pParams); +static inline void dispchnpioControl_Epilogue_DISPATCH(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__dispchnpioControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispchnpioUnmap_DISPATCH(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispchnpioUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool dispchnpioCanCopy_DISPATCH(struct DispChannelPio *pResource) { + return pResource->__dispchnpioCanCopy__(pResource); } -static inline NV_STATUS dispchnpioGetMemInterMapParams_DISPATCH(struct DispChannelPio *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dispchnpioGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS dispchnpioIsDuplicate_DISPATCH(struct DispChannelPio *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__dispchnpioIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS dispchnpioGetMemoryMappingDescriptor_DISPATCH(struct DispChannelPio *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__dispchnpioGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void dispchnpioPreDestruct_DISPATCH(struct DispChannelPio *pResource) { + pResource->__dispchnpioPreDestruct__(pResource); } static inline NV_STATUS dispchnpioControlFilter_DISPATCH(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__dispchnpioControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispchnpioUnregisterEvent_DISPATCH(struct DispChannelPio *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__dispchnpioUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static inline NV_STATUS dispchnpioControlSerialization_Prologue_DISPATCH(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispchnpioControlSerialization_Prologue__(pResource, pCallContext, pParams); -} - -static inline NvBool dispchnpioCanCopy_DISPATCH(struct DispChannelPio *pResource) { - return pResource->__dispchnpioCanCopy__(pResource); -} - static inline NvBool dispchnpioIsPartialUnmapSupported_DISPATCH(struct DispChannelPio *pResource) { return pResource->__dispchnpioIsPartialUnmapSupported__(pResource); } -static inline void dispchnpioPreDestruct_DISPATCH(struct DispChannelPio *pResource) { - pResource->__dispchnpioPreDestruct__(pResource); +static inline NV_STATUS dispchnpioMapTo_DISPATCH(struct DispChannelPio *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__dispchnpioMapTo__(pResource, pParams); } -static inline NV_STATUS dispchnpioIsDuplicate_DISPATCH(struct DispChannelPio *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dispchnpioIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS dispchnpioUnmapFrom_DISPATCH(struct DispChannelPio *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__dispchnpioUnmapFrom__(pResource, pParams); } -static inline void dispchnpioControlSerialization_Epilogue_DISPATCH(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispchnpioControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 dispchnpioGetRefCount_DISPATCH(struct DispChannelPio *pResource) { + return pResource->__dispchnpioGetRefCount__(pResource); +} + +static inline void dispchnpioAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispChannelPio *pResource, RsResourceRef *pReference) { + pResource->__dispchnpioAddAdditionalDependants__(pClient, pResource, pReference); } -static inline PEVENTNOTIFICATION *dispchnpioGetNotificationListPtr_DISPATCH(struct DispChannelPio *pNotifier) { +static inline PEVENTNOTIFICATION * dispchnpioGetNotificationListPtr_DISPATCH(struct DispChannelPio *pNotifier) { return pNotifier->__dispchnpioGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *dispchnpioGetNotificationShare_DISPATCH(struct DispChannelPio *pNotifier) { +static inline struct NotifShare * dispchnpioGetNotificationShare_DISPATCH(struct DispChannelPio *pNotifier) { return pNotifier->__dispchnpioGetNotificationShare__(pNotifier); } -static inline NV_STATUS dispchnpioMap_DISPATCH(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispchnpioMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void dispchnpioSetNotificationShare_DISPATCH(struct DispChannelPio *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__dispchnpioSetNotificationShare__(pNotifier, pNotifShare); } -static inline NvBool dispchnpioAccessCallback_DISPATCH(struct DispChannelPio *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__dispchnpioAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS dispchnpioUnregisterEvent_DISPATCH(struct DispChannelPio *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__dispchnpioUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +} + +static inline NV_STATUS dispchnpioGetOrAllocNotifShare_DISPATCH(struct DispChannelPio *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return pNotifier->__dispchnpioGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS dispchnpioConstruct_IMPL(struct DispChannelPio *arg_pDispChannelPio, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); @@ -620,48 +718,57 @@ NV_STATUS dispchnpioConstruct_IMPL(struct DispChannelPio *arg_pDispChannelPio, s #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct DispChannelDma { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct DispChannel __nvoc_base_DispChannel; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct DispChannel *__nvoc_pbase_DispChannel; - struct DispChannelDma *__nvoc_pbase_DispChannelDma; - NvBool (*__dispchndmaShareCallback__)(struct DispChannelDma *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__dispchndmaCheckMemInterUnmap__)(struct DispChannelDma *, NvBool); - NV_STATUS (*__dispchndmaGetOrAllocNotifShare__)(struct DispChannelDma *, NvHandle, NvHandle, struct NotifShare **); - NV_STATUS (*__dispchndmaMapTo__)(struct DispChannelDma *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__dispchndmaGetMapAddrSpace__)(struct DispChannelDma *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__dispchndmaSetNotificationShare__)(struct DispChannelDma *, struct NotifShare *); - NvU32 (*__dispchndmaGetRefCount__)(struct DispChannelDma *); - void (*__dispchndmaAddAdditionalDependants__)(struct RsClient *, struct DispChannelDma *, RsResourceRef *); - NV_STATUS (*__dispchndmaControl_Prologue__)(struct DispChannelDma *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispchndmaGetRegBaseOffsetAndSize__)(struct DispChannelDma *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__dispchndmaInternalControlForward__)(struct DispChannelDma *, NvU32, void *, NvU32); - NV_STATUS (*__dispchndmaUnmapFrom__)(struct DispChannelDma *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__dispchndmaControl_Epilogue__)(struct DispChannelDma *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__dispchndmaGetInternalObjectHandle__)(struct DispChannelDma *); - NV_STATUS (*__dispchndmaControl__)(struct DispChannelDma *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispchndmaUnmap__)(struct DispChannelDma *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__dispchndmaGetMemInterMapParams__)(struct DispChannelDma *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__dispchndmaGetMemoryMappingDescriptor__)(struct DispChannelDma *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__dispchndmaControlFilter__)(struct DispChannelDma *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispchndmaUnregisterEvent__)(struct DispChannelDma *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__dispchndmaControlSerialization_Prologue__)(struct DispChannelDma *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__dispchndmaCanCopy__)(struct DispChannelDma *); - NvBool (*__dispchndmaIsPartialUnmapSupported__)(struct DispChannelDma *); - void (*__dispchndmaPreDestruct__)(struct DispChannelDma *); - NV_STATUS (*__dispchndmaIsDuplicate__)(struct DispChannelDma *, NvHandle, NvBool *); - void (*__dispchndmaControlSerialization_Epilogue__)(struct DispChannelDma *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__dispchndmaGetNotificationListPtr__)(struct DispChannelDma *); - struct NotifShare *(*__dispchndmaGetNotificationShare__)(struct DispChannelDma *); - NV_STATUS (*__dispchndmaMap__)(struct DispChannelDma *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__dispchndmaAccessCallback__)(struct DispChannelDma *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super^2 + struct INotifier *__nvoc_pbase_INotifier; // inotify super^3 + struct Notifier *__nvoc_pbase_Notifier; // notify super^2 + struct DispChannel *__nvoc_pbase_DispChannel; // dispchn super + struct DispChannelDma *__nvoc_pbase_DispChannelDma; // dispchndma + + // Vtable with 30 per-object function pointers + NV_STATUS (*__dispchndmaGetRegBaseOffsetAndSize__)(struct DispChannelDma * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (dispchn) base (dispchn) + NV_STATUS (*__dispchndmaControl__)(struct DispChannelDma * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (dispchn) + NV_STATUS (*__dispchndmaMap__)(struct DispChannelDma * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (dispchn) + NV_STATUS (*__dispchndmaUnmap__)(struct DispChannelDma * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (dispchn) + NvBool (*__dispchndmaShareCallback__)(struct DispChannelDma * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (dispchn) + NV_STATUS (*__dispchndmaGetMapAddrSpace__)(struct DispChannelDma * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (dispchn) + NV_STATUS (*__dispchndmaInternalControlForward__)(struct DispChannelDma * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (dispchn) + NvHandle (*__dispchndmaGetInternalObjectHandle__)(struct DispChannelDma * /*this*/); // virtual inherited (gpures) base (dispchn) + NvBool (*__dispchndmaAccessCallback__)(struct DispChannelDma * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (dispchn) + NV_STATUS (*__dispchndmaGetMemInterMapParams__)(struct DispChannelDma * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (dispchn) + NV_STATUS (*__dispchndmaCheckMemInterUnmap__)(struct DispChannelDma * /*this*/, NvBool); // virtual inherited (rmres) base (dispchn) + NV_STATUS (*__dispchndmaGetMemoryMappingDescriptor__)(struct DispChannelDma * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (dispchn) + NV_STATUS (*__dispchndmaControlSerialization_Prologue__)(struct DispChannelDma * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (dispchn) + void (*__dispchndmaControlSerialization_Epilogue__)(struct DispChannelDma * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (dispchn) + NV_STATUS (*__dispchndmaControl_Prologue__)(struct DispChannelDma * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (dispchn) + void (*__dispchndmaControl_Epilogue__)(struct DispChannelDma * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (dispchn) + NvBool (*__dispchndmaCanCopy__)(struct DispChannelDma * /*this*/); // virtual inherited (res) base (dispchn) + NV_STATUS (*__dispchndmaIsDuplicate__)(struct DispChannelDma * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (dispchn) + void (*__dispchndmaPreDestruct__)(struct DispChannelDma * /*this*/); // virtual inherited (res) base (dispchn) + NV_STATUS (*__dispchndmaControlFilter__)(struct DispChannelDma * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (dispchn) + NvBool (*__dispchndmaIsPartialUnmapSupported__)(struct DispChannelDma * /*this*/); // inline virtual inherited (res) base (dispchn) body + NV_STATUS (*__dispchndmaMapTo__)(struct DispChannelDma * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (dispchn) + NV_STATUS (*__dispchndmaUnmapFrom__)(struct DispChannelDma * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (dispchn) + NvU32 (*__dispchndmaGetRefCount__)(struct DispChannelDma * /*this*/); // virtual inherited (res) base (dispchn) + void (*__dispchndmaAddAdditionalDependants__)(struct RsClient *, struct DispChannelDma * /*this*/, RsResourceRef *); // virtual inherited (res) base (dispchn) + PEVENTNOTIFICATION * (*__dispchndmaGetNotificationListPtr__)(struct DispChannelDma * /*this*/); // virtual inherited (notify) base (dispchn) + struct NotifShare * (*__dispchndmaGetNotificationShare__)(struct DispChannelDma * /*this*/); // virtual inherited (notify) base (dispchn) + void (*__dispchndmaSetNotificationShare__)(struct DispChannelDma * /*this*/, struct NotifShare *); // virtual inherited (notify) base (dispchn) + NV_STATUS (*__dispchndmaUnregisterEvent__)(struct DispChannelDma * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (dispchn) + NV_STATUS (*__dispchndmaGetOrAllocNotifShare__)(struct DispChannelDma * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (dispchn) }; #ifndef __NVOC_CLASS_DispChannelDma_TYPEDEF__ @@ -673,6 +780,7 @@ typedef struct DispChannelDma DispChannelDma; #define __nvoc_class_id_DispChannelDma 0xfe3d2e #endif /* __nvoc_class_id_DispChannelDma */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_DispChannelDma; #define __staticCast_DispChannelDma(pThis) \ @@ -685,161 +793,194 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_DispChannelDma; ((DispChannelDma*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(DispChannelDma))) #endif //__nvoc_disp_channel_h_disabled - NV_STATUS __nvoc_objCreateDynamic_DispChannelDma(DispChannelDma**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_DispChannelDma(DispChannelDma**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_DispChannelDma(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_DispChannelDma((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define dispchndmaGetRegBaseOffsetAndSize_FNPTR(pDispChannel) pDispChannel->__nvoc_base_DispChannel.__dispchnGetRegBaseOffsetAndSize__ +#define dispchndmaGetRegBaseOffsetAndSize(pDispChannel, pGpu, pOffset, pSize) dispchndmaGetRegBaseOffsetAndSize_DISPATCH(pDispChannel, pGpu, pOffset, pSize) +#define dispchndmaControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresControl__ +#define dispchndmaControl(pGpuResource, pCallContext, pParams) dispchndmaControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define dispchndmaMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresMap__ +#define dispchndmaMap(pGpuResource, pCallContext, pParams, pCpuMapping) dispchndmaMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define dispchndmaUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresUnmap__ +#define dispchndmaUnmap(pGpuResource, pCallContext, pCpuMapping) dispchndmaUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define dispchndmaShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresShareCallback__ #define dispchndmaShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) dispchndmaShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define dispchndmaCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispchndmaCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define dispchndmaGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) dispchndmaGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -#define dispchndmaMapTo(pResource, pParams) dispchndmaMapTo_DISPATCH(pResource, pParams) +#define dispchndmaGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ #define dispchndmaGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) dispchndmaGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define dispchndmaSetNotificationShare(pNotifier, pNotifShare) dispchndmaSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define dispchndmaGetRefCount(pResource) dispchndmaGetRefCount_DISPATCH(pResource) -#define dispchndmaAddAdditionalDependants(pClient, pResource, pReference) dispchndmaAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define dispchndmaControl_Prologue(pResource, pCallContext, pParams) dispchndmaControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define dispchndmaGetRegBaseOffsetAndSize(pDispChannel, pGpu, pOffset, pSize) dispchndmaGetRegBaseOffsetAndSize_DISPATCH(pDispChannel, pGpu, pOffset, pSize) +#define dispchndmaInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define dispchndmaInternalControlForward(pGpuResource, command, pParams, size) dispchndmaInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define dispchndmaUnmapFrom(pResource, pParams) dispchndmaUnmapFrom_DISPATCH(pResource, pParams) -#define dispchndmaControl_Epilogue(pResource, pCallContext, pParams) dispchndmaControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispchndmaGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define dispchndmaGetInternalObjectHandle(pGpuResource) dispchndmaGetInternalObjectHandle_DISPATCH(pGpuResource) -#define dispchndmaControl(pGpuResource, pCallContext, pParams) dispchndmaControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define dispchndmaUnmap(pGpuResource, pCallContext, pCpuMapping) dispchndmaUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define dispchndmaAccessCallback_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define dispchndmaAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispchndmaAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define dispchndmaGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define dispchndmaGetMemInterMapParams(pRmResource, pParams) dispchndmaGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define dispchndmaCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define dispchndmaCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispchndmaCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define dispchndmaGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define dispchndmaGetMemoryMappingDescriptor(pRmResource, ppMemDesc) dispchndmaGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define dispchndmaControlFilter(pResource, pCallContext, pParams) dispchndmaControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define dispchndmaUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispchndmaUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define dispchndmaControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define dispchndmaControlSerialization_Prologue(pResource, pCallContext, pParams) dispchndmaControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dispchndmaControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dispchndmaControlSerialization_Epilogue(pResource, pCallContext, pParams) dispchndmaControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispchndmaControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define dispchndmaControl_Prologue(pResource, pCallContext, pParams) dispchndmaControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dispchndmaControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define dispchndmaControl_Epilogue(pResource, pCallContext, pParams) dispchndmaControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispchndmaCanCopy_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define dispchndmaCanCopy(pResource) dispchndmaCanCopy_DISPATCH(pResource) -#define dispchndmaIsPartialUnmapSupported(pResource) dispchndmaIsPartialUnmapSupported_DISPATCH(pResource) -#define dispchndmaPreDestruct(pResource) dispchndmaPreDestruct_DISPATCH(pResource) +#define dispchndmaIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define dispchndmaIsDuplicate(pResource, hMemory, pDuplicate) dispchndmaIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dispchndmaControlSerialization_Epilogue(pResource, pCallContext, pParams) dispchndmaControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispchndmaPreDestruct_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dispchndmaPreDestruct(pResource) dispchndmaPreDestruct_DISPATCH(pResource) +#define dispchndmaControlFilter_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dispchndmaControlFilter(pResource, pCallContext, pParams) dispchndmaControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define dispchndmaIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dispchndmaIsPartialUnmapSupported(pResource) dispchndmaIsPartialUnmapSupported_DISPATCH(pResource) +#define dispchndmaMapTo_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dispchndmaMapTo(pResource, pParams) dispchndmaMapTo_DISPATCH(pResource, pParams) +#define dispchndmaUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dispchndmaUnmapFrom(pResource, pParams) dispchndmaUnmapFrom_DISPATCH(pResource, pParams) +#define dispchndmaGetRefCount_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dispchndmaGetRefCount(pResource) dispchndmaGetRefCount_DISPATCH(pResource) +#define dispchndmaAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dispchndmaAddAdditionalDependants(pClient, pResource, pReference) dispchndmaAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define dispchndmaGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define dispchndmaGetNotificationListPtr(pNotifier) dispchndmaGetNotificationListPtr_DISPATCH(pNotifier) +#define dispchndmaGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__notifyGetNotificationShare__ #define dispchndmaGetNotificationShare(pNotifier) dispchndmaGetNotificationShare_DISPATCH(pNotifier) -#define dispchndmaMap(pGpuResource, pCallContext, pParams, pCpuMapping) dispchndmaMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define dispchndmaAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispchndmaAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -static inline NvBool dispchndmaShareCallback_DISPATCH(struct DispChannelDma *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__dispchndmaShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +#define dispchndmaSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define dispchndmaSetNotificationShare(pNotifier, pNotifShare) dispchndmaSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define dispchndmaUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define dispchndmaUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispchndmaUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define dispchndmaGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define dispchndmaGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) dispchndmaGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) + +// Dispatch functions +static inline NV_STATUS dispchndmaGetRegBaseOffsetAndSize_DISPATCH(struct DispChannelDma *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pDispChannel->__dispchndmaGetRegBaseOffsetAndSize__(pDispChannel, pGpu, pOffset, pSize); } -static inline NV_STATUS dispchndmaCheckMemInterUnmap_DISPATCH(struct DispChannelDma *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__dispchndmaCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS dispchndmaControl_DISPATCH(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__dispchndmaControl__(pGpuResource, pCallContext, pParams); } -static inline NV_STATUS dispchndmaGetOrAllocNotifShare_DISPATCH(struct DispChannelDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__dispchndmaGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); +static inline NV_STATUS dispchndmaMap_DISPATCH(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__dispchndmaMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS dispchndmaMapTo_DISPATCH(struct DispChannelDma *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dispchndmaMapTo__(pResource, pParams); +static inline NV_STATUS dispchndmaUnmap_DISPATCH(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__dispchndmaUnmap__(pGpuResource, pCallContext, pCpuMapping); +} + +static inline NvBool dispchndmaShareCallback_DISPATCH(struct DispChannelDma *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__dispchndmaShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS dispchndmaGetMapAddrSpace_DISPATCH(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__dispchndmaGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void dispchndmaSetNotificationShare_DISPATCH(struct DispChannelDma *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__dispchndmaSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS dispchndmaInternalControlForward_DISPATCH(struct DispChannelDma *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__dispchndmaInternalControlForward__(pGpuResource, command, pParams, size); } -static inline NvU32 dispchndmaGetRefCount_DISPATCH(struct DispChannelDma *pResource) { - return pResource->__dispchndmaGetRefCount__(pResource); +static inline NvHandle dispchndmaGetInternalObjectHandle_DISPATCH(struct DispChannelDma *pGpuResource) { + return pGpuResource->__dispchndmaGetInternalObjectHandle__(pGpuResource); } -static inline void dispchndmaAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispChannelDma *pResource, RsResourceRef *pReference) { - pResource->__dispchndmaAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvBool dispchndmaAccessCallback_DISPATCH(struct DispChannelDma *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__dispchndmaAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS dispchndmaControl_Prologue_DISPATCH(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispchndmaControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS dispchndmaGetMemInterMapParams_DISPATCH(struct DispChannelDma *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__dispchndmaGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS dispchndmaGetRegBaseOffsetAndSize_DISPATCH(struct DispChannelDma *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pDispChannel->__dispchndmaGetRegBaseOffsetAndSize__(pDispChannel, pGpu, pOffset, pSize); +static inline NV_STATUS dispchndmaCheckMemInterUnmap_DISPATCH(struct DispChannelDma *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__dispchndmaCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS dispchndmaInternalControlForward_DISPATCH(struct DispChannelDma *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__dispchndmaInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS dispchndmaGetMemoryMappingDescriptor_DISPATCH(struct DispChannelDma *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__dispchndmaGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NV_STATUS dispchndmaUnmapFrom_DISPATCH(struct DispChannelDma *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dispchndmaUnmapFrom__(pResource, pParams); +static inline NV_STATUS dispchndmaControlSerialization_Prologue_DISPATCH(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dispchndmaControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline void dispchndmaControl_Epilogue_DISPATCH(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispchndmaControl_Epilogue__(pResource, pCallContext, pParams); +static inline void dispchndmaControlSerialization_Epilogue_DISPATCH(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__dispchndmaControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NvHandle dispchndmaGetInternalObjectHandle_DISPATCH(struct DispChannelDma *pGpuResource) { - return pGpuResource->__dispchndmaGetInternalObjectHandle__(pGpuResource); +static inline NV_STATUS dispchndmaControl_Prologue_DISPATCH(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dispchndmaControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispchndmaControl_DISPATCH(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__dispchndmaControl__(pGpuResource, pCallContext, pParams); +static inline void dispchndmaControl_Epilogue_DISPATCH(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__dispchndmaControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispchndmaUnmap_DISPATCH(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispchndmaUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool dispchndmaCanCopy_DISPATCH(struct DispChannelDma *pResource) { + return pResource->__dispchndmaCanCopy__(pResource); } -static inline NV_STATUS dispchndmaGetMemInterMapParams_DISPATCH(struct DispChannelDma *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dispchndmaGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS dispchndmaIsDuplicate_DISPATCH(struct DispChannelDma *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__dispchndmaIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS dispchndmaGetMemoryMappingDescriptor_DISPATCH(struct DispChannelDma *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__dispchndmaGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void dispchndmaPreDestruct_DISPATCH(struct DispChannelDma *pResource) { + pResource->__dispchndmaPreDestruct__(pResource); } static inline NV_STATUS dispchndmaControlFilter_DISPATCH(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__dispchndmaControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispchndmaUnregisterEvent_DISPATCH(struct DispChannelDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__dispchndmaUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static inline NV_STATUS dispchndmaControlSerialization_Prologue_DISPATCH(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispchndmaControlSerialization_Prologue__(pResource, pCallContext, pParams); -} - -static inline NvBool dispchndmaCanCopy_DISPATCH(struct DispChannelDma *pResource) { - return pResource->__dispchndmaCanCopy__(pResource); -} - static inline NvBool dispchndmaIsPartialUnmapSupported_DISPATCH(struct DispChannelDma *pResource) { return pResource->__dispchndmaIsPartialUnmapSupported__(pResource); } -static inline void dispchndmaPreDestruct_DISPATCH(struct DispChannelDma *pResource) { - pResource->__dispchndmaPreDestruct__(pResource); +static inline NV_STATUS dispchndmaMapTo_DISPATCH(struct DispChannelDma *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__dispchndmaMapTo__(pResource, pParams); } -static inline NV_STATUS dispchndmaIsDuplicate_DISPATCH(struct DispChannelDma *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dispchndmaIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS dispchndmaUnmapFrom_DISPATCH(struct DispChannelDma *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__dispchndmaUnmapFrom__(pResource, pParams); } -static inline void dispchndmaControlSerialization_Epilogue_DISPATCH(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispchndmaControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 dispchndmaGetRefCount_DISPATCH(struct DispChannelDma *pResource) { + return pResource->__dispchndmaGetRefCount__(pResource); } -static inline PEVENTNOTIFICATION *dispchndmaGetNotificationListPtr_DISPATCH(struct DispChannelDma *pNotifier) { +static inline void dispchndmaAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispChannelDma *pResource, RsResourceRef *pReference) { + pResource->__dispchndmaAddAdditionalDependants__(pClient, pResource, pReference); +} + +static inline PEVENTNOTIFICATION * dispchndmaGetNotificationListPtr_DISPATCH(struct DispChannelDma *pNotifier) { return pNotifier->__dispchndmaGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *dispchndmaGetNotificationShare_DISPATCH(struct DispChannelDma *pNotifier) { +static inline struct NotifShare * dispchndmaGetNotificationShare_DISPATCH(struct DispChannelDma *pNotifier) { return pNotifier->__dispchndmaGetNotificationShare__(pNotifier); } -static inline NV_STATUS dispchndmaMap_DISPATCH(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispchndmaMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void dispchndmaSetNotificationShare_DISPATCH(struct DispChannelDma *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__dispchndmaSetNotificationShare__(pNotifier, pNotifShare); } -static inline NvBool dispchndmaAccessCallback_DISPATCH(struct DispChannelDma *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__dispchndmaAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS dispchndmaUnregisterEvent_DISPATCH(struct DispChannelDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__dispchndmaUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +} + +static inline NV_STATUS dispchndmaGetOrAllocNotifShare_DISPATCH(struct DispChannelDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return pNotifier->__dispchndmaGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS dispchndmaConstruct_IMPL(struct DispChannelDma *arg_pDispChannelDma, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_disp_inst_mem_nvoc.c b/src/nvidia/generated/g_disp_inst_mem_nvoc.c index a6cd516c0e..0c45983970 100644 --- a/src/nvidia/generated/g_disp_inst_mem_nvoc.c +++ b/src/nvidia/generated/g_disp_inst_mem_nvoc.c @@ -98,6 +98,7 @@ NV_STATUS __nvoc_ctor_DisplayInstanceMemory(DisplayInstanceMemory *pThis, RmHals return status; } +// Vtable initialization static void __nvoc_init_funcTable_DisplayInstanceMemory_1(DisplayInstanceMemory *pThis, RmHalspecOwner *pRmhalspecowner) { DispIpHal *dispIpHal = &pRmhalspecowner->dispIpHal; const unsigned long dispIpHal_HalVarIdx = (unsigned long)dispIpHal->__nvoc_HalVarIdx; @@ -106,8 +107,8 @@ static void __nvoc_init_funcTable_DisplayInstanceMemory_1(DisplayInstanceMemory PORT_UNREFERENCED_VARIABLE(dispIpHal); PORT_UNREFERENCED_VARIABLE(dispIpHal_HalVarIdx); - // Hal function -- instmemGetSize - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00020000UL) )) /* DispIpHal: DISPv0000 */ + // instmemGetSize -- halified (2 hals) body + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__instmemGetSize__ = &instmemGetSize_f2d351; } @@ -116,8 +117,8 @@ static void __nvoc_init_funcTable_DisplayInstanceMemory_1(DisplayInstanceMemory pThis->__instmemGetSize__ = &instmemGetSize_v03_00; } - // Hal function -- instmemGetHashTableBaseAddr - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00020000UL) )) /* DispIpHal: DISPv0000 */ + // instmemGetHashTableBaseAddr -- halified (2 hals) body + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__instmemGetHashTableBaseAddr__ = &instmemGetHashTableBaseAddr_4a4dee; } @@ -126,8 +127,8 @@ static void __nvoc_init_funcTable_DisplayInstanceMemory_1(DisplayInstanceMemory pThis->__instmemGetHashTableBaseAddr__ = &instmemGetHashTableBaseAddr_v03_00; } - // Hal function -- instmemIsValid - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00020000UL) )) /* DispIpHal: DISPv0000 */ + // instmemIsValid -- halified (2 hals) body + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__instmemIsValid__ = &instmemIsValid_491d52; } @@ -136,8 +137,8 @@ static void __nvoc_init_funcTable_DisplayInstanceMemory_1(DisplayInstanceMemory pThis->__instmemIsValid__ = &instmemIsValid_v03_00; } - // Hal function -- instmemGenerateHashTableData - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00020000UL) )) /* DispIpHal: DISPv0000 */ + // instmemGenerateHashTableData -- halified (2 hals) body + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__instmemGenerateHashTableData__ = &instmemGenerateHashTableData_4a4dee; } @@ -146,8 +147,8 @@ static void __nvoc_init_funcTable_DisplayInstanceMemory_1(DisplayInstanceMemory pThis->__instmemGenerateHashTableData__ = &instmemGenerateHashTableData_v03_00; } - // Hal function -- instmemHashFunc - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00020000UL) )) /* DispIpHal: DISPv0000 */ + // instmemHashFunc -- halified (2 hals) body + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__instmemHashFunc__ = &instmemHashFunc_46f6a7; } @@ -156,8 +157,8 @@ static void __nvoc_init_funcTable_DisplayInstanceMemory_1(DisplayInstanceMemory pThis->__instmemHashFunc__ = &instmemHashFunc_v03_00; } - // Hal function -- instmemCommitContextDma - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00020000UL) )) /* DispIpHal: DISPv0000 */ + // instmemCommitContextDma -- halified (2 hals) body + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__instmemCommitContextDma__ = &instmemCommitContextDma_46f6a7; } @@ -166,8 +167,8 @@ static void __nvoc_init_funcTable_DisplayInstanceMemory_1(DisplayInstanceMemory pThis->__instmemCommitContextDma__ = &instmemCommitContextDma_v03_00; } - // Hal function -- instmemUpdateContextDma - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00020000UL) )) /* DispIpHal: DISPv0000 */ + // instmemUpdateContextDma -- halified (2 hals) body + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__instmemUpdateContextDma__ = &instmemUpdateContextDma_46f6a7; } @@ -175,9 +176,13 @@ static void __nvoc_init_funcTable_DisplayInstanceMemory_1(DisplayInstanceMemory { pThis->__instmemUpdateContextDma__ = &instmemUpdateContextDma_v03_00; } -} +} // End __nvoc_init_funcTable_DisplayInstanceMemory_1 with approximately 14 basic block(s). + +// Initialize vtable(s) for 7 virtual method(s). void __nvoc_init_funcTable_DisplayInstanceMemory(DisplayInstanceMemory *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 7 per-object function pointer(s). __nvoc_init_funcTable_DisplayInstanceMemory_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_disp_inst_mem_nvoc.h b/src/nvidia/generated/g_disp_inst_mem_nvoc.h index 00e8dd86aa..543ad905dd 100644 --- a/src/nvidia/generated/g_disp_inst_mem_nvoc.h +++ b/src/nvidia/generated/g_disp_inst_mem_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_DISP_INST_MEM_NVOC_H_ #define _G_DISP_INST_MEM_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_disp_inst_mem_nvoc.h" #ifndef DISPLAY_INSTANCE_MEMORY_H @@ -43,6 +51,7 @@ extern "C" { /* ------------------------ Forward Declaration ---------------------------- */ typedef struct OBJEHEAP OBJEHEAP; + struct DispChannel; #ifndef __NVOC_CLASS_DispChannel_TYPEDEF__ @@ -55,6 +64,7 @@ typedef struct DispChannel DispChannel; #endif /* __nvoc_class_id_DispChannel */ + struct ContextDma; #ifndef __NVOC_CLASS_ContextDma_TYPEDEF__ @@ -92,18 +102,29 @@ typedef struct #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct DisplayInstanceMemory { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct DisplayInstanceMemory *__nvoc_pbase_DisplayInstanceMemory; - void (*__instmemGetSize__)(OBJGPU *, struct DisplayInstanceMemory *, NvU32 *, NvU32 *); - NvU32 (*__instmemGetHashTableBaseAddr__)(OBJGPU *, struct DisplayInstanceMemory *); - NvBool (*__instmemIsValid__)(OBJGPU *, struct DisplayInstanceMemory *, NvU32); - NvU32 (*__instmemGenerateHashTableData__)(OBJGPU *, struct DisplayInstanceMemory *, NvU32, NvU32, NvU32); - NV_STATUS (*__instmemHashFunc__)(OBJGPU *, struct DisplayInstanceMemory *, NvHandle, NvHandle, NvU32, NvU32 *); - NV_STATUS (*__instmemCommitContextDma__)(OBJGPU *, struct DisplayInstanceMemory *, struct ContextDma *); - NV_STATUS (*__instmemUpdateContextDma__)(OBJGPU *, struct DisplayInstanceMemory *, struct ContextDma *, NvU64 *, NvU64 *, NvHandle, NvU32); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct DisplayInstanceMemory *__nvoc_pbase_DisplayInstanceMemory; // instmem + + // Vtable with 7 per-object function pointers + void (*__instmemGetSize__)(OBJGPU *, struct DisplayInstanceMemory * /*this*/, NvU32 *, NvU32 *); // halified (2 hals) body + NvU32 (*__instmemGetHashTableBaseAddr__)(OBJGPU *, struct DisplayInstanceMemory * /*this*/); // halified (2 hals) body + NvBool (*__instmemIsValid__)(OBJGPU *, struct DisplayInstanceMemory * /*this*/, NvU32); // halified (2 hals) body + NvU32 (*__instmemGenerateHashTableData__)(OBJGPU *, struct DisplayInstanceMemory * /*this*/, NvU32, NvU32, NvU32); // halified (2 hals) body + NV_STATUS (*__instmemHashFunc__)(OBJGPU *, struct DisplayInstanceMemory * /*this*/, NvHandle, NvHandle, NvU32, NvU32 *); // halified (2 hals) body + NV_STATUS (*__instmemCommitContextDma__)(OBJGPU *, struct DisplayInstanceMemory * /*this*/, struct ContextDma *); // halified (2 hals) body + NV_STATUS (*__instmemUpdateContextDma__)(OBJGPU *, struct DisplayInstanceMemory * /*this*/, struct ContextDma *, NvU64 *, NvU64 *, NvHandle, NvU32); // halified (2 hals) body + + // Data members NV_ADDRESS_SPACE instMemAddrSpace; NvU32 instMemAttr; NvU64 instMemBase; @@ -126,6 +147,7 @@ typedef struct DisplayInstanceMemory DisplayInstanceMemory; #define __nvoc_class_id_DisplayInstanceMemory 0x8223e2 #endif /* __nvoc_class_id_DisplayInstanceMemory */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_DisplayInstanceMemory; #define __staticCast_DisplayInstanceMemory(pThis) \ @@ -138,27 +160,65 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_DisplayInstanceMemory; ((DisplayInstanceMemory*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(DisplayInstanceMemory))) #endif //__nvoc_disp_inst_mem_h_disabled - NV_STATUS __nvoc_objCreateDynamic_DisplayInstanceMemory(DisplayInstanceMemory**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_DisplayInstanceMemory(DisplayInstanceMemory**, Dynamic*, NvU32); #define __objCreate_DisplayInstanceMemory(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_DisplayInstanceMemory((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define instmemGetSize_FNPTR(pInstMem) pInstMem->__instmemGetSize__ #define instmemGetSize(pGpu, pInstMem, pTotalInstMemSize, pHashTableSize) instmemGetSize_DISPATCH(pGpu, pInstMem, pTotalInstMemSize, pHashTableSize) #define instmemGetSize_HAL(pGpu, pInstMem, pTotalInstMemSize, pHashTableSize) instmemGetSize_DISPATCH(pGpu, pInstMem, pTotalInstMemSize, pHashTableSize) +#define instmemGetHashTableBaseAddr_FNPTR(pInstMem) pInstMem->__instmemGetHashTableBaseAddr__ #define instmemGetHashTableBaseAddr(pGpu, pInstMem) instmemGetHashTableBaseAddr_DISPATCH(pGpu, pInstMem) #define instmemGetHashTableBaseAddr_HAL(pGpu, pInstMem) instmemGetHashTableBaseAddr_DISPATCH(pGpu, pInstMem) +#define instmemIsValid_FNPTR(pInstMem) pInstMem->__instmemIsValid__ #define instmemIsValid(pGpu, pInstMem, offset) instmemIsValid_DISPATCH(pGpu, pInstMem, offset) #define instmemIsValid_HAL(pGpu, pInstMem, offset) instmemIsValid_DISPATCH(pGpu, pInstMem, offset) +#define instmemGenerateHashTableData_FNPTR(pInstMem) pInstMem->__instmemGenerateHashTableData__ #define instmemGenerateHashTableData(pGpu, pInstMem, hClient, offset, dispChannelNum) instmemGenerateHashTableData_DISPATCH(pGpu, pInstMem, hClient, offset, dispChannelNum) #define instmemGenerateHashTableData_HAL(pGpu, pInstMem, hClient, offset, dispChannelNum) instmemGenerateHashTableData_DISPATCH(pGpu, pInstMem, hClient, offset, dispChannelNum) +#define instmemHashFunc_FNPTR(pInstMem) pInstMem->__instmemHashFunc__ #define instmemHashFunc(pGpu, pInstMem, hClient, hContextDma, dispChannelNum, result) instmemHashFunc_DISPATCH(pGpu, pInstMem, hClient, hContextDma, dispChannelNum, result) #define instmemHashFunc_HAL(pGpu, pInstMem, hClient, hContextDma, dispChannelNum, result) instmemHashFunc_DISPATCH(pGpu, pInstMem, hClient, hContextDma, dispChannelNum, result) +#define instmemCommitContextDma_FNPTR(pInstMem) pInstMem->__instmemCommitContextDma__ #define instmemCommitContextDma(pGpu, pInstMem, pContextDma) instmemCommitContextDma_DISPATCH(pGpu, pInstMem, pContextDma) #define instmemCommitContextDma_HAL(pGpu, pInstMem, pContextDma) instmemCommitContextDma_DISPATCH(pGpu, pInstMem, pContextDma) +#define instmemUpdateContextDma_FNPTR(pInstMem) pInstMem->__instmemUpdateContextDma__ #define instmemUpdateContextDma(pGpu, pInstMem, pContextDma, pNewAddress, pNewLimit, hMemory, comprInfo) instmemUpdateContextDma_DISPATCH(pGpu, pInstMem, pContextDma, pNewAddress, pNewLimit, hMemory, comprInfo) #define instmemUpdateContextDma_HAL(pGpu, pInstMem, pContextDma, pNewAddress, pNewLimit, hMemory, comprInfo) instmemUpdateContextDma_DISPATCH(pGpu, pInstMem, pContextDma, pNewAddress, pNewLimit, hMemory, comprInfo) + +// Dispatch functions +static inline void instmemGetSize_DISPATCH(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, NvU32 *pTotalInstMemSize, NvU32 *pHashTableSize) { + pInstMem->__instmemGetSize__(pGpu, pInstMem, pTotalInstMemSize, pHashTableSize); +} + +static inline NvU32 instmemGetHashTableBaseAddr_DISPATCH(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem) { + return pInstMem->__instmemGetHashTableBaseAddr__(pGpu, pInstMem); +} + +static inline NvBool instmemIsValid_DISPATCH(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, NvU32 offset) { + return pInstMem->__instmemIsValid__(pGpu, pInstMem, offset); +} + +static inline NvU32 instmemGenerateHashTableData_DISPATCH(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, NvU32 hClient, NvU32 offset, NvU32 dispChannelNum) { + return pInstMem->__instmemGenerateHashTableData__(pGpu, pInstMem, hClient, offset, dispChannelNum); +} + +static inline NV_STATUS instmemHashFunc_DISPATCH(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, NvHandle hClient, NvHandle hContextDma, NvU32 dispChannelNum, NvU32 *result) { + return pInstMem->__instmemHashFunc__(pGpu, pInstMem, hClient, hContextDma, dispChannelNum, result); +} + +static inline NV_STATUS instmemCommitContextDma_DISPATCH(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, struct ContextDma *pContextDma) { + return pInstMem->__instmemCommitContextDma__(pGpu, pInstMem, pContextDma); +} + +static inline NV_STATUS instmemUpdateContextDma_DISPATCH(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, struct ContextDma *pContextDma, NvU64 *pNewAddress, NvU64 *pNewLimit, NvHandle hMemory, NvU32 comprInfo) { + return pInstMem->__instmemUpdateContextDma__(pGpu, pInstMem, pContextDma, pNewAddress, pNewLimit, hMemory, comprInfo); +} + static inline void instmemDecommitContextDma_b3696a(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, struct ContextDma *pContextDma) { return; } @@ -180,70 +240,42 @@ static inline void instmemGetSize_f2d351(OBJGPU *pGpu, struct DisplayInstanceMem NV_ASSERT_PRECOMP(0); } -static inline void instmemGetSize_DISPATCH(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, NvU32 *pTotalInstMemSize, NvU32 *pHashTableSize) { - pInstMem->__instmemGetSize__(pGpu, pInstMem, pTotalInstMemSize, pHashTableSize); -} - NvU32 instmemGetHashTableBaseAddr_v03_00(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem); static inline NvU32 instmemGetHashTableBaseAddr_4a4dee(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem) { return 0; } -static inline NvU32 instmemGetHashTableBaseAddr_DISPATCH(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem) { - return pInstMem->__instmemGetHashTableBaseAddr__(pGpu, pInstMem); -} - NvBool instmemIsValid_v03_00(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, NvU32 offset); static inline NvBool instmemIsValid_491d52(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, NvU32 offset) { return ((NvBool)(0 != 0)); } -static inline NvBool instmemIsValid_DISPATCH(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, NvU32 offset) { - return pInstMem->__instmemIsValid__(pGpu, pInstMem, offset); -} - NvU32 instmemGenerateHashTableData_v03_00(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, NvU32 hClient, NvU32 offset, NvU32 dispChannelNum); static inline NvU32 instmemGenerateHashTableData_4a4dee(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, NvU32 hClient, NvU32 offset, NvU32 dispChannelNum) { return 0; } -static inline NvU32 instmemGenerateHashTableData_DISPATCH(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, NvU32 hClient, NvU32 offset, NvU32 dispChannelNum) { - return pInstMem->__instmemGenerateHashTableData__(pGpu, pInstMem, hClient, offset, dispChannelNum); -} - NV_STATUS instmemHashFunc_v03_00(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, NvHandle hClient, NvHandle hContextDma, NvU32 dispChannelNum, NvU32 *result); static inline NV_STATUS instmemHashFunc_46f6a7(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, NvHandle hClient, NvHandle hContextDma, NvU32 dispChannelNum, NvU32 *result) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS instmemHashFunc_DISPATCH(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, NvHandle hClient, NvHandle hContextDma, NvU32 dispChannelNum, NvU32 *result) { - return pInstMem->__instmemHashFunc__(pGpu, pInstMem, hClient, hContextDma, dispChannelNum, result); -} - NV_STATUS instmemCommitContextDma_v03_00(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, struct ContextDma *pContextDma); static inline NV_STATUS instmemCommitContextDma_46f6a7(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, struct ContextDma *pContextDma) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS instmemCommitContextDma_DISPATCH(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, struct ContextDma *pContextDma) { - return pInstMem->__instmemCommitContextDma__(pGpu, pInstMem, pContextDma); -} - NV_STATUS instmemUpdateContextDma_v03_00(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, struct ContextDma *pContextDma, NvU64 *pNewAddress, NvU64 *pNewLimit, NvHandle hMemory, NvU32 comprInfo); static inline NV_STATUS instmemUpdateContextDma_46f6a7(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, struct ContextDma *pContextDma, NvU64 *pNewAddress, NvU64 *pNewLimit, NvHandle hMemory, NvU32 comprInfo) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS instmemUpdateContextDma_DISPATCH(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, struct ContextDma *pContextDma, NvU64 *pNewAddress, NvU64 *pNewLimit, NvHandle hMemory, NvU32 comprInfo) { - return pInstMem->__instmemUpdateContextDma__(pGpu, pInstMem, pContextDma, pNewAddress, pNewLimit, hMemory, comprInfo); -} - NV_STATUS instmemConstruct_IMPL(struct DisplayInstanceMemory *arg_pInstMem); #define __nvoc_instmemConstruct(arg_pInstMem) instmemConstruct_IMPL(arg_pInstMem) diff --git a/src/nvidia/generated/g_disp_objs_nvoc.c b/src/nvidia/generated/g_disp_objs_nvoc.c index 7d66dfad09..06457e9341 100644 --- a/src/nvidia/generated/g_disp_objs_nvoc.c +++ b/src/nvidia/generated/g_disp_objs_nvoc.c @@ -102,110 +102,142 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DisplayApi = /*pExportInfo=*/ &__nvoc_export_info_DisplayApi }; -static NV_STATUS __nvoc_thunk_DisplayApi_resControl(struct RsResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return dispapiControl((struct DisplayApi *)(((unsigned char *)pDisplayApi) - __nvoc_rtti_DisplayApi_RsResource.offset), pCallContext, pParams); +// 3 down-thunk(s) defined to bridge methods in DisplayApi from superclasses + +// dispapiControl: virtual override (res) base (rmres) +static NV_STATUS __nvoc_down_thunk_DisplayApi_resControl(struct RsResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return dispapiControl((struct DisplayApi *)(((unsigned char *) pDisplayApi) - __nvoc_rtti_DisplayApi_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_DisplayApi_rmresControl_Prologue(struct RmResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - return dispapiControl_Prologue((struct DisplayApi *)(((unsigned char *)pDisplayApi) - __nvoc_rtti_DisplayApi_RmResource.offset), pCallContext, pRsParams); +// dispapiControl_Prologue: virtual override (res) base (rmres) +static NV_STATUS __nvoc_down_thunk_DisplayApi_rmresControl_Prologue(struct RmResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { + return dispapiControl_Prologue((struct DisplayApi *)(((unsigned char *) pDisplayApi) - __nvoc_rtti_DisplayApi_RmResource.offset), pCallContext, pRsParams); } -static void __nvoc_thunk_DisplayApi_rmresControl_Epilogue(struct RmResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - dispapiControl_Epilogue((struct DisplayApi *)(((unsigned char *)pDisplayApi) - __nvoc_rtti_DisplayApi_RmResource.offset), pCallContext, pRsParams); +// dispapiControl_Epilogue: virtual override (res) base (rmres) +static void __nvoc_down_thunk_DisplayApi_rmresControl_Epilogue(struct RmResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { + dispapiControl_Epilogue((struct DisplayApi *)(((unsigned char *) pDisplayApi) - __nvoc_rtti_DisplayApi_RmResource.offset), pCallContext, pRsParams); } -static NvBool __nvoc_thunk_RmResource_dispapiShareCallback(struct DisplayApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DisplayApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); + +// 23 up-thunk(s) defined to bridge methods in DisplayApi to superclasses + +// dispapiAccessCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_dispapiAccessCallback(struct DisplayApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RmResource_dispapiCheckMemInterUnmap(struct DisplayApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DisplayApi_RmResource.offset), bSubdeviceHandleProvided); +// dispapiShareCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_dispapiShareCallback(struct DisplayApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RsResource_dispapiMapTo(struct DisplayApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), pParams); +// dispapiGetMemInterMapParams: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_dispapiGetMemInterMapParams(struct DisplayApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DisplayApi_RmResource.offset), pParams); } -static NvBool __nvoc_thunk_RmResource_dispapiAccessCallback(struct DisplayApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DisplayApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// dispapiCheckMemInterUnmap: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_dispapiCheckMemInterUnmap(struct DisplayApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DisplayApi_RmResource.offset), bSubdeviceHandleProvided); } -static void __nvoc_thunk_Notifier_dispapiSetNotificationShare(struct DisplayApi *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DisplayApi_Notifier.offset), pNotifShare); +// dispapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_dispapiGetMemoryMappingDescriptor(struct DisplayApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DisplayApi_RmResource.offset), ppMemDesc); } -static NvU32 __nvoc_thunk_RsResource_dispapiGetRefCount(struct DisplayApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DisplayApi_RsResource.offset)); +// dispapiControlSerialization_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_dispapiControlSerialization_Prologue(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RmResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_dispapiAddAdditionalDependants(struct RsClient *pClient, struct DisplayApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), pReference); +// dispapiControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_dispapiControlSerialization_Epilogue(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_dispapiUnmapFrom(struct DisplayApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), pParams); +// dispapiCanCopy: virtual inherited (res) base (rmres) +static NvBool __nvoc_up_thunk_RsResource_dispapiCanCopy(struct DisplayApi *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_dispapiUnmap(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), pCallContext, pCpuMapping); +// dispapiIsDuplicate: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_dispapiIsDuplicate(struct DisplayApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RmResource_dispapiGetMemInterMapParams(struct DisplayApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DisplayApi_RmResource.offset), pParams); +// dispapiPreDestruct: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_dispapiPreDestruct(struct DisplayApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RmResource_dispapiGetMemoryMappingDescriptor(struct DisplayApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DisplayApi_RmResource.offset), ppMemDesc); +// dispapiControlFilter: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_dispapiControlFilter(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_dispapiControlFilter(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), pCallContext, pParams); +// dispapiMap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_dispapiMap(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_Notifier_dispapiUnregisterEvent(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DisplayApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// dispapiUnmap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_dispapiUnmap(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RmResource_dispapiControlSerialization_Prologue(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DisplayApi_RmResource.offset), pCallContext, pParams); +// dispapiIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body +static NvBool __nvoc_up_thunk_RsResource_dispapiIsPartialUnmapSupported(struct DisplayApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_dispapiCanCopy(struct DisplayApi *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DisplayApi_RsResource.offset)); +// dispapiMapTo: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_dispapiMapTo(struct DisplayApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RsResource_dispapiIsPartialUnmapSupported(struct DisplayApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DisplayApi_RsResource.offset)); +// dispapiUnmapFrom: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_dispapiUnmapFrom(struct DisplayApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), pParams); } -static void __nvoc_thunk_RsResource_dispapiPreDestruct(struct DisplayApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DisplayApi_RsResource.offset)); +// dispapiGetRefCount: virtual inherited (res) base (rmres) +static NvU32 __nvoc_up_thunk_RsResource_dispapiGetRefCount(struct DisplayApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_dispapiIsDuplicate(struct DisplayApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), hMemory, pDuplicate); +// dispapiAddAdditionalDependants: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_dispapiAddAdditionalDependants(struct RsClient *pClient, struct DisplayApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), pReference); } -static void __nvoc_thunk_RmResource_dispapiControlSerialization_Epilogue(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DisplayApi_RmResource.offset), pCallContext, pParams); +// dispapiGetNotificationListPtr: virtual inherited (notify) base (notify) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispapiGetNotificationListPtr(struct DisplayApi *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DisplayApi_Notifier.offset)); } -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_dispapiGetNotificationListPtr(struct DisplayApi *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DisplayApi_Notifier.offset)); +// dispapiGetNotificationShare: virtual inherited (notify) base (notify) +static struct NotifShare * __nvoc_up_thunk_Notifier_dispapiGetNotificationShare(struct DisplayApi *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DisplayApi_Notifier.offset)); } -static struct NotifShare *__nvoc_thunk_Notifier_dispapiGetNotificationShare(struct DisplayApi *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DisplayApi_Notifier.offset)); +// dispapiSetNotificationShare: virtual inherited (notify) base (notify) +static void __nvoc_up_thunk_Notifier_dispapiSetNotificationShare(struct DisplayApi *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DisplayApi_Notifier.offset), pNotifShare); } -static NV_STATUS __nvoc_thunk_RsResource_dispapiMap(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), pCallContext, pParams, pCpuMapping); +// dispapiUnregisterEvent: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_dispapiUnregisterEvent(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DisplayApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static NV_STATUS __nvoc_thunk_Notifier_dispapiGetOrAllocNotifShare(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DisplayApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +// dispapiGetOrAllocNotifShare: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_dispapiGetOrAllocNotifShare(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DisplayApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_DisplayApi = { /*numEntries=*/ 0, @@ -254,6 +286,7 @@ NV_STATUS __nvoc_ctor_DisplayApi(DisplayApi *pThis, RmHalspecOwner *pRmhalspecow return status; } +// Vtable initialization static void __nvoc_init_funcTable_DisplayApi_1(DisplayApi *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -262,66 +295,93 @@ static void __nvoc_init_funcTable_DisplayApi_1(DisplayApi *pThis, RmHalspecOwner PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); + // dispapiControl -- virtual override (res) base (rmres) pThis->__dispapiControl__ = &dispapiControl_IMPL; + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ = &__nvoc_down_thunk_DisplayApi_resControl; + // dispapiControl_Prologue -- virtual override (res) base (rmres) pThis->__dispapiControl_Prologue__ = &dispapiControl_Prologue_IMPL; + pThis->__nvoc_base_RmResource.__rmresControl_Prologue__ = &__nvoc_down_thunk_DisplayApi_rmresControl_Prologue; + // dispapiControl_Epilogue -- virtual override (res) base (rmres) pThis->__dispapiControl_Epilogue__ = &dispapiControl_Epilogue_IMPL; + pThis->__nvoc_base_RmResource.__rmresControl_Epilogue__ = &__nvoc_down_thunk_DisplayApi_rmresControl_Epilogue; - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ = &__nvoc_thunk_DisplayApi_resControl; + // dispapiAccessCallback -- virtual inherited (rmres) base (rmres) + pThis->__dispapiAccessCallback__ = &__nvoc_up_thunk_RmResource_dispapiAccessCallback; - pThis->__nvoc_base_RmResource.__rmresControl_Prologue__ = &__nvoc_thunk_DisplayApi_rmresControl_Prologue; + // dispapiShareCallback -- virtual inherited (rmres) base (rmres) + pThis->__dispapiShareCallback__ = &__nvoc_up_thunk_RmResource_dispapiShareCallback; - pThis->__nvoc_base_RmResource.__rmresControl_Epilogue__ = &__nvoc_thunk_DisplayApi_rmresControl_Epilogue; + // dispapiGetMemInterMapParams -- virtual inherited (rmres) base (rmres) + pThis->__dispapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispapiGetMemInterMapParams; - pThis->__dispapiShareCallback__ = &__nvoc_thunk_RmResource_dispapiShareCallback; + // dispapiCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) + pThis->__dispapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispapiCheckMemInterUnmap; - pThis->__dispapiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_dispapiCheckMemInterUnmap; + // dispapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) + pThis->__dispapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispapiGetMemoryMappingDescriptor; - pThis->__dispapiMapTo__ = &__nvoc_thunk_RsResource_dispapiMapTo; + // dispapiControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__dispapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispapiControlSerialization_Prologue; - pThis->__dispapiAccessCallback__ = &__nvoc_thunk_RmResource_dispapiAccessCallback; + // dispapiControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__dispapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispapiControlSerialization_Epilogue; - pThis->__dispapiSetNotificationShare__ = &__nvoc_thunk_Notifier_dispapiSetNotificationShare; + // dispapiCanCopy -- virtual inherited (res) base (rmres) + pThis->__dispapiCanCopy__ = &__nvoc_up_thunk_RsResource_dispapiCanCopy; - pThis->__dispapiGetRefCount__ = &__nvoc_thunk_RsResource_dispapiGetRefCount; + // dispapiIsDuplicate -- virtual inherited (res) base (rmres) + pThis->__dispapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispapiIsDuplicate; - pThis->__dispapiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_dispapiAddAdditionalDependants; + // dispapiPreDestruct -- virtual inherited (res) base (rmres) + pThis->__dispapiPreDestruct__ = &__nvoc_up_thunk_RsResource_dispapiPreDestruct; - pThis->__dispapiUnmapFrom__ = &__nvoc_thunk_RsResource_dispapiUnmapFrom; + // dispapiControlFilter -- virtual inherited (res) base (rmres) + pThis->__dispapiControlFilter__ = &__nvoc_up_thunk_RsResource_dispapiControlFilter; - pThis->__dispapiUnmap__ = &__nvoc_thunk_RsResource_dispapiUnmap; + // dispapiMap -- virtual inherited (res) base (rmres) + pThis->__dispapiMap__ = &__nvoc_up_thunk_RsResource_dispapiMap; - pThis->__dispapiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_dispapiGetMemInterMapParams; + // dispapiUnmap -- virtual inherited (res) base (rmres) + pThis->__dispapiUnmap__ = &__nvoc_up_thunk_RsResource_dispapiUnmap; - pThis->__dispapiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_dispapiGetMemoryMappingDescriptor; + // dispapiIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body + pThis->__dispapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispapiIsPartialUnmapSupported; - pThis->__dispapiControlFilter__ = &__nvoc_thunk_RsResource_dispapiControlFilter; + // dispapiMapTo -- virtual inherited (res) base (rmres) + pThis->__dispapiMapTo__ = &__nvoc_up_thunk_RsResource_dispapiMapTo; - pThis->__dispapiUnregisterEvent__ = &__nvoc_thunk_Notifier_dispapiUnregisterEvent; + // dispapiUnmapFrom -- virtual inherited (res) base (rmres) + pThis->__dispapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispapiUnmapFrom; - pThis->__dispapiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_dispapiControlSerialization_Prologue; + // dispapiGetRefCount -- virtual inherited (res) base (rmres) + pThis->__dispapiGetRefCount__ = &__nvoc_up_thunk_RsResource_dispapiGetRefCount; - pThis->__dispapiCanCopy__ = &__nvoc_thunk_RsResource_dispapiCanCopy; + // dispapiAddAdditionalDependants -- virtual inherited (res) base (rmres) + pThis->__dispapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispapiAddAdditionalDependants; - pThis->__dispapiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_dispapiIsPartialUnmapSupported; + // dispapiGetNotificationListPtr -- virtual inherited (notify) base (notify) + pThis->__dispapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispapiGetNotificationListPtr; - pThis->__dispapiPreDestruct__ = &__nvoc_thunk_RsResource_dispapiPreDestruct; + // dispapiGetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__dispapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispapiGetNotificationShare; - pThis->__dispapiIsDuplicate__ = &__nvoc_thunk_RsResource_dispapiIsDuplicate; + // dispapiSetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__dispapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispapiSetNotificationShare; - pThis->__dispapiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_dispapiControlSerialization_Epilogue; + // dispapiUnregisterEvent -- virtual inherited (notify) base (notify) + pThis->__dispapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispapiUnregisterEvent; - pThis->__dispapiGetNotificationListPtr__ = &__nvoc_thunk_Notifier_dispapiGetNotificationListPtr; + // dispapiGetOrAllocNotifShare -- virtual inherited (notify) base (notify) + pThis->__dispapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispapiGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_DisplayApi_1 with approximately 29 basic block(s). - pThis->__dispapiGetNotificationShare__ = &__nvoc_thunk_Notifier_dispapiGetNotificationShare; - - pThis->__dispapiMap__ = &__nvoc_thunk_RsResource_dispapiMap; - - pThis->__dispapiGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_dispapiGetOrAllocNotifShare; -} +// Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_DisplayApi(DisplayApi *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 26 per-object function pointer(s). __nvoc_init_funcTable_DisplayApi_1(pThis, pRmhalspecowner); } @@ -520,110 +580,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DispObject = /*pExportInfo=*/ &__nvoc_export_info_DispObject }; -static NvBool __nvoc_thunk_RmResource_dispobjShareCallback(struct DispObject *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispObject_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_dispobjCheckMemInterUnmap(struct DispObject *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispObject_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RsResource_dispobjMapTo(struct DispObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispObject_RsResource.offset), pParams); -} - -static NvBool __nvoc_thunk_RmResource_dispobjAccessCallback(struct DispObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispObject_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - -static void __nvoc_thunk_Notifier_dispobjSetNotificationShare(struct DispObject *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispObject_Notifier.offset), pNotifShare); -} - -static NvU32 __nvoc_thunk_RsResource_dispobjGetRefCount(struct DispObject *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispObject_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_dispobjAddAdditionalDependants(struct RsClient *pClient, struct DispObject *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispObject_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_DisplayApi_dispobjControl_Prologue(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - return dispapiControl_Prologue((struct DisplayApi *)(((unsigned char *)pDisplayApi) + __nvoc_rtti_DispObject_DisplayApi.offset), pCallContext, pRsParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_dispobjUnmapFrom(struct DispObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispObject_RsResource.offset), pParams); -} - -static void __nvoc_thunk_DisplayApi_dispobjControl_Epilogue(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - dispapiControl_Epilogue((struct DisplayApi *)(((unsigned char *)pDisplayApi) + __nvoc_rtti_DispObject_DisplayApi.offset), pCallContext, pRsParams); -} - -static NV_STATUS __nvoc_thunk_DisplayApi_dispobjControl(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return dispapiControl((struct DisplayApi *)(((unsigned char *)pDisplayApi) + __nvoc_rtti_DispObject_DisplayApi.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_dispobjUnmap(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispObject_RsResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_dispobjGetMemInterMapParams(struct DispObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispObject_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_dispobjGetMemoryMappingDescriptor(struct DispObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispObject_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_dispobjControlFilter(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispObject_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_Notifier_dispobjUnregisterEvent(struct DispObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispObject_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static NV_STATUS __nvoc_thunk_RmResource_dispobjControlSerialization_Prologue(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispObject_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_dispobjCanCopy(struct DispObject *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispObject_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_dispobjIsPartialUnmapSupported(struct DispObject *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispObject_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_dispobjPreDestruct(struct DispObject *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispObject_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_dispobjIsDuplicate(struct DispObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispObject_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_dispobjControlSerialization_Epilogue(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispObject_RmResource.offset), pCallContext, pParams); -} - -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_dispobjGetNotificationListPtr(struct DispObject *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispObject_Notifier.offset)); -} - -static struct NotifShare *__nvoc_thunk_Notifier_dispobjGetNotificationShare(struct DispObject *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispObject_Notifier.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_dispobjMap(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispObject_RsResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_Notifier_dispobjGetOrAllocNotifShare(struct DispObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispObject_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -631,12 +587,12 @@ static NV_STATUS __nvoc_thunk_Notifier_dispobjGetOrAllocNotifShare(struct DispOb static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObject[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdGetPinsetCount_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x50700115u, /*paramSize=*/ sizeof(NV5070_CTRL_GET_PINSET_COUNT_PARAMS), @@ -646,12 +602,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdGetPinsetPeer_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x50700116u, /*paramSize=*/ sizeof(NV5070_CTRL_GET_PINSET_PEER_PARAMS), @@ -661,12 +617,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdSetRmFreeFlags_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x50700117u, /*paramSize=*/ sizeof(NV5070_CTRL_SET_RMFREE_FLAGS_PARAMS), @@ -676,12 +632,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdIMPSetGetParameter_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x50700118u, /*paramSize=*/ sizeof(NV5070_CTRL_IMP_SET_GET_PARAMETER_PARAMS), @@ -691,12 +647,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdSetMempoolWARForBlitTearing_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x50700119u, /*paramSize=*/ sizeof(NV5070_CTRL_SET_MEMPOOL_WAR_FOR_BLIT_TEARING_PARAMS), @@ -706,12 +662,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje #endif }, { /* [5] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdGetRgStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x50700202u, /*paramSize=*/ sizeof(NV5070_CTRL_CMD_GET_RG_STATUS_PARAMS), @@ -721,12 +677,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje #endif }, { /* [6] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdGetRgUnderflowProp_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x50700203u, /*paramSize=*/ sizeof(NV5070_CTRL_CMD_GET_RG_UNDERFLOW_PROP_PARAMS), @@ -736,12 +692,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje #endif }, { /* [7] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdSetRgUnderflowProp_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x50700204u, /*paramSize=*/ sizeof(NV5070_CTRL_CMD_SET_RG_UNDERFLOW_PROP_PARAMS), @@ -751,12 +707,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje #endif }, { /* [8] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdGetRgFliplockProp_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x50700205u, /*paramSize=*/ sizeof(NV5070_CTRL_CMD_GET_RG_FLIPLOCK_PROP_PARAMS), @@ -766,12 +722,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje #endif }, { /* [9] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdSetRgFliplockProp_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x50700206u, /*paramSize=*/ sizeof(NV5070_CTRL_CMD_SET_RG_FLIPLOCK_PROP_PARAMS), @@ -796,12 +752,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje #endif }, { /* [11] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdGetPinsetLockpins_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x5070020bu, /*paramSize=*/ sizeof(NV5070_CTRL_GET_PINSET_LOCKPINS_PARAMS), @@ -811,12 +767,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje #endif }, { /* [12] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdGetRgScanLine_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x5070020cu, /*paramSize=*/ sizeof(NV5070_CTRL_CMD_GET_RG_SCAN_LINE_PARAMS), @@ -826,12 +782,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje #endif }, { /* [13] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdGetFrameLockHeaderLockPins_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x5070020du, /*paramSize=*/ sizeof(NV5070_CTRL_GET_FRAMELOCK_HEADER_LOCKPINS_PARAMS), @@ -841,87 +797,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje #endif }, { /* [14] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdGetSorSeqCtl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x50700301u, - /*paramSize=*/ sizeof(NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_DispObject.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "dispobjCtrlCmdGetSorSeqCtl" -#endif - }, - { /* [15] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdSetSorSeqCtl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x50700302u, - /*paramSize=*/ sizeof(NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_DispObject.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "dispobjCtrlCmdSetSorSeqCtl" -#endif - }, - { /* [16] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdGetPiorSeqCtl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x50700303u, - /*paramSize=*/ sizeof(NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_DispObject.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "dispobjCtrlCmdGetPiorSeqCtl" -#endif - }, - { /* [17] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdSetPiorSeqCtl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x50700304u, - /*paramSize=*/ sizeof(NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_DispObject.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "dispobjCtrlCmdSetPiorSeqCtl" -#endif - }, - { /* [18] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdSeqProgSpeed_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x50700305u, - /*paramSize=*/ sizeof(NV5070_CTRL_SEQ_PROG_SPEED_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_DispObject.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "dispobjCtrlCmdSeqProgSpeed" -#endif - }, - { /* [19] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdGetSorPwm_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x50700420u, /*paramSize=*/ sizeof(NV5070_CTRL_CMD_GET_SOR_PWM_PARAMS), @@ -930,13 +811,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje /*func=*/ "dispobjCtrlCmdGetSorPwm" #endif }, - { /* [20] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [15] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdSetSorPwm_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x50700421u, /*paramSize=*/ sizeof(NV5070_CTRL_CMD_SET_SOR_PWM_PARAMS), @@ -945,13 +826,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje /*func=*/ "dispobjCtrlCmdSetSorPwm" #endif }, - { /* [21] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [16] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdGetSorOpMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x50700422u, /*paramSize=*/ sizeof(NV5070_CTRL_CMD_GET_SOR_OP_MODE_PARAMS), @@ -960,13 +841,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje /*func=*/ "dispobjCtrlCmdGetSorOpMode" #endif }, - { /* [22] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [17] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdSetSorOpMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x50700423u, /*paramSize=*/ sizeof(NV5070_CTRL_CMD_SET_SOR_OP_MODE_PARAMS), @@ -975,13 +856,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje /*func=*/ "dispobjCtrlCmdSetSorOpMode" #endif }, - { /* [23] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [18] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdGetPiorOpMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x50700430u, /*paramSize=*/ sizeof(NV5070_CTRL_CMD_GET_PIOR_OP_MODE_PARAMS), @@ -990,13 +871,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje /*func=*/ "dispobjCtrlCmdGetPiorOpMode" #endif }, - { /* [24] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [19] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdSetPiorOpMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x50700431u, /*paramSize=*/ sizeof(NV5070_CTRL_CMD_SET_PIOR_OP_MODE_PARAMS), @@ -1005,13 +886,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje /*func=*/ "dispobjCtrlCmdSetPiorOpMode" #endif }, - { /* [25] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [20] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdSetSorFlushMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x50700457u, /*paramSize=*/ sizeof(NV5070_CTRL_SET_SOR_FLUSH_MODE_PARAMS), @@ -1020,13 +901,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje /*func=*/ "dispobjCtrlCmdSetSorFlushMode" #endif }, - { /* [26] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [21] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdSystemGetCapsV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x50700709u, /*paramSize=*/ sizeof(NV5070_CTRL_SYSTEM_GET_CAPS_V2_PARAMS), @@ -1035,13 +916,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje /*func=*/ "dispobjCtrlCmdSystemGetCapsV2" #endif }, - { /* [27] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [22] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdEventSetTrigger_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x50700902u, /*paramSize=*/ 0, @@ -1050,13 +931,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje /*func=*/ "dispobjCtrlCmdEventSetTrigger" #endif }, - { /* [28] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [23] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispobjCtrlCmdEventSetMemoryNotifies_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x50700903u, /*paramSize=*/ sizeof(NV5070_CTRL_EVENT_SET_MEMORY_NOTIFIES_PARAMS), @@ -1068,9 +949,142 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje }; +// 26 up-thunk(s) defined to bridge methods in DispObject to superclasses + +// dispobjControl: virtual inherited (dispapi) base (dispapi) +static NV_STATUS __nvoc_up_thunk_DisplayApi_dispobjControl(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return dispapiControl((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_DispObject_DisplayApi.offset), pCallContext, pParams); +} + +// dispobjControl_Prologue: virtual inherited (dispapi) base (dispapi) +static NV_STATUS __nvoc_up_thunk_DisplayApi_dispobjControl_Prologue(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { + return dispapiControl_Prologue((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_DispObject_DisplayApi.offset), pCallContext, pRsParams); +} + +// dispobjControl_Epilogue: virtual inherited (dispapi) base (dispapi) +static void __nvoc_up_thunk_DisplayApi_dispobjControl_Epilogue(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { + dispapiControl_Epilogue((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_DispObject_DisplayApi.offset), pCallContext, pRsParams); +} + +// dispobjAccessCallback: virtual inherited (rmres) base (dispapi) +static NvBool __nvoc_up_thunk_RmResource_dispobjAccessCallback(struct DispObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// dispobjShareCallback: virtual inherited (rmres) base (dispapi) +static NvBool __nvoc_up_thunk_RmResource_dispobjShareCallback(struct DispObject *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// dispobjGetMemInterMapParams: virtual inherited (rmres) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RmResource_dispobjGetMemInterMapParams(struct DispObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispObject_RmResource.offset), pParams); +} + +// dispobjCheckMemInterUnmap: virtual inherited (rmres) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RmResource_dispobjCheckMemInterUnmap(struct DispObject *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispObject_RmResource.offset), bSubdeviceHandleProvided); +} + +// dispobjGetMemoryMappingDescriptor: virtual inherited (rmres) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RmResource_dispobjGetMemoryMappingDescriptor(struct DispObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispObject_RmResource.offset), ppMemDesc); +} + +// dispobjControlSerialization_Prologue: virtual inherited (rmres) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RmResource_dispobjControlSerialization_Prologue(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RmResource.offset), pCallContext, pParams); +} + +// dispobjControlSerialization_Epilogue: virtual inherited (rmres) base (dispapi) +static void __nvoc_up_thunk_RmResource_dispobjControlSerialization_Epilogue(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RmResource.offset), pCallContext, pParams); +} + +// dispobjCanCopy: virtual inherited (res) base (dispapi) +static NvBool __nvoc_up_thunk_RsResource_dispobjCanCopy(struct DispObject *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset)); +} + +// dispobjIsDuplicate: virtual inherited (res) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RsResource_dispobjIsDuplicate(struct DispObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset), hMemory, pDuplicate); +} + +// dispobjPreDestruct: virtual inherited (res) base (dispapi) +static void __nvoc_up_thunk_RsResource_dispobjPreDestruct(struct DispObject *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset)); +} + +// dispobjControlFilter: virtual inherited (res) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RsResource_dispobjControlFilter(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset), pCallContext, pParams); +} + +// dispobjMap: virtual inherited (res) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RsResource_dispobjMap(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset), pCallContext, pParams, pCpuMapping); +} + +// dispobjUnmap: virtual inherited (res) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RsResource_dispobjUnmap(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset), pCallContext, pCpuMapping); +} + +// dispobjIsPartialUnmapSupported: inline virtual inherited (res) base (dispapi) body +static NvBool __nvoc_up_thunk_RsResource_dispobjIsPartialUnmapSupported(struct DispObject *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset)); +} + +// dispobjMapTo: virtual inherited (res) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RsResource_dispobjMapTo(struct DispObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset), pParams); +} + +// dispobjUnmapFrom: virtual inherited (res) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RsResource_dispobjUnmapFrom(struct DispObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset), pParams); +} + +// dispobjGetRefCount: virtual inherited (res) base (dispapi) +static NvU32 __nvoc_up_thunk_RsResource_dispobjGetRefCount(struct DispObject *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset)); +} + +// dispobjAddAdditionalDependants: virtual inherited (res) base (dispapi) +static void __nvoc_up_thunk_RsResource_dispobjAddAdditionalDependants(struct RsClient *pClient, struct DispObject *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset), pReference); +} + +// dispobjGetNotificationListPtr: virtual inherited (notify) base (dispapi) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispobjGetNotificationListPtr(struct DispObject *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispObject_Notifier.offset)); +} + +// dispobjGetNotificationShare: virtual inherited (notify) base (dispapi) +static struct NotifShare * __nvoc_up_thunk_Notifier_dispobjGetNotificationShare(struct DispObject *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispObject_Notifier.offset)); +} + +// dispobjSetNotificationShare: virtual inherited (notify) base (dispapi) +static void __nvoc_up_thunk_Notifier_dispobjSetNotificationShare(struct DispObject *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispObject_Notifier.offset), pNotifShare); +} + +// dispobjUnregisterEvent: virtual inherited (notify) base (dispapi) +static NV_STATUS __nvoc_up_thunk_Notifier_dispobjUnregisterEvent(struct DispObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispObject_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +} + +// dispobjGetOrAllocNotifShare: virtual inherited (notify) base (dispapi) +static NV_STATUS __nvoc_up_thunk_Notifier_dispobjGetOrAllocNotifShare(struct DispObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispObject_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_DispObject = { - /*numEntries=*/ 29, + /*numEntries=*/ 24, /*pExportEntries=*/ __nvoc_exported_method_def_DispObject }; @@ -1108,6 +1122,7 @@ NV_STATUS __nvoc_ctor_DispObject(DispObject *pThis, RmHalspecOwner *pRmhalspecow return status; } +// Vtable initialization static void __nvoc_init_funcTable_DispObject_1(DispObject *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -1116,176 +1131,210 @@ static void __nvoc_init_funcTable_DispObject_1(DispObject *pThis, RmHalspecOwner PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispobjCtrlCmdGetPinsetCount -- exported (id=0x50700115) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispobjCtrlCmdGetPinsetCount__ = &dispobjCtrlCmdGetPinsetCount_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispobjCtrlCmdGetPinsetPeer -- exported (id=0x50700116) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispobjCtrlCmdGetPinsetPeer__ = &dispobjCtrlCmdGetPinsetPeer_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispobjCtrlCmdSetMempoolWARForBlitTearing -- exported (id=0x50700119) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispobjCtrlCmdSetMempoolWARForBlitTearing__ = &dispobjCtrlCmdSetMempoolWARForBlitTearing_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispobjCtrlCmdGetPinsetLockpins -- exported (id=0x5070020b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispobjCtrlCmdGetPinsetLockpins__ = &dispobjCtrlCmdGetPinsetLockpins_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispobjCtrlCmdGetFrameLockHeaderLockPins -- exported (id=0x5070020d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispobjCtrlCmdGetFrameLockHeaderLockPins__ = &dispobjCtrlCmdGetFrameLockHeaderLockPins_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - pThis->__dispobjCtrlCmdGetPiorSeqCtl__ = &dispobjCtrlCmdGetPiorSeqCtl_IMPL; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - pThis->__dispobjCtrlCmdSetPiorSeqCtl__ = &dispobjCtrlCmdSetPiorSeqCtl_IMPL; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispobjCtrlCmdGetPiorOpMode -- exported (id=0x50700430) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispobjCtrlCmdGetPiorOpMode__ = &dispobjCtrlCmdGetPiorOpMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispobjCtrlCmdSetPiorOpMode -- exported (id=0x50700431) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispobjCtrlCmdSetPiorOpMode__ = &dispobjCtrlCmdSetPiorOpMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // dispobjCtrlCmdEventSetMemoryNotifies -- exported (id=0x50700903) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__dispobjCtrlCmdEventSetMemoryNotifies__ = &dispobjCtrlCmdEventSetMemoryNotifies_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispobjCtrlCmdSetRmFreeFlags -- exported (id=0x50700117) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispobjCtrlCmdSetRmFreeFlags__ = &dispobjCtrlCmdSetRmFreeFlags_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispobjCtrlCmdIMPSetGetParameter -- exported (id=0x50700118) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispobjCtrlCmdIMPSetGetParameter__ = &dispobjCtrlCmdIMPSetGetParameter_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispobjCtrlCmdGetRgStatus -- exported (id=0x50700202) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispobjCtrlCmdGetRgStatus__ = &dispobjCtrlCmdGetRgStatus_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispobjCtrlCmdGetRgUnderflowProp -- exported (id=0x50700203) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispobjCtrlCmdGetRgUnderflowProp__ = &dispobjCtrlCmdGetRgUnderflowProp_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispobjCtrlCmdSetRgUnderflowProp -- exported (id=0x50700204) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispobjCtrlCmdSetRgUnderflowProp__ = &dispobjCtrlCmdSetRgUnderflowProp_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispobjCtrlCmdGetRgFliplockProp -- exported (id=0x50700205) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispobjCtrlCmdGetRgFliplockProp__ = &dispobjCtrlCmdGetRgFliplockProp_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispobjCtrlCmdSetRgFliplockProp -- exported (id=0x50700206) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispobjCtrlCmdSetRgFliplockProp__ = &dispobjCtrlCmdSetRgFliplockProp_IMPL; #endif + // dispobjCtrlCmdGetRgConnectedLockpinStateless -- exported (id=0x5070020a) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__dispobjCtrlCmdGetRgConnectedLockpinStateless__ = &dispobjCtrlCmdGetRgConnectedLockpinStateless_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispobjCtrlCmdGetRgScanLine -- exported (id=0x5070020c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispobjCtrlCmdGetRgScanLine__ = &dispobjCtrlCmdGetRgScanLine_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - pThis->__dispobjCtrlCmdGetSorSeqCtl__ = &dispobjCtrlCmdGetSorSeqCtl_IMPL; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - pThis->__dispobjCtrlCmdSetSorSeqCtl__ = &dispobjCtrlCmdSetSorSeqCtl_IMPL; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - pThis->__dispobjCtrlCmdSeqProgSpeed__ = &dispobjCtrlCmdSeqProgSpeed_IMPL; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispobjCtrlCmdGetSorPwm -- exported (id=0x50700420) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispobjCtrlCmdGetSorPwm__ = &dispobjCtrlCmdGetSorPwm_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispobjCtrlCmdSetSorPwm -- exported (id=0x50700421) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispobjCtrlCmdSetSorPwm__ = &dispobjCtrlCmdSetSorPwm_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispobjCtrlCmdGetSorOpMode -- exported (id=0x50700422) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispobjCtrlCmdGetSorOpMode__ = &dispobjCtrlCmdGetSorOpMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispobjCtrlCmdSetSorOpMode -- exported (id=0x50700423) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispobjCtrlCmdSetSorOpMode__ = &dispobjCtrlCmdSetSorOpMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispobjCtrlCmdSetSorFlushMode -- exported (id=0x50700457) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispobjCtrlCmdSetSorFlushMode__ = &dispobjCtrlCmdSetSorFlushMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispobjCtrlCmdSystemGetCapsV2 -- exported (id=0x50700709) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispobjCtrlCmdSystemGetCapsV2__ = &dispobjCtrlCmdSystemGetCapsV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // dispobjCtrlCmdEventSetTrigger -- exported (id=0x50700902) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__dispobjCtrlCmdEventSetTrigger__ = &dispobjCtrlCmdEventSetTrigger_IMPL; #endif - pThis->__dispobjShareCallback__ = &__nvoc_thunk_RmResource_dispobjShareCallback; + // dispobjControl -- virtual inherited (dispapi) base (dispapi) + pThis->__dispobjControl__ = &__nvoc_up_thunk_DisplayApi_dispobjControl; - pThis->__dispobjCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_dispobjCheckMemInterUnmap; + // dispobjControl_Prologue -- virtual inherited (dispapi) base (dispapi) + pThis->__dispobjControl_Prologue__ = &__nvoc_up_thunk_DisplayApi_dispobjControl_Prologue; - pThis->__dispobjMapTo__ = &__nvoc_thunk_RsResource_dispobjMapTo; + // dispobjControl_Epilogue -- virtual inherited (dispapi) base (dispapi) + pThis->__dispobjControl_Epilogue__ = &__nvoc_up_thunk_DisplayApi_dispobjControl_Epilogue; - pThis->__dispobjAccessCallback__ = &__nvoc_thunk_RmResource_dispobjAccessCallback; + // dispobjAccessCallback -- virtual inherited (rmres) base (dispapi) + pThis->__dispobjAccessCallback__ = &__nvoc_up_thunk_RmResource_dispobjAccessCallback; - pThis->__dispobjSetNotificationShare__ = &__nvoc_thunk_Notifier_dispobjSetNotificationShare; + // dispobjShareCallback -- virtual inherited (rmres) base (dispapi) + pThis->__dispobjShareCallback__ = &__nvoc_up_thunk_RmResource_dispobjShareCallback; - pThis->__dispobjGetRefCount__ = &__nvoc_thunk_RsResource_dispobjGetRefCount; + // dispobjGetMemInterMapParams -- virtual inherited (rmres) base (dispapi) + pThis->__dispobjGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispobjGetMemInterMapParams; - pThis->__dispobjAddAdditionalDependants__ = &__nvoc_thunk_RsResource_dispobjAddAdditionalDependants; + // dispobjCheckMemInterUnmap -- virtual inherited (rmres) base (dispapi) + pThis->__dispobjCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispobjCheckMemInterUnmap; - pThis->__dispobjControl_Prologue__ = &__nvoc_thunk_DisplayApi_dispobjControl_Prologue; + // dispobjGetMemoryMappingDescriptor -- virtual inherited (rmres) base (dispapi) + pThis->__dispobjGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispobjGetMemoryMappingDescriptor; - pThis->__dispobjUnmapFrom__ = &__nvoc_thunk_RsResource_dispobjUnmapFrom; + // dispobjControlSerialization_Prologue -- virtual inherited (rmres) base (dispapi) + pThis->__dispobjControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispobjControlSerialization_Prologue; - pThis->__dispobjControl_Epilogue__ = &__nvoc_thunk_DisplayApi_dispobjControl_Epilogue; + // dispobjControlSerialization_Epilogue -- virtual inherited (rmres) base (dispapi) + pThis->__dispobjControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispobjControlSerialization_Epilogue; - pThis->__dispobjControl__ = &__nvoc_thunk_DisplayApi_dispobjControl; + // dispobjCanCopy -- virtual inherited (res) base (dispapi) + pThis->__dispobjCanCopy__ = &__nvoc_up_thunk_RsResource_dispobjCanCopy; - pThis->__dispobjUnmap__ = &__nvoc_thunk_RsResource_dispobjUnmap; + // dispobjIsDuplicate -- virtual inherited (res) base (dispapi) + pThis->__dispobjIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispobjIsDuplicate; - pThis->__dispobjGetMemInterMapParams__ = &__nvoc_thunk_RmResource_dispobjGetMemInterMapParams; + // dispobjPreDestruct -- virtual inherited (res) base (dispapi) + pThis->__dispobjPreDestruct__ = &__nvoc_up_thunk_RsResource_dispobjPreDestruct; - pThis->__dispobjGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_dispobjGetMemoryMappingDescriptor; + // dispobjControlFilter -- virtual inherited (res) base (dispapi) + pThis->__dispobjControlFilter__ = &__nvoc_up_thunk_RsResource_dispobjControlFilter; - pThis->__dispobjControlFilter__ = &__nvoc_thunk_RsResource_dispobjControlFilter; + // dispobjMap -- virtual inherited (res) base (dispapi) + pThis->__dispobjMap__ = &__nvoc_up_thunk_RsResource_dispobjMap; - pThis->__dispobjUnregisterEvent__ = &__nvoc_thunk_Notifier_dispobjUnregisterEvent; + // dispobjUnmap -- virtual inherited (res) base (dispapi) + pThis->__dispobjUnmap__ = &__nvoc_up_thunk_RsResource_dispobjUnmap; - pThis->__dispobjControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_dispobjControlSerialization_Prologue; + // dispobjIsPartialUnmapSupported -- inline virtual inherited (res) base (dispapi) body + pThis->__dispobjIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispobjIsPartialUnmapSupported; - pThis->__dispobjCanCopy__ = &__nvoc_thunk_RsResource_dispobjCanCopy; + // dispobjMapTo -- virtual inherited (res) base (dispapi) + pThis->__dispobjMapTo__ = &__nvoc_up_thunk_RsResource_dispobjMapTo; - pThis->__dispobjIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_dispobjIsPartialUnmapSupported; + // dispobjUnmapFrom -- virtual inherited (res) base (dispapi) + pThis->__dispobjUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispobjUnmapFrom; - pThis->__dispobjPreDestruct__ = &__nvoc_thunk_RsResource_dispobjPreDestruct; + // dispobjGetRefCount -- virtual inherited (res) base (dispapi) + pThis->__dispobjGetRefCount__ = &__nvoc_up_thunk_RsResource_dispobjGetRefCount; - pThis->__dispobjIsDuplicate__ = &__nvoc_thunk_RsResource_dispobjIsDuplicate; + // dispobjAddAdditionalDependants -- virtual inherited (res) base (dispapi) + pThis->__dispobjAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispobjAddAdditionalDependants; - pThis->__dispobjControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_dispobjControlSerialization_Epilogue; + // dispobjGetNotificationListPtr -- virtual inherited (notify) base (dispapi) + pThis->__dispobjGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispobjGetNotificationListPtr; - pThis->__dispobjGetNotificationListPtr__ = &__nvoc_thunk_Notifier_dispobjGetNotificationListPtr; + // dispobjGetNotificationShare -- virtual inherited (notify) base (dispapi) + pThis->__dispobjGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispobjGetNotificationShare; - pThis->__dispobjGetNotificationShare__ = &__nvoc_thunk_Notifier_dispobjGetNotificationShare; + // dispobjSetNotificationShare -- virtual inherited (notify) base (dispapi) + pThis->__dispobjSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispobjSetNotificationShare; - pThis->__dispobjMap__ = &__nvoc_thunk_RsResource_dispobjMap; + // dispobjUnregisterEvent -- virtual inherited (notify) base (dispapi) + pThis->__dispobjUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispobjUnregisterEvent; + + // dispobjGetOrAllocNotifShare -- virtual inherited (notify) base (dispapi) + pThis->__dispobjGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispobjGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_DispObject_1 with approximately 50 basic block(s). - pThis->__dispobjGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_dispobjGetOrAllocNotifShare; -} +// Initialize vtable(s) for 50 virtual method(s). void __nvoc_init_funcTable_DispObject(DispObject *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 50 per-object function pointer(s). __nvoc_init_funcTable_DispObject_1(pThis, pRmhalspecowner); } @@ -1492,110 +1541,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_NvDispApi = /*pExportInfo=*/ &__nvoc_export_info_NvDispApi }; -static NvBool __nvoc_thunk_RmResource_nvdispapiShareCallback(struct NvDispApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvDispApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_nvdispapiCheckMemInterUnmap(struct NvDispApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_NvDispApi_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RsResource_nvdispapiMapTo(struct NvDispApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), pParams); -} - -static NvBool __nvoc_thunk_RmResource_nvdispapiAccessCallback(struct NvDispApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvDispApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - -static void __nvoc_thunk_Notifier_nvdispapiSetNotificationShare(struct NvDispApi *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_NvDispApi_Notifier.offset), pNotifShare); -} - -static NvU32 __nvoc_thunk_RsResource_nvdispapiGetRefCount(struct NvDispApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvDispApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_nvdispapiAddAdditionalDependants(struct RsClient *pClient, struct NvDispApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_DisplayApi_nvdispapiControl_Prologue(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - return dispapiControl_Prologue((struct DisplayApi *)(((unsigned char *)pDisplayApi) + __nvoc_rtti_NvDispApi_DisplayApi.offset), pCallContext, pRsParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_nvdispapiUnmapFrom(struct NvDispApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), pParams); -} - -static void __nvoc_thunk_DisplayApi_nvdispapiControl_Epilogue(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - dispapiControl_Epilogue((struct DisplayApi *)(((unsigned char *)pDisplayApi) + __nvoc_rtti_NvDispApi_DisplayApi.offset), pCallContext, pRsParams); -} - -static NV_STATUS __nvoc_thunk_DisplayApi_nvdispapiControl(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return dispapiControl((struct DisplayApi *)(((unsigned char *)pDisplayApi) + __nvoc_rtti_NvDispApi_DisplayApi.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_nvdispapiUnmap(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_nvdispapiGetMemInterMapParams(struct NvDispApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_NvDispApi_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_nvdispapiGetMemoryMappingDescriptor(struct NvDispApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_NvDispApi_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_nvdispapiControlFilter(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_Notifier_nvdispapiUnregisterEvent(struct NvDispApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_NvDispApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static NV_STATUS __nvoc_thunk_RmResource_nvdispapiControlSerialization_Prologue(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvDispApi_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_nvdispapiCanCopy(struct NvDispApi *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvDispApi_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_nvdispapiIsPartialUnmapSupported(struct NvDispApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvDispApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_nvdispapiPreDestruct(struct NvDispApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvDispApi_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_nvdispapiIsDuplicate(struct NvDispApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_nvdispapiControlSerialization_Epilogue(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvDispApi_RmResource.offset), pCallContext, pParams); -} - -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_nvdispapiGetNotificationListPtr(struct NvDispApi *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_NvDispApi_Notifier.offset)); -} - -static struct NotifShare *__nvoc_thunk_Notifier_nvdispapiGetNotificationShare(struct NvDispApi *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_NvDispApi_Notifier.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_nvdispapiMap(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_Notifier_nvdispapiGetOrAllocNotifShare(struct NvDispApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_NvDispApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -1603,12 +1548,12 @@ static NV_STATUS __nvoc_thunk_Notifier_nvdispapiGetOrAllocNotifShare(struct NvDi static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_NvDispApi[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) nvdispapiCtrlCmdIdleChannel_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0xc3700101u, /*paramSize=*/ sizeof(NVC370_CTRL_IDLE_CHANNEL_PARAMS), @@ -1618,12 +1563,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_NvDispAp #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) nvdispapiCtrlCmdSetAccl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0xc3700102u, /*paramSize=*/ sizeof(NVC370_CTRL_SET_ACCL_PARAMS), @@ -1633,12 +1578,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_NvDispAp #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) nvdispapiCtrlCmdGetAccl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0xc3700103u, /*paramSize=*/ sizeof(NVC370_CTRL_GET_ACCL_PARAMS), @@ -1648,12 +1593,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_NvDispAp #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) nvdispapiCtrlCmdGetChannelInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0xc3700104u, /*paramSize=*/ sizeof(NVC370_CTRL_CMD_GET_CHANNEL_INFO_PARAMS), @@ -1663,12 +1608,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_NvDispAp #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) nvdispapiCtrlCmdGetLockpinsCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0xc3700201u, /*paramSize=*/ sizeof(NVC370_CTRL_GET_LOCKPINS_CAPS_PARAMS), @@ -1678,12 +1623,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_NvDispAp #endif }, { /* [5] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) nvdispapiCtrlCmdSetSwaprdyGpioWar_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0xc3700202u, /*paramSize=*/ sizeof(NVC370_CTRL_SET_SWAPRDY_GPIO_WAR_PARAMS), @@ -1693,12 +1638,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_NvDispAp #endif }, { /* [6] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0xc3700602u, /*paramSize=*/ sizeof(NVC370_CTRL_CMD_SET_FORCE_MODESWITCH_FLAGS_OVERRIDES_PARAMS), @@ -1710,30 +1655,163 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_NvDispAp }; -const struct NVOC_EXPORT_INFO __nvoc_export_info_NvDispApi = -{ - /*numEntries=*/ 7, - /*pExportEntries=*/ __nvoc_exported_method_def_NvDispApi -}; +// 26 up-thunk(s) defined to bridge methods in NvDispApi to superclasses -void __nvoc_dtor_DispObject(DispObject*); -void __nvoc_dtor_NvDispApi(NvDispApi *pThis) { - __nvoc_dtor_DispObject(&pThis->__nvoc_base_DispObject); - PORT_UNREFERENCED_VARIABLE(pThis); +// nvdispapiControl: virtual inherited (dispapi) base (dispobj) +static NV_STATUS __nvoc_up_thunk_DisplayApi_nvdispapiControl(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return dispapiControl((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_NvDispApi_DisplayApi.offset), pCallContext, pParams); } -void __nvoc_init_dataField_NvDispApi(NvDispApi *pThis) { - PORT_UNREFERENCED_VARIABLE(pThis); +// nvdispapiControl_Prologue: virtual inherited (dispapi) base (dispobj) +static NV_STATUS __nvoc_up_thunk_DisplayApi_nvdispapiControl_Prologue(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { + return dispapiControl_Prologue((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_NvDispApi_DisplayApi.offset), pCallContext, pRsParams); } -NV_STATUS __nvoc_ctor_DispObject(DispObject* , RmHalspecOwner* , struct CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); -NV_STATUS __nvoc_ctor_NvDispApi(NvDispApi *pThis, RmHalspecOwner *pRmhalspecowner, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams) { - NV_STATUS status = NV_OK; - status = __nvoc_ctor_DispObject(&pThis->__nvoc_base_DispObject, pRmhalspecowner, arg_pCallContext, arg_pParams); - if (status != NV_OK) goto __nvoc_ctor_NvDispApi_fail_DispObject; - __nvoc_init_dataField_NvDispApi(pThis); +// nvdispapiControl_Epilogue: virtual inherited (dispapi) base (dispobj) +static void __nvoc_up_thunk_DisplayApi_nvdispapiControl_Epilogue(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { + dispapiControl_Epilogue((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_NvDispApi_DisplayApi.offset), pCallContext, pRsParams); +} - status = __nvoc_nvdispapiConstruct(pThis, arg_pCallContext, arg_pParams); +// nvdispapiAccessCallback: virtual inherited (rmres) base (dispobj) +static NvBool __nvoc_up_thunk_RmResource_nvdispapiAccessCallback(struct NvDispApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// nvdispapiShareCallback: virtual inherited (rmres) base (dispobj) +static NvBool __nvoc_up_thunk_RmResource_nvdispapiShareCallback(struct NvDispApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// nvdispapiGetMemInterMapParams: virtual inherited (rmres) base (dispobj) +static NV_STATUS __nvoc_up_thunk_RmResource_nvdispapiGetMemInterMapParams(struct NvDispApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvDispApi_RmResource.offset), pParams); +} + +// nvdispapiCheckMemInterUnmap: virtual inherited (rmres) base (dispobj) +static NV_STATUS __nvoc_up_thunk_RmResource_nvdispapiCheckMemInterUnmap(struct NvDispApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvDispApi_RmResource.offset), bSubdeviceHandleProvided); +} + +// nvdispapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (dispobj) +static NV_STATUS __nvoc_up_thunk_RmResource_nvdispapiGetMemoryMappingDescriptor(struct NvDispApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvDispApi_RmResource.offset), ppMemDesc); +} + +// nvdispapiControlSerialization_Prologue: virtual inherited (rmres) base (dispobj) +static NV_STATUS __nvoc_up_thunk_RmResource_nvdispapiControlSerialization_Prologue(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RmResource.offset), pCallContext, pParams); +} + +// nvdispapiControlSerialization_Epilogue: virtual inherited (rmres) base (dispobj) +static void __nvoc_up_thunk_RmResource_nvdispapiControlSerialization_Epilogue(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RmResource.offset), pCallContext, pParams); +} + +// nvdispapiCanCopy: virtual inherited (res) base (dispobj) +static NvBool __nvoc_up_thunk_RsResource_nvdispapiCanCopy(struct NvDispApi *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset)); +} + +// nvdispapiIsDuplicate: virtual inherited (res) base (dispobj) +static NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiIsDuplicate(struct NvDispApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), hMemory, pDuplicate); +} + +// nvdispapiPreDestruct: virtual inherited (res) base (dispobj) +static void __nvoc_up_thunk_RsResource_nvdispapiPreDestruct(struct NvDispApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset)); +} + +// nvdispapiControlFilter: virtual inherited (res) base (dispobj) +static NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiControlFilter(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), pCallContext, pParams); +} + +// nvdispapiMap: virtual inherited (res) base (dispobj) +static NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiMap(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), pCallContext, pParams, pCpuMapping); +} + +// nvdispapiUnmap: virtual inherited (res) base (dispobj) +static NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiUnmap(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), pCallContext, pCpuMapping); +} + +// nvdispapiIsPartialUnmapSupported: inline virtual inherited (res) base (dispobj) body +static NvBool __nvoc_up_thunk_RsResource_nvdispapiIsPartialUnmapSupported(struct NvDispApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset)); +} + +// nvdispapiMapTo: virtual inherited (res) base (dispobj) +static NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiMapTo(struct NvDispApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), pParams); +} + +// nvdispapiUnmapFrom: virtual inherited (res) base (dispobj) +static NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiUnmapFrom(struct NvDispApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), pParams); +} + +// nvdispapiGetRefCount: virtual inherited (res) base (dispobj) +static NvU32 __nvoc_up_thunk_RsResource_nvdispapiGetRefCount(struct NvDispApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset)); +} + +// nvdispapiAddAdditionalDependants: virtual inherited (res) base (dispobj) +static void __nvoc_up_thunk_RsResource_nvdispapiAddAdditionalDependants(struct RsClient *pClient, struct NvDispApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), pReference); +} + +// nvdispapiGetNotificationListPtr: virtual inherited (notify) base (dispobj) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_nvdispapiGetNotificationListPtr(struct NvDispApi *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvDispApi_Notifier.offset)); +} + +// nvdispapiGetNotificationShare: virtual inherited (notify) base (dispobj) +static struct NotifShare * __nvoc_up_thunk_Notifier_nvdispapiGetNotificationShare(struct NvDispApi *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvDispApi_Notifier.offset)); +} + +// nvdispapiSetNotificationShare: virtual inherited (notify) base (dispobj) +static void __nvoc_up_thunk_Notifier_nvdispapiSetNotificationShare(struct NvDispApi *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvDispApi_Notifier.offset), pNotifShare); +} + +// nvdispapiUnregisterEvent: virtual inherited (notify) base (dispobj) +static NV_STATUS __nvoc_up_thunk_Notifier_nvdispapiUnregisterEvent(struct NvDispApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvDispApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +} + +// nvdispapiGetOrAllocNotifShare: virtual inherited (notify) base (dispobj) +static NV_STATUS __nvoc_up_thunk_Notifier_nvdispapiGetOrAllocNotifShare(struct NvDispApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvDispApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +} + + +const struct NVOC_EXPORT_INFO __nvoc_export_info_NvDispApi = +{ + /*numEntries=*/ 7, + /*pExportEntries=*/ __nvoc_exported_method_def_NvDispApi +}; + +void __nvoc_dtor_DispObject(DispObject*); +void __nvoc_dtor_NvDispApi(NvDispApi *pThis) { + __nvoc_dtor_DispObject(&pThis->__nvoc_base_DispObject); + PORT_UNREFERENCED_VARIABLE(pThis); +} + +void __nvoc_init_dataField_NvDispApi(NvDispApi *pThis) { + PORT_UNREFERENCED_VARIABLE(pThis); +} + +NV_STATUS __nvoc_ctor_DispObject(DispObject* , RmHalspecOwner* , struct CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); +NV_STATUS __nvoc_ctor_NvDispApi(NvDispApi *pThis, RmHalspecOwner *pRmhalspecowner, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams) { + NV_STATUS status = NV_OK; + status = __nvoc_ctor_DispObject(&pThis->__nvoc_base_DispObject, pRmhalspecowner, arg_pCallContext, arg_pParams); + if (status != NV_OK) goto __nvoc_ctor_NvDispApi_fail_DispObject; + __nvoc_init_dataField_NvDispApi(pThis); + + status = __nvoc_nvdispapiConstruct(pThis, arg_pCallContext, arg_pParams); if (status != NV_OK) goto __nvoc_ctor_NvDispApi_fail__init; goto __nvoc_ctor_NvDispApi_exit; // Success @@ -1745,91 +1823,129 @@ NV_STATUS __nvoc_ctor_NvDispApi(NvDispApi *pThis, RmHalspecOwner *pRmhalspecowne return status; } +// Vtable initialization static void __nvoc_init_funcTable_NvDispApi_1(NvDispApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // nvdispapiCtrlCmdIdleChannel -- exported (id=0xc3700101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__nvdispapiCtrlCmdIdleChannel__ = &nvdispapiCtrlCmdIdleChannel_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // nvdispapiCtrlCmdSetAccl -- exported (id=0xc3700102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__nvdispapiCtrlCmdSetAccl__ = &nvdispapiCtrlCmdSetAccl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // nvdispapiCtrlCmdGetAccl -- exported (id=0xc3700103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__nvdispapiCtrlCmdGetAccl__ = &nvdispapiCtrlCmdGetAccl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // nvdispapiCtrlCmdGetChannelInfo -- exported (id=0xc3700104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__nvdispapiCtrlCmdGetChannelInfo__ = &nvdispapiCtrlCmdGetChannelInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // nvdispapiCtrlCmdSetSwaprdyGpioWar -- exported (id=0xc3700202) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__nvdispapiCtrlCmdSetSwaprdyGpioWar__ = &nvdispapiCtrlCmdSetSwaprdyGpioWar_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // nvdispapiCtrlCmdGetLockpinsCaps -- exported (id=0xc3700201) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__nvdispapiCtrlCmdGetLockpinsCaps__ = &nvdispapiCtrlCmdGetLockpinsCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides -- exported (id=0xc3700602) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides__ = &nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides_IMPL; #endif - pThis->__nvdispapiShareCallback__ = &__nvoc_thunk_RmResource_nvdispapiShareCallback; + // nvdispapiControl -- virtual inherited (dispapi) base (dispobj) + pThis->__nvdispapiControl__ = &__nvoc_up_thunk_DisplayApi_nvdispapiControl; - pThis->__nvdispapiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_nvdispapiCheckMemInterUnmap; + // nvdispapiControl_Prologue -- virtual inherited (dispapi) base (dispobj) + pThis->__nvdispapiControl_Prologue__ = &__nvoc_up_thunk_DisplayApi_nvdispapiControl_Prologue; - pThis->__nvdispapiMapTo__ = &__nvoc_thunk_RsResource_nvdispapiMapTo; + // nvdispapiControl_Epilogue -- virtual inherited (dispapi) base (dispobj) + pThis->__nvdispapiControl_Epilogue__ = &__nvoc_up_thunk_DisplayApi_nvdispapiControl_Epilogue; - pThis->__nvdispapiAccessCallback__ = &__nvoc_thunk_RmResource_nvdispapiAccessCallback; + // nvdispapiAccessCallback -- virtual inherited (rmres) base (dispobj) + pThis->__nvdispapiAccessCallback__ = &__nvoc_up_thunk_RmResource_nvdispapiAccessCallback; - pThis->__nvdispapiSetNotificationShare__ = &__nvoc_thunk_Notifier_nvdispapiSetNotificationShare; + // nvdispapiShareCallback -- virtual inherited (rmres) base (dispobj) + pThis->__nvdispapiShareCallback__ = &__nvoc_up_thunk_RmResource_nvdispapiShareCallback; - pThis->__nvdispapiGetRefCount__ = &__nvoc_thunk_RsResource_nvdispapiGetRefCount; + // nvdispapiGetMemInterMapParams -- virtual inherited (rmres) base (dispobj) + pThis->__nvdispapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_nvdispapiGetMemInterMapParams; - pThis->__nvdispapiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_nvdispapiAddAdditionalDependants; + // nvdispapiCheckMemInterUnmap -- virtual inherited (rmres) base (dispobj) + pThis->__nvdispapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_nvdispapiCheckMemInterUnmap; - pThis->__nvdispapiControl_Prologue__ = &__nvoc_thunk_DisplayApi_nvdispapiControl_Prologue; + // nvdispapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (dispobj) + pThis->__nvdispapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_nvdispapiGetMemoryMappingDescriptor; - pThis->__nvdispapiUnmapFrom__ = &__nvoc_thunk_RsResource_nvdispapiUnmapFrom; + // nvdispapiControlSerialization_Prologue -- virtual inherited (rmres) base (dispobj) + pThis->__nvdispapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_nvdispapiControlSerialization_Prologue; - pThis->__nvdispapiControl_Epilogue__ = &__nvoc_thunk_DisplayApi_nvdispapiControl_Epilogue; + // nvdispapiControlSerialization_Epilogue -- virtual inherited (rmres) base (dispobj) + pThis->__nvdispapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_nvdispapiControlSerialization_Epilogue; - pThis->__nvdispapiControl__ = &__nvoc_thunk_DisplayApi_nvdispapiControl; + // nvdispapiCanCopy -- virtual inherited (res) base (dispobj) + pThis->__nvdispapiCanCopy__ = &__nvoc_up_thunk_RsResource_nvdispapiCanCopy; - pThis->__nvdispapiUnmap__ = &__nvoc_thunk_RsResource_nvdispapiUnmap; + // nvdispapiIsDuplicate -- virtual inherited (res) base (dispobj) + pThis->__nvdispapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_nvdispapiIsDuplicate; - pThis->__nvdispapiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_nvdispapiGetMemInterMapParams; + // nvdispapiPreDestruct -- virtual inherited (res) base (dispobj) + pThis->__nvdispapiPreDestruct__ = &__nvoc_up_thunk_RsResource_nvdispapiPreDestruct; - pThis->__nvdispapiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_nvdispapiGetMemoryMappingDescriptor; + // nvdispapiControlFilter -- virtual inherited (res) base (dispobj) + pThis->__nvdispapiControlFilter__ = &__nvoc_up_thunk_RsResource_nvdispapiControlFilter; - pThis->__nvdispapiControlFilter__ = &__nvoc_thunk_RsResource_nvdispapiControlFilter; + // nvdispapiMap -- virtual inherited (res) base (dispobj) + pThis->__nvdispapiMap__ = &__nvoc_up_thunk_RsResource_nvdispapiMap; - pThis->__nvdispapiUnregisterEvent__ = &__nvoc_thunk_Notifier_nvdispapiUnregisterEvent; + // nvdispapiUnmap -- virtual inherited (res) base (dispobj) + pThis->__nvdispapiUnmap__ = &__nvoc_up_thunk_RsResource_nvdispapiUnmap; - pThis->__nvdispapiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_nvdispapiControlSerialization_Prologue; + // nvdispapiIsPartialUnmapSupported -- inline virtual inherited (res) base (dispobj) body + pThis->__nvdispapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_nvdispapiIsPartialUnmapSupported; - pThis->__nvdispapiCanCopy__ = &__nvoc_thunk_RsResource_nvdispapiCanCopy; + // nvdispapiMapTo -- virtual inherited (res) base (dispobj) + pThis->__nvdispapiMapTo__ = &__nvoc_up_thunk_RsResource_nvdispapiMapTo; - pThis->__nvdispapiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_nvdispapiIsPartialUnmapSupported; + // nvdispapiUnmapFrom -- virtual inherited (res) base (dispobj) + pThis->__nvdispapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_nvdispapiUnmapFrom; - pThis->__nvdispapiPreDestruct__ = &__nvoc_thunk_RsResource_nvdispapiPreDestruct; + // nvdispapiGetRefCount -- virtual inherited (res) base (dispobj) + pThis->__nvdispapiGetRefCount__ = &__nvoc_up_thunk_RsResource_nvdispapiGetRefCount; - pThis->__nvdispapiIsDuplicate__ = &__nvoc_thunk_RsResource_nvdispapiIsDuplicate; + // nvdispapiAddAdditionalDependants -- virtual inherited (res) base (dispobj) + pThis->__nvdispapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_nvdispapiAddAdditionalDependants; - pThis->__nvdispapiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_nvdispapiControlSerialization_Epilogue; + // nvdispapiGetNotificationListPtr -- virtual inherited (notify) base (dispobj) + pThis->__nvdispapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_nvdispapiGetNotificationListPtr; - pThis->__nvdispapiGetNotificationListPtr__ = &__nvoc_thunk_Notifier_nvdispapiGetNotificationListPtr; + // nvdispapiGetNotificationShare -- virtual inherited (notify) base (dispobj) + pThis->__nvdispapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_nvdispapiGetNotificationShare; - pThis->__nvdispapiGetNotificationShare__ = &__nvoc_thunk_Notifier_nvdispapiGetNotificationShare; + // nvdispapiSetNotificationShare -- virtual inherited (notify) base (dispobj) + pThis->__nvdispapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_nvdispapiSetNotificationShare; - pThis->__nvdispapiMap__ = &__nvoc_thunk_RsResource_nvdispapiMap; + // nvdispapiUnregisterEvent -- virtual inherited (notify) base (dispobj) + pThis->__nvdispapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_nvdispapiUnregisterEvent; + + // nvdispapiGetOrAllocNotifShare -- virtual inherited (notify) base (dispobj) + pThis->__nvdispapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_nvdispapiGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_NvDispApi_1 with approximately 33 basic block(s). - pThis->__nvdispapiGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_nvdispapiGetOrAllocNotifShare; -} +// Initialize vtable(s) for 33 virtual method(s). void __nvoc_init_funcTable_NvDispApi(NvDispApi *pThis) { + + // Initialize vtable(s) with 33 per-object function pointer(s). __nvoc_init_funcTable_NvDispApi_1(pThis); } @@ -2028,110 +2144,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DispSwObj = /*pExportInfo=*/ &__nvoc_export_info_DispSwObj }; -static NvBool __nvoc_thunk_RmResource_dispswobjShareCallback(struct DispSwObj *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObj_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_dispswobjCheckMemInterUnmap(struct DispSwObj *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispSwObj_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RsResource_dispswobjMapTo(struct DispSwObj *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), pParams); -} - -static NvBool __nvoc_thunk_RmResource_dispswobjAccessCallback(struct DispSwObj *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObj_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - -static void __nvoc_thunk_Notifier_dispswobjSetNotificationShare(struct DispSwObj *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispSwObj_Notifier.offset), pNotifShare); -} - -static NvU32 __nvoc_thunk_RsResource_dispswobjGetRefCount(struct DispSwObj *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObj_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_dispswobjAddAdditionalDependants(struct RsClient *pClient, struct DispSwObj *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_DisplayApi_dispswobjControl_Prologue(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - return dispapiControl_Prologue((struct DisplayApi *)(((unsigned char *)pDisplayApi) + __nvoc_rtti_DispSwObj_DisplayApi.offset), pCallContext, pRsParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_dispswobjUnmapFrom(struct DispSwObj *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), pParams); -} - -static void __nvoc_thunk_DisplayApi_dispswobjControl_Epilogue(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - dispapiControl_Epilogue((struct DisplayApi *)(((unsigned char *)pDisplayApi) + __nvoc_rtti_DispSwObj_DisplayApi.offset), pCallContext, pRsParams); -} - -static NV_STATUS __nvoc_thunk_DisplayApi_dispswobjControl(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return dispapiControl((struct DisplayApi *)(((unsigned char *)pDisplayApi) + __nvoc_rtti_DispSwObj_DisplayApi.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_dispswobjUnmap(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_dispswobjGetMemInterMapParams(struct DispSwObj *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispSwObj_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_dispswobjGetMemoryMappingDescriptor(struct DispSwObj *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispSwObj_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_dispswobjControlFilter(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_Notifier_dispswobjUnregisterEvent(struct DispSwObj *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispSwObj_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static NV_STATUS __nvoc_thunk_RmResource_dispswobjControlSerialization_Prologue(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObj_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_dispswobjCanCopy(struct DispSwObj *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObj_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_dispswobjIsPartialUnmapSupported(struct DispSwObj *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObj_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_dispswobjPreDestruct(struct DispSwObj *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObj_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_dispswobjIsDuplicate(struct DispSwObj *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_dispswobjControlSerialization_Epilogue(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObj_RmResource.offset), pCallContext, pParams); -} - -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_dispswobjGetNotificationListPtr(struct DispSwObj *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispSwObj_Notifier.offset)); -} - -static struct NotifShare *__nvoc_thunk_Notifier_dispswobjGetNotificationShare(struct DispSwObj *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispSwObj_Notifier.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_dispswobjMap(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_Notifier_dispswobjGetOrAllocNotifShare(struct DispSwObj *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispSwObj_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -2139,12 +2151,12 @@ static NV_STATUS __nvoc_thunk_Notifier_dispswobjGetOrAllocNotifShare(struct Disp static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispSwObj[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispswobjCtrlCmdIsModePossible_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0xc3720101u, /*paramSize=*/ sizeof(NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS), @@ -2154,12 +2166,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispSwOb #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispswobjCtrlCmdIsModePossibleOrSettings_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0xc3720102u, /*paramSize=*/ sizeof(NVC372_CTRL_IS_MODE_POSSIBLE_OR_SETTINGS_PARAMS), @@ -2169,12 +2181,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispSwOb #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispswobjCtrlCmdVideoAdaptiveRefreshRate_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0xc3720103u, /*paramSize=*/ sizeof(NVC372_CTRL_CMD_VIDEO_ADAPTIVE_REFRESH_RATE_PARAMS), @@ -2184,12 +2196,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispSwOb #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x211u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x49u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispswobjCtrlCmdGetActiveViewportPointIn_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x211u) - /*flags=*/ 0x211u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x49u) + /*flags=*/ 0x49u, /*accessRight=*/0x0u, /*methodId=*/ 0xc3720104u, /*paramSize=*/ sizeof(NVC372_CTRL_CMD_GET_ACTIVE_VIEWPORT_POINT_IN_PARAMS), @@ -2201,6 +2213,139 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispSwOb }; +// 26 up-thunk(s) defined to bridge methods in DispSwObj to superclasses + +// dispswobjControl: virtual inherited (dispapi) base (dispapi) +static NV_STATUS __nvoc_up_thunk_DisplayApi_dispswobjControl(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return dispapiControl((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_DispSwObj_DisplayApi.offset), pCallContext, pParams); +} + +// dispswobjControl_Prologue: virtual inherited (dispapi) base (dispapi) +static NV_STATUS __nvoc_up_thunk_DisplayApi_dispswobjControl_Prologue(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { + return dispapiControl_Prologue((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_DispSwObj_DisplayApi.offset), pCallContext, pRsParams); +} + +// dispswobjControl_Epilogue: virtual inherited (dispapi) base (dispapi) +static void __nvoc_up_thunk_DisplayApi_dispswobjControl_Epilogue(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { + dispapiControl_Epilogue((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_DispSwObj_DisplayApi.offset), pCallContext, pRsParams); +} + +// dispswobjAccessCallback: virtual inherited (rmres) base (dispapi) +static NvBool __nvoc_up_thunk_RmResource_dispswobjAccessCallback(struct DispSwObj *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// dispswobjShareCallback: virtual inherited (rmres) base (dispapi) +static NvBool __nvoc_up_thunk_RmResource_dispswobjShareCallback(struct DispSwObj *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// dispswobjGetMemInterMapParams: virtual inherited (rmres) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RmResource_dispswobjGetMemInterMapParams(struct DispSwObj *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispSwObj_RmResource.offset), pParams); +} + +// dispswobjCheckMemInterUnmap: virtual inherited (rmres) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RmResource_dispswobjCheckMemInterUnmap(struct DispSwObj *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispSwObj_RmResource.offset), bSubdeviceHandleProvided); +} + +// dispswobjGetMemoryMappingDescriptor: virtual inherited (rmres) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RmResource_dispswobjGetMemoryMappingDescriptor(struct DispSwObj *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispSwObj_RmResource.offset), ppMemDesc); +} + +// dispswobjControlSerialization_Prologue: virtual inherited (rmres) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RmResource_dispswobjControlSerialization_Prologue(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RmResource.offset), pCallContext, pParams); +} + +// dispswobjControlSerialization_Epilogue: virtual inherited (rmres) base (dispapi) +static void __nvoc_up_thunk_RmResource_dispswobjControlSerialization_Epilogue(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RmResource.offset), pCallContext, pParams); +} + +// dispswobjCanCopy: virtual inherited (res) base (dispapi) +static NvBool __nvoc_up_thunk_RsResource_dispswobjCanCopy(struct DispSwObj *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset)); +} + +// dispswobjIsDuplicate: virtual inherited (res) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RsResource_dispswobjIsDuplicate(struct DispSwObj *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), hMemory, pDuplicate); +} + +// dispswobjPreDestruct: virtual inherited (res) base (dispapi) +static void __nvoc_up_thunk_RsResource_dispswobjPreDestruct(struct DispSwObj *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset)); +} + +// dispswobjControlFilter: virtual inherited (res) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RsResource_dispswobjControlFilter(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), pCallContext, pParams); +} + +// dispswobjMap: virtual inherited (res) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RsResource_dispswobjMap(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), pCallContext, pParams, pCpuMapping); +} + +// dispswobjUnmap: virtual inherited (res) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RsResource_dispswobjUnmap(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), pCallContext, pCpuMapping); +} + +// dispswobjIsPartialUnmapSupported: inline virtual inherited (res) base (dispapi) body +static NvBool __nvoc_up_thunk_RsResource_dispswobjIsPartialUnmapSupported(struct DispSwObj *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset)); +} + +// dispswobjMapTo: virtual inherited (res) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RsResource_dispswobjMapTo(struct DispSwObj *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), pParams); +} + +// dispswobjUnmapFrom: virtual inherited (res) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RsResource_dispswobjUnmapFrom(struct DispSwObj *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), pParams); +} + +// dispswobjGetRefCount: virtual inherited (res) base (dispapi) +static NvU32 __nvoc_up_thunk_RsResource_dispswobjGetRefCount(struct DispSwObj *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset)); +} + +// dispswobjAddAdditionalDependants: virtual inherited (res) base (dispapi) +static void __nvoc_up_thunk_RsResource_dispswobjAddAdditionalDependants(struct RsClient *pClient, struct DispSwObj *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), pReference); +} + +// dispswobjGetNotificationListPtr: virtual inherited (notify) base (dispapi) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispswobjGetNotificationListPtr(struct DispSwObj *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispSwObj_Notifier.offset)); +} + +// dispswobjGetNotificationShare: virtual inherited (notify) base (dispapi) +static struct NotifShare * __nvoc_up_thunk_Notifier_dispswobjGetNotificationShare(struct DispSwObj *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispSwObj_Notifier.offset)); +} + +// dispswobjSetNotificationShare: virtual inherited (notify) base (dispapi) +static void __nvoc_up_thunk_Notifier_dispswobjSetNotificationShare(struct DispSwObj *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispSwObj_Notifier.offset), pNotifShare); +} + +// dispswobjUnregisterEvent: virtual inherited (notify) base (dispapi) +static NV_STATUS __nvoc_up_thunk_Notifier_dispswobjUnregisterEvent(struct DispSwObj *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispSwObj_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +} + +// dispswobjGetOrAllocNotifShare: virtual inherited (notify) base (dispapi) +static NV_STATUS __nvoc_up_thunk_Notifier_dispswobjGetOrAllocNotifShare(struct DispSwObj *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispSwObj_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_DispSwObj = { /*numEntries=*/ 4, @@ -2236,79 +2381,114 @@ NV_STATUS __nvoc_ctor_DispSwObj(DispSwObj *pThis, RmHalspecOwner *pRmhalspecowne return status; } +// Vtable initialization static void __nvoc_init_funcTable_DispSwObj_1(DispSwObj *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispswobjCtrlCmdIsModePossible -- exported (id=0xc3720101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispswobjCtrlCmdIsModePossible__ = &dispswobjCtrlCmdIsModePossible_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispswobjCtrlCmdIsModePossibleOrSettings -- exported (id=0xc3720102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispswobjCtrlCmdIsModePossibleOrSettings__ = &dispswobjCtrlCmdIsModePossibleOrSettings_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispswobjCtrlCmdVideoAdaptiveRefreshRate -- exported (id=0xc3720103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispswobjCtrlCmdVideoAdaptiveRefreshRate__ = &dispswobjCtrlCmdVideoAdaptiveRefreshRate_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x211u) + // dispswobjCtrlCmdGetActiveViewportPointIn -- exported (id=0xc3720104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x49u) pThis->__dispswobjCtrlCmdGetActiveViewportPointIn__ = &dispswobjCtrlCmdGetActiveViewportPointIn_IMPL; #endif - pThis->__dispswobjShareCallback__ = &__nvoc_thunk_RmResource_dispswobjShareCallback; + // dispswobjControl -- virtual inherited (dispapi) base (dispapi) + pThis->__dispswobjControl__ = &__nvoc_up_thunk_DisplayApi_dispswobjControl; - pThis->__dispswobjCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_dispswobjCheckMemInterUnmap; + // dispswobjControl_Prologue -- virtual inherited (dispapi) base (dispapi) + pThis->__dispswobjControl_Prologue__ = &__nvoc_up_thunk_DisplayApi_dispswobjControl_Prologue; - pThis->__dispswobjMapTo__ = &__nvoc_thunk_RsResource_dispswobjMapTo; + // dispswobjControl_Epilogue -- virtual inherited (dispapi) base (dispapi) + pThis->__dispswobjControl_Epilogue__ = &__nvoc_up_thunk_DisplayApi_dispswobjControl_Epilogue; - pThis->__dispswobjAccessCallback__ = &__nvoc_thunk_RmResource_dispswobjAccessCallback; + // dispswobjAccessCallback -- virtual inherited (rmres) base (dispapi) + pThis->__dispswobjAccessCallback__ = &__nvoc_up_thunk_RmResource_dispswobjAccessCallback; - pThis->__dispswobjSetNotificationShare__ = &__nvoc_thunk_Notifier_dispswobjSetNotificationShare; + // dispswobjShareCallback -- virtual inherited (rmres) base (dispapi) + pThis->__dispswobjShareCallback__ = &__nvoc_up_thunk_RmResource_dispswobjShareCallback; - pThis->__dispswobjGetRefCount__ = &__nvoc_thunk_RsResource_dispswobjGetRefCount; + // dispswobjGetMemInterMapParams -- virtual inherited (rmres) base (dispapi) + pThis->__dispswobjGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispswobjGetMemInterMapParams; - pThis->__dispswobjAddAdditionalDependants__ = &__nvoc_thunk_RsResource_dispswobjAddAdditionalDependants; + // dispswobjCheckMemInterUnmap -- virtual inherited (rmres) base (dispapi) + pThis->__dispswobjCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispswobjCheckMemInterUnmap; - pThis->__dispswobjControl_Prologue__ = &__nvoc_thunk_DisplayApi_dispswobjControl_Prologue; + // dispswobjGetMemoryMappingDescriptor -- virtual inherited (rmres) base (dispapi) + pThis->__dispswobjGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispswobjGetMemoryMappingDescriptor; - pThis->__dispswobjUnmapFrom__ = &__nvoc_thunk_RsResource_dispswobjUnmapFrom; + // dispswobjControlSerialization_Prologue -- virtual inherited (rmres) base (dispapi) + pThis->__dispswobjControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispswobjControlSerialization_Prologue; - pThis->__dispswobjControl_Epilogue__ = &__nvoc_thunk_DisplayApi_dispswobjControl_Epilogue; + // dispswobjControlSerialization_Epilogue -- virtual inherited (rmres) base (dispapi) + pThis->__dispswobjControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispswobjControlSerialization_Epilogue; - pThis->__dispswobjControl__ = &__nvoc_thunk_DisplayApi_dispswobjControl; + // dispswobjCanCopy -- virtual inherited (res) base (dispapi) + pThis->__dispswobjCanCopy__ = &__nvoc_up_thunk_RsResource_dispswobjCanCopy; - pThis->__dispswobjUnmap__ = &__nvoc_thunk_RsResource_dispswobjUnmap; + // dispswobjIsDuplicate -- virtual inherited (res) base (dispapi) + pThis->__dispswobjIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispswobjIsDuplicate; - pThis->__dispswobjGetMemInterMapParams__ = &__nvoc_thunk_RmResource_dispswobjGetMemInterMapParams; + // dispswobjPreDestruct -- virtual inherited (res) base (dispapi) + pThis->__dispswobjPreDestruct__ = &__nvoc_up_thunk_RsResource_dispswobjPreDestruct; - pThis->__dispswobjGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_dispswobjGetMemoryMappingDescriptor; + // dispswobjControlFilter -- virtual inherited (res) base (dispapi) + pThis->__dispswobjControlFilter__ = &__nvoc_up_thunk_RsResource_dispswobjControlFilter; - pThis->__dispswobjControlFilter__ = &__nvoc_thunk_RsResource_dispswobjControlFilter; + // dispswobjMap -- virtual inherited (res) base (dispapi) + pThis->__dispswobjMap__ = &__nvoc_up_thunk_RsResource_dispswobjMap; - pThis->__dispswobjUnregisterEvent__ = &__nvoc_thunk_Notifier_dispswobjUnregisterEvent; + // dispswobjUnmap -- virtual inherited (res) base (dispapi) + pThis->__dispswobjUnmap__ = &__nvoc_up_thunk_RsResource_dispswobjUnmap; - pThis->__dispswobjControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_dispswobjControlSerialization_Prologue; + // dispswobjIsPartialUnmapSupported -- inline virtual inherited (res) base (dispapi) body + pThis->__dispswobjIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispswobjIsPartialUnmapSupported; - pThis->__dispswobjCanCopy__ = &__nvoc_thunk_RsResource_dispswobjCanCopy; + // dispswobjMapTo -- virtual inherited (res) base (dispapi) + pThis->__dispswobjMapTo__ = &__nvoc_up_thunk_RsResource_dispswobjMapTo; - pThis->__dispswobjIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_dispswobjIsPartialUnmapSupported; + // dispswobjUnmapFrom -- virtual inherited (res) base (dispapi) + pThis->__dispswobjUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispswobjUnmapFrom; - pThis->__dispswobjPreDestruct__ = &__nvoc_thunk_RsResource_dispswobjPreDestruct; + // dispswobjGetRefCount -- virtual inherited (res) base (dispapi) + pThis->__dispswobjGetRefCount__ = &__nvoc_up_thunk_RsResource_dispswobjGetRefCount; - pThis->__dispswobjIsDuplicate__ = &__nvoc_thunk_RsResource_dispswobjIsDuplicate; + // dispswobjAddAdditionalDependants -- virtual inherited (res) base (dispapi) + pThis->__dispswobjAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispswobjAddAdditionalDependants; - pThis->__dispswobjControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_dispswobjControlSerialization_Epilogue; + // dispswobjGetNotificationListPtr -- virtual inherited (notify) base (dispapi) + pThis->__dispswobjGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispswobjGetNotificationListPtr; - pThis->__dispswobjGetNotificationListPtr__ = &__nvoc_thunk_Notifier_dispswobjGetNotificationListPtr; + // dispswobjGetNotificationShare -- virtual inherited (notify) base (dispapi) + pThis->__dispswobjGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispswobjGetNotificationShare; - pThis->__dispswobjGetNotificationShare__ = &__nvoc_thunk_Notifier_dispswobjGetNotificationShare; + // dispswobjSetNotificationShare -- virtual inherited (notify) base (dispapi) + pThis->__dispswobjSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispswobjSetNotificationShare; - pThis->__dispswobjMap__ = &__nvoc_thunk_RsResource_dispswobjMap; + // dispswobjUnregisterEvent -- virtual inherited (notify) base (dispapi) + pThis->__dispswobjUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispswobjUnregisterEvent; + + // dispswobjGetOrAllocNotifShare -- virtual inherited (notify) base (dispapi) + pThis->__dispswobjGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispswobjGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_DispSwObj_1 with approximately 30 basic block(s). - pThis->__dispswobjGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_dispswobjGetOrAllocNotifShare; -} +// Initialize vtable(s) for 30 virtual method(s). void __nvoc_init_funcTable_DispSwObj(DispSwObj *pThis) { + + // Initialize vtable(s) with 30 per-object function pointer(s). __nvoc_init_funcTable_DispSwObj_1(pThis); } @@ -2506,110 +2686,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DispCommon = /*pExportInfo=*/ &__nvoc_export_info_DispCommon }; -static NvBool __nvoc_thunk_RmResource_dispcmnShareCallback(struct DispCommon *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCommon_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_dispcmnCheckMemInterUnmap(struct DispCommon *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispCommon_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RsResource_dispcmnMapTo(struct DispCommon *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCommon_RsResource.offset), pParams); -} - -static NvBool __nvoc_thunk_RmResource_dispcmnAccessCallback(struct DispCommon *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCommon_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - -static void __nvoc_thunk_Notifier_dispcmnSetNotificationShare(struct DispCommon *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispCommon_Notifier.offset), pNotifShare); -} - -static NvU32 __nvoc_thunk_RsResource_dispcmnGetRefCount(struct DispCommon *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCommon_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_dispcmnAddAdditionalDependants(struct RsClient *pClient, struct DispCommon *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCommon_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_DisplayApi_dispcmnControl_Prologue(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - return dispapiControl_Prologue((struct DisplayApi *)(((unsigned char *)pDisplayApi) + __nvoc_rtti_DispCommon_DisplayApi.offset), pCallContext, pRsParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_dispcmnUnmapFrom(struct DispCommon *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCommon_RsResource.offset), pParams); -} - -static void __nvoc_thunk_DisplayApi_dispcmnControl_Epilogue(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - dispapiControl_Epilogue((struct DisplayApi *)(((unsigned char *)pDisplayApi) + __nvoc_rtti_DispCommon_DisplayApi.offset), pCallContext, pRsParams); -} - -static NV_STATUS __nvoc_thunk_DisplayApi_dispcmnControl(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return dispapiControl((struct DisplayApi *)(((unsigned char *)pDisplayApi) + __nvoc_rtti_DispCommon_DisplayApi.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_dispcmnUnmap(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCommon_RsResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_dispcmnGetMemInterMapParams(struct DispCommon *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispCommon_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_dispcmnGetMemoryMappingDescriptor(struct DispCommon *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispCommon_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_dispcmnControlFilter(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCommon_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_Notifier_dispcmnUnregisterEvent(struct DispCommon *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispCommon_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static NV_STATUS __nvoc_thunk_RmResource_dispcmnControlSerialization_Prologue(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCommon_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_dispcmnCanCopy(struct DispCommon *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCommon_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_dispcmnIsPartialUnmapSupported(struct DispCommon *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCommon_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_dispcmnPreDestruct(struct DispCommon *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCommon_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_dispcmnIsDuplicate(struct DispCommon *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCommon_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_dispcmnControlSerialization_Epilogue(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCommon_RmResource.offset), pCallContext, pParams); -} - -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_dispcmnGetNotificationListPtr(struct DispCommon *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispCommon_Notifier.offset)); -} - -static struct NotifShare *__nvoc_thunk_Notifier_dispcmnGetNotificationShare(struct DispCommon *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispCommon_Notifier.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_dispcmnMap(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispCommon_RsResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_Notifier_dispcmnGetOrAllocNotifShare(struct DispCommon *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispCommon_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -2617,12 +2693,27 @@ static NV_STATUS __nvoc_thunk_Notifier_dispcmnGetOrAllocNotifShare(struct DispCo static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispCommon[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x212u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemGetCapsV2_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x730101u, + /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_GET_CAPS_V2_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "dispcmnCtrlCmdSystemGetCapsV2" +#endif + }, + { /* [1] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemGetNumHeads_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x212u) - /*flags=*/ 0x212u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) + /*flags=*/ 0x4au, /*accessRight=*/0x0u, /*methodId=*/ 0x730102u, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_GET_NUM_HEADS_PARAMS), @@ -2631,165 +2722,150 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSystemGetNumHeads" #endif }, - { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [2] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemGetScanline_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, - /*methodId=*/ 0x730108u, + /*methodId=*/ 0x730104u, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_GET_SCANLINE_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "dispcmnCtrlCmdSystemGetScanline" #endif }, - { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [3] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemGetVblankCounter_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, - /*methodId=*/ 0x730109u, + /*methodId=*/ 0x730105u, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_GET_VBLANK_COUNTER_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "dispcmnCtrlCmdSystemGetVblankCounter" #endif }, - { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [4] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemGetVblankEnable_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, - /*methodId=*/ 0x73010au, + /*methodId=*/ 0x730106u, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_GET_VBLANK_ENABLE_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "dispcmnCtrlCmdSystemGetVblankEnable" #endif }, - { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x212u) + { /* [5] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemGetSuppported_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x212u) - /*flags=*/ 0x212u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) + /*flags=*/ 0x4au, /*accessRight=*/0x0u, - /*methodId=*/ 0x730120u, + /*methodId=*/ 0x730107u, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_GET_SUPPORTED_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "dispcmnCtrlCmdSystemGetSuppported" #endif }, - { /* [5] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8210u) + { /* [6] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x848u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemGetConnectState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8210u) - /*flags=*/ 0x8210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x848u) + /*flags=*/ 0x848u, /*accessRight=*/0x0u, - /*methodId=*/ 0x730122u, + /*methodId=*/ 0x730108u, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_GET_CONNECT_STATE_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "dispcmnCtrlCmdSystemGetConnectState" #endif }, - { /* [6] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [7] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemGetHotplugConfig_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, - /*methodId=*/ 0x730123u, + /*methodId=*/ 0x730109u, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "dispcmnCtrlCmdSystemGetHotplugConfig" #endif }, - { /* [7] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [8] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemGetHotplugState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, - /*methodId=*/ 0x730124u, + /*methodId=*/ 0x73010au, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_GET_HOTPLUG_STATE_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "dispcmnCtrlCmdSystemGetHotplugState" #endif }, - { /* [8] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [9] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemGetHeadRoutingMap_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, - /*methodId=*/ 0x730125u, + /*methodId=*/ 0x73010bu, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_GET_HEAD_ROUTING_MAP_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "dispcmnCtrlCmdSystemGetHeadRoutingMap" #endif }, - { /* [9] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [10] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemGetActive_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, - /*methodId=*/ 0x730126u, + /*methodId=*/ 0x73010cu, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_GET_ACTIVE_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "dispcmnCtrlCmdSystemGetActive" -#endif - }, - { /* [10] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemGetCapsV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x730138u, - /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_GET_CAPS_V2_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "dispcmnCtrlCmdSystemGetCapsV2" #endif }, { /* [11] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemGetAcpiIdMap_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, - /*methodId=*/ 0x73015au, + /*methodId=*/ 0x730115u, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED @@ -2797,14 +2873,14 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm #endif }, { /* [12] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x212u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemGetInternalDisplays_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x212u) - /*flags=*/ 0x212u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) + /*flags=*/ 0x4au, /*accessRight=*/0x0u, - /*methodId=*/ 0x73015bu, + /*methodId=*/ 0x730116u, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED @@ -2819,7 +2895,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm #endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*flags=*/ 0x4u, /*accessRight=*/0x0u, - /*methodId=*/ 0x73015cu, + /*methodId=*/ 0x730117u, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED @@ -2827,14 +2903,14 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm #endif }, { /* [14] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemGetConnectorTable_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, - /*methodId=*/ 0x730165u, + /*methodId=*/ 0x73011du, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED @@ -2842,14 +2918,14 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm #endif }, { /* [15] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemGetBootDisplays_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, - /*methodId=*/ 0x730166u, + /*methodId=*/ 0x73011eu, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_GET_BOOT_DISPLAYS_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED @@ -2857,14 +2933,14 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm #endif }, { /* [16] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x12u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xau) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemExecuteAcpiMethod_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x12u) - /*flags=*/ 0x12u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xau) + /*flags=*/ 0xau, /*accessRight=*/0x0u, - /*methodId=*/ 0x730168u, + /*methodId=*/ 0x730120u, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED @@ -2872,6 +2948,21 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm #endif }, { /* [17] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemVrrDisplayInfo_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x73012cu, + /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_VRR_DISPLAY_INFO_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "dispcmnCtrlCmdSystemVrrDisplayInfo" +#endif + }, + { /* [18] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2879,82 +2970,67 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm #endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) /*flags=*/ 0x0u, /*accessRight=*/0x0u, - /*methodId=*/ 0x73017bu, + /*methodId=*/ 0x73012du, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "dispcmnCtrlCmdSystemGetHotplugUnplugState" #endif }, - { /* [18] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [19] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdClearELVBlock_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, - /*methodId=*/ 0x73017du, + /*methodId=*/ 0x73012eu, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_CLEAR_ELV_BLOCK_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "dispcmnCtrlCmdClearELVBlock" #endif }, - { /* [19] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [20] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemArmLightweightSupervisor_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, - /*methodId=*/ 0x73017eu, + /*methodId=*/ 0x73012fu, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "dispcmnCtrlCmdSystemArmLightweightSupervisor" #endif }, - { /* [20] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [21] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemConfigVrrPstateSwitch_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, - /*methodId=*/ 0x730184u, + /*methodId=*/ 0x730134u, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "dispcmnCtrlCmdSystemConfigVrrPstateSwitch" -#endif - }, - { /* [21] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemVrrDisplayInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x730185u, - /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_VRR_DISPLAY_INFO_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "dispcmnCtrlCmdSystemVrrDisplayInfo" #endif }, { /* [22] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemQueryDisplayIdsWithMux_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, - /*methodId=*/ 0x730190u, + /*methodId=*/ 0x73013du, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED @@ -2969,7 +3045,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm #endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) /*flags=*/ 0x0u, /*accessRight=*/0x0u, - /*methodId=*/ 0x730196u, + /*methodId=*/ 0x730143u, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED @@ -2977,14 +3053,14 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm #endif }, { /* [24] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemGetHotplugEventConfig_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, - /*methodId=*/ 0x730197u, + /*methodId=*/ 0x730144u, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED @@ -2992,14 +3068,14 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm #endif }, { /* [25] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemSetHotplugEventConfig_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, - /*methodId=*/ 0x730198u, + /*methodId=*/ 0x730145u, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED @@ -3007,14 +3083,14 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm #endif }, { /* [26] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpRecordChannelRegisters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, - /*methodId=*/ 0x73019bu, + /*methodId=*/ 0x73014au, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED @@ -3022,14 +3098,14 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm #endif }, { /* [27] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemCheckSidebandI2cSupport_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, - /*methodId=*/ 0x73019cu, + /*methodId=*/ 0x73014bu, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED @@ -3037,14 +3113,14 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm #endif }, { /* [28] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemCheckSidebandSrSupport_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, - /*methodId=*/ 0x73019du, + /*methodId=*/ 0x73014cu, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED @@ -3059,7 +3135,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm #endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) /*flags=*/ 0x0u, /*accessRight=*/0x0u, - /*methodId=*/ 0x73019eu, + /*methodId=*/ 0x73014du, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED @@ -3070,39 +3146,54 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) /*pFunc=*/ (void (*)(void)) NULL, #else - /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdVblankSemControl_IMPL, + /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdVblankSemControlEnable_IMPL, #endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) /*flags=*/ 0x0u, /*accessRight=*/0x0u, - /*methodId=*/ 0x73019fu, - /*paramSize=*/ sizeof(NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_PARAMS), + /*methodId=*/ 0x73014eu, + /*paramSize=*/ sizeof(NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "dispcmnCtrlCmdVblankSemControl" + /*func=*/ "dispcmnCtrlCmdVblankSemControlEnable" #endif }, { /* [31] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdVblankSemControlDisable_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) + /*flags=*/ 0x0u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x73014fu, + /*paramSize=*/ sizeof(NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "dispcmnCtrlCmdVblankSemControlDisable" +#endif + }, + { /* [32] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdAccelVblankSemControl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, - /*methodId=*/ 0x7301a2u, + /*methodId=*/ 0x730150u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "dispcmnCtrlCmdAccelVblankSemControl" #endif }, - { /* [32] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [33] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificGetI2cPortid_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x730211u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_GET_I2C_PORTID_PARAMS), @@ -3111,13 +3202,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetI2cPortid" #endif }, - { /* [33] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x206u) + { /* [34] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x46u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificGetType_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x206u) - /*flags=*/ 0x206u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x46u) + /*flags=*/ 0x46u, /*accessRight=*/0x0u, /*methodId=*/ 0x730240u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_GET_TYPE_PARAMS), @@ -3126,13 +3217,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetType" #endif }, - { /* [34] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [35] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificFakeDevice_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x730243u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_SPECIFIC_FAKE_DEVICE_PARAMS), @@ -3141,13 +3232,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificFakeDevice" #endif }, - { /* [35] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [36] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificGetEdidV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x730245u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_GET_EDID_V2_PARAMS), @@ -3156,13 +3247,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetEdidV2" #endif }, - { /* [36] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [37] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificSetEdidV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x730246u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_SET_EDID_V2_PARAMS), @@ -3171,13 +3262,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetEdidV2" #endif }, - { /* [37] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [38] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificGetConnectorData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x730250u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_GET_CONNECTOR_DATA_PARAMS), @@ -3186,13 +3277,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetConnectorData" #endif }, - { /* [38] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [39] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificSetHdmiEnable_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x730273u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_SET_HDMI_ENABLE_PARAMS), @@ -3201,13 +3292,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetHdmiEnable" #endif }, - { /* [39] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [40] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificCtrlHdmi_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x730274u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_CTRL_HDMI_PARAMS), @@ -3216,13 +3307,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificCtrlHdmi" #endif }, - { /* [40] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [41] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificSetHdmiAudioMutestream_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x730275u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_SPECIFIC_SET_HDMI_AUDIO_MUTESTREAM_PARAMS), @@ -3231,7 +3322,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetHdmiAudioMutestream" #endif }, - { /* [41] */ + { /* [42] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3246,13 +3337,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetAcpiIdMapping" #endif }, - { /* [42] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [43] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificGetAcpiDodDisplayPortAttachment_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x730285u, /*paramSize=*/ sizeof(NV0073_CTRL_GET_ACPI_DOD_DISPLAY_PORT_ATTACHMENT_PARAMS), @@ -3261,13 +3352,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetAcpiDodDisplayPortAttachment" #endif }, - { /* [43] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [44] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificGetAllHeadMask_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x730287u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_GET_ALL_HEAD_MASK_PARAMS), @@ -3276,13 +3367,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetAllHeadMask" #endif }, - { /* [44] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [45] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificSetOdPacket_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x730288u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_SET_OD_PACKET_PARAMS), @@ -3291,13 +3382,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetOdPacket" #endif }, - { /* [45] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [46] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificSetOdPacketCtrl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x730289u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_SET_OD_PACKET_CTRL_PARAMS), @@ -3306,13 +3397,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetOdPacketCtrl" #endif }, - { /* [46] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [47] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificGetPclkLimit_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x73028au, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_GET_PCLK_LIMIT_PARAMS), @@ -3321,13 +3412,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetPclkLimit" #endif }, - { /* [47] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x206u) + { /* [48] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x46u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificOrGetInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x206u) - /*flags=*/ 0x206u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x46u) + /*flags=*/ 0x46u, /*accessRight=*/0x0u, /*methodId=*/ 0x73028bu, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_OR_GET_INFO_PARAMS), @@ -3336,13 +3427,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificOrGetInfo" #endif }, - { /* [48] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [49] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificGetBacklightBrightness_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x730291u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_BACKLIGHT_BRIGHTNESS_PARAMS), @@ -3351,13 +3442,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetBacklightBrightness" #endif }, - { /* [49] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [50] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificSetBacklightBrightness_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x730292u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_BACKLIGHT_BRIGHTNESS_PARAMS), @@ -3366,13 +3457,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetBacklightBrightness" #endif }, - { /* [50] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [51] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificSetHdmiSinkCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x730293u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_SET_HDMI_SINK_CAPS_PARAMS), @@ -3381,13 +3472,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetHdmiSinkCaps" #endif }, - { /* [51] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [52] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificSetMonitorPower_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x730295u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_SET_MONITOR_POWER_PARAMS), @@ -3396,13 +3487,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetMonitorPower" #endif }, - { /* [52] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [53] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificSetHdmiFrlLinkConfig_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x73029au, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_SET_HDMI_FRL_LINK_CONFIG_PARAMS), @@ -3411,13 +3502,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetHdmiFrlLinkConfig" #endif }, - { /* [53] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [54] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificApplyEdidOverrideV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x7302a1u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_APPLY_EDID_OVERRIDE_V2_PARAMS), @@ -3426,13 +3517,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificApplyEdidOverrideV2" #endif }, - { /* [54] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [55] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificGetHdmiGpuCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x7302a2u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_GET_HDMI_GPU_CAPS_PARAMS), @@ -3441,13 +3532,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetHdmiGpuCaps" #endif }, - { /* [55] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [56] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificDisplayChange_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x7302a4u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_DISPLAY_CHANGE_PARAMS), @@ -3456,13 +3547,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificDisplayChange" #endif }, - { /* [56] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [57] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificGetHdmiScdcData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x7302a6u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_GET_HDMI_SCDC_DATA_PARAMS), @@ -3471,13 +3562,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetHdmiScdcData" #endif }, - { /* [57] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [58] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificIsDirectmodeDisplay_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x7302a7u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_IS_DIRECTMODE_DISPLAY_PARAMS), @@ -3486,13 +3577,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificIsDirectmodeDisplay" #endif }, - { /* [58] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [59] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificSetHdmiFrlCapacityComputation_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x7302a8u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_GET_HDMI_FRL_CAPACITY_COMPUTATION_PARAMS), @@ -3501,13 +3592,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetHdmiFrlCapacityComputation" #endif }, - { /* [59] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [60] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificSetSharedGenericPacket_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x7302a9u, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_SET_SHARED_GENERIC_PACKET_PARAMS), @@ -3516,13 +3607,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetSharedGenericPacket" #endif }, - { /* [60] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [61] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificAcquireSharedGenericPacket_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x7302aau, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_ACQUIRE_SHARED_GENERIC_PACKET_PARAMS), @@ -3531,13 +3622,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificAcquireSharedGenericPacket" #endif }, - { /* [61] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [62] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificReleaseSharedGenericPacket_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x7302abu, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_RELEASE_SHARED_GENERIC_PACKET_PARAMS), @@ -3546,13 +3637,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificReleaseSharedGenericPacket" #endif }, - { /* [62] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [63] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificDispI2cReadWrite_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x7302acu, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_DISP_I2C_READ_WRITE_PARAMS), @@ -3561,13 +3652,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificDispI2cReadWrite" #endif }, - { /* [63] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [64] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificGetValidHeadWindowAssignment_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x7302adu, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_GET_VALID_HEAD_WINDOW_ASSIGNMENT_PARAMS), @@ -3576,13 +3667,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetValidHeadWindowAssignment" #endif }, - { /* [64] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [65] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSpecificDefaultAdaptivesyncDisplay_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x7302aeu, /*paramSize=*/ sizeof(NV0073_CTRL_SPECIFIC_DEFAULT_ADAPTIVESYNC_DISPLAY_PARAMS), @@ -3591,13 +3682,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificDefaultAdaptivesyncDisplay" #endif }, - { /* [65] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [66] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdInternalGetHotplugUnplugState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x730401u, /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS), @@ -3606,13 +3697,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdInternalGetHotplugUnplugState" #endif }, - { /* [66] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [67] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdInternalVRRSetRgLineActive_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x730402u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS), @@ -3621,13 +3712,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdInternalVRRSetRgLineActive" #endif }, - { /* [67] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [68] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdInternalDfpGetDispMuxStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x730404u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DFP_GET_DISP_MUX_STATUS_PARAMS), @@ -3636,28 +3727,43 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdInternalDfpGetDispMuxStatus" #endif }, - { /* [68] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [69] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else - /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdInternalVblankSemControl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, + /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdInternalVblankSemControlEnable_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x730405u, - /*paramSize=*/ sizeof(NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_PARAMS), + /*paramSize=*/ sizeof(NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_ENABLE_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "dispcmnCtrlCmdInternalVblankSemControl" + /*func=*/ "dispcmnCtrlCmdInternalVblankSemControlEnable" #endif }, - { /* [69] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [70] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdInternalVblankSemControlDisable_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x730406u, + /*paramSize=*/ sizeof(NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_DISABLE_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "dispcmnCtrlCmdInternalVblankSemControlDisable" +#endif + }, + { /* [71] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdInternalDfpSwitchDispMux_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x730460u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DFP_SWITCH_DISP_MUX_PARAMS), @@ -3666,13 +3772,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdInternalDfpSwitchDispMux" #endif }, - { /* [70] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [72] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdFrlConfigMacroPad_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x730502u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_FRL_CONFIG_MACRO_PAD_PARAMS), @@ -3681,13 +3787,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdFrlConfigMacroPad" #endif }, - { /* [71] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x212u) + { /* [73] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpGetInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x212u) - /*flags=*/ 0x212u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) + /*flags=*/ 0x4au, /*accessRight=*/0x0u, /*methodId=*/ 0x731140u, /*paramSize=*/ sizeof(NV0073_CTRL_DFP_GET_INFO_PARAMS), @@ -3696,13 +3802,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpGetInfo" #endif }, - { /* [72] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [74] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpGetDisplayportDongleInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x731142u, /*paramSize=*/ sizeof(NV0073_CTRL_DFP_GET_DISPLAYPORT_DONGLE_INFO_PARAMS), @@ -3711,13 +3817,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpGetDisplayportDongleInfo" #endif }, - { /* [73] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [75] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpSetEldAudioCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x731144u, /*paramSize=*/ sizeof(NV0073_CTRL_DFP_SET_ELD_AUDIO_CAP_PARAMS), @@ -3726,13 +3832,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpSetEldAudioCaps" #endif }, - { /* [74] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [76] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpGetSpreadSpectrum_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x73114cu, /*paramSize=*/ sizeof(NV0073_CTRL_DFP_GET_SPREAD_SPECTRUM_PARAMS), @@ -3741,13 +3847,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpGetSpreadSpectrum" #endif }, - { /* [75] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [77] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpUpdateDynamicDfpCache_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x73114eu, /*paramSize=*/ sizeof(NV0073_CTRL_DFP_UPDATE_DYNAMIC_DFP_CACHE_PARAMS), @@ -3756,13 +3862,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpUpdateDynamicDfpCache" #endif }, - { /* [76] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [78] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpSetAudioEnable_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x731150u, /*paramSize=*/ sizeof(NV0073_CTRL_DFP_SET_AUDIO_ENABLE_PARAMS), @@ -3771,13 +3877,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpSetAudioEnable" #endif }, - { /* [77] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [79] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpAssignSor_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x731152u, /*paramSize=*/ sizeof(NV0073_CTRL_DFP_ASSIGN_SOR_PARAMS), @@ -3786,13 +3892,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpAssignSor" #endif }, - { /* [78] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [80] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpGetPadlinkMask_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731153u, /*paramSize=*/ sizeof(NV0073_CTRL_DFP_GET_PADLINK_MASK_PARAMS), @@ -3801,13 +3907,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpGetPadlinkMask" #endif }, - { /* [79] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [81] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpGetLcdGpioPinNum_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731154u, /*paramSize=*/ sizeof(NV0073_CTRL_DFP_GET_LCD_GPIO_PIN_NUM_PARAMS), @@ -3816,13 +3922,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpGetLcdGpioPinNum" #endif }, - { /* [80] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [82] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpConfigTwoHeadOneOr_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731156u, /*paramSize=*/ sizeof(NV0073_CTRL_DFP_CONFIG_TWO_HEAD_ONE_OR_PARAMS), @@ -3831,13 +3937,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpConfigTwoHeadOneOr" #endif }, - { /* [81] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [83] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpDscCrcControl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731157u, /*paramSize=*/ sizeof(NV0073_CTRL_DFP_DSC_CRC_CONTROL_PARAMS), @@ -3846,13 +3952,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpDscCrcControl" #endif }, - { /* [82] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [84] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpInitMuxData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x731158u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DFP_INIT_MUX_DATA_PARAMS), @@ -3861,7 +3967,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpInitMuxData" #endif }, - { /* [83] */ + { /* [85] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3876,13 +3982,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpSwitchDispMux" #endif }, - { /* [84] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [86] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpRunPreDispMuxOperations_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x731161u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DFP_RUN_PRE_DISP_MUX_OPERATIONS_PARAMS), @@ -3891,13 +3997,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpRunPreDispMuxOperations" #endif }, - { /* [85] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [87] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpRunPostDispMuxOperations_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x731162u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DFP_RUN_POST_DISP_MUX_OPERATIONS_PARAMS), @@ -3906,7 +4012,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpRunPostDispMuxOperations" #endif }, - { /* [86] */ + { /* [88] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3921,13 +4027,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpGetDispMuxStatus" #endif }, - { /* [87] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [89] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpGetDsiModeTiming_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731166u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DFP_GET_DSI_MODE_TIMING_PARAMS), @@ -3936,13 +4042,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpGetDsiModeTiming" #endif }, - { /* [88] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x202u) + { /* [90] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x42u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpGetFixedModeTiming_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x202u) - /*flags=*/ 0x202u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x42u) + /*flags=*/ 0x42u, /*accessRight=*/0x0u, /*methodId=*/ 0x731172u, /*paramSize=*/ sizeof(NV0073_CTRL_DFP_GET_FIXED_MODE_TIMING_PARAMS), @@ -3951,28 +4057,28 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpGetFixedModeTiming" #endif }, - { /* [89] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x212u) + { /* [91] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpEdpDriverUnload_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x212u) - /*flags=*/ 0x212u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) + /*flags=*/ 0x4au, /*accessRight=*/0x0u, - /*methodId=*/ 0x731174u, + /*methodId=*/ 0x731176u, /*paramSize=*/ sizeof(NV0073_CTRL_DFP_EDP_DRIVER_UNLOAD_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "dispcmnCtrlCmdDfpEdpDriverUnload" #endif }, - { /* [90] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8204u) + { /* [92] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x844u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpAuxchCtrl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8204u) - /*flags=*/ 0x8204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x844u) + /*flags=*/ 0x844u, /*accessRight=*/0x0u, /*methodId=*/ 0x731341u, /*paramSize=*/ sizeof(NV0073_CTRL_DP_AUXCH_CTRL_PARAMS), @@ -3981,13 +4087,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpAuxchCtrl" #endif }, - { /* [91] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [93] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpAuxchSetSema_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731342u, /*paramSize=*/ sizeof(NV0073_CTRL_DP_AUXCH_SET_SEMA_PARAMS), @@ -3996,13 +4102,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpAuxchSetSema" #endif }, - { /* [92] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8204u) + { /* [94] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x844u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpCtrl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8204u) - /*flags=*/ 0x8204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x844u) + /*flags=*/ 0x844u, /*accessRight=*/0x0u, /*methodId=*/ 0x731343u, /*paramSize=*/ sizeof(NV0073_CTRL_DP_CTRL_PARAMS), @@ -4011,13 +4117,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpCtrl" #endif }, - { /* [93] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [95] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpGetLaneData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731345u, /*paramSize=*/ sizeof(NV0073_CTRL_DP_LANE_DATA_PARAMS), @@ -4026,13 +4132,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpGetLaneData" #endif }, - { /* [94] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [96] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpSetLaneData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731346u, /*paramSize=*/ sizeof(NV0073_CTRL_DP_LANE_DATA_PARAMS), @@ -4041,13 +4147,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetLaneData" #endif }, - { /* [95] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [97] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpSetTestpattern_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731347u, /*paramSize=*/ sizeof(NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS), @@ -4056,13 +4162,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetTestpattern" #endif }, - { /* [96] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [98] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpSetPreemphasisDrivecurrentPostcursor2Data_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731351u, /*paramSize=*/ sizeof(NV0073_CTRL_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS), @@ -4071,13 +4177,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetPreemphasisDrivecurrentPostcursor2Data" #endif }, - { /* [97] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [99] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731352u, /*paramSize=*/ sizeof(NV0073_CTRL_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS), @@ -4086,13 +4192,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data" #endif }, - { /* [98] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [100] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpMainLinkCtrl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731356u, /*paramSize=*/ sizeof(NV0073_CTRL_DP_MAIN_LINK_CTRL_PARAMS), @@ -4101,13 +4207,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpMainLinkCtrl" #endif }, - { /* [99] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [101] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpGetAudioMuteStream_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731358u, /*paramSize=*/ sizeof(NV0073_CTRL_DP_GET_AUDIO_MUTESTREAM_PARAMS), @@ -4116,13 +4222,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpGetAudioMuteStream" #endif }, - { /* [100] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [102] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpSetAudioMuteStream_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x731359u, /*paramSize=*/ sizeof(NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS), @@ -4131,13 +4237,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetAudioMuteStream" #endif }, - { /* [101] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [103] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpASSRCtrl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x73135au, /*paramSize=*/ sizeof(NV0073_CTRL_DP_ASSR_CTRL_PARAMS), @@ -4146,13 +4252,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpASSRCtrl" #endif }, - { /* [102] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [104] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpTopologyAllocateDisplayId_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x73135bu, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID_PARAMS), @@ -4161,13 +4267,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpTopologyAllocateDisplayId" #endif }, - { /* [103] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [105] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpTopologyFreeDisplayId_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x73135cu, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID_PARAMS), @@ -4176,13 +4282,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpTopologyFreeDisplayId" #endif }, - { /* [104] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [106] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpGetLinkConfig_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731360u, /*paramSize=*/ sizeof(NV0073_CTRL_DP_GET_LINK_CONFIG_PARAMS), @@ -4191,13 +4297,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpGetLinkConfig" #endif }, - { /* [105] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [107] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpGetEDPData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731361u, /*paramSize=*/ sizeof(NV0073_CTRL_DP_GET_EDP_DATA_PARAMS), @@ -4206,13 +4312,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpGetEDPData" #endif }, - { /* [106] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [108] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpConfigStream_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731362u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS), @@ -4221,13 +4327,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpConfigStream" #endif }, - { /* [107] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [109] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpSetRateGov_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731363u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_SET_RATE_GOV_PARAMS), @@ -4236,13 +4342,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetRateGov" #endif }, - { /* [108] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [110] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpSetManualDisplayPort_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731365u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT_PARAMS), @@ -4251,13 +4357,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetManualDisplayPort" #endif }, - { /* [109] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [111] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpSetEcf_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731366u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_SET_ECF_PARAMS), @@ -4266,13 +4372,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetEcf" #endif }, - { /* [110] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [112] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpSendACT_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731367u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_SEND_ACT_PARAMS), @@ -4281,13 +4387,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSendACT" #endif }, - { /* [111] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x206u) + { /* [113] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x46u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpGetCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x206u) - /*flags=*/ 0x206u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x46u) + /*flags=*/ 0x46u, /*accessRight=*/0x0u, /*methodId=*/ 0x731369u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS), @@ -4296,7 +4402,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpGetCaps" #endif }, - { /* [112] */ + { /* [114] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4311,13 +4417,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpGenerateFakeInterrupt" #endif }, - { /* [113] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [115] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpConfigRadScratchReg_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x73136cu, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_CONFIG_RAD_SCRATCH_REG_PARAMS), @@ -4326,13 +4432,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpConfigRadScratchReg" #endif }, - { /* [114] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [116] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpConfigSingleHeadMultiStream_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x73136eu, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_CONFIG_SINGLE_HEAD_MULTI_STREAM_PARAMS), @@ -4341,13 +4447,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpConfigSingleHeadMultiStream" #endif }, - { /* [115] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [117] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpSetTriggerSelect_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x73136fu, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_SET_TRIGGER_SELECT_PARAMS), @@ -4356,13 +4462,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetTriggerSelect" #endif }, - { /* [116] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [118] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpSetTriggerAll_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731370u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_SET_TRIGGER_ALL_PARAMS), @@ -4371,13 +4477,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetTriggerAll" #endif }, - { /* [117] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [119] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpGetAuxLogData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731373u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_GET_AUXLOGGER_BUFFER_DATA_PARAMS), @@ -4386,13 +4492,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpGetAuxLogData" #endif }, - { /* [118] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [120] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpConfigIndexedLinkRates_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731377u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES_PARAMS), @@ -4401,13 +4507,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpConfigIndexedLinkRates" #endif }, - { /* [119] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [121] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpSetStereoMSAProperties_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731378u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_SET_STEREO_MSA_PROPERTIES_PARAMS), @@ -4416,13 +4522,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetStereoMSAProperties" #endif }, - { /* [120] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [122] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpConfigureFec_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x73137au, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_CONFIGURE_FEC_PARAMS), @@ -4431,13 +4537,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpConfigureFec" #endif }, - { /* [121] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [123] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpConfigMacroPad_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x73137bu, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_PARAMS), @@ -4446,13 +4552,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpConfigMacroPad" #endif }, - { /* [122] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [124] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpAuxchI2cTransferCtrl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x73137cu, /*paramSize=*/ sizeof(NV0073_CTRL_DP_AUXCH_I2C_TRANSFER_CTRL_PARAMS), @@ -4461,13 +4567,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpAuxchI2cTransferCtrl" #endif }, - { /* [123] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8204u) + { /* [125] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x844u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpEnableVrr_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8204u) - /*flags=*/ 0x8204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x844u) + /*flags=*/ 0x844u, /*accessRight=*/0x0u, /*methodId=*/ 0x73137du, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_ENABLE_VRR_PARAMS), @@ -4476,13 +4582,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpEnableVrr" #endif }, - { /* [124] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [126] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpGetGenericInfoframe_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x73137eu, /*paramSize=*/ sizeof(NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_PARAMS), @@ -4491,13 +4597,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpGetGenericInfoframe" #endif }, - { /* [125] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [127] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpGetMsaAttributes_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x73137fu, /*paramSize=*/ sizeof(NV0073_CTRL_DP_GET_MSA_ATTRIBUTES_PARAMS), @@ -4506,13 +4612,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpGetMsaAttributes" #endif }, - { /* [126] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [128] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpInternalLcdOverdrive_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731380u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_AUXCH_OD_CTRL_PARAMS), @@ -4521,13 +4627,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpInternalLcdOverdrive" #endif }, - { /* [127] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [129] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpSetMSAPropertiesv2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731381u, /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_V2_PARAMS), @@ -4536,13 +4642,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetMSAPropertiesv2" #endif }, - { /* [128] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [130] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpExecuteInternalLcdOverDrivePolicy_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x731382u, /*paramSize=*/ sizeof(NV0073_CTRL_DP_EXECUTE_OVERDRIVE_POLICY_PARAMS), @@ -4551,13 +4657,28 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpExecuteInternalLcdOverDrivePolicy" #endif }, - { /* [129] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [131] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpVariableBacklightCtrl_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x731386u, + /*paramSize=*/ sizeof(NV0073_CTRL_CMD_DP_AUXCH_VBL_CTRL_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "dispcmnCtrlCmdDfpVariableBacklightCtrl" +#endif + }, + { /* [132] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdPsrGetSrPanelInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731602u, /*paramSize=*/ sizeof(NV0073_CTRL_PSR_GET_SR_PANEL_INFO_PARAMS), @@ -4566,13 +4687,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdPsrGetSrPanelInfo" #endif }, - { /* [130] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [133] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdStereoDongleSupported_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x731702u, /*paramSize=*/ sizeof(NV0073_CTRL_STEREO_DONGLE_SUPPORTED_PARAMS), @@ -4584,9 +4705,142 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm }; +// 26 up-thunk(s) defined to bridge methods in DispCommon to superclasses + +// dispcmnControl: virtual inherited (dispapi) base (dispapi) +static NV_STATUS __nvoc_up_thunk_DisplayApi_dispcmnControl(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return dispapiControl((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_DispCommon_DisplayApi.offset), pCallContext, pParams); +} + +// dispcmnControl_Prologue: virtual inherited (dispapi) base (dispapi) +static NV_STATUS __nvoc_up_thunk_DisplayApi_dispcmnControl_Prologue(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { + return dispapiControl_Prologue((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_DispCommon_DisplayApi.offset), pCallContext, pRsParams); +} + +// dispcmnControl_Epilogue: virtual inherited (dispapi) base (dispapi) +static void __nvoc_up_thunk_DisplayApi_dispcmnControl_Epilogue(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { + dispapiControl_Epilogue((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_DispCommon_DisplayApi.offset), pCallContext, pRsParams); +} + +// dispcmnAccessCallback: virtual inherited (rmres) base (dispapi) +static NvBool __nvoc_up_thunk_RmResource_dispcmnAccessCallback(struct DispCommon *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// dispcmnShareCallback: virtual inherited (rmres) base (dispapi) +static NvBool __nvoc_up_thunk_RmResource_dispcmnShareCallback(struct DispCommon *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// dispcmnGetMemInterMapParams: virtual inherited (rmres) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RmResource_dispcmnGetMemInterMapParams(struct DispCommon *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispCommon_RmResource.offset), pParams); +} + +// dispcmnCheckMemInterUnmap: virtual inherited (rmres) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RmResource_dispcmnCheckMemInterUnmap(struct DispCommon *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispCommon_RmResource.offset), bSubdeviceHandleProvided); +} + +// dispcmnGetMemoryMappingDescriptor: virtual inherited (rmres) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RmResource_dispcmnGetMemoryMappingDescriptor(struct DispCommon *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispCommon_RmResource.offset), ppMemDesc); +} + +// dispcmnControlSerialization_Prologue: virtual inherited (rmres) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RmResource_dispcmnControlSerialization_Prologue(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RmResource.offset), pCallContext, pParams); +} + +// dispcmnControlSerialization_Epilogue: virtual inherited (rmres) base (dispapi) +static void __nvoc_up_thunk_RmResource_dispcmnControlSerialization_Epilogue(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RmResource.offset), pCallContext, pParams); +} + +// dispcmnCanCopy: virtual inherited (res) base (dispapi) +static NvBool __nvoc_up_thunk_RsResource_dispcmnCanCopy(struct DispCommon *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset)); +} + +// dispcmnIsDuplicate: virtual inherited (res) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RsResource_dispcmnIsDuplicate(struct DispCommon *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset), hMemory, pDuplicate); +} + +// dispcmnPreDestruct: virtual inherited (res) base (dispapi) +static void __nvoc_up_thunk_RsResource_dispcmnPreDestruct(struct DispCommon *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset)); +} + +// dispcmnControlFilter: virtual inherited (res) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RsResource_dispcmnControlFilter(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset), pCallContext, pParams); +} + +// dispcmnMap: virtual inherited (res) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RsResource_dispcmnMap(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset), pCallContext, pParams, pCpuMapping); +} + +// dispcmnUnmap: virtual inherited (res) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RsResource_dispcmnUnmap(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset), pCallContext, pCpuMapping); +} + +// dispcmnIsPartialUnmapSupported: inline virtual inherited (res) base (dispapi) body +static NvBool __nvoc_up_thunk_RsResource_dispcmnIsPartialUnmapSupported(struct DispCommon *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset)); +} + +// dispcmnMapTo: virtual inherited (res) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RsResource_dispcmnMapTo(struct DispCommon *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset), pParams); +} + +// dispcmnUnmapFrom: virtual inherited (res) base (dispapi) +static NV_STATUS __nvoc_up_thunk_RsResource_dispcmnUnmapFrom(struct DispCommon *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset), pParams); +} + +// dispcmnGetRefCount: virtual inherited (res) base (dispapi) +static NvU32 __nvoc_up_thunk_RsResource_dispcmnGetRefCount(struct DispCommon *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset)); +} + +// dispcmnAddAdditionalDependants: virtual inherited (res) base (dispapi) +static void __nvoc_up_thunk_RsResource_dispcmnAddAdditionalDependants(struct RsClient *pClient, struct DispCommon *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset), pReference); +} + +// dispcmnGetNotificationListPtr: virtual inherited (notify) base (dispapi) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispcmnGetNotificationListPtr(struct DispCommon *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispCommon_Notifier.offset)); +} + +// dispcmnGetNotificationShare: virtual inherited (notify) base (dispapi) +static struct NotifShare * __nvoc_up_thunk_Notifier_dispcmnGetNotificationShare(struct DispCommon *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispCommon_Notifier.offset)); +} + +// dispcmnSetNotificationShare: virtual inherited (notify) base (dispapi) +static void __nvoc_up_thunk_Notifier_dispcmnSetNotificationShare(struct DispCommon *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispCommon_Notifier.offset), pNotifShare); +} + +// dispcmnUnregisterEvent: virtual inherited (notify) base (dispapi) +static NV_STATUS __nvoc_up_thunk_Notifier_dispcmnUnregisterEvent(struct DispCommon *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispCommon_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +} + +// dispcmnGetOrAllocNotifShare: virtual inherited (notify) base (dispapi) +static NV_STATUS __nvoc_up_thunk_Notifier_dispcmnGetOrAllocNotifShare(struct DispCommon *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispCommon_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_DispCommon = { - /*numEntries=*/ 131, + /*numEntries=*/ 134, /*pExportEntries=*/ __nvoc_exported_method_def_DispCommon }; @@ -4619,587 +4873,764 @@ NV_STATUS __nvoc_ctor_DispCommon(DispCommon *pThis, RmHalspecOwner *pRmhalspecow return status; } +// Vtable initialization static void __nvoc_init_funcTable_DispCommon_1(DispCommon *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // dispcmnCtrlCmdSystemGetVblankCounter -- exported (id=0x730105) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__dispcmnCtrlCmdSystemGetVblankCounter__ = &dispcmnCtrlCmdSystemGetVblankCounter_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispcmnCtrlCmdSystemGetVblankEnable -- exported (id=0x730106) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispcmnCtrlCmdSystemGetVblankEnable__ = &dispcmnCtrlCmdSystemGetVblankEnable_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSystemCheckSidebandSrSupport -- exported (id=0x73014c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSystemCheckSidebandSrSupport__ = &dispcmnCtrlCmdSystemCheckSidebandSrSupport_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispcmnCtrlCmdSystemGetHotplugState -- exported (id=0x73010a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispcmnCtrlCmdSystemGetHotplugState__ = &dispcmnCtrlCmdSystemGetHotplugState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x212u) + // dispcmnCtrlCmdSystemGetInternalDisplays -- exported (id=0x730116) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) pThis->__dispcmnCtrlCmdSystemGetInternalDisplays__ = &dispcmnCtrlCmdSystemGetInternalDisplays_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdSystemGetConnectorTable -- exported (id=0x73011d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdSystemGetConnectorTable__ = &dispcmnCtrlCmdSystemGetConnectorTable_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdSystemVrrDisplayInfo -- exported (id=0x73012c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdSystemVrrDisplayInfo__ = &dispcmnCtrlCmdSystemVrrDisplayInfo_IMPL; #endif + // dispcmnCtrlCmdVRRSetRgLineActive -- exported (id=0x73014d) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__dispcmnCtrlCmdVRRSetRgLineActive__ = &dispcmnCtrlCmdVRRSetRgLineActive_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // dispcmnCtrlCmdInternalVRRSetRgLineActive -- exported (id=0x730402) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__dispcmnCtrlCmdInternalVRRSetRgLineActive__ = &dispcmnCtrlCmdInternalVRRSetRgLineActive_IMPL; #endif + // dispcmnCtrlCmdVblankSemControlEnable -- exported (id=0x73014e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) + pThis->__dispcmnCtrlCmdVblankSemControlEnable__ = &dispcmnCtrlCmdVblankSemControlEnable_IMPL; +#endif + + // dispcmnCtrlCmdInternalVblankSemControlEnable -- exported (id=0x730405) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + pThis->__dispcmnCtrlCmdInternalVblankSemControlEnable__ = &dispcmnCtrlCmdInternalVblankSemControlEnable_IMPL; +#endif + + // dispcmnCtrlCmdVblankSemControlDisable -- exported (id=0x73014f) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) - pThis->__dispcmnCtrlCmdVblankSemControl__ = &dispcmnCtrlCmdVblankSemControl_IMPL; + pThis->__dispcmnCtrlCmdVblankSemControlDisable__ = &dispcmnCtrlCmdVblankSemControlDisable_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - pThis->__dispcmnCtrlCmdInternalVblankSemControl__ = &dispcmnCtrlCmdInternalVblankSemControl_IMPL; + // dispcmnCtrlCmdInternalVblankSemControlDisable -- exported (id=0x730406) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + pThis->__dispcmnCtrlCmdInternalVblankSemControlDisable__ = &dispcmnCtrlCmdInternalVblankSemControlDisable_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdAccelVblankSemControl -- exported (id=0x730150) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdAccelVblankSemControl__ = &dispcmnCtrlCmdAccelVblankSemControl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8204u) + // dispcmnCtrlCmdDpEnableVrr -- exported (id=0x73137d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x844u) pThis->__dispcmnCtrlCmdDpEnableVrr__ = &dispcmnCtrlCmdDpEnableVrr_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdClearELVBlock -- exported (id=0x73012e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdClearELVBlock__ = &dispcmnCtrlCmdClearELVBlock_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSpecificDisplayChange -- exported (id=0x7302a4) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSpecificDisplayChange__ = &dispcmnCtrlCmdSpecificDisplayChange_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDfpGetSpreadSpectrum -- exported (id=0x73114c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDfpGetSpreadSpectrum__ = &dispcmnCtrlCmdDfpGetSpreadSpectrum_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDfpGetLcdGpioPinNum -- exported (id=0x731154) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDfpGetLcdGpioPinNum__ = &dispcmnCtrlCmdDfpGetLcdGpioPinNum_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpGetAudioMuteStream -- exported (id=0x731358) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpGetAudioMuteStream__ = &dispcmnCtrlCmdDpGetAudioMuteStream_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdDpAuxchI2cTransferCtrl -- exported (id=0x73137c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdDpAuxchI2cTransferCtrl__ = &dispcmnCtrlCmdDpAuxchI2cTransferCtrl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpASSRCtrl -- exported (id=0x73135a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpASSRCtrl__ = &dispcmnCtrlCmdDpASSRCtrl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpSetEcf -- exported (id=0x731366) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpSetEcf__ = &dispcmnCtrlCmdDpSetEcf_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdStereoDongleSupported -- exported (id=0x731702) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdStereoDongleSupported__ = &dispcmnCtrlCmdStereoDongleSupported_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdDfpRecordChannelRegisters -- exported (id=0x73014a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdDfpRecordChannelRegisters__ = &dispcmnCtrlCmdDfpRecordChannelRegisters_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSpecificGetBacklightBrightness -- exported (id=0x730291) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSpecificGetBacklightBrightness__ = &dispcmnCtrlCmdSpecificGetBacklightBrightness_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSpecificSetBacklightBrightness -- exported (id=0x730292) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSpecificSetBacklightBrightness__ = &dispcmnCtrlCmdSpecificSetBacklightBrightness_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdPsrGetSrPanelInfo -- exported (id=0x731602) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdPsrGetSrPanelInfo__ = &dispcmnCtrlCmdPsrGetSrPanelInfo_IMPL; #endif + // dispcmnCtrlCmdDfpSwitchDispMux -- exported (id=0x731160) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__dispcmnCtrlCmdDfpSwitchDispMux__ = &dispcmnCtrlCmdDfpSwitchDispMux_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // dispcmnCtrlCmdInternalDfpSwitchDispMux -- exported (id=0x730460) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__dispcmnCtrlCmdInternalDfpSwitchDispMux__ = &dispcmnCtrlCmdInternalDfpSwitchDispMux_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdDfpRunPreDispMuxOperations -- exported (id=0x731161) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdDfpRunPreDispMuxOperations__ = &dispcmnCtrlCmdDfpRunPreDispMuxOperations_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdDfpRunPostDispMuxOperations -- exported (id=0x731162) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdDfpRunPostDispMuxOperations__ = &dispcmnCtrlCmdDfpRunPostDispMuxOperations_IMPL; #endif + // dispcmnCtrlCmdDfpGetDispMuxStatus -- exported (id=0x731163) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__dispcmnCtrlCmdDfpGetDispMuxStatus__ = &dispcmnCtrlCmdDfpGetDispMuxStatus_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // dispcmnCtrlCmdInternalDfpGetDispMuxStatus -- exported (id=0x730404) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__dispcmnCtrlCmdInternalDfpGetDispMuxStatus__ = &dispcmnCtrlCmdInternalDfpGetDispMuxStatus_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDfpInternalLcdOverdrive -- exported (id=0x731380) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDfpInternalLcdOverdrive__ = &dispcmnCtrlCmdDfpInternalLcdOverdrive_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdDfpExecuteInternalLcdOverDrivePolicy -- exported (id=0x731382) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdDfpExecuteInternalLcdOverDrivePolicy__ = &dispcmnCtrlCmdDfpExecuteInternalLcdOverDrivePolicy_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x12u) + // dispcmnCtrlCmdDfpVariableBacklightCtrl -- exported (id=0x731386) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + pThis->__dispcmnCtrlCmdDfpVariableBacklightCtrl__ = &dispcmnCtrlCmdDfpVariableBacklightCtrl_IMPL; +#endif + + // dispcmnCtrlCmdSystemExecuteAcpiMethod -- exported (id=0x730120) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xau) pThis->__dispcmnCtrlCmdSystemExecuteAcpiMethod__ = &dispcmnCtrlCmdSystemExecuteAcpiMethod_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdSystemGetAcpiIdMap -- exported (id=0x730115) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdSystemGetAcpiIdMap__ = &dispcmnCtrlCmdSystemGetAcpiIdMap_IMPL; #endif + // dispcmnCtrlCmdSystemAcpiSubsystemActivated -- exported (id=0x730117) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__dispcmnCtrlCmdSystemAcpiSubsystemActivated__ = &dispcmnCtrlCmdSystemAcpiSubsystemActivated_IMPL; #endif + // dispcmnCtrlCmdSpecificSetAcpiIdMapping -- exported (id=0x730284) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__dispcmnCtrlCmdSpecificSetAcpiIdMapping__ = &dispcmnCtrlCmdSpecificSetAcpiIdMapping_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdSpecificGetAcpiDodDisplayPortAttachment -- exported (id=0x730285) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdSpecificGetAcpiDodDisplayPortAttachment__ = &dispcmnCtrlCmdSpecificGetAcpiDodDisplayPortAttachment_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispcmnCtrlCmdSystemGetCapsV2 -- exported (id=0x730101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispcmnCtrlCmdSystemGetCapsV2__ = &dispcmnCtrlCmdSystemGetCapsV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x212u) + // dispcmnCtrlCmdSystemGetNumHeads -- exported (id=0x730102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) pThis->__dispcmnCtrlCmdSystemGetNumHeads__ = &dispcmnCtrlCmdSystemGetNumHeads_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispcmnCtrlCmdSystemGetScanline -- exported (id=0x730104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispcmnCtrlCmdSystemGetScanline__ = &dispcmnCtrlCmdSystemGetScanline_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x212u) + // dispcmnCtrlCmdSystemGetSuppported -- exported (id=0x730107) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) pThis->__dispcmnCtrlCmdSystemGetSuppported__ = &dispcmnCtrlCmdSystemGetSuppported_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8210u) + // dispcmnCtrlCmdSystemGetConnectState -- exported (id=0x730108) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x848u) pThis->__dispcmnCtrlCmdSystemGetConnectState__ = &dispcmnCtrlCmdSystemGetConnectState_IMPL; #endif + // dispcmnCtrlCmdSystemGetHotplugUnplugState -- exported (id=0x73012d) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__dispcmnCtrlCmdSystemGetHotplugUnplugState__ = &dispcmnCtrlCmdSystemGetHotplugUnplugState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // dispcmnCtrlCmdInternalGetHotplugUnplugState -- exported (id=0x730401) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__dispcmnCtrlCmdInternalGetHotplugUnplugState__ = &dispcmnCtrlCmdInternalGetHotplugUnplugState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispcmnCtrlCmdSystemGetHeadRoutingMap -- exported (id=0x73010b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispcmnCtrlCmdSystemGetHeadRoutingMap__ = &dispcmnCtrlCmdSystemGetHeadRoutingMap_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispcmnCtrlCmdSystemGetActive -- exported (id=0x73010c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispcmnCtrlCmdSystemGetActive__ = &dispcmnCtrlCmdSystemGetActive_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdSystemGetBootDisplays -- exported (id=0x73011e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdSystemGetBootDisplays__ = &dispcmnCtrlCmdSystemGetBootDisplays_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSystemQueryDisplayIdsWithMux -- exported (id=0x73013d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSystemQueryDisplayIdsWithMux__ = &dispcmnCtrlCmdSystemQueryDisplayIdsWithMux_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSystemCheckSidebandI2cSupport -- exported (id=0x73014b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSystemCheckSidebandI2cSupport__ = &dispcmnCtrlCmdSystemCheckSidebandI2cSupport_IMPL; #endif + // dispcmnCtrlCmdSystemAllocateDisplayBandwidth -- exported (id=0x730143) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__dispcmnCtrlCmdSystemAllocateDisplayBandwidth__ = &dispcmnCtrlCmdSystemAllocateDisplayBandwidth_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdSystemGetHotplugConfig -- exported (id=0x730109) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdSystemGetHotplugConfig__ = &dispcmnCtrlCmdSystemGetHotplugConfig_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdSystemGetHotplugEventConfig -- exported (id=0x730144) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdSystemGetHotplugEventConfig__ = &dispcmnCtrlCmdSystemGetHotplugEventConfig_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdSystemSetHotplugEventConfig -- exported (id=0x730145) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdSystemSetHotplugEventConfig__ = &dispcmnCtrlCmdSystemSetHotplugEventConfig_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSystemArmLightweightSupervisor -- exported (id=0x73012f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSystemArmLightweightSupervisor__ = &dispcmnCtrlCmdSystemArmLightweightSupervisor_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSystemConfigVrrPstateSwitch -- exported (id=0x730134) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSystemConfigVrrPstateSwitch__ = &dispcmnCtrlCmdSystemConfigVrrPstateSwitch_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x206u) + // dispcmnCtrlCmdSpecificGetType -- exported (id=0x730240) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x46u) pThis->__dispcmnCtrlCmdSpecificGetType__ = &dispcmnCtrlCmdSpecificGetType_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdSpecificGetEdidV2 -- exported (id=0x730245) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdSpecificGetEdidV2__ = &dispcmnCtrlCmdSpecificGetEdidV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdSpecificSetEdidV2 -- exported (id=0x730246) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdSpecificSetEdidV2__ = &dispcmnCtrlCmdSpecificSetEdidV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdSpecificFakeDevice -- exported (id=0x730243) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdSpecificFakeDevice__ = &dispcmnCtrlCmdSpecificFakeDevice_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispcmnCtrlCmdSpecificGetConnectorData -- exported (id=0x730250) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispcmnCtrlCmdSpecificGetConnectorData__ = &dispcmnCtrlCmdSpecificGetConnectorData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSpecificSetHdmiEnable -- exported (id=0x730273) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSpecificSetHdmiEnable__ = &dispcmnCtrlCmdSpecificSetHdmiEnable_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdSpecificCtrlHdmi -- exported (id=0x730274) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdSpecificCtrlHdmi__ = &dispcmnCtrlCmdSpecificCtrlHdmi_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdSpecificGetAllHeadMask -- exported (id=0x730287) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdSpecificGetAllHeadMask__ = &dispcmnCtrlCmdSpecificGetAllHeadMask_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSpecificSetOdPacket -- exported (id=0x730288) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSpecificSetOdPacket__ = &dispcmnCtrlCmdSpecificSetOdPacket_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSpecificAcquireSharedGenericPacket -- exported (id=0x7302aa) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSpecificAcquireSharedGenericPacket__ = &dispcmnCtrlCmdSpecificAcquireSharedGenericPacket_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSpecificSetSharedGenericPacket -- exported (id=0x7302a9) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSpecificSetSharedGenericPacket__ = &dispcmnCtrlCmdSpecificSetSharedGenericPacket_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSpecificReleaseSharedGenericPacket -- exported (id=0x7302ab) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSpecificReleaseSharedGenericPacket__ = &dispcmnCtrlCmdSpecificReleaseSharedGenericPacket_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSpecificSetOdPacketCtrl -- exported (id=0x730289) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSpecificSetOdPacketCtrl__ = &dispcmnCtrlCmdSpecificSetOdPacketCtrl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x206u) + // dispcmnCtrlCmdSpecificOrGetInfo -- exported (id=0x73028b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x46u) pThis->__dispcmnCtrlCmdSpecificOrGetInfo__ = &dispcmnCtrlCmdSpecificOrGetInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSpecificGetPclkLimit -- exported (id=0x73028a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSpecificGetPclkLimit__ = &dispcmnCtrlCmdSpecificGetPclkLimit_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSpecificSetHdmiSinkCaps -- exported (id=0x730293) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSpecificSetHdmiSinkCaps__ = &dispcmnCtrlCmdSpecificSetHdmiSinkCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSpecificSetMonitorPower -- exported (id=0x730295) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSpecificSetMonitorPower__ = &dispcmnCtrlCmdSpecificSetMonitorPower_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSpecificSetHdmiFrlLinkConfig -- exported (id=0x73029a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSpecificSetHdmiFrlLinkConfig__ = &dispcmnCtrlCmdSpecificSetHdmiFrlLinkConfig_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSpecificApplyEdidOverrideV2 -- exported (id=0x7302a1) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSpecificApplyEdidOverrideV2__ = &dispcmnCtrlCmdSpecificApplyEdidOverrideV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispcmnCtrlCmdSpecificGetI2cPortid -- exported (id=0x730211) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispcmnCtrlCmdSpecificGetI2cPortid__ = &dispcmnCtrlCmdSpecificGetI2cPortid_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSpecificGetHdmiGpuCaps -- exported (id=0x7302a2) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSpecificGetHdmiGpuCaps__ = &dispcmnCtrlCmdSpecificGetHdmiGpuCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSpecificGetHdmiScdcData -- exported (id=0x7302a6) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSpecificGetHdmiScdcData__ = &dispcmnCtrlCmdSpecificGetHdmiScdcData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSpecificIsDirectmodeDisplay -- exported (id=0x7302a7) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSpecificIsDirectmodeDisplay__ = &dispcmnCtrlCmdSpecificIsDirectmodeDisplay_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSpecificDefaultAdaptivesyncDisplay -- exported (id=0x7302ae) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSpecificDefaultAdaptivesyncDisplay__ = &dispcmnCtrlCmdSpecificDefaultAdaptivesyncDisplay_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSpecificSetHdmiFrlCapacityComputation -- exported (id=0x7302a8) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSpecificSetHdmiFrlCapacityComputation__ = &dispcmnCtrlCmdSpecificSetHdmiFrlCapacityComputation_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdSpecificDispI2cReadWrite -- exported (id=0x7302ac) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdSpecificDispI2cReadWrite__ = &dispcmnCtrlCmdSpecificDispI2cReadWrite_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispcmnCtrlCmdSpecificGetValidHeadWindowAssignment -- exported (id=0x7302ad) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispcmnCtrlCmdSpecificGetValidHeadWindowAssignment__ = &dispcmnCtrlCmdSpecificGetValidHeadWindowAssignment_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdSpecificSetHdmiAudioMutestream -- exported (id=0x730275) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdSpecificSetHdmiAudioMutestream__ = &dispcmnCtrlCmdSpecificSetHdmiAudioMutestream_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x212u) + // dispcmnCtrlCmdDfpEdpDriverUnload -- exported (id=0x731176) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) pThis->__dispcmnCtrlCmdDfpEdpDriverUnload__ = &dispcmnCtrlCmdDfpEdpDriverUnload_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x212u) + // dispcmnCtrlCmdDfpGetInfo -- exported (id=0x731140) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) pThis->__dispcmnCtrlCmdDfpGetInfo__ = &dispcmnCtrlCmdDfpGetInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispcmnCtrlCmdDfpGetDisplayportDongleInfo -- exported (id=0x731142) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispcmnCtrlCmdDfpGetDisplayportDongleInfo__ = &dispcmnCtrlCmdDfpGetDisplayportDongleInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdDfpSetEldAudioCaps -- exported (id=0x731144) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdDfpSetEldAudioCaps__ = &dispcmnCtrlCmdDfpSetEldAudioCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdDfpSetAudioEnable -- exported (id=0x731150) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdDfpSetAudioEnable__ = &dispcmnCtrlCmdDfpSetAudioEnable_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDfpUpdateDynamicDfpCache -- exported (id=0x73114e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDfpUpdateDynamicDfpCache__ = &dispcmnCtrlCmdDfpUpdateDynamicDfpCache_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdDfpAssignSor -- exported (id=0x731152) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdDfpAssignSor__ = &dispcmnCtrlCmdDfpAssignSor_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDfpDscCrcControl -- exported (id=0x731157) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDfpDscCrcControl__ = &dispcmnCtrlCmdDfpDscCrcControl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdDfpInitMuxData -- exported (id=0x731158) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdDfpInitMuxData__ = &dispcmnCtrlCmdDfpInitMuxData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDfpGetDsiModeTiming -- exported (id=0x731166) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDfpGetDsiModeTiming__ = &dispcmnCtrlCmdDfpGetDsiModeTiming_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDfpConfigTwoHeadOneOr -- exported (id=0x731156) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDfpConfigTwoHeadOneOr__ = &dispcmnCtrlCmdDfpConfigTwoHeadOneOr_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDfpGetPadlinkMask -- exported (id=0x731153) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDfpGetPadlinkMask__ = &dispcmnCtrlCmdDfpGetPadlinkMask_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x202u) + // dispcmnCtrlCmdDfpGetFixedModeTiming -- exported (id=0x731172) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x42u) pThis->__dispcmnCtrlCmdDfpGetFixedModeTiming__ = &dispcmnCtrlCmdDfpGetFixedModeTiming_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8204u) + // dispcmnCtrlCmdDpAuxchCtrl -- exported (id=0x731341) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x844u) pThis->__dispcmnCtrlCmdDpAuxchCtrl__ = &dispcmnCtrlCmdDpAuxchCtrl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpAuxchSetSema -- exported (id=0x731342) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpAuxchSetSema__ = &dispcmnCtrlCmdDpAuxchSetSema_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8204u) + // dispcmnCtrlCmdDpCtrl -- exported (id=0x731343) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x844u) pThis->__dispcmnCtrlCmdDpCtrl__ = &dispcmnCtrlCmdDpCtrl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpGetLaneData -- exported (id=0x731345) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpGetLaneData__ = &dispcmnCtrlCmdDpGetLaneData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpSetLaneData -- exported (id=0x731346) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpSetLaneData__ = &dispcmnCtrlCmdDpSetLaneData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpSetTestpattern -- exported (id=0x731347) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpSetTestpattern__ = &dispcmnCtrlCmdDpSetTestpattern_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpMainLinkCtrl -- exported (id=0x731356) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpMainLinkCtrl__ = &dispcmnCtrlCmdDpMainLinkCtrl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // dispcmnCtrlCmdDpSetAudioMuteStream -- exported (id=0x731359) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__dispcmnCtrlCmdDpSetAudioMuteStream__ = &dispcmnCtrlCmdDpSetAudioMuteStream_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpGetLinkConfig -- exported (id=0x731360) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpGetLinkConfig__ = &dispcmnCtrlCmdDpGetLinkConfig_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpGetEDPData -- exported (id=0x731361) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpGetEDPData__ = &dispcmnCtrlCmdDpGetEDPData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpTopologyAllocateDisplayId -- exported (id=0x73135b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpTopologyAllocateDisplayId__ = &dispcmnCtrlCmdDpTopologyAllocateDisplayId_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpTopologyFreeDisplayId -- exported (id=0x73135c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpTopologyFreeDisplayId__ = &dispcmnCtrlCmdDpTopologyFreeDisplayId_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpConfigStream -- exported (id=0x731362) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpConfigStream__ = &dispcmnCtrlCmdDpConfigStream_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpConfigSingleHeadMultiStream -- exported (id=0x73136e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpConfigSingleHeadMultiStream__ = &dispcmnCtrlCmdDpConfigSingleHeadMultiStream_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpSetRateGov -- exported (id=0x731363) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpSetRateGov__ = &dispcmnCtrlCmdDpSetRateGov_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpSendACT -- exported (id=0x731367) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpSendACT__ = &dispcmnCtrlCmdDpSendACT_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpSetManualDisplayPort -- exported (id=0x731365) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpSetManualDisplayPort__ = &dispcmnCtrlCmdDpSetManualDisplayPort_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x206u) + // dispcmnCtrlCmdDpGetCaps -- exported (id=0x731369) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x46u) pThis->__dispcmnCtrlCmdDpGetCaps__ = &dispcmnCtrlCmdDpGetCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpSetMSAPropertiesv2 -- exported (id=0x731381) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpSetMSAPropertiesv2__ = &dispcmnCtrlCmdDpSetMSAPropertiesv2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpSetStereoMSAProperties -- exported (id=0x731378) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpSetStereoMSAProperties__ = &dispcmnCtrlCmdDpSetStereoMSAProperties_IMPL; #endif + // dispcmnCtrlCmdDpGenerateFakeInterrupt -- exported (id=0x73136b) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__dispcmnCtrlCmdDpGenerateFakeInterrupt__ = &dispcmnCtrlCmdDpGenerateFakeInterrupt_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpConfigRadScratchReg -- exported (id=0x73136c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpConfigRadScratchReg__ = &dispcmnCtrlCmdDpConfigRadScratchReg_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpSetTriggerSelect -- exported (id=0x73136f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpSetTriggerSelect__ = &dispcmnCtrlCmdDpSetTriggerSelect_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpSetTriggerAll -- exported (id=0x731370) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpSetTriggerAll__ = &dispcmnCtrlCmdDpSetTriggerAll_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpGetAuxLogData -- exported (id=0x731373) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpGetAuxLogData__ = &dispcmnCtrlCmdDpGetAuxLogData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpConfigIndexedLinkRates -- exported (id=0x731377) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpConfigIndexedLinkRates__ = &dispcmnCtrlCmdDpConfigIndexedLinkRates_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpConfigureFec -- exported (id=0x73137a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpConfigureFec__ = &dispcmnCtrlCmdDpConfigureFec_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpGetGenericInfoframe -- exported (id=0x73137e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpGetGenericInfoframe__ = &dispcmnCtrlCmdDpGetGenericInfoframe_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpGetMsaAttributes -- exported (id=0x73137f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpGetMsaAttributes__ = &dispcmnCtrlCmdDpGetMsaAttributes_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdFrlConfigMacroPad -- exported (id=0x730502) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdFrlConfigMacroPad__ = &dispcmnCtrlCmdFrlConfigMacroPad_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpConfigMacroPad -- exported (id=0x73137b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpConfigMacroPad__ = &dispcmnCtrlCmdDpConfigMacroPad_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpSetPreemphasisDrivecurrentPostcursor2Data -- exported (id=0x731351) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpSetPreemphasisDrivecurrentPostcursor2Data__ = &dispcmnCtrlCmdDpSetPreemphasisDrivecurrentPostcursor2Data_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data -- exported (id=0x731352) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data__ = &dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data_IMPL; #endif - pThis->__dispcmnShareCallback__ = &__nvoc_thunk_RmResource_dispcmnShareCallback; + // dispcmnControl -- virtual inherited (dispapi) base (dispapi) + pThis->__dispcmnControl__ = &__nvoc_up_thunk_DisplayApi_dispcmnControl; - pThis->__dispcmnCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_dispcmnCheckMemInterUnmap; + // dispcmnControl_Prologue -- virtual inherited (dispapi) base (dispapi) + pThis->__dispcmnControl_Prologue__ = &__nvoc_up_thunk_DisplayApi_dispcmnControl_Prologue; - pThis->__dispcmnMapTo__ = &__nvoc_thunk_RsResource_dispcmnMapTo; + // dispcmnControl_Epilogue -- virtual inherited (dispapi) base (dispapi) + pThis->__dispcmnControl_Epilogue__ = &__nvoc_up_thunk_DisplayApi_dispcmnControl_Epilogue; - pThis->__dispcmnAccessCallback__ = &__nvoc_thunk_RmResource_dispcmnAccessCallback; + // dispcmnAccessCallback -- virtual inherited (rmres) base (dispapi) + pThis->__dispcmnAccessCallback__ = &__nvoc_up_thunk_RmResource_dispcmnAccessCallback; - pThis->__dispcmnSetNotificationShare__ = &__nvoc_thunk_Notifier_dispcmnSetNotificationShare; + // dispcmnShareCallback -- virtual inherited (rmres) base (dispapi) + pThis->__dispcmnShareCallback__ = &__nvoc_up_thunk_RmResource_dispcmnShareCallback; - pThis->__dispcmnGetRefCount__ = &__nvoc_thunk_RsResource_dispcmnGetRefCount; + // dispcmnGetMemInterMapParams -- virtual inherited (rmres) base (dispapi) + pThis->__dispcmnGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispcmnGetMemInterMapParams; - pThis->__dispcmnAddAdditionalDependants__ = &__nvoc_thunk_RsResource_dispcmnAddAdditionalDependants; + // dispcmnCheckMemInterUnmap -- virtual inherited (rmres) base (dispapi) + pThis->__dispcmnCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispcmnCheckMemInterUnmap; - pThis->__dispcmnControl_Prologue__ = &__nvoc_thunk_DisplayApi_dispcmnControl_Prologue; + // dispcmnGetMemoryMappingDescriptor -- virtual inherited (rmres) base (dispapi) + pThis->__dispcmnGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispcmnGetMemoryMappingDescriptor; - pThis->__dispcmnUnmapFrom__ = &__nvoc_thunk_RsResource_dispcmnUnmapFrom; + // dispcmnControlSerialization_Prologue -- virtual inherited (rmres) base (dispapi) + pThis->__dispcmnControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispcmnControlSerialization_Prologue; - pThis->__dispcmnControl_Epilogue__ = &__nvoc_thunk_DisplayApi_dispcmnControl_Epilogue; + // dispcmnControlSerialization_Epilogue -- virtual inherited (rmres) base (dispapi) + pThis->__dispcmnControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispcmnControlSerialization_Epilogue; - pThis->__dispcmnControl__ = &__nvoc_thunk_DisplayApi_dispcmnControl; + // dispcmnCanCopy -- virtual inherited (res) base (dispapi) + pThis->__dispcmnCanCopy__ = &__nvoc_up_thunk_RsResource_dispcmnCanCopy; - pThis->__dispcmnUnmap__ = &__nvoc_thunk_RsResource_dispcmnUnmap; + // dispcmnIsDuplicate -- virtual inherited (res) base (dispapi) + pThis->__dispcmnIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispcmnIsDuplicate; - pThis->__dispcmnGetMemInterMapParams__ = &__nvoc_thunk_RmResource_dispcmnGetMemInterMapParams; + // dispcmnPreDestruct -- virtual inherited (res) base (dispapi) + pThis->__dispcmnPreDestruct__ = &__nvoc_up_thunk_RsResource_dispcmnPreDestruct; - pThis->__dispcmnGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_dispcmnGetMemoryMappingDescriptor; + // dispcmnControlFilter -- virtual inherited (res) base (dispapi) + pThis->__dispcmnControlFilter__ = &__nvoc_up_thunk_RsResource_dispcmnControlFilter; - pThis->__dispcmnControlFilter__ = &__nvoc_thunk_RsResource_dispcmnControlFilter; + // dispcmnMap -- virtual inherited (res) base (dispapi) + pThis->__dispcmnMap__ = &__nvoc_up_thunk_RsResource_dispcmnMap; - pThis->__dispcmnUnregisterEvent__ = &__nvoc_thunk_Notifier_dispcmnUnregisterEvent; + // dispcmnUnmap -- virtual inherited (res) base (dispapi) + pThis->__dispcmnUnmap__ = &__nvoc_up_thunk_RsResource_dispcmnUnmap; - pThis->__dispcmnControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_dispcmnControlSerialization_Prologue; + // dispcmnIsPartialUnmapSupported -- inline virtual inherited (res) base (dispapi) body + pThis->__dispcmnIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispcmnIsPartialUnmapSupported; - pThis->__dispcmnCanCopy__ = &__nvoc_thunk_RsResource_dispcmnCanCopy; + // dispcmnMapTo -- virtual inherited (res) base (dispapi) + pThis->__dispcmnMapTo__ = &__nvoc_up_thunk_RsResource_dispcmnMapTo; - pThis->__dispcmnIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_dispcmnIsPartialUnmapSupported; + // dispcmnUnmapFrom -- virtual inherited (res) base (dispapi) + pThis->__dispcmnUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispcmnUnmapFrom; - pThis->__dispcmnPreDestruct__ = &__nvoc_thunk_RsResource_dispcmnPreDestruct; + // dispcmnGetRefCount -- virtual inherited (res) base (dispapi) + pThis->__dispcmnGetRefCount__ = &__nvoc_up_thunk_RsResource_dispcmnGetRefCount; - pThis->__dispcmnIsDuplicate__ = &__nvoc_thunk_RsResource_dispcmnIsDuplicate; + // dispcmnAddAdditionalDependants -- virtual inherited (res) base (dispapi) + pThis->__dispcmnAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispcmnAddAdditionalDependants; - pThis->__dispcmnControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_dispcmnControlSerialization_Epilogue; + // dispcmnGetNotificationListPtr -- virtual inherited (notify) base (dispapi) + pThis->__dispcmnGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispcmnGetNotificationListPtr; - pThis->__dispcmnGetNotificationListPtr__ = &__nvoc_thunk_Notifier_dispcmnGetNotificationListPtr; + // dispcmnGetNotificationShare -- virtual inherited (notify) base (dispapi) + pThis->__dispcmnGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispcmnGetNotificationShare; - pThis->__dispcmnGetNotificationShare__ = &__nvoc_thunk_Notifier_dispcmnGetNotificationShare; + // dispcmnSetNotificationShare -- virtual inherited (notify) base (dispapi) + pThis->__dispcmnSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispcmnSetNotificationShare; - pThis->__dispcmnMap__ = &__nvoc_thunk_RsResource_dispcmnMap; + // dispcmnUnregisterEvent -- virtual inherited (notify) base (dispapi) + pThis->__dispcmnUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispcmnUnregisterEvent; - pThis->__dispcmnGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_dispcmnGetOrAllocNotifShare; -} + // dispcmnGetOrAllocNotifShare -- virtual inherited (notify) base (dispapi) + pThis->__dispcmnGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispcmnGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_DispCommon_1 with approximately 160 basic block(s). + +// Initialize vtable(s) for 160 virtual method(s). void __nvoc_init_funcTable_DispCommon(DispCommon *pThis) { + + // Initialize vtable(s) with 160 per-object function pointer(s). __nvoc_init_funcTable_DispCommon_1(pThis); } diff --git a/src/nvidia/generated/g_disp_objs_nvoc.h b/src/nvidia/generated/g_disp_objs_nvoc.h index 040c03f7ca..8be5d1abde 100644 --- a/src/nvidia/generated/g_disp_objs_nvoc.h +++ b/src/nvidia/generated/g_disp_objs_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_DISP_OBJS_NVOC_H_ #define _G_DISP_OBJS_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -37,6 +44,7 @@ extern "C" { * ******************************************************************************/ +#pragma once #include "g_disp_objs_nvoc.h" #ifndef DISP_OBJS_H @@ -50,7 +58,6 @@ extern "C" { #include "ctrl/ctrl0073.h" #include "ctrl/ctrl5070/ctrl5070event.h" #include "ctrl/ctrl5070/ctrl5070or.h" -#include "ctrl/ctrl5070/ctrl5070seq.h" #include "ctrl/ctrl5070/ctrl5070system.h" #include "ctrl/ctrlc370/ctrlc370chnc.h" #include "ctrl/ctrlc370/ctrlc370event.h" @@ -69,6 +76,7 @@ struct Device; struct Memory; struct RsResource; struct RmResource; + struct DispChannel; #ifndef __NVOC_CLASS_DispChannel_TYPEDEF__ @@ -99,43 +107,54 @@ typedef struct DispChannel DispChannel; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct DisplayApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; struct Notifier __nvoc_base_Notifier; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct DisplayApi *__nvoc_pbase_DisplayApi; - NV_STATUS (*__dispapiControl__)(struct DisplayApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispapiControl_Prologue__)(struct DisplayApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__dispapiControl_Epilogue__)(struct DisplayApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__dispapiShareCallback__)(struct DisplayApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__dispapiCheckMemInterUnmap__)(struct DisplayApi *, NvBool); - NV_STATUS (*__dispapiMapTo__)(struct DisplayApi *, RS_RES_MAP_TO_PARAMS *); - NvBool (*__dispapiAccessCallback__)(struct DisplayApi *, struct RsClient *, void *, RsAccessRight); - void (*__dispapiSetNotificationShare__)(struct DisplayApi *, struct NotifShare *); - NvU32 (*__dispapiGetRefCount__)(struct DisplayApi *); - void (*__dispapiAddAdditionalDependants__)(struct RsClient *, struct DisplayApi *, RsResourceRef *); - NV_STATUS (*__dispapiUnmapFrom__)(struct DisplayApi *, RS_RES_UNMAP_FROM_PARAMS *); - NV_STATUS (*__dispapiUnmap__)(struct DisplayApi *, struct CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__dispapiGetMemInterMapParams__)(struct DisplayApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__dispapiGetMemoryMappingDescriptor__)(struct DisplayApi *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__dispapiControlFilter__)(struct DisplayApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispapiUnregisterEvent__)(struct DisplayApi *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__dispapiControlSerialization_Prologue__)(struct DisplayApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__dispapiCanCopy__)(struct DisplayApi *); - NvBool (*__dispapiIsPartialUnmapSupported__)(struct DisplayApi *); - void (*__dispapiPreDestruct__)(struct DisplayApi *); - NV_STATUS (*__dispapiIsDuplicate__)(struct DisplayApi *, NvHandle, NvBool *); - void (*__dispapiControlSerialization_Epilogue__)(struct DisplayApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__dispapiGetNotificationListPtr__)(struct DisplayApi *); - struct NotifShare *(*__dispapiGetNotificationShare__)(struct DisplayApi *); - NV_STATUS (*__dispapiMap__)(struct DisplayApi *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NV_STATUS (*__dispapiGetOrAllocNotifShare__)(struct DisplayApi *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^3 + struct RsResource *__nvoc_pbase_RsResource; // res super^2 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^2 + struct RmResource *__nvoc_pbase_RmResource; // rmres super + struct INotifier *__nvoc_pbase_INotifier; // inotify super^2 + struct Notifier *__nvoc_pbase_Notifier; // notify super + struct DisplayApi *__nvoc_pbase_DisplayApi; // dispapi + + // Vtable with 26 per-object function pointers + NV_STATUS (*__dispapiControl__)(struct DisplayApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (rmres) + NV_STATUS (*__dispapiControl_Prologue__)(struct DisplayApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (rmres) + void (*__dispapiControl_Epilogue__)(struct DisplayApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (rmres) + NvBool (*__dispapiAccessCallback__)(struct DisplayApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) + NvBool (*__dispapiShareCallback__)(struct DisplayApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__dispapiGetMemInterMapParams__)(struct DisplayApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__dispapiCheckMemInterUnmap__)(struct DisplayApi * /*this*/, NvBool); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__dispapiGetMemoryMappingDescriptor__)(struct DisplayApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__dispapiControlSerialization_Prologue__)(struct DisplayApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__dispapiControlSerialization_Epilogue__)(struct DisplayApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NvBool (*__dispapiCanCopy__)(struct DisplayApi * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__dispapiIsDuplicate__)(struct DisplayApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (rmres) + void (*__dispapiPreDestruct__)(struct DisplayApi * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__dispapiControlFilter__)(struct DisplayApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__dispapiMap__)(struct DisplayApi * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NV_STATUS (*__dispapiUnmap__)(struct DisplayApi * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NvBool (*__dispapiIsPartialUnmapSupported__)(struct DisplayApi * /*this*/); // inline virtual inherited (res) base (rmres) body + NV_STATUS (*__dispapiMapTo__)(struct DisplayApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) + NV_STATUS (*__dispapiUnmapFrom__)(struct DisplayApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) + NvU32 (*__dispapiGetRefCount__)(struct DisplayApi * /*this*/); // virtual inherited (res) base (rmres) + void (*__dispapiAddAdditionalDependants__)(struct RsClient *, struct DisplayApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) + PEVENTNOTIFICATION * (*__dispapiGetNotificationListPtr__)(struct DisplayApi * /*this*/); // virtual inherited (notify) base (notify) + struct NotifShare * (*__dispapiGetNotificationShare__)(struct DisplayApi * /*this*/); // virtual inherited (notify) base (notify) + void (*__dispapiSetNotificationShare__)(struct DisplayApi * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) + NV_STATUS (*__dispapiUnregisterEvent__)(struct DisplayApi * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) + NV_STATUS (*__dispapiGetOrAllocNotifShare__)(struct DisplayApi * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) + + // Data members struct OBJGPU *pGpuInRmctrl; struct OBJGPUGRP *pGpuGrp; NvBool bBcResource; @@ -154,6 +173,7 @@ typedef struct DisplayApi DisplayApi; #define __nvoc_class_id_DisplayApi 0xe9980c #endif /* __nvoc_class_id_DisplayApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_DisplayApi; #define __staticCast_DisplayApi(pThis) \ @@ -166,163 +186,192 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_DisplayApi; ((DisplayApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(DisplayApi))) #endif //__nvoc_disp_objs_h_disabled - NV_STATUS __nvoc_objCreateDynamic_DisplayApi(DisplayApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_DisplayApi(DisplayApi**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_DisplayApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_DisplayApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define dispapiControl_FNPTR(pDisplayApi) pDisplayApi->__dispapiControl__ #define dispapiControl(pDisplayApi, pCallContext, pParams) dispapiControl_DISPATCH(pDisplayApi, pCallContext, pParams) +#define dispapiControl_Prologue_FNPTR(pDisplayApi) pDisplayApi->__dispapiControl_Prologue__ #define dispapiControl_Prologue(pDisplayApi, pCallContext, pRsParams) dispapiControl_Prologue_DISPATCH(pDisplayApi, pCallContext, pRsParams) +#define dispapiControl_Epilogue_FNPTR(pDisplayApi) pDisplayApi->__dispapiControl_Epilogue__ #define dispapiControl_Epilogue(pDisplayApi, pCallContext, pRsParams) dispapiControl_Epilogue_DISPATCH(pDisplayApi, pCallContext, pRsParams) -#define dispapiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) dispapiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define dispapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define dispapiMapTo(pResource, pParams) dispapiMapTo_DISPATCH(pResource, pParams) +#define dispapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ #define dispapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define dispapiSetNotificationShare(pNotifier, pNotifShare) dispapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define dispapiGetRefCount(pResource) dispapiGetRefCount_DISPATCH(pResource) -#define dispapiAddAdditionalDependants(pClient, pResource, pReference) dispapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define dispapiUnmapFrom(pResource, pParams) dispapiUnmapFrom_DISPATCH(pResource, pParams) -#define dispapiUnmap(pResource, pCallContext, pCpuMapping) dispapiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define dispapiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ +#define dispapiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) dispapiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define dispapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define dispapiGetMemInterMapParams(pRmResource, pParams) dispapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define dispapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define dispapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define dispapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define dispapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) dispapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define dispapiControlFilter(pResource, pCallContext, pParams) dispapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define dispapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define dispapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define dispapiControlSerialization_Prologue(pResource, pCallContext, pParams) dispapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dispapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dispapiControlSerialization_Epilogue(pResource, pCallContext, pParams) dispapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define dispapiCanCopy(pResource) dispapiCanCopy_DISPATCH(pResource) -#define dispapiIsPartialUnmapSupported(pResource) dispapiIsPartialUnmapSupported_DISPATCH(pResource) -#define dispapiPreDestruct(pResource) dispapiPreDestruct_DISPATCH(pResource) +#define dispapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define dispapiIsDuplicate(pResource, hMemory, pDuplicate) dispapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dispapiControlSerialization_Epilogue(pResource, pCallContext, pParams) dispapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dispapiPreDestruct(pResource) dispapiPreDestruct_DISPATCH(pResource) +#define dispapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dispapiControlFilter(pResource, pCallContext, pParams) dispapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define dispapiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define dispapiMap(pResource, pCallContext, pParams, pCpuMapping) dispapiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define dispapiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define dispapiUnmap(pResource, pCallContext, pCpuMapping) dispapiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define dispapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dispapiIsPartialUnmapSupported(pResource) dispapiIsPartialUnmapSupported_DISPATCH(pResource) +#define dispapiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dispapiMapTo(pResource, pParams) dispapiMapTo_DISPATCH(pResource, pParams) +#define dispapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dispapiUnmapFrom(pResource, pParams) dispapiUnmapFrom_DISPATCH(pResource, pParams) +#define dispapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dispapiGetRefCount(pResource) dispapiGetRefCount_DISPATCH(pResource) +#define dispapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dispapiAddAdditionalDependants(pClient, pResource, pReference) dispapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define dispapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define dispapiGetNotificationListPtr(pNotifier) dispapiGetNotificationListPtr_DISPATCH(pNotifier) +#define dispapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ #define dispapiGetNotificationShare(pNotifier) dispapiGetNotificationShare_DISPATCH(pNotifier) -#define dispapiMap(pResource, pCallContext, pParams, pCpuMapping) dispapiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define dispapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define dispapiSetNotificationShare(pNotifier, pNotifShare) dispapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define dispapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define dispapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define dispapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ #define dispapiGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) dispapiGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -NV_STATUS dispapiSetUnicastAndSynchronize_KERNEL(struct DisplayApi *pDisplayApi, struct OBJGPUGRP *pGpuGroup, struct OBJGPU **ppGpu, OBJDISP **ppDisp, NvU32 subDeviceInstance); - - -#ifdef __nvoc_disp_objs_h_disabled -static inline NV_STATUS dispapiSetUnicastAndSynchronize(struct DisplayApi *pDisplayApi, struct OBJGPUGRP *pGpuGroup, struct OBJGPU **ppGpu, OBJDISP **ppDisp, NvU32 subDeviceInstance) { - NV_ASSERT_FAILED_PRECOMP("DisplayApi was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_disp_objs_h_disabled -#define dispapiSetUnicastAndSynchronize(pDisplayApi, pGpuGroup, ppGpu, ppDisp, subDeviceInstance) dispapiSetUnicastAndSynchronize_KERNEL(pDisplayApi, pGpuGroup, ppGpu, ppDisp, subDeviceInstance) -#endif //__nvoc_disp_objs_h_disabled - -#define dispapiSetUnicastAndSynchronize_HAL(pDisplayApi, pGpuGroup, ppGpu, ppDisp, subDeviceInstance) dispapiSetUnicastAndSynchronize(pDisplayApi, pGpuGroup, ppGpu, ppDisp, subDeviceInstance) - -NV_STATUS dispapiControl_IMPL(struct DisplayApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); +// Dispatch functions static inline NV_STATUS dispapiControl_DISPATCH(struct DisplayApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pDisplayApi->__dispapiControl__(pDisplayApi, pCallContext, pParams); } -NV_STATUS dispapiControl_Prologue_IMPL(struct DisplayApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); - static inline NV_STATUS dispapiControl_Prologue_DISPATCH(struct DisplayApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { return pDisplayApi->__dispapiControl_Prologue__(pDisplayApi, pCallContext, pRsParams); } -void dispapiControl_Epilogue_IMPL(struct DisplayApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); - static inline void dispapiControl_Epilogue_DISPATCH(struct DisplayApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { pDisplayApi->__dispapiControl_Epilogue__(pDisplayApi, pCallContext, pRsParams); } -static inline NvBool dispapiShareCallback_DISPATCH(struct DisplayApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__dispapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS dispapiCheckMemInterUnmap_DISPATCH(struct DisplayApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__dispapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NvBool dispapiAccessCallback_DISPATCH(struct DisplayApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__dispapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS dispapiMapTo_DISPATCH(struct DisplayApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dispapiMapTo__(pResource, pParams); +static inline NvBool dispapiShareCallback_DISPATCH(struct DisplayApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__dispapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline NvBool dispapiAccessCallback_DISPATCH(struct DisplayApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__dispapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS dispapiGetMemInterMapParams_DISPATCH(struct DisplayApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__dispapiGetMemInterMapParams__(pRmResource, pParams); } -static inline void dispapiSetNotificationShare_DISPATCH(struct DisplayApi *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__dispapiSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS dispapiCheckMemInterUnmap_DISPATCH(struct DisplayApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__dispapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NvU32 dispapiGetRefCount_DISPATCH(struct DisplayApi *pResource) { - return pResource->__dispapiGetRefCount__(pResource); +static inline NV_STATUS dispapiGetMemoryMappingDescriptor_DISPATCH(struct DisplayApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__dispapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline void dispapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DisplayApi *pResource, RsResourceRef *pReference) { - pResource->__dispapiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS dispapiControlSerialization_Prologue_DISPATCH(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dispapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispapiUnmapFrom_DISPATCH(struct DisplayApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dispapiUnmapFrom__(pResource, pParams); +static inline void dispapiControlSerialization_Epilogue_DISPATCH(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__dispapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispapiUnmap_DISPATCH(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__dispapiUnmap__(pResource, pCallContext, pCpuMapping); +static inline NvBool dispapiCanCopy_DISPATCH(struct DisplayApi *pResource) { + return pResource->__dispapiCanCopy__(pResource); } -static inline NV_STATUS dispapiGetMemInterMapParams_DISPATCH(struct DisplayApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dispapiGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS dispapiIsDuplicate_DISPATCH(struct DisplayApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__dispapiIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS dispapiGetMemoryMappingDescriptor_DISPATCH(struct DisplayApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__dispapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void dispapiPreDestruct_DISPATCH(struct DisplayApi *pResource) { + pResource->__dispapiPreDestruct__(pResource); } static inline NV_STATUS dispapiControlFilter_DISPATCH(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__dispapiControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispapiUnregisterEvent_DISPATCH(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__dispapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static inline NV_STATUS dispapiControlSerialization_Prologue_DISPATCH(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispapiControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS dispapiMap_DISPATCH(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__dispapiMap__(pResource, pCallContext, pParams, pCpuMapping); } -static inline NvBool dispapiCanCopy_DISPATCH(struct DisplayApi *pResource) { - return pResource->__dispapiCanCopy__(pResource); +static inline NV_STATUS dispapiUnmap_DISPATCH(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pResource->__dispapiUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool dispapiIsPartialUnmapSupported_DISPATCH(struct DisplayApi *pResource) { return pResource->__dispapiIsPartialUnmapSupported__(pResource); } -static inline void dispapiPreDestruct_DISPATCH(struct DisplayApi *pResource) { - pResource->__dispapiPreDestruct__(pResource); +static inline NV_STATUS dispapiMapTo_DISPATCH(struct DisplayApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__dispapiMapTo__(pResource, pParams); } -static inline NV_STATUS dispapiIsDuplicate_DISPATCH(struct DisplayApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dispapiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS dispapiUnmapFrom_DISPATCH(struct DisplayApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__dispapiUnmapFrom__(pResource, pParams); } -static inline void dispapiControlSerialization_Epilogue_DISPATCH(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 dispapiGetRefCount_DISPATCH(struct DisplayApi *pResource) { + return pResource->__dispapiGetRefCount__(pResource); +} + +static inline void dispapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DisplayApi *pResource, RsResourceRef *pReference) { + pResource->__dispapiAddAdditionalDependants__(pClient, pResource, pReference); } -static inline PEVENTNOTIFICATION *dispapiGetNotificationListPtr_DISPATCH(struct DisplayApi *pNotifier) { +static inline PEVENTNOTIFICATION * dispapiGetNotificationListPtr_DISPATCH(struct DisplayApi *pNotifier) { return pNotifier->__dispapiGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *dispapiGetNotificationShare_DISPATCH(struct DisplayApi *pNotifier) { +static inline struct NotifShare * dispapiGetNotificationShare_DISPATCH(struct DisplayApi *pNotifier) { return pNotifier->__dispapiGetNotificationShare__(pNotifier); } -static inline NV_STATUS dispapiMap_DISPATCH(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__dispapiMap__(pResource, pCallContext, pParams, pCpuMapping); +static inline void dispapiSetNotificationShare_DISPATCH(struct DisplayApi *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__dispapiSetNotificationShare__(pNotifier, pNotifShare); +} + +static inline NV_STATUS dispapiUnregisterEvent_DISPATCH(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__dispapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS dispapiGetOrAllocNotifShare_DISPATCH(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return pNotifier->__dispapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } +NV_STATUS dispapiSetUnicastAndSynchronize_KERNEL(struct DisplayApi *pDisplayApi, struct OBJGPUGRP *pGpuGroup, struct OBJGPU **ppGpu, OBJDISP **ppDisp, NvU32 subDeviceInstance); + + +#ifdef __nvoc_disp_objs_h_disabled +static inline NV_STATUS dispapiSetUnicastAndSynchronize(struct DisplayApi *pDisplayApi, struct OBJGPUGRP *pGpuGroup, struct OBJGPU **ppGpu, OBJDISP **ppDisp, NvU32 subDeviceInstance) { + NV_ASSERT_FAILED_PRECOMP("DisplayApi was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_disp_objs_h_disabled +#define dispapiSetUnicastAndSynchronize(pDisplayApi, pGpuGroup, ppGpu, ppDisp, subDeviceInstance) dispapiSetUnicastAndSynchronize_KERNEL(pDisplayApi, pGpuGroup, ppGpu, ppDisp, subDeviceInstance) +#endif //__nvoc_disp_objs_h_disabled + +#define dispapiSetUnicastAndSynchronize_HAL(pDisplayApi, pGpuGroup, ppGpu, ppDisp, subDeviceInstance) dispapiSetUnicastAndSynchronize(pDisplayApi, pGpuGroup, ppGpu, ppDisp, subDeviceInstance) + +NV_STATUS dispapiControl_IMPL(struct DisplayApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +NV_STATUS dispapiControl_Prologue_IMPL(struct DisplayApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); + +void dispapiControl_Epilogue_IMPL(struct DisplayApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); + NV_STATUS dispapiConstruct_IMPL(struct DisplayApi *arg_pDisplayApi, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_dispapiConstruct(arg_pDisplayApi, arg_pCallContext, arg_pParams) dispapiConstruct_IMPL(arg_pDisplayApi, arg_pCallContext, arg_pParams) @@ -360,72 +409,78 @@ static inline NV_STATUS dispapiCtrlCmdEventSetNotification(struct DisplayApi *pD #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct DispObject { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct DisplayApi __nvoc_base_DisplayApi; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct DisplayApi *__nvoc_pbase_DisplayApi; - struct DispObject *__nvoc_pbase_DispObject; - NV_STATUS (*__dispobjCtrlCmdGetPinsetCount__)(struct DispObject *, NV5070_CTRL_GET_PINSET_COUNT_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdGetPinsetPeer__)(struct DispObject *, NV5070_CTRL_GET_PINSET_PEER_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdSetMempoolWARForBlitTearing__)(struct DispObject *, NV5070_CTRL_SET_MEMPOOL_WAR_FOR_BLIT_TEARING_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdGetPinsetLockpins__)(struct DispObject *, NV5070_CTRL_GET_PINSET_LOCKPINS_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdGetFrameLockHeaderLockPins__)(struct DispObject *, NV5070_CTRL_GET_FRAMELOCK_HEADER_LOCKPINS_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdGetPiorSeqCtl__)(struct DispObject *, NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdSetPiorSeqCtl__)(struct DispObject *, NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdGetPiorOpMode__)(struct DispObject *, NV5070_CTRL_CMD_GET_PIOR_OP_MODE_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdSetPiorOpMode__)(struct DispObject *, NV5070_CTRL_CMD_SET_PIOR_OP_MODE_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdEventSetMemoryNotifies__)(struct DispObject *, NV5070_CTRL_EVENT_SET_MEMORY_NOTIFIES_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdSetRmFreeFlags__)(struct DispObject *, NV5070_CTRL_SET_RMFREE_FLAGS_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdIMPSetGetParameter__)(struct DispObject *, NV5070_CTRL_IMP_SET_GET_PARAMETER_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdGetRgStatus__)(struct DispObject *, NV5070_CTRL_CMD_GET_RG_STATUS_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdGetRgUnderflowProp__)(struct DispObject *, NV5070_CTRL_CMD_GET_RG_UNDERFLOW_PROP_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdSetRgUnderflowProp__)(struct DispObject *, NV5070_CTRL_CMD_SET_RG_UNDERFLOW_PROP_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdGetRgFliplockProp__)(struct DispObject *, NV5070_CTRL_CMD_GET_RG_FLIPLOCK_PROP_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdSetRgFliplockProp__)(struct DispObject *, NV5070_CTRL_CMD_SET_RG_FLIPLOCK_PROP_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdGetRgConnectedLockpinStateless__)(struct DispObject *, NV5070_CTRL_GET_RG_CONNECTED_LOCKPIN_STATELESS_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdGetRgScanLine__)(struct DispObject *, NV5070_CTRL_CMD_GET_RG_SCAN_LINE_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdGetSorSeqCtl__)(struct DispObject *, NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdSetSorSeqCtl__)(struct DispObject *, NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdSeqProgSpeed__)(struct DispObject *, NV5070_CTRL_SEQ_PROG_SPEED_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdGetSorPwm__)(struct DispObject *, NV5070_CTRL_CMD_GET_SOR_PWM_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdSetSorPwm__)(struct DispObject *, NV5070_CTRL_CMD_SET_SOR_PWM_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdGetSorOpMode__)(struct DispObject *, NV5070_CTRL_CMD_GET_SOR_OP_MODE_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdSetSorOpMode__)(struct DispObject *, NV5070_CTRL_CMD_SET_SOR_OP_MODE_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdSetSorFlushMode__)(struct DispObject *, NV5070_CTRL_SET_SOR_FLUSH_MODE_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdSystemGetCapsV2__)(struct DispObject *, NV5070_CTRL_SYSTEM_GET_CAPS_V2_PARAMS *); - NV_STATUS (*__dispobjCtrlCmdEventSetTrigger__)(struct DispObject *); - NvBool (*__dispobjShareCallback__)(struct DispObject *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__dispobjCheckMemInterUnmap__)(struct DispObject *, NvBool); - NV_STATUS (*__dispobjMapTo__)(struct DispObject *, RS_RES_MAP_TO_PARAMS *); - NvBool (*__dispobjAccessCallback__)(struct DispObject *, struct RsClient *, void *, RsAccessRight); - void (*__dispobjSetNotificationShare__)(struct DispObject *, struct NotifShare *); - NvU32 (*__dispobjGetRefCount__)(struct DispObject *); - void (*__dispobjAddAdditionalDependants__)(struct RsClient *, struct DispObject *, RsResourceRef *); - NV_STATUS (*__dispobjControl_Prologue__)(struct DispObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispobjUnmapFrom__)(struct DispObject *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__dispobjControl_Epilogue__)(struct DispObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispobjControl__)(struct DispObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispobjUnmap__)(struct DispObject *, struct CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__dispobjGetMemInterMapParams__)(struct DispObject *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__dispobjGetMemoryMappingDescriptor__)(struct DispObject *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__dispobjControlFilter__)(struct DispObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispobjUnregisterEvent__)(struct DispObject *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__dispobjControlSerialization_Prologue__)(struct DispObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__dispobjCanCopy__)(struct DispObject *); - NvBool (*__dispobjIsPartialUnmapSupported__)(struct DispObject *); - void (*__dispobjPreDestruct__)(struct DispObject *); - NV_STATUS (*__dispobjIsDuplicate__)(struct DispObject *, NvHandle, NvBool *); - void (*__dispobjControlSerialization_Epilogue__)(struct DispObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__dispobjGetNotificationListPtr__)(struct DispObject *); - struct NotifShare *(*__dispobjGetNotificationShare__)(struct DispObject *); - NV_STATUS (*__dispobjMap__)(struct DispObject *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NV_STATUS (*__dispobjGetOrAllocNotifShare__)(struct DispObject *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct INotifier *__nvoc_pbase_INotifier; // inotify super^3 + struct Notifier *__nvoc_pbase_Notifier; // notify super^2 + struct DisplayApi *__nvoc_pbase_DisplayApi; // dispapi super + struct DispObject *__nvoc_pbase_DispObject; // dispobj + + // Vtable with 50 per-object function pointers + NV_STATUS (*__dispobjCtrlCmdGetPinsetCount__)(struct DispObject * /*this*/, NV5070_CTRL_GET_PINSET_COUNT_PARAMS *); // exported (id=0x50700115) + NV_STATUS (*__dispobjCtrlCmdGetPinsetPeer__)(struct DispObject * /*this*/, NV5070_CTRL_GET_PINSET_PEER_PARAMS *); // exported (id=0x50700116) + NV_STATUS (*__dispobjCtrlCmdSetMempoolWARForBlitTearing__)(struct DispObject * /*this*/, NV5070_CTRL_SET_MEMPOOL_WAR_FOR_BLIT_TEARING_PARAMS *); // exported (id=0x50700119) + NV_STATUS (*__dispobjCtrlCmdGetPinsetLockpins__)(struct DispObject * /*this*/, NV5070_CTRL_GET_PINSET_LOCKPINS_PARAMS *); // exported (id=0x5070020b) + NV_STATUS (*__dispobjCtrlCmdGetFrameLockHeaderLockPins__)(struct DispObject * /*this*/, NV5070_CTRL_GET_FRAMELOCK_HEADER_LOCKPINS_PARAMS *); // exported (id=0x5070020d) + NV_STATUS (*__dispobjCtrlCmdGetPiorOpMode__)(struct DispObject * /*this*/, NV5070_CTRL_CMD_GET_PIOR_OP_MODE_PARAMS *); // exported (id=0x50700430) + NV_STATUS (*__dispobjCtrlCmdSetPiorOpMode__)(struct DispObject * /*this*/, NV5070_CTRL_CMD_SET_PIOR_OP_MODE_PARAMS *); // exported (id=0x50700431) + NV_STATUS (*__dispobjCtrlCmdEventSetMemoryNotifies__)(struct DispObject * /*this*/, NV5070_CTRL_EVENT_SET_MEMORY_NOTIFIES_PARAMS *); // exported (id=0x50700903) + NV_STATUS (*__dispobjCtrlCmdSetRmFreeFlags__)(struct DispObject * /*this*/, NV5070_CTRL_SET_RMFREE_FLAGS_PARAMS *); // exported (id=0x50700117) + NV_STATUS (*__dispobjCtrlCmdIMPSetGetParameter__)(struct DispObject * /*this*/, NV5070_CTRL_IMP_SET_GET_PARAMETER_PARAMS *); // exported (id=0x50700118) + NV_STATUS (*__dispobjCtrlCmdGetRgStatus__)(struct DispObject * /*this*/, NV5070_CTRL_CMD_GET_RG_STATUS_PARAMS *); // exported (id=0x50700202) + NV_STATUS (*__dispobjCtrlCmdGetRgUnderflowProp__)(struct DispObject * /*this*/, NV5070_CTRL_CMD_GET_RG_UNDERFLOW_PROP_PARAMS *); // exported (id=0x50700203) + NV_STATUS (*__dispobjCtrlCmdSetRgUnderflowProp__)(struct DispObject * /*this*/, NV5070_CTRL_CMD_SET_RG_UNDERFLOW_PROP_PARAMS *); // exported (id=0x50700204) + NV_STATUS (*__dispobjCtrlCmdGetRgFliplockProp__)(struct DispObject * /*this*/, NV5070_CTRL_CMD_GET_RG_FLIPLOCK_PROP_PARAMS *); // exported (id=0x50700205) + NV_STATUS (*__dispobjCtrlCmdSetRgFliplockProp__)(struct DispObject * /*this*/, NV5070_CTRL_CMD_SET_RG_FLIPLOCK_PROP_PARAMS *); // exported (id=0x50700206) + NV_STATUS (*__dispobjCtrlCmdGetRgConnectedLockpinStateless__)(struct DispObject * /*this*/, NV5070_CTRL_GET_RG_CONNECTED_LOCKPIN_STATELESS_PARAMS *); // exported (id=0x5070020a) + NV_STATUS (*__dispobjCtrlCmdGetRgScanLine__)(struct DispObject * /*this*/, NV5070_CTRL_CMD_GET_RG_SCAN_LINE_PARAMS *); // exported (id=0x5070020c) + NV_STATUS (*__dispobjCtrlCmdGetSorPwm__)(struct DispObject * /*this*/, NV5070_CTRL_CMD_GET_SOR_PWM_PARAMS *); // exported (id=0x50700420) + NV_STATUS (*__dispobjCtrlCmdSetSorPwm__)(struct DispObject * /*this*/, NV5070_CTRL_CMD_SET_SOR_PWM_PARAMS *); // exported (id=0x50700421) + NV_STATUS (*__dispobjCtrlCmdGetSorOpMode__)(struct DispObject * /*this*/, NV5070_CTRL_CMD_GET_SOR_OP_MODE_PARAMS *); // exported (id=0x50700422) + NV_STATUS (*__dispobjCtrlCmdSetSorOpMode__)(struct DispObject * /*this*/, NV5070_CTRL_CMD_SET_SOR_OP_MODE_PARAMS *); // exported (id=0x50700423) + NV_STATUS (*__dispobjCtrlCmdSetSorFlushMode__)(struct DispObject * /*this*/, NV5070_CTRL_SET_SOR_FLUSH_MODE_PARAMS *); // exported (id=0x50700457) + NV_STATUS (*__dispobjCtrlCmdSystemGetCapsV2__)(struct DispObject * /*this*/, NV5070_CTRL_SYSTEM_GET_CAPS_V2_PARAMS *); // exported (id=0x50700709) + NV_STATUS (*__dispobjCtrlCmdEventSetTrigger__)(struct DispObject * /*this*/); // exported (id=0x50700902) + NV_STATUS (*__dispobjControl__)(struct DispObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispapi) + NV_STATUS (*__dispobjControl_Prologue__)(struct DispObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispapi) + void (*__dispobjControl_Epilogue__)(struct DispObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispapi) + NvBool (*__dispobjAccessCallback__)(struct DispObject * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (dispapi) + NvBool (*__dispobjShareCallback__)(struct DispObject * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (dispapi) + NV_STATUS (*__dispobjGetMemInterMapParams__)(struct DispObject * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (dispapi) + NV_STATUS (*__dispobjCheckMemInterUnmap__)(struct DispObject * /*this*/, NvBool); // virtual inherited (rmres) base (dispapi) + NV_STATUS (*__dispobjGetMemoryMappingDescriptor__)(struct DispObject * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (dispapi) + NV_STATUS (*__dispobjControlSerialization_Prologue__)(struct DispObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (dispapi) + void (*__dispobjControlSerialization_Epilogue__)(struct DispObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (dispapi) + NvBool (*__dispobjCanCopy__)(struct DispObject * /*this*/); // virtual inherited (res) base (dispapi) + NV_STATUS (*__dispobjIsDuplicate__)(struct DispObject * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (dispapi) + void (*__dispobjPreDestruct__)(struct DispObject * /*this*/); // virtual inherited (res) base (dispapi) + NV_STATUS (*__dispobjControlFilter__)(struct DispObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (dispapi) + NV_STATUS (*__dispobjMap__)(struct DispObject * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (dispapi) + NV_STATUS (*__dispobjUnmap__)(struct DispObject * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (dispapi) + NvBool (*__dispobjIsPartialUnmapSupported__)(struct DispObject * /*this*/); // inline virtual inherited (res) base (dispapi) body + NV_STATUS (*__dispobjMapTo__)(struct DispObject * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (dispapi) + NV_STATUS (*__dispobjUnmapFrom__)(struct DispObject * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (dispapi) + NvU32 (*__dispobjGetRefCount__)(struct DispObject * /*this*/); // virtual inherited (res) base (dispapi) + void (*__dispobjAddAdditionalDependants__)(struct RsClient *, struct DispObject * /*this*/, RsResourceRef *); // virtual inherited (res) base (dispapi) + PEVENTNOTIFICATION * (*__dispobjGetNotificationListPtr__)(struct DispObject * /*this*/); // virtual inherited (notify) base (dispapi) + struct NotifShare * (*__dispobjGetNotificationShare__)(struct DispObject * /*this*/); // virtual inherited (notify) base (dispapi) + void (*__dispobjSetNotificationShare__)(struct DispObject * /*this*/, struct NotifShare *); // virtual inherited (notify) base (dispapi) + NV_STATUS (*__dispobjUnregisterEvent__)(struct DispObject * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (dispapi) + NV_STATUS (*__dispobjGetOrAllocNotifShare__)(struct DispObject * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (dispapi) + + // Data members NvU32 rmFreeFlags; }; @@ -438,6 +493,7 @@ typedef struct DispObject DispObject; #define __nvoc_class_id_DispObject 0x999839 #endif /* __nvoc_class_id_DispObject */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_DispObject; #define __staticCast_DispObject(pThis) \ @@ -450,360 +506,378 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_DispObject; ((DispObject*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(DispObject))) #endif //__nvoc_disp_objs_h_disabled - NV_STATUS __nvoc_objCreateDynamic_DispObject(DispObject**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_DispObject(DispObject**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_DispObject(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_DispObject((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define dispobjCtrlCmdGetPinsetCount_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdGetPinsetCount__ #define dispobjCtrlCmdGetPinsetCount(pDispObject, pParams) dispobjCtrlCmdGetPinsetCount_DISPATCH(pDispObject, pParams) +#define dispobjCtrlCmdGetPinsetPeer_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdGetPinsetPeer__ #define dispobjCtrlCmdGetPinsetPeer(pDispObject, pParams) dispobjCtrlCmdGetPinsetPeer_DISPATCH(pDispObject, pParams) +#define dispobjCtrlCmdSetMempoolWARForBlitTearing_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdSetMempoolWARForBlitTearing__ #define dispobjCtrlCmdSetMempoolWARForBlitTearing(pDispObject, pParams) dispobjCtrlCmdSetMempoolWARForBlitTearing_DISPATCH(pDispObject, pParams) +#define dispobjCtrlCmdGetPinsetLockpins_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdGetPinsetLockpins__ #define dispobjCtrlCmdGetPinsetLockpins(pDispObject, pParams) dispobjCtrlCmdGetPinsetLockpins_DISPATCH(pDispObject, pParams) +#define dispobjCtrlCmdGetFrameLockHeaderLockPins_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdGetFrameLockHeaderLockPins__ #define dispobjCtrlCmdGetFrameLockHeaderLockPins(pDispObject, pParams) dispobjCtrlCmdGetFrameLockHeaderLockPins_DISPATCH(pDispObject, pParams) -#define dispobjCtrlCmdGetPiorSeqCtl(pDispObject, pParams) dispobjCtrlCmdGetPiorSeqCtl_DISPATCH(pDispObject, pParams) -#define dispobjCtrlCmdSetPiorSeqCtl(pDispObject, pParams) dispobjCtrlCmdSetPiorSeqCtl_DISPATCH(pDispObject, pParams) +#define dispobjCtrlCmdGetPiorOpMode_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdGetPiorOpMode__ #define dispobjCtrlCmdGetPiorOpMode(pDispObject, pParams) dispobjCtrlCmdGetPiorOpMode_DISPATCH(pDispObject, pParams) +#define dispobjCtrlCmdSetPiorOpMode_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdSetPiorOpMode__ #define dispobjCtrlCmdSetPiorOpMode(pDispObject, pParams) dispobjCtrlCmdSetPiorOpMode_DISPATCH(pDispObject, pParams) +#define dispobjCtrlCmdEventSetMemoryNotifies_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdEventSetMemoryNotifies__ #define dispobjCtrlCmdEventSetMemoryNotifies(pDispObject, pSetMemoryNotifiesParams) dispobjCtrlCmdEventSetMemoryNotifies_DISPATCH(pDispObject, pSetMemoryNotifiesParams) +#define dispobjCtrlCmdSetRmFreeFlags_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdSetRmFreeFlags__ #define dispobjCtrlCmdSetRmFreeFlags(pDispObject, pParams) dispobjCtrlCmdSetRmFreeFlags_DISPATCH(pDispObject, pParams) +#define dispobjCtrlCmdIMPSetGetParameter_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdIMPSetGetParameter__ #define dispobjCtrlCmdIMPSetGetParameter(pDispObject, pImpSetGetParams) dispobjCtrlCmdIMPSetGetParameter_DISPATCH(pDispObject, pImpSetGetParams) +#define dispobjCtrlCmdGetRgStatus_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdGetRgStatus__ #define dispobjCtrlCmdGetRgStatus(pDispObject, pParams) dispobjCtrlCmdGetRgStatus_DISPATCH(pDispObject, pParams) +#define dispobjCtrlCmdGetRgUnderflowProp_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdGetRgUnderflowProp__ #define dispobjCtrlCmdGetRgUnderflowProp(pDispObject, pParams) dispobjCtrlCmdGetRgUnderflowProp_DISPATCH(pDispObject, pParams) +#define dispobjCtrlCmdSetRgUnderflowProp_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdSetRgUnderflowProp__ #define dispobjCtrlCmdSetRgUnderflowProp(pDispObject, pParams) dispobjCtrlCmdSetRgUnderflowProp_DISPATCH(pDispObject, pParams) +#define dispobjCtrlCmdGetRgFliplockProp_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdGetRgFliplockProp__ #define dispobjCtrlCmdGetRgFliplockProp(pDispObject, pParams) dispobjCtrlCmdGetRgFliplockProp_DISPATCH(pDispObject, pParams) +#define dispobjCtrlCmdSetRgFliplockProp_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdSetRgFliplockProp__ #define dispobjCtrlCmdSetRgFliplockProp(pDispObject, pParams) dispobjCtrlCmdSetRgFliplockProp_DISPATCH(pDispObject, pParams) +#define dispobjCtrlCmdGetRgConnectedLockpinStateless_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdGetRgConnectedLockpinStateless__ #define dispobjCtrlCmdGetRgConnectedLockpinStateless(pDispObject, pParams) dispobjCtrlCmdGetRgConnectedLockpinStateless_DISPATCH(pDispObject, pParams) +#define dispobjCtrlCmdGetRgScanLine_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdGetRgScanLine__ #define dispobjCtrlCmdGetRgScanLine(pDispObject, pParams) dispobjCtrlCmdGetRgScanLine_DISPATCH(pDispObject, pParams) -#define dispobjCtrlCmdGetSorSeqCtl(pDispObject, pParams) dispobjCtrlCmdGetSorSeqCtl_DISPATCH(pDispObject, pParams) -#define dispobjCtrlCmdSetSorSeqCtl(pDispObject, pParams) dispobjCtrlCmdSetSorSeqCtl_DISPATCH(pDispObject, pParams) -#define dispobjCtrlCmdSeqProgSpeed(pDispObject, pParams) dispobjCtrlCmdSeqProgSpeed_DISPATCH(pDispObject, pParams) +#define dispobjCtrlCmdGetSorPwm_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdGetSorPwm__ #define dispobjCtrlCmdGetSorPwm(pDispObject, pParams) dispobjCtrlCmdGetSorPwm_DISPATCH(pDispObject, pParams) +#define dispobjCtrlCmdSetSorPwm_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdSetSorPwm__ #define dispobjCtrlCmdSetSorPwm(pDispObject, pParams) dispobjCtrlCmdSetSorPwm_DISPATCH(pDispObject, pParams) +#define dispobjCtrlCmdGetSorOpMode_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdGetSorOpMode__ #define dispobjCtrlCmdGetSorOpMode(pDispObject, pParams) dispobjCtrlCmdGetSorOpMode_DISPATCH(pDispObject, pParams) +#define dispobjCtrlCmdSetSorOpMode_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdSetSorOpMode__ #define dispobjCtrlCmdSetSorOpMode(pDispObject, pParams) dispobjCtrlCmdSetSorOpMode_DISPATCH(pDispObject, pParams) +#define dispobjCtrlCmdSetSorFlushMode_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdSetSorFlushMode__ #define dispobjCtrlCmdSetSorFlushMode(pDispObject, pParams) dispobjCtrlCmdSetSorFlushMode_DISPATCH(pDispObject, pParams) +#define dispobjCtrlCmdSystemGetCapsV2_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdSystemGetCapsV2__ #define dispobjCtrlCmdSystemGetCapsV2(pDispObject, pCapsParams) dispobjCtrlCmdSystemGetCapsV2_DISPATCH(pDispObject, pCapsParams) +#define dispobjCtrlCmdEventSetTrigger_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdEventSetTrigger__ #define dispobjCtrlCmdEventSetTrigger(pDispObject) dispobjCtrlCmdEventSetTrigger_DISPATCH(pDispObject) -#define dispobjShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) dispobjShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define dispobjCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispobjCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define dispobjMapTo(pResource, pParams) dispobjMapTo_DISPATCH(pResource, pParams) -#define dispobjAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispobjAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define dispobjSetNotificationShare(pNotifier, pNotifShare) dispobjSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define dispobjGetRefCount(pResource) dispobjGetRefCount_DISPATCH(pResource) -#define dispobjAddAdditionalDependants(pClient, pResource, pReference) dispobjAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define dispobjControl_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__dispapiControl__ +#define dispobjControl(pDisplayApi, pCallContext, pParams) dispobjControl_DISPATCH(pDisplayApi, pCallContext, pParams) +#define dispobjControl_Prologue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__dispapiControl_Prologue__ #define dispobjControl_Prologue(pDisplayApi, pCallContext, pRsParams) dispobjControl_Prologue_DISPATCH(pDisplayApi, pCallContext, pRsParams) -#define dispobjUnmapFrom(pResource, pParams) dispobjUnmapFrom_DISPATCH(pResource, pParams) +#define dispobjControl_Epilogue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__dispapiControl_Epilogue__ #define dispobjControl_Epilogue(pDisplayApi, pCallContext, pRsParams) dispobjControl_Epilogue_DISPATCH(pDisplayApi, pCallContext, pRsParams) -#define dispobjControl(pDisplayApi, pCallContext, pParams) dispobjControl_DISPATCH(pDisplayApi, pCallContext, pParams) -#define dispobjUnmap(pResource, pCallContext, pCpuMapping) dispobjUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define dispobjAccessCallback_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresAccessCallback__ +#define dispobjAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispobjAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define dispobjShareCallback_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresShareCallback__ +#define dispobjShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) dispobjShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define dispobjGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define dispobjGetMemInterMapParams(pRmResource, pParams) dispobjGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define dispobjCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define dispobjCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispobjCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define dispobjGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define dispobjGetMemoryMappingDescriptor(pRmResource, ppMemDesc) dispobjGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define dispobjControlFilter(pResource, pCallContext, pParams) dispobjControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define dispobjUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispobjUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define dispobjControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define dispobjControlSerialization_Prologue(pResource, pCallContext, pParams) dispobjControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dispobjControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dispobjControlSerialization_Epilogue(pResource, pCallContext, pParams) dispobjControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispobjCanCopy_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define dispobjCanCopy(pResource) dispobjCanCopy_DISPATCH(pResource) -#define dispobjIsPartialUnmapSupported(pResource) dispobjIsPartialUnmapSupported_DISPATCH(pResource) -#define dispobjPreDestruct(pResource) dispobjPreDestruct_DISPATCH(pResource) +#define dispobjIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define dispobjIsDuplicate(pResource, hMemory, pDuplicate) dispobjIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dispobjControlSerialization_Epilogue(pResource, pCallContext, pParams) dispobjControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispobjPreDestruct_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dispobjPreDestruct(pResource) dispobjPreDestruct_DISPATCH(pResource) +#define dispobjControlFilter_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dispobjControlFilter(pResource, pCallContext, pParams) dispobjControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define dispobjMap_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define dispobjMap(pResource, pCallContext, pParams, pCpuMapping) dispobjMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define dispobjUnmap_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define dispobjUnmap(pResource, pCallContext, pCpuMapping) dispobjUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define dispobjIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dispobjIsPartialUnmapSupported(pResource) dispobjIsPartialUnmapSupported_DISPATCH(pResource) +#define dispobjMapTo_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dispobjMapTo(pResource, pParams) dispobjMapTo_DISPATCH(pResource, pParams) +#define dispobjUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dispobjUnmapFrom(pResource, pParams) dispobjUnmapFrom_DISPATCH(pResource, pParams) +#define dispobjGetRefCount_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dispobjGetRefCount(pResource) dispobjGetRefCount_DISPATCH(pResource) +#define dispobjAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dispobjAddAdditionalDependants(pClient, pResource, pReference) dispobjAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define dispobjGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define dispobjGetNotificationListPtr(pNotifier) dispobjGetNotificationListPtr_DISPATCH(pNotifier) +#define dispobjGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetNotificationShare__ #define dispobjGetNotificationShare(pNotifier) dispobjGetNotificationShare_DISPATCH(pNotifier) -#define dispobjMap(pResource, pCallContext, pParams, pCpuMapping) dispobjMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define dispobjSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define dispobjSetNotificationShare(pNotifier, pNotifShare) dispobjSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define dispobjUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define dispobjUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispobjUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define dispobjGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ #define dispobjGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) dispobjGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -NV_STATUS dispobjConstructHal_IMPL(struct DispObject *pDispObject, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); - - -#ifdef __nvoc_disp_objs_h_disabled -static inline NV_STATUS dispobjConstructHal(struct DispObject *pDispObject, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - NV_ASSERT_FAILED_PRECOMP("DispObject was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_disp_objs_h_disabled -#define dispobjConstructHal(pDispObject, pCallContext, pParams) dispobjConstructHal_IMPL(pDispObject, pCallContext, pParams) -#endif //__nvoc_disp_objs_h_disabled - -#define dispobjConstructHal_HAL(pDispObject, pCallContext, pParams) dispobjConstructHal(pDispObject, pCallContext, pParams) - -NV_STATUS dispobjCtrlCmdGetPinsetCount_IMPL(struct DispObject *pDispObject, NV5070_CTRL_GET_PINSET_COUNT_PARAMS *pParams); +// Dispatch functions static inline NV_STATUS dispobjCtrlCmdGetPinsetCount_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_GET_PINSET_COUNT_PARAMS *pParams) { return pDispObject->__dispobjCtrlCmdGetPinsetCount__(pDispObject, pParams); } -NV_STATUS dispobjCtrlCmdGetPinsetPeer_IMPL(struct DispObject *pDispObject, NV5070_CTRL_GET_PINSET_PEER_PARAMS *pParams); - static inline NV_STATUS dispobjCtrlCmdGetPinsetPeer_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_GET_PINSET_PEER_PARAMS *pParams) { return pDispObject->__dispobjCtrlCmdGetPinsetPeer__(pDispObject, pParams); } -NV_STATUS dispobjCtrlCmdSetMempoolWARForBlitTearing_IMPL(struct DispObject *pDispObject, NV5070_CTRL_SET_MEMPOOL_WAR_FOR_BLIT_TEARING_PARAMS *pParams); - static inline NV_STATUS dispobjCtrlCmdSetMempoolWARForBlitTearing_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_SET_MEMPOOL_WAR_FOR_BLIT_TEARING_PARAMS *pParams) { return pDispObject->__dispobjCtrlCmdSetMempoolWARForBlitTearing__(pDispObject, pParams); } -NV_STATUS dispobjCtrlCmdGetPinsetLockpins_IMPL(struct DispObject *pDispObject, NV5070_CTRL_GET_PINSET_LOCKPINS_PARAMS *pParams); - static inline NV_STATUS dispobjCtrlCmdGetPinsetLockpins_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_GET_PINSET_LOCKPINS_PARAMS *pParams) { return pDispObject->__dispobjCtrlCmdGetPinsetLockpins__(pDispObject, pParams); } -NV_STATUS dispobjCtrlCmdGetFrameLockHeaderLockPins_IMPL(struct DispObject *pDispObject, NV5070_CTRL_GET_FRAMELOCK_HEADER_LOCKPINS_PARAMS *pParams); - static inline NV_STATUS dispobjCtrlCmdGetFrameLockHeaderLockPins_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_GET_FRAMELOCK_HEADER_LOCKPINS_PARAMS *pParams) { return pDispObject->__dispobjCtrlCmdGetFrameLockHeaderLockPins__(pDispObject, pParams); } -NV_STATUS dispobjCtrlCmdGetPiorSeqCtl_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_PARAMS *pParams); - -static inline NV_STATUS dispobjCtrlCmdGetPiorSeqCtl_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_PIOR_SEQ_CTL_PARAMS *pParams) { - return pDispObject->__dispobjCtrlCmdGetPiorSeqCtl__(pDispObject, pParams); -} - -NV_STATUS dispobjCtrlCmdSetPiorSeqCtl_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_PARAMS *pParams); - -static inline NV_STATUS dispobjCtrlCmdSetPiorSeqCtl_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_CMD_SET_PIOR_SEQ_CTL_PARAMS *pParams) { - return pDispObject->__dispobjCtrlCmdSetPiorSeqCtl__(pDispObject, pParams); -} - -NV_STATUS dispobjCtrlCmdGetPiorOpMode_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_PIOR_OP_MODE_PARAMS *pParams); - static inline NV_STATUS dispobjCtrlCmdGetPiorOpMode_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_PIOR_OP_MODE_PARAMS *pParams) { return pDispObject->__dispobjCtrlCmdGetPiorOpMode__(pDispObject, pParams); } -NV_STATUS dispobjCtrlCmdSetPiorOpMode_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_SET_PIOR_OP_MODE_PARAMS *pParams); - static inline NV_STATUS dispobjCtrlCmdSetPiorOpMode_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_CMD_SET_PIOR_OP_MODE_PARAMS *pParams) { return pDispObject->__dispobjCtrlCmdSetPiorOpMode__(pDispObject, pParams); } -NV_STATUS dispobjCtrlCmdEventSetMemoryNotifies_IMPL(struct DispObject *pDispObject, NV5070_CTRL_EVENT_SET_MEMORY_NOTIFIES_PARAMS *pSetMemoryNotifiesParams); - static inline NV_STATUS dispobjCtrlCmdEventSetMemoryNotifies_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_EVENT_SET_MEMORY_NOTIFIES_PARAMS *pSetMemoryNotifiesParams) { return pDispObject->__dispobjCtrlCmdEventSetMemoryNotifies__(pDispObject, pSetMemoryNotifiesParams); } -NV_STATUS dispobjCtrlCmdSetRmFreeFlags_IMPL(struct DispObject *pDispObject, NV5070_CTRL_SET_RMFREE_FLAGS_PARAMS *pParams); - static inline NV_STATUS dispobjCtrlCmdSetRmFreeFlags_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_SET_RMFREE_FLAGS_PARAMS *pParams) { return pDispObject->__dispobjCtrlCmdSetRmFreeFlags__(pDispObject, pParams); } -NV_STATUS dispobjCtrlCmdIMPSetGetParameter_IMPL(struct DispObject *pDispObject, NV5070_CTRL_IMP_SET_GET_PARAMETER_PARAMS *pImpSetGetParams); - static inline NV_STATUS dispobjCtrlCmdIMPSetGetParameter_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_IMP_SET_GET_PARAMETER_PARAMS *pImpSetGetParams) { return pDispObject->__dispobjCtrlCmdIMPSetGetParameter__(pDispObject, pImpSetGetParams); } -NV_STATUS dispobjCtrlCmdGetRgStatus_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_RG_STATUS_PARAMS *pParams); - static inline NV_STATUS dispobjCtrlCmdGetRgStatus_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_RG_STATUS_PARAMS *pParams) { return pDispObject->__dispobjCtrlCmdGetRgStatus__(pDispObject, pParams); } -NV_STATUS dispobjCtrlCmdGetRgUnderflowProp_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_RG_UNDERFLOW_PROP_PARAMS *pParams); - static inline NV_STATUS dispobjCtrlCmdGetRgUnderflowProp_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_RG_UNDERFLOW_PROP_PARAMS *pParams) { return pDispObject->__dispobjCtrlCmdGetRgUnderflowProp__(pDispObject, pParams); } -NV_STATUS dispobjCtrlCmdSetRgUnderflowProp_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_SET_RG_UNDERFLOW_PROP_PARAMS *pParams); - static inline NV_STATUS dispobjCtrlCmdSetRgUnderflowProp_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_CMD_SET_RG_UNDERFLOW_PROP_PARAMS *pParams) { return pDispObject->__dispobjCtrlCmdSetRgUnderflowProp__(pDispObject, pParams); } -NV_STATUS dispobjCtrlCmdGetRgFliplockProp_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_RG_FLIPLOCK_PROP_PARAMS *pParams); - static inline NV_STATUS dispobjCtrlCmdGetRgFliplockProp_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_RG_FLIPLOCK_PROP_PARAMS *pParams) { return pDispObject->__dispobjCtrlCmdGetRgFliplockProp__(pDispObject, pParams); } -NV_STATUS dispobjCtrlCmdSetRgFliplockProp_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_SET_RG_FLIPLOCK_PROP_PARAMS *pParams); - static inline NV_STATUS dispobjCtrlCmdSetRgFliplockProp_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_CMD_SET_RG_FLIPLOCK_PROP_PARAMS *pParams) { return pDispObject->__dispobjCtrlCmdSetRgFliplockProp__(pDispObject, pParams); } -NV_STATUS dispobjCtrlCmdGetRgConnectedLockpinStateless_IMPL(struct DispObject *pDispObject, NV5070_CTRL_GET_RG_CONNECTED_LOCKPIN_STATELESS_PARAMS *pParams); - static inline NV_STATUS dispobjCtrlCmdGetRgConnectedLockpinStateless_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_GET_RG_CONNECTED_LOCKPIN_STATELESS_PARAMS *pParams) { return pDispObject->__dispobjCtrlCmdGetRgConnectedLockpinStateless__(pDispObject, pParams); } -NV_STATUS dispobjCtrlCmdGetRgScanLine_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_RG_SCAN_LINE_PARAMS *pParams); - static inline NV_STATUS dispobjCtrlCmdGetRgScanLine_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_RG_SCAN_LINE_PARAMS *pParams) { return pDispObject->__dispobjCtrlCmdGetRgScanLine__(pDispObject, pParams); } -NV_STATUS dispobjCtrlCmdGetSorSeqCtl_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_PARAMS *pParams); - -static inline NV_STATUS dispobjCtrlCmdGetSorSeqCtl_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_SOR_SEQ_CTL_PARAMS *pParams) { - return pDispObject->__dispobjCtrlCmdGetSorSeqCtl__(pDispObject, pParams); +static inline NV_STATUS dispobjCtrlCmdGetSorPwm_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_SOR_PWM_PARAMS *pParams) { + return pDispObject->__dispobjCtrlCmdGetSorPwm__(pDispObject, pParams); } -NV_STATUS dispobjCtrlCmdSetSorSeqCtl_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_PARAMS *pParams); +static inline NV_STATUS dispobjCtrlCmdSetSorPwm_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_CMD_SET_SOR_PWM_PARAMS *pParams) { + return pDispObject->__dispobjCtrlCmdSetSorPwm__(pDispObject, pParams); +} -static inline NV_STATUS dispobjCtrlCmdSetSorSeqCtl_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_CMD_SET_SOR_SEQ_CTL_PARAMS *pParams) { - return pDispObject->__dispobjCtrlCmdSetSorSeqCtl__(pDispObject, pParams); +static inline NV_STATUS dispobjCtrlCmdGetSorOpMode_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_SOR_OP_MODE_PARAMS *pParams) { + return pDispObject->__dispobjCtrlCmdGetSorOpMode__(pDispObject, pParams); } -NV_STATUS dispobjCtrlCmdSeqProgSpeed_IMPL(struct DispObject *pDispObject, NV5070_CTRL_SEQ_PROG_SPEED_PARAMS *pParams); - -static inline NV_STATUS dispobjCtrlCmdSeqProgSpeed_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_SEQ_PROG_SPEED_PARAMS *pParams) { - return pDispObject->__dispobjCtrlCmdSeqProgSpeed__(pDispObject, pParams); -} - -NV_STATUS dispobjCtrlCmdGetSorPwm_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_SOR_PWM_PARAMS *pParams); - -static inline NV_STATUS dispobjCtrlCmdGetSorPwm_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_SOR_PWM_PARAMS *pParams) { - return pDispObject->__dispobjCtrlCmdGetSorPwm__(pDispObject, pParams); -} - -NV_STATUS dispobjCtrlCmdSetSorPwm_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_SET_SOR_PWM_PARAMS *pParams); - -static inline NV_STATUS dispobjCtrlCmdSetSorPwm_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_CMD_SET_SOR_PWM_PARAMS *pParams) { - return pDispObject->__dispobjCtrlCmdSetSorPwm__(pDispObject, pParams); -} - -NV_STATUS dispobjCtrlCmdGetSorOpMode_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_SOR_OP_MODE_PARAMS *pParams); - -static inline NV_STATUS dispobjCtrlCmdGetSorOpMode_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_SOR_OP_MODE_PARAMS *pParams) { - return pDispObject->__dispobjCtrlCmdGetSorOpMode__(pDispObject, pParams); -} - -NV_STATUS dispobjCtrlCmdSetSorOpMode_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_SET_SOR_OP_MODE_PARAMS *pParams); - static inline NV_STATUS dispobjCtrlCmdSetSorOpMode_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_CMD_SET_SOR_OP_MODE_PARAMS *pParams) { return pDispObject->__dispobjCtrlCmdSetSorOpMode__(pDispObject, pParams); } -NV_STATUS dispobjCtrlCmdSetSorFlushMode_IMPL(struct DispObject *pDispObject, NV5070_CTRL_SET_SOR_FLUSH_MODE_PARAMS *pParams); - static inline NV_STATUS dispobjCtrlCmdSetSorFlushMode_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_SET_SOR_FLUSH_MODE_PARAMS *pParams) { return pDispObject->__dispobjCtrlCmdSetSorFlushMode__(pDispObject, pParams); } -NV_STATUS dispobjCtrlCmdSystemGetCapsV2_IMPL(struct DispObject *pDispObject, NV5070_CTRL_SYSTEM_GET_CAPS_V2_PARAMS *pCapsParams); - static inline NV_STATUS dispobjCtrlCmdSystemGetCapsV2_DISPATCH(struct DispObject *pDispObject, NV5070_CTRL_SYSTEM_GET_CAPS_V2_PARAMS *pCapsParams) { return pDispObject->__dispobjCtrlCmdSystemGetCapsV2__(pDispObject, pCapsParams); } -NV_STATUS dispobjCtrlCmdEventSetTrigger_IMPL(struct DispObject *pDispObject); - static inline NV_STATUS dispobjCtrlCmdEventSetTrigger_DISPATCH(struct DispObject *pDispObject) { return pDispObject->__dispobjCtrlCmdEventSetTrigger__(pDispObject); } -static inline NvBool dispobjShareCallback_DISPATCH(struct DispObject *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__dispobjShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS dispobjControl_DISPATCH(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pDisplayApi->__dispobjControl__(pDisplayApi, pCallContext, pParams); } -static inline NV_STATUS dispobjCheckMemInterUnmap_DISPATCH(struct DispObject *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__dispobjCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS dispobjControl_Prologue_DISPATCH(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { + return pDisplayApi->__dispobjControl_Prologue__(pDisplayApi, pCallContext, pRsParams); } -static inline NV_STATUS dispobjMapTo_DISPATCH(struct DispObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dispobjMapTo__(pResource, pParams); +static inline void dispobjControl_Epilogue_DISPATCH(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { + pDisplayApi->__dispobjControl_Epilogue__(pDisplayApi, pCallContext, pRsParams); } static inline NvBool dispobjAccessCallback_DISPATCH(struct DispObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return pResource->__dispobjAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline void dispobjSetNotificationShare_DISPATCH(struct DispObject *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__dispobjSetNotificationShare__(pNotifier, pNotifShare); -} - -static inline NvU32 dispobjGetRefCount_DISPATCH(struct DispObject *pResource) { - return pResource->__dispobjGetRefCount__(pResource); +static inline NvBool dispobjShareCallback_DISPATCH(struct DispObject *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__dispobjShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline void dispobjAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispObject *pResource, RsResourceRef *pReference) { - pResource->__dispobjAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS dispobjGetMemInterMapParams_DISPATCH(struct DispObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__dispobjGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS dispobjControl_Prologue_DISPATCH(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - return pDisplayApi->__dispobjControl_Prologue__(pDisplayApi, pCallContext, pRsParams); +static inline NV_STATUS dispobjCheckMemInterUnmap_DISPATCH(struct DispObject *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__dispobjCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS dispobjUnmapFrom_DISPATCH(struct DispObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dispobjUnmapFrom__(pResource, pParams); +static inline NV_STATUS dispobjGetMemoryMappingDescriptor_DISPATCH(struct DispObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__dispobjGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline void dispobjControl_Epilogue_DISPATCH(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - pDisplayApi->__dispobjControl_Epilogue__(pDisplayApi, pCallContext, pRsParams); +static inline NV_STATUS dispobjControlSerialization_Prologue_DISPATCH(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dispobjControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispobjControl_DISPATCH(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pDisplayApi->__dispobjControl__(pDisplayApi, pCallContext, pParams); +static inline void dispobjControlSerialization_Epilogue_DISPATCH(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__dispobjControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispobjUnmap_DISPATCH(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__dispobjUnmap__(pResource, pCallContext, pCpuMapping); +static inline NvBool dispobjCanCopy_DISPATCH(struct DispObject *pResource) { + return pResource->__dispobjCanCopy__(pResource); } -static inline NV_STATUS dispobjGetMemInterMapParams_DISPATCH(struct DispObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dispobjGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS dispobjIsDuplicate_DISPATCH(struct DispObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__dispobjIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS dispobjGetMemoryMappingDescriptor_DISPATCH(struct DispObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__dispobjGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void dispobjPreDestruct_DISPATCH(struct DispObject *pResource) { + pResource->__dispobjPreDestruct__(pResource); } static inline NV_STATUS dispobjControlFilter_DISPATCH(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__dispobjControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispobjUnregisterEvent_DISPATCH(struct DispObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__dispobjUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static inline NV_STATUS dispobjControlSerialization_Prologue_DISPATCH(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispobjControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS dispobjMap_DISPATCH(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__dispobjMap__(pResource, pCallContext, pParams, pCpuMapping); } -static inline NvBool dispobjCanCopy_DISPATCH(struct DispObject *pResource) { - return pResource->__dispobjCanCopy__(pResource); +static inline NV_STATUS dispobjUnmap_DISPATCH(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pResource->__dispobjUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool dispobjIsPartialUnmapSupported_DISPATCH(struct DispObject *pResource) { return pResource->__dispobjIsPartialUnmapSupported__(pResource); } -static inline void dispobjPreDestruct_DISPATCH(struct DispObject *pResource) { - pResource->__dispobjPreDestruct__(pResource); +static inline NV_STATUS dispobjMapTo_DISPATCH(struct DispObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__dispobjMapTo__(pResource, pParams); } -static inline NV_STATUS dispobjIsDuplicate_DISPATCH(struct DispObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dispobjIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS dispobjUnmapFrom_DISPATCH(struct DispObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__dispobjUnmapFrom__(pResource, pParams); } -static inline void dispobjControlSerialization_Epilogue_DISPATCH(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispobjControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 dispobjGetRefCount_DISPATCH(struct DispObject *pResource) { + return pResource->__dispobjGetRefCount__(pResource); +} + +static inline void dispobjAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispObject *pResource, RsResourceRef *pReference) { + pResource->__dispobjAddAdditionalDependants__(pClient, pResource, pReference); } -static inline PEVENTNOTIFICATION *dispobjGetNotificationListPtr_DISPATCH(struct DispObject *pNotifier) { +static inline PEVENTNOTIFICATION * dispobjGetNotificationListPtr_DISPATCH(struct DispObject *pNotifier) { return pNotifier->__dispobjGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *dispobjGetNotificationShare_DISPATCH(struct DispObject *pNotifier) { +static inline struct NotifShare * dispobjGetNotificationShare_DISPATCH(struct DispObject *pNotifier) { return pNotifier->__dispobjGetNotificationShare__(pNotifier); } -static inline NV_STATUS dispobjMap_DISPATCH(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__dispobjMap__(pResource, pCallContext, pParams, pCpuMapping); +static inline void dispobjSetNotificationShare_DISPATCH(struct DispObject *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__dispobjSetNotificationShare__(pNotifier, pNotifShare); +} + +static inline NV_STATUS dispobjUnregisterEvent_DISPATCH(struct DispObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__dispobjUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS dispobjGetOrAllocNotifShare_DISPATCH(struct DispObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return pNotifier->__dispobjGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } +NV_STATUS dispobjConstructHal_IMPL(struct DispObject *pDispObject, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); + + +#ifdef __nvoc_disp_objs_h_disabled +static inline NV_STATUS dispobjConstructHal(struct DispObject *pDispObject, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + NV_ASSERT_FAILED_PRECOMP("DispObject was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_disp_objs_h_disabled +#define dispobjConstructHal(pDispObject, pCallContext, pParams) dispobjConstructHal_IMPL(pDispObject, pCallContext, pParams) +#endif //__nvoc_disp_objs_h_disabled + +#define dispobjConstructHal_HAL(pDispObject, pCallContext, pParams) dispobjConstructHal(pDispObject, pCallContext, pParams) + +NV_STATUS dispobjCtrlCmdGetPinsetCount_IMPL(struct DispObject *pDispObject, NV5070_CTRL_GET_PINSET_COUNT_PARAMS *pParams); + +NV_STATUS dispobjCtrlCmdGetPinsetPeer_IMPL(struct DispObject *pDispObject, NV5070_CTRL_GET_PINSET_PEER_PARAMS *pParams); + +NV_STATUS dispobjCtrlCmdSetMempoolWARForBlitTearing_IMPL(struct DispObject *pDispObject, NV5070_CTRL_SET_MEMPOOL_WAR_FOR_BLIT_TEARING_PARAMS *pParams); + +NV_STATUS dispobjCtrlCmdGetPinsetLockpins_IMPL(struct DispObject *pDispObject, NV5070_CTRL_GET_PINSET_LOCKPINS_PARAMS *pParams); + +NV_STATUS dispobjCtrlCmdGetFrameLockHeaderLockPins_IMPL(struct DispObject *pDispObject, NV5070_CTRL_GET_FRAMELOCK_HEADER_LOCKPINS_PARAMS *pParams); + +NV_STATUS dispobjCtrlCmdGetPiorOpMode_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_PIOR_OP_MODE_PARAMS *pParams); + +NV_STATUS dispobjCtrlCmdSetPiorOpMode_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_SET_PIOR_OP_MODE_PARAMS *pParams); + +NV_STATUS dispobjCtrlCmdEventSetMemoryNotifies_IMPL(struct DispObject *pDispObject, NV5070_CTRL_EVENT_SET_MEMORY_NOTIFIES_PARAMS *pSetMemoryNotifiesParams); + +NV_STATUS dispobjCtrlCmdSetRmFreeFlags_IMPL(struct DispObject *pDispObject, NV5070_CTRL_SET_RMFREE_FLAGS_PARAMS *pParams); + +NV_STATUS dispobjCtrlCmdIMPSetGetParameter_IMPL(struct DispObject *pDispObject, NV5070_CTRL_IMP_SET_GET_PARAMETER_PARAMS *pImpSetGetParams); + +NV_STATUS dispobjCtrlCmdGetRgStatus_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_RG_STATUS_PARAMS *pParams); + +NV_STATUS dispobjCtrlCmdGetRgUnderflowProp_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_RG_UNDERFLOW_PROP_PARAMS *pParams); + +NV_STATUS dispobjCtrlCmdSetRgUnderflowProp_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_SET_RG_UNDERFLOW_PROP_PARAMS *pParams); + +NV_STATUS dispobjCtrlCmdGetRgFliplockProp_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_RG_FLIPLOCK_PROP_PARAMS *pParams); + +NV_STATUS dispobjCtrlCmdSetRgFliplockProp_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_SET_RG_FLIPLOCK_PROP_PARAMS *pParams); + +NV_STATUS dispobjCtrlCmdGetRgConnectedLockpinStateless_IMPL(struct DispObject *pDispObject, NV5070_CTRL_GET_RG_CONNECTED_LOCKPIN_STATELESS_PARAMS *pParams); + +NV_STATUS dispobjCtrlCmdGetRgScanLine_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_RG_SCAN_LINE_PARAMS *pParams); + +NV_STATUS dispobjCtrlCmdGetSorPwm_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_SOR_PWM_PARAMS *pParams); + +NV_STATUS dispobjCtrlCmdSetSorPwm_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_SET_SOR_PWM_PARAMS *pParams); + +NV_STATUS dispobjCtrlCmdGetSorOpMode_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_GET_SOR_OP_MODE_PARAMS *pParams); + +NV_STATUS dispobjCtrlCmdSetSorOpMode_IMPL(struct DispObject *pDispObject, NV5070_CTRL_CMD_SET_SOR_OP_MODE_PARAMS *pParams); + +NV_STATUS dispobjCtrlCmdSetSorFlushMode_IMPL(struct DispObject *pDispObject, NV5070_CTRL_SET_SOR_FLUSH_MODE_PARAMS *pParams); + +NV_STATUS dispobjCtrlCmdSystemGetCapsV2_IMPL(struct DispObject *pDispObject, NV5070_CTRL_SYSTEM_GET_CAPS_V2_PARAMS *pCapsParams); + +NV_STATUS dispobjCtrlCmdEventSetTrigger_IMPL(struct DispObject *pDispObject); + NV_STATUS dispobjConstruct_IMPL(struct DispObject *arg_pDispObject, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_dispobjConstruct(arg_pDispObject, arg_pCallContext, arg_pParams) dispobjConstruct_IMPL(arg_pDispObject, arg_pCallContext, arg_pParams) @@ -854,51 +928,60 @@ static inline NvBool dispobjGetRmFreeFlags(struct DispObject *pDispObject) { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct NvDispApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct DispObject __nvoc_base_DispObject; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct DisplayApi *__nvoc_pbase_DisplayApi; - struct DispObject *__nvoc_pbase_DispObject; - struct NvDispApi *__nvoc_pbase_NvDispApi; - NV_STATUS (*__nvdispapiCtrlCmdIdleChannel__)(struct NvDispApi *, NVC370_CTRL_IDLE_CHANNEL_PARAMS *); - NV_STATUS (*__nvdispapiCtrlCmdSetAccl__)(struct NvDispApi *, NVC370_CTRL_SET_ACCL_PARAMS *); - NV_STATUS (*__nvdispapiCtrlCmdGetAccl__)(struct NvDispApi *, NVC370_CTRL_GET_ACCL_PARAMS *); - NV_STATUS (*__nvdispapiCtrlCmdGetChannelInfo__)(struct NvDispApi *, NVC370_CTRL_CMD_GET_CHANNEL_INFO_PARAMS *); - NV_STATUS (*__nvdispapiCtrlCmdSetSwaprdyGpioWar__)(struct NvDispApi *, NVC370_CTRL_SET_SWAPRDY_GPIO_WAR_PARAMS *); - NV_STATUS (*__nvdispapiCtrlCmdGetLockpinsCaps__)(struct NvDispApi *, NVC370_CTRL_GET_LOCKPINS_CAPS_PARAMS *); - NV_STATUS (*__nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides__)(struct NvDispApi *, NVC370_CTRL_CMD_SET_FORCE_MODESWITCH_FLAGS_OVERRIDES_PARAMS *); - NvBool (*__nvdispapiShareCallback__)(struct NvDispApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__nvdispapiCheckMemInterUnmap__)(struct NvDispApi *, NvBool); - NV_STATUS (*__nvdispapiMapTo__)(struct NvDispApi *, RS_RES_MAP_TO_PARAMS *); - NvBool (*__nvdispapiAccessCallback__)(struct NvDispApi *, struct RsClient *, void *, RsAccessRight); - void (*__nvdispapiSetNotificationShare__)(struct NvDispApi *, struct NotifShare *); - NvU32 (*__nvdispapiGetRefCount__)(struct NvDispApi *); - void (*__nvdispapiAddAdditionalDependants__)(struct RsClient *, struct NvDispApi *, RsResourceRef *); - NV_STATUS (*__nvdispapiControl_Prologue__)(struct NvDispApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nvdispapiUnmapFrom__)(struct NvDispApi *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__nvdispapiControl_Epilogue__)(struct NvDispApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nvdispapiControl__)(struct NvDispApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nvdispapiUnmap__)(struct NvDispApi *, struct CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__nvdispapiGetMemInterMapParams__)(struct NvDispApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__nvdispapiGetMemoryMappingDescriptor__)(struct NvDispApi *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__nvdispapiControlFilter__)(struct NvDispApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nvdispapiUnregisterEvent__)(struct NvDispApi *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__nvdispapiControlSerialization_Prologue__)(struct NvDispApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__nvdispapiCanCopy__)(struct NvDispApi *); - NvBool (*__nvdispapiIsPartialUnmapSupported__)(struct NvDispApi *); - void (*__nvdispapiPreDestruct__)(struct NvDispApi *); - NV_STATUS (*__nvdispapiIsDuplicate__)(struct NvDispApi *, NvHandle, NvBool *); - void (*__nvdispapiControlSerialization_Epilogue__)(struct NvDispApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__nvdispapiGetNotificationListPtr__)(struct NvDispApi *); - struct NotifShare *(*__nvdispapiGetNotificationShare__)(struct NvDispApi *); - NV_STATUS (*__nvdispapiMap__)(struct NvDispApi *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NV_STATUS (*__nvdispapiGetOrAllocNotifShare__)(struct NvDispApi *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct INotifier *__nvoc_pbase_INotifier; // inotify super^4 + struct Notifier *__nvoc_pbase_Notifier; // notify super^3 + struct DisplayApi *__nvoc_pbase_DisplayApi; // dispapi super^2 + struct DispObject *__nvoc_pbase_DispObject; // dispobj super + struct NvDispApi *__nvoc_pbase_NvDispApi; // nvdispapi + + // Vtable with 33 per-object function pointers + NV_STATUS (*__nvdispapiCtrlCmdIdleChannel__)(struct NvDispApi * /*this*/, NVC370_CTRL_IDLE_CHANNEL_PARAMS *); // exported (id=0xc3700101) + NV_STATUS (*__nvdispapiCtrlCmdSetAccl__)(struct NvDispApi * /*this*/, NVC370_CTRL_SET_ACCL_PARAMS *); // exported (id=0xc3700102) + NV_STATUS (*__nvdispapiCtrlCmdGetAccl__)(struct NvDispApi * /*this*/, NVC370_CTRL_GET_ACCL_PARAMS *); // exported (id=0xc3700103) + NV_STATUS (*__nvdispapiCtrlCmdGetChannelInfo__)(struct NvDispApi * /*this*/, NVC370_CTRL_CMD_GET_CHANNEL_INFO_PARAMS *); // exported (id=0xc3700104) + NV_STATUS (*__nvdispapiCtrlCmdSetSwaprdyGpioWar__)(struct NvDispApi * /*this*/, NVC370_CTRL_SET_SWAPRDY_GPIO_WAR_PARAMS *); // exported (id=0xc3700202) + NV_STATUS (*__nvdispapiCtrlCmdGetLockpinsCaps__)(struct NvDispApi * /*this*/, NVC370_CTRL_GET_LOCKPINS_CAPS_PARAMS *); // exported (id=0xc3700201) + NV_STATUS (*__nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides__)(struct NvDispApi * /*this*/, NVC370_CTRL_CMD_SET_FORCE_MODESWITCH_FLAGS_OVERRIDES_PARAMS *); // exported (id=0xc3700602) + NV_STATUS (*__nvdispapiControl__)(struct NvDispApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispobj) + NV_STATUS (*__nvdispapiControl_Prologue__)(struct NvDispApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispobj) + void (*__nvdispapiControl_Epilogue__)(struct NvDispApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispobj) + NvBool (*__nvdispapiAccessCallback__)(struct NvDispApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (dispobj) + NvBool (*__nvdispapiShareCallback__)(struct NvDispApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (dispobj) + NV_STATUS (*__nvdispapiGetMemInterMapParams__)(struct NvDispApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (dispobj) + NV_STATUS (*__nvdispapiCheckMemInterUnmap__)(struct NvDispApi * /*this*/, NvBool); // virtual inherited (rmres) base (dispobj) + NV_STATUS (*__nvdispapiGetMemoryMappingDescriptor__)(struct NvDispApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (dispobj) + NV_STATUS (*__nvdispapiControlSerialization_Prologue__)(struct NvDispApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (dispobj) + void (*__nvdispapiControlSerialization_Epilogue__)(struct NvDispApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (dispobj) + NvBool (*__nvdispapiCanCopy__)(struct NvDispApi * /*this*/); // virtual inherited (res) base (dispobj) + NV_STATUS (*__nvdispapiIsDuplicate__)(struct NvDispApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (dispobj) + void (*__nvdispapiPreDestruct__)(struct NvDispApi * /*this*/); // virtual inherited (res) base (dispobj) + NV_STATUS (*__nvdispapiControlFilter__)(struct NvDispApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (dispobj) + NV_STATUS (*__nvdispapiMap__)(struct NvDispApi * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (dispobj) + NV_STATUS (*__nvdispapiUnmap__)(struct NvDispApi * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (dispobj) + NvBool (*__nvdispapiIsPartialUnmapSupported__)(struct NvDispApi * /*this*/); // inline virtual inherited (res) base (dispobj) body + NV_STATUS (*__nvdispapiMapTo__)(struct NvDispApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (dispobj) + NV_STATUS (*__nvdispapiUnmapFrom__)(struct NvDispApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (dispobj) + NvU32 (*__nvdispapiGetRefCount__)(struct NvDispApi * /*this*/); // virtual inherited (res) base (dispobj) + void (*__nvdispapiAddAdditionalDependants__)(struct RsClient *, struct NvDispApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (dispobj) + PEVENTNOTIFICATION * (*__nvdispapiGetNotificationListPtr__)(struct NvDispApi * /*this*/); // virtual inherited (notify) base (dispobj) + struct NotifShare * (*__nvdispapiGetNotificationShare__)(struct NvDispApi * /*this*/); // virtual inherited (notify) base (dispobj) + void (*__nvdispapiSetNotificationShare__)(struct NvDispApi * /*this*/, struct NotifShare *); // virtual inherited (notify) base (dispobj) + NV_STATUS (*__nvdispapiUnregisterEvent__)(struct NvDispApi * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (dispobj) + NV_STATUS (*__nvdispapiGetOrAllocNotifShare__)(struct NvDispApi * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (dispobj) }; #ifndef __NVOC_CLASS_NvDispApi_TYPEDEF__ @@ -910,6 +993,7 @@ typedef struct NvDispApi NvDispApi; #define __nvoc_class_id_NvDispApi 0x36aa0b #endif /* __nvoc_class_id_NvDispApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_NvDispApi; #define __staticCast_NvDispApi(pThis) \ @@ -922,192 +1006,228 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_NvDispApi; ((NvDispApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(NvDispApi))) #endif //__nvoc_disp_objs_h_disabled - NV_STATUS __nvoc_objCreateDynamic_NvDispApi(NvDispApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_NvDispApi(NvDispApi**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_NvDispApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_NvDispApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define nvdispapiCtrlCmdIdleChannel_FNPTR(pNvDispApi) pNvDispApi->__nvdispapiCtrlCmdIdleChannel__ #define nvdispapiCtrlCmdIdleChannel(pNvDispApi, pParams) nvdispapiCtrlCmdIdleChannel_DISPATCH(pNvDispApi, pParams) +#define nvdispapiCtrlCmdSetAccl_FNPTR(pNvDispApi) pNvDispApi->__nvdispapiCtrlCmdSetAccl__ #define nvdispapiCtrlCmdSetAccl(pNvDispApi, pParams) nvdispapiCtrlCmdSetAccl_DISPATCH(pNvDispApi, pParams) +#define nvdispapiCtrlCmdGetAccl_FNPTR(pNvDispApi) pNvDispApi->__nvdispapiCtrlCmdGetAccl__ #define nvdispapiCtrlCmdGetAccl(pNvDispApi, pParams) nvdispapiCtrlCmdGetAccl_DISPATCH(pNvDispApi, pParams) +#define nvdispapiCtrlCmdGetChannelInfo_FNPTR(pNvDispApi) pNvDispApi->__nvdispapiCtrlCmdGetChannelInfo__ #define nvdispapiCtrlCmdGetChannelInfo(pNvDispApi, pParams) nvdispapiCtrlCmdGetChannelInfo_DISPATCH(pNvDispApi, pParams) +#define nvdispapiCtrlCmdSetSwaprdyGpioWar_FNPTR(pNvDispApi) pNvDispApi->__nvdispapiCtrlCmdSetSwaprdyGpioWar__ #define nvdispapiCtrlCmdSetSwaprdyGpioWar(pNvDispApi, pParams) nvdispapiCtrlCmdSetSwaprdyGpioWar_DISPATCH(pNvDispApi, pParams) +#define nvdispapiCtrlCmdGetLockpinsCaps_FNPTR(pNvDispApi) pNvDispApi->__nvdispapiCtrlCmdGetLockpinsCaps__ #define nvdispapiCtrlCmdGetLockpinsCaps(pNvDispApi, pParams) nvdispapiCtrlCmdGetLockpinsCaps_DISPATCH(pNvDispApi, pParams) +#define nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides_FNPTR(pNvDispApi) pNvDispApi->__nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides__ #define nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides(pNvDispApi, pParams) nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides_DISPATCH(pNvDispApi, pParams) -#define nvdispapiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) nvdispapiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define nvdispapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) nvdispapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define nvdispapiMapTo(pResource, pParams) nvdispapiMapTo_DISPATCH(pResource, pParams) -#define nvdispapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) nvdispapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define nvdispapiSetNotificationShare(pNotifier, pNotifShare) nvdispapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define nvdispapiGetRefCount(pResource) nvdispapiGetRefCount_DISPATCH(pResource) -#define nvdispapiAddAdditionalDependants(pClient, pResource, pReference) nvdispapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define nvdispapiControl_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__dispapiControl__ +#define nvdispapiControl(pDisplayApi, pCallContext, pParams) nvdispapiControl_DISPATCH(pDisplayApi, pCallContext, pParams) +#define nvdispapiControl_Prologue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__dispapiControl_Prologue__ #define nvdispapiControl_Prologue(pDisplayApi, pCallContext, pRsParams) nvdispapiControl_Prologue_DISPATCH(pDisplayApi, pCallContext, pRsParams) -#define nvdispapiUnmapFrom(pResource, pParams) nvdispapiUnmapFrom_DISPATCH(pResource, pParams) +#define nvdispapiControl_Epilogue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__dispapiControl_Epilogue__ #define nvdispapiControl_Epilogue(pDisplayApi, pCallContext, pRsParams) nvdispapiControl_Epilogue_DISPATCH(pDisplayApi, pCallContext, pRsParams) -#define nvdispapiControl(pDisplayApi, pCallContext, pParams) nvdispapiControl_DISPATCH(pDisplayApi, pCallContext, pParams) -#define nvdispapiUnmap(pResource, pCallContext, pCpuMapping) nvdispapiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define nvdispapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresAccessCallback__ +#define nvdispapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) nvdispapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define nvdispapiShareCallback_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresShareCallback__ +#define nvdispapiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) nvdispapiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define nvdispapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define nvdispapiGetMemInterMapParams(pRmResource, pParams) nvdispapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define nvdispapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define nvdispapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) nvdispapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define nvdispapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define nvdispapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) nvdispapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define nvdispapiControlFilter(pResource, pCallContext, pParams) nvdispapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define nvdispapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) nvdispapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define nvdispapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define nvdispapiControlSerialization_Prologue(pResource, pCallContext, pParams) nvdispapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define nvdispapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define nvdispapiControlSerialization_Epilogue(pResource, pCallContext, pParams) nvdispapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define nvdispapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define nvdispapiCanCopy(pResource) nvdispapiCanCopy_DISPATCH(pResource) -#define nvdispapiIsPartialUnmapSupported(pResource) nvdispapiIsPartialUnmapSupported_DISPATCH(pResource) -#define nvdispapiPreDestruct(pResource) nvdispapiPreDestruct_DISPATCH(pResource) +#define nvdispapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define nvdispapiIsDuplicate(pResource, hMemory, pDuplicate) nvdispapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define nvdispapiControlSerialization_Epilogue(pResource, pCallContext, pParams) nvdispapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define nvdispapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define nvdispapiPreDestruct(pResource) nvdispapiPreDestruct_DISPATCH(pResource) +#define nvdispapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define nvdispapiControlFilter(pResource, pCallContext, pParams) nvdispapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define nvdispapiMap_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define nvdispapiMap(pResource, pCallContext, pParams, pCpuMapping) nvdispapiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define nvdispapiUnmap_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define nvdispapiUnmap(pResource, pCallContext, pCpuMapping) nvdispapiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define nvdispapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define nvdispapiIsPartialUnmapSupported(pResource) nvdispapiIsPartialUnmapSupported_DISPATCH(pResource) +#define nvdispapiMapTo_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define nvdispapiMapTo(pResource, pParams) nvdispapiMapTo_DISPATCH(pResource, pParams) +#define nvdispapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define nvdispapiUnmapFrom(pResource, pParams) nvdispapiUnmapFrom_DISPATCH(pResource, pParams) +#define nvdispapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define nvdispapiGetRefCount(pResource) nvdispapiGetRefCount_DISPATCH(pResource) +#define nvdispapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define nvdispapiAddAdditionalDependants(pClient, pResource, pReference) nvdispapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define nvdispapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define nvdispapiGetNotificationListPtr(pNotifier) nvdispapiGetNotificationListPtr_DISPATCH(pNotifier) +#define nvdispapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetNotificationShare__ #define nvdispapiGetNotificationShare(pNotifier) nvdispapiGetNotificationShare_DISPATCH(pNotifier) -#define nvdispapiMap(pResource, pCallContext, pParams, pCpuMapping) nvdispapiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define nvdispapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define nvdispapiSetNotificationShare(pNotifier, pNotifShare) nvdispapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define nvdispapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define nvdispapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) nvdispapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define nvdispapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ #define nvdispapiGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) nvdispapiGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -NV_STATUS nvdispapiCtrlCmdIdleChannel_IMPL(struct NvDispApi *pNvDispApi, NVC370_CTRL_IDLE_CHANNEL_PARAMS *pParams); +// Dispatch functions static inline NV_STATUS nvdispapiCtrlCmdIdleChannel_DISPATCH(struct NvDispApi *pNvDispApi, NVC370_CTRL_IDLE_CHANNEL_PARAMS *pParams) { return pNvDispApi->__nvdispapiCtrlCmdIdleChannel__(pNvDispApi, pParams); } -NV_STATUS nvdispapiCtrlCmdSetAccl_IMPL(struct NvDispApi *pNvDispApi, NVC370_CTRL_SET_ACCL_PARAMS *pParams); - static inline NV_STATUS nvdispapiCtrlCmdSetAccl_DISPATCH(struct NvDispApi *pNvDispApi, NVC370_CTRL_SET_ACCL_PARAMS *pParams) { return pNvDispApi->__nvdispapiCtrlCmdSetAccl__(pNvDispApi, pParams); } -NV_STATUS nvdispapiCtrlCmdGetAccl_IMPL(struct NvDispApi *pNvDispApi, NVC370_CTRL_GET_ACCL_PARAMS *pParams); - static inline NV_STATUS nvdispapiCtrlCmdGetAccl_DISPATCH(struct NvDispApi *pNvDispApi, NVC370_CTRL_GET_ACCL_PARAMS *pParams) { return pNvDispApi->__nvdispapiCtrlCmdGetAccl__(pNvDispApi, pParams); } -NV_STATUS nvdispapiCtrlCmdGetChannelInfo_IMPL(struct NvDispApi *pNvDispApi, NVC370_CTRL_CMD_GET_CHANNEL_INFO_PARAMS *pParams); - static inline NV_STATUS nvdispapiCtrlCmdGetChannelInfo_DISPATCH(struct NvDispApi *pNvDispApi, NVC370_CTRL_CMD_GET_CHANNEL_INFO_PARAMS *pParams) { return pNvDispApi->__nvdispapiCtrlCmdGetChannelInfo__(pNvDispApi, pParams); } -NV_STATUS nvdispapiCtrlCmdSetSwaprdyGpioWar_IMPL(struct NvDispApi *pNvDispApi, NVC370_CTRL_SET_SWAPRDY_GPIO_WAR_PARAMS *pParams); - static inline NV_STATUS nvdispapiCtrlCmdSetSwaprdyGpioWar_DISPATCH(struct NvDispApi *pNvDispApi, NVC370_CTRL_SET_SWAPRDY_GPIO_WAR_PARAMS *pParams) { return pNvDispApi->__nvdispapiCtrlCmdSetSwaprdyGpioWar__(pNvDispApi, pParams); } -NV_STATUS nvdispapiCtrlCmdGetLockpinsCaps_IMPL(struct NvDispApi *pNvDispApi, NVC370_CTRL_GET_LOCKPINS_CAPS_PARAMS *pParams); - static inline NV_STATUS nvdispapiCtrlCmdGetLockpinsCaps_DISPATCH(struct NvDispApi *pNvDispApi, NVC370_CTRL_GET_LOCKPINS_CAPS_PARAMS *pParams) { return pNvDispApi->__nvdispapiCtrlCmdGetLockpinsCaps__(pNvDispApi, pParams); } -NV_STATUS nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides_IMPL(struct NvDispApi *pNvDispApi, NVC370_CTRL_CMD_SET_FORCE_MODESWITCH_FLAGS_OVERRIDES_PARAMS *pParams); - static inline NV_STATUS nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides_DISPATCH(struct NvDispApi *pNvDispApi, NVC370_CTRL_CMD_SET_FORCE_MODESWITCH_FLAGS_OVERRIDES_PARAMS *pParams) { return pNvDispApi->__nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides__(pNvDispApi, pParams); } -static inline NvBool nvdispapiShareCallback_DISPATCH(struct NvDispApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__nvdispapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS nvdispapiControl_DISPATCH(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pDisplayApi->__nvdispapiControl__(pDisplayApi, pCallContext, pParams); } -static inline NV_STATUS nvdispapiCheckMemInterUnmap_DISPATCH(struct NvDispApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__nvdispapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS nvdispapiControl_Prologue_DISPATCH(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { + return pDisplayApi->__nvdispapiControl_Prologue__(pDisplayApi, pCallContext, pRsParams); } -static inline NV_STATUS nvdispapiMapTo_DISPATCH(struct NvDispApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__nvdispapiMapTo__(pResource, pParams); +static inline void nvdispapiControl_Epilogue_DISPATCH(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { + pDisplayApi->__nvdispapiControl_Epilogue__(pDisplayApi, pCallContext, pRsParams); } static inline NvBool nvdispapiAccessCallback_DISPATCH(struct NvDispApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return pResource->__nvdispapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline void nvdispapiSetNotificationShare_DISPATCH(struct NvDispApi *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__nvdispapiSetNotificationShare__(pNotifier, pNotifShare); +static inline NvBool nvdispapiShareCallback_DISPATCH(struct NvDispApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__nvdispapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline NvU32 nvdispapiGetRefCount_DISPATCH(struct NvDispApi *pResource) { - return pResource->__nvdispapiGetRefCount__(pResource); +static inline NV_STATUS nvdispapiGetMemInterMapParams_DISPATCH(struct NvDispApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__nvdispapiGetMemInterMapParams__(pRmResource, pParams); } -static inline void nvdispapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct NvDispApi *pResource, RsResourceRef *pReference) { - pResource->__nvdispapiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS nvdispapiCheckMemInterUnmap_DISPATCH(struct NvDispApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__nvdispapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS nvdispapiControl_Prologue_DISPATCH(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - return pDisplayApi->__nvdispapiControl_Prologue__(pDisplayApi, pCallContext, pRsParams); -} - -static inline NV_STATUS nvdispapiUnmapFrom_DISPATCH(struct NvDispApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__nvdispapiUnmapFrom__(pResource, pParams); +static inline NV_STATUS nvdispapiGetMemoryMappingDescriptor_DISPATCH(struct NvDispApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__nvdispapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline void nvdispapiControl_Epilogue_DISPATCH(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - pDisplayApi->__nvdispapiControl_Epilogue__(pDisplayApi, pCallContext, pRsParams); +static inline NV_STATUS nvdispapiControlSerialization_Prologue_DISPATCH(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__nvdispapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS nvdispapiControl_DISPATCH(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pDisplayApi->__nvdispapiControl__(pDisplayApi, pCallContext, pParams); +static inline void nvdispapiControlSerialization_Epilogue_DISPATCH(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__nvdispapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS nvdispapiUnmap_DISPATCH(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__nvdispapiUnmap__(pResource, pCallContext, pCpuMapping); +static inline NvBool nvdispapiCanCopy_DISPATCH(struct NvDispApi *pResource) { + return pResource->__nvdispapiCanCopy__(pResource); } -static inline NV_STATUS nvdispapiGetMemInterMapParams_DISPATCH(struct NvDispApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__nvdispapiGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS nvdispapiIsDuplicate_DISPATCH(struct NvDispApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__nvdispapiIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS nvdispapiGetMemoryMappingDescriptor_DISPATCH(struct NvDispApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__nvdispapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void nvdispapiPreDestruct_DISPATCH(struct NvDispApi *pResource) { + pResource->__nvdispapiPreDestruct__(pResource); } static inline NV_STATUS nvdispapiControlFilter_DISPATCH(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__nvdispapiControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS nvdispapiUnregisterEvent_DISPATCH(struct NvDispApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__nvdispapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static inline NV_STATUS nvdispapiControlSerialization_Prologue_DISPATCH(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvdispapiControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS nvdispapiMap_DISPATCH(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__nvdispapiMap__(pResource, pCallContext, pParams, pCpuMapping); } -static inline NvBool nvdispapiCanCopy_DISPATCH(struct NvDispApi *pResource) { - return pResource->__nvdispapiCanCopy__(pResource); +static inline NV_STATUS nvdispapiUnmap_DISPATCH(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pResource->__nvdispapiUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool nvdispapiIsPartialUnmapSupported_DISPATCH(struct NvDispApi *pResource) { return pResource->__nvdispapiIsPartialUnmapSupported__(pResource); } -static inline void nvdispapiPreDestruct_DISPATCH(struct NvDispApi *pResource) { - pResource->__nvdispapiPreDestruct__(pResource); +static inline NV_STATUS nvdispapiMapTo_DISPATCH(struct NvDispApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__nvdispapiMapTo__(pResource, pParams); } -static inline NV_STATUS nvdispapiIsDuplicate_DISPATCH(struct NvDispApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__nvdispapiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS nvdispapiUnmapFrom_DISPATCH(struct NvDispApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__nvdispapiUnmapFrom__(pResource, pParams); } -static inline void nvdispapiControlSerialization_Epilogue_DISPATCH(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nvdispapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 nvdispapiGetRefCount_DISPATCH(struct NvDispApi *pResource) { + return pResource->__nvdispapiGetRefCount__(pResource); +} + +static inline void nvdispapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct NvDispApi *pResource, RsResourceRef *pReference) { + pResource->__nvdispapiAddAdditionalDependants__(pClient, pResource, pReference); } -static inline PEVENTNOTIFICATION *nvdispapiGetNotificationListPtr_DISPATCH(struct NvDispApi *pNotifier) { +static inline PEVENTNOTIFICATION * nvdispapiGetNotificationListPtr_DISPATCH(struct NvDispApi *pNotifier) { return pNotifier->__nvdispapiGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *nvdispapiGetNotificationShare_DISPATCH(struct NvDispApi *pNotifier) { +static inline struct NotifShare * nvdispapiGetNotificationShare_DISPATCH(struct NvDispApi *pNotifier) { return pNotifier->__nvdispapiGetNotificationShare__(pNotifier); } -static inline NV_STATUS nvdispapiMap_DISPATCH(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__nvdispapiMap__(pResource, pCallContext, pParams, pCpuMapping); +static inline void nvdispapiSetNotificationShare_DISPATCH(struct NvDispApi *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__nvdispapiSetNotificationShare__(pNotifier, pNotifShare); +} + +static inline NV_STATUS nvdispapiUnregisterEvent_DISPATCH(struct NvDispApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__nvdispapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS nvdispapiGetOrAllocNotifShare_DISPATCH(struct NvDispApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return pNotifier->__nvdispapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } +NV_STATUS nvdispapiCtrlCmdIdleChannel_IMPL(struct NvDispApi *pNvDispApi, NVC370_CTRL_IDLE_CHANNEL_PARAMS *pParams); + +NV_STATUS nvdispapiCtrlCmdSetAccl_IMPL(struct NvDispApi *pNvDispApi, NVC370_CTRL_SET_ACCL_PARAMS *pParams); + +NV_STATUS nvdispapiCtrlCmdGetAccl_IMPL(struct NvDispApi *pNvDispApi, NVC370_CTRL_GET_ACCL_PARAMS *pParams); + +NV_STATUS nvdispapiCtrlCmdGetChannelInfo_IMPL(struct NvDispApi *pNvDispApi, NVC370_CTRL_CMD_GET_CHANNEL_INFO_PARAMS *pParams); + +NV_STATUS nvdispapiCtrlCmdSetSwaprdyGpioWar_IMPL(struct NvDispApi *pNvDispApi, NVC370_CTRL_SET_SWAPRDY_GPIO_WAR_PARAMS *pParams); + +NV_STATUS nvdispapiCtrlCmdGetLockpinsCaps_IMPL(struct NvDispApi *pNvDispApi, NVC370_CTRL_GET_LOCKPINS_CAPS_PARAMS *pParams); + +NV_STATUS nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides_IMPL(struct NvDispApi *pNvDispApi, NVC370_CTRL_CMD_SET_FORCE_MODESWITCH_FLAGS_OVERRIDES_PARAMS *pParams); + NV_STATUS nvdispapiConstruct_IMPL(struct NvDispApi *arg_pNvdispApi, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_nvdispapiConstruct(arg_pNvdispApi, arg_pCallContext, arg_pParams) nvdispapiConstruct_IMPL(arg_pNvdispApi, arg_pCallContext, arg_pParams) @@ -1134,47 +1254,56 @@ NV_STATUS nvdispapiConstruct_IMPL(struct NvDispApi *arg_pNvdispApi, struct CALL_ #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct DispSwObj { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct DisplayApi __nvoc_base_DisplayApi; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct DisplayApi *__nvoc_pbase_DisplayApi; - struct DispSwObj *__nvoc_pbase_DispSwObj; - NV_STATUS (*__dispswobjCtrlCmdIsModePossible__)(struct DispSwObj *, NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS *); - NV_STATUS (*__dispswobjCtrlCmdIsModePossibleOrSettings__)(struct DispSwObj *, NVC372_CTRL_IS_MODE_POSSIBLE_OR_SETTINGS_PARAMS *); - NV_STATUS (*__dispswobjCtrlCmdVideoAdaptiveRefreshRate__)(struct DispSwObj *, NVC372_CTRL_CMD_VIDEO_ADAPTIVE_REFRESH_RATE_PARAMS *); - NV_STATUS (*__dispswobjCtrlCmdGetActiveViewportPointIn__)(struct DispSwObj *, NVC372_CTRL_CMD_GET_ACTIVE_VIEWPORT_POINT_IN_PARAMS *); - NvBool (*__dispswobjShareCallback__)(struct DispSwObj *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__dispswobjCheckMemInterUnmap__)(struct DispSwObj *, NvBool); - NV_STATUS (*__dispswobjMapTo__)(struct DispSwObj *, RS_RES_MAP_TO_PARAMS *); - NvBool (*__dispswobjAccessCallback__)(struct DispSwObj *, struct RsClient *, void *, RsAccessRight); - void (*__dispswobjSetNotificationShare__)(struct DispSwObj *, struct NotifShare *); - NvU32 (*__dispswobjGetRefCount__)(struct DispSwObj *); - void (*__dispswobjAddAdditionalDependants__)(struct RsClient *, struct DispSwObj *, RsResourceRef *); - NV_STATUS (*__dispswobjControl_Prologue__)(struct DispSwObj *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispswobjUnmapFrom__)(struct DispSwObj *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__dispswobjControl_Epilogue__)(struct DispSwObj *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispswobjControl__)(struct DispSwObj *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispswobjUnmap__)(struct DispSwObj *, struct CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__dispswobjGetMemInterMapParams__)(struct DispSwObj *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__dispswobjGetMemoryMappingDescriptor__)(struct DispSwObj *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__dispswobjControlFilter__)(struct DispSwObj *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispswobjUnregisterEvent__)(struct DispSwObj *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__dispswobjControlSerialization_Prologue__)(struct DispSwObj *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__dispswobjCanCopy__)(struct DispSwObj *); - NvBool (*__dispswobjIsPartialUnmapSupported__)(struct DispSwObj *); - void (*__dispswobjPreDestruct__)(struct DispSwObj *); - NV_STATUS (*__dispswobjIsDuplicate__)(struct DispSwObj *, NvHandle, NvBool *); - void (*__dispswobjControlSerialization_Epilogue__)(struct DispSwObj *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__dispswobjGetNotificationListPtr__)(struct DispSwObj *); - struct NotifShare *(*__dispswobjGetNotificationShare__)(struct DispSwObj *); - NV_STATUS (*__dispswobjMap__)(struct DispSwObj *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NV_STATUS (*__dispswobjGetOrAllocNotifShare__)(struct DispSwObj *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct INotifier *__nvoc_pbase_INotifier; // inotify super^3 + struct Notifier *__nvoc_pbase_Notifier; // notify super^2 + struct DisplayApi *__nvoc_pbase_DisplayApi; // dispapi super + struct DispSwObj *__nvoc_pbase_DispSwObj; // dispswobj + + // Vtable with 30 per-object function pointers + NV_STATUS (*__dispswobjCtrlCmdIsModePossible__)(struct DispSwObj * /*this*/, NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS *); // exported (id=0xc3720101) + NV_STATUS (*__dispswobjCtrlCmdIsModePossibleOrSettings__)(struct DispSwObj * /*this*/, NVC372_CTRL_IS_MODE_POSSIBLE_OR_SETTINGS_PARAMS *); // exported (id=0xc3720102) + NV_STATUS (*__dispswobjCtrlCmdVideoAdaptiveRefreshRate__)(struct DispSwObj * /*this*/, NVC372_CTRL_CMD_VIDEO_ADAPTIVE_REFRESH_RATE_PARAMS *); // exported (id=0xc3720103) + NV_STATUS (*__dispswobjCtrlCmdGetActiveViewportPointIn__)(struct DispSwObj * /*this*/, NVC372_CTRL_CMD_GET_ACTIVE_VIEWPORT_POINT_IN_PARAMS *); // exported (id=0xc3720104) + NV_STATUS (*__dispswobjControl__)(struct DispSwObj * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispapi) + NV_STATUS (*__dispswobjControl_Prologue__)(struct DispSwObj * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispapi) + void (*__dispswobjControl_Epilogue__)(struct DispSwObj * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispapi) + NvBool (*__dispswobjAccessCallback__)(struct DispSwObj * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (dispapi) + NvBool (*__dispswobjShareCallback__)(struct DispSwObj * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (dispapi) + NV_STATUS (*__dispswobjGetMemInterMapParams__)(struct DispSwObj * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (dispapi) + NV_STATUS (*__dispswobjCheckMemInterUnmap__)(struct DispSwObj * /*this*/, NvBool); // virtual inherited (rmres) base (dispapi) + NV_STATUS (*__dispswobjGetMemoryMappingDescriptor__)(struct DispSwObj * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (dispapi) + NV_STATUS (*__dispswobjControlSerialization_Prologue__)(struct DispSwObj * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (dispapi) + void (*__dispswobjControlSerialization_Epilogue__)(struct DispSwObj * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (dispapi) + NvBool (*__dispswobjCanCopy__)(struct DispSwObj * /*this*/); // virtual inherited (res) base (dispapi) + NV_STATUS (*__dispswobjIsDuplicate__)(struct DispSwObj * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (dispapi) + void (*__dispswobjPreDestruct__)(struct DispSwObj * /*this*/); // virtual inherited (res) base (dispapi) + NV_STATUS (*__dispswobjControlFilter__)(struct DispSwObj * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (dispapi) + NV_STATUS (*__dispswobjMap__)(struct DispSwObj * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (dispapi) + NV_STATUS (*__dispswobjUnmap__)(struct DispSwObj * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (dispapi) + NvBool (*__dispswobjIsPartialUnmapSupported__)(struct DispSwObj * /*this*/); // inline virtual inherited (res) base (dispapi) body + NV_STATUS (*__dispswobjMapTo__)(struct DispSwObj * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (dispapi) + NV_STATUS (*__dispswobjUnmapFrom__)(struct DispSwObj * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (dispapi) + NvU32 (*__dispswobjGetRefCount__)(struct DispSwObj * /*this*/); // virtual inherited (res) base (dispapi) + void (*__dispswobjAddAdditionalDependants__)(struct RsClient *, struct DispSwObj * /*this*/, RsResourceRef *); // virtual inherited (res) base (dispapi) + PEVENTNOTIFICATION * (*__dispswobjGetNotificationListPtr__)(struct DispSwObj * /*this*/); // virtual inherited (notify) base (dispapi) + struct NotifShare * (*__dispswobjGetNotificationShare__)(struct DispSwObj * /*this*/); // virtual inherited (notify) base (dispapi) + void (*__dispswobjSetNotificationShare__)(struct DispSwObj * /*this*/, struct NotifShare *); // virtual inherited (notify) base (dispapi) + NV_STATUS (*__dispswobjUnregisterEvent__)(struct DispSwObj * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (dispapi) + NV_STATUS (*__dispswobjGetOrAllocNotifShare__)(struct DispSwObj * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (dispapi) }; #ifndef __NVOC_CLASS_DispSwObj_TYPEDEF__ @@ -1186,6 +1315,7 @@ typedef struct DispSwObj DispSwObj; #define __nvoc_class_id_DispSwObj 0x6aa5e2 #endif /* __nvoc_class_id_DispSwObj */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_DispSwObj; #define __staticCast_DispSwObj(pThis) \ @@ -1198,171 +1328,204 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_DispSwObj; ((DispSwObj*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(DispSwObj))) #endif //__nvoc_disp_objs_h_disabled - NV_STATUS __nvoc_objCreateDynamic_DispSwObj(DispSwObj**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_DispSwObj(DispSwObj**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_DispSwObj(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_DispSwObj((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define dispswobjCtrlCmdIsModePossible_FNPTR(pDispSwObj) pDispSwObj->__dispswobjCtrlCmdIsModePossible__ #define dispswobjCtrlCmdIsModePossible(pDispSwObj, pParams) dispswobjCtrlCmdIsModePossible_DISPATCH(pDispSwObj, pParams) +#define dispswobjCtrlCmdIsModePossibleOrSettings_FNPTR(pDispSwObj) pDispSwObj->__dispswobjCtrlCmdIsModePossibleOrSettings__ #define dispswobjCtrlCmdIsModePossibleOrSettings(pDispSwObj, pParams) dispswobjCtrlCmdIsModePossibleOrSettings_DISPATCH(pDispSwObj, pParams) +#define dispswobjCtrlCmdVideoAdaptiveRefreshRate_FNPTR(pDispSwObj) pDispSwObj->__dispswobjCtrlCmdVideoAdaptiveRefreshRate__ #define dispswobjCtrlCmdVideoAdaptiveRefreshRate(pDispSwObj, pParams) dispswobjCtrlCmdVideoAdaptiveRefreshRate_DISPATCH(pDispSwObj, pParams) +#define dispswobjCtrlCmdGetActiveViewportPointIn_FNPTR(pDispSwObj) pDispSwObj->__dispswobjCtrlCmdGetActiveViewportPointIn__ #define dispswobjCtrlCmdGetActiveViewportPointIn(pDispSwObj, pParams) dispswobjCtrlCmdGetActiveViewportPointIn_DISPATCH(pDispSwObj, pParams) -#define dispswobjShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) dispswobjShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define dispswobjCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispswobjCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define dispswobjMapTo(pResource, pParams) dispswobjMapTo_DISPATCH(pResource, pParams) -#define dispswobjAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispswobjAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define dispswobjSetNotificationShare(pNotifier, pNotifShare) dispswobjSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define dispswobjGetRefCount(pResource) dispswobjGetRefCount_DISPATCH(pResource) -#define dispswobjAddAdditionalDependants(pClient, pResource, pReference) dispswobjAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define dispswobjControl_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__dispapiControl__ +#define dispswobjControl(pDisplayApi, pCallContext, pParams) dispswobjControl_DISPATCH(pDisplayApi, pCallContext, pParams) +#define dispswobjControl_Prologue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__dispapiControl_Prologue__ #define dispswobjControl_Prologue(pDisplayApi, pCallContext, pRsParams) dispswobjControl_Prologue_DISPATCH(pDisplayApi, pCallContext, pRsParams) -#define dispswobjUnmapFrom(pResource, pParams) dispswobjUnmapFrom_DISPATCH(pResource, pParams) +#define dispswobjControl_Epilogue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__dispapiControl_Epilogue__ #define dispswobjControl_Epilogue(pDisplayApi, pCallContext, pRsParams) dispswobjControl_Epilogue_DISPATCH(pDisplayApi, pCallContext, pRsParams) -#define dispswobjControl(pDisplayApi, pCallContext, pParams) dispswobjControl_DISPATCH(pDisplayApi, pCallContext, pParams) -#define dispswobjUnmap(pResource, pCallContext, pCpuMapping) dispswobjUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define dispswobjAccessCallback_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresAccessCallback__ +#define dispswobjAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispswobjAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define dispswobjShareCallback_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresShareCallback__ +#define dispswobjShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) dispswobjShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define dispswobjGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define dispswobjGetMemInterMapParams(pRmResource, pParams) dispswobjGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define dispswobjCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define dispswobjCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispswobjCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define dispswobjGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define dispswobjGetMemoryMappingDescriptor(pRmResource, ppMemDesc) dispswobjGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define dispswobjControlFilter(pResource, pCallContext, pParams) dispswobjControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define dispswobjUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispswobjUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define dispswobjControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define dispswobjControlSerialization_Prologue(pResource, pCallContext, pParams) dispswobjControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dispswobjControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dispswobjControlSerialization_Epilogue(pResource, pCallContext, pParams) dispswobjControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispswobjCanCopy_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define dispswobjCanCopy(pResource) dispswobjCanCopy_DISPATCH(pResource) -#define dispswobjIsPartialUnmapSupported(pResource) dispswobjIsPartialUnmapSupported_DISPATCH(pResource) -#define dispswobjPreDestruct(pResource) dispswobjPreDestruct_DISPATCH(pResource) +#define dispswobjIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define dispswobjIsDuplicate(pResource, hMemory, pDuplicate) dispswobjIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dispswobjControlSerialization_Epilogue(pResource, pCallContext, pParams) dispswobjControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispswobjPreDestruct_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dispswobjPreDestruct(pResource) dispswobjPreDestruct_DISPATCH(pResource) +#define dispswobjControlFilter_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dispswobjControlFilter(pResource, pCallContext, pParams) dispswobjControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define dispswobjMap_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define dispswobjMap(pResource, pCallContext, pParams, pCpuMapping) dispswobjMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define dispswobjUnmap_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define dispswobjUnmap(pResource, pCallContext, pCpuMapping) dispswobjUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define dispswobjIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dispswobjIsPartialUnmapSupported(pResource) dispswobjIsPartialUnmapSupported_DISPATCH(pResource) +#define dispswobjMapTo_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dispswobjMapTo(pResource, pParams) dispswobjMapTo_DISPATCH(pResource, pParams) +#define dispswobjUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dispswobjUnmapFrom(pResource, pParams) dispswobjUnmapFrom_DISPATCH(pResource, pParams) +#define dispswobjGetRefCount_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dispswobjGetRefCount(pResource) dispswobjGetRefCount_DISPATCH(pResource) +#define dispswobjAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dispswobjAddAdditionalDependants(pClient, pResource, pReference) dispswobjAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define dispswobjGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define dispswobjGetNotificationListPtr(pNotifier) dispswobjGetNotificationListPtr_DISPATCH(pNotifier) +#define dispswobjGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetNotificationShare__ #define dispswobjGetNotificationShare(pNotifier) dispswobjGetNotificationShare_DISPATCH(pNotifier) -#define dispswobjMap(pResource, pCallContext, pParams, pCpuMapping) dispswobjMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define dispswobjSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define dispswobjSetNotificationShare(pNotifier, pNotifShare) dispswobjSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define dispswobjUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define dispswobjUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispswobjUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define dispswobjGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ #define dispswobjGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) dispswobjGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -NV_STATUS dispswobjCtrlCmdIsModePossible_IMPL(struct DispSwObj *pDispSwObj, NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS *pParams); +// Dispatch functions static inline NV_STATUS dispswobjCtrlCmdIsModePossible_DISPATCH(struct DispSwObj *pDispSwObj, NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS *pParams) { return pDispSwObj->__dispswobjCtrlCmdIsModePossible__(pDispSwObj, pParams); } -NV_STATUS dispswobjCtrlCmdIsModePossibleOrSettings_IMPL(struct DispSwObj *pDispSwObj, NVC372_CTRL_IS_MODE_POSSIBLE_OR_SETTINGS_PARAMS *pParams); - static inline NV_STATUS dispswobjCtrlCmdIsModePossibleOrSettings_DISPATCH(struct DispSwObj *pDispSwObj, NVC372_CTRL_IS_MODE_POSSIBLE_OR_SETTINGS_PARAMS *pParams) { return pDispSwObj->__dispswobjCtrlCmdIsModePossibleOrSettings__(pDispSwObj, pParams); } -NV_STATUS dispswobjCtrlCmdVideoAdaptiveRefreshRate_IMPL(struct DispSwObj *pDispSwObj, NVC372_CTRL_CMD_VIDEO_ADAPTIVE_REFRESH_RATE_PARAMS *pParams); - static inline NV_STATUS dispswobjCtrlCmdVideoAdaptiveRefreshRate_DISPATCH(struct DispSwObj *pDispSwObj, NVC372_CTRL_CMD_VIDEO_ADAPTIVE_REFRESH_RATE_PARAMS *pParams) { return pDispSwObj->__dispswobjCtrlCmdVideoAdaptiveRefreshRate__(pDispSwObj, pParams); } -NV_STATUS dispswobjCtrlCmdGetActiveViewportPointIn_IMPL(struct DispSwObj *pDispSwObj, NVC372_CTRL_CMD_GET_ACTIVE_VIEWPORT_POINT_IN_PARAMS *pParams); - static inline NV_STATUS dispswobjCtrlCmdGetActiveViewportPointIn_DISPATCH(struct DispSwObj *pDispSwObj, NVC372_CTRL_CMD_GET_ACTIVE_VIEWPORT_POINT_IN_PARAMS *pParams) { return pDispSwObj->__dispswobjCtrlCmdGetActiveViewportPointIn__(pDispSwObj, pParams); } -static inline NvBool dispswobjShareCallback_DISPATCH(struct DispSwObj *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__dispswobjShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS dispswobjControl_DISPATCH(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pDisplayApi->__dispswobjControl__(pDisplayApi, pCallContext, pParams); } -static inline NV_STATUS dispswobjCheckMemInterUnmap_DISPATCH(struct DispSwObj *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__dispswobjCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS dispswobjControl_Prologue_DISPATCH(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { + return pDisplayApi->__dispswobjControl_Prologue__(pDisplayApi, pCallContext, pRsParams); } -static inline NV_STATUS dispswobjMapTo_DISPATCH(struct DispSwObj *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dispswobjMapTo__(pResource, pParams); +static inline void dispswobjControl_Epilogue_DISPATCH(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { + pDisplayApi->__dispswobjControl_Epilogue__(pDisplayApi, pCallContext, pRsParams); } static inline NvBool dispswobjAccessCallback_DISPATCH(struct DispSwObj *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return pResource->__dispswobjAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline void dispswobjSetNotificationShare_DISPATCH(struct DispSwObj *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__dispswobjSetNotificationShare__(pNotifier, pNotifShare); -} - -static inline NvU32 dispswobjGetRefCount_DISPATCH(struct DispSwObj *pResource) { - return pResource->__dispswobjGetRefCount__(pResource); +static inline NvBool dispswobjShareCallback_DISPATCH(struct DispSwObj *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__dispswobjShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline void dispswobjAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispSwObj *pResource, RsResourceRef *pReference) { - pResource->__dispswobjAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS dispswobjGetMemInterMapParams_DISPATCH(struct DispSwObj *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__dispswobjGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS dispswobjControl_Prologue_DISPATCH(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - return pDisplayApi->__dispswobjControl_Prologue__(pDisplayApi, pCallContext, pRsParams); +static inline NV_STATUS dispswobjCheckMemInterUnmap_DISPATCH(struct DispSwObj *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__dispswobjCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS dispswobjUnmapFrom_DISPATCH(struct DispSwObj *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dispswobjUnmapFrom__(pResource, pParams); +static inline NV_STATUS dispswobjGetMemoryMappingDescriptor_DISPATCH(struct DispSwObj *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__dispswobjGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline void dispswobjControl_Epilogue_DISPATCH(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - pDisplayApi->__dispswobjControl_Epilogue__(pDisplayApi, pCallContext, pRsParams); +static inline NV_STATUS dispswobjControlSerialization_Prologue_DISPATCH(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dispswobjControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispswobjControl_DISPATCH(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pDisplayApi->__dispswobjControl__(pDisplayApi, pCallContext, pParams); +static inline void dispswobjControlSerialization_Epilogue_DISPATCH(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__dispswobjControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispswobjUnmap_DISPATCH(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__dispswobjUnmap__(pResource, pCallContext, pCpuMapping); +static inline NvBool dispswobjCanCopy_DISPATCH(struct DispSwObj *pResource) { + return pResource->__dispswobjCanCopy__(pResource); } -static inline NV_STATUS dispswobjGetMemInterMapParams_DISPATCH(struct DispSwObj *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dispswobjGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS dispswobjIsDuplicate_DISPATCH(struct DispSwObj *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__dispswobjIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS dispswobjGetMemoryMappingDescriptor_DISPATCH(struct DispSwObj *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__dispswobjGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void dispswobjPreDestruct_DISPATCH(struct DispSwObj *pResource) { + pResource->__dispswobjPreDestruct__(pResource); } static inline NV_STATUS dispswobjControlFilter_DISPATCH(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__dispswobjControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispswobjUnregisterEvent_DISPATCH(struct DispSwObj *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__dispswobjUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static inline NV_STATUS dispswobjControlSerialization_Prologue_DISPATCH(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispswobjControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS dispswobjMap_DISPATCH(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__dispswobjMap__(pResource, pCallContext, pParams, pCpuMapping); } -static inline NvBool dispswobjCanCopy_DISPATCH(struct DispSwObj *pResource) { - return pResource->__dispswobjCanCopy__(pResource); +static inline NV_STATUS dispswobjUnmap_DISPATCH(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pResource->__dispswobjUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool dispswobjIsPartialUnmapSupported_DISPATCH(struct DispSwObj *pResource) { return pResource->__dispswobjIsPartialUnmapSupported__(pResource); } -static inline void dispswobjPreDestruct_DISPATCH(struct DispSwObj *pResource) { - pResource->__dispswobjPreDestruct__(pResource); +static inline NV_STATUS dispswobjMapTo_DISPATCH(struct DispSwObj *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__dispswobjMapTo__(pResource, pParams); } -static inline NV_STATUS dispswobjIsDuplicate_DISPATCH(struct DispSwObj *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dispswobjIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS dispswobjUnmapFrom_DISPATCH(struct DispSwObj *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__dispswobjUnmapFrom__(pResource, pParams); } -static inline void dispswobjControlSerialization_Epilogue_DISPATCH(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispswobjControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 dispswobjGetRefCount_DISPATCH(struct DispSwObj *pResource) { + return pResource->__dispswobjGetRefCount__(pResource); +} + +static inline void dispswobjAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispSwObj *pResource, RsResourceRef *pReference) { + pResource->__dispswobjAddAdditionalDependants__(pClient, pResource, pReference); } -static inline PEVENTNOTIFICATION *dispswobjGetNotificationListPtr_DISPATCH(struct DispSwObj *pNotifier) { +static inline PEVENTNOTIFICATION * dispswobjGetNotificationListPtr_DISPATCH(struct DispSwObj *pNotifier) { return pNotifier->__dispswobjGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *dispswobjGetNotificationShare_DISPATCH(struct DispSwObj *pNotifier) { +static inline struct NotifShare * dispswobjGetNotificationShare_DISPATCH(struct DispSwObj *pNotifier) { return pNotifier->__dispswobjGetNotificationShare__(pNotifier); } -static inline NV_STATUS dispswobjMap_DISPATCH(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__dispswobjMap__(pResource, pCallContext, pParams, pCpuMapping); +static inline void dispswobjSetNotificationShare_DISPATCH(struct DispSwObj *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__dispswobjSetNotificationShare__(pNotifier, pNotifShare); +} + +static inline NV_STATUS dispswobjUnregisterEvent_DISPATCH(struct DispSwObj *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__dispswobjUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS dispswobjGetOrAllocNotifShare_DISPATCH(struct DispSwObj *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return pNotifier->__dispswobjGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } +NV_STATUS dispswobjCtrlCmdIsModePossible_IMPL(struct DispSwObj *pDispSwObj, NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS *pParams); + +NV_STATUS dispswobjCtrlCmdIsModePossibleOrSettings_IMPL(struct DispSwObj *pDispSwObj, NVC372_CTRL_IS_MODE_POSSIBLE_OR_SETTINGS_PARAMS *pParams); + +NV_STATUS dispswobjCtrlCmdVideoAdaptiveRefreshRate_IMPL(struct DispSwObj *pDispSwObj, NVC372_CTRL_CMD_VIDEO_ADAPTIVE_REFRESH_RATE_PARAMS *pParams); + +NV_STATUS dispswobjCtrlCmdGetActiveViewportPointIn_IMPL(struct DispSwObj *pDispSwObj, NVC372_CTRL_CMD_GET_ACTIVE_VIEWPORT_POINT_IN_PARAMS *pParams); + NV_STATUS dispswobjConstruct_IMPL(struct DispSwObj *arg_pDispSwObj, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_dispswobjConstruct(arg_pDispSwObj, arg_pCallContext, arg_pParams) dispswobjConstruct_IMPL(arg_pDispSwObj, arg_pCallContext, arg_pParams) @@ -1385,174 +1548,188 @@ NV_STATUS dispswobjConstruct_IMPL(struct DispSwObj *arg_pDispSwObj, struct CALL_ #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct DispCommon { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct DisplayApi __nvoc_base_DisplayApi; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct DisplayApi *__nvoc_pbase_DisplayApi; - struct DispCommon *__nvoc_pbase_DispCommon; - NV_STATUS (*__dispcmnCtrlCmdSystemGetVblankCounter__)(struct DispCommon *, NV0073_CTRL_SYSTEM_GET_VBLANK_COUNTER_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemGetVblankEnable__)(struct DispCommon *, NV0073_CTRL_SYSTEM_GET_VBLANK_ENABLE_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemCheckSidebandSrSupport__)(struct DispCommon *, NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemGetHotplugState__)(struct DispCommon *, NV0073_CTRL_SYSTEM_GET_HOTPLUG_STATE_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemGetInternalDisplays__)(struct DispCommon *, NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemGetConnectorTable__)(struct DispCommon *, NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemVrrDisplayInfo__)(struct DispCommon *, NV0073_CTRL_SYSTEM_VRR_DISPLAY_INFO_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdVRRSetRgLineActive__)(struct DispCommon *, NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdInternalVRRSetRgLineActive__)(struct DispCommon *, NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdVblankSemControl__)(struct DispCommon *, NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdInternalVblankSemControl__)(struct DispCommon *, NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdAccelVblankSemControl__)(struct DispCommon *, NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpEnableVrr__)(struct DispCommon *, NV0073_CTRL_CMD_DP_ENABLE_VRR_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdClearELVBlock__)(struct DispCommon *, NV0073_CTRL_SYSTEM_CLEAR_ELV_BLOCK_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificDisplayChange__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_DISPLAY_CHANGE_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpGetSpreadSpectrum__)(struct DispCommon *, NV0073_CTRL_DFP_GET_SPREAD_SPECTRUM_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpGetLcdGpioPinNum__)(struct DispCommon *, NV0073_CTRL_DFP_GET_LCD_GPIO_PIN_NUM_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpGetAudioMuteStream__)(struct DispCommon *, NV0073_CTRL_DP_GET_AUDIO_MUTESTREAM_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpAuxchI2cTransferCtrl__)(struct DispCommon *, NV0073_CTRL_DP_AUXCH_I2C_TRANSFER_CTRL_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpASSRCtrl__)(struct DispCommon *, NV0073_CTRL_DP_ASSR_CTRL_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpSetEcf__)(struct DispCommon *, NV0073_CTRL_CMD_DP_SET_ECF_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdStereoDongleSupported__)(struct DispCommon *, NV0073_CTRL_STEREO_DONGLE_SUPPORTED_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpRecordChannelRegisters__)(struct DispCommon *, NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificGetBacklightBrightness__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_BACKLIGHT_BRIGHTNESS_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificSetBacklightBrightness__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_BACKLIGHT_BRIGHTNESS_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdPsrGetSrPanelInfo__)(struct DispCommon *, NV0073_CTRL_PSR_GET_SR_PANEL_INFO_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpSwitchDispMux__)(struct DispCommon *, NV0073_CTRL_CMD_DFP_SWITCH_DISP_MUX_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdInternalDfpSwitchDispMux__)(struct DispCommon *, NV0073_CTRL_CMD_DFP_SWITCH_DISP_MUX_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpRunPreDispMuxOperations__)(struct DispCommon *, NV0073_CTRL_CMD_DFP_RUN_PRE_DISP_MUX_OPERATIONS_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpRunPostDispMuxOperations__)(struct DispCommon *, NV0073_CTRL_CMD_DFP_RUN_POST_DISP_MUX_OPERATIONS_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpGetDispMuxStatus__)(struct DispCommon *, NV0073_CTRL_CMD_DFP_GET_DISP_MUX_STATUS_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdInternalDfpGetDispMuxStatus__)(struct DispCommon *, NV0073_CTRL_CMD_DFP_GET_DISP_MUX_STATUS_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpInternalLcdOverdrive__)(struct DispCommon *, NV0073_CTRL_CMD_DP_AUXCH_OD_CTRL_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpExecuteInternalLcdOverDrivePolicy__)(struct DispCommon *, NV0073_CTRL_DP_EXECUTE_OVERDRIVE_POLICY_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemExecuteAcpiMethod__)(struct DispCommon *, NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemGetAcpiIdMap__)(struct DispCommon *, NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemAcpiSubsystemActivated__)(struct DispCommon *, NV0073_CTRL_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificSetAcpiIdMapping__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_SET_ACPI_ID_MAPPING_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificGetAcpiDodDisplayPortAttachment__)(struct DispCommon *, NV0073_CTRL_GET_ACPI_DOD_DISPLAY_PORT_ATTACHMENT_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemGetCapsV2__)(struct DispCommon *, NV0073_CTRL_SYSTEM_GET_CAPS_V2_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemGetNumHeads__)(struct DispCommon *, NV0073_CTRL_SYSTEM_GET_NUM_HEADS_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemGetScanline__)(struct DispCommon *, NV0073_CTRL_SYSTEM_GET_SCANLINE_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemGetSuppported__)(struct DispCommon *, NV0073_CTRL_SYSTEM_GET_SUPPORTED_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemGetConnectState__)(struct DispCommon *, NV0073_CTRL_SYSTEM_GET_CONNECT_STATE_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemGetHotplugUnplugState__)(struct DispCommon *, NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdInternalGetHotplugUnplugState__)(struct DispCommon *, NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemGetHeadRoutingMap__)(struct DispCommon *, NV0073_CTRL_SYSTEM_GET_HEAD_ROUTING_MAP_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemGetActive__)(struct DispCommon *, NV0073_CTRL_SYSTEM_GET_ACTIVE_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemGetBootDisplays__)(struct DispCommon *, NV0073_CTRL_SYSTEM_GET_BOOT_DISPLAYS_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemQueryDisplayIdsWithMux__)(struct DispCommon *, NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemCheckSidebandI2cSupport__)(struct DispCommon *, NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemAllocateDisplayBandwidth__)(struct DispCommon *, NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemGetHotplugConfig__)(struct DispCommon *, NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemGetHotplugEventConfig__)(struct DispCommon *, NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemSetHotplugEventConfig__)(struct DispCommon *, NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemArmLightweightSupervisor__)(struct DispCommon *, NV0073_CTRL_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSystemConfigVrrPstateSwitch__)(struct DispCommon *, NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificGetType__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_GET_TYPE_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificGetEdidV2__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_GET_EDID_V2_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificSetEdidV2__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_SET_EDID_V2_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificFakeDevice__)(struct DispCommon *, NV0073_CTRL_CMD_SPECIFIC_FAKE_DEVICE_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificGetConnectorData__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_GET_CONNECTOR_DATA_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificSetHdmiEnable__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_SET_HDMI_ENABLE_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificCtrlHdmi__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_CTRL_HDMI_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificGetAllHeadMask__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_GET_ALL_HEAD_MASK_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificSetOdPacket__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_SET_OD_PACKET_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificAcquireSharedGenericPacket__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_ACQUIRE_SHARED_GENERIC_PACKET_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificSetSharedGenericPacket__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_SET_SHARED_GENERIC_PACKET_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificReleaseSharedGenericPacket__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_RELEASE_SHARED_GENERIC_PACKET_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificSetOdPacketCtrl__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_SET_OD_PACKET_CTRL_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificOrGetInfo__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_OR_GET_INFO_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificGetPclkLimit__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_GET_PCLK_LIMIT_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificSetHdmiSinkCaps__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_SET_HDMI_SINK_CAPS_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificSetMonitorPower__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_SET_MONITOR_POWER_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificSetHdmiFrlLinkConfig__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_SET_HDMI_FRL_LINK_CONFIG_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificApplyEdidOverrideV2__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_APPLY_EDID_OVERRIDE_V2_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificGetI2cPortid__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_GET_I2C_PORTID_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificGetHdmiGpuCaps__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_GET_HDMI_GPU_CAPS_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificGetHdmiScdcData__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_GET_HDMI_SCDC_DATA_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificIsDirectmodeDisplay__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_IS_DIRECTMODE_DISPLAY_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificDefaultAdaptivesyncDisplay__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_DEFAULT_ADAPTIVESYNC_DISPLAY_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificSetHdmiFrlCapacityComputation__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_GET_HDMI_FRL_CAPACITY_COMPUTATION_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificDispI2cReadWrite__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_DISP_I2C_READ_WRITE_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificGetValidHeadWindowAssignment__)(struct DispCommon *, NV0073_CTRL_SPECIFIC_GET_VALID_HEAD_WINDOW_ASSIGNMENT_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdSpecificSetHdmiAudioMutestream__)(struct DispCommon *, NV0073_CTRL_CMD_SPECIFIC_SET_HDMI_AUDIO_MUTESTREAM_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpEdpDriverUnload__)(struct DispCommon *, NV0073_CTRL_DFP_EDP_DRIVER_UNLOAD_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpGetInfo__)(struct DispCommon *, NV0073_CTRL_DFP_GET_INFO_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpGetDisplayportDongleInfo__)(struct DispCommon *, NV0073_CTRL_DFP_GET_DISPLAYPORT_DONGLE_INFO_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpSetEldAudioCaps__)(struct DispCommon *, NV0073_CTRL_DFP_SET_ELD_AUDIO_CAP_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpSetAudioEnable__)(struct DispCommon *, NV0073_CTRL_DFP_SET_AUDIO_ENABLE_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpUpdateDynamicDfpCache__)(struct DispCommon *, NV0073_CTRL_DFP_UPDATE_DYNAMIC_DFP_CACHE_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpAssignSor__)(struct DispCommon *, NV0073_CTRL_DFP_ASSIGN_SOR_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpDscCrcControl__)(struct DispCommon *, NV0073_CTRL_DFP_DSC_CRC_CONTROL_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpInitMuxData__)(struct DispCommon *, NV0073_CTRL_CMD_DFP_INIT_MUX_DATA_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpGetDsiModeTiming__)(struct DispCommon *, NV0073_CTRL_CMD_DFP_GET_DSI_MODE_TIMING_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpConfigTwoHeadOneOr__)(struct DispCommon *, NV0073_CTRL_DFP_CONFIG_TWO_HEAD_ONE_OR_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpGetPadlinkMask__)(struct DispCommon *, NV0073_CTRL_DFP_GET_PADLINK_MASK_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDfpGetFixedModeTiming__)(struct DispCommon *, NV0073_CTRL_DFP_GET_FIXED_MODE_TIMING_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpAuxchCtrl__)(struct DispCommon *, NV0073_CTRL_DP_AUXCH_CTRL_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpAuxchSetSema__)(struct DispCommon *, NV0073_CTRL_DP_AUXCH_SET_SEMA_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpCtrl__)(struct DispCommon *, NV0073_CTRL_DP_CTRL_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpGetLaneData__)(struct DispCommon *, NV0073_CTRL_DP_LANE_DATA_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpSetLaneData__)(struct DispCommon *, NV0073_CTRL_DP_LANE_DATA_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpSetTestpattern__)(struct DispCommon *, NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpMainLinkCtrl__)(struct DispCommon *, NV0073_CTRL_DP_MAIN_LINK_CTRL_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpSetAudioMuteStream__)(struct DispCommon *, NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpGetLinkConfig__)(struct DispCommon *, NV0073_CTRL_DP_GET_LINK_CONFIG_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpGetEDPData__)(struct DispCommon *, NV0073_CTRL_DP_GET_EDP_DATA_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpTopologyAllocateDisplayId__)(struct DispCommon *, NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpTopologyFreeDisplayId__)(struct DispCommon *, NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpConfigStream__)(struct DispCommon *, NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpConfigSingleHeadMultiStream__)(struct DispCommon *, NV0073_CTRL_CMD_DP_CONFIG_SINGLE_HEAD_MULTI_STREAM_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpSetRateGov__)(struct DispCommon *, NV0073_CTRL_CMD_DP_SET_RATE_GOV_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpSendACT__)(struct DispCommon *, NV0073_CTRL_CMD_DP_SEND_ACT_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpSetManualDisplayPort__)(struct DispCommon *, NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpGetCaps__)(struct DispCommon *, NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpSetMSAPropertiesv2__)(struct DispCommon *, NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_V2_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpSetStereoMSAProperties__)(struct DispCommon *, NV0073_CTRL_CMD_DP_SET_STEREO_MSA_PROPERTIES_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpGenerateFakeInterrupt__)(struct DispCommon *, NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpConfigRadScratchReg__)(struct DispCommon *, NV0073_CTRL_CMD_DP_CONFIG_RAD_SCRATCH_REG_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpSetTriggerSelect__)(struct DispCommon *, NV0073_CTRL_CMD_DP_SET_TRIGGER_SELECT_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpSetTriggerAll__)(struct DispCommon *, NV0073_CTRL_CMD_DP_SET_TRIGGER_ALL_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpGetAuxLogData__)(struct DispCommon *, NV0073_CTRL_CMD_DP_GET_AUXLOGGER_BUFFER_DATA_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpConfigIndexedLinkRates__)(struct DispCommon *, NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpConfigureFec__)(struct DispCommon *, NV0073_CTRL_CMD_DP_CONFIGURE_FEC_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpGetGenericInfoframe__)(struct DispCommon *, NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpGetMsaAttributes__)(struct DispCommon *, NV0073_CTRL_DP_GET_MSA_ATTRIBUTES_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdFrlConfigMacroPad__)(struct DispCommon *, NV0073_CTRL_CMD_FRL_CONFIG_MACRO_PAD_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpConfigMacroPad__)(struct DispCommon *, NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpSetPreemphasisDrivecurrentPostcursor2Data__)(struct DispCommon *, NV0073_CTRL_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS *); - NV_STATUS (*__dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data__)(struct DispCommon *, NV0073_CTRL_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS *); - NvBool (*__dispcmnShareCallback__)(struct DispCommon *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__dispcmnCheckMemInterUnmap__)(struct DispCommon *, NvBool); - NV_STATUS (*__dispcmnMapTo__)(struct DispCommon *, RS_RES_MAP_TO_PARAMS *); - NvBool (*__dispcmnAccessCallback__)(struct DispCommon *, struct RsClient *, void *, RsAccessRight); - void (*__dispcmnSetNotificationShare__)(struct DispCommon *, struct NotifShare *); - NvU32 (*__dispcmnGetRefCount__)(struct DispCommon *); - void (*__dispcmnAddAdditionalDependants__)(struct RsClient *, struct DispCommon *, RsResourceRef *); - NV_STATUS (*__dispcmnControl_Prologue__)(struct DispCommon *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispcmnUnmapFrom__)(struct DispCommon *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__dispcmnControl_Epilogue__)(struct DispCommon *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispcmnControl__)(struct DispCommon *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispcmnUnmap__)(struct DispCommon *, struct CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__dispcmnGetMemInterMapParams__)(struct DispCommon *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__dispcmnGetMemoryMappingDescriptor__)(struct DispCommon *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__dispcmnControlFilter__)(struct DispCommon *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispcmnUnregisterEvent__)(struct DispCommon *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__dispcmnControlSerialization_Prologue__)(struct DispCommon *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__dispcmnCanCopy__)(struct DispCommon *); - NvBool (*__dispcmnIsPartialUnmapSupported__)(struct DispCommon *); - void (*__dispcmnPreDestruct__)(struct DispCommon *); - NV_STATUS (*__dispcmnIsDuplicate__)(struct DispCommon *, NvHandle, NvBool *); - void (*__dispcmnControlSerialization_Epilogue__)(struct DispCommon *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__dispcmnGetNotificationListPtr__)(struct DispCommon *); - struct NotifShare *(*__dispcmnGetNotificationShare__)(struct DispCommon *); - NV_STATUS (*__dispcmnMap__)(struct DispCommon *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NV_STATUS (*__dispcmnGetOrAllocNotifShare__)(struct DispCommon *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct INotifier *__nvoc_pbase_INotifier; // inotify super^3 + struct Notifier *__nvoc_pbase_Notifier; // notify super^2 + struct DisplayApi *__nvoc_pbase_DisplayApi; // dispapi super + struct DispCommon *__nvoc_pbase_DispCommon; // dispcmn + + // Vtable with 160 per-object function pointers + NV_STATUS (*__dispcmnCtrlCmdSystemGetVblankCounter__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_VBLANK_COUNTER_PARAMS *); // exported (id=0x730105) + NV_STATUS (*__dispcmnCtrlCmdSystemGetVblankEnable__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_VBLANK_ENABLE_PARAMS *); // exported (id=0x730106) + NV_STATUS (*__dispcmnCtrlCmdSystemCheckSidebandSrSupport__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS *); // exported (id=0x73014c) + NV_STATUS (*__dispcmnCtrlCmdSystemGetHotplugState__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_HOTPLUG_STATE_PARAMS *); // exported (id=0x73010a) + NV_STATUS (*__dispcmnCtrlCmdSystemGetInternalDisplays__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS *); // exported (id=0x730116) + NV_STATUS (*__dispcmnCtrlCmdSystemGetConnectorTable__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_PARAMS *); // exported (id=0x73011d) + NV_STATUS (*__dispcmnCtrlCmdSystemVrrDisplayInfo__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_VRR_DISPLAY_INFO_PARAMS *); // exported (id=0x73012c) + NV_STATUS (*__dispcmnCtrlCmdVRRSetRgLineActive__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS *); // exported (id=0x73014d) + NV_STATUS (*__dispcmnCtrlCmdInternalVRRSetRgLineActive__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS *); // exported (id=0x730402) + NV_STATUS (*__dispcmnCtrlCmdVblankSemControlEnable__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE_PARAMS *); // exported (id=0x73014e) + NV_STATUS (*__dispcmnCtrlCmdInternalVblankSemControlEnable__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_ENABLE_PARAMS *); // exported (id=0x730405) + NV_STATUS (*__dispcmnCtrlCmdVblankSemControlDisable__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE_PARAMS *); // exported (id=0x73014f) + NV_STATUS (*__dispcmnCtrlCmdInternalVblankSemControlDisable__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_DISABLE_PARAMS *); // exported (id=0x730406) + NV_STATUS (*__dispcmnCtrlCmdAccelVblankSemControl__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS_PARAMS *); // exported (id=0x730150) + NV_STATUS (*__dispcmnCtrlCmdDpEnableVrr__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_ENABLE_VRR_PARAMS *); // exported (id=0x73137d) + NV_STATUS (*__dispcmnCtrlCmdClearELVBlock__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_CLEAR_ELV_BLOCK_PARAMS *); // exported (id=0x73012e) + NV_STATUS (*__dispcmnCtrlCmdSpecificDisplayChange__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_DISPLAY_CHANGE_PARAMS *); // exported (id=0x7302a4) + NV_STATUS (*__dispcmnCtrlCmdDfpGetSpreadSpectrum__)(struct DispCommon * /*this*/, NV0073_CTRL_DFP_GET_SPREAD_SPECTRUM_PARAMS *); // exported (id=0x73114c) + NV_STATUS (*__dispcmnCtrlCmdDfpGetLcdGpioPinNum__)(struct DispCommon * /*this*/, NV0073_CTRL_DFP_GET_LCD_GPIO_PIN_NUM_PARAMS *); // exported (id=0x731154) + NV_STATUS (*__dispcmnCtrlCmdDpGetAudioMuteStream__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_GET_AUDIO_MUTESTREAM_PARAMS *); // exported (id=0x731358) + NV_STATUS (*__dispcmnCtrlCmdDpAuxchI2cTransferCtrl__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_AUXCH_I2C_TRANSFER_CTRL_PARAMS *); // exported (id=0x73137c) + NV_STATUS (*__dispcmnCtrlCmdDpASSRCtrl__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_ASSR_CTRL_PARAMS *); // exported (id=0x73135a) + NV_STATUS (*__dispcmnCtrlCmdDpSetEcf__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_SET_ECF_PARAMS *); // exported (id=0x731366) + NV_STATUS (*__dispcmnCtrlCmdStereoDongleSupported__)(struct DispCommon * /*this*/, NV0073_CTRL_STEREO_DONGLE_SUPPORTED_PARAMS *); // exported (id=0x731702) + NV_STATUS (*__dispcmnCtrlCmdDfpRecordChannelRegisters__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS_PARAMS *); // exported (id=0x73014a) + NV_STATUS (*__dispcmnCtrlCmdSpecificGetBacklightBrightness__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_BACKLIGHT_BRIGHTNESS_PARAMS *); // exported (id=0x730291) + NV_STATUS (*__dispcmnCtrlCmdSpecificSetBacklightBrightness__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_BACKLIGHT_BRIGHTNESS_PARAMS *); // exported (id=0x730292) + NV_STATUS (*__dispcmnCtrlCmdPsrGetSrPanelInfo__)(struct DispCommon * /*this*/, NV0073_CTRL_PSR_GET_SR_PANEL_INFO_PARAMS *); // exported (id=0x731602) + NV_STATUS (*__dispcmnCtrlCmdDfpSwitchDispMux__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DFP_SWITCH_DISP_MUX_PARAMS *); // exported (id=0x731160) + NV_STATUS (*__dispcmnCtrlCmdInternalDfpSwitchDispMux__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DFP_SWITCH_DISP_MUX_PARAMS *); // exported (id=0x730460) + NV_STATUS (*__dispcmnCtrlCmdDfpRunPreDispMuxOperations__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DFP_RUN_PRE_DISP_MUX_OPERATIONS_PARAMS *); // exported (id=0x731161) + NV_STATUS (*__dispcmnCtrlCmdDfpRunPostDispMuxOperations__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DFP_RUN_POST_DISP_MUX_OPERATIONS_PARAMS *); // exported (id=0x731162) + NV_STATUS (*__dispcmnCtrlCmdDfpGetDispMuxStatus__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DFP_GET_DISP_MUX_STATUS_PARAMS *); // exported (id=0x731163) + NV_STATUS (*__dispcmnCtrlCmdInternalDfpGetDispMuxStatus__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DFP_GET_DISP_MUX_STATUS_PARAMS *); // exported (id=0x730404) + NV_STATUS (*__dispcmnCtrlCmdDfpInternalLcdOverdrive__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_AUXCH_OD_CTRL_PARAMS *); // exported (id=0x731380) + NV_STATUS (*__dispcmnCtrlCmdDfpExecuteInternalLcdOverDrivePolicy__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_EXECUTE_OVERDRIVE_POLICY_PARAMS *); // exported (id=0x731382) + NV_STATUS (*__dispcmnCtrlCmdDfpVariableBacklightCtrl__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_AUXCH_VBL_CTRL_PARAMS *); // exported (id=0x731386) + NV_STATUS (*__dispcmnCtrlCmdSystemExecuteAcpiMethod__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS *); // exported (id=0x730120) + NV_STATUS (*__dispcmnCtrlCmdSystemGetAcpiIdMap__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS *); // exported (id=0x730115) + NV_STATUS (*__dispcmnCtrlCmdSystemAcpiSubsystemActivated__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED_PARAMS *); // exported (id=0x730117) + NV_STATUS (*__dispcmnCtrlCmdSpecificSetAcpiIdMapping__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_SET_ACPI_ID_MAPPING_PARAMS *); // exported (id=0x730284) + NV_STATUS (*__dispcmnCtrlCmdSpecificGetAcpiDodDisplayPortAttachment__)(struct DispCommon * /*this*/, NV0073_CTRL_GET_ACPI_DOD_DISPLAY_PORT_ATTACHMENT_PARAMS *); // exported (id=0x730285) + NV_STATUS (*__dispcmnCtrlCmdSystemGetCapsV2__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_CAPS_V2_PARAMS *); // exported (id=0x730101) + NV_STATUS (*__dispcmnCtrlCmdSystemGetNumHeads__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_NUM_HEADS_PARAMS *); // exported (id=0x730102) + NV_STATUS (*__dispcmnCtrlCmdSystemGetScanline__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_SCANLINE_PARAMS *); // exported (id=0x730104) + NV_STATUS (*__dispcmnCtrlCmdSystemGetSuppported__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_SUPPORTED_PARAMS *); // exported (id=0x730107) + NV_STATUS (*__dispcmnCtrlCmdSystemGetConnectState__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_CONNECT_STATE_PARAMS *); // exported (id=0x730108) + NV_STATUS (*__dispcmnCtrlCmdSystemGetHotplugUnplugState__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS *); // exported (id=0x73012d) + NV_STATUS (*__dispcmnCtrlCmdInternalGetHotplugUnplugState__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS *); // exported (id=0x730401) + NV_STATUS (*__dispcmnCtrlCmdSystemGetHeadRoutingMap__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_HEAD_ROUTING_MAP_PARAMS *); // exported (id=0x73010b) + NV_STATUS (*__dispcmnCtrlCmdSystemGetActive__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_ACTIVE_PARAMS *); // exported (id=0x73010c) + NV_STATUS (*__dispcmnCtrlCmdSystemGetBootDisplays__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_BOOT_DISPLAYS_PARAMS *); // exported (id=0x73011e) + NV_STATUS (*__dispcmnCtrlCmdSystemQueryDisplayIdsWithMux__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS *); // exported (id=0x73013d) + NV_STATUS (*__dispcmnCtrlCmdSystemCheckSidebandI2cSupport__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS *); // exported (id=0x73014b) + NV_STATUS (*__dispcmnCtrlCmdSystemAllocateDisplayBandwidth__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS *); // exported (id=0x730143) + NV_STATUS (*__dispcmnCtrlCmdSystemGetHotplugConfig__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS *); // exported (id=0x730109) + NV_STATUS (*__dispcmnCtrlCmdSystemGetHotplugEventConfig__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS *); // exported (id=0x730144) + NV_STATUS (*__dispcmnCtrlCmdSystemSetHotplugEventConfig__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS *); // exported (id=0x730145) + NV_STATUS (*__dispcmnCtrlCmdSystemArmLightweightSupervisor__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR_PARAMS *); // exported (id=0x73012f) + NV_STATUS (*__dispcmnCtrlCmdSystemConfigVrrPstateSwitch__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS *); // exported (id=0x730134) + NV_STATUS (*__dispcmnCtrlCmdSpecificGetType__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_GET_TYPE_PARAMS *); // exported (id=0x730240) + NV_STATUS (*__dispcmnCtrlCmdSpecificGetEdidV2__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_GET_EDID_V2_PARAMS *); // exported (id=0x730245) + NV_STATUS (*__dispcmnCtrlCmdSpecificSetEdidV2__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_SET_EDID_V2_PARAMS *); // exported (id=0x730246) + NV_STATUS (*__dispcmnCtrlCmdSpecificFakeDevice__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_SPECIFIC_FAKE_DEVICE_PARAMS *); // exported (id=0x730243) + NV_STATUS (*__dispcmnCtrlCmdSpecificGetConnectorData__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_GET_CONNECTOR_DATA_PARAMS *); // exported (id=0x730250) + NV_STATUS (*__dispcmnCtrlCmdSpecificSetHdmiEnable__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_SET_HDMI_ENABLE_PARAMS *); // exported (id=0x730273) + NV_STATUS (*__dispcmnCtrlCmdSpecificCtrlHdmi__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_CTRL_HDMI_PARAMS *); // exported (id=0x730274) + NV_STATUS (*__dispcmnCtrlCmdSpecificGetAllHeadMask__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_GET_ALL_HEAD_MASK_PARAMS *); // exported (id=0x730287) + NV_STATUS (*__dispcmnCtrlCmdSpecificSetOdPacket__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_SET_OD_PACKET_PARAMS *); // exported (id=0x730288) + NV_STATUS (*__dispcmnCtrlCmdSpecificAcquireSharedGenericPacket__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_ACQUIRE_SHARED_GENERIC_PACKET_PARAMS *); // exported (id=0x7302aa) + NV_STATUS (*__dispcmnCtrlCmdSpecificSetSharedGenericPacket__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_SET_SHARED_GENERIC_PACKET_PARAMS *); // exported (id=0x7302a9) + NV_STATUS (*__dispcmnCtrlCmdSpecificReleaseSharedGenericPacket__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_RELEASE_SHARED_GENERIC_PACKET_PARAMS *); // exported (id=0x7302ab) + NV_STATUS (*__dispcmnCtrlCmdSpecificSetOdPacketCtrl__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_SET_OD_PACKET_CTRL_PARAMS *); // exported (id=0x730289) + NV_STATUS (*__dispcmnCtrlCmdSpecificOrGetInfo__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_OR_GET_INFO_PARAMS *); // exported (id=0x73028b) + NV_STATUS (*__dispcmnCtrlCmdSpecificGetPclkLimit__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_GET_PCLK_LIMIT_PARAMS *); // exported (id=0x73028a) + NV_STATUS (*__dispcmnCtrlCmdSpecificSetHdmiSinkCaps__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_SET_HDMI_SINK_CAPS_PARAMS *); // exported (id=0x730293) + NV_STATUS (*__dispcmnCtrlCmdSpecificSetMonitorPower__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_SET_MONITOR_POWER_PARAMS *); // exported (id=0x730295) + NV_STATUS (*__dispcmnCtrlCmdSpecificSetHdmiFrlLinkConfig__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_SET_HDMI_FRL_LINK_CONFIG_PARAMS *); // exported (id=0x73029a) + NV_STATUS (*__dispcmnCtrlCmdSpecificApplyEdidOverrideV2__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_APPLY_EDID_OVERRIDE_V2_PARAMS *); // exported (id=0x7302a1) + NV_STATUS (*__dispcmnCtrlCmdSpecificGetI2cPortid__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_GET_I2C_PORTID_PARAMS *); // exported (id=0x730211) + NV_STATUS (*__dispcmnCtrlCmdSpecificGetHdmiGpuCaps__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_GET_HDMI_GPU_CAPS_PARAMS *); // exported (id=0x7302a2) + NV_STATUS (*__dispcmnCtrlCmdSpecificGetHdmiScdcData__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_GET_HDMI_SCDC_DATA_PARAMS *); // exported (id=0x7302a6) + NV_STATUS (*__dispcmnCtrlCmdSpecificIsDirectmodeDisplay__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_IS_DIRECTMODE_DISPLAY_PARAMS *); // exported (id=0x7302a7) + NV_STATUS (*__dispcmnCtrlCmdSpecificDefaultAdaptivesyncDisplay__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_DEFAULT_ADAPTIVESYNC_DISPLAY_PARAMS *); // exported (id=0x7302ae) + NV_STATUS (*__dispcmnCtrlCmdSpecificSetHdmiFrlCapacityComputation__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_GET_HDMI_FRL_CAPACITY_COMPUTATION_PARAMS *); // exported (id=0x7302a8) + NV_STATUS (*__dispcmnCtrlCmdSpecificDispI2cReadWrite__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_DISP_I2C_READ_WRITE_PARAMS *); // exported (id=0x7302ac) + NV_STATUS (*__dispcmnCtrlCmdSpecificGetValidHeadWindowAssignment__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_GET_VALID_HEAD_WINDOW_ASSIGNMENT_PARAMS *); // exported (id=0x7302ad) + NV_STATUS (*__dispcmnCtrlCmdSpecificSetHdmiAudioMutestream__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_SPECIFIC_SET_HDMI_AUDIO_MUTESTREAM_PARAMS *); // exported (id=0x730275) + NV_STATUS (*__dispcmnCtrlCmdDfpEdpDriverUnload__)(struct DispCommon * /*this*/, NV0073_CTRL_DFP_EDP_DRIVER_UNLOAD_PARAMS *); // exported (id=0x731176) + NV_STATUS (*__dispcmnCtrlCmdDfpGetInfo__)(struct DispCommon * /*this*/, NV0073_CTRL_DFP_GET_INFO_PARAMS *); // exported (id=0x731140) + NV_STATUS (*__dispcmnCtrlCmdDfpGetDisplayportDongleInfo__)(struct DispCommon * /*this*/, NV0073_CTRL_DFP_GET_DISPLAYPORT_DONGLE_INFO_PARAMS *); // exported (id=0x731142) + NV_STATUS (*__dispcmnCtrlCmdDfpSetEldAudioCaps__)(struct DispCommon * /*this*/, NV0073_CTRL_DFP_SET_ELD_AUDIO_CAP_PARAMS *); // exported (id=0x731144) + NV_STATUS (*__dispcmnCtrlCmdDfpSetAudioEnable__)(struct DispCommon * /*this*/, NV0073_CTRL_DFP_SET_AUDIO_ENABLE_PARAMS *); // exported (id=0x731150) + NV_STATUS (*__dispcmnCtrlCmdDfpUpdateDynamicDfpCache__)(struct DispCommon * /*this*/, NV0073_CTRL_DFP_UPDATE_DYNAMIC_DFP_CACHE_PARAMS *); // exported (id=0x73114e) + NV_STATUS (*__dispcmnCtrlCmdDfpAssignSor__)(struct DispCommon * /*this*/, NV0073_CTRL_DFP_ASSIGN_SOR_PARAMS *); // exported (id=0x731152) + NV_STATUS (*__dispcmnCtrlCmdDfpDscCrcControl__)(struct DispCommon * /*this*/, NV0073_CTRL_DFP_DSC_CRC_CONTROL_PARAMS *); // exported (id=0x731157) + NV_STATUS (*__dispcmnCtrlCmdDfpInitMuxData__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DFP_INIT_MUX_DATA_PARAMS *); // exported (id=0x731158) + NV_STATUS (*__dispcmnCtrlCmdDfpGetDsiModeTiming__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DFP_GET_DSI_MODE_TIMING_PARAMS *); // exported (id=0x731166) + NV_STATUS (*__dispcmnCtrlCmdDfpConfigTwoHeadOneOr__)(struct DispCommon * /*this*/, NV0073_CTRL_DFP_CONFIG_TWO_HEAD_ONE_OR_PARAMS *); // exported (id=0x731156) + NV_STATUS (*__dispcmnCtrlCmdDfpGetPadlinkMask__)(struct DispCommon * /*this*/, NV0073_CTRL_DFP_GET_PADLINK_MASK_PARAMS *); // exported (id=0x731153) + NV_STATUS (*__dispcmnCtrlCmdDfpGetFixedModeTiming__)(struct DispCommon * /*this*/, NV0073_CTRL_DFP_GET_FIXED_MODE_TIMING_PARAMS *); // exported (id=0x731172) + NV_STATUS (*__dispcmnCtrlCmdDpAuxchCtrl__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_AUXCH_CTRL_PARAMS *); // exported (id=0x731341) + NV_STATUS (*__dispcmnCtrlCmdDpAuxchSetSema__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_AUXCH_SET_SEMA_PARAMS *); // exported (id=0x731342) + NV_STATUS (*__dispcmnCtrlCmdDpCtrl__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_CTRL_PARAMS *); // exported (id=0x731343) + NV_STATUS (*__dispcmnCtrlCmdDpGetLaneData__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_LANE_DATA_PARAMS *); // exported (id=0x731345) + NV_STATUS (*__dispcmnCtrlCmdDpSetLaneData__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_LANE_DATA_PARAMS *); // exported (id=0x731346) + NV_STATUS (*__dispcmnCtrlCmdDpSetTestpattern__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS *); // exported (id=0x731347) + NV_STATUS (*__dispcmnCtrlCmdDpMainLinkCtrl__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_MAIN_LINK_CTRL_PARAMS *); // exported (id=0x731356) + NV_STATUS (*__dispcmnCtrlCmdDpSetAudioMuteStream__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS *); // exported (id=0x731359) + NV_STATUS (*__dispcmnCtrlCmdDpGetLinkConfig__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_GET_LINK_CONFIG_PARAMS *); // exported (id=0x731360) + NV_STATUS (*__dispcmnCtrlCmdDpGetEDPData__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_GET_EDP_DATA_PARAMS *); // exported (id=0x731361) + NV_STATUS (*__dispcmnCtrlCmdDpTopologyAllocateDisplayId__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID_PARAMS *); // exported (id=0x73135b) + NV_STATUS (*__dispcmnCtrlCmdDpTopologyFreeDisplayId__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID_PARAMS *); // exported (id=0x73135c) + NV_STATUS (*__dispcmnCtrlCmdDpConfigStream__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS *); // exported (id=0x731362) + NV_STATUS (*__dispcmnCtrlCmdDpConfigSingleHeadMultiStream__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_CONFIG_SINGLE_HEAD_MULTI_STREAM_PARAMS *); // exported (id=0x73136e) + NV_STATUS (*__dispcmnCtrlCmdDpSetRateGov__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_SET_RATE_GOV_PARAMS *); // exported (id=0x731363) + NV_STATUS (*__dispcmnCtrlCmdDpSendACT__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_SEND_ACT_PARAMS *); // exported (id=0x731367) + NV_STATUS (*__dispcmnCtrlCmdDpSetManualDisplayPort__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT_PARAMS *); // exported (id=0x731365) + NV_STATUS (*__dispcmnCtrlCmdDpGetCaps__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS *); // exported (id=0x731369) + NV_STATUS (*__dispcmnCtrlCmdDpSetMSAPropertiesv2__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_V2_PARAMS *); // exported (id=0x731381) + NV_STATUS (*__dispcmnCtrlCmdDpSetStereoMSAProperties__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_SET_STEREO_MSA_PROPERTIES_PARAMS *); // exported (id=0x731378) + NV_STATUS (*__dispcmnCtrlCmdDpGenerateFakeInterrupt__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT_PARAMS *); // exported (id=0x73136b) + NV_STATUS (*__dispcmnCtrlCmdDpConfigRadScratchReg__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_CONFIG_RAD_SCRATCH_REG_PARAMS *); // exported (id=0x73136c) + NV_STATUS (*__dispcmnCtrlCmdDpSetTriggerSelect__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_SET_TRIGGER_SELECT_PARAMS *); // exported (id=0x73136f) + NV_STATUS (*__dispcmnCtrlCmdDpSetTriggerAll__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_SET_TRIGGER_ALL_PARAMS *); // exported (id=0x731370) + NV_STATUS (*__dispcmnCtrlCmdDpGetAuxLogData__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_GET_AUXLOGGER_BUFFER_DATA_PARAMS *); // exported (id=0x731373) + NV_STATUS (*__dispcmnCtrlCmdDpConfigIndexedLinkRates__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES_PARAMS *); // exported (id=0x731377) + NV_STATUS (*__dispcmnCtrlCmdDpConfigureFec__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_CONFIGURE_FEC_PARAMS *); // exported (id=0x73137a) + NV_STATUS (*__dispcmnCtrlCmdDpGetGenericInfoframe__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_PARAMS *); // exported (id=0x73137e) + NV_STATUS (*__dispcmnCtrlCmdDpGetMsaAttributes__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_GET_MSA_ATTRIBUTES_PARAMS *); // exported (id=0x73137f) + NV_STATUS (*__dispcmnCtrlCmdFrlConfigMacroPad__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_FRL_CONFIG_MACRO_PAD_PARAMS *); // exported (id=0x730502) + NV_STATUS (*__dispcmnCtrlCmdDpConfigMacroPad__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_PARAMS *); // exported (id=0x73137b) + NV_STATUS (*__dispcmnCtrlCmdDpSetPreemphasisDrivecurrentPostcursor2Data__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS *); // exported (id=0x731351) + NV_STATUS (*__dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS *); // exported (id=0x731352) + NV_STATUS (*__dispcmnControl__)(struct DispCommon * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispapi) + NV_STATUS (*__dispcmnControl_Prologue__)(struct DispCommon * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispapi) + void (*__dispcmnControl_Epilogue__)(struct DispCommon * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispapi) + NvBool (*__dispcmnAccessCallback__)(struct DispCommon * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (dispapi) + NvBool (*__dispcmnShareCallback__)(struct DispCommon * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (dispapi) + NV_STATUS (*__dispcmnGetMemInterMapParams__)(struct DispCommon * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (dispapi) + NV_STATUS (*__dispcmnCheckMemInterUnmap__)(struct DispCommon * /*this*/, NvBool); // virtual inherited (rmres) base (dispapi) + NV_STATUS (*__dispcmnGetMemoryMappingDescriptor__)(struct DispCommon * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (dispapi) + NV_STATUS (*__dispcmnControlSerialization_Prologue__)(struct DispCommon * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (dispapi) + void (*__dispcmnControlSerialization_Epilogue__)(struct DispCommon * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (dispapi) + NvBool (*__dispcmnCanCopy__)(struct DispCommon * /*this*/); // virtual inherited (res) base (dispapi) + NV_STATUS (*__dispcmnIsDuplicate__)(struct DispCommon * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (dispapi) + void (*__dispcmnPreDestruct__)(struct DispCommon * /*this*/); // virtual inherited (res) base (dispapi) + NV_STATUS (*__dispcmnControlFilter__)(struct DispCommon * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (dispapi) + NV_STATUS (*__dispcmnMap__)(struct DispCommon * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (dispapi) + NV_STATUS (*__dispcmnUnmap__)(struct DispCommon * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (dispapi) + NvBool (*__dispcmnIsPartialUnmapSupported__)(struct DispCommon * /*this*/); // inline virtual inherited (res) base (dispapi) body + NV_STATUS (*__dispcmnMapTo__)(struct DispCommon * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (dispapi) + NV_STATUS (*__dispcmnUnmapFrom__)(struct DispCommon * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (dispapi) + NvU32 (*__dispcmnGetRefCount__)(struct DispCommon * /*this*/); // virtual inherited (res) base (dispapi) + void (*__dispcmnAddAdditionalDependants__)(struct RsClient *, struct DispCommon * /*this*/, RsResourceRef *); // virtual inherited (res) base (dispapi) + PEVENTNOTIFICATION * (*__dispcmnGetNotificationListPtr__)(struct DispCommon * /*this*/); // virtual inherited (notify) base (dispapi) + struct NotifShare * (*__dispcmnGetNotificationShare__)(struct DispCommon * /*this*/); // virtual inherited (notify) base (dispapi) + void (*__dispcmnSetNotificationShare__)(struct DispCommon * /*this*/, struct NotifShare *); // virtual inherited (notify) base (dispapi) + NV_STATUS (*__dispcmnUnregisterEvent__)(struct DispCommon * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (dispapi) + NV_STATUS (*__dispcmnGetOrAllocNotifShare__)(struct DispCommon * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (dispapi) + + // Data members NvU32 hotPlugMaskToBeReported; NvU32 hotUnplugMaskToBeReported; }; @@ -1566,6 +1743,7 @@ typedef struct DispCommon DispCommon; #define __nvoc_class_id_DispCommon 0x41f4f2 #endif /* __nvoc_class_id_DispCommon */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_DispCommon; #define __staticCast_DispCommon(pThis) \ @@ -1578,1060 +1756,1244 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_DispCommon; ((DispCommon*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(DispCommon))) #endif //__nvoc_disp_objs_h_disabled - NV_STATUS __nvoc_objCreateDynamic_DispCommon(DispCommon**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_DispCommon(DispCommon**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_DispCommon(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_DispCommon((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define dispcmnCtrlCmdSystemGetVblankCounter_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetVblankCounter__ #define dispcmnCtrlCmdSystemGetVblankCounter(pDispCommon, pVBCounterParams) dispcmnCtrlCmdSystemGetVblankCounter_DISPATCH(pDispCommon, pVBCounterParams) +#define dispcmnCtrlCmdSystemGetVblankEnable_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetVblankEnable__ #define dispcmnCtrlCmdSystemGetVblankEnable(pDispCommon, pVBEnableParams) dispcmnCtrlCmdSystemGetVblankEnable_DISPATCH(pDispCommon, pVBEnableParams) +#define dispcmnCtrlCmdSystemCheckSidebandSrSupport_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemCheckSidebandSrSupport__ #define dispcmnCtrlCmdSystemCheckSidebandSrSupport(pDispCommon, pParams) dispcmnCtrlCmdSystemCheckSidebandSrSupport_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSystemGetHotplugState_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetHotplugState__ #define dispcmnCtrlCmdSystemGetHotplugState(pDispCommon, pHotplugParams) dispcmnCtrlCmdSystemGetHotplugState_DISPATCH(pDispCommon, pHotplugParams) +#define dispcmnCtrlCmdSystemGetInternalDisplays_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetInternalDisplays__ #define dispcmnCtrlCmdSystemGetInternalDisplays(pDispCommon, pInternalDisplaysParams) dispcmnCtrlCmdSystemGetInternalDisplays_DISPATCH(pDispCommon, pInternalDisplaysParams) +#define dispcmnCtrlCmdSystemGetConnectorTable_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetConnectorTable__ #define dispcmnCtrlCmdSystemGetConnectorTable(pDispCommon, pParams) dispcmnCtrlCmdSystemGetConnectorTable_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSystemVrrDisplayInfo_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemVrrDisplayInfo__ #define dispcmnCtrlCmdSystemVrrDisplayInfo(pDispCommon, pParams) dispcmnCtrlCmdSystemVrrDisplayInfo_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdVRRSetRgLineActive_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdVRRSetRgLineActive__ #define dispcmnCtrlCmdVRRSetRgLineActive(pDispCommon, pParams) dispcmnCtrlCmdVRRSetRgLineActive_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdInternalVRRSetRgLineActive_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdInternalVRRSetRgLineActive__ #define dispcmnCtrlCmdInternalVRRSetRgLineActive(pDispCommon, pParams) dispcmnCtrlCmdInternalVRRSetRgLineActive_DISPATCH(pDispCommon, pParams) -#define dispcmnCtrlCmdVblankSemControl(pDispCommon, pParams) dispcmnCtrlCmdVblankSemControl_DISPATCH(pDispCommon, pParams) -#define dispcmnCtrlCmdInternalVblankSemControl(pDispCommon, pParams) dispcmnCtrlCmdInternalVblankSemControl_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdVblankSemControlEnable_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdVblankSemControlEnable__ +#define dispcmnCtrlCmdVblankSemControlEnable(pDispCommon, pParams) dispcmnCtrlCmdVblankSemControlEnable_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdInternalVblankSemControlEnable_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdInternalVblankSemControlEnable__ +#define dispcmnCtrlCmdInternalVblankSemControlEnable(pDispCommon, pParams) dispcmnCtrlCmdInternalVblankSemControlEnable_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdVblankSemControlDisable_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdVblankSemControlDisable__ +#define dispcmnCtrlCmdVblankSemControlDisable(pDispCommon, pParams) dispcmnCtrlCmdVblankSemControlDisable_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdInternalVblankSemControlDisable_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdInternalVblankSemControlDisable__ +#define dispcmnCtrlCmdInternalVblankSemControlDisable(pDispCommon, pParams) dispcmnCtrlCmdInternalVblankSemControlDisable_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdAccelVblankSemControl_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdAccelVblankSemControl__ #define dispcmnCtrlCmdAccelVblankSemControl(pDispCommon, pParams) dispcmnCtrlCmdAccelVblankSemControl_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpEnableVrr_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpEnableVrr__ #define dispcmnCtrlCmdDpEnableVrr(pDispCommon, pParams) dispcmnCtrlCmdDpEnableVrr_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdClearELVBlock_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdClearELVBlock__ #define dispcmnCtrlCmdClearELVBlock(pDispCommon, pParams) dispcmnCtrlCmdClearELVBlock_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificDisplayChange_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificDisplayChange__ #define dispcmnCtrlCmdSpecificDisplayChange(pDispCommon, pParams) dispcmnCtrlCmdSpecificDisplayChange_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpGetSpreadSpectrum_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpGetSpreadSpectrum__ #define dispcmnCtrlCmdDfpGetSpreadSpectrum(pDispCommon, pParams) dispcmnCtrlCmdDfpGetSpreadSpectrum_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpGetLcdGpioPinNum_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpGetLcdGpioPinNum__ #define dispcmnCtrlCmdDfpGetLcdGpioPinNum(pDispCommon, pParams) dispcmnCtrlCmdDfpGetLcdGpioPinNum_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpGetAudioMuteStream_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpGetAudioMuteStream__ #define dispcmnCtrlCmdDpGetAudioMuteStream(pDispCommon, pParams) dispcmnCtrlCmdDpGetAudioMuteStream_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpAuxchI2cTransferCtrl_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpAuxchI2cTransferCtrl__ #define dispcmnCtrlCmdDpAuxchI2cTransferCtrl(pDispCommon, pParams) dispcmnCtrlCmdDpAuxchI2cTransferCtrl_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpASSRCtrl_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpASSRCtrl__ #define dispcmnCtrlCmdDpASSRCtrl(pDispCommon, pParams) dispcmnCtrlCmdDpASSRCtrl_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpSetEcf_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpSetEcf__ #define dispcmnCtrlCmdDpSetEcf(pDispCommon, pCtrlEcfParams) dispcmnCtrlCmdDpSetEcf_DISPATCH(pDispCommon, pCtrlEcfParams) +#define dispcmnCtrlCmdStereoDongleSupported_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdStereoDongleSupported__ #define dispcmnCtrlCmdStereoDongleSupported(pDispCommon, pCtrlStereoParams) dispcmnCtrlCmdStereoDongleSupported_DISPATCH(pDispCommon, pCtrlStereoParams) +#define dispcmnCtrlCmdDfpRecordChannelRegisters_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpRecordChannelRegisters__ #define dispcmnCtrlCmdDfpRecordChannelRegisters(pDispCommon, pParams) dispcmnCtrlCmdDfpRecordChannelRegisters_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificGetBacklightBrightness_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificGetBacklightBrightness__ #define dispcmnCtrlCmdSpecificGetBacklightBrightness(pDispCommon, pAllHeadMaskParams) dispcmnCtrlCmdSpecificGetBacklightBrightness_DISPATCH(pDispCommon, pAllHeadMaskParams) +#define dispcmnCtrlCmdSpecificSetBacklightBrightness_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificSetBacklightBrightness__ #define dispcmnCtrlCmdSpecificSetBacklightBrightness(pDispCommon, pParams) dispcmnCtrlCmdSpecificSetBacklightBrightness_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdPsrGetSrPanelInfo_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdPsrGetSrPanelInfo__ #define dispcmnCtrlCmdPsrGetSrPanelInfo(pDispCommon, pParams) dispcmnCtrlCmdPsrGetSrPanelInfo_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpSwitchDispMux_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpSwitchDispMux__ #define dispcmnCtrlCmdDfpSwitchDispMux(pDispCommon, pParams) dispcmnCtrlCmdDfpSwitchDispMux_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdInternalDfpSwitchDispMux_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdInternalDfpSwitchDispMux__ #define dispcmnCtrlCmdInternalDfpSwitchDispMux(pDispCommon, pParams) dispcmnCtrlCmdInternalDfpSwitchDispMux_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpRunPreDispMuxOperations_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpRunPreDispMuxOperations__ #define dispcmnCtrlCmdDfpRunPreDispMuxOperations(pDispCommon, pParams) dispcmnCtrlCmdDfpRunPreDispMuxOperations_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpRunPostDispMuxOperations_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpRunPostDispMuxOperations__ #define dispcmnCtrlCmdDfpRunPostDispMuxOperations(pDispCommon, pParams) dispcmnCtrlCmdDfpRunPostDispMuxOperations_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpGetDispMuxStatus_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpGetDispMuxStatus__ #define dispcmnCtrlCmdDfpGetDispMuxStatus(pDispCommon, pParams) dispcmnCtrlCmdDfpGetDispMuxStatus_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdInternalDfpGetDispMuxStatus_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdInternalDfpGetDispMuxStatus__ #define dispcmnCtrlCmdInternalDfpGetDispMuxStatus(pDispCommon, pParams) dispcmnCtrlCmdInternalDfpGetDispMuxStatus_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpInternalLcdOverdrive_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpInternalLcdOverdrive__ #define dispcmnCtrlCmdDfpInternalLcdOverdrive(pDispCommon, pParams) dispcmnCtrlCmdDfpInternalLcdOverdrive_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpExecuteInternalLcdOverDrivePolicy_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpExecuteInternalLcdOverDrivePolicy__ #define dispcmnCtrlCmdDfpExecuteInternalLcdOverDrivePolicy(pDispCommon, pParams) dispcmnCtrlCmdDfpExecuteInternalLcdOverDrivePolicy_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpVariableBacklightCtrl_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpVariableBacklightCtrl__ +#define dispcmnCtrlCmdDfpVariableBacklightCtrl(pDispCommon, pParams) dispcmnCtrlCmdDfpVariableBacklightCtrl_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSystemExecuteAcpiMethod_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemExecuteAcpiMethod__ #define dispcmnCtrlCmdSystemExecuteAcpiMethod(pDispCommon, pAcpiMethodParams) dispcmnCtrlCmdSystemExecuteAcpiMethod_DISPATCH(pDispCommon, pAcpiMethodParams) +#define dispcmnCtrlCmdSystemGetAcpiIdMap_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetAcpiIdMap__ #define dispcmnCtrlCmdSystemGetAcpiIdMap(pDispCommon, pAcpiIdMapParams) dispcmnCtrlCmdSystemGetAcpiIdMap_DISPATCH(pDispCommon, pAcpiIdMapParams) +#define dispcmnCtrlCmdSystemAcpiSubsystemActivated_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemAcpiSubsystemActivated__ #define dispcmnCtrlCmdSystemAcpiSubsystemActivated(pDispCommon, pParams) dispcmnCtrlCmdSystemAcpiSubsystemActivated_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificSetAcpiIdMapping_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificSetAcpiIdMapping__ #define dispcmnCtrlCmdSpecificSetAcpiIdMapping(pDispCommon, pParams) dispcmnCtrlCmdSpecificSetAcpiIdMapping_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificGetAcpiDodDisplayPortAttachment_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificGetAcpiDodDisplayPortAttachment__ #define dispcmnCtrlCmdSpecificGetAcpiDodDisplayPortAttachment(pDispCommon, pParams) dispcmnCtrlCmdSpecificGetAcpiDodDisplayPortAttachment_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSystemGetCapsV2_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetCapsV2__ #define dispcmnCtrlCmdSystemGetCapsV2(pDispCommon, pCapsParams) dispcmnCtrlCmdSystemGetCapsV2_DISPATCH(pDispCommon, pCapsParams) +#define dispcmnCtrlCmdSystemGetNumHeads_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetNumHeads__ #define dispcmnCtrlCmdSystemGetNumHeads(pDispCommon, pNumHeadsParams) dispcmnCtrlCmdSystemGetNumHeads_DISPATCH(pDispCommon, pNumHeadsParams) +#define dispcmnCtrlCmdSystemGetScanline_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetScanline__ #define dispcmnCtrlCmdSystemGetScanline(pDispCommon, pScanlineParams) dispcmnCtrlCmdSystemGetScanline_DISPATCH(pDispCommon, pScanlineParams) +#define dispcmnCtrlCmdSystemGetSuppported_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetSuppported__ #define dispcmnCtrlCmdSystemGetSuppported(pDispCommon, pSupportedParams) dispcmnCtrlCmdSystemGetSuppported_DISPATCH(pDispCommon, pSupportedParams) +#define dispcmnCtrlCmdSystemGetConnectState_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetConnectState__ #define dispcmnCtrlCmdSystemGetConnectState(pDispCommon, pConnectParams) dispcmnCtrlCmdSystemGetConnectState_DISPATCH(pDispCommon, pConnectParams) +#define dispcmnCtrlCmdSystemGetHotplugUnplugState_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetHotplugUnplugState__ #define dispcmnCtrlCmdSystemGetHotplugUnplugState(pDispCommon, pHotplugParams) dispcmnCtrlCmdSystemGetHotplugUnplugState_DISPATCH(pDispCommon, pHotplugParams) +#define dispcmnCtrlCmdInternalGetHotplugUnplugState_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdInternalGetHotplugUnplugState__ #define dispcmnCtrlCmdInternalGetHotplugUnplugState(pDispCommon, pHotplugParams) dispcmnCtrlCmdInternalGetHotplugUnplugState_DISPATCH(pDispCommon, pHotplugParams) +#define dispcmnCtrlCmdSystemGetHeadRoutingMap_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetHeadRoutingMap__ #define dispcmnCtrlCmdSystemGetHeadRoutingMap(pDispCommon, pMapParams) dispcmnCtrlCmdSystemGetHeadRoutingMap_DISPATCH(pDispCommon, pMapParams) +#define dispcmnCtrlCmdSystemGetActive_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetActive__ #define dispcmnCtrlCmdSystemGetActive(pDispCommon, pActiveParams) dispcmnCtrlCmdSystemGetActive_DISPATCH(pDispCommon, pActiveParams) +#define dispcmnCtrlCmdSystemGetBootDisplays_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetBootDisplays__ #define dispcmnCtrlCmdSystemGetBootDisplays(pDispCommon, pParams) dispcmnCtrlCmdSystemGetBootDisplays_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSystemQueryDisplayIdsWithMux_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemQueryDisplayIdsWithMux__ #define dispcmnCtrlCmdSystemQueryDisplayIdsWithMux(pDispCommon, pParams) dispcmnCtrlCmdSystemQueryDisplayIdsWithMux_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSystemCheckSidebandI2cSupport_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemCheckSidebandI2cSupport__ #define dispcmnCtrlCmdSystemCheckSidebandI2cSupport(pDispCommon, pParams) dispcmnCtrlCmdSystemCheckSidebandI2cSupport_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSystemAllocateDisplayBandwidth_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemAllocateDisplayBandwidth__ #define dispcmnCtrlCmdSystemAllocateDisplayBandwidth(pDispCommon, pParams) dispcmnCtrlCmdSystemAllocateDisplayBandwidth_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSystemGetHotplugConfig_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetHotplugConfig__ #define dispcmnCtrlCmdSystemGetHotplugConfig(pDispCommon, pHotplugParams) dispcmnCtrlCmdSystemGetHotplugConfig_DISPATCH(pDispCommon, pHotplugParams) +#define dispcmnCtrlCmdSystemGetHotplugEventConfig_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetHotplugEventConfig__ #define dispcmnCtrlCmdSystemGetHotplugEventConfig(pDispCommon, pParams) dispcmnCtrlCmdSystemGetHotplugEventConfig_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSystemSetHotplugEventConfig_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemSetHotplugEventConfig__ #define dispcmnCtrlCmdSystemSetHotplugEventConfig(pDispCommon, pParams) dispcmnCtrlCmdSystemSetHotplugEventConfig_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSystemArmLightweightSupervisor_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemArmLightweightSupervisor__ #define dispcmnCtrlCmdSystemArmLightweightSupervisor(pDispCommon, pParams) dispcmnCtrlCmdSystemArmLightweightSupervisor_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSystemConfigVrrPstateSwitch_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemConfigVrrPstateSwitch__ #define dispcmnCtrlCmdSystemConfigVrrPstateSwitch(pDispCommon, pParams) dispcmnCtrlCmdSystemConfigVrrPstateSwitch_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificGetType_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificGetType__ #define dispcmnCtrlCmdSpecificGetType(pDispCommon, pDisplayTypeParams) dispcmnCtrlCmdSpecificGetType_DISPATCH(pDispCommon, pDisplayTypeParams) +#define dispcmnCtrlCmdSpecificGetEdidV2_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificGetEdidV2__ #define dispcmnCtrlCmdSpecificGetEdidV2(pDispCommon, pEdidParams) dispcmnCtrlCmdSpecificGetEdidV2_DISPATCH(pDispCommon, pEdidParams) +#define dispcmnCtrlCmdSpecificSetEdidV2_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificSetEdidV2__ #define dispcmnCtrlCmdSpecificSetEdidV2(pDispCommon, pEdidParams) dispcmnCtrlCmdSpecificSetEdidV2_DISPATCH(pDispCommon, pEdidParams) +#define dispcmnCtrlCmdSpecificFakeDevice_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificFakeDevice__ #define dispcmnCtrlCmdSpecificFakeDevice(pDispCommon, pTestParams) dispcmnCtrlCmdSpecificFakeDevice_DISPATCH(pDispCommon, pTestParams) +#define dispcmnCtrlCmdSpecificGetConnectorData_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificGetConnectorData__ #define dispcmnCtrlCmdSpecificGetConnectorData(pDispCommon, pConnectorParams) dispcmnCtrlCmdSpecificGetConnectorData_DISPATCH(pDispCommon, pConnectorParams) +#define dispcmnCtrlCmdSpecificSetHdmiEnable_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificSetHdmiEnable__ #define dispcmnCtrlCmdSpecificSetHdmiEnable(pDispCommon, pParams) dispcmnCtrlCmdSpecificSetHdmiEnable_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificCtrlHdmi_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificCtrlHdmi__ #define dispcmnCtrlCmdSpecificCtrlHdmi(pDispCommon, pParams) dispcmnCtrlCmdSpecificCtrlHdmi_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificGetAllHeadMask_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificGetAllHeadMask__ #define dispcmnCtrlCmdSpecificGetAllHeadMask(pDispCommon, pAllHeadMaskParams) dispcmnCtrlCmdSpecificGetAllHeadMask_DISPATCH(pDispCommon, pAllHeadMaskParams) +#define dispcmnCtrlCmdSpecificSetOdPacket_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificSetOdPacket__ #define dispcmnCtrlCmdSpecificSetOdPacket(pDispCommon, pParams) dispcmnCtrlCmdSpecificSetOdPacket_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificAcquireSharedGenericPacket_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificAcquireSharedGenericPacket__ #define dispcmnCtrlCmdSpecificAcquireSharedGenericPacket(pDispCommon, pParams) dispcmnCtrlCmdSpecificAcquireSharedGenericPacket_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificSetSharedGenericPacket_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificSetSharedGenericPacket__ #define dispcmnCtrlCmdSpecificSetSharedGenericPacket(pDispCommon, pParams) dispcmnCtrlCmdSpecificSetSharedGenericPacket_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificReleaseSharedGenericPacket_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificReleaseSharedGenericPacket__ #define dispcmnCtrlCmdSpecificReleaseSharedGenericPacket(pDispCommon, pParams) dispcmnCtrlCmdSpecificReleaseSharedGenericPacket_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificSetOdPacketCtrl_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificSetOdPacketCtrl__ #define dispcmnCtrlCmdSpecificSetOdPacketCtrl(pDispCommon, pParams) dispcmnCtrlCmdSpecificSetOdPacketCtrl_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificOrGetInfo_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificOrGetInfo__ #define dispcmnCtrlCmdSpecificOrGetInfo(pDispCommon, pParams) dispcmnCtrlCmdSpecificOrGetInfo_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificGetPclkLimit_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificGetPclkLimit__ #define dispcmnCtrlCmdSpecificGetPclkLimit(pDispCommon, pParams) dispcmnCtrlCmdSpecificGetPclkLimit_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificSetHdmiSinkCaps_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificSetHdmiSinkCaps__ #define dispcmnCtrlCmdSpecificSetHdmiSinkCaps(pDispCommon, pParams) dispcmnCtrlCmdSpecificSetHdmiSinkCaps_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificSetMonitorPower_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificSetMonitorPower__ #define dispcmnCtrlCmdSpecificSetMonitorPower(pDispCommon, setMonitorPowerParams) dispcmnCtrlCmdSpecificSetMonitorPower_DISPATCH(pDispCommon, setMonitorPowerParams) +#define dispcmnCtrlCmdSpecificSetHdmiFrlLinkConfig_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificSetHdmiFrlLinkConfig__ #define dispcmnCtrlCmdSpecificSetHdmiFrlLinkConfig(pDispCommon, pParams) dispcmnCtrlCmdSpecificSetHdmiFrlLinkConfig_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificApplyEdidOverrideV2_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificApplyEdidOverrideV2__ #define dispcmnCtrlCmdSpecificApplyEdidOverrideV2(pDispCommon, pEdidOverrideParams) dispcmnCtrlCmdSpecificApplyEdidOverrideV2_DISPATCH(pDispCommon, pEdidOverrideParams) +#define dispcmnCtrlCmdSpecificGetI2cPortid_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificGetI2cPortid__ #define dispcmnCtrlCmdSpecificGetI2cPortid(pDispCommon, pParams) dispcmnCtrlCmdSpecificGetI2cPortid_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificGetHdmiGpuCaps_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificGetHdmiGpuCaps__ #define dispcmnCtrlCmdSpecificGetHdmiGpuCaps(pDispCommon, pParams) dispcmnCtrlCmdSpecificGetHdmiGpuCaps_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificGetHdmiScdcData_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificGetHdmiScdcData__ #define dispcmnCtrlCmdSpecificGetHdmiScdcData(pDispCommon, pParams) dispcmnCtrlCmdSpecificGetHdmiScdcData_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificIsDirectmodeDisplay_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificIsDirectmodeDisplay__ #define dispcmnCtrlCmdSpecificIsDirectmodeDisplay(pDispCommon, pParams) dispcmnCtrlCmdSpecificIsDirectmodeDisplay_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificDefaultAdaptivesyncDisplay_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificDefaultAdaptivesyncDisplay__ #define dispcmnCtrlCmdSpecificDefaultAdaptivesyncDisplay(pDispCommon, pParams) dispcmnCtrlCmdSpecificDefaultAdaptivesyncDisplay_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificSetHdmiFrlCapacityComputation_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificSetHdmiFrlCapacityComputation__ #define dispcmnCtrlCmdSpecificSetHdmiFrlCapacityComputation(pDispCommon, pParams) dispcmnCtrlCmdSpecificSetHdmiFrlCapacityComputation_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificDispI2cReadWrite_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificDispI2cReadWrite__ #define dispcmnCtrlCmdSpecificDispI2cReadWrite(pDispCommon, pParams) dispcmnCtrlCmdSpecificDispI2cReadWrite_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificGetValidHeadWindowAssignment_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificGetValidHeadWindowAssignment__ #define dispcmnCtrlCmdSpecificGetValidHeadWindowAssignment(pDispCommon, pParams) dispcmnCtrlCmdSpecificGetValidHeadWindowAssignment_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSpecificSetHdmiAudioMutestream_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSpecificSetHdmiAudioMutestream__ #define dispcmnCtrlCmdSpecificSetHdmiAudioMutestream(pDispCommon, pParams) dispcmnCtrlCmdSpecificSetHdmiAudioMutestream_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpEdpDriverUnload_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpEdpDriverUnload__ #define dispcmnCtrlCmdDfpEdpDriverUnload(pDispCommon, pParams) dispcmnCtrlCmdDfpEdpDriverUnload_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpGetInfo_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpGetInfo__ #define dispcmnCtrlCmdDfpGetInfo(pDispCommon, pParams) dispcmnCtrlCmdDfpGetInfo_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpGetDisplayportDongleInfo_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpGetDisplayportDongleInfo__ #define dispcmnCtrlCmdDfpGetDisplayportDongleInfo(pDispCommon, pParams) dispcmnCtrlCmdDfpGetDisplayportDongleInfo_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpSetEldAudioCaps_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpSetEldAudioCaps__ #define dispcmnCtrlCmdDfpSetEldAudioCaps(pDispCommon, pEldAudioCapsParams) dispcmnCtrlCmdDfpSetEldAudioCaps_DISPATCH(pDispCommon, pEldAudioCapsParams) +#define dispcmnCtrlCmdDfpSetAudioEnable_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpSetAudioEnable__ #define dispcmnCtrlCmdDfpSetAudioEnable(pDispCommon, pParams) dispcmnCtrlCmdDfpSetAudioEnable_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpUpdateDynamicDfpCache_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpUpdateDynamicDfpCache__ #define dispcmnCtrlCmdDfpUpdateDynamicDfpCache(pDispCommon, pParams) dispcmnCtrlCmdDfpUpdateDynamicDfpCache_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpAssignSor_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpAssignSor__ #define dispcmnCtrlCmdDfpAssignSor(pDispCommon, pParams) dispcmnCtrlCmdDfpAssignSor_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpDscCrcControl_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpDscCrcControl__ #define dispcmnCtrlCmdDfpDscCrcControl(pDispCommon, pParams) dispcmnCtrlCmdDfpDscCrcControl_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpInitMuxData_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpInitMuxData__ #define dispcmnCtrlCmdDfpInitMuxData(pDispCommon, pParams) dispcmnCtrlCmdDfpInitMuxData_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpGetDsiModeTiming_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpGetDsiModeTiming__ #define dispcmnCtrlCmdDfpGetDsiModeTiming(pDispCommon, pParams) dispcmnCtrlCmdDfpGetDsiModeTiming_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpConfigTwoHeadOneOr_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpConfigTwoHeadOneOr__ #define dispcmnCtrlCmdDfpConfigTwoHeadOneOr(pDispCommon, pParams) dispcmnCtrlCmdDfpConfigTwoHeadOneOr_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpGetPadlinkMask_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpGetPadlinkMask__ #define dispcmnCtrlCmdDfpGetPadlinkMask(pDispCommon, pParams) dispcmnCtrlCmdDfpGetPadlinkMask_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpGetFixedModeTiming_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpGetFixedModeTiming__ #define dispcmnCtrlCmdDfpGetFixedModeTiming(pDispCommon, pParams) dispcmnCtrlCmdDfpGetFixedModeTiming_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpAuxchCtrl_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpAuxchCtrl__ #define dispcmnCtrlCmdDpAuxchCtrl(pDispCommon, pAuxchCtrlParams) dispcmnCtrlCmdDpAuxchCtrl_DISPATCH(pDispCommon, pAuxchCtrlParams) +#define dispcmnCtrlCmdDpAuxchSetSema_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpAuxchSetSema__ #define dispcmnCtrlCmdDpAuxchSetSema(pDispCommon, pSemaParams) dispcmnCtrlCmdDpAuxchSetSema_DISPATCH(pDispCommon, pSemaParams) +#define dispcmnCtrlCmdDpCtrl_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpCtrl__ #define dispcmnCtrlCmdDpCtrl(pDispCommon, pParams) dispcmnCtrlCmdDpCtrl_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpGetLaneData_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpGetLaneData__ #define dispcmnCtrlCmdDpGetLaneData(pDispCommon, pParams) dispcmnCtrlCmdDpGetLaneData_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpSetLaneData_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpSetLaneData__ #define dispcmnCtrlCmdDpSetLaneData(pDispCommon, pParams) dispcmnCtrlCmdDpSetLaneData_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpSetTestpattern_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpSetTestpattern__ #define dispcmnCtrlCmdDpSetTestpattern(pDispCommon, pParams) dispcmnCtrlCmdDpSetTestpattern_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpMainLinkCtrl_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpMainLinkCtrl__ #define dispcmnCtrlCmdDpMainLinkCtrl(pDispCommon, pParams) dispcmnCtrlCmdDpMainLinkCtrl_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpSetAudioMuteStream_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpSetAudioMuteStream__ #define dispcmnCtrlCmdDpSetAudioMuteStream(pDispCommon, pParams) dispcmnCtrlCmdDpSetAudioMuteStream_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpGetLinkConfig_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpGetLinkConfig__ #define dispcmnCtrlCmdDpGetLinkConfig(pDispCommon, pParams) dispcmnCtrlCmdDpGetLinkConfig_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpGetEDPData_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpGetEDPData__ #define dispcmnCtrlCmdDpGetEDPData(pDispCommon, pParams) dispcmnCtrlCmdDpGetEDPData_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpTopologyAllocateDisplayId_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpTopologyAllocateDisplayId__ #define dispcmnCtrlCmdDpTopologyAllocateDisplayId(pDispCommon, pParams) dispcmnCtrlCmdDpTopologyAllocateDisplayId_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpTopologyFreeDisplayId_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpTopologyFreeDisplayId__ #define dispcmnCtrlCmdDpTopologyFreeDisplayId(pDispCommon, pParams) dispcmnCtrlCmdDpTopologyFreeDisplayId_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpConfigStream_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpConfigStream__ #define dispcmnCtrlCmdDpConfigStream(pDispCommon, pParams) dispcmnCtrlCmdDpConfigStream_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpConfigSingleHeadMultiStream_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpConfigSingleHeadMultiStream__ #define dispcmnCtrlCmdDpConfigSingleHeadMultiStream(pDispCommon, pParams) dispcmnCtrlCmdDpConfigSingleHeadMultiStream_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpSetRateGov_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpSetRateGov__ #define dispcmnCtrlCmdDpSetRateGov(pDispCommon, pParams) dispcmnCtrlCmdDpSetRateGov_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpSendACT_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpSendACT__ #define dispcmnCtrlCmdDpSendACT(pDispCommon, pParams) dispcmnCtrlCmdDpSendACT_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpSetManualDisplayPort_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpSetManualDisplayPort__ #define dispcmnCtrlCmdDpSetManualDisplayPort(pDispCommon, pParams) dispcmnCtrlCmdDpSetManualDisplayPort_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpGetCaps_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpGetCaps__ #define dispcmnCtrlCmdDpGetCaps(pDispCommon, pParams) dispcmnCtrlCmdDpGetCaps_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpSetMSAPropertiesv2_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpSetMSAPropertiesv2__ #define dispcmnCtrlCmdDpSetMSAPropertiesv2(pDispCommon, pParams) dispcmnCtrlCmdDpSetMSAPropertiesv2_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpSetStereoMSAProperties_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpSetStereoMSAProperties__ #define dispcmnCtrlCmdDpSetStereoMSAProperties(pDispCommon, pParams) dispcmnCtrlCmdDpSetStereoMSAProperties_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpGenerateFakeInterrupt_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpGenerateFakeInterrupt__ #define dispcmnCtrlCmdDpGenerateFakeInterrupt(pDispCommon, pParams) dispcmnCtrlCmdDpGenerateFakeInterrupt_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpConfigRadScratchReg_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpConfigRadScratchReg__ #define dispcmnCtrlCmdDpConfigRadScratchReg(pDispCommon, pParams) dispcmnCtrlCmdDpConfigRadScratchReg_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpSetTriggerSelect_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpSetTriggerSelect__ #define dispcmnCtrlCmdDpSetTriggerSelect(pDispCommon, pTriggerSelectParams) dispcmnCtrlCmdDpSetTriggerSelect_DISPATCH(pDispCommon, pTriggerSelectParams) +#define dispcmnCtrlCmdDpSetTriggerAll_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpSetTriggerAll__ #define dispcmnCtrlCmdDpSetTriggerAll(pDispCommon, pTriggerAllParams) dispcmnCtrlCmdDpSetTriggerAll_DISPATCH(pDispCommon, pTriggerAllParams) +#define dispcmnCtrlCmdDpGetAuxLogData_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpGetAuxLogData__ #define dispcmnCtrlCmdDpGetAuxLogData(pDispCommon, pDpAuxBufferWrapper) dispcmnCtrlCmdDpGetAuxLogData_DISPATCH(pDispCommon, pDpAuxBufferWrapper) +#define dispcmnCtrlCmdDpConfigIndexedLinkRates_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpConfigIndexedLinkRates__ #define dispcmnCtrlCmdDpConfigIndexedLinkRates(pDispCommon, pParams) dispcmnCtrlCmdDpConfigIndexedLinkRates_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpConfigureFec_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpConfigureFec__ #define dispcmnCtrlCmdDpConfigureFec(pDispCommon, pParams) dispcmnCtrlCmdDpConfigureFec_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpGetGenericInfoframe_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpGetGenericInfoframe__ #define dispcmnCtrlCmdDpGetGenericInfoframe(pDispCommon, pParams) dispcmnCtrlCmdDpGetGenericInfoframe_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpGetMsaAttributes_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpGetMsaAttributes__ #define dispcmnCtrlCmdDpGetMsaAttributes(pDispCommon, pParams) dispcmnCtrlCmdDpGetMsaAttributes_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdFrlConfigMacroPad_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdFrlConfigMacroPad__ #define dispcmnCtrlCmdFrlConfigMacroPad(pDispCommon, pParams) dispcmnCtrlCmdFrlConfigMacroPad_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpConfigMacroPad_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpConfigMacroPad__ #define dispcmnCtrlCmdDpConfigMacroPad(pDispCommon, pParams) dispcmnCtrlCmdDpConfigMacroPad_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpSetPreemphasisDrivecurrentPostcursor2Data_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpSetPreemphasisDrivecurrentPostcursor2Data__ #define dispcmnCtrlCmdDpSetPreemphasisDrivecurrentPostcursor2Data(pDispCommon, pParams) dispcmnCtrlCmdDpSetPreemphasisDrivecurrentPostcursor2Data_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data__ #define dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data(pDispCommon, pParams) dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data_DISPATCH(pDispCommon, pParams) -#define dispcmnShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) dispcmnShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define dispcmnCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispcmnCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define dispcmnMapTo(pResource, pParams) dispcmnMapTo_DISPATCH(pResource, pParams) -#define dispcmnAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispcmnAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define dispcmnSetNotificationShare(pNotifier, pNotifShare) dispcmnSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define dispcmnGetRefCount(pResource) dispcmnGetRefCount_DISPATCH(pResource) -#define dispcmnAddAdditionalDependants(pClient, pResource, pReference) dispcmnAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define dispcmnControl_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__dispapiControl__ +#define dispcmnControl(pDisplayApi, pCallContext, pParams) dispcmnControl_DISPATCH(pDisplayApi, pCallContext, pParams) +#define dispcmnControl_Prologue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__dispapiControl_Prologue__ #define dispcmnControl_Prologue(pDisplayApi, pCallContext, pRsParams) dispcmnControl_Prologue_DISPATCH(pDisplayApi, pCallContext, pRsParams) -#define dispcmnUnmapFrom(pResource, pParams) dispcmnUnmapFrom_DISPATCH(pResource, pParams) +#define dispcmnControl_Epilogue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__dispapiControl_Epilogue__ #define dispcmnControl_Epilogue(pDisplayApi, pCallContext, pRsParams) dispcmnControl_Epilogue_DISPATCH(pDisplayApi, pCallContext, pRsParams) -#define dispcmnControl(pDisplayApi, pCallContext, pParams) dispcmnControl_DISPATCH(pDisplayApi, pCallContext, pParams) -#define dispcmnUnmap(pResource, pCallContext, pCpuMapping) dispcmnUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define dispcmnAccessCallback_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresAccessCallback__ +#define dispcmnAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispcmnAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define dispcmnShareCallback_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresShareCallback__ +#define dispcmnShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) dispcmnShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define dispcmnGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define dispcmnGetMemInterMapParams(pRmResource, pParams) dispcmnGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define dispcmnCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define dispcmnCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispcmnCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define dispcmnGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define dispcmnGetMemoryMappingDescriptor(pRmResource, ppMemDesc) dispcmnGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define dispcmnControlFilter(pResource, pCallContext, pParams) dispcmnControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define dispcmnUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispcmnUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define dispcmnControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define dispcmnControlSerialization_Prologue(pResource, pCallContext, pParams) dispcmnControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dispcmnControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dispcmnControlSerialization_Epilogue(pResource, pCallContext, pParams) dispcmnControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispcmnCanCopy_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define dispcmnCanCopy(pResource) dispcmnCanCopy_DISPATCH(pResource) -#define dispcmnIsPartialUnmapSupported(pResource) dispcmnIsPartialUnmapSupported_DISPATCH(pResource) -#define dispcmnPreDestruct(pResource) dispcmnPreDestruct_DISPATCH(pResource) +#define dispcmnIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define dispcmnIsDuplicate(pResource, hMemory, pDuplicate) dispcmnIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dispcmnControlSerialization_Epilogue(pResource, pCallContext, pParams) dispcmnControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispcmnPreDestruct_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dispcmnPreDestruct(pResource) dispcmnPreDestruct_DISPATCH(pResource) +#define dispcmnControlFilter_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dispcmnControlFilter(pResource, pCallContext, pParams) dispcmnControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define dispcmnMap_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define dispcmnMap(pResource, pCallContext, pParams, pCpuMapping) dispcmnMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define dispcmnUnmap_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define dispcmnUnmap(pResource, pCallContext, pCpuMapping) dispcmnUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define dispcmnIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dispcmnIsPartialUnmapSupported(pResource) dispcmnIsPartialUnmapSupported_DISPATCH(pResource) +#define dispcmnMapTo_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dispcmnMapTo(pResource, pParams) dispcmnMapTo_DISPATCH(pResource, pParams) +#define dispcmnUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dispcmnUnmapFrom(pResource, pParams) dispcmnUnmapFrom_DISPATCH(pResource, pParams) +#define dispcmnGetRefCount_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dispcmnGetRefCount(pResource) dispcmnGetRefCount_DISPATCH(pResource) +#define dispcmnAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dispcmnAddAdditionalDependants(pClient, pResource, pReference) dispcmnAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define dispcmnGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define dispcmnGetNotificationListPtr(pNotifier) dispcmnGetNotificationListPtr_DISPATCH(pNotifier) +#define dispcmnGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetNotificationShare__ #define dispcmnGetNotificationShare(pNotifier) dispcmnGetNotificationShare_DISPATCH(pNotifier) -#define dispcmnMap(pResource, pCallContext, pParams, pCpuMapping) dispcmnMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define dispcmnSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define dispcmnSetNotificationShare(pNotifier, pNotifShare) dispcmnSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define dispcmnUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define dispcmnUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispcmnUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define dispcmnGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ #define dispcmnGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) dispcmnGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -NV_STATUS dispcmnCtrlCmdSystemGetVblankCounter_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_VBLANK_COUNTER_PARAMS *pVBCounterParams); +// Dispatch functions static inline NV_STATUS dispcmnCtrlCmdSystemGetVblankCounter_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_VBLANK_COUNTER_PARAMS *pVBCounterParams) { return pDispCommon->__dispcmnCtrlCmdSystemGetVblankCounter__(pDispCommon, pVBCounterParams); } -NV_STATUS dispcmnCtrlCmdSystemGetVblankEnable_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_VBLANK_ENABLE_PARAMS *pVBEnableParams); - static inline NV_STATUS dispcmnCtrlCmdSystemGetVblankEnable_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_VBLANK_ENABLE_PARAMS *pVBEnableParams) { return pDispCommon->__dispcmnCtrlCmdSystemGetVblankEnable__(pDispCommon, pVBEnableParams); } -NV_STATUS dispcmnCtrlCmdSystemCheckSidebandSrSupport_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSystemCheckSidebandSrSupport_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSystemCheckSidebandSrSupport__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSystemGetHotplugState_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_HOTPLUG_STATE_PARAMS *pHotplugParams); - static inline NV_STATUS dispcmnCtrlCmdSystemGetHotplugState_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_HOTPLUG_STATE_PARAMS *pHotplugParams) { return pDispCommon->__dispcmnCtrlCmdSystemGetHotplugState__(pDispCommon, pHotplugParams); } -NV_STATUS dispcmnCtrlCmdSystemGetInternalDisplays_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS *pInternalDisplaysParams); - static inline NV_STATUS dispcmnCtrlCmdSystemGetInternalDisplays_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS *pInternalDisplaysParams) { return pDispCommon->__dispcmnCtrlCmdSystemGetInternalDisplays__(pDispCommon, pInternalDisplaysParams); } -NV_STATUS dispcmnCtrlCmdSystemGetConnectorTable_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSystemGetConnectorTable_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSystemGetConnectorTable__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSystemVrrDisplayInfo_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_VRR_DISPLAY_INFO_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSystemVrrDisplayInfo_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_VRR_DISPLAY_INFO_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSystemVrrDisplayInfo__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdVRRSetRgLineActive_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdVRRSetRgLineActive_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdVRRSetRgLineActive__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdInternalVRRSetRgLineActive_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdInternalVRRSetRgLineActive_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdInternalVRRSetRgLineActive__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdVblankSemControl_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_PARAMS *pParams); - -static inline NV_STATUS dispcmnCtrlCmdVblankSemControl_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_PARAMS *pParams) { - return pDispCommon->__dispcmnCtrlCmdVblankSemControl__(pDispCommon, pParams); +static inline NV_STATUS dispcmnCtrlCmdVblankSemControlEnable_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE_PARAMS *pParams) { + return pDispCommon->__dispcmnCtrlCmdVblankSemControlEnable__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdInternalVblankSemControl_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_PARAMS *pParams); +static inline NV_STATUS dispcmnCtrlCmdInternalVblankSemControlEnable_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_ENABLE_PARAMS *pParams) { + return pDispCommon->__dispcmnCtrlCmdInternalVblankSemControlEnable__(pDispCommon, pParams); +} -static inline NV_STATUS dispcmnCtrlCmdInternalVblankSemControl_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_PARAMS *pParams) { - return pDispCommon->__dispcmnCtrlCmdInternalVblankSemControl__(pDispCommon, pParams); +static inline NV_STATUS dispcmnCtrlCmdVblankSemControlDisable_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE_PARAMS *pParams) { + return pDispCommon->__dispcmnCtrlCmdVblankSemControlDisable__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdAccelVblankSemControl_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS_PARAMS *pParams); +static inline NV_STATUS dispcmnCtrlCmdInternalVblankSemControlDisable_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_DISABLE_PARAMS *pParams) { + return pDispCommon->__dispcmnCtrlCmdInternalVblankSemControlDisable__(pDispCommon, pParams); +} static inline NV_STATUS dispcmnCtrlCmdAccelVblankSemControl_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdAccelVblankSemControl__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpEnableVrr_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_ENABLE_VRR_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpEnableVrr_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_ENABLE_VRR_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpEnableVrr__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdClearELVBlock_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_CLEAR_ELV_BLOCK_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdClearELVBlock_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_CLEAR_ELV_BLOCK_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdClearELVBlock__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificDisplayChange_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_DISPLAY_CHANGE_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificDisplayChange_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_DISPLAY_CHANGE_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificDisplayChange__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDfpGetSpreadSpectrum_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_SPREAD_SPECTRUM_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpGetSpreadSpectrum_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_SPREAD_SPECTRUM_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpGetSpreadSpectrum__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDfpGetLcdGpioPinNum_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_LCD_GPIO_PIN_NUM_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpGetLcdGpioPinNum_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_LCD_GPIO_PIN_NUM_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpGetLcdGpioPinNum__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpGetAudioMuteStream_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_GET_AUDIO_MUTESTREAM_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpGetAudioMuteStream_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DP_GET_AUDIO_MUTESTREAM_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpGetAudioMuteStream__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpAuxchI2cTransferCtrl_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_AUXCH_I2C_TRANSFER_CTRL_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpAuxchI2cTransferCtrl_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DP_AUXCH_I2C_TRANSFER_CTRL_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpAuxchI2cTransferCtrl__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpASSRCtrl_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_ASSR_CTRL_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpASSRCtrl_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DP_ASSR_CTRL_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpASSRCtrl__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpSetEcf_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_ECF_PARAMS *pCtrlEcfParams); - static inline NV_STATUS dispcmnCtrlCmdDpSetEcf_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_ECF_PARAMS *pCtrlEcfParams) { return pDispCommon->__dispcmnCtrlCmdDpSetEcf__(pDispCommon, pCtrlEcfParams); } -NV_STATUS dispcmnCtrlCmdStereoDongleSupported_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_STEREO_DONGLE_SUPPORTED_PARAMS *pCtrlStereoParams); - static inline NV_STATUS dispcmnCtrlCmdStereoDongleSupported_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_STEREO_DONGLE_SUPPORTED_PARAMS *pCtrlStereoParams) { return pDispCommon->__dispcmnCtrlCmdStereoDongleSupported__(pDispCommon, pCtrlStereoParams); } -NV_STATUS dispcmnCtrlCmdDfpRecordChannelRegisters_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpRecordChannelRegisters_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpRecordChannelRegisters__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificGetBacklightBrightness_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_BACKLIGHT_BRIGHTNESS_PARAMS *pAllHeadMaskParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificGetBacklightBrightness_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_BACKLIGHT_BRIGHTNESS_PARAMS *pAllHeadMaskParams) { return pDispCommon->__dispcmnCtrlCmdSpecificGetBacklightBrightness__(pDispCommon, pAllHeadMaskParams); } -NV_STATUS dispcmnCtrlCmdSpecificSetBacklightBrightness_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_BACKLIGHT_BRIGHTNESS_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificSetBacklightBrightness_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_BACKLIGHT_BRIGHTNESS_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificSetBacklightBrightness__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdPsrGetSrPanelInfo_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_PSR_GET_SR_PANEL_INFO_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdPsrGetSrPanelInfo_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_PSR_GET_SR_PANEL_INFO_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdPsrGetSrPanelInfo__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDfpSwitchDispMux_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_SWITCH_DISP_MUX_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpSwitchDispMux_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_SWITCH_DISP_MUX_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpSwitchDispMux__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdInternalDfpSwitchDispMux_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_SWITCH_DISP_MUX_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdInternalDfpSwitchDispMux_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_SWITCH_DISP_MUX_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdInternalDfpSwitchDispMux__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDfpRunPreDispMuxOperations_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_RUN_PRE_DISP_MUX_OPERATIONS_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpRunPreDispMuxOperations_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_RUN_PRE_DISP_MUX_OPERATIONS_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpRunPreDispMuxOperations__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDfpRunPostDispMuxOperations_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_RUN_POST_DISP_MUX_OPERATIONS_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpRunPostDispMuxOperations_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_RUN_POST_DISP_MUX_OPERATIONS_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpRunPostDispMuxOperations__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDfpGetDispMuxStatus_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_GET_DISP_MUX_STATUS_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpGetDispMuxStatus_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_GET_DISP_MUX_STATUS_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpGetDispMuxStatus__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdInternalDfpGetDispMuxStatus_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_GET_DISP_MUX_STATUS_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdInternalDfpGetDispMuxStatus_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_GET_DISP_MUX_STATUS_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdInternalDfpGetDispMuxStatus__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDfpInternalLcdOverdrive_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_AUXCH_OD_CTRL_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpInternalLcdOverdrive_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_AUXCH_OD_CTRL_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpInternalLcdOverdrive__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDfpExecuteInternalLcdOverDrivePolicy_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_EXECUTE_OVERDRIVE_POLICY_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpExecuteInternalLcdOverDrivePolicy_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DP_EXECUTE_OVERDRIVE_POLICY_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpExecuteInternalLcdOverDrivePolicy__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSystemExecuteAcpiMethod_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS *pAcpiMethodParams); +static inline NV_STATUS dispcmnCtrlCmdDfpVariableBacklightCtrl_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_AUXCH_VBL_CTRL_PARAMS *pParams) { + return pDispCommon->__dispcmnCtrlCmdDfpVariableBacklightCtrl__(pDispCommon, pParams); +} static inline NV_STATUS dispcmnCtrlCmdSystemExecuteAcpiMethod_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS *pAcpiMethodParams) { return pDispCommon->__dispcmnCtrlCmdSystemExecuteAcpiMethod__(pDispCommon, pAcpiMethodParams); } -NV_STATUS dispcmnCtrlCmdSystemGetAcpiIdMap_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS *pAcpiIdMapParams); - static inline NV_STATUS dispcmnCtrlCmdSystemGetAcpiIdMap_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS *pAcpiIdMapParams) { return pDispCommon->__dispcmnCtrlCmdSystemGetAcpiIdMap__(pDispCommon, pAcpiIdMapParams); } -NV_STATUS dispcmnCtrlCmdSystemAcpiSubsystemActivated_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSystemAcpiSubsystemActivated_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSystemAcpiSubsystemActivated__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificSetAcpiIdMapping_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_ACPI_ID_MAPPING_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificSetAcpiIdMapping_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_ACPI_ID_MAPPING_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificSetAcpiIdMapping__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificGetAcpiDodDisplayPortAttachment_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_GET_ACPI_DOD_DISPLAY_PORT_ATTACHMENT_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificGetAcpiDodDisplayPortAttachment_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_GET_ACPI_DOD_DISPLAY_PORT_ATTACHMENT_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificGetAcpiDodDisplayPortAttachment__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSystemGetCapsV2_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_CAPS_V2_PARAMS *pCapsParams); - static inline NV_STATUS dispcmnCtrlCmdSystemGetCapsV2_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_CAPS_V2_PARAMS *pCapsParams) { return pDispCommon->__dispcmnCtrlCmdSystemGetCapsV2__(pDispCommon, pCapsParams); } -NV_STATUS dispcmnCtrlCmdSystemGetNumHeads_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_NUM_HEADS_PARAMS *pNumHeadsParams); - static inline NV_STATUS dispcmnCtrlCmdSystemGetNumHeads_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_NUM_HEADS_PARAMS *pNumHeadsParams) { return pDispCommon->__dispcmnCtrlCmdSystemGetNumHeads__(pDispCommon, pNumHeadsParams); } -NV_STATUS dispcmnCtrlCmdSystemGetScanline_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_SCANLINE_PARAMS *pScanlineParams); - static inline NV_STATUS dispcmnCtrlCmdSystemGetScanline_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_SCANLINE_PARAMS *pScanlineParams) { return pDispCommon->__dispcmnCtrlCmdSystemGetScanline__(pDispCommon, pScanlineParams); } -NV_STATUS dispcmnCtrlCmdSystemGetSuppported_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_SUPPORTED_PARAMS *pSupportedParams); - static inline NV_STATUS dispcmnCtrlCmdSystemGetSuppported_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_SUPPORTED_PARAMS *pSupportedParams) { return pDispCommon->__dispcmnCtrlCmdSystemGetSuppported__(pDispCommon, pSupportedParams); } -NV_STATUS dispcmnCtrlCmdSystemGetConnectState_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_CONNECT_STATE_PARAMS *pConnectParams); - static inline NV_STATUS dispcmnCtrlCmdSystemGetConnectState_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_CONNECT_STATE_PARAMS *pConnectParams) { return pDispCommon->__dispcmnCtrlCmdSystemGetConnectState__(pDispCommon, pConnectParams); } -NV_STATUS dispcmnCtrlCmdSystemGetHotplugUnplugState_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS *pHotplugParams); - static inline NV_STATUS dispcmnCtrlCmdSystemGetHotplugUnplugState_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS *pHotplugParams) { return pDispCommon->__dispcmnCtrlCmdSystemGetHotplugUnplugState__(pDispCommon, pHotplugParams); } -NV_STATUS dispcmnCtrlCmdInternalGetHotplugUnplugState_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS *pHotplugParams); - static inline NV_STATUS dispcmnCtrlCmdInternalGetHotplugUnplugState_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS *pHotplugParams) { return pDispCommon->__dispcmnCtrlCmdInternalGetHotplugUnplugState__(pDispCommon, pHotplugParams); } -NV_STATUS dispcmnCtrlCmdSystemGetHeadRoutingMap_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_HEAD_ROUTING_MAP_PARAMS *pMapParams); - static inline NV_STATUS dispcmnCtrlCmdSystemGetHeadRoutingMap_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_HEAD_ROUTING_MAP_PARAMS *pMapParams) { return pDispCommon->__dispcmnCtrlCmdSystemGetHeadRoutingMap__(pDispCommon, pMapParams); } -NV_STATUS dispcmnCtrlCmdSystemGetActive_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_ACTIVE_PARAMS *pActiveParams); - static inline NV_STATUS dispcmnCtrlCmdSystemGetActive_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_ACTIVE_PARAMS *pActiveParams) { return pDispCommon->__dispcmnCtrlCmdSystemGetActive__(pDispCommon, pActiveParams); } -NV_STATUS dispcmnCtrlCmdSystemGetBootDisplays_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_BOOT_DISPLAYS_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSystemGetBootDisplays_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_BOOT_DISPLAYS_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSystemGetBootDisplays__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSystemQueryDisplayIdsWithMux_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSystemQueryDisplayIdsWithMux_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSystemQueryDisplayIdsWithMux__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSystemCheckSidebandI2cSupport_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSystemCheckSidebandI2cSupport_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSystemCheckSidebandI2cSupport__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSystemAllocateDisplayBandwidth_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSystemAllocateDisplayBandwidth_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSystemAllocateDisplayBandwidth__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSystemGetHotplugConfig_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS *pHotplugParams); - static inline NV_STATUS dispcmnCtrlCmdSystemGetHotplugConfig_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS *pHotplugParams) { return pDispCommon->__dispcmnCtrlCmdSystemGetHotplugConfig__(pDispCommon, pHotplugParams); } -NV_STATUS dispcmnCtrlCmdSystemGetHotplugEventConfig_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSystemGetHotplugEventConfig_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSystemGetHotplugEventConfig__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSystemSetHotplugEventConfig_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSystemSetHotplugEventConfig_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSystemSetHotplugEventConfig__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSystemArmLightweightSupervisor_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSystemArmLightweightSupervisor_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSystemArmLightweightSupervisor__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSystemConfigVrrPstateSwitch_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSystemConfigVrrPstateSwitch_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSystemConfigVrrPstateSwitch__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificGetType_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_TYPE_PARAMS *pDisplayTypeParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificGetType_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_TYPE_PARAMS *pDisplayTypeParams) { return pDispCommon->__dispcmnCtrlCmdSpecificGetType__(pDispCommon, pDisplayTypeParams); } -NV_STATUS dispcmnCtrlCmdSpecificGetEdidV2_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_EDID_V2_PARAMS *pEdidParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificGetEdidV2_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_EDID_V2_PARAMS *pEdidParams) { return pDispCommon->__dispcmnCtrlCmdSpecificGetEdidV2__(pDispCommon, pEdidParams); } -NV_STATUS dispcmnCtrlCmdSpecificSetEdidV2_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_EDID_V2_PARAMS *pEdidParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificSetEdidV2_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_EDID_V2_PARAMS *pEdidParams) { return pDispCommon->__dispcmnCtrlCmdSpecificSetEdidV2__(pDispCommon, pEdidParams); } -NV_STATUS dispcmnCtrlCmdSpecificFakeDevice_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SPECIFIC_FAKE_DEVICE_PARAMS *pTestParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificFakeDevice_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SPECIFIC_FAKE_DEVICE_PARAMS *pTestParams) { return pDispCommon->__dispcmnCtrlCmdSpecificFakeDevice__(pDispCommon, pTestParams); } -NV_STATUS dispcmnCtrlCmdSpecificGetConnectorData_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_CONNECTOR_DATA_PARAMS *pConnectorParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificGetConnectorData_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_CONNECTOR_DATA_PARAMS *pConnectorParams) { return pDispCommon->__dispcmnCtrlCmdSpecificGetConnectorData__(pDispCommon, pConnectorParams); } -NV_STATUS dispcmnCtrlCmdSpecificSetHdmiEnable_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_HDMI_ENABLE_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificSetHdmiEnable_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_HDMI_ENABLE_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificSetHdmiEnable__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificCtrlHdmi_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_CTRL_HDMI_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificCtrlHdmi_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_CTRL_HDMI_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificCtrlHdmi__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificGetAllHeadMask_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_ALL_HEAD_MASK_PARAMS *pAllHeadMaskParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificGetAllHeadMask_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_ALL_HEAD_MASK_PARAMS *pAllHeadMaskParams) { return pDispCommon->__dispcmnCtrlCmdSpecificGetAllHeadMask__(pDispCommon, pAllHeadMaskParams); } -NV_STATUS dispcmnCtrlCmdSpecificSetOdPacket_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_OD_PACKET_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificSetOdPacket_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_OD_PACKET_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificSetOdPacket__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificAcquireSharedGenericPacket_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_ACQUIRE_SHARED_GENERIC_PACKET_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificAcquireSharedGenericPacket_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_ACQUIRE_SHARED_GENERIC_PACKET_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificAcquireSharedGenericPacket__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificSetSharedGenericPacket_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_SHARED_GENERIC_PACKET_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificSetSharedGenericPacket_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_SHARED_GENERIC_PACKET_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificSetSharedGenericPacket__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificReleaseSharedGenericPacket_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_RELEASE_SHARED_GENERIC_PACKET_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificReleaseSharedGenericPacket_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_RELEASE_SHARED_GENERIC_PACKET_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificReleaseSharedGenericPacket__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificSetOdPacketCtrl_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_OD_PACKET_CTRL_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificSetOdPacketCtrl_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_OD_PACKET_CTRL_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificSetOdPacketCtrl__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificOrGetInfo_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_OR_GET_INFO_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificOrGetInfo_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_OR_GET_INFO_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificOrGetInfo__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificGetPclkLimit_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_PCLK_LIMIT_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificGetPclkLimit_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_PCLK_LIMIT_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificGetPclkLimit__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificSetHdmiSinkCaps_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_HDMI_SINK_CAPS_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificSetHdmiSinkCaps_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_HDMI_SINK_CAPS_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificSetHdmiSinkCaps__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificSetMonitorPower_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_MONITOR_POWER_PARAMS *setMonitorPowerParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificSetMonitorPower_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_MONITOR_POWER_PARAMS *setMonitorPowerParams) { return pDispCommon->__dispcmnCtrlCmdSpecificSetMonitorPower__(pDispCommon, setMonitorPowerParams); } -NV_STATUS dispcmnCtrlCmdSpecificSetHdmiFrlLinkConfig_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_HDMI_FRL_LINK_CONFIG_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificSetHdmiFrlLinkConfig_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_HDMI_FRL_LINK_CONFIG_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificSetHdmiFrlLinkConfig__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificApplyEdidOverrideV2_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_APPLY_EDID_OVERRIDE_V2_PARAMS *pEdidOverrideParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificApplyEdidOverrideV2_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_APPLY_EDID_OVERRIDE_V2_PARAMS *pEdidOverrideParams) { return pDispCommon->__dispcmnCtrlCmdSpecificApplyEdidOverrideV2__(pDispCommon, pEdidOverrideParams); } -NV_STATUS dispcmnCtrlCmdSpecificGetI2cPortid_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_I2C_PORTID_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificGetI2cPortid_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_I2C_PORTID_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificGetI2cPortid__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificGetHdmiGpuCaps_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_HDMI_GPU_CAPS_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificGetHdmiGpuCaps_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_HDMI_GPU_CAPS_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificGetHdmiGpuCaps__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificGetHdmiScdcData_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_HDMI_SCDC_DATA_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificGetHdmiScdcData_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_HDMI_SCDC_DATA_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificGetHdmiScdcData__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificIsDirectmodeDisplay_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_IS_DIRECTMODE_DISPLAY_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificIsDirectmodeDisplay_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_IS_DIRECTMODE_DISPLAY_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificIsDirectmodeDisplay__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificDefaultAdaptivesyncDisplay_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_DEFAULT_ADAPTIVESYNC_DISPLAY_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificDefaultAdaptivesyncDisplay_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_DEFAULT_ADAPTIVESYNC_DISPLAY_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificDefaultAdaptivesyncDisplay__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificSetHdmiFrlCapacityComputation_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_HDMI_FRL_CAPACITY_COMPUTATION_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificSetHdmiFrlCapacityComputation_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_HDMI_FRL_CAPACITY_COMPUTATION_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificSetHdmiFrlCapacityComputation__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificDispI2cReadWrite_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_DISP_I2C_READ_WRITE_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificDispI2cReadWrite_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_DISP_I2C_READ_WRITE_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificDispI2cReadWrite__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificGetValidHeadWindowAssignment_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_VALID_HEAD_WINDOW_ASSIGNMENT_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificGetValidHeadWindowAssignment_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_VALID_HEAD_WINDOW_ASSIGNMENT_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificGetValidHeadWindowAssignment__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdSpecificSetHdmiAudioMutestream_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SPECIFIC_SET_HDMI_AUDIO_MUTESTREAM_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdSpecificSetHdmiAudioMutestream_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SPECIFIC_SET_HDMI_AUDIO_MUTESTREAM_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdSpecificSetHdmiAudioMutestream__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDfpEdpDriverUnload_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_EDP_DRIVER_UNLOAD_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpEdpDriverUnload_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_EDP_DRIVER_UNLOAD_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpEdpDriverUnload__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDfpGetInfo_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_INFO_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpGetInfo_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_INFO_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpGetInfo__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDfpGetDisplayportDongleInfo_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_DISPLAYPORT_DONGLE_INFO_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpGetDisplayportDongleInfo_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_DISPLAYPORT_DONGLE_INFO_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpGetDisplayportDongleInfo__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDfpSetEldAudioCaps_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_SET_ELD_AUDIO_CAP_PARAMS *pEldAudioCapsParams); - static inline NV_STATUS dispcmnCtrlCmdDfpSetEldAudioCaps_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_SET_ELD_AUDIO_CAP_PARAMS *pEldAudioCapsParams) { return pDispCommon->__dispcmnCtrlCmdDfpSetEldAudioCaps__(pDispCommon, pEldAudioCapsParams); } -NV_STATUS dispcmnCtrlCmdDfpSetAudioEnable_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_SET_AUDIO_ENABLE_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpSetAudioEnable_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_SET_AUDIO_ENABLE_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpSetAudioEnable__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDfpUpdateDynamicDfpCache_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_UPDATE_DYNAMIC_DFP_CACHE_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpUpdateDynamicDfpCache_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_UPDATE_DYNAMIC_DFP_CACHE_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpUpdateDynamicDfpCache__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDfpAssignSor_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_ASSIGN_SOR_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpAssignSor_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_ASSIGN_SOR_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpAssignSor__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDfpDscCrcControl_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_DSC_CRC_CONTROL_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpDscCrcControl_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_DSC_CRC_CONTROL_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpDscCrcControl__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDfpInitMuxData_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_INIT_MUX_DATA_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpInitMuxData_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_INIT_MUX_DATA_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpInitMuxData__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDfpGetDsiModeTiming_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_GET_DSI_MODE_TIMING_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpGetDsiModeTiming_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_GET_DSI_MODE_TIMING_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpGetDsiModeTiming__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDfpConfigTwoHeadOneOr_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_CONFIG_TWO_HEAD_ONE_OR_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpConfigTwoHeadOneOr_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_CONFIG_TWO_HEAD_ONE_OR_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpConfigTwoHeadOneOr__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDfpGetPadlinkMask_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_PADLINK_MASK_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpGetPadlinkMask_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_PADLINK_MASK_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpGetPadlinkMask__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDfpGetFixedModeTiming_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_FIXED_MODE_TIMING_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDfpGetFixedModeTiming_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_FIXED_MODE_TIMING_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpGetFixedModeTiming__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpAuxchCtrl_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_AUXCH_CTRL_PARAMS *pAuxchCtrlParams); - static inline NV_STATUS dispcmnCtrlCmdDpAuxchCtrl_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DP_AUXCH_CTRL_PARAMS *pAuxchCtrlParams) { return pDispCommon->__dispcmnCtrlCmdDpAuxchCtrl__(pDispCommon, pAuxchCtrlParams); } -NV_STATUS dispcmnCtrlCmdDpAuxchSetSema_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_AUXCH_SET_SEMA_PARAMS *pSemaParams); - static inline NV_STATUS dispcmnCtrlCmdDpAuxchSetSema_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DP_AUXCH_SET_SEMA_PARAMS *pSemaParams) { return pDispCommon->__dispcmnCtrlCmdDpAuxchSetSema__(pDispCommon, pSemaParams); } -NV_STATUS dispcmnCtrlCmdDpCtrl_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_CTRL_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpCtrl_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DP_CTRL_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpCtrl__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpGetLaneData_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_LANE_DATA_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpGetLaneData_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DP_LANE_DATA_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpGetLaneData__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpSetLaneData_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_LANE_DATA_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpSetLaneData_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DP_LANE_DATA_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpSetLaneData__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpSetTestpattern_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpSetTestpattern_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpSetTestpattern__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpMainLinkCtrl_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_MAIN_LINK_CTRL_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpMainLinkCtrl_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DP_MAIN_LINK_CTRL_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpMainLinkCtrl__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpSetAudioMuteStream_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpSetAudioMuteStream_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpSetAudioMuteStream__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpGetLinkConfig_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_GET_LINK_CONFIG_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpGetLinkConfig_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DP_GET_LINK_CONFIG_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpGetLinkConfig__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpGetEDPData_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_GET_EDP_DATA_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpGetEDPData_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DP_GET_EDP_DATA_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpGetEDPData__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpTopologyAllocateDisplayId_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpTopologyAllocateDisplayId_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpTopologyAllocateDisplayId__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpTopologyFreeDisplayId_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpTopologyFreeDisplayId_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpTopologyFreeDisplayId__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpConfigStream_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpConfigStream_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpConfigStream__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpConfigSingleHeadMultiStream_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_CONFIG_SINGLE_HEAD_MULTI_STREAM_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpConfigSingleHeadMultiStream_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_CONFIG_SINGLE_HEAD_MULTI_STREAM_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpConfigSingleHeadMultiStream__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpSetRateGov_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_RATE_GOV_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpSetRateGov_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_RATE_GOV_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpSetRateGov__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpSendACT_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SEND_ACT_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpSendACT_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SEND_ACT_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpSendACT__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpSetManualDisplayPort_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpSetManualDisplayPort_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpSetManualDisplayPort__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpGetCaps_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpGetCaps_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpGetCaps__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpSetMSAPropertiesv2_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_V2_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpSetMSAPropertiesv2_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_V2_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpSetMSAPropertiesv2__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpSetStereoMSAProperties_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_STEREO_MSA_PROPERTIES_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpSetStereoMSAProperties_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_STEREO_MSA_PROPERTIES_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpSetStereoMSAProperties__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpGenerateFakeInterrupt_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpGenerateFakeInterrupt_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpGenerateFakeInterrupt__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpConfigRadScratchReg_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_CONFIG_RAD_SCRATCH_REG_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpConfigRadScratchReg_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_CONFIG_RAD_SCRATCH_REG_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpConfigRadScratchReg__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpSetTriggerSelect_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_TRIGGER_SELECT_PARAMS *pTriggerSelectParams); - static inline NV_STATUS dispcmnCtrlCmdDpSetTriggerSelect_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_TRIGGER_SELECT_PARAMS *pTriggerSelectParams) { return pDispCommon->__dispcmnCtrlCmdDpSetTriggerSelect__(pDispCommon, pTriggerSelectParams); } -NV_STATUS dispcmnCtrlCmdDpSetTriggerAll_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_TRIGGER_ALL_PARAMS *pTriggerAllParams); - static inline NV_STATUS dispcmnCtrlCmdDpSetTriggerAll_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_TRIGGER_ALL_PARAMS *pTriggerAllParams) { return pDispCommon->__dispcmnCtrlCmdDpSetTriggerAll__(pDispCommon, pTriggerAllParams); } -NV_STATUS dispcmnCtrlCmdDpGetAuxLogData_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_GET_AUXLOGGER_BUFFER_DATA_PARAMS *pDpAuxBufferWrapper); - static inline NV_STATUS dispcmnCtrlCmdDpGetAuxLogData_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_GET_AUXLOGGER_BUFFER_DATA_PARAMS *pDpAuxBufferWrapper) { return pDispCommon->__dispcmnCtrlCmdDpGetAuxLogData__(pDispCommon, pDpAuxBufferWrapper); } -NV_STATUS dispcmnCtrlCmdDpConfigIndexedLinkRates_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpConfigIndexedLinkRates_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpConfigIndexedLinkRates__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpConfigureFec_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_CONFIGURE_FEC_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpConfigureFec_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_CONFIGURE_FEC_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpConfigureFec__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpGetGenericInfoframe_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpGetGenericInfoframe_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpGetGenericInfoframe__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpGetMsaAttributes_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_GET_MSA_ATTRIBUTES_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpGetMsaAttributes_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DP_GET_MSA_ATTRIBUTES_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpGetMsaAttributes__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdFrlConfigMacroPad_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_FRL_CONFIG_MACRO_PAD_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdFrlConfigMacroPad_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_FRL_CONFIG_MACRO_PAD_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdFrlConfigMacroPad__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpConfigMacroPad_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpConfigMacroPad_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpConfigMacroPad__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpSetPreemphasisDrivecurrentPostcursor2Data_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpSetPreemphasisDrivecurrentPostcursor2Data_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpSetPreemphasisDrivecurrentPostcursor2Data__(pDispCommon, pParams); } -NV_STATUS dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS *pParams); - static inline NV_STATUS dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data__(pDispCommon, pParams); } -static inline NvBool dispcmnShareCallback_DISPATCH(struct DispCommon *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__dispcmnShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS dispcmnControl_DISPATCH(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pDisplayApi->__dispcmnControl__(pDisplayApi, pCallContext, pParams); } -static inline NV_STATUS dispcmnCheckMemInterUnmap_DISPATCH(struct DispCommon *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__dispcmnCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS dispcmnControl_Prologue_DISPATCH(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { + return pDisplayApi->__dispcmnControl_Prologue__(pDisplayApi, pCallContext, pRsParams); } -static inline NV_STATUS dispcmnMapTo_DISPATCH(struct DispCommon *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dispcmnMapTo__(pResource, pParams); +static inline void dispcmnControl_Epilogue_DISPATCH(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { + pDisplayApi->__dispcmnControl_Epilogue__(pDisplayApi, pCallContext, pRsParams); } static inline NvBool dispcmnAccessCallback_DISPATCH(struct DispCommon *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return pResource->__dispcmnAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline void dispcmnSetNotificationShare_DISPATCH(struct DispCommon *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__dispcmnSetNotificationShare__(pNotifier, pNotifShare); -} - -static inline NvU32 dispcmnGetRefCount_DISPATCH(struct DispCommon *pResource) { - return pResource->__dispcmnGetRefCount__(pResource); +static inline NvBool dispcmnShareCallback_DISPATCH(struct DispCommon *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__dispcmnShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline void dispcmnAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispCommon *pResource, RsResourceRef *pReference) { - pResource->__dispcmnAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS dispcmnGetMemInterMapParams_DISPATCH(struct DispCommon *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__dispcmnGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS dispcmnControl_Prologue_DISPATCH(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - return pDisplayApi->__dispcmnControl_Prologue__(pDisplayApi, pCallContext, pRsParams); +static inline NV_STATUS dispcmnCheckMemInterUnmap_DISPATCH(struct DispCommon *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__dispcmnCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS dispcmnUnmapFrom_DISPATCH(struct DispCommon *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dispcmnUnmapFrom__(pResource, pParams); +static inline NV_STATUS dispcmnGetMemoryMappingDescriptor_DISPATCH(struct DispCommon *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__dispcmnGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline void dispcmnControl_Epilogue_DISPATCH(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - pDisplayApi->__dispcmnControl_Epilogue__(pDisplayApi, pCallContext, pRsParams); +static inline NV_STATUS dispcmnControlSerialization_Prologue_DISPATCH(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dispcmnControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispcmnControl_DISPATCH(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pDisplayApi->__dispcmnControl__(pDisplayApi, pCallContext, pParams); +static inline void dispcmnControlSerialization_Epilogue_DISPATCH(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__dispcmnControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispcmnUnmap_DISPATCH(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__dispcmnUnmap__(pResource, pCallContext, pCpuMapping); +static inline NvBool dispcmnCanCopy_DISPATCH(struct DispCommon *pResource) { + return pResource->__dispcmnCanCopy__(pResource); } -static inline NV_STATUS dispcmnGetMemInterMapParams_DISPATCH(struct DispCommon *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dispcmnGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS dispcmnIsDuplicate_DISPATCH(struct DispCommon *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__dispcmnIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS dispcmnGetMemoryMappingDescriptor_DISPATCH(struct DispCommon *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__dispcmnGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void dispcmnPreDestruct_DISPATCH(struct DispCommon *pResource) { + pResource->__dispcmnPreDestruct__(pResource); } static inline NV_STATUS dispcmnControlFilter_DISPATCH(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__dispcmnControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispcmnUnregisterEvent_DISPATCH(struct DispCommon *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__dispcmnUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static inline NV_STATUS dispcmnControlSerialization_Prologue_DISPATCH(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispcmnControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS dispcmnMap_DISPATCH(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__dispcmnMap__(pResource, pCallContext, pParams, pCpuMapping); } -static inline NvBool dispcmnCanCopy_DISPATCH(struct DispCommon *pResource) { - return pResource->__dispcmnCanCopy__(pResource); +static inline NV_STATUS dispcmnUnmap_DISPATCH(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pResource->__dispcmnUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool dispcmnIsPartialUnmapSupported_DISPATCH(struct DispCommon *pResource) { return pResource->__dispcmnIsPartialUnmapSupported__(pResource); } -static inline void dispcmnPreDestruct_DISPATCH(struct DispCommon *pResource) { - pResource->__dispcmnPreDestruct__(pResource); +static inline NV_STATUS dispcmnMapTo_DISPATCH(struct DispCommon *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__dispcmnMapTo__(pResource, pParams); } -static inline NV_STATUS dispcmnIsDuplicate_DISPATCH(struct DispCommon *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dispcmnIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS dispcmnUnmapFrom_DISPATCH(struct DispCommon *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__dispcmnUnmapFrom__(pResource, pParams); } -static inline void dispcmnControlSerialization_Epilogue_DISPATCH(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispcmnControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 dispcmnGetRefCount_DISPATCH(struct DispCommon *pResource) { + return pResource->__dispcmnGetRefCount__(pResource); } -static inline PEVENTNOTIFICATION *dispcmnGetNotificationListPtr_DISPATCH(struct DispCommon *pNotifier) { +static inline void dispcmnAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispCommon *pResource, RsResourceRef *pReference) { + pResource->__dispcmnAddAdditionalDependants__(pClient, pResource, pReference); +} + +static inline PEVENTNOTIFICATION * dispcmnGetNotificationListPtr_DISPATCH(struct DispCommon *pNotifier) { return pNotifier->__dispcmnGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *dispcmnGetNotificationShare_DISPATCH(struct DispCommon *pNotifier) { +static inline struct NotifShare * dispcmnGetNotificationShare_DISPATCH(struct DispCommon *pNotifier) { return pNotifier->__dispcmnGetNotificationShare__(pNotifier); } -static inline NV_STATUS dispcmnMap_DISPATCH(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__dispcmnMap__(pResource, pCallContext, pParams, pCpuMapping); +static inline void dispcmnSetNotificationShare_DISPATCH(struct DispCommon *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__dispcmnSetNotificationShare__(pNotifier, pNotifShare); +} + +static inline NV_STATUS dispcmnUnregisterEvent_DISPATCH(struct DispCommon *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__dispcmnUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS dispcmnGetOrAllocNotifShare_DISPATCH(struct DispCommon *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return pNotifier->__dispcmnGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } +NV_STATUS dispcmnCtrlCmdSystemGetVblankCounter_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_VBLANK_COUNTER_PARAMS *pVBCounterParams); + +NV_STATUS dispcmnCtrlCmdSystemGetVblankEnable_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_VBLANK_ENABLE_PARAMS *pVBEnableParams); + +NV_STATUS dispcmnCtrlCmdSystemCheckSidebandSrSupport_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSystemGetHotplugState_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_HOTPLUG_STATE_PARAMS *pHotplugParams); + +NV_STATUS dispcmnCtrlCmdSystemGetInternalDisplays_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS *pInternalDisplaysParams); + +NV_STATUS dispcmnCtrlCmdSystemGetConnectorTable_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSystemVrrDisplayInfo_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_VRR_DISPLAY_INFO_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdVRRSetRgLineActive_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdInternalVRRSetRgLineActive_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdVblankSemControlEnable_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdInternalVblankSemControlEnable_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_ENABLE_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdVblankSemControlDisable_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdInternalVblankSemControlDisable_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_DISABLE_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdAccelVblankSemControl_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpEnableVrr_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_ENABLE_VRR_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdClearELVBlock_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_CLEAR_ELV_BLOCK_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificDisplayChange_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_DISPLAY_CHANGE_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpGetSpreadSpectrum_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_SPREAD_SPECTRUM_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpGetLcdGpioPinNum_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_LCD_GPIO_PIN_NUM_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpGetAudioMuteStream_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_GET_AUDIO_MUTESTREAM_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpAuxchI2cTransferCtrl_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_AUXCH_I2C_TRANSFER_CTRL_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpASSRCtrl_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_ASSR_CTRL_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpSetEcf_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_ECF_PARAMS *pCtrlEcfParams); + +NV_STATUS dispcmnCtrlCmdStereoDongleSupported_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_STEREO_DONGLE_SUPPORTED_PARAMS *pCtrlStereoParams); + +NV_STATUS dispcmnCtrlCmdDfpRecordChannelRegisters_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificGetBacklightBrightness_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_BACKLIGHT_BRIGHTNESS_PARAMS *pAllHeadMaskParams); + +NV_STATUS dispcmnCtrlCmdSpecificSetBacklightBrightness_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_BACKLIGHT_BRIGHTNESS_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdPsrGetSrPanelInfo_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_PSR_GET_SR_PANEL_INFO_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpSwitchDispMux_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_SWITCH_DISP_MUX_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdInternalDfpSwitchDispMux_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_SWITCH_DISP_MUX_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpRunPreDispMuxOperations_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_RUN_PRE_DISP_MUX_OPERATIONS_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpRunPostDispMuxOperations_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_RUN_POST_DISP_MUX_OPERATIONS_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpGetDispMuxStatus_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_GET_DISP_MUX_STATUS_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdInternalDfpGetDispMuxStatus_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_GET_DISP_MUX_STATUS_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpInternalLcdOverdrive_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_AUXCH_OD_CTRL_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpExecuteInternalLcdOverDrivePolicy_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_EXECUTE_OVERDRIVE_POLICY_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpVariableBacklightCtrl_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_AUXCH_VBL_CTRL_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSystemExecuteAcpiMethod_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS *pAcpiMethodParams); + +NV_STATUS dispcmnCtrlCmdSystemGetAcpiIdMap_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS *pAcpiIdMapParams); + +NV_STATUS dispcmnCtrlCmdSystemAcpiSubsystemActivated_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificSetAcpiIdMapping_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_ACPI_ID_MAPPING_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificGetAcpiDodDisplayPortAttachment_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_GET_ACPI_DOD_DISPLAY_PORT_ATTACHMENT_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSystemGetCapsV2_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_CAPS_V2_PARAMS *pCapsParams); + +NV_STATUS dispcmnCtrlCmdSystemGetNumHeads_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_NUM_HEADS_PARAMS *pNumHeadsParams); + +NV_STATUS dispcmnCtrlCmdSystemGetScanline_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_SCANLINE_PARAMS *pScanlineParams); + +NV_STATUS dispcmnCtrlCmdSystemGetSuppported_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_SUPPORTED_PARAMS *pSupportedParams); + +NV_STATUS dispcmnCtrlCmdSystemGetConnectState_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_CONNECT_STATE_PARAMS *pConnectParams); + +NV_STATUS dispcmnCtrlCmdSystemGetHotplugUnplugState_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS *pHotplugParams); + +NV_STATUS dispcmnCtrlCmdInternalGetHotplugUnplugState_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS *pHotplugParams); + +NV_STATUS dispcmnCtrlCmdSystemGetHeadRoutingMap_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_HEAD_ROUTING_MAP_PARAMS *pMapParams); + +NV_STATUS dispcmnCtrlCmdSystemGetActive_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_ACTIVE_PARAMS *pActiveParams); + +NV_STATUS dispcmnCtrlCmdSystemGetBootDisplays_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_BOOT_DISPLAYS_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSystemQueryDisplayIdsWithMux_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSystemCheckSidebandI2cSupport_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSystemAllocateDisplayBandwidth_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSystemGetHotplugConfig_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS *pHotplugParams); + +NV_STATUS dispcmnCtrlCmdSystemGetHotplugEventConfig_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSystemSetHotplugEventConfig_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSystemArmLightweightSupervisor_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSystemConfigVrrPstateSwitch_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificGetType_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_TYPE_PARAMS *pDisplayTypeParams); + +NV_STATUS dispcmnCtrlCmdSpecificGetEdidV2_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_EDID_V2_PARAMS *pEdidParams); + +NV_STATUS dispcmnCtrlCmdSpecificSetEdidV2_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_EDID_V2_PARAMS *pEdidParams); + +NV_STATUS dispcmnCtrlCmdSpecificFakeDevice_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SPECIFIC_FAKE_DEVICE_PARAMS *pTestParams); + +NV_STATUS dispcmnCtrlCmdSpecificGetConnectorData_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_CONNECTOR_DATA_PARAMS *pConnectorParams); + +NV_STATUS dispcmnCtrlCmdSpecificSetHdmiEnable_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_HDMI_ENABLE_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificCtrlHdmi_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_CTRL_HDMI_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificGetAllHeadMask_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_ALL_HEAD_MASK_PARAMS *pAllHeadMaskParams); + +NV_STATUS dispcmnCtrlCmdSpecificSetOdPacket_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_OD_PACKET_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificAcquireSharedGenericPacket_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_ACQUIRE_SHARED_GENERIC_PACKET_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificSetSharedGenericPacket_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_SHARED_GENERIC_PACKET_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificReleaseSharedGenericPacket_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_RELEASE_SHARED_GENERIC_PACKET_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificSetOdPacketCtrl_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_OD_PACKET_CTRL_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificOrGetInfo_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_OR_GET_INFO_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificGetPclkLimit_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_PCLK_LIMIT_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificSetHdmiSinkCaps_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_HDMI_SINK_CAPS_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificSetMonitorPower_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_MONITOR_POWER_PARAMS *setMonitorPowerParams); + +NV_STATUS dispcmnCtrlCmdSpecificSetHdmiFrlLinkConfig_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_SET_HDMI_FRL_LINK_CONFIG_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificApplyEdidOverrideV2_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_APPLY_EDID_OVERRIDE_V2_PARAMS *pEdidOverrideParams); + +NV_STATUS dispcmnCtrlCmdSpecificGetI2cPortid_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_I2C_PORTID_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificGetHdmiGpuCaps_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_HDMI_GPU_CAPS_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificGetHdmiScdcData_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_HDMI_SCDC_DATA_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificIsDirectmodeDisplay_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_IS_DIRECTMODE_DISPLAY_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificDefaultAdaptivesyncDisplay_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_DEFAULT_ADAPTIVESYNC_DISPLAY_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificSetHdmiFrlCapacityComputation_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_HDMI_FRL_CAPACITY_COMPUTATION_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificDispI2cReadWrite_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_DISP_I2C_READ_WRITE_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificGetValidHeadWindowAssignment_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SPECIFIC_GET_VALID_HEAD_WINDOW_ASSIGNMENT_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdSpecificSetHdmiAudioMutestream_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SPECIFIC_SET_HDMI_AUDIO_MUTESTREAM_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpEdpDriverUnload_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_EDP_DRIVER_UNLOAD_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpGetInfo_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_INFO_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpGetDisplayportDongleInfo_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_DISPLAYPORT_DONGLE_INFO_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpSetEldAudioCaps_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_SET_ELD_AUDIO_CAP_PARAMS *pEldAudioCapsParams); + +NV_STATUS dispcmnCtrlCmdDfpSetAudioEnable_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_SET_AUDIO_ENABLE_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpUpdateDynamicDfpCache_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_UPDATE_DYNAMIC_DFP_CACHE_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpAssignSor_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_ASSIGN_SOR_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpDscCrcControl_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_DSC_CRC_CONTROL_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpInitMuxData_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_INIT_MUX_DATA_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpGetDsiModeTiming_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DFP_GET_DSI_MODE_TIMING_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpConfigTwoHeadOneOr_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_CONFIG_TWO_HEAD_ONE_OR_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpGetPadlinkMask_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_PADLINK_MASK_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDfpGetFixedModeTiming_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_FIXED_MODE_TIMING_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpAuxchCtrl_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_AUXCH_CTRL_PARAMS *pAuxchCtrlParams); + +NV_STATUS dispcmnCtrlCmdDpAuxchSetSema_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_AUXCH_SET_SEMA_PARAMS *pSemaParams); + +NV_STATUS dispcmnCtrlCmdDpCtrl_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_CTRL_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpGetLaneData_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_LANE_DATA_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpSetLaneData_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_LANE_DATA_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpSetTestpattern_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpMainLinkCtrl_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_MAIN_LINK_CTRL_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpSetAudioMuteStream_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpGetLinkConfig_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_GET_LINK_CONFIG_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpGetEDPData_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_GET_EDP_DATA_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpTopologyAllocateDisplayId_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpTopologyFreeDisplayId_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpConfigStream_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpConfigSingleHeadMultiStream_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_CONFIG_SINGLE_HEAD_MULTI_STREAM_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpSetRateGov_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_RATE_GOV_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpSendACT_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SEND_ACT_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpSetManualDisplayPort_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpGetCaps_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpSetMSAPropertiesv2_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_V2_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpSetStereoMSAProperties_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_STEREO_MSA_PROPERTIES_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpGenerateFakeInterrupt_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpConfigRadScratchReg_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_CONFIG_RAD_SCRATCH_REG_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpSetTriggerSelect_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_TRIGGER_SELECT_PARAMS *pTriggerSelectParams); + +NV_STATUS dispcmnCtrlCmdDpSetTriggerAll_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_SET_TRIGGER_ALL_PARAMS *pTriggerAllParams); + +NV_STATUS dispcmnCtrlCmdDpGetAuxLogData_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_GET_AUXLOGGER_BUFFER_DATA_PARAMS *pDpAuxBufferWrapper); + +NV_STATUS dispcmnCtrlCmdDpConfigIndexedLinkRates_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpConfigureFec_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_CONFIGURE_FEC_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpGetGenericInfoframe_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpGetMsaAttributes_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_GET_MSA_ATTRIBUTES_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdFrlConfigMacroPad_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_FRL_CONFIG_MACRO_PAD_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpConfigMacroPad_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpSetPreemphasisDrivecurrentPostcursor2Data_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS *pParams); + +NV_STATUS dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS *pParams); + NV_STATUS dispcmnConstruct_IMPL(struct DispCommon *arg_pDispCommon, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_dispcmnConstruct(arg_pDispCommon, arg_pCallContext, arg_pParams) dispcmnConstruct_IMPL(arg_pDispCommon, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_disp_sf_user_nvoc.c b/src/nvidia/generated/g_disp_sf_user_nvoc.c index 0e0fdb02f5..9fb97f80aa 100644 --- a/src/nvidia/generated/g_disp_sf_user_nvoc.c +++ b/src/nvidia/generated/g_disp_sf_user_nvoc.c @@ -93,106 +93,137 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DispSfUser = /*pExportInfo=*/ &__nvoc_export_info_DispSfUser }; -static NV_STATUS __nvoc_thunk_DispSfUser_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pDispSfUser, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return dispsfGetRegBaseOffsetAndSize((struct DispSfUser *)(((unsigned char *)pDispSfUser) - __nvoc_rtti_DispSfUser_GpuResource.offset), pGpu, pOffset, pSize); +// 1 down-thunk(s) defined to bridge methods in DispSfUser from superclasses + +// dispsfGetRegBaseOffsetAndSize: virtual override (gpures) base (gpures) +static NV_STATUS __nvoc_down_thunk_DispSfUser_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pDispSfUser, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return dispsfGetRegBaseOffsetAndSize((struct DispSfUser *)(((unsigned char *) pDispSfUser) - __nvoc_rtti_DispSfUser_GpuResource.offset), pGpu, pOffset, pSize); } -static NvBool __nvoc_thunk_GpuResource_dispsfShareCallback(struct DispSfUser *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); + +// 24 up-thunk(s) defined to bridge methods in DispSfUser to superclasses + +// dispsfControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispsfControl(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_dispsfCheckMemInterUnmap(struct DispSfUser *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispSfUser_RmResource.offset), bSubdeviceHandleProvided); +// dispsfMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispsfMap(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_dispsfMapTo(struct DispSfUser *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSfUser_RsResource.offset), pParams); +// dispsfUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispsfUnmap(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_GpuResource_dispsfGetMapAddrSpace(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// dispsfShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_dispsfShareCallback(struct DispSfUser *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NvU32 __nvoc_thunk_RsResource_dispsfGetRefCount(struct DispSfUser *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSfUser_RsResource.offset)); +// dispsfGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispsfGetMapAddrSpace(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static void __nvoc_thunk_RsResource_dispsfAddAdditionalDependants(struct RsClient *pClient, struct DispSfUser *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSfUser_RsResource.offset), pReference); +// dispsfInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispsfInternalControlForward(struct DispSfUser *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_RmResource_dispsfControl_Prologue(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSfUser_RmResource.offset), pCallContext, pParams); +// dispsfGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_dispsfGetInternalObjectHandle(struct DispSfUser *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_dispsfInternalControlForward(struct DispSfUser *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset), command, pParams, size); +// dispsfAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_dispsfAccessCallback(struct DispSfUser *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RsResource_dispsfUnmapFrom(struct DispSfUser *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSfUser_RsResource.offset), pParams); +// dispsfGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_dispsfGetMemInterMapParams(struct DispSfUser *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispSfUser_RmResource.offset), pParams); } -static void __nvoc_thunk_RmResource_dispsfControl_Epilogue(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSfUser_RmResource.offset), pCallContext, pParams); +// dispsfCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_dispsfCheckMemInterUnmap(struct DispSfUser *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispSfUser_RmResource.offset), bSubdeviceHandleProvided); } -static NvHandle __nvoc_thunk_GpuResource_dispsfGetInternalObjectHandle(struct DispSfUser *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset)); +// dispsfGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_dispsfGetMemoryMappingDescriptor(struct DispSfUser *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispSfUser_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_GpuResource_dispsfControl(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset), pCallContext, pParams); +// dispsfControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_dispsfControlSerialization_Prologue(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_dispsfUnmap(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset), pCallContext, pCpuMapping); +// dispsfControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_dispsfControlSerialization_Epilogue(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_dispsfGetMemInterMapParams(struct DispSfUser *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispSfUser_RmResource.offset), pParams); +// dispsfControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_dispsfControl_Prologue(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_dispsfGetMemoryMappingDescriptor(struct DispSfUser *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispSfUser_RmResource.offset), ppMemDesc); +// dispsfControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_dispsfControl_Epilogue(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_dispsfControlFilter(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSfUser_RsResource.offset), pCallContext, pParams); +// dispsfCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_dispsfCanCopy(struct DispSfUser *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RmResource_dispsfControlSerialization_Prologue(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSfUser_RmResource.offset), pCallContext, pParams); +// dispsfIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_dispsfIsDuplicate(struct DispSfUser *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RsResource.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_RsResource_dispsfCanCopy(struct DispSfUser *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSfUser_RsResource.offset)); +// dispsfPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_dispsfPreDestruct(struct DispSfUser *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_dispsfIsPartialUnmapSupported(struct DispSfUser *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSfUser_RsResource.offset)); +// dispsfControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_dispsfControlFilter(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_dispsfPreDestruct(struct DispSfUser *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSfUser_RsResource.offset)); +// dispsfIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_dispsfIsPartialUnmapSupported(struct DispSfUser *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_dispsfIsDuplicate(struct DispSfUser *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSfUser_RsResource.offset), hMemory, pDuplicate); +// dispsfMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_dispsfMapTo(struct DispSfUser *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_dispsfControlSerialization_Epilogue(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSfUser_RmResource.offset), pCallContext, pParams); +// dispsfUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_dispsfUnmapFrom(struct DispSfUser *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_dispsfMap(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// dispsfGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_dispsfGetRefCount(struct DispSfUser *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_dispsfAccessCallback(struct DispSfUser *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSfUser_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// dispsfAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_dispsfAddAdditionalDependants(struct RsClient *pClient, struct DispSfUser *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_DispSfUser = { /*numEntries=*/ 0, @@ -228,63 +259,92 @@ NV_STATUS __nvoc_ctor_DispSfUser(DispSfUser *pThis, struct CALL_CONTEXT * arg_pC return status; } +// Vtable initialization static void __nvoc_init_funcTable_DispSfUser_1(DispSfUser *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // dispsfGetRegBaseOffsetAndSize -- virtual override (gpures) base (gpures) pThis->__dispsfGetRegBaseOffsetAndSize__ = &dispsfGetRegBaseOffsetAndSize_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &__nvoc_down_thunk_DispSfUser_gpuresGetRegBaseOffsetAndSize; - pThis->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &__nvoc_thunk_DispSfUser_gpuresGetRegBaseOffsetAndSize; + // dispsfControl -- virtual inherited (gpures) base (gpures) + pThis->__dispsfControl__ = &__nvoc_up_thunk_GpuResource_dispsfControl; - pThis->__dispsfShareCallback__ = &__nvoc_thunk_GpuResource_dispsfShareCallback; + // dispsfMap -- virtual inherited (gpures) base (gpures) + pThis->__dispsfMap__ = &__nvoc_up_thunk_GpuResource_dispsfMap; - pThis->__dispsfCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_dispsfCheckMemInterUnmap; + // dispsfUnmap -- virtual inherited (gpures) base (gpures) + pThis->__dispsfUnmap__ = &__nvoc_up_thunk_GpuResource_dispsfUnmap; - pThis->__dispsfMapTo__ = &__nvoc_thunk_RsResource_dispsfMapTo; + // dispsfShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__dispsfShareCallback__ = &__nvoc_up_thunk_GpuResource_dispsfShareCallback; - pThis->__dispsfGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_dispsfGetMapAddrSpace; + // dispsfGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__dispsfGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_dispsfGetMapAddrSpace; - pThis->__dispsfGetRefCount__ = &__nvoc_thunk_RsResource_dispsfGetRefCount; + // dispsfInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__dispsfInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dispsfInternalControlForward; - pThis->__dispsfAddAdditionalDependants__ = &__nvoc_thunk_RsResource_dispsfAddAdditionalDependants; + // dispsfGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__dispsfGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dispsfGetInternalObjectHandle; - pThis->__dispsfControl_Prologue__ = &__nvoc_thunk_RmResource_dispsfControl_Prologue; + // dispsfAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__dispsfAccessCallback__ = &__nvoc_up_thunk_RmResource_dispsfAccessCallback; - pThis->__dispsfInternalControlForward__ = &__nvoc_thunk_GpuResource_dispsfInternalControlForward; + // dispsfGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__dispsfGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispsfGetMemInterMapParams; - pThis->__dispsfUnmapFrom__ = &__nvoc_thunk_RsResource_dispsfUnmapFrom; + // dispsfCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__dispsfCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispsfCheckMemInterUnmap; - pThis->__dispsfControl_Epilogue__ = &__nvoc_thunk_RmResource_dispsfControl_Epilogue; + // dispsfGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__dispsfGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispsfGetMemoryMappingDescriptor; - pThis->__dispsfGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_dispsfGetInternalObjectHandle; + // dispsfControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__dispsfControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispsfControlSerialization_Prologue; - pThis->__dispsfControl__ = &__nvoc_thunk_GpuResource_dispsfControl; + // dispsfControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__dispsfControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispsfControlSerialization_Epilogue; - pThis->__dispsfUnmap__ = &__nvoc_thunk_GpuResource_dispsfUnmap; + // dispsfControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__dispsfControl_Prologue__ = &__nvoc_up_thunk_RmResource_dispsfControl_Prologue; - pThis->__dispsfGetMemInterMapParams__ = &__nvoc_thunk_RmResource_dispsfGetMemInterMapParams; + // dispsfControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__dispsfControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dispsfControl_Epilogue; - pThis->__dispsfGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_dispsfGetMemoryMappingDescriptor; + // dispsfCanCopy -- virtual inherited (res) base (gpures) + pThis->__dispsfCanCopy__ = &__nvoc_up_thunk_RsResource_dispsfCanCopy; - pThis->__dispsfControlFilter__ = &__nvoc_thunk_RsResource_dispsfControlFilter; + // dispsfIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__dispsfIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispsfIsDuplicate; - pThis->__dispsfControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_dispsfControlSerialization_Prologue; + // dispsfPreDestruct -- virtual inherited (res) base (gpures) + pThis->__dispsfPreDestruct__ = &__nvoc_up_thunk_RsResource_dispsfPreDestruct; - pThis->__dispsfCanCopy__ = &__nvoc_thunk_RsResource_dispsfCanCopy; + // dispsfControlFilter -- virtual inherited (res) base (gpures) + pThis->__dispsfControlFilter__ = &__nvoc_up_thunk_RsResource_dispsfControlFilter; - pThis->__dispsfIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_dispsfIsPartialUnmapSupported; + // dispsfIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__dispsfIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispsfIsPartialUnmapSupported; - pThis->__dispsfPreDestruct__ = &__nvoc_thunk_RsResource_dispsfPreDestruct; + // dispsfMapTo -- virtual inherited (res) base (gpures) + pThis->__dispsfMapTo__ = &__nvoc_up_thunk_RsResource_dispsfMapTo; - pThis->__dispsfIsDuplicate__ = &__nvoc_thunk_RsResource_dispsfIsDuplicate; + // dispsfUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__dispsfUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispsfUnmapFrom; - pThis->__dispsfControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_dispsfControlSerialization_Epilogue; + // dispsfGetRefCount -- virtual inherited (res) base (gpures) + pThis->__dispsfGetRefCount__ = &__nvoc_up_thunk_RsResource_dispsfGetRefCount; - pThis->__dispsfMap__ = &__nvoc_thunk_GpuResource_dispsfMap; + // dispsfAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__dispsfAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispsfAddAdditionalDependants; +} // End __nvoc_init_funcTable_DispSfUser_1 with approximately 26 basic block(s). - pThis->__dispsfAccessCallback__ = &__nvoc_thunk_RmResource_dispsfAccessCallback; -} +// Initialize vtable(s) for 25 virtual method(s). void __nvoc_init_funcTable_DispSfUser(DispSfUser *pThis) { + + // Initialize vtable(s) with 25 per-object function pointer(s). __nvoc_init_funcTable_DispSfUser_1(pThis); } diff --git a/src/nvidia/generated/g_disp_sf_user_nvoc.h b/src/nvidia/generated/g_disp_sf_user_nvoc.h index cd4fe02bdb..ed38b1b58e 100644 --- a/src/nvidia/generated/g_disp_sf_user_nvoc.h +++ b/src/nvidia/generated/g_disp_sf_user_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_DISP_SF_USER_NVOC_H_ #define _G_DISP_SF_USER_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -36,6 +43,7 @@ extern "C" { * ******************************************************************************/ +#pragma once #include "g_disp_sf_user_nvoc.h" #ifndef DISP_SF_USER_H @@ -56,40 +64,51 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct DispSfUser { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct DispSfUser *__nvoc_pbase_DispSfUser; - NV_STATUS (*__dispsfGetRegBaseOffsetAndSize__)(struct DispSfUser *, struct OBJGPU *, NvU32 *, NvU32 *); - NvBool (*__dispsfShareCallback__)(struct DispSfUser *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__dispsfCheckMemInterUnmap__)(struct DispSfUser *, NvBool); - NV_STATUS (*__dispsfMapTo__)(struct DispSfUser *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__dispsfGetMapAddrSpace__)(struct DispSfUser *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__dispsfGetRefCount__)(struct DispSfUser *); - void (*__dispsfAddAdditionalDependants__)(struct RsClient *, struct DispSfUser *, RsResourceRef *); - NV_STATUS (*__dispsfControl_Prologue__)(struct DispSfUser *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispsfInternalControlForward__)(struct DispSfUser *, NvU32, void *, NvU32); - NV_STATUS (*__dispsfUnmapFrom__)(struct DispSfUser *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__dispsfControl_Epilogue__)(struct DispSfUser *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__dispsfGetInternalObjectHandle__)(struct DispSfUser *); - NV_STATUS (*__dispsfControl__)(struct DispSfUser *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispsfUnmap__)(struct DispSfUser *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__dispsfGetMemInterMapParams__)(struct DispSfUser *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__dispsfGetMemoryMappingDescriptor__)(struct DispSfUser *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__dispsfControlFilter__)(struct DispSfUser *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispsfControlSerialization_Prologue__)(struct DispSfUser *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__dispsfCanCopy__)(struct DispSfUser *); - NvBool (*__dispsfIsPartialUnmapSupported__)(struct DispSfUser *); - void (*__dispsfPreDestruct__)(struct DispSfUser *); - NV_STATUS (*__dispsfIsDuplicate__)(struct DispSfUser *, NvHandle, NvBool *); - void (*__dispsfControlSerialization_Epilogue__)(struct DispSfUser *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispsfMap__)(struct DispSfUser *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__dispsfAccessCallback__)(struct DispSfUser *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct DispSfUser *__nvoc_pbase_DispSfUser; // dispsf + + // Vtable with 25 per-object function pointers + NV_STATUS (*__dispsfGetRegBaseOffsetAndSize__)(struct DispSfUser * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual override (gpures) base (gpures) + NV_STATUS (*__dispsfControl__)(struct DispSfUser * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__dispsfMap__)(struct DispSfUser * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__dispsfUnmap__)(struct DispSfUser * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__dispsfShareCallback__)(struct DispSfUser * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__dispsfGetMapAddrSpace__)(struct DispSfUser * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__dispsfInternalControlForward__)(struct DispSfUser * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__dispsfGetInternalObjectHandle__)(struct DispSfUser * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__dispsfAccessCallback__)(struct DispSfUser * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__dispsfGetMemInterMapParams__)(struct DispSfUser * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__dispsfCheckMemInterUnmap__)(struct DispSfUser * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__dispsfGetMemoryMappingDescriptor__)(struct DispSfUser * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__dispsfControlSerialization_Prologue__)(struct DispSfUser * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__dispsfControlSerialization_Epilogue__)(struct DispSfUser * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__dispsfControl_Prologue__)(struct DispSfUser * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__dispsfControl_Epilogue__)(struct DispSfUser * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__dispsfCanCopy__)(struct DispSfUser * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__dispsfIsDuplicate__)(struct DispSfUser * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__dispsfPreDestruct__)(struct DispSfUser * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__dispsfControlFilter__)(struct DispSfUser * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__dispsfIsPartialUnmapSupported__)(struct DispSfUser * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__dispsfMapTo__)(struct DispSfUser * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__dispsfUnmapFrom__)(struct DispSfUser * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__dispsfGetRefCount__)(struct DispSfUser * /*this*/); // virtual inherited (res) base (gpures) + void (*__dispsfAddAdditionalDependants__)(struct RsClient *, struct DispSfUser * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members NvU32 ControlOffset; NvU32 ControlLength; }; @@ -103,6 +122,7 @@ typedef struct DispSfUser DispSfUser; #define __nvoc_class_id_DispSfUser 0xba7439 #endif /* __nvoc_class_id_DispSfUser */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_DispSfUser; #define __staticCast_DispSfUser(pThis) \ @@ -115,139 +135,167 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_DispSfUser; ((DispSfUser*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(DispSfUser))) #endif //__nvoc_disp_sf_user_h_disabled - NV_STATUS __nvoc_objCreateDynamic_DispSfUser(DispSfUser**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_DispSfUser(DispSfUser**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_DispSfUser(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_DispSfUser((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define dispsfGetRegBaseOffsetAndSize_FNPTR(pDispSfUser) pDispSfUser->__dispsfGetRegBaseOffsetAndSize__ #define dispsfGetRegBaseOffsetAndSize(pDispSfUser, pGpu, pOffset, pSize) dispsfGetRegBaseOffsetAndSize_DISPATCH(pDispSfUser, pGpu, pOffset, pSize) +#define dispsfControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define dispsfControl(pGpuResource, pCallContext, pParams) dispsfControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define dispsfMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define dispsfMap(pGpuResource, pCallContext, pParams, pCpuMapping) dispsfMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define dispsfUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define dispsfUnmap(pGpuResource, pCallContext, pCpuMapping) dispsfUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define dispsfShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define dispsfShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) dispsfShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define dispsfCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispsfCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define dispsfMapTo(pResource, pParams) dispsfMapTo_DISPATCH(pResource, pParams) +#define dispsfGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ #define dispsfGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) dispsfGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define dispsfGetRefCount(pResource) dispsfGetRefCount_DISPATCH(pResource) -#define dispsfAddAdditionalDependants(pClient, pResource, pReference) dispsfAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define dispsfControl_Prologue(pResource, pCallContext, pParams) dispsfControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dispsfInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define dispsfInternalControlForward(pGpuResource, command, pParams, size) dispsfInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define dispsfUnmapFrom(pResource, pParams) dispsfUnmapFrom_DISPATCH(pResource, pParams) -#define dispsfControl_Epilogue(pResource, pCallContext, pParams) dispsfControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispsfGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define dispsfGetInternalObjectHandle(pGpuResource) dispsfGetInternalObjectHandle_DISPATCH(pGpuResource) -#define dispsfControl(pGpuResource, pCallContext, pParams) dispsfControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define dispsfUnmap(pGpuResource, pCallContext, pCpuMapping) dispsfUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define dispsfAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define dispsfAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispsfAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define dispsfGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define dispsfGetMemInterMapParams(pRmResource, pParams) dispsfGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define dispsfCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define dispsfCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispsfCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define dispsfGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define dispsfGetMemoryMappingDescriptor(pRmResource, ppMemDesc) dispsfGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define dispsfControlFilter(pResource, pCallContext, pParams) dispsfControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define dispsfControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define dispsfControlSerialization_Prologue(pResource, pCallContext, pParams) dispsfControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dispsfControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dispsfControlSerialization_Epilogue(pResource, pCallContext, pParams) dispsfControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispsfControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define dispsfControl_Prologue(pResource, pCallContext, pParams) dispsfControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dispsfControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define dispsfControl_Epilogue(pResource, pCallContext, pParams) dispsfControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispsfCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define dispsfCanCopy(pResource) dispsfCanCopy_DISPATCH(pResource) -#define dispsfIsPartialUnmapSupported(pResource) dispsfIsPartialUnmapSupported_DISPATCH(pResource) -#define dispsfPreDestruct(pResource) dispsfPreDestruct_DISPATCH(pResource) +#define dispsfIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define dispsfIsDuplicate(pResource, hMemory, pDuplicate) dispsfIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dispsfControlSerialization_Epilogue(pResource, pCallContext, pParams) dispsfControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dispsfMap(pGpuResource, pCallContext, pParams, pCpuMapping) dispsfMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define dispsfAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispsfAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS dispsfGetRegBaseOffsetAndSize_IMPL(struct DispSfUser *pDispSfUser, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); +#define dispsfPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dispsfPreDestruct(pResource) dispsfPreDestruct_DISPATCH(pResource) +#define dispsfControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dispsfControlFilter(pResource, pCallContext, pParams) dispsfControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define dispsfIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dispsfIsPartialUnmapSupported(pResource) dispsfIsPartialUnmapSupported_DISPATCH(pResource) +#define dispsfMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dispsfMapTo(pResource, pParams) dispsfMapTo_DISPATCH(pResource, pParams) +#define dispsfUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dispsfUnmapFrom(pResource, pParams) dispsfUnmapFrom_DISPATCH(pResource, pParams) +#define dispsfGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dispsfGetRefCount(pResource) dispsfGetRefCount_DISPATCH(pResource) +#define dispsfAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dispsfAddAdditionalDependants(pClient, pResource, pReference) dispsfAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS dispsfGetRegBaseOffsetAndSize_DISPATCH(struct DispSfUser *pDispSfUser, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pDispSfUser->__dispsfGetRegBaseOffsetAndSize__(pDispSfUser, pGpu, pOffset, pSize); } -static inline NvBool dispsfShareCallback_DISPATCH(struct DispSfUser *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__dispsfShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS dispsfControl_DISPATCH(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__dispsfControl__(pGpuResource, pCallContext, pParams); } -static inline NV_STATUS dispsfCheckMemInterUnmap_DISPATCH(struct DispSfUser *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__dispsfCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS dispsfMap_DISPATCH(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__dispsfMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS dispsfMapTo_DISPATCH(struct DispSfUser *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dispsfMapTo__(pResource, pParams); +static inline NV_STATUS dispsfUnmap_DISPATCH(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__dispsfUnmap__(pGpuResource, pCallContext, pCpuMapping); +} + +static inline NvBool dispsfShareCallback_DISPATCH(struct DispSfUser *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__dispsfShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS dispsfGetMapAddrSpace_DISPATCH(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__dispsfGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NvU32 dispsfGetRefCount_DISPATCH(struct DispSfUser *pResource) { - return pResource->__dispsfGetRefCount__(pResource); +static inline NV_STATUS dispsfInternalControlForward_DISPATCH(struct DispSfUser *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__dispsfInternalControlForward__(pGpuResource, command, pParams, size); } -static inline void dispsfAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispSfUser *pResource, RsResourceRef *pReference) { - pResource->__dispsfAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvHandle dispsfGetInternalObjectHandle_DISPATCH(struct DispSfUser *pGpuResource) { + return pGpuResource->__dispsfGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS dispsfControl_Prologue_DISPATCH(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispsfControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool dispsfAccessCallback_DISPATCH(struct DispSfUser *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__dispsfAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS dispsfInternalControlForward_DISPATCH(struct DispSfUser *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__dispsfInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS dispsfGetMemInterMapParams_DISPATCH(struct DispSfUser *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__dispsfGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS dispsfUnmapFrom_DISPATCH(struct DispSfUser *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dispsfUnmapFrom__(pResource, pParams); +static inline NV_STATUS dispsfCheckMemInterUnmap_DISPATCH(struct DispSfUser *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__dispsfCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline void dispsfControl_Epilogue_DISPATCH(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispsfControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS dispsfGetMemoryMappingDescriptor_DISPATCH(struct DispSfUser *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__dispsfGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NvHandle dispsfGetInternalObjectHandle_DISPATCH(struct DispSfUser *pGpuResource) { - return pGpuResource->__dispsfGetInternalObjectHandle__(pGpuResource); +static inline NV_STATUS dispsfControlSerialization_Prologue_DISPATCH(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dispsfControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispsfControl_DISPATCH(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__dispsfControl__(pGpuResource, pCallContext, pParams); +static inline void dispsfControlSerialization_Epilogue_DISPATCH(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__dispsfControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispsfUnmap_DISPATCH(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispsfUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NV_STATUS dispsfControl_Prologue_DISPATCH(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dispsfControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispsfGetMemInterMapParams_DISPATCH(struct DispSfUser *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dispsfGetMemInterMapParams__(pRmResource, pParams); +static inline void dispsfControl_Epilogue_DISPATCH(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__dispsfControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispsfGetMemoryMappingDescriptor_DISPATCH(struct DispSfUser *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__dispsfGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NvBool dispsfCanCopy_DISPATCH(struct DispSfUser *pResource) { + return pResource->__dispsfCanCopy__(pResource); } -static inline NV_STATUS dispsfControlFilter_DISPATCH(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispsfControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS dispsfIsDuplicate_DISPATCH(struct DispSfUser *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__dispsfIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS dispsfControlSerialization_Prologue_DISPATCH(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispsfControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline void dispsfPreDestruct_DISPATCH(struct DispSfUser *pResource) { + pResource->__dispsfPreDestruct__(pResource); } -static inline NvBool dispsfCanCopy_DISPATCH(struct DispSfUser *pResource) { - return pResource->__dispsfCanCopy__(pResource); +static inline NV_STATUS dispsfControlFilter_DISPATCH(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dispsfControlFilter__(pResource, pCallContext, pParams); } static inline NvBool dispsfIsPartialUnmapSupported_DISPATCH(struct DispSfUser *pResource) { return pResource->__dispsfIsPartialUnmapSupported__(pResource); } -static inline void dispsfPreDestruct_DISPATCH(struct DispSfUser *pResource) { - pResource->__dispsfPreDestruct__(pResource); +static inline NV_STATUS dispsfMapTo_DISPATCH(struct DispSfUser *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__dispsfMapTo__(pResource, pParams); } -static inline NV_STATUS dispsfIsDuplicate_DISPATCH(struct DispSfUser *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dispsfIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS dispsfUnmapFrom_DISPATCH(struct DispSfUser *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__dispsfUnmapFrom__(pResource, pParams); } -static inline void dispsfControlSerialization_Epilogue_DISPATCH(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispsfControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 dispsfGetRefCount_DISPATCH(struct DispSfUser *pResource) { + return pResource->__dispsfGetRefCount__(pResource); } -static inline NV_STATUS dispsfMap_DISPATCH(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispsfMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void dispsfAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispSfUser *pResource, RsResourceRef *pReference) { + pResource->__dispsfAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NvBool dispsfAccessCallback_DISPATCH(struct DispSfUser *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__dispsfAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} +NV_STATUS dispsfGetRegBaseOffsetAndSize_IMPL(struct DispSfUser *pDispSfUser, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); NV_STATUS dispsfConstruct_IMPL(struct DispSfUser *arg_pDispSfUser, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_dispsw_nvoc.c b/src/nvidia/generated/g_dispsw_nvoc.c index 064567b932..651f515d1e 100644 --- a/src/nvidia/generated/g_dispsw_nvoc.c +++ b/src/nvidia/generated/g_dispsw_nvoc.c @@ -120,157 +120,195 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DispSwObject = /*pExportInfo=*/ &__nvoc_export_info_DispSwObject }; -static NV_STATUS __nvoc_thunk_DispSwObject_chandesGetSwMethods(struct ChannelDescendant *pDispSw, const METHOD **ppMethods, NvU32 *pNumMethods) { - return dispswGetSwMethods((struct DispSwObject *)(((unsigned char *)pDispSw) - __nvoc_rtti_DispSwObject_ChannelDescendant.offset), ppMethods, pNumMethods); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NV_STATUS __nvoc_thunk_ChannelDescendant_dispswCheckMemInterUnmap(struct DispSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_DispSwObject_ChannelDescendant.offset), bSubdeviceHandleProvided); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispSwObject[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) dispswCtrlCmdNotifyOnVblank_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x90720101u, + /*paramSize=*/ sizeof(NV9072_CTRL_CMD_NOTIFY_ON_VBLANK_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_DispSwObject.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "dispswCtrlCmdNotifyOnVblank" +#endif + }, + +}; -static NvBool __nvoc_thunk_GpuResource_dispswShareCallback(struct DispSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// 1 down-thunk(s) defined to bridge methods in DispSwObject from superclasses + +// dispswGetSwMethods: virtual halified (singleton optimized) override (chandes) base (chandes) body +static NV_STATUS __nvoc_down_thunk_DispSwObject_chandesGetSwMethods(struct ChannelDescendant *pDispSw, const METHOD **ppMethods, NvU32 *pNumMethods) { + return dispswGetSwMethods((struct DispSwObject *)(((unsigned char *) pDispSw) - __nvoc_rtti_DispSwObject_ChannelDescendant.offset), ppMethods, pNumMethods); } -static NvBool __nvoc_thunk_RmResource_dispswAccessCallback(struct DispSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObject_RmResource.offset), pInvokingClient, pAllocParams, accessRight); + +// 31 up-thunk(s) defined to bridge methods in DispSwObject to superclasses + +// dispswIsSwMethodStalling: virtual inherited (chandes) base (chandes) +static NvBool __nvoc_up_thunk_ChannelDescendant_dispswIsSwMethodStalling(struct DispSwObject *pChannelDescendant, NvU32 hHandle) { + return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_DispSwObject_ChannelDescendant.offset), hHandle); } -static NV_STATUS __nvoc_thunk_RsResource_dispswMapTo(struct DispSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObject_RsResource.offset), pParams); +// dispswCheckMemInterUnmap: virtual inherited (chandes) base (chandes) +static NV_STATUS __nvoc_up_thunk_ChannelDescendant_dispswCheckMemInterUnmap(struct DispSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { + return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_DispSwObject_ChannelDescendant.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_GpuResource_dispswGetMapAddrSpace(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// dispswControl: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispswControl(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_Notifier_dispswSetNotificationShare(struct DispSwObject *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispSwObject_Notifier.offset), pNotifShare); +// dispswMap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispswMap(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_dispswGetRefCount(struct DispSwObject *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObject_RsResource.offset)); +// dispswUnmap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispswUnmap(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_RsResource_dispswAddAdditionalDependants(struct RsClient *pClient, struct DispSwObject *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObject_RsResource.offset), pReference); +// dispswShareCallback: virtual inherited (gpures) base (chandes) +static NvBool __nvoc_up_thunk_GpuResource_dispswShareCallback(struct DispSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RmResource_dispswControl_Prologue(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObject_RmResource.offset), pCallContext, pParams); +// dispswGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispswGetRegBaseOffsetAndSize(struct DispSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_GpuResource_dispswGetRegBaseOffsetAndSize(struct DispSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), pGpu, pOffset, pSize); +// dispswGetMapAddrSpace: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispswGetMapAddrSpace(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_GpuResource_dispswInternalControlForward(struct DispSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), command, pParams, size); +// dispswInternalControlForward: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_dispswInternalControlForward(struct DispSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_RsResource_dispswUnmapFrom(struct DispSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObject_RsResource.offset), pParams); +// dispswGetInternalObjectHandle: virtual inherited (gpures) base (chandes) +static NvHandle __nvoc_up_thunk_GpuResource_dispswGetInternalObjectHandle(struct DispSwObject *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset)); } -static void __nvoc_thunk_RmResource_dispswControl_Epilogue(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObject_RmResource.offset), pCallContext, pParams); +// dispswAccessCallback: virtual inherited (rmres) base (chandes) +static NvBool __nvoc_up_thunk_RmResource_dispswAccessCallback(struct DispSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NvHandle __nvoc_thunk_GpuResource_dispswGetInternalObjectHandle(struct DispSwObject *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset)); +// dispswGetMemInterMapParams: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_dispswGetMemInterMapParams(struct DispSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispSwObject_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_dispswControl(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), pCallContext, pParams); +// dispswGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_dispswGetMemoryMappingDescriptor(struct DispSwObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispSwObject_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_GpuResource_dispswUnmap(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), pCallContext, pCpuMapping); +// dispswControlSerialization_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_dispswControlSerialization_Prologue(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_dispswGetMemInterMapParams(struct DispSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispSwObject_RmResource.offset), pParams); +// dispswControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_dispswControlSerialization_Epilogue(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_dispswGetMemoryMappingDescriptor(struct DispSwObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DispSwObject_RmResource.offset), ppMemDesc); +// dispswControl_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_dispswControl_Prologue(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_ChannelDescendant_dispswIsSwMethodStalling(struct DispSwObject *pChannelDescendant, NvU32 hHandle) { - return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_DispSwObject_ChannelDescendant.offset), hHandle); +// dispswControl_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_dispswControl_Epilogue(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_dispswControlFilter(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObject_RsResource.offset), pCallContext, pParams); +// dispswCanCopy: virtual inherited (res) base (chandes) +static NvBool __nvoc_up_thunk_RsResource_dispswCanCopy(struct DispSwObject *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_dispswUnregisterEvent(struct DispSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispSwObject_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// dispswIsDuplicate: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_dispswIsDuplicate(struct DispSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RmResource_dispswControlSerialization_Prologue(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObject_RmResource.offset), pCallContext, pParams); +// dispswPreDestruct: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_dispswPreDestruct(struct DispSwObject *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_dispswCanCopy(struct DispSwObject *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObject_RsResource.offset)); +// dispswControlFilter: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_dispswControlFilter(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RsResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_dispswIsPartialUnmapSupported(struct DispSwObject *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObject_RsResource.offset)); +// dispswIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body +static NvBool __nvoc_up_thunk_RsResource_dispswIsPartialUnmapSupported(struct DispSwObject *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RsResource.offset)); } -static void __nvoc_thunk_RsResource_dispswPreDestruct(struct DispSwObject *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObject_RsResource.offset)); +// dispswMapTo: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_dispswMapTo(struct DispSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_dispswIsDuplicate(struct DispSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObject_RsResource.offset), hMemory, pDuplicate); +// dispswUnmapFrom: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_dispswUnmapFrom(struct DispSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_dispswControlSerialization_Epilogue(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DispSwObject_RmResource.offset), pCallContext, pParams); +// dispswGetRefCount: virtual inherited (res) base (chandes) +static NvU32 __nvoc_up_thunk_RsResource_dispswGetRefCount(struct DispSwObject *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RsResource.offset)); } -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_dispswGetNotificationListPtr(struct DispSwObject *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispSwObject_Notifier.offset)); +// dispswAddAdditionalDependants: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_dispswAddAdditionalDependants(struct RsClient *pClient, struct DispSwObject *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RsResource.offset), pReference); } -static struct NotifShare *__nvoc_thunk_Notifier_dispswGetNotificationShare(struct DispSwObject *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispSwObject_Notifier.offset)); +// dispswGetNotificationListPtr: virtual inherited (notify) base (chandes) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispswGetNotificationListPtr(struct DispSwObject *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispSwObject_Notifier.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_dispswMap(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// dispswGetNotificationShare: virtual inherited (notify) base (chandes) +static struct NotifShare * __nvoc_up_thunk_Notifier_dispswGetNotificationShare(struct DispSwObject *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispSwObject_Notifier.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_dispswGetOrAllocNotifShare(struct DispSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DispSwObject_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +// dispswSetNotificationShare: virtual inherited (notify) base (chandes) +static void __nvoc_up_thunk_Notifier_dispswSetNotificationShare(struct DispSwObject *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispSwObject_Notifier.offset), pNotifShare); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// dispswUnregisterEvent: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_dispswUnregisterEvent(struct DispSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispSwObject_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispSwObject[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) dispswCtrlCmdNotifyOnVblank_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x90720101u, - /*paramSize=*/ sizeof(NV9072_CTRL_CMD_NOTIFY_ON_VBLANK_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_DispSwObject.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "dispswCtrlCmdNotifyOnVblank" -#endif - }, +// dispswGetOrAllocNotifShare: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_dispswGetOrAllocNotifShare(struct DispSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispSwObject_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_DispSwObject = { @@ -313,6 +351,7 @@ NV_STATUS __nvoc_ctor_DispSwObject(DispSwObject *pThis, RmHalspecOwner *pRmhalsp return status; } +// Vtable initialization static void __nvoc_init_funcTable_DispSwObject_1(DispSwObject *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -321,79 +360,114 @@ static void __nvoc_init_funcTable_DispSwObject_1(DispSwObject *pThis, RmHalspecO PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // Hal function -- dispswGetSwMethods + // dispswGetSwMethods -- virtual halified (singleton optimized) override (chandes) base (chandes) body pThis->__dispswGetSwMethods__ = &dispswGetSwMethods_46f6a7; + pThis->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ = &__nvoc_down_thunk_DispSwObject_chandesGetSwMethods; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // dispswCtrlCmdNotifyOnVblank -- exported (id=0x90720101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispswCtrlCmdNotifyOnVblank__ = &dispswCtrlCmdNotifyOnVblank_IMPL; #endif - pThis->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ = &__nvoc_thunk_DispSwObject_chandesGetSwMethods; + // dispswIsSwMethodStalling -- virtual inherited (chandes) base (chandes) + pThis->__dispswIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_dispswIsSwMethodStalling; - pThis->__dispswCheckMemInterUnmap__ = &__nvoc_thunk_ChannelDescendant_dispswCheckMemInterUnmap; + // dispswCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) + pThis->__dispswCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_dispswCheckMemInterUnmap; - pThis->__dispswShareCallback__ = &__nvoc_thunk_GpuResource_dispswShareCallback; + // dispswControl -- virtual inherited (gpures) base (chandes) + pThis->__dispswControl__ = &__nvoc_up_thunk_GpuResource_dispswControl; - pThis->__dispswAccessCallback__ = &__nvoc_thunk_RmResource_dispswAccessCallback; + // dispswMap -- virtual inherited (gpures) base (chandes) + pThis->__dispswMap__ = &__nvoc_up_thunk_GpuResource_dispswMap; - pThis->__dispswMapTo__ = &__nvoc_thunk_RsResource_dispswMapTo; + // dispswUnmap -- virtual inherited (gpures) base (chandes) + pThis->__dispswUnmap__ = &__nvoc_up_thunk_GpuResource_dispswUnmap; - pThis->__dispswGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_dispswGetMapAddrSpace; + // dispswShareCallback -- virtual inherited (gpures) base (chandes) + pThis->__dispswShareCallback__ = &__nvoc_up_thunk_GpuResource_dispswShareCallback; - pThis->__dispswSetNotificationShare__ = &__nvoc_thunk_Notifier_dispswSetNotificationShare; + // dispswGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) + pThis->__dispswGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_dispswGetRegBaseOffsetAndSize; - pThis->__dispswGetRefCount__ = &__nvoc_thunk_RsResource_dispswGetRefCount; + // dispswGetMapAddrSpace -- virtual inherited (gpures) base (chandes) + pThis->__dispswGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_dispswGetMapAddrSpace; - pThis->__dispswAddAdditionalDependants__ = &__nvoc_thunk_RsResource_dispswAddAdditionalDependants; + // dispswInternalControlForward -- virtual inherited (gpures) base (chandes) + pThis->__dispswInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dispswInternalControlForward; - pThis->__dispswControl_Prologue__ = &__nvoc_thunk_RmResource_dispswControl_Prologue; + // dispswGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) + pThis->__dispswGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dispswGetInternalObjectHandle; - pThis->__dispswGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_dispswGetRegBaseOffsetAndSize; + // dispswAccessCallback -- virtual inherited (rmres) base (chandes) + pThis->__dispswAccessCallback__ = &__nvoc_up_thunk_RmResource_dispswAccessCallback; - pThis->__dispswInternalControlForward__ = &__nvoc_thunk_GpuResource_dispswInternalControlForward; + // dispswGetMemInterMapParams -- virtual inherited (rmres) base (chandes) + pThis->__dispswGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispswGetMemInterMapParams; - pThis->__dispswUnmapFrom__ = &__nvoc_thunk_RsResource_dispswUnmapFrom; + // dispswGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) + pThis->__dispswGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispswGetMemoryMappingDescriptor; - pThis->__dispswControl_Epilogue__ = &__nvoc_thunk_RmResource_dispswControl_Epilogue; + // dispswControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__dispswControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispswControlSerialization_Prologue; - pThis->__dispswGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_dispswGetInternalObjectHandle; + // dispswControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__dispswControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispswControlSerialization_Epilogue; - pThis->__dispswControl__ = &__nvoc_thunk_GpuResource_dispswControl; + // dispswControl_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__dispswControl_Prologue__ = &__nvoc_up_thunk_RmResource_dispswControl_Prologue; - pThis->__dispswUnmap__ = &__nvoc_thunk_GpuResource_dispswUnmap; + // dispswControl_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__dispswControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dispswControl_Epilogue; - pThis->__dispswGetMemInterMapParams__ = &__nvoc_thunk_RmResource_dispswGetMemInterMapParams; + // dispswCanCopy -- virtual inherited (res) base (chandes) + pThis->__dispswCanCopy__ = &__nvoc_up_thunk_RsResource_dispswCanCopy; - pThis->__dispswGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_dispswGetMemoryMappingDescriptor; + // dispswIsDuplicate -- virtual inherited (res) base (chandes) + pThis->__dispswIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispswIsDuplicate; - pThis->__dispswIsSwMethodStalling__ = &__nvoc_thunk_ChannelDescendant_dispswIsSwMethodStalling; + // dispswPreDestruct -- virtual inherited (res) base (chandes) + pThis->__dispswPreDestruct__ = &__nvoc_up_thunk_RsResource_dispswPreDestruct; - pThis->__dispswControlFilter__ = &__nvoc_thunk_RsResource_dispswControlFilter; + // dispswControlFilter -- virtual inherited (res) base (chandes) + pThis->__dispswControlFilter__ = &__nvoc_up_thunk_RsResource_dispswControlFilter; - pThis->__dispswUnregisterEvent__ = &__nvoc_thunk_Notifier_dispswUnregisterEvent; + // dispswIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body + pThis->__dispswIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispswIsPartialUnmapSupported; - pThis->__dispswControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_dispswControlSerialization_Prologue; + // dispswMapTo -- virtual inherited (res) base (chandes) + pThis->__dispswMapTo__ = &__nvoc_up_thunk_RsResource_dispswMapTo; - pThis->__dispswCanCopy__ = &__nvoc_thunk_RsResource_dispswCanCopy; + // dispswUnmapFrom -- virtual inherited (res) base (chandes) + pThis->__dispswUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispswUnmapFrom; - pThis->__dispswIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_dispswIsPartialUnmapSupported; + // dispswGetRefCount -- virtual inherited (res) base (chandes) + pThis->__dispswGetRefCount__ = &__nvoc_up_thunk_RsResource_dispswGetRefCount; - pThis->__dispswPreDestruct__ = &__nvoc_thunk_RsResource_dispswPreDestruct; + // dispswAddAdditionalDependants -- virtual inherited (res) base (chandes) + pThis->__dispswAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispswAddAdditionalDependants; - pThis->__dispswIsDuplicate__ = &__nvoc_thunk_RsResource_dispswIsDuplicate; + // dispswGetNotificationListPtr -- virtual inherited (notify) base (chandes) + pThis->__dispswGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispswGetNotificationListPtr; - pThis->__dispswControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_dispswControlSerialization_Epilogue; + // dispswGetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__dispswGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispswGetNotificationShare; - pThis->__dispswGetNotificationListPtr__ = &__nvoc_thunk_Notifier_dispswGetNotificationListPtr; + // dispswSetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__dispswSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispswSetNotificationShare; - pThis->__dispswGetNotificationShare__ = &__nvoc_thunk_Notifier_dispswGetNotificationShare; + // dispswUnregisterEvent -- virtual inherited (notify) base (chandes) + pThis->__dispswUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispswUnregisterEvent; - pThis->__dispswMap__ = &__nvoc_thunk_GpuResource_dispswMap; + // dispswGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) + pThis->__dispswGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispswGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_DispSwObject_1 with approximately 34 basic block(s). - pThis->__dispswGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_dispswGetOrAllocNotifShare; -} +// Initialize vtable(s) for 33 virtual method(s). void __nvoc_init_funcTable_DispSwObject(DispSwObject *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 33 per-object function pointer(s). __nvoc_init_funcTable_DispSwObject_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_dispsw_nvoc.h b/src/nvidia/generated/g_dispsw_nvoc.h index 9a34176cbe..4659625443 100644 --- a/src/nvidia/generated/g_dispsw_nvoc.h +++ b/src/nvidia/generated/g_dispsw_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_DISPSW_NVOC_H_ #define _G_DISPSW_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_dispsw_nvoc.h" #ifndef DISPSW_H @@ -114,51 +122,62 @@ NV_STATUS dispswReleaseSemaphoreAndNotifierFill(struct OBJGPU *pGpu, #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct DispSwObject { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; - struct DispSwObject *__nvoc_pbase_DispSwObject; - NV_STATUS (*__dispswGetSwMethods__)(struct DispSwObject *, const METHOD **, NvU32 *); - NV_STATUS (*__dispswCtrlCmdNotifyOnVblank__)(struct DispSwObject *, NV9072_CTRL_CMD_NOTIFY_ON_VBLANK_PARAMS *); - NV_STATUS (*__dispswCheckMemInterUnmap__)(struct DispSwObject *, NvBool); - NvBool (*__dispswShareCallback__)(struct DispSwObject *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NvBool (*__dispswAccessCallback__)(struct DispSwObject *, struct RsClient *, void *, RsAccessRight); - NV_STATUS (*__dispswMapTo__)(struct DispSwObject *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__dispswGetMapAddrSpace__)(struct DispSwObject *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__dispswSetNotificationShare__)(struct DispSwObject *, struct NotifShare *); - NvU32 (*__dispswGetRefCount__)(struct DispSwObject *); - void (*__dispswAddAdditionalDependants__)(struct RsClient *, struct DispSwObject *, RsResourceRef *); - NV_STATUS (*__dispswControl_Prologue__)(struct DispSwObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispswGetRegBaseOffsetAndSize__)(struct DispSwObject *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__dispswInternalControlForward__)(struct DispSwObject *, NvU32, void *, NvU32); - NV_STATUS (*__dispswUnmapFrom__)(struct DispSwObject *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__dispswControl_Epilogue__)(struct DispSwObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__dispswGetInternalObjectHandle__)(struct DispSwObject *); - NV_STATUS (*__dispswControl__)(struct DispSwObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispswUnmap__)(struct DispSwObject *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__dispswGetMemInterMapParams__)(struct DispSwObject *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__dispswGetMemoryMappingDescriptor__)(struct DispSwObject *, struct MEMORY_DESCRIPTOR **); - NvBool (*__dispswIsSwMethodStalling__)(struct DispSwObject *, NvU32); - NV_STATUS (*__dispswControlFilter__)(struct DispSwObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__dispswUnregisterEvent__)(struct DispSwObject *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__dispswControlSerialization_Prologue__)(struct DispSwObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__dispswCanCopy__)(struct DispSwObject *); - NvBool (*__dispswIsPartialUnmapSupported__)(struct DispSwObject *); - void (*__dispswPreDestruct__)(struct DispSwObject *); - NV_STATUS (*__dispswIsDuplicate__)(struct DispSwObject *, NvHandle, NvBool *); - void (*__dispswControlSerialization_Epilogue__)(struct DispSwObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__dispswGetNotificationListPtr__)(struct DispSwObject *); - struct NotifShare *(*__dispswGetNotificationShare__)(struct DispSwObject *); - NV_STATUS (*__dispswMap__)(struct DispSwObject *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NV_STATUS (*__dispswGetOrAllocNotifShare__)(struct DispSwObject *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super^2 + struct INotifier *__nvoc_pbase_INotifier; // inotify super^3 + struct Notifier *__nvoc_pbase_Notifier; // notify super^2 + struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super + struct DispSwObject *__nvoc_pbase_DispSwObject; // dispsw + + // Vtable with 33 per-object function pointers + NV_STATUS (*__dispswGetSwMethods__)(struct DispSwObject * /*this*/, const METHOD **, NvU32 *); // virtual halified (singleton optimized) override (chandes) base (chandes) body + NV_STATUS (*__dispswCtrlCmdNotifyOnVblank__)(struct DispSwObject * /*this*/, NV9072_CTRL_CMD_NOTIFY_ON_VBLANK_PARAMS *); // exported (id=0x90720101) + NvBool (*__dispswIsSwMethodStalling__)(struct DispSwObject * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__dispswCheckMemInterUnmap__)(struct DispSwObject * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__dispswControl__)(struct DispSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__dispswMap__)(struct DispSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__dispswUnmap__)(struct DispSwObject * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NvBool (*__dispswShareCallback__)(struct DispSwObject * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__dispswGetRegBaseOffsetAndSize__)(struct DispSwObject * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__dispswGetMapAddrSpace__)(struct DispSwObject * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__dispswInternalControlForward__)(struct DispSwObject * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (chandes) + NvHandle (*__dispswGetInternalObjectHandle__)(struct DispSwObject * /*this*/); // virtual inherited (gpures) base (chandes) + NvBool (*__dispswAccessCallback__)(struct DispSwObject * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__dispswGetMemInterMapParams__)(struct DispSwObject * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__dispswGetMemoryMappingDescriptor__)(struct DispSwObject * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__dispswControlSerialization_Prologue__)(struct DispSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__dispswControlSerialization_Epilogue__)(struct DispSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__dispswControl_Prologue__)(struct DispSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__dispswControl_Epilogue__)(struct DispSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NvBool (*__dispswCanCopy__)(struct DispSwObject * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__dispswIsDuplicate__)(struct DispSwObject * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (chandes) + void (*__dispswPreDestruct__)(struct DispSwObject * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__dispswControlFilter__)(struct DispSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (chandes) + NvBool (*__dispswIsPartialUnmapSupported__)(struct DispSwObject * /*this*/); // inline virtual inherited (res) base (chandes) body + NV_STATUS (*__dispswMapTo__)(struct DispSwObject * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (chandes) + NV_STATUS (*__dispswUnmapFrom__)(struct DispSwObject * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (chandes) + NvU32 (*__dispswGetRefCount__)(struct DispSwObject * /*this*/); // virtual inherited (res) base (chandes) + void (*__dispswAddAdditionalDependants__)(struct RsClient *, struct DispSwObject * /*this*/, RsResourceRef *); // virtual inherited (res) base (chandes) + PEVENTNOTIFICATION * (*__dispswGetNotificationListPtr__)(struct DispSwObject * /*this*/); // virtual inherited (notify) base (chandes) + struct NotifShare * (*__dispswGetNotificationShare__)(struct DispSwObject * /*this*/); // virtual inherited (notify) base (chandes) + void (*__dispswSetNotificationShare__)(struct DispSwObject * /*this*/, struct NotifShare *); // virtual inherited (notify) base (chandes) + NV_STATUS (*__dispswUnregisterEvent__)(struct DispSwObject * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (chandes) + NV_STATUS (*__dispswGetOrAllocNotifShare__)(struct DispSwObject * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (chandes) + + // Data members NvU32 Flags; DISPCOMMONOBJECT DispCommon; struct DISP_SW_OBJECT_NOTIFY NotifyOnVBlank; @@ -174,6 +193,7 @@ typedef struct DispSwObject DispSwObject; #define __nvoc_class_id_DispSwObject 0x99ad6d #endif /* __nvoc_class_id_DispSwObject */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_DispSwObject; #define __staticCast_DispSwObject(pThis) \ @@ -186,123 +206,133 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_DispSwObject; ((DispSwObject*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(DispSwObject))) #endif //__nvoc_dispsw_h_disabled - NV_STATUS __nvoc_objCreateDynamic_DispSwObject(DispSwObject**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_DispSwObject(DispSwObject**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_DispSwObject(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_DispSwObject((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define dispswGetSwMethods_FNPTR(pDispSw) pDispSw->__dispswGetSwMethods__ #define dispswGetSwMethods(pDispSw, ppMethods, pNumMethods) dispswGetSwMethods_DISPATCH(pDispSw, ppMethods, pNumMethods) #define dispswGetSwMethods_HAL(pDispSw, ppMethods, pNumMethods) dispswGetSwMethods_DISPATCH(pDispSw, ppMethods, pNumMethods) +#define dispswCtrlCmdNotifyOnVblank_FNPTR(pDispSwObject) pDispSwObject->__dispswCtrlCmdNotifyOnVblank__ #define dispswCtrlCmdNotifyOnVblank(pDispSwObject, pNotifyParams) dispswCtrlCmdNotifyOnVblank_DISPATCH(pDispSwObject, pNotifyParams) +#define dispswIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define dispswIsSwMethodStalling(pChannelDescendant, hHandle) dispswIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) +#define dispswCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ #define dispswCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) dispswCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) +#define dispswControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define dispswControl(pGpuResource, pCallContext, pParams) dispswControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define dispswMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define dispswMap(pGpuResource, pCallContext, pParams, pCpuMapping) dispswMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define dispswUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define dispswUnmap(pGpuResource, pCallContext, pCpuMapping) dispswUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define dispswShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ #define dispswShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) dispswShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define dispswAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispswAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define dispswMapTo(pResource, pParams) dispswMapTo_DISPATCH(pResource, pParams) -#define dispswGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) dispswGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define dispswSetNotificationShare(pNotifier, pNotifShare) dispswSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define dispswGetRefCount(pResource) dispswGetRefCount_DISPATCH(pResource) -#define dispswAddAdditionalDependants(pClient, pResource, pReference) dispswAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define dispswControl_Prologue(pResource, pCallContext, pParams) dispswControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dispswGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define dispswGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) dispswGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define dispswGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define dispswGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) dispswGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define dispswInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define dispswInternalControlForward(pGpuResource, command, pParams, size) dispswInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define dispswUnmapFrom(pResource, pParams) dispswUnmapFrom_DISPATCH(pResource, pParams) -#define dispswControl_Epilogue(pResource, pCallContext, pParams) dispswControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispswGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define dispswGetInternalObjectHandle(pGpuResource) dispswGetInternalObjectHandle_DISPATCH(pGpuResource) -#define dispswControl(pGpuResource, pCallContext, pParams) dispswControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define dispswUnmap(pGpuResource, pCallContext, pCpuMapping) dispswUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define dispswAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define dispswAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispswAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define dispswGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define dispswGetMemInterMapParams(pRmResource, pParams) dispswGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define dispswGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define dispswGetMemoryMappingDescriptor(pRmResource, ppMemDesc) dispswGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define dispswIsSwMethodStalling(pChannelDescendant, hHandle) dispswIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define dispswControlFilter(pResource, pCallContext, pParams) dispswControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define dispswUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispswUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define dispswControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define dispswControlSerialization_Prologue(pResource, pCallContext, pParams) dispswControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dispswControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dispswControlSerialization_Epilogue(pResource, pCallContext, pParams) dispswControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispswControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define dispswControl_Prologue(pResource, pCallContext, pParams) dispswControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define dispswControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define dispswControl_Epilogue(pResource, pCallContext, pParams) dispswControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispswCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define dispswCanCopy(pResource) dispswCanCopy_DISPATCH(pResource) -#define dispswIsPartialUnmapSupported(pResource) dispswIsPartialUnmapSupported_DISPATCH(pResource) -#define dispswPreDestruct(pResource) dispswPreDestruct_DISPATCH(pResource) +#define dispswIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define dispswIsDuplicate(pResource, hMemory, pDuplicate) dispswIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dispswControlSerialization_Epilogue(pResource, pCallContext, pParams) dispswControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define dispswPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dispswPreDestruct(pResource) dispswPreDestruct_DISPATCH(pResource) +#define dispswControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dispswControlFilter(pResource, pCallContext, pParams) dispswControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define dispswIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dispswIsPartialUnmapSupported(pResource) dispswIsPartialUnmapSupported_DISPATCH(pResource) +#define dispswMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dispswMapTo(pResource, pParams) dispswMapTo_DISPATCH(pResource, pParams) +#define dispswUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dispswUnmapFrom(pResource, pParams) dispswUnmapFrom_DISPATCH(pResource, pParams) +#define dispswGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dispswGetRefCount(pResource) dispswGetRefCount_DISPATCH(pResource) +#define dispswAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dispswAddAdditionalDependants(pClient, pResource, pReference) dispswAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define dispswGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define dispswGetNotificationListPtr(pNotifier) dispswGetNotificationListPtr_DISPATCH(pNotifier) +#define dispswGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ #define dispswGetNotificationShare(pNotifier) dispswGetNotificationShare_DISPATCH(pNotifier) -#define dispswMap(pGpuResource, pCallContext, pParams, pCpuMapping) dispswMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define dispswSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define dispswSetNotificationShare(pNotifier, pNotifShare) dispswSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define dispswUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define dispswUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispswUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define dispswGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ #define dispswGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) dispswGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -static inline NV_STATUS dispswGetSwMethods_46f6a7(struct DispSwObject *pDispSw, const METHOD **ppMethods, NvU32 *pNumMethods) { - return NV_ERR_NOT_SUPPORTED; -} +// Dispatch functions static inline NV_STATUS dispswGetSwMethods_DISPATCH(struct DispSwObject *pDispSw, const METHOD **ppMethods, NvU32 *pNumMethods) { return pDispSw->__dispswGetSwMethods__(pDispSw, ppMethods, pNumMethods); } -NV_STATUS dispswCtrlCmdNotifyOnVblank_IMPL(struct DispSwObject *pDispSwObject, NV9072_CTRL_CMD_NOTIFY_ON_VBLANK_PARAMS *pNotifyParams); - static inline NV_STATUS dispswCtrlCmdNotifyOnVblank_DISPATCH(struct DispSwObject *pDispSwObject, NV9072_CTRL_CMD_NOTIFY_ON_VBLANK_PARAMS *pNotifyParams) { return pDispSwObject->__dispswCtrlCmdNotifyOnVblank__(pDispSwObject, pNotifyParams); } -static inline NV_STATUS dispswCheckMemInterUnmap_DISPATCH(struct DispSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return pChannelDescendant->__dispswCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); -} - -static inline NvBool dispswShareCallback_DISPATCH(struct DispSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__dispswShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NvBool dispswAccessCallback_DISPATCH(struct DispSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__dispswAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} - -static inline NV_STATUS dispswMapTo_DISPATCH(struct DispSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dispswMapTo__(pResource, pParams); +static inline NvBool dispswIsSwMethodStalling_DISPATCH(struct DispSwObject *pChannelDescendant, NvU32 hHandle) { + return pChannelDescendant->__dispswIsSwMethodStalling__(pChannelDescendant, hHandle); } -static inline NV_STATUS dispswGetMapAddrSpace_DISPATCH(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__dispswGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +static inline NV_STATUS dispswCheckMemInterUnmap_DISPATCH(struct DispSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { + return pChannelDescendant->__dispswCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } -static inline void dispswSetNotificationShare_DISPATCH(struct DispSwObject *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__dispswSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS dispswControl_DISPATCH(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__dispswControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 dispswGetRefCount_DISPATCH(struct DispSwObject *pResource) { - return pResource->__dispswGetRefCount__(pResource); +static inline NV_STATUS dispswMap_DISPATCH(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__dispswMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void dispswAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispSwObject *pResource, RsResourceRef *pReference) { - pResource->__dispswAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS dispswUnmap_DISPATCH(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__dispswUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS dispswControl_Prologue_DISPATCH(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispswControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool dispswShareCallback_DISPATCH(struct DispSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__dispswShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS dispswGetRegBaseOffsetAndSize_DISPATCH(struct DispSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__dispswGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS dispswInternalControlForward_DISPATCH(struct DispSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__dispswInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS dispswUnmapFrom_DISPATCH(struct DispSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dispswUnmapFrom__(pResource, pParams); +static inline NV_STATUS dispswGetMapAddrSpace_DISPATCH(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__dispswGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void dispswControl_Epilogue_DISPATCH(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispswControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS dispswInternalControlForward_DISPATCH(struct DispSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__dispswInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle dispswGetInternalObjectHandle_DISPATCH(struct DispSwObject *pGpuResource) { return pGpuResource->__dispswGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS dispswControl_DISPATCH(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__dispswControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS dispswUnmap_DISPATCH(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispswUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool dispswAccessCallback_DISPATCH(struct DispSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__dispswAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS dispswGetMemInterMapParams_DISPATCH(struct DispSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { @@ -313,58 +343,84 @@ static inline NV_STATUS dispswGetMemoryMappingDescriptor_DISPATCH(struct DispSwO return pRmResource->__dispswGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NvBool dispswIsSwMethodStalling_DISPATCH(struct DispSwObject *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__dispswIsSwMethodStalling__(pChannelDescendant, hHandle); +static inline NV_STATUS dispswControlSerialization_Prologue_DISPATCH(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dispswControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispswControlFilter_DISPATCH(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispswControlFilter__(pResource, pCallContext, pParams); +static inline void dispswControlSerialization_Epilogue_DISPATCH(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__dispswControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispswUnregisterEvent_DISPATCH(struct DispSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__dispswUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline NV_STATUS dispswControl_Prologue_DISPATCH(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dispswControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS dispswControlSerialization_Prologue_DISPATCH(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispswControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline void dispswControl_Epilogue_DISPATCH(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__dispswControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool dispswCanCopy_DISPATCH(struct DispSwObject *pResource) { return pResource->__dispswCanCopy__(pResource); } -static inline NvBool dispswIsPartialUnmapSupported_DISPATCH(struct DispSwObject *pResource) { - return pResource->__dispswIsPartialUnmapSupported__(pResource); +static inline NV_STATUS dispswIsDuplicate_DISPATCH(struct DispSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__dispswIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void dispswPreDestruct_DISPATCH(struct DispSwObject *pResource) { pResource->__dispswPreDestruct__(pResource); } -static inline NV_STATUS dispswIsDuplicate_DISPATCH(struct DispSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dispswIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS dispswControlFilter_DISPATCH(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__dispswControlFilter__(pResource, pCallContext, pParams); } -static inline void dispswControlSerialization_Epilogue_DISPATCH(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispswControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool dispswIsPartialUnmapSupported_DISPATCH(struct DispSwObject *pResource) { + return pResource->__dispswIsPartialUnmapSupported__(pResource); } -static inline PEVENTNOTIFICATION *dispswGetNotificationListPtr_DISPATCH(struct DispSwObject *pNotifier) { +static inline NV_STATUS dispswMapTo_DISPATCH(struct DispSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__dispswMapTo__(pResource, pParams); +} + +static inline NV_STATUS dispswUnmapFrom_DISPATCH(struct DispSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__dispswUnmapFrom__(pResource, pParams); +} + +static inline NvU32 dispswGetRefCount_DISPATCH(struct DispSwObject *pResource) { + return pResource->__dispswGetRefCount__(pResource); +} + +static inline void dispswAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispSwObject *pResource, RsResourceRef *pReference) { + pResource->__dispswAddAdditionalDependants__(pClient, pResource, pReference); +} + +static inline PEVENTNOTIFICATION * dispswGetNotificationListPtr_DISPATCH(struct DispSwObject *pNotifier) { return pNotifier->__dispswGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *dispswGetNotificationShare_DISPATCH(struct DispSwObject *pNotifier) { +static inline struct NotifShare * dispswGetNotificationShare_DISPATCH(struct DispSwObject *pNotifier) { return pNotifier->__dispswGetNotificationShare__(pNotifier); } -static inline NV_STATUS dispswMap_DISPATCH(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispswMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void dispswSetNotificationShare_DISPATCH(struct DispSwObject *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__dispswSetNotificationShare__(pNotifier, pNotifShare); +} + +static inline NV_STATUS dispswUnregisterEvent_DISPATCH(struct DispSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__dispswUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS dispswGetOrAllocNotifShare_DISPATCH(struct DispSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return pNotifier->__dispswGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } +static inline NV_STATUS dispswGetSwMethods_46f6a7(struct DispSwObject *pDispSw, const METHOD **ppMethods, NvU32 *pNumMethods) { + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS dispswCtrlCmdNotifyOnVblank_IMPL(struct DispSwObject *pDispSwObject, NV9072_CTRL_CMD_NOTIFY_ON_VBLANK_PARAMS *pNotifyParams); + NV_STATUS dispswConstruct_IMPL(struct DispSwObject *arg_pDispSw, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_dispswConstruct(arg_pDispSw, arg_pCallContext, arg_pParams) dispswConstruct_IMPL(arg_pDispSw, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_egm_mem_nvoc.c b/src/nvidia/generated/g_egm_mem_nvoc.c index d2b855da93..25875b9b4d 100644 --- a/src/nvidia/generated/g_egm_mem_nvoc.c +++ b/src/nvidia/generated/g_egm_mem_nvoc.c @@ -102,110 +102,139 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_ExtendedGpuMemory = /*pExportInfo=*/ &__nvoc_export_info_ExtendedGpuMemory }; -static NV_STATUS __nvoc_thunk_Memory_egmmemCheckMemInterUnmap(struct ExtendedGpuMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), bSubdeviceHandleProvided); +// 26 up-thunk(s) defined to bridge methods in ExtendedGpuMemory to superclasses + +// egmmemCanCopy: virtual inherited (stdmem) base (stdmem) +static NvBool __nvoc_up_thunk_StandardMemory_egmmemCanCopy(struct ExtendedGpuMemory *pStandardMemory) { + return stdmemCanCopy((struct StandardMemory *)(((unsigned char *) pStandardMemory) + __nvoc_rtti_ExtendedGpuMemory_StandardMemory.offset)); } -static NvBool __nvoc_thunk_RmResource_egmmemShareCallback(struct ExtendedGpuMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ExtendedGpuMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// egmmemIsDuplicate: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_egmmemIsDuplicate(struct ExtendedGpuMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_egmmemMapTo(struct ExtendedGpuMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset), pParams); +// egmmemGetMapAddrSpace: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_egmmemGetMapAddrSpace(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_Memory_egmmemGetMapAddrSpace(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return memGetMapAddrSpace((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); +// egmmemControl: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_egmmemControl(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_Memory_egmmemIsExportAllowed(struct ExtendedGpuMemory *pMemory) { - return memIsExportAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset)); +// egmmemMap: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_egmmemMap(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_egmmemGetRefCount(struct ExtendedGpuMemory *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset)); +// egmmemUnmap: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_egmmemUnmap(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_RsResource_egmmemAddAdditionalDependants(struct RsClient *pClient, struct ExtendedGpuMemory *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset), pReference); +// egmmemGetMemInterMapParams: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_egmmemGetMemInterMapParams(struct ExtendedGpuMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pParams); } -static NV_STATUS __nvoc_thunk_RmResource_egmmemControl_Prologue(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ExtendedGpuMemory_RmResource.offset), pCallContext, pParams); +// egmmemCheckMemInterUnmap: inline virtual inherited (mem) base (stdmem) body +static NV_STATUS __nvoc_up_thunk_Memory_egmmemCheckMemInterUnmap(struct ExtendedGpuMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), bSubdeviceHandleProvided); } -static NvBool __nvoc_thunk_Memory_egmmemIsGpuMapAllowed(struct ExtendedGpuMemory *pMemory, struct OBJGPU *pGpu) { - return memIsGpuMapAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pGpu); +// egmmemGetMemoryMappingDescriptor: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_egmmemGetMemoryMappingDescriptor(struct ExtendedGpuMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_RsResource_egmmemUnmapFrom(struct ExtendedGpuMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset), pParams); +// egmmemCheckCopyPermissions: inline virtual inherited (mem) base (stdmem) body +static NV_STATUS __nvoc_up_thunk_Memory_egmmemCheckCopyPermissions(struct ExtendedGpuMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pDstGpu, pDstDevice); } -static void __nvoc_thunk_RmResource_egmmemControl_Epilogue(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ExtendedGpuMemory_RmResource.offset), pCallContext, pParams); +// egmmemIsReady: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_egmmemIsReady(struct ExtendedGpuMemory *pMemory, NvBool bCopyConstructorContext) { + return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), bCopyConstructorContext); } -static NV_STATUS __nvoc_thunk_Memory_egmmemControl(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memControl((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pCallContext, pParams); +// egmmemIsGpuMapAllowed: inline virtual inherited (mem) base (stdmem) body +static NvBool __nvoc_up_thunk_Memory_egmmemIsGpuMapAllowed(struct ExtendedGpuMemory *pMemory, struct OBJGPU *pGpu) { + return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pGpu); } -static NV_STATUS __nvoc_thunk_Memory_egmmemUnmap(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pCallContext, pCpuMapping); +// egmmemIsExportAllowed: inline virtual inherited (mem) base (stdmem) body +static NvBool __nvoc_up_thunk_Memory_egmmemIsExportAllowed(struct ExtendedGpuMemory *pMemory) { + return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset)); } -static NV_STATUS __nvoc_thunk_Memory_egmmemGetMemInterMapParams(struct ExtendedGpuMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pParams); +// egmmemAccessCallback: virtual inherited (rmres) base (stdmem) +static NvBool __nvoc_up_thunk_RmResource_egmmemAccessCallback(struct ExtendedGpuMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_Memory_egmmemGetMemoryMappingDescriptor(struct ExtendedGpuMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), ppMemDesc); +// egmmemShareCallback: virtual inherited (rmres) base (stdmem) +static NvBool __nvoc_up_thunk_RmResource_egmmemShareCallback(struct ExtendedGpuMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RsResource_egmmemControlFilter(struct ExtendedGpuMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset), pCallContext, pParams); +// egmmemControlSerialization_Prologue: virtual inherited (rmres) base (stdmem) +static NV_STATUS __nvoc_up_thunk_RmResource_egmmemControlSerialization_Prologue(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_egmmemControlSerialization_Prologue(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ExtendedGpuMemory_RmResource.offset), pCallContext, pParams); +// egmmemControlSerialization_Epilogue: virtual inherited (rmres) base (stdmem) +static void __nvoc_up_thunk_RmResource_egmmemControlSerialization_Epilogue(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_StandardMemory_egmmemCanCopy(struct ExtendedGpuMemory *pStandardMemory) { - return stdmemCanCopy((struct StandardMemory *)(((unsigned char *)pStandardMemory) + __nvoc_rtti_ExtendedGpuMemory_StandardMemory.offset)); +// egmmemControl_Prologue: virtual inherited (rmres) base (stdmem) +static NV_STATUS __nvoc_up_thunk_RmResource_egmmemControl_Prologue(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_egmmemIsPartialUnmapSupported(struct ExtendedGpuMemory *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset)); +// egmmemControl_Epilogue: virtual inherited (rmres) base (stdmem) +static void __nvoc_up_thunk_RmResource_egmmemControl_Epilogue(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_egmmemIsReady(struct ExtendedGpuMemory *pMemory, NvBool bCopyConstructorContext) { - return memIsReady((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), bCopyConstructorContext); +// egmmemPreDestruct: virtual inherited (res) base (stdmem) +static void __nvoc_up_thunk_RsResource_egmmemPreDestruct(struct ExtendedGpuMemory *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_egmmemCheckCopyPermissions(struct ExtendedGpuMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return memCheckCopyPermissions((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pDstGpu, pDstDevice); +// egmmemControlFilter: virtual inherited (res) base (stdmem) +static NV_STATUS __nvoc_up_thunk_RsResource_egmmemControlFilter(struct ExtendedGpuMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_egmmemPreDestruct(struct ExtendedGpuMemory *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset)); +// egmmemIsPartialUnmapSupported: inline virtual inherited (res) base (stdmem) body +static NvBool __nvoc_up_thunk_RsResource_egmmemIsPartialUnmapSupported(struct ExtendedGpuMemory *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_egmmemIsDuplicate(struct ExtendedGpuMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), hMemory, pDuplicate); +// egmmemMapTo: virtual inherited (res) base (stdmem) +static NV_STATUS __nvoc_up_thunk_RsResource_egmmemMapTo(struct ExtendedGpuMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_egmmemControlSerialization_Epilogue(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ExtendedGpuMemory_RmResource.offset), pCallContext, pParams); +// egmmemUnmapFrom: virtual inherited (res) base (stdmem) +static NV_STATUS __nvoc_up_thunk_RsResource_egmmemUnmapFrom(struct ExtendedGpuMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_Memory_egmmemMap(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pCallContext, pParams, pCpuMapping); +// egmmemGetRefCount: virtual inherited (res) base (stdmem) +static NvU32 __nvoc_up_thunk_RsResource_egmmemGetRefCount(struct ExtendedGpuMemory *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_egmmemAccessCallback(struct ExtendedGpuMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ExtendedGpuMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// egmmemAddAdditionalDependants: virtual inherited (res) base (stdmem) +static void __nvoc_up_thunk_RsResource_egmmemAddAdditionalDependants(struct RsClient *pClient, struct ExtendedGpuMemory *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_ExtendedGpuMemory = { /*numEntries=*/ 0, @@ -241,63 +270,94 @@ NV_STATUS __nvoc_ctor_ExtendedGpuMemory(ExtendedGpuMemory *pThis, CALL_CONTEXT * return status; } +// Vtable initialization static void __nvoc_init_funcTable_ExtendedGpuMemory_1(ExtendedGpuMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - pThis->__egmmemCheckMemInterUnmap__ = &__nvoc_thunk_Memory_egmmemCheckMemInterUnmap; + // egmmemCanCopy -- virtual inherited (stdmem) base (stdmem) + pThis->__egmmemCanCopy__ = &__nvoc_up_thunk_StandardMemory_egmmemCanCopy; - pThis->__egmmemShareCallback__ = &__nvoc_thunk_RmResource_egmmemShareCallback; + // egmmemIsDuplicate -- virtual inherited (mem) base (stdmem) + pThis->__egmmemIsDuplicate__ = &__nvoc_up_thunk_Memory_egmmemIsDuplicate; - pThis->__egmmemMapTo__ = &__nvoc_thunk_RsResource_egmmemMapTo; + // egmmemGetMapAddrSpace -- virtual inherited (mem) base (stdmem) + pThis->__egmmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_egmmemGetMapAddrSpace; - pThis->__egmmemGetMapAddrSpace__ = &__nvoc_thunk_Memory_egmmemGetMapAddrSpace; + // egmmemControl -- virtual inherited (mem) base (stdmem) + pThis->__egmmemControl__ = &__nvoc_up_thunk_Memory_egmmemControl; - pThis->__egmmemIsExportAllowed__ = &__nvoc_thunk_Memory_egmmemIsExportAllowed; + // egmmemMap -- virtual inherited (mem) base (stdmem) + pThis->__egmmemMap__ = &__nvoc_up_thunk_Memory_egmmemMap; - pThis->__egmmemGetRefCount__ = &__nvoc_thunk_RsResource_egmmemGetRefCount; + // egmmemUnmap -- virtual inherited (mem) base (stdmem) + pThis->__egmmemUnmap__ = &__nvoc_up_thunk_Memory_egmmemUnmap; - pThis->__egmmemAddAdditionalDependants__ = &__nvoc_thunk_RsResource_egmmemAddAdditionalDependants; + // egmmemGetMemInterMapParams -- virtual inherited (mem) base (stdmem) + pThis->__egmmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_egmmemGetMemInterMapParams; - pThis->__egmmemControl_Prologue__ = &__nvoc_thunk_RmResource_egmmemControl_Prologue; + // egmmemCheckMemInterUnmap -- inline virtual inherited (mem) base (stdmem) body + pThis->__egmmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_egmmemCheckMemInterUnmap; - pThis->__egmmemIsGpuMapAllowed__ = &__nvoc_thunk_Memory_egmmemIsGpuMapAllowed; + // egmmemGetMemoryMappingDescriptor -- virtual inherited (mem) base (stdmem) + pThis->__egmmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_egmmemGetMemoryMappingDescriptor; - pThis->__egmmemUnmapFrom__ = &__nvoc_thunk_RsResource_egmmemUnmapFrom; + // egmmemCheckCopyPermissions -- inline virtual inherited (mem) base (stdmem) body + pThis->__egmmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_egmmemCheckCopyPermissions; - pThis->__egmmemControl_Epilogue__ = &__nvoc_thunk_RmResource_egmmemControl_Epilogue; + // egmmemIsReady -- virtual inherited (mem) base (stdmem) + pThis->__egmmemIsReady__ = &__nvoc_up_thunk_Memory_egmmemIsReady; - pThis->__egmmemControl__ = &__nvoc_thunk_Memory_egmmemControl; + // egmmemIsGpuMapAllowed -- inline virtual inherited (mem) base (stdmem) body + pThis->__egmmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_egmmemIsGpuMapAllowed; - pThis->__egmmemUnmap__ = &__nvoc_thunk_Memory_egmmemUnmap; + // egmmemIsExportAllowed -- inline virtual inherited (mem) base (stdmem) body + pThis->__egmmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_egmmemIsExportAllowed; - pThis->__egmmemGetMemInterMapParams__ = &__nvoc_thunk_Memory_egmmemGetMemInterMapParams; + // egmmemAccessCallback -- virtual inherited (rmres) base (stdmem) + pThis->__egmmemAccessCallback__ = &__nvoc_up_thunk_RmResource_egmmemAccessCallback; - pThis->__egmmemGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_egmmemGetMemoryMappingDescriptor; + // egmmemShareCallback -- virtual inherited (rmres) base (stdmem) + pThis->__egmmemShareCallback__ = &__nvoc_up_thunk_RmResource_egmmemShareCallback; - pThis->__egmmemControlFilter__ = &__nvoc_thunk_RsResource_egmmemControlFilter; + // egmmemControlSerialization_Prologue -- virtual inherited (rmres) base (stdmem) + pThis->__egmmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_egmmemControlSerialization_Prologue; - pThis->__egmmemControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_egmmemControlSerialization_Prologue; + // egmmemControlSerialization_Epilogue -- virtual inherited (rmres) base (stdmem) + pThis->__egmmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_egmmemControlSerialization_Epilogue; - pThis->__egmmemCanCopy__ = &__nvoc_thunk_StandardMemory_egmmemCanCopy; + // egmmemControl_Prologue -- virtual inherited (rmres) base (stdmem) + pThis->__egmmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_egmmemControl_Prologue; - pThis->__egmmemIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_egmmemIsPartialUnmapSupported; + // egmmemControl_Epilogue -- virtual inherited (rmres) base (stdmem) + pThis->__egmmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_egmmemControl_Epilogue; - pThis->__egmmemIsReady__ = &__nvoc_thunk_Memory_egmmemIsReady; + // egmmemPreDestruct -- virtual inherited (res) base (stdmem) + pThis->__egmmemPreDestruct__ = &__nvoc_up_thunk_RsResource_egmmemPreDestruct; - pThis->__egmmemCheckCopyPermissions__ = &__nvoc_thunk_Memory_egmmemCheckCopyPermissions; + // egmmemControlFilter -- virtual inherited (res) base (stdmem) + pThis->__egmmemControlFilter__ = &__nvoc_up_thunk_RsResource_egmmemControlFilter; - pThis->__egmmemPreDestruct__ = &__nvoc_thunk_RsResource_egmmemPreDestruct; + // egmmemIsPartialUnmapSupported -- inline virtual inherited (res) base (stdmem) body + pThis->__egmmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_egmmemIsPartialUnmapSupported; - pThis->__egmmemIsDuplicate__ = &__nvoc_thunk_Memory_egmmemIsDuplicate; + // egmmemMapTo -- virtual inherited (res) base (stdmem) + pThis->__egmmemMapTo__ = &__nvoc_up_thunk_RsResource_egmmemMapTo; - pThis->__egmmemControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_egmmemControlSerialization_Epilogue; + // egmmemUnmapFrom -- virtual inherited (res) base (stdmem) + pThis->__egmmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_egmmemUnmapFrom; - pThis->__egmmemMap__ = &__nvoc_thunk_Memory_egmmemMap; + // egmmemGetRefCount -- virtual inherited (res) base (stdmem) + pThis->__egmmemGetRefCount__ = &__nvoc_up_thunk_RsResource_egmmemGetRefCount; - pThis->__egmmemAccessCallback__ = &__nvoc_thunk_RmResource_egmmemAccessCallback; -} + // egmmemAddAdditionalDependants -- virtual inherited (res) base (stdmem) + pThis->__egmmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_egmmemAddAdditionalDependants; +} // End __nvoc_init_funcTable_ExtendedGpuMemory_1 with approximately 26 basic block(s). + +// Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_ExtendedGpuMemory(ExtendedGpuMemory *pThis) { + + // Initialize vtable(s) with 26 per-object function pointer(s). __nvoc_init_funcTable_ExtendedGpuMemory_1(pThis); } diff --git a/src/nvidia/generated/g_egm_mem_nvoc.h b/src/nvidia/generated/g_egm_mem_nvoc.h index 834dd9828b..34c54129af 100644 --- a/src/nvidia/generated/g_egm_mem_nvoc.h +++ b/src/nvidia/generated/g_egm_mem_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_EGM_MEM_NVOC_H_ #define _G_EGM_MEM_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_egm_mem_nvoc.h" #ifndef _EGM_MEMORY_H_ @@ -52,42 +60,51 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct ExtendedGpuMemory { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct StandardMemory __nvoc_base_StandardMemory; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Memory *__nvoc_pbase_Memory; - struct StandardMemory *__nvoc_pbase_StandardMemory; - struct ExtendedGpuMemory *__nvoc_pbase_ExtendedGpuMemory; - NV_STATUS (*__egmmemCheckMemInterUnmap__)(struct ExtendedGpuMemory *, NvBool); - NvBool (*__egmmemShareCallback__)(struct ExtendedGpuMemory *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__egmmemMapTo__)(struct ExtendedGpuMemory *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__egmmemGetMapAddrSpace__)(struct ExtendedGpuMemory *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvBool (*__egmmemIsExportAllowed__)(struct ExtendedGpuMemory *); - NvU32 (*__egmmemGetRefCount__)(struct ExtendedGpuMemory *); - void (*__egmmemAddAdditionalDependants__)(struct RsClient *, struct ExtendedGpuMemory *, RsResourceRef *); - NV_STATUS (*__egmmemControl_Prologue__)(struct ExtendedGpuMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__egmmemIsGpuMapAllowed__)(struct ExtendedGpuMemory *, struct OBJGPU *); - NV_STATUS (*__egmmemUnmapFrom__)(struct ExtendedGpuMemory *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__egmmemControl_Epilogue__)(struct ExtendedGpuMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__egmmemControl__)(struct ExtendedGpuMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__egmmemUnmap__)(struct ExtendedGpuMemory *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__egmmemGetMemInterMapParams__)(struct ExtendedGpuMemory *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__egmmemGetMemoryMappingDescriptor__)(struct ExtendedGpuMemory *, MEMORY_DESCRIPTOR **); - NV_STATUS (*__egmmemControlFilter__)(struct ExtendedGpuMemory *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__egmmemControlSerialization_Prologue__)(struct ExtendedGpuMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__egmmemCanCopy__)(struct ExtendedGpuMemory *); - NvBool (*__egmmemIsPartialUnmapSupported__)(struct ExtendedGpuMemory *); - NV_STATUS (*__egmmemIsReady__)(struct ExtendedGpuMemory *, NvBool); - NV_STATUS (*__egmmemCheckCopyPermissions__)(struct ExtendedGpuMemory *, struct OBJGPU *, struct Device *); - void (*__egmmemPreDestruct__)(struct ExtendedGpuMemory *); - NV_STATUS (*__egmmemIsDuplicate__)(struct ExtendedGpuMemory *, NvHandle, NvBool *); - void (*__egmmemControlSerialization_Epilogue__)(struct ExtendedGpuMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__egmmemMap__)(struct ExtendedGpuMemory *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__egmmemAccessCallback__)(struct ExtendedGpuMemory *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct Memory *__nvoc_pbase_Memory; // mem super^2 + struct StandardMemory *__nvoc_pbase_StandardMemory; // stdmem super + struct ExtendedGpuMemory *__nvoc_pbase_ExtendedGpuMemory; // egmmem + + // Vtable with 26 per-object function pointers + NvBool (*__egmmemCanCopy__)(struct ExtendedGpuMemory * /*this*/); // virtual inherited (stdmem) base (stdmem) + NV_STATUS (*__egmmemIsDuplicate__)(struct ExtendedGpuMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__egmmemGetMapAddrSpace__)(struct ExtendedGpuMemory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__egmmemControl__)(struct ExtendedGpuMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__egmmemMap__)(struct ExtendedGpuMemory * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__egmmemUnmap__)(struct ExtendedGpuMemory * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__egmmemGetMemInterMapParams__)(struct ExtendedGpuMemory * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__egmmemCheckMemInterUnmap__)(struct ExtendedGpuMemory * /*this*/, NvBool); // inline virtual inherited (mem) base (stdmem) body + NV_STATUS (*__egmmemGetMemoryMappingDescriptor__)(struct ExtendedGpuMemory * /*this*/, MEMORY_DESCRIPTOR **); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__egmmemCheckCopyPermissions__)(struct ExtendedGpuMemory * /*this*/, struct OBJGPU *, struct Device *); // inline virtual inherited (mem) base (stdmem) body + NV_STATUS (*__egmmemIsReady__)(struct ExtendedGpuMemory * /*this*/, NvBool); // virtual inherited (mem) base (stdmem) + NvBool (*__egmmemIsGpuMapAllowed__)(struct ExtendedGpuMemory * /*this*/, struct OBJGPU *); // inline virtual inherited (mem) base (stdmem) body + NvBool (*__egmmemIsExportAllowed__)(struct ExtendedGpuMemory * /*this*/); // inline virtual inherited (mem) base (stdmem) body + NvBool (*__egmmemAccessCallback__)(struct ExtendedGpuMemory * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (stdmem) + NvBool (*__egmmemShareCallback__)(struct ExtendedGpuMemory * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (stdmem) + NV_STATUS (*__egmmemControlSerialization_Prologue__)(struct ExtendedGpuMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (stdmem) + void (*__egmmemControlSerialization_Epilogue__)(struct ExtendedGpuMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (stdmem) + NV_STATUS (*__egmmemControl_Prologue__)(struct ExtendedGpuMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (stdmem) + void (*__egmmemControl_Epilogue__)(struct ExtendedGpuMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (stdmem) + void (*__egmmemPreDestruct__)(struct ExtendedGpuMemory * /*this*/); // virtual inherited (res) base (stdmem) + NV_STATUS (*__egmmemControlFilter__)(struct ExtendedGpuMemory * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (stdmem) + NvBool (*__egmmemIsPartialUnmapSupported__)(struct ExtendedGpuMemory * /*this*/); // inline virtual inherited (res) base (stdmem) body + NV_STATUS (*__egmmemMapTo__)(struct ExtendedGpuMemory * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (stdmem) + NV_STATUS (*__egmmemUnmapFrom__)(struct ExtendedGpuMemory * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (stdmem) + NvU32 (*__egmmemGetRefCount__)(struct ExtendedGpuMemory * /*this*/); // virtual inherited (res) base (stdmem) + void (*__egmmemAddAdditionalDependants__)(struct RsClient *, struct ExtendedGpuMemory * /*this*/, RsResourceRef *); // virtual inherited (res) base (stdmem) }; #ifndef __NVOC_CLASS_ExtendedGpuMemory_TYPEDEF__ @@ -99,6 +116,7 @@ typedef struct ExtendedGpuMemory ExtendedGpuMemory; #define __nvoc_class_id_ExtendedGpuMemory 0xeffa5c #endif /* __nvoc_class_id_ExtendedGpuMemory */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_ExtendedGpuMemory; #define __staticCast_ExtendedGpuMemory(pThis) \ @@ -111,141 +129,170 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_ExtendedGpuMemory; ((ExtendedGpuMemory*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(ExtendedGpuMemory))) #endif //__nvoc_egm_mem_h_disabled - NV_STATUS __nvoc_objCreateDynamic_ExtendedGpuMemory(ExtendedGpuMemory**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_ExtendedGpuMemory(ExtendedGpuMemory**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_ExtendedGpuMemory(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_ExtendedGpuMemory((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) -#define egmmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) egmmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define egmmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) egmmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define egmmemMapTo(pResource, pParams) egmmemMapTo_DISPATCH(pResource, pParams) + +// Wrapper macros +#define egmmemCanCopy_FNPTR(pStandardMemory) pStandardMemory->__nvoc_base_StandardMemory.__stdmemCanCopy__ +#define egmmemCanCopy(pStandardMemory) egmmemCanCopy_DISPATCH(pStandardMemory) +#define egmmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsDuplicate__ +#define egmmemIsDuplicate(pMemory, hMemory, pDuplicate) egmmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) +#define egmmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMapAddrSpace__ #define egmmemGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) egmmemGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define egmmemIsExportAllowed(pMemory) egmmemIsExportAllowed_DISPATCH(pMemory) -#define egmmemGetRefCount(pResource) egmmemGetRefCount_DISPATCH(pResource) -#define egmmemAddAdditionalDependants(pClient, pResource, pReference) egmmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define egmmemControl_Prologue(pResource, pCallContext, pParams) egmmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define egmmemIsGpuMapAllowed(pMemory, pGpu) egmmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define egmmemUnmapFrom(pResource, pParams) egmmemUnmapFrom_DISPATCH(pResource, pParams) -#define egmmemControl_Epilogue(pResource, pCallContext, pParams) egmmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define egmmemControl_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memControl__ #define egmmemControl(pMemory, pCallContext, pParams) egmmemControl_DISPATCH(pMemory, pCallContext, pParams) +#define egmmemMap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memMap__ +#define egmmemMap(pMemory, pCallContext, pParams, pCpuMapping) egmmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define egmmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memUnmap__ #define egmmemUnmap(pMemory, pCallContext, pCpuMapping) egmmemUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) +#define egmmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMemInterMapParams__ #define egmmemGetMemInterMapParams(pMemory, pParams) egmmemGetMemInterMapParams_DISPATCH(pMemory, pParams) +#define egmmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define egmmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) egmmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) +#define egmmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ #define egmmemGetMemoryMappingDescriptor(pMemory, ppMemDesc) egmmemGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define egmmemControlFilter(pResource, pCallContext, pParams) egmmemControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define egmmemControlSerialization_Prologue(pResource, pCallContext, pParams) egmmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define egmmemCanCopy(pStandardMemory) egmmemCanCopy_DISPATCH(pStandardMemory) -#define egmmemIsPartialUnmapSupported(pResource) egmmemIsPartialUnmapSupported_DISPATCH(pResource) -#define egmmemIsReady(pMemory, bCopyConstructorContext) egmmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define egmmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckCopyPermissions__ #define egmmemCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) egmmemCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define egmmemPreDestruct(pResource) egmmemPreDestruct_DISPATCH(pResource) -#define egmmemIsDuplicate(pMemory, hMemory, pDuplicate) egmmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define egmmemControlSerialization_Epilogue(pResource, pCallContext, pParams) egmmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define egmmemMap(pMemory, pCallContext, pParams, pCpuMapping) egmmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define egmmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsReady__ +#define egmmemIsReady(pMemory, bCopyConstructorContext) egmmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define egmmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define egmmemIsGpuMapAllowed(pMemory, pGpu) egmmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) +#define egmmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsExportAllowed__ +#define egmmemIsExportAllowed(pMemory) egmmemIsExportAllowed_DISPATCH(pMemory) +#define egmmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ #define egmmemAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) egmmemAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -static inline NV_STATUS egmmemCheckMemInterUnmap_DISPATCH(struct ExtendedGpuMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__egmmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); -} +#define egmmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define egmmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) egmmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define egmmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define egmmemControlSerialization_Prologue(pResource, pCallContext, pParams) egmmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define egmmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define egmmemControlSerialization_Epilogue(pResource, pCallContext, pParams) egmmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define egmmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define egmmemControl_Prologue(pResource, pCallContext, pParams) egmmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define egmmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define egmmemControl_Epilogue(pResource, pCallContext, pParams) egmmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define egmmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define egmmemPreDestruct(pResource) egmmemPreDestruct_DISPATCH(pResource) +#define egmmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define egmmemControlFilter(pResource, pCallContext, pParams) egmmemControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define egmmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define egmmemIsPartialUnmapSupported(pResource) egmmemIsPartialUnmapSupported_DISPATCH(pResource) +#define egmmemMapTo_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define egmmemMapTo(pResource, pParams) egmmemMapTo_DISPATCH(pResource, pParams) +#define egmmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define egmmemUnmapFrom(pResource, pParams) egmmemUnmapFrom_DISPATCH(pResource, pParams) +#define egmmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define egmmemGetRefCount(pResource) egmmemGetRefCount_DISPATCH(pResource) +#define egmmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define egmmemAddAdditionalDependants(pClient, pResource, pReference) egmmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -static inline NvBool egmmemShareCallback_DISPATCH(struct ExtendedGpuMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__egmmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); +// Dispatch functions +static inline NvBool egmmemCanCopy_DISPATCH(struct ExtendedGpuMemory *pStandardMemory) { + return pStandardMemory->__egmmemCanCopy__(pStandardMemory); } -static inline NV_STATUS egmmemMapTo_DISPATCH(struct ExtendedGpuMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__egmmemMapTo__(pResource, pParams); +static inline NV_STATUS egmmemIsDuplicate_DISPATCH(struct ExtendedGpuMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return pMemory->__egmmemIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS egmmemGetMapAddrSpace_DISPATCH(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pMemory->__egmmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } -static inline NvBool egmmemIsExportAllowed_DISPATCH(struct ExtendedGpuMemory *pMemory) { - return pMemory->__egmmemIsExportAllowed__(pMemory); +static inline NV_STATUS egmmemControl_DISPATCH(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pMemory->__egmmemControl__(pMemory, pCallContext, pParams); } -static inline NvU32 egmmemGetRefCount_DISPATCH(struct ExtendedGpuMemory *pResource) { - return pResource->__egmmemGetRefCount__(pResource); +static inline NV_STATUS egmmemMap_DISPATCH(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pMemory->__egmmemMap__(pMemory, pCallContext, pParams, pCpuMapping); } -static inline void egmmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ExtendedGpuMemory *pResource, RsResourceRef *pReference) { - pResource->__egmmemAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS egmmemUnmap_DISPATCH(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pMemory->__egmmemUnmap__(pMemory, pCallContext, pCpuMapping); } -static inline NV_STATUS egmmemControl_Prologue_DISPATCH(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__egmmemControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS egmmemGetMemInterMapParams_DISPATCH(struct ExtendedGpuMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pMemory->__egmmemGetMemInterMapParams__(pMemory, pParams); } -static inline NvBool egmmemIsGpuMapAllowed_DISPATCH(struct ExtendedGpuMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__egmmemIsGpuMapAllowed__(pMemory, pGpu); +static inline NV_STATUS egmmemCheckMemInterUnmap_DISPATCH(struct ExtendedGpuMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return pMemory->__egmmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } -static inline NV_STATUS egmmemUnmapFrom_DISPATCH(struct ExtendedGpuMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__egmmemUnmapFrom__(pResource, pParams); +static inline NV_STATUS egmmemGetMemoryMappingDescriptor_DISPATCH(struct ExtendedGpuMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return pMemory->__egmmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } -static inline void egmmemControl_Epilogue_DISPATCH(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__egmmemControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS egmmemCheckCopyPermissions_DISPATCH(struct ExtendedGpuMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return pMemory->__egmmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } -static inline NV_STATUS egmmemControl_DISPATCH(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__egmmemControl__(pMemory, pCallContext, pParams); +static inline NV_STATUS egmmemIsReady_DISPATCH(struct ExtendedGpuMemory *pMemory, NvBool bCopyConstructorContext) { + return pMemory->__egmmemIsReady__(pMemory, bCopyConstructorContext); } -static inline NV_STATUS egmmemUnmap_DISPATCH(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__egmmemUnmap__(pMemory, pCallContext, pCpuMapping); +static inline NvBool egmmemIsGpuMapAllowed_DISPATCH(struct ExtendedGpuMemory *pMemory, struct OBJGPU *pGpu) { + return pMemory->__egmmemIsGpuMapAllowed__(pMemory, pGpu); } -static inline NV_STATUS egmmemGetMemInterMapParams_DISPATCH(struct ExtendedGpuMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__egmmemGetMemInterMapParams__(pMemory, pParams); +static inline NvBool egmmemIsExportAllowed_DISPATCH(struct ExtendedGpuMemory *pMemory) { + return pMemory->__egmmemIsExportAllowed__(pMemory); } -static inline NV_STATUS egmmemGetMemoryMappingDescriptor_DISPATCH(struct ExtendedGpuMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__egmmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); +static inline NvBool egmmemAccessCallback_DISPATCH(struct ExtendedGpuMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__egmmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS egmmemControlFilter_DISPATCH(struct ExtendedGpuMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__egmmemControlFilter__(pResource, pCallContext, pParams); +static inline NvBool egmmemShareCallback_DISPATCH(struct ExtendedGpuMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__egmmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS egmmemControlSerialization_Prologue_DISPATCH(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__egmmemControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool egmmemCanCopy_DISPATCH(struct ExtendedGpuMemory *pStandardMemory) { - return pStandardMemory->__egmmemCanCopy__(pStandardMemory); -} - -static inline NvBool egmmemIsPartialUnmapSupported_DISPATCH(struct ExtendedGpuMemory *pResource) { - return pResource->__egmmemIsPartialUnmapSupported__(pResource); +static inline void egmmemControlSerialization_Epilogue_DISPATCH(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__egmmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS egmmemIsReady_DISPATCH(struct ExtendedGpuMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__egmmemIsReady__(pMemory, bCopyConstructorContext); +static inline NV_STATUS egmmemControl_Prologue_DISPATCH(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__egmmemControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS egmmemCheckCopyPermissions_DISPATCH(struct ExtendedGpuMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__egmmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); +static inline void egmmemControl_Epilogue_DISPATCH(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__egmmemControl_Epilogue__(pResource, pCallContext, pParams); } static inline void egmmemPreDestruct_DISPATCH(struct ExtendedGpuMemory *pResource) { pResource->__egmmemPreDestruct__(pResource); } -static inline NV_STATUS egmmemIsDuplicate_DISPATCH(struct ExtendedGpuMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__egmmemIsDuplicate__(pMemory, hMemory, pDuplicate); +static inline NV_STATUS egmmemControlFilter_DISPATCH(struct ExtendedGpuMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__egmmemControlFilter__(pResource, pCallContext, pParams); } -static inline void egmmemControlSerialization_Epilogue_DISPATCH(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__egmmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool egmmemIsPartialUnmapSupported_DISPATCH(struct ExtendedGpuMemory *pResource) { + return pResource->__egmmemIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS egmmemMap_DISPATCH(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__egmmemMap__(pMemory, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS egmmemMapTo_DISPATCH(struct ExtendedGpuMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__egmmemMapTo__(pResource, pParams); } -static inline NvBool egmmemAccessCallback_DISPATCH(struct ExtendedGpuMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__egmmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS egmmemUnmapFrom_DISPATCH(struct ExtendedGpuMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__egmmemUnmapFrom__(pResource, pParams); +} + +static inline NvU32 egmmemGetRefCount_DISPATCH(struct ExtendedGpuMemory *pResource) { + return pResource->__egmmemGetRefCount__(pResource); +} + +static inline void egmmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ExtendedGpuMemory *pResource, RsResourceRef *pReference) { + pResource->__egmmemAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS egmmemConstruct_IMPL(struct ExtendedGpuMemory *arg_pStandardMemory, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_eng_desc_nvoc.h b/src/nvidia/generated/g_eng_desc_nvoc.h index 6cdb0527d2..2053ba557d 100644 --- a/src/nvidia/generated/g_eng_desc_nvoc.h +++ b/src/nvidia/generated/g_eng_desc_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_ENG_DESC_NVOC_H_ #define _G_ENG_DESC_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2013-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2013-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_eng_desc_nvoc.h" #ifndef _ENG_DESC_H_ @@ -56,6 +64,7 @@ typedef NvU32 ENGDESCRIPTOR, *PENGDESCRIPTOR; // // Class declarations to get classIds for use with ENGDESCRIPTOR // + struct OBJINVALID; #ifndef __NVOC_CLASS_OBJINVALID_TYPEDEF__ @@ -68,6 +77,7 @@ typedef struct OBJINVALID OBJINVALID; #endif /* __nvoc_class_id_OBJINVALID */ // classId only. Not a real class + struct OBJSWENG; #ifndef __NVOC_CLASS_OBJSWENG_TYPEDEF__ @@ -80,6 +90,7 @@ typedef struct OBJSWENG OBJSWENG; #endif /* __nvoc_class_id_OBJSWENG */ + struct OBJGPU; #ifndef __NVOC_CLASS_OBJGPU_TYPEDEF__ @@ -92,6 +103,7 @@ typedef struct OBJGPU OBJGPU; #endif /* __nvoc_class_id_OBJGPU */ + struct Falcon; #ifndef __NVOC_CLASS_Falcon_TYPEDEF__ @@ -104,6 +116,7 @@ typedef struct Falcon Falcon; #endif /* __nvoc_class_id_Falcon */ + struct OBJMC; #ifndef __NVOC_CLASS_OBJMC_TYPEDEF__ @@ -116,6 +129,7 @@ typedef struct OBJMC OBJMC; #endif /* __nvoc_class_id_OBJMC */ + struct KernelMc; #ifndef __NVOC_CLASS_KernelMc_TYPEDEF__ @@ -128,6 +142,7 @@ typedef struct KernelMc KernelMc; #endif /* __nvoc_class_id_KernelMc */ + struct PrivRing; #ifndef __NVOC_CLASS_PrivRing_TYPEDEF__ @@ -140,6 +155,7 @@ typedef struct PrivRing PrivRing; #endif /* __nvoc_class_id_PrivRing */ + struct SwIntr; #ifndef __NVOC_CLASS_SwIntr_TYPEDEF__ @@ -152,6 +168,7 @@ typedef struct SwIntr SwIntr; #endif /* __nvoc_class_id_SwIntr */ + struct MemorySystem; #ifndef __NVOC_CLASS_MemorySystem_TYPEDEF__ @@ -164,6 +181,7 @@ typedef struct MemorySystem MemorySystem; #endif /* __nvoc_class_id_MemorySystem */ + struct KernelMemorySystem; #ifndef __NVOC_CLASS_KernelMemorySystem_TYPEDEF__ @@ -176,6 +194,7 @@ typedef struct KernelMemorySystem KernelMemorySystem; #endif /* __nvoc_class_id_KernelMemorySystem */ + struct MemoryManager; #ifndef __NVOC_CLASS_MemoryManager_TYPEDEF__ @@ -188,6 +207,7 @@ typedef struct MemoryManager MemoryManager; #endif /* __nvoc_class_id_MemoryManager */ + struct OBJFBFLCN; #ifndef __NVOC_CLASS_OBJFBFLCN_TYPEDEF__ @@ -200,6 +220,7 @@ typedef struct OBJFBFLCN OBJFBFLCN; #endif /* __nvoc_class_id_OBJFBFLCN */ + struct OBJHSHUBMANAGER; #ifndef __NVOC_CLASS_OBJHSHUBMANAGER_TYPEDEF__ @@ -212,6 +233,7 @@ typedef struct OBJHSHUBMANAGER OBJHSHUBMANAGER; #endif /* __nvoc_class_id_OBJHSHUBMANAGER */ + struct Hshub; #ifndef __NVOC_CLASS_Hshub_TYPEDEF__ @@ -224,6 +246,7 @@ typedef struct Hshub Hshub; #endif /* __nvoc_class_id_Hshub */ + struct OBJTMR; #ifndef __NVOC_CLASS_OBJTMR_TYPEDEF__ @@ -236,6 +259,7 @@ typedef struct OBJTMR OBJTMR; #endif /* __nvoc_class_id_OBJTMR */ + struct VirtMemAllocator; #ifndef __NVOC_CLASS_VirtMemAllocator_TYPEDEF__ @@ -248,6 +272,7 @@ typedef struct VirtMemAllocator VirtMemAllocator; #endif /* __nvoc_class_id_VirtMemAllocator */ + struct Graphics; #ifndef __NVOC_CLASS_Graphics_TYPEDEF__ @@ -260,6 +285,7 @@ typedef struct Graphics Graphics; #endif /* __nvoc_class_id_Graphics */ + struct OBJGR; #ifndef __NVOC_CLASS_OBJGR_TYPEDEF__ @@ -272,6 +298,7 @@ typedef struct OBJGR OBJGR; #endif /* __nvoc_class_id_OBJGR */ // classId only. Not a real class. Bug 200664045 + struct GraphicsManager; #ifndef __NVOC_CLASS_GraphicsManager_TYPEDEF__ @@ -284,6 +311,7 @@ typedef struct GraphicsManager GraphicsManager; #endif /* __nvoc_class_id_GraphicsManager */ + struct KernelGraphicsManager; #ifndef __NVOC_CLASS_KernelGraphicsManager_TYPEDEF__ @@ -296,6 +324,7 @@ typedef struct KernelGraphicsManager KernelGraphicsManager; #endif /* __nvoc_class_id_KernelGraphicsManager */ + struct MIGManager; #ifndef __NVOC_CLASS_MIGManager_TYPEDEF__ @@ -308,6 +337,7 @@ typedef struct MIGManager MIGManager; #endif /* __nvoc_class_id_MIGManager */ + struct KernelMIGManager; #ifndef __NVOC_CLASS_KernelMIGManager_TYPEDEF__ @@ -320,6 +350,7 @@ typedef struct KernelMIGManager KernelMIGManager; #endif /* __nvoc_class_id_KernelMIGManager */ + struct SMDebugger; #ifndef __NVOC_CLASS_SMDebugger_TYPEDEF__ @@ -332,6 +363,7 @@ typedef struct SMDebugger SMDebugger; #endif /* __nvoc_class_id_SMDebugger */ + struct KernelGraphics; #ifndef __NVOC_CLASS_KernelGraphics_TYPEDEF__ @@ -344,6 +376,7 @@ typedef struct KernelGraphics KernelGraphics; #endif /* __nvoc_class_id_KernelGraphics */ + struct KernelFifo; #ifndef __NVOC_CLASS_KernelFifo_TYPEDEF__ @@ -356,6 +389,7 @@ typedef struct KernelFifo KernelFifo; #endif /* __nvoc_class_id_KernelFifo */ + struct OBJFIFO; #ifndef __NVOC_CLASS_OBJFIFO_TYPEDEF__ @@ -368,6 +402,7 @@ typedef struct OBJFIFO OBJFIFO; #endif /* __nvoc_class_id_OBJFIFO */ + struct OBJOS; #ifndef __NVOC_CLASS_OBJOS_TYPEDEF__ @@ -380,6 +415,7 @@ typedef struct OBJOS OBJOS; #endif /* __nvoc_class_id_OBJOS */ + struct OBJBUS; #ifndef __NVOC_CLASS_OBJBUS_TYPEDEF__ @@ -392,6 +428,7 @@ typedef struct OBJBUS OBJBUS; #endif /* __nvoc_class_id_OBJBUS */ + struct KernelBus; #ifndef __NVOC_CLASS_KernelBus_TYPEDEF__ @@ -404,6 +441,7 @@ typedef struct KernelBus KernelBus; #endif /* __nvoc_class_id_KernelBus */ + struct OBJINFOROM; #ifndef __NVOC_CLASS_OBJINFOROM_TYPEDEF__ @@ -416,6 +454,7 @@ typedef struct OBJINFOROM OBJINFOROM; #endif /* __nvoc_class_id_OBJINFOROM */ + struct Perf; #ifndef __NVOC_CLASS_Perf_TYPEDEF__ @@ -428,6 +467,7 @@ typedef struct Perf Perf; #endif /* __nvoc_class_id_Perf */ + struct KernelPerf; #ifndef __NVOC_CLASS_KernelPerf_TYPEDEF__ @@ -440,6 +480,7 @@ typedef struct KernelPerf KernelPerf; #endif /* __nvoc_class_id_KernelPerf */ + struct Pxuc; #ifndef __NVOC_CLASS_Pxuc_TYPEDEF__ @@ -452,6 +493,7 @@ typedef struct Pxuc Pxuc; #endif /* __nvoc_class_id_Pxuc */ + struct OBJBIF; #ifndef __NVOC_CLASS_OBJBIF_TYPEDEF__ @@ -464,6 +506,7 @@ typedef struct OBJBIF OBJBIF; #endif /* __nvoc_class_id_OBJBIF */ + struct KernelBif; #ifndef __NVOC_CLASS_KernelBif_TYPEDEF__ @@ -476,6 +519,7 @@ typedef struct KernelBif KernelBif; #endif /* __nvoc_class_id_KernelBif */ + struct OBJSF; #ifndef __NVOC_CLASS_OBJSF_TYPEDEF__ @@ -488,6 +532,7 @@ typedef struct OBJSF OBJSF; #endif /* __nvoc_class_id_OBJSF */ + struct OBJGPIO; #ifndef __NVOC_CLASS_OBJGPIO_TYPEDEF__ @@ -500,6 +545,7 @@ typedef struct OBJGPIO OBJGPIO; #endif /* __nvoc_class_id_OBJGPIO */ + struct ClockManager; #ifndef __NVOC_CLASS_ClockManager_TYPEDEF__ @@ -512,6 +558,7 @@ typedef struct ClockManager ClockManager; #endif /* __nvoc_class_id_ClockManager */ + struct KernelDisplay; #ifndef __NVOC_CLASS_KernelDisplay_TYPEDEF__ @@ -524,6 +571,7 @@ typedef struct KernelDisplay KernelDisplay; #endif /* __nvoc_class_id_KernelDisplay */ + struct OBJDISP; #ifndef __NVOC_CLASS_OBJDISP_TYPEDEF__ @@ -536,6 +584,7 @@ typedef struct OBJDISP OBJDISP; #endif /* __nvoc_class_id_OBJDISP */ + struct OBJDPU; #ifndef __NVOC_CLASS_OBJDPU_TYPEDEF__ @@ -548,6 +597,7 @@ typedef struct OBJDPU OBJDPU; #endif /* __nvoc_class_id_OBJDPU */ + struct OBJDIP; #ifndef __NVOC_CLASS_OBJDIP_TYPEDEF__ @@ -560,6 +610,7 @@ typedef struct OBJDIP OBJDIP; #endif /* __nvoc_class_id_OBJDIP */ + struct Fan; #ifndef __NVOC_CLASS_Fan_TYPEDEF__ @@ -572,6 +623,7 @@ typedef struct Fan Fan; #endif /* __nvoc_class_id_Fan */ + struct DisplayInstanceMemory; #ifndef __NVOC_CLASS_DisplayInstanceMemory_TYPEDEF__ @@ -584,6 +636,7 @@ typedef struct DisplayInstanceMemory DisplayInstanceMemory; #endif /* __nvoc_class_id_DisplayInstanceMemory */ + struct KernelHead; #ifndef __NVOC_CLASS_KernelHead_TYPEDEF__ @@ -596,6 +649,7 @@ typedef struct KernelHead KernelHead; #endif /* __nvoc_class_id_KernelHead */ + struct OBJVOLT; #ifndef __NVOC_CLASS_OBJVOLT_TYPEDEF__ @@ -608,6 +662,7 @@ typedef struct OBJVOLT OBJVOLT; #endif /* __nvoc_class_id_OBJVOLT */ + struct Intr; #ifndef __NVOC_CLASS_Intr_TYPEDEF__ @@ -620,6 +675,7 @@ typedef struct Intr Intr; #endif /* __nvoc_class_id_Intr */ + struct OBJHDA; #ifndef __NVOC_CLASS_OBJHDA_TYPEDEF__ @@ -632,6 +688,7 @@ typedef struct OBJHDA OBJHDA; #endif /* __nvoc_class_id_OBJHDA */ + struct I2c; #ifndef __NVOC_CLASS_I2c_TYPEDEF__ @@ -644,6 +701,7 @@ typedef struct I2c I2c; #endif /* __nvoc_class_id_I2c */ + struct KernelRc; #ifndef __NVOC_CLASS_KernelRc_TYPEDEF__ @@ -656,6 +714,7 @@ typedef struct KernelRc KernelRc; #endif /* __nvoc_class_id_KernelRc */ + struct OBJRC; #ifndef __NVOC_CLASS_OBJRC_TYPEDEF__ @@ -668,6 +727,7 @@ typedef struct OBJRC OBJRC; #endif /* __nvoc_class_id_OBJRC */ + struct OBJSOR; #ifndef __NVOC_CLASS_OBJSOR_TYPEDEF__ @@ -680,6 +740,7 @@ typedef struct OBJSOR OBJSOR; #endif /* __nvoc_class_id_OBJSOR */ + struct OBJDAC; #ifndef __NVOC_CLASS_OBJDAC_TYPEDEF__ @@ -692,6 +753,7 @@ typedef struct OBJDAC OBJDAC; #endif /* __nvoc_class_id_OBJDAC */ + struct OBJPIOR; #ifndef __NVOC_CLASS_OBJPIOR_TYPEDEF__ @@ -704,6 +766,7 @@ typedef struct OBJPIOR OBJPIOR; #endif /* __nvoc_class_id_OBJPIOR */ + struct OBJHEAD; #ifndef __NVOC_CLASS_OBJHEAD_TYPEDEF__ @@ -716,6 +779,7 @@ typedef struct OBJHEAD OBJHEAD; #endif /* __nvoc_class_id_OBJHEAD */ + struct OBJVGA; #ifndef __NVOC_CLASS_OBJVGA_TYPEDEF__ @@ -728,6 +792,7 @@ typedef struct OBJVGA OBJVGA; #endif /* __nvoc_class_id_OBJVGA */ + struct Stereo; #ifndef __NVOC_CLASS_Stereo_TYPEDEF__ @@ -740,6 +805,7 @@ typedef struct Stereo Stereo; #endif /* __nvoc_class_id_Stereo */ + struct OBJOR; #ifndef __NVOC_CLASS_OBJOR_TYPEDEF__ @@ -752,6 +818,7 @@ typedef struct OBJOR OBJOR; #endif /* __nvoc_class_id_OBJOR */ + struct OBJBSP; #ifndef __NVOC_CLASS_OBJBSP_TYPEDEF__ @@ -764,6 +831,7 @@ typedef struct OBJBSP OBJBSP; #endif /* __nvoc_class_id_OBJBSP */ + struct OBJCIPHER; #ifndef __NVOC_CLASS_OBJCIPHER_TYPEDEF__ @@ -776,6 +844,7 @@ typedef struct OBJCIPHER OBJCIPHER; #endif /* __nvoc_class_id_OBJCIPHER */ + struct OBJFUSE; #ifndef __NVOC_CLASS_OBJFUSE_TYPEDEF__ @@ -788,6 +857,7 @@ typedef struct OBJFUSE OBJFUSE; #endif /* __nvoc_class_id_OBJFUSE */ + struct OBJHDCP; #ifndef __NVOC_CLASS_OBJHDCP_TYPEDEF__ @@ -800,6 +870,7 @@ typedef struct OBJHDCP OBJHDCP; #endif /* __nvoc_class_id_OBJHDCP */ + struct OBJHDMI; #ifndef __NVOC_CLASS_OBJHDMI_TYPEDEF__ @@ -812,6 +883,7 @@ typedef struct OBJHDMI OBJHDMI; #endif /* __nvoc_class_id_OBJHDMI */ + struct Therm; #ifndef __NVOC_CLASS_Therm_TYPEDEF__ @@ -824,6 +896,7 @@ typedef struct Therm Therm; #endif /* __nvoc_class_id_Therm */ + struct OBJSEQ; #ifndef __NVOC_CLASS_OBJSEQ_TYPEDEF__ @@ -836,6 +909,7 @@ typedef struct OBJSEQ OBJSEQ; #endif /* __nvoc_class_id_OBJSEQ */ + struct OBJDPAUX; #ifndef __NVOC_CLASS_OBJDPAUX_TYPEDEF__ @@ -848,6 +922,7 @@ typedef struct OBJDPAUX OBJDPAUX; #endif /* __nvoc_class_id_OBJDPAUX */ + struct Pmu; #ifndef __NVOC_CLASS_Pmu_TYPEDEF__ @@ -860,6 +935,7 @@ typedef struct Pmu Pmu; #endif /* __nvoc_class_id_Pmu */ + struct KernelPmu; #ifndef __NVOC_CLASS_KernelPmu_TYPEDEF__ @@ -872,6 +948,7 @@ typedef struct KernelPmu KernelPmu; #endif /* __nvoc_class_id_KernelPmu */ + struct Lpwr; #ifndef __NVOC_CLASS_Lpwr_TYPEDEF__ @@ -884,6 +961,7 @@ typedef struct Lpwr Lpwr; #endif /* __nvoc_class_id_Lpwr */ + struct OBJISOHUB; #ifndef __NVOC_CLASS_OBJISOHUB_TYPEDEF__ @@ -896,6 +974,7 @@ typedef struct OBJISOHUB OBJISOHUB; #endif /* __nvoc_class_id_OBJISOHUB */ + struct Pmgr; #ifndef __NVOC_CLASS_Pmgr_TYPEDEF__ @@ -908,6 +987,7 @@ typedef struct Pmgr Pmgr; #endif /* __nvoc_class_id_Pmgr */ + struct OBJHDACODEC; #ifndef __NVOC_CLASS_OBJHDACODEC_TYPEDEF__ @@ -920,6 +1000,7 @@ typedef struct OBJHDACODEC OBJHDACODEC; #endif /* __nvoc_class_id_OBJHDACODEC */ + struct Spi; #ifndef __NVOC_CLASS_Spi_TYPEDEF__ @@ -932,6 +1013,7 @@ typedef struct Spi Spi; #endif /* __nvoc_class_id_Spi */ + struct OBJUVM; #ifndef __NVOC_CLASS_OBJUVM_TYPEDEF__ @@ -944,6 +1026,7 @@ typedef struct OBJUVM OBJUVM; #endif /* __nvoc_class_id_OBJUVM */ + struct OBJSEC2; #ifndef __NVOC_CLASS_OBJSEC2_TYPEDEF__ @@ -956,6 +1039,7 @@ typedef struct OBJSEC2 OBJSEC2; #endif /* __nvoc_class_id_OBJSEC2 */ + struct OBJPMS; #ifndef __NVOC_CLASS_OBJPMS_TYPEDEF__ @@ -968,6 +1052,7 @@ typedef struct OBJPMS OBJPMS; #endif /* __nvoc_class_id_OBJPMS */ + struct OBJENGSTATE; #ifndef __NVOC_CLASS_OBJENGSTATE_TYPEDEF__ @@ -980,6 +1065,7 @@ typedef struct OBJENGSTATE OBJENGSTATE; #endif /* __nvoc_class_id_OBJENGSTATE */ + struct OBJLSFM; #ifndef __NVOC_CLASS_OBJLSFM_TYPEDEF__ @@ -992,6 +1078,7 @@ typedef struct OBJLSFM OBJLSFM; #endif /* __nvoc_class_id_OBJLSFM */ + struct OBJACR; #ifndef __NVOC_CLASS_OBJACR_TYPEDEF__ @@ -1004,6 +1091,7 @@ typedef struct OBJACR OBJACR; #endif /* __nvoc_class_id_OBJACR */ + struct OBJGPULOG; #ifndef __NVOC_CLASS_OBJGPULOG_TYPEDEF__ @@ -1016,6 +1104,7 @@ typedef struct OBJGPULOG OBJGPULOG; #endif /* __nvoc_class_id_OBJGPULOG */ + struct KernelNvlink; #ifndef __NVOC_CLASS_KernelNvlink_TYPEDEF__ @@ -1028,6 +1117,7 @@ typedef struct KernelNvlink KernelNvlink; #endif /* __nvoc_class_id_KernelNvlink */ + struct Nvlink; #ifndef __NVOC_CLASS_Nvlink_TYPEDEF__ @@ -1040,6 +1130,7 @@ typedef struct Nvlink Nvlink; #endif /* __nvoc_class_id_Nvlink */ + struct KernelHwpm; #ifndef __NVOC_CLASS_KernelHwpm_TYPEDEF__ @@ -1052,6 +1143,7 @@ typedef struct KernelHwpm KernelHwpm; #endif /* __nvoc_class_id_KernelHwpm */ + struct OBJHWPM; #ifndef __NVOC_CLASS_OBJHWPM_TYPEDEF__ @@ -1064,6 +1156,7 @@ typedef struct OBJHWPM OBJHWPM; #endif /* __nvoc_class_id_OBJHWPM */ + struct OBJGPUMON; #ifndef __NVOC_CLASS_OBJGPUMON_TYPEDEF__ @@ -1076,6 +1169,7 @@ typedef struct OBJGPUMON OBJGPUMON; #endif /* __nvoc_class_id_OBJGPUMON */ + struct OBJGRIDDISPLAYLESS; #ifndef __NVOC_CLASS_OBJGRIDDISPLAYLESS_TYPEDEF__ @@ -1088,6 +1182,7 @@ typedef struct OBJGRIDDISPLAYLESS OBJGRIDDISPLAYLESS; #endif /* __nvoc_class_id_OBJGRIDDISPLAYLESS */ + struct FECS; #ifndef __NVOC_CLASS_FECS_TYPEDEF__ @@ -1100,6 +1195,7 @@ typedef struct FECS FECS; #endif /* __nvoc_class_id_FECS */ + struct GPCCS; #ifndef __NVOC_CLASS_GPCCS_TYPEDEF__ @@ -1112,6 +1208,7 @@ typedef struct GPCCS GPCCS; #endif /* __nvoc_class_id_GPCCS */ + struct OBJCE; #ifndef __NVOC_CLASS_OBJCE_TYPEDEF__ @@ -1124,6 +1221,7 @@ typedef struct OBJCE OBJCE; #endif /* __nvoc_class_id_OBJCE */ + struct KernelCE; #ifndef __NVOC_CLASS_KernelCE_TYPEDEF__ @@ -1136,6 +1234,7 @@ typedef struct KernelCE KernelCE; #endif /* __nvoc_class_id_KernelCE */ + struct OBJMSENC; #ifndef __NVOC_CLASS_OBJMSENC_TYPEDEF__ @@ -1148,6 +1247,7 @@ typedef struct OBJMSENC OBJMSENC; #endif /* __nvoc_class_id_OBJMSENC */ + struct OBJNVJPG; #ifndef __NVOC_CLASS_OBJNVJPG_TYPEDEF__ @@ -1160,6 +1260,7 @@ typedef struct OBJNVJPG OBJNVJPG; #endif /* __nvoc_class_id_OBJNVJPG */ + struct OBJVMMU; #ifndef __NVOC_CLASS_OBJVMMU_TYPEDEF__ @@ -1172,6 +1273,7 @@ typedef struct OBJVMMU OBJVMMU; #endif /* __nvoc_class_id_OBJVMMU */ + struct Gsp; #ifndef __NVOC_CLASS_Gsp_TYPEDEF__ @@ -1184,6 +1286,7 @@ typedef struct Gsp Gsp; #endif /* __nvoc_class_id_Gsp */ + struct OBJFSP; #ifndef __NVOC_CLASS_OBJFSP_TYPEDEF__ @@ -1196,6 +1299,7 @@ typedef struct OBJFSP OBJFSP; #endif /* __nvoc_class_id_OBJFSP */ + struct KernelFsp; #ifndef __NVOC_CLASS_KernelFsp_TYPEDEF__ @@ -1208,6 +1312,7 @@ typedef struct KernelFsp KernelFsp; #endif /* __nvoc_class_id_KernelFsp */ + struct OBJOFA; #ifndef __NVOC_CLASS_OBJOFA_TYPEDEF__ @@ -1220,6 +1325,7 @@ typedef struct OBJOFA OBJOFA; #endif /* __nvoc_class_id_OBJOFA */ + struct KernelIoctrl; #ifndef __NVOC_CLASS_KernelIoctrl_TYPEDEF__ @@ -1232,6 +1338,7 @@ typedef struct KernelIoctrl KernelIoctrl; #endif /* __nvoc_class_id_KernelIoctrl */ + struct Ioctrl; #ifndef __NVOC_CLASS_Ioctrl_TYPEDEF__ @@ -1244,6 +1351,7 @@ typedef struct Ioctrl Ioctrl; #endif /* __nvoc_class_id_Ioctrl */ + struct KernelSec2; #ifndef __NVOC_CLASS_KernelSec2_TYPEDEF__ @@ -1256,6 +1364,7 @@ typedef struct KernelSec2 KernelSec2; #endif /* __nvoc_class_id_KernelSec2 */ + struct KernelGsp; #ifndef __NVOC_CLASS_KernelGsp_TYPEDEF__ @@ -1268,6 +1377,7 @@ typedef struct KernelGsp KernelGsp; #endif /* __nvoc_class_id_KernelGsp */ + struct OBJDCECLIENTRM; #ifndef __NVOC_CLASS_OBJDCECLIENTRM_TYPEDEF__ @@ -1280,6 +1390,7 @@ typedef struct OBJDCECLIENTRM OBJDCECLIENTRM; #endif /* __nvoc_class_id_OBJDCECLIENTRM */ + struct OBJDISPMACRO; #ifndef __NVOC_CLASS_OBJDISPMACRO_TYPEDEF__ @@ -1292,6 +1403,7 @@ typedef struct OBJDISPMACRO OBJDISPMACRO; #endif /* __nvoc_class_id_OBJDISPMACRO */ + struct Nne; #ifndef __NVOC_CLASS_Nne_TYPEDEF__ @@ -1304,6 +1416,7 @@ typedef struct Nne Nne; #endif /* __nvoc_class_id_Nne */ + struct Smbpbi; #ifndef __NVOC_CLASS_Smbpbi_TYPEDEF__ @@ -1316,6 +1429,7 @@ typedef struct Smbpbi Smbpbi; #endif /* __nvoc_class_id_Smbpbi */ + struct OBJDSI; #ifndef __NVOC_CLASS_OBJDSI_TYPEDEF__ @@ -1328,6 +1442,7 @@ typedef struct OBJDSI OBJDSI; #endif /* __nvoc_class_id_OBJDSI */ + struct OBJDCB; #ifndef __NVOC_CLASS_OBJDCB_TYPEDEF__ @@ -1340,6 +1455,7 @@ typedef struct OBJDCB OBJDCB; #endif /* __nvoc_class_id_OBJDCB */ + struct KernelGmmu; #ifndef __NVOC_CLASS_KernelGmmu_TYPEDEF__ @@ -1352,6 +1468,7 @@ typedef struct KernelGmmu KernelGmmu; #endif /* __nvoc_class_id_KernelGmmu */ + struct OBJGMMU; #ifndef __NVOC_CLASS_OBJGMMU_TYPEDEF__ diff --git a/src/nvidia/generated/g_eng_state_nvoc.c b/src/nvidia/generated/g_eng_state_nvoc.c index 7714a91a3f..8c01a4473b 100644 --- a/src/nvidia/generated/g_eng_state_nvoc.c +++ b/src/nvidia/generated/g_eng_state_nvoc.c @@ -88,39 +88,58 @@ NV_STATUS __nvoc_ctor_OBJENGSTATE(OBJENGSTATE *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJENGSTATE_1(OBJENGSTATE *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // engstateConstructEngine -- virtual pThis->__engstateConstructEngine__ = &engstateConstructEngine_IMPL; + // engstateInitMissing -- virtual pThis->__engstateInitMissing__ = &engstateInitMissing_IMPL; + // engstateStatePreInitLocked -- virtual pThis->__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL; + // engstateStatePreInitUnlocked -- virtual pThis->__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL; + // engstateStateInitLocked -- virtual pThis->__engstateStateInitLocked__ = &engstateStateInitLocked_IMPL; + // engstateStateInitUnlocked -- virtual pThis->__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL; + // engstateStatePreLoad -- virtual pThis->__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL; + // engstateStateLoad -- virtual pThis->__engstateStateLoad__ = &engstateStateLoad_IMPL; + // engstateStatePostLoad -- virtual pThis->__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL; + // engstateStatePreUnload -- virtual pThis->__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL; + // engstateStateUnload -- virtual pThis->__engstateStateUnload__ = &engstateStateUnload_IMPL; + // engstateStatePostUnload -- virtual pThis->__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL; + // engstateStateDestroy -- virtual pThis->__engstateStateDestroy__ = &engstateStateDestroy_IMPL; + // engstateIsPresent -- virtual pThis->__engstateIsPresent__ = &engstateIsPresent_IMPL; -} +} // End __nvoc_init_funcTable_OBJENGSTATE_1 with approximately 14 basic block(s). + +// Initialize vtable(s) for 14 virtual method(s). void __nvoc_init_funcTable_OBJENGSTATE(OBJENGSTATE *pThis) { + + // Initialize vtable(s) with 14 per-object function pointer(s). __nvoc_init_funcTable_OBJENGSTATE_1(pThis); } diff --git a/src/nvidia/generated/g_eng_state_nvoc.h b/src/nvidia/generated/g_eng_state_nvoc.h index 6605f1958f..289a2d37aa 100644 --- a/src/nvidia/generated/g_eng_state_nvoc.h +++ b/src/nvidia/generated/g_eng_state_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_ENG_STATE_NVOC_H_ #define _G_ENG_STATE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_eng_state_nvoc.h" #ifndef _ENG_STATE_H_ @@ -73,15 +81,6 @@ typedef struct ENGSTATE_TRANSITION_DATA NvU64 transitionStartTimeNs; } ENGSTATE_TRANSITION_DATA; -// Engine status for each state -typedef struct ENGSTATE_STATUS -{ - NV_STATUS engStatus; -#if NV_PRINTF_STRINGS_ALLOWED - char name[100]; -#endif -} ENGSTATE_STATUS; - typedef struct OBJENGSTATE *POBJENGSTATE; #define ENG_GET_FIFO(p) (engstateGetFifo(staticCast((p), OBJENGSTATE))) @@ -102,31 +101,43 @@ typedef struct OBJENGSTATE *POBJENGSTATE; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJENGSTATE { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - NV_STATUS (*__engstateConstructEngine__)(POBJGPU, POBJENGSTATE, ENGDESCRIPTOR); - void (*__engstateInitMissing__)(POBJGPU, POBJENGSTATE); - NV_STATUS (*__engstateStatePreInitLocked__)(POBJGPU, POBJENGSTATE); - NV_STATUS (*__engstateStatePreInitUnlocked__)(POBJGPU, POBJENGSTATE); - NV_STATUS (*__engstateStateInitLocked__)(POBJGPU, POBJENGSTATE); - NV_STATUS (*__engstateStateInitUnlocked__)(POBJGPU, POBJENGSTATE); - NV_STATUS (*__engstateStatePreLoad__)(POBJGPU, POBJENGSTATE, NvU32); - NV_STATUS (*__engstateStateLoad__)(POBJGPU, POBJENGSTATE, NvU32); - NV_STATUS (*__engstateStatePostLoad__)(POBJGPU, POBJENGSTATE, NvU32); - NV_STATUS (*__engstateStatePreUnload__)(POBJGPU, POBJENGSTATE, NvU32); - NV_STATUS (*__engstateStateUnload__)(POBJGPU, POBJENGSTATE, NvU32); - NV_STATUS (*__engstateStatePostUnload__)(POBJGPU, POBJENGSTATE, NvU32); - void (*__engstateStateDestroy__)(POBJGPU, POBJENGSTATE); - NvBool (*__engstateIsPresent__)(POBJGPU, POBJENGSTATE); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate + + // Vtable with 14 per-object function pointers + NV_STATUS (*__engstateConstructEngine__)(POBJGPU, struct OBJENGSTATE * /*this*/, ENGDESCRIPTOR); // virtual + void (*__engstateInitMissing__)(POBJGPU, struct OBJENGSTATE * /*this*/); // virtual + NV_STATUS (*__engstateStatePreInitLocked__)(POBJGPU, struct OBJENGSTATE * /*this*/); // virtual + NV_STATUS (*__engstateStatePreInitUnlocked__)(POBJGPU, struct OBJENGSTATE * /*this*/); // virtual + NV_STATUS (*__engstateStateInitLocked__)(POBJGPU, struct OBJENGSTATE * /*this*/); // virtual + NV_STATUS (*__engstateStateInitUnlocked__)(POBJGPU, struct OBJENGSTATE * /*this*/); // virtual + NV_STATUS (*__engstateStatePreLoad__)(POBJGPU, struct OBJENGSTATE * /*this*/, NvU32); // virtual + NV_STATUS (*__engstateStateLoad__)(POBJGPU, struct OBJENGSTATE * /*this*/, NvU32); // virtual + NV_STATUS (*__engstateStatePostLoad__)(POBJGPU, struct OBJENGSTATE * /*this*/, NvU32); // virtual + NV_STATUS (*__engstateStatePreUnload__)(POBJGPU, struct OBJENGSTATE * /*this*/, NvU32); // virtual + NV_STATUS (*__engstateStateUnload__)(POBJGPU, struct OBJENGSTATE * /*this*/, NvU32); // virtual + NV_STATUS (*__engstateStatePostUnload__)(POBJGPU, struct OBJENGSTATE * /*this*/, NvU32); // virtual + void (*__engstateStateDestroy__)(POBJGPU, struct OBJENGSTATE * /*this*/); // virtual + NvBool (*__engstateIsPresent__)(POBJGPU, struct OBJENGSTATE * /*this*/); // virtual + + // 1 PDB property NvBool PDB_PROP_ENGSTATE_IS_MISSING; + + // Data members ENGDESCRIPTOR engDesc; struct OBJGPU *pGpu; ENGSTATE_STATE currentState; ENGSTATE_STATS stats[11]; - ENGSTATE_STATUS status[11]; char name[100]; }; @@ -139,6 +150,7 @@ typedef struct OBJENGSTATE OBJENGSTATE; #define __nvoc_class_id_OBJENGSTATE 0x7a7ed6 #endif /* __nvoc_class_id_OBJENGSTATE */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJENGSTATE; #define __staticCast_OBJENGSTATE(pThis) \ @@ -151,6 +163,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJENGSTATE; ((OBJENGSTATE*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJENGSTATE))) #endif //__nvoc_eng_state_h_disabled +// Property macros #define PDB_PROP_ENGSTATE_IS_MISSING_BASE_CAST #define PDB_PROP_ENGSTATE_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -160,154 +173,162 @@ NV_STATUS __nvoc_objCreate_OBJENGSTATE(OBJENGSTATE**, Dynamic*, NvU32); #define __objCreate_OBJENGSTATE(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJENGSTATE((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define engstateConstructEngine(pGpu, pEngstate, arg0) engstateConstructEngine_DISPATCH(pGpu, pEngstate, arg0) + +// Wrapper macros +#define engstateConstructEngine_FNPTR(pEngstate) pEngstate->__engstateConstructEngine__ +#define engstateConstructEngine(pGpu, pEngstate, arg3) engstateConstructEngine_DISPATCH(pGpu, pEngstate, arg3) +#define engstateInitMissing_FNPTR(pEngstate) pEngstate->__engstateInitMissing__ #define engstateInitMissing(pGpu, pEngstate) engstateInitMissing_DISPATCH(pGpu, pEngstate) +#define engstateStatePreInitLocked_FNPTR(pEngstate) pEngstate->__engstateStatePreInitLocked__ #define engstateStatePreInitLocked(pGpu, pEngstate) engstateStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define engstateStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__engstateStatePreInitUnlocked__ #define engstateStatePreInitUnlocked(pGpu, pEngstate) engstateStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) +#define engstateStateInitLocked_FNPTR(pEngstate) pEngstate->__engstateStateInitLocked__ #define engstateStateInitLocked(pGpu, pEngstate) engstateStateInitLocked_DISPATCH(pGpu, pEngstate) +#define engstateStateInitUnlocked_FNPTR(pEngstate) pEngstate->__engstateStateInitUnlocked__ #define engstateStateInitUnlocked(pGpu, pEngstate) engstateStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define engstateStatePreLoad(pGpu, pEngstate, arg0) engstateStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define engstateStateLoad(pGpu, pEngstate, arg0) engstateStateLoad_DISPATCH(pGpu, pEngstate, arg0) -#define engstateStatePostLoad(pGpu, pEngstate, arg0) engstateStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) -#define engstateStatePreUnload(pGpu, pEngstate, arg0) engstateStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define engstateStateUnload(pGpu, pEngstate, arg0) engstateStateUnload_DISPATCH(pGpu, pEngstate, arg0) -#define engstateStatePostUnload(pGpu, pEngstate, arg0) engstateStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) +#define engstateStatePreLoad_FNPTR(pEngstate) pEngstate->__engstateStatePreLoad__ +#define engstateStatePreLoad(pGpu, pEngstate, arg3) engstateStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define engstateStateLoad_FNPTR(pEngstate) pEngstate->__engstateStateLoad__ +#define engstateStateLoad(pGpu, pEngstate, arg3) engstateStateLoad_DISPATCH(pGpu, pEngstate, arg3) +#define engstateStatePostLoad_FNPTR(pEngstate) pEngstate->__engstateStatePostLoad__ +#define engstateStatePostLoad(pGpu, pEngstate, arg3) engstateStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define engstateStatePreUnload_FNPTR(pEngstate) pEngstate->__engstateStatePreUnload__ +#define engstateStatePreUnload(pGpu, pEngstate, arg3) engstateStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define engstateStateUnload_FNPTR(pEngstate) pEngstate->__engstateStateUnload__ +#define engstateStateUnload(pGpu, pEngstate, arg3) engstateStateUnload_DISPATCH(pGpu, pEngstate, arg3) +#define engstateStatePostUnload_FNPTR(pEngstate) pEngstate->__engstateStatePostUnload__ +#define engstateStatePostUnload(pGpu, pEngstate, arg3) engstateStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define engstateStateDestroy_FNPTR(pEngstate) pEngstate->__engstateStateDestroy__ #define engstateStateDestroy(pGpu, pEngstate) engstateStateDestroy_DISPATCH(pGpu, pEngstate) +#define engstateIsPresent_FNPTR(pEngstate) pEngstate->__engstateIsPresent__ #define engstateIsPresent(pGpu, pEngstate) engstateIsPresent_DISPATCH(pGpu, pEngstate) -NV_STATUS engstateConstructEngine_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate, ENGDESCRIPTOR arg0); -static inline NV_STATUS engstateConstructEngine_DISPATCH(POBJGPU pGpu, POBJENGSTATE pEngstate, ENGDESCRIPTOR arg0) { - return pEngstate->__engstateConstructEngine__(pGpu, pEngstate, arg0); +// Dispatch functions +static inline NV_STATUS engstateConstructEngine_DISPATCH(POBJGPU pGpu, struct OBJENGSTATE *pEngstate, ENGDESCRIPTOR arg3) { + return pEngstate->__engstateConstructEngine__(pGpu, pEngstate, arg3); } -void engstateInitMissing_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate); - -static inline void engstateInitMissing_DISPATCH(POBJGPU pGpu, POBJENGSTATE pEngstate) { +static inline void engstateInitMissing_DISPATCH(POBJGPU pGpu, struct OBJENGSTATE *pEngstate) { pEngstate->__engstateInitMissing__(pGpu, pEngstate); } -NV_STATUS engstateStatePreInitLocked_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate); - -static inline NV_STATUS engstateStatePreInitLocked_DISPATCH(POBJGPU pGpu, POBJENGSTATE pEngstate) { +static inline NV_STATUS engstateStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct OBJENGSTATE *pEngstate) { return pEngstate->__engstateStatePreInitLocked__(pGpu, pEngstate); } -NV_STATUS engstateStatePreInitUnlocked_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate); - -static inline NV_STATUS engstateStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, POBJENGSTATE pEngstate) { +static inline NV_STATUS engstateStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct OBJENGSTATE *pEngstate) { return pEngstate->__engstateStatePreInitUnlocked__(pGpu, pEngstate); } -NV_STATUS engstateStateInitLocked_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate); - -static inline NV_STATUS engstateStateInitLocked_DISPATCH(POBJGPU pGpu, POBJENGSTATE pEngstate) { +static inline NV_STATUS engstateStateInitLocked_DISPATCH(POBJGPU pGpu, struct OBJENGSTATE *pEngstate) { return pEngstate->__engstateStateInitLocked__(pGpu, pEngstate); } -NV_STATUS engstateStateInitUnlocked_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate); - -static inline NV_STATUS engstateStateInitUnlocked_DISPATCH(POBJGPU pGpu, POBJENGSTATE pEngstate) { +static inline NV_STATUS engstateStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct OBJENGSTATE *pEngstate) { return pEngstate->__engstateStateInitUnlocked__(pGpu, pEngstate); } -NV_STATUS engstateStatePreLoad_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate, NvU32 arg0); +static inline NV_STATUS engstateStatePreLoad_DISPATCH(POBJGPU pGpu, struct OBJENGSTATE *pEngstate, NvU32 arg3) { + return pEngstate->__engstateStatePreLoad__(pGpu, pEngstate, arg3); +} -static inline NV_STATUS engstateStatePreLoad_DISPATCH(POBJGPU pGpu, POBJENGSTATE pEngstate, NvU32 arg0) { - return pEngstate->__engstateStatePreLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS engstateStateLoad_DISPATCH(POBJGPU pGpu, struct OBJENGSTATE *pEngstate, NvU32 arg3) { + return pEngstate->__engstateStateLoad__(pGpu, pEngstate, arg3); } -NV_STATUS engstateStateLoad_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate, NvU32 arg0); +static inline NV_STATUS engstateStatePostLoad_DISPATCH(POBJGPU pGpu, struct OBJENGSTATE *pEngstate, NvU32 arg3) { + return pEngstate->__engstateStatePostLoad__(pGpu, pEngstate, arg3); +} -static inline NV_STATUS engstateStateLoad_DISPATCH(POBJGPU pGpu, POBJENGSTATE pEngstate, NvU32 arg0) { - return pEngstate->__engstateStateLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS engstateStatePreUnload_DISPATCH(POBJGPU pGpu, struct OBJENGSTATE *pEngstate, NvU32 arg3) { + return pEngstate->__engstateStatePreUnload__(pGpu, pEngstate, arg3); } -NV_STATUS engstateStatePostLoad_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate, NvU32 arg0); +static inline NV_STATUS engstateStateUnload_DISPATCH(POBJGPU pGpu, struct OBJENGSTATE *pEngstate, NvU32 arg3) { + return pEngstate->__engstateStateUnload__(pGpu, pEngstate, arg3); +} -static inline NV_STATUS engstateStatePostLoad_DISPATCH(POBJGPU pGpu, POBJENGSTATE pEngstate, NvU32 arg0) { - return pEngstate->__engstateStatePostLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS engstateStatePostUnload_DISPATCH(POBJGPU pGpu, struct OBJENGSTATE *pEngstate, NvU32 arg3) { + return pEngstate->__engstateStatePostUnload__(pGpu, pEngstate, arg3); } -NV_STATUS engstateStatePreUnload_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate, NvU32 arg0); +static inline void engstateStateDestroy_DISPATCH(POBJGPU pGpu, struct OBJENGSTATE *pEngstate) { + pEngstate->__engstateStateDestroy__(pGpu, pEngstate); +} -static inline NV_STATUS engstateStatePreUnload_DISPATCH(POBJGPU pGpu, POBJENGSTATE pEngstate, NvU32 arg0) { - return pEngstate->__engstateStatePreUnload__(pGpu, pEngstate, arg0); +static inline NvBool engstateIsPresent_DISPATCH(POBJGPU pGpu, struct OBJENGSTATE *pEngstate) { + return pEngstate->__engstateIsPresent__(pGpu, pEngstate); } -NV_STATUS engstateStateUnload_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate, NvU32 arg0); +NV_STATUS engstateConstructEngine_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate, ENGDESCRIPTOR arg3); -static inline NV_STATUS engstateStateUnload_DISPATCH(POBJGPU pGpu, POBJENGSTATE pEngstate, NvU32 arg0) { - return pEngstate->__engstateStateUnload__(pGpu, pEngstate, arg0); -} +void engstateInitMissing_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate); -NV_STATUS engstateStatePostUnload_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate, NvU32 arg0); +NV_STATUS engstateStatePreInitLocked_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate); -static inline NV_STATUS engstateStatePostUnload_DISPATCH(POBJGPU pGpu, POBJENGSTATE pEngstate, NvU32 arg0) { - return pEngstate->__engstateStatePostUnload__(pGpu, pEngstate, arg0); -} +NV_STATUS engstateStatePreInitUnlocked_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate); -void engstateStateDestroy_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate); +NV_STATUS engstateStateInitLocked_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate); -static inline void engstateStateDestroy_DISPATCH(POBJGPU pGpu, POBJENGSTATE pEngstate) { - pEngstate->__engstateStateDestroy__(pGpu, pEngstate); -} +NV_STATUS engstateStateInitUnlocked_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate); -NvBool engstateIsPresent_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate); +NV_STATUS engstateStatePreLoad_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate, NvU32 arg3); -static inline NvBool engstateIsPresent_DISPATCH(POBJGPU pGpu, POBJENGSTATE pEngstate) { - return pEngstate->__engstateIsPresent__(pGpu, pEngstate); -} +NV_STATUS engstateStateLoad_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate, NvU32 arg3); -NV_STATUS engstateConstructBase_IMPL(struct OBJENGSTATE *arg0, struct OBJGPU *arg1, ENGDESCRIPTOR arg2); +NV_STATUS engstateStatePostLoad_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate, NvU32 arg3); -#ifdef __nvoc_eng_state_h_disabled -static inline NV_STATUS engstateConstructBase(struct OBJENGSTATE *arg0, struct OBJGPU *arg1, ENGDESCRIPTOR arg2) { - NV_ASSERT_FAILED_PRECOMP("OBJENGSTATE was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_eng_state_h_disabled -#define engstateConstructBase(arg0, arg1, arg2) engstateConstructBase_IMPL(arg0, arg1, arg2) -#endif //__nvoc_eng_state_h_disabled +NV_STATUS engstateStatePreUnload_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate, NvU32 arg3); + +NV_STATUS engstateStateUnload_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate, NvU32 arg3); -void engstateLogStateTransitionPre_IMPL(struct OBJENGSTATE *arg0, ENGSTATE_STATE arg1, ENGSTATE_TRANSITION_DATA *arg2); +NV_STATUS engstateStatePostUnload_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate, NvU32 arg3); + +void engstateStateDestroy_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate); + +NvBool engstateIsPresent_IMPL(POBJGPU pGpu, POBJENGSTATE pEngstate); + +NV_STATUS engstateConstructBase_IMPL(struct OBJENGSTATE *arg1, struct OBJGPU *arg2, ENGDESCRIPTOR arg3); #ifdef __nvoc_eng_state_h_disabled -static inline void engstateLogStateTransitionPre(struct OBJENGSTATE *arg0, ENGSTATE_STATE arg1, ENGSTATE_TRANSITION_DATA *arg2) { +static inline NV_STATUS engstateConstructBase(struct OBJENGSTATE *arg1, struct OBJGPU *arg2, ENGDESCRIPTOR arg3) { NV_ASSERT_FAILED_PRECOMP("OBJENGSTATE was disabled!"); + return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_eng_state_h_disabled -#define engstateLogStateTransitionPre(arg0, arg1, arg2) engstateLogStateTransitionPre_IMPL(arg0, arg1, arg2) +#define engstateConstructBase(arg1, arg2, arg3) engstateConstructBase_IMPL(arg1, arg2, arg3) #endif //__nvoc_eng_state_h_disabled -void engstateLogStateTransitionPost_IMPL(struct OBJENGSTATE *arg0, ENGSTATE_STATE arg1, ENGSTATE_TRANSITION_DATA *arg2); +void engstateLogStateTransitionPre_IMPL(struct OBJENGSTATE *arg1, ENGSTATE_STATE arg2, ENGSTATE_TRANSITION_DATA *arg3); #ifdef __nvoc_eng_state_h_disabled -static inline void engstateLogStateTransitionPost(struct OBJENGSTATE *arg0, ENGSTATE_STATE arg1, ENGSTATE_TRANSITION_DATA *arg2) { +static inline void engstateLogStateTransitionPre(struct OBJENGSTATE *arg1, ENGSTATE_STATE arg2, ENGSTATE_TRANSITION_DATA *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJENGSTATE was disabled!"); } #else //__nvoc_eng_state_h_disabled -#define engstateLogStateTransitionPost(arg0, arg1, arg2) engstateLogStateTransitionPost_IMPL(arg0, arg1, arg2) +#define engstateLogStateTransitionPre(arg1, arg2, arg3) engstateLogStateTransitionPre_IMPL(arg1, arg2, arg3) #endif //__nvoc_eng_state_h_disabled -void engstateLogStateStatus_IMPL(struct OBJENGSTATE *arg0, ENGSTATE_STATE arg1, NV_STATUS status); +void engstateLogStateTransitionPost_IMPL(struct OBJENGSTATE *arg1, ENGSTATE_STATE arg2, ENGSTATE_TRANSITION_DATA *arg3); #ifdef __nvoc_eng_state_h_disabled -static inline void engstateLogStateStatus(struct OBJENGSTATE *arg0, ENGSTATE_STATE arg1, NV_STATUS status) { +static inline void engstateLogStateTransitionPost(struct OBJENGSTATE *arg1, ENGSTATE_STATE arg2, ENGSTATE_TRANSITION_DATA *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJENGSTATE was disabled!"); } #else //__nvoc_eng_state_h_disabled -#define engstateLogStateStatus(arg0, arg1, status) engstateLogStateStatus_IMPL(arg0, arg1, status) +#define engstateLogStateTransitionPost(arg1, arg2, arg3) engstateLogStateTransitionPost_IMPL(arg1, arg2, arg3) #endif //__nvoc_eng_state_h_disabled -const char *engstateGetName_IMPL(struct OBJENGSTATE *arg0); +const char *engstateGetName_IMPL(struct OBJENGSTATE *arg1); #ifdef __nvoc_eng_state_h_disabled -static inline const char *engstateGetName(struct OBJENGSTATE *arg0) { +static inline const char *engstateGetName(struct OBJENGSTATE *arg1) { NV_ASSERT_FAILED_PRECOMP("OBJENGSTATE was disabled!"); return NULL; } #else //__nvoc_eng_state_h_disabled -#define engstateGetName(arg0) engstateGetName_IMPL(arg0) +#define engstateGetName(arg1) engstateGetName_IMPL(arg1) #endif //__nvoc_eng_state_h_disabled void engstateDestruct_IMPL(POBJENGSTATE pEngstate); diff --git a/src/nvidia/generated/g_event_buffer_nvoc.c b/src/nvidia/generated/g_event_buffer_nvoc.c index 1ec1915104..5a93f93bc6 100644 --- a/src/nvidia/generated/g_event_buffer_nvoc.c +++ b/src/nvidia/generated/g_event_buffer_nvoc.c @@ -84,90 +84,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_EventBuffer = /*pExportInfo=*/ &__nvoc_export_info_EventBuffer }; -static NvBool __nvoc_thunk_RmResource_eventbufferShareCallback(struct EventBuffer *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_eventbufferCheckMemInterUnmap(struct EventBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_EventBuffer_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RsResource_eventbufferControl(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControl((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_eventbufferGetMemInterMapParams(struct EventBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_eventbufferGetMemoryMappingDescriptor(struct EventBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_EventBuffer_RmResource.offset), ppMemDesc); -} - -static NvU32 __nvoc_thunk_RsResource_eventbufferGetRefCount(struct EventBuffer *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_EventBuffer_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_eventbufferControlFilter(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pCallContext, pParams); -} - -static void __nvoc_thunk_RsResource_eventbufferAddAdditionalDependants(struct RsClient *pClient, struct EventBuffer *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_eventbufferControlSerialization_Prologue(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_eventbufferControl_Prologue(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_eventbufferCanCopy(struct EventBuffer *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_EventBuffer_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_eventbufferUnmap(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pCallContext, pCpuMapping); -} - -static NvBool __nvoc_thunk_RsResource_eventbufferIsPartialUnmapSupported(struct EventBuffer *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_EventBuffer_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_eventbufferPreDestruct(struct EventBuffer *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_EventBuffer_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_eventbufferMapTo(struct EventBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_eventbufferIsDuplicate(struct EventBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_eventbufferControlSerialization_Epilogue(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pCallContext, pParams); -} - -static void __nvoc_thunk_RmResource_eventbufferControl_Epilogue(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_eventbufferUnmapFrom(struct EventBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_eventbufferMap(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_eventbufferAccessCallback(struct EventBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -175,12 +91,12 @@ static NvBool __nvoc_thunk_RmResource_eventbufferAccessCallback(struct EventBuff static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_EventBuffer[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) eventbuffertBufferCtrlCmdEnableEvent_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x90cd0101u, /*paramSize=*/ sizeof(NV_EVENT_BUFFER_CTRL_CMD_ENABLE_EVENTS_PARAMS), @@ -190,12 +106,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_EventBuf #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) eventbuffertBufferCtrlCmdUpdateGet_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x90cd0102u, /*paramSize=*/ sizeof(NV_EVENT_BUFFER_CTRL_CMD_UPDATE_GET_PARAMS), @@ -205,12 +121,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_EventBuf #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) eventbuffertBufferCtrlCmdFlush_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x90cd0104u, /*paramSize=*/ 0, @@ -220,12 +136,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_EventBuf #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) eventbuffertBufferCtrlCmdPostTelemetryEvent_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x90cd0105u, /*paramSize=*/ sizeof(NV_EVENT_BUFFER_CTRL_CMD_POST_TELEMETRY_EVENT_PARAMS), @@ -237,6 +153,114 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_EventBuf }; +// 21 up-thunk(s) defined to bridge methods in EventBuffer to superclasses + +// eventbufferAccessCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_eventbufferAccessCallback(struct EventBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// eventbufferShareCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_eventbufferShareCallback(struct EventBuffer *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// eventbufferGetMemInterMapParams: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_eventbufferGetMemInterMapParams(struct EventBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pParams); +} + +// eventbufferCheckMemInterUnmap: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_eventbufferCheckMemInterUnmap(struct EventBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_EventBuffer_RmResource.offset), bSubdeviceHandleProvided); +} + +// eventbufferGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_eventbufferGetMemoryMappingDescriptor(struct EventBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_EventBuffer_RmResource.offset), ppMemDesc); +} + +// eventbufferControlSerialization_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_eventbufferControlSerialization_Prologue(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pCallContext, pParams); +} + +// eventbufferControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_eventbufferControlSerialization_Epilogue(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pCallContext, pParams); +} + +// eventbufferControl_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_eventbufferControl_Prologue(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pCallContext, pParams); +} + +// eventbufferControl_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_eventbufferControl_Epilogue(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pCallContext, pParams); +} + +// eventbufferCanCopy: virtual inherited (res) base (rmres) +static NvBool __nvoc_up_thunk_RsResource_eventbufferCanCopy(struct EventBuffer *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset)); +} + +// eventbufferIsDuplicate: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_eventbufferIsDuplicate(struct EventBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), hMemory, pDuplicate); +} + +// eventbufferPreDestruct: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_eventbufferPreDestruct(struct EventBuffer *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset)); +} + +// eventbufferControl: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_eventbufferControl(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pCallContext, pParams); +} + +// eventbufferControlFilter: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_eventbufferControlFilter(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pCallContext, pParams); +} + +// eventbufferMap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_eventbufferMap(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pCallContext, pParams, pCpuMapping); +} + +// eventbufferUnmap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_eventbufferUnmap(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pCallContext, pCpuMapping); +} + +// eventbufferIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body +static NvBool __nvoc_up_thunk_RsResource_eventbufferIsPartialUnmapSupported(struct EventBuffer *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset)); +} + +// eventbufferMapTo: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_eventbufferMapTo(struct EventBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pParams); +} + +// eventbufferUnmapFrom: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_eventbufferUnmapFrom(struct EventBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pParams); +} + +// eventbufferGetRefCount: virtual inherited (res) base (rmres) +static NvU32 __nvoc_up_thunk_RsResource_eventbufferGetRefCount(struct EventBuffer *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset)); +} + +// eventbufferAddAdditionalDependants: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_eventbufferAddAdditionalDependants(struct RsClient *pClient, struct EventBuffer *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pReference); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_EventBuffer = { /*numEntries=*/ 4, @@ -273,69 +297,99 @@ NV_STATUS __nvoc_ctor_EventBuffer(EventBuffer *pThis, struct CALL_CONTEXT * arg_ return status; } +// Vtable initialization static void __nvoc_init_funcTable_EventBuffer_1(EventBuffer *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // eventbuffertBufferCtrlCmdEnableEvent -- exported (id=0x90cd0101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__eventbuffertBufferCtrlCmdEnableEvent__ = &eventbuffertBufferCtrlCmdEnableEvent_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // eventbuffertBufferCtrlCmdUpdateGet -- exported (id=0x90cd0102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__eventbuffertBufferCtrlCmdUpdateGet__ = &eventbuffertBufferCtrlCmdUpdateGet_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // eventbuffertBufferCtrlCmdFlush -- exported (id=0x90cd0104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__eventbuffertBufferCtrlCmdFlush__ = &eventbuffertBufferCtrlCmdFlush_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // eventbuffertBufferCtrlCmdPostTelemetryEvent -- exported (id=0x90cd0105) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__eventbuffertBufferCtrlCmdPostTelemetryEvent__ = &eventbuffertBufferCtrlCmdPostTelemetryEvent_IMPL; #endif - pThis->__eventbufferShareCallback__ = &__nvoc_thunk_RmResource_eventbufferShareCallback; + // eventbufferAccessCallback -- virtual inherited (rmres) base (rmres) + pThis->__eventbufferAccessCallback__ = &__nvoc_up_thunk_RmResource_eventbufferAccessCallback; - pThis->__eventbufferCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_eventbufferCheckMemInterUnmap; + // eventbufferShareCallback -- virtual inherited (rmres) base (rmres) + pThis->__eventbufferShareCallback__ = &__nvoc_up_thunk_RmResource_eventbufferShareCallback; - pThis->__eventbufferControl__ = &__nvoc_thunk_RsResource_eventbufferControl; + // eventbufferGetMemInterMapParams -- virtual inherited (rmres) base (rmres) + pThis->__eventbufferGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_eventbufferGetMemInterMapParams; - pThis->__eventbufferGetMemInterMapParams__ = &__nvoc_thunk_RmResource_eventbufferGetMemInterMapParams; + // eventbufferCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) + pThis->__eventbufferCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_eventbufferCheckMemInterUnmap; - pThis->__eventbufferGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_eventbufferGetMemoryMappingDescriptor; + // eventbufferGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) + pThis->__eventbufferGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_eventbufferGetMemoryMappingDescriptor; - pThis->__eventbufferGetRefCount__ = &__nvoc_thunk_RsResource_eventbufferGetRefCount; + // eventbufferControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__eventbufferControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_eventbufferControlSerialization_Prologue; - pThis->__eventbufferControlFilter__ = &__nvoc_thunk_RsResource_eventbufferControlFilter; + // eventbufferControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__eventbufferControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_eventbufferControlSerialization_Epilogue; - pThis->__eventbufferAddAdditionalDependants__ = &__nvoc_thunk_RsResource_eventbufferAddAdditionalDependants; + // eventbufferControl_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__eventbufferControl_Prologue__ = &__nvoc_up_thunk_RmResource_eventbufferControl_Prologue; - pThis->__eventbufferControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_eventbufferControlSerialization_Prologue; + // eventbufferControl_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__eventbufferControl_Epilogue__ = &__nvoc_up_thunk_RmResource_eventbufferControl_Epilogue; - pThis->__eventbufferControl_Prologue__ = &__nvoc_thunk_RmResource_eventbufferControl_Prologue; + // eventbufferCanCopy -- virtual inherited (res) base (rmres) + pThis->__eventbufferCanCopy__ = &__nvoc_up_thunk_RsResource_eventbufferCanCopy; - pThis->__eventbufferCanCopy__ = &__nvoc_thunk_RsResource_eventbufferCanCopy; + // eventbufferIsDuplicate -- virtual inherited (res) base (rmres) + pThis->__eventbufferIsDuplicate__ = &__nvoc_up_thunk_RsResource_eventbufferIsDuplicate; - pThis->__eventbufferUnmap__ = &__nvoc_thunk_RsResource_eventbufferUnmap; + // eventbufferPreDestruct -- virtual inherited (res) base (rmres) + pThis->__eventbufferPreDestruct__ = &__nvoc_up_thunk_RsResource_eventbufferPreDestruct; - pThis->__eventbufferIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_eventbufferIsPartialUnmapSupported; + // eventbufferControl -- virtual inherited (res) base (rmres) + pThis->__eventbufferControl__ = &__nvoc_up_thunk_RsResource_eventbufferControl; - pThis->__eventbufferPreDestruct__ = &__nvoc_thunk_RsResource_eventbufferPreDestruct; + // eventbufferControlFilter -- virtual inherited (res) base (rmres) + pThis->__eventbufferControlFilter__ = &__nvoc_up_thunk_RsResource_eventbufferControlFilter; - pThis->__eventbufferMapTo__ = &__nvoc_thunk_RsResource_eventbufferMapTo; + // eventbufferMap -- virtual inherited (res) base (rmres) + pThis->__eventbufferMap__ = &__nvoc_up_thunk_RsResource_eventbufferMap; - pThis->__eventbufferIsDuplicate__ = &__nvoc_thunk_RsResource_eventbufferIsDuplicate; + // eventbufferUnmap -- virtual inherited (res) base (rmres) + pThis->__eventbufferUnmap__ = &__nvoc_up_thunk_RsResource_eventbufferUnmap; - pThis->__eventbufferControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_eventbufferControlSerialization_Epilogue; + // eventbufferIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body + pThis->__eventbufferIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_eventbufferIsPartialUnmapSupported; - pThis->__eventbufferControl_Epilogue__ = &__nvoc_thunk_RmResource_eventbufferControl_Epilogue; + // eventbufferMapTo -- virtual inherited (res) base (rmres) + pThis->__eventbufferMapTo__ = &__nvoc_up_thunk_RsResource_eventbufferMapTo; - pThis->__eventbufferUnmapFrom__ = &__nvoc_thunk_RsResource_eventbufferUnmapFrom; + // eventbufferUnmapFrom -- virtual inherited (res) base (rmres) + pThis->__eventbufferUnmapFrom__ = &__nvoc_up_thunk_RsResource_eventbufferUnmapFrom; - pThis->__eventbufferMap__ = &__nvoc_thunk_RsResource_eventbufferMap; + // eventbufferGetRefCount -- virtual inherited (res) base (rmres) + pThis->__eventbufferGetRefCount__ = &__nvoc_up_thunk_RsResource_eventbufferGetRefCount; - pThis->__eventbufferAccessCallback__ = &__nvoc_thunk_RmResource_eventbufferAccessCallback; -} + // eventbufferAddAdditionalDependants -- virtual inherited (res) base (rmres) + pThis->__eventbufferAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_eventbufferAddAdditionalDependants; +} // End __nvoc_init_funcTable_EventBuffer_1 with approximately 25 basic block(s). + +// Initialize vtable(s) for 25 virtual method(s). void __nvoc_init_funcTable_EventBuffer(EventBuffer *pThis) { + + // Initialize vtable(s) with 25 per-object function pointer(s). __nvoc_init_funcTable_EventBuffer_1(pThis); } diff --git a/src/nvidia/generated/g_event_buffer_nvoc.h b/src/nvidia/generated/g_event_buffer_nvoc.h index 4c1dc9b775..183859d11c 100644 --- a/src/nvidia/generated/g_event_buffer_nvoc.h +++ b/src/nvidia/generated/g_event_buffer_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_EVENT_BUFFER_NVOC_H_ #define _G_EVENT_BUFFER_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_event_buffer_nvoc.h" #ifndef _EVENT_BUFFER_H_ @@ -40,6 +48,7 @@ extern "C" { #include "ctrl/ctrl90cd.h" #include "eventbufferproducer.h" + struct Memory; #ifndef __NVOC_CLASS_Memory_TYPEDEF__ @@ -78,39 +87,50 @@ typedef struct #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct EventBuffer { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct EventBuffer *__nvoc_pbase_EventBuffer; - NV_STATUS (*__eventbuffertBufferCtrlCmdEnableEvent__)(struct EventBuffer *, NV_EVENT_BUFFER_CTRL_CMD_ENABLE_EVENTS_PARAMS *); - NV_STATUS (*__eventbuffertBufferCtrlCmdUpdateGet__)(struct EventBuffer *, NV_EVENT_BUFFER_CTRL_CMD_UPDATE_GET_PARAMS *); - NV_STATUS (*__eventbuffertBufferCtrlCmdFlush__)(struct EventBuffer *); - NV_STATUS (*__eventbuffertBufferCtrlCmdPostTelemetryEvent__)(struct EventBuffer *, NV_EVENT_BUFFER_CTRL_CMD_POST_TELEMETRY_EVENT_PARAMS *); - NvBool (*__eventbufferShareCallback__)(struct EventBuffer *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__eventbufferCheckMemInterUnmap__)(struct EventBuffer *, NvBool); - NV_STATUS (*__eventbufferControl__)(struct EventBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__eventbufferGetMemInterMapParams__)(struct EventBuffer *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__eventbufferGetMemoryMappingDescriptor__)(struct EventBuffer *, struct MEMORY_DESCRIPTOR **); - NvU32 (*__eventbufferGetRefCount__)(struct EventBuffer *); - NV_STATUS (*__eventbufferControlFilter__)(struct EventBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__eventbufferAddAdditionalDependants__)(struct RsClient *, struct EventBuffer *, RsResourceRef *); - NV_STATUS (*__eventbufferControlSerialization_Prologue__)(struct EventBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__eventbufferControl_Prologue__)(struct EventBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__eventbufferCanCopy__)(struct EventBuffer *); - NV_STATUS (*__eventbufferUnmap__)(struct EventBuffer *, struct CALL_CONTEXT *, RsCpuMapping *); - NvBool (*__eventbufferIsPartialUnmapSupported__)(struct EventBuffer *); - void (*__eventbufferPreDestruct__)(struct EventBuffer *); - NV_STATUS (*__eventbufferMapTo__)(struct EventBuffer *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__eventbufferIsDuplicate__)(struct EventBuffer *, NvHandle, NvBool *); - void (*__eventbufferControlSerialization_Epilogue__)(struct EventBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__eventbufferControl_Epilogue__)(struct EventBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__eventbufferUnmapFrom__)(struct EventBuffer *, RS_RES_UNMAP_FROM_PARAMS *); - NV_STATUS (*__eventbufferMap__)(struct EventBuffer *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__eventbufferAccessCallback__)(struct EventBuffer *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^3 + struct RsResource *__nvoc_pbase_RsResource; // res super^2 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^2 + struct RmResource *__nvoc_pbase_RmResource; // rmres super + struct EventBuffer *__nvoc_pbase_EventBuffer; // eventbuffer + + // Vtable with 25 per-object function pointers + NV_STATUS (*__eventbuffertBufferCtrlCmdEnableEvent__)(struct EventBuffer * /*this*/, NV_EVENT_BUFFER_CTRL_CMD_ENABLE_EVENTS_PARAMS *); // exported (id=0x90cd0101) + NV_STATUS (*__eventbuffertBufferCtrlCmdUpdateGet__)(struct EventBuffer * /*this*/, NV_EVENT_BUFFER_CTRL_CMD_UPDATE_GET_PARAMS *); // exported (id=0x90cd0102) + NV_STATUS (*__eventbuffertBufferCtrlCmdFlush__)(struct EventBuffer * /*this*/); // exported (id=0x90cd0104) + NV_STATUS (*__eventbuffertBufferCtrlCmdPostTelemetryEvent__)(struct EventBuffer * /*this*/, NV_EVENT_BUFFER_CTRL_CMD_POST_TELEMETRY_EVENT_PARAMS *); // exported (id=0x90cd0105) + NvBool (*__eventbufferAccessCallback__)(struct EventBuffer * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) + NvBool (*__eventbufferShareCallback__)(struct EventBuffer * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__eventbufferGetMemInterMapParams__)(struct EventBuffer * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__eventbufferCheckMemInterUnmap__)(struct EventBuffer * /*this*/, NvBool); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__eventbufferGetMemoryMappingDescriptor__)(struct EventBuffer * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__eventbufferControlSerialization_Prologue__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__eventbufferControlSerialization_Epilogue__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__eventbufferControl_Prologue__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__eventbufferControl_Epilogue__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NvBool (*__eventbufferCanCopy__)(struct EventBuffer * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__eventbufferIsDuplicate__)(struct EventBuffer * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (rmres) + void (*__eventbufferPreDestruct__)(struct EventBuffer * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__eventbufferControl__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__eventbufferControlFilter__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__eventbufferMap__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NV_STATUS (*__eventbufferUnmap__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NvBool (*__eventbufferIsPartialUnmapSupported__)(struct EventBuffer * /*this*/); // inline virtual inherited (res) base (rmres) body + NV_STATUS (*__eventbufferMapTo__)(struct EventBuffer * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) + NV_STATUS (*__eventbufferUnmapFrom__)(struct EventBuffer * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) + NvU32 (*__eventbufferGetRefCount__)(struct EventBuffer * /*this*/); // virtual inherited (res) base (rmres) + void (*__eventbufferAddAdditionalDependants__)(struct RsClient *, struct EventBuffer * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) + + // Data members struct MEMORY_DESCRIPTOR *pHeaderDesc; struct MEMORY_DESCRIPTOR *pRecordBufDesc; struct MEMORY_DESCRIPTOR *pVardataBufDesc; @@ -142,6 +162,7 @@ typedef struct EventBuffer EventBuffer; #define __nvoc_class_id_EventBuffer 0x63502b #endif /* __nvoc_class_id_EventBuffer */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_EventBuffer; #define __staticCast_EventBuffer(pThis) \ @@ -154,104 +175,140 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_EventBuffer; ((EventBuffer*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(EventBuffer))) #endif //__nvoc_event_buffer_h_disabled - NV_STATUS __nvoc_objCreateDynamic_EventBuffer(EventBuffer**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_EventBuffer(EventBuffer**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_EventBuffer(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_EventBuffer((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define eventbuffertBufferCtrlCmdEnableEvent_FNPTR(pEventBuffer) pEventBuffer->__eventbuffertBufferCtrlCmdEnableEvent__ #define eventbuffertBufferCtrlCmdEnableEvent(pEventBuffer, pEnableParams) eventbuffertBufferCtrlCmdEnableEvent_DISPATCH(pEventBuffer, pEnableParams) +#define eventbuffertBufferCtrlCmdUpdateGet_FNPTR(pEventBuffer) pEventBuffer->__eventbuffertBufferCtrlCmdUpdateGet__ #define eventbuffertBufferCtrlCmdUpdateGet(pEventBuffer, pUpdateParams) eventbuffertBufferCtrlCmdUpdateGet_DISPATCH(pEventBuffer, pUpdateParams) +#define eventbuffertBufferCtrlCmdFlush_FNPTR(pEventBuffer) pEventBuffer->__eventbuffertBufferCtrlCmdFlush__ #define eventbuffertBufferCtrlCmdFlush(pEventBuffer) eventbuffertBufferCtrlCmdFlush_DISPATCH(pEventBuffer) +#define eventbuffertBufferCtrlCmdPostTelemetryEvent_FNPTR(pEventBuffer) pEventBuffer->__eventbuffertBufferCtrlCmdPostTelemetryEvent__ #define eventbuffertBufferCtrlCmdPostTelemetryEvent(pEventBuffer, pPostTelemetryEvent) eventbuffertBufferCtrlCmdPostTelemetryEvent_DISPATCH(pEventBuffer, pPostTelemetryEvent) +#define eventbufferAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define eventbufferAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) eventbufferAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define eventbufferShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ #define eventbufferShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) eventbufferShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define eventbufferCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) eventbufferCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define eventbufferControl(pResource, pCallContext, pParams) eventbufferControl_DISPATCH(pResource, pCallContext, pParams) +#define eventbufferGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define eventbufferGetMemInterMapParams(pRmResource, pParams) eventbufferGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define eventbufferCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define eventbufferCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) eventbufferCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define eventbufferGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define eventbufferGetMemoryMappingDescriptor(pRmResource, ppMemDesc) eventbufferGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define eventbufferGetRefCount(pResource) eventbufferGetRefCount_DISPATCH(pResource) -#define eventbufferControlFilter(pResource, pCallContext, pParams) eventbufferControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define eventbufferAddAdditionalDependants(pClient, pResource, pReference) eventbufferAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define eventbufferControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define eventbufferControlSerialization_Prologue(pResource, pCallContext, pParams) eventbufferControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define eventbufferControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define eventbufferControlSerialization_Epilogue(pResource, pCallContext, pParams) eventbufferControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define eventbufferControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ #define eventbufferControl_Prologue(pResource, pCallContext, pParams) eventbufferControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define eventbufferControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define eventbufferControl_Epilogue(pResource, pCallContext, pParams) eventbufferControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define eventbufferCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define eventbufferCanCopy(pResource) eventbufferCanCopy_DISPATCH(pResource) +#define eventbufferIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define eventbufferIsDuplicate(pResource, hMemory, pDuplicate) eventbufferIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define eventbufferPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define eventbufferPreDestruct(pResource) eventbufferPreDestruct_DISPATCH(pResource) +#define eventbufferControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define eventbufferControl(pResource, pCallContext, pParams) eventbufferControl_DISPATCH(pResource, pCallContext, pParams) +#define eventbufferControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define eventbufferControlFilter(pResource, pCallContext, pParams) eventbufferControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define eventbufferMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define eventbufferMap(pResource, pCallContext, pParams, pCpuMapping) eventbufferMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define eventbufferUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ #define eventbufferUnmap(pResource, pCallContext, pCpuMapping) eventbufferUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define eventbufferIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ #define eventbufferIsPartialUnmapSupported(pResource) eventbufferIsPartialUnmapSupported_DISPATCH(pResource) -#define eventbufferPreDestruct(pResource) eventbufferPreDestruct_DISPATCH(pResource) +#define eventbufferMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ #define eventbufferMapTo(pResource, pParams) eventbufferMapTo_DISPATCH(pResource, pParams) -#define eventbufferIsDuplicate(pResource, hMemory, pDuplicate) eventbufferIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define eventbufferControlSerialization_Epilogue(pResource, pCallContext, pParams) eventbufferControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define eventbufferControl_Epilogue(pResource, pCallContext, pParams) eventbufferControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define eventbufferUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ #define eventbufferUnmapFrom(pResource, pParams) eventbufferUnmapFrom_DISPATCH(pResource, pParams) -#define eventbufferMap(pResource, pCallContext, pParams, pCpuMapping) eventbufferMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define eventbufferAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) eventbufferAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS eventbuffertBufferCtrlCmdEnableEvent_IMPL(struct EventBuffer *pEventBuffer, NV_EVENT_BUFFER_CTRL_CMD_ENABLE_EVENTS_PARAMS *pEnableParams); +#define eventbufferGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define eventbufferGetRefCount(pResource) eventbufferGetRefCount_DISPATCH(pResource) +#define eventbufferAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define eventbufferAddAdditionalDependants(pClient, pResource, pReference) eventbufferAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS eventbuffertBufferCtrlCmdEnableEvent_DISPATCH(struct EventBuffer *pEventBuffer, NV_EVENT_BUFFER_CTRL_CMD_ENABLE_EVENTS_PARAMS *pEnableParams) { return pEventBuffer->__eventbuffertBufferCtrlCmdEnableEvent__(pEventBuffer, pEnableParams); } -NV_STATUS eventbuffertBufferCtrlCmdUpdateGet_IMPL(struct EventBuffer *pEventBuffer, NV_EVENT_BUFFER_CTRL_CMD_UPDATE_GET_PARAMS *pUpdateParams); - static inline NV_STATUS eventbuffertBufferCtrlCmdUpdateGet_DISPATCH(struct EventBuffer *pEventBuffer, NV_EVENT_BUFFER_CTRL_CMD_UPDATE_GET_PARAMS *pUpdateParams) { return pEventBuffer->__eventbuffertBufferCtrlCmdUpdateGet__(pEventBuffer, pUpdateParams); } -NV_STATUS eventbuffertBufferCtrlCmdFlush_IMPL(struct EventBuffer *pEventBuffer); - static inline NV_STATUS eventbuffertBufferCtrlCmdFlush_DISPATCH(struct EventBuffer *pEventBuffer) { return pEventBuffer->__eventbuffertBufferCtrlCmdFlush__(pEventBuffer); } -NV_STATUS eventbuffertBufferCtrlCmdPostTelemetryEvent_IMPL(struct EventBuffer *pEventBuffer, NV_EVENT_BUFFER_CTRL_CMD_POST_TELEMETRY_EVENT_PARAMS *pPostTelemetryEvent); - static inline NV_STATUS eventbuffertBufferCtrlCmdPostTelemetryEvent_DISPATCH(struct EventBuffer *pEventBuffer, NV_EVENT_BUFFER_CTRL_CMD_POST_TELEMETRY_EVENT_PARAMS *pPostTelemetryEvent) { return pEventBuffer->__eventbuffertBufferCtrlCmdPostTelemetryEvent__(pEventBuffer, pPostTelemetryEvent); } +static inline NvBool eventbufferAccessCallback_DISPATCH(struct EventBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__eventbufferAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +} + static inline NvBool eventbufferShareCallback_DISPATCH(struct EventBuffer *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return pResource->__eventbufferShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } +static inline NV_STATUS eventbufferGetMemInterMapParams_DISPATCH(struct EventBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__eventbufferGetMemInterMapParams__(pRmResource, pParams); +} + static inline NV_STATUS eventbufferCheckMemInterUnmap_DISPATCH(struct EventBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { return pRmResource->__eventbufferCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS eventbufferControl_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__eventbufferControl__(pResource, pCallContext, pParams); +static inline NV_STATUS eventbufferGetMemoryMappingDescriptor_DISPATCH(struct EventBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__eventbufferGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NV_STATUS eventbufferGetMemInterMapParams_DISPATCH(struct EventBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__eventbufferGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS eventbufferControlSerialization_Prologue_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__eventbufferControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS eventbufferGetMemoryMappingDescriptor_DISPATCH(struct EventBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__eventbufferGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void eventbufferControlSerialization_Epilogue_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__eventbufferControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NvU32 eventbufferGetRefCount_DISPATCH(struct EventBuffer *pResource) { - return pResource->__eventbufferGetRefCount__(pResource); +static inline NV_STATUS eventbufferControl_Prologue_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__eventbufferControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS eventbufferControlFilter_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__eventbufferControlFilter__(pResource, pCallContext, pParams); +static inline void eventbufferControl_Epilogue_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__eventbufferControl_Epilogue__(pResource, pCallContext, pParams); } -static inline void eventbufferAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct EventBuffer *pResource, RsResourceRef *pReference) { - pResource->__eventbufferAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvBool eventbufferCanCopy_DISPATCH(struct EventBuffer *pResource) { + return pResource->__eventbufferCanCopy__(pResource); } -static inline NV_STATUS eventbufferControlSerialization_Prologue_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__eventbufferControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS eventbufferIsDuplicate_DISPATCH(struct EventBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__eventbufferIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS eventbufferControl_Prologue_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__eventbufferControl_Prologue__(pResource, pCallContext, pParams); +static inline void eventbufferPreDestruct_DISPATCH(struct EventBuffer *pResource) { + pResource->__eventbufferPreDestruct__(pResource); } -static inline NvBool eventbufferCanCopy_DISPATCH(struct EventBuffer *pResource) { - return pResource->__eventbufferCanCopy__(pResource); +static inline NV_STATUS eventbufferControl_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__eventbufferControl__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS eventbufferControlFilter_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__eventbufferControlFilter__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS eventbufferMap_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__eventbufferMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS eventbufferUnmap_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { @@ -262,37 +319,29 @@ static inline NvBool eventbufferIsPartialUnmapSupported_DISPATCH(struct EventBuf return pResource->__eventbufferIsPartialUnmapSupported__(pResource); } -static inline void eventbufferPreDestruct_DISPATCH(struct EventBuffer *pResource) { - pResource->__eventbufferPreDestruct__(pResource); -} - static inline NV_STATUS eventbufferMapTo_DISPATCH(struct EventBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return pResource->__eventbufferMapTo__(pResource, pParams); } -static inline NV_STATUS eventbufferIsDuplicate_DISPATCH(struct EventBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__eventbufferIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS eventbufferUnmapFrom_DISPATCH(struct EventBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__eventbufferUnmapFrom__(pResource, pParams); } -static inline void eventbufferControlSerialization_Epilogue_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__eventbufferControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 eventbufferGetRefCount_DISPATCH(struct EventBuffer *pResource) { + return pResource->__eventbufferGetRefCount__(pResource); } -static inline void eventbufferControl_Epilogue_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__eventbufferControl_Epilogue__(pResource, pCallContext, pParams); +static inline void eventbufferAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct EventBuffer *pResource, RsResourceRef *pReference) { + pResource->__eventbufferAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NV_STATUS eventbufferUnmapFrom_DISPATCH(struct EventBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__eventbufferUnmapFrom__(pResource, pParams); -} +NV_STATUS eventbuffertBufferCtrlCmdEnableEvent_IMPL(struct EventBuffer *pEventBuffer, NV_EVENT_BUFFER_CTRL_CMD_ENABLE_EVENTS_PARAMS *pEnableParams); -static inline NV_STATUS eventbufferMap_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__eventbufferMap__(pResource, pCallContext, pParams, pCpuMapping); -} +NV_STATUS eventbuffertBufferCtrlCmdUpdateGet_IMPL(struct EventBuffer *pEventBuffer, NV_EVENT_BUFFER_CTRL_CMD_UPDATE_GET_PARAMS *pUpdateParams); -static inline NvBool eventbufferAccessCallback_DISPATCH(struct EventBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__eventbufferAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} +NV_STATUS eventbuffertBufferCtrlCmdFlush_IMPL(struct EventBuffer *pEventBuffer); + +NV_STATUS eventbuffertBufferCtrlCmdPostTelemetryEvent_IMPL(struct EventBuffer *pEventBuffer, NV_EVENT_BUFFER_CTRL_CMD_POST_TELEMETRY_EVENT_PARAMS *pPostTelemetryEvent); NV_STATUS eventbufferConstruct_IMPL(struct EventBuffer *arg_pEventBuffer, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_event_nvoc.c b/src/nvidia/generated/g_event_nvoc.c index b0811405cd..2d10b52663 100644 --- a/src/nvidia/generated/g_event_nvoc.c +++ b/src/nvidia/generated/g_event_nvoc.c @@ -102,10 +102,13 @@ NV_STATUS __nvoc_ctor_NotifShare(NotifShare *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_NotifShare_1(NotifShare *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_NotifShare_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_NotifShare(NotifShare *pThis) { __nvoc_init_funcTable_NotifShare_1(pThis); } @@ -262,90 +265,114 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_Event = /*pExportInfo=*/ &__nvoc_export_info_Event }; -static NvBool __nvoc_thunk_RmResource_eventShareCallback(struct Event *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Event_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// 21 up-thunk(s) defined to bridge methods in Event to superclasses + +// eventAccessCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_eventAccessCallback(struct Event *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RmResource_eventCheckMemInterUnmap(struct Event *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_Event_RmResource.offset), bSubdeviceHandleProvided); +// eventShareCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_eventShareCallback(struct Event *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RsResource_eventControl(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControl((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Event_RsResource.offset), pCallContext, pParams); +// eventGetMemInterMapParams: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_eventGetMemInterMapParams(struct Event *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Event_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RmResource_eventGetMemInterMapParams(struct Event *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_Event_RmResource.offset), pParams); +// eventCheckMemInterUnmap: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_eventCheckMemInterUnmap(struct Event *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Event_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RmResource_eventGetMemoryMappingDescriptor(struct Event *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_Event_RmResource.offset), ppMemDesc); +// eventGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_eventGetMemoryMappingDescriptor(struct Event *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Event_RmResource.offset), ppMemDesc); } -static NvU32 __nvoc_thunk_RsResource_eventGetRefCount(struct Event *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Event_RsResource.offset)); +// eventControlSerialization_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_eventControlSerialization_Prologue(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_eventControlFilter(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Event_RsResource.offset), pCallContext, pParams); +// eventControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_eventControlSerialization_Epilogue(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RmResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_eventAddAdditionalDependants(struct RsClient *pClient, struct Event *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Event_RsResource.offset), pReference); +// eventControl_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_eventControl_Prologue(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_eventControlSerialization_Prologue(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Event_RmResource.offset), pCallContext, pParams); +// eventControl_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_eventControl_Epilogue(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_eventControl_Prologue(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Event_RmResource.offset), pCallContext, pParams); +// eventCanCopy: virtual inherited (res) base (rmres) +static NvBool __nvoc_up_thunk_RsResource_eventCanCopy(struct Event *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_eventCanCopy(struct Event *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Event_RsResource.offset)); +// eventIsDuplicate: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_eventIsDuplicate(struct Event *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_eventUnmap(struct Event *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Event_RsResource.offset), pCallContext, pCpuMapping); +// eventPreDestruct: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_eventPreDestruct(struct Event *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_eventIsPartialUnmapSupported(struct Event *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Event_RsResource.offset)); +// eventControl: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_eventControl(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_eventPreDestruct(struct Event *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Event_RsResource.offset)); +// eventControlFilter: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_eventControlFilter(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_eventMapTo(struct Event *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Event_RsResource.offset), pParams); +// eventMap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_eventMap(struct Event *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_eventIsDuplicate(struct Event *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Event_RsResource.offset), hMemory, pDuplicate); +// eventUnmap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_eventUnmap(struct Event *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_RmResource_eventControlSerialization_Epilogue(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Event_RmResource.offset), pCallContext, pParams); +// eventIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body +static NvBool __nvoc_up_thunk_RsResource_eventIsPartialUnmapSupported(struct Event *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset)); } -static void __nvoc_thunk_RmResource_eventControl_Epilogue(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Event_RmResource.offset), pCallContext, pParams); +// eventMapTo: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_eventMapTo(struct Event *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_eventUnmapFrom(struct Event *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Event_RsResource.offset), pParams); +// eventUnmapFrom: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_eventUnmapFrom(struct Event *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_eventMap(struct Event *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Event_RsResource.offset), pCallContext, pParams, pCpuMapping); +// eventGetRefCount: virtual inherited (res) base (rmres) +static NvU32 __nvoc_up_thunk_RsResource_eventGetRefCount(struct Event *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_eventAccessCallback(struct Event *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Event_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// eventAddAdditionalDependants: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_eventAddAdditionalDependants(struct RsClient *pClient, struct Event *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_Event = { /*numEntries=*/ 0, @@ -382,53 +409,79 @@ NV_STATUS __nvoc_ctor_Event(Event *pThis, struct CALL_CONTEXT * arg_pCallContext return status; } +// Vtable initialization static void __nvoc_init_funcTable_Event_1(Event *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - pThis->__eventShareCallback__ = &__nvoc_thunk_RmResource_eventShareCallback; + // eventAccessCallback -- virtual inherited (rmres) base (rmres) + pThis->__eventAccessCallback__ = &__nvoc_up_thunk_RmResource_eventAccessCallback; - pThis->__eventCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_eventCheckMemInterUnmap; + // eventShareCallback -- virtual inherited (rmres) base (rmres) + pThis->__eventShareCallback__ = &__nvoc_up_thunk_RmResource_eventShareCallback; - pThis->__eventControl__ = &__nvoc_thunk_RsResource_eventControl; + // eventGetMemInterMapParams -- virtual inherited (rmres) base (rmres) + pThis->__eventGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_eventGetMemInterMapParams; - pThis->__eventGetMemInterMapParams__ = &__nvoc_thunk_RmResource_eventGetMemInterMapParams; + // eventCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) + pThis->__eventCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_eventCheckMemInterUnmap; - pThis->__eventGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_eventGetMemoryMappingDescriptor; + // eventGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) + pThis->__eventGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_eventGetMemoryMappingDescriptor; - pThis->__eventGetRefCount__ = &__nvoc_thunk_RsResource_eventGetRefCount; + // eventControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__eventControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_eventControlSerialization_Prologue; - pThis->__eventControlFilter__ = &__nvoc_thunk_RsResource_eventControlFilter; + // eventControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__eventControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_eventControlSerialization_Epilogue; - pThis->__eventAddAdditionalDependants__ = &__nvoc_thunk_RsResource_eventAddAdditionalDependants; + // eventControl_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__eventControl_Prologue__ = &__nvoc_up_thunk_RmResource_eventControl_Prologue; - pThis->__eventControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_eventControlSerialization_Prologue; + // eventControl_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__eventControl_Epilogue__ = &__nvoc_up_thunk_RmResource_eventControl_Epilogue; - pThis->__eventControl_Prologue__ = &__nvoc_thunk_RmResource_eventControl_Prologue; + // eventCanCopy -- virtual inherited (res) base (rmres) + pThis->__eventCanCopy__ = &__nvoc_up_thunk_RsResource_eventCanCopy; - pThis->__eventCanCopy__ = &__nvoc_thunk_RsResource_eventCanCopy; + // eventIsDuplicate -- virtual inherited (res) base (rmres) + pThis->__eventIsDuplicate__ = &__nvoc_up_thunk_RsResource_eventIsDuplicate; - pThis->__eventUnmap__ = &__nvoc_thunk_RsResource_eventUnmap; + // eventPreDestruct -- virtual inherited (res) base (rmres) + pThis->__eventPreDestruct__ = &__nvoc_up_thunk_RsResource_eventPreDestruct; - pThis->__eventIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_eventIsPartialUnmapSupported; + // eventControl -- virtual inherited (res) base (rmres) + pThis->__eventControl__ = &__nvoc_up_thunk_RsResource_eventControl; - pThis->__eventPreDestruct__ = &__nvoc_thunk_RsResource_eventPreDestruct; + // eventControlFilter -- virtual inherited (res) base (rmres) + pThis->__eventControlFilter__ = &__nvoc_up_thunk_RsResource_eventControlFilter; - pThis->__eventMapTo__ = &__nvoc_thunk_RsResource_eventMapTo; + // eventMap -- virtual inherited (res) base (rmres) + pThis->__eventMap__ = &__nvoc_up_thunk_RsResource_eventMap; - pThis->__eventIsDuplicate__ = &__nvoc_thunk_RsResource_eventIsDuplicate; + // eventUnmap -- virtual inherited (res) base (rmres) + pThis->__eventUnmap__ = &__nvoc_up_thunk_RsResource_eventUnmap; - pThis->__eventControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_eventControlSerialization_Epilogue; + // eventIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body + pThis->__eventIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_eventIsPartialUnmapSupported; - pThis->__eventControl_Epilogue__ = &__nvoc_thunk_RmResource_eventControl_Epilogue; + // eventMapTo -- virtual inherited (res) base (rmres) + pThis->__eventMapTo__ = &__nvoc_up_thunk_RsResource_eventMapTo; - pThis->__eventUnmapFrom__ = &__nvoc_thunk_RsResource_eventUnmapFrom; + // eventUnmapFrom -- virtual inherited (res) base (rmres) + pThis->__eventUnmapFrom__ = &__nvoc_up_thunk_RsResource_eventUnmapFrom; - pThis->__eventMap__ = &__nvoc_thunk_RsResource_eventMap; + // eventGetRefCount -- virtual inherited (res) base (rmres) + pThis->__eventGetRefCount__ = &__nvoc_up_thunk_RsResource_eventGetRefCount; - pThis->__eventAccessCallback__ = &__nvoc_thunk_RmResource_eventAccessCallback; -} + // eventAddAdditionalDependants -- virtual inherited (res) base (rmres) + pThis->__eventAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_eventAddAdditionalDependants; +} // End __nvoc_init_funcTable_Event_1 with approximately 21 basic block(s). + +// Initialize vtable(s) for 21 virtual method(s). void __nvoc_init_funcTable_Event(Event *pThis) { + + // Initialize vtable(s) with 21 per-object function pointer(s). __nvoc_init_funcTable_Event_1(pThis); } @@ -588,21 +641,31 @@ NV_STATUS __nvoc_ctor_INotifier(INotifier *pThis, struct CALL_CONTEXT * arg_pCal return status; } +// Vtable initialization static void __nvoc_init_funcTable_INotifier_1(INotifier *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // inotifyGetNotificationListPtr -- pure virtual pThis->__inotifyGetNotificationListPtr__ = NULL; + // inotifySetNotificationShare -- pure virtual pThis->__inotifySetNotificationShare__ = NULL; + // inotifyGetNotificationShare -- pure virtual pThis->__inotifyGetNotificationShare__ = NULL; + // inotifyUnregisterEvent -- pure virtual pThis->__inotifyUnregisterEvent__ = NULL; + // inotifyGetOrAllocNotifShare -- pure virtual pThis->__inotifyGetOrAllocNotifShare__ = NULL; -} +} // End __nvoc_init_funcTable_INotifier_1 with approximately 5 basic block(s). + +// Initialize vtable(s) for 5 virtual method(s). void __nvoc_init_funcTable_INotifier(INotifier *pThis) { + + // Initialize vtable(s) with 5 per-object function pointer(s). __nvoc_init_funcTable_INotifier_1(pThis); } @@ -662,26 +725,34 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_Notifier = /*pExportInfo=*/ &__nvoc_export_info_Notifier }; -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) - __nvoc_rtti_Notifier_INotifier.offset)); +// 5 down-thunk(s) defined to bridge methods in Notifier from superclasses + +// notifyGetNotificationListPtr: virtual override (inotify) base (inotify) +static PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) - __nvoc_rtti_Notifier_INotifier.offset)); } -static struct NotifShare *__nvoc_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) - __nvoc_rtti_Notifier_INotifier.offset)); +// notifyGetNotificationShare: virtual override (inotify) base (inotify) +static struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) - __nvoc_rtti_Notifier_INotifier.offset)); } -static void __nvoc_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) - __nvoc_rtti_Notifier_INotifier.offset), pNotifShare); +// notifySetNotificationShare: virtual override (inotify) base (inotify) +static void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) - __nvoc_rtti_Notifier_INotifier.offset), pNotifShare); } -static NV_STATUS __nvoc_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) - __nvoc_rtti_Notifier_INotifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// notifyUnregisterEvent: virtual override (inotify) base (inotify) +static NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) - __nvoc_rtti_Notifier_INotifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static NV_STATUS __nvoc_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) - __nvoc_rtti_Notifier_INotifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +// notifyGetOrAllocNotifShare: virtual override (inotify) base (inotify) +static NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) - __nvoc_rtti_Notifier_INotifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_Notifier = { /*numEntries=*/ 0, @@ -718,31 +789,36 @@ NV_STATUS __nvoc_ctor_Notifier(Notifier *pThis, struct CALL_CONTEXT * arg_pCallC return status; } +// Vtable initialization static void __nvoc_init_funcTable_Notifier_1(Notifier *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // notifyGetNotificationListPtr -- virtual override (inotify) base (inotify) pThis->__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL; + pThis->__nvoc_base_INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr; + // notifyGetNotificationShare -- virtual override (inotify) base (inotify) pThis->__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL; + pThis->__nvoc_base_INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare; + // notifySetNotificationShare -- virtual override (inotify) base (inotify) pThis->__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL; + pThis->__nvoc_base_INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare; + // notifyUnregisterEvent -- virtual override (inotify) base (inotify) pThis->__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL; + pThis->__nvoc_base_INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent; + // notifyGetOrAllocNotifShare -- virtual override (inotify) base (inotify) pThis->__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL; + pThis->__nvoc_base_INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_Notifier_1 with approximately 10 basic block(s). - pThis->__nvoc_base_INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_thunk_Notifier_inotifyGetNotificationListPtr; - - pThis->__nvoc_base_INotifier.__inotifyGetNotificationShare__ = &__nvoc_thunk_Notifier_inotifyGetNotificationShare; - - pThis->__nvoc_base_INotifier.__inotifySetNotificationShare__ = &__nvoc_thunk_Notifier_inotifySetNotificationShare; - - pThis->__nvoc_base_INotifier.__inotifyUnregisterEvent__ = &__nvoc_thunk_Notifier_inotifyUnregisterEvent; - - pThis->__nvoc_base_INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_inotifyGetOrAllocNotifShare; -} +// Initialize vtable(s) for 5 virtual method(s). void __nvoc_init_funcTable_Notifier(Notifier *pThis) { + + // Initialize vtable(s) with 5 per-object function pointer(s). __nvoc_init_funcTable_Notifier_1(pThis); } diff --git a/src/nvidia/generated/g_event_nvoc.h b/src/nvidia/generated/g_event_nvoc.h index 7843c3b34a..43b07cc603 100644 --- a/src/nvidia/generated/g_event_nvoc.h +++ b/src/nvidia/generated/g_event_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_EVENT_NVOC_H_ #define _G_EVENT_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_event_nvoc.h" #ifndef _EVENT_H_ @@ -41,6 +49,10 @@ extern "C" { #include "rmapi/resource.h" #include "kernel/gpu/gpu_engine_type.h" +// Opaque callback memory type for interfacing the scheduling API +typedef struct TMR_EVENT *PTMR_EVENT; +typedef struct TMR_EVENT TMR_EVENT; + typedef struct _def_system_event_queue SYSTEM_EVENTS_QUEUE; struct EVENTNOTIFICATION @@ -59,10 +71,13 @@ struct EVENTNOTIFICATION NvBool bNonStallIntrEvent; NvU32 NotifyTriggerCount; // Used with bBroadcastEvent. NvP64 Data; + OBJGPU *pGpu; // Store to free dynamic memory on teardown. + TMR_EVENT *pTmrEvent; // Store to free dynamic memory on teardown. struct EVENTNOTIFICATION *Next; }; typedef struct EVENTNOTIFICATION EVENTNOTIFICATION, *PEVENTNOTIFICATION; + struct INotifier; #ifndef __NVOC_CLASS_INotifier_TYPEDEF__ @@ -111,12 +126,21 @@ struct _def_client_system_event_info #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct NotifShare { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RsShared __nvoc_base_RsShared; - struct Object *__nvoc_pbase_Object; - struct RsShared *__nvoc_pbase_RsShared; - struct NotifShare *__nvoc_pbase_NotifShare; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct RsShared *__nvoc_pbase_RsShared; // shr super + struct NotifShare *__nvoc_pbase_NotifShare; // shrnotif + + // Data members struct INotifier *pNotifier; NvHandle hNotifierClient; NvHandle hNotifierResource; @@ -132,6 +156,7 @@ typedef struct NotifShare NotifShare; #define __nvoc_class_id_NotifShare 0xd5f150 #endif /* __nvoc_class_id_NotifShare */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_NotifShare; #define __staticCast_NotifShare(pThis) \ @@ -144,13 +169,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_NotifShare; ((NotifShare*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(NotifShare))) #endif //__nvoc_event_h_disabled - NV_STATUS __nvoc_objCreateDynamic_NotifShare(NotifShare**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_NotifShare(NotifShare**, Dynamic*, NvU32); #define __objCreate_NotifShare(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_NotifShare((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS shrnotifConstruct_IMPL(struct NotifShare *arg_pNotifShare); #define __nvoc_shrnotifConstruct(arg_pNotifShare) shrnotifConstruct_IMPL(arg_pNotifShare) @@ -173,35 +201,46 @@ void shrnotifDestruct_IMPL(struct NotifShare *pNotifShare); #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct Event { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Event *__nvoc_pbase_Event; - NvBool (*__eventShareCallback__)(struct Event *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__eventCheckMemInterUnmap__)(struct Event *, NvBool); - NV_STATUS (*__eventControl__)(struct Event *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__eventGetMemInterMapParams__)(struct Event *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__eventGetMemoryMappingDescriptor__)(struct Event *, struct MEMORY_DESCRIPTOR **); - NvU32 (*__eventGetRefCount__)(struct Event *); - NV_STATUS (*__eventControlFilter__)(struct Event *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__eventAddAdditionalDependants__)(struct RsClient *, struct Event *, RsResourceRef *); - NV_STATUS (*__eventControlSerialization_Prologue__)(struct Event *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__eventControl_Prologue__)(struct Event *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__eventCanCopy__)(struct Event *); - NV_STATUS (*__eventUnmap__)(struct Event *, struct CALL_CONTEXT *, RsCpuMapping *); - NvBool (*__eventIsPartialUnmapSupported__)(struct Event *); - void (*__eventPreDestruct__)(struct Event *); - NV_STATUS (*__eventMapTo__)(struct Event *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__eventIsDuplicate__)(struct Event *, NvHandle, NvBool *); - void (*__eventControlSerialization_Epilogue__)(struct Event *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__eventControl_Epilogue__)(struct Event *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__eventUnmapFrom__)(struct Event *, RS_RES_UNMAP_FROM_PARAMS *); - NV_STATUS (*__eventMap__)(struct Event *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__eventAccessCallback__)(struct Event *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^3 + struct RsResource *__nvoc_pbase_RsResource; // res super^2 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^2 + struct RmResource *__nvoc_pbase_RmResource; // rmres super + struct Event *__nvoc_pbase_Event; // event + + // Vtable with 21 per-object function pointers + NvBool (*__eventAccessCallback__)(struct Event * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) + NvBool (*__eventShareCallback__)(struct Event * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__eventGetMemInterMapParams__)(struct Event * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__eventCheckMemInterUnmap__)(struct Event * /*this*/, NvBool); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__eventGetMemoryMappingDescriptor__)(struct Event * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__eventControlSerialization_Prologue__)(struct Event * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__eventControlSerialization_Epilogue__)(struct Event * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__eventControl_Prologue__)(struct Event * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__eventControl_Epilogue__)(struct Event * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NvBool (*__eventCanCopy__)(struct Event * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__eventIsDuplicate__)(struct Event * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (rmres) + void (*__eventPreDestruct__)(struct Event * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__eventControl__)(struct Event * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__eventControlFilter__)(struct Event * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__eventMap__)(struct Event * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NV_STATUS (*__eventUnmap__)(struct Event * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NvBool (*__eventIsPartialUnmapSupported__)(struct Event * /*this*/); // inline virtual inherited (res) base (rmres) body + NV_STATUS (*__eventMapTo__)(struct Event * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) + NV_STATUS (*__eventUnmapFrom__)(struct Event * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) + NvU32 (*__eventGetRefCount__)(struct Event * /*this*/); // virtual inherited (res) base (rmres) + void (*__eventAddAdditionalDependants__)(struct RsClient *, struct Event * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) + + // Data members struct NotifShare *pNotifierShare; NvHandle hNotifierClient; NvHandle hNotifierResource; @@ -217,6 +256,7 @@ typedef struct Event Event; #define __nvoc_class_id_Event 0xa4ecfc #endif /* __nvoc_class_id_Event */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_Event; #define __staticCast_Event(pThis) \ @@ -229,116 +269,140 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_Event; ((Event*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(Event))) #endif //__nvoc_event_h_disabled - NV_STATUS __nvoc_objCreateDynamic_Event(Event**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_Event(Event**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_Event(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_Event((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define eventAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define eventAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) eventAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define eventShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ #define eventShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) eventShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define eventCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) eventCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define eventControl(pResource, pCallContext, pParams) eventControl_DISPATCH(pResource, pCallContext, pParams) +#define eventGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define eventGetMemInterMapParams(pRmResource, pParams) eventGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define eventCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define eventCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) eventCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define eventGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define eventGetMemoryMappingDescriptor(pRmResource, ppMemDesc) eventGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define eventGetRefCount(pResource) eventGetRefCount_DISPATCH(pResource) -#define eventControlFilter(pResource, pCallContext, pParams) eventControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define eventAddAdditionalDependants(pClient, pResource, pReference) eventAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define eventControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define eventControlSerialization_Prologue(pResource, pCallContext, pParams) eventControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define eventControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define eventControlSerialization_Epilogue(pResource, pCallContext, pParams) eventControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define eventControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ #define eventControl_Prologue(pResource, pCallContext, pParams) eventControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define eventControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define eventControl_Epilogue(pResource, pCallContext, pParams) eventControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define eventCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define eventCanCopy(pResource) eventCanCopy_DISPATCH(pResource) +#define eventIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define eventIsDuplicate(pResource, hMemory, pDuplicate) eventIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define eventPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define eventPreDestruct(pResource) eventPreDestruct_DISPATCH(pResource) +#define eventControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define eventControl(pResource, pCallContext, pParams) eventControl_DISPATCH(pResource, pCallContext, pParams) +#define eventControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define eventControlFilter(pResource, pCallContext, pParams) eventControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define eventMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define eventMap(pResource, pCallContext, pParams, pCpuMapping) eventMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define eventUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ #define eventUnmap(pResource, pCallContext, pCpuMapping) eventUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define eventIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ #define eventIsPartialUnmapSupported(pResource) eventIsPartialUnmapSupported_DISPATCH(pResource) -#define eventPreDestruct(pResource) eventPreDestruct_DISPATCH(pResource) +#define eventMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ #define eventMapTo(pResource, pParams) eventMapTo_DISPATCH(pResource, pParams) -#define eventIsDuplicate(pResource, hMemory, pDuplicate) eventIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define eventControlSerialization_Epilogue(pResource, pCallContext, pParams) eventControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define eventControl_Epilogue(pResource, pCallContext, pParams) eventControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define eventUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ #define eventUnmapFrom(pResource, pParams) eventUnmapFrom_DISPATCH(pResource, pParams) -#define eventMap(pResource, pCallContext, pParams, pCpuMapping) eventMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define eventAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) eventAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -static inline NvBool eventShareCallback_DISPATCH(struct Event *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__eventShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} +#define eventGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define eventGetRefCount(pResource) eventGetRefCount_DISPATCH(pResource) +#define eventAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define eventAddAdditionalDependants(pClient, pResource, pReference) eventAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -static inline NV_STATUS eventCheckMemInterUnmap_DISPATCH(struct Event *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__eventCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +// Dispatch functions +static inline NvBool eventAccessCallback_DISPATCH(struct Event *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__eventAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS eventControl_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__eventControl__(pResource, pCallContext, pParams); +static inline NvBool eventShareCallback_DISPATCH(struct Event *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__eventShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS eventGetMemInterMapParams_DISPATCH(struct Event *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__eventGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS eventGetMemoryMappingDescriptor_DISPATCH(struct Event *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__eventGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); -} - -static inline NvU32 eventGetRefCount_DISPATCH(struct Event *pResource) { - return pResource->__eventGetRefCount__(pResource); -} - -static inline NV_STATUS eventControlFilter_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__eventControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS eventCheckMemInterUnmap_DISPATCH(struct Event *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__eventCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline void eventAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct Event *pResource, RsResourceRef *pReference) { - pResource->__eventAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS eventGetMemoryMappingDescriptor_DISPATCH(struct Event *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__eventGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS eventControlSerialization_Prologue_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__eventControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void eventControlSerialization_Epilogue_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__eventControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + static inline NV_STATUS eventControl_Prologue_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__eventControl_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool eventCanCopy_DISPATCH(struct Event *pResource) { - return pResource->__eventCanCopy__(pResource); +static inline void eventControl_Epilogue_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__eventControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS eventUnmap_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__eventUnmap__(pResource, pCallContext, pCpuMapping); +static inline NvBool eventCanCopy_DISPATCH(struct Event *pResource) { + return pResource->__eventCanCopy__(pResource); } -static inline NvBool eventIsPartialUnmapSupported_DISPATCH(struct Event *pResource) { - return pResource->__eventIsPartialUnmapSupported__(pResource); +static inline NV_STATUS eventIsDuplicate_DISPATCH(struct Event *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__eventIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void eventPreDestruct_DISPATCH(struct Event *pResource) { pResource->__eventPreDestruct__(pResource); } -static inline NV_STATUS eventMapTo_DISPATCH(struct Event *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__eventMapTo__(pResource, pParams); +static inline NV_STATUS eventControl_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__eventControl__(pResource, pCallContext, pParams); } -static inline NV_STATUS eventIsDuplicate_DISPATCH(struct Event *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__eventIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS eventControlFilter_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__eventControlFilter__(pResource, pCallContext, pParams); } -static inline void eventControlSerialization_Epilogue_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__eventControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS eventMap_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__eventMap__(pResource, pCallContext, pParams, pCpuMapping); } -static inline void eventControl_Epilogue_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__eventControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS eventUnmap_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pResource->__eventUnmap__(pResource, pCallContext, pCpuMapping); +} + +static inline NvBool eventIsPartialUnmapSupported_DISPATCH(struct Event *pResource) { + return pResource->__eventIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS eventMapTo_DISPATCH(struct Event *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__eventMapTo__(pResource, pParams); } static inline NV_STATUS eventUnmapFrom_DISPATCH(struct Event *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return pResource->__eventUnmapFrom__(pResource, pParams); } -static inline NV_STATUS eventMap_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__eventMap__(pResource, pCallContext, pParams, pCpuMapping); +static inline NvU32 eventGetRefCount_DISPATCH(struct Event *pResource) { + return pResource->__eventGetRefCount__(pResource); } -static inline NvBool eventAccessCallback_DISPATCH(struct Event *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__eventAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline void eventAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct Event *pResource, RsResourceRef *pReference) { + pResource->__eventAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS eventConstruct_IMPL(struct Event *arg_pEvent, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); @@ -377,14 +441,21 @@ NV_STATUS eventGetByHandle_IMPL(struct RsClient *pClient, NvHandle hEvent, NvU32 #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct INotifier { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; - struct INotifier *__nvoc_pbase_INotifier; - PEVENTNOTIFICATION *(*__inotifyGetNotificationListPtr__)(struct INotifier *); - void (*__inotifySetNotificationShare__)(struct INotifier *, struct NotifShare *); - struct NotifShare *(*__inotifyGetNotificationShare__)(struct INotifier *); - NV_STATUS (*__inotifyUnregisterEvent__)(struct INotifier *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__inotifyGetOrAllocNotifShare__)(struct INotifier *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct INotifier *__nvoc_pbase_INotifier; // inotify + + // Vtable with 5 per-object function pointers + PEVENTNOTIFICATION * (*__inotifyGetNotificationListPtr__)(struct INotifier * /*this*/); // pure virtual + void (*__inotifySetNotificationShare__)(struct INotifier * /*this*/, struct NotifShare *); // pure virtual + struct NotifShare * (*__inotifyGetNotificationShare__)(struct INotifier * /*this*/); // pure virtual + NV_STATUS (*__inotifyUnregisterEvent__)(struct INotifier * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // pure virtual + NV_STATUS (*__inotifyGetOrAllocNotifShare__)(struct INotifier * /*this*/, NvHandle, NvHandle, struct NotifShare **); // pure virtual }; #ifndef __NVOC_CLASS_INotifier_TYPEDEF__ @@ -396,6 +467,7 @@ typedef struct INotifier INotifier; #define __nvoc_class_id_INotifier 0xf8f965 #endif /* __nvoc_class_id_INotifier */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_INotifier; #define __staticCast_INotifier(pThis) \ @@ -408,19 +480,27 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_INotifier; ((INotifier*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(INotifier))) #endif //__nvoc_event_h_disabled - NV_STATUS __nvoc_objCreateDynamic_INotifier(INotifier**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_INotifier(INotifier**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext); #define __objCreate_INotifier(ppNewObj, pParent, createFlags, arg_pCallContext) \ __nvoc_objCreate_INotifier((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext) + +// Wrapper macros +#define inotifyGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__inotifyGetNotificationListPtr__ #define inotifyGetNotificationListPtr(pNotifier) inotifyGetNotificationListPtr_DISPATCH(pNotifier) +#define inotifySetNotificationShare_FNPTR(pNotifier) pNotifier->__inotifySetNotificationShare__ #define inotifySetNotificationShare(pNotifier, pNotifShare) inotifySetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define inotifyGetNotificationShare_FNPTR(pNotifier) pNotifier->__inotifyGetNotificationShare__ #define inotifyGetNotificationShare(pNotifier) inotifyGetNotificationShare_DISPATCH(pNotifier) +#define inotifyUnregisterEvent_FNPTR(pNotifier) pNotifier->__inotifyUnregisterEvent__ #define inotifyUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) inotifyUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define inotifyGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__inotifyGetOrAllocNotifShare__ #define inotifyGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) inotifyGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -static inline PEVENTNOTIFICATION *inotifyGetNotificationListPtr_DISPATCH(struct INotifier *pNotifier) { + +// Dispatch functions +static inline PEVENTNOTIFICATION * inotifyGetNotificationListPtr_DISPATCH(struct INotifier *pNotifier) { return pNotifier->__inotifyGetNotificationListPtr__(pNotifier); } @@ -428,7 +508,7 @@ static inline void inotifySetNotificationShare_DISPATCH(struct INotifier *pNotif pNotifier->__inotifySetNotificationShare__(pNotifier, pNotifShare); } -static inline struct NotifShare *inotifyGetNotificationShare_DISPATCH(struct INotifier *pNotifier) { +static inline struct NotifShare * inotifyGetNotificationShare_DISPATCH(struct INotifier *pNotifier) { return pNotifier->__inotifyGetNotificationShare__(pNotifier); } @@ -473,16 +553,27 @@ static inline PEVENTNOTIFICATION inotifyGetNotificationList(struct INotifier *pN #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct Notifier { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct INotifier __nvoc_base_INotifier; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - PEVENTNOTIFICATION *(*__notifyGetNotificationListPtr__)(struct Notifier *); - struct NotifShare *(*__notifyGetNotificationShare__)(struct Notifier *); - void (*__notifySetNotificationShare__)(struct Notifier *, struct NotifShare *); - NV_STATUS (*__notifyUnregisterEvent__)(struct Notifier *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__notifyGetOrAllocNotifShare__)(struct Notifier *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct INotifier *__nvoc_pbase_INotifier; // inotify super + struct Notifier *__nvoc_pbase_Notifier; // notify + + // Vtable with 5 per-object function pointers + PEVENTNOTIFICATION * (*__notifyGetNotificationListPtr__)(struct Notifier * /*this*/); // virtual override (inotify) base (inotify) + struct NotifShare * (*__notifyGetNotificationShare__)(struct Notifier * /*this*/); // virtual override (inotify) base (inotify) + void (*__notifySetNotificationShare__)(struct Notifier * /*this*/, struct NotifShare *); // virtual override (inotify) base (inotify) + NV_STATUS (*__notifyUnregisterEvent__)(struct Notifier * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual override (inotify) base (inotify) + NV_STATUS (*__notifyGetOrAllocNotifShare__)(struct Notifier * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual override (inotify) base (inotify) + + // Data members struct NotifShare *pNotifierShare; }; @@ -495,6 +586,7 @@ typedef struct Notifier Notifier; #define __nvoc_class_id_Notifier 0xa8683b #endif /* __nvoc_class_id_Notifier */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_Notifier; #define __staticCast_Notifier(pThis) \ @@ -507,48 +599,56 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_Notifier; ((Notifier*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(Notifier))) #endif //__nvoc_event_h_disabled - NV_STATUS __nvoc_objCreateDynamic_Notifier(Notifier**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_Notifier(Notifier**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext); #define __objCreate_Notifier(ppNewObj, pParent, createFlags, arg_pCallContext) \ __nvoc_objCreate_Notifier((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext) + +// Wrapper macros +#define notifyGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__notifyGetNotificationListPtr__ #define notifyGetNotificationListPtr(pNotifier) notifyGetNotificationListPtr_DISPATCH(pNotifier) +#define notifyGetNotificationShare_FNPTR(pNotifier) pNotifier->__notifyGetNotificationShare__ #define notifyGetNotificationShare(pNotifier) notifyGetNotificationShare_DISPATCH(pNotifier) +#define notifySetNotificationShare_FNPTR(pNotifier) pNotifier->__notifySetNotificationShare__ #define notifySetNotificationShare(pNotifier, pNotifShare) notifySetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define notifyUnregisterEvent_FNPTR(pNotifier) pNotifier->__notifyUnregisterEvent__ #define notifyUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) notifyUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define notifyGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__notifyGetOrAllocNotifShare__ #define notifyGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) notifyGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -PEVENTNOTIFICATION *notifyGetNotificationListPtr_IMPL(struct Notifier *pNotifier); -static inline PEVENTNOTIFICATION *notifyGetNotificationListPtr_DISPATCH(struct Notifier *pNotifier) { +// Dispatch functions +static inline PEVENTNOTIFICATION * notifyGetNotificationListPtr_DISPATCH(struct Notifier *pNotifier) { return pNotifier->__notifyGetNotificationListPtr__(pNotifier); } -struct NotifShare *notifyGetNotificationShare_IMPL(struct Notifier *pNotifier); - -static inline struct NotifShare *notifyGetNotificationShare_DISPATCH(struct Notifier *pNotifier) { +static inline struct NotifShare * notifyGetNotificationShare_DISPATCH(struct Notifier *pNotifier) { return pNotifier->__notifyGetNotificationShare__(pNotifier); } -void notifySetNotificationShare_IMPL(struct Notifier *pNotifier, struct NotifShare *pNotifShare); - static inline void notifySetNotificationShare_DISPATCH(struct Notifier *pNotifier, struct NotifShare *pNotifShare) { pNotifier->__notifySetNotificationShare__(pNotifier, pNotifShare); } -NV_STATUS notifyUnregisterEvent_IMPL(struct Notifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); - static inline NV_STATUS notifyUnregisterEvent_DISPATCH(struct Notifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return pNotifier->__notifyUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } -NV_STATUS notifyGetOrAllocNotifShare_IMPL(struct Notifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); - static inline NV_STATUS notifyGetOrAllocNotifShare_DISPATCH(struct Notifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return pNotifier->__notifyGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } +PEVENTNOTIFICATION *notifyGetNotificationListPtr_IMPL(struct Notifier *pNotifier); + +struct NotifShare *notifyGetNotificationShare_IMPL(struct Notifier *pNotifier); + +void notifySetNotificationShare_IMPL(struct Notifier *pNotifier, struct NotifShare *pNotifShare); + +NV_STATUS notifyUnregisterEvent_IMPL(struct Notifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); + +NV_STATUS notifyGetOrAllocNotifShare_IMPL(struct Notifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); + NV_STATUS notifyConstruct_IMPL(struct Notifier *arg_pNotifier, struct CALL_CONTEXT *arg_pCallContext); #define __nvoc_notifyConstruct(arg_pNotifier, arg_pCallContext) notifyConstruct_IMPL(arg_pNotifier, arg_pCallContext) @@ -558,8 +658,8 @@ void notifyDestruct_IMPL(struct Notifier *pNotifier); #undef PRIVATE_FIELD -void CliAddSystemEvent(NvU32, NvU32); -NvBool CliDelObjectEvents(NvHandle hClient, NvHandle hObject); +void CliAddSystemEvent(NvU32, NvU32, NvBool *); +void CliDelObjectEvents(RsResourceRef *pResourceRef); NvBool CliGetEventInfo(NvHandle hClient, NvHandle hEvent, struct Event **ppEvent); NV_STATUS CliGetEventNotificationList(NvHandle hClient, NvHandle hObject, struct INotifier **ppNotifier, diff --git a/src/nvidia/generated/g_fabric_nvoc.c b/src/nvidia/generated/g_fabric_nvoc.c index 9ef09a2fd8..bfb9e93fac 100644 --- a/src/nvidia/generated/g_fabric_nvoc.c +++ b/src/nvidia/generated/g_fabric_nvoc.c @@ -93,10 +93,13 @@ NV_STATUS __nvoc_ctor_Fabric(Fabric *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_Fabric_1(Fabric *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_Fabric_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_Fabric(Fabric *pThis) { __nvoc_init_funcTable_Fabric_1(pThis); } diff --git a/src/nvidia/generated/g_fabric_nvoc.h b/src/nvidia/generated/g_fabric_nvoc.h index 3ee4c1488c..c1c977dd39 100644 --- a/src/nvidia/generated/g_fabric_nvoc.h +++ b/src/nvidia/generated/g_fabric_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_FABRIC_NVOC_H_ #define _G_FABRIC_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -36,6 +43,7 @@ extern "C" { * *****************************************************************************/ +#pragma once #include "g_fabric_nvoc.h" #ifndef _FABRIC_H_ @@ -99,11 +107,20 @@ void fabricMulticastWaitOnTeamCleanupCallback(void *pCbData); #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct Fabric { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct Fabric *__nvoc_pbase_Fabric; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct Fabric *__nvoc_pbase_Fabric; // fabric + + // Data members PORT_RWLOCK *pFabricImportModuleLock; PORT_RWLOCK *pMulticastFabricModuleLock; NvU32 PRIVATE_FIELD(flags); @@ -129,6 +146,7 @@ typedef struct Fabric Fabric; #define __nvoc_class_id_Fabric 0x0ac791 #endif /* __nvoc_class_id_Fabric */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_Fabric; #define __staticCast_Fabric(pThis) \ @@ -141,13 +159,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_Fabric; ((Fabric*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(Fabric))) #endif //__nvoc_fabric_h_disabled - NV_STATUS __nvoc_objCreateDynamic_Fabric(Fabric**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_Fabric(Fabric**, Dynamic*, NvU32); #define __objCreate_Fabric(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_Fabric((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS fabricConstruct_IMPL(struct Fabric *arg_pFabric); #define __nvoc_fabricConstruct(arg_pFabric) fabricConstruct_IMPL(arg_pFabric) diff --git a/src/nvidia/generated/g_fabric_vaspace_nvoc.c b/src/nvidia/generated/g_fabric_vaspace_nvoc.c index 2d01a165ff..3468e73513 100644 --- a/src/nvidia/generated/g_fabric_vaspace_nvoc.c +++ b/src/nvidia/generated/g_fabric_vaspace_nvoc.c @@ -66,122 +66,157 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_FABRIC_VASPACE = /*pExportInfo=*/ &__nvoc_export_info_FABRIC_VASPACE }; -static NV_STATUS __nvoc_thunk_FABRIC_VASPACE_vaspaceConstruct_(struct OBJVASPACE *pFabricVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags) { - return fabricvaspaceConstruct_((struct FABRIC_VASPACE *)(((unsigned char *)pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); +// 10 down-thunk(s) defined to bridge methods in FABRIC_VASPACE from superclasses + +// fabricvaspaceConstruct_: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceConstruct_(struct OBJVASPACE *pFabricVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags) { + return fabricvaspaceConstruct_((struct FABRIC_VASPACE *)(((unsigned char *) pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); } -static NV_STATUS __nvoc_thunk_FABRIC_VASPACE_vaspaceAlloc(struct OBJVASPACE *pFabricVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSize, VAS_ALLOC_FLAGS flags, NvU64 *pAddr) { - return fabricvaspaceAlloc((struct FABRIC_VASPACE *)(((unsigned char *)pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), size, align, rangeLo, rangeHi, pageSize, flags, pAddr); +// fabricvaspaceAlloc: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceAlloc(struct OBJVASPACE *pFabricVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSize, VAS_ALLOC_FLAGS flags, NvU64 *pAddr) { + return fabricvaspaceAlloc((struct FABRIC_VASPACE *)(((unsigned char *) pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), size, align, rangeLo, rangeHi, pageSize, flags, pAddr); } -static NV_STATUS __nvoc_thunk_FABRIC_VASPACE_vaspaceFree(struct OBJVASPACE *pFabricVAS, NvU64 vAddr) { - return fabricvaspaceFree((struct FABRIC_VASPACE *)(((unsigned char *)pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), vAddr); +// fabricvaspaceFree: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceFree(struct OBJVASPACE *pFabricVAS, NvU64 vAddr) { + return fabricvaspaceFree((struct FABRIC_VASPACE *)(((unsigned char *) pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), vAddr); } -static NV_STATUS __nvoc_thunk_FABRIC_VASPACE_vaspaceMap(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { - return fabricvaspaceMap((struct FABRIC_VASPACE *)(((unsigned char *)pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, vaLo, vaHi, pTarget, flags); +// fabricvaspaceMap: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceMap(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { + return fabricvaspaceMap((struct FABRIC_VASPACE *)(((unsigned char *) pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, vaLo, vaHi, pTarget, flags); } -static void __nvoc_thunk_FABRIC_VASPACE_vaspaceUnmap(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { - fabricvaspaceUnmap((struct FABRIC_VASPACE *)(((unsigned char *)pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, vaLo, vaHi); +// fabricvaspaceUnmap: virtual override (vaspace) base (vaspace) +static void __nvoc_down_thunk_FABRIC_VASPACE_vaspaceUnmap(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { + fabricvaspaceUnmap((struct FABRIC_VASPACE *)(((unsigned char *) pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, vaLo, vaHi); } -static NV_STATUS __nvoc_thunk_FABRIC_VASPACE_vaspaceApplyDefaultAlignment(struct OBJVASPACE *pFabricVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask) { - return fabricvaspaceApplyDefaultAlignment((struct FABRIC_VASPACE *)(((unsigned char *)pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pAllocInfo, pAlign, pSize, pPageSizeLockMask); +// fabricvaspaceApplyDefaultAlignment: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceApplyDefaultAlignment(struct OBJVASPACE *pFabricVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask) { + return fabricvaspaceApplyDefaultAlignment((struct FABRIC_VASPACE *)(((unsigned char *) pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pAllocInfo, pAlign, pSize, pPageSizeLockMask); } -static NV_STATUS __nvoc_thunk_FABRIC_VASPACE_vaspaceGetVasInfo(struct OBJVASPACE *pFabricVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) { - return fabricvaspaceGetVasInfo((struct FABRIC_VASPACE *)(((unsigned char *)pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pParams); +// fabricvaspaceGetVasInfo: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceGetVasInfo(struct OBJVASPACE *pFabricVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) { + return fabricvaspaceGetVasInfo((struct FABRIC_VASPACE *)(((unsigned char *) pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pParams); } -static NV_STATUS __nvoc_thunk_FABRIC_VASPACE_vaspacePinRootPageDir(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu) { - return fabricvaspacePinRootPageDir((struct FABRIC_VASPACE *)(((unsigned char *)pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu); +// fabricvaspacePinRootPageDir: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspacePinRootPageDir(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu) { + return fabricvaspacePinRootPageDir((struct FABRIC_VASPACE *)(((unsigned char *) pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu); } -static void __nvoc_thunk_FABRIC_VASPACE_vaspaceUnpinRootPageDir(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu) { - fabricvaspaceUnpinRootPageDir((struct FABRIC_VASPACE *)(((unsigned char *)pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu); +// fabricvaspaceUnpinRootPageDir: virtual override (vaspace) base (vaspace) +static void __nvoc_down_thunk_FABRIC_VASPACE_vaspaceUnpinRootPageDir(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu) { + fabricvaspaceUnpinRootPageDir((struct FABRIC_VASPACE *)(((unsigned char *) pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu); } -static void __nvoc_thunk_FABRIC_VASPACE_vaspaceInvalidateTlb(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { - fabricvaspaceInvalidateTlb((struct FABRIC_VASPACE *)(((unsigned char *)pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, type); +// fabricvaspaceInvalidateTlb: virtual override (vaspace) base (vaspace) +static void __nvoc_down_thunk_FABRIC_VASPACE_vaspaceInvalidateTlb(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { + fabricvaspaceInvalidateTlb((struct FABRIC_VASPACE *)(((unsigned char *) pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, type); } -static NvBool __nvoc_thunk_OBJVASPACE_fabricvaspaceIsMirrored(struct FABRIC_VASPACE *pVAS) { - return vaspaceIsMirrored((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); + +// 19 up-thunk(s) defined to bridge methods in FABRIC_VASPACE to superclasses + +// fabricvaspaceIncAllocRefCnt: inline virtual inherited (vaspace) base (vaspace) body +static NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceIncAllocRefCnt(struct FABRIC_VASPACE *pVAS, NvU64 vAddr) { + return vaspaceIncAllocRefCnt((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), vAddr); } -static NvBool __nvoc_thunk_OBJVASPACE_fabricvaspaceIsExternallyOwned(struct FABRIC_VASPACE *pVAS) { - return vaspaceIsExternallyOwned((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); +// fabricvaspaceGetVaStart: virtual inherited (vaspace) base (vaspace) +static NvU64 __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetVaStart(struct FABRIC_VASPACE *pVAS) { + return vaspaceGetVaStart((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); } -static NvU32 __nvoc_thunk_OBJVASPACE_fabricvaspaceGetFlags(struct FABRIC_VASPACE *pVAS) { - return vaspaceGetFlags((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); +// fabricvaspaceGetVaLimit: virtual inherited (vaspace) base (vaspace) +static NvU64 __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetVaLimit(struct FABRIC_VASPACE *pVAS) { + return vaspaceGetVaLimit((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); } -static NvBool __nvoc_thunk_OBJVASPACE_fabricvaspaceIsAtsEnabled(struct FABRIC_VASPACE *pVAS) { - return vaspaceIsAtsEnabled((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); +// fabricvaspaceGetFlags: inline virtual inherited (vaspace) base (vaspace) body +static NvU32 __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetFlags(struct FABRIC_VASPACE *pVAS) { + return vaspaceGetFlags((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); } -static NvU64 __nvoc_thunk_OBJVASPACE_fabricvaspaceGetBigPageSize(struct FABRIC_VASPACE *pVAS) { - return vaspaceGetBigPageSize((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); +// fabricvaspaceReserveMempool: inline virtual inherited (vaspace) base (vaspace) body +static NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceReserveMempool(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { + return vaspaceReserveMempool((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, pDevice, size, pageSizeLockMask, flags); } -static NV_STATUS __nvoc_thunk_OBJVASPACE_fabricvaspaceGetPteInfo(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { - return vaspaceGetPteInfo((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, pParams, pPhysAddr); +// fabricvaspaceGetHeap: inline virtual inherited (vaspace) base (vaspace) body +static struct OBJEHEAP * __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetHeap(struct FABRIC_VASPACE *pVAS) { + return vaspaceGetHeap((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); } -static NvU64 __nvoc_thunk_OBJVASPACE_fabricvaspaceGetVaLimit(struct FABRIC_VASPACE *pVAS) { - return vaspaceGetVaLimit((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); +// fabricvaspaceGetMapPageSize: inline virtual inherited (vaspace) base (vaspace) body +static NvU64 __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetMapPageSize(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, struct EMEMBLOCK *pMemBlock) { + return vaspaceGetMapPageSize((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, pMemBlock); } -static PMEMORY_DESCRIPTOR __nvoc_thunk_OBJVASPACE_fabricvaspaceGetPageDirBase(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu) { - return vaspaceGetPageDirBase((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu); +// fabricvaspaceGetBigPageSize: inline virtual inherited (vaspace) base (vaspace) body +static NvU64 __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetBigPageSize(struct FABRIC_VASPACE *pVAS) { + return vaspaceGetBigPageSize((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); } -static PMEMORY_DESCRIPTOR __nvoc_thunk_OBJVASPACE_fabricvaspaceGetKernelPageDirBase(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu) { - return vaspaceGetKernelPageDirBase((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu); +// fabricvaspaceIsMirrored: inline virtual inherited (vaspace) base (vaspace) body +static NvBool __nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsMirrored(struct FABRIC_VASPACE *pVAS) { + return vaspaceIsMirrored((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); } -static NvU64 __nvoc_thunk_OBJVASPACE_fabricvaspaceGetMapPageSize(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, struct EMEMBLOCK *pMemBlock) { - return vaspaceGetMapPageSize((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, pMemBlock); +// fabricvaspaceIsFaultCapable: inline virtual inherited (vaspace) base (vaspace) body +static NvBool __nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsFaultCapable(struct FABRIC_VASPACE *pVAS) { + return vaspaceIsFaultCapable((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); } -static struct OBJEHEAP *__nvoc_thunk_OBJVASPACE_fabricvaspaceGetHeap(struct FABRIC_VASPACE *pVAS) { - return vaspaceGetHeap((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); +// fabricvaspaceIsExternallyOwned: inline virtual inherited (vaspace) base (vaspace) body +static NvBool __nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsExternallyOwned(struct FABRIC_VASPACE *pVAS) { + return vaspaceIsExternallyOwned((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); } -static NvBool __nvoc_thunk_OBJVASPACE_fabricvaspaceIsFaultCapable(struct FABRIC_VASPACE *pVAS) { - return vaspaceIsFaultCapable((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); +// fabricvaspaceIsAtsEnabled: inline virtual inherited (vaspace) base (vaspace) body +static NvBool __nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsAtsEnabled(struct FABRIC_VASPACE *pVAS) { + return vaspaceIsAtsEnabled((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); } -static NvU64 __nvoc_thunk_OBJVASPACE_fabricvaspaceGetVaStart(struct FABRIC_VASPACE *pVAS) { - return vaspaceGetVaStart((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); +// fabricvaspaceGetPasid: inline virtual inherited (vaspace) base (vaspace) body +static NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPasid(struct FABRIC_VASPACE *pVAS, NvU32 *pPasid) { + return vaspaceGetPasid((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pPasid); } -static NV_STATUS __nvoc_thunk_OBJVASPACE_fabricvaspaceIncAllocRefCnt(struct FABRIC_VASPACE *pVAS, NvU64 vAddr) { - return vaspaceIncAllocRefCnt((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), vAddr); +// fabricvaspaceGetPageDirBase: inline virtual inherited (vaspace) base (vaspace) body +static PMEMORY_DESCRIPTOR __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPageDirBase(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu) { + return vaspaceGetPageDirBase((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu); } -static NV_STATUS __nvoc_thunk_OBJVASPACE_fabricvaspaceSetPteInfo(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { - return vaspaceSetPteInfo((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, pParams); +// fabricvaspaceGetKernelPageDirBase: inline virtual inherited (vaspace) base (vaspace) body +static PMEMORY_DESCRIPTOR __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetKernelPageDirBase(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu) { + return vaspaceGetKernelPageDirBase((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu); } -static NV_STATUS __nvoc_thunk_OBJVASPACE_fabricvaspaceFreeV2(struct FABRIC_VASPACE *pVAS, NvU64 vAddr, NvU64 *pSize) { - return vaspaceFreeV2((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), vAddr, pSize); +// fabricvaspaceGetPageTableInfo: inline virtual inherited (vaspace) base (vaspace) body +static NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPageTableInfo(struct FABRIC_VASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { + return vaspaceGetPageTableInfo((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pParams); } -static NV_STATUS __nvoc_thunk_OBJVASPACE_fabricvaspaceGetPasid(struct FABRIC_VASPACE *pVAS, NvU32 *pPasid) { - return vaspaceGetPasid((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pPasid); +// fabricvaspaceGetPteInfo: inline virtual inherited (vaspace) base (vaspace) body +static NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPteInfo(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { + return vaspaceGetPteInfo((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, pParams, pPhysAddr); } -static NV_STATUS __nvoc_thunk_OBJVASPACE_fabricvaspaceGetPageTableInfo(struct FABRIC_VASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { - return vaspaceGetPageTableInfo((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pParams); +// fabricvaspaceSetPteInfo: inline virtual inherited (vaspace) base (vaspace) body +static NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceSetPteInfo(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { + return vaspaceSetPteInfo((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, pParams); } -static NV_STATUS __nvoc_thunk_OBJVASPACE_fabricvaspaceReserveMempool(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { - return vaspaceReserveMempool((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, pDevice, size, pageSizeLockMask, flags); +// fabricvaspaceFreeV2: inline virtual inherited (vaspace) base (vaspace) body +static NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceFreeV2(struct FABRIC_VASPACE *pVAS, NvU64 vAddr, NvU64 *pSize) { + return vaspaceFreeV2((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), vAddr, pSize); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_FABRIC_VASPACE = { /*numEntries=*/ 0, @@ -213,89 +248,113 @@ NV_STATUS __nvoc_ctor_FABRIC_VASPACE(FABRIC_VASPACE *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_FABRIC_VASPACE_1(FABRIC_VASPACE *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // fabricvaspaceConstruct_ -- virtual override (vaspace) base (vaspace) pThis->__fabricvaspaceConstruct___ = &fabricvaspaceConstruct__IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceConstruct___ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceConstruct_; + // fabricvaspaceAlloc -- virtual override (vaspace) base (vaspace) pThis->__fabricvaspaceAlloc__ = &fabricvaspaceAlloc_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceAlloc__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceAlloc; + // fabricvaspaceFree -- virtual override (vaspace) base (vaspace) pThis->__fabricvaspaceFree__ = &fabricvaspaceFree_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceFree__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceFree; + // fabricvaspaceMap -- virtual override (vaspace) base (vaspace) pThis->__fabricvaspaceMap__ = &fabricvaspaceMap_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceMap__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceMap; + // fabricvaspaceUnmap -- virtual override (vaspace) base (vaspace) pThis->__fabricvaspaceUnmap__ = &fabricvaspaceUnmap_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceUnmap__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceUnmap; + // fabricvaspaceApplyDefaultAlignment -- virtual override (vaspace) base (vaspace) pThis->__fabricvaspaceApplyDefaultAlignment__ = &fabricvaspaceApplyDefaultAlignment_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceApplyDefaultAlignment__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceApplyDefaultAlignment; + // fabricvaspaceGetVasInfo -- virtual override (vaspace) base (vaspace) pThis->__fabricvaspaceGetVasInfo__ = &fabricvaspaceGetVasInfo_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceGetVasInfo__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceGetVasInfo; + // fabricvaspacePinRootPageDir -- virtual override (vaspace) base (vaspace) pThis->__fabricvaspacePinRootPageDir__ = &fabricvaspacePinRootPageDir_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspacePinRootPageDir__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspacePinRootPageDir; + // fabricvaspaceUnpinRootPageDir -- virtual override (vaspace) base (vaspace) pThis->__fabricvaspaceUnpinRootPageDir__ = &fabricvaspaceUnpinRootPageDir_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceUnpinRootPageDir__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceUnpinRootPageDir; + // fabricvaspaceInvalidateTlb -- virtual override (vaspace) base (vaspace) pThis->__fabricvaspaceInvalidateTlb__ = &fabricvaspaceInvalidateTlb_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceInvalidateTlb__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceInvalidateTlb; - pThis->__nvoc_base_OBJVASPACE.__vaspaceConstruct___ = &__nvoc_thunk_FABRIC_VASPACE_vaspaceConstruct_; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceAlloc__ = &__nvoc_thunk_FABRIC_VASPACE_vaspaceAlloc; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceFree__ = &__nvoc_thunk_FABRIC_VASPACE_vaspaceFree; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceMap__ = &__nvoc_thunk_FABRIC_VASPACE_vaspaceMap; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceUnmap__ = &__nvoc_thunk_FABRIC_VASPACE_vaspaceUnmap; + // fabricvaspaceIncAllocRefCnt -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__fabricvaspaceIncAllocRefCnt__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceIncAllocRefCnt; - pThis->__nvoc_base_OBJVASPACE.__vaspaceApplyDefaultAlignment__ = &__nvoc_thunk_FABRIC_VASPACE_vaspaceApplyDefaultAlignment; + // fabricvaspaceGetVaStart -- virtual inherited (vaspace) base (vaspace) + pThis->__fabricvaspaceGetVaStart__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetVaStart; - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetVasInfo__ = &__nvoc_thunk_FABRIC_VASPACE_vaspaceGetVasInfo; + // fabricvaspaceGetVaLimit -- virtual inherited (vaspace) base (vaspace) + pThis->__fabricvaspaceGetVaLimit__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetVaLimit; - pThis->__nvoc_base_OBJVASPACE.__vaspacePinRootPageDir__ = &__nvoc_thunk_FABRIC_VASPACE_vaspacePinRootPageDir; + // fabricvaspaceGetFlags -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__fabricvaspaceGetFlags__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetFlags; - pThis->__nvoc_base_OBJVASPACE.__vaspaceUnpinRootPageDir__ = &__nvoc_thunk_FABRIC_VASPACE_vaspaceUnpinRootPageDir; + // fabricvaspaceReserveMempool -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__fabricvaspaceReserveMempool__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceReserveMempool; - pThis->__nvoc_base_OBJVASPACE.__vaspaceInvalidateTlb__ = &__nvoc_thunk_FABRIC_VASPACE_vaspaceInvalidateTlb; + // fabricvaspaceGetHeap -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__fabricvaspaceGetHeap__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetHeap; - pThis->__fabricvaspaceIsMirrored__ = &__nvoc_thunk_OBJVASPACE_fabricvaspaceIsMirrored; + // fabricvaspaceGetMapPageSize -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__fabricvaspaceGetMapPageSize__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetMapPageSize; - pThis->__fabricvaspaceIsExternallyOwned__ = &__nvoc_thunk_OBJVASPACE_fabricvaspaceIsExternallyOwned; + // fabricvaspaceGetBigPageSize -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__fabricvaspaceGetBigPageSize__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetBigPageSize; - pThis->__fabricvaspaceGetFlags__ = &__nvoc_thunk_OBJVASPACE_fabricvaspaceGetFlags; + // fabricvaspaceIsMirrored -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__fabricvaspaceIsMirrored__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsMirrored; - pThis->__fabricvaspaceIsAtsEnabled__ = &__nvoc_thunk_OBJVASPACE_fabricvaspaceIsAtsEnabled; + // fabricvaspaceIsFaultCapable -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__fabricvaspaceIsFaultCapable__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsFaultCapable; - pThis->__fabricvaspaceGetBigPageSize__ = &__nvoc_thunk_OBJVASPACE_fabricvaspaceGetBigPageSize; + // fabricvaspaceIsExternallyOwned -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__fabricvaspaceIsExternallyOwned__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsExternallyOwned; - pThis->__fabricvaspaceGetPteInfo__ = &__nvoc_thunk_OBJVASPACE_fabricvaspaceGetPteInfo; + // fabricvaspaceIsAtsEnabled -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__fabricvaspaceIsAtsEnabled__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsAtsEnabled; - pThis->__fabricvaspaceGetVaLimit__ = &__nvoc_thunk_OBJVASPACE_fabricvaspaceGetVaLimit; + // fabricvaspaceGetPasid -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__fabricvaspaceGetPasid__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPasid; - pThis->__fabricvaspaceGetPageDirBase__ = &__nvoc_thunk_OBJVASPACE_fabricvaspaceGetPageDirBase; + // fabricvaspaceGetPageDirBase -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__fabricvaspaceGetPageDirBase__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPageDirBase; - pThis->__fabricvaspaceGetKernelPageDirBase__ = &__nvoc_thunk_OBJVASPACE_fabricvaspaceGetKernelPageDirBase; + // fabricvaspaceGetKernelPageDirBase -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__fabricvaspaceGetKernelPageDirBase__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetKernelPageDirBase; - pThis->__fabricvaspaceGetMapPageSize__ = &__nvoc_thunk_OBJVASPACE_fabricvaspaceGetMapPageSize; + // fabricvaspaceGetPageTableInfo -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__fabricvaspaceGetPageTableInfo__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPageTableInfo; - pThis->__fabricvaspaceGetHeap__ = &__nvoc_thunk_OBJVASPACE_fabricvaspaceGetHeap; + // fabricvaspaceGetPteInfo -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__fabricvaspaceGetPteInfo__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPteInfo; - pThis->__fabricvaspaceIsFaultCapable__ = &__nvoc_thunk_OBJVASPACE_fabricvaspaceIsFaultCapable; + // fabricvaspaceSetPteInfo -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__fabricvaspaceSetPteInfo__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceSetPteInfo; - pThis->__fabricvaspaceGetVaStart__ = &__nvoc_thunk_OBJVASPACE_fabricvaspaceGetVaStart; + // fabricvaspaceFreeV2 -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__fabricvaspaceFreeV2__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceFreeV2; +} // End __nvoc_init_funcTable_FABRIC_VASPACE_1 with approximately 39 basic block(s). - pThis->__fabricvaspaceIncAllocRefCnt__ = &__nvoc_thunk_OBJVASPACE_fabricvaspaceIncAllocRefCnt; - - pThis->__fabricvaspaceSetPteInfo__ = &__nvoc_thunk_OBJVASPACE_fabricvaspaceSetPteInfo; - - pThis->__fabricvaspaceFreeV2__ = &__nvoc_thunk_OBJVASPACE_fabricvaspaceFreeV2; - - pThis->__fabricvaspaceGetPasid__ = &__nvoc_thunk_OBJVASPACE_fabricvaspaceGetPasid; - - pThis->__fabricvaspaceGetPageTableInfo__ = &__nvoc_thunk_OBJVASPACE_fabricvaspaceGetPageTableInfo; - - pThis->__fabricvaspaceReserveMempool__ = &__nvoc_thunk_OBJVASPACE_fabricvaspaceReserveMempool; -} +// Initialize vtable(s) for 29 virtual method(s). void __nvoc_init_funcTable_FABRIC_VASPACE(FABRIC_VASPACE *pThis) { + + // Initialize vtable(s) with 29 per-object function pointer(s). __nvoc_init_funcTable_FABRIC_VASPACE_1(pThis); } diff --git a/src/nvidia/generated/g_fabric_vaspace_nvoc.h b/src/nvidia/generated/g_fabric_vaspace_nvoc.h index 76eed91eca..bba573ed2b 100644 --- a/src/nvidia/generated/g_fabric_vaspace_nvoc.h +++ b/src/nvidia/generated/g_fabric_vaspace_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_FABRIC_VASPACE_NVOC_H_ #define _G_FABRIC_VASPACE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_fabric_vaspace_nvoc.h" #ifndef FABRIC_VASPACE_H @@ -76,41 +84,52 @@ typedef struct #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct FABRIC_VASPACE { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJVASPACE __nvoc_base_OBJVASPACE; - struct Object *__nvoc_pbase_Object; - struct OBJVASPACE *__nvoc_pbase_OBJVASPACE; - struct FABRIC_VASPACE *__nvoc_pbase_FABRIC_VASPACE; - NV_STATUS (*__fabricvaspaceConstruct___)(struct FABRIC_VASPACE *, NvU32, NvU32, NvU64, NvU64, NvU64, NvU64, NvU32); - NV_STATUS (*__fabricvaspaceAlloc__)(struct FABRIC_VASPACE *, NvU64, NvU64, NvU64, NvU64, NvU64, VAS_ALLOC_FLAGS, NvU64 *); - NV_STATUS (*__fabricvaspaceFree__)(struct FABRIC_VASPACE *, NvU64); - NV_STATUS (*__fabricvaspaceMap__)(struct FABRIC_VASPACE *, struct OBJGPU *, const NvU64, const NvU64, const MMU_MAP_TARGET *, const VAS_MAP_FLAGS); - void (*__fabricvaspaceUnmap__)(struct FABRIC_VASPACE *, struct OBJGPU *, const NvU64, const NvU64); - NV_STATUS (*__fabricvaspaceApplyDefaultAlignment__)(struct FABRIC_VASPACE *, const FB_ALLOC_INFO *, NvU64 *, NvU64 *, NvU64 *); - NV_STATUS (*__fabricvaspaceGetVasInfo__)(struct FABRIC_VASPACE *, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *); - NV_STATUS (*__fabricvaspacePinRootPageDir__)(struct FABRIC_VASPACE *, struct OBJGPU *); - void (*__fabricvaspaceUnpinRootPageDir__)(struct FABRIC_VASPACE *, struct OBJGPU *); - void (*__fabricvaspaceInvalidateTlb__)(struct FABRIC_VASPACE *, struct OBJGPU *, VAS_PTE_UPDATE_TYPE); - NvBool (*__fabricvaspaceIsMirrored__)(struct FABRIC_VASPACE *); - NvBool (*__fabricvaspaceIsExternallyOwned__)(struct FABRIC_VASPACE *); - NvU32 (*__fabricvaspaceGetFlags__)(struct FABRIC_VASPACE *); - NvBool (*__fabricvaspaceIsAtsEnabled__)(struct FABRIC_VASPACE *); - NvU64 (*__fabricvaspaceGetBigPageSize__)(struct FABRIC_VASPACE *); - NV_STATUS (*__fabricvaspaceGetPteInfo__)(struct FABRIC_VASPACE *, struct OBJGPU *, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *, RmPhysAddr *); - NvU64 (*__fabricvaspaceGetVaLimit__)(struct FABRIC_VASPACE *); - PMEMORY_DESCRIPTOR (*__fabricvaspaceGetPageDirBase__)(struct FABRIC_VASPACE *, struct OBJGPU *); - PMEMORY_DESCRIPTOR (*__fabricvaspaceGetKernelPageDirBase__)(struct FABRIC_VASPACE *, struct OBJGPU *); - NvU64 (*__fabricvaspaceGetMapPageSize__)(struct FABRIC_VASPACE *, struct OBJGPU *, struct EMEMBLOCK *); - struct OBJEHEAP *(*__fabricvaspaceGetHeap__)(struct FABRIC_VASPACE *); - NvBool (*__fabricvaspaceIsFaultCapable__)(struct FABRIC_VASPACE *); - NvU64 (*__fabricvaspaceGetVaStart__)(struct FABRIC_VASPACE *); - NV_STATUS (*__fabricvaspaceIncAllocRefCnt__)(struct FABRIC_VASPACE *, NvU64); - NV_STATUS (*__fabricvaspaceSetPteInfo__)(struct FABRIC_VASPACE *, struct OBJGPU *, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *); - NV_STATUS (*__fabricvaspaceFreeV2__)(struct FABRIC_VASPACE *, NvU64, NvU64 *); - NV_STATUS (*__fabricvaspaceGetPasid__)(struct FABRIC_VASPACE *, NvU32 *); - NV_STATUS (*__fabricvaspaceGetPageTableInfo__)(struct FABRIC_VASPACE *, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *); - NV_STATUS (*__fabricvaspaceReserveMempool__)(struct FABRIC_VASPACE *, struct OBJGPU *, struct Device *, NvU64, NvU64, NvU32); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJVASPACE *__nvoc_pbase_OBJVASPACE; // vaspace super + struct FABRIC_VASPACE *__nvoc_pbase_FABRIC_VASPACE; // fabricvaspace + + // Vtable with 29 per-object function pointers + NV_STATUS (*__fabricvaspaceConstruct___)(struct FABRIC_VASPACE * /*this*/, NvU32, NvU32, NvU64, NvU64, NvU64, NvU64, NvU32); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__fabricvaspaceAlloc__)(struct FABRIC_VASPACE * /*this*/, NvU64, NvU64, NvU64, NvU64, NvU64, VAS_ALLOC_FLAGS, NvU64 *); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__fabricvaspaceFree__)(struct FABRIC_VASPACE * /*this*/, NvU64); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__fabricvaspaceMap__)(struct FABRIC_VASPACE * /*this*/, struct OBJGPU *, const NvU64, const NvU64, const MMU_MAP_TARGET *, const VAS_MAP_FLAGS); // virtual override (vaspace) base (vaspace) + void (*__fabricvaspaceUnmap__)(struct FABRIC_VASPACE * /*this*/, struct OBJGPU *, const NvU64, const NvU64); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__fabricvaspaceApplyDefaultAlignment__)(struct FABRIC_VASPACE * /*this*/, const FB_ALLOC_INFO *, NvU64 *, NvU64 *, NvU64 *); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__fabricvaspaceGetVasInfo__)(struct FABRIC_VASPACE * /*this*/, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__fabricvaspacePinRootPageDir__)(struct FABRIC_VASPACE * /*this*/, struct OBJGPU *); // virtual override (vaspace) base (vaspace) + void (*__fabricvaspaceUnpinRootPageDir__)(struct FABRIC_VASPACE * /*this*/, struct OBJGPU *); // virtual override (vaspace) base (vaspace) + void (*__fabricvaspaceInvalidateTlb__)(struct FABRIC_VASPACE * /*this*/, struct OBJGPU *, VAS_PTE_UPDATE_TYPE); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__fabricvaspaceIncAllocRefCnt__)(struct FABRIC_VASPACE * /*this*/, NvU64); // inline virtual inherited (vaspace) base (vaspace) body + NvU64 (*__fabricvaspaceGetVaStart__)(struct FABRIC_VASPACE * /*this*/); // virtual inherited (vaspace) base (vaspace) + NvU64 (*__fabricvaspaceGetVaLimit__)(struct FABRIC_VASPACE * /*this*/); // virtual inherited (vaspace) base (vaspace) + NvU32 (*__fabricvaspaceGetFlags__)(struct FABRIC_VASPACE * /*this*/); // inline virtual inherited (vaspace) base (vaspace) body + NV_STATUS (*__fabricvaspaceReserveMempool__)(struct FABRIC_VASPACE * /*this*/, struct OBJGPU *, struct Device *, NvU64, NvU64, NvU32); // inline virtual inherited (vaspace) base (vaspace) body + struct OBJEHEAP * (*__fabricvaspaceGetHeap__)(struct FABRIC_VASPACE * /*this*/); // inline virtual inherited (vaspace) base (vaspace) body + NvU64 (*__fabricvaspaceGetMapPageSize__)(struct FABRIC_VASPACE * /*this*/, struct OBJGPU *, struct EMEMBLOCK *); // inline virtual inherited (vaspace) base (vaspace) body + NvU64 (*__fabricvaspaceGetBigPageSize__)(struct FABRIC_VASPACE * /*this*/); // inline virtual inherited (vaspace) base (vaspace) body + NvBool (*__fabricvaspaceIsMirrored__)(struct FABRIC_VASPACE * /*this*/); // inline virtual inherited (vaspace) base (vaspace) body + NvBool (*__fabricvaspaceIsFaultCapable__)(struct FABRIC_VASPACE * /*this*/); // inline virtual inherited (vaspace) base (vaspace) body + NvBool (*__fabricvaspaceIsExternallyOwned__)(struct FABRIC_VASPACE * /*this*/); // inline virtual inherited (vaspace) base (vaspace) body + NvBool (*__fabricvaspaceIsAtsEnabled__)(struct FABRIC_VASPACE * /*this*/); // inline virtual inherited (vaspace) base (vaspace) body + NV_STATUS (*__fabricvaspaceGetPasid__)(struct FABRIC_VASPACE * /*this*/, NvU32 *); // inline virtual inherited (vaspace) base (vaspace) body + PMEMORY_DESCRIPTOR (*__fabricvaspaceGetPageDirBase__)(struct FABRIC_VASPACE * /*this*/, struct OBJGPU *); // inline virtual inherited (vaspace) base (vaspace) body + PMEMORY_DESCRIPTOR (*__fabricvaspaceGetKernelPageDirBase__)(struct FABRIC_VASPACE * /*this*/, struct OBJGPU *); // inline virtual inherited (vaspace) base (vaspace) body + NV_STATUS (*__fabricvaspaceGetPageTableInfo__)(struct FABRIC_VASPACE * /*this*/, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *); // inline virtual inherited (vaspace) base (vaspace) body + NV_STATUS (*__fabricvaspaceGetPteInfo__)(struct FABRIC_VASPACE * /*this*/, struct OBJGPU *, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *, RmPhysAddr *); // inline virtual inherited (vaspace) base (vaspace) body + NV_STATUS (*__fabricvaspaceSetPteInfo__)(struct FABRIC_VASPACE * /*this*/, struct OBJGPU *, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *); // inline virtual inherited (vaspace) base (vaspace) body + NV_STATUS (*__fabricvaspaceFreeV2__)(struct FABRIC_VASPACE * /*this*/, NvU64, NvU64 *); // inline virtual inherited (vaspace) base (vaspace) body + + // Data members struct OBJVASPACE *pGVAS; NvU32 flags; NvHandle hClient; @@ -133,6 +152,7 @@ typedef struct FABRIC_VASPACE FABRIC_VASPACE; #define __nvoc_class_id_FABRIC_VASPACE 0x8c8f3d #endif /* __nvoc_class_id_FABRIC_VASPACE */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_FABRIC_VASPACE; #define __staticCast_FABRIC_VASPACE(pThis) \ @@ -145,156 +165,180 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_FABRIC_VASPACE; ((FABRIC_VASPACE*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(FABRIC_VASPACE))) #endif //__nvoc_fabric_vaspace_h_disabled - NV_STATUS __nvoc_objCreateDynamic_FABRIC_VASPACE(FABRIC_VASPACE**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_FABRIC_VASPACE(FABRIC_VASPACE**, Dynamic*, NvU32); #define __objCreate_FABRIC_VASPACE(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_FABRIC_VASPACE((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define fabricvaspaceConstruct__FNPTR(pFabricVAS) pFabricVAS->__fabricvaspaceConstruct___ #define fabricvaspaceConstruct_(pFabricVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags) fabricvaspaceConstruct__DISPATCH(pFabricVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags) +#define fabricvaspaceAlloc_FNPTR(pFabricVAS) pFabricVAS->__fabricvaspaceAlloc__ #define fabricvaspaceAlloc(pFabricVAS, size, align, rangeLo, rangeHi, pageSize, flags, pAddr) fabricvaspaceAlloc_DISPATCH(pFabricVAS, size, align, rangeLo, rangeHi, pageSize, flags, pAddr) +#define fabricvaspaceFree_FNPTR(pFabricVAS) pFabricVAS->__fabricvaspaceFree__ #define fabricvaspaceFree(pFabricVAS, vAddr) fabricvaspaceFree_DISPATCH(pFabricVAS, vAddr) +#define fabricvaspaceMap_FNPTR(pFabricVAS) pFabricVAS->__fabricvaspaceMap__ #define fabricvaspaceMap(pFabricVAS, pGpu, vaLo, vaHi, pTarget, flags) fabricvaspaceMap_DISPATCH(pFabricVAS, pGpu, vaLo, vaHi, pTarget, flags) +#define fabricvaspaceUnmap_FNPTR(pFabricVAS) pFabricVAS->__fabricvaspaceUnmap__ #define fabricvaspaceUnmap(pFabricVAS, pGpu, vaLo, vaHi) fabricvaspaceUnmap_DISPATCH(pFabricVAS, pGpu, vaLo, vaHi) +#define fabricvaspaceApplyDefaultAlignment_FNPTR(pFabricVAS) pFabricVAS->__fabricvaspaceApplyDefaultAlignment__ #define fabricvaspaceApplyDefaultAlignment(pFabricVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask) fabricvaspaceApplyDefaultAlignment_DISPATCH(pFabricVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask) +#define fabricvaspaceGetVasInfo_FNPTR(pFabricVAS) pFabricVAS->__fabricvaspaceGetVasInfo__ #define fabricvaspaceGetVasInfo(pFabricVAS, pParams) fabricvaspaceGetVasInfo_DISPATCH(pFabricVAS, pParams) +#define fabricvaspacePinRootPageDir_FNPTR(pFabricVAS) pFabricVAS->__fabricvaspacePinRootPageDir__ #define fabricvaspacePinRootPageDir(pFabricVAS, pGpu) fabricvaspacePinRootPageDir_DISPATCH(pFabricVAS, pGpu) +#define fabricvaspaceUnpinRootPageDir_FNPTR(pFabricVAS) pFabricVAS->__fabricvaspaceUnpinRootPageDir__ #define fabricvaspaceUnpinRootPageDir(pFabricVAS, pGpu) fabricvaspaceUnpinRootPageDir_DISPATCH(pFabricVAS, pGpu) +#define fabricvaspaceInvalidateTlb_FNPTR(pFabricVAS) pFabricVAS->__fabricvaspaceInvalidateTlb__ #define fabricvaspaceInvalidateTlb(pFabricVAS, pGpu, type) fabricvaspaceInvalidateTlb_DISPATCH(pFabricVAS, pGpu, type) +#define fabricvaspaceIncAllocRefCnt_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceIncAllocRefCnt__ +#define fabricvaspaceIncAllocRefCnt(pVAS, vAddr) fabricvaspaceIncAllocRefCnt_DISPATCH(pVAS, vAddr) +#define fabricvaspaceGetVaStart_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetVaStart__ +#define fabricvaspaceGetVaStart(pVAS) fabricvaspaceGetVaStart_DISPATCH(pVAS) +#define fabricvaspaceGetVaLimit_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetVaLimit__ +#define fabricvaspaceGetVaLimit(pVAS) fabricvaspaceGetVaLimit_DISPATCH(pVAS) +#define fabricvaspaceGetFlags_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetFlags__ +#define fabricvaspaceGetFlags(pVAS) fabricvaspaceGetFlags_DISPATCH(pVAS) +#define fabricvaspaceReserveMempool_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceReserveMempool__ +#define fabricvaspaceReserveMempool(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags) fabricvaspaceReserveMempool_DISPATCH(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags) +#define fabricvaspaceGetHeap_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetHeap__ +#define fabricvaspaceGetHeap(pVAS) fabricvaspaceGetHeap_DISPATCH(pVAS) +#define fabricvaspaceGetMapPageSize_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetMapPageSize__ +#define fabricvaspaceGetMapPageSize(pVAS, pGpu, pMemBlock) fabricvaspaceGetMapPageSize_DISPATCH(pVAS, pGpu, pMemBlock) +#define fabricvaspaceGetBigPageSize_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetBigPageSize__ +#define fabricvaspaceGetBigPageSize(pVAS) fabricvaspaceGetBigPageSize_DISPATCH(pVAS) +#define fabricvaspaceIsMirrored_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceIsMirrored__ #define fabricvaspaceIsMirrored(pVAS) fabricvaspaceIsMirrored_DISPATCH(pVAS) +#define fabricvaspaceIsFaultCapable_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceIsFaultCapable__ +#define fabricvaspaceIsFaultCapable(pVAS) fabricvaspaceIsFaultCapable_DISPATCH(pVAS) +#define fabricvaspaceIsExternallyOwned_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceIsExternallyOwned__ #define fabricvaspaceIsExternallyOwned(pVAS) fabricvaspaceIsExternallyOwned_DISPATCH(pVAS) -#define fabricvaspaceGetFlags(pVAS) fabricvaspaceGetFlags_DISPATCH(pVAS) +#define fabricvaspaceIsAtsEnabled_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceIsAtsEnabled__ #define fabricvaspaceIsAtsEnabled(pVAS) fabricvaspaceIsAtsEnabled_DISPATCH(pVAS) -#define fabricvaspaceGetBigPageSize(pVAS) fabricvaspaceGetBigPageSize_DISPATCH(pVAS) -#define fabricvaspaceGetPteInfo(pVAS, pGpu, pParams, pPhysAddr) fabricvaspaceGetPteInfo_DISPATCH(pVAS, pGpu, pParams, pPhysAddr) -#define fabricvaspaceGetVaLimit(pVAS) fabricvaspaceGetVaLimit_DISPATCH(pVAS) +#define fabricvaspaceGetPasid_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetPasid__ +#define fabricvaspaceGetPasid(pVAS, pPasid) fabricvaspaceGetPasid_DISPATCH(pVAS, pPasid) +#define fabricvaspaceGetPageDirBase_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetPageDirBase__ #define fabricvaspaceGetPageDirBase(pVAS, pGpu) fabricvaspaceGetPageDirBase_DISPATCH(pVAS, pGpu) +#define fabricvaspaceGetKernelPageDirBase_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetKernelPageDirBase__ #define fabricvaspaceGetKernelPageDirBase(pVAS, pGpu) fabricvaspaceGetKernelPageDirBase_DISPATCH(pVAS, pGpu) -#define fabricvaspaceGetMapPageSize(pVAS, pGpu, pMemBlock) fabricvaspaceGetMapPageSize_DISPATCH(pVAS, pGpu, pMemBlock) -#define fabricvaspaceGetHeap(pVAS) fabricvaspaceGetHeap_DISPATCH(pVAS) -#define fabricvaspaceIsFaultCapable(pVAS) fabricvaspaceIsFaultCapable_DISPATCH(pVAS) -#define fabricvaspaceGetVaStart(pVAS) fabricvaspaceGetVaStart_DISPATCH(pVAS) -#define fabricvaspaceIncAllocRefCnt(pVAS, vAddr) fabricvaspaceIncAllocRefCnt_DISPATCH(pVAS, vAddr) +#define fabricvaspaceGetPageTableInfo_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetPageTableInfo__ +#define fabricvaspaceGetPageTableInfo(pVAS, pParams) fabricvaspaceGetPageTableInfo_DISPATCH(pVAS, pParams) +#define fabricvaspaceGetPteInfo_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetPteInfo__ +#define fabricvaspaceGetPteInfo(pVAS, pGpu, pParams, pPhysAddr) fabricvaspaceGetPteInfo_DISPATCH(pVAS, pGpu, pParams, pPhysAddr) +#define fabricvaspaceSetPteInfo_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceSetPteInfo__ #define fabricvaspaceSetPteInfo(pVAS, pGpu, pParams) fabricvaspaceSetPteInfo_DISPATCH(pVAS, pGpu, pParams) +#define fabricvaspaceFreeV2_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceFreeV2__ #define fabricvaspaceFreeV2(pVAS, vAddr, pSize) fabricvaspaceFreeV2_DISPATCH(pVAS, vAddr, pSize) -#define fabricvaspaceGetPasid(pVAS, pPasid) fabricvaspaceGetPasid_DISPATCH(pVAS, pPasid) -#define fabricvaspaceGetPageTableInfo(pVAS, pParams) fabricvaspaceGetPageTableInfo_DISPATCH(pVAS, pParams) -#define fabricvaspaceReserveMempool(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags) fabricvaspaceReserveMempool_DISPATCH(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags) -NV_STATUS fabricvaspaceConstruct__IMPL(struct FABRIC_VASPACE *pFabricVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags); +// Dispatch functions static inline NV_STATUS fabricvaspaceConstruct__DISPATCH(struct FABRIC_VASPACE *pFabricVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags) { return pFabricVAS->__fabricvaspaceConstruct___(pFabricVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); } -NV_STATUS fabricvaspaceAlloc_IMPL(struct FABRIC_VASPACE *pFabricVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSize, VAS_ALLOC_FLAGS flags, NvU64 *pAddr); - static inline NV_STATUS fabricvaspaceAlloc_DISPATCH(struct FABRIC_VASPACE *pFabricVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSize, VAS_ALLOC_FLAGS flags, NvU64 *pAddr) { return pFabricVAS->__fabricvaspaceAlloc__(pFabricVAS, size, align, rangeLo, rangeHi, pageSize, flags, pAddr); } -NV_STATUS fabricvaspaceFree_IMPL(struct FABRIC_VASPACE *pFabricVAS, NvU64 vAddr); - static inline NV_STATUS fabricvaspaceFree_DISPATCH(struct FABRIC_VASPACE *pFabricVAS, NvU64 vAddr) { return pFabricVAS->__fabricvaspaceFree__(pFabricVAS, vAddr); } -NV_STATUS fabricvaspaceMap_IMPL(struct FABRIC_VASPACE *pFabricVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags); - static inline NV_STATUS fabricvaspaceMap_DISPATCH(struct FABRIC_VASPACE *pFabricVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { return pFabricVAS->__fabricvaspaceMap__(pFabricVAS, pGpu, vaLo, vaHi, pTarget, flags); } -void fabricvaspaceUnmap_IMPL(struct FABRIC_VASPACE *pFabricVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi); - static inline void fabricvaspaceUnmap_DISPATCH(struct FABRIC_VASPACE *pFabricVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { pFabricVAS->__fabricvaspaceUnmap__(pFabricVAS, pGpu, vaLo, vaHi); } -NV_STATUS fabricvaspaceApplyDefaultAlignment_IMPL(struct FABRIC_VASPACE *pFabricVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask); - static inline NV_STATUS fabricvaspaceApplyDefaultAlignment_DISPATCH(struct FABRIC_VASPACE *pFabricVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask) { return pFabricVAS->__fabricvaspaceApplyDefaultAlignment__(pFabricVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask); } -NV_STATUS fabricvaspaceGetVasInfo_IMPL(struct FABRIC_VASPACE *pFabricVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams); - static inline NV_STATUS fabricvaspaceGetVasInfo_DISPATCH(struct FABRIC_VASPACE *pFabricVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) { return pFabricVAS->__fabricvaspaceGetVasInfo__(pFabricVAS, pParams); } -NV_STATUS fabricvaspacePinRootPageDir_IMPL(struct FABRIC_VASPACE *pFabricVAS, struct OBJGPU *pGpu); - static inline NV_STATUS fabricvaspacePinRootPageDir_DISPATCH(struct FABRIC_VASPACE *pFabricVAS, struct OBJGPU *pGpu) { return pFabricVAS->__fabricvaspacePinRootPageDir__(pFabricVAS, pGpu); } -void fabricvaspaceUnpinRootPageDir_IMPL(struct FABRIC_VASPACE *pFabricVAS, struct OBJGPU *pGpu); - static inline void fabricvaspaceUnpinRootPageDir_DISPATCH(struct FABRIC_VASPACE *pFabricVAS, struct OBJGPU *pGpu) { pFabricVAS->__fabricvaspaceUnpinRootPageDir__(pFabricVAS, pGpu); } -void fabricvaspaceInvalidateTlb_IMPL(struct FABRIC_VASPACE *pFabricVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type); - static inline void fabricvaspaceInvalidateTlb_DISPATCH(struct FABRIC_VASPACE *pFabricVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { pFabricVAS->__fabricvaspaceInvalidateTlb__(pFabricVAS, pGpu, type); } -static inline NvBool fabricvaspaceIsMirrored_DISPATCH(struct FABRIC_VASPACE *pVAS) { - return pVAS->__fabricvaspaceIsMirrored__(pVAS); +static inline NV_STATUS fabricvaspaceIncAllocRefCnt_DISPATCH(struct FABRIC_VASPACE *pVAS, NvU64 vAddr) { + return pVAS->__fabricvaspaceIncAllocRefCnt__(pVAS, vAddr); } -static inline NvBool fabricvaspaceIsExternallyOwned_DISPATCH(struct FABRIC_VASPACE *pVAS) { - return pVAS->__fabricvaspaceIsExternallyOwned__(pVAS); +static inline NvU64 fabricvaspaceGetVaStart_DISPATCH(struct FABRIC_VASPACE *pVAS) { + return pVAS->__fabricvaspaceGetVaStart__(pVAS); +} + +static inline NvU64 fabricvaspaceGetVaLimit_DISPATCH(struct FABRIC_VASPACE *pVAS) { + return pVAS->__fabricvaspaceGetVaLimit__(pVAS); } static inline NvU32 fabricvaspaceGetFlags_DISPATCH(struct FABRIC_VASPACE *pVAS) { return pVAS->__fabricvaspaceGetFlags__(pVAS); } -static inline NvBool fabricvaspaceIsAtsEnabled_DISPATCH(struct FABRIC_VASPACE *pVAS) { - return pVAS->__fabricvaspaceIsAtsEnabled__(pVAS); +static inline NV_STATUS fabricvaspaceReserveMempool_DISPATCH(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { + return pVAS->__fabricvaspaceReserveMempool__(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags); +} + +static inline struct OBJEHEAP * fabricvaspaceGetHeap_DISPATCH(struct FABRIC_VASPACE *pVAS) { + return pVAS->__fabricvaspaceGetHeap__(pVAS); +} + +static inline NvU64 fabricvaspaceGetMapPageSize_DISPATCH(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, struct EMEMBLOCK *pMemBlock) { + return pVAS->__fabricvaspaceGetMapPageSize__(pVAS, pGpu, pMemBlock); } static inline NvU64 fabricvaspaceGetBigPageSize_DISPATCH(struct FABRIC_VASPACE *pVAS) { return pVAS->__fabricvaspaceGetBigPageSize__(pVAS); } -static inline NV_STATUS fabricvaspaceGetPteInfo_DISPATCH(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { - return pVAS->__fabricvaspaceGetPteInfo__(pVAS, pGpu, pParams, pPhysAddr); +static inline NvBool fabricvaspaceIsMirrored_DISPATCH(struct FABRIC_VASPACE *pVAS) { + return pVAS->__fabricvaspaceIsMirrored__(pVAS); } -static inline NvU64 fabricvaspaceGetVaLimit_DISPATCH(struct FABRIC_VASPACE *pVAS) { - return pVAS->__fabricvaspaceGetVaLimit__(pVAS); +static inline NvBool fabricvaspaceIsFaultCapable_DISPATCH(struct FABRIC_VASPACE *pVAS) { + return pVAS->__fabricvaspaceIsFaultCapable__(pVAS); } -static inline PMEMORY_DESCRIPTOR fabricvaspaceGetPageDirBase_DISPATCH(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu) { - return pVAS->__fabricvaspaceGetPageDirBase__(pVAS, pGpu); +static inline NvBool fabricvaspaceIsExternallyOwned_DISPATCH(struct FABRIC_VASPACE *pVAS) { + return pVAS->__fabricvaspaceIsExternallyOwned__(pVAS); } -static inline PMEMORY_DESCRIPTOR fabricvaspaceGetKernelPageDirBase_DISPATCH(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu) { - return pVAS->__fabricvaspaceGetKernelPageDirBase__(pVAS, pGpu); +static inline NvBool fabricvaspaceIsAtsEnabled_DISPATCH(struct FABRIC_VASPACE *pVAS) { + return pVAS->__fabricvaspaceIsAtsEnabled__(pVAS); } -static inline NvU64 fabricvaspaceGetMapPageSize_DISPATCH(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, struct EMEMBLOCK *pMemBlock) { - return pVAS->__fabricvaspaceGetMapPageSize__(pVAS, pGpu, pMemBlock); +static inline NV_STATUS fabricvaspaceGetPasid_DISPATCH(struct FABRIC_VASPACE *pVAS, NvU32 *pPasid) { + return pVAS->__fabricvaspaceGetPasid__(pVAS, pPasid); } -static inline struct OBJEHEAP *fabricvaspaceGetHeap_DISPATCH(struct FABRIC_VASPACE *pVAS) { - return pVAS->__fabricvaspaceGetHeap__(pVAS); +static inline PMEMORY_DESCRIPTOR fabricvaspaceGetPageDirBase_DISPATCH(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu) { + return pVAS->__fabricvaspaceGetPageDirBase__(pVAS, pGpu); } -static inline NvBool fabricvaspaceIsFaultCapable_DISPATCH(struct FABRIC_VASPACE *pVAS) { - return pVAS->__fabricvaspaceIsFaultCapable__(pVAS); +static inline PMEMORY_DESCRIPTOR fabricvaspaceGetKernelPageDirBase_DISPATCH(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu) { + return pVAS->__fabricvaspaceGetKernelPageDirBase__(pVAS, pGpu); } -static inline NvU64 fabricvaspaceGetVaStart_DISPATCH(struct FABRIC_VASPACE *pVAS) { - return pVAS->__fabricvaspaceGetVaStart__(pVAS); +static inline NV_STATUS fabricvaspaceGetPageTableInfo_DISPATCH(struct FABRIC_VASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { + return pVAS->__fabricvaspaceGetPageTableInfo__(pVAS, pParams); } -static inline NV_STATUS fabricvaspaceIncAllocRefCnt_DISPATCH(struct FABRIC_VASPACE *pVAS, NvU64 vAddr) { - return pVAS->__fabricvaspaceIncAllocRefCnt__(pVAS, vAddr); +static inline NV_STATUS fabricvaspaceGetPteInfo_DISPATCH(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { + return pVAS->__fabricvaspaceGetPteInfo__(pVAS, pGpu, pParams, pPhysAddr); } static inline NV_STATUS fabricvaspaceSetPteInfo_DISPATCH(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { @@ -305,17 +349,25 @@ static inline NV_STATUS fabricvaspaceFreeV2_DISPATCH(struct FABRIC_VASPACE *pVAS return pVAS->__fabricvaspaceFreeV2__(pVAS, vAddr, pSize); } -static inline NV_STATUS fabricvaspaceGetPasid_DISPATCH(struct FABRIC_VASPACE *pVAS, NvU32 *pPasid) { - return pVAS->__fabricvaspaceGetPasid__(pVAS, pPasid); -} +NV_STATUS fabricvaspaceConstruct__IMPL(struct FABRIC_VASPACE *pFabricVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags); -static inline NV_STATUS fabricvaspaceGetPageTableInfo_DISPATCH(struct FABRIC_VASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { - return pVAS->__fabricvaspaceGetPageTableInfo__(pVAS, pParams); -} +NV_STATUS fabricvaspaceAlloc_IMPL(struct FABRIC_VASPACE *pFabricVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSize, VAS_ALLOC_FLAGS flags, NvU64 *pAddr); -static inline NV_STATUS fabricvaspaceReserveMempool_DISPATCH(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { - return pVAS->__fabricvaspaceReserveMempool__(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags); -} +NV_STATUS fabricvaspaceFree_IMPL(struct FABRIC_VASPACE *pFabricVAS, NvU64 vAddr); + +NV_STATUS fabricvaspaceMap_IMPL(struct FABRIC_VASPACE *pFabricVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags); + +void fabricvaspaceUnmap_IMPL(struct FABRIC_VASPACE *pFabricVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi); + +NV_STATUS fabricvaspaceApplyDefaultAlignment_IMPL(struct FABRIC_VASPACE *pFabricVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask); + +NV_STATUS fabricvaspaceGetVasInfo_IMPL(struct FABRIC_VASPACE *pFabricVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams); + +NV_STATUS fabricvaspacePinRootPageDir_IMPL(struct FABRIC_VASPACE *pFabricVAS, struct OBJGPU *pGpu); + +void fabricvaspaceUnpinRootPageDir_IMPL(struct FABRIC_VASPACE *pFabricVAS, struct OBJGPU *pGpu); + +void fabricvaspaceInvalidateTlb_IMPL(struct FABRIC_VASPACE *pFabricVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type); static inline NvU64 fabricvaspaceGetUCFlaStart(struct FABRIC_VASPACE *pFabricVAS) { return pFabricVAS->ucFabricBase; diff --git a/src/nvidia/generated/g_fbsr_nvoc.c b/src/nvidia/generated/g_fbsr_nvoc.c index ad6ed2d55c..23fb9ba68e 100644 --- a/src/nvidia/generated/g_fbsr_nvoc.c +++ b/src/nvidia/generated/g_fbsr_nvoc.c @@ -96,6 +96,7 @@ NV_STATUS __nvoc_ctor_OBJFBSR(OBJFBSR *pThis, RmHalspecOwner *pRmhalspecowner) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJFBSR_1(OBJFBSR *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -108,7 +109,7 @@ static void __nvoc_init_funcTable_OBJFBSR_1(OBJFBSR *pThis, RmHalspecOwner *pRmh PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // Hal function -- fbsrBegin + // fbsrBegin -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x100003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GH100 */ { pThis->__fbsrBegin__ = &fbsrBegin_GM107; @@ -118,7 +119,7 @@ static void __nvoc_init_funcTable_OBJFBSR_1(OBJFBSR *pThis, RmHalspecOwner *pRmh pThis->__fbsrBegin__ = &fbsrBegin_GA100; } - // Hal function -- fbsrEnd + // fbsrEnd -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x100003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GH100 */ { pThis->__fbsrEnd__ = &fbsrEnd_GM107; @@ -128,7 +129,7 @@ static void __nvoc_init_funcTable_OBJFBSR_1(OBJFBSR *pThis, RmHalspecOwner *pRmh pThis->__fbsrEnd__ = &fbsrEnd_GA100; } - // Hal function -- fbsrSendMemsysProgramRawCompressionMode + // fbsrSendMemsysProgramRawCompressionMode -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ { pThis->__fbsrSendMemsysProgramRawCompressionMode__ = &fbsrSendMemsysProgramRawCompressionMode_GA100; @@ -138,9 +139,13 @@ static void __nvoc_init_funcTable_OBJFBSR_1(OBJFBSR *pThis, RmHalspecOwner *pRmh { pThis->__fbsrSendMemsysProgramRawCompressionMode__ = &fbsrSendMemsysProgramRawCompressionMode_56cd7a; } -} +} // End __nvoc_init_funcTable_OBJFBSR_1 with approximately 6 basic block(s). + +// Initialize vtable(s) for 3 virtual method(s). void __nvoc_init_funcTable_OBJFBSR(OBJFBSR *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 3 per-object function pointer(s). __nvoc_init_funcTable_OBJFBSR_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_fbsr_nvoc.h b/src/nvidia/generated/g_fbsr_nvoc.h index d9b0b88ec8..e140a9ac75 100644 --- a/src/nvidia/generated/g_fbsr_nvoc.h +++ b/src/nvidia/generated/g_fbsr_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_FBSR_NVOC_H_ #define _G_FBSR_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2009-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2009-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_fbsr_nvoc.h" #ifndef FBSR_H @@ -101,14 +109,25 @@ typedef struct OBJFBSR OBJFBSR; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJFBSR { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct OBJFBSR *__nvoc_pbase_OBJFBSR; - NV_STATUS (*__fbsrBegin__)(struct OBJGPU *, struct OBJFBSR *, FBSR_OP_TYPE); - NV_STATUS (*__fbsrEnd__)(struct OBJGPU *, struct OBJFBSR *); - NV_STATUS (*__fbsrSendMemsysProgramRawCompressionMode__)(struct OBJGPU *, struct OBJFBSR *, NvBool); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct OBJFBSR *__nvoc_pbase_OBJFBSR; // fbsr + + // Vtable with 3 per-object function pointers + NV_STATUS (*__fbsrBegin__)(struct OBJGPU *, struct OBJFBSR * /*this*/, FBSR_OP_TYPE); // halified (2 hals) body + NV_STATUS (*__fbsrEnd__)(struct OBJGPU *, struct OBJFBSR * /*this*/); // halified (2 hals) body + NV_STATUS (*__fbsrSendMemsysProgramRawCompressionMode__)(struct OBJGPU *, struct OBJFBSR * /*this*/, NvBool); // halified (2 hals) body + + // Data members NvU32 type; struct OBJCE *pCe; FBSR_OP_TYPE op; @@ -122,9 +141,7 @@ struct OBJFBSR { void *pMapCookie; NvU64 length; NvU64 sysOffset; - NvU64 gspFbAllocsSysOffset; NvU32 numRegions; - NvU32 regionRecordIndex; NvBool bOperationFailed; NvBool bValid; NvBool bInitialized; @@ -141,6 +158,7 @@ typedef struct OBJFBSR OBJFBSR; #define __nvoc_class_id_OBJFBSR 0xa30fe6 #endif /* __nvoc_class_id_OBJFBSR */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJFBSR; #define __staticCast_OBJFBSR(pThis) \ @@ -153,19 +171,37 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJFBSR; ((OBJFBSR*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJFBSR))) #endif //__nvoc_fbsr_h_disabled - NV_STATUS __nvoc_objCreateDynamic_OBJFBSR(OBJFBSR**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_OBJFBSR(OBJFBSR**, Dynamic*, NvU32); #define __objCreate_OBJFBSR(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJFBSR((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define fbsrBegin_FNPTR(pFbsr) pFbsr->__fbsrBegin__ #define fbsrBegin(pGpu, pFbsr, op) fbsrBegin_DISPATCH(pGpu, pFbsr, op) #define fbsrBegin_HAL(pGpu, pFbsr, op) fbsrBegin_DISPATCH(pGpu, pFbsr, op) +#define fbsrEnd_FNPTR(pFbsr) pFbsr->__fbsrEnd__ #define fbsrEnd(pGpu, pFbsr) fbsrEnd_DISPATCH(pGpu, pFbsr) #define fbsrEnd_HAL(pGpu, pFbsr) fbsrEnd_DISPATCH(pGpu, pFbsr) +#define fbsrSendMemsysProgramRawCompressionMode_FNPTR(pFbsr) pFbsr->__fbsrSendMemsysProgramRawCompressionMode__ #define fbsrSendMemsysProgramRawCompressionMode(pGpu, pFbsr, bRawMode) fbsrSendMemsysProgramRawCompressionMode_DISPATCH(pGpu, pFbsr, bRawMode) #define fbsrSendMemsysProgramRawCompressionMode_HAL(pGpu, pFbsr, bRawMode) fbsrSendMemsysProgramRawCompressionMode_DISPATCH(pGpu, pFbsr, bRawMode) + +// Dispatch functions +static inline NV_STATUS fbsrBegin_DISPATCH(struct OBJGPU *pGpu, struct OBJFBSR *pFbsr, FBSR_OP_TYPE op) { + return pFbsr->__fbsrBegin__(pGpu, pFbsr, op); +} + +static inline NV_STATUS fbsrEnd_DISPATCH(struct OBJGPU *pGpu, struct OBJFBSR *pFbsr) { + return pFbsr->__fbsrEnd__(pGpu, pFbsr); +} + +static inline NV_STATUS fbsrSendMemsysProgramRawCompressionMode_DISPATCH(struct OBJGPU *pGpu, struct OBJFBSR *pFbsr, NvBool bRawMode) { + return pFbsr->__fbsrSendMemsysProgramRawCompressionMode__(pGpu, pFbsr, bRawMode); +} + NV_STATUS fbsrInit_GM107(struct OBJGPU *pGpu, struct OBJFBSR *pFbsr); @@ -226,48 +262,36 @@ NV_STATUS fbsrBegin_GA100(struct OBJGPU *pGpu, struct OBJFBSR *pFbsr, FBSR_OP_TY NV_STATUS fbsrBegin_GM107(struct OBJGPU *pGpu, struct OBJFBSR *pFbsr, FBSR_OP_TYPE op); -static inline NV_STATUS fbsrBegin_DISPATCH(struct OBJGPU *pGpu, struct OBJFBSR *pFbsr, FBSR_OP_TYPE op) { - return pFbsr->__fbsrBegin__(pGpu, pFbsr, op); -} - NV_STATUS fbsrEnd_GA100(struct OBJGPU *pGpu, struct OBJFBSR *pFbsr); NV_STATUS fbsrEnd_GM107(struct OBJGPU *pGpu, struct OBJFBSR *pFbsr); -static inline NV_STATUS fbsrEnd_DISPATCH(struct OBJGPU *pGpu, struct OBJFBSR *pFbsr) { - return pFbsr->__fbsrEnd__(pGpu, pFbsr); -} - NV_STATUS fbsrSendMemsysProgramRawCompressionMode_GA100(struct OBJGPU *pGpu, struct OBJFBSR *pFbsr, NvBool bRawMode); static inline NV_STATUS fbsrSendMemsysProgramRawCompressionMode_56cd7a(struct OBJGPU *pGpu, struct OBJFBSR *pFbsr, NvBool bRawMode) { return NV_OK; } -static inline NV_STATUS fbsrSendMemsysProgramRawCompressionMode_DISPATCH(struct OBJGPU *pGpu, struct OBJFBSR *pFbsr, NvBool bRawMode) { - return pFbsr->__fbsrSendMemsysProgramRawCompressionMode__(pGpu, pFbsr, bRawMode); -} - -NV_STATUS fbsrObjectInit_IMPL(struct OBJFBSR *pFbsr, NvU32 arg0); +NV_STATUS fbsrObjectInit_IMPL(struct OBJFBSR *pFbsr, NvU32 arg2); #ifdef __nvoc_fbsr_h_disabled -static inline NV_STATUS fbsrObjectInit(struct OBJFBSR *pFbsr, NvU32 arg0) { +static inline NV_STATUS fbsrObjectInit(struct OBJFBSR *pFbsr, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("OBJFBSR was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_fbsr_h_disabled -#define fbsrObjectInit(pFbsr, arg0) fbsrObjectInit_IMPL(pFbsr, arg0) +#define fbsrObjectInit(pFbsr, arg2) fbsrObjectInit_IMPL(pFbsr, arg2) #endif //__nvoc_fbsr_h_disabled -NV_STATUS fbsrReserveSysMemoryForPowerMgmt_IMPL(struct OBJGPU *pGpu, struct OBJFBSR *pFbsr, NvU64 arg0); +NV_STATUS fbsrReserveSysMemoryForPowerMgmt_IMPL(struct OBJGPU *pGpu, struct OBJFBSR *pFbsr, NvU64 arg3); #ifdef __nvoc_fbsr_h_disabled -static inline NV_STATUS fbsrReserveSysMemoryForPowerMgmt(struct OBJGPU *pGpu, struct OBJFBSR *pFbsr, NvU64 arg0) { +static inline NV_STATUS fbsrReserveSysMemoryForPowerMgmt(struct OBJGPU *pGpu, struct OBJFBSR *pFbsr, NvU64 arg3) { NV_ASSERT_FAILED_PRECOMP("OBJFBSR was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_fbsr_h_disabled -#define fbsrReserveSysMemoryForPowerMgmt(pGpu, pFbsr, arg0) fbsrReserveSysMemoryForPowerMgmt_IMPL(pGpu, pFbsr, arg0) +#define fbsrReserveSysMemoryForPowerMgmt(pGpu, pFbsr, arg3) fbsrReserveSysMemoryForPowerMgmt_IMPL(pGpu, pFbsr, arg3) #endif //__nvoc_fbsr_h_disabled void fbsrFreeReservedSysMemoryForPowerMgmt_IMPL(struct OBJFBSR *pFbsr); diff --git a/src/nvidia/generated/g_fecs_event_list_nvoc.h b/src/nvidia/generated/g_fecs_event_list_nvoc.h index 3b5eb097ee..382e67f8f9 100644 --- a/src/nvidia/generated/g_fecs_event_list_nvoc.h +++ b/src/nvidia/generated/g_fecs_event_list_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_FECS_EVENT_LIST_NVOC_H_ #define _G_FECS_EVENT_LIST_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2013-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2013-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_fecs_event_list_nvoc.h" #ifndef _FECS_EVENT_LIST_H_ @@ -45,9 +53,11 @@ extern "C" { #include "containers/multimap.h" #include "resserv/resserv.h" #include "rmapi/client.h" +#include "vgpu/rpc_headers.h" #include "ctrl/ctrl2080/ctrl2080gr.h" // NV2080_CTRL_GR_FECS_BIND_EVTBUF_LOD + struct KernelGraphics; #ifndef __NVOC_CLASS_KernelGraphics_TYPEDEF__ @@ -60,6 +70,7 @@ typedef struct KernelGraphics KernelGraphics; #endif /* __nvoc_class_id_KernelGraphics */ + struct KernelGraphicsManager; #ifndef __NVOC_CLASS_KernelGraphicsManager_TYPEDEF__ @@ -72,6 +83,7 @@ typedef struct KernelGraphicsManager KernelGraphicsManager; #endif /* __nvoc_class_id_KernelGraphicsManager */ + struct EventBuffer; #ifndef __NVOC_CLASS_EventBuffer_TYPEDEF__ @@ -84,6 +96,7 @@ typedef struct EventBuffer EventBuffer; #endif /* __nvoc_class_id_EventBuffer */ + struct Subdevice; #ifndef __NVOC_CLASS_Subdevice_TYPEDEF__ @@ -148,7 +161,6 @@ typedef struct ct_assert(NV_OFFSETOF(FECS_EVENT_RECORD_OUTPUT, record) == sizeof(NV_EVENT_BUFFER_RECORD_HEADER)); ct_assert(sizeof(FECS_EVENT_RECORD_OUTPUT) == sizeof(NV_EVENT_BUFFER_RECORD_HEADER) + sizeof(NV_EVENT_BUFFER_FECS_RECORD_V2)); - NV_STATUS fecsAddBindpoint ( OBJGPU *pGpu, @@ -243,9 +255,12 @@ void fecsBufferTeardown(OBJGPU *pGpu, struct KernelGraphics *pKernelGraphics); */ void fecsBufferDisableHw(OBJGPU *pGpu, struct KernelGraphics *pKernelGraphics); +void fecsRemoveAllBindpointsForGpu(OBJGPU *pGpu); void fecsRemoveAllBindpoints(struct EventBuffer *pEventBuffer); void fecsRemoveBindpoint(OBJGPU *pGpu, NvU64 uid, NV_EVENT_BUFFER_BIND_POINT_FECS* pBind); +NV_STATUS fecsHandleFecsLoggingError(OBJGPU *pGpu, NvU32 grIdx, FECS_ERROR_EVENT_TYPE errorType); + /* The callback function that transfers FECS Buffer entries to an EventBuffer */ void nvEventBufferFecsCallback(OBJGPU *pGpu, void *pArgs); diff --git a/src/nvidia/generated/g_fla_mem_nvoc.c b/src/nvidia/generated/g_fla_mem_nvoc.c index fb12801881..17e7e08fc7 100644 --- a/src/nvidia/generated/g_fla_mem_nvoc.c +++ b/src/nvidia/generated/g_fla_mem_nvoc.c @@ -93,110 +93,142 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_FlaMemory = /*pExportInfo=*/ &__nvoc_export_info_FlaMemory }; -static NvBool __nvoc_thunk_FlaMemory_resCanCopy(struct RsResource *pFlaMemory) { - return flamemCanCopy((struct FlaMemory *)(((unsigned char *)pFlaMemory) - __nvoc_rtti_FlaMemory_RsResource.offset)); +// 1 down-thunk(s) defined to bridge methods in FlaMemory from superclasses + +// flamemCanCopy: virtual override (res) base (mem) +static NvBool __nvoc_down_thunk_FlaMemory_resCanCopy(struct RsResource *pFlaMemory) { + return flamemCanCopy((struct FlaMemory *)(((unsigned char *) pFlaMemory) - __nvoc_rtti_FlaMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_flamemCheckMemInterUnmap(struct FlaMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), bSubdeviceHandleProvided); + +// 25 up-thunk(s) defined to bridge methods in FlaMemory to superclasses + +// flamemIsDuplicate: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_flamemIsDuplicate(struct FlaMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_RmResource_flamemShareCallback(struct FlaMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_FlaMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// flamemGetMapAddrSpace: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_flamemGetMapAddrSpace(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_RsResource_flamemMapTo(struct FlaMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_FlaMemory_RsResource.offset), pParams); +// flamemControl: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_flamemControl(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_flamemGetMapAddrSpace(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return memGetMapAddrSpace((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); +// flamemMap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_flamemMap(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } -static NvBool __nvoc_thunk_Memory_flamemIsExportAllowed(struct FlaMemory *pMemory) { - return memIsExportAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_FlaMemory_Memory.offset)); +// flamemUnmap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_flamemUnmap(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pCallContext, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_flamemGetRefCount(struct FlaMemory *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_FlaMemory_RsResource.offset)); +// flamemGetMemInterMapParams: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_flamemGetMemInterMapParams(struct FlaMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pParams); } -static void __nvoc_thunk_RsResource_flamemAddAdditionalDependants(struct RsClient *pClient, struct FlaMemory *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_FlaMemory_RsResource.offset), pReference); +// flamemCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_flamemCheckMemInterUnmap(struct FlaMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RmResource_flamemControl_Prologue(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_FlaMemory_RmResource.offset), pCallContext, pParams); +// flamemGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_flamemGetMemoryMappingDescriptor(struct FlaMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), ppMemDesc); } -static NvBool __nvoc_thunk_Memory_flamemIsGpuMapAllowed(struct FlaMemory *pMemory, struct OBJGPU *pGpu) { - return memIsGpuMapAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pGpu); +// flamemCheckCopyPermissions: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_flamemCheckCopyPermissions(struct FlaMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pDstGpu, pDstDevice); } -static NV_STATUS __nvoc_thunk_RsResource_flamemUnmapFrom(struct FlaMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_FlaMemory_RsResource.offset), pParams); +// flamemIsReady: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_flamemIsReady(struct FlaMemory *pMemory, NvBool bCopyConstructorContext) { + return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), bCopyConstructorContext); } -static void __nvoc_thunk_RmResource_flamemControl_Epilogue(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_FlaMemory_RmResource.offset), pCallContext, pParams); +// flamemIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_flamemIsGpuMapAllowed(struct FlaMemory *pMemory, struct OBJGPU *pGpu) { + return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pGpu); } -static NV_STATUS __nvoc_thunk_Memory_flamemControl(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memControl((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pCallContext, pParams); +// flamemIsExportAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_flamemIsExportAllowed(struct FlaMemory *pMemory) { + return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset)); } -static NV_STATUS __nvoc_thunk_Memory_flamemUnmap(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pCallContext, pCpuMapping); +// flamemAccessCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_flamemAccessCallback(struct FlaMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_Memory_flamemGetMemInterMapParams(struct FlaMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pParams); +// flamemShareCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_flamemShareCallback(struct FlaMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_Memory_flamemGetMemoryMappingDescriptor(struct FlaMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), ppMemDesc); +// flamemControlSerialization_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_flamemControlSerialization_Prologue(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_flamemControlFilter(struct FlaMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_FlaMemory_RsResource.offset), pCallContext, pParams); +// flamemControlSerialization_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_flamemControlSerialization_Epilogue(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_flamemControlSerialization_Prologue(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_FlaMemory_RmResource.offset), pCallContext, pParams); +// flamemControl_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_flamemControl_Prologue(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_flamemIsPartialUnmapSupported(struct FlaMemory *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_FlaMemory_RsResource.offset)); +// flamemControl_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_flamemControl_Epilogue(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_flamemIsReady(struct FlaMemory *pMemory, NvBool bCopyConstructorContext) { - return memIsReady((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), bCopyConstructorContext); +// flamemPreDestruct: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_flamemPreDestruct(struct FlaMemory *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_flamemCheckCopyPermissions(struct FlaMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return memCheckCopyPermissions((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pDstGpu, pDstDevice); +// flamemControlFilter: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_flamemControlFilter(struct FlaMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_flamemPreDestruct(struct FlaMemory *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_FlaMemory_RsResource.offset)); +// flamemIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body +static NvBool __nvoc_up_thunk_RsResource_flamemIsPartialUnmapSupported(struct FlaMemory *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_flamemIsDuplicate(struct FlaMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), hMemory, pDuplicate); +// flamemMapTo: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_flamemMapTo(struct FlaMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_flamemControlSerialization_Epilogue(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_FlaMemory_RmResource.offset), pCallContext, pParams); +// flamemUnmapFrom: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_flamemUnmapFrom(struct FlaMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_Memory_flamemMap(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pCallContext, pParams, pCpuMapping); +// flamemGetRefCount: virtual inherited (res) base (mem) +static NvU32 __nvoc_up_thunk_RsResource_flamemGetRefCount(struct FlaMemory *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_flamemAccessCallback(struct FlaMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_FlaMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// flamemAddAdditionalDependants: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_flamemAddAdditionalDependants(struct RsClient *pClient, struct FlaMemory *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_FlaMemory = { /*numEntries=*/ 0, @@ -233,67 +265,98 @@ NV_STATUS __nvoc_ctor_FlaMemory(FlaMemory *pThis, CALL_CONTEXT * arg_pCallContex return status; } +// Vtable initialization static void __nvoc_init_funcTable_FlaMemory_1(FlaMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // flamemCanCopy -- virtual override (res) base (mem) pThis->__flamemCanCopy__ = &flamemCanCopy_IMPL; + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_FlaMemory_resCanCopy; + // flamemCopyConstruct -- virtual override (mem) base (mem) pThis->__flamemCopyConstruct__ = &flamemCopyConstruct_IMPL; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_FlaMemory_resCanCopy; + // flamemIsDuplicate -- virtual inherited (mem) base (mem) + pThis->__flamemIsDuplicate__ = &__nvoc_up_thunk_Memory_flamemIsDuplicate; - pThis->__flamemCheckMemInterUnmap__ = &__nvoc_thunk_Memory_flamemCheckMemInterUnmap; + // flamemGetMapAddrSpace -- virtual inherited (mem) base (mem) + pThis->__flamemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_flamemGetMapAddrSpace; - pThis->__flamemShareCallback__ = &__nvoc_thunk_RmResource_flamemShareCallback; + // flamemControl -- virtual inherited (mem) base (mem) + pThis->__flamemControl__ = &__nvoc_up_thunk_Memory_flamemControl; - pThis->__flamemMapTo__ = &__nvoc_thunk_RsResource_flamemMapTo; + // flamemMap -- virtual inherited (mem) base (mem) + pThis->__flamemMap__ = &__nvoc_up_thunk_Memory_flamemMap; - pThis->__flamemGetMapAddrSpace__ = &__nvoc_thunk_Memory_flamemGetMapAddrSpace; + // flamemUnmap -- virtual inherited (mem) base (mem) + pThis->__flamemUnmap__ = &__nvoc_up_thunk_Memory_flamemUnmap; - pThis->__flamemIsExportAllowed__ = &__nvoc_thunk_Memory_flamemIsExportAllowed; + // flamemGetMemInterMapParams -- virtual inherited (mem) base (mem) + pThis->__flamemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_flamemGetMemInterMapParams; - pThis->__flamemGetRefCount__ = &__nvoc_thunk_RsResource_flamemGetRefCount; + // flamemCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body + pThis->__flamemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_flamemCheckMemInterUnmap; - pThis->__flamemAddAdditionalDependants__ = &__nvoc_thunk_RsResource_flamemAddAdditionalDependants; + // flamemGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) + pThis->__flamemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_flamemGetMemoryMappingDescriptor; - pThis->__flamemControl_Prologue__ = &__nvoc_thunk_RmResource_flamemControl_Prologue; + // flamemCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body + pThis->__flamemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_flamemCheckCopyPermissions; - pThis->__flamemIsGpuMapAllowed__ = &__nvoc_thunk_Memory_flamemIsGpuMapAllowed; + // flamemIsReady -- virtual inherited (mem) base (mem) + pThis->__flamemIsReady__ = &__nvoc_up_thunk_Memory_flamemIsReady; - pThis->__flamemUnmapFrom__ = &__nvoc_thunk_RsResource_flamemUnmapFrom; + // flamemIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__flamemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_flamemIsGpuMapAllowed; - pThis->__flamemControl_Epilogue__ = &__nvoc_thunk_RmResource_flamemControl_Epilogue; + // flamemIsExportAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__flamemIsExportAllowed__ = &__nvoc_up_thunk_Memory_flamemIsExportAllowed; - pThis->__flamemControl__ = &__nvoc_thunk_Memory_flamemControl; + // flamemAccessCallback -- virtual inherited (rmres) base (mem) + pThis->__flamemAccessCallback__ = &__nvoc_up_thunk_RmResource_flamemAccessCallback; - pThis->__flamemUnmap__ = &__nvoc_thunk_Memory_flamemUnmap; + // flamemShareCallback -- virtual inherited (rmres) base (mem) + pThis->__flamemShareCallback__ = &__nvoc_up_thunk_RmResource_flamemShareCallback; - pThis->__flamemGetMemInterMapParams__ = &__nvoc_thunk_Memory_flamemGetMemInterMapParams; + // flamemControlSerialization_Prologue -- virtual inherited (rmres) base (mem) + pThis->__flamemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_flamemControlSerialization_Prologue; - pThis->__flamemGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_flamemGetMemoryMappingDescriptor; + // flamemControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__flamemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_flamemControlSerialization_Epilogue; - pThis->__flamemControlFilter__ = &__nvoc_thunk_RsResource_flamemControlFilter; + // flamemControl_Prologue -- virtual inherited (rmres) base (mem) + pThis->__flamemControl_Prologue__ = &__nvoc_up_thunk_RmResource_flamemControl_Prologue; - pThis->__flamemControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_flamemControlSerialization_Prologue; + // flamemControl_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__flamemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_flamemControl_Epilogue; - pThis->__flamemIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_flamemIsPartialUnmapSupported; + // flamemPreDestruct -- virtual inherited (res) base (mem) + pThis->__flamemPreDestruct__ = &__nvoc_up_thunk_RsResource_flamemPreDestruct; - pThis->__flamemIsReady__ = &__nvoc_thunk_Memory_flamemIsReady; + // flamemControlFilter -- virtual inherited (res) base (mem) + pThis->__flamemControlFilter__ = &__nvoc_up_thunk_RsResource_flamemControlFilter; - pThis->__flamemCheckCopyPermissions__ = &__nvoc_thunk_Memory_flamemCheckCopyPermissions; + // flamemIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body + pThis->__flamemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_flamemIsPartialUnmapSupported; - pThis->__flamemPreDestruct__ = &__nvoc_thunk_RsResource_flamemPreDestruct; + // flamemMapTo -- virtual inherited (res) base (mem) + pThis->__flamemMapTo__ = &__nvoc_up_thunk_RsResource_flamemMapTo; - pThis->__flamemIsDuplicate__ = &__nvoc_thunk_Memory_flamemIsDuplicate; + // flamemUnmapFrom -- virtual inherited (res) base (mem) + pThis->__flamemUnmapFrom__ = &__nvoc_up_thunk_RsResource_flamemUnmapFrom; - pThis->__flamemControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_flamemControlSerialization_Epilogue; + // flamemGetRefCount -- virtual inherited (res) base (mem) + pThis->__flamemGetRefCount__ = &__nvoc_up_thunk_RsResource_flamemGetRefCount; - pThis->__flamemMap__ = &__nvoc_thunk_Memory_flamemMap; + // flamemAddAdditionalDependants -- virtual inherited (res) base (mem) + pThis->__flamemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_flamemAddAdditionalDependants; +} // End __nvoc_init_funcTable_FlaMemory_1 with approximately 28 basic block(s). - pThis->__flamemAccessCallback__ = &__nvoc_thunk_RmResource_flamemAccessCallback; -} +// Initialize vtable(s) for 27 virtual method(s). void __nvoc_init_funcTable_FlaMemory(FlaMemory *pThis) { + + // Initialize vtable(s) with 27 per-object function pointer(s). __nvoc_init_funcTable_FlaMemory_1(pThis); } diff --git a/src/nvidia/generated/g_fla_mem_nvoc.h b/src/nvidia/generated/g_fla_mem_nvoc.h index c667d3d581..ca73e219ff 100644 --- a/src/nvidia/generated/g_fla_mem_nvoc.h +++ b/src/nvidia/generated/g_fla_mem_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_FLA_MEM_NVOC_H_ #define _G_FLA_MEM_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_fla_mem_nvoc.h" #ifndef _FLA_MEMORY_H_ @@ -49,42 +57,53 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct FlaMemory { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Memory *__nvoc_pbase_Memory; - struct FlaMemory *__nvoc_pbase_FlaMemory; - NvBool (*__flamemCanCopy__)(struct FlaMemory *); - NV_STATUS (*__flamemCopyConstruct__)(struct FlaMemory *, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); - NV_STATUS (*__flamemCheckMemInterUnmap__)(struct FlaMemory *, NvBool); - NvBool (*__flamemShareCallback__)(struct FlaMemory *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__flamemMapTo__)(struct FlaMemory *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__flamemGetMapAddrSpace__)(struct FlaMemory *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvBool (*__flamemIsExportAllowed__)(struct FlaMemory *); - NvU32 (*__flamemGetRefCount__)(struct FlaMemory *); - void (*__flamemAddAdditionalDependants__)(struct RsClient *, struct FlaMemory *, RsResourceRef *); - NV_STATUS (*__flamemControl_Prologue__)(struct FlaMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__flamemIsGpuMapAllowed__)(struct FlaMemory *, struct OBJGPU *); - NV_STATUS (*__flamemUnmapFrom__)(struct FlaMemory *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__flamemControl_Epilogue__)(struct FlaMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__flamemControl__)(struct FlaMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__flamemUnmap__)(struct FlaMemory *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__flamemGetMemInterMapParams__)(struct FlaMemory *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__flamemGetMemoryMappingDescriptor__)(struct FlaMemory *, MEMORY_DESCRIPTOR **); - NV_STATUS (*__flamemControlFilter__)(struct FlaMemory *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__flamemControlSerialization_Prologue__)(struct FlaMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__flamemIsPartialUnmapSupported__)(struct FlaMemory *); - NV_STATUS (*__flamemIsReady__)(struct FlaMemory *, NvBool); - NV_STATUS (*__flamemCheckCopyPermissions__)(struct FlaMemory *, struct OBJGPU *, struct Device *); - void (*__flamemPreDestruct__)(struct FlaMemory *); - NV_STATUS (*__flamemIsDuplicate__)(struct FlaMemory *, NvHandle, NvBool *); - void (*__flamemControlSerialization_Epilogue__)(struct FlaMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__flamemMap__)(struct FlaMemory *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__flamemAccessCallback__)(struct FlaMemory *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct Memory *__nvoc_pbase_Memory; // mem super + struct FlaMemory *__nvoc_pbase_FlaMemory; // flamem + + // Vtable with 27 per-object function pointers + NvBool (*__flamemCanCopy__)(struct FlaMemory * /*this*/); // virtual override (res) base (mem) + NV_STATUS (*__flamemCopyConstruct__)(struct FlaMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // virtual override (mem) base (mem) + NV_STATUS (*__flamemIsDuplicate__)(struct FlaMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) + NV_STATUS (*__flamemGetMapAddrSpace__)(struct FlaMemory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) + NV_STATUS (*__flamemControl__)(struct FlaMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (mem) base (mem) + NV_STATUS (*__flamemMap__)(struct FlaMemory * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__flamemUnmap__)(struct FlaMemory * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__flamemGetMemInterMapParams__)(struct FlaMemory * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (mem) base (mem) + NV_STATUS (*__flamemCheckMemInterUnmap__)(struct FlaMemory * /*this*/, NvBool); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__flamemGetMemoryMappingDescriptor__)(struct FlaMemory * /*this*/, MEMORY_DESCRIPTOR **); // virtual inherited (mem) base (mem) + NV_STATUS (*__flamemCheckCopyPermissions__)(struct FlaMemory * /*this*/, struct OBJGPU *, struct Device *); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__flamemIsReady__)(struct FlaMemory * /*this*/, NvBool); // virtual inherited (mem) base (mem) + NvBool (*__flamemIsGpuMapAllowed__)(struct FlaMemory * /*this*/, struct OBJGPU *); // inline virtual inherited (mem) base (mem) body + NvBool (*__flamemIsExportAllowed__)(struct FlaMemory * /*this*/); // inline virtual inherited (mem) base (mem) body + NvBool (*__flamemAccessCallback__)(struct FlaMemory * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (mem) + NvBool (*__flamemShareCallback__)(struct FlaMemory * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__flamemControlSerialization_Prologue__)(struct FlaMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__flamemControlSerialization_Epilogue__)(struct FlaMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__flamemControl_Prologue__)(struct FlaMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__flamemControl_Epilogue__)(struct FlaMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__flamemPreDestruct__)(struct FlaMemory * /*this*/); // virtual inherited (res) base (mem) + NV_STATUS (*__flamemControlFilter__)(struct FlaMemory * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (mem) + NvBool (*__flamemIsPartialUnmapSupported__)(struct FlaMemory * /*this*/); // inline virtual inherited (res) base (mem) body + NV_STATUS (*__flamemMapTo__)(struct FlaMemory * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (mem) + NV_STATUS (*__flamemUnmapFrom__)(struct FlaMemory * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (mem) + NvU32 (*__flamemGetRefCount__)(struct FlaMemory * /*this*/); // virtual inherited (res) base (mem) + void (*__flamemAddAdditionalDependants__)(struct RsClient *, struct FlaMemory * /*this*/, RsResourceRef *); // virtual inherited (res) base (mem) + + // Data members NvU32 peerDeviceInst; NvU32 peerGpuInst; NvHandle hDupedExportMemory; @@ -99,6 +118,7 @@ typedef struct FlaMemory FlaMemory; #define __nvoc_class_id_FlaMemory 0xe61ee1 #endif /* __nvoc_class_id_FlaMemory */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_FlaMemory; #define __staticCast_FlaMemory(pThis) \ @@ -111,152 +131,182 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_FlaMemory; ((FlaMemory*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(FlaMemory))) #endif //__nvoc_fla_mem_h_disabled - NV_STATUS __nvoc_objCreateDynamic_FlaMemory(FlaMemory**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_FlaMemory(FlaMemory**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_FlaMemory(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_FlaMemory((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define flamemCanCopy_FNPTR(pFlaMemory) pFlaMemory->__flamemCanCopy__ #define flamemCanCopy(pFlaMemory) flamemCanCopy_DISPATCH(pFlaMemory) +#define flamemCopyConstruct_FNPTR(pFlaMemory) pFlaMemory->__flamemCopyConstruct__ #define flamemCopyConstruct(pFlaMemory, pCallContext, pParams) flamemCopyConstruct_DISPATCH(pFlaMemory, pCallContext, pParams) -#define flamemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) flamemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define flamemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) flamemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define flamemMapTo(pResource, pParams) flamemMapTo_DISPATCH(pResource, pParams) +#define flamemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define flamemIsDuplicate(pMemory, hMemory, pDuplicate) flamemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) +#define flamemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ #define flamemGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) flamemGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define flamemIsExportAllowed(pMemory) flamemIsExportAllowed_DISPATCH(pMemory) -#define flamemGetRefCount(pResource) flamemGetRefCount_DISPATCH(pResource) -#define flamemAddAdditionalDependants(pClient, pResource, pReference) flamemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define flamemControl_Prologue(pResource, pCallContext, pParams) flamemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define flamemIsGpuMapAllowed(pMemory, pGpu) flamemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define flamemUnmapFrom(pResource, pParams) flamemUnmapFrom_DISPATCH(pResource, pParams) -#define flamemControl_Epilogue(pResource, pCallContext, pParams) flamemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define flamemControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ #define flamemControl(pMemory, pCallContext, pParams) flamemControl_DISPATCH(pMemory, pCallContext, pParams) +#define flamemMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define flamemMap(pMemory, pCallContext, pParams, pCpuMapping) flamemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define flamemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ #define flamemUnmap(pMemory, pCallContext, pCpuMapping) flamemUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) +#define flamemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ #define flamemGetMemInterMapParams(pMemory, pParams) flamemGetMemInterMapParams_DISPATCH(pMemory, pParams) +#define flamemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define flamemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) flamemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) +#define flamemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ #define flamemGetMemoryMappingDescriptor(pMemory, ppMemDesc) flamemGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define flamemControlFilter(pResource, pCallContext, pParams) flamemControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define flamemControlSerialization_Prologue(pResource, pCallContext, pParams) flamemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define flamemIsPartialUnmapSupported(pResource) flamemIsPartialUnmapSupported_DISPATCH(pResource) -#define flamemIsReady(pMemory, bCopyConstructorContext) flamemIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define flamemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ #define flamemCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) flamemCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define flamemPreDestruct(pResource) flamemPreDestruct_DISPATCH(pResource) -#define flamemIsDuplicate(pMemory, hMemory, pDuplicate) flamemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define flamemControlSerialization_Epilogue(pResource, pCallContext, pParams) flamemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define flamemMap(pMemory, pCallContext, pParams, pCpuMapping) flamemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define flamemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define flamemIsReady(pMemory, bCopyConstructorContext) flamemIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define flamemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define flamemIsGpuMapAllowed(pMemory, pGpu) flamemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) +#define flamemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define flamemIsExportAllowed(pMemory) flamemIsExportAllowed_DISPATCH(pMemory) +#define flamemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ #define flamemAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) flamemAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool flamemCanCopy_IMPL(struct FlaMemory *pFlaMemory); +#define flamemShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define flamemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) flamemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define flamemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define flamemControlSerialization_Prologue(pResource, pCallContext, pParams) flamemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define flamemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define flamemControlSerialization_Epilogue(pResource, pCallContext, pParams) flamemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define flamemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define flamemControl_Prologue(pResource, pCallContext, pParams) flamemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define flamemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define flamemControl_Epilogue(pResource, pCallContext, pParams) flamemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define flamemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define flamemPreDestruct(pResource) flamemPreDestruct_DISPATCH(pResource) +#define flamemControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define flamemControlFilter(pResource, pCallContext, pParams) flamemControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define flamemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define flamemIsPartialUnmapSupported(pResource) flamemIsPartialUnmapSupported_DISPATCH(pResource) +#define flamemMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define flamemMapTo(pResource, pParams) flamemMapTo_DISPATCH(pResource, pParams) +#define flamemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define flamemUnmapFrom(pResource, pParams) flamemUnmapFrom_DISPATCH(pResource, pParams) +#define flamemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define flamemGetRefCount(pResource) flamemGetRefCount_DISPATCH(pResource) +#define flamemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define flamemAddAdditionalDependants(pClient, pResource, pReference) flamemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NvBool flamemCanCopy_DISPATCH(struct FlaMemory *pFlaMemory) { return pFlaMemory->__flamemCanCopy__(pFlaMemory); } -NV_STATUS flamemCopyConstruct_IMPL(struct FlaMemory *pFlaMemory, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); - static inline NV_STATUS flamemCopyConstruct_DISPATCH(struct FlaMemory *pFlaMemory, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { return pFlaMemory->__flamemCopyConstruct__(pFlaMemory, pCallContext, pParams); } -static inline NV_STATUS flamemCheckMemInterUnmap_DISPATCH(struct FlaMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__flamemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); -} - -static inline NvBool flamemShareCallback_DISPATCH(struct FlaMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__flamemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS flamemMapTo_DISPATCH(struct FlaMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__flamemMapTo__(pResource, pParams); +static inline NV_STATUS flamemIsDuplicate_DISPATCH(struct FlaMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return pMemory->__flamemIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS flamemGetMapAddrSpace_DISPATCH(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pMemory->__flamemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } -static inline NvBool flamemIsExportAllowed_DISPATCH(struct FlaMemory *pMemory) { - return pMemory->__flamemIsExportAllowed__(pMemory); +static inline NV_STATUS flamemControl_DISPATCH(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pMemory->__flamemControl__(pMemory, pCallContext, pParams); } -static inline NvU32 flamemGetRefCount_DISPATCH(struct FlaMemory *pResource) { - return pResource->__flamemGetRefCount__(pResource); +static inline NV_STATUS flamemMap_DISPATCH(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pMemory->__flamemMap__(pMemory, pCallContext, pParams, pCpuMapping); } -static inline void flamemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct FlaMemory *pResource, RsResourceRef *pReference) { - pResource->__flamemAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS flamemUnmap_DISPATCH(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pMemory->__flamemUnmap__(pMemory, pCallContext, pCpuMapping); } -static inline NV_STATUS flamemControl_Prologue_DISPATCH(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__flamemControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS flamemGetMemInterMapParams_DISPATCH(struct FlaMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pMemory->__flamemGetMemInterMapParams__(pMemory, pParams); } -static inline NvBool flamemIsGpuMapAllowed_DISPATCH(struct FlaMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__flamemIsGpuMapAllowed__(pMemory, pGpu); +static inline NV_STATUS flamemCheckMemInterUnmap_DISPATCH(struct FlaMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return pMemory->__flamemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } -static inline NV_STATUS flamemUnmapFrom_DISPATCH(struct FlaMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__flamemUnmapFrom__(pResource, pParams); +static inline NV_STATUS flamemGetMemoryMappingDescriptor_DISPATCH(struct FlaMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return pMemory->__flamemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } -static inline void flamemControl_Epilogue_DISPATCH(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__flamemControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS flamemCheckCopyPermissions_DISPATCH(struct FlaMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return pMemory->__flamemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } -static inline NV_STATUS flamemControl_DISPATCH(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__flamemControl__(pMemory, pCallContext, pParams); +static inline NV_STATUS flamemIsReady_DISPATCH(struct FlaMemory *pMemory, NvBool bCopyConstructorContext) { + return pMemory->__flamemIsReady__(pMemory, bCopyConstructorContext); } -static inline NV_STATUS flamemUnmap_DISPATCH(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__flamemUnmap__(pMemory, pCallContext, pCpuMapping); +static inline NvBool flamemIsGpuMapAllowed_DISPATCH(struct FlaMemory *pMemory, struct OBJGPU *pGpu) { + return pMemory->__flamemIsGpuMapAllowed__(pMemory, pGpu); } -static inline NV_STATUS flamemGetMemInterMapParams_DISPATCH(struct FlaMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__flamemGetMemInterMapParams__(pMemory, pParams); +static inline NvBool flamemIsExportAllowed_DISPATCH(struct FlaMemory *pMemory) { + return pMemory->__flamemIsExportAllowed__(pMemory); } -static inline NV_STATUS flamemGetMemoryMappingDescriptor_DISPATCH(struct FlaMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__flamemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); +static inline NvBool flamemAccessCallback_DISPATCH(struct FlaMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__flamemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS flamemControlFilter_DISPATCH(struct FlaMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__flamemControlFilter__(pResource, pCallContext, pParams); +static inline NvBool flamemShareCallback_DISPATCH(struct FlaMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__flamemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS flamemControlSerialization_Prologue_DISPATCH(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__flamemControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool flamemIsPartialUnmapSupported_DISPATCH(struct FlaMemory *pResource) { - return pResource->__flamemIsPartialUnmapSupported__(pResource); +static inline void flamemControlSerialization_Epilogue_DISPATCH(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__flamemControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS flamemIsReady_DISPATCH(struct FlaMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__flamemIsReady__(pMemory, bCopyConstructorContext); +static inline NV_STATUS flamemControl_Prologue_DISPATCH(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__flamemControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS flamemCheckCopyPermissions_DISPATCH(struct FlaMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__flamemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); +static inline void flamemControl_Epilogue_DISPATCH(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__flamemControl_Epilogue__(pResource, pCallContext, pParams); } static inline void flamemPreDestruct_DISPATCH(struct FlaMemory *pResource) { pResource->__flamemPreDestruct__(pResource); } -static inline NV_STATUS flamemIsDuplicate_DISPATCH(struct FlaMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__flamemIsDuplicate__(pMemory, hMemory, pDuplicate); +static inline NV_STATUS flamemControlFilter_DISPATCH(struct FlaMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__flamemControlFilter__(pResource, pCallContext, pParams); } -static inline void flamemControlSerialization_Epilogue_DISPATCH(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__flamemControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool flamemIsPartialUnmapSupported_DISPATCH(struct FlaMemory *pResource) { + return pResource->__flamemIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS flamemMap_DISPATCH(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__flamemMap__(pMemory, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS flamemMapTo_DISPATCH(struct FlaMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__flamemMapTo__(pResource, pParams); } -static inline NvBool flamemAccessCallback_DISPATCH(struct FlaMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__flamemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS flamemUnmapFrom_DISPATCH(struct FlaMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__flamemUnmapFrom__(pResource, pParams); +} + +static inline NvU32 flamemGetRefCount_DISPATCH(struct FlaMemory *pResource) { + return pResource->__flamemGetRefCount__(pResource); +} + +static inline void flamemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct FlaMemory *pResource, RsResourceRef *pReference) { + pResource->__flamemAddAdditionalDependants__(pClient, pResource, pReference); } +NvBool flamemCanCopy_IMPL(struct FlaMemory *pFlaMemory); + +NV_STATUS flamemCopyConstruct_IMPL(struct FlaMemory *pFlaMemory, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); + NV_STATUS flamemConstruct_IMPL(struct FlaMemory *arg_pFlaMemory, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_flamemConstruct(arg_pFlaMemory, arg_pCallContext, arg_pParams) flamemConstruct_IMPL(arg_pFlaMemory, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_fm_session_api_nvoc.c b/src/nvidia/generated/g_fm_session_api_nvoc.c index 3263985193..2f43c774d9 100644 --- a/src/nvidia/generated/g_fm_session_api_nvoc.c +++ b/src/nvidia/generated/g_fm_session_api_nvoc.c @@ -84,128 +84,152 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_FmSessionApi = /*pExportInfo=*/ &__nvoc_export_info_FmSessionApi }; -static NvBool __nvoc_thunk_RmResource_fmsessionapiShareCallback(struct FmSessionApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NV_STATUS __nvoc_thunk_RmResource_fmsessionapiCheckMemInterUnmap(struct FmSessionApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), bSubdeviceHandleProvided); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_FmSessionApi[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) fmsessionapiCtrlCmdSetFmState_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0xf0101u, + /*paramSize=*/ 0, + /*pClassInfo=*/ &(__nvoc_class_def_FmSessionApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "fmsessionapiCtrlCmdSetFmState" +#endif + }, + { /* [1] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) fmsessionapiCtrlCmdClearFmState_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0xf0102u, + /*paramSize=*/ 0, + /*pClassInfo=*/ &(__nvoc_class_def_FmSessionApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "fmsessionapiCtrlCmdClearFmState" +#endif + }, -static NV_STATUS __nvoc_thunk_RsResource_fmsessionapiControl(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControl((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pCallContext, pParams); +}; + +// 21 up-thunk(s) defined to bridge methods in FmSessionApi to superclasses + +// fmsessionapiAccessCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_fmsessionapiAccessCallback(struct FmSessionApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RmResource_fmsessionapiGetMemInterMapParams(struct FmSessionApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pParams); +// fmsessionapiShareCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_fmsessionapiShareCallback(struct FmSessionApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RmResource_fmsessionapiGetMemoryMappingDescriptor(struct FmSessionApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), ppMemDesc); +// fmsessionapiGetMemInterMapParams: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_fmsessionapiGetMemInterMapParams(struct FmSessionApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pParams); } -static NvU32 __nvoc_thunk_RsResource_fmsessionapiGetRefCount(struct FmSessionApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset)); +// fmsessionapiCheckMemInterUnmap: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_fmsessionapiCheckMemInterUnmap(struct FmSessionApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RsResource_fmsessionapiControlFilter(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pCallContext, pParams); +// fmsessionapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_fmsessionapiGetMemoryMappingDescriptor(struct FmSessionApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), ppMemDesc); } -static void __nvoc_thunk_RsResource_fmsessionapiAddAdditionalDependants(struct RsClient *pClient, struct FmSessionApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pReference); +// fmsessionapiControlSerialization_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_fmsessionapiControlSerialization_Prologue(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_fmsessionapiControlSerialization_Prologue(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pCallContext, pParams); +// fmsessionapiControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_fmsessionapiControlSerialization_Epilogue(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_fmsessionapiControl_Prologue(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pCallContext, pParams); +// fmsessionapiControl_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_fmsessionapiControl_Prologue(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_fmsessionapiCanCopy(struct FmSessionApi *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset)); +// fmsessionapiControl_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_fmsessionapiControl_Epilogue(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_fmsessionapiUnmap(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pCallContext, pCpuMapping); +// fmsessionapiCanCopy: virtual inherited (res) base (rmres) +static NvBool __nvoc_up_thunk_RsResource_fmsessionapiCanCopy(struct FmSessionApi *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_fmsessionapiIsPartialUnmapSupported(struct FmSessionApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset)); +// fmsessionapiIsDuplicate: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiIsDuplicate(struct FmSessionApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), hMemory, pDuplicate); } -static void __nvoc_thunk_RsResource_fmsessionapiPreDestruct(struct FmSessionApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset)); +// fmsessionapiPreDestruct: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_fmsessionapiPreDestruct(struct FmSessionApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_fmsessionapiMapTo(struct FmSessionApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pParams); +// fmsessionapiControl: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiControl(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_fmsessionapiIsDuplicate(struct FmSessionApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), hMemory, pDuplicate); +// fmsessionapiControlFilter: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiControlFilter(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RmResource_fmsessionapiControlSerialization_Epilogue(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pCallContext, pParams); +// fmsessionapiMap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiMap(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pCallContext, pParams, pCpuMapping); } -static void __nvoc_thunk_RmResource_fmsessionapiControl_Epilogue(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pCallContext, pParams); +// fmsessionapiUnmap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiUnmap(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_fmsessionapiUnmapFrom(struct FmSessionApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pParams); +// fmsessionapiIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body +static NvBool __nvoc_up_thunk_RsResource_fmsessionapiIsPartialUnmapSupported(struct FmSessionApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_fmsessionapiMap(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pCallContext, pParams, pCpuMapping); +// fmsessionapiMapTo: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiMapTo(struct FmSessionApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RmResource_fmsessionapiAccessCallback(struct FmSessionApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// fmsessionapiUnmapFrom: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiUnmapFrom(struct FmSessionApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pParams); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// fmsessionapiGetRefCount: virtual inherited (res) base (rmres) +static NvU32 __nvoc_up_thunk_RsResource_fmsessionapiGetRefCount(struct FmSessionApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset)); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_FmSessionApi[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) fmsessionapiCtrlCmdSetFmState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xf0101u, - /*paramSize=*/ 0, - /*pClassInfo=*/ &(__nvoc_class_def_FmSessionApi.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "fmsessionapiCtrlCmdSetFmState" -#endif - }, - { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) fmsessionapiCtrlCmdClearFmState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xf0102u, - /*paramSize=*/ 0, - /*pClassInfo=*/ &(__nvoc_class_def_FmSessionApi.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "fmsessionapiCtrlCmdClearFmState" -#endif - }, +// fmsessionapiAddAdditionalDependants: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_fmsessionapiAddAdditionalDependants(struct RsClient *pClient, struct FmSessionApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pReference); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_FmSessionApi = { @@ -243,61 +267,89 @@ NV_STATUS __nvoc_ctor_FmSessionApi(FmSessionApi *pThis, struct CALL_CONTEXT * ar return status; } +// Vtable initialization static void __nvoc_init_funcTable_FmSessionApi_1(FmSessionApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // fmsessionapiCtrlCmdSetFmState -- exported (id=0xf0101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__fmsessionapiCtrlCmdSetFmState__ = &fmsessionapiCtrlCmdSetFmState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // fmsessionapiCtrlCmdClearFmState -- exported (id=0xf0102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__fmsessionapiCtrlCmdClearFmState__ = &fmsessionapiCtrlCmdClearFmState_IMPL; #endif - pThis->__fmsessionapiShareCallback__ = &__nvoc_thunk_RmResource_fmsessionapiShareCallback; + // fmsessionapiAccessCallback -- virtual inherited (rmres) base (rmres) + pThis->__fmsessionapiAccessCallback__ = &__nvoc_up_thunk_RmResource_fmsessionapiAccessCallback; - pThis->__fmsessionapiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_fmsessionapiCheckMemInterUnmap; + // fmsessionapiShareCallback -- virtual inherited (rmres) base (rmres) + pThis->__fmsessionapiShareCallback__ = &__nvoc_up_thunk_RmResource_fmsessionapiShareCallback; - pThis->__fmsessionapiControl__ = &__nvoc_thunk_RsResource_fmsessionapiControl; + // fmsessionapiGetMemInterMapParams -- virtual inherited (rmres) base (rmres) + pThis->__fmsessionapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_fmsessionapiGetMemInterMapParams; - pThis->__fmsessionapiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_fmsessionapiGetMemInterMapParams; + // fmsessionapiCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) + pThis->__fmsessionapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_fmsessionapiCheckMemInterUnmap; - pThis->__fmsessionapiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_fmsessionapiGetMemoryMappingDescriptor; + // fmsessionapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) + pThis->__fmsessionapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_fmsessionapiGetMemoryMappingDescriptor; - pThis->__fmsessionapiGetRefCount__ = &__nvoc_thunk_RsResource_fmsessionapiGetRefCount; + // fmsessionapiControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__fmsessionapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_fmsessionapiControlSerialization_Prologue; - pThis->__fmsessionapiControlFilter__ = &__nvoc_thunk_RsResource_fmsessionapiControlFilter; + // fmsessionapiControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__fmsessionapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_fmsessionapiControlSerialization_Epilogue; - pThis->__fmsessionapiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_fmsessionapiAddAdditionalDependants; + // fmsessionapiControl_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__fmsessionapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_fmsessionapiControl_Prologue; - pThis->__fmsessionapiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_fmsessionapiControlSerialization_Prologue; + // fmsessionapiControl_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__fmsessionapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_fmsessionapiControl_Epilogue; - pThis->__fmsessionapiControl_Prologue__ = &__nvoc_thunk_RmResource_fmsessionapiControl_Prologue; + // fmsessionapiCanCopy -- virtual inherited (res) base (rmres) + pThis->__fmsessionapiCanCopy__ = &__nvoc_up_thunk_RsResource_fmsessionapiCanCopy; - pThis->__fmsessionapiCanCopy__ = &__nvoc_thunk_RsResource_fmsessionapiCanCopy; + // fmsessionapiIsDuplicate -- virtual inherited (res) base (rmres) + pThis->__fmsessionapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_fmsessionapiIsDuplicate; - pThis->__fmsessionapiUnmap__ = &__nvoc_thunk_RsResource_fmsessionapiUnmap; + // fmsessionapiPreDestruct -- virtual inherited (res) base (rmres) + pThis->__fmsessionapiPreDestruct__ = &__nvoc_up_thunk_RsResource_fmsessionapiPreDestruct; - pThis->__fmsessionapiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_fmsessionapiIsPartialUnmapSupported; + // fmsessionapiControl -- virtual inherited (res) base (rmres) + pThis->__fmsessionapiControl__ = &__nvoc_up_thunk_RsResource_fmsessionapiControl; - pThis->__fmsessionapiPreDestruct__ = &__nvoc_thunk_RsResource_fmsessionapiPreDestruct; + // fmsessionapiControlFilter -- virtual inherited (res) base (rmres) + pThis->__fmsessionapiControlFilter__ = &__nvoc_up_thunk_RsResource_fmsessionapiControlFilter; - pThis->__fmsessionapiMapTo__ = &__nvoc_thunk_RsResource_fmsessionapiMapTo; + // fmsessionapiMap -- virtual inherited (res) base (rmres) + pThis->__fmsessionapiMap__ = &__nvoc_up_thunk_RsResource_fmsessionapiMap; - pThis->__fmsessionapiIsDuplicate__ = &__nvoc_thunk_RsResource_fmsessionapiIsDuplicate; + // fmsessionapiUnmap -- virtual inherited (res) base (rmres) + pThis->__fmsessionapiUnmap__ = &__nvoc_up_thunk_RsResource_fmsessionapiUnmap; - pThis->__fmsessionapiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_fmsessionapiControlSerialization_Epilogue; + // fmsessionapiIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body + pThis->__fmsessionapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_fmsessionapiIsPartialUnmapSupported; - pThis->__fmsessionapiControl_Epilogue__ = &__nvoc_thunk_RmResource_fmsessionapiControl_Epilogue; + // fmsessionapiMapTo -- virtual inherited (res) base (rmres) + pThis->__fmsessionapiMapTo__ = &__nvoc_up_thunk_RsResource_fmsessionapiMapTo; - pThis->__fmsessionapiUnmapFrom__ = &__nvoc_thunk_RsResource_fmsessionapiUnmapFrom; + // fmsessionapiUnmapFrom -- virtual inherited (res) base (rmres) + pThis->__fmsessionapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_fmsessionapiUnmapFrom; - pThis->__fmsessionapiMap__ = &__nvoc_thunk_RsResource_fmsessionapiMap; + // fmsessionapiGetRefCount -- virtual inherited (res) base (rmres) + pThis->__fmsessionapiGetRefCount__ = &__nvoc_up_thunk_RsResource_fmsessionapiGetRefCount; - pThis->__fmsessionapiAccessCallback__ = &__nvoc_thunk_RmResource_fmsessionapiAccessCallback; -} + // fmsessionapiAddAdditionalDependants -- virtual inherited (res) base (rmres) + pThis->__fmsessionapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_fmsessionapiAddAdditionalDependants; +} // End __nvoc_init_funcTable_FmSessionApi_1 with approximately 23 basic block(s). + +// Initialize vtable(s) for 23 virtual method(s). void __nvoc_init_funcTable_FmSessionApi(FmSessionApi *pThis) { + + // Initialize vtable(s) with 23 per-object function pointer(s). __nvoc_init_funcTable_FmSessionApi_1(pThis); } diff --git a/src/nvidia/generated/g_fm_session_api_nvoc.h b/src/nvidia/generated/g_fm_session_api_nvoc.h index 497aaadacb..3873d3a6be 100644 --- a/src/nvidia/generated/g_fm_session_api_nvoc.h +++ b/src/nvidia/generated/g_fm_session_api_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_FM_SESSION_API_NVOC_H_ #define _G_FM_SESSION_API_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -36,6 +43,7 @@ extern "C" { * *****************************************************************************/ +#pragma once #include "g_fm_session_api_nvoc.h" #ifndef FM_SESSION_API_H @@ -73,37 +81,48 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct FmSessionApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct FmSessionApi *__nvoc_pbase_FmSessionApi; - NV_STATUS (*__fmsessionapiCtrlCmdSetFmState__)(struct FmSessionApi *); - NV_STATUS (*__fmsessionapiCtrlCmdClearFmState__)(struct FmSessionApi *); - NvBool (*__fmsessionapiShareCallback__)(struct FmSessionApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__fmsessionapiCheckMemInterUnmap__)(struct FmSessionApi *, NvBool); - NV_STATUS (*__fmsessionapiControl__)(struct FmSessionApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__fmsessionapiGetMemInterMapParams__)(struct FmSessionApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__fmsessionapiGetMemoryMappingDescriptor__)(struct FmSessionApi *, struct MEMORY_DESCRIPTOR **); - NvU32 (*__fmsessionapiGetRefCount__)(struct FmSessionApi *); - NV_STATUS (*__fmsessionapiControlFilter__)(struct FmSessionApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__fmsessionapiAddAdditionalDependants__)(struct RsClient *, struct FmSessionApi *, RsResourceRef *); - NV_STATUS (*__fmsessionapiControlSerialization_Prologue__)(struct FmSessionApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__fmsessionapiControl_Prologue__)(struct FmSessionApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__fmsessionapiCanCopy__)(struct FmSessionApi *); - NV_STATUS (*__fmsessionapiUnmap__)(struct FmSessionApi *, struct CALL_CONTEXT *, RsCpuMapping *); - NvBool (*__fmsessionapiIsPartialUnmapSupported__)(struct FmSessionApi *); - void (*__fmsessionapiPreDestruct__)(struct FmSessionApi *); - NV_STATUS (*__fmsessionapiMapTo__)(struct FmSessionApi *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__fmsessionapiIsDuplicate__)(struct FmSessionApi *, NvHandle, NvBool *); - void (*__fmsessionapiControlSerialization_Epilogue__)(struct FmSessionApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__fmsessionapiControl_Epilogue__)(struct FmSessionApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__fmsessionapiUnmapFrom__)(struct FmSessionApi *, RS_RES_UNMAP_FROM_PARAMS *); - NV_STATUS (*__fmsessionapiMap__)(struct FmSessionApi *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__fmsessionapiAccessCallback__)(struct FmSessionApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^3 + struct RsResource *__nvoc_pbase_RsResource; // res super^2 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^2 + struct RmResource *__nvoc_pbase_RmResource; // rmres super + struct FmSessionApi *__nvoc_pbase_FmSessionApi; // fmsessionapi + + // Vtable with 23 per-object function pointers + NV_STATUS (*__fmsessionapiCtrlCmdSetFmState__)(struct FmSessionApi * /*this*/); // exported (id=0xf0101) + NV_STATUS (*__fmsessionapiCtrlCmdClearFmState__)(struct FmSessionApi * /*this*/); // exported (id=0xf0102) + NvBool (*__fmsessionapiAccessCallback__)(struct FmSessionApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) + NvBool (*__fmsessionapiShareCallback__)(struct FmSessionApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__fmsessionapiGetMemInterMapParams__)(struct FmSessionApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__fmsessionapiCheckMemInterUnmap__)(struct FmSessionApi * /*this*/, NvBool); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__fmsessionapiGetMemoryMappingDescriptor__)(struct FmSessionApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__fmsessionapiControlSerialization_Prologue__)(struct FmSessionApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__fmsessionapiControlSerialization_Epilogue__)(struct FmSessionApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__fmsessionapiControl_Prologue__)(struct FmSessionApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__fmsessionapiControl_Epilogue__)(struct FmSessionApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NvBool (*__fmsessionapiCanCopy__)(struct FmSessionApi * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__fmsessionapiIsDuplicate__)(struct FmSessionApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (rmres) + void (*__fmsessionapiPreDestruct__)(struct FmSessionApi * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__fmsessionapiControl__)(struct FmSessionApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__fmsessionapiControlFilter__)(struct FmSessionApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__fmsessionapiMap__)(struct FmSessionApi * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NV_STATUS (*__fmsessionapiUnmap__)(struct FmSessionApi * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NvBool (*__fmsessionapiIsPartialUnmapSupported__)(struct FmSessionApi * /*this*/); // inline virtual inherited (res) base (rmres) body + NV_STATUS (*__fmsessionapiMapTo__)(struct FmSessionApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) + NV_STATUS (*__fmsessionapiUnmapFrom__)(struct FmSessionApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) + NvU32 (*__fmsessionapiGetRefCount__)(struct FmSessionApi * /*this*/); // virtual inherited (res) base (rmres) + void (*__fmsessionapiAddAdditionalDependants__)(struct RsClient *, struct FmSessionApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) + + // Data members NvU64 dupedCapDescriptor; }; @@ -116,6 +135,7 @@ typedef struct FmSessionApi FmSessionApi; #define __nvoc_class_id_FmSessionApi 0xdfbd08 #endif /* __nvoc_class_id_FmSessionApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_FmSessionApi; #define __staticCast_FmSessionApi(pThis) \ @@ -128,132 +148,158 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_FmSessionApi; ((FmSessionApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(FmSessionApi))) #endif //__nvoc_fm_session_api_h_disabled - NV_STATUS __nvoc_objCreateDynamic_FmSessionApi(FmSessionApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_FmSessionApi(FmSessionApi**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_FmSessionApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_FmSessionApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define fmsessionapiCtrlCmdSetFmState_FNPTR(pFmSessionApi) pFmSessionApi->__fmsessionapiCtrlCmdSetFmState__ #define fmsessionapiCtrlCmdSetFmState(pFmSessionApi) fmsessionapiCtrlCmdSetFmState_DISPATCH(pFmSessionApi) +#define fmsessionapiCtrlCmdClearFmState_FNPTR(pFmSessionApi) pFmSessionApi->__fmsessionapiCtrlCmdClearFmState__ #define fmsessionapiCtrlCmdClearFmState(pFmSessionApi) fmsessionapiCtrlCmdClearFmState_DISPATCH(pFmSessionApi) +#define fmsessionapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define fmsessionapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) fmsessionapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define fmsessionapiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ #define fmsessionapiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) fmsessionapiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define fmsessionapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) fmsessionapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define fmsessionapiControl(pResource, pCallContext, pParams) fmsessionapiControl_DISPATCH(pResource, pCallContext, pParams) +#define fmsessionapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define fmsessionapiGetMemInterMapParams(pRmResource, pParams) fmsessionapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define fmsessionapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define fmsessionapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) fmsessionapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define fmsessionapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define fmsessionapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) fmsessionapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define fmsessionapiGetRefCount(pResource) fmsessionapiGetRefCount_DISPATCH(pResource) -#define fmsessionapiControlFilter(pResource, pCallContext, pParams) fmsessionapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define fmsessionapiAddAdditionalDependants(pClient, pResource, pReference) fmsessionapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define fmsessionapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define fmsessionapiControlSerialization_Prologue(pResource, pCallContext, pParams) fmsessionapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define fmsessionapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define fmsessionapiControlSerialization_Epilogue(pResource, pCallContext, pParams) fmsessionapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define fmsessionapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ #define fmsessionapiControl_Prologue(pResource, pCallContext, pParams) fmsessionapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define fmsessionapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define fmsessionapiControl_Epilogue(pResource, pCallContext, pParams) fmsessionapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define fmsessionapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define fmsessionapiCanCopy(pResource) fmsessionapiCanCopy_DISPATCH(pResource) +#define fmsessionapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define fmsessionapiIsDuplicate(pResource, hMemory, pDuplicate) fmsessionapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define fmsessionapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define fmsessionapiPreDestruct(pResource) fmsessionapiPreDestruct_DISPATCH(pResource) +#define fmsessionapiControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define fmsessionapiControl(pResource, pCallContext, pParams) fmsessionapiControl_DISPATCH(pResource, pCallContext, pParams) +#define fmsessionapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define fmsessionapiControlFilter(pResource, pCallContext, pParams) fmsessionapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define fmsessionapiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define fmsessionapiMap(pResource, pCallContext, pParams, pCpuMapping) fmsessionapiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define fmsessionapiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ #define fmsessionapiUnmap(pResource, pCallContext, pCpuMapping) fmsessionapiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define fmsessionapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ #define fmsessionapiIsPartialUnmapSupported(pResource) fmsessionapiIsPartialUnmapSupported_DISPATCH(pResource) -#define fmsessionapiPreDestruct(pResource) fmsessionapiPreDestruct_DISPATCH(pResource) +#define fmsessionapiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ #define fmsessionapiMapTo(pResource, pParams) fmsessionapiMapTo_DISPATCH(pResource, pParams) -#define fmsessionapiIsDuplicate(pResource, hMemory, pDuplicate) fmsessionapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define fmsessionapiControlSerialization_Epilogue(pResource, pCallContext, pParams) fmsessionapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define fmsessionapiControl_Epilogue(pResource, pCallContext, pParams) fmsessionapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define fmsessionapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ #define fmsessionapiUnmapFrom(pResource, pParams) fmsessionapiUnmapFrom_DISPATCH(pResource, pParams) -#define fmsessionapiMap(pResource, pCallContext, pParams, pCpuMapping) fmsessionapiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define fmsessionapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) fmsessionapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS fmsessionapiCtrlCmdSetFmState_IMPL(struct FmSessionApi *pFmSessionApi); +#define fmsessionapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define fmsessionapiGetRefCount(pResource) fmsessionapiGetRefCount_DISPATCH(pResource) +#define fmsessionapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define fmsessionapiAddAdditionalDependants(pClient, pResource, pReference) fmsessionapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS fmsessionapiCtrlCmdSetFmState_DISPATCH(struct FmSessionApi *pFmSessionApi) { return pFmSessionApi->__fmsessionapiCtrlCmdSetFmState__(pFmSessionApi); } -NV_STATUS fmsessionapiCtrlCmdClearFmState_IMPL(struct FmSessionApi *pFmSessionApi); - static inline NV_STATUS fmsessionapiCtrlCmdClearFmState_DISPATCH(struct FmSessionApi *pFmSessionApi) { return pFmSessionApi->__fmsessionapiCtrlCmdClearFmState__(pFmSessionApi); } -static inline NvBool fmsessionapiShareCallback_DISPATCH(struct FmSessionApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__fmsessionapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS fmsessionapiCheckMemInterUnmap_DISPATCH(struct FmSessionApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__fmsessionapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NvBool fmsessionapiAccessCallback_DISPATCH(struct FmSessionApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__fmsessionapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS fmsessionapiControl_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__fmsessionapiControl__(pResource, pCallContext, pParams); +static inline NvBool fmsessionapiShareCallback_DISPATCH(struct FmSessionApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__fmsessionapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS fmsessionapiGetMemInterMapParams_DISPATCH(struct FmSessionApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__fmsessionapiGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS fmsessionapiGetMemoryMappingDescriptor_DISPATCH(struct FmSessionApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__fmsessionapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); -} - -static inline NvU32 fmsessionapiGetRefCount_DISPATCH(struct FmSessionApi *pResource) { - return pResource->__fmsessionapiGetRefCount__(pResource); -} - -static inline NV_STATUS fmsessionapiControlFilter_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__fmsessionapiControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS fmsessionapiCheckMemInterUnmap_DISPATCH(struct FmSessionApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__fmsessionapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline void fmsessionapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct FmSessionApi *pResource, RsResourceRef *pReference) { - pResource->__fmsessionapiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS fmsessionapiGetMemoryMappingDescriptor_DISPATCH(struct FmSessionApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__fmsessionapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS fmsessionapiControlSerialization_Prologue_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__fmsessionapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void fmsessionapiControlSerialization_Epilogue_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__fmsessionapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + static inline NV_STATUS fmsessionapiControl_Prologue_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__fmsessionapiControl_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool fmsessionapiCanCopy_DISPATCH(struct FmSessionApi *pResource) { - return pResource->__fmsessionapiCanCopy__(pResource); +static inline void fmsessionapiControl_Epilogue_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__fmsessionapiControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS fmsessionapiUnmap_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__fmsessionapiUnmap__(pResource, pCallContext, pCpuMapping); +static inline NvBool fmsessionapiCanCopy_DISPATCH(struct FmSessionApi *pResource) { + return pResource->__fmsessionapiCanCopy__(pResource); } -static inline NvBool fmsessionapiIsPartialUnmapSupported_DISPATCH(struct FmSessionApi *pResource) { - return pResource->__fmsessionapiIsPartialUnmapSupported__(pResource); +static inline NV_STATUS fmsessionapiIsDuplicate_DISPATCH(struct FmSessionApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__fmsessionapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void fmsessionapiPreDestruct_DISPATCH(struct FmSessionApi *pResource) { pResource->__fmsessionapiPreDestruct__(pResource); } -static inline NV_STATUS fmsessionapiMapTo_DISPATCH(struct FmSessionApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__fmsessionapiMapTo__(pResource, pParams); +static inline NV_STATUS fmsessionapiControl_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__fmsessionapiControl__(pResource, pCallContext, pParams); } -static inline NV_STATUS fmsessionapiIsDuplicate_DISPATCH(struct FmSessionApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__fmsessionapiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS fmsessionapiControlFilter_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__fmsessionapiControlFilter__(pResource, pCallContext, pParams); } -static inline void fmsessionapiControlSerialization_Epilogue_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__fmsessionapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS fmsessionapiMap_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__fmsessionapiMap__(pResource, pCallContext, pParams, pCpuMapping); } -static inline void fmsessionapiControl_Epilogue_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__fmsessionapiControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS fmsessionapiUnmap_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pResource->__fmsessionapiUnmap__(pResource, pCallContext, pCpuMapping); +} + +static inline NvBool fmsessionapiIsPartialUnmapSupported_DISPATCH(struct FmSessionApi *pResource) { + return pResource->__fmsessionapiIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS fmsessionapiMapTo_DISPATCH(struct FmSessionApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__fmsessionapiMapTo__(pResource, pParams); } static inline NV_STATUS fmsessionapiUnmapFrom_DISPATCH(struct FmSessionApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return pResource->__fmsessionapiUnmapFrom__(pResource, pParams); } -static inline NV_STATUS fmsessionapiMap_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__fmsessionapiMap__(pResource, pCallContext, pParams, pCpuMapping); +static inline NvU32 fmsessionapiGetRefCount_DISPATCH(struct FmSessionApi *pResource) { + return pResource->__fmsessionapiGetRefCount__(pResource); } -static inline NvBool fmsessionapiAccessCallback_DISPATCH(struct FmSessionApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__fmsessionapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline void fmsessionapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct FmSessionApi *pResource, RsResourceRef *pReference) { + pResource->__fmsessionapiAddAdditionalDependants__(pClient, pResource, pReference); } +NV_STATUS fmsessionapiCtrlCmdSetFmState_IMPL(struct FmSessionApi *pFmSessionApi); + +NV_STATUS fmsessionapiCtrlCmdClearFmState_IMPL(struct FmSessionApi *pFmSessionApi); + NV_STATUS fmsessionapiConstruct_IMPL(struct FmSessionApi *arg_pFmSessionApi, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_fmsessionapiConstruct(arg_pFmSessionApi, arg_pCallContext, arg_pParams) fmsessionapiConstruct_IMPL(arg_pFmSessionApi, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_generic_engine_nvoc.c b/src/nvidia/generated/g_generic_engine_nvoc.c index 8355fe819a..e1e46c1b6d 100644 --- a/src/nvidia/generated/g_generic_engine_nvoc.c +++ b/src/nvidia/generated/g_generic_engine_nvoc.c @@ -93,159 +93,190 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_GenericEngineApi = /*pExportInfo=*/ &__nvoc_export_info_GenericEngineApi }; -static NV_STATUS __nvoc_thunk_GenericEngineApi_gpuresMap(struct GpuResource *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return genapiMap((struct GenericEngineApi *)(((unsigned char *)pGenericEngineApi) - __nvoc_rtti_GenericEngineApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NV_STATUS __nvoc_thunk_GenericEngineApi_gpuresGetMapAddrSpace(struct GpuResource *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return genapiGetMapAddrSpace((struct GenericEngineApi *)(((unsigned char *)pGenericEngineApi) - __nvoc_rtti_GenericEngineApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GenericEngineApi[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) genapiCtrlCmdMasterGetErrorIntrOffsetMask_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x90e60101u, + /*paramSize=*/ sizeof(NV90E6_CTRL_MASTER_GET_ERROR_INTR_OFFSET_MASK_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_GenericEngineApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "genapiCtrlCmdMasterGetErrorIntrOffsetMask" +#endif + }, + { /* [1] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x90e60102u, + /*paramSize=*/ sizeof(NV90E6_CTRL_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_GenericEngineApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask" +#endif + }, + { /* [2] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x58u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) genapiCtrlCmdBBXGetLastFlushTime_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x58u) + /*flags=*/ 0x58u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x90e70113u, + /*paramSize=*/ sizeof(NV90E7_CTRL_BBX_GET_LAST_FLUSH_TIME_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_GenericEngineApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "genapiCtrlCmdBBXGetLastFlushTime" +#endif + }, + +}; -static NV_STATUS __nvoc_thunk_GenericEngineApi_gpuresControl(struct GpuResource *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return genapiControl((struct GenericEngineApi *)(((unsigned char *)pGenericEngineApi) - __nvoc_rtti_GenericEngineApi_GpuResource.offset), pCallContext, pParams); +// 3 down-thunk(s) defined to bridge methods in GenericEngineApi from superclasses + +// genapiMap: virtual override (res) base (gpures) +static NV_STATUS __nvoc_down_thunk_GenericEngineApi_gpuresMap(struct GpuResource *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return genapiMap((struct GenericEngineApi *)(((unsigned char *) pGenericEngineApi) - __nvoc_rtti_GenericEngineApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NvBool __nvoc_thunk_GpuResource_genapiShareCallback(struct GenericEngineApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_GenericEngineApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// genapiGetMapAddrSpace: virtual override (gpures) base (gpures) +static NV_STATUS __nvoc_down_thunk_GenericEngineApi_gpuresGetMapAddrSpace(struct GpuResource *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return genapiGetMapAddrSpace((struct GenericEngineApi *)(((unsigned char *) pGenericEngineApi) - __nvoc_rtti_GenericEngineApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_RmResource_genapiCheckMemInterUnmap(struct GenericEngineApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), bSubdeviceHandleProvided); +// genapiControl: virtual override (res) base (gpures) +static NV_STATUS __nvoc_down_thunk_GenericEngineApi_gpuresControl(struct GpuResource *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return genapiControl((struct GenericEngineApi *)(((unsigned char *) pGenericEngineApi) - __nvoc_rtti_GenericEngineApi_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_genapiMapTo(struct GenericEngineApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset), pParams); + +// 22 up-thunk(s) defined to bridge methods in GenericEngineApi to superclasses + +// genapiUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_genapiUnmap(struct GenericEngineApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GenericEngineApi_GpuResource.offset), pCallContext, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_genapiGetRefCount(struct GenericEngineApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset)); +// genapiShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_genapiShareCallback(struct GenericEngineApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GenericEngineApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static void __nvoc_thunk_RsResource_genapiAddAdditionalDependants(struct RsClient *pClient, struct GenericEngineApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset), pReference); +// genapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_genapiGetRegBaseOffsetAndSize(struct GenericEngineApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GenericEngineApi_GpuResource.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_RmResource_genapiControl_Prologue(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), pCallContext, pParams); +// genapiInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_genapiInternalControlForward(struct GenericEngineApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GenericEngineApi_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_GpuResource_genapiGetRegBaseOffsetAndSize(struct GenericEngineApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_GenericEngineApi_GpuResource.offset), pGpu, pOffset, pSize); +// genapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_genapiGetInternalObjectHandle(struct GenericEngineApi *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GenericEngineApi_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_genapiInternalControlForward(struct GenericEngineApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_GenericEngineApi_GpuResource.offset), command, pParams, size); +// genapiAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_genapiAccessCallback(struct GenericEngineApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RsResource_genapiUnmapFrom(struct GenericEngineApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset), pParams); +// genapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_genapiGetMemInterMapParams(struct GenericEngineApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), pParams); } -static void __nvoc_thunk_RmResource_genapiControl_Epilogue(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), pCallContext, pParams); +// genapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_genapiCheckMemInterUnmap(struct GenericEngineApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), bSubdeviceHandleProvided); } -static NvHandle __nvoc_thunk_GpuResource_genapiGetInternalObjectHandle(struct GenericEngineApi *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_GenericEngineApi_GpuResource.offset)); +// genapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_genapiGetMemoryMappingDescriptor(struct GenericEngineApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_GpuResource_genapiUnmap(struct GenericEngineApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_GenericEngineApi_GpuResource.offset), pCallContext, pCpuMapping); +// genapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_genapiControlSerialization_Prologue(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_genapiGetMemInterMapParams(struct GenericEngineApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), pParams); +// genapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_genapiControlSerialization_Epilogue(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_genapiGetMemoryMappingDescriptor(struct GenericEngineApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), ppMemDesc); +// genapiControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_genapiControl_Prologue(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_genapiControlFilter(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset), pCallContext, pParams); +// genapiControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_genapiControl_Epilogue(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_genapiControlSerialization_Prologue(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), pCallContext, pParams); +// genapiCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_genapiCanCopy(struct GenericEngineApi *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_genapiCanCopy(struct GenericEngineApi *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset)); +// genapiIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_genapiIsDuplicate(struct GenericEngineApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_RsResource_genapiIsPartialUnmapSupported(struct GenericEngineApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset)); +// genapiPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_genapiPreDestruct(struct GenericEngineApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset)); } -static void __nvoc_thunk_RsResource_genapiPreDestruct(struct GenericEngineApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset)); +// genapiControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_genapiControlFilter(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_genapiIsDuplicate(struct GenericEngineApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset), hMemory, pDuplicate); +// genapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_genapiIsPartialUnmapSupported(struct GenericEngineApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset)); } -static void __nvoc_thunk_RmResource_genapiControlSerialization_Epilogue(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), pCallContext, pParams); +// genapiMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_genapiMapTo(struct GenericEngineApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RmResource_genapiAccessCallback(struct GenericEngineApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// genapiUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_genapiUnmapFrom(struct GenericEngineApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset), pParams); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// genapiGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_genapiGetRefCount(struct GenericEngineApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset)); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GenericEngineApi[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) genapiCtrlCmdMasterGetErrorIntrOffsetMask_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x90e60101u, - /*paramSize=*/ sizeof(NV90E6_CTRL_MASTER_GET_ERROR_INTR_OFFSET_MASK_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_GenericEngineApi.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "genapiCtrlCmdMasterGetErrorIntrOffsetMask" -#endif - }, - { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x90e60102u, - /*paramSize=*/ sizeof(NV90E6_CTRL_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_GenericEngineApi.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask" -#endif - }, - { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x250u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) genapiCtrlCmdBBXGetLastFlushTime_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x250u) - /*flags=*/ 0x250u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x90e70113u, - /*paramSize=*/ sizeof(NV90E7_CTRL_BBX_GET_LAST_FLUSH_TIME_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_GenericEngineApi.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "genapiCtrlCmdBBXGetLastFlushTime" -#endif - }, +// genapiAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_genapiAddAdditionalDependants(struct RsClient *pClient, struct GenericEngineApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset), pReference); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_GenericEngineApi = { @@ -283,79 +314,109 @@ NV_STATUS __nvoc_ctor_GenericEngineApi(GenericEngineApi *pThis, struct CALL_CONT return status; } +// Vtable initialization static void __nvoc_init_funcTable_GenericEngineApi_1(GenericEngineApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // genapiMap -- virtual override (res) base (gpures) pThis->__genapiMap__ = &genapiMap_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresMap__ = &__nvoc_down_thunk_GenericEngineApi_gpuresMap; + // genapiGetMapAddrSpace -- virtual override (gpures) base (gpures) pThis->__genapiGetMapAddrSpace__ = &genapiGetMapAddrSpace_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_down_thunk_GenericEngineApi_gpuresGetMapAddrSpace; + // genapiControl -- virtual override (res) base (gpures) pThis->__genapiControl__ = &genapiControl_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresControl__ = &__nvoc_down_thunk_GenericEngineApi_gpuresControl; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // genapiCtrlCmdMasterGetErrorIntrOffsetMask -- exported (id=0x90e60101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__genapiCtrlCmdMasterGetErrorIntrOffsetMask__ = &genapiCtrlCmdMasterGetErrorIntrOffsetMask_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask -- exported (id=0x90e60102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask__ = &genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x250u) + // genapiCtrlCmdBBXGetLastFlushTime -- exported (id=0x90e70113) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x58u) pThis->__genapiCtrlCmdBBXGetLastFlushTime__ = &genapiCtrlCmdBBXGetLastFlushTime_IMPL; #endif - pThis->__nvoc_base_GpuResource.__gpuresMap__ = &__nvoc_thunk_GenericEngineApi_gpuresMap; - - pThis->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_thunk_GenericEngineApi_gpuresGetMapAddrSpace; + // genapiUnmap -- virtual inherited (gpures) base (gpures) + pThis->__genapiUnmap__ = &__nvoc_up_thunk_GpuResource_genapiUnmap; - pThis->__nvoc_base_GpuResource.__gpuresControl__ = &__nvoc_thunk_GenericEngineApi_gpuresControl; + // genapiShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__genapiShareCallback__ = &__nvoc_up_thunk_GpuResource_genapiShareCallback; - pThis->__genapiShareCallback__ = &__nvoc_thunk_GpuResource_genapiShareCallback; + // genapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__genapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_genapiGetRegBaseOffsetAndSize; - pThis->__genapiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_genapiCheckMemInterUnmap; + // genapiInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__genapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_genapiInternalControlForward; - pThis->__genapiMapTo__ = &__nvoc_thunk_RsResource_genapiMapTo; + // genapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__genapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_genapiGetInternalObjectHandle; - pThis->__genapiGetRefCount__ = &__nvoc_thunk_RsResource_genapiGetRefCount; + // genapiAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__genapiAccessCallback__ = &__nvoc_up_thunk_RmResource_genapiAccessCallback; - pThis->__genapiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_genapiAddAdditionalDependants; + // genapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__genapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_genapiGetMemInterMapParams; - pThis->__genapiControl_Prologue__ = &__nvoc_thunk_RmResource_genapiControl_Prologue; + // genapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__genapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_genapiCheckMemInterUnmap; - pThis->__genapiGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_genapiGetRegBaseOffsetAndSize; + // genapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__genapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_genapiGetMemoryMappingDescriptor; - pThis->__genapiInternalControlForward__ = &__nvoc_thunk_GpuResource_genapiInternalControlForward; + // genapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__genapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_genapiControlSerialization_Prologue; - pThis->__genapiUnmapFrom__ = &__nvoc_thunk_RsResource_genapiUnmapFrom; + // genapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__genapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_genapiControlSerialization_Epilogue; - pThis->__genapiControl_Epilogue__ = &__nvoc_thunk_RmResource_genapiControl_Epilogue; + // genapiControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__genapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_genapiControl_Prologue; - pThis->__genapiGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_genapiGetInternalObjectHandle; + // genapiControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__genapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_genapiControl_Epilogue; - pThis->__genapiUnmap__ = &__nvoc_thunk_GpuResource_genapiUnmap; + // genapiCanCopy -- virtual inherited (res) base (gpures) + pThis->__genapiCanCopy__ = &__nvoc_up_thunk_RsResource_genapiCanCopy; - pThis->__genapiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_genapiGetMemInterMapParams; + // genapiIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__genapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_genapiIsDuplicate; - pThis->__genapiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_genapiGetMemoryMappingDescriptor; + // genapiPreDestruct -- virtual inherited (res) base (gpures) + pThis->__genapiPreDestruct__ = &__nvoc_up_thunk_RsResource_genapiPreDestruct; - pThis->__genapiControlFilter__ = &__nvoc_thunk_RsResource_genapiControlFilter; + // genapiControlFilter -- virtual inherited (res) base (gpures) + pThis->__genapiControlFilter__ = &__nvoc_up_thunk_RsResource_genapiControlFilter; - pThis->__genapiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_genapiControlSerialization_Prologue; + // genapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__genapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_genapiIsPartialUnmapSupported; - pThis->__genapiCanCopy__ = &__nvoc_thunk_RsResource_genapiCanCopy; + // genapiMapTo -- virtual inherited (res) base (gpures) + pThis->__genapiMapTo__ = &__nvoc_up_thunk_RsResource_genapiMapTo; - pThis->__genapiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_genapiIsPartialUnmapSupported; + // genapiUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__genapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_genapiUnmapFrom; - pThis->__genapiPreDestruct__ = &__nvoc_thunk_RsResource_genapiPreDestruct; + // genapiGetRefCount -- virtual inherited (res) base (gpures) + pThis->__genapiGetRefCount__ = &__nvoc_up_thunk_RsResource_genapiGetRefCount; - pThis->__genapiIsDuplicate__ = &__nvoc_thunk_RsResource_genapiIsDuplicate; + // genapiAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__genapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_genapiAddAdditionalDependants; +} // End __nvoc_init_funcTable_GenericEngineApi_1 with approximately 31 basic block(s). - pThis->__genapiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_genapiControlSerialization_Epilogue; - - pThis->__genapiAccessCallback__ = &__nvoc_thunk_RmResource_genapiAccessCallback; -} +// Initialize vtable(s) for 28 virtual method(s). void __nvoc_init_funcTable_GenericEngineApi(GenericEngineApi *pThis) { + + // Initialize vtable(s) with 28 per-object function pointer(s). __nvoc_init_funcTable_GenericEngineApi_1(pThis); } diff --git a/src/nvidia/generated/g_generic_engine_nvoc.h b/src/nvidia/generated/g_generic_engine_nvoc.h index 01c9f3ee34..6df7c04736 100644 --- a/src/nvidia/generated/g_generic_engine_nvoc.h +++ b/src/nvidia/generated/g_generic_engine_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_GENERIC_ENGINE_NVOC_H_ #define _G_GENERIC_ENGINE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_generic_engine_nvoc.h" #ifndef _GENERICENGINEAPI_H_ @@ -53,43 +61,52 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct GenericEngineApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct GenericEngineApi *__nvoc_pbase_GenericEngineApi; - NV_STATUS (*__genapiMap__)(struct GenericEngineApi *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NV_STATUS (*__genapiGetMapAddrSpace__)(struct GenericEngineApi *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NV_STATUS (*__genapiControl__)(struct GenericEngineApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__genapiCtrlCmdMasterGetErrorIntrOffsetMask__)(struct GenericEngineApi *, NV90E6_CTRL_MASTER_GET_ERROR_INTR_OFFSET_MASK_PARAMS *); - NV_STATUS (*__genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask__)(struct GenericEngineApi *, NV90E6_CTRL_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK_PARAMS *); - NV_STATUS (*__genapiCtrlCmdBBXGetLastFlushTime__)(struct GenericEngineApi *, NV90E7_CTRL_BBX_GET_LAST_FLUSH_TIME_PARAMS *); - NvBool (*__genapiShareCallback__)(struct GenericEngineApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__genapiCheckMemInterUnmap__)(struct GenericEngineApi *, NvBool); - NV_STATUS (*__genapiMapTo__)(struct GenericEngineApi *, RS_RES_MAP_TO_PARAMS *); - NvU32 (*__genapiGetRefCount__)(struct GenericEngineApi *); - void (*__genapiAddAdditionalDependants__)(struct RsClient *, struct GenericEngineApi *, RsResourceRef *); - NV_STATUS (*__genapiControl_Prologue__)(struct GenericEngineApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__genapiGetRegBaseOffsetAndSize__)(struct GenericEngineApi *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__genapiInternalControlForward__)(struct GenericEngineApi *, NvU32, void *, NvU32); - NV_STATUS (*__genapiUnmapFrom__)(struct GenericEngineApi *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__genapiControl_Epilogue__)(struct GenericEngineApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__genapiGetInternalObjectHandle__)(struct GenericEngineApi *); - NV_STATUS (*__genapiUnmap__)(struct GenericEngineApi *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__genapiGetMemInterMapParams__)(struct GenericEngineApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__genapiGetMemoryMappingDescriptor__)(struct GenericEngineApi *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__genapiControlFilter__)(struct GenericEngineApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__genapiControlSerialization_Prologue__)(struct GenericEngineApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__genapiCanCopy__)(struct GenericEngineApi *); - NvBool (*__genapiIsPartialUnmapSupported__)(struct GenericEngineApi *); - void (*__genapiPreDestruct__)(struct GenericEngineApi *); - NV_STATUS (*__genapiIsDuplicate__)(struct GenericEngineApi *, NvHandle, NvBool *); - void (*__genapiControlSerialization_Epilogue__)(struct GenericEngineApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__genapiAccessCallback__)(struct GenericEngineApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct GenericEngineApi *__nvoc_pbase_GenericEngineApi; // genapi + + // Vtable with 28 per-object function pointers + NV_STATUS (*__genapiMap__)(struct GenericEngineApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual override (res) base (gpures) + NV_STATUS (*__genapiGetMapAddrSpace__)(struct GenericEngineApi * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (gpures) base (gpures) + NV_STATUS (*__genapiControl__)(struct GenericEngineApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) + NV_STATUS (*__genapiCtrlCmdMasterGetErrorIntrOffsetMask__)(struct GenericEngineApi * /*this*/, NV90E6_CTRL_MASTER_GET_ERROR_INTR_OFFSET_MASK_PARAMS *); // exported (id=0x90e60101) + NV_STATUS (*__genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask__)(struct GenericEngineApi * /*this*/, NV90E6_CTRL_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK_PARAMS *); // exported (id=0x90e60102) + NV_STATUS (*__genapiCtrlCmdBBXGetLastFlushTime__)(struct GenericEngineApi * /*this*/, NV90E7_CTRL_BBX_GET_LAST_FLUSH_TIME_PARAMS *); // exported (id=0x90e70113) + NV_STATUS (*__genapiUnmap__)(struct GenericEngineApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__genapiShareCallback__)(struct GenericEngineApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__genapiGetRegBaseOffsetAndSize__)(struct GenericEngineApi * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__genapiInternalControlForward__)(struct GenericEngineApi * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__genapiGetInternalObjectHandle__)(struct GenericEngineApi * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__genapiAccessCallback__)(struct GenericEngineApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__genapiGetMemInterMapParams__)(struct GenericEngineApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__genapiCheckMemInterUnmap__)(struct GenericEngineApi * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__genapiGetMemoryMappingDescriptor__)(struct GenericEngineApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__genapiControlSerialization_Prologue__)(struct GenericEngineApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__genapiControlSerialization_Epilogue__)(struct GenericEngineApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__genapiControl_Prologue__)(struct GenericEngineApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__genapiControl_Epilogue__)(struct GenericEngineApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__genapiCanCopy__)(struct GenericEngineApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__genapiIsDuplicate__)(struct GenericEngineApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__genapiPreDestruct__)(struct GenericEngineApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__genapiControlFilter__)(struct GenericEngineApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__genapiIsPartialUnmapSupported__)(struct GenericEngineApi * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__genapiMapTo__)(struct GenericEngineApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__genapiUnmapFrom__)(struct GenericEngineApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__genapiGetRefCount__)(struct GenericEngineApi * /*this*/); // virtual inherited (res) base (gpures) + void (*__genapiAddAdditionalDependants__)(struct RsClient *, struct GenericEngineApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) }; #ifndef __NVOC_CLASS_GenericEngineApi_TYPEDEF__ @@ -101,6 +118,7 @@ typedef struct GenericEngineApi GenericEngineApi; #define __nvoc_class_id_GenericEngineApi 0x4bc329 #endif /* __nvoc_class_id_GenericEngineApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_GenericEngineApi; #define __staticCast_GenericEngineApi(pThis) \ @@ -113,99 +131,102 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_GenericEngineApi; ((GenericEngineApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(GenericEngineApi))) #endif //__nvoc_generic_engine_h_disabled - NV_STATUS __nvoc_objCreateDynamic_GenericEngineApi(GenericEngineApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_GenericEngineApi(GenericEngineApi**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_GenericEngineApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_GenericEngineApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define genapiMap_FNPTR(pGenericEngineApi) pGenericEngineApi->__genapiMap__ #define genapiMap(pGenericEngineApi, pCallContext, pParams, pCpuMapping) genapiMap_DISPATCH(pGenericEngineApi, pCallContext, pParams, pCpuMapping) +#define genapiGetMapAddrSpace_FNPTR(pGenericEngineApi) pGenericEngineApi->__genapiGetMapAddrSpace__ #define genapiGetMapAddrSpace(pGenericEngineApi, pCallContext, mapFlags, pAddrSpace) genapiGetMapAddrSpace_DISPATCH(pGenericEngineApi, pCallContext, mapFlags, pAddrSpace) +#define genapiControl_FNPTR(pGenericEngineApi) pGenericEngineApi->__genapiControl__ #define genapiControl(pGenericEngineApi, pCallContext, pParams) genapiControl_DISPATCH(pGenericEngineApi, pCallContext, pParams) +#define genapiCtrlCmdMasterGetErrorIntrOffsetMask_FNPTR(pGenericEngineApi) pGenericEngineApi->__genapiCtrlCmdMasterGetErrorIntrOffsetMask__ #define genapiCtrlCmdMasterGetErrorIntrOffsetMask(pGenericEngineApi, pParams) genapiCtrlCmdMasterGetErrorIntrOffsetMask_DISPATCH(pGenericEngineApi, pParams) +#define genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask_FNPTR(pGenericEngineApi) pGenericEngineApi->__genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask__ #define genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask(pGenericEngineApi, pParams) genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask_DISPATCH(pGenericEngineApi, pParams) +#define genapiCtrlCmdBBXGetLastFlushTime_FNPTR(pGenericEngineApi) pGenericEngineApi->__genapiCtrlCmdBBXGetLastFlushTime__ #define genapiCtrlCmdBBXGetLastFlushTime(pGenericEngineApi, pParams) genapiCtrlCmdBBXGetLastFlushTime_DISPATCH(pGenericEngineApi, pParams) +#define genapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define genapiUnmap(pGpuResource, pCallContext, pCpuMapping) genapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define genapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define genapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) genapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define genapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) genapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define genapiMapTo(pResource, pParams) genapiMapTo_DISPATCH(pResource, pParams) -#define genapiGetRefCount(pResource) genapiGetRefCount_DISPATCH(pResource) -#define genapiAddAdditionalDependants(pClient, pResource, pReference) genapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define genapiControl_Prologue(pResource, pCallContext, pParams) genapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define genapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define genapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) genapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define genapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define genapiInternalControlForward(pGpuResource, command, pParams, size) genapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define genapiUnmapFrom(pResource, pParams) genapiUnmapFrom_DISPATCH(pResource, pParams) -#define genapiControl_Epilogue(pResource, pCallContext, pParams) genapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define genapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define genapiGetInternalObjectHandle(pGpuResource) genapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define genapiUnmap(pGpuResource, pCallContext, pCpuMapping) genapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define genapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define genapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) genapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define genapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define genapiGetMemInterMapParams(pRmResource, pParams) genapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define genapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define genapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) genapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define genapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define genapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) genapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define genapiControlFilter(pResource, pCallContext, pParams) genapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define genapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define genapiControlSerialization_Prologue(pResource, pCallContext, pParams) genapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define genapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define genapiControlSerialization_Epilogue(pResource, pCallContext, pParams) genapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define genapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define genapiControl_Prologue(pResource, pCallContext, pParams) genapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define genapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define genapiControl_Epilogue(pResource, pCallContext, pParams) genapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define genapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define genapiCanCopy(pResource) genapiCanCopy_DISPATCH(pResource) -#define genapiIsPartialUnmapSupported(pResource) genapiIsPartialUnmapSupported_DISPATCH(pResource) -#define genapiPreDestruct(pResource) genapiPreDestruct_DISPATCH(pResource) +#define genapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define genapiIsDuplicate(pResource, hMemory, pDuplicate) genapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define genapiControlSerialization_Epilogue(pResource, pCallContext, pParams) genapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define genapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) genapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS genapiMap_IMPL(struct GenericEngineApi *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); +#define genapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define genapiPreDestruct(pResource) genapiPreDestruct_DISPATCH(pResource) +#define genapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define genapiControlFilter(pResource, pCallContext, pParams) genapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define genapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define genapiIsPartialUnmapSupported(pResource) genapiIsPartialUnmapSupported_DISPATCH(pResource) +#define genapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define genapiMapTo(pResource, pParams) genapiMapTo_DISPATCH(pResource, pParams) +#define genapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define genapiUnmapFrom(pResource, pParams) genapiUnmapFrom_DISPATCH(pResource, pParams) +#define genapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define genapiGetRefCount(pResource) genapiGetRefCount_DISPATCH(pResource) +#define genapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define genapiAddAdditionalDependants(pClient, pResource, pReference) genapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS genapiMap_DISPATCH(struct GenericEngineApi *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return pGenericEngineApi->__genapiMap__(pGenericEngineApi, pCallContext, pParams, pCpuMapping); } -NV_STATUS genapiGetMapAddrSpace_IMPL(struct GenericEngineApi *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); - static inline NV_STATUS genapiGetMapAddrSpace_DISPATCH(struct GenericEngineApi *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGenericEngineApi->__genapiGetMapAddrSpace__(pGenericEngineApi, pCallContext, mapFlags, pAddrSpace); } -NV_STATUS genapiControl_IMPL(struct GenericEngineApi *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline NV_STATUS genapiControl_DISPATCH(struct GenericEngineApi *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pGenericEngineApi->__genapiControl__(pGenericEngineApi, pCallContext, pParams); } -NV_STATUS genapiCtrlCmdMasterGetErrorIntrOffsetMask_IMPL(struct GenericEngineApi *pGenericEngineApi, NV90E6_CTRL_MASTER_GET_ERROR_INTR_OFFSET_MASK_PARAMS *pParams); - static inline NV_STATUS genapiCtrlCmdMasterGetErrorIntrOffsetMask_DISPATCH(struct GenericEngineApi *pGenericEngineApi, NV90E6_CTRL_MASTER_GET_ERROR_INTR_OFFSET_MASK_PARAMS *pParams) { return pGenericEngineApi->__genapiCtrlCmdMasterGetErrorIntrOffsetMask__(pGenericEngineApi, pParams); } -NV_STATUS genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask_IMPL(struct GenericEngineApi *pGenericEngineApi, NV90E6_CTRL_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK_PARAMS *pParams); - static inline NV_STATUS genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask_DISPATCH(struct GenericEngineApi *pGenericEngineApi, NV90E6_CTRL_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK_PARAMS *pParams) { return pGenericEngineApi->__genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask__(pGenericEngineApi, pParams); } -NV_STATUS genapiCtrlCmdBBXGetLastFlushTime_IMPL(struct GenericEngineApi *pGenericEngineApi, NV90E7_CTRL_BBX_GET_LAST_FLUSH_TIME_PARAMS *pParams); - static inline NV_STATUS genapiCtrlCmdBBXGetLastFlushTime_DISPATCH(struct GenericEngineApi *pGenericEngineApi, NV90E7_CTRL_BBX_GET_LAST_FLUSH_TIME_PARAMS *pParams) { return pGenericEngineApi->__genapiCtrlCmdBBXGetLastFlushTime__(pGenericEngineApi, pParams); } -static inline NvBool genapiShareCallback_DISPATCH(struct GenericEngineApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__genapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS genapiCheckMemInterUnmap_DISPATCH(struct GenericEngineApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__genapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); -} - -static inline NV_STATUS genapiMapTo_DISPATCH(struct GenericEngineApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__genapiMapTo__(pResource, pParams); -} - -static inline NvU32 genapiGetRefCount_DISPATCH(struct GenericEngineApi *pResource) { - return pResource->__genapiGetRefCount__(pResource); -} - -static inline void genapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct GenericEngineApi *pResource, RsResourceRef *pReference) { - pResource->__genapiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS genapiUnmap_DISPATCH(struct GenericEngineApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__genapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS genapiControl_Prologue_DISPATCH(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__genapiControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool genapiShareCallback_DISPATCH(struct GenericEngineApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__genapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS genapiGetRegBaseOffsetAndSize_DISPATCH(struct GenericEngineApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { @@ -216,62 +237,90 @@ static inline NV_STATUS genapiInternalControlForward_DISPATCH(struct GenericEngi return pGpuResource->__genapiInternalControlForward__(pGpuResource, command, pParams, size); } -static inline NV_STATUS genapiUnmapFrom_DISPATCH(struct GenericEngineApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__genapiUnmapFrom__(pResource, pParams); -} - -static inline void genapiControl_Epilogue_DISPATCH(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__genapiControl_Epilogue__(pResource, pCallContext, pParams); -} - static inline NvHandle genapiGetInternalObjectHandle_DISPATCH(struct GenericEngineApi *pGpuResource) { return pGpuResource->__genapiGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS genapiUnmap_DISPATCH(struct GenericEngineApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__genapiUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool genapiAccessCallback_DISPATCH(struct GenericEngineApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__genapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS genapiGetMemInterMapParams_DISPATCH(struct GenericEngineApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__genapiGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS genapiGetMemoryMappingDescriptor_DISPATCH(struct GenericEngineApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__genapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS genapiCheckMemInterUnmap_DISPATCH(struct GenericEngineApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__genapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS genapiControlFilter_DISPATCH(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__genapiControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS genapiGetMemoryMappingDescriptor_DISPATCH(struct GenericEngineApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__genapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS genapiControlSerialization_Prologue_DISPATCH(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__genapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void genapiControlSerialization_Epilogue_DISPATCH(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__genapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS genapiControl_Prologue_DISPATCH(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__genapiControl_Prologue__(pResource, pCallContext, pParams); +} + +static inline void genapiControl_Epilogue_DISPATCH(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__genapiControl_Epilogue__(pResource, pCallContext, pParams); +} + static inline NvBool genapiCanCopy_DISPATCH(struct GenericEngineApi *pResource) { return pResource->__genapiCanCopy__(pResource); } -static inline NvBool genapiIsPartialUnmapSupported_DISPATCH(struct GenericEngineApi *pResource) { - return pResource->__genapiIsPartialUnmapSupported__(pResource); +static inline NV_STATUS genapiIsDuplicate_DISPATCH(struct GenericEngineApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__genapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void genapiPreDestruct_DISPATCH(struct GenericEngineApi *pResource) { pResource->__genapiPreDestruct__(pResource); } -static inline NV_STATUS genapiIsDuplicate_DISPATCH(struct GenericEngineApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__genapiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS genapiControlFilter_DISPATCH(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__genapiControlFilter__(pResource, pCallContext, pParams); } -static inline void genapiControlSerialization_Epilogue_DISPATCH(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__genapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool genapiIsPartialUnmapSupported_DISPATCH(struct GenericEngineApi *pResource) { + return pResource->__genapiIsPartialUnmapSupported__(pResource); } -static inline NvBool genapiAccessCallback_DISPATCH(struct GenericEngineApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__genapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS genapiMapTo_DISPATCH(struct GenericEngineApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__genapiMapTo__(pResource, pParams); } +static inline NV_STATUS genapiUnmapFrom_DISPATCH(struct GenericEngineApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__genapiUnmapFrom__(pResource, pParams); +} + +static inline NvU32 genapiGetRefCount_DISPATCH(struct GenericEngineApi *pResource) { + return pResource->__genapiGetRefCount__(pResource); +} + +static inline void genapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct GenericEngineApi *pResource, RsResourceRef *pReference) { + pResource->__genapiAddAdditionalDependants__(pClient, pResource, pReference); +} + +NV_STATUS genapiMap_IMPL(struct GenericEngineApi *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); + +NV_STATUS genapiGetMapAddrSpace_IMPL(struct GenericEngineApi *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); + +NV_STATUS genapiControl_IMPL(struct GenericEngineApi *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +NV_STATUS genapiCtrlCmdMasterGetErrorIntrOffsetMask_IMPL(struct GenericEngineApi *pGenericEngineApi, NV90E6_CTRL_MASTER_GET_ERROR_INTR_OFFSET_MASK_PARAMS *pParams); + +NV_STATUS genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask_IMPL(struct GenericEngineApi *pGenericEngineApi, NV90E6_CTRL_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK_PARAMS *pParams); + +NV_STATUS genapiCtrlCmdBBXGetLastFlushTime_IMPL(struct GenericEngineApi *pGenericEngineApi, NV90E7_CTRL_BBX_GET_LAST_FLUSH_TIME_PARAMS *pParams); + NV_STATUS genapiConstruct_IMPL(struct GenericEngineApi *arg_pGenericEngineApi, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_genapiConstruct(arg_pGenericEngineApi, arg_pCallContext, arg_pParams) genapiConstruct_IMPL(arg_pGenericEngineApi, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_gpu_access_nvoc.c b/src/nvidia/generated/g_gpu_access_nvoc.c index cdc69ce58b..ad0f6cb1e5 100644 --- a/src/nvidia/generated/g_gpu_access_nvoc.c +++ b/src/nvidia/generated/g_gpu_access_nvoc.c @@ -66,38 +66,49 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_IoAperture = /*pExportInfo=*/ &__nvoc_export_info_IoAperture }; -static NvU8 __nvoc_thunk_IoAperture_regaprtReadReg08(struct RegisterAperture *pAperture, NvU32 addr) { - return ioaprtReadReg08((struct IoAperture *)(((unsigned char *)pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr); +// 8 down-thunk(s) defined to bridge methods in IoAperture from superclasses + +// ioaprtReadReg08: virtual override (regaprt) base (regaprt) +static NvU8 __nvoc_down_thunk_IoAperture_regaprtReadReg08(struct RegisterAperture *pAperture, NvU32 addr) { + return ioaprtReadReg08((struct IoAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr); } -static NvU16 __nvoc_thunk_IoAperture_regaprtReadReg16(struct RegisterAperture *pAperture, NvU32 addr) { - return ioaprtReadReg16((struct IoAperture *)(((unsigned char *)pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr); +// ioaprtReadReg16: virtual override (regaprt) base (regaprt) +static NvU16 __nvoc_down_thunk_IoAperture_regaprtReadReg16(struct RegisterAperture *pAperture, NvU32 addr) { + return ioaprtReadReg16((struct IoAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr); } -static NvU32 __nvoc_thunk_IoAperture_regaprtReadReg32(struct RegisterAperture *pAperture, NvU32 addr) { - return ioaprtReadReg32((struct IoAperture *)(((unsigned char *)pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr); +// ioaprtReadReg32: virtual override (regaprt) base (regaprt) +static NvU32 __nvoc_down_thunk_IoAperture_regaprtReadReg32(struct RegisterAperture *pAperture, NvU32 addr) { + return ioaprtReadReg32((struct IoAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr); } -static void __nvoc_thunk_IoAperture_regaprtWriteReg08(struct RegisterAperture *pAperture, NvU32 addr, NvV8 value) { - ioaprtWriteReg08((struct IoAperture *)(((unsigned char *)pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr, value); +// ioaprtWriteReg08: virtual override (regaprt) base (regaprt) +static void __nvoc_down_thunk_IoAperture_regaprtWriteReg08(struct RegisterAperture *pAperture, NvU32 addr, NvV8 value) { + ioaprtWriteReg08((struct IoAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr, value); } -static void __nvoc_thunk_IoAperture_regaprtWriteReg16(struct RegisterAperture *pAperture, NvU32 addr, NvV16 value) { - ioaprtWriteReg16((struct IoAperture *)(((unsigned char *)pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr, value); +// ioaprtWriteReg16: virtual override (regaprt) base (regaprt) +static void __nvoc_down_thunk_IoAperture_regaprtWriteReg16(struct RegisterAperture *pAperture, NvU32 addr, NvV16 value) { + ioaprtWriteReg16((struct IoAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr, value); } -static void __nvoc_thunk_IoAperture_regaprtWriteReg32(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value) { - ioaprtWriteReg32((struct IoAperture *)(((unsigned char *)pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr, value); +// ioaprtWriteReg32: virtual override (regaprt) base (regaprt) +static void __nvoc_down_thunk_IoAperture_regaprtWriteReg32(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value) { + ioaprtWriteReg32((struct IoAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr, value); } -static void __nvoc_thunk_IoAperture_regaprtWriteReg32Uc(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value) { - ioaprtWriteReg32Uc((struct IoAperture *)(((unsigned char *)pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr, value); +// ioaprtWriteReg32Uc: virtual override (regaprt) base (regaprt) +static void __nvoc_down_thunk_IoAperture_regaprtWriteReg32Uc(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value) { + ioaprtWriteReg32Uc((struct IoAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr, value); } -static NvBool __nvoc_thunk_IoAperture_regaprtIsRegValid(struct RegisterAperture *pAperture, NvU32 addr) { - return ioaprtIsRegValid((struct IoAperture *)(((unsigned char *)pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr); +// ioaprtIsRegValid: virtual override (regaprt) base (regaprt) +static NvBool __nvoc_down_thunk_IoAperture_regaprtIsRegValid(struct RegisterAperture *pAperture, NvU32 addr) { + return ioaprtIsRegValid((struct IoAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_IoAperture = { /*numEntries=*/ 0, @@ -140,43 +151,48 @@ NV_STATUS __nvoc_ctor_IoAperture(IoAperture *pThis, struct IoAperture * arg_pPar return status; } +// Vtable initialization static void __nvoc_init_funcTable_IoAperture_1(IoAperture *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // ioaprtReadReg08 -- virtual override (regaprt) base (regaprt) pThis->__ioaprtReadReg08__ = &ioaprtReadReg08_IMPL; + pThis->__nvoc_base_RegisterAperture.__regaprtReadReg08__ = &__nvoc_down_thunk_IoAperture_regaprtReadReg08; + // ioaprtReadReg16 -- virtual override (regaprt) base (regaprt) pThis->__ioaprtReadReg16__ = &ioaprtReadReg16_IMPL; + pThis->__nvoc_base_RegisterAperture.__regaprtReadReg16__ = &__nvoc_down_thunk_IoAperture_regaprtReadReg16; + // ioaprtReadReg32 -- virtual override (regaprt) base (regaprt) pThis->__ioaprtReadReg32__ = &ioaprtReadReg32_IMPL; + pThis->__nvoc_base_RegisterAperture.__regaprtReadReg32__ = &__nvoc_down_thunk_IoAperture_regaprtReadReg32; + // ioaprtWriteReg08 -- virtual override (regaprt) base (regaprt) pThis->__ioaprtWriteReg08__ = &ioaprtWriteReg08_IMPL; + pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg08__ = &__nvoc_down_thunk_IoAperture_regaprtWriteReg08; + // ioaprtWriteReg16 -- virtual override (regaprt) base (regaprt) pThis->__ioaprtWriteReg16__ = &ioaprtWriteReg16_IMPL; + pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg16__ = &__nvoc_down_thunk_IoAperture_regaprtWriteReg16; + // ioaprtWriteReg32 -- virtual override (regaprt) base (regaprt) pThis->__ioaprtWriteReg32__ = &ioaprtWriteReg32_IMPL; + pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg32__ = &__nvoc_down_thunk_IoAperture_regaprtWriteReg32; + // ioaprtWriteReg32Uc -- virtual override (regaprt) base (regaprt) pThis->__ioaprtWriteReg32Uc__ = &ioaprtWriteReg32Uc_IMPL; + pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg32Uc__ = &__nvoc_down_thunk_IoAperture_regaprtWriteReg32Uc; + // ioaprtIsRegValid -- virtual override (regaprt) base (regaprt) pThis->__ioaprtIsRegValid__ = &ioaprtIsRegValid_IMPL; + pThis->__nvoc_base_RegisterAperture.__regaprtIsRegValid__ = &__nvoc_down_thunk_IoAperture_regaprtIsRegValid; +} // End __nvoc_init_funcTable_IoAperture_1 with approximately 16 basic block(s). - pThis->__nvoc_base_RegisterAperture.__regaprtReadReg08__ = &__nvoc_thunk_IoAperture_regaprtReadReg08; - - pThis->__nvoc_base_RegisterAperture.__regaprtReadReg16__ = &__nvoc_thunk_IoAperture_regaprtReadReg16; - - pThis->__nvoc_base_RegisterAperture.__regaprtReadReg32__ = &__nvoc_thunk_IoAperture_regaprtReadReg32; - - pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg08__ = &__nvoc_thunk_IoAperture_regaprtWriteReg08; - - pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg16__ = &__nvoc_thunk_IoAperture_regaprtWriteReg16; - - pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg32__ = &__nvoc_thunk_IoAperture_regaprtWriteReg32; - - pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg32Uc__ = &__nvoc_thunk_IoAperture_regaprtWriteReg32Uc; - - pThis->__nvoc_base_RegisterAperture.__regaprtIsRegValid__ = &__nvoc_thunk_IoAperture_regaprtIsRegValid; -} +// Initialize vtable(s) for 8 virtual method(s). void __nvoc_init_funcTable_IoAperture(IoAperture *pThis) { + + // Initialize vtable(s) with 8 per-object function pointer(s). __nvoc_init_funcTable_IoAperture_1(pThis); } @@ -324,38 +340,49 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_SwBcAperture = /*pExportInfo=*/ &__nvoc_export_info_SwBcAperture }; -static NvU8 __nvoc_thunk_SwBcAperture_regaprtReadReg08(struct RegisterAperture *pAperture, NvU32 addr) { - return swbcaprtReadReg08((struct SwBcAperture *)(((unsigned char *)pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr); +// 8 down-thunk(s) defined to bridge methods in SwBcAperture from superclasses + +// swbcaprtReadReg08: virtual override (regaprt) base (regaprt) +static NvU8 __nvoc_down_thunk_SwBcAperture_regaprtReadReg08(struct RegisterAperture *pAperture, NvU32 addr) { + return swbcaprtReadReg08((struct SwBcAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr); } -static NvU16 __nvoc_thunk_SwBcAperture_regaprtReadReg16(struct RegisterAperture *pAperture, NvU32 addr) { - return swbcaprtReadReg16((struct SwBcAperture *)(((unsigned char *)pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr); +// swbcaprtReadReg16: virtual override (regaprt) base (regaprt) +static NvU16 __nvoc_down_thunk_SwBcAperture_regaprtReadReg16(struct RegisterAperture *pAperture, NvU32 addr) { + return swbcaprtReadReg16((struct SwBcAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr); } -static NvU32 __nvoc_thunk_SwBcAperture_regaprtReadReg32(struct RegisterAperture *pAperture, NvU32 addr) { - return swbcaprtReadReg32((struct SwBcAperture *)(((unsigned char *)pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr); +// swbcaprtReadReg32: virtual override (regaprt) base (regaprt) +static NvU32 __nvoc_down_thunk_SwBcAperture_regaprtReadReg32(struct RegisterAperture *pAperture, NvU32 addr) { + return swbcaprtReadReg32((struct SwBcAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr); } -static void __nvoc_thunk_SwBcAperture_regaprtWriteReg08(struct RegisterAperture *pAperture, NvU32 addr, NvV8 value) { - swbcaprtWriteReg08((struct SwBcAperture *)(((unsigned char *)pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr, value); +// swbcaprtWriteReg08: virtual override (regaprt) base (regaprt) +static void __nvoc_down_thunk_SwBcAperture_regaprtWriteReg08(struct RegisterAperture *pAperture, NvU32 addr, NvV8 value) { + swbcaprtWriteReg08((struct SwBcAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr, value); } -static void __nvoc_thunk_SwBcAperture_regaprtWriteReg16(struct RegisterAperture *pAperture, NvU32 addr, NvV16 value) { - swbcaprtWriteReg16((struct SwBcAperture *)(((unsigned char *)pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr, value); +// swbcaprtWriteReg16: virtual override (regaprt) base (regaprt) +static void __nvoc_down_thunk_SwBcAperture_regaprtWriteReg16(struct RegisterAperture *pAperture, NvU32 addr, NvV16 value) { + swbcaprtWriteReg16((struct SwBcAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr, value); } -static void __nvoc_thunk_SwBcAperture_regaprtWriteReg32(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value) { - swbcaprtWriteReg32((struct SwBcAperture *)(((unsigned char *)pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr, value); +// swbcaprtWriteReg32: virtual override (regaprt) base (regaprt) +static void __nvoc_down_thunk_SwBcAperture_regaprtWriteReg32(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value) { + swbcaprtWriteReg32((struct SwBcAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr, value); } -static void __nvoc_thunk_SwBcAperture_regaprtWriteReg32Uc(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value) { - swbcaprtWriteReg32Uc((struct SwBcAperture *)(((unsigned char *)pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr, value); +// swbcaprtWriteReg32Uc: virtual override (regaprt) base (regaprt) +static void __nvoc_down_thunk_SwBcAperture_regaprtWriteReg32Uc(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value) { + swbcaprtWriteReg32Uc((struct SwBcAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr, value); } -static NvBool __nvoc_thunk_SwBcAperture_regaprtIsRegValid(struct RegisterAperture *pAperture, NvU32 addr) { - return swbcaprtIsRegValid((struct SwBcAperture *)(((unsigned char *)pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr); +// swbcaprtIsRegValid: virtual override (regaprt) base (regaprt) +static NvBool __nvoc_down_thunk_SwBcAperture_regaprtIsRegValid(struct RegisterAperture *pAperture, NvU32 addr) { + return swbcaprtIsRegValid((struct SwBcAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_SwBcAperture = { /*numEntries=*/ 0, @@ -398,43 +425,48 @@ NV_STATUS __nvoc_ctor_SwBcAperture(SwBcAperture *pThis, struct IoAperture * arg_ return status; } +// Vtable initialization static void __nvoc_init_funcTable_SwBcAperture_1(SwBcAperture *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // swbcaprtReadReg08 -- virtual override (regaprt) base (regaprt) pThis->__swbcaprtReadReg08__ = &swbcaprtReadReg08_IMPL; + pThis->__nvoc_base_RegisterAperture.__regaprtReadReg08__ = &__nvoc_down_thunk_SwBcAperture_regaprtReadReg08; + // swbcaprtReadReg16 -- virtual override (regaprt) base (regaprt) pThis->__swbcaprtReadReg16__ = &swbcaprtReadReg16_IMPL; + pThis->__nvoc_base_RegisterAperture.__regaprtReadReg16__ = &__nvoc_down_thunk_SwBcAperture_regaprtReadReg16; + // swbcaprtReadReg32 -- virtual override (regaprt) base (regaprt) pThis->__swbcaprtReadReg32__ = &swbcaprtReadReg32_IMPL; + pThis->__nvoc_base_RegisterAperture.__regaprtReadReg32__ = &__nvoc_down_thunk_SwBcAperture_regaprtReadReg32; + // swbcaprtWriteReg08 -- virtual override (regaprt) base (regaprt) pThis->__swbcaprtWriteReg08__ = &swbcaprtWriteReg08_IMPL; + pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg08__ = &__nvoc_down_thunk_SwBcAperture_regaprtWriteReg08; + // swbcaprtWriteReg16 -- virtual override (regaprt) base (regaprt) pThis->__swbcaprtWriteReg16__ = &swbcaprtWriteReg16_IMPL; + pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg16__ = &__nvoc_down_thunk_SwBcAperture_regaprtWriteReg16; + // swbcaprtWriteReg32 -- virtual override (regaprt) base (regaprt) pThis->__swbcaprtWriteReg32__ = &swbcaprtWriteReg32_IMPL; + pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg32__ = &__nvoc_down_thunk_SwBcAperture_regaprtWriteReg32; + // swbcaprtWriteReg32Uc -- virtual override (regaprt) base (regaprt) pThis->__swbcaprtWriteReg32Uc__ = &swbcaprtWriteReg32Uc_IMPL; + pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg32Uc__ = &__nvoc_down_thunk_SwBcAperture_regaprtWriteReg32Uc; + // swbcaprtIsRegValid -- virtual override (regaprt) base (regaprt) pThis->__swbcaprtIsRegValid__ = &swbcaprtIsRegValid_IMPL; + pThis->__nvoc_base_RegisterAperture.__regaprtIsRegValid__ = &__nvoc_down_thunk_SwBcAperture_regaprtIsRegValid; +} // End __nvoc_init_funcTable_SwBcAperture_1 with approximately 16 basic block(s). - pThis->__nvoc_base_RegisterAperture.__regaprtReadReg08__ = &__nvoc_thunk_SwBcAperture_regaprtReadReg08; - - pThis->__nvoc_base_RegisterAperture.__regaprtReadReg16__ = &__nvoc_thunk_SwBcAperture_regaprtReadReg16; - - pThis->__nvoc_base_RegisterAperture.__regaprtReadReg32__ = &__nvoc_thunk_SwBcAperture_regaprtReadReg32; - - pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg08__ = &__nvoc_thunk_SwBcAperture_regaprtWriteReg08; - - pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg16__ = &__nvoc_thunk_SwBcAperture_regaprtWriteReg16; - - pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg32__ = &__nvoc_thunk_SwBcAperture_regaprtWriteReg32; - - pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg32Uc__ = &__nvoc_thunk_SwBcAperture_regaprtWriteReg32Uc; - - pThis->__nvoc_base_RegisterAperture.__regaprtIsRegValid__ = &__nvoc_thunk_SwBcAperture_regaprtIsRegValid; -} +// Initialize vtable(s) for 8 virtual method(s). void __nvoc_init_funcTable_SwBcAperture(SwBcAperture *pThis) { + + // Initialize vtable(s) with 8 per-object function pointer(s). __nvoc_init_funcTable_SwBcAperture_1(pThis); } diff --git a/src/nvidia/generated/g_gpu_access_nvoc.h b/src/nvidia/generated/g_gpu_access_nvoc.h index 7c7a3b2163..c899186327 100644 --- a/src/nvidia/generated/g_gpu_access_nvoc.h +++ b/src/nvidia/generated/g_gpu_access_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_GPU_ACCESS_NVOC_H_ #define _G_GPU_ACCESS_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_gpu_access_nvoc.h" #ifndef _GPU_ACCESS_H_ @@ -390,21 +398,32 @@ void gpuRegWr32Uc_dumpinfo(const char *func, const char *addrStr, const char *v #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct IoAperture { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; struct RegisterAperture __nvoc_base_RegisterAperture; - struct Object *__nvoc_pbase_Object; - struct RegisterAperture *__nvoc_pbase_RegisterAperture; - struct IoAperture *__nvoc_pbase_IoAperture; - NvU8 (*__ioaprtReadReg08__)(struct IoAperture *, NvU32); - NvU16 (*__ioaprtReadReg16__)(struct IoAperture *, NvU32); - NvU32 (*__ioaprtReadReg32__)(struct IoAperture *, NvU32); - void (*__ioaprtWriteReg08__)(struct IoAperture *, NvU32, NvV8); - void (*__ioaprtWriteReg16__)(struct IoAperture *, NvU32, NvV16); - void (*__ioaprtWriteReg32__)(struct IoAperture *, NvU32, NvV32); - void (*__ioaprtWriteReg32Uc__)(struct IoAperture *, NvU32, NvV32); - NvBool (*__ioaprtIsRegValid__)(struct IoAperture *, NvU32); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct RegisterAperture *__nvoc_pbase_RegisterAperture; // regaprt super + struct IoAperture *__nvoc_pbase_IoAperture; // ioaprt + + // Vtable with 8 per-object function pointers + NvU8 (*__ioaprtReadReg08__)(struct IoAperture * /*this*/, NvU32); // virtual override (regaprt) base (regaprt) + NvU16 (*__ioaprtReadReg16__)(struct IoAperture * /*this*/, NvU32); // virtual override (regaprt) base (regaprt) + NvU32 (*__ioaprtReadReg32__)(struct IoAperture * /*this*/, NvU32); // virtual override (regaprt) base (regaprt) + void (*__ioaprtWriteReg08__)(struct IoAperture * /*this*/, NvU32, NvV8); // virtual override (regaprt) base (regaprt) + void (*__ioaprtWriteReg16__)(struct IoAperture * /*this*/, NvU32, NvV16); // virtual override (regaprt) base (regaprt) + void (*__ioaprtWriteReg32__)(struct IoAperture * /*this*/, NvU32, NvV32); // virtual override (regaprt) base (regaprt) + void (*__ioaprtWriteReg32Uc__)(struct IoAperture * /*this*/, NvU32, NvV32); // virtual override (regaprt) base (regaprt) + NvBool (*__ioaprtIsRegValid__)(struct IoAperture * /*this*/, NvU32); // virtual override (regaprt) base (regaprt) + + // Data members OBJGPU *pGpu; NvU32 deviceIndex; NvU32 deviceInstance; @@ -423,6 +442,7 @@ typedef struct IoAperture IoAperture; #define __nvoc_class_id_IoAperture 0x40549c #endif /* __nvoc_class_id_IoAperture */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_IoAperture; #define __staticCast_IoAperture(pThis) \ @@ -435,69 +455,80 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_IoAperture; ((IoAperture*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(IoAperture))) #endif //__nvoc_gpu_access_h_disabled - NV_STATUS __nvoc_objCreateDynamic_IoAperture(IoAperture**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_IoAperture(IoAperture**, Dynamic*, NvU32, struct IoAperture * arg_pParentAperture, OBJGPU * arg_pGpu, NvU32 arg_deviceIndex, NvU32 arg_deviceInstance, DEVICE_MAPPING * arg_pMapping, NvU32 arg_mappingStartAddr, NvU32 arg_offset, NvU32 arg_length); #define __objCreate_IoAperture(ppNewObj, pParent, createFlags, arg_pParentAperture, arg_pGpu, arg_deviceIndex, arg_deviceInstance, arg_pMapping, arg_mappingStartAddr, arg_offset, arg_length) \ __nvoc_objCreate_IoAperture((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pParentAperture, arg_pGpu, arg_deviceIndex, arg_deviceInstance, arg_pMapping, arg_mappingStartAddr, arg_offset, arg_length) + +// Wrapper macros +#define ioaprtReadReg08_FNPTR(pAperture) pAperture->__ioaprtReadReg08__ #define ioaprtReadReg08(pAperture, addr) ioaprtReadReg08_DISPATCH(pAperture, addr) +#define ioaprtReadReg16_FNPTR(pAperture) pAperture->__ioaprtReadReg16__ #define ioaprtReadReg16(pAperture, addr) ioaprtReadReg16_DISPATCH(pAperture, addr) +#define ioaprtReadReg32_FNPTR(pAperture) pAperture->__ioaprtReadReg32__ #define ioaprtReadReg32(pAperture, addr) ioaprtReadReg32_DISPATCH(pAperture, addr) +#define ioaprtWriteReg08_FNPTR(pAperture) pAperture->__ioaprtWriteReg08__ #define ioaprtWriteReg08(pAperture, addr, value) ioaprtWriteReg08_DISPATCH(pAperture, addr, value) +#define ioaprtWriteReg16_FNPTR(pAperture) pAperture->__ioaprtWriteReg16__ #define ioaprtWriteReg16(pAperture, addr, value) ioaprtWriteReg16_DISPATCH(pAperture, addr, value) +#define ioaprtWriteReg32_FNPTR(pAperture) pAperture->__ioaprtWriteReg32__ #define ioaprtWriteReg32(pAperture, addr, value) ioaprtWriteReg32_DISPATCH(pAperture, addr, value) +#define ioaprtWriteReg32Uc_FNPTR(pAperture) pAperture->__ioaprtWriteReg32Uc__ #define ioaprtWriteReg32Uc(pAperture, addr, value) ioaprtWriteReg32Uc_DISPATCH(pAperture, addr, value) +#define ioaprtIsRegValid_FNPTR(pAperture) pAperture->__ioaprtIsRegValid__ #define ioaprtIsRegValid(pAperture, addr) ioaprtIsRegValid_DISPATCH(pAperture, addr) -NvU8 ioaprtReadReg08_IMPL(struct IoAperture *pAperture, NvU32 addr); +// Dispatch functions static inline NvU8 ioaprtReadReg08_DISPATCH(struct IoAperture *pAperture, NvU32 addr) { return pAperture->__ioaprtReadReg08__(pAperture, addr); } -NvU16 ioaprtReadReg16_IMPL(struct IoAperture *pAperture, NvU32 addr); - static inline NvU16 ioaprtReadReg16_DISPATCH(struct IoAperture *pAperture, NvU32 addr) { return pAperture->__ioaprtReadReg16__(pAperture, addr); } -NvU32 ioaprtReadReg32_IMPL(struct IoAperture *pAperture, NvU32 addr); - static inline NvU32 ioaprtReadReg32_DISPATCH(struct IoAperture *pAperture, NvU32 addr) { return pAperture->__ioaprtReadReg32__(pAperture, addr); } -void ioaprtWriteReg08_IMPL(struct IoAperture *pAperture, NvU32 addr, NvV8 value); - static inline void ioaprtWriteReg08_DISPATCH(struct IoAperture *pAperture, NvU32 addr, NvV8 value) { pAperture->__ioaprtWriteReg08__(pAperture, addr, value); } -void ioaprtWriteReg16_IMPL(struct IoAperture *pAperture, NvU32 addr, NvV16 value); - static inline void ioaprtWriteReg16_DISPATCH(struct IoAperture *pAperture, NvU32 addr, NvV16 value) { pAperture->__ioaprtWriteReg16__(pAperture, addr, value); } -void ioaprtWriteReg32_IMPL(struct IoAperture *pAperture, NvU32 addr, NvV32 value); - static inline void ioaprtWriteReg32_DISPATCH(struct IoAperture *pAperture, NvU32 addr, NvV32 value) { pAperture->__ioaprtWriteReg32__(pAperture, addr, value); } -void ioaprtWriteReg32Uc_IMPL(struct IoAperture *pAperture, NvU32 addr, NvV32 value); - static inline void ioaprtWriteReg32Uc_DISPATCH(struct IoAperture *pAperture, NvU32 addr, NvV32 value) { pAperture->__ioaprtWriteReg32Uc__(pAperture, addr, value); } -NvBool ioaprtIsRegValid_IMPL(struct IoAperture *pAperture, NvU32 addr); - static inline NvBool ioaprtIsRegValid_DISPATCH(struct IoAperture *pAperture, NvU32 addr) { return pAperture->__ioaprtIsRegValid__(pAperture, addr); } +NvU8 ioaprtReadReg08_IMPL(struct IoAperture *pAperture, NvU32 addr); + +NvU16 ioaprtReadReg16_IMPL(struct IoAperture *pAperture, NvU32 addr); + +NvU32 ioaprtReadReg32_IMPL(struct IoAperture *pAperture, NvU32 addr); + +void ioaprtWriteReg08_IMPL(struct IoAperture *pAperture, NvU32 addr, NvV8 value); + +void ioaprtWriteReg16_IMPL(struct IoAperture *pAperture, NvU32 addr, NvV16 value); + +void ioaprtWriteReg32_IMPL(struct IoAperture *pAperture, NvU32 addr, NvV32 value); + +void ioaprtWriteReg32Uc_IMPL(struct IoAperture *pAperture, NvU32 addr, NvV32 value); + +NvBool ioaprtIsRegValid_IMPL(struct IoAperture *pAperture, NvU32 addr); + static inline NvU32 ioaprtGetRegAddr(struct IoAperture *pAperture, NvU32 addr) { return pAperture->baseAddress + addr; } @@ -529,21 +560,32 @@ NV_STATUS ioaprtInit(struct IoAperture *pAperture, struct IoAperture *pParentApe #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct SwBcAperture { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; struct RegisterAperture __nvoc_base_RegisterAperture; - struct Object *__nvoc_pbase_Object; - struct RegisterAperture *__nvoc_pbase_RegisterAperture; - struct SwBcAperture *__nvoc_pbase_SwBcAperture; - NvU8 (*__swbcaprtReadReg08__)(struct SwBcAperture *, NvU32); - NvU16 (*__swbcaprtReadReg16__)(struct SwBcAperture *, NvU32); - NvU32 (*__swbcaprtReadReg32__)(struct SwBcAperture *, NvU32); - void (*__swbcaprtWriteReg08__)(struct SwBcAperture *, NvU32, NvV8); - void (*__swbcaprtWriteReg16__)(struct SwBcAperture *, NvU32, NvV16); - void (*__swbcaprtWriteReg32__)(struct SwBcAperture *, NvU32, NvV32); - void (*__swbcaprtWriteReg32Uc__)(struct SwBcAperture *, NvU32, NvV32); - NvBool (*__swbcaprtIsRegValid__)(struct SwBcAperture *, NvU32); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct RegisterAperture *__nvoc_pbase_RegisterAperture; // regaprt super + struct SwBcAperture *__nvoc_pbase_SwBcAperture; // swbcaprt + + // Vtable with 8 per-object function pointers + NvU8 (*__swbcaprtReadReg08__)(struct SwBcAperture * /*this*/, NvU32); // virtual override (regaprt) base (regaprt) + NvU16 (*__swbcaprtReadReg16__)(struct SwBcAperture * /*this*/, NvU32); // virtual override (regaprt) base (regaprt) + NvU32 (*__swbcaprtReadReg32__)(struct SwBcAperture * /*this*/, NvU32); // virtual override (regaprt) base (regaprt) + void (*__swbcaprtWriteReg08__)(struct SwBcAperture * /*this*/, NvU32, NvV8); // virtual override (regaprt) base (regaprt) + void (*__swbcaprtWriteReg16__)(struct SwBcAperture * /*this*/, NvU32, NvV16); // virtual override (regaprt) base (regaprt) + void (*__swbcaprtWriteReg32__)(struct SwBcAperture * /*this*/, NvU32, NvV32); // virtual override (regaprt) base (regaprt) + void (*__swbcaprtWriteReg32Uc__)(struct SwBcAperture * /*this*/, NvU32, NvV32); // virtual override (regaprt) base (regaprt) + NvBool (*__swbcaprtIsRegValid__)(struct SwBcAperture * /*this*/, NvU32); // virtual override (regaprt) base (regaprt) + + // Data members struct IoAperture *pApertures; NvU32 numApertures; }; @@ -557,6 +599,7 @@ typedef struct SwBcAperture SwBcAperture; #define __nvoc_class_id_SwBcAperture 0x6d0f88 #endif /* __nvoc_class_id_SwBcAperture */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_SwBcAperture; #define __staticCast_SwBcAperture(pThis) \ @@ -569,69 +612,80 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_SwBcAperture; ((SwBcAperture*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(SwBcAperture))) #endif //__nvoc_gpu_access_h_disabled - NV_STATUS __nvoc_objCreateDynamic_SwBcAperture(SwBcAperture**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_SwBcAperture(SwBcAperture**, Dynamic*, NvU32, struct IoAperture * arg_pApertures, NvU32 arg_numApertures); #define __objCreate_SwBcAperture(ppNewObj, pParent, createFlags, arg_pApertures, arg_numApertures) \ __nvoc_objCreate_SwBcAperture((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pApertures, arg_numApertures) + +// Wrapper macros +#define swbcaprtReadReg08_FNPTR(pAperture) pAperture->__swbcaprtReadReg08__ #define swbcaprtReadReg08(pAperture, addr) swbcaprtReadReg08_DISPATCH(pAperture, addr) +#define swbcaprtReadReg16_FNPTR(pAperture) pAperture->__swbcaprtReadReg16__ #define swbcaprtReadReg16(pAperture, addr) swbcaprtReadReg16_DISPATCH(pAperture, addr) +#define swbcaprtReadReg32_FNPTR(pAperture) pAperture->__swbcaprtReadReg32__ #define swbcaprtReadReg32(pAperture, addr) swbcaprtReadReg32_DISPATCH(pAperture, addr) +#define swbcaprtWriteReg08_FNPTR(pAperture) pAperture->__swbcaprtWriteReg08__ #define swbcaprtWriteReg08(pAperture, addr, value) swbcaprtWriteReg08_DISPATCH(pAperture, addr, value) +#define swbcaprtWriteReg16_FNPTR(pAperture) pAperture->__swbcaprtWriteReg16__ #define swbcaprtWriteReg16(pAperture, addr, value) swbcaprtWriteReg16_DISPATCH(pAperture, addr, value) +#define swbcaprtWriteReg32_FNPTR(pAperture) pAperture->__swbcaprtWriteReg32__ #define swbcaprtWriteReg32(pAperture, addr, value) swbcaprtWriteReg32_DISPATCH(pAperture, addr, value) +#define swbcaprtWriteReg32Uc_FNPTR(pAperture) pAperture->__swbcaprtWriteReg32Uc__ #define swbcaprtWriteReg32Uc(pAperture, addr, value) swbcaprtWriteReg32Uc_DISPATCH(pAperture, addr, value) +#define swbcaprtIsRegValid_FNPTR(pAperture) pAperture->__swbcaprtIsRegValid__ #define swbcaprtIsRegValid(pAperture, addr) swbcaprtIsRegValid_DISPATCH(pAperture, addr) -NvU8 swbcaprtReadReg08_IMPL(struct SwBcAperture *pAperture, NvU32 addr); +// Dispatch functions static inline NvU8 swbcaprtReadReg08_DISPATCH(struct SwBcAperture *pAperture, NvU32 addr) { return pAperture->__swbcaprtReadReg08__(pAperture, addr); } -NvU16 swbcaprtReadReg16_IMPL(struct SwBcAperture *pAperture, NvU32 addr); - static inline NvU16 swbcaprtReadReg16_DISPATCH(struct SwBcAperture *pAperture, NvU32 addr) { return pAperture->__swbcaprtReadReg16__(pAperture, addr); } -NvU32 swbcaprtReadReg32_IMPL(struct SwBcAperture *pAperture, NvU32 addr); - static inline NvU32 swbcaprtReadReg32_DISPATCH(struct SwBcAperture *pAperture, NvU32 addr) { return pAperture->__swbcaprtReadReg32__(pAperture, addr); } -void swbcaprtWriteReg08_IMPL(struct SwBcAperture *pAperture, NvU32 addr, NvV8 value); - static inline void swbcaprtWriteReg08_DISPATCH(struct SwBcAperture *pAperture, NvU32 addr, NvV8 value) { pAperture->__swbcaprtWriteReg08__(pAperture, addr, value); } -void swbcaprtWriteReg16_IMPL(struct SwBcAperture *pAperture, NvU32 addr, NvV16 value); - static inline void swbcaprtWriteReg16_DISPATCH(struct SwBcAperture *pAperture, NvU32 addr, NvV16 value) { pAperture->__swbcaprtWriteReg16__(pAperture, addr, value); } -void swbcaprtWriteReg32_IMPL(struct SwBcAperture *pAperture, NvU32 addr, NvV32 value); - static inline void swbcaprtWriteReg32_DISPATCH(struct SwBcAperture *pAperture, NvU32 addr, NvV32 value) { pAperture->__swbcaprtWriteReg32__(pAperture, addr, value); } -void swbcaprtWriteReg32Uc_IMPL(struct SwBcAperture *pAperture, NvU32 addr, NvV32 value); - static inline void swbcaprtWriteReg32Uc_DISPATCH(struct SwBcAperture *pAperture, NvU32 addr, NvV32 value) { pAperture->__swbcaprtWriteReg32Uc__(pAperture, addr, value); } -NvBool swbcaprtIsRegValid_IMPL(struct SwBcAperture *pAperture, NvU32 addr); - static inline NvBool swbcaprtIsRegValid_DISPATCH(struct SwBcAperture *pAperture, NvU32 addr) { return pAperture->__swbcaprtIsRegValid__(pAperture, addr); } +NvU8 swbcaprtReadReg08_IMPL(struct SwBcAperture *pAperture, NvU32 addr); + +NvU16 swbcaprtReadReg16_IMPL(struct SwBcAperture *pAperture, NvU32 addr); + +NvU32 swbcaprtReadReg32_IMPL(struct SwBcAperture *pAperture, NvU32 addr); + +void swbcaprtWriteReg08_IMPL(struct SwBcAperture *pAperture, NvU32 addr, NvV8 value); + +void swbcaprtWriteReg16_IMPL(struct SwBcAperture *pAperture, NvU32 addr, NvV16 value); + +void swbcaprtWriteReg32_IMPL(struct SwBcAperture *pAperture, NvU32 addr, NvV32 value); + +void swbcaprtWriteReg32Uc_IMPL(struct SwBcAperture *pAperture, NvU32 addr, NvV32 value); + +NvBool swbcaprtIsRegValid_IMPL(struct SwBcAperture *pAperture, NvU32 addr); + NV_STATUS swbcaprtConstruct_IMPL(struct SwBcAperture *arg_pAperture, struct IoAperture *arg_pApertures, NvU32 arg_numApertures); #define __nvoc_swbcaprtConstruct(arg_pAperture, arg_pApertures, arg_numApertures) swbcaprtConstruct_IMPL(arg_pAperture, arg_pApertures, arg_numApertures) diff --git a/src/nvidia/generated/g_gpu_acct_nvoc.c b/src/nvidia/generated/g_gpu_acct_nvoc.c index 5c9f7e7ee4..22fa845b86 100644 --- a/src/nvidia/generated/g_gpu_acct_nvoc.c +++ b/src/nvidia/generated/g_gpu_acct_nvoc.c @@ -93,10 +93,13 @@ NV_STATUS __nvoc_ctor_GpuAccounting(GpuAccounting *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_GpuAccounting_1(GpuAccounting *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_GpuAccounting_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_GpuAccounting(GpuAccounting *pThis) { __nvoc_init_funcTable_GpuAccounting_1(pThis); } diff --git a/src/nvidia/generated/g_gpu_acct_nvoc.h b/src/nvidia/generated/g_gpu_acct_nvoc.h index 91b557ab2b..7f2bbe0806 100644 --- a/src/nvidia/generated/g_gpu_acct_nvoc.h +++ b/src/nvidia/generated/g_gpu_acct_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_GPU_ACCT_NVOC_H_ #define _G_GPU_ACCT_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_gpu_acct_nvoc.h" #ifndef _GPU_ACCT_H_ @@ -134,11 +142,20 @@ typedef struct #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct GpuAccounting { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct GpuAccounting *__nvoc_pbase_GpuAccounting; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct GpuAccounting *__nvoc_pbase_GpuAccounting; // gpuacct + + // Data members GPUACCT_GPU_INSTANCE_INFO gpuInstanceInfo[32]; }; @@ -151,6 +168,7 @@ typedef struct GpuAccounting GpuAccounting; #define __nvoc_class_id_GpuAccounting 0x0f1350 #endif /* __nvoc_class_id_GpuAccounting */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_GpuAccounting; #define __staticCast_GpuAccounting(pThis) \ @@ -163,127 +181,130 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_GpuAccounting; ((GpuAccounting*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(GpuAccounting))) #endif //__nvoc_gpu_acct_h_disabled - NV_STATUS __nvoc_objCreateDynamic_GpuAccounting(GpuAccounting**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_GpuAccounting(GpuAccounting**, Dynamic*, NvU32); #define __objCreate_GpuAccounting(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_GpuAccounting((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS gpuacctConstruct_IMPL(struct GpuAccounting *arg_); #define __nvoc_gpuacctConstruct(arg_) gpuacctConstruct_IMPL(arg_) -void gpuacctDestruct_IMPL(struct GpuAccounting *arg0); +void gpuacctDestruct_IMPL(struct GpuAccounting *arg1); -#define __nvoc_gpuacctDestruct(arg0) gpuacctDestruct_IMPL(arg0) -NV_STATUS gpuacctGetAccountingMode_IMPL(struct GpuAccounting *arg0, NvU32 arg1, NV0000_CTRL_GPUACCT_GET_ACCOUNTING_STATE_PARAMS *arg2); +#define __nvoc_gpuacctDestruct(arg1) gpuacctDestruct_IMPL(arg1) +NV_STATUS gpuacctGetAccountingMode_IMPL(struct GpuAccounting *arg1, NvU32 arg2, NV0000_CTRL_GPUACCT_GET_ACCOUNTING_STATE_PARAMS *arg3); #ifdef __nvoc_gpu_acct_h_disabled -static inline NV_STATUS gpuacctGetAccountingMode(struct GpuAccounting *arg0, NvU32 arg1, NV0000_CTRL_GPUACCT_GET_ACCOUNTING_STATE_PARAMS *arg2) { +static inline NV_STATUS gpuacctGetAccountingMode(struct GpuAccounting *arg1, NvU32 arg2, NV0000_CTRL_GPUACCT_GET_ACCOUNTING_STATE_PARAMS *arg3) { NV_ASSERT_FAILED_PRECOMP("GpuAccounting was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_acct_h_disabled -#define gpuacctGetAccountingMode(arg0, arg1, arg2) gpuacctGetAccountingMode_IMPL(arg0, arg1, arg2) +#define gpuacctGetAccountingMode(arg1, arg2, arg3) gpuacctGetAccountingMode_IMPL(arg1, arg2, arg3) #endif //__nvoc_gpu_acct_h_disabled -NV_STATUS gpuacctEnableAccounting_IMPL(struct GpuAccounting *arg0, NvU32 arg1, NV0000_CTRL_GPUACCT_SET_ACCOUNTING_STATE_PARAMS *arg2); +NV_STATUS gpuacctEnableAccounting_IMPL(struct GpuAccounting *arg1, NvU32 arg2, NV0000_CTRL_GPUACCT_SET_ACCOUNTING_STATE_PARAMS *arg3); #ifdef __nvoc_gpu_acct_h_disabled -static inline NV_STATUS gpuacctEnableAccounting(struct GpuAccounting *arg0, NvU32 arg1, NV0000_CTRL_GPUACCT_SET_ACCOUNTING_STATE_PARAMS *arg2) { +static inline NV_STATUS gpuacctEnableAccounting(struct GpuAccounting *arg1, NvU32 arg2, NV0000_CTRL_GPUACCT_SET_ACCOUNTING_STATE_PARAMS *arg3) { NV_ASSERT_FAILED_PRECOMP("GpuAccounting was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_acct_h_disabled -#define gpuacctEnableAccounting(arg0, arg1, arg2) gpuacctEnableAccounting_IMPL(arg0, arg1, arg2) +#define gpuacctEnableAccounting(arg1, arg2, arg3) gpuacctEnableAccounting_IMPL(arg1, arg2, arg3) #endif //__nvoc_gpu_acct_h_disabled -NV_STATUS gpuacctDisableAccounting_IMPL(struct GpuAccounting *arg0, NvU32 arg1, NV0000_CTRL_GPUACCT_SET_ACCOUNTING_STATE_PARAMS *arg2); +NV_STATUS gpuacctDisableAccounting_IMPL(struct GpuAccounting *arg1, NvU32 arg2, NV0000_CTRL_GPUACCT_SET_ACCOUNTING_STATE_PARAMS *arg3); #ifdef __nvoc_gpu_acct_h_disabled -static inline NV_STATUS gpuacctDisableAccounting(struct GpuAccounting *arg0, NvU32 arg1, NV0000_CTRL_GPUACCT_SET_ACCOUNTING_STATE_PARAMS *arg2) { +static inline NV_STATUS gpuacctDisableAccounting(struct GpuAccounting *arg1, NvU32 arg2, NV0000_CTRL_GPUACCT_SET_ACCOUNTING_STATE_PARAMS *arg3) { NV_ASSERT_FAILED_PRECOMP("GpuAccounting was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_acct_h_disabled -#define gpuacctDisableAccounting(arg0, arg1, arg2) gpuacctDisableAccounting_IMPL(arg0, arg1, arg2) +#define gpuacctDisableAccounting(arg1, arg2, arg3) gpuacctDisableAccounting_IMPL(arg1, arg2, arg3) #endif //__nvoc_gpu_acct_h_disabled -NV_STATUS gpuacctClearAccountingData_IMPL(struct GpuAccounting *arg0, NvU32 arg1, NV0000_CTRL_GPUACCT_CLEAR_ACCOUNTING_DATA_PARAMS *arg2); +NV_STATUS gpuacctClearAccountingData_IMPL(struct GpuAccounting *arg1, NvU32 arg2, NV0000_CTRL_GPUACCT_CLEAR_ACCOUNTING_DATA_PARAMS *arg3); #ifdef __nvoc_gpu_acct_h_disabled -static inline NV_STATUS gpuacctClearAccountingData(struct GpuAccounting *arg0, NvU32 arg1, NV0000_CTRL_GPUACCT_CLEAR_ACCOUNTING_DATA_PARAMS *arg2) { +static inline NV_STATUS gpuacctClearAccountingData(struct GpuAccounting *arg1, NvU32 arg2, NV0000_CTRL_GPUACCT_CLEAR_ACCOUNTING_DATA_PARAMS *arg3) { NV_ASSERT_FAILED_PRECOMP("GpuAccounting was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_acct_h_disabled -#define gpuacctClearAccountingData(arg0, arg1, arg2) gpuacctClearAccountingData_IMPL(arg0, arg1, arg2) +#define gpuacctClearAccountingData(arg1, arg2, arg3) gpuacctClearAccountingData_IMPL(arg1, arg2, arg3) #endif //__nvoc_gpu_acct_h_disabled -NV_STATUS gpuacctStartGpuAccounting_IMPL(struct GpuAccounting *arg0, NvU32 arg1, NvU32 arg2, NvU32 arg3); +NV_STATUS gpuacctStartGpuAccounting_IMPL(struct GpuAccounting *arg1, NvU32 arg2, NvU32 arg3, NvU32 arg4); #ifdef __nvoc_gpu_acct_h_disabled -static inline NV_STATUS gpuacctStartGpuAccounting(struct GpuAccounting *arg0, NvU32 arg1, NvU32 arg2, NvU32 arg3) { +static inline NV_STATUS gpuacctStartGpuAccounting(struct GpuAccounting *arg1, NvU32 arg2, NvU32 arg3, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("GpuAccounting was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_acct_h_disabled -#define gpuacctStartGpuAccounting(arg0, arg1, arg2, arg3) gpuacctStartGpuAccounting_IMPL(arg0, arg1, arg2, arg3) +#define gpuacctStartGpuAccounting(arg1, arg2, arg3, arg4) gpuacctStartGpuAccounting_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_gpu_acct_h_disabled -NV_STATUS gpuacctStopGpuAccounting_IMPL(struct GpuAccounting *arg0, NvU32 arg1, NvU32 arg2, NvU32 arg3); +NV_STATUS gpuacctStopGpuAccounting_IMPL(struct GpuAccounting *arg1, NvU32 arg2, NvU32 arg3, NvU32 arg4); #ifdef __nvoc_gpu_acct_h_disabled -static inline NV_STATUS gpuacctStopGpuAccounting(struct GpuAccounting *arg0, NvU32 arg1, NvU32 arg2, NvU32 arg3) { +static inline NV_STATUS gpuacctStopGpuAccounting(struct GpuAccounting *arg1, NvU32 arg2, NvU32 arg3, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("GpuAccounting was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_acct_h_disabled -#define gpuacctStopGpuAccounting(arg0, arg1, arg2, arg3) gpuacctStopGpuAccounting_IMPL(arg0, arg1, arg2, arg3) +#define gpuacctStopGpuAccounting(arg1, arg2, arg3, arg4) gpuacctStopGpuAccounting_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_gpu_acct_h_disabled -NV_STATUS gpuacctUpdateProcPeakFbUsage_IMPL(struct GpuAccounting *arg0, NvU32 arg1, NvU32 arg2, NvU32 arg3, NvU64 arg4); +NV_STATUS gpuacctUpdateProcPeakFbUsage_IMPL(struct GpuAccounting *arg1, NvU32 arg2, NvU32 arg3, NvU32 arg4, NvU64 arg5); #ifdef __nvoc_gpu_acct_h_disabled -static inline NV_STATUS gpuacctUpdateProcPeakFbUsage(struct GpuAccounting *arg0, NvU32 arg1, NvU32 arg2, NvU32 arg3, NvU64 arg4) { +static inline NV_STATUS gpuacctUpdateProcPeakFbUsage(struct GpuAccounting *arg1, NvU32 arg2, NvU32 arg3, NvU32 arg4, NvU64 arg5) { NV_ASSERT_FAILED_PRECOMP("GpuAccounting was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_acct_h_disabled -#define gpuacctUpdateProcPeakFbUsage(arg0, arg1, arg2, arg3, arg4) gpuacctUpdateProcPeakFbUsage_IMPL(arg0, arg1, arg2, arg3, arg4) +#define gpuacctUpdateProcPeakFbUsage(arg1, arg2, arg3, arg4, arg5) gpuacctUpdateProcPeakFbUsage_IMPL(arg1, arg2, arg3, arg4, arg5) #endif //__nvoc_gpu_acct_h_disabled -NV_STATUS gpuacctGetProcAcctInfo_IMPL(struct GpuAccounting *arg0, NV0000_CTRL_GPUACCT_GET_PROC_ACCOUNTING_INFO_PARAMS *arg1); +NV_STATUS gpuacctGetProcAcctInfo_IMPL(struct GpuAccounting *arg1, NV0000_CTRL_GPUACCT_GET_PROC_ACCOUNTING_INFO_PARAMS *arg2); #ifdef __nvoc_gpu_acct_h_disabled -static inline NV_STATUS gpuacctGetProcAcctInfo(struct GpuAccounting *arg0, NV0000_CTRL_GPUACCT_GET_PROC_ACCOUNTING_INFO_PARAMS *arg1) { +static inline NV_STATUS gpuacctGetProcAcctInfo(struct GpuAccounting *arg1, NV0000_CTRL_GPUACCT_GET_PROC_ACCOUNTING_INFO_PARAMS *arg2) { NV_ASSERT_FAILED_PRECOMP("GpuAccounting was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_acct_h_disabled -#define gpuacctGetProcAcctInfo(arg0, arg1) gpuacctGetProcAcctInfo_IMPL(arg0, arg1) +#define gpuacctGetProcAcctInfo(arg1, arg2) gpuacctGetProcAcctInfo_IMPL(arg1, arg2) #endif //__nvoc_gpu_acct_h_disabled -NV_STATUS gpuacctGetAcctPids_IMPL(struct GpuAccounting *arg0, NV0000_CTRL_GPUACCT_GET_ACCOUNTING_PIDS_PARAMS *arg1); +NV_STATUS gpuacctGetAcctPids_IMPL(struct GpuAccounting *arg1, NV0000_CTRL_GPUACCT_GET_ACCOUNTING_PIDS_PARAMS *arg2); #ifdef __nvoc_gpu_acct_h_disabled -static inline NV_STATUS gpuacctGetAcctPids(struct GpuAccounting *arg0, NV0000_CTRL_GPUACCT_GET_ACCOUNTING_PIDS_PARAMS *arg1) { +static inline NV_STATUS gpuacctGetAcctPids(struct GpuAccounting *arg1, NV0000_CTRL_GPUACCT_GET_ACCOUNTING_PIDS_PARAMS *arg2) { NV_ASSERT_FAILED_PRECOMP("GpuAccounting was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_acct_h_disabled -#define gpuacctGetAcctPids(arg0, arg1) gpuacctGetAcctPids_IMPL(arg0, arg1) +#define gpuacctGetAcctPids(arg1, arg2) gpuacctGetAcctPids_IMPL(arg1, arg2) #endif //__nvoc_gpu_acct_h_disabled -NV_STATUS gpuacctSetProcType_IMPL(struct GpuAccounting *arg0, NvU32 arg1, NvU32 arg2, NvU32 arg3, NvU32 arg4); +NV_STATUS gpuacctSetProcType_IMPL(struct GpuAccounting *arg1, NvU32 arg2, NvU32 arg3, NvU32 arg4, NvU32 arg5); #ifdef __nvoc_gpu_acct_h_disabled -static inline NV_STATUS gpuacctSetProcType(struct GpuAccounting *arg0, NvU32 arg1, NvU32 arg2, NvU32 arg3, NvU32 arg4) { +static inline NV_STATUS gpuacctSetProcType(struct GpuAccounting *arg1, NvU32 arg2, NvU32 arg3, NvU32 arg4, NvU32 arg5) { NV_ASSERT_FAILED_PRECOMP("GpuAccounting was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_acct_h_disabled -#define gpuacctSetProcType(arg0, arg1, arg2, arg3, arg4) gpuacctSetProcType_IMPL(arg0, arg1, arg2, arg3, arg4) +#define gpuacctSetProcType(arg1, arg2, arg3, arg4, arg5) gpuacctSetProcType_IMPL(arg1, arg2, arg3, arg4, arg5) #endif //__nvoc_gpu_acct_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_gpu_boost_mgr_nvoc.c b/src/nvidia/generated/g_gpu_boost_mgr_nvoc.c index 6cfcb3d50f..b688f2b56d 100644 --- a/src/nvidia/generated/g_gpu_boost_mgr_nvoc.c +++ b/src/nvidia/generated/g_gpu_boost_mgr_nvoc.c @@ -93,10 +93,13 @@ NV_STATUS __nvoc_ctor_OBJGPUBOOSTMGR(OBJGPUBOOSTMGR *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJGPUBOOSTMGR_1(OBJGPUBOOSTMGR *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_OBJGPUBOOSTMGR_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_OBJGPUBOOSTMGR(OBJGPUBOOSTMGR *pThis) { __nvoc_init_funcTable_OBJGPUBOOSTMGR_1(pThis); } diff --git a/src/nvidia/generated/g_gpu_boost_mgr_nvoc.h b/src/nvidia/generated/g_gpu_boost_mgr_nvoc.h index bcce325777..637aa429fb 100644 --- a/src/nvidia/generated/g_gpu_boost_mgr_nvoc.h +++ b/src/nvidia/generated/g_gpu_boost_mgr_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_GPU_BOOST_MGR_NVOC_H_ #define _G_GPU_BOOST_MGR_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_gpu_boost_mgr_nvoc.h" #ifndef GPU_BOOST_MGR_H @@ -105,11 +113,20 @@ typedef struct SYNC_GPU_BOOST_GROUP #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJGPUBOOSTMGR { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct OBJGPUBOOSTMGR *__nvoc_pbase_OBJGPUBOOSTMGR; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct OBJGPUBOOSTMGR *__nvoc_pbase_OBJGPUBOOSTMGR; // gpuboostmgr + + // Data members NODE *pGpuIdTree; NvU32 groupCount; SYNC_GPU_BOOST_GROUP pBoostGroups[16]; @@ -124,6 +141,7 @@ typedef struct OBJGPUBOOSTMGR OBJGPUBOOSTMGR; #define __nvoc_class_id_OBJGPUBOOSTMGR 0x9f6bbf #endif /* __nvoc_class_id_OBJGPUBOOSTMGR */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPUBOOSTMGR; #define __staticCast_OBJGPUBOOSTMGR(pThis) \ @@ -136,13 +154,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPUBOOSTMGR; ((OBJGPUBOOSTMGR*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJGPUBOOSTMGR))) #endif //__nvoc_gpu_boost_mgr_h_disabled - NV_STATUS __nvoc_objCreateDynamic_OBJGPUBOOSTMGR(OBJGPUBOOSTMGR**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_OBJGPUBOOSTMGR(OBJGPUBOOSTMGR**, Dynamic*, NvU32); #define __objCreate_OBJGPUBOOSTMGR(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJGPUBOOSTMGR((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS gpuboostmgrConstruct_IMPL(struct OBJGPUBOOSTMGR *arg_pBoostMgr); #define __nvoc_gpuboostmgrConstruct(arg_pBoostMgr) gpuboostmgrConstruct_IMPL(arg_pBoostMgr) diff --git a/src/nvidia/generated/g_gpu_class_list.c b/src/nvidia/generated/g_gpu_class_list.c index 395d2d38ab..ff4aa5a31f 100644 --- a/src/nvidia/generated/g_gpu_class_list.c +++ b/src/nvidia/generated/g_gpu_class_list.c @@ -866,7 +866,7 @@ gpuGetClassDescriptorList_AD102(POBJGPU pGpu, NvU32 *pNumClassDescriptors) #define HALAD102_NUM_CLASS_DESCS (sizeof(halAD102ClassDescriptorList) / sizeof(CLASSDESCRIPTOR)) - #define HALAD102_NUM_CLASSES 60 + #define HALAD102_NUM_CLASSES 61 ct_assert(NV0080_CTRL_GPU_CLASSLIST_MAX_SIZE >= HALAD102_NUM_CLASSES); @@ -946,7 +946,7 @@ gpuGetClassDescriptorList_AD103(POBJGPU pGpu, NvU32 *pNumClassDescriptors) #define HALAD103_NUM_CLASS_DESCS (sizeof(halAD103ClassDescriptorList) / sizeof(CLASSDESCRIPTOR)) - #define HALAD103_NUM_CLASSES 60 + #define HALAD103_NUM_CLASSES 61 ct_assert(NV0080_CTRL_GPU_CLASSLIST_MAX_SIZE >= HALAD103_NUM_CLASSES); @@ -1026,7 +1026,7 @@ gpuGetClassDescriptorList_AD104(POBJGPU pGpu, NvU32 *pNumClassDescriptors) #define HALAD104_NUM_CLASS_DESCS (sizeof(halAD104ClassDescriptorList) / sizeof(CLASSDESCRIPTOR)) - #define HALAD104_NUM_CLASSES 60 + #define HALAD104_NUM_CLASSES 61 ct_assert(NV0080_CTRL_GPU_CLASSLIST_MAX_SIZE >= HALAD104_NUM_CLASSES); @@ -1106,7 +1106,7 @@ gpuGetClassDescriptorList_AD106(POBJGPU pGpu, NvU32 *pNumClassDescriptors) #define HALAD106_NUM_CLASS_DESCS (sizeof(halAD106ClassDescriptorList) / sizeof(CLASSDESCRIPTOR)) - #define HALAD106_NUM_CLASSES 60 + #define HALAD106_NUM_CLASSES 61 ct_assert(NV0080_CTRL_GPU_CLASSLIST_MAX_SIZE >= HALAD106_NUM_CLASSES); @@ -1186,7 +1186,7 @@ gpuGetClassDescriptorList_AD107(POBJGPU pGpu, NvU32 *pNumClassDescriptors) #define HALAD107_NUM_CLASS_DESCS (sizeof(halAD107ClassDescriptorList) / sizeof(CLASSDESCRIPTOR)) - #define HALAD107_NUM_CLASSES 60 + #define HALAD107_NUM_CLASSES 61 ct_assert(NV0080_CTRL_GPU_CLASSLIST_MAX_SIZE >= HALAD107_NUM_CLASSES); diff --git a/src/nvidia/generated/g_gpu_db_nvoc.c b/src/nvidia/generated/g_gpu_db_nvoc.c index d71351dc26..90c297a646 100644 --- a/src/nvidia/generated/g_gpu_db_nvoc.c +++ b/src/nvidia/generated/g_gpu_db_nvoc.c @@ -93,10 +93,13 @@ NV_STATUS __nvoc_ctor_GpuDb(GpuDb *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_GpuDb_1(GpuDb *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_GpuDb_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_GpuDb(GpuDb *pThis) { __nvoc_init_funcTable_GpuDb_1(pThis); } diff --git a/src/nvidia/generated/g_gpu_db_nvoc.h b/src/nvidia/generated/g_gpu_db_nvoc.h index 42d33ff1ea..def236f8b9 100644 --- a/src/nvidia/generated/g_gpu_db_nvoc.h +++ b/src/nvidia/generated/g_gpu_db_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_GPU_DB_NVOC_H_ #define _G_GPU_DB_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_gpu_db_nvoc.h" #ifndef GPU_DB_H @@ -101,11 +109,20 @@ MAKE_LIST(GpuInfoList, GPU_INFO_LIST_NODE); #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct GpuDb { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct GpuDb *__nvoc_pbase_GpuDb; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct GpuDb *__nvoc_pbase_GpuDb; // gpudb + + // Data members GpuInfoList gpuList; PORT_MUTEX *pLock; }; @@ -119,6 +136,7 @@ typedef struct GpuDb GpuDb; #define __nvoc_class_id_GpuDb 0xcdd250 #endif /* __nvoc_class_id_GpuDb */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_GpuDb; #define __staticCast_GpuDb(pThis) \ @@ -131,13 +149,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_GpuDb; ((GpuDb*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(GpuDb))) #endif //__nvoc_gpu_db_h_disabled - NV_STATUS __nvoc_objCreateDynamic_GpuDb(GpuDb**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_GpuDb(GpuDb**, Dynamic*, NvU32); #define __objCreate_GpuDb(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_GpuDb((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS gpudbConstruct_IMPL(struct GpuDb *arg_pGpuDb); #define __nvoc_gpudbConstruct(arg_pGpuDb) gpudbConstruct_IMPL(arg_pGpuDb) diff --git a/src/nvidia/generated/g_gpu_group_nvoc.c b/src/nvidia/generated/g_gpu_group_nvoc.c index 5636517e3d..a95469201f 100644 --- a/src/nvidia/generated/g_gpu_group_nvoc.c +++ b/src/nvidia/generated/g_gpu_group_nvoc.c @@ -87,10 +87,13 @@ NV_STATUS __nvoc_ctor_OBJGPUGRP(OBJGPUGRP *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJGPUGRP_1(OBJGPUGRP *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_OBJGPUGRP_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_OBJGPUGRP(OBJGPUGRP *pThis) { __nvoc_init_funcTable_OBJGPUGRP_1(pThis); } diff --git a/src/nvidia/generated/g_gpu_group_nvoc.h b/src/nvidia/generated/g_gpu_group_nvoc.h index 18ac1223b6..4be10b50e0 100644 --- a/src/nvidia/generated/g_gpu_group_nvoc.h +++ b/src/nvidia/generated/g_gpu_group_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_GPU_GROUP_NVOC_H_ #define _G_GPU_GROUP_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_gpu_group_nvoc.h" #ifndef GPU_GROUP_H @@ -127,11 +135,20 @@ typedef struct _def_vid_link_node #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJGPUGRP { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct OBJGPUGRP *__nvoc_pbase_OBJGPUGRP; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct OBJGPUGRP *__nvoc_pbase_OBJGPUGRP; // gpugrp + + // Data members NvU32 gpuMask; NvU32 gpuSliLinkMask; NvU32 linkingGpuMask; @@ -154,6 +171,7 @@ typedef struct OBJGPUGRP OBJGPUGRP; #define __nvoc_class_id_OBJGPUGRP 0xe40531 #endif /* __nvoc_class_id_OBJGPUGRP */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPUGRP; #define __staticCast_OBJGPUGRP(pThis) \ @@ -166,13 +184,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPUGRP; ((OBJGPUGRP*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJGPUGRP))) #endif //__nvoc_gpu_group_h_disabled - NV_STATUS __nvoc_objCreateDynamic_OBJGPUGRP(OBJGPUGRP**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_OBJGPUGRP(OBJGPUGRP**, Dynamic*, NvU32); #define __objCreate_OBJGPUGRP(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJGPUGRP((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS gpugrpCreate_IMPL(struct OBJGPUGRP *pGpuGrp, NvU32 gpuMask); #ifdef __nvoc_gpu_group_h_disabled diff --git a/src/nvidia/generated/g_gpu_halspec_nvoc.c b/src/nvidia/generated/g_gpu_halspec_nvoc.c index 4e4362f54d..dec7db4926 100644 --- a/src/nvidia/generated/g_gpu_halspec_nvoc.c +++ b/src/nvidia/generated/g_gpu_halspec_nvoc.c @@ -77,10 +77,13 @@ NV_STATUS __nvoc_ctor_RmHalspecOwner(RmHalspecOwner *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_RmHalspecOwner_1(RmHalspecOwner *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_RmHalspecOwner_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_RmHalspecOwner(RmHalspecOwner *pThis) { __nvoc_init_funcTable_RmHalspecOwner_1(pThis); } diff --git a/src/nvidia/generated/g_gpu_halspec_nvoc.h b/src/nvidia/generated/g_gpu_halspec_nvoc.h index 926b0df9ab..9165a8ce59 100644 --- a/src/nvidia/generated/g_gpu_halspec_nvoc.h +++ b/src/nvidia/generated/g_gpu_halspec_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_GPU_HALSPEC_NVOC_H_ #define _G_GPU_HALSPEC_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_gpu_halspec_nvoc.h" #ifndef GPU_HALSPEC_H @@ -46,9 +54,16 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct RmHalspecOwner { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; - struct RmHalspecOwner *__nvoc_pbase_RmHalspecOwner; + + // Ancestor object pointers for `staticCast` feature + struct RmHalspecOwner *__nvoc_pbase_RmHalspecOwner; // rmhalspecowner + + // Data members struct ChipHal chipHal; struct RmVariantHal rmVariantHal; struct TegraChipHal tegraChipHal; @@ -64,6 +79,7 @@ typedef struct RmHalspecOwner RmHalspecOwner; #define __nvoc_class_id_RmHalspecOwner 0x34a6d6 #endif /* __nvoc_class_id_RmHalspecOwner */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmHalspecOwner; #define __staticCast_RmHalspecOwner(pThis) \ @@ -76,7 +92,6 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmHalspecOwner; ((RmHalspecOwner*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(RmHalspecOwner))) #endif //__nvoc_gpu_halspec_h_disabled - NV_STATUS __nvoc_objCreateDynamic_RmHalspecOwner(RmHalspecOwner**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_RmHalspecOwner(RmHalspecOwner**, Dynamic*, NvU32, diff --git a/src/nvidia/generated/g_gpu_instance_subscription_nvoc.c b/src/nvidia/generated/g_gpu_instance_subscription_nvoc.c index 5de123bae1..f2d5377390 100644 --- a/src/nvidia/generated/g_gpu_instance_subscription_nvoc.c +++ b/src/nvidia/generated/g_gpu_instance_subscription_nvoc.c @@ -93,106 +93,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_GPUInstanceSubscription = /*pExportInfo=*/ &__nvoc_export_info_GPUInstanceSubscription }; -static NvBool __nvoc_thunk_GPUInstanceSubscription_resCanCopy(struct RsResource *arg0) { - return gisubscriptionCanCopy((struct GPUInstanceSubscription *)(((unsigned char *)arg0) - __nvoc_rtti_GPUInstanceSubscription_RsResource.offset)); -} - -static NvBool __nvoc_thunk_GpuResource_gisubscriptionShareCallback(struct GPUInstanceSubscription *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_gisubscriptionCheckMemInterUnmap(struct GPUInstanceSubscription *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RsResource_gisubscriptionMapTo(struct GPUInstanceSubscription *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_gisubscriptionGetMapAddrSpace(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} - -static NvU32 __nvoc_thunk_RsResource_gisubscriptionGetRefCount(struct GPUInstanceSubscription *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_gisubscriptionAddAdditionalDependants(struct RsClient *pClient, struct GPUInstanceSubscription *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_gisubscriptionControl_Prologue(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_gisubscriptionGetRegBaseOffsetAndSize(struct GPUInstanceSubscription *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), pGpu, pOffset, pSize); -} - -static NV_STATUS __nvoc_thunk_GpuResource_gisubscriptionInternalControlForward(struct GPUInstanceSubscription *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), command, pParams, size); -} - -static NV_STATUS __nvoc_thunk_RsResource_gisubscriptionUnmapFrom(struct GPUInstanceSubscription *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_gisubscriptionControl_Epilogue(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), pCallContext, pParams); -} - -static NvHandle __nvoc_thunk_GpuResource_gisubscriptionGetInternalObjectHandle(struct GPUInstanceSubscription *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_gisubscriptionControl(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_gisubscriptionUnmap(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_gisubscriptionGetMemInterMapParams(struct GPUInstanceSubscription *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_gisubscriptionGetMemoryMappingDescriptor(struct GPUInstanceSubscription *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_gisubscriptionControlFilter(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_gisubscriptionControlSerialization_Prologue(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_gisubscriptionIsPartialUnmapSupported(struct GPUInstanceSubscription *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_gisubscriptionPreDestruct(struct GPUInstanceSubscription *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_gisubscriptionIsDuplicate(struct GPUInstanceSubscription *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_gisubscriptionControlSerialization_Epilogue(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_gisubscriptionMap(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_gisubscriptionAccessCallback(struct GPUInstanceSubscription *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -200,12 +100,12 @@ static NvBool __nvoc_thunk_RmResource_gisubscriptionAccessCallback(struct GPUIns static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GPUInstanceSubscription[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gisubscriptionCtrlCmdExecPartitionsCreate_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xc6370101u, /*paramSize=*/ sizeof(NVC637_CTRL_EXEC_PARTITIONS_CREATE_PARAMS), @@ -215,12 +115,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GPUInsta #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gisubscriptionCtrlCmdExecPartitionsDelete_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xc6370102u, /*paramSize=*/ sizeof(NVC637_CTRL_EXEC_PARTITIONS_DELETE_PARAMS), @@ -230,12 +130,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GPUInsta #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gisubscriptionCtrlCmdExecPartitionsGet_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xc6370103u, /*paramSize=*/ sizeof(NVC637_CTRL_EXEC_PARTITIONS_GET_PARAMS), @@ -245,12 +145,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GPUInsta #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gisubscriptionCtrlCmdExecPartitionsGetActiveIds_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xc6370104u, /*paramSize=*/ sizeof(NVC637_CTRL_EXEC_PARTITIONS_GET_ACTIVE_IDS_PARAMS), @@ -260,12 +160,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GPUInsta #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gisubscriptionCtrlCmdExecPartitionsExport_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400u) - /*flags=*/ 0x400u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80u) + /*flags=*/ 0x80u, /*accessRight=*/0x0u, /*methodId=*/ 0xc6370105u, /*paramSize=*/ sizeof(NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS), @@ -275,12 +175,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GPUInsta #endif }, { /* [5] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gisubscriptionCtrlCmdExecPartitionsImport_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400u) - /*flags=*/ 0x400u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80u) + /*flags=*/ 0x80u, /*accessRight=*/0x0u, /*methodId=*/ 0xc6370106u, /*paramSize=*/ sizeof(NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS), @@ -290,12 +190,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GPUInsta #endif }, { /* [6] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xc63701a9u, /*paramSize=*/ sizeof(NVC637_CTRL_EXEC_PARTITIONS_GET_PROFILE_CAPACITY_PARAMS), @@ -305,12 +205,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GPUInsta #endif }, { /* [7] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gisubscriptionCtrlCmdGetUuid_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xc63701aau, /*paramSize=*/ sizeof(NVC637_CTRL_GET_UUID_PARAMS), @@ -322,6 +222,137 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GPUInsta }; +// 1 down-thunk(s) defined to bridge methods in GPUInstanceSubscription from superclasses + +// gisubscriptionCanCopy: virtual override (res) base (gpures) +static NvBool __nvoc_down_thunk_GPUInstanceSubscription_resCanCopy(struct RsResource *arg_this) { + return gisubscriptionCanCopy((struct GPUInstanceSubscription *)(((unsigned char *) arg_this) - __nvoc_rtti_GPUInstanceSubscription_RsResource.offset)); +} + + +// 24 up-thunk(s) defined to bridge methods in GPUInstanceSubscription to superclasses + +// gisubscriptionControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionControl(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), pCallContext, pParams); +} + +// gisubscriptionMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionMap(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// gisubscriptionUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionUnmap(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), pCallContext, pCpuMapping); +} + +// gisubscriptionShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_gisubscriptionShareCallback(struct GPUInstanceSubscription *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// gisubscriptionGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionGetRegBaseOffsetAndSize(struct GPUInstanceSubscription *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), pGpu, pOffset, pSize); +} + +// gisubscriptionGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionGetMapAddrSpace(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + +// gisubscriptionInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionInternalControlForward(struct GPUInstanceSubscription *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), command, pParams, size); +} + +// gisubscriptionGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_gisubscriptionGetInternalObjectHandle(struct GPUInstanceSubscription *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset)); +} + +// gisubscriptionAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_gisubscriptionAccessCallback(struct GPUInstanceSubscription *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// gisubscriptionGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_gisubscriptionGetMemInterMapParams(struct GPUInstanceSubscription *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), pParams); +} + +// gisubscriptionCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_gisubscriptionCheckMemInterUnmap(struct GPUInstanceSubscription *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), bSubdeviceHandleProvided); +} + +// gisubscriptionGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_gisubscriptionGetMemoryMappingDescriptor(struct GPUInstanceSubscription *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), ppMemDesc); +} + +// gisubscriptionControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_gisubscriptionControlSerialization_Prologue(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), pCallContext, pParams); +} + +// gisubscriptionControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_gisubscriptionControlSerialization_Epilogue(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), pCallContext, pParams); +} + +// gisubscriptionControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_gisubscriptionControl_Prologue(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), pCallContext, pParams); +} + +// gisubscriptionControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_gisubscriptionControl_Epilogue(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), pCallContext, pParams); +} + +// gisubscriptionIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_gisubscriptionIsDuplicate(struct GPUInstanceSubscription *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset), hMemory, pDuplicate); +} + +// gisubscriptionPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_gisubscriptionPreDestruct(struct GPUInstanceSubscription *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset)); +} + +// gisubscriptionControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_gisubscriptionControlFilter(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset), pCallContext, pParams); +} + +// gisubscriptionIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_gisubscriptionIsPartialUnmapSupported(struct GPUInstanceSubscription *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset)); +} + +// gisubscriptionMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_gisubscriptionMapTo(struct GPUInstanceSubscription *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset), pParams); +} + +// gisubscriptionUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_gisubscriptionUnmapFrom(struct GPUInstanceSubscription *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset), pParams); +} + +// gisubscriptionGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_gisubscriptionGetRefCount(struct GPUInstanceSubscription *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset)); +} + +// gisubscriptionAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_gisubscriptionAddAdditionalDependants(struct RsClient *pClient, struct GPUInstanceSubscription *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset), pReference); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_GPUInstanceSubscription = { /*numEntries=*/ 8, @@ -358,95 +389,132 @@ NV_STATUS __nvoc_ctor_GPUInstanceSubscription(GPUInstanceSubscription *pThis, CA return status; } +// Vtable initialization static void __nvoc_init_funcTable_GPUInstanceSubscription_1(GPUInstanceSubscription *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // gisubscriptionCanCopy -- virtual override (res) base (gpures) pThis->__gisubscriptionCanCopy__ = &gisubscriptionCanCopy_IMPL; + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_GPUInstanceSubscription_resCanCopy; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gisubscriptionCtrlCmdExecPartitionsCreate -- exported (id=0xc6370101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gisubscriptionCtrlCmdExecPartitionsCreate__ = &gisubscriptionCtrlCmdExecPartitionsCreate_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gisubscriptionCtrlCmdExecPartitionsDelete -- exported (id=0xc6370102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gisubscriptionCtrlCmdExecPartitionsDelete__ = &gisubscriptionCtrlCmdExecPartitionsDelete_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gisubscriptionCtrlCmdExecPartitionsGet -- exported (id=0xc6370103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gisubscriptionCtrlCmdExecPartitionsGet__ = &gisubscriptionCtrlCmdExecPartitionsGet_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity -- exported (id=0xc63701a9) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity__ = &gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gisubscriptionCtrlCmdExecPartitionsGetActiveIds -- exported (id=0xc6370104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gisubscriptionCtrlCmdExecPartitionsGetActiveIds__ = &gisubscriptionCtrlCmdExecPartitionsGetActiveIds_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400u) + // gisubscriptionCtrlCmdExecPartitionsExport -- exported (id=0xc6370105) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80u) pThis->__gisubscriptionCtrlCmdExecPartitionsExport__ = &gisubscriptionCtrlCmdExecPartitionsExport_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400u) + // gisubscriptionCtrlCmdExecPartitionsImport -- exported (id=0xc6370106) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80u) pThis->__gisubscriptionCtrlCmdExecPartitionsImport__ = &gisubscriptionCtrlCmdExecPartitionsImport_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gisubscriptionCtrlCmdGetUuid -- exported (id=0xc63701aa) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gisubscriptionCtrlCmdGetUuid__ = &gisubscriptionCtrlCmdGetUuid_IMPL; #endif - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_GPUInstanceSubscription_resCanCopy; + // gisubscriptionControl -- virtual inherited (gpures) base (gpures) + pThis->__gisubscriptionControl__ = &__nvoc_up_thunk_GpuResource_gisubscriptionControl; - pThis->__gisubscriptionShareCallback__ = &__nvoc_thunk_GpuResource_gisubscriptionShareCallback; + // gisubscriptionMap -- virtual inherited (gpures) base (gpures) + pThis->__gisubscriptionMap__ = &__nvoc_up_thunk_GpuResource_gisubscriptionMap; - pThis->__gisubscriptionCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_gisubscriptionCheckMemInterUnmap; + // gisubscriptionUnmap -- virtual inherited (gpures) base (gpures) + pThis->__gisubscriptionUnmap__ = &__nvoc_up_thunk_GpuResource_gisubscriptionUnmap; - pThis->__gisubscriptionMapTo__ = &__nvoc_thunk_RsResource_gisubscriptionMapTo; + // gisubscriptionShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__gisubscriptionShareCallback__ = &__nvoc_up_thunk_GpuResource_gisubscriptionShareCallback; - pThis->__gisubscriptionGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_gisubscriptionGetMapAddrSpace; + // gisubscriptionGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__gisubscriptionGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_gisubscriptionGetRegBaseOffsetAndSize; - pThis->__gisubscriptionGetRefCount__ = &__nvoc_thunk_RsResource_gisubscriptionGetRefCount; + // gisubscriptionGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__gisubscriptionGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_gisubscriptionGetMapAddrSpace; - pThis->__gisubscriptionAddAdditionalDependants__ = &__nvoc_thunk_RsResource_gisubscriptionAddAdditionalDependants; + // gisubscriptionInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__gisubscriptionInternalControlForward__ = &__nvoc_up_thunk_GpuResource_gisubscriptionInternalControlForward; - pThis->__gisubscriptionControl_Prologue__ = &__nvoc_thunk_RmResource_gisubscriptionControl_Prologue; + // gisubscriptionGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__gisubscriptionGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_gisubscriptionGetInternalObjectHandle; - pThis->__gisubscriptionGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_gisubscriptionGetRegBaseOffsetAndSize; + // gisubscriptionAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__gisubscriptionAccessCallback__ = &__nvoc_up_thunk_RmResource_gisubscriptionAccessCallback; - pThis->__gisubscriptionInternalControlForward__ = &__nvoc_thunk_GpuResource_gisubscriptionInternalControlForward; + // gisubscriptionGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__gisubscriptionGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gisubscriptionGetMemInterMapParams; - pThis->__gisubscriptionUnmapFrom__ = &__nvoc_thunk_RsResource_gisubscriptionUnmapFrom; + // gisubscriptionCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__gisubscriptionCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gisubscriptionCheckMemInterUnmap; - pThis->__gisubscriptionControl_Epilogue__ = &__nvoc_thunk_RmResource_gisubscriptionControl_Epilogue; + // gisubscriptionGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__gisubscriptionGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gisubscriptionGetMemoryMappingDescriptor; - pThis->__gisubscriptionGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_gisubscriptionGetInternalObjectHandle; + // gisubscriptionControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__gisubscriptionControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gisubscriptionControlSerialization_Prologue; - pThis->__gisubscriptionControl__ = &__nvoc_thunk_GpuResource_gisubscriptionControl; + // gisubscriptionControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__gisubscriptionControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gisubscriptionControlSerialization_Epilogue; - pThis->__gisubscriptionUnmap__ = &__nvoc_thunk_GpuResource_gisubscriptionUnmap; + // gisubscriptionControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__gisubscriptionControl_Prologue__ = &__nvoc_up_thunk_RmResource_gisubscriptionControl_Prologue; - pThis->__gisubscriptionGetMemInterMapParams__ = &__nvoc_thunk_RmResource_gisubscriptionGetMemInterMapParams; + // gisubscriptionControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__gisubscriptionControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gisubscriptionControl_Epilogue; - pThis->__gisubscriptionGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_gisubscriptionGetMemoryMappingDescriptor; + // gisubscriptionIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__gisubscriptionIsDuplicate__ = &__nvoc_up_thunk_RsResource_gisubscriptionIsDuplicate; - pThis->__gisubscriptionControlFilter__ = &__nvoc_thunk_RsResource_gisubscriptionControlFilter; + // gisubscriptionPreDestruct -- virtual inherited (res) base (gpures) + pThis->__gisubscriptionPreDestruct__ = &__nvoc_up_thunk_RsResource_gisubscriptionPreDestruct; - pThis->__gisubscriptionControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_gisubscriptionControlSerialization_Prologue; + // gisubscriptionControlFilter -- virtual inherited (res) base (gpures) + pThis->__gisubscriptionControlFilter__ = &__nvoc_up_thunk_RsResource_gisubscriptionControlFilter; - pThis->__gisubscriptionIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_gisubscriptionIsPartialUnmapSupported; + // gisubscriptionIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__gisubscriptionIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gisubscriptionIsPartialUnmapSupported; - pThis->__gisubscriptionPreDestruct__ = &__nvoc_thunk_RsResource_gisubscriptionPreDestruct; + // gisubscriptionMapTo -- virtual inherited (res) base (gpures) + pThis->__gisubscriptionMapTo__ = &__nvoc_up_thunk_RsResource_gisubscriptionMapTo; - pThis->__gisubscriptionIsDuplicate__ = &__nvoc_thunk_RsResource_gisubscriptionIsDuplicate; + // gisubscriptionUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__gisubscriptionUnmapFrom__ = &__nvoc_up_thunk_RsResource_gisubscriptionUnmapFrom; - pThis->__gisubscriptionControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_gisubscriptionControlSerialization_Epilogue; + // gisubscriptionGetRefCount -- virtual inherited (res) base (gpures) + pThis->__gisubscriptionGetRefCount__ = &__nvoc_up_thunk_RsResource_gisubscriptionGetRefCount; - pThis->__gisubscriptionMap__ = &__nvoc_thunk_GpuResource_gisubscriptionMap; + // gisubscriptionAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__gisubscriptionAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gisubscriptionAddAdditionalDependants; +} // End __nvoc_init_funcTable_GPUInstanceSubscription_1 with approximately 34 basic block(s). - pThis->__gisubscriptionAccessCallback__ = &__nvoc_thunk_RmResource_gisubscriptionAccessCallback; -} +// Initialize vtable(s) for 33 virtual method(s). void __nvoc_init_funcTable_GPUInstanceSubscription(GPUInstanceSubscription *pThis) { + + // Initialize vtable(s) with 33 per-object function pointer(s). __nvoc_init_funcTable_GPUInstanceSubscription_1(pThis); } diff --git a/src/nvidia/generated/g_gpu_instance_subscription_nvoc.h b/src/nvidia/generated/g_gpu_instance_subscription_nvoc.h index 8f9c1c74b5..29eddfc527 100644 --- a/src/nvidia/generated/g_gpu_instance_subscription_nvoc.h +++ b/src/nvidia/generated/g_gpu_instance_subscription_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_GPU_INSTANCE_SUBSCRIPTION_NVOC_H_ #define _G_GPU_INSTANCE_SUBSCRIPTION_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -36,6 +43,7 @@ extern "C" { * *****************************************************************************/ +#pragma once #include "g_gpu_instance_subscription_nvoc.h" #ifndef GPU_INSTANCE_SUBSCRIPTION_H @@ -59,96 +67,118 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct GPUInstanceSubscription { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct GPUInstanceSubscription *__nvoc_pbase_GPUInstanceSubscription; - NvBool (*__gisubscriptionCanCopy__)(struct GPUInstanceSubscription *); - NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsCreate__)(struct GPUInstanceSubscription *, NVC637_CTRL_EXEC_PARTITIONS_CREATE_PARAMS *); - NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsDelete__)(struct GPUInstanceSubscription *, NVC637_CTRL_EXEC_PARTITIONS_DELETE_PARAMS *); - NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsGet__)(struct GPUInstanceSubscription *, NVC637_CTRL_EXEC_PARTITIONS_GET_PARAMS *); - NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity__)(struct GPUInstanceSubscription *, NVC637_CTRL_EXEC_PARTITIONS_GET_PROFILE_CAPACITY_PARAMS *); - NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsGetActiveIds__)(struct GPUInstanceSubscription *, NVC637_CTRL_EXEC_PARTITIONS_GET_ACTIVE_IDS_PARAMS *); - NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsExport__)(struct GPUInstanceSubscription *, NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS *); - NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsImport__)(struct GPUInstanceSubscription *, NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS *); - NV_STATUS (*__gisubscriptionCtrlCmdGetUuid__)(struct GPUInstanceSubscription *, NVC637_CTRL_GET_UUID_PARAMS *); - NvBool (*__gisubscriptionShareCallback__)(struct GPUInstanceSubscription *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__gisubscriptionCheckMemInterUnmap__)(struct GPUInstanceSubscription *, NvBool); - NV_STATUS (*__gisubscriptionMapTo__)(struct GPUInstanceSubscription *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__gisubscriptionGetMapAddrSpace__)(struct GPUInstanceSubscription *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__gisubscriptionGetRefCount__)(struct GPUInstanceSubscription *); - void (*__gisubscriptionAddAdditionalDependants__)(struct RsClient *, struct GPUInstanceSubscription *, RsResourceRef *); - NV_STATUS (*__gisubscriptionControl_Prologue__)(struct GPUInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gisubscriptionGetRegBaseOffsetAndSize__)(struct GPUInstanceSubscription *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__gisubscriptionInternalControlForward__)(struct GPUInstanceSubscription *, NvU32, void *, NvU32); - NV_STATUS (*__gisubscriptionUnmapFrom__)(struct GPUInstanceSubscription *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__gisubscriptionControl_Epilogue__)(struct GPUInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__gisubscriptionGetInternalObjectHandle__)(struct GPUInstanceSubscription *); - NV_STATUS (*__gisubscriptionControl__)(struct GPUInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gisubscriptionUnmap__)(struct GPUInstanceSubscription *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__gisubscriptionGetMemInterMapParams__)(struct GPUInstanceSubscription *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__gisubscriptionGetMemoryMappingDescriptor__)(struct GPUInstanceSubscription *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__gisubscriptionControlFilter__)(struct GPUInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gisubscriptionControlSerialization_Prologue__)(struct GPUInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__gisubscriptionIsPartialUnmapSupported__)(struct GPUInstanceSubscription *); - void (*__gisubscriptionPreDestruct__)(struct GPUInstanceSubscription *); - NV_STATUS (*__gisubscriptionIsDuplicate__)(struct GPUInstanceSubscription *, NvHandle, NvBool *); - void (*__gisubscriptionControlSerialization_Epilogue__)(struct GPUInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gisubscriptionMap__)(struct GPUInstanceSubscription *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__gisubscriptionAccessCallback__)(struct GPUInstanceSubscription *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct GPUInstanceSubscription *__nvoc_pbase_GPUInstanceSubscription; // gisubscription + + // Vtable with 33 per-object function pointers + NvBool (*__gisubscriptionCanCopy__)(struct GPUInstanceSubscription * /*this*/); // virtual override (res) base (gpures) + NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsCreate__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_CREATE_PARAMS *); // exported (id=0xc6370101) + NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsDelete__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_DELETE_PARAMS *); // exported (id=0xc6370102) + NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsGet__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_GET_PARAMS *); // exported (id=0xc6370103) + NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_GET_PROFILE_CAPACITY_PARAMS *); // exported (id=0xc63701a9) + NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsGetActiveIds__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_GET_ACTIVE_IDS_PARAMS *); // exported (id=0xc6370104) + NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsExport__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS *); // exported (id=0xc6370105) + NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsImport__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS *); // exported (id=0xc6370106) + NV_STATUS (*__gisubscriptionCtrlCmdGetUuid__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_GET_UUID_PARAMS *); // exported (id=0xc63701aa) + NV_STATUS (*__gisubscriptionControl__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__gisubscriptionMap__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__gisubscriptionUnmap__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__gisubscriptionShareCallback__)(struct GPUInstanceSubscription * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__gisubscriptionGetRegBaseOffsetAndSize__)(struct GPUInstanceSubscription * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__gisubscriptionGetMapAddrSpace__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__gisubscriptionInternalControlForward__)(struct GPUInstanceSubscription * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__gisubscriptionGetInternalObjectHandle__)(struct GPUInstanceSubscription * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__gisubscriptionAccessCallback__)(struct GPUInstanceSubscription * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__gisubscriptionGetMemInterMapParams__)(struct GPUInstanceSubscription * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__gisubscriptionCheckMemInterUnmap__)(struct GPUInstanceSubscription * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__gisubscriptionGetMemoryMappingDescriptor__)(struct GPUInstanceSubscription * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__gisubscriptionControlSerialization_Prologue__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__gisubscriptionControlSerialization_Epilogue__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__gisubscriptionControl_Prologue__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__gisubscriptionControl_Epilogue__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__gisubscriptionIsDuplicate__)(struct GPUInstanceSubscription * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__gisubscriptionPreDestruct__)(struct GPUInstanceSubscription * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__gisubscriptionControlFilter__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__gisubscriptionIsPartialUnmapSupported__)(struct GPUInstanceSubscription * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__gisubscriptionMapTo__)(struct GPUInstanceSubscription * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__gisubscriptionUnmapFrom__)(struct GPUInstanceSubscription * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__gisubscriptionGetRefCount__)(struct GPUInstanceSubscription * /*this*/); // virtual inherited (res) base (gpures) + void (*__gisubscriptionAddAdditionalDependants__)(struct RsClient *, struct GPUInstanceSubscription * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members KERNEL_MIG_GPU_INSTANCE *PRIVATE_FIELD(pKernelMIGGpuInstance); NvBool PRIVATE_FIELD(bDeviceProfiling); NvBool PRIVATE_FIELD(bIsDuped); NvU64 PRIVATE_FIELD(dupedCapDescriptor); }; + struct GPUInstanceSubscription_PRIVATE { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct GPUInstanceSubscription *__nvoc_pbase_GPUInstanceSubscription; - NvBool (*__gisubscriptionCanCopy__)(struct GPUInstanceSubscription *); - NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsCreate__)(struct GPUInstanceSubscription *, NVC637_CTRL_EXEC_PARTITIONS_CREATE_PARAMS *); - NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsDelete__)(struct GPUInstanceSubscription *, NVC637_CTRL_EXEC_PARTITIONS_DELETE_PARAMS *); - NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsGet__)(struct GPUInstanceSubscription *, NVC637_CTRL_EXEC_PARTITIONS_GET_PARAMS *); - NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity__)(struct GPUInstanceSubscription *, NVC637_CTRL_EXEC_PARTITIONS_GET_PROFILE_CAPACITY_PARAMS *); - NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsGetActiveIds__)(struct GPUInstanceSubscription *, NVC637_CTRL_EXEC_PARTITIONS_GET_ACTIVE_IDS_PARAMS *); - NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsExport__)(struct GPUInstanceSubscription *, NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS *); - NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsImport__)(struct GPUInstanceSubscription *, NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS *); - NV_STATUS (*__gisubscriptionCtrlCmdGetUuid__)(struct GPUInstanceSubscription *, NVC637_CTRL_GET_UUID_PARAMS *); - NvBool (*__gisubscriptionShareCallback__)(struct GPUInstanceSubscription *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__gisubscriptionCheckMemInterUnmap__)(struct GPUInstanceSubscription *, NvBool); - NV_STATUS (*__gisubscriptionMapTo__)(struct GPUInstanceSubscription *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__gisubscriptionGetMapAddrSpace__)(struct GPUInstanceSubscription *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__gisubscriptionGetRefCount__)(struct GPUInstanceSubscription *); - void (*__gisubscriptionAddAdditionalDependants__)(struct RsClient *, struct GPUInstanceSubscription *, RsResourceRef *); - NV_STATUS (*__gisubscriptionControl_Prologue__)(struct GPUInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gisubscriptionGetRegBaseOffsetAndSize__)(struct GPUInstanceSubscription *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__gisubscriptionInternalControlForward__)(struct GPUInstanceSubscription *, NvU32, void *, NvU32); - NV_STATUS (*__gisubscriptionUnmapFrom__)(struct GPUInstanceSubscription *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__gisubscriptionControl_Epilogue__)(struct GPUInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__gisubscriptionGetInternalObjectHandle__)(struct GPUInstanceSubscription *); - NV_STATUS (*__gisubscriptionControl__)(struct GPUInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gisubscriptionUnmap__)(struct GPUInstanceSubscription *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__gisubscriptionGetMemInterMapParams__)(struct GPUInstanceSubscription *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__gisubscriptionGetMemoryMappingDescriptor__)(struct GPUInstanceSubscription *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__gisubscriptionControlFilter__)(struct GPUInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gisubscriptionControlSerialization_Prologue__)(struct GPUInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__gisubscriptionIsPartialUnmapSupported__)(struct GPUInstanceSubscription *); - void (*__gisubscriptionPreDestruct__)(struct GPUInstanceSubscription *); - NV_STATUS (*__gisubscriptionIsDuplicate__)(struct GPUInstanceSubscription *, NvHandle, NvBool *); - void (*__gisubscriptionControlSerialization_Epilogue__)(struct GPUInstanceSubscription *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gisubscriptionMap__)(struct GPUInstanceSubscription *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__gisubscriptionAccessCallback__)(struct GPUInstanceSubscription *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct GPUInstanceSubscription *__nvoc_pbase_GPUInstanceSubscription; // gisubscription + + // Vtable with 33 per-object function pointers + NvBool (*__gisubscriptionCanCopy__)(struct GPUInstanceSubscription * /*this*/); // virtual override (res) base (gpures) + NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsCreate__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_CREATE_PARAMS *); // exported (id=0xc6370101) + NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsDelete__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_DELETE_PARAMS *); // exported (id=0xc6370102) + NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsGet__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_GET_PARAMS *); // exported (id=0xc6370103) + NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_GET_PROFILE_CAPACITY_PARAMS *); // exported (id=0xc63701a9) + NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsGetActiveIds__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_GET_ACTIVE_IDS_PARAMS *); // exported (id=0xc6370104) + NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsExport__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS *); // exported (id=0xc6370105) + NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsImport__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS *); // exported (id=0xc6370106) + NV_STATUS (*__gisubscriptionCtrlCmdGetUuid__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_GET_UUID_PARAMS *); // exported (id=0xc63701aa) + NV_STATUS (*__gisubscriptionControl__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__gisubscriptionMap__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__gisubscriptionUnmap__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__gisubscriptionShareCallback__)(struct GPUInstanceSubscription * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__gisubscriptionGetRegBaseOffsetAndSize__)(struct GPUInstanceSubscription * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__gisubscriptionGetMapAddrSpace__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__gisubscriptionInternalControlForward__)(struct GPUInstanceSubscription * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__gisubscriptionGetInternalObjectHandle__)(struct GPUInstanceSubscription * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__gisubscriptionAccessCallback__)(struct GPUInstanceSubscription * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__gisubscriptionGetMemInterMapParams__)(struct GPUInstanceSubscription * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__gisubscriptionCheckMemInterUnmap__)(struct GPUInstanceSubscription * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__gisubscriptionGetMemoryMappingDescriptor__)(struct GPUInstanceSubscription * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__gisubscriptionControlSerialization_Prologue__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__gisubscriptionControlSerialization_Epilogue__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__gisubscriptionControl_Prologue__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__gisubscriptionControl_Epilogue__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__gisubscriptionIsDuplicate__)(struct GPUInstanceSubscription * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__gisubscriptionPreDestruct__)(struct GPUInstanceSubscription * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__gisubscriptionControlFilter__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__gisubscriptionIsPartialUnmapSupported__)(struct GPUInstanceSubscription * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__gisubscriptionMapTo__)(struct GPUInstanceSubscription * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__gisubscriptionUnmapFrom__)(struct GPUInstanceSubscription * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__gisubscriptionGetRefCount__)(struct GPUInstanceSubscription * /*this*/); // virtual inherited (res) base (gpures) + void (*__gisubscriptionAddAdditionalDependants__)(struct RsClient *, struct GPUInstanceSubscription * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members KERNEL_MIG_GPU_INSTANCE *pKernelMIGGpuInstance; NvBool bDeviceProfiling; NvBool bIsDuped; @@ -164,6 +194,7 @@ typedef struct GPUInstanceSubscription GPUInstanceSubscription; #define __nvoc_class_id_GPUInstanceSubscription 0x91fde7 #endif /* __nvoc_class_id_GPUInstanceSubscription */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_GPUInstanceSubscription; #define __staticCast_GPUInstanceSubscription(pThis) \ @@ -176,195 +207,231 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_GPUInstanceSubscription; ((GPUInstanceSubscription*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(GPUInstanceSubscription))) #endif //__nvoc_gpu_instance_subscription_h_disabled - NV_STATUS __nvoc_objCreateDynamic_GPUInstanceSubscription(GPUInstanceSubscription**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_GPUInstanceSubscription(GPUInstanceSubscription**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_GPUInstanceSubscription(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_GPUInstanceSubscription((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) -#define gisubscriptionCanCopy(arg0) gisubscriptionCanCopy_DISPATCH(arg0) -#define gisubscriptionCtrlCmdExecPartitionsCreate(arg0, arg1) gisubscriptionCtrlCmdExecPartitionsCreate_DISPATCH(arg0, arg1) -#define gisubscriptionCtrlCmdExecPartitionsDelete(arg0, arg1) gisubscriptionCtrlCmdExecPartitionsDelete_DISPATCH(arg0, arg1) -#define gisubscriptionCtrlCmdExecPartitionsGet(arg0, arg1) gisubscriptionCtrlCmdExecPartitionsGet_DISPATCH(arg0, arg1) -#define gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity(arg0, arg1) gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity_DISPATCH(arg0, arg1) -#define gisubscriptionCtrlCmdExecPartitionsGetActiveIds(arg0, arg1) gisubscriptionCtrlCmdExecPartitionsGetActiveIds_DISPATCH(arg0, arg1) -#define gisubscriptionCtrlCmdExecPartitionsExport(arg0, arg1) gisubscriptionCtrlCmdExecPartitionsExport_DISPATCH(arg0, arg1) -#define gisubscriptionCtrlCmdExecPartitionsImport(arg0, arg1) gisubscriptionCtrlCmdExecPartitionsImport_DISPATCH(arg0, arg1) -#define gisubscriptionCtrlCmdGetUuid(arg0, arg1) gisubscriptionCtrlCmdGetUuid_DISPATCH(arg0, arg1) + +// Wrapper macros +#define gisubscriptionCanCopy_FNPTR(arg_this) arg_this->__gisubscriptionCanCopy__ +#define gisubscriptionCanCopy(arg_this) gisubscriptionCanCopy_DISPATCH(arg_this) +#define gisubscriptionCtrlCmdExecPartitionsCreate_FNPTR(arg_this) arg_this->__gisubscriptionCtrlCmdExecPartitionsCreate__ +#define gisubscriptionCtrlCmdExecPartitionsCreate(arg_this, arg2) gisubscriptionCtrlCmdExecPartitionsCreate_DISPATCH(arg_this, arg2) +#define gisubscriptionCtrlCmdExecPartitionsDelete_FNPTR(arg_this) arg_this->__gisubscriptionCtrlCmdExecPartitionsDelete__ +#define gisubscriptionCtrlCmdExecPartitionsDelete(arg_this, arg2) gisubscriptionCtrlCmdExecPartitionsDelete_DISPATCH(arg_this, arg2) +#define gisubscriptionCtrlCmdExecPartitionsGet_FNPTR(arg_this) arg_this->__gisubscriptionCtrlCmdExecPartitionsGet__ +#define gisubscriptionCtrlCmdExecPartitionsGet(arg_this, arg2) gisubscriptionCtrlCmdExecPartitionsGet_DISPATCH(arg_this, arg2) +#define gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity_FNPTR(arg_this) arg_this->__gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity__ +#define gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity(arg_this, arg2) gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity_DISPATCH(arg_this, arg2) +#define gisubscriptionCtrlCmdExecPartitionsGetActiveIds_FNPTR(arg_this) arg_this->__gisubscriptionCtrlCmdExecPartitionsGetActiveIds__ +#define gisubscriptionCtrlCmdExecPartitionsGetActiveIds(arg_this, arg2) gisubscriptionCtrlCmdExecPartitionsGetActiveIds_DISPATCH(arg_this, arg2) +#define gisubscriptionCtrlCmdExecPartitionsExport_FNPTR(arg_this) arg_this->__gisubscriptionCtrlCmdExecPartitionsExport__ +#define gisubscriptionCtrlCmdExecPartitionsExport(arg_this, arg2) gisubscriptionCtrlCmdExecPartitionsExport_DISPATCH(arg_this, arg2) +#define gisubscriptionCtrlCmdExecPartitionsImport_FNPTR(arg_this) arg_this->__gisubscriptionCtrlCmdExecPartitionsImport__ +#define gisubscriptionCtrlCmdExecPartitionsImport(arg_this, arg2) gisubscriptionCtrlCmdExecPartitionsImport_DISPATCH(arg_this, arg2) +#define gisubscriptionCtrlCmdGetUuid_FNPTR(arg_this) arg_this->__gisubscriptionCtrlCmdGetUuid__ +#define gisubscriptionCtrlCmdGetUuid(arg_this, arg2) gisubscriptionCtrlCmdGetUuid_DISPATCH(arg_this, arg2) +#define gisubscriptionControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define gisubscriptionControl(pGpuResource, pCallContext, pParams) gisubscriptionControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define gisubscriptionMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define gisubscriptionMap(pGpuResource, pCallContext, pParams, pCpuMapping) gisubscriptionMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define gisubscriptionUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define gisubscriptionUnmap(pGpuResource, pCallContext, pCpuMapping) gisubscriptionUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define gisubscriptionShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define gisubscriptionShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) gisubscriptionShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define gisubscriptionCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) gisubscriptionCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define gisubscriptionMapTo(pResource, pParams) gisubscriptionMapTo_DISPATCH(pResource, pParams) -#define gisubscriptionGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) gisubscriptionGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define gisubscriptionGetRefCount(pResource) gisubscriptionGetRefCount_DISPATCH(pResource) -#define gisubscriptionAddAdditionalDependants(pClient, pResource, pReference) gisubscriptionAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define gisubscriptionControl_Prologue(pResource, pCallContext, pParams) gisubscriptionControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define gisubscriptionGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define gisubscriptionGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) gisubscriptionGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define gisubscriptionGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define gisubscriptionGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) gisubscriptionGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define gisubscriptionInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define gisubscriptionInternalControlForward(pGpuResource, command, pParams, size) gisubscriptionInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define gisubscriptionUnmapFrom(pResource, pParams) gisubscriptionUnmapFrom_DISPATCH(pResource, pParams) -#define gisubscriptionControl_Epilogue(pResource, pCallContext, pParams) gisubscriptionControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define gisubscriptionGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define gisubscriptionGetInternalObjectHandle(pGpuResource) gisubscriptionGetInternalObjectHandle_DISPATCH(pGpuResource) -#define gisubscriptionControl(pGpuResource, pCallContext, pParams) gisubscriptionControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define gisubscriptionUnmap(pGpuResource, pCallContext, pCpuMapping) gisubscriptionUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define gisubscriptionAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define gisubscriptionAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) gisubscriptionAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define gisubscriptionGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define gisubscriptionGetMemInterMapParams(pRmResource, pParams) gisubscriptionGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define gisubscriptionCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define gisubscriptionCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) gisubscriptionCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define gisubscriptionGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define gisubscriptionGetMemoryMappingDescriptor(pRmResource, ppMemDesc) gisubscriptionGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define gisubscriptionControlFilter(pResource, pCallContext, pParams) gisubscriptionControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define gisubscriptionControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define gisubscriptionControlSerialization_Prologue(pResource, pCallContext, pParams) gisubscriptionControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define gisubscriptionIsPartialUnmapSupported(pResource) gisubscriptionIsPartialUnmapSupported_DISPATCH(pResource) -#define gisubscriptionPreDestruct(pResource) gisubscriptionPreDestruct_DISPATCH(pResource) -#define gisubscriptionIsDuplicate(pResource, hMemory, pDuplicate) gisubscriptionIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define gisubscriptionControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ #define gisubscriptionControlSerialization_Epilogue(pResource, pCallContext, pParams) gisubscriptionControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define gisubscriptionMap(pGpuResource, pCallContext, pParams, pCpuMapping) gisubscriptionMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define gisubscriptionAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) gisubscriptionAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool gisubscriptionCanCopy_IMPL(struct GPUInstanceSubscription *arg0); +#define gisubscriptionControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define gisubscriptionControl_Prologue(pResource, pCallContext, pParams) gisubscriptionControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define gisubscriptionControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define gisubscriptionControl_Epilogue(pResource, pCallContext, pParams) gisubscriptionControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define gisubscriptionIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define gisubscriptionIsDuplicate(pResource, hMemory, pDuplicate) gisubscriptionIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define gisubscriptionPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define gisubscriptionPreDestruct(pResource) gisubscriptionPreDestruct_DISPATCH(pResource) +#define gisubscriptionControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define gisubscriptionControlFilter(pResource, pCallContext, pParams) gisubscriptionControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define gisubscriptionIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define gisubscriptionIsPartialUnmapSupported(pResource) gisubscriptionIsPartialUnmapSupported_DISPATCH(pResource) +#define gisubscriptionMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define gisubscriptionMapTo(pResource, pParams) gisubscriptionMapTo_DISPATCH(pResource, pParams) +#define gisubscriptionUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define gisubscriptionUnmapFrom(pResource, pParams) gisubscriptionUnmapFrom_DISPATCH(pResource, pParams) +#define gisubscriptionGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define gisubscriptionGetRefCount(pResource) gisubscriptionGetRefCount_DISPATCH(pResource) +#define gisubscriptionAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define gisubscriptionAddAdditionalDependants(pClient, pResource, pReference) gisubscriptionAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -static inline NvBool gisubscriptionCanCopy_DISPATCH(struct GPUInstanceSubscription *arg0) { - return arg0->__gisubscriptionCanCopy__(arg0); +// Dispatch functions +static inline NvBool gisubscriptionCanCopy_DISPATCH(struct GPUInstanceSubscription *arg_this) { + return arg_this->__gisubscriptionCanCopy__(arg_this); } -NV_STATUS gisubscriptionCtrlCmdExecPartitionsCreate_IMPL(struct GPUInstanceSubscription *arg0, NVC637_CTRL_EXEC_PARTITIONS_CREATE_PARAMS *arg1); - -static inline NV_STATUS gisubscriptionCtrlCmdExecPartitionsCreate_DISPATCH(struct GPUInstanceSubscription *arg0, NVC637_CTRL_EXEC_PARTITIONS_CREATE_PARAMS *arg1) { - return arg0->__gisubscriptionCtrlCmdExecPartitionsCreate__(arg0, arg1); +static inline NV_STATUS gisubscriptionCtrlCmdExecPartitionsCreate_DISPATCH(struct GPUInstanceSubscription *arg_this, NVC637_CTRL_EXEC_PARTITIONS_CREATE_PARAMS *arg2) { + return arg_this->__gisubscriptionCtrlCmdExecPartitionsCreate__(arg_this, arg2); } -NV_STATUS gisubscriptionCtrlCmdExecPartitionsDelete_IMPL(struct GPUInstanceSubscription *arg0, NVC637_CTRL_EXEC_PARTITIONS_DELETE_PARAMS *arg1); - -static inline NV_STATUS gisubscriptionCtrlCmdExecPartitionsDelete_DISPATCH(struct GPUInstanceSubscription *arg0, NVC637_CTRL_EXEC_PARTITIONS_DELETE_PARAMS *arg1) { - return arg0->__gisubscriptionCtrlCmdExecPartitionsDelete__(arg0, arg1); +static inline NV_STATUS gisubscriptionCtrlCmdExecPartitionsDelete_DISPATCH(struct GPUInstanceSubscription *arg_this, NVC637_CTRL_EXEC_PARTITIONS_DELETE_PARAMS *arg2) { + return arg_this->__gisubscriptionCtrlCmdExecPartitionsDelete__(arg_this, arg2); } -NV_STATUS gisubscriptionCtrlCmdExecPartitionsGet_IMPL(struct GPUInstanceSubscription *arg0, NVC637_CTRL_EXEC_PARTITIONS_GET_PARAMS *arg1); - -static inline NV_STATUS gisubscriptionCtrlCmdExecPartitionsGet_DISPATCH(struct GPUInstanceSubscription *arg0, NVC637_CTRL_EXEC_PARTITIONS_GET_PARAMS *arg1) { - return arg0->__gisubscriptionCtrlCmdExecPartitionsGet__(arg0, arg1); +static inline NV_STATUS gisubscriptionCtrlCmdExecPartitionsGet_DISPATCH(struct GPUInstanceSubscription *arg_this, NVC637_CTRL_EXEC_PARTITIONS_GET_PARAMS *arg2) { + return arg_this->__gisubscriptionCtrlCmdExecPartitionsGet__(arg_this, arg2); } -NV_STATUS gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity_IMPL(struct GPUInstanceSubscription *arg0, NVC637_CTRL_EXEC_PARTITIONS_GET_PROFILE_CAPACITY_PARAMS *arg1); - -static inline NV_STATUS gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity_DISPATCH(struct GPUInstanceSubscription *arg0, NVC637_CTRL_EXEC_PARTITIONS_GET_PROFILE_CAPACITY_PARAMS *arg1) { - return arg0->__gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity__(arg0, arg1); +static inline NV_STATUS gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity_DISPATCH(struct GPUInstanceSubscription *arg_this, NVC637_CTRL_EXEC_PARTITIONS_GET_PROFILE_CAPACITY_PARAMS *arg2) { + return arg_this->__gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity__(arg_this, arg2); } -NV_STATUS gisubscriptionCtrlCmdExecPartitionsGetActiveIds_IMPL(struct GPUInstanceSubscription *arg0, NVC637_CTRL_EXEC_PARTITIONS_GET_ACTIVE_IDS_PARAMS *arg1); - -static inline NV_STATUS gisubscriptionCtrlCmdExecPartitionsGetActiveIds_DISPATCH(struct GPUInstanceSubscription *arg0, NVC637_CTRL_EXEC_PARTITIONS_GET_ACTIVE_IDS_PARAMS *arg1) { - return arg0->__gisubscriptionCtrlCmdExecPartitionsGetActiveIds__(arg0, arg1); +static inline NV_STATUS gisubscriptionCtrlCmdExecPartitionsGetActiveIds_DISPATCH(struct GPUInstanceSubscription *arg_this, NVC637_CTRL_EXEC_PARTITIONS_GET_ACTIVE_IDS_PARAMS *arg2) { + return arg_this->__gisubscriptionCtrlCmdExecPartitionsGetActiveIds__(arg_this, arg2); } -NV_STATUS gisubscriptionCtrlCmdExecPartitionsExport_IMPL(struct GPUInstanceSubscription *arg0, NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS *arg1); +static inline NV_STATUS gisubscriptionCtrlCmdExecPartitionsExport_DISPATCH(struct GPUInstanceSubscription *arg_this, NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS *arg2) { + return arg_this->__gisubscriptionCtrlCmdExecPartitionsExport__(arg_this, arg2); +} -static inline NV_STATUS gisubscriptionCtrlCmdExecPartitionsExport_DISPATCH(struct GPUInstanceSubscription *arg0, NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS *arg1) { - return arg0->__gisubscriptionCtrlCmdExecPartitionsExport__(arg0, arg1); +static inline NV_STATUS gisubscriptionCtrlCmdExecPartitionsImport_DISPATCH(struct GPUInstanceSubscription *arg_this, NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS *arg2) { + return arg_this->__gisubscriptionCtrlCmdExecPartitionsImport__(arg_this, arg2); } -NV_STATUS gisubscriptionCtrlCmdExecPartitionsImport_IMPL(struct GPUInstanceSubscription *arg0, NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS *arg1); +static inline NV_STATUS gisubscriptionCtrlCmdGetUuid_DISPATCH(struct GPUInstanceSubscription *arg_this, NVC637_CTRL_GET_UUID_PARAMS *arg2) { + return arg_this->__gisubscriptionCtrlCmdGetUuid__(arg_this, arg2); +} -static inline NV_STATUS gisubscriptionCtrlCmdExecPartitionsImport_DISPATCH(struct GPUInstanceSubscription *arg0, NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS *arg1) { - return arg0->__gisubscriptionCtrlCmdExecPartitionsImport__(arg0, arg1); +static inline NV_STATUS gisubscriptionControl_DISPATCH(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__gisubscriptionControl__(pGpuResource, pCallContext, pParams); } -NV_STATUS gisubscriptionCtrlCmdGetUuid_IMPL(struct GPUInstanceSubscription *arg0, NVC637_CTRL_GET_UUID_PARAMS *arg1); +static inline NV_STATUS gisubscriptionMap_DISPATCH(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__gisubscriptionMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +} -static inline NV_STATUS gisubscriptionCtrlCmdGetUuid_DISPATCH(struct GPUInstanceSubscription *arg0, NVC637_CTRL_GET_UUID_PARAMS *arg1) { - return arg0->__gisubscriptionCtrlCmdGetUuid__(arg0, arg1); +static inline NV_STATUS gisubscriptionUnmap_DISPATCH(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__gisubscriptionUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool gisubscriptionShareCallback_DISPATCH(struct GPUInstanceSubscription *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return pGpuResource->__gisubscriptionShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline NV_STATUS gisubscriptionCheckMemInterUnmap_DISPATCH(struct GPUInstanceSubscription *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__gisubscriptionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); -} - -static inline NV_STATUS gisubscriptionMapTo_DISPATCH(struct GPUInstanceSubscription *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__gisubscriptionMapTo__(pResource, pParams); +static inline NV_STATUS gisubscriptionGetRegBaseOffsetAndSize_DISPATCH(struct GPUInstanceSubscription *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__gisubscriptionGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS gisubscriptionGetMapAddrSpace_DISPATCH(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__gisubscriptionGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NvU32 gisubscriptionGetRefCount_DISPATCH(struct GPUInstanceSubscription *pResource) { - return pResource->__gisubscriptionGetRefCount__(pResource); +static inline NV_STATUS gisubscriptionInternalControlForward_DISPATCH(struct GPUInstanceSubscription *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__gisubscriptionInternalControlForward__(pGpuResource, command, pParams, size); } -static inline void gisubscriptionAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct GPUInstanceSubscription *pResource, RsResourceRef *pReference) { - pResource->__gisubscriptionAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvHandle gisubscriptionGetInternalObjectHandle_DISPATCH(struct GPUInstanceSubscription *pGpuResource) { + return pGpuResource->__gisubscriptionGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS gisubscriptionControl_Prologue_DISPATCH(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gisubscriptionControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool gisubscriptionAccessCallback_DISPATCH(struct GPUInstanceSubscription *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__gisubscriptionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS gisubscriptionGetRegBaseOffsetAndSize_DISPATCH(struct GPUInstanceSubscription *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__gisubscriptionGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS gisubscriptionGetMemInterMapParams_DISPATCH(struct GPUInstanceSubscription *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__gisubscriptionGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS gisubscriptionInternalControlForward_DISPATCH(struct GPUInstanceSubscription *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__gisubscriptionInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS gisubscriptionCheckMemInterUnmap_DISPATCH(struct GPUInstanceSubscription *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__gisubscriptionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS gisubscriptionUnmapFrom_DISPATCH(struct GPUInstanceSubscription *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__gisubscriptionUnmapFrom__(pResource, pParams); +static inline NV_STATUS gisubscriptionGetMemoryMappingDescriptor_DISPATCH(struct GPUInstanceSubscription *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__gisubscriptionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline void gisubscriptionControl_Epilogue_DISPATCH(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__gisubscriptionControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS gisubscriptionControlSerialization_Prologue_DISPATCH(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__gisubscriptionControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvHandle gisubscriptionGetInternalObjectHandle_DISPATCH(struct GPUInstanceSubscription *pGpuResource) { - return pGpuResource->__gisubscriptionGetInternalObjectHandle__(pGpuResource); +static inline void gisubscriptionControlSerialization_Epilogue_DISPATCH(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__gisubscriptionControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS gisubscriptionControl_DISPATCH(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__gisubscriptionControl__(pGpuResource, pCallContext, pParams); +static inline NV_STATUS gisubscriptionControl_Prologue_DISPATCH(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__gisubscriptionControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS gisubscriptionUnmap_DISPATCH(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__gisubscriptionUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline void gisubscriptionControl_Epilogue_DISPATCH(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__gisubscriptionControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS gisubscriptionGetMemInterMapParams_DISPATCH(struct GPUInstanceSubscription *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__gisubscriptionGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS gisubscriptionIsDuplicate_DISPATCH(struct GPUInstanceSubscription *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__gisubscriptionIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS gisubscriptionGetMemoryMappingDescriptor_DISPATCH(struct GPUInstanceSubscription *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__gisubscriptionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void gisubscriptionPreDestruct_DISPATCH(struct GPUInstanceSubscription *pResource) { + pResource->__gisubscriptionPreDestruct__(pResource); } static inline NV_STATUS gisubscriptionControlFilter_DISPATCH(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__gisubscriptionControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS gisubscriptionControlSerialization_Prologue_DISPATCH(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gisubscriptionControlSerialization_Prologue__(pResource, pCallContext, pParams); -} - static inline NvBool gisubscriptionIsPartialUnmapSupported_DISPATCH(struct GPUInstanceSubscription *pResource) { return pResource->__gisubscriptionIsPartialUnmapSupported__(pResource); } -static inline void gisubscriptionPreDestruct_DISPATCH(struct GPUInstanceSubscription *pResource) { - pResource->__gisubscriptionPreDestruct__(pResource); +static inline NV_STATUS gisubscriptionMapTo_DISPATCH(struct GPUInstanceSubscription *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__gisubscriptionMapTo__(pResource, pParams); } -static inline NV_STATUS gisubscriptionIsDuplicate_DISPATCH(struct GPUInstanceSubscription *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__gisubscriptionIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS gisubscriptionUnmapFrom_DISPATCH(struct GPUInstanceSubscription *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__gisubscriptionUnmapFrom__(pResource, pParams); } -static inline void gisubscriptionControlSerialization_Epilogue_DISPATCH(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__gisubscriptionControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 gisubscriptionGetRefCount_DISPATCH(struct GPUInstanceSubscription *pResource) { + return pResource->__gisubscriptionGetRefCount__(pResource); } -static inline NV_STATUS gisubscriptionMap_DISPATCH(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__gisubscriptionMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void gisubscriptionAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct GPUInstanceSubscription *pResource, RsResourceRef *pReference) { + pResource->__gisubscriptionAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NvBool gisubscriptionAccessCallback_DISPATCH(struct GPUInstanceSubscription *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__gisubscriptionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} +NvBool gisubscriptionCanCopy_IMPL(struct GPUInstanceSubscription *arg1); + +NV_STATUS gisubscriptionCtrlCmdExecPartitionsCreate_IMPL(struct GPUInstanceSubscription *arg1, NVC637_CTRL_EXEC_PARTITIONS_CREATE_PARAMS *arg2); + +NV_STATUS gisubscriptionCtrlCmdExecPartitionsDelete_IMPL(struct GPUInstanceSubscription *arg1, NVC637_CTRL_EXEC_PARTITIONS_DELETE_PARAMS *arg2); + +NV_STATUS gisubscriptionCtrlCmdExecPartitionsGet_IMPL(struct GPUInstanceSubscription *arg1, NVC637_CTRL_EXEC_PARTITIONS_GET_PARAMS *arg2); + +NV_STATUS gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity_IMPL(struct GPUInstanceSubscription *arg1, NVC637_CTRL_EXEC_PARTITIONS_GET_PROFILE_CAPACITY_PARAMS *arg2); + +NV_STATUS gisubscriptionCtrlCmdExecPartitionsGetActiveIds_IMPL(struct GPUInstanceSubscription *arg1, NVC637_CTRL_EXEC_PARTITIONS_GET_ACTIVE_IDS_PARAMS *arg2); + +NV_STATUS gisubscriptionCtrlCmdExecPartitionsExport_IMPL(struct GPUInstanceSubscription *arg1, NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS *arg2); + +NV_STATUS gisubscriptionCtrlCmdExecPartitionsImport_IMPL(struct GPUInstanceSubscription *arg1, NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS *arg2); + +NV_STATUS gisubscriptionCtrlCmdGetUuid_IMPL(struct GPUInstanceSubscription *arg1, NVC637_CTRL_GET_UUID_PARAMS *arg2); static inline NvBool gisubscriptionIsDeviceProfiling(struct GPUInstanceSubscription *pGPUInstanceSubscription) { struct GPUInstanceSubscription_PRIVATE *pGPUInstanceSubscription_PRIVATE = (struct GPUInstanceSubscription_PRIVATE *)pGPUInstanceSubscription; @@ -376,41 +443,41 @@ static inline KERNEL_MIG_GPU_INSTANCE *gisubscriptionGetMIGGPUInstance(struct GP return pGPUInstanceSubscription_PRIVATE->pKernelMIGGpuInstance; } -NV_STATUS gisubscriptionGetGPUInstanceSubscription_IMPL(struct RsClient *arg0, NvHandle arg1, struct GPUInstanceSubscription **arg2); +NV_STATUS gisubscriptionGetGPUInstanceSubscription_IMPL(struct RsClient *arg1, NvHandle arg2, struct GPUInstanceSubscription **arg3); -#define gisubscriptionGetGPUInstanceSubscription(arg0, arg1, arg2) gisubscriptionGetGPUInstanceSubscription_IMPL(arg0, arg1, arg2) +#define gisubscriptionGetGPUInstanceSubscription(arg1, arg2, arg3) gisubscriptionGetGPUInstanceSubscription_IMPL(arg1, arg2, arg3) NvBool gisubscriptionShouldClassBeFreedOnUnsubscribe_IMPL(NvU32 internalClassId); #define gisubscriptionShouldClassBeFreedOnUnsubscribe(internalClassId) gisubscriptionShouldClassBeFreedOnUnsubscribe_IMPL(internalClassId) -void gisubscriptionCleanupOnUnsubscribe_IMPL(CALL_CONTEXT *arg0); +void gisubscriptionCleanupOnUnsubscribe_IMPL(CALL_CONTEXT *arg1); -#define gisubscriptionCleanupOnUnsubscribe(arg0) gisubscriptionCleanupOnUnsubscribe_IMPL(arg0) +#define gisubscriptionCleanupOnUnsubscribe(arg1) gisubscriptionCleanupOnUnsubscribe_IMPL(arg1) NV_STATUS gisubscriptionConstruct_IMPL(struct GPUInstanceSubscription *arg_pGPUInstanceSubscription, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_gisubscriptionConstruct(arg_pGPUInstanceSubscription, arg_pCallContext, arg_pParams) gisubscriptionConstruct_IMPL(arg_pGPUInstanceSubscription, arg_pCallContext, arg_pParams) -NV_STATUS gisubscriptionCopyConstruct_IMPL(struct GPUInstanceSubscription *arg0, CALL_CONTEXT *arg1, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg2); +NV_STATUS gisubscriptionCopyConstruct_IMPL(struct GPUInstanceSubscription *arg1, CALL_CONTEXT *arg2, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg3); #ifdef __nvoc_gpu_instance_subscription_h_disabled -static inline NV_STATUS gisubscriptionCopyConstruct(struct GPUInstanceSubscription *arg0, CALL_CONTEXT *arg1, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg2) { +static inline NV_STATUS gisubscriptionCopyConstruct(struct GPUInstanceSubscription *arg1, CALL_CONTEXT *arg2, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg3) { NV_ASSERT_FAILED_PRECOMP("GPUInstanceSubscription was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_instance_subscription_h_disabled -#define gisubscriptionCopyConstruct(arg0, arg1, arg2) gisubscriptionCopyConstruct_IMPL(arg0, arg1, arg2) +#define gisubscriptionCopyConstruct(arg1, arg2, arg3) gisubscriptionCopyConstruct_IMPL(arg1, arg2, arg3) #endif //__nvoc_gpu_instance_subscription_h_disabled -void gisubscriptionDestruct_IMPL(struct GPUInstanceSubscription *arg0); +void gisubscriptionDestruct_IMPL(struct GPUInstanceSubscription *arg1); -#define __nvoc_gisubscriptionDestruct(arg0) gisubscriptionDestruct_IMPL(arg0) -NvBool gisubscriptionIsDuped_IMPL(struct GPUInstanceSubscription *arg0); +#define __nvoc_gisubscriptionDestruct(arg1) gisubscriptionDestruct_IMPL(arg1) +NvBool gisubscriptionIsDuped_IMPL(struct GPUInstanceSubscription *arg1); #ifdef __nvoc_gpu_instance_subscription_h_disabled -static inline NvBool gisubscriptionIsDuped(struct GPUInstanceSubscription *arg0) { +static inline NvBool gisubscriptionIsDuped(struct GPUInstanceSubscription *arg1) { NV_ASSERT_FAILED_PRECOMP("GPUInstanceSubscription was disabled!"); return NV_FALSE; } #else //__nvoc_gpu_instance_subscription_h_disabled -#define gisubscriptionIsDuped(arg0) gisubscriptionIsDuped_IMPL(arg0) +#define gisubscriptionIsDuped(arg1) gisubscriptionIsDuped_IMPL(arg1) #endif //__nvoc_gpu_instance_subscription_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_gpu_mgmt_api_nvoc.c b/src/nvidia/generated/g_gpu_mgmt_api_nvoc.c index e4635a1afc..991fbf824c 100644 --- a/src/nvidia/generated/g_gpu_mgmt_api_nvoc.c +++ b/src/nvidia/generated/g_gpu_mgmt_api_nvoc.c @@ -84,113 +84,137 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_GpuManagementApi = /*pExportInfo=*/ &__nvoc_export_info_GpuManagementApi }; -static NvBool __nvoc_thunk_RmResource_gpumgmtapiShareCallback(struct GpuManagementApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NV_STATUS __nvoc_thunk_RmResource_gpumgmtapiCheckMemInterUnmap(struct GpuManagementApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), bSubdeviceHandleProvided); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GpuManagementApi[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) gpumgmtapiCtrlCmdSetShutdownState_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) + /*flags=*/ 0x7u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x200101u, + /*paramSize=*/ sizeof(NV0020_CTRL_GPU_MGMT_SET_SHUTDOWN_STATE_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_GpuManagementApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "gpumgmtapiCtrlCmdSetShutdownState" +#endif + }, + +}; + +// 21 up-thunk(s) defined to bridge methods in GpuManagementApi to superclasses -static NV_STATUS __nvoc_thunk_RsResource_gpumgmtapiControl(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControl((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pCallContext, pParams); +// gpumgmtapiAccessCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_gpumgmtapiAccessCallback(struct GpuManagementApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RmResource_gpumgmtapiGetMemInterMapParams(struct GpuManagementApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pParams); +// gpumgmtapiShareCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_gpumgmtapiShareCallback(struct GpuManagementApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RmResource_gpumgmtapiGetMemoryMappingDescriptor(struct GpuManagementApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), ppMemDesc); +// gpumgmtapiGetMemInterMapParams: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_gpumgmtapiGetMemInterMapParams(struct GpuManagementApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pParams); } -static NvU32 __nvoc_thunk_RsResource_gpumgmtapiGetRefCount(struct GpuManagementApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset)); +// gpumgmtapiCheckMemInterUnmap: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_gpumgmtapiCheckMemInterUnmap(struct GpuManagementApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RsResource_gpumgmtapiControlFilter(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pCallContext, pParams); +// gpumgmtapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_gpumgmtapiGetMemoryMappingDescriptor(struct GpuManagementApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), ppMemDesc); } -static void __nvoc_thunk_RsResource_gpumgmtapiAddAdditionalDependants(struct RsClient *pClient, struct GpuManagementApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pReference); +// gpumgmtapiControlSerialization_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_gpumgmtapiControlSerialization_Prologue(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_gpumgmtapiControlSerialization_Prologue(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pCallContext, pParams); +// gpumgmtapiControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_gpumgmtapiControlSerialization_Epilogue(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_gpumgmtapiControl_Prologue(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pCallContext, pParams); +// gpumgmtapiControl_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_gpumgmtapiControl_Prologue(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_gpumgmtapiCanCopy(struct GpuManagementApi *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset)); +// gpumgmtapiControl_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_gpumgmtapiControl_Epilogue(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_gpumgmtapiUnmap(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pCallContext, pCpuMapping); +// gpumgmtapiCanCopy: virtual inherited (res) base (rmres) +static NvBool __nvoc_up_thunk_RsResource_gpumgmtapiCanCopy(struct GpuManagementApi *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_gpumgmtapiIsPartialUnmapSupported(struct GpuManagementApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset)); +// gpumgmtapiIsDuplicate: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiIsDuplicate(struct GpuManagementApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), hMemory, pDuplicate); } -static void __nvoc_thunk_RsResource_gpumgmtapiPreDestruct(struct GpuManagementApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset)); +// gpumgmtapiPreDestruct: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_gpumgmtapiPreDestruct(struct GpuManagementApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_gpumgmtapiMapTo(struct GpuManagementApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pParams); +// gpumgmtapiControl: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiControl(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_gpumgmtapiIsDuplicate(struct GpuManagementApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), hMemory, pDuplicate); +// gpumgmtapiControlFilter: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiControlFilter(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RmResource_gpumgmtapiControlSerialization_Epilogue(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pCallContext, pParams); +// gpumgmtapiMap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiMap(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pCallContext, pParams, pCpuMapping); } -static void __nvoc_thunk_RmResource_gpumgmtapiControl_Epilogue(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pCallContext, pParams); +// gpumgmtapiUnmap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiUnmap(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_gpumgmtapiUnmapFrom(struct GpuManagementApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pParams); +// gpumgmtapiIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body +static NvBool __nvoc_up_thunk_RsResource_gpumgmtapiIsPartialUnmapSupported(struct GpuManagementApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_gpumgmtapiMap(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pCallContext, pParams, pCpuMapping); +// gpumgmtapiMapTo: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiMapTo(struct GpuManagementApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RmResource_gpumgmtapiAccessCallback(struct GpuManagementApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// gpumgmtapiUnmapFrom: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiUnmapFrom(struct GpuManagementApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pParams); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// gpumgmtapiGetRefCount: virtual inherited (res) base (rmres) +static NvU32 __nvoc_up_thunk_RsResource_gpumgmtapiGetRefCount(struct GpuManagementApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset)); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GpuManagementApi[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) gpumgmtapiCtrlCmdSetShutdownState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) - /*flags=*/ 0x7u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x200101u, - /*paramSize=*/ sizeof(NV0020_CTRL_GPU_MGMT_SET_SHUTDOWN_STATE_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_GpuManagementApi.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "gpumgmtapiCtrlCmdSetShutdownState" -#endif - }, +// gpumgmtapiAddAdditionalDependants: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_gpumgmtapiAddAdditionalDependants(struct RsClient *pClient, struct GpuManagementApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pReference); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_GpuManagementApi = { @@ -228,57 +252,84 @@ NV_STATUS __nvoc_ctor_GpuManagementApi(GpuManagementApi *pThis, struct CALL_CONT return status; } +// Vtable initialization static void __nvoc_init_funcTable_GpuManagementApi_1(GpuManagementApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // gpumgmtapiCtrlCmdSetShutdownState -- exported (id=0x200101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) pThis->__gpumgmtapiCtrlCmdSetShutdownState__ = &gpumgmtapiCtrlCmdSetShutdownState_IMPL; #endif - pThis->__gpumgmtapiShareCallback__ = &__nvoc_thunk_RmResource_gpumgmtapiShareCallback; + // gpumgmtapiAccessCallback -- virtual inherited (rmres) base (rmres) + pThis->__gpumgmtapiAccessCallback__ = &__nvoc_up_thunk_RmResource_gpumgmtapiAccessCallback; - pThis->__gpumgmtapiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_gpumgmtapiCheckMemInterUnmap; + // gpumgmtapiShareCallback -- virtual inherited (rmres) base (rmres) + pThis->__gpumgmtapiShareCallback__ = &__nvoc_up_thunk_RmResource_gpumgmtapiShareCallback; - pThis->__gpumgmtapiControl__ = &__nvoc_thunk_RsResource_gpumgmtapiControl; + // gpumgmtapiGetMemInterMapParams -- virtual inherited (rmres) base (rmres) + pThis->__gpumgmtapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpumgmtapiGetMemInterMapParams; - pThis->__gpumgmtapiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_gpumgmtapiGetMemInterMapParams; + // gpumgmtapiCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) + pThis->__gpumgmtapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpumgmtapiCheckMemInterUnmap; - pThis->__gpumgmtapiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_gpumgmtapiGetMemoryMappingDescriptor; + // gpumgmtapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) + pThis->__gpumgmtapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpumgmtapiGetMemoryMappingDescriptor; - pThis->__gpumgmtapiGetRefCount__ = &__nvoc_thunk_RsResource_gpumgmtapiGetRefCount; + // gpumgmtapiControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__gpumgmtapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpumgmtapiControlSerialization_Prologue; - pThis->__gpumgmtapiControlFilter__ = &__nvoc_thunk_RsResource_gpumgmtapiControlFilter; + // gpumgmtapiControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__gpumgmtapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpumgmtapiControlSerialization_Epilogue; - pThis->__gpumgmtapiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_gpumgmtapiAddAdditionalDependants; + // gpumgmtapiControl_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__gpumgmtapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpumgmtapiControl_Prologue; - pThis->__gpumgmtapiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_gpumgmtapiControlSerialization_Prologue; + // gpumgmtapiControl_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__gpumgmtapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpumgmtapiControl_Epilogue; - pThis->__gpumgmtapiControl_Prologue__ = &__nvoc_thunk_RmResource_gpumgmtapiControl_Prologue; + // gpumgmtapiCanCopy -- virtual inherited (res) base (rmres) + pThis->__gpumgmtapiCanCopy__ = &__nvoc_up_thunk_RsResource_gpumgmtapiCanCopy; - pThis->__gpumgmtapiCanCopy__ = &__nvoc_thunk_RsResource_gpumgmtapiCanCopy; + // gpumgmtapiIsDuplicate -- virtual inherited (res) base (rmres) + pThis->__gpumgmtapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpumgmtapiIsDuplicate; - pThis->__gpumgmtapiUnmap__ = &__nvoc_thunk_RsResource_gpumgmtapiUnmap; + // gpumgmtapiPreDestruct -- virtual inherited (res) base (rmres) + pThis->__gpumgmtapiPreDestruct__ = &__nvoc_up_thunk_RsResource_gpumgmtapiPreDestruct; - pThis->__gpumgmtapiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_gpumgmtapiIsPartialUnmapSupported; + // gpumgmtapiControl -- virtual inherited (res) base (rmres) + pThis->__gpumgmtapiControl__ = &__nvoc_up_thunk_RsResource_gpumgmtapiControl; - pThis->__gpumgmtapiPreDestruct__ = &__nvoc_thunk_RsResource_gpumgmtapiPreDestruct; + // gpumgmtapiControlFilter -- virtual inherited (res) base (rmres) + pThis->__gpumgmtapiControlFilter__ = &__nvoc_up_thunk_RsResource_gpumgmtapiControlFilter; - pThis->__gpumgmtapiMapTo__ = &__nvoc_thunk_RsResource_gpumgmtapiMapTo; + // gpumgmtapiMap -- virtual inherited (res) base (rmres) + pThis->__gpumgmtapiMap__ = &__nvoc_up_thunk_RsResource_gpumgmtapiMap; - pThis->__gpumgmtapiIsDuplicate__ = &__nvoc_thunk_RsResource_gpumgmtapiIsDuplicate; + // gpumgmtapiUnmap -- virtual inherited (res) base (rmres) + pThis->__gpumgmtapiUnmap__ = &__nvoc_up_thunk_RsResource_gpumgmtapiUnmap; - pThis->__gpumgmtapiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_gpumgmtapiControlSerialization_Epilogue; + // gpumgmtapiIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body + pThis->__gpumgmtapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpumgmtapiIsPartialUnmapSupported; - pThis->__gpumgmtapiControl_Epilogue__ = &__nvoc_thunk_RmResource_gpumgmtapiControl_Epilogue; + // gpumgmtapiMapTo -- virtual inherited (res) base (rmres) + pThis->__gpumgmtapiMapTo__ = &__nvoc_up_thunk_RsResource_gpumgmtapiMapTo; - pThis->__gpumgmtapiUnmapFrom__ = &__nvoc_thunk_RsResource_gpumgmtapiUnmapFrom; + // gpumgmtapiUnmapFrom -- virtual inherited (res) base (rmres) + pThis->__gpumgmtapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpumgmtapiUnmapFrom; - pThis->__gpumgmtapiMap__ = &__nvoc_thunk_RsResource_gpumgmtapiMap; + // gpumgmtapiGetRefCount -- virtual inherited (res) base (rmres) + pThis->__gpumgmtapiGetRefCount__ = &__nvoc_up_thunk_RsResource_gpumgmtapiGetRefCount; + + // gpumgmtapiAddAdditionalDependants -- virtual inherited (res) base (rmres) + pThis->__gpumgmtapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpumgmtapiAddAdditionalDependants; +} // End __nvoc_init_funcTable_GpuManagementApi_1 with approximately 22 basic block(s). - pThis->__gpumgmtapiAccessCallback__ = &__nvoc_thunk_RmResource_gpumgmtapiAccessCallback; -} +// Initialize vtable(s) for 22 virtual method(s). void __nvoc_init_funcTable_GpuManagementApi(GpuManagementApi *pThis) { + + // Initialize vtable(s) with 22 per-object function pointer(s). __nvoc_init_funcTable_GpuManagementApi_1(pThis); } diff --git a/src/nvidia/generated/g_gpu_mgmt_api_nvoc.h b/src/nvidia/generated/g_gpu_mgmt_api_nvoc.h index 6fa2b0b8df..5b3db5c473 100644 --- a/src/nvidia/generated/g_gpu_mgmt_api_nvoc.h +++ b/src/nvidia/generated/g_gpu_mgmt_api_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_GPU_MGMT_API_NVOC_H_ #define _G_GPU_MGMT_API_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_gpu_mgmt_api_nvoc.h" #ifndef GPU_MGMT_API_H @@ -57,36 +65,45 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct GpuManagementApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuManagementApi *__nvoc_pbase_GpuManagementApi; - NV_STATUS (*__gpumgmtapiCtrlCmdSetShutdownState__)(struct GpuManagementApi *, NV0020_CTRL_GPU_MGMT_SET_SHUTDOWN_STATE_PARAMS *); - NvBool (*__gpumgmtapiShareCallback__)(struct GpuManagementApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__gpumgmtapiCheckMemInterUnmap__)(struct GpuManagementApi *, NvBool); - NV_STATUS (*__gpumgmtapiControl__)(struct GpuManagementApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gpumgmtapiGetMemInterMapParams__)(struct GpuManagementApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__gpumgmtapiGetMemoryMappingDescriptor__)(struct GpuManagementApi *, struct MEMORY_DESCRIPTOR **); - NvU32 (*__gpumgmtapiGetRefCount__)(struct GpuManagementApi *); - NV_STATUS (*__gpumgmtapiControlFilter__)(struct GpuManagementApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__gpumgmtapiAddAdditionalDependants__)(struct RsClient *, struct GpuManagementApi *, RsResourceRef *); - NV_STATUS (*__gpumgmtapiControlSerialization_Prologue__)(struct GpuManagementApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gpumgmtapiControl_Prologue__)(struct GpuManagementApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__gpumgmtapiCanCopy__)(struct GpuManagementApi *); - NV_STATUS (*__gpumgmtapiUnmap__)(struct GpuManagementApi *, struct CALL_CONTEXT *, RsCpuMapping *); - NvBool (*__gpumgmtapiIsPartialUnmapSupported__)(struct GpuManagementApi *); - void (*__gpumgmtapiPreDestruct__)(struct GpuManagementApi *); - NV_STATUS (*__gpumgmtapiMapTo__)(struct GpuManagementApi *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__gpumgmtapiIsDuplicate__)(struct GpuManagementApi *, NvHandle, NvBool *); - void (*__gpumgmtapiControlSerialization_Epilogue__)(struct GpuManagementApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__gpumgmtapiControl_Epilogue__)(struct GpuManagementApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gpumgmtapiUnmapFrom__)(struct GpuManagementApi *, RS_RES_UNMAP_FROM_PARAMS *); - NV_STATUS (*__gpumgmtapiMap__)(struct GpuManagementApi *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__gpumgmtapiAccessCallback__)(struct GpuManagementApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^3 + struct RsResource *__nvoc_pbase_RsResource; // res super^2 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^2 + struct RmResource *__nvoc_pbase_RmResource; // rmres super + struct GpuManagementApi *__nvoc_pbase_GpuManagementApi; // gpumgmtapi + + // Vtable with 22 per-object function pointers + NV_STATUS (*__gpumgmtapiCtrlCmdSetShutdownState__)(struct GpuManagementApi * /*this*/, NV0020_CTRL_GPU_MGMT_SET_SHUTDOWN_STATE_PARAMS *); // exported (id=0x200101) + NvBool (*__gpumgmtapiAccessCallback__)(struct GpuManagementApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) + NvBool (*__gpumgmtapiShareCallback__)(struct GpuManagementApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__gpumgmtapiGetMemInterMapParams__)(struct GpuManagementApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__gpumgmtapiCheckMemInterUnmap__)(struct GpuManagementApi * /*this*/, NvBool); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__gpumgmtapiGetMemoryMappingDescriptor__)(struct GpuManagementApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__gpumgmtapiControlSerialization_Prologue__)(struct GpuManagementApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__gpumgmtapiControlSerialization_Epilogue__)(struct GpuManagementApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__gpumgmtapiControl_Prologue__)(struct GpuManagementApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__gpumgmtapiControl_Epilogue__)(struct GpuManagementApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NvBool (*__gpumgmtapiCanCopy__)(struct GpuManagementApi * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__gpumgmtapiIsDuplicate__)(struct GpuManagementApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (rmres) + void (*__gpumgmtapiPreDestruct__)(struct GpuManagementApi * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__gpumgmtapiControl__)(struct GpuManagementApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__gpumgmtapiControlFilter__)(struct GpuManagementApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__gpumgmtapiMap__)(struct GpuManagementApi * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NV_STATUS (*__gpumgmtapiUnmap__)(struct GpuManagementApi * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NvBool (*__gpumgmtapiIsPartialUnmapSupported__)(struct GpuManagementApi * /*this*/); // inline virtual inherited (res) base (rmres) body + NV_STATUS (*__gpumgmtapiMapTo__)(struct GpuManagementApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) + NV_STATUS (*__gpumgmtapiUnmapFrom__)(struct GpuManagementApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) + NvU32 (*__gpumgmtapiGetRefCount__)(struct GpuManagementApi * /*this*/); // virtual inherited (res) base (rmres) + void (*__gpumgmtapiAddAdditionalDependants__)(struct RsClient *, struct GpuManagementApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) }; #ifndef __NVOC_CLASS_GpuManagementApi_TYPEDEF__ @@ -98,6 +115,7 @@ typedef struct GpuManagementApi GpuManagementApi; #define __nvoc_class_id_GpuManagementApi 0x376305 #endif /* __nvoc_class_id_GpuManagementApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_GpuManagementApi; #define __staticCast_GpuManagementApi(pThis) \ @@ -110,125 +128,150 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_GpuManagementApi; ((GpuManagementApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(GpuManagementApi))) #endif //__nvoc_gpu_mgmt_api_h_disabled - NV_STATUS __nvoc_objCreateDynamic_GpuManagementApi(GpuManagementApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_GpuManagementApi(GpuManagementApi**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_GpuManagementApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_GpuManagementApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define gpumgmtapiCtrlCmdSetShutdownState_FNPTR(pGpuMgmt) pGpuMgmt->__gpumgmtapiCtrlCmdSetShutdownState__ #define gpumgmtapiCtrlCmdSetShutdownState(pGpuMgmt, pParams) gpumgmtapiCtrlCmdSetShutdownState_DISPATCH(pGpuMgmt, pParams) +#define gpumgmtapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define gpumgmtapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) gpumgmtapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define gpumgmtapiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ #define gpumgmtapiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) gpumgmtapiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define gpumgmtapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) gpumgmtapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define gpumgmtapiControl(pResource, pCallContext, pParams) gpumgmtapiControl_DISPATCH(pResource, pCallContext, pParams) +#define gpumgmtapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define gpumgmtapiGetMemInterMapParams(pRmResource, pParams) gpumgmtapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define gpumgmtapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define gpumgmtapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) gpumgmtapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define gpumgmtapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define gpumgmtapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) gpumgmtapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define gpumgmtapiGetRefCount(pResource) gpumgmtapiGetRefCount_DISPATCH(pResource) -#define gpumgmtapiControlFilter(pResource, pCallContext, pParams) gpumgmtapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define gpumgmtapiAddAdditionalDependants(pClient, pResource, pReference) gpumgmtapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define gpumgmtapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define gpumgmtapiControlSerialization_Prologue(pResource, pCallContext, pParams) gpumgmtapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define gpumgmtapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define gpumgmtapiControlSerialization_Epilogue(pResource, pCallContext, pParams) gpumgmtapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define gpumgmtapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ #define gpumgmtapiControl_Prologue(pResource, pCallContext, pParams) gpumgmtapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define gpumgmtapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define gpumgmtapiControl_Epilogue(pResource, pCallContext, pParams) gpumgmtapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define gpumgmtapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define gpumgmtapiCanCopy(pResource) gpumgmtapiCanCopy_DISPATCH(pResource) +#define gpumgmtapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define gpumgmtapiIsDuplicate(pResource, hMemory, pDuplicate) gpumgmtapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define gpumgmtapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define gpumgmtapiPreDestruct(pResource) gpumgmtapiPreDestruct_DISPATCH(pResource) +#define gpumgmtapiControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define gpumgmtapiControl(pResource, pCallContext, pParams) gpumgmtapiControl_DISPATCH(pResource, pCallContext, pParams) +#define gpumgmtapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define gpumgmtapiControlFilter(pResource, pCallContext, pParams) gpumgmtapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define gpumgmtapiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define gpumgmtapiMap(pResource, pCallContext, pParams, pCpuMapping) gpumgmtapiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define gpumgmtapiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ #define gpumgmtapiUnmap(pResource, pCallContext, pCpuMapping) gpumgmtapiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define gpumgmtapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ #define gpumgmtapiIsPartialUnmapSupported(pResource) gpumgmtapiIsPartialUnmapSupported_DISPATCH(pResource) -#define gpumgmtapiPreDestruct(pResource) gpumgmtapiPreDestruct_DISPATCH(pResource) +#define gpumgmtapiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ #define gpumgmtapiMapTo(pResource, pParams) gpumgmtapiMapTo_DISPATCH(pResource, pParams) -#define gpumgmtapiIsDuplicate(pResource, hMemory, pDuplicate) gpumgmtapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define gpumgmtapiControlSerialization_Epilogue(pResource, pCallContext, pParams) gpumgmtapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define gpumgmtapiControl_Epilogue(pResource, pCallContext, pParams) gpumgmtapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define gpumgmtapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ #define gpumgmtapiUnmapFrom(pResource, pParams) gpumgmtapiUnmapFrom_DISPATCH(pResource, pParams) -#define gpumgmtapiMap(pResource, pCallContext, pParams, pCpuMapping) gpumgmtapiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define gpumgmtapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) gpumgmtapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS gpumgmtapiCtrlCmdSetShutdownState_IMPL(struct GpuManagementApi *pGpuMgmt, NV0020_CTRL_GPU_MGMT_SET_SHUTDOWN_STATE_PARAMS *pParams); +#define gpumgmtapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define gpumgmtapiGetRefCount(pResource) gpumgmtapiGetRefCount_DISPATCH(pResource) +#define gpumgmtapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define gpumgmtapiAddAdditionalDependants(pClient, pResource, pReference) gpumgmtapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS gpumgmtapiCtrlCmdSetShutdownState_DISPATCH(struct GpuManagementApi *pGpuMgmt, NV0020_CTRL_GPU_MGMT_SET_SHUTDOWN_STATE_PARAMS *pParams) { return pGpuMgmt->__gpumgmtapiCtrlCmdSetShutdownState__(pGpuMgmt, pParams); } -static inline NvBool gpumgmtapiShareCallback_DISPATCH(struct GpuManagementApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__gpumgmtapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS gpumgmtapiCheckMemInterUnmap_DISPATCH(struct GpuManagementApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__gpumgmtapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NvBool gpumgmtapiAccessCallback_DISPATCH(struct GpuManagementApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__gpumgmtapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS gpumgmtapiControl_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gpumgmtapiControl__(pResource, pCallContext, pParams); +static inline NvBool gpumgmtapiShareCallback_DISPATCH(struct GpuManagementApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__gpumgmtapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS gpumgmtapiGetMemInterMapParams_DISPATCH(struct GpuManagementApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__gpumgmtapiGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS gpumgmtapiGetMemoryMappingDescriptor_DISPATCH(struct GpuManagementApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__gpumgmtapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); -} - -static inline NvU32 gpumgmtapiGetRefCount_DISPATCH(struct GpuManagementApi *pResource) { - return pResource->__gpumgmtapiGetRefCount__(pResource); -} - -static inline NV_STATUS gpumgmtapiControlFilter_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gpumgmtapiControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS gpumgmtapiCheckMemInterUnmap_DISPATCH(struct GpuManagementApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__gpumgmtapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline void gpumgmtapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct GpuManagementApi *pResource, RsResourceRef *pReference) { - pResource->__gpumgmtapiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS gpumgmtapiGetMemoryMappingDescriptor_DISPATCH(struct GpuManagementApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__gpumgmtapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS gpumgmtapiControlSerialization_Prologue_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__gpumgmtapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void gpumgmtapiControlSerialization_Epilogue_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__gpumgmtapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + static inline NV_STATUS gpumgmtapiControl_Prologue_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__gpumgmtapiControl_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool gpumgmtapiCanCopy_DISPATCH(struct GpuManagementApi *pResource) { - return pResource->__gpumgmtapiCanCopy__(pResource); +static inline void gpumgmtapiControl_Epilogue_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__gpumgmtapiControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS gpumgmtapiUnmap_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__gpumgmtapiUnmap__(pResource, pCallContext, pCpuMapping); +static inline NvBool gpumgmtapiCanCopy_DISPATCH(struct GpuManagementApi *pResource) { + return pResource->__gpumgmtapiCanCopy__(pResource); } -static inline NvBool gpumgmtapiIsPartialUnmapSupported_DISPATCH(struct GpuManagementApi *pResource) { - return pResource->__gpumgmtapiIsPartialUnmapSupported__(pResource); +static inline NV_STATUS gpumgmtapiIsDuplicate_DISPATCH(struct GpuManagementApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__gpumgmtapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void gpumgmtapiPreDestruct_DISPATCH(struct GpuManagementApi *pResource) { pResource->__gpumgmtapiPreDestruct__(pResource); } -static inline NV_STATUS gpumgmtapiMapTo_DISPATCH(struct GpuManagementApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__gpumgmtapiMapTo__(pResource, pParams); +static inline NV_STATUS gpumgmtapiControl_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__gpumgmtapiControl__(pResource, pCallContext, pParams); } -static inline NV_STATUS gpumgmtapiIsDuplicate_DISPATCH(struct GpuManagementApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__gpumgmtapiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS gpumgmtapiControlFilter_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__gpumgmtapiControlFilter__(pResource, pCallContext, pParams); } -static inline void gpumgmtapiControlSerialization_Epilogue_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__gpumgmtapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS gpumgmtapiMap_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__gpumgmtapiMap__(pResource, pCallContext, pParams, pCpuMapping); } -static inline void gpumgmtapiControl_Epilogue_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__gpumgmtapiControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS gpumgmtapiUnmap_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pResource->__gpumgmtapiUnmap__(pResource, pCallContext, pCpuMapping); +} + +static inline NvBool gpumgmtapiIsPartialUnmapSupported_DISPATCH(struct GpuManagementApi *pResource) { + return pResource->__gpumgmtapiIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS gpumgmtapiMapTo_DISPATCH(struct GpuManagementApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__gpumgmtapiMapTo__(pResource, pParams); } static inline NV_STATUS gpumgmtapiUnmapFrom_DISPATCH(struct GpuManagementApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return pResource->__gpumgmtapiUnmapFrom__(pResource, pParams); } -static inline NV_STATUS gpumgmtapiMap_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__gpumgmtapiMap__(pResource, pCallContext, pParams, pCpuMapping); +static inline NvU32 gpumgmtapiGetRefCount_DISPATCH(struct GpuManagementApi *pResource) { + return pResource->__gpumgmtapiGetRefCount__(pResource); } -static inline NvBool gpumgmtapiAccessCallback_DISPATCH(struct GpuManagementApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__gpumgmtapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline void gpumgmtapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct GpuManagementApi *pResource, RsResourceRef *pReference) { + pResource->__gpumgmtapiAddAdditionalDependants__(pClient, pResource, pReference); } +NV_STATUS gpumgmtapiCtrlCmdSetShutdownState_IMPL(struct GpuManagementApi *pGpuMgmt, NV0020_CTRL_GPU_MGMT_SET_SHUTDOWN_STATE_PARAMS *pParams); + NV_STATUS gpumgmtapiConstruct_IMPL(struct GpuManagementApi *arg_pGpuMgmt, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_gpumgmtapiConstruct(arg_pGpuMgmt, arg_pCallContext, arg_pParams) gpumgmtapiConstruct_IMPL(arg_pGpuMgmt, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_gpu_mgr_nvoc.c b/src/nvidia/generated/g_gpu_mgr_nvoc.c index 9b8e503566..07b550ea32 100644 --- a/src/nvidia/generated/g_gpu_mgr_nvoc.c +++ b/src/nvidia/generated/g_gpu_mgr_nvoc.c @@ -93,10 +93,13 @@ NV_STATUS __nvoc_ctor_OBJGPUMGR(OBJGPUMGR *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJGPUMGR_1(OBJGPUMGR *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_OBJGPUMGR_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_OBJGPUMGR(OBJGPUMGR *pThis) { __nvoc_init_funcTable_OBJGPUMGR_1(pThis); } diff --git a/src/nvidia/generated/g_gpu_mgr_nvoc.h b/src/nvidia/generated/g_gpu_mgr_nvoc.h index 777d89f82d..bf21be4291 100644 --- a/src/nvidia/generated/g_gpu_mgr_nvoc.h +++ b/src/nvidia/generated/g_gpu_mgr_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_GPU_MGR_NVOC_H_ #define _G_GPU_MGR_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2005-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2005-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_gpu_mgr_nvoc.h" @@ -275,11 +283,20 @@ MAKE_INTRUSIVE_LIST(pcieP2PCapsInfoList, PCIEP2PCAPSINFO, node); #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJGPUMGR { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct OBJGPUMGR *__nvoc_pbase_OBJGPUMGR; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct OBJGPUMGR *__nvoc_pbase_OBJGPUMGR; // gpumgr + + // Data members PROBEDGPU probedGpus[32]; void *probedGpusLock; NvU32 gpuAttachCount; @@ -317,6 +334,7 @@ typedef struct OBJGPUMGR OBJGPUMGR; #define __nvoc_class_id_OBJGPUMGR 0xcf1b25 #endif /* __nvoc_class_id_OBJGPUMGR */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPUMGR; #define __staticCast_OBJGPUMGR(pThis) \ @@ -329,13 +347,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPUMGR; ((OBJGPUMGR*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJGPUMGR))) #endif //__nvoc_gpu_mgr_h_disabled - NV_STATUS __nvoc_objCreateDynamic_OBJGPUMGR(OBJGPUMGR**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_OBJGPUMGR(OBJGPUMGR**, Dynamic*, NvU32); #define __objCreate_OBJGPUMGR(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJGPUMGR((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS gpumgrInitPcieP2PCapsCache_IMPL(struct OBJGPUMGR *pGpuMgr); @@ -369,9 +390,9 @@ NvBool gpumgrGetPcieP2PCapsFromCache_IMPL(NvU32 gpuMask, NvU8 *pP2PWriteCapStatu NV_STATUS gpumgrConstruct_IMPL(struct OBJGPUMGR *arg_); #define __nvoc_gpumgrConstruct(arg_) gpumgrConstruct_IMPL(arg_) -void gpumgrDestruct_IMPL(struct OBJGPUMGR *arg0); +void gpumgrDestruct_IMPL(struct OBJGPUMGR *arg1); -#define __nvoc_gpumgrDestruct(arg0) gpumgrDestruct_IMPL(arg0) +#define __nvoc_gpumgrDestruct(arg1) gpumgrDestruct_IMPL(arg1) void gpumgrAddSystemNvlinkTopo_IMPL(NvU64 DomainBusDevice); #define gpumgrAddSystemNvlinkTopo(DomainBusDevice) gpumgrAddSystemNvlinkTopo_IMPL(DomainBusDevice) @@ -432,12 +453,12 @@ void gpumgrCacheSetMIGEnabled_IMPL(struct OBJGPU *pGpu, NvBool bMIGEnabled); NV_STATUS gpumgrCacheGetActiveDeviceIds_IMPL(NV0000_CTRL_GPU_GET_ACTIVE_DEVICE_IDS_PARAMS *pActiveDeviceIdsParams); #define gpumgrCacheGetActiveDeviceIds(pActiveDeviceIdsParams) gpumgrCacheGetActiveDeviceIds_IMPL(pActiveDeviceIdsParams) -void gpumgrUpdateBoardId_IMPL(struct OBJGPU *arg0); +void gpumgrUpdateBoardId_IMPL(struct OBJGPU *arg1); -#define gpumgrUpdateBoardId(arg0) gpumgrUpdateBoardId_IMPL(arg0) -void gpumgrServiceInterrupts_IMPL(NvU32 arg0, MC_ENGINE_BITVECTOR *arg1, NvBool arg2); +#define gpumgrUpdateBoardId(arg1) gpumgrUpdateBoardId_IMPL(arg1) +void gpumgrServiceInterrupts_IMPL(NvU32 arg1, MC_ENGINE_BITVECTOR *arg2, NvBool arg3); -#define gpumgrServiceInterrupts(arg0, arg1, arg2) gpumgrServiceInterrupts_IMPL(arg0, arg1, arg2) +#define gpumgrServiceInterrupts(arg1, arg2, arg3) gpumgrServiceInterrupts_IMPL(arg1, arg2, arg3) #undef PRIVATE_FIELD @@ -516,12 +537,13 @@ NV_STATUS gpumgrGetGpuUuidInfo(NvU32 gpuId, NvU8 **ppUuidStr, NvU32 *pUuidStrL // gpumgrGetRmFirmwarePolicy() and gpumgrGetRmFirmwareLogsEnabled() contain // all logic for deciding the policies for loading firmwares, and so need to be // compiled for all platforms besides those actually running the firmwares -void gpumgrGetRmFirmwarePolicy(NvU32 chipId, NvU32 pmcBoot42, NvBool bIsSoc, +void gpumgrGetRmFirmwarePolicy(NvU32 pmcBoot42, NvBool bIsSoc, NvU32 enableFirmwareRegVal, NvBool *pbRequestFirmware, - NvBool *pbAllowFallbackToMonolithicRm); + NvBool *pbAllowFallbackToMonolithicRm, + NvBool bIsMcdm); NvBool gpumgrGetRmFirmwareLogsEnabled(NvU32 enableFirmwareLogsRegVal); -NvBool gpumgrIsDeviceRmFirmwareCapable(NvU16 devId, NvU32 pmcBoot42, - NvBool bIsSoc, NvBool *pbEnableByDefault); +NvBool gpumgrIsDeviceRmFirmwareCapable(NvU32 pmcBoot42, + NvBool bIsSoc, NvBool *pbEnableByDefault, NvBool bIsMcdm); NvBool gpumgrIsVgxRmFirmwareCapableChip(NvU32 pmcBoot42); NV_STATUS gpumgrAttachGpu(NvU32 deviceInstance, GPUATTACHARG *); NV_STATUS gpumgrDetachGpu(NvU32 deviceInstance); diff --git a/src/nvidia/generated/g_gpu_nvoc.c b/src/nvidia/generated/g_gpu_nvoc.c index 5a7356a200..385d48b0bf 100644 --- a/src/nvidia/generated/g_gpu_nvoc.c +++ b/src/nvidia/generated/g_gpu_nvoc.c @@ -343,6 +343,12 @@ void __nvoc_init_dataField_OBJGPU(OBJGPU *pThis) { // Hal field -- bNonPowerOf2ChannelCountSupported pThis->bNonPowerOf2ChannelCountSupported = ((NvBool)(0 != 0)); + // Hal field -- bWarBug4347206PowerCycleOnUnload + // default + { + pThis->bWarBug4347206PowerCycleOnUnload = ((NvBool)(0 != 0)); + } + // Hal field -- bNeed4kPageIsolation // default { @@ -438,6 +444,17 @@ void __nvoc_init_dataField_OBJGPU(OBJGPU *pThis) { { pThis->bVoltaHubIntrSupported = ((NvBool)(0 == 0)); } + + // Hal field -- bUsePmcDeviceEnableForHostEngine + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ + { + pThis->bUsePmcDeviceEnableForHostEngine = ((NvBool)(0 == 0)); + } + // default + else + { + pThis->bUsePmcDeviceEnableForHostEngine = ((NvBool)(0 != 0)); + } } NV_STATUS __nvoc_ctor_Object(Object* ); @@ -469,6 +486,7 @@ NV_STATUS __nvoc_ctor_OBJGPU(OBJGPU *pThis, NvU32 arg_gpuInstance, NvU32 arg_gpu return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { ChipHal *chipHal = &staticCast(pThis, RmHalspecOwner)->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -480,12 +498,12 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // Hal function -- gpuConstructDeviceInfoTable + // gpuConstructDeviceInfoTable -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ { if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__gpuConstructDeviceInfoTable__ = &gpuConstructDeviceInfoTable_VGPUSTUB; + pThis->__gpuConstructDeviceInfoTable__ = &gpuConstructDeviceInfoTable_VF; } else { @@ -498,37 +516,37 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuConstructDeviceInfoTable__ = &gpuConstructDeviceInfoTable_56cd7a; } - // Hal function -- gpuGetNameString + // gpuGetNameString -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__gpuGetNameString__ = &gpuGetNameString_VGPUSTUB; + pThis->__gpuGetNameString__ = &gpuGetNameString_VF; } else { - pThis->__gpuGetNameString__ = &gpuGetNameString_KERNEL; + pThis->__gpuGetNameString__ = &gpuGetNameString_FWCLIENT; } - // Hal function -- gpuGetShortNameString + // gpuGetShortNameString -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__gpuGetShortNameString__ = &gpuGetShortNameString_VGPUSTUB; + pThis->__gpuGetShortNameString__ = &gpuGetShortNameString_VF; } else { - pThis->__gpuGetShortNameString__ = &gpuGetShortNameString_KERNEL; + pThis->__gpuGetShortNameString__ = &gpuGetShortNameString_FWCLIENT; } - // Hal function -- gpuInitBranding + // gpuInitBranding -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__gpuInitBranding__ = &gpuInitBranding_VGPUSTUB; + pThis->__gpuInitBranding__ = &gpuInitBranding_VF; } else { pThis->__gpuInitBranding__ = &gpuInitBranding_FWCLIENT; } - // Hal function -- gpuInitProperties + // gpuInitProperties -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__gpuInitProperties__ = &gpuInitProperties_b3696a; @@ -538,47 +556,17 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuInitProperties__ = &gpuInitProperties_FWCLIENT; } - // Hal function -- gpuBuildKernelVideoEngineList + // gpuGetRtd3GC6Data -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__gpuBuildKernelVideoEngineList__ = &gpuBuildKernelVideoEngineList_56cd7a; + pThis->__gpuGetRtd3GC6Data__ = &gpuGetRtd3GC6Data_b3696a; } else { - pThis->__gpuBuildKernelVideoEngineList__ = &gpuBuildKernelVideoEngineList_IMPL; + pThis->__gpuGetRtd3GC6Data__ = &gpuGetRtd3GC6Data_FWCLIENT; } - // Hal function -- gpuInitVideoLogging - if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ - { - pThis->__gpuInitVideoLogging__ = &gpuInitVideoLogging_56cd7a; - } - else - { - pThis->__gpuInitVideoLogging__ = &gpuInitVideoLogging_IMPL; - } - - // Hal function -- gpuFreeVideoLogging - if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ - { - pThis->__gpuFreeVideoLogging__ = &gpuFreeVideoLogging_b3696a; - } - else - { - pThis->__gpuFreeVideoLogging__ = &gpuFreeVideoLogging_IMPL; - } - - // Hal function -- gpuDestroyKernelVideoEngineList - if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ - { - pThis->__gpuDestroyKernelVideoEngineList__ = &gpuDestroyKernelVideoEngineList_b3696a; - } - else - { - pThis->__gpuDestroyKernelVideoEngineList__ = &gpuDestroyKernelVideoEngineList_IMPL; - } - - // Hal function -- gpuPowerOff + // gpuPowerOff -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__gpuPowerOff__ = &gpuPowerOff_46f6a7; @@ -588,7 +576,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuPowerOff__ = &gpuPowerOff_KERNEL; } - // Hal function -- gpuWriteBusConfigReg + // gpuWriteBusConfigReg -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__gpuWriteBusConfigReg__ = &gpuWriteBusConfigReg_GH100; @@ -598,7 +586,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuWriteBusConfigReg__ = &gpuWriteBusConfigReg_GM107; } - // Hal function -- gpuReadBusConfigReg + // gpuReadBusConfigReg -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__gpuReadBusConfigReg__ = &gpuReadBusConfigReg_GH100; @@ -608,7 +596,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuReadBusConfigReg__ = &gpuReadBusConfigReg_GM107; } - // Hal function -- gpuReadBusConfigRegEx + // gpuReadBusConfigRegEx -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__gpuReadBusConfigRegEx__ = &gpuReadBusConfigRegEx_5baef9; @@ -618,7 +606,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuReadBusConfigRegEx__ = &gpuReadBusConfigRegEx_GM107; } - // Hal function -- gpuReadFunctionConfigReg + // gpuReadFunctionConfigReg -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__gpuReadFunctionConfigReg__ = &gpuReadFunctionConfigReg_5baef9; @@ -628,7 +616,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuReadFunctionConfigReg__ = &gpuReadFunctionConfigReg_GM107; } - // Hal function -- gpuWriteFunctionConfigReg + // gpuWriteFunctionConfigReg -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__gpuWriteFunctionConfigReg__ = &gpuWriteFunctionConfigReg_5baef9; @@ -638,7 +626,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuWriteFunctionConfigReg__ = &gpuWriteFunctionConfigReg_GM107; } - // Hal function -- gpuWriteFunctionConfigRegEx + // gpuWriteFunctionConfigRegEx -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__gpuWriteFunctionConfigRegEx__ = &gpuWriteFunctionConfigRegEx_5baef9; @@ -648,7 +636,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuWriteFunctionConfigRegEx__ = &gpuWriteFunctionConfigRegEx_GM107; } - // Hal function -- gpuReadVgpuConfigReg + // gpuReadVgpuConfigReg -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__gpuReadVgpuConfigReg__ = &gpuReadVgpuConfigReg_GH100; @@ -659,7 +647,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuReadVgpuConfigReg__ = &gpuReadVgpuConfigReg_46f6a7; } - // Hal function -- gpuGetIdInfo + // gpuGetIdInfo -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__gpuGetIdInfo__ = &gpuGetIdInfo_GH100; @@ -669,17 +657,17 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuGetIdInfo__ = &gpuGetIdInfo_GM107; } - // Hal function -- gpuGenGidData + // gpuGenGidData -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__gpuGenGidData__ = &gpuGenGidData_VGPUSTUB; + pThis->__gpuGenGidData__ = &gpuGenGidData_VF; } else { pThis->__gpuGenGidData__ = &gpuGenGidData_FWCLIENT; } - // Hal function -- gpuGetChipSubRev + // gpuGetChipSubRev -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__gpuGetChipSubRev__ = &gpuGetChipSubRev_4a4dee; @@ -689,17 +677,17 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuGetChipSubRev__ = &gpuGetChipSubRev_FWCLIENT; } - // Hal function -- gpuGetSkuInfo + // gpuGetSkuInfo -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__gpuGetSkuInfo__ = &gpuGetSkuInfo_VGPUSTUB; + pThis->__gpuGetSkuInfo__ = &gpuGetSkuInfo_VF; } else { pThis->__gpuGetSkuInfo__ = &gpuGetSkuInfo_92bfc3; } - // Hal function -- gpuGetRegBaseOffset + // gpuGetRegBaseOffset -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__gpuGetRegBaseOffset__ = &gpuGetRegBaseOffset_TU102; @@ -709,7 +697,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuGetRegBaseOffset__ = &gpuGetRegBaseOffset_FWCLIENT; } - // Hal function -- gpuHandleSanityCheckRegReadError + // gpuHandleSanityCheckRegReadError -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__gpuHandleSanityCheckRegReadError__ = &gpuHandleSanityCheckRegReadError_GH100; @@ -719,7 +707,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuHandleSanityCheckRegReadError__ = &gpuHandleSanityCheckRegReadError_GM107; } - // Hal function -- gpuHandleSecFault + // gpuHandleSecFault -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__gpuHandleSecFault__ = &gpuHandleSecFault_GH100; @@ -730,7 +718,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuHandleSecFault__ = &gpuHandleSecFault_b3696a; } - // Hal function -- gpuSanityCheckVirtRegAccess + // gpuSanityCheckVirtRegAccess -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ @@ -747,7 +735,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuSanityCheckVirtRegAccess__ = &gpuSanityCheckVirtRegAccess_56cd7a; } - // Hal function -- gpuGetChildrenPresent + // gpuGetChildrenPresent -- halified (7 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000040UL) )) /* ChipHal: TU104 */ { pThis->__gpuGetChildrenPresent__ = &gpuGetChildrenPresent_TU104; @@ -777,7 +765,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuGetChildrenPresent__ = &gpuGetChildrenPresent_AD102; } - // Hal function -- gpuGetClassDescriptorList + // gpuGetClassDescriptorList -- halified (8 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000040UL) )) /* ChipHal: TU104 */ { pThis->__gpuGetClassDescriptorList__ = &gpuGetClassDescriptorList_TU104; @@ -811,7 +799,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuGetClassDescriptorList__ = &gpuGetClassDescriptorList_AD102; } - // Hal function -- gpuGetPhysAddrWidth + // gpuGetPhysAddrWidth -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__gpuGetPhysAddrWidth__ = &gpuGetPhysAddrWidth_GH100; @@ -821,17 +809,17 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuGetPhysAddrWidth__ = &gpuGetPhysAddrWidth_TU102; } - // Hal function -- gpuInitSriov + // gpuInitSriov -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__gpuInitSriov__ = &gpuInitSriov_VGPUSTUB; + pThis->__gpuInitSriov__ = &gpuInitSriov_VF; } else { pThis->__gpuInitSriov__ = &gpuInitSriov_FWCLIENT; } - // Hal function -- gpuDeinitSriov + // gpuDeinitSriov -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__gpuDeinitSriov__ = &gpuDeinitSriov_56cd7a; @@ -841,37 +829,27 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuDeinitSriov__ = &gpuDeinitSriov_FWCLIENT; } - // Hal function -- gpuCreateDefaultClientShare + // gpuCreateDefaultClientShare -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__gpuCreateDefaultClientShare__ = &gpuCreateDefaultClientShare_VGPUSTUB; + pThis->__gpuCreateDefaultClientShare__ = &gpuCreateDefaultClientShare_VF; } else { pThis->__gpuCreateDefaultClientShare__ = &gpuCreateDefaultClientShare_56cd7a; } - // Hal function -- gpuDestroyDefaultClientShare + // gpuDestroyDefaultClientShare -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__gpuDestroyDefaultClientShare__ = &gpuDestroyDefaultClientShare_VGPUSTUB; + pThis->__gpuDestroyDefaultClientShare__ = &gpuDestroyDefaultClientShare_VF; } else { pThis->__gpuDestroyDefaultClientShare__ = &gpuDestroyDefaultClientShare_b3696a; } - // Hal function -- gpuGetVmmuSegmentSize - if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ - { - pThis->__gpuGetVmmuSegmentSize__ = &gpuGetVmmuSegmentSize_13cd8d; - } - else - { - pThis->__gpuGetVmmuSegmentSize__ = &gpuGetVmmuSegmentSize_72c522; - } - - // Hal function -- gpuFuseSupportsDisplay + // gpuFuseSupportsDisplay -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ { pThis->__gpuFuseSupportsDisplay__ = &gpuFuseSupportsDisplay_491d52; @@ -885,27 +863,27 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuFuseSupportsDisplay__ = &gpuFuseSupportsDisplay_GA100; } - // Hal function -- gpuGetActiveFBIOs + // gpuGetActiveFBIOs -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__gpuGetActiveFBIOs__ = &gpuGetActiveFBIOs_VGPUSTUB; + pThis->__gpuGetActiveFBIOs__ = &gpuGetActiveFBIOs_VF; } else { pThis->__gpuGetActiveFBIOs__ = &gpuGetActiveFBIOs_FWCLIENT; } - // Hal function -- gpuCheckPageRetirementSupport + // gpuCheckPageRetirementSupport -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__gpuCheckPageRetirementSupport__ = &gpuCheckPageRetirementSupport_VGPUSTUB; + pThis->__gpuCheckPageRetirementSupport__ = &gpuCheckPageRetirementSupport_VF; } else { pThis->__gpuCheckPageRetirementSupport__ = &gpuCheckPageRetirementSupport_GSPCLIENT; } - // Hal function -- gpuIsInternalSku + // gpuIsInternalSku -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__gpuIsInternalSku__ = &gpuIsInternalSku_491d52; @@ -915,7 +893,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuIsInternalSku__ = &gpuIsInternalSku_FWCLIENT; } - // Hal function -- gpuClearFbhubPoisonIntrForBug2924523 + // gpuClearFbhubPoisonIntrForBug2924523 -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ { pThis->__gpuClearFbhubPoisonIntrForBug2924523__ = &gpuClearFbhubPoisonIntrForBug2924523_GA100; @@ -926,7 +904,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuClearFbhubPoisonIntrForBug2924523__ = &gpuClearFbhubPoisonIntrForBug2924523_56cd7a; } - // Hal function -- gpuCheckIfFbhubPoisonIntrPending + // gpuCheckIfFbhubPoisonIntrPending -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ { pThis->__gpuCheckIfFbhubPoisonIntrPending__ = &gpuCheckIfFbhubPoisonIntrPending_GA100; @@ -937,7 +915,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuCheckIfFbhubPoisonIntrPending__ = &gpuCheckIfFbhubPoisonIntrPending_491d52; } - // Hal function -- gpuGetSriovCaps + // gpuGetSriovCaps -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__gpuGetSriovCaps__ = &gpuGetSriovCaps_46f6a7; @@ -947,7 +925,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuGetSriovCaps__ = &gpuGetSriovCaps_TU102; } - // Hal function -- gpuCheckIsP2PAllocated + // gpuCheckIsP2PAllocated -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ @@ -964,7 +942,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuCheckIsP2PAllocated__ = &gpuCheckIsP2PAllocated_491d52; } - // Hal function -- gpuPrePowerOff + // gpuPrePowerOff -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__gpuPrePowerOff__ = &gpuPrePowerOff_46f6a7; @@ -974,7 +952,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuPrePowerOff__ = &gpuPrePowerOff_56cd7a; } - // Hal function -- gpuVerifyExistence + // gpuVerifyExistence -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__gpuVerifyExistence__ = &gpuVerifyExistence_56cd7a; @@ -984,7 +962,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuVerifyExistence__ = &gpuVerifyExistence_IMPL; } - // Hal function -- gpuGetFlaVasSize + // gpuGetFlaVasSize -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__gpuGetFlaVasSize__ = &gpuGetFlaVasSize_GH100; @@ -998,7 +976,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuGetFlaVasSize__ = &gpuGetFlaVasSize_GA100; } - // Hal function -- gpuIsAtsSupportedWithSmcMemPartitioning + // gpuIsAtsSupportedWithSmcMemPartitioning -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__gpuIsAtsSupportedWithSmcMemPartitioning__ = &gpuIsAtsSupportedWithSmcMemPartitioning_GH100; @@ -1009,17 +987,17 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuIsAtsSupportedWithSmcMemPartitioning__ = &gpuIsAtsSupportedWithSmcMemPartitioning_491d52; } - // Hal function -- gpuIsGlobalPoisonFuseEnabled + // gpuIsGlobalPoisonFuseEnabled -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__gpuIsGlobalPoisonFuseEnabled__ = &gpuIsGlobalPoisonFuseEnabled_VGPUSTUB; + pThis->__gpuIsGlobalPoisonFuseEnabled__ = &gpuIsGlobalPoisonFuseEnabled_VF; } else { pThis->__gpuIsGlobalPoisonFuseEnabled__ = &gpuIsGlobalPoisonFuseEnabled_FWCLIENT; } - // Hal function -- gpuDetermineSelfHostedMode + // gpuDetermineSelfHostedMode -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__gpuDetermineSelfHostedMode__ = &gpuDetermineSelfHostedMode_KERNEL_GH100; @@ -1030,7 +1008,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuDetermineSelfHostedMode__ = &gpuDetermineSelfHostedMode_b3696a; } - // Hal function -- gpuDetermineMIGSupport + // gpuDetermineMIGSupport -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__gpuDetermineMIGSupport__ = &gpuDetermineMIGSupport_b3696a; @@ -1048,7 +1026,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { } } - // Hal function -- gpuInitOptimusSettings + // gpuInitOptimusSettings -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__gpuInitOptimusSettings__ = &gpuInitOptimusSettings_56cd7a; @@ -1058,7 +1036,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuInitOptimusSettings__ = &gpuInitOptimusSettings_IMPL; } - // Hal function -- gpuDeinitOptimusSettings + // gpuDeinitOptimusSettings -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__gpuDeinitOptimusSettings__ = &gpuDeinitOptimusSettings_56cd7a; @@ -1068,7 +1046,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuDeinitOptimusSettings__ = &gpuDeinitOptimusSettings_IMPL; } - // Hal function -- gpuIsSliCapableWithoutDisplay + // gpuIsSliCapableWithoutDisplay -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__gpuIsSliCapableWithoutDisplay__ = &gpuIsSliCapableWithoutDisplay_cbe027; @@ -1079,7 +1057,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuIsSliCapableWithoutDisplay__ = &gpuIsSliCapableWithoutDisplay_491d52; } - // Hal function -- gpuIsCCEnabledInHw + // gpuIsCCEnabledInHw -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__gpuIsCCEnabledInHw__ = &gpuIsCCEnabledInHw_491d52; @@ -1097,7 +1075,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { } } - // Hal function -- gpuIsDevModeEnabledInHw + // gpuIsDevModeEnabledInHw -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__gpuIsDevModeEnabledInHw__ = &gpuIsDevModeEnabledInHw_GH100; @@ -1108,7 +1086,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuIsDevModeEnabledInHw__ = &gpuIsDevModeEnabledInHw_491d52; } - // Hal function -- gpuIsCtxBufAllocInPmaSupported + // gpuIsCtxBufAllocInPmaSupported -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ { pThis->__gpuIsCtxBufAllocInPmaSupported__ = &gpuIsCtxBufAllocInPmaSupported_GA100; @@ -1119,7 +1097,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuIsCtxBufAllocInPmaSupported__ = &gpuIsCtxBufAllocInPmaSupported_491d52; } - // Hal function -- gpuUpdateErrorContainmentState + // gpuUpdateErrorContainmentState -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ @@ -1136,7 +1114,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuUpdateErrorContainmentState__ = &gpuUpdateErrorContainmentState_c04480; } - // Hal function -- gpuWaitForGfwBootComplete + // gpuWaitForGfwBootComplete -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__gpuWaitForGfwBootComplete__ = &gpuWaitForGfwBootComplete_5baef9; @@ -1154,7 +1132,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { } } - // Hal function -- gpuGetIsCmpSku + // gpuGetIsCmpSku -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__gpuGetIsCmpSku__ = &gpuGetIsCmpSku_491d52; @@ -1163,9 +1141,13 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { { pThis->__gpuGetIsCmpSku__ = &gpuGetIsCmpSku_ceaee8; } -} +} // End __nvoc_init_funcTable_OBJGPU_1 with approximately 126 basic block(s). + +// Initialize vtable(s) for 53 virtual method(s). void __nvoc_init_funcTable_OBJGPU(OBJGPU *pThis) { + + // Initialize vtable(s) with 53 per-object function pointer(s). __nvoc_init_funcTable_OBJGPU_1(pThis); } diff --git a/src/nvidia/generated/g_gpu_nvoc.h b/src/nvidia/generated/g_gpu_nvoc.h index 6090018095..a8f2fa376f 100644 --- a/src/nvidia/generated/g_gpu_nvoc.h +++ b/src/nvidia/generated/g_gpu_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_GPU_NVOC_H_ #define _G_GPU_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_gpu_nvoc.h" #ifndef _OBJGPU_H_ @@ -67,6 +75,7 @@ typedef struct GPUATTACHARG GPUATTACHARG; #include "ctrl/ctrl0073/ctrl0073system.h" #include "class/cl2080.h" #include "class/cl90cd.h" +#include "class/cl90cdtrace.h" #include "nvlimits.h" #include "utils/nv_enum.h" @@ -101,6 +110,8 @@ typedef struct GPUATTACHARG GPUATTACHARG; #include "gpuvideo/videoeventlist.h" +#include "kernel/gpu/gsp/kernel_gsp_trace_rats.h" + #include "gpu/gpu_fabric_probe.h" #include "nv_arch.h" @@ -110,6 +121,7 @@ typedef struct GPUATTACHARG GPUATTACHARG; // TODO - the forward declaration of OS_GPU_INFO should be simplified typedef struct nv_state_t OS_GPU_INFO; + struct OBJGMMU; #ifndef __NVOC_CLASS_OBJGMMU_TYPEDEF__ @@ -122,6 +134,7 @@ typedef struct OBJGMMU OBJGMMU; #endif /* __nvoc_class_id_OBJGMMU */ + struct OBJGRIDDISPLAYLESS; #ifndef __NVOC_CLASS_OBJGRIDDISPLAYLESS_TYPEDEF__ @@ -134,6 +147,7 @@ typedef struct OBJGRIDDISPLAYLESS OBJGRIDDISPLAYLESS; #endif /* __nvoc_class_id_OBJGRIDDISPLAYLESS */ + struct OBJHOSTENG; #ifndef __NVOC_CLASS_OBJHOSTENG_TYPEDEF__ @@ -146,6 +160,7 @@ typedef struct OBJHOSTENG OBJHOSTENG; #endif /* __nvoc_class_id_OBJHOSTENG */ + struct OBJPMU_CLIENT_IMPLEMENTER; #ifndef __NVOC_CLASS_OBJPMU_CLIENT_IMPLEMENTER_TYPEDEF__ @@ -158,6 +173,7 @@ typedef struct OBJPMU_CLIENT_IMPLEMENTER OBJPMU_CLIENT_IMPLEMENTER; #endif /* __nvoc_class_id_OBJPMU_CLIENT_IMPLEMENTER */ + struct OBJINTRABLE; #ifndef __NVOC_CLASS_OBJINTRABLE_TYPEDEF__ @@ -170,6 +186,7 @@ typedef struct OBJINTRABLE OBJINTRABLE; #endif /* __nvoc_class_id_OBJINTRABLE */ + struct OBJVBIOS; #ifndef __NVOC_CLASS_OBJVBIOS_TYPEDEF__ @@ -182,6 +199,7 @@ typedef struct OBJVBIOS OBJVBIOS; #endif /* __nvoc_class_id_OBJVBIOS */ + struct NvDebugDump; #ifndef __NVOC_CLASS_NvDebugDump_TYPEDEF__ @@ -194,6 +212,7 @@ typedef struct NvDebugDump NvDebugDump; #endif /* __nvoc_class_id_NvDebugDump */ + struct GpuMutexMgr; #ifndef __NVOC_CLASS_GpuMutexMgr_TYPEDEF__ @@ -206,6 +225,7 @@ typedef struct GpuMutexMgr GpuMutexMgr; #endif /* __nvoc_class_id_GpuMutexMgr */ + struct KernelFalcon; #ifndef __NVOC_CLASS_KernelFalcon_TYPEDEF__ @@ -218,6 +238,7 @@ typedef struct KernelFalcon KernelFalcon; #endif /* __nvoc_class_id_KernelFalcon */ + struct KernelVideoEngine; #ifndef __NVOC_CLASS_KernelVideoEngine_TYPEDEF__ @@ -230,6 +251,7 @@ typedef struct KernelVideoEngine KernelVideoEngine; #endif /* __nvoc_class_id_KernelVideoEngine */ + struct KernelChannel; #ifndef __NVOC_CLASS_KernelChannel_TYPEDEF__ @@ -242,6 +264,7 @@ typedef struct KernelChannel KernelChannel; #endif /* __nvoc_class_id_KernelChannel */ + struct GenericKernelFalcon; #ifndef __NVOC_CLASS_GenericKernelFalcon_TYPEDEF__ @@ -255,6 +278,7 @@ typedef struct GenericKernelFalcon GenericKernelFalcon; + struct Subdevice; #ifndef __NVOC_CLASS_Subdevice_TYPEDEF__ @@ -267,6 +291,7 @@ typedef struct Subdevice Subdevice; #endif /* __nvoc_class_id_Subdevice */ + struct Device; #ifndef __NVOC_CLASS_Device_TYPEDEF__ @@ -279,6 +304,7 @@ typedef struct Device Device; #endif /* __nvoc_class_id_Device */ + struct RsClient; #ifndef __NVOC_CLASS_RsClient_TYPEDEF__ @@ -411,14 +437,9 @@ typedef struct typedef struct { - NvU32 childTypeIdx; - NvU32 childInst; - NvU32 gpuChildPtrOffset; + NvU32 childIndex; } GPU_CHILD_ITER; -typedef GPU_CHILD_ITER ENGSTATE_ITER; -typedef GPU_CHILD_ITER PMU_CLIENT_IMPLEMENTER_ITER; - // // Object 'get' macros for GPU relative object retrievals. // @@ -727,6 +748,7 @@ typedef struct NvU32 p2pOptimalWriteCEs; NvU8 p2pCapsStatus[NV0000_CTRL_P2P_CAPS_INDEX_TABLE_SIZE]; NvU32 busPeerId; + NvU32 busEgmPeerId; } GPU_P2P_PEER_GPU_CAPS; // @@ -896,6 +918,8 @@ typedef struct NV2080_CTRL_INTERNAL_DEVICE_INFO DEVICE_INFO2_ENTRY; (pGpu->nvswitchSupport == NV2080_CTRL_PMGR_MODULE_INFO_NVSWITCH_SUPPORTED) +typedef struct GspTraceBuffer GspTraceBuffer; + // // The actual GPU object definition // @@ -909,77 +933,117 @@ typedef struct NV2080_CTRL_INTERNAL_DEVICE_INFO DEVICE_INFO2_ENTRY; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif +union __nvoc_inner_struc_OBJGPU_1__ { + struct { + struct KernelBif *pKernelBif; + struct KernelMc *pKernelMc; + struct SwIntr *pSwIntr; + struct KernelMemorySystem *pKernelMemorySystem; + struct MemoryManager *pMemoryManager; + struct KernelDisplay *pKernelDisplay; + struct OBJTMR *pTmr; + struct KernelBus *pKernelBus; + struct KernelGmmu *pKernelGmmu; + struct KernelSec2 *pKernelSec2; + struct KernelGsp *pKernelGsp; + struct VirtMemAllocator *pDma; + struct KernelMIGManager *pKernelMIGManager; + struct KernelGraphicsManager *pKernelGraphicsManager; + struct KernelGraphics *pKernelGraphics[8]; + struct KernelPerf *pKernelPerf; + struct KernelRc *pKernelRc; + struct Intr *pIntr; + struct KernelPmu *pKernelPmu; + struct KernelCE *pKCe[10]; + struct KernelFifo *pKernelFifo; + struct OBJUVM *pUvm; + struct NvDebugDump *pNvd; + struct KernelNvlink *pKernelNvlink; + struct OBJGPUMON *pGpuMon; + struct KernelHwpm *pKernelHwpm; + struct OBJSWENG *pSwEng; + struct KernelFsp *pKernelFsp; + struct ConfidentialCompute *pConfCompute; + struct KernelCcu *pKernelCcu; + } named; + Dynamic *pChild[46]; +}; + + + struct OBJGPU { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; struct RmHalspecOwner __nvoc_base_RmHalspecOwner; struct OBJTRACEABLE __nvoc_base_OBJTRACEABLE; - struct Object *__nvoc_pbase_Object; - struct RmHalspecOwner *__nvoc_pbase_RmHalspecOwner; - struct OBJTRACEABLE *__nvoc_pbase_OBJTRACEABLE; - struct OBJGPU *__nvoc_pbase_OBJGPU; - NV_STATUS (*__gpuConstructDeviceInfoTable__)(struct OBJGPU *); - NV_STATUS (*__gpuGetNameString__)(struct OBJGPU *, NvU32, void *); - NV_STATUS (*__gpuGetShortNameString__)(struct OBJGPU *, NvU8 *); - NV_STATUS (*__gpuInitBranding__)(struct OBJGPU *); - void (*__gpuInitProperties__)(struct OBJGPU *); - NV_STATUS (*__gpuBuildKernelVideoEngineList__)(struct OBJGPU *); - NV_STATUS (*__gpuInitVideoLogging__)(struct OBJGPU *); - void (*__gpuFreeVideoLogging__)(struct OBJGPU *); - void (*__gpuDestroyKernelVideoEngineList__)(struct OBJGPU *); - NV_STATUS (*__gpuPowerOff__)(struct OBJGPU *); - NV_STATUS (*__gpuWriteBusConfigReg__)(struct OBJGPU *, NvU32, NvU32); - NV_STATUS (*__gpuReadBusConfigReg__)(struct OBJGPU *, NvU32, NvU32 *); - NV_STATUS (*__gpuReadBusConfigRegEx__)(struct OBJGPU *, NvU32, NvU32 *, THREAD_STATE_NODE *); - NV_STATUS (*__gpuReadFunctionConfigReg__)(struct OBJGPU *, NvU32, NvU32, NvU32 *); - NV_STATUS (*__gpuWriteFunctionConfigReg__)(struct OBJGPU *, NvU32, NvU32, NvU32); - NV_STATUS (*__gpuWriteFunctionConfigRegEx__)(struct OBJGPU *, NvU32, NvU32, NvU32, THREAD_STATE_NODE *); - NV_STATUS (*__gpuReadVgpuConfigReg__)(struct OBJGPU *, NvU32, NvU32 *); - void (*__gpuGetIdInfo__)(struct OBJGPU *); - NV_STATUS (*__gpuGenGidData__)(struct OBJGPU *, NvU8 *, NvU32, NvU32); - NvU8 (*__gpuGetChipSubRev__)(struct OBJGPU *); - NV_STATUS (*__gpuGetSkuInfo__)(struct OBJGPU *, NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS *); - NV_STATUS (*__gpuGetRegBaseOffset__)(struct OBJGPU *, NvU32, NvU32 *); - void (*__gpuHandleSanityCheckRegReadError__)(struct OBJGPU *, NvU32, NvU32); - void (*__gpuHandleSecFault__)(struct OBJGPU *); - NV_STATUS (*__gpuSanityCheckVirtRegAccess__)(struct OBJGPU *, NvU32); - const GPUCHILDPRESENT *(*__gpuGetChildrenPresent__)(struct OBJGPU *, NvU32 *); - const CLASSDESCRIPTOR *(*__gpuGetClassDescriptorList__)(struct OBJGPU *, NvU32 *); - NvU32 (*__gpuGetPhysAddrWidth__)(struct OBJGPU *, NV_ADDRESS_SPACE); - NV_STATUS (*__gpuInitSriov__)(struct OBJGPU *); - NV_STATUS (*__gpuDeinitSriov__)(struct OBJGPU *); - NV_STATUS (*__gpuCreateDefaultClientShare__)(struct OBJGPU *); - void (*__gpuDestroyDefaultClientShare__)(struct OBJGPU *); - NvU64 (*__gpuGetVmmuSegmentSize__)(struct OBJGPU *); - NvBool (*__gpuFuseSupportsDisplay__)(struct OBJGPU *); - NvU32 (*__gpuGetActiveFBIOs__)(struct OBJGPU *); - NvBool (*__gpuCheckPageRetirementSupport__)(struct OBJGPU *); - NvBool (*__gpuIsInternalSku__)(struct OBJGPU *); - NV_STATUS (*__gpuClearFbhubPoisonIntrForBug2924523__)(struct OBJGPU *); - NvBool (*__gpuCheckIfFbhubPoisonIntrPending__)(struct OBJGPU *); - NV_STATUS (*__gpuGetSriovCaps__)(struct OBJGPU *, NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS *); - NvBool (*__gpuCheckIsP2PAllocated__)(struct OBJGPU *); - NV_STATUS (*__gpuPrePowerOff__)(struct OBJGPU *); - NV_STATUS (*__gpuVerifyExistence__)(struct OBJGPU *); - NvU64 (*__gpuGetFlaVasSize__)(struct OBJGPU *, NvBool); - NvBool (*__gpuIsAtsSupportedWithSmcMemPartitioning__)(struct OBJGPU *); - NvBool (*__gpuIsGlobalPoisonFuseEnabled__)(struct OBJGPU *); - void (*__gpuDetermineSelfHostedMode__)(struct OBJGPU *); - void (*__gpuDetermineMIGSupport__)(struct OBJGPU *); - NV_STATUS (*__gpuInitOptimusSettings__)(struct OBJGPU *); - NV_STATUS (*__gpuDeinitOptimusSettings__)(struct OBJGPU *); - NvBool (*__gpuIsSliCapableWithoutDisplay__)(struct OBJGPU *); - NvBool (*__gpuIsCCEnabledInHw__)(struct OBJGPU *); - NvBool (*__gpuIsDevModeEnabledInHw__)(struct OBJGPU *); - NvBool (*__gpuIsCtxBufAllocInPmaSupported__)(struct OBJGPU *); - NV_STATUS (*__gpuUpdateErrorContainmentState__)(struct OBJGPU *, NV_ERROR_CONT_ERR_ID, NV_ERROR_CONT_LOCATION, NvU32 *); - NV_STATUS (*__gpuWaitForGfwBootComplete__)(struct OBJGPU *); - NvBool (*__gpuGetIsCmpSku__)(struct OBJGPU *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct RmHalspecOwner *__nvoc_pbase_RmHalspecOwner; // rmhalspecowner super + struct OBJTRACEABLE *__nvoc_pbase_OBJTRACEABLE; // traceable super + struct OBJGPU *__nvoc_pbase_OBJGPU; // gpu + + // Vtable with 53 per-object function pointers + NV_STATUS (*__gpuConstructDeviceInfoTable__)(struct OBJGPU * /*this*/); // halified (3 hals) body + NV_STATUS (*__gpuGetNameString__)(struct OBJGPU * /*this*/, NvU32, void *); // halified (2 hals) + NV_STATUS (*__gpuGetShortNameString__)(struct OBJGPU * /*this*/, NvU8 *); // halified (2 hals) + NV_STATUS (*__gpuInitBranding__)(struct OBJGPU * /*this*/); // halified (2 hals) body + void (*__gpuInitProperties__)(struct OBJGPU * /*this*/); // halified (2 hals) body + void (*__gpuGetRtd3GC6Data__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NV_STATUS (*__gpuPowerOff__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NV_STATUS (*__gpuWriteBusConfigReg__)(struct OBJGPU * /*this*/, NvU32, NvU32); // halified (2 hals) body + NV_STATUS (*__gpuReadBusConfigReg__)(struct OBJGPU * /*this*/, NvU32, NvU32 *); // halified (2 hals) body + NV_STATUS (*__gpuReadBusConfigRegEx__)(struct OBJGPU * /*this*/, NvU32, NvU32 *, THREAD_STATE_NODE *); // halified (2 hals) body + NV_STATUS (*__gpuReadFunctionConfigReg__)(struct OBJGPU * /*this*/, NvU32, NvU32, NvU32 *); // halified (2 hals) body + NV_STATUS (*__gpuWriteFunctionConfigReg__)(struct OBJGPU * /*this*/, NvU32, NvU32, NvU32); // halified (2 hals) body + NV_STATUS (*__gpuWriteFunctionConfigRegEx__)(struct OBJGPU * /*this*/, NvU32, NvU32, NvU32, THREAD_STATE_NODE *); // halified (2 hals) body + NV_STATUS (*__gpuReadVgpuConfigReg__)(struct OBJGPU * /*this*/, NvU32, NvU32 *); // halified (2 hals) body + void (*__gpuGetIdInfo__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NV_STATUS (*__gpuGenGidData__)(struct OBJGPU * /*this*/, NvU8 *, NvU32, NvU32); // halified (2 hals) body + NvU8 (*__gpuGetChipSubRev__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NV_STATUS (*__gpuGetSkuInfo__)(struct OBJGPU * /*this*/, NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS *); // halified (2 hals) body + NV_STATUS (*__gpuGetRegBaseOffset__)(struct OBJGPU * /*this*/, NvU32, NvU32 *); // halified (2 hals) body + void (*__gpuHandleSanityCheckRegReadError__)(struct OBJGPU * /*this*/, NvU32, NvU32); // halified (2 hals) body + void (*__gpuHandleSecFault__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NV_STATUS (*__gpuSanityCheckVirtRegAccess__)(struct OBJGPU * /*this*/, NvU32); // halified (3 hals) body + const GPUCHILDPRESENT * (*__gpuGetChildrenPresent__)(struct OBJGPU * /*this*/, NvU32 *); // halified (7 hals) + const CLASSDESCRIPTOR * (*__gpuGetClassDescriptorList__)(struct OBJGPU * /*this*/, NvU32 *); // halified (8 hals) + NvU32 (*__gpuGetPhysAddrWidth__)(struct OBJGPU * /*this*/, NV_ADDRESS_SPACE); // halified (2 hals) + NV_STATUS (*__gpuInitSriov__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NV_STATUS (*__gpuDeinitSriov__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NV_STATUS (*__gpuCreateDefaultClientShare__)(struct OBJGPU * /*this*/); // halified (2 hals) body + void (*__gpuDestroyDefaultClientShare__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NvBool (*__gpuFuseSupportsDisplay__)(struct OBJGPU * /*this*/); // halified (3 hals) body + NvU64 (*__gpuGetActiveFBIOs__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NvBool (*__gpuCheckPageRetirementSupport__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NvBool (*__gpuIsInternalSku__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NV_STATUS (*__gpuClearFbhubPoisonIntrForBug2924523__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NvBool (*__gpuCheckIfFbhubPoisonIntrPending__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NV_STATUS (*__gpuGetSriovCaps__)(struct OBJGPU * /*this*/, NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS *); // halified (2 hals) body + NvBool (*__gpuCheckIsP2PAllocated__)(struct OBJGPU * /*this*/); // halified (3 hals) body + NV_STATUS (*__gpuPrePowerOff__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NV_STATUS (*__gpuVerifyExistence__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NvU64 (*__gpuGetFlaVasSize__)(struct OBJGPU * /*this*/, NvBool); // halified (3 hals) body + NvBool (*__gpuIsAtsSupportedWithSmcMemPartitioning__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NvBool (*__gpuIsGlobalPoisonFuseEnabled__)(struct OBJGPU * /*this*/); // halified (2 hals) + void (*__gpuDetermineSelfHostedMode__)(struct OBJGPU * /*this*/); // halified (2 hals) body + void (*__gpuDetermineMIGSupport__)(struct OBJGPU * /*this*/); // halified (3 hals) body + NV_STATUS (*__gpuInitOptimusSettings__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NV_STATUS (*__gpuDeinitOptimusSettings__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NvBool (*__gpuIsSliCapableWithoutDisplay__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NvBool (*__gpuIsCCEnabledInHw__)(struct OBJGPU * /*this*/); // halified (3 hals) body + NvBool (*__gpuIsDevModeEnabledInHw__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NvBool (*__gpuIsCtxBufAllocInPmaSupported__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NV_STATUS (*__gpuUpdateErrorContainmentState__)(struct OBJGPU * /*this*/, NV_ERROR_CONT_ERR_ID, NV_ERROR_CONT_LOCATION, NvU32 *); // halified (3 hals) body + NV_STATUS (*__gpuWaitForGfwBootComplete__)(struct OBJGPU * /*this*/); // halified (3 hals) body + NvBool (*__gpuGetIsCmpSku__)(struct OBJGPU * /*this*/); // halified (2 hals) body + + // 101 PDB properties NvBool PDB_PROP_GPU_HIGH_SPEED_BRIDGE_CONNECTED; - NvBool bVideoLinkDisabled; - GPU_FABRIC_PROBE_INFO_KERNEL *pGpuFabricProbeInfoKernel; - NvU32 moduleId; - NvU8 nvswitchSupport; NvBool PDB_PROP_GPU_IN_STANDBY; NvBool PDB_PROP_GPU_IN_HIBERNATE; NvBool PDB_PROP_GPU_IN_PM_CODEPATH; @@ -1017,7 +1081,6 @@ struct OBJGPU { NvBool PDB_PROP_GPU_VC_CAPABILITY_SUPPORTED; NvBool PDB_PROP_GPU_RESETLESS_MIG_SUPPORTED; NvBool PDB_PROP_GPU_IS_COT_ENABLED; - NvBool bIsFlexibleFlaSupported; NvBool PDB_PROP_GPU_SRIOV_SYSMEM_DIRTY_PAGE_TRACKING_ENABLED; NvBool PDB_PROP_GPU_VGPU_OFFLOAD_CAPABLE; NvBool PDB_PROP_GPU_SWRL_GRANULAR_LOCKING; @@ -1040,6 +1103,8 @@ struct OBJGPU { NvBool PDB_PROP_GPU_IS_MOBILE; NvBool PDB_PROP_GPU_RTD3_GC6_SUPPORTED; NvBool PDB_PROP_GPU_RTD3_GC6_ACTIVE; + NvBool PDB_PROP_GPU_RTD3_GC8_SUPPORTED; + NvBool PDB_PROP_GPU_RTD3_GC8_ACTIVE; NvBool PDB_PROP_GPU_FAST_GC6_ACTIVE; NvBool PDB_PROP_GPU_UNIX_DYNAMIC_POWER_SUPPORTED; NvBool PDB_PROP_GPU_MOVE_CTX_BUFFERS_TO_PMA; @@ -1078,6 +1143,14 @@ struct OBJGPU { NvBool PDB_PROP_GPU_DISP_PB_REQUIRES_SMMU_BYPASS; NvBool PDB_PROP_GPU_FORCE_PERF_BIOS_LEVEL; NvBool PDB_PROP_GPU_FASTPATH_SEQ_ENABLED; + NvBool PDB_PROP_GPU_PREPARING_FULLCHIP_RESET; + + // Data members + NvBool bVideoLinkDisabled; + GPU_FABRIC_PROBE_INFO_KERNEL *pGpuFabricProbeInfoKernel; + NvU32 moduleId; + NvU8 nvswitchSupport; + NvBool bIsFlexibleFlaSupported; OS_GPU_INFO *pOsGpuInfo; OS_RM_CAPS *pOsRmCaps; NvU32 halImpl; @@ -1113,12 +1186,13 @@ struct OBJGPU { NvBool testIntr; NvU32 numCEs; NvU32 ceFaultMethodBufferSize; + NvS32 lockStressCounter; NvBool isVirtual; NvBool isGspClient; NvU64 fbLength; NvU32 instLength; NvBool instSetViaAttachArg; - NvU32 activeFBIOs; + NvU64 activeFBIOs; NvU64 gpuVbiosPostTime; NvU32 uefiScanoutSurfaceSizeInMB; RmPhysAddr dmaStartAddress; @@ -1136,36 +1210,7 @@ struct OBJGPU { NvU32 sliStatus; struct OBJOS *pOS; struct OBJHAL *pHal; - struct KernelBif *pKernelBif; - struct KernelMc *pKernelMc; - struct SwIntr *pSwIntr; - struct KernelMemorySystem *pKernelMemorySystem; - struct MemoryManager *pMemoryManager; - struct KernelDisplay *pKernelDisplay; - struct OBJTMR *pTmr; - struct KernelBus *pKernelBus; - struct KernelGmmu *pKernelGmmu; - struct KernelSec2 *pKernelSec2; - struct KernelGsp *pKernelGsp; - struct VirtMemAllocator *pDma; - struct KernelMIGManager *pKernelMIGManager; - struct KernelGraphicsManager *pKernelGraphicsManager; - struct KernelGraphics *pKernelGraphics[8]; - struct KernelPerf *pKernelPerf; - struct KernelRc *pKernelRc; - struct Intr *pIntr; - struct KernelPmu *pKernelPmu; - struct KernelCE *pKCe[10]; - struct KernelFifo *pKernelFifo; - struct OBJUVM *pUvm; - struct NvDebugDump *pNvd; - struct KernelNvlink *pKernelNvlink; - struct OBJGPUMON *pGpuMon; - struct KernelHwpm *pKernelHwpm; - struct OBJSWENG *pSwEng; - struct KernelFsp *pKernelFsp; - struct ConfidentialCompute *pConfCompute; - struct KernelCcu *pKernelCcu; + union __nvoc_inner_struc_OBJGPU_1__ children; HWBC_LIST *pHWBCList; GPUCLDATA gpuClData; _GPU_ENGINE_DB engineDB; @@ -1205,6 +1250,7 @@ struct OBJGPU { NvHandle hInternalClient; NvHandle hInternalDevice; NvHandle hInternalSubdevice; + NvHandle hInternalLockStressClient; struct Subdevice *pCachedSubdevice; struct RsClient *pCachedRsClient; RM_API physicalRmApi; @@ -1240,6 +1286,7 @@ struct OBJGPU { NvBool bSriovEnabled; NvBool bWarBug200577889SriovHeavyEnabled; NvBool bNonPowerOf2ChannelCountSupported; + NvBool bWarBug4347206PowerCycleOnUnload; NvBool bCacheOnlyMode; NvBool bNeed4kPageIsolation; NvBool bSplitVasManagementServerClientRm; @@ -1253,6 +1300,10 @@ struct OBJGPU { NvS16 videoCtxswLogConsumerCount; VideoEventBufferBindMultiMap videoEventBufferBindingsUid; TMR_EVENT *pVideoTimerEvent; + GspTraceEventBufferBindMultiMap gspTraceEventBufferBindingsUid; + NvU32 gspTraceExpectSeqNo; + NvS16 gspTraceConsumerCount; + NvBool gspTraceLoggingBufferActive; NVENC_SESSION_LIST nvencSessionList; NvU32 encSessionStatsReportingState; NvBool bNvEncSessionDataProcessingWorkItemPending; @@ -1292,6 +1343,7 @@ struct OBJGPU { NvBool bVfResizableBAR1Supported; NvBool bVoltaHubIntrSupported; NvBool bAmpereErrorContainmentXidEnabled; + NvBool bUsePmcDeviceEnableForHostEngine; _GPU_GC6_STATE gc6State; }; @@ -1304,6 +1356,7 @@ typedef struct OBJGPU OBJGPU; #define __nvoc_class_id_OBJGPU 0x7ef3cb #endif /* __nvoc_class_id_OBJGPU */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPU; #define __staticCast_OBJGPU(pThis) \ @@ -1316,6 +1369,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPU; ((OBJGPU*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJGPU))) #endif //__nvoc_gpu_h_disabled +// Property macros #define PDB_PROP_GPU_RTD3_GC6_SUPPORTED_BASE_CAST #define PDB_PROP_GPU_RTD3_GC6_SUPPORTED_BASE_NAME PDB_PROP_GPU_RTD3_GC6_SUPPORTED #define PDB_PROP_GPU_IS_VIRTUALIZATION_MODE_HOST_VGPU_BASE_CAST @@ -1406,6 +1460,8 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPU; #define PDB_PROP_GPU_LEGACY_GCOFF_SUPPORTED_BASE_NAME PDB_PROP_GPU_LEGACY_GCOFF_SUPPORTED #define PDB_PROP_GPU_EXTERNAL_HEAP_CONTROL_BASE_CAST #define PDB_PROP_GPU_EXTERNAL_HEAP_CONTROL_BASE_NAME PDB_PROP_GPU_EXTERNAL_HEAP_CONTROL +#define PDB_PROP_GPU_RTD3_GC8_SUPPORTED_BASE_CAST +#define PDB_PROP_GPU_RTD3_GC8_SUPPORTED_BASE_NAME PDB_PROP_GPU_RTD3_GC8_SUPPORTED #define PDB_PROP_GPU_INACCESSIBLE_BASE_CAST #define PDB_PROP_GPU_INACCESSIBLE_BASE_NAME PDB_PROP_GPU_INACCESSIBLE #define PDB_PROP_GPU_DO_NOT_CHECK_REG_ACCESS_IN_PM_CODEPATH_BASE_CAST @@ -1480,6 +1536,8 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPU; #define PDB_PROP_GPU_ALTERNATE_TREE_HANDLE_LOCKLESS_BASE_NAME PDB_PROP_GPU_ALTERNATE_TREE_HANDLE_LOCKLESS #define PDB_PROP_GPU_CHIP_SUPPORTS_RTD3_DEF_BASE_CAST #define PDB_PROP_GPU_CHIP_SUPPORTS_RTD3_DEF_BASE_NAME PDB_PROP_GPU_CHIP_SUPPORTS_RTD3_DEF +#define PDB_PROP_GPU_PREPARING_FULLCHIP_RESET_BASE_CAST +#define PDB_PROP_GPU_PREPARING_FULLCHIP_RESET_BASE_NAME PDB_PROP_GPU_PREPARING_FULLCHIP_RESET #define PDB_PROP_GPU_DISP_PB_REQUIRES_SMMU_BYPASS_BASE_CAST #define PDB_PROP_GPU_DISP_PB_REQUIRES_SMMU_BYPASS_BASE_NAME PDB_PROP_GPU_DISP_PB_REQUIRES_SMMU_BYPASS #define PDB_PROP_GPU_NVLINK_P2P_LOOPBACK_DISABLED_BASE_CAST @@ -1506,6 +1564,8 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPU; #define PDB_PROP_GPU_BEHIND_BRIDGE_BASE_NAME PDB_PROP_GPU_BEHIND_BRIDGE #define PDB_PROP_GPU_UPSTREAM_PORT_L1_POR_MOBILE_ONLY_BASE_CAST #define PDB_PROP_GPU_UPSTREAM_PORT_L1_POR_MOBILE_ONLY_BASE_NAME PDB_PROP_GPU_UPSTREAM_PORT_L1_POR_MOBILE_ONLY +#define PDB_PROP_GPU_RTD3_GC8_ACTIVE_BASE_CAST +#define PDB_PROP_GPU_RTD3_GC8_ACTIVE_BASE_NAME PDB_PROP_GPU_RTD3_GC8_ACTIVE #define PDB_PROP_GPU_VGPU_BIG_PAGE_SIZE_64K_BASE_CAST #define PDB_PROP_GPU_VGPU_BIG_PAGE_SIZE_64K_BASE_NAME PDB_PROP_GPU_VGPU_BIG_PAGE_SIZE_64K #define PDB_PROP_GPU_IS_LOST_BASE_CAST @@ -1523,120 +1583,381 @@ NV_STATUS __nvoc_objCreate_OBJGPU(OBJGPU**, Dynamic*, NvU32, #define __objCreate_OBJGPU(ppNewObj, pParent, createFlags, ChipHal_arch, ChipHal_impl, ChipHal_hidrev, RmVariantHal_rmVariant, TegraChipHal_tegraType, DispIpHal_ipver, arg_gpuInstance, arg_gpuId, arg_pUuid) \ __nvoc_objCreate_OBJGPU((ppNewObj), staticCast((pParent), Dynamic), (createFlags), ChipHal_arch, ChipHal_impl, ChipHal_hidrev, RmVariantHal_rmVariant, TegraChipHal_tegraType, DispIpHal_ipver, arg_gpuInstance, arg_gpuId, arg_pUuid) + +// Wrapper macros +#define gpuConstructDeviceInfoTable_FNPTR(pGpu) pGpu->__gpuConstructDeviceInfoTable__ #define gpuConstructDeviceInfoTable(pGpu) gpuConstructDeviceInfoTable_DISPATCH(pGpu) #define gpuConstructDeviceInfoTable_HAL(pGpu) gpuConstructDeviceInfoTable_DISPATCH(pGpu) -#define gpuGetNameString(pGpu, arg0, arg1) gpuGetNameString_DISPATCH(pGpu, arg0, arg1) -#define gpuGetNameString_HAL(pGpu, arg0, arg1) gpuGetNameString_DISPATCH(pGpu, arg0, arg1) -#define gpuGetShortNameString(pGpu, arg0) gpuGetShortNameString_DISPATCH(pGpu, arg0) -#define gpuGetShortNameString_HAL(pGpu, arg0) gpuGetShortNameString_DISPATCH(pGpu, arg0) +#define gpuGetNameString_FNPTR(pGpu) pGpu->__gpuGetNameString__ +#define gpuGetNameString(pGpu, arg2, arg3) gpuGetNameString_DISPATCH(pGpu, arg2, arg3) +#define gpuGetNameString_HAL(pGpu, arg2, arg3) gpuGetNameString_DISPATCH(pGpu, arg2, arg3) +#define gpuGetShortNameString_FNPTR(pGpu) pGpu->__gpuGetShortNameString__ +#define gpuGetShortNameString(pGpu, arg2) gpuGetShortNameString_DISPATCH(pGpu, arg2) +#define gpuGetShortNameString_HAL(pGpu, arg2) gpuGetShortNameString_DISPATCH(pGpu, arg2) +#define gpuInitBranding_FNPTR(pGpu) pGpu->__gpuInitBranding__ #define gpuInitBranding(pGpu) gpuInitBranding_DISPATCH(pGpu) #define gpuInitBranding_HAL(pGpu) gpuInitBranding_DISPATCH(pGpu) +#define gpuInitProperties_FNPTR(pGpu) pGpu->__gpuInitProperties__ #define gpuInitProperties(pGpu) gpuInitProperties_DISPATCH(pGpu) #define gpuInitProperties_HAL(pGpu) gpuInitProperties_DISPATCH(pGpu) -#define gpuBuildKernelVideoEngineList(pGpu) gpuBuildKernelVideoEngineList_DISPATCH(pGpu) -#define gpuBuildKernelVideoEngineList_HAL(pGpu) gpuBuildKernelVideoEngineList_DISPATCH(pGpu) -#define gpuInitVideoLogging(pGpu) gpuInitVideoLogging_DISPATCH(pGpu) -#define gpuInitVideoLogging_HAL(pGpu) gpuInitVideoLogging_DISPATCH(pGpu) -#define gpuFreeVideoLogging(pGpu) gpuFreeVideoLogging_DISPATCH(pGpu) -#define gpuFreeVideoLogging_HAL(pGpu) gpuFreeVideoLogging_DISPATCH(pGpu) -#define gpuDestroyKernelVideoEngineList(pGpu) gpuDestroyKernelVideoEngineList_DISPATCH(pGpu) -#define gpuDestroyKernelVideoEngineList_HAL(pGpu) gpuDestroyKernelVideoEngineList_DISPATCH(pGpu) +#define gpuGetRtd3GC6Data_FNPTR(pGpu) pGpu->__gpuGetRtd3GC6Data__ +#define gpuGetRtd3GC6Data(pGpu) gpuGetRtd3GC6Data_DISPATCH(pGpu) +#define gpuGetRtd3GC6Data_HAL(pGpu) gpuGetRtd3GC6Data_DISPATCH(pGpu) +#define gpuPowerOff_FNPTR(pGpu) pGpu->__gpuPowerOff__ #define gpuPowerOff(pGpu) gpuPowerOff_DISPATCH(pGpu) #define gpuPowerOff_HAL(pGpu) gpuPowerOff_DISPATCH(pGpu) +#define gpuWriteBusConfigReg_FNPTR(pGpu) pGpu->__gpuWriteBusConfigReg__ #define gpuWriteBusConfigReg(pGpu, index, value) gpuWriteBusConfigReg_DISPATCH(pGpu, index, value) #define gpuWriteBusConfigReg_HAL(pGpu, index, value) gpuWriteBusConfigReg_DISPATCH(pGpu, index, value) +#define gpuReadBusConfigReg_FNPTR(pGpu) pGpu->__gpuReadBusConfigReg__ #define gpuReadBusConfigReg(pGpu, index, data) gpuReadBusConfigReg_DISPATCH(pGpu, index, data) #define gpuReadBusConfigReg_HAL(pGpu, index, data) gpuReadBusConfigReg_DISPATCH(pGpu, index, data) +#define gpuReadBusConfigRegEx_FNPTR(pGpu) pGpu->__gpuReadBusConfigRegEx__ #define gpuReadBusConfigRegEx(pGpu, index, data, pThreadState) gpuReadBusConfigRegEx_DISPATCH(pGpu, index, data, pThreadState) #define gpuReadBusConfigRegEx_HAL(pGpu, index, data, pThreadState) gpuReadBusConfigRegEx_DISPATCH(pGpu, index, data, pThreadState) +#define gpuReadFunctionConfigReg_FNPTR(pGpu) pGpu->__gpuReadFunctionConfigReg__ #define gpuReadFunctionConfigReg(pGpu, function, reg, data) gpuReadFunctionConfigReg_DISPATCH(pGpu, function, reg, data) #define gpuReadFunctionConfigReg_HAL(pGpu, function, reg, data) gpuReadFunctionConfigReg_DISPATCH(pGpu, function, reg, data) +#define gpuWriteFunctionConfigReg_FNPTR(pGpu) pGpu->__gpuWriteFunctionConfigReg__ #define gpuWriteFunctionConfigReg(pGpu, function, reg, data) gpuWriteFunctionConfigReg_DISPATCH(pGpu, function, reg, data) #define gpuWriteFunctionConfigReg_HAL(pGpu, function, reg, data) gpuWriteFunctionConfigReg_DISPATCH(pGpu, function, reg, data) +#define gpuWriteFunctionConfigRegEx_FNPTR(pGpu) pGpu->__gpuWriteFunctionConfigRegEx__ #define gpuWriteFunctionConfigRegEx(pGpu, function, reg, data, pThreadState) gpuWriteFunctionConfigRegEx_DISPATCH(pGpu, function, reg, data, pThreadState) #define gpuWriteFunctionConfigRegEx_HAL(pGpu, function, reg, data, pThreadState) gpuWriteFunctionConfigRegEx_DISPATCH(pGpu, function, reg, data, pThreadState) +#define gpuReadVgpuConfigReg_FNPTR(pGpu) pGpu->__gpuReadVgpuConfigReg__ #define gpuReadVgpuConfigReg(pGpu, index, data) gpuReadVgpuConfigReg_DISPATCH(pGpu, index, data) #define gpuReadVgpuConfigReg_HAL(pGpu, index, data) gpuReadVgpuConfigReg_DISPATCH(pGpu, index, data) +#define gpuGetIdInfo_FNPTR(pGpu) pGpu->__gpuGetIdInfo__ #define gpuGetIdInfo(pGpu) gpuGetIdInfo_DISPATCH(pGpu) #define gpuGetIdInfo_HAL(pGpu) gpuGetIdInfo_DISPATCH(pGpu) +#define gpuGenGidData_FNPTR(pGpu) pGpu->__gpuGenGidData__ #define gpuGenGidData(pGpu, pGidData, gidSize, gidFlags) gpuGenGidData_DISPATCH(pGpu, pGidData, gidSize, gidFlags) #define gpuGenGidData_HAL(pGpu, pGidData, gidSize, gidFlags) gpuGenGidData_DISPATCH(pGpu, pGidData, gidSize, gidFlags) +#define gpuGetChipSubRev_FNPTR(pGpu) pGpu->__gpuGetChipSubRev__ #define gpuGetChipSubRev(pGpu) gpuGetChipSubRev_DISPATCH(pGpu) #define gpuGetChipSubRev_HAL(pGpu) gpuGetChipSubRev_DISPATCH(pGpu) +#define gpuGetSkuInfo_FNPTR(pGpu) pGpu->__gpuGetSkuInfo__ #define gpuGetSkuInfo(pGpu, pParams) gpuGetSkuInfo_DISPATCH(pGpu, pParams) #define gpuGetSkuInfo_HAL(pGpu, pParams) gpuGetSkuInfo_DISPATCH(pGpu, pParams) -#define gpuGetRegBaseOffset(pGpu, arg0, arg1) gpuGetRegBaseOffset_DISPATCH(pGpu, arg0, arg1) -#define gpuGetRegBaseOffset_HAL(pGpu, arg0, arg1) gpuGetRegBaseOffset_DISPATCH(pGpu, arg0, arg1) +#define gpuGetRegBaseOffset_FNPTR(pGpu) pGpu->__gpuGetRegBaseOffset__ +#define gpuGetRegBaseOffset(pGpu, arg2, arg3) gpuGetRegBaseOffset_DISPATCH(pGpu, arg2, arg3) +#define gpuGetRegBaseOffset_HAL(pGpu, arg2, arg3) gpuGetRegBaseOffset_DISPATCH(pGpu, arg2, arg3) +#define gpuHandleSanityCheckRegReadError_FNPTR(pGpu) pGpu->__gpuHandleSanityCheckRegReadError__ #define gpuHandleSanityCheckRegReadError(pGpu, addr, value) gpuHandleSanityCheckRegReadError_DISPATCH(pGpu, addr, value) #define gpuHandleSanityCheckRegReadError_HAL(pGpu, addr, value) gpuHandleSanityCheckRegReadError_DISPATCH(pGpu, addr, value) +#define gpuHandleSecFault_FNPTR(pGpu) pGpu->__gpuHandleSecFault__ #define gpuHandleSecFault(pGpu) gpuHandleSecFault_DISPATCH(pGpu) #define gpuHandleSecFault_HAL(pGpu) gpuHandleSecFault_DISPATCH(pGpu) -#define gpuSanityCheckVirtRegAccess(pGpu, arg0) gpuSanityCheckVirtRegAccess_DISPATCH(pGpu, arg0) -#define gpuSanityCheckVirtRegAccess_HAL(pGpu, arg0) gpuSanityCheckVirtRegAccess_DISPATCH(pGpu, arg0) +#define gpuSanityCheckVirtRegAccess_FNPTR(pGpu) pGpu->__gpuSanityCheckVirtRegAccess__ +#define gpuSanityCheckVirtRegAccess(pGpu, arg2) gpuSanityCheckVirtRegAccess_DISPATCH(pGpu, arg2) +#define gpuSanityCheckVirtRegAccess_HAL(pGpu, arg2) gpuSanityCheckVirtRegAccess_DISPATCH(pGpu, arg2) +#define gpuGetChildrenPresent_FNPTR(pGpu) pGpu->__gpuGetChildrenPresent__ #define gpuGetChildrenPresent(pGpu, pNumEntries) gpuGetChildrenPresent_DISPATCH(pGpu, pNumEntries) #define gpuGetChildrenPresent_HAL(pGpu, pNumEntries) gpuGetChildrenPresent_DISPATCH(pGpu, pNumEntries) -#define gpuGetClassDescriptorList(pGpu, arg0) gpuGetClassDescriptorList_DISPATCH(pGpu, arg0) -#define gpuGetClassDescriptorList_HAL(pGpu, arg0) gpuGetClassDescriptorList_DISPATCH(pGpu, arg0) -#define gpuGetPhysAddrWidth(pGpu, arg0) gpuGetPhysAddrWidth_DISPATCH(pGpu, arg0) -#define gpuGetPhysAddrWidth_HAL(pGpu, arg0) gpuGetPhysAddrWidth_DISPATCH(pGpu, arg0) +#define gpuGetClassDescriptorList_FNPTR(pGpu) pGpu->__gpuGetClassDescriptorList__ +#define gpuGetClassDescriptorList(pGpu, arg2) gpuGetClassDescriptorList_DISPATCH(pGpu, arg2) +#define gpuGetClassDescriptorList_HAL(pGpu, arg2) gpuGetClassDescriptorList_DISPATCH(pGpu, arg2) +#define gpuGetPhysAddrWidth_FNPTR(pGpu) pGpu->__gpuGetPhysAddrWidth__ +#define gpuGetPhysAddrWidth(pGpu, arg2) gpuGetPhysAddrWidth_DISPATCH(pGpu, arg2) +#define gpuGetPhysAddrWidth_HAL(pGpu, arg2) gpuGetPhysAddrWidth_DISPATCH(pGpu, arg2) +#define gpuInitSriov_FNPTR(pGpu) pGpu->__gpuInitSriov__ #define gpuInitSriov(pGpu) gpuInitSriov_DISPATCH(pGpu) #define gpuInitSriov_HAL(pGpu) gpuInitSriov_DISPATCH(pGpu) +#define gpuDeinitSriov_FNPTR(pGpu) pGpu->__gpuDeinitSriov__ #define gpuDeinitSriov(pGpu) gpuDeinitSriov_DISPATCH(pGpu) #define gpuDeinitSriov_HAL(pGpu) gpuDeinitSriov_DISPATCH(pGpu) +#define gpuCreateDefaultClientShare_FNPTR(pGpu) pGpu->__gpuCreateDefaultClientShare__ #define gpuCreateDefaultClientShare(pGpu) gpuCreateDefaultClientShare_DISPATCH(pGpu) #define gpuCreateDefaultClientShare_HAL(pGpu) gpuCreateDefaultClientShare_DISPATCH(pGpu) +#define gpuDestroyDefaultClientShare_FNPTR(pGpu) pGpu->__gpuDestroyDefaultClientShare__ #define gpuDestroyDefaultClientShare(pGpu) gpuDestroyDefaultClientShare_DISPATCH(pGpu) #define gpuDestroyDefaultClientShare_HAL(pGpu) gpuDestroyDefaultClientShare_DISPATCH(pGpu) -#define gpuGetVmmuSegmentSize(pGpu) gpuGetVmmuSegmentSize_DISPATCH(pGpu) -#define gpuGetVmmuSegmentSize_HAL(pGpu) gpuGetVmmuSegmentSize_DISPATCH(pGpu) +#define gpuFuseSupportsDisplay_FNPTR(pGpu) pGpu->__gpuFuseSupportsDisplay__ #define gpuFuseSupportsDisplay(pGpu) gpuFuseSupportsDisplay_DISPATCH(pGpu) #define gpuFuseSupportsDisplay_HAL(pGpu) gpuFuseSupportsDisplay_DISPATCH(pGpu) +#define gpuGetActiveFBIOs_FNPTR(pGpu) pGpu->__gpuGetActiveFBIOs__ #define gpuGetActiveFBIOs(pGpu) gpuGetActiveFBIOs_DISPATCH(pGpu) #define gpuGetActiveFBIOs_HAL(pGpu) gpuGetActiveFBIOs_DISPATCH(pGpu) +#define gpuCheckPageRetirementSupport_FNPTR(pGpu) pGpu->__gpuCheckPageRetirementSupport__ #define gpuCheckPageRetirementSupport(pGpu) gpuCheckPageRetirementSupport_DISPATCH(pGpu) #define gpuCheckPageRetirementSupport_HAL(pGpu) gpuCheckPageRetirementSupport_DISPATCH(pGpu) +#define gpuIsInternalSku_FNPTR(pGpu) pGpu->__gpuIsInternalSku__ #define gpuIsInternalSku(pGpu) gpuIsInternalSku_DISPATCH(pGpu) #define gpuIsInternalSku_HAL(pGpu) gpuIsInternalSku_DISPATCH(pGpu) +#define gpuClearFbhubPoisonIntrForBug2924523_FNPTR(pGpu) pGpu->__gpuClearFbhubPoisonIntrForBug2924523__ #define gpuClearFbhubPoisonIntrForBug2924523(pGpu) gpuClearFbhubPoisonIntrForBug2924523_DISPATCH(pGpu) #define gpuClearFbhubPoisonIntrForBug2924523_HAL(pGpu) gpuClearFbhubPoisonIntrForBug2924523_DISPATCH(pGpu) +#define gpuCheckIfFbhubPoisonIntrPending_FNPTR(pGpu) pGpu->__gpuCheckIfFbhubPoisonIntrPending__ #define gpuCheckIfFbhubPoisonIntrPending(pGpu) gpuCheckIfFbhubPoisonIntrPending_DISPATCH(pGpu) #define gpuCheckIfFbhubPoisonIntrPending_HAL(pGpu) gpuCheckIfFbhubPoisonIntrPending_DISPATCH(pGpu) -#define gpuGetSriovCaps(pGpu, arg0) gpuGetSriovCaps_DISPATCH(pGpu, arg0) -#define gpuGetSriovCaps_HAL(pGpu, arg0) gpuGetSriovCaps_DISPATCH(pGpu, arg0) +#define gpuGetSriovCaps_FNPTR(pGpu) pGpu->__gpuGetSriovCaps__ +#define gpuGetSriovCaps(pGpu, arg2) gpuGetSriovCaps_DISPATCH(pGpu, arg2) +#define gpuGetSriovCaps_HAL(pGpu, arg2) gpuGetSriovCaps_DISPATCH(pGpu, arg2) +#define gpuCheckIsP2PAllocated_FNPTR(pGpu) pGpu->__gpuCheckIsP2PAllocated__ #define gpuCheckIsP2PAllocated(pGpu) gpuCheckIsP2PAllocated_DISPATCH(pGpu) #define gpuCheckIsP2PAllocated_HAL(pGpu) gpuCheckIsP2PAllocated_DISPATCH(pGpu) +#define gpuPrePowerOff_FNPTR(pGpu) pGpu->__gpuPrePowerOff__ #define gpuPrePowerOff(pGpu) gpuPrePowerOff_DISPATCH(pGpu) #define gpuPrePowerOff_HAL(pGpu) gpuPrePowerOff_DISPATCH(pGpu) +#define gpuVerifyExistence_FNPTR(pGpu) pGpu->__gpuVerifyExistence__ #define gpuVerifyExistence(pGpu) gpuVerifyExistence_DISPATCH(pGpu) #define gpuVerifyExistence_HAL(pGpu) gpuVerifyExistence_DISPATCH(pGpu) +#define gpuGetFlaVasSize_FNPTR(pGpu) pGpu->__gpuGetFlaVasSize__ #define gpuGetFlaVasSize(pGpu, bNvswitchVirtualization) gpuGetFlaVasSize_DISPATCH(pGpu, bNvswitchVirtualization) #define gpuGetFlaVasSize_HAL(pGpu, bNvswitchVirtualization) gpuGetFlaVasSize_DISPATCH(pGpu, bNvswitchVirtualization) +#define gpuIsAtsSupportedWithSmcMemPartitioning_FNPTR(pGpu) pGpu->__gpuIsAtsSupportedWithSmcMemPartitioning__ #define gpuIsAtsSupportedWithSmcMemPartitioning(pGpu) gpuIsAtsSupportedWithSmcMemPartitioning_DISPATCH(pGpu) #define gpuIsAtsSupportedWithSmcMemPartitioning_HAL(pGpu) gpuIsAtsSupportedWithSmcMemPartitioning_DISPATCH(pGpu) +#define gpuIsGlobalPoisonFuseEnabled_FNPTR(pGpu) pGpu->__gpuIsGlobalPoisonFuseEnabled__ #define gpuIsGlobalPoisonFuseEnabled(pGpu) gpuIsGlobalPoisonFuseEnabled_DISPATCH(pGpu) #define gpuIsGlobalPoisonFuseEnabled_HAL(pGpu) gpuIsGlobalPoisonFuseEnabled_DISPATCH(pGpu) +#define gpuDetermineSelfHostedMode_FNPTR(pGpu) pGpu->__gpuDetermineSelfHostedMode__ #define gpuDetermineSelfHostedMode(pGpu) gpuDetermineSelfHostedMode_DISPATCH(pGpu) #define gpuDetermineSelfHostedMode_HAL(pGpu) gpuDetermineSelfHostedMode_DISPATCH(pGpu) +#define gpuDetermineMIGSupport_FNPTR(pGpu) pGpu->__gpuDetermineMIGSupport__ #define gpuDetermineMIGSupport(pGpu) gpuDetermineMIGSupport_DISPATCH(pGpu) #define gpuDetermineMIGSupport_HAL(pGpu) gpuDetermineMIGSupport_DISPATCH(pGpu) +#define gpuInitOptimusSettings_FNPTR(pGpu) pGpu->__gpuInitOptimusSettings__ #define gpuInitOptimusSettings(pGpu) gpuInitOptimusSettings_DISPATCH(pGpu) #define gpuInitOptimusSettings_HAL(pGpu) gpuInitOptimusSettings_DISPATCH(pGpu) +#define gpuDeinitOptimusSettings_FNPTR(pGpu) pGpu->__gpuDeinitOptimusSettings__ #define gpuDeinitOptimusSettings(pGpu) gpuDeinitOptimusSettings_DISPATCH(pGpu) #define gpuDeinitOptimusSettings_HAL(pGpu) gpuDeinitOptimusSettings_DISPATCH(pGpu) +#define gpuIsSliCapableWithoutDisplay_FNPTR(pGpu) pGpu->__gpuIsSliCapableWithoutDisplay__ #define gpuIsSliCapableWithoutDisplay(pGpu) gpuIsSliCapableWithoutDisplay_DISPATCH(pGpu) #define gpuIsSliCapableWithoutDisplay_HAL(pGpu) gpuIsSliCapableWithoutDisplay_DISPATCH(pGpu) +#define gpuIsCCEnabledInHw_FNPTR(pGpu) pGpu->__gpuIsCCEnabledInHw__ #define gpuIsCCEnabledInHw(pGpu) gpuIsCCEnabledInHw_DISPATCH(pGpu) #define gpuIsCCEnabledInHw_HAL(pGpu) gpuIsCCEnabledInHw_DISPATCH(pGpu) +#define gpuIsDevModeEnabledInHw_FNPTR(pGpu) pGpu->__gpuIsDevModeEnabledInHw__ #define gpuIsDevModeEnabledInHw(pGpu) gpuIsDevModeEnabledInHw_DISPATCH(pGpu) #define gpuIsDevModeEnabledInHw_HAL(pGpu) gpuIsDevModeEnabledInHw_DISPATCH(pGpu) +#define gpuIsCtxBufAllocInPmaSupported_FNPTR(pGpu) pGpu->__gpuIsCtxBufAllocInPmaSupported__ #define gpuIsCtxBufAllocInPmaSupported(pGpu) gpuIsCtxBufAllocInPmaSupported_DISPATCH(pGpu) #define gpuIsCtxBufAllocInPmaSupported_HAL(pGpu) gpuIsCtxBufAllocInPmaSupported_DISPATCH(pGpu) -#define gpuUpdateErrorContainmentState(pGpu, arg0, arg1, arg2) gpuUpdateErrorContainmentState_DISPATCH(pGpu, arg0, arg1, arg2) -#define gpuUpdateErrorContainmentState_HAL(pGpu, arg0, arg1, arg2) gpuUpdateErrorContainmentState_DISPATCH(pGpu, arg0, arg1, arg2) +#define gpuUpdateErrorContainmentState_FNPTR(pGpu) pGpu->__gpuUpdateErrorContainmentState__ +#define gpuUpdateErrorContainmentState(pGpu, arg2, arg3, arg4) gpuUpdateErrorContainmentState_DISPATCH(pGpu, arg2, arg3, arg4) +#define gpuUpdateErrorContainmentState_HAL(pGpu, arg2, arg3, arg4) gpuUpdateErrorContainmentState_DISPATCH(pGpu, arg2, arg3, arg4) +#define gpuWaitForGfwBootComplete_FNPTR(pGpu) pGpu->__gpuWaitForGfwBootComplete__ #define gpuWaitForGfwBootComplete(pGpu) gpuWaitForGfwBootComplete_DISPATCH(pGpu) #define gpuWaitForGfwBootComplete_HAL(pGpu) gpuWaitForGfwBootComplete_DISPATCH(pGpu) +#define gpuGetIsCmpSku_FNPTR(pGpu) pGpu->__gpuGetIsCmpSku__ #define gpuGetIsCmpSku(pGpu) gpuGetIsCmpSku_DISPATCH(pGpu) #define gpuGetIsCmpSku_HAL(pGpu) gpuGetIsCmpSku_DISPATCH(pGpu) + +// Dispatch functions +static inline NV_STATUS gpuConstructDeviceInfoTable_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuConstructDeviceInfoTable__(pGpu); +} + +static inline NV_STATUS gpuGetNameString_DISPATCH(struct OBJGPU *pGpu, NvU32 arg2, void *arg3) { + return pGpu->__gpuGetNameString__(pGpu, arg2, arg3); +} + +static inline NV_STATUS gpuGetShortNameString_DISPATCH(struct OBJGPU *pGpu, NvU8 *arg2) { + return pGpu->__gpuGetShortNameString__(pGpu, arg2); +} + +static inline NV_STATUS gpuInitBranding_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuInitBranding__(pGpu); +} + +static inline void gpuInitProperties_DISPATCH(struct OBJGPU *pGpu) { + pGpu->__gpuInitProperties__(pGpu); +} + +static inline void gpuGetRtd3GC6Data_DISPATCH(struct OBJGPU *pGpu) { + pGpu->__gpuGetRtd3GC6Data__(pGpu); +} + +static inline NV_STATUS gpuPowerOff_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuPowerOff__(pGpu); +} + +static inline NV_STATUS gpuWriteBusConfigReg_DISPATCH(struct OBJGPU *pGpu, NvU32 index, NvU32 value) { + return pGpu->__gpuWriteBusConfigReg__(pGpu, index, value); +} + +static inline NV_STATUS gpuReadBusConfigReg_DISPATCH(struct OBJGPU *pGpu, NvU32 index, NvU32 *data) { + return pGpu->__gpuReadBusConfigReg__(pGpu, index, data); +} + +static inline NV_STATUS gpuReadBusConfigRegEx_DISPATCH(struct OBJGPU *pGpu, NvU32 index, NvU32 *data, THREAD_STATE_NODE *pThreadState) { + return pGpu->__gpuReadBusConfigRegEx__(pGpu, index, data, pThreadState); +} + +static inline NV_STATUS gpuReadFunctionConfigReg_DISPATCH(struct OBJGPU *pGpu, NvU32 function, NvU32 reg, NvU32 *data) { + return pGpu->__gpuReadFunctionConfigReg__(pGpu, function, reg, data); +} + +static inline NV_STATUS gpuWriteFunctionConfigReg_DISPATCH(struct OBJGPU *pGpu, NvU32 function, NvU32 reg, NvU32 data) { + return pGpu->__gpuWriteFunctionConfigReg__(pGpu, function, reg, data); +} + +static inline NV_STATUS gpuWriteFunctionConfigRegEx_DISPATCH(struct OBJGPU *pGpu, NvU32 function, NvU32 reg, NvU32 data, THREAD_STATE_NODE *pThreadState) { + return pGpu->__gpuWriteFunctionConfigRegEx__(pGpu, function, reg, data, pThreadState); +} + +static inline NV_STATUS gpuReadVgpuConfigReg_DISPATCH(struct OBJGPU *pGpu, NvU32 index, NvU32 *data) { + return pGpu->__gpuReadVgpuConfigReg__(pGpu, index, data); +} + +static inline void gpuGetIdInfo_DISPATCH(struct OBJGPU *pGpu) { + pGpu->__gpuGetIdInfo__(pGpu); +} + +static inline NV_STATUS gpuGenGidData_DISPATCH(struct OBJGPU *pGpu, NvU8 *pGidData, NvU32 gidSize, NvU32 gidFlags) { + return pGpu->__gpuGenGidData__(pGpu, pGidData, gidSize, gidFlags); +} + +static inline NvU8 gpuGetChipSubRev_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuGetChipSubRev__(pGpu); +} + +static inline NV_STATUS gpuGetSkuInfo_DISPATCH(struct OBJGPU *pGpu, NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS *pParams) { + return pGpu->__gpuGetSkuInfo__(pGpu, pParams); +} + +static inline NV_STATUS gpuGetRegBaseOffset_DISPATCH(struct OBJGPU *pGpu, NvU32 arg2, NvU32 *arg3) { + return pGpu->__gpuGetRegBaseOffset__(pGpu, arg2, arg3); +} + +static inline void gpuHandleSanityCheckRegReadError_DISPATCH(struct OBJGPU *pGpu, NvU32 addr, NvU32 value) { + pGpu->__gpuHandleSanityCheckRegReadError__(pGpu, addr, value); +} + +static inline void gpuHandleSecFault_DISPATCH(struct OBJGPU *pGpu) { + pGpu->__gpuHandleSecFault__(pGpu); +} + +static inline NV_STATUS gpuSanityCheckVirtRegAccess_DISPATCH(struct OBJGPU *pGpu, NvU32 arg2) { + return pGpu->__gpuSanityCheckVirtRegAccess__(pGpu, arg2); +} + +static inline const GPUCHILDPRESENT * gpuGetChildrenPresent_DISPATCH(struct OBJGPU *pGpu, NvU32 *pNumEntries) { + return pGpu->__gpuGetChildrenPresent__(pGpu, pNumEntries); +} + +static inline const CLASSDESCRIPTOR * gpuGetClassDescriptorList_DISPATCH(struct OBJGPU *pGpu, NvU32 *arg2) { + return pGpu->__gpuGetClassDescriptorList__(pGpu, arg2); +} + +static inline NvU32 gpuGetPhysAddrWidth_DISPATCH(struct OBJGPU *pGpu, NV_ADDRESS_SPACE arg2) { + return pGpu->__gpuGetPhysAddrWidth__(pGpu, arg2); +} + +static inline NV_STATUS gpuInitSriov_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuInitSriov__(pGpu); +} + +static inline NV_STATUS gpuDeinitSriov_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuDeinitSriov__(pGpu); +} + +static inline NV_STATUS gpuCreateDefaultClientShare_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuCreateDefaultClientShare__(pGpu); +} + +static inline void gpuDestroyDefaultClientShare_DISPATCH(struct OBJGPU *pGpu) { + pGpu->__gpuDestroyDefaultClientShare__(pGpu); +} + +static inline NvBool gpuFuseSupportsDisplay_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuFuseSupportsDisplay__(pGpu); +} + +static inline NvU64 gpuGetActiveFBIOs_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuGetActiveFBIOs__(pGpu); +} + +static inline NvBool gpuCheckPageRetirementSupport_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuCheckPageRetirementSupport__(pGpu); +} + +static inline NvBool gpuIsInternalSku_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuIsInternalSku__(pGpu); +} + +static inline NV_STATUS gpuClearFbhubPoisonIntrForBug2924523_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuClearFbhubPoisonIntrForBug2924523__(pGpu); +} + +static inline NvBool gpuCheckIfFbhubPoisonIntrPending_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuCheckIfFbhubPoisonIntrPending__(pGpu); +} + +static inline NV_STATUS gpuGetSriovCaps_DISPATCH(struct OBJGPU *pGpu, NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS *arg2) { + return pGpu->__gpuGetSriovCaps__(pGpu, arg2); +} + +static inline NvBool gpuCheckIsP2PAllocated_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuCheckIsP2PAllocated__(pGpu); +} + +static inline NV_STATUS gpuPrePowerOff_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuPrePowerOff__(pGpu); +} + +static inline NV_STATUS gpuVerifyExistence_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuVerifyExistence__(pGpu); +} + +static inline NvU64 gpuGetFlaVasSize_DISPATCH(struct OBJGPU *pGpu, NvBool bNvswitchVirtualization) { + return pGpu->__gpuGetFlaVasSize__(pGpu, bNvswitchVirtualization); +} + +static inline NvBool gpuIsAtsSupportedWithSmcMemPartitioning_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuIsAtsSupportedWithSmcMemPartitioning__(pGpu); +} + +static inline NvBool gpuIsGlobalPoisonFuseEnabled_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuIsGlobalPoisonFuseEnabled__(pGpu); +} + +static inline void gpuDetermineSelfHostedMode_DISPATCH(struct OBJGPU *pGpu) { + pGpu->__gpuDetermineSelfHostedMode__(pGpu); +} + +static inline void gpuDetermineMIGSupport_DISPATCH(struct OBJGPU *pGpu) { + pGpu->__gpuDetermineMIGSupport__(pGpu); +} + +static inline NV_STATUS gpuInitOptimusSettings_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuInitOptimusSettings__(pGpu); +} + +static inline NV_STATUS gpuDeinitOptimusSettings_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuDeinitOptimusSettings__(pGpu); +} + +static inline NvBool gpuIsSliCapableWithoutDisplay_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuIsSliCapableWithoutDisplay__(pGpu); +} + +static inline NvBool gpuIsCCEnabledInHw_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuIsCCEnabledInHw__(pGpu); +} + +static inline NvBool gpuIsDevModeEnabledInHw_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuIsDevModeEnabledInHw__(pGpu); +} + +static inline NvBool gpuIsCtxBufAllocInPmaSupported_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuIsCtxBufAllocInPmaSupported__(pGpu); +} + +static inline NV_STATUS gpuUpdateErrorContainmentState_DISPATCH(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg2, NV_ERROR_CONT_LOCATION arg3, NvU32 *arg4) { + return pGpu->__gpuUpdateErrorContainmentState__(pGpu, arg2, arg3, arg4); +} + +static inline NV_STATUS gpuWaitForGfwBootComplete_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuWaitForGfwBootComplete__(pGpu); +} + +static inline NvBool gpuGetIsCmpSku_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuGetIsCmpSku__(pGpu); +} + static inline NV_STATUS gpuConstructPhysical_56cd7a(struct OBJGPU *pGpu) { return NV_OK; } @@ -1682,19 +2003,19 @@ static inline NV_STATUS gpuStatePreInit(struct OBJGPU *pGpu) { #define gpuStatePreInit_HAL(pGpu) gpuStatePreInit(pGpu) -NV_STATUS gpuStateLoad_IMPL(struct OBJGPU *pGpu, NvU32 arg0); +NV_STATUS gpuStateLoad_IMPL(struct OBJGPU *pGpu, NvU32 arg2); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuStateLoad(struct OBJGPU *pGpu, NvU32 arg0) { +static inline NV_STATUS gpuStateLoad(struct OBJGPU *pGpu, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuStateLoad(pGpu, arg0) gpuStateLoad_IMPL(pGpu, arg0) +#define gpuStateLoad(pGpu, arg2) gpuStateLoad_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled -#define gpuStateLoad_HAL(pGpu, arg0) gpuStateLoad(pGpu, arg0) +#define gpuStateLoad_HAL(pGpu, arg2) gpuStateLoad(pGpu, arg2) NV_STATUS gpuStateDestroy_IMPL(struct OBJGPU *pGpu); @@ -1710,6 +2031,37 @@ static inline NV_STATUS gpuStateDestroy(struct OBJGPU *pGpu) { #define gpuStateDestroy_HAL(pGpu) gpuStateDestroy(pGpu) +static inline NV_STATUS gpuStateInitStartedSatisfy_56cd7a(struct OBJGPU *pGpu, struct PrereqTracker *pPrereqTracker) { + return NV_OK; +} + + +#ifdef __nvoc_gpu_h_disabled +static inline NV_STATUS gpuStateInitStartedSatisfy(struct OBJGPU *pGpu, struct PrereqTracker *pPrereqTracker) { + NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_gpu_h_disabled +#define gpuStateInitStartedSatisfy(pGpu, pPrereqTracker) gpuStateInitStartedSatisfy_56cd7a(pGpu, pPrereqTracker) +#endif //__nvoc_gpu_h_disabled + +#define gpuStateInitStartedSatisfy_HAL(pGpu, pPrereqTracker) gpuStateInitStartedSatisfy(pGpu, pPrereqTracker) + +static inline void gpuStateInitStartedRetract_b3696a(struct OBJGPU *pGpu, struct PrereqTracker *pPrereqTracker) { + return; +} + + +#ifdef __nvoc_gpu_h_disabled +static inline void gpuStateInitStartedRetract(struct OBJGPU *pGpu, struct PrereqTracker *pPrereqTracker) { + NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); +} +#else //__nvoc_gpu_h_disabled +#define gpuStateInitStartedRetract(pGpu, pPrereqTracker) gpuStateInitStartedRetract_b3696a(pGpu, pPrereqTracker) +#endif //__nvoc_gpu_h_disabled + +#define gpuStateInitStartedRetract_HAL(pGpu, pPrereqTracker) gpuStateInitStartedRetract(pGpu, pPrereqTracker) + static inline NV_STATUS gpuPowerManagementEnterPreUnloadPhysical_56cd7a(struct OBJGPU *pGpu) { return NV_OK; } @@ -1798,20 +2150,20 @@ static inline NV_STATUS gpuInitializeMemDescFromPromotedCtx(struct OBJGPU *pGpu, #define gpuInitializeMemDescFromPromotedCtx_HAL(pGpu, ppMemDesc, gpuPhysAddr, size, physAttr, bIsCallingContextVgpuPlugin) gpuInitializeMemDescFromPromotedCtx(pGpu, ppMemDesc, gpuPhysAddr, size, physAttr, bIsCallingContextVgpuPlugin) -static inline void gpuSetThreadBcState_b3696a(struct OBJGPU *pGpu, NvBool arg0) { +static inline void gpuSetThreadBcState_b3696a(struct OBJGPU *pGpu, NvBool arg2) { return; } #ifdef __nvoc_gpu_h_disabled -static inline void gpuSetThreadBcState(struct OBJGPU *pGpu, NvBool arg0) { +static inline void gpuSetThreadBcState(struct OBJGPU *pGpu, NvBool arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); } #else //__nvoc_gpu_h_disabled -#define gpuSetThreadBcState(pGpu, arg0) gpuSetThreadBcState_b3696a(pGpu, arg0) +#define gpuSetThreadBcState(pGpu, arg2) gpuSetThreadBcState_b3696a(pGpu, arg2) #endif //__nvoc_gpu_h_disabled -#define gpuSetThreadBcState_HAL(pGpu, arg0) gpuSetThreadBcState(pGpu, arg0) +#define gpuSetThreadBcState_HAL(pGpu, arg2) gpuSetThreadBcState(pGpu, arg2) static inline void gpuDeterminePersistantIllumSettings_b3696a(struct OBJGPU *pGpu) { return; @@ -1871,19 +2223,73 @@ static inline void gpuDestroyGenericKernelFalconList(struct OBJGPU *pGpu) { #define gpuDestroyGenericKernelFalconList_HAL(pGpu) gpuDestroyGenericKernelFalconList(pGpu) -struct GenericKernelFalcon *gpuGetGenericKernelFalconForEngine_IMPL(struct OBJGPU *pGpu, ENGDESCRIPTOR arg0); +NV_STATUS gpuBuildKernelVideoEngineList_IMPL(struct OBJGPU *pGpu); + + +#ifdef __nvoc_gpu_h_disabled +static inline NV_STATUS gpuBuildKernelVideoEngineList(struct OBJGPU *pGpu) { + NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_gpu_h_disabled +#define gpuBuildKernelVideoEngineList(pGpu) gpuBuildKernelVideoEngineList_IMPL(pGpu) +#endif //__nvoc_gpu_h_disabled + +#define gpuBuildKernelVideoEngineList_HAL(pGpu) gpuBuildKernelVideoEngineList(pGpu) + +NV_STATUS gpuInitVideoLogging_IMPL(struct OBJGPU *pGpu); #ifdef __nvoc_gpu_h_disabled -static inline struct GenericKernelFalcon *gpuGetGenericKernelFalconForEngine(struct OBJGPU *pGpu, ENGDESCRIPTOR arg0) { +static inline NV_STATUS gpuInitVideoLogging(struct OBJGPU *pGpu) { + NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_gpu_h_disabled +#define gpuInitVideoLogging(pGpu) gpuInitVideoLogging_IMPL(pGpu) +#endif //__nvoc_gpu_h_disabled + +#define gpuInitVideoLogging_HAL(pGpu) gpuInitVideoLogging(pGpu) + +void gpuFreeVideoLogging_IMPL(struct OBJGPU *pGpu); + + +#ifdef __nvoc_gpu_h_disabled +static inline void gpuFreeVideoLogging(struct OBJGPU *pGpu) { + NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); +} +#else //__nvoc_gpu_h_disabled +#define gpuFreeVideoLogging(pGpu) gpuFreeVideoLogging_IMPL(pGpu) +#endif //__nvoc_gpu_h_disabled + +#define gpuFreeVideoLogging_HAL(pGpu) gpuFreeVideoLogging(pGpu) + +void gpuDestroyKernelVideoEngineList_IMPL(struct OBJGPU *pGpu); + + +#ifdef __nvoc_gpu_h_disabled +static inline void gpuDestroyKernelVideoEngineList(struct OBJGPU *pGpu) { + NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); +} +#else //__nvoc_gpu_h_disabled +#define gpuDestroyKernelVideoEngineList(pGpu) gpuDestroyKernelVideoEngineList_IMPL(pGpu) +#endif //__nvoc_gpu_h_disabled + +#define gpuDestroyKernelVideoEngineList_HAL(pGpu) gpuDestroyKernelVideoEngineList(pGpu) + +struct GenericKernelFalcon *gpuGetGenericKernelFalconForEngine_IMPL(struct OBJGPU *pGpu, ENGDESCRIPTOR arg2); + + +#ifdef __nvoc_gpu_h_disabled +static inline struct GenericKernelFalcon *gpuGetGenericKernelFalconForEngine(struct OBJGPU *pGpu, ENGDESCRIPTOR arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NULL; } #else //__nvoc_gpu_h_disabled -#define gpuGetGenericKernelFalconForEngine(pGpu, arg0) gpuGetGenericKernelFalconForEngine_IMPL(pGpu, arg0) +#define gpuGetGenericKernelFalconForEngine(pGpu, arg2) gpuGetGenericKernelFalconForEngine_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled -#define gpuGetGenericKernelFalconForEngine_HAL(pGpu, arg0) gpuGetGenericKernelFalconForEngine(pGpu, arg0) +#define gpuGetGenericKernelFalconForEngine_HAL(pGpu, arg2) gpuGetGenericKernelFalconForEngine(pGpu, arg2) void gpuRegisterGenericKernelFalconIntrService_IMPL(struct OBJGPU *pGpu, void *pRecords); @@ -1977,12 +2383,8 @@ static inline NV_STATUS gpuUnmarkDeviceForReset(struct OBJGPU *pGpu) { #define gpuUnmarkDeviceForReset_HAL(pGpu) gpuUnmarkDeviceForReset(pGpu) -static inline NV_STATUS gpuIsDeviceMarkedForReset_82f166(struct OBJGPU *pGpu, NvBool *pbResetRequired) { - *pbResetRequired = ((NvBool)(0 != 0)); - { - return NV_ERR_NOT_SUPPORTED; - } - ; +static inline NV_STATUS gpuIsDeviceMarkedForReset_395e98(struct OBJGPU *pGpu, NvBool *pbResetRequired) { + return NV_ERR_NOT_SUPPORTED; } @@ -1992,7 +2394,7 @@ static inline NV_STATUS gpuIsDeviceMarkedForReset(struct OBJGPU *pGpu, NvBool *p return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuIsDeviceMarkedForReset(pGpu, pbResetRequired) gpuIsDeviceMarkedForReset_82f166(pGpu, pbResetRequired) +#define gpuIsDeviceMarkedForReset(pGpu, pbResetRequired) gpuIsDeviceMarkedForReset_395e98(pGpu, pbResetRequired) #endif //__nvoc_gpu_h_disabled #define gpuIsDeviceMarkedForReset_HAL(pGpu, pbResetRequired) gpuIsDeviceMarkedForReset(pGpu, pbResetRequired) @@ -2029,12 +2431,8 @@ static inline NV_STATUS gpuUnmarkDeviceForDrainAndReset(struct OBJGPU *pGpu) { #define gpuUnmarkDeviceForDrainAndReset_HAL(pGpu) gpuUnmarkDeviceForDrainAndReset(pGpu) -static inline NV_STATUS gpuIsDeviceMarkedForDrainAndReset_244f65(struct OBJGPU *pGpu, NvBool *pbDrainRecommended) { - *pbDrainRecommended = ((NvBool)(0 != 0)); - { - return NV_ERR_NOT_SUPPORTED; - } - ; +static inline NV_STATUS gpuIsDeviceMarkedForDrainAndReset_395e98(struct OBJGPU *pGpu, NvBool *pbDrainRecommended) { + return NV_ERR_NOT_SUPPORTED; } @@ -2044,7 +2442,7 @@ static inline NV_STATUS gpuIsDeviceMarkedForDrainAndReset(struct OBJGPU *pGpu, N return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuIsDeviceMarkedForDrainAndReset(pGpu, pbDrainRecommended) gpuIsDeviceMarkedForDrainAndReset_244f65(pGpu, pbDrainRecommended) +#define gpuIsDeviceMarkedForDrainAndReset(pGpu, pbDrainRecommended) gpuIsDeviceMarkedForDrainAndReset_395e98(pGpu, pbDrainRecommended) #endif //__nvoc_gpu_h_disabled #define gpuIsDeviceMarkedForDrainAndReset_HAL(pGpu, pbDrainRecommended) gpuIsDeviceMarkedForDrainAndReset(pGpu, pbDrainRecommended) @@ -2065,19 +2463,35 @@ static inline NV_STATUS gpuPrivSecInitRegistryOverrides(struct OBJGPU *pGpu) { #define gpuPrivSecInitRegistryOverrides_HAL(pGpu) gpuPrivSecInitRegistryOverrides(pGpu) -NV_STATUS gpuSetPower_GM107(struct OBJGPU *pGpu, NvU32 arg1, NvU32 arg2, NvU32 arg3); +NV_STATUS gpuSetPower_GM107(struct OBJGPU *pGpu, NvU32 arg1, NvU32 arg2, NvU32 arg3); + + +#ifdef __nvoc_gpu_h_disabled +static inline NV_STATUS gpuSetPower(struct OBJGPU *pGpu, NvU32 arg1, NvU32 arg2, NvU32 arg3) { + NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_gpu_h_disabled +#define gpuSetPower(pGpu, arg1, arg2, arg3) gpuSetPower_GM107(pGpu, arg1, arg2, arg3) +#endif //__nvoc_gpu_h_disabled + +#define gpuSetPower_HAL(pGpu, arg1, arg2, arg3) gpuSetPower(pGpu, arg1, arg2, arg3) + +static inline NvU32 gpuGetPlatformPowerDomain_4a4dee(struct OBJGPU *pGpu) { + return 0; +} #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuSetPower(struct OBJGPU *pGpu, NvU32 arg1, NvU32 arg2, NvU32 arg3) { +static inline NvU32 gpuGetPlatformPowerDomain(struct OBJGPU *pGpu) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); - return NV_ERR_NOT_SUPPORTED; + return 0; } #else //__nvoc_gpu_h_disabled -#define gpuSetPower(pGpu, arg1, arg2, arg3) gpuSetPower_GM107(pGpu, arg1, arg2, arg3) +#define gpuGetPlatformPowerDomain(pGpu) gpuGetPlatformPowerDomain_4a4dee(pGpu) #endif //__nvoc_gpu_h_disabled -#define gpuSetPower_HAL(pGpu, arg1, arg2, arg3) gpuSetPower(pGpu, arg1, arg2, arg3) +#define gpuGetPlatformPowerDomain_HAL(pGpu) gpuGetPlatformPowerDomain(pGpu) static inline void gpuUpdateIdInfo_b3696a(struct OBJGPU *pGpu) { return; @@ -2096,21 +2510,21 @@ static inline void gpuUpdateIdInfo(struct OBJGPU *pGpu) { #define gpuUpdateIdInfo_HAL(pGpu) gpuUpdateIdInfo(pGpu) -static inline NvU32 gpuGetDeviceIDList_4a4dee(struct OBJGPU *pGpu, DEVICE_ID_MAPPING **arg0) { +static inline NvU32 gpuGetDeviceIDList_4a4dee(struct OBJGPU *pGpu, DEVICE_ID_MAPPING **arg2) { return 0; } #ifdef __nvoc_gpu_h_disabled -static inline NvU32 gpuGetDeviceIDList(struct OBJGPU *pGpu, DEVICE_ID_MAPPING **arg0) { +static inline NvU32 gpuGetDeviceIDList(struct OBJGPU *pGpu, DEVICE_ID_MAPPING **arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return 0; } #else //__nvoc_gpu_h_disabled -#define gpuGetDeviceIDList(pGpu, arg0) gpuGetDeviceIDList_4a4dee(pGpu, arg0) +#define gpuGetDeviceIDList(pGpu, arg2) gpuGetDeviceIDList_4a4dee(pGpu, arg2) #endif //__nvoc_gpu_h_disabled -#define gpuGetDeviceIDList_HAL(pGpu, arg0) gpuGetDeviceIDList(pGpu, arg0) +#define gpuGetDeviceIDList_HAL(pGpu, arg2) gpuGetDeviceIDList(pGpu, arg2) static inline NV_STATUS gpuPerformUniversalValidation_56cd7a(struct OBJGPU *pGpu) { return NV_OK; @@ -2199,18 +2613,18 @@ static inline const GPUCHILDORDER *gpuGetChildrenOrder(struct OBJGPU *pGpu, NvU3 #define gpuGetChildrenOrder_HAL(pGpu, pNumEntries) gpuGetChildrenOrder(pGpu, pNumEntries) -void gpuGetTerminatedLinkMask_GA100(struct OBJGPU *pGpu, NvU32 arg0); +void gpuGetTerminatedLinkMask_GA100(struct OBJGPU *pGpu, NvU32 arg2); #ifdef __nvoc_gpu_h_disabled -static inline void gpuGetTerminatedLinkMask(struct OBJGPU *pGpu, NvU32 arg0) { +static inline void gpuGetTerminatedLinkMask(struct OBJGPU *pGpu, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); } #else //__nvoc_gpu_h_disabled -#define gpuGetTerminatedLinkMask(pGpu, arg0) gpuGetTerminatedLinkMask_GA100(pGpu, arg0) +#define gpuGetTerminatedLinkMask(pGpu, arg2) gpuGetTerminatedLinkMask_GA100(pGpu, arg2) #endif //__nvoc_gpu_h_disabled -#define gpuGetTerminatedLinkMask_HAL(pGpu, arg0) gpuGetTerminatedLinkMask(pGpu, arg0) +#define gpuGetTerminatedLinkMask_HAL(pGpu, arg2) gpuGetTerminatedLinkMask(pGpu, arg2) NV_STATUS gpuJtVersionSanityCheck_TU102(struct OBJGPU *pGpu); @@ -2294,19 +2708,19 @@ static inline NV_STATUS gpuGetFipsStatus(struct OBJGPU *pGpu, NvBool *bFipsEnabl #define gpuGetFipsStatus_HAL(pGpu, bFipsEnabled) gpuGetFipsStatus(pGpu, bFipsEnabled) -NV_STATUS gpuExecGrCtxRegops_GK104(struct OBJGPU *pGpu, struct Graphics *arg0, struct KernelChannel *arg1, NV2080_CTRL_GPU_REG_OP *pRegOps, NvU32 regOpCount, RMTIMEOUT *pTimeout, NvBool bStopCtxsw); +NV_STATUS gpuExecGrCtxRegops_GK104(struct OBJGPU *pGpu, struct Graphics *arg2, struct KernelChannel *arg3, NV2080_CTRL_GPU_REG_OP *pRegOps, NvU32 regOpCount, RMTIMEOUT *pTimeout, NvBool bStopCtxsw); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuExecGrCtxRegops(struct OBJGPU *pGpu, struct Graphics *arg0, struct KernelChannel *arg1, NV2080_CTRL_GPU_REG_OP *pRegOps, NvU32 regOpCount, RMTIMEOUT *pTimeout, NvBool bStopCtxsw) { +static inline NV_STATUS gpuExecGrCtxRegops(struct OBJGPU *pGpu, struct Graphics *arg2, struct KernelChannel *arg3, NV2080_CTRL_GPU_REG_OP *pRegOps, NvU32 regOpCount, RMTIMEOUT *pTimeout, NvBool bStopCtxsw) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuExecGrCtxRegops(pGpu, arg0, arg1, pRegOps, regOpCount, pTimeout, bStopCtxsw) gpuExecGrCtxRegops_GK104(pGpu, arg0, arg1, pRegOps, regOpCount, pTimeout, bStopCtxsw) +#define gpuExecGrCtxRegops(pGpu, arg2, arg3, pRegOps, regOpCount, pTimeout, bStopCtxsw) gpuExecGrCtxRegops_GK104(pGpu, arg2, arg3, pRegOps, regOpCount, pTimeout, bStopCtxsw) #endif //__nvoc_gpu_h_disabled -#define gpuExecGrCtxRegops_HAL(pGpu, arg0, arg1, pRegOps, regOpCount, pTimeout, bStopCtxsw) gpuExecGrCtxRegops(pGpu, arg0, arg1, pRegOps, regOpCount, pTimeout, bStopCtxsw) +#define gpuExecGrCtxRegops_HAL(pGpu, arg2, arg3, pRegOps, regOpCount, pTimeout, bStopCtxsw) gpuExecGrCtxRegops(pGpu, arg2, arg3, pRegOps, regOpCount, pTimeout, bStopCtxsw) NV_STATUS gpuExtdevConstruct_GK104(struct OBJGPU *pGpu); @@ -2471,37 +2885,37 @@ static inline NV_STATUS gpuSetCacheOnlyModeOverrides(struct OBJGPU *pGpu) { #define gpuSetCacheOnlyModeOverrides_HAL(pGpu) gpuSetCacheOnlyModeOverrides(pGpu) -NV_STATUS gpuGetCeFaultMethodBufferSize_KERNEL(struct OBJGPU *arg0, NvU32 *arg1); +NV_STATUS gpuGetCeFaultMethodBufferSize_KERNEL(struct OBJGPU *arg1, NvU32 *arg2); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuGetCeFaultMethodBufferSize(struct OBJGPU *arg0, NvU32 *arg1) { +static inline NV_STATUS gpuGetCeFaultMethodBufferSize(struct OBJGPU *arg1, NvU32 *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuGetCeFaultMethodBufferSize(arg0, arg1) gpuGetCeFaultMethodBufferSize_KERNEL(arg0, arg1) +#define gpuGetCeFaultMethodBufferSize(arg1, arg2) gpuGetCeFaultMethodBufferSize_KERNEL(arg1, arg2) #endif //__nvoc_gpu_h_disabled -#define gpuGetCeFaultMethodBufferSize_HAL(arg0, arg1) gpuGetCeFaultMethodBufferSize(arg0, arg1) +#define gpuGetCeFaultMethodBufferSize_HAL(arg1, arg2) gpuGetCeFaultMethodBufferSize(arg1, arg2) -static inline NV_STATUS gpuSetVFBarSizes_46f6a7(struct OBJGPU *pGpu, NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS *arg0) { +static inline NV_STATUS gpuSetVFBarSizes_46f6a7(struct OBJGPU *pGpu, NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS *arg2) { return NV_ERR_NOT_SUPPORTED; } -NV_STATUS gpuSetVFBarSizes_GA102(struct OBJGPU *pGpu, NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS *arg0); +NV_STATUS gpuSetVFBarSizes_GA102(struct OBJGPU *pGpu, NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS *arg2); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuSetVFBarSizes(struct OBJGPU *pGpu, NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS *arg0) { +static inline NV_STATUS gpuSetVFBarSizes(struct OBJGPU *pGpu, NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuSetVFBarSizes(pGpu, arg0) gpuSetVFBarSizes_46f6a7(pGpu, arg0) +#define gpuSetVFBarSizes(pGpu, arg2) gpuSetVFBarSizes_46f6a7(pGpu, arg2) #endif //__nvoc_gpu_h_disabled -#define gpuSetVFBarSizes_HAL(pGpu, arg0) gpuSetVFBarSizes(pGpu, arg0) +#define gpuSetVFBarSizes_HAL(pGpu, arg2) gpuSetVFBarSizes(pGpu, arg2) static inline GPU_P2P_PEER_GPU_CAPS *gpuFindP2PPeerGpuCapsByGpuId_80f438(struct OBJGPU *pGpu, NvU32 peerGpuId) { NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); @@ -2535,23 +2949,23 @@ static inline NV_STATUS gpuLoadFailurePathTest(struct OBJGPU *pGpu, NvU32 engSta #define gpuLoadFailurePathTest_HAL(pGpu, engStage, engDescIdx, bStopTest) gpuLoadFailurePathTest(pGpu, engStage, engDescIdx, bStopTest) -static inline NV_STATUS gpuSetPartitionErrorAttribution_c04480(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg0, NV_ERROR_CONT_LOCATION arg1, NvU32 arg2) { +static inline NV_STATUS gpuSetPartitionErrorAttribution_c04480(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg2, NV_ERROR_CONT_LOCATION arg3, NvU32 arg4) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -NV_STATUS gpuSetPartitionErrorAttribution_GA100(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg0, NV_ERROR_CONT_LOCATION arg1, NvU32 arg2); +NV_STATUS gpuSetPartitionErrorAttribution_GA100(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg2, NV_ERROR_CONT_LOCATION arg3, NvU32 arg4); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuSetPartitionErrorAttribution(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg0, NV_ERROR_CONT_LOCATION arg1, NvU32 arg2) { +static inline NV_STATUS gpuSetPartitionErrorAttribution(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg2, NV_ERROR_CONT_LOCATION arg3, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuSetPartitionErrorAttribution(pGpu, arg0, arg1, arg2) gpuSetPartitionErrorAttribution_c04480(pGpu, arg0, arg1, arg2) +#define gpuSetPartitionErrorAttribution(pGpu, arg2, arg3, arg4) gpuSetPartitionErrorAttribution_c04480(pGpu, arg2, arg3, arg4) #endif //__nvoc_gpu_h_disabled -#define gpuSetPartitionErrorAttribution_HAL(pGpu, arg0, arg1, arg2) gpuSetPartitionErrorAttribution(pGpu, arg0, arg1, arg2) +#define gpuSetPartitionErrorAttribution_HAL(pGpu, arg2, arg3, arg4) gpuSetPartitionErrorAttribution(pGpu, arg2, arg3, arg4) NV_STATUS gpuCreateRusdMemory_IMPL(struct OBJGPU *pGpu); @@ -2583,190 +2997,96 @@ static inline NvBool gpuCheckEccCounts(struct OBJGPU *pGpu) { NV_STATUS gpuConstructDeviceInfoTable_FWCLIENT(struct OBJGPU *pGpu); -NV_STATUS gpuConstructDeviceInfoTable_VGPUSTUB(struct OBJGPU *pGpu); +NV_STATUS gpuConstructDeviceInfoTable_VF(struct OBJGPU *pGpu); static inline NV_STATUS gpuConstructDeviceInfoTable_56cd7a(struct OBJGPU *pGpu) { return NV_OK; } -static inline NV_STATUS gpuConstructDeviceInfoTable_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuConstructDeviceInfoTable__(pGpu); -} - -NV_STATUS gpuGetNameString_VGPUSTUB(struct OBJGPU *pGpu, NvU32 arg0, void *arg1); +NV_STATUS gpuGetNameString_VF(struct OBJGPU *pGpu, NvU32 arg2, void *arg3); -NV_STATUS gpuGetNameString_KERNEL(struct OBJGPU *pGpu, NvU32 arg0, void *arg1); +NV_STATUS gpuGetNameString_FWCLIENT(struct OBJGPU *pGpu, NvU32 arg2, void *arg3); -NV_STATUS gpuGetNameString_IMPL(struct OBJGPU *pGpu, NvU32 arg0, void *arg1); +NV_STATUS gpuGetNameString_IMPL(struct OBJGPU *pGpu, NvU32 arg2, void *arg3); -static inline NV_STATUS gpuGetNameString_DISPATCH(struct OBJGPU *pGpu, NvU32 arg0, void *arg1) { - return pGpu->__gpuGetNameString__(pGpu, arg0, arg1); -} - -NV_STATUS gpuGetShortNameString_VGPUSTUB(struct OBJGPU *pGpu, NvU8 *arg0); +NV_STATUS gpuGetShortNameString_VF(struct OBJGPU *pGpu, NvU8 *arg2); -NV_STATUS gpuGetShortNameString_KERNEL(struct OBJGPU *pGpu, NvU8 *arg0); +NV_STATUS gpuGetShortNameString_FWCLIENT(struct OBJGPU *pGpu, NvU8 *arg2); -NV_STATUS gpuGetShortNameString_IMPL(struct OBJGPU *pGpu, NvU8 *arg0); - -static inline NV_STATUS gpuGetShortNameString_DISPATCH(struct OBJGPU *pGpu, NvU8 *arg0) { - return pGpu->__gpuGetShortNameString__(pGpu, arg0); -} +NV_STATUS gpuGetShortNameString_IMPL(struct OBJGPU *pGpu, NvU8 *arg2); NV_STATUS gpuInitBranding_FWCLIENT(struct OBJGPU *pGpu); -NV_STATUS gpuInitBranding_VGPUSTUB(struct OBJGPU *pGpu); +NV_STATUS gpuInitBranding_VF(struct OBJGPU *pGpu); NV_STATUS gpuInitBranding_IMPL(struct OBJGPU *pGpu); -static inline NV_STATUS gpuInitBranding_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuInitBranding__(pGpu); -} - void gpuInitProperties_FWCLIENT(struct OBJGPU *pGpu); static inline void gpuInitProperties_b3696a(struct OBJGPU *pGpu) { return; } -static inline void gpuInitProperties_DISPATCH(struct OBJGPU *pGpu) { - pGpu->__gpuInitProperties__(pGpu); -} - -NV_STATUS gpuBuildKernelVideoEngineList_IMPL(struct OBJGPU *pGpu); - -static inline NV_STATUS gpuBuildKernelVideoEngineList_56cd7a(struct OBJGPU *pGpu) { - return NV_OK; -} - -static inline NV_STATUS gpuBuildKernelVideoEngineList_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuBuildKernelVideoEngineList__(pGpu); -} - -NV_STATUS gpuInitVideoLogging_IMPL(struct OBJGPU *pGpu); - -static inline NV_STATUS gpuInitVideoLogging_56cd7a(struct OBJGPU *pGpu) { - return NV_OK; -} - -static inline NV_STATUS gpuInitVideoLogging_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuInitVideoLogging__(pGpu); -} - -void gpuFreeVideoLogging_IMPL(struct OBJGPU *pGpu); - -static inline void gpuFreeVideoLogging_b3696a(struct OBJGPU *pGpu) { - return; -} - -static inline void gpuFreeVideoLogging_DISPATCH(struct OBJGPU *pGpu) { - pGpu->__gpuFreeVideoLogging__(pGpu); -} - -void gpuDestroyKernelVideoEngineList_IMPL(struct OBJGPU *pGpu); +void gpuGetRtd3GC6Data_FWCLIENT(struct OBJGPU *pGpu); -static inline void gpuDestroyKernelVideoEngineList_b3696a(struct OBJGPU *pGpu) { +static inline void gpuGetRtd3GC6Data_b3696a(struct OBJGPU *pGpu) { return; } -static inline void gpuDestroyKernelVideoEngineList_DISPATCH(struct OBJGPU *pGpu) { - pGpu->__gpuDestroyKernelVideoEngineList__(pGpu); -} - NV_STATUS gpuPowerOff_KERNEL(struct OBJGPU *pGpu); static inline NV_STATUS gpuPowerOff_46f6a7(struct OBJGPU *pGpu) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS gpuPowerOff_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuPowerOff__(pGpu); -} - NV_STATUS gpuWriteBusConfigReg_GM107(struct OBJGPU *pGpu, NvU32 index, NvU32 value); NV_STATUS gpuWriteBusConfigReg_GH100(struct OBJGPU *pGpu, NvU32 index, NvU32 value); -static inline NV_STATUS gpuWriteBusConfigReg_DISPATCH(struct OBJGPU *pGpu, NvU32 index, NvU32 value) { - return pGpu->__gpuWriteBusConfigReg__(pGpu, index, value); -} - NV_STATUS gpuReadBusConfigReg_GM107(struct OBJGPU *pGpu, NvU32 index, NvU32 *data); NV_STATUS gpuReadBusConfigReg_GH100(struct OBJGPU *pGpu, NvU32 index, NvU32 *data); -static inline NV_STATUS gpuReadBusConfigReg_DISPATCH(struct OBJGPU *pGpu, NvU32 index, NvU32 *data) { - return pGpu->__gpuReadBusConfigReg__(pGpu, index, data); -} - NV_STATUS gpuReadBusConfigRegEx_GM107(struct OBJGPU *pGpu, NvU32 index, NvU32 *data, THREAD_STATE_NODE *pThreadState); static inline NV_STATUS gpuReadBusConfigRegEx_5baef9(struct OBJGPU *pGpu, NvU32 index, NvU32 *data, THREAD_STATE_NODE *pThreadState) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NV_STATUS gpuReadBusConfigRegEx_DISPATCH(struct OBJGPU *pGpu, NvU32 index, NvU32 *data, THREAD_STATE_NODE *pThreadState) { - return pGpu->__gpuReadBusConfigRegEx__(pGpu, index, data, pThreadState); -} - NV_STATUS gpuReadFunctionConfigReg_GM107(struct OBJGPU *pGpu, NvU32 function, NvU32 reg, NvU32 *data); static inline NV_STATUS gpuReadFunctionConfigReg_5baef9(struct OBJGPU *pGpu, NvU32 function, NvU32 reg, NvU32 *data) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NV_STATUS gpuReadFunctionConfigReg_DISPATCH(struct OBJGPU *pGpu, NvU32 function, NvU32 reg, NvU32 *data) { - return pGpu->__gpuReadFunctionConfigReg__(pGpu, function, reg, data); -} - NV_STATUS gpuWriteFunctionConfigReg_GM107(struct OBJGPU *pGpu, NvU32 function, NvU32 reg, NvU32 data); static inline NV_STATUS gpuWriteFunctionConfigReg_5baef9(struct OBJGPU *pGpu, NvU32 function, NvU32 reg, NvU32 data) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NV_STATUS gpuWriteFunctionConfigReg_DISPATCH(struct OBJGPU *pGpu, NvU32 function, NvU32 reg, NvU32 data) { - return pGpu->__gpuWriteFunctionConfigReg__(pGpu, function, reg, data); -} - NV_STATUS gpuWriteFunctionConfigRegEx_GM107(struct OBJGPU *pGpu, NvU32 function, NvU32 reg, NvU32 data, THREAD_STATE_NODE *pThreadState); static inline NV_STATUS gpuWriteFunctionConfigRegEx_5baef9(struct OBJGPU *pGpu, NvU32 function, NvU32 reg, NvU32 data, THREAD_STATE_NODE *pThreadState) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NV_STATUS gpuWriteFunctionConfigRegEx_DISPATCH(struct OBJGPU *pGpu, NvU32 function, NvU32 reg, NvU32 data, THREAD_STATE_NODE *pThreadState) { - return pGpu->__gpuWriteFunctionConfigRegEx__(pGpu, function, reg, data, pThreadState); -} - NV_STATUS gpuReadVgpuConfigReg_GH100(struct OBJGPU *pGpu, NvU32 index, NvU32 *data); static inline NV_STATUS gpuReadVgpuConfigReg_46f6a7(struct OBJGPU *pGpu, NvU32 index, NvU32 *data) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS gpuReadVgpuConfigReg_DISPATCH(struct OBJGPU *pGpu, NvU32 index, NvU32 *data) { - return pGpu->__gpuReadVgpuConfigReg__(pGpu, index, data); -} - void gpuGetIdInfo_GM107(struct OBJGPU *pGpu); void gpuGetIdInfo_GH100(struct OBJGPU *pGpu); -static inline void gpuGetIdInfo_DISPATCH(struct OBJGPU *pGpu) { - pGpu->__gpuGetIdInfo__(pGpu); -} - -NV_STATUS gpuGenGidData_VGPUSTUB(struct OBJGPU *pGpu, NvU8 *pGidData, NvU32 gidSize, NvU32 gidFlags); +NV_STATUS gpuGenGidData_VF(struct OBJGPU *pGpu, NvU8 *pGidData, NvU32 gidSize, NvU32 gidFlags); NV_STATUS gpuGenGidData_FWCLIENT(struct OBJGPU *pGpu, NvU8 *pGidData, NvU32 gidSize, NvU32 gidFlags); NV_STATUS gpuGenGidData_GK104(struct OBJGPU *pGpu, NvU8 *pGidData, NvU32 gidSize, NvU32 gidFlags); -static inline NV_STATUS gpuGenGidData_DISPATCH(struct OBJGPU *pGpu, NvU8 *pGidData, NvU32 gidSize, NvU32 gidFlags) { - return pGpu->__gpuGenGidData__(pGpu, pGidData, gidSize, gidFlags); -} - NvU8 gpuGetChipSubRev_FWCLIENT(struct OBJGPU *pGpu); static inline NvU8 gpuGetChipSubRev_4a4dee(struct OBJGPU *pGpu) { @@ -2777,58 +3097,34 @@ NvU8 gpuGetChipSubRev_GK104(struct OBJGPU *pGpu); NvU8 gpuGetChipSubRev_GA100(struct OBJGPU *pGpu); -static inline NvU8 gpuGetChipSubRev_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuGetChipSubRev__(pGpu); -} - static inline NV_STATUS gpuGetSkuInfo_92bfc3(struct OBJGPU *pGpu, NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS *pParams) { NV_ASSERT_PRECOMP(0); return NV_ERR_NOT_SUPPORTED; } -NV_STATUS gpuGetSkuInfo_VGPUSTUB(struct OBJGPU *pGpu, NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS *pParams); - -static inline NV_STATUS gpuGetSkuInfo_DISPATCH(struct OBJGPU *pGpu, NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS *pParams) { - return pGpu->__gpuGetSkuInfo__(pGpu, pParams); -} - -NV_STATUS gpuGetRegBaseOffset_FWCLIENT(struct OBJGPU *pGpu, NvU32 arg0, NvU32 *arg1); +NV_STATUS gpuGetSkuInfo_VF(struct OBJGPU *pGpu, NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS *pParams); -NV_STATUS gpuGetRegBaseOffset_TU102(struct OBJGPU *pGpu, NvU32 arg0, NvU32 *arg1); +NV_STATUS gpuGetRegBaseOffset_FWCLIENT(struct OBJGPU *pGpu, NvU32 arg2, NvU32 *arg3); -static inline NV_STATUS gpuGetRegBaseOffset_DISPATCH(struct OBJGPU *pGpu, NvU32 arg0, NvU32 *arg1) { - return pGpu->__gpuGetRegBaseOffset__(pGpu, arg0, arg1); -} +NV_STATUS gpuGetRegBaseOffset_TU102(struct OBJGPU *pGpu, NvU32 arg2, NvU32 *arg3); void gpuHandleSanityCheckRegReadError_GM107(struct OBJGPU *pGpu, NvU32 addr, NvU32 value); void gpuHandleSanityCheckRegReadError_GH100(struct OBJGPU *pGpu, NvU32 addr, NvU32 value); -static inline void gpuHandleSanityCheckRegReadError_DISPATCH(struct OBJGPU *pGpu, NvU32 addr, NvU32 value) { - pGpu->__gpuHandleSanityCheckRegReadError__(pGpu, addr, value); -} - void gpuHandleSecFault_GH100(struct OBJGPU *pGpu); static inline void gpuHandleSecFault_b3696a(struct OBJGPU *pGpu) { return; } -static inline void gpuHandleSecFault_DISPATCH(struct OBJGPU *pGpu) { - pGpu->__gpuHandleSecFault__(pGpu); -} - -static inline NV_STATUS gpuSanityCheckVirtRegAccess_56cd7a(struct OBJGPU *pGpu, NvU32 arg0) { +static inline NV_STATUS gpuSanityCheckVirtRegAccess_56cd7a(struct OBJGPU *pGpu, NvU32 arg2) { return NV_OK; } -NV_STATUS gpuSanityCheckVirtRegAccess_TU102(struct OBJGPU *pGpu, NvU32 arg0); +NV_STATUS gpuSanityCheckVirtRegAccess_TU102(struct OBJGPU *pGpu, NvU32 arg2); -NV_STATUS gpuSanityCheckVirtRegAccess_GH100(struct OBJGPU *pGpu, NvU32 arg0); - -static inline NV_STATUS gpuSanityCheckVirtRegAccess_DISPATCH(struct OBJGPU *pGpu, NvU32 arg0) { - return pGpu->__gpuSanityCheckVirtRegAccess__(pGpu, arg0); -} +NV_STATUS gpuSanityCheckVirtRegAccess_GH100(struct OBJGPU *pGpu, NvU32 arg2); const GPUCHILDPRESENT *gpuGetChildrenPresent_TU102(struct OBJGPU *pGpu, NvU32 *pNumEntries); @@ -2844,48 +3140,32 @@ const GPUCHILDPRESENT *gpuGetChildrenPresent_AD102(struct OBJGPU *pGpu, NvU32 *p const GPUCHILDPRESENT *gpuGetChildrenPresent_GH100(struct OBJGPU *pGpu, NvU32 *pNumEntries); -static inline const GPUCHILDPRESENT *gpuGetChildrenPresent_DISPATCH(struct OBJGPU *pGpu, NvU32 *pNumEntries) { - return pGpu->__gpuGetChildrenPresent__(pGpu, pNumEntries); -} - -const CLASSDESCRIPTOR *gpuGetClassDescriptorList_TU102(struct OBJGPU *pGpu, NvU32 *arg0); - -const CLASSDESCRIPTOR *gpuGetClassDescriptorList_TU104(struct OBJGPU *pGpu, NvU32 *arg0); +const CLASSDESCRIPTOR *gpuGetClassDescriptorList_TU102(struct OBJGPU *pGpu, NvU32 *arg2); -const CLASSDESCRIPTOR *gpuGetClassDescriptorList_TU106(struct OBJGPU *pGpu, NvU32 *arg0); +const CLASSDESCRIPTOR *gpuGetClassDescriptorList_TU104(struct OBJGPU *pGpu, NvU32 *arg2); -const CLASSDESCRIPTOR *gpuGetClassDescriptorList_TU117(struct OBJGPU *pGpu, NvU32 *arg0); +const CLASSDESCRIPTOR *gpuGetClassDescriptorList_TU106(struct OBJGPU *pGpu, NvU32 *arg2); -const CLASSDESCRIPTOR *gpuGetClassDescriptorList_GA100(struct OBJGPU *pGpu, NvU32 *arg0); +const CLASSDESCRIPTOR *gpuGetClassDescriptorList_TU117(struct OBJGPU *pGpu, NvU32 *arg2); -const CLASSDESCRIPTOR *gpuGetClassDescriptorList_GA102(struct OBJGPU *pGpu, NvU32 *arg0); +const CLASSDESCRIPTOR *gpuGetClassDescriptorList_GA100(struct OBJGPU *pGpu, NvU32 *arg2); -const CLASSDESCRIPTOR *gpuGetClassDescriptorList_AD102(struct OBJGPU *pGpu, NvU32 *arg0); +const CLASSDESCRIPTOR *gpuGetClassDescriptorList_GA102(struct OBJGPU *pGpu, NvU32 *arg2); -const CLASSDESCRIPTOR *gpuGetClassDescriptorList_GH100(struct OBJGPU *pGpu, NvU32 *arg0); +const CLASSDESCRIPTOR *gpuGetClassDescriptorList_AD102(struct OBJGPU *pGpu, NvU32 *arg2); -static inline const CLASSDESCRIPTOR *gpuGetClassDescriptorList_DISPATCH(struct OBJGPU *pGpu, NvU32 *arg0) { - return pGpu->__gpuGetClassDescriptorList__(pGpu, arg0); -} - -NvU32 gpuGetPhysAddrWidth_TU102(struct OBJGPU *pGpu, NV_ADDRESS_SPACE arg0); +const CLASSDESCRIPTOR *gpuGetClassDescriptorList_GH100(struct OBJGPU *pGpu, NvU32 *arg2); -NvU32 gpuGetPhysAddrWidth_GH100(struct OBJGPU *pGpu, NV_ADDRESS_SPACE arg0); +NvU32 gpuGetPhysAddrWidth_TU102(struct OBJGPU *pGpu, NV_ADDRESS_SPACE arg2); -static inline NvU32 gpuGetPhysAddrWidth_DISPATCH(struct OBJGPU *pGpu, NV_ADDRESS_SPACE arg0) { - return pGpu->__gpuGetPhysAddrWidth__(pGpu, arg0); -} +NvU32 gpuGetPhysAddrWidth_GH100(struct OBJGPU *pGpu, NV_ADDRESS_SPACE arg2); -NV_STATUS gpuInitSriov_VGPUSTUB(struct OBJGPU *pGpu); +NV_STATUS gpuInitSriov_VF(struct OBJGPU *pGpu); NV_STATUS gpuInitSriov_FWCLIENT(struct OBJGPU *pGpu); NV_STATUS gpuInitSriov_TU102(struct OBJGPU *pGpu); -static inline NV_STATUS gpuInitSriov_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuInitSriov__(pGpu); -} - static inline NV_STATUS gpuDeinitSriov_56cd7a(struct OBJGPU *pGpu) { return NV_OK; } @@ -2894,43 +3174,18 @@ NV_STATUS gpuDeinitSriov_FWCLIENT(struct OBJGPU *pGpu); NV_STATUS gpuDeinitSriov_TU102(struct OBJGPU *pGpu); -static inline NV_STATUS gpuDeinitSriov_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuDeinitSriov__(pGpu); -} - -NV_STATUS gpuCreateDefaultClientShare_VGPUSTUB(struct OBJGPU *pGpu); +NV_STATUS gpuCreateDefaultClientShare_VF(struct OBJGPU *pGpu); static inline NV_STATUS gpuCreateDefaultClientShare_56cd7a(struct OBJGPU *pGpu) { return NV_OK; } -static inline NV_STATUS gpuCreateDefaultClientShare_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuCreateDefaultClientShare__(pGpu); -} - -void gpuDestroyDefaultClientShare_VGPUSTUB(struct OBJGPU *pGpu); +void gpuDestroyDefaultClientShare_VF(struct OBJGPU *pGpu); static inline void gpuDestroyDefaultClientShare_b3696a(struct OBJGPU *pGpu) { return; } -static inline void gpuDestroyDefaultClientShare_DISPATCH(struct OBJGPU *pGpu) { - pGpu->__gpuDestroyDefaultClientShare__(pGpu); -} - -static inline NvU64 gpuGetVmmuSegmentSize_13cd8d(struct OBJGPU *pGpu) { - NV_ASSERT_PRECOMP(0); - return 0; -} - -static inline NvU64 gpuGetVmmuSegmentSize_72c522(struct OBJGPU *pGpu) { - return pGpu->vmmuSegmentSize; -} - -static inline NvU64 gpuGetVmmuSegmentSize_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuGetVmmuSegmentSize__(pGpu); -} - NvBool gpuFuseSupportsDisplay_GM107(struct OBJGPU *pGpu); NvBool gpuFuseSupportsDisplay_GA100(struct OBJGPU *pGpu); @@ -2939,30 +3194,18 @@ static inline NvBool gpuFuseSupportsDisplay_491d52(struct OBJGPU *pGpu) { return ((NvBool)(0 != 0)); } -static inline NvBool gpuFuseSupportsDisplay_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuFuseSupportsDisplay__(pGpu); -} - -NvU32 gpuGetActiveFBIOs_VGPUSTUB(struct OBJGPU *pGpu); +NvU64 gpuGetActiveFBIOs_VF(struct OBJGPU *pGpu); -NvU32 gpuGetActiveFBIOs_FWCLIENT(struct OBJGPU *pGpu); +NvU64 gpuGetActiveFBIOs_FWCLIENT(struct OBJGPU *pGpu); -NvU32 gpuGetActiveFBIOs_GM107(struct OBJGPU *pGpu); +NvU64 gpuGetActiveFBIOs_GM107(struct OBJGPU *pGpu); -static inline NvU32 gpuGetActiveFBIOs_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuGetActiveFBIOs__(pGpu); -} - -NvBool gpuCheckPageRetirementSupport_VGPUSTUB(struct OBJGPU *pGpu); +NvBool gpuCheckPageRetirementSupport_VF(struct OBJGPU *pGpu); NvBool gpuCheckPageRetirementSupport_GSPCLIENT(struct OBJGPU *pGpu); NvBool gpuCheckPageRetirementSupport_GV100(struct OBJGPU *pGpu); -static inline NvBool gpuCheckPageRetirementSupport_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuCheckPageRetirementSupport__(pGpu); -} - static inline NvBool gpuIsInternalSku_491d52(struct OBJGPU *pGpu) { return ((NvBool)(0 != 0)); } @@ -2971,39 +3214,23 @@ NvBool gpuIsInternalSku_FWCLIENT(struct OBJGPU *pGpu); NvBool gpuIsInternalSku_GP100(struct OBJGPU *pGpu); -static inline NvBool gpuIsInternalSku_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuIsInternalSku__(pGpu); -} - NV_STATUS gpuClearFbhubPoisonIntrForBug2924523_GA100(struct OBJGPU *pGpu); static inline NV_STATUS gpuClearFbhubPoisonIntrForBug2924523_56cd7a(struct OBJGPU *pGpu) { return NV_OK; } -static inline NV_STATUS gpuClearFbhubPoisonIntrForBug2924523_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuClearFbhubPoisonIntrForBug2924523__(pGpu); -} - NvBool gpuCheckIfFbhubPoisonIntrPending_GA100(struct OBJGPU *pGpu); static inline NvBool gpuCheckIfFbhubPoisonIntrPending_491d52(struct OBJGPU *pGpu) { return ((NvBool)(0 != 0)); } -static inline NvBool gpuCheckIfFbhubPoisonIntrPending_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuCheckIfFbhubPoisonIntrPending__(pGpu); -} - -static inline NV_STATUS gpuGetSriovCaps_46f6a7(struct OBJGPU *pGpu, NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS *arg0) { +static inline NV_STATUS gpuGetSriovCaps_46f6a7(struct OBJGPU *pGpu, NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS *arg2) { return NV_ERR_NOT_SUPPORTED; } -NV_STATUS gpuGetSriovCaps_TU102(struct OBJGPU *pGpu, NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS *arg0); - -static inline NV_STATUS gpuGetSriovCaps_DISPATCH(struct OBJGPU *pGpu, NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS *arg0) { - return pGpu->__gpuGetSriovCaps__(pGpu, arg0); -} +NV_STATUS gpuGetSriovCaps_TU102(struct OBJGPU *pGpu, NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS *arg2); static inline NvBool gpuCheckIsP2PAllocated_491d52(struct OBJGPU *pGpu) { return ((NvBool)(0 != 0)); @@ -3015,10 +3242,6 @@ static inline NvBool gpuCheckIsP2PAllocated_108313(struct OBJGPU *pGpu) { NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); } -static inline NvBool gpuCheckIsP2PAllocated_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuCheckIsP2PAllocated__(pGpu); -} - static inline NV_STATUS gpuPrePowerOff_56cd7a(struct OBJGPU *pGpu) { return NV_OK; } @@ -3029,20 +3252,12 @@ static inline NV_STATUS gpuPrePowerOff_46f6a7(struct OBJGPU *pGpu) { NV_STATUS gpuPrePowerOff_GM107(struct OBJGPU *pGpu); -static inline NV_STATUS gpuPrePowerOff_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuPrePowerOff__(pGpu); -} - static inline NV_STATUS gpuVerifyExistence_56cd7a(struct OBJGPU *pGpu) { return NV_OK; } NV_STATUS gpuVerifyExistence_IMPL(struct OBJGPU *pGpu); -static inline NV_STATUS gpuVerifyExistence_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuVerifyExistence__(pGpu); -} - NvU64 gpuGetFlaVasSize_GA100(struct OBJGPU *pGpu, NvBool bNvswitchVirtualization); NvU64 gpuGetFlaVasSize_GH100(struct OBJGPU *pGpu, NvBool bNvswitchVirtualization); @@ -3051,28 +3266,16 @@ static inline NvU64 gpuGetFlaVasSize_474d46(struct OBJGPU *pGpu, NvBool bNvswitc NV_ASSERT_OR_RETURN_PRECOMP(0, 0); } -static inline NvU64 gpuGetFlaVasSize_DISPATCH(struct OBJGPU *pGpu, NvBool bNvswitchVirtualization) { - return pGpu->__gpuGetFlaVasSize__(pGpu, bNvswitchVirtualization); -} - NvBool gpuIsAtsSupportedWithSmcMemPartitioning_GH100(struct OBJGPU *pGpu); static inline NvBool gpuIsAtsSupportedWithSmcMemPartitioning_491d52(struct OBJGPU *pGpu) { return ((NvBool)(0 != 0)); } -static inline NvBool gpuIsAtsSupportedWithSmcMemPartitioning_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuIsAtsSupportedWithSmcMemPartitioning__(pGpu); -} - -NvBool gpuIsGlobalPoisonFuseEnabled_VGPUSTUB(struct OBJGPU *pGpu); +NvBool gpuIsGlobalPoisonFuseEnabled_VF(struct OBJGPU *pGpu); NvBool gpuIsGlobalPoisonFuseEnabled_FWCLIENT(struct OBJGPU *pGpu); -static inline NvBool gpuIsGlobalPoisonFuseEnabled_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuIsGlobalPoisonFuseEnabled__(pGpu); -} - void gpuDetermineSelfHostedMode_PHYSICAL_GH100(struct OBJGPU *pGpu); static inline void gpuDetermineSelfHostedMode_b3696a(struct OBJGPU *pGpu) { @@ -3081,40 +3284,24 @@ static inline void gpuDetermineSelfHostedMode_b3696a(struct OBJGPU *pGpu) { void gpuDetermineSelfHostedMode_KERNEL_GH100(struct OBJGPU *pGpu); -static inline void gpuDetermineSelfHostedMode_DISPATCH(struct OBJGPU *pGpu) { - pGpu->__gpuDetermineSelfHostedMode__(pGpu); -} - void gpuDetermineMIGSupport_GH100(struct OBJGPU *pGpu); static inline void gpuDetermineMIGSupport_b3696a(struct OBJGPU *pGpu) { return; } -static inline void gpuDetermineMIGSupport_DISPATCH(struct OBJGPU *pGpu) { - pGpu->__gpuDetermineMIGSupport__(pGpu); -} - static inline NV_STATUS gpuInitOptimusSettings_56cd7a(struct OBJGPU *pGpu) { return NV_OK; } NV_STATUS gpuInitOptimusSettings_IMPL(struct OBJGPU *pGpu); -static inline NV_STATUS gpuInitOptimusSettings_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuInitOptimusSettings__(pGpu); -} - static inline NV_STATUS gpuDeinitOptimusSettings_56cd7a(struct OBJGPU *pGpu) { return NV_OK; } NV_STATUS gpuDeinitOptimusSettings_IMPL(struct OBJGPU *pGpu); -static inline NV_STATUS gpuDeinitOptimusSettings_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuDeinitOptimusSettings__(pGpu); -} - static inline NvBool gpuIsSliCapableWithoutDisplay_cbe027(struct OBJGPU *pGpu) { return ((NvBool)(0 == 0)); } @@ -3123,64 +3310,40 @@ static inline NvBool gpuIsSliCapableWithoutDisplay_491d52(struct OBJGPU *pGpu) { return ((NvBool)(0 != 0)); } -static inline NvBool gpuIsSliCapableWithoutDisplay_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuIsSliCapableWithoutDisplay__(pGpu); -} - static inline NvBool gpuIsCCEnabledInHw_491d52(struct OBJGPU *pGpu) { return ((NvBool)(0 != 0)); } NvBool gpuIsCCEnabledInHw_GH100(struct OBJGPU *pGpu); -static inline NvBool gpuIsCCEnabledInHw_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuIsCCEnabledInHw__(pGpu); -} - NvBool gpuIsDevModeEnabledInHw_GH100(struct OBJGPU *pGpu); static inline NvBool gpuIsDevModeEnabledInHw_491d52(struct OBJGPU *pGpu) { return ((NvBool)(0 != 0)); } -static inline NvBool gpuIsDevModeEnabledInHw_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuIsDevModeEnabledInHw__(pGpu); -} - NvBool gpuIsCtxBufAllocInPmaSupported_GA100(struct OBJGPU *pGpu); static inline NvBool gpuIsCtxBufAllocInPmaSupported_491d52(struct OBJGPU *pGpu) { return ((NvBool)(0 != 0)); } -static inline NvBool gpuIsCtxBufAllocInPmaSupported_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuIsCtxBufAllocInPmaSupported__(pGpu); -} - -static inline NV_STATUS gpuUpdateErrorContainmentState_c04480(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg0, NV_ERROR_CONT_LOCATION arg1, NvU32 *arg2) { +static inline NV_STATUS gpuUpdateErrorContainmentState_c04480(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg2, NV_ERROR_CONT_LOCATION arg3, NvU32 *arg4) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -NV_STATUS gpuUpdateErrorContainmentState_GA100(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg0, NV_ERROR_CONT_LOCATION arg1, NvU32 *arg2); +NV_STATUS gpuUpdateErrorContainmentState_GA100(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg2, NV_ERROR_CONT_LOCATION arg3, NvU32 *arg4); -static inline NV_STATUS gpuUpdateErrorContainmentState_f91eed(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg0, NV_ERROR_CONT_LOCATION arg1, NvU32 *arg2) { +static inline NV_STATUS gpuUpdateErrorContainmentState_f91eed(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg2, NV_ERROR_CONT_LOCATION arg3, NvU32 *arg4) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_OK); } -static inline NV_STATUS gpuUpdateErrorContainmentState_DISPATCH(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg0, NV_ERROR_CONT_LOCATION arg1, NvU32 *arg2) { - return pGpu->__gpuUpdateErrorContainmentState__(pGpu, arg0, arg1, arg2); -} - NV_STATUS gpuWaitForGfwBootComplete_TU102(struct OBJGPU *pGpu); static inline NV_STATUS gpuWaitForGfwBootComplete_5baef9(struct OBJGPU *pGpu) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NV_STATUS gpuWaitForGfwBootComplete_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuWaitForGfwBootComplete__(pGpu); -} - static inline NvBool gpuGetIsCmpSku_ceaee8(struct OBJGPU *pGpu) { NV_ASSERT_PRECOMP(0); return ((NvBool)(0 != 0)); @@ -3192,10 +3355,6 @@ static inline NvBool gpuGetIsCmpSku_491d52(struct OBJGPU *pGpu) { NvBool gpuGetIsCmpSku_GV100(struct OBJGPU *pGpu); -static inline NvBool gpuGetIsCmpSku_DISPATCH(struct OBJGPU *pGpu) { - return pGpu->__gpuGetIsCmpSku__(pGpu); -} - static inline PENGDESCRIPTOR gpuGetInitEngineDescriptors(struct OBJGPU *pGpu) { return pGpu->engineOrder.pEngineInitDescriptors; } @@ -3244,11 +3403,6 @@ static inline struct OBJFIFO *gpuGetFifoShared(struct OBJGPU *pGpu) { return ((void *)0); } -static inline ENGSTATE_ITER gpuGetEngstateIter(struct OBJGPU *pGpu) { - GPU_CHILD_ITER it = { 0 }; - return it; -} - static inline RmPhysAddr gpuGetDmaStartAddress(struct OBJGPU *pGpu) { return pGpu->dmaStartAddress; } @@ -3277,10 +3431,22 @@ static inline NvU32 gpuGetChipMinExtRev(struct OBJGPU *pGpu) { return pGpu->chipInfo.pmcBoot42.minorExtRev; } +static inline NvU64 gpuGetVmmuSegmentSize(struct OBJGPU *pGpu) { + return pGpu->vmmuSegmentSize; +} + static inline NvBool gpuIsVideoLinkDisabled(struct OBJGPU *pGpu) { return pGpu->bVideoLinkDisabled; } +static inline NvU32 gpuGetNumChildren(struct OBJGPU *pGpu) { + return ((sizeof (pGpu->children.pChild) / sizeof ((pGpu->children.pChild)[0]))); +} + +static inline Dynamic *gpuGetChild(struct OBJGPU *pGpu, NvU32 idx) { + return pGpu->children.pChild[idx]; +} + static inline const NV2080_CTRL_INTERNAL_GPU_GET_CHIP_INFO_PARAMS *gpuGetChipInfo(struct OBJGPU *pGpu) { return pGpu->pChipInfo; } @@ -3437,6 +3603,10 @@ static inline NvBool gpuIsAmpereErrorContainmentXidEnabled(struct OBJGPU *pGpu) return pGpu->bAmpereErrorContainmentXidEnabled; } +static inline NvBool gpuIsUsePmcDeviceEnableForHostEngineEnabled(struct OBJGPU *pGpu) { + return pGpu->bUsePmcDeviceEnableForHostEngine; +} + static inline NvBool gpuIsSelfHosted(struct OBJGPU *pGpu) { return pGpu->bIsSelfHosted; } @@ -3459,26 +3629,15 @@ static inline NV_STATUS gpuBindHalLegacy(struct OBJGPU *pGpu, NvU32 chipId0, NvU #define gpuBindHalLegacy(pGpu, chipId0, chipId1, socChipId0) gpuBindHalLegacy_IMPL(pGpu, chipId0, chipId1, socChipId0) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuPostConstruct_IMPL(struct OBJGPU *pGpu, GPUATTACHARG *arg0); - -#ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuPostConstruct(struct OBJGPU *pGpu, GPUATTACHARG *arg0) { - NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_gpu_h_disabled -#define gpuPostConstruct(pGpu, arg0) gpuPostConstruct_IMPL(pGpu, arg0) -#endif //__nvoc_gpu_h_disabled - -NV_STATUS gpuCreateObject_IMPL(struct OBJGPU *pGpu, NVOC_CLASS_ID arg0, NvU32 arg1); +NV_STATUS gpuPostConstruct_IMPL(struct OBJGPU *pGpu, GPUATTACHARG *arg2); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuCreateObject(struct OBJGPU *pGpu, NVOC_CLASS_ID arg0, NvU32 arg1) { +static inline NV_STATUS gpuPostConstruct(struct OBJGPU *pGpu, GPUATTACHARG *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuCreateObject(pGpu, arg0, arg1) gpuCreateObject_IMPL(pGpu, arg0, arg1) +#define gpuPostConstruct(pGpu, arg2) gpuPostConstruct_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled void gpuDestruct_IMPL(struct OBJGPU *pGpu); @@ -3495,15 +3654,15 @@ static inline NV_STATUS gpuStateInit(struct OBJGPU *pGpu) { #define gpuStateInit(pGpu) gpuStateInit_IMPL(pGpu) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuStateUnload_IMPL(struct OBJGPU *pGpu, NvU32 arg0); +NV_STATUS gpuStateUnload_IMPL(struct OBJGPU *pGpu, NvU32 arg2); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuStateUnload(struct OBJGPU *pGpu, NvU32 arg0) { +static inline NV_STATUS gpuStateUnload(struct OBJGPU *pGpu, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuStateUnload(pGpu, arg0) gpuStateUnload_IMPL(pGpu, arg0) +#define gpuStateUnload(pGpu, arg2) gpuStateUnload_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled NV_STATUS gpuInitDispIpHal_IMPL(struct OBJGPU *pGpu, NvU32 ipver); @@ -3527,26 +3686,26 @@ static inline void gpuServiceInterruptsAllGpus(struct OBJGPU *pGpu) { #define gpuServiceInterruptsAllGpus(pGpu) gpuServiceInterruptsAllGpus_IMPL(pGpu) #endif //__nvoc_gpu_h_disabled -NvBool gpuIsImplementation_IMPL(struct OBJGPU *pGpu, HAL_IMPLEMENTATION arg0, NvU32 arg1, NvU32 arg2); +NvBool gpuIsImplementation_IMPL(struct OBJGPU *pGpu, HAL_IMPLEMENTATION arg2, NvU32 arg3, NvU32 arg4); #ifdef __nvoc_gpu_h_disabled -static inline NvBool gpuIsImplementation(struct OBJGPU *pGpu, HAL_IMPLEMENTATION arg0, NvU32 arg1, NvU32 arg2) { +static inline NvBool gpuIsImplementation(struct OBJGPU *pGpu, HAL_IMPLEMENTATION arg2, NvU32 arg3, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_FALSE; } #else //__nvoc_gpu_h_disabled -#define gpuIsImplementation(pGpu, arg0, arg1, arg2) gpuIsImplementation_IMPL(pGpu, arg0, arg1, arg2) +#define gpuIsImplementation(pGpu, arg2, arg3, arg4) gpuIsImplementation_IMPL(pGpu, arg2, arg3, arg4) #endif //__nvoc_gpu_h_disabled -NvBool gpuIsImplementationOrBetter_IMPL(struct OBJGPU *pGpu, HAL_IMPLEMENTATION arg0, NvU32 arg1, NvU32 arg2); +NvBool gpuIsImplementationOrBetter_IMPL(struct OBJGPU *pGpu, HAL_IMPLEMENTATION arg2, NvU32 arg3, NvU32 arg4); #ifdef __nvoc_gpu_h_disabled -static inline NvBool gpuIsImplementationOrBetter(struct OBJGPU *pGpu, HAL_IMPLEMENTATION arg0, NvU32 arg1, NvU32 arg2) { +static inline NvBool gpuIsImplementationOrBetter(struct OBJGPU *pGpu, HAL_IMPLEMENTATION arg2, NvU32 arg3, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_FALSE; } #else //__nvoc_gpu_h_disabled -#define gpuIsImplementationOrBetter(pGpu, arg0, arg1, arg2) gpuIsImplementationOrBetter_IMPL(pGpu, arg0, arg1, arg2) +#define gpuIsImplementationOrBetter(pGpu, arg2, arg3, arg4) gpuIsImplementationOrBetter_IMPL(pGpu, arg2, arg3, arg4) #endif //__nvoc_gpu_h_disabled NvBool gpuIsGpuFullPower_IMPL(struct OBJGPU *pGpu); @@ -3604,136 +3763,136 @@ static inline NV_STATUS gpuDestroyClassDB(struct OBJGPU *pGpu) { #define gpuDestroyClassDB(pGpu) gpuDestroyClassDB_IMPL(pGpu) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuDeleteEngineFromClassDB_IMPL(struct OBJGPU *pGpu, NvU32 arg0); +NV_STATUS gpuDeleteEngineFromClassDB_IMPL(struct OBJGPU *pGpu, NvU32 arg2); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuDeleteEngineFromClassDB(struct OBJGPU *pGpu, NvU32 arg0) { +static inline NV_STATUS gpuDeleteEngineFromClassDB(struct OBJGPU *pGpu, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuDeleteEngineFromClassDB(pGpu, arg0) gpuDeleteEngineFromClassDB_IMPL(pGpu, arg0) +#define gpuDeleteEngineFromClassDB(pGpu, arg2) gpuDeleteEngineFromClassDB_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuDeleteEngineOnPreInit_IMPL(struct OBJGPU *pGpu, NvU32 arg0); +NV_STATUS gpuDeleteEngineOnPreInit_IMPL(struct OBJGPU *pGpu, NvU32 arg2); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuDeleteEngineOnPreInit(struct OBJGPU *pGpu, NvU32 arg0) { +static inline NV_STATUS gpuDeleteEngineOnPreInit(struct OBJGPU *pGpu, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuDeleteEngineOnPreInit(pGpu, arg0) gpuDeleteEngineOnPreInit_IMPL(pGpu, arg0) +#define gpuDeleteEngineOnPreInit(pGpu, arg2) gpuDeleteEngineOnPreInit_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuAddClassToClassDBByEngTag_IMPL(struct OBJGPU *pGpu, NvU32 arg0); +NV_STATUS gpuAddClassToClassDBByEngTag_IMPL(struct OBJGPU *pGpu, NvU32 arg2); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuAddClassToClassDBByEngTag(struct OBJGPU *pGpu, NvU32 arg0) { +static inline NV_STATUS gpuAddClassToClassDBByEngTag(struct OBJGPU *pGpu, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuAddClassToClassDBByEngTag(pGpu, arg0) gpuAddClassToClassDBByEngTag_IMPL(pGpu, arg0) +#define gpuAddClassToClassDBByEngTag(pGpu, arg2) gpuAddClassToClassDBByEngTag_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuAddClassToClassDBByClassId_IMPL(struct OBJGPU *pGpu, NvU32 arg0); +NV_STATUS gpuAddClassToClassDBByClassId_IMPL(struct OBJGPU *pGpu, NvU32 arg2); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuAddClassToClassDBByClassId(struct OBJGPU *pGpu, NvU32 arg0) { +static inline NV_STATUS gpuAddClassToClassDBByClassId(struct OBJGPU *pGpu, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuAddClassToClassDBByClassId(pGpu, arg0) gpuAddClassToClassDBByClassId_IMPL(pGpu, arg0) +#define gpuAddClassToClassDBByClassId(pGpu, arg2) gpuAddClassToClassDBByClassId_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuAddClassToClassDBByEngTagClassId_IMPL(struct OBJGPU *pGpu, NvU32 arg0, NvU32 arg1); +NV_STATUS gpuAddClassToClassDBByEngTagClassId_IMPL(struct OBJGPU *pGpu, NvU32 arg2, NvU32 arg3); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuAddClassToClassDBByEngTagClassId(struct OBJGPU *pGpu, NvU32 arg0, NvU32 arg1) { +static inline NV_STATUS gpuAddClassToClassDBByEngTagClassId(struct OBJGPU *pGpu, NvU32 arg2, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuAddClassToClassDBByEngTagClassId(pGpu, arg0, arg1) gpuAddClassToClassDBByEngTagClassId_IMPL(pGpu, arg0, arg1) +#define gpuAddClassToClassDBByEngTagClassId(pGpu, arg2, arg3) gpuAddClassToClassDBByEngTagClassId_IMPL(pGpu, arg2, arg3) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuDeleteClassFromClassDBByClassId_IMPL(struct OBJGPU *pGpu, NvU32 arg0); +NV_STATUS gpuDeleteClassFromClassDBByClassId_IMPL(struct OBJGPU *pGpu, NvU32 arg2); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuDeleteClassFromClassDBByClassId(struct OBJGPU *pGpu, NvU32 arg0) { +static inline NV_STATUS gpuDeleteClassFromClassDBByClassId(struct OBJGPU *pGpu, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuDeleteClassFromClassDBByClassId(pGpu, arg0) gpuDeleteClassFromClassDBByClassId_IMPL(pGpu, arg0) +#define gpuDeleteClassFromClassDBByClassId(pGpu, arg2) gpuDeleteClassFromClassDBByClassId_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuDeleteClassFromClassDBByEngTag_IMPL(struct OBJGPU *pGpu, NvU32 arg0); +NV_STATUS gpuDeleteClassFromClassDBByEngTag_IMPL(struct OBJGPU *pGpu, NvU32 arg2); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuDeleteClassFromClassDBByEngTag(struct OBJGPU *pGpu, NvU32 arg0) { +static inline NV_STATUS gpuDeleteClassFromClassDBByEngTag(struct OBJGPU *pGpu, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuDeleteClassFromClassDBByEngTag(pGpu, arg0) gpuDeleteClassFromClassDBByEngTag_IMPL(pGpu, arg0) +#define gpuDeleteClassFromClassDBByEngTag(pGpu, arg2) gpuDeleteClassFromClassDBByEngTag_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuDeleteClassFromClassDBByEngTagClassId_IMPL(struct OBJGPU *pGpu, NvU32 arg0, NvU32 arg1); +NV_STATUS gpuDeleteClassFromClassDBByEngTagClassId_IMPL(struct OBJGPU *pGpu, NvU32 arg2, NvU32 arg3); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuDeleteClassFromClassDBByEngTagClassId(struct OBJGPU *pGpu, NvU32 arg0, NvU32 arg1) { +static inline NV_STATUS gpuDeleteClassFromClassDBByEngTagClassId(struct OBJGPU *pGpu, NvU32 arg2, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuDeleteClassFromClassDBByEngTagClassId(pGpu, arg0, arg1) gpuDeleteClassFromClassDBByEngTagClassId_IMPL(pGpu, arg0, arg1) +#define gpuDeleteClassFromClassDBByEngTagClassId(pGpu, arg2, arg3) gpuDeleteClassFromClassDBByEngTagClassId_IMPL(pGpu, arg2, arg3) #endif //__nvoc_gpu_h_disabled -NvBool gpuIsClassSupported_IMPL(struct OBJGPU *pGpu, NvU32 arg0); +NvBool gpuIsClassSupported_IMPL(struct OBJGPU *pGpu, NvU32 arg2); #ifdef __nvoc_gpu_h_disabled -static inline NvBool gpuIsClassSupported(struct OBJGPU *pGpu, NvU32 arg0) { +static inline NvBool gpuIsClassSupported(struct OBJGPU *pGpu, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_FALSE; } #else //__nvoc_gpu_h_disabled -#define gpuIsClassSupported(pGpu, arg0) gpuIsClassSupported_IMPL(pGpu, arg0) +#define gpuIsClassSupported(pGpu, arg2) gpuIsClassSupported_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuGetClassByClassId_IMPL(struct OBJGPU *pGpu, NvU32 arg0, PCLASSDESCRIPTOR *arg1); +NV_STATUS gpuGetClassByClassId_IMPL(struct OBJGPU *pGpu, NvU32 arg2, PCLASSDESCRIPTOR *arg3); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuGetClassByClassId(struct OBJGPU *pGpu, NvU32 arg0, PCLASSDESCRIPTOR *arg1) { +static inline NV_STATUS gpuGetClassByClassId(struct OBJGPU *pGpu, NvU32 arg2, PCLASSDESCRIPTOR *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuGetClassByClassId(pGpu, arg0, arg1) gpuGetClassByClassId_IMPL(pGpu, arg0, arg1) +#define gpuGetClassByClassId(pGpu, arg2, arg3) gpuGetClassByClassId_IMPL(pGpu, arg2, arg3) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuGetClassByEngineAndClassId_IMPL(struct OBJGPU *pGpu, NvU32 arg0, NvU32 arg1, PCLASSDESCRIPTOR *arg2); +NV_STATUS gpuGetClassByEngineAndClassId_IMPL(struct OBJGPU *pGpu, NvU32 arg2, NvU32 arg3, PCLASSDESCRIPTOR *arg4); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuGetClassByEngineAndClassId(struct OBJGPU *pGpu, NvU32 arg0, NvU32 arg1, PCLASSDESCRIPTOR *arg2) { +static inline NV_STATUS gpuGetClassByEngineAndClassId(struct OBJGPU *pGpu, NvU32 arg2, NvU32 arg3, PCLASSDESCRIPTOR *arg4) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuGetClassByEngineAndClassId(pGpu, arg0, arg1, arg2) gpuGetClassByEngineAndClassId_IMPL(pGpu, arg0, arg1, arg2) +#define gpuGetClassByEngineAndClassId(pGpu, arg2, arg3, arg4) gpuGetClassByEngineAndClassId_IMPL(pGpu, arg2, arg3, arg4) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuGetClassList_IMPL(struct OBJGPU *pGpu, NvU32 *arg0, NvU32 *arg1, NvU32 arg2); +NV_STATUS gpuGetClassList_IMPL(struct OBJGPU *pGpu, NvU32 *arg2, NvU32 *arg3, NvU32 arg4); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuGetClassList(struct OBJGPU *pGpu, NvU32 *arg0, NvU32 *arg1, NvU32 arg2) { +static inline NV_STATUS gpuGetClassList(struct OBJGPU *pGpu, NvU32 *arg2, NvU32 *arg3, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuGetClassList(pGpu, arg0, arg1, arg2) gpuGetClassList_IMPL(pGpu, arg0, arg1, arg2) +#define gpuGetClassList(pGpu, arg2, arg3, arg4) gpuGetClassList_IMPL(pGpu, arg2, arg3, arg4) #endif //__nvoc_gpu_h_disabled NV_STATUS gpuConstructEngineTable_IMPL(struct OBJGPU *pGpu); @@ -3768,59 +3927,59 @@ static inline NV_STATUS gpuUpdateEngineTable(struct OBJGPU *pGpu) { #define gpuUpdateEngineTable(pGpu) gpuUpdateEngineTable_IMPL(pGpu) #endif //__nvoc_gpu_h_disabled -NvBool gpuCheckEngineTable_IMPL(struct OBJGPU *pGpu, RM_ENGINE_TYPE arg0); +NvBool gpuCheckEngineTable_IMPL(struct OBJGPU *pGpu, RM_ENGINE_TYPE arg2); #ifdef __nvoc_gpu_h_disabled -static inline NvBool gpuCheckEngineTable(struct OBJGPU *pGpu, RM_ENGINE_TYPE arg0) { +static inline NvBool gpuCheckEngineTable(struct OBJGPU *pGpu, RM_ENGINE_TYPE arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_FALSE; } #else //__nvoc_gpu_h_disabled -#define gpuCheckEngineTable(pGpu, arg0) gpuCheckEngineTable_IMPL(pGpu, arg0) +#define gpuCheckEngineTable(pGpu, arg2) gpuCheckEngineTable_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuXlateEngDescToClientEngineId_IMPL(struct OBJGPU *pGpu, ENGDESCRIPTOR arg0, RM_ENGINE_TYPE *arg1); +NV_STATUS gpuXlateEngDescToClientEngineId_IMPL(struct OBJGPU *pGpu, ENGDESCRIPTOR arg2, RM_ENGINE_TYPE *arg3); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuXlateEngDescToClientEngineId(struct OBJGPU *pGpu, ENGDESCRIPTOR arg0, RM_ENGINE_TYPE *arg1) { +static inline NV_STATUS gpuXlateEngDescToClientEngineId(struct OBJGPU *pGpu, ENGDESCRIPTOR arg2, RM_ENGINE_TYPE *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuXlateEngDescToClientEngineId(pGpu, arg0, arg1) gpuXlateEngDescToClientEngineId_IMPL(pGpu, arg0, arg1) +#define gpuXlateEngDescToClientEngineId(pGpu, arg2, arg3) gpuXlateEngDescToClientEngineId_IMPL(pGpu, arg2, arg3) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuXlateClientEngineIdToEngDesc_IMPL(struct OBJGPU *pGpu, RM_ENGINE_TYPE arg0, ENGDESCRIPTOR *arg1); +NV_STATUS gpuXlateClientEngineIdToEngDesc_IMPL(struct OBJGPU *pGpu, RM_ENGINE_TYPE arg2, ENGDESCRIPTOR *arg3); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuXlateClientEngineIdToEngDesc(struct OBJGPU *pGpu, RM_ENGINE_TYPE arg0, ENGDESCRIPTOR *arg1) { +static inline NV_STATUS gpuXlateClientEngineIdToEngDesc(struct OBJGPU *pGpu, RM_ENGINE_TYPE arg2, ENGDESCRIPTOR *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuXlateClientEngineIdToEngDesc(pGpu, arg0, arg1) gpuXlateClientEngineIdToEngDesc_IMPL(pGpu, arg0, arg1) +#define gpuXlateClientEngineIdToEngDesc(pGpu, arg2, arg3) gpuXlateClientEngineIdToEngDesc_IMPL(pGpu, arg2, arg3) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuGetFlcnFromClientEngineId_IMPL(struct OBJGPU *pGpu, RM_ENGINE_TYPE arg0, struct Falcon **arg1); +NV_STATUS gpuGetFlcnFromClientEngineId_IMPL(struct OBJGPU *pGpu, RM_ENGINE_TYPE arg2, struct Falcon **arg3); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuGetFlcnFromClientEngineId(struct OBJGPU *pGpu, RM_ENGINE_TYPE arg0, struct Falcon **arg1) { +static inline NV_STATUS gpuGetFlcnFromClientEngineId(struct OBJGPU *pGpu, RM_ENGINE_TYPE arg2, struct Falcon **arg3) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuGetFlcnFromClientEngineId(pGpu, arg0, arg1) gpuGetFlcnFromClientEngineId_IMPL(pGpu, arg0, arg1) +#define gpuGetFlcnFromClientEngineId(pGpu, arg2, arg3) gpuGetFlcnFromClientEngineId_IMPL(pGpu, arg2, arg3) #endif //__nvoc_gpu_h_disabled -NvBool gpuIsEngDescSupported_IMPL(struct OBJGPU *pGpu, NvU32 arg0); +NvBool gpuIsEngDescSupported_IMPL(struct OBJGPU *pGpu, NvU32 arg2); #ifdef __nvoc_gpu_h_disabled -static inline NvBool gpuIsEngDescSupported(struct OBJGPU *pGpu, NvU32 arg0) { +static inline NvBool gpuIsEngDescSupported(struct OBJGPU *pGpu, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_FALSE; } #else //__nvoc_gpu_h_disabled -#define gpuIsEngDescSupported(pGpu, arg0) gpuIsEngDescSupported_IMPL(pGpu, arg0) +#define gpuIsEngDescSupported(pGpu, arg2) gpuIsEngDescSupported_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled NV_STATUS gpuReadBusConfigCycle_IMPL(struct OBJGPU *pGpu, NvU32 index, NvU32 *pData); @@ -3910,14 +4069,14 @@ static inline NvU32 gpuGetGpuMask(struct OBJGPU *pGpu) { #define gpuGetGpuMask(pGpu) gpuGetGpuMask_IMPL(pGpu) #endif //__nvoc_gpu_h_disabled -void gpuChangeComputeModeRefCount_IMPL(struct OBJGPU *pGpu, NvU32 arg0); +void gpuChangeComputeModeRefCount_IMPL(struct OBJGPU *pGpu, NvU32 arg2); #ifdef __nvoc_gpu_h_disabled -static inline void gpuChangeComputeModeRefCount(struct OBJGPU *pGpu, NvU32 arg0) { +static inline void gpuChangeComputeModeRefCount(struct OBJGPU *pGpu, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); } #else //__nvoc_gpu_h_disabled -#define gpuChangeComputeModeRefCount(pGpu, arg0) gpuChangeComputeModeRefCount_IMPL(pGpu, arg0) +#define gpuChangeComputeModeRefCount(pGpu, arg2) gpuChangeComputeModeRefCount_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled NV_STATUS gpuEnterShutdown_IMPL(struct OBJGPU *pGpu); @@ -3931,37 +4090,37 @@ static inline NV_STATUS gpuEnterShutdown(struct OBJGPU *pGpu) { #define gpuEnterShutdown(pGpu) gpuEnterShutdown_IMPL(pGpu) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuSanityCheck_IMPL(struct OBJGPU *pGpu, NvU32 arg0, NvU32 *arg1); +NV_STATUS gpuSanityCheck_IMPL(struct OBJGPU *pGpu, NvU32 arg2, NvU32 *arg3); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuSanityCheck(struct OBJGPU *pGpu, NvU32 arg0, NvU32 *arg1) { +static inline NV_STATUS gpuSanityCheck(struct OBJGPU *pGpu, NvU32 arg2, NvU32 *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuSanityCheck(pGpu, arg0, arg1) gpuSanityCheck_IMPL(pGpu, arg0, arg1) +#define gpuSanityCheck(pGpu, arg2, arg3) gpuSanityCheck_IMPL(pGpu, arg2, arg3) #endif //__nvoc_gpu_h_disabled -DEVICE_MAPPING *gpuGetDeviceMapping_IMPL(struct OBJGPU *pGpu, DEVICE_INDEX arg0, NvU32 arg1); +DEVICE_MAPPING *gpuGetDeviceMapping_IMPL(struct OBJGPU *pGpu, DEVICE_INDEX arg2, NvU32 arg3); #ifdef __nvoc_gpu_h_disabled -static inline DEVICE_MAPPING *gpuGetDeviceMapping(struct OBJGPU *pGpu, DEVICE_INDEX arg0, NvU32 arg1) { +static inline DEVICE_MAPPING *gpuGetDeviceMapping(struct OBJGPU *pGpu, DEVICE_INDEX arg2, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NULL; } #else //__nvoc_gpu_h_disabled -#define gpuGetDeviceMapping(pGpu, arg0, arg1) gpuGetDeviceMapping_IMPL(pGpu, arg0, arg1) +#define gpuGetDeviceMapping(pGpu, arg2, arg3) gpuGetDeviceMapping_IMPL(pGpu, arg2, arg3) #endif //__nvoc_gpu_h_disabled -DEVICE_MAPPING *gpuGetDeviceMappingFromDeviceID_IMPL(struct OBJGPU *pGpu, NvU32 arg0, NvU32 arg1); +DEVICE_MAPPING *gpuGetDeviceMappingFromDeviceID_IMPL(struct OBJGPU *pGpu, NvU32 arg2, NvU32 arg3); #ifdef __nvoc_gpu_h_disabled -static inline DEVICE_MAPPING *gpuGetDeviceMappingFromDeviceID(struct OBJGPU *pGpu, NvU32 arg0, NvU32 arg1) { +static inline DEVICE_MAPPING *gpuGetDeviceMappingFromDeviceID(struct OBJGPU *pGpu, NvU32 arg2, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NULL; } #else //__nvoc_gpu_h_disabled -#define gpuGetDeviceMappingFromDeviceID(pGpu, arg0, arg1) gpuGetDeviceMappingFromDeviceID_IMPL(pGpu, arg0, arg1) +#define gpuGetDeviceMappingFromDeviceID(pGpu, arg2, arg3) gpuGetDeviceMappingFromDeviceID_IMPL(pGpu, arg2, arg3) #endif //__nvoc_gpu_h_disabled NV_STATUS gpuGetGidInfo_IMPL(struct OBJGPU *pGpu, NvU8 **ppGidString, NvU32 *pGidStrlen, NvU32 gidFlags); @@ -3985,81 +4144,81 @@ static inline void gpuSetDisconnectedProperties(struct OBJGPU *pGpu) { #define gpuSetDisconnectedProperties(pGpu) gpuSetDisconnectedProperties_IMPL(pGpu) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuAddConstructedFalcon_IMPL(struct OBJGPU *pGpu, struct Falcon *arg0); +NV_STATUS gpuAddConstructedFalcon_IMPL(struct OBJGPU *pGpu, struct Falcon *arg2); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuAddConstructedFalcon(struct OBJGPU *pGpu, struct Falcon *arg0) { +static inline NV_STATUS gpuAddConstructedFalcon(struct OBJGPU *pGpu, struct Falcon *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuAddConstructedFalcon(pGpu, arg0) gpuAddConstructedFalcon_IMPL(pGpu, arg0) +#define gpuAddConstructedFalcon(pGpu, arg2) gpuAddConstructedFalcon_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuRemoveConstructedFalcon_IMPL(struct OBJGPU *pGpu, struct Falcon *arg0); +NV_STATUS gpuRemoveConstructedFalcon_IMPL(struct OBJGPU *pGpu, struct Falcon *arg2); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuRemoveConstructedFalcon(struct OBJGPU *pGpu, struct Falcon *arg0) { +static inline NV_STATUS gpuRemoveConstructedFalcon(struct OBJGPU *pGpu, struct Falcon *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuRemoveConstructedFalcon(pGpu, arg0) gpuRemoveConstructedFalcon_IMPL(pGpu, arg0) +#define gpuRemoveConstructedFalcon(pGpu, arg2) gpuRemoveConstructedFalcon_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuGetConstructedFalcon_IMPL(struct OBJGPU *pGpu, NvU32 arg0, struct Falcon **arg1); +NV_STATUS gpuGetConstructedFalcon_IMPL(struct OBJGPU *pGpu, NvU32 arg2, struct Falcon **arg3); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuGetConstructedFalcon(struct OBJGPU *pGpu, NvU32 arg0, struct Falcon **arg1) { +static inline NV_STATUS gpuGetConstructedFalcon(struct OBJGPU *pGpu, NvU32 arg2, struct Falcon **arg3) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuGetConstructedFalcon(pGpu, arg0, arg1) gpuGetConstructedFalcon_IMPL(pGpu, arg0, arg1) +#define gpuGetConstructedFalcon(pGpu, arg2, arg3) gpuGetConstructedFalcon_IMPL(pGpu, arg2, arg3) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuGetSparseTextureComputeMode_IMPL(struct OBJGPU *pGpu, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2); +NV_STATUS gpuGetSparseTextureComputeMode_IMPL(struct OBJGPU *pGpu, NvU32 *arg2, NvU32 *arg3, NvU32 *arg4); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuGetSparseTextureComputeMode(struct OBJGPU *pGpu, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2) { +static inline NV_STATUS gpuGetSparseTextureComputeMode(struct OBJGPU *pGpu, NvU32 *arg2, NvU32 *arg3, NvU32 *arg4) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuGetSparseTextureComputeMode(pGpu, arg0, arg1, arg2) gpuGetSparseTextureComputeMode_IMPL(pGpu, arg0, arg1, arg2) +#define gpuGetSparseTextureComputeMode(pGpu, arg2, arg3, arg4) gpuGetSparseTextureComputeMode_IMPL(pGpu, arg2, arg3, arg4) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuSetSparseTextureComputeMode_IMPL(struct OBJGPU *pGpu, NvU32 arg0); +NV_STATUS gpuSetSparseTextureComputeMode_IMPL(struct OBJGPU *pGpu, NvU32 arg2); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuSetSparseTextureComputeMode(struct OBJGPU *pGpu, NvU32 arg0) { +static inline NV_STATUS gpuSetSparseTextureComputeMode(struct OBJGPU *pGpu, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuSetSparseTextureComputeMode(pGpu, arg0) gpuSetSparseTextureComputeMode_IMPL(pGpu, arg0) +#define gpuSetSparseTextureComputeMode(pGpu, arg2) gpuSetSparseTextureComputeMode_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled -struct OBJENGSTATE *gpuGetEngstate_IMPL(struct OBJGPU *pGpu, ENGDESCRIPTOR arg0); +struct OBJENGSTATE *gpuGetEngstate_IMPL(struct OBJGPU *pGpu, ENGDESCRIPTOR arg2); #ifdef __nvoc_gpu_h_disabled -static inline struct OBJENGSTATE *gpuGetEngstate(struct OBJGPU *pGpu, ENGDESCRIPTOR arg0) { +static inline struct OBJENGSTATE *gpuGetEngstate(struct OBJGPU *pGpu, ENGDESCRIPTOR arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NULL; } #else //__nvoc_gpu_h_disabled -#define gpuGetEngstate(pGpu, arg0) gpuGetEngstate_IMPL(pGpu, arg0) +#define gpuGetEngstate(pGpu, arg2) gpuGetEngstate_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled -struct OBJENGSTATE *gpuGetEngstateNoShare_IMPL(struct OBJGPU *pGpu, ENGDESCRIPTOR arg0); +struct OBJENGSTATE *gpuGetEngstateNoShare_IMPL(struct OBJGPU *pGpu, ENGDESCRIPTOR arg2); #ifdef __nvoc_gpu_h_disabled -static inline struct OBJENGSTATE *gpuGetEngstateNoShare(struct OBJGPU *pGpu, ENGDESCRIPTOR arg0) { +static inline struct OBJENGSTATE *gpuGetEngstateNoShare(struct OBJGPU *pGpu, ENGDESCRIPTOR arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NULL; } #else //__nvoc_gpu_h_disabled -#define gpuGetEngstateNoShare(pGpu, arg0) gpuGetEngstateNoShare_IMPL(pGpu, arg0) +#define gpuGetEngstateNoShare(pGpu, arg2) gpuGetEngstateNoShare_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled struct KernelFifo *gpuGetKernelFifoShared_IMPL(struct OBJGPU *pGpu); @@ -4073,26 +4232,26 @@ static inline struct KernelFifo *gpuGetKernelFifoShared(struct OBJGPU *pGpu) { #define gpuGetKernelFifoShared(pGpu) gpuGetKernelFifoShared_IMPL(pGpu) #endif //__nvoc_gpu_h_disabled -NvBool gpuGetNextEngstate_IMPL(struct OBJGPU *pGpu, ENGSTATE_ITER *pIt, struct OBJENGSTATE **ppEngState); +void *gpuGetNextChildOfTypeUnsafe_IMPL(struct OBJGPU *pGpu, GPU_CHILD_ITER *pIt, NvU32 classId); #ifdef __nvoc_gpu_h_disabled -static inline NvBool gpuGetNextEngstate(struct OBJGPU *pGpu, ENGSTATE_ITER *pIt, struct OBJENGSTATE **ppEngState) { +static inline void *gpuGetNextChildOfTypeUnsafe(struct OBJGPU *pGpu, GPU_CHILD_ITER *pIt, NvU32 classId) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); - return NV_FALSE; + return NULL; } #else //__nvoc_gpu_h_disabled -#define gpuGetNextEngstate(pGpu, pIt, ppEngState) gpuGetNextEngstate_IMPL(pGpu, pIt, ppEngState) +#define gpuGetNextChildOfTypeUnsafe(pGpu, pIt, classId) gpuGetNextChildOfTypeUnsafe_IMPL(pGpu, pIt, classId) #endif //__nvoc_gpu_h_disabled -struct OBJHOSTENG *gpuGetHosteng_IMPL(struct OBJGPU *pGpu, ENGDESCRIPTOR arg0); +struct OBJHOSTENG *gpuGetHosteng_IMPL(struct OBJGPU *pGpu, ENGDESCRIPTOR arg2); #ifdef __nvoc_gpu_h_disabled -static inline struct OBJHOSTENG *gpuGetHosteng(struct OBJGPU *pGpu, ENGDESCRIPTOR arg0) { +static inline struct OBJHOSTENG *gpuGetHosteng(struct OBJGPU *pGpu, ENGDESCRIPTOR arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NULL; } #else //__nvoc_gpu_h_disabled -#define gpuGetHosteng(pGpu, arg0) gpuGetHosteng_IMPL(pGpu, arg0) +#define gpuGetHosteng(pGpu, arg2) gpuGetHosteng_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled NV_STATUS gpuConstructUserRegisterAccessMap_IMPL(struct OBJGPU *pGpu); @@ -4106,15 +4265,15 @@ static inline NV_STATUS gpuConstructUserRegisterAccessMap(struct OBJGPU *pGpu) { #define gpuConstructUserRegisterAccessMap(pGpu) gpuConstructUserRegisterAccessMap_IMPL(pGpu) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuInitRegisterAccessMap_IMPL(struct OBJGPU *pGpu, NvU8 *arg0, NvU32 arg1, const NvU8 *arg2, const NvU32 arg3); +NV_STATUS gpuInitRegisterAccessMap_IMPL(struct OBJGPU *pGpu, NvU8 *arg2, NvU32 arg3, const NvU8 *arg4, const NvU32 arg5); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuInitRegisterAccessMap(struct OBJGPU *pGpu, NvU8 *arg0, NvU32 arg1, const NvU8 *arg2, const NvU32 arg3) { +static inline NV_STATUS gpuInitRegisterAccessMap(struct OBJGPU *pGpu, NvU8 *arg2, NvU32 arg3, const NvU8 *arg4, const NvU32 arg5) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuInitRegisterAccessMap(pGpu, arg0, arg1, arg2, arg3) gpuInitRegisterAccessMap_IMPL(pGpu, arg0, arg1, arg2, arg3) +#define gpuInitRegisterAccessMap(pGpu, arg2, arg3, arg4, arg5) gpuInitRegisterAccessMap_IMPL(pGpu, arg2, arg3, arg4, arg5) #endif //__nvoc_gpu_h_disabled NV_STATUS gpuSetUserRegisterAccessPermissions_IMPL(struct OBJGPU *pGpu, NvU32 offset, NvU32 size, NvBool bAllow); @@ -4429,15 +4588,15 @@ static inline void gpuInitChipInfo(struct OBJGPU *pGpu) { #define gpuInitChipInfo(pGpu) gpuInitChipInfo_IMPL(pGpu) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuGetChipDetails_IMPL(struct OBJGPU *pGpu, NV2080_CTRL_GPU_GET_CHIP_DETAILS_PARAMS *arg0); +NV_STATUS gpuGetChipDetails_IMPL(struct OBJGPU *pGpu, NV2080_CTRL_GPU_GET_CHIP_DETAILS_PARAMS *arg2); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuGetChipDetails(struct OBJGPU *pGpu, NV2080_CTRL_GPU_GET_CHIP_DETAILS_PARAMS *arg0) { +static inline NV_STATUS gpuGetChipDetails(struct OBJGPU *pGpu, NV2080_CTRL_GPU_GET_CHIP_DETAILS_PARAMS *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuGetChipDetails(pGpu, arg0) gpuGetChipDetails_IMPL(pGpu, arg0) +#define gpuGetChipDetails(pGpu, arg2) gpuGetChipDetails_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled NV_STATUS gpuSanityCheckRegRead_IMPL(struct OBJGPU *pGpu, NvU32 addr, NvU32 size, void *pValue); @@ -4462,15 +4621,15 @@ static inline NV_STATUS gpuSanityCheckRegisterAccess(struct OBJGPU *pGpu, NvU32 #define gpuSanityCheckRegisterAccess(pGpu, addr, pRetVal) gpuSanityCheckRegisterAccess_IMPL(pGpu, addr, pRetVal) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuValidateRegOffset_IMPL(struct OBJGPU *pGpu, NvU32 arg0); +NV_STATUS gpuValidateRegOffset_IMPL(struct OBJGPU *pGpu, NvU32 arg2); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuValidateRegOffset(struct OBJGPU *pGpu, NvU32 arg0) { +static inline NV_STATUS gpuValidateRegOffset(struct OBJGPU *pGpu, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuValidateRegOffset(pGpu, arg0) gpuValidateRegOffset_IMPL(pGpu, arg0) +#define gpuValidateRegOffset(pGpu, arg2) gpuValidateRegOffset_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled NV_STATUS gpuSetGC6SBIOSCapabilities_IMPL(struct OBJGPU *pGpu); @@ -4484,15 +4643,15 @@ static inline NV_STATUS gpuSetGC6SBIOSCapabilities(struct OBJGPU *pGpu) { #define gpuSetGC6SBIOSCapabilities(pGpu) gpuSetGC6SBIOSCapabilities_IMPL(pGpu) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuGc6Entry_IMPL(struct OBJGPU *pGpu, NV2080_CTRL_GC6_ENTRY_PARAMS *arg0); +NV_STATUS gpuGc6Entry_IMPL(struct OBJGPU *pGpu, NV2080_CTRL_GC6_ENTRY_PARAMS *arg2); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuGc6Entry(struct OBJGPU *pGpu, NV2080_CTRL_GC6_ENTRY_PARAMS *arg0) { +static inline NV_STATUS gpuGc6Entry(struct OBJGPU *pGpu, NV2080_CTRL_GC6_ENTRY_PARAMS *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuGc6Entry(pGpu, arg0) gpuGc6Entry_IMPL(pGpu, arg0) +#define gpuGc6Entry(pGpu, arg2) gpuGc6Entry_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled NV_STATUS gpuGc6EntryGpuPowerOff_IMPL(struct OBJGPU *pGpu); @@ -4506,15 +4665,15 @@ static inline NV_STATUS gpuGc6EntryGpuPowerOff(struct OBJGPU *pGpu) { #define gpuGc6EntryGpuPowerOff(pGpu) gpuGc6EntryGpuPowerOff_IMPL(pGpu) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuGc6Exit_IMPL(struct OBJGPU *pGpu, NV2080_CTRL_GC6_EXIT_PARAMS *arg0); +NV_STATUS gpuGc6Exit_IMPL(struct OBJGPU *pGpu, NV2080_CTRL_GC6_EXIT_PARAMS *arg2); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuGc6Exit(struct OBJGPU *pGpu, NV2080_CTRL_GC6_EXIT_PARAMS *arg0) { +static inline NV_STATUS gpuGc6Exit(struct OBJGPU *pGpu, NV2080_CTRL_GC6_EXIT_PARAMS *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuGc6Exit(pGpu, arg0) gpuGc6Exit_IMPL(pGpu, arg0) +#define gpuGc6Exit(pGpu, arg2) gpuGc6Exit_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled void gpuDestroyRusdMemory_IMPL(struct OBJGPU *pGpu); @@ -4527,26 +4686,26 @@ static inline void gpuDestroyRusdMemory(struct OBJGPU *pGpu) { #define gpuDestroyRusdMemory(pGpu) gpuDestroyRusdMemory_IMPL(pGpu) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuEnableAccounting_IMPL(struct OBJGPU *arg0); +NV_STATUS gpuEnableAccounting_IMPL(struct OBJGPU *arg1); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuEnableAccounting(struct OBJGPU *arg0) { +static inline NV_STATUS gpuEnableAccounting(struct OBJGPU *arg1) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuEnableAccounting(arg0) gpuEnableAccounting_IMPL(arg0) +#define gpuEnableAccounting(arg1) gpuEnableAccounting_IMPL(arg1) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuDisableAccounting_IMPL(struct OBJGPU *arg0, NvBool bForce); +NV_STATUS gpuDisableAccounting_IMPL(struct OBJGPU *arg1, NvBool bForce); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuDisableAccounting(struct OBJGPU *arg0, NvBool bForce) { +static inline NV_STATUS gpuDisableAccounting(struct OBJGPU *arg1, NvBool bForce) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuDisableAccounting(arg0, bForce) gpuDisableAccounting_IMPL(arg0, bForce) +#define gpuDisableAccounting(arg1, bForce) gpuDisableAccounting_IMPL(arg1, bForce) #endif //__nvoc_gpu_h_disabled #undef PRIVATE_FIELD @@ -4569,11 +4728,11 @@ NV_STATUS gpuGetByHandle(struct RsClient *pClient, NvHandle hResource, NvBool *p // Generates GPU child accessor macros (i.e.: GPU_GET_{ENG}) // #define GPU_CHILD_SINGLE_INST(className, accessorName, numInstances, bConstructEarly, gpuField) \ - static NV_FORCEINLINE className *accessorName(OBJGPU *pGpu) { return pGpu->gpuField; } \ + static NV_FORCEINLINE className *accessorName(OBJGPU *pGpu) { return pGpu->children.named.gpuField; } \ ct_assert(numInstances == 1); #define GPU_CHILD_MULTI_INST(className, accessorName, numInstances, bConstructEarly, gpuField) \ - static NV_FORCEINLINE className *accessorName(OBJGPU *pGpu, NvU32 index) { return index < numInstances ? pGpu->gpuField[index] : NULL; } + static NV_FORCEINLINE className *accessorName(OBJGPU *pGpu, NvU32 index) { return index < numInstances ? pGpu->children.named.gpuField[index] : NULL; } #include "gpu/gpu_child_list.h" @@ -4592,6 +4751,11 @@ static NV_FORCEINLINE struct Graphics *GPU_GET_GR(struct OBJGPU *pGpu) { return #endif // RM_STRICT_CONFIG_EMIT_DISABLED_GPU_ENGINE_ACCESSORS +// Type-safe wrapper for child iteration +#define GPU_GET_NEXT_CHILD_OF_TYPE(pGpu, pIt, className) \ + ((className*)gpuGetNextChildOfTypeUnsafe(pGpu, pIt, classId(className))) + + // // Inline functions // @@ -4685,9 +4849,6 @@ ct_assert(!(RMCFG_FEATURE_GSP_CLIENT_RM && RMCFG_FEATURE_DCE_CLIENT_RM)); #define IS_SRIOV_WITH_VGPU_GSP_DISABLED(pGpu) (gpuIsSriovEnabled(pGpu) && !IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu) && !IS_SRIOV_HEAVY(pGpu)) #define IS_MIG_RM(pGpu) ((pGpu)->bIsMigRm) -extern GPU_CHILD_ITER gpuGetPossibleEngDescriptorIter(void); -extern NvBool gpuGetNextPossibleEngDescriptor(GPU_CHILD_ITER *pIt, ENGDESCRIPTOR *pEngDesc); - NV_STATUS gpuCtrlExecRegOps(struct OBJGPU *, struct Graphics *, NvHandle, NvHandle, NV2080_CTRL_GPU_REG_OP *, NvU32, NvBool); NV_STATUS gpuValidateRegOps(struct OBJGPU *, NV2080_CTRL_GPU_REG_OP *, NvU32, NvBool, NvBool); @@ -4847,11 +5008,14 @@ NV_STATUS gpuSimEscapeReadBuffer(struct OBJGPU *, const char *path, NvU32 Index, // // This function needs to be called when OBJGPU is not created. HAL -// infrastructure can’t be used for this case, so it has been added manually. +// infrastructure can't be used for this case, so it has been added manually. // It will be invoked directly by gpumgrIsDeviceMsixAllowed(). // NvBool gpuIsMsixAllowed_TU102(RmPhysAddr bar0BaseAddr); +// Define for PMC reset delay +#define NV_PMC_RESET_DELAY_US 2 + #endif // _OBJGPU_H_ #ifdef __cplusplus diff --git a/src/nvidia/generated/g_gpu_resource_nvoc.c b/src/nvidia/generated/g_gpu_resource_nvoc.c index c0125bbc84..62c26b666f 100644 --- a/src/nvidia/generated/g_gpu_resource_nvoc.c +++ b/src/nvidia/generated/g_gpu_resource_nvoc.c @@ -84,90 +84,117 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_GpuResource = /*pExportInfo=*/ &__nvoc_export_info_GpuResource }; -static NV_STATUS __nvoc_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) - __nvoc_rtti_GpuResource_RsResource.offset), pCallContext, pParams); +// 4 down-thunk(s) defined to bridge methods in GpuResource from superclasses + +// gpuresControl: virtual override (res) base (rmres) +static NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) - __nvoc_rtti_GpuResource_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) - __nvoc_rtti_GpuResource_RsResource.offset), pCallContext, pParams, pCpuMapping); +// gpuresMap: virtual override (res) base (rmres) +static NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) - __nvoc_rtti_GpuResource_RsResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) - __nvoc_rtti_GpuResource_RsResource.offset), pCallContext, pCpuMapping); +// gpuresUnmap: virtual override (res) base (rmres) +static NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) - __nvoc_rtti_GpuResource_RsResource.offset), pCallContext, pCpuMapping); } -static NvBool __nvoc_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) - __nvoc_rtti_GpuResource_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// gpuresShareCallback: virtual override (res) base (rmres) +static NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) - __nvoc_rtti_GpuResource_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_GpuResource_RmResource.offset), bSubdeviceHandleProvided); + +// 17 up-thunk(s) defined to bridge methods in GpuResource to superclasses + +// gpuresAccessCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_GpuResource_RmResource.offset), pParams); +// gpuresGetMemInterMapParams: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GpuResource_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_GpuResource_RmResource.offset), ppMemDesc); +// gpuresCheckMemInterUnmap: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GpuResource_RmResource.offset), bSubdeviceHandleProvided); } -static NvU32 __nvoc_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuResource_RsResource.offset)); +// gpuresGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GpuResource_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuResource_RsResource.offset), pCallContext, pParams); +// gpuresControlSerialization_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RmResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuResource_RsResource.offset), pReference); +// gpuresControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuResource_RmResource.offset), pCallContext, pParams); +// gpuresControl_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuResource_RmResource.offset), pCallContext, pParams); +// gpuresControl_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuResource_RsResource.offset)); +// gpuresCanCopy: virtual inherited (res) base (rmres) +static NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuResource_RsResource.offset)); +// gpuresIsDuplicate: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RsResource.offset), hMemory, pDuplicate); } -static void __nvoc_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuResource_RsResource.offset)); +// gpuresPreDestruct: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuResource_RsResource.offset), pParams); +// gpuresControlFilter: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuResource_RsResource.offset), hMemory, pDuplicate); +// gpuresIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body +static NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RsResource.offset)); } -static void __nvoc_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuResource_RmResource.offset), pCallContext, pParams); +// gpuresMapTo: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuResource_RmResource.offset), pCallContext, pParams); +// gpuresUnmapFrom: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuResource_RsResource.offset), pParams); +// gpuresGetRefCount: virtual inherited (res) base (rmres) +static NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuResource_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// gpuresAddAdditionalDependants: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_GpuResource = { /*numEntries=*/ 0, @@ -203,69 +230,95 @@ NV_STATUS __nvoc_ctor_GpuResource(GpuResource *pThis, struct CALL_CONTEXT * arg_ return status; } +// Vtable initialization static void __nvoc_init_funcTable_GpuResource_1(GpuResource *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // gpuresControl -- virtual override (res) base (rmres) pThis->__gpuresControl__ = &gpuresControl_IMPL; + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl; + // gpuresMap -- virtual override (res) base (rmres) pThis->__gpuresMap__ = &gpuresMap_IMPL; + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap; + // gpuresUnmap -- virtual override (res) base (rmres) pThis->__gpuresUnmap__ = &gpuresUnmap_IMPL; + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap; + // gpuresShareCallback -- virtual override (res) base (rmres) pThis->__gpuresShareCallback__ = &gpuresShareCallback_IMPL; + pThis->__nvoc_base_RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback; + // gpuresGetRegBaseOffsetAndSize -- virtual pThis->__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL; + // gpuresGetMapAddrSpace -- virtual pThis->__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL; + // gpuresInternalControlForward -- virtual pThis->__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL; + // gpuresGetInternalObjectHandle -- virtual pThis->__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL; - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ = &__nvoc_thunk_GpuResource_resControl; - - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ = &__nvoc_thunk_GpuResource_resMap; + // gpuresAccessCallback -- virtual inherited (rmres) base (rmres) + pThis->__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback; - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ = &__nvoc_thunk_GpuResource_resUnmap; + // gpuresGetMemInterMapParams -- virtual inherited (rmres) base (rmres) + pThis->__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams; - pThis->__nvoc_base_RmResource.__rmresShareCallback__ = &__nvoc_thunk_GpuResource_rmresShareCallback; + // gpuresCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) + pThis->__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap; - pThis->__gpuresCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_gpuresCheckMemInterUnmap; + // gpuresGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) + pThis->__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor; - pThis->__gpuresGetMemInterMapParams__ = &__nvoc_thunk_RmResource_gpuresGetMemInterMapParams; + // gpuresControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue; - pThis->__gpuresGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_gpuresGetMemoryMappingDescriptor; + // gpuresControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue; - pThis->__gpuresGetRefCount__ = &__nvoc_thunk_RsResource_gpuresGetRefCount; + // gpuresControl_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue; - pThis->__gpuresControlFilter__ = &__nvoc_thunk_RsResource_gpuresControlFilter; + // gpuresControl_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue; - pThis->__gpuresAddAdditionalDependants__ = &__nvoc_thunk_RsResource_gpuresAddAdditionalDependants; + // gpuresCanCopy -- virtual inherited (res) base (rmres) + pThis->__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy; - pThis->__gpuresControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_gpuresControlSerialization_Prologue; + // gpuresIsDuplicate -- virtual inherited (res) base (rmres) + pThis->__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate; - pThis->__gpuresControl_Prologue__ = &__nvoc_thunk_RmResource_gpuresControl_Prologue; + // gpuresPreDestruct -- virtual inherited (res) base (rmres) + pThis->__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct; - pThis->__gpuresCanCopy__ = &__nvoc_thunk_RsResource_gpuresCanCopy; + // gpuresControlFilter -- virtual inherited (res) base (rmres) + pThis->__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter; - pThis->__gpuresIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_gpuresIsPartialUnmapSupported; + // gpuresIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body + pThis->__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported; - pThis->__gpuresPreDestruct__ = &__nvoc_thunk_RsResource_gpuresPreDestruct; + // gpuresMapTo -- virtual inherited (res) base (rmres) + pThis->__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo; - pThis->__gpuresMapTo__ = &__nvoc_thunk_RsResource_gpuresMapTo; + // gpuresUnmapFrom -- virtual inherited (res) base (rmres) + pThis->__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom; - pThis->__gpuresIsDuplicate__ = &__nvoc_thunk_RsResource_gpuresIsDuplicate; + // gpuresGetRefCount -- virtual inherited (res) base (rmres) + pThis->__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount; - pThis->__gpuresControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_gpuresControlSerialization_Epilogue; + // gpuresAddAdditionalDependants -- virtual inherited (res) base (rmres) + pThis->__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants; +} // End __nvoc_init_funcTable_GpuResource_1 with approximately 29 basic block(s). - pThis->__gpuresControl_Epilogue__ = &__nvoc_thunk_RmResource_gpuresControl_Epilogue; - - pThis->__gpuresUnmapFrom__ = &__nvoc_thunk_RsResource_gpuresUnmapFrom; - - pThis->__gpuresAccessCallback__ = &__nvoc_thunk_RmResource_gpuresAccessCallback; -} +// Initialize vtable(s) for 25 virtual method(s). void __nvoc_init_funcTable_GpuResource(GpuResource *pThis) { + + // Initialize vtable(s) with 25 per-object function pointer(s). __nvoc_init_funcTable_GpuResource_1(pThis); } diff --git a/src/nvidia/generated/g_gpu_resource_nvoc.h b/src/nvidia/generated/g_gpu_resource_nvoc.h index bbc6a9d2c6..244a31b260 100644 --- a/src/nvidia/generated/g_gpu_resource_nvoc.h +++ b/src/nvidia/generated/g_gpu_resource_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_GPU_RESOURCE_NVOC_H_ #define _G_GPU_RESOURCE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_gpu_resource_nvoc.h" #ifndef _GPURESOURCE_H_ @@ -38,6 +46,7 @@ extern "C" { #include "rmapi/resource.h" + struct OBJGPU; #ifndef __NVOC_CLASS_OBJGPU_TYPEDEF__ @@ -50,6 +59,7 @@ typedef struct OBJGPU OBJGPU; #endif /* __nvoc_class_id_OBJGPU */ + struct Device; #ifndef __NVOC_CLASS_Device_TYPEDEF__ @@ -62,6 +72,7 @@ typedef struct Device Device; #endif /* __nvoc_class_id_Device */ + struct Subdevice; #ifndef __NVOC_CLASS_Subdevice_TYPEDEF__ @@ -95,39 +106,50 @@ typedef struct Subdevice Subdevice; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct GpuResource { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - NV_STATUS (*__gpuresControl__)(struct GpuResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gpuresMap__)(struct GpuResource *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NV_STATUS (*__gpuresUnmap__)(struct GpuResource *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NvBool (*__gpuresShareCallback__)(struct GpuResource *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__gpuresGetRegBaseOffsetAndSize__)(struct GpuResource *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__gpuresGetMapAddrSpace__)(struct GpuResource *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NV_STATUS (*__gpuresInternalControlForward__)(struct GpuResource *, NvU32, void *, NvU32); - NvHandle (*__gpuresGetInternalObjectHandle__)(struct GpuResource *); - NV_STATUS (*__gpuresCheckMemInterUnmap__)(struct GpuResource *, NvBool); - NV_STATUS (*__gpuresGetMemInterMapParams__)(struct GpuResource *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__gpuresGetMemoryMappingDescriptor__)(struct GpuResource *, struct MEMORY_DESCRIPTOR **); - NvU32 (*__gpuresGetRefCount__)(struct GpuResource *); - NV_STATUS (*__gpuresControlFilter__)(struct GpuResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__gpuresAddAdditionalDependants__)(struct RsClient *, struct GpuResource *, RsResourceRef *); - NV_STATUS (*__gpuresControlSerialization_Prologue__)(struct GpuResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gpuresControl_Prologue__)(struct GpuResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__gpuresCanCopy__)(struct GpuResource *); - NvBool (*__gpuresIsPartialUnmapSupported__)(struct GpuResource *); - void (*__gpuresPreDestruct__)(struct GpuResource *); - NV_STATUS (*__gpuresMapTo__)(struct GpuResource *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__gpuresIsDuplicate__)(struct GpuResource *, NvHandle, NvBool *); - void (*__gpuresControlSerialization_Epilogue__)(struct GpuResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__gpuresControl_Epilogue__)(struct GpuResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gpuresUnmapFrom__)(struct GpuResource *, RS_RES_UNMAP_FROM_PARAMS *); - NvBool (*__gpuresAccessCallback__)(struct GpuResource *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^3 + struct RsResource *__nvoc_pbase_RsResource; // res super^2 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^2 + struct RmResource *__nvoc_pbase_RmResource; // rmres super + struct GpuResource *__nvoc_pbase_GpuResource; // gpures + + // Vtable with 25 per-object function pointers + NV_STATUS (*__gpuresControl__)(struct GpuResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (rmres) + NV_STATUS (*__gpuresMap__)(struct GpuResource * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual override (res) base (rmres) + NV_STATUS (*__gpuresUnmap__)(struct GpuResource * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual override (res) base (rmres) + NvBool (*__gpuresShareCallback__)(struct GpuResource * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual override (res) base (rmres) + NV_STATUS (*__gpuresGetRegBaseOffsetAndSize__)(struct GpuResource * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual + NV_STATUS (*__gpuresGetMapAddrSpace__)(struct GpuResource * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual + NV_STATUS (*__gpuresInternalControlForward__)(struct GpuResource * /*this*/, NvU32, void *, NvU32); // virtual + NvHandle (*__gpuresGetInternalObjectHandle__)(struct GpuResource * /*this*/); // virtual + NvBool (*__gpuresAccessCallback__)(struct GpuResource * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__gpuresGetMemInterMapParams__)(struct GpuResource * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__gpuresCheckMemInterUnmap__)(struct GpuResource * /*this*/, NvBool); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__gpuresGetMemoryMappingDescriptor__)(struct GpuResource * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__gpuresControlSerialization_Prologue__)(struct GpuResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__gpuresControlSerialization_Epilogue__)(struct GpuResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__gpuresControl_Prologue__)(struct GpuResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__gpuresControl_Epilogue__)(struct GpuResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NvBool (*__gpuresCanCopy__)(struct GpuResource * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__gpuresIsDuplicate__)(struct GpuResource * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (rmres) + void (*__gpuresPreDestruct__)(struct GpuResource * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__gpuresControlFilter__)(struct GpuResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NvBool (*__gpuresIsPartialUnmapSupported__)(struct GpuResource * /*this*/); // inline virtual inherited (res) base (rmres) body + NV_STATUS (*__gpuresMapTo__)(struct GpuResource * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) + NV_STATUS (*__gpuresUnmapFrom__)(struct GpuResource * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) + NvU32 (*__gpuresGetRefCount__)(struct GpuResource * /*this*/); // virtual inherited (res) base (rmres) + void (*__gpuresAddAdditionalDependants__)(struct RsClient *, struct GpuResource * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) + + // Data members struct OBJGPUGRP *pGpuGrp; struct OBJGPU *pGpu; struct Device *pDevice; @@ -144,6 +166,7 @@ typedef struct GpuResource GpuResource; #define __nvoc_class_id_GpuResource 0x5d5d9f #endif /* __nvoc_class_id_GpuResource */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_GpuResource; #define __staticCast_GpuResource(pThis) \ @@ -156,154 +179,182 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_GpuResource; ((GpuResource*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(GpuResource))) #endif //__nvoc_gpu_resource_h_disabled - NV_STATUS __nvoc_objCreateDynamic_GpuResource(GpuResource**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_GpuResource(GpuResource**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_GpuResource(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_GpuResource((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define gpuresControl_FNPTR(pGpuResource) pGpuResource->__gpuresControl__ #define gpuresControl(pGpuResource, pCallContext, pParams) gpuresControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define gpuresMap_FNPTR(pGpuResource) pGpuResource->__gpuresMap__ #define gpuresMap(pGpuResource, pCallContext, pParams, pCpuMapping) gpuresMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define gpuresUnmap_FNPTR(pGpuResource) pGpuResource->__gpuresUnmap__ #define gpuresUnmap(pGpuResource, pCallContext, pCpuMapping) gpuresUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define gpuresShareCallback_FNPTR(pGpuResource) pGpuResource->__gpuresShareCallback__ #define gpuresShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) gpuresShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) +#define gpuresGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__gpuresGetRegBaseOffsetAndSize__ #define gpuresGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) gpuresGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define gpuresGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__gpuresGetMapAddrSpace__ #define gpuresGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) gpuresGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define gpuresInternalControlForward_FNPTR(pGpuResource) pGpuResource->__gpuresInternalControlForward__ #define gpuresInternalControlForward(pGpuResource, command, pParams, size) gpuresInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) +#define gpuresGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__gpuresGetInternalObjectHandle__ #define gpuresGetInternalObjectHandle(pGpuResource) gpuresGetInternalObjectHandle_DISPATCH(pGpuResource) -#define gpuresCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) gpuresCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define gpuresAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define gpuresAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) gpuresAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define gpuresGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define gpuresGetMemInterMapParams(pRmResource, pParams) gpuresGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define gpuresCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define gpuresCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) gpuresCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define gpuresGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define gpuresGetMemoryMappingDescriptor(pRmResource, ppMemDesc) gpuresGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define gpuresGetRefCount(pResource) gpuresGetRefCount_DISPATCH(pResource) -#define gpuresControlFilter(pResource, pCallContext, pParams) gpuresControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define gpuresAddAdditionalDependants(pClient, pResource, pReference) gpuresAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define gpuresControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define gpuresControlSerialization_Prologue(pResource, pCallContext, pParams) gpuresControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define gpuresControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define gpuresControlSerialization_Epilogue(pResource, pCallContext, pParams) gpuresControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define gpuresControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ #define gpuresControl_Prologue(pResource, pCallContext, pParams) gpuresControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define gpuresControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define gpuresControl_Epilogue(pResource, pCallContext, pParams) gpuresControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define gpuresCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define gpuresCanCopy(pResource) gpuresCanCopy_DISPATCH(pResource) -#define gpuresIsPartialUnmapSupported(pResource) gpuresIsPartialUnmapSupported_DISPATCH(pResource) +#define gpuresIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define gpuresIsDuplicate(pResource, hMemory, pDuplicate) gpuresIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define gpuresPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ #define gpuresPreDestruct(pResource) gpuresPreDestruct_DISPATCH(pResource) +#define gpuresControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define gpuresControlFilter(pResource, pCallContext, pParams) gpuresControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define gpuresIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define gpuresIsPartialUnmapSupported(pResource) gpuresIsPartialUnmapSupported_DISPATCH(pResource) +#define gpuresMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ #define gpuresMapTo(pResource, pParams) gpuresMapTo_DISPATCH(pResource, pParams) -#define gpuresIsDuplicate(pResource, hMemory, pDuplicate) gpuresIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define gpuresControlSerialization_Epilogue(pResource, pCallContext, pParams) gpuresControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define gpuresControl_Epilogue(pResource, pCallContext, pParams) gpuresControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define gpuresUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ #define gpuresUnmapFrom(pResource, pParams) gpuresUnmapFrom_DISPATCH(pResource, pParams) -#define gpuresAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) gpuresAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS gpuresControl_IMPL(struct GpuResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); +#define gpuresGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define gpuresGetRefCount(pResource) gpuresGetRefCount_DISPATCH(pResource) +#define gpuresAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define gpuresAddAdditionalDependants(pClient, pResource, pReference) gpuresAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS gpuresControl_DISPATCH(struct GpuResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pGpuResource->__gpuresControl__(pGpuResource, pCallContext, pParams); } -NV_STATUS gpuresMap_IMPL(struct GpuResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); - static inline NV_STATUS gpuresMap_DISPATCH(struct GpuResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return pGpuResource->__gpuresMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -NV_STATUS gpuresUnmap_IMPL(struct GpuResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); - static inline NV_STATUS gpuresUnmap_DISPATCH(struct GpuResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return pGpuResource->__gpuresUnmap__(pGpuResource, pCallContext, pCpuMapping); } -NvBool gpuresShareCallback_IMPL(struct GpuResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); - static inline NvBool gpuresShareCallback_DISPATCH(struct GpuResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return pGpuResource->__gpuresShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } -NV_STATUS gpuresGetRegBaseOffsetAndSize_IMPL(struct GpuResource *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); - static inline NV_STATUS gpuresGetRegBaseOffsetAndSize_DISPATCH(struct GpuResource *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__gpuresGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -NV_STATUS gpuresGetMapAddrSpace_IMPL(struct GpuResource *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); - static inline NV_STATUS gpuresGetMapAddrSpace_DISPATCH(struct GpuResource *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__gpuresGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -NV_STATUS gpuresInternalControlForward_IMPL(struct GpuResource *pGpuResource, NvU32 command, void *pParams, NvU32 size); - static inline NV_STATUS gpuresInternalControlForward_DISPATCH(struct GpuResource *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return pGpuResource->__gpuresInternalControlForward__(pGpuResource, command, pParams, size); } -NvHandle gpuresGetInternalObjectHandle_IMPL(struct GpuResource *pGpuResource); - static inline NvHandle gpuresGetInternalObjectHandle_DISPATCH(struct GpuResource *pGpuResource) { return pGpuResource->__gpuresGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS gpuresCheckMemInterUnmap_DISPATCH(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__gpuresCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NvBool gpuresAccessCallback_DISPATCH(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__gpuresAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS gpuresGetMemInterMapParams_DISPATCH(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__gpuresGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS gpuresGetMemoryMappingDescriptor_DISPATCH(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__gpuresGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); -} - -static inline NvU32 gpuresGetRefCount_DISPATCH(struct GpuResource *pResource) { - return pResource->__gpuresGetRefCount__(pResource); -} - -static inline NV_STATUS gpuresControlFilter_DISPATCH(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gpuresControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS gpuresCheckMemInterUnmap_DISPATCH(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__gpuresCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline void gpuresAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference) { - pResource->__gpuresAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS gpuresGetMemoryMappingDescriptor_DISPATCH(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__gpuresGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS gpuresControlSerialization_Prologue_DISPATCH(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__gpuresControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void gpuresControlSerialization_Epilogue_DISPATCH(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__gpuresControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + static inline NV_STATUS gpuresControl_Prologue_DISPATCH(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__gpuresControl_Prologue__(pResource, pCallContext, pParams); } +static inline void gpuresControl_Epilogue_DISPATCH(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__gpuresControl_Epilogue__(pResource, pCallContext, pParams); +} + static inline NvBool gpuresCanCopy_DISPATCH(struct GpuResource *pResource) { return pResource->__gpuresCanCopy__(pResource); } -static inline NvBool gpuresIsPartialUnmapSupported_DISPATCH(struct GpuResource *pResource) { - return pResource->__gpuresIsPartialUnmapSupported__(pResource); +static inline NV_STATUS gpuresIsDuplicate_DISPATCH(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__gpuresIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void gpuresPreDestruct_DISPATCH(struct GpuResource *pResource) { pResource->__gpuresPreDestruct__(pResource); } -static inline NV_STATUS gpuresMapTo_DISPATCH(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__gpuresMapTo__(pResource, pParams); -} - -static inline NV_STATUS gpuresIsDuplicate_DISPATCH(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__gpuresIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS gpuresControlFilter_DISPATCH(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__gpuresControlFilter__(pResource, pCallContext, pParams); } -static inline void gpuresControlSerialization_Epilogue_DISPATCH(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__gpuresControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool gpuresIsPartialUnmapSupported_DISPATCH(struct GpuResource *pResource) { + return pResource->__gpuresIsPartialUnmapSupported__(pResource); } -static inline void gpuresControl_Epilogue_DISPATCH(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__gpuresControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS gpuresMapTo_DISPATCH(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__gpuresMapTo__(pResource, pParams); } static inline NV_STATUS gpuresUnmapFrom_DISPATCH(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return pResource->__gpuresUnmapFrom__(pResource, pParams); } -static inline NvBool gpuresAccessCallback_DISPATCH(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__gpuresAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NvU32 gpuresGetRefCount_DISPATCH(struct GpuResource *pResource) { + return pResource->__gpuresGetRefCount__(pResource); } +static inline void gpuresAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference) { + pResource->__gpuresAddAdditionalDependants__(pClient, pResource, pReference); +} + +NV_STATUS gpuresControl_IMPL(struct GpuResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +NV_STATUS gpuresMap_IMPL(struct GpuResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); + +NV_STATUS gpuresUnmap_IMPL(struct GpuResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); + +NvBool gpuresShareCallback_IMPL(struct GpuResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); + +NV_STATUS gpuresGetRegBaseOffsetAndSize_IMPL(struct GpuResource *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); + +NV_STATUS gpuresGetMapAddrSpace_IMPL(struct GpuResource *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); + +NV_STATUS gpuresInternalControlForward_IMPL(struct GpuResource *pGpuResource, NvU32 command, void *pParams, NvU32 size); + +NvHandle gpuresGetInternalObjectHandle_IMPL(struct GpuResource *pGpuResource); + NV_STATUS gpuresConstruct_IMPL(struct GpuResource *arg_pGpuResource, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_gpuresConstruct(arg_pGpuResource, arg_pCallContext, arg_pParams) gpuresConstruct_IMPL(arg_pGpuResource, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_gpu_user_shared_data_nvoc.c b/src/nvidia/generated/g_gpu_user_shared_data_nvoc.c index cee3c06440..6cd0df601e 100644 --- a/src/nvidia/generated/g_gpu_user_shared_data_nvoc.c +++ b/src/nvidia/generated/g_gpu_user_shared_data_nvoc.c @@ -93,133 +93,165 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_GpuUserSharedData = /*pExportInfo=*/ &__nvoc_export_info_GpuUserSharedData }; -static NvBool __nvoc_thunk_GpuUserSharedData_resCanCopy(struct RsResource *pData) { - return gpushareddataCanCopy((struct GpuUserSharedData *)(((unsigned char *)pData) - __nvoc_rtti_GpuUserSharedData_RsResource.offset)); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NV_STATUS __nvoc_thunk_Memory_gpushareddataCheckMemInterUnmap(struct GpuUserSharedData *pMemory, NvBool bSubdeviceHandleProvided) { - return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), bSubdeviceHandleProvided); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GpuUserSharedData[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) gpushareddataCtrlCmdRequestDataPoll_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0xde0001u, + /*paramSize=*/ sizeof(NV00DE_CTRL_REQUEST_DATA_POLL_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_GpuUserSharedData.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "gpushareddataCtrlCmdRequestDataPoll" +#endif + }, + +}; -static NvBool __nvoc_thunk_RmResource_gpushareddataShareCallback(struct GpuUserSharedData *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuUserSharedData_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// 1 down-thunk(s) defined to bridge methods in GpuUserSharedData from superclasses + +// gpushareddataCanCopy: virtual override (res) base (mem) +static NvBool __nvoc_down_thunk_GpuUserSharedData_resCanCopy(struct RsResource *pData) { + return gpushareddataCanCopy((struct GpuUserSharedData *)(((unsigned char *) pData) - __nvoc_rtti_GpuUserSharedData_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_gpushareddataMapTo(struct GpuUserSharedData *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset), pParams); + +// 25 up-thunk(s) defined to bridge methods in GpuUserSharedData to superclasses + +// gpushareddataIsDuplicate: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_gpushareddataIsDuplicate(struct GpuUserSharedData *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_Memory_gpushareddataGetMapAddrSpace(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return memGetMapAddrSpace((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pCallContext, mapFlags, pAddrSpace); +// gpushareddataGetMapAddrSpace: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_gpushareddataGetMapAddrSpace(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pCallContext, mapFlags, pAddrSpace); } -static NvBool __nvoc_thunk_Memory_gpushareddataIsExportAllowed(struct GpuUserSharedData *pMemory) { - return memIsExportAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset)); +// gpushareddataControl: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_gpushareddataControl(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pCallContext, pParams); } -static NvU32 __nvoc_thunk_RsResource_gpushareddataGetRefCount(struct GpuUserSharedData *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset)); +// gpushareddataMap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_gpushareddataMap(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pCallContext, pParams, pCpuMapping); } -static void __nvoc_thunk_RsResource_gpushareddataAddAdditionalDependants(struct RsClient *pClient, struct GpuUserSharedData *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset), pReference); +// gpushareddataUnmap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_gpushareddataUnmap(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RmResource_gpushareddataControl_Prologue(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuUserSharedData_RmResource.offset), pCallContext, pParams); +// gpushareddataGetMemInterMapParams: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_gpushareddataGetMemInterMapParams(struct GpuUserSharedData *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pParams); } -static NvBool __nvoc_thunk_Memory_gpushareddataIsGpuMapAllowed(struct GpuUserSharedData *pMemory, struct OBJGPU *pGpu) { - return memIsGpuMapAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pGpu); +// gpushareddataCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_gpushareddataCheckMemInterUnmap(struct GpuUserSharedData *pMemory, NvBool bSubdeviceHandleProvided) { + return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RsResource_gpushareddataUnmapFrom(struct GpuUserSharedData *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset), pParams); +// gpushareddataGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_gpushareddataGetMemoryMappingDescriptor(struct GpuUserSharedData *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), ppMemDesc); } -static void __nvoc_thunk_RmResource_gpushareddataControl_Epilogue(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuUserSharedData_RmResource.offset), pCallContext, pParams); +// gpushareddataCheckCopyPermissions: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_gpushareddataCheckCopyPermissions(struct GpuUserSharedData *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pDstGpu, pDstDevice); } -static NV_STATUS __nvoc_thunk_Memory_gpushareddataControl(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memControl((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pCallContext, pParams); +// gpushareddataIsReady: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_gpushareddataIsReady(struct GpuUserSharedData *pMemory, NvBool bCopyConstructorContext) { + return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), bCopyConstructorContext); } -static NV_STATUS __nvoc_thunk_Memory_gpushareddataUnmap(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pCallContext, pCpuMapping); +// gpushareddataIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_gpushareddataIsGpuMapAllowed(struct GpuUserSharedData *pMemory, struct OBJGPU *pGpu) { + return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pGpu); } -static NV_STATUS __nvoc_thunk_Memory_gpushareddataGetMemInterMapParams(struct GpuUserSharedData *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pParams); +// gpushareddataIsExportAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_gpushareddataIsExportAllowed(struct GpuUserSharedData *pMemory) { + return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset)); } -static NV_STATUS __nvoc_thunk_Memory_gpushareddataGetMemoryMappingDescriptor(struct GpuUserSharedData *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), ppMemDesc); +// gpushareddataAccessCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_gpushareddataAccessCallback(struct GpuUserSharedData *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RsResource_gpushareddataControlFilter(struct GpuUserSharedData *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset), pCallContext, pParams); +// gpushareddataShareCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_gpushareddataShareCallback(struct GpuUserSharedData *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RmResource_gpushareddataControlSerialization_Prologue(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuUserSharedData_RmResource.offset), pCallContext, pParams); +// gpushareddataControlSerialization_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_gpushareddataControlSerialization_Prologue(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_gpushareddataIsPartialUnmapSupported(struct GpuUserSharedData *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset)); +// gpushareddataControlSerialization_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_gpushareddataControlSerialization_Epilogue(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_gpushareddataIsReady(struct GpuUserSharedData *pMemory, NvBool bCopyConstructorContext) { - return memIsReady((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), bCopyConstructorContext); +// gpushareddataControl_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_gpushareddataControl_Prologue(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_gpushareddataCheckCopyPermissions(struct GpuUserSharedData *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return memCheckCopyPermissions((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pDstGpu, pDstDevice); +// gpushareddataControl_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_gpushareddataControl_Epilogue(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RmResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_gpushareddataPreDestruct(struct GpuUserSharedData *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset)); +// gpushareddataPreDestruct: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_gpushareddataPreDestruct(struct GpuUserSharedData *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_gpushareddataIsDuplicate(struct GpuUserSharedData *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), hMemory, pDuplicate); +// gpushareddataControlFilter: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_gpushareddataControlFilter(struct GpuUserSharedData *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RmResource_gpushareddataControlSerialization_Epilogue(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuUserSharedData_RmResource.offset), pCallContext, pParams); +// gpushareddataIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body +static NvBool __nvoc_up_thunk_RsResource_gpushareddataIsPartialUnmapSupported(struct GpuUserSharedData *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_gpushareddataMap(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pCallContext, pParams, pCpuMapping); +// gpushareddataMapTo: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_gpushareddataMapTo(struct GpuUserSharedData *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RmResource_gpushareddataAccessCallback(struct GpuUserSharedData *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GpuUserSharedData_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// gpushareddataUnmapFrom: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_gpushareddataUnmapFrom(struct GpuUserSharedData *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset), pParams); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// gpushareddataGetRefCount: virtual inherited (res) base (mem) +static NvU32 __nvoc_up_thunk_RsResource_gpushareddataGetRefCount(struct GpuUserSharedData *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset)); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GpuUserSharedData[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) gpushareddataCtrlCmdRequestDataPoll_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xde0001u, - /*paramSize=*/ sizeof(NV00DE_CTRL_REQUEST_DATA_POLL_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_GpuUserSharedData.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "gpushareddataCtrlCmdRequestDataPoll" -#endif - }, +// gpushareddataAddAdditionalDependants: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_gpushareddataAddAdditionalDependants(struct RsClient *pClient, struct GpuUserSharedData *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset), pReference); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_GpuUserSharedData = { @@ -257,69 +289,100 @@ NV_STATUS __nvoc_ctor_GpuUserSharedData(GpuUserSharedData *pThis, CALL_CONTEXT * return status; } +// Vtable initialization static void __nvoc_init_funcTable_GpuUserSharedData_1(GpuUserSharedData *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // gpushareddataCanCopy -- virtual override (res) base (mem) pThis->__gpushareddataCanCopy__ = &gpushareddataCanCopy_IMPL; + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_GpuUserSharedData_resCanCopy; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gpushareddataCtrlCmdRequestDataPoll -- exported (id=0xde0001) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gpushareddataCtrlCmdRequestDataPoll__ = &gpushareddataCtrlCmdRequestDataPoll_IMPL; #endif - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_GpuUserSharedData_resCanCopy; + // gpushareddataIsDuplicate -- virtual inherited (mem) base (mem) + pThis->__gpushareddataIsDuplicate__ = &__nvoc_up_thunk_Memory_gpushareddataIsDuplicate; - pThis->__gpushareddataCheckMemInterUnmap__ = &__nvoc_thunk_Memory_gpushareddataCheckMemInterUnmap; + // gpushareddataGetMapAddrSpace -- virtual inherited (mem) base (mem) + pThis->__gpushareddataGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_gpushareddataGetMapAddrSpace; - pThis->__gpushareddataShareCallback__ = &__nvoc_thunk_RmResource_gpushareddataShareCallback; + // gpushareddataControl -- virtual inherited (mem) base (mem) + pThis->__gpushareddataControl__ = &__nvoc_up_thunk_Memory_gpushareddataControl; - pThis->__gpushareddataMapTo__ = &__nvoc_thunk_RsResource_gpushareddataMapTo; + // gpushareddataMap -- virtual inherited (mem) base (mem) + pThis->__gpushareddataMap__ = &__nvoc_up_thunk_Memory_gpushareddataMap; - pThis->__gpushareddataGetMapAddrSpace__ = &__nvoc_thunk_Memory_gpushareddataGetMapAddrSpace; + // gpushareddataUnmap -- virtual inherited (mem) base (mem) + pThis->__gpushareddataUnmap__ = &__nvoc_up_thunk_Memory_gpushareddataUnmap; - pThis->__gpushareddataIsExportAllowed__ = &__nvoc_thunk_Memory_gpushareddataIsExportAllowed; + // gpushareddataGetMemInterMapParams -- virtual inherited (mem) base (mem) + pThis->__gpushareddataGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_gpushareddataGetMemInterMapParams; - pThis->__gpushareddataGetRefCount__ = &__nvoc_thunk_RsResource_gpushareddataGetRefCount; + // gpushareddataCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body + pThis->__gpushareddataCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_gpushareddataCheckMemInterUnmap; - pThis->__gpushareddataAddAdditionalDependants__ = &__nvoc_thunk_RsResource_gpushareddataAddAdditionalDependants; + // gpushareddataGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) + pThis->__gpushareddataGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_gpushareddataGetMemoryMappingDescriptor; - pThis->__gpushareddataControl_Prologue__ = &__nvoc_thunk_RmResource_gpushareddataControl_Prologue; + // gpushareddataCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body + pThis->__gpushareddataCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_gpushareddataCheckCopyPermissions; - pThis->__gpushareddataIsGpuMapAllowed__ = &__nvoc_thunk_Memory_gpushareddataIsGpuMapAllowed; + // gpushareddataIsReady -- virtual inherited (mem) base (mem) + pThis->__gpushareddataIsReady__ = &__nvoc_up_thunk_Memory_gpushareddataIsReady; - pThis->__gpushareddataUnmapFrom__ = &__nvoc_thunk_RsResource_gpushareddataUnmapFrom; + // gpushareddataIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__gpushareddataIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_gpushareddataIsGpuMapAllowed; - pThis->__gpushareddataControl_Epilogue__ = &__nvoc_thunk_RmResource_gpushareddataControl_Epilogue; + // gpushareddataIsExportAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__gpushareddataIsExportAllowed__ = &__nvoc_up_thunk_Memory_gpushareddataIsExportAllowed; - pThis->__gpushareddataControl__ = &__nvoc_thunk_Memory_gpushareddataControl; + // gpushareddataAccessCallback -- virtual inherited (rmres) base (mem) + pThis->__gpushareddataAccessCallback__ = &__nvoc_up_thunk_RmResource_gpushareddataAccessCallback; - pThis->__gpushareddataUnmap__ = &__nvoc_thunk_Memory_gpushareddataUnmap; + // gpushareddataShareCallback -- virtual inherited (rmres) base (mem) + pThis->__gpushareddataShareCallback__ = &__nvoc_up_thunk_RmResource_gpushareddataShareCallback; - pThis->__gpushareddataGetMemInterMapParams__ = &__nvoc_thunk_Memory_gpushareddataGetMemInterMapParams; + // gpushareddataControlSerialization_Prologue -- virtual inherited (rmres) base (mem) + pThis->__gpushareddataControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpushareddataControlSerialization_Prologue; - pThis->__gpushareddataGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_gpushareddataGetMemoryMappingDescriptor; + // gpushareddataControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__gpushareddataControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpushareddataControlSerialization_Epilogue; - pThis->__gpushareddataControlFilter__ = &__nvoc_thunk_RsResource_gpushareddataControlFilter; + // gpushareddataControl_Prologue -- virtual inherited (rmres) base (mem) + pThis->__gpushareddataControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpushareddataControl_Prologue; - pThis->__gpushareddataControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_gpushareddataControlSerialization_Prologue; + // gpushareddataControl_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__gpushareddataControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpushareddataControl_Epilogue; - pThis->__gpushareddataIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_gpushareddataIsPartialUnmapSupported; + // gpushareddataPreDestruct -- virtual inherited (res) base (mem) + pThis->__gpushareddataPreDestruct__ = &__nvoc_up_thunk_RsResource_gpushareddataPreDestruct; - pThis->__gpushareddataIsReady__ = &__nvoc_thunk_Memory_gpushareddataIsReady; + // gpushareddataControlFilter -- virtual inherited (res) base (mem) + pThis->__gpushareddataControlFilter__ = &__nvoc_up_thunk_RsResource_gpushareddataControlFilter; - pThis->__gpushareddataCheckCopyPermissions__ = &__nvoc_thunk_Memory_gpushareddataCheckCopyPermissions; + // gpushareddataIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body + pThis->__gpushareddataIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpushareddataIsPartialUnmapSupported; - pThis->__gpushareddataPreDestruct__ = &__nvoc_thunk_RsResource_gpushareddataPreDestruct; + // gpushareddataMapTo -- virtual inherited (res) base (mem) + pThis->__gpushareddataMapTo__ = &__nvoc_up_thunk_RsResource_gpushareddataMapTo; - pThis->__gpushareddataIsDuplicate__ = &__nvoc_thunk_Memory_gpushareddataIsDuplicate; + // gpushareddataUnmapFrom -- virtual inherited (res) base (mem) + pThis->__gpushareddataUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpushareddataUnmapFrom; - pThis->__gpushareddataControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_gpushareddataControlSerialization_Epilogue; + // gpushareddataGetRefCount -- virtual inherited (res) base (mem) + pThis->__gpushareddataGetRefCount__ = &__nvoc_up_thunk_RsResource_gpushareddataGetRefCount; - pThis->__gpushareddataMap__ = &__nvoc_thunk_Memory_gpushareddataMap; + // gpushareddataAddAdditionalDependants -- virtual inherited (res) base (mem) + pThis->__gpushareddataAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpushareddataAddAdditionalDependants; +} // End __nvoc_init_funcTable_GpuUserSharedData_1 with approximately 28 basic block(s). - pThis->__gpushareddataAccessCallback__ = &__nvoc_thunk_RmResource_gpushareddataAccessCallback; -} +// Initialize vtable(s) for 27 virtual method(s). void __nvoc_init_funcTable_GpuUserSharedData(GpuUserSharedData *pThis) { + + // Initialize vtable(s) with 27 per-object function pointer(s). __nvoc_init_funcTable_GpuUserSharedData_1(pThis); } diff --git a/src/nvidia/generated/g_gpu_user_shared_data_nvoc.h b/src/nvidia/generated/g_gpu_user_shared_data_nvoc.h index 34ffd8598a..f114759e28 100644 --- a/src/nvidia/generated/g_gpu_user_shared_data_nvoc.h +++ b/src/nvidia/generated/g_gpu_user_shared_data_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_GPU_USER_SHARED_DATA_NVOC_H_ #define _G_GPU_USER_SHARED_DATA_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_gpu_user_shared_data_nvoc.h" #ifndef GPU_USER_SHARED_DATA_H @@ -57,42 +65,53 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct GpuUserSharedData { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Memory *__nvoc_pbase_Memory; - struct GpuUserSharedData *__nvoc_pbase_GpuUserSharedData; - NvBool (*__gpushareddataCanCopy__)(struct GpuUserSharedData *); - NV_STATUS (*__gpushareddataCtrlCmdRequestDataPoll__)(struct GpuUserSharedData *, NV00DE_CTRL_REQUEST_DATA_POLL_PARAMS *); - NV_STATUS (*__gpushareddataCheckMemInterUnmap__)(struct GpuUserSharedData *, NvBool); - NvBool (*__gpushareddataShareCallback__)(struct GpuUserSharedData *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__gpushareddataMapTo__)(struct GpuUserSharedData *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__gpushareddataGetMapAddrSpace__)(struct GpuUserSharedData *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvBool (*__gpushareddataIsExportAllowed__)(struct GpuUserSharedData *); - NvU32 (*__gpushareddataGetRefCount__)(struct GpuUserSharedData *); - void (*__gpushareddataAddAdditionalDependants__)(struct RsClient *, struct GpuUserSharedData *, RsResourceRef *); - NV_STATUS (*__gpushareddataControl_Prologue__)(struct GpuUserSharedData *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__gpushareddataIsGpuMapAllowed__)(struct GpuUserSharedData *, struct OBJGPU *); - NV_STATUS (*__gpushareddataUnmapFrom__)(struct GpuUserSharedData *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__gpushareddataControl_Epilogue__)(struct GpuUserSharedData *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gpushareddataControl__)(struct GpuUserSharedData *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gpushareddataUnmap__)(struct GpuUserSharedData *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__gpushareddataGetMemInterMapParams__)(struct GpuUserSharedData *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__gpushareddataGetMemoryMappingDescriptor__)(struct GpuUserSharedData *, MEMORY_DESCRIPTOR **); - NV_STATUS (*__gpushareddataControlFilter__)(struct GpuUserSharedData *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gpushareddataControlSerialization_Prologue__)(struct GpuUserSharedData *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__gpushareddataIsPartialUnmapSupported__)(struct GpuUserSharedData *); - NV_STATUS (*__gpushareddataIsReady__)(struct GpuUserSharedData *, NvBool); - NV_STATUS (*__gpushareddataCheckCopyPermissions__)(struct GpuUserSharedData *, struct OBJGPU *, struct Device *); - void (*__gpushareddataPreDestruct__)(struct GpuUserSharedData *); - NV_STATUS (*__gpushareddataIsDuplicate__)(struct GpuUserSharedData *, NvHandle, NvBool *); - void (*__gpushareddataControlSerialization_Epilogue__)(struct GpuUserSharedData *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gpushareddataMap__)(struct GpuUserSharedData *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__gpushareddataAccessCallback__)(struct GpuUserSharedData *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct Memory *__nvoc_pbase_Memory; // mem super + struct GpuUserSharedData *__nvoc_pbase_GpuUserSharedData; // gpushareddata + + // Vtable with 27 per-object function pointers + NvBool (*__gpushareddataCanCopy__)(struct GpuUserSharedData * /*this*/); // virtual override (res) base (mem) + NV_STATUS (*__gpushareddataCtrlCmdRequestDataPoll__)(struct GpuUserSharedData * /*this*/, NV00DE_CTRL_REQUEST_DATA_POLL_PARAMS *); // exported (id=0xde0001) + NV_STATUS (*__gpushareddataIsDuplicate__)(struct GpuUserSharedData * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) + NV_STATUS (*__gpushareddataGetMapAddrSpace__)(struct GpuUserSharedData * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) + NV_STATUS (*__gpushareddataControl__)(struct GpuUserSharedData * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (mem) base (mem) + NV_STATUS (*__gpushareddataMap__)(struct GpuUserSharedData * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__gpushareddataUnmap__)(struct GpuUserSharedData * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__gpushareddataGetMemInterMapParams__)(struct GpuUserSharedData * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (mem) base (mem) + NV_STATUS (*__gpushareddataCheckMemInterUnmap__)(struct GpuUserSharedData * /*this*/, NvBool); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__gpushareddataGetMemoryMappingDescriptor__)(struct GpuUserSharedData * /*this*/, MEMORY_DESCRIPTOR **); // virtual inherited (mem) base (mem) + NV_STATUS (*__gpushareddataCheckCopyPermissions__)(struct GpuUserSharedData * /*this*/, struct OBJGPU *, struct Device *); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__gpushareddataIsReady__)(struct GpuUserSharedData * /*this*/, NvBool); // virtual inherited (mem) base (mem) + NvBool (*__gpushareddataIsGpuMapAllowed__)(struct GpuUserSharedData * /*this*/, struct OBJGPU *); // inline virtual inherited (mem) base (mem) body + NvBool (*__gpushareddataIsExportAllowed__)(struct GpuUserSharedData * /*this*/); // inline virtual inherited (mem) base (mem) body + NvBool (*__gpushareddataAccessCallback__)(struct GpuUserSharedData * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (mem) + NvBool (*__gpushareddataShareCallback__)(struct GpuUserSharedData * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__gpushareddataControlSerialization_Prologue__)(struct GpuUserSharedData * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__gpushareddataControlSerialization_Epilogue__)(struct GpuUserSharedData * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__gpushareddataControl_Prologue__)(struct GpuUserSharedData * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__gpushareddataControl_Epilogue__)(struct GpuUserSharedData * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__gpushareddataPreDestruct__)(struct GpuUserSharedData * /*this*/); // virtual inherited (res) base (mem) + NV_STATUS (*__gpushareddataControlFilter__)(struct GpuUserSharedData * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (mem) + NvBool (*__gpushareddataIsPartialUnmapSupported__)(struct GpuUserSharedData * /*this*/); // inline virtual inherited (res) base (mem) body + NV_STATUS (*__gpushareddataMapTo__)(struct GpuUserSharedData * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (mem) + NV_STATUS (*__gpushareddataUnmapFrom__)(struct GpuUserSharedData * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (mem) + NvU32 (*__gpushareddataGetRefCount__)(struct GpuUserSharedData * /*this*/); // virtual inherited (res) base (mem) + void (*__gpushareddataAddAdditionalDependants__)(struct RsClient *, struct GpuUserSharedData * /*this*/, RsResourceRef *); // virtual inherited (res) base (mem) + + // Data members NvU64 polledDataMask; }; @@ -105,6 +124,7 @@ typedef struct GpuUserSharedData GpuUserSharedData; #define __nvoc_class_id_GpuUserSharedData 0x5e7d1f #endif /* __nvoc_class_id_GpuUserSharedData */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_GpuUserSharedData; #define __staticCast_GpuUserSharedData(pThis) \ @@ -117,152 +137,182 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_GpuUserSharedData; ((GpuUserSharedData*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(GpuUserSharedData))) #endif //__nvoc_gpu_user_shared_data_h_disabled - NV_STATUS __nvoc_objCreateDynamic_GpuUserSharedData(GpuUserSharedData**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_GpuUserSharedData(GpuUserSharedData**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_GpuUserSharedData(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_GpuUserSharedData((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define gpushareddataCanCopy_FNPTR(pData) pData->__gpushareddataCanCopy__ #define gpushareddataCanCopy(pData) gpushareddataCanCopy_DISPATCH(pData) +#define gpushareddataCtrlCmdRequestDataPoll_FNPTR(pData) pData->__gpushareddataCtrlCmdRequestDataPoll__ #define gpushareddataCtrlCmdRequestDataPoll(pData, pParams) gpushareddataCtrlCmdRequestDataPoll_DISPATCH(pData, pParams) -#define gpushareddataCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) gpushareddataCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define gpushareddataShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) gpushareddataShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define gpushareddataMapTo(pResource, pParams) gpushareddataMapTo_DISPATCH(pResource, pParams) +#define gpushareddataIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define gpushareddataIsDuplicate(pMemory, hMemory, pDuplicate) gpushareddataIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) +#define gpushareddataGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ #define gpushareddataGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) gpushareddataGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define gpushareddataIsExportAllowed(pMemory) gpushareddataIsExportAllowed_DISPATCH(pMemory) -#define gpushareddataGetRefCount(pResource) gpushareddataGetRefCount_DISPATCH(pResource) -#define gpushareddataAddAdditionalDependants(pClient, pResource, pReference) gpushareddataAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define gpushareddataControl_Prologue(pResource, pCallContext, pParams) gpushareddataControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define gpushareddataIsGpuMapAllowed(pMemory, pGpu) gpushareddataIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define gpushareddataUnmapFrom(pResource, pParams) gpushareddataUnmapFrom_DISPATCH(pResource, pParams) -#define gpushareddataControl_Epilogue(pResource, pCallContext, pParams) gpushareddataControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define gpushareddataControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ #define gpushareddataControl(pMemory, pCallContext, pParams) gpushareddataControl_DISPATCH(pMemory, pCallContext, pParams) +#define gpushareddataMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define gpushareddataMap(pMemory, pCallContext, pParams, pCpuMapping) gpushareddataMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define gpushareddataUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ #define gpushareddataUnmap(pMemory, pCallContext, pCpuMapping) gpushareddataUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) +#define gpushareddataGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ #define gpushareddataGetMemInterMapParams(pMemory, pParams) gpushareddataGetMemInterMapParams_DISPATCH(pMemory, pParams) +#define gpushareddataCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define gpushareddataCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) gpushareddataCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) +#define gpushareddataGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ #define gpushareddataGetMemoryMappingDescriptor(pMemory, ppMemDesc) gpushareddataGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define gpushareddataControlFilter(pResource, pCallContext, pParams) gpushareddataControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define gpushareddataControlSerialization_Prologue(pResource, pCallContext, pParams) gpushareddataControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define gpushareddataIsPartialUnmapSupported(pResource) gpushareddataIsPartialUnmapSupported_DISPATCH(pResource) -#define gpushareddataIsReady(pMemory, bCopyConstructorContext) gpushareddataIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define gpushareddataCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ #define gpushareddataCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) gpushareddataCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define gpushareddataPreDestruct(pResource) gpushareddataPreDestruct_DISPATCH(pResource) -#define gpushareddataIsDuplicate(pMemory, hMemory, pDuplicate) gpushareddataIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define gpushareddataControlSerialization_Epilogue(pResource, pCallContext, pParams) gpushareddataControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define gpushareddataMap(pMemory, pCallContext, pParams, pCpuMapping) gpushareddataMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define gpushareddataIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define gpushareddataIsReady(pMemory, bCopyConstructorContext) gpushareddataIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define gpushareddataIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define gpushareddataIsGpuMapAllowed(pMemory, pGpu) gpushareddataIsGpuMapAllowed_DISPATCH(pMemory, pGpu) +#define gpushareddataIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define gpushareddataIsExportAllowed(pMemory) gpushareddataIsExportAllowed_DISPATCH(pMemory) +#define gpushareddataAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ #define gpushareddataAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) gpushareddataAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool gpushareddataCanCopy_IMPL(struct GpuUserSharedData *pData); +#define gpushareddataShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define gpushareddataShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) gpushareddataShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define gpushareddataControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define gpushareddataControlSerialization_Prologue(pResource, pCallContext, pParams) gpushareddataControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define gpushareddataControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define gpushareddataControlSerialization_Epilogue(pResource, pCallContext, pParams) gpushareddataControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define gpushareddataControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define gpushareddataControl_Prologue(pResource, pCallContext, pParams) gpushareddataControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define gpushareddataControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define gpushareddataControl_Epilogue(pResource, pCallContext, pParams) gpushareddataControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define gpushareddataPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define gpushareddataPreDestruct(pResource) gpushareddataPreDestruct_DISPATCH(pResource) +#define gpushareddataControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define gpushareddataControlFilter(pResource, pCallContext, pParams) gpushareddataControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define gpushareddataIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define gpushareddataIsPartialUnmapSupported(pResource) gpushareddataIsPartialUnmapSupported_DISPATCH(pResource) +#define gpushareddataMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define gpushareddataMapTo(pResource, pParams) gpushareddataMapTo_DISPATCH(pResource, pParams) +#define gpushareddataUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define gpushareddataUnmapFrom(pResource, pParams) gpushareddataUnmapFrom_DISPATCH(pResource, pParams) +#define gpushareddataGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define gpushareddataGetRefCount(pResource) gpushareddataGetRefCount_DISPATCH(pResource) +#define gpushareddataAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define gpushareddataAddAdditionalDependants(pClient, pResource, pReference) gpushareddataAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NvBool gpushareddataCanCopy_DISPATCH(struct GpuUserSharedData *pData) { return pData->__gpushareddataCanCopy__(pData); } -NV_STATUS gpushareddataCtrlCmdRequestDataPoll_IMPL(struct GpuUserSharedData *pData, NV00DE_CTRL_REQUEST_DATA_POLL_PARAMS *pParams); - static inline NV_STATUS gpushareddataCtrlCmdRequestDataPoll_DISPATCH(struct GpuUserSharedData *pData, NV00DE_CTRL_REQUEST_DATA_POLL_PARAMS *pParams) { return pData->__gpushareddataCtrlCmdRequestDataPoll__(pData, pParams); } -static inline NV_STATUS gpushareddataCheckMemInterUnmap_DISPATCH(struct GpuUserSharedData *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__gpushareddataCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); -} - -static inline NvBool gpushareddataShareCallback_DISPATCH(struct GpuUserSharedData *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__gpushareddataShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS gpushareddataMapTo_DISPATCH(struct GpuUserSharedData *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__gpushareddataMapTo__(pResource, pParams); +static inline NV_STATUS gpushareddataIsDuplicate_DISPATCH(struct GpuUserSharedData *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return pMemory->__gpushareddataIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS gpushareddataGetMapAddrSpace_DISPATCH(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pMemory->__gpushareddataGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } -static inline NvBool gpushareddataIsExportAllowed_DISPATCH(struct GpuUserSharedData *pMemory) { - return pMemory->__gpushareddataIsExportAllowed__(pMemory); +static inline NV_STATUS gpushareddataControl_DISPATCH(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pMemory->__gpushareddataControl__(pMemory, pCallContext, pParams); } -static inline NvU32 gpushareddataGetRefCount_DISPATCH(struct GpuUserSharedData *pResource) { - return pResource->__gpushareddataGetRefCount__(pResource); +static inline NV_STATUS gpushareddataMap_DISPATCH(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pMemory->__gpushareddataMap__(pMemory, pCallContext, pParams, pCpuMapping); } -static inline void gpushareddataAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct GpuUserSharedData *pResource, RsResourceRef *pReference) { - pResource->__gpushareddataAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS gpushareddataUnmap_DISPATCH(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pMemory->__gpushareddataUnmap__(pMemory, pCallContext, pCpuMapping); } -static inline NV_STATUS gpushareddataControl_Prologue_DISPATCH(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gpushareddataControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS gpushareddataGetMemInterMapParams_DISPATCH(struct GpuUserSharedData *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pMemory->__gpushareddataGetMemInterMapParams__(pMemory, pParams); } -static inline NvBool gpushareddataIsGpuMapAllowed_DISPATCH(struct GpuUserSharedData *pMemory, struct OBJGPU *pGpu) { - return pMemory->__gpushareddataIsGpuMapAllowed__(pMemory, pGpu); +static inline NV_STATUS gpushareddataCheckMemInterUnmap_DISPATCH(struct GpuUserSharedData *pMemory, NvBool bSubdeviceHandleProvided) { + return pMemory->__gpushareddataCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } -static inline NV_STATUS gpushareddataUnmapFrom_DISPATCH(struct GpuUserSharedData *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__gpushareddataUnmapFrom__(pResource, pParams); +static inline NV_STATUS gpushareddataGetMemoryMappingDescriptor_DISPATCH(struct GpuUserSharedData *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return pMemory->__gpushareddataGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } -static inline void gpushareddataControl_Epilogue_DISPATCH(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__gpushareddataControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS gpushareddataCheckCopyPermissions_DISPATCH(struct GpuUserSharedData *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return pMemory->__gpushareddataCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } -static inline NV_STATUS gpushareddataControl_DISPATCH(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__gpushareddataControl__(pMemory, pCallContext, pParams); +static inline NV_STATUS gpushareddataIsReady_DISPATCH(struct GpuUserSharedData *pMemory, NvBool bCopyConstructorContext) { + return pMemory->__gpushareddataIsReady__(pMemory, bCopyConstructorContext); } -static inline NV_STATUS gpushareddataUnmap_DISPATCH(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__gpushareddataUnmap__(pMemory, pCallContext, pCpuMapping); +static inline NvBool gpushareddataIsGpuMapAllowed_DISPATCH(struct GpuUserSharedData *pMemory, struct OBJGPU *pGpu) { + return pMemory->__gpushareddataIsGpuMapAllowed__(pMemory, pGpu); } -static inline NV_STATUS gpushareddataGetMemInterMapParams_DISPATCH(struct GpuUserSharedData *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__gpushareddataGetMemInterMapParams__(pMemory, pParams); +static inline NvBool gpushareddataIsExportAllowed_DISPATCH(struct GpuUserSharedData *pMemory) { + return pMemory->__gpushareddataIsExportAllowed__(pMemory); } -static inline NV_STATUS gpushareddataGetMemoryMappingDescriptor_DISPATCH(struct GpuUserSharedData *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__gpushareddataGetMemoryMappingDescriptor__(pMemory, ppMemDesc); +static inline NvBool gpushareddataAccessCallback_DISPATCH(struct GpuUserSharedData *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__gpushareddataAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS gpushareddataControlFilter_DISPATCH(struct GpuUserSharedData *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gpushareddataControlFilter__(pResource, pCallContext, pParams); +static inline NvBool gpushareddataShareCallback_DISPATCH(struct GpuUserSharedData *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__gpushareddataShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS gpushareddataControlSerialization_Prologue_DISPATCH(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__gpushareddataControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool gpushareddataIsPartialUnmapSupported_DISPATCH(struct GpuUserSharedData *pResource) { - return pResource->__gpushareddataIsPartialUnmapSupported__(pResource); +static inline void gpushareddataControlSerialization_Epilogue_DISPATCH(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__gpushareddataControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS gpushareddataIsReady_DISPATCH(struct GpuUserSharedData *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__gpushareddataIsReady__(pMemory, bCopyConstructorContext); +static inline NV_STATUS gpushareddataControl_Prologue_DISPATCH(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__gpushareddataControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS gpushareddataCheckCopyPermissions_DISPATCH(struct GpuUserSharedData *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__gpushareddataCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); +static inline void gpushareddataControl_Epilogue_DISPATCH(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__gpushareddataControl_Epilogue__(pResource, pCallContext, pParams); } static inline void gpushareddataPreDestruct_DISPATCH(struct GpuUserSharedData *pResource) { pResource->__gpushareddataPreDestruct__(pResource); } -static inline NV_STATUS gpushareddataIsDuplicate_DISPATCH(struct GpuUserSharedData *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__gpushareddataIsDuplicate__(pMemory, hMemory, pDuplicate); +static inline NV_STATUS gpushareddataControlFilter_DISPATCH(struct GpuUserSharedData *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__gpushareddataControlFilter__(pResource, pCallContext, pParams); } -static inline void gpushareddataControlSerialization_Epilogue_DISPATCH(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__gpushareddataControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool gpushareddataIsPartialUnmapSupported_DISPATCH(struct GpuUserSharedData *pResource) { + return pResource->__gpushareddataIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS gpushareddataMap_DISPATCH(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__gpushareddataMap__(pMemory, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS gpushareddataMapTo_DISPATCH(struct GpuUserSharedData *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__gpushareddataMapTo__(pResource, pParams); } -static inline NvBool gpushareddataAccessCallback_DISPATCH(struct GpuUserSharedData *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__gpushareddataAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS gpushareddataUnmapFrom_DISPATCH(struct GpuUserSharedData *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__gpushareddataUnmapFrom__(pResource, pParams); +} + +static inline NvU32 gpushareddataGetRefCount_DISPATCH(struct GpuUserSharedData *pResource) { + return pResource->__gpushareddataGetRefCount__(pResource); +} + +static inline void gpushareddataAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct GpuUserSharedData *pResource, RsResourceRef *pReference) { + pResource->__gpushareddataAddAdditionalDependants__(pClient, pResource, pReference); } +NvBool gpushareddataCanCopy_IMPL(struct GpuUserSharedData *pData); + +NV_STATUS gpushareddataCtrlCmdRequestDataPoll_IMPL(struct GpuUserSharedData *pData, NV00DE_CTRL_REQUEST_DATA_POLL_PARAMS *pParams); + NV_STATUS gpushareddataConstruct_IMPL(struct GpuUserSharedData *arg_pData, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_gpushareddataConstruct(arg_pData, arg_pCallContext, arg_pParams) gpushareddataConstruct_IMPL(arg_pData, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_gpu_vaspace_nvoc.c b/src/nvidia/generated/g_gpu_vaspace_nvoc.c index b788e30382..72807c9baf 100644 --- a/src/nvidia/generated/g_gpu_vaspace_nvoc.c +++ b/src/nvidia/generated/g_gpu_vaspace_nvoc.c @@ -66,122 +66,157 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGVASPACE = /*pExportInfo=*/ &__nvoc_export_info_OBJGVASPACE }; -static NV_STATUS __nvoc_thunk_OBJGVASPACE_vaspaceConstruct_(struct OBJVASPACE *pGVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags) { - return gvaspaceConstruct_((struct OBJGVASPACE *)(((unsigned char *)pGVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); +// 27 down-thunk(s) defined to bridge methods in OBJGVASPACE from superclasses + +// gvaspaceConstruct_: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceConstruct_(struct OBJVASPACE *pGVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags) { + return gvaspaceConstruct_((struct OBJGVASPACE *)(((unsigned char *) pGVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); } -static NV_STATUS __nvoc_thunk_OBJGVASPACE_vaspaceReserveMempool(struct OBJVASPACE *pGVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { - return gvaspaceReserveMempool((struct OBJGVASPACE *)(((unsigned char *)pGVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, pDevice, size, pageSizeLockMask, flags); +// gvaspaceReserveMempool: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceReserveMempool(struct OBJVASPACE *pGVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { + return gvaspaceReserveMempool((struct OBJGVASPACE *)(((unsigned char *) pGVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, pDevice, size, pageSizeLockMask, flags); } -static NV_STATUS __nvoc_thunk_OBJGVASPACE_vaspaceAlloc(struct OBJVASPACE *pVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSizeLockMask, VAS_ALLOC_FLAGS flags, NvU64 *pAddr) { - return gvaspaceAlloc((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr); +// gvaspaceAlloc: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceAlloc(struct OBJVASPACE *pVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSizeLockMask, VAS_ALLOC_FLAGS flags, NvU64 *pAddr) { + return gvaspaceAlloc((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr); } -static NV_STATUS __nvoc_thunk_OBJGVASPACE_vaspaceFree(struct OBJVASPACE *pVAS, NvU64 vAddr) { - return gvaspaceFree((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), vAddr); +// gvaspaceFree: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceFree(struct OBJVASPACE *pVAS, NvU64 vAddr) { + return gvaspaceFree((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), vAddr); } -static NV_STATUS __nvoc_thunk_OBJGVASPACE_vaspaceApplyDefaultAlignment(struct OBJVASPACE *pVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask) { - return gvaspaceApplyDefaultAlignment((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pAllocInfo, pAlign, pSize, pPageSizeLockMask); +// gvaspaceApplyDefaultAlignment: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceApplyDefaultAlignment(struct OBJVASPACE *pVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask) { + return gvaspaceApplyDefaultAlignment((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pAllocInfo, pAlign, pSize, pPageSizeLockMask); } -static NV_STATUS __nvoc_thunk_OBJGVASPACE_vaspaceIncAllocRefCnt(struct OBJVASPACE *pVAS, NvU64 vAddr) { - return gvaspaceIncAllocRefCnt((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), vAddr); +// gvaspaceIncAllocRefCnt: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceIncAllocRefCnt(struct OBJVASPACE *pVAS, NvU64 vAddr) { + return gvaspaceIncAllocRefCnt((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), vAddr); } -static NV_STATUS __nvoc_thunk_OBJGVASPACE_vaspaceMap(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { - return gvaspaceMap((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, vaLo, vaHi, pTarget, flags); +// gvaspaceMap: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceMap(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { + return gvaspaceMap((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, vaLo, vaHi, pTarget, flags); } -static void __nvoc_thunk_OBJGVASPACE_vaspaceUnmap(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { - gvaspaceUnmap((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, vaLo, vaHi); +// gvaspaceUnmap: virtual override (vaspace) base (vaspace) +static void __nvoc_down_thunk_OBJGVASPACE_vaspaceUnmap(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { + gvaspaceUnmap((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, vaLo, vaHi); } -static struct OBJEHEAP *__nvoc_thunk_OBJGVASPACE_vaspaceGetHeap(struct OBJVASPACE *pVAS) { - return gvaspaceGetHeap((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); +// gvaspaceGetHeap: virtual override (vaspace) base (vaspace) +static struct OBJEHEAP * __nvoc_down_thunk_OBJGVASPACE_vaspaceGetHeap(struct OBJVASPACE *pVAS) { + return gvaspaceGetHeap((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); } -static NvU64 __nvoc_thunk_OBJGVASPACE_vaspaceGetMapPageSize(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, struct EMEMBLOCK *pMemBlock) { - return gvaspaceGetMapPageSize((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, pMemBlock); +// gvaspaceGetMapPageSize: virtual override (vaspace) base (vaspace) +static NvU64 __nvoc_down_thunk_OBJGVASPACE_vaspaceGetMapPageSize(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, struct EMEMBLOCK *pMemBlock) { + return gvaspaceGetMapPageSize((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, pMemBlock); } -static NvU64 __nvoc_thunk_OBJGVASPACE_vaspaceGetBigPageSize(struct OBJVASPACE *pVAS) { - return gvaspaceGetBigPageSize((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); +// gvaspaceGetBigPageSize: virtual override (vaspace) base (vaspace) +static NvU64 __nvoc_down_thunk_OBJGVASPACE_vaspaceGetBigPageSize(struct OBJVASPACE *pVAS) { + return gvaspaceGetBigPageSize((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); } -static NvU32 __nvoc_thunk_OBJGVASPACE_vaspaceGetFlags(struct OBJVASPACE *pVAS) { - return gvaspaceGetFlags((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); +// gvaspaceGetFlags: virtual override (vaspace) base (vaspace) +static NvU32 __nvoc_down_thunk_OBJGVASPACE_vaspaceGetFlags(struct OBJVASPACE *pVAS) { + return gvaspaceGetFlags((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); } -static NvBool __nvoc_thunk_OBJGVASPACE_vaspaceIsMirrored(struct OBJVASPACE *pVAS) { - return gvaspaceIsMirrored((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); +// gvaspaceIsMirrored: virtual override (vaspace) base (vaspace) +static NvBool __nvoc_down_thunk_OBJGVASPACE_vaspaceIsMirrored(struct OBJVASPACE *pVAS) { + return gvaspaceIsMirrored((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); } -static NvBool __nvoc_thunk_OBJGVASPACE_vaspaceIsFaultCapable(struct OBJVASPACE *pVAS) { - return gvaspaceIsFaultCapable((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); +// gvaspaceIsFaultCapable: virtual override (vaspace) base (vaspace) +static NvBool __nvoc_down_thunk_OBJGVASPACE_vaspaceIsFaultCapable(struct OBJVASPACE *pVAS) { + return gvaspaceIsFaultCapable((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); } -static NvBool __nvoc_thunk_OBJGVASPACE_vaspaceIsExternallyOwned(struct OBJVASPACE *pVAS) { - return gvaspaceIsExternallyOwned((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); +// gvaspaceIsExternallyOwned: virtual override (vaspace) base (vaspace) +static NvBool __nvoc_down_thunk_OBJGVASPACE_vaspaceIsExternallyOwned(struct OBJVASPACE *pVAS) { + return gvaspaceIsExternallyOwned((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); } -static NvBool __nvoc_thunk_OBJGVASPACE_vaspaceIsAtsEnabled(struct OBJVASPACE *pVAS) { - return gvaspaceIsAtsEnabled((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); +// gvaspaceIsAtsEnabled: virtual override (vaspace) base (vaspace) +static NvBool __nvoc_down_thunk_OBJGVASPACE_vaspaceIsAtsEnabled(struct OBJVASPACE *pVAS) { + return gvaspaceIsAtsEnabled((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); } -static NV_STATUS __nvoc_thunk_OBJGVASPACE_vaspaceGetPasid(struct OBJVASPACE *pVAS, NvU32 *pPasid) { - return gvaspaceGetPasid((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pPasid); +// gvaspaceGetPasid: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceGetPasid(struct OBJVASPACE *pVAS, NvU32 *pPasid) { + return gvaspaceGetPasid((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pPasid); } -static PMEMORY_DESCRIPTOR __nvoc_thunk_OBJGVASPACE_vaspaceGetPageDirBase(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { - return gvaspaceGetPageDirBase((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu); +// gvaspaceGetPageDirBase: virtual override (vaspace) base (vaspace) +static PMEMORY_DESCRIPTOR __nvoc_down_thunk_OBJGVASPACE_vaspaceGetPageDirBase(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { + return gvaspaceGetPageDirBase((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu); } -static PMEMORY_DESCRIPTOR __nvoc_thunk_OBJGVASPACE_vaspaceGetKernelPageDirBase(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { - return gvaspaceGetKernelPageDirBase((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu); +// gvaspaceGetKernelPageDirBase: virtual override (vaspace) base (vaspace) +static PMEMORY_DESCRIPTOR __nvoc_down_thunk_OBJGVASPACE_vaspaceGetKernelPageDirBase(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { + return gvaspaceGetKernelPageDirBase((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu); } -static NV_STATUS __nvoc_thunk_OBJGVASPACE_vaspacePinRootPageDir(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { - return gvaspacePinRootPageDir((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu); +// gvaspacePinRootPageDir: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspacePinRootPageDir(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { + return gvaspacePinRootPageDir((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu); } -static void __nvoc_thunk_OBJGVASPACE_vaspaceUnpinRootPageDir(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { - gvaspaceUnpinRootPageDir((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu); +// gvaspaceUnpinRootPageDir: virtual override (vaspace) base (vaspace) +static void __nvoc_down_thunk_OBJGVASPACE_vaspaceUnpinRootPageDir(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { + gvaspaceUnpinRootPageDir((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu); } -static void __nvoc_thunk_OBJGVASPACE_vaspaceInvalidateTlb(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { - gvaspaceInvalidateTlb((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, type); +// gvaspaceInvalidateTlb: virtual override (vaspace) base (vaspace) +static void __nvoc_down_thunk_OBJGVASPACE_vaspaceInvalidateTlb(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { + gvaspaceInvalidateTlb((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, type); } -static NV_STATUS __nvoc_thunk_OBJGVASPACE_vaspaceGetVasInfo(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) { - return gvaspaceGetVasInfo((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pParams); +// gvaspaceGetVasInfo: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceGetVasInfo(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) { + return gvaspaceGetVasInfo((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pParams); } -static NV_STATUS __nvoc_thunk_OBJGVASPACE_vaspaceGetPageTableInfo(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { - return gvaspaceGetPageTableInfo((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pParams); +// gvaspaceGetPageTableInfo: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceGetPageTableInfo(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { + return gvaspaceGetPageTableInfo((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pParams); } -static NV_STATUS __nvoc_thunk_OBJGVASPACE_vaspaceGetPteInfo(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { - return gvaspaceGetPteInfo((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, pParams, pPhysAddr); +// gvaspaceGetPteInfo: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceGetPteInfo(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { + return gvaspaceGetPteInfo((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, pParams, pPhysAddr); } -static NV_STATUS __nvoc_thunk_OBJGVASPACE_vaspaceSetPteInfo(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { - return gvaspaceSetPteInfo((struct OBJGVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, pParams); +// gvaspaceSetPteInfo: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceSetPteInfo(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { + return gvaspaceSetPteInfo((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, pParams); } -static NV_STATUS __nvoc_thunk_OBJGVASPACE_vaspaceFreeV2(struct OBJVASPACE *pGVAS, NvU64 vAddr, NvU64 *pSize) { - return gvaspaceFreeV2((struct OBJGVASPACE *)(((unsigned char *)pGVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), vAddr, pSize); +// gvaspaceFreeV2: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceFreeV2(struct OBJVASPACE *pGVAS, NvU64 vAddr, NvU64 *pSize) { + return gvaspaceFreeV2((struct OBJGVASPACE *)(((unsigned char *) pGVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), vAddr, pSize); } -static NvU64 __nvoc_thunk_OBJVASPACE_gvaspaceGetVaLimit(struct OBJGVASPACE *pVAS) { - return vaspaceGetVaLimit((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); + +// 2 up-thunk(s) defined to bridge methods in OBJGVASPACE to superclasses + +// gvaspaceGetVaStart: virtual inherited (vaspace) base (vaspace) +static NvU64 __nvoc_up_thunk_OBJVASPACE_gvaspaceGetVaStart(struct OBJGVASPACE *pVAS) { + return vaspaceGetVaStart((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); } -static NvU64 __nvoc_thunk_OBJVASPACE_gvaspaceGetVaStart(struct OBJGVASPACE *pVAS) { - return vaspaceGetVaStart((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); +// gvaspaceGetVaLimit: virtual inherited (vaspace) base (vaspace) +static NvU64 __nvoc_up_thunk_OBJVASPACE_gvaspaceGetVaLimit(struct OBJGVASPACE *pVAS) { + return vaspaceGetVaLimit((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJGVASPACE = { /*numEntries=*/ 0, @@ -213,123 +248,130 @@ NV_STATUS __nvoc_ctor_OBJGVASPACE(OBJGVASPACE *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJGVASPACE_1(OBJGVASPACE *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // gvaspaceConstruct_ -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceConstruct___ = &gvaspaceConstruct__IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceConstruct___ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceConstruct_; + // gvaspaceReserveMempool -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceReserveMempool__ = &gvaspaceReserveMempool_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceReserveMempool__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceReserveMempool; + // gvaspaceAlloc -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceAlloc__ = &gvaspaceAlloc_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceAlloc__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceAlloc; + // gvaspaceFree -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceFree__ = &gvaspaceFree_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceFree__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceFree; + // gvaspaceApplyDefaultAlignment -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceApplyDefaultAlignment__ = &gvaspaceApplyDefaultAlignment_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceApplyDefaultAlignment__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceApplyDefaultAlignment; + // gvaspaceIncAllocRefCnt -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceIncAllocRefCnt__ = &gvaspaceIncAllocRefCnt_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceIncAllocRefCnt__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceIncAllocRefCnt; + // gvaspaceMap -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceMap__ = &gvaspaceMap_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceMap__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceMap; + // gvaspaceUnmap -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceUnmap__ = &gvaspaceUnmap_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceUnmap__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceUnmap; + // gvaspaceGetHeap -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceGetHeap__ = &gvaspaceGetHeap_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceGetHeap__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetHeap; + // gvaspaceGetMapPageSize -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceGetMapPageSize__ = &gvaspaceGetMapPageSize_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceGetMapPageSize__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetMapPageSize; + // gvaspaceGetBigPageSize -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceGetBigPageSize__ = &gvaspaceGetBigPageSize_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceGetBigPageSize__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetBigPageSize; + // gvaspaceGetFlags -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceGetFlags__ = &gvaspaceGetFlags_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceGetFlags__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetFlags; + // gvaspaceIsMirrored -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceIsMirrored__ = &gvaspaceIsMirrored_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceIsMirrored__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceIsMirrored; + // gvaspaceIsFaultCapable -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceIsFaultCapable__ = &gvaspaceIsFaultCapable_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceIsFaultCapable__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceIsFaultCapable; + // gvaspaceIsExternallyOwned -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceIsExternallyOwned__ = &gvaspaceIsExternallyOwned_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceIsExternallyOwned__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceIsExternallyOwned; + // gvaspaceIsAtsEnabled -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceIsAtsEnabled__ = &gvaspaceIsAtsEnabled_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceIsAtsEnabled__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceIsAtsEnabled; + // gvaspaceGetPasid -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceGetPasid__ = &gvaspaceGetPasid_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceGetPasid__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetPasid; + // gvaspaceGetPageDirBase -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceGetPageDirBase__ = &gvaspaceGetPageDirBase_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceGetPageDirBase__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetPageDirBase; + // gvaspaceGetKernelPageDirBase -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceGetKernelPageDirBase__ = &gvaspaceGetKernelPageDirBase_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceGetKernelPageDirBase__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetKernelPageDirBase; + // gvaspacePinRootPageDir -- virtual override (vaspace) base (vaspace) pThis->__gvaspacePinRootPageDir__ = &gvaspacePinRootPageDir_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspacePinRootPageDir__ = &__nvoc_down_thunk_OBJGVASPACE_vaspacePinRootPageDir; + // gvaspaceUnpinRootPageDir -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceUnpinRootPageDir__ = &gvaspaceUnpinRootPageDir_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceUnpinRootPageDir__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceUnpinRootPageDir; + // gvaspaceInvalidateTlb -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceInvalidateTlb__ = &gvaspaceInvalidateTlb_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceInvalidateTlb__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceInvalidateTlb; + // gvaspaceGetVasInfo -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceGetVasInfo__ = &gvaspaceGetVasInfo_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceGetVasInfo__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetVasInfo; + // gvaspaceGetPageTableInfo -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceGetPageTableInfo__ = &gvaspaceGetPageTableInfo_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceGetPageTableInfo__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetPageTableInfo; + // gvaspaceGetPteInfo -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceGetPteInfo__ = &gvaspaceGetPteInfo_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceGetPteInfo__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetPteInfo; + // gvaspaceSetPteInfo -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceSetPteInfo__ = &gvaspaceSetPteInfo_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceSetPteInfo__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceSetPteInfo; + // gvaspaceFreeV2 -- virtual override (vaspace) base (vaspace) pThis->__gvaspaceFreeV2__ = &gvaspaceFreeV2_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceFreeV2__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceFreeV2; - pThis->__nvoc_base_OBJVASPACE.__vaspaceConstruct___ = &__nvoc_thunk_OBJGVASPACE_vaspaceConstruct_; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceReserveMempool__ = &__nvoc_thunk_OBJGVASPACE_vaspaceReserveMempool; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceAlloc__ = &__nvoc_thunk_OBJGVASPACE_vaspaceAlloc; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceFree__ = &__nvoc_thunk_OBJGVASPACE_vaspaceFree; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceApplyDefaultAlignment__ = &__nvoc_thunk_OBJGVASPACE_vaspaceApplyDefaultAlignment; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceIncAllocRefCnt__ = &__nvoc_thunk_OBJGVASPACE_vaspaceIncAllocRefCnt; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceMap__ = &__nvoc_thunk_OBJGVASPACE_vaspaceMap; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceUnmap__ = &__nvoc_thunk_OBJGVASPACE_vaspaceUnmap; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetHeap__ = &__nvoc_thunk_OBJGVASPACE_vaspaceGetHeap; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetMapPageSize__ = &__nvoc_thunk_OBJGVASPACE_vaspaceGetMapPageSize; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetBigPageSize__ = &__nvoc_thunk_OBJGVASPACE_vaspaceGetBigPageSize; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetFlags__ = &__nvoc_thunk_OBJGVASPACE_vaspaceGetFlags; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceIsMirrored__ = &__nvoc_thunk_OBJGVASPACE_vaspaceIsMirrored; + // gvaspaceGetVaStart -- virtual inherited (vaspace) base (vaspace) + pThis->__gvaspaceGetVaStart__ = &__nvoc_up_thunk_OBJVASPACE_gvaspaceGetVaStart; - pThis->__nvoc_base_OBJVASPACE.__vaspaceIsFaultCapable__ = &__nvoc_thunk_OBJGVASPACE_vaspaceIsFaultCapable; + // gvaspaceGetVaLimit -- virtual inherited (vaspace) base (vaspace) + pThis->__gvaspaceGetVaLimit__ = &__nvoc_up_thunk_OBJVASPACE_gvaspaceGetVaLimit; +} // End __nvoc_init_funcTable_OBJGVASPACE_1 with approximately 56 basic block(s). - pThis->__nvoc_base_OBJVASPACE.__vaspaceIsExternallyOwned__ = &__nvoc_thunk_OBJGVASPACE_vaspaceIsExternallyOwned; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceIsAtsEnabled__ = &__nvoc_thunk_OBJGVASPACE_vaspaceIsAtsEnabled; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetPasid__ = &__nvoc_thunk_OBJGVASPACE_vaspaceGetPasid; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetPageDirBase__ = &__nvoc_thunk_OBJGVASPACE_vaspaceGetPageDirBase; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetKernelPageDirBase__ = &__nvoc_thunk_OBJGVASPACE_vaspaceGetKernelPageDirBase; - - pThis->__nvoc_base_OBJVASPACE.__vaspacePinRootPageDir__ = &__nvoc_thunk_OBJGVASPACE_vaspacePinRootPageDir; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceUnpinRootPageDir__ = &__nvoc_thunk_OBJGVASPACE_vaspaceUnpinRootPageDir; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceInvalidateTlb__ = &__nvoc_thunk_OBJGVASPACE_vaspaceInvalidateTlb; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetVasInfo__ = &__nvoc_thunk_OBJGVASPACE_vaspaceGetVasInfo; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetPageTableInfo__ = &__nvoc_thunk_OBJGVASPACE_vaspaceGetPageTableInfo; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetPteInfo__ = &__nvoc_thunk_OBJGVASPACE_vaspaceGetPteInfo; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceSetPteInfo__ = &__nvoc_thunk_OBJGVASPACE_vaspaceSetPteInfo; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceFreeV2__ = &__nvoc_thunk_OBJGVASPACE_vaspaceFreeV2; - - pThis->__gvaspaceGetVaLimit__ = &__nvoc_thunk_OBJVASPACE_gvaspaceGetVaLimit; - - pThis->__gvaspaceGetVaStart__ = &__nvoc_thunk_OBJVASPACE_gvaspaceGetVaStart; -} +// Initialize vtable(s) for 29 virtual method(s). void __nvoc_init_funcTable_OBJGVASPACE(OBJGVASPACE *pThis) { + + // Initialize vtable(s) with 29 per-object function pointer(s). __nvoc_init_funcTable_OBJGVASPACE_1(pThis); } diff --git a/src/nvidia/generated/g_gpu_vaspace_nvoc.h b/src/nvidia/generated/g_gpu_vaspace_nvoc.h index 54f3e898e6..28bf701969 100644 --- a/src/nvidia/generated/g_gpu_vaspace_nvoc.h +++ b/src/nvidia/generated/g_gpu_vaspace_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_GPU_VASPACE_NVOC_H_ #define _G_GPU_VASPACE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2013-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2013-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_gpu_vaspace_nvoc.h" #ifndef GPU_VASPACE_H @@ -220,41 +228,52 @@ struct MMU_WALK_USER_CTX #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJGVASPACE { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJVASPACE __nvoc_base_OBJVASPACE; - struct Object *__nvoc_pbase_Object; - struct OBJVASPACE *__nvoc_pbase_OBJVASPACE; - struct OBJGVASPACE *__nvoc_pbase_OBJGVASPACE; - NV_STATUS (*__gvaspaceConstruct___)(struct OBJGVASPACE *, NvU32, NvU32, NvU64, NvU64, NvU64, NvU64, NvU32); - NV_STATUS (*__gvaspaceReserveMempool__)(struct OBJGVASPACE *, struct OBJGPU *, struct Device *, NvU64, NvU64, NvU32); - NV_STATUS (*__gvaspaceAlloc__)(struct OBJGVASPACE *, NvU64, NvU64, NvU64, NvU64, NvU64, VAS_ALLOC_FLAGS, NvU64 *); - NV_STATUS (*__gvaspaceFree__)(struct OBJGVASPACE *, NvU64); - NV_STATUS (*__gvaspaceApplyDefaultAlignment__)(struct OBJGVASPACE *, const FB_ALLOC_INFO *, NvU64 *, NvU64 *, NvU64 *); - NV_STATUS (*__gvaspaceIncAllocRefCnt__)(struct OBJGVASPACE *, NvU64); - NV_STATUS (*__gvaspaceMap__)(struct OBJGVASPACE *, struct OBJGPU *, const NvU64, const NvU64, const MMU_MAP_TARGET *, const VAS_MAP_FLAGS); - void (*__gvaspaceUnmap__)(struct OBJGVASPACE *, struct OBJGPU *, const NvU64, const NvU64); - struct OBJEHEAP *(*__gvaspaceGetHeap__)(struct OBJGVASPACE *); - NvU64 (*__gvaspaceGetMapPageSize__)(struct OBJGVASPACE *, struct OBJGPU *, struct EMEMBLOCK *); - NvU64 (*__gvaspaceGetBigPageSize__)(struct OBJGVASPACE *); - NvU32 (*__gvaspaceGetFlags__)(struct OBJGVASPACE *); - NvBool (*__gvaspaceIsMirrored__)(struct OBJGVASPACE *); - NvBool (*__gvaspaceIsFaultCapable__)(struct OBJGVASPACE *); - NvBool (*__gvaspaceIsExternallyOwned__)(struct OBJGVASPACE *); - NvBool (*__gvaspaceIsAtsEnabled__)(struct OBJGVASPACE *); - NV_STATUS (*__gvaspaceGetPasid__)(struct OBJGVASPACE *, NvU32 *); - PMEMORY_DESCRIPTOR (*__gvaspaceGetPageDirBase__)(struct OBJGVASPACE *, struct OBJGPU *); - PMEMORY_DESCRIPTOR (*__gvaspaceGetKernelPageDirBase__)(struct OBJGVASPACE *, struct OBJGPU *); - NV_STATUS (*__gvaspacePinRootPageDir__)(struct OBJGVASPACE *, struct OBJGPU *); - void (*__gvaspaceUnpinRootPageDir__)(struct OBJGVASPACE *, struct OBJGPU *); - void (*__gvaspaceInvalidateTlb__)(struct OBJGVASPACE *, struct OBJGPU *, VAS_PTE_UPDATE_TYPE); - NV_STATUS (*__gvaspaceGetVasInfo__)(struct OBJGVASPACE *, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *); - NV_STATUS (*__gvaspaceGetPageTableInfo__)(struct OBJGVASPACE *, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *); - NV_STATUS (*__gvaspaceGetPteInfo__)(struct OBJGVASPACE *, struct OBJGPU *, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *, RmPhysAddr *); - NV_STATUS (*__gvaspaceSetPteInfo__)(struct OBJGVASPACE *, struct OBJGPU *, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *); - NV_STATUS (*__gvaspaceFreeV2__)(struct OBJGVASPACE *, NvU64, NvU64 *); - NvU64 (*__gvaspaceGetVaLimit__)(struct OBJGVASPACE *); - NvU64 (*__gvaspaceGetVaStart__)(struct OBJGVASPACE *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJVASPACE *__nvoc_pbase_OBJVASPACE; // vaspace super + struct OBJGVASPACE *__nvoc_pbase_OBJGVASPACE; // gvaspace + + // Vtable with 29 per-object function pointers + NV_STATUS (*__gvaspaceConstruct___)(struct OBJGVASPACE * /*this*/, NvU32, NvU32, NvU64, NvU64, NvU64, NvU64, NvU32); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__gvaspaceReserveMempool__)(struct OBJGVASPACE * /*this*/, struct OBJGPU *, struct Device *, NvU64, NvU64, NvU32); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__gvaspaceAlloc__)(struct OBJGVASPACE * /*this*/, NvU64, NvU64, NvU64, NvU64, NvU64, VAS_ALLOC_FLAGS, NvU64 *); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__gvaspaceFree__)(struct OBJGVASPACE * /*this*/, NvU64); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__gvaspaceApplyDefaultAlignment__)(struct OBJGVASPACE * /*this*/, const FB_ALLOC_INFO *, NvU64 *, NvU64 *, NvU64 *); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__gvaspaceIncAllocRefCnt__)(struct OBJGVASPACE * /*this*/, NvU64); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__gvaspaceMap__)(struct OBJGVASPACE * /*this*/, struct OBJGPU *, const NvU64, const NvU64, const MMU_MAP_TARGET *, const VAS_MAP_FLAGS); // virtual override (vaspace) base (vaspace) + void (*__gvaspaceUnmap__)(struct OBJGVASPACE * /*this*/, struct OBJGPU *, const NvU64, const NvU64); // virtual override (vaspace) base (vaspace) + struct OBJEHEAP * (*__gvaspaceGetHeap__)(struct OBJGVASPACE * /*this*/); // virtual override (vaspace) base (vaspace) + NvU64 (*__gvaspaceGetMapPageSize__)(struct OBJGVASPACE * /*this*/, struct OBJGPU *, struct EMEMBLOCK *); // virtual override (vaspace) base (vaspace) + NvU64 (*__gvaspaceGetBigPageSize__)(struct OBJGVASPACE * /*this*/); // virtual override (vaspace) base (vaspace) + NvU32 (*__gvaspaceGetFlags__)(struct OBJGVASPACE * /*this*/); // virtual override (vaspace) base (vaspace) + NvBool (*__gvaspaceIsMirrored__)(struct OBJGVASPACE * /*this*/); // virtual override (vaspace) base (vaspace) + NvBool (*__gvaspaceIsFaultCapable__)(struct OBJGVASPACE * /*this*/); // virtual override (vaspace) base (vaspace) + NvBool (*__gvaspaceIsExternallyOwned__)(struct OBJGVASPACE * /*this*/); // virtual override (vaspace) base (vaspace) + NvBool (*__gvaspaceIsAtsEnabled__)(struct OBJGVASPACE * /*this*/); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__gvaspaceGetPasid__)(struct OBJGVASPACE * /*this*/, NvU32 *); // virtual override (vaspace) base (vaspace) + PMEMORY_DESCRIPTOR (*__gvaspaceGetPageDirBase__)(struct OBJGVASPACE * /*this*/, struct OBJGPU *); // virtual override (vaspace) base (vaspace) + PMEMORY_DESCRIPTOR (*__gvaspaceGetKernelPageDirBase__)(struct OBJGVASPACE * /*this*/, struct OBJGPU *); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__gvaspacePinRootPageDir__)(struct OBJGVASPACE * /*this*/, struct OBJGPU *); // virtual override (vaspace) base (vaspace) + void (*__gvaspaceUnpinRootPageDir__)(struct OBJGVASPACE * /*this*/, struct OBJGPU *); // virtual override (vaspace) base (vaspace) + void (*__gvaspaceInvalidateTlb__)(struct OBJGVASPACE * /*this*/, struct OBJGPU *, VAS_PTE_UPDATE_TYPE); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__gvaspaceGetVasInfo__)(struct OBJGVASPACE * /*this*/, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__gvaspaceGetPageTableInfo__)(struct OBJGVASPACE * /*this*/, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__gvaspaceGetPteInfo__)(struct OBJGVASPACE * /*this*/, struct OBJGPU *, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *, RmPhysAddr *); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__gvaspaceSetPteInfo__)(struct OBJGVASPACE * /*this*/, struct OBJGPU *, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__gvaspaceFreeV2__)(struct OBJGVASPACE * /*this*/, NvU64, NvU64 *); // virtual override (vaspace) base (vaspace) + NvU64 (*__gvaspaceGetVaStart__)(struct OBJGVASPACE * /*this*/); // virtual inherited (vaspace) base (vaspace) + NvU64 (*__gvaspaceGetVaLimit__)(struct OBJGVASPACE * /*this*/); // virtual inherited (vaspace) base (vaspace) + + // Data members struct OBJEHEAP *pHeap; NvU64 bigPageSize; NvU64 compPageSize; @@ -289,6 +308,7 @@ typedef struct OBJGVASPACE OBJGVASPACE; #define __nvoc_class_id_OBJGVASPACE 0xba5875 #endif /* __nvoc_class_id_OBJGVASPACE */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGVASPACE; #define __staticCast_OBJGVASPACE(pThis) \ @@ -301,211 +321,243 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGVASPACE; ((OBJGVASPACE*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJGVASPACE))) #endif //__nvoc_gpu_vaspace_h_disabled - NV_STATUS __nvoc_objCreateDynamic_OBJGVASPACE(OBJGVASPACE**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_OBJGVASPACE(OBJGVASPACE**, Dynamic*, NvU32); #define __objCreate_OBJGVASPACE(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJGVASPACE((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define gvaspaceConstruct__FNPTR(pGVAS) pGVAS->__gvaspaceConstruct___ #define gvaspaceConstruct_(pGVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags) gvaspaceConstruct__DISPATCH(pGVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags) +#define gvaspaceReserveMempool_FNPTR(pGVAS) pGVAS->__gvaspaceReserveMempool__ #define gvaspaceReserveMempool(pGVAS, pGpu, pDevice, size, pageSizeLockMask, flags) gvaspaceReserveMempool_DISPATCH(pGVAS, pGpu, pDevice, size, pageSizeLockMask, flags) +#define gvaspaceAlloc_FNPTR(pVAS) pVAS->__gvaspaceAlloc__ #define gvaspaceAlloc(pVAS, size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr) gvaspaceAlloc_DISPATCH(pVAS, size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr) +#define gvaspaceFree_FNPTR(pVAS) pVAS->__gvaspaceFree__ #define gvaspaceFree(pVAS, vAddr) gvaspaceFree_DISPATCH(pVAS, vAddr) +#define gvaspaceApplyDefaultAlignment_FNPTR(pVAS) pVAS->__gvaspaceApplyDefaultAlignment__ #define gvaspaceApplyDefaultAlignment(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask) gvaspaceApplyDefaultAlignment_DISPATCH(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask) +#define gvaspaceIncAllocRefCnt_FNPTR(pVAS) pVAS->__gvaspaceIncAllocRefCnt__ #define gvaspaceIncAllocRefCnt(pVAS, vAddr) gvaspaceIncAllocRefCnt_DISPATCH(pVAS, vAddr) +#define gvaspaceMap_FNPTR(pVAS) pVAS->__gvaspaceMap__ #define gvaspaceMap(pVAS, pGpu, vaLo, vaHi, pTarget, flags) gvaspaceMap_DISPATCH(pVAS, pGpu, vaLo, vaHi, pTarget, flags) +#define gvaspaceUnmap_FNPTR(pVAS) pVAS->__gvaspaceUnmap__ #define gvaspaceUnmap(pVAS, pGpu, vaLo, vaHi) gvaspaceUnmap_DISPATCH(pVAS, pGpu, vaLo, vaHi) +#define gvaspaceGetHeap_FNPTR(pVAS) pVAS->__gvaspaceGetHeap__ #define gvaspaceGetHeap(pVAS) gvaspaceGetHeap_DISPATCH(pVAS) +#define gvaspaceGetMapPageSize_FNPTR(pVAS) pVAS->__gvaspaceGetMapPageSize__ #define gvaspaceGetMapPageSize(pVAS, pGpu, pMemBlock) gvaspaceGetMapPageSize_DISPATCH(pVAS, pGpu, pMemBlock) +#define gvaspaceGetBigPageSize_FNPTR(pVAS) pVAS->__gvaspaceGetBigPageSize__ #define gvaspaceGetBigPageSize(pVAS) gvaspaceGetBigPageSize_DISPATCH(pVAS) +#define gvaspaceGetFlags_FNPTR(pVAS) pVAS->__gvaspaceGetFlags__ #define gvaspaceGetFlags(pVAS) gvaspaceGetFlags_DISPATCH(pVAS) +#define gvaspaceIsMirrored_FNPTR(pVAS) pVAS->__gvaspaceIsMirrored__ #define gvaspaceIsMirrored(pVAS) gvaspaceIsMirrored_DISPATCH(pVAS) +#define gvaspaceIsFaultCapable_FNPTR(pVAS) pVAS->__gvaspaceIsFaultCapable__ #define gvaspaceIsFaultCapable(pVAS) gvaspaceIsFaultCapable_DISPATCH(pVAS) +#define gvaspaceIsExternallyOwned_FNPTR(pVAS) pVAS->__gvaspaceIsExternallyOwned__ #define gvaspaceIsExternallyOwned(pVAS) gvaspaceIsExternallyOwned_DISPATCH(pVAS) +#define gvaspaceIsAtsEnabled_FNPTR(pVAS) pVAS->__gvaspaceIsAtsEnabled__ #define gvaspaceIsAtsEnabled(pVAS) gvaspaceIsAtsEnabled_DISPATCH(pVAS) +#define gvaspaceGetPasid_FNPTR(pVAS) pVAS->__gvaspaceGetPasid__ #define gvaspaceGetPasid(pVAS, pPasid) gvaspaceGetPasid_DISPATCH(pVAS, pPasid) +#define gvaspaceGetPageDirBase_FNPTR(pVAS) pVAS->__gvaspaceGetPageDirBase__ #define gvaspaceGetPageDirBase(pVAS, pGpu) gvaspaceGetPageDirBase_DISPATCH(pVAS, pGpu) +#define gvaspaceGetKernelPageDirBase_FNPTR(pVAS) pVAS->__gvaspaceGetKernelPageDirBase__ #define gvaspaceGetKernelPageDirBase(pVAS, pGpu) gvaspaceGetKernelPageDirBase_DISPATCH(pVAS, pGpu) +#define gvaspacePinRootPageDir_FNPTR(pVAS) pVAS->__gvaspacePinRootPageDir__ #define gvaspacePinRootPageDir(pVAS, pGpu) gvaspacePinRootPageDir_DISPATCH(pVAS, pGpu) +#define gvaspaceUnpinRootPageDir_FNPTR(pVAS) pVAS->__gvaspaceUnpinRootPageDir__ #define gvaspaceUnpinRootPageDir(pVAS, pGpu) gvaspaceUnpinRootPageDir_DISPATCH(pVAS, pGpu) +#define gvaspaceInvalidateTlb_FNPTR(pVAS) pVAS->__gvaspaceInvalidateTlb__ #define gvaspaceInvalidateTlb(pVAS, pGpu, type) gvaspaceInvalidateTlb_DISPATCH(pVAS, pGpu, type) +#define gvaspaceGetVasInfo_FNPTR(pVAS) pVAS->__gvaspaceGetVasInfo__ #define gvaspaceGetVasInfo(pVAS, pParams) gvaspaceGetVasInfo_DISPATCH(pVAS, pParams) +#define gvaspaceGetPageTableInfo_FNPTR(pVAS) pVAS->__gvaspaceGetPageTableInfo__ #define gvaspaceGetPageTableInfo(pVAS, pParams) gvaspaceGetPageTableInfo_DISPATCH(pVAS, pParams) +#define gvaspaceGetPteInfo_FNPTR(pVAS) pVAS->__gvaspaceGetPteInfo__ #define gvaspaceGetPteInfo(pVAS, pGpu, pParams, pPhysAddr) gvaspaceGetPteInfo_DISPATCH(pVAS, pGpu, pParams, pPhysAddr) +#define gvaspaceSetPteInfo_FNPTR(pVAS) pVAS->__gvaspaceSetPteInfo__ #define gvaspaceSetPteInfo(pVAS, pGpu, pParams) gvaspaceSetPteInfo_DISPATCH(pVAS, pGpu, pParams) +#define gvaspaceFreeV2_FNPTR(pGVAS) pGVAS->__gvaspaceFreeV2__ #define gvaspaceFreeV2(pGVAS, vAddr, pSize) gvaspaceFreeV2_DISPATCH(pGVAS, vAddr, pSize) -#define gvaspaceGetVaLimit(pVAS) gvaspaceGetVaLimit_DISPATCH(pVAS) +#define gvaspaceGetVaStart_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetVaStart__ #define gvaspaceGetVaStart(pVAS) gvaspaceGetVaStart_DISPATCH(pVAS) -NV_STATUS gvaspaceConstruct__IMPL(struct OBJGVASPACE *pGVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags); +#define gvaspaceGetVaLimit_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetVaLimit__ +#define gvaspaceGetVaLimit(pVAS) gvaspaceGetVaLimit_DISPATCH(pVAS) +// Dispatch functions static inline NV_STATUS gvaspaceConstruct__DISPATCH(struct OBJGVASPACE *pGVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags) { return pGVAS->__gvaspaceConstruct___(pGVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); } -NV_STATUS gvaspaceReserveMempool_IMPL(struct OBJGVASPACE *pGVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags); - static inline NV_STATUS gvaspaceReserveMempool_DISPATCH(struct OBJGVASPACE *pGVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { return pGVAS->__gvaspaceReserveMempool__(pGVAS, pGpu, pDevice, size, pageSizeLockMask, flags); } -NV_STATUS gvaspaceAlloc_IMPL(struct OBJGVASPACE *pVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSizeLockMask, VAS_ALLOC_FLAGS flags, NvU64 *pAddr); - static inline NV_STATUS gvaspaceAlloc_DISPATCH(struct OBJGVASPACE *pVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSizeLockMask, VAS_ALLOC_FLAGS flags, NvU64 *pAddr) { return pVAS->__gvaspaceAlloc__(pVAS, size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr); } -NV_STATUS gvaspaceFree_IMPL(struct OBJGVASPACE *pVAS, NvU64 vAddr); - static inline NV_STATUS gvaspaceFree_DISPATCH(struct OBJGVASPACE *pVAS, NvU64 vAddr) { return pVAS->__gvaspaceFree__(pVAS, vAddr); } -NV_STATUS gvaspaceApplyDefaultAlignment_IMPL(struct OBJGVASPACE *pVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask); - static inline NV_STATUS gvaspaceApplyDefaultAlignment_DISPATCH(struct OBJGVASPACE *pVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask) { return pVAS->__gvaspaceApplyDefaultAlignment__(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask); } -NV_STATUS gvaspaceIncAllocRefCnt_IMPL(struct OBJGVASPACE *pVAS, NvU64 vAddr); - static inline NV_STATUS gvaspaceIncAllocRefCnt_DISPATCH(struct OBJGVASPACE *pVAS, NvU64 vAddr) { return pVAS->__gvaspaceIncAllocRefCnt__(pVAS, vAddr); } -NV_STATUS gvaspaceMap_IMPL(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags); - static inline NV_STATUS gvaspaceMap_DISPATCH(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { return pVAS->__gvaspaceMap__(pVAS, pGpu, vaLo, vaHi, pTarget, flags); } -void gvaspaceUnmap_IMPL(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi); - static inline void gvaspaceUnmap_DISPATCH(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { pVAS->__gvaspaceUnmap__(pVAS, pGpu, vaLo, vaHi); } -struct OBJEHEAP *gvaspaceGetHeap_IMPL(struct OBJGVASPACE *pVAS); - -static inline struct OBJEHEAP *gvaspaceGetHeap_DISPATCH(struct OBJGVASPACE *pVAS) { +static inline struct OBJEHEAP * gvaspaceGetHeap_DISPATCH(struct OBJGVASPACE *pVAS) { return pVAS->__gvaspaceGetHeap__(pVAS); } -NvU64 gvaspaceGetMapPageSize_IMPL(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, struct EMEMBLOCK *pMemBlock); - static inline NvU64 gvaspaceGetMapPageSize_DISPATCH(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, struct EMEMBLOCK *pMemBlock) { return pVAS->__gvaspaceGetMapPageSize__(pVAS, pGpu, pMemBlock); } -NvU64 gvaspaceGetBigPageSize_IMPL(struct OBJGVASPACE *pVAS); - static inline NvU64 gvaspaceGetBigPageSize_DISPATCH(struct OBJGVASPACE *pVAS) { return pVAS->__gvaspaceGetBigPageSize__(pVAS); } -NvU32 gvaspaceGetFlags_IMPL(struct OBJGVASPACE *pVAS); - static inline NvU32 gvaspaceGetFlags_DISPATCH(struct OBJGVASPACE *pVAS) { return pVAS->__gvaspaceGetFlags__(pVAS); } -NvBool gvaspaceIsMirrored_IMPL(struct OBJGVASPACE *pVAS); - static inline NvBool gvaspaceIsMirrored_DISPATCH(struct OBJGVASPACE *pVAS) { return pVAS->__gvaspaceIsMirrored__(pVAS); } -NvBool gvaspaceIsFaultCapable_IMPL(struct OBJGVASPACE *pVAS); - static inline NvBool gvaspaceIsFaultCapable_DISPATCH(struct OBJGVASPACE *pVAS) { return pVAS->__gvaspaceIsFaultCapable__(pVAS); } -NvBool gvaspaceIsExternallyOwned_IMPL(struct OBJGVASPACE *pVAS); - static inline NvBool gvaspaceIsExternallyOwned_DISPATCH(struct OBJGVASPACE *pVAS) { return pVAS->__gvaspaceIsExternallyOwned__(pVAS); } -NvBool gvaspaceIsAtsEnabled_IMPL(struct OBJGVASPACE *pVAS); - static inline NvBool gvaspaceIsAtsEnabled_DISPATCH(struct OBJGVASPACE *pVAS) { return pVAS->__gvaspaceIsAtsEnabled__(pVAS); } -NV_STATUS gvaspaceGetPasid_IMPL(struct OBJGVASPACE *pVAS, NvU32 *pPasid); - static inline NV_STATUS gvaspaceGetPasid_DISPATCH(struct OBJGVASPACE *pVAS, NvU32 *pPasid) { return pVAS->__gvaspaceGetPasid__(pVAS, pPasid); } -PMEMORY_DESCRIPTOR gvaspaceGetPageDirBase_IMPL(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu); - static inline PMEMORY_DESCRIPTOR gvaspaceGetPageDirBase_DISPATCH(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu) { return pVAS->__gvaspaceGetPageDirBase__(pVAS, pGpu); } -PMEMORY_DESCRIPTOR gvaspaceGetKernelPageDirBase_IMPL(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu); - static inline PMEMORY_DESCRIPTOR gvaspaceGetKernelPageDirBase_DISPATCH(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu) { return pVAS->__gvaspaceGetKernelPageDirBase__(pVAS, pGpu); } -NV_STATUS gvaspacePinRootPageDir_IMPL(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu); - static inline NV_STATUS gvaspacePinRootPageDir_DISPATCH(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu) { return pVAS->__gvaspacePinRootPageDir__(pVAS, pGpu); } -void gvaspaceUnpinRootPageDir_IMPL(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu); - static inline void gvaspaceUnpinRootPageDir_DISPATCH(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu) { pVAS->__gvaspaceUnpinRootPageDir__(pVAS, pGpu); } -void gvaspaceInvalidateTlb_IMPL(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type); - static inline void gvaspaceInvalidateTlb_DISPATCH(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { pVAS->__gvaspaceInvalidateTlb__(pVAS, pGpu, type); } -NV_STATUS gvaspaceGetVasInfo_IMPL(struct OBJGVASPACE *pVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams); - static inline NV_STATUS gvaspaceGetVasInfo_DISPATCH(struct OBJGVASPACE *pVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) { return pVAS->__gvaspaceGetVasInfo__(pVAS, pParams); } -NV_STATUS gvaspaceGetPageTableInfo_IMPL(struct OBJGVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams); - static inline NV_STATUS gvaspaceGetPageTableInfo_DISPATCH(struct OBJGVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { return pVAS->__gvaspaceGetPageTableInfo__(pVAS, pParams); } -NV_STATUS gvaspaceGetPteInfo_IMPL(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr); - static inline NV_STATUS gvaspaceGetPteInfo_DISPATCH(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { return pVAS->__gvaspaceGetPteInfo__(pVAS, pGpu, pParams, pPhysAddr); } -NV_STATUS gvaspaceSetPteInfo_IMPL(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams); - static inline NV_STATUS gvaspaceSetPteInfo_DISPATCH(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { return pVAS->__gvaspaceSetPteInfo__(pVAS, pGpu, pParams); } -NV_STATUS gvaspaceFreeV2_IMPL(struct OBJGVASPACE *pGVAS, NvU64 vAddr, NvU64 *pSize); - static inline NV_STATUS gvaspaceFreeV2_DISPATCH(struct OBJGVASPACE *pGVAS, NvU64 vAddr, NvU64 *pSize) { return pGVAS->__gvaspaceFreeV2__(pGVAS, vAddr, pSize); } +static inline NvU64 gvaspaceGetVaStart_DISPATCH(struct OBJGVASPACE *pVAS) { + return pVAS->__gvaspaceGetVaStart__(pVAS); +} + static inline NvU64 gvaspaceGetVaLimit_DISPATCH(struct OBJGVASPACE *pVAS) { return pVAS->__gvaspaceGetVaLimit__(pVAS); } -static inline NvU64 gvaspaceGetVaStart_DISPATCH(struct OBJGVASPACE *pVAS) { - return pVAS->__gvaspaceGetVaStart__(pVAS); -} +NV_STATUS gvaspaceConstruct__IMPL(struct OBJGVASPACE *pGVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags); + +NV_STATUS gvaspaceReserveMempool_IMPL(struct OBJGVASPACE *pGVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags); + +NV_STATUS gvaspaceAlloc_IMPL(struct OBJGVASPACE *pVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSizeLockMask, VAS_ALLOC_FLAGS flags, NvU64 *pAddr); + +NV_STATUS gvaspaceFree_IMPL(struct OBJGVASPACE *pVAS, NvU64 vAddr); + +NV_STATUS gvaspaceApplyDefaultAlignment_IMPL(struct OBJGVASPACE *pVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask); + +NV_STATUS gvaspaceIncAllocRefCnt_IMPL(struct OBJGVASPACE *pVAS, NvU64 vAddr); + +NV_STATUS gvaspaceMap_IMPL(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags); + +void gvaspaceUnmap_IMPL(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi); + +struct OBJEHEAP *gvaspaceGetHeap_IMPL(struct OBJGVASPACE *pVAS); + +NvU64 gvaspaceGetMapPageSize_IMPL(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, struct EMEMBLOCK *pMemBlock); + +NvU64 gvaspaceGetBigPageSize_IMPL(struct OBJGVASPACE *pVAS); + +NvU32 gvaspaceGetFlags_IMPL(struct OBJGVASPACE *pVAS); + +NvBool gvaspaceIsMirrored_IMPL(struct OBJGVASPACE *pVAS); + +NvBool gvaspaceIsFaultCapable_IMPL(struct OBJGVASPACE *pVAS); + +NvBool gvaspaceIsExternallyOwned_IMPL(struct OBJGVASPACE *pVAS); + +NvBool gvaspaceIsAtsEnabled_IMPL(struct OBJGVASPACE *pVAS); + +NV_STATUS gvaspaceGetPasid_IMPL(struct OBJGVASPACE *pVAS, NvU32 *pPasid); + +PMEMORY_DESCRIPTOR gvaspaceGetPageDirBase_IMPL(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu); + +PMEMORY_DESCRIPTOR gvaspaceGetKernelPageDirBase_IMPL(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu); + +NV_STATUS gvaspacePinRootPageDir_IMPL(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu); + +void gvaspaceUnpinRootPageDir_IMPL(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu); + +void gvaspaceInvalidateTlb_IMPL(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type); + +NV_STATUS gvaspaceGetVasInfo_IMPL(struct OBJGVASPACE *pVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams); + +NV_STATUS gvaspaceGetPageTableInfo_IMPL(struct OBJGVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams); + +NV_STATUS gvaspaceGetPteInfo_IMPL(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr); + +NV_STATUS gvaspaceSetPteInfo_IMPL(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams); + +NV_STATUS gvaspaceFreeV2_IMPL(struct OBJGVASPACE *pGVAS, NvU64 vAddr, NvU64 *pSize); static inline NvU32 gvaspaceGetReservedVaspaceBase(struct OBJGVASPACE *pGVAS, struct OBJGPU *pGpu) { if (!((0) && (pGpu))) { @@ -583,11 +635,12 @@ static inline GVAS_GPU_STATE *gvaspaceGetGpuState(struct OBJGVASPACE *pGVAS, str #define gvaspaceGetGpuState(pGVAS, pGpu) gvaspaceGetGpuState_IMPL(pGVAS, pGpu) #endif //__nvoc_gpu_vaspace_h_disabled -void gvaspaceWalkUserCtxAcquire_IMPL(struct OBJGVASPACE *pGVAS, struct OBJGPU *pGpu, const GVAS_BLOCK *pVASBlock, struct MMU_WALK_USER_CTX *pUserCtx); +NV_STATUS gvaspaceWalkUserCtxAcquire_IMPL(struct OBJGVASPACE *pGVAS, struct OBJGPU *pGpu, const GVAS_BLOCK *pVASBlock, struct MMU_WALK_USER_CTX *pUserCtx); #ifdef __nvoc_gpu_vaspace_h_disabled -static inline void gvaspaceWalkUserCtxAcquire(struct OBJGVASPACE *pGVAS, struct OBJGPU *pGpu, const GVAS_BLOCK *pVASBlock, struct MMU_WALK_USER_CTX *pUserCtx) { +static inline NV_STATUS gvaspaceWalkUserCtxAcquire(struct OBJGVASPACE *pGVAS, struct OBJGPU *pGpu, const GVAS_BLOCK *pVASBlock, struct MMU_WALK_USER_CTX *pUserCtx) { NV_ASSERT_FAILED_PRECOMP("OBJGVASPACE was disabled!"); + return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_vaspace_h_disabled #define gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, pVASBlock, pUserCtx) gvaspaceWalkUserCtxAcquire_IMPL(pGVAS, pGpu, pVASBlock, pUserCtx) diff --git a/src/nvidia/generated/g_gsync_api_nvoc.c b/src/nvidia/generated/g_gsync_api_nvoc.c index dfa3e92813..63880a6b7f 100644 --- a/src/nvidia/generated/g_gsync_api_nvoc.c +++ b/src/nvidia/generated/g_gsync_api_nvoc.c @@ -102,110 +102,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_GSyncApi = /*pExportInfo=*/ &__nvoc_export_info_GSyncApi }; -static NV_STATUS __nvoc_thunk_GSyncApi_resControl(struct RsResource *pGsyncApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gsyncapiControl((struct GSyncApi *)(((unsigned char *)pGsyncApi) - __nvoc_rtti_GSyncApi_RsResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RmResource_gsyncapiShareCallback(struct GSyncApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_gsyncapiCheckMemInterUnmap(struct GSyncApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_GSyncApi_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RsResource_gsyncapiMapTo(struct GSyncApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), pParams); -} - -static NvBool __nvoc_thunk_RmResource_gsyncapiAccessCallback(struct GSyncApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - -static void __nvoc_thunk_Notifier_gsyncapiSetNotificationShare(struct GSyncApi *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_GSyncApi_Notifier.offset), pNotifShare); -} - -static NvU32 __nvoc_thunk_RsResource_gsyncapiGetRefCount(struct GSyncApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GSyncApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_gsyncapiAddAdditionalDependants(struct RsClient *pClient, struct GSyncApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_gsyncapiControl_Prologue(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_gsyncapiUnmapFrom(struct GSyncApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_gsyncapiControl_Epilogue(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_gsyncapiUnmap(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_gsyncapiGetMemInterMapParams(struct GSyncApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_gsyncapiGetMemoryMappingDescriptor(struct GSyncApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_GSyncApi_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_gsyncapiControlFilter(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_Notifier_gsyncapiUnregisterEvent(struct GSyncApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_GSyncApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static NV_STATUS __nvoc_thunk_RmResource_gsyncapiControlSerialization_Prologue(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_gsyncapiCanCopy(struct GSyncApi *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GSyncApi_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_gsyncapiIsPartialUnmapSupported(struct GSyncApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GSyncApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_gsyncapiPreDestruct(struct GSyncApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GSyncApi_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_gsyncapiIsDuplicate(struct GSyncApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_gsyncapiControlSerialization_Epilogue(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pCallContext, pParams); -} - -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_gsyncapiGetNotificationListPtr(struct GSyncApi *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_GSyncApi_Notifier.offset)); -} - -static struct NotifShare *__nvoc_thunk_Notifier_gsyncapiGetNotificationShare(struct GSyncApi *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_GSyncApi_Notifier.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_gsyncapiMap(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_Notifier_gsyncapiGetOrAllocNotifShare(struct GSyncApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_GSyncApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -213,12 +109,12 @@ static NV_STATUS __nvoc_thunk_Notifier_gsyncapiGetOrAllocNotifShare(struct GSync static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gsyncapiCtrlCmdGsyncGetVersion_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x30f10101u, /*paramSize=*/ sizeof(NV30F1_CTRL_GSYNC_GET_VERSION_PARAMS), @@ -228,12 +124,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gsyncapiCtrlCmdGsyncGetStatusSignals_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x30f10102u, /*paramSize=*/ sizeof(NV30F1_CTRL_GSYNC_GET_STATUS_SIGNALS_PARAMS), @@ -243,12 +139,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gsyncapiCtrlCmdGsyncGetControlParams_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x30f10103u, /*paramSize=*/ sizeof(NV30F1_CTRL_GSYNC_GET_CONTROL_PARAMS_PARAMS), @@ -273,12 +169,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gsyncapiCtrlCmdGsyncGetCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x30f10105u, /*paramSize=*/ sizeof(NV30F1_CTRL_GSYNC_GET_CAPS_PARAMS), @@ -288,12 +184,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi #endif }, { /* [5] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gsyncapiCtrlCmdGetGsyncGpuTopology_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x30f10106u, /*paramSize=*/ sizeof(NV30F1_CTRL_GET_GSYNC_GPU_TOPOLOGY_PARAMS), @@ -303,12 +199,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi #endif }, { /* [6] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gsyncapiCtrlCmdGsyncGetControlSync_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x30f10110u, /*paramSize=*/ sizeof(NV30F1_CTRL_GSYNC_GET_CONTROL_SYNC_PARAMS), @@ -348,12 +244,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi #endif }, { /* [9] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gsyncapiCtrlCmdGsyncGetStatusSync_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x30f10113u, /*paramSize=*/ sizeof(NV30F1_CTRL_GSYNC_GET_STATUS_SYNC_PARAMS), @@ -363,12 +259,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi #endif }, { /* [10] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gsyncapiCtrlCmdGsyncGetStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x30f10114u, /*paramSize=*/ sizeof(NV30F1_CTRL_GSYNC_GET_STATUS_PARAMS), @@ -378,12 +274,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi #endif }, { /* [11] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gsyncapiCtrlCmdGsyncGetControlTesting_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x30f10120u, /*paramSize=*/ sizeof(NV30F1_CTRL_GSYNC_GET_CONTROL_TESTING_PARAMS), @@ -393,12 +289,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi #endif }, { /* [12] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gsyncapiCtrlCmdGsyncSetControlTesting_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x30f10121u, /*paramSize=*/ sizeof(NV30F1_CTRL_GSYNC_SET_CONTROL_TESTING_PARAMS), @@ -408,12 +304,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi #endif }, { /* [13] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gsyncapiCtrlCmdGsyncSetControlWatchdog_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x30f10130u, /*paramSize=*/ sizeof(NV30F1_CTRL_GSYNC_SET_CONTROL_WATCHDOG_PARAMS), @@ -423,12 +319,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi #endif }, { /* [14] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gsyncapiCtrlCmdGsyncGetControlInterlaceMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x30f10140u, /*paramSize=*/ sizeof(NV30F1_CTRL_GSYNC_GET_CONTROL_INTERLACE_MODE_PARAMS), @@ -453,12 +349,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi #endif }, { /* [16] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gsyncapiCtrlCmdGsyncGetControlSwapBarrier_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x30f10150u, /*paramSize=*/ sizeof(NV30F1_CTRL_GSYNC_GET_CONTROL_SWAP_BARRIER_PARAMS), @@ -468,12 +364,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi #endif }, { /* [17] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gsyncapiCtrlCmdGsyncSetControlSwapBarrier_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x30f10151u, /*paramSize=*/ sizeof(NV30F1_CTRL_GSYNC_SET_CONTROL_SWAP_BARRIER_PARAMS), @@ -483,12 +379,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi #endif }, { /* [18] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gsyncapiCtrlCmdGsyncGetControlSwapLockWindow_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x30f10153u, /*paramSize=*/ sizeof(NV30F1_CTRL_GSYNC_GET_CONTROL_SWAP_LOCK_WINDOW_PARAMS), @@ -498,12 +394,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi #endif }, { /* [19] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gsyncapiCtrlCmdGsyncGetOptimizedTiming_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x30f10160u, /*paramSize=*/ sizeof(NV30F1_CTRL_GSYNC_GET_OPTIMIZED_TIMING_PARAMS), @@ -513,12 +409,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi #endif }, { /* [20] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gsyncapiCtrlCmdGsyncSetEventNotification_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x30f10170u, /*paramSize=*/ sizeof(NV30F1_CTRL_GSYNC_SET_EVENT_NOTIFICATION_PARAMS), @@ -543,12 +439,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi #endif }, { /* [22] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gsyncapiCtrlCmdGsyncGetControlStereoLockMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x30f10173u, /*paramSize=*/ sizeof(NV30F1_CTRL_CMD_GSYNC_GET_CONTROL_STEREO_LOCK_MODE_PARAMS), @@ -618,12 +514,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi #endif }, { /* [27] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) gsyncapiCtrlCmdGsyncGetHouseSyncMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x30f10187u, /*paramSize=*/ sizeof(NV30F1_CTRL_GSYNC_HOUSE_SYNC_MODE_PARAMS), @@ -650,6 +546,142 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi }; +// 1 down-thunk(s) defined to bridge methods in GSyncApi from superclasses + +// gsyncapiControl: virtual override (res) base (rmres) +static NV_STATUS __nvoc_down_thunk_GSyncApi_resControl(struct RsResource *pGsyncApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gsyncapiControl((struct GSyncApi *)(((unsigned char *) pGsyncApi) - __nvoc_rtti_GSyncApi_RsResource.offset), pCallContext, pParams); +} + + +// 25 up-thunk(s) defined to bridge methods in GSyncApi to superclasses + +// gsyncapiAccessCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_gsyncapiAccessCallback(struct GSyncApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// gsyncapiShareCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_gsyncapiShareCallback(struct GSyncApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// gsyncapiGetMemInterMapParams: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_gsyncapiGetMemInterMapParams(struct GSyncApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pParams); +} + +// gsyncapiCheckMemInterUnmap: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_gsyncapiCheckMemInterUnmap(struct GSyncApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GSyncApi_RmResource.offset), bSubdeviceHandleProvided); +} + +// gsyncapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_gsyncapiGetMemoryMappingDescriptor(struct GSyncApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GSyncApi_RmResource.offset), ppMemDesc); +} + +// gsyncapiControlSerialization_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_gsyncapiControlSerialization_Prologue(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pCallContext, pParams); +} + +// gsyncapiControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_gsyncapiControlSerialization_Epilogue(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pCallContext, pParams); +} + +// gsyncapiControl_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_gsyncapiControl_Prologue(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pCallContext, pParams); +} + +// gsyncapiControl_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_gsyncapiControl_Epilogue(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pCallContext, pParams); +} + +// gsyncapiCanCopy: virtual inherited (res) base (rmres) +static NvBool __nvoc_up_thunk_RsResource_gsyncapiCanCopy(struct GSyncApi *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset)); +} + +// gsyncapiIsDuplicate: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiIsDuplicate(struct GSyncApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), hMemory, pDuplicate); +} + +// gsyncapiPreDestruct: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_gsyncapiPreDestruct(struct GSyncApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset)); +} + +// gsyncapiControlFilter: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiControlFilter(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), pCallContext, pParams); +} + +// gsyncapiMap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiMap(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), pCallContext, pParams, pCpuMapping); +} + +// gsyncapiUnmap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiUnmap(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), pCallContext, pCpuMapping); +} + +// gsyncapiIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body +static NvBool __nvoc_up_thunk_RsResource_gsyncapiIsPartialUnmapSupported(struct GSyncApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset)); +} + +// gsyncapiMapTo: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiMapTo(struct GSyncApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), pParams); +} + +// gsyncapiUnmapFrom: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiUnmapFrom(struct GSyncApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), pParams); +} + +// gsyncapiGetRefCount: virtual inherited (res) base (rmres) +static NvU32 __nvoc_up_thunk_RsResource_gsyncapiGetRefCount(struct GSyncApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset)); +} + +// gsyncapiAddAdditionalDependants: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_gsyncapiAddAdditionalDependants(struct RsClient *pClient, struct GSyncApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), pReference); +} + +// gsyncapiGetNotificationListPtr: virtual inherited (notify) base (notify) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_gsyncapiGetNotificationListPtr(struct GSyncApi *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_GSyncApi_Notifier.offset)); +} + +// gsyncapiGetNotificationShare: virtual inherited (notify) base (notify) +static struct NotifShare * __nvoc_up_thunk_Notifier_gsyncapiGetNotificationShare(struct GSyncApi *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_GSyncApi_Notifier.offset)); +} + +// gsyncapiSetNotificationShare: virtual inherited (notify) base (notify) +static void __nvoc_up_thunk_Notifier_gsyncapiSetNotificationShare(struct GSyncApi *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_GSyncApi_Notifier.offset), pNotifShare); +} + +// gsyncapiUnregisterEvent: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_gsyncapiUnregisterEvent(struct GSyncApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_GSyncApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +} + +// gsyncapiGetOrAllocNotifShare: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_gsyncapiGetOrAllocNotifShare(struct GSyncApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_GSyncApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_GSyncApi = { /*numEntries=*/ 29, @@ -692,181 +724,240 @@ NV_STATUS __nvoc_ctor_GSyncApi(GSyncApi *pThis, struct CALL_CONTEXT * arg_pCallC return status; } +// Vtable initialization static void __nvoc_init_funcTable_GSyncApi_1(GSyncApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // gsyncapiControl -- virtual override (res) base (rmres) pThis->__gsyncapiControl__ = &gsyncapiControl_IMPL; + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ = &__nvoc_down_thunk_GSyncApi_resControl; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gsyncapiCtrlCmdGsyncGetVersion -- exported (id=0x30f10101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gsyncapiCtrlCmdGsyncGetVersion__ = &gsyncapiCtrlCmdGsyncGetVersion_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gsyncapiCtrlCmdGetGsyncGpuTopology -- exported (id=0x30f10106) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gsyncapiCtrlCmdGetGsyncGpuTopology__ = &gsyncapiCtrlCmdGetGsyncGpuTopology_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gsyncapiCtrlCmdGsyncGetStatusSignals -- exported (id=0x30f10102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gsyncapiCtrlCmdGsyncGetStatusSignals__ = &gsyncapiCtrlCmdGsyncGetStatusSignals_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gsyncapiCtrlCmdGsyncGetControlParams -- exported (id=0x30f10103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gsyncapiCtrlCmdGsyncGetControlParams__ = &gsyncapiCtrlCmdGsyncGetControlParams_IMPL; #endif + // gsyncapiCtrlCmdGsyncSetControlParams -- exported (id=0x30f10104) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__gsyncapiCtrlCmdGsyncSetControlParams__ = &gsyncapiCtrlCmdGsyncSetControlParams_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gsyncapiCtrlCmdGsyncGetControlSync -- exported (id=0x30f10110) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gsyncapiCtrlCmdGsyncGetControlSync__ = &gsyncapiCtrlCmdGsyncGetControlSync_IMPL; #endif + // gsyncapiCtrlCmdGsyncSetControlSync -- exported (id=0x30f10111) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__gsyncapiCtrlCmdGsyncSetControlSync__ = &gsyncapiCtrlCmdGsyncSetControlSync_IMPL; #endif + // gsyncapiCtrlCmdGsyncSetControlUnsync -- exported (id=0x30f10112) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__gsyncapiCtrlCmdGsyncSetControlUnsync__ = &gsyncapiCtrlCmdGsyncSetControlUnsync_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gsyncapiCtrlCmdGsyncGetStatusSync -- exported (id=0x30f10113) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gsyncapiCtrlCmdGsyncGetStatusSync__ = &gsyncapiCtrlCmdGsyncGetStatusSync_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gsyncapiCtrlCmdGsyncGetStatus -- exported (id=0x30f10114) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gsyncapiCtrlCmdGsyncGetStatus__ = &gsyncapiCtrlCmdGsyncGetStatus_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gsyncapiCtrlCmdGsyncGetControlTesting -- exported (id=0x30f10120) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gsyncapiCtrlCmdGsyncGetControlTesting__ = &gsyncapiCtrlCmdGsyncGetControlTesting_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gsyncapiCtrlCmdGsyncSetControlTesting -- exported (id=0x30f10121) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gsyncapiCtrlCmdGsyncSetControlTesting__ = &gsyncapiCtrlCmdGsyncSetControlTesting_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gsyncapiCtrlCmdGsyncSetControlWatchdog -- exported (id=0x30f10130) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gsyncapiCtrlCmdGsyncSetControlWatchdog__ = &gsyncapiCtrlCmdGsyncSetControlWatchdog_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gsyncapiCtrlCmdGsyncGetControlInterlaceMode -- exported (id=0x30f10140) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gsyncapiCtrlCmdGsyncGetControlInterlaceMode__ = &gsyncapiCtrlCmdGsyncGetControlInterlaceMode_IMPL; #endif + // gsyncapiCtrlCmdGsyncSetControlInterlaceMode -- exported (id=0x30f10141) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__gsyncapiCtrlCmdGsyncSetControlInterlaceMode__ = &gsyncapiCtrlCmdGsyncSetControlInterlaceMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gsyncapiCtrlCmdGsyncGetControlSwapBarrier -- exported (id=0x30f10150) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gsyncapiCtrlCmdGsyncGetControlSwapBarrier__ = &gsyncapiCtrlCmdGsyncGetControlSwapBarrier_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gsyncapiCtrlCmdGsyncSetControlSwapBarrier -- exported (id=0x30f10151) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gsyncapiCtrlCmdGsyncSetControlSwapBarrier__ = &gsyncapiCtrlCmdGsyncSetControlSwapBarrier_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gsyncapiCtrlCmdGsyncGetControlSwapLockWindow -- exported (id=0x30f10153) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gsyncapiCtrlCmdGsyncGetControlSwapLockWindow__ = &gsyncapiCtrlCmdGsyncGetControlSwapLockWindow_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gsyncapiCtrlCmdGsyncGetCaps -- exported (id=0x30f10105) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gsyncapiCtrlCmdGsyncGetCaps__ = &gsyncapiCtrlCmdGsyncGetCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gsyncapiCtrlCmdGsyncGetOptimizedTiming -- exported (id=0x30f10160) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gsyncapiCtrlCmdGsyncGetOptimizedTiming__ = &gsyncapiCtrlCmdGsyncGetOptimizedTiming_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gsyncapiCtrlCmdGsyncSetEventNotification -- exported (id=0x30f10170) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gsyncapiCtrlCmdGsyncSetEventNotification__ = &gsyncapiCtrlCmdGsyncSetEventNotification_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gsyncapiCtrlCmdGsyncGetControlStereoLockMode -- exported (id=0x30f10173) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gsyncapiCtrlCmdGsyncGetControlStereoLockMode__ = &gsyncapiCtrlCmdGsyncGetControlStereoLockMode_IMPL; #endif + // gsyncapiCtrlCmdGsyncSetControlStereoLockMode -- exported (id=0x30f10172) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__gsyncapiCtrlCmdGsyncSetControlStereoLockMode__ = &gsyncapiCtrlCmdGsyncSetControlStereoLockMode_IMPL; #endif + // gsyncapiCtrlCmdGsyncReadRegister -- exported (id=0x30f10180) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__gsyncapiCtrlCmdGsyncReadRegister__ = &gsyncapiCtrlCmdGsyncReadRegister_IMPL; #endif + // gsyncapiCtrlCmdGsyncWriteRegister -- exported (id=0x30f10181) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__gsyncapiCtrlCmdGsyncWriteRegister__ = &gsyncapiCtrlCmdGsyncWriteRegister_IMPL; #endif + // gsyncapiCtrlCmdGsyncSetLocalSync -- exported (id=0x30f10185) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__gsyncapiCtrlCmdGsyncSetLocalSync__ = &gsyncapiCtrlCmdGsyncSetLocalSync_IMPL; #endif + // gsyncapiCtrlCmdGsyncConfigFlash -- exported (id=0x30f10186) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__gsyncapiCtrlCmdGsyncConfigFlash__ = &gsyncapiCtrlCmdGsyncConfigFlash_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // gsyncapiCtrlCmdGsyncGetHouseSyncMode -- exported (id=0x30f10187) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gsyncapiCtrlCmdGsyncGetHouseSyncMode__ = &gsyncapiCtrlCmdGsyncGetHouseSyncMode_IMPL; #endif + // gsyncapiCtrlCmdGsyncSetHouseSyncMode -- exported (id=0x30f10188) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__gsyncapiCtrlCmdGsyncSetHouseSyncMode__ = &gsyncapiCtrlCmdGsyncSetHouseSyncMode_IMPL; #endif - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ = &__nvoc_thunk_GSyncApi_resControl; + // gsyncapiAccessCallback -- virtual inherited (rmres) base (rmres) + pThis->__gsyncapiAccessCallback__ = &__nvoc_up_thunk_RmResource_gsyncapiAccessCallback; - pThis->__gsyncapiShareCallback__ = &__nvoc_thunk_RmResource_gsyncapiShareCallback; + // gsyncapiShareCallback -- virtual inherited (rmres) base (rmres) + pThis->__gsyncapiShareCallback__ = &__nvoc_up_thunk_RmResource_gsyncapiShareCallback; - pThis->__gsyncapiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_gsyncapiCheckMemInterUnmap; + // gsyncapiGetMemInterMapParams -- virtual inherited (rmres) base (rmres) + pThis->__gsyncapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gsyncapiGetMemInterMapParams; - pThis->__gsyncapiMapTo__ = &__nvoc_thunk_RsResource_gsyncapiMapTo; + // gsyncapiCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) + pThis->__gsyncapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gsyncapiCheckMemInterUnmap; - pThis->__gsyncapiAccessCallback__ = &__nvoc_thunk_RmResource_gsyncapiAccessCallback; + // gsyncapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) + pThis->__gsyncapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gsyncapiGetMemoryMappingDescriptor; - pThis->__gsyncapiSetNotificationShare__ = &__nvoc_thunk_Notifier_gsyncapiSetNotificationShare; + // gsyncapiControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__gsyncapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gsyncapiControlSerialization_Prologue; - pThis->__gsyncapiGetRefCount__ = &__nvoc_thunk_RsResource_gsyncapiGetRefCount; + // gsyncapiControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__gsyncapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gsyncapiControlSerialization_Epilogue; - pThis->__gsyncapiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_gsyncapiAddAdditionalDependants; + // gsyncapiControl_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__gsyncapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_gsyncapiControl_Prologue; - pThis->__gsyncapiControl_Prologue__ = &__nvoc_thunk_RmResource_gsyncapiControl_Prologue; + // gsyncapiControl_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__gsyncapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gsyncapiControl_Epilogue; - pThis->__gsyncapiUnmapFrom__ = &__nvoc_thunk_RsResource_gsyncapiUnmapFrom; + // gsyncapiCanCopy -- virtual inherited (res) base (rmres) + pThis->__gsyncapiCanCopy__ = &__nvoc_up_thunk_RsResource_gsyncapiCanCopy; - pThis->__gsyncapiControl_Epilogue__ = &__nvoc_thunk_RmResource_gsyncapiControl_Epilogue; + // gsyncapiIsDuplicate -- virtual inherited (res) base (rmres) + pThis->__gsyncapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_gsyncapiIsDuplicate; - pThis->__gsyncapiUnmap__ = &__nvoc_thunk_RsResource_gsyncapiUnmap; + // gsyncapiPreDestruct -- virtual inherited (res) base (rmres) + pThis->__gsyncapiPreDestruct__ = &__nvoc_up_thunk_RsResource_gsyncapiPreDestruct; - pThis->__gsyncapiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_gsyncapiGetMemInterMapParams; + // gsyncapiControlFilter -- virtual inherited (res) base (rmres) + pThis->__gsyncapiControlFilter__ = &__nvoc_up_thunk_RsResource_gsyncapiControlFilter; - pThis->__gsyncapiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_gsyncapiGetMemoryMappingDescriptor; + // gsyncapiMap -- virtual inherited (res) base (rmres) + pThis->__gsyncapiMap__ = &__nvoc_up_thunk_RsResource_gsyncapiMap; - pThis->__gsyncapiControlFilter__ = &__nvoc_thunk_RsResource_gsyncapiControlFilter; + // gsyncapiUnmap -- virtual inherited (res) base (rmres) + pThis->__gsyncapiUnmap__ = &__nvoc_up_thunk_RsResource_gsyncapiUnmap; - pThis->__gsyncapiUnregisterEvent__ = &__nvoc_thunk_Notifier_gsyncapiUnregisterEvent; + // gsyncapiIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body + pThis->__gsyncapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gsyncapiIsPartialUnmapSupported; - pThis->__gsyncapiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_gsyncapiControlSerialization_Prologue; + // gsyncapiMapTo -- virtual inherited (res) base (rmres) + pThis->__gsyncapiMapTo__ = &__nvoc_up_thunk_RsResource_gsyncapiMapTo; - pThis->__gsyncapiCanCopy__ = &__nvoc_thunk_RsResource_gsyncapiCanCopy; + // gsyncapiUnmapFrom -- virtual inherited (res) base (rmres) + pThis->__gsyncapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_gsyncapiUnmapFrom; - pThis->__gsyncapiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_gsyncapiIsPartialUnmapSupported; + // gsyncapiGetRefCount -- virtual inherited (res) base (rmres) + pThis->__gsyncapiGetRefCount__ = &__nvoc_up_thunk_RsResource_gsyncapiGetRefCount; - pThis->__gsyncapiPreDestruct__ = &__nvoc_thunk_RsResource_gsyncapiPreDestruct; + // gsyncapiAddAdditionalDependants -- virtual inherited (res) base (rmres) + pThis->__gsyncapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gsyncapiAddAdditionalDependants; - pThis->__gsyncapiIsDuplicate__ = &__nvoc_thunk_RsResource_gsyncapiIsDuplicate; + // gsyncapiGetNotificationListPtr -- virtual inherited (notify) base (notify) + pThis->__gsyncapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_gsyncapiGetNotificationListPtr; - pThis->__gsyncapiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_gsyncapiControlSerialization_Epilogue; + // gsyncapiGetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__gsyncapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_gsyncapiGetNotificationShare; - pThis->__gsyncapiGetNotificationListPtr__ = &__nvoc_thunk_Notifier_gsyncapiGetNotificationListPtr; + // gsyncapiSetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__gsyncapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_gsyncapiSetNotificationShare; - pThis->__gsyncapiGetNotificationShare__ = &__nvoc_thunk_Notifier_gsyncapiGetNotificationShare; + // gsyncapiUnregisterEvent -- virtual inherited (notify) base (notify) + pThis->__gsyncapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_gsyncapiUnregisterEvent; - pThis->__gsyncapiMap__ = &__nvoc_thunk_RsResource_gsyncapiMap; + // gsyncapiGetOrAllocNotifShare -- virtual inherited (notify) base (notify) + pThis->__gsyncapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_gsyncapiGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_GSyncApi_1 with approximately 56 basic block(s). - pThis->__gsyncapiGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_gsyncapiGetOrAllocNotifShare; -} +// Initialize vtable(s) for 55 virtual method(s). void __nvoc_init_funcTable_GSyncApi(GSyncApi *pThis) { + + // Initialize vtable(s) with 55 per-object function pointer(s). __nvoc_init_funcTable_GSyncApi_1(pThis); } diff --git a/src/nvidia/generated/g_gsync_api_nvoc.h b/src/nvidia/generated/g_gsync_api_nvoc.h index 041255be57..7e13e6b908 100644 --- a/src/nvidia/generated/g_gsync_api_nvoc.h +++ b/src/nvidia/generated/g_gsync_api_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_GSYNC_API_NVOC_H_ #define _G_GSYNC_API_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_gsync_api_nvoc.h" #ifndef GSYNCAPI_H_ @@ -53,72 +61,83 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct GSyncApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; struct Notifier __nvoc_base_Notifier; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct GSyncApi *__nvoc_pbase_GSyncApi; - NV_STATUS (*__gsyncapiControl__)(struct GSyncApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncGetVersion__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_GET_VERSION_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGetGsyncGpuTopology__)(struct GSyncApi *, NV30F1_CTRL_GET_GSYNC_GPU_TOPOLOGY_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncGetStatusSignals__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_GET_STATUS_SIGNALS_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncGetControlParams__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_GET_CONTROL_PARAMS_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncSetControlParams__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_SET_CONTROL_PARAMS_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncGetControlSync__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_GET_CONTROL_SYNC_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncSetControlSync__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_SET_CONTROL_SYNC_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncSetControlUnsync__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_SET_CONTROL_UNSYNC_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncGetStatusSync__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_GET_STATUS_SYNC_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncGetStatus__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_GET_STATUS_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncGetControlTesting__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_GET_CONTROL_TESTING_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncSetControlTesting__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_SET_CONTROL_TESTING_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncSetControlWatchdog__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_SET_CONTROL_WATCHDOG_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncGetControlInterlaceMode__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_GET_CONTROL_INTERLACE_MODE_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncSetControlInterlaceMode__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_SET_CONTROL_INTERLACE_MODE_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncGetControlSwapBarrier__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_GET_CONTROL_SWAP_BARRIER_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncSetControlSwapBarrier__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_SET_CONTROL_SWAP_BARRIER_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncGetControlSwapLockWindow__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_GET_CONTROL_SWAP_LOCK_WINDOW_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncGetCaps__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_GET_CAPS_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncGetOptimizedTiming__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_GET_OPTIMIZED_TIMING_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncSetEventNotification__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_SET_EVENT_NOTIFICATION_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncGetControlStereoLockMode__)(struct GSyncApi *, NV30F1_CTRL_CMD_GSYNC_GET_CONTROL_STEREO_LOCK_MODE_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncSetControlStereoLockMode__)(struct GSyncApi *, NV30F1_CTRL_CMD_GSYNC_SET_CONTROL_STEREO_LOCK_MODE_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncReadRegister__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_READ_REGISTER_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncWriteRegister__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_WRITE_REGISTER_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncSetLocalSync__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_SET_LOCAL_SYNC_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncConfigFlash__)(struct GSyncApi *, NV30F1_CTRL_CMD_GSYNC_CONFIG_FLASH_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncGetHouseSyncMode__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_HOUSE_SYNC_MODE_PARAMS *); - NV_STATUS (*__gsyncapiCtrlCmdGsyncSetHouseSyncMode__)(struct GSyncApi *, NV30F1_CTRL_GSYNC_HOUSE_SYNC_MODE_PARAMS *); - NvBool (*__gsyncapiShareCallback__)(struct GSyncApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__gsyncapiCheckMemInterUnmap__)(struct GSyncApi *, NvBool); - NV_STATUS (*__gsyncapiMapTo__)(struct GSyncApi *, RS_RES_MAP_TO_PARAMS *); - NvBool (*__gsyncapiAccessCallback__)(struct GSyncApi *, struct RsClient *, void *, RsAccessRight); - void (*__gsyncapiSetNotificationShare__)(struct GSyncApi *, struct NotifShare *); - NvU32 (*__gsyncapiGetRefCount__)(struct GSyncApi *); - void (*__gsyncapiAddAdditionalDependants__)(struct RsClient *, struct GSyncApi *, RsResourceRef *); - NV_STATUS (*__gsyncapiControl_Prologue__)(struct GSyncApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gsyncapiUnmapFrom__)(struct GSyncApi *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__gsyncapiControl_Epilogue__)(struct GSyncApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gsyncapiUnmap__)(struct GSyncApi *, struct CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__gsyncapiGetMemInterMapParams__)(struct GSyncApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__gsyncapiGetMemoryMappingDescriptor__)(struct GSyncApi *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__gsyncapiControlFilter__)(struct GSyncApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__gsyncapiUnregisterEvent__)(struct GSyncApi *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__gsyncapiControlSerialization_Prologue__)(struct GSyncApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__gsyncapiCanCopy__)(struct GSyncApi *); - NvBool (*__gsyncapiIsPartialUnmapSupported__)(struct GSyncApi *); - void (*__gsyncapiPreDestruct__)(struct GSyncApi *); - NV_STATUS (*__gsyncapiIsDuplicate__)(struct GSyncApi *, NvHandle, NvBool *); - void (*__gsyncapiControlSerialization_Epilogue__)(struct GSyncApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__gsyncapiGetNotificationListPtr__)(struct GSyncApi *); - struct NotifShare *(*__gsyncapiGetNotificationShare__)(struct GSyncApi *); - NV_STATUS (*__gsyncapiMap__)(struct GSyncApi *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NV_STATUS (*__gsyncapiGetOrAllocNotifShare__)(struct GSyncApi *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^3 + struct RsResource *__nvoc_pbase_RsResource; // res super^2 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^2 + struct RmResource *__nvoc_pbase_RmResource; // rmres super + struct INotifier *__nvoc_pbase_INotifier; // inotify super^2 + struct Notifier *__nvoc_pbase_Notifier; // notify super + struct GSyncApi *__nvoc_pbase_GSyncApi; // gsyncapi + + // Vtable with 55 per-object function pointers + NV_STATUS (*__gsyncapiControl__)(struct GSyncApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (rmres) + NV_STATUS (*__gsyncapiCtrlCmdGsyncGetVersion__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_GET_VERSION_PARAMS *); // exported (id=0x30f10101) + NV_STATUS (*__gsyncapiCtrlCmdGetGsyncGpuTopology__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GET_GSYNC_GPU_TOPOLOGY_PARAMS *); // exported (id=0x30f10106) + NV_STATUS (*__gsyncapiCtrlCmdGsyncGetStatusSignals__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_GET_STATUS_SIGNALS_PARAMS *); // exported (id=0x30f10102) + NV_STATUS (*__gsyncapiCtrlCmdGsyncGetControlParams__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_GET_CONTROL_PARAMS_PARAMS *); // exported (id=0x30f10103) + NV_STATUS (*__gsyncapiCtrlCmdGsyncSetControlParams__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_SET_CONTROL_PARAMS_PARAMS *); // exported (id=0x30f10104) + NV_STATUS (*__gsyncapiCtrlCmdGsyncGetControlSync__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_GET_CONTROL_SYNC_PARAMS *); // exported (id=0x30f10110) + NV_STATUS (*__gsyncapiCtrlCmdGsyncSetControlSync__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_SET_CONTROL_SYNC_PARAMS *); // exported (id=0x30f10111) + NV_STATUS (*__gsyncapiCtrlCmdGsyncSetControlUnsync__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_SET_CONTROL_UNSYNC_PARAMS *); // exported (id=0x30f10112) + NV_STATUS (*__gsyncapiCtrlCmdGsyncGetStatusSync__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_GET_STATUS_SYNC_PARAMS *); // exported (id=0x30f10113) + NV_STATUS (*__gsyncapiCtrlCmdGsyncGetStatus__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_GET_STATUS_PARAMS *); // exported (id=0x30f10114) + NV_STATUS (*__gsyncapiCtrlCmdGsyncGetControlTesting__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_GET_CONTROL_TESTING_PARAMS *); // exported (id=0x30f10120) + NV_STATUS (*__gsyncapiCtrlCmdGsyncSetControlTesting__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_SET_CONTROL_TESTING_PARAMS *); // exported (id=0x30f10121) + NV_STATUS (*__gsyncapiCtrlCmdGsyncSetControlWatchdog__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_SET_CONTROL_WATCHDOG_PARAMS *); // exported (id=0x30f10130) + NV_STATUS (*__gsyncapiCtrlCmdGsyncGetControlInterlaceMode__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_GET_CONTROL_INTERLACE_MODE_PARAMS *); // exported (id=0x30f10140) + NV_STATUS (*__gsyncapiCtrlCmdGsyncSetControlInterlaceMode__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_SET_CONTROL_INTERLACE_MODE_PARAMS *); // exported (id=0x30f10141) + NV_STATUS (*__gsyncapiCtrlCmdGsyncGetControlSwapBarrier__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_GET_CONTROL_SWAP_BARRIER_PARAMS *); // exported (id=0x30f10150) + NV_STATUS (*__gsyncapiCtrlCmdGsyncSetControlSwapBarrier__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_SET_CONTROL_SWAP_BARRIER_PARAMS *); // exported (id=0x30f10151) + NV_STATUS (*__gsyncapiCtrlCmdGsyncGetControlSwapLockWindow__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_GET_CONTROL_SWAP_LOCK_WINDOW_PARAMS *); // exported (id=0x30f10153) + NV_STATUS (*__gsyncapiCtrlCmdGsyncGetCaps__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_GET_CAPS_PARAMS *); // exported (id=0x30f10105) + NV_STATUS (*__gsyncapiCtrlCmdGsyncGetOptimizedTiming__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_GET_OPTIMIZED_TIMING_PARAMS *); // exported (id=0x30f10160) + NV_STATUS (*__gsyncapiCtrlCmdGsyncSetEventNotification__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_SET_EVENT_NOTIFICATION_PARAMS *); // exported (id=0x30f10170) + NV_STATUS (*__gsyncapiCtrlCmdGsyncGetControlStereoLockMode__)(struct GSyncApi * /*this*/, NV30F1_CTRL_CMD_GSYNC_GET_CONTROL_STEREO_LOCK_MODE_PARAMS *); // exported (id=0x30f10173) + NV_STATUS (*__gsyncapiCtrlCmdGsyncSetControlStereoLockMode__)(struct GSyncApi * /*this*/, NV30F1_CTRL_CMD_GSYNC_SET_CONTROL_STEREO_LOCK_MODE_PARAMS *); // exported (id=0x30f10172) + NV_STATUS (*__gsyncapiCtrlCmdGsyncReadRegister__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_READ_REGISTER_PARAMS *); // exported (id=0x30f10180) + NV_STATUS (*__gsyncapiCtrlCmdGsyncWriteRegister__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_WRITE_REGISTER_PARAMS *); // exported (id=0x30f10181) + NV_STATUS (*__gsyncapiCtrlCmdGsyncSetLocalSync__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_SET_LOCAL_SYNC_PARAMS *); // exported (id=0x30f10185) + NV_STATUS (*__gsyncapiCtrlCmdGsyncConfigFlash__)(struct GSyncApi * /*this*/, NV30F1_CTRL_CMD_GSYNC_CONFIG_FLASH_PARAMS *); // exported (id=0x30f10186) + NV_STATUS (*__gsyncapiCtrlCmdGsyncGetHouseSyncMode__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_HOUSE_SYNC_MODE_PARAMS *); // exported (id=0x30f10187) + NV_STATUS (*__gsyncapiCtrlCmdGsyncSetHouseSyncMode__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_HOUSE_SYNC_MODE_PARAMS *); // exported (id=0x30f10188) + NvBool (*__gsyncapiAccessCallback__)(struct GSyncApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) + NvBool (*__gsyncapiShareCallback__)(struct GSyncApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__gsyncapiGetMemInterMapParams__)(struct GSyncApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__gsyncapiCheckMemInterUnmap__)(struct GSyncApi * /*this*/, NvBool); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__gsyncapiGetMemoryMappingDescriptor__)(struct GSyncApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__gsyncapiControlSerialization_Prologue__)(struct GSyncApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__gsyncapiControlSerialization_Epilogue__)(struct GSyncApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__gsyncapiControl_Prologue__)(struct GSyncApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__gsyncapiControl_Epilogue__)(struct GSyncApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NvBool (*__gsyncapiCanCopy__)(struct GSyncApi * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__gsyncapiIsDuplicate__)(struct GSyncApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (rmres) + void (*__gsyncapiPreDestruct__)(struct GSyncApi * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__gsyncapiControlFilter__)(struct GSyncApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__gsyncapiMap__)(struct GSyncApi * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NV_STATUS (*__gsyncapiUnmap__)(struct GSyncApi * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NvBool (*__gsyncapiIsPartialUnmapSupported__)(struct GSyncApi * /*this*/); // inline virtual inherited (res) base (rmres) body + NV_STATUS (*__gsyncapiMapTo__)(struct GSyncApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) + NV_STATUS (*__gsyncapiUnmapFrom__)(struct GSyncApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) + NvU32 (*__gsyncapiGetRefCount__)(struct GSyncApi * /*this*/); // virtual inherited (res) base (rmres) + void (*__gsyncapiAddAdditionalDependants__)(struct RsClient *, struct GSyncApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) + PEVENTNOTIFICATION * (*__gsyncapiGetNotificationListPtr__)(struct GSyncApi * /*this*/); // virtual inherited (notify) base (notify) + struct NotifShare * (*__gsyncapiGetNotificationShare__)(struct GSyncApi * /*this*/); // virtual inherited (notify) base (notify) + void (*__gsyncapiSetNotificationShare__)(struct GSyncApi * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) + NV_STATUS (*__gsyncapiUnregisterEvent__)(struct GSyncApi * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) + NV_STATUS (*__gsyncapiGetOrAllocNotifShare__)(struct GSyncApi * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) + + // Data members NvU32 instance; NvU32 classNum; NvU32 notifyAction; @@ -136,6 +155,7 @@ typedef struct GSyncApi GSyncApi; #define __nvoc_class_id_GSyncApi 0x214628 #endif /* __nvoc_class_id_GSyncApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_GSyncApi; #define __staticCast_GSyncApi(pThis) \ @@ -148,348 +168,406 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_GSyncApi; ((GSyncApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(GSyncApi))) #endif //__nvoc_gsync_api_h_disabled - NV_STATUS __nvoc_objCreateDynamic_GSyncApi(GSyncApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_GSyncApi(GSyncApi**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_GSyncApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_GSyncApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define gsyncapiControl_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiControl__ #define gsyncapiControl(pGsyncApi, pCallContext, pParams) gsyncapiControl_DISPATCH(pGsyncApi, pCallContext, pParams) +#define gsyncapiCtrlCmdGsyncGetVersion_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncGetVersion__ #define gsyncapiCtrlCmdGsyncGetVersion(pGsyncApi, pGsyncGetVersionParams) gsyncapiCtrlCmdGsyncGetVersion_DISPATCH(pGsyncApi, pGsyncGetVersionParams) +#define gsyncapiCtrlCmdGetGsyncGpuTopology_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGetGsyncGpuTopology__ #define gsyncapiCtrlCmdGetGsyncGpuTopology(pGsyncApi, pParams) gsyncapiCtrlCmdGetGsyncGpuTopology_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncGetStatusSignals_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncGetStatusSignals__ #define gsyncapiCtrlCmdGsyncGetStatusSignals(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncGetStatusSignals_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncGetControlParams_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncGetControlParams__ #define gsyncapiCtrlCmdGsyncGetControlParams(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncGetControlParams_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncSetControlParams_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncSetControlParams__ #define gsyncapiCtrlCmdGsyncSetControlParams(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncSetControlParams_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncGetControlSync_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncGetControlSync__ #define gsyncapiCtrlCmdGsyncGetControlSync(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncGetControlSync_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncSetControlSync_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncSetControlSync__ #define gsyncapiCtrlCmdGsyncSetControlSync(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncSetControlSync_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncSetControlUnsync_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncSetControlUnsync__ #define gsyncapiCtrlCmdGsyncSetControlUnsync(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncSetControlUnsync_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncGetStatusSync_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncGetStatusSync__ #define gsyncapiCtrlCmdGsyncGetStatusSync(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncGetStatusSync_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncGetStatus_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncGetStatus__ #define gsyncapiCtrlCmdGsyncGetStatus(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncGetStatus_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncGetControlTesting_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncGetControlTesting__ #define gsyncapiCtrlCmdGsyncGetControlTesting(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncGetControlTesting_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncSetControlTesting_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncSetControlTesting__ #define gsyncapiCtrlCmdGsyncSetControlTesting(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncSetControlTesting_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncSetControlWatchdog_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncSetControlWatchdog__ #define gsyncapiCtrlCmdGsyncSetControlWatchdog(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncSetControlWatchdog_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncGetControlInterlaceMode_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncGetControlInterlaceMode__ #define gsyncapiCtrlCmdGsyncGetControlInterlaceMode(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncGetControlInterlaceMode_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncSetControlInterlaceMode_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncSetControlInterlaceMode__ #define gsyncapiCtrlCmdGsyncSetControlInterlaceMode(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncSetControlInterlaceMode_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncGetControlSwapBarrier_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncGetControlSwapBarrier__ #define gsyncapiCtrlCmdGsyncGetControlSwapBarrier(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncGetControlSwapBarrier_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncSetControlSwapBarrier_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncSetControlSwapBarrier__ #define gsyncapiCtrlCmdGsyncSetControlSwapBarrier(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncSetControlSwapBarrier_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncGetControlSwapLockWindow_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncGetControlSwapLockWindow__ #define gsyncapiCtrlCmdGsyncGetControlSwapLockWindow(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncGetControlSwapLockWindow_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncGetCaps_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncGetCaps__ #define gsyncapiCtrlCmdGsyncGetCaps(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncGetCaps_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncGetOptimizedTiming_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncGetOptimizedTiming__ #define gsyncapiCtrlCmdGsyncGetOptimizedTiming(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncGetOptimizedTiming_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncSetEventNotification_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncSetEventNotification__ #define gsyncapiCtrlCmdGsyncSetEventNotification(pGsyncApi, pSetEventParams) gsyncapiCtrlCmdGsyncSetEventNotification_DISPATCH(pGsyncApi, pSetEventParams) +#define gsyncapiCtrlCmdGsyncGetControlStereoLockMode_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncGetControlStereoLockMode__ #define gsyncapiCtrlCmdGsyncGetControlStereoLockMode(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncGetControlStereoLockMode_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncSetControlStereoLockMode_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncSetControlStereoLockMode__ #define gsyncapiCtrlCmdGsyncSetControlStereoLockMode(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncSetControlStereoLockMode_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncReadRegister_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncReadRegister__ #define gsyncapiCtrlCmdGsyncReadRegister(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncReadRegister_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncWriteRegister_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncWriteRegister__ #define gsyncapiCtrlCmdGsyncWriteRegister(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncWriteRegister_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncSetLocalSync_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncSetLocalSync__ #define gsyncapiCtrlCmdGsyncSetLocalSync(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncSetLocalSync_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncConfigFlash_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncConfigFlash__ #define gsyncapiCtrlCmdGsyncConfigFlash(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncConfigFlash_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncGetHouseSyncMode_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncGetHouseSyncMode__ #define gsyncapiCtrlCmdGsyncGetHouseSyncMode(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncGetHouseSyncMode_DISPATCH(pGsyncApi, pParams) +#define gsyncapiCtrlCmdGsyncSetHouseSyncMode_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncSetHouseSyncMode__ #define gsyncapiCtrlCmdGsyncSetHouseSyncMode(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncSetHouseSyncMode_DISPATCH(pGsyncApi, pParams) -#define gsyncapiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) gsyncapiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define gsyncapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) gsyncapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define gsyncapiMapTo(pResource, pParams) gsyncapiMapTo_DISPATCH(pResource, pParams) +#define gsyncapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ #define gsyncapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) gsyncapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define gsyncapiSetNotificationShare(pNotifier, pNotifShare) gsyncapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define gsyncapiGetRefCount(pResource) gsyncapiGetRefCount_DISPATCH(pResource) -#define gsyncapiAddAdditionalDependants(pClient, pResource, pReference) gsyncapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define gsyncapiControl_Prologue(pResource, pCallContext, pParams) gsyncapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define gsyncapiUnmapFrom(pResource, pParams) gsyncapiUnmapFrom_DISPATCH(pResource, pParams) -#define gsyncapiControl_Epilogue(pResource, pCallContext, pParams) gsyncapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define gsyncapiUnmap(pResource, pCallContext, pCpuMapping) gsyncapiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define gsyncapiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ +#define gsyncapiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) gsyncapiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define gsyncapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define gsyncapiGetMemInterMapParams(pRmResource, pParams) gsyncapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define gsyncapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define gsyncapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) gsyncapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define gsyncapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define gsyncapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) gsyncapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define gsyncapiControlFilter(pResource, pCallContext, pParams) gsyncapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define gsyncapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) gsyncapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define gsyncapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define gsyncapiControlSerialization_Prologue(pResource, pCallContext, pParams) gsyncapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define gsyncapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define gsyncapiControlSerialization_Epilogue(pResource, pCallContext, pParams) gsyncapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define gsyncapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ +#define gsyncapiControl_Prologue(pResource, pCallContext, pParams) gsyncapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define gsyncapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define gsyncapiControl_Epilogue(pResource, pCallContext, pParams) gsyncapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define gsyncapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define gsyncapiCanCopy(pResource) gsyncapiCanCopy_DISPATCH(pResource) -#define gsyncapiIsPartialUnmapSupported(pResource) gsyncapiIsPartialUnmapSupported_DISPATCH(pResource) -#define gsyncapiPreDestruct(pResource) gsyncapiPreDestruct_DISPATCH(pResource) +#define gsyncapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define gsyncapiIsDuplicate(pResource, hMemory, pDuplicate) gsyncapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define gsyncapiControlSerialization_Epilogue(pResource, pCallContext, pParams) gsyncapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define gsyncapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define gsyncapiPreDestruct(pResource) gsyncapiPreDestruct_DISPATCH(pResource) +#define gsyncapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define gsyncapiControlFilter(pResource, pCallContext, pParams) gsyncapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define gsyncapiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define gsyncapiMap(pResource, pCallContext, pParams, pCpuMapping) gsyncapiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define gsyncapiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define gsyncapiUnmap(pResource, pCallContext, pCpuMapping) gsyncapiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define gsyncapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define gsyncapiIsPartialUnmapSupported(pResource) gsyncapiIsPartialUnmapSupported_DISPATCH(pResource) +#define gsyncapiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define gsyncapiMapTo(pResource, pParams) gsyncapiMapTo_DISPATCH(pResource, pParams) +#define gsyncapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define gsyncapiUnmapFrom(pResource, pParams) gsyncapiUnmapFrom_DISPATCH(pResource, pParams) +#define gsyncapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define gsyncapiGetRefCount(pResource) gsyncapiGetRefCount_DISPATCH(pResource) +#define gsyncapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define gsyncapiAddAdditionalDependants(pClient, pResource, pReference) gsyncapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define gsyncapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define gsyncapiGetNotificationListPtr(pNotifier) gsyncapiGetNotificationListPtr_DISPATCH(pNotifier) +#define gsyncapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ #define gsyncapiGetNotificationShare(pNotifier) gsyncapiGetNotificationShare_DISPATCH(pNotifier) -#define gsyncapiMap(pResource, pCallContext, pParams, pCpuMapping) gsyncapiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define gsyncapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define gsyncapiSetNotificationShare(pNotifier, pNotifShare) gsyncapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define gsyncapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define gsyncapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) gsyncapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define gsyncapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ #define gsyncapiGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) gsyncapiGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -NV_STATUS gsyncapiControl_IMPL(struct GSyncApi *pGsyncApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); +// Dispatch functions static inline NV_STATUS gsyncapiControl_DISPATCH(struct GSyncApi *pGsyncApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pGsyncApi->__gsyncapiControl__(pGsyncApi, pCallContext, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncGetVersion_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_VERSION_PARAMS *pGsyncGetVersionParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncGetVersion_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_VERSION_PARAMS *pGsyncGetVersionParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncGetVersion__(pGsyncApi, pGsyncGetVersionParams); } -NV_STATUS gsyncapiCtrlCmdGetGsyncGpuTopology_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GET_GSYNC_GPU_TOPOLOGY_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGetGsyncGpuTopology_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GET_GSYNC_GPU_TOPOLOGY_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGetGsyncGpuTopology__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncGetStatusSignals_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_STATUS_SIGNALS_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncGetStatusSignals_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_STATUS_SIGNALS_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncGetStatusSignals__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncGetControlParams_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CONTROL_PARAMS_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncGetControlParams_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CONTROL_PARAMS_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncGetControlParams__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncSetControlParams_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_PARAMS_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncSetControlParams_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_PARAMS_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncSetControlParams__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncGetControlSync_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CONTROL_SYNC_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncGetControlSync_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CONTROL_SYNC_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncGetControlSync__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncSetControlSync_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_SYNC_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncSetControlSync_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_SYNC_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncSetControlSync__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncSetControlUnsync_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_UNSYNC_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncSetControlUnsync_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_UNSYNC_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncSetControlUnsync__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncGetStatusSync_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_STATUS_SYNC_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncGetStatusSync_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_STATUS_SYNC_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncGetStatusSync__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncGetStatus_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_STATUS_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncGetStatus_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_STATUS_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncGetStatus__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncGetControlTesting_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CONTROL_TESTING_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncGetControlTesting_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CONTROL_TESTING_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncGetControlTesting__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncSetControlTesting_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_TESTING_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncSetControlTesting_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_TESTING_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncSetControlTesting__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncSetControlWatchdog_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_WATCHDOG_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncSetControlWatchdog_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_WATCHDOG_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncSetControlWatchdog__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncGetControlInterlaceMode_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CONTROL_INTERLACE_MODE_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncGetControlInterlaceMode_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CONTROL_INTERLACE_MODE_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncGetControlInterlaceMode__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncSetControlInterlaceMode_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_INTERLACE_MODE_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncSetControlInterlaceMode_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_INTERLACE_MODE_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncSetControlInterlaceMode__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncGetControlSwapBarrier_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CONTROL_SWAP_BARRIER_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncGetControlSwapBarrier_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CONTROL_SWAP_BARRIER_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncGetControlSwapBarrier__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncSetControlSwapBarrier_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_SWAP_BARRIER_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncSetControlSwapBarrier_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_SWAP_BARRIER_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncSetControlSwapBarrier__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncGetControlSwapLockWindow_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CONTROL_SWAP_LOCK_WINDOW_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncGetControlSwapLockWindow_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CONTROL_SWAP_LOCK_WINDOW_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncGetControlSwapLockWindow__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncGetCaps_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CAPS_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncGetCaps_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CAPS_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncGetCaps__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncGetOptimizedTiming_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_OPTIMIZED_TIMING_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncGetOptimizedTiming_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_OPTIMIZED_TIMING_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncGetOptimizedTiming__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncSetEventNotification_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_EVENT_NOTIFICATION_PARAMS *pSetEventParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncSetEventNotification_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_EVENT_NOTIFICATION_PARAMS *pSetEventParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncSetEventNotification__(pGsyncApi, pSetEventParams); } -NV_STATUS gsyncapiCtrlCmdGsyncGetControlStereoLockMode_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_CMD_GSYNC_GET_CONTROL_STEREO_LOCK_MODE_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncGetControlStereoLockMode_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_CMD_GSYNC_GET_CONTROL_STEREO_LOCK_MODE_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncGetControlStereoLockMode__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncSetControlStereoLockMode_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_CMD_GSYNC_SET_CONTROL_STEREO_LOCK_MODE_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncSetControlStereoLockMode_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_CMD_GSYNC_SET_CONTROL_STEREO_LOCK_MODE_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncSetControlStereoLockMode__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncReadRegister_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_READ_REGISTER_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncReadRegister_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_READ_REGISTER_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncReadRegister__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncWriteRegister_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_WRITE_REGISTER_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncWriteRegister_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_WRITE_REGISTER_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncWriteRegister__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncSetLocalSync_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_LOCAL_SYNC_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncSetLocalSync_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_LOCAL_SYNC_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncSetLocalSync__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncConfigFlash_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_CMD_GSYNC_CONFIG_FLASH_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncConfigFlash_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_CMD_GSYNC_CONFIG_FLASH_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncConfigFlash__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncGetHouseSyncMode_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_HOUSE_SYNC_MODE_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncGetHouseSyncMode_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_HOUSE_SYNC_MODE_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncGetHouseSyncMode__(pGsyncApi, pParams); } -NV_STATUS gsyncapiCtrlCmdGsyncSetHouseSyncMode_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_HOUSE_SYNC_MODE_PARAMS *pParams); - static inline NV_STATUS gsyncapiCtrlCmdGsyncSetHouseSyncMode_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_HOUSE_SYNC_MODE_PARAMS *pParams) { return pGsyncApi->__gsyncapiCtrlCmdGsyncSetHouseSyncMode__(pGsyncApi, pParams); } -static inline NvBool gsyncapiShareCallback_DISPATCH(struct GSyncApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__gsyncapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NvBool gsyncapiAccessCallback_DISPATCH(struct GSyncApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__gsyncapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS gsyncapiCheckMemInterUnmap_DISPATCH(struct GSyncApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__gsyncapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NvBool gsyncapiShareCallback_DISPATCH(struct GSyncApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__gsyncapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline NV_STATUS gsyncapiMapTo_DISPATCH(struct GSyncApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__gsyncapiMapTo__(pResource, pParams); +static inline NV_STATUS gsyncapiGetMemInterMapParams_DISPATCH(struct GSyncApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__gsyncapiGetMemInterMapParams__(pRmResource, pParams); } -static inline NvBool gsyncapiAccessCallback_DISPATCH(struct GSyncApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__gsyncapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS gsyncapiCheckMemInterUnmap_DISPATCH(struct GSyncApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__gsyncapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline void gsyncapiSetNotificationShare_DISPATCH(struct GSyncApi *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__gsyncapiSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS gsyncapiGetMemoryMappingDescriptor_DISPATCH(struct GSyncApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__gsyncapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NvU32 gsyncapiGetRefCount_DISPATCH(struct GSyncApi *pResource) { - return pResource->__gsyncapiGetRefCount__(pResource); +static inline NV_STATUS gsyncapiControlSerialization_Prologue_DISPATCH(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__gsyncapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline void gsyncapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct GSyncApi *pResource, RsResourceRef *pReference) { - pResource->__gsyncapiAddAdditionalDependants__(pClient, pResource, pReference); +static inline void gsyncapiControlSerialization_Epilogue_DISPATCH(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__gsyncapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS gsyncapiControl_Prologue_DISPATCH(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__gsyncapiControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS gsyncapiUnmapFrom_DISPATCH(struct GSyncApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__gsyncapiUnmapFrom__(pResource, pParams); -} - static inline void gsyncapiControl_Epilogue_DISPATCH(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { pResource->__gsyncapiControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS gsyncapiUnmap_DISPATCH(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__gsyncapiUnmap__(pResource, pCallContext, pCpuMapping); +static inline NvBool gsyncapiCanCopy_DISPATCH(struct GSyncApi *pResource) { + return pResource->__gsyncapiCanCopy__(pResource); } -static inline NV_STATUS gsyncapiGetMemInterMapParams_DISPATCH(struct GSyncApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__gsyncapiGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS gsyncapiIsDuplicate_DISPATCH(struct GSyncApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__gsyncapiIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS gsyncapiGetMemoryMappingDescriptor_DISPATCH(struct GSyncApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__gsyncapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void gsyncapiPreDestruct_DISPATCH(struct GSyncApi *pResource) { + pResource->__gsyncapiPreDestruct__(pResource); } static inline NV_STATUS gsyncapiControlFilter_DISPATCH(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__gsyncapiControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS gsyncapiUnregisterEvent_DISPATCH(struct GSyncApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__gsyncapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static inline NV_STATUS gsyncapiControlSerialization_Prologue_DISPATCH(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gsyncapiControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS gsyncapiMap_DISPATCH(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__gsyncapiMap__(pResource, pCallContext, pParams, pCpuMapping); } -static inline NvBool gsyncapiCanCopy_DISPATCH(struct GSyncApi *pResource) { - return pResource->__gsyncapiCanCopy__(pResource); +static inline NV_STATUS gsyncapiUnmap_DISPATCH(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pResource->__gsyncapiUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool gsyncapiIsPartialUnmapSupported_DISPATCH(struct GSyncApi *pResource) { return pResource->__gsyncapiIsPartialUnmapSupported__(pResource); } -static inline void gsyncapiPreDestruct_DISPATCH(struct GSyncApi *pResource) { - pResource->__gsyncapiPreDestruct__(pResource); +static inline NV_STATUS gsyncapiMapTo_DISPATCH(struct GSyncApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__gsyncapiMapTo__(pResource, pParams); } -static inline NV_STATUS gsyncapiIsDuplicate_DISPATCH(struct GSyncApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__gsyncapiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS gsyncapiUnmapFrom_DISPATCH(struct GSyncApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__gsyncapiUnmapFrom__(pResource, pParams); } -static inline void gsyncapiControlSerialization_Epilogue_DISPATCH(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__gsyncapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 gsyncapiGetRefCount_DISPATCH(struct GSyncApi *pResource) { + return pResource->__gsyncapiGetRefCount__(pResource); +} + +static inline void gsyncapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct GSyncApi *pResource, RsResourceRef *pReference) { + pResource->__gsyncapiAddAdditionalDependants__(pClient, pResource, pReference); } -static inline PEVENTNOTIFICATION *gsyncapiGetNotificationListPtr_DISPATCH(struct GSyncApi *pNotifier) { +static inline PEVENTNOTIFICATION * gsyncapiGetNotificationListPtr_DISPATCH(struct GSyncApi *pNotifier) { return pNotifier->__gsyncapiGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *gsyncapiGetNotificationShare_DISPATCH(struct GSyncApi *pNotifier) { +static inline struct NotifShare * gsyncapiGetNotificationShare_DISPATCH(struct GSyncApi *pNotifier) { return pNotifier->__gsyncapiGetNotificationShare__(pNotifier); } -static inline NV_STATUS gsyncapiMap_DISPATCH(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__gsyncapiMap__(pResource, pCallContext, pParams, pCpuMapping); +static inline void gsyncapiSetNotificationShare_DISPATCH(struct GSyncApi *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__gsyncapiSetNotificationShare__(pNotifier, pNotifShare); +} + +static inline NV_STATUS gsyncapiUnregisterEvent_DISPATCH(struct GSyncApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__gsyncapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS gsyncapiGetOrAllocNotifShare_DISPATCH(struct GSyncApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return pNotifier->__gsyncapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } +NV_STATUS gsyncapiControl_IMPL(struct GSyncApi *pGsyncApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncGetVersion_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_VERSION_PARAMS *pGsyncGetVersionParams); + +NV_STATUS gsyncapiCtrlCmdGetGsyncGpuTopology_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GET_GSYNC_GPU_TOPOLOGY_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncGetStatusSignals_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_STATUS_SIGNALS_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncGetControlParams_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CONTROL_PARAMS_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncSetControlParams_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_PARAMS_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncGetControlSync_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CONTROL_SYNC_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncSetControlSync_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_SYNC_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncSetControlUnsync_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_UNSYNC_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncGetStatusSync_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_STATUS_SYNC_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncGetStatus_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_STATUS_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncGetControlTesting_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CONTROL_TESTING_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncSetControlTesting_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_TESTING_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncSetControlWatchdog_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_WATCHDOG_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncGetControlInterlaceMode_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CONTROL_INTERLACE_MODE_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncSetControlInterlaceMode_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_INTERLACE_MODE_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncGetControlSwapBarrier_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CONTROL_SWAP_BARRIER_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncSetControlSwapBarrier_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_CONTROL_SWAP_BARRIER_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncGetControlSwapLockWindow_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CONTROL_SWAP_LOCK_WINDOW_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncGetCaps_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_CAPS_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncGetOptimizedTiming_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_OPTIMIZED_TIMING_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncSetEventNotification_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_EVENT_NOTIFICATION_PARAMS *pSetEventParams); + +NV_STATUS gsyncapiCtrlCmdGsyncGetControlStereoLockMode_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_CMD_GSYNC_GET_CONTROL_STEREO_LOCK_MODE_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncSetControlStereoLockMode_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_CMD_GSYNC_SET_CONTROL_STEREO_LOCK_MODE_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncReadRegister_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_READ_REGISTER_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncWriteRegister_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_WRITE_REGISTER_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncSetLocalSync_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_SET_LOCAL_SYNC_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncConfigFlash_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_CMD_GSYNC_CONFIG_FLASH_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncGetHouseSyncMode_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_HOUSE_SYNC_MODE_PARAMS *pParams); + +NV_STATUS gsyncapiCtrlCmdGsyncSetHouseSyncMode_IMPL(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_HOUSE_SYNC_MODE_PARAMS *pParams); + NV_STATUS gsyncapiConstruct_IMPL(struct GSyncApi *arg_pGsyncApi, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_gsyncapiConstruct(arg_pGsyncApi, arg_pCallContext, arg_pParams) gsyncapiConstruct_IMPL(arg_pGsyncApi, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_gsync_nvoc.c b/src/nvidia/generated/g_gsync_nvoc.c index 5d69b38cac..4aaa528350 100644 --- a/src/nvidia/generated/g_gsync_nvoc.c +++ b/src/nvidia/generated/g_gsync_nvoc.c @@ -93,10 +93,13 @@ NV_STATUS __nvoc_ctor_OBJGSYNCMGR(OBJGSYNCMGR *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJGSYNCMGR_1(OBJGSYNCMGR *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_OBJGSYNCMGR_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_OBJGSYNCMGR(OBJGSYNCMGR *pThis) { __nvoc_init_funcTable_OBJGSYNCMGR_1(pThis); } diff --git a/src/nvidia/generated/g_gsync_nvoc.h b/src/nvidia/generated/g_gsync_nvoc.h index 33f54eaa65..f5f9c398d5 100644 --- a/src/nvidia/generated/g_gsync_nvoc.h +++ b/src/nvidia/generated/g_gsync_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_GSYNC_NVOC_H_ #define _G_GSYNC_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_gsync_nvoc.h" #ifndef GSYNC_H_ @@ -229,11 +237,20 @@ typedef struct OBJGSYNCMGR *POBJGSYNCMGR; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJGSYNCMGR { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct OBJGSYNCMGR *__nvoc_pbase_OBJGSYNCMGR; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct OBJGSYNCMGR *__nvoc_pbase_OBJGSYNCMGR; // gsyncmgr + + // Data members NvU32 gsyncCount; OBJGSYNC gsyncTable[4]; }; @@ -247,6 +264,7 @@ typedef struct OBJGSYNCMGR OBJGSYNCMGR; #define __nvoc_class_id_OBJGSYNCMGR 0xd07fd0 #endif /* __nvoc_class_id_OBJGSYNCMGR */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGSYNCMGR; #define __staticCast_OBJGSYNCMGR(pThis) \ @@ -259,13 +277,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGSYNCMGR; ((OBJGSYNCMGR*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJGSYNCMGR))) #endif //__nvoc_gsync_h_disabled - NV_STATUS __nvoc_objCreateDynamic_OBJGSYNCMGR(OBJGSYNCMGR**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_OBJGSYNCMGR(OBJGSYNCMGR**, Dynamic*, NvU32); #define __objCreate_OBJGSYNCMGR(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJGSYNCMGR((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS gsyncmgrConstruct_IMPL(struct OBJGSYNCMGR *arg_pGsyncmgr); #define __nvoc_gsyncmgrConstruct(arg_pGsyncmgr) gsyncmgrConstruct_IMPL(arg_pGsyncmgr) diff --git a/src/nvidia/generated/g_hal_mgr_nvoc.c b/src/nvidia/generated/g_hal_mgr_nvoc.c index ba566946c7..11ff428541 100644 --- a/src/nvidia/generated/g_hal_mgr_nvoc.c +++ b/src/nvidia/generated/g_hal_mgr_nvoc.c @@ -93,10 +93,13 @@ NV_STATUS __nvoc_ctor_OBJHALMGR(OBJHALMGR *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJHALMGR_1(OBJHALMGR *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_OBJHALMGR_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_OBJHALMGR(OBJHALMGR *pThis) { __nvoc_init_funcTable_OBJHALMGR_1(pThis); } diff --git a/src/nvidia/generated/g_hal_mgr_nvoc.h b/src/nvidia/generated/g_hal_mgr_nvoc.h index 5df3423ed5..44fefdc791 100644 --- a/src/nvidia/generated/g_hal_mgr_nvoc.h +++ b/src/nvidia/generated/g_hal_mgr_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_HAL_MGR_NVOC_H_ #define _G_HAL_MGR_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_hal_mgr_nvoc.h" #ifndef _HAL_MGR_H_ @@ -62,11 +70,20 @@ typedef struct OBJHALMGR OBJHALMGR; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJHALMGR { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct OBJHALMGR *__nvoc_pbase_OBJHALMGR; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct OBJHALMGR *__nvoc_pbase_OBJHALMGR; // halmgr + + // Data members struct OBJHAL *pHalList[69]; }; @@ -79,6 +96,7 @@ typedef struct OBJHALMGR OBJHALMGR; #define __nvoc_class_id_OBJHALMGR 0xbf26de #endif /* __nvoc_class_id_OBJHALMGR */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJHALMGR; #define __staticCast_OBJHALMGR(pThis) \ @@ -91,50 +109,53 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJHALMGR; ((OBJHALMGR*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJHALMGR))) #endif //__nvoc_hal_mgr_h_disabled - NV_STATUS __nvoc_objCreateDynamic_OBJHALMGR(OBJHALMGR**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_OBJHALMGR(OBJHALMGR**, Dynamic*, NvU32); #define __objCreate_OBJHALMGR(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJHALMGR((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS halmgrConstruct_IMPL(struct OBJHALMGR *arg_); #define __nvoc_halmgrConstruct(arg_) halmgrConstruct_IMPL(arg_) -void halmgrDestruct_IMPL(struct OBJHALMGR *arg0); +void halmgrDestruct_IMPL(struct OBJHALMGR *arg1); -#define __nvoc_halmgrDestruct(arg0) halmgrDestruct_IMPL(arg0) -NV_STATUS halmgrCreateHal_IMPL(struct OBJHALMGR *arg0, NvU32 arg1); +#define __nvoc_halmgrDestruct(arg1) halmgrDestruct_IMPL(arg1) +NV_STATUS halmgrCreateHal_IMPL(struct OBJHALMGR *arg1, NvU32 arg2); #ifdef __nvoc_hal_mgr_h_disabled -static inline NV_STATUS halmgrCreateHal(struct OBJHALMGR *arg0, NvU32 arg1) { +static inline NV_STATUS halmgrCreateHal(struct OBJHALMGR *arg1, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("OBJHALMGR was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_hal_mgr_h_disabled -#define halmgrCreateHal(arg0, arg1) halmgrCreateHal_IMPL(arg0, arg1) +#define halmgrCreateHal(arg1, arg2) halmgrCreateHal_IMPL(arg1, arg2) #endif //__nvoc_hal_mgr_h_disabled -NV_STATUS halmgrGetHalForGpu_IMPL(struct OBJHALMGR *arg0, NvU32 arg1, NvU32 arg2, NvU32 *arg3); +NV_STATUS halmgrGetHalForGpu_IMPL(struct OBJHALMGR *arg1, NvU32 arg2, NvU32 arg3, NvU32 *arg4); #ifdef __nvoc_hal_mgr_h_disabled -static inline NV_STATUS halmgrGetHalForGpu(struct OBJHALMGR *arg0, NvU32 arg1, NvU32 arg2, NvU32 *arg3) { +static inline NV_STATUS halmgrGetHalForGpu(struct OBJHALMGR *arg1, NvU32 arg2, NvU32 arg3, NvU32 *arg4) { NV_ASSERT_FAILED_PRECOMP("OBJHALMGR was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_hal_mgr_h_disabled -#define halmgrGetHalForGpu(arg0, arg1, arg2, arg3) halmgrGetHalForGpu_IMPL(arg0, arg1, arg2, arg3) +#define halmgrGetHalForGpu(arg1, arg2, arg3, arg4) halmgrGetHalForGpu_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_hal_mgr_h_disabled -struct OBJHAL *halmgrGetHal_IMPL(struct OBJHALMGR *arg0, NvU32 arg1); +struct OBJHAL *halmgrGetHal_IMPL(struct OBJHALMGR *arg1, NvU32 arg2); #ifdef __nvoc_hal_mgr_h_disabled -static inline struct OBJHAL *halmgrGetHal(struct OBJHALMGR *arg0, NvU32 arg1) { +static inline struct OBJHAL *halmgrGetHal(struct OBJHALMGR *arg1, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("OBJHALMGR was disabled!"); return NULL; } #else //__nvoc_hal_mgr_h_disabled -#define halmgrGetHal(arg0, arg1) halmgrGetHal_IMPL(arg0, arg1) +#define halmgrGetHal(arg1, arg2) halmgrGetHal_IMPL(arg1, arg2) #endif //__nvoc_hal_mgr_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_hal_nvoc.c b/src/nvidia/generated/g_hal_nvoc.c index 5ef27d29ac..d17e67e41f 100644 --- a/src/nvidia/generated/g_hal_nvoc.c +++ b/src/nvidia/generated/g_hal_nvoc.c @@ -87,10 +87,13 @@ NV_STATUS __nvoc_ctor_OBJHAL(OBJHAL *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJHAL_1(OBJHAL *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_OBJHAL_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_OBJHAL(OBJHAL *pThis) { __nvoc_init_funcTable_OBJHAL_1(pThis); } diff --git a/src/nvidia/generated/g_hal_nvoc.h b/src/nvidia/generated/g_hal_nvoc.h index 94be7c40a7..25ecbc195a 100644 --- a/src/nvidia/generated/g_hal_nvoc.h +++ b/src/nvidia/generated/g_hal_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_HAL_NVOC_H_ #define _G_HAL_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_hal_nvoc.h" #ifndef _OBJHAL_H_ @@ -87,11 +95,20 @@ typedef struct OBJHAL OBJHAL; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJHAL { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct OBJHAL *__nvoc_pbase_OBJHAL; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct OBJHAL *__nvoc_pbase_OBJHAL; // objhal + + // Data members struct MODULEDESCRIPTOR moduleDescriptor; }; @@ -104,6 +121,7 @@ typedef struct OBJHAL OBJHAL; #define __nvoc_class_id_OBJHAL 0xe803b6 #endif /* __nvoc_class_id_OBJHAL */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJHAL; #define __staticCast_OBJHAL(pThis) \ @@ -116,13 +134,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJHAL; ((OBJHAL*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJHAL))) #endif //__nvoc_hal_h_disabled - NV_STATUS __nvoc_objCreateDynamic_OBJHAL(OBJHAL**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_OBJHAL(OBJHAL**, Dynamic*, NvU32); #define __objCreate_OBJHAL(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJHAL((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions PMODULEDESCRIPTOR objhalGetModuleDescriptor_IMPL(struct OBJHAL *pHal); #ifdef __nvoc_hal_h_disabled diff --git a/src/nvidia/generated/g_hal_stubs.h b/src/nvidia/generated/g_hal_stubs.h index f2bed2161c..a31e75e466 100644 --- a/src/nvidia/generated/g_hal_stubs.h +++ b/src/nvidia/generated/g_hal_stubs.h @@ -1380,18 +1380,6 @@ NV_STATUS rpcCtrlGetCePceMask_STUB( return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION; } -// RPC:hal:CTRL_GET_NVLINK_PEER_ID_MASK - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X -NV_STATUS rpcCtrlGetNvlinkPeerIdMask_STUB( - POBJGPU pGpu, - POBJRPC pRpc, - NvHandle arg3, - NvHandle arg4, - void *pArg5 -) -{ - return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION; -} - // RPC:hal:CTRL_GPU_EVICT_CTX - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X NV_STATUS rpcCtrlGpuEvictCtx_STUB( POBJGPU pGpu, @@ -1737,6 +1725,16 @@ NV_STATUS rpcCtrlFabricMemStats_STUB( return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION; } +// RPC:hal:CTRL_CMD_NVLINK_INBAND_SEND_DATA - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X +NV_STATUS rpcCtrlCmdNvlinkInbandSendData_STUB( + POBJGPU pGpu, + POBJRPC pRpc, + NV2080_CTRL_NVLINK_INBAND_SEND_DATA_PARAMS *pArg3 +) +{ + return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION; +} + // RPC:hal:CTRL_GR_CTXSW_ZCULL_BIND - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X NV_STATUS rpcCtrlGrCtxswZcullBind_STUB( POBJGPU pGpu, @@ -2501,6 +2499,17 @@ NV_STATUS deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS_STUB( return NV_OK; } +// RPCSTRUCTURECOPY:hal:GPU_EXEC_SYSPIPE_INFO - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X +NV_STATUS deserialize_GPU_EXEC_SYSPIPE_INFO_STUB( + GPU_EXEC_SYSPIPE_INFO *data, + NvU8 *stream, + NvU32 streamSize, + NvU32 *offset +) +{ + return NV_OK; +} + // RPCSTRUCTURECOPY:hal:VGPU_BSP_GET_CAPS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X NV_STATUS deserialize_VGPU_BSP_GET_CAPS_STUB( VGPU_BSP_GET_CAPS *data, diff --git a/src/nvidia/generated/g_hda_codec_api_nvoc.c b/src/nvidia/generated/g_hda_codec_api_nvoc.c index 20ceab5afe..96bb01a586 100644 --- a/src/nvidia/generated/g_hda_codec_api_nvoc.c +++ b/src/nvidia/generated/g_hda_codec_api_nvoc.c @@ -93,106 +93,134 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_Hdacodec = /*pExportInfo=*/ &__nvoc_export_info_Hdacodec }; -static NvBool __nvoc_thunk_GpuResource_hdacodecShareCallback(struct Hdacodec *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// 25 up-thunk(s) defined to bridge methods in Hdacodec to superclasses + +// hdacodecControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecControl(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_hdacodecCheckMemInterUnmap(struct Hdacodec *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_Hdacodec_RmResource.offset), bSubdeviceHandleProvided); +// hdacodecMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecMap(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_hdacodecMapTo(struct Hdacodec *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Hdacodec_RsResource.offset), pParams); +// hdacodecUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecUnmap(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_GpuResource_hdacodecGetMapAddrSpace(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// hdacodecShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_hdacodecShareCallback(struct Hdacodec *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NvU32 __nvoc_thunk_RsResource_hdacodecGetRefCount(struct Hdacodec *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Hdacodec_RsResource.offset)); +// hdacodecGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecGetRegBaseOffsetAndSize(struct Hdacodec *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), pGpu, pOffset, pSize); } -static void __nvoc_thunk_RsResource_hdacodecAddAdditionalDependants(struct RsClient *pClient, struct Hdacodec *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Hdacodec_RsResource.offset), pReference); +// hdacodecGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecGetMapAddrSpace(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_RmResource_hdacodecControl_Prologue(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Hdacodec_RmResource.offset), pCallContext, pParams); +// hdacodecInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecInternalControlForward(struct Hdacodec *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_GpuResource_hdacodecGetRegBaseOffsetAndSize(struct Hdacodec *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), pGpu, pOffset, pSize); +// hdacodecGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_hdacodecGetInternalObjectHandle(struct Hdacodec *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_hdacodecInternalControlForward(struct Hdacodec *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), command, pParams, size); +// hdacodecAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_hdacodecAccessCallback(struct Hdacodec *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RsResource_hdacodecUnmapFrom(struct Hdacodec *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Hdacodec_RsResource.offset), pParams); +// hdacodecGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_hdacodecGetMemInterMapParams(struct Hdacodec *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Hdacodec_RmResource.offset), pParams); } -static void __nvoc_thunk_RmResource_hdacodecControl_Epilogue(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Hdacodec_RmResource.offset), pCallContext, pParams); +// hdacodecCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_hdacodecCheckMemInterUnmap(struct Hdacodec *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Hdacodec_RmResource.offset), bSubdeviceHandleProvided); } -static NvHandle __nvoc_thunk_GpuResource_hdacodecGetInternalObjectHandle(struct Hdacodec *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset)); +// hdacodecGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_hdacodecGetMemoryMappingDescriptor(struct Hdacodec *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Hdacodec_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_GpuResource_hdacodecControl(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), pCallContext, pParams); +// hdacodecControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_hdacodecControlSerialization_Prologue(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_hdacodecUnmap(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), pCallContext, pCpuMapping); +// hdacodecControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_hdacodecControlSerialization_Epilogue(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_hdacodecGetMemInterMapParams(struct Hdacodec *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_Hdacodec_RmResource.offset), pParams); +// hdacodecControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_hdacodecControl_Prologue(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_hdacodecGetMemoryMappingDescriptor(struct Hdacodec *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_Hdacodec_RmResource.offset), ppMemDesc); +// hdacodecControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_hdacodecControl_Epilogue(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_hdacodecControlFilter(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Hdacodec_RsResource.offset), pCallContext, pParams); +// hdacodecCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_hdacodecCanCopy(struct Hdacodec *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RmResource_hdacodecControlSerialization_Prologue(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Hdacodec_RmResource.offset), pCallContext, pParams); +// hdacodecIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_hdacodecIsDuplicate(struct Hdacodec *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RsResource.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_RsResource_hdacodecCanCopy(struct Hdacodec *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Hdacodec_RsResource.offset)); +// hdacodecPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_hdacodecPreDestruct(struct Hdacodec *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_hdacodecIsPartialUnmapSupported(struct Hdacodec *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Hdacodec_RsResource.offset)); +// hdacodecControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_hdacodecControlFilter(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_hdacodecPreDestruct(struct Hdacodec *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Hdacodec_RsResource.offset)); +// hdacodecIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_hdacodecIsPartialUnmapSupported(struct Hdacodec *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_hdacodecIsDuplicate(struct Hdacodec *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Hdacodec_RsResource.offset), hMemory, pDuplicate); +// hdacodecMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_hdacodecMapTo(struct Hdacodec *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_hdacodecControlSerialization_Epilogue(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Hdacodec_RmResource.offset), pCallContext, pParams); +// hdacodecUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_hdacodecUnmapFrom(struct Hdacodec *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_hdacodecMap(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// hdacodecGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_hdacodecGetRefCount(struct Hdacodec *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_hdacodecAccessCallback(struct Hdacodec *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Hdacodec_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// hdacodecAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_hdacodecAddAdditionalDependants(struct RsClient *pClient, struct Hdacodec *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_Hdacodec = { /*numEntries=*/ 0, @@ -228,61 +256,91 @@ NV_STATUS __nvoc_ctor_Hdacodec(Hdacodec *pThis, struct CALL_CONTEXT * arg_pCallC return status; } +// Vtable initialization static void __nvoc_init_funcTable_Hdacodec_1(Hdacodec *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - pThis->__hdacodecShareCallback__ = &__nvoc_thunk_GpuResource_hdacodecShareCallback; + // hdacodecControl -- virtual inherited (gpures) base (gpures) + pThis->__hdacodecControl__ = &__nvoc_up_thunk_GpuResource_hdacodecControl; - pThis->__hdacodecCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_hdacodecCheckMemInterUnmap; + // hdacodecMap -- virtual inherited (gpures) base (gpures) + pThis->__hdacodecMap__ = &__nvoc_up_thunk_GpuResource_hdacodecMap; - pThis->__hdacodecMapTo__ = &__nvoc_thunk_RsResource_hdacodecMapTo; + // hdacodecUnmap -- virtual inherited (gpures) base (gpures) + pThis->__hdacodecUnmap__ = &__nvoc_up_thunk_GpuResource_hdacodecUnmap; - pThis->__hdacodecGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_hdacodecGetMapAddrSpace; + // hdacodecShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__hdacodecShareCallback__ = &__nvoc_up_thunk_GpuResource_hdacodecShareCallback; - pThis->__hdacodecGetRefCount__ = &__nvoc_thunk_RsResource_hdacodecGetRefCount; + // hdacodecGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__hdacodecGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_hdacodecGetRegBaseOffsetAndSize; - pThis->__hdacodecAddAdditionalDependants__ = &__nvoc_thunk_RsResource_hdacodecAddAdditionalDependants; + // hdacodecGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__hdacodecGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_hdacodecGetMapAddrSpace; - pThis->__hdacodecControl_Prologue__ = &__nvoc_thunk_RmResource_hdacodecControl_Prologue; + // hdacodecInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__hdacodecInternalControlForward__ = &__nvoc_up_thunk_GpuResource_hdacodecInternalControlForward; - pThis->__hdacodecGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_hdacodecGetRegBaseOffsetAndSize; + // hdacodecGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__hdacodecGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_hdacodecGetInternalObjectHandle; - pThis->__hdacodecInternalControlForward__ = &__nvoc_thunk_GpuResource_hdacodecInternalControlForward; + // hdacodecAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__hdacodecAccessCallback__ = &__nvoc_up_thunk_RmResource_hdacodecAccessCallback; - pThis->__hdacodecUnmapFrom__ = &__nvoc_thunk_RsResource_hdacodecUnmapFrom; + // hdacodecGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__hdacodecGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_hdacodecGetMemInterMapParams; - pThis->__hdacodecControl_Epilogue__ = &__nvoc_thunk_RmResource_hdacodecControl_Epilogue; + // hdacodecCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__hdacodecCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_hdacodecCheckMemInterUnmap; - pThis->__hdacodecGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_hdacodecGetInternalObjectHandle; + // hdacodecGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__hdacodecGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_hdacodecGetMemoryMappingDescriptor; - pThis->__hdacodecControl__ = &__nvoc_thunk_GpuResource_hdacodecControl; + // hdacodecControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__hdacodecControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_hdacodecControlSerialization_Prologue; - pThis->__hdacodecUnmap__ = &__nvoc_thunk_GpuResource_hdacodecUnmap; + // hdacodecControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__hdacodecControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_hdacodecControlSerialization_Epilogue; - pThis->__hdacodecGetMemInterMapParams__ = &__nvoc_thunk_RmResource_hdacodecGetMemInterMapParams; + // hdacodecControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__hdacodecControl_Prologue__ = &__nvoc_up_thunk_RmResource_hdacodecControl_Prologue; - pThis->__hdacodecGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_hdacodecGetMemoryMappingDescriptor; + // hdacodecControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__hdacodecControl_Epilogue__ = &__nvoc_up_thunk_RmResource_hdacodecControl_Epilogue; - pThis->__hdacodecControlFilter__ = &__nvoc_thunk_RsResource_hdacodecControlFilter; + // hdacodecCanCopy -- virtual inherited (res) base (gpures) + pThis->__hdacodecCanCopy__ = &__nvoc_up_thunk_RsResource_hdacodecCanCopy; - pThis->__hdacodecControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_hdacodecControlSerialization_Prologue; + // hdacodecIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__hdacodecIsDuplicate__ = &__nvoc_up_thunk_RsResource_hdacodecIsDuplicate; - pThis->__hdacodecCanCopy__ = &__nvoc_thunk_RsResource_hdacodecCanCopy; + // hdacodecPreDestruct -- virtual inherited (res) base (gpures) + pThis->__hdacodecPreDestruct__ = &__nvoc_up_thunk_RsResource_hdacodecPreDestruct; - pThis->__hdacodecIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_hdacodecIsPartialUnmapSupported; + // hdacodecControlFilter -- virtual inherited (res) base (gpures) + pThis->__hdacodecControlFilter__ = &__nvoc_up_thunk_RsResource_hdacodecControlFilter; - pThis->__hdacodecPreDestruct__ = &__nvoc_thunk_RsResource_hdacodecPreDestruct; + // hdacodecIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__hdacodecIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_hdacodecIsPartialUnmapSupported; - pThis->__hdacodecIsDuplicate__ = &__nvoc_thunk_RsResource_hdacodecIsDuplicate; + // hdacodecMapTo -- virtual inherited (res) base (gpures) + pThis->__hdacodecMapTo__ = &__nvoc_up_thunk_RsResource_hdacodecMapTo; - pThis->__hdacodecControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_hdacodecControlSerialization_Epilogue; + // hdacodecUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__hdacodecUnmapFrom__ = &__nvoc_up_thunk_RsResource_hdacodecUnmapFrom; - pThis->__hdacodecMap__ = &__nvoc_thunk_GpuResource_hdacodecMap; + // hdacodecGetRefCount -- virtual inherited (res) base (gpures) + pThis->__hdacodecGetRefCount__ = &__nvoc_up_thunk_RsResource_hdacodecGetRefCount; - pThis->__hdacodecAccessCallback__ = &__nvoc_thunk_RmResource_hdacodecAccessCallback; -} + // hdacodecAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__hdacodecAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_hdacodecAddAdditionalDependants; +} // End __nvoc_init_funcTable_Hdacodec_1 with approximately 25 basic block(s). + +// Initialize vtable(s) for 25 virtual method(s). void __nvoc_init_funcTable_Hdacodec(Hdacodec *pThis) { + + // Initialize vtable(s) with 25 per-object function pointer(s). __nvoc_init_funcTable_Hdacodec_1(pThis); } diff --git a/src/nvidia/generated/g_hda_codec_api_nvoc.h b/src/nvidia/generated/g_hda_codec_api_nvoc.h index 5e8da2e3c7..7ae8322f52 100644 --- a/src/nvidia/generated/g_hda_codec_api_nvoc.h +++ b/src/nvidia/generated/g_hda_codec_api_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_HDA_CODEC_API_NVOC_H_ #define _G_HDA_CODEC_API_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_hda_codec_api_nvoc.h" #ifndef HDA_CODEC_API_H @@ -50,40 +58,49 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct Hdacodec { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct Hdacodec *__nvoc_pbase_Hdacodec; - NvBool (*__hdacodecShareCallback__)(struct Hdacodec *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__hdacodecCheckMemInterUnmap__)(struct Hdacodec *, NvBool); - NV_STATUS (*__hdacodecMapTo__)(struct Hdacodec *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__hdacodecGetMapAddrSpace__)(struct Hdacodec *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__hdacodecGetRefCount__)(struct Hdacodec *); - void (*__hdacodecAddAdditionalDependants__)(struct RsClient *, struct Hdacodec *, RsResourceRef *); - NV_STATUS (*__hdacodecControl_Prologue__)(struct Hdacodec *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__hdacodecGetRegBaseOffsetAndSize__)(struct Hdacodec *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__hdacodecInternalControlForward__)(struct Hdacodec *, NvU32, void *, NvU32); - NV_STATUS (*__hdacodecUnmapFrom__)(struct Hdacodec *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__hdacodecControl_Epilogue__)(struct Hdacodec *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__hdacodecGetInternalObjectHandle__)(struct Hdacodec *); - NV_STATUS (*__hdacodecControl__)(struct Hdacodec *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__hdacodecUnmap__)(struct Hdacodec *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__hdacodecGetMemInterMapParams__)(struct Hdacodec *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__hdacodecGetMemoryMappingDescriptor__)(struct Hdacodec *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__hdacodecControlFilter__)(struct Hdacodec *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__hdacodecControlSerialization_Prologue__)(struct Hdacodec *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__hdacodecCanCopy__)(struct Hdacodec *); - NvBool (*__hdacodecIsPartialUnmapSupported__)(struct Hdacodec *); - void (*__hdacodecPreDestruct__)(struct Hdacodec *); - NV_STATUS (*__hdacodecIsDuplicate__)(struct Hdacodec *, NvHandle, NvBool *); - void (*__hdacodecControlSerialization_Epilogue__)(struct Hdacodec *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__hdacodecMap__)(struct Hdacodec *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__hdacodecAccessCallback__)(struct Hdacodec *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct Hdacodec *__nvoc_pbase_Hdacodec; // hdacodec + + // Vtable with 25 per-object function pointers + NV_STATUS (*__hdacodecControl__)(struct Hdacodec * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__hdacodecMap__)(struct Hdacodec * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__hdacodecUnmap__)(struct Hdacodec * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__hdacodecShareCallback__)(struct Hdacodec * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__hdacodecGetRegBaseOffsetAndSize__)(struct Hdacodec * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__hdacodecGetMapAddrSpace__)(struct Hdacodec * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__hdacodecInternalControlForward__)(struct Hdacodec * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__hdacodecGetInternalObjectHandle__)(struct Hdacodec * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__hdacodecAccessCallback__)(struct Hdacodec * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__hdacodecGetMemInterMapParams__)(struct Hdacodec * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__hdacodecCheckMemInterUnmap__)(struct Hdacodec * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__hdacodecGetMemoryMappingDescriptor__)(struct Hdacodec * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__hdacodecControlSerialization_Prologue__)(struct Hdacodec * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__hdacodecControlSerialization_Epilogue__)(struct Hdacodec * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__hdacodecControl_Prologue__)(struct Hdacodec * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__hdacodecControl_Epilogue__)(struct Hdacodec * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__hdacodecCanCopy__)(struct Hdacodec * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__hdacodecIsDuplicate__)(struct Hdacodec * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__hdacodecPreDestruct__)(struct Hdacodec * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__hdacodecControlFilter__)(struct Hdacodec * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__hdacodecIsPartialUnmapSupported__)(struct Hdacodec * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__hdacodecMapTo__)(struct Hdacodec * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__hdacodecUnmapFrom__)(struct Hdacodec * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__hdacodecGetRefCount__)(struct Hdacodec * /*this*/); // virtual inherited (res) base (gpures) + void (*__hdacodecAddAdditionalDependants__)(struct RsClient *, struct Hdacodec * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) }; #ifndef __NVOC_CLASS_Hdacodec_TYPEDEF__ @@ -95,6 +112,7 @@ typedef struct Hdacodec Hdacodec; #define __nvoc_class_id_Hdacodec 0xf59a20 #endif /* __nvoc_class_id_Hdacodec */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_Hdacodec; #define __staticCast_Hdacodec(pThis) \ @@ -107,136 +125,164 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_Hdacodec; ((Hdacodec*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(Hdacodec))) #endif //__nvoc_hda_codec_api_h_disabled - NV_STATUS __nvoc_objCreateDynamic_Hdacodec(Hdacodec**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_Hdacodec(Hdacodec**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_Hdacodec(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_Hdacodec((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define hdacodecControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define hdacodecControl(pGpuResource, pCallContext, pParams) hdacodecControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define hdacodecMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define hdacodecMap(pGpuResource, pCallContext, pParams, pCpuMapping) hdacodecMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define hdacodecUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define hdacodecUnmap(pGpuResource, pCallContext, pCpuMapping) hdacodecUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define hdacodecShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define hdacodecShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) hdacodecShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define hdacodecCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) hdacodecCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define hdacodecMapTo(pResource, pParams) hdacodecMapTo_DISPATCH(pResource, pParams) -#define hdacodecGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) hdacodecGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define hdacodecGetRefCount(pResource) hdacodecGetRefCount_DISPATCH(pResource) -#define hdacodecAddAdditionalDependants(pClient, pResource, pReference) hdacodecAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define hdacodecControl_Prologue(pResource, pCallContext, pParams) hdacodecControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define hdacodecGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define hdacodecGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) hdacodecGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define hdacodecGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define hdacodecGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) hdacodecGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define hdacodecInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define hdacodecInternalControlForward(pGpuResource, command, pParams, size) hdacodecInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define hdacodecUnmapFrom(pResource, pParams) hdacodecUnmapFrom_DISPATCH(pResource, pParams) -#define hdacodecControl_Epilogue(pResource, pCallContext, pParams) hdacodecControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define hdacodecGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define hdacodecGetInternalObjectHandle(pGpuResource) hdacodecGetInternalObjectHandle_DISPATCH(pGpuResource) -#define hdacodecControl(pGpuResource, pCallContext, pParams) hdacodecControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define hdacodecUnmap(pGpuResource, pCallContext, pCpuMapping) hdacodecUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define hdacodecAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define hdacodecAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) hdacodecAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define hdacodecGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define hdacodecGetMemInterMapParams(pRmResource, pParams) hdacodecGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define hdacodecCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define hdacodecCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) hdacodecCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define hdacodecGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define hdacodecGetMemoryMappingDescriptor(pRmResource, ppMemDesc) hdacodecGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define hdacodecControlFilter(pResource, pCallContext, pParams) hdacodecControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define hdacodecControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define hdacodecControlSerialization_Prologue(pResource, pCallContext, pParams) hdacodecControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define hdacodecControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define hdacodecControlSerialization_Epilogue(pResource, pCallContext, pParams) hdacodecControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define hdacodecControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define hdacodecControl_Prologue(pResource, pCallContext, pParams) hdacodecControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define hdacodecControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define hdacodecControl_Epilogue(pResource, pCallContext, pParams) hdacodecControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define hdacodecCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define hdacodecCanCopy(pResource) hdacodecCanCopy_DISPATCH(pResource) -#define hdacodecIsPartialUnmapSupported(pResource) hdacodecIsPartialUnmapSupported_DISPATCH(pResource) -#define hdacodecPreDestruct(pResource) hdacodecPreDestruct_DISPATCH(pResource) +#define hdacodecIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define hdacodecIsDuplicate(pResource, hMemory, pDuplicate) hdacodecIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define hdacodecControlSerialization_Epilogue(pResource, pCallContext, pParams) hdacodecControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define hdacodecMap(pGpuResource, pCallContext, pParams, pCpuMapping) hdacodecMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define hdacodecAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) hdacodecAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -static inline NvBool hdacodecShareCallback_DISPATCH(struct Hdacodec *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__hdacodecShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS hdacodecCheckMemInterUnmap_DISPATCH(struct Hdacodec *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__hdacodecCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); -} - -static inline NV_STATUS hdacodecMapTo_DISPATCH(struct Hdacodec *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__hdacodecMapTo__(pResource, pParams); -} +#define hdacodecPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define hdacodecPreDestruct(pResource) hdacodecPreDestruct_DISPATCH(pResource) +#define hdacodecControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define hdacodecControlFilter(pResource, pCallContext, pParams) hdacodecControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define hdacodecIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define hdacodecIsPartialUnmapSupported(pResource) hdacodecIsPartialUnmapSupported_DISPATCH(pResource) +#define hdacodecMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define hdacodecMapTo(pResource, pParams) hdacodecMapTo_DISPATCH(pResource, pParams) +#define hdacodecUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define hdacodecUnmapFrom(pResource, pParams) hdacodecUnmapFrom_DISPATCH(pResource, pParams) +#define hdacodecGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define hdacodecGetRefCount(pResource) hdacodecGetRefCount_DISPATCH(pResource) +#define hdacodecAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define hdacodecAddAdditionalDependants(pClient, pResource, pReference) hdacodecAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -static inline NV_STATUS hdacodecGetMapAddrSpace_DISPATCH(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__hdacodecGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +// Dispatch functions +static inline NV_STATUS hdacodecControl_DISPATCH(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__hdacodecControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 hdacodecGetRefCount_DISPATCH(struct Hdacodec *pResource) { - return pResource->__hdacodecGetRefCount__(pResource); +static inline NV_STATUS hdacodecMap_DISPATCH(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__hdacodecMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void hdacodecAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct Hdacodec *pResource, RsResourceRef *pReference) { - pResource->__hdacodecAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS hdacodecUnmap_DISPATCH(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__hdacodecUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS hdacodecControl_Prologue_DISPATCH(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__hdacodecControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool hdacodecShareCallback_DISPATCH(struct Hdacodec *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__hdacodecShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS hdacodecGetRegBaseOffsetAndSize_DISPATCH(struct Hdacodec *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__hdacodecGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS hdacodecInternalControlForward_DISPATCH(struct Hdacodec *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__hdacodecInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS hdacodecUnmapFrom_DISPATCH(struct Hdacodec *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__hdacodecUnmapFrom__(pResource, pParams); +static inline NV_STATUS hdacodecGetMapAddrSpace_DISPATCH(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__hdacodecGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void hdacodecControl_Epilogue_DISPATCH(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__hdacodecControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS hdacodecInternalControlForward_DISPATCH(struct Hdacodec *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__hdacodecInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle hdacodecGetInternalObjectHandle_DISPATCH(struct Hdacodec *pGpuResource) { return pGpuResource->__hdacodecGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS hdacodecControl_DISPATCH(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__hdacodecControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS hdacodecUnmap_DISPATCH(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__hdacodecUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool hdacodecAccessCallback_DISPATCH(struct Hdacodec *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__hdacodecAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS hdacodecGetMemInterMapParams_DISPATCH(struct Hdacodec *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__hdacodecGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS hdacodecGetMemoryMappingDescriptor_DISPATCH(struct Hdacodec *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__hdacodecGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS hdacodecCheckMemInterUnmap_DISPATCH(struct Hdacodec *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__hdacodecCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS hdacodecControlFilter_DISPATCH(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__hdacodecControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS hdacodecGetMemoryMappingDescriptor_DISPATCH(struct Hdacodec *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__hdacodecGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS hdacodecControlSerialization_Prologue_DISPATCH(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__hdacodecControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void hdacodecControlSerialization_Epilogue_DISPATCH(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__hdacodecControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS hdacodecControl_Prologue_DISPATCH(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__hdacodecControl_Prologue__(pResource, pCallContext, pParams); +} + +static inline void hdacodecControl_Epilogue_DISPATCH(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__hdacodecControl_Epilogue__(pResource, pCallContext, pParams); +} + static inline NvBool hdacodecCanCopy_DISPATCH(struct Hdacodec *pResource) { return pResource->__hdacodecCanCopy__(pResource); } -static inline NvBool hdacodecIsPartialUnmapSupported_DISPATCH(struct Hdacodec *pResource) { - return pResource->__hdacodecIsPartialUnmapSupported__(pResource); +static inline NV_STATUS hdacodecIsDuplicate_DISPATCH(struct Hdacodec *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__hdacodecIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void hdacodecPreDestruct_DISPATCH(struct Hdacodec *pResource) { pResource->__hdacodecPreDestruct__(pResource); } -static inline NV_STATUS hdacodecIsDuplicate_DISPATCH(struct Hdacodec *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__hdacodecIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS hdacodecControlFilter_DISPATCH(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__hdacodecControlFilter__(pResource, pCallContext, pParams); } -static inline void hdacodecControlSerialization_Epilogue_DISPATCH(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__hdacodecControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool hdacodecIsPartialUnmapSupported_DISPATCH(struct Hdacodec *pResource) { + return pResource->__hdacodecIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS hdacodecMap_DISPATCH(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__hdacodecMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS hdacodecMapTo_DISPATCH(struct Hdacodec *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__hdacodecMapTo__(pResource, pParams); } -static inline NvBool hdacodecAccessCallback_DISPATCH(struct Hdacodec *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__hdacodecAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS hdacodecUnmapFrom_DISPATCH(struct Hdacodec *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__hdacodecUnmapFrom__(pResource, pParams); +} + +static inline NvU32 hdacodecGetRefCount_DISPATCH(struct Hdacodec *pResource) { + return pResource->__hdacodecGetRefCount__(pResource); +} + +static inline void hdacodecAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct Hdacodec *pResource, RsResourceRef *pReference) { + pResource->__hdacodecAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS hdacodecConstruct_IMPL(struct Hdacodec *arg_pHdacodecApi, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_heap_nvoc.c b/src/nvidia/generated/g_heap_nvoc.c index b187663f67..9b2b9573df 100644 --- a/src/nvidia/generated/g_heap_nvoc.c +++ b/src/nvidia/generated/g_heap_nvoc.c @@ -88,10 +88,13 @@ NV_STATUS __nvoc_ctor_Heap(Heap *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_Heap_1(Heap *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_Heap_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_Heap(Heap *pThis) { __nvoc_init_funcTable_Heap_1(pThis); } diff --git a/src/nvidia/generated/g_heap_nvoc.h b/src/nvidia/generated/g_heap_nvoc.h index d213fd79ff..f89c0bfbdd 100644 --- a/src/nvidia/generated/g_heap_nvoc.h +++ b/src/nvidia/generated/g_heap_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_HEAP_NVOC_H_ #define _G_HEAP_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_heap_nvoc.h" #ifndef _OBJHEAP_H_ @@ -52,6 +60,7 @@ extern "C" { #include "resserv/rs_resource.h" #include "containers/eheap_old.h" + struct Memory; #ifndef __NVOC_CLASS_Memory_TYPEDEF__ @@ -282,13 +291,24 @@ typedef struct #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct Heap { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct Heap *__nvoc_pbase_Heap; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct Heap *__nvoc_pbase_Heap; // heap + + // 2 PDB properties NvBool PDB_PROP_HEAP_NONCONTIG_ALLOC_BY_DEFAULT; NvBool PDB_PROP_HEAP_PAGE_SHUFFLE; + + // Data members HEAP_TYPE_INTERNAL heapType; void *pHeapTypeSpecificData; NvU64 refCount; @@ -327,6 +347,7 @@ typedef struct Heap Heap; #define __nvoc_class_id_Heap 0x556e9a #endif /* __nvoc_class_id_Heap */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_Heap; #define __staticCast_Heap(pThis) \ @@ -339,6 +360,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_Heap; ((Heap*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(Heap))) #endif //__nvoc_heap_h_disabled +// Property macros #define PDB_PROP_HEAP_NONCONTIG_ALLOC_BY_DEFAULT_BASE_CAST #define PDB_PROP_HEAP_NONCONTIG_ALLOC_BY_DEFAULT_BASE_NAME PDB_PROP_HEAP_NONCONTIG_ALLOC_BY_DEFAULT #define PDB_PROP_HEAP_PAGE_SHUFFLE_BASE_CAST @@ -350,259 +372,263 @@ NV_STATUS __nvoc_objCreate_Heap(Heap**, Dynamic*, NvU32); #define __objCreate_Heap(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_Heap((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -NV_STATUS heapInit_IMPL(struct OBJGPU *arg0, struct Heap *arg1, NvU64 arg2, NvU64 arg3, HEAP_TYPE_INTERNAL arg4, NvU32 arg5, void *arg6); + +// Wrapper macros + +// Dispatch functions +NV_STATUS heapInit_IMPL(struct OBJGPU *arg1, struct Heap *arg2, NvU64 arg3, NvU64 arg4, HEAP_TYPE_INTERNAL arg5, NvU32 arg6, void *arg7); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapInit(struct OBJGPU *arg0, struct Heap *arg1, NvU64 arg2, NvU64 arg3, HEAP_TYPE_INTERNAL arg4, NvU32 arg5, void *arg6) { +static inline NV_STATUS heapInit(struct OBJGPU *arg1, struct Heap *arg2, NvU64 arg3, NvU64 arg4, HEAP_TYPE_INTERNAL arg5, NvU32 arg6, void *arg7) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapInit(arg0, arg1, arg2, arg3, arg4, arg5, arg6) heapInit_IMPL(arg0, arg1, arg2, arg3, arg4, arg5, arg6) +#define heapInit(arg1, arg2, arg3, arg4, arg5, arg6, arg7) heapInit_IMPL(arg1, arg2, arg3, arg4, arg5, arg6, arg7) #endif //__nvoc_heap_h_disabled -NV_STATUS heapInitInternal_IMPL(struct OBJGPU *arg0, struct Heap *arg1, NvU64 arg2, NvU64 arg3, HEAP_TYPE_INTERNAL arg4, void *arg5); +NV_STATUS heapInitInternal_IMPL(struct OBJGPU *arg1, struct Heap *arg2, NvU64 arg3, NvU64 arg4, HEAP_TYPE_INTERNAL arg5, void *arg6); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapInitInternal(struct OBJGPU *arg0, struct Heap *arg1, NvU64 arg2, NvU64 arg3, HEAP_TYPE_INTERNAL arg4, void *arg5) { +static inline NV_STATUS heapInitInternal(struct OBJGPU *arg1, struct Heap *arg2, NvU64 arg3, NvU64 arg4, HEAP_TYPE_INTERNAL arg5, void *arg6) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapInitInternal(arg0, arg1, arg2, arg3, arg4, arg5) heapInitInternal_IMPL(arg0, arg1, arg2, arg3, arg4, arg5) +#define heapInitInternal(arg1, arg2, arg3, arg4, arg5, arg6) heapInitInternal_IMPL(arg1, arg2, arg3, arg4, arg5, arg6) #endif //__nvoc_heap_h_disabled -void heapDestruct_IMPL(struct Heap *arg0); +void heapDestruct_IMPL(struct Heap *arg1); -#define __nvoc_heapDestruct(arg0) heapDestruct_IMPL(arg0) -NV_STATUS heapAlloc_IMPL(struct OBJGPU *arg0, NvHandle arg1, struct Heap *arg2, MEMORY_ALLOCATION_REQUEST *arg3, NvHandle arg4, OBJHEAP_ALLOC_DATA *arg5, FB_ALLOC_INFO *arg6, HWRESOURCE_INFO **arg7, NvBool *arg8, NvBool arg9, NvBool arg10); +#define __nvoc_heapDestruct(arg1) heapDestruct_IMPL(arg1) +NV_STATUS heapAlloc_IMPL(struct OBJGPU *arg1, NvHandle arg2, struct Heap *arg3, MEMORY_ALLOCATION_REQUEST *arg4, NvHandle arg5, OBJHEAP_ALLOC_DATA *arg6, FB_ALLOC_INFO *arg7, HWRESOURCE_INFO **arg8, NvBool *arg9, NvBool arg10, NvBool arg11); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapAlloc(struct OBJGPU *arg0, NvHandle arg1, struct Heap *arg2, MEMORY_ALLOCATION_REQUEST *arg3, NvHandle arg4, OBJHEAP_ALLOC_DATA *arg5, FB_ALLOC_INFO *arg6, HWRESOURCE_INFO **arg7, NvBool *arg8, NvBool arg9, NvBool arg10) { +static inline NV_STATUS heapAlloc(struct OBJGPU *arg1, NvHandle arg2, struct Heap *arg3, MEMORY_ALLOCATION_REQUEST *arg4, NvHandle arg5, OBJHEAP_ALLOC_DATA *arg6, FB_ALLOC_INFO *arg7, HWRESOURCE_INFO **arg8, NvBool *arg9, NvBool arg10, NvBool arg11) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapAlloc(arg0, arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8, arg9, arg10) heapAlloc_IMPL(arg0, arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8, arg9, arg10) +#define heapAlloc(arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8, arg9, arg10, arg11) heapAlloc_IMPL(arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8, arg9, arg10, arg11) #endif //__nvoc_heap_h_disabled -NV_STATUS heapFree_IMPL(struct OBJGPU *arg0, struct Heap *arg1, NvHandle hClient, NvHandle hDevice, NvU32 owner, MEMORY_DESCRIPTOR *pMemDesc); +NV_STATUS heapFree_IMPL(struct OBJGPU *arg1, struct Heap *arg2, NvHandle hClient, NvHandle hDevice, NvU32 owner, MEMORY_DESCRIPTOR *pMemDesc); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapFree(struct OBJGPU *arg0, struct Heap *arg1, NvHandle hClient, NvHandle hDevice, NvU32 owner, MEMORY_DESCRIPTOR *pMemDesc) { +static inline NV_STATUS heapFree(struct OBJGPU *arg1, struct Heap *arg2, NvHandle hClient, NvHandle hDevice, NvU32 owner, MEMORY_DESCRIPTOR *pMemDesc) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapFree(arg0, arg1, hClient, hDevice, owner, pMemDesc) heapFree_IMPL(arg0, arg1, hClient, hDevice, owner, pMemDesc) +#define heapFree(arg1, arg2, hClient, hDevice, owner, pMemDesc) heapFree_IMPL(arg1, arg2, hClient, hDevice, owner, pMemDesc) #endif //__nvoc_heap_h_disabled -NV_STATUS heapReference_IMPL(struct OBJGPU *arg0, struct Heap *arg1, NvU32 arg2, MEMORY_DESCRIPTOR *arg3); +NV_STATUS heapReference_IMPL(struct OBJGPU *arg1, struct Heap *arg2, NvU32 arg3, MEMORY_DESCRIPTOR *arg4); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapReference(struct OBJGPU *arg0, struct Heap *arg1, NvU32 arg2, MEMORY_DESCRIPTOR *arg3) { +static inline NV_STATUS heapReference(struct OBJGPU *arg1, struct Heap *arg2, NvU32 arg3, MEMORY_DESCRIPTOR *arg4) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapReference(arg0, arg1, arg2, arg3) heapReference_IMPL(arg0, arg1, arg2, arg3) +#define heapReference(arg1, arg2, arg3, arg4) heapReference_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_heap_h_disabled -NV_STATUS heapInfo_IMPL(struct Heap *arg0, NvU64 *arg1, NvU64 *arg2, NvU64 *arg3, NvU64 *arg4, NvU64 *arg5); +NV_STATUS heapInfo_IMPL(struct Heap *arg1, NvU64 *arg2, NvU64 *arg3, NvU64 *arg4, NvU64 *arg5, NvU64 *arg6); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapInfo(struct Heap *arg0, NvU64 *arg1, NvU64 *arg2, NvU64 *arg3, NvU64 *arg4, NvU64 *arg5) { +static inline NV_STATUS heapInfo(struct Heap *arg1, NvU64 *arg2, NvU64 *arg3, NvU64 *arg4, NvU64 *arg5, NvU64 *arg6) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapInfo(arg0, arg1, arg2, arg3, arg4, arg5) heapInfo_IMPL(arg0, arg1, arg2, arg3, arg4, arg5) +#define heapInfo(arg1, arg2, arg3, arg4, arg5, arg6) heapInfo_IMPL(arg1, arg2, arg3, arg4, arg5, arg6) #endif //__nvoc_heap_h_disabled -NV_STATUS heapInfoTypeAllocBlocks_IMPL(struct Heap *arg0, NvU32 arg1, NvU64 *arg2); +NV_STATUS heapInfoTypeAllocBlocks_IMPL(struct Heap *arg1, NvU32 arg2, NvU64 *arg3); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapInfoTypeAllocBlocks(struct Heap *arg0, NvU32 arg1, NvU64 *arg2) { +static inline NV_STATUS heapInfoTypeAllocBlocks(struct Heap *arg1, NvU32 arg2, NvU64 *arg3) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapInfoTypeAllocBlocks(arg0, arg1, arg2) heapInfoTypeAllocBlocks_IMPL(arg0, arg1, arg2) +#define heapInfoTypeAllocBlocks(arg1, arg2, arg3) heapInfoTypeAllocBlocks_IMPL(arg1, arg2, arg3) #endif //__nvoc_heap_h_disabled -NV_STATUS heapGetSize_IMPL(struct Heap *arg0, NvU64 *arg1); +NV_STATUS heapGetSize_IMPL(struct Heap *arg1, NvU64 *arg2); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapGetSize(struct Heap *arg0, NvU64 *arg1) { +static inline NV_STATUS heapGetSize(struct Heap *arg1, NvU64 *arg2) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapGetSize(arg0, arg1) heapGetSize_IMPL(arg0, arg1) +#define heapGetSize(arg1, arg2) heapGetSize_IMPL(arg1, arg2) #endif //__nvoc_heap_h_disabled -NV_STATUS heapGetFree_IMPL(struct Heap *arg0, NvU64 *arg1); +NV_STATUS heapGetFree_IMPL(struct Heap *arg1, NvU64 *arg2); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapGetFree(struct Heap *arg0, NvU64 *arg1) { +static inline NV_STATUS heapGetFree(struct Heap *arg1, NvU64 *arg2) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapGetFree(arg0, arg1) heapGetFree_IMPL(arg0, arg1) +#define heapGetFree(arg1, arg2) heapGetFree_IMPL(arg1, arg2) #endif //__nvoc_heap_h_disabled -NV_STATUS heapGetUsableSize_IMPL(struct Heap *arg0, NvU64 *arg1); +NV_STATUS heapGetUsableSize_IMPL(struct Heap *arg1, NvU64 *arg2); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapGetUsableSize(struct Heap *arg0, NvU64 *arg1) { +static inline NV_STATUS heapGetUsableSize(struct Heap *arg1, NvU64 *arg2) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapGetUsableSize(arg0, arg1) heapGetUsableSize_IMPL(arg0, arg1) +#define heapGetUsableSize(arg1, arg2) heapGetUsableSize_IMPL(arg1, arg2) #endif //__nvoc_heap_h_disabled -NV_STATUS heapGetBase_IMPL(struct Heap *arg0, NvU64 *arg1); +NV_STATUS heapGetBase_IMPL(struct Heap *arg1, NvU64 *arg2); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapGetBase(struct Heap *arg0, NvU64 *arg1) { +static inline NV_STATUS heapGetBase(struct Heap *arg1, NvU64 *arg2) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapGetBase(arg0, arg1) heapGetBase_IMPL(arg0, arg1) +#define heapGetBase(arg1, arg2) heapGetBase_IMPL(arg1, arg2) #endif //__nvoc_heap_h_disabled -NV_STATUS heapGetBlock_IMPL(struct Heap *arg0, NvU64 arg1, struct MEM_BLOCK **arg2); +NV_STATUS heapGetBlock_IMPL(struct Heap *arg1, NvU64 arg2, struct MEM_BLOCK **arg3); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapGetBlock(struct Heap *arg0, NvU64 arg1, struct MEM_BLOCK **arg2) { +static inline NV_STATUS heapGetBlock(struct Heap *arg1, NvU64 arg2, struct MEM_BLOCK **arg3) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapGetBlock(arg0, arg1, arg2) heapGetBlock_IMPL(arg0, arg1, arg2) +#define heapGetBlock(arg1, arg2, arg3) heapGetBlock_IMPL(arg1, arg2, arg3) #endif //__nvoc_heap_h_disabled -NV_STATUS heapGetBlockHandle_IMPL(struct Heap *arg0, NvU32 arg1, NvU32 arg2, NvU64 arg3, NvBool arg4, NvHandle *arg5); +NV_STATUS heapGetBlockHandle_IMPL(struct Heap *arg1, NvU32 arg2, NvU32 arg3, NvU64 arg4, NvBool arg5, NvHandle *arg6); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapGetBlockHandle(struct Heap *arg0, NvU32 arg1, NvU32 arg2, NvU64 arg3, NvBool arg4, NvHandle *arg5) { +static inline NV_STATUS heapGetBlockHandle(struct Heap *arg1, NvU32 arg2, NvU32 arg3, NvU64 arg4, NvBool arg5, NvHandle *arg6) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapGetBlockHandle(arg0, arg1, arg2, arg3, arg4, arg5) heapGetBlockHandle_IMPL(arg0, arg1, arg2, arg3, arg4, arg5) +#define heapGetBlockHandle(arg1, arg2, arg3, arg4, arg5, arg6) heapGetBlockHandle_IMPL(arg1, arg2, arg3, arg4, arg5, arg6) #endif //__nvoc_heap_h_disabled -NvU32 heapGetNumBlocks_IMPL(struct Heap *arg0); +NvU32 heapGetNumBlocks_IMPL(struct Heap *arg1); #ifdef __nvoc_heap_h_disabled -static inline NvU32 heapGetNumBlocks(struct Heap *arg0) { +static inline NvU32 heapGetNumBlocks(struct Heap *arg1) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return 0; } #else //__nvoc_heap_h_disabled -#define heapGetNumBlocks(arg0) heapGetNumBlocks_IMPL(arg0) +#define heapGetNumBlocks(arg1) heapGetNumBlocks_IMPL(arg1) #endif //__nvoc_heap_h_disabled -NV_STATUS heapGetBlockInfo_IMPL(struct Heap *arg0, NvU32 arg1, NVOS32_HEAP_DUMP_BLOCK *arg2); +NV_STATUS heapGetBlockInfo_IMPL(struct Heap *arg1, NvU32 arg2, NVOS32_HEAP_DUMP_BLOCK *arg3); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapGetBlockInfo(struct Heap *arg0, NvU32 arg1, NVOS32_HEAP_DUMP_BLOCK *arg2) { +static inline NV_STATUS heapGetBlockInfo(struct Heap *arg1, NvU32 arg2, NVOS32_HEAP_DUMP_BLOCK *arg3) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapGetBlockInfo(arg0, arg1, arg2) heapGetBlockInfo_IMPL(arg0, arg1, arg2) +#define heapGetBlockInfo(arg1, arg2, arg3) heapGetBlockInfo_IMPL(arg1, arg2, arg3) #endif //__nvoc_heap_h_disabled -NV_STATUS heapAllocHint_IMPL(struct OBJGPU *arg0, struct Heap *arg1, NvHandle arg2, NvHandle arg3, HEAP_ALLOC_HINT_PARAMS *arg4); +NV_STATUS heapAllocHint_IMPL(struct OBJGPU *arg1, struct Heap *arg2, NvHandle arg3, NvHandle arg4, HEAP_ALLOC_HINT_PARAMS *arg5); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapAllocHint(struct OBJGPU *arg0, struct Heap *arg1, NvHandle arg2, NvHandle arg3, HEAP_ALLOC_HINT_PARAMS *arg4) { +static inline NV_STATUS heapAllocHint(struct OBJGPU *arg1, struct Heap *arg2, NvHandle arg3, NvHandle arg4, HEAP_ALLOC_HINT_PARAMS *arg5) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapAllocHint(arg0, arg1, arg2, arg3, arg4) heapAllocHint_IMPL(arg0, arg1, arg2, arg3, arg4) +#define heapAllocHint(arg1, arg2, arg3, arg4, arg5) heapAllocHint_IMPL(arg1, arg2, arg3, arg4, arg5) #endif //__nvoc_heap_h_disabled -NV_STATUS heapHwAlloc_IMPL(struct OBJGPU *arg0, struct Heap *arg1, NvHandle arg2, NvHandle arg3, NvHandle arg4, MEMORY_HW_RESOURCES_ALLOCATION_REQUEST *arg5, NvU32 *arg6, NvU32 *arg7); +NV_STATUS heapHwAlloc_IMPL(struct OBJGPU *arg1, struct Heap *arg2, NvHandle arg3, NvHandle arg4, NvHandle arg5, MEMORY_HW_RESOURCES_ALLOCATION_REQUEST *arg6, NvU32 *arg7, NvU32 *arg8); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapHwAlloc(struct OBJGPU *arg0, struct Heap *arg1, NvHandle arg2, NvHandle arg3, NvHandle arg4, MEMORY_HW_RESOURCES_ALLOCATION_REQUEST *arg5, NvU32 *arg6, NvU32 *arg7) { +static inline NV_STATUS heapHwAlloc(struct OBJGPU *arg1, struct Heap *arg2, NvHandle arg3, NvHandle arg4, NvHandle arg5, MEMORY_HW_RESOURCES_ALLOCATION_REQUEST *arg6, NvU32 *arg7, NvU32 *arg8) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapHwAlloc(arg0, arg1, arg2, arg3, arg4, arg5, arg6, arg7) heapHwAlloc_IMPL(arg0, arg1, arg2, arg3, arg4, arg5, arg6, arg7) +#define heapHwAlloc(arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8) heapHwAlloc_IMPL(arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8) #endif //__nvoc_heap_h_disabled -void heapHwFree_IMPL(struct OBJGPU *arg0, struct Heap *arg1, struct Memory *arg2, NvU32 arg3); +void heapHwFree_IMPL(struct OBJGPU *arg1, struct Heap *arg2, struct Memory *arg3, NvU32 arg4); #ifdef __nvoc_heap_h_disabled -static inline void heapHwFree(struct OBJGPU *arg0, struct Heap *arg1, struct Memory *arg2, NvU32 arg3) { +static inline void heapHwFree(struct OBJGPU *arg1, struct Heap *arg2, struct Memory *arg3, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); } #else //__nvoc_heap_h_disabled -#define heapHwFree(arg0, arg1, arg2, arg3) heapHwFree_IMPL(arg0, arg1, arg2, arg3) +#define heapHwFree(arg1, arg2, arg3, arg4) heapHwFree_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_heap_h_disabled -NV_STATUS heapFreeBlockCount_IMPL(struct OBJGPU *arg0, struct Heap *arg1, NvU32 *arg2); +NV_STATUS heapFreeBlockCount_IMPL(struct OBJGPU *arg1, struct Heap *arg2, NvU32 *arg3); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapFreeBlockCount(struct OBJGPU *arg0, struct Heap *arg1, NvU32 *arg2) { +static inline NV_STATUS heapFreeBlockCount(struct OBJGPU *arg1, struct Heap *arg2, NvU32 *arg3) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapFreeBlockCount(arg0, arg1, arg2) heapFreeBlockCount_IMPL(arg0, arg1, arg2) +#define heapFreeBlockCount(arg1, arg2, arg3) heapFreeBlockCount_IMPL(arg1, arg2, arg3) #endif //__nvoc_heap_h_disabled -NV_STATUS heapFreeBlockInfo_IMPL(struct OBJGPU *arg0, struct Heap *arg1, NvU32 arg2, void *arg3); +NV_STATUS heapFreeBlockInfo_IMPL(struct OBJGPU *arg1, struct Heap *arg2, NvU32 arg3, void *arg4); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapFreeBlockInfo(struct OBJGPU *arg0, struct Heap *arg1, NvU32 arg2, void *arg3) { +static inline NV_STATUS heapFreeBlockInfo(struct OBJGPU *arg1, struct Heap *arg2, NvU32 arg3, void *arg4) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapFreeBlockInfo(arg0, arg1, arg2, arg3) heapFreeBlockInfo_IMPL(arg0, arg1, arg2, arg3) +#define heapFreeBlockInfo(arg1, arg2, arg3, arg4) heapFreeBlockInfo_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_heap_h_disabled -NV_STATUS heapInitRegistryOverrides_IMPL(struct OBJGPU *arg0, struct Heap *arg1); +NV_STATUS heapInitRegistryOverrides_IMPL(struct OBJGPU *arg1, struct Heap *arg2); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapInitRegistryOverrides(struct OBJGPU *arg0, struct Heap *arg1) { +static inline NV_STATUS heapInitRegistryOverrides(struct OBJGPU *arg1, struct Heap *arg2) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapInitRegistryOverrides(arg0, arg1) heapInitRegistryOverrides_IMPL(arg0, arg1) +#define heapInitRegistryOverrides(arg1, arg2) heapInitRegistryOverrides_IMPL(arg1, arg2) #endif //__nvoc_heap_h_disabled -NV_STATUS heapBlackListPages_IMPL(struct OBJGPU *arg0, struct Heap *arg1); +NV_STATUS heapBlackListPages_IMPL(struct OBJGPU *arg1, struct Heap *arg2); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapBlackListPages(struct OBJGPU *arg0, struct Heap *arg1) { +static inline NV_STATUS heapBlackListPages(struct OBJGPU *arg1, struct Heap *arg2) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapBlackListPages(arg0, arg1) heapBlackListPages_IMPL(arg0, arg1) +#define heapBlackListPages(arg1, arg2) heapBlackListPages_IMPL(arg1, arg2) #endif //__nvoc_heap_h_disabled -NV_STATUS heapFreeBlackListedPages_IMPL(struct OBJGPU *arg0, struct Heap *arg1); +NV_STATUS heapFreeBlackListedPages_IMPL(struct OBJGPU *arg1, struct Heap *arg2); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapFreeBlackListedPages(struct OBJGPU *arg0, struct Heap *arg1) { +static inline NV_STATUS heapFreeBlackListedPages(struct OBJGPU *arg1, struct Heap *arg2) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapFreeBlackListedPages(arg0, arg1) heapFreeBlackListedPages_IMPL(arg0, arg1) +#define heapFreeBlackListedPages(arg1, arg2) heapFreeBlackListedPages_IMPL(arg1, arg2) #endif //__nvoc_heap_h_disabled NV_STATUS heapAddPageToBlackList_IMPL(struct OBJGPU *pGpu, struct Heap *pHeap, NvU64 pageNumber, NvU32 type); @@ -616,80 +642,80 @@ static inline NV_STATUS heapAddPageToBlackList(struct OBJGPU *pGpu, struct Heap #define heapAddPageToBlackList(pGpu, pHeap, pageNumber, type) heapAddPageToBlackList_IMPL(pGpu, pHeap, pageNumber, type) #endif //__nvoc_heap_h_disabled -NV_STATUS heapStoreBlackList_IMPL(struct OBJGPU *arg0, struct Heap *arg1, NvU64 *arg2, NvU64 *arg3, NvU32 arg4); +NV_STATUS heapStoreBlackList_IMPL(struct OBJGPU *arg1, struct Heap *arg2, NvU64 *arg3, NvU64 *arg4, NvU32 arg5); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapStoreBlackList(struct OBJGPU *arg0, struct Heap *arg1, NvU64 *arg2, NvU64 *arg3, NvU32 arg4) { +static inline NV_STATUS heapStoreBlackList(struct OBJGPU *arg1, struct Heap *arg2, NvU64 *arg3, NvU64 *arg4, NvU32 arg5) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapStoreBlackList(arg0, arg1, arg2, arg3, arg4) heapStoreBlackList_IMPL(arg0, arg1, arg2, arg3, arg4) +#define heapStoreBlackList(arg1, arg2, arg3, arg4, arg5) heapStoreBlackList_IMPL(arg1, arg2, arg3, arg4, arg5) #endif //__nvoc_heap_h_disabled -NvBool heapIsPmaManaged_IMPL(struct OBJGPU *arg0, struct Heap *arg1, NvU64 arg2, NvU64 arg3); +NvBool heapIsPmaManaged_IMPL(struct OBJGPU *arg1, struct Heap *arg2, NvU64 arg3, NvU64 arg4); #ifdef __nvoc_heap_h_disabled -static inline NvBool heapIsPmaManaged(struct OBJGPU *arg0, struct Heap *arg1, NvU64 arg2, NvU64 arg3) { +static inline NvBool heapIsPmaManaged(struct OBJGPU *arg1, struct Heap *arg2, NvU64 arg3, NvU64 arg4) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_FALSE; } #else //__nvoc_heap_h_disabled -#define heapIsPmaManaged(arg0, arg1, arg2, arg3) heapIsPmaManaged_IMPL(arg0, arg1, arg2, arg3) +#define heapIsPmaManaged(arg1, arg2, arg3, arg4) heapIsPmaManaged_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_heap_h_disabled -NvU32 heapAddRef_IMPL(struct Heap *arg0); +NvU32 heapAddRef_IMPL(struct Heap *arg1); #ifdef __nvoc_heap_h_disabled -static inline NvU32 heapAddRef(struct Heap *arg0) { +static inline NvU32 heapAddRef(struct Heap *arg1) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return 0; } #else //__nvoc_heap_h_disabled -#define heapAddRef(arg0) heapAddRef_IMPL(arg0) +#define heapAddRef(arg1) heapAddRef_IMPL(arg1) #endif //__nvoc_heap_h_disabled -NvU32 heapRemoveRef_IMPL(struct Heap *arg0); +NvU32 heapRemoveRef_IMPL(struct Heap *arg1); #ifdef __nvoc_heap_h_disabled -static inline NvU32 heapRemoveRef(struct Heap *arg0) { +static inline NvU32 heapRemoveRef(struct Heap *arg1) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return 0; } #else //__nvoc_heap_h_disabled -#define heapRemoveRef(arg0) heapRemoveRef_IMPL(arg0) +#define heapRemoveRef(arg1) heapRemoveRef_IMPL(arg1) #endif //__nvoc_heap_h_disabled -NV_STATUS heapResize_IMPL(struct Heap *arg0, NvS64 arg1); +NV_STATUS heapResize_IMPL(struct Heap *arg1, NvS64 arg2); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapResize(struct Heap *arg0, NvS64 arg1) { +static inline NV_STATUS heapResize(struct Heap *arg1, NvS64 arg2) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapResize(arg0, arg1) heapResize_IMPL(arg0, arg1) +#define heapResize(arg1, arg2) heapResize_IMPL(arg1, arg2) #endif //__nvoc_heap_h_disabled -void heapFilterBlackListPages_IMPL(struct Heap *arg0, NvU64 arg1, NvU64 arg2); +void heapFilterBlackListPages_IMPL(struct Heap *arg1, NvU64 arg2, NvU64 arg3); #ifdef __nvoc_heap_h_disabled -static inline void heapFilterBlackListPages(struct Heap *arg0, NvU64 arg1, NvU64 arg2) { +static inline void heapFilterBlackListPages(struct Heap *arg1, NvU64 arg2, NvU64 arg3) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); } #else //__nvoc_heap_h_disabled -#define heapFilterBlackListPages(arg0, arg1, arg2) heapFilterBlackListPages_IMPL(arg0, arg1, arg2) +#define heapFilterBlackListPages(arg1, arg2, arg3) heapFilterBlackListPages_IMPL(arg1, arg2, arg3) #endif //__nvoc_heap_h_disabled -NV_STATUS heapStorePendingBlackList_IMPL(struct OBJGPU *arg0, struct Heap *arg1, NvU64 arg2, NvU64 arg3); +NV_STATUS heapStorePendingBlackList_IMPL(struct OBJGPU *arg1, struct Heap *arg2, NvU64 arg3, NvU64 arg4); #ifdef __nvoc_heap_h_disabled -static inline NV_STATUS heapStorePendingBlackList(struct OBJGPU *arg0, struct Heap *arg1, NvU64 arg2, NvU64 arg3) { +static inline NV_STATUS heapStorePendingBlackList(struct OBJGPU *arg1, struct Heap *arg2, NvU64 arg3, NvU64 arg4) { NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_heap_h_disabled -#define heapStorePendingBlackList(arg0, arg1, arg2, arg3) heapStorePendingBlackList_IMPL(arg0, arg1, arg2, arg3) +#define heapStorePendingBlackList(arg1, arg2, arg3, arg4) heapStorePendingBlackList_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_heap_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_host_eng_nvoc.c b/src/nvidia/generated/g_host_eng_nvoc.c index 9286db1481..441831201e 100644 --- a/src/nvidia/generated/g_host_eng_nvoc.c +++ b/src/nvidia/generated/g_host_eng_nvoc.c @@ -73,13 +73,19 @@ NV_STATUS __nvoc_ctor_OBJHOSTENG(OBJHOSTENG *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJHOSTENG_1(OBJHOSTENG *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // hostengHaltAndReset -- virtual pThis->__hostengHaltAndReset__ = &hostengHaltAndReset_IMPL; -} +} // End __nvoc_init_funcTable_OBJHOSTENG_1 with approximately 1 basic block(s). + +// Initialize vtable(s) for 1 virtual method(s). void __nvoc_init_funcTable_OBJHOSTENG(OBJHOSTENG *pThis) { + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_OBJHOSTENG_1(pThis); } diff --git a/src/nvidia/generated/g_host_eng_nvoc.h b/src/nvidia/generated/g_host_eng_nvoc.h index 6a440d163e..5419c96afe 100644 --- a/src/nvidia/generated/g_host_eng_nvoc.h +++ b/src/nvidia/generated/g_host_eng_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_HOST_ENG_NVOC_H_ #define _G_HOST_ENG_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_host_eng_nvoc.h" #ifndef HOST_ENG_H @@ -59,10 +67,17 @@ typedef struct OBJHOSTENG *POBJHOSTENG; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJHOSTENG { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; - struct OBJHOSTENG *__nvoc_pbase_OBJHOSTENG; - NV_STATUS (*__hostengHaltAndReset__)(struct OBJGPU *, struct OBJHOSTENG *, RMTIMEOUT *); + + // Ancestor object pointers for `staticCast` feature + struct OBJHOSTENG *__nvoc_pbase_OBJHOSTENG; // hosteng + + // Vtable with 1 per-object function pointer + NV_STATUS (*__hostengHaltAndReset__)(struct OBJGPU *, struct OBJHOSTENG * /*this*/, RMTIMEOUT *); // virtual }; #ifndef __NVOC_CLASS_OBJHOSTENG_TYPEDEF__ @@ -74,6 +89,7 @@ typedef struct OBJHOSTENG OBJHOSTENG; #define __nvoc_class_id_OBJHOSTENG 0xb356e7 #endif /* __nvoc_class_id_OBJHOSTENG */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJHOSTENG; #define __staticCast_OBJHOSTENG(pThis) \ @@ -86,20 +102,24 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJHOSTENG; ((OBJHOSTENG*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJHOSTENG))) #endif //__nvoc_host_eng_h_disabled - NV_STATUS __nvoc_objCreateDynamic_OBJHOSTENG(OBJHOSTENG**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_OBJHOSTENG(OBJHOSTENG**, Dynamic*, NvU32); #define __objCreate_OBJHOSTENG(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJHOSTENG((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define hostengHaltAndReset_FNPTR(pHosteng) pHosteng->__hostengHaltAndReset__ #define hostengHaltAndReset(pGpu, pHosteng, pRmTimeout) hostengHaltAndReset_DISPATCH(pGpu, pHosteng, pRmTimeout) -NV_STATUS hostengHaltAndReset_IMPL(struct OBJGPU *pGpu, struct OBJHOSTENG *pHosteng, RMTIMEOUT *pRmTimeout); +// Dispatch functions static inline NV_STATUS hostengHaltAndReset_DISPATCH(struct OBJGPU *pGpu, struct OBJHOSTENG *pHosteng, RMTIMEOUT *pRmTimeout) { return pHosteng->__hostengHaltAndReset__(pGpu, pHosteng, pRmTimeout); } +NV_STATUS hostengHaltAndReset_IMPL(struct OBJGPU *pGpu, struct OBJHOSTENG *pHosteng, RMTIMEOUT *pRmTimeout); + #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_hw_resources_nvoc.c b/src/nvidia/generated/g_hw_resources_nvoc.c index ceb609af4a..f7c4ee85c7 100644 --- a/src/nvidia/generated/g_hw_resources_nvoc.c +++ b/src/nvidia/generated/g_hw_resources_nvoc.c @@ -93,110 +93,142 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryHwResources = /*pExportInfo=*/ &__nvoc_export_info_MemoryHwResources }; -static NvBool __nvoc_thunk_MemoryHwResources_resCanCopy(struct RsResource *pMemoryHwResources) { - return hwresCanCopy((struct MemoryHwResources *)(((unsigned char *)pMemoryHwResources) - __nvoc_rtti_MemoryHwResources_RsResource.offset)); +// 1 down-thunk(s) defined to bridge methods in MemoryHwResources from superclasses + +// hwresCanCopy: virtual override (res) base (mem) +static NvBool __nvoc_down_thunk_MemoryHwResources_resCanCopy(struct RsResource *pMemoryHwResources) { + return hwresCanCopy((struct MemoryHwResources *)(((unsigned char *) pMemoryHwResources) - __nvoc_rtti_MemoryHwResources_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_hwresCheckMemInterUnmap(struct MemoryHwResources *pMemory, NvBool bSubdeviceHandleProvided) { - return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), bSubdeviceHandleProvided); + +// 25 up-thunk(s) defined to bridge methods in MemoryHwResources to superclasses + +// hwresIsDuplicate: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_hwresIsDuplicate(struct MemoryHwResources *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_RmResource_hwresShareCallback(struct MemoryHwResources *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryHwResources_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// hwresGetMapAddrSpace: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_hwresGetMapAddrSpace(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_RsResource_hwresMapTo(struct MemoryHwResources *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset), pParams); +// hwresControl: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_hwresControl(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_hwresGetMapAddrSpace(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return memGetMapAddrSpace((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pCallContext, mapFlags, pAddrSpace); +// hwresMap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_hwresMap(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pCallContext, pParams, pCpuMapping); } -static NvBool __nvoc_thunk_Memory_hwresIsExportAllowed(struct MemoryHwResources *pMemory) { - return memIsExportAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset)); +// hwresUnmap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_hwresUnmap(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pCallContext, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_hwresGetRefCount(struct MemoryHwResources *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset)); +// hwresGetMemInterMapParams: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_hwresGetMemInterMapParams(struct MemoryHwResources *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pParams); } -static void __nvoc_thunk_RsResource_hwresAddAdditionalDependants(struct RsClient *pClient, struct MemoryHwResources *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset), pReference); +// hwresCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_hwresCheckMemInterUnmap(struct MemoryHwResources *pMemory, NvBool bSubdeviceHandleProvided) { + return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RmResource_hwresControl_Prologue(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryHwResources_RmResource.offset), pCallContext, pParams); +// hwresGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_hwresGetMemoryMappingDescriptor(struct MemoryHwResources *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), ppMemDesc); } -static NvBool __nvoc_thunk_Memory_hwresIsGpuMapAllowed(struct MemoryHwResources *pMemory, struct OBJGPU *pGpu) { - return memIsGpuMapAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pGpu); +// hwresCheckCopyPermissions: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_hwresCheckCopyPermissions(struct MemoryHwResources *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pDstGpu, pDstDevice); } -static NV_STATUS __nvoc_thunk_RsResource_hwresUnmapFrom(struct MemoryHwResources *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset), pParams); +// hwresIsReady: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_hwresIsReady(struct MemoryHwResources *pMemory, NvBool bCopyConstructorContext) { + return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), bCopyConstructorContext); } -static void __nvoc_thunk_RmResource_hwresControl_Epilogue(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryHwResources_RmResource.offset), pCallContext, pParams); +// hwresIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_hwresIsGpuMapAllowed(struct MemoryHwResources *pMemory, struct OBJGPU *pGpu) { + return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pGpu); } -static NV_STATUS __nvoc_thunk_Memory_hwresControl(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memControl((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pCallContext, pParams); +// hwresIsExportAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_hwresIsExportAllowed(struct MemoryHwResources *pMemory) { + return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset)); } -static NV_STATUS __nvoc_thunk_Memory_hwresUnmap(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pCallContext, pCpuMapping); +// hwresAccessCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_hwresAccessCallback(struct MemoryHwResources *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_Memory_hwresGetMemInterMapParams(struct MemoryHwResources *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pParams); +// hwresShareCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_hwresShareCallback(struct MemoryHwResources *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_Memory_hwresGetMemoryMappingDescriptor(struct MemoryHwResources *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), ppMemDesc); +// hwresControlSerialization_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_hwresControlSerialization_Prologue(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_hwresControlFilter(struct MemoryHwResources *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset), pCallContext, pParams); +// hwresControlSerialization_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_hwresControlSerialization_Epilogue(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_hwresControlSerialization_Prologue(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryHwResources_RmResource.offset), pCallContext, pParams); +// hwresControl_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_hwresControl_Prologue(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_hwresIsPartialUnmapSupported(struct MemoryHwResources *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset)); +// hwresControl_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_hwresControl_Epilogue(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_hwresIsReady(struct MemoryHwResources *pMemory, NvBool bCopyConstructorContext) { - return memIsReady((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), bCopyConstructorContext); +// hwresPreDestruct: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_hwresPreDestruct(struct MemoryHwResources *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_hwresCheckCopyPermissions(struct MemoryHwResources *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return memCheckCopyPermissions((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pDstGpu, pDstDevice); +// hwresControlFilter: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_hwresControlFilter(struct MemoryHwResources *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_hwresPreDestruct(struct MemoryHwResources *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset)); +// hwresIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body +static NvBool __nvoc_up_thunk_RsResource_hwresIsPartialUnmapSupported(struct MemoryHwResources *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_hwresIsDuplicate(struct MemoryHwResources *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), hMemory, pDuplicate); +// hwresMapTo: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_hwresMapTo(struct MemoryHwResources *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_hwresControlSerialization_Epilogue(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryHwResources_RmResource.offset), pCallContext, pParams); +// hwresUnmapFrom: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_hwresUnmapFrom(struct MemoryHwResources *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_Memory_hwresMap(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pCallContext, pParams, pCpuMapping); +// hwresGetRefCount: virtual inherited (res) base (mem) +static NvU32 __nvoc_up_thunk_RsResource_hwresGetRefCount(struct MemoryHwResources *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_hwresAccessCallback(struct MemoryHwResources *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryHwResources_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// hwresAddAdditionalDependants: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_hwresAddAdditionalDependants(struct RsClient *pClient, struct MemoryHwResources *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_MemoryHwResources = { /*numEntries=*/ 0, @@ -233,65 +265,95 @@ NV_STATUS __nvoc_ctor_MemoryHwResources(MemoryHwResources *pThis, CALL_CONTEXT * return status; } +// Vtable initialization static void __nvoc_init_funcTable_MemoryHwResources_1(MemoryHwResources *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // hwresCanCopy -- virtual override (res) base (mem) pThis->__hwresCanCopy__ = &hwresCanCopy_IMPL; + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryHwResources_resCanCopy; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_MemoryHwResources_resCanCopy; + // hwresIsDuplicate -- virtual inherited (mem) base (mem) + pThis->__hwresIsDuplicate__ = &__nvoc_up_thunk_Memory_hwresIsDuplicate; - pThis->__hwresCheckMemInterUnmap__ = &__nvoc_thunk_Memory_hwresCheckMemInterUnmap; + // hwresGetMapAddrSpace -- virtual inherited (mem) base (mem) + pThis->__hwresGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_hwresGetMapAddrSpace; - pThis->__hwresShareCallback__ = &__nvoc_thunk_RmResource_hwresShareCallback; + // hwresControl -- virtual inherited (mem) base (mem) + pThis->__hwresControl__ = &__nvoc_up_thunk_Memory_hwresControl; - pThis->__hwresMapTo__ = &__nvoc_thunk_RsResource_hwresMapTo; + // hwresMap -- virtual inherited (mem) base (mem) + pThis->__hwresMap__ = &__nvoc_up_thunk_Memory_hwresMap; - pThis->__hwresGetMapAddrSpace__ = &__nvoc_thunk_Memory_hwresGetMapAddrSpace; + // hwresUnmap -- virtual inherited (mem) base (mem) + pThis->__hwresUnmap__ = &__nvoc_up_thunk_Memory_hwresUnmap; - pThis->__hwresIsExportAllowed__ = &__nvoc_thunk_Memory_hwresIsExportAllowed; + // hwresGetMemInterMapParams -- virtual inherited (mem) base (mem) + pThis->__hwresGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_hwresGetMemInterMapParams; - pThis->__hwresGetRefCount__ = &__nvoc_thunk_RsResource_hwresGetRefCount; + // hwresCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body + pThis->__hwresCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_hwresCheckMemInterUnmap; - pThis->__hwresAddAdditionalDependants__ = &__nvoc_thunk_RsResource_hwresAddAdditionalDependants; + // hwresGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) + pThis->__hwresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_hwresGetMemoryMappingDescriptor; - pThis->__hwresControl_Prologue__ = &__nvoc_thunk_RmResource_hwresControl_Prologue; + // hwresCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body + pThis->__hwresCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_hwresCheckCopyPermissions; - pThis->__hwresIsGpuMapAllowed__ = &__nvoc_thunk_Memory_hwresIsGpuMapAllowed; + // hwresIsReady -- virtual inherited (mem) base (mem) + pThis->__hwresIsReady__ = &__nvoc_up_thunk_Memory_hwresIsReady; - pThis->__hwresUnmapFrom__ = &__nvoc_thunk_RsResource_hwresUnmapFrom; + // hwresIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__hwresIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_hwresIsGpuMapAllowed; - pThis->__hwresControl_Epilogue__ = &__nvoc_thunk_RmResource_hwresControl_Epilogue; + // hwresIsExportAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__hwresIsExportAllowed__ = &__nvoc_up_thunk_Memory_hwresIsExportAllowed; - pThis->__hwresControl__ = &__nvoc_thunk_Memory_hwresControl; + // hwresAccessCallback -- virtual inherited (rmres) base (mem) + pThis->__hwresAccessCallback__ = &__nvoc_up_thunk_RmResource_hwresAccessCallback; - pThis->__hwresUnmap__ = &__nvoc_thunk_Memory_hwresUnmap; + // hwresShareCallback -- virtual inherited (rmres) base (mem) + pThis->__hwresShareCallback__ = &__nvoc_up_thunk_RmResource_hwresShareCallback; - pThis->__hwresGetMemInterMapParams__ = &__nvoc_thunk_Memory_hwresGetMemInterMapParams; + // hwresControlSerialization_Prologue -- virtual inherited (rmres) base (mem) + pThis->__hwresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_hwresControlSerialization_Prologue; - pThis->__hwresGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_hwresGetMemoryMappingDescriptor; + // hwresControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__hwresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_hwresControlSerialization_Epilogue; - pThis->__hwresControlFilter__ = &__nvoc_thunk_RsResource_hwresControlFilter; + // hwresControl_Prologue -- virtual inherited (rmres) base (mem) + pThis->__hwresControl_Prologue__ = &__nvoc_up_thunk_RmResource_hwresControl_Prologue; - pThis->__hwresControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_hwresControlSerialization_Prologue; + // hwresControl_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__hwresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_hwresControl_Epilogue; - pThis->__hwresIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_hwresIsPartialUnmapSupported; + // hwresPreDestruct -- virtual inherited (res) base (mem) + pThis->__hwresPreDestruct__ = &__nvoc_up_thunk_RsResource_hwresPreDestruct; - pThis->__hwresIsReady__ = &__nvoc_thunk_Memory_hwresIsReady; + // hwresControlFilter -- virtual inherited (res) base (mem) + pThis->__hwresControlFilter__ = &__nvoc_up_thunk_RsResource_hwresControlFilter; - pThis->__hwresCheckCopyPermissions__ = &__nvoc_thunk_Memory_hwresCheckCopyPermissions; + // hwresIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body + pThis->__hwresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_hwresIsPartialUnmapSupported; - pThis->__hwresPreDestruct__ = &__nvoc_thunk_RsResource_hwresPreDestruct; + // hwresMapTo -- virtual inherited (res) base (mem) + pThis->__hwresMapTo__ = &__nvoc_up_thunk_RsResource_hwresMapTo; - pThis->__hwresIsDuplicate__ = &__nvoc_thunk_Memory_hwresIsDuplicate; + // hwresUnmapFrom -- virtual inherited (res) base (mem) + pThis->__hwresUnmapFrom__ = &__nvoc_up_thunk_RsResource_hwresUnmapFrom; - pThis->__hwresControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_hwresControlSerialization_Epilogue; + // hwresGetRefCount -- virtual inherited (res) base (mem) + pThis->__hwresGetRefCount__ = &__nvoc_up_thunk_RsResource_hwresGetRefCount; - pThis->__hwresMap__ = &__nvoc_thunk_Memory_hwresMap; + // hwresAddAdditionalDependants -- virtual inherited (res) base (mem) + pThis->__hwresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_hwresAddAdditionalDependants; +} // End __nvoc_init_funcTable_MemoryHwResources_1 with approximately 27 basic block(s). - pThis->__hwresAccessCallback__ = &__nvoc_thunk_RmResource_hwresAccessCallback; -} +// Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_MemoryHwResources(MemoryHwResources *pThis) { + + // Initialize vtable(s) with 26 per-object function pointer(s). __nvoc_init_funcTable_MemoryHwResources_1(pThis); } diff --git a/src/nvidia/generated/g_hw_resources_nvoc.h b/src/nvidia/generated/g_hw_resources_nvoc.h index a51213bcb3..244673ee6b 100644 --- a/src/nvidia/generated/g_hw_resources_nvoc.h +++ b/src/nvidia/generated/g_hw_resources_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_HW_RESOURCES_NVOC_H_ #define _G_HW_RESOURCES_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_hw_resources_nvoc.h" #ifndef _HW_RESOURCES_H_ @@ -49,41 +57,50 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct MemoryHwResources { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Memory *__nvoc_pbase_Memory; - struct MemoryHwResources *__nvoc_pbase_MemoryHwResources; - NvBool (*__hwresCanCopy__)(struct MemoryHwResources *); - NV_STATUS (*__hwresCheckMemInterUnmap__)(struct MemoryHwResources *, NvBool); - NvBool (*__hwresShareCallback__)(struct MemoryHwResources *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__hwresMapTo__)(struct MemoryHwResources *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__hwresGetMapAddrSpace__)(struct MemoryHwResources *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvBool (*__hwresIsExportAllowed__)(struct MemoryHwResources *); - NvU32 (*__hwresGetRefCount__)(struct MemoryHwResources *); - void (*__hwresAddAdditionalDependants__)(struct RsClient *, struct MemoryHwResources *, RsResourceRef *); - NV_STATUS (*__hwresControl_Prologue__)(struct MemoryHwResources *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__hwresIsGpuMapAllowed__)(struct MemoryHwResources *, struct OBJGPU *); - NV_STATUS (*__hwresUnmapFrom__)(struct MemoryHwResources *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__hwresControl_Epilogue__)(struct MemoryHwResources *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__hwresControl__)(struct MemoryHwResources *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__hwresUnmap__)(struct MemoryHwResources *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__hwresGetMemInterMapParams__)(struct MemoryHwResources *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__hwresGetMemoryMappingDescriptor__)(struct MemoryHwResources *, MEMORY_DESCRIPTOR **); - NV_STATUS (*__hwresControlFilter__)(struct MemoryHwResources *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__hwresControlSerialization_Prologue__)(struct MemoryHwResources *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__hwresIsPartialUnmapSupported__)(struct MemoryHwResources *); - NV_STATUS (*__hwresIsReady__)(struct MemoryHwResources *, NvBool); - NV_STATUS (*__hwresCheckCopyPermissions__)(struct MemoryHwResources *, struct OBJGPU *, struct Device *); - void (*__hwresPreDestruct__)(struct MemoryHwResources *); - NV_STATUS (*__hwresIsDuplicate__)(struct MemoryHwResources *, NvHandle, NvBool *); - void (*__hwresControlSerialization_Epilogue__)(struct MemoryHwResources *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__hwresMap__)(struct MemoryHwResources *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__hwresAccessCallback__)(struct MemoryHwResources *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct Memory *__nvoc_pbase_Memory; // mem super + struct MemoryHwResources *__nvoc_pbase_MemoryHwResources; // hwres + + // Vtable with 26 per-object function pointers + NvBool (*__hwresCanCopy__)(struct MemoryHwResources * /*this*/); // virtual override (res) base (mem) + NV_STATUS (*__hwresIsDuplicate__)(struct MemoryHwResources * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) + NV_STATUS (*__hwresGetMapAddrSpace__)(struct MemoryHwResources * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) + NV_STATUS (*__hwresControl__)(struct MemoryHwResources * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (mem) base (mem) + NV_STATUS (*__hwresMap__)(struct MemoryHwResources * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__hwresUnmap__)(struct MemoryHwResources * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__hwresGetMemInterMapParams__)(struct MemoryHwResources * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (mem) base (mem) + NV_STATUS (*__hwresCheckMemInterUnmap__)(struct MemoryHwResources * /*this*/, NvBool); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__hwresGetMemoryMappingDescriptor__)(struct MemoryHwResources * /*this*/, MEMORY_DESCRIPTOR **); // virtual inherited (mem) base (mem) + NV_STATUS (*__hwresCheckCopyPermissions__)(struct MemoryHwResources * /*this*/, struct OBJGPU *, struct Device *); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__hwresIsReady__)(struct MemoryHwResources * /*this*/, NvBool); // virtual inherited (mem) base (mem) + NvBool (*__hwresIsGpuMapAllowed__)(struct MemoryHwResources * /*this*/, struct OBJGPU *); // inline virtual inherited (mem) base (mem) body + NvBool (*__hwresIsExportAllowed__)(struct MemoryHwResources * /*this*/); // inline virtual inherited (mem) base (mem) body + NvBool (*__hwresAccessCallback__)(struct MemoryHwResources * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (mem) + NvBool (*__hwresShareCallback__)(struct MemoryHwResources * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__hwresControlSerialization_Prologue__)(struct MemoryHwResources * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__hwresControlSerialization_Epilogue__)(struct MemoryHwResources * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__hwresControl_Prologue__)(struct MemoryHwResources * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__hwresControl_Epilogue__)(struct MemoryHwResources * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__hwresPreDestruct__)(struct MemoryHwResources * /*this*/); // virtual inherited (res) base (mem) + NV_STATUS (*__hwresControlFilter__)(struct MemoryHwResources * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (mem) + NvBool (*__hwresIsPartialUnmapSupported__)(struct MemoryHwResources * /*this*/); // inline virtual inherited (res) base (mem) body + NV_STATUS (*__hwresMapTo__)(struct MemoryHwResources * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (mem) + NV_STATUS (*__hwresUnmapFrom__)(struct MemoryHwResources * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (mem) + NvU32 (*__hwresGetRefCount__)(struct MemoryHwResources * /*this*/); // virtual inherited (res) base (mem) + void (*__hwresAddAdditionalDependants__)(struct RsClient *, struct MemoryHwResources * /*this*/, RsResourceRef *); // virtual inherited (res) base (mem) }; #ifndef __NVOC_CLASS_MemoryHwResources_TYPEDEF__ @@ -95,6 +112,7 @@ typedef struct MemoryHwResources MemoryHwResources; #define __nvoc_class_id_MemoryHwResources 0x9a2a71 #endif /* __nvoc_class_id_MemoryHwResources */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryHwResources; #define __staticCast_MemoryHwResources(pThis) \ @@ -107,145 +125,174 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryHwResources; ((MemoryHwResources*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(MemoryHwResources))) #endif //__nvoc_hw_resources_h_disabled - NV_STATUS __nvoc_objCreateDynamic_MemoryHwResources(MemoryHwResources**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_MemoryHwResources(MemoryHwResources**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_MemoryHwResources(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_MemoryHwResources((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define hwresCanCopy_FNPTR(pMemoryHwResources) pMemoryHwResources->__hwresCanCopy__ #define hwresCanCopy(pMemoryHwResources) hwresCanCopy_DISPATCH(pMemoryHwResources) -#define hwresCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) hwresCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define hwresShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) hwresShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define hwresMapTo(pResource, pParams) hwresMapTo_DISPATCH(pResource, pParams) +#define hwresIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define hwresIsDuplicate(pMemory, hMemory, pDuplicate) hwresIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) +#define hwresGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ #define hwresGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) hwresGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define hwresIsExportAllowed(pMemory) hwresIsExportAllowed_DISPATCH(pMemory) -#define hwresGetRefCount(pResource) hwresGetRefCount_DISPATCH(pResource) -#define hwresAddAdditionalDependants(pClient, pResource, pReference) hwresAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define hwresControl_Prologue(pResource, pCallContext, pParams) hwresControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define hwresIsGpuMapAllowed(pMemory, pGpu) hwresIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define hwresUnmapFrom(pResource, pParams) hwresUnmapFrom_DISPATCH(pResource, pParams) -#define hwresControl_Epilogue(pResource, pCallContext, pParams) hwresControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define hwresControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ #define hwresControl(pMemory, pCallContext, pParams) hwresControl_DISPATCH(pMemory, pCallContext, pParams) +#define hwresMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define hwresMap(pMemory, pCallContext, pParams, pCpuMapping) hwresMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define hwresUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ #define hwresUnmap(pMemory, pCallContext, pCpuMapping) hwresUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) +#define hwresGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ #define hwresGetMemInterMapParams(pMemory, pParams) hwresGetMemInterMapParams_DISPATCH(pMemory, pParams) +#define hwresCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define hwresCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) hwresCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) +#define hwresGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ #define hwresGetMemoryMappingDescriptor(pMemory, ppMemDesc) hwresGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define hwresControlFilter(pResource, pCallContext, pParams) hwresControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define hwresControlSerialization_Prologue(pResource, pCallContext, pParams) hwresControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define hwresIsPartialUnmapSupported(pResource) hwresIsPartialUnmapSupported_DISPATCH(pResource) -#define hwresIsReady(pMemory, bCopyConstructorContext) hwresIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define hwresCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ #define hwresCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) hwresCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define hwresPreDestruct(pResource) hwresPreDestruct_DISPATCH(pResource) -#define hwresIsDuplicate(pMemory, hMemory, pDuplicate) hwresIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define hwresControlSerialization_Epilogue(pResource, pCallContext, pParams) hwresControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define hwresMap(pMemory, pCallContext, pParams, pCpuMapping) hwresMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define hwresIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define hwresIsReady(pMemory, bCopyConstructorContext) hwresIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define hwresIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define hwresIsGpuMapAllowed(pMemory, pGpu) hwresIsGpuMapAllowed_DISPATCH(pMemory, pGpu) +#define hwresIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define hwresIsExportAllowed(pMemory) hwresIsExportAllowed_DISPATCH(pMemory) +#define hwresAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ #define hwresAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) hwresAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool hwresCanCopy_IMPL(struct MemoryHwResources *pMemoryHwResources); +#define hwresShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define hwresShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) hwresShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define hwresControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define hwresControlSerialization_Prologue(pResource, pCallContext, pParams) hwresControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define hwresControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define hwresControlSerialization_Epilogue(pResource, pCallContext, pParams) hwresControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define hwresControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define hwresControl_Prologue(pResource, pCallContext, pParams) hwresControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define hwresControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define hwresControl_Epilogue(pResource, pCallContext, pParams) hwresControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define hwresPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define hwresPreDestruct(pResource) hwresPreDestruct_DISPATCH(pResource) +#define hwresControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define hwresControlFilter(pResource, pCallContext, pParams) hwresControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define hwresIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define hwresIsPartialUnmapSupported(pResource) hwresIsPartialUnmapSupported_DISPATCH(pResource) +#define hwresMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define hwresMapTo(pResource, pParams) hwresMapTo_DISPATCH(pResource, pParams) +#define hwresUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define hwresUnmapFrom(pResource, pParams) hwresUnmapFrom_DISPATCH(pResource, pParams) +#define hwresGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define hwresGetRefCount(pResource) hwresGetRefCount_DISPATCH(pResource) +#define hwresAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define hwresAddAdditionalDependants(pClient, pResource, pReference) hwresAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NvBool hwresCanCopy_DISPATCH(struct MemoryHwResources *pMemoryHwResources) { return pMemoryHwResources->__hwresCanCopy__(pMemoryHwResources); } -static inline NV_STATUS hwresCheckMemInterUnmap_DISPATCH(struct MemoryHwResources *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__hwresCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); -} - -static inline NvBool hwresShareCallback_DISPATCH(struct MemoryHwResources *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__hwresShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS hwresMapTo_DISPATCH(struct MemoryHwResources *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__hwresMapTo__(pResource, pParams); +static inline NV_STATUS hwresIsDuplicate_DISPATCH(struct MemoryHwResources *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return pMemory->__hwresIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS hwresGetMapAddrSpace_DISPATCH(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pMemory->__hwresGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } -static inline NvBool hwresIsExportAllowed_DISPATCH(struct MemoryHwResources *pMemory) { - return pMemory->__hwresIsExportAllowed__(pMemory); +static inline NV_STATUS hwresControl_DISPATCH(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pMemory->__hwresControl__(pMemory, pCallContext, pParams); } -static inline NvU32 hwresGetRefCount_DISPATCH(struct MemoryHwResources *pResource) { - return pResource->__hwresGetRefCount__(pResource); +static inline NV_STATUS hwresMap_DISPATCH(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pMemory->__hwresMap__(pMemory, pCallContext, pParams, pCpuMapping); } -static inline void hwresAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryHwResources *pResource, RsResourceRef *pReference) { - pResource->__hwresAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS hwresUnmap_DISPATCH(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pMemory->__hwresUnmap__(pMemory, pCallContext, pCpuMapping); } -static inline NV_STATUS hwresControl_Prologue_DISPATCH(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__hwresControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS hwresGetMemInterMapParams_DISPATCH(struct MemoryHwResources *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pMemory->__hwresGetMemInterMapParams__(pMemory, pParams); } -static inline NvBool hwresIsGpuMapAllowed_DISPATCH(struct MemoryHwResources *pMemory, struct OBJGPU *pGpu) { - return pMemory->__hwresIsGpuMapAllowed__(pMemory, pGpu); +static inline NV_STATUS hwresCheckMemInterUnmap_DISPATCH(struct MemoryHwResources *pMemory, NvBool bSubdeviceHandleProvided) { + return pMemory->__hwresCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } -static inline NV_STATUS hwresUnmapFrom_DISPATCH(struct MemoryHwResources *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__hwresUnmapFrom__(pResource, pParams); +static inline NV_STATUS hwresGetMemoryMappingDescriptor_DISPATCH(struct MemoryHwResources *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return pMemory->__hwresGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } -static inline void hwresControl_Epilogue_DISPATCH(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__hwresControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS hwresCheckCopyPermissions_DISPATCH(struct MemoryHwResources *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return pMemory->__hwresCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } -static inline NV_STATUS hwresControl_DISPATCH(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__hwresControl__(pMemory, pCallContext, pParams); +static inline NV_STATUS hwresIsReady_DISPATCH(struct MemoryHwResources *pMemory, NvBool bCopyConstructorContext) { + return pMemory->__hwresIsReady__(pMemory, bCopyConstructorContext); } -static inline NV_STATUS hwresUnmap_DISPATCH(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__hwresUnmap__(pMemory, pCallContext, pCpuMapping); +static inline NvBool hwresIsGpuMapAllowed_DISPATCH(struct MemoryHwResources *pMemory, struct OBJGPU *pGpu) { + return pMemory->__hwresIsGpuMapAllowed__(pMemory, pGpu); } -static inline NV_STATUS hwresGetMemInterMapParams_DISPATCH(struct MemoryHwResources *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__hwresGetMemInterMapParams__(pMemory, pParams); +static inline NvBool hwresIsExportAllowed_DISPATCH(struct MemoryHwResources *pMemory) { + return pMemory->__hwresIsExportAllowed__(pMemory); } -static inline NV_STATUS hwresGetMemoryMappingDescriptor_DISPATCH(struct MemoryHwResources *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__hwresGetMemoryMappingDescriptor__(pMemory, ppMemDesc); +static inline NvBool hwresAccessCallback_DISPATCH(struct MemoryHwResources *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__hwresAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS hwresControlFilter_DISPATCH(struct MemoryHwResources *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__hwresControlFilter__(pResource, pCallContext, pParams); +static inline NvBool hwresShareCallback_DISPATCH(struct MemoryHwResources *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__hwresShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS hwresControlSerialization_Prologue_DISPATCH(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__hwresControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool hwresIsPartialUnmapSupported_DISPATCH(struct MemoryHwResources *pResource) { - return pResource->__hwresIsPartialUnmapSupported__(pResource); +static inline void hwresControlSerialization_Epilogue_DISPATCH(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__hwresControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS hwresIsReady_DISPATCH(struct MemoryHwResources *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__hwresIsReady__(pMemory, bCopyConstructorContext); +static inline NV_STATUS hwresControl_Prologue_DISPATCH(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__hwresControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS hwresCheckCopyPermissions_DISPATCH(struct MemoryHwResources *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__hwresCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); +static inline void hwresControl_Epilogue_DISPATCH(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__hwresControl_Epilogue__(pResource, pCallContext, pParams); } static inline void hwresPreDestruct_DISPATCH(struct MemoryHwResources *pResource) { pResource->__hwresPreDestruct__(pResource); } -static inline NV_STATUS hwresIsDuplicate_DISPATCH(struct MemoryHwResources *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__hwresIsDuplicate__(pMemory, hMemory, pDuplicate); +static inline NV_STATUS hwresControlFilter_DISPATCH(struct MemoryHwResources *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__hwresControlFilter__(pResource, pCallContext, pParams); } -static inline void hwresControlSerialization_Epilogue_DISPATCH(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__hwresControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool hwresIsPartialUnmapSupported_DISPATCH(struct MemoryHwResources *pResource) { + return pResource->__hwresIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS hwresMap_DISPATCH(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__hwresMap__(pMemory, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS hwresMapTo_DISPATCH(struct MemoryHwResources *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__hwresMapTo__(pResource, pParams); } -static inline NvBool hwresAccessCallback_DISPATCH(struct MemoryHwResources *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__hwresAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS hwresUnmapFrom_DISPATCH(struct MemoryHwResources *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__hwresUnmapFrom__(pResource, pParams); } +static inline NvU32 hwresGetRefCount_DISPATCH(struct MemoryHwResources *pResource) { + return pResource->__hwresGetRefCount__(pResource); +} + +static inline void hwresAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryHwResources *pResource, RsResourceRef *pReference) { + pResource->__hwresAddAdditionalDependants__(pClient, pResource, pReference); +} + +NvBool hwresCanCopy_IMPL(struct MemoryHwResources *pMemoryHwResources); + NV_STATUS hwresConstruct_IMPL(struct MemoryHwResources *arg_pMemoryHwResources, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_hwresConstruct(arg_pMemoryHwResources, arg_pCallContext, arg_pParams) hwresConstruct_IMPL(arg_pMemoryHwResources, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_hypervisor_nvoc.c b/src/nvidia/generated/g_hypervisor_nvoc.c index 2ddfc57b60..be9fa18908 100644 --- a/src/nvidia/generated/g_hypervisor_nvoc.c +++ b/src/nvidia/generated/g_hypervisor_nvoc.c @@ -93,10 +93,13 @@ NV_STATUS __nvoc_ctor_OBJHYPERVISOR(OBJHYPERVISOR *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJHYPERVISOR_1(OBJHYPERVISOR *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_OBJHYPERVISOR_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_OBJHYPERVISOR(OBJHYPERVISOR *pThis) { __nvoc_init_funcTable_OBJHYPERVISOR_1(pThis); } diff --git a/src/nvidia/generated/g_hypervisor_nvoc.h b/src/nvidia/generated/g_hypervisor_nvoc.h index c9b6c1e8f9..04d62e6acf 100644 --- a/src/nvidia/generated/g_hypervisor_nvoc.h +++ b/src/nvidia/generated/g_hypervisor_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_HYPERVISOR_NVOC_H_ #define _G_HYPERVISOR_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_hypervisor_nvoc.h" #ifndef HYPERVISOR_H @@ -45,6 +53,7 @@ extern "C" { #include "mem_mgr/mem.h" /* ------------------------ Forward Declarations ---------------------------- */ + struct OBJOS; #ifndef __NVOC_CLASS_OBJOS_TYPEDEF__ @@ -82,12 +91,23 @@ typedef struct HOST_VGPU_DEVICE HOST_VGPU_DEVICE; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJHYPERVISOR { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct OBJHYPERVISOR *__nvoc_pbase_OBJHYPERVISOR; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct OBJHYPERVISOR *__nvoc_pbase_OBJHYPERVISOR; // hypervisor + + // 1 PDB property NvBool PDB_PROP_HYPERVISOR_DRIVERVM_ENABLED; + + // Data members NvBool bDetected; NvBool bIsHVMGuest; HYPERVISOR_TYPE type; @@ -104,6 +124,7 @@ typedef struct OBJHYPERVISOR OBJHYPERVISOR; #define __nvoc_class_id_OBJHYPERVISOR 0x33c1ba #endif /* __nvoc_class_id_OBJHYPERVISOR */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJHYPERVISOR; #define __staticCast_OBJHYPERVISOR(pThis) \ @@ -116,6 +137,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJHYPERVISOR; ((OBJHYPERVISOR*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJHYPERVISOR))) #endif //__nvoc_hypervisor_h_disabled +// Property macros #define PDB_PROP_HYPERVISOR_DRIVERVM_ENABLED_BASE_CAST #define PDB_PROP_HYPERVISOR_DRIVERVM_ENABLED_BASE_NAME PDB_PROP_HYPERVISOR_DRIVERVM_ENABLED @@ -125,38 +147,42 @@ NV_STATUS __nvoc_objCreate_OBJHYPERVISOR(OBJHYPERVISOR**, Dynamic*, NvU32); #define __objCreate_OBJHYPERVISOR(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJHYPERVISOR((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NvBool hypervisorIsVgxHyper_IMPL(void); #define hypervisorIsVgxHyper() hypervisorIsVgxHyper_IMPL() #define hypervisorIsVgxHyper_HAL() hypervisorIsVgxHyper() -NV_STATUS hypervisorInjectInterrupt_IMPL(struct OBJHYPERVISOR *arg0, VGPU_NS_INTR *arg1); +NV_STATUS hypervisorInjectInterrupt_IMPL(struct OBJHYPERVISOR *arg1, VGPU_NS_INTR *arg2); #ifdef __nvoc_hypervisor_h_disabled -static inline NV_STATUS hypervisorInjectInterrupt(struct OBJHYPERVISOR *arg0, VGPU_NS_INTR *arg1) { +static inline NV_STATUS hypervisorInjectInterrupt(struct OBJHYPERVISOR *arg1, VGPU_NS_INTR *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJHYPERVISOR was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_hypervisor_h_disabled -#define hypervisorInjectInterrupt(arg0, arg1) hypervisorInjectInterrupt_IMPL(arg0, arg1) +#define hypervisorInjectInterrupt(arg1, arg2) hypervisorInjectInterrupt_IMPL(arg1, arg2) #endif //__nvoc_hypervisor_h_disabled -#define hypervisorInjectInterrupt_HAL(arg0, arg1) hypervisorInjectInterrupt(arg0, arg1) +#define hypervisorInjectInterrupt_HAL(arg1, arg2) hypervisorInjectInterrupt(arg1, arg2) -void hypervisorSetHypervVgpuSupported_IMPL(struct OBJHYPERVISOR *arg0); +void hypervisorSetHypervVgpuSupported_IMPL(struct OBJHYPERVISOR *arg1); #ifdef __nvoc_hypervisor_h_disabled -static inline void hypervisorSetHypervVgpuSupported(struct OBJHYPERVISOR *arg0) { +static inline void hypervisorSetHypervVgpuSupported(struct OBJHYPERVISOR *arg1) { NV_ASSERT_FAILED_PRECOMP("OBJHYPERVISOR was disabled!"); } #else //__nvoc_hypervisor_h_disabled -#define hypervisorSetHypervVgpuSupported(arg0) hypervisorSetHypervVgpuSupported_IMPL(arg0) +#define hypervisorSetHypervVgpuSupported(arg1) hypervisorSetHypervVgpuSupported_IMPL(arg1) #endif //__nvoc_hypervisor_h_disabled -#define hypervisorSetHypervVgpuSupported_HAL(arg0) hypervisorSetHypervVgpuSupported(arg0) +#define hypervisorSetHypervVgpuSupported_HAL(arg1) hypervisorSetHypervVgpuSupported(arg1) NvBool hypervisorCheckForObjectAccess_IMPL(NvHandle hClient); @@ -167,42 +193,42 @@ NvBool hypervisorIsType_IMPL(HYPERVISOR_TYPE hyperType); NV_STATUS hypervisorConstruct_IMPL(struct OBJHYPERVISOR *arg_); #define __nvoc_hypervisorConstruct(arg_) hypervisorConstruct_IMPL(arg_) -void hypervisorDestruct_IMPL(struct OBJHYPERVISOR *arg0); +void hypervisorDestruct_IMPL(struct OBJHYPERVISOR *arg1); -#define __nvoc_hypervisorDestruct(arg0) hypervisorDestruct_IMPL(arg0) -NV_STATUS hypervisorDetection_IMPL(struct OBJHYPERVISOR *arg0, struct OBJOS *arg1); +#define __nvoc_hypervisorDestruct(arg1) hypervisorDestruct_IMPL(arg1) +NV_STATUS hypervisorDetection_IMPL(struct OBJHYPERVISOR *arg1, struct OBJOS *arg2); #ifdef __nvoc_hypervisor_h_disabled -static inline NV_STATUS hypervisorDetection(struct OBJHYPERVISOR *arg0, struct OBJOS *arg1) { +static inline NV_STATUS hypervisorDetection(struct OBJHYPERVISOR *arg1, struct OBJOS *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJHYPERVISOR was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_hypervisor_h_disabled -#define hypervisorDetection(arg0, arg1) hypervisorDetection_IMPL(arg0, arg1) +#define hypervisorDetection(arg1, arg2) hypervisorDetection_IMPL(arg1, arg2) #endif //__nvoc_hypervisor_h_disabled -NvBool hypervisorPcieP2pDetection_IMPL(struct OBJHYPERVISOR *arg0, NvU32 arg1); +NvBool hypervisorPcieP2pDetection_IMPL(struct OBJHYPERVISOR *arg1, NvU32 arg2); #ifdef __nvoc_hypervisor_h_disabled -static inline NvBool hypervisorPcieP2pDetection(struct OBJHYPERVISOR *arg0, NvU32 arg1) { +static inline NvBool hypervisorPcieP2pDetection(struct OBJHYPERVISOR *arg1, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("OBJHYPERVISOR was disabled!"); return NV_FALSE; } #else //__nvoc_hypervisor_h_disabled -#define hypervisorPcieP2pDetection(arg0, arg1) hypervisorPcieP2pDetection_IMPL(arg0, arg1) +#define hypervisorPcieP2pDetection(arg1, arg2) hypervisorPcieP2pDetection_IMPL(arg1, arg2) #endif //__nvoc_hypervisor_h_disabled -HYPERVISOR_TYPE hypervisorGetHypervisorType_IMPL(struct OBJHYPERVISOR *arg0); +HYPERVISOR_TYPE hypervisorGetHypervisorType_IMPL(struct OBJHYPERVISOR *arg1); #ifdef __nvoc_hypervisor_h_disabled -static inline HYPERVISOR_TYPE hypervisorGetHypervisorType(struct OBJHYPERVISOR *arg0) { +static inline HYPERVISOR_TYPE hypervisorGetHypervisorType(struct OBJHYPERVISOR *arg1) { NV_ASSERT_FAILED_PRECOMP("OBJHYPERVISOR was disabled!"); HYPERVISOR_TYPE ret; portMemSet(&ret, 0, sizeof(HYPERVISOR_TYPE)); return ret; } #else //__nvoc_hypervisor_h_disabled -#define hypervisorGetHypervisorType(arg0) hypervisorGetHypervisorType_IMPL(arg0) +#define hypervisorGetHypervisorType(arg1) hypervisorGetHypervisorType_IMPL(arg1) #endif //__nvoc_hypervisor_h_disabled void hypervisorSetHypervisorType_IMPL(struct OBJHYPERVISOR *pHypervisor, HYPERVISOR_TYPE type); diff --git a/src/nvidia/generated/g_i2c_api_nvoc.c b/src/nvidia/generated/g_i2c_api_nvoc.c index b37a782863..1decb26902 100644 --- a/src/nvidia/generated/g_i2c_api_nvoc.c +++ b/src/nvidia/generated/g_i2c_api_nvoc.c @@ -93,106 +93,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_I2cApi = /*pExportInfo=*/ &__nvoc_export_info_I2cApi }; -static NvBool __nvoc_thunk_GpuResource_i2capiShareCallback(struct I2cApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_i2capiCheckMemInterUnmap(struct I2cApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_I2cApi_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RsResource_i2capiMapTo(struct I2cApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_I2cApi_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_i2capiGetMapAddrSpace(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} - -static NvU32 __nvoc_thunk_RsResource_i2capiGetRefCount(struct I2cApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_I2cApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_i2capiAddAdditionalDependants(struct RsClient *pClient, struct I2cApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_I2cApi_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_i2capiControl_Prologue(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_I2cApi_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_i2capiGetRegBaseOffsetAndSize(struct I2cApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), pGpu, pOffset, pSize); -} - -static NV_STATUS __nvoc_thunk_GpuResource_i2capiInternalControlForward(struct I2cApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), command, pParams, size); -} - -static NV_STATUS __nvoc_thunk_RsResource_i2capiUnmapFrom(struct I2cApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_I2cApi_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_i2capiControl_Epilogue(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_I2cApi_RmResource.offset), pCallContext, pParams); -} - -static NvHandle __nvoc_thunk_GpuResource_i2capiGetInternalObjectHandle(struct I2cApi *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_i2capiControl(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_i2capiUnmap(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_i2capiGetMemInterMapParams(struct I2cApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_I2cApi_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_i2capiGetMemoryMappingDescriptor(struct I2cApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_I2cApi_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_i2capiControlFilter(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_I2cApi_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_i2capiControlSerialization_Prologue(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_I2cApi_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_i2capiCanCopy(struct I2cApi *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_I2cApi_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_i2capiIsPartialUnmapSupported(struct I2cApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_I2cApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_i2capiPreDestruct(struct I2cApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_I2cApi_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_i2capiIsDuplicate(struct I2cApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_I2cApi_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_i2capiControlSerialization_Epilogue(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_I2cApi_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_i2capiMap(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_i2capiAccessCallback(struct I2cApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_I2cApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -200,12 +100,12 @@ static NvBool __nvoc_thunk_RmResource_i2capiAccessCallback(struct I2cApi *pResou static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_I2cApi[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) i2capiCtrlCmdI2cGetPortInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x402c0101u, /*paramSize=*/ sizeof(NV402C_CTRL_I2C_GET_PORT_INFO_PARAMS), @@ -215,12 +115,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_I2cApi[] #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) i2capiCtrlCmdI2cIndexed_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x402c0102u, /*paramSize=*/ sizeof(NV402C_CTRL_I2C_INDEXED_PARAMS), @@ -230,12 +130,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_I2cApi[] #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) i2capiCtrlCmdI2cGetPortSpeed_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x402c0103u, /*paramSize=*/ sizeof(NV402C_CTRL_I2C_GET_PORT_SPEED_PARAMS), @@ -245,12 +145,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_I2cApi[] #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) i2capiCtrlCmdI2cTableGetDevInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x402c0104u, /*paramSize=*/ sizeof(NV402C_CTRL_I2C_TABLE_GET_DEV_INFO_PARAMS), @@ -260,12 +160,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_I2cApi[] #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) i2capiCtrlCmdI2cTransaction_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x402c0105u, /*paramSize=*/ sizeof(NV402C_CTRL_I2C_TRANSACTION_PARAMS), @@ -277,6 +177,134 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_I2cApi[] }; +// 25 up-thunk(s) defined to bridge methods in I2cApi to superclasses + +// i2capiControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_i2capiControl(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), pCallContext, pParams); +} + +// i2capiMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_i2capiMap(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// i2capiUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_i2capiUnmap(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), pCallContext, pCpuMapping); +} + +// i2capiShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_i2capiShareCallback(struct I2cApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// i2capiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_i2capiGetRegBaseOffsetAndSize(struct I2cApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), pGpu, pOffset, pSize); +} + +// i2capiGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_i2capiGetMapAddrSpace(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + +// i2capiInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_i2capiInternalControlForward(struct I2cApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), command, pParams, size); +} + +// i2capiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_i2capiGetInternalObjectHandle(struct I2cApi *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset)); +} + +// i2capiAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_i2capiAccessCallback(struct I2cApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// i2capiGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_i2capiGetMemInterMapParams(struct I2cApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_I2cApi_RmResource.offset), pParams); +} + +// i2capiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_i2capiCheckMemInterUnmap(struct I2cApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_I2cApi_RmResource.offset), bSubdeviceHandleProvided); +} + +// i2capiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_i2capiGetMemoryMappingDescriptor(struct I2cApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_I2cApi_RmResource.offset), ppMemDesc); +} + +// i2capiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_i2capiControlSerialization_Prologue(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RmResource.offset), pCallContext, pParams); +} + +// i2capiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_i2capiControlSerialization_Epilogue(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RmResource.offset), pCallContext, pParams); +} + +// i2capiControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_i2capiControl_Prologue(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RmResource.offset), pCallContext, pParams); +} + +// i2capiControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_i2capiControl_Epilogue(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RmResource.offset), pCallContext, pParams); +} + +// i2capiCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_i2capiCanCopy(struct I2cApi *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RsResource.offset)); +} + +// i2capiIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_i2capiIsDuplicate(struct I2cApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RsResource.offset), hMemory, pDuplicate); +} + +// i2capiPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_i2capiPreDestruct(struct I2cApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RsResource.offset)); +} + +// i2capiControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_i2capiControlFilter(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RsResource.offset), pCallContext, pParams); +} + +// i2capiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_i2capiIsPartialUnmapSupported(struct I2cApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RsResource.offset)); +} + +// i2capiMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_i2capiMapTo(struct I2cApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RsResource.offset), pParams); +} + +// i2capiUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_i2capiUnmapFrom(struct I2cApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RsResource.offset), pParams); +} + +// i2capiGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_i2capiGetRefCount(struct I2cApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RsResource.offset)); +} + +// i2capiAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_i2capiAddAdditionalDependants(struct RsClient *pClient, struct I2cApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RsResource.offset), pReference); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_I2cApi = { /*numEntries=*/ 5, @@ -313,81 +341,116 @@ NV_STATUS __nvoc_ctor_I2cApi(I2cApi *pThis, struct CALL_CONTEXT * arg_pCallConte return status; } +// Vtable initialization static void __nvoc_init_funcTable_I2cApi_1(I2cApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // i2capiCtrlCmdI2cGetPortInfo -- exported (id=0x402c0101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__i2capiCtrlCmdI2cGetPortInfo__ = &i2capiCtrlCmdI2cGetPortInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // i2capiCtrlCmdI2cIndexed -- exported (id=0x402c0102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__i2capiCtrlCmdI2cIndexed__ = &i2capiCtrlCmdI2cIndexed_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // i2capiCtrlCmdI2cGetPortSpeed -- exported (id=0x402c0103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__i2capiCtrlCmdI2cGetPortSpeed__ = &i2capiCtrlCmdI2cGetPortSpeed_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // i2capiCtrlCmdI2cTableGetDevInfo -- exported (id=0x402c0104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__i2capiCtrlCmdI2cTableGetDevInfo__ = &i2capiCtrlCmdI2cTableGetDevInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // i2capiCtrlCmdI2cTransaction -- exported (id=0x402c0105) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__i2capiCtrlCmdI2cTransaction__ = &i2capiCtrlCmdI2cTransaction_IMPL; #endif - pThis->__i2capiShareCallback__ = &__nvoc_thunk_GpuResource_i2capiShareCallback; + // i2capiControl -- virtual inherited (gpures) base (gpures) + pThis->__i2capiControl__ = &__nvoc_up_thunk_GpuResource_i2capiControl; - pThis->__i2capiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_i2capiCheckMemInterUnmap; + // i2capiMap -- virtual inherited (gpures) base (gpures) + pThis->__i2capiMap__ = &__nvoc_up_thunk_GpuResource_i2capiMap; - pThis->__i2capiMapTo__ = &__nvoc_thunk_RsResource_i2capiMapTo; + // i2capiUnmap -- virtual inherited (gpures) base (gpures) + pThis->__i2capiUnmap__ = &__nvoc_up_thunk_GpuResource_i2capiUnmap; - pThis->__i2capiGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_i2capiGetMapAddrSpace; + // i2capiShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__i2capiShareCallback__ = &__nvoc_up_thunk_GpuResource_i2capiShareCallback; - pThis->__i2capiGetRefCount__ = &__nvoc_thunk_RsResource_i2capiGetRefCount; + // i2capiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__i2capiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_i2capiGetRegBaseOffsetAndSize; - pThis->__i2capiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_i2capiAddAdditionalDependants; + // i2capiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__i2capiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_i2capiGetMapAddrSpace; - pThis->__i2capiControl_Prologue__ = &__nvoc_thunk_RmResource_i2capiControl_Prologue; + // i2capiInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__i2capiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_i2capiInternalControlForward; - pThis->__i2capiGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_i2capiGetRegBaseOffsetAndSize; + // i2capiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__i2capiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_i2capiGetInternalObjectHandle; - pThis->__i2capiInternalControlForward__ = &__nvoc_thunk_GpuResource_i2capiInternalControlForward; + // i2capiAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__i2capiAccessCallback__ = &__nvoc_up_thunk_RmResource_i2capiAccessCallback; - pThis->__i2capiUnmapFrom__ = &__nvoc_thunk_RsResource_i2capiUnmapFrom; + // i2capiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__i2capiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_i2capiGetMemInterMapParams; - pThis->__i2capiControl_Epilogue__ = &__nvoc_thunk_RmResource_i2capiControl_Epilogue; + // i2capiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__i2capiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_i2capiCheckMemInterUnmap; - pThis->__i2capiGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_i2capiGetInternalObjectHandle; + // i2capiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__i2capiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_i2capiGetMemoryMappingDescriptor; - pThis->__i2capiControl__ = &__nvoc_thunk_GpuResource_i2capiControl; + // i2capiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__i2capiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_i2capiControlSerialization_Prologue; - pThis->__i2capiUnmap__ = &__nvoc_thunk_GpuResource_i2capiUnmap; + // i2capiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__i2capiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_i2capiControlSerialization_Epilogue; - pThis->__i2capiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_i2capiGetMemInterMapParams; + // i2capiControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__i2capiControl_Prologue__ = &__nvoc_up_thunk_RmResource_i2capiControl_Prologue; - pThis->__i2capiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_i2capiGetMemoryMappingDescriptor; + // i2capiControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__i2capiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_i2capiControl_Epilogue; - pThis->__i2capiControlFilter__ = &__nvoc_thunk_RsResource_i2capiControlFilter; + // i2capiCanCopy -- virtual inherited (res) base (gpures) + pThis->__i2capiCanCopy__ = &__nvoc_up_thunk_RsResource_i2capiCanCopy; - pThis->__i2capiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_i2capiControlSerialization_Prologue; + // i2capiIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__i2capiIsDuplicate__ = &__nvoc_up_thunk_RsResource_i2capiIsDuplicate; - pThis->__i2capiCanCopy__ = &__nvoc_thunk_RsResource_i2capiCanCopy; + // i2capiPreDestruct -- virtual inherited (res) base (gpures) + pThis->__i2capiPreDestruct__ = &__nvoc_up_thunk_RsResource_i2capiPreDestruct; - pThis->__i2capiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_i2capiIsPartialUnmapSupported; + // i2capiControlFilter -- virtual inherited (res) base (gpures) + pThis->__i2capiControlFilter__ = &__nvoc_up_thunk_RsResource_i2capiControlFilter; - pThis->__i2capiPreDestruct__ = &__nvoc_thunk_RsResource_i2capiPreDestruct; + // i2capiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__i2capiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_i2capiIsPartialUnmapSupported; - pThis->__i2capiIsDuplicate__ = &__nvoc_thunk_RsResource_i2capiIsDuplicate; + // i2capiMapTo -- virtual inherited (res) base (gpures) + pThis->__i2capiMapTo__ = &__nvoc_up_thunk_RsResource_i2capiMapTo; - pThis->__i2capiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_i2capiControlSerialization_Epilogue; + // i2capiUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__i2capiUnmapFrom__ = &__nvoc_up_thunk_RsResource_i2capiUnmapFrom; - pThis->__i2capiMap__ = &__nvoc_thunk_GpuResource_i2capiMap; + // i2capiGetRefCount -- virtual inherited (res) base (gpures) + pThis->__i2capiGetRefCount__ = &__nvoc_up_thunk_RsResource_i2capiGetRefCount; + + // i2capiAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__i2capiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_i2capiAddAdditionalDependants; +} // End __nvoc_init_funcTable_I2cApi_1 with approximately 30 basic block(s). - pThis->__i2capiAccessCallback__ = &__nvoc_thunk_RmResource_i2capiAccessCallback; -} +// Initialize vtable(s) for 30 virtual method(s). void __nvoc_init_funcTable_I2cApi(I2cApi *pThis) { + + // Initialize vtable(s) with 30 per-object function pointer(s). __nvoc_init_funcTable_I2cApi_1(pThis); } diff --git a/src/nvidia/generated/g_i2c_api_nvoc.h b/src/nvidia/generated/g_i2c_api_nvoc.h index 8bbd35eb5d..e44a2ea1c3 100644 --- a/src/nvidia/generated/g_i2c_api_nvoc.h +++ b/src/nvidia/generated/g_i2c_api_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_I2C_API_NVOC_H_ #define _G_I2C_API_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_i2c_api_nvoc.h" #ifndef _I2CAPI_H_ @@ -51,45 +59,54 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct I2cApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct I2cApi *__nvoc_pbase_I2cApi; - NV_STATUS (*__i2capiCtrlCmdI2cGetPortInfo__)(struct I2cApi *, NV402C_CTRL_I2C_GET_PORT_INFO_PARAMS *); - NV_STATUS (*__i2capiCtrlCmdI2cIndexed__)(struct I2cApi *, NV402C_CTRL_I2C_INDEXED_PARAMS *); - NV_STATUS (*__i2capiCtrlCmdI2cGetPortSpeed__)(struct I2cApi *, NV402C_CTRL_I2C_GET_PORT_SPEED_PARAMS *); - NV_STATUS (*__i2capiCtrlCmdI2cTableGetDevInfo__)(struct I2cApi *, NV402C_CTRL_I2C_TABLE_GET_DEV_INFO_PARAMS *); - NV_STATUS (*__i2capiCtrlCmdI2cTransaction__)(struct I2cApi *, NV402C_CTRL_I2C_TRANSACTION_PARAMS *); - NvBool (*__i2capiShareCallback__)(struct I2cApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__i2capiCheckMemInterUnmap__)(struct I2cApi *, NvBool); - NV_STATUS (*__i2capiMapTo__)(struct I2cApi *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__i2capiGetMapAddrSpace__)(struct I2cApi *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__i2capiGetRefCount__)(struct I2cApi *); - void (*__i2capiAddAdditionalDependants__)(struct RsClient *, struct I2cApi *, RsResourceRef *); - NV_STATUS (*__i2capiControl_Prologue__)(struct I2cApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__i2capiGetRegBaseOffsetAndSize__)(struct I2cApi *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__i2capiInternalControlForward__)(struct I2cApi *, NvU32, void *, NvU32); - NV_STATUS (*__i2capiUnmapFrom__)(struct I2cApi *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__i2capiControl_Epilogue__)(struct I2cApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__i2capiGetInternalObjectHandle__)(struct I2cApi *); - NV_STATUS (*__i2capiControl__)(struct I2cApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__i2capiUnmap__)(struct I2cApi *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__i2capiGetMemInterMapParams__)(struct I2cApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__i2capiGetMemoryMappingDescriptor__)(struct I2cApi *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__i2capiControlFilter__)(struct I2cApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__i2capiControlSerialization_Prologue__)(struct I2cApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__i2capiCanCopy__)(struct I2cApi *); - NvBool (*__i2capiIsPartialUnmapSupported__)(struct I2cApi *); - void (*__i2capiPreDestruct__)(struct I2cApi *); - NV_STATUS (*__i2capiIsDuplicate__)(struct I2cApi *, NvHandle, NvBool *); - void (*__i2capiControlSerialization_Epilogue__)(struct I2cApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__i2capiMap__)(struct I2cApi *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__i2capiAccessCallback__)(struct I2cApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct I2cApi *__nvoc_pbase_I2cApi; // i2capi + + // Vtable with 30 per-object function pointers + NV_STATUS (*__i2capiCtrlCmdI2cGetPortInfo__)(struct I2cApi * /*this*/, NV402C_CTRL_I2C_GET_PORT_INFO_PARAMS *); // exported (id=0x402c0101) + NV_STATUS (*__i2capiCtrlCmdI2cIndexed__)(struct I2cApi * /*this*/, NV402C_CTRL_I2C_INDEXED_PARAMS *); // exported (id=0x402c0102) + NV_STATUS (*__i2capiCtrlCmdI2cGetPortSpeed__)(struct I2cApi * /*this*/, NV402C_CTRL_I2C_GET_PORT_SPEED_PARAMS *); // exported (id=0x402c0103) + NV_STATUS (*__i2capiCtrlCmdI2cTableGetDevInfo__)(struct I2cApi * /*this*/, NV402C_CTRL_I2C_TABLE_GET_DEV_INFO_PARAMS *); // exported (id=0x402c0104) + NV_STATUS (*__i2capiCtrlCmdI2cTransaction__)(struct I2cApi * /*this*/, NV402C_CTRL_I2C_TRANSACTION_PARAMS *); // exported (id=0x402c0105) + NV_STATUS (*__i2capiControl__)(struct I2cApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__i2capiMap__)(struct I2cApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__i2capiUnmap__)(struct I2cApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__i2capiShareCallback__)(struct I2cApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__i2capiGetRegBaseOffsetAndSize__)(struct I2cApi * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__i2capiGetMapAddrSpace__)(struct I2cApi * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__i2capiInternalControlForward__)(struct I2cApi * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__i2capiGetInternalObjectHandle__)(struct I2cApi * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__i2capiAccessCallback__)(struct I2cApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__i2capiGetMemInterMapParams__)(struct I2cApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__i2capiCheckMemInterUnmap__)(struct I2cApi * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__i2capiGetMemoryMappingDescriptor__)(struct I2cApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__i2capiControlSerialization_Prologue__)(struct I2cApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__i2capiControlSerialization_Epilogue__)(struct I2cApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__i2capiControl_Prologue__)(struct I2cApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__i2capiControl_Epilogue__)(struct I2cApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__i2capiCanCopy__)(struct I2cApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__i2capiIsDuplicate__)(struct I2cApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__i2capiPreDestruct__)(struct I2cApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__i2capiControlFilter__)(struct I2cApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__i2capiIsPartialUnmapSupported__)(struct I2cApi * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__i2capiMapTo__)(struct I2cApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__i2capiUnmapFrom__)(struct I2cApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__i2capiGetRefCount__)(struct I2cApi * /*this*/); // virtual inherited (res) base (gpures) + void (*__i2capiAddAdditionalDependants__)(struct RsClient *, struct I2cApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) }; #ifndef __NVOC_CLASS_I2cApi_TYPEDEF__ @@ -101,6 +118,7 @@ typedef struct I2cApi I2cApi; #define __nvoc_class_id_I2cApi 0xceb8f6 #endif /* __nvoc_class_id_I2cApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_I2cApi; #define __staticCast_I2cApi(pThis) \ @@ -113,173 +131,206 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_I2cApi; ((I2cApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(I2cApi))) #endif //__nvoc_i2c_api_h_disabled - NV_STATUS __nvoc_objCreateDynamic_I2cApi(I2cApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_I2cApi(I2cApi**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_I2cApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_I2cApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define i2capiCtrlCmdI2cGetPortInfo_FNPTR(pI2cApi) pI2cApi->__i2capiCtrlCmdI2cGetPortInfo__ #define i2capiCtrlCmdI2cGetPortInfo(pI2cApi, pParams) i2capiCtrlCmdI2cGetPortInfo_DISPATCH(pI2cApi, pParams) +#define i2capiCtrlCmdI2cIndexed_FNPTR(pI2cApi) pI2cApi->__i2capiCtrlCmdI2cIndexed__ #define i2capiCtrlCmdI2cIndexed(pI2cApi, pParams) i2capiCtrlCmdI2cIndexed_DISPATCH(pI2cApi, pParams) +#define i2capiCtrlCmdI2cGetPortSpeed_FNPTR(pI2cApi) pI2cApi->__i2capiCtrlCmdI2cGetPortSpeed__ #define i2capiCtrlCmdI2cGetPortSpeed(pI2cApi, pParams) i2capiCtrlCmdI2cGetPortSpeed_DISPATCH(pI2cApi, pParams) +#define i2capiCtrlCmdI2cTableGetDevInfo_FNPTR(pI2cApi) pI2cApi->__i2capiCtrlCmdI2cTableGetDevInfo__ #define i2capiCtrlCmdI2cTableGetDevInfo(pI2cApi, pParams) i2capiCtrlCmdI2cTableGetDevInfo_DISPATCH(pI2cApi, pParams) +#define i2capiCtrlCmdI2cTransaction_FNPTR(pI2cApi) pI2cApi->__i2capiCtrlCmdI2cTransaction__ #define i2capiCtrlCmdI2cTransaction(pI2cApi, pParams) i2capiCtrlCmdI2cTransaction_DISPATCH(pI2cApi, pParams) +#define i2capiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define i2capiControl(pGpuResource, pCallContext, pParams) i2capiControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define i2capiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define i2capiMap(pGpuResource, pCallContext, pParams, pCpuMapping) i2capiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define i2capiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define i2capiUnmap(pGpuResource, pCallContext, pCpuMapping) i2capiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define i2capiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define i2capiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) i2capiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define i2capiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) i2capiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define i2capiMapTo(pResource, pParams) i2capiMapTo_DISPATCH(pResource, pParams) -#define i2capiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) i2capiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define i2capiGetRefCount(pResource) i2capiGetRefCount_DISPATCH(pResource) -#define i2capiAddAdditionalDependants(pClient, pResource, pReference) i2capiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define i2capiControl_Prologue(pResource, pCallContext, pParams) i2capiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define i2capiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define i2capiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) i2capiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define i2capiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define i2capiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) i2capiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define i2capiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define i2capiInternalControlForward(pGpuResource, command, pParams, size) i2capiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define i2capiUnmapFrom(pResource, pParams) i2capiUnmapFrom_DISPATCH(pResource, pParams) -#define i2capiControl_Epilogue(pResource, pCallContext, pParams) i2capiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define i2capiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define i2capiGetInternalObjectHandle(pGpuResource) i2capiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define i2capiControl(pGpuResource, pCallContext, pParams) i2capiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define i2capiUnmap(pGpuResource, pCallContext, pCpuMapping) i2capiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define i2capiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define i2capiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) i2capiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define i2capiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define i2capiGetMemInterMapParams(pRmResource, pParams) i2capiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define i2capiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define i2capiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) i2capiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define i2capiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define i2capiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) i2capiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define i2capiControlFilter(pResource, pCallContext, pParams) i2capiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define i2capiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define i2capiControlSerialization_Prologue(pResource, pCallContext, pParams) i2capiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define i2capiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define i2capiControlSerialization_Epilogue(pResource, pCallContext, pParams) i2capiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define i2capiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define i2capiControl_Prologue(pResource, pCallContext, pParams) i2capiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define i2capiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define i2capiControl_Epilogue(pResource, pCallContext, pParams) i2capiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define i2capiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define i2capiCanCopy(pResource) i2capiCanCopy_DISPATCH(pResource) -#define i2capiIsPartialUnmapSupported(pResource) i2capiIsPartialUnmapSupported_DISPATCH(pResource) -#define i2capiPreDestruct(pResource) i2capiPreDestruct_DISPATCH(pResource) +#define i2capiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define i2capiIsDuplicate(pResource, hMemory, pDuplicate) i2capiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define i2capiControlSerialization_Epilogue(pResource, pCallContext, pParams) i2capiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define i2capiMap(pGpuResource, pCallContext, pParams, pCpuMapping) i2capiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define i2capiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) i2capiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS i2capiCtrlCmdI2cGetPortInfo_IMPL(struct I2cApi *pI2cApi, NV402C_CTRL_I2C_GET_PORT_INFO_PARAMS *pParams); +#define i2capiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define i2capiPreDestruct(pResource) i2capiPreDestruct_DISPATCH(pResource) +#define i2capiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define i2capiControlFilter(pResource, pCallContext, pParams) i2capiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define i2capiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define i2capiIsPartialUnmapSupported(pResource) i2capiIsPartialUnmapSupported_DISPATCH(pResource) +#define i2capiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define i2capiMapTo(pResource, pParams) i2capiMapTo_DISPATCH(pResource, pParams) +#define i2capiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define i2capiUnmapFrom(pResource, pParams) i2capiUnmapFrom_DISPATCH(pResource, pParams) +#define i2capiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define i2capiGetRefCount(pResource) i2capiGetRefCount_DISPATCH(pResource) +#define i2capiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define i2capiAddAdditionalDependants(pClient, pResource, pReference) i2capiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS i2capiCtrlCmdI2cGetPortInfo_DISPATCH(struct I2cApi *pI2cApi, NV402C_CTRL_I2C_GET_PORT_INFO_PARAMS *pParams) { return pI2cApi->__i2capiCtrlCmdI2cGetPortInfo__(pI2cApi, pParams); } -NV_STATUS i2capiCtrlCmdI2cIndexed_IMPL(struct I2cApi *pI2cApi, NV402C_CTRL_I2C_INDEXED_PARAMS *pParams); - static inline NV_STATUS i2capiCtrlCmdI2cIndexed_DISPATCH(struct I2cApi *pI2cApi, NV402C_CTRL_I2C_INDEXED_PARAMS *pParams) { return pI2cApi->__i2capiCtrlCmdI2cIndexed__(pI2cApi, pParams); } -NV_STATUS i2capiCtrlCmdI2cGetPortSpeed_IMPL(struct I2cApi *pI2cApi, NV402C_CTRL_I2C_GET_PORT_SPEED_PARAMS *pParams); - static inline NV_STATUS i2capiCtrlCmdI2cGetPortSpeed_DISPATCH(struct I2cApi *pI2cApi, NV402C_CTRL_I2C_GET_PORT_SPEED_PARAMS *pParams) { return pI2cApi->__i2capiCtrlCmdI2cGetPortSpeed__(pI2cApi, pParams); } -NV_STATUS i2capiCtrlCmdI2cTableGetDevInfo_IMPL(struct I2cApi *pI2cApi, NV402C_CTRL_I2C_TABLE_GET_DEV_INFO_PARAMS *pParams); - static inline NV_STATUS i2capiCtrlCmdI2cTableGetDevInfo_DISPATCH(struct I2cApi *pI2cApi, NV402C_CTRL_I2C_TABLE_GET_DEV_INFO_PARAMS *pParams) { return pI2cApi->__i2capiCtrlCmdI2cTableGetDevInfo__(pI2cApi, pParams); } -NV_STATUS i2capiCtrlCmdI2cTransaction_IMPL(struct I2cApi *pI2cApi, NV402C_CTRL_I2C_TRANSACTION_PARAMS *pParams); - static inline NV_STATUS i2capiCtrlCmdI2cTransaction_DISPATCH(struct I2cApi *pI2cApi, NV402C_CTRL_I2C_TRANSACTION_PARAMS *pParams) { return pI2cApi->__i2capiCtrlCmdI2cTransaction__(pI2cApi, pParams); } -static inline NvBool i2capiShareCallback_DISPATCH(struct I2cApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__i2capiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS i2capiCheckMemInterUnmap_DISPATCH(struct I2cApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__i2capiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); -} - -static inline NV_STATUS i2capiMapTo_DISPATCH(struct I2cApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__i2capiMapTo__(pResource, pParams); -} - -static inline NV_STATUS i2capiGetMapAddrSpace_DISPATCH(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__i2capiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +static inline NV_STATUS i2capiControl_DISPATCH(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__i2capiControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 i2capiGetRefCount_DISPATCH(struct I2cApi *pResource) { - return pResource->__i2capiGetRefCount__(pResource); +static inline NV_STATUS i2capiMap_DISPATCH(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__i2capiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void i2capiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct I2cApi *pResource, RsResourceRef *pReference) { - pResource->__i2capiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS i2capiUnmap_DISPATCH(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__i2capiUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS i2capiControl_Prologue_DISPATCH(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__i2capiControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool i2capiShareCallback_DISPATCH(struct I2cApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__i2capiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS i2capiGetRegBaseOffsetAndSize_DISPATCH(struct I2cApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__i2capiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS i2capiInternalControlForward_DISPATCH(struct I2cApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__i2capiInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS i2capiUnmapFrom_DISPATCH(struct I2cApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__i2capiUnmapFrom__(pResource, pParams); +static inline NV_STATUS i2capiGetMapAddrSpace_DISPATCH(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__i2capiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void i2capiControl_Epilogue_DISPATCH(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__i2capiControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS i2capiInternalControlForward_DISPATCH(struct I2cApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__i2capiInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle i2capiGetInternalObjectHandle_DISPATCH(struct I2cApi *pGpuResource) { return pGpuResource->__i2capiGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS i2capiControl_DISPATCH(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__i2capiControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS i2capiUnmap_DISPATCH(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__i2capiUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool i2capiAccessCallback_DISPATCH(struct I2cApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__i2capiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS i2capiGetMemInterMapParams_DISPATCH(struct I2cApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__i2capiGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS i2capiGetMemoryMappingDescriptor_DISPATCH(struct I2cApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__i2capiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS i2capiCheckMemInterUnmap_DISPATCH(struct I2cApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__i2capiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS i2capiControlFilter_DISPATCH(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__i2capiControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS i2capiGetMemoryMappingDescriptor_DISPATCH(struct I2cApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__i2capiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS i2capiControlSerialization_Prologue_DISPATCH(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__i2capiControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void i2capiControlSerialization_Epilogue_DISPATCH(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__i2capiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS i2capiControl_Prologue_DISPATCH(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__i2capiControl_Prologue__(pResource, pCallContext, pParams); +} + +static inline void i2capiControl_Epilogue_DISPATCH(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__i2capiControl_Epilogue__(pResource, pCallContext, pParams); +} + static inline NvBool i2capiCanCopy_DISPATCH(struct I2cApi *pResource) { return pResource->__i2capiCanCopy__(pResource); } -static inline NvBool i2capiIsPartialUnmapSupported_DISPATCH(struct I2cApi *pResource) { - return pResource->__i2capiIsPartialUnmapSupported__(pResource); +static inline NV_STATUS i2capiIsDuplicate_DISPATCH(struct I2cApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__i2capiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void i2capiPreDestruct_DISPATCH(struct I2cApi *pResource) { pResource->__i2capiPreDestruct__(pResource); } -static inline NV_STATUS i2capiIsDuplicate_DISPATCH(struct I2cApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__i2capiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS i2capiControlFilter_DISPATCH(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__i2capiControlFilter__(pResource, pCallContext, pParams); } -static inline void i2capiControlSerialization_Epilogue_DISPATCH(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__i2capiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool i2capiIsPartialUnmapSupported_DISPATCH(struct I2cApi *pResource) { + return pResource->__i2capiIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS i2capiMap_DISPATCH(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__i2capiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS i2capiMapTo_DISPATCH(struct I2cApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__i2capiMapTo__(pResource, pParams); } -static inline NvBool i2capiAccessCallback_DISPATCH(struct I2cApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__i2capiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS i2capiUnmapFrom_DISPATCH(struct I2cApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__i2capiUnmapFrom__(pResource, pParams); +} + +static inline NvU32 i2capiGetRefCount_DISPATCH(struct I2cApi *pResource) { + return pResource->__i2capiGetRefCount__(pResource); } +static inline void i2capiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct I2cApi *pResource, RsResourceRef *pReference) { + pResource->__i2capiAddAdditionalDependants__(pClient, pResource, pReference); +} + +NV_STATUS i2capiCtrlCmdI2cGetPortInfo_IMPL(struct I2cApi *pI2cApi, NV402C_CTRL_I2C_GET_PORT_INFO_PARAMS *pParams); + +NV_STATUS i2capiCtrlCmdI2cIndexed_IMPL(struct I2cApi *pI2cApi, NV402C_CTRL_I2C_INDEXED_PARAMS *pParams); + +NV_STATUS i2capiCtrlCmdI2cGetPortSpeed_IMPL(struct I2cApi *pI2cApi, NV402C_CTRL_I2C_GET_PORT_SPEED_PARAMS *pParams); + +NV_STATUS i2capiCtrlCmdI2cTableGetDevInfo_IMPL(struct I2cApi *pI2cApi, NV402C_CTRL_I2C_TABLE_GET_DEV_INFO_PARAMS *pParams); + +NV_STATUS i2capiCtrlCmdI2cTransaction_IMPL(struct I2cApi *pI2cApi, NV402C_CTRL_I2C_TRANSACTION_PARAMS *pParams); + NV_STATUS i2capiConstruct_IMPL(struct I2cApi *arg_pI2cApi, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_i2capiConstruct(arg_pI2cApi, arg_pCallContext, arg_pParams) i2capiConstruct_IMPL(arg_pI2cApi, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_imex_session_api_nvoc.c b/src/nvidia/generated/g_imex_session_api_nvoc.c index f455bdb9aa..d5117240ad 100644 --- a/src/nvidia/generated/g_imex_session_api_nvoc.c +++ b/src/nvidia/generated/g_imex_session_api_nvoc.c @@ -84,90 +84,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_ImexSessionApi = /*pExportInfo=*/ &__nvoc_export_info_ImexSessionApi }; -static NvBool __nvoc_thunk_RmResource_imexsessionapiShareCallback(struct ImexSessionApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_imexsessionapiCheckMemInterUnmap(struct ImexSessionApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RsResource_imexsessionapiControl(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControl((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_imexsessionapiGetMemInterMapParams(struct ImexSessionApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_imexsessionapiGetMemoryMappingDescriptor(struct ImexSessionApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), ppMemDesc); -} - -static NvU32 __nvoc_thunk_RsResource_imexsessionapiGetRefCount(struct ImexSessionApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_imexsessionapiControlFilter(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pCallContext, pParams); -} - -static void __nvoc_thunk_RsResource_imexsessionapiAddAdditionalDependants(struct RsClient *pClient, struct ImexSessionApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_imexsessionapiControlSerialization_Prologue(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_imexsessionapiControl_Prologue(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_imexsessionapiCanCopy(struct ImexSessionApi *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_imexsessionapiUnmap(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pCallContext, pCpuMapping); -} - -static NvBool __nvoc_thunk_RsResource_imexsessionapiIsPartialUnmapSupported(struct ImexSessionApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_imexsessionapiPreDestruct(struct ImexSessionApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_imexsessionapiMapTo(struct ImexSessionApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_imexsessionapiIsDuplicate(struct ImexSessionApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_imexsessionapiControlSerialization_Epilogue(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pCallContext, pParams); -} - -static void __nvoc_thunk_RmResource_imexsessionapiControl_Epilogue(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_imexsessionapiUnmapFrom(struct ImexSessionApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_imexsessionapiMap(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_imexsessionapiAccessCallback(struct ImexSessionApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -175,12 +91,12 @@ static NvBool __nvoc_thunk_RmResource_imexsessionapiAccessCallback(struct ImexSe static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ImexSessionApi[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) imexsessionapiCtrlCmdGetFabricEvents_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, /*accessRight=*/0x0u, /*methodId=*/ 0xf10001u, /*paramSize=*/ sizeof(NV00F1_CTRL_GET_FABRIC_EVENTS_PARAMS), @@ -190,12 +106,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ImexSess #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) imexsessionapiCtrlCmdFinishMemUnimport_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, /*accessRight=*/0x0u, /*methodId=*/ 0xf10002u, /*paramSize=*/ sizeof(NV00F1_CTRL_FINISH_MEM_UNIMPORT_PARAMS), @@ -205,12 +121,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ImexSess #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) imexsessionapiCtrlCmdDisableImporters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xf10003u, /*paramSize=*/ sizeof(NV00F1_CTRL_DISABLE_IMPORTERS_PARAMS), @@ -222,6 +138,114 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ImexSess }; +// 21 up-thunk(s) defined to bridge methods in ImexSessionApi to superclasses + +// imexsessionapiAccessCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_imexsessionapiAccessCallback(struct ImexSessionApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// imexsessionapiShareCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_imexsessionapiShareCallback(struct ImexSessionApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// imexsessionapiGetMemInterMapParams: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_imexsessionapiGetMemInterMapParams(struct ImexSessionApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pParams); +} + +// imexsessionapiCheckMemInterUnmap: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_imexsessionapiCheckMemInterUnmap(struct ImexSessionApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), bSubdeviceHandleProvided); +} + +// imexsessionapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_imexsessionapiGetMemoryMappingDescriptor(struct ImexSessionApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), ppMemDesc); +} + +// imexsessionapiControlSerialization_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_imexsessionapiControlSerialization_Prologue(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pCallContext, pParams); +} + +// imexsessionapiControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_imexsessionapiControlSerialization_Epilogue(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pCallContext, pParams); +} + +// imexsessionapiControl_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_imexsessionapiControl_Prologue(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pCallContext, pParams); +} + +// imexsessionapiControl_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_imexsessionapiControl_Epilogue(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pCallContext, pParams); +} + +// imexsessionapiCanCopy: virtual inherited (res) base (rmres) +static NvBool __nvoc_up_thunk_RsResource_imexsessionapiCanCopy(struct ImexSessionApi *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset)); +} + +// imexsessionapiIsDuplicate: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiIsDuplicate(struct ImexSessionApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), hMemory, pDuplicate); +} + +// imexsessionapiPreDestruct: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_imexsessionapiPreDestruct(struct ImexSessionApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset)); +} + +// imexsessionapiControl: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiControl(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pCallContext, pParams); +} + +// imexsessionapiControlFilter: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiControlFilter(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pCallContext, pParams); +} + +// imexsessionapiMap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiMap(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pCallContext, pParams, pCpuMapping); +} + +// imexsessionapiUnmap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiUnmap(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pCallContext, pCpuMapping); +} + +// imexsessionapiIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body +static NvBool __nvoc_up_thunk_RsResource_imexsessionapiIsPartialUnmapSupported(struct ImexSessionApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset)); +} + +// imexsessionapiMapTo: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiMapTo(struct ImexSessionApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pParams); +} + +// imexsessionapiUnmapFrom: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiUnmapFrom(struct ImexSessionApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pParams); +} + +// imexsessionapiGetRefCount: virtual inherited (res) base (rmres) +static NvU32 __nvoc_up_thunk_RsResource_imexsessionapiGetRefCount(struct ImexSessionApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset)); +} + +// imexsessionapiAddAdditionalDependants: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_imexsessionapiAddAdditionalDependants(struct RsClient *pClient, struct ImexSessionApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pReference); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_ImexSessionApi = { /*numEntries=*/ 3, @@ -258,65 +282,94 @@ NV_STATUS __nvoc_ctor_ImexSessionApi(ImexSessionApi *pThis, struct CALL_CONTEXT return status; } +// Vtable initialization static void __nvoc_init_funcTable_ImexSessionApi_1(ImexSessionApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // imexsessionapiCtrlCmdGetFabricEvents -- exported (id=0xf10001) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__imexsessionapiCtrlCmdGetFabricEvents__ = &imexsessionapiCtrlCmdGetFabricEvents_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // imexsessionapiCtrlCmdFinishMemUnimport -- exported (id=0xf10002) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__imexsessionapiCtrlCmdFinishMemUnimport__ = &imexsessionapiCtrlCmdFinishMemUnimport_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // imexsessionapiCtrlCmdDisableImporters -- exported (id=0xf10003) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__imexsessionapiCtrlCmdDisableImporters__ = &imexsessionapiCtrlCmdDisableImporters_IMPL; #endif - pThis->__imexsessionapiShareCallback__ = &__nvoc_thunk_RmResource_imexsessionapiShareCallback; + // imexsessionapiAccessCallback -- virtual inherited (rmres) base (rmres) + pThis->__imexsessionapiAccessCallback__ = &__nvoc_up_thunk_RmResource_imexsessionapiAccessCallback; - pThis->__imexsessionapiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_imexsessionapiCheckMemInterUnmap; + // imexsessionapiShareCallback -- virtual inherited (rmres) base (rmres) + pThis->__imexsessionapiShareCallback__ = &__nvoc_up_thunk_RmResource_imexsessionapiShareCallback; - pThis->__imexsessionapiControl__ = &__nvoc_thunk_RsResource_imexsessionapiControl; + // imexsessionapiGetMemInterMapParams -- virtual inherited (rmres) base (rmres) + pThis->__imexsessionapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_imexsessionapiGetMemInterMapParams; - pThis->__imexsessionapiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_imexsessionapiGetMemInterMapParams; + // imexsessionapiCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) + pThis->__imexsessionapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_imexsessionapiCheckMemInterUnmap; - pThis->__imexsessionapiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_imexsessionapiGetMemoryMappingDescriptor; + // imexsessionapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) + pThis->__imexsessionapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_imexsessionapiGetMemoryMappingDescriptor; - pThis->__imexsessionapiGetRefCount__ = &__nvoc_thunk_RsResource_imexsessionapiGetRefCount; + // imexsessionapiControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__imexsessionapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_imexsessionapiControlSerialization_Prologue; - pThis->__imexsessionapiControlFilter__ = &__nvoc_thunk_RsResource_imexsessionapiControlFilter; + // imexsessionapiControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__imexsessionapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_imexsessionapiControlSerialization_Epilogue; - pThis->__imexsessionapiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_imexsessionapiAddAdditionalDependants; + // imexsessionapiControl_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__imexsessionapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_imexsessionapiControl_Prologue; - pThis->__imexsessionapiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_imexsessionapiControlSerialization_Prologue; + // imexsessionapiControl_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__imexsessionapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_imexsessionapiControl_Epilogue; - pThis->__imexsessionapiControl_Prologue__ = &__nvoc_thunk_RmResource_imexsessionapiControl_Prologue; + // imexsessionapiCanCopy -- virtual inherited (res) base (rmres) + pThis->__imexsessionapiCanCopy__ = &__nvoc_up_thunk_RsResource_imexsessionapiCanCopy; - pThis->__imexsessionapiCanCopy__ = &__nvoc_thunk_RsResource_imexsessionapiCanCopy; + // imexsessionapiIsDuplicate -- virtual inherited (res) base (rmres) + pThis->__imexsessionapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_imexsessionapiIsDuplicate; - pThis->__imexsessionapiUnmap__ = &__nvoc_thunk_RsResource_imexsessionapiUnmap; + // imexsessionapiPreDestruct -- virtual inherited (res) base (rmres) + pThis->__imexsessionapiPreDestruct__ = &__nvoc_up_thunk_RsResource_imexsessionapiPreDestruct; - pThis->__imexsessionapiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_imexsessionapiIsPartialUnmapSupported; + // imexsessionapiControl -- virtual inherited (res) base (rmres) + pThis->__imexsessionapiControl__ = &__nvoc_up_thunk_RsResource_imexsessionapiControl; - pThis->__imexsessionapiPreDestruct__ = &__nvoc_thunk_RsResource_imexsessionapiPreDestruct; + // imexsessionapiControlFilter -- virtual inherited (res) base (rmres) + pThis->__imexsessionapiControlFilter__ = &__nvoc_up_thunk_RsResource_imexsessionapiControlFilter; - pThis->__imexsessionapiMapTo__ = &__nvoc_thunk_RsResource_imexsessionapiMapTo; + // imexsessionapiMap -- virtual inherited (res) base (rmres) + pThis->__imexsessionapiMap__ = &__nvoc_up_thunk_RsResource_imexsessionapiMap; - pThis->__imexsessionapiIsDuplicate__ = &__nvoc_thunk_RsResource_imexsessionapiIsDuplicate; + // imexsessionapiUnmap -- virtual inherited (res) base (rmres) + pThis->__imexsessionapiUnmap__ = &__nvoc_up_thunk_RsResource_imexsessionapiUnmap; - pThis->__imexsessionapiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_imexsessionapiControlSerialization_Epilogue; + // imexsessionapiIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body + pThis->__imexsessionapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_imexsessionapiIsPartialUnmapSupported; - pThis->__imexsessionapiControl_Epilogue__ = &__nvoc_thunk_RmResource_imexsessionapiControl_Epilogue; + // imexsessionapiMapTo -- virtual inherited (res) base (rmres) + pThis->__imexsessionapiMapTo__ = &__nvoc_up_thunk_RsResource_imexsessionapiMapTo; - pThis->__imexsessionapiUnmapFrom__ = &__nvoc_thunk_RsResource_imexsessionapiUnmapFrom; + // imexsessionapiUnmapFrom -- virtual inherited (res) base (rmres) + pThis->__imexsessionapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_imexsessionapiUnmapFrom; - pThis->__imexsessionapiMap__ = &__nvoc_thunk_RsResource_imexsessionapiMap; + // imexsessionapiGetRefCount -- virtual inherited (res) base (rmres) + pThis->__imexsessionapiGetRefCount__ = &__nvoc_up_thunk_RsResource_imexsessionapiGetRefCount; - pThis->__imexsessionapiAccessCallback__ = &__nvoc_thunk_RmResource_imexsessionapiAccessCallback; -} + // imexsessionapiAddAdditionalDependants -- virtual inherited (res) base (rmres) + pThis->__imexsessionapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_imexsessionapiAddAdditionalDependants; +} // End __nvoc_init_funcTable_ImexSessionApi_1 with approximately 24 basic block(s). + +// Initialize vtable(s) for 24 virtual method(s). void __nvoc_init_funcTable_ImexSessionApi(ImexSessionApi *pThis) { + + // Initialize vtable(s) with 24 per-object function pointer(s). __nvoc_init_funcTable_ImexSessionApi_1(pThis); } diff --git a/src/nvidia/generated/g_imex_session_api_nvoc.h b/src/nvidia/generated/g_imex_session_api_nvoc.h index fc1f8b1137..4464467a1c 100644 --- a/src/nvidia/generated/g_imex_session_api_nvoc.h +++ b/src/nvidia/generated/g_imex_session_api_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_IMEX_SESSION_API_NVOC_H_ #define _G_IMEX_SESSION_API_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -36,6 +43,7 @@ extern "C" { * *****************************************************************************/ +#pragma once #include "g_imex_session_api_nvoc.h" #ifndef IMEX_SESSION_API_H @@ -73,38 +81,49 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct ImexSessionApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct ImexSessionApi *__nvoc_pbase_ImexSessionApi; - NV_STATUS (*__imexsessionapiCtrlCmdGetFabricEvents__)(struct ImexSessionApi *, NV00F1_CTRL_GET_FABRIC_EVENTS_PARAMS *); - NV_STATUS (*__imexsessionapiCtrlCmdFinishMemUnimport__)(struct ImexSessionApi *, NV00F1_CTRL_FINISH_MEM_UNIMPORT_PARAMS *); - NV_STATUS (*__imexsessionapiCtrlCmdDisableImporters__)(struct ImexSessionApi *, NV00F1_CTRL_DISABLE_IMPORTERS_PARAMS *); - NvBool (*__imexsessionapiShareCallback__)(struct ImexSessionApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__imexsessionapiCheckMemInterUnmap__)(struct ImexSessionApi *, NvBool); - NV_STATUS (*__imexsessionapiControl__)(struct ImexSessionApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__imexsessionapiGetMemInterMapParams__)(struct ImexSessionApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__imexsessionapiGetMemoryMappingDescriptor__)(struct ImexSessionApi *, struct MEMORY_DESCRIPTOR **); - NvU32 (*__imexsessionapiGetRefCount__)(struct ImexSessionApi *); - NV_STATUS (*__imexsessionapiControlFilter__)(struct ImexSessionApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__imexsessionapiAddAdditionalDependants__)(struct RsClient *, struct ImexSessionApi *, RsResourceRef *); - NV_STATUS (*__imexsessionapiControlSerialization_Prologue__)(struct ImexSessionApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__imexsessionapiControl_Prologue__)(struct ImexSessionApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__imexsessionapiCanCopy__)(struct ImexSessionApi *); - NV_STATUS (*__imexsessionapiUnmap__)(struct ImexSessionApi *, struct CALL_CONTEXT *, RsCpuMapping *); - NvBool (*__imexsessionapiIsPartialUnmapSupported__)(struct ImexSessionApi *); - void (*__imexsessionapiPreDestruct__)(struct ImexSessionApi *); - NV_STATUS (*__imexsessionapiMapTo__)(struct ImexSessionApi *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__imexsessionapiIsDuplicate__)(struct ImexSessionApi *, NvHandle, NvBool *); - void (*__imexsessionapiControlSerialization_Epilogue__)(struct ImexSessionApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__imexsessionapiControl_Epilogue__)(struct ImexSessionApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__imexsessionapiUnmapFrom__)(struct ImexSessionApi *, RS_RES_UNMAP_FROM_PARAMS *); - NV_STATUS (*__imexsessionapiMap__)(struct ImexSessionApi *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__imexsessionapiAccessCallback__)(struct ImexSessionApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^3 + struct RsResource *__nvoc_pbase_RsResource; // res super^2 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^2 + struct RmResource *__nvoc_pbase_RmResource; // rmres super + struct ImexSessionApi *__nvoc_pbase_ImexSessionApi; // imexsessionapi + + // Vtable with 24 per-object function pointers + NV_STATUS (*__imexsessionapiCtrlCmdGetFabricEvents__)(struct ImexSessionApi * /*this*/, NV00F1_CTRL_GET_FABRIC_EVENTS_PARAMS *); // exported (id=0xf10001) + NV_STATUS (*__imexsessionapiCtrlCmdFinishMemUnimport__)(struct ImexSessionApi * /*this*/, NV00F1_CTRL_FINISH_MEM_UNIMPORT_PARAMS *); // exported (id=0xf10002) + NV_STATUS (*__imexsessionapiCtrlCmdDisableImporters__)(struct ImexSessionApi * /*this*/, NV00F1_CTRL_DISABLE_IMPORTERS_PARAMS *); // exported (id=0xf10003) + NvBool (*__imexsessionapiAccessCallback__)(struct ImexSessionApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) + NvBool (*__imexsessionapiShareCallback__)(struct ImexSessionApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__imexsessionapiGetMemInterMapParams__)(struct ImexSessionApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__imexsessionapiCheckMemInterUnmap__)(struct ImexSessionApi * /*this*/, NvBool); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__imexsessionapiGetMemoryMappingDescriptor__)(struct ImexSessionApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__imexsessionapiControlSerialization_Prologue__)(struct ImexSessionApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__imexsessionapiControlSerialization_Epilogue__)(struct ImexSessionApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__imexsessionapiControl_Prologue__)(struct ImexSessionApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__imexsessionapiControl_Epilogue__)(struct ImexSessionApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NvBool (*__imexsessionapiCanCopy__)(struct ImexSessionApi * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__imexsessionapiIsDuplicate__)(struct ImexSessionApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (rmres) + void (*__imexsessionapiPreDestruct__)(struct ImexSessionApi * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__imexsessionapiControl__)(struct ImexSessionApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__imexsessionapiControlFilter__)(struct ImexSessionApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__imexsessionapiMap__)(struct ImexSessionApi * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NV_STATUS (*__imexsessionapiUnmap__)(struct ImexSessionApi * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NvBool (*__imexsessionapiIsPartialUnmapSupported__)(struct ImexSessionApi * /*this*/); // inline virtual inherited (res) base (rmres) body + NV_STATUS (*__imexsessionapiMapTo__)(struct ImexSessionApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) + NV_STATUS (*__imexsessionapiUnmapFrom__)(struct ImexSessionApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) + NvU32 (*__imexsessionapiGetRefCount__)(struct ImexSessionApi * /*this*/); // virtual inherited (res) base (rmres) + void (*__imexsessionapiAddAdditionalDependants__)(struct RsClient *, struct ImexSessionApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) + + // Data members NvU64 dupedCapDescriptor; NvU32 PRIVATE_FIELD(flags); }; @@ -118,6 +137,7 @@ typedef struct ImexSessionApi ImexSessionApi; #define __nvoc_class_id_ImexSessionApi 0xb4748b #endif /* __nvoc_class_id_ImexSessionApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_ImexSessionApi; #define __staticCast_ImexSessionApi(pThis) \ @@ -130,97 +150,134 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_ImexSessionApi; ((ImexSessionApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(ImexSessionApi))) #endif //__nvoc_imex_session_api_h_disabled - NV_STATUS __nvoc_objCreateDynamic_ImexSessionApi(ImexSessionApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_ImexSessionApi(ImexSessionApi**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_ImexSessionApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_ImexSessionApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define imexsessionapiCtrlCmdGetFabricEvents_FNPTR(pImexSessionApi) pImexSessionApi->__imexsessionapiCtrlCmdGetFabricEvents__ #define imexsessionapiCtrlCmdGetFabricEvents(pImexSessionApi, pParams) imexsessionapiCtrlCmdGetFabricEvents_DISPATCH(pImexSessionApi, pParams) +#define imexsessionapiCtrlCmdFinishMemUnimport_FNPTR(pImexSessionApi) pImexSessionApi->__imexsessionapiCtrlCmdFinishMemUnimport__ #define imexsessionapiCtrlCmdFinishMemUnimport(pImexSessionApi, pParams) imexsessionapiCtrlCmdFinishMemUnimport_DISPATCH(pImexSessionApi, pParams) +#define imexsessionapiCtrlCmdDisableImporters_FNPTR(pImexSessionApi) pImexSessionApi->__imexsessionapiCtrlCmdDisableImporters__ #define imexsessionapiCtrlCmdDisableImporters(pImexSessionApi, pParams) imexsessionapiCtrlCmdDisableImporters_DISPATCH(pImexSessionApi, pParams) +#define imexsessionapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define imexsessionapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) imexsessionapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define imexsessionapiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ #define imexsessionapiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) imexsessionapiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define imexsessionapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) imexsessionapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define imexsessionapiControl(pResource, pCallContext, pParams) imexsessionapiControl_DISPATCH(pResource, pCallContext, pParams) +#define imexsessionapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define imexsessionapiGetMemInterMapParams(pRmResource, pParams) imexsessionapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define imexsessionapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define imexsessionapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) imexsessionapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define imexsessionapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define imexsessionapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) imexsessionapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define imexsessionapiGetRefCount(pResource) imexsessionapiGetRefCount_DISPATCH(pResource) -#define imexsessionapiControlFilter(pResource, pCallContext, pParams) imexsessionapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define imexsessionapiAddAdditionalDependants(pClient, pResource, pReference) imexsessionapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define imexsessionapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define imexsessionapiControlSerialization_Prologue(pResource, pCallContext, pParams) imexsessionapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define imexsessionapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define imexsessionapiControlSerialization_Epilogue(pResource, pCallContext, pParams) imexsessionapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define imexsessionapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ #define imexsessionapiControl_Prologue(pResource, pCallContext, pParams) imexsessionapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define imexsessionapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define imexsessionapiControl_Epilogue(pResource, pCallContext, pParams) imexsessionapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define imexsessionapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define imexsessionapiCanCopy(pResource) imexsessionapiCanCopy_DISPATCH(pResource) +#define imexsessionapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define imexsessionapiIsDuplicate(pResource, hMemory, pDuplicate) imexsessionapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define imexsessionapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define imexsessionapiPreDestruct(pResource) imexsessionapiPreDestruct_DISPATCH(pResource) +#define imexsessionapiControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define imexsessionapiControl(pResource, pCallContext, pParams) imexsessionapiControl_DISPATCH(pResource, pCallContext, pParams) +#define imexsessionapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define imexsessionapiControlFilter(pResource, pCallContext, pParams) imexsessionapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define imexsessionapiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define imexsessionapiMap(pResource, pCallContext, pParams, pCpuMapping) imexsessionapiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define imexsessionapiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ #define imexsessionapiUnmap(pResource, pCallContext, pCpuMapping) imexsessionapiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define imexsessionapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ #define imexsessionapiIsPartialUnmapSupported(pResource) imexsessionapiIsPartialUnmapSupported_DISPATCH(pResource) -#define imexsessionapiPreDestruct(pResource) imexsessionapiPreDestruct_DISPATCH(pResource) +#define imexsessionapiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ #define imexsessionapiMapTo(pResource, pParams) imexsessionapiMapTo_DISPATCH(pResource, pParams) -#define imexsessionapiIsDuplicate(pResource, hMemory, pDuplicate) imexsessionapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define imexsessionapiControlSerialization_Epilogue(pResource, pCallContext, pParams) imexsessionapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define imexsessionapiControl_Epilogue(pResource, pCallContext, pParams) imexsessionapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define imexsessionapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ #define imexsessionapiUnmapFrom(pResource, pParams) imexsessionapiUnmapFrom_DISPATCH(pResource, pParams) -#define imexsessionapiMap(pResource, pCallContext, pParams, pCpuMapping) imexsessionapiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define imexsessionapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) imexsessionapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS imexsessionapiCtrlCmdGetFabricEvents_IMPL(struct ImexSessionApi *pImexSessionApi, NV00F1_CTRL_GET_FABRIC_EVENTS_PARAMS *pParams); +#define imexsessionapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define imexsessionapiGetRefCount(pResource) imexsessionapiGetRefCount_DISPATCH(pResource) +#define imexsessionapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define imexsessionapiAddAdditionalDependants(pClient, pResource, pReference) imexsessionapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS imexsessionapiCtrlCmdGetFabricEvents_DISPATCH(struct ImexSessionApi *pImexSessionApi, NV00F1_CTRL_GET_FABRIC_EVENTS_PARAMS *pParams) { return pImexSessionApi->__imexsessionapiCtrlCmdGetFabricEvents__(pImexSessionApi, pParams); } -NV_STATUS imexsessionapiCtrlCmdFinishMemUnimport_IMPL(struct ImexSessionApi *pImexSessionApi, NV00F1_CTRL_FINISH_MEM_UNIMPORT_PARAMS *pParams); - static inline NV_STATUS imexsessionapiCtrlCmdFinishMemUnimport_DISPATCH(struct ImexSessionApi *pImexSessionApi, NV00F1_CTRL_FINISH_MEM_UNIMPORT_PARAMS *pParams) { return pImexSessionApi->__imexsessionapiCtrlCmdFinishMemUnimport__(pImexSessionApi, pParams); } -NV_STATUS imexsessionapiCtrlCmdDisableImporters_IMPL(struct ImexSessionApi *pImexSessionApi, NV00F1_CTRL_DISABLE_IMPORTERS_PARAMS *pParams); - static inline NV_STATUS imexsessionapiCtrlCmdDisableImporters_DISPATCH(struct ImexSessionApi *pImexSessionApi, NV00F1_CTRL_DISABLE_IMPORTERS_PARAMS *pParams) { return pImexSessionApi->__imexsessionapiCtrlCmdDisableImporters__(pImexSessionApi, pParams); } +static inline NvBool imexsessionapiAccessCallback_DISPATCH(struct ImexSessionApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__imexsessionapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +} + static inline NvBool imexsessionapiShareCallback_DISPATCH(struct ImexSessionApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return pResource->__imexsessionapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } +static inline NV_STATUS imexsessionapiGetMemInterMapParams_DISPATCH(struct ImexSessionApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__imexsessionapiGetMemInterMapParams__(pRmResource, pParams); +} + static inline NV_STATUS imexsessionapiCheckMemInterUnmap_DISPATCH(struct ImexSessionApi *pRmResource, NvBool bSubdeviceHandleProvided) { return pRmResource->__imexsessionapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS imexsessionapiControl_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__imexsessionapiControl__(pResource, pCallContext, pParams); +static inline NV_STATUS imexsessionapiGetMemoryMappingDescriptor_DISPATCH(struct ImexSessionApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__imexsessionapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NV_STATUS imexsessionapiGetMemInterMapParams_DISPATCH(struct ImexSessionApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__imexsessionapiGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS imexsessionapiControlSerialization_Prologue_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__imexsessionapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS imexsessionapiGetMemoryMappingDescriptor_DISPATCH(struct ImexSessionApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__imexsessionapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void imexsessionapiControlSerialization_Epilogue_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__imexsessionapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NvU32 imexsessionapiGetRefCount_DISPATCH(struct ImexSessionApi *pResource) { - return pResource->__imexsessionapiGetRefCount__(pResource); +static inline NV_STATUS imexsessionapiControl_Prologue_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__imexsessionapiControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS imexsessionapiControlFilter_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__imexsessionapiControlFilter__(pResource, pCallContext, pParams); +static inline void imexsessionapiControl_Epilogue_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__imexsessionapiControl_Epilogue__(pResource, pCallContext, pParams); } -static inline void imexsessionapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ImexSessionApi *pResource, RsResourceRef *pReference) { - pResource->__imexsessionapiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvBool imexsessionapiCanCopy_DISPATCH(struct ImexSessionApi *pResource) { + return pResource->__imexsessionapiCanCopy__(pResource); } -static inline NV_STATUS imexsessionapiControlSerialization_Prologue_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__imexsessionapiControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS imexsessionapiIsDuplicate_DISPATCH(struct ImexSessionApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__imexsessionapiIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS imexsessionapiControl_Prologue_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__imexsessionapiControl_Prologue__(pResource, pCallContext, pParams); +static inline void imexsessionapiPreDestruct_DISPATCH(struct ImexSessionApi *pResource) { + pResource->__imexsessionapiPreDestruct__(pResource); } -static inline NvBool imexsessionapiCanCopy_DISPATCH(struct ImexSessionApi *pResource) { - return pResource->__imexsessionapiCanCopy__(pResource); +static inline NV_STATUS imexsessionapiControl_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__imexsessionapiControl__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS imexsessionapiControlFilter_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__imexsessionapiControlFilter__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS imexsessionapiMap_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__imexsessionapiMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS imexsessionapiUnmap_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { @@ -231,37 +288,27 @@ static inline NvBool imexsessionapiIsPartialUnmapSupported_DISPATCH(struct ImexS return pResource->__imexsessionapiIsPartialUnmapSupported__(pResource); } -static inline void imexsessionapiPreDestruct_DISPATCH(struct ImexSessionApi *pResource) { - pResource->__imexsessionapiPreDestruct__(pResource); -} - static inline NV_STATUS imexsessionapiMapTo_DISPATCH(struct ImexSessionApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return pResource->__imexsessionapiMapTo__(pResource, pParams); } -static inline NV_STATUS imexsessionapiIsDuplicate_DISPATCH(struct ImexSessionApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__imexsessionapiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS imexsessionapiUnmapFrom_DISPATCH(struct ImexSessionApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__imexsessionapiUnmapFrom__(pResource, pParams); } -static inline void imexsessionapiControlSerialization_Epilogue_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__imexsessionapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 imexsessionapiGetRefCount_DISPATCH(struct ImexSessionApi *pResource) { + return pResource->__imexsessionapiGetRefCount__(pResource); } -static inline void imexsessionapiControl_Epilogue_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__imexsessionapiControl_Epilogue__(pResource, pCallContext, pParams); +static inline void imexsessionapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ImexSessionApi *pResource, RsResourceRef *pReference) { + pResource->__imexsessionapiAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NV_STATUS imexsessionapiUnmapFrom_DISPATCH(struct ImexSessionApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__imexsessionapiUnmapFrom__(pResource, pParams); -} +NV_STATUS imexsessionapiCtrlCmdGetFabricEvents_IMPL(struct ImexSessionApi *pImexSessionApi, NV00F1_CTRL_GET_FABRIC_EVENTS_PARAMS *pParams); -static inline NV_STATUS imexsessionapiMap_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__imexsessionapiMap__(pResource, pCallContext, pParams, pCpuMapping); -} +NV_STATUS imexsessionapiCtrlCmdFinishMemUnimport_IMPL(struct ImexSessionApi *pImexSessionApi, NV00F1_CTRL_FINISH_MEM_UNIMPORT_PARAMS *pParams); -static inline NvBool imexsessionapiAccessCallback_DISPATCH(struct ImexSessionApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__imexsessionapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} +NV_STATUS imexsessionapiCtrlCmdDisableImporters_IMPL(struct ImexSessionApi *pImexSessionApi, NV00F1_CTRL_DISABLE_IMPORTERS_PARAMS *pParams); NV_STATUS imexsessionapiConstruct_IMPL(struct ImexSessionApi *arg_pImexSessionApi, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_intr_nvoc.c b/src/nvidia/generated/g_intr_nvoc.c index edc76e781b..6cd906f02a 100644 --- a/src/nvidia/generated/g_intr_nvoc.c +++ b/src/nvidia/generated/g_intr_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_Intr = /*pExportInfo=*/ &__nvoc_export_info_Intr }; -static NV_STATUS __nvoc_thunk_Intr_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pIntr, ENGDESCRIPTOR arg0) { - return intrConstructEngine(pGpu, (struct Intr *)(((unsigned char *)pIntr) - __nvoc_rtti_Intr_OBJENGSTATE.offset), arg0); +// 7 down-thunk(s) defined to bridge methods in Intr from superclasses + +// intrConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_Intr_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pIntr, ENGDESCRIPTOR arg3) { + return intrConstructEngine(pGpu, (struct Intr *)(((unsigned char *) pIntr) - __nvoc_rtti_Intr_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_Intr_engstateStateInitUnlocked(OBJGPU *pGpu, struct OBJENGSTATE *pIntr) { - return intrStateInitUnlocked(pGpu, (struct Intr *)(((unsigned char *)pIntr) - __nvoc_rtti_Intr_OBJENGSTATE.offset)); +// intrStatePreInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_Intr_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pIntr) { + return intrStatePreInitLocked(pGpu, (struct Intr *)(((unsigned char *) pIntr) - __nvoc_rtti_Intr_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_Intr_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pIntr) { - return intrStateInitLocked(pGpu, (struct Intr *)(((unsigned char *)pIntr) - __nvoc_rtti_Intr_OBJENGSTATE.offset)); +// intrStateInitUnlocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_Intr_engstateStateInitUnlocked(OBJGPU *pGpu, struct OBJENGSTATE *pIntr) { + return intrStateInitUnlocked(pGpu, (struct Intr *)(((unsigned char *) pIntr) - __nvoc_rtti_Intr_OBJENGSTATE.offset)); } -static void __nvoc_thunk_Intr_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pIntr) { - intrStateDestroy(pGpu, (struct Intr *)(((unsigned char *)pIntr) - __nvoc_rtti_Intr_OBJENGSTATE.offset)); +// intrStateInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_Intr_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pIntr) { + return intrStateInitLocked(pGpu, (struct Intr *)(((unsigned char *) pIntr) - __nvoc_rtti_Intr_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_Intr_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pIntr, NvU32 arg0) { - return intrStateLoad(pGpu, (struct Intr *)(((unsigned char *)pIntr) - __nvoc_rtti_Intr_OBJENGSTATE.offset), arg0); +// intrStateDestroy: virtual override (engstate) base (engstate) +static void __nvoc_down_thunk_Intr_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pIntr) { + intrStateDestroy(pGpu, (struct Intr *)(((unsigned char *) pIntr) - __nvoc_rtti_Intr_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_Intr_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pIntr, NvU32 arg0) { - return intrStateUnload(pGpu, (struct Intr *)(((unsigned char *)pIntr) - __nvoc_rtti_Intr_OBJENGSTATE.offset), arg0); +// intrStateLoad: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_Intr_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pIntr, NvU32 arg3) { + return intrStateLoad(pGpu, (struct Intr *)(((unsigned char *) pIntr) - __nvoc_rtti_Intr_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_intrStatePreLoad(POBJGPU pGpu, struct Intr *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset), arg0); +// intrStateUnload: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_Intr_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pIntr, NvU32 arg3) { + return intrStateUnload(pGpu, (struct Intr *)(((unsigned char *) pIntr) - __nvoc_rtti_Intr_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_intrStatePostUnload(POBJGPU pGpu, struct Intr *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset), arg0); + +// 7 up-thunk(s) defined to bridge methods in Intr to superclasses + +// intrInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_intrInitMissing(POBJGPU pGpu, struct Intr *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_intrStatePreUnload(POBJGPU pGpu, struct Intr *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset), arg0); +// intrStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_intrStatePreInitUnlocked(POBJGPU pGpu, struct Intr *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_intrInitMissing(POBJGPU pGpu, struct Intr *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset)); +// intrStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_intrStatePreLoad(POBJGPU pGpu, struct Intr *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_intrStatePreInitLocked(POBJGPU pGpu, struct Intr *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset)); +// intrStatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_intrStatePostLoad(POBJGPU pGpu, struct Intr *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_intrStatePreInitUnlocked(POBJGPU pGpu, struct Intr *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset)); +// intrStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_intrStatePreUnload(POBJGPU pGpu, struct Intr *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_intrStatePostLoad(POBJGPU pGpu, struct Intr *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset), arg0); +// intrStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_intrStatePostUnload(POBJGPU pGpu, struct Intr *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset), arg3); } -static NvBool __nvoc_thunk_OBJENGSTATE_intrIsPresent(POBJGPU pGpu, struct Intr *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset)); +// intrIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_intrIsPresent(POBJGPU pGpu, struct Intr *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_Intr = { /*numEntries=*/ 0, @@ -196,7 +216,7 @@ void __nvoc_init_dataField_Intr(Intr *pThis, RmHalspecOwner *pRmhalspecowner) { // Hal field -- bUseLegacyVectorAssignment if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { - pThis->bUseLegacyVectorAssignment = ((NvBool)(0 == 0)); + pThis->bUseLegacyVectorAssignment = ((NvBool)(0 != 0)); } // default else @@ -219,6 +239,7 @@ NV_STATUS __nvoc_ctor_Intr(Intr *pThis, RmHalspecOwner *pRmhalspecowner) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -231,15 +252,27 @@ static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspec PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); + // intrConstructEngine -- virtual override (engstate) base (engstate) pThis->__intrConstructEngine__ = &intrConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_Intr_engstateConstructEngine; + + // intrStatePreInitLocked -- virtual override (engstate) base (engstate) + pThis->__intrStatePreInitLocked__ = &intrStatePreInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_Intr_engstateStatePreInitLocked; + // intrStateInitUnlocked -- virtual override (engstate) base (engstate) pThis->__intrStateInitUnlocked__ = &intrStateInitUnlocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ = &__nvoc_down_thunk_Intr_engstateStateInitUnlocked; + // intrStateInitLocked -- virtual override (engstate) base (engstate) pThis->__intrStateInitLocked__ = &intrStateInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_Intr_engstateStateInitLocked; + // intrStateDestroy -- virtual override (engstate) base (engstate) pThis->__intrStateDestroy__ = &intrStateDestroy_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_Intr_engstateStateDestroy; - // Hal function -- intrDecodeStallIntrEn + // intrDecodeStallIntrEn -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__intrDecodeStallIntrEn__ = &intrDecodeStallIntrEn_TU102; @@ -249,7 +282,7 @@ static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspec pThis->__intrDecodeStallIntrEn__ = &intrDecodeStallIntrEn_4a4dee; } - // Hal function -- intrServiceVirtual + // intrServiceVirtual -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__intrServiceVirtual__ = &intrServiceVirtual_f2d351; @@ -259,7 +292,7 @@ static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspec pThis->__intrServiceVirtual__ = &intrServiceVirtual_TU102; } - // Hal function -- intrTriggerPrivDoorbell + // intrTriggerPrivDoorbell -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__intrTriggerPrivDoorbell__ = &intrTriggerPrivDoorbell_5baef9; @@ -269,17 +302,17 @@ static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspec pThis->__intrTriggerPrivDoorbell__ = &intrTriggerPrivDoorbell_TU102; } - // Hal function -- intrGetUvmSharedLeafEnDisableMask + // intrGetLocklessVectorsInRmSubtree -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { - pThis->__intrGetUvmSharedLeafEnDisableMask__ = &intrGetUvmSharedLeafEnDisableMask_TU102; + pThis->__intrGetLocklessVectorsInRmSubtree__ = &intrGetLocklessVectorsInRmSubtree_TU102; } else { - pThis->__intrGetUvmSharedLeafEnDisableMask__ = &intrGetUvmSharedLeafEnDisableMask_GA100; + pThis->__intrGetLocklessVectorsInRmSubtree__ = &intrGetLocklessVectorsInRmSubtree_GA100; } - // Hal function -- intrSetDisplayInterruptEnable + // intrSetDisplayInterruptEnable -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0fbe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ { pThis->__intrSetDisplayInterruptEnable__ = &intrSetDisplayInterruptEnable_TU102; @@ -290,7 +323,7 @@ static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspec pThis->__intrSetDisplayInterruptEnable__ = &intrSetDisplayInterruptEnable_b3696a; } - // Hal function -- intrReadRegTopEnSet + // intrReadRegTopEnSet -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000007e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 */ { pThis->__intrReadRegTopEnSet__ = &intrReadRegTopEnSet_CPU_TU102; @@ -300,7 +333,7 @@ static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspec pThis->__intrReadRegTopEnSet__ = &intrReadRegTopEnSet_CPU_GA102; } - // Hal function -- intrWriteRegTopEnSet + // intrWriteRegTopEnSet -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000007e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 */ { pThis->__intrWriteRegTopEnSet__ = &intrWriteRegTopEnSet_CPU_TU102; @@ -310,7 +343,7 @@ static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspec pThis->__intrWriteRegTopEnSet__ = &intrWriteRegTopEnSet_CPU_GA102; } - // Hal function -- intrWriteRegTopEnClear + // intrWriteRegTopEnClear -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000007e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 */ { pThis->__intrWriteRegTopEnClear__ = &intrWriteRegTopEnClear_CPU_TU102; @@ -320,7 +353,7 @@ static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspec pThis->__intrWriteRegTopEnClear__ = &intrWriteRegTopEnClear_CPU_GA102; } - // Hal function -- intrGetNumLeaves + // intrGetNumLeaves -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__intrGetNumLeaves__ = &intrGetNumLeaves_GH100; @@ -330,7 +363,7 @@ static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspec pThis->__intrGetNumLeaves__ = &intrGetNumLeaves_TU102; } - // Hal function -- intrGetLeafSize + // intrGetLeafSize -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__intrGetLeafSize__ = &intrGetLeafSize_GH100; @@ -340,7 +373,7 @@ static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspec pThis->__intrGetLeafSize__ = &intrGetLeafSize_TU102; } - // Hal function -- intrGetIntrTopNonStallMask + // intrGetIntrTopNonStallMask -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__intrGetIntrTopNonStallMask__ = &intrGetIntrTopNonStallMask_GH100; @@ -350,7 +383,7 @@ static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspec pThis->__intrGetIntrTopNonStallMask__ = &intrGetIntrTopNonStallMask_TU102; } - // Hal function -- intrSanityCheckEngineIntrStallVector + // intrSanityCheckEngineIntrStallVector -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__intrSanityCheckEngineIntrStallVector__ = &intrSanityCheckEngineIntrStallVector_GH100; @@ -365,7 +398,7 @@ static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspec pThis->__intrSanityCheckEngineIntrStallVector__ = &intrSanityCheckEngineIntrStallVector_b3696a; } - // Hal function -- intrSanityCheckEngineIntrNotificationVector + // intrSanityCheckEngineIntrNotificationVector -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__intrSanityCheckEngineIntrNotificationVector__ = &intrSanityCheckEngineIntrNotificationVector_GH100; @@ -380,13 +413,15 @@ static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspec pThis->__intrSanityCheckEngineIntrNotificationVector__ = &intrSanityCheckEngineIntrNotificationVector_b3696a; } - // Hal function -- intrStateLoad + // intrStateLoad -- virtual halified (singleton optimized) override (engstate) base (engstate) body pThis->__intrStateLoad__ = &intrStateLoad_TU102; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_Intr_engstateStateLoad; - // Hal function -- intrStateUnload + // intrStateUnload -- virtual halified (singleton optimized) override (engstate) base (engstate) body pThis->__intrStateUnload__ = &intrStateUnload_TU102; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_Intr_engstateStateUnload; - // Hal function -- intrInitSubtreeMap + // intrInitSubtreeMap -- halified (3 hals) body if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ && (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ )) { if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ @@ -403,17 +438,17 @@ static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspec pThis->__intrInitSubtreeMap__ = &intrInitSubtreeMap_395e98; } - // Hal function -- intrInitInterruptTable + // intrInitInterruptTable -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__intrInitInterruptTable__ = &intrInitInterruptTable_VIRTUAL; + pThis->__intrInitInterruptTable__ = &intrInitInterruptTable_VF; } else { pThis->__intrInitInterruptTable__ = &intrInitInterruptTable_KERNEL; } - // Hal function -- intrSetIntrMask + // intrSetIntrMask -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__intrSetIntrMask__ = &intrSetIntrMask_GP100; @@ -423,7 +458,7 @@ static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspec pThis->__intrSetIntrMask__ = &intrSetIntrMask_46f6a7; } - // Hal function -- intrSetIntrEnInHw + // intrSetIntrEnInHw -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__intrSetIntrEnInHw__ = &intrSetIntrEnInHw_GP100; @@ -433,7 +468,7 @@ static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspec pThis->__intrSetIntrEnInHw__ = &intrSetIntrEnInHw_d44104; } - // Hal function -- intrGetIntrEnFromHw + // intrGetIntrEnFromHw -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__intrGetIntrEnFromHw__ = &intrGetIntrEnFromHw_GP100; @@ -443,36 +478,33 @@ static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspec pThis->__intrGetIntrEnFromHw__ = &intrGetIntrEnFromHw_b2b553; } - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_Intr_engstateConstructEngine; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ = &__nvoc_thunk_Intr_engstateStateInitUnlocked; + // intrInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__intrInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_intrInitMissing; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_thunk_Intr_engstateStateInitLocked; + // intrStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__intrStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_intrStatePreInitUnlocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_thunk_Intr_engstateStateDestroy; + // intrStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__intrStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_intrStatePreLoad; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_thunk_Intr_engstateStateLoad; + // intrStatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__intrStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_intrStatePostLoad; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_thunk_Intr_engstateStateUnload; + // intrStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__intrStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_intrStatePreUnload; - pThis->__intrStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_intrStatePreLoad; + // intrStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__intrStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_intrStatePostUnload; - pThis->__intrStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_intrStatePostUnload; + // intrIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__intrIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_intrIsPresent; +} // End __nvoc_init_funcTable_Intr_1 with approximately 60 basic block(s). - pThis->__intrStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_intrStatePreUnload; - - pThis->__intrInitMissing__ = &__nvoc_thunk_OBJENGSTATE_intrInitMissing; - - pThis->__intrStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_intrStatePreInitLocked; - - pThis->__intrStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_intrStatePreInitUnlocked; - - pThis->__intrStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_intrStatePostLoad; - - pThis->__intrIsPresent__ = &__nvoc_thunk_OBJENGSTATE_intrIsPresent; -} +// Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_Intr(Intr *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 32 per-object function pointer(s). __nvoc_init_funcTable_Intr_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_intr_nvoc.h b/src/nvidia/generated/g_intr_nvoc.h index 5a9a48f05b..02d1ffbaa2 100644 --- a/src/nvidia/generated/g_intr_nvoc.h +++ b/src/nvidia/generated/g_intr_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_INTR_NVOC_H_ #define _G_INTR_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2006-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2006-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_intr_nvoc.h" #ifndef INTR_H @@ -94,7 +102,6 @@ typedef struct MAKE_VECTOR(InterruptTable, INTR_TABLE_ENTRY); - /*! * Mapping from leaf level interrupt to conceptual interrupt name. * @@ -207,9 +214,6 @@ typedef struct NvU32 flags; NvU32 cached; // Pascal+, to implement intr mask in SW. MC_ENGINE_BITVECTOR engMaskUnblocked; - MC_ENGINE_BITVECTOR engMaskOrig; - MC_ENGINE_BITVECTOR engMaskIntrsSeen; - MC_ENGINE_BITVECTOR engMaskIntrsDisabled; } INTR_MASK; // @@ -265,44 +269,55 @@ typedef struct Device Device; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct Intr { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct Intr *__nvoc_pbase_Intr; - NV_STATUS (*__intrConstructEngine__)(OBJGPU *, struct Intr *, ENGDESCRIPTOR); - NV_STATUS (*__intrStateInitUnlocked__)(OBJGPU *, struct Intr *); - NV_STATUS (*__intrStateInitLocked__)(OBJGPU *, struct Intr *); - void (*__intrStateDestroy__)(OBJGPU *, struct Intr *); - NvU32 (*__intrDecodeStallIntrEn__)(OBJGPU *, struct Intr *, NvU32); - void (*__intrServiceVirtual__)(OBJGPU *, struct Intr *); - NV_STATUS (*__intrTriggerPrivDoorbell__)(OBJGPU *, struct Intr *, NvU32); - NvU64 (*__intrGetUvmSharedLeafEnDisableMask__)(OBJGPU *, struct Intr *); - void (*__intrSetDisplayInterruptEnable__)(OBJGPU *, struct Intr *, NvBool, struct THREAD_STATE_NODE *); - NvU32 (*__intrReadRegTopEnSet__)(OBJGPU *, struct Intr *, NvU32, struct THREAD_STATE_NODE *); - void (*__intrWriteRegTopEnSet__)(OBJGPU *, struct Intr *, NvU32, NvU32, struct THREAD_STATE_NODE *); - void (*__intrWriteRegTopEnClear__)(OBJGPU *, struct Intr *, NvU32, NvU32, struct THREAD_STATE_NODE *); - NvU32 (*__intrGetNumLeaves__)(OBJGPU *, struct Intr *); - NvU32 (*__intrGetLeafSize__)(OBJGPU *, struct Intr *); - NvU64 (*__intrGetIntrTopNonStallMask__)(OBJGPU *, struct Intr *); - void (*__intrSanityCheckEngineIntrStallVector__)(OBJGPU *, struct Intr *, NvU32, NvU16); - void (*__intrSanityCheckEngineIntrNotificationVector__)(OBJGPU *, struct Intr *, NvU32, NvU16); - NV_STATUS (*__intrStateLoad__)(OBJGPU *, struct Intr *, NvU32); - NV_STATUS (*__intrStateUnload__)(OBJGPU *, struct Intr *, NvU32); - NV_STATUS (*__intrInitSubtreeMap__)(OBJGPU *, struct Intr *); - NV_STATUS (*__intrInitInterruptTable__)(OBJGPU *, struct Intr *); - NV_STATUS (*__intrSetIntrMask__)(OBJGPU *, struct Intr *, union MC_ENGINE_BITVECTOR *, struct THREAD_STATE_NODE *); - void (*__intrSetIntrEnInHw__)(OBJGPU *, struct Intr *, NvU32, struct THREAD_STATE_NODE *); - NvU32 (*__intrGetIntrEnFromHw__)(OBJGPU *, struct Intr *, struct THREAD_STATE_NODE *); - NV_STATUS (*__intrStatePreLoad__)(POBJGPU, struct Intr *, NvU32); - NV_STATUS (*__intrStatePostUnload__)(POBJGPU, struct Intr *, NvU32); - NV_STATUS (*__intrStatePreUnload__)(POBJGPU, struct Intr *, NvU32); - void (*__intrInitMissing__)(POBJGPU, struct Intr *); - NV_STATUS (*__intrStatePreInitLocked__)(POBJGPU, struct Intr *); - NV_STATUS (*__intrStatePreInitUnlocked__)(POBJGPU, struct Intr *); - NV_STATUS (*__intrStatePostLoad__)(POBJGPU, struct Intr *, NvU32); - NvBool (*__intrIsPresent__)(POBJGPU, struct Intr *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct Intr *__nvoc_pbase_Intr; // intr + + // Vtable with 32 per-object function pointers + NV_STATUS (*__intrConstructEngine__)(OBJGPU *, struct Intr * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__intrStatePreInitLocked__)(OBJGPU *, struct Intr * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__intrStateInitUnlocked__)(OBJGPU *, struct Intr * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__intrStateInitLocked__)(OBJGPU *, struct Intr * /*this*/); // virtual override (engstate) base (engstate) + void (*__intrStateDestroy__)(OBJGPU *, struct Intr * /*this*/); // virtual override (engstate) base (engstate) + NvU32 (*__intrDecodeStallIntrEn__)(OBJGPU *, struct Intr * /*this*/, NvU32); // halified (2 hals) body + void (*__intrServiceVirtual__)(OBJGPU *, struct Intr * /*this*/); // halified (2 hals) body + NV_STATUS (*__intrTriggerPrivDoorbell__)(OBJGPU *, struct Intr * /*this*/, NvU32); // halified (2 hals) body + void (*__intrGetLocklessVectorsInRmSubtree__)(OBJGPU *, struct Intr * /*this*/, NvU32 (*)[2]); // halified (2 hals) body + void (*__intrSetDisplayInterruptEnable__)(OBJGPU *, struct Intr * /*this*/, NvBool, struct THREAD_STATE_NODE *); // halified (2 hals) body + NvU32 (*__intrReadRegTopEnSet__)(OBJGPU *, struct Intr * /*this*/, NvU32, struct THREAD_STATE_NODE *); // halified (2 hals) body + void (*__intrWriteRegTopEnSet__)(OBJGPU *, struct Intr * /*this*/, NvU32, NvU32, struct THREAD_STATE_NODE *); // halified (2 hals) body + void (*__intrWriteRegTopEnClear__)(OBJGPU *, struct Intr * /*this*/, NvU32, NvU32, struct THREAD_STATE_NODE *); // halified (2 hals) body + NvU32 (*__intrGetNumLeaves__)(OBJGPU *, struct Intr * /*this*/); // halified (2 hals) body + NvU32 (*__intrGetLeafSize__)(OBJGPU *, struct Intr * /*this*/); // halified (2 hals) body + NvU64 (*__intrGetIntrTopNonStallMask__)(OBJGPU *, struct Intr * /*this*/); // halified (2 hals) body + void (*__intrSanityCheckEngineIntrStallVector__)(OBJGPU *, struct Intr * /*this*/, NvU32, NvU16); // halified (3 hals) body + void (*__intrSanityCheckEngineIntrNotificationVector__)(OBJGPU *, struct Intr * /*this*/, NvU32, NvU16); // halified (3 hals) body + NV_STATUS (*__intrStateLoad__)(OBJGPU *, struct Intr * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__intrStateUnload__)(OBJGPU *, struct Intr * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__intrInitSubtreeMap__)(OBJGPU *, struct Intr * /*this*/); // halified (3 hals) body + NV_STATUS (*__intrInitInterruptTable__)(OBJGPU *, struct Intr * /*this*/); // halified (2 hals) + NV_STATUS (*__intrSetIntrMask__)(OBJGPU *, struct Intr * /*this*/, union MC_ENGINE_BITVECTOR *, struct THREAD_STATE_NODE *); // halified (2 hals) body + void (*__intrSetIntrEnInHw__)(OBJGPU *, struct Intr * /*this*/, NvU32, struct THREAD_STATE_NODE *); // halified (2 hals) body + NvU32 (*__intrGetIntrEnFromHw__)(OBJGPU *, struct Intr * /*this*/, struct THREAD_STATE_NODE *); // halified (2 hals) body + void (*__intrInitMissing__)(POBJGPU, struct Intr * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__intrStatePreInitUnlocked__)(POBJGPU, struct Intr * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__intrStatePreLoad__)(POBJGPU, struct Intr * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__intrStatePostLoad__)(POBJGPU, struct Intr * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__intrStatePreUnload__)(POBJGPU, struct Intr * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__intrStatePostUnload__)(POBJGPU, struct Intr * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__intrIsPresent__)(POBJGPU, struct Intr * /*this*/); // virtual inherited (engstate) base (engstate) + + // 8 PDB properties NvBool PDB_PROP_INTR_ENABLE_DETAILED_LOGS; NvBool PDB_PROP_INTR_HOST_DRIVEN_ENGINES_REMOVED_FROM_PMC; NvBool PDB_PROP_INTR_READ_ONLY_EVEN_NUMBERED_INTR_LEAF_REGS; @@ -311,6 +326,8 @@ struct Intr { NvBool PDB_PROP_INTR_DISABLE_PER_INTR_DPC_QUEUEING; NvBool PDB_PROP_INTR_USE_INTR_MASK_FOR_LOCKING; NvBool PDB_PROP_INTR_MASK_SUPPORTED; + + // Data members NvU32 nonStallPmcIntrMask; NvU64 uvmSharedCpuLeafEn; NvU64 uvmSharedCpuLeafEnDisableMask; @@ -319,7 +336,7 @@ struct Intr { NvU32 displayIntrVector; NvU64 intrTopEnMask; InterruptTable intrTable; - IntrServiceRecord intrServiceTable[171]; + IntrServiceRecord intrServiceTable[175]; InterruptEntry *(vectorToMcIdx[1]); NvLength vectorToMcIdxCounts[1]; NvBool bDefaultNonstallNotify; @@ -349,6 +366,7 @@ typedef struct Intr Intr; #define __nvoc_class_id_Intr 0xc06e44 #endif /* __nvoc_class_id_Intr */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_Intr; #define __staticCast_Intr(pThis) \ @@ -361,6 +379,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_Intr; ((Intr*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(Intr))) #endif //__nvoc_intr_h_disabled +// Property macros #define PDB_PROP_INTR_HOST_DRIVEN_ENGINES_REMOVED_FROM_PMC_BASE_CAST #define PDB_PROP_INTR_HOST_DRIVEN_ENGINES_REMOVED_FROM_PMC_BASE_NAME PDB_PROP_INTR_HOST_DRIVEN_ENGINES_REMOVED_FROM_PMC #define PDB_PROP_INTR_SIMPLIFIED_VBLANK_HANDLING_FOR_CTRL_TREE_BASE_CAST @@ -386,85 +405,249 @@ NV_STATUS __nvoc_objCreate_Intr(Intr**, Dynamic*, NvU32); #define __objCreate_Intr(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_Intr((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define intrConstructEngine(pGpu, pIntr, arg0) intrConstructEngine_DISPATCH(pGpu, pIntr, arg0) + +// Wrapper macros +#define intrConstructEngine_FNPTR(pIntr) pIntr->__intrConstructEngine__ +#define intrConstructEngine(pGpu, pIntr, arg3) intrConstructEngine_DISPATCH(pGpu, pIntr, arg3) +#define intrStatePreInitLocked_FNPTR(pIntr) pIntr->__intrStatePreInitLocked__ +#define intrStatePreInitLocked(pGpu, pIntr) intrStatePreInitLocked_DISPATCH(pGpu, pIntr) +#define intrStateInitUnlocked_FNPTR(pIntr) pIntr->__intrStateInitUnlocked__ #define intrStateInitUnlocked(pGpu, pIntr) intrStateInitUnlocked_DISPATCH(pGpu, pIntr) +#define intrStateInitLocked_FNPTR(pIntr) pIntr->__intrStateInitLocked__ #define intrStateInitLocked(pGpu, pIntr) intrStateInitLocked_DISPATCH(pGpu, pIntr) +#define intrStateDestroy_FNPTR(pIntr) pIntr->__intrStateDestroy__ #define intrStateDestroy(pGpu, pIntr) intrStateDestroy_DISPATCH(pGpu, pIntr) -#define intrDecodeStallIntrEn(pGpu, pIntr, arg0) intrDecodeStallIntrEn_DISPATCH(pGpu, pIntr, arg0) -#define intrDecodeStallIntrEn_HAL(pGpu, pIntr, arg0) intrDecodeStallIntrEn_DISPATCH(pGpu, pIntr, arg0) +#define intrDecodeStallIntrEn_FNPTR(pIntr) pIntr->__intrDecodeStallIntrEn__ +#define intrDecodeStallIntrEn(pGpu, pIntr, arg3) intrDecodeStallIntrEn_DISPATCH(pGpu, pIntr, arg3) +#define intrDecodeStallIntrEn_HAL(pGpu, pIntr, arg3) intrDecodeStallIntrEn_DISPATCH(pGpu, pIntr, arg3) +#define intrServiceVirtual_FNPTR(pIntr) pIntr->__intrServiceVirtual__ #define intrServiceVirtual(pGpu, pIntr) intrServiceVirtual_DISPATCH(pGpu, pIntr) #define intrServiceVirtual_HAL(pGpu, pIntr) intrServiceVirtual_DISPATCH(pGpu, pIntr) +#define intrTriggerPrivDoorbell_FNPTR(pIntr) pIntr->__intrTriggerPrivDoorbell__ #define intrTriggerPrivDoorbell(pGpu, pIntr, gfid) intrTriggerPrivDoorbell_DISPATCH(pGpu, pIntr, gfid) #define intrTriggerPrivDoorbell_HAL(pGpu, pIntr, gfid) intrTriggerPrivDoorbell_DISPATCH(pGpu, pIntr, gfid) -#define intrGetUvmSharedLeafEnDisableMask(pGpu, pIntr) intrGetUvmSharedLeafEnDisableMask_DISPATCH(pGpu, pIntr) -#define intrGetUvmSharedLeafEnDisableMask_HAL(pGpu, pIntr) intrGetUvmSharedLeafEnDisableMask_DISPATCH(pGpu, pIntr) +#define intrGetLocklessVectorsInRmSubtree_FNPTR(pIntr) pIntr->__intrGetLocklessVectorsInRmSubtree__ +#define intrGetLocklessVectorsInRmSubtree(pGpu, pIntr, pInterruptVectors) intrGetLocklessVectorsInRmSubtree_DISPATCH(pGpu, pIntr, pInterruptVectors) +#define intrGetLocklessVectorsInRmSubtree_HAL(pGpu, pIntr, pInterruptVectors) intrGetLocklessVectorsInRmSubtree_DISPATCH(pGpu, pIntr, pInterruptVectors) +#define intrSetDisplayInterruptEnable_FNPTR(pIntr) pIntr->__intrSetDisplayInterruptEnable__ #define intrSetDisplayInterruptEnable(pGpu, pIntr, bEnable, pThreadState) intrSetDisplayInterruptEnable_DISPATCH(pGpu, pIntr, bEnable, pThreadState) #define intrSetDisplayInterruptEnable_HAL(pGpu, pIntr, bEnable, pThreadState) intrSetDisplayInterruptEnable_DISPATCH(pGpu, pIntr, bEnable, pThreadState) -#define intrReadRegTopEnSet(pGpu, pIntr, arg0, arg1) intrReadRegTopEnSet_DISPATCH(pGpu, pIntr, arg0, arg1) -#define intrReadRegTopEnSet_HAL(pGpu, pIntr, arg0, arg1) intrReadRegTopEnSet_DISPATCH(pGpu, pIntr, arg0, arg1) -#define intrWriteRegTopEnSet(pGpu, pIntr, arg0, arg1, arg2) intrWriteRegTopEnSet_DISPATCH(pGpu, pIntr, arg0, arg1, arg2) -#define intrWriteRegTopEnSet_HAL(pGpu, pIntr, arg0, arg1, arg2) intrWriteRegTopEnSet_DISPATCH(pGpu, pIntr, arg0, arg1, arg2) -#define intrWriteRegTopEnClear(pGpu, pIntr, arg0, arg1, arg2) intrWriteRegTopEnClear_DISPATCH(pGpu, pIntr, arg0, arg1, arg2) -#define intrWriteRegTopEnClear_HAL(pGpu, pIntr, arg0, arg1, arg2) intrWriteRegTopEnClear_DISPATCH(pGpu, pIntr, arg0, arg1, arg2) +#define intrReadRegTopEnSet_FNPTR(pIntr) pIntr->__intrReadRegTopEnSet__ +#define intrReadRegTopEnSet(pGpu, pIntr, arg3, arg4) intrReadRegTopEnSet_DISPATCH(pGpu, pIntr, arg3, arg4) +#define intrReadRegTopEnSet_HAL(pGpu, pIntr, arg3, arg4) intrReadRegTopEnSet_DISPATCH(pGpu, pIntr, arg3, arg4) +#define intrWriteRegTopEnSet_FNPTR(pIntr) pIntr->__intrWriteRegTopEnSet__ +#define intrWriteRegTopEnSet(pGpu, pIntr, arg3, arg4, arg5) intrWriteRegTopEnSet_DISPATCH(pGpu, pIntr, arg3, arg4, arg5) +#define intrWriteRegTopEnSet_HAL(pGpu, pIntr, arg3, arg4, arg5) intrWriteRegTopEnSet_DISPATCH(pGpu, pIntr, arg3, arg4, arg5) +#define intrWriteRegTopEnClear_FNPTR(pIntr) pIntr->__intrWriteRegTopEnClear__ +#define intrWriteRegTopEnClear(pGpu, pIntr, arg3, arg4, arg5) intrWriteRegTopEnClear_DISPATCH(pGpu, pIntr, arg3, arg4, arg5) +#define intrWriteRegTopEnClear_HAL(pGpu, pIntr, arg3, arg4, arg5) intrWriteRegTopEnClear_DISPATCH(pGpu, pIntr, arg3, arg4, arg5) +#define intrGetNumLeaves_FNPTR(pIntr) pIntr->__intrGetNumLeaves__ #define intrGetNumLeaves(pGpu, pIntr) intrGetNumLeaves_DISPATCH(pGpu, pIntr) #define intrGetNumLeaves_HAL(pGpu, pIntr) intrGetNumLeaves_DISPATCH(pGpu, pIntr) +#define intrGetLeafSize_FNPTR(pIntr) pIntr->__intrGetLeafSize__ #define intrGetLeafSize(pGpu, pIntr) intrGetLeafSize_DISPATCH(pGpu, pIntr) #define intrGetLeafSize_HAL(pGpu, pIntr) intrGetLeafSize_DISPATCH(pGpu, pIntr) +#define intrGetIntrTopNonStallMask_FNPTR(pIntr) pIntr->__intrGetIntrTopNonStallMask__ #define intrGetIntrTopNonStallMask(pGpu, pIntr) intrGetIntrTopNonStallMask_DISPATCH(pGpu, pIntr) #define intrGetIntrTopNonStallMask_HAL(pGpu, pIntr) intrGetIntrTopNonStallMask_DISPATCH(pGpu, pIntr) +#define intrSanityCheckEngineIntrStallVector_FNPTR(pIntr) pIntr->__intrSanityCheckEngineIntrStallVector__ #define intrSanityCheckEngineIntrStallVector(pGpu, pIntr, vector, mcEngine) intrSanityCheckEngineIntrStallVector_DISPATCH(pGpu, pIntr, vector, mcEngine) #define intrSanityCheckEngineIntrStallVector_HAL(pGpu, pIntr, vector, mcEngine) intrSanityCheckEngineIntrStallVector_DISPATCH(pGpu, pIntr, vector, mcEngine) +#define intrSanityCheckEngineIntrNotificationVector_FNPTR(pIntr) pIntr->__intrSanityCheckEngineIntrNotificationVector__ #define intrSanityCheckEngineIntrNotificationVector(pGpu, pIntr, vector, mcEngine) intrSanityCheckEngineIntrNotificationVector_DISPATCH(pGpu, pIntr, vector, mcEngine) #define intrSanityCheckEngineIntrNotificationVector_HAL(pGpu, pIntr, vector, mcEngine) intrSanityCheckEngineIntrNotificationVector_DISPATCH(pGpu, pIntr, vector, mcEngine) -#define intrStateLoad(pGpu, pIntr, arg0) intrStateLoad_DISPATCH(pGpu, pIntr, arg0) -#define intrStateLoad_HAL(pGpu, pIntr, arg0) intrStateLoad_DISPATCH(pGpu, pIntr, arg0) -#define intrStateUnload(pGpu, pIntr, arg0) intrStateUnload_DISPATCH(pGpu, pIntr, arg0) -#define intrStateUnload_HAL(pGpu, pIntr, arg0) intrStateUnload_DISPATCH(pGpu, pIntr, arg0) +#define intrStateLoad_FNPTR(pIntr) pIntr->__intrStateLoad__ +#define intrStateLoad(pGpu, pIntr, arg3) intrStateLoad_DISPATCH(pGpu, pIntr, arg3) +#define intrStateLoad_HAL(pGpu, pIntr, arg3) intrStateLoad_DISPATCH(pGpu, pIntr, arg3) +#define intrStateUnload_FNPTR(pIntr) pIntr->__intrStateUnload__ +#define intrStateUnload(pGpu, pIntr, arg3) intrStateUnload_DISPATCH(pGpu, pIntr, arg3) +#define intrStateUnload_HAL(pGpu, pIntr, arg3) intrStateUnload_DISPATCH(pGpu, pIntr, arg3) +#define intrInitSubtreeMap_FNPTR(pIntr) pIntr->__intrInitSubtreeMap__ #define intrInitSubtreeMap(pGpu, pIntr) intrInitSubtreeMap_DISPATCH(pGpu, pIntr) #define intrInitSubtreeMap_HAL(pGpu, pIntr) intrInitSubtreeMap_DISPATCH(pGpu, pIntr) +#define intrInitInterruptTable_FNPTR(pIntr) pIntr->__intrInitInterruptTable__ #define intrInitInterruptTable(pGpu, pIntr) intrInitInterruptTable_DISPATCH(pGpu, pIntr) #define intrInitInterruptTable_HAL(pGpu, pIntr) intrInitInterruptTable_DISPATCH(pGpu, pIntr) -#define intrSetIntrMask(pGpu, pIntr, arg0, arg1) intrSetIntrMask_DISPATCH(pGpu, pIntr, arg0, arg1) -#define intrSetIntrMask_HAL(pGpu, pIntr, arg0, arg1) intrSetIntrMask_DISPATCH(pGpu, pIntr, arg0, arg1) -#define intrSetIntrEnInHw(pGpu, pIntr, arg0, arg1) intrSetIntrEnInHw_DISPATCH(pGpu, pIntr, arg0, arg1) -#define intrSetIntrEnInHw_HAL(pGpu, pIntr, arg0, arg1) intrSetIntrEnInHw_DISPATCH(pGpu, pIntr, arg0, arg1) -#define intrGetIntrEnFromHw(pGpu, pIntr, arg0) intrGetIntrEnFromHw_DISPATCH(pGpu, pIntr, arg0) -#define intrGetIntrEnFromHw_HAL(pGpu, pIntr, arg0) intrGetIntrEnFromHw_DISPATCH(pGpu, pIntr, arg0) -#define intrStatePreLoad(pGpu, pEngstate, arg0) intrStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define intrStatePostUnload(pGpu, pEngstate, arg0) intrStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define intrStatePreUnload(pGpu, pEngstate, arg0) intrStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) +#define intrSetIntrMask_FNPTR(pIntr) pIntr->__intrSetIntrMask__ +#define intrSetIntrMask(pGpu, pIntr, arg3, arg4) intrSetIntrMask_DISPATCH(pGpu, pIntr, arg3, arg4) +#define intrSetIntrMask_HAL(pGpu, pIntr, arg3, arg4) intrSetIntrMask_DISPATCH(pGpu, pIntr, arg3, arg4) +#define intrSetIntrEnInHw_FNPTR(pIntr) pIntr->__intrSetIntrEnInHw__ +#define intrSetIntrEnInHw(pGpu, pIntr, arg3, arg4) intrSetIntrEnInHw_DISPATCH(pGpu, pIntr, arg3, arg4) +#define intrSetIntrEnInHw_HAL(pGpu, pIntr, arg3, arg4) intrSetIntrEnInHw_DISPATCH(pGpu, pIntr, arg3, arg4) +#define intrGetIntrEnFromHw_FNPTR(pIntr) pIntr->__intrGetIntrEnFromHw__ +#define intrGetIntrEnFromHw(pGpu, pIntr, arg3) intrGetIntrEnFromHw_DISPATCH(pGpu, pIntr, arg3) +#define intrGetIntrEnFromHw_HAL(pGpu, pIntr, arg3) intrGetIntrEnFromHw_DISPATCH(pGpu, pIntr, arg3) +#define intrInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define intrInitMissing(pGpu, pEngstate) intrInitMissing_DISPATCH(pGpu, pEngstate) -#define intrStatePreInitLocked(pGpu, pEngstate) intrStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define intrStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define intrStatePreInitUnlocked(pGpu, pEngstate) intrStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define intrStatePostLoad(pGpu, pEngstate, arg0) intrStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) +#define intrStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define intrStatePreLoad(pGpu, pEngstate, arg3) intrStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define intrStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define intrStatePostLoad(pGpu, pEngstate, arg3) intrStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define intrStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define intrStatePreUnload(pGpu, pEngstate, arg3) intrStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define intrStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define intrStatePostUnload(pGpu, pEngstate, arg3) intrStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define intrIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define intrIsPresent(pGpu, pEngstate) intrIsPresent_DISPATCH(pGpu, pEngstate) -NV_STATUS intrCheckFecsEventbufferPending_IMPL(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, NvBool *arg1); + +// Dispatch functions +static inline NV_STATUS intrConstructEngine_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, ENGDESCRIPTOR arg3) { + return pIntr->__intrConstructEngine__(pGpu, pIntr, arg3); +} + +static inline NV_STATUS intrStatePreInitLocked_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { + return pIntr->__intrStatePreInitLocked__(pGpu, pIntr); +} + +static inline NV_STATUS intrStateInitUnlocked_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { + return pIntr->__intrStateInitUnlocked__(pGpu, pIntr); +} + +static inline NV_STATUS intrStateInitLocked_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { + return pIntr->__intrStateInitLocked__(pGpu, pIntr); +} + +static inline void intrStateDestroy_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { + pIntr->__intrStateDestroy__(pGpu, pIntr); +} + +static inline NvU32 intrDecodeStallIntrEn_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3) { + return pIntr->__intrDecodeStallIntrEn__(pGpu, pIntr, arg3); +} + +static inline void intrServiceVirtual_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { + pIntr->__intrServiceVirtual__(pGpu, pIntr); +} + +static inline NV_STATUS intrTriggerPrivDoorbell_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 gfid) { + return pIntr->__intrTriggerPrivDoorbell__(pGpu, pIntr, gfid); +} + +static inline void intrGetLocklessVectorsInRmSubtree_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 (*pInterruptVectors)[2]) { + pIntr->__intrGetLocklessVectorsInRmSubtree__(pGpu, pIntr, pInterruptVectors); +} + +static inline void intrSetDisplayInterruptEnable_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvBool bEnable, struct THREAD_STATE_NODE *pThreadState) { + pIntr->__intrSetDisplayInterruptEnable__(pGpu, pIntr, bEnable, pThreadState); +} + +static inline NvU32 intrReadRegTopEnSet_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, struct THREAD_STATE_NODE *arg4) { + return pIntr->__intrReadRegTopEnSet__(pGpu, pIntr, arg3, arg4); +} + +static inline void intrWriteRegTopEnSet_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5) { + pIntr->__intrWriteRegTopEnSet__(pGpu, pIntr, arg3, arg4, arg5); +} + +static inline void intrWriteRegTopEnClear_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5) { + pIntr->__intrWriteRegTopEnClear__(pGpu, pIntr, arg3, arg4, arg5); +} + +static inline NvU32 intrGetNumLeaves_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { + return pIntr->__intrGetNumLeaves__(pGpu, pIntr); +} + +static inline NvU32 intrGetLeafSize_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { + return pIntr->__intrGetLeafSize__(pGpu, pIntr); +} + +static inline NvU64 intrGetIntrTopNonStallMask_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { + return pIntr->__intrGetIntrTopNonStallMask__(pGpu, pIntr); +} + +static inline void intrSanityCheckEngineIntrStallVector_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 vector, NvU16 mcEngine) { + pIntr->__intrSanityCheckEngineIntrStallVector__(pGpu, pIntr, vector, mcEngine); +} + +static inline void intrSanityCheckEngineIntrNotificationVector_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 vector, NvU16 mcEngine) { + pIntr->__intrSanityCheckEngineIntrNotificationVector__(pGpu, pIntr, vector, mcEngine); +} + +static inline NV_STATUS intrStateLoad_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3) { + return pIntr->__intrStateLoad__(pGpu, pIntr, arg3); +} + +static inline NV_STATUS intrStateUnload_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3) { + return pIntr->__intrStateUnload__(pGpu, pIntr, arg3); +} + +static inline NV_STATUS intrInitSubtreeMap_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { + return pIntr->__intrInitSubtreeMap__(pGpu, pIntr); +} + +static inline NV_STATUS intrInitInterruptTable_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { + return pIntr->__intrInitInterruptTable__(pGpu, pIntr); +} + +static inline NV_STATUS intrSetIntrMask_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4) { + return pIntr->__intrSetIntrMask__(pGpu, pIntr, arg3, arg4); +} + +static inline void intrSetIntrEnInHw_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, struct THREAD_STATE_NODE *arg4) { + pIntr->__intrSetIntrEnInHw__(pGpu, pIntr, arg3, arg4); +} + +static inline NvU32 intrGetIntrEnFromHw_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg3) { + return pIntr->__intrGetIntrEnFromHw__(pGpu, pIntr, arg3); +} + +static inline void intrInitMissing_DISPATCH(POBJGPU pGpu, struct Intr *pEngstate) { + pEngstate->__intrInitMissing__(pGpu, pEngstate); +} + +static inline NV_STATUS intrStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct Intr *pEngstate) { + return pEngstate->__intrStatePreInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS intrStatePreLoad_DISPATCH(POBJGPU pGpu, struct Intr *pEngstate, NvU32 arg3) { + return pEngstate->__intrStatePreLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS intrStatePostLoad_DISPATCH(POBJGPU pGpu, struct Intr *pEngstate, NvU32 arg3) { + return pEngstate->__intrStatePostLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS intrStatePreUnload_DISPATCH(POBJGPU pGpu, struct Intr *pEngstate, NvU32 arg3) { + return pEngstate->__intrStatePreUnload__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS intrStatePostUnload_DISPATCH(POBJGPU pGpu, struct Intr *pEngstate, NvU32 arg3) { + return pEngstate->__intrStatePostUnload__(pGpu, pEngstate, arg3); +} + +static inline NvBool intrIsPresent_DISPATCH(POBJGPU pGpu, struct Intr *pEngstate) { + return pEngstate->__intrIsPresent__(pGpu, pEngstate); +} + +NV_STATUS intrCheckFecsEventbufferPending_IMPL(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, NvBool *arg4); #ifdef __nvoc_intr_h_disabled -static inline NV_STATUS intrCheckFecsEventbufferPending(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, NvBool *arg1) { +static inline NV_STATUS intrCheckFecsEventbufferPending(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, NvBool *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_intr_h_disabled -#define intrCheckFecsEventbufferPending(pGpu, pIntr, arg0, arg1) intrCheckFecsEventbufferPending_IMPL(pGpu, pIntr, arg0, arg1) +#define intrCheckFecsEventbufferPending(pGpu, pIntr, arg3, arg4) intrCheckFecsEventbufferPending_IMPL(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -#define intrCheckFecsEventbufferPending_HAL(pGpu, pIntr, arg0, arg1) intrCheckFecsEventbufferPending(pGpu, pIntr, arg0, arg1) +#define intrCheckFecsEventbufferPending_HAL(pGpu, pIntr, arg3, arg4) intrCheckFecsEventbufferPending(pGpu, pIntr, arg3, arg4) -NV_STATUS intrCheckAndServiceFecsEventbuffer_IMPL(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1); +NV_STATUS intrCheckAndServiceFecsEventbuffer_IMPL(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4); #ifdef __nvoc_intr_h_disabled -static inline NV_STATUS intrCheckAndServiceFecsEventbuffer(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1) { +static inline NV_STATUS intrCheckAndServiceFecsEventbuffer(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_intr_h_disabled -#define intrCheckAndServiceFecsEventbuffer(pGpu, pIntr, arg0, arg1) intrCheckAndServiceFecsEventbuffer_IMPL(pGpu, pIntr, arg0, arg1) +#define intrCheckAndServiceFecsEventbuffer(pGpu, pIntr, arg3, arg4) intrCheckAndServiceFecsEventbuffer_IMPL(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -#define intrCheckAndServiceFecsEventbuffer_HAL(pGpu, pIntr, arg0, arg1) intrCheckAndServiceFecsEventbuffer(pGpu, pIntr, arg0, arg1) +#define intrCheckAndServiceFecsEventbuffer_HAL(pGpu, pIntr, arg3, arg4) intrCheckAndServiceFecsEventbuffer(pGpu, pIntr, arg3, arg4) static inline NV_STATUS intrStateDestroyPhysical_56cd7a(OBJGPU *pGpu, struct Intr *pIntr) { return NV_OK; @@ -499,73 +682,73 @@ static inline void intrSetInterruptMaskBug1470153War(OBJGPU *pGpu, struct Intr * #define intrSetInterruptMaskBug1470153War_HAL(pGpu, pIntr) intrSetInterruptMaskBug1470153War(pGpu, pIntr) -NV_STATUS intrGetPendingNonStall_TU102(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1); +NV_STATUS intrGetPendingNonStall_TU102(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4); #ifdef __nvoc_intr_h_disabled -static inline NV_STATUS intrGetPendingNonStall(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1) { +static inline NV_STATUS intrGetPendingNonStall(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_intr_h_disabled -#define intrGetPendingNonStall(pGpu, pIntr, arg0, arg1) intrGetPendingNonStall_TU102(pGpu, pIntr, arg0, arg1) +#define intrGetPendingNonStall(pGpu, pIntr, arg3, arg4) intrGetPendingNonStall_TU102(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -#define intrGetPendingNonStall_HAL(pGpu, pIntr, arg0, arg1) intrGetPendingNonStall(pGpu, pIntr, arg0, arg1) +#define intrGetPendingNonStall_HAL(pGpu, pIntr, arg3, arg4) intrGetPendingNonStall(pGpu, pIntr, arg3, arg4) -NV_STATUS intrServiceNonStall_TU102(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1); +NV_STATUS intrServiceNonStall_TU102(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4); #ifdef __nvoc_intr_h_disabled -static inline NV_STATUS intrServiceNonStall(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1) { +static inline NV_STATUS intrServiceNonStall(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_intr_h_disabled -#define intrServiceNonStall(pGpu, pIntr, arg0, arg1) intrServiceNonStall_TU102(pGpu, pIntr, arg0, arg1) +#define intrServiceNonStall(pGpu, pIntr, arg3, arg4) intrServiceNonStall_TU102(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -#define intrServiceNonStall_HAL(pGpu, pIntr, arg0, arg1) intrServiceNonStall(pGpu, pIntr, arg0, arg1) +#define intrServiceNonStall_HAL(pGpu, pIntr, arg3, arg4) intrServiceNonStall(pGpu, pIntr, arg3, arg4) -NvU32 intrGetNonStallEnable_TU102(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg0); +NvU32 intrGetNonStallEnable_TU102(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg3); #ifdef __nvoc_intr_h_disabled -static inline NvU32 intrGetNonStallEnable(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg0) { +static inline NvU32 intrGetNonStallEnable(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg3) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return 0; } #else //__nvoc_intr_h_disabled -#define intrGetNonStallEnable(pGpu, pIntr, arg0) intrGetNonStallEnable_TU102(pGpu, pIntr, arg0) +#define intrGetNonStallEnable(pGpu, pIntr, arg3) intrGetNonStallEnable_TU102(pGpu, pIntr, arg3) #endif //__nvoc_intr_h_disabled -#define intrGetNonStallEnable_HAL(pGpu, pIntr, arg0) intrGetNonStallEnable(pGpu, pIntr, arg0) +#define intrGetNonStallEnable_HAL(pGpu, pIntr, arg3) intrGetNonStallEnable(pGpu, pIntr, arg3) -void intrDisableNonStall_TU102(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg0); +void intrDisableNonStall_TU102(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg3); #ifdef __nvoc_intr_h_disabled -static inline void intrDisableNonStall(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg0) { +static inline void intrDisableNonStall(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg3) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); } #else //__nvoc_intr_h_disabled -#define intrDisableNonStall(pGpu, pIntr, arg0) intrDisableNonStall_TU102(pGpu, pIntr, arg0) +#define intrDisableNonStall(pGpu, pIntr, arg3) intrDisableNonStall_TU102(pGpu, pIntr, arg3) #endif //__nvoc_intr_h_disabled -#define intrDisableNonStall_HAL(pGpu, pIntr, arg0) intrDisableNonStall(pGpu, pIntr, arg0) +#define intrDisableNonStall_HAL(pGpu, pIntr, arg3) intrDisableNonStall(pGpu, pIntr, arg3) -void intrRestoreNonStall_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, struct THREAD_STATE_NODE *arg1); +void intrRestoreNonStall_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, struct THREAD_STATE_NODE *arg4); #ifdef __nvoc_intr_h_disabled -static inline void intrRestoreNonStall(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, struct THREAD_STATE_NODE *arg1) { +static inline void intrRestoreNonStall(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, struct THREAD_STATE_NODE *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); } #else //__nvoc_intr_h_disabled -#define intrRestoreNonStall(pGpu, pIntr, arg0, arg1) intrRestoreNonStall_TU102(pGpu, pIntr, arg0, arg1) +#define intrRestoreNonStall(pGpu, pIntr, arg3, arg4) intrRestoreNonStall_TU102(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -#define intrRestoreNonStall_HAL(pGpu, pIntr, arg0, arg1) intrRestoreNonStall(pGpu, pIntr, arg0, arg1) +#define intrRestoreNonStall_HAL(pGpu, pIntr, arg3, arg4) intrRestoreNonStall(pGpu, pIntr, arg3, arg4) void intrGetStallInterruptMode_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *pIntrmode, NvBool *pPending); @@ -593,19 +776,19 @@ static inline void intrEncodeStallIntrEn(OBJGPU *pGpu, struct Intr *pIntr, NvU32 #define intrEncodeStallIntrEn_HAL(pGpu, pIntr, intrEn, pIntrEnSet, pIntrEnClear) intrEncodeStallIntrEn(pGpu, pIntr, intrEn, pIntrEnSet, pIntrEnClear) -NV_STATUS intrCheckAndServiceNonReplayableFault_TU102(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg0); +NV_STATUS intrCheckAndServiceNonReplayableFault_TU102(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg3); #ifdef __nvoc_intr_h_disabled -static inline NV_STATUS intrCheckAndServiceNonReplayableFault(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg0) { +static inline NV_STATUS intrCheckAndServiceNonReplayableFault(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg3) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_intr_h_disabled -#define intrCheckAndServiceNonReplayableFault(pGpu, pIntr, arg0) intrCheckAndServiceNonReplayableFault_TU102(pGpu, pIntr, arg0) +#define intrCheckAndServiceNonReplayableFault(pGpu, pIntr, arg3) intrCheckAndServiceNonReplayableFault_TU102(pGpu, pIntr, arg3) #endif //__nvoc_intr_h_disabled -#define intrCheckAndServiceNonReplayableFault_HAL(pGpu, pIntr, arg0) intrCheckAndServiceNonReplayableFault(pGpu, pIntr, arg0) +#define intrCheckAndServiceNonReplayableFault_HAL(pGpu, pIntr, arg3) intrCheckAndServiceNonReplayableFault(pGpu, pIntr, arg3) static inline NvU32 intrGetStallBaseVector_4a4dee(OBJGPU *pGpu, struct Intr *pIntr) { return 0; @@ -792,41 +975,41 @@ static inline void intrResetIntrRegistersForVF(OBJGPU *pGpu, struct Intr *pIntr, #define intrResetIntrRegistersForVF_HAL(pGpu, pIntr, gfid) intrResetIntrRegistersForVF(pGpu, pIntr, gfid) -static inline NV_STATUS intrSaveIntrRegValue_46f6a7(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 *arg1, NvU32 *arg2) { +static inline NV_STATUS intrSaveIntrRegValue_46f6a7(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 *arg4, NvU32 *arg5) { return NV_ERR_NOT_SUPPORTED; } -NV_STATUS intrSaveIntrRegValue_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 *arg1, NvU32 *arg2); +NV_STATUS intrSaveIntrRegValue_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 *arg4, NvU32 *arg5); #ifdef __nvoc_intr_h_disabled -static inline NV_STATUS intrSaveIntrRegValue(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 *arg1, NvU32 *arg2) { +static inline NV_STATUS intrSaveIntrRegValue(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 *arg4, NvU32 *arg5) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_intr_h_disabled -#define intrSaveIntrRegValue(pGpu, pIntr, arg0, arg1, arg2) intrSaveIntrRegValue_46f6a7(pGpu, pIntr, arg0, arg1, arg2) +#define intrSaveIntrRegValue(pGpu, pIntr, arg3, arg4, arg5) intrSaveIntrRegValue_46f6a7(pGpu, pIntr, arg3, arg4, arg5) #endif //__nvoc_intr_h_disabled -#define intrSaveIntrRegValue_HAL(pGpu, pIntr, arg0, arg1, arg2) intrSaveIntrRegValue(pGpu, pIntr, arg0, arg1, arg2) +#define intrSaveIntrRegValue_HAL(pGpu, pIntr, arg3, arg4, arg5) intrSaveIntrRegValue(pGpu, pIntr, arg3, arg4, arg5) -static inline NV_STATUS intrRestoreIntrRegValue_46f6a7(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, NvU32 *arg2) { +static inline NV_STATUS intrRestoreIntrRegValue_46f6a7(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, NvU32 *arg5) { return NV_ERR_NOT_SUPPORTED; } -NV_STATUS intrRestoreIntrRegValue_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, NvU32 *arg2); +NV_STATUS intrRestoreIntrRegValue_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, NvU32 *arg5); #ifdef __nvoc_intr_h_disabled -static inline NV_STATUS intrRestoreIntrRegValue(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, NvU32 *arg2) { +static inline NV_STATUS intrRestoreIntrRegValue(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, NvU32 *arg5) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_intr_h_disabled -#define intrRestoreIntrRegValue(pGpu, pIntr, arg0, arg1, arg2) intrRestoreIntrRegValue_46f6a7(pGpu, pIntr, arg0, arg1, arg2) +#define intrRestoreIntrRegValue(pGpu, pIntr, arg3, arg4, arg5) intrRestoreIntrRegValue_46f6a7(pGpu, pIntr, arg3, arg4, arg5) #endif //__nvoc_intr_h_disabled -#define intrRestoreIntrRegValue_HAL(pGpu, pIntr, arg0, arg1, arg2) intrRestoreIntrRegValue(pGpu, pIntr, arg0, arg1, arg2) +#define intrRestoreIntrRegValue_HAL(pGpu, pIntr, arg3, arg4, arg5) intrRestoreIntrRegValue(pGpu, pIntr, arg3, arg4, arg5) static inline NV_STATUS intrTriggerCpuDoorbellForVF_46f6a7(OBJGPU *pGpu, struct Intr *pIntr, NvU32 gfid) { return NV_ERR_NOT_SUPPORTED; @@ -859,19 +1042,19 @@ static inline void intrRetriggerTopLevel(OBJGPU *pGpu, struct Intr *pIntr) { #define intrRetriggerTopLevel_HAL(pGpu, pIntr) intrRetriggerTopLevel(pGpu, pIntr) -NV_STATUS intrGetLeafStatus_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg0, struct THREAD_STATE_NODE *arg1); +NV_STATUS intrGetLeafStatus_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg3, struct THREAD_STATE_NODE *arg4); #ifdef __nvoc_intr_h_disabled -static inline NV_STATUS intrGetLeafStatus(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg0, struct THREAD_STATE_NODE *arg1) { +static inline NV_STATUS intrGetLeafStatus(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg3, struct THREAD_STATE_NODE *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_intr_h_disabled -#define intrGetLeafStatus(pGpu, pIntr, arg0, arg1) intrGetLeafStatus_TU102(pGpu, pIntr, arg0, arg1) +#define intrGetLeafStatus(pGpu, pIntr, arg3, arg4) intrGetLeafStatus_TU102(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -#define intrGetLeafStatus_HAL(pGpu, pIntr, arg0, arg1) intrGetLeafStatus(pGpu, pIntr, arg0, arg1) +#define intrGetLeafStatus_HAL(pGpu, pIntr, arg3, arg4) intrGetLeafStatus(pGpu, pIntr, arg3, arg4) NV_STATUS intrGetPendingDisplayIntr_TU102(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *pEngines, struct THREAD_STATE_NODE *pThreadState); @@ -914,131 +1097,132 @@ static inline NV_STATUS intrCacheIntrFields(OBJGPU *pGpu, struct Intr *pIntr) { #define intrCacheIntrFields_HAL(pGpu, pIntr) intrCacheIntrFields(pGpu, pIntr) -NvU32 intrReadRegLeafEnSet_CPU_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, struct THREAD_STATE_NODE *arg1); +NvU32 intrReadRegLeafEnSet_CPU_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, struct THREAD_STATE_NODE *arg4); -NvU32 intrReadRegLeafEnSet_GSP_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, struct THREAD_STATE_NODE *arg1); +NvU32 intrReadRegLeafEnSet_GSP_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, struct THREAD_STATE_NODE *arg4); #ifdef __nvoc_intr_h_disabled -static inline NvU32 intrReadRegLeafEnSet(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, struct THREAD_STATE_NODE *arg1) { +static inline NvU32 intrReadRegLeafEnSet(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, struct THREAD_STATE_NODE *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return 0; } #else //__nvoc_intr_h_disabled -#define intrReadRegLeafEnSet(pGpu, pIntr, arg0, arg1) intrReadRegLeafEnSet_CPU_TU102(pGpu, pIntr, arg0, arg1) +#define intrReadRegLeafEnSet(pGpu, pIntr, arg3, arg4) intrReadRegLeafEnSet_CPU_TU102(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -#define intrReadRegLeafEnSet_HAL(pGpu, pIntr, arg0, arg1) intrReadRegLeafEnSet(pGpu, pIntr, arg0, arg1) +#define intrReadRegLeafEnSet_HAL(pGpu, pIntr, arg3, arg4) intrReadRegLeafEnSet(pGpu, pIntr, arg3, arg4) -NvU32 intrReadRegLeaf_CPU_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, struct THREAD_STATE_NODE *arg1); +NvU32 intrReadRegLeaf_CPU_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, struct THREAD_STATE_NODE *arg4); -NvU32 intrReadRegLeaf_GSP_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, struct THREAD_STATE_NODE *arg1); +NvU32 intrReadRegLeaf_GSP_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, struct THREAD_STATE_NODE *arg4); #ifdef __nvoc_intr_h_disabled -static inline NvU32 intrReadRegLeaf(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, struct THREAD_STATE_NODE *arg1) { +static inline NvU32 intrReadRegLeaf(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, struct THREAD_STATE_NODE *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return 0; } #else //__nvoc_intr_h_disabled -#define intrReadRegLeaf(pGpu, pIntr, arg0, arg1) intrReadRegLeaf_CPU_TU102(pGpu, pIntr, arg0, arg1) +#define intrReadRegLeaf(pGpu, pIntr, arg3, arg4) intrReadRegLeaf_CPU_TU102(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -#define intrReadRegLeaf_HAL(pGpu, pIntr, arg0, arg1) intrReadRegLeaf(pGpu, pIntr, arg0, arg1) +#define intrReadRegLeaf_HAL(pGpu, pIntr, arg3, arg4) intrReadRegLeaf(pGpu, pIntr, arg3, arg4) -NvU32 intrReadRegTop_CPU_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, struct THREAD_STATE_NODE *arg1); +NvU32 intrReadRegTop_CPU_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, struct THREAD_STATE_NODE *arg4); -NvU32 intrReadRegTop_GSP_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, struct THREAD_STATE_NODE *arg1); +NvU32 intrReadRegTop_GSP_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, struct THREAD_STATE_NODE *arg4); #ifdef __nvoc_intr_h_disabled -static inline NvU32 intrReadRegTop(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, struct THREAD_STATE_NODE *arg1) { +static inline NvU32 intrReadRegTop(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, struct THREAD_STATE_NODE *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return 0; } #else //__nvoc_intr_h_disabled -#define intrReadRegTop(pGpu, pIntr, arg0, arg1) intrReadRegTop_CPU_TU102(pGpu, pIntr, arg0, arg1) +#define intrReadRegTop(pGpu, pIntr, arg3, arg4) intrReadRegTop_CPU_TU102(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -#define intrReadRegTop_HAL(pGpu, pIntr, arg0, arg1) intrReadRegTop(pGpu, pIntr, arg0, arg1) +#define intrReadRegTop_HAL(pGpu, pIntr, arg3, arg4) intrReadRegTop(pGpu, pIntr, arg3, arg4) -void intrWriteRegLeafEnSet_CPU_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2); +void intrWriteRegLeafEnSet_CPU_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5); -void intrWriteRegLeafEnSet_GSP_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2); +void intrWriteRegLeafEnSet_GSP_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5); #ifdef __nvoc_intr_h_disabled -static inline void intrWriteRegLeafEnSet(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2) { +static inline void intrWriteRegLeafEnSet(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); } #else //__nvoc_intr_h_disabled -#define intrWriteRegLeafEnSet(pGpu, pIntr, arg0, arg1, arg2) intrWriteRegLeafEnSet_CPU_TU102(pGpu, pIntr, arg0, arg1, arg2) +#define intrWriteRegLeafEnSet(pGpu, pIntr, arg3, arg4, arg5) intrWriteRegLeafEnSet_CPU_TU102(pGpu, pIntr, arg3, arg4, arg5) #endif //__nvoc_intr_h_disabled -#define intrWriteRegLeafEnSet_HAL(pGpu, pIntr, arg0, arg1, arg2) intrWriteRegLeafEnSet(pGpu, pIntr, arg0, arg1, arg2) +#define intrWriteRegLeafEnSet_HAL(pGpu, pIntr, arg3, arg4, arg5) intrWriteRegLeafEnSet(pGpu, pIntr, arg3, arg4, arg5) -void intrWriteRegLeafEnClear_CPU_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2); +void intrWriteRegLeafEnClear_CPU_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5); -void intrWriteRegLeafEnClear_GSP_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2); +void intrWriteRegLeafEnClear_GSP_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5); #ifdef __nvoc_intr_h_disabled -static inline void intrWriteRegLeafEnClear(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2) { +static inline void intrWriteRegLeafEnClear(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); } #else //__nvoc_intr_h_disabled -#define intrWriteRegLeafEnClear(pGpu, pIntr, arg0, arg1, arg2) intrWriteRegLeafEnClear_CPU_TU102(pGpu, pIntr, arg0, arg1, arg2) +#define intrWriteRegLeafEnClear(pGpu, pIntr, arg3, arg4, arg5) intrWriteRegLeafEnClear_CPU_TU102(pGpu, pIntr, arg3, arg4, arg5) #endif //__nvoc_intr_h_disabled -#define intrWriteRegLeafEnClear_HAL(pGpu, pIntr, arg0, arg1, arg2) intrWriteRegLeafEnClear(pGpu, pIntr, arg0, arg1, arg2) +#define intrWriteRegLeafEnClear_HAL(pGpu, pIntr, arg3, arg4, arg5) intrWriteRegLeafEnClear(pGpu, pIntr, arg3, arg4, arg5) -void intrWriteRegLeaf_CPU_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2); +void intrWriteRegLeaf_CPU_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5); -void intrWriteRegLeaf_GSP_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2); +void intrWriteRegLeaf_GSP_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5); #ifdef __nvoc_intr_h_disabled -static inline void intrWriteRegLeaf(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2) { +static inline void intrWriteRegLeaf(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); } #else //__nvoc_intr_h_disabled -#define intrWriteRegLeaf(pGpu, pIntr, arg0, arg1, arg2) intrWriteRegLeaf_CPU_TU102(pGpu, pIntr, arg0, arg1, arg2) +#define intrWriteRegLeaf(pGpu, pIntr, arg3, arg4, arg5) intrWriteRegLeaf_CPU_TU102(pGpu, pIntr, arg3, arg4, arg5) #endif //__nvoc_intr_h_disabled -#define intrWriteRegLeaf_HAL(pGpu, pIntr, arg0, arg1, arg2) intrWriteRegLeaf(pGpu, pIntr, arg0, arg1, arg2) +#define intrWriteRegLeaf_HAL(pGpu, pIntr, arg3, arg4, arg5) intrWriteRegLeaf(pGpu, pIntr, arg3, arg4, arg5) -static inline void intrRouteInterruptsToSystemFirmware_b3696a(OBJGPU *pGpu, struct Intr *pIntr, NvBool bEnable) { - return; +static inline NV_STATUS intrRouteInterruptsToSystemFirmware_56cd7a(OBJGPU *pGpu, struct Intr *pIntr, NvBool bEnable) { + return NV_OK; } -void intrRouteInterruptsToSystemFirmware_GH100(OBJGPU *pGpu, struct Intr *pIntr, NvBool bEnable); +NV_STATUS intrRouteInterruptsToSystemFirmware_GH100(OBJGPU *pGpu, struct Intr *pIntr, NvBool bEnable); #ifdef __nvoc_intr_h_disabled -static inline void intrRouteInterruptsToSystemFirmware(OBJGPU *pGpu, struct Intr *pIntr, NvBool bEnable) { +static inline NV_STATUS intrRouteInterruptsToSystemFirmware(OBJGPU *pGpu, struct Intr *pIntr, NvBool bEnable) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); + return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_intr_h_disabled -#define intrRouteInterruptsToSystemFirmware(pGpu, pIntr, bEnable) intrRouteInterruptsToSystemFirmware_b3696a(pGpu, pIntr, bEnable) +#define intrRouteInterruptsToSystemFirmware(pGpu, pIntr, bEnable) intrRouteInterruptsToSystemFirmware_56cd7a(pGpu, pIntr, bEnable) #endif //__nvoc_intr_h_disabled #define intrRouteInterruptsToSystemFirmware_HAL(pGpu, pIntr, bEnable) intrRouteInterruptsToSystemFirmware(pGpu, pIntr, bEnable) -static inline NV_STATUS intrInitDynamicInterruptTable_5baef9(OBJGPU *pGpu, struct Intr *pIntr, struct OBJFIFO *arg0, InterruptTable *arg1, NvU32 initFlags) { +static inline NV_STATUS intrInitDynamicInterruptTable_5baef9(OBJGPU *pGpu, struct Intr *pIntr, struct OBJFIFO *arg3, InterruptTable *arg4, NvU32 initFlags) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } #ifdef __nvoc_intr_h_disabled -static inline NV_STATUS intrInitDynamicInterruptTable(OBJGPU *pGpu, struct Intr *pIntr, struct OBJFIFO *arg0, InterruptTable *arg1, NvU32 initFlags) { +static inline NV_STATUS intrInitDynamicInterruptTable(OBJGPU *pGpu, struct Intr *pIntr, struct OBJFIFO *arg3, InterruptTable *arg4, NvU32 initFlags) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_intr_h_disabled -#define intrInitDynamicInterruptTable(pGpu, pIntr, arg0, arg1, initFlags) intrInitDynamicInterruptTable_5baef9(pGpu, pIntr, arg0, arg1, initFlags) +#define intrInitDynamicInterruptTable(pGpu, pIntr, arg3, arg4, initFlags) intrInitDynamicInterruptTable_5baef9(pGpu, pIntr, arg3, arg4, initFlags) #endif //__nvoc_intr_h_disabled -#define intrInitDynamicInterruptTable_HAL(pGpu, pIntr, arg0, arg1, initFlags) intrInitDynamicInterruptTable(pGpu, pIntr, arg0, arg1, initFlags) +#define intrInitDynamicInterruptTable_HAL(pGpu, pIntr, arg3, arg4, initFlags) intrInitDynamicInterruptTable(pGpu, pIntr, arg3, arg4, initFlags) static inline NV_STATUS intrInitAnyInterruptTable_5baef9(OBJGPU *pGpu, struct Intr *pIntr, InterruptTable *pIntrTable, NvU32 initFlags) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); @@ -1177,31 +1361,31 @@ static inline void intrServiceStall(OBJGPU *pGpu, struct Intr *pIntr) { #define intrServiceStall_HAL(pGpu, pIntr) intrServiceStall(pGpu, pIntr) -void intrServiceStallList_IMPL(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, NvBool arg1); +void intrServiceStallList_IMPL(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, NvBool arg4); #ifdef __nvoc_intr_h_disabled -static inline void intrServiceStallList(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, NvBool arg1) { +static inline void intrServiceStallList(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, NvBool arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); } #else //__nvoc_intr_h_disabled -#define intrServiceStallList(pGpu, pIntr, arg0, arg1) intrServiceStallList_IMPL(pGpu, pIntr, arg0, arg1) +#define intrServiceStallList(pGpu, pIntr, arg3, arg4) intrServiceStallList_IMPL(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -#define intrServiceStallList_HAL(pGpu, pIntr, arg0, arg1) intrServiceStallList(pGpu, pIntr, arg0, arg1) +#define intrServiceStallList_HAL(pGpu, pIntr, arg3, arg4) intrServiceStallList(pGpu, pIntr, arg3, arg4) -void intrServiceStallSingle_IMPL(OBJGPU *pGpu, struct Intr *pIntr, NvU16 arg0, NvBool arg1); +void intrServiceStallSingle_IMPL(OBJGPU *pGpu, struct Intr *pIntr, NvU16 arg3, NvBool arg4); #ifdef __nvoc_intr_h_disabled -static inline void intrServiceStallSingle(OBJGPU *pGpu, struct Intr *pIntr, NvU16 arg0, NvBool arg1) { +static inline void intrServiceStallSingle(OBJGPU *pGpu, struct Intr *pIntr, NvU16 arg3, NvBool arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); } #else //__nvoc_intr_h_disabled -#define intrServiceStallSingle(pGpu, pIntr, arg0, arg1) intrServiceStallSingle_IMPL(pGpu, pIntr, arg0, arg1) +#define intrServiceStallSingle(pGpu, pIntr, arg3, arg4) intrServiceStallSingle_IMPL(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -#define intrServiceStallSingle_HAL(pGpu, pIntr, arg0, arg1) intrServiceStallSingle(pGpu, pIntr, arg0, arg1) +#define intrServiceStallSingle_HAL(pGpu, pIntr, arg3, arg4) intrServiceStallSingle(pGpu, pIntr, arg3, arg4) void intrProcessDPCQueue_IMPL(OBJGPU *pGpu, struct Intr *pIntr); @@ -1216,63 +1400,63 @@ static inline void intrProcessDPCQueue(OBJGPU *pGpu, struct Intr *pIntr) { #define intrProcessDPCQueue_HAL(pGpu, pIntr) intrProcessDPCQueue(pGpu, pIntr) -NV_STATUS intrGetIntrMask_GP100(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1); +NV_STATUS intrGetIntrMask_GP100(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4); #ifdef __nvoc_intr_h_disabled -static inline NV_STATUS intrGetIntrMask(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1) { +static inline NV_STATUS intrGetIntrMask(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_intr_h_disabled -#define intrGetIntrMask(pGpu, pIntr, arg0, arg1) intrGetIntrMask_GP100(pGpu, pIntr, arg0, arg1) +#define intrGetIntrMask(pGpu, pIntr, arg3, arg4) intrGetIntrMask_GP100(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -#define intrGetIntrMask_HAL(pGpu, pIntr, arg0, arg1) intrGetIntrMask(pGpu, pIntr, arg0, arg1) +#define intrGetIntrMask_HAL(pGpu, pIntr, arg3, arg4) intrGetIntrMask(pGpu, pIntr, arg3, arg4) -static inline NV_STATUS intrGetEccIntrMaskOffset_5baef9(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg0, NvU32 *arg1) { +static inline NV_STATUS intrGetEccIntrMaskOffset_5baef9(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg3, NvU32 *arg4) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -NV_STATUS intrGetEccIntrMaskOffset_GP100(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg0, NvU32 *arg1); +NV_STATUS intrGetEccIntrMaskOffset_GP100(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg3, NvU32 *arg4); -static inline NV_STATUS intrGetEccIntrMaskOffset_46f6a7(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg0, NvU32 *arg1) { +static inline NV_STATUS intrGetEccIntrMaskOffset_46f6a7(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg3, NvU32 *arg4) { return NV_ERR_NOT_SUPPORTED; } #ifdef __nvoc_intr_h_disabled -static inline NV_STATUS intrGetEccIntrMaskOffset(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg0, NvU32 *arg1) { +static inline NV_STATUS intrGetEccIntrMaskOffset(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg3, NvU32 *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_intr_h_disabled -#define intrGetEccIntrMaskOffset(pGpu, pIntr, arg0, arg1) intrGetEccIntrMaskOffset_5baef9(pGpu, pIntr, arg0, arg1) +#define intrGetEccIntrMaskOffset(pGpu, pIntr, arg3, arg4) intrGetEccIntrMaskOffset_5baef9(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -#define intrGetEccIntrMaskOffset_HAL(pGpu, pIntr, arg0, arg1) intrGetEccIntrMaskOffset(pGpu, pIntr, arg0, arg1) +#define intrGetEccIntrMaskOffset_HAL(pGpu, pIntr, arg3, arg4) intrGetEccIntrMaskOffset(pGpu, pIntr, arg3, arg4) -static inline NV_STATUS intrGetNvlinkIntrMaskOffset_5baef9(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg0, NvU32 *arg1) { +static inline NV_STATUS intrGetNvlinkIntrMaskOffset_5baef9(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg3, NvU32 *arg4) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -NV_STATUS intrGetNvlinkIntrMaskOffset_GP100(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg0, NvU32 *arg1); +NV_STATUS intrGetNvlinkIntrMaskOffset_GP100(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg3, NvU32 *arg4); -static inline NV_STATUS intrGetNvlinkIntrMaskOffset_46f6a7(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg0, NvU32 *arg1) { +static inline NV_STATUS intrGetNvlinkIntrMaskOffset_46f6a7(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg3, NvU32 *arg4) { return NV_ERR_NOT_SUPPORTED; } #ifdef __nvoc_intr_h_disabled -static inline NV_STATUS intrGetNvlinkIntrMaskOffset(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg0, NvU32 *arg1) { +static inline NV_STATUS intrGetNvlinkIntrMaskOffset(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg3, NvU32 *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_intr_h_disabled -#define intrGetNvlinkIntrMaskOffset(pGpu, pIntr, arg0, arg1) intrGetNvlinkIntrMaskOffset_5baef9(pGpu, pIntr, arg0, arg1) +#define intrGetNvlinkIntrMaskOffset(pGpu, pIntr, arg3, arg4) intrGetNvlinkIntrMaskOffset_5baef9(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -#define intrGetNvlinkIntrMaskOffset_HAL(pGpu, pIntr, arg0, arg1) intrGetNvlinkIntrMaskOffset(pGpu, pIntr, arg0, arg1) +#define intrGetNvlinkIntrMaskOffset_HAL(pGpu, pIntr, arg3, arg4) intrGetNvlinkIntrMaskOffset(pGpu, pIntr, arg3, arg4) static inline NvBool intrRequiresPossibleErrorNotifier_491d52(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *pEngines) { return ((NvBool)(0 != 0)); @@ -1314,137 +1498,121 @@ static inline NvU32 intrReadErrCont(OBJGPU *pGpu, struct Intr *pIntr) { #define intrReadErrCont_HAL(pGpu, pIntr) intrReadErrCont(pGpu, pIntr) -NV_STATUS intrGetPendingStall_GP100(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1); +NV_STATUS intrGetPendingStall_GP100(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4); #ifdef __nvoc_intr_h_disabled -static inline NV_STATUS intrGetPendingStall(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1) { +static inline NV_STATUS intrGetPendingStall(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_intr_h_disabled -#define intrGetPendingStall(pGpu, pIntr, arg0, arg1) intrGetPendingStall_GP100(pGpu, pIntr, arg0, arg1) +#define intrGetPendingStall(pGpu, pIntr, arg3, arg4) intrGetPendingStall_GP100(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -#define intrGetPendingStall_HAL(pGpu, pIntr, arg0, arg1) intrGetPendingStall(pGpu, pIntr, arg0, arg1) +#define intrGetPendingStall_HAL(pGpu, pIntr, arg3, arg4) intrGetPendingStall(pGpu, pIntr, arg3, arg4) -NV_STATUS intrGetPendingStallEngines_TU102(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1); +NV_STATUS intrGetPendingStallEngines_TU102(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4); #ifdef __nvoc_intr_h_disabled -static inline NV_STATUS intrGetPendingStallEngines(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1) { +static inline NV_STATUS intrGetPendingStallEngines(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_intr_h_disabled -#define intrGetPendingStallEngines(pGpu, pIntr, arg0, arg1) intrGetPendingStallEngines_TU102(pGpu, pIntr, arg0, arg1) +#define intrGetPendingStallEngines(pGpu, pIntr, arg3, arg4) intrGetPendingStallEngines_TU102(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -#define intrGetPendingStallEngines_HAL(pGpu, pIntr, arg0, arg1) intrGetPendingStallEngines(pGpu, pIntr, arg0, arg1) +#define intrGetPendingStallEngines_HAL(pGpu, pIntr, arg3, arg4) intrGetPendingStallEngines(pGpu, pIntr, arg3, arg4) -NvBool intrIsIntrEnabled_IMPL(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg0); +NvBool intrIsIntrEnabled_IMPL(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg3); #ifdef __nvoc_intr_h_disabled -static inline NvBool intrIsIntrEnabled(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg0) { +static inline NvBool intrIsIntrEnabled(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg3) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return NV_FALSE; } #else //__nvoc_intr_h_disabled -#define intrIsIntrEnabled(pGpu, pIntr, arg0) intrIsIntrEnabled_IMPL(pGpu, pIntr, arg0) +#define intrIsIntrEnabled(pGpu, pIntr, arg3) intrIsIntrEnabled_IMPL(pGpu, pIntr, arg3) #endif //__nvoc_intr_h_disabled -#define intrIsIntrEnabled_HAL(pGpu, pIntr, arg0) intrIsIntrEnabled(pGpu, pIntr, arg0) +#define intrIsIntrEnabled_HAL(pGpu, pIntr, arg3) intrIsIntrEnabled(pGpu, pIntr, arg3) -static inline void intrSetHubLeafIntr_b3696a(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 *arg1, NvU32 *arg2, struct THREAD_STATE_NODE *arg3) { +static inline void intrSetHubLeafIntr_b3696a(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 *arg4, NvU32 *arg5, struct THREAD_STATE_NODE *arg6) { return; } #ifdef __nvoc_intr_h_disabled -static inline void intrSetHubLeafIntr(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 *arg1, NvU32 *arg2, struct THREAD_STATE_NODE *arg3) { +static inline void intrSetHubLeafIntr(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 *arg4, NvU32 *arg5, struct THREAD_STATE_NODE *arg6) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); } #else //__nvoc_intr_h_disabled -#define intrSetHubLeafIntr(pGpu, pIntr, arg0, arg1, arg2, arg3) intrSetHubLeafIntr_b3696a(pGpu, pIntr, arg0, arg1, arg2, arg3) +#define intrSetHubLeafIntr(pGpu, pIntr, arg3, arg4, arg5, arg6) intrSetHubLeafIntr_b3696a(pGpu, pIntr, arg3, arg4, arg5, arg6) #endif //__nvoc_intr_h_disabled -#define intrSetHubLeafIntr_HAL(pGpu, pIntr, arg0, arg1, arg2, arg3) intrSetHubLeafIntr(pGpu, pIntr, arg0, arg1, arg2, arg3) +#define intrSetHubLeafIntr_HAL(pGpu, pIntr, arg3, arg4, arg5, arg6) intrSetHubLeafIntr(pGpu, pIntr, arg3, arg4, arg5, arg6) -void intrGetHubLeafIntrPending_STUB(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1); +void intrGetHubLeafIntrPending_STUB(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4); #ifdef __nvoc_intr_h_disabled -static inline void intrGetHubLeafIntrPending(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1) { +static inline void intrGetHubLeafIntrPending(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); } #else //__nvoc_intr_h_disabled -#define intrGetHubLeafIntrPending(pGpu, pIntr, arg0, arg1) intrGetHubLeafIntrPending_STUB(pGpu, pIntr, arg0, arg1) +#define intrGetHubLeafIntrPending(pGpu, pIntr, arg3, arg4) intrGetHubLeafIntrPending_STUB(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -#define intrGetHubLeafIntrPending_HAL(pGpu, pIntr, arg0, arg1) intrGetHubLeafIntrPending(pGpu, pIntr, arg0, arg1) +#define intrGetHubLeafIntrPending_HAL(pGpu, pIntr, arg3, arg4) intrGetHubLeafIntrPending(pGpu, pIntr, arg3, arg4) + +NV_STATUS intrRefetchInterruptTable_IMPL(OBJGPU *pGpu, struct Intr *pIntr); -NV_STATUS intrConstructEngine_IMPL(OBJGPU *pGpu, struct Intr *pIntr, ENGDESCRIPTOR arg0); -static inline NV_STATUS intrConstructEngine_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, ENGDESCRIPTOR arg0) { - return pIntr->__intrConstructEngine__(pGpu, pIntr, arg0); +#ifdef __nvoc_intr_h_disabled +static inline NV_STATUS intrRefetchInterruptTable(OBJGPU *pGpu, struct Intr *pIntr) { + NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_intr_h_disabled +#define intrRefetchInterruptTable(pGpu, pIntr) intrRefetchInterruptTable_IMPL(pGpu, pIntr) +#endif //__nvoc_intr_h_disabled -NV_STATUS intrStateInitUnlocked_IMPL(OBJGPU *pGpu, struct Intr *pIntr); +#define intrRefetchInterruptTable_HAL(pGpu, pIntr) intrRefetchInterruptTable(pGpu, pIntr) -static inline NV_STATUS intrStateInitUnlocked_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { - return pIntr->__intrStateInitUnlocked__(pGpu, pIntr); -} +NV_STATUS intrConstructEngine_IMPL(OBJGPU *pGpu, struct Intr *pIntr, ENGDESCRIPTOR arg3); -NV_STATUS intrStateInitLocked_IMPL(OBJGPU *pGpu, struct Intr *pIntr); +NV_STATUS intrStatePreInitLocked_IMPL(OBJGPU *pGpu, struct Intr *pIntr); -static inline NV_STATUS intrStateInitLocked_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { - return pIntr->__intrStateInitLocked__(pGpu, pIntr); -} +NV_STATUS intrStateInitUnlocked_IMPL(OBJGPU *pGpu, struct Intr *pIntr); -void intrStateDestroy_IMPL(OBJGPU *pGpu, struct Intr *pIntr); +NV_STATUS intrStateInitLocked_IMPL(OBJGPU *pGpu, struct Intr *pIntr); -static inline void intrStateDestroy_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { - pIntr->__intrStateDestroy__(pGpu, pIntr); -} +void intrStateDestroy_IMPL(OBJGPU *pGpu, struct Intr *pIntr); -NvU32 intrDecodeStallIntrEn_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0); +NvU32 intrDecodeStallIntrEn_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3); -static inline NvU32 intrDecodeStallIntrEn_4a4dee(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0) { +static inline NvU32 intrDecodeStallIntrEn_4a4dee(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3) { return 0; } -static inline NvU32 intrDecodeStallIntrEn_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0) { - return pIntr->__intrDecodeStallIntrEn__(pGpu, pIntr, arg0); -} - static inline void intrServiceVirtual_f2d351(OBJGPU *pGpu, struct Intr *pIntr) { NV_ASSERT_PRECOMP(0); } void intrServiceVirtual_TU102(OBJGPU *pGpu, struct Intr *pIntr); -static inline void intrServiceVirtual_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { - pIntr->__intrServiceVirtual__(pGpu, pIntr); -} - static inline NV_STATUS intrTriggerPrivDoorbell_5baef9(OBJGPU *pGpu, struct Intr *pIntr, NvU32 gfid) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } NV_STATUS intrTriggerPrivDoorbell_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 gfid); -static inline NV_STATUS intrTriggerPrivDoorbell_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 gfid) { - return pIntr->__intrTriggerPrivDoorbell__(pGpu, pIntr, gfid); -} - -NvU64 intrGetUvmSharedLeafEnDisableMask_TU102(OBJGPU *pGpu, struct Intr *pIntr); +void intrGetLocklessVectorsInRmSubtree_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 (*pInterruptVectors)[2]); -NvU64 intrGetUvmSharedLeafEnDisableMask_GA100(OBJGPU *pGpu, struct Intr *pIntr); - -static inline NvU64 intrGetUvmSharedLeafEnDisableMask_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { - return pIntr->__intrGetUvmSharedLeafEnDisableMask__(pGpu, pIntr); -} +void intrGetLocklessVectorsInRmSubtree_GA100(OBJGPU *pGpu, struct Intr *pIntr, NvU32 (*pInterruptVectors)[2]); void intrSetDisplayInterruptEnable_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvBool bEnable, struct THREAD_STATE_NODE *pThreadState); @@ -1452,70 +1620,42 @@ static inline void intrSetDisplayInterruptEnable_b3696a(OBJGPU *pGpu, struct Int return; } -static inline void intrSetDisplayInterruptEnable_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvBool bEnable, struct THREAD_STATE_NODE *pThreadState) { - pIntr->__intrSetDisplayInterruptEnable__(pGpu, pIntr, bEnable, pThreadState); -} - -NvU32 intrReadRegTopEnSet_CPU_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, struct THREAD_STATE_NODE *arg1); - -NvU32 intrReadRegTopEnSet_CPU_GA102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, struct THREAD_STATE_NODE *arg1); +NvU32 intrReadRegTopEnSet_CPU_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, struct THREAD_STATE_NODE *arg4); -NvU32 intrReadRegTopEnSet_GSP_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, struct THREAD_STATE_NODE *arg1); +NvU32 intrReadRegTopEnSet_CPU_GA102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, struct THREAD_STATE_NODE *arg4); -NvU32 intrReadRegTopEnSet_GSP_GA102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, struct THREAD_STATE_NODE *arg1); +NvU32 intrReadRegTopEnSet_GSP_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, struct THREAD_STATE_NODE *arg4); -static inline NvU32 intrReadRegTopEnSet_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, struct THREAD_STATE_NODE *arg1) { - return pIntr->__intrReadRegTopEnSet__(pGpu, pIntr, arg0, arg1); -} +NvU32 intrReadRegTopEnSet_GSP_GA102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, struct THREAD_STATE_NODE *arg4); -void intrWriteRegTopEnSet_CPU_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2); +void intrWriteRegTopEnSet_CPU_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5); -void intrWriteRegTopEnSet_CPU_GA102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2); +void intrWriteRegTopEnSet_CPU_GA102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5); -void intrWriteRegTopEnSet_GSP_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2); +void intrWriteRegTopEnSet_GSP_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5); -void intrWriteRegTopEnSet_GSP_GA102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2); +void intrWriteRegTopEnSet_GSP_GA102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5); -static inline void intrWriteRegTopEnSet_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2) { - pIntr->__intrWriteRegTopEnSet__(pGpu, pIntr, arg0, arg1, arg2); -} +void intrWriteRegTopEnClear_CPU_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5); -void intrWriteRegTopEnClear_CPU_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2); +void intrWriteRegTopEnClear_CPU_GA102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5); -void intrWriteRegTopEnClear_CPU_GA102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2); +void intrWriteRegTopEnClear_GSP_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5); -void intrWriteRegTopEnClear_GSP_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2); - -void intrWriteRegTopEnClear_GSP_GA102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2); - -static inline void intrWriteRegTopEnClear_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2) { - pIntr->__intrWriteRegTopEnClear__(pGpu, pIntr, arg0, arg1, arg2); -} +void intrWriteRegTopEnClear_GSP_GA102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5); NvU32 intrGetNumLeaves_TU102(OBJGPU *pGpu, struct Intr *pIntr); NvU32 intrGetNumLeaves_GH100(OBJGPU *pGpu, struct Intr *pIntr); -static inline NvU32 intrGetNumLeaves_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { - return pIntr->__intrGetNumLeaves__(pGpu, pIntr); -} - NvU32 intrGetLeafSize_TU102(OBJGPU *pGpu, struct Intr *pIntr); NvU32 intrGetLeafSize_GH100(OBJGPU *pGpu, struct Intr *pIntr); -static inline NvU32 intrGetLeafSize_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { - return pIntr->__intrGetLeafSize__(pGpu, pIntr); -} - NvU64 intrGetIntrTopNonStallMask_TU102(OBJGPU *pGpu, struct Intr *pIntr); NvU64 intrGetIntrTopNonStallMask_GH100(OBJGPU *pGpu, struct Intr *pIntr); -static inline NvU64 intrGetIntrTopNonStallMask_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { - return pIntr->__intrGetIntrTopNonStallMask__(pGpu, pIntr); -} - void intrSanityCheckEngineIntrStallVector_GA100(OBJGPU *pGpu, struct Intr *pIntr, NvU32 vector, NvU16 mcEngine); void intrSanityCheckEngineIntrStallVector_GH100(OBJGPU *pGpu, struct Intr *pIntr, NvU32 vector, NvU16 mcEngine); @@ -1524,10 +1664,6 @@ static inline void intrSanityCheckEngineIntrStallVector_b3696a(OBJGPU *pGpu, str return; } -static inline void intrSanityCheckEngineIntrStallVector_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 vector, NvU16 mcEngine) { - pIntr->__intrSanityCheckEngineIntrStallVector__(pGpu, pIntr, vector, mcEngine); -} - void intrSanityCheckEngineIntrNotificationVector_GA100(OBJGPU *pGpu, struct Intr *pIntr, NvU32 vector, NvU16 mcEngine); void intrSanityCheckEngineIntrNotificationVector_GH100(OBJGPU *pGpu, struct Intr *pIntr, NvU32 vector, NvU16 mcEngine); @@ -1536,21 +1672,9 @@ static inline void intrSanityCheckEngineIntrNotificationVector_b3696a(OBJGPU *pG return; } -static inline void intrSanityCheckEngineIntrNotificationVector_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 vector, NvU16 mcEngine) { - pIntr->__intrSanityCheckEngineIntrNotificationVector__(pGpu, pIntr, vector, mcEngine); -} - -NV_STATUS intrStateLoad_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0); +NV_STATUS intrStateLoad_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3); -static inline NV_STATUS intrStateLoad_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0) { - return pIntr->__intrStateLoad__(pGpu, pIntr, arg0); -} - -NV_STATUS intrStateUnload_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0); - -static inline NV_STATUS intrStateUnload_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0) { - return pIntr->__intrStateUnload__(pGpu, pIntr, arg0); -} +NV_STATUS intrStateUnload_TU102(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3); static inline NV_STATUS intrInitSubtreeMap_395e98(OBJGPU *pGpu, struct Intr *pIntr) { return NV_ERR_NOT_SUPPORTED; @@ -1560,103 +1684,62 @@ NV_STATUS intrInitSubtreeMap_TU102(OBJGPU *pGpu, struct Intr *pIntr); NV_STATUS intrInitSubtreeMap_GH100(OBJGPU *pGpu, struct Intr *pIntr); -static inline NV_STATUS intrInitSubtreeMap_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { - return pIntr->__intrInitSubtreeMap__(pGpu, pIntr); -} - -NV_STATUS intrInitInterruptTable_VIRTUAL(OBJGPU *pGpu, struct Intr *pIntr); +NV_STATUS intrInitInterruptTable_VF(OBJGPU *pGpu, struct Intr *pIntr); NV_STATUS intrInitInterruptTable_KERNEL(OBJGPU *pGpu, struct Intr *pIntr); -static inline NV_STATUS intrInitInterruptTable_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { - return pIntr->__intrInitInterruptTable__(pGpu, pIntr); -} +NV_STATUS intrSetIntrMask_GP100(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4); -NV_STATUS intrSetIntrMask_GP100(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1); - -static inline NV_STATUS intrSetIntrMask_46f6a7(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1) { +static inline NV_STATUS intrSetIntrMask_46f6a7(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS intrSetIntrMask_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1) { - return pIntr->__intrSetIntrMask__(pGpu, pIntr, arg0, arg1); -} - -void intrSetIntrEnInHw_GP100(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, struct THREAD_STATE_NODE *arg1); +void intrSetIntrEnInHw_GP100(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, struct THREAD_STATE_NODE *arg4); -static inline void intrSetIntrEnInHw_d44104(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, struct THREAD_STATE_NODE *arg1) { +static inline void intrSetIntrEnInHw_d44104(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, struct THREAD_STATE_NODE *arg4) { return; } -static inline void intrSetIntrEnInHw_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, struct THREAD_STATE_NODE *arg1) { - pIntr->__intrSetIntrEnInHw__(pGpu, pIntr, arg0, arg1); -} - -NvU32 intrGetIntrEnFromHw_GP100(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg0); +NvU32 intrGetIntrEnFromHw_GP100(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg3); -static inline NvU32 intrGetIntrEnFromHw_b2b553(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg0) { +static inline NvU32 intrGetIntrEnFromHw_b2b553(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg3) { return 0; } -static inline NvU32 intrGetIntrEnFromHw_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, struct THREAD_STATE_NODE *arg0) { - return pIntr->__intrGetIntrEnFromHw__(pGpu, pIntr, arg0); -} - -static inline NV_STATUS intrStatePreLoad_DISPATCH(POBJGPU pGpu, struct Intr *pEngstate, NvU32 arg0) { - return pEngstate->__intrStatePreLoad__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS intrStatePostUnload_DISPATCH(POBJGPU pGpu, struct Intr *pEngstate, NvU32 arg0) { - return pEngstate->__intrStatePostUnload__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS intrStatePreUnload_DISPATCH(POBJGPU pGpu, struct Intr *pEngstate, NvU32 arg0) { - return pEngstate->__intrStatePreUnload__(pGpu, pEngstate, arg0); -} - -static inline void intrInitMissing_DISPATCH(POBJGPU pGpu, struct Intr *pEngstate) { - pEngstate->__intrInitMissing__(pGpu, pEngstate); -} - -static inline NV_STATUS intrStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct Intr *pEngstate) { - return pEngstate->__intrStatePreInitLocked__(pGpu, pEngstate); -} - -static inline NV_STATUS intrStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct Intr *pEngstate) { - return pEngstate->__intrStatePreInitUnlocked__(pGpu, pEngstate); -} - -static inline NV_STATUS intrStatePostLoad_DISPATCH(POBJGPU pGpu, struct Intr *pEngstate, NvU32 arg0) { - return pEngstate->__intrStatePostLoad__(pGpu, pEngstate, arg0); -} - -static inline NvBool intrIsPresent_DISPATCH(POBJGPU pGpu, struct Intr *pEngstate) { - return pEngstate->__intrIsPresent__(pGpu, pEngstate); -} - void intrDestruct_IMPL(struct Intr *pIntr); #define __nvoc_intrDestruct(pIntr) intrDestruct_IMPL(pIntr) -NV_STATUS intrServiceNonStallBottomHalf_IMPL(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1); +NV_STATUS intrServiceNonStallBottomHalf_IMPL(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4); #ifdef __nvoc_intr_h_disabled -static inline NV_STATUS intrServiceNonStallBottomHalf(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1) { +static inline NV_STATUS intrServiceNonStallBottomHalf(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_intr_h_disabled -#define intrServiceNonStallBottomHalf(pGpu, pIntr, arg0, arg1) intrServiceNonStallBottomHalf_IMPL(pGpu, pIntr, arg0, arg1) +#define intrServiceNonStallBottomHalf(pGpu, pIntr, arg3, arg4) intrServiceNonStallBottomHalf_IMPL(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -NV_STATUS intrServiceNotificationRecords_IMPL(OBJGPU *pGpu, struct Intr *pIntr, NvU16 mcEngineIdx, struct THREAD_STATE_NODE *arg0); +NV_STATUS intrServiceNotificationRecords_IMPL(OBJGPU *pGpu, struct Intr *pIntr, NvU16 mcEngineIdx, struct THREAD_STATE_NODE *arg4); #ifdef __nvoc_intr_h_disabled -static inline NV_STATUS intrServiceNotificationRecords(OBJGPU *pGpu, struct Intr *pIntr, NvU16 mcEngineIdx, struct THREAD_STATE_NODE *arg0) { +static inline NV_STATUS intrServiceNotificationRecords(OBJGPU *pGpu, struct Intr *pIntr, NvU16 mcEngineIdx, struct THREAD_STATE_NODE *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_intr_h_disabled -#define intrServiceNotificationRecords(pGpu, pIntr, mcEngineIdx, arg0) intrServiceNotificationRecords_IMPL(pGpu, pIntr, mcEngineIdx, arg0) +#define intrServiceNotificationRecords(pGpu, pIntr, mcEngineIdx, arg4) intrServiceNotificationRecords_IMPL(pGpu, pIntr, mcEngineIdx, arg4) +#endif //__nvoc_intr_h_disabled + +NvU64 intrGetUvmSharedLeafEnDisableMask_IMPL(OBJGPU *pGpu, struct Intr *pIntr); + +#ifdef __nvoc_intr_h_disabled +static inline NvU64 intrGetUvmSharedLeafEnDisableMask(OBJGPU *pGpu, struct Intr *pIntr) { + NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); + return 0; +} +#else //__nvoc_intr_h_disabled +#define intrGetUvmSharedLeafEnDisableMask(pGpu, pIntr) intrGetUvmSharedLeafEnDisableMask_IMPL(pGpu, pIntr) #endif //__nvoc_intr_h_disabled NvU64 intrGetIntrTopLegacyStallMask_IMPL(struct Intr *pIntr); @@ -1714,98 +1797,98 @@ static inline NV_STATUS intrSetInterruptEntry(struct Intr *pIntr, INTR_TREE tree #define intrSetInterruptEntry(pIntr, tree, vector, pEntry) intrSetInterruptEntry_IMPL(pIntr, tree, vector, pEntry) #endif //__nvoc_intr_h_disabled -void intrServiceStallListAllGpusCond_IMPL(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, NvBool arg1); +void intrServiceStallListAllGpusCond_IMPL(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, NvBool arg4); #ifdef __nvoc_intr_h_disabled -static inline void intrServiceStallListAllGpusCond(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, NvBool arg1) { +static inline void intrServiceStallListAllGpusCond(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, NvBool arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); } #else //__nvoc_intr_h_disabled -#define intrServiceStallListAllGpusCond(pGpu, pIntr, arg0, arg1) intrServiceStallListAllGpusCond_IMPL(pGpu, pIntr, arg0, arg1) +#define intrServiceStallListAllGpusCond(pGpu, pIntr, arg3, arg4) intrServiceStallListAllGpusCond_IMPL(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -void intrServiceStallListDevice_IMPL(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, NvBool arg1); +void intrServiceStallListDevice_IMPL(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, NvBool arg4); #ifdef __nvoc_intr_h_disabled -static inline void intrServiceStallListDevice(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, NvBool arg1) { +static inline void intrServiceStallListDevice(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, NvBool arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); } #else //__nvoc_intr_h_disabled -#define intrServiceStallListDevice(pGpu, pIntr, arg0, arg1) intrServiceStallListDevice_IMPL(pGpu, pIntr, arg0, arg1) +#define intrServiceStallListDevice(pGpu, pIntr, arg3, arg4) intrServiceStallListDevice_IMPL(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -NvU32 intrServiceInterruptRecords_IMPL(OBJGPU *pGpu, struct Intr *pIntr, NvU16 arg0, NvBool *arg1); +NvU32 intrServiceInterruptRecords_IMPL(OBJGPU *pGpu, struct Intr *pIntr, NvU16 arg3, NvBool *arg4); #ifdef __nvoc_intr_h_disabled -static inline NvU32 intrServiceInterruptRecords(OBJGPU *pGpu, struct Intr *pIntr, NvU16 arg0, NvBool *arg1) { +static inline NvU32 intrServiceInterruptRecords(OBJGPU *pGpu, struct Intr *pIntr, NvU16 arg3, NvBool *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return 0; } #else //__nvoc_intr_h_disabled -#define intrServiceInterruptRecords(pGpu, pIntr, arg0, arg1) intrServiceInterruptRecords_IMPL(pGpu, pIntr, arg0, arg1) +#define intrServiceInterruptRecords(pGpu, pIntr, arg3, arg4) intrServiceInterruptRecords_IMPL(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -void intrQueueDpc_IMPL(OBJGPU *pGpu, struct Intr *pIntr, DPCQUEUE *arg0, DPCNODE *arg1); +void intrQueueDpc_IMPL(OBJGPU *pGpu, struct Intr *pIntr, DPCQUEUE *arg3, DPCNODE *arg4); #ifdef __nvoc_intr_h_disabled -static inline void intrQueueDpc(OBJGPU *pGpu, struct Intr *pIntr, DPCQUEUE *arg0, DPCNODE *arg1) { +static inline void intrQueueDpc(OBJGPU *pGpu, struct Intr *pIntr, DPCQUEUE *arg3, DPCNODE *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); } #else //__nvoc_intr_h_disabled -#define intrQueueDpc(pGpu, pIntr, arg0, arg1) intrQueueDpc_IMPL(pGpu, pIntr, arg0, arg1) +#define intrQueueDpc(pGpu, pIntr, arg3, arg4) intrQueueDpc_IMPL(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled -DPCNODE *intrDequeueDpc_IMPL(OBJGPU *pGpu, struct Intr *pIntr, DPCQUEUE *arg0); +DPCNODE *intrDequeueDpc_IMPL(OBJGPU *pGpu, struct Intr *pIntr, DPCQUEUE *arg3); #ifdef __nvoc_intr_h_disabled -static inline DPCNODE *intrDequeueDpc(OBJGPU *pGpu, struct Intr *pIntr, DPCQUEUE *arg0) { +static inline DPCNODE *intrDequeueDpc(OBJGPU *pGpu, struct Intr *pIntr, DPCQUEUE *arg3) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return NULL; } #else //__nvoc_intr_h_disabled -#define intrDequeueDpc(pGpu, pIntr, arg0) intrDequeueDpc_IMPL(pGpu, pIntr, arg0) +#define intrDequeueDpc(pGpu, pIntr, arg3) intrDequeueDpc_IMPL(pGpu, pIntr, arg3) #endif //__nvoc_intr_h_disabled -NvBool intrIsDpcQueueEmpty_IMPL(OBJGPU *pGpu, struct Intr *pIntr, DPCQUEUE *arg0); +NvBool intrIsDpcQueueEmpty_IMPL(OBJGPU *pGpu, struct Intr *pIntr, DPCQUEUE *arg3); #ifdef __nvoc_intr_h_disabled -static inline NvBool intrIsDpcQueueEmpty(OBJGPU *pGpu, struct Intr *pIntr, DPCQUEUE *arg0) { +static inline NvBool intrIsDpcQueueEmpty(OBJGPU *pGpu, struct Intr *pIntr, DPCQUEUE *arg3) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return NV_FALSE; } #else //__nvoc_intr_h_disabled -#define intrIsDpcQueueEmpty(pGpu, pIntr, arg0) intrIsDpcQueueEmpty_IMPL(pGpu, pIntr, arg0) +#define intrIsDpcQueueEmpty(pGpu, pIntr, arg3) intrIsDpcQueueEmpty_IMPL(pGpu, pIntr, arg3) #endif //__nvoc_intr_h_disabled -void intrQueueInterruptBasedDpc_IMPL(OBJGPU *pGpu, struct Intr *pIntr, NvU16 arg0); +void intrQueueInterruptBasedDpc_IMPL(OBJGPU *pGpu, struct Intr *pIntr, NvU16 arg3); #ifdef __nvoc_intr_h_disabled -static inline void intrQueueInterruptBasedDpc(OBJGPU *pGpu, struct Intr *pIntr, NvU16 arg0) { +static inline void intrQueueInterruptBasedDpc(OBJGPU *pGpu, struct Intr *pIntr, NvU16 arg3) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); } #else //__nvoc_intr_h_disabled -#define intrQueueInterruptBasedDpc(pGpu, pIntr, arg0) intrQueueInterruptBasedDpc_IMPL(pGpu, pIntr, arg0) +#define intrQueueInterruptBasedDpc(pGpu, pIntr, arg3) intrQueueInterruptBasedDpc_IMPL(pGpu, pIntr, arg3) #endif //__nvoc_intr_h_disabled -NvU32 intrConvertEngineMaskToPmcIntrMask_IMPL(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0); +NvU32 intrConvertEngineMaskToPmcIntrMask_IMPL(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3); #ifdef __nvoc_intr_h_disabled -static inline NvU32 intrConvertEngineMaskToPmcIntrMask(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0) { +static inline NvU32 intrConvertEngineMaskToPmcIntrMask(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return 0; } #else //__nvoc_intr_h_disabled -#define intrConvertEngineMaskToPmcIntrMask(pGpu, pIntr, arg0) intrConvertEngineMaskToPmcIntrMask_IMPL(pGpu, pIntr, arg0) +#define intrConvertEngineMaskToPmcIntrMask(pGpu, pIntr, arg3) intrConvertEngineMaskToPmcIntrMask_IMPL(pGpu, pIntr, arg3) #endif //__nvoc_intr_h_disabled -void intrConvertPmcIntrMaskToEngineMask_IMPL(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, union MC_ENGINE_BITVECTOR *arg1); +void intrConvertPmcIntrMaskToEngineMask_IMPL(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, union MC_ENGINE_BITVECTOR *arg4); #ifdef __nvoc_intr_h_disabled -static inline void intrConvertPmcIntrMaskToEngineMask(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg0, union MC_ENGINE_BITVECTOR *arg1) { +static inline void intrConvertPmcIntrMaskToEngineMask(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3, union MC_ENGINE_BITVECTOR *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); } #else //__nvoc_intr_h_disabled -#define intrConvertPmcIntrMaskToEngineMask(pGpu, pIntr, arg0, arg1) intrConvertPmcIntrMaskToEngineMask_IMPL(pGpu, pIntr, arg0, arg1) +#define intrConvertPmcIntrMaskToEngineMask(pGpu, pIntr, arg3, arg4) intrConvertPmcIntrMaskToEngineMask_IMPL(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled INTR_TABLE_ENTRY *intrGetInterruptTableEntryFromEngineId_IMPL(OBJGPU *pGpu, struct Intr *pIntr, NvU16 mcEngineId, NvBool bNonStall); @@ -1830,45 +1913,45 @@ static inline NvU32 intrGetVectorFromEngineId(OBJGPU *pGpu, struct Intr *pIntr, #define intrGetVectorFromEngineId(pGpu, pIntr, mcEngineId, bNonStall) intrGetVectorFromEngineId_IMPL(pGpu, pIntr, mcEngineId, bNonStall) #endif //__nvoc_intr_h_disabled -NV_STATUS intrGetSmallestNotificationVector_IMPL(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg0); +NV_STATUS intrGetSmallestNotificationVector_IMPL(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg3); #ifdef __nvoc_intr_h_disabled -static inline NV_STATUS intrGetSmallestNotificationVector(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg0) { +static inline NV_STATUS intrGetSmallestNotificationVector(OBJGPU *pGpu, struct Intr *pIntr, NvU32 *arg3) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_intr_h_disabled -#define intrGetSmallestNotificationVector(pGpu, pIntr, arg0) intrGetSmallestNotificationVector_IMPL(pGpu, pIntr, arg0) +#define intrGetSmallestNotificationVector(pGpu, pIntr, arg3) intrGetSmallestNotificationVector_IMPL(pGpu, pIntr, arg3) #endif //__nvoc_intr_h_disabled -void intrSetIntrMaskUnblocked_IMPL(struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0); +void intrSetIntrMaskUnblocked_IMPL(struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg2); #ifdef __nvoc_intr_h_disabled -static inline void intrSetIntrMaskUnblocked(struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0) { +static inline void intrSetIntrMaskUnblocked(struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg2) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); } #else //__nvoc_intr_h_disabled -#define intrSetIntrMaskUnblocked(pIntr, arg0) intrSetIntrMaskUnblocked_IMPL(pIntr, arg0) +#define intrSetIntrMaskUnblocked(pIntr, arg2) intrSetIntrMaskUnblocked_IMPL(pIntr, arg2) #endif //__nvoc_intr_h_disabled -void intrGetIntrMaskUnblocked_IMPL(struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0); +void intrGetIntrMaskUnblocked_IMPL(struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg2); #ifdef __nvoc_intr_h_disabled -static inline void intrGetIntrMaskUnblocked(struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0) { +static inline void intrGetIntrMaskUnblocked(struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg2) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); } #else //__nvoc_intr_h_disabled -#define intrGetIntrMaskUnblocked(pIntr, arg0) intrGetIntrMaskUnblocked_IMPL(pIntr, arg0) +#define intrGetIntrMaskUnblocked(pIntr, arg2) intrGetIntrMaskUnblocked_IMPL(pIntr, arg2) #endif //__nvoc_intr_h_disabled -void intrSetIntrMaskFlags_IMPL(struct Intr *pIntr, NvU32 arg0); +void intrSetIntrMaskFlags_IMPL(struct Intr *pIntr, NvU32 arg2); #ifdef __nvoc_intr_h_disabled -static inline void intrSetIntrMaskFlags(struct Intr *pIntr, NvU32 arg0) { +static inline void intrSetIntrMaskFlags(struct Intr *pIntr, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); } #else //__nvoc_intr_h_disabled -#define intrSetIntrMaskFlags(pIntr, arg0) intrSetIntrMaskFlags_IMPL(pIntr, arg0) +#define intrSetIntrMaskFlags(pIntr, arg2) intrSetIntrMaskFlags_IMPL(pIntr, arg2) #endif //__nvoc_intr_h_disabled NvU32 intrGetIntrMaskFlags_IMPL(struct Intr *pIntr); @@ -1882,14 +1965,14 @@ static inline NvU32 intrGetIntrMaskFlags(struct Intr *pIntr) { #define intrGetIntrMaskFlags(pIntr) intrGetIntrMaskFlags_IMPL(pIntr) #endif //__nvoc_intr_h_disabled -void intrSetDefaultIntrEn_IMPL(struct Intr *pIntr, NvU32 arg0); +void intrSetDefaultIntrEn_IMPL(struct Intr *pIntr, NvU32 arg2); #ifdef __nvoc_intr_h_disabled -static inline void intrSetDefaultIntrEn(struct Intr *pIntr, NvU32 arg0) { +static inline void intrSetDefaultIntrEn(struct Intr *pIntr, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); } #else //__nvoc_intr_h_disabled -#define intrSetDefaultIntrEn(pIntr, arg0) intrSetDefaultIntrEn_IMPL(pIntr, arg0) +#define intrSetDefaultIntrEn(pIntr, arg2) intrSetDefaultIntrEn_IMPL(pIntr, arg2) #endif //__nvoc_intr_h_disabled NvU32 intrGetDefaultIntrEn_IMPL(struct Intr *pIntr); @@ -1903,14 +1986,14 @@ static inline NvU32 intrGetDefaultIntrEn(struct Intr *pIntr) { #define intrGetDefaultIntrEn(pIntr) intrGetDefaultIntrEn_IMPL(pIntr) #endif //__nvoc_intr_h_disabled -void intrSetIntrEn_IMPL(struct Intr *pIntr, NvU32 arg0); +void intrSetIntrEn_IMPL(struct Intr *pIntr, NvU32 arg2); #ifdef __nvoc_intr_h_disabled -static inline void intrSetIntrEn(struct Intr *pIntr, NvU32 arg0) { +static inline void intrSetIntrEn(struct Intr *pIntr, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); } #else //__nvoc_intr_h_disabled -#define intrSetIntrEn(pIntr, arg0) intrSetIntrEn_IMPL(pIntr, arg0) +#define intrSetIntrEn(pIntr, arg2) intrSetIntrEn_IMPL(pIntr, arg2) #endif //__nvoc_intr_h_disabled NvU32 intrGetIntrEn_IMPL(struct Intr *pIntr); @@ -1934,14 +2017,14 @@ static inline void intrSaveIntrEn0FromHw(OBJGPU *pGpu, struct Intr *pIntr) { #define intrSaveIntrEn0FromHw(pGpu, pIntr) intrSaveIntrEn0FromHw_IMPL(pGpu, pIntr) #endif //__nvoc_intr_h_disabled -void intrGetGmmuInterrupts_IMPL(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1); +void intrGetGmmuInterrupts_IMPL(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4); #ifdef __nvoc_intr_h_disabled -static inline void intrGetGmmuInterrupts(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg0, struct THREAD_STATE_NODE *arg1) { +static inline void intrGetGmmuInterrupts(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, struct THREAD_STATE_NODE *arg4) { NV_ASSERT_FAILED_PRECOMP("Intr was disabled!"); } #else //__nvoc_intr_h_disabled -#define intrGetGmmuInterrupts(pGpu, pIntr, arg0, arg1) intrGetGmmuInterrupts_IMPL(pGpu, pIntr, arg0, arg1) +#define intrGetGmmuInterrupts(pGpu, pIntr, arg3, arg4) intrGetGmmuInterrupts_IMPL(pGpu, pIntr, arg3, arg4) #endif //__nvoc_intr_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_intr_service_nvoc.c b/src/nvidia/generated/g_intr_service_nvoc.c index 6409131c9f..a6c4cb8d29 100644 --- a/src/nvidia/generated/g_intr_service_nvoc.c +++ b/src/nvidia/generated/g_intr_service_nvoc.c @@ -73,19 +73,28 @@ NV_STATUS __nvoc_ctor_IntrService(IntrService *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_IntrService_1(IntrService *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // intrservRegisterIntrService -- virtual pThis->__intrservRegisterIntrService__ = &intrservRegisterIntrService_IMPL; + // intrservClearInterrupt -- virtual pThis->__intrservClearInterrupt__ = &intrservClearInterrupt_IMPL; + // intrservServiceInterrupt -- virtual pThis->__intrservServiceInterrupt__ = &intrservServiceInterrupt_IMPL; + // intrservServiceNotificationInterrupt -- virtual pThis->__intrservServiceNotificationInterrupt__ = &intrservServiceNotificationInterrupt_IMPL; -} +} // End __nvoc_init_funcTable_IntrService_1 with approximately 4 basic block(s). + +// Initialize vtable(s) for 4 virtual method(s). void __nvoc_init_funcTable_IntrService(IntrService *pThis) { + + // Initialize vtable(s) with 4 per-object function pointer(s). __nvoc_init_funcTable_IntrService_1(pThis); } diff --git a/src/nvidia/generated/g_intr_service_nvoc.h b/src/nvidia/generated/g_intr_service_nvoc.h index 751dc14245..6592315b59 100644 --- a/src/nvidia/generated/g_intr_service_nvoc.h +++ b/src/nvidia/generated/g_intr_service_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_INTR_SERVICE_NVOC_H_ #define _G_INTR_SERVICE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_intr_service_nvoc.h" #ifndef INTR_SERVICE_H @@ -44,6 +52,7 @@ extern "C" { #include "gpu/gpu.h" #include "kernel/gpu/intr/engine_idx.h" + struct IntrService; #ifndef __NVOC_CLASS_IntrService_TYPEDEF__ @@ -86,13 +95,20 @@ typedef struct { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct IntrService { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; - struct IntrService *__nvoc_pbase_IntrService; - void (*__intrservRegisterIntrService__)(struct OBJGPU *, struct IntrService *, IntrServiceRecord *); - NvBool (*__intrservClearInterrupt__)(struct OBJGPU *, struct IntrService *, IntrServiceClearInterruptArguments *); - NvU32 (*__intrservServiceInterrupt__)(struct OBJGPU *, struct IntrService *, IntrServiceServiceInterruptArguments *); - NV_STATUS (*__intrservServiceNotificationInterrupt__)(struct OBJGPU *, struct IntrService *, IntrServiceServiceNotificationInterruptArguments *); + + // Ancestor object pointers for `staticCast` feature + struct IntrService *__nvoc_pbase_IntrService; // intrserv + + // Vtable with 4 per-object function pointers + void (*__intrservRegisterIntrService__)(struct OBJGPU *, struct IntrService * /*this*/, IntrServiceRecord *); // virtual + NvBool (*__intrservClearInterrupt__)(struct OBJGPU *, struct IntrService * /*this*/, IntrServiceClearInterruptArguments *); // virtual + NvU32 (*__intrservServiceInterrupt__)(struct OBJGPU *, struct IntrService * /*this*/, IntrServiceServiceInterruptArguments *); // virtual + NV_STATUS (*__intrservServiceNotificationInterrupt__)(struct OBJGPU *, struct IntrService * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual }; #ifndef __NVOC_CLASS_IntrService_TYPEDEF__ @@ -104,6 +120,7 @@ typedef struct IntrService IntrService; #define __nvoc_class_id_IntrService 0x2271cc #endif /* __nvoc_class_id_IntrService */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_IntrService; #define __staticCast_IntrService(pThis) \ @@ -116,41 +133,48 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_IntrService; ((IntrService*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(IntrService))) #endif //__nvoc_intr_service_h_disabled - NV_STATUS __nvoc_objCreateDynamic_IntrService(IntrService**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_IntrService(IntrService**, Dynamic*, NvU32); #define __objCreate_IntrService(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_IntrService((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define intrservRegisterIntrService_FNPTR(pIntrService) pIntrService->__intrservRegisterIntrService__ #define intrservRegisterIntrService(pGpu, pIntrService, pRecords) intrservRegisterIntrService_DISPATCH(pGpu, pIntrService, pRecords) +#define intrservClearInterrupt_FNPTR(pIntrService) pIntrService->__intrservClearInterrupt__ #define intrservClearInterrupt(pGpu, pIntrService, pParams) intrservClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) +#define intrservServiceInterrupt_FNPTR(pIntrService) pIntrService->__intrservServiceInterrupt__ #define intrservServiceInterrupt(pGpu, pIntrService, pParams) intrservServiceInterrupt_DISPATCH(pGpu, pIntrService, pParams) +#define intrservServiceNotificationInterrupt_FNPTR(pIntrService) pIntrService->__intrservServiceNotificationInterrupt__ #define intrservServiceNotificationInterrupt(pGpu, pIntrService, pParams) intrservServiceNotificationInterrupt_DISPATCH(pGpu, pIntrService, pParams) -void intrservRegisterIntrService_IMPL(struct OBJGPU *pGpu, struct IntrService *pIntrService, IntrServiceRecord pRecords[171]); -static inline void intrservRegisterIntrService_DISPATCH(struct OBJGPU *pGpu, struct IntrService *pIntrService, IntrServiceRecord pRecords[171]) { +// Dispatch functions +static inline void intrservRegisterIntrService_DISPATCH(struct OBJGPU *pGpu, struct IntrService *pIntrService, IntrServiceRecord pRecords[175]) { pIntrService->__intrservRegisterIntrService__(pGpu, pIntrService, pRecords); } -NvBool intrservClearInterrupt_IMPL(struct OBJGPU *pGpu, struct IntrService *pIntrService, IntrServiceClearInterruptArguments *pParams); - static inline NvBool intrservClearInterrupt_DISPATCH(struct OBJGPU *pGpu, struct IntrService *pIntrService, IntrServiceClearInterruptArguments *pParams) { return pIntrService->__intrservClearInterrupt__(pGpu, pIntrService, pParams); } -NvU32 intrservServiceInterrupt_IMPL(struct OBJGPU *pGpu, struct IntrService *pIntrService, IntrServiceServiceInterruptArguments *pParams); - static inline NvU32 intrservServiceInterrupt_DISPATCH(struct OBJGPU *pGpu, struct IntrService *pIntrService, IntrServiceServiceInterruptArguments *pParams) { return pIntrService->__intrservServiceInterrupt__(pGpu, pIntrService, pParams); } -NV_STATUS intrservServiceNotificationInterrupt_IMPL(struct OBJGPU *pGpu, struct IntrService *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams); - static inline NV_STATUS intrservServiceNotificationInterrupt_DISPATCH(struct OBJGPU *pGpu, struct IntrService *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { return pIntrService->__intrservServiceNotificationInterrupt__(pGpu, pIntrService, pParams); } +void intrservRegisterIntrService_IMPL(struct OBJGPU *pGpu, struct IntrService *pIntrService, IntrServiceRecord pRecords[175]); + +NvBool intrservClearInterrupt_IMPL(struct OBJGPU *pGpu, struct IntrService *pIntrService, IntrServiceClearInterruptArguments *pParams); + +NvU32 intrservServiceInterrupt_IMPL(struct OBJGPU *pGpu, struct IntrService *pIntrService, IntrServiceServiceInterruptArguments *pParams); + +NV_STATUS intrservServiceNotificationInterrupt_IMPL(struct OBJGPU *pGpu, struct IntrService *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams); + #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_io_vaspace_nvoc.c b/src/nvidia/generated/g_io_vaspace_nvoc.c index 6314faa86b..11d10d4910 100644 --- a/src/nvidia/generated/g_io_vaspace_nvoc.c +++ b/src/nvidia/generated/g_io_vaspace_nvoc.c @@ -66,122 +66,157 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJIOVASPACE = /*pExportInfo=*/ &__nvoc_export_info_OBJIOVASPACE }; -static NV_STATUS __nvoc_thunk_OBJIOVASPACE_vaspaceConstruct_(struct OBJVASPACE *pVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags) { - return iovaspaceConstruct_((struct OBJIOVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); +// 8 down-thunk(s) defined to bridge methods in OBJIOVASPACE from superclasses + +// iovaspaceConstruct_: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceConstruct_(struct OBJVASPACE *pVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags) { + return iovaspaceConstruct_((struct OBJIOVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); } -static NV_STATUS __nvoc_thunk_OBJIOVASPACE_vaspaceAlloc(struct OBJVASPACE *pVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSizeLockMask, VAS_ALLOC_FLAGS flags, NvU64 *pAddr) { - return iovaspaceAlloc((struct OBJIOVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr); +// iovaspaceAlloc: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceAlloc(struct OBJVASPACE *pVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSizeLockMask, VAS_ALLOC_FLAGS flags, NvU64 *pAddr) { + return iovaspaceAlloc((struct OBJIOVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr); } -static NV_STATUS __nvoc_thunk_OBJIOVASPACE_vaspaceFree(struct OBJVASPACE *pVAS, NvU64 vAddr) { - return iovaspaceFree((struct OBJIOVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), vAddr); +// iovaspaceFree: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceFree(struct OBJVASPACE *pVAS, NvU64 vAddr) { + return iovaspaceFree((struct OBJIOVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), vAddr); } -static NV_STATUS __nvoc_thunk_OBJIOVASPACE_vaspaceApplyDefaultAlignment(struct OBJVASPACE *pVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask) { - return iovaspaceApplyDefaultAlignment((struct OBJIOVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pAllocInfo, pAlign, pSize, pPageSizeLockMask); +// iovaspaceApplyDefaultAlignment: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceApplyDefaultAlignment(struct OBJVASPACE *pVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask) { + return iovaspaceApplyDefaultAlignment((struct OBJIOVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pAllocInfo, pAlign, pSize, pPageSizeLockMask); } -static NV_STATUS __nvoc_thunk_OBJIOVASPACE_vaspaceIncAllocRefCnt(struct OBJVASPACE *pVAS, NvU64 vAddr) { - return iovaspaceIncAllocRefCnt((struct OBJIOVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), vAddr); +// iovaspaceIncAllocRefCnt: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceIncAllocRefCnt(struct OBJVASPACE *pVAS, NvU64 vAddr) { + return iovaspaceIncAllocRefCnt((struct OBJIOVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), vAddr); } -static NvU64 __nvoc_thunk_OBJIOVASPACE_vaspaceGetVaStart(struct OBJVASPACE *pVAS) { - return iovaspaceGetVaStart((struct OBJIOVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); +// iovaspaceGetVaStart: virtual override (vaspace) base (vaspace) +static NvU64 __nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVaStart(struct OBJVASPACE *pVAS) { + return iovaspaceGetVaStart((struct OBJIOVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); } -static NvU64 __nvoc_thunk_OBJIOVASPACE_vaspaceGetVaLimit(struct OBJVASPACE *pVAS) { - return iovaspaceGetVaLimit((struct OBJIOVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); +// iovaspaceGetVaLimit: virtual override (vaspace) base (vaspace) +static NvU64 __nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVaLimit(struct OBJVASPACE *pVAS) { + return iovaspaceGetVaLimit((struct OBJIOVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); } -static NV_STATUS __nvoc_thunk_OBJIOVASPACE_vaspaceGetVasInfo(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) { - return iovaspaceGetVasInfo((struct OBJIOVASPACE *)(((unsigned char *)pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pParams); +// iovaspaceGetVasInfo: virtual override (vaspace) base (vaspace) +static NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVasInfo(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) { + return iovaspaceGetVasInfo((struct OBJIOVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pParams); } -static NvBool __nvoc_thunk_OBJVASPACE_iovaspaceIsMirrored(struct OBJIOVASPACE *pVAS) { - return vaspaceIsMirrored((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); + +// 21 up-thunk(s) defined to bridge methods in OBJIOVASPACE to superclasses + +// iovaspaceGetFlags: inline virtual inherited (vaspace) base (vaspace) body +static NvU32 __nvoc_up_thunk_OBJVASPACE_iovaspaceGetFlags(struct OBJIOVASPACE *pVAS) { + return vaspaceGetFlags((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); } -static NvBool __nvoc_thunk_OBJVASPACE_iovaspaceIsExternallyOwned(struct OBJIOVASPACE *pVAS) { - return vaspaceIsExternallyOwned((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); +// iovaspaceMap: inline virtual inherited (vaspace) base (vaspace) body +static NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceMap(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { + return vaspaceMap((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, vaLo, vaHi, pTarget, flags); } -static NvU32 __nvoc_thunk_OBJVASPACE_iovaspaceGetFlags(struct OBJIOVASPACE *pVAS) { - return vaspaceGetFlags((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); +// iovaspaceUnmap: inline virtual inherited (vaspace) base (vaspace) body +static void __nvoc_up_thunk_OBJVASPACE_iovaspaceUnmap(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { + vaspaceUnmap((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, vaLo, vaHi); } -static NvBool __nvoc_thunk_OBJVASPACE_iovaspaceIsAtsEnabled(struct OBJIOVASPACE *pVAS) { - return vaspaceIsAtsEnabled((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); +// iovaspaceReserveMempool: inline virtual inherited (vaspace) base (vaspace) body +static NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceReserveMempool(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { + return vaspaceReserveMempool((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, pDevice, size, pageSizeLockMask, flags); } -static NvU64 __nvoc_thunk_OBJVASPACE_iovaspaceGetBigPageSize(struct OBJIOVASPACE *pVAS) { - return vaspaceGetBigPageSize((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); +// iovaspaceGetHeap: inline virtual inherited (vaspace) base (vaspace) body +static struct OBJEHEAP * __nvoc_up_thunk_OBJVASPACE_iovaspaceGetHeap(struct OBJIOVASPACE *pVAS) { + return vaspaceGetHeap((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); } -static NV_STATUS __nvoc_thunk_OBJVASPACE_iovaspaceGetPteInfo(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { - return vaspaceGetPteInfo((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, pParams, pPhysAddr); +// iovaspaceGetMapPageSize: inline virtual inherited (vaspace) base (vaspace) body +static NvU64 __nvoc_up_thunk_OBJVASPACE_iovaspaceGetMapPageSize(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, struct EMEMBLOCK *pMemBlock) { + return vaspaceGetMapPageSize((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, pMemBlock); } -static PMEMORY_DESCRIPTOR __nvoc_thunk_OBJVASPACE_iovaspaceGetPageDirBase(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { - return vaspaceGetPageDirBase((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu); +// iovaspaceGetBigPageSize: inline virtual inherited (vaspace) base (vaspace) body +static NvU64 __nvoc_up_thunk_OBJVASPACE_iovaspaceGetBigPageSize(struct OBJIOVASPACE *pVAS) { + return vaspaceGetBigPageSize((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); } -static PMEMORY_DESCRIPTOR __nvoc_thunk_OBJVASPACE_iovaspaceGetKernelPageDirBase(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { - return vaspaceGetKernelPageDirBase((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu); +// iovaspaceIsMirrored: inline virtual inherited (vaspace) base (vaspace) body +static NvBool __nvoc_up_thunk_OBJVASPACE_iovaspaceIsMirrored(struct OBJIOVASPACE *pVAS) { + return vaspaceIsMirrored((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); } -static NvU64 __nvoc_thunk_OBJVASPACE_iovaspaceGetMapPageSize(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, struct EMEMBLOCK *pMemBlock) { - return vaspaceGetMapPageSize((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, pMemBlock); +// iovaspaceIsFaultCapable: inline virtual inherited (vaspace) base (vaspace) body +static NvBool __nvoc_up_thunk_OBJVASPACE_iovaspaceIsFaultCapable(struct OBJIOVASPACE *pVAS) { + return vaspaceIsFaultCapable((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); } -static struct OBJEHEAP *__nvoc_thunk_OBJVASPACE_iovaspaceGetHeap(struct OBJIOVASPACE *pVAS) { - return vaspaceGetHeap((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); +// iovaspaceIsExternallyOwned: inline virtual inherited (vaspace) base (vaspace) body +static NvBool __nvoc_up_thunk_OBJVASPACE_iovaspaceIsExternallyOwned(struct OBJIOVASPACE *pVAS) { + return vaspaceIsExternallyOwned((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); } -static NvBool __nvoc_thunk_OBJVASPACE_iovaspaceIsFaultCapable(struct OBJIOVASPACE *pVAS) { - return vaspaceIsFaultCapable((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); +// iovaspaceIsAtsEnabled: inline virtual inherited (vaspace) base (vaspace) body +static NvBool __nvoc_up_thunk_OBJVASPACE_iovaspaceIsAtsEnabled(struct OBJIOVASPACE *pVAS) { + return vaspaceIsAtsEnabled((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); } -static void __nvoc_thunk_OBJVASPACE_iovaspaceUnmap(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { - vaspaceUnmap((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, vaLo, vaHi); +// iovaspaceGetPasid: inline virtual inherited (vaspace) base (vaspace) body +static NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceGetPasid(struct OBJIOVASPACE *pVAS, NvU32 *pPasid) { + return vaspaceGetPasid((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pPasid); } -static void __nvoc_thunk_OBJVASPACE_iovaspaceInvalidateTlb(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { - vaspaceInvalidateTlb((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, type); +// iovaspaceGetPageDirBase: inline virtual inherited (vaspace) base (vaspace) body +static PMEMORY_DESCRIPTOR __nvoc_up_thunk_OBJVASPACE_iovaspaceGetPageDirBase(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { + return vaspaceGetPageDirBase((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu); } -static NV_STATUS __nvoc_thunk_OBJVASPACE_iovaspacePinRootPageDir(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { - return vaspacePinRootPageDir((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu); +// iovaspaceGetKernelPageDirBase: inline virtual inherited (vaspace) base (vaspace) body +static PMEMORY_DESCRIPTOR __nvoc_up_thunk_OBJVASPACE_iovaspaceGetKernelPageDirBase(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { + return vaspaceGetKernelPageDirBase((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu); } -static void __nvoc_thunk_OBJVASPACE_iovaspaceUnpinRootPageDir(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { - vaspaceUnpinRootPageDir((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu); +// iovaspacePinRootPageDir: inline virtual inherited (vaspace) base (vaspace) body +static NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspacePinRootPageDir(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { + return vaspacePinRootPageDir((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu); } -static NV_STATUS __nvoc_thunk_OBJVASPACE_iovaspaceSetPteInfo(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { - return vaspaceSetPteInfo((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, pParams); +// iovaspaceUnpinRootPageDir: inline virtual inherited (vaspace) base (vaspace) body +static void __nvoc_up_thunk_OBJVASPACE_iovaspaceUnpinRootPageDir(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { + vaspaceUnpinRootPageDir((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu); } -static NV_STATUS __nvoc_thunk_OBJVASPACE_iovaspaceFreeV2(struct OBJIOVASPACE *pVAS, NvU64 vAddr, NvU64 *pSize) { - return vaspaceFreeV2((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), vAddr, pSize); +// iovaspaceInvalidateTlb: virtual inherited (vaspace) base (vaspace) +static void __nvoc_up_thunk_OBJVASPACE_iovaspaceInvalidateTlb(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { + vaspaceInvalidateTlb((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, type); } -static NV_STATUS __nvoc_thunk_OBJVASPACE_iovaspaceGetPasid(struct OBJIOVASPACE *pVAS, NvU32 *pPasid) { - return vaspaceGetPasid((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pPasid); +// iovaspaceGetPageTableInfo: inline virtual inherited (vaspace) base (vaspace) body +static NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceGetPageTableInfo(struct OBJIOVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { + return vaspaceGetPageTableInfo((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pParams); } -static NV_STATUS __nvoc_thunk_OBJVASPACE_iovaspaceGetPageTableInfo(struct OBJIOVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { - return vaspaceGetPageTableInfo((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pParams); +// iovaspaceGetPteInfo: inline virtual inherited (vaspace) base (vaspace) body +static NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceGetPteInfo(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { + return vaspaceGetPteInfo((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, pParams, pPhysAddr); } -static NV_STATUS __nvoc_thunk_OBJVASPACE_iovaspaceReserveMempool(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { - return vaspaceReserveMempool((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, pDevice, size, pageSizeLockMask, flags); +// iovaspaceSetPteInfo: inline virtual inherited (vaspace) base (vaspace) body +static NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceSetPteInfo(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { + return vaspaceSetPteInfo((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, pParams); } -static NV_STATUS __nvoc_thunk_OBJVASPACE_iovaspaceMap(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { - return vaspaceMap((struct OBJVASPACE *)(((unsigned char *)pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, vaLo, vaHi, pTarget, flags); +// iovaspaceFreeV2: inline virtual inherited (vaspace) base (vaspace) body +static NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceFreeV2(struct OBJIOVASPACE *pVAS, NvU64 vAddr, NvU64 *pSize) { + return vaspaceFreeV2((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), vAddr, pSize); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJIOVASPACE = { /*numEntries=*/ 0, @@ -213,85 +248,111 @@ NV_STATUS __nvoc_ctor_OBJIOVASPACE(OBJIOVASPACE *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJIOVASPACE_1(OBJIOVASPACE *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // iovaspaceConstruct_ -- virtual override (vaspace) base (vaspace) pThis->__iovaspaceConstruct___ = &iovaspaceConstruct__IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceConstruct___ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceConstruct_; + // iovaspaceAlloc -- virtual override (vaspace) base (vaspace) pThis->__iovaspaceAlloc__ = &iovaspaceAlloc_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceAlloc__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceAlloc; + // iovaspaceFree -- virtual override (vaspace) base (vaspace) pThis->__iovaspaceFree__ = &iovaspaceFree_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceFree__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceFree; + // iovaspaceApplyDefaultAlignment -- virtual override (vaspace) base (vaspace) pThis->__iovaspaceApplyDefaultAlignment__ = &iovaspaceApplyDefaultAlignment_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceApplyDefaultAlignment__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceApplyDefaultAlignment; + // iovaspaceIncAllocRefCnt -- virtual override (vaspace) base (vaspace) pThis->__iovaspaceIncAllocRefCnt__ = &iovaspaceIncAllocRefCnt_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceIncAllocRefCnt__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceIncAllocRefCnt; + // iovaspaceGetVaStart -- virtual override (vaspace) base (vaspace) pThis->__iovaspaceGetVaStart__ = &iovaspaceGetVaStart_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceGetVaStart__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVaStart; + // iovaspaceGetVaLimit -- virtual override (vaspace) base (vaspace) pThis->__iovaspaceGetVaLimit__ = &iovaspaceGetVaLimit_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceGetVaLimit__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVaLimit; + // iovaspaceGetVasInfo -- virtual override (vaspace) base (vaspace) pThis->__iovaspaceGetVasInfo__ = &iovaspaceGetVasInfo_IMPL; + pThis->__nvoc_base_OBJVASPACE.__vaspaceGetVasInfo__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVasInfo; - pThis->__nvoc_base_OBJVASPACE.__vaspaceConstruct___ = &__nvoc_thunk_OBJIOVASPACE_vaspaceConstruct_; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceAlloc__ = &__nvoc_thunk_OBJIOVASPACE_vaspaceAlloc; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceFree__ = &__nvoc_thunk_OBJIOVASPACE_vaspaceFree; - - pThis->__nvoc_base_OBJVASPACE.__vaspaceApplyDefaultAlignment__ = &__nvoc_thunk_OBJIOVASPACE_vaspaceApplyDefaultAlignment; + // iovaspaceGetFlags -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__iovaspaceGetFlags__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetFlags; - pThis->__nvoc_base_OBJVASPACE.__vaspaceIncAllocRefCnt__ = &__nvoc_thunk_OBJIOVASPACE_vaspaceIncAllocRefCnt; + // iovaspaceMap -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__iovaspaceMap__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceMap; - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetVaStart__ = &__nvoc_thunk_OBJIOVASPACE_vaspaceGetVaStart; + // iovaspaceUnmap -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__iovaspaceUnmap__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceUnmap; - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetVaLimit__ = &__nvoc_thunk_OBJIOVASPACE_vaspaceGetVaLimit; + // iovaspaceReserveMempool -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__iovaspaceReserveMempool__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceReserveMempool; - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetVasInfo__ = &__nvoc_thunk_OBJIOVASPACE_vaspaceGetVasInfo; + // iovaspaceGetHeap -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__iovaspaceGetHeap__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetHeap; - pThis->__iovaspaceIsMirrored__ = &__nvoc_thunk_OBJVASPACE_iovaspaceIsMirrored; + // iovaspaceGetMapPageSize -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__iovaspaceGetMapPageSize__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetMapPageSize; - pThis->__iovaspaceIsExternallyOwned__ = &__nvoc_thunk_OBJVASPACE_iovaspaceIsExternallyOwned; + // iovaspaceGetBigPageSize -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__iovaspaceGetBigPageSize__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetBigPageSize; - pThis->__iovaspaceGetFlags__ = &__nvoc_thunk_OBJVASPACE_iovaspaceGetFlags; + // iovaspaceIsMirrored -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__iovaspaceIsMirrored__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceIsMirrored; - pThis->__iovaspaceIsAtsEnabled__ = &__nvoc_thunk_OBJVASPACE_iovaspaceIsAtsEnabled; + // iovaspaceIsFaultCapable -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__iovaspaceIsFaultCapable__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceIsFaultCapable; - pThis->__iovaspaceGetBigPageSize__ = &__nvoc_thunk_OBJVASPACE_iovaspaceGetBigPageSize; + // iovaspaceIsExternallyOwned -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__iovaspaceIsExternallyOwned__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceIsExternallyOwned; - pThis->__iovaspaceGetPteInfo__ = &__nvoc_thunk_OBJVASPACE_iovaspaceGetPteInfo; + // iovaspaceIsAtsEnabled -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__iovaspaceIsAtsEnabled__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceIsAtsEnabled; - pThis->__iovaspaceGetPageDirBase__ = &__nvoc_thunk_OBJVASPACE_iovaspaceGetPageDirBase; + // iovaspaceGetPasid -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__iovaspaceGetPasid__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetPasid; - pThis->__iovaspaceGetKernelPageDirBase__ = &__nvoc_thunk_OBJVASPACE_iovaspaceGetKernelPageDirBase; + // iovaspaceGetPageDirBase -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__iovaspaceGetPageDirBase__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetPageDirBase; - pThis->__iovaspaceGetMapPageSize__ = &__nvoc_thunk_OBJVASPACE_iovaspaceGetMapPageSize; + // iovaspaceGetKernelPageDirBase -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__iovaspaceGetKernelPageDirBase__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetKernelPageDirBase; - pThis->__iovaspaceGetHeap__ = &__nvoc_thunk_OBJVASPACE_iovaspaceGetHeap; + // iovaspacePinRootPageDir -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__iovaspacePinRootPageDir__ = &__nvoc_up_thunk_OBJVASPACE_iovaspacePinRootPageDir; - pThis->__iovaspaceIsFaultCapable__ = &__nvoc_thunk_OBJVASPACE_iovaspaceIsFaultCapable; + // iovaspaceUnpinRootPageDir -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__iovaspaceUnpinRootPageDir__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceUnpinRootPageDir; - pThis->__iovaspaceUnmap__ = &__nvoc_thunk_OBJVASPACE_iovaspaceUnmap; + // iovaspaceInvalidateTlb -- virtual inherited (vaspace) base (vaspace) + pThis->__iovaspaceInvalidateTlb__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceInvalidateTlb; - pThis->__iovaspaceInvalidateTlb__ = &__nvoc_thunk_OBJVASPACE_iovaspaceInvalidateTlb; + // iovaspaceGetPageTableInfo -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__iovaspaceGetPageTableInfo__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetPageTableInfo; - pThis->__iovaspacePinRootPageDir__ = &__nvoc_thunk_OBJVASPACE_iovaspacePinRootPageDir; + // iovaspaceGetPteInfo -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__iovaspaceGetPteInfo__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetPteInfo; - pThis->__iovaspaceUnpinRootPageDir__ = &__nvoc_thunk_OBJVASPACE_iovaspaceUnpinRootPageDir; + // iovaspaceSetPteInfo -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__iovaspaceSetPteInfo__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceSetPteInfo; - pThis->__iovaspaceSetPteInfo__ = &__nvoc_thunk_OBJVASPACE_iovaspaceSetPteInfo; + // iovaspaceFreeV2 -- inline virtual inherited (vaspace) base (vaspace) body + pThis->__iovaspaceFreeV2__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceFreeV2; +} // End __nvoc_init_funcTable_OBJIOVASPACE_1 with approximately 37 basic block(s). - pThis->__iovaspaceFreeV2__ = &__nvoc_thunk_OBJVASPACE_iovaspaceFreeV2; - - pThis->__iovaspaceGetPasid__ = &__nvoc_thunk_OBJVASPACE_iovaspaceGetPasid; - - pThis->__iovaspaceGetPageTableInfo__ = &__nvoc_thunk_OBJVASPACE_iovaspaceGetPageTableInfo; - - pThis->__iovaspaceReserveMempool__ = &__nvoc_thunk_OBJVASPACE_iovaspaceReserveMempool; - - pThis->__iovaspaceMap__ = &__nvoc_thunk_OBJVASPACE_iovaspaceMap; -} +// Initialize vtable(s) for 29 virtual method(s). void __nvoc_init_funcTable_OBJIOVASPACE(OBJIOVASPACE *pThis) { + + // Initialize vtable(s) with 29 per-object function pointer(s). __nvoc_init_funcTable_OBJIOVASPACE_1(pThis); } diff --git a/src/nvidia/generated/g_io_vaspace_nvoc.h b/src/nvidia/generated/g_io_vaspace_nvoc.h index 02dc1e941b..3d72a13ec7 100644 --- a/src/nvidia/generated/g_io_vaspace_nvoc.h +++ b/src/nvidia/generated/g_io_vaspace_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_IO_VASPACE_NVOC_H_ #define _G_IO_VASPACE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_io_vaspace_nvoc.h" #ifndef _IOVASPACE_H_ @@ -145,41 +153,52 @@ struct IOVAMAPPING #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJIOVASPACE { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJVASPACE __nvoc_base_OBJVASPACE; - struct Object *__nvoc_pbase_Object; - struct OBJVASPACE *__nvoc_pbase_OBJVASPACE; - struct OBJIOVASPACE *__nvoc_pbase_OBJIOVASPACE; - NV_STATUS (*__iovaspaceConstruct___)(struct OBJIOVASPACE *, NvU32, NvU32, NvU64, NvU64, NvU64, NvU64, NvU32); - NV_STATUS (*__iovaspaceAlloc__)(struct OBJIOVASPACE *, NvU64, NvU64, NvU64, NvU64, NvU64, VAS_ALLOC_FLAGS, NvU64 *); - NV_STATUS (*__iovaspaceFree__)(struct OBJIOVASPACE *, NvU64); - NV_STATUS (*__iovaspaceApplyDefaultAlignment__)(struct OBJIOVASPACE *, const FB_ALLOC_INFO *, NvU64 *, NvU64 *, NvU64 *); - NV_STATUS (*__iovaspaceIncAllocRefCnt__)(struct OBJIOVASPACE *, NvU64); - NvU64 (*__iovaspaceGetVaStart__)(struct OBJIOVASPACE *); - NvU64 (*__iovaspaceGetVaLimit__)(struct OBJIOVASPACE *); - NV_STATUS (*__iovaspaceGetVasInfo__)(struct OBJIOVASPACE *, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *); - NvBool (*__iovaspaceIsMirrored__)(struct OBJIOVASPACE *); - NvBool (*__iovaspaceIsExternallyOwned__)(struct OBJIOVASPACE *); - NvU32 (*__iovaspaceGetFlags__)(struct OBJIOVASPACE *); - NvBool (*__iovaspaceIsAtsEnabled__)(struct OBJIOVASPACE *); - NvU64 (*__iovaspaceGetBigPageSize__)(struct OBJIOVASPACE *); - NV_STATUS (*__iovaspaceGetPteInfo__)(struct OBJIOVASPACE *, struct OBJGPU *, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *, RmPhysAddr *); - PMEMORY_DESCRIPTOR (*__iovaspaceGetPageDirBase__)(struct OBJIOVASPACE *, struct OBJGPU *); - PMEMORY_DESCRIPTOR (*__iovaspaceGetKernelPageDirBase__)(struct OBJIOVASPACE *, struct OBJGPU *); - NvU64 (*__iovaspaceGetMapPageSize__)(struct OBJIOVASPACE *, struct OBJGPU *, struct EMEMBLOCK *); - struct OBJEHEAP *(*__iovaspaceGetHeap__)(struct OBJIOVASPACE *); - NvBool (*__iovaspaceIsFaultCapable__)(struct OBJIOVASPACE *); - void (*__iovaspaceUnmap__)(struct OBJIOVASPACE *, struct OBJGPU *, const NvU64, const NvU64); - void (*__iovaspaceInvalidateTlb__)(struct OBJIOVASPACE *, struct OBJGPU *, VAS_PTE_UPDATE_TYPE); - NV_STATUS (*__iovaspacePinRootPageDir__)(struct OBJIOVASPACE *, struct OBJGPU *); - void (*__iovaspaceUnpinRootPageDir__)(struct OBJIOVASPACE *, struct OBJGPU *); - NV_STATUS (*__iovaspaceSetPteInfo__)(struct OBJIOVASPACE *, struct OBJGPU *, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *); - NV_STATUS (*__iovaspaceFreeV2__)(struct OBJIOVASPACE *, NvU64, NvU64 *); - NV_STATUS (*__iovaspaceGetPasid__)(struct OBJIOVASPACE *, NvU32 *); - NV_STATUS (*__iovaspaceGetPageTableInfo__)(struct OBJIOVASPACE *, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *); - NV_STATUS (*__iovaspaceReserveMempool__)(struct OBJIOVASPACE *, struct OBJGPU *, struct Device *, NvU64, NvU64, NvU32); - NV_STATUS (*__iovaspaceMap__)(struct OBJIOVASPACE *, struct OBJGPU *, const NvU64, const NvU64, const MMU_MAP_TARGET *, const VAS_MAP_FLAGS); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJVASPACE *__nvoc_pbase_OBJVASPACE; // vaspace super + struct OBJIOVASPACE *__nvoc_pbase_OBJIOVASPACE; // iovaspace + + // Vtable with 29 per-object function pointers + NV_STATUS (*__iovaspaceConstruct___)(struct OBJIOVASPACE * /*this*/, NvU32, NvU32, NvU64, NvU64, NvU64, NvU64, NvU32); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__iovaspaceAlloc__)(struct OBJIOVASPACE * /*this*/, NvU64, NvU64, NvU64, NvU64, NvU64, VAS_ALLOC_FLAGS, NvU64 *); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__iovaspaceFree__)(struct OBJIOVASPACE * /*this*/, NvU64); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__iovaspaceApplyDefaultAlignment__)(struct OBJIOVASPACE * /*this*/, const FB_ALLOC_INFO *, NvU64 *, NvU64 *, NvU64 *); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__iovaspaceIncAllocRefCnt__)(struct OBJIOVASPACE * /*this*/, NvU64); // virtual override (vaspace) base (vaspace) + NvU64 (*__iovaspaceGetVaStart__)(struct OBJIOVASPACE * /*this*/); // virtual override (vaspace) base (vaspace) + NvU64 (*__iovaspaceGetVaLimit__)(struct OBJIOVASPACE * /*this*/); // virtual override (vaspace) base (vaspace) + NV_STATUS (*__iovaspaceGetVasInfo__)(struct OBJIOVASPACE * /*this*/, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *); // virtual override (vaspace) base (vaspace) + NvU32 (*__iovaspaceGetFlags__)(struct OBJIOVASPACE * /*this*/); // inline virtual inherited (vaspace) base (vaspace) body + NV_STATUS (*__iovaspaceMap__)(struct OBJIOVASPACE * /*this*/, struct OBJGPU *, const NvU64, const NvU64, const MMU_MAP_TARGET *, const VAS_MAP_FLAGS); // inline virtual inherited (vaspace) base (vaspace) body + void (*__iovaspaceUnmap__)(struct OBJIOVASPACE * /*this*/, struct OBJGPU *, const NvU64, const NvU64); // inline virtual inherited (vaspace) base (vaspace) body + NV_STATUS (*__iovaspaceReserveMempool__)(struct OBJIOVASPACE * /*this*/, struct OBJGPU *, struct Device *, NvU64, NvU64, NvU32); // inline virtual inherited (vaspace) base (vaspace) body + struct OBJEHEAP * (*__iovaspaceGetHeap__)(struct OBJIOVASPACE * /*this*/); // inline virtual inherited (vaspace) base (vaspace) body + NvU64 (*__iovaspaceGetMapPageSize__)(struct OBJIOVASPACE * /*this*/, struct OBJGPU *, struct EMEMBLOCK *); // inline virtual inherited (vaspace) base (vaspace) body + NvU64 (*__iovaspaceGetBigPageSize__)(struct OBJIOVASPACE * /*this*/); // inline virtual inherited (vaspace) base (vaspace) body + NvBool (*__iovaspaceIsMirrored__)(struct OBJIOVASPACE * /*this*/); // inline virtual inherited (vaspace) base (vaspace) body + NvBool (*__iovaspaceIsFaultCapable__)(struct OBJIOVASPACE * /*this*/); // inline virtual inherited (vaspace) base (vaspace) body + NvBool (*__iovaspaceIsExternallyOwned__)(struct OBJIOVASPACE * /*this*/); // inline virtual inherited (vaspace) base (vaspace) body + NvBool (*__iovaspaceIsAtsEnabled__)(struct OBJIOVASPACE * /*this*/); // inline virtual inherited (vaspace) base (vaspace) body + NV_STATUS (*__iovaspaceGetPasid__)(struct OBJIOVASPACE * /*this*/, NvU32 *); // inline virtual inherited (vaspace) base (vaspace) body + PMEMORY_DESCRIPTOR (*__iovaspaceGetPageDirBase__)(struct OBJIOVASPACE * /*this*/, struct OBJGPU *); // inline virtual inherited (vaspace) base (vaspace) body + PMEMORY_DESCRIPTOR (*__iovaspaceGetKernelPageDirBase__)(struct OBJIOVASPACE * /*this*/, struct OBJGPU *); // inline virtual inherited (vaspace) base (vaspace) body + NV_STATUS (*__iovaspacePinRootPageDir__)(struct OBJIOVASPACE * /*this*/, struct OBJGPU *); // inline virtual inherited (vaspace) base (vaspace) body + void (*__iovaspaceUnpinRootPageDir__)(struct OBJIOVASPACE * /*this*/, struct OBJGPU *); // inline virtual inherited (vaspace) base (vaspace) body + void (*__iovaspaceInvalidateTlb__)(struct OBJIOVASPACE * /*this*/, struct OBJGPU *, VAS_PTE_UPDATE_TYPE); // virtual inherited (vaspace) base (vaspace) + NV_STATUS (*__iovaspaceGetPageTableInfo__)(struct OBJIOVASPACE * /*this*/, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *); // inline virtual inherited (vaspace) base (vaspace) body + NV_STATUS (*__iovaspaceGetPteInfo__)(struct OBJIOVASPACE * /*this*/, struct OBJGPU *, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *, RmPhysAddr *); // inline virtual inherited (vaspace) base (vaspace) body + NV_STATUS (*__iovaspaceSetPteInfo__)(struct OBJIOVASPACE * /*this*/, struct OBJGPU *, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *); // inline virtual inherited (vaspace) base (vaspace) body + NV_STATUS (*__iovaspaceFreeV2__)(struct OBJIOVASPACE * /*this*/, NvU64, NvU64 *); // inline virtual inherited (vaspace) base (vaspace) body + + // Data members NvU64 mappingCount; }; @@ -192,6 +211,7 @@ typedef struct OBJIOVASPACE OBJIOVASPACE; #define __nvoc_class_id_OBJIOVASPACE 0x28ed9c #endif /* __nvoc_class_id_OBJIOVASPACE */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJIOVASPACE; #define __staticCast_OBJIOVASPACE(pThis) \ @@ -204,140 +224,160 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJIOVASPACE; ((OBJIOVASPACE*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJIOVASPACE))) #endif //__nvoc_io_vaspace_h_disabled - NV_STATUS __nvoc_objCreateDynamic_OBJIOVASPACE(OBJIOVASPACE**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_OBJIOVASPACE(OBJIOVASPACE**, Dynamic*, NvU32); #define __objCreate_OBJIOVASPACE(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJIOVASPACE((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define iovaspaceConstruct__FNPTR(pVAS) pVAS->__iovaspaceConstruct___ #define iovaspaceConstruct_(pVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags) iovaspaceConstruct__DISPATCH(pVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags) +#define iovaspaceAlloc_FNPTR(pVAS) pVAS->__iovaspaceAlloc__ #define iovaspaceAlloc(pVAS, size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr) iovaspaceAlloc_DISPATCH(pVAS, size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr) +#define iovaspaceFree_FNPTR(pVAS) pVAS->__iovaspaceFree__ #define iovaspaceFree(pVAS, vAddr) iovaspaceFree_DISPATCH(pVAS, vAddr) +#define iovaspaceApplyDefaultAlignment_FNPTR(pVAS) pVAS->__iovaspaceApplyDefaultAlignment__ #define iovaspaceApplyDefaultAlignment(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask) iovaspaceApplyDefaultAlignment_DISPATCH(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask) +#define iovaspaceIncAllocRefCnt_FNPTR(pVAS) pVAS->__iovaspaceIncAllocRefCnt__ #define iovaspaceIncAllocRefCnt(pVAS, vAddr) iovaspaceIncAllocRefCnt_DISPATCH(pVAS, vAddr) +#define iovaspaceGetVaStart_FNPTR(pVAS) pVAS->__iovaspaceGetVaStart__ #define iovaspaceGetVaStart(pVAS) iovaspaceGetVaStart_DISPATCH(pVAS) +#define iovaspaceGetVaLimit_FNPTR(pVAS) pVAS->__iovaspaceGetVaLimit__ #define iovaspaceGetVaLimit(pVAS) iovaspaceGetVaLimit_DISPATCH(pVAS) +#define iovaspaceGetVasInfo_FNPTR(pVAS) pVAS->__iovaspaceGetVasInfo__ #define iovaspaceGetVasInfo(pVAS, pParams) iovaspaceGetVasInfo_DISPATCH(pVAS, pParams) +#define iovaspaceGetFlags_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetFlags__ +#define iovaspaceGetFlags(pVAS) iovaspaceGetFlags_DISPATCH(pVAS) +#define iovaspaceMap_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceMap__ +#define iovaspaceMap(pVAS, pGpu, vaLo, vaHi, pTarget, flags) iovaspaceMap_DISPATCH(pVAS, pGpu, vaLo, vaHi, pTarget, flags) +#define iovaspaceUnmap_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceUnmap__ +#define iovaspaceUnmap(pVAS, pGpu, vaLo, vaHi) iovaspaceUnmap_DISPATCH(pVAS, pGpu, vaLo, vaHi) +#define iovaspaceReserveMempool_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceReserveMempool__ +#define iovaspaceReserveMempool(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags) iovaspaceReserveMempool_DISPATCH(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags) +#define iovaspaceGetHeap_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetHeap__ +#define iovaspaceGetHeap(pVAS) iovaspaceGetHeap_DISPATCH(pVAS) +#define iovaspaceGetMapPageSize_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetMapPageSize__ +#define iovaspaceGetMapPageSize(pVAS, pGpu, pMemBlock) iovaspaceGetMapPageSize_DISPATCH(pVAS, pGpu, pMemBlock) +#define iovaspaceGetBigPageSize_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetBigPageSize__ +#define iovaspaceGetBigPageSize(pVAS) iovaspaceGetBigPageSize_DISPATCH(pVAS) +#define iovaspaceIsMirrored_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceIsMirrored__ #define iovaspaceIsMirrored(pVAS) iovaspaceIsMirrored_DISPATCH(pVAS) +#define iovaspaceIsFaultCapable_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceIsFaultCapable__ +#define iovaspaceIsFaultCapable(pVAS) iovaspaceIsFaultCapable_DISPATCH(pVAS) +#define iovaspaceIsExternallyOwned_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceIsExternallyOwned__ #define iovaspaceIsExternallyOwned(pVAS) iovaspaceIsExternallyOwned_DISPATCH(pVAS) -#define iovaspaceGetFlags(pVAS) iovaspaceGetFlags_DISPATCH(pVAS) +#define iovaspaceIsAtsEnabled_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceIsAtsEnabled__ #define iovaspaceIsAtsEnabled(pVAS) iovaspaceIsAtsEnabled_DISPATCH(pVAS) -#define iovaspaceGetBigPageSize(pVAS) iovaspaceGetBigPageSize_DISPATCH(pVAS) -#define iovaspaceGetPteInfo(pVAS, pGpu, pParams, pPhysAddr) iovaspaceGetPteInfo_DISPATCH(pVAS, pGpu, pParams, pPhysAddr) +#define iovaspaceGetPasid_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetPasid__ +#define iovaspaceGetPasid(pVAS, pPasid) iovaspaceGetPasid_DISPATCH(pVAS, pPasid) +#define iovaspaceGetPageDirBase_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetPageDirBase__ #define iovaspaceGetPageDirBase(pVAS, pGpu) iovaspaceGetPageDirBase_DISPATCH(pVAS, pGpu) +#define iovaspaceGetKernelPageDirBase_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetKernelPageDirBase__ #define iovaspaceGetKernelPageDirBase(pVAS, pGpu) iovaspaceGetKernelPageDirBase_DISPATCH(pVAS, pGpu) -#define iovaspaceGetMapPageSize(pVAS, pGpu, pMemBlock) iovaspaceGetMapPageSize_DISPATCH(pVAS, pGpu, pMemBlock) -#define iovaspaceGetHeap(pVAS) iovaspaceGetHeap_DISPATCH(pVAS) -#define iovaspaceIsFaultCapable(pVAS) iovaspaceIsFaultCapable_DISPATCH(pVAS) -#define iovaspaceUnmap(pVAS, pGpu, vaLo, vaHi) iovaspaceUnmap_DISPATCH(pVAS, pGpu, vaLo, vaHi) -#define iovaspaceInvalidateTlb(pVAS, pGpu, type) iovaspaceInvalidateTlb_DISPATCH(pVAS, pGpu, type) +#define iovaspacePinRootPageDir_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspacePinRootPageDir__ #define iovaspacePinRootPageDir(pVAS, pGpu) iovaspacePinRootPageDir_DISPATCH(pVAS, pGpu) +#define iovaspaceUnpinRootPageDir_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceUnpinRootPageDir__ #define iovaspaceUnpinRootPageDir(pVAS, pGpu) iovaspaceUnpinRootPageDir_DISPATCH(pVAS, pGpu) +#define iovaspaceInvalidateTlb_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceInvalidateTlb__ +#define iovaspaceInvalidateTlb(pVAS, pGpu, type) iovaspaceInvalidateTlb_DISPATCH(pVAS, pGpu, type) +#define iovaspaceGetPageTableInfo_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetPageTableInfo__ +#define iovaspaceGetPageTableInfo(pVAS, pParams) iovaspaceGetPageTableInfo_DISPATCH(pVAS, pParams) +#define iovaspaceGetPteInfo_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetPteInfo__ +#define iovaspaceGetPteInfo(pVAS, pGpu, pParams, pPhysAddr) iovaspaceGetPteInfo_DISPATCH(pVAS, pGpu, pParams, pPhysAddr) +#define iovaspaceSetPteInfo_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceSetPteInfo__ #define iovaspaceSetPteInfo(pVAS, pGpu, pParams) iovaspaceSetPteInfo_DISPATCH(pVAS, pGpu, pParams) +#define iovaspaceFreeV2_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceFreeV2__ #define iovaspaceFreeV2(pVAS, vAddr, pSize) iovaspaceFreeV2_DISPATCH(pVAS, vAddr, pSize) -#define iovaspaceGetPasid(pVAS, pPasid) iovaspaceGetPasid_DISPATCH(pVAS, pPasid) -#define iovaspaceGetPageTableInfo(pVAS, pParams) iovaspaceGetPageTableInfo_DISPATCH(pVAS, pParams) -#define iovaspaceReserveMempool(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags) iovaspaceReserveMempool_DISPATCH(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags) -#define iovaspaceMap(pVAS, pGpu, vaLo, vaHi, pTarget, flags) iovaspaceMap_DISPATCH(pVAS, pGpu, vaLo, vaHi, pTarget, flags) -NV_STATUS iovaspaceConstruct__IMPL(struct OBJIOVASPACE *pVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags); +// Dispatch functions static inline NV_STATUS iovaspaceConstruct__DISPATCH(struct OBJIOVASPACE *pVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags) { return pVAS->__iovaspaceConstruct___(pVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); } -NV_STATUS iovaspaceAlloc_IMPL(struct OBJIOVASPACE *pVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSizeLockMask, VAS_ALLOC_FLAGS flags, NvU64 *pAddr); - static inline NV_STATUS iovaspaceAlloc_DISPATCH(struct OBJIOVASPACE *pVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSizeLockMask, VAS_ALLOC_FLAGS flags, NvU64 *pAddr) { return pVAS->__iovaspaceAlloc__(pVAS, size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr); } -NV_STATUS iovaspaceFree_IMPL(struct OBJIOVASPACE *pVAS, NvU64 vAddr); - static inline NV_STATUS iovaspaceFree_DISPATCH(struct OBJIOVASPACE *pVAS, NvU64 vAddr) { return pVAS->__iovaspaceFree__(pVAS, vAddr); } -NV_STATUS iovaspaceApplyDefaultAlignment_IMPL(struct OBJIOVASPACE *pVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask); - static inline NV_STATUS iovaspaceApplyDefaultAlignment_DISPATCH(struct OBJIOVASPACE *pVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask) { return pVAS->__iovaspaceApplyDefaultAlignment__(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask); } -NV_STATUS iovaspaceIncAllocRefCnt_IMPL(struct OBJIOVASPACE *pVAS, NvU64 vAddr); - static inline NV_STATUS iovaspaceIncAllocRefCnt_DISPATCH(struct OBJIOVASPACE *pVAS, NvU64 vAddr) { return pVAS->__iovaspaceIncAllocRefCnt__(pVAS, vAddr); } -NvU64 iovaspaceGetVaStart_IMPL(struct OBJIOVASPACE *pVAS); - static inline NvU64 iovaspaceGetVaStart_DISPATCH(struct OBJIOVASPACE *pVAS) { return pVAS->__iovaspaceGetVaStart__(pVAS); } -NvU64 iovaspaceGetVaLimit_IMPL(struct OBJIOVASPACE *pVAS); - static inline NvU64 iovaspaceGetVaLimit_DISPATCH(struct OBJIOVASPACE *pVAS) { return pVAS->__iovaspaceGetVaLimit__(pVAS); } -NV_STATUS iovaspaceGetVasInfo_IMPL(struct OBJIOVASPACE *pVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams); - static inline NV_STATUS iovaspaceGetVasInfo_DISPATCH(struct OBJIOVASPACE *pVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) { return pVAS->__iovaspaceGetVasInfo__(pVAS, pParams); } -static inline NvBool iovaspaceIsMirrored_DISPATCH(struct OBJIOVASPACE *pVAS) { - return pVAS->__iovaspaceIsMirrored__(pVAS); -} - -static inline NvBool iovaspaceIsExternallyOwned_DISPATCH(struct OBJIOVASPACE *pVAS) { - return pVAS->__iovaspaceIsExternallyOwned__(pVAS); -} - static inline NvU32 iovaspaceGetFlags_DISPATCH(struct OBJIOVASPACE *pVAS) { return pVAS->__iovaspaceGetFlags__(pVAS); } -static inline NvBool iovaspaceIsAtsEnabled_DISPATCH(struct OBJIOVASPACE *pVAS) { - return pVAS->__iovaspaceIsAtsEnabled__(pVAS); -} - -static inline NvU64 iovaspaceGetBigPageSize_DISPATCH(struct OBJIOVASPACE *pVAS) { - return pVAS->__iovaspaceGetBigPageSize__(pVAS); +static inline NV_STATUS iovaspaceMap_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { + return pVAS->__iovaspaceMap__(pVAS, pGpu, vaLo, vaHi, pTarget, flags); } -static inline NV_STATUS iovaspaceGetPteInfo_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { - return pVAS->__iovaspaceGetPteInfo__(pVAS, pGpu, pParams, pPhysAddr); +static inline void iovaspaceUnmap_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { + pVAS->__iovaspaceUnmap__(pVAS, pGpu, vaLo, vaHi); } -static inline PMEMORY_DESCRIPTOR iovaspaceGetPageDirBase_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { - return pVAS->__iovaspaceGetPageDirBase__(pVAS, pGpu); +static inline NV_STATUS iovaspaceReserveMempool_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { + return pVAS->__iovaspaceReserveMempool__(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags); } -static inline PMEMORY_DESCRIPTOR iovaspaceGetKernelPageDirBase_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { - return pVAS->__iovaspaceGetKernelPageDirBase__(pVAS, pGpu); +static inline struct OBJEHEAP * iovaspaceGetHeap_DISPATCH(struct OBJIOVASPACE *pVAS) { + return pVAS->__iovaspaceGetHeap__(pVAS); } static inline NvU64 iovaspaceGetMapPageSize_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, struct EMEMBLOCK *pMemBlock) { return pVAS->__iovaspaceGetMapPageSize__(pVAS, pGpu, pMemBlock); } -static inline struct OBJEHEAP *iovaspaceGetHeap_DISPATCH(struct OBJIOVASPACE *pVAS) { - return pVAS->__iovaspaceGetHeap__(pVAS); +static inline NvU64 iovaspaceGetBigPageSize_DISPATCH(struct OBJIOVASPACE *pVAS) { + return pVAS->__iovaspaceGetBigPageSize__(pVAS); +} + +static inline NvBool iovaspaceIsMirrored_DISPATCH(struct OBJIOVASPACE *pVAS) { + return pVAS->__iovaspaceIsMirrored__(pVAS); } static inline NvBool iovaspaceIsFaultCapable_DISPATCH(struct OBJIOVASPACE *pVAS) { return pVAS->__iovaspaceIsFaultCapable__(pVAS); } -static inline void iovaspaceUnmap_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { - pVAS->__iovaspaceUnmap__(pVAS, pGpu, vaLo, vaHi); +static inline NvBool iovaspaceIsExternallyOwned_DISPATCH(struct OBJIOVASPACE *pVAS) { + return pVAS->__iovaspaceIsExternallyOwned__(pVAS); } -static inline void iovaspaceInvalidateTlb_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { - pVAS->__iovaspaceInvalidateTlb__(pVAS, pGpu, type); +static inline NvBool iovaspaceIsAtsEnabled_DISPATCH(struct OBJIOVASPACE *pVAS) { + return pVAS->__iovaspaceIsAtsEnabled__(pVAS); +} + +static inline NV_STATUS iovaspaceGetPasid_DISPATCH(struct OBJIOVASPACE *pVAS, NvU32 *pPasid) { + return pVAS->__iovaspaceGetPasid__(pVAS, pPasid); +} + +static inline PMEMORY_DESCRIPTOR iovaspaceGetPageDirBase_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { + return pVAS->__iovaspaceGetPageDirBase__(pVAS, pGpu); +} + +static inline PMEMORY_DESCRIPTOR iovaspaceGetKernelPageDirBase_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { + return pVAS->__iovaspaceGetKernelPageDirBase__(pVAS, pGpu); } static inline NV_STATUS iovaspacePinRootPageDir_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { @@ -348,6 +388,18 @@ static inline void iovaspaceUnpinRootPageDir_DISPATCH(struct OBJIOVASPACE *pVAS, pVAS->__iovaspaceUnpinRootPageDir__(pVAS, pGpu); } +static inline void iovaspaceInvalidateTlb_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { + pVAS->__iovaspaceInvalidateTlb__(pVAS, pGpu, type); +} + +static inline NV_STATUS iovaspaceGetPageTableInfo_DISPATCH(struct OBJIOVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { + return pVAS->__iovaspaceGetPageTableInfo__(pVAS, pParams); +} + +static inline NV_STATUS iovaspaceGetPteInfo_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { + return pVAS->__iovaspaceGetPteInfo__(pVAS, pGpu, pParams, pPhysAddr); +} + static inline NV_STATUS iovaspaceSetPteInfo_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { return pVAS->__iovaspaceSetPteInfo__(pVAS, pGpu, pParams); } @@ -356,21 +408,21 @@ static inline NV_STATUS iovaspaceFreeV2_DISPATCH(struct OBJIOVASPACE *pVAS, NvU6 return pVAS->__iovaspaceFreeV2__(pVAS, vAddr, pSize); } -static inline NV_STATUS iovaspaceGetPasid_DISPATCH(struct OBJIOVASPACE *pVAS, NvU32 *pPasid) { - return pVAS->__iovaspaceGetPasid__(pVAS, pPasid); -} +NV_STATUS iovaspaceConstruct__IMPL(struct OBJIOVASPACE *pVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags); -static inline NV_STATUS iovaspaceGetPageTableInfo_DISPATCH(struct OBJIOVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { - return pVAS->__iovaspaceGetPageTableInfo__(pVAS, pParams); -} +NV_STATUS iovaspaceAlloc_IMPL(struct OBJIOVASPACE *pVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSizeLockMask, VAS_ALLOC_FLAGS flags, NvU64 *pAddr); -static inline NV_STATUS iovaspaceReserveMempool_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { - return pVAS->__iovaspaceReserveMempool__(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags); -} +NV_STATUS iovaspaceFree_IMPL(struct OBJIOVASPACE *pVAS, NvU64 vAddr); -static inline NV_STATUS iovaspaceMap_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { - return pVAS->__iovaspaceMap__(pVAS, pGpu, vaLo, vaHi, pTarget, flags); -} +NV_STATUS iovaspaceApplyDefaultAlignment_IMPL(struct OBJIOVASPACE *pVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask); + +NV_STATUS iovaspaceIncAllocRefCnt_IMPL(struct OBJIOVASPACE *pVAS, NvU64 vAddr); + +NvU64 iovaspaceGetVaStart_IMPL(struct OBJIOVASPACE *pVAS); + +NvU64 iovaspaceGetVaLimit_IMPL(struct OBJIOVASPACE *pVAS); + +NV_STATUS iovaspaceGetVasInfo_IMPL(struct OBJIOVASPACE *pVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams); void iovaspaceDestruct_IMPL(struct OBJIOVASPACE *pIOVAS); diff --git a/src/nvidia/generated/g_ioaccess_nvoc.c b/src/nvidia/generated/g_ioaccess_nvoc.c index f7386e9ad9..134d2609f8 100644 --- a/src/nvidia/generated/g_ioaccess_nvoc.c +++ b/src/nvidia/generated/g_ioaccess_nvoc.c @@ -82,27 +82,40 @@ NV_STATUS __nvoc_ctor_RegisterAperture(RegisterAperture *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_RegisterAperture_1(RegisterAperture *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // regaprtReadReg08 -- pure virtual pThis->__regaprtReadReg08__ = NULL; + // regaprtReadReg16 -- pure virtual pThis->__regaprtReadReg16__ = NULL; + // regaprtReadReg32 -- pure virtual pThis->__regaprtReadReg32__ = NULL; + // regaprtWriteReg08 -- pure virtual pThis->__regaprtWriteReg08__ = NULL; + // regaprtWriteReg16 -- pure virtual pThis->__regaprtWriteReg16__ = NULL; + // regaprtWriteReg32 -- pure virtual pThis->__regaprtWriteReg32__ = NULL; + // regaprtWriteReg32Uc -- pure virtual pThis->__regaprtWriteReg32Uc__ = NULL; + // regaprtIsRegValid -- pure virtual pThis->__regaprtIsRegValid__ = NULL; -} +} // End __nvoc_init_funcTable_RegisterAperture_1 with approximately 8 basic block(s). + +// Initialize vtable(s) for 8 virtual method(s). void __nvoc_init_funcTable_RegisterAperture(RegisterAperture *pThis) { + + // Initialize vtable(s) with 8 per-object function pointer(s). __nvoc_init_funcTable_RegisterAperture_1(pThis); } diff --git a/src/nvidia/generated/g_ioaccess_nvoc.h b/src/nvidia/generated/g_ioaccess_nvoc.h index 51eaa3c4d2..48ee0277ca 100644 --- a/src/nvidia/generated/g_ioaccess_nvoc.h +++ b/src/nvidia/generated/g_ioaccess_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_IOACCESS_NVOC_H_ #define _G_IOACCESS_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ #if (defined(NVRM) || defined(RMCFG_FEATURE_PLATFORM_GSP)) && !defined(NVWATCH) +#pragma once #include "g_ioaccess_nvoc.h" #endif @@ -69,17 +77,24 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct RegisterAperture { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; - struct RegisterAperture *__nvoc_pbase_RegisterAperture; - NvU8 (*__regaprtReadReg08__)(struct RegisterAperture *, NvU32); - NvU16 (*__regaprtReadReg16__)(struct RegisterAperture *, NvU32); - NvU32 (*__regaprtReadReg32__)(struct RegisterAperture *, NvU32); - void (*__regaprtWriteReg08__)(struct RegisterAperture *, NvU32, NvV8); - void (*__regaprtWriteReg16__)(struct RegisterAperture *, NvU32, NvV16); - void (*__regaprtWriteReg32__)(struct RegisterAperture *, NvU32, NvV32); - void (*__regaprtWriteReg32Uc__)(struct RegisterAperture *, NvU32, NvV32); - NvBool (*__regaprtIsRegValid__)(struct RegisterAperture *, NvU32); + + // Ancestor object pointers for `staticCast` feature + struct RegisterAperture *__nvoc_pbase_RegisterAperture; // regaprt + + // Vtable with 8 per-object function pointers + NvU8 (*__regaprtReadReg08__)(struct RegisterAperture * /*this*/, NvU32); // pure virtual + NvU16 (*__regaprtReadReg16__)(struct RegisterAperture * /*this*/, NvU32); // pure virtual + NvU32 (*__regaprtReadReg32__)(struct RegisterAperture * /*this*/, NvU32); // pure virtual + void (*__regaprtWriteReg08__)(struct RegisterAperture * /*this*/, NvU32, NvV8); // pure virtual + void (*__regaprtWriteReg16__)(struct RegisterAperture * /*this*/, NvU32, NvV16); // pure virtual + void (*__regaprtWriteReg32__)(struct RegisterAperture * /*this*/, NvU32, NvV32); // pure virtual + void (*__regaprtWriteReg32Uc__)(struct RegisterAperture * /*this*/, NvU32, NvV32); // pure virtual + NvBool (*__regaprtIsRegValid__)(struct RegisterAperture * /*this*/, NvU32); // pure virtual }; #ifndef __NVOC_CLASS_RegisterAperture_TYPEDEF__ @@ -91,6 +106,7 @@ typedef struct RegisterAperture RegisterAperture; #define __nvoc_class_id_RegisterAperture 0xfcaf2e #endif /* __nvoc_class_id_RegisterAperture */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_RegisterAperture; #define __staticCast_RegisterAperture(pThis) \ @@ -103,21 +119,32 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_RegisterAperture; ((RegisterAperture*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(RegisterAperture))) #endif //__nvoc_ioaccess_h_disabled - NV_STATUS __nvoc_objCreateDynamic_RegisterAperture(RegisterAperture**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_RegisterAperture(RegisterAperture**, Dynamic*, NvU32); #define __objCreate_RegisterAperture(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_RegisterAperture((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define regaprtReadReg08_FNPTR(pAperture) pAperture->__regaprtReadReg08__ #define regaprtReadReg08(pAperture, addr) regaprtReadReg08_DISPATCH(pAperture, addr) +#define regaprtReadReg16_FNPTR(pAperture) pAperture->__regaprtReadReg16__ #define regaprtReadReg16(pAperture, addr) regaprtReadReg16_DISPATCH(pAperture, addr) +#define regaprtReadReg32_FNPTR(pAperture) pAperture->__regaprtReadReg32__ #define regaprtReadReg32(pAperture, addr) regaprtReadReg32_DISPATCH(pAperture, addr) +#define regaprtWriteReg08_FNPTR(pAperture) pAperture->__regaprtWriteReg08__ #define regaprtWriteReg08(pAperture, addr, value) regaprtWriteReg08_DISPATCH(pAperture, addr, value) +#define regaprtWriteReg16_FNPTR(pAperture) pAperture->__regaprtWriteReg16__ #define regaprtWriteReg16(pAperture, addr, value) regaprtWriteReg16_DISPATCH(pAperture, addr, value) +#define regaprtWriteReg32_FNPTR(pAperture) pAperture->__regaprtWriteReg32__ #define regaprtWriteReg32(pAperture, addr, value) regaprtWriteReg32_DISPATCH(pAperture, addr, value) +#define regaprtWriteReg32Uc_FNPTR(pAperture) pAperture->__regaprtWriteReg32Uc__ #define regaprtWriteReg32Uc(pAperture, addr, value) regaprtWriteReg32Uc_DISPATCH(pAperture, addr, value) +#define regaprtIsRegValid_FNPTR(pAperture) pAperture->__regaprtIsRegValid__ #define regaprtIsRegValid(pAperture, addr) regaprtIsRegValid_DISPATCH(pAperture, addr) + +// Dispatch functions static inline NvU8 regaprtReadReg08_DISPATCH(struct RegisterAperture *pAperture, NvU32 addr) { return pAperture->__regaprtReadReg08__(pAperture, addr); } diff --git a/src/nvidia/generated/g_journal_nvoc.c b/src/nvidia/generated/g_journal_nvoc.c index a4c15137af..a0f5512dcf 100644 --- a/src/nvidia/generated/g_journal_nvoc.c +++ b/src/nvidia/generated/g_journal_nvoc.c @@ -110,10 +110,13 @@ NV_STATUS __nvoc_ctor_OBJRCDB(OBJRCDB *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJRCDB_1(OBJRCDB *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_OBJRCDB_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_OBJRCDB(OBJRCDB *pThis) { __nvoc_init_funcTable_OBJRCDB_1(pThis); } diff --git a/src/nvidia/generated/g_journal_nvoc.h b/src/nvidia/generated/g_journal_nvoc.h index 944349ca1a..66263641e9 100644 --- a/src/nvidia/generated/g_journal_nvoc.h +++ b/src/nvidia/generated/g_journal_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_JOURNAL_NVOC_H_ #define _G_JOURNAL_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_journal_nvoc.h" #ifndef _JOURNAL_H_ @@ -192,15 +200,26 @@ typedef struct _nocatQueueDescriptor #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJRCDB { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; struct OBJTRACEABLE __nvoc_base_OBJTRACEABLE; - struct Object *__nvoc_pbase_Object; - struct OBJTRACEABLE *__nvoc_pbase_OBJTRACEABLE; - struct OBJRCDB *__nvoc_pbase_OBJRCDB; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct OBJTRACEABLE *__nvoc_pbase_OBJTRACEABLE; // traceable super + struct OBJRCDB *__nvoc_pbase_OBJRCDB; // rcdb + + // 2 PDB properties NvBool PDB_PROP_RCDB_COMPRESS; NvBool PDB_PROP_RCDB_IN_DEFERRED_DUMP_CODEPATH; + + // Data members SYS_ERROR_INFO ErrorInfo; EVENT_JOURNAL Journal; NvU32 BugcheckCount; @@ -229,6 +248,7 @@ typedef struct OBJRCDB OBJRCDB; #define __nvoc_class_id_OBJRCDB 0x15dec8 #endif /* __nvoc_class_id_OBJRCDB */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJRCDB; #define __staticCast_OBJRCDB(pThis) \ @@ -241,6 +261,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJRCDB; ((OBJRCDB*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJRCDB))) #endif //__nvoc_journal_h_disabled +// Property macros #define PDB_PROP_RCDB_IN_DEFERRED_DUMP_CODEPATH_BASE_CAST #define PDB_PROP_RCDB_IN_DEFERRED_DUMP_CODEPATH_BASE_NAME PDB_PROP_RCDB_IN_DEFERRED_DUMP_CODEPATH #define PDB_PROP_RCDB_COMPRESS_BASE_CAST @@ -252,6 +273,10 @@ NV_STATUS __nvoc_objCreate_OBJRCDB(OBJRCDB**, Dynamic*, NvU32); #define __objCreate_OBJRCDB(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJRCDB((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS rcdbConstruct_IMPL(struct OBJRCDB *arg_pRcdb); #define __nvoc_rcdbConstruct(arg_pRcdb) rcdbConstruct_IMPL(arg_pRcdb) @@ -280,15 +305,15 @@ static inline NV_STATUS rcdbClearErrorHistory(struct OBJRCDB *pRcdb) { #define rcdbClearErrorHistory(pRcdb) rcdbClearErrorHistory_IMPL(pRcdb) #endif //__nvoc_journal_h_disabled -NV_STATUS rcdbDeleteErrorElement_IMPL(struct OBJRCDB *pRcdb, void *arg0); +NV_STATUS rcdbDeleteErrorElement_IMPL(struct OBJRCDB *pRcdb, void *arg2); #ifdef __nvoc_journal_h_disabled -static inline NV_STATUS rcdbDeleteErrorElement(struct OBJRCDB *pRcdb, void *arg0) { +static inline NV_STATUS rcdbDeleteErrorElement(struct OBJRCDB *pRcdb, void *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJRCDB was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_journal_h_disabled -#define rcdbDeleteErrorElement(pRcdb, arg0) rcdbDeleteErrorElement_IMPL(pRcdb, arg0) +#define rcdbDeleteErrorElement(pRcdb, arg2) rcdbDeleteErrorElement_IMPL(pRcdb, arg2) #endif //__nvoc_journal_h_disabled void rcdbDestroyRingBufferCollection_IMPL(struct OBJRCDB *pRcdb); @@ -301,15 +326,15 @@ static inline void rcdbDestroyRingBufferCollection(struct OBJRCDB *pRcdb) { #define rcdbDestroyRingBufferCollection(pRcdb) rcdbDestroyRingBufferCollection_IMPL(pRcdb) #endif //__nvoc_journal_h_disabled -NV_STATUS rcdbAllocNextJournalRec_IMPL(struct OBJRCDB *pRcdb, NVCD_RECORD **arg0, NvU8 arg1, NvU8 arg2, NvU16 arg3); +NV_STATUS rcdbAllocNextJournalRec_IMPL(struct OBJRCDB *pRcdb, NVCD_RECORD **arg2, NvU8 arg3, NvU8 arg4, NvU16 arg5); #ifdef __nvoc_journal_h_disabled -static inline NV_STATUS rcdbAllocNextJournalRec(struct OBJRCDB *pRcdb, NVCD_RECORD **arg0, NvU8 arg1, NvU8 arg2, NvU16 arg3) { +static inline NV_STATUS rcdbAllocNextJournalRec(struct OBJRCDB *pRcdb, NVCD_RECORD **arg2, NvU8 arg3, NvU8 arg4, NvU16 arg5) { NV_ASSERT_FAILED_PRECOMP("OBJRCDB was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_journal_h_disabled -#define rcdbAllocNextJournalRec(pRcdb, arg0, arg1, arg2, arg3) rcdbAllocNextJournalRec_IMPL(pRcdb, arg0, arg1, arg2, arg3) +#define rcdbAllocNextJournalRec(pRcdb, arg2, arg3, arg4, arg5) rcdbAllocNextJournalRec_IMPL(pRcdb, arg2, arg3, arg4, arg5) #endif //__nvoc_journal_h_disabled NV_STATUS rcdbAddBugCheckRec_IMPL(struct OBJGPU *pGpu, struct OBJRCDB *pRcdb, NvU32 bugCheckCode); @@ -443,59 +468,59 @@ static inline NvU32 rcdbDumpErrorCounters(struct OBJRCDB *pRcDB, struct OBJGPU * #define rcdbDumpErrorCounters(pRcDB, pGpu, pPrbEnc) rcdbDumpErrorCounters_IMPL(pRcDB, pGpu, pPrbEnc) #endif //__nvoc_journal_h_disabled -NV_STATUS rcdbGetRcDiagRecBoundaries_IMPL(struct OBJRCDB *pRcdb, NvU16 *arg0, NvU16 *arg1, NvU32 arg2, NvU32 arg3); +NV_STATUS rcdbGetRcDiagRecBoundaries_IMPL(struct OBJRCDB *pRcdb, NvU16 *arg2, NvU16 *arg3, NvU32 arg4, NvU32 arg5); #ifdef __nvoc_journal_h_disabled -static inline NV_STATUS rcdbGetRcDiagRecBoundaries(struct OBJRCDB *pRcdb, NvU16 *arg0, NvU16 *arg1, NvU32 arg2, NvU32 arg3) { +static inline NV_STATUS rcdbGetRcDiagRecBoundaries(struct OBJRCDB *pRcdb, NvU16 *arg2, NvU16 *arg3, NvU32 arg4, NvU32 arg5) { NV_ASSERT_FAILED_PRECOMP("OBJRCDB was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_journal_h_disabled -#define rcdbGetRcDiagRecBoundaries(pRcdb, arg0, arg1, arg2, arg3) rcdbGetRcDiagRecBoundaries_IMPL(pRcdb, arg0, arg1, arg2, arg3) +#define rcdbGetRcDiagRecBoundaries(pRcdb, arg2, arg3, arg4, arg5) rcdbGetRcDiagRecBoundaries_IMPL(pRcdb, arg2, arg3, arg4, arg5) #endif //__nvoc_journal_h_disabled -RmRCCommonJournal_RECORD *rcdbAddRcDiagRec_IMPL(struct OBJGPU *pGpu, struct OBJRCDB *pRcdb, RmRcDiag_RECORD *arg0); +RmRCCommonJournal_RECORD *rcdbAddRcDiagRec_IMPL(struct OBJGPU *pGpu, struct OBJRCDB *pRcdb, RmRcDiag_RECORD *arg3); #ifdef __nvoc_journal_h_disabled -static inline RmRCCommonJournal_RECORD *rcdbAddRcDiagRec(struct OBJGPU *pGpu, struct OBJRCDB *pRcdb, RmRcDiag_RECORD *arg0) { +static inline RmRCCommonJournal_RECORD *rcdbAddRcDiagRec(struct OBJGPU *pGpu, struct OBJRCDB *pRcdb, RmRcDiag_RECORD *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJRCDB was disabled!"); return NULL; } #else //__nvoc_journal_h_disabled -#define rcdbAddRcDiagRec(pGpu, pRcdb, arg0) rcdbAddRcDiagRec_IMPL(pGpu, pRcdb, arg0) +#define rcdbAddRcDiagRec(pGpu, pRcdb, arg3) rcdbAddRcDiagRec_IMPL(pGpu, pRcdb, arg3) #endif //__nvoc_journal_h_disabled -RmRCCommonJournal_RECORD *rcdbAddRcDiagRecFromGsp_IMPL(struct OBJGPU *pGpu, struct OBJRCDB *pRcdb, RmRCCommonJournal_RECORD *arg0, RmRcDiag_RECORD *arg1); +RmRCCommonJournal_RECORD *rcdbAddRcDiagRecFromGsp_IMPL(struct OBJGPU *pGpu, struct OBJRCDB *pRcdb, RmRCCommonJournal_RECORD *arg3, RmRcDiag_RECORD *arg4); #ifdef __nvoc_journal_h_disabled -static inline RmRCCommonJournal_RECORD *rcdbAddRcDiagRecFromGsp(struct OBJGPU *pGpu, struct OBJRCDB *pRcdb, RmRCCommonJournal_RECORD *arg0, RmRcDiag_RECORD *arg1) { +static inline RmRCCommonJournal_RECORD *rcdbAddRcDiagRecFromGsp(struct OBJGPU *pGpu, struct OBJRCDB *pRcdb, RmRCCommonJournal_RECORD *arg3, RmRcDiag_RECORD *arg4) { NV_ASSERT_FAILED_PRECOMP("OBJRCDB was disabled!"); return NULL; } #else //__nvoc_journal_h_disabled -#define rcdbAddRcDiagRecFromGsp(pGpu, pRcdb, arg0, arg1) rcdbAddRcDiagRecFromGsp_IMPL(pGpu, pRcdb, arg0, arg1) +#define rcdbAddRcDiagRecFromGsp(pGpu, pRcdb, arg3, arg4) rcdbAddRcDiagRecFromGsp_IMPL(pGpu, pRcdb, arg3, arg4) #endif //__nvoc_journal_h_disabled -NV_STATUS rcdbGetRcDiagRec_IMPL(struct OBJRCDB *pRcdb, NvU16 arg0, RmRCCommonJournal_RECORD **arg1, NvU32 arg2, NvU32 arg3); +NV_STATUS rcdbGetRcDiagRec_IMPL(struct OBJRCDB *pRcdb, NvU16 arg2, RmRCCommonJournal_RECORD **arg3, NvU32 arg4, NvU32 arg5); #ifdef __nvoc_journal_h_disabled -static inline NV_STATUS rcdbGetRcDiagRec(struct OBJRCDB *pRcdb, NvU16 arg0, RmRCCommonJournal_RECORD **arg1, NvU32 arg2, NvU32 arg3) { +static inline NV_STATUS rcdbGetRcDiagRec(struct OBJRCDB *pRcdb, NvU16 arg2, RmRCCommonJournal_RECORD **arg3, NvU32 arg4, NvU32 arg5) { NV_ASSERT_FAILED_PRECOMP("OBJRCDB was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_journal_h_disabled -#define rcdbGetRcDiagRec(pRcdb, arg0, arg1, arg2, arg3) rcdbGetRcDiagRec_IMPL(pRcdb, arg0, arg1, arg2, arg3) +#define rcdbGetRcDiagRec(pRcdb, arg2, arg3, arg4, arg5) rcdbGetRcDiagRec_IMPL(pRcdb, arg2, arg3, arg4, arg5) #endif //__nvoc_journal_h_disabled -NV_STATUS rcdbUpdateRcDiagRecContext_IMPL(struct OBJRCDB *pRcdb, NvU16 arg0, NvU16 arg1, NvU32 arg2, NvU32 arg3); +NV_STATUS rcdbUpdateRcDiagRecContext_IMPL(struct OBJRCDB *pRcdb, NvU16 arg2, NvU16 arg3, NvU32 arg4, NvU32 arg5); #ifdef __nvoc_journal_h_disabled -static inline NV_STATUS rcdbUpdateRcDiagRecContext(struct OBJRCDB *pRcdb, NvU16 arg0, NvU16 arg1, NvU32 arg2, NvU32 arg3) { +static inline NV_STATUS rcdbUpdateRcDiagRecContext(struct OBJRCDB *pRcdb, NvU16 arg2, NvU16 arg3, NvU32 arg4, NvU32 arg5) { NV_ASSERT_FAILED_PRECOMP("OBJRCDB was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_journal_h_disabled -#define rcdbUpdateRcDiagRecContext(pRcdb, arg0, arg1, arg2, arg3) rcdbUpdateRcDiagRecContext_IMPL(pRcdb, arg0, arg1, arg2, arg3) +#define rcdbUpdateRcDiagRecContext(pRcdb, arg2, arg3, arg4, arg5) rcdbUpdateRcDiagRecContext_IMPL(pRcdb, arg2, arg3, arg4, arg5) #endif //__nvoc_journal_h_disabled void rcdbInitNocatGpuCache_IMPL(struct OBJGPU *pGpu); diff --git a/src/nvidia/generated/g_kern_bus_nvoc.c b/src/nvidia/generated/g_kern_bus_nvoc.c index 1d4f573b5f..20d841d38b 100644 --- a/src/nvidia/generated/g_kern_bus_nvoc.c +++ b/src/nvidia/generated/g_kern_bus_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelBus = /*pExportInfo=*/ &__nvoc_export_info_KernelBus }; -static NV_STATUS __nvoc_thunk_KernelBus_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, ENGDESCRIPTOR arg0) { - return kbusConstructEngine(pGpu, (struct KernelBus *)(((unsigned char *)pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg0); +// 10 down-thunk(s) defined to bridge methods in KernelBus from superclasses + +// kbusConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelBus_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, ENGDESCRIPTOR arg3) { + return kbusConstructEngine(pGpu, (struct KernelBus *)(((unsigned char *) pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelBus_engstateStatePreInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus) { - return kbusStatePreInitLocked(pGpu, (struct KernelBus *)(((unsigned char *)pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); +// kbusStatePreInitLocked: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_KernelBus_engstateStatePreInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus) { + return kbusStatePreInitLocked(pGpu, (struct KernelBus *)(((unsigned char *) pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_KernelBus_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus) { - return kbusStateInitLocked(pGpu, (struct KernelBus *)(((unsigned char *)pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); +// kbusStateInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelBus_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus) { + return kbusStateInitLocked(pGpu, (struct KernelBus *)(((unsigned char *) pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_KernelBus_engstateStatePreLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg0) { - return kbusStatePreLoad(pGpu, (struct KernelBus *)(((unsigned char *)pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg0); +// kbusStatePreLoad: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_KernelBus_engstateStatePreLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg3) { + return kbusStatePreLoad(pGpu, (struct KernelBus *)(((unsigned char *) pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelBus_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg0) { - return kbusStateLoad(pGpu, (struct KernelBus *)(((unsigned char *)pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg0); +// kbusStateLoad: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_KernelBus_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg3) { + return kbusStateLoad(pGpu, (struct KernelBus *)(((unsigned char *) pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelBus_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg0) { - return kbusStatePostLoad(pGpu, (struct KernelBus *)(((unsigned char *)pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg0); +// kbusStatePostLoad: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_KernelBus_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg3) { + return kbusStatePostLoad(pGpu, (struct KernelBus *)(((unsigned char *) pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelBus_engstateStatePreUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg0) { - return kbusStatePreUnload(pGpu, (struct KernelBus *)(((unsigned char *)pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg0); +// kbusStatePreUnload: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_KernelBus_engstateStatePreUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg3) { + return kbusStatePreUnload(pGpu, (struct KernelBus *)(((unsigned char *) pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelBus_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 flags) { - return kbusStateUnload(pGpu, (struct KernelBus *)(((unsigned char *)pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), flags); +// kbusStateUnload: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_KernelBus_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 flags) { + return kbusStateUnload(pGpu, (struct KernelBus *)(((unsigned char *) pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), flags); } -static NV_STATUS __nvoc_thunk_KernelBus_engstateStatePostUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 flags) { - return kbusStatePostUnload(pGpu, (struct KernelBus *)(((unsigned char *)pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), flags); +// kbusStatePostUnload: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_KernelBus_engstateStatePostUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 flags) { + return kbusStatePostUnload(pGpu, (struct KernelBus *)(((unsigned char *) pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), flags); } -static void __nvoc_thunk_KernelBus_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus) { - kbusStateDestroy(pGpu, (struct KernelBus *)(((unsigned char *)pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); +// kbusStateDestroy: virtual halified (singleton optimized) override (engstate) base (engstate) +static void __nvoc_down_thunk_KernelBus_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus) { + kbusStateDestroy(pGpu, (struct KernelBus *)(((unsigned char *) pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kbusStateInitUnlocked(POBJGPU pGpu, struct KernelBus *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); + +// 4 up-thunk(s) defined to bridge methods in KernelBus to superclasses + +// kbusInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kbusInitMissing(POBJGPU pGpu, struct KernelBus *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_kbusInitMissing(POBJGPU pGpu, struct KernelBus *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); +// kbusStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbusStatePreInitUnlocked(POBJGPU pGpu, struct KernelBus *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kbusStatePreInitUnlocked(POBJGPU pGpu, struct KernelBus *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); +// kbusStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbusStateInitUnlocked(POBJGPU pGpu, struct KernelBus *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); } -static NvBool __nvoc_thunk_OBJENGSTATE_kbusIsPresent(POBJGPU pGpu, struct KernelBus *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); +// kbusIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_kbusIsPresent(POBJGPU pGpu, struct KernelBus *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelBus = { /*numEntries=*/ 0, @@ -242,6 +262,7 @@ NV_STATUS __nvoc_ctor_KernelBus(KernelBus *pThis, RmHalspecOwner *pRmhalspecowne return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -254,45 +275,67 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // Hal function -- kbusInitBarsSize + // kbusInitBarsSize -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__kbusInitBarsSize__ = &kbusInitBarsSize_VGPUSTUB; + pThis->__kbusInitBarsSize__ = &kbusInitBarsSize_VF; } else { pThis->__kbusInitBarsSize__ = &kbusInitBarsSize_KERNEL; } + // kbusConstructEngine -- virtual override (engstate) base (engstate) pThis->__kbusConstructEngine__ = &kbusConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelBus_engstateConstructEngine; - // Hal function -- kbusStatePreInitLocked + // kbusStatePreInitLocked -- virtual halified (singleton optimized) override (engstate) base (engstate) body pThis->__kbusStatePreInitLocked__ = &kbusStatePreInitLocked_GM107; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_KernelBus_engstateStatePreInitLocked; + // kbusStateInitLocked -- virtual override (engstate) base (engstate) pThis->__kbusStateInitLocked__ = &kbusStateInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelBus_engstateStateInitLocked; - // Hal function -- kbusStatePreLoad + // kbusStatePreLoad -- virtual halified (singleton optimized) override (engstate) base (engstate) body pThis->__kbusStatePreLoad__ = &kbusStatePreLoad_GM107; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ = &__nvoc_down_thunk_KernelBus_engstateStatePreLoad; - // Hal function -- kbusStateLoad + // kbusStateLoad -- virtual halified (singleton optimized) override (engstate) base (engstate) body pThis->__kbusStateLoad__ = &kbusStateLoad_GM107; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelBus_engstateStateLoad; - // Hal function -- kbusStatePostLoad + // kbusStatePostLoad -- virtual halified (singleton optimized) override (engstate) base (engstate) body pThis->__kbusStatePostLoad__ = &kbusStatePostLoad_GM107; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelBus_engstateStatePostLoad; - // Hal function -- kbusStatePreUnload + // kbusStatePreUnload -- virtual halified (singleton optimized) override (engstate) base (engstate) body pThis->__kbusStatePreUnload__ = &kbusStatePreUnload_GM107; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_KernelBus_engstateStatePreUnload; - // Hal function -- kbusStateUnload + // kbusStateUnload -- virtual halified (singleton optimized) override (engstate) base (engstate) body pThis->__kbusStateUnload__ = &kbusStateUnload_GM107; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelBus_engstateStateUnload; - // Hal function -- kbusStatePostUnload + // kbusStatePostUnload -- virtual halified (singleton optimized) override (engstate) base (engstate) body pThis->__kbusStatePostUnload__ = &kbusStatePostUnload_GM107; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ = &__nvoc_down_thunk_KernelBus_engstateStatePostUnload; - // Hal function -- kbusStateDestroy + // kbusStateDestroy -- virtual halified (singleton optimized) override (engstate) base (engstate) pThis->__kbusStateDestroy__ = &kbusStateDestroy_GM107; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelBus_engstateStateDestroy; + + // kbusBar2IsReady -- halified (2 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__kbusBar2IsReady__ = &kbusBar2IsReady_VBAR2_SRIOV; + } + else + { + pThis->__kbusBar2IsReady__ = &kbusBar2IsReady_VBAR2; + } - // Hal function -- kbusMapBar2Aperture + // kbusMapBar2Aperture -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusMapBar2Aperture__ = &kbusMapBar2Aperture_VBAR2_SRIOV; @@ -302,7 +345,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusMapBar2Aperture__ = &kbusMapBar2Aperture_VBAR2; } - // Hal function -- kbusValidateBar2ApertureMapping + // kbusValidateBar2ApertureMapping -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusValidateBar2ApertureMapping__ = &kbusValidateBar2ApertureMapping_VBAR2_SRIOV; @@ -312,7 +355,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusValidateBar2ApertureMapping__ = &kbusValidateBar2ApertureMapping_VBAR2; } - // Hal function -- kbusUnmapBar2ApertureWithFlags + // kbusUnmapBar2ApertureWithFlags -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusUnmapBar2ApertureWithFlags__ = &kbusUnmapBar2ApertureWithFlags_VBAR2_SRIOV; @@ -322,7 +365,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusUnmapBar2ApertureWithFlags__ = &kbusUnmapBar2ApertureWithFlags_VBAR2; } - // Hal function -- kbusGetVaLimitForBar2 + // kbusGetVaLimitForBar2 -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusGetVaLimitForBar2__ = &kbusGetVaLimitForBar2_IMPL; @@ -332,7 +375,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusGetVaLimitForBar2__ = &kbusGetVaLimitForBar2_FWCLIENT; } - // Hal function -- kbusCalcCpuInvisibleBar2Range + // kbusCalcCpuInvisibleBar2Range -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusCalcCpuInvisibleBar2Range__ = &kbusCalcCpuInvisibleBar2Range_GP100; @@ -342,7 +385,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusCalcCpuInvisibleBar2Range__ = &kbusCalcCpuInvisibleBar2Range_f2d351; } - // Hal function -- kbusCalcCpuInvisibleBar2ApertureSize + // kbusCalcCpuInvisibleBar2ApertureSize -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusCalcCpuInvisibleBar2ApertureSize__ = &kbusCalcCpuInvisibleBar2ApertureSize_GV100; @@ -352,7 +395,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusCalcCpuInvisibleBar2ApertureSize__ = &kbusCalcCpuInvisibleBar2ApertureSize_13cd8d; } - // Hal function -- kbusCommitBar2 + // kbusCommitBar2 -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusCommitBar2__ = &kbusCommitBar2_GM107; @@ -362,7 +405,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusCommitBar2__ = &kbusCommitBar2_KERNEL; } - // Hal function -- kbusRewritePTEsForExistingMapping + // kbusRewritePTEsForExistingMapping -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusRewritePTEsForExistingMapping__ = &kbusRewritePTEsForExistingMapping_VBAR2; @@ -372,7 +415,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusRewritePTEsForExistingMapping__ = &kbusRewritePTEsForExistingMapping_92bfc3; } - // Hal function -- kbusPatchBar1Pdb + // kbusPatchBar1Pdb -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusPatchBar1Pdb__ = &kbusPatchBar1Pdb_56cd7a; @@ -382,7 +425,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusPatchBar1Pdb__ = &kbusPatchBar1Pdb_GSPCLIENT; } - // Hal function -- kbusPatchBar2Pdb + // kbusPatchBar2Pdb -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusPatchBar2Pdb__ = &kbusPatchBar2Pdb_56cd7a; @@ -392,7 +435,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusPatchBar2Pdb__ = &kbusPatchBar2Pdb_GSPCLIENT; } - // Hal function -- kbusConstructVirtualBar2CpuInvisibleHeap + // kbusConstructVirtualBar2CpuInvisibleHeap -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusConstructVirtualBar2CpuInvisibleHeap__ = &kbusConstructVirtualBar2CpuInvisibleHeap_VBAR2; @@ -402,7 +445,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusConstructVirtualBar2CpuInvisibleHeap__ = &kbusConstructVirtualBar2CpuInvisibleHeap_56cd7a; } - // Hal function -- kbusMapCpuInvisibleBar2Aperture + // kbusMapCpuInvisibleBar2Aperture -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusMapCpuInvisibleBar2Aperture__ = &kbusMapCpuInvisibleBar2Aperture_VBAR2; @@ -412,7 +455,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusMapCpuInvisibleBar2Aperture__ = &kbusMapCpuInvisibleBar2Aperture_46f6a7; } - // Hal function -- kbusUnmapCpuInvisibleBar2Aperture + // kbusUnmapCpuInvisibleBar2Aperture -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusUnmapCpuInvisibleBar2Aperture__ = &kbusUnmapCpuInvisibleBar2Aperture_VBAR2; @@ -422,7 +465,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusUnmapCpuInvisibleBar2Aperture__ = &kbusUnmapCpuInvisibleBar2Aperture_b3696a; } - // Hal function -- kbusTeardownBar2CpuAperture + // kbusTeardownBar2CpuAperture -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusTeardownBar2CpuAperture__ = &kbusTeardownBar2CpuAperture_GH100; @@ -432,7 +475,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusTeardownBar2CpuAperture__ = &kbusTeardownBar2CpuAperture_GM107; } - // Hal function -- kbusGetP2PMailboxAttributes + // kbusGetP2PMailboxAttributes -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusGetP2PMailboxAttributes__ = &kbusGetP2PMailboxAttributes_GH100; @@ -442,7 +485,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusGetP2PMailboxAttributes__ = &kbusGetP2PMailboxAttributes_GM200; } - // Hal function -- kbusCreateP2PMapping + // kbusCreateP2PMapping -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusCreateP2PMapping__ = &kbusCreateP2PMapping_GH100; @@ -452,7 +495,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusCreateP2PMapping__ = &kbusCreateP2PMapping_GP100; } - // Hal function -- kbusRemoveP2PMapping + // kbusRemoveP2PMapping -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusRemoveP2PMapping__ = &kbusRemoveP2PMapping_GH100; @@ -462,7 +505,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusRemoveP2PMapping__ = &kbusRemoveP2PMapping_GP100; } - // Hal function -- kbusGetEgmPeerId + // kbusGetEgmPeerId -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusGetEgmPeerId__ = &kbusGetEgmPeerId_GH100; @@ -473,7 +516,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusGetEgmPeerId__ = &kbusGetEgmPeerId_56cd7a; } - // Hal function -- kbusGetPeerId + // kbusGetPeerId -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusGetPeerId__ = &kbusGetPeerId_GH100; @@ -483,7 +526,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusGetPeerId__ = &kbusGetPeerId_GP100; } - // Hal function -- kbusGetNvlinkPeerId + // kbusGetNvlinkPeerId -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ @@ -502,7 +545,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusGetNvlinkPeerId__ = &kbusGetNvlinkPeerId_c732fb; } - // Hal function -- kbusGetNvSwitchPeerId + // kbusGetNvSwitchPeerId -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ { pThis->__kbusGetNvSwitchPeerId__ = &kbusGetNvSwitchPeerId_GA100; @@ -513,7 +556,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusGetNvSwitchPeerId__ = &kbusGetNvSwitchPeerId_c732fb; } - // Hal function -- kbusGetUnusedPciePeerId + // kbusGetUnusedPciePeerId -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kbusGetUnusedPciePeerId__ = &kbusGetUnusedPciePeerId_TU102; @@ -523,7 +566,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusGetUnusedPciePeerId__ = &kbusGetUnusedPciePeerId_GM107; } - // Hal function -- kbusIsPeerIdValid + // kbusIsPeerIdValid -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusIsPeerIdValid__ = &kbusIsPeerIdValid_GH100; @@ -533,7 +576,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusIsPeerIdValid__ = &kbusIsPeerIdValid_GP100; } - // Hal function -- kbusGetNvlinkP2PPeerId + // kbusGetNvlinkP2PPeerId -- halified (4 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusGetNvlinkP2PPeerId__ = &kbusGetNvlinkP2PPeerId_VGPU; @@ -554,7 +597,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * } } - // Hal function -- kbusWriteP2PWmbTag + // kbusWriteP2PWmbTag -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusWriteP2PWmbTag__ = &kbusWriteP2PWmbTag_GH100; @@ -564,7 +607,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusWriteP2PWmbTag__ = &kbusWriteP2PWmbTag_GM200; } - // Hal function -- kbusSetupP2PDomainAccess + // kbusSetupP2PDomainAccess -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusSetupP2PDomainAccess__ = &kbusSetupP2PDomainAccess_GH100; @@ -574,7 +617,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusSetupP2PDomainAccess__ = &kbusSetupP2PDomainAccess_GM200; } - // Hal function -- kbusNeedWarForBug999673 + // kbusNeedWarForBug999673 -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusNeedWarForBug999673__ = &kbusNeedWarForBug999673_491d52; @@ -584,7 +627,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusNeedWarForBug999673__ = &kbusNeedWarForBug999673_GM200; } - // Hal function -- kbusCreateP2PMappingForC2C + // kbusCreateP2PMappingForC2C -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusCreateP2PMappingForC2C__ = &kbusCreateP2PMappingForC2C_GH100; @@ -595,7 +638,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusCreateP2PMappingForC2C__ = &kbusCreateP2PMappingForC2C_46f6a7; } - // Hal function -- kbusRemoveP2PMappingForC2C + // kbusRemoveP2PMappingForC2C -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusRemoveP2PMappingForC2C__ = &kbusRemoveP2PMappingForC2C_GH100; @@ -606,7 +649,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusRemoveP2PMappingForC2C__ = &kbusRemoveP2PMappingForC2C_46f6a7; } - // Hal function -- kbusUnreserveP2PPeerIds + // kbusUnreserveP2PPeerIds -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kbusUnreserveP2PPeerIds__ = &kbusUnreserveP2PPeerIds_46f6a7; @@ -616,7 +659,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusUnreserveP2PPeerIds__ = &kbusUnreserveP2PPeerIds_GP100; } - // Hal function -- kbusIsBar1P2PCapable + // kbusIsBar1P2PCapable -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusIsBar1P2PCapable__ = &kbusIsBar1P2PCapable_GH100; @@ -627,7 +670,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusIsBar1P2PCapable__ = &kbusIsBar1P2PCapable_bf6dfa; } - // Hal function -- kbusEnableStaticBar1Mapping + // kbusEnableStaticBar1Mapping -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusEnableStaticBar1Mapping__ = &kbusEnableStaticBar1Mapping_GH100; @@ -638,7 +681,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusEnableStaticBar1Mapping__ = &kbusEnableStaticBar1Mapping_395e98; } - // Hal function -- kbusDisableStaticBar1Mapping + // kbusDisableStaticBar1Mapping -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusDisableStaticBar1Mapping__ = &kbusDisableStaticBar1Mapping_GH100; @@ -649,7 +692,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusDisableStaticBar1Mapping__ = &kbusDisableStaticBar1Mapping_d44104; } - // Hal function -- kbusGetBar1P2PDmaInfo + // kbusGetBar1P2PDmaInfo -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusGetBar1P2PDmaInfo__ = &kbusGetBar1P2PDmaInfo_GH100; @@ -660,7 +703,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusGetBar1P2PDmaInfo__ = &kbusGetBar1P2PDmaInfo_395e98; } - // Hal function -- kbusUpdateStaticBar1VAMapping + // kbusUpdateStaticBar1VAMapping -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusUpdateStaticBar1VAMapping__ = &kbusUpdateStaticBar1VAMapping_GH100; @@ -671,7 +714,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusUpdateStaticBar1VAMapping__ = &kbusUpdateStaticBar1VAMapping_395e98; } - // Hal function -- kbusGetStaticFbAperture + // kbusGetStaticFbAperture -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusGetStaticFbAperture__ = &kbusGetStaticFbAperture_GH100; @@ -682,7 +725,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusGetStaticFbAperture__ = &kbusGetStaticFbAperture_395e98; } - // Hal function -- kbusCreateP2PMappingForBar1P2P + // kbusCreateP2PMappingForBar1P2P -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusCreateP2PMappingForBar1P2P__ = &kbusCreateP2PMappingForBar1P2P_GH100; @@ -693,7 +736,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusCreateP2PMappingForBar1P2P__ = &kbusCreateP2PMappingForBar1P2P_395e98; } - // Hal function -- kbusRemoveP2PMappingForBar1P2P + // kbusRemoveP2PMappingForBar1P2P -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusRemoveP2PMappingForBar1P2P__ = &kbusRemoveP2PMappingForBar1P2P_GH100; @@ -704,7 +747,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusRemoveP2PMappingForBar1P2P__ = &kbusRemoveP2PMappingForBar1P2P_395e98; } - // Hal function -- kbusHasPcieBar1P2PMapping + // kbusHasPcieBar1P2PMapping -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusHasPcieBar1P2PMapping__ = &kbusHasPcieBar1P2PMapping_GH100; @@ -715,7 +758,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusHasPcieBar1P2PMapping__ = &kbusHasPcieBar1P2PMapping_bf6dfa; } - // Hal function -- kbusIsPcieBar1P2PMappingSupported + // kbusIsPcieBar1P2PMappingSupported -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusIsPcieBar1P2PMappingSupported__ = &kbusIsPcieBar1P2PMappingSupported_GH100; @@ -726,7 +769,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusIsPcieBar1P2PMappingSupported__ = &kbusIsPcieBar1P2PMappingSupported_bf6dfa; } - // Hal function -- kbusCheckFlaSupportedAndInit + // kbusCheckFlaSupportedAndInit -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ { pThis->__kbusCheckFlaSupportedAndInit__ = &kbusCheckFlaSupportedAndInit_GA100; @@ -736,7 +779,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusCheckFlaSupportedAndInit__ = &kbusCheckFlaSupportedAndInit_ac1694; } - // Hal function -- kbusDetermineFlaRangeAndAllocate + // kbusDetermineFlaRangeAndAllocate -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__kbusDetermineFlaRangeAndAllocate__ = &kbusDetermineFlaRangeAndAllocate_GA100; @@ -751,7 +794,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusDetermineFlaRangeAndAllocate__ = &kbusDetermineFlaRangeAndAllocate_395e98; } - // Hal function -- kbusAllocateFlaVaspace + // kbusAllocateFlaVaspace -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__kbusAllocateFlaVaspace__ = &kbusAllocateFlaVaspace_GA100; @@ -766,7 +809,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusAllocateFlaVaspace__ = &kbusAllocateFlaVaspace_395e98; } - // Hal function -- kbusGetFlaRange + // kbusGetFlaRange -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__kbusGetFlaRange__ = &kbusGetFlaRange_GA100; @@ -781,7 +824,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusGetFlaRange__ = &kbusGetFlaRange_395e98; } - // Hal function -- kbusAllocateLegacyFlaVaspace + // kbusAllocateLegacyFlaVaspace -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ { pThis->__kbusAllocateLegacyFlaVaspace__ = &kbusAllocateLegacyFlaVaspace_GA100; @@ -791,7 +834,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusAllocateLegacyFlaVaspace__ = &kbusAllocateLegacyFlaVaspace_395e98; } - // Hal function -- kbusAllocateHostManagedFlaVaspace + // kbusAllocateHostManagedFlaVaspace -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ { pThis->__kbusAllocateHostManagedFlaVaspace__ = &kbusAllocateHostManagedFlaVaspace_GA100; @@ -801,7 +844,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusAllocateHostManagedFlaVaspace__ = &kbusAllocateHostManagedFlaVaspace_395e98; } - // Hal function -- kbusDestroyFla + // kbusDestroyFla -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__kbusDestroyFla__ = &kbusDestroyFla_GA100; @@ -816,7 +859,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusDestroyFla__ = &kbusDestroyFla_d44104; } - // Hal function -- kbusGetFlaVaspace + // kbusGetFlaVaspace -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ { pThis->__kbusGetFlaVaspace__ = &kbusGetFlaVaspace_GA100; @@ -826,7 +869,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusGetFlaVaspace__ = &kbusGetFlaVaspace_395e98; } - // Hal function -- kbusDestroyHostManagedFlaVaspace + // kbusDestroyHostManagedFlaVaspace -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ { pThis->__kbusDestroyHostManagedFlaVaspace__ = &kbusDestroyHostManagedFlaVaspace_GA100; @@ -836,7 +879,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusDestroyHostManagedFlaVaspace__ = &kbusDestroyHostManagedFlaVaspace_d44104; } - // Hal function -- kbusVerifyFlaRange + // kbusVerifyFlaRange -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ { pThis->__kbusVerifyFlaRange__ = &kbusVerifyFlaRange_GA100; @@ -846,7 +889,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusVerifyFlaRange__ = &kbusVerifyFlaRange_bf6dfa; } - // Hal function -- kbusConstructFlaInstBlk + // kbusConstructFlaInstBlk -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ { pThis->__kbusConstructFlaInstBlk__ = &kbusConstructFlaInstBlk_GA100; @@ -856,7 +899,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusConstructFlaInstBlk__ = &kbusConstructFlaInstBlk_395e98; } - // Hal function -- kbusDestructFlaInstBlk + // kbusDestructFlaInstBlk -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ { pThis->__kbusDestructFlaInstBlk__ = &kbusDestructFlaInstBlk_GA100; @@ -866,7 +909,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusDestructFlaInstBlk__ = &kbusDestructFlaInstBlk_d44104; } - // Hal function -- kbusValidateFlaBaseAddress + // kbusValidateFlaBaseAddress -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ { pThis->__kbusValidateFlaBaseAddress__ = &kbusValidateFlaBaseAddress_GA100; @@ -876,7 +919,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusValidateFlaBaseAddress__ = &kbusValidateFlaBaseAddress_395e98; } - // Hal function -- kbusSetupUnbindFla + // kbusSetupUnbindFla -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__kbusSetupUnbindFla__ = &kbusSetupUnbindFla_GA100; @@ -890,7 +933,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusSetupUnbindFla__ = &kbusSetupUnbindFla_46f6a7; } - // Hal function -- kbusSetupBindFla + // kbusSetupBindFla -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__kbusSetupBindFla__ = &kbusSetupBindFla_GA100; @@ -904,7 +947,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusSetupBindFla__ = &kbusSetupBindFla_46f6a7; } - // Hal function -- kbusSendSysmembarSingle + // kbusSendSysmembarSingle -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusSendSysmembarSingle__ = &kbusSendSysmembarSingle_56cd7a; @@ -914,7 +957,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusSendSysmembarSingle__ = &kbusSendSysmembarSingle_KERNEL; } - // Hal function -- kbusCacheBAR1ResizeSize_WAR_BUG_3249028 + // kbusCacheBAR1ResizeSize_WAR_BUG_3249028 -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusCacheBAR1ResizeSize_WAR_BUG_3249028__ = &kbusCacheBAR1ResizeSize_WAR_BUG_3249028_GH100; @@ -928,7 +971,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusCacheBAR1ResizeSize_WAR_BUG_3249028__ = &kbusCacheBAR1ResizeSize_WAR_BUG_3249028_GA100; } - // Hal function -- kbusRestoreBAR1ResizeSize_WAR_BUG_3249028 + // kbusRestoreBAR1ResizeSize_WAR_BUG_3249028 -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusRestoreBAR1ResizeSize_WAR_BUG_3249028__ = &kbusRestoreBAR1ResizeSize_WAR_BUG_3249028_GH100; @@ -942,7 +985,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusRestoreBAR1ResizeSize_WAR_BUG_3249028__ = &kbusRestoreBAR1ResizeSize_WAR_BUG_3249028_GA100; } - // Hal function -- kbusIsDirectMappingAllowed + // kbusIsDirectMappingAllowed -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kbusIsDirectMappingAllowed__ = &kbusIsDirectMappingAllowed_GM107; @@ -952,7 +995,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusIsDirectMappingAllowed__ = &kbusIsDirectMappingAllowed_GA100; } - // Hal function -- kbusUseDirectSysmemMap + // kbusUseDirectSysmemMap -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kbusUseDirectSysmemMap__ = &kbusUseDirectSysmemMap_GM107; @@ -962,7 +1005,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusUseDirectSysmemMap__ = &kbusUseDirectSysmemMap_GA100; } - // Hal function -- kbusMemCopyBar0Window + // kbusMemCopyBar0Window -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusMemCopyBar0Window__ = &kbusMemCopyBar0Window_46f6a7; @@ -972,7 +1015,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusMemCopyBar0Window__ = &kbusMemCopyBar0Window_GM107; } - // Hal function -- kbusWriteBAR0WindowBase + // kbusWriteBAR0WindowBase -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusWriteBAR0WindowBase__ = &kbusWriteBAR0WindowBase_GH100; @@ -982,7 +1025,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusWriteBAR0WindowBase__ = &kbusWriteBAR0WindowBase_395e98; } - // Hal function -- kbusReadBAR0WindowBase + // kbusReadBAR0WindowBase -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusReadBAR0WindowBase__ = &kbusReadBAR0WindowBase_GH100; @@ -992,7 +1035,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusReadBAR0WindowBase__ = &kbusReadBAR0WindowBase_13cd8d; } - // Hal function -- kbusValidateBAR0WindowBase + // kbusValidateBAR0WindowBase -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusValidateBAR0WindowBase__ = &kbusValidateBAR0WindowBase_GH100; @@ -1002,7 +1045,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusValidateBAR0WindowBase__ = &kbusValidateBAR0WindowBase_ceaee8; } - // Hal function -- kbusSetBAR0WindowVidOffset + // kbusSetBAR0WindowVidOffset -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusSetBAR0WindowVidOffset__ = &kbusSetBAR0WindowVidOffset_56cd7a; @@ -1019,7 +1062,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * } } - // Hal function -- kbusGetBAR0WindowVidOffset + // kbusGetBAR0WindowVidOffset -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusGetBAR0WindowVidOffset__ = &kbusGetBAR0WindowVidOffset_GH100; @@ -1029,7 +1072,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusGetBAR0WindowVidOffset__ = &kbusGetBAR0WindowVidOffset_GM107; } - // Hal function -- kbusSetupBar0WindowBeforeBar2Bootstrap + // kbusSetupBar0WindowBeforeBar2Bootstrap -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusSetupBar0WindowBeforeBar2Bootstrap__ = &kbusSetupBar0WindowBeforeBar2Bootstrap_56cd7a; @@ -1039,7 +1082,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusSetupBar0WindowBeforeBar2Bootstrap__ = &kbusSetupBar0WindowBeforeBar2Bootstrap_GM107; } - // Hal function -- kbusRestoreBar0WindowAfterBar2Bootstrap + // kbusRestoreBar0WindowAfterBar2Bootstrap -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusRestoreBar0WindowAfterBar2Bootstrap__ = &kbusRestoreBar0WindowAfterBar2Bootstrap_b3696a; @@ -1049,7 +1092,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusRestoreBar0WindowAfterBar2Bootstrap__ = &kbusRestoreBar0WindowAfterBar2Bootstrap_GM107; } - // Hal function -- kbusVerifyBar2 + // kbusVerifyBar2 -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusVerifyBar2__ = &kbusVerifyBar2_56cd7a; @@ -1066,17 +1109,17 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * } } - // Hal function -- kbusBar2BootStrapInPhysicalMode + // kbusBar2BootStrapInPhysicalMode -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__kbusBar2BootStrapInPhysicalMode__ = &kbusBar2BootStrapInPhysicalMode_VGPUSTUB; + pThis->__kbusBar2BootStrapInPhysicalMode__ = &kbusBar2BootStrapInPhysicalMode_VF; } else { pThis->__kbusBar2BootStrapInPhysicalMode__ = &kbusBar2BootStrapInPhysicalMode_56cd7a; } - // Hal function -- kbusBindBar2 + // kbusBindBar2 -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ @@ -1093,7 +1136,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusBindBar2__ = &kbusBindBar2_5baef9; } - // Hal function -- kbusInstBlkWriteAddrLimit + // kbusInstBlkWriteAddrLimit -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ @@ -1110,7 +1153,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusInstBlkWriteAddrLimit__ = &kbusInstBlkWriteAddrLimit_f2d351; } - // Hal function -- kbusInitInstBlk + // kbusInitInstBlk -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusInitInstBlk__ = &kbusInitInstBlk_GP100; @@ -1120,7 +1163,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusInitInstBlk__ = &kbusInitInstBlk_ac1694; } - // Hal function -- kbusBar2InstBlkWrite + // kbusBar2InstBlkWrite -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusBar2InstBlkWrite__ = &kbusBar2InstBlkWrite_GP100; @@ -1130,7 +1173,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusBar2InstBlkWrite__ = &kbusBar2InstBlkWrite_d44104; } - // Hal function -- kbusSetupBar2PageTablesAtBottomOfFb + // kbusSetupBar2PageTablesAtBottomOfFb -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusSetupBar2PageTablesAtBottomOfFb__ = &kbusSetupBar2PageTablesAtBottomOfFb_GM107; @@ -1140,7 +1183,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusSetupBar2PageTablesAtBottomOfFb__ = &kbusSetupBar2PageTablesAtBottomOfFb_22ba1e; } - // Hal function -- kbusTeardownBar2PageTablesAtBottomOfFb + // kbusTeardownBar2PageTablesAtBottomOfFb -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusTeardownBar2PageTablesAtBottomOfFb__ = &kbusTeardownBar2PageTablesAtBottomOfFb_GM107; @@ -1150,7 +1193,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusTeardownBar2PageTablesAtBottomOfFb__ = &kbusTeardownBar2PageTablesAtBottomOfFb_566dba; } - // Hal function -- kbusSetupBar2InstBlkAtBottomOfFb + // kbusSetupBar2InstBlkAtBottomOfFb -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusSetupBar2InstBlkAtBottomOfFb__ = &kbusSetupBar2InstBlkAtBottomOfFb_GM107; @@ -1160,7 +1203,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusSetupBar2InstBlkAtBottomOfFb__ = &kbusSetupBar2InstBlkAtBottomOfFb_22ba1e; } - // Hal function -- kbusTeardownBar2InstBlkAtBottomOfFb + // kbusTeardownBar2InstBlkAtBottomOfFb -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusTeardownBar2InstBlkAtBottomOfFb__ = &kbusTeardownBar2InstBlkAtBottomOfFb_GM107; @@ -1170,7 +1213,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusTeardownBar2InstBlkAtBottomOfFb__ = &kbusTeardownBar2InstBlkAtBottomOfFb_566dba; } - // Hal function -- kbusSetupBar2PageTablesAtTopOfFb + // kbusSetupBar2PageTablesAtTopOfFb -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusSetupBar2PageTablesAtTopOfFb__ = &kbusSetupBar2PageTablesAtTopOfFb_GM107; @@ -1180,7 +1223,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusSetupBar2PageTablesAtTopOfFb__ = &kbusSetupBar2PageTablesAtTopOfFb_22ba1e; } - // Hal function -- kbusCommitBar2PDEs + // kbusCommitBar2PDEs -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusCommitBar2PDEs__ = &kbusCommitBar2PDEs_GM107; @@ -1190,7 +1233,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusCommitBar2PDEs__ = &kbusCommitBar2PDEs_22ba1e; } - // Hal function -- kbusVerifyCoherentLink + // kbusVerifyCoherentLink -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusVerifyCoherentLink__ = &kbusVerifyCoherentLink_GH100; @@ -1201,7 +1244,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusVerifyCoherentLink__ = &kbusVerifyCoherentLink_56cd7a; } - // Hal function -- kbusTeardownMailbox + // kbusTeardownMailbox -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusTeardownMailbox__ = &kbusTeardownMailbox_GH100; @@ -1211,7 +1254,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusTeardownMailbox__ = &kbusTeardownMailbox_GM107; } - // Hal function -- kbusBar1InstBlkVasUpdate + // kbusBar1InstBlkVasUpdate -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbusBar1InstBlkVasUpdate__ = &kbusBar1InstBlkVasUpdate_GM107; @@ -1221,7 +1264,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusBar1InstBlkVasUpdate__ = &kbusBar1InstBlkVasUpdate_56cd7a; } - // Hal function -- kbusFlushPcieForBar0Doorbell + // kbusFlushPcieForBar0Doorbell -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusFlushPcieForBar0Doorbell__ = &kbusFlushPcieForBar0Doorbell_GH100; @@ -1231,7 +1274,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusFlushPcieForBar0Doorbell__ = &kbusFlushPcieForBar0Doorbell_56cd7a; } - // Hal function -- kbusCreateCoherentCpuMapping + // kbusCreateCoherentCpuMapping -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusCreateCoherentCpuMapping__ = &kbusCreateCoherentCpuMapping_GH100; @@ -1242,21 +1285,21 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusCreateCoherentCpuMapping__ = &kbusCreateCoherentCpuMapping_46f6a7; } - // Hal function -- kbusMapCoherentCpuMapping + // kbusMapCoherentCpuMapping -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { - pThis->__kbusMapCoherentCpuMapping__ = &kbusMapCoherentCpuMapping_GV100; + pThis->__kbusMapCoherentCpuMapping__ = &kbusMapCoherentCpuMapping_GH100; } // default else { - pThis->__kbusMapCoherentCpuMapping__ = &kbusMapCoherentCpuMapping_9e2234; + pThis->__kbusMapCoherentCpuMapping__ = &kbusMapCoherentCpuMapping_395e98; } - // Hal function -- kbusUnmapCoherentCpuMapping + // kbusUnmapCoherentCpuMapping -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { - pThis->__kbusUnmapCoherentCpuMapping__ = &kbusUnmapCoherentCpuMapping_GV100; + pThis->__kbusUnmapCoherentCpuMapping__ = &kbusUnmapCoherentCpuMapping_GH100; } // default else @@ -1264,7 +1307,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusUnmapCoherentCpuMapping__ = &kbusUnmapCoherentCpuMapping_d44104; } - // Hal function -- kbusTeardownCoherentCpuMapping + // kbusTeardownCoherentCpuMapping -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusTeardownCoherentCpuMapping__ = &kbusTeardownCoherentCpuMapping_GV100; @@ -1272,10 +1315,10 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * // default else { - pThis->__kbusTeardownCoherentCpuMapping__ = &kbusTeardownCoherentCpuMapping_d44104; + pThis->__kbusTeardownCoherentCpuMapping__ = &kbusTeardownCoherentCpuMapping_b3696a; } - // Hal function -- kbusBar1InstBlkBind + // kbusBar1InstBlkBind -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ @@ -1292,7 +1335,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusBar1InstBlkBind__ = &kbusBar1InstBlkBind_92bfc3; } - // Hal function -- kbusGetEccCounts + // kbusGetEccCounts -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbusGetEccCounts__ = &kbusGetEccCounts_GH100; @@ -1303,36 +1346,24 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusGetEccCounts__ = &kbusGetEccCounts_4a4dee; } - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelBus_engstateConstructEngine; + // kbusInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__kbusInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kbusInitMissing; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_thunk_KernelBus_engstateStatePreInitLocked; + // kbusStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kbusStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kbusStatePreInitUnlocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_thunk_KernelBus_engstateStateInitLocked; + // kbusStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kbusStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kbusStateInitUnlocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ = &__nvoc_thunk_KernelBus_engstateStatePreLoad; + // kbusIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__kbusIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kbusIsPresent; +} // End __nvoc_init_funcTable_KernelBus_1 with approximately 224 basic block(s). - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_thunk_KernelBus_engstateStateLoad; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_thunk_KernelBus_engstateStatePostLoad; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_thunk_KernelBus_engstateStatePreUnload; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_thunk_KernelBus_engstateStateUnload; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ = &__nvoc_thunk_KernelBus_engstateStatePostUnload; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_thunk_KernelBus_engstateStateDestroy; - - pThis->__kbusStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kbusStateInitUnlocked; - - pThis->__kbusInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kbusInitMissing; - - pThis->__kbusStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kbusStatePreInitUnlocked; - - pThis->__kbusIsPresent__ = &__nvoc_thunk_OBJENGSTATE_kbusIsPresent; -} +// Initialize vtable(s) for 106 virtual method(s). void __nvoc_init_funcTable_KernelBus(KernelBus *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 106 per-object function pointer(s). __nvoc_init_funcTable_KernelBus_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kern_bus_nvoc.h b/src/nvidia/generated/g_kern_bus_nvoc.h index ca73ac599d..14bc10d6ca 100644 --- a/src/nvidia/generated/g_kern_bus_nvoc.h +++ b/src/nvidia/generated/g_kern_bus_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_KERN_BUS_NVOC_H_ #define _G_KERN_BUS_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kern_bus_nvoc.h" #ifndef KERN_BUS_H @@ -178,6 +186,7 @@ typedef struct MAKE_INTRUSIVE_LIST(VirtualBar2MapList, VirtualBar2MapEntry, node); + struct Device; #ifndef __NVOC_CLASS_Device_TYPEDEF__ @@ -321,117 +330,133 @@ struct __nvoc_inner_struc_KernelBus_9__ { }; + struct KernelBus { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct KernelBus *__nvoc_pbase_KernelBus; - NV_STATUS (*__kbusInitBarsSize__)(struct OBJGPU *, struct KernelBus *); - NV_STATUS (*__kbusConstructEngine__)(struct OBJGPU *, struct KernelBus *, ENGDESCRIPTOR); - NV_STATUS (*__kbusStatePreInitLocked__)(struct OBJGPU *, struct KernelBus *); - NV_STATUS (*__kbusStateInitLocked__)(struct OBJGPU *, struct KernelBus *); - NV_STATUS (*__kbusStatePreLoad__)(struct OBJGPU *, struct KernelBus *, NvU32); - NV_STATUS (*__kbusStateLoad__)(struct OBJGPU *, struct KernelBus *, NvU32); - NV_STATUS (*__kbusStatePostLoad__)(struct OBJGPU *, struct KernelBus *, NvU32); - NV_STATUS (*__kbusStatePreUnload__)(struct OBJGPU *, struct KernelBus *, NvU32); - NV_STATUS (*__kbusStateUnload__)(struct OBJGPU *, struct KernelBus *, NvU32); - NV_STATUS (*__kbusStatePostUnload__)(struct OBJGPU *, struct KernelBus *, NvU32); - void (*__kbusStateDestroy__)(struct OBJGPU *, struct KernelBus *); - NvU8 *(*__kbusMapBar2Aperture__)(struct OBJGPU *, struct KernelBus *, MEMORY_DESCRIPTOR *, NvU32); - NvU8 *(*__kbusValidateBar2ApertureMapping__)(struct OBJGPU *, struct KernelBus *, MEMORY_DESCRIPTOR *, NvU8 *); - void (*__kbusUnmapBar2ApertureWithFlags__)(struct OBJGPU *, struct KernelBus *, MEMORY_DESCRIPTOR *, NvU8 **, NvU32); - NvU64 (*__kbusGetVaLimitForBar2__)(struct OBJGPU *, struct KernelBus *); - void (*__kbusCalcCpuInvisibleBar2Range__)(struct OBJGPU *, struct KernelBus *, NvU32); - NvU32 (*__kbusCalcCpuInvisibleBar2ApertureSize__)(struct OBJGPU *, struct KernelBus *); - NV_STATUS (*__kbusCommitBar2__)(struct OBJGPU *, struct KernelBus *, NvU32); - NV_STATUS (*__kbusRewritePTEsForExistingMapping__)(struct OBJGPU *, struct KernelBus *, MEMORY_DESCRIPTOR *); - NV_STATUS (*__kbusPatchBar1Pdb__)(struct OBJGPU *, struct KernelBus *); - NV_STATUS (*__kbusPatchBar2Pdb__)(struct OBJGPU *, struct KernelBus *); - NV_STATUS (*__kbusConstructVirtualBar2CpuInvisibleHeap__)(struct KernelBus *, NvU32); - NV_STATUS (*__kbusMapCpuInvisibleBar2Aperture__)(struct OBJGPU *, struct KernelBus *, MEMORY_DESCRIPTOR *, NvU64 *, NvU64, NvU32, NvU32); - void (*__kbusUnmapCpuInvisibleBar2Aperture__)(struct OBJGPU *, struct KernelBus *, MEMORY_DESCRIPTOR *, NvU64, NvU32); - NV_STATUS (*__kbusTeardownBar2CpuAperture__)(struct OBJGPU *, struct KernelBus *, NvU32); - void (*__kbusGetP2PMailboxAttributes__)(struct OBJGPU *, struct KernelBus *, NvU32 *, NvU32 *, NvU32 *); - NV_STATUS (*__kbusCreateP2PMapping__)(struct OBJGPU *, struct KernelBus *, struct OBJGPU *, struct KernelBus *, NvU32 *, NvU32 *, NvU32); - NV_STATUS (*__kbusRemoveP2PMapping__)(struct OBJGPU *, struct KernelBus *, struct OBJGPU *, struct KernelBus *, NvU32, NvU32, NvU32); - NvU32 (*__kbusGetEgmPeerId__)(struct OBJGPU *, struct KernelBus *, struct OBJGPU *); - NvU32 (*__kbusGetPeerId__)(struct OBJGPU *, struct KernelBus *, struct OBJGPU *); - NvU32 (*__kbusGetNvlinkPeerId__)(struct OBJGPU *, struct KernelBus *, struct OBJGPU *); - NvU32 (*__kbusGetNvSwitchPeerId__)(struct OBJGPU *, struct KernelBus *); - NvU32 (*__kbusGetUnusedPciePeerId__)(struct OBJGPU *, struct KernelBus *); - NV_STATUS (*__kbusIsPeerIdValid__)(struct OBJGPU *, struct KernelBus *, NvU32); - NV_STATUS (*__kbusGetNvlinkP2PPeerId__)(struct OBJGPU *, struct KernelBus *, struct OBJGPU *, struct KernelBus *, NvU32 *, NvU32); - void (*__kbusWriteP2PWmbTag__)(struct OBJGPU *, struct KernelBus *, NvU32, NvU64); - RmPhysAddr (*__kbusSetupP2PDomainAccess__)(struct OBJGPU *, struct KernelBus *, struct OBJGPU *, PMEMORY_DESCRIPTOR *); - NvBool (*__kbusNeedWarForBug999673__)(struct OBJGPU *, struct KernelBus *, struct OBJGPU *); - NV_STATUS (*__kbusCreateP2PMappingForC2C__)(struct OBJGPU *, struct KernelBus *, struct OBJGPU *, struct KernelBus *, NvU32 *, NvU32 *, NvU32); - NV_STATUS (*__kbusRemoveP2PMappingForC2C__)(struct OBJGPU *, struct KernelBus *, struct OBJGPU *, struct KernelBus *, NvU32, NvU32, NvU32); - NV_STATUS (*__kbusUnreserveP2PPeerIds__)(struct OBJGPU *, struct KernelBus *, NvU32); - NvBool (*__kbusIsBar1P2PCapable__)(struct OBJGPU *, struct KernelBus *, NvU32); - NV_STATUS (*__kbusEnableStaticBar1Mapping__)(struct OBJGPU *, struct KernelBus *, NvU32); - void (*__kbusDisableStaticBar1Mapping__)(struct OBJGPU *, struct KernelBus *, NvU32); - NV_STATUS (*__kbusGetBar1P2PDmaInfo__)(struct OBJGPU *, struct OBJGPU *, struct KernelBus *, NvU64 *, NvU64 *); - NV_STATUS (*__kbusUpdateStaticBar1VAMapping__)(struct OBJGPU *, struct KernelBus *, MEMORY_DESCRIPTOR *, NvU64, NvU64, NvBool); - NV_STATUS (*__kbusGetStaticFbAperture__)(struct OBJGPU *, struct KernelBus *, MEMORY_DESCRIPTOR *, NvU64, NvU64 *, NvU64 *, NvU32); - NV_STATUS (*__kbusCreateP2PMappingForBar1P2P__)(struct OBJGPU *, struct KernelBus *, struct OBJGPU *, struct KernelBus *, NvU32); - NV_STATUS (*__kbusRemoveP2PMappingForBar1P2P__)(struct OBJGPU *, struct KernelBus *, struct OBJGPU *, struct KernelBus *, NvU32); - NvBool (*__kbusHasPcieBar1P2PMapping__)(struct OBJGPU *, struct KernelBus *, struct OBJGPU *, struct KernelBus *); - NvBool (*__kbusIsPcieBar1P2PMappingSupported__)(struct OBJGPU *, struct KernelBus *, struct OBJGPU *, struct KernelBus *); - NV_STATUS (*__kbusCheckFlaSupportedAndInit__)(struct OBJGPU *, struct KernelBus *, NvU64, NvU64); - NV_STATUS (*__kbusDetermineFlaRangeAndAllocate__)(struct OBJGPU *, struct KernelBus *, NvU64, NvU64); - NV_STATUS (*__kbusAllocateFlaVaspace__)(struct OBJGPU *, struct KernelBus *, NvU64, NvU64); - NV_STATUS (*__kbusGetFlaRange__)(struct OBJGPU *, struct KernelBus *, NvU64 *, NvU64 *, NvBool); - NV_STATUS (*__kbusAllocateLegacyFlaVaspace__)(struct OBJGPU *, struct KernelBus *, NvU64, NvU64); - NV_STATUS (*__kbusAllocateHostManagedFlaVaspace__)(struct OBJGPU *, struct KernelBus *, NvHandle, NvHandle, NvHandle, NvHandle, NvU64, NvU64, NvU32); - void (*__kbusDestroyFla__)(struct OBJGPU *, struct KernelBus *); - NV_STATUS (*__kbusGetFlaVaspace__)(struct OBJGPU *, struct KernelBus *, struct OBJVASPACE **); - void (*__kbusDestroyHostManagedFlaVaspace__)(struct OBJGPU *, struct KernelBus *, NvU32); - NvBool (*__kbusVerifyFlaRange__)(struct OBJGPU *, struct KernelBus *, NvU64, NvU64); - NV_STATUS (*__kbusConstructFlaInstBlk__)(struct OBJGPU *, struct KernelBus *, NvU32); - void (*__kbusDestructFlaInstBlk__)(struct OBJGPU *, struct KernelBus *); - NV_STATUS (*__kbusValidateFlaBaseAddress__)(struct OBJGPU *, struct KernelBus *, NvU64); - NV_STATUS (*__kbusSetupUnbindFla__)(struct OBJGPU *, struct KernelBus *); - NV_STATUS (*__kbusSetupBindFla__)(struct OBJGPU *, struct KernelBus *, NvU32); - NV_STATUS (*__kbusSendSysmembarSingle__)(struct OBJGPU *, struct KernelBus *); - void (*__kbusCacheBAR1ResizeSize_WAR_BUG_3249028__)(struct OBJGPU *, struct KernelBus *); - NV_STATUS (*__kbusRestoreBAR1ResizeSize_WAR_BUG_3249028__)(struct OBJGPU *, struct KernelBus *); - NV_STATUS (*__kbusIsDirectMappingAllowed__)(struct OBJGPU *, struct KernelBus *, PMEMORY_DESCRIPTOR, NvU32, NvBool *); - NV_STATUS (*__kbusUseDirectSysmemMap__)(struct OBJGPU *, struct KernelBus *, MEMORY_DESCRIPTOR *, NvBool *); - NV_STATUS (*__kbusMemCopyBar0Window__)(struct OBJGPU *, struct KernelBus *, RmPhysAddr, void *, NvLength, NvBool); - NV_STATUS (*__kbusWriteBAR0WindowBase__)(struct OBJGPU *, struct KernelBus *, NvU32); - NvU32 (*__kbusReadBAR0WindowBase__)(struct OBJGPU *, struct KernelBus *); - NvBool (*__kbusValidateBAR0WindowBase__)(struct OBJGPU *, struct KernelBus *, NvU32); - NV_STATUS (*__kbusSetBAR0WindowVidOffset__)(struct OBJGPU *, struct KernelBus *, NvU64); - NvU64 (*__kbusGetBAR0WindowVidOffset__)(struct OBJGPU *, struct KernelBus *); - NV_STATUS (*__kbusSetupBar0WindowBeforeBar2Bootstrap__)(struct OBJGPU *, struct KernelBus *, NvU64 *); - void (*__kbusRestoreBar0WindowAfterBar2Bootstrap__)(struct OBJGPU *, struct KernelBus *, NvU64); - NV_STATUS (*__kbusVerifyBar2__)(struct OBJGPU *, struct KernelBus *, PMEMORY_DESCRIPTOR, NvU8 *, NvU64, NvU64); - NV_STATUS (*__kbusBar2BootStrapInPhysicalMode__)(struct OBJGPU *, struct KernelBus *); - NV_STATUS (*__kbusBindBar2__)(struct OBJGPU *, struct KernelBus *, BAR2_MODE); - void (*__kbusInstBlkWriteAddrLimit__)(struct OBJGPU *, struct KernelBus *, NvBool, NvU64, NvU8 *, NvU64); - NV_STATUS (*__kbusInitInstBlk__)(struct OBJGPU *, struct KernelBus *, PMEMORY_DESCRIPTOR, PMEMORY_DESCRIPTOR, NvU64, NvU64, struct OBJVASPACE *); - void (*__kbusBar2InstBlkWrite__)(struct OBJGPU *, struct KernelBus *, NvU8 *, PMEMORY_DESCRIPTOR, NvU64, NvU64); - NV_STATUS (*__kbusSetupBar2PageTablesAtBottomOfFb__)(struct OBJGPU *, struct KernelBus *, NvU32); - void (*__kbusTeardownBar2PageTablesAtBottomOfFb__)(struct OBJGPU *, struct KernelBus *, NvU32); - NV_STATUS (*__kbusSetupBar2InstBlkAtBottomOfFb__)(struct OBJGPU *, struct KernelBus *, PMEMORY_DESCRIPTOR, NvU64, NvU64, NvU32); - void (*__kbusTeardownBar2InstBlkAtBottomOfFb__)(struct OBJGPU *, struct KernelBus *, NvU32); - NV_STATUS (*__kbusSetupBar2PageTablesAtTopOfFb__)(struct OBJGPU *, struct KernelBus *, NvU32); - NV_STATUS (*__kbusCommitBar2PDEs__)(struct OBJGPU *, struct KernelBus *); - NV_STATUS (*__kbusVerifyCoherentLink__)(struct OBJGPU *, struct KernelBus *); - void (*__kbusTeardownMailbox__)(struct OBJGPU *, struct KernelBus *); - NV_STATUS (*__kbusBar1InstBlkVasUpdate__)(struct OBJGPU *, struct KernelBus *); - NV_STATUS (*__kbusFlushPcieForBar0Doorbell__)(struct OBJGPU *, struct KernelBus *); - NV_STATUS (*__kbusCreateCoherentCpuMapping__)(struct OBJGPU *, struct KernelBus *, NvU64, NvBool); - NvU8 *(*__kbusMapCoherentCpuMapping__)(struct OBJGPU *, struct KernelBus *, PMEMORY_DESCRIPTOR); - void (*__kbusUnmapCoherentCpuMapping__)(struct OBJGPU *, struct KernelBus *, PMEMORY_DESCRIPTOR); - void (*__kbusTeardownCoherentCpuMapping__)(struct OBJGPU *, struct KernelBus *, NvBool); - NV_STATUS (*__kbusBar1InstBlkBind__)(struct OBJGPU *, struct KernelBus *); - NvU32 (*__kbusGetEccCounts__)(struct OBJGPU *, struct KernelBus *); - NV_STATUS (*__kbusStateInitUnlocked__)(POBJGPU, struct KernelBus *); - void (*__kbusInitMissing__)(POBJGPU, struct KernelBus *); - NV_STATUS (*__kbusStatePreInitUnlocked__)(POBJGPU, struct KernelBus *); - NvBool (*__kbusIsPresent__)(POBJGPU, struct KernelBus *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct KernelBus *__nvoc_pbase_KernelBus; // kbus + + // Vtable with 106 per-object function pointers + NV_STATUS (*__kbusInitBarsSize__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) + NV_STATUS (*__kbusConstructEngine__)(struct OBJGPU *, struct KernelBus * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kbusStatePreInitLocked__)(struct OBJGPU *, struct KernelBus * /*this*/); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kbusStateInitLocked__)(struct OBJGPU *, struct KernelBus * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kbusStatePreLoad__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kbusStateLoad__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kbusStatePostLoad__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kbusStatePreUnload__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kbusStateUnload__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kbusStatePostUnload__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + void (*__kbusStateDestroy__)(struct OBJGPU *, struct KernelBus * /*this*/); // virtual halified (singleton optimized) override (engstate) base (engstate) + NvBool (*__kbusBar2IsReady__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) body + NvU8 * (*__kbusMapBar2Aperture__)(struct OBJGPU *, struct KernelBus * /*this*/, MEMORY_DESCRIPTOR *, NvU32); // halified (2 hals) body + NvU8 * (*__kbusValidateBar2ApertureMapping__)(struct OBJGPU *, struct KernelBus * /*this*/, MEMORY_DESCRIPTOR *, NvU8 *); // halified (2 hals) body + void (*__kbusUnmapBar2ApertureWithFlags__)(struct OBJGPU *, struct KernelBus * /*this*/, MEMORY_DESCRIPTOR *, NvU8 **, NvU32); // halified (2 hals) body + NvU64 (*__kbusGetVaLimitForBar2__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) body + void (*__kbusCalcCpuInvisibleBar2Range__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (2 hals) body + NvU32 (*__kbusCalcCpuInvisibleBar2ApertureSize__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbusCommitBar2__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__kbusRewritePTEsForExistingMapping__)(struct OBJGPU *, struct KernelBus * /*this*/, MEMORY_DESCRIPTOR *); // halified (2 hals) body + NV_STATUS (*__kbusPatchBar1Pdb__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbusPatchBar2Pdb__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbusConstructVirtualBar2CpuInvisibleHeap__)(struct KernelBus * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__kbusMapCpuInvisibleBar2Aperture__)(struct OBJGPU *, struct KernelBus * /*this*/, MEMORY_DESCRIPTOR *, NvU64 *, NvU64, NvU32, NvU32); // halified (2 hals) body + void (*__kbusUnmapCpuInvisibleBar2Aperture__)(struct OBJGPU *, struct KernelBus * /*this*/, MEMORY_DESCRIPTOR *, NvU64, NvU32); // halified (2 hals) body + NV_STATUS (*__kbusTeardownBar2CpuAperture__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (2 hals) body + void (*__kbusGetP2PMailboxAttributes__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32 *, NvU32 *, NvU32 *); // halified (2 hals) body + NV_STATUS (*__kbusCreateP2PMapping__)(struct OBJGPU *, struct KernelBus * /*this*/, struct OBJGPU *, struct KernelBus *, NvU32 *, NvU32 *, NvU32); // halified (2 hals) body + NV_STATUS (*__kbusRemoveP2PMapping__)(struct OBJGPU *, struct KernelBus * /*this*/, struct OBJGPU *, struct KernelBus *, NvU32, NvU32, NvU32); // halified (2 hals) body + NvU32 (*__kbusGetEgmPeerId__)(struct OBJGPU *, struct KernelBus * /*this*/, struct OBJGPU *); // halified (2 hals) body + NvU32 (*__kbusGetPeerId__)(struct OBJGPU *, struct KernelBus * /*this*/, struct OBJGPU *); // halified (2 hals) + NvU32 (*__kbusGetNvlinkPeerId__)(struct OBJGPU *, struct KernelBus * /*this*/, struct OBJGPU *); // halified (3 hals) body + NvU32 (*__kbusGetNvSwitchPeerId__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) body + NvU32 (*__kbusGetUnusedPciePeerId__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) + NV_STATUS (*__kbusIsPeerIdValid__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (2 hals) + NV_STATUS (*__kbusGetNvlinkP2PPeerId__)(struct OBJGPU *, struct KernelBus * /*this*/, struct OBJGPU *, struct KernelBus *, NvU32 *, NvU32); // halified (4 hals) body + void (*__kbusWriteP2PWmbTag__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32, NvU64); // halified (2 hals) body + RmPhysAddr (*__kbusSetupP2PDomainAccess__)(struct OBJGPU *, struct KernelBus * /*this*/, struct OBJGPU *, PMEMORY_DESCRIPTOR *); // halified (2 hals) body + NvBool (*__kbusNeedWarForBug999673__)(struct OBJGPU *, struct KernelBus * /*this*/, struct OBJGPU *); // halified (2 hals) body + NV_STATUS (*__kbusCreateP2PMappingForC2C__)(struct OBJGPU *, struct KernelBus * /*this*/, struct OBJGPU *, struct KernelBus *, NvU32 *, NvU32 *, NvU32); // halified (2 hals) body + NV_STATUS (*__kbusRemoveP2PMappingForC2C__)(struct OBJGPU *, struct KernelBus * /*this*/, struct OBJGPU *, struct KernelBus *, NvU32, NvU32, NvU32); // halified (2 hals) body + NV_STATUS (*__kbusUnreserveP2PPeerIds__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (2 hals) body + NvBool (*__kbusIsBar1P2PCapable__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__kbusEnableStaticBar1Mapping__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (2 hals) body + void (*__kbusDisableStaticBar1Mapping__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__kbusGetBar1P2PDmaInfo__)(struct OBJGPU *, struct OBJGPU *, struct KernelBus * /*this*/, NvU64 *, NvU64 *); // halified (2 hals) body + NV_STATUS (*__kbusUpdateStaticBar1VAMapping__)(struct OBJGPU *, struct KernelBus * /*this*/, MEMORY_DESCRIPTOR *, NvU64, NvU64, NvBool); // halified (2 hals) body + NV_STATUS (*__kbusGetStaticFbAperture__)(struct OBJGPU *, struct KernelBus * /*this*/, MEMORY_DESCRIPTOR *, NvU64, NvU64 *, NvU64 *, NvU32); // halified (2 hals) body + NV_STATUS (*__kbusCreateP2PMappingForBar1P2P__)(struct OBJGPU *, struct KernelBus * /*this*/, struct OBJGPU *, struct KernelBus *, NvU32); // halified (2 hals) body + NV_STATUS (*__kbusRemoveP2PMappingForBar1P2P__)(struct OBJGPU *, struct KernelBus * /*this*/, struct OBJGPU *, struct KernelBus *, NvU32); // halified (2 hals) body + NvBool (*__kbusHasPcieBar1P2PMapping__)(struct OBJGPU *, struct KernelBus * /*this*/, struct OBJGPU *, struct KernelBus *); // halified (2 hals) body + NvBool (*__kbusIsPcieBar1P2PMappingSupported__)(struct OBJGPU *, struct KernelBus * /*this*/, struct OBJGPU *, struct KernelBus *); // halified (2 hals) body + NV_STATUS (*__kbusCheckFlaSupportedAndInit__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU64, NvU64); // halified (2 hals) body + NV_STATUS (*__kbusDetermineFlaRangeAndAllocate__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU64, NvU64); // halified (3 hals) body + NV_STATUS (*__kbusAllocateFlaVaspace__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU64, NvU64); // halified (3 hals) body + NV_STATUS (*__kbusGetFlaRange__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU64 *, NvU64 *, NvBool); // halified (3 hals) body + NV_STATUS (*__kbusAllocateLegacyFlaVaspace__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU64, NvU64); // halified (2 hals) body + NV_STATUS (*__kbusAllocateHostManagedFlaVaspace__)(struct OBJGPU *, struct KernelBus * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle, NvU64, NvU64, NvU32); // halified (2 hals) body + void (*__kbusDestroyFla__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (3 hals) body + NV_STATUS (*__kbusGetFlaVaspace__)(struct OBJGPU *, struct KernelBus * /*this*/, struct OBJVASPACE **); // halified (2 hals) body + void (*__kbusDestroyHostManagedFlaVaspace__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (2 hals) body + NvBool (*__kbusVerifyFlaRange__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU64, NvU64); // halified (2 hals) body + NV_STATUS (*__kbusConstructFlaInstBlk__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (2 hals) body + void (*__kbusDestructFlaInstBlk__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbusValidateFlaBaseAddress__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU64); // halified (2 hals) body + NV_STATUS (*__kbusSetupUnbindFla__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (3 hals) body + NV_STATUS (*__kbusSetupBindFla__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (3 hals) body + NV_STATUS (*__kbusSendSysmembarSingle__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) body + void (*__kbusCacheBAR1ResizeSize_WAR_BUG_3249028__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (3 hals) body + NV_STATUS (*__kbusRestoreBAR1ResizeSize_WAR_BUG_3249028__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (3 hals) body + NV_STATUS (*__kbusIsDirectMappingAllowed__)(struct OBJGPU *, struct KernelBus * /*this*/, PMEMORY_DESCRIPTOR, NvU32, NvBool *); // halified (2 hals) + NV_STATUS (*__kbusUseDirectSysmemMap__)(struct OBJGPU *, struct KernelBus * /*this*/, MEMORY_DESCRIPTOR *, NvBool *); // halified (2 hals) body + NV_STATUS (*__kbusMemCopyBar0Window__)(struct OBJGPU *, struct KernelBus * /*this*/, RmPhysAddr, void *, NvLength, NvBool); // halified (2 hals) body + NV_STATUS (*__kbusWriteBAR0WindowBase__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (2 hals) body + NvU32 (*__kbusReadBAR0WindowBase__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) body + NvBool (*__kbusValidateBAR0WindowBase__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__kbusSetBAR0WindowVidOffset__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU64); // halified (3 hals) body + NvU64 (*__kbusGetBAR0WindowVidOffset__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbusSetupBar0WindowBeforeBar2Bootstrap__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU64 *); // halified (2 hals) body + void (*__kbusRestoreBar0WindowAfterBar2Bootstrap__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU64); // halified (2 hals) body + NV_STATUS (*__kbusVerifyBar2__)(struct OBJGPU *, struct KernelBus * /*this*/, PMEMORY_DESCRIPTOR, NvU8 *, NvU64, NvU64); // halified (3 hals) body + NV_STATUS (*__kbusBar2BootStrapInPhysicalMode__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbusBindBar2__)(struct OBJGPU *, struct KernelBus * /*this*/, BAR2_MODE); // halified (3 hals) body + void (*__kbusInstBlkWriteAddrLimit__)(struct OBJGPU *, struct KernelBus * /*this*/, NvBool, NvU64, NvU8 *, NvU64); // halified (3 hals) body + NV_STATUS (*__kbusInitInstBlk__)(struct OBJGPU *, struct KernelBus * /*this*/, PMEMORY_DESCRIPTOR, PMEMORY_DESCRIPTOR, NvU64, NvU64, struct OBJVASPACE *); // halified (2 hals) body + void (*__kbusBar2InstBlkWrite__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU8 *, PMEMORY_DESCRIPTOR, NvU64, NvU64); // halified (2 hals) body + NV_STATUS (*__kbusSetupBar2PageTablesAtBottomOfFb__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (2 hals) body + void (*__kbusTeardownBar2PageTablesAtBottomOfFb__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__kbusSetupBar2InstBlkAtBottomOfFb__)(struct OBJGPU *, struct KernelBus * /*this*/, PMEMORY_DESCRIPTOR, NvU64, NvU64, NvU32); // halified (2 hals) body + void (*__kbusTeardownBar2InstBlkAtBottomOfFb__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__kbusSetupBar2PageTablesAtTopOfFb__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__kbusCommitBar2PDEs__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbusVerifyCoherentLink__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) body + void (*__kbusTeardownMailbox__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbusBar1InstBlkVasUpdate__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbusFlushPcieForBar0Doorbell__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbusCreateCoherentCpuMapping__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU64, NvBool); // halified (2 hals) body + NV_STATUS (*__kbusMapCoherentCpuMapping__)(struct OBJGPU *, struct KernelBus * /*this*/, MEMORY_DESCRIPTOR *, NvU64, NvU64, NvU32, NvP64 *, NvP64 *); // halified (2 hals) body + void (*__kbusUnmapCoherentCpuMapping__)(struct OBJGPU *, struct KernelBus * /*this*/, MEMORY_DESCRIPTOR *, NvP64, NvP64); // halified (2 hals) body + void (*__kbusTeardownCoherentCpuMapping__)(struct OBJGPU *, struct KernelBus * /*this*/, NvBool); // halified (2 hals) body + NV_STATUS (*__kbusBar1InstBlkBind__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (3 hals) body + NvU32 (*__kbusGetEccCounts__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) body + void (*__kbusInitMissing__)(POBJGPU, struct KernelBus * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kbusStatePreInitUnlocked__)(POBJGPU, struct KernelBus * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kbusStateInitUnlocked__)(POBJGPU, struct KernelBus * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__kbusIsPresent__)(POBJGPU, struct KernelBus * /*this*/); // virtual inherited (engstate) base (engstate) + + // 3 PDB properties + NvBool PDB_PROP_KBUS_NVLINK_DECONFIG_HSHUB_ON_NO_MAPPING; + NvBool PDB_PROP_KBUS_RESTORE_BAR1_SIZE_BUG_3249028_WAR; + + // Data members NvU32 totalPciBars; RmPhysAddr pciBars[8]; NvU64 pciBarSizes[8]; @@ -481,8 +506,6 @@ struct KernelBus { PMEMORY_DESCRIPTOR pFlushMemDesc; NvU8 *pReadToFlush; NvBool bReadCpuPointerToFlush; - NvBool PDB_PROP_KBUS_NVLINK_DECONFIG_HSHUB_ON_NO_MAPPING; - NvBool PDB_PROP_KBUS_RESTORE_BAR1_SIZE_BUG_3249028_WAR; NvU32 PTEBAR2Aperture; NvU32 PTEBAR2Attr; NvU32 PDEBAR2Aperture; @@ -502,6 +525,7 @@ typedef struct KernelBus KernelBus; #define __nvoc_class_id_KernelBus 0xd2ac57 #endif /* __nvoc_class_id_KernelBus */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelBus; #define __staticCast_KernelBus(pThis) \ @@ -514,6 +538,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelBus; ((KernelBus*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelBus))) #endif //__nvoc_kern_bus_h_disabled +// Property macros #define PDB_PROP_KBUS_RESTORE_BAR1_SIZE_BUG_3249028_WAR_BASE_CAST #define PDB_PROP_KBUS_RESTORE_BAR1_SIZE_BUG_3249028_WAR_BASE_NAME PDB_PROP_KBUS_RESTORE_BAR1_SIZE_BUG_3249028_WAR #define PDB_PROP_KBUS_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. @@ -527,401 +552,951 @@ NV_STATUS __nvoc_objCreate_KernelBus(KernelBus**, Dynamic*, NvU32); #define __objCreate_KernelBus(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelBus((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define kbusInitBarsSize_FNPTR(pKernelBus) pKernelBus->__kbusInitBarsSize__ #define kbusInitBarsSize(pGpu, pKernelBus) kbusInitBarsSize_DISPATCH(pGpu, pKernelBus) #define kbusInitBarsSize_HAL(pGpu, pKernelBus) kbusInitBarsSize_DISPATCH(pGpu, pKernelBus) -#define kbusConstructEngine(pGpu, pKernelBus, arg0) kbusConstructEngine_DISPATCH(pGpu, pKernelBus, arg0) +#define kbusConstructEngine_FNPTR(pKernelBus) pKernelBus->__kbusConstructEngine__ +#define kbusConstructEngine(pGpu, pKernelBus, arg3) kbusConstructEngine_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusStatePreInitLocked_FNPTR(pKernelBus) pKernelBus->__kbusStatePreInitLocked__ #define kbusStatePreInitLocked(pGpu, pKernelBus) kbusStatePreInitLocked_DISPATCH(pGpu, pKernelBus) #define kbusStatePreInitLocked_HAL(pGpu, pKernelBus) kbusStatePreInitLocked_DISPATCH(pGpu, pKernelBus) +#define kbusStateInitLocked_FNPTR(pKernelBus) pKernelBus->__kbusStateInitLocked__ #define kbusStateInitLocked(pGpu, pKernelBus) kbusStateInitLocked_DISPATCH(pGpu, pKernelBus) -#define kbusStatePreLoad(pGpu, pKernelBus, arg0) kbusStatePreLoad_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusStatePreLoad_HAL(pGpu, pKernelBus, arg0) kbusStatePreLoad_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusStateLoad(pGpu, pKernelBus, arg0) kbusStateLoad_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusStateLoad_HAL(pGpu, pKernelBus, arg0) kbusStateLoad_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusStatePostLoad(pGpu, pKernelBus, arg0) kbusStatePostLoad_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusStatePostLoad_HAL(pGpu, pKernelBus, arg0) kbusStatePostLoad_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusStatePreUnload(pGpu, pKernelBus, arg0) kbusStatePreUnload_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusStatePreUnload_HAL(pGpu, pKernelBus, arg0) kbusStatePreUnload_DISPATCH(pGpu, pKernelBus, arg0) +#define kbusStatePreLoad_FNPTR(pKernelBus) pKernelBus->__kbusStatePreLoad__ +#define kbusStatePreLoad(pGpu, pKernelBus, arg3) kbusStatePreLoad_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusStatePreLoad_HAL(pGpu, pKernelBus, arg3) kbusStatePreLoad_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusStateLoad_FNPTR(pKernelBus) pKernelBus->__kbusStateLoad__ +#define kbusStateLoad(pGpu, pKernelBus, arg3) kbusStateLoad_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusStateLoad_HAL(pGpu, pKernelBus, arg3) kbusStateLoad_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusStatePostLoad_FNPTR(pKernelBus) pKernelBus->__kbusStatePostLoad__ +#define kbusStatePostLoad(pGpu, pKernelBus, arg3) kbusStatePostLoad_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusStatePostLoad_HAL(pGpu, pKernelBus, arg3) kbusStatePostLoad_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusStatePreUnload_FNPTR(pKernelBus) pKernelBus->__kbusStatePreUnload__ +#define kbusStatePreUnload(pGpu, pKernelBus, arg3) kbusStatePreUnload_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusStatePreUnload_HAL(pGpu, pKernelBus, arg3) kbusStatePreUnload_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusStateUnload_FNPTR(pKernelBus) pKernelBus->__kbusStateUnload__ #define kbusStateUnload(pGpu, pKernelBus, flags) kbusStateUnload_DISPATCH(pGpu, pKernelBus, flags) #define kbusStateUnload_HAL(pGpu, pKernelBus, flags) kbusStateUnload_DISPATCH(pGpu, pKernelBus, flags) +#define kbusStatePostUnload_FNPTR(pKernelBus) pKernelBus->__kbusStatePostUnload__ #define kbusStatePostUnload(pGpu, pKernelBus, flags) kbusStatePostUnload_DISPATCH(pGpu, pKernelBus, flags) #define kbusStatePostUnload_HAL(pGpu, pKernelBus, flags) kbusStatePostUnload_DISPATCH(pGpu, pKernelBus, flags) +#define kbusStateDestroy_FNPTR(pKernelBus) pKernelBus->__kbusStateDestroy__ #define kbusStateDestroy(pGpu, pKernelBus) kbusStateDestroy_DISPATCH(pGpu, pKernelBus) #define kbusStateDestroy_HAL(pGpu, pKernelBus) kbusStateDestroy_DISPATCH(pGpu, pKernelBus) +#define kbusBar2IsReady_FNPTR(pKernelBus) pKernelBus->__kbusBar2IsReady__ +#define kbusBar2IsReady(pGpu, pKernelBus) kbusBar2IsReady_DISPATCH(pGpu, pKernelBus) +#define kbusBar2IsReady_HAL(pGpu, pKernelBus) kbusBar2IsReady_DISPATCH(pGpu, pKernelBus) +#define kbusMapBar2Aperture_FNPTR(pKernelBus) pKernelBus->__kbusMapBar2Aperture__ #define kbusMapBar2Aperture(pGpu, pKernelBus, pMemDesc, transfer_flags) kbusMapBar2Aperture_DISPATCH(pGpu, pKernelBus, pMemDesc, transfer_flags) #define kbusMapBar2Aperture_HAL(pGpu, pKernelBus, pMemDesc, transfer_flags) kbusMapBar2Aperture_DISPATCH(pGpu, pKernelBus, pMemDesc, transfer_flags) +#define kbusValidateBar2ApertureMapping_FNPTR(pKernelBus) pKernelBus->__kbusValidateBar2ApertureMapping__ #define kbusValidateBar2ApertureMapping(pGpu, pKernelBus, pMemDesc, p) kbusValidateBar2ApertureMapping_DISPATCH(pGpu, pKernelBus, pMemDesc, p) #define kbusValidateBar2ApertureMapping_HAL(pGpu, pKernelBus, pMemDesc, p) kbusValidateBar2ApertureMapping_DISPATCH(pGpu, pKernelBus, pMemDesc, p) +#define kbusUnmapBar2ApertureWithFlags_FNPTR(pKernelBus) pKernelBus->__kbusUnmapBar2ApertureWithFlags__ #define kbusUnmapBar2ApertureWithFlags(pGpu, pKernelBus, pMemDesc, pCpuPtr, flags) kbusUnmapBar2ApertureWithFlags_DISPATCH(pGpu, pKernelBus, pMemDesc, pCpuPtr, flags) #define kbusUnmapBar2ApertureWithFlags_HAL(pGpu, pKernelBus, pMemDesc, pCpuPtr, flags) kbusUnmapBar2ApertureWithFlags_DISPATCH(pGpu, pKernelBus, pMemDesc, pCpuPtr, flags) +#define kbusGetVaLimitForBar2_FNPTR(pKernelBus) pKernelBus->__kbusGetVaLimitForBar2__ #define kbusGetVaLimitForBar2(pGpu, pKernelBus) kbusGetVaLimitForBar2_DISPATCH(pGpu, pKernelBus) #define kbusGetVaLimitForBar2_HAL(pGpu, pKernelBus) kbusGetVaLimitForBar2_DISPATCH(pGpu, pKernelBus) +#define kbusCalcCpuInvisibleBar2Range_FNPTR(pKernelBus) pKernelBus->__kbusCalcCpuInvisibleBar2Range__ #define kbusCalcCpuInvisibleBar2Range(pGpu, pKernelBus, gfid) kbusCalcCpuInvisibleBar2Range_DISPATCH(pGpu, pKernelBus, gfid) #define kbusCalcCpuInvisibleBar2Range_HAL(pGpu, pKernelBus, gfid) kbusCalcCpuInvisibleBar2Range_DISPATCH(pGpu, pKernelBus, gfid) +#define kbusCalcCpuInvisibleBar2ApertureSize_FNPTR(pKernelBus) pKernelBus->__kbusCalcCpuInvisibleBar2ApertureSize__ #define kbusCalcCpuInvisibleBar2ApertureSize(pGpu, pKernelBus) kbusCalcCpuInvisibleBar2ApertureSize_DISPATCH(pGpu, pKernelBus) #define kbusCalcCpuInvisibleBar2ApertureSize_HAL(pGpu, pKernelBus) kbusCalcCpuInvisibleBar2ApertureSize_DISPATCH(pGpu, pKernelBus) +#define kbusCommitBar2_FNPTR(pKernelBus) pKernelBus->__kbusCommitBar2__ #define kbusCommitBar2(pGpu, pKernelBus, flags) kbusCommitBar2_DISPATCH(pGpu, pKernelBus, flags) #define kbusCommitBar2_HAL(pGpu, pKernelBus, flags) kbusCommitBar2_DISPATCH(pGpu, pKernelBus, flags) +#define kbusRewritePTEsForExistingMapping_FNPTR(pKernelBus) pKernelBus->__kbusRewritePTEsForExistingMapping__ #define kbusRewritePTEsForExistingMapping(pGpu, pKernelBus, pMemDesc) kbusRewritePTEsForExistingMapping_DISPATCH(pGpu, pKernelBus, pMemDesc) #define kbusRewritePTEsForExistingMapping_HAL(pGpu, pKernelBus, pMemDesc) kbusRewritePTEsForExistingMapping_DISPATCH(pGpu, pKernelBus, pMemDesc) +#define kbusPatchBar1Pdb_FNPTR(pKernelBus) pKernelBus->__kbusPatchBar1Pdb__ #define kbusPatchBar1Pdb(pGpu, pKernelBus) kbusPatchBar1Pdb_DISPATCH(pGpu, pKernelBus) #define kbusPatchBar1Pdb_HAL(pGpu, pKernelBus) kbusPatchBar1Pdb_DISPATCH(pGpu, pKernelBus) +#define kbusPatchBar2Pdb_FNPTR(pKernelBus) pKernelBus->__kbusPatchBar2Pdb__ #define kbusPatchBar2Pdb(pGpu, pKernelBus) kbusPatchBar2Pdb_DISPATCH(pGpu, pKernelBus) #define kbusPatchBar2Pdb_HAL(pGpu, pKernelBus) kbusPatchBar2Pdb_DISPATCH(pGpu, pKernelBus) +#define kbusConstructVirtualBar2CpuInvisibleHeap_FNPTR(pKernelBus) pKernelBus->__kbusConstructVirtualBar2CpuInvisibleHeap__ #define kbusConstructVirtualBar2CpuInvisibleHeap(pKernelBus, gfid) kbusConstructVirtualBar2CpuInvisibleHeap_DISPATCH(pKernelBus, gfid) #define kbusConstructVirtualBar2CpuInvisibleHeap_HAL(pKernelBus, gfid) kbusConstructVirtualBar2CpuInvisibleHeap_DISPATCH(pKernelBus, gfid) +#define kbusMapCpuInvisibleBar2Aperture_FNPTR(pKernelBus) pKernelBus->__kbusMapCpuInvisibleBar2Aperture__ #define kbusMapCpuInvisibleBar2Aperture(pGpu, pKernelBus, pMemDesc, pVaddr, allocSize, allocFlags, gfid) kbusMapCpuInvisibleBar2Aperture_DISPATCH(pGpu, pKernelBus, pMemDesc, pVaddr, allocSize, allocFlags, gfid) #define kbusMapCpuInvisibleBar2Aperture_HAL(pGpu, pKernelBus, pMemDesc, pVaddr, allocSize, allocFlags, gfid) kbusMapCpuInvisibleBar2Aperture_DISPATCH(pGpu, pKernelBus, pMemDesc, pVaddr, allocSize, allocFlags, gfid) +#define kbusUnmapCpuInvisibleBar2Aperture_FNPTR(pKernelBus) pKernelBus->__kbusUnmapCpuInvisibleBar2Aperture__ #define kbusUnmapCpuInvisibleBar2Aperture(pGpu, pKernelBus, pMemDesc, vAddr, gfid) kbusUnmapCpuInvisibleBar2Aperture_DISPATCH(pGpu, pKernelBus, pMemDesc, vAddr, gfid) #define kbusUnmapCpuInvisibleBar2Aperture_HAL(pGpu, pKernelBus, pMemDesc, vAddr, gfid) kbusUnmapCpuInvisibleBar2Aperture_DISPATCH(pGpu, pKernelBus, pMemDesc, vAddr, gfid) +#define kbusTeardownBar2CpuAperture_FNPTR(pKernelBus) pKernelBus->__kbusTeardownBar2CpuAperture__ #define kbusTeardownBar2CpuAperture(pGpu, pKernelBus, gfid) kbusTeardownBar2CpuAperture_DISPATCH(pGpu, pKernelBus, gfid) #define kbusTeardownBar2CpuAperture_HAL(pGpu, pKernelBus, gfid) kbusTeardownBar2CpuAperture_DISPATCH(pGpu, pKernelBus, gfid) #define kbusGetP2PWriteMailboxAddressSize(pGpu) kbusGetP2PWriteMailboxAddressSize_STATIC_DISPATCH(pGpu) #define kbusGetP2PWriteMailboxAddressSize_HAL(pGpu) kbusGetP2PWriteMailboxAddressSize_STATIC_DISPATCH(pGpu) +#define kbusGetP2PMailboxAttributes_FNPTR(pKernelBus) pKernelBus->__kbusGetP2PMailboxAttributes__ #define kbusGetP2PMailboxAttributes(pGpu, pKernelBus, pMailboxAreaSize, pMailboxAlignmentSize, pMailboxMaxOffset64KB) kbusGetP2PMailboxAttributes_DISPATCH(pGpu, pKernelBus, pMailboxAreaSize, pMailboxAlignmentSize, pMailboxMaxOffset64KB) #define kbusGetP2PMailboxAttributes_HAL(pGpu, pKernelBus, pMailboxAreaSize, pMailboxAlignmentSize, pMailboxMaxOffset64KB) kbusGetP2PMailboxAttributes_DISPATCH(pGpu, pKernelBus, pMailboxAreaSize, pMailboxAlignmentSize, pMailboxMaxOffset64KB) +#define kbusCreateP2PMapping_FNPTR(pKernelBus0) pKernelBus0->__kbusCreateP2PMapping__ #define kbusCreateP2PMapping(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes) kbusCreateP2PMapping_DISPATCH(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes) #define kbusCreateP2PMapping_HAL(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes) kbusCreateP2PMapping_DISPATCH(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes) +#define kbusRemoveP2PMapping_FNPTR(pKernelBus0) pKernelBus0->__kbusRemoveP2PMapping__ #define kbusRemoveP2PMapping(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes) kbusRemoveP2PMapping_DISPATCH(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes) #define kbusRemoveP2PMapping_HAL(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes) kbusRemoveP2PMapping_DISPATCH(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes) +#define kbusGetEgmPeerId_FNPTR(pLocalKernelBus) pLocalKernelBus->__kbusGetEgmPeerId__ #define kbusGetEgmPeerId(pLocalGpu, pLocalKernelBus, pRemoteGpu) kbusGetEgmPeerId_DISPATCH(pLocalGpu, pLocalKernelBus, pRemoteGpu) #define kbusGetEgmPeerId_HAL(pLocalGpu, pLocalKernelBus, pRemoteGpu) kbusGetEgmPeerId_DISPATCH(pLocalGpu, pLocalKernelBus, pRemoteGpu) +#define kbusGetPeerId_FNPTR(pKernelBus) pKernelBus->__kbusGetPeerId__ #define kbusGetPeerId(pGpu, pKernelBus, pPeerGpu) kbusGetPeerId_DISPATCH(pGpu, pKernelBus, pPeerGpu) #define kbusGetPeerId_HAL(pGpu, pKernelBus, pPeerGpu) kbusGetPeerId_DISPATCH(pGpu, pKernelBus, pPeerGpu) +#define kbusGetNvlinkPeerId_FNPTR(pKernelBus) pKernelBus->__kbusGetNvlinkPeerId__ #define kbusGetNvlinkPeerId(pGpu, pKernelBus, pPeerGpu) kbusGetNvlinkPeerId_DISPATCH(pGpu, pKernelBus, pPeerGpu) #define kbusGetNvlinkPeerId_HAL(pGpu, pKernelBus, pPeerGpu) kbusGetNvlinkPeerId_DISPATCH(pGpu, pKernelBus, pPeerGpu) +#define kbusGetNvSwitchPeerId_FNPTR(pKernelBus) pKernelBus->__kbusGetNvSwitchPeerId__ #define kbusGetNvSwitchPeerId(pGpu, pKernelBus) kbusGetNvSwitchPeerId_DISPATCH(pGpu, pKernelBus) #define kbusGetNvSwitchPeerId_HAL(pGpu, pKernelBus) kbusGetNvSwitchPeerId_DISPATCH(pGpu, pKernelBus) +#define kbusGetUnusedPciePeerId_FNPTR(pKernelBus) pKernelBus->__kbusGetUnusedPciePeerId__ #define kbusGetUnusedPciePeerId(pGpu, pKernelBus) kbusGetUnusedPciePeerId_DISPATCH(pGpu, pKernelBus) #define kbusGetUnusedPciePeerId_HAL(pGpu, pKernelBus) kbusGetUnusedPciePeerId_DISPATCH(pGpu, pKernelBus) +#define kbusIsPeerIdValid_FNPTR(pKernelBus) pKernelBus->__kbusIsPeerIdValid__ #define kbusIsPeerIdValid(pGpu, pKernelBus, peerId) kbusIsPeerIdValid_DISPATCH(pGpu, pKernelBus, peerId) #define kbusIsPeerIdValid_HAL(pGpu, pKernelBus, peerId) kbusIsPeerIdValid_DISPATCH(pGpu, pKernelBus, peerId) +#define kbusGetNvlinkP2PPeerId_FNPTR(pKernelBus0) pKernelBus0->__kbusGetNvlinkP2PPeerId__ #define kbusGetNvlinkP2PPeerId(pGpu0, pKernelBus0, pGpu1, pKernelBus1, nvlinkPeer, attributes) kbusGetNvlinkP2PPeerId_DISPATCH(pGpu0, pKernelBus0, pGpu1, pKernelBus1, nvlinkPeer, attributes) #define kbusGetNvlinkP2PPeerId_HAL(pGpu0, pKernelBus0, pGpu1, pKernelBus1, nvlinkPeer, attributes) kbusGetNvlinkP2PPeerId_DISPATCH(pGpu0, pKernelBus0, pGpu1, pKernelBus1, nvlinkPeer, attributes) +#define kbusWriteP2PWmbTag_FNPTR(pKernelBus) pKernelBus->__kbusWriteP2PWmbTag__ #define kbusWriteP2PWmbTag(pGpu, pKernelBus, remote2Local, p2pWmbTag) kbusWriteP2PWmbTag_DISPATCH(pGpu, pKernelBus, remote2Local, p2pWmbTag) #define kbusWriteP2PWmbTag_HAL(pGpu, pKernelBus, remote2Local, p2pWmbTag) kbusWriteP2PWmbTag_DISPATCH(pGpu, pKernelBus, remote2Local, p2pWmbTag) +#define kbusSetupP2PDomainAccess_FNPTR(pKernelBus0) pKernelBus0->__kbusSetupP2PDomainAccess__ #define kbusSetupP2PDomainAccess(pGpu0, pKernelBus0, pGpu1, ppP2PDomMemDesc) kbusSetupP2PDomainAccess_DISPATCH(pGpu0, pKernelBus0, pGpu1, ppP2PDomMemDesc) #define kbusSetupP2PDomainAccess_HAL(pGpu0, pKernelBus0, pGpu1, ppP2PDomMemDesc) kbusSetupP2PDomainAccess_DISPATCH(pGpu0, pKernelBus0, pGpu1, ppP2PDomMemDesc) +#define kbusNeedWarForBug999673_FNPTR(pKernelBus) pKernelBus->__kbusNeedWarForBug999673__ #define kbusNeedWarForBug999673(pGpu, pKernelBus, pRemoteGpu) kbusNeedWarForBug999673_DISPATCH(pGpu, pKernelBus, pRemoteGpu) #define kbusNeedWarForBug999673_HAL(pGpu, pKernelBus, pRemoteGpu) kbusNeedWarForBug999673_DISPATCH(pGpu, pKernelBus, pRemoteGpu) +#define kbusCreateP2PMappingForC2C_FNPTR(pKernelBus0) pKernelBus0->__kbusCreateP2PMappingForC2C__ #define kbusCreateP2PMappingForC2C(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes) kbusCreateP2PMappingForC2C_DISPATCH(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes) #define kbusCreateP2PMappingForC2C_HAL(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes) kbusCreateP2PMappingForC2C_DISPATCH(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes) +#define kbusRemoveP2PMappingForC2C_FNPTR(pKernelBus0) pKernelBus0->__kbusRemoveP2PMappingForC2C__ #define kbusRemoveP2PMappingForC2C(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes) kbusRemoveP2PMappingForC2C_DISPATCH(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes) #define kbusRemoveP2PMappingForC2C_HAL(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes) kbusRemoveP2PMappingForC2C_DISPATCH(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes) +#define kbusUnreserveP2PPeerIds_FNPTR(pKernelBus) pKernelBus->__kbusUnreserveP2PPeerIds__ #define kbusUnreserveP2PPeerIds(pGpu, pKernelBus, peerMask) kbusUnreserveP2PPeerIds_DISPATCH(pGpu, pKernelBus, peerMask) #define kbusUnreserveP2PPeerIds_HAL(pGpu, pKernelBus, peerMask) kbusUnreserveP2PPeerIds_DISPATCH(pGpu, pKernelBus, peerMask) +#define kbusIsBar1P2PCapable_FNPTR(pKernelBus) pKernelBus->__kbusIsBar1P2PCapable__ #define kbusIsBar1P2PCapable(pGpu, pKernelBus, gfid) kbusIsBar1P2PCapable_DISPATCH(pGpu, pKernelBus, gfid) #define kbusIsBar1P2PCapable_HAL(pGpu, pKernelBus, gfid) kbusIsBar1P2PCapable_DISPATCH(pGpu, pKernelBus, gfid) +#define kbusEnableStaticBar1Mapping_FNPTR(pKernelBus) pKernelBus->__kbusEnableStaticBar1Mapping__ #define kbusEnableStaticBar1Mapping(pGpu, pKernelBus, gfid) kbusEnableStaticBar1Mapping_DISPATCH(pGpu, pKernelBus, gfid) #define kbusEnableStaticBar1Mapping_HAL(pGpu, pKernelBus, gfid) kbusEnableStaticBar1Mapping_DISPATCH(pGpu, pKernelBus, gfid) +#define kbusDisableStaticBar1Mapping_FNPTR(pKernelBus) pKernelBus->__kbusDisableStaticBar1Mapping__ #define kbusDisableStaticBar1Mapping(pGpu, pKernelBus, gfid) kbusDisableStaticBar1Mapping_DISPATCH(pGpu, pKernelBus, gfid) #define kbusDisableStaticBar1Mapping_HAL(pGpu, pKernelBus, gfid) kbusDisableStaticBar1Mapping_DISPATCH(pGpu, pKernelBus, gfid) +#define kbusGetBar1P2PDmaInfo_FNPTR(pPeerKernelBus) pPeerKernelBus->__kbusGetBar1P2PDmaInfo__ #define kbusGetBar1P2PDmaInfo(pSrcGpu, pPeerGpu, pPeerKernelBus, dma_addr, dma_size) kbusGetBar1P2PDmaInfo_DISPATCH(pSrcGpu, pPeerGpu, pPeerKernelBus, dma_addr, dma_size) #define kbusGetBar1P2PDmaInfo_HAL(pSrcGpu, pPeerGpu, pPeerKernelBus, dma_addr, dma_size) kbusGetBar1P2PDmaInfo_DISPATCH(pSrcGpu, pPeerGpu, pPeerKernelBus, dma_addr, dma_size) +#define kbusUpdateStaticBar1VAMapping_FNPTR(pKernelBus) pKernelBus->__kbusUpdateStaticBar1VAMapping__ #define kbusUpdateStaticBar1VAMapping(pGpu, pKernelBus, pMemDesc, offset, length, bRelease) kbusUpdateStaticBar1VAMapping_DISPATCH(pGpu, pKernelBus, pMemDesc, offset, length, bRelease) #define kbusUpdateStaticBar1VAMapping_HAL(pGpu, pKernelBus, pMemDesc, offset, length, bRelease) kbusUpdateStaticBar1VAMapping_DISPATCH(pGpu, pKernelBus, pMemDesc, offset, length, bRelease) +#define kbusGetStaticFbAperture_FNPTR(pKernelBus) pKernelBus->__kbusGetStaticFbAperture__ #define kbusGetStaticFbAperture(pGpu, pKernelBus, pMemDesc, offset, pAperOffset, pLength, gfid) kbusGetStaticFbAperture_DISPATCH(pGpu, pKernelBus, pMemDesc, offset, pAperOffset, pLength, gfid) #define kbusGetStaticFbAperture_HAL(pGpu, pKernelBus, pMemDesc, offset, pAperOffset, pLength, gfid) kbusGetStaticFbAperture_DISPATCH(pGpu, pKernelBus, pMemDesc, offset, pAperOffset, pLength, gfid) +#define kbusCreateP2PMappingForBar1P2P_FNPTR(pKernelBus0) pKernelBus0->__kbusCreateP2PMappingForBar1P2P__ #define kbusCreateP2PMappingForBar1P2P(pGpu0, pKernelBus0, pGpu1, pKernelBus1, attributes) kbusCreateP2PMappingForBar1P2P_DISPATCH(pGpu0, pKernelBus0, pGpu1, pKernelBus1, attributes) #define kbusCreateP2PMappingForBar1P2P_HAL(pGpu0, pKernelBus0, pGpu1, pKernelBus1, attributes) kbusCreateP2PMappingForBar1P2P_DISPATCH(pGpu0, pKernelBus0, pGpu1, pKernelBus1, attributes) +#define kbusRemoveP2PMappingForBar1P2P_FNPTR(pKernelBus0) pKernelBus0->__kbusRemoveP2PMappingForBar1P2P__ #define kbusRemoveP2PMappingForBar1P2P(pGpu0, pKernelBus0, pGpu1, pKernelBus1, attributes) kbusRemoveP2PMappingForBar1P2P_DISPATCH(pGpu0, pKernelBus0, pGpu1, pKernelBus1, attributes) #define kbusRemoveP2PMappingForBar1P2P_HAL(pGpu0, pKernelBus0, pGpu1, pKernelBus1, attributes) kbusRemoveP2PMappingForBar1P2P_DISPATCH(pGpu0, pKernelBus0, pGpu1, pKernelBus1, attributes) +#define kbusHasPcieBar1P2PMapping_FNPTR(pKernelBus0) pKernelBus0->__kbusHasPcieBar1P2PMapping__ #define kbusHasPcieBar1P2PMapping(pGpu0, pKernelBus0, pGpu1, pKernelBus1) kbusHasPcieBar1P2PMapping_DISPATCH(pGpu0, pKernelBus0, pGpu1, pKernelBus1) #define kbusHasPcieBar1P2PMapping_HAL(pGpu0, pKernelBus0, pGpu1, pKernelBus1) kbusHasPcieBar1P2PMapping_DISPATCH(pGpu0, pKernelBus0, pGpu1, pKernelBus1) +#define kbusIsPcieBar1P2PMappingSupported_FNPTR(pKernelBus0) pKernelBus0->__kbusIsPcieBar1P2PMappingSupported__ #define kbusIsPcieBar1P2PMappingSupported(pGpu0, pKernelBus0, pGpu1, pKernelBus1) kbusIsPcieBar1P2PMappingSupported_DISPATCH(pGpu0, pKernelBus0, pGpu1, pKernelBus1) #define kbusIsPcieBar1P2PMappingSupported_HAL(pGpu0, pKernelBus0, pGpu1, pKernelBus1) kbusIsPcieBar1P2PMappingSupported_DISPATCH(pGpu0, pKernelBus0, pGpu1, pKernelBus1) +#define kbusCheckFlaSupportedAndInit_FNPTR(pKernelBus) pKernelBus->__kbusCheckFlaSupportedAndInit__ #define kbusCheckFlaSupportedAndInit(pGpu, pKernelBus, base, size) kbusCheckFlaSupportedAndInit_DISPATCH(pGpu, pKernelBus, base, size) #define kbusCheckFlaSupportedAndInit_HAL(pGpu, pKernelBus, base, size) kbusCheckFlaSupportedAndInit_DISPATCH(pGpu, pKernelBus, base, size) +#define kbusDetermineFlaRangeAndAllocate_FNPTR(pKernelBus) pKernelBus->__kbusDetermineFlaRangeAndAllocate__ #define kbusDetermineFlaRangeAndAllocate(pGpu, pKernelBus, base, size) kbusDetermineFlaRangeAndAllocate_DISPATCH(pGpu, pKernelBus, base, size) #define kbusDetermineFlaRangeAndAllocate_HAL(pGpu, pKernelBus, base, size) kbusDetermineFlaRangeAndAllocate_DISPATCH(pGpu, pKernelBus, base, size) -#define kbusAllocateFlaVaspace(pGpu, pKernelBus, arg0, arg1) kbusAllocateFlaVaspace_DISPATCH(pGpu, pKernelBus, arg0, arg1) -#define kbusAllocateFlaVaspace_HAL(pGpu, pKernelBus, arg0, arg1) kbusAllocateFlaVaspace_DISPATCH(pGpu, pKernelBus, arg0, arg1) -#define kbusGetFlaRange(pGpu, pKernelBus, arg0, arg1, arg2) kbusGetFlaRange_DISPATCH(pGpu, pKernelBus, arg0, arg1, arg2) -#define kbusGetFlaRange_HAL(pGpu, pKernelBus, arg0, arg1, arg2) kbusGetFlaRange_DISPATCH(pGpu, pKernelBus, arg0, arg1, arg2) -#define kbusAllocateLegacyFlaVaspace(pGpu, pKernelBus, arg0, arg1) kbusAllocateLegacyFlaVaspace_DISPATCH(pGpu, pKernelBus, arg0, arg1) -#define kbusAllocateLegacyFlaVaspace_HAL(pGpu, pKernelBus, arg0, arg1) kbusAllocateLegacyFlaVaspace_DISPATCH(pGpu, pKernelBus, arg0, arg1) -#define kbusAllocateHostManagedFlaVaspace(pGpu, pKernelBus, arg0, arg1, arg2, arg3, arg4, arg5, arg6) kbusAllocateHostManagedFlaVaspace_DISPATCH(pGpu, pKernelBus, arg0, arg1, arg2, arg3, arg4, arg5, arg6) -#define kbusAllocateHostManagedFlaVaspace_HAL(pGpu, pKernelBus, arg0, arg1, arg2, arg3, arg4, arg5, arg6) kbusAllocateHostManagedFlaVaspace_DISPATCH(pGpu, pKernelBus, arg0, arg1, arg2, arg3, arg4, arg5, arg6) +#define kbusAllocateFlaVaspace_FNPTR(pKernelBus) pKernelBus->__kbusAllocateFlaVaspace__ +#define kbusAllocateFlaVaspace(pGpu, pKernelBus, arg3, arg4) kbusAllocateFlaVaspace_DISPATCH(pGpu, pKernelBus, arg3, arg4) +#define kbusAllocateFlaVaspace_HAL(pGpu, pKernelBus, arg3, arg4) kbusAllocateFlaVaspace_DISPATCH(pGpu, pKernelBus, arg3, arg4) +#define kbusGetFlaRange_FNPTR(pKernelBus) pKernelBus->__kbusGetFlaRange__ +#define kbusGetFlaRange(pGpu, pKernelBus, arg3, arg4, arg5) kbusGetFlaRange_DISPATCH(pGpu, pKernelBus, arg3, arg4, arg5) +#define kbusGetFlaRange_HAL(pGpu, pKernelBus, arg3, arg4, arg5) kbusGetFlaRange_DISPATCH(pGpu, pKernelBus, arg3, arg4, arg5) +#define kbusAllocateLegacyFlaVaspace_FNPTR(pKernelBus) pKernelBus->__kbusAllocateLegacyFlaVaspace__ +#define kbusAllocateLegacyFlaVaspace(pGpu, pKernelBus, arg3, arg4) kbusAllocateLegacyFlaVaspace_DISPATCH(pGpu, pKernelBus, arg3, arg4) +#define kbusAllocateLegacyFlaVaspace_HAL(pGpu, pKernelBus, arg3, arg4) kbusAllocateLegacyFlaVaspace_DISPATCH(pGpu, pKernelBus, arg3, arg4) +#define kbusAllocateHostManagedFlaVaspace_FNPTR(pKernelBus) pKernelBus->__kbusAllocateHostManagedFlaVaspace__ +#define kbusAllocateHostManagedFlaVaspace(pGpu, pKernelBus, arg3, arg4, arg5, arg6, arg7, arg8, arg9) kbusAllocateHostManagedFlaVaspace_DISPATCH(pGpu, pKernelBus, arg3, arg4, arg5, arg6, arg7, arg8, arg9) +#define kbusAllocateHostManagedFlaVaspace_HAL(pGpu, pKernelBus, arg3, arg4, arg5, arg6, arg7, arg8, arg9) kbusAllocateHostManagedFlaVaspace_DISPATCH(pGpu, pKernelBus, arg3, arg4, arg5, arg6, arg7, arg8, arg9) +#define kbusDestroyFla_FNPTR(pKernelBus) pKernelBus->__kbusDestroyFla__ #define kbusDestroyFla(pGpu, pKernelBus) kbusDestroyFla_DISPATCH(pGpu, pKernelBus) #define kbusDestroyFla_HAL(pGpu, pKernelBus) kbusDestroyFla_DISPATCH(pGpu, pKernelBus) -#define kbusGetFlaVaspace(pGpu, pKernelBus, arg0) kbusGetFlaVaspace_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusGetFlaVaspace_HAL(pGpu, pKernelBus, arg0) kbusGetFlaVaspace_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusDestroyHostManagedFlaVaspace(pGpu, pKernelBus, arg0) kbusDestroyHostManagedFlaVaspace_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusDestroyHostManagedFlaVaspace_HAL(pGpu, pKernelBus, arg0) kbusDestroyHostManagedFlaVaspace_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusVerifyFlaRange(pGpu, pKernelBus, arg0, arg1) kbusVerifyFlaRange_DISPATCH(pGpu, pKernelBus, arg0, arg1) -#define kbusVerifyFlaRange_HAL(pGpu, pKernelBus, arg0, arg1) kbusVerifyFlaRange_DISPATCH(pGpu, pKernelBus, arg0, arg1) -#define kbusConstructFlaInstBlk(pGpu, pKernelBus, arg0) kbusConstructFlaInstBlk_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusConstructFlaInstBlk_HAL(pGpu, pKernelBus, arg0) kbusConstructFlaInstBlk_DISPATCH(pGpu, pKernelBus, arg0) +#define kbusGetFlaVaspace_FNPTR(pKernelBus) pKernelBus->__kbusGetFlaVaspace__ +#define kbusGetFlaVaspace(pGpu, pKernelBus, arg3) kbusGetFlaVaspace_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusGetFlaVaspace_HAL(pGpu, pKernelBus, arg3) kbusGetFlaVaspace_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusDestroyHostManagedFlaVaspace_FNPTR(pKernelBus) pKernelBus->__kbusDestroyHostManagedFlaVaspace__ +#define kbusDestroyHostManagedFlaVaspace(pGpu, pKernelBus, arg3) kbusDestroyHostManagedFlaVaspace_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusDestroyHostManagedFlaVaspace_HAL(pGpu, pKernelBus, arg3) kbusDestroyHostManagedFlaVaspace_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusVerifyFlaRange_FNPTR(pKernelBus) pKernelBus->__kbusVerifyFlaRange__ +#define kbusVerifyFlaRange(pGpu, pKernelBus, arg3, arg4) kbusVerifyFlaRange_DISPATCH(pGpu, pKernelBus, arg3, arg4) +#define kbusVerifyFlaRange_HAL(pGpu, pKernelBus, arg3, arg4) kbusVerifyFlaRange_DISPATCH(pGpu, pKernelBus, arg3, arg4) +#define kbusConstructFlaInstBlk_FNPTR(pKernelBus) pKernelBus->__kbusConstructFlaInstBlk__ +#define kbusConstructFlaInstBlk(pGpu, pKernelBus, arg3) kbusConstructFlaInstBlk_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusConstructFlaInstBlk_HAL(pGpu, pKernelBus, arg3) kbusConstructFlaInstBlk_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusDestructFlaInstBlk_FNPTR(pKernelBus) pKernelBus->__kbusDestructFlaInstBlk__ #define kbusDestructFlaInstBlk(pGpu, pKernelBus) kbusDestructFlaInstBlk_DISPATCH(pGpu, pKernelBus) #define kbusDestructFlaInstBlk_HAL(pGpu, pKernelBus) kbusDestructFlaInstBlk_DISPATCH(pGpu, pKernelBus) +#define kbusValidateFlaBaseAddress_FNPTR(pKernelBus) pKernelBus->__kbusValidateFlaBaseAddress__ #define kbusValidateFlaBaseAddress(pGpu, pKernelBus, flaBaseAddr) kbusValidateFlaBaseAddress_DISPATCH(pGpu, pKernelBus, flaBaseAddr) #define kbusValidateFlaBaseAddress_HAL(pGpu, pKernelBus, flaBaseAddr) kbusValidateFlaBaseAddress_DISPATCH(pGpu, pKernelBus, flaBaseAddr) +#define kbusSetupUnbindFla_FNPTR(pKernelBus) pKernelBus->__kbusSetupUnbindFla__ #define kbusSetupUnbindFla(pGpu, pKernelBus) kbusSetupUnbindFla_DISPATCH(pGpu, pKernelBus) #define kbusSetupUnbindFla_HAL(pGpu, pKernelBus) kbusSetupUnbindFla_DISPATCH(pGpu, pKernelBus) +#define kbusSetupBindFla_FNPTR(pKernelBus) pKernelBus->__kbusSetupBindFla__ #define kbusSetupBindFla(pGpu, pKernelBus, gfid) kbusSetupBindFla_DISPATCH(pGpu, pKernelBus, gfid) #define kbusSetupBindFla_HAL(pGpu, pKernelBus, gfid) kbusSetupBindFla_DISPATCH(pGpu, pKernelBus, gfid) +#define kbusSendSysmembarSingle_FNPTR(pKernelBus) pKernelBus->__kbusSendSysmembarSingle__ #define kbusSendSysmembarSingle(pGpu, pKernelBus) kbusSendSysmembarSingle_DISPATCH(pGpu, pKernelBus) #define kbusSendSysmembarSingle_HAL(pGpu, pKernelBus) kbusSendSysmembarSingle_DISPATCH(pGpu, pKernelBus) +#define kbusCacheBAR1ResizeSize_WAR_BUG_3249028_FNPTR(pKernelBus) pKernelBus->__kbusCacheBAR1ResizeSize_WAR_BUG_3249028__ #define kbusCacheBAR1ResizeSize_WAR_BUG_3249028(pGpu, pKernelBus) kbusCacheBAR1ResizeSize_WAR_BUG_3249028_DISPATCH(pGpu, pKernelBus) #define kbusCacheBAR1ResizeSize_WAR_BUG_3249028_HAL(pGpu, pKernelBus) kbusCacheBAR1ResizeSize_WAR_BUG_3249028_DISPATCH(pGpu, pKernelBus) +#define kbusRestoreBAR1ResizeSize_WAR_BUG_3249028_FNPTR(pKernelBus) pKernelBus->__kbusRestoreBAR1ResizeSize_WAR_BUG_3249028__ #define kbusRestoreBAR1ResizeSize_WAR_BUG_3249028(pGpu, pKernelBus) kbusRestoreBAR1ResizeSize_WAR_BUG_3249028_DISPATCH(pGpu, pKernelBus) #define kbusRestoreBAR1ResizeSize_WAR_BUG_3249028_HAL(pGpu, pKernelBus) kbusRestoreBAR1ResizeSize_WAR_BUG_3249028_DISPATCH(pGpu, pKernelBus) -#define kbusIsDirectMappingAllowed(pGpu, pKernelBus, arg0, arg1, arg2) kbusIsDirectMappingAllowed_DISPATCH(pGpu, pKernelBus, arg0, arg1, arg2) -#define kbusIsDirectMappingAllowed_HAL(pGpu, pKernelBus, arg0, arg1, arg2) kbusIsDirectMappingAllowed_DISPATCH(pGpu, pKernelBus, arg0, arg1, arg2) -#define kbusUseDirectSysmemMap(pGpu, pKernelBus, arg0, arg1) kbusUseDirectSysmemMap_DISPATCH(pGpu, pKernelBus, arg0, arg1) -#define kbusUseDirectSysmemMap_HAL(pGpu, pKernelBus, arg0, arg1) kbusUseDirectSysmemMap_DISPATCH(pGpu, pKernelBus, arg0, arg1) +#define kbusIsDirectMappingAllowed_FNPTR(pKernelBus) pKernelBus->__kbusIsDirectMappingAllowed__ +#define kbusIsDirectMappingAllowed(pGpu, pKernelBus, arg3, arg4, arg5) kbusIsDirectMappingAllowed_DISPATCH(pGpu, pKernelBus, arg3, arg4, arg5) +#define kbusIsDirectMappingAllowed_HAL(pGpu, pKernelBus, arg3, arg4, arg5) kbusIsDirectMappingAllowed_DISPATCH(pGpu, pKernelBus, arg3, arg4, arg5) +#define kbusUseDirectSysmemMap_FNPTR(pKernelBus) pKernelBus->__kbusUseDirectSysmemMap__ +#define kbusUseDirectSysmemMap(pGpu, pKernelBus, arg3, arg4) kbusUseDirectSysmemMap_DISPATCH(pGpu, pKernelBus, arg3, arg4) +#define kbusUseDirectSysmemMap_HAL(pGpu, pKernelBus, arg3, arg4) kbusUseDirectSysmemMap_DISPATCH(pGpu, pKernelBus, arg3, arg4) +#define kbusMemCopyBar0Window_FNPTR(pKernelBus) pKernelBus->__kbusMemCopyBar0Window__ #define kbusMemCopyBar0Window(pGpu, pKernelBus, physAddr, pData, copySize, bRead) kbusMemCopyBar0Window_DISPATCH(pGpu, pKernelBus, physAddr, pData, copySize, bRead) #define kbusMemCopyBar0Window_HAL(pGpu, pKernelBus, physAddr, pData, copySize, bRead) kbusMemCopyBar0Window_DISPATCH(pGpu, pKernelBus, physAddr, pData, copySize, bRead) +#define kbusWriteBAR0WindowBase_FNPTR(pKernelBus) pKernelBus->__kbusWriteBAR0WindowBase__ #define kbusWriteBAR0WindowBase(pGpu, pKernelBus, base) kbusWriteBAR0WindowBase_DISPATCH(pGpu, pKernelBus, base) #define kbusWriteBAR0WindowBase_HAL(pGpu, pKernelBus, base) kbusWriteBAR0WindowBase_DISPATCH(pGpu, pKernelBus, base) +#define kbusReadBAR0WindowBase_FNPTR(pKernelBus) pKernelBus->__kbusReadBAR0WindowBase__ #define kbusReadBAR0WindowBase(pGpu, pKernelBus) kbusReadBAR0WindowBase_DISPATCH(pGpu, pKernelBus) #define kbusReadBAR0WindowBase_HAL(pGpu, pKernelBus) kbusReadBAR0WindowBase_DISPATCH(pGpu, pKernelBus) +#define kbusValidateBAR0WindowBase_FNPTR(pKernelBus) pKernelBus->__kbusValidateBAR0WindowBase__ #define kbusValidateBAR0WindowBase(pGpu, pKernelBus, base) kbusValidateBAR0WindowBase_DISPATCH(pGpu, pKernelBus, base) #define kbusValidateBAR0WindowBase_HAL(pGpu, pKernelBus, base) kbusValidateBAR0WindowBase_DISPATCH(pGpu, pKernelBus, base) +#define kbusSetBAR0WindowVidOffset_FNPTR(pKernelBus) pKernelBus->__kbusSetBAR0WindowVidOffset__ #define kbusSetBAR0WindowVidOffset(pGpu, pKernelBus, vidOffset) kbusSetBAR0WindowVidOffset_DISPATCH(pGpu, pKernelBus, vidOffset) #define kbusSetBAR0WindowVidOffset_HAL(pGpu, pKernelBus, vidOffset) kbusSetBAR0WindowVidOffset_DISPATCH(pGpu, pKernelBus, vidOffset) +#define kbusGetBAR0WindowVidOffset_FNPTR(pKernelBus) pKernelBus->__kbusGetBAR0WindowVidOffset__ #define kbusGetBAR0WindowVidOffset(pGpu, pKernelBus) kbusGetBAR0WindowVidOffset_DISPATCH(pGpu, pKernelBus) #define kbusGetBAR0WindowVidOffset_HAL(pGpu, pKernelBus) kbusGetBAR0WindowVidOffset_DISPATCH(pGpu, pKernelBus) -#define kbusSetupBar0WindowBeforeBar2Bootstrap(pGpu, pKernelBus, arg0) kbusSetupBar0WindowBeforeBar2Bootstrap_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusSetupBar0WindowBeforeBar2Bootstrap_HAL(pGpu, pKernelBus, arg0) kbusSetupBar0WindowBeforeBar2Bootstrap_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusRestoreBar0WindowAfterBar2Bootstrap(pGpu, pKernelBus, arg0) kbusRestoreBar0WindowAfterBar2Bootstrap_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusRestoreBar0WindowAfterBar2Bootstrap_HAL(pGpu, pKernelBus, arg0) kbusRestoreBar0WindowAfterBar2Bootstrap_DISPATCH(pGpu, pKernelBus, arg0) +#define kbusSetupBar0WindowBeforeBar2Bootstrap_FNPTR(pKernelBus) pKernelBus->__kbusSetupBar0WindowBeforeBar2Bootstrap__ +#define kbusSetupBar0WindowBeforeBar2Bootstrap(pGpu, pKernelBus, arg3) kbusSetupBar0WindowBeforeBar2Bootstrap_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusSetupBar0WindowBeforeBar2Bootstrap_HAL(pGpu, pKernelBus, arg3) kbusSetupBar0WindowBeforeBar2Bootstrap_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusRestoreBar0WindowAfterBar2Bootstrap_FNPTR(pKernelBus) pKernelBus->__kbusRestoreBar0WindowAfterBar2Bootstrap__ +#define kbusRestoreBar0WindowAfterBar2Bootstrap(pGpu, pKernelBus, arg3) kbusRestoreBar0WindowAfterBar2Bootstrap_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusRestoreBar0WindowAfterBar2Bootstrap_HAL(pGpu, pKernelBus, arg3) kbusRestoreBar0WindowAfterBar2Bootstrap_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusVerifyBar2_FNPTR(pKernelBus) pKernelBus->__kbusVerifyBar2__ #define kbusVerifyBar2(pGpu, pKernelBus, memDescIn, pCpuPtrIn, offset, size) kbusVerifyBar2_DISPATCH(pGpu, pKernelBus, memDescIn, pCpuPtrIn, offset, size) #define kbusVerifyBar2_HAL(pGpu, pKernelBus, memDescIn, pCpuPtrIn, offset, size) kbusVerifyBar2_DISPATCH(pGpu, pKernelBus, memDescIn, pCpuPtrIn, offset, size) +#define kbusBar2BootStrapInPhysicalMode_FNPTR(pKernelBus) pKernelBus->__kbusBar2BootStrapInPhysicalMode__ #define kbusBar2BootStrapInPhysicalMode(pGpu, pKernelBus) kbusBar2BootStrapInPhysicalMode_DISPATCH(pGpu, pKernelBus) #define kbusBar2BootStrapInPhysicalMode_HAL(pGpu, pKernelBus) kbusBar2BootStrapInPhysicalMode_DISPATCH(pGpu, pKernelBus) -#define kbusBindBar2(pGpu, pKernelBus, arg0) kbusBindBar2_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusBindBar2_HAL(pGpu, pKernelBus, arg0) kbusBindBar2_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusInstBlkWriteAddrLimit(pGpu, pKernelBus, arg0, arg1, arg2, arg3) kbusInstBlkWriteAddrLimit_DISPATCH(pGpu, pKernelBus, arg0, arg1, arg2, arg3) -#define kbusInstBlkWriteAddrLimit_HAL(pGpu, pKernelBus, arg0, arg1, arg2, arg3) kbusInstBlkWriteAddrLimit_DISPATCH(pGpu, pKernelBus, arg0, arg1, arg2, arg3) +#define kbusBindBar2_FNPTR(pKernelBus) pKernelBus->__kbusBindBar2__ +#define kbusBindBar2(pGpu, pKernelBus, arg3) kbusBindBar2_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusBindBar2_HAL(pGpu, pKernelBus, arg3) kbusBindBar2_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusInstBlkWriteAddrLimit_FNPTR(pKernelBus) pKernelBus->__kbusInstBlkWriteAddrLimit__ +#define kbusInstBlkWriteAddrLimit(pGpu, pKernelBus, arg3, arg4, arg5, arg6) kbusInstBlkWriteAddrLimit_DISPATCH(pGpu, pKernelBus, arg3, arg4, arg5, arg6) +#define kbusInstBlkWriteAddrLimit_HAL(pGpu, pKernelBus, arg3, arg4, arg5, arg6) kbusInstBlkWriteAddrLimit_DISPATCH(pGpu, pKernelBus, arg3, arg4, arg5, arg6) +#define kbusInitInstBlk_FNPTR(pKernelBus) pKernelBus->__kbusInitInstBlk__ #define kbusInitInstBlk(pGpu, pKernelBus, pInstBlkMemDesc, pPDB, vaLimit, bigPageSize, pVAS) kbusInitInstBlk_DISPATCH(pGpu, pKernelBus, pInstBlkMemDesc, pPDB, vaLimit, bigPageSize, pVAS) #define kbusInitInstBlk_HAL(pGpu, pKernelBus, pInstBlkMemDesc, pPDB, vaLimit, bigPageSize, pVAS) kbusInitInstBlk_DISPATCH(pGpu, pKernelBus, pInstBlkMemDesc, pPDB, vaLimit, bigPageSize, pVAS) +#define kbusBar2InstBlkWrite_FNPTR(pKernelBus) pKernelBus->__kbusBar2InstBlkWrite__ #define kbusBar2InstBlkWrite(pGpu, pKernelBus, pMap, pPDB, vaLimit, bigPageSize) kbusBar2InstBlkWrite_DISPATCH(pGpu, pKernelBus, pMap, pPDB, vaLimit, bigPageSize) #define kbusBar2InstBlkWrite_HAL(pGpu, pKernelBus, pMap, pPDB, vaLimit, bigPageSize) kbusBar2InstBlkWrite_DISPATCH(pGpu, pKernelBus, pMap, pPDB, vaLimit, bigPageSize) +#define kbusSetupBar2PageTablesAtBottomOfFb_FNPTR(pKernelBus) pKernelBus->__kbusSetupBar2PageTablesAtBottomOfFb__ #define kbusSetupBar2PageTablesAtBottomOfFb(pGpu, pKernelBus, gfid) kbusSetupBar2PageTablesAtBottomOfFb_DISPATCH(pGpu, pKernelBus, gfid) #define kbusSetupBar2PageTablesAtBottomOfFb_HAL(pGpu, pKernelBus, gfid) kbusSetupBar2PageTablesAtBottomOfFb_DISPATCH(pGpu, pKernelBus, gfid) +#define kbusTeardownBar2PageTablesAtBottomOfFb_FNPTR(pKernelBus) pKernelBus->__kbusTeardownBar2PageTablesAtBottomOfFb__ #define kbusTeardownBar2PageTablesAtBottomOfFb(pGpu, pKernelBus, gfid) kbusTeardownBar2PageTablesAtBottomOfFb_DISPATCH(pGpu, pKernelBus, gfid) #define kbusTeardownBar2PageTablesAtBottomOfFb_HAL(pGpu, pKernelBus, gfid) kbusTeardownBar2PageTablesAtBottomOfFb_DISPATCH(pGpu, pKernelBus, gfid) +#define kbusSetupBar2InstBlkAtBottomOfFb_FNPTR(pKernelBus) pKernelBus->__kbusSetupBar2InstBlkAtBottomOfFb__ #define kbusSetupBar2InstBlkAtBottomOfFb(pGpu, pKernelBus, pPDB, vaLimit, bigPageSize, gfid) kbusSetupBar2InstBlkAtBottomOfFb_DISPATCH(pGpu, pKernelBus, pPDB, vaLimit, bigPageSize, gfid) #define kbusSetupBar2InstBlkAtBottomOfFb_HAL(pGpu, pKernelBus, pPDB, vaLimit, bigPageSize, gfid) kbusSetupBar2InstBlkAtBottomOfFb_DISPATCH(pGpu, pKernelBus, pPDB, vaLimit, bigPageSize, gfid) +#define kbusTeardownBar2InstBlkAtBottomOfFb_FNPTR(pKernelBus) pKernelBus->__kbusTeardownBar2InstBlkAtBottomOfFb__ #define kbusTeardownBar2InstBlkAtBottomOfFb(pGpu, pKernelBus, gfid) kbusTeardownBar2InstBlkAtBottomOfFb_DISPATCH(pGpu, pKernelBus, gfid) #define kbusTeardownBar2InstBlkAtBottomOfFb_HAL(pGpu, pKernelBus, gfid) kbusTeardownBar2InstBlkAtBottomOfFb_DISPATCH(pGpu, pKernelBus, gfid) +#define kbusSetupBar2PageTablesAtTopOfFb_FNPTR(pKernelBus) pKernelBus->__kbusSetupBar2PageTablesAtTopOfFb__ #define kbusSetupBar2PageTablesAtTopOfFb(pGpu, pKernelBus, gfid) kbusSetupBar2PageTablesAtTopOfFb_DISPATCH(pGpu, pKernelBus, gfid) #define kbusSetupBar2PageTablesAtTopOfFb_HAL(pGpu, pKernelBus, gfid) kbusSetupBar2PageTablesAtTopOfFb_DISPATCH(pGpu, pKernelBus, gfid) +#define kbusCommitBar2PDEs_FNPTR(pKernelBus) pKernelBus->__kbusCommitBar2PDEs__ #define kbusCommitBar2PDEs(pGpu, pKernelBus) kbusCommitBar2PDEs_DISPATCH(pGpu, pKernelBus) #define kbusCommitBar2PDEs_HAL(pGpu, pKernelBus) kbusCommitBar2PDEs_DISPATCH(pGpu, pKernelBus) +#define kbusVerifyCoherentLink_FNPTR(pKernelBus) pKernelBus->__kbusVerifyCoherentLink__ #define kbusVerifyCoherentLink(pGpu, pKernelBus) kbusVerifyCoherentLink_DISPATCH(pGpu, pKernelBus) #define kbusVerifyCoherentLink_HAL(pGpu, pKernelBus) kbusVerifyCoherentLink_DISPATCH(pGpu, pKernelBus) +#define kbusTeardownMailbox_FNPTR(pKernelBus) pKernelBus->__kbusTeardownMailbox__ #define kbusTeardownMailbox(pGpu, pKernelBus) kbusTeardownMailbox_DISPATCH(pGpu, pKernelBus) #define kbusTeardownMailbox_HAL(pGpu, pKernelBus) kbusTeardownMailbox_DISPATCH(pGpu, pKernelBus) +#define kbusBar1InstBlkVasUpdate_FNPTR(pKernelBus) pKernelBus->__kbusBar1InstBlkVasUpdate__ #define kbusBar1InstBlkVasUpdate(pGpu, pKernelBus) kbusBar1InstBlkVasUpdate_DISPATCH(pGpu, pKernelBus) #define kbusBar1InstBlkVasUpdate_HAL(pGpu, pKernelBus) kbusBar1InstBlkVasUpdate_DISPATCH(pGpu, pKernelBus) +#define kbusFlushPcieForBar0Doorbell_FNPTR(pKernelBus) pKernelBus->__kbusFlushPcieForBar0Doorbell__ #define kbusFlushPcieForBar0Doorbell(pGpu, pKernelBus) kbusFlushPcieForBar0Doorbell_DISPATCH(pGpu, pKernelBus) #define kbusFlushPcieForBar0Doorbell_HAL(pGpu, pKernelBus) kbusFlushPcieForBar0Doorbell_DISPATCH(pGpu, pKernelBus) +#define kbusCreateCoherentCpuMapping_FNPTR(pKernelBus) pKernelBus->__kbusCreateCoherentCpuMapping__ #define kbusCreateCoherentCpuMapping(pGpu, pKernelBus, numaOnlineMemorySize, bFlush) kbusCreateCoherentCpuMapping_DISPATCH(pGpu, pKernelBus, numaOnlineMemorySize, bFlush) #define kbusCreateCoherentCpuMapping_HAL(pGpu, pKernelBus, numaOnlineMemorySize, bFlush) kbusCreateCoherentCpuMapping_DISPATCH(pGpu, pKernelBus, numaOnlineMemorySize, bFlush) -#define kbusMapCoherentCpuMapping(pGpu, pKernelBus, arg0) kbusMapCoherentCpuMapping_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusMapCoherentCpuMapping_HAL(pGpu, pKernelBus, arg0) kbusMapCoherentCpuMapping_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusUnmapCoherentCpuMapping(pGpu, pKernelBus, arg0) kbusUnmapCoherentCpuMapping_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusUnmapCoherentCpuMapping_HAL(pGpu, pKernelBus, arg0) kbusUnmapCoherentCpuMapping_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusTeardownCoherentCpuMapping(pGpu, pKernelBus, arg0) kbusTeardownCoherentCpuMapping_DISPATCH(pGpu, pKernelBus, arg0) -#define kbusTeardownCoherentCpuMapping_HAL(pGpu, pKernelBus, arg0) kbusTeardownCoherentCpuMapping_DISPATCH(pGpu, pKernelBus, arg0) +#define kbusMapCoherentCpuMapping_FNPTR(pKernelBus) pKernelBus->__kbusMapCoherentCpuMapping__ +#define kbusMapCoherentCpuMapping(pGpu, pKernelBus, pMemDesc, offset, length, protect, ppAddress, ppPriv) kbusMapCoherentCpuMapping_DISPATCH(pGpu, pKernelBus, pMemDesc, offset, length, protect, ppAddress, ppPriv) +#define kbusMapCoherentCpuMapping_HAL(pGpu, pKernelBus, pMemDesc, offset, length, protect, ppAddress, ppPriv) kbusMapCoherentCpuMapping_DISPATCH(pGpu, pKernelBus, pMemDesc, offset, length, protect, ppAddress, ppPriv) +#define kbusUnmapCoherentCpuMapping_FNPTR(pKernelBus) pKernelBus->__kbusUnmapCoherentCpuMapping__ +#define kbusUnmapCoherentCpuMapping(pGpu, pKernelBus, pMemDesc, pAddress, pPriv) kbusUnmapCoherentCpuMapping_DISPATCH(pGpu, pKernelBus, pMemDesc, pAddress, pPriv) +#define kbusUnmapCoherentCpuMapping_HAL(pGpu, pKernelBus, pMemDesc, pAddress, pPriv) kbusUnmapCoherentCpuMapping_DISPATCH(pGpu, pKernelBus, pMemDesc, pAddress, pPriv) +#define kbusTeardownCoherentCpuMapping_FNPTR(pKernelBus) pKernelBus->__kbusTeardownCoherentCpuMapping__ +#define kbusTeardownCoherentCpuMapping(pGpu, pKernelBus, arg3) kbusTeardownCoherentCpuMapping_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusTeardownCoherentCpuMapping_HAL(pGpu, pKernelBus, arg3) kbusTeardownCoherentCpuMapping_DISPATCH(pGpu, pKernelBus, arg3) +#define kbusBar1InstBlkBind_FNPTR(pKernelBus) pKernelBus->__kbusBar1InstBlkBind__ #define kbusBar1InstBlkBind(pGpu, pKernelBus) kbusBar1InstBlkBind_DISPATCH(pGpu, pKernelBus) #define kbusBar1InstBlkBind_HAL(pGpu, pKernelBus) kbusBar1InstBlkBind_DISPATCH(pGpu, pKernelBus) +#define kbusGetEccCounts_FNPTR(pKernelBus) pKernelBus->__kbusGetEccCounts__ #define kbusGetEccCounts(pGpu, pKernelBus) kbusGetEccCounts_DISPATCH(pGpu, pKernelBus) #define kbusGetEccCounts_HAL(pGpu, pKernelBus) kbusGetEccCounts_DISPATCH(pGpu, pKernelBus) -#define kbusStateInitUnlocked(pGpu, pEngstate) kbusStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kbusInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define kbusInitMissing(pGpu, pEngstate) kbusInitMissing_DISPATCH(pGpu, pEngstate) +#define kbusStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define kbusStatePreInitUnlocked(pGpu, pEngstate) kbusStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kbusStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kbusStateInitUnlocked(pGpu, pEngstate) kbusStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kbusIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define kbusIsPresent(pGpu, pEngstate) kbusIsPresent_DISPATCH(pGpu, pEngstate) -NV_STATUS kbusConstructHal_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); +// Dispatch functions +static inline NV_STATUS kbusInitBarsSize_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusInitBarsSize__(pGpu, pKernelBus); +} -#ifdef __nvoc_kern_bus_h_disabled -static inline NV_STATUS kbusConstructHal(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kbusConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, ENGDESCRIPTOR arg3) { + return pKernelBus->__kbusConstructEngine__(pGpu, pKernelBus, arg3); } -#else //__nvoc_kern_bus_h_disabled -#define kbusConstructHal(pGpu, pKernelBus) kbusConstructHal_GM107(pGpu, pKernelBus) -#endif //__nvoc_kern_bus_h_disabled -#define kbusConstructHal_HAL(pGpu, pKernelBus) kbusConstructHal(pGpu, pKernelBus) +static inline NV_STATUS kbusStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusStatePreInitLocked__(pGpu, pKernelBus); +} -NvU64 kbusGetBar1ResvdVA_TU102(struct KernelBus *pKernelBus); +static inline NV_STATUS kbusStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusStateInitLocked__(pGpu, pKernelBus); +} +static inline NV_STATUS kbusStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg3) { + return pKernelBus->__kbusStatePreLoad__(pGpu, pKernelBus, arg3); +} -#ifdef __nvoc_kern_bus_h_disabled -static inline NvU64 kbusGetBar1ResvdVA(struct KernelBus *pKernelBus) { - NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); - return 0; +static inline NV_STATUS kbusStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg3) { + return pKernelBus->__kbusStateLoad__(pGpu, pKernelBus, arg3); } -#else //__nvoc_kern_bus_h_disabled -#define kbusGetBar1ResvdVA(pKernelBus) kbusGetBar1ResvdVA_TU102(pKernelBus) -#endif //__nvoc_kern_bus_h_disabled -#define kbusGetBar1ResvdVA_HAL(pKernelBus) kbusGetBar1ResvdVA(pKernelBus) +static inline NV_STATUS kbusStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg3) { + return pKernelBus->__kbusStatePostLoad__(pGpu, pKernelBus, arg3); +} -NV_STATUS kbusStateInitLockedKernel_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); +static inline NV_STATUS kbusStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg3) { + return pKernelBus->__kbusStatePreUnload__(pGpu, pKernelBus, arg3); +} +static inline NV_STATUS kbusStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 flags) { + return pKernelBus->__kbusStateUnload__(pGpu, pKernelBus, flags); +} -#ifdef __nvoc_kern_bus_h_disabled -static inline NV_STATUS kbusStateInitLockedKernel(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kbusStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 flags) { + return pKernelBus->__kbusStatePostUnload__(pGpu, pKernelBus, flags); } -#else //__nvoc_kern_bus_h_disabled -#define kbusStateInitLockedKernel(pGpu, pKernelBus) kbusStateInitLockedKernel_GM107(pGpu, pKernelBus) -#endif //__nvoc_kern_bus_h_disabled -#define kbusStateInitLockedKernel_HAL(pGpu, pKernelBus) kbusStateInitLockedKernel(pGpu, pKernelBus) +static inline void kbusStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + pKernelBus->__kbusStateDestroy__(pGpu, pKernelBus); +} -static inline NV_STATUS kbusStateInitLockedPhysical_56cd7a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return NV_OK; +static inline NvBool kbusBar2IsReady_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusBar2IsReady__(pGpu, pKernelBus); } -NV_STATUS kbusStateInitLockedPhysical_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); +static inline NvU8 * kbusMapBar2Aperture_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU32 transfer_flags) { + return pKernelBus->__kbusMapBar2Aperture__(pGpu, pKernelBus, pMemDesc, transfer_flags); +} +static inline NvU8 * kbusValidateBar2ApertureMapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU8 *p) { + return pKernelBus->__kbusValidateBar2ApertureMapping__(pGpu, pKernelBus, pMemDesc, p); +} -#ifdef __nvoc_kern_bus_h_disabled -static inline NV_STATUS kbusStateInitLockedPhysical(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline void kbusUnmapBar2ApertureWithFlags_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU8 **pCpuPtr, NvU32 flags) { + pKernelBus->__kbusUnmapBar2ApertureWithFlags__(pGpu, pKernelBus, pMemDesc, pCpuPtr, flags); } -#else //__nvoc_kern_bus_h_disabled -#define kbusStateInitLockedPhysical(pGpu, pKernelBus) kbusStateInitLockedPhysical_56cd7a(pGpu, pKernelBus) -#endif //__nvoc_kern_bus_h_disabled -#define kbusStateInitLockedPhysical_HAL(pGpu, pKernelBus) kbusStateInitLockedPhysical(pGpu, pKernelBus) +static inline NvU64 kbusGetVaLimitForBar2_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusGetVaLimitForBar2__(pGpu, pKernelBus); +} -NV_STATUS kbusMemoryCopy_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg0, NvU64 arg1, PMEMORY_DESCRIPTOR arg2, NvU64 arg3, NvU64 arg4); +static inline void kbusCalcCpuInvisibleBar2Range_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { + pKernelBus->__kbusCalcCpuInvisibleBar2Range__(pGpu, pKernelBus, gfid); +} +static inline NvU32 kbusCalcCpuInvisibleBar2ApertureSize_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusCalcCpuInvisibleBar2ApertureSize__(pGpu, pKernelBus); +} -#ifdef __nvoc_kern_bus_h_disabled -static inline NV_STATUS kbusMemoryCopy(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg0, NvU64 arg1, PMEMORY_DESCRIPTOR arg2, NvU64 arg3, NvU64 arg4) { - NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kbusCommitBar2_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 flags) { + return pKernelBus->__kbusCommitBar2__(pGpu, pKernelBus, flags); } -#else //__nvoc_kern_bus_h_disabled -#define kbusMemoryCopy(pGpu, pKernelBus, arg0, arg1, arg2, arg3, arg4) kbusMemoryCopy_GM107(pGpu, pKernelBus, arg0, arg1, arg2, arg3, arg4) -#endif //__nvoc_kern_bus_h_disabled -#define kbusMemoryCopy_HAL(pGpu, pKernelBus, arg0, arg1, arg2, arg3, arg4) kbusMemoryCopy(pGpu, pKernelBus, arg0, arg1, arg2, arg3, arg4) +static inline NV_STATUS kbusRewritePTEsForExistingMapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc) { + return pKernelBus->__kbusRewritePTEsForExistingMapping__(pGpu, pKernelBus, pMemDesc); +} -NV_STATUS kbusPrepareForXVEReset_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); +static inline NV_STATUS kbusPatchBar1Pdb_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusPatchBar1Pdb__(pGpu, pKernelBus); +} +static inline NV_STATUS kbusPatchBar2Pdb_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusPatchBar2Pdb__(pGpu, pKernelBus); +} -#ifdef __nvoc_kern_bus_h_disabled -static inline NV_STATUS kbusPrepareForXVEReset(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kbusConstructVirtualBar2CpuInvisibleHeap_DISPATCH(struct KernelBus *pKernelBus, NvU32 gfid) { + return pKernelBus->__kbusConstructVirtualBar2CpuInvisibleHeap__(pKernelBus, gfid); } -#else //__nvoc_kern_bus_h_disabled -#define kbusPrepareForXVEReset(pGpu, pKernelBus) kbusPrepareForXVEReset_GM107(pGpu, pKernelBus) -#endif //__nvoc_kern_bus_h_disabled -#define kbusPrepareForXVEReset_HAL(pGpu, pKernelBus) kbusPrepareForXVEReset(pGpu, pKernelBus) +static inline NV_STATUS kbusMapCpuInvisibleBar2Aperture_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 *pVaddr, NvU64 allocSize, NvU32 allocFlags, NvU32 gfid) { + return pKernelBus->__kbusMapCpuInvisibleBar2Aperture__(pGpu, pKernelBus, pMemDesc, pVaddr, allocSize, allocFlags, gfid); +} -NV_STATUS kbusUpdateRmAperture_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg0, NvU64 arg1, NvU64 arg2, NvU32 arg3); +static inline void kbusUnmapCpuInvisibleBar2Aperture_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 vAddr, NvU32 gfid) { + pKernelBus->__kbusUnmapCpuInvisibleBar2Aperture__(pGpu, pKernelBus, pMemDesc, vAddr, gfid); +} +static inline NV_STATUS kbusTeardownBar2CpuAperture_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { + return pKernelBus->__kbusTeardownBar2CpuAperture__(pGpu, pKernelBus, gfid); +} -#ifdef __nvoc_kern_bus_h_disabled -static inline NV_STATUS kbusUpdateRmAperture(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg0, NvU64 arg1, NvU64 arg2, NvU32 arg3) { - NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline void kbusGetP2PMailboxAttributes_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 *pMailboxAreaSize, NvU32 *pMailboxAlignmentSize, NvU32 *pMailboxMaxOffset64KB) { + pKernelBus->__kbusGetP2PMailboxAttributes__(pGpu, pKernelBus, pMailboxAreaSize, pMailboxAlignmentSize, pMailboxMaxOffset64KB); } -#else //__nvoc_kern_bus_h_disabled -#define kbusUpdateRmAperture(pGpu, pKernelBus, arg0, arg1, arg2, arg3) kbusUpdateRmAperture_GM107(pGpu, pKernelBus, arg0, arg1, arg2, arg3) -#endif //__nvoc_kern_bus_h_disabled -#define kbusUpdateRmAperture_HAL(pGpu, pKernelBus, arg0, arg1, arg2, arg3) kbusUpdateRmAperture(pGpu, pKernelBus, arg0, arg1, arg2, arg3) +static inline NV_STATUS kbusCreateP2PMapping_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 *peer0, NvU32 *peer1, NvU32 attributes) { + return pKernelBus0->__kbusCreateP2PMapping__(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes); +} -NV_STATUS kbusSetupBar2GpuVaSpace_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); +static inline NV_STATUS kbusRemoveP2PMapping_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 peer0, NvU32 peer1, NvU32 attributes) { + return pKernelBus0->__kbusRemoveP2PMapping__(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes); +} +static inline NvU32 kbusGetEgmPeerId_DISPATCH(struct OBJGPU *pLocalGpu, struct KernelBus *pLocalKernelBus, struct OBJGPU *pRemoteGpu) { + return pLocalKernelBus->__kbusGetEgmPeerId__(pLocalGpu, pLocalKernelBus, pRemoteGpu); +} -#ifdef __nvoc_kern_bus_h_disabled -static inline NV_STATUS kbusSetupBar2GpuVaSpace(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { - NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NvU32 kbusGetPeerId_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJGPU *pPeerGpu) { + return pKernelBus->__kbusGetPeerId__(pGpu, pKernelBus, pPeerGpu); } -#else //__nvoc_kern_bus_h_disabled -#define kbusSetupBar2GpuVaSpace(pGpu, pKernelBus, gfid) kbusSetupBar2GpuVaSpace_GM107(pGpu, pKernelBus, gfid) -#endif //__nvoc_kern_bus_h_disabled -#define kbusSetupBar2GpuVaSpace_HAL(pGpu, pKernelBus, gfid) kbusSetupBar2GpuVaSpace(pGpu, pKernelBus, gfid) +static inline NvU32 kbusGetNvlinkPeerId_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJGPU *pPeerGpu) { + return pKernelBus->__kbusGetNvlinkPeerId__(pGpu, pKernelBus, pPeerGpu); +} -NV_STATUS kbusTeardownBar2GpuVaSpace_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); +static inline NvU32 kbusGetNvSwitchPeerId_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusGetNvSwitchPeerId__(pGpu, pKernelBus); +} +static inline NvU32 kbusGetUnusedPciePeerId_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusGetUnusedPciePeerId__(pGpu, pKernelBus); +} -#ifdef __nvoc_kern_bus_h_disabled -static inline NV_STATUS kbusTeardownBar2GpuVaSpace(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { - NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kbusIsPeerIdValid_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 peerId) { + return pKernelBus->__kbusIsPeerIdValid__(pGpu, pKernelBus, peerId); } -#else //__nvoc_kern_bus_h_disabled -#define kbusTeardownBar2GpuVaSpace(pGpu, pKernelBus, gfid) kbusTeardownBar2GpuVaSpace_GM107(pGpu, pKernelBus, gfid) -#endif //__nvoc_kern_bus_h_disabled -#define kbusTeardownBar2GpuVaSpace_HAL(pGpu, pKernelBus, gfid) kbusTeardownBar2GpuVaSpace(pGpu, pKernelBus, gfid) +static inline NV_STATUS kbusGetNvlinkP2PPeerId_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 *nvlinkPeer, NvU32 attributes) { + return pKernelBus0->__kbusGetNvlinkP2PPeerId__(pGpu0, pKernelBus0, pGpu1, pKernelBus1, nvlinkPeer, attributes); +} -NvU32 kbusGetSizeOfBar2PageTables_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); +static inline void kbusWriteP2PWmbTag_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 remote2Local, NvU64 p2pWmbTag) { + pKernelBus->__kbusWriteP2PWmbTag__(pGpu, pKernelBus, remote2Local, p2pWmbTag); +} +static inline RmPhysAddr kbusSetupP2PDomainAccess_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, PMEMORY_DESCRIPTOR *ppP2PDomMemDesc) { + return pKernelBus0->__kbusSetupP2PDomainAccess__(pGpu0, pKernelBus0, pGpu1, ppP2PDomMemDesc); +} -#ifdef __nvoc_kern_bus_h_disabled -static inline NvU32 kbusGetSizeOfBar2PageTables(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); - return 0; +static inline NvBool kbusNeedWarForBug999673_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJGPU *pRemoteGpu) { + return pKernelBus->__kbusNeedWarForBug999673__(pGpu, pKernelBus, pRemoteGpu); } -#else //__nvoc_kern_bus_h_disabled -#define kbusGetSizeOfBar2PageTables(pGpu, pKernelBus) kbusGetSizeOfBar2PageTables_GM107(pGpu, pKernelBus) -#endif //__nvoc_kern_bus_h_disabled -#define kbusGetSizeOfBar2PageTables_HAL(pGpu, pKernelBus) kbusGetSizeOfBar2PageTables(pGpu, pKernelBus) +static inline NV_STATUS kbusCreateP2PMappingForC2C_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 *peer0, NvU32 *peer1, NvU32 attributes) { + return pKernelBus0->__kbusCreateP2PMappingForC2C__(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes); +} -NvU32 kbusGetSizeOfBar2PageDirs_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); +static inline NV_STATUS kbusRemoveP2PMappingForC2C_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 peer0, NvU32 peer1, NvU32 attributes) { + return pKernelBus0->__kbusRemoveP2PMappingForC2C__(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes); +} +static inline NV_STATUS kbusUnreserveP2PPeerIds_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 peerMask) { + return pKernelBus->__kbusUnreserveP2PPeerIds__(pGpu, pKernelBus, peerMask); +} -#ifdef __nvoc_kern_bus_h_disabled -static inline NvU32 kbusGetSizeOfBar2PageDirs(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); - return 0; +static inline NvBool kbusIsBar1P2PCapable_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { + return pKernelBus->__kbusIsBar1P2PCapable__(pGpu, pKernelBus, gfid); } -#else //__nvoc_kern_bus_h_disabled -#define kbusGetSizeOfBar2PageDirs(pGpu, pKernelBus) kbusGetSizeOfBar2PageDirs_GM107(pGpu, pKernelBus) -#endif //__nvoc_kern_bus_h_disabled -#define kbusGetSizeOfBar2PageDirs_HAL(pGpu, pKernelBus) kbusGetSizeOfBar2PageDirs(pGpu, pKernelBus) +static inline NV_STATUS kbusEnableStaticBar1Mapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { + return pKernelBus->__kbusEnableStaticBar1Mapping__(pGpu, pKernelBus, gfid); +} -static inline NvU64 kbusGetCpuInvisibleBar2BaseAdjust_cb032a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return 0ULL; +static inline void kbusDisableStaticBar1Mapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { + pKernelBus->__kbusDisableStaticBar1Mapping__(pGpu, pKernelBus, gfid); } -NvU64 kbusGetCpuInvisibleBar2BaseAdjust_TU102(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); +static inline NV_STATUS kbusGetBar1P2PDmaInfo_DISPATCH(struct OBJGPU *pSrcGpu, struct OBJGPU *pPeerGpu, struct KernelBus *pPeerKernelBus, NvU64 *dma_addr, NvU64 *dma_size) { + return pPeerKernelBus->__kbusGetBar1P2PDmaInfo__(pSrcGpu, pPeerGpu, pPeerKernelBus, dma_addr, dma_size); +} +static inline NV_STATUS kbusUpdateStaticBar1VAMapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 offset, NvU64 length, NvBool bRelease) { + return pKernelBus->__kbusUpdateStaticBar1VAMapping__(pGpu, pKernelBus, pMemDesc, offset, length, bRelease); +} -#ifdef __nvoc_kern_bus_h_disabled -static inline NvU64 kbusGetCpuInvisibleBar2BaseAdjust(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); - return 0; +static inline NV_STATUS kbusGetStaticFbAperture_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 offset, NvU64 *pAperOffset, NvU64 *pLength, NvU32 gfid) { + return pKernelBus->__kbusGetStaticFbAperture__(pGpu, pKernelBus, pMemDesc, offset, pAperOffset, pLength, gfid); } -#else //__nvoc_kern_bus_h_disabled -#define kbusGetCpuInvisibleBar2BaseAdjust(pGpu, pKernelBus) kbusGetCpuInvisibleBar2BaseAdjust_cb032a(pGpu, pKernelBus) -#endif //__nvoc_kern_bus_h_disabled -#define kbusGetCpuInvisibleBar2BaseAdjust_HAL(pGpu, pKernelBus) kbusGetCpuInvisibleBar2BaseAdjust(pGpu, pKernelBus) +static inline NV_STATUS kbusCreateP2PMappingForBar1P2P_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 attributes) { + return pKernelBus0->__kbusCreateP2PMappingForBar1P2P__(pGpu0, pKernelBus0, pGpu1, pKernelBus1, attributes); +} -MMU_WALK *kbusGetBar2GmmuWalker_GM107(struct KernelBus *pKernelBus); +static inline NV_STATUS kbusRemoveP2PMappingForBar1P2P_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 attributes) { + return pKernelBus0->__kbusRemoveP2PMappingForBar1P2P__(pGpu0, pKernelBus0, pGpu1, pKernelBus1, attributes); +} +static inline NvBool kbusHasPcieBar1P2PMapping_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1) { + return pKernelBus0->__kbusHasPcieBar1P2PMapping__(pGpu0, pKernelBus0, pGpu1, pKernelBus1); +} -#ifdef __nvoc_kern_bus_h_disabled -static inline MMU_WALK *kbusGetBar2GmmuWalker(struct KernelBus *pKernelBus) { - NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); - return NULL; +static inline NvBool kbusIsPcieBar1P2PMappingSupported_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1) { + return pKernelBus0->__kbusIsPcieBar1P2PMappingSupported__(pGpu0, pKernelBus0, pGpu1, pKernelBus1); } -#else //__nvoc_kern_bus_h_disabled -#define kbusGetBar2GmmuWalker(pKernelBus) kbusGetBar2GmmuWalker_GM107(pKernelBus) -#endif //__nvoc_kern_bus_h_disabled -#define kbusGetBar2GmmuWalker_HAL(pKernelBus) kbusGetBar2GmmuWalker(pKernelBus) +static inline NV_STATUS kbusCheckFlaSupportedAndInit_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 base, NvU64 size) { + return pKernelBus->__kbusCheckFlaSupportedAndInit__(pGpu, pKernelBus, base, size); +} + +static inline NV_STATUS kbusDetermineFlaRangeAndAllocate_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 base, NvU64 size) { + return pKernelBus->__kbusDetermineFlaRangeAndAllocate__(pGpu, pKernelBus, base, size); +} + +static inline NV_STATUS kbusAllocateFlaVaspace_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg3, NvU64 arg4) { + return pKernelBus->__kbusAllocateFlaVaspace__(pGpu, pKernelBus, arg3, arg4); +} + +static inline NV_STATUS kbusGetFlaRange_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 *arg3, NvU64 *arg4, NvBool arg5) { + return pKernelBus->__kbusGetFlaRange__(pGpu, pKernelBus, arg3, arg4, arg5); +} + +static inline NV_STATUS kbusAllocateLegacyFlaVaspace_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg3, NvU64 arg4) { + return pKernelBus->__kbusAllocateLegacyFlaVaspace__(pGpu, pKernelBus, arg3, arg4); +} + +static inline NV_STATUS kbusAllocateHostManagedFlaVaspace_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvHandle arg3, NvHandle arg4, NvHandle arg5, NvHandle arg6, NvU64 arg7, NvU64 arg8, NvU32 arg9) { + return pKernelBus->__kbusAllocateHostManagedFlaVaspace__(pGpu, pKernelBus, arg3, arg4, arg5, arg6, arg7, arg8, arg9); +} + +static inline void kbusDestroyFla_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + pKernelBus->__kbusDestroyFla__(pGpu, pKernelBus); +} + +static inline NV_STATUS kbusGetFlaVaspace_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJVASPACE **arg3) { + return pKernelBus->__kbusGetFlaVaspace__(pGpu, pKernelBus, arg3); +} + +static inline void kbusDestroyHostManagedFlaVaspace_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg3) { + pKernelBus->__kbusDestroyHostManagedFlaVaspace__(pGpu, pKernelBus, arg3); +} + +static inline NvBool kbusVerifyFlaRange_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg3, NvU64 arg4) { + return pKernelBus->__kbusVerifyFlaRange__(pGpu, pKernelBus, arg3, arg4); +} + +static inline NV_STATUS kbusConstructFlaInstBlk_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg3) { + return pKernelBus->__kbusConstructFlaInstBlk__(pGpu, pKernelBus, arg3); +} + +static inline void kbusDestructFlaInstBlk_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + pKernelBus->__kbusDestructFlaInstBlk__(pGpu, pKernelBus); +} + +static inline NV_STATUS kbusValidateFlaBaseAddress_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 flaBaseAddr) { + return pKernelBus->__kbusValidateFlaBaseAddress__(pGpu, pKernelBus, flaBaseAddr); +} + +static inline NV_STATUS kbusSetupUnbindFla_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusSetupUnbindFla__(pGpu, pKernelBus); +} + +static inline NV_STATUS kbusSetupBindFla_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { + return pKernelBus->__kbusSetupBindFla__(pGpu, pKernelBus, gfid); +} + +static inline NV_STATUS kbusSendSysmembarSingle_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusSendSysmembarSingle__(pGpu, pKernelBus); +} + +static inline void kbusCacheBAR1ResizeSize_WAR_BUG_3249028_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + pKernelBus->__kbusCacheBAR1ResizeSize_WAR_BUG_3249028__(pGpu, pKernelBus); +} + +static inline NV_STATUS kbusRestoreBAR1ResizeSize_WAR_BUG_3249028_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusRestoreBAR1ResizeSize_WAR_BUG_3249028__(pGpu, pKernelBus); +} + +static inline NV_STATUS kbusIsDirectMappingAllowed_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg3, NvU32 arg4, NvBool *arg5) { + return pKernelBus->__kbusIsDirectMappingAllowed__(pGpu, pKernelBus, arg3, arg4, arg5); +} + +static inline NV_STATUS kbusUseDirectSysmemMap_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *arg3, NvBool *arg4) { + return pKernelBus->__kbusUseDirectSysmemMap__(pGpu, pKernelBus, arg3, arg4); +} + +static inline NV_STATUS kbusMemCopyBar0Window_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, RmPhysAddr physAddr, void *pData, NvLength copySize, NvBool bRead) { + return pKernelBus->__kbusMemCopyBar0Window__(pGpu, pKernelBus, physAddr, pData, copySize, bRead); +} + +static inline NV_STATUS kbusWriteBAR0WindowBase_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 base) { + return pKernelBus->__kbusWriteBAR0WindowBase__(pGpu, pKernelBus, base); +} + +static inline NvU32 kbusReadBAR0WindowBase_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusReadBAR0WindowBase__(pGpu, pKernelBus); +} + +static inline NvBool kbusValidateBAR0WindowBase_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 base) { + return pKernelBus->__kbusValidateBAR0WindowBase__(pGpu, pKernelBus, base); +} + +static inline NV_STATUS kbusSetBAR0WindowVidOffset_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 vidOffset) { + return pKernelBus->__kbusSetBAR0WindowVidOffset__(pGpu, pKernelBus, vidOffset); +} + +static inline NvU64 kbusGetBAR0WindowVidOffset_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusGetBAR0WindowVidOffset__(pGpu, pKernelBus); +} + +static inline NV_STATUS kbusSetupBar0WindowBeforeBar2Bootstrap_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 *arg3) { + return pKernelBus->__kbusSetupBar0WindowBeforeBar2Bootstrap__(pGpu, pKernelBus, arg3); +} + +static inline void kbusRestoreBar0WindowAfterBar2Bootstrap_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg3) { + pKernelBus->__kbusRestoreBar0WindowAfterBar2Bootstrap__(pGpu, pKernelBus, arg3); +} + +static inline NV_STATUS kbusVerifyBar2_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR memDescIn, NvU8 *pCpuPtrIn, NvU64 offset, NvU64 size) { + return pKernelBus->__kbusVerifyBar2__(pGpu, pKernelBus, memDescIn, pCpuPtrIn, offset, size); +} + +static inline NV_STATUS kbusBar2BootStrapInPhysicalMode_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusBar2BootStrapInPhysicalMode__(pGpu, pKernelBus); +} + +static inline NV_STATUS kbusBindBar2_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, BAR2_MODE arg3) { + return pKernelBus->__kbusBindBar2__(pGpu, pKernelBus, arg3); +} + +static inline void kbusInstBlkWriteAddrLimit_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvBool arg3, NvU64 arg4, NvU8 *arg5, NvU64 arg6) { + pKernelBus->__kbusInstBlkWriteAddrLimit__(pGpu, pKernelBus, arg3, arg4, arg5, arg6); +} + +static inline NV_STATUS kbusInitInstBlk_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR pInstBlkMemDesc, PMEMORY_DESCRIPTOR pPDB, NvU64 vaLimit, NvU64 bigPageSize, struct OBJVASPACE *pVAS) { + return pKernelBus->__kbusInitInstBlk__(pGpu, pKernelBus, pInstBlkMemDesc, pPDB, vaLimit, bigPageSize, pVAS); +} + +static inline void kbusBar2InstBlkWrite_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU8 *pMap, PMEMORY_DESCRIPTOR pPDB, NvU64 vaLimit, NvU64 bigPageSize) { + pKernelBus->__kbusBar2InstBlkWrite__(pGpu, pKernelBus, pMap, pPDB, vaLimit, bigPageSize); +} + +static inline NV_STATUS kbusSetupBar2PageTablesAtBottomOfFb_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { + return pKernelBus->__kbusSetupBar2PageTablesAtBottomOfFb__(pGpu, pKernelBus, gfid); +} + +static inline void kbusTeardownBar2PageTablesAtBottomOfFb_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { + pKernelBus->__kbusTeardownBar2PageTablesAtBottomOfFb__(pGpu, pKernelBus, gfid); +} + +static inline NV_STATUS kbusSetupBar2InstBlkAtBottomOfFb_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR pPDB, NvU64 vaLimit, NvU64 bigPageSize, NvU32 gfid) { + return pKernelBus->__kbusSetupBar2InstBlkAtBottomOfFb__(pGpu, pKernelBus, pPDB, vaLimit, bigPageSize, gfid); +} + +static inline void kbusTeardownBar2InstBlkAtBottomOfFb_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { + pKernelBus->__kbusTeardownBar2InstBlkAtBottomOfFb__(pGpu, pKernelBus, gfid); +} + +static inline NV_STATUS kbusSetupBar2PageTablesAtTopOfFb_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { + return pKernelBus->__kbusSetupBar2PageTablesAtTopOfFb__(pGpu, pKernelBus, gfid); +} + +static inline NV_STATUS kbusCommitBar2PDEs_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusCommitBar2PDEs__(pGpu, pKernelBus); +} + +static inline NV_STATUS kbusVerifyCoherentLink_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusVerifyCoherentLink__(pGpu, pKernelBus); +} + +static inline void kbusTeardownMailbox_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + pKernelBus->__kbusTeardownMailbox__(pGpu, pKernelBus); +} + +static inline NV_STATUS kbusBar1InstBlkVasUpdate_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusBar1InstBlkVasUpdate__(pGpu, pKernelBus); +} + +static inline NV_STATUS kbusFlushPcieForBar0Doorbell_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusFlushPcieForBar0Doorbell__(pGpu, pKernelBus); +} + +static inline NV_STATUS kbusCreateCoherentCpuMapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 numaOnlineMemorySize, NvBool bFlush) { + return pKernelBus->__kbusCreateCoherentCpuMapping__(pGpu, pKernelBus, numaOnlineMemorySize, bFlush); +} + +static inline NV_STATUS kbusMapCoherentCpuMapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 offset, NvU64 length, NvU32 protect, NvP64 *ppAddress, NvP64 *ppPriv) { + return pKernelBus->__kbusMapCoherentCpuMapping__(pGpu, pKernelBus, pMemDesc, offset, length, protect, ppAddress, ppPriv); +} + +static inline void kbusUnmapCoherentCpuMapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvP64 pAddress, NvP64 pPriv) { + pKernelBus->__kbusUnmapCoherentCpuMapping__(pGpu, pKernelBus, pMemDesc, pAddress, pPriv); +} + +static inline void kbusTeardownCoherentCpuMapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvBool arg3) { + pKernelBus->__kbusTeardownCoherentCpuMapping__(pGpu, pKernelBus, arg3); +} + +static inline NV_STATUS kbusBar1InstBlkBind_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusBar1InstBlkBind__(pGpu, pKernelBus); +} + +static inline NvU32 kbusGetEccCounts_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return pKernelBus->__kbusGetEccCounts__(pGpu, pKernelBus); +} + +static inline void kbusInitMissing_DISPATCH(POBJGPU pGpu, struct KernelBus *pEngstate) { + pEngstate->__kbusInitMissing__(pGpu, pEngstate); +} + +static inline NV_STATUS kbusStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelBus *pEngstate) { + return pEngstate->__kbusStatePreInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kbusStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelBus *pEngstate) { + return pEngstate->__kbusStateInitUnlocked__(pGpu, pEngstate); +} + +static inline NvBool kbusIsPresent_DISPATCH(POBJGPU pGpu, struct KernelBus *pEngstate) { + return pEngstate->__kbusIsPresent__(pGpu, pEngstate); +} + +NV_STATUS kbusConstructHal_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); + + +#ifdef __nvoc_kern_bus_h_disabled +static inline NV_STATUS kbusConstructHal(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kern_bus_h_disabled +#define kbusConstructHal(pGpu, pKernelBus) kbusConstructHal_GM107(pGpu, pKernelBus) +#endif //__nvoc_kern_bus_h_disabled + +#define kbusConstructHal_HAL(pGpu, pKernelBus) kbusConstructHal(pGpu, pKernelBus) + +NvU64 kbusGetBar1ResvdVA_TU102(struct KernelBus *pKernelBus); + + +#ifdef __nvoc_kern_bus_h_disabled +static inline NvU64 kbusGetBar1ResvdVA(struct KernelBus *pKernelBus) { + NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); + return 0; +} +#else //__nvoc_kern_bus_h_disabled +#define kbusGetBar1ResvdVA(pKernelBus) kbusGetBar1ResvdVA_TU102(pKernelBus) +#endif //__nvoc_kern_bus_h_disabled + +#define kbusGetBar1ResvdVA_HAL(pKernelBus) kbusGetBar1ResvdVA(pKernelBus) + +NV_STATUS kbusStateInitLockedKernel_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); + + +#ifdef __nvoc_kern_bus_h_disabled +static inline NV_STATUS kbusStateInitLockedKernel(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kern_bus_h_disabled +#define kbusStateInitLockedKernel(pGpu, pKernelBus) kbusStateInitLockedKernel_GM107(pGpu, pKernelBus) +#endif //__nvoc_kern_bus_h_disabled + +#define kbusStateInitLockedKernel_HAL(pGpu, pKernelBus) kbusStateInitLockedKernel(pGpu, pKernelBus) + +static inline NV_STATUS kbusStateInitLockedPhysical_56cd7a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return NV_OK; +} + +NV_STATUS kbusStateInitLockedPhysical_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); + + +#ifdef __nvoc_kern_bus_h_disabled +static inline NV_STATUS kbusStateInitLockedPhysical(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kern_bus_h_disabled +#define kbusStateInitLockedPhysical(pGpu, pKernelBus) kbusStateInitLockedPhysical_56cd7a(pGpu, pKernelBus) +#endif //__nvoc_kern_bus_h_disabled + +#define kbusStateInitLockedPhysical_HAL(pGpu, pKernelBus) kbusStateInitLockedPhysical(pGpu, pKernelBus) + +NV_STATUS kbusMemoryCopy_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg3, NvU64 arg4, PMEMORY_DESCRIPTOR arg5, NvU64 arg6, NvU64 arg7); + + +#ifdef __nvoc_kern_bus_h_disabled +static inline NV_STATUS kbusMemoryCopy(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg3, NvU64 arg4, PMEMORY_DESCRIPTOR arg5, NvU64 arg6, NvU64 arg7) { + NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kern_bus_h_disabled +#define kbusMemoryCopy(pGpu, pKernelBus, arg3, arg4, arg5, arg6, arg7) kbusMemoryCopy_GM107(pGpu, pKernelBus, arg3, arg4, arg5, arg6, arg7) +#endif //__nvoc_kern_bus_h_disabled + +#define kbusMemoryCopy_HAL(pGpu, pKernelBus, arg3, arg4, arg5, arg6, arg7) kbusMemoryCopy(pGpu, pKernelBus, arg3, arg4, arg5, arg6, arg7) + +NV_STATUS kbusMemoryCopyFromPtr_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR pDstMemDesc, NvU64 dstOffset, NvU8 *pSrcMem, NvU64 size); + + +#ifdef __nvoc_kern_bus_h_disabled +static inline NV_STATUS kbusMemoryCopyFromPtr(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR pDstMemDesc, NvU64 dstOffset, NvU8 *pSrcMem, NvU64 size) { + NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kern_bus_h_disabled +#define kbusMemoryCopyFromPtr(pGpu, pKernelBus, pDstMemDesc, dstOffset, pSrcMem, size) kbusMemoryCopyFromPtr_GM107(pGpu, pKernelBus, pDstMemDesc, dstOffset, pSrcMem, size) +#endif //__nvoc_kern_bus_h_disabled + +#define kbusMemoryCopyFromPtr_HAL(pGpu, pKernelBus, pDstMemDesc, dstOffset, pSrcMem, size) kbusMemoryCopyFromPtr(pGpu, pKernelBus, pDstMemDesc, dstOffset, pSrcMem, size) + +NV_STATUS kbusPrepareForXVEReset_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); + + +#ifdef __nvoc_kern_bus_h_disabled +static inline NV_STATUS kbusPrepareForXVEReset(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kern_bus_h_disabled +#define kbusPrepareForXVEReset(pGpu, pKernelBus) kbusPrepareForXVEReset_GM107(pGpu, pKernelBus) +#endif //__nvoc_kern_bus_h_disabled + +#define kbusPrepareForXVEReset_HAL(pGpu, pKernelBus) kbusPrepareForXVEReset(pGpu, pKernelBus) + +NV_STATUS kbusUpdateRmAperture_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg3, NvU64 arg4, NvU64 arg5, NvU32 arg6); + + +#ifdef __nvoc_kern_bus_h_disabled +static inline NV_STATUS kbusUpdateRmAperture(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg3, NvU64 arg4, NvU64 arg5, NvU32 arg6) { + NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kern_bus_h_disabled +#define kbusUpdateRmAperture(pGpu, pKernelBus, arg3, arg4, arg5, arg6) kbusUpdateRmAperture_GM107(pGpu, pKernelBus, arg3, arg4, arg5, arg6) +#endif //__nvoc_kern_bus_h_disabled + +#define kbusUpdateRmAperture_HAL(pGpu, pKernelBus, arg3, arg4, arg5, arg6) kbusUpdateRmAperture(pGpu, pKernelBus, arg3, arg4, arg5, arg6) + +NV_STATUS kbusSetupBar2GpuVaSpace_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); + + +#ifdef __nvoc_kern_bus_h_disabled +static inline NV_STATUS kbusSetupBar2GpuVaSpace(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { + NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kern_bus_h_disabled +#define kbusSetupBar2GpuVaSpace(pGpu, pKernelBus, gfid) kbusSetupBar2GpuVaSpace_GM107(pGpu, pKernelBus, gfid) +#endif //__nvoc_kern_bus_h_disabled + +#define kbusSetupBar2GpuVaSpace_HAL(pGpu, pKernelBus, gfid) kbusSetupBar2GpuVaSpace(pGpu, pKernelBus, gfid) + +NV_STATUS kbusTeardownBar2GpuVaSpace_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); + + +#ifdef __nvoc_kern_bus_h_disabled +static inline NV_STATUS kbusTeardownBar2GpuVaSpace(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { + NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kern_bus_h_disabled +#define kbusTeardownBar2GpuVaSpace(pGpu, pKernelBus, gfid) kbusTeardownBar2GpuVaSpace_GM107(pGpu, pKernelBus, gfid) +#endif //__nvoc_kern_bus_h_disabled + +#define kbusTeardownBar2GpuVaSpace_HAL(pGpu, pKernelBus, gfid) kbusTeardownBar2GpuVaSpace(pGpu, pKernelBus, gfid) + +NvU32 kbusGetSizeOfBar2PageTables_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); + + +#ifdef __nvoc_kern_bus_h_disabled +static inline NvU32 kbusGetSizeOfBar2PageTables(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); + return 0; +} +#else //__nvoc_kern_bus_h_disabled +#define kbusGetSizeOfBar2PageTables(pGpu, pKernelBus) kbusGetSizeOfBar2PageTables_GM107(pGpu, pKernelBus) +#endif //__nvoc_kern_bus_h_disabled + +#define kbusGetSizeOfBar2PageTables_HAL(pGpu, pKernelBus) kbusGetSizeOfBar2PageTables(pGpu, pKernelBus) + +NvU32 kbusGetSizeOfBar2PageDirs_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); + + +#ifdef __nvoc_kern_bus_h_disabled +static inline NvU32 kbusGetSizeOfBar2PageDirs(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); + return 0; +} +#else //__nvoc_kern_bus_h_disabled +#define kbusGetSizeOfBar2PageDirs(pGpu, pKernelBus) kbusGetSizeOfBar2PageDirs_GM107(pGpu, pKernelBus) +#endif //__nvoc_kern_bus_h_disabled + +#define kbusGetSizeOfBar2PageDirs_HAL(pGpu, pKernelBus) kbusGetSizeOfBar2PageDirs(pGpu, pKernelBus) + +static inline NvU64 kbusGetCpuInvisibleBar2BaseAdjust_cb032a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + return 0ULL; +} + +NvU64 kbusGetCpuInvisibleBar2BaseAdjust_TU102(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); + + +#ifdef __nvoc_kern_bus_h_disabled +static inline NvU64 kbusGetCpuInvisibleBar2BaseAdjust(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { + NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); + return 0; +} +#else //__nvoc_kern_bus_h_disabled +#define kbusGetCpuInvisibleBar2BaseAdjust(pGpu, pKernelBus) kbusGetCpuInvisibleBar2BaseAdjust_cb032a(pGpu, pKernelBus) +#endif //__nvoc_kern_bus_h_disabled + +#define kbusGetCpuInvisibleBar2BaseAdjust_HAL(pGpu, pKernelBus) kbusGetCpuInvisibleBar2BaseAdjust(pGpu, pKernelBus) + +MMU_WALK *kbusGetBar2GmmuWalker_GM107(struct KernelBus *pKernelBus); + + +#ifdef __nvoc_kern_bus_h_disabled +static inline MMU_WALK *kbusGetBar2GmmuWalker(struct KernelBus *pKernelBus) { + NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); + return NULL; +} +#else //__nvoc_kern_bus_h_disabled +#define kbusGetBar2GmmuWalker(pKernelBus) kbusGetBar2GmmuWalker_GM107(pKernelBus) +#endif //__nvoc_kern_bus_h_disabled + +#define kbusGetBar2GmmuWalker_HAL(pKernelBus) kbusGetBar2GmmuWalker(pKernelBus) const struct GMMU_FMT *kbusGetBar2GmmuFmt_GM107(struct KernelBus *pKernelBus); @@ -1214,18 +1789,18 @@ static inline NV_STATUS kbusRemoveP2PMappingForMailbox(struct OBJGPU *pGpu0, str #define kbusRemoveP2PMappingForMailbox_HAL(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes) kbusRemoveP2PMappingForMailbox(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes) -void kbusSetupMailboxes_GM200(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 arg0, NvU32 arg1); +void kbusSetupMailboxes_GM200(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 arg5, NvU32 arg6); #ifdef __nvoc_kern_bus_h_disabled -static inline void kbusSetupMailboxes(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 arg0, NvU32 arg1) { +static inline void kbusSetupMailboxes(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 arg5, NvU32 arg6) { NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); } #else //__nvoc_kern_bus_h_disabled -#define kbusSetupMailboxes(pGpu0, pKernelBus0, pGpu1, pKernelBus1, arg0, arg1) kbusSetupMailboxes_GM200(pGpu0, pKernelBus0, pGpu1, pKernelBus1, arg0, arg1) +#define kbusSetupMailboxes(pGpu0, pKernelBus0, pGpu1, pKernelBus1, arg5, arg6) kbusSetupMailboxes_GM200(pGpu0, pKernelBus0, pGpu1, pKernelBus1, arg5, arg6) #endif //__nvoc_kern_bus_h_disabled -#define kbusSetupMailboxes_HAL(pGpu0, pKernelBus0, pGpu1, pKernelBus1, arg0, arg1) kbusSetupMailboxes(pGpu0, pKernelBus0, pGpu1, pKernelBus1, arg0, arg1) +#define kbusSetupMailboxes_HAL(pGpu0, pKernelBus0, pGpu1, pKernelBus1, arg5, arg6) kbusSetupMailboxes(pGpu0, pKernelBus0, pGpu1, pKernelBus1, arg5, arg6) NV_STATUS kbusCreateP2PMappingForNvlink_GP100(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 *peer0, NvU32 *peer1, NvU32 attributes); @@ -1421,46 +1996,46 @@ static inline NV_STATUS kbusDestroyBar1(struct OBJGPU *pGpu, struct KernelBus *p #define kbusDestroyBar1_HAL(pGpu, pKernelBus, gfid) kbusDestroyBar1(pGpu, pKernelBus, gfid) -NV_STATUS kbusMapFbAperture_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg0, NvU64 offset, NvU64 *pAperOffset, NvU64 *pLength, NvU32 flags, struct Device *pDevice); +NV_STATUS kbusMapFbAperture_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg3, NvU64 offset, NvU64 *pAperOffset, NvU64 *pLength, NvU32 flags, struct Device *pDevice); #ifdef __nvoc_kern_bus_h_disabled -static inline NV_STATUS kbusMapFbAperture(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg0, NvU64 offset, NvU64 *pAperOffset, NvU64 *pLength, NvU32 flags, struct Device *pDevice) { +static inline NV_STATUS kbusMapFbAperture(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg3, NvU64 offset, NvU64 *pAperOffset, NvU64 *pLength, NvU32 flags, struct Device *pDevice) { NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_bus_h_disabled -#define kbusMapFbAperture(pGpu, pKernelBus, arg0, offset, pAperOffset, pLength, flags, pDevice) kbusMapFbAperture_GM107(pGpu, pKernelBus, arg0, offset, pAperOffset, pLength, flags, pDevice) +#define kbusMapFbAperture(pGpu, pKernelBus, arg3, offset, pAperOffset, pLength, flags, pDevice) kbusMapFbAperture_GM107(pGpu, pKernelBus, arg3, offset, pAperOffset, pLength, flags, pDevice) #endif //__nvoc_kern_bus_h_disabled -#define kbusMapFbAperture_HAL(pGpu, pKernelBus, arg0, offset, pAperOffset, pLength, flags, pDevice) kbusMapFbAperture(pGpu, pKernelBus, arg0, offset, pAperOffset, pLength, flags, pDevice) +#define kbusMapFbAperture_HAL(pGpu, pKernelBus, arg3, offset, pAperOffset, pLength, flags, pDevice) kbusMapFbAperture(pGpu, pKernelBus, arg3, offset, pAperOffset, pLength, flags, pDevice) -NV_STATUS kbusUnmapFbAperture_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg0, NvU64 aperOffset, NvU64 length, NvU32 flags); +NV_STATUS kbusUnmapFbAperture_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg3, NvU64 aperOffset, NvU64 length, NvU32 flags); #ifdef __nvoc_kern_bus_h_disabled -static inline NV_STATUS kbusUnmapFbAperture(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg0, NvU64 aperOffset, NvU64 length, NvU32 flags) { +static inline NV_STATUS kbusUnmapFbAperture(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg3, NvU64 aperOffset, NvU64 length, NvU32 flags) { NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_bus_h_disabled -#define kbusUnmapFbAperture(pGpu, pKernelBus, arg0, aperOffset, length, flags) kbusUnmapFbAperture_GM107(pGpu, pKernelBus, arg0, aperOffset, length, flags) +#define kbusUnmapFbAperture(pGpu, pKernelBus, arg3, aperOffset, length, flags) kbusUnmapFbAperture_GM107(pGpu, pKernelBus, arg3, aperOffset, length, flags) #endif //__nvoc_kern_bus_h_disabled -#define kbusUnmapFbAperture_HAL(pGpu, pKernelBus, arg0, aperOffset, length, flags) kbusUnmapFbAperture(pGpu, pKernelBus, arg0, aperOffset, length, flags) +#define kbusUnmapFbAperture_HAL(pGpu, pKernelBus, arg3, aperOffset, length, flags) kbusUnmapFbAperture(pGpu, pKernelBus, arg3, aperOffset, length, flags) -void kbusReleaseRmAperture_VBAR2(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg0); +void kbusReleaseRmAperture_VBAR2(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg3); #ifdef __nvoc_kern_bus_h_disabled -static inline void kbusReleaseRmAperture(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg0) { +static inline void kbusReleaseRmAperture(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg3) { NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); } #else //__nvoc_kern_bus_h_disabled -#define kbusReleaseRmAperture(pGpu, pKernelBus, arg0) kbusReleaseRmAperture_VBAR2(pGpu, pKernelBus, arg0) +#define kbusReleaseRmAperture(pGpu, pKernelBus, arg3) kbusReleaseRmAperture_VBAR2(pGpu, pKernelBus, arg3) #endif //__nvoc_kern_bus_h_disabled -#define kbusReleaseRmAperture_HAL(pGpu, pKernelBus, arg0) kbusReleaseRmAperture(pGpu, pKernelBus, arg0) +#define kbusReleaseRmAperture_HAL(pGpu, pKernelBus, arg3) kbusReleaseRmAperture(pGpu, pKernelBus, arg3) struct OBJVASPACE *kbusGetBar1VASpace_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); @@ -1533,116 +2108,56 @@ static inline void kbusTeardownCoherentCpuMappingAcr(struct OBJGPU *pGpu, struct #define kbusTeardownCoherentCpuMappingAcr_HAL(pGpu, pKernelBus) kbusTeardownCoherentCpuMappingAcr(pGpu, pKernelBus) -NV_STATUS kbusInitBarsSize_VGPUSTUB(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); +NV_STATUS kbusInitBarsSize_VF(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); NV_STATUS kbusInitBarsSize_KERNEL(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); -static inline NV_STATUS kbusInitBarsSize_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusInitBarsSize__(pGpu, pKernelBus); -} - -NV_STATUS kbusConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, ENGDESCRIPTOR arg0); - -static inline NV_STATUS kbusConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, ENGDESCRIPTOR arg0) { - return pKernelBus->__kbusConstructEngine__(pGpu, pKernelBus, arg0); -} +NV_STATUS kbusConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, ENGDESCRIPTOR arg3); NV_STATUS kbusStatePreInitLocked_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); -static inline NV_STATUS kbusStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusStatePreInitLocked__(pGpu, pKernelBus); -} - NV_STATUS kbusStateInitLocked_IMPL(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); -static inline NV_STATUS kbusStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusStateInitLocked__(pGpu, pKernelBus); -} +NV_STATUS kbusStatePreLoad_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg3); -NV_STATUS kbusStatePreLoad_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg0); +NV_STATUS kbusStateLoad_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg3); -static inline NV_STATUS kbusStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg0) { - return pKernelBus->__kbusStatePreLoad__(pGpu, pKernelBus, arg0); -} +NV_STATUS kbusStatePostLoad_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg3); -NV_STATUS kbusStateLoad_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg0); - -static inline NV_STATUS kbusStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg0) { - return pKernelBus->__kbusStateLoad__(pGpu, pKernelBus, arg0); -} - -NV_STATUS kbusStatePostLoad_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg0); - -static inline NV_STATUS kbusStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg0) { - return pKernelBus->__kbusStatePostLoad__(pGpu, pKernelBus, arg0); -} - -NV_STATUS kbusStatePreUnload_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg0); - -static inline NV_STATUS kbusStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg0) { - return pKernelBus->__kbusStatePreUnload__(pGpu, pKernelBus, arg0); -} +NV_STATUS kbusStatePreUnload_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg3); NV_STATUS kbusStateUnload_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 flags); -static inline NV_STATUS kbusStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 flags) { - return pKernelBus->__kbusStateUnload__(pGpu, pKernelBus, flags); -} - NV_STATUS kbusStatePostUnload_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 flags); -static inline NV_STATUS kbusStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 flags) { - return pKernelBus->__kbusStatePostUnload__(pGpu, pKernelBus, flags); -} - void kbusStateDestroy_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); -static inline void kbusStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - pKernelBus->__kbusStateDestroy__(pGpu, pKernelBus); -} +NvBool kbusBar2IsReady_VBAR2_SRIOV(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); + +NvBool kbusBar2IsReady_VBAR2(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); NvU8 *kbusMapBar2Aperture_VBAR2_SRIOV(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU32 transfer_flags); NvU8 *kbusMapBar2Aperture_VBAR2(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU32 transfer_flags); -static inline NvU8 *kbusMapBar2Aperture_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU32 transfer_flags) { - return pKernelBus->__kbusMapBar2Aperture__(pGpu, pKernelBus, pMemDesc, transfer_flags); -} - NvU8 *kbusValidateBar2ApertureMapping_VBAR2_SRIOV(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU8 *p); NvU8 *kbusValidateBar2ApertureMapping_VBAR2(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU8 *p); -static inline NvU8 *kbusValidateBar2ApertureMapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU8 *p) { - return pKernelBus->__kbusValidateBar2ApertureMapping__(pGpu, pKernelBus, pMemDesc, p); -} - void kbusUnmapBar2ApertureWithFlags_VBAR2_SRIOV(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU8 **pCpuPtr, NvU32 flags); void kbusUnmapBar2ApertureWithFlags_VBAR2(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU8 **pCpuPtr, NvU32 flags); -static inline void kbusUnmapBar2ApertureWithFlags_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU8 **pCpuPtr, NvU32 flags) { - pKernelBus->__kbusUnmapBar2ApertureWithFlags__(pGpu, pKernelBus, pMemDesc, pCpuPtr, flags); -} - NvU64 kbusGetVaLimitForBar2_FWCLIENT(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); NvU64 kbusGetVaLimitForBar2_IMPL(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); -static inline NvU64 kbusGetVaLimitForBar2_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusGetVaLimitForBar2__(pGpu, pKernelBus); -} - static inline void kbusCalcCpuInvisibleBar2Range_f2d351(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { NV_ASSERT_PRECOMP(0); } void kbusCalcCpuInvisibleBar2Range_GP100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); -static inline void kbusCalcCpuInvisibleBar2Range_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { - pKernelBus->__kbusCalcCpuInvisibleBar2Range__(pGpu, pKernelBus, gfid); -} - static inline NvU32 kbusCalcCpuInvisibleBar2ApertureSize_13cd8d(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { NV_ASSERT_PRECOMP(0); return 0; @@ -1650,18 +2165,10 @@ static inline NvU32 kbusCalcCpuInvisibleBar2ApertureSize_13cd8d(struct OBJGPU *p NvU32 kbusCalcCpuInvisibleBar2ApertureSize_GV100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); -static inline NvU32 kbusCalcCpuInvisibleBar2ApertureSize_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusCalcCpuInvisibleBar2ApertureSize__(pGpu, pKernelBus); -} - NV_STATUS kbusCommitBar2_KERNEL(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 flags); NV_STATUS kbusCommitBar2_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 flags); -static inline NV_STATUS kbusCommitBar2_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 flags) { - return pKernelBus->__kbusCommitBar2__(pGpu, pKernelBus, flags); -} - static inline NV_STATUS kbusRewritePTEsForExistingMapping_92bfc3(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc) { NV_ASSERT_PRECOMP(0); return NV_ERR_NOT_SUPPORTED; @@ -1669,68 +2176,40 @@ static inline NV_STATUS kbusRewritePTEsForExistingMapping_92bfc3(struct OBJGPU * NV_STATUS kbusRewritePTEsForExistingMapping_VBAR2(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc); -static inline NV_STATUS kbusRewritePTEsForExistingMapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc) { - return pKernelBus->__kbusRewritePTEsForExistingMapping__(pGpu, pKernelBus, pMemDesc); -} - NV_STATUS kbusPatchBar1Pdb_GSPCLIENT(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); static inline NV_STATUS kbusPatchBar1Pdb_56cd7a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { return NV_OK; } -static inline NV_STATUS kbusPatchBar1Pdb_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusPatchBar1Pdb__(pGpu, pKernelBus); -} - NV_STATUS kbusPatchBar2Pdb_GSPCLIENT(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); static inline NV_STATUS kbusPatchBar2Pdb_56cd7a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { return NV_OK; } -static inline NV_STATUS kbusPatchBar2Pdb_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusPatchBar2Pdb__(pGpu, pKernelBus); -} - static inline NV_STATUS kbusConstructVirtualBar2CpuInvisibleHeap_56cd7a(struct KernelBus *pKernelBus, NvU32 gfid) { return NV_OK; } NV_STATUS kbusConstructVirtualBar2CpuInvisibleHeap_VBAR2(struct KernelBus *pKernelBus, NvU32 gfid); -static inline NV_STATUS kbusConstructVirtualBar2CpuInvisibleHeap_DISPATCH(struct KernelBus *pKernelBus, NvU32 gfid) { - return pKernelBus->__kbusConstructVirtualBar2CpuInvisibleHeap__(pKernelBus, gfid); -} - static inline NV_STATUS kbusMapCpuInvisibleBar2Aperture_46f6a7(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 *pVaddr, NvU64 allocSize, NvU32 allocFlags, NvU32 gfid) { return NV_ERR_NOT_SUPPORTED; } NV_STATUS kbusMapCpuInvisibleBar2Aperture_VBAR2(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 *pVaddr, NvU64 allocSize, NvU32 allocFlags, NvU32 gfid); -static inline NV_STATUS kbusMapCpuInvisibleBar2Aperture_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 *pVaddr, NvU64 allocSize, NvU32 allocFlags, NvU32 gfid) { - return pKernelBus->__kbusMapCpuInvisibleBar2Aperture__(pGpu, pKernelBus, pMemDesc, pVaddr, allocSize, allocFlags, gfid); -} - static inline void kbusUnmapCpuInvisibleBar2Aperture_b3696a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 vAddr, NvU32 gfid) { return; } void kbusUnmapCpuInvisibleBar2Aperture_VBAR2(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 vAddr, NvU32 gfid); -static inline void kbusUnmapCpuInvisibleBar2Aperture_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 vAddr, NvU32 gfid) { - pKernelBus->__kbusUnmapCpuInvisibleBar2Aperture__(pGpu, pKernelBus, pMemDesc, vAddr, gfid); -} - NV_STATUS kbusTeardownBar2CpuAperture_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); NV_STATUS kbusTeardownBar2CpuAperture_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); -static inline NV_STATUS kbusTeardownBar2CpuAperture_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { - return pKernelBus->__kbusTeardownBar2CpuAperture__(pGpu, pKernelBus, gfid); -} - NvU32 kbusGetP2PWriteMailboxAddressSize_GH100(struct OBJGPU *pGpu); static inline NvU32 kbusGetP2PWriteMailboxAddressSize_474d46(struct OBJGPU *pGpu) { @@ -1743,80 +2222,44 @@ void kbusGetP2PMailboxAttributes_GM200(struct OBJGPU *pGpu, struct KernelBus *pK void kbusGetP2PMailboxAttributes_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 *pMailboxAreaSize, NvU32 *pMailboxAlignmentSize, NvU32 *pMailboxMaxOffset64KB); -static inline void kbusGetP2PMailboxAttributes_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 *pMailboxAreaSize, NvU32 *pMailboxAlignmentSize, NvU32 *pMailboxMaxOffset64KB) { - pKernelBus->__kbusGetP2PMailboxAttributes__(pGpu, pKernelBus, pMailboxAreaSize, pMailboxAlignmentSize, pMailboxMaxOffset64KB); -} - NV_STATUS kbusCreateP2PMapping_GP100(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 *peer0, NvU32 *peer1, NvU32 attributes); NV_STATUS kbusCreateP2PMapping_GH100(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 *peer0, NvU32 *peer1, NvU32 attributes); -static inline NV_STATUS kbusCreateP2PMapping_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 *peer0, NvU32 *peer1, NvU32 attributes) { - return pKernelBus0->__kbusCreateP2PMapping__(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes); -} - NV_STATUS kbusRemoveP2PMapping_GP100(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 peer0, NvU32 peer1, NvU32 attributes); NV_STATUS kbusRemoveP2PMapping_GH100(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 peer0, NvU32 peer1, NvU32 attributes); -static inline NV_STATUS kbusRemoveP2PMapping_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 peer0, NvU32 peer1, NvU32 attributes) { - return pKernelBus0->__kbusRemoveP2PMapping__(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes); -} - NvU32 kbusGetEgmPeerId_GH100(struct OBJGPU *pLocalGpu, struct KernelBus *pLocalKernelBus, struct OBJGPU *pRemoteGpu); static inline NvU32 kbusGetEgmPeerId_56cd7a(struct OBJGPU *pLocalGpu, struct KernelBus *pLocalKernelBus, struct OBJGPU *pRemoteGpu) { return NV_OK; } -static inline NvU32 kbusGetEgmPeerId_DISPATCH(struct OBJGPU *pLocalGpu, struct KernelBus *pLocalKernelBus, struct OBJGPU *pRemoteGpu) { - return pLocalKernelBus->__kbusGetEgmPeerId__(pLocalGpu, pLocalKernelBus, pRemoteGpu); -} - NvU32 kbusGetPeerId_GP100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJGPU *pPeerGpu); NvU32 kbusGetPeerId_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJGPU *pPeerGpu); -static inline NvU32 kbusGetPeerId_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJGPU *pPeerGpu) { - return pKernelBus->__kbusGetPeerId__(pGpu, pKernelBus, pPeerGpu); -} - NvU32 kbusGetNvlinkPeerId_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJGPU *pPeerGpu); static inline NvU32 kbusGetNvlinkPeerId_c732fb(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJGPU *pPeerGpu) { return 4294967295U; } -static inline NvU32 kbusGetNvlinkPeerId_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJGPU *pPeerGpu) { - return pKernelBus->__kbusGetNvlinkPeerId__(pGpu, pKernelBus, pPeerGpu); -} - NvU32 kbusGetNvSwitchPeerId_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); static inline NvU32 kbusGetNvSwitchPeerId_c732fb(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { return 4294967295U; } -static inline NvU32 kbusGetNvSwitchPeerId_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusGetNvSwitchPeerId__(pGpu, pKernelBus); -} - NvU32 kbusGetUnusedPciePeerId_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); -NvU32 kbusGetUnusedPciePeerId_TU102(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); - -static inline NvU32 kbusGetUnusedPciePeerId_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusGetUnusedPciePeerId__(pGpu, pKernelBus); -} +NvU32 kbusGetUnusedPciePeerId_TU102(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); NV_STATUS kbusIsPeerIdValid_GP100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 peerId); NV_STATUS kbusIsPeerIdValid_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 peerId); -static inline NV_STATUS kbusIsPeerIdValid_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 peerId) { - return pKernelBus->__kbusIsPeerIdValid__(pGpu, pKernelBus, peerId); -} - NV_STATUS kbusGetNvlinkP2PPeerId_VGPU(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 *nvlinkPeer, NvU32 attributes); NV_STATUS kbusGetNvlinkP2PPeerId_GP100(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 *nvlinkPeer, NvU32 attributes); @@ -1827,176 +2270,104 @@ static inline NV_STATUS kbusGetNvlinkP2PPeerId_56cd7a(struct OBJGPU *pGpu0, stru return NV_OK; } -static inline NV_STATUS kbusGetNvlinkP2PPeerId_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 *nvlinkPeer, NvU32 attributes) { - return pKernelBus0->__kbusGetNvlinkP2PPeerId__(pGpu0, pKernelBus0, pGpu1, pKernelBus1, nvlinkPeer, attributes); -} - void kbusWriteP2PWmbTag_GM200(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 remote2Local, NvU64 p2pWmbTag); void kbusWriteP2PWmbTag_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 remote2Local, NvU64 p2pWmbTag); -static inline void kbusWriteP2PWmbTag_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 remote2Local, NvU64 p2pWmbTag) { - pKernelBus->__kbusWriteP2PWmbTag__(pGpu, pKernelBus, remote2Local, p2pWmbTag); -} - RmPhysAddr kbusSetupP2PDomainAccess_GM200(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, PMEMORY_DESCRIPTOR *ppP2PDomMemDesc); RmPhysAddr kbusSetupP2PDomainAccess_GH100(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, PMEMORY_DESCRIPTOR *ppP2PDomMemDesc); -static inline RmPhysAddr kbusSetupP2PDomainAccess_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, PMEMORY_DESCRIPTOR *ppP2PDomMemDesc) { - return pKernelBus0->__kbusSetupP2PDomainAccess__(pGpu0, pKernelBus0, pGpu1, ppP2PDomMemDesc); -} - NvBool kbusNeedWarForBug999673_GM200(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJGPU *pRemoteGpu); static inline NvBool kbusNeedWarForBug999673_491d52(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJGPU *pRemoteGpu) { return ((NvBool)(0 != 0)); } -static inline NvBool kbusNeedWarForBug999673_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJGPU *pRemoteGpu) { - return pKernelBus->__kbusNeedWarForBug999673__(pGpu, pKernelBus, pRemoteGpu); -} - NV_STATUS kbusCreateP2PMappingForC2C_GH100(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 *peer0, NvU32 *peer1, NvU32 attributes); static inline NV_STATUS kbusCreateP2PMappingForC2C_46f6a7(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 *peer0, NvU32 *peer1, NvU32 attributes) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusCreateP2PMappingForC2C_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 *peer0, NvU32 *peer1, NvU32 attributes) { - return pKernelBus0->__kbusCreateP2PMappingForC2C__(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes); -} - NV_STATUS kbusRemoveP2PMappingForC2C_GH100(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 peer0, NvU32 peer1, NvU32 attributes); static inline NV_STATUS kbusRemoveP2PMappingForC2C_46f6a7(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 peer0, NvU32 peer1, NvU32 attributes) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusRemoveP2PMappingForC2C_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 peer0, NvU32 peer1, NvU32 attributes) { - return pKernelBus0->__kbusRemoveP2PMappingForC2C__(pGpu0, pKernelBus0, pGpu1, pKernelBus1, peer0, peer1, attributes); -} - NV_STATUS kbusUnreserveP2PPeerIds_GP100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 peerMask); static inline NV_STATUS kbusUnreserveP2PPeerIds_46f6a7(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 peerMask) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusUnreserveP2PPeerIds_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 peerMask) { - return pKernelBus->__kbusUnreserveP2PPeerIds__(pGpu, pKernelBus, peerMask); -} - NvBool kbusIsBar1P2PCapable_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); static inline NvBool kbusIsBar1P2PCapable_bf6dfa(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { return ((NvBool)(0 != 0)); } -static inline NvBool kbusIsBar1P2PCapable_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { - return pKernelBus->__kbusIsBar1P2PCapable__(pGpu, pKernelBus, gfid); -} - NV_STATUS kbusEnableStaticBar1Mapping_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); static inline NV_STATUS kbusEnableStaticBar1Mapping_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusEnableStaticBar1Mapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { - return pKernelBus->__kbusEnableStaticBar1Mapping__(pGpu, pKernelBus, gfid); -} - static inline void kbusDisableStaticBar1Mapping_d44104(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { return; } void kbusDisableStaticBar1Mapping_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); -static inline void kbusDisableStaticBar1Mapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { - pKernelBus->__kbusDisableStaticBar1Mapping__(pGpu, pKernelBus, gfid); -} - NV_STATUS kbusGetBar1P2PDmaInfo_GH100(struct OBJGPU *pSrcGpu, struct OBJGPU *pPeerGpu, struct KernelBus *pPeerKernelBus, NvU64 *dma_addr, NvU64 *dma_size); static inline NV_STATUS kbusGetBar1P2PDmaInfo_395e98(struct OBJGPU *pSrcGpu, struct OBJGPU *pPeerGpu, struct KernelBus *pPeerKernelBus, NvU64 *dma_addr, NvU64 *dma_size) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusGetBar1P2PDmaInfo_DISPATCH(struct OBJGPU *pSrcGpu, struct OBJGPU *pPeerGpu, struct KernelBus *pPeerKernelBus, NvU64 *dma_addr, NvU64 *dma_size) { - return pPeerKernelBus->__kbusGetBar1P2PDmaInfo__(pSrcGpu, pPeerGpu, pPeerKernelBus, dma_addr, dma_size); -} - NV_STATUS kbusUpdateStaticBar1VAMapping_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 offset, NvU64 length, NvBool bRelease); static inline NV_STATUS kbusUpdateStaticBar1VAMapping_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 offset, NvU64 length, NvBool bRelease) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusUpdateStaticBar1VAMapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 offset, NvU64 length, NvBool bRelease) { - return pKernelBus->__kbusUpdateStaticBar1VAMapping__(pGpu, pKernelBus, pMemDesc, offset, length, bRelease); -} - NV_STATUS kbusGetStaticFbAperture_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 offset, NvU64 *pAperOffset, NvU64 *pLength, NvU32 gfid); static inline NV_STATUS kbusGetStaticFbAperture_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 offset, NvU64 *pAperOffset, NvU64 *pLength, NvU32 gfid) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusGetStaticFbAperture_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 offset, NvU64 *pAperOffset, NvU64 *pLength, NvU32 gfid) { - return pKernelBus->__kbusGetStaticFbAperture__(pGpu, pKernelBus, pMemDesc, offset, pAperOffset, pLength, gfid); -} - NV_STATUS kbusCreateP2PMappingForBar1P2P_GH100(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 attributes); static inline NV_STATUS kbusCreateP2PMappingForBar1P2P_395e98(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 attributes) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusCreateP2PMappingForBar1P2P_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 attributes) { - return pKernelBus0->__kbusCreateP2PMappingForBar1P2P__(pGpu0, pKernelBus0, pGpu1, pKernelBus1, attributes); -} - NV_STATUS kbusRemoveP2PMappingForBar1P2P_GH100(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 attributes); static inline NV_STATUS kbusRemoveP2PMappingForBar1P2P_395e98(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 attributes) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusRemoveP2PMappingForBar1P2P_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 attributes) { - return pKernelBus0->__kbusRemoveP2PMappingForBar1P2P__(pGpu0, pKernelBus0, pGpu1, pKernelBus1, attributes); -} - NvBool kbusHasPcieBar1P2PMapping_GH100(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1); static inline NvBool kbusHasPcieBar1P2PMapping_bf6dfa(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1) { return ((NvBool)(0 != 0)); } -static inline NvBool kbusHasPcieBar1P2PMapping_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1) { - return pKernelBus0->__kbusHasPcieBar1P2PMapping__(pGpu0, pKernelBus0, pGpu1, pKernelBus1); -} - NvBool kbusIsPcieBar1P2PMappingSupported_GH100(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1); static inline NvBool kbusIsPcieBar1P2PMappingSupported_bf6dfa(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1) { return ((NvBool)(0 != 0)); } -static inline NvBool kbusIsPcieBar1P2PMappingSupported_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1) { - return pKernelBus0->__kbusIsPcieBar1P2PMappingSupported__(pGpu0, pKernelBus0, pGpu1, pKernelBus1); -} - NV_STATUS kbusCheckFlaSupportedAndInit_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 base, NvU64 size); static inline NV_STATUS kbusCheckFlaSupportedAndInit_ac1694(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 base, NvU64 size) { return NV_OK; } -static inline NV_STATUS kbusCheckFlaSupportedAndInit_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 base, NvU64 size) { - return pKernelBus->__kbusCheckFlaSupportedAndInit__(pGpu, pKernelBus, base, size); -} - NV_STATUS kbusDetermineFlaRangeAndAllocate_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 base, NvU64 size); NV_STATUS kbusDetermineFlaRangeAndAllocate_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 base, NvU64 size); @@ -2005,54 +2376,34 @@ static inline NV_STATUS kbusDetermineFlaRangeAndAllocate_395e98(struct OBJGPU *p return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusDetermineFlaRangeAndAllocate_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 base, NvU64 size) { - return pKernelBus->__kbusDetermineFlaRangeAndAllocate__(pGpu, pKernelBus, base, size); -} - -NV_STATUS kbusAllocateFlaVaspace_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg0, NvU64 arg1); +NV_STATUS kbusAllocateFlaVaspace_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg3, NvU64 arg4); -NV_STATUS kbusAllocateFlaVaspace_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg0, NvU64 arg1); +NV_STATUS kbusAllocateFlaVaspace_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg3, NvU64 arg4); -static inline NV_STATUS kbusAllocateFlaVaspace_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg0, NvU64 arg1) { +static inline NV_STATUS kbusAllocateFlaVaspace_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg3, NvU64 arg4) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusAllocateFlaVaspace_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg0, NvU64 arg1) { - return pKernelBus->__kbusAllocateFlaVaspace__(pGpu, pKernelBus, arg0, arg1); -} - -NV_STATUS kbusGetFlaRange_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 *arg0, NvU64 *arg1, NvBool arg2); +NV_STATUS kbusGetFlaRange_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 *arg3, NvU64 *arg4, NvBool arg5); -NV_STATUS kbusGetFlaRange_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 *arg0, NvU64 *arg1, NvBool arg2); +NV_STATUS kbusGetFlaRange_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 *arg3, NvU64 *arg4, NvBool arg5); -static inline NV_STATUS kbusGetFlaRange_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 *arg0, NvU64 *arg1, NvBool arg2) { +static inline NV_STATUS kbusGetFlaRange_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 *arg3, NvU64 *arg4, NvBool arg5) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusGetFlaRange_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 *arg0, NvU64 *arg1, NvBool arg2) { - return pKernelBus->__kbusGetFlaRange__(pGpu, pKernelBus, arg0, arg1, arg2); -} - -NV_STATUS kbusAllocateLegacyFlaVaspace_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg0, NvU64 arg1); +NV_STATUS kbusAllocateLegacyFlaVaspace_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg3, NvU64 arg4); -static inline NV_STATUS kbusAllocateLegacyFlaVaspace_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg0, NvU64 arg1) { +static inline NV_STATUS kbusAllocateLegacyFlaVaspace_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg3, NvU64 arg4) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusAllocateLegacyFlaVaspace_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg0, NvU64 arg1) { - return pKernelBus->__kbusAllocateLegacyFlaVaspace__(pGpu, pKernelBus, arg0, arg1); -} - -NV_STATUS kbusAllocateHostManagedFlaVaspace_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvHandle arg0, NvHandle arg1, NvHandle arg2, NvHandle arg3, NvU64 arg4, NvU64 arg5, NvU32 arg6); +NV_STATUS kbusAllocateHostManagedFlaVaspace_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvHandle arg3, NvHandle arg4, NvHandle arg5, NvHandle arg6, NvU64 arg7, NvU64 arg8, NvU32 arg9); -static inline NV_STATUS kbusAllocateHostManagedFlaVaspace_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvHandle arg0, NvHandle arg1, NvHandle arg2, NvHandle arg3, NvU64 arg4, NvU64 arg5, NvU32 arg6) { +static inline NV_STATUS kbusAllocateHostManagedFlaVaspace_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvHandle arg3, NvHandle arg4, NvHandle arg5, NvHandle arg6, NvU64 arg7, NvU64 arg8, NvU32 arg9) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusAllocateHostManagedFlaVaspace_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvHandle arg0, NvHandle arg1, NvHandle arg2, NvHandle arg3, NvU64 arg4, NvU64 arg5, NvU32 arg6) { - return pKernelBus->__kbusAllocateHostManagedFlaVaspace__(pGpu, pKernelBus, arg0, arg1, arg2, arg3, arg4, arg5, arg6); -} - void kbusDestroyFla_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); void kbusDestroyFla_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); @@ -2061,70 +2412,42 @@ static inline void kbusDestroyFla_d44104(struct OBJGPU *pGpu, struct KernelBus * return; } -static inline void kbusDestroyFla_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - pKernelBus->__kbusDestroyFla__(pGpu, pKernelBus); -} - -NV_STATUS kbusGetFlaVaspace_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJVASPACE **arg0); +NV_STATUS kbusGetFlaVaspace_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJVASPACE **arg3); -static inline NV_STATUS kbusGetFlaVaspace_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJVASPACE **arg0) { +static inline NV_STATUS kbusGetFlaVaspace_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJVASPACE **arg3) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusGetFlaVaspace_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJVASPACE **arg0) { - return pKernelBus->__kbusGetFlaVaspace__(pGpu, pKernelBus, arg0); -} - -void kbusDestroyHostManagedFlaVaspace_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg0); +void kbusDestroyHostManagedFlaVaspace_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg3); -static inline void kbusDestroyHostManagedFlaVaspace_d44104(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg0) { +static inline void kbusDestroyHostManagedFlaVaspace_d44104(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg3) { return; } -static inline void kbusDestroyHostManagedFlaVaspace_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg0) { - pKernelBus->__kbusDestroyHostManagedFlaVaspace__(pGpu, pKernelBus, arg0); -} - -NvBool kbusVerifyFlaRange_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg0, NvU64 arg1); +NvBool kbusVerifyFlaRange_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg3, NvU64 arg4); -static inline NvBool kbusVerifyFlaRange_bf6dfa(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg0, NvU64 arg1) { +static inline NvBool kbusVerifyFlaRange_bf6dfa(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg3, NvU64 arg4) { return ((NvBool)(0 != 0)); } -static inline NvBool kbusVerifyFlaRange_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg0, NvU64 arg1) { - return pKernelBus->__kbusVerifyFlaRange__(pGpu, pKernelBus, arg0, arg1); -} - -NV_STATUS kbusConstructFlaInstBlk_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg0); +NV_STATUS kbusConstructFlaInstBlk_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg3); -static inline NV_STATUS kbusConstructFlaInstBlk_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg0) { +static inline NV_STATUS kbusConstructFlaInstBlk_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg3) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusConstructFlaInstBlk_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg0) { - return pKernelBus->__kbusConstructFlaInstBlk__(pGpu, pKernelBus, arg0); -} - void kbusDestructFlaInstBlk_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); static inline void kbusDestructFlaInstBlk_d44104(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { return; } -static inline void kbusDestructFlaInstBlk_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - pKernelBus->__kbusDestructFlaInstBlk__(pGpu, pKernelBus); -} - NV_STATUS kbusValidateFlaBaseAddress_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 flaBaseAddr); static inline NV_STATUS kbusValidateFlaBaseAddress_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 flaBaseAddr) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusValidateFlaBaseAddress_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 flaBaseAddr) { - return pKernelBus->__kbusValidateFlaBaseAddress__(pGpu, pKernelBus, flaBaseAddr); -} - NV_STATUS kbusSetupUnbindFla_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); NV_STATUS kbusSetupUnbindFla_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); @@ -2133,10 +2456,6 @@ static inline NV_STATUS kbusSetupUnbindFla_46f6a7(struct OBJGPU *pGpu, struct Ke return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusSetupUnbindFla_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusSetupUnbindFla__(pGpu, pKernelBus); -} - NV_STATUS kbusSetupBindFla_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); NV_STATUS kbusSetupBindFla_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); @@ -2145,20 +2464,12 @@ static inline NV_STATUS kbusSetupBindFla_46f6a7(struct OBJGPU *pGpu, struct Kern return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusSetupBindFla_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { - return pKernelBus->__kbusSetupBindFla__(pGpu, pKernelBus, gfid); -} - static inline NV_STATUS kbusSendSysmembarSingle_56cd7a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { return NV_OK; } NV_STATUS kbusSendSysmembarSingle_KERNEL(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); -static inline NV_STATUS kbusSendSysmembarSingle_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusSendSysmembarSingle__(pGpu, pKernelBus); -} - void kbusCacheBAR1ResizeSize_WAR_BUG_3249028_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); void kbusCacheBAR1ResizeSize_WAR_BUG_3249028_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); @@ -2167,10 +2478,6 @@ static inline void kbusCacheBAR1ResizeSize_WAR_BUG_3249028_d44104(struct OBJGPU return; } -static inline void kbusCacheBAR1ResizeSize_WAR_BUG_3249028_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - pKernelBus->__kbusCacheBAR1ResizeSize_WAR_BUG_3249028__(pGpu, pKernelBus); -} - NV_STATUS kbusRestoreBAR1ResizeSize_WAR_BUG_3249028_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); NV_STATUS kbusRestoreBAR1ResizeSize_WAR_BUG_3249028_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); @@ -2179,25 +2486,13 @@ static inline NV_STATUS kbusRestoreBAR1ResizeSize_WAR_BUG_3249028_ac1694(struct return NV_OK; } -static inline NV_STATUS kbusRestoreBAR1ResizeSize_WAR_BUG_3249028_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusRestoreBAR1ResizeSize_WAR_BUG_3249028__(pGpu, pKernelBus); -} - -NV_STATUS kbusIsDirectMappingAllowed_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg0, NvU32 arg1, NvBool *arg2); - -NV_STATUS kbusIsDirectMappingAllowed_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg0, NvU32 arg1, NvBool *arg2); - -static inline NV_STATUS kbusIsDirectMappingAllowed_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg0, NvU32 arg1, NvBool *arg2) { - return pKernelBus->__kbusIsDirectMappingAllowed__(pGpu, pKernelBus, arg0, arg1, arg2); -} +NV_STATUS kbusIsDirectMappingAllowed_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg3, NvU32 arg4, NvBool *arg5); -NV_STATUS kbusUseDirectSysmemMap_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *arg0, NvBool *arg1); +NV_STATUS kbusIsDirectMappingAllowed_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg3, NvU32 arg4, NvBool *arg5); -NV_STATUS kbusUseDirectSysmemMap_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *arg0, NvBool *arg1); +NV_STATUS kbusUseDirectSysmemMap_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *arg3, NvBool *arg4); -static inline NV_STATUS kbusUseDirectSysmemMap_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *arg0, NvBool *arg1) { - return pKernelBus->__kbusUseDirectSysmemMap__(pGpu, pKernelBus, arg0, arg1); -} +NV_STATUS kbusUseDirectSysmemMap_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *arg3, NvBool *arg4); NV_STATUS kbusMemCopyBar0Window_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, RmPhysAddr physAddr, void *pData, NvLength copySize, NvBool bRead); @@ -2205,20 +2500,12 @@ static inline NV_STATUS kbusMemCopyBar0Window_46f6a7(struct OBJGPU *pGpu, struct return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusMemCopyBar0Window_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, RmPhysAddr physAddr, void *pData, NvLength copySize, NvBool bRead) { - return pKernelBus->__kbusMemCopyBar0Window__(pGpu, pKernelBus, physAddr, pData, copySize, bRead); -} - NV_STATUS kbusWriteBAR0WindowBase_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 base); static inline NV_STATUS kbusWriteBAR0WindowBase_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 base) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusWriteBAR0WindowBase_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 base) { - return pKernelBus->__kbusWriteBAR0WindowBase__(pGpu, pKernelBus, base); -} - NvU32 kbusReadBAR0WindowBase_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); static inline NvU32 kbusReadBAR0WindowBase_13cd8d(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { @@ -2226,10 +2513,6 @@ static inline NvU32 kbusReadBAR0WindowBase_13cd8d(struct OBJGPU *pGpu, struct Ke return 0; } -static inline NvU32 kbusReadBAR0WindowBase_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusReadBAR0WindowBase__(pGpu, pKernelBus); -} - NvBool kbusValidateBAR0WindowBase_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 base); static inline NvBool kbusValidateBAR0WindowBase_ceaee8(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 base) { @@ -2237,10 +2520,6 @@ static inline NvBool kbusValidateBAR0WindowBase_ceaee8(struct OBJGPU *pGpu, stru return ((NvBool)(0 != 0)); } -static inline NvBool kbusValidateBAR0WindowBase_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 base) { - return pKernelBus->__kbusValidateBAR0WindowBase__(pGpu, pKernelBus, base); -} - static inline NV_STATUS kbusSetBAR0WindowVidOffset_56cd7a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 vidOffset) { return NV_OK; } @@ -2249,37 +2528,21 @@ NV_STATUS kbusSetBAR0WindowVidOffset_GM107(struct OBJGPU *pGpu, struct KernelBus NV_STATUS kbusSetBAR0WindowVidOffset_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 vidOffset); -static inline NV_STATUS kbusSetBAR0WindowVidOffset_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 vidOffset) { - return pKernelBus->__kbusSetBAR0WindowVidOffset__(pGpu, pKernelBus, vidOffset); -} - NvU64 kbusGetBAR0WindowVidOffset_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); NvU64 kbusGetBAR0WindowVidOffset_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); -static inline NvU64 kbusGetBAR0WindowVidOffset_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusGetBAR0WindowVidOffset__(pGpu, pKernelBus); -} - -static inline NV_STATUS kbusSetupBar0WindowBeforeBar2Bootstrap_56cd7a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 *arg0) { +static inline NV_STATUS kbusSetupBar0WindowBeforeBar2Bootstrap_56cd7a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 *arg3) { return NV_OK; } -NV_STATUS kbusSetupBar0WindowBeforeBar2Bootstrap_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 *arg0); - -static inline NV_STATUS kbusSetupBar0WindowBeforeBar2Bootstrap_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 *arg0) { - return pKernelBus->__kbusSetupBar0WindowBeforeBar2Bootstrap__(pGpu, pKernelBus, arg0); -} +NV_STATUS kbusSetupBar0WindowBeforeBar2Bootstrap_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 *arg3); -static inline void kbusRestoreBar0WindowAfterBar2Bootstrap_b3696a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg0) { +static inline void kbusRestoreBar0WindowAfterBar2Bootstrap_b3696a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg3) { return; } -void kbusRestoreBar0WindowAfterBar2Bootstrap_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg0); - -static inline void kbusRestoreBar0WindowAfterBar2Bootstrap_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg0) { - pKernelBus->__kbusRestoreBar0WindowAfterBar2Bootstrap__(pGpu, pKernelBus, arg0); -} +void kbusRestoreBar0WindowAfterBar2Bootstrap_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg3); static inline NV_STATUS kbusVerifyBar2_56cd7a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR memDescIn, NvU8 *pCpuPtrIn, NvU64 offset, NvU64 size) { return NV_OK; @@ -2289,66 +2552,42 @@ NV_STATUS kbusVerifyBar2_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus NV_STATUS kbusVerifyBar2_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR memDescIn, NvU8 *pCpuPtrIn, NvU64 offset, NvU64 size); -static inline NV_STATUS kbusVerifyBar2_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR memDescIn, NvU8 *pCpuPtrIn, NvU64 offset, NvU64 size) { - return pKernelBus->__kbusVerifyBar2__(pGpu, pKernelBus, memDescIn, pCpuPtrIn, offset, size); -} - -NV_STATUS kbusBar2BootStrapInPhysicalMode_VGPUSTUB(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); +NV_STATUS kbusBar2BootStrapInPhysicalMode_VF(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); static inline NV_STATUS kbusBar2BootStrapInPhysicalMode_56cd7a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { return NV_OK; } -static inline NV_STATUS kbusBar2BootStrapInPhysicalMode_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusBar2BootStrapInPhysicalMode__(pGpu, pKernelBus); -} - -static inline NV_STATUS kbusBindBar2_5baef9(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, BAR2_MODE arg0) { +static inline NV_STATUS kbusBindBar2_5baef9(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, BAR2_MODE arg3) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -NV_STATUS kbusBindBar2_TU102(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, BAR2_MODE arg0); - -NV_STATUS kbusBindBar2_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, BAR2_MODE arg0); +NV_STATUS kbusBindBar2_TU102(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, BAR2_MODE arg3); -static inline NV_STATUS kbusBindBar2_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, BAR2_MODE arg0) { - return pKernelBus->__kbusBindBar2__(pGpu, pKernelBus, arg0); -} +NV_STATUS kbusBindBar2_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, BAR2_MODE arg3); -static inline void kbusInstBlkWriteAddrLimit_f2d351(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvBool arg0, NvU64 arg1, NvU8 *arg2, NvU64 arg3) { +static inline void kbusInstBlkWriteAddrLimit_f2d351(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvBool arg3, NvU64 arg4, NvU8 *arg5, NvU64 arg6) { NV_ASSERT_PRECOMP(0); } -void kbusInstBlkWriteAddrLimit_GP100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvBool arg0, NvU64 arg1, NvU8 *arg2, NvU64 arg3); +void kbusInstBlkWriteAddrLimit_GP100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvBool arg3, NvU64 arg4, NvU8 *arg5, NvU64 arg6); -static inline void kbusInstBlkWriteAddrLimit_b3696a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvBool arg0, NvU64 arg1, NvU8 *arg2, NvU64 arg3) { +static inline void kbusInstBlkWriteAddrLimit_b3696a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvBool arg3, NvU64 arg4, NvU8 *arg5, NvU64 arg6) { return; } -static inline void kbusInstBlkWriteAddrLimit_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvBool arg0, NvU64 arg1, NvU8 *arg2, NvU64 arg3) { - pKernelBus->__kbusInstBlkWriteAddrLimit__(pGpu, pKernelBus, arg0, arg1, arg2, arg3); -} - static inline NV_STATUS kbusInitInstBlk_ac1694(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR pInstBlkMemDesc, PMEMORY_DESCRIPTOR pPDB, NvU64 vaLimit, NvU64 bigPageSize, struct OBJVASPACE *pVAS) { return NV_OK; } NV_STATUS kbusInitInstBlk_GP100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR pInstBlkMemDesc, PMEMORY_DESCRIPTOR pPDB, NvU64 vaLimit, NvU64 bigPageSize, struct OBJVASPACE *pVAS); -static inline NV_STATUS kbusInitInstBlk_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR pInstBlkMemDesc, PMEMORY_DESCRIPTOR pPDB, NvU64 vaLimit, NvU64 bigPageSize, struct OBJVASPACE *pVAS) { - return pKernelBus->__kbusInitInstBlk__(pGpu, pKernelBus, pInstBlkMemDesc, pPDB, vaLimit, bigPageSize, pVAS); -} - static inline void kbusBar2InstBlkWrite_d44104(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU8 *pMap, PMEMORY_DESCRIPTOR pPDB, NvU64 vaLimit, NvU64 bigPageSize) { return; } void kbusBar2InstBlkWrite_GP100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU8 *pMap, PMEMORY_DESCRIPTOR pPDB, NvU64 vaLimit, NvU64 bigPageSize); -static inline void kbusBar2InstBlkWrite_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU8 *pMap, PMEMORY_DESCRIPTOR pPDB, NvU64 vaLimit, NvU64 bigPageSize) { - pKernelBus->__kbusBar2InstBlkWrite__(pGpu, pKernelBus, pMap, pPDB, vaLimit, bigPageSize); -} - static inline NV_STATUS kbusSetupBar2PageTablesAtBottomOfFb_22ba1e(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { NV_ASSERT_PRECOMP(0); { @@ -2358,10 +2597,6 @@ static inline NV_STATUS kbusSetupBar2PageTablesAtBottomOfFb_22ba1e(struct OBJGPU NV_STATUS kbusSetupBar2PageTablesAtBottomOfFb_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); -static inline NV_STATUS kbusSetupBar2PageTablesAtBottomOfFb_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { - return pKernelBus->__kbusSetupBar2PageTablesAtBottomOfFb__(pGpu, pKernelBus, gfid); -} - static inline void kbusTeardownBar2PageTablesAtBottomOfFb_566dba(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { NV_ASSERT_PRECOMP(0); { @@ -2371,10 +2606,6 @@ static inline void kbusTeardownBar2PageTablesAtBottomOfFb_566dba(struct OBJGPU * void kbusTeardownBar2PageTablesAtBottomOfFb_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); -static inline void kbusTeardownBar2PageTablesAtBottomOfFb_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { - pKernelBus->__kbusTeardownBar2PageTablesAtBottomOfFb__(pGpu, pKernelBus, gfid); -} - static inline NV_STATUS kbusSetupBar2InstBlkAtBottomOfFb_22ba1e(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR pPDB, NvU64 vaLimit, NvU64 bigPageSize, NvU32 gfid) { NV_ASSERT_PRECOMP(0); { @@ -2384,10 +2615,6 @@ static inline NV_STATUS kbusSetupBar2InstBlkAtBottomOfFb_22ba1e(struct OBJGPU *p NV_STATUS kbusSetupBar2InstBlkAtBottomOfFb_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR pPDB, NvU64 vaLimit, NvU64 bigPageSize, NvU32 gfid); -static inline NV_STATUS kbusSetupBar2InstBlkAtBottomOfFb_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR pPDB, NvU64 vaLimit, NvU64 bigPageSize, NvU32 gfid) { - return pKernelBus->__kbusSetupBar2InstBlkAtBottomOfFb__(pGpu, pKernelBus, pPDB, vaLimit, bigPageSize, gfid); -} - static inline void kbusTeardownBar2InstBlkAtBottomOfFb_566dba(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { NV_ASSERT_PRECOMP(0); { @@ -2397,10 +2624,6 @@ static inline void kbusTeardownBar2InstBlkAtBottomOfFb_566dba(struct OBJGPU *pGp void kbusTeardownBar2InstBlkAtBottomOfFb_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); -static inline void kbusTeardownBar2InstBlkAtBottomOfFb_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { - pKernelBus->__kbusTeardownBar2InstBlkAtBottomOfFb__(pGpu, pKernelBus, gfid); -} - static inline NV_STATUS kbusSetupBar2PageTablesAtTopOfFb_22ba1e(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { NV_ASSERT_PRECOMP(0); { @@ -2410,10 +2633,6 @@ static inline NV_STATUS kbusSetupBar2PageTablesAtTopOfFb_22ba1e(struct OBJGPU *p NV_STATUS kbusSetupBar2PageTablesAtTopOfFb_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); -static inline NV_STATUS kbusSetupBar2PageTablesAtTopOfFb_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { - return pKernelBus->__kbusSetupBar2PageTablesAtTopOfFb__(pGpu, pKernelBus, gfid); -} - static inline NV_STATUS kbusCommitBar2PDEs_22ba1e(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { NV_ASSERT_PRECOMP(0); { @@ -2423,88 +2642,52 @@ static inline NV_STATUS kbusCommitBar2PDEs_22ba1e(struct OBJGPU *pGpu, struct Ke NV_STATUS kbusCommitBar2PDEs_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); -static inline NV_STATUS kbusCommitBar2PDEs_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusCommitBar2PDEs__(pGpu, pKernelBus); -} - static inline NV_STATUS kbusVerifyCoherentLink_56cd7a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { return NV_OK; } NV_STATUS kbusVerifyCoherentLink_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); -static inline NV_STATUS kbusVerifyCoherentLink_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusVerifyCoherentLink__(pGpu, pKernelBus); -} - void kbusTeardownMailbox_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); void kbusTeardownMailbox_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); -static inline void kbusTeardownMailbox_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - pKernelBus->__kbusTeardownMailbox__(pGpu, pKernelBus); -} - static inline NV_STATUS kbusBar1InstBlkVasUpdate_56cd7a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { return NV_OK; } NV_STATUS kbusBar1InstBlkVasUpdate_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); -static inline NV_STATUS kbusBar1InstBlkVasUpdate_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusBar1InstBlkVasUpdate__(pGpu, pKernelBus); -} - NV_STATUS kbusFlushPcieForBar0Doorbell_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); static inline NV_STATUS kbusFlushPcieForBar0Doorbell_56cd7a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { return NV_OK; } -static inline NV_STATUS kbusFlushPcieForBar0Doorbell_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusFlushPcieForBar0Doorbell__(pGpu, pKernelBus); -} - NV_STATUS kbusCreateCoherentCpuMapping_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 numaOnlineMemorySize, NvBool bFlush); static inline NV_STATUS kbusCreateCoherentCpuMapping_46f6a7(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 numaOnlineMemorySize, NvBool bFlush) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbusCreateCoherentCpuMapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 numaOnlineMemorySize, NvBool bFlush) { - return pKernelBus->__kbusCreateCoherentCpuMapping__(pGpu, pKernelBus, numaOnlineMemorySize, bFlush); -} - -NvU8 *kbusMapCoherentCpuMapping_GV100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg0); - -static inline NvU8 *kbusMapCoherentCpuMapping_9e2234(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg0) { - return ((void *)0); -} +NV_STATUS kbusMapCoherentCpuMapping_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 offset, NvU64 length, NvU32 protect, NvP64 *ppAddress, NvP64 *ppPriv); -static inline NvU8 *kbusMapCoherentCpuMapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg0) { - return pKernelBus->__kbusMapCoherentCpuMapping__(pGpu, pKernelBus, arg0); +static inline NV_STATUS kbusMapCoherentCpuMapping_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 offset, NvU64 length, NvU32 protect, NvP64 *ppAddress, NvP64 *ppPriv) { + return NV_ERR_NOT_SUPPORTED; } -void kbusUnmapCoherentCpuMapping_GV100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg0); +void kbusUnmapCoherentCpuMapping_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvP64 pAddress, NvP64 pPriv); -static inline void kbusUnmapCoherentCpuMapping_d44104(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg0) { +static inline void kbusUnmapCoherentCpuMapping_d44104(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvP64 pAddress, NvP64 pPriv) { return; } -static inline void kbusUnmapCoherentCpuMapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg0) { - pKernelBus->__kbusUnmapCoherentCpuMapping__(pGpu, pKernelBus, arg0); -} - -void kbusTeardownCoherentCpuMapping_GV100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvBool arg0); +void kbusTeardownCoherentCpuMapping_GV100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvBool arg3); -static inline void kbusTeardownCoherentCpuMapping_d44104(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvBool arg0) { +static inline void kbusTeardownCoherentCpuMapping_b3696a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvBool arg3) { return; } -static inline void kbusTeardownCoherentCpuMapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvBool arg0) { - pKernelBus->__kbusTeardownCoherentCpuMapping__(pGpu, pKernelBus, arg0); -} - static inline NV_STATUS kbusBar1InstBlkBind_92bfc3(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { NV_ASSERT_PRECOMP(0); return NV_ERR_NOT_SUPPORTED; @@ -2514,36 +2697,12 @@ NV_STATUS kbusBar1InstBlkBind_TU102(struct OBJGPU *pGpu, struct KernelBus *pKern NV_STATUS kbusBar1InstBlkBind_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); -static inline NV_STATUS kbusBar1InstBlkBind_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusBar1InstBlkBind__(pGpu, pKernelBus); -} - NvU32 kbusGetEccCounts_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); static inline NvU32 kbusGetEccCounts_4a4dee(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { return 0; } -static inline NvU32 kbusGetEccCounts_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusGetEccCounts__(pGpu, pKernelBus); -} - -static inline NV_STATUS kbusStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelBus *pEngstate) { - return pEngstate->__kbusStateInitUnlocked__(pGpu, pEngstate); -} - -static inline void kbusInitMissing_DISPATCH(POBJGPU pGpu, struct KernelBus *pEngstate) { - pEngstate->__kbusInitMissing__(pGpu, pEngstate); -} - -static inline NV_STATUS kbusStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelBus *pEngstate) { - return pEngstate->__kbusStatePreInitUnlocked__(pGpu, pEngstate); -} - -static inline NvBool kbusIsPresent_DISPATCH(POBJGPU pGpu, struct KernelBus *pEngstate) { - return pEngstate->__kbusIsPresent__(pGpu, pEngstate); -} - static inline NvBool kbusIsBar1Force64KBMappingEnabled(struct KernelBus *pKernelBus) { return pKernelBus->bBar1Force64KBMapping; } @@ -2639,9 +2798,9 @@ static inline void kbusDestroyMailbox(struct OBJGPU *pGpu0, struct KernelBus *pK #define kbusDestroyMailbox(pGpu0, pKernelBus0, pGpu1, peerIdx) kbusDestroyMailbox_IMPL(pGpu0, pKernelBus0, pGpu1, peerIdx) #endif //__nvoc_kern_bus_h_disabled -RmPhysAddr kbusSetupPeerBarAccess_IMPL(struct OBJGPU *pGpu0, struct OBJGPU *pGpu1, RmPhysAddr arg0, NvU64 arg1, PMEMORY_DESCRIPTOR *arg2); +RmPhysAddr kbusSetupPeerBarAccess_IMPL(struct OBJGPU *pGpu0, struct OBJGPU *pGpu1, RmPhysAddr arg3, NvU64 arg4, PMEMORY_DESCRIPTOR *arg5); -#define kbusSetupPeerBarAccess(pGpu0, pGpu1, arg0, arg1, arg2) kbusSetupPeerBarAccess_IMPL(pGpu0, pGpu1, arg0, arg1, arg2) +#define kbusSetupPeerBarAccess(pGpu0, pGpu1, arg3, arg4, arg5) kbusSetupPeerBarAccess_IMPL(pGpu0, pGpu1, arg3, arg4, arg5) NvBool kbusIsStaticBar1Enabled_IMPL(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); #ifdef __nvoc_kern_bus_h_disabled @@ -2755,15 +2914,15 @@ static inline NV_STATUS kbusUnmapFbApertureByHandle(struct OBJGPU *pGpu, struct #define kbusUnmapFbApertureByHandle(pGpu, pKernelBus, hClient, hMemory, bar1Va) kbusUnmapFbApertureByHandle_IMPL(pGpu, pKernelBus, hClient, hMemory, bar1Va) #endif //__nvoc_kern_bus_h_disabled -NV_STATUS kbusGetBar1VARangeForDevice_IMPL(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct Device *pDevice, struct NV_RANGE *arg0); +NV_STATUS kbusGetBar1VARangeForDevice_IMPL(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct Device *pDevice, struct NV_RANGE *arg4); #ifdef __nvoc_kern_bus_h_disabled -static inline NV_STATUS kbusGetBar1VARangeForDevice(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct Device *pDevice, struct NV_RANGE *arg0) { +static inline NV_STATUS kbusGetBar1VARangeForDevice(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct Device *pDevice, struct NV_RANGE *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_bus_h_disabled -#define kbusGetBar1VARangeForDevice(pGpu, pKernelBus, pDevice, arg0) kbusGetBar1VARangeForDevice_IMPL(pGpu, pKernelBus, pDevice, arg0) +#define kbusGetBar1VARangeForDevice(pGpu, pKernelBus, pDevice, arg4) kbusGetBar1VARangeForDevice_IMPL(pGpu, pKernelBus, pDevice, arg4) #endif //__nvoc_kern_bus_h_disabled NvU32 kbusGetFlushAperture_IMPL(struct KernelBus *pKernelBus, NV_ADDRESS_SPACE addrSpace); diff --git a/src/nvidia/generated/g_kern_disp_nvoc.c b/src/nvidia/generated/g_kern_disp_nvoc.c index 9e3c275d43..44233c8ba0 100644 --- a/src/nvidia/generated/g_kern_disp_nvoc.c +++ b/src/nvidia/generated/g_kern_disp_nvoc.c @@ -75,78 +75,102 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelDisplay = /*pExportInfo=*/ &__nvoc_export_info_KernelDisplay }; -static NV_STATUS __nvoc_thunk_KernelDisplay_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay, ENGDESCRIPTOR engDesc) { - return kdispConstructEngine(pGpu, (struct KernelDisplay *)(((unsigned char *)pKernelDisplay) - __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), engDesc); +// 8 down-thunk(s) defined to bridge methods in KernelDisplay from superclasses + +// kdispConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelDisplay_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay, ENGDESCRIPTOR engDesc) { + return kdispConstructEngine(pGpu, (struct KernelDisplay *)(((unsigned char *) pKernelDisplay) - __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), engDesc); } -static NV_STATUS __nvoc_thunk_KernelDisplay_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay) { - return kdispStatePreInitLocked(pGpu, (struct KernelDisplay *)(((unsigned char *)pKernelDisplay) - __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); +// kdispStatePreInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelDisplay_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay) { + return kdispStatePreInitLocked(pGpu, (struct KernelDisplay *)(((unsigned char *) pKernelDisplay) - __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_KernelDisplay_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay) { - return kdispStateInitLocked(pGpu, (struct KernelDisplay *)(((unsigned char *)pKernelDisplay) - __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); +// kdispStateInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelDisplay_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay) { + return kdispStateInitLocked(pGpu, (struct KernelDisplay *)(((unsigned char *) pKernelDisplay) - __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); } -static void __nvoc_thunk_KernelDisplay_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay) { - kdispStateDestroy(pGpu, (struct KernelDisplay *)(((unsigned char *)pKernelDisplay) - __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); +// kdispStateDestroy: virtual override (engstate) base (engstate) +static void __nvoc_down_thunk_KernelDisplay_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay) { + kdispStateDestroy(pGpu, (struct KernelDisplay *)(((unsigned char *) pKernelDisplay) - __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_KernelDisplay_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay, NvU32 flags) { - return kdispStateLoad(pGpu, (struct KernelDisplay *)(((unsigned char *)pKernelDisplay) - __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), flags); +// kdispStateLoad: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelDisplay_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay, NvU32 flags) { + return kdispStateLoad(pGpu, (struct KernelDisplay *)(((unsigned char *) pKernelDisplay) - __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), flags); } -static NV_STATUS __nvoc_thunk_KernelDisplay_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay, NvU32 flags) { - return kdispStateUnload(pGpu, (struct KernelDisplay *)(((unsigned char *)pKernelDisplay) - __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), flags); +// kdispStateUnload: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelDisplay_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay, NvU32 flags) { + return kdispStateUnload(pGpu, (struct KernelDisplay *)(((unsigned char *) pKernelDisplay) - __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), flags); } -static void __nvoc_thunk_KernelDisplay_intrservRegisterIntrService(OBJGPU *pGpu, struct IntrService *pKernelDisplay, IntrServiceRecord pRecords[171]) { - kdispRegisterIntrService(pGpu, (struct KernelDisplay *)(((unsigned char *)pKernelDisplay) - __nvoc_rtti_KernelDisplay_IntrService.offset), pRecords); +// kdispRegisterIntrService: virtual override (intrserv) base (intrserv) +static void __nvoc_down_thunk_KernelDisplay_intrservRegisterIntrService(OBJGPU *pGpu, struct IntrService *pKernelDisplay, IntrServiceRecord pRecords[175]) { + kdispRegisterIntrService(pGpu, (struct KernelDisplay *)(((unsigned char *) pKernelDisplay) - __nvoc_rtti_KernelDisplay_IntrService.offset), pRecords); } -static NvU32 __nvoc_thunk_KernelDisplay_intrservServiceInterrupt(OBJGPU *pGpu, struct IntrService *pKernelDisplay, IntrServiceServiceInterruptArguments *pParams) { - return kdispServiceInterrupt(pGpu, (struct KernelDisplay *)(((unsigned char *)pKernelDisplay) - __nvoc_rtti_KernelDisplay_IntrService.offset), pParams); +// kdispServiceInterrupt: virtual halified (singleton optimized) override (intrserv) base (intrserv) body +static NvU32 __nvoc_down_thunk_KernelDisplay_intrservServiceInterrupt(OBJGPU *pGpu, struct IntrService *pKernelDisplay, IntrServiceServiceInterruptArguments *pParams) { + return kdispServiceInterrupt(pGpu, (struct KernelDisplay *)(((unsigned char *) pKernelDisplay) - __nvoc_rtti_KernelDisplay_IntrService.offset), pParams); } -static NV_STATUS __nvoc_thunk_IntrService_kdispServiceNotificationInterrupt(OBJGPU *pGpu, struct KernelDisplay *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { - return intrservServiceNotificationInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_KernelDisplay_IntrService.offset), pParams); + +// 10 up-thunk(s) defined to bridge methods in KernelDisplay to superclasses + +// kdispInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kdispInitMissing(POBJGPU pGpu, struct KernelDisplay *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kdispStatePreLoad(POBJGPU pGpu, struct KernelDisplay *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), arg0); +// kdispStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStatePreInitUnlocked(POBJGPU pGpu, struct KernelDisplay *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kdispStatePostUnload(POBJGPU pGpu, struct KernelDisplay *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), arg0); +// kdispStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStateInitUnlocked(POBJGPU pGpu, struct KernelDisplay *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kdispStatePreUnload(POBJGPU pGpu, struct KernelDisplay *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), arg0); +// kdispStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStatePreLoad(POBJGPU pGpu, struct KernelDisplay *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kdispStateInitUnlocked(POBJGPU pGpu, struct KernelDisplay *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); +// kdispStatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStatePostLoad(POBJGPU pGpu, struct KernelDisplay *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_kdispInitMissing(POBJGPU pGpu, struct KernelDisplay *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); +// kdispStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStatePreUnload(POBJGPU pGpu, struct KernelDisplay *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kdispStatePreInitUnlocked(POBJGPU pGpu, struct KernelDisplay *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); +// kdispStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStatePostUnload(POBJGPU pGpu, struct KernelDisplay *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), arg3); } -static NvBool __nvoc_thunk_IntrService_kdispClearInterrupt(OBJGPU *pGpu, struct KernelDisplay *pIntrService, IntrServiceClearInterruptArguments *pParams) { - return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_KernelDisplay_IntrService.offset), pParams); +// kdispIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_kdispIsPresent(POBJGPU pGpu, struct KernelDisplay *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kdispStatePostLoad(POBJGPU pGpu, struct KernelDisplay *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), arg0); +// kdispClearInterrupt: virtual inherited (intrserv) base (intrserv) +static NvBool __nvoc_up_thunk_IntrService_kdispClearInterrupt(OBJGPU *pGpu, struct KernelDisplay *pIntrService, IntrServiceClearInterruptArguments *pParams) { + return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_KernelDisplay_IntrService.offset), pParams); } -static NvBool __nvoc_thunk_OBJENGSTATE_kdispIsPresent(POBJGPU pGpu, struct KernelDisplay *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); +// kdispServiceNotificationInterrupt: virtual inherited (intrserv) base (intrserv) +static NV_STATUS __nvoc_up_thunk_IntrService_kdispServiceNotificationInterrupt(OBJGPU *pGpu, struct KernelDisplay *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { + return intrservServiceNotificationInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_KernelDisplay_IntrService.offset), pParams); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelDisplay = { /*numEntries=*/ 0, @@ -226,6 +250,7 @@ NV_STATUS __nvoc_ctor_KernelDisplay(KernelDisplay *pThis, RmHalspecOwner *pRmhal return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -242,25 +267,40 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe PORT_UNREFERENCED_VARIABLE(dispIpHal); PORT_UNREFERENCED_VARIABLE(dispIpHal_HalVarIdx); + // kdispConstructEngine -- virtual override (engstate) base (engstate) pThis->__kdispConstructEngine__ = &kdispConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelDisplay_engstateConstructEngine; + // kdispStatePreInitLocked -- virtual override (engstate) base (engstate) pThis->__kdispStatePreInitLocked__ = &kdispStatePreInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_KernelDisplay_engstateStatePreInitLocked; + // kdispStateInitLocked -- virtual override (engstate) base (engstate) pThis->__kdispStateInitLocked__ = &kdispStateInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelDisplay_engstateStateInitLocked; + // kdispStateDestroy -- virtual override (engstate) base (engstate) pThis->__kdispStateDestroy__ = &kdispStateDestroy_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelDisplay_engstateStateDestroy; + // kdispStateLoad -- virtual override (engstate) base (engstate) pThis->__kdispStateLoad__ = &kdispStateLoad_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelDisplay_engstateStateLoad; + // kdispStateUnload -- virtual override (engstate) base (engstate) pThis->__kdispStateUnload__ = &kdispStateUnload_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelDisplay_engstateStateUnload; + // kdispRegisterIntrService -- virtual override (intrserv) base (intrserv) pThis->__kdispRegisterIntrService__ = &kdispRegisterIntrService_IMPL; + pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_KernelDisplay_intrservRegisterIntrService; - // Hal function -- kdispServiceInterrupt + // kdispServiceInterrupt -- virtual halified (singleton optimized) override (intrserv) base (intrserv) body pThis->__kdispServiceInterrupt__ = &kdispServiceInterrupt_acff5e; + pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_KernelDisplay_intrservServiceInterrupt; - // Hal function -- kdispSelectClass - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00020000UL) )) /* DispIpHal: DISPv0000 */ + // kdispSelectClass -- halified (2 hals) body + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__kdispSelectClass__ = &kdispSelectClass_46f6a7; } @@ -269,8 +309,8 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe pThis->__kdispSelectClass__ = &kdispSelectClass_v03_00_KERNEL; } - // Hal function -- kdispGetChannelNum - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00020000UL) )) /* DispIpHal: DISPv0000 */ + // kdispGetChannelNum -- halified (2 hals) body + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__kdispGetChannelNum__ = &kdispGetChannelNum_46f6a7; } @@ -279,8 +319,8 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe pThis->__kdispGetChannelNum__ = &kdispGetChannelNum_v03_00; } - // Hal function -- kdispGetDisplayCapsBaseAndSize - if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00020000UL) )) /* DispIpHal: DISPv0000 */ )) + // kdispGetDisplayCapsBaseAndSize -- halified (2 hals) body + if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ )) { pThis->__kdispGetDisplayCapsBaseAndSize__ = &kdispGetDisplayCapsBaseAndSize_b3696a; } @@ -289,8 +329,8 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe pThis->__kdispGetDisplayCapsBaseAndSize__ = &kdispGetDisplayCapsBaseAndSize_v03_00; } - // Hal function -- kdispGetDisplaySfUserBaseAndSize - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00020000UL) )) /* DispIpHal: DISPv0000 */ + // kdispGetDisplaySfUserBaseAndSize -- halified (2 hals) body + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__kdispGetDisplaySfUserBaseAndSize__ = &kdispGetDisplaySfUserBaseAndSize_b3696a; } @@ -299,8 +339,8 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe pThis->__kdispGetDisplaySfUserBaseAndSize__ = &kdispGetDisplaySfUserBaseAndSize_v03_00; } - // Hal function -- kdispGetDisplayChannelUserBaseAndSize - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00020000UL) )) /* DispIpHal: DISPv0000 */ + // kdispGetDisplayChannelUserBaseAndSize -- halified (2 hals) body + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__kdispGetDisplayChannelUserBaseAndSize__ = &kdispGetDisplayChannelUserBaseAndSize_46f6a7; } @@ -309,7 +349,7 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe pThis->__kdispGetDisplayChannelUserBaseAndSize__ = &kdispGetDisplayChannelUserBaseAndSize_v03_00; } - // Hal function -- kdispGetVgaWorkspaceBase + // kdispGetVgaWorkspaceBase -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ { pThis->__kdispGetVgaWorkspaceBase__ = &kdispGetVgaWorkspaceBase_491d52; @@ -319,7 +359,7 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe pThis->__kdispGetVgaWorkspaceBase__ = &kdispGetVgaWorkspaceBase_v04_00; } - // Hal function -- kdispReadRgLineCountAndFrameCount + // kdispReadRgLineCountAndFrameCount -- halified (2 hals) body if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00004c00UL) )) /* DispIpHal: DISPv0400 | DISPv0401 | DISPv0404 */ { pThis->__kdispReadRgLineCountAndFrameCount__ = &kdispReadRgLineCountAndFrameCount_v03_00_KERNEL; @@ -330,8 +370,8 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe pThis->__kdispReadRgLineCountAndFrameCount__ = &kdispReadRgLineCountAndFrameCount_46f6a7; } - // Hal function -- kdispRestoreOriginalLsrMinTime - if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00020000UL) )) /* DispIpHal: DISPv0000 */ )) + // kdispRestoreOriginalLsrMinTime -- halified (2 hals) body + if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ )) { pThis->__kdispRestoreOriginalLsrMinTime__ = &kdispRestoreOriginalLsrMinTime_b3696a; } @@ -340,8 +380,8 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe pThis->__kdispRestoreOriginalLsrMinTime__ = &kdispRestoreOriginalLsrMinTime_v03_00; } - // Hal function -- kdispComputeLsrMinTimeValue - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00020000UL) )) /* DispIpHal: DISPv0000 */ + // kdispComputeLsrMinTimeValue -- halified (2 hals) body + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__kdispComputeLsrMinTimeValue__ = &kdispComputeLsrMinTimeValue_56cd7a; } @@ -350,8 +390,8 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe pThis->__kdispComputeLsrMinTimeValue__ = &kdispComputeLsrMinTimeValue_v02_07; } - // Hal function -- kdispSetSwapBarrierLsrMinTime - if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00020000UL) )) /* DispIpHal: DISPv0000 */ )) + // kdispSetSwapBarrierLsrMinTime -- halified (2 hals) body + if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ )) { pThis->__kdispSetSwapBarrierLsrMinTime__ = &kdispSetSwapBarrierLsrMinTime_b3696a; } @@ -360,7 +400,7 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe pThis->__kdispSetSwapBarrierLsrMinTime__ = &kdispSetSwapBarrierLsrMinTime_v03_00; } - // Hal function -- kdispGetRgScanLock + // kdispGetRgScanLock -- halified (2 hals) body if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00004c00UL) )) /* DispIpHal: DISPv0400 | DISPv0401 | DISPv0404 */ { pThis->__kdispGetRgScanLock__ = &kdispGetRgScanLock_v02_01; @@ -371,7 +411,7 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe pThis->__kdispGetRgScanLock__ = &kdispGetRgScanLock_92bfc3; } - // Hal function -- kdispDetectSliLink + // kdispDetectSliLink -- halified (2 hals) body if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00004c00UL) )) /* DispIpHal: DISPv0400 | DISPv0401 | DISPv0404 */ { pThis->__kdispDetectSliLink__ = &kdispDetectSliLink_v04_00; @@ -382,8 +422,8 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe pThis->__kdispDetectSliLink__ = &kdispDetectSliLink_92bfc3; } - // Hal function -- kdispInitRegistryOverrides - if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00020000UL) )) /* DispIpHal: DISPv0000 */ )) + // kdispInitRegistryOverrides -- halified (2 hals) body + if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ )) { pThis->__kdispInitRegistryOverrides__ = &kdispInitRegistryOverrides_b3696a; } @@ -393,7 +433,7 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe pThis->__kdispInitRegistryOverrides__ = &kdispInitRegistryOverrides_IMPL; } - // Hal function -- kdispGetPBTargetAperture + // kdispGetPBTargetAperture -- halified (2 hals) body if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00004c00UL) )) /* DispIpHal: DISPv0400 | DISPv0401 | DISPv0404 */ { pThis->__kdispGetPBTargetAperture__ = &kdispGetPBTargetAperture_v03_00; @@ -404,44 +444,42 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe pThis->__kdispGetPBTargetAperture__ = &kdispGetPBTargetAperture_15a734; } - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelDisplay_engstateConstructEngine; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_thunk_KernelDisplay_engstateStatePreInitLocked; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_thunk_KernelDisplay_engstateStateInitLocked; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_thunk_KernelDisplay_engstateStateDestroy; + // kdispInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__kdispInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kdispInitMissing; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_thunk_KernelDisplay_engstateStateLoad; + // kdispStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kdispStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kdispStatePreInitUnlocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_thunk_KernelDisplay_engstateStateUnload; + // kdispStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kdispStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kdispStateInitUnlocked; - pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_thunk_KernelDisplay_intrservRegisterIntrService; + // kdispStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__kdispStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kdispStatePreLoad; - pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_thunk_KernelDisplay_intrservServiceInterrupt; + // kdispStatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__kdispStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kdispStatePostLoad; - pThis->__kdispServiceNotificationInterrupt__ = &__nvoc_thunk_IntrService_kdispServiceNotificationInterrupt; + // kdispStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__kdispStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kdispStatePreUnload; - pThis->__kdispStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_kdispStatePreLoad; + // kdispStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__kdispStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kdispStatePostUnload; - pThis->__kdispStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_kdispStatePostUnload; + // kdispIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__kdispIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kdispIsPresent; - pThis->__kdispStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_kdispStatePreUnload; + // kdispClearInterrupt -- virtual inherited (intrserv) base (intrserv) + pThis->__kdispClearInterrupt__ = &__nvoc_up_thunk_IntrService_kdispClearInterrupt; - pThis->__kdispStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kdispStateInitUnlocked; + // kdispServiceNotificationInterrupt -- virtual inherited (intrserv) base (intrserv) + pThis->__kdispServiceNotificationInterrupt__ = &__nvoc_up_thunk_IntrService_kdispServiceNotificationInterrupt; +} // End __nvoc_init_funcTable_KernelDisplay_1 with approximately 54 basic block(s). - pThis->__kdispInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kdispInitMissing; - - pThis->__kdispStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kdispStatePreInitUnlocked; - - pThis->__kdispClearInterrupt__ = &__nvoc_thunk_IntrService_kdispClearInterrupt; - - pThis->__kdispStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_kdispStatePostLoad; - - pThis->__kdispIsPresent__ = &__nvoc_thunk_OBJENGSTATE_kdispIsPresent; -} +// Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_KernelDisplay(KernelDisplay *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 32 per-object function pointer(s). __nvoc_init_funcTable_KernelDisplay_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kern_disp_nvoc.h b/src/nvidia/generated/g_kern_disp_nvoc.h index 0f702199c3..32846b528f 100644 --- a/src/nvidia/generated/g_kern_disp_nvoc.h +++ b/src/nvidia/generated/g_kern_disp_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERN_DISP_NVOC_H_ #define _G_KERN_DISP_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kern_disp_nvoc.h" #ifndef KERN_DISP_H @@ -59,6 +67,7 @@ typedef struct NvU32 kHeadVblankCount[OBJ_MAX_HEADS]; } KernelDisplaySharedMem; + struct DispChannel; #ifndef __NVOC_CLASS_DispChannel_TYPEDEF__ @@ -71,6 +80,7 @@ typedef struct DispChannel DispChannel; #endif /* __nvoc_class_id_DispChannel */ + struct RgLineCallback; #ifndef __NVOC_CLASS_RgLineCallback_TYPEDEF__ @@ -102,50 +112,63 @@ typedef struct RgLineCallback RgLineCallback; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelDisplay { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; struct IntrService __nvoc_base_IntrService; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct IntrService *__nvoc_pbase_IntrService; - struct KernelDisplay *__nvoc_pbase_KernelDisplay; - NV_STATUS (*__kdispConstructEngine__)(OBJGPU *, struct KernelDisplay *, ENGDESCRIPTOR); - NV_STATUS (*__kdispStatePreInitLocked__)(OBJGPU *, struct KernelDisplay *); - NV_STATUS (*__kdispStateInitLocked__)(OBJGPU *, struct KernelDisplay *); - void (*__kdispStateDestroy__)(OBJGPU *, struct KernelDisplay *); - NV_STATUS (*__kdispStateLoad__)(OBJGPU *, struct KernelDisplay *, NvU32); - NV_STATUS (*__kdispStateUnload__)(OBJGPU *, struct KernelDisplay *, NvU32); - void (*__kdispRegisterIntrService__)(OBJGPU *, struct KernelDisplay *, IntrServiceRecord *); - NvU32 (*__kdispServiceInterrupt__)(OBJGPU *, struct KernelDisplay *, IntrServiceServiceInterruptArguments *); - NV_STATUS (*__kdispSelectClass__)(OBJGPU *, struct KernelDisplay *, NvU32); - NV_STATUS (*__kdispGetChannelNum__)(struct KernelDisplay *, DISPCHNCLASS, NvU32, NvU32 *); - void (*__kdispGetDisplayCapsBaseAndSize__)(OBJGPU *, struct KernelDisplay *, NvU32 *, NvU32 *); - void (*__kdispGetDisplaySfUserBaseAndSize__)(OBJGPU *, struct KernelDisplay *, NvU32 *, NvU32 *); - NV_STATUS (*__kdispGetDisplayChannelUserBaseAndSize__)(OBJGPU *, struct KernelDisplay *, DISPCHNCLASS, NvU32, NvU32 *, NvU32 *); - NvBool (*__kdispGetVgaWorkspaceBase__)(OBJGPU *, struct KernelDisplay *, NvU64 *); - NV_STATUS (*__kdispReadRgLineCountAndFrameCount__)(OBJGPU *, struct KernelDisplay *, NvU32, NvU32 *, NvU32 *); - void (*__kdispRestoreOriginalLsrMinTime__)(OBJGPU *, struct KernelDisplay *, NvU32, NvU32); - NV_STATUS (*__kdispComputeLsrMinTimeValue__)(OBJGPU *, struct KernelDisplay *, NvU32, NvU32, NvU32 *); - void (*__kdispSetSwapBarrierLsrMinTime__)(OBJGPU *, struct KernelDisplay *, NvU32, NvU32 *, NvU32); - NV_STATUS (*__kdispGetRgScanLock__)(OBJGPU *, struct KernelDisplay *, NvU32, OBJGPU *, NvU32, NvBool *, NvU32 *, NvBool *, NvU32 *); - NV_STATUS (*__kdispDetectSliLink__)(struct KernelDisplay *, OBJGPU *, OBJGPU *, NvU32, NvU32); - void (*__kdispInitRegistryOverrides__)(OBJGPU *, struct KernelDisplay *); - NvU32 (*__kdispGetPBTargetAperture__)(OBJGPU *, struct KernelDisplay *, NvU32, NvU32); - NV_STATUS (*__kdispServiceNotificationInterrupt__)(OBJGPU *, struct KernelDisplay *, IntrServiceServiceNotificationInterruptArguments *); - NV_STATUS (*__kdispStatePreLoad__)(POBJGPU, struct KernelDisplay *, NvU32); - NV_STATUS (*__kdispStatePostUnload__)(POBJGPU, struct KernelDisplay *, NvU32); - NV_STATUS (*__kdispStatePreUnload__)(POBJGPU, struct KernelDisplay *, NvU32); - NV_STATUS (*__kdispStateInitUnlocked__)(POBJGPU, struct KernelDisplay *); - void (*__kdispInitMissing__)(POBJGPU, struct KernelDisplay *); - NV_STATUS (*__kdispStatePreInitUnlocked__)(POBJGPU, struct KernelDisplay *); - NvBool (*__kdispClearInterrupt__)(OBJGPU *, struct KernelDisplay *, IntrServiceClearInterruptArguments *); - NV_STATUS (*__kdispStatePostLoad__)(POBJGPU, struct KernelDisplay *, NvU32); - NvBool (*__kdispIsPresent__)(POBJGPU, struct KernelDisplay *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct IntrService *__nvoc_pbase_IntrService; // intrserv super + struct KernelDisplay *__nvoc_pbase_KernelDisplay; // kdisp + + // Vtable with 32 per-object function pointers + NV_STATUS (*__kdispConstructEngine__)(OBJGPU *, struct KernelDisplay * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kdispStatePreInitLocked__)(OBJGPU *, struct KernelDisplay * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kdispStateInitLocked__)(OBJGPU *, struct KernelDisplay * /*this*/); // virtual override (engstate) base (engstate) + void (*__kdispStateDestroy__)(OBJGPU *, struct KernelDisplay * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kdispStateLoad__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kdispStateUnload__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32); // virtual override (engstate) base (engstate) + void (*__kdispRegisterIntrService__)(OBJGPU *, struct KernelDisplay * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) + NvU32 (*__kdispServiceInterrupt__)(OBJGPU *, struct KernelDisplay * /*this*/, IntrServiceServiceInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) body + NV_STATUS (*__kdispSelectClass__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__kdispGetChannelNum__)(struct KernelDisplay * /*this*/, DISPCHNCLASS, NvU32, NvU32 *); // halified (2 hals) body + void (*__kdispGetDisplayCapsBaseAndSize__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32 *, NvU32 *); // halified (2 hals) body + void (*__kdispGetDisplaySfUserBaseAndSize__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32 *, NvU32 *); // halified (2 hals) body + NV_STATUS (*__kdispGetDisplayChannelUserBaseAndSize__)(OBJGPU *, struct KernelDisplay * /*this*/, DISPCHNCLASS, NvU32, NvU32 *, NvU32 *); // halified (2 hals) body + NvBool (*__kdispGetVgaWorkspaceBase__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU64 *); // halified (2 hals) body + NV_STATUS (*__kdispReadRgLineCountAndFrameCount__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32, NvU32 *, NvU32 *); // halified (2 hals) body + void (*__kdispRestoreOriginalLsrMinTime__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32, NvU32); // halified (2 hals) body + NV_STATUS (*__kdispComputeLsrMinTimeValue__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32, NvU32, NvU32 *); // halified (2 hals) body + void (*__kdispSetSwapBarrierLsrMinTime__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32, NvU32 *, NvU32); // halified (2 hals) body + NV_STATUS (*__kdispGetRgScanLock__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32, OBJGPU *, NvU32, NvBool *, NvU32 *, NvBool *, NvU32 *); // halified (2 hals) body + NV_STATUS (*__kdispDetectSliLink__)(struct KernelDisplay * /*this*/, OBJGPU *, OBJGPU *, NvU32, NvU32); // halified (2 hals) body + void (*__kdispInitRegistryOverrides__)(OBJGPU *, struct KernelDisplay * /*this*/); // halified (2 hals) body + NvU32 (*__kdispGetPBTargetAperture__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32, NvU32); // halified (2 hals) body + void (*__kdispInitMissing__)(POBJGPU, struct KernelDisplay * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kdispStatePreInitUnlocked__)(POBJGPU, struct KernelDisplay * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kdispStateInitUnlocked__)(POBJGPU, struct KernelDisplay * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kdispStatePreLoad__)(POBJGPU, struct KernelDisplay * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kdispStatePostLoad__)(POBJGPU, struct KernelDisplay * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kdispStatePreUnload__)(POBJGPU, struct KernelDisplay * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kdispStatePostUnload__)(POBJGPU, struct KernelDisplay * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__kdispIsPresent__)(POBJGPU, struct KernelDisplay * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__kdispClearInterrupt__)(OBJGPU *, struct KernelDisplay * /*this*/, IntrServiceClearInterruptArguments *); // virtual inherited (intrserv) base (intrserv) + NV_STATUS (*__kdispServiceNotificationInterrupt__)(OBJGPU *, struct KernelDisplay * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual inherited (intrserv) base (intrserv) + + // 5 PDB properties NvBool PDB_PROP_KDISP_IMP_ENABLE; NvBool PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANK_ALWAYS; NvBool PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANKS_ONLY_ON_HMD_ACTIVE; NvBool PDB_PROP_KDISP_IN_AWAKEN_INTR; + + // Data members struct DisplayInstanceMemory *pInst; struct KernelHead *pKernelHead[8]; const KernelDisplayStaticInfo *pStaticInfo; @@ -172,6 +195,7 @@ typedef struct KernelDisplay KernelDisplay; #define __nvoc_class_id_KernelDisplay 0x55952e #endif /* __nvoc_class_id_KernelDisplay */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelDisplay; #define __staticCast_KernelDisplay(pThis) \ @@ -184,6 +208,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelDisplay; ((KernelDisplay*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelDisplay))) #endif //__nvoc_kern_disp_h_disabled +// Property macros #define PDB_PROP_KDISP_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_KDISP_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING #define PDB_PROP_KDISP_IN_AWAKEN_INTR_BASE_CAST @@ -201,65 +226,229 @@ NV_STATUS __nvoc_objCreate_KernelDisplay(KernelDisplay**, Dynamic*, NvU32); #define __objCreate_KernelDisplay(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelDisplay((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define kdispConstructEngine_FNPTR(pKernelDisplay) pKernelDisplay->__kdispConstructEngine__ #define kdispConstructEngine(pGpu, pKernelDisplay, engDesc) kdispConstructEngine_DISPATCH(pGpu, pKernelDisplay, engDesc) +#define kdispStatePreInitLocked_FNPTR(pKernelDisplay) pKernelDisplay->__kdispStatePreInitLocked__ #define kdispStatePreInitLocked(pGpu, pKernelDisplay) kdispStatePreInitLocked_DISPATCH(pGpu, pKernelDisplay) +#define kdispStateInitLocked_FNPTR(pKernelDisplay) pKernelDisplay->__kdispStateInitLocked__ #define kdispStateInitLocked(pGpu, pKernelDisplay) kdispStateInitLocked_DISPATCH(pGpu, pKernelDisplay) +#define kdispStateDestroy_FNPTR(pKernelDisplay) pKernelDisplay->__kdispStateDestroy__ #define kdispStateDestroy(pGpu, pKernelDisplay) kdispStateDestroy_DISPATCH(pGpu, pKernelDisplay) +#define kdispStateLoad_FNPTR(pKernelDisplay) pKernelDisplay->__kdispStateLoad__ #define kdispStateLoad(pGpu, pKernelDisplay, flags) kdispStateLoad_DISPATCH(pGpu, pKernelDisplay, flags) +#define kdispStateUnload_FNPTR(pKernelDisplay) pKernelDisplay->__kdispStateUnload__ #define kdispStateUnload(pGpu, pKernelDisplay, flags) kdispStateUnload_DISPATCH(pGpu, pKernelDisplay, flags) +#define kdispRegisterIntrService_FNPTR(pKernelDisplay) pKernelDisplay->__kdispRegisterIntrService__ #define kdispRegisterIntrService(pGpu, pKernelDisplay, pRecords) kdispRegisterIntrService_DISPATCH(pGpu, pKernelDisplay, pRecords) +#define kdispServiceInterrupt_FNPTR(pKernelDisplay) pKernelDisplay->__kdispServiceInterrupt__ #define kdispServiceInterrupt(pGpu, pKernelDisplay, pParams) kdispServiceInterrupt_DISPATCH(pGpu, pKernelDisplay, pParams) #define kdispServiceInterrupt_HAL(pGpu, pKernelDisplay, pParams) kdispServiceInterrupt_DISPATCH(pGpu, pKernelDisplay, pParams) +#define kdispSelectClass_FNPTR(pKernelDisplay) pKernelDisplay->__kdispSelectClass__ #define kdispSelectClass(pGpu, pKernelDisplay, swClass) kdispSelectClass_DISPATCH(pGpu, pKernelDisplay, swClass) #define kdispSelectClass_HAL(pGpu, pKernelDisplay, swClass) kdispSelectClass_DISPATCH(pGpu, pKernelDisplay, swClass) +#define kdispGetChannelNum_FNPTR(pKernelDisplay) pKernelDisplay->__kdispGetChannelNum__ #define kdispGetChannelNum(pKernelDisplay, channelClass, channelInstance, pChannelNum) kdispGetChannelNum_DISPATCH(pKernelDisplay, channelClass, channelInstance, pChannelNum) #define kdispGetChannelNum_HAL(pKernelDisplay, channelClass, channelInstance, pChannelNum) kdispGetChannelNum_DISPATCH(pKernelDisplay, channelClass, channelInstance, pChannelNum) +#define kdispGetDisplayCapsBaseAndSize_FNPTR(pKernelDisplay) pKernelDisplay->__kdispGetDisplayCapsBaseAndSize__ #define kdispGetDisplayCapsBaseAndSize(pGpu, pKernelDisplay, pOffset, pSize) kdispGetDisplayCapsBaseAndSize_DISPATCH(pGpu, pKernelDisplay, pOffset, pSize) #define kdispGetDisplayCapsBaseAndSize_HAL(pGpu, pKernelDisplay, pOffset, pSize) kdispGetDisplayCapsBaseAndSize_DISPATCH(pGpu, pKernelDisplay, pOffset, pSize) +#define kdispGetDisplaySfUserBaseAndSize_FNPTR(pKernelDisplay) pKernelDisplay->__kdispGetDisplaySfUserBaseAndSize__ #define kdispGetDisplaySfUserBaseAndSize(pGpu, pKernelDisplay, pOffset, pSize) kdispGetDisplaySfUserBaseAndSize_DISPATCH(pGpu, pKernelDisplay, pOffset, pSize) #define kdispGetDisplaySfUserBaseAndSize_HAL(pGpu, pKernelDisplay, pOffset, pSize) kdispGetDisplaySfUserBaseAndSize_DISPATCH(pGpu, pKernelDisplay, pOffset, pSize) +#define kdispGetDisplayChannelUserBaseAndSize_FNPTR(pKernelDisplay) pKernelDisplay->__kdispGetDisplayChannelUserBaseAndSize__ #define kdispGetDisplayChannelUserBaseAndSize(pGpu, pKernelDisplay, channelClass, channelInstance, pOffset, pSize) kdispGetDisplayChannelUserBaseAndSize_DISPATCH(pGpu, pKernelDisplay, channelClass, channelInstance, pOffset, pSize) #define kdispGetDisplayChannelUserBaseAndSize_HAL(pGpu, pKernelDisplay, channelClass, channelInstance, pOffset, pSize) kdispGetDisplayChannelUserBaseAndSize_DISPATCH(pGpu, pKernelDisplay, channelClass, channelInstance, pOffset, pSize) +#define kdispGetVgaWorkspaceBase_FNPTR(pKernelDisplay) pKernelDisplay->__kdispGetVgaWorkspaceBase__ #define kdispGetVgaWorkspaceBase(pGpu, pKernelDisplay, pOffset) kdispGetVgaWorkspaceBase_DISPATCH(pGpu, pKernelDisplay, pOffset) #define kdispGetVgaWorkspaceBase_HAL(pGpu, pKernelDisplay, pOffset) kdispGetVgaWorkspaceBase_DISPATCH(pGpu, pKernelDisplay, pOffset) +#define kdispReadRgLineCountAndFrameCount_FNPTR(pKernelDisplay) pKernelDisplay->__kdispReadRgLineCountAndFrameCount__ #define kdispReadRgLineCountAndFrameCount(pGpu, pKernelDisplay, head, pLineCount, pFrameCount) kdispReadRgLineCountAndFrameCount_DISPATCH(pGpu, pKernelDisplay, head, pLineCount, pFrameCount) #define kdispReadRgLineCountAndFrameCount_HAL(pGpu, pKernelDisplay, head, pLineCount, pFrameCount) kdispReadRgLineCountAndFrameCount_DISPATCH(pGpu, pKernelDisplay, head, pLineCount, pFrameCount) +#define kdispRestoreOriginalLsrMinTime_FNPTR(pKernelDisplay) pKernelDisplay->__kdispRestoreOriginalLsrMinTime__ #define kdispRestoreOriginalLsrMinTime(pGpu, pKernelDisplay, head, origLsrMinTime) kdispRestoreOriginalLsrMinTime_DISPATCH(pGpu, pKernelDisplay, head, origLsrMinTime) #define kdispRestoreOriginalLsrMinTime_HAL(pGpu, pKernelDisplay, head, origLsrMinTime) kdispRestoreOriginalLsrMinTime_DISPATCH(pGpu, pKernelDisplay, head, origLsrMinTime) +#define kdispComputeLsrMinTimeValue_FNPTR(pKernelDisplay) pKernelDisplay->__kdispComputeLsrMinTimeValue__ #define kdispComputeLsrMinTimeValue(pGpu, pKernelDisplay, head, swapRdyHiLsrMinTime, pComputedLsrMinTime) kdispComputeLsrMinTimeValue_DISPATCH(pGpu, pKernelDisplay, head, swapRdyHiLsrMinTime, pComputedLsrMinTime) #define kdispComputeLsrMinTimeValue_HAL(pGpu, pKernelDisplay, head, swapRdyHiLsrMinTime, pComputedLsrMinTime) kdispComputeLsrMinTimeValue_DISPATCH(pGpu, pKernelDisplay, head, swapRdyHiLsrMinTime, pComputedLsrMinTime) +#define kdispSetSwapBarrierLsrMinTime_FNPTR(pKernelDisplay) pKernelDisplay->__kdispSetSwapBarrierLsrMinTime__ #define kdispSetSwapBarrierLsrMinTime(pGpu, pKernelDisplay, head, pOrigLsrMinTime, newLsrMinTime) kdispSetSwapBarrierLsrMinTime_DISPATCH(pGpu, pKernelDisplay, head, pOrigLsrMinTime, newLsrMinTime) #define kdispSetSwapBarrierLsrMinTime_HAL(pGpu, pKernelDisplay, head, pOrigLsrMinTime, newLsrMinTime) kdispSetSwapBarrierLsrMinTime_DISPATCH(pGpu, pKernelDisplay, head, pOrigLsrMinTime, newLsrMinTime) +#define kdispGetRgScanLock_FNPTR(pKernelDisplay) pKernelDisplay->__kdispGetRgScanLock__ #define kdispGetRgScanLock(pGpu, pKernelDisplay, head0, pPeerGpu, head1, pMasterScanLock, pMasterScanLockPin, pSlaveScanLock, pSlaveScanLockPin) kdispGetRgScanLock_DISPATCH(pGpu, pKernelDisplay, head0, pPeerGpu, head1, pMasterScanLock, pMasterScanLockPin, pSlaveScanLock, pSlaveScanLockPin) #define kdispGetRgScanLock_HAL(pGpu, pKernelDisplay, head0, pPeerGpu, head1, pMasterScanLock, pMasterScanLockPin, pSlaveScanLock, pSlaveScanLockPin) kdispGetRgScanLock_DISPATCH(pGpu, pKernelDisplay, head0, pPeerGpu, head1, pMasterScanLock, pMasterScanLockPin, pSlaveScanLock, pSlaveScanLockPin) +#define kdispDetectSliLink_FNPTR(pKernelDisplay) pKernelDisplay->__kdispDetectSliLink__ #define kdispDetectSliLink(pKernelDisplay, pParentGpu, pChildGpu, ParentDrPort, ChildDrPort) kdispDetectSliLink_DISPATCH(pKernelDisplay, pParentGpu, pChildGpu, ParentDrPort, ChildDrPort) #define kdispDetectSliLink_HAL(pKernelDisplay, pParentGpu, pChildGpu, ParentDrPort, ChildDrPort) kdispDetectSliLink_DISPATCH(pKernelDisplay, pParentGpu, pChildGpu, ParentDrPort, ChildDrPort) +#define kdispInitRegistryOverrides_FNPTR(pKernelDisplay) pKernelDisplay->__kdispInitRegistryOverrides__ #define kdispInitRegistryOverrides(pGpu, pKernelDisplay) kdispInitRegistryOverrides_DISPATCH(pGpu, pKernelDisplay) #define kdispInitRegistryOverrides_HAL(pGpu, pKernelDisplay) kdispInitRegistryOverrides_DISPATCH(pGpu, pKernelDisplay) +#define kdispGetPBTargetAperture_FNPTR(pKernelDisplay) pKernelDisplay->__kdispGetPBTargetAperture__ #define kdispGetPBTargetAperture(pGpu, pKernelDisplay, memAddrSpace, cacheSnoop) kdispGetPBTargetAperture_DISPATCH(pGpu, pKernelDisplay, memAddrSpace, cacheSnoop) #define kdispGetPBTargetAperture_HAL(pGpu, pKernelDisplay, memAddrSpace, cacheSnoop) kdispGetPBTargetAperture_DISPATCH(pGpu, pKernelDisplay, memAddrSpace, cacheSnoop) -#define kdispServiceNotificationInterrupt(pGpu, pIntrService, pParams) kdispServiceNotificationInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define kdispStatePreLoad(pGpu, pEngstate, arg0) kdispStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kdispStatePostUnload(pGpu, pEngstate, arg0) kdispStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kdispStatePreUnload(pGpu, pEngstate, arg0) kdispStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kdispStateInitUnlocked(pGpu, pEngstate) kdispStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kdispInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define kdispInitMissing(pGpu, pEngstate) kdispInitMissing_DISPATCH(pGpu, pEngstate) +#define kdispStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define kdispStatePreInitUnlocked(pGpu, pEngstate) kdispStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kdispClearInterrupt(pGpu, pIntrService, pParams) kdispClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define kdispStatePostLoad(pGpu, pEngstate, arg0) kdispStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) +#define kdispStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kdispStateInitUnlocked(pGpu, pEngstate) kdispStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kdispStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kdispStatePreLoad(pGpu, pEngstate, arg3) kdispStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kdispStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kdispStatePostLoad(pGpu, pEngstate, arg3) kdispStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kdispStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kdispStatePreUnload(pGpu, pEngstate, arg3) kdispStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kdispStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kdispStatePostUnload(pGpu, pEngstate, arg3) kdispStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kdispIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define kdispIsPresent(pGpu, pEngstate) kdispIsPresent_DISPATCH(pGpu, pEngstate) -void kdispServiceVblank_KERNEL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2); +#define kdispClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservClearInterrupt__ +#define kdispClearInterrupt(pGpu, pIntrService, pParams) kdispClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) +#define kdispServiceNotificationInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ +#define kdispServiceNotificationInterrupt(pGpu, pIntrService, pParams) kdispServiceNotificationInterrupt_DISPATCH(pGpu, pIntrService, pParams) + +// Dispatch functions +static inline NV_STATUS kdispConstructEngine_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, ENGDESCRIPTOR engDesc) { + return pKernelDisplay->__kdispConstructEngine__(pGpu, pKernelDisplay, engDesc); +} + +static inline NV_STATUS kdispStatePreInitLocked_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay) { + return pKernelDisplay->__kdispStatePreInitLocked__(pGpu, pKernelDisplay); +} + +static inline NV_STATUS kdispStateInitLocked_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay) { + return pKernelDisplay->__kdispStateInitLocked__(pGpu, pKernelDisplay); +} + +static inline void kdispStateDestroy_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay) { + pKernelDisplay->__kdispStateDestroy__(pGpu, pKernelDisplay); +} + +static inline NV_STATUS kdispStateLoad_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 flags) { + return pKernelDisplay->__kdispStateLoad__(pGpu, pKernelDisplay, flags); +} + +static inline NV_STATUS kdispStateUnload_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 flags) { + return pKernelDisplay->__kdispStateUnload__(pGpu, pKernelDisplay, flags); +} + +static inline void kdispRegisterIntrService_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, IntrServiceRecord pRecords[175]) { + pKernelDisplay->__kdispRegisterIntrService__(pGpu, pKernelDisplay, pRecords); +} + +static inline NvU32 kdispServiceInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, IntrServiceServiceInterruptArguments *pParams) { + return pKernelDisplay->__kdispServiceInterrupt__(pGpu, pKernelDisplay, pParams); +} + +static inline NV_STATUS kdispSelectClass_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 swClass) { + return pKernelDisplay->__kdispSelectClass__(pGpu, pKernelDisplay, swClass); +} + +static inline NV_STATUS kdispGetChannelNum_DISPATCH(struct KernelDisplay *pKernelDisplay, DISPCHNCLASS channelClass, NvU32 channelInstance, NvU32 *pChannelNum) { + return pKernelDisplay->__kdispGetChannelNum__(pKernelDisplay, channelClass, channelInstance, pChannelNum); +} + +static inline void kdispGetDisplayCapsBaseAndSize_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pOffset, NvU32 *pSize) { + pKernelDisplay->__kdispGetDisplayCapsBaseAndSize__(pGpu, pKernelDisplay, pOffset, pSize); +} + +static inline void kdispGetDisplaySfUserBaseAndSize_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pOffset, NvU32 *pSize) { + pKernelDisplay->__kdispGetDisplaySfUserBaseAndSize__(pGpu, pKernelDisplay, pOffset, pSize); +} + +static inline NV_STATUS kdispGetDisplayChannelUserBaseAndSize_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, DISPCHNCLASS channelClass, NvU32 channelInstance, NvU32 *pOffset, NvU32 *pSize) { + return pKernelDisplay->__kdispGetDisplayChannelUserBaseAndSize__(pGpu, pKernelDisplay, channelClass, channelInstance, pOffset, pSize); +} + +static inline NvBool kdispGetVgaWorkspaceBase_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU64 *pOffset) { + return pKernelDisplay->__kdispGetVgaWorkspaceBase__(pGpu, pKernelDisplay, pOffset); +} + +static inline NV_STATUS kdispReadRgLineCountAndFrameCount_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head, NvU32 *pLineCount, NvU32 *pFrameCount) { + return pKernelDisplay->__kdispReadRgLineCountAndFrameCount__(pGpu, pKernelDisplay, head, pLineCount, pFrameCount); +} + +static inline void kdispRestoreOriginalLsrMinTime_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head, NvU32 origLsrMinTime) { + pKernelDisplay->__kdispRestoreOriginalLsrMinTime__(pGpu, pKernelDisplay, head, origLsrMinTime); +} + +static inline NV_STATUS kdispComputeLsrMinTimeValue_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head, NvU32 swapRdyHiLsrMinTime, NvU32 *pComputedLsrMinTime) { + return pKernelDisplay->__kdispComputeLsrMinTimeValue__(pGpu, pKernelDisplay, head, swapRdyHiLsrMinTime, pComputedLsrMinTime); +} + +static inline void kdispSetSwapBarrierLsrMinTime_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head, NvU32 *pOrigLsrMinTime, NvU32 newLsrMinTime) { + pKernelDisplay->__kdispSetSwapBarrierLsrMinTime__(pGpu, pKernelDisplay, head, pOrigLsrMinTime, newLsrMinTime); +} + +static inline NV_STATUS kdispGetRgScanLock_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head0, OBJGPU *pPeerGpu, NvU32 head1, NvBool *pMasterScanLock, NvU32 *pMasterScanLockPin, NvBool *pSlaveScanLock, NvU32 *pSlaveScanLockPin) { + return pKernelDisplay->__kdispGetRgScanLock__(pGpu, pKernelDisplay, head0, pPeerGpu, head1, pMasterScanLock, pMasterScanLockPin, pSlaveScanLock, pSlaveScanLockPin); +} + +static inline NV_STATUS kdispDetectSliLink_DISPATCH(struct KernelDisplay *pKernelDisplay, OBJGPU *pParentGpu, OBJGPU *pChildGpu, NvU32 ParentDrPort, NvU32 ChildDrPort) { + return pKernelDisplay->__kdispDetectSliLink__(pKernelDisplay, pParentGpu, pChildGpu, ParentDrPort, ChildDrPort); +} + +static inline void kdispInitRegistryOverrides_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay) { + pKernelDisplay->__kdispInitRegistryOverrides__(pGpu, pKernelDisplay); +} + +static inline NvU32 kdispGetPBTargetAperture_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 memAddrSpace, NvU32 cacheSnoop) { + return pKernelDisplay->__kdispGetPBTargetAperture__(pGpu, pKernelDisplay, memAddrSpace, cacheSnoop); +} + +static inline void kdispInitMissing_DISPATCH(POBJGPU pGpu, struct KernelDisplay *pEngstate) { + pEngstate->__kdispInitMissing__(pGpu, pEngstate); +} + +static inline NV_STATUS kdispStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelDisplay *pEngstate) { + return pEngstate->__kdispStatePreInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kdispStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelDisplay *pEngstate) { + return pEngstate->__kdispStateInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kdispStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelDisplay *pEngstate, NvU32 arg3) { + return pEngstate->__kdispStatePreLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS kdispStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelDisplay *pEngstate, NvU32 arg3) { + return pEngstate->__kdispStatePostLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS kdispStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelDisplay *pEngstate, NvU32 arg3) { + return pEngstate->__kdispStatePreUnload__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS kdispStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelDisplay *pEngstate, NvU32 arg3) { + return pEngstate->__kdispStatePostUnload__(pGpu, pEngstate, arg3); +} + +static inline NvBool kdispIsPresent_DISPATCH(POBJGPU pGpu, struct KernelDisplay *pEngstate) { + return pEngstate->__kdispIsPresent__(pGpu, pEngstate); +} + +static inline NvBool kdispClearInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pIntrService, IntrServiceClearInterruptArguments *pParams) { + return pIntrService->__kdispClearInterrupt__(pGpu, pIntrService, pParams); +} + +static inline NV_STATUS kdispServiceNotificationInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { + return pIntrService->__kdispServiceNotificationInterrupt__(pGpu, pIntrService, pParams); +} + +void kdispServiceVblank_KERNEL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5); #ifdef __nvoc_kern_disp_h_disabled -static inline void kdispServiceVblank(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2) { +static inline void kdispServiceVblank(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5) { NV_ASSERT_FAILED_PRECOMP("KernelDisplay was disabled!"); } #else //__nvoc_kern_disp_h_disabled -#define kdispServiceVblank(pGpu, pKernelDisplay, arg0, arg1, arg2) kdispServiceVblank_KERNEL(pGpu, pKernelDisplay, arg0, arg1, arg2) +#define kdispServiceVblank(pGpu, pKernelDisplay, arg3, arg4, arg5) kdispServiceVblank_KERNEL(pGpu, pKernelDisplay, arg3, arg4, arg5) #endif //__nvoc_kern_disp_h_disabled -#define kdispServiceVblank_HAL(pGpu, pKernelDisplay, arg0, arg1, arg2) kdispServiceVblank(pGpu, pKernelDisplay, arg0, arg1, arg2) +#define kdispServiceVblank_HAL(pGpu, pKernelDisplay, arg3, arg4, arg5) kdispServiceVblank(pGpu, pKernelDisplay, arg3, arg4, arg5) NV_STATUS kdispConstructInstMem_IMPL(struct KernelDisplay *pKernelDisplay); @@ -436,19 +625,19 @@ static inline void kdispInvokeRgLineCallback(struct KernelDisplay *pKernelDispla #define kdispInvokeRgLineCallback_HAL(pKernelDisplay, head, rgIntrLine, bIsIrqlIsr) kdispInvokeRgLineCallback(pKernelDisplay, head, rgIntrLine, bIsIrqlIsr) -NvU32 kdispReadPendingVblank_IMPL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, struct THREAD_STATE_NODE *arg0); +NvU32 kdispReadPendingVblank_IMPL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, struct THREAD_STATE_NODE *arg3); #ifdef __nvoc_kern_disp_h_disabled -static inline NvU32 kdispReadPendingVblank(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, struct THREAD_STATE_NODE *arg0) { +static inline NvU32 kdispReadPendingVblank(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, struct THREAD_STATE_NODE *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelDisplay was disabled!"); return 0; } #else //__nvoc_kern_disp_h_disabled -#define kdispReadPendingVblank(pGpu, pKernelDisplay, arg0) kdispReadPendingVblank_IMPL(pGpu, pKernelDisplay, arg0) +#define kdispReadPendingVblank(pGpu, pKernelDisplay, arg3) kdispReadPendingVblank_IMPL(pGpu, pKernelDisplay, arg3) #endif //__nvoc_kern_disp_h_disabled -#define kdispReadPendingVblank_HAL(pGpu, pKernelDisplay, arg0) kdispReadPendingVblank(pGpu, pKernelDisplay, arg0) +#define kdispReadPendingVblank_HAL(pGpu, pKernelDisplay, arg3) kdispReadPendingVblank(pGpu, pKernelDisplay, arg3) static inline void kdispInvokeDisplayModesetCallback_b3696a(struct KernelDisplay *pKernelDisplay, NvBool bModesetStart, NvU32 minRequiredIsoBandwidthKBPS, NvU32 minRequiredFloorBandwidthKBPS) { return; @@ -510,51 +699,51 @@ static inline NV_STATUS kdispSetupAcpiEdid(OBJGPU *pGpu, struct KernelDisplay *p #define kdispSetupAcpiEdid_HAL(pGpu, pKernelDisplay) kdispSetupAcpiEdid(pGpu, pKernelDisplay) -static inline NvBool kdispReadPendingAwakenIntr_ceaee8(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pCachedIntr, struct THREAD_STATE_NODE *arg0) { +static inline NvBool kdispReadPendingAwakenIntr_ceaee8(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pCachedIntr, struct THREAD_STATE_NODE *arg4) { NV_ASSERT_PRECOMP(0); return ((NvBool)(0 != 0)); } -NvBool kdispReadPendingAwakenIntr_v03_00_IMPL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pCachedIntr, struct THREAD_STATE_NODE *arg0); +NvBool kdispReadPendingAwakenIntr_v03_00_IMPL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pCachedIntr, struct THREAD_STATE_NODE *arg4); -static inline NvBool kdispReadPendingAwakenIntr_491d52(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pCachedIntr, struct THREAD_STATE_NODE *arg0) { +static inline NvBool kdispReadPendingAwakenIntr_491d52(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pCachedIntr, struct THREAD_STATE_NODE *arg4) { return ((NvBool)(0 != 0)); } #ifdef __nvoc_kern_disp_h_disabled -static inline NvBool kdispReadPendingAwakenIntr(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pCachedIntr, struct THREAD_STATE_NODE *arg0) { +static inline NvBool kdispReadPendingAwakenIntr(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pCachedIntr, struct THREAD_STATE_NODE *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelDisplay was disabled!"); return NV_FALSE; } #else //__nvoc_kern_disp_h_disabled -#define kdispReadPendingAwakenIntr(pGpu, pKernelDisplay, pCachedIntr, arg0) kdispReadPendingAwakenIntr_ceaee8(pGpu, pKernelDisplay, pCachedIntr, arg0) +#define kdispReadPendingAwakenIntr(pGpu, pKernelDisplay, pCachedIntr, arg4) kdispReadPendingAwakenIntr_ceaee8(pGpu, pKernelDisplay, pCachedIntr, arg4) #endif //__nvoc_kern_disp_h_disabled -#define kdispReadPendingAwakenIntr_HAL(pGpu, pKernelDisplay, pCachedIntr, arg0) kdispReadPendingAwakenIntr(pGpu, pKernelDisplay, pCachedIntr, arg0) +#define kdispReadPendingAwakenIntr_HAL(pGpu, pKernelDisplay, pCachedIntr, arg4) kdispReadPendingAwakenIntr(pGpu, pKernelDisplay, pCachedIntr, arg4) -static inline NV_STATUS kdispReadAwakenChannelNumMask_92bfc3(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *arg0, DISPCHNCLASS arg1, struct THREAD_STATE_NODE *arg2) { +static inline NV_STATUS kdispReadAwakenChannelNumMask_92bfc3(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *arg3, DISPCHNCLASS arg4, struct THREAD_STATE_NODE *arg5) { NV_ASSERT_PRECOMP(0); return NV_ERR_NOT_SUPPORTED; } -NV_STATUS kdispReadAwakenChannelNumMask_v03_00_IMPL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *arg0, DISPCHNCLASS arg1, struct THREAD_STATE_NODE *arg2); +NV_STATUS kdispReadAwakenChannelNumMask_v03_00_IMPL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *arg3, DISPCHNCLASS arg4, struct THREAD_STATE_NODE *arg5); -static inline NV_STATUS kdispReadAwakenChannelNumMask_46f6a7(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *arg0, DISPCHNCLASS arg1, struct THREAD_STATE_NODE *arg2) { +static inline NV_STATUS kdispReadAwakenChannelNumMask_46f6a7(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *arg3, DISPCHNCLASS arg4, struct THREAD_STATE_NODE *arg5) { return NV_ERR_NOT_SUPPORTED; } #ifdef __nvoc_kern_disp_h_disabled -static inline NV_STATUS kdispReadAwakenChannelNumMask(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *arg0, DISPCHNCLASS arg1, struct THREAD_STATE_NODE *arg2) { +static inline NV_STATUS kdispReadAwakenChannelNumMask(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *arg3, DISPCHNCLASS arg4, struct THREAD_STATE_NODE *arg5) { NV_ASSERT_FAILED_PRECOMP("KernelDisplay was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_disp_h_disabled -#define kdispReadAwakenChannelNumMask(pGpu, pKernelDisplay, arg0, arg1, arg2) kdispReadAwakenChannelNumMask_92bfc3(pGpu, pKernelDisplay, arg0, arg1, arg2) +#define kdispReadAwakenChannelNumMask(pGpu, pKernelDisplay, arg3, arg4, arg5) kdispReadAwakenChannelNumMask_92bfc3(pGpu, pKernelDisplay, arg3, arg4, arg5) #endif //__nvoc_kern_disp_h_disabled -#define kdispReadAwakenChannelNumMask_HAL(pGpu, pKernelDisplay, arg0, arg1, arg2) kdispReadAwakenChannelNumMask(pGpu, pKernelDisplay, arg0, arg1, arg2) +#define kdispReadAwakenChannelNumMask_HAL(pGpu, pKernelDisplay, arg3, arg4, arg5) kdispReadAwakenChannelNumMask(pGpu, pKernelDisplay, arg3, arg4, arg5) NV_STATUS kdispAllocateCommonHandle_IMPL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay); @@ -612,115 +801,59 @@ static inline void kdispFreeSharedMem(OBJGPU *pGpu, struct KernelDisplay *pKerne NV_STATUS kdispConstructEngine_IMPL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, ENGDESCRIPTOR engDesc); -static inline NV_STATUS kdispConstructEngine_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, ENGDESCRIPTOR engDesc) { - return pKernelDisplay->__kdispConstructEngine__(pGpu, pKernelDisplay, engDesc); -} - NV_STATUS kdispStatePreInitLocked_IMPL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay); -static inline NV_STATUS kdispStatePreInitLocked_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay) { - return pKernelDisplay->__kdispStatePreInitLocked__(pGpu, pKernelDisplay); -} - NV_STATUS kdispStateInitLocked_IMPL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay); -static inline NV_STATUS kdispStateInitLocked_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay) { - return pKernelDisplay->__kdispStateInitLocked__(pGpu, pKernelDisplay); -} - void kdispStateDestroy_IMPL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay); -static inline void kdispStateDestroy_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay) { - pKernelDisplay->__kdispStateDestroy__(pGpu, pKernelDisplay); -} - NV_STATUS kdispStateLoad_IMPL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 flags); -static inline NV_STATUS kdispStateLoad_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 flags) { - return pKernelDisplay->__kdispStateLoad__(pGpu, pKernelDisplay, flags); -} - NV_STATUS kdispStateUnload_IMPL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 flags); -static inline NV_STATUS kdispStateUnload_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 flags) { - return pKernelDisplay->__kdispStateUnload__(pGpu, pKernelDisplay, flags); -} - -void kdispRegisterIntrService_IMPL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, IntrServiceRecord pRecords[171]); - -static inline void kdispRegisterIntrService_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, IntrServiceRecord pRecords[171]) { - pKernelDisplay->__kdispRegisterIntrService__(pGpu, pKernelDisplay, pRecords); -} +void kdispRegisterIntrService_IMPL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, IntrServiceRecord pRecords[175]); static inline NvU32 kdispServiceInterrupt_acff5e(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, IntrServiceServiceInterruptArguments *pParams) { kdispServiceVblank(pGpu, pKernelDisplay, 0, (4), ((void *)0)); return NV_OK; } -static inline NvU32 kdispServiceInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, IntrServiceServiceInterruptArguments *pParams) { - return pKernelDisplay->__kdispServiceInterrupt__(pGpu, pKernelDisplay, pParams); -} - static inline NV_STATUS kdispSelectClass_46f6a7(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 swClass) { return NV_ERR_NOT_SUPPORTED; } NV_STATUS kdispSelectClass_v03_00_KERNEL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 swClass); -static inline NV_STATUS kdispSelectClass_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 swClass) { - return pKernelDisplay->__kdispSelectClass__(pGpu, pKernelDisplay, swClass); -} - static inline NV_STATUS kdispGetChannelNum_46f6a7(struct KernelDisplay *pKernelDisplay, DISPCHNCLASS channelClass, NvU32 channelInstance, NvU32 *pChannelNum) { return NV_ERR_NOT_SUPPORTED; } NV_STATUS kdispGetChannelNum_v03_00(struct KernelDisplay *pKernelDisplay, DISPCHNCLASS channelClass, NvU32 channelInstance, NvU32 *pChannelNum); -static inline NV_STATUS kdispGetChannelNum_DISPATCH(struct KernelDisplay *pKernelDisplay, DISPCHNCLASS channelClass, NvU32 channelInstance, NvU32 *pChannelNum) { - return pKernelDisplay->__kdispGetChannelNum__(pKernelDisplay, channelClass, channelInstance, pChannelNum); -} - static inline void kdispGetDisplayCapsBaseAndSize_b3696a(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pOffset, NvU32 *pSize) { return; } void kdispGetDisplayCapsBaseAndSize_v03_00(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pOffset, NvU32 *pSize); -static inline void kdispGetDisplayCapsBaseAndSize_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pOffset, NvU32 *pSize) { - pKernelDisplay->__kdispGetDisplayCapsBaseAndSize__(pGpu, pKernelDisplay, pOffset, pSize); -} - static inline void kdispGetDisplaySfUserBaseAndSize_b3696a(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pOffset, NvU32 *pSize) { return; } void kdispGetDisplaySfUserBaseAndSize_v03_00(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pOffset, NvU32 *pSize); -static inline void kdispGetDisplaySfUserBaseAndSize_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pOffset, NvU32 *pSize) { - pKernelDisplay->__kdispGetDisplaySfUserBaseAndSize__(pGpu, pKernelDisplay, pOffset, pSize); -} - static inline NV_STATUS kdispGetDisplayChannelUserBaseAndSize_46f6a7(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, DISPCHNCLASS channelClass, NvU32 channelInstance, NvU32 *pOffset, NvU32 *pSize) { return NV_ERR_NOT_SUPPORTED; } NV_STATUS kdispGetDisplayChannelUserBaseAndSize_v03_00(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, DISPCHNCLASS channelClass, NvU32 channelInstance, NvU32 *pOffset, NvU32 *pSize); -static inline NV_STATUS kdispGetDisplayChannelUserBaseAndSize_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, DISPCHNCLASS channelClass, NvU32 channelInstance, NvU32 *pOffset, NvU32 *pSize) { - return pKernelDisplay->__kdispGetDisplayChannelUserBaseAndSize__(pGpu, pKernelDisplay, channelClass, channelInstance, pOffset, pSize); -} - NvBool kdispGetVgaWorkspaceBase_v04_00(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU64 *pOffset); static inline NvBool kdispGetVgaWorkspaceBase_491d52(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU64 *pOffset) { return ((NvBool)(0 != 0)); } -static inline NvBool kdispGetVgaWorkspaceBase_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU64 *pOffset) { - return pKernelDisplay->__kdispGetVgaWorkspaceBase__(pGpu, pKernelDisplay, pOffset); -} - NV_STATUS kdispReadRgLineCountAndFrameCount_v03_00_PHYSICAL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head, NvU32 *pLineCount, NvU32 *pFrameCount); static inline NV_STATUS kdispReadRgLineCountAndFrameCount_46f6a7(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head, NvU32 *pLineCount, NvU32 *pFrameCount) { @@ -729,40 +862,24 @@ static inline NV_STATUS kdispReadRgLineCountAndFrameCount_46f6a7(OBJGPU *pGpu, s NV_STATUS kdispReadRgLineCountAndFrameCount_v03_00_KERNEL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head, NvU32 *pLineCount, NvU32 *pFrameCount); -static inline NV_STATUS kdispReadRgLineCountAndFrameCount_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head, NvU32 *pLineCount, NvU32 *pFrameCount) { - return pKernelDisplay->__kdispReadRgLineCountAndFrameCount__(pGpu, pKernelDisplay, head, pLineCount, pFrameCount); -} - void kdispRestoreOriginalLsrMinTime_v03_00(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head, NvU32 origLsrMinTime); static inline void kdispRestoreOriginalLsrMinTime_b3696a(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head, NvU32 origLsrMinTime) { return; } -static inline void kdispRestoreOriginalLsrMinTime_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head, NvU32 origLsrMinTime) { - pKernelDisplay->__kdispRestoreOriginalLsrMinTime__(pGpu, pKernelDisplay, head, origLsrMinTime); -} - NV_STATUS kdispComputeLsrMinTimeValue_v02_07(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head, NvU32 swapRdyHiLsrMinTime, NvU32 *pComputedLsrMinTime); static inline NV_STATUS kdispComputeLsrMinTimeValue_56cd7a(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head, NvU32 swapRdyHiLsrMinTime, NvU32 *pComputedLsrMinTime) { return NV_OK; } -static inline NV_STATUS kdispComputeLsrMinTimeValue_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head, NvU32 swapRdyHiLsrMinTime, NvU32 *pComputedLsrMinTime) { - return pKernelDisplay->__kdispComputeLsrMinTimeValue__(pGpu, pKernelDisplay, head, swapRdyHiLsrMinTime, pComputedLsrMinTime); -} - void kdispSetSwapBarrierLsrMinTime_v03_00(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head, NvU32 *pOrigLsrMinTime, NvU32 newLsrMinTime); static inline void kdispSetSwapBarrierLsrMinTime_b3696a(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head, NvU32 *pOrigLsrMinTime, NvU32 newLsrMinTime) { return; } -static inline void kdispSetSwapBarrierLsrMinTime_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head, NvU32 *pOrigLsrMinTime, NvU32 newLsrMinTime) { - pKernelDisplay->__kdispSetSwapBarrierLsrMinTime__(pGpu, pKernelDisplay, head, pOrigLsrMinTime, newLsrMinTime); -} - NV_STATUS kdispGetRgScanLock_v02_01(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head0, OBJGPU *pPeerGpu, NvU32 head1, NvBool *pMasterScanLock, NvU32 *pMasterScanLockPin, NvBool *pSlaveScanLock, NvU32 *pSlaveScanLockPin); static inline NV_STATUS kdispGetRgScanLock_92bfc3(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head0, OBJGPU *pPeerGpu, NvU32 head1, NvBool *pMasterScanLock, NvU32 *pMasterScanLockPin, NvBool *pSlaveScanLock, NvU32 *pSlaveScanLockPin) { @@ -770,10 +887,6 @@ static inline NV_STATUS kdispGetRgScanLock_92bfc3(OBJGPU *pGpu, struct KernelDis return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kdispGetRgScanLock_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head0, OBJGPU *pPeerGpu, NvU32 head1, NvBool *pMasterScanLock, NvU32 *pMasterScanLockPin, NvBool *pSlaveScanLock, NvU32 *pSlaveScanLockPin) { - return pKernelDisplay->__kdispGetRgScanLock__(pGpu, pKernelDisplay, head0, pPeerGpu, head1, pMasterScanLock, pMasterScanLockPin, pSlaveScanLock, pSlaveScanLockPin); -} - NV_STATUS kdispDetectSliLink_v04_00(struct KernelDisplay *pKernelDisplay, OBJGPU *pParentGpu, OBJGPU *pChildGpu, NvU32 ParentDrPort, NvU32 ChildDrPort); static inline NV_STATUS kdispDetectSliLink_92bfc3(struct KernelDisplay *pKernelDisplay, OBJGPU *pParentGpu, OBJGPU *pChildGpu, NvU32 ParentDrPort, NvU32 ChildDrPort) { @@ -781,70 +894,18 @@ static inline NV_STATUS kdispDetectSliLink_92bfc3(struct KernelDisplay *pKernelD return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kdispDetectSliLink_DISPATCH(struct KernelDisplay *pKernelDisplay, OBJGPU *pParentGpu, OBJGPU *pChildGpu, NvU32 ParentDrPort, NvU32 ChildDrPort) { - return pKernelDisplay->__kdispDetectSliLink__(pKernelDisplay, pParentGpu, pChildGpu, ParentDrPort, ChildDrPort); -} - static inline void kdispInitRegistryOverrides_b3696a(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay) { return; } void kdispInitRegistryOverrides_IMPL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay); -static inline void kdispInitRegistryOverrides_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay) { - pKernelDisplay->__kdispInitRegistryOverrides__(pGpu, pKernelDisplay); -} - NvU32 kdispGetPBTargetAperture_v03_00(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 memAddrSpace, NvU32 cacheSnoop); static inline NvU32 kdispGetPBTargetAperture_15a734(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 memAddrSpace, NvU32 cacheSnoop) { return 0U; } -static inline NvU32 kdispGetPBTargetAperture_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 memAddrSpace, NvU32 cacheSnoop) { - return pKernelDisplay->__kdispGetPBTargetAperture__(pGpu, pKernelDisplay, memAddrSpace, cacheSnoop); -} - -static inline NV_STATUS kdispServiceNotificationInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { - return pIntrService->__kdispServiceNotificationInterrupt__(pGpu, pIntrService, pParams); -} - -static inline NV_STATUS kdispStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelDisplay *pEngstate, NvU32 arg0) { - return pEngstate->__kdispStatePreLoad__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS kdispStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelDisplay *pEngstate, NvU32 arg0) { - return pEngstate->__kdispStatePostUnload__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS kdispStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelDisplay *pEngstate, NvU32 arg0) { - return pEngstate->__kdispStatePreUnload__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS kdispStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelDisplay *pEngstate) { - return pEngstate->__kdispStateInitUnlocked__(pGpu, pEngstate); -} - -static inline void kdispInitMissing_DISPATCH(POBJGPU pGpu, struct KernelDisplay *pEngstate) { - pEngstate->__kdispInitMissing__(pGpu, pEngstate); -} - -static inline NV_STATUS kdispStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelDisplay *pEngstate) { - return pEngstate->__kdispStatePreInitUnlocked__(pGpu, pEngstate); -} - -static inline NvBool kdispClearInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pIntrService, IntrServiceClearInterruptArguments *pParams) { - return pIntrService->__kdispClearInterrupt__(pGpu, pIntrService, pParams); -} - -static inline NV_STATUS kdispStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelDisplay *pEngstate, NvU32 arg0) { - return pEngstate->__kdispStatePostLoad__(pGpu, pEngstate, arg0); -} - -static inline NvBool kdispIsPresent_DISPATCH(POBJGPU pGpu, struct KernelDisplay *pEngstate) { - return pEngstate->__kdispIsPresent__(pGpu, pEngstate); -} - void kdispDestruct_IMPL(struct KernelDisplay *pKernelDisplay); #define __nvoc_kdispDestruct(pKernelDisplay) kdispDestruct_IMPL(pKernelDisplay) @@ -956,13 +1017,6 @@ kdispGetNumHeads(struct KernelDisplay *pKernelDisplay) return pKernelDisplay->numHeads; } -static NV_INLINE NvU32 -kdispGetIsPrimaryVga(struct KernelDisplay *pKernelDisplay) -{ - NV_ASSERT(pKernelDisplay->pStaticInfo != NULL); - return pKernelDisplay->pStaticInfo->bPrimaryVga; -} - static NV_INLINE NvU32 kdispGetDeferredVblankHeadMask(struct KernelDisplay *pKernelDisplay) { diff --git a/src/nvidia/generated/g_kern_fsp_nvoc.c b/src/nvidia/generated/g_kern_fsp_nvoc.c index 648e5807d6..52613b737a 100644 --- a/src/nvidia/generated/g_kern_fsp_nvoc.c +++ b/src/nvidia/generated/g_kern_fsp_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelFsp = /*pExportInfo=*/ &__nvoc_export_info_KernelFsp }; -static NV_STATUS __nvoc_thunk_KernelFsp_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFsp, ENGDESCRIPTOR arg0) { - return kfspConstructEngine(pGpu, (struct KernelFsp *)(((unsigned char *)pKernelFsp) - __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg0); +// 2 down-thunk(s) defined to bridge methods in KernelFsp from superclasses + +// kfspConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelFsp_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelFsp, ENGDESCRIPTOR arg3) { + return kfspConstructEngine(pGpu, (struct KernelFsp *)(((unsigned char *) pKernelFsp) - __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_KernelFsp_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFsp) { - kfspStateDestroy(pGpu, (struct KernelFsp *)(((unsigned char *)pKernelFsp) - __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); +// kfspStateDestroy: virtual override (engstate) base (engstate) +static void __nvoc_down_thunk_KernelFsp_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelFsp) { + kfspStateDestroy(pGpu, (struct KernelFsp *)(((unsigned char *) pKernelFsp) - __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kfspStateLoad(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg0) { - return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg0); + +// 12 up-thunk(s) defined to bridge methods in KernelFsp to superclasses + +// kfspInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kfspInitMissing(POBJGPU pGpu, struct KernelFsp *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kfspStateUnload(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg0) { - return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg0); +// kfspStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePreInitLocked(POBJGPU pGpu, struct KernelFsp *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kfspStateInitLocked(POBJGPU pGpu, struct KernelFsp *pEngstate) { - return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); +// kfspStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePreInitUnlocked(POBJGPU pGpu, struct KernelFsp *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kfspStatePreLoad(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg0); +// kfspStateInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStateInitLocked(POBJGPU pGpu, struct KernelFsp *pEngstate) { + return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kfspStatePostUnload(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg0); +// kfspStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStateInitUnlocked(POBJGPU pGpu, struct KernelFsp *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kfspStatePreUnload(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg0); +// kfspStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePreLoad(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kfspStateInitUnlocked(POBJGPU pGpu, struct KernelFsp *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); +// kfspStateLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStateLoad(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { + return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_kfspInitMissing(POBJGPU pGpu, struct KernelFsp *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); +// kfspStatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePostLoad(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kfspStatePreInitLocked(POBJGPU pGpu, struct KernelFsp *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); +// kfspStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePreUnload(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kfspStatePreInitUnlocked(POBJGPU pGpu, struct KernelFsp *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); +// kfspStateUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStateUnload(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { + return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kfspStatePostLoad(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg0); +// kfspStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePostUnload(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg3); } -static NvBool __nvoc_thunk_OBJENGSTATE_kfspIsPresent(POBJGPU pGpu, struct KernelFsp *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); +// kfspIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_kfspIsPresent(POBJGPU pGpu, struct KernelFsp *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelFsp = { /*numEntries=*/ 0, @@ -178,6 +198,7 @@ NV_STATUS __nvoc_ctor_KernelFsp(KernelFsp *pThis, RmHalspecOwner *pRmhalspecowne return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -190,27 +211,18 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); + // kfspConstructEngine -- virtual override (engstate) base (engstate) pThis->__kfspConstructEngine__ = &kfspConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelFsp_engstateConstructEngine; - pThis->__kfspCleanupBootState__ = &kfspCleanupBootState_IMPL; - + // kfspStateDestroy -- virtual override (engstate) base (engstate) pThis->__kfspStateDestroy__ = &kfspStateDestroy_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelFsp_engstateStateDestroy; - pThis->__kfspSecureReset__ = &kfspSecureReset_IMPL; - - pThis->__kfspSendPacket__ = &kfspSendPacket_IMPL; - - pThis->__kfspSendAndReadMessage__ = &kfspSendAndReadMessage_IMPL; - - pThis->__kfspIsQueueEmpty__ = &kfspIsQueueEmpty_IMPL; + // kfspSendAndReadMessageAsync -- virtual + pThis->__kfspSendAndReadMessageAsync__ = &kfspSendAndReadMessageAsync_IMPL; - pThis->__kfspPollForQueueEmpty__ = &kfspPollForQueueEmpty_IMPL; - - pThis->__kfspIsMsgQueueEmpty__ = &kfspIsMsgQueueEmpty_IMPL; - - pThis->__kfspPollForResponse__ = &kfspPollForResponse_IMPL; - - // Hal function -- kfspGspFmcIsEnforced + // kfspGspFmcIsEnforced -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspGspFmcIsEnforced__ = &kfspGspFmcIsEnforced_GH100; @@ -221,7 +233,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspGspFmcIsEnforced__ = &kfspGspFmcIsEnforced_491d52; } - // Hal function -- kfspPrepareBootCommands + // kfspPrepareBootCommands -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspPrepareBootCommands__ = &kfspPrepareBootCommands_GH100; @@ -231,7 +243,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspPrepareBootCommands__ = &kfspPrepareBootCommands_ac1694; } - // Hal function -- kfspSendBootCommands + // kfspSendBootCommands -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspSendBootCommands__ = &kfspSendBootCommands_GH100; @@ -241,7 +253,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspSendBootCommands__ = &kfspSendBootCommands_ac1694; } - // Hal function -- kfspPrepareAndSendBootCommands + // kfspPrepareAndSendBootCommands -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspPrepareAndSendBootCommands__ = &kfspPrepareAndSendBootCommands_GH100; @@ -251,17 +263,18 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspPrepareAndSendBootCommands__ = &kfspPrepareAndSendBootCommands_ac1694; } - // Hal function -- kfspWaitForSecureBoot + // kfspWaitForSecureBoot -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspWaitForSecureBoot__ = &kfspWaitForSecureBoot_GH100; } + // default else { - pThis->__kfspWaitForSecureBoot__ = &kfspWaitForSecureBoot_395e98; + pThis->__kfspWaitForSecureBoot__ = &kfspWaitForSecureBoot_46f6a7; } - // Hal function -- kfspGetRmChannelSize + // kfspGetRmChannelSize -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspGetRmChannelSize__ = &kfspGetRmChannelSize_GH100; @@ -271,7 +284,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspGetRmChannelSize__ = &kfspGetRmChannelSize_b2b553; } - // Hal function -- kfspConfigEmemc + // kfspConfigEmemc -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspConfigEmemc__ = &kfspConfigEmemc_GH100; @@ -281,7 +294,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspConfigEmemc__ = &kfspConfigEmemc_395e98; } - // Hal function -- kfspUpdateQueueHeadTail + // kfspUpdateQueueHeadTail -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspUpdateQueueHeadTail__ = &kfspUpdateQueueHeadTail_GH100; @@ -291,7 +304,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspUpdateQueueHeadTail__ = &kfspUpdateQueueHeadTail_d44104; } - // Hal function -- kfspGetQueueHeadTail + // kfspGetQueueHeadTail -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspGetQueueHeadTail__ = &kfspGetQueueHeadTail_GH100; @@ -301,7 +314,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspGetQueueHeadTail__ = &kfspGetQueueHeadTail_d44104; } - // Hal function -- kfspUpdateMsgQueueHeadTail + // kfspUpdateMsgQueueHeadTail -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspUpdateMsgQueueHeadTail__ = &kfspUpdateMsgQueueHeadTail_GH100; @@ -311,7 +324,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspUpdateMsgQueueHeadTail__ = &kfspUpdateMsgQueueHeadTail_d44104; } - // Hal function -- kfspGetMsgQueueHeadTail + // kfspGetMsgQueueHeadTail -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspGetMsgQueueHeadTail__ = &kfspGetMsgQueueHeadTail_GH100; @@ -321,7 +334,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspGetMsgQueueHeadTail__ = &kfspGetMsgQueueHeadTail_d44104; } - // Hal function -- kfspNvdmToSeid + // kfspNvdmToSeid -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspNvdmToSeid__ = &kfspNvdmToSeid_GH100; @@ -331,7 +344,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspNvdmToSeid__ = &kfspNvdmToSeid_b2b553; } - // Hal function -- kfspCreateMctpHeader + // kfspCreateMctpHeader -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspCreateMctpHeader__ = &kfspCreateMctpHeader_GH100; @@ -341,7 +354,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspCreateMctpHeader__ = &kfspCreateMctpHeader_b2b553; } - // Hal function -- kfspCreateNvdmHeader + // kfspCreateNvdmHeader -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspCreateNvdmHeader__ = &kfspCreateNvdmHeader_GH100; @@ -351,7 +364,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspCreateNvdmHeader__ = &kfspCreateNvdmHeader_b2b553; } - // Hal function -- kfspWriteToEmem + // kfspWriteToEmem -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspWriteToEmem__ = &kfspWriteToEmem_GH100; @@ -361,7 +374,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspWriteToEmem__ = &kfspWriteToEmem_395e98; } - // Hal function -- kfspReadFromEmem + // kfspReadFromEmem -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspReadFromEmem__ = &kfspReadFromEmem_GH100; @@ -371,7 +384,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspReadFromEmem__ = &kfspReadFromEmem_395e98; } - // Hal function -- kfspGetPacketInfo + // kfspGetPacketInfo -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspGetPacketInfo__ = &kfspGetPacketInfo_GH100; @@ -381,7 +394,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspGetPacketInfo__ = &kfspGetPacketInfo_395e98; } - // Hal function -- kfspValidateMctpPayloadHeader + // kfspValidateMctpPayloadHeader -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspValidateMctpPayloadHeader__ = &kfspValidateMctpPayloadHeader_GH100; @@ -391,7 +404,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspValidateMctpPayloadHeader__ = &kfspValidateMctpPayloadHeader_395e98; } - // Hal function -- kfspProcessNvdmMessage + // kfspProcessNvdmMessage -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspProcessNvdmMessage__ = &kfspProcessNvdmMessage_GH100; @@ -401,7 +414,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspProcessNvdmMessage__ = &kfspProcessNvdmMessage_395e98; } - // Hal function -- kfspProcessCommandResponse + // kfspProcessCommandResponse -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspProcessCommandResponse__ = &kfspProcessCommandResponse_GH100; @@ -411,7 +424,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspProcessCommandResponse__ = &kfspProcessCommandResponse_395e98; } - // Hal function -- kfspDumpDebugState + // kfspDumpDebugState -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspDumpDebugState__ = &kfspDumpDebugState_GH100; @@ -421,7 +434,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspDumpDebugState__ = &kfspDumpDebugState_d44104; } - // Hal function -- kfspErrorCode2NvStatusMap + // kfspErrorCode2NvStatusMap -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspErrorCode2NvStatusMap__ = &kfspErrorCode2NvStatusMap_GH100; @@ -431,7 +444,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspErrorCode2NvStatusMap__ = &kfspErrorCode2NvStatusMap_395e98; } - // Hal function -- kfspGetExtraReservedMemorySize + // kfspGetExtraReservedMemorySize -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspGetExtraReservedMemorySize__ = &kfspGetExtraReservedMemorySize_GH100; @@ -442,7 +455,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspGetExtraReservedMemorySize__ = &kfspGetExtraReservedMemorySize_4a4dee; } - // Hal function -- kfspCheckGspSecureScratch + // kfspCheckGspSecureScratch -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspCheckGspSecureScratch__ = &kfspCheckGspSecureScratch_GH100; @@ -453,7 +466,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspCheckGspSecureScratch__ = &kfspCheckGspSecureScratch_491d52; } - // Hal function -- kfspWaitForGspTargetMaskReleased + // kfspWaitForGspTargetMaskReleased -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspWaitForGspTargetMaskReleased__ = &kfspWaitForGspTargetMaskReleased_GH100; @@ -463,7 +476,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspWaitForGspTargetMaskReleased__ = &kfspWaitForGspTargetMaskReleased_395e98; } - // Hal function -- kfspRequiresBug3957833WAR + // kfspRequiresBug3957833WAR -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspRequiresBug3957833WAR__ = &kfspRequiresBug3957833WAR_GH100; @@ -474,7 +487,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspRequiresBug3957833WAR__ = &kfspRequiresBug3957833WAR_491d52; } - // Hal function -- kfspFrtsSysmemLocationProgram + // kfspFrtsSysmemLocationProgram -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspFrtsSysmemLocationProgram__ = &kfspFrtsSysmemLocationProgram_GH100; @@ -484,7 +497,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspFrtsSysmemLocationProgram__ = &kfspFrtsSysmemLocationProgram_395e98; } - // Hal function -- kfspFrtsSysmemLocationClear + // kfspFrtsSysmemLocationClear -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfspFrtsSysmemLocationClear__ = &kfspFrtsSysmemLocationClear_GH100; @@ -494,36 +507,48 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * pThis->__kfspFrtsSysmemLocationClear__ = &kfspFrtsSysmemLocationClear_d44104; } - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelFsp_engstateConstructEngine; + // kfspInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__kfspInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kfspInitMissing; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_thunk_KernelFsp_engstateStateDestroy; + // kfspStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__kfspStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStatePreInitLocked; - pThis->__kfspStateLoad__ = &__nvoc_thunk_OBJENGSTATE_kfspStateLoad; + // kfspStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kfspStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStatePreInitUnlocked; - pThis->__kfspStateUnload__ = &__nvoc_thunk_OBJENGSTATE_kfspStateUnload; + // kfspStateInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__kfspStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStateInitLocked; - pThis->__kfspStateInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kfspStateInitLocked; + // kfspStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kfspStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStateInitUnlocked; - pThis->__kfspStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_kfspStatePreLoad; + // kfspStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__kfspStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStatePreLoad; - pThis->__kfspStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_kfspStatePostUnload; + // kfspStateLoad -- virtual inherited (engstate) base (engstate) + pThis->__kfspStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStateLoad; - pThis->__kfspStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_kfspStatePreUnload; + // kfspStatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__kfspStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStatePostLoad; - pThis->__kfspStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kfspStateInitUnlocked; + // kfspStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__kfspStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStatePreUnload; - pThis->__kfspInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kfspInitMissing; + // kfspStateUnload -- virtual inherited (engstate) base (engstate) + pThis->__kfspStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStateUnload; - pThis->__kfspStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kfspStatePreInitLocked; + // kfspStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__kfspStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStatePostUnload; - pThis->__kfspStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kfspStatePreInitUnlocked; + // kfspIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__kfspIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kfspIsPresent; +} // End __nvoc_init_funcTable_KernelFsp_1 with approximately 73 basic block(s). - pThis->__kfspStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_kfspStatePostLoad; - - pThis->__kfspIsPresent__ = &__nvoc_thunk_OBJENGSTATE_kfspIsPresent; -} +// Initialize vtable(s) for 43 virtual method(s). void __nvoc_init_funcTable_KernelFsp(KernelFsp *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 43 per-object function pointer(s). __nvoc_init_funcTable_KernelFsp_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kern_fsp_nvoc.h b/src/nvidia/generated/g_kern_fsp_nvoc.h index 218706bb24..3a514a2fee 100644 --- a/src/nvidia/generated/g_kern_fsp_nvoc.h +++ b/src/nvidia/generated/g_kern_fsp_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_KERN_FSP_NVOC_H_ #define _G_KERN_FSP_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kern_fsp_nvoc.h" #ifndef KERN_FSP_H @@ -36,32 +44,11 @@ extern "C" { #include "core/core.h" #include "gpu/eng_state.h" -#include "kernel/gpu/fifo/channel_descendant.h" -#include "kernel/gpu/intr/intr_service.h" -#include "fsp/nvdm_payload_cmd_response.h" - -// -// VBIOS ucode descriptor v4 format. Used for the CPU command to FSP to boot -// GSP FMC. -// -typedef struct -{ - NvU8 flags; - NvU8 version; - NvU16 structSize; - NvU32 storeSize; - NvU32 IMEMOffset; - NvU32 IMEMSize; - NvU32 DMEMOffset; - NvU32 DMEMSize; - NvU8 ucodeId; - NvU8 ucodeVersion; - NvU16 payloadCount; - NvU16 payloadSize; - NvU8 ucodeVerMajor; - NvU8 ucodeVerMinor; - NvU32 cryptoData[10]; // unused -} FSP_UCODE_DESC_V4; +#include "objtmr.h" + +#include "kernel/gpu/mem_mgr/mem_desc.h" +#include "kernel/gpu/gpu_halspec.h" +#include "nvoc/utility.h" #pragma pack(1) typedef struct @@ -94,20 +81,15 @@ typedef struct } NVDM_PAYLOAD_COT; #pragma pack() +// State required to handle the async FSP RPC response +typedef void (*AsyncRpcCallback)(NV_STATUS status, void *pArgs); typedef struct { - NvU8 nvdmType; - - // We can make this a union when adding more NVDM payloads - NVDM_PAYLOAD_COT cotPayload; -} NVDM_PACKET; - -// The structure cannot have embedded pointers to send as byte stream -typedef struct -{ - MCTP_HEADER header; - NVDM_PACKET nvdmPacket; -} MCTP_PACKET, *PMCTP_PACKET; + AsyncRpcCallback callback; + void *pCallbackArgs; + NvU8 *pResponseBuffer; + NvU32 responseBufferSize; +} FSP_RPC_STATE; // Type of packet, can either be SOM, EOM, neither, or both (1-packet messages) typedef enum @@ -128,73 +110,83 @@ typedef enum #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelFsp { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct KernelFsp *__nvoc_pbase_KernelFsp; - NV_STATUS (*__kfspConstructEngine__)(struct OBJGPU *, struct KernelFsp *, ENGDESCRIPTOR); - void (*__kfspCleanupBootState__)(struct OBJGPU *, struct KernelFsp *); - void (*__kfspStateDestroy__)(struct OBJGPU *, struct KernelFsp *); - void (*__kfspSecureReset__)(struct OBJGPU *, struct KernelFsp *); - NV_STATUS (*__kfspSendPacket__)(struct OBJGPU *, struct KernelFsp *, NvU8 *, NvU32); - NV_STATUS (*__kfspSendAndReadMessage__)(struct OBJGPU *, struct KernelFsp *, NvU8 *, NvU32, NvU32, NvU8 *, NvU32); - NvBool (*__kfspIsQueueEmpty__)(struct OBJGPU *, struct KernelFsp *); - NV_STATUS (*__kfspPollForQueueEmpty__)(struct OBJGPU *, struct KernelFsp *); - NvBool (*__kfspIsMsgQueueEmpty__)(struct OBJGPU *, struct KernelFsp *); - NV_STATUS (*__kfspPollForResponse__)(struct OBJGPU *, struct KernelFsp *); - NvBool (*__kfspGspFmcIsEnforced__)(struct OBJGPU *, struct KernelFsp *); - NV_STATUS (*__kfspPrepareBootCommands__)(struct OBJGPU *, struct KernelFsp *); - NV_STATUS (*__kfspSendBootCommands__)(struct OBJGPU *, struct KernelFsp *); - NV_STATUS (*__kfspPrepareAndSendBootCommands__)(struct OBJGPU *, struct KernelFsp *); - NV_STATUS (*__kfspWaitForSecureBoot__)(struct OBJGPU *, struct KernelFsp *); - NvU32 (*__kfspGetRmChannelSize__)(struct OBJGPU *, struct KernelFsp *); - NV_STATUS (*__kfspConfigEmemc__)(struct OBJGPU *, struct KernelFsp *, NvU32, NvBool, NvBool); - void (*__kfspUpdateQueueHeadTail__)(struct OBJGPU *, struct KernelFsp *, NvU32, NvU32); - void (*__kfspGetQueueHeadTail__)(struct OBJGPU *, struct KernelFsp *, NvU32 *, NvU32 *); - void (*__kfspUpdateMsgQueueHeadTail__)(struct OBJGPU *, struct KernelFsp *, NvU32, NvU32); - void (*__kfspGetMsgQueueHeadTail__)(struct OBJGPU *, struct KernelFsp *, NvU32 *, NvU32 *); - NvU8 (*__kfspNvdmToSeid__)(struct OBJGPU *, struct KernelFsp *, NvU8); - NvU32 (*__kfspCreateMctpHeader__)(struct OBJGPU *, struct KernelFsp *, NvU8, NvU8, NvU8, NvU8); - NvU32 (*__kfspCreateNvdmHeader__)(struct OBJGPU *, struct KernelFsp *, NvU32); - NV_STATUS (*__kfspWriteToEmem__)(struct OBJGPU *, struct KernelFsp *, NvU8 *, NvU32); - NV_STATUS (*__kfspReadFromEmem__)(struct OBJGPU *, struct KernelFsp *, NvU8 *, NvU32); - NV_STATUS (*__kfspGetPacketInfo__)(struct OBJGPU *, struct KernelFsp *, NvU8 *, NvU32, MCTP_PACKET_STATE *, NvU8 *); - NV_STATUS (*__kfspValidateMctpPayloadHeader__)(struct OBJGPU *, struct KernelFsp *, NvU8 *, NvU32); - NV_STATUS (*__kfspProcessNvdmMessage__)(struct OBJGPU *, struct KernelFsp *, NvU8 *, NvU32); - NV_STATUS (*__kfspProcessCommandResponse__)(struct OBJGPU *, struct KernelFsp *, NvU8 *, NvU32); - void (*__kfspDumpDebugState__)(struct OBJGPU *, struct KernelFsp *); - NV_STATUS (*__kfspErrorCode2NvStatusMap__)(struct OBJGPU *, struct KernelFsp *, NvU32); - NvU64 (*__kfspGetExtraReservedMemorySize__)(struct OBJGPU *, struct KernelFsp *); - NvBool (*__kfspCheckGspSecureScratch__)(struct OBJGPU *, struct KernelFsp *); - NV_STATUS (*__kfspWaitForGspTargetMaskReleased__)(struct OBJGPU *, struct KernelFsp *); - NvBool (*__kfspRequiresBug3957833WAR__)(struct OBJGPU *, struct KernelFsp *); - NV_STATUS (*__kfspFrtsSysmemLocationProgram__)(struct OBJGPU *, struct KernelFsp *); - void (*__kfspFrtsSysmemLocationClear__)(struct OBJGPU *, struct KernelFsp *); - NV_STATUS (*__kfspStateLoad__)(POBJGPU, struct KernelFsp *, NvU32); - NV_STATUS (*__kfspStateUnload__)(POBJGPU, struct KernelFsp *, NvU32); - NV_STATUS (*__kfspStateInitLocked__)(POBJGPU, struct KernelFsp *); - NV_STATUS (*__kfspStatePreLoad__)(POBJGPU, struct KernelFsp *, NvU32); - NV_STATUS (*__kfspStatePostUnload__)(POBJGPU, struct KernelFsp *, NvU32); - NV_STATUS (*__kfspStatePreUnload__)(POBJGPU, struct KernelFsp *, NvU32); - NV_STATUS (*__kfspStateInitUnlocked__)(POBJGPU, struct KernelFsp *); - void (*__kfspInitMissing__)(POBJGPU, struct KernelFsp *); - NV_STATUS (*__kfspStatePreInitLocked__)(POBJGPU, struct KernelFsp *); - NV_STATUS (*__kfspStatePreInitUnlocked__)(POBJGPU, struct KernelFsp *); - NV_STATUS (*__kfspStatePostLoad__)(POBJGPU, struct KernelFsp *, NvU32); - NvBool (*__kfspIsPresent__)(POBJGPU, struct KernelFsp *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct KernelFsp *__nvoc_pbase_KernelFsp; // kfsp + + // Vtable with 43 per-object function pointers + NV_STATUS (*__kfspConstructEngine__)(OBJGPU *, struct KernelFsp * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + void (*__kfspStateDestroy__)(OBJGPU *, struct KernelFsp * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kfspSendAndReadMessageAsync__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8 *, NvU32, NvU32, NvU8 *, NvU32, AsyncRpcCallback, void *); // virtual + NvBool (*__kfspGspFmcIsEnforced__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body + NV_STATUS (*__kfspPrepareBootCommands__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body + NV_STATUS (*__kfspSendBootCommands__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body + NV_STATUS (*__kfspPrepareAndSendBootCommands__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body + NV_STATUS (*__kfspWaitForSecureBoot__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body + NvU32 (*__kfspGetRmChannelSize__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body + NV_STATUS (*__kfspConfigEmemc__)(OBJGPU *, struct KernelFsp * /*this*/, NvU32, NvBool, NvBool); // halified (2 hals) body + void (*__kfspUpdateQueueHeadTail__)(OBJGPU *, struct KernelFsp * /*this*/, NvU32, NvU32); // halified (2 hals) body + void (*__kfspGetQueueHeadTail__)(OBJGPU *, struct KernelFsp * /*this*/, NvU32 *, NvU32 *); // halified (2 hals) body + void (*__kfspUpdateMsgQueueHeadTail__)(OBJGPU *, struct KernelFsp * /*this*/, NvU32, NvU32); // halified (2 hals) body + void (*__kfspGetMsgQueueHeadTail__)(OBJGPU *, struct KernelFsp * /*this*/, NvU32 *, NvU32 *); // halified (2 hals) body + NvU8 (*__kfspNvdmToSeid__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8); // halified (2 hals) body + NvU32 (*__kfspCreateMctpHeader__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8, NvU8, NvU8, NvU8); // halified (2 hals) body + NvU32 (*__kfspCreateNvdmHeader__)(OBJGPU *, struct KernelFsp * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__kfspWriteToEmem__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8 *, NvU32); // halified (2 hals) body + NV_STATUS (*__kfspReadFromEmem__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8 *, NvU32); // halified (2 hals) body + NV_STATUS (*__kfspGetPacketInfo__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8 *, NvU32, MCTP_PACKET_STATE *, NvU8 *); // halified (2 hals) body + NV_STATUS (*__kfspValidateMctpPayloadHeader__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8 *, NvU32); // halified (2 hals) body + NV_STATUS (*__kfspProcessNvdmMessage__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8 *, NvU32); // halified (2 hals) body + NV_STATUS (*__kfspProcessCommandResponse__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8 *, NvU32); // halified (2 hals) body + void (*__kfspDumpDebugState__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body + NV_STATUS (*__kfspErrorCode2NvStatusMap__)(OBJGPU *, struct KernelFsp * /*this*/, NvU32); // halified (2 hals) body + NvU64 (*__kfspGetExtraReservedMemorySize__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body + NvBool (*__kfspCheckGspSecureScratch__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body + NV_STATUS (*__kfspWaitForGspTargetMaskReleased__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body + NvBool (*__kfspRequiresBug3957833WAR__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body + NV_STATUS (*__kfspFrtsSysmemLocationProgram__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body + void (*__kfspFrtsSysmemLocationClear__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body + void (*__kfspInitMissing__)(POBJGPU, struct KernelFsp * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfspStatePreInitLocked__)(POBJGPU, struct KernelFsp * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfspStatePreInitUnlocked__)(POBJGPU, struct KernelFsp * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfspStateInitLocked__)(POBJGPU, struct KernelFsp * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfspStateInitUnlocked__)(POBJGPU, struct KernelFsp * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfspStatePreLoad__)(POBJGPU, struct KernelFsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfspStateLoad__)(POBJGPU, struct KernelFsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfspStatePostLoad__)(POBJGPU, struct KernelFsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfspStatePreUnload__)(POBJGPU, struct KernelFsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfspStateUnload__)(POBJGPU, struct KernelFsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfspStatePostUnload__)(POBJGPU, struct KernelFsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__kfspIsPresent__)(POBJGPU, struct KernelFsp * /*this*/); // virtual inherited (engstate) base (engstate) + + // 6 PDB properties NvBool PDB_PROP_KFSP_BOOT_COMMAND_OK; NvBool PDB_PROP_KFSP_GSP_MODE_GSPRM; NvBool PDB_PROP_KFSP_DISABLE_FRTS_SYSMEM; NvBool PDB_PROP_KFSP_DISABLE_FRTS_VIDMEM; NvBool PDB_PROP_KFSP_DISABLE_GSPFMC; + + // Data members MEMORY_DESCRIPTOR *pSysmemFrtsMemdesc; MEMORY_DESCRIPTOR *pVidmemFrtsMemdesc; MEMORY_DESCRIPTOR *pGspFmcMemdesc; MEMORY_DESCRIPTOR *pGspBootArgsMemdesc; NVDM_PAYLOAD_COT *pCotPayload; NvBool bGspDebugBufferInitialized; + NvBool bBusy; + struct TMR_EVENT *pPollEvent; + RMTIMEOUT rpcTimeout; + FSP_RPC_STATE rpcState; }; #ifndef __NVOC_CLASS_KernelFsp_TYPEDEF__ @@ -206,6 +198,7 @@ typedef struct KernelFsp KernelFsp; #define __nvoc_class_id_KernelFsp 0x87fb96 #endif /* __nvoc_class_id_KernelFsp */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelFsp; #define __staticCast_KernelFsp(pThis) \ @@ -218,6 +211,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelFsp; ((KernelFsp*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelFsp))) #endif //__nvoc_kern_fsp_h_disabled +// Property macros #define PDB_PROP_KFSP_DISABLE_FRTS_VIDMEM_BASE_CAST #define PDB_PROP_KFSP_DISABLE_FRTS_VIDMEM_BASE_NAME PDB_PROP_KFSP_DISABLE_FRTS_VIDMEM #define PDB_PROP_KFSP_DISABLE_GSPFMC_BASE_CAST @@ -237,471 +231,545 @@ NV_STATUS __nvoc_objCreate_KernelFsp(KernelFsp**, Dynamic*, NvU32); #define __objCreate_KernelFsp(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelFsp((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define kfspConstructEngine(pGpu, pKernelFsp, arg0) kfspConstructEngine_DISPATCH(pGpu, pKernelFsp, arg0) -#define kfspCleanupBootState(pGpu, pKernelFsp) kfspCleanupBootState_DISPATCH(pGpu, pKernelFsp) + +// Wrapper macros +#define kfspConstructEngine_FNPTR(pKernelFsp) pKernelFsp->__kfspConstructEngine__ +#define kfspConstructEngine(pGpu, pKernelFsp, arg3) kfspConstructEngine_DISPATCH(pGpu, pKernelFsp, arg3) +#define kfspStateDestroy_FNPTR(pKernelFsp) pKernelFsp->__kfspStateDestroy__ #define kfspStateDestroy(pGpu, pKernelFsp) kfspStateDestroy_DISPATCH(pGpu, pKernelFsp) -#define kfspSecureReset(pGpu, pKernelFsp) kfspSecureReset_DISPATCH(pGpu, pKernelFsp) -#define kfspSendPacket(pGpu, pKernelFsp, pPacket, packetSize) kfspSendPacket_DISPATCH(pGpu, pKernelFsp, pPacket, packetSize) -#define kfspSendAndReadMessage(pGpu, pKernelFsp, pPayload, size, nvdmType, pResponsePayload, responseBufferSize) kfspSendAndReadMessage_DISPATCH(pGpu, pKernelFsp, pPayload, size, nvdmType, pResponsePayload, responseBufferSize) -#define kfspIsQueueEmpty(pGpu, pKernelFsp) kfspIsQueueEmpty_DISPATCH(pGpu, pKernelFsp) -#define kfspPollForQueueEmpty(pGpu, pKernelFsp) kfspPollForQueueEmpty_DISPATCH(pGpu, pKernelFsp) -#define kfspIsMsgQueueEmpty(pGpu, pKernelFsp) kfspIsMsgQueueEmpty_DISPATCH(pGpu, pKernelFsp) -#define kfspPollForResponse(pGpu, pKernelFsp) kfspPollForResponse_DISPATCH(pGpu, pKernelFsp) +#define kfspSendAndReadMessageAsync_FNPTR(pKernelFsp) pKernelFsp->__kfspSendAndReadMessageAsync__ +#define kfspSendAndReadMessageAsync(pGpu, pKernelFsp, pPayload, size, nvdmType, pResponsePayload, responseBufferSize, callback, pCallbackArgs) kfspSendAndReadMessageAsync_DISPATCH(pGpu, pKernelFsp, pPayload, size, nvdmType, pResponsePayload, responseBufferSize, callback, pCallbackArgs) +#define kfspGspFmcIsEnforced_FNPTR(pKernelFsp) pKernelFsp->__kfspGspFmcIsEnforced__ #define kfspGspFmcIsEnforced(pGpu, pKernelFsp) kfspGspFmcIsEnforced_DISPATCH(pGpu, pKernelFsp) #define kfspGspFmcIsEnforced_HAL(pGpu, pKernelFsp) kfspGspFmcIsEnforced_DISPATCH(pGpu, pKernelFsp) +#define kfspPrepareBootCommands_FNPTR(pKernelFsp) pKernelFsp->__kfspPrepareBootCommands__ #define kfspPrepareBootCommands(pGpu, pKernelFsp) kfspPrepareBootCommands_DISPATCH(pGpu, pKernelFsp) #define kfspPrepareBootCommands_HAL(pGpu, pKernelFsp) kfspPrepareBootCommands_DISPATCH(pGpu, pKernelFsp) +#define kfspSendBootCommands_FNPTR(pKernelFsp) pKernelFsp->__kfspSendBootCommands__ #define kfspSendBootCommands(pGpu, pKernelFsp) kfspSendBootCommands_DISPATCH(pGpu, pKernelFsp) #define kfspSendBootCommands_HAL(pGpu, pKernelFsp) kfspSendBootCommands_DISPATCH(pGpu, pKernelFsp) +#define kfspPrepareAndSendBootCommands_FNPTR(pKernelFsp) pKernelFsp->__kfspPrepareAndSendBootCommands__ #define kfspPrepareAndSendBootCommands(pGpu, pKernelFsp) kfspPrepareAndSendBootCommands_DISPATCH(pGpu, pKernelFsp) #define kfspPrepareAndSendBootCommands_HAL(pGpu, pKernelFsp) kfspPrepareAndSendBootCommands_DISPATCH(pGpu, pKernelFsp) +#define kfspWaitForSecureBoot_FNPTR(pKernelFsp) pKernelFsp->__kfspWaitForSecureBoot__ #define kfspWaitForSecureBoot(pGpu, pKernelFsp) kfspWaitForSecureBoot_DISPATCH(pGpu, pKernelFsp) #define kfspWaitForSecureBoot_HAL(pGpu, pKernelFsp) kfspWaitForSecureBoot_DISPATCH(pGpu, pKernelFsp) +#define kfspGetRmChannelSize_FNPTR(pKernelFsp) pKernelFsp->__kfspGetRmChannelSize__ #define kfspGetRmChannelSize(pGpu, pKernelFsp) kfspGetRmChannelSize_DISPATCH(pGpu, pKernelFsp) #define kfspGetRmChannelSize_HAL(pGpu, pKernelFsp) kfspGetRmChannelSize_DISPATCH(pGpu, pKernelFsp) +#define kfspConfigEmemc_FNPTR(pKernelFsp) pKernelFsp->__kfspConfigEmemc__ #define kfspConfigEmemc(pGpu, pKernelFsp, offset, bAincw, bAincr) kfspConfigEmemc_DISPATCH(pGpu, pKernelFsp, offset, bAincw, bAincr) #define kfspConfigEmemc_HAL(pGpu, pKernelFsp, offset, bAincw, bAincr) kfspConfigEmemc_DISPATCH(pGpu, pKernelFsp, offset, bAincw, bAincr) +#define kfspUpdateQueueHeadTail_FNPTR(pKernelFsp) pKernelFsp->__kfspUpdateQueueHeadTail__ #define kfspUpdateQueueHeadTail(pGpu, pKernelFsp, queueHead, queueTail) kfspUpdateQueueHeadTail_DISPATCH(pGpu, pKernelFsp, queueHead, queueTail) #define kfspUpdateQueueHeadTail_HAL(pGpu, pKernelFsp, queueHead, queueTail) kfspUpdateQueueHeadTail_DISPATCH(pGpu, pKernelFsp, queueHead, queueTail) +#define kfspGetQueueHeadTail_FNPTR(pKernelFsp) pKernelFsp->__kfspGetQueueHeadTail__ #define kfspGetQueueHeadTail(pGpu, pKernelFsp, pQueueHead, pQueueTail) kfspGetQueueHeadTail_DISPATCH(pGpu, pKernelFsp, pQueueHead, pQueueTail) #define kfspGetQueueHeadTail_HAL(pGpu, pKernelFsp, pQueueHead, pQueueTail) kfspGetQueueHeadTail_DISPATCH(pGpu, pKernelFsp, pQueueHead, pQueueTail) +#define kfspUpdateMsgQueueHeadTail_FNPTR(pKernelFsp) pKernelFsp->__kfspUpdateMsgQueueHeadTail__ #define kfspUpdateMsgQueueHeadTail(pGpu, pKernelFsp, msgqHead, msgqTail) kfspUpdateMsgQueueHeadTail_DISPATCH(pGpu, pKernelFsp, msgqHead, msgqTail) #define kfspUpdateMsgQueueHeadTail_HAL(pGpu, pKernelFsp, msgqHead, msgqTail) kfspUpdateMsgQueueHeadTail_DISPATCH(pGpu, pKernelFsp, msgqHead, msgqTail) +#define kfspGetMsgQueueHeadTail_FNPTR(pKernelFsp) pKernelFsp->__kfspGetMsgQueueHeadTail__ #define kfspGetMsgQueueHeadTail(pGpu, pKernelFsp, pMsgqHead, pMsgqTail) kfspGetMsgQueueHeadTail_DISPATCH(pGpu, pKernelFsp, pMsgqHead, pMsgqTail) #define kfspGetMsgQueueHeadTail_HAL(pGpu, pKernelFsp, pMsgqHead, pMsgqTail) kfspGetMsgQueueHeadTail_DISPATCH(pGpu, pKernelFsp, pMsgqHead, pMsgqTail) +#define kfspNvdmToSeid_FNPTR(pKernelFsp) pKernelFsp->__kfspNvdmToSeid__ #define kfspNvdmToSeid(pGpu, pKernelFsp, nvdmType) kfspNvdmToSeid_DISPATCH(pGpu, pKernelFsp, nvdmType) #define kfspNvdmToSeid_HAL(pGpu, pKernelFsp, nvdmType) kfspNvdmToSeid_DISPATCH(pGpu, pKernelFsp, nvdmType) +#define kfspCreateMctpHeader_FNPTR(pKernelFsp) pKernelFsp->__kfspCreateMctpHeader__ #define kfspCreateMctpHeader(pGpu, pKernelFsp, som, eom, seid, seq) kfspCreateMctpHeader_DISPATCH(pGpu, pKernelFsp, som, eom, seid, seq) #define kfspCreateMctpHeader_HAL(pGpu, pKernelFsp, som, eom, seid, seq) kfspCreateMctpHeader_DISPATCH(pGpu, pKernelFsp, som, eom, seid, seq) +#define kfspCreateNvdmHeader_FNPTR(pKernelFsp) pKernelFsp->__kfspCreateNvdmHeader__ #define kfspCreateNvdmHeader(pGpu, pKernelFsp, nvdmType) kfspCreateNvdmHeader_DISPATCH(pGpu, pKernelFsp, nvdmType) #define kfspCreateNvdmHeader_HAL(pGpu, pKernelFsp, nvdmType) kfspCreateNvdmHeader_DISPATCH(pGpu, pKernelFsp, nvdmType) +#define kfspWriteToEmem_FNPTR(pKernelFsp) pKernelFsp->__kfspWriteToEmem__ #define kfspWriteToEmem(pGpu, pKernelFsp, pBuffer, size) kfspWriteToEmem_DISPATCH(pGpu, pKernelFsp, pBuffer, size) #define kfspWriteToEmem_HAL(pGpu, pKernelFsp, pBuffer, size) kfspWriteToEmem_DISPATCH(pGpu, pKernelFsp, pBuffer, size) +#define kfspReadFromEmem_FNPTR(pKernelFsp) pKernelFsp->__kfspReadFromEmem__ #define kfspReadFromEmem(pGpu, pKernelFsp, pBuffer, size) kfspReadFromEmem_DISPATCH(pGpu, pKernelFsp, pBuffer, size) #define kfspReadFromEmem_HAL(pGpu, pKernelFsp, pBuffer, size) kfspReadFromEmem_DISPATCH(pGpu, pKernelFsp, pBuffer, size) +#define kfspGetPacketInfo_FNPTR(pKernelFsp) pKernelFsp->__kfspGetPacketInfo__ #define kfspGetPacketInfo(pGpu, pKernelFsp, pBuffer, size, pPacketState, pTag) kfspGetPacketInfo_DISPATCH(pGpu, pKernelFsp, pBuffer, size, pPacketState, pTag) #define kfspGetPacketInfo_HAL(pGpu, pKernelFsp, pBuffer, size, pPacketState, pTag) kfspGetPacketInfo_DISPATCH(pGpu, pKernelFsp, pBuffer, size, pPacketState, pTag) +#define kfspValidateMctpPayloadHeader_FNPTR(pKernelFsp) pKernelFsp->__kfspValidateMctpPayloadHeader__ #define kfspValidateMctpPayloadHeader(pGpu, pKernelFsp, pBuffer, size) kfspValidateMctpPayloadHeader_DISPATCH(pGpu, pKernelFsp, pBuffer, size) #define kfspValidateMctpPayloadHeader_HAL(pGpu, pKernelFsp, pBuffer, size) kfspValidateMctpPayloadHeader_DISPATCH(pGpu, pKernelFsp, pBuffer, size) +#define kfspProcessNvdmMessage_FNPTR(pKernelFsp) pKernelFsp->__kfspProcessNvdmMessage__ #define kfspProcessNvdmMessage(pGpu, pKernelFsp, pBuffer, size) kfspProcessNvdmMessage_DISPATCH(pGpu, pKernelFsp, pBuffer, size) #define kfspProcessNvdmMessage_HAL(pGpu, pKernelFsp, pBuffer, size) kfspProcessNvdmMessage_DISPATCH(pGpu, pKernelFsp, pBuffer, size) +#define kfspProcessCommandResponse_FNPTR(pKernelFsp) pKernelFsp->__kfspProcessCommandResponse__ #define kfspProcessCommandResponse(pGpu, pKernelFsp, pBuffer, size) kfspProcessCommandResponse_DISPATCH(pGpu, pKernelFsp, pBuffer, size) #define kfspProcessCommandResponse_HAL(pGpu, pKernelFsp, pBuffer, size) kfspProcessCommandResponse_DISPATCH(pGpu, pKernelFsp, pBuffer, size) +#define kfspDumpDebugState_FNPTR(pKernelFsp) pKernelFsp->__kfspDumpDebugState__ #define kfspDumpDebugState(pGpu, pKernelFsp) kfspDumpDebugState_DISPATCH(pGpu, pKernelFsp) #define kfspDumpDebugState_HAL(pGpu, pKernelFsp) kfspDumpDebugState_DISPATCH(pGpu, pKernelFsp) +#define kfspErrorCode2NvStatusMap_FNPTR(pKernelFsp) pKernelFsp->__kfspErrorCode2NvStatusMap__ #define kfspErrorCode2NvStatusMap(pGpu, pKernelFsp, errorCode) kfspErrorCode2NvStatusMap_DISPATCH(pGpu, pKernelFsp, errorCode) #define kfspErrorCode2NvStatusMap_HAL(pGpu, pKernelFsp, errorCode) kfspErrorCode2NvStatusMap_DISPATCH(pGpu, pKernelFsp, errorCode) +#define kfspGetExtraReservedMemorySize_FNPTR(pKernelFsp) pKernelFsp->__kfspGetExtraReservedMemorySize__ #define kfspGetExtraReservedMemorySize(pGpu, pKernelFsp) kfspGetExtraReservedMemorySize_DISPATCH(pGpu, pKernelFsp) #define kfspGetExtraReservedMemorySize_HAL(pGpu, pKernelFsp) kfspGetExtraReservedMemorySize_DISPATCH(pGpu, pKernelFsp) +#define kfspCheckGspSecureScratch_FNPTR(pKernelFsp) pKernelFsp->__kfspCheckGspSecureScratch__ #define kfspCheckGspSecureScratch(pGpu, pKernelFsp) kfspCheckGspSecureScratch_DISPATCH(pGpu, pKernelFsp) #define kfspCheckGspSecureScratch_HAL(pGpu, pKernelFsp) kfspCheckGspSecureScratch_DISPATCH(pGpu, pKernelFsp) +#define kfspWaitForGspTargetMaskReleased_FNPTR(pKernelFsp) pKernelFsp->__kfspWaitForGspTargetMaskReleased__ #define kfspWaitForGspTargetMaskReleased(pGpu, pKernelFsp) kfspWaitForGspTargetMaskReleased_DISPATCH(pGpu, pKernelFsp) #define kfspWaitForGspTargetMaskReleased_HAL(pGpu, pKernelFsp) kfspWaitForGspTargetMaskReleased_DISPATCH(pGpu, pKernelFsp) +#define kfspRequiresBug3957833WAR_FNPTR(pKernelFsp) pKernelFsp->__kfspRequiresBug3957833WAR__ #define kfspRequiresBug3957833WAR(pGpu, pKernelFsp) kfspRequiresBug3957833WAR_DISPATCH(pGpu, pKernelFsp) #define kfspRequiresBug3957833WAR_HAL(pGpu, pKernelFsp) kfspRequiresBug3957833WAR_DISPATCH(pGpu, pKernelFsp) +#define kfspFrtsSysmemLocationProgram_FNPTR(pKernelFsp) pKernelFsp->__kfspFrtsSysmemLocationProgram__ #define kfspFrtsSysmemLocationProgram(pGpu, pKernelFsp) kfspFrtsSysmemLocationProgram_DISPATCH(pGpu, pKernelFsp) #define kfspFrtsSysmemLocationProgram_HAL(pGpu, pKernelFsp) kfspFrtsSysmemLocationProgram_DISPATCH(pGpu, pKernelFsp) +#define kfspFrtsSysmemLocationClear_FNPTR(pKernelFsp) pKernelFsp->__kfspFrtsSysmemLocationClear__ #define kfspFrtsSysmemLocationClear(pGpu, pKernelFsp) kfspFrtsSysmemLocationClear_DISPATCH(pGpu, pKernelFsp) #define kfspFrtsSysmemLocationClear_HAL(pGpu, pKernelFsp) kfspFrtsSysmemLocationClear_DISPATCH(pGpu, pKernelFsp) -#define kfspStateLoad(pGpu, pEngstate, arg0) kfspStateLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kfspStateUnload(pGpu, pEngstate, arg0) kfspStateUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kfspStateInitLocked(pGpu, pEngstate) kfspStateInitLocked_DISPATCH(pGpu, pEngstate) -#define kfspStatePreLoad(pGpu, pEngstate, arg0) kfspStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kfspStatePostUnload(pGpu, pEngstate, arg0) kfspStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kfspStatePreUnload(pGpu, pEngstate, arg0) kfspStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kfspStateInitUnlocked(pGpu, pEngstate) kfspStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kfspInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define kfspInitMissing(pGpu, pEngstate) kfspInitMissing_DISPATCH(pGpu, pEngstate) +#define kfspStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define kfspStatePreInitLocked(pGpu, pEngstate) kfspStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define kfspStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define kfspStatePreInitUnlocked(pGpu, pEngstate) kfspStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kfspStatePostLoad(pGpu, pEngstate, arg0) kfspStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) +#define kfspStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define kfspStateInitLocked(pGpu, pEngstate) kfspStateInitLocked_DISPATCH(pGpu, pEngstate) +#define kfspStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kfspStateInitUnlocked(pGpu, pEngstate) kfspStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kfspStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kfspStatePreLoad(pGpu, pEngstate, arg3) kfspStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kfspStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define kfspStateLoad(pGpu, pEngstate, arg3) kfspStateLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kfspStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kfspStatePostLoad(pGpu, pEngstate, arg3) kfspStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kfspStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kfspStatePreUnload(pGpu, pEngstate, arg3) kfspStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kfspStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define kfspStateUnload(pGpu, pEngstate, arg3) kfspStateUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kfspStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kfspStatePostUnload(pGpu, pEngstate, arg3) kfspStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kfspIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define kfspIsPresent(pGpu, pEngstate) kfspIsPresent_DISPATCH(pGpu, pEngstate) -NV_STATUS kfspConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, ENGDESCRIPTOR arg0); -static inline NV_STATUS kfspConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, ENGDESCRIPTOR arg0) { - return pKernelFsp->__kfspConstructEngine__(pGpu, pKernelFsp, arg0); +// Dispatch functions +static inline NV_STATUS kfspConstructEngine_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, ENGDESCRIPTOR arg3) { + return pKernelFsp->__kfspConstructEngine__(pGpu, pKernelFsp, arg3); } -void kfspCleanupBootState_IMPL(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp); - -static inline void kfspCleanupBootState_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - pKernelFsp->__kfspCleanupBootState__(pGpu, pKernelFsp); -} - -void kfspStateDestroy_IMPL(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp); - -static inline void kfspStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { +static inline void kfspStateDestroy_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { pKernelFsp->__kfspStateDestroy__(pGpu, pKernelFsp); } -void kfspSecureReset_IMPL(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp); +static inline NV_STATUS kfspSendAndReadMessageAsync_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPayload, NvU32 size, NvU32 nvdmType, NvU8 *pResponsePayload, NvU32 responseBufferSize, AsyncRpcCallback callback, void *pCallbackArgs) { + return pKernelFsp->__kfspSendAndReadMessageAsync__(pGpu, pKernelFsp, pPayload, size, nvdmType, pResponsePayload, responseBufferSize, callback, pCallbackArgs); +} -static inline void kfspSecureReset_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - pKernelFsp->__kfspSecureReset__(pGpu, pKernelFsp); +static inline NvBool kfspGspFmcIsEnforced_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return pKernelFsp->__kfspGspFmcIsEnforced__(pGpu, pKernelFsp); } -NV_STATUS kfspSendPacket_IMPL(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPacket, NvU32 packetSize); +static inline NV_STATUS kfspPrepareBootCommands_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return pKernelFsp->__kfspPrepareBootCommands__(pGpu, pKernelFsp); +} -static inline NV_STATUS kfspSendPacket_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPacket, NvU32 packetSize) { - return pKernelFsp->__kfspSendPacket__(pGpu, pKernelFsp, pPacket, packetSize); +static inline NV_STATUS kfspSendBootCommands_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return pKernelFsp->__kfspSendBootCommands__(pGpu, pKernelFsp); } -NV_STATUS kfspSendAndReadMessage_IMPL(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPayload, NvU32 size, NvU32 nvdmType, NvU8 *pResponsePayload, NvU32 responseBufferSize); +static inline NV_STATUS kfspPrepareAndSendBootCommands_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return pKernelFsp->__kfspPrepareAndSendBootCommands__(pGpu, pKernelFsp); +} -static inline NV_STATUS kfspSendAndReadMessage_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPayload, NvU32 size, NvU32 nvdmType, NvU8 *pResponsePayload, NvU32 responseBufferSize) { - return pKernelFsp->__kfspSendAndReadMessage__(pGpu, pKernelFsp, pPayload, size, nvdmType, pResponsePayload, responseBufferSize); +static inline NV_STATUS kfspWaitForSecureBoot_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return pKernelFsp->__kfspWaitForSecureBoot__(pGpu, pKernelFsp); } -NvBool kfspIsQueueEmpty_IMPL(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp); +static inline NvU32 kfspGetRmChannelSize_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return pKernelFsp->__kfspGetRmChannelSize__(pGpu, pKernelFsp); +} -static inline NvBool kfspIsQueueEmpty_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return pKernelFsp->__kfspIsQueueEmpty__(pGpu, pKernelFsp); +static inline NV_STATUS kfspConfigEmemc_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 offset, NvBool bAincw, NvBool bAincr) { + return pKernelFsp->__kfspConfigEmemc__(pGpu, pKernelFsp, offset, bAincw, bAincr); } -NV_STATUS kfspPollForQueueEmpty_IMPL(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp); +static inline void kfspUpdateQueueHeadTail_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 queueHead, NvU32 queueTail) { + pKernelFsp->__kfspUpdateQueueHeadTail__(pGpu, pKernelFsp, queueHead, queueTail); +} -static inline NV_STATUS kfspPollForQueueEmpty_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return pKernelFsp->__kfspPollForQueueEmpty__(pGpu, pKernelFsp); +static inline void kfspGetQueueHeadTail_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 *pQueueHead, NvU32 *pQueueTail) { + pKernelFsp->__kfspGetQueueHeadTail__(pGpu, pKernelFsp, pQueueHead, pQueueTail); } -NvBool kfspIsMsgQueueEmpty_IMPL(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp); +static inline void kfspUpdateMsgQueueHeadTail_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 msgqHead, NvU32 msgqTail) { + pKernelFsp->__kfspUpdateMsgQueueHeadTail__(pGpu, pKernelFsp, msgqHead, msgqTail); +} -static inline NvBool kfspIsMsgQueueEmpty_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return pKernelFsp->__kfspIsMsgQueueEmpty__(pGpu, pKernelFsp); +static inline void kfspGetMsgQueueHeadTail_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 *pMsgqHead, NvU32 *pMsgqTail) { + pKernelFsp->__kfspGetMsgQueueHeadTail__(pGpu, pKernelFsp, pMsgqHead, pMsgqTail); } -NV_STATUS kfspPollForResponse_IMPL(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp); +static inline NvU8 kfspNvdmToSeid_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 nvdmType) { + return pKernelFsp->__kfspNvdmToSeid__(pGpu, pKernelFsp, nvdmType); +} -static inline NV_STATUS kfspPollForResponse_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return pKernelFsp->__kfspPollForResponse__(pGpu, pKernelFsp); +static inline NvU32 kfspCreateMctpHeader_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 som, NvU8 eom, NvU8 seid, NvU8 seq) { + return pKernelFsp->__kfspCreateMctpHeader__(pGpu, pKernelFsp, som, eom, seid, seq); } -NvBool kfspGspFmcIsEnforced_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp); +static inline NvU32 kfspCreateNvdmHeader_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 nvdmType) { + return pKernelFsp->__kfspCreateNvdmHeader__(pGpu, pKernelFsp, nvdmType); +} -static inline NvBool kfspGspFmcIsEnforced_491d52(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return ((NvBool)(0 != 0)); +static inline NV_STATUS kfspWriteToEmem_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { + return pKernelFsp->__kfspWriteToEmem__(pGpu, pKernelFsp, pBuffer, size); } -static inline NvBool kfspGspFmcIsEnforced_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return pKernelFsp->__kfspGspFmcIsEnforced__(pGpu, pKernelFsp); +static inline NV_STATUS kfspReadFromEmem_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { + return pKernelFsp->__kfspReadFromEmem__(pGpu, pKernelFsp, pBuffer, size); } -NV_STATUS kfspPrepareBootCommands_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp); +static inline NV_STATUS kfspGetPacketInfo_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size, MCTP_PACKET_STATE *pPacketState, NvU8 *pTag) { + return pKernelFsp->__kfspGetPacketInfo__(pGpu, pKernelFsp, pBuffer, size, pPacketState, pTag); +} -static inline NV_STATUS kfspPrepareBootCommands_ac1694(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return NV_OK; +static inline NV_STATUS kfspValidateMctpPayloadHeader_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { + return pKernelFsp->__kfspValidateMctpPayloadHeader__(pGpu, pKernelFsp, pBuffer, size); } -static inline NV_STATUS kfspPrepareBootCommands_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return pKernelFsp->__kfspPrepareBootCommands__(pGpu, pKernelFsp); +static inline NV_STATUS kfspProcessNvdmMessage_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { + return pKernelFsp->__kfspProcessNvdmMessage__(pGpu, pKernelFsp, pBuffer, size); } -NV_STATUS kfspSendBootCommands_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp); +static inline NV_STATUS kfspProcessCommandResponse_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { + return pKernelFsp->__kfspProcessCommandResponse__(pGpu, pKernelFsp, pBuffer, size); +} -static inline NV_STATUS kfspSendBootCommands_ac1694(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return NV_OK; +static inline void kfspDumpDebugState_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + pKernelFsp->__kfspDumpDebugState__(pGpu, pKernelFsp); } -static inline NV_STATUS kfspSendBootCommands_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return pKernelFsp->__kfspSendBootCommands__(pGpu, pKernelFsp); +static inline NV_STATUS kfspErrorCode2NvStatusMap_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 errorCode) { + return pKernelFsp->__kfspErrorCode2NvStatusMap__(pGpu, pKernelFsp, errorCode); } -NV_STATUS kfspPrepareAndSendBootCommands_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp); +static inline NvU64 kfspGetExtraReservedMemorySize_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return pKernelFsp->__kfspGetExtraReservedMemorySize__(pGpu, pKernelFsp); +} -static inline NV_STATUS kfspPrepareAndSendBootCommands_ac1694(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return NV_OK; +static inline NvBool kfspCheckGspSecureScratch_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return pKernelFsp->__kfspCheckGspSecureScratch__(pGpu, pKernelFsp); } -static inline NV_STATUS kfspPrepareAndSendBootCommands_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return pKernelFsp->__kfspPrepareAndSendBootCommands__(pGpu, pKernelFsp); +static inline NV_STATUS kfspWaitForGspTargetMaskReleased_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return pKernelFsp->__kfspWaitForGspTargetMaskReleased__(pGpu, pKernelFsp); } -NV_STATUS kfspWaitForSecureBoot_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp); +static inline NvBool kfspRequiresBug3957833WAR_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return pKernelFsp->__kfspRequiresBug3957833WAR__(pGpu, pKernelFsp); +} -static inline NV_STATUS kfspWaitForSecureBoot_395e98(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kfspFrtsSysmemLocationProgram_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return pKernelFsp->__kfspFrtsSysmemLocationProgram__(pGpu, pKernelFsp); } -static inline NV_STATUS kfspWaitForSecureBoot_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return pKernelFsp->__kfspWaitForSecureBoot__(pGpu, pKernelFsp); +static inline void kfspFrtsSysmemLocationClear_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + pKernelFsp->__kfspFrtsSysmemLocationClear__(pGpu, pKernelFsp); } -NvU32 kfspGetRmChannelSize_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp); +static inline void kfspInitMissing_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate) { + pEngstate->__kfspInitMissing__(pGpu, pEngstate); +} -static inline NvU32 kfspGetRmChannelSize_b2b553(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return 0; +static inline NV_STATUS kfspStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate) { + return pEngstate->__kfspStatePreInitLocked__(pGpu, pEngstate); } -static inline NvU32 kfspGetRmChannelSize_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return pKernelFsp->__kfspGetRmChannelSize__(pGpu, pKernelFsp); +static inline NV_STATUS kfspStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate) { + return pEngstate->__kfspStatePreInitUnlocked__(pGpu, pEngstate); } -NV_STATUS kfspConfigEmemc_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 offset, NvBool bAincw, NvBool bAincr); +static inline NV_STATUS kfspStateInitLocked_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate) { + return pEngstate->__kfspStateInitLocked__(pGpu, pEngstate); +} -static inline NV_STATUS kfspConfigEmemc_395e98(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 offset, NvBool bAincw, NvBool bAincr) { - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kfspStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate) { + return pEngstate->__kfspStateInitUnlocked__(pGpu, pEngstate); } -static inline NV_STATUS kfspConfigEmemc_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 offset, NvBool bAincw, NvBool bAincr) { - return pKernelFsp->__kfspConfigEmemc__(pGpu, pKernelFsp, offset, bAincw, bAincr); +static inline NV_STATUS kfspStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { + return pEngstate->__kfspStatePreLoad__(pGpu, pEngstate, arg3); } -void kfspUpdateQueueHeadTail_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 queueHead, NvU32 queueTail); +static inline NV_STATUS kfspStateLoad_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { + return pEngstate->__kfspStateLoad__(pGpu, pEngstate, arg3); +} -static inline void kfspUpdateQueueHeadTail_d44104(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 queueHead, NvU32 queueTail) { - return; +static inline NV_STATUS kfspStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { + return pEngstate->__kfspStatePostLoad__(pGpu, pEngstate, arg3); } -static inline void kfspUpdateQueueHeadTail_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 queueHead, NvU32 queueTail) { - pKernelFsp->__kfspUpdateQueueHeadTail__(pGpu, pKernelFsp, queueHead, queueTail); +static inline NV_STATUS kfspStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { + return pEngstate->__kfspStatePreUnload__(pGpu, pEngstate, arg3); } -void kfspGetQueueHeadTail_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 *pQueueHead, NvU32 *pQueueTail); +static inline NV_STATUS kfspStateUnload_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { + return pEngstate->__kfspStateUnload__(pGpu, pEngstate, arg3); +} -static inline void kfspGetQueueHeadTail_d44104(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 *pQueueHead, NvU32 *pQueueTail) { - return; +static inline NV_STATUS kfspStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { + return pEngstate->__kfspStatePostUnload__(pGpu, pEngstate, arg3); } -static inline void kfspGetQueueHeadTail_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 *pQueueHead, NvU32 *pQueueTail) { - pKernelFsp->__kfspGetQueueHeadTail__(pGpu, pKernelFsp, pQueueHead, pQueueTail); +static inline NvBool kfspIsPresent_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate) { + return pEngstate->__kfspIsPresent__(pGpu, pEngstate); } -void kfspUpdateMsgQueueHeadTail_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 msgqHead, NvU32 msgqTail); +NV_STATUS kfspConstructEngine_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, ENGDESCRIPTOR arg3); -static inline void kfspUpdateMsgQueueHeadTail_d44104(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 msgqHead, NvU32 msgqTail) { - return; -} +void kfspStateDestroy_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); -static inline void kfspUpdateMsgQueueHeadTail_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 msgqHead, NvU32 msgqTail) { - pKernelFsp->__kfspUpdateMsgQueueHeadTail__(pGpu, pKernelFsp, msgqHead, msgqTail); -} +NV_STATUS kfspSendAndReadMessageAsync_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPayload, NvU32 size, NvU32 nvdmType, NvU8 *pResponsePayload, NvU32 responseBufferSize, AsyncRpcCallback callback, void *pCallbackArgs); -void kfspGetMsgQueueHeadTail_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 *pMsgqHead, NvU32 *pMsgqTail); +NvBool kfspGspFmcIsEnforced_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); -static inline void kfspGetMsgQueueHeadTail_d44104(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 *pMsgqHead, NvU32 *pMsgqTail) { - return; +static inline NvBool kfspGspFmcIsEnforced_491d52(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return ((NvBool)(0 != 0)); } -static inline void kfspGetMsgQueueHeadTail_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 *pMsgqHead, NvU32 *pMsgqTail) { - pKernelFsp->__kfspGetMsgQueueHeadTail__(pGpu, pKernelFsp, pMsgqHead, pMsgqTail); +NV_STATUS kfspPrepareBootCommands_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); + +static inline NV_STATUS kfspPrepareBootCommands_ac1694(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return NV_OK; } -NvU8 kfspNvdmToSeid_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 nvdmType); +NV_STATUS kfspSendBootCommands_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); -static inline NvU8 kfspNvdmToSeid_b2b553(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 nvdmType) { - return 0; +static inline NV_STATUS kfspSendBootCommands_ac1694(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return NV_OK; } -static inline NvU8 kfspNvdmToSeid_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 nvdmType) { - return pKernelFsp->__kfspNvdmToSeid__(pGpu, pKernelFsp, nvdmType); +NV_STATUS kfspPrepareAndSendBootCommands_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); + +static inline NV_STATUS kfspPrepareAndSendBootCommands_ac1694(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return NV_OK; } -NvU32 kfspCreateMctpHeader_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 som, NvU8 eom, NvU8 seid, NvU8 seq); +NV_STATUS kfspWaitForSecureBoot_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); -static inline NvU32 kfspCreateMctpHeader_b2b553(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 som, NvU8 eom, NvU8 seid, NvU8 seq) { - return 0; +static inline NV_STATUS kfspWaitForSecureBoot_46f6a7(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return NV_ERR_NOT_SUPPORTED; } -static inline NvU32 kfspCreateMctpHeader_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 som, NvU8 eom, NvU8 seid, NvU8 seq) { - return pKernelFsp->__kfspCreateMctpHeader__(pGpu, pKernelFsp, som, eom, seid, seq); +NvU32 kfspGetRmChannelSize_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); + +static inline NvU32 kfspGetRmChannelSize_b2b553(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return 0; } -NvU32 kfspCreateNvdmHeader_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 nvdmType); +NV_STATUS kfspConfigEmemc_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 offset, NvBool bAincw, NvBool bAincr); -static inline NvU32 kfspCreateNvdmHeader_b2b553(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 nvdmType) { - return 0; +static inline NV_STATUS kfspConfigEmemc_395e98(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 offset, NvBool bAincw, NvBool bAincr) { + return NV_ERR_NOT_SUPPORTED; } -static inline NvU32 kfspCreateNvdmHeader_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 nvdmType) { - return pKernelFsp->__kfspCreateNvdmHeader__(pGpu, pKernelFsp, nvdmType); +void kfspUpdateQueueHeadTail_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 queueHead, NvU32 queueTail); + +static inline void kfspUpdateQueueHeadTail_d44104(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 queueHead, NvU32 queueTail) { + return; } -NV_STATUS kfspWriteToEmem_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size); +void kfspGetQueueHeadTail_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 *pQueueHead, NvU32 *pQueueTail); -static inline NV_STATUS kfspWriteToEmem_395e98(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { - return NV_ERR_NOT_SUPPORTED; +static inline void kfspGetQueueHeadTail_d44104(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 *pQueueHead, NvU32 *pQueueTail) { + return; } -static inline NV_STATUS kfspWriteToEmem_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { - return pKernelFsp->__kfspWriteToEmem__(pGpu, pKernelFsp, pBuffer, size); +void kfspUpdateMsgQueueHeadTail_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 msgqHead, NvU32 msgqTail); + +static inline void kfspUpdateMsgQueueHeadTail_d44104(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 msgqHead, NvU32 msgqTail) { + return; } -NV_STATUS kfspReadFromEmem_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size); +void kfspGetMsgQueueHeadTail_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 *pMsgqHead, NvU32 *pMsgqTail); -static inline NV_STATUS kfspReadFromEmem_395e98(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { - return NV_ERR_NOT_SUPPORTED; +static inline void kfspGetMsgQueueHeadTail_d44104(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 *pMsgqHead, NvU32 *pMsgqTail) { + return; } -static inline NV_STATUS kfspReadFromEmem_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { - return pKernelFsp->__kfspReadFromEmem__(pGpu, pKernelFsp, pBuffer, size); +NvU8 kfspNvdmToSeid_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 nvdmType); + +static inline NvU8 kfspNvdmToSeid_b2b553(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 nvdmType) { + return 0; } -NV_STATUS kfspGetPacketInfo_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size, MCTP_PACKET_STATE *pPacketState, NvU8 *pTag); +NvU32 kfspCreateMctpHeader_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 som, NvU8 eom, NvU8 seid, NvU8 seq); -static inline NV_STATUS kfspGetPacketInfo_395e98(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size, MCTP_PACKET_STATE *pPacketState, NvU8 *pTag) { - return NV_ERR_NOT_SUPPORTED; +static inline NvU32 kfspCreateMctpHeader_b2b553(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 som, NvU8 eom, NvU8 seid, NvU8 seq) { + return 0; } -static inline NV_STATUS kfspGetPacketInfo_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size, MCTP_PACKET_STATE *pPacketState, NvU8 *pTag) { - return pKernelFsp->__kfspGetPacketInfo__(pGpu, pKernelFsp, pBuffer, size, pPacketState, pTag); +NvU32 kfspCreateNvdmHeader_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 nvdmType); + +static inline NvU32 kfspCreateNvdmHeader_b2b553(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 nvdmType) { + return 0; } -NV_STATUS kfspValidateMctpPayloadHeader_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size); +NV_STATUS kfspWriteToEmem_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size); -static inline NV_STATUS kfspValidateMctpPayloadHeader_395e98(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { +static inline NV_STATUS kfspWriteToEmem_395e98(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kfspValidateMctpPayloadHeader_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { - return pKernelFsp->__kfspValidateMctpPayloadHeader__(pGpu, pKernelFsp, pBuffer, size); +NV_STATUS kfspReadFromEmem_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size); + +static inline NV_STATUS kfspReadFromEmem_395e98(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { + return NV_ERR_NOT_SUPPORTED; } -NV_STATUS kfspProcessNvdmMessage_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size); +NV_STATUS kfspGetPacketInfo_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size, MCTP_PACKET_STATE *pPacketState, NvU8 *pTag); -static inline NV_STATUS kfspProcessNvdmMessage_395e98(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { +static inline NV_STATUS kfspGetPacketInfo_395e98(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size, MCTP_PACKET_STATE *pPacketState, NvU8 *pTag) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kfspProcessNvdmMessage_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { - return pKernelFsp->__kfspProcessNvdmMessage__(pGpu, pKernelFsp, pBuffer, size); +NV_STATUS kfspValidateMctpPayloadHeader_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size); + +static inline NV_STATUS kfspValidateMctpPayloadHeader_395e98(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { + return NV_ERR_NOT_SUPPORTED; } -NV_STATUS kfspProcessCommandResponse_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size); +NV_STATUS kfspProcessNvdmMessage_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size); -static inline NV_STATUS kfspProcessCommandResponse_395e98(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { +static inline NV_STATUS kfspProcessNvdmMessage_395e98(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kfspProcessCommandResponse_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { - return pKernelFsp->__kfspProcessCommandResponse__(pGpu, pKernelFsp, pBuffer, size); +NV_STATUS kfspProcessCommandResponse_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size); + +static inline NV_STATUS kfspProcessCommandResponse_395e98(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { + return NV_ERR_NOT_SUPPORTED; } -void kfspDumpDebugState_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp); +void kfspDumpDebugState_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); -static inline void kfspDumpDebugState_d44104(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { +static inline void kfspDumpDebugState_d44104(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { return; } -static inline void kfspDumpDebugState_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - pKernelFsp->__kfspDumpDebugState__(pGpu, pKernelFsp); -} +NV_STATUS kfspErrorCode2NvStatusMap_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 errorCode); -NV_STATUS kfspErrorCode2NvStatusMap_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 errorCode); - -static inline NV_STATUS kfspErrorCode2NvStatusMap_395e98(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 errorCode) { +static inline NV_STATUS kfspErrorCode2NvStatusMap_395e98(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 errorCode) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kfspErrorCode2NvStatusMap_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 errorCode) { - return pKernelFsp->__kfspErrorCode2NvStatusMap__(pGpu, pKernelFsp, errorCode); -} - -NvU64 kfspGetExtraReservedMemorySize_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp); +NvU64 kfspGetExtraReservedMemorySize_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); -static inline NvU64 kfspGetExtraReservedMemorySize_4a4dee(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { +static inline NvU64 kfspGetExtraReservedMemorySize_4a4dee(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { return 0; } -static inline NvU64 kfspGetExtraReservedMemorySize_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return pKernelFsp->__kfspGetExtraReservedMemorySize__(pGpu, pKernelFsp); -} - -NvBool kfspCheckGspSecureScratch_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp); +NvBool kfspCheckGspSecureScratch_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); -static inline NvBool kfspCheckGspSecureScratch_491d52(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { +static inline NvBool kfspCheckGspSecureScratch_491d52(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { return ((NvBool)(0 != 0)); } -static inline NvBool kfspCheckGspSecureScratch_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return pKernelFsp->__kfspCheckGspSecureScratch__(pGpu, pKernelFsp); -} - -NV_STATUS kfspWaitForGspTargetMaskReleased_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp); +NV_STATUS kfspWaitForGspTargetMaskReleased_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); -static inline NV_STATUS kfspWaitForGspTargetMaskReleased_395e98(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { +static inline NV_STATUS kfspWaitForGspTargetMaskReleased_395e98(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kfspWaitForGspTargetMaskReleased_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return pKernelFsp->__kfspWaitForGspTargetMaskReleased__(pGpu, pKernelFsp); -} - -NvBool kfspRequiresBug3957833WAR_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp); +NvBool kfspRequiresBug3957833WAR_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); -static inline NvBool kfspRequiresBug3957833WAR_491d52(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { +static inline NvBool kfspRequiresBug3957833WAR_491d52(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { return ((NvBool)(0 != 0)); } -static inline NvBool kfspRequiresBug3957833WAR_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return pKernelFsp->__kfspRequiresBug3957833WAR__(pGpu, pKernelFsp); -} +NV_STATUS kfspFrtsSysmemLocationProgram_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); -NV_STATUS kfspFrtsSysmemLocationProgram_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp); - -static inline NV_STATUS kfspFrtsSysmemLocationProgram_395e98(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { +static inline NV_STATUS kfspFrtsSysmemLocationProgram_395e98(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kfspFrtsSysmemLocationProgram_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return pKernelFsp->__kfspFrtsSysmemLocationProgram__(pGpu, pKernelFsp); -} - -void kfspFrtsSysmemLocationClear_GH100(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp); +void kfspFrtsSysmemLocationClear_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); -static inline void kfspFrtsSysmemLocationClear_d44104(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { +static inline void kfspFrtsSysmemLocationClear_d44104(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { return; } -static inline void kfspFrtsSysmemLocationClear_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - pKernelFsp->__kfspFrtsSysmemLocationClear__(pGpu, pKernelFsp); -} +void kfspCleanupBootState_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); -static inline NV_STATUS kfspStateLoad_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg0) { - return pEngstate->__kfspStateLoad__(pGpu, pEngstate, arg0); +#ifdef __nvoc_kern_fsp_h_disabled +static inline void kfspCleanupBootState(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + NV_ASSERT_FAILED_PRECOMP("KernelFsp was disabled!"); } +#else //__nvoc_kern_fsp_h_disabled +#define kfspCleanupBootState(pGpu, pKernelFsp) kfspCleanupBootState_IMPL(pGpu, pKernelFsp) +#endif //__nvoc_kern_fsp_h_disabled -static inline NV_STATUS kfspStateUnload_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg0) { - return pEngstate->__kfspStateUnload__(pGpu, pEngstate, arg0); -} +NV_STATUS kfspSendPacket_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPacket, NvU32 packetSize); -static inline NV_STATUS kfspStateInitLocked_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate) { - return pEngstate->__kfspStateInitLocked__(pGpu, pEngstate); +#ifdef __nvoc_kern_fsp_h_disabled +static inline NV_STATUS kfspSendPacket(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPacket, NvU32 packetSize) { + NV_ASSERT_FAILED_PRECOMP("KernelFsp was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kern_fsp_h_disabled +#define kfspSendPacket(pGpu, pKernelFsp, pPacket, packetSize) kfspSendPacket_IMPL(pGpu, pKernelFsp, pPacket, packetSize) +#endif //__nvoc_kern_fsp_h_disabled -static inline NV_STATUS kfspStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg0) { - return pEngstate->__kfspStatePreLoad__(pGpu, pEngstate, arg0); -} +NV_STATUS kfspSendAndReadMessage_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPayload, NvU32 size, NvU32 nvdmType, NvU8 *pResponsePayload, NvU32 responseBufferSize); -static inline NV_STATUS kfspStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg0) { - return pEngstate->__kfspStatePostUnload__(pGpu, pEngstate, arg0); +#ifdef __nvoc_kern_fsp_h_disabled +static inline NV_STATUS kfspSendAndReadMessage(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPayload, NvU32 size, NvU32 nvdmType, NvU8 *pResponsePayload, NvU32 responseBufferSize) { + NV_ASSERT_FAILED_PRECOMP("KernelFsp was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kern_fsp_h_disabled +#define kfspSendAndReadMessage(pGpu, pKernelFsp, pPayload, size, nvdmType, pResponsePayload, responseBufferSize) kfspSendAndReadMessage_IMPL(pGpu, pKernelFsp, pPayload, size, nvdmType, pResponsePayload, responseBufferSize) +#endif //__nvoc_kern_fsp_h_disabled -static inline NV_STATUS kfspStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg0) { - return pEngstate->__kfspStatePreUnload__(pGpu, pEngstate, arg0); -} +NvBool kfspIsQueueEmpty_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); -static inline NV_STATUS kfspStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate) { - return pEngstate->__kfspStateInitUnlocked__(pGpu, pEngstate); +#ifdef __nvoc_kern_fsp_h_disabled +static inline NvBool kfspIsQueueEmpty(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + NV_ASSERT_FAILED_PRECOMP("KernelFsp was disabled!"); + return NV_FALSE; } +#else //__nvoc_kern_fsp_h_disabled +#define kfspIsQueueEmpty(pGpu, pKernelFsp) kfspIsQueueEmpty_IMPL(pGpu, pKernelFsp) +#endif //__nvoc_kern_fsp_h_disabled -static inline void kfspInitMissing_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate) { - pEngstate->__kfspInitMissing__(pGpu, pEngstate); -} +NV_STATUS kfspPollForQueueEmpty_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); -static inline NV_STATUS kfspStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate) { - return pEngstate->__kfspStatePreInitLocked__(pGpu, pEngstate); +#ifdef __nvoc_kern_fsp_h_disabled +static inline NV_STATUS kfspPollForQueueEmpty(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + NV_ASSERT_FAILED_PRECOMP("KernelFsp was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kern_fsp_h_disabled +#define kfspPollForQueueEmpty(pGpu, pKernelFsp) kfspPollForQueueEmpty_IMPL(pGpu, pKernelFsp) +#endif //__nvoc_kern_fsp_h_disabled -static inline NV_STATUS kfspStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate) { - return pEngstate->__kfspStatePreInitUnlocked__(pGpu, pEngstate); -} +NvBool kfspIsMsgQueueEmpty_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); -static inline NV_STATUS kfspStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate, NvU32 arg0) { - return pEngstate->__kfspStatePostLoad__(pGpu, pEngstate, arg0); +#ifdef __nvoc_kern_fsp_h_disabled +static inline NvBool kfspIsMsgQueueEmpty(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + NV_ASSERT_FAILED_PRECOMP("KernelFsp was disabled!"); + return NV_FALSE; } +#else //__nvoc_kern_fsp_h_disabled +#define kfspIsMsgQueueEmpty(pGpu, pKernelFsp) kfspIsMsgQueueEmpty_IMPL(pGpu, pKernelFsp) +#endif //__nvoc_kern_fsp_h_disabled -static inline NvBool kfspIsPresent_DISPATCH(POBJGPU pGpu, struct KernelFsp *pEngstate) { - return pEngstate->__kfspIsPresent__(pGpu, pEngstate); +NV_STATUS kfspPollForResponse_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); + +#ifdef __nvoc_kern_fsp_h_disabled +static inline NV_STATUS kfspPollForResponse(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + NV_ASSERT_FAILED_PRECOMP("KernelFsp was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kern_fsp_h_disabled +#define kfspPollForResponse(pGpu, pKernelFsp) kfspPollForResponse_IMPL(pGpu, pKernelFsp) +#endif //__nvoc_kern_fsp_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_kern_gmmu_nvoc.c b/src/nvidia/generated/g_kern_gmmu_nvoc.c index 2cd3d2c191..0eef682e3a 100644 --- a/src/nvidia/generated/g_kern_gmmu_nvoc.c +++ b/src/nvidia/generated/g_kern_gmmu_nvoc.c @@ -75,78 +75,102 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGmmu = /*pExportInfo=*/ &__nvoc_export_info_KernelGmmu }; -static NV_STATUS __nvoc_thunk_KernelGmmu_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, ENGDESCRIPTOR arg0) { - return kgmmuConstructEngine(pGpu, (struct KernelGmmu *)(((unsigned char *)pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg0); +// 11 down-thunk(s) defined to bridge methods in KernelGmmu from superclasses + +// kgmmuConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, ENGDESCRIPTOR arg3) { + return kgmmuConstructEngine(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelGmmu_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu) { - return kgmmuStateInitLocked(pGpu, (struct KernelGmmu *)(((unsigned char *)pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); +// kgmmuStateInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu) { + return kgmmuStateInitLocked(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_KernelGmmu_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, NvU32 arg0) { - return kgmmuStateLoad(pGpu, (struct KernelGmmu *)(((unsigned char *)pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg0); +// kgmmuStateLoad: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, NvU32 arg3) { + return kgmmuStateLoad(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelGmmu_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, NvU32 arg0) { - return kgmmuStateUnload(pGpu, (struct KernelGmmu *)(((unsigned char *)pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg0); +// kgmmuStateUnload: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, NvU32 arg3) { + return kgmmuStateUnload(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelGmmu_engstateStatePostLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, NvU32 arg0) { - return kgmmuStatePostLoad(pGpu, (struct KernelGmmu *)(((unsigned char *)pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg0); +// kgmmuStatePostLoad: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateStatePostLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, NvU32 arg3) { + return kgmmuStatePostLoad(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelGmmu_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, NvU32 arg0) { - return kgmmuStatePreUnload(pGpu, (struct KernelGmmu *)(((unsigned char *)pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg0); +// kgmmuStatePreUnload: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, NvU32 arg3) { + return kgmmuStatePreUnload(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_KernelGmmu_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu) { - kgmmuStateDestroy(pGpu, (struct KernelGmmu *)(((unsigned char *)pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); +// kgmmuStateDestroy: virtual override (engstate) base (engstate) +static void __nvoc_down_thunk_KernelGmmu_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu) { + kgmmuStateDestroy(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); } -static void __nvoc_thunk_KernelGmmu_intrservRegisterIntrService(OBJGPU *pGpu, struct IntrService *pKernelGmmu, IntrServiceRecord arg0[171]) { - kgmmuRegisterIntrService(pGpu, (struct KernelGmmu *)(((unsigned char *)pKernelGmmu) - __nvoc_rtti_KernelGmmu_IntrService.offset), arg0); +// kgmmuRegisterIntrService: virtual override (intrserv) base (intrserv) +static void __nvoc_down_thunk_KernelGmmu_intrservRegisterIntrService(OBJGPU *pGpu, struct IntrService *pKernelGmmu, IntrServiceRecord arg3[175]) { + kgmmuRegisterIntrService(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_IntrService.offset), arg3); } -static NvBool __nvoc_thunk_KernelGmmu_intrservClearInterrupt(OBJGPU *pGpu, struct IntrService *pKernelGmmu, IntrServiceClearInterruptArguments *pParams) { - return kgmmuClearInterrupt(pGpu, (struct KernelGmmu *)(((unsigned char *)pKernelGmmu) - __nvoc_rtti_KernelGmmu_IntrService.offset), pParams); +// kgmmuClearInterrupt: virtual override (intrserv) base (intrserv) +static NvBool __nvoc_down_thunk_KernelGmmu_intrservClearInterrupt(OBJGPU *pGpu, struct IntrService *pKernelGmmu, IntrServiceClearInterruptArguments *pParams) { + return kgmmuClearInterrupt(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_IntrService.offset), pParams); } -static NvU32 __nvoc_thunk_KernelGmmu_intrservServiceInterrupt(OBJGPU *pGpu, struct IntrService *pKernelGmmu, IntrServiceServiceInterruptArguments *pParams) { - return kgmmuServiceInterrupt(pGpu, (struct KernelGmmu *)(((unsigned char *)pKernelGmmu) - __nvoc_rtti_KernelGmmu_IntrService.offset), pParams); +// kgmmuServiceInterrupt: virtual override (intrserv) base (intrserv) +static NvU32 __nvoc_down_thunk_KernelGmmu_intrservServiceInterrupt(OBJGPU *pGpu, struct IntrService *pKernelGmmu, IntrServiceServiceInterruptArguments *pParams) { + return kgmmuServiceInterrupt(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_IntrService.offset), pParams); } -static NV_STATUS __nvoc_thunk_KernelGmmu_intrservServiceNotificationInterrupt(OBJGPU *pGpu, struct IntrService *pKernelGmmu, IntrServiceServiceNotificationInterruptArguments *pParams) { - return kgmmuServiceNotificationInterrupt(pGpu, (struct KernelGmmu *)(((unsigned char *)pKernelGmmu) - __nvoc_rtti_KernelGmmu_IntrService.offset), pParams); +// kgmmuServiceNotificationInterrupt: virtual halified (singleton optimized) override (intrserv) base (intrserv) body +static NV_STATUS __nvoc_down_thunk_KernelGmmu_intrservServiceNotificationInterrupt(OBJGPU *pGpu, struct IntrService *pKernelGmmu, IntrServiceServiceNotificationInterruptArguments *pParams) { + return kgmmuServiceNotificationInterrupt(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_IntrService.offset), pParams); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgmmuStatePreLoad(POBJGPU pGpu, struct KernelGmmu *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg0); + +// 7 up-thunk(s) defined to bridge methods in KernelGmmu to superclasses + +// kgmmuInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kgmmuInitMissing(POBJGPU pGpu, struct KernelGmmu *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgmmuStatePostUnload(POBJGPU pGpu, struct KernelGmmu *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg0); +// kgmmuStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreInitLocked(POBJGPU pGpu, struct KernelGmmu *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgmmuStateInitUnlocked(POBJGPU pGpu, struct KernelGmmu *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); +// kgmmuStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreInitUnlocked(POBJGPU pGpu, struct KernelGmmu *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_kgmmuInitMissing(POBJGPU pGpu, struct KernelGmmu *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); +// kgmmuStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgmmuStateInitUnlocked(POBJGPU pGpu, struct KernelGmmu *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgmmuStatePreInitLocked(POBJGPU pGpu, struct KernelGmmu *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); +// kgmmuStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreLoad(POBJGPU pGpu, struct KernelGmmu *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgmmuStatePreInitUnlocked(POBJGPU pGpu, struct KernelGmmu *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); +// kgmmuStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgmmuStatePostUnload(POBJGPU pGpu, struct KernelGmmu *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg3); } -static NvBool __nvoc_thunk_OBJENGSTATE_kgmmuIsPresent(POBJGPU pGpu, struct KernelGmmu *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); +// kgmmuIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_kgmmuIsPresent(POBJGPU pGpu, struct KernelGmmu *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelGmmu = { /*numEntries=*/ 0, @@ -241,6 +265,7 @@ NV_STATUS __nvoc_ctor_KernelGmmu(KernelGmmu *pThis, RmHalspecOwner *pRmhalspecow return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -253,32 +278,51 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); + // kgmmuConstructEngine -- virtual override (engstate) base (engstate) pThis->__kgmmuConstructEngine__ = &kgmmuConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelGmmu_engstateConstructEngine; + // kgmmuStateInitLocked -- virtual override (engstate) base (engstate) pThis->__kgmmuStateInitLocked__ = &kgmmuStateInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelGmmu_engstateStateInitLocked; + // kgmmuStateLoad -- virtual override (engstate) base (engstate) pThis->__kgmmuStateLoad__ = &kgmmuStateLoad_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelGmmu_engstateStateLoad; + // kgmmuStateUnload -- virtual override (engstate) base (engstate) pThis->__kgmmuStateUnload__ = &kgmmuStateUnload_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelGmmu_engstateStateUnload; - // Hal function -- kgmmuStatePostLoad + // kgmmuStatePostLoad -- virtual halified (singleton optimized) override (engstate) base (engstate) body pThis->__kgmmuStatePostLoad__ = &kgmmuStatePostLoad_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelGmmu_engstateStatePostLoad; - // Hal function -- kgmmuStatePreUnload + // kgmmuStatePreUnload -- virtual halified (singleton optimized) override (engstate) base (engstate) body pThis->__kgmmuStatePreUnload__ = &kgmmuStatePreUnload_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_KernelGmmu_engstateStatePreUnload; + // kgmmuStateDestroy -- virtual override (engstate) base (engstate) pThis->__kgmmuStateDestroy__ = &kgmmuStateDestroy_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelGmmu_engstateStateDestroy; + // kgmmuRegisterIntrService -- virtual override (intrserv) base (intrserv) pThis->__kgmmuRegisterIntrService__ = &kgmmuRegisterIntrService_IMPL; + pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_KernelGmmu_intrservRegisterIntrService; + // kgmmuClearInterrupt -- virtual override (intrserv) base (intrserv) pThis->__kgmmuClearInterrupt__ = &kgmmuClearInterrupt_IMPL; + pThis->__nvoc_base_IntrService.__intrservClearInterrupt__ = &__nvoc_down_thunk_KernelGmmu_intrservClearInterrupt; + // kgmmuServiceInterrupt -- virtual override (intrserv) base (intrserv) pThis->__kgmmuServiceInterrupt__ = &kgmmuServiceInterrupt_IMPL; + pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_KernelGmmu_intrservServiceInterrupt; - // Hal function -- kgmmuServiceNotificationInterrupt + // kgmmuServiceNotificationInterrupt -- virtual halified (singleton optimized) override (intrserv) base (intrserv) body pThis->__kgmmuServiceNotificationInterrupt__ = &kgmmuServiceNotificationInterrupt_56cd7a; + pThis->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_down_thunk_KernelGmmu_intrservServiceNotificationInterrupt; - // Hal function -- kgmmuInstBlkVaLimitGet + // kgmmuInstBlkVaLimitGet -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kgmmuInstBlkVaLimitGet__ = &kgmmuInstBlkVaLimitGet_GV100; @@ -288,7 +332,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuInstBlkVaLimitGet__ = &kgmmuInstBlkVaLimitGet_f03539; } - // Hal function -- kgmmuSetTlbInvalidateMembarWarParameters + // kgmmuSetTlbInvalidateMembarWarParameters -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kgmmuSetTlbInvalidateMembarWarParameters__ = &kgmmuSetTlbInvalidateMembarWarParameters_TU102; @@ -298,7 +342,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuSetTlbInvalidateMembarWarParameters__ = &kgmmuSetTlbInvalidateMembarWarParameters_4a4dee; } - // Hal function -- kgmmuSetTlbInvalidationScope + // kgmmuSetTlbInvalidationScope -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kgmmuSetTlbInvalidationScope__ = &kgmmuSetTlbInvalidationScope_46f6a7; @@ -308,7 +352,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuSetTlbInvalidationScope__ = &kgmmuSetTlbInvalidationScope_GA100; } - // Hal function -- kgmmuFmtInitPteComptagLine + // kgmmuFmtInitPteComptagLine -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuFmtInitPteComptagLine__ = &kgmmuFmtInitPteComptagLine_b3696a; @@ -318,7 +362,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuFmtInitPteComptagLine__ = &kgmmuFmtInitPteComptagLine_TU10X; } - // Hal function -- kgmmuFmtInitPeerPteFld + // kgmmuFmtInitPeerPteFld -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuFmtInitPeerPteFld__ = &kgmmuFmtInitPeerPteFld_b3696a; @@ -328,7 +372,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuFmtInitPeerPteFld__ = &kgmmuFmtInitPeerPteFld_TU10X; } - // Hal function -- kgmmuFmtInitPte + // kgmmuFmtInitPte -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuFmtInitPte__ = &kgmmuFmtInitPte_GH10X; @@ -338,7 +382,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuFmtInitPte__ = &kgmmuFmtInitPte_GP10X; } - // Hal function -- kgmmuFmtInitPde + // kgmmuFmtInitPde -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuFmtInitPde__ = &kgmmuFmtInitPde_GH10X; @@ -348,7 +392,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuFmtInitPde__ = &kgmmuFmtInitPde_GP10X; } - // Hal function -- kgmmuFmtIsVersionSupported + // kgmmuFmtIsVersionSupported -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuFmtIsVersionSupported__ = &kgmmuFmtIsVersionSupported_GH10X; @@ -358,7 +402,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuFmtIsVersionSupported__ = &kgmmuFmtIsVersionSupported_GP10X; } - // Hal function -- kgmmuFmtInitLevels + // kgmmuFmtInitLevels -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuFmtInitLevels__ = &kgmmuFmtInitLevels_GH10X; @@ -372,7 +416,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuFmtInitLevels__ = &kgmmuFmtInitLevels_GA10X; } - // Hal function -- kgmmuFmtInitPdeMulti + // kgmmuFmtInitPdeMulti -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuFmtInitPdeMulti__ = &kgmmuFmtInitPdeMulti_GH10X; @@ -382,17 +426,17 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuFmtInitPdeMulti__ = &kgmmuFmtInitPdeMulti_GP10X; } - // Hal function -- kgmmuFmtFamiliesInit + // kgmmuFmtFamiliesInit -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuFmtFamiliesInit__ = &kgmmuFmtFamiliesInit_GH100; } else { - pThis->__kgmmuFmtFamiliesInit__ = &kgmmuFmtFamiliesInit_TU102; + pThis->__kgmmuFmtFamiliesInit__ = &kgmmuFmtFamiliesInit_GV100; } - // Hal function -- kgmmuTranslatePtePcfFromSw + // kgmmuTranslatePtePcfFromSw -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuTranslatePtePcfFromSw__ = &kgmmuTranslatePtePcfFromSw_GH100; @@ -402,7 +446,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuTranslatePtePcfFromSw__ = &kgmmuTranslatePtePcfFromSw_56cd7a; } - // Hal function -- kgmmuTranslatePtePcfFromHw + // kgmmuTranslatePtePcfFromHw -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuTranslatePtePcfFromHw__ = &kgmmuTranslatePtePcfFromHw_GH100; @@ -412,7 +456,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuTranslatePtePcfFromHw__ = &kgmmuTranslatePtePcfFromHw_56cd7a; } - // Hal function -- kgmmuTranslatePdePcfFromSw + // kgmmuTranslatePdePcfFromSw -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuTranslatePdePcfFromSw__ = &kgmmuTranslatePdePcfFromSw_GH100; @@ -422,7 +466,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuTranslatePdePcfFromSw__ = &kgmmuTranslatePdePcfFromSw_56cd7a; } - // Hal function -- kgmmuTranslatePdePcfFromHw + // kgmmuTranslatePdePcfFromHw -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuTranslatePdePcfFromHw__ = &kgmmuTranslatePdePcfFromHw_GH100; @@ -432,7 +476,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuTranslatePdePcfFromHw__ = &kgmmuTranslatePdePcfFromHw_56cd7a; } - // Hal function -- kgmmuGetFaultRegisterMappings + // kgmmuGetFaultRegisterMappings -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuGetFaultRegisterMappings__ = &kgmmuGetFaultRegisterMappings_GH100; @@ -442,7 +486,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuGetFaultRegisterMappings__ = &kgmmuGetFaultRegisterMappings_TU102; } - // Hal function -- kgmmuIssueReplayableFaultBufferFlush + // kgmmuIssueReplayableFaultBufferFlush -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuIssueReplayableFaultBufferFlush__ = &kgmmuIssueReplayableFaultBufferFlush_GH100; @@ -452,7 +496,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuIssueReplayableFaultBufferFlush__ = &kgmmuIssueReplayableFaultBufferFlush_46f6a7; } - // Hal function -- kgmmuToggleFaultOnPrefetch + // kgmmuToggleFaultOnPrefetch -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuToggleFaultOnPrefetch__ = &kgmmuToggleFaultOnPrefetch_GH100; @@ -462,7 +506,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuToggleFaultOnPrefetch__ = &kgmmuToggleFaultOnPrefetch_46f6a7; } - // Hal function -- kgmmuFaultBufferAllocSharedMemory + // kgmmuFaultBufferAllocSharedMemory -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuFaultBufferAllocSharedMemory__ = &kgmmuFaultBufferAllocSharedMemory_GH100; @@ -472,7 +516,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuFaultBufferAllocSharedMemory__ = &kgmmuFaultBufferAllocSharedMemory_56cd7a; } - // Hal function -- kgmmuFaultBufferFreeSharedMemory + // kgmmuFaultBufferFreeSharedMemory -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuFaultBufferFreeSharedMemory__ = &kgmmuFaultBufferFreeSharedMemory_GH100; @@ -482,7 +526,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuFaultBufferFreeSharedMemory__ = &kgmmuFaultBufferFreeSharedMemory_b3696a; } - // Hal function -- kgmmuSetupWarForBug2720120 + // kgmmuSetupWarForBug2720120 -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__kgmmuSetupWarForBug2720120__ = &kgmmuSetupWarForBug2720120_GA100; @@ -492,7 +536,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuSetupWarForBug2720120__ = &kgmmuSetupWarForBug2720120_56cd7a; } - // Hal function -- kgmmuGetGraphicsEngineId + // kgmmuGetGraphicsEngineId -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuGetGraphicsEngineId__ = &kgmmuGetGraphicsEngineId_GH100; @@ -502,7 +546,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuGetGraphicsEngineId__ = &kgmmuGetGraphicsEngineId_GV100; } - // Hal function -- kgmmuReadShadowBufPutIndex + // kgmmuReadShadowBufPutIndex -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuReadShadowBufPutIndex__ = &kgmmuReadShadowBufPutIndex_GH100; @@ -513,7 +557,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuReadShadowBufPutIndex__ = &kgmmuReadShadowBufPutIndex_4a4dee; } - // Hal function -- kgmmuIsFaultEngineBar1 + // kgmmuIsFaultEngineBar1 -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuIsFaultEngineBar1__ = &kgmmuIsFaultEngineBar1_GH100; @@ -523,7 +567,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuIsFaultEngineBar1__ = &kgmmuIsFaultEngineBar1_TU102; } - // Hal function -- kgmmuIsFaultEngineBar2 + // kgmmuIsFaultEngineBar2 -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuIsFaultEngineBar2__ = &kgmmuIsFaultEngineBar2_GH100; @@ -533,7 +577,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuIsFaultEngineBar2__ = &kgmmuIsFaultEngineBar2_TU102; } - // Hal function -- kgmmuIsFaultEnginePhysical + // kgmmuIsFaultEnginePhysical -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuIsFaultEnginePhysical__ = &kgmmuIsFaultEnginePhysical_GH100; @@ -543,7 +587,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuIsFaultEnginePhysical__ = &kgmmuIsFaultEnginePhysical_GV100; } - // Hal function -- kgmmuCopyMmuFaults + // kgmmuCopyMmuFaults -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuCopyMmuFaults__ = &kgmmuCopyMmuFaults_GV100; @@ -553,7 +597,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuCopyMmuFaults__ = &kgmmuCopyMmuFaults_92bfc3; } - // Hal function -- kgmmuParseFaultPacket + // kgmmuParseFaultPacket -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuParseFaultPacket__ = &kgmmuParseFaultPacket_GV100; @@ -563,7 +607,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuParseFaultPacket__ = &kgmmuParseFaultPacket_92bfc3; } - // Hal function -- kgmmuFaultBufferClearPackets + // kgmmuFaultBufferClearPackets -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuFaultBufferClearPackets__ = &kgmmuFaultBufferClearPackets_GV100; @@ -573,7 +617,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuFaultBufferClearPackets__ = &kgmmuFaultBufferClearPackets_f2d351; } - // Hal function -- kgmmuFaultBufferGetFault + // kgmmuFaultBufferGetFault -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuFaultBufferGetFault__ = &kgmmuFaultBufferGetFault_GV100; @@ -583,7 +627,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuFaultBufferGetFault__ = &kgmmuFaultBufferGetFault_dc3e6c; } - // Hal function -- kgmmuCopyFaultPacketToClientShadowBuffer + // kgmmuCopyFaultPacketToClientShadowBuffer -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ @@ -600,7 +644,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuCopyFaultPacketToClientShadowBuffer__ = &kgmmuCopyFaultPacketToClientShadowBuffer_13cd8d; } - // Hal function -- kgmmuIsReplayableShadowFaultBufferFull + // kgmmuIsReplayableShadowFaultBufferFull -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ @@ -618,7 +662,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuIsReplayableShadowFaultBufferFull__ = &kgmmuIsReplayableShadowFaultBufferFull_ceaee8; } - // Hal function -- kgmmuReadClientShadowBufPutIndex + // kgmmuReadClientShadowBufPutIndex -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ @@ -636,7 +680,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuReadClientShadowBufPutIndex__ = &kgmmuReadClientShadowBufPutIndex_13cd8d; } - // Hal function -- kgmmuWriteClientShadowBufPutIndex + // kgmmuWriteClientShadowBufPutIndex -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ @@ -654,7 +698,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuWriteClientShadowBufPutIndex__ = &kgmmuWriteClientShadowBufPutIndex_f2d351; } - // Hal function -- kgmmuGetMinCeEngineId + // kgmmuGetMinCeEngineId -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuGetMinCeEngineId__ = &kgmmuGetMinCeEngineId_GH100; @@ -664,7 +708,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuGetMinCeEngineId__ = &kgmmuGetMinCeEngineId_GV100; } - // Hal function -- kgmmuGetMaxCeEngineId + // kgmmuGetMaxCeEngineId -- halified (4 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kgmmuGetMaxCeEngineId__ = &kgmmuGetMaxCeEngineId_GH100; @@ -682,7 +726,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuGetMaxCeEngineId__ = &kgmmuGetMaxCeEngineId_GA100; } - // Hal function -- kgmmuFaultBufferMap + // kgmmuFaultBufferMap -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuFaultBufferMap__ = &kgmmuFaultBufferMap_IMPL; @@ -692,7 +736,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuFaultBufferMap__ = &kgmmuFaultBufferMap_92bfc3; } - // Hal function -- kgmmuFaultBufferUnmap + // kgmmuFaultBufferUnmap -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuFaultBufferUnmap__ = &kgmmuFaultBufferUnmap_IMPL; @@ -702,7 +746,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuFaultBufferUnmap__ = &kgmmuFaultBufferUnmap_92bfc3; } - // Hal function -- kgmmuFaultBufferInit + // kgmmuFaultBufferInit -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuFaultBufferInit__ = &kgmmuFaultBufferInit_GV100; @@ -712,7 +756,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuFaultBufferInit__ = &kgmmuFaultBufferInit_56cd7a; } - // Hal function -- kgmmuFaultBufferDestroy + // kgmmuFaultBufferDestroy -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuFaultBufferDestroy__ = &kgmmuFaultBufferDestroy_GV100; @@ -722,7 +766,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuFaultBufferDestroy__ = &kgmmuFaultBufferDestroy_56cd7a; } - // Hal function -- kgmmuFaultBufferLoad + // kgmmuFaultBufferLoad -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuFaultBufferLoad__ = &kgmmuFaultBufferLoad_GV100; @@ -732,7 +776,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuFaultBufferLoad__ = &kgmmuFaultBufferLoad_ac1694; } - // Hal function -- kgmmuFaultBufferUnload + // kgmmuFaultBufferUnload -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuFaultBufferUnload__ = &kgmmuFaultBufferUnload_GV100; @@ -742,7 +786,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuFaultBufferUnload__ = &kgmmuFaultBufferUnload_ac1694; } - // Hal function -- kgmmuEnableFaultBuffer + // kgmmuEnableFaultBuffer -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuEnableFaultBuffer__ = &kgmmuEnableFaultBuffer_GV100; @@ -752,7 +796,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuEnableFaultBuffer__ = &kgmmuEnableFaultBuffer_395e98; } - // Hal function -- kgmmuDisableFaultBuffer + // kgmmuDisableFaultBuffer -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuDisableFaultBuffer__ = &kgmmuDisableFaultBuffer_GV100; @@ -762,7 +806,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuDisableFaultBuffer__ = &kgmmuDisableFaultBuffer_92bfc3; } - // Hal function -- kgmmuSetAndGetDefaultFaultBufferSize + // kgmmuSetAndGetDefaultFaultBufferSize -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuSetAndGetDefaultFaultBufferSize__ = &kgmmuSetAndGetDefaultFaultBufferSize_TU102; @@ -772,7 +816,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuSetAndGetDefaultFaultBufferSize__ = &kgmmuSetAndGetDefaultFaultBufferSize_13cd8d; } - // Hal function -- kgmmuReadMmuFaultInstHiLo + // kgmmuReadMmuFaultInstHiLo -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuReadMmuFaultInstHiLo__ = &kgmmuReadMmuFaultInstHiLo_TU102; @@ -782,7 +826,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuReadMmuFaultInstHiLo__ = &kgmmuReadMmuFaultInstHiLo_f2d351; } - // Hal function -- kgmmuReadMmuFaultAddrHiLo + // kgmmuReadMmuFaultAddrHiLo -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuReadMmuFaultAddrHiLo__ = &kgmmuReadMmuFaultAddrHiLo_TU102; @@ -792,7 +836,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuReadMmuFaultAddrHiLo__ = &kgmmuReadMmuFaultAddrHiLo_f2d351; } - // Hal function -- kgmmuReadMmuFaultInfo + // kgmmuReadMmuFaultInfo -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuReadMmuFaultInfo__ = &kgmmuReadMmuFaultInfo_TU102; @@ -802,7 +846,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuReadMmuFaultInfo__ = &kgmmuReadMmuFaultInfo_a547a8; } - // Hal function -- kgmmuWriteMmuFaultBufferSize + // kgmmuWriteMmuFaultBufferSize -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuWriteMmuFaultBufferSize__ = &kgmmuWriteMmuFaultBufferSize_TU102; @@ -812,7 +856,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuWriteMmuFaultBufferSize__ = &kgmmuWriteMmuFaultBufferSize_f2d351; } - // Hal function -- kgmmuWriteMmuFaultBufferHiLo + // kgmmuWriteMmuFaultBufferHiLo -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuWriteMmuFaultBufferHiLo__ = &kgmmuWriteMmuFaultBufferHiLo_TU102; @@ -822,7 +866,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuWriteMmuFaultBufferHiLo__ = &kgmmuWriteMmuFaultBufferHiLo_f2d351; } - // Hal function -- kgmmuEnableMmuFaultInterrupts + // kgmmuEnableMmuFaultInterrupts -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuEnableMmuFaultInterrupts__ = &kgmmuEnableMmuFaultInterrupts_46f6a7; @@ -832,7 +876,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuEnableMmuFaultInterrupts__ = &kgmmuEnableMmuFaultInterrupts_92bfc3; } - // Hal function -- kgmmuDisableMmuFaultInterrupts + // kgmmuDisableMmuFaultInterrupts -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuDisableMmuFaultInterrupts__ = &kgmmuDisableMmuFaultInterrupts_46f6a7; @@ -842,7 +886,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuDisableMmuFaultInterrupts__ = &kgmmuDisableMmuFaultInterrupts_92bfc3; } - // Hal function -- kgmmuEnableMmuFaultOverflowIntr + // kgmmuEnableMmuFaultOverflowIntr -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuEnableMmuFaultOverflowIntr__ = &kgmmuEnableMmuFaultOverflowIntr_46f6a7; @@ -852,7 +896,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuEnableMmuFaultOverflowIntr__ = &kgmmuEnableMmuFaultOverflowIntr_92bfc3; } - // Hal function -- kgmmuSignExtendFaultAddress + // kgmmuSignExtendFaultAddress -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ @@ -869,7 +913,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuSignExtendFaultAddress__ = &kgmmuSignExtendFaultAddress_f2d351; } - // Hal function -- kgmmuGetFaultType + // kgmmuGetFaultType -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuGetFaultType__ = &kgmmuGetFaultType_GV100; @@ -879,7 +923,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuGetFaultType__ = &kgmmuGetFaultType_92bfc3; } - // Hal function -- kgmmuIsP2PUnboundInstFault + // kgmmuIsP2PUnboundInstFault -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ @@ -896,7 +940,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuIsP2PUnboundInstFault__ = &kgmmuIsP2PUnboundInstFault_92bfc3; } - // Hal function -- kgmmuServiceVfPriFaults + // kgmmuServiceVfPriFaults -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuServiceVfPriFaults__ = &kgmmuServiceVfPriFaults_IMPL; @@ -906,7 +950,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuServiceVfPriFaults__ = &kgmmuServiceVfPriFaults_92bfc3; } - // Hal function -- kgmmuTestVidmemAccessBitBufferError + // kgmmuTestVidmemAccessBitBufferError -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuTestVidmemAccessBitBufferError__ = &kgmmuTestVidmemAccessBitBufferError_491d52; @@ -916,7 +960,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuTestVidmemAccessBitBufferError__ = &kgmmuTestVidmemAccessBitBufferError_ceaee8; } - // Hal function -- kgmmuDisableVidmemAccessBitBuf + // kgmmuDisableVidmemAccessBitBuf -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuDisableVidmemAccessBitBuf__ = &kgmmuDisableVidmemAccessBitBuf_b3696a; @@ -926,7 +970,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuDisableVidmemAccessBitBuf__ = &kgmmuDisableVidmemAccessBitBuf_e426af; } - // Hal function -- kgmmuEnableVidmemAccessBitBuf + // kgmmuEnableVidmemAccessBitBuf -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuEnableVidmemAccessBitBuf__ = &kgmmuEnableVidmemAccessBitBuf_46f6a7; @@ -936,7 +980,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuEnableVidmemAccessBitBuf__ = &kgmmuEnableVidmemAccessBitBuf_92bfc3; } - // Hal function -- kgmmuClearAccessCounterWriteNak + // kgmmuClearAccessCounterWriteNak -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuClearAccessCounterWriteNak__ = &kgmmuClearAccessCounterWriteNak_b3696a; @@ -946,7 +990,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuClearAccessCounterWriteNak__ = &kgmmuClearAccessCounterWriteNak_e426af; } - // Hal function -- kgmmuServiceMthdBuffFaultInBar2Fault + // kgmmuServiceMthdBuffFaultInBar2Fault -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuServiceMthdBuffFaultInBar2Fault__ = &kgmmuServiceMthdBuffFaultInBar2Fault_56cd7a; @@ -956,7 +1000,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuServiceMthdBuffFaultInBar2Fault__ = &kgmmuServiceMthdBuffFaultInBar2Fault_92bfc3; } - // Hal function -- kgmmuFaultCancelTargeted + // kgmmuFaultCancelTargeted -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuFaultCancelTargeted__ = &kgmmuFaultCancelTargeted_VF; @@ -966,7 +1010,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuFaultCancelTargeted__ = &kgmmuFaultCancelTargeted_92bfc3; } - // Hal function -- kgmmuFaultCancelIssueInvalidate + // kgmmuFaultCancelIssueInvalidate -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuFaultCancelIssueInvalidate__ = &kgmmuFaultCancelIssueInvalidate_GP100; @@ -976,7 +1020,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuFaultCancelIssueInvalidate__ = &kgmmuFaultCancelIssueInvalidate_92bfc3; } - // Hal function -- kgmmuServiceMmuFault + // kgmmuServiceMmuFault -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kgmmuServiceMmuFault__ = &kgmmuServiceMmuFault_GV100; @@ -986,7 +1030,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuServiceMmuFault__ = &kgmmuServiceMmuFault_GA100; } - // Hal function -- kgmmuServiceUnboundInstBlockFault + // kgmmuServiceUnboundInstBlockFault -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgmmuServiceUnboundInstBlockFault__ = &kgmmuServiceUnboundInstBlockFault_56cd7a; @@ -996,7 +1040,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuServiceUnboundInstBlockFault__ = &kgmmuServiceUnboundInstBlockFault_92bfc3; } - // Hal function -- kgmmuGetEccCounts + // kgmmuGetEccCounts -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000420UL) )) /* ChipHal: TU102 | GA100 | GH100 */ { pThis->__kgmmuGetEccCounts__ = &kgmmuGetEccCounts_TU102; @@ -1007,44 +1051,33 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuGetEccCounts__ = &kgmmuGetEccCounts_4a4dee; } - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelGmmu_engstateConstructEngine; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_thunk_KernelGmmu_engstateStateInitLocked; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_thunk_KernelGmmu_engstateStateLoad; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_thunk_KernelGmmu_engstateStateUnload; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_thunk_KernelGmmu_engstateStatePostLoad; + // kgmmuInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__kgmmuInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuInitMissing; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_thunk_KernelGmmu_engstateStatePreUnload; + // kgmmuStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__kgmmuStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreInitLocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_thunk_KernelGmmu_engstateStateDestroy; + // kgmmuStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kgmmuStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreInitUnlocked; - pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_thunk_KernelGmmu_intrservRegisterIntrService; + // kgmmuStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kgmmuStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuStateInitUnlocked; - pThis->__nvoc_base_IntrService.__intrservClearInterrupt__ = &__nvoc_thunk_KernelGmmu_intrservClearInterrupt; + // kgmmuStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__kgmmuStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreLoad; - pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_thunk_KernelGmmu_intrservServiceInterrupt; + // kgmmuStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__kgmmuStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuStatePostUnload; - pThis->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_thunk_KernelGmmu_intrservServiceNotificationInterrupt; + // kgmmuIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__kgmmuIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuIsPresent; +} // End __nvoc_init_funcTable_KernelGmmu_1 with approximately 172 basic block(s). - pThis->__kgmmuStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_kgmmuStatePreLoad; - - pThis->__kgmmuStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_kgmmuStatePostUnload; - - pThis->__kgmmuStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kgmmuStateInitUnlocked; - - pThis->__kgmmuInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kgmmuInitMissing; - - pThis->__kgmmuStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kgmmuStatePreInitLocked; - - pThis->__kgmmuStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kgmmuStatePreInitUnlocked; - - pThis->__kgmmuIsPresent__ = &__nvoc_thunk_OBJENGSTATE_kgmmuIsPresent; -} +// Initialize vtable(s) for 85 virtual method(s). void __nvoc_init_funcTable_KernelGmmu(KernelGmmu *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 85 per-object function pointer(s). __nvoc_init_funcTable_KernelGmmu_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kern_gmmu_nvoc.h b/src/nvidia/generated/g_kern_gmmu_nvoc.h index 2bf0613ccb..fc17396187 100644 --- a/src/nvidia/generated/g_kern_gmmu_nvoc.h +++ b/src/nvidia/generated/g_kern_gmmu_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERN_GMMU_NVOC_H_ #define _G_KERN_GMMU_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -36,6 +43,7 @@ extern "C" { * ******************************************************************************/ +#pragma once #include "g_kern_gmmu_nvoc.h" #ifndef KERN_GMMU_H @@ -91,6 +99,16 @@ typedef struct GMMU_FMT *pFmts[GMMU_FMT_MAX_BIG_PAGE_SIZES]; } GMMU_FMT_FAMILY; +/*! + * This structure contains information needed for issuing a commit TLB invalidate + * through RmTest. + */ +typedef struct +{ + NvU32 gfid; + NvBool invalidateAll; +} COMMIT_TLB_INVALIDATE_TEST_PARAMS; + /*! * This structure contains information needed for issuing a TLB invalidate. */ @@ -370,103 +388,116 @@ typedef struct #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelGmmu { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; struct IntrService __nvoc_base_IntrService; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct IntrService *__nvoc_pbase_IntrService; - struct KernelGmmu *__nvoc_pbase_KernelGmmu; - NV_STATUS (*__kgmmuConstructEngine__)(OBJGPU *, struct KernelGmmu *, ENGDESCRIPTOR); - NV_STATUS (*__kgmmuStateInitLocked__)(OBJGPU *, struct KernelGmmu *); - NV_STATUS (*__kgmmuStateLoad__)(OBJGPU *, struct KernelGmmu *, NvU32); - NV_STATUS (*__kgmmuStateUnload__)(OBJGPU *, struct KernelGmmu *, NvU32); - NV_STATUS (*__kgmmuStatePostLoad__)(OBJGPU *, struct KernelGmmu *, NvU32); - NV_STATUS (*__kgmmuStatePreUnload__)(OBJGPU *, struct KernelGmmu *, NvU32); - void (*__kgmmuStateDestroy__)(OBJGPU *, struct KernelGmmu *); - void (*__kgmmuRegisterIntrService__)(OBJGPU *, struct KernelGmmu *, IntrServiceRecord *); - NvBool (*__kgmmuClearInterrupt__)(OBJGPU *, struct KernelGmmu *, IntrServiceClearInterruptArguments *); - NvU32 (*__kgmmuServiceInterrupt__)(OBJGPU *, struct KernelGmmu *, IntrServiceServiceInterruptArguments *); - NV_STATUS (*__kgmmuServiceNotificationInterrupt__)(OBJGPU *, struct KernelGmmu *, IntrServiceServiceNotificationInterruptArguments *); - NV_STATUS (*__kgmmuInstBlkVaLimitGet__)(struct KernelGmmu *, struct OBJVASPACE *, NvU32, INST_BLK_INIT_PARAMS *, NvU32 *, NvU64 *); - NvU32 (*__kgmmuSetTlbInvalidateMembarWarParameters__)(OBJGPU *, struct KernelGmmu *, TLB_INVALIDATE_PARAMS *); - NV_STATUS (*__kgmmuSetTlbInvalidationScope__)(OBJGPU *, struct KernelGmmu *, NvU32, TLB_INVALIDATE_PARAMS *); - void (*__kgmmuFmtInitPteComptagLine__)(struct KernelGmmu *, struct GMMU_FMT_PTE *, const NvU32); - void (*__kgmmuFmtInitPeerPteFld__)(struct KernelGmmu *, struct GMMU_FMT_PTE *, const NvU32); - void (*__kgmmuFmtInitPte__)(struct KernelGmmu *, struct GMMU_FMT_PTE *, const NvU32, const struct NV_FIELD_ENUM_ENTRY *, const NvBool); - void (*__kgmmuFmtInitPde__)(struct KernelGmmu *, struct GMMU_FMT_PDE *, const NvU32, const struct NV_FIELD_ENUM_ENTRY *); - NvBool (*__kgmmuFmtIsVersionSupported__)(struct KernelGmmu *, NvU32); - void (*__kgmmuFmtInitLevels__)(struct KernelGmmu *, MMU_FMT_LEVEL *, const NvU32, const NvU32, const NvU32); - void (*__kgmmuFmtInitPdeMulti__)(struct KernelGmmu *, struct GMMU_FMT_PDE_MULTI *, const NvU32, const struct NV_FIELD_ENUM_ENTRY *); - NV_STATUS (*__kgmmuFmtFamiliesInit__)(OBJGPU *, struct KernelGmmu *); - NV_STATUS (*__kgmmuTranslatePtePcfFromSw__)(struct KernelGmmu *, NvU32, NvU32 *); - NV_STATUS (*__kgmmuTranslatePtePcfFromHw__)(struct KernelGmmu *, NvU32, NvBool, NvU32 *); - NV_STATUS (*__kgmmuTranslatePdePcfFromSw__)(struct KernelGmmu *, NvU32, NvU32 *); - NV_STATUS (*__kgmmuTranslatePdePcfFromHw__)(struct KernelGmmu *, NvU32, GMMU_APERTURE, NvU32 *); - NV_STATUS (*__kgmmuGetFaultRegisterMappings__)(OBJGPU *, struct KernelGmmu *, NvU32, NvP64 *, NvP64 *, NvP64 *, NvP64 *, NvP64 *, NvP64 *, NvU32 *, NvP64 *); - NV_STATUS (*__kgmmuIssueReplayableFaultBufferFlush__)(OBJGPU *, struct KernelGmmu *, NvBool); - NV_STATUS (*__kgmmuToggleFaultOnPrefetch__)(OBJGPU *, struct KernelGmmu *, NvBool); - NV_STATUS (*__kgmmuFaultBufferAllocSharedMemory__)(OBJGPU *, struct KernelGmmu *, FAULT_BUFFER_TYPE); - void (*__kgmmuFaultBufferFreeSharedMemory__)(OBJGPU *, struct KernelGmmu *, FAULT_BUFFER_TYPE); - NV_STATUS (*__kgmmuSetupWarForBug2720120__)(struct KernelGmmu *, GMMU_FMT_FAMILY *); - NvU32 (*__kgmmuGetGraphicsEngineId__)(struct KernelGmmu *); - NvU32 (*__kgmmuReadShadowBufPutIndex__)(OBJGPU *, struct KernelGmmu *, FAULT_BUFFER_TYPE); - NvBool (*__kgmmuIsFaultEngineBar1__)(struct KernelGmmu *, NvU32); - NvBool (*__kgmmuIsFaultEngineBar2__)(struct KernelGmmu *, NvU32); - NvBool (*__kgmmuIsFaultEnginePhysical__)(struct KernelGmmu *, NvU32); - NV_STATUS (*__kgmmuCopyMmuFaults__)(OBJGPU *, struct KernelGmmu *, struct THREAD_STATE_NODE *, NvU32 *, FAULT_BUFFER_TYPE, NvBool); - NV_STATUS (*__kgmmuParseFaultPacket__)(OBJGPU *, struct KernelGmmu *, NvP64, NvP64); - void (*__kgmmuFaultBufferClearPackets__)(OBJGPU *, struct KernelGmmu *, struct HW_FAULT_BUFFER *, NvU32, NvU32); - GMMU_FAULT_PACKET *(*__kgmmuFaultBufferGetFault__)(OBJGPU *, struct KernelGmmu *, struct HW_FAULT_BUFFER *, NvU32); - NvU32 (*__kgmmuCopyFaultPacketToClientShadowBuffer__)(OBJGPU *, struct KernelGmmu *, struct GMMU_FAULT_BUFFER *, FAULT_BUFFER_TYPE, NvU32, NvU32, NvU32, struct THREAD_STATE_NODE *, NvU32 *); - NvBool (*__kgmmuIsReplayableShadowFaultBufferFull__)(OBJGPU *, struct KernelGmmu *, GMMU_CLIENT_SHADOW_FAULT_BUFFER *, NvU32, NvU32); - NvU32 (*__kgmmuReadClientShadowBufPutIndex__)(OBJGPU *, struct KernelGmmu *, NvU32, FAULT_BUFFER_TYPE); - void (*__kgmmuWriteClientShadowBufPutIndex__)(OBJGPU *, struct KernelGmmu *, NvU32, FAULT_BUFFER_TYPE, NvU32); - NvU32 (*__kgmmuGetMinCeEngineId__)(struct KernelGmmu *); - NvU32 (*__kgmmuGetMaxCeEngineId__)(OBJGPU *, struct KernelGmmu *); - NV_STATUS (*__kgmmuFaultBufferMap__)(OBJGPU *, struct KernelGmmu *, NvU32, NvU32); - NV_STATUS (*__kgmmuFaultBufferUnmap__)(OBJGPU *, struct KernelGmmu *, NvU32, NvU32); - NV_STATUS (*__kgmmuFaultBufferInit__)(OBJGPU *, struct KernelGmmu *); - NV_STATUS (*__kgmmuFaultBufferDestroy__)(OBJGPU *, struct KernelGmmu *); - NV_STATUS (*__kgmmuFaultBufferLoad__)(OBJGPU *, struct KernelGmmu *, NvU32, NvU32); - NV_STATUS (*__kgmmuFaultBufferUnload__)(OBJGPU *, struct KernelGmmu *, NvU32, NvU32); - NV_STATUS (*__kgmmuEnableFaultBuffer__)(OBJGPU *, struct KernelGmmu *, NvU32, NvBool, NvU32); - NV_STATUS (*__kgmmuDisableFaultBuffer__)(OBJGPU *, struct KernelGmmu *, NvU32, NvBool, NvU32); - NvU32 (*__kgmmuSetAndGetDefaultFaultBufferSize__)(OBJGPU *, struct KernelGmmu *, FAULT_BUFFER_TYPE, NvU32); - void (*__kgmmuReadMmuFaultInstHiLo__)(OBJGPU *, struct KernelGmmu *, NvU32 *, NvU32 *); - void (*__kgmmuReadMmuFaultAddrHiLo__)(OBJGPU *, struct KernelGmmu *, NvU32 *, NvU32 *); - NvU32 (*__kgmmuReadMmuFaultInfo__)(OBJGPU *, struct KernelGmmu *); - void (*__kgmmuWriteMmuFaultBufferSize__)(OBJGPU *, struct KernelGmmu *, NvU32, NvU32, NvU32); - void (*__kgmmuWriteMmuFaultBufferHiLo__)(OBJGPU *, struct KernelGmmu *, NvU32, NvU32, NvU32, NvU32); - NV_STATUS (*__kgmmuEnableMmuFaultInterrupts__)(OBJGPU *, struct KernelGmmu *, NvU32); - NV_STATUS (*__kgmmuDisableMmuFaultInterrupts__)(OBJGPU *, struct KernelGmmu *, NvU32); - NV_STATUS (*__kgmmuEnableMmuFaultOverflowIntr__)(OBJGPU *, struct KernelGmmu *, NvU32); - void (*__kgmmuSignExtendFaultAddress__)(OBJGPU *, struct KernelGmmu *, NvU64 *); - NV_STATUS (*__kgmmuGetFaultType__)(OBJGPU *, struct KernelGmmu *, NvU32, FAULT_TYPE *); - NvBool (*__kgmmuIsP2PUnboundInstFault__)(struct KernelGmmu *, NvU32, NvU32); - NV_STATUS (*__kgmmuServiceVfPriFaults__)(OBJGPU *, struct KernelGmmu *, NvU32); - NvBool (*__kgmmuTestVidmemAccessBitBufferError__)(OBJGPU *, struct KernelGmmu *, NvU32); - void (*__kgmmuDisableVidmemAccessBitBuf__)(OBJGPU *, struct KernelGmmu *); - NV_STATUS (*__kgmmuEnableVidmemAccessBitBuf__)(OBJGPU *, struct KernelGmmu *); - void (*__kgmmuClearAccessCounterWriteNak__)(OBJGPU *, struct KernelGmmu *); - NV_STATUS (*__kgmmuServiceMthdBuffFaultInBar2Fault__)(OBJGPU *, struct KernelGmmu *); - NV_STATUS (*__kgmmuFaultCancelTargeted__)(OBJGPU *, struct KernelGmmu *, GMMU_FAULT_CANCEL_INFO *); - NV_STATUS (*__kgmmuFaultCancelIssueInvalidate__)(OBJGPU *, struct KernelGmmu *, GMMU_FAULT_CANCEL_INFO *, TLB_INVALIDATE_PARAMS *, NvBool); - NV_STATUS (*__kgmmuServiceMmuFault__)(OBJGPU *, struct KernelGmmu *, NvP64, FIFO_MMU_EXCEPTION_DATA *); - NV_STATUS (*__kgmmuServiceUnboundInstBlockFault__)(OBJGPU *, struct KernelGmmu *, NvP64, FIFO_MMU_EXCEPTION_DATA *); - NvU32 (*__kgmmuGetEccCounts__)(OBJGPU *, struct KernelGmmu *); - NV_STATUS (*__kgmmuStatePreLoad__)(POBJGPU, struct KernelGmmu *, NvU32); - NV_STATUS (*__kgmmuStatePostUnload__)(POBJGPU, struct KernelGmmu *, NvU32); - NV_STATUS (*__kgmmuStateInitUnlocked__)(POBJGPU, struct KernelGmmu *); - void (*__kgmmuInitMissing__)(POBJGPU, struct KernelGmmu *); - NV_STATUS (*__kgmmuStatePreInitLocked__)(POBJGPU, struct KernelGmmu *); - NV_STATUS (*__kgmmuStatePreInitUnlocked__)(POBJGPU, struct KernelGmmu *); - NvBool (*__kgmmuIsPresent__)(POBJGPU, struct KernelGmmu *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct IntrService *__nvoc_pbase_IntrService; // intrserv super + struct KernelGmmu *__nvoc_pbase_KernelGmmu; // kgmmu + + // Vtable with 85 per-object function pointers + NV_STATUS (*__kgmmuConstructEngine__)(OBJGPU *, struct KernelGmmu * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgmmuStateInitLocked__)(OBJGPU *, struct KernelGmmu * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgmmuStateLoad__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgmmuStateUnload__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgmmuStatePostLoad__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kgmmuStatePreUnload__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + void (*__kgmmuStateDestroy__)(OBJGPU *, struct KernelGmmu * /*this*/); // virtual override (engstate) base (engstate) + void (*__kgmmuRegisterIntrService__)(OBJGPU *, struct KernelGmmu * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) + NvBool (*__kgmmuClearInterrupt__)(OBJGPU *, struct KernelGmmu * /*this*/, IntrServiceClearInterruptArguments *); // virtual override (intrserv) base (intrserv) + NvU32 (*__kgmmuServiceInterrupt__)(OBJGPU *, struct KernelGmmu * /*this*/, IntrServiceServiceInterruptArguments *); // virtual override (intrserv) base (intrserv) + NV_STATUS (*__kgmmuServiceNotificationInterrupt__)(OBJGPU *, struct KernelGmmu * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) body + NV_STATUS (*__kgmmuInstBlkVaLimitGet__)(struct KernelGmmu * /*this*/, struct OBJVASPACE *, NvU32, INST_BLK_INIT_PARAMS *, NvU32 *, NvU64 *); // halified (2 hals) body + NvU32 (*__kgmmuSetTlbInvalidateMembarWarParameters__)(OBJGPU *, struct KernelGmmu * /*this*/, TLB_INVALIDATE_PARAMS *); // halified (2 hals) body + NV_STATUS (*__kgmmuSetTlbInvalidationScope__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, TLB_INVALIDATE_PARAMS *); // halified (2 hals) body + void (*__kgmmuFmtInitPteComptagLine__)(struct KernelGmmu * /*this*/, struct GMMU_FMT_PTE *, const NvU32); // halified (2 hals) body + void (*__kgmmuFmtInitPeerPteFld__)(struct KernelGmmu * /*this*/, struct GMMU_FMT_PTE *, const NvU32); // halified (2 hals) body + void (*__kgmmuFmtInitPte__)(struct KernelGmmu * /*this*/, struct GMMU_FMT_PTE *, const NvU32, const struct NV_FIELD_ENUM_ENTRY *, const NvBool); // halified (2 hals) body + void (*__kgmmuFmtInitPde__)(struct KernelGmmu * /*this*/, struct GMMU_FMT_PDE *, const NvU32, const struct NV_FIELD_ENUM_ENTRY *); // halified (2 hals) body + NvBool (*__kgmmuFmtIsVersionSupported__)(struct KernelGmmu * /*this*/, NvU32); // halified (2 hals) body + void (*__kgmmuFmtInitLevels__)(struct KernelGmmu * /*this*/, MMU_FMT_LEVEL *, const NvU32, const NvU32, const NvU32); // halified (3 hals) body + void (*__kgmmuFmtInitPdeMulti__)(struct KernelGmmu * /*this*/, struct GMMU_FMT_PDE_MULTI *, const NvU32, const struct NV_FIELD_ENUM_ENTRY *); // halified (2 hals) body + NV_STATUS (*__kgmmuFmtFamiliesInit__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body + NV_STATUS (*__kgmmuTranslatePtePcfFromSw__)(struct KernelGmmu * /*this*/, NvU32, NvU32 *); // halified (2 hals) body + NV_STATUS (*__kgmmuTranslatePtePcfFromHw__)(struct KernelGmmu * /*this*/, NvU32, NvBool, NvU32 *); // halified (2 hals) body + NV_STATUS (*__kgmmuTranslatePdePcfFromSw__)(struct KernelGmmu * /*this*/, NvU32, NvU32 *); // halified (2 hals) body + NV_STATUS (*__kgmmuTranslatePdePcfFromHw__)(struct KernelGmmu * /*this*/, NvU32, GMMU_APERTURE, NvU32 *); // halified (2 hals) body + NV_STATUS (*__kgmmuGetFaultRegisterMappings__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvP64 *, NvP64 *, NvP64 *, NvP64 *, NvP64 *, NvP64 *, NvU32 *, NvP64 *); // halified (2 hals) body + NV_STATUS (*__kgmmuIssueReplayableFaultBufferFlush__)(OBJGPU *, struct KernelGmmu * /*this*/, NvBool); // halified (2 hals) body + NV_STATUS (*__kgmmuToggleFaultOnPrefetch__)(OBJGPU *, struct KernelGmmu * /*this*/, NvBool); // halified (2 hals) body + NV_STATUS (*__kgmmuFaultBufferAllocSharedMemory__)(OBJGPU *, struct KernelGmmu * /*this*/, FAULT_BUFFER_TYPE); // halified (2 hals) body + void (*__kgmmuFaultBufferFreeSharedMemory__)(OBJGPU *, struct KernelGmmu * /*this*/, FAULT_BUFFER_TYPE); // halified (2 hals) body + NV_STATUS (*__kgmmuSetupWarForBug2720120__)(struct KernelGmmu * /*this*/); // halified (2 hals) body + NvU32 (*__kgmmuGetGraphicsEngineId__)(struct KernelGmmu * /*this*/); // halified (2 hals) body + NvU32 (*__kgmmuReadShadowBufPutIndex__)(OBJGPU *, struct KernelGmmu * /*this*/, FAULT_BUFFER_TYPE); // halified (2 hals) body + NvBool (*__kgmmuIsFaultEngineBar1__)(struct KernelGmmu * /*this*/, NvU32); // halified (2 hals) body + NvBool (*__kgmmuIsFaultEngineBar2__)(struct KernelGmmu * /*this*/, NvU32); // halified (2 hals) body + NvBool (*__kgmmuIsFaultEnginePhysical__)(struct KernelGmmu * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__kgmmuCopyMmuFaults__)(OBJGPU *, struct KernelGmmu * /*this*/, struct THREAD_STATE_NODE *, NvU32 *, FAULT_BUFFER_TYPE, NvBool); // halified (2 hals) body + NV_STATUS (*__kgmmuParseFaultPacket__)(OBJGPU *, struct KernelGmmu * /*this*/, NvP64, NvP64); // halified (2 hals) body + void (*__kgmmuFaultBufferClearPackets__)(OBJGPU *, struct KernelGmmu * /*this*/, struct HW_FAULT_BUFFER *, NvU32, NvU32); // halified (2 hals) body + GMMU_FAULT_PACKET * (*__kgmmuFaultBufferGetFault__)(OBJGPU *, struct KernelGmmu * /*this*/, struct HW_FAULT_BUFFER *, NvU32); // halified (2 hals) body + NvU32 (*__kgmmuCopyFaultPacketToClientShadowBuffer__)(OBJGPU *, struct KernelGmmu * /*this*/, struct GMMU_FAULT_BUFFER *, FAULT_BUFFER_TYPE, NvU32, NvU32, NvU32, struct THREAD_STATE_NODE *, NvU32 *); // halified (3 hals) body + NvBool (*__kgmmuIsReplayableShadowFaultBufferFull__)(OBJGPU *, struct KernelGmmu * /*this*/, GMMU_CLIENT_SHADOW_FAULT_BUFFER *, NvU32, NvU32); // halified (3 hals) body + NvU32 (*__kgmmuReadClientShadowBufPutIndex__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, FAULT_BUFFER_TYPE); // halified (3 hals) body + void (*__kgmmuWriteClientShadowBufPutIndex__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, FAULT_BUFFER_TYPE, NvU32); // halified (3 hals) body + NvU32 (*__kgmmuGetMinCeEngineId__)(struct KernelGmmu * /*this*/); // halified (2 hals) body + NvU32 (*__kgmmuGetMaxCeEngineId__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (4 hals) body + NV_STATUS (*__kgmmuFaultBufferMap__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvU32); // halified (2 hals) body + NV_STATUS (*__kgmmuFaultBufferUnmap__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvU32); // halified (2 hals) body + NV_STATUS (*__kgmmuFaultBufferInit__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body + NV_STATUS (*__kgmmuFaultBufferDestroy__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body + NV_STATUS (*__kgmmuFaultBufferLoad__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvU32); // halified (2 hals) body + NV_STATUS (*__kgmmuFaultBufferUnload__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvU32); // halified (2 hals) body + NV_STATUS (*__kgmmuEnableFaultBuffer__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvBool, NvU32); // halified (2 hals) body + NV_STATUS (*__kgmmuDisableFaultBuffer__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvBool, NvU32); // halified (2 hals) body + NvU32 (*__kgmmuSetAndGetDefaultFaultBufferSize__)(OBJGPU *, struct KernelGmmu * /*this*/, FAULT_BUFFER_TYPE, NvU32); // halified (2 hals) body + void (*__kgmmuReadMmuFaultInstHiLo__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32 *, NvU32 *); // halified (2 hals) body + void (*__kgmmuReadMmuFaultAddrHiLo__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32 *, NvU32 *); // halified (2 hals) body + NvU32 (*__kgmmuReadMmuFaultInfo__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body + void (*__kgmmuWriteMmuFaultBufferSize__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvU32, NvU32); // halified (2 hals) body + void (*__kgmmuWriteMmuFaultBufferHiLo__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvU32, NvU32, NvU32); // halified (2 hals) body + NV_STATUS (*__kgmmuEnableMmuFaultInterrupts__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__kgmmuDisableMmuFaultInterrupts__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__kgmmuEnableMmuFaultOverflowIntr__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // halified (2 hals) body + void (*__kgmmuSignExtendFaultAddress__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU64 *); // halified (3 hals) body + NV_STATUS (*__kgmmuGetFaultType__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, FAULT_TYPE *); // halified (2 hals) body + NvBool (*__kgmmuIsP2PUnboundInstFault__)(struct KernelGmmu * /*this*/, NvU32, NvU32); // halified (3 hals) body + NV_STATUS (*__kgmmuServiceVfPriFaults__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // halified (2 hals) body + NvBool (*__kgmmuTestVidmemAccessBitBufferError__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // halified (2 hals) body + void (*__kgmmuDisableVidmemAccessBitBuf__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body + NV_STATUS (*__kgmmuEnableVidmemAccessBitBuf__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body + void (*__kgmmuClearAccessCounterWriteNak__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body + NV_STATUS (*__kgmmuServiceMthdBuffFaultInBar2Fault__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body + NV_STATUS (*__kgmmuFaultCancelTargeted__)(OBJGPU *, struct KernelGmmu * /*this*/, GMMU_FAULT_CANCEL_INFO *); // halified (2 hals) body + NV_STATUS (*__kgmmuFaultCancelIssueInvalidate__)(OBJGPU *, struct KernelGmmu * /*this*/, GMMU_FAULT_CANCEL_INFO *, TLB_INVALIDATE_PARAMS *, NvBool); // halified (2 hals) body + NV_STATUS (*__kgmmuServiceMmuFault__)(OBJGPU *, struct KernelGmmu * /*this*/, NvP64, FIFO_MMU_EXCEPTION_DATA *); // halified (2 hals) body + NV_STATUS (*__kgmmuServiceUnboundInstBlockFault__)(OBJGPU *, struct KernelGmmu * /*this*/, NvP64, FIFO_MMU_EXCEPTION_DATA *); // halified (2 hals) body + NvU32 (*__kgmmuGetEccCounts__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body + void (*__kgmmuInitMissing__)(POBJGPU, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgmmuStatePreInitLocked__)(POBJGPU, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgmmuStatePreInitUnlocked__)(POBJGPU, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgmmuStateInitUnlocked__)(POBJGPU, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgmmuStatePreLoad__)(POBJGPU, struct KernelGmmu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgmmuStatePostUnload__)(POBJGPU, struct KernelGmmu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__kgmmuIsPresent__)(POBJGPU, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) + + // 4 PDB properties NvBool PDB_PROP_KGMMU_SYSMEM_FAULT_BUFFER_GPU_UNCACHED; NvBool PDB_PROP_KGMMU_FAULT_BUFFER_DISABLED; NvBool PDB_PROP_KGMMU_REPLAYABLE_FAULT_BUFFER_IN_USE; NvBool PDB_PROP_KGMMU_REDUCE_NR_FAULT_BUFFER_SIZE; + + // Data members NvBool bReportFlaTranslationXid; NV2080_CTRL_INTERNAL_GMMU_GET_STATIC_INFO_PARAMS *pStaticInfo; NvU64 defaultBigPageSize; @@ -498,103 +529,116 @@ struct KernelGmmu { NvBool PRIVATE_FIELD(bVaspaceInteropSupported); }; + struct KernelGmmu_PRIVATE { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; struct IntrService __nvoc_base_IntrService; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct IntrService *__nvoc_pbase_IntrService; - struct KernelGmmu *__nvoc_pbase_KernelGmmu; - NV_STATUS (*__kgmmuConstructEngine__)(OBJGPU *, struct KernelGmmu *, ENGDESCRIPTOR); - NV_STATUS (*__kgmmuStateInitLocked__)(OBJGPU *, struct KernelGmmu *); - NV_STATUS (*__kgmmuStateLoad__)(OBJGPU *, struct KernelGmmu *, NvU32); - NV_STATUS (*__kgmmuStateUnload__)(OBJGPU *, struct KernelGmmu *, NvU32); - NV_STATUS (*__kgmmuStatePostLoad__)(OBJGPU *, struct KernelGmmu *, NvU32); - NV_STATUS (*__kgmmuStatePreUnload__)(OBJGPU *, struct KernelGmmu *, NvU32); - void (*__kgmmuStateDestroy__)(OBJGPU *, struct KernelGmmu *); - void (*__kgmmuRegisterIntrService__)(OBJGPU *, struct KernelGmmu *, IntrServiceRecord *); - NvBool (*__kgmmuClearInterrupt__)(OBJGPU *, struct KernelGmmu *, IntrServiceClearInterruptArguments *); - NvU32 (*__kgmmuServiceInterrupt__)(OBJGPU *, struct KernelGmmu *, IntrServiceServiceInterruptArguments *); - NV_STATUS (*__kgmmuServiceNotificationInterrupt__)(OBJGPU *, struct KernelGmmu *, IntrServiceServiceNotificationInterruptArguments *); - NV_STATUS (*__kgmmuInstBlkVaLimitGet__)(struct KernelGmmu *, struct OBJVASPACE *, NvU32, INST_BLK_INIT_PARAMS *, NvU32 *, NvU64 *); - NvU32 (*__kgmmuSetTlbInvalidateMembarWarParameters__)(OBJGPU *, struct KernelGmmu *, TLB_INVALIDATE_PARAMS *); - NV_STATUS (*__kgmmuSetTlbInvalidationScope__)(OBJGPU *, struct KernelGmmu *, NvU32, TLB_INVALIDATE_PARAMS *); - void (*__kgmmuFmtInitPteComptagLine__)(struct KernelGmmu *, struct GMMU_FMT_PTE *, const NvU32); - void (*__kgmmuFmtInitPeerPteFld__)(struct KernelGmmu *, struct GMMU_FMT_PTE *, const NvU32); - void (*__kgmmuFmtInitPte__)(struct KernelGmmu *, struct GMMU_FMT_PTE *, const NvU32, const struct NV_FIELD_ENUM_ENTRY *, const NvBool); - void (*__kgmmuFmtInitPde__)(struct KernelGmmu *, struct GMMU_FMT_PDE *, const NvU32, const struct NV_FIELD_ENUM_ENTRY *); - NvBool (*__kgmmuFmtIsVersionSupported__)(struct KernelGmmu *, NvU32); - void (*__kgmmuFmtInitLevels__)(struct KernelGmmu *, MMU_FMT_LEVEL *, const NvU32, const NvU32, const NvU32); - void (*__kgmmuFmtInitPdeMulti__)(struct KernelGmmu *, struct GMMU_FMT_PDE_MULTI *, const NvU32, const struct NV_FIELD_ENUM_ENTRY *); - NV_STATUS (*__kgmmuFmtFamiliesInit__)(OBJGPU *, struct KernelGmmu *); - NV_STATUS (*__kgmmuTranslatePtePcfFromSw__)(struct KernelGmmu *, NvU32, NvU32 *); - NV_STATUS (*__kgmmuTranslatePtePcfFromHw__)(struct KernelGmmu *, NvU32, NvBool, NvU32 *); - NV_STATUS (*__kgmmuTranslatePdePcfFromSw__)(struct KernelGmmu *, NvU32, NvU32 *); - NV_STATUS (*__kgmmuTranslatePdePcfFromHw__)(struct KernelGmmu *, NvU32, GMMU_APERTURE, NvU32 *); - NV_STATUS (*__kgmmuGetFaultRegisterMappings__)(OBJGPU *, struct KernelGmmu *, NvU32, NvP64 *, NvP64 *, NvP64 *, NvP64 *, NvP64 *, NvP64 *, NvU32 *, NvP64 *); - NV_STATUS (*__kgmmuIssueReplayableFaultBufferFlush__)(OBJGPU *, struct KernelGmmu *, NvBool); - NV_STATUS (*__kgmmuToggleFaultOnPrefetch__)(OBJGPU *, struct KernelGmmu *, NvBool); - NV_STATUS (*__kgmmuFaultBufferAllocSharedMemory__)(OBJGPU *, struct KernelGmmu *, FAULT_BUFFER_TYPE); - void (*__kgmmuFaultBufferFreeSharedMemory__)(OBJGPU *, struct KernelGmmu *, FAULT_BUFFER_TYPE); - NV_STATUS (*__kgmmuSetupWarForBug2720120__)(struct KernelGmmu *, GMMU_FMT_FAMILY *); - NvU32 (*__kgmmuGetGraphicsEngineId__)(struct KernelGmmu *); - NvU32 (*__kgmmuReadShadowBufPutIndex__)(OBJGPU *, struct KernelGmmu *, FAULT_BUFFER_TYPE); - NvBool (*__kgmmuIsFaultEngineBar1__)(struct KernelGmmu *, NvU32); - NvBool (*__kgmmuIsFaultEngineBar2__)(struct KernelGmmu *, NvU32); - NvBool (*__kgmmuIsFaultEnginePhysical__)(struct KernelGmmu *, NvU32); - NV_STATUS (*__kgmmuCopyMmuFaults__)(OBJGPU *, struct KernelGmmu *, struct THREAD_STATE_NODE *, NvU32 *, FAULT_BUFFER_TYPE, NvBool); - NV_STATUS (*__kgmmuParseFaultPacket__)(OBJGPU *, struct KernelGmmu *, NvP64, NvP64); - void (*__kgmmuFaultBufferClearPackets__)(OBJGPU *, struct KernelGmmu *, struct HW_FAULT_BUFFER *, NvU32, NvU32); - GMMU_FAULT_PACKET *(*__kgmmuFaultBufferGetFault__)(OBJGPU *, struct KernelGmmu *, struct HW_FAULT_BUFFER *, NvU32); - NvU32 (*__kgmmuCopyFaultPacketToClientShadowBuffer__)(OBJGPU *, struct KernelGmmu *, struct GMMU_FAULT_BUFFER *, FAULT_BUFFER_TYPE, NvU32, NvU32, NvU32, struct THREAD_STATE_NODE *, NvU32 *); - NvBool (*__kgmmuIsReplayableShadowFaultBufferFull__)(OBJGPU *, struct KernelGmmu *, GMMU_CLIENT_SHADOW_FAULT_BUFFER *, NvU32, NvU32); - NvU32 (*__kgmmuReadClientShadowBufPutIndex__)(OBJGPU *, struct KernelGmmu *, NvU32, FAULT_BUFFER_TYPE); - void (*__kgmmuWriteClientShadowBufPutIndex__)(OBJGPU *, struct KernelGmmu *, NvU32, FAULT_BUFFER_TYPE, NvU32); - NvU32 (*__kgmmuGetMinCeEngineId__)(struct KernelGmmu *); - NvU32 (*__kgmmuGetMaxCeEngineId__)(OBJGPU *, struct KernelGmmu *); - NV_STATUS (*__kgmmuFaultBufferMap__)(OBJGPU *, struct KernelGmmu *, NvU32, NvU32); - NV_STATUS (*__kgmmuFaultBufferUnmap__)(OBJGPU *, struct KernelGmmu *, NvU32, NvU32); - NV_STATUS (*__kgmmuFaultBufferInit__)(OBJGPU *, struct KernelGmmu *); - NV_STATUS (*__kgmmuFaultBufferDestroy__)(OBJGPU *, struct KernelGmmu *); - NV_STATUS (*__kgmmuFaultBufferLoad__)(OBJGPU *, struct KernelGmmu *, NvU32, NvU32); - NV_STATUS (*__kgmmuFaultBufferUnload__)(OBJGPU *, struct KernelGmmu *, NvU32, NvU32); - NV_STATUS (*__kgmmuEnableFaultBuffer__)(OBJGPU *, struct KernelGmmu *, NvU32, NvBool, NvU32); - NV_STATUS (*__kgmmuDisableFaultBuffer__)(OBJGPU *, struct KernelGmmu *, NvU32, NvBool, NvU32); - NvU32 (*__kgmmuSetAndGetDefaultFaultBufferSize__)(OBJGPU *, struct KernelGmmu *, FAULT_BUFFER_TYPE, NvU32); - void (*__kgmmuReadMmuFaultInstHiLo__)(OBJGPU *, struct KernelGmmu *, NvU32 *, NvU32 *); - void (*__kgmmuReadMmuFaultAddrHiLo__)(OBJGPU *, struct KernelGmmu *, NvU32 *, NvU32 *); - NvU32 (*__kgmmuReadMmuFaultInfo__)(OBJGPU *, struct KernelGmmu *); - void (*__kgmmuWriteMmuFaultBufferSize__)(OBJGPU *, struct KernelGmmu *, NvU32, NvU32, NvU32); - void (*__kgmmuWriteMmuFaultBufferHiLo__)(OBJGPU *, struct KernelGmmu *, NvU32, NvU32, NvU32, NvU32); - NV_STATUS (*__kgmmuEnableMmuFaultInterrupts__)(OBJGPU *, struct KernelGmmu *, NvU32); - NV_STATUS (*__kgmmuDisableMmuFaultInterrupts__)(OBJGPU *, struct KernelGmmu *, NvU32); - NV_STATUS (*__kgmmuEnableMmuFaultOverflowIntr__)(OBJGPU *, struct KernelGmmu *, NvU32); - void (*__kgmmuSignExtendFaultAddress__)(OBJGPU *, struct KernelGmmu *, NvU64 *); - NV_STATUS (*__kgmmuGetFaultType__)(OBJGPU *, struct KernelGmmu *, NvU32, FAULT_TYPE *); - NvBool (*__kgmmuIsP2PUnboundInstFault__)(struct KernelGmmu *, NvU32, NvU32); - NV_STATUS (*__kgmmuServiceVfPriFaults__)(OBJGPU *, struct KernelGmmu *, NvU32); - NvBool (*__kgmmuTestVidmemAccessBitBufferError__)(OBJGPU *, struct KernelGmmu *, NvU32); - void (*__kgmmuDisableVidmemAccessBitBuf__)(OBJGPU *, struct KernelGmmu *); - NV_STATUS (*__kgmmuEnableVidmemAccessBitBuf__)(OBJGPU *, struct KernelGmmu *); - void (*__kgmmuClearAccessCounterWriteNak__)(OBJGPU *, struct KernelGmmu *); - NV_STATUS (*__kgmmuServiceMthdBuffFaultInBar2Fault__)(OBJGPU *, struct KernelGmmu *); - NV_STATUS (*__kgmmuFaultCancelTargeted__)(OBJGPU *, struct KernelGmmu *, GMMU_FAULT_CANCEL_INFO *); - NV_STATUS (*__kgmmuFaultCancelIssueInvalidate__)(OBJGPU *, struct KernelGmmu *, GMMU_FAULT_CANCEL_INFO *, TLB_INVALIDATE_PARAMS *, NvBool); - NV_STATUS (*__kgmmuServiceMmuFault__)(OBJGPU *, struct KernelGmmu *, NvP64, FIFO_MMU_EXCEPTION_DATA *); - NV_STATUS (*__kgmmuServiceUnboundInstBlockFault__)(OBJGPU *, struct KernelGmmu *, NvP64, FIFO_MMU_EXCEPTION_DATA *); - NvU32 (*__kgmmuGetEccCounts__)(OBJGPU *, struct KernelGmmu *); - NV_STATUS (*__kgmmuStatePreLoad__)(POBJGPU, struct KernelGmmu *, NvU32); - NV_STATUS (*__kgmmuStatePostUnload__)(POBJGPU, struct KernelGmmu *, NvU32); - NV_STATUS (*__kgmmuStateInitUnlocked__)(POBJGPU, struct KernelGmmu *); - void (*__kgmmuInitMissing__)(POBJGPU, struct KernelGmmu *); - NV_STATUS (*__kgmmuStatePreInitLocked__)(POBJGPU, struct KernelGmmu *); - NV_STATUS (*__kgmmuStatePreInitUnlocked__)(POBJGPU, struct KernelGmmu *); - NvBool (*__kgmmuIsPresent__)(POBJGPU, struct KernelGmmu *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct IntrService *__nvoc_pbase_IntrService; // intrserv super + struct KernelGmmu *__nvoc_pbase_KernelGmmu; // kgmmu + + // Vtable with 85 per-object function pointers + NV_STATUS (*__kgmmuConstructEngine__)(OBJGPU *, struct KernelGmmu * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgmmuStateInitLocked__)(OBJGPU *, struct KernelGmmu * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgmmuStateLoad__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgmmuStateUnload__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgmmuStatePostLoad__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kgmmuStatePreUnload__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + void (*__kgmmuStateDestroy__)(OBJGPU *, struct KernelGmmu * /*this*/); // virtual override (engstate) base (engstate) + void (*__kgmmuRegisterIntrService__)(OBJGPU *, struct KernelGmmu * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) + NvBool (*__kgmmuClearInterrupt__)(OBJGPU *, struct KernelGmmu * /*this*/, IntrServiceClearInterruptArguments *); // virtual override (intrserv) base (intrserv) + NvU32 (*__kgmmuServiceInterrupt__)(OBJGPU *, struct KernelGmmu * /*this*/, IntrServiceServiceInterruptArguments *); // virtual override (intrserv) base (intrserv) + NV_STATUS (*__kgmmuServiceNotificationInterrupt__)(OBJGPU *, struct KernelGmmu * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) body + NV_STATUS (*__kgmmuInstBlkVaLimitGet__)(struct KernelGmmu * /*this*/, struct OBJVASPACE *, NvU32, INST_BLK_INIT_PARAMS *, NvU32 *, NvU64 *); // halified (2 hals) body + NvU32 (*__kgmmuSetTlbInvalidateMembarWarParameters__)(OBJGPU *, struct KernelGmmu * /*this*/, TLB_INVALIDATE_PARAMS *); // halified (2 hals) body + NV_STATUS (*__kgmmuSetTlbInvalidationScope__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, TLB_INVALIDATE_PARAMS *); // halified (2 hals) body + void (*__kgmmuFmtInitPteComptagLine__)(struct KernelGmmu * /*this*/, struct GMMU_FMT_PTE *, const NvU32); // halified (2 hals) body + void (*__kgmmuFmtInitPeerPteFld__)(struct KernelGmmu * /*this*/, struct GMMU_FMT_PTE *, const NvU32); // halified (2 hals) body + void (*__kgmmuFmtInitPte__)(struct KernelGmmu * /*this*/, struct GMMU_FMT_PTE *, const NvU32, const struct NV_FIELD_ENUM_ENTRY *, const NvBool); // halified (2 hals) body + void (*__kgmmuFmtInitPde__)(struct KernelGmmu * /*this*/, struct GMMU_FMT_PDE *, const NvU32, const struct NV_FIELD_ENUM_ENTRY *); // halified (2 hals) body + NvBool (*__kgmmuFmtIsVersionSupported__)(struct KernelGmmu * /*this*/, NvU32); // halified (2 hals) body + void (*__kgmmuFmtInitLevels__)(struct KernelGmmu * /*this*/, MMU_FMT_LEVEL *, const NvU32, const NvU32, const NvU32); // halified (3 hals) body + void (*__kgmmuFmtInitPdeMulti__)(struct KernelGmmu * /*this*/, struct GMMU_FMT_PDE_MULTI *, const NvU32, const struct NV_FIELD_ENUM_ENTRY *); // halified (2 hals) body + NV_STATUS (*__kgmmuFmtFamiliesInit__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body + NV_STATUS (*__kgmmuTranslatePtePcfFromSw__)(struct KernelGmmu * /*this*/, NvU32, NvU32 *); // halified (2 hals) body + NV_STATUS (*__kgmmuTranslatePtePcfFromHw__)(struct KernelGmmu * /*this*/, NvU32, NvBool, NvU32 *); // halified (2 hals) body + NV_STATUS (*__kgmmuTranslatePdePcfFromSw__)(struct KernelGmmu * /*this*/, NvU32, NvU32 *); // halified (2 hals) body + NV_STATUS (*__kgmmuTranslatePdePcfFromHw__)(struct KernelGmmu * /*this*/, NvU32, GMMU_APERTURE, NvU32 *); // halified (2 hals) body + NV_STATUS (*__kgmmuGetFaultRegisterMappings__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvP64 *, NvP64 *, NvP64 *, NvP64 *, NvP64 *, NvP64 *, NvU32 *, NvP64 *); // halified (2 hals) body + NV_STATUS (*__kgmmuIssueReplayableFaultBufferFlush__)(OBJGPU *, struct KernelGmmu * /*this*/, NvBool); // halified (2 hals) body + NV_STATUS (*__kgmmuToggleFaultOnPrefetch__)(OBJGPU *, struct KernelGmmu * /*this*/, NvBool); // halified (2 hals) body + NV_STATUS (*__kgmmuFaultBufferAllocSharedMemory__)(OBJGPU *, struct KernelGmmu * /*this*/, FAULT_BUFFER_TYPE); // halified (2 hals) body + void (*__kgmmuFaultBufferFreeSharedMemory__)(OBJGPU *, struct KernelGmmu * /*this*/, FAULT_BUFFER_TYPE); // halified (2 hals) body + NV_STATUS (*__kgmmuSetupWarForBug2720120__)(struct KernelGmmu * /*this*/); // halified (2 hals) body + NvU32 (*__kgmmuGetGraphicsEngineId__)(struct KernelGmmu * /*this*/); // halified (2 hals) body + NvU32 (*__kgmmuReadShadowBufPutIndex__)(OBJGPU *, struct KernelGmmu * /*this*/, FAULT_BUFFER_TYPE); // halified (2 hals) body + NvBool (*__kgmmuIsFaultEngineBar1__)(struct KernelGmmu * /*this*/, NvU32); // halified (2 hals) body + NvBool (*__kgmmuIsFaultEngineBar2__)(struct KernelGmmu * /*this*/, NvU32); // halified (2 hals) body + NvBool (*__kgmmuIsFaultEnginePhysical__)(struct KernelGmmu * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__kgmmuCopyMmuFaults__)(OBJGPU *, struct KernelGmmu * /*this*/, struct THREAD_STATE_NODE *, NvU32 *, FAULT_BUFFER_TYPE, NvBool); // halified (2 hals) body + NV_STATUS (*__kgmmuParseFaultPacket__)(OBJGPU *, struct KernelGmmu * /*this*/, NvP64, NvP64); // halified (2 hals) body + void (*__kgmmuFaultBufferClearPackets__)(OBJGPU *, struct KernelGmmu * /*this*/, struct HW_FAULT_BUFFER *, NvU32, NvU32); // halified (2 hals) body + GMMU_FAULT_PACKET * (*__kgmmuFaultBufferGetFault__)(OBJGPU *, struct KernelGmmu * /*this*/, struct HW_FAULT_BUFFER *, NvU32); // halified (2 hals) body + NvU32 (*__kgmmuCopyFaultPacketToClientShadowBuffer__)(OBJGPU *, struct KernelGmmu * /*this*/, struct GMMU_FAULT_BUFFER *, FAULT_BUFFER_TYPE, NvU32, NvU32, NvU32, struct THREAD_STATE_NODE *, NvU32 *); // halified (3 hals) body + NvBool (*__kgmmuIsReplayableShadowFaultBufferFull__)(OBJGPU *, struct KernelGmmu * /*this*/, GMMU_CLIENT_SHADOW_FAULT_BUFFER *, NvU32, NvU32); // halified (3 hals) body + NvU32 (*__kgmmuReadClientShadowBufPutIndex__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, FAULT_BUFFER_TYPE); // halified (3 hals) body + void (*__kgmmuWriteClientShadowBufPutIndex__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, FAULT_BUFFER_TYPE, NvU32); // halified (3 hals) body + NvU32 (*__kgmmuGetMinCeEngineId__)(struct KernelGmmu * /*this*/); // halified (2 hals) body + NvU32 (*__kgmmuGetMaxCeEngineId__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (4 hals) body + NV_STATUS (*__kgmmuFaultBufferMap__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvU32); // halified (2 hals) body + NV_STATUS (*__kgmmuFaultBufferUnmap__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvU32); // halified (2 hals) body + NV_STATUS (*__kgmmuFaultBufferInit__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body + NV_STATUS (*__kgmmuFaultBufferDestroy__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body + NV_STATUS (*__kgmmuFaultBufferLoad__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvU32); // halified (2 hals) body + NV_STATUS (*__kgmmuFaultBufferUnload__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvU32); // halified (2 hals) body + NV_STATUS (*__kgmmuEnableFaultBuffer__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvBool, NvU32); // halified (2 hals) body + NV_STATUS (*__kgmmuDisableFaultBuffer__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvBool, NvU32); // halified (2 hals) body + NvU32 (*__kgmmuSetAndGetDefaultFaultBufferSize__)(OBJGPU *, struct KernelGmmu * /*this*/, FAULT_BUFFER_TYPE, NvU32); // halified (2 hals) body + void (*__kgmmuReadMmuFaultInstHiLo__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32 *, NvU32 *); // halified (2 hals) body + void (*__kgmmuReadMmuFaultAddrHiLo__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32 *, NvU32 *); // halified (2 hals) body + NvU32 (*__kgmmuReadMmuFaultInfo__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body + void (*__kgmmuWriteMmuFaultBufferSize__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvU32, NvU32); // halified (2 hals) body + void (*__kgmmuWriteMmuFaultBufferHiLo__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvU32, NvU32, NvU32); // halified (2 hals) body + NV_STATUS (*__kgmmuEnableMmuFaultInterrupts__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__kgmmuDisableMmuFaultInterrupts__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__kgmmuEnableMmuFaultOverflowIntr__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // halified (2 hals) body + void (*__kgmmuSignExtendFaultAddress__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU64 *); // halified (3 hals) body + NV_STATUS (*__kgmmuGetFaultType__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, FAULT_TYPE *); // halified (2 hals) body + NvBool (*__kgmmuIsP2PUnboundInstFault__)(struct KernelGmmu * /*this*/, NvU32, NvU32); // halified (3 hals) body + NV_STATUS (*__kgmmuServiceVfPriFaults__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // halified (2 hals) body + NvBool (*__kgmmuTestVidmemAccessBitBufferError__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // halified (2 hals) body + void (*__kgmmuDisableVidmemAccessBitBuf__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body + NV_STATUS (*__kgmmuEnableVidmemAccessBitBuf__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body + void (*__kgmmuClearAccessCounterWriteNak__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body + NV_STATUS (*__kgmmuServiceMthdBuffFaultInBar2Fault__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body + NV_STATUS (*__kgmmuFaultCancelTargeted__)(OBJGPU *, struct KernelGmmu * /*this*/, GMMU_FAULT_CANCEL_INFO *); // halified (2 hals) body + NV_STATUS (*__kgmmuFaultCancelIssueInvalidate__)(OBJGPU *, struct KernelGmmu * /*this*/, GMMU_FAULT_CANCEL_INFO *, TLB_INVALIDATE_PARAMS *, NvBool); // halified (2 hals) body + NV_STATUS (*__kgmmuServiceMmuFault__)(OBJGPU *, struct KernelGmmu * /*this*/, NvP64, FIFO_MMU_EXCEPTION_DATA *); // halified (2 hals) body + NV_STATUS (*__kgmmuServiceUnboundInstBlockFault__)(OBJGPU *, struct KernelGmmu * /*this*/, NvP64, FIFO_MMU_EXCEPTION_DATA *); // halified (2 hals) body + NvU32 (*__kgmmuGetEccCounts__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body + void (*__kgmmuInitMissing__)(POBJGPU, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgmmuStatePreInitLocked__)(POBJGPU, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgmmuStatePreInitUnlocked__)(POBJGPU, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgmmuStateInitUnlocked__)(POBJGPU, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgmmuStatePreLoad__)(POBJGPU, struct KernelGmmu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgmmuStatePostUnload__)(POBJGPU, struct KernelGmmu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__kgmmuIsPresent__)(POBJGPU, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) + + // 4 PDB properties NvBool PDB_PROP_KGMMU_SYSMEM_FAULT_BUFFER_GPU_UNCACHED; NvBool PDB_PROP_KGMMU_FAULT_BUFFER_DISABLED; NvBool PDB_PROP_KGMMU_REPLAYABLE_FAULT_BUFFER_IN_USE; NvBool PDB_PROP_KGMMU_REDUCE_NR_FAULT_BUFFER_SIZE; + + // Data members NvBool bReportFlaTranslationXid; NV2080_CTRL_INTERNAL_GMMU_GET_STATIC_INFO_PARAMS *pStaticInfo; NvU64 defaultBigPageSize; @@ -635,6 +679,7 @@ typedef struct KernelGmmu KernelGmmu; #define __nvoc_class_id_KernelGmmu 0x29362f #endif /* __nvoc_class_id_KernelGmmu */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGmmu; #define __staticCast_KernelGmmu(pThis) \ @@ -647,6 +692,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGmmu; ((KernelGmmu*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelGmmu))) #endif //__nvoc_kern_gmmu_h_disabled +// Property macros #define PDB_PROP_KGMMU_REDUCE_NR_FAULT_BUFFER_SIZE_BASE_CAST #define PDB_PROP_KGMMU_REDUCE_NR_FAULT_BUFFER_SIZE_BASE_NAME PDB_PROP_KGMMU_REDUCE_NR_FAULT_BUFFER_SIZE #define PDB_PROP_KGMMU_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. @@ -664,358 +710,801 @@ NV_STATUS __nvoc_objCreate_KernelGmmu(KernelGmmu**, Dynamic*, NvU32); #define __objCreate_KernelGmmu(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelGmmu((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define kgmmuConstructEngine(pGpu, pKernelGmmu, arg0) kgmmuConstructEngine_DISPATCH(pGpu, pKernelGmmu, arg0) + +// Wrapper macros +#define kgmmuConstructEngine_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuConstructEngine__ +#define kgmmuConstructEngine(pGpu, pKernelGmmu, arg3) kgmmuConstructEngine_DISPATCH(pGpu, pKernelGmmu, arg3) +#define kgmmuStateInitLocked_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuStateInitLocked__ #define kgmmuStateInitLocked(pGpu, pKernelGmmu) kgmmuStateInitLocked_DISPATCH(pGpu, pKernelGmmu) -#define kgmmuStateLoad(pGpu, pKernelGmmu, arg0) kgmmuStateLoad_DISPATCH(pGpu, pKernelGmmu, arg0) -#define kgmmuStateUnload(pGpu, pKernelGmmu, arg0) kgmmuStateUnload_DISPATCH(pGpu, pKernelGmmu, arg0) -#define kgmmuStatePostLoad(pGpu, pKernelGmmu, arg0) kgmmuStatePostLoad_DISPATCH(pGpu, pKernelGmmu, arg0) -#define kgmmuStatePostLoad_HAL(pGpu, pKernelGmmu, arg0) kgmmuStatePostLoad_DISPATCH(pGpu, pKernelGmmu, arg0) -#define kgmmuStatePreUnload(pGpu, pKernelGmmu, arg0) kgmmuStatePreUnload_DISPATCH(pGpu, pKernelGmmu, arg0) -#define kgmmuStatePreUnload_HAL(pGpu, pKernelGmmu, arg0) kgmmuStatePreUnload_DISPATCH(pGpu, pKernelGmmu, arg0) +#define kgmmuStateLoad_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuStateLoad__ +#define kgmmuStateLoad(pGpu, pKernelGmmu, arg3) kgmmuStateLoad_DISPATCH(pGpu, pKernelGmmu, arg3) +#define kgmmuStateUnload_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuStateUnload__ +#define kgmmuStateUnload(pGpu, pKernelGmmu, arg3) kgmmuStateUnload_DISPATCH(pGpu, pKernelGmmu, arg3) +#define kgmmuStatePostLoad_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuStatePostLoad__ +#define kgmmuStatePostLoad(pGpu, pKernelGmmu, arg3) kgmmuStatePostLoad_DISPATCH(pGpu, pKernelGmmu, arg3) +#define kgmmuStatePostLoad_HAL(pGpu, pKernelGmmu, arg3) kgmmuStatePostLoad_DISPATCH(pGpu, pKernelGmmu, arg3) +#define kgmmuStatePreUnload_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuStatePreUnload__ +#define kgmmuStatePreUnload(pGpu, pKernelGmmu, arg3) kgmmuStatePreUnload_DISPATCH(pGpu, pKernelGmmu, arg3) +#define kgmmuStatePreUnload_HAL(pGpu, pKernelGmmu, arg3) kgmmuStatePreUnload_DISPATCH(pGpu, pKernelGmmu, arg3) +#define kgmmuStateDestroy_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuStateDestroy__ #define kgmmuStateDestroy(pGpu, pKernelGmmu) kgmmuStateDestroy_DISPATCH(pGpu, pKernelGmmu) -#define kgmmuRegisterIntrService(pGpu, pKernelGmmu, arg0) kgmmuRegisterIntrService_DISPATCH(pGpu, pKernelGmmu, arg0) +#define kgmmuRegisterIntrService_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuRegisterIntrService__ +#define kgmmuRegisterIntrService(pGpu, pKernelGmmu, arg3) kgmmuRegisterIntrService_DISPATCH(pGpu, pKernelGmmu, arg3) +#define kgmmuClearInterrupt_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuClearInterrupt__ #define kgmmuClearInterrupt(pGpu, pKernelGmmu, pParams) kgmmuClearInterrupt_DISPATCH(pGpu, pKernelGmmu, pParams) +#define kgmmuServiceInterrupt_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuServiceInterrupt__ #define kgmmuServiceInterrupt(pGpu, pKernelGmmu, pParams) kgmmuServiceInterrupt_DISPATCH(pGpu, pKernelGmmu, pParams) +#define kgmmuServiceNotificationInterrupt_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuServiceNotificationInterrupt__ #define kgmmuServiceNotificationInterrupt(pGpu, pKernelGmmu, pParams) kgmmuServiceNotificationInterrupt_DISPATCH(pGpu, pKernelGmmu, pParams) #define kgmmuServiceNotificationInterrupt_HAL(pGpu, pKernelGmmu, pParams) kgmmuServiceNotificationInterrupt_DISPATCH(pGpu, pKernelGmmu, pParams) +#define kgmmuInstBlkVaLimitGet_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuInstBlkVaLimitGet__ #define kgmmuInstBlkVaLimitGet(pKernelGmmu, pVAS, subctxId, pParams, pOffset, pData) kgmmuInstBlkVaLimitGet_DISPATCH(pKernelGmmu, pVAS, subctxId, pParams, pOffset, pData) #define kgmmuInstBlkVaLimitGet_HAL(pKernelGmmu, pVAS, subctxId, pParams, pOffset, pData) kgmmuInstBlkVaLimitGet_DISPATCH(pKernelGmmu, pVAS, subctxId, pParams, pOffset, pData) +#define kgmmuSetTlbInvalidateMembarWarParameters_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuSetTlbInvalidateMembarWarParameters__ #define kgmmuSetTlbInvalidateMembarWarParameters(pGpu, pKernelGmmu, pParams) kgmmuSetTlbInvalidateMembarWarParameters_DISPATCH(pGpu, pKernelGmmu, pParams) #define kgmmuSetTlbInvalidateMembarWarParameters_HAL(pGpu, pKernelGmmu, pParams) kgmmuSetTlbInvalidateMembarWarParameters_DISPATCH(pGpu, pKernelGmmu, pParams) +#define kgmmuSetTlbInvalidationScope_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuSetTlbInvalidationScope__ #define kgmmuSetTlbInvalidationScope(pGpu, pKernelGmmu, flags, pParams) kgmmuSetTlbInvalidationScope_DISPATCH(pGpu, pKernelGmmu, flags, pParams) #define kgmmuSetTlbInvalidationScope_HAL(pGpu, pKernelGmmu, flags, pParams) kgmmuSetTlbInvalidationScope_DISPATCH(pGpu, pKernelGmmu, flags, pParams) +#define kgmmuFmtInitPteComptagLine_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFmtInitPteComptagLine__ #define kgmmuFmtInitPteComptagLine(pKernelGmmu, pPte, version) kgmmuFmtInitPteComptagLine_DISPATCH(pKernelGmmu, pPte, version) #define kgmmuFmtInitPteComptagLine_HAL(pKernelGmmu, pPte, version) kgmmuFmtInitPteComptagLine_DISPATCH(pKernelGmmu, pPte, version) +#define kgmmuFmtInitPeerPteFld_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFmtInitPeerPteFld__ #define kgmmuFmtInitPeerPteFld(pKernelGmmu, pPte, version) kgmmuFmtInitPeerPteFld_DISPATCH(pKernelGmmu, pPte, version) #define kgmmuFmtInitPeerPteFld_HAL(pKernelGmmu, pPte, version) kgmmuFmtInitPeerPteFld_DISPATCH(pKernelGmmu, pPte, version) +#define kgmmuFmtInitPte_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFmtInitPte__ #define kgmmuFmtInitPte(pKernelGmmu, pPte, version, pPteApertures, bUnifiedAperture) kgmmuFmtInitPte_DISPATCH(pKernelGmmu, pPte, version, pPteApertures, bUnifiedAperture) #define kgmmuFmtInitPte_HAL(pKernelGmmu, pPte, version, pPteApertures, bUnifiedAperture) kgmmuFmtInitPte_DISPATCH(pKernelGmmu, pPte, version, pPteApertures, bUnifiedAperture) +#define kgmmuFmtInitPde_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFmtInitPde__ #define kgmmuFmtInitPde(pKernelGmmu, pPde, version, pPdeApertures) kgmmuFmtInitPde_DISPATCH(pKernelGmmu, pPde, version, pPdeApertures) #define kgmmuFmtInitPde_HAL(pKernelGmmu, pPde, version, pPdeApertures) kgmmuFmtInitPde_DISPATCH(pKernelGmmu, pPde, version, pPdeApertures) +#define kgmmuFmtIsVersionSupported_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFmtIsVersionSupported__ #define kgmmuFmtIsVersionSupported(pKernelGmmu, version) kgmmuFmtIsVersionSupported_DISPATCH(pKernelGmmu, version) #define kgmmuFmtIsVersionSupported_HAL(pKernelGmmu, version) kgmmuFmtIsVersionSupported_DISPATCH(pKernelGmmu, version) +#define kgmmuFmtInitLevels_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFmtInitLevels__ #define kgmmuFmtInitLevels(pKernelGmmu, pLevels, numLevels, version, bigPageShift) kgmmuFmtInitLevels_DISPATCH(pKernelGmmu, pLevels, numLevels, version, bigPageShift) #define kgmmuFmtInitLevels_HAL(pKernelGmmu, pLevels, numLevels, version, bigPageShift) kgmmuFmtInitLevels_DISPATCH(pKernelGmmu, pLevels, numLevels, version, bigPageShift) +#define kgmmuFmtInitPdeMulti_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFmtInitPdeMulti__ #define kgmmuFmtInitPdeMulti(pKernelGmmu, pPdeMulti, version, pPdeApertures) kgmmuFmtInitPdeMulti_DISPATCH(pKernelGmmu, pPdeMulti, version, pPdeApertures) #define kgmmuFmtInitPdeMulti_HAL(pKernelGmmu, pPdeMulti, version, pPdeApertures) kgmmuFmtInitPdeMulti_DISPATCH(pKernelGmmu, pPdeMulti, version, pPdeApertures) +#define kgmmuFmtFamiliesInit_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFmtFamiliesInit__ #define kgmmuFmtFamiliesInit(pGpu, pKernelGmmu) kgmmuFmtFamiliesInit_DISPATCH(pGpu, pKernelGmmu) #define kgmmuFmtFamiliesInit_HAL(pGpu, pKernelGmmu) kgmmuFmtFamiliesInit_DISPATCH(pGpu, pKernelGmmu) -#define kgmmuTranslatePtePcfFromSw(pKernelGmmu, arg0, arg1) kgmmuTranslatePtePcfFromSw_DISPATCH(pKernelGmmu, arg0, arg1) -#define kgmmuTranslatePtePcfFromSw_HAL(pKernelGmmu, arg0, arg1) kgmmuTranslatePtePcfFromSw_DISPATCH(pKernelGmmu, arg0, arg1) -#define kgmmuTranslatePtePcfFromHw(pKernelGmmu, arg0, arg1, arg2) kgmmuTranslatePtePcfFromHw_DISPATCH(pKernelGmmu, arg0, arg1, arg2) -#define kgmmuTranslatePtePcfFromHw_HAL(pKernelGmmu, arg0, arg1, arg2) kgmmuTranslatePtePcfFromHw_DISPATCH(pKernelGmmu, arg0, arg1, arg2) -#define kgmmuTranslatePdePcfFromSw(pKernelGmmu, arg0, arg1) kgmmuTranslatePdePcfFromSw_DISPATCH(pKernelGmmu, arg0, arg1) -#define kgmmuTranslatePdePcfFromSw_HAL(pKernelGmmu, arg0, arg1) kgmmuTranslatePdePcfFromSw_DISPATCH(pKernelGmmu, arg0, arg1) -#define kgmmuTranslatePdePcfFromHw(pKernelGmmu, arg0, arg1, arg2) kgmmuTranslatePdePcfFromHw_DISPATCH(pKernelGmmu, arg0, arg1, arg2) -#define kgmmuTranslatePdePcfFromHw_HAL(pKernelGmmu, arg0, arg1, arg2) kgmmuTranslatePdePcfFromHw_DISPATCH(pKernelGmmu, arg0, arg1, arg2) +#define kgmmuTranslatePtePcfFromSw_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuTranslatePtePcfFromSw__ +#define kgmmuTranslatePtePcfFromSw(pKernelGmmu, arg2, arg3) kgmmuTranslatePtePcfFromSw_DISPATCH(pKernelGmmu, arg2, arg3) +#define kgmmuTranslatePtePcfFromSw_HAL(pKernelGmmu, arg2, arg3) kgmmuTranslatePtePcfFromSw_DISPATCH(pKernelGmmu, arg2, arg3) +#define kgmmuTranslatePtePcfFromHw_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuTranslatePtePcfFromHw__ +#define kgmmuTranslatePtePcfFromHw(pKernelGmmu, arg2, arg3, arg4) kgmmuTranslatePtePcfFromHw_DISPATCH(pKernelGmmu, arg2, arg3, arg4) +#define kgmmuTranslatePtePcfFromHw_HAL(pKernelGmmu, arg2, arg3, arg4) kgmmuTranslatePtePcfFromHw_DISPATCH(pKernelGmmu, arg2, arg3, arg4) +#define kgmmuTranslatePdePcfFromSw_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuTranslatePdePcfFromSw__ +#define kgmmuTranslatePdePcfFromSw(pKernelGmmu, arg2, arg3) kgmmuTranslatePdePcfFromSw_DISPATCH(pKernelGmmu, arg2, arg3) +#define kgmmuTranslatePdePcfFromSw_HAL(pKernelGmmu, arg2, arg3) kgmmuTranslatePdePcfFromSw_DISPATCH(pKernelGmmu, arg2, arg3) +#define kgmmuTranslatePdePcfFromHw_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuTranslatePdePcfFromHw__ +#define kgmmuTranslatePdePcfFromHw(pKernelGmmu, arg2, arg3, arg4) kgmmuTranslatePdePcfFromHw_DISPATCH(pKernelGmmu, arg2, arg3, arg4) +#define kgmmuTranslatePdePcfFromHw_HAL(pKernelGmmu, arg2, arg3, arg4) kgmmuTranslatePdePcfFromHw_DISPATCH(pKernelGmmu, arg2, arg3, arg4) +#define kgmmuGetFaultRegisterMappings_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuGetFaultRegisterMappings__ #define kgmmuGetFaultRegisterMappings(pGpu, pKernelGmmu, index, pFaultBufferGet, pFaultBufferPut, pFaultBufferInfo, faultIntr, faultIntrSet, faultIntrClear, faultMask, pPrefetchCtrl) kgmmuGetFaultRegisterMappings_DISPATCH(pGpu, pKernelGmmu, index, pFaultBufferGet, pFaultBufferPut, pFaultBufferInfo, faultIntr, faultIntrSet, faultIntrClear, faultMask, pPrefetchCtrl) #define kgmmuGetFaultRegisterMappings_HAL(pGpu, pKernelGmmu, index, pFaultBufferGet, pFaultBufferPut, pFaultBufferInfo, faultIntr, faultIntrSet, faultIntrClear, faultMask, pPrefetchCtrl) kgmmuGetFaultRegisterMappings_DISPATCH(pGpu, pKernelGmmu, index, pFaultBufferGet, pFaultBufferPut, pFaultBufferInfo, faultIntr, faultIntrSet, faultIntrClear, faultMask, pPrefetchCtrl) +#define kgmmuIssueReplayableFaultBufferFlush_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuIssueReplayableFaultBufferFlush__ #define kgmmuIssueReplayableFaultBufferFlush(pGpu, pKernelGmmu, bCopyAndFlush) kgmmuIssueReplayableFaultBufferFlush_DISPATCH(pGpu, pKernelGmmu, bCopyAndFlush) #define kgmmuIssueReplayableFaultBufferFlush_HAL(pGpu, pKernelGmmu, bCopyAndFlush) kgmmuIssueReplayableFaultBufferFlush_DISPATCH(pGpu, pKernelGmmu, bCopyAndFlush) +#define kgmmuToggleFaultOnPrefetch_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuToggleFaultOnPrefetch__ #define kgmmuToggleFaultOnPrefetch(pGpu, pKernelGmmu, bEnable) kgmmuToggleFaultOnPrefetch_DISPATCH(pGpu, pKernelGmmu, bEnable) #define kgmmuToggleFaultOnPrefetch_HAL(pGpu, pKernelGmmu, bEnable) kgmmuToggleFaultOnPrefetch_DISPATCH(pGpu, pKernelGmmu, bEnable) -#define kgmmuFaultBufferAllocSharedMemory(pGpu, pKernelGmmu, arg0) kgmmuFaultBufferAllocSharedMemory_DISPATCH(pGpu, pKernelGmmu, arg0) -#define kgmmuFaultBufferAllocSharedMemory_HAL(pGpu, pKernelGmmu, arg0) kgmmuFaultBufferAllocSharedMemory_DISPATCH(pGpu, pKernelGmmu, arg0) -#define kgmmuFaultBufferFreeSharedMemory(pGpu, pKernelGmmu, arg0) kgmmuFaultBufferFreeSharedMemory_DISPATCH(pGpu, pKernelGmmu, arg0) -#define kgmmuFaultBufferFreeSharedMemory_HAL(pGpu, pKernelGmmu, arg0) kgmmuFaultBufferFreeSharedMemory_DISPATCH(pGpu, pKernelGmmu, arg0) -#define kgmmuSetupWarForBug2720120(pKernelGmmu, pFam) kgmmuSetupWarForBug2720120_DISPATCH(pKernelGmmu, pFam) -#define kgmmuSetupWarForBug2720120_HAL(pKernelGmmu, pFam) kgmmuSetupWarForBug2720120_DISPATCH(pKernelGmmu, pFam) +#define kgmmuFaultBufferAllocSharedMemory_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFaultBufferAllocSharedMemory__ +#define kgmmuFaultBufferAllocSharedMemory(pGpu, pKernelGmmu, arg3) kgmmuFaultBufferAllocSharedMemory_DISPATCH(pGpu, pKernelGmmu, arg3) +#define kgmmuFaultBufferAllocSharedMemory_HAL(pGpu, pKernelGmmu, arg3) kgmmuFaultBufferAllocSharedMemory_DISPATCH(pGpu, pKernelGmmu, arg3) +#define kgmmuFaultBufferFreeSharedMemory_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFaultBufferFreeSharedMemory__ +#define kgmmuFaultBufferFreeSharedMemory(pGpu, pKernelGmmu, arg3) kgmmuFaultBufferFreeSharedMemory_DISPATCH(pGpu, pKernelGmmu, arg3) +#define kgmmuFaultBufferFreeSharedMemory_HAL(pGpu, pKernelGmmu, arg3) kgmmuFaultBufferFreeSharedMemory_DISPATCH(pGpu, pKernelGmmu, arg3) +#define kgmmuSetupWarForBug2720120_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuSetupWarForBug2720120__ +#define kgmmuSetupWarForBug2720120(pKernelGmmu) kgmmuSetupWarForBug2720120_DISPATCH(pKernelGmmu) +#define kgmmuSetupWarForBug2720120_HAL(pKernelGmmu) kgmmuSetupWarForBug2720120_DISPATCH(pKernelGmmu) +#define kgmmuGetGraphicsEngineId_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuGetGraphicsEngineId__ #define kgmmuGetGraphicsEngineId(pKernelGmmu) kgmmuGetGraphicsEngineId_DISPATCH(pKernelGmmu) #define kgmmuGetGraphicsEngineId_HAL(pKernelGmmu) kgmmuGetGraphicsEngineId_DISPATCH(pKernelGmmu) +#define kgmmuReadShadowBufPutIndex_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuReadShadowBufPutIndex__ #define kgmmuReadShadowBufPutIndex(pGpu, pKernelGmmu, type) kgmmuReadShadowBufPutIndex_DISPATCH(pGpu, pKernelGmmu, type) #define kgmmuReadShadowBufPutIndex_HAL(pGpu, pKernelGmmu, type) kgmmuReadShadowBufPutIndex_DISPATCH(pGpu, pKernelGmmu, type) -#define kgmmuIsFaultEngineBar1(pKernelGmmu, arg0) kgmmuIsFaultEngineBar1_DISPATCH(pKernelGmmu, arg0) -#define kgmmuIsFaultEngineBar1_HAL(pKernelGmmu, arg0) kgmmuIsFaultEngineBar1_DISPATCH(pKernelGmmu, arg0) -#define kgmmuIsFaultEngineBar2(pKernelGmmu, arg0) kgmmuIsFaultEngineBar2_DISPATCH(pKernelGmmu, arg0) -#define kgmmuIsFaultEngineBar2_HAL(pKernelGmmu, arg0) kgmmuIsFaultEngineBar2_DISPATCH(pKernelGmmu, arg0) -#define kgmmuIsFaultEnginePhysical(pKernelGmmu, arg0) kgmmuIsFaultEnginePhysical_DISPATCH(pKernelGmmu, arg0) -#define kgmmuIsFaultEnginePhysical_HAL(pKernelGmmu, arg0) kgmmuIsFaultEnginePhysical_DISPATCH(pKernelGmmu, arg0) +#define kgmmuIsFaultEngineBar1_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuIsFaultEngineBar1__ +#define kgmmuIsFaultEngineBar1(pKernelGmmu, arg2) kgmmuIsFaultEngineBar1_DISPATCH(pKernelGmmu, arg2) +#define kgmmuIsFaultEngineBar1_HAL(pKernelGmmu, arg2) kgmmuIsFaultEngineBar1_DISPATCH(pKernelGmmu, arg2) +#define kgmmuIsFaultEngineBar2_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuIsFaultEngineBar2__ +#define kgmmuIsFaultEngineBar2(pKernelGmmu, arg2) kgmmuIsFaultEngineBar2_DISPATCH(pKernelGmmu, arg2) +#define kgmmuIsFaultEngineBar2_HAL(pKernelGmmu, arg2) kgmmuIsFaultEngineBar2_DISPATCH(pKernelGmmu, arg2) +#define kgmmuIsFaultEnginePhysical_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuIsFaultEnginePhysical__ +#define kgmmuIsFaultEnginePhysical(pKernelGmmu, arg2) kgmmuIsFaultEnginePhysical_DISPATCH(pKernelGmmu, arg2) +#define kgmmuIsFaultEnginePhysical_HAL(pKernelGmmu, arg2) kgmmuIsFaultEnginePhysical_DISPATCH(pKernelGmmu, arg2) +#define kgmmuCopyMmuFaults_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuCopyMmuFaults__ #define kgmmuCopyMmuFaults(pGpu, pKernelGmmu, pThreadState, entriesCopied, type, bPollForValidBit) kgmmuCopyMmuFaults_DISPATCH(pGpu, pKernelGmmu, pThreadState, entriesCopied, type, bPollForValidBit) #define kgmmuCopyMmuFaults_HAL(pGpu, pKernelGmmu, pThreadState, entriesCopied, type, bPollForValidBit) kgmmuCopyMmuFaults_DISPATCH(pGpu, pKernelGmmu, pThreadState, entriesCopied, type, bPollForValidBit) +#define kgmmuParseFaultPacket_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuParseFaultPacket__ #define kgmmuParseFaultPacket(pGpu, pKernelGmmu, pFaultPacket, pParsedFaultEntry) kgmmuParseFaultPacket_DISPATCH(pGpu, pKernelGmmu, pFaultPacket, pParsedFaultEntry) #define kgmmuParseFaultPacket_HAL(pGpu, pKernelGmmu, pFaultPacket, pParsedFaultEntry) kgmmuParseFaultPacket_DISPATCH(pGpu, pKernelGmmu, pFaultPacket, pParsedFaultEntry) +#define kgmmuFaultBufferClearPackets_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFaultBufferClearPackets__ #define kgmmuFaultBufferClearPackets(pGpu, pKernelGmmu, pFaultBuffer, beginIdx, numFaultPackets) kgmmuFaultBufferClearPackets_DISPATCH(pGpu, pKernelGmmu, pFaultBuffer, beginIdx, numFaultPackets) #define kgmmuFaultBufferClearPackets_HAL(pGpu, pKernelGmmu, pFaultBuffer, beginIdx, numFaultPackets) kgmmuFaultBufferClearPackets_DISPATCH(pGpu, pKernelGmmu, pFaultBuffer, beginIdx, numFaultPackets) +#define kgmmuFaultBufferGetFault_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFaultBufferGetFault__ #define kgmmuFaultBufferGetFault(pGpu, pKernelGmmu, pFaultBuffer, idx) kgmmuFaultBufferGetFault_DISPATCH(pGpu, pKernelGmmu, pFaultBuffer, idx) #define kgmmuFaultBufferGetFault_HAL(pGpu, pKernelGmmu, pFaultBuffer, idx) kgmmuFaultBufferGetFault_DISPATCH(pGpu, pKernelGmmu, pFaultBuffer, idx) +#define kgmmuCopyFaultPacketToClientShadowBuffer_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuCopyFaultPacketToClientShadowBuffer__ #define kgmmuCopyFaultPacketToClientShadowBuffer(pGpu, pKernelGmmu, pFaultBuffer, type, getIndex, shadowBufPutIndex, maxBufferEntries, pThreadState, pFaultsCopied) kgmmuCopyFaultPacketToClientShadowBuffer_DISPATCH(pGpu, pKernelGmmu, pFaultBuffer, type, getIndex, shadowBufPutIndex, maxBufferEntries, pThreadState, pFaultsCopied) #define kgmmuCopyFaultPacketToClientShadowBuffer_HAL(pGpu, pKernelGmmu, pFaultBuffer, type, getIndex, shadowBufPutIndex, maxBufferEntries, pThreadState, pFaultsCopied) kgmmuCopyFaultPacketToClientShadowBuffer_DISPATCH(pGpu, pKernelGmmu, pFaultBuffer, type, getIndex, shadowBufPutIndex, maxBufferEntries, pThreadState, pFaultsCopied) +#define kgmmuIsReplayableShadowFaultBufferFull_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuIsReplayableShadowFaultBufferFull__ #define kgmmuIsReplayableShadowFaultBufferFull(pGpu, pKernelGmmu, pClientFaultBuf, shadowBufPutIndex, maxBufferEntries) kgmmuIsReplayableShadowFaultBufferFull_DISPATCH(pGpu, pKernelGmmu, pClientFaultBuf, shadowBufPutIndex, maxBufferEntries) #define kgmmuIsReplayableShadowFaultBufferFull_HAL(pGpu, pKernelGmmu, pClientFaultBuf, shadowBufPutIndex, maxBufferEntries) kgmmuIsReplayableShadowFaultBufferFull_DISPATCH(pGpu, pKernelGmmu, pClientFaultBuf, shadowBufPutIndex, maxBufferEntries) +#define kgmmuReadClientShadowBufPutIndex_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuReadClientShadowBufPutIndex__ #define kgmmuReadClientShadowBufPutIndex(pGpu, pKernelGmmu, gfid, type) kgmmuReadClientShadowBufPutIndex_DISPATCH(pGpu, pKernelGmmu, gfid, type) #define kgmmuReadClientShadowBufPutIndex_HAL(pGpu, pKernelGmmu, gfid, type) kgmmuReadClientShadowBufPutIndex_DISPATCH(pGpu, pKernelGmmu, gfid, type) +#define kgmmuWriteClientShadowBufPutIndex_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuWriteClientShadowBufPutIndex__ #define kgmmuWriteClientShadowBufPutIndex(pGpu, pKernelGmmu, gfid, type, putIndex) kgmmuWriteClientShadowBufPutIndex_DISPATCH(pGpu, pKernelGmmu, gfid, type, putIndex) #define kgmmuWriteClientShadowBufPutIndex_HAL(pGpu, pKernelGmmu, gfid, type, putIndex) kgmmuWriteClientShadowBufPutIndex_DISPATCH(pGpu, pKernelGmmu, gfid, type, putIndex) +#define kgmmuGetMinCeEngineId_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuGetMinCeEngineId__ #define kgmmuGetMinCeEngineId(pKernelGmmu) kgmmuGetMinCeEngineId_DISPATCH(pKernelGmmu) #define kgmmuGetMinCeEngineId_HAL(pKernelGmmu) kgmmuGetMinCeEngineId_DISPATCH(pKernelGmmu) +#define kgmmuGetMaxCeEngineId_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuGetMaxCeEngineId__ #define kgmmuGetMaxCeEngineId(pGpu, pKernelGmmu) kgmmuGetMaxCeEngineId_DISPATCH(pGpu, pKernelGmmu) #define kgmmuGetMaxCeEngineId_HAL(pGpu, pKernelGmmu) kgmmuGetMaxCeEngineId_DISPATCH(pGpu, pKernelGmmu) +#define kgmmuFaultBufferMap_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFaultBufferMap__ #define kgmmuFaultBufferMap(pGpu, pKernelGmmu, index, gfid) kgmmuFaultBufferMap_DISPATCH(pGpu, pKernelGmmu, index, gfid) #define kgmmuFaultBufferMap_HAL(pGpu, pKernelGmmu, index, gfid) kgmmuFaultBufferMap_DISPATCH(pGpu, pKernelGmmu, index, gfid) +#define kgmmuFaultBufferUnmap_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFaultBufferUnmap__ #define kgmmuFaultBufferUnmap(pGpu, pKernelGmmu, index, gfid) kgmmuFaultBufferUnmap_DISPATCH(pGpu, pKernelGmmu, index, gfid) #define kgmmuFaultBufferUnmap_HAL(pGpu, pKernelGmmu, index, gfid) kgmmuFaultBufferUnmap_DISPATCH(pGpu, pKernelGmmu, index, gfid) +#define kgmmuFaultBufferInit_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFaultBufferInit__ #define kgmmuFaultBufferInit(pGpu, pKernelGmmu) kgmmuFaultBufferInit_DISPATCH(pGpu, pKernelGmmu) #define kgmmuFaultBufferInit_HAL(pGpu, pKernelGmmu) kgmmuFaultBufferInit_DISPATCH(pGpu, pKernelGmmu) +#define kgmmuFaultBufferDestroy_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFaultBufferDestroy__ #define kgmmuFaultBufferDestroy(pGpu, pKernelGmmu) kgmmuFaultBufferDestroy_DISPATCH(pGpu, pKernelGmmu) #define kgmmuFaultBufferDestroy_HAL(pGpu, pKernelGmmu) kgmmuFaultBufferDestroy_DISPATCH(pGpu, pKernelGmmu) +#define kgmmuFaultBufferLoad_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFaultBufferLoad__ #define kgmmuFaultBufferLoad(pGpu, pKernelGmmu, index, gfid) kgmmuFaultBufferLoad_DISPATCH(pGpu, pKernelGmmu, index, gfid) #define kgmmuFaultBufferLoad_HAL(pGpu, pKernelGmmu, index, gfid) kgmmuFaultBufferLoad_DISPATCH(pGpu, pKernelGmmu, index, gfid) +#define kgmmuFaultBufferUnload_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFaultBufferUnload__ #define kgmmuFaultBufferUnload(pGpu, pKernelGmmu, index, gfid) kgmmuFaultBufferUnload_DISPATCH(pGpu, pKernelGmmu, index, gfid) #define kgmmuFaultBufferUnload_HAL(pGpu, pKernelGmmu, index, gfid) kgmmuFaultBufferUnload_DISPATCH(pGpu, pKernelGmmu, index, gfid) +#define kgmmuEnableFaultBuffer_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuEnableFaultBuffer__ #define kgmmuEnableFaultBuffer(pGpu, pKernelGmmu, index, bIsErrorRecovery, gfid) kgmmuEnableFaultBuffer_DISPATCH(pGpu, pKernelGmmu, index, bIsErrorRecovery, gfid) #define kgmmuEnableFaultBuffer_HAL(pGpu, pKernelGmmu, index, bIsErrorRecovery, gfid) kgmmuEnableFaultBuffer_DISPATCH(pGpu, pKernelGmmu, index, bIsErrorRecovery, gfid) +#define kgmmuDisableFaultBuffer_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuDisableFaultBuffer__ #define kgmmuDisableFaultBuffer(pGpu, pKernelGmmu, index, bIsErrorRecovery, gfid) kgmmuDisableFaultBuffer_DISPATCH(pGpu, pKernelGmmu, index, bIsErrorRecovery, gfid) #define kgmmuDisableFaultBuffer_HAL(pGpu, pKernelGmmu, index, bIsErrorRecovery, gfid) kgmmuDisableFaultBuffer_DISPATCH(pGpu, pKernelGmmu, index, bIsErrorRecovery, gfid) +#define kgmmuSetAndGetDefaultFaultBufferSize_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuSetAndGetDefaultFaultBufferSize__ #define kgmmuSetAndGetDefaultFaultBufferSize(pGpu, pKernelGmmu, index, gfid) kgmmuSetAndGetDefaultFaultBufferSize_DISPATCH(pGpu, pKernelGmmu, index, gfid) #define kgmmuSetAndGetDefaultFaultBufferSize_HAL(pGpu, pKernelGmmu, index, gfid) kgmmuSetAndGetDefaultFaultBufferSize_DISPATCH(pGpu, pKernelGmmu, index, gfid) -#define kgmmuReadMmuFaultInstHiLo(pGpu, pKernelGmmu, arg0, arg1) kgmmuReadMmuFaultInstHiLo_DISPATCH(pGpu, pKernelGmmu, arg0, arg1) -#define kgmmuReadMmuFaultInstHiLo_HAL(pGpu, pKernelGmmu, arg0, arg1) kgmmuReadMmuFaultInstHiLo_DISPATCH(pGpu, pKernelGmmu, arg0, arg1) -#define kgmmuReadMmuFaultAddrHiLo(pGpu, pKernelGmmu, arg0, arg1) kgmmuReadMmuFaultAddrHiLo_DISPATCH(pGpu, pKernelGmmu, arg0, arg1) -#define kgmmuReadMmuFaultAddrHiLo_HAL(pGpu, pKernelGmmu, arg0, arg1) kgmmuReadMmuFaultAddrHiLo_DISPATCH(pGpu, pKernelGmmu, arg0, arg1) +#define kgmmuReadMmuFaultInstHiLo_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuReadMmuFaultInstHiLo__ +#define kgmmuReadMmuFaultInstHiLo(pGpu, pKernelGmmu, arg3, arg4) kgmmuReadMmuFaultInstHiLo_DISPATCH(pGpu, pKernelGmmu, arg3, arg4) +#define kgmmuReadMmuFaultInstHiLo_HAL(pGpu, pKernelGmmu, arg3, arg4) kgmmuReadMmuFaultInstHiLo_DISPATCH(pGpu, pKernelGmmu, arg3, arg4) +#define kgmmuReadMmuFaultAddrHiLo_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuReadMmuFaultAddrHiLo__ +#define kgmmuReadMmuFaultAddrHiLo(pGpu, pKernelGmmu, arg3, arg4) kgmmuReadMmuFaultAddrHiLo_DISPATCH(pGpu, pKernelGmmu, arg3, arg4) +#define kgmmuReadMmuFaultAddrHiLo_HAL(pGpu, pKernelGmmu, arg3, arg4) kgmmuReadMmuFaultAddrHiLo_DISPATCH(pGpu, pKernelGmmu, arg3, arg4) +#define kgmmuReadMmuFaultInfo_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuReadMmuFaultInfo__ #define kgmmuReadMmuFaultInfo(pGpu, pKernelGmmu) kgmmuReadMmuFaultInfo_DISPATCH(pGpu, pKernelGmmu) #define kgmmuReadMmuFaultInfo_HAL(pGpu, pKernelGmmu) kgmmuReadMmuFaultInfo_DISPATCH(pGpu, pKernelGmmu) -#define kgmmuWriteMmuFaultBufferSize(pGpu, pKernelGmmu, arg0, arg1, gfid) kgmmuWriteMmuFaultBufferSize_DISPATCH(pGpu, pKernelGmmu, arg0, arg1, gfid) -#define kgmmuWriteMmuFaultBufferSize_HAL(pGpu, pKernelGmmu, arg0, arg1, gfid) kgmmuWriteMmuFaultBufferSize_DISPATCH(pGpu, pKernelGmmu, arg0, arg1, gfid) -#define kgmmuWriteMmuFaultBufferHiLo(pGpu, pKernelGmmu, arg0, arg1, arg2, gfid) kgmmuWriteMmuFaultBufferHiLo_DISPATCH(pGpu, pKernelGmmu, arg0, arg1, arg2, gfid) -#define kgmmuWriteMmuFaultBufferHiLo_HAL(pGpu, pKernelGmmu, arg0, arg1, arg2, gfid) kgmmuWriteMmuFaultBufferHiLo_DISPATCH(pGpu, pKernelGmmu, arg0, arg1, arg2, gfid) +#define kgmmuWriteMmuFaultBufferSize_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuWriteMmuFaultBufferSize__ +#define kgmmuWriteMmuFaultBufferSize(pGpu, pKernelGmmu, arg3, arg4, gfid) kgmmuWriteMmuFaultBufferSize_DISPATCH(pGpu, pKernelGmmu, arg3, arg4, gfid) +#define kgmmuWriteMmuFaultBufferSize_HAL(pGpu, pKernelGmmu, arg3, arg4, gfid) kgmmuWriteMmuFaultBufferSize_DISPATCH(pGpu, pKernelGmmu, arg3, arg4, gfid) +#define kgmmuWriteMmuFaultBufferHiLo_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuWriteMmuFaultBufferHiLo__ +#define kgmmuWriteMmuFaultBufferHiLo(pGpu, pKernelGmmu, arg3, arg4, arg5, gfid) kgmmuWriteMmuFaultBufferHiLo_DISPATCH(pGpu, pKernelGmmu, arg3, arg4, arg5, gfid) +#define kgmmuWriteMmuFaultBufferHiLo_HAL(pGpu, pKernelGmmu, arg3, arg4, arg5, gfid) kgmmuWriteMmuFaultBufferHiLo_DISPATCH(pGpu, pKernelGmmu, arg3, arg4, arg5, gfid) +#define kgmmuEnableMmuFaultInterrupts_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuEnableMmuFaultInterrupts__ #define kgmmuEnableMmuFaultInterrupts(pGpu, pKernelGmmu, index) kgmmuEnableMmuFaultInterrupts_DISPATCH(pGpu, pKernelGmmu, index) #define kgmmuEnableMmuFaultInterrupts_HAL(pGpu, pKernelGmmu, index) kgmmuEnableMmuFaultInterrupts_DISPATCH(pGpu, pKernelGmmu, index) +#define kgmmuDisableMmuFaultInterrupts_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuDisableMmuFaultInterrupts__ #define kgmmuDisableMmuFaultInterrupts(pGpu, pKernelGmmu, index) kgmmuDisableMmuFaultInterrupts_DISPATCH(pGpu, pKernelGmmu, index) #define kgmmuDisableMmuFaultInterrupts_HAL(pGpu, pKernelGmmu, index) kgmmuDisableMmuFaultInterrupts_DISPATCH(pGpu, pKernelGmmu, index) +#define kgmmuEnableMmuFaultOverflowIntr_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuEnableMmuFaultOverflowIntr__ #define kgmmuEnableMmuFaultOverflowIntr(pGpu, pKernelGmmu, index) kgmmuEnableMmuFaultOverflowIntr_DISPATCH(pGpu, pKernelGmmu, index) #define kgmmuEnableMmuFaultOverflowIntr_HAL(pGpu, pKernelGmmu, index) kgmmuEnableMmuFaultOverflowIntr_DISPATCH(pGpu, pKernelGmmu, index) +#define kgmmuSignExtendFaultAddress_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuSignExtendFaultAddress__ #define kgmmuSignExtendFaultAddress(pGpu, pKernelGmmu, pMmuFaultAddress) kgmmuSignExtendFaultAddress_DISPATCH(pGpu, pKernelGmmu, pMmuFaultAddress) #define kgmmuSignExtendFaultAddress_HAL(pGpu, pKernelGmmu, pMmuFaultAddress) kgmmuSignExtendFaultAddress_DISPATCH(pGpu, pKernelGmmu, pMmuFaultAddress) +#define kgmmuGetFaultType_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuGetFaultType__ #define kgmmuGetFaultType(pGpu, pKernelGmmu, fault, pMmuFaultType) kgmmuGetFaultType_DISPATCH(pGpu, pKernelGmmu, fault, pMmuFaultType) #define kgmmuGetFaultType_HAL(pGpu, pKernelGmmu, fault, pMmuFaultType) kgmmuGetFaultType_DISPATCH(pGpu, pKernelGmmu, fault, pMmuFaultType) -#define kgmmuIsP2PUnboundInstFault(pKernelGmmu, arg0, arg1) kgmmuIsP2PUnboundInstFault_DISPATCH(pKernelGmmu, arg0, arg1) -#define kgmmuIsP2PUnboundInstFault_HAL(pKernelGmmu, arg0, arg1) kgmmuIsP2PUnboundInstFault_DISPATCH(pKernelGmmu, arg0, arg1) +#define kgmmuIsP2PUnboundInstFault_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuIsP2PUnboundInstFault__ +#define kgmmuIsP2PUnboundInstFault(pKernelGmmu, arg2, arg3) kgmmuIsP2PUnboundInstFault_DISPATCH(pKernelGmmu, arg2, arg3) +#define kgmmuIsP2PUnboundInstFault_HAL(pKernelGmmu, arg2, arg3) kgmmuIsP2PUnboundInstFault_DISPATCH(pKernelGmmu, arg2, arg3) +#define kgmmuServiceVfPriFaults_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuServiceVfPriFaults__ #define kgmmuServiceVfPriFaults(pGpu, pKernelGmmu, faultType) kgmmuServiceVfPriFaults_DISPATCH(pGpu, pKernelGmmu, faultType) #define kgmmuServiceVfPriFaults_HAL(pGpu, pKernelGmmu, faultType) kgmmuServiceVfPriFaults_DISPATCH(pGpu, pKernelGmmu, faultType) -#define kgmmuTestVidmemAccessBitBufferError(pGpu, pKernelGmmu, arg0) kgmmuTestVidmemAccessBitBufferError_DISPATCH(pGpu, pKernelGmmu, arg0) -#define kgmmuTestVidmemAccessBitBufferError_HAL(pGpu, pKernelGmmu, arg0) kgmmuTestVidmemAccessBitBufferError_DISPATCH(pGpu, pKernelGmmu, arg0) +#define kgmmuTestVidmemAccessBitBufferError_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuTestVidmemAccessBitBufferError__ +#define kgmmuTestVidmemAccessBitBufferError(pGpu, pKernelGmmu, arg3) kgmmuTestVidmemAccessBitBufferError_DISPATCH(pGpu, pKernelGmmu, arg3) +#define kgmmuTestVidmemAccessBitBufferError_HAL(pGpu, pKernelGmmu, arg3) kgmmuTestVidmemAccessBitBufferError_DISPATCH(pGpu, pKernelGmmu, arg3) +#define kgmmuDisableVidmemAccessBitBuf_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuDisableVidmemAccessBitBuf__ #define kgmmuDisableVidmemAccessBitBuf(pGpu, pKernelGmmu) kgmmuDisableVidmemAccessBitBuf_DISPATCH(pGpu, pKernelGmmu) #define kgmmuDisableVidmemAccessBitBuf_HAL(pGpu, pKernelGmmu) kgmmuDisableVidmemAccessBitBuf_DISPATCH(pGpu, pKernelGmmu) +#define kgmmuEnableVidmemAccessBitBuf_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuEnableVidmemAccessBitBuf__ #define kgmmuEnableVidmemAccessBitBuf(pGpu, pKernelGmmu) kgmmuEnableVidmemAccessBitBuf_DISPATCH(pGpu, pKernelGmmu) #define kgmmuEnableVidmemAccessBitBuf_HAL(pGpu, pKernelGmmu) kgmmuEnableVidmemAccessBitBuf_DISPATCH(pGpu, pKernelGmmu) +#define kgmmuClearAccessCounterWriteNak_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuClearAccessCounterWriteNak__ #define kgmmuClearAccessCounterWriteNak(pGpu, pKernelGmmu) kgmmuClearAccessCounterWriteNak_DISPATCH(pGpu, pKernelGmmu) #define kgmmuClearAccessCounterWriteNak_HAL(pGpu, pKernelGmmu) kgmmuClearAccessCounterWriteNak_DISPATCH(pGpu, pKernelGmmu) +#define kgmmuServiceMthdBuffFaultInBar2Fault_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuServiceMthdBuffFaultInBar2Fault__ #define kgmmuServiceMthdBuffFaultInBar2Fault(pGpu, pKernelGmmu) kgmmuServiceMthdBuffFaultInBar2Fault_DISPATCH(pGpu, pKernelGmmu) #define kgmmuServiceMthdBuffFaultInBar2Fault_HAL(pGpu, pKernelGmmu) kgmmuServiceMthdBuffFaultInBar2Fault_DISPATCH(pGpu, pKernelGmmu) -#define kgmmuFaultCancelTargeted(pGpu, pKernelGmmu, arg0) kgmmuFaultCancelTargeted_DISPATCH(pGpu, pKernelGmmu, arg0) -#define kgmmuFaultCancelTargeted_HAL(pGpu, pKernelGmmu, arg0) kgmmuFaultCancelTargeted_DISPATCH(pGpu, pKernelGmmu, arg0) +#define kgmmuFaultCancelTargeted_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFaultCancelTargeted__ +#define kgmmuFaultCancelTargeted(pGpu, pKernelGmmu, arg3) kgmmuFaultCancelTargeted_DISPATCH(pGpu, pKernelGmmu, arg3) +#define kgmmuFaultCancelTargeted_HAL(pGpu, pKernelGmmu, arg3) kgmmuFaultCancelTargeted_DISPATCH(pGpu, pKernelGmmu, arg3) +#define kgmmuFaultCancelIssueInvalidate_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFaultCancelIssueInvalidate__ #define kgmmuFaultCancelIssueInvalidate(pGpu, pKernelGmmu, pCancelInfo, pParams, bGlobal) kgmmuFaultCancelIssueInvalidate_DISPATCH(pGpu, pKernelGmmu, pCancelInfo, pParams, bGlobal) #define kgmmuFaultCancelIssueInvalidate_HAL(pGpu, pKernelGmmu, pCancelInfo, pParams, bGlobal) kgmmuFaultCancelIssueInvalidate_DISPATCH(pGpu, pKernelGmmu, pCancelInfo, pParams, bGlobal) +#define kgmmuServiceMmuFault_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuServiceMmuFault__ #define kgmmuServiceMmuFault(pGpu, pKernelGmmu, pParsedFaultInfo, pMmuExceptionData) kgmmuServiceMmuFault_DISPATCH(pGpu, pKernelGmmu, pParsedFaultInfo, pMmuExceptionData) #define kgmmuServiceMmuFault_HAL(pGpu, pKernelGmmu, pParsedFaultInfo, pMmuExceptionData) kgmmuServiceMmuFault_DISPATCH(pGpu, pKernelGmmu, pParsedFaultInfo, pMmuExceptionData) -#define kgmmuServiceUnboundInstBlockFault(pGpu, pKernelGmmu, arg0, arg1) kgmmuServiceUnboundInstBlockFault_DISPATCH(pGpu, pKernelGmmu, arg0, arg1) -#define kgmmuServiceUnboundInstBlockFault_HAL(pGpu, pKernelGmmu, arg0, arg1) kgmmuServiceUnboundInstBlockFault_DISPATCH(pGpu, pKernelGmmu, arg0, arg1) +#define kgmmuServiceUnboundInstBlockFault_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuServiceUnboundInstBlockFault__ +#define kgmmuServiceUnboundInstBlockFault(pGpu, pKernelGmmu, arg3, arg4) kgmmuServiceUnboundInstBlockFault_DISPATCH(pGpu, pKernelGmmu, arg3, arg4) +#define kgmmuServiceUnboundInstBlockFault_HAL(pGpu, pKernelGmmu, arg3, arg4) kgmmuServiceUnboundInstBlockFault_DISPATCH(pGpu, pKernelGmmu, arg3, arg4) +#define kgmmuGetEccCounts_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuGetEccCounts__ #define kgmmuGetEccCounts(pGpu, pKernelGmmu) kgmmuGetEccCounts_DISPATCH(pGpu, pKernelGmmu) #define kgmmuGetEccCounts_HAL(pGpu, pKernelGmmu) kgmmuGetEccCounts_DISPATCH(pGpu, pKernelGmmu) -#define kgmmuStatePreLoad(pGpu, pEngstate, arg0) kgmmuStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kgmmuStatePostUnload(pGpu, pEngstate, arg0) kgmmuStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kgmmuStateInitUnlocked(pGpu, pEngstate) kgmmuStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kgmmuInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define kgmmuInitMissing(pGpu, pEngstate) kgmmuInitMissing_DISPATCH(pGpu, pEngstate) +#define kgmmuStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define kgmmuStatePreInitLocked(pGpu, pEngstate) kgmmuStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define kgmmuStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define kgmmuStatePreInitUnlocked(pGpu, pEngstate) kgmmuStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kgmmuStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kgmmuStateInitUnlocked(pGpu, pEngstate) kgmmuStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kgmmuStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kgmmuStatePreLoad(pGpu, pEngstate, arg3) kgmmuStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kgmmuStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kgmmuStatePostUnload(pGpu, pEngstate, arg3) kgmmuStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kgmmuIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define kgmmuIsPresent(pGpu, pEngstate) kgmmuIsPresent_DISPATCH(pGpu, pEngstate) -static inline NvU32 kgmmuService_4a4dee(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { - return 0; -} +// Dispatch functions +static inline NV_STATUS kgmmuConstructEngine_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, ENGDESCRIPTOR arg3) { + return pKernelGmmu->__kgmmuConstructEngine__(pGpu, pKernelGmmu, arg3); +} -#ifdef __nvoc_kern_gmmu_h_disabled -static inline NvU32 kgmmuService(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { - NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); - return 0; +static inline NV_STATUS kgmmuStateInitLocked_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { + return pKernelGmmu->__kgmmuStateInitLocked__(pGpu, pKernelGmmu); } -#else //__nvoc_kern_gmmu_h_disabled -#define kgmmuService(pGpu, pKernelGmmu) kgmmuService_4a4dee(pGpu, pKernelGmmu) -#endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuService_HAL(pGpu, pKernelGmmu) kgmmuService(pGpu, pKernelGmmu) +static inline NV_STATUS kgmmuStateLoad_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3) { + return pKernelGmmu->__kgmmuStateLoad__(pGpu, pKernelGmmu, arg3); +} -NvU64 kgmmuGetMaxBigPageSize_GM107(struct KernelGmmu *pKernelGmmu); +static inline NV_STATUS kgmmuStateUnload_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3) { + return pKernelGmmu->__kgmmuStateUnload__(pGpu, pKernelGmmu, arg3); +} +static inline NV_STATUS kgmmuStatePostLoad_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3) { + return pKernelGmmu->__kgmmuStatePostLoad__(pGpu, pKernelGmmu, arg3); +} -#ifdef __nvoc_kern_gmmu_h_disabled -static inline NvU64 kgmmuGetMaxBigPageSize(struct KernelGmmu *pKernelGmmu) { - NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); - return 0; +static inline NV_STATUS kgmmuStatePreUnload_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3) { + return pKernelGmmu->__kgmmuStatePreUnload__(pGpu, pKernelGmmu, arg3); } -#else //__nvoc_kern_gmmu_h_disabled -#define kgmmuGetMaxBigPageSize(pKernelGmmu) kgmmuGetMaxBigPageSize_GM107(pKernelGmmu) -#endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuGetMaxBigPageSize_HAL(pKernelGmmu) kgmmuGetMaxBigPageSize(pKernelGmmu) +static inline void kgmmuStateDestroy_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { + pKernelGmmu->__kgmmuStateDestroy__(pGpu, pKernelGmmu); +} -static inline NvU32 kgmmuGetVaspaceClass_f515df(struct KernelGmmu *pKernelGmmu) { - return (37105); +static inline void kgmmuRegisterIntrService_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, IntrServiceRecord arg3[175]) { + pKernelGmmu->__kgmmuRegisterIntrService__(pGpu, pKernelGmmu, arg3); } +static inline NvBool kgmmuClearInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, IntrServiceClearInterruptArguments *pParams) { + return pKernelGmmu->__kgmmuClearInterrupt__(pGpu, pKernelGmmu, pParams); +} -#ifdef __nvoc_kern_gmmu_h_disabled -static inline NvU32 kgmmuGetVaspaceClass(struct KernelGmmu *pKernelGmmu) { - NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); - return 0; +static inline NvU32 kgmmuServiceInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, IntrServiceServiceInterruptArguments *pParams) { + return pKernelGmmu->__kgmmuServiceInterrupt__(pGpu, pKernelGmmu, pParams); } -#else //__nvoc_kern_gmmu_h_disabled -#define kgmmuGetVaspaceClass(pKernelGmmu) kgmmuGetVaspaceClass_f515df(pKernelGmmu) -#endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuGetVaspaceClass_HAL(pKernelGmmu) kgmmuGetVaspaceClass(pKernelGmmu) +static inline NV_STATUS kgmmuServiceNotificationInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, IntrServiceServiceNotificationInterruptArguments *pParams) { + return pKernelGmmu->__kgmmuServiceNotificationInterrupt__(pGpu, pKernelGmmu, pParams); +} -NV_STATUS kgmmuInstBlkAtsGet_GV100(struct KernelGmmu *pKernelGmmu, struct OBJVASPACE *pVAS, NvU32 subctxid, NvU32 *pOffset, NvU32 *pData); +static inline NV_STATUS kgmmuInstBlkVaLimitGet_DISPATCH(struct KernelGmmu *pKernelGmmu, struct OBJVASPACE *pVAS, NvU32 subctxId, INST_BLK_INIT_PARAMS *pParams, NvU32 *pOffset, NvU64 *pData) { + return pKernelGmmu->__kgmmuInstBlkVaLimitGet__(pKernelGmmu, pVAS, subctxId, pParams, pOffset, pData); +} +static inline NvU32 kgmmuSetTlbInvalidateMembarWarParameters_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, TLB_INVALIDATE_PARAMS *pParams) { + return pKernelGmmu->__kgmmuSetTlbInvalidateMembarWarParameters__(pGpu, pKernelGmmu, pParams); +} -#ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuInstBlkAtsGet(struct KernelGmmu *pKernelGmmu, struct OBJVASPACE *pVAS, NvU32 subctxid, NvU32 *pOffset, NvU32 *pData) { - NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kgmmuSetTlbInvalidationScope_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 flags, TLB_INVALIDATE_PARAMS *pParams) { + return pKernelGmmu->__kgmmuSetTlbInvalidationScope__(pGpu, pKernelGmmu, flags, pParams); } -#else //__nvoc_kern_gmmu_h_disabled -#define kgmmuInstBlkAtsGet(pKernelGmmu, pVAS, subctxid, pOffset, pData) kgmmuInstBlkAtsGet_GV100(pKernelGmmu, pVAS, subctxid, pOffset, pData) -#endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuInstBlkAtsGet_HAL(pKernelGmmu, pVAS, subctxid, pOffset, pData) kgmmuInstBlkAtsGet(pKernelGmmu, pVAS, subctxid, pOffset, pData) +static inline void kgmmuFmtInitPteComptagLine_DISPATCH(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT_PTE *pPte, const NvU32 version) { + pKernelGmmu->__kgmmuFmtInitPteComptagLine__(pKernelGmmu, pPte, version); +} -static inline NV_STATUS kgmmuInstBlkMagicValueGet_46f6a7(struct KernelGmmu *pKernelGmmu, NvU32 *pOffset, NvU32 *pData) { - return NV_ERR_NOT_SUPPORTED; +static inline void kgmmuFmtInitPeerPteFld_DISPATCH(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT_PTE *pPte, const NvU32 version) { + pKernelGmmu->__kgmmuFmtInitPeerPteFld__(pKernelGmmu, pPte, version); } +static inline void kgmmuFmtInitPte_DISPATCH(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT_PTE *pPte, const NvU32 version, const struct NV_FIELD_ENUM_ENTRY *pPteApertures, const NvBool bUnifiedAperture) { + pKernelGmmu->__kgmmuFmtInitPte__(pKernelGmmu, pPte, version, pPteApertures, bUnifiedAperture); +} -#ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuInstBlkMagicValueGet(struct KernelGmmu *pKernelGmmu, NvU32 *pOffset, NvU32 *pData) { - NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline void kgmmuFmtInitPde_DISPATCH(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT_PDE *pPde, const NvU32 version, const struct NV_FIELD_ENUM_ENTRY *pPdeApertures) { + pKernelGmmu->__kgmmuFmtInitPde__(pKernelGmmu, pPde, version, pPdeApertures); } -#else //__nvoc_kern_gmmu_h_disabled -#define kgmmuInstBlkMagicValueGet(pKernelGmmu, pOffset, pData) kgmmuInstBlkMagicValueGet_46f6a7(pKernelGmmu, pOffset, pData) -#endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuInstBlkMagicValueGet_HAL(pKernelGmmu, pOffset, pData) kgmmuInstBlkMagicValueGet(pKernelGmmu, pOffset, pData) +static inline NvBool kgmmuFmtIsVersionSupported_DISPATCH(struct KernelGmmu *pKernelGmmu, NvU32 version) { + return pKernelGmmu->__kgmmuFmtIsVersionSupported__(pKernelGmmu, version); +} -NV_STATUS kgmmuInstBlkPageDirBaseGet_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct OBJVASPACE *pVAS, INST_BLK_INIT_PARAMS *pParams, NvU32 subctxid, NvU32 *pOffsetLo, NvU32 *pDataLo, NvU32 *pOffsetHi, NvU32 *pDataHi); +static inline void kgmmuFmtInitLevels_DISPATCH(struct KernelGmmu *pKernelGmmu, MMU_FMT_LEVEL *pLevels, const NvU32 numLevels, const NvU32 version, const NvU32 bigPageShift) { + pKernelGmmu->__kgmmuFmtInitLevels__(pKernelGmmu, pLevels, numLevels, version, bigPageShift); +} +static inline void kgmmuFmtInitPdeMulti_DISPATCH(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT_PDE_MULTI *pPdeMulti, const NvU32 version, const struct NV_FIELD_ENUM_ENTRY *pPdeApertures) { + pKernelGmmu->__kgmmuFmtInitPdeMulti__(pKernelGmmu, pPdeMulti, version, pPdeApertures); +} -#ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuInstBlkPageDirBaseGet(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct OBJVASPACE *pVAS, INST_BLK_INIT_PARAMS *pParams, NvU32 subctxid, NvU32 *pOffsetLo, NvU32 *pDataLo, NvU32 *pOffsetHi, NvU32 *pDataHi) { - NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kgmmuFmtFamiliesInit_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { + return pKernelGmmu->__kgmmuFmtFamiliesInit__(pGpu, pKernelGmmu); } -#else //__nvoc_kern_gmmu_h_disabled -#define kgmmuInstBlkPageDirBaseGet(pGpu, pKernelGmmu, pVAS, pParams, subctxid, pOffsetLo, pDataLo, pOffsetHi, pDataHi) kgmmuInstBlkPageDirBaseGet_GV100(pGpu, pKernelGmmu, pVAS, pParams, subctxid, pOffsetLo, pDataLo, pOffsetHi, pDataHi) -#endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuInstBlkPageDirBaseGet_HAL(pGpu, pKernelGmmu, pVAS, pParams, subctxid, pOffsetLo, pDataLo, pOffsetHi, pDataHi) kgmmuInstBlkPageDirBaseGet(pGpu, pKernelGmmu, pVAS, pParams, subctxid, pOffsetLo, pDataLo, pOffsetHi, pDataHi) +static inline NV_STATUS kgmmuTranslatePtePcfFromSw_DISPATCH(struct KernelGmmu *pKernelGmmu, NvU32 arg2, NvU32 *arg3) { + return pKernelGmmu->__kgmmuTranslatePtePcfFromSw__(pKernelGmmu, arg2, arg3); +} -NvU32 kgmmuGetPDBAllocSize_GP100(struct KernelGmmu *pKernelGmmu, const MMU_FMT_LEVEL *arg0, NvU64 arg1); +static inline NV_STATUS kgmmuTranslatePtePcfFromHw_DISPATCH(struct KernelGmmu *pKernelGmmu, NvU32 arg2, NvBool arg3, NvU32 *arg4) { + return pKernelGmmu->__kgmmuTranslatePtePcfFromHw__(pKernelGmmu, arg2, arg3, arg4); +} +static inline NV_STATUS kgmmuTranslatePdePcfFromSw_DISPATCH(struct KernelGmmu *pKernelGmmu, NvU32 arg2, NvU32 *arg3) { + return pKernelGmmu->__kgmmuTranslatePdePcfFromSw__(pKernelGmmu, arg2, arg3); +} -#ifdef __nvoc_kern_gmmu_h_disabled -static inline NvU32 kgmmuGetPDBAllocSize(struct KernelGmmu *pKernelGmmu, const MMU_FMT_LEVEL *arg0, NvU64 arg1) { - NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); - return 0; +static inline NV_STATUS kgmmuTranslatePdePcfFromHw_DISPATCH(struct KernelGmmu *pKernelGmmu, NvU32 arg2, GMMU_APERTURE arg3, NvU32 *arg4) { + return pKernelGmmu->__kgmmuTranslatePdePcfFromHw__(pKernelGmmu, arg2, arg3, arg4); } -#else //__nvoc_kern_gmmu_h_disabled -#define kgmmuGetPDBAllocSize(pKernelGmmu, arg0, arg1) kgmmuGetPDBAllocSize_GP100(pKernelGmmu, arg0, arg1) -#endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuGetPDBAllocSize_HAL(pKernelGmmu, arg0, arg1) kgmmuGetPDBAllocSize(pKernelGmmu, arg0, arg1) +static inline NV_STATUS kgmmuGetFaultRegisterMappings_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvP64 *pFaultBufferGet, NvP64 *pFaultBufferPut, NvP64 *pFaultBufferInfo, NvP64 *faultIntr, NvP64 *faultIntrSet, NvP64 *faultIntrClear, NvU32 *faultMask, NvP64 *pPrefetchCtrl) { + return pKernelGmmu->__kgmmuGetFaultRegisterMappings__(pGpu, pKernelGmmu, index, pFaultBufferGet, pFaultBufferPut, pFaultBufferInfo, faultIntr, faultIntrSet, faultIntrClear, faultMask, pPrefetchCtrl); +} -NvU64 kgmmuGetBigPageSize_GM107(struct KernelGmmu *pKernelGmmu); +static inline NV_STATUS kgmmuIssueReplayableFaultBufferFlush_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool bCopyAndFlush) { + return pKernelGmmu->__kgmmuIssueReplayableFaultBufferFlush__(pGpu, pKernelGmmu, bCopyAndFlush); +} +static inline NV_STATUS kgmmuToggleFaultOnPrefetch_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool bEnable) { + return pKernelGmmu->__kgmmuToggleFaultOnPrefetch__(pGpu, pKernelGmmu, bEnable); +} -#ifdef __nvoc_kern_gmmu_h_disabled -static inline NvU64 kgmmuGetBigPageSize(struct KernelGmmu *pKernelGmmu) { - NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); - return 0; +static inline NV_STATUS kgmmuFaultBufferAllocSharedMemory_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg3) { + return pKernelGmmu->__kgmmuFaultBufferAllocSharedMemory__(pGpu, pKernelGmmu, arg3); } -#else //__nvoc_kern_gmmu_h_disabled -#define kgmmuGetBigPageSize(pKernelGmmu) kgmmuGetBigPageSize_GM107(pKernelGmmu) -#endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuGetBigPageSize_HAL(pKernelGmmu) kgmmuGetBigPageSize(pKernelGmmu) +static inline void kgmmuFaultBufferFreeSharedMemory_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg3) { + pKernelGmmu->__kgmmuFaultBufferFreeSharedMemory__(pGpu, pKernelGmmu, arg3); +} -void kgmmuFmtInitCaps_GM20X(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT *pFmt); +static inline NV_STATUS kgmmuSetupWarForBug2720120_DISPATCH(struct KernelGmmu *pKernelGmmu) { + return pKernelGmmu->__kgmmuSetupWarForBug2720120__(pKernelGmmu); +} +static inline NvU32 kgmmuGetGraphicsEngineId_DISPATCH(struct KernelGmmu *pKernelGmmu) { + return pKernelGmmu->__kgmmuGetGraphicsEngineId__(pKernelGmmu); +} -#ifdef __nvoc_kern_gmmu_h_disabled -static inline void kgmmuFmtInitCaps(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT *pFmt) { - NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); +static inline NvU32 kgmmuReadShadowBufPutIndex_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE type) { + return pKernelGmmu->__kgmmuReadShadowBufPutIndex__(pGpu, pKernelGmmu, type); } -#else //__nvoc_kern_gmmu_h_disabled -#define kgmmuFmtInitCaps(pKernelGmmu, pFmt) kgmmuFmtInitCaps_GM20X(pKernelGmmu, pFmt) -#endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuFmtInitCaps_HAL(pKernelGmmu, pFmt) kgmmuFmtInitCaps(pKernelGmmu, pFmt) +static inline NvBool kgmmuIsFaultEngineBar1_DISPATCH(struct KernelGmmu *pKernelGmmu, NvU32 arg2) { + return pKernelGmmu->__kgmmuIsFaultEngineBar1__(pKernelGmmu, arg2); +} -void kgmmuFmtInitPteApertures_GM10X(struct KernelGmmu *pKernelGmmu, struct NV_FIELD_ENUM_ENTRY *pEntries); +static inline NvBool kgmmuIsFaultEngineBar2_DISPATCH(struct KernelGmmu *pKernelGmmu, NvU32 arg2) { + return pKernelGmmu->__kgmmuIsFaultEngineBar2__(pKernelGmmu, arg2); +} +static inline NvBool kgmmuIsFaultEnginePhysical_DISPATCH(struct KernelGmmu *pKernelGmmu, NvU32 arg2) { + return pKernelGmmu->__kgmmuIsFaultEnginePhysical__(pKernelGmmu, arg2); +} -#ifdef __nvoc_kern_gmmu_h_disabled -static inline void kgmmuFmtInitPteApertures(struct KernelGmmu *pKernelGmmu, struct NV_FIELD_ENUM_ENTRY *pEntries) { - NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); +static inline NV_STATUS kgmmuCopyMmuFaults_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct THREAD_STATE_NODE *pThreadState, NvU32 *entriesCopied, FAULT_BUFFER_TYPE type, NvBool bPollForValidBit) { + return pKernelGmmu->__kgmmuCopyMmuFaults__(pGpu, pKernelGmmu, pThreadState, entriesCopied, type, bPollForValidBit); } -#else //__nvoc_kern_gmmu_h_disabled -#define kgmmuFmtInitPteApertures(pKernelGmmu, pEntries) kgmmuFmtInitPteApertures_GM10X(pKernelGmmu, pEntries) -#endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuFmtInitPteApertures_HAL(pKernelGmmu, pEntries) kgmmuFmtInitPteApertures(pKernelGmmu, pEntries) +static inline NV_STATUS kgmmuParseFaultPacket_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvP64 pFaultPacket, NvP64 pParsedFaultEntry) { + return pKernelGmmu->__kgmmuParseFaultPacket__(pGpu, pKernelGmmu, pFaultPacket, pParsedFaultEntry); +} -void kgmmuFmtInitPdeApertures_GM10X(struct KernelGmmu *pKernelGmmu, struct NV_FIELD_ENUM_ENTRY *pEntries); +static inline void kgmmuFaultBufferClearPackets_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct HW_FAULT_BUFFER *pFaultBuffer, NvU32 beginIdx, NvU32 numFaultPackets) { + pKernelGmmu->__kgmmuFaultBufferClearPackets__(pGpu, pKernelGmmu, pFaultBuffer, beginIdx, numFaultPackets); +} +static inline GMMU_FAULT_PACKET * kgmmuFaultBufferGetFault_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct HW_FAULT_BUFFER *pFaultBuffer, NvU32 idx) { + return pKernelGmmu->__kgmmuFaultBufferGetFault__(pGpu, pKernelGmmu, pFaultBuffer, idx); +} -#ifdef __nvoc_kern_gmmu_h_disabled -static inline void kgmmuFmtInitPdeApertures(struct KernelGmmu *pKernelGmmu, struct NV_FIELD_ENUM_ENTRY *pEntries) { - NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); +static inline NvU32 kgmmuCopyFaultPacketToClientShadowBuffer_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct GMMU_FAULT_BUFFER *pFaultBuffer, FAULT_BUFFER_TYPE type, NvU32 getIndex, NvU32 shadowBufPutIndex, NvU32 maxBufferEntries, struct THREAD_STATE_NODE *pThreadState, NvU32 *pFaultsCopied) { + return pKernelGmmu->__kgmmuCopyFaultPacketToClientShadowBuffer__(pGpu, pKernelGmmu, pFaultBuffer, type, getIndex, shadowBufPutIndex, maxBufferEntries, pThreadState, pFaultsCopied); } -#else //__nvoc_kern_gmmu_h_disabled -#define kgmmuFmtInitPdeApertures(pKernelGmmu, pEntries) kgmmuFmtInitPdeApertures_GM10X(pKernelGmmu, pEntries) -#endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuFmtInitPdeApertures_HAL(pKernelGmmu, pEntries) kgmmuFmtInitPdeApertures(pKernelGmmu, pEntries) +static inline NvBool kgmmuIsReplayableShadowFaultBufferFull_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_CLIENT_SHADOW_FAULT_BUFFER *pClientFaultBuf, NvU32 shadowBufPutIndex, NvU32 maxBufferEntries) { + return pKernelGmmu->__kgmmuIsReplayableShadowFaultBufferFull__(pGpu, pKernelGmmu, pClientFaultBuf, shadowBufPutIndex, maxBufferEntries); +} -void kgmmuInvalidateTlb_GM107(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, MEMORY_DESCRIPTOR *pRootPageDir, NvU32 vaspaceFlags, VAS_PTE_UPDATE_TYPE update_type, NvU32 gfid, NvU32 invalidation_scope); +static inline NvU32 kgmmuReadClientShadowBufPutIndex_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 gfid, FAULT_BUFFER_TYPE type) { + return pKernelGmmu->__kgmmuReadClientShadowBufPutIndex__(pGpu, pKernelGmmu, gfid, type); +} +static inline void kgmmuWriteClientShadowBufPutIndex_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 gfid, FAULT_BUFFER_TYPE type, NvU32 putIndex) { + pKernelGmmu->__kgmmuWriteClientShadowBufPutIndex__(pGpu, pKernelGmmu, gfid, type, putIndex); +} -#ifdef __nvoc_kern_gmmu_h_disabled -static inline void kgmmuInvalidateTlb(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, MEMORY_DESCRIPTOR *pRootPageDir, NvU32 vaspaceFlags, VAS_PTE_UPDATE_TYPE update_type, NvU32 gfid, NvU32 invalidation_scope) { - NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); +static inline NvU32 kgmmuGetMinCeEngineId_DISPATCH(struct KernelGmmu *pKernelGmmu) { + return pKernelGmmu->__kgmmuGetMinCeEngineId__(pKernelGmmu); } -#else //__nvoc_kern_gmmu_h_disabled -#define kgmmuInvalidateTlb(pGpu, pKernelGmmu, pRootPageDir, vaspaceFlags, update_type, gfid, invalidation_scope) kgmmuInvalidateTlb_GM107(pGpu, pKernelGmmu, pRootPageDir, vaspaceFlags, update_type, gfid, invalidation_scope) -#endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuInvalidateTlb_HAL(pGpu, pKernelGmmu, pRootPageDir, vaspaceFlags, update_type, gfid, invalidation_scope) kgmmuInvalidateTlb(pGpu, pKernelGmmu, pRootPageDir, vaspaceFlags, update_type, gfid, invalidation_scope) +static inline NvU32 kgmmuGetMaxCeEngineId_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { + return pKernelGmmu->__kgmmuGetMaxCeEngineId__(pGpu, pKernelGmmu); +} -NV_STATUS kgmmuCheckPendingInvalidates_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, RMTIMEOUT *pTimeOut, NvU32 gfid); +static inline NV_STATUS kgmmuFaultBufferMap_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 gfid) { + return pKernelGmmu->__kgmmuFaultBufferMap__(pGpu, pKernelGmmu, index, gfid); +} +static inline NV_STATUS kgmmuFaultBufferUnmap_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 gfid) { + return pKernelGmmu->__kgmmuFaultBufferUnmap__(pGpu, pKernelGmmu, index, gfid); +} -#ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuCheckPendingInvalidates(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, RMTIMEOUT *pTimeOut, NvU32 gfid) { - NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kgmmuFaultBufferInit_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { + return pKernelGmmu->__kgmmuFaultBufferInit__(pGpu, pKernelGmmu); } -#else //__nvoc_kern_gmmu_h_disabled -#define kgmmuCheckPendingInvalidates(pGpu, pKernelGmmu, pTimeOut, gfid) kgmmuCheckPendingInvalidates_TU102(pGpu, pKernelGmmu, pTimeOut, gfid) -#endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuCheckPendingInvalidates_HAL(pGpu, pKernelGmmu, pTimeOut, gfid) kgmmuCheckPendingInvalidates(pGpu, pKernelGmmu, pTimeOut, gfid) +static inline NV_STATUS kgmmuFaultBufferDestroy_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { + return pKernelGmmu->__kgmmuFaultBufferDestroy__(pGpu, pKernelGmmu); +} -NV_STATUS kgmmuCommitTlbInvalidate_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, TLB_INVALIDATE_PARAMS *pParams); +static inline NV_STATUS kgmmuFaultBufferLoad_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 gfid) { + return pKernelGmmu->__kgmmuFaultBufferLoad__(pGpu, pKernelGmmu, index, gfid); +} +static inline NV_STATUS kgmmuFaultBufferUnload_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 gfid) { + return pKernelGmmu->__kgmmuFaultBufferUnload__(pGpu, pKernelGmmu, index, gfid); +} -#ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuCommitTlbInvalidate(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, TLB_INVALIDATE_PARAMS *pParams) { - NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kgmmuEnableFaultBuffer_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvBool bIsErrorRecovery, NvU32 gfid) { + return pKernelGmmu->__kgmmuEnableFaultBuffer__(pGpu, pKernelGmmu, index, bIsErrorRecovery, gfid); } -#else //__nvoc_kern_gmmu_h_disabled -#define kgmmuCommitTlbInvalidate(pGpu, pKernelGmmu, pParams) kgmmuCommitTlbInvalidate_TU102(pGpu, pKernelGmmu, pParams) -#endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuCommitTlbInvalidate_HAL(pGpu, pKernelGmmu, pParams) kgmmuCommitTlbInvalidate(pGpu, pKernelGmmu, pParams) +static inline NV_STATUS kgmmuDisableFaultBuffer_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvBool bIsErrorRecovery, NvU32 gfid) { + return pKernelGmmu->__kgmmuDisableFaultBuffer__(pGpu, pKernelGmmu, index, bIsErrorRecovery, gfid); +} + +static inline NvU32 kgmmuSetAndGetDefaultFaultBufferSize_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE index, NvU32 gfid) { + return pKernelGmmu->__kgmmuSetAndGetDefaultFaultBufferSize__(pGpu, pKernelGmmu, index, gfid); +} + +static inline void kgmmuReadMmuFaultInstHiLo_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 *arg3, NvU32 *arg4) { + pKernelGmmu->__kgmmuReadMmuFaultInstHiLo__(pGpu, pKernelGmmu, arg3, arg4); +} + +static inline void kgmmuReadMmuFaultAddrHiLo_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 *arg3, NvU32 *arg4) { + pKernelGmmu->__kgmmuReadMmuFaultAddrHiLo__(pGpu, pKernelGmmu, arg3, arg4); +} + +static inline NvU32 kgmmuReadMmuFaultInfo_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { + return pKernelGmmu->__kgmmuReadMmuFaultInfo__(pGpu, pKernelGmmu); +} + +static inline void kgmmuWriteMmuFaultBufferSize_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3, NvU32 arg4, NvU32 gfid) { + pKernelGmmu->__kgmmuWriteMmuFaultBufferSize__(pGpu, pKernelGmmu, arg3, arg4, gfid); +} + +static inline void kgmmuWriteMmuFaultBufferHiLo_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3, NvU32 arg4, NvU32 arg5, NvU32 gfid) { + pKernelGmmu->__kgmmuWriteMmuFaultBufferHiLo__(pGpu, pKernelGmmu, arg3, arg4, arg5, gfid); +} + +static inline NV_STATUS kgmmuEnableMmuFaultInterrupts_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index) { + return pKernelGmmu->__kgmmuEnableMmuFaultInterrupts__(pGpu, pKernelGmmu, index); +} + +static inline NV_STATUS kgmmuDisableMmuFaultInterrupts_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index) { + return pKernelGmmu->__kgmmuDisableMmuFaultInterrupts__(pGpu, pKernelGmmu, index); +} + +static inline NV_STATUS kgmmuEnableMmuFaultOverflowIntr_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index) { + return pKernelGmmu->__kgmmuEnableMmuFaultOverflowIntr__(pGpu, pKernelGmmu, index); +} + +static inline void kgmmuSignExtendFaultAddress_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU64 *pMmuFaultAddress) { + pKernelGmmu->__kgmmuSignExtendFaultAddress__(pGpu, pKernelGmmu, pMmuFaultAddress); +} + +static inline NV_STATUS kgmmuGetFaultType_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 fault, FAULT_TYPE *pMmuFaultType) { + return pKernelGmmu->__kgmmuGetFaultType__(pGpu, pKernelGmmu, fault, pMmuFaultType); +} + +static inline NvBool kgmmuIsP2PUnboundInstFault_DISPATCH(struct KernelGmmu *pKernelGmmu, NvU32 arg2, NvU32 arg3) { + return pKernelGmmu->__kgmmuIsP2PUnboundInstFault__(pKernelGmmu, arg2, arg3); +} + +static inline NV_STATUS kgmmuServiceVfPriFaults_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 faultType) { + return pKernelGmmu->__kgmmuServiceVfPriFaults__(pGpu, pKernelGmmu, faultType); +} + +static inline NvBool kgmmuTestVidmemAccessBitBufferError_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3) { + return pKernelGmmu->__kgmmuTestVidmemAccessBitBufferError__(pGpu, pKernelGmmu, arg3); +} + +static inline void kgmmuDisableVidmemAccessBitBuf_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { + pKernelGmmu->__kgmmuDisableVidmemAccessBitBuf__(pGpu, pKernelGmmu); +} + +static inline NV_STATUS kgmmuEnableVidmemAccessBitBuf_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { + return pKernelGmmu->__kgmmuEnableVidmemAccessBitBuf__(pGpu, pKernelGmmu); +} + +static inline void kgmmuClearAccessCounterWriteNak_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { + pKernelGmmu->__kgmmuClearAccessCounterWriteNak__(pGpu, pKernelGmmu); +} + +static inline NV_STATUS kgmmuServiceMthdBuffFaultInBar2Fault_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { + return pKernelGmmu->__kgmmuServiceMthdBuffFaultInBar2Fault__(pGpu, pKernelGmmu); +} + +static inline NV_STATUS kgmmuFaultCancelTargeted_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_FAULT_CANCEL_INFO *arg3) { + return pKernelGmmu->__kgmmuFaultCancelTargeted__(pGpu, pKernelGmmu, arg3); +} + +static inline NV_STATUS kgmmuFaultCancelIssueInvalidate_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_FAULT_CANCEL_INFO *pCancelInfo, TLB_INVALIDATE_PARAMS *pParams, NvBool bGlobal) { + return pKernelGmmu->__kgmmuFaultCancelIssueInvalidate__(pGpu, pKernelGmmu, pCancelInfo, pParams, bGlobal); +} + +static inline NV_STATUS kgmmuServiceMmuFault_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvP64 pParsedFaultInfo, FIFO_MMU_EXCEPTION_DATA *pMmuExceptionData) { + return pKernelGmmu->__kgmmuServiceMmuFault__(pGpu, pKernelGmmu, pParsedFaultInfo, pMmuExceptionData); +} + +static inline NV_STATUS kgmmuServiceUnboundInstBlockFault_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvP64 arg3, FIFO_MMU_EXCEPTION_DATA *arg4) { + return pKernelGmmu->__kgmmuServiceUnboundInstBlockFault__(pGpu, pKernelGmmu, arg3, arg4); +} + +static inline NvU32 kgmmuGetEccCounts_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { + return pKernelGmmu->__kgmmuGetEccCounts__(pGpu, pKernelGmmu); +} + +static inline void kgmmuInitMissing_DISPATCH(POBJGPU pGpu, struct KernelGmmu *pEngstate) { + pEngstate->__kgmmuInitMissing__(pGpu, pEngstate); +} + +static inline NV_STATUS kgmmuStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelGmmu *pEngstate) { + return pEngstate->__kgmmuStatePreInitLocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kgmmuStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelGmmu *pEngstate) { + return pEngstate->__kgmmuStatePreInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kgmmuStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelGmmu *pEngstate) { + return pEngstate->__kgmmuStateInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kgmmuStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelGmmu *pEngstate, NvU32 arg3) { + return pEngstate->__kgmmuStatePreLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS kgmmuStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelGmmu *pEngstate, NvU32 arg3) { + return pEngstate->__kgmmuStatePostUnload__(pGpu, pEngstate, arg3); +} + +static inline NvBool kgmmuIsPresent_DISPATCH(POBJGPU pGpu, struct KernelGmmu *pEngstate) { + return pEngstate->__kgmmuIsPresent__(pGpu, pEngstate); +} + +static inline NvU32 kgmmuService_4a4dee(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { + return 0; +} + + +#ifdef __nvoc_kern_gmmu_h_disabled +static inline NvU32 kgmmuService(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { + NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); + return 0; +} +#else //__nvoc_kern_gmmu_h_disabled +#define kgmmuService(pGpu, pKernelGmmu) kgmmuService_4a4dee(pGpu, pKernelGmmu) +#endif //__nvoc_kern_gmmu_h_disabled + +#define kgmmuService_HAL(pGpu, pKernelGmmu) kgmmuService(pGpu, pKernelGmmu) + +NvU64 kgmmuGetMaxBigPageSize_GM107(struct KernelGmmu *pKernelGmmu); + + +#ifdef __nvoc_kern_gmmu_h_disabled +static inline NvU64 kgmmuGetMaxBigPageSize(struct KernelGmmu *pKernelGmmu) { + NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); + return 0; +} +#else //__nvoc_kern_gmmu_h_disabled +#define kgmmuGetMaxBigPageSize(pKernelGmmu) kgmmuGetMaxBigPageSize_GM107(pKernelGmmu) +#endif //__nvoc_kern_gmmu_h_disabled + +#define kgmmuGetMaxBigPageSize_HAL(pKernelGmmu) kgmmuGetMaxBigPageSize(pKernelGmmu) + +static inline NvU32 kgmmuGetVaspaceClass_f515df(struct KernelGmmu *pKernelGmmu) { + return (37105); +} + + +#ifdef __nvoc_kern_gmmu_h_disabled +static inline NvU32 kgmmuGetVaspaceClass(struct KernelGmmu *pKernelGmmu) { + NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); + return 0; +} +#else //__nvoc_kern_gmmu_h_disabled +#define kgmmuGetVaspaceClass(pKernelGmmu) kgmmuGetVaspaceClass_f515df(pKernelGmmu) +#endif //__nvoc_kern_gmmu_h_disabled + +#define kgmmuGetVaspaceClass_HAL(pKernelGmmu) kgmmuGetVaspaceClass(pKernelGmmu) + +NV_STATUS kgmmuInstBlkAtsGet_GV100(struct KernelGmmu *pKernelGmmu, struct OBJVASPACE *pVAS, NvU32 subctxid, NvU32 *pOffset, NvU32 *pData); + + +#ifdef __nvoc_kern_gmmu_h_disabled +static inline NV_STATUS kgmmuInstBlkAtsGet(struct KernelGmmu *pKernelGmmu, struct OBJVASPACE *pVAS, NvU32 subctxid, NvU32 *pOffset, NvU32 *pData) { + NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kern_gmmu_h_disabled +#define kgmmuInstBlkAtsGet(pKernelGmmu, pVAS, subctxid, pOffset, pData) kgmmuInstBlkAtsGet_GV100(pKernelGmmu, pVAS, subctxid, pOffset, pData) +#endif //__nvoc_kern_gmmu_h_disabled + +#define kgmmuInstBlkAtsGet_HAL(pKernelGmmu, pVAS, subctxid, pOffset, pData) kgmmuInstBlkAtsGet(pKernelGmmu, pVAS, subctxid, pOffset, pData) + +static inline NV_STATUS kgmmuInstBlkMagicValueGet_46f6a7(struct KernelGmmu *pKernelGmmu, NvU32 *pOffset, NvU32 *pData) { + return NV_ERR_NOT_SUPPORTED; +} + + +#ifdef __nvoc_kern_gmmu_h_disabled +static inline NV_STATUS kgmmuInstBlkMagicValueGet(struct KernelGmmu *pKernelGmmu, NvU32 *pOffset, NvU32 *pData) { + NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kern_gmmu_h_disabled +#define kgmmuInstBlkMagicValueGet(pKernelGmmu, pOffset, pData) kgmmuInstBlkMagicValueGet_46f6a7(pKernelGmmu, pOffset, pData) +#endif //__nvoc_kern_gmmu_h_disabled + +#define kgmmuInstBlkMagicValueGet_HAL(pKernelGmmu, pOffset, pData) kgmmuInstBlkMagicValueGet(pKernelGmmu, pOffset, pData) + +NV_STATUS kgmmuInstBlkPageDirBaseGet_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct OBJVASPACE *pVAS, INST_BLK_INIT_PARAMS *pParams, NvU32 subctxid, NvU32 *pOffsetLo, NvU32 *pDataLo, NvU32 *pOffsetHi, NvU32 *pDataHi); + + +#ifdef __nvoc_kern_gmmu_h_disabled +static inline NV_STATUS kgmmuInstBlkPageDirBaseGet(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct OBJVASPACE *pVAS, INST_BLK_INIT_PARAMS *pParams, NvU32 subctxid, NvU32 *pOffsetLo, NvU32 *pDataLo, NvU32 *pOffsetHi, NvU32 *pDataHi) { + NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kern_gmmu_h_disabled +#define kgmmuInstBlkPageDirBaseGet(pGpu, pKernelGmmu, pVAS, pParams, subctxid, pOffsetLo, pDataLo, pOffsetHi, pDataHi) kgmmuInstBlkPageDirBaseGet_GV100(pGpu, pKernelGmmu, pVAS, pParams, subctxid, pOffsetLo, pDataLo, pOffsetHi, pDataHi) +#endif //__nvoc_kern_gmmu_h_disabled + +#define kgmmuInstBlkPageDirBaseGet_HAL(pGpu, pKernelGmmu, pVAS, pParams, subctxid, pOffsetLo, pDataLo, pOffsetHi, pDataHi) kgmmuInstBlkPageDirBaseGet(pGpu, pKernelGmmu, pVAS, pParams, subctxid, pOffsetLo, pDataLo, pOffsetHi, pDataHi) + +NvU32 kgmmuGetPDBAllocSize_GP100(struct KernelGmmu *pKernelGmmu, const MMU_FMT_LEVEL *arg2, NvU64 arg3); + + +#ifdef __nvoc_kern_gmmu_h_disabled +static inline NvU32 kgmmuGetPDBAllocSize(struct KernelGmmu *pKernelGmmu, const MMU_FMT_LEVEL *arg2, NvU64 arg3) { + NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); + return 0; +} +#else //__nvoc_kern_gmmu_h_disabled +#define kgmmuGetPDBAllocSize(pKernelGmmu, arg2, arg3) kgmmuGetPDBAllocSize_GP100(pKernelGmmu, arg2, arg3) +#endif //__nvoc_kern_gmmu_h_disabled + +#define kgmmuGetPDBAllocSize_HAL(pKernelGmmu, arg2, arg3) kgmmuGetPDBAllocSize(pKernelGmmu, arg2, arg3) + +NvU64 kgmmuGetBigPageSize_GM107(struct KernelGmmu *pKernelGmmu); + + +#ifdef __nvoc_kern_gmmu_h_disabled +static inline NvU64 kgmmuGetBigPageSize(struct KernelGmmu *pKernelGmmu) { + NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); + return 0; +} +#else //__nvoc_kern_gmmu_h_disabled +#define kgmmuGetBigPageSize(pKernelGmmu) kgmmuGetBigPageSize_GM107(pKernelGmmu) +#endif //__nvoc_kern_gmmu_h_disabled + +#define kgmmuGetBigPageSize_HAL(pKernelGmmu) kgmmuGetBigPageSize(pKernelGmmu) + +void kgmmuFmtInitCaps_GM20X(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT *pFmt); + + +#ifdef __nvoc_kern_gmmu_h_disabled +static inline void kgmmuFmtInitCaps(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT *pFmt) { + NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); +} +#else //__nvoc_kern_gmmu_h_disabled +#define kgmmuFmtInitCaps(pKernelGmmu, pFmt) kgmmuFmtInitCaps_GM20X(pKernelGmmu, pFmt) +#endif //__nvoc_kern_gmmu_h_disabled + +#define kgmmuFmtInitCaps_HAL(pKernelGmmu, pFmt) kgmmuFmtInitCaps(pKernelGmmu, pFmt) + +void kgmmuFmtInitPteApertures_GM10X(struct KernelGmmu *pKernelGmmu, struct NV_FIELD_ENUM_ENTRY *pEntries); + + +#ifdef __nvoc_kern_gmmu_h_disabled +static inline void kgmmuFmtInitPteApertures(struct KernelGmmu *pKernelGmmu, struct NV_FIELD_ENUM_ENTRY *pEntries) { + NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); +} +#else //__nvoc_kern_gmmu_h_disabled +#define kgmmuFmtInitPteApertures(pKernelGmmu, pEntries) kgmmuFmtInitPteApertures_GM10X(pKernelGmmu, pEntries) +#endif //__nvoc_kern_gmmu_h_disabled + +#define kgmmuFmtInitPteApertures_HAL(pKernelGmmu, pEntries) kgmmuFmtInitPteApertures(pKernelGmmu, pEntries) + +void kgmmuFmtInitPdeApertures_GM10X(struct KernelGmmu *pKernelGmmu, struct NV_FIELD_ENUM_ENTRY *pEntries); + + +#ifdef __nvoc_kern_gmmu_h_disabled +static inline void kgmmuFmtInitPdeApertures(struct KernelGmmu *pKernelGmmu, struct NV_FIELD_ENUM_ENTRY *pEntries) { + NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); +} +#else //__nvoc_kern_gmmu_h_disabled +#define kgmmuFmtInitPdeApertures(pKernelGmmu, pEntries) kgmmuFmtInitPdeApertures_GM10X(pKernelGmmu, pEntries) +#endif //__nvoc_kern_gmmu_h_disabled + +#define kgmmuFmtInitPdeApertures_HAL(pKernelGmmu, pEntries) kgmmuFmtInitPdeApertures(pKernelGmmu, pEntries) + +void kgmmuInvalidateTlb_GM107(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, MEMORY_DESCRIPTOR *pRootPageDir, NvU32 vaspaceFlags, VAS_PTE_UPDATE_TYPE update_type, NvU32 gfid, NvU32 invalidation_scope); + + +#ifdef __nvoc_kern_gmmu_h_disabled +static inline void kgmmuInvalidateTlb(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, MEMORY_DESCRIPTOR *pRootPageDir, NvU32 vaspaceFlags, VAS_PTE_UPDATE_TYPE update_type, NvU32 gfid, NvU32 invalidation_scope) { + NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); +} +#else //__nvoc_kern_gmmu_h_disabled +#define kgmmuInvalidateTlb(pGpu, pKernelGmmu, pRootPageDir, vaspaceFlags, update_type, gfid, invalidation_scope) kgmmuInvalidateTlb_GM107(pGpu, pKernelGmmu, pRootPageDir, vaspaceFlags, update_type, gfid, invalidation_scope) +#endif //__nvoc_kern_gmmu_h_disabled + +#define kgmmuInvalidateTlb_HAL(pGpu, pKernelGmmu, pRootPageDir, vaspaceFlags, update_type, gfid, invalidation_scope) kgmmuInvalidateTlb(pGpu, pKernelGmmu, pRootPageDir, vaspaceFlags, update_type, gfid, invalidation_scope) + +NV_STATUS kgmmuCommitInvalidateTlbTest_GM107(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, COMMIT_TLB_INVALIDATE_TEST_PARAMS *pTestParams); + + +#ifdef __nvoc_kern_gmmu_h_disabled +static inline NV_STATUS kgmmuCommitInvalidateTlbTest(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, COMMIT_TLB_INVALIDATE_TEST_PARAMS *pTestParams) { + NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kern_gmmu_h_disabled +#define kgmmuCommitInvalidateTlbTest(pGpu, pKernelGmmu, pTestParams) kgmmuCommitInvalidateTlbTest_GM107(pGpu, pKernelGmmu, pTestParams) +#endif //__nvoc_kern_gmmu_h_disabled + +#define kgmmuCommitInvalidateTlbTest_HAL(pGpu, pKernelGmmu, pTestParams) kgmmuCommitInvalidateTlbTest(pGpu, pKernelGmmu, pTestParams) + +NV_STATUS kgmmuCheckPendingInvalidates_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, RMTIMEOUT *pTimeOut, NvU32 gfid); + + +#ifdef __nvoc_kern_gmmu_h_disabled +static inline NV_STATUS kgmmuCheckPendingInvalidates(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, RMTIMEOUT *pTimeOut, NvU32 gfid) { + NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kern_gmmu_h_disabled +#define kgmmuCheckPendingInvalidates(pGpu, pKernelGmmu, pTimeOut, gfid) kgmmuCheckPendingInvalidates_TU102(pGpu, pKernelGmmu, pTimeOut, gfid) +#endif //__nvoc_kern_gmmu_h_disabled + +#define kgmmuCheckPendingInvalidates_HAL(pGpu, pKernelGmmu, pTimeOut, gfid) kgmmuCheckPendingInvalidates(pGpu, pKernelGmmu, pTimeOut, gfid) + +NV_STATUS kgmmuCommitTlbInvalidate_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, TLB_INVALIDATE_PARAMS *pParams); + + +#ifdef __nvoc_kern_gmmu_h_disabled +static inline NV_STATUS kgmmuCommitTlbInvalidate(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, TLB_INVALIDATE_PARAMS *pParams) { + NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kern_gmmu_h_disabled +#define kgmmuCommitTlbInvalidate(pGpu, pKernelGmmu, pParams) kgmmuCommitTlbInvalidate_TU102(pGpu, pKernelGmmu, pParams) +#endif //__nvoc_kern_gmmu_h_disabled + +#define kgmmuCommitTlbInvalidate_HAL(pGpu, pKernelGmmu, pParams) kgmmuCommitTlbInvalidate(pGpu, pKernelGmmu, pParams) void kgmmuSetPdbToInvalidate_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, TLB_INVALIDATE_PARAMS *pParams); @@ -1071,19 +1560,19 @@ static inline const char *kgmmuGetFaultTypeString(struct KernelGmmu *pKernelGmmu #define kgmmuGetFaultTypeString_HAL(pKernelGmmu, faultType) kgmmuGetFaultTypeString(pKernelGmmu, faultType) -NV_STATUS kgmmuChangeReplayableFaultOwnership_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool arg0); +NV_STATUS kgmmuChangeReplayableFaultOwnership_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool arg3); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuChangeReplayableFaultOwnership(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool arg0) { +static inline NV_STATUS kgmmuChangeReplayableFaultOwnership(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuChangeReplayableFaultOwnership(pGpu, pKernelGmmu, arg0) kgmmuChangeReplayableFaultOwnership_GV100(pGpu, pKernelGmmu, arg0) +#define kgmmuChangeReplayableFaultOwnership(pGpu, pKernelGmmu, arg3) kgmmuChangeReplayableFaultOwnership_GV100(pGpu, pKernelGmmu, arg3) #endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuChangeReplayableFaultOwnership_HAL(pGpu, pKernelGmmu, arg0) kgmmuChangeReplayableFaultOwnership(pGpu, pKernelGmmu, arg0) +#define kgmmuChangeReplayableFaultOwnership_HAL(pGpu, pKernelGmmu, arg3) kgmmuChangeReplayableFaultOwnership(pGpu, pKernelGmmu, arg3) NV_STATUS kgmmuServiceReplayableFault_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); @@ -1113,61 +1602,61 @@ static inline NV_STATUS kgmmuReportFaultBufferOverflow(OBJGPU *pGpu, struct Kern #define kgmmuReportFaultBufferOverflow_HAL(pGpu, pKernelGmmu) kgmmuReportFaultBufferOverflow(pGpu, pKernelGmmu) -NV_STATUS kgmmuReadFaultBufferGetPtr_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 *pGetOffset, struct THREAD_STATE_NODE *arg0); +NV_STATUS kgmmuReadFaultBufferGetPtr_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 *pGetOffset, struct THREAD_STATE_NODE *arg5); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuReadFaultBufferGetPtr(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 *pGetOffset, struct THREAD_STATE_NODE *arg0) { +static inline NV_STATUS kgmmuReadFaultBufferGetPtr(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 *pGetOffset, struct THREAD_STATE_NODE *arg5) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuReadFaultBufferGetPtr(pGpu, pKernelGmmu, index, pGetOffset, arg0) kgmmuReadFaultBufferGetPtr_TU102(pGpu, pKernelGmmu, index, pGetOffset, arg0) +#define kgmmuReadFaultBufferGetPtr(pGpu, pKernelGmmu, index, pGetOffset, arg5) kgmmuReadFaultBufferGetPtr_TU102(pGpu, pKernelGmmu, index, pGetOffset, arg5) #endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuReadFaultBufferGetPtr_HAL(pGpu, pKernelGmmu, index, pGetOffset, arg0) kgmmuReadFaultBufferGetPtr(pGpu, pKernelGmmu, index, pGetOffset, arg0) +#define kgmmuReadFaultBufferGetPtr_HAL(pGpu, pKernelGmmu, index, pGetOffset, arg5) kgmmuReadFaultBufferGetPtr(pGpu, pKernelGmmu, index, pGetOffset, arg5) -NV_STATUS kgmmuWriteFaultBufferGetPtr_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 getValue, struct THREAD_STATE_NODE *arg0); +NV_STATUS kgmmuWriteFaultBufferGetPtr_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 getValue, struct THREAD_STATE_NODE *arg5); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuWriteFaultBufferGetPtr(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 getValue, struct THREAD_STATE_NODE *arg0) { +static inline NV_STATUS kgmmuWriteFaultBufferGetPtr(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 getValue, struct THREAD_STATE_NODE *arg5) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuWriteFaultBufferGetPtr(pGpu, pKernelGmmu, index, getValue, arg0) kgmmuWriteFaultBufferGetPtr_TU102(pGpu, pKernelGmmu, index, getValue, arg0) +#define kgmmuWriteFaultBufferGetPtr(pGpu, pKernelGmmu, index, getValue, arg5) kgmmuWriteFaultBufferGetPtr_TU102(pGpu, pKernelGmmu, index, getValue, arg5) #endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuWriteFaultBufferGetPtr_HAL(pGpu, pKernelGmmu, index, getValue, arg0) kgmmuWriteFaultBufferGetPtr(pGpu, pKernelGmmu, index, getValue, arg0) +#define kgmmuWriteFaultBufferGetPtr_HAL(pGpu, pKernelGmmu, index, getValue, arg5) kgmmuWriteFaultBufferGetPtr(pGpu, pKernelGmmu, index, getValue, arg5) -NV_STATUS kgmmuReadFaultBufferPutPtr_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 *pPutOffset, struct THREAD_STATE_NODE *arg0); +NV_STATUS kgmmuReadFaultBufferPutPtr_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 *pPutOffset, struct THREAD_STATE_NODE *arg5); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuReadFaultBufferPutPtr(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 *pPutOffset, struct THREAD_STATE_NODE *arg0) { +static inline NV_STATUS kgmmuReadFaultBufferPutPtr(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 *pPutOffset, struct THREAD_STATE_NODE *arg5) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuReadFaultBufferPutPtr(pGpu, pKernelGmmu, index, pPutOffset, arg0) kgmmuReadFaultBufferPutPtr_TU102(pGpu, pKernelGmmu, index, pPutOffset, arg0) +#define kgmmuReadFaultBufferPutPtr(pGpu, pKernelGmmu, index, pPutOffset, arg5) kgmmuReadFaultBufferPutPtr_TU102(pGpu, pKernelGmmu, index, pPutOffset, arg5) #endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuReadFaultBufferPutPtr_HAL(pGpu, pKernelGmmu, index, pPutOffset, arg0) kgmmuReadFaultBufferPutPtr(pGpu, pKernelGmmu, index, pPutOffset, arg0) +#define kgmmuReadFaultBufferPutPtr_HAL(pGpu, pKernelGmmu, index, pPutOffset, arg5) kgmmuReadFaultBufferPutPtr(pGpu, pKernelGmmu, index, pPutOffset, arg5) -NvU32 kgmmuReadMmuFaultBufferSize_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 gfid); +NvU32 kgmmuReadMmuFaultBufferSize_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3, NvU32 gfid); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NvU32 kgmmuReadMmuFaultBufferSize(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 gfid) { +static inline NvU32 kgmmuReadMmuFaultBufferSize(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3, NvU32 gfid) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return 0; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuReadMmuFaultBufferSize(pGpu, pKernelGmmu, arg0, gfid) kgmmuReadMmuFaultBufferSize_TU102(pGpu, pKernelGmmu, arg0, gfid) +#define kgmmuReadMmuFaultBufferSize(pGpu, pKernelGmmu, arg3, gfid) kgmmuReadMmuFaultBufferSize_TU102(pGpu, pKernelGmmu, arg3, gfid) #endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuReadMmuFaultBufferSize_HAL(pGpu, pKernelGmmu, arg0, gfid) kgmmuReadMmuFaultBufferSize(pGpu, pKernelGmmu, arg0, gfid) +#define kgmmuReadMmuFaultBufferSize_HAL(pGpu, pKernelGmmu, arg3, gfid) kgmmuReadMmuFaultBufferSize(pGpu, pKernelGmmu, arg3, gfid) NvU32 kgmmuReadMmuFaultStatus_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 gfid); @@ -1183,60 +1672,60 @@ static inline NvU32 kgmmuReadMmuFaultStatus(OBJGPU *pGpu, struct KernelGmmu *pKe #define kgmmuReadMmuFaultStatus_HAL(pGpu, pKernelGmmu, gfid) kgmmuReadMmuFaultStatus(pGpu, pKernelGmmu, gfid) -void kgmmuWriteMmuFaultStatus_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0); +void kgmmuWriteMmuFaultStatus_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3); #ifdef __nvoc_kern_gmmu_h_disabled -static inline void kgmmuWriteMmuFaultStatus(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0) { +static inline void kgmmuWriteMmuFaultStatus(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuWriteMmuFaultStatus(pGpu, pKernelGmmu, arg0) kgmmuWriteMmuFaultStatus_TU102(pGpu, pKernelGmmu, arg0) +#define kgmmuWriteMmuFaultStatus(pGpu, pKernelGmmu, arg3) kgmmuWriteMmuFaultStatus_TU102(pGpu, pKernelGmmu, arg3) #endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuWriteMmuFaultStatus_HAL(pGpu, pKernelGmmu, arg0) kgmmuWriteMmuFaultStatus(pGpu, pKernelGmmu, arg0) +#define kgmmuWriteMmuFaultStatus_HAL(pGpu, pKernelGmmu, arg3) kgmmuWriteMmuFaultStatus(pGpu, pKernelGmmu, arg3) -NvBool kgmmuIsNonReplayableFaultPending_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct THREAD_STATE_NODE *arg0); +NvBool kgmmuIsNonReplayableFaultPending_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct THREAD_STATE_NODE *arg3); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NvBool kgmmuIsNonReplayableFaultPending(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct THREAD_STATE_NODE *arg0) { +static inline NvBool kgmmuIsNonReplayableFaultPending(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct THREAD_STATE_NODE *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return NV_FALSE; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuIsNonReplayableFaultPending(pGpu, pKernelGmmu, arg0) kgmmuIsNonReplayableFaultPending_TU102(pGpu, pKernelGmmu, arg0) +#define kgmmuIsNonReplayableFaultPending(pGpu, pKernelGmmu, arg3) kgmmuIsNonReplayableFaultPending_TU102(pGpu, pKernelGmmu, arg3) #endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuIsNonReplayableFaultPending_HAL(pGpu, pKernelGmmu, arg0) kgmmuIsNonReplayableFaultPending(pGpu, pKernelGmmu, arg0) +#define kgmmuIsNonReplayableFaultPending_HAL(pGpu, pKernelGmmu, arg3) kgmmuIsNonReplayableFaultPending(pGpu, pKernelGmmu, arg3) -NV_STATUS kgmmuClientShadowFaultBufferAlloc_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg0); +NV_STATUS kgmmuClientShadowFaultBufferAlloc_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg3); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuClientShadowFaultBufferAlloc(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg0) { +static inline NV_STATUS kgmmuClientShadowFaultBufferAlloc(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuClientShadowFaultBufferAlloc(pGpu, pKernelGmmu, arg0) kgmmuClientShadowFaultBufferAlloc_GV100(pGpu, pKernelGmmu, arg0) +#define kgmmuClientShadowFaultBufferAlloc(pGpu, pKernelGmmu, arg3) kgmmuClientShadowFaultBufferAlloc_GV100(pGpu, pKernelGmmu, arg3) #endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuClientShadowFaultBufferAlloc_HAL(pGpu, pKernelGmmu, arg0) kgmmuClientShadowFaultBufferAlloc(pGpu, pKernelGmmu, arg0) +#define kgmmuClientShadowFaultBufferAlloc_HAL(pGpu, pKernelGmmu, arg3) kgmmuClientShadowFaultBufferAlloc(pGpu, pKernelGmmu, arg3) -NV_STATUS kgmmuClientShadowFaultBufferFree_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg0); +NV_STATUS kgmmuClientShadowFaultBufferFree_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg3); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuClientShadowFaultBufferFree(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg0) { +static inline NV_STATUS kgmmuClientShadowFaultBufferFree(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuClientShadowFaultBufferFree(pGpu, pKernelGmmu, arg0) kgmmuClientShadowFaultBufferFree_GV100(pGpu, pKernelGmmu, arg0) +#define kgmmuClientShadowFaultBufferFree(pGpu, pKernelGmmu, arg3) kgmmuClientShadowFaultBufferFree_GV100(pGpu, pKernelGmmu, arg3) #endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuClientShadowFaultBufferFree_HAL(pGpu, pKernelGmmu, arg0) kgmmuClientShadowFaultBufferFree(pGpu, pKernelGmmu, arg0) +#define kgmmuClientShadowFaultBufferFree_HAL(pGpu, pKernelGmmu, arg3) kgmmuClientShadowFaultBufferFree(pGpu, pKernelGmmu, arg3) void kgmmuEncodeSysmemAddrs_GM107(struct KernelGmmu *pKernelGmmu, NvU64 *pAddresses, NvU64 count); @@ -1293,44 +1782,44 @@ static inline NV_STATUS kgmmuEnableNvlinkComputePeerAddressing(struct KernelGmmu #define kgmmuEnableNvlinkComputePeerAddressing_HAL(pKernelGmmu) kgmmuEnableNvlinkComputePeerAddressing(pKernelGmmu) -void kgmmuClearNonReplayableFaultIntr_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct THREAD_STATE_NODE *arg0); +void kgmmuClearNonReplayableFaultIntr_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct THREAD_STATE_NODE *arg3); #ifdef __nvoc_kern_gmmu_h_disabled -static inline void kgmmuClearNonReplayableFaultIntr(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct THREAD_STATE_NODE *arg0) { +static inline void kgmmuClearNonReplayableFaultIntr(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct THREAD_STATE_NODE *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuClearNonReplayableFaultIntr(pGpu, pKernelGmmu, arg0) kgmmuClearNonReplayableFaultIntr_TU102(pGpu, pKernelGmmu, arg0) +#define kgmmuClearNonReplayableFaultIntr(pGpu, pKernelGmmu, arg3) kgmmuClearNonReplayableFaultIntr_TU102(pGpu, pKernelGmmu, arg3) #endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuClearNonReplayableFaultIntr_HAL(pGpu, pKernelGmmu, arg0) kgmmuClearNonReplayableFaultIntr(pGpu, pKernelGmmu, arg0) +#define kgmmuClearNonReplayableFaultIntr_HAL(pGpu, pKernelGmmu, arg3) kgmmuClearNonReplayableFaultIntr(pGpu, pKernelGmmu, arg3) -void kgmmuClearReplayableFaultIntr_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct THREAD_STATE_NODE *arg0); +void kgmmuClearReplayableFaultIntr_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct THREAD_STATE_NODE *arg3); #ifdef __nvoc_kern_gmmu_h_disabled -static inline void kgmmuClearReplayableFaultIntr(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct THREAD_STATE_NODE *arg0) { +static inline void kgmmuClearReplayableFaultIntr(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct THREAD_STATE_NODE *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuClearReplayableFaultIntr(pGpu, pKernelGmmu, arg0) kgmmuClearReplayableFaultIntr_TU102(pGpu, pKernelGmmu, arg0) +#define kgmmuClearReplayableFaultIntr(pGpu, pKernelGmmu, arg3) kgmmuClearReplayableFaultIntr_TU102(pGpu, pKernelGmmu, arg3) #endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuClearReplayableFaultIntr_HAL(pGpu, pKernelGmmu, arg0) kgmmuClearReplayableFaultIntr(pGpu, pKernelGmmu, arg0) +#define kgmmuClearReplayableFaultIntr_HAL(pGpu, pKernelGmmu, arg3) kgmmuClearReplayableFaultIntr(pGpu, pKernelGmmu, arg3) -void kgmmuPrintFaultInfo_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0, FIFO_MMU_EXCEPTION_DATA *arg1); +void kgmmuPrintFaultInfo_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3, FIFO_MMU_EXCEPTION_DATA *arg4); #ifdef __nvoc_kern_gmmu_h_disabled -static inline void kgmmuPrintFaultInfo(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0, FIFO_MMU_EXCEPTION_DATA *arg1) { +static inline void kgmmuPrintFaultInfo(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3, FIFO_MMU_EXCEPTION_DATA *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuPrintFaultInfo(pGpu, pKernelGmmu, arg0, arg1) kgmmuPrintFaultInfo_TU102(pGpu, pKernelGmmu, arg0, arg1) +#define kgmmuPrintFaultInfo(pGpu, pKernelGmmu, arg3, arg4) kgmmuPrintFaultInfo_TU102(pGpu, pKernelGmmu, arg3, arg4) #endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuPrintFaultInfo_HAL(pGpu, pKernelGmmu, arg0, arg1) kgmmuPrintFaultInfo(pGpu, pKernelGmmu, arg0, arg1) +#define kgmmuPrintFaultInfo_HAL(pGpu, pKernelGmmu, arg3, arg4) kgmmuPrintFaultInfo(pGpu, pKernelGmmu, arg3, arg4) static inline NV_STATUS kgmmuInitCeMmuFaultIdRange_56cd7a(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { return NV_OK; @@ -1362,33 +1851,33 @@ static inline NV_STATUS kgmmuServiceNonReplayableFault(OBJGPU *pGpu, struct Kern #define kgmmuServiceNonReplayableFault_HAL(pGpu, pKernelGmmu) kgmmuServiceNonReplayableFault(pGpu, pKernelGmmu) -NV_STATUS kgmmuHandleNonReplayableFaultPacket_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_FAULT_PACKET *arg0); +NV_STATUS kgmmuHandleNonReplayableFaultPacket_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_FAULT_PACKET *arg3); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuHandleNonReplayableFaultPacket(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_FAULT_PACKET *arg0) { +static inline NV_STATUS kgmmuHandleNonReplayableFaultPacket(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_FAULT_PACKET *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuHandleNonReplayableFaultPacket(pGpu, pKernelGmmu, arg0) kgmmuHandleNonReplayableFaultPacket_GV100(pGpu, pKernelGmmu, arg0) +#define kgmmuHandleNonReplayableFaultPacket(pGpu, pKernelGmmu, arg3) kgmmuHandleNonReplayableFaultPacket_GV100(pGpu, pKernelGmmu, arg3) #endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuHandleNonReplayableFaultPacket_HAL(pGpu, pKernelGmmu, arg0) kgmmuHandleNonReplayableFaultPacket(pGpu, pKernelGmmu, arg0) +#define kgmmuHandleNonReplayableFaultPacket_HAL(pGpu, pKernelGmmu, arg3) kgmmuHandleNonReplayableFaultPacket(pGpu, pKernelGmmu, arg3) -NV_STATUS kgmmuNotifyNonReplayableFault_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool arg0); +NV_STATUS kgmmuNotifyNonReplayableFault_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool arg3); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuNotifyNonReplayableFault(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool arg0) { +static inline NV_STATUS kgmmuNotifyNonReplayableFault(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuNotifyNonReplayableFault(pGpu, pKernelGmmu, arg0) kgmmuNotifyNonReplayableFault_GV100(pGpu, pKernelGmmu, arg0) +#define kgmmuNotifyNonReplayableFault(pGpu, pKernelGmmu, arg3) kgmmuNotifyNonReplayableFault_GV100(pGpu, pKernelGmmu, arg3) #endif //__nvoc_kern_gmmu_h_disabled -#define kgmmuNotifyNonReplayableFault_HAL(pGpu, pKernelGmmu, arg0) kgmmuNotifyNonReplayableFault(pGpu, pKernelGmmu, arg0) +#define kgmmuNotifyNonReplayableFault_HAL(pGpu, pKernelGmmu, arg3) kgmmuNotifyNonReplayableFault(pGpu, pKernelGmmu, arg3) NvU32 kgmmuGetFaultInfoFromFaultPckt_GV100(struct KernelGmmu *pKernelGmmu, MMU_FAULT_BUFFER_ENTRY *pParsedFaultEntry); @@ -1451,72 +1940,28 @@ static inline NV_STATUS kgmmuCheckAndDecideBigPageSize(OBJGPU *pGpu, struct Kern #define kgmmuCheckAndDecideBigPageSize_HAL(pGpu, pKernelGmmu) kgmmuCheckAndDecideBigPageSize(pGpu, pKernelGmmu) -NV_STATUS kgmmuConstructEngine_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, ENGDESCRIPTOR arg0); - -static inline NV_STATUS kgmmuConstructEngine_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, ENGDESCRIPTOR arg0) { - return pKernelGmmu->__kgmmuConstructEngine__(pGpu, pKernelGmmu, arg0); -} +NV_STATUS kgmmuConstructEngine_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, ENGDESCRIPTOR arg3); NV_STATUS kgmmuStateInitLocked_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); -static inline NV_STATUS kgmmuStateInitLocked_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { - return pKernelGmmu->__kgmmuStateInitLocked__(pGpu, pKernelGmmu); -} - -NV_STATUS kgmmuStateLoad_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0); - -static inline NV_STATUS kgmmuStateLoad_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0) { - return pKernelGmmu->__kgmmuStateLoad__(pGpu, pKernelGmmu, arg0); -} - -NV_STATUS kgmmuStateUnload_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0); - -static inline NV_STATUS kgmmuStateUnload_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0) { - return pKernelGmmu->__kgmmuStateUnload__(pGpu, pKernelGmmu, arg0); -} - -NV_STATUS kgmmuStatePostLoad_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0); +NV_STATUS kgmmuStateLoad_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3); -static inline NV_STATUS kgmmuStatePostLoad_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0) { - return pKernelGmmu->__kgmmuStatePostLoad__(pGpu, pKernelGmmu, arg0); -} +NV_STATUS kgmmuStateUnload_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3); -NV_STATUS kgmmuStatePreUnload_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0); +NV_STATUS kgmmuStatePostLoad_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3); -static inline NV_STATUS kgmmuStatePreUnload_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0) { - return pKernelGmmu->__kgmmuStatePreUnload__(pGpu, pKernelGmmu, arg0); -} +NV_STATUS kgmmuStatePreUnload_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3); void kgmmuStateDestroy_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); -static inline void kgmmuStateDestroy_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { - pKernelGmmu->__kgmmuStateDestroy__(pGpu, pKernelGmmu); -} - -void kgmmuRegisterIntrService_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, IntrServiceRecord arg0[171]); - -static inline void kgmmuRegisterIntrService_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, IntrServiceRecord arg0[171]) { - pKernelGmmu->__kgmmuRegisterIntrService__(pGpu, pKernelGmmu, arg0); -} +void kgmmuRegisterIntrService_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, IntrServiceRecord arg3[175]); NvBool kgmmuClearInterrupt_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, IntrServiceClearInterruptArguments *pParams); -static inline NvBool kgmmuClearInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, IntrServiceClearInterruptArguments *pParams) { - return pKernelGmmu->__kgmmuClearInterrupt__(pGpu, pKernelGmmu, pParams); -} - NvU32 kgmmuServiceInterrupt_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, IntrServiceServiceInterruptArguments *pParams); -static inline NvU32 kgmmuServiceInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, IntrServiceServiceInterruptArguments *pParams) { - return pKernelGmmu->__kgmmuServiceInterrupt__(pGpu, pKernelGmmu, pParams); -} - static inline NV_STATUS kgmmuServiceNotificationInterrupt_56cd7a(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, IntrServiceServiceNotificationInterruptArguments *pParams) { - return NV_OK; -} - -static inline NV_STATUS kgmmuServiceNotificationInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, IntrServiceServiceNotificationInterruptArguments *pParams) { - return pKernelGmmu->__kgmmuServiceNotificationInterrupt__(pGpu, pKernelGmmu, pParams); + return NV_OK; } NV_STATUS kgmmuInstBlkVaLimitGet_GV100(struct KernelGmmu *pKernelGmmu, struct OBJVASPACE *pVAS, NvU32 subctxId, INST_BLK_INIT_PARAMS *pParams, NvU32 *pOffset, NvU64 *pData); @@ -1526,239 +1971,135 @@ static inline NV_STATUS kgmmuInstBlkVaLimitGet_f03539(struct KernelGmmu *pKernel return NV_OK; } -static inline NV_STATUS kgmmuInstBlkVaLimitGet_DISPATCH(struct KernelGmmu *pKernelGmmu, struct OBJVASPACE *pVAS, NvU32 subctxId, INST_BLK_INIT_PARAMS *pParams, NvU32 *pOffset, NvU64 *pData) { - return pKernelGmmu->__kgmmuInstBlkVaLimitGet__(pKernelGmmu, pVAS, subctxId, pParams, pOffset, pData); -} - NvU32 kgmmuSetTlbInvalidateMembarWarParameters_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, TLB_INVALIDATE_PARAMS *pParams); static inline NvU32 kgmmuSetTlbInvalidateMembarWarParameters_4a4dee(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, TLB_INVALIDATE_PARAMS *pParams) { return 0; } -static inline NvU32 kgmmuSetTlbInvalidateMembarWarParameters_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, TLB_INVALIDATE_PARAMS *pParams) { - return pKernelGmmu->__kgmmuSetTlbInvalidateMembarWarParameters__(pGpu, pKernelGmmu, pParams); -} - NV_STATUS kgmmuSetTlbInvalidationScope_GA100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 flags, TLB_INVALIDATE_PARAMS *pParams); static inline NV_STATUS kgmmuSetTlbInvalidationScope_46f6a7(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 flags, TLB_INVALIDATE_PARAMS *pParams) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kgmmuSetTlbInvalidationScope_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 flags, TLB_INVALIDATE_PARAMS *pParams) { - return pKernelGmmu->__kgmmuSetTlbInvalidationScope__(pGpu, pKernelGmmu, flags, pParams); -} - void kgmmuFmtInitPteComptagLine_TU10X(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT_PTE *pPte, const NvU32 version); static inline void kgmmuFmtInitPteComptagLine_b3696a(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT_PTE *pPte, const NvU32 version) { return; } -static inline void kgmmuFmtInitPteComptagLine_DISPATCH(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT_PTE *pPte, const NvU32 version) { - pKernelGmmu->__kgmmuFmtInitPteComptagLine__(pKernelGmmu, pPte, version); -} - void kgmmuFmtInitPeerPteFld_TU10X(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT_PTE *pPte, const NvU32 version); static inline void kgmmuFmtInitPeerPteFld_b3696a(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT_PTE *pPte, const NvU32 version) { return; } -static inline void kgmmuFmtInitPeerPteFld_DISPATCH(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT_PTE *pPte, const NvU32 version) { - pKernelGmmu->__kgmmuFmtInitPeerPteFld__(pKernelGmmu, pPte, version); -} - void kgmmuFmtInitPte_GP10X(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT_PTE *pPte, const NvU32 version, const struct NV_FIELD_ENUM_ENTRY *pPteApertures, const NvBool bUnifiedAperture); void kgmmuFmtInitPte_GH10X(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT_PTE *pPte, const NvU32 version, const struct NV_FIELD_ENUM_ENTRY *pPteApertures, const NvBool bUnifiedAperture); -static inline void kgmmuFmtInitPte_DISPATCH(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT_PTE *pPte, const NvU32 version, const struct NV_FIELD_ENUM_ENTRY *pPteApertures, const NvBool bUnifiedAperture) { - pKernelGmmu->__kgmmuFmtInitPte__(pKernelGmmu, pPte, version, pPteApertures, bUnifiedAperture); -} - void kgmmuFmtInitPde_GP10X(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT_PDE *pPde, const NvU32 version, const struct NV_FIELD_ENUM_ENTRY *pPdeApertures); void kgmmuFmtInitPde_GH10X(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT_PDE *pPde, const NvU32 version, const struct NV_FIELD_ENUM_ENTRY *pPdeApertures); -static inline void kgmmuFmtInitPde_DISPATCH(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT_PDE *pPde, const NvU32 version, const struct NV_FIELD_ENUM_ENTRY *pPdeApertures) { - pKernelGmmu->__kgmmuFmtInitPde__(pKernelGmmu, pPde, version, pPdeApertures); -} - NvBool kgmmuFmtIsVersionSupported_GP10X(struct KernelGmmu *pKernelGmmu, NvU32 version); NvBool kgmmuFmtIsVersionSupported_GH10X(struct KernelGmmu *pKernelGmmu, NvU32 version); -static inline NvBool kgmmuFmtIsVersionSupported_DISPATCH(struct KernelGmmu *pKernelGmmu, NvU32 version) { - return pKernelGmmu->__kgmmuFmtIsVersionSupported__(pKernelGmmu, version); -} - void kgmmuFmtInitLevels_GP10X(struct KernelGmmu *pKernelGmmu, MMU_FMT_LEVEL *pLevels, const NvU32 numLevels, const NvU32 version, const NvU32 bigPageShift); void kgmmuFmtInitLevels_GA10X(struct KernelGmmu *pKernelGmmu, MMU_FMT_LEVEL *pLevels, const NvU32 numLevels, const NvU32 version, const NvU32 bigPageShift); void kgmmuFmtInitLevels_GH10X(struct KernelGmmu *pKernelGmmu, MMU_FMT_LEVEL *pLevels, const NvU32 numLevels, const NvU32 version, const NvU32 bigPageShift); -static inline void kgmmuFmtInitLevels_DISPATCH(struct KernelGmmu *pKernelGmmu, MMU_FMT_LEVEL *pLevels, const NvU32 numLevels, const NvU32 version, const NvU32 bigPageShift) { - pKernelGmmu->__kgmmuFmtInitLevels__(pKernelGmmu, pLevels, numLevels, version, bigPageShift); -} - void kgmmuFmtInitPdeMulti_GP10X(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT_PDE_MULTI *pPdeMulti, const NvU32 version, const struct NV_FIELD_ENUM_ENTRY *pPdeApertures); void kgmmuFmtInitPdeMulti_GH10X(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT_PDE_MULTI *pPdeMulti, const NvU32 version, const struct NV_FIELD_ENUM_ENTRY *pPdeApertures); -static inline void kgmmuFmtInitPdeMulti_DISPATCH(struct KernelGmmu *pKernelGmmu, struct GMMU_FMT_PDE_MULTI *pPdeMulti, const NvU32 version, const struct NV_FIELD_ENUM_ENTRY *pPdeApertures) { - pKernelGmmu->__kgmmuFmtInitPdeMulti__(pKernelGmmu, pPdeMulti, version, pPdeApertures); -} - -NV_STATUS kgmmuFmtFamiliesInit_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); +NV_STATUS kgmmuFmtFamiliesInit_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); NV_STATUS kgmmuFmtFamiliesInit_GH100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); -static inline NV_STATUS kgmmuFmtFamiliesInit_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { - return pKernelGmmu->__kgmmuFmtFamiliesInit__(pGpu, pKernelGmmu); -} - -NV_STATUS kgmmuTranslatePtePcfFromSw_GH100(struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 *arg1); +NV_STATUS kgmmuTranslatePtePcfFromSw_GH100(struct KernelGmmu *pKernelGmmu, NvU32 arg2, NvU32 *arg3); -static inline NV_STATUS kgmmuTranslatePtePcfFromSw_56cd7a(struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 *arg1) { +static inline NV_STATUS kgmmuTranslatePtePcfFromSw_56cd7a(struct KernelGmmu *pKernelGmmu, NvU32 arg2, NvU32 *arg3) { return NV_OK; } -static inline NV_STATUS kgmmuTranslatePtePcfFromSw_DISPATCH(struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 *arg1) { - return pKernelGmmu->__kgmmuTranslatePtePcfFromSw__(pKernelGmmu, arg0, arg1); -} - -NV_STATUS kgmmuTranslatePtePcfFromHw_GH100(struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvBool arg1, NvU32 *arg2); +NV_STATUS kgmmuTranslatePtePcfFromHw_GH100(struct KernelGmmu *pKernelGmmu, NvU32 arg2, NvBool arg3, NvU32 *arg4); -static inline NV_STATUS kgmmuTranslatePtePcfFromHw_56cd7a(struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvBool arg1, NvU32 *arg2) { +static inline NV_STATUS kgmmuTranslatePtePcfFromHw_56cd7a(struct KernelGmmu *pKernelGmmu, NvU32 arg2, NvBool arg3, NvU32 *arg4) { return NV_OK; } -static inline NV_STATUS kgmmuTranslatePtePcfFromHw_DISPATCH(struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvBool arg1, NvU32 *arg2) { - return pKernelGmmu->__kgmmuTranslatePtePcfFromHw__(pKernelGmmu, arg0, arg1, arg2); -} - -NV_STATUS kgmmuTranslatePdePcfFromSw_GH100(struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 *arg1); +NV_STATUS kgmmuTranslatePdePcfFromSw_GH100(struct KernelGmmu *pKernelGmmu, NvU32 arg2, NvU32 *arg3); -static inline NV_STATUS kgmmuTranslatePdePcfFromSw_56cd7a(struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 *arg1) { +static inline NV_STATUS kgmmuTranslatePdePcfFromSw_56cd7a(struct KernelGmmu *pKernelGmmu, NvU32 arg2, NvU32 *arg3) { return NV_OK; } -static inline NV_STATUS kgmmuTranslatePdePcfFromSw_DISPATCH(struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 *arg1) { - return pKernelGmmu->__kgmmuTranslatePdePcfFromSw__(pKernelGmmu, arg0, arg1); -} - -NV_STATUS kgmmuTranslatePdePcfFromHw_GH100(struct KernelGmmu *pKernelGmmu, NvU32 arg0, GMMU_APERTURE arg1, NvU32 *arg2); +NV_STATUS kgmmuTranslatePdePcfFromHw_GH100(struct KernelGmmu *pKernelGmmu, NvU32 arg2, GMMU_APERTURE arg3, NvU32 *arg4); -static inline NV_STATUS kgmmuTranslatePdePcfFromHw_56cd7a(struct KernelGmmu *pKernelGmmu, NvU32 arg0, GMMU_APERTURE arg1, NvU32 *arg2) { +static inline NV_STATUS kgmmuTranslatePdePcfFromHw_56cd7a(struct KernelGmmu *pKernelGmmu, NvU32 arg2, GMMU_APERTURE arg3, NvU32 *arg4) { return NV_OK; } -static inline NV_STATUS kgmmuTranslatePdePcfFromHw_DISPATCH(struct KernelGmmu *pKernelGmmu, NvU32 arg0, GMMU_APERTURE arg1, NvU32 *arg2) { - return pKernelGmmu->__kgmmuTranslatePdePcfFromHw__(pKernelGmmu, arg0, arg1, arg2); -} - NV_STATUS kgmmuGetFaultRegisterMappings_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvP64 *pFaultBufferGet, NvP64 *pFaultBufferPut, NvP64 *pFaultBufferInfo, NvP64 *faultIntr, NvP64 *faultIntrSet, NvP64 *faultIntrClear, NvU32 *faultMask, NvP64 *pPrefetchCtrl); NV_STATUS kgmmuGetFaultRegisterMappings_GH100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvP64 *pFaultBufferGet, NvP64 *pFaultBufferPut, NvP64 *pFaultBufferInfo, NvP64 *faultIntr, NvP64 *faultIntrSet, NvP64 *faultIntrClear, NvU32 *faultMask, NvP64 *pPrefetchCtrl); -static inline NV_STATUS kgmmuGetFaultRegisterMappings_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvP64 *pFaultBufferGet, NvP64 *pFaultBufferPut, NvP64 *pFaultBufferInfo, NvP64 *faultIntr, NvP64 *faultIntrSet, NvP64 *faultIntrClear, NvU32 *faultMask, NvP64 *pPrefetchCtrl) { - return pKernelGmmu->__kgmmuGetFaultRegisterMappings__(pGpu, pKernelGmmu, index, pFaultBufferGet, pFaultBufferPut, pFaultBufferInfo, faultIntr, faultIntrSet, faultIntrClear, faultMask, pPrefetchCtrl); -} - NV_STATUS kgmmuIssueReplayableFaultBufferFlush_GH100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool bCopyAndFlush); static inline NV_STATUS kgmmuIssueReplayableFaultBufferFlush_46f6a7(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool bCopyAndFlush) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kgmmuIssueReplayableFaultBufferFlush_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool bCopyAndFlush) { - return pKernelGmmu->__kgmmuIssueReplayableFaultBufferFlush__(pGpu, pKernelGmmu, bCopyAndFlush); -} - NV_STATUS kgmmuToggleFaultOnPrefetch_GH100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool bEnable); static inline NV_STATUS kgmmuToggleFaultOnPrefetch_46f6a7(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool bEnable) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kgmmuToggleFaultOnPrefetch_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool bEnable) { - return pKernelGmmu->__kgmmuToggleFaultOnPrefetch__(pGpu, pKernelGmmu, bEnable); -} - -NV_STATUS kgmmuFaultBufferAllocSharedMemory_GH100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg0); +NV_STATUS kgmmuFaultBufferAllocSharedMemory_GH100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg3); -static inline NV_STATUS kgmmuFaultBufferAllocSharedMemory_56cd7a(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg0) { +static inline NV_STATUS kgmmuFaultBufferAllocSharedMemory_56cd7a(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg3) { return NV_OK; } -static inline NV_STATUS kgmmuFaultBufferAllocSharedMemory_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg0) { - return pKernelGmmu->__kgmmuFaultBufferAllocSharedMemory__(pGpu, pKernelGmmu, arg0); -} - -void kgmmuFaultBufferFreeSharedMemory_GH100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg0); +void kgmmuFaultBufferFreeSharedMemory_GH100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg3); -static inline void kgmmuFaultBufferFreeSharedMemory_b3696a(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg0) { +static inline void kgmmuFaultBufferFreeSharedMemory_b3696a(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg3) { return; } -static inline void kgmmuFaultBufferFreeSharedMemory_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg0) { - pKernelGmmu->__kgmmuFaultBufferFreeSharedMemory__(pGpu, pKernelGmmu, arg0); -} - -NV_STATUS kgmmuSetupWarForBug2720120_GA100(struct KernelGmmu *pKernelGmmu, GMMU_FMT_FAMILY *pFam); +NV_STATUS kgmmuSetupWarForBug2720120_GA100(struct KernelGmmu *pKernelGmmu); -static inline NV_STATUS kgmmuSetupWarForBug2720120_56cd7a(struct KernelGmmu *pKernelGmmu, GMMU_FMT_FAMILY *pFam) { +static inline NV_STATUS kgmmuSetupWarForBug2720120_56cd7a(struct KernelGmmu *pKernelGmmu) { return NV_OK; } -static inline NV_STATUS kgmmuSetupWarForBug2720120_DISPATCH(struct KernelGmmu *pKernelGmmu, GMMU_FMT_FAMILY *pFam) { - return pKernelGmmu->__kgmmuSetupWarForBug2720120__(pKernelGmmu, pFam); -} - NvU32 kgmmuGetGraphicsEngineId_GV100(struct KernelGmmu *pKernelGmmu); NvU32 kgmmuGetGraphicsEngineId_GH100(struct KernelGmmu *pKernelGmmu); -static inline NvU32 kgmmuGetGraphicsEngineId_DISPATCH(struct KernelGmmu *pKernelGmmu) { - return pKernelGmmu->__kgmmuGetGraphicsEngineId__(pKernelGmmu); -} - NvU32 kgmmuReadShadowBufPutIndex_GH100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE type); static inline NvU32 kgmmuReadShadowBufPutIndex_4a4dee(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE type) { return 0; } -static inline NvU32 kgmmuReadShadowBufPutIndex_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE type) { - return pKernelGmmu->__kgmmuReadShadowBufPutIndex__(pGpu, pKernelGmmu, type); -} - -NvBool kgmmuIsFaultEngineBar1_TU102(struct KernelGmmu *pKernelGmmu, NvU32 arg0); - -NvBool kgmmuIsFaultEngineBar1_GH100(struct KernelGmmu *pKernelGmmu, NvU32 arg0); - -static inline NvBool kgmmuIsFaultEngineBar1_DISPATCH(struct KernelGmmu *pKernelGmmu, NvU32 arg0) { - return pKernelGmmu->__kgmmuIsFaultEngineBar1__(pKernelGmmu, arg0); -} - -NvBool kgmmuIsFaultEngineBar2_TU102(struct KernelGmmu *pKernelGmmu, NvU32 arg0); +NvBool kgmmuIsFaultEngineBar1_TU102(struct KernelGmmu *pKernelGmmu, NvU32 arg2); -NvBool kgmmuIsFaultEngineBar2_GH100(struct KernelGmmu *pKernelGmmu, NvU32 arg0); +NvBool kgmmuIsFaultEngineBar1_GH100(struct KernelGmmu *pKernelGmmu, NvU32 arg2); -static inline NvBool kgmmuIsFaultEngineBar2_DISPATCH(struct KernelGmmu *pKernelGmmu, NvU32 arg0) { - return pKernelGmmu->__kgmmuIsFaultEngineBar2__(pKernelGmmu, arg0); -} +NvBool kgmmuIsFaultEngineBar2_TU102(struct KernelGmmu *pKernelGmmu, NvU32 arg2); -NvBool kgmmuIsFaultEnginePhysical_GV100(struct KernelGmmu *pKernelGmmu, NvU32 arg0); +NvBool kgmmuIsFaultEngineBar2_GH100(struct KernelGmmu *pKernelGmmu, NvU32 arg2); -NvBool kgmmuIsFaultEnginePhysical_GH100(struct KernelGmmu *pKernelGmmu, NvU32 arg0); +NvBool kgmmuIsFaultEnginePhysical_GV100(struct KernelGmmu *pKernelGmmu, NvU32 arg2); -static inline NvBool kgmmuIsFaultEnginePhysical_DISPATCH(struct KernelGmmu *pKernelGmmu, NvU32 arg0) { - return pKernelGmmu->__kgmmuIsFaultEnginePhysical__(pKernelGmmu, arg0); -} +NvBool kgmmuIsFaultEnginePhysical_GH100(struct KernelGmmu *pKernelGmmu, NvU32 arg2); static inline NV_STATUS kgmmuCopyMmuFaults_92bfc3(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct THREAD_STATE_NODE *pThreadState, NvU32 *entriesCopied, FAULT_BUFFER_TYPE type, NvBool bPollForValidBit) { NV_ASSERT_PRECOMP(0); @@ -1767,10 +2108,6 @@ static inline NV_STATUS kgmmuCopyMmuFaults_92bfc3(OBJGPU *pGpu, struct KernelGmm NV_STATUS kgmmuCopyMmuFaults_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct THREAD_STATE_NODE *pThreadState, NvU32 *entriesCopied, FAULT_BUFFER_TYPE type, NvBool bPollForValidBit); -static inline NV_STATUS kgmmuCopyMmuFaults_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct THREAD_STATE_NODE *pThreadState, NvU32 *entriesCopied, FAULT_BUFFER_TYPE type, NvBool bPollForValidBit) { - return pKernelGmmu->__kgmmuCopyMmuFaults__(pGpu, pKernelGmmu, pThreadState, entriesCopied, type, bPollForValidBit); -} - static inline NV_STATUS kgmmuParseFaultPacket_92bfc3(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvP64 pFaultPacket, NvP64 pParsedFaultEntry) { NV_ASSERT_PRECOMP(0); return NV_ERR_NOT_SUPPORTED; @@ -1778,20 +2115,12 @@ static inline NV_STATUS kgmmuParseFaultPacket_92bfc3(OBJGPU *pGpu, struct Kernel NV_STATUS kgmmuParseFaultPacket_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvP64 pFaultPacket, NvP64 pParsedFaultEntry); -static inline NV_STATUS kgmmuParseFaultPacket_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvP64 pFaultPacket, NvP64 pParsedFaultEntry) { - return pKernelGmmu->__kgmmuParseFaultPacket__(pGpu, pKernelGmmu, pFaultPacket, pParsedFaultEntry); -} - static inline void kgmmuFaultBufferClearPackets_f2d351(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct HW_FAULT_BUFFER *pFaultBuffer, NvU32 beginIdx, NvU32 numFaultPackets) { NV_ASSERT_PRECOMP(0); } void kgmmuFaultBufferClearPackets_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct HW_FAULT_BUFFER *pFaultBuffer, NvU32 beginIdx, NvU32 numFaultPackets); -static inline void kgmmuFaultBufferClearPackets_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct HW_FAULT_BUFFER *pFaultBuffer, NvU32 beginIdx, NvU32 numFaultPackets) { - pKernelGmmu->__kgmmuFaultBufferClearPackets__(pGpu, pKernelGmmu, pFaultBuffer, beginIdx, numFaultPackets); -} - static inline GMMU_FAULT_PACKET *kgmmuFaultBufferGetFault_dc3e6c(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct HW_FAULT_BUFFER *pFaultBuffer, NvU32 idx) { NV_ASSERT_PRECOMP(0); return ((void *)0); @@ -1799,10 +2128,6 @@ static inline GMMU_FAULT_PACKET *kgmmuFaultBufferGetFault_dc3e6c(OBJGPU *pGpu, s GMMU_FAULT_PACKET *kgmmuFaultBufferGetFault_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct HW_FAULT_BUFFER *pFaultBuffer, NvU32 idx); -static inline GMMU_FAULT_PACKET *kgmmuFaultBufferGetFault_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct HW_FAULT_BUFFER *pFaultBuffer, NvU32 idx) { - return pKernelGmmu->__kgmmuFaultBufferGetFault__(pGpu, pKernelGmmu, pFaultBuffer, idx); -} - static inline NvU32 kgmmuCopyFaultPacketToClientShadowBuffer_13cd8d(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct GMMU_FAULT_BUFFER *pFaultBuffer, FAULT_BUFFER_TYPE type, NvU32 getIndex, NvU32 shadowBufPutIndex, NvU32 maxBufferEntries, struct THREAD_STATE_NODE *pThreadState, NvU32 *pFaultsCopied) { NV_ASSERT_PRECOMP(0); return 0; @@ -1812,10 +2137,6 @@ NvU32 kgmmuCopyFaultPacketToClientShadowBuffer_GV100(OBJGPU *pGpu, struct Kernel NvU32 kgmmuCopyFaultPacketToClientShadowBuffer_GH100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct GMMU_FAULT_BUFFER *pFaultBuffer, FAULT_BUFFER_TYPE type, NvU32 getIndex, NvU32 shadowBufPutIndex, NvU32 maxBufferEntries, struct THREAD_STATE_NODE *pThreadState, NvU32 *pFaultsCopied); -static inline NvU32 kgmmuCopyFaultPacketToClientShadowBuffer_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct GMMU_FAULT_BUFFER *pFaultBuffer, FAULT_BUFFER_TYPE type, NvU32 getIndex, NvU32 shadowBufPutIndex, NvU32 maxBufferEntries, struct THREAD_STATE_NODE *pThreadState, NvU32 *pFaultsCopied) { - return pKernelGmmu->__kgmmuCopyFaultPacketToClientShadowBuffer__(pGpu, pKernelGmmu, pFaultBuffer, type, getIndex, shadowBufPutIndex, maxBufferEntries, pThreadState, pFaultsCopied); -} - static inline NvBool kgmmuIsReplayableShadowFaultBufferFull_ceaee8(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_CLIENT_SHADOW_FAULT_BUFFER *pClientFaultBuf, NvU32 shadowBufPutIndex, NvU32 maxBufferEntries) { NV_ASSERT_PRECOMP(0); return ((NvBool)(0 != 0)); @@ -1827,10 +2148,6 @@ static inline NvBool kgmmuIsReplayableShadowFaultBufferFull_491d52(OBJGPU *pGpu, return ((NvBool)(0 != 0)); } -static inline NvBool kgmmuIsReplayableShadowFaultBufferFull_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_CLIENT_SHADOW_FAULT_BUFFER *pClientFaultBuf, NvU32 shadowBufPutIndex, NvU32 maxBufferEntries) { - return pKernelGmmu->__kgmmuIsReplayableShadowFaultBufferFull__(pGpu, pKernelGmmu, pClientFaultBuf, shadowBufPutIndex, maxBufferEntries); -} - static inline NvU32 kgmmuReadClientShadowBufPutIndex_13cd8d(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 gfid, FAULT_BUFFER_TYPE type) { NV_ASSERT_PRECOMP(0); return 0; @@ -1842,10 +2159,6 @@ static inline NvU32 kgmmuReadClientShadowBufPutIndex_4a4dee(OBJGPU *pGpu, struct return 0; } -static inline NvU32 kgmmuReadClientShadowBufPutIndex_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 gfid, FAULT_BUFFER_TYPE type) { - return pKernelGmmu->__kgmmuReadClientShadowBufPutIndex__(pGpu, pKernelGmmu, gfid, type); -} - static inline void kgmmuWriteClientShadowBufPutIndex_f2d351(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 gfid, FAULT_BUFFER_TYPE type, NvU32 putIndex) { NV_ASSERT_PRECOMP(0); } @@ -1856,18 +2169,10 @@ static inline void kgmmuWriteClientShadowBufPutIndex_b3696a(OBJGPU *pGpu, struct return; } -static inline void kgmmuWriteClientShadowBufPutIndex_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 gfid, FAULT_BUFFER_TYPE type, NvU32 putIndex) { - pKernelGmmu->__kgmmuWriteClientShadowBufPutIndex__(pGpu, pKernelGmmu, gfid, type, putIndex); -} - NvU32 kgmmuGetMinCeEngineId_GV100(struct KernelGmmu *pKernelGmmu); NvU32 kgmmuGetMinCeEngineId_GH100(struct KernelGmmu *pKernelGmmu); -static inline NvU32 kgmmuGetMinCeEngineId_DISPATCH(struct KernelGmmu *pKernelGmmu) { - return pKernelGmmu->__kgmmuGetMinCeEngineId__(pKernelGmmu); -} - NvU32 kgmmuGetMaxCeEngineId_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); NvU32 kgmmuGetMaxCeEngineId_GA100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); @@ -1876,10 +2181,6 @@ NvU32 kgmmuGetMaxCeEngineId_AD102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); NvU32 kgmmuGetMaxCeEngineId_GH100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); -static inline NvU32 kgmmuGetMaxCeEngineId_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { - return pKernelGmmu->__kgmmuGetMaxCeEngineId__(pGpu, pKernelGmmu); -} - static inline NV_STATUS kgmmuFaultBufferMap_92bfc3(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 gfid) { NV_ASSERT_PRECOMP(0); return NV_ERR_NOT_SUPPORTED; @@ -1887,10 +2188,6 @@ static inline NV_STATUS kgmmuFaultBufferMap_92bfc3(OBJGPU *pGpu, struct KernelGm NV_STATUS kgmmuFaultBufferMap_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 gfid); -static inline NV_STATUS kgmmuFaultBufferMap_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 gfid) { - return pKernelGmmu->__kgmmuFaultBufferMap__(pGpu, pKernelGmmu, index, gfid); -} - static inline NV_STATUS kgmmuFaultBufferUnmap_92bfc3(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 gfid) { NV_ASSERT_PRECOMP(0); return NV_ERR_NOT_SUPPORTED; @@ -1898,60 +2195,36 @@ static inline NV_STATUS kgmmuFaultBufferUnmap_92bfc3(OBJGPU *pGpu, struct Kernel NV_STATUS kgmmuFaultBufferUnmap_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 gfid); -static inline NV_STATUS kgmmuFaultBufferUnmap_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 gfid) { - return pKernelGmmu->__kgmmuFaultBufferUnmap__(pGpu, pKernelGmmu, index, gfid); -} - static inline NV_STATUS kgmmuFaultBufferInit_56cd7a(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { return NV_OK; } NV_STATUS kgmmuFaultBufferInit_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); -static inline NV_STATUS kgmmuFaultBufferInit_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { - return pKernelGmmu->__kgmmuFaultBufferInit__(pGpu, pKernelGmmu); -} - static inline NV_STATUS kgmmuFaultBufferDestroy_56cd7a(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { return NV_OK; } NV_STATUS kgmmuFaultBufferDestroy_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); -static inline NV_STATUS kgmmuFaultBufferDestroy_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { - return pKernelGmmu->__kgmmuFaultBufferDestroy__(pGpu, pKernelGmmu); -} - static inline NV_STATUS kgmmuFaultBufferLoad_ac1694(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 gfid) { return NV_OK; } NV_STATUS kgmmuFaultBufferLoad_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 gfid); -static inline NV_STATUS kgmmuFaultBufferLoad_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 gfid) { - return pKernelGmmu->__kgmmuFaultBufferLoad__(pGpu, pKernelGmmu, index, gfid); -} - static inline NV_STATUS kgmmuFaultBufferUnload_ac1694(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 gfid) { return NV_OK; } NV_STATUS kgmmuFaultBufferUnload_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 gfid); -static inline NV_STATUS kgmmuFaultBufferUnload_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 gfid) { - return pKernelGmmu->__kgmmuFaultBufferUnload__(pGpu, pKernelGmmu, index, gfid); -} - static inline NV_STATUS kgmmuEnableFaultBuffer_395e98(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvBool bIsErrorRecovery, NvU32 gfid) { return NV_ERR_NOT_SUPPORTED; } NV_STATUS kgmmuEnableFaultBuffer_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvBool bIsErrorRecovery, NvU32 gfid); -static inline NV_STATUS kgmmuEnableFaultBuffer_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvBool bIsErrorRecovery, NvU32 gfid) { - return pKernelGmmu->__kgmmuEnableFaultBuffer__(pGpu, pKernelGmmu, index, bIsErrorRecovery, gfid); -} - static inline NV_STATUS kgmmuDisableFaultBuffer_92bfc3(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvBool bIsErrorRecovery, NvU32 gfid) { NV_ASSERT_PRECOMP(0); return NV_ERR_NOT_SUPPORTED; @@ -1959,10 +2232,6 @@ static inline NV_STATUS kgmmuDisableFaultBuffer_92bfc3(OBJGPU *pGpu, struct Kern NV_STATUS kgmmuDisableFaultBuffer_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvBool bIsErrorRecovery, NvU32 gfid); -static inline NV_STATUS kgmmuDisableFaultBuffer_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvBool bIsErrorRecovery, NvU32 gfid) { - return pKernelGmmu->__kgmmuDisableFaultBuffer__(pGpu, pKernelGmmu, index, bIsErrorRecovery, gfid); -} - static inline NvU32 kgmmuSetAndGetDefaultFaultBufferSize_13cd8d(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE index, NvU32 gfid) { NV_ASSERT_PRECOMP(0); return 0; @@ -1970,29 +2239,17 @@ static inline NvU32 kgmmuSetAndGetDefaultFaultBufferSize_13cd8d(OBJGPU *pGpu, st NvU32 kgmmuSetAndGetDefaultFaultBufferSize_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE index, NvU32 gfid); -static inline NvU32 kgmmuSetAndGetDefaultFaultBufferSize_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE index, NvU32 gfid) { - return pKernelGmmu->__kgmmuSetAndGetDefaultFaultBufferSize__(pGpu, pKernelGmmu, index, gfid); -} - -static inline void kgmmuReadMmuFaultInstHiLo_f2d351(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 *arg0, NvU32 *arg1) { +static inline void kgmmuReadMmuFaultInstHiLo_f2d351(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 *arg3, NvU32 *arg4) { NV_ASSERT_PRECOMP(0); } -void kgmmuReadMmuFaultInstHiLo_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 *arg0, NvU32 *arg1); +void kgmmuReadMmuFaultInstHiLo_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 *arg3, NvU32 *arg4); -static inline void kgmmuReadMmuFaultInstHiLo_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 *arg0, NvU32 *arg1) { - pKernelGmmu->__kgmmuReadMmuFaultInstHiLo__(pGpu, pKernelGmmu, arg0, arg1); -} - -static inline void kgmmuReadMmuFaultAddrHiLo_f2d351(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 *arg0, NvU32 *arg1) { +static inline void kgmmuReadMmuFaultAddrHiLo_f2d351(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 *arg3, NvU32 *arg4) { NV_ASSERT_PRECOMP(0); } -void kgmmuReadMmuFaultAddrHiLo_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 *arg0, NvU32 *arg1); - -static inline void kgmmuReadMmuFaultAddrHiLo_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 *arg0, NvU32 *arg1) { - pKernelGmmu->__kgmmuReadMmuFaultAddrHiLo__(pGpu, pKernelGmmu, arg0, arg1); -} +void kgmmuReadMmuFaultAddrHiLo_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 *arg3, NvU32 *arg4); static inline NvU32 kgmmuReadMmuFaultInfo_a547a8(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { NV_ASSERT_PRECOMP(0); @@ -2001,29 +2258,17 @@ static inline NvU32 kgmmuReadMmuFaultInfo_a547a8(OBJGPU *pGpu, struct KernelGmmu NvU32 kgmmuReadMmuFaultInfo_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); -static inline NvU32 kgmmuReadMmuFaultInfo_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { - return pKernelGmmu->__kgmmuReadMmuFaultInfo__(pGpu, pKernelGmmu); -} - -static inline void kgmmuWriteMmuFaultBufferSize_f2d351(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 arg1, NvU32 gfid) { +static inline void kgmmuWriteMmuFaultBufferSize_f2d351(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3, NvU32 arg4, NvU32 gfid) { NV_ASSERT_PRECOMP(0); } -void kgmmuWriteMmuFaultBufferSize_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 arg1, NvU32 gfid); +void kgmmuWriteMmuFaultBufferSize_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3, NvU32 arg4, NvU32 gfid); -static inline void kgmmuWriteMmuFaultBufferSize_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 arg1, NvU32 gfid) { - pKernelGmmu->__kgmmuWriteMmuFaultBufferSize__(pGpu, pKernelGmmu, arg0, arg1, gfid); -} - -static inline void kgmmuWriteMmuFaultBufferHiLo_f2d351(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 arg1, NvU32 arg2, NvU32 gfid) { +static inline void kgmmuWriteMmuFaultBufferHiLo_f2d351(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3, NvU32 arg4, NvU32 arg5, NvU32 gfid) { NV_ASSERT_PRECOMP(0); } -void kgmmuWriteMmuFaultBufferHiLo_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 arg1, NvU32 arg2, NvU32 gfid); - -static inline void kgmmuWriteMmuFaultBufferHiLo_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 arg1, NvU32 arg2, NvU32 gfid) { - pKernelGmmu->__kgmmuWriteMmuFaultBufferHiLo__(pGpu, pKernelGmmu, arg0, arg1, arg2, gfid); -} +void kgmmuWriteMmuFaultBufferHiLo_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3, NvU32 arg4, NvU32 arg5, NvU32 gfid); static inline NV_STATUS kgmmuEnableMmuFaultInterrupts_92bfc3(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index) { NV_ASSERT_PRECOMP(0); @@ -2034,10 +2279,6 @@ static inline NV_STATUS kgmmuEnableMmuFaultInterrupts_46f6a7(OBJGPU *pGpu, struc return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kgmmuEnableMmuFaultInterrupts_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index) { - return pKernelGmmu->__kgmmuEnableMmuFaultInterrupts__(pGpu, pKernelGmmu, index); -} - static inline NV_STATUS kgmmuDisableMmuFaultInterrupts_92bfc3(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index) { NV_ASSERT_PRECOMP(0); return NV_ERR_NOT_SUPPORTED; @@ -2047,10 +2288,6 @@ static inline NV_STATUS kgmmuDisableMmuFaultInterrupts_46f6a7(OBJGPU *pGpu, stru return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kgmmuDisableMmuFaultInterrupts_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index) { - return pKernelGmmu->__kgmmuDisableMmuFaultInterrupts__(pGpu, pKernelGmmu, index); -} - static inline NV_STATUS kgmmuEnableMmuFaultOverflowIntr_92bfc3(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index) { NV_ASSERT_PRECOMP(0); return NV_ERR_NOT_SUPPORTED; @@ -2060,10 +2297,6 @@ static inline NV_STATUS kgmmuEnableMmuFaultOverflowIntr_46f6a7(OBJGPU *pGpu, str return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kgmmuEnableMmuFaultOverflowIntr_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index) { - return pKernelGmmu->__kgmmuEnableMmuFaultOverflowIntr__(pGpu, pKernelGmmu, index); -} - static inline void kgmmuSignExtendFaultAddress_f2d351(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU64 *pMmuFaultAddress) { NV_ASSERT_PRECOMP(0); } @@ -2072,10 +2305,6 @@ void kgmmuSignExtendFaultAddress_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelG void kgmmuSignExtendFaultAddress_GH100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU64 *pMmuFaultAddress); -static inline void kgmmuSignExtendFaultAddress_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU64 *pMmuFaultAddress) { - pKernelGmmu->__kgmmuSignExtendFaultAddress__(pGpu, pKernelGmmu, pMmuFaultAddress); -} - static inline NV_STATUS kgmmuGetFaultType_92bfc3(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 fault, FAULT_TYPE *pMmuFaultType) { NV_ASSERT_PRECOMP(0); return NV_ERR_NOT_SUPPORTED; @@ -2083,25 +2312,17 @@ static inline NV_STATUS kgmmuGetFaultType_92bfc3(OBJGPU *pGpu, struct KernelGmmu NV_STATUS kgmmuGetFaultType_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 fault, FAULT_TYPE *pMmuFaultType); -static inline NV_STATUS kgmmuGetFaultType_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 fault, FAULT_TYPE *pMmuFaultType) { - return pKernelGmmu->__kgmmuGetFaultType__(pGpu, pKernelGmmu, fault, pMmuFaultType); -} - -static inline NvBool kgmmuIsP2PUnboundInstFault_92bfc3(struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 arg1) { +static inline NvBool kgmmuIsP2PUnboundInstFault_92bfc3(struct KernelGmmu *pKernelGmmu, NvU32 arg2, NvU32 arg3) { NV_ASSERT_PRECOMP(0); return NV_ERR_NOT_SUPPORTED; } -NvBool kgmmuIsP2PUnboundInstFault_GA100(struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 arg1); +NvBool kgmmuIsP2PUnboundInstFault_GA100(struct KernelGmmu *pKernelGmmu, NvU32 arg2, NvU32 arg3); -static inline NvBool kgmmuIsP2PUnboundInstFault_491d52(struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 arg1) { +static inline NvBool kgmmuIsP2PUnboundInstFault_491d52(struct KernelGmmu *pKernelGmmu, NvU32 arg2, NvU32 arg3) { return ((NvBool)(0 != 0)); } -static inline NvBool kgmmuIsP2PUnboundInstFault_DISPATCH(struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 arg1) { - return pKernelGmmu->__kgmmuIsP2PUnboundInstFault__(pKernelGmmu, arg0, arg1); -} - NV_STATUS kgmmuServiceVfPriFaults_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 faultType); static inline NV_STATUS kgmmuServiceVfPriFaults_92bfc3(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 faultType) { @@ -2109,23 +2330,15 @@ static inline NV_STATUS kgmmuServiceVfPriFaults_92bfc3(OBJGPU *pGpu, struct Kern return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kgmmuServiceVfPriFaults_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 faultType) { - return pKernelGmmu->__kgmmuServiceVfPriFaults__(pGpu, pKernelGmmu, faultType); -} - -static inline NvBool kgmmuTestVidmemAccessBitBufferError_491d52(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0) { +static inline NvBool kgmmuTestVidmemAccessBitBufferError_491d52(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3) { return ((NvBool)(0 != 0)); } -static inline NvBool kgmmuTestVidmemAccessBitBufferError_ceaee8(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0) { +static inline NvBool kgmmuTestVidmemAccessBitBufferError_ceaee8(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3) { NV_ASSERT_PRECOMP(0); return ((NvBool)(0 != 0)); } -static inline NvBool kgmmuTestVidmemAccessBitBufferError_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0) { - return pKernelGmmu->__kgmmuTestVidmemAccessBitBufferError__(pGpu, pKernelGmmu, arg0); -} - static inline void kgmmuDisableVidmemAccessBitBuf_b3696a(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { return; } @@ -2135,10 +2348,6 @@ static inline void kgmmuDisableVidmemAccessBitBuf_e426af(OBJGPU *pGpu, struct Ke return; } -static inline void kgmmuDisableVidmemAccessBitBuf_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { - pKernelGmmu->__kgmmuDisableVidmemAccessBitBuf__(pGpu, pKernelGmmu); -} - static inline NV_STATUS kgmmuEnableVidmemAccessBitBuf_46f6a7(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { return NV_ERR_NOT_SUPPORTED; } @@ -2148,10 +2357,6 @@ static inline NV_STATUS kgmmuEnableVidmemAccessBitBuf_92bfc3(OBJGPU *pGpu, struc return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kgmmuEnableVidmemAccessBitBuf_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { - return pKernelGmmu->__kgmmuEnableVidmemAccessBitBuf__(pGpu, pKernelGmmu); -} - static inline void kgmmuClearAccessCounterWriteNak_b3696a(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { return; } @@ -2161,10 +2366,6 @@ static inline void kgmmuClearAccessCounterWriteNak_e426af(OBJGPU *pGpu, struct K return; } -static inline void kgmmuClearAccessCounterWriteNak_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { - pKernelGmmu->__kgmmuClearAccessCounterWriteNak__(pGpu, pKernelGmmu); -} - static inline NV_STATUS kgmmuServiceMthdBuffFaultInBar2Fault_56cd7a(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { return NV_OK; } @@ -2174,22 +2375,14 @@ static inline NV_STATUS kgmmuServiceMthdBuffFaultInBar2Fault_92bfc3(OBJGPU *pGpu return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kgmmuServiceMthdBuffFaultInBar2Fault_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { - return pKernelGmmu->__kgmmuServiceMthdBuffFaultInBar2Fault__(pGpu, pKernelGmmu); -} - -NV_STATUS kgmmuFaultCancelTargeted_VF(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_FAULT_CANCEL_INFO *arg0); +NV_STATUS kgmmuFaultCancelTargeted_VF(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_FAULT_CANCEL_INFO *arg3); -static inline NV_STATUS kgmmuFaultCancelTargeted_92bfc3(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_FAULT_CANCEL_INFO *arg0) { +static inline NV_STATUS kgmmuFaultCancelTargeted_92bfc3(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_FAULT_CANCEL_INFO *arg3) { NV_ASSERT_PRECOMP(0); return NV_ERR_NOT_SUPPORTED; } -NV_STATUS kgmmuFaultCancelTargeted_GP100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_FAULT_CANCEL_INFO *arg0); - -static inline NV_STATUS kgmmuFaultCancelTargeted_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_FAULT_CANCEL_INFO *arg0) { - return pKernelGmmu->__kgmmuFaultCancelTargeted__(pGpu, pKernelGmmu, arg0); -} +NV_STATUS kgmmuFaultCancelTargeted_GP100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_FAULT_CANCEL_INFO *arg3); static inline NV_STATUS kgmmuFaultCancelIssueInvalidate_92bfc3(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_FAULT_CANCEL_INFO *pCancelInfo, TLB_INVALIDATE_PARAMS *pParams, NvBool bGlobal) { NV_ASSERT_PRECOMP(0); @@ -2198,69 +2391,25 @@ static inline NV_STATUS kgmmuFaultCancelIssueInvalidate_92bfc3(OBJGPU *pGpu, str NV_STATUS kgmmuFaultCancelIssueInvalidate_GP100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_FAULT_CANCEL_INFO *pCancelInfo, TLB_INVALIDATE_PARAMS *pParams, NvBool bGlobal); -static inline NV_STATUS kgmmuFaultCancelIssueInvalidate_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_FAULT_CANCEL_INFO *pCancelInfo, TLB_INVALIDATE_PARAMS *pParams, NvBool bGlobal) { - return pKernelGmmu->__kgmmuFaultCancelIssueInvalidate__(pGpu, pKernelGmmu, pCancelInfo, pParams, bGlobal); -} - NV_STATUS kgmmuServiceMmuFault_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvP64 pParsedFaultInfo, FIFO_MMU_EXCEPTION_DATA *pMmuExceptionData); NV_STATUS kgmmuServiceMmuFault_GA100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvP64 pParsedFaultInfo, FIFO_MMU_EXCEPTION_DATA *pMmuExceptionData); -static inline NV_STATUS kgmmuServiceMmuFault_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvP64 pParsedFaultInfo, FIFO_MMU_EXCEPTION_DATA *pMmuExceptionData) { - return pKernelGmmu->__kgmmuServiceMmuFault__(pGpu, pKernelGmmu, pParsedFaultInfo, pMmuExceptionData); -} - -static inline NV_STATUS kgmmuServiceUnboundInstBlockFault_56cd7a(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvP64 arg0, FIFO_MMU_EXCEPTION_DATA *arg1) { +static inline NV_STATUS kgmmuServiceUnboundInstBlockFault_56cd7a(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvP64 arg3, FIFO_MMU_EXCEPTION_DATA *arg4) { return NV_OK; } -static inline NV_STATUS kgmmuServiceUnboundInstBlockFault_92bfc3(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvP64 arg0, FIFO_MMU_EXCEPTION_DATA *arg1) { +static inline NV_STATUS kgmmuServiceUnboundInstBlockFault_92bfc3(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvP64 arg3, FIFO_MMU_EXCEPTION_DATA *arg4) { NV_ASSERT_PRECOMP(0); return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kgmmuServiceUnboundInstBlockFault_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvP64 arg0, FIFO_MMU_EXCEPTION_DATA *arg1) { - return pKernelGmmu->__kgmmuServiceUnboundInstBlockFault__(pGpu, pKernelGmmu, arg0, arg1); -} - NvU32 kgmmuGetEccCounts_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); static inline NvU32 kgmmuGetEccCounts_4a4dee(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { return 0; } -static inline NvU32 kgmmuGetEccCounts_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { - return pKernelGmmu->__kgmmuGetEccCounts__(pGpu, pKernelGmmu); -} - -static inline NV_STATUS kgmmuStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelGmmu *pEngstate, NvU32 arg0) { - return pEngstate->__kgmmuStatePreLoad__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS kgmmuStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelGmmu *pEngstate, NvU32 arg0) { - return pEngstate->__kgmmuStatePostUnload__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS kgmmuStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelGmmu *pEngstate) { - return pEngstate->__kgmmuStateInitUnlocked__(pGpu, pEngstate); -} - -static inline void kgmmuInitMissing_DISPATCH(POBJGPU pGpu, struct KernelGmmu *pEngstate) { - pEngstate->__kgmmuInitMissing__(pGpu, pEngstate); -} - -static inline NV_STATUS kgmmuStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelGmmu *pEngstate) { - return pEngstate->__kgmmuStatePreInitLocked__(pGpu, pEngstate); -} - -static inline NV_STATUS kgmmuStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelGmmu *pEngstate) { - return pEngstate->__kgmmuStatePreInitUnlocked__(pGpu, pEngstate); -} - -static inline NvBool kgmmuIsPresent_DISPATCH(POBJGPU pGpu, struct KernelGmmu *pEngstate) { - return pEngstate->__kgmmuIsPresent__(pGpu, pEngstate); -} - static inline NvU32 kgmmuGetPDEAperture(struct KernelGmmu *pKernelGmmu) { struct KernelGmmu_PRIVATE *pKernelGmmu_PRIVATE = (struct KernelGmmu_PRIVATE *)pKernelGmmu; return pKernelGmmu_PRIVATE->PDEAperture; @@ -2411,14 +2560,14 @@ static inline const struct GMMU_FMT *kgmmuFmtGet(struct KernelGmmu *pKernelGmmu, #define kgmmuFmtGet(pKernelGmmu, version, bigPageSize) kgmmuFmtGet_IMPL(pKernelGmmu, version, bigPageSize) #endif //__nvoc_kern_gmmu_h_disabled -void kgmmuExtractPteInfo_IMPL(struct KernelGmmu *pKernelGmmu, union GMMU_ENTRY_VALUE *arg0, NV0080_CTRL_DMA_PTE_INFO_PTE_BLOCK *arg1, const struct GMMU_FMT *arg2, const MMU_FMT_LEVEL *arg3); +void kgmmuExtractPteInfo_IMPL(struct KernelGmmu *pKernelGmmu, union GMMU_ENTRY_VALUE *arg2, NV0080_CTRL_DMA_PTE_INFO_PTE_BLOCK *arg3, const struct GMMU_FMT *arg4, const MMU_FMT_LEVEL *arg5); #ifdef __nvoc_kern_gmmu_h_disabled -static inline void kgmmuExtractPteInfo(struct KernelGmmu *pKernelGmmu, union GMMU_ENTRY_VALUE *arg0, NV0080_CTRL_DMA_PTE_INFO_PTE_BLOCK *arg1, const struct GMMU_FMT *arg2, const MMU_FMT_LEVEL *arg3) { +static inline void kgmmuExtractPteInfo(struct KernelGmmu *pKernelGmmu, union GMMU_ENTRY_VALUE *arg2, NV0080_CTRL_DMA_PTE_INFO_PTE_BLOCK *arg3, const struct GMMU_FMT *arg4, const MMU_FMT_LEVEL *arg5) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuExtractPteInfo(pKernelGmmu, arg0, arg1, arg2, arg3) kgmmuExtractPteInfo_IMPL(pKernelGmmu, arg0, arg1, arg2, arg3) +#define kgmmuExtractPteInfo(pKernelGmmu, arg2, arg3, arg4, arg5) kgmmuExtractPteInfo_IMPL(pKernelGmmu, arg2, arg3, arg4, arg5) #endif //__nvoc_kern_gmmu_h_disabled void kgmmuFieldSetKindCompTags_IMPL(struct KernelGmmu *pKernelGmmu, const struct GMMU_FMT *pFmt, const MMU_FMT_LEVEL *pLevel, const COMPR_INFO *pCompr, NvU64 physAddr, NvU64 surfOffset, NvU32 pteIndex, NvU8 *pEntries); @@ -2464,15 +2613,15 @@ static inline NvU32 kgmmuGetFaultBufferReservedFbSpaceSize(OBJGPU *pGpu, struct #define kgmmuGetFaultBufferReservedFbSpaceSize(pGpu, pKernelGmmu) kgmmuGetFaultBufferReservedFbSpaceSize_IMPL(pGpu, pKernelGmmu) #endif //__nvoc_kern_gmmu_h_disabled -NV_STATUS kgmmuFaultBufferReplayableSetup_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvHandle arg0, NvHandle arg1, NvU32 arg2, RmPhysAddr *arg3); +NV_STATUS kgmmuFaultBufferReplayableSetup_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvHandle arg3, NvHandle arg4, NvU32 arg5, RmPhysAddr *arg6); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuFaultBufferReplayableSetup(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvHandle arg0, NvHandle arg1, NvU32 arg2, RmPhysAddr *arg3) { +static inline NV_STATUS kgmmuFaultBufferReplayableSetup(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvHandle arg3, NvHandle arg4, NvU32 arg5, RmPhysAddr *arg6) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuFaultBufferReplayableSetup(pGpu, pKernelGmmu, arg0, arg1, arg2, arg3) kgmmuFaultBufferReplayableSetup_IMPL(pGpu, pKernelGmmu, arg0, arg1, arg2, arg3) +#define kgmmuFaultBufferReplayableSetup(pGpu, pKernelGmmu, arg3, arg4, arg5, arg6) kgmmuFaultBufferReplayableSetup_IMPL(pGpu, pKernelGmmu, arg3, arg4, arg5, arg6) #endif //__nvoc_kern_gmmu_h_disabled NvU64 kgmmuGetMinBigPageSize_IMPL(struct KernelGmmu *pKernelGmmu); @@ -2497,15 +2646,15 @@ static inline NV_STATUS kgmmuInstBlkInit(struct KernelGmmu *pKernelGmmu, PMEMORY #define kgmmuInstBlkInit(pKernelGmmu, pInstBlkDesc, pVAS, subctxId, pInstBlkParams) kgmmuInstBlkInit_IMPL(pKernelGmmu, pInstBlkDesc, pVAS, subctxId, pInstBlkParams) #endif //__nvoc_kern_gmmu_h_disabled -NV_STATUS kgmmuFaultBufferReplayableAllocate_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvHandle arg0, NvHandle arg1); +NV_STATUS kgmmuFaultBufferReplayableAllocate_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvHandle arg3, NvHandle arg4); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuFaultBufferReplayableAllocate(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvHandle arg0, NvHandle arg1) { +static inline NV_STATUS kgmmuFaultBufferReplayableAllocate(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvHandle arg3, NvHandle arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuFaultBufferReplayableAllocate(pGpu, pKernelGmmu, arg0, arg1) kgmmuFaultBufferReplayableAllocate_IMPL(pGpu, pKernelGmmu, arg0, arg1) +#define kgmmuFaultBufferReplayableAllocate(pGpu, pKernelGmmu, arg3, arg4) kgmmuFaultBufferReplayableAllocate_IMPL(pGpu, pKernelGmmu, arg3, arg4) #endif //__nvoc_kern_gmmu_h_disabled NV_STATUS kgmmuFaultBufferReplayableDestroy_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); @@ -2519,144 +2668,144 @@ static inline NV_STATUS kgmmuFaultBufferReplayableDestroy(OBJGPU *pGpu, struct K #define kgmmuFaultBufferReplayableDestroy(pGpu, pKernelGmmu) kgmmuFaultBufferReplayableDestroy_IMPL(pGpu, pKernelGmmu) #endif //__nvoc_kern_gmmu_h_disabled -NV_STATUS kgmmuFaultBufferAlloc_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 arg1); +NV_STATUS kgmmuFaultBufferAlloc_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3, NvU32 arg4); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuFaultBufferAlloc(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 arg1) { +static inline NV_STATUS kgmmuFaultBufferAlloc(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuFaultBufferAlloc(pGpu, pKernelGmmu, arg0, arg1) kgmmuFaultBufferAlloc_IMPL(pGpu, pKernelGmmu, arg0, arg1) +#define kgmmuFaultBufferAlloc(pGpu, pKernelGmmu, arg3, arg4) kgmmuFaultBufferAlloc_IMPL(pGpu, pKernelGmmu, arg3, arg4) #endif //__nvoc_kern_gmmu_h_disabled -NV_STATUS kgmmuFaultBufferCreateMemDesc_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 arg1, NvU64 arg2, MEMORY_DESCRIPTOR **arg3); +NV_STATUS kgmmuFaultBufferCreateMemDesc_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3, NvU32 arg4, NvU64 arg5, MEMORY_DESCRIPTOR **arg6); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuFaultBufferCreateMemDesc(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 arg1, NvU64 arg2, MEMORY_DESCRIPTOR **arg3) { +static inline NV_STATUS kgmmuFaultBufferCreateMemDesc(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3, NvU32 arg4, NvU64 arg5, MEMORY_DESCRIPTOR **arg6) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuFaultBufferCreateMemDesc(pGpu, pKernelGmmu, arg0, arg1, arg2, arg3) kgmmuFaultBufferCreateMemDesc_IMPL(pGpu, pKernelGmmu, arg0, arg1, arg2, arg3) +#define kgmmuFaultBufferCreateMemDesc(pGpu, pKernelGmmu, arg3, arg4, arg5, arg6) kgmmuFaultBufferCreateMemDesc_IMPL(pGpu, pKernelGmmu, arg3, arg4, arg5, arg6) #endif //__nvoc_kern_gmmu_h_disabled -NV_STATUS kgmmuFaultBufferGetAddressSpace_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 *arg1, NvU32 *arg2); +NV_STATUS kgmmuFaultBufferGetAddressSpace_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3, NvU32 *arg4, NvU32 *arg5); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuFaultBufferGetAddressSpace(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0, NvU32 *arg1, NvU32 *arg2) { +static inline NV_STATUS kgmmuFaultBufferGetAddressSpace(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3, NvU32 *arg4, NvU32 *arg5) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuFaultBufferGetAddressSpace(pGpu, pKernelGmmu, arg0, arg1, arg2) kgmmuFaultBufferGetAddressSpace_IMPL(pGpu, pKernelGmmu, arg0, arg1, arg2) +#define kgmmuFaultBufferGetAddressSpace(pGpu, pKernelGmmu, arg3, arg4, arg5) kgmmuFaultBufferGetAddressSpace_IMPL(pGpu, pKernelGmmu, arg3, arg4, arg5) #endif //__nvoc_kern_gmmu_h_disabled -NV_STATUS kgmmuFaultBufferFree_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0); +NV_STATUS kgmmuFaultBufferFree_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuFaultBufferFree(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0) { +static inline NV_STATUS kgmmuFaultBufferFree(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuFaultBufferFree(pGpu, pKernelGmmu, arg0) kgmmuFaultBufferFree_IMPL(pGpu, pKernelGmmu, arg0) +#define kgmmuFaultBufferFree(pGpu, pKernelGmmu, arg3) kgmmuFaultBufferFree_IMPL(pGpu, pKernelGmmu, arg3) #endif //__nvoc_kern_gmmu_h_disabled -NV_STATUS kgmmuFaultBufferUnregister_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0); +NV_STATUS kgmmuFaultBufferUnregister_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuFaultBufferUnregister(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg0) { +static inline NV_STATUS kgmmuFaultBufferUnregister(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuFaultBufferUnregister(pGpu, pKernelGmmu, arg0) kgmmuFaultBufferUnregister_IMPL(pGpu, pKernelGmmu, arg0) +#define kgmmuFaultBufferUnregister(pGpu, pKernelGmmu, arg3) kgmmuFaultBufferUnregister_IMPL(pGpu, pKernelGmmu, arg3) #endif //__nvoc_kern_gmmu_h_disabled -NV_STATUS kgmmuClientShadowFaultBufferAllocate_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg0); +NV_STATUS kgmmuClientShadowFaultBufferAllocate_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg3); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuClientShadowFaultBufferAllocate(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg0) { +static inline NV_STATUS kgmmuClientShadowFaultBufferAllocate(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuClientShadowFaultBufferAllocate(pGpu, pKernelGmmu, arg0) kgmmuClientShadowFaultBufferAllocate_IMPL(pGpu, pKernelGmmu, arg0) +#define kgmmuClientShadowFaultBufferAllocate(pGpu, pKernelGmmu, arg3) kgmmuClientShadowFaultBufferAllocate_IMPL(pGpu, pKernelGmmu, arg3) #endif //__nvoc_kern_gmmu_h_disabled -NV_STATUS kgmmuClientShadowFaultBufferDestroy_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg0); +NV_STATUS kgmmuClientShadowFaultBufferDestroy_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg3); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuClientShadowFaultBufferDestroy(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg0) { +static inline NV_STATUS kgmmuClientShadowFaultBufferDestroy(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuClientShadowFaultBufferDestroy(pGpu, pKernelGmmu, arg0) kgmmuClientShadowFaultBufferDestroy_IMPL(pGpu, pKernelGmmu, arg0) +#define kgmmuClientShadowFaultBufferDestroy(pGpu, pKernelGmmu, arg3) kgmmuClientShadowFaultBufferDestroy_IMPL(pGpu, pKernelGmmu, arg3) #endif //__nvoc_kern_gmmu_h_disabled -NV_STATUS kgmmuClientShadowFaultBufferRegister_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg0); +NV_STATUS kgmmuClientShadowFaultBufferRegister_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg3); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuClientShadowFaultBufferRegister(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg0) { +static inline NV_STATUS kgmmuClientShadowFaultBufferRegister(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuClientShadowFaultBufferRegister(pGpu, pKernelGmmu, arg0) kgmmuClientShadowFaultBufferRegister_IMPL(pGpu, pKernelGmmu, arg0) +#define kgmmuClientShadowFaultBufferRegister(pGpu, pKernelGmmu, arg3) kgmmuClientShadowFaultBufferRegister_IMPL(pGpu, pKernelGmmu, arg3) #endif //__nvoc_kern_gmmu_h_disabled -void kgmmuClientShadowFaultBufferUnregister_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg0); +void kgmmuClientShadowFaultBufferUnregister_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg3); #ifdef __nvoc_kern_gmmu_h_disabled -static inline void kgmmuClientShadowFaultBufferUnregister(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg0) { +static inline void kgmmuClientShadowFaultBufferUnregister(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuClientShadowFaultBufferUnregister(pGpu, pKernelGmmu, arg0) kgmmuClientShadowFaultBufferUnregister_IMPL(pGpu, pKernelGmmu, arg0) +#define kgmmuClientShadowFaultBufferUnregister(pGpu, pKernelGmmu, arg3) kgmmuClientShadowFaultBufferUnregister_IMPL(pGpu, pKernelGmmu, arg3) #endif //__nvoc_kern_gmmu_h_disabled -void kgmmuClientShadowFaultBufferPagesDestroy_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool arg0, FAULT_BUFFER_TYPE arg1); +void kgmmuClientShadowFaultBufferPagesDestroy_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool arg3, FAULT_BUFFER_TYPE arg4); #ifdef __nvoc_kern_gmmu_h_disabled -static inline void kgmmuClientShadowFaultBufferPagesDestroy(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool arg0, FAULT_BUFFER_TYPE arg1) { +static inline void kgmmuClientShadowFaultBufferPagesDestroy(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool arg3, FAULT_BUFFER_TYPE arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuClientShadowFaultBufferPagesDestroy(pGpu, pKernelGmmu, arg0, arg1) kgmmuClientShadowFaultBufferPagesDestroy_IMPL(pGpu, pKernelGmmu, arg0, arg1) +#define kgmmuClientShadowFaultBufferPagesDestroy(pGpu, pKernelGmmu, arg3, arg4) kgmmuClientShadowFaultBufferPagesDestroy_IMPL(pGpu, pKernelGmmu, arg3, arg4) #endif //__nvoc_kern_gmmu_h_disabled -void kgmmuClientShadowFaultBufferQueueDestroy_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool arg0, FAULT_BUFFER_TYPE arg1); +void kgmmuClientShadowFaultBufferQueueDestroy_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool arg3, FAULT_BUFFER_TYPE arg4); #ifdef __nvoc_kern_gmmu_h_disabled -static inline void kgmmuClientShadowFaultBufferQueueDestroy(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool arg0, FAULT_BUFFER_TYPE arg1) { +static inline void kgmmuClientShadowFaultBufferQueueDestroy(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool arg3, FAULT_BUFFER_TYPE arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuClientShadowFaultBufferQueueDestroy(pGpu, pKernelGmmu, arg0, arg1) kgmmuClientShadowFaultBufferQueueDestroy_IMPL(pGpu, pKernelGmmu, arg0, arg1) +#define kgmmuClientShadowFaultBufferQueueDestroy(pGpu, pKernelGmmu, arg3, arg4) kgmmuClientShadowFaultBufferQueueDestroy_IMPL(pGpu, pKernelGmmu, arg3, arg4) #endif //__nvoc_kern_gmmu_h_disabled -NvU64 kgmmuGetSizeOfPageTables_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, const struct GMMU_FMT *arg0, NvU64 arg1, NvU64 arg2, NvU64 arg3); +NvU64 kgmmuGetSizeOfPageTables_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, const struct GMMU_FMT *arg3, NvU64 arg4, NvU64 arg5, NvU64 arg6); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NvU64 kgmmuGetSizeOfPageTables(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, const struct GMMU_FMT *arg0, NvU64 arg1, NvU64 arg2, NvU64 arg3) { +static inline NvU64 kgmmuGetSizeOfPageTables(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, const struct GMMU_FMT *arg3, NvU64 arg4, NvU64 arg5, NvU64 arg6) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return 0; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuGetSizeOfPageTables(pGpu, pKernelGmmu, arg0, arg1, arg2, arg3) kgmmuGetSizeOfPageTables_IMPL(pGpu, pKernelGmmu, arg0, arg1, arg2, arg3) +#define kgmmuGetSizeOfPageTables(pGpu, pKernelGmmu, arg3, arg4, arg5, arg6) kgmmuGetSizeOfPageTables_IMPL(pGpu, pKernelGmmu, arg3, arg4, arg5, arg6) #endif //__nvoc_kern_gmmu_h_disabled -NvU64 kgmmuGetSizeOfPageDirs_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, const struct GMMU_FMT *arg0, NvU64 arg1, NvU64 arg2, NvU64 arg3); +NvU64 kgmmuGetSizeOfPageDirs_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, const struct GMMU_FMT *arg3, NvU64 arg4, NvU64 arg5, NvU64 arg6); #ifdef __nvoc_kern_gmmu_h_disabled -static inline NvU64 kgmmuGetSizeOfPageDirs(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, const struct GMMU_FMT *arg0, NvU64 arg1, NvU64 arg2, NvU64 arg3) { +static inline NvU64 kgmmuGetSizeOfPageDirs(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, const struct GMMU_FMT *arg3, NvU64 arg4, NvU64 arg5, NvU64 arg6) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); return 0; } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuGetSizeOfPageDirs(pGpu, pKernelGmmu, arg0, arg1, arg2, arg3) kgmmuGetSizeOfPageDirs_IMPL(pGpu, pKernelGmmu, arg0, arg1, arg2, arg3) +#define kgmmuGetSizeOfPageDirs(pGpu, pKernelGmmu, arg3, arg4, arg5, arg6) kgmmuGetSizeOfPageDirs_IMPL(pGpu, pKernelGmmu, arg3, arg4, arg5, arg6) #endif //__nvoc_kern_gmmu_h_disabled GMMU_APERTURE kgmmuGetExternalAllocAperture_IMPL(NvU32 addressSpace); @@ -2683,14 +2832,14 @@ static inline NvU64 kgmmuEncodePhysAddr(struct KernelGmmu *pKernelGmmu, const GM #define kgmmuEncodePhysAddr(pKernelGmmu, aperture, physAddr, fabricBaseAddress) kgmmuEncodePhysAddr_IMPL(pKernelGmmu, aperture, physAddr, fabricBaseAddress) #endif //__nvoc_kern_gmmu_h_disabled -void kgmmuAccessCntrChangeIntrOwnership_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool arg0); +void kgmmuAccessCntrChangeIntrOwnership_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool arg3); #ifdef __nvoc_kern_gmmu_h_disabled -static inline void kgmmuAccessCntrChangeIntrOwnership(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool arg0) { +static inline void kgmmuAccessCntrChangeIntrOwnership(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvBool arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); } #else //__nvoc_kern_gmmu_h_disabled -#define kgmmuAccessCntrChangeIntrOwnership(pGpu, pKernelGmmu, arg0) kgmmuAccessCntrChangeIntrOwnership_IMPL(pGpu, pKernelGmmu, arg0) +#define kgmmuAccessCntrChangeIntrOwnership(pGpu, pKernelGmmu, arg3) kgmmuAccessCntrChangeIntrOwnership_IMPL(pGpu, pKernelGmmu, arg3) #endif //__nvoc_kern_gmmu_h_disabled void *kgmmuGetShadowFaultBufferCslContext_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, FAULT_BUFFER_TYPE type); diff --git a/src/nvidia/generated/g_kern_hwpm_common_defs_nvoc.h b/src/nvidia/generated/g_kern_hwpm_common_defs_nvoc.h index c21e1d7e40..e2401b3d95 100644 --- a/src/nvidia/generated/g_kern_hwpm_common_defs_nvoc.h +++ b/src/nvidia/generated/g_kern_hwpm_common_defs_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERN_HWPM_COMMON_DEFS_NVOC_H_ #define _G_KERN_HWPM_COMMON_DEFS_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif diff --git a/src/nvidia/generated/g_kern_hwpm_nvoc.c b/src/nvidia/generated/g_kern_hwpm_nvoc.c index 652d57090e..1d565f97be 100644 --- a/src/nvidia/generated/g_kern_hwpm_nvoc.c +++ b/src/nvidia/generated/g_kern_hwpm_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelHwpm = /*pExportInfo=*/ &__nvoc_export_info_KernelHwpm }; -static NV_STATUS __nvoc_thunk_KernelHwpm_engstateStateInitUnlocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelHwpm) { - return khwpmStateInitUnlocked(pGpu, (struct KernelHwpm *)(((unsigned char *)pKernelHwpm) - __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); +// 2 down-thunk(s) defined to bridge methods in KernelHwpm from superclasses + +// khwpmStateInitUnlocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelHwpm_engstateStateInitUnlocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelHwpm) { + return khwpmStateInitUnlocked(pGpu, (struct KernelHwpm *)(((unsigned char *) pKernelHwpm) - __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); } -static void __nvoc_thunk_KernelHwpm_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelHwpm) { - khwpmStateDestroy(pGpu, (struct KernelHwpm *)(((unsigned char *)pKernelHwpm) - __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); +// khwpmStateDestroy: virtual override (engstate) base (engstate) +static void __nvoc_down_thunk_KernelHwpm_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelHwpm) { + khwpmStateDestroy(pGpu, (struct KernelHwpm *)(((unsigned char *) pKernelHwpm) - __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_khwpmStateLoad(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg0) { - return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg0); + +// 12 up-thunk(s) defined to bridge methods in KernelHwpm to superclasses + +// khwpmConstructEngine: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmConstructEngine(POBJGPU pGpu, struct KernelHwpm *pEngstate, ENGDESCRIPTOR arg3) { + return engstateConstructEngine(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_khwpmStateUnload(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg0) { - return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg0); +// khwpmInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_khwpmInitMissing(POBJGPU pGpu, struct KernelHwpm *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_khwpmStateInitLocked(POBJGPU pGpu, struct KernelHwpm *pEngstate) { - return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); +// khwpmStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePreInitLocked(POBJGPU pGpu, struct KernelHwpm *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_khwpmStatePreLoad(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg0); +// khwpmStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePreInitUnlocked(POBJGPU pGpu, struct KernelHwpm *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_khwpmStatePostUnload(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg0); +// khwpmStateInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStateInitLocked(POBJGPU pGpu, struct KernelHwpm *pEngstate) { + return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_khwpmStatePreUnload(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg0); +// khwpmStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePreLoad(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_khwpmInitMissing(POBJGPU pGpu, struct KernelHwpm *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); +// khwpmStateLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStateLoad(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { + return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_khwpmStatePreInitLocked(POBJGPU pGpu, struct KernelHwpm *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); +// khwpmStatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePostLoad(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_khwpmStatePreInitUnlocked(POBJGPU pGpu, struct KernelHwpm *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); +// khwpmStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePreUnload(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_khwpmStatePostLoad(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg0); +// khwpmStateUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStateUnload(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { + return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_khwpmConstructEngine(POBJGPU pGpu, struct KernelHwpm *pEngstate, ENGDESCRIPTOR arg0) { - return engstateConstructEngine(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg0); +// khwpmStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePostUnload(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg3); } -static NvBool __nvoc_thunk_OBJENGSTATE_khwpmIsPresent(POBJGPU pGpu, struct KernelHwpm *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); +// khwpmIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_khwpmIsPresent(POBJGPU pGpu, struct KernelHwpm *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelHwpm = { /*numEntries=*/ 0, @@ -167,6 +187,7 @@ NV_STATUS __nvoc_ctor_KernelHwpm(KernelHwpm *pThis, RmHalspecOwner *pRmhalspecow return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelHwpm_1(KernelHwpm *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -179,11 +200,15 @@ static void __nvoc_init_funcTable_KernelHwpm_1(KernelHwpm *pThis, RmHalspecOwner PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); + // khwpmStateInitUnlocked -- virtual override (engstate) base (engstate) pThis->__khwpmStateInitUnlocked__ = &khwpmStateInitUnlocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ = &__nvoc_down_thunk_KernelHwpm_engstateStateInitUnlocked; + // khwpmStateDestroy -- virtual override (engstate) base (engstate) pThis->__khwpmStateDestroy__ = &khwpmStateDestroy_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelHwpm_engstateStateDestroy; - // Hal function -- khwpmGetCblockInfo + // khwpmGetCblockInfo -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__khwpmGetCblockInfo__ = &khwpmGetCblockInfo_GH100; @@ -193,36 +218,48 @@ static void __nvoc_init_funcTable_KernelHwpm_1(KernelHwpm *pThis, RmHalspecOwner pThis->__khwpmGetCblockInfo__ = &khwpmGetCblockInfo_GM107; } - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ = &__nvoc_thunk_KernelHwpm_engstateStateInitUnlocked; + // khwpmConstructEngine -- virtual inherited (engstate) base (engstate) + pThis->__khwpmConstructEngine__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmConstructEngine; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_thunk_KernelHwpm_engstateStateDestroy; + // khwpmInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__khwpmInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmInitMissing; - pThis->__khwpmStateLoad__ = &__nvoc_thunk_OBJENGSTATE_khwpmStateLoad; + // khwpmStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__khwpmStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStatePreInitLocked; - pThis->__khwpmStateUnload__ = &__nvoc_thunk_OBJENGSTATE_khwpmStateUnload; + // khwpmStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__khwpmStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStatePreInitUnlocked; - pThis->__khwpmStateInitLocked__ = &__nvoc_thunk_OBJENGSTATE_khwpmStateInitLocked; + // khwpmStateInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__khwpmStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStateInitLocked; - pThis->__khwpmStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_khwpmStatePreLoad; + // khwpmStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__khwpmStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStatePreLoad; - pThis->__khwpmStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_khwpmStatePostUnload; + // khwpmStateLoad -- virtual inherited (engstate) base (engstate) + pThis->__khwpmStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStateLoad; - pThis->__khwpmStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_khwpmStatePreUnload; + // khwpmStatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__khwpmStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStatePostLoad; - pThis->__khwpmInitMissing__ = &__nvoc_thunk_OBJENGSTATE_khwpmInitMissing; + // khwpmStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__khwpmStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStatePreUnload; - pThis->__khwpmStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_khwpmStatePreInitLocked; + // khwpmStateUnload -- virtual inherited (engstate) base (engstate) + pThis->__khwpmStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStateUnload; - pThis->__khwpmStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_khwpmStatePreInitUnlocked; + // khwpmStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__khwpmStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStatePostUnload; - pThis->__khwpmStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_khwpmStatePostLoad; + // khwpmIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__khwpmIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmIsPresent; +} // End __nvoc_init_funcTable_KernelHwpm_1 with approximately 18 basic block(s). - pThis->__khwpmConstructEngine__ = &__nvoc_thunk_OBJENGSTATE_khwpmConstructEngine; - - pThis->__khwpmIsPresent__ = &__nvoc_thunk_OBJENGSTATE_khwpmIsPresent; -} +// Initialize vtable(s) for 15 virtual method(s). void __nvoc_init_funcTable_KernelHwpm(KernelHwpm *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 15 per-object function pointer(s). __nvoc_init_funcTable_KernelHwpm_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kern_hwpm_nvoc.h b/src/nvidia/generated/g_kern_hwpm_nvoc.h index ec336c54e5..3424c483a5 100644 --- a/src/nvidia/generated/g_kern_hwpm_nvoc.h +++ b/src/nvidia/generated/g_kern_hwpm_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERN_HWPM_NVOC_H_ #define _G_KERN_HWPM_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kern_hwpm_nvoc.h" #ifndef KERNEL_HWPM_H @@ -62,28 +70,41 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelHwpm { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct KernelHwpm *__nvoc_pbase_KernelHwpm; - NV_STATUS (*__khwpmStateInitUnlocked__)(OBJGPU *, struct KernelHwpm *); - void (*__khwpmStateDestroy__)(OBJGPU *, struct KernelHwpm *); - void (*__khwpmGetCblockInfo__)(OBJGPU *, struct KernelHwpm *, NvU32 *, NvU32 *); - NV_STATUS (*__khwpmStateLoad__)(POBJGPU, struct KernelHwpm *, NvU32); - NV_STATUS (*__khwpmStateUnload__)(POBJGPU, struct KernelHwpm *, NvU32); - NV_STATUS (*__khwpmStateInitLocked__)(POBJGPU, struct KernelHwpm *); - NV_STATUS (*__khwpmStatePreLoad__)(POBJGPU, struct KernelHwpm *, NvU32); - NV_STATUS (*__khwpmStatePostUnload__)(POBJGPU, struct KernelHwpm *, NvU32); - NV_STATUS (*__khwpmStatePreUnload__)(POBJGPU, struct KernelHwpm *, NvU32); - void (*__khwpmInitMissing__)(POBJGPU, struct KernelHwpm *); - NV_STATUS (*__khwpmStatePreInitLocked__)(POBJGPU, struct KernelHwpm *); - NV_STATUS (*__khwpmStatePreInitUnlocked__)(POBJGPU, struct KernelHwpm *); - NV_STATUS (*__khwpmStatePostLoad__)(POBJGPU, struct KernelHwpm *, NvU32); - NV_STATUS (*__khwpmConstructEngine__)(POBJGPU, struct KernelHwpm *, ENGDESCRIPTOR); - NvBool (*__khwpmIsPresent__)(POBJGPU, struct KernelHwpm *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct KernelHwpm *__nvoc_pbase_KernelHwpm; // khwpm + + // Vtable with 15 per-object function pointers + NV_STATUS (*__khwpmStateInitUnlocked__)(OBJGPU *, struct KernelHwpm * /*this*/); // virtual override (engstate) base (engstate) + void (*__khwpmStateDestroy__)(OBJGPU *, struct KernelHwpm * /*this*/); // virtual override (engstate) base (engstate) + void (*__khwpmGetCblockInfo__)(OBJGPU *, struct KernelHwpm * /*this*/, NvU32 *, NvU32 *); // halified (2 hals) body + NV_STATUS (*__khwpmConstructEngine__)(POBJGPU, struct KernelHwpm * /*this*/, ENGDESCRIPTOR); // virtual inherited (engstate) base (engstate) + void (*__khwpmInitMissing__)(POBJGPU, struct KernelHwpm * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__khwpmStatePreInitLocked__)(POBJGPU, struct KernelHwpm * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__khwpmStatePreInitUnlocked__)(POBJGPU, struct KernelHwpm * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__khwpmStateInitLocked__)(POBJGPU, struct KernelHwpm * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__khwpmStatePreLoad__)(POBJGPU, struct KernelHwpm * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__khwpmStateLoad__)(POBJGPU, struct KernelHwpm * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__khwpmStatePostLoad__)(POBJGPU, struct KernelHwpm * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__khwpmStatePreUnload__)(POBJGPU, struct KernelHwpm * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__khwpmStateUnload__)(POBJGPU, struct KernelHwpm * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__khwpmStatePostUnload__)(POBJGPU, struct KernelHwpm * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__khwpmIsPresent__)(POBJGPU, struct KernelHwpm * /*this*/); // virtual inherited (engstate) base (engstate) + + // 1 PDB property NvBool PDB_PROP_KHWPM_MULTIPLE_PMA_SUPPORTED; + + // Data members NvU32 numPma; NvU32 maxCblocks; NvU32 maxCblocksPerPma; @@ -103,6 +124,7 @@ typedef struct KernelHwpm KernelHwpm; #define __nvoc_class_id_KernelHwpm 0xc8c00f #endif /* __nvoc_class_id_KernelHwpm */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelHwpm; #define __staticCast_KernelHwpm(pThis) \ @@ -115,6 +137,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelHwpm; ((KernelHwpm*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelHwpm))) #endif //__nvoc_kern_hwpm_h_disabled +// Property macros #define PDB_PROP_KHWPM_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_KHWPM_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING #define PDB_PROP_KHWPM_MULTIPLE_PMA_SUPPORTED_BASE_CAST @@ -126,157 +149,176 @@ NV_STATUS __nvoc_objCreate_KernelHwpm(KernelHwpm**, Dynamic*, NvU32); #define __objCreate_KernelHwpm(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelHwpm((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define khwpmStateInitUnlocked_FNPTR(pKernelHwpm) pKernelHwpm->__khwpmStateInitUnlocked__ #define khwpmStateInitUnlocked(pGpu, pKernelHwpm) khwpmStateInitUnlocked_DISPATCH(pGpu, pKernelHwpm) +#define khwpmStateDestroy_FNPTR(pKernelHwpm) pKernelHwpm->__khwpmStateDestroy__ #define khwpmStateDestroy(pGpu, pKernelHwpm) khwpmStateDestroy_DISPATCH(pGpu, pKernelHwpm) -#define khwpmGetCblockInfo(pGpu, pKernelHwpm, arg0, arg1) khwpmGetCblockInfo_DISPATCH(pGpu, pKernelHwpm, arg0, arg1) -#define khwpmGetCblockInfo_HAL(pGpu, pKernelHwpm, arg0, arg1) khwpmGetCblockInfo_DISPATCH(pGpu, pKernelHwpm, arg0, arg1) -#define khwpmStateLoad(pGpu, pEngstate, arg0) khwpmStateLoad_DISPATCH(pGpu, pEngstate, arg0) -#define khwpmStateUnload(pGpu, pEngstate, arg0) khwpmStateUnload_DISPATCH(pGpu, pEngstate, arg0) -#define khwpmStateInitLocked(pGpu, pEngstate) khwpmStateInitLocked_DISPATCH(pGpu, pEngstate) -#define khwpmStatePreLoad(pGpu, pEngstate, arg0) khwpmStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define khwpmStatePostUnload(pGpu, pEngstate, arg0) khwpmStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define khwpmStatePreUnload(pGpu, pEngstate, arg0) khwpmStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) +#define khwpmGetCblockInfo_FNPTR(pKernelHwpm) pKernelHwpm->__khwpmGetCblockInfo__ +#define khwpmGetCblockInfo(pGpu, pKernelHwpm, arg3, arg4) khwpmGetCblockInfo_DISPATCH(pGpu, pKernelHwpm, arg3, arg4) +#define khwpmGetCblockInfo_HAL(pGpu, pKernelHwpm, arg3, arg4) khwpmGetCblockInfo_DISPATCH(pGpu, pKernelHwpm, arg3, arg4) +#define khwpmConstructEngine_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ +#define khwpmConstructEngine(pGpu, pEngstate, arg3) khwpmConstructEngine_DISPATCH(pGpu, pEngstate, arg3) +#define khwpmInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define khwpmInitMissing(pGpu, pEngstate) khwpmInitMissing_DISPATCH(pGpu, pEngstate) +#define khwpmStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define khwpmStatePreInitLocked(pGpu, pEngstate) khwpmStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define khwpmStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define khwpmStatePreInitUnlocked(pGpu, pEngstate) khwpmStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define khwpmStatePostLoad(pGpu, pEngstate, arg0) khwpmStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) -#define khwpmConstructEngine(pGpu, pEngstate, arg0) khwpmConstructEngine_DISPATCH(pGpu, pEngstate, arg0) +#define khwpmStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define khwpmStateInitLocked(pGpu, pEngstate) khwpmStateInitLocked_DISPATCH(pGpu, pEngstate) +#define khwpmStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define khwpmStatePreLoad(pGpu, pEngstate, arg3) khwpmStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define khwpmStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define khwpmStateLoad(pGpu, pEngstate, arg3) khwpmStateLoad_DISPATCH(pGpu, pEngstate, arg3) +#define khwpmStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define khwpmStatePostLoad(pGpu, pEngstate, arg3) khwpmStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define khwpmStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define khwpmStatePreUnload(pGpu, pEngstate, arg3) khwpmStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define khwpmStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define khwpmStateUnload(pGpu, pEngstate, arg3) khwpmStateUnload_DISPATCH(pGpu, pEngstate, arg3) +#define khwpmStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define khwpmStatePostUnload(pGpu, pEngstate, arg3) khwpmStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define khwpmIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define khwpmIsPresent(pGpu, pEngstate) khwpmIsPresent_DISPATCH(pGpu, pEngstate) -static inline NV_STATUS khwpmPmaStreamSriovSetGfid_56cd7a(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 arg0, NvU32 arg1) { - return NV_OK; -} - -NV_STATUS khwpmPmaStreamSriovSetGfid_GA100(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 arg0, NvU32 arg1); - -NV_STATUS khwpmPmaStreamSriovSetGfid_GH100(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 arg0, NvU32 arg1); - -static inline NV_STATUS khwpmPmaStreamSriovSetGfid_92bfc3(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 arg0, NvU32 arg1) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - - -#ifdef __nvoc_kern_hwpm_h_disabled -static inline NV_STATUS khwpmPmaStreamSriovSetGfid(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 arg0, NvU32 arg1) { - NV_ASSERT_FAILED_PRECOMP("KernelHwpm was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_kern_hwpm_h_disabled -#define khwpmPmaStreamSriovSetGfid(pGpu, pKernelHwpm, arg0, arg1) khwpmPmaStreamSriovSetGfid_56cd7a(pGpu, pKernelHwpm, arg0, arg1) -#endif //__nvoc_kern_hwpm_h_disabled - -#define khwpmPmaStreamSriovSetGfid_HAL(pGpu, pKernelHwpm, arg0, arg1) khwpmPmaStreamSriovSetGfid(pGpu, pKernelHwpm, arg0, arg1) - -NV_STATUS khwpmStateInitUnlocked_IMPL(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm); +// Dispatch functions static inline NV_STATUS khwpmStateInitUnlocked_DISPATCH(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm) { return pKernelHwpm->__khwpmStateInitUnlocked__(pGpu, pKernelHwpm); } -void khwpmStateDestroy_IMPL(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm); - static inline void khwpmStateDestroy_DISPATCH(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm) { pKernelHwpm->__khwpmStateDestroy__(pGpu, pKernelHwpm); } -void khwpmGetCblockInfo_GM107(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 *arg0, NvU32 *arg1); +static inline void khwpmGetCblockInfo_DISPATCH(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 *arg3, NvU32 *arg4) { + pKernelHwpm->__khwpmGetCblockInfo__(pGpu, pKernelHwpm, arg3, arg4); +} -void khwpmGetCblockInfo_GH100(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 *arg0, NvU32 *arg1); +static inline NV_STATUS khwpmConstructEngine_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate, ENGDESCRIPTOR arg3) { + return pEngstate->__khwpmConstructEngine__(pGpu, pEngstate, arg3); +} -static inline void khwpmGetCblockInfo_DISPATCH(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 *arg0, NvU32 *arg1) { - pKernelHwpm->__khwpmGetCblockInfo__(pGpu, pKernelHwpm, arg0, arg1); +static inline void khwpmInitMissing_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate) { + pEngstate->__khwpmInitMissing__(pGpu, pEngstate); } -static inline NV_STATUS khwpmStateLoad_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg0) { - return pEngstate->__khwpmStateLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS khwpmStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate) { + return pEngstate->__khwpmStatePreInitLocked__(pGpu, pEngstate); } -static inline NV_STATUS khwpmStateUnload_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg0) { - return pEngstate->__khwpmStateUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS khwpmStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate) { + return pEngstate->__khwpmStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS khwpmStateInitLocked_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate) { return pEngstate->__khwpmStateInitLocked__(pGpu, pEngstate); } -static inline NV_STATUS khwpmStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg0) { - return pEngstate->__khwpmStatePreLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS khwpmStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { + return pEngstate->__khwpmStatePreLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS khwpmStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg0) { - return pEngstate->__khwpmStatePostUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS khwpmStateLoad_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { + return pEngstate->__khwpmStateLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS khwpmStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg0) { - return pEngstate->__khwpmStatePreUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS khwpmStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { + return pEngstate->__khwpmStatePostLoad__(pGpu, pEngstate, arg3); } -static inline void khwpmInitMissing_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate) { - pEngstate->__khwpmInitMissing__(pGpu, pEngstate); +static inline NV_STATUS khwpmStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { + return pEngstate->__khwpmStatePreUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS khwpmStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate) { - return pEngstate->__khwpmStatePreInitLocked__(pGpu, pEngstate); +static inline NV_STATUS khwpmStateUnload_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { + return pEngstate->__khwpmStateUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS khwpmStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate) { - return pEngstate->__khwpmStatePreInitUnlocked__(pGpu, pEngstate); +static inline NV_STATUS khwpmStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { + return pEngstate->__khwpmStatePostUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS khwpmStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate, NvU32 arg0) { - return pEngstate->__khwpmStatePostLoad__(pGpu, pEngstate, arg0); +static inline NvBool khwpmIsPresent_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate) { + return pEngstate->__khwpmIsPresent__(pGpu, pEngstate); } -static inline NV_STATUS khwpmConstructEngine_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate, ENGDESCRIPTOR arg0) { - return pEngstate->__khwpmConstructEngine__(pGpu, pEngstate, arg0); +static inline NV_STATUS khwpmPmaStreamSriovSetGfid_56cd7a(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 arg3, NvU32 arg4) { + return NV_OK; } -static inline NvBool khwpmIsPresent_DISPATCH(POBJGPU pGpu, struct KernelHwpm *pEngstate) { - return pEngstate->__khwpmIsPresent__(pGpu, pEngstate); +NV_STATUS khwpmPmaStreamSriovSetGfid_GA100(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 arg3, NvU32 arg4); + +NV_STATUS khwpmPmaStreamSriovSetGfid_GH100(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 arg3, NvU32 arg4); + +static inline NV_STATUS khwpmPmaStreamSriovSetGfid_92bfc3(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 arg3, NvU32 arg4) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; } -NV_STATUS khwpmStreamoutAllocPmaStream_IMPL(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU64 arg0, MEMORY_DESCRIPTOR *arg1, MEMORY_DESCRIPTOR *arg2, NvU32 arg3, HWPM_PMA_STREAM *arg4); #ifdef __nvoc_kern_hwpm_h_disabled -static inline NV_STATUS khwpmStreamoutAllocPmaStream(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU64 arg0, MEMORY_DESCRIPTOR *arg1, MEMORY_DESCRIPTOR *arg2, NvU32 arg3, HWPM_PMA_STREAM *arg4) { +static inline NV_STATUS khwpmPmaStreamSriovSetGfid(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 arg3, NvU32 arg4) { + NV_ASSERT_FAILED_PRECOMP("KernelHwpm was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kern_hwpm_h_disabled +#define khwpmPmaStreamSriovSetGfid(pGpu, pKernelHwpm, arg3, arg4) khwpmPmaStreamSriovSetGfid_56cd7a(pGpu, pKernelHwpm, arg3, arg4) +#endif //__nvoc_kern_hwpm_h_disabled + +#define khwpmPmaStreamSriovSetGfid_HAL(pGpu, pKernelHwpm, arg3, arg4) khwpmPmaStreamSriovSetGfid(pGpu, pKernelHwpm, arg3, arg4) + +NV_STATUS khwpmStateInitUnlocked_IMPL(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm); + +void khwpmStateDestroy_IMPL(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm); + +void khwpmGetCblockInfo_GM107(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 *arg3, NvU32 *arg4); + +void khwpmGetCblockInfo_GH100(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 *arg3, NvU32 *arg4); + +NV_STATUS khwpmStreamoutAllocPmaStream_IMPL(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU64 arg3, MEMORY_DESCRIPTOR *arg4, MEMORY_DESCRIPTOR *arg5, NvU32 arg6, HWPM_PMA_STREAM *arg7); + +#ifdef __nvoc_kern_hwpm_h_disabled +static inline NV_STATUS khwpmStreamoutAllocPmaStream(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU64 arg3, MEMORY_DESCRIPTOR *arg4, MEMORY_DESCRIPTOR *arg5, NvU32 arg6, HWPM_PMA_STREAM *arg7) { NV_ASSERT_FAILED_PRECOMP("KernelHwpm was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_hwpm_h_disabled -#define khwpmStreamoutAllocPmaStream(pGpu, pKernelHwpm, arg0, arg1, arg2, arg3, arg4) khwpmStreamoutAllocPmaStream_IMPL(pGpu, pKernelHwpm, arg0, arg1, arg2, arg3, arg4) +#define khwpmStreamoutAllocPmaStream(pGpu, pKernelHwpm, arg3, arg4, arg5, arg6, arg7) khwpmStreamoutAllocPmaStream_IMPL(pGpu, pKernelHwpm, arg3, arg4, arg5, arg6, arg7) #endif //__nvoc_kern_hwpm_h_disabled -NV_STATUS khwpmStreamoutFreePmaStream_IMPL(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU64 arg0, HWPM_PMA_STREAM *arg1, NvU32 arg2); +NV_STATUS khwpmStreamoutFreePmaStream_IMPL(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU64 arg3, HWPM_PMA_STREAM *arg4, NvU32 arg5); #ifdef __nvoc_kern_hwpm_h_disabled -static inline NV_STATUS khwpmStreamoutFreePmaStream(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU64 arg0, HWPM_PMA_STREAM *arg1, NvU32 arg2) { +static inline NV_STATUS khwpmStreamoutFreePmaStream(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU64 arg3, HWPM_PMA_STREAM *arg4, NvU32 arg5) { NV_ASSERT_FAILED_PRECOMP("KernelHwpm was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_hwpm_h_disabled -#define khwpmStreamoutFreePmaStream(pGpu, pKernelHwpm, arg0, arg1, arg2) khwpmStreamoutFreePmaStream_IMPL(pGpu, pKernelHwpm, arg0, arg1, arg2) +#define khwpmStreamoutFreePmaStream(pGpu, pKernelHwpm, arg3, arg4, arg5) khwpmStreamoutFreePmaStream_IMPL(pGpu, pKernelHwpm, arg3, arg4, arg5) #endif //__nvoc_kern_hwpm_h_disabled -NV_STATUS khwpmStreamoutCreatePmaVaSpace_IMPL(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 arg0); +NV_STATUS khwpmStreamoutCreatePmaVaSpace_IMPL(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 arg3); #ifdef __nvoc_kern_hwpm_h_disabled -static inline NV_STATUS khwpmStreamoutCreatePmaVaSpace(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 arg0) { +static inline NV_STATUS khwpmStreamoutCreatePmaVaSpace(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("KernelHwpm was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_hwpm_h_disabled -#define khwpmStreamoutCreatePmaVaSpace(pGpu, pKernelHwpm, arg0) khwpmStreamoutCreatePmaVaSpace_IMPL(pGpu, pKernelHwpm, arg0) +#define khwpmStreamoutCreatePmaVaSpace(pGpu, pKernelHwpm, arg3) khwpmStreamoutCreatePmaVaSpace_IMPL(pGpu, pKernelHwpm, arg3) #endif //__nvoc_kern_hwpm_h_disabled -NV_STATUS khwpmStreamoutFreePmaVaSpace_IMPL(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 arg0); +NV_STATUS khwpmStreamoutFreePmaVaSpace_IMPL(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 arg3); #ifdef __nvoc_kern_hwpm_h_disabled -static inline NV_STATUS khwpmStreamoutFreePmaVaSpace(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 arg0) { +static inline NV_STATUS khwpmStreamoutFreePmaVaSpace(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("KernelHwpm was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_hwpm_h_disabled -#define khwpmStreamoutFreePmaVaSpace(pGpu, pKernelHwpm, arg0) khwpmStreamoutFreePmaVaSpace_IMPL(pGpu, pKernelHwpm, arg0) +#define khwpmStreamoutFreePmaVaSpace(pGpu, pKernelHwpm, arg3) khwpmStreamoutFreePmaVaSpace_IMPL(pGpu, pKernelHwpm, arg3) #endif //__nvoc_kern_hwpm_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_kern_hwpm_power_nvoc.h b/src/nvidia/generated/g_kern_hwpm_power_nvoc.h index ad4ac51f07..5efc7cdb4e 100644 --- a/src/nvidia/generated/g_kern_hwpm_power_nvoc.h +++ b/src/nvidia/generated/g_kern_hwpm_power_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERN_HWPM_POWER_NVOC_H_ #define _G_KERN_HWPM_POWER_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif diff --git a/src/nvidia/generated/g_kern_mem_sys_nvoc.c b/src/nvidia/generated/g_kern_mem_sys_nvoc.c index 71111c6b80..1548c694a9 100644 --- a/src/nvidia/generated/g_kern_mem_sys_nvoc.c +++ b/src/nvidia/generated/g_kern_mem_sys_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelMemorySystem = /*pExportInfo=*/ &__nvoc_export_info_KernelMemorySystem }; -static NV_STATUS __nvoc_thunk_KernelMemorySystem_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, ENGDESCRIPTOR arg0) { - return kmemsysConstructEngine(pGpu, (struct KernelMemorySystem *)(((unsigned char *)pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), arg0); +// 9 down-thunk(s) defined to bridge methods in KernelMemorySystem from superclasses + +// kmemsysConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, ENGDESCRIPTOR arg3) { + return kmemsysConstructEngine(pGpu, (struct KernelMemorySystem *)(((unsigned char *) pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelMemorySystem_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem) { - return kmemsysStateInitLocked(pGpu, (struct KernelMemorySystem *)(((unsigned char *)pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); +// kmemsysStatePreInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem) { + return kmemsysStatePreInitLocked(pGpu, (struct KernelMemorySystem *)(((unsigned char *) pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_KernelMemorySystem_engstateStatePreLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags) { - return kmemsysStatePreLoad(pGpu, (struct KernelMemorySystem *)(((unsigned char *)pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), flags); +// kmemsysStateInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem) { + return kmemsysStateInitLocked(pGpu, (struct KernelMemorySystem *)(((unsigned char *) pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_KernelMemorySystem_engstateStatePostLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags) { - return kmemsysStatePostLoad(pGpu, (struct KernelMemorySystem *)(((unsigned char *)pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), flags); +// kmemsysStatePreLoad: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStatePreLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags) { + return kmemsysStatePreLoad(pGpu, (struct KernelMemorySystem *)(((unsigned char *) pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), flags); } -static NV_STATUS __nvoc_thunk_KernelMemorySystem_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags) { - return kmemsysStateLoad(pGpu, (struct KernelMemorySystem *)(((unsigned char *)pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), flags); +// kmemsysStatePostLoad: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStatePostLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags) { + return kmemsysStatePostLoad(pGpu, (struct KernelMemorySystem *)(((unsigned char *) pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), flags); } -static NV_STATUS __nvoc_thunk_KernelMemorySystem_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags) { - return kmemsysStatePreUnload(pGpu, (struct KernelMemorySystem *)(((unsigned char *)pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), flags); +// kmemsysStateLoad: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags) { + return kmemsysStateLoad(pGpu, (struct KernelMemorySystem *)(((unsigned char *) pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), flags); } -static NV_STATUS __nvoc_thunk_KernelMemorySystem_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags) { - return kmemsysStateUnload(pGpu, (struct KernelMemorySystem *)(((unsigned char *)pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), flags); +// kmemsysStatePreUnload: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags) { + return kmemsysStatePreUnload(pGpu, (struct KernelMemorySystem *)(((unsigned char *) pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), flags); } -static void __nvoc_thunk_KernelMemorySystem_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem) { - kmemsysStateDestroy(pGpu, (struct KernelMemorySystem *)(((unsigned char *)pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); +// kmemsysStateUnload: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags) { + return kmemsysStateUnload(pGpu, (struct KernelMemorySystem *)(((unsigned char *) pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), flags); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmemsysStatePostUnload(POBJGPU pGpu, struct KernelMemorySystem *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), arg0); +// kmemsysStateDestroy: virtual override (engstate) base (engstate) +static void __nvoc_down_thunk_KernelMemorySystem_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem) { + kmemsysStateDestroy(pGpu, (struct KernelMemorySystem *)(((unsigned char *) pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmemsysStateInitUnlocked(POBJGPU pGpu, struct KernelMemorySystem *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); + +// 5 up-thunk(s) defined to bridge methods in KernelMemorySystem to superclasses + +// kmemsysInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kmemsysInitMissing(POBJGPU pGpu, struct KernelMemorySystem *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_kmemsysInitMissing(POBJGPU pGpu, struct KernelMemorySystem *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); +// kmemsysStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmemsysStatePreInitUnlocked(POBJGPU pGpu, struct KernelMemorySystem *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmemsysStatePreInitLocked(POBJGPU pGpu, struct KernelMemorySystem *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); +// kmemsysStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmemsysStateInitUnlocked(POBJGPU pGpu, struct KernelMemorySystem *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmemsysStatePreInitUnlocked(POBJGPU pGpu, struct KernelMemorySystem *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); +// kmemsysStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmemsysStatePostUnload(POBJGPU pGpu, struct KernelMemorySystem *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), arg3); } -static NvBool __nvoc_thunk_OBJENGSTATE_kmemsysIsPresent(POBJGPU pGpu, struct KernelMemorySystem *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); +// kmemsysIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_kmemsysIsPresent(POBJGPU pGpu, struct KernelMemorySystem *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelMemorySystem = { /*numEntries=*/ 0, @@ -216,6 +236,7 @@ NV_STATUS __nvoc_ctor_KernelMemorySystem(KernelMemorySystem *pThis, RmHalspecOwn return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -228,41 +249,43 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); + // kmemsysConstructEngine -- virtual override (engstate) base (engstate) pThis->__kmemsysConstructEngine__ = &kmemsysConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelMemorySystem_engstateConstructEngine; + // kmemsysStatePreInitLocked -- virtual override (engstate) base (engstate) + pThis->__kmemsysStatePreInitLocked__ = &kmemsysStatePreInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStatePreInitLocked; + + // kmemsysStateInitLocked -- virtual override (engstate) base (engstate) pThis->__kmemsysStateInitLocked__ = &kmemsysStateInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStateInitLocked; + // kmemsysStatePreLoad -- virtual override (engstate) base (engstate) pThis->__kmemsysStatePreLoad__ = &kmemsysStatePreLoad_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStatePreLoad; + // kmemsysStatePostLoad -- virtual override (engstate) base (engstate) pThis->__kmemsysStatePostLoad__ = &kmemsysStatePostLoad_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStatePostLoad; - // Hal function -- kmemsysStateLoad - if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ - { - pThis->__kmemsysStateLoad__ = &kmemsysStateLoad_VF; - } - // default - else - { - pThis->__kmemsysStateLoad__ = &kmemsysStateLoad_ac1694; - } + // kmemsysStateLoad -- virtual override (engstate) base (engstate) + pThis->__kmemsysStateLoad__ = &kmemsysStateLoad_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStateLoad; + // kmemsysStatePreUnload -- virtual override (engstate) base (engstate) pThis->__kmemsysStatePreUnload__ = &kmemsysStatePreUnload_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStatePreUnload; - // Hal function -- kmemsysStateUnload - if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ - { - pThis->__kmemsysStateUnload__ = &kmemsysStateUnload_VF; - } - // default - else - { - pThis->__kmemsysStateUnload__ = &kmemsysStateUnload_ac1694; - } + // kmemsysStateUnload -- virtual override (engstate) base (engstate) + pThis->__kmemsysStateUnload__ = &kmemsysStateUnload_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStateUnload; + // kmemsysStateDestroy -- virtual override (engstate) base (engstate) pThis->__kmemsysStateDestroy__ = &kmemsysStateDestroy_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStateDestroy; - // Hal function -- kmemsysGetFbNumaInfo + // kmemsysGetFbNumaInfo -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kmemsysGetFbNumaInfo__ = &kmemsysGetFbNumaInfo_56cd7a; @@ -272,7 +295,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysGetFbNumaInfo__ = &kmemsysGetFbNumaInfo_GV100; } - // Hal function -- kmemsysReadUsableFbSize + // kmemsysReadUsableFbSize -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000007e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 */ { pThis->__kmemsysReadUsableFbSize__ = &kmemsysReadUsableFbSize_GP102; @@ -282,7 +305,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysReadUsableFbSize__ = &kmemsysReadUsableFbSize_GA102; } - // Hal function -- kmemsysGetUsableFbSize + // kmemsysGetUsableFbSize -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmemsysGetUsableFbSize__ = &kmemsysGetUsableFbSize_5baef9; @@ -292,7 +315,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysGetUsableFbSize__ = &kmemsysGetUsableFbSize_KERNEL; } - // Hal function -- kmemsysCacheOp + // kmemsysCacheOp -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kmemsysCacheOp__ = &kmemsysCacheOp_GH100; @@ -302,7 +325,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysCacheOp__ = &kmemsysCacheOp_GM200; } - // Hal function -- kmemsysDoCacheOp + // kmemsysDoCacheOp -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kmemsysDoCacheOp__ = &kmemsysDoCacheOp_GH100; @@ -312,7 +335,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysDoCacheOp__ = &kmemsysDoCacheOp_GM107; } - // Hal function -- kmemsysReadL2SysmemInvalidateReg + // kmemsysReadL2SysmemInvalidateReg -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kmemsysReadL2SysmemInvalidateReg__ = &kmemsysReadL2SysmemInvalidateReg_68b109; @@ -322,7 +345,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysReadL2SysmemInvalidateReg__ = &kmemsysReadL2SysmemInvalidateReg_TU102; } - // Hal function -- kmemsysWriteL2SysmemInvalidateReg + // kmemsysWriteL2SysmemInvalidateReg -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kmemsysWriteL2SysmemInvalidateReg__ = &kmemsysWriteL2SysmemInvalidateReg_f2d351; @@ -332,7 +355,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysWriteL2SysmemInvalidateReg__ = &kmemsysWriteL2SysmemInvalidateReg_TU102; } - // Hal function -- kmemsysReadL2PeermemInvalidateReg + // kmemsysReadL2PeermemInvalidateReg -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kmemsysReadL2PeermemInvalidateReg__ = &kmemsysReadL2PeermemInvalidateReg_68b109; @@ -342,7 +365,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysReadL2PeermemInvalidateReg__ = &kmemsysReadL2PeermemInvalidateReg_TU102; } - // Hal function -- kmemsysWriteL2PeermemInvalidateReg + // kmemsysWriteL2PeermemInvalidateReg -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kmemsysWriteL2PeermemInvalidateReg__ = &kmemsysWriteL2PeermemInvalidateReg_f2d351; @@ -352,7 +375,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysWriteL2PeermemInvalidateReg__ = &kmemsysWriteL2PeermemInvalidateReg_TU102; } - // Hal function -- kmemsysInitFlushSysmemBuffer + // kmemsysInitFlushSysmemBuffer -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmemsysInitFlushSysmemBuffer__ = &kmemsysInitFlushSysmemBuffer_56cd7a; @@ -369,7 +392,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis } } - // Hal function -- kmemsysProgramSysmemFlushBuffer + // kmemsysProgramSysmemFlushBuffer -- halified (4 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmemsysProgramSysmemFlushBuffer__ = &kmemsysProgramSysmemFlushBuffer_b3696a; @@ -390,7 +413,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis } } - // Hal function -- kmemsysGetFlushSysmemBufferAddrShift + // kmemsysGetFlushSysmemBufferAddrShift -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmemsysGetFlushSysmemBufferAddrShift__ = &kmemsysGetFlushSysmemBufferAddrShift_4a4dee; @@ -400,7 +423,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysGetFlushSysmemBufferAddrShift__ = &kmemsysGetFlushSysmemBufferAddrShift_GM107; } - // Hal function -- kmemsysIsPagePLCable + // kmemsysIsPagePLCable -- halified (4 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmemsysIsPagePLCable__ = &kmemsysIsPagePLCable_cbe027; @@ -422,7 +445,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis } } - // Hal function -- kmemsysReadMIGMemoryCfg + // kmemsysReadMIGMemoryCfg -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmemsysReadMIGMemoryCfg__ = &kmemsysReadMIGMemoryCfg_46f6a7; @@ -440,7 +463,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis } } - // Hal function -- kmemsysInitMIGMemoryPartitionTable + // kmemsysInitMIGMemoryPartitionTable -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmemsysInitMIGMemoryPartitionTable__ = &kmemsysInitMIGMemoryPartitionTable_56cd7a; @@ -458,7 +481,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis } } - // Hal function -- kmemsysSwizzIdToVmmuSegmentsRange + // kmemsysSwizzIdToVmmuSegmentsRange -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kmemsysSwizzIdToVmmuSegmentsRange__ = &kmemsysSwizzIdToVmmuSegmentsRange_GH100; @@ -468,7 +491,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysSwizzIdToVmmuSegmentsRange__ = &kmemsysSwizzIdToVmmuSegmentsRange_GA100; } - // Hal function -- kmemsysNumaAddMemory + // kmemsysNumaAddMemory -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kmemsysNumaAddMemory__ = &kmemsysNumaAddMemory_GH100; @@ -479,7 +502,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysNumaAddMemory__ = &kmemsysNumaAddMemory_56cd7a; } - // Hal function -- kmemsysNumaRemoveMemory + // kmemsysNumaRemoveMemory -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kmemsysNumaRemoveMemory__ = &kmemsysNumaRemoveMemory_GH100; @@ -490,7 +513,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysNumaRemoveMemory__ = &kmemsysNumaRemoveMemory_b3696a; } - // Hal function -- kmemsysNumaRemoveAllMemory + // kmemsysNumaRemoveAllMemory -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kmemsysNumaRemoveAllMemory__ = &kmemsysNumaRemoveAllMemory_GH100; @@ -501,7 +524,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysNumaRemoveAllMemory__ = &kmemsysNumaRemoveAllMemory_b3696a; } - // Hal function -- kmemsysPopulateMIGGPUInstanceMemConfig + // kmemsysPopulateMIGGPUInstanceMemConfig -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmemsysPopulateMIGGPUInstanceMemConfig__ = &kmemsysPopulateMIGGPUInstanceMemConfig_56cd7a; @@ -512,7 +535,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysPopulateMIGGPUInstanceMemConfig__ = &kmemsysPopulateMIGGPUInstanceMemConfig_KERNEL; } - // Hal function -- kmemsysSetupAllAtsPeers + // kmemsysSetupAllAtsPeers -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kmemsysSetupAllAtsPeers__ = &kmemsysSetupAllAtsPeers_46f6a7; @@ -522,7 +545,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysSetupAllAtsPeers__ = &kmemsysSetupAllAtsPeers_GV100; } - // Hal function -- kmemsysRemoveAllAtsPeers + // kmemsysRemoveAllAtsPeers -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kmemsysRemoveAllAtsPeers__ = &kmemsysRemoveAllAtsPeers_b3696a; @@ -532,7 +555,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysRemoveAllAtsPeers__ = &kmemsysRemoveAllAtsPeers_GV100; } - // Hal function -- kmemsysAssertFbAckTimeoutPending + // kmemsysAssertFbAckTimeoutPending -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kmemsysAssertFbAckTimeoutPending__ = &kmemsysAssertFbAckTimeoutPending_GH100; @@ -543,7 +566,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysAssertFbAckTimeoutPending__ = &kmemsysAssertFbAckTimeoutPending_491d52; } - // Hal function -- kmemsysGetMaxFbpas + // kmemsysGetMaxFbpas -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ { pThis->__kmemsysGetMaxFbpas__ = &kmemsysGetMaxFbpas_GA100; @@ -558,7 +581,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysGetMaxFbpas__ = &kmemsysGetMaxFbpas_4a4dee; } - // Hal function -- kmemsysGetEccDedCountSize + // kmemsysGetEccDedCountSize -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kmemsysGetEccDedCountSize__ = &kmemsysGetEccDedCountSize_GH100; @@ -568,7 +591,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysGetEccDedCountSize__ = &kmemsysGetEccDedCountSize_TU102; } - // Hal function -- kmemsysGetEccDedCountRegAddr + // kmemsysGetEccDedCountRegAddr -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kmemsysGetEccDedCountRegAddr__ = &kmemsysGetEccDedCountRegAddr_GH100; @@ -578,7 +601,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysGetEccDedCountRegAddr__ = &kmemsysGetEccDedCountRegAddr_TU102; } - // Hal function -- kmemsysGetMaximumBlacklistPages + // kmemsysGetMaximumBlacklistPages -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kmemsysGetMaximumBlacklistPages__ = &kmemsysGetMaximumBlacklistPages_GM107; @@ -588,7 +611,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysGetMaximumBlacklistPages__ = &kmemsysGetMaximumBlacklistPages_GA100; } - // Hal function -- kmemsysGetFbInfos + // kmemsysGetFbInfos -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmemsysGetFbInfos__ = &kmemsysGetFbInfos_VF; @@ -598,36 +621,27 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysGetFbInfos__ = &kmemsysGetFbInfos_ac1694; } - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelMemorySystem_engstateConstructEngine; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_thunk_KernelMemorySystem_engstateStateInitLocked; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ = &__nvoc_thunk_KernelMemorySystem_engstateStatePreLoad; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_thunk_KernelMemorySystem_engstateStatePostLoad; + // kmemsysInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__kmemsysInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kmemsysInitMissing; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_thunk_KernelMemorySystem_engstateStateLoad; + // kmemsysStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kmemsysStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmemsysStatePreInitUnlocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_thunk_KernelMemorySystem_engstateStatePreUnload; + // kmemsysStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kmemsysStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmemsysStateInitUnlocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_thunk_KernelMemorySystem_engstateStateUnload; + // kmemsysStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__kmemsysStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kmemsysStatePostUnload; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_thunk_KernelMemorySystem_engstateStateDestroy; + // kmemsysIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__kmemsysIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kmemsysIsPresent; +} // End __nvoc_init_funcTable_KernelMemorySystem_1 with approximately 87 basic block(s). - pThis->__kmemsysStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_kmemsysStatePostUnload; - - pThis->__kmemsysStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kmemsysStateInitUnlocked; - - pThis->__kmemsysInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kmemsysInitMissing; - - pThis->__kmemsysStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kmemsysStatePreInitLocked; - - pThis->__kmemsysStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kmemsysStatePreInitUnlocked; - - pThis->__kmemsysIsPresent__ = &__nvoc_thunk_OBJENGSTATE_kmemsysIsPresent; -} +// Initialize vtable(s) for 42 virtual method(s). void __nvoc_init_funcTable_KernelMemorySystem(KernelMemorySystem *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 42 per-object function pointer(s). __nvoc_init_funcTable_KernelMemorySystem_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kern_mem_sys_nvoc.h b/src/nvidia/generated/g_kern_mem_sys_nvoc.h index 01a3ac0906..919ed20586 100644 --- a/src/nvidia/generated/g_kern_mem_sys_nvoc.h +++ b/src/nvidia/generated/g_kern_mem_sys_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERN_MEM_SYS_NVOC_H_ #define _G_KERN_MEM_SYS_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kern_mem_sys_nvoc.h" #ifndef KERN_MEM_SYS_H @@ -169,6 +177,10 @@ typedef NV2080_CTRL_INTERNAL_MEMSYS_GET_STATIC_CONFIG_PARAMS MEMORY_SYSTEM_STATI #define FB_HWRESID_ZCULL_VAL_FERMI(n) \ (((n) >> DRF_SHIFT(FB_HWRESID_ZCULL_FERMI)) & DRF_MASK(FB_HWRESID_ZCULL_FERMI)) +#define KMEMSYS_FB_NUMA_ONLINE_BASE 0 + +#define KMEMSYS_FB_NUMA_ONLINE_SIZE(memorySize, memblockSize) NV_ALIGN_DOWN64(memorySize, memblockSize) + /*! * KernelMemorySystem is a logical abstraction of the GPU memory system. This * type is instantiated in VGPU guest/GSP Client as well as the VGPU @@ -198,54 +210,65 @@ typedef NV2080_CTRL_INTERNAL_MEMSYS_GET_STATIC_CONFIG_PARAMS MEMORY_SYSTEM_STATI #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelMemorySystem { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct KernelMemorySystem *__nvoc_pbase_KernelMemorySystem; - NV_STATUS (*__kmemsysConstructEngine__)(OBJGPU *, struct KernelMemorySystem *, ENGDESCRIPTOR); - NV_STATUS (*__kmemsysStateInitLocked__)(OBJGPU *, struct KernelMemorySystem *); - NV_STATUS (*__kmemsysStatePreLoad__)(OBJGPU *, struct KernelMemorySystem *, NvU32); - NV_STATUS (*__kmemsysStatePostLoad__)(OBJGPU *, struct KernelMemorySystem *, NvU32); - NV_STATUS (*__kmemsysStateLoad__)(OBJGPU *, struct KernelMemorySystem *, NvU32); - NV_STATUS (*__kmemsysStatePreUnload__)(OBJGPU *, struct KernelMemorySystem *, NvU32); - NV_STATUS (*__kmemsysStateUnload__)(OBJGPU *, struct KernelMemorySystem *, NvU32); - void (*__kmemsysStateDestroy__)(OBJGPU *, struct KernelMemorySystem *); - NV_STATUS (*__kmemsysGetFbNumaInfo__)(OBJGPU *, struct KernelMemorySystem *, NvU64 *, NvU64 *, NvS32 *); - NV_STATUS (*__kmemsysReadUsableFbSize__)(OBJGPU *, struct KernelMemorySystem *, NvU64 *); - NV_STATUS (*__kmemsysGetUsableFbSize__)(OBJGPU *, struct KernelMemorySystem *, NvU64 *); - NV_STATUS (*__kmemsysCacheOp__)(OBJGPU *, struct KernelMemorySystem *, PMEMORY_DESCRIPTOR, FB_CACHE_MEMTYPE, FB_CACHE_OP); - NV_STATUS (*__kmemsysDoCacheOp__)(OBJGPU *, struct KernelMemorySystem *, NvU32, NvU32, NvU32, PRMTIMEOUT); - NvU32 (*__kmemsysReadL2SysmemInvalidateReg__)(OBJGPU *, struct KernelMemorySystem *); - void (*__kmemsysWriteL2SysmemInvalidateReg__)(OBJGPU *, struct KernelMemorySystem *, NvU32); - NvU32 (*__kmemsysReadL2PeermemInvalidateReg__)(OBJGPU *, struct KernelMemorySystem *); - void (*__kmemsysWriteL2PeermemInvalidateReg__)(OBJGPU *, struct KernelMemorySystem *, NvU32); - NV_STATUS (*__kmemsysInitFlushSysmemBuffer__)(OBJGPU *, struct KernelMemorySystem *); - void (*__kmemsysProgramSysmemFlushBuffer__)(OBJGPU *, struct KernelMemorySystem *); - NvU32 (*__kmemsysGetFlushSysmemBufferAddrShift__)(OBJGPU *, struct KernelMemorySystem *); - NvBool (*__kmemsysIsPagePLCable__)(OBJGPU *, struct KernelMemorySystem *, NvU64, NvU64); - NV_STATUS (*__kmemsysReadMIGMemoryCfg__)(OBJGPU *, struct KernelMemorySystem *); - NV_STATUS (*__kmemsysInitMIGMemoryPartitionTable__)(OBJGPU *, struct KernelMemorySystem *); - NV_STATUS (*__kmemsysSwizzIdToVmmuSegmentsRange__)(OBJGPU *, struct KernelMemorySystem *, NvU32, NvU32, NvU32); - NV_STATUS (*__kmemsysNumaAddMemory__)(OBJGPU *, struct KernelMemorySystem *, NvU32, NvU64, NvU64, NvS32 *); - void (*__kmemsysNumaRemoveMemory__)(OBJGPU *, struct KernelMemorySystem *, NvU32); - void (*__kmemsysNumaRemoveAllMemory__)(OBJGPU *, struct KernelMemorySystem *); - NV_STATUS (*__kmemsysPopulateMIGGPUInstanceMemConfig__)(OBJGPU *, struct KernelMemorySystem *); - NV_STATUS (*__kmemsysSetupAllAtsPeers__)(OBJGPU *, struct KernelMemorySystem *); - void (*__kmemsysRemoveAllAtsPeers__)(OBJGPU *, struct KernelMemorySystem *); - NvBool (*__kmemsysAssertFbAckTimeoutPending__)(OBJGPU *, struct KernelMemorySystem *); - NvU32 (*__kmemsysGetMaxFbpas__)(OBJGPU *, struct KernelMemorySystem *); - NvU32 (*__kmemsysGetEccDedCountSize__)(OBJGPU *, struct KernelMemorySystem *); - NvU32 (*__kmemsysGetEccDedCountRegAddr__)(OBJGPU *, struct KernelMemorySystem *, NvU32, NvU32); - NvU16 (*__kmemsysGetMaximumBlacklistPages__)(OBJGPU *, struct KernelMemorySystem *); - NV_STATUS (*__kmemsysGetFbInfos__)(OBJGPU *, struct KernelMemorySystem *, struct RsClient *, Device *, NvHandle, NV2080_CTRL_FB_GET_INFO_V2_PARAMS *, NvU64 *); - NV_STATUS (*__kmemsysStatePostUnload__)(POBJGPU, struct KernelMemorySystem *, NvU32); - NV_STATUS (*__kmemsysStateInitUnlocked__)(POBJGPU, struct KernelMemorySystem *); - void (*__kmemsysInitMissing__)(POBJGPU, struct KernelMemorySystem *); - NV_STATUS (*__kmemsysStatePreInitLocked__)(POBJGPU, struct KernelMemorySystem *); - NV_STATUS (*__kmemsysStatePreInitUnlocked__)(POBJGPU, struct KernelMemorySystem *); - NvBool (*__kmemsysIsPresent__)(POBJGPU, struct KernelMemorySystem *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct KernelMemorySystem *__nvoc_pbase_KernelMemorySystem; // kmemsys + + // Vtable with 42 per-object function pointers + NV_STATUS (*__kmemsysConstructEngine__)(OBJGPU *, struct KernelMemorySystem * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmemsysStatePreInitLocked__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmemsysStateInitLocked__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmemsysStatePreLoad__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmemsysStatePostLoad__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmemsysStateLoad__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmemsysStatePreUnload__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmemsysStateUnload__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32); // virtual override (engstate) base (engstate) + void (*__kmemsysStateDestroy__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmemsysGetFbNumaInfo__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU64 *, NvU64 *, NvS32 *); // halified (2 hals) body + NV_STATUS (*__kmemsysReadUsableFbSize__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU64 *); // halified (2 hals) body + NV_STATUS (*__kmemsysGetUsableFbSize__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU64 *); // halified (2 hals) body + NV_STATUS (*__kmemsysCacheOp__)(OBJGPU *, struct KernelMemorySystem * /*this*/, PMEMORY_DESCRIPTOR, FB_CACHE_MEMTYPE, FB_CACHE_OP); // halified (2 hals) body + NV_STATUS (*__kmemsysDoCacheOp__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32, NvU32, NvU32, PRMTIMEOUT); // halified (2 hals) body + NvU32 (*__kmemsysReadL2SysmemInvalidateReg__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // halified (2 hals) body + void (*__kmemsysWriteL2SysmemInvalidateReg__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32); // halified (2 hals) body + NvU32 (*__kmemsysReadL2PeermemInvalidateReg__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // halified (2 hals) body + void (*__kmemsysWriteL2PeermemInvalidateReg__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__kmemsysInitFlushSysmemBuffer__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // halified (3 hals) body + void (*__kmemsysProgramSysmemFlushBuffer__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // halified (4 hals) body + NvU32 (*__kmemsysGetFlushSysmemBufferAddrShift__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // halified (2 hals) body + NvBool (*__kmemsysIsPagePLCable__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU64, NvU64); // halified (4 hals) body + NV_STATUS (*__kmemsysReadMIGMemoryCfg__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // halified (3 hals) body + NV_STATUS (*__kmemsysInitMIGMemoryPartitionTable__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // halified (3 hals) body + NV_STATUS (*__kmemsysSwizzIdToVmmuSegmentsRange__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32, NvU32, NvU32); // halified (2 hals) + NV_STATUS (*__kmemsysNumaAddMemory__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32, NvU64, NvU64, NvS32 *); // halified (2 hals) body + void (*__kmemsysNumaRemoveMemory__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32); // halified (2 hals) body + void (*__kmemsysNumaRemoveAllMemory__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // halified (2 hals) body + NV_STATUS (*__kmemsysPopulateMIGGPUInstanceMemConfig__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // halified (2 hals) body + NV_STATUS (*__kmemsysSetupAllAtsPeers__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // halified (2 hals) body + void (*__kmemsysRemoveAllAtsPeers__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // halified (2 hals) body + NvBool (*__kmemsysAssertFbAckTimeoutPending__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // halified (2 hals) body + NvU32 (*__kmemsysGetMaxFbpas__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // halified (3 hals) body + NvU32 (*__kmemsysGetEccDedCountSize__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // halified (2 hals) body + NvU32 (*__kmemsysGetEccDedCountRegAddr__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32, NvU32); // halified (2 hals) body + NvU16 (*__kmemsysGetMaximumBlacklistPages__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // halified (2 hals) body + NV_STATUS (*__kmemsysGetFbInfos__)(OBJGPU *, struct KernelMemorySystem * /*this*/, struct RsClient *, Device *, NvHandle, NV2080_CTRL_FB_GET_INFO_V2_PARAMS *, NvU64 *); // halified (2 hals) + void (*__kmemsysInitMissing__)(POBJGPU, struct KernelMemorySystem * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmemsysStatePreInitUnlocked__)(POBJGPU, struct KernelMemorySystem * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmemsysStateInitUnlocked__)(POBJGPU, struct KernelMemorySystem * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmemsysStatePostUnload__)(POBJGPU, struct KernelMemorySystem * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__kmemsysIsPresent__)(POBJGPU, struct KernelMemorySystem * /*this*/); // virtual inherited (engstate) base (engstate) + + // Data members NvBool bDisableTiledCachingInvalidatesWithEccBug1521641; NvBool bGpuCacheEnable; NvBool bNumaNodesAdded; @@ -281,6 +304,7 @@ typedef struct KernelMemorySystem KernelMemorySystem; #define __nvoc_class_id_KernelMemorySystem 0x7faff1 #endif /* __nvoc_class_id_KernelMemorySystem */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelMemorySystem; #define __staticCast_KernelMemorySystem(pThis) \ @@ -293,6 +317,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelMemorySystem; ((KernelMemorySystem*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelMemorySystem))) #endif //__nvoc_kern_mem_sys_h_disabled +// Property macros #define PDB_PROP_KMEMSYS_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_KMEMSYS_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -302,78 +327,290 @@ NV_STATUS __nvoc_objCreate_KernelMemorySystem(KernelMemorySystem**, Dynamic*, Nv #define __objCreate_KernelMemorySystem(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelMemorySystem((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define kmemsysConstructEngine(pGpu, pKernelMemorySystem, arg0) kmemsysConstructEngine_DISPATCH(pGpu, pKernelMemorySystem, arg0) + +// Wrapper macros +#define kmemsysConstructEngine_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysConstructEngine__ +#define kmemsysConstructEngine(pGpu, pKernelMemorySystem, arg3) kmemsysConstructEngine_DISPATCH(pGpu, pKernelMemorySystem, arg3) +#define kmemsysStatePreInitLocked_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysStatePreInitLocked__ +#define kmemsysStatePreInitLocked(pGpu, pKernelMemorySystem) kmemsysStatePreInitLocked_DISPATCH(pGpu, pKernelMemorySystem) +#define kmemsysStateInitLocked_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysStateInitLocked__ #define kmemsysStateInitLocked(pGpu, pKernelMemorySystem) kmemsysStateInitLocked_DISPATCH(pGpu, pKernelMemorySystem) +#define kmemsysStatePreLoad_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysStatePreLoad__ #define kmemsysStatePreLoad(pGpu, pKernelMemorySystem, flags) kmemsysStatePreLoad_DISPATCH(pGpu, pKernelMemorySystem, flags) +#define kmemsysStatePostLoad_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysStatePostLoad__ #define kmemsysStatePostLoad(pGpu, pKernelMemorySystem, flags) kmemsysStatePostLoad_DISPATCH(pGpu, pKernelMemorySystem, flags) +#define kmemsysStateLoad_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysStateLoad__ #define kmemsysStateLoad(pGpu, pKernelMemorySystem, flags) kmemsysStateLoad_DISPATCH(pGpu, pKernelMemorySystem, flags) -#define kmemsysStateLoad_HAL(pGpu, pKernelMemorySystem, flags) kmemsysStateLoad_DISPATCH(pGpu, pKernelMemorySystem, flags) +#define kmemsysStatePreUnload_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysStatePreUnload__ #define kmemsysStatePreUnload(pGpu, pKernelMemorySystem, flags) kmemsysStatePreUnload_DISPATCH(pGpu, pKernelMemorySystem, flags) +#define kmemsysStateUnload_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysStateUnload__ #define kmemsysStateUnload(pGpu, pKernelMemorySystem, flags) kmemsysStateUnload_DISPATCH(pGpu, pKernelMemorySystem, flags) -#define kmemsysStateUnload_HAL(pGpu, pKernelMemorySystem, flags) kmemsysStateUnload_DISPATCH(pGpu, pKernelMemorySystem, flags) +#define kmemsysStateDestroy_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysStateDestroy__ #define kmemsysStateDestroy(pGpu, pKernelMemorySystem) kmemsysStateDestroy_DISPATCH(pGpu, pKernelMemorySystem) +#define kmemsysGetFbNumaInfo_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysGetFbNumaInfo__ #define kmemsysGetFbNumaInfo(pGpu, pKernelMemorySystem, physAddr, rsvdPhysAddr, numaNodeId) kmemsysGetFbNumaInfo_DISPATCH(pGpu, pKernelMemorySystem, physAddr, rsvdPhysAddr, numaNodeId) #define kmemsysGetFbNumaInfo_HAL(pGpu, pKernelMemorySystem, physAddr, rsvdPhysAddr, numaNodeId) kmemsysGetFbNumaInfo_DISPATCH(pGpu, pKernelMemorySystem, physAddr, rsvdPhysAddr, numaNodeId) +#define kmemsysReadUsableFbSize_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysReadUsableFbSize__ #define kmemsysReadUsableFbSize(pGpu, pKernelMemorySystem, pFbSize) kmemsysReadUsableFbSize_DISPATCH(pGpu, pKernelMemorySystem, pFbSize) #define kmemsysReadUsableFbSize_HAL(pGpu, pKernelMemorySystem, pFbSize) kmemsysReadUsableFbSize_DISPATCH(pGpu, pKernelMemorySystem, pFbSize) +#define kmemsysGetUsableFbSize_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysGetUsableFbSize__ #define kmemsysGetUsableFbSize(pGpu, pKernelMemorySystem, pFbSize) kmemsysGetUsableFbSize_DISPATCH(pGpu, pKernelMemorySystem, pFbSize) #define kmemsysGetUsableFbSize_HAL(pGpu, pKernelMemorySystem, pFbSize) kmemsysGetUsableFbSize_DISPATCH(pGpu, pKernelMemorySystem, pFbSize) -#define kmemsysCacheOp(pGpu, pKernelMemorySystem, arg0, arg1, operation) kmemsysCacheOp_DISPATCH(pGpu, pKernelMemorySystem, arg0, arg1, operation) -#define kmemsysCacheOp_HAL(pGpu, pKernelMemorySystem, arg0, arg1, operation) kmemsysCacheOp_DISPATCH(pGpu, pKernelMemorySystem, arg0, arg1, operation) -#define kmemsysDoCacheOp(pGpu, pKernelMemorySystem, arg0, arg1, arg2, arg3) kmemsysDoCacheOp_DISPATCH(pGpu, pKernelMemorySystem, arg0, arg1, arg2, arg3) -#define kmemsysDoCacheOp_HAL(pGpu, pKernelMemorySystem, arg0, arg1, arg2, arg3) kmemsysDoCacheOp_DISPATCH(pGpu, pKernelMemorySystem, arg0, arg1, arg2, arg3) +#define kmemsysCacheOp_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysCacheOp__ +#define kmemsysCacheOp(pGpu, pKernelMemorySystem, arg3, arg4, operation) kmemsysCacheOp_DISPATCH(pGpu, pKernelMemorySystem, arg3, arg4, operation) +#define kmemsysCacheOp_HAL(pGpu, pKernelMemorySystem, arg3, arg4, operation) kmemsysCacheOp_DISPATCH(pGpu, pKernelMemorySystem, arg3, arg4, operation) +#define kmemsysDoCacheOp_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysDoCacheOp__ +#define kmemsysDoCacheOp(pGpu, pKernelMemorySystem, arg3, arg4, arg5, arg6) kmemsysDoCacheOp_DISPATCH(pGpu, pKernelMemorySystem, arg3, arg4, arg5, arg6) +#define kmemsysDoCacheOp_HAL(pGpu, pKernelMemorySystem, arg3, arg4, arg5, arg6) kmemsysDoCacheOp_DISPATCH(pGpu, pKernelMemorySystem, arg3, arg4, arg5, arg6) +#define kmemsysReadL2SysmemInvalidateReg_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysReadL2SysmemInvalidateReg__ #define kmemsysReadL2SysmemInvalidateReg(pGpu, pKernelMemorySystem) kmemsysReadL2SysmemInvalidateReg_DISPATCH(pGpu, pKernelMemorySystem) #define kmemsysReadL2SysmemInvalidateReg_HAL(pGpu, pKernelMemorySystem) kmemsysReadL2SysmemInvalidateReg_DISPATCH(pGpu, pKernelMemorySystem) -#define kmemsysWriteL2SysmemInvalidateReg(pGpu, pKernelMemorySystem, arg0) kmemsysWriteL2SysmemInvalidateReg_DISPATCH(pGpu, pKernelMemorySystem, arg0) -#define kmemsysWriteL2SysmemInvalidateReg_HAL(pGpu, pKernelMemorySystem, arg0) kmemsysWriteL2SysmemInvalidateReg_DISPATCH(pGpu, pKernelMemorySystem, arg0) +#define kmemsysWriteL2SysmemInvalidateReg_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysWriteL2SysmemInvalidateReg__ +#define kmemsysWriteL2SysmemInvalidateReg(pGpu, pKernelMemorySystem, arg3) kmemsysWriteL2SysmemInvalidateReg_DISPATCH(pGpu, pKernelMemorySystem, arg3) +#define kmemsysWriteL2SysmemInvalidateReg_HAL(pGpu, pKernelMemorySystem, arg3) kmemsysWriteL2SysmemInvalidateReg_DISPATCH(pGpu, pKernelMemorySystem, arg3) +#define kmemsysReadL2PeermemInvalidateReg_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysReadL2PeermemInvalidateReg__ #define kmemsysReadL2PeermemInvalidateReg(pGpu, pKernelMemorySystem) kmemsysReadL2PeermemInvalidateReg_DISPATCH(pGpu, pKernelMemorySystem) #define kmemsysReadL2PeermemInvalidateReg_HAL(pGpu, pKernelMemorySystem) kmemsysReadL2PeermemInvalidateReg_DISPATCH(pGpu, pKernelMemorySystem) -#define kmemsysWriteL2PeermemInvalidateReg(pGpu, pKernelMemorySystem, arg0) kmemsysWriteL2PeermemInvalidateReg_DISPATCH(pGpu, pKernelMemorySystem, arg0) -#define kmemsysWriteL2PeermemInvalidateReg_HAL(pGpu, pKernelMemorySystem, arg0) kmemsysWriteL2PeermemInvalidateReg_DISPATCH(pGpu, pKernelMemorySystem, arg0) +#define kmemsysWriteL2PeermemInvalidateReg_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysWriteL2PeermemInvalidateReg__ +#define kmemsysWriteL2PeermemInvalidateReg(pGpu, pKernelMemorySystem, arg3) kmemsysWriteL2PeermemInvalidateReg_DISPATCH(pGpu, pKernelMemorySystem, arg3) +#define kmemsysWriteL2PeermemInvalidateReg_HAL(pGpu, pKernelMemorySystem, arg3) kmemsysWriteL2PeermemInvalidateReg_DISPATCH(pGpu, pKernelMemorySystem, arg3) +#define kmemsysInitFlushSysmemBuffer_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysInitFlushSysmemBuffer__ #define kmemsysInitFlushSysmemBuffer(pGpu, pKernelMemorySystem) kmemsysInitFlushSysmemBuffer_DISPATCH(pGpu, pKernelMemorySystem) #define kmemsysInitFlushSysmemBuffer_HAL(pGpu, pKernelMemorySystem) kmemsysInitFlushSysmemBuffer_DISPATCH(pGpu, pKernelMemorySystem) +#define kmemsysProgramSysmemFlushBuffer_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysProgramSysmemFlushBuffer__ #define kmemsysProgramSysmemFlushBuffer(pGpu, pKernelMemorySystem) kmemsysProgramSysmemFlushBuffer_DISPATCH(pGpu, pKernelMemorySystem) #define kmemsysProgramSysmemFlushBuffer_HAL(pGpu, pKernelMemorySystem) kmemsysProgramSysmemFlushBuffer_DISPATCH(pGpu, pKernelMemorySystem) +#define kmemsysGetFlushSysmemBufferAddrShift_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysGetFlushSysmemBufferAddrShift__ #define kmemsysGetFlushSysmemBufferAddrShift(pGpu, pKernelMemorySystem) kmemsysGetFlushSysmemBufferAddrShift_DISPATCH(pGpu, pKernelMemorySystem) #define kmemsysGetFlushSysmemBufferAddrShift_HAL(pGpu, pKernelMemorySystem) kmemsysGetFlushSysmemBufferAddrShift_DISPATCH(pGpu, pKernelMemorySystem) +#define kmemsysIsPagePLCable_FNPTR(KernelMemorySystem) KernelMemorySystem->__kmemsysIsPagePLCable__ #define kmemsysIsPagePLCable(pGpu, KernelMemorySystem, physAddr, pageSize) kmemsysIsPagePLCable_DISPATCH(pGpu, KernelMemorySystem, physAddr, pageSize) #define kmemsysIsPagePLCable_HAL(pGpu, KernelMemorySystem, physAddr, pageSize) kmemsysIsPagePLCable_DISPATCH(pGpu, KernelMemorySystem, physAddr, pageSize) +#define kmemsysReadMIGMemoryCfg_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysReadMIGMemoryCfg__ #define kmemsysReadMIGMemoryCfg(pGpu, pKernelMemorySystem) kmemsysReadMIGMemoryCfg_DISPATCH(pGpu, pKernelMemorySystem) #define kmemsysReadMIGMemoryCfg_HAL(pGpu, pKernelMemorySystem) kmemsysReadMIGMemoryCfg_DISPATCH(pGpu, pKernelMemorySystem) +#define kmemsysInitMIGMemoryPartitionTable_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysInitMIGMemoryPartitionTable__ #define kmemsysInitMIGMemoryPartitionTable(pGpu, pKernelMemorySystem) kmemsysInitMIGMemoryPartitionTable_DISPATCH(pGpu, pKernelMemorySystem) #define kmemsysInitMIGMemoryPartitionTable_HAL(pGpu, pKernelMemorySystem) kmemsysInitMIGMemoryPartitionTable_DISPATCH(pGpu, pKernelMemorySystem) +#define kmemsysSwizzIdToVmmuSegmentsRange_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysSwizzIdToVmmuSegmentsRange__ #define kmemsysSwizzIdToVmmuSegmentsRange(pGpu, pKernelMemorySystem, swizzId, vmmuSegmentSize, totalVmmuSegments) kmemsysSwizzIdToVmmuSegmentsRange_DISPATCH(pGpu, pKernelMemorySystem, swizzId, vmmuSegmentSize, totalVmmuSegments) #define kmemsysSwizzIdToVmmuSegmentsRange_HAL(pGpu, pKernelMemorySystem, swizzId, vmmuSegmentSize, totalVmmuSegments) kmemsysSwizzIdToVmmuSegmentsRange_DISPATCH(pGpu, pKernelMemorySystem, swizzId, vmmuSegmentSize, totalVmmuSegments) +#define kmemsysNumaAddMemory_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysNumaAddMemory__ #define kmemsysNumaAddMemory(pGpu, pKernelMemorySystem, swizzId, offset, size, numaNodeId) kmemsysNumaAddMemory_DISPATCH(pGpu, pKernelMemorySystem, swizzId, offset, size, numaNodeId) #define kmemsysNumaAddMemory_HAL(pGpu, pKernelMemorySystem, swizzId, offset, size, numaNodeId) kmemsysNumaAddMemory_DISPATCH(pGpu, pKernelMemorySystem, swizzId, offset, size, numaNodeId) +#define kmemsysNumaRemoveMemory_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysNumaRemoveMemory__ #define kmemsysNumaRemoveMemory(pGpu, pKernelMemorySystem, swizzId) kmemsysNumaRemoveMemory_DISPATCH(pGpu, pKernelMemorySystem, swizzId) #define kmemsysNumaRemoveMemory_HAL(pGpu, pKernelMemorySystem, swizzId) kmemsysNumaRemoveMemory_DISPATCH(pGpu, pKernelMemorySystem, swizzId) +#define kmemsysNumaRemoveAllMemory_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysNumaRemoveAllMemory__ #define kmemsysNumaRemoveAllMemory(pGpu, pKernelMemorySystem) kmemsysNumaRemoveAllMemory_DISPATCH(pGpu, pKernelMemorySystem) #define kmemsysNumaRemoveAllMemory_HAL(pGpu, pKernelMemorySystem) kmemsysNumaRemoveAllMemory_DISPATCH(pGpu, pKernelMemorySystem) +#define kmemsysPopulateMIGGPUInstanceMemConfig_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysPopulateMIGGPUInstanceMemConfig__ #define kmemsysPopulateMIGGPUInstanceMemConfig(pGpu, pKernelMemorySystem) kmemsysPopulateMIGGPUInstanceMemConfig_DISPATCH(pGpu, pKernelMemorySystem) #define kmemsysPopulateMIGGPUInstanceMemConfig_HAL(pGpu, pKernelMemorySystem) kmemsysPopulateMIGGPUInstanceMemConfig_DISPATCH(pGpu, pKernelMemorySystem) +#define kmemsysSetupAllAtsPeers_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysSetupAllAtsPeers__ #define kmemsysSetupAllAtsPeers(pGpu, pKernelMemorySystem) kmemsysSetupAllAtsPeers_DISPATCH(pGpu, pKernelMemorySystem) #define kmemsysSetupAllAtsPeers_HAL(pGpu, pKernelMemorySystem) kmemsysSetupAllAtsPeers_DISPATCH(pGpu, pKernelMemorySystem) +#define kmemsysRemoveAllAtsPeers_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysRemoveAllAtsPeers__ #define kmemsysRemoveAllAtsPeers(pGpu, pKernelMemorySystem) kmemsysRemoveAllAtsPeers_DISPATCH(pGpu, pKernelMemorySystem) #define kmemsysRemoveAllAtsPeers_HAL(pGpu, pKernelMemorySystem) kmemsysRemoveAllAtsPeers_DISPATCH(pGpu, pKernelMemorySystem) +#define kmemsysAssertFbAckTimeoutPending_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysAssertFbAckTimeoutPending__ #define kmemsysAssertFbAckTimeoutPending(pGpu, pKernelMemorySystem) kmemsysAssertFbAckTimeoutPending_DISPATCH(pGpu, pKernelMemorySystem) #define kmemsysAssertFbAckTimeoutPending_HAL(pGpu, pKernelMemorySystem) kmemsysAssertFbAckTimeoutPending_DISPATCH(pGpu, pKernelMemorySystem) +#define kmemsysGetMaxFbpas_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysGetMaxFbpas__ #define kmemsysGetMaxFbpas(pGpu, pKernelMemorySystem) kmemsysGetMaxFbpas_DISPATCH(pGpu, pKernelMemorySystem) #define kmemsysGetMaxFbpas_HAL(pGpu, pKernelMemorySystem) kmemsysGetMaxFbpas_DISPATCH(pGpu, pKernelMemorySystem) +#define kmemsysGetEccDedCountSize_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysGetEccDedCountSize__ #define kmemsysGetEccDedCountSize(pGpu, pKernelMemorySystem) kmemsysGetEccDedCountSize_DISPATCH(pGpu, pKernelMemorySystem) #define kmemsysGetEccDedCountSize_HAL(pGpu, pKernelMemorySystem) kmemsysGetEccDedCountSize_DISPATCH(pGpu, pKernelMemorySystem) +#define kmemsysGetEccDedCountRegAddr_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysGetEccDedCountRegAddr__ #define kmemsysGetEccDedCountRegAddr(pGpu, pKernelMemorySystem, fbpa, subp) kmemsysGetEccDedCountRegAddr_DISPATCH(pGpu, pKernelMemorySystem, fbpa, subp) #define kmemsysGetEccDedCountRegAddr_HAL(pGpu, pKernelMemorySystem, fbpa, subp) kmemsysGetEccDedCountRegAddr_DISPATCH(pGpu, pKernelMemorySystem, fbpa, subp) +#define kmemsysGetMaximumBlacklistPages_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysGetMaximumBlacklistPages__ #define kmemsysGetMaximumBlacklistPages(pGpu, pKernelMemorySystem) kmemsysGetMaximumBlacklistPages_DISPATCH(pGpu, pKernelMemorySystem) #define kmemsysGetMaximumBlacklistPages_HAL(pGpu, pKernelMemorySystem) kmemsysGetMaximumBlacklistPages_DISPATCH(pGpu, pKernelMemorySystem) -#define kmemsysGetFbInfos(arg0, arg1, arg2, arg3, hSubdevice, pParams, pFbInfoListIndicesUnset) kmemsysGetFbInfos_DISPATCH(arg0, arg1, arg2, arg3, hSubdevice, pParams, pFbInfoListIndicesUnset) -#define kmemsysGetFbInfos_HAL(arg0, arg1, arg2, arg3, hSubdevice, pParams, pFbInfoListIndicesUnset) kmemsysGetFbInfos_DISPATCH(arg0, arg1, arg2, arg3, hSubdevice, pParams, pFbInfoListIndicesUnset) -#define kmemsysStatePostUnload(pGpu, pEngstate, arg0) kmemsysStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kmemsysStateInitUnlocked(pGpu, pEngstate) kmemsysStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kmemsysGetFbInfos_FNPTR(arg_this) arg_this->__kmemsysGetFbInfos__ +#define kmemsysGetFbInfos(arg1, arg_this, arg3, arg4, hSubdevice, pParams, pFbInfoListIndicesUnset) kmemsysGetFbInfos_DISPATCH(arg1, arg_this, arg3, arg4, hSubdevice, pParams, pFbInfoListIndicesUnset) +#define kmemsysGetFbInfos_HAL(arg1, arg_this, arg3, arg4, hSubdevice, pParams, pFbInfoListIndicesUnset) kmemsysGetFbInfos_DISPATCH(arg1, arg_this, arg3, arg4, hSubdevice, pParams, pFbInfoListIndicesUnset) +#define kmemsysInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define kmemsysInitMissing(pGpu, pEngstate) kmemsysInitMissing_DISPATCH(pGpu, pEngstate) -#define kmemsysStatePreInitLocked(pGpu, pEngstate) kmemsysStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define kmemsysStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define kmemsysStatePreInitUnlocked(pGpu, pEngstate) kmemsysStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kmemsysStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kmemsysStateInitUnlocked(pGpu, pEngstate) kmemsysStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kmemsysStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kmemsysStatePostUnload(pGpu, pEngstate, arg3) kmemsysStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kmemsysIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define kmemsysIsPresent(pGpu, pEngstate) kmemsysIsPresent_DISPATCH(pGpu, pEngstate) + +// Dispatch functions +static inline NV_STATUS kmemsysConstructEngine_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, ENGDESCRIPTOR arg3) { + return pKernelMemorySystem->__kmemsysConstructEngine__(pGpu, pKernelMemorySystem, arg3); +} + +static inline NV_STATUS kmemsysStatePreInitLocked_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { + return pKernelMemorySystem->__kmemsysStatePreInitLocked__(pGpu, pKernelMemorySystem); +} + +static inline NV_STATUS kmemsysStateInitLocked_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { + return pKernelMemorySystem->__kmemsysStateInitLocked__(pGpu, pKernelMemorySystem); +} + +static inline NV_STATUS kmemsysStatePreLoad_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags) { + return pKernelMemorySystem->__kmemsysStatePreLoad__(pGpu, pKernelMemorySystem, flags); +} + +static inline NV_STATUS kmemsysStatePostLoad_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags) { + return pKernelMemorySystem->__kmemsysStatePostLoad__(pGpu, pKernelMemorySystem, flags); +} + +static inline NV_STATUS kmemsysStateLoad_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags) { + return pKernelMemorySystem->__kmemsysStateLoad__(pGpu, pKernelMemorySystem, flags); +} + +static inline NV_STATUS kmemsysStatePreUnload_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags) { + return pKernelMemorySystem->__kmemsysStatePreUnload__(pGpu, pKernelMemorySystem, flags); +} + +static inline NV_STATUS kmemsysStateUnload_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags) { + return pKernelMemorySystem->__kmemsysStateUnload__(pGpu, pKernelMemorySystem, flags); +} + +static inline void kmemsysStateDestroy_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { + pKernelMemorySystem->__kmemsysStateDestroy__(pGpu, pKernelMemorySystem); +} + +static inline NV_STATUS kmemsysGetFbNumaInfo_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *physAddr, NvU64 *rsvdPhysAddr, NvS32 *numaNodeId) { + return pKernelMemorySystem->__kmemsysGetFbNumaInfo__(pGpu, pKernelMemorySystem, physAddr, rsvdPhysAddr, numaNodeId); +} + +static inline NV_STATUS kmemsysReadUsableFbSize_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *pFbSize) { + return pKernelMemorySystem->__kmemsysReadUsableFbSize__(pGpu, pKernelMemorySystem, pFbSize); +} + +static inline NV_STATUS kmemsysGetUsableFbSize_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *pFbSize) { + return pKernelMemorySystem->__kmemsysGetUsableFbSize__(pGpu, pKernelMemorySystem, pFbSize); +} + +static inline NV_STATUS kmemsysCacheOp_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, PMEMORY_DESCRIPTOR arg3, FB_CACHE_MEMTYPE arg4, FB_CACHE_OP operation) { + return pKernelMemorySystem->__kmemsysCacheOp__(pGpu, pKernelMemorySystem, arg3, arg4, operation); +} + +static inline NV_STATUS kmemsysDoCacheOp_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 arg3, NvU32 arg4, NvU32 arg5, PRMTIMEOUT arg6) { + return pKernelMemorySystem->__kmemsysDoCacheOp__(pGpu, pKernelMemorySystem, arg3, arg4, arg5, arg6); +} + +static inline NvU32 kmemsysReadL2SysmemInvalidateReg_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { + return pKernelMemorySystem->__kmemsysReadL2SysmemInvalidateReg__(pGpu, pKernelMemorySystem); +} + +static inline void kmemsysWriteL2SysmemInvalidateReg_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 arg3) { + pKernelMemorySystem->__kmemsysWriteL2SysmemInvalidateReg__(pGpu, pKernelMemorySystem, arg3); +} + +static inline NvU32 kmemsysReadL2PeermemInvalidateReg_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { + return pKernelMemorySystem->__kmemsysReadL2PeermemInvalidateReg__(pGpu, pKernelMemorySystem); +} + +static inline void kmemsysWriteL2PeermemInvalidateReg_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 arg3) { + pKernelMemorySystem->__kmemsysWriteL2PeermemInvalidateReg__(pGpu, pKernelMemorySystem, arg3); +} + +static inline NV_STATUS kmemsysInitFlushSysmemBuffer_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { + return pKernelMemorySystem->__kmemsysInitFlushSysmemBuffer__(pGpu, pKernelMemorySystem); +} + +static inline void kmemsysProgramSysmemFlushBuffer_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { + pKernelMemorySystem->__kmemsysProgramSysmemFlushBuffer__(pGpu, pKernelMemorySystem); +} + +static inline NvU32 kmemsysGetFlushSysmemBufferAddrShift_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { + return pKernelMemorySystem->__kmemsysGetFlushSysmemBufferAddrShift__(pGpu, pKernelMemorySystem); +} + +static inline NvBool kmemsysIsPagePLCable_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *KernelMemorySystem, NvU64 physAddr, NvU64 pageSize) { + return KernelMemorySystem->__kmemsysIsPagePLCable__(pGpu, KernelMemorySystem, physAddr, pageSize); +} + +static inline NV_STATUS kmemsysReadMIGMemoryCfg_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { + return pKernelMemorySystem->__kmemsysReadMIGMemoryCfg__(pGpu, pKernelMemorySystem); +} + +static inline NV_STATUS kmemsysInitMIGMemoryPartitionTable_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { + return pKernelMemorySystem->__kmemsysInitMIGMemoryPartitionTable__(pGpu, pKernelMemorySystem); +} + +static inline NV_STATUS kmemsysSwizzIdToVmmuSegmentsRange_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 swizzId, NvU32 vmmuSegmentSize, NvU32 totalVmmuSegments) { + return pKernelMemorySystem->__kmemsysSwizzIdToVmmuSegmentsRange__(pGpu, pKernelMemorySystem, swizzId, vmmuSegmentSize, totalVmmuSegments); +} + +static inline NV_STATUS kmemsysNumaAddMemory_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 swizzId, NvU64 offset, NvU64 size, NvS32 *numaNodeId) { + return pKernelMemorySystem->__kmemsysNumaAddMemory__(pGpu, pKernelMemorySystem, swizzId, offset, size, numaNodeId); +} + +static inline void kmemsysNumaRemoveMemory_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 swizzId) { + pKernelMemorySystem->__kmemsysNumaRemoveMemory__(pGpu, pKernelMemorySystem, swizzId); +} + +static inline void kmemsysNumaRemoveAllMemory_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { + pKernelMemorySystem->__kmemsysNumaRemoveAllMemory__(pGpu, pKernelMemorySystem); +} + +static inline NV_STATUS kmemsysPopulateMIGGPUInstanceMemConfig_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { + return pKernelMemorySystem->__kmemsysPopulateMIGGPUInstanceMemConfig__(pGpu, pKernelMemorySystem); +} + +static inline NV_STATUS kmemsysSetupAllAtsPeers_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { + return pKernelMemorySystem->__kmemsysSetupAllAtsPeers__(pGpu, pKernelMemorySystem); +} + +static inline void kmemsysRemoveAllAtsPeers_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { + pKernelMemorySystem->__kmemsysRemoveAllAtsPeers__(pGpu, pKernelMemorySystem); +} + +static inline NvBool kmemsysAssertFbAckTimeoutPending_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { + return pKernelMemorySystem->__kmemsysAssertFbAckTimeoutPending__(pGpu, pKernelMemorySystem); +} + +static inline NvU32 kmemsysGetMaxFbpas_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { + return pKernelMemorySystem->__kmemsysGetMaxFbpas__(pGpu, pKernelMemorySystem); +} + +static inline NvU32 kmemsysGetEccDedCountSize_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { + return pKernelMemorySystem->__kmemsysGetEccDedCountSize__(pGpu, pKernelMemorySystem); +} + +static inline NvU32 kmemsysGetEccDedCountRegAddr_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 fbpa, NvU32 subp) { + return pKernelMemorySystem->__kmemsysGetEccDedCountRegAddr__(pGpu, pKernelMemorySystem, fbpa, subp); +} + +static inline NvU16 kmemsysGetMaximumBlacklistPages_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { + return pKernelMemorySystem->__kmemsysGetMaximumBlacklistPages__(pGpu, pKernelMemorySystem); +} + +static inline NV_STATUS kmemsysGetFbInfos_DISPATCH(OBJGPU *arg1, struct KernelMemorySystem *arg_this, struct RsClient *arg3, Device *arg4, NvHandle hSubdevice, NV2080_CTRL_FB_GET_INFO_V2_PARAMS *pParams, NvU64 *pFbInfoListIndicesUnset) { + return arg_this->__kmemsysGetFbInfos__(arg1, arg_this, arg3, arg4, hSubdevice, pParams, pFbInfoListIndicesUnset); +} + +static inline void kmemsysInitMissing_DISPATCH(POBJGPU pGpu, struct KernelMemorySystem *pEngstate) { + pEngstate->__kmemsysInitMissing__(pGpu, pEngstate); +} + +static inline NV_STATUS kmemsysStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelMemorySystem *pEngstate) { + return pEngstate->__kmemsysStatePreInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kmemsysStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelMemorySystem *pEngstate) { + return pEngstate->__kmemsysStateInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kmemsysStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelMemorySystem *pEngstate, NvU32 arg3) { + return pEngstate->__kmemsysStatePostUnload__(pGpu, pEngstate, arg3); +} + +static inline NvBool kmemsysIsPresent_DISPATCH(POBJGPU pGpu, struct KernelMemorySystem *pEngstate) { + return pEngstate->__kmemsysIsPresent__(pGpu, pEngstate); +} + static inline void kmemsysAssertSysmemFlushBufferValid_b3696a(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { return; } @@ -409,39 +646,39 @@ static inline NV_STATUS kmemsysInitStaticConfig(OBJGPU *pGpu, struct KernelMemor #define kmemsysInitStaticConfig_HAL(pGpu, pKernelMemorySystem, pConfig) kmemsysInitStaticConfig(pGpu, pKernelMemorySystem, pConfig) -static inline NV_STATUS kmemsysPreFillCacheOnlyMemory_56cd7a(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 arg0, NvU64 arg1) { +static inline NV_STATUS kmemsysPreFillCacheOnlyMemory_56cd7a(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 arg3, NvU64 arg4) { return NV_OK; } -NV_STATUS kmemsysPreFillCacheOnlyMemory_GM107(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 arg0, NvU64 arg1); +NV_STATUS kmemsysPreFillCacheOnlyMemory_GM107(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 arg3, NvU64 arg4); #ifdef __nvoc_kern_mem_sys_h_disabled -static inline NV_STATUS kmemsysPreFillCacheOnlyMemory(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 arg0, NvU64 arg1) { +static inline NV_STATUS kmemsysPreFillCacheOnlyMemory(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 arg3, NvU64 arg4) { NV_ASSERT_FAILED_PRECOMP("KernelMemorySystem was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_mem_sys_h_disabled -#define kmemsysPreFillCacheOnlyMemory(pGpu, pKernelMemorySystem, arg0, arg1) kmemsysPreFillCacheOnlyMemory_56cd7a(pGpu, pKernelMemorySystem, arg0, arg1) +#define kmemsysPreFillCacheOnlyMemory(pGpu, pKernelMemorySystem, arg3, arg4) kmemsysPreFillCacheOnlyMemory_56cd7a(pGpu, pKernelMemorySystem, arg3, arg4) #endif //__nvoc_kern_mem_sys_h_disabled -#define kmemsysPreFillCacheOnlyMemory_HAL(pGpu, pKernelMemorySystem, arg0, arg1) kmemsysPreFillCacheOnlyMemory(pGpu, pKernelMemorySystem, arg0, arg1) +#define kmemsysPreFillCacheOnlyMemory_HAL(pGpu, pKernelMemorySystem, arg3, arg4) kmemsysPreFillCacheOnlyMemory(pGpu, pKernelMemorySystem, arg3, arg4) -static inline NV_STATUS kmemsysCheckDisplayRemapperRange_14278f(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 arg0, NvU64 arg1) { +static inline NV_STATUS kmemsysCheckDisplayRemapperRange_14278f(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 arg3, NvU64 arg4) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_INVALID_STATE); } #ifdef __nvoc_kern_mem_sys_h_disabled -static inline NV_STATUS kmemsysCheckDisplayRemapperRange(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 arg0, NvU64 arg1) { +static inline NV_STATUS kmemsysCheckDisplayRemapperRange(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 arg3, NvU64 arg4) { NV_ASSERT_FAILED_PRECOMP("KernelMemorySystem was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_mem_sys_h_disabled -#define kmemsysCheckDisplayRemapperRange(pGpu, pKernelMemorySystem, arg0, arg1) kmemsysCheckDisplayRemapperRange_14278f(pGpu, pKernelMemorySystem, arg0, arg1) +#define kmemsysCheckDisplayRemapperRange(pGpu, pKernelMemorySystem, arg3, arg4) kmemsysCheckDisplayRemapperRange_14278f(pGpu, pKernelMemorySystem, arg3, arg4) #endif //__nvoc_kern_mem_sys_h_disabled -#define kmemsysCheckDisplayRemapperRange_HAL(pGpu, pKernelMemorySystem, arg0, arg1) kmemsysCheckDisplayRemapperRange(pGpu, pKernelMemorySystem, arg0, arg1) +#define kmemsysCheckDisplayRemapperRange_HAL(pGpu, pKernelMemorySystem, arg3, arg4) kmemsysCheckDisplayRemapperRange(pGpu, pKernelMemorySystem, arg3, arg4) static inline void kmemsysPostHeapCreate_b3696a(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { return; @@ -473,19 +710,19 @@ static inline void kmemsysPreHeapDestruct(OBJGPU *pGpu, struct KernelMemorySyste #define kmemsysPreHeapDestruct_HAL(pGpu, pKernelMemorySystem) kmemsysPreHeapDestruct(pGpu, pKernelMemorySystem) -NV_STATUS kmemsysAllocComprResources_KERNEL(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, FB_ALLOC_INFO *arg0, NvU64 arg1, NvU32 arg2, NvU32 *arg3, NvU32 arg4); +NV_STATUS kmemsysAllocComprResources_KERNEL(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, FB_ALLOC_INFO *arg3, NvU64 arg4, NvU32 arg5, NvU32 *arg6, NvU32 arg7); #ifdef __nvoc_kern_mem_sys_h_disabled -static inline NV_STATUS kmemsysAllocComprResources(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, FB_ALLOC_INFO *arg0, NvU64 arg1, NvU32 arg2, NvU32 *arg3, NvU32 arg4) { +static inline NV_STATUS kmemsysAllocComprResources(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, FB_ALLOC_INFO *arg3, NvU64 arg4, NvU32 arg5, NvU32 *arg6, NvU32 arg7) { NV_ASSERT_FAILED_PRECOMP("KernelMemorySystem was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_mem_sys_h_disabled -#define kmemsysAllocComprResources(pGpu, pKernelMemorySystem, arg0, arg1, arg2, arg3, arg4) kmemsysAllocComprResources_KERNEL(pGpu, pKernelMemorySystem, arg0, arg1, arg2, arg3, arg4) +#define kmemsysAllocComprResources(pGpu, pKernelMemorySystem, arg3, arg4, arg5, arg6, arg7) kmemsysAllocComprResources_KERNEL(pGpu, pKernelMemorySystem, arg3, arg4, arg5, arg6, arg7) #endif //__nvoc_kern_mem_sys_h_disabled -#define kmemsysAllocComprResources_HAL(pGpu, pKernelMemorySystem, arg0, arg1, arg2, arg3, arg4) kmemsysAllocComprResources(pGpu, pKernelMemorySystem, arg0, arg1, arg2, arg3, arg4) +#define kmemsysAllocComprResources_HAL(pGpu, pKernelMemorySystem, arg3, arg4, arg5, arg6, arg7) kmemsysAllocComprResources(pGpu, pKernelMemorySystem, arg3, arg4, arg5, arg6, arg7) static inline void kmemsysFreeComprResources_b3696a(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 hwResId) { return; @@ -532,18 +769,32 @@ static inline NvBool kmemsysCbcIsSafe(OBJGPU *pGpu, struct KernelMemorySystem *p #define kmemsysCbcIsSafe_HAL(pGpu, pKernelMemorySystem) kmemsysCbcIsSafe(pGpu, pKernelMemorySystem) -void kmemsysGetEccCounts_TU102(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 *arg0, NvU32 *arg1); +void kmemsysGetEccCounts_TU102(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 *arg3, NvU32 *arg4); + + +#ifdef __nvoc_kern_mem_sys_h_disabled +static inline void kmemsysGetEccCounts(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 *arg3, NvU32 *arg4) { + NV_ASSERT_FAILED_PRECOMP("KernelMemorySystem was disabled!"); +} +#else //__nvoc_kern_mem_sys_h_disabled +#define kmemsysGetEccCounts(pGpu, pKernelMemorySystem, arg3, arg4) kmemsysGetEccCounts_TU102(pGpu, pKernelMemorySystem, arg3, arg4) +#endif //__nvoc_kern_mem_sys_h_disabled + +#define kmemsysGetEccCounts_HAL(pGpu, pKernelMemorySystem, arg3, arg4) kmemsysGetEccCounts(pGpu, pKernelMemorySystem, arg3, arg4) + +NvU32 kmemsysGetL2EccDedCountRegAddr_TU102(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 fbpa, NvU32 subp); #ifdef __nvoc_kern_mem_sys_h_disabled -static inline void kmemsysGetEccCounts(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 *arg0, NvU32 *arg1) { +static inline NvU32 kmemsysGetL2EccDedCountRegAddr(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 fbpa, NvU32 subp) { NV_ASSERT_FAILED_PRECOMP("KernelMemorySystem was disabled!"); + return 0; } #else //__nvoc_kern_mem_sys_h_disabled -#define kmemsysGetEccCounts(pGpu, pKernelMemorySystem, arg0, arg1) kmemsysGetEccCounts_TU102(pGpu, pKernelMemorySystem, arg0, arg1) +#define kmemsysGetL2EccDedCountRegAddr(pGpu, pKernelMemorySystem, fbpa, subp) kmemsysGetL2EccDedCountRegAddr_TU102(pGpu, pKernelMemorySystem, fbpa, subp) #endif //__nvoc_kern_mem_sys_h_disabled -#define kmemsysGetEccCounts_HAL(pGpu, pKernelMemorySystem, arg0, arg1) kmemsysGetEccCounts(pGpu, pKernelMemorySystem, arg0, arg1) +#define kmemsysGetL2EccDedCountRegAddr_HAL(pGpu, pKernelMemorySystem, fbpa, subp) kmemsysGetL2EccDedCountRegAddr(pGpu, pKernelMemorySystem, fbpa, subp) static inline NV_STATUS kmemsysPrepareForXVEReset_56cd7a(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { return NV_OK; @@ -561,105 +812,47 @@ static inline NV_STATUS kmemsysPrepareForXVEReset(OBJGPU *pGpu, struct KernelMem #define kmemsysPrepareForXVEReset_HAL(pGpu, pKernelMemorySystem) kmemsysPrepareForXVEReset(pGpu, pKernelMemorySystem) -NV_STATUS kmemsysConstructEngine_IMPL(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, ENGDESCRIPTOR arg0); +NV_STATUS kmemsysConstructEngine_IMPL(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, ENGDESCRIPTOR arg3); -static inline NV_STATUS kmemsysConstructEngine_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, ENGDESCRIPTOR arg0) { - return pKernelMemorySystem->__kmemsysConstructEngine__(pGpu, pKernelMemorySystem, arg0); -} +NV_STATUS kmemsysStatePreInitLocked_IMPL(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); NV_STATUS kmemsysStateInitLocked_IMPL(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); -static inline NV_STATUS kmemsysStateInitLocked_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - return pKernelMemorySystem->__kmemsysStateInitLocked__(pGpu, pKernelMemorySystem); -} - NV_STATUS kmemsysStatePreLoad_IMPL(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags); -static inline NV_STATUS kmemsysStatePreLoad_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags) { - return pKernelMemorySystem->__kmemsysStatePreLoad__(pGpu, pKernelMemorySystem, flags); -} - NV_STATUS kmemsysStatePostLoad_IMPL(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags); -static inline NV_STATUS kmemsysStatePostLoad_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags) { - return pKernelMemorySystem->__kmemsysStatePostLoad__(pGpu, pKernelMemorySystem, flags); -} - -NV_STATUS kmemsysStateLoad_VF(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags); - -static inline NV_STATUS kmemsysStateLoad_ac1694(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags) { - return NV_OK; -} - -static inline NV_STATUS kmemsysStateLoad_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags) { - return pKernelMemorySystem->__kmemsysStateLoad__(pGpu, pKernelMemorySystem, flags); -} +NV_STATUS kmemsysStateLoad_IMPL(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags); NV_STATUS kmemsysStatePreUnload_IMPL(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags); -static inline NV_STATUS kmemsysStatePreUnload_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags) { - return pKernelMemorySystem->__kmemsysStatePreUnload__(pGpu, pKernelMemorySystem, flags); -} - -NV_STATUS kmemsysStateUnload_VF(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags); - -static inline NV_STATUS kmemsysStateUnload_ac1694(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags) { - return NV_OK; -} - -static inline NV_STATUS kmemsysStateUnload_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags) { - return pKernelMemorySystem->__kmemsysStateUnload__(pGpu, pKernelMemorySystem, flags); -} +NV_STATUS kmemsysStateUnload_IMPL(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags); void kmemsysStateDestroy_IMPL(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); -static inline void kmemsysStateDestroy_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - pKernelMemorySystem->__kmemsysStateDestroy__(pGpu, pKernelMemorySystem); -} - NV_STATUS kmemsysGetFbNumaInfo_GV100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *physAddr, NvU64 *rsvdPhysAddr, NvS32 *numaNodeId); static inline NV_STATUS kmemsysGetFbNumaInfo_56cd7a(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *physAddr, NvU64 *rsvdPhysAddr, NvS32 *numaNodeId) { return NV_OK; } -static inline NV_STATUS kmemsysGetFbNumaInfo_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *physAddr, NvU64 *rsvdPhysAddr, NvS32 *numaNodeId) { - return pKernelMemorySystem->__kmemsysGetFbNumaInfo__(pGpu, pKernelMemorySystem, physAddr, rsvdPhysAddr, numaNodeId); -} - NV_STATUS kmemsysReadUsableFbSize_GP102(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *pFbSize); NV_STATUS kmemsysReadUsableFbSize_GA102(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *pFbSize); -static inline NV_STATUS kmemsysReadUsableFbSize_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *pFbSize) { - return pKernelMemorySystem->__kmemsysReadUsableFbSize__(pGpu, pKernelMemorySystem, pFbSize); -} - NV_STATUS kmemsysGetUsableFbSize_KERNEL(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *pFbSize); static inline NV_STATUS kmemsysGetUsableFbSize_5baef9(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *pFbSize) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NV_STATUS kmemsysGetUsableFbSize_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *pFbSize) { - return pKernelMemorySystem->__kmemsysGetUsableFbSize__(pGpu, pKernelMemorySystem, pFbSize); -} - -NV_STATUS kmemsysCacheOp_GM200(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, PMEMORY_DESCRIPTOR arg0, FB_CACHE_MEMTYPE arg1, FB_CACHE_OP operation); - -NV_STATUS kmemsysCacheOp_GH100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, PMEMORY_DESCRIPTOR arg0, FB_CACHE_MEMTYPE arg1, FB_CACHE_OP operation); - -static inline NV_STATUS kmemsysCacheOp_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, PMEMORY_DESCRIPTOR arg0, FB_CACHE_MEMTYPE arg1, FB_CACHE_OP operation) { - return pKernelMemorySystem->__kmemsysCacheOp__(pGpu, pKernelMemorySystem, arg0, arg1, operation); -} +NV_STATUS kmemsysCacheOp_GM200(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, PMEMORY_DESCRIPTOR arg3, FB_CACHE_MEMTYPE arg4, FB_CACHE_OP operation); -NV_STATUS kmemsysDoCacheOp_GM107(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 arg0, NvU32 arg1, NvU32 arg2, PRMTIMEOUT arg3); +NV_STATUS kmemsysCacheOp_GH100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, PMEMORY_DESCRIPTOR arg3, FB_CACHE_MEMTYPE arg4, FB_CACHE_OP operation); -NV_STATUS kmemsysDoCacheOp_GH100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 arg0, NvU32 arg1, NvU32 arg2, PRMTIMEOUT arg3); +NV_STATUS kmemsysDoCacheOp_GM107(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 arg3, NvU32 arg4, NvU32 arg5, PRMTIMEOUT arg6); -static inline NV_STATUS kmemsysDoCacheOp_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 arg0, NvU32 arg1, NvU32 arg2, PRMTIMEOUT arg3) { - return pKernelMemorySystem->__kmemsysDoCacheOp__(pGpu, pKernelMemorySystem, arg0, arg1, arg2, arg3); -} +NV_STATUS kmemsysDoCacheOp_GH100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 arg3, NvU32 arg4, NvU32 arg5, PRMTIMEOUT arg6); NvU32 kmemsysReadL2SysmemInvalidateReg_TU102(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); @@ -667,40 +860,24 @@ static inline NvU32 kmemsysReadL2SysmemInvalidateReg_68b109(OBJGPU *pGpu, struct NV_ASSERT_OR_RETURN_PRECOMP(0, -1); } -static inline NvU32 kmemsysReadL2SysmemInvalidateReg_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - return pKernelMemorySystem->__kmemsysReadL2SysmemInvalidateReg__(pGpu, pKernelMemorySystem); -} +void kmemsysWriteL2SysmemInvalidateReg_TU102(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 arg3); -void kmemsysWriteL2SysmemInvalidateReg_TU102(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 arg0); - -static inline void kmemsysWriteL2SysmemInvalidateReg_f2d351(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 arg0) { +static inline void kmemsysWriteL2SysmemInvalidateReg_f2d351(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 arg3) { NV_ASSERT_PRECOMP(0); } -static inline void kmemsysWriteL2SysmemInvalidateReg_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 arg0) { - pKernelMemorySystem->__kmemsysWriteL2SysmemInvalidateReg__(pGpu, pKernelMemorySystem, arg0); -} - NvU32 kmemsysReadL2PeermemInvalidateReg_TU102(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); static inline NvU32 kmemsysReadL2PeermemInvalidateReg_68b109(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { NV_ASSERT_OR_RETURN_PRECOMP(0, -1); } -static inline NvU32 kmemsysReadL2PeermemInvalidateReg_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - return pKernelMemorySystem->__kmemsysReadL2PeermemInvalidateReg__(pGpu, pKernelMemorySystem); -} - -void kmemsysWriteL2PeermemInvalidateReg_TU102(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 arg0); +void kmemsysWriteL2PeermemInvalidateReg_TU102(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 arg3); -static inline void kmemsysWriteL2PeermemInvalidateReg_f2d351(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 arg0) { +static inline void kmemsysWriteL2PeermemInvalidateReg_f2d351(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 arg3) { NV_ASSERT_PRECOMP(0); } -static inline void kmemsysWriteL2PeermemInvalidateReg_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 arg0) { - pKernelMemorySystem->__kmemsysWriteL2PeermemInvalidateReg__(pGpu, pKernelMemorySystem, arg0); -} - static inline NV_STATUS kmemsysInitFlushSysmemBuffer_56cd7a(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { return NV_OK; } @@ -709,10 +886,6 @@ NV_STATUS kmemsysInitFlushSysmemBuffer_GM107(OBJGPU *pGpu, struct KernelMemorySy NV_STATUS kmemsysInitFlushSysmemBuffer_GA100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); -static inline NV_STATUS kmemsysInitFlushSysmemBuffer_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - return pKernelMemorySystem->__kmemsysInitFlushSysmemBuffer__(pGpu, pKernelMemorySystem); -} - static inline void kmemsysProgramSysmemFlushBuffer_b3696a(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { return; } @@ -723,20 +896,12 @@ void kmemsysProgramSysmemFlushBuffer_GA100(OBJGPU *pGpu, struct KernelMemorySyst void kmemsysProgramSysmemFlushBuffer_GH100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); -static inline void kmemsysProgramSysmemFlushBuffer_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - pKernelMemorySystem->__kmemsysProgramSysmemFlushBuffer__(pGpu, pKernelMemorySystem); -} - static inline NvU32 kmemsysGetFlushSysmemBufferAddrShift_4a4dee(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { return 0; } NvU32 kmemsysGetFlushSysmemBufferAddrShift_GM107(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); -static inline NvU32 kmemsysGetFlushSysmemBufferAddrShift_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - return pKernelMemorySystem->__kmemsysGetFlushSysmemBufferAddrShift__(pGpu, pKernelMemorySystem); -} - static inline NvBool kmemsysIsPagePLCable_cbe027(OBJGPU *pGpu, struct KernelMemorySystem *KernelMemorySystem, NvU64 physAddr, NvU64 pageSize) { return ((NvBool)(0 == 0)); } @@ -749,108 +914,64 @@ static inline NvBool kmemsysIsPagePLCable_510167(OBJGPU *pGpu, struct KernelMemo NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 == 0))); } -static inline NvBool kmemsysIsPagePLCable_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *KernelMemorySystem, NvU64 physAddr, NvU64 pageSize) { - return KernelMemorySystem->__kmemsysIsPagePLCable__(pGpu, KernelMemorySystem, physAddr, pageSize); -} - static inline NV_STATUS kmemsysReadMIGMemoryCfg_46f6a7(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { return NV_ERR_NOT_SUPPORTED; } NV_STATUS kmemsysReadMIGMemoryCfg_GA100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); -static inline NV_STATUS kmemsysReadMIGMemoryCfg_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - return pKernelMemorySystem->__kmemsysReadMIGMemoryCfg__(pGpu, pKernelMemorySystem); -} - static inline NV_STATUS kmemsysInitMIGMemoryPartitionTable_56cd7a(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { return NV_OK; } NV_STATUS kmemsysInitMIGMemoryPartitionTable_GA100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); -static inline NV_STATUS kmemsysInitMIGMemoryPartitionTable_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - return pKernelMemorySystem->__kmemsysInitMIGMemoryPartitionTable__(pGpu, pKernelMemorySystem); -} - NV_STATUS kmemsysSwizzIdToVmmuSegmentsRange_GA100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 swizzId, NvU32 vmmuSegmentSize, NvU32 totalVmmuSegments); NV_STATUS kmemsysSwizzIdToVmmuSegmentsRange_GH100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 swizzId, NvU32 vmmuSegmentSize, NvU32 totalVmmuSegments); -static inline NV_STATUS kmemsysSwizzIdToVmmuSegmentsRange_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 swizzId, NvU32 vmmuSegmentSize, NvU32 totalVmmuSegments) { - return pKernelMemorySystem->__kmemsysSwizzIdToVmmuSegmentsRange__(pGpu, pKernelMemorySystem, swizzId, vmmuSegmentSize, totalVmmuSegments); -} - NV_STATUS kmemsysNumaAddMemory_GH100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 swizzId, NvU64 offset, NvU64 size, NvS32 *numaNodeId); static inline NV_STATUS kmemsysNumaAddMemory_56cd7a(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 swizzId, NvU64 offset, NvU64 size, NvS32 *numaNodeId) { return NV_OK; } -static inline NV_STATUS kmemsysNumaAddMemory_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 swizzId, NvU64 offset, NvU64 size, NvS32 *numaNodeId) { - return pKernelMemorySystem->__kmemsysNumaAddMemory__(pGpu, pKernelMemorySystem, swizzId, offset, size, numaNodeId); -} - void kmemsysNumaRemoveMemory_GH100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 swizzId); static inline void kmemsysNumaRemoveMemory_b3696a(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 swizzId) { return; } -static inline void kmemsysNumaRemoveMemory_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 swizzId) { - pKernelMemorySystem->__kmemsysNumaRemoveMemory__(pGpu, pKernelMemorySystem, swizzId); -} - void kmemsysNumaRemoveAllMemory_GH100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); static inline void kmemsysNumaRemoveAllMemory_b3696a(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { return; } -static inline void kmemsysNumaRemoveAllMemory_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - pKernelMemorySystem->__kmemsysNumaRemoveAllMemory__(pGpu, pKernelMemorySystem); -} - static inline NV_STATUS kmemsysPopulateMIGGPUInstanceMemConfig_56cd7a(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { return NV_OK; } NV_STATUS kmemsysPopulateMIGGPUInstanceMemConfig_KERNEL(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); -static inline NV_STATUS kmemsysPopulateMIGGPUInstanceMemConfig_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - return pKernelMemorySystem->__kmemsysPopulateMIGGPUInstanceMemConfig__(pGpu, pKernelMemorySystem); -} - static inline NV_STATUS kmemsysSetupAllAtsPeers_46f6a7(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { return NV_ERR_NOT_SUPPORTED; } NV_STATUS kmemsysSetupAllAtsPeers_GV100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); -static inline NV_STATUS kmemsysSetupAllAtsPeers_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - return pKernelMemorySystem->__kmemsysSetupAllAtsPeers__(pGpu, pKernelMemorySystem); -} - static inline void kmemsysRemoveAllAtsPeers_b3696a(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { return; } void kmemsysRemoveAllAtsPeers_GV100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); -static inline void kmemsysRemoveAllAtsPeers_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - pKernelMemorySystem->__kmemsysRemoveAllAtsPeers__(pGpu, pKernelMemorySystem); -} - NvBool kmemsysAssertFbAckTimeoutPending_GH100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); static inline NvBool kmemsysAssertFbAckTimeoutPending_491d52(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { return ((NvBool)(0 != 0)); } -static inline NvBool kmemsysAssertFbAckTimeoutPending_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - return pKernelMemorySystem->__kmemsysAssertFbAckTimeoutPending__(pGpu, pKernelMemorySystem); -} - NvU32 kmemsysGetMaxFbpas_TU102(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); NvU32 kmemsysGetMaxFbpas_GA100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); @@ -859,67 +980,23 @@ static inline NvU32 kmemsysGetMaxFbpas_4a4dee(OBJGPU *pGpu, struct KernelMemoryS return 0; } -static inline NvU32 kmemsysGetMaxFbpas_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - return pKernelMemorySystem->__kmemsysGetMaxFbpas__(pGpu, pKernelMemorySystem); -} - NvU32 kmemsysGetEccDedCountSize_TU102(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); NvU32 kmemsysGetEccDedCountSize_GH100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); -static inline NvU32 kmemsysGetEccDedCountSize_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - return pKernelMemorySystem->__kmemsysGetEccDedCountSize__(pGpu, pKernelMemorySystem); -} - NvU32 kmemsysGetEccDedCountRegAddr_TU102(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 fbpa, NvU32 subp); NvU32 kmemsysGetEccDedCountRegAddr_GH100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 fbpa, NvU32 subp); -static inline NvU32 kmemsysGetEccDedCountRegAddr_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 fbpa, NvU32 subp) { - return pKernelMemorySystem->__kmemsysGetEccDedCountRegAddr__(pGpu, pKernelMemorySystem, fbpa, subp); -} - NvU16 kmemsysGetMaximumBlacklistPages_GM107(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); NvU16 kmemsysGetMaximumBlacklistPages_GA100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); -static inline NvU16 kmemsysGetMaximumBlacklistPages_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - return pKernelMemorySystem->__kmemsysGetMaximumBlacklistPages__(pGpu, pKernelMemorySystem); -} - -static inline NV_STATUS kmemsysGetFbInfos_ac1694(OBJGPU *arg0, struct KernelMemorySystem *arg1, struct RsClient *arg2, Device *arg3, NvHandle hSubdevice, NV2080_CTRL_FB_GET_INFO_V2_PARAMS *pParams, NvU64 *pFbInfoListIndicesUnset) { +static inline NV_STATUS kmemsysGetFbInfos_ac1694(OBJGPU *arg1, struct KernelMemorySystem *arg2, struct RsClient *arg3, Device *arg4, NvHandle hSubdevice, NV2080_CTRL_FB_GET_INFO_V2_PARAMS *pParams, NvU64 *pFbInfoListIndicesUnset) { return NV_OK; } -NV_STATUS kmemsysGetFbInfos_VF(OBJGPU *arg0, struct KernelMemorySystem *arg1, struct RsClient *arg2, Device *arg3, NvHandle hSubdevice, NV2080_CTRL_FB_GET_INFO_V2_PARAMS *pParams, NvU64 *pFbInfoListIndicesUnset); - -static inline NV_STATUS kmemsysGetFbInfos_DISPATCH(OBJGPU *arg0, struct KernelMemorySystem *arg1, struct RsClient *arg2, Device *arg3, NvHandle hSubdevice, NV2080_CTRL_FB_GET_INFO_V2_PARAMS *pParams, NvU64 *pFbInfoListIndicesUnset) { - return arg1->__kmemsysGetFbInfos__(arg0, arg1, arg2, arg3, hSubdevice, pParams, pFbInfoListIndicesUnset); -} - -static inline NV_STATUS kmemsysStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelMemorySystem *pEngstate, NvU32 arg0) { - return pEngstate->__kmemsysStatePostUnload__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS kmemsysStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelMemorySystem *pEngstate) { - return pEngstate->__kmemsysStateInitUnlocked__(pGpu, pEngstate); -} - -static inline void kmemsysInitMissing_DISPATCH(POBJGPU pGpu, struct KernelMemorySystem *pEngstate) { - pEngstate->__kmemsysInitMissing__(pGpu, pEngstate); -} - -static inline NV_STATUS kmemsysStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelMemorySystem *pEngstate) { - return pEngstate->__kmemsysStatePreInitLocked__(pGpu, pEngstate); -} - -static inline NV_STATUS kmemsysStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelMemorySystem *pEngstate) { - return pEngstate->__kmemsysStatePreInitUnlocked__(pGpu, pEngstate); -} - -static inline NvBool kmemsysIsPresent_DISPATCH(POBJGPU pGpu, struct KernelMemorySystem *pEngstate) { - return pEngstate->__kmemsysIsPresent__(pGpu, pEngstate); -} +NV_STATUS kmemsysGetFbInfos_VF(OBJGPU *arg1, struct KernelMemorySystem *arg2, struct RsClient *arg3, Device *arg4, NvHandle hSubdevice, NV2080_CTRL_FB_GET_INFO_V2_PARAMS *pParams, NvU64 *pFbInfoListIndicesUnset); static inline NvBool kmemsysIsL2CleanFbPull(struct KernelMemorySystem *pKernelMemorySystem) { return pKernelMemorySystem->bL2CleanFbPull; @@ -1026,26 +1103,26 @@ static inline NV_STATUS kmemsysGetMIGGPUInstanceMemInfo(OBJGPU *pGpu, struct Ker #define kmemsysGetMIGGPUInstanceMemInfo(pGpu, pKernelMemorySystem, swizzId, pAddrRange) kmemsysGetMIGGPUInstanceMemInfo_IMPL(pGpu, pKernelMemorySystem, swizzId, pAddrRange) #endif //__nvoc_kern_mem_sys_h_disabled -NV_STATUS kmemsysGetMIGGPUInstanceMemConfigFromSwizzId_IMPL(OBJGPU *arg0, struct KernelMemorySystem *arg1, NvU32 swizzId, const MIG_GPU_INSTANCE_MEMORY_CONFIG **arg2); +NV_STATUS kmemsysGetMIGGPUInstanceMemConfigFromSwizzId_IMPL(OBJGPU *arg1, struct KernelMemorySystem *arg2, NvU32 swizzId, const MIG_GPU_INSTANCE_MEMORY_CONFIG **arg4); #ifdef __nvoc_kern_mem_sys_h_disabled -static inline NV_STATUS kmemsysGetMIGGPUInstanceMemConfigFromSwizzId(OBJGPU *arg0, struct KernelMemorySystem *arg1, NvU32 swizzId, const MIG_GPU_INSTANCE_MEMORY_CONFIG **arg2) { +static inline NV_STATUS kmemsysGetMIGGPUInstanceMemConfigFromSwizzId(OBJGPU *arg1, struct KernelMemorySystem *arg2, NvU32 swizzId, const MIG_GPU_INSTANCE_MEMORY_CONFIG **arg4) { NV_ASSERT_FAILED_PRECOMP("KernelMemorySystem was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_mem_sys_h_disabled -#define kmemsysGetMIGGPUInstanceMemConfigFromSwizzId(arg0, arg1, swizzId, arg2) kmemsysGetMIGGPUInstanceMemConfigFromSwizzId_IMPL(arg0, arg1, swizzId, arg2) +#define kmemsysGetMIGGPUInstanceMemConfigFromSwizzId(arg1, arg2, swizzId, arg4) kmemsysGetMIGGPUInstanceMemConfigFromSwizzId_IMPL(arg1, arg2, swizzId, arg4) #endif //__nvoc_kern_mem_sys_h_disabled -NV_STATUS kmemsysInitMIGGPUInstanceMemConfigForSwizzId_IMPL(OBJGPU *arg0, struct KernelMemorySystem *arg1, NvU32 swizzId, NvU64 startingVmmuSegment, NvU64 memSizeInVmmuSegment); +NV_STATUS kmemsysInitMIGGPUInstanceMemConfigForSwizzId_IMPL(OBJGPU *arg1, struct KernelMemorySystem *arg2, NvU32 swizzId, NvU64 startingVmmuSegment, NvU64 memSizeInVmmuSegment); #ifdef __nvoc_kern_mem_sys_h_disabled -static inline NV_STATUS kmemsysInitMIGGPUInstanceMemConfigForSwizzId(OBJGPU *arg0, struct KernelMemorySystem *arg1, NvU32 swizzId, NvU64 startingVmmuSegment, NvU64 memSizeInVmmuSegment) { +static inline NV_STATUS kmemsysInitMIGGPUInstanceMemConfigForSwizzId(OBJGPU *arg1, struct KernelMemorySystem *arg2, NvU32 swizzId, NvU64 startingVmmuSegment, NvU64 memSizeInVmmuSegment) { NV_ASSERT_FAILED_PRECOMP("KernelMemorySystem was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_mem_sys_h_disabled -#define kmemsysInitMIGGPUInstanceMemConfigForSwizzId(arg0, arg1, swizzId, startingVmmuSegment, memSizeInVmmuSegment) kmemsysInitMIGGPUInstanceMemConfigForSwizzId_IMPL(arg0, arg1, swizzId, startingVmmuSegment, memSizeInVmmuSegment) +#define kmemsysInitMIGGPUInstanceMemConfigForSwizzId(arg1, arg2, swizzId, startingVmmuSegment, memSizeInVmmuSegment) kmemsysInitMIGGPUInstanceMemConfigForSwizzId_IMPL(arg1, arg2, swizzId, startingVmmuSegment, memSizeInVmmuSegment) #endif //__nvoc_kern_mem_sys_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_kern_perf_nvoc.c b/src/nvidia/generated/g_kern_perf_nvoc.c index d6168ad633..12b5a37b38 100644 --- a/src/nvidia/generated/g_kern_perf_nvoc.c +++ b/src/nvidia/generated/g_kern_perf_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelPerf = /*pExportInfo=*/ &__nvoc_export_info_KernelPerf }; -static NV_STATUS __nvoc_thunk_KernelPerf_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf, ENGDESCRIPTOR engDesc) { - return kperfConstructEngine(pGpu, (struct KernelPerf *)(((unsigned char *)pKernelPerf) - __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), engDesc); +// 5 down-thunk(s) defined to bridge methods in KernelPerf from superclasses + +// kperfConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelPerf_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf, ENGDESCRIPTOR engDesc) { + return kperfConstructEngine(pGpu, (struct KernelPerf *)(((unsigned char *) pKernelPerf) - __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), engDesc); } -static NV_STATUS __nvoc_thunk_KernelPerf_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf) { - return kperfStateInitLocked(pGpu, (struct KernelPerf *)(((unsigned char *)pKernelPerf) - __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); +// kperfStateInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelPerf_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf) { + return kperfStateInitLocked(pGpu, (struct KernelPerf *)(((unsigned char *) pKernelPerf) - __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_KernelPerf_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf, NvU32 flags) { - return kperfStateLoad(pGpu, (struct KernelPerf *)(((unsigned char *)pKernelPerf) - __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), flags); +// kperfStateLoad: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelPerf_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf, NvU32 flags) { + return kperfStateLoad(pGpu, (struct KernelPerf *)(((unsigned char *) pKernelPerf) - __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), flags); } -static NV_STATUS __nvoc_thunk_KernelPerf_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf, NvU32 flags) { - return kperfStateUnload(pGpu, (struct KernelPerf *)(((unsigned char *)pKernelPerf) - __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), flags); +// kperfStateUnload: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelPerf_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf, NvU32 flags) { + return kperfStateUnload(pGpu, (struct KernelPerf *)(((unsigned char *) pKernelPerf) - __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), flags); } -static void __nvoc_thunk_KernelPerf_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf) { - kperfStateDestroy(pGpu, (struct KernelPerf *)(((unsigned char *)pKernelPerf) - __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); +// kperfStateDestroy: virtual override (engstate) base (engstate) +static void __nvoc_down_thunk_KernelPerf_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf) { + kperfStateDestroy(pGpu, (struct KernelPerf *)(((unsigned char *) pKernelPerf) - __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kperfStatePreLoad(POBJGPU pGpu, struct KernelPerf *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), arg0); + +// 9 up-thunk(s) defined to bridge methods in KernelPerf to superclasses + +// kperfInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kperfInitMissing(POBJGPU pGpu, struct KernelPerf *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kperfStatePostUnload(POBJGPU pGpu, struct KernelPerf *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), arg0); +// kperfStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePreInitLocked(POBJGPU pGpu, struct KernelPerf *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kperfStatePreUnload(POBJGPU pGpu, struct KernelPerf *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), arg0); +// kperfStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePreInitUnlocked(POBJGPU pGpu, struct KernelPerf *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kperfStateInitUnlocked(POBJGPU pGpu, struct KernelPerf *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); +// kperfStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStateInitUnlocked(POBJGPU pGpu, struct KernelPerf *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_kperfInitMissing(POBJGPU pGpu, struct KernelPerf *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); +// kperfStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePreLoad(POBJGPU pGpu, struct KernelPerf *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kperfStatePreInitLocked(POBJGPU pGpu, struct KernelPerf *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); +// kperfStatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePostLoad(POBJGPU pGpu, struct KernelPerf *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kperfStatePreInitUnlocked(POBJGPU pGpu, struct KernelPerf *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); +// kperfStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePreUnload(POBJGPU pGpu, struct KernelPerf *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kperfStatePostLoad(POBJGPU pGpu, struct KernelPerf *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), arg0); +// kperfStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePostUnload(POBJGPU pGpu, struct KernelPerf *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), arg3); } -static NvBool __nvoc_thunk_OBJENGSTATE_kperfIsPresent(POBJGPU pGpu, struct KernelPerf *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); +// kperfIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_kperfIsPresent(POBJGPU pGpu, struct KernelPerf *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelPerf = { /*numEntries=*/ 0, @@ -157,6 +177,7 @@ NV_STATUS __nvoc_ctor_KernelPerf(KernelPerf *pThis, RmHalspecOwner *pRmhalspecow return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelPerf_1(KernelPerf *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -165,17 +186,27 @@ static void __nvoc_init_funcTable_KernelPerf_1(KernelPerf *pThis, RmHalspecOwner PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); + // kperfConstructEngine -- virtual override (engstate) base (engstate) pThis->__kperfConstructEngine__ = &kperfConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelPerf_engstateConstructEngine; + // kperfStateInitLocked -- virtual override (engstate) base (engstate) pThis->__kperfStateInitLocked__ = &kperfStateInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelPerf_engstateStateInitLocked; + // kperfStateLoad -- virtual override (engstate) base (engstate) pThis->__kperfStateLoad__ = &kperfStateLoad_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelPerf_engstateStateLoad; + // kperfStateUnload -- virtual override (engstate) base (engstate) pThis->__kperfStateUnload__ = &kperfStateUnload_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelPerf_engstateStateUnload; + // kperfStateDestroy -- virtual override (engstate) base (engstate) pThis->__kperfStateDestroy__ = &kperfStateDestroy_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelPerf_engstateStateDestroy; - // Hal function -- kperfGpuBoostSyncStateInit + // kperfGpuBoostSyncStateInit -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kperfGpuBoostSyncStateInit__ = &kperfGpuBoostSyncStateInit_56cd7a; @@ -186,36 +217,39 @@ static void __nvoc_init_funcTable_KernelPerf_1(KernelPerf *pThis, RmHalspecOwner pThis->__kperfGpuBoostSyncStateInit__ = &kperfGpuBoostSyncStateInit_IMPL; } - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelPerf_engstateConstructEngine; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_thunk_KernelPerf_engstateStateInitLocked; + // kperfInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__kperfInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kperfInitMissing; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_thunk_KernelPerf_engstateStateLoad; + // kperfStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__kperfStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStatePreInitLocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_thunk_KernelPerf_engstateStateUnload; + // kperfStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kperfStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStatePreInitUnlocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_thunk_KernelPerf_engstateStateDestroy; + // kperfStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kperfStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStateInitUnlocked; - pThis->__kperfStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_kperfStatePreLoad; + // kperfStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__kperfStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStatePreLoad; - pThis->__kperfStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_kperfStatePostUnload; + // kperfStatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__kperfStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStatePostLoad; - pThis->__kperfStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_kperfStatePreUnload; + // kperfStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__kperfStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStatePreUnload; - pThis->__kperfStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kperfStateInitUnlocked; + // kperfStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__kperfStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStatePostUnload; - pThis->__kperfInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kperfInitMissing; + // kperfIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__kperfIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kperfIsPresent; +} // End __nvoc_init_funcTable_KernelPerf_1 with approximately 21 basic block(s). - pThis->__kperfStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kperfStatePreInitLocked; - - pThis->__kperfStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kperfStatePreInitUnlocked; - - pThis->__kperfStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_kperfStatePostLoad; - - pThis->__kperfIsPresent__ = &__nvoc_thunk_OBJENGSTATE_kperfIsPresent; -} +// Initialize vtable(s) for 15 virtual method(s). void __nvoc_init_funcTable_KernelPerf(KernelPerf *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 15 per-object function pointer(s). __nvoc_init_funcTable_KernelPerf_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kern_perf_nvoc.h b/src/nvidia/generated/g_kern_perf_nvoc.h index 7e9e75d82e..66b2eeb778 100644 --- a/src/nvidia/generated/g_kern_perf_nvoc.h +++ b/src/nvidia/generated/g_kern_perf_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERN_PERF_NVOC_H_ #define _G_KERN_PERF_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kern_perf_nvoc.h" #ifndef KERNEL_PERF_H @@ -71,27 +79,38 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelPerf { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct KernelPerf *__nvoc_pbase_KernelPerf; - NV_STATUS (*__kperfConstructEngine__)(struct OBJGPU *, struct KernelPerf *, ENGDESCRIPTOR); - NV_STATUS (*__kperfStateInitLocked__)(struct OBJGPU *, struct KernelPerf *); - NV_STATUS (*__kperfStateLoad__)(struct OBJGPU *, struct KernelPerf *, NvU32); - NV_STATUS (*__kperfStateUnload__)(struct OBJGPU *, struct KernelPerf *, NvU32); - void (*__kperfStateDestroy__)(struct OBJGPU *, struct KernelPerf *); - NV_STATUS (*__kperfGpuBoostSyncStateInit__)(struct OBJGPU *, struct KernelPerf *); - NV_STATUS (*__kperfStatePreLoad__)(POBJGPU, struct KernelPerf *, NvU32); - NV_STATUS (*__kperfStatePostUnload__)(POBJGPU, struct KernelPerf *, NvU32); - NV_STATUS (*__kperfStatePreUnload__)(POBJGPU, struct KernelPerf *, NvU32); - NV_STATUS (*__kperfStateInitUnlocked__)(POBJGPU, struct KernelPerf *); - void (*__kperfInitMissing__)(POBJGPU, struct KernelPerf *); - NV_STATUS (*__kperfStatePreInitLocked__)(POBJGPU, struct KernelPerf *); - NV_STATUS (*__kperfStatePreInitUnlocked__)(POBJGPU, struct KernelPerf *); - NV_STATUS (*__kperfStatePostLoad__)(POBJGPU, struct KernelPerf *, NvU32); - NvBool (*__kperfIsPresent__)(POBJGPU, struct KernelPerf *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct KernelPerf *__nvoc_pbase_KernelPerf; // kperf + + // Vtable with 15 per-object function pointers + NV_STATUS (*__kperfConstructEngine__)(struct OBJGPU *, struct KernelPerf * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kperfStateInitLocked__)(struct OBJGPU *, struct KernelPerf * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kperfStateLoad__)(struct OBJGPU *, struct KernelPerf * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kperfStateUnload__)(struct OBJGPU *, struct KernelPerf * /*this*/, NvU32); // virtual override (engstate) base (engstate) + void (*__kperfStateDestroy__)(struct OBJGPU *, struct KernelPerf * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kperfGpuBoostSyncStateInit__)(struct OBJGPU *, struct KernelPerf * /*this*/); // halified (2 hals) body + void (*__kperfInitMissing__)(POBJGPU, struct KernelPerf * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kperfStatePreInitLocked__)(POBJGPU, struct KernelPerf * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kperfStatePreInitUnlocked__)(POBJGPU, struct KernelPerf * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kperfStateInitUnlocked__)(POBJGPU, struct KernelPerf * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kperfStatePreLoad__)(POBJGPU, struct KernelPerf * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kperfStatePostLoad__)(POBJGPU, struct KernelPerf * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kperfStatePreUnload__)(POBJGPU, struct KernelPerf * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kperfStatePostUnload__)(POBJGPU, struct KernelPerf * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__kperfIsPresent__)(POBJGPU, struct KernelPerf * /*this*/); // virtual inherited (engstate) base (engstate) + + // Data members struct KERNEL_PERF_GPU_BOOST_SYNC sliGpuBoostSync; NvU32 reentrancyMask; }; @@ -105,6 +124,7 @@ typedef struct KernelPerf KernelPerf; #define __nvoc_class_id_KernelPerf 0xc53a57 #endif /* __nvoc_class_id_KernelPerf */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelPerf; #define __staticCast_KernelPerf(pThis) \ @@ -117,6 +137,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelPerf; ((KernelPerf*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelPerf))) #endif //__nvoc_kern_perf_h_disabled +// Property macros #define PDB_PROP_KPERF_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_KPERF_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -126,98 +147,117 @@ NV_STATUS __nvoc_objCreate_KernelPerf(KernelPerf**, Dynamic*, NvU32); #define __objCreate_KernelPerf(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelPerf((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define kperfConstructEngine_FNPTR(pKernelPerf) pKernelPerf->__kperfConstructEngine__ #define kperfConstructEngine(pGpu, pKernelPerf, engDesc) kperfConstructEngine_DISPATCH(pGpu, pKernelPerf, engDesc) +#define kperfStateInitLocked_FNPTR(pKernelPerf) pKernelPerf->__kperfStateInitLocked__ #define kperfStateInitLocked(pGpu, pKernelPerf) kperfStateInitLocked_DISPATCH(pGpu, pKernelPerf) +#define kperfStateLoad_FNPTR(pKernelPerf) pKernelPerf->__kperfStateLoad__ #define kperfStateLoad(pGpu, pKernelPerf, flags) kperfStateLoad_DISPATCH(pGpu, pKernelPerf, flags) +#define kperfStateUnload_FNPTR(pKernelPerf) pKernelPerf->__kperfStateUnload__ #define kperfStateUnload(pGpu, pKernelPerf, flags) kperfStateUnload_DISPATCH(pGpu, pKernelPerf, flags) +#define kperfStateDestroy_FNPTR(pKernelPerf) pKernelPerf->__kperfStateDestroy__ #define kperfStateDestroy(pGpu, pKernelPerf) kperfStateDestroy_DISPATCH(pGpu, pKernelPerf) +#define kperfGpuBoostSyncStateInit_FNPTR(pKernelPerf) pKernelPerf->__kperfGpuBoostSyncStateInit__ #define kperfGpuBoostSyncStateInit(pGpu, pKernelPerf) kperfGpuBoostSyncStateInit_DISPATCH(pGpu, pKernelPerf) #define kperfGpuBoostSyncStateInit_HAL(pGpu, pKernelPerf) kperfGpuBoostSyncStateInit_DISPATCH(pGpu, pKernelPerf) -#define kperfStatePreLoad(pGpu, pEngstate, arg0) kperfStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kperfStatePostUnload(pGpu, pEngstate, arg0) kperfStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kperfStatePreUnload(pGpu, pEngstate, arg0) kperfStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kperfStateInitUnlocked(pGpu, pEngstate) kperfStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kperfInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define kperfInitMissing(pGpu, pEngstate) kperfInitMissing_DISPATCH(pGpu, pEngstate) +#define kperfStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define kperfStatePreInitLocked(pGpu, pEngstate) kperfStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define kperfStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define kperfStatePreInitUnlocked(pGpu, pEngstate) kperfStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kperfStatePostLoad(pGpu, pEngstate, arg0) kperfStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) +#define kperfStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kperfStateInitUnlocked(pGpu, pEngstate) kperfStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kperfStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kperfStatePreLoad(pGpu, pEngstate, arg3) kperfStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kperfStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kperfStatePostLoad(pGpu, pEngstate, arg3) kperfStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kperfStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kperfStatePreUnload(pGpu, pEngstate, arg3) kperfStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kperfStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kperfStatePostUnload(pGpu, pEngstate, arg3) kperfStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kperfIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define kperfIsPresent(pGpu, pEngstate) kperfIsPresent_DISPATCH(pGpu, pEngstate) -NV_STATUS kperfConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf, ENGDESCRIPTOR engDesc); +// Dispatch functions static inline NV_STATUS kperfConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf, ENGDESCRIPTOR engDesc) { return pKernelPerf->__kperfConstructEngine__(pGpu, pKernelPerf, engDesc); } -NV_STATUS kperfStateInitLocked_IMPL(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf); - static inline NV_STATUS kperfStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf) { return pKernelPerf->__kperfStateInitLocked__(pGpu, pKernelPerf); } -NV_STATUS kperfStateLoad_IMPL(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf, NvU32 flags); - static inline NV_STATUS kperfStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf, NvU32 flags) { return pKernelPerf->__kperfStateLoad__(pGpu, pKernelPerf, flags); } -NV_STATUS kperfStateUnload_IMPL(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf, NvU32 flags); - static inline NV_STATUS kperfStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf, NvU32 flags) { return pKernelPerf->__kperfStateUnload__(pGpu, pKernelPerf, flags); } -void kperfStateDestroy_IMPL(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf); - static inline void kperfStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf) { pKernelPerf->__kperfStateDestroy__(pGpu, pKernelPerf); } -static inline NV_STATUS kperfGpuBoostSyncStateInit_56cd7a(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf) { - return NV_OK; -} - -NV_STATUS kperfGpuBoostSyncStateInit_IMPL(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf); - static inline NV_STATUS kperfGpuBoostSyncStateInit_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf) { return pKernelPerf->__kperfGpuBoostSyncStateInit__(pGpu, pKernelPerf); } -static inline NV_STATUS kperfStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelPerf *pEngstate, NvU32 arg0) { - return pEngstate->__kperfStatePreLoad__(pGpu, pEngstate, arg0); +static inline void kperfInitMissing_DISPATCH(POBJGPU pGpu, struct KernelPerf *pEngstate) { + pEngstate->__kperfInitMissing__(pGpu, pEngstate); } -static inline NV_STATUS kperfStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelPerf *pEngstate, NvU32 arg0) { - return pEngstate->__kperfStatePostUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS kperfStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelPerf *pEngstate) { + return pEngstate->__kperfStatePreInitLocked__(pGpu, pEngstate); } -static inline NV_STATUS kperfStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelPerf *pEngstate, NvU32 arg0) { - return pEngstate->__kperfStatePreUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS kperfStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelPerf *pEngstate) { + return pEngstate->__kperfStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kperfStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelPerf *pEngstate) { return pEngstate->__kperfStateInitUnlocked__(pGpu, pEngstate); } -static inline void kperfInitMissing_DISPATCH(POBJGPU pGpu, struct KernelPerf *pEngstate) { - pEngstate->__kperfInitMissing__(pGpu, pEngstate); +static inline NV_STATUS kperfStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelPerf *pEngstate, NvU32 arg3) { + return pEngstate->__kperfStatePreLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kperfStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelPerf *pEngstate) { - return pEngstate->__kperfStatePreInitLocked__(pGpu, pEngstate); +static inline NV_STATUS kperfStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelPerf *pEngstate, NvU32 arg3) { + return pEngstate->__kperfStatePostLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kperfStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelPerf *pEngstate) { - return pEngstate->__kperfStatePreInitUnlocked__(pGpu, pEngstate); +static inline NV_STATUS kperfStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelPerf *pEngstate, NvU32 arg3) { + return pEngstate->__kperfStatePreUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kperfStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelPerf *pEngstate, NvU32 arg0) { - return pEngstate->__kperfStatePostLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS kperfStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelPerf *pEngstate, NvU32 arg3) { + return pEngstate->__kperfStatePostUnload__(pGpu, pEngstate, arg3); } static inline NvBool kperfIsPresent_DISPATCH(POBJGPU pGpu, struct KernelPerf *pEngstate) { return pEngstate->__kperfIsPresent__(pGpu, pEngstate); } +NV_STATUS kperfConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf, ENGDESCRIPTOR engDesc); + +NV_STATUS kperfStateInitLocked_IMPL(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf); + +NV_STATUS kperfStateLoad_IMPL(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf, NvU32 flags); + +NV_STATUS kperfStateUnload_IMPL(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf, NvU32 flags); + +void kperfStateDestroy_IMPL(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf); + +static inline NV_STATUS kperfGpuBoostSyncStateInit_56cd7a(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf) { + return NV_OK; +} + +NV_STATUS kperfGpuBoostSyncStateInit_IMPL(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf); + NV_STATUS kperfGpuBoostSyncActivate_IMPL(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf, NvBool bActivate); #ifdef __nvoc_kern_perf_h_disabled diff --git a/src/nvidia/generated/g_kern_perfbuffer_nvoc.c b/src/nvidia/generated/g_kern_perfbuffer_nvoc.c index 0e422794a3..158275682d 100644 --- a/src/nvidia/generated/g_kern_perfbuffer_nvoc.c +++ b/src/nvidia/generated/g_kern_perfbuffer_nvoc.c @@ -93,106 +93,134 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_PerfBuffer = /*pExportInfo=*/ &__nvoc_export_info_PerfBuffer }; -static NvBool __nvoc_thunk_GpuResource_perfbufferShareCallback(struct PerfBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// 25 up-thunk(s) defined to bridge methods in PerfBuffer to superclasses + +// perfbufferControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferControl(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_perfbufferCheckMemInterUnmap(struct PerfBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), bSubdeviceHandleProvided); +// perfbufferMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferMap(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_perfbufferMapTo(struct PerfBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset), pParams); +// perfbufferUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferUnmap(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_GpuResource_perfbufferGetMapAddrSpace(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// perfbufferShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_perfbufferShareCallback(struct PerfBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NvU32 __nvoc_thunk_RsResource_perfbufferGetRefCount(struct PerfBuffer *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset)); +// perfbufferGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferGetRegBaseOffsetAndSize(struct PerfBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), pGpu, pOffset, pSize); } -static void __nvoc_thunk_RsResource_perfbufferAddAdditionalDependants(struct RsClient *pClient, struct PerfBuffer *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset), pReference); +// perfbufferGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferGetMapAddrSpace(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_RmResource_perfbufferControl_Prologue(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), pCallContext, pParams); +// perfbufferInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferInternalControlForward(struct PerfBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_GpuResource_perfbufferGetRegBaseOffsetAndSize(struct PerfBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), pGpu, pOffset, pSize); +// perfbufferGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_perfbufferGetInternalObjectHandle(struct PerfBuffer *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_perfbufferInternalControlForward(struct PerfBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), command, pParams, size); +// perfbufferAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_perfbufferAccessCallback(struct PerfBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RsResource_perfbufferUnmapFrom(struct PerfBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset), pParams); +// perfbufferGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_perfbufferGetMemInterMapParams(struct PerfBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), pParams); } -static void __nvoc_thunk_RmResource_perfbufferControl_Epilogue(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), pCallContext, pParams); +// perfbufferCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_perfbufferCheckMemInterUnmap(struct PerfBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), bSubdeviceHandleProvided); } -static NvHandle __nvoc_thunk_GpuResource_perfbufferGetInternalObjectHandle(struct PerfBuffer *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset)); +// perfbufferGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_perfbufferGetMemoryMappingDescriptor(struct PerfBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_GpuResource_perfbufferControl(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), pCallContext, pParams); +// perfbufferControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_perfbufferControlSerialization_Prologue(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_perfbufferUnmap(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), pCallContext, pCpuMapping); +// perfbufferControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_perfbufferControlSerialization_Epilogue(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_perfbufferGetMemInterMapParams(struct PerfBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), pParams); +// perfbufferControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_perfbufferControl_Prologue(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_perfbufferGetMemoryMappingDescriptor(struct PerfBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), ppMemDesc); +// perfbufferControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_perfbufferControl_Epilogue(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_perfbufferControlFilter(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset), pCallContext, pParams); +// perfbufferCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_perfbufferCanCopy(struct PerfBuffer *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RmResource_perfbufferControlSerialization_Prologue(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), pCallContext, pParams); +// perfbufferIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_perfbufferIsDuplicate(struct PerfBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_RsResource_perfbufferCanCopy(struct PerfBuffer *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset)); +// perfbufferPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_perfbufferPreDestruct(struct PerfBuffer *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_perfbufferIsPartialUnmapSupported(struct PerfBuffer *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset)); +// perfbufferControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_perfbufferControlFilter(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_perfbufferPreDestruct(struct PerfBuffer *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset)); +// perfbufferIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_perfbufferIsPartialUnmapSupported(struct PerfBuffer *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_perfbufferIsDuplicate(struct PerfBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset), hMemory, pDuplicate); +// perfbufferMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_perfbufferMapTo(struct PerfBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_perfbufferControlSerialization_Epilogue(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), pCallContext, pParams); +// perfbufferUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_perfbufferUnmapFrom(struct PerfBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_perfbufferMap(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// perfbufferGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_perfbufferGetRefCount(struct PerfBuffer *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_perfbufferAccessCallback(struct PerfBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// perfbufferAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_perfbufferAddAdditionalDependants(struct RsClient *pClient, struct PerfBuffer *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_PerfBuffer = { /*numEntries=*/ 0, @@ -234,6 +262,7 @@ NV_STATUS __nvoc_ctor_PerfBuffer(PerfBuffer *pThis, RmHalspecOwner *pRmhalspecow return status; } +// Vtable initialization static void __nvoc_init_funcTable_PerfBuffer_1(PerfBuffer *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -242,7 +271,7 @@ static void __nvoc_init_funcTable_PerfBuffer_1(PerfBuffer *pThis, RmHalspecOwner PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // Hal function -- perfbufferConstructHal + // perfbufferConstructHal -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__perfbufferConstructHal__ = &perfbufferConstructHal_46f6a7; @@ -252,58 +281,87 @@ static void __nvoc_init_funcTable_PerfBuffer_1(PerfBuffer *pThis, RmHalspecOwner pThis->__perfbufferConstructHal__ = &perfbufferConstructHal_KERNEL; } - pThis->__perfbufferShareCallback__ = &__nvoc_thunk_GpuResource_perfbufferShareCallback; + // perfbufferControl -- virtual inherited (gpures) base (gpures) + pThis->__perfbufferControl__ = &__nvoc_up_thunk_GpuResource_perfbufferControl; - pThis->__perfbufferCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_perfbufferCheckMemInterUnmap; + // perfbufferMap -- virtual inherited (gpures) base (gpures) + pThis->__perfbufferMap__ = &__nvoc_up_thunk_GpuResource_perfbufferMap; - pThis->__perfbufferMapTo__ = &__nvoc_thunk_RsResource_perfbufferMapTo; + // perfbufferUnmap -- virtual inherited (gpures) base (gpures) + pThis->__perfbufferUnmap__ = &__nvoc_up_thunk_GpuResource_perfbufferUnmap; - pThis->__perfbufferGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_perfbufferGetMapAddrSpace; + // perfbufferShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__perfbufferShareCallback__ = &__nvoc_up_thunk_GpuResource_perfbufferShareCallback; - pThis->__perfbufferGetRefCount__ = &__nvoc_thunk_RsResource_perfbufferGetRefCount; + // perfbufferGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__perfbufferGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_perfbufferGetRegBaseOffsetAndSize; - pThis->__perfbufferAddAdditionalDependants__ = &__nvoc_thunk_RsResource_perfbufferAddAdditionalDependants; + // perfbufferGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__perfbufferGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_perfbufferGetMapAddrSpace; - pThis->__perfbufferControl_Prologue__ = &__nvoc_thunk_RmResource_perfbufferControl_Prologue; + // perfbufferInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__perfbufferInternalControlForward__ = &__nvoc_up_thunk_GpuResource_perfbufferInternalControlForward; - pThis->__perfbufferGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_perfbufferGetRegBaseOffsetAndSize; + // perfbufferGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__perfbufferGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_perfbufferGetInternalObjectHandle; - pThis->__perfbufferInternalControlForward__ = &__nvoc_thunk_GpuResource_perfbufferInternalControlForward; + // perfbufferAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__perfbufferAccessCallback__ = &__nvoc_up_thunk_RmResource_perfbufferAccessCallback; - pThis->__perfbufferUnmapFrom__ = &__nvoc_thunk_RsResource_perfbufferUnmapFrom; + // perfbufferGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__perfbufferGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_perfbufferGetMemInterMapParams; - pThis->__perfbufferControl_Epilogue__ = &__nvoc_thunk_RmResource_perfbufferControl_Epilogue; + // perfbufferCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__perfbufferCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_perfbufferCheckMemInterUnmap; - pThis->__perfbufferGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_perfbufferGetInternalObjectHandle; + // perfbufferGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__perfbufferGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_perfbufferGetMemoryMappingDescriptor; - pThis->__perfbufferControl__ = &__nvoc_thunk_GpuResource_perfbufferControl; + // perfbufferControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__perfbufferControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_perfbufferControlSerialization_Prologue; - pThis->__perfbufferUnmap__ = &__nvoc_thunk_GpuResource_perfbufferUnmap; + // perfbufferControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__perfbufferControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_perfbufferControlSerialization_Epilogue; - pThis->__perfbufferGetMemInterMapParams__ = &__nvoc_thunk_RmResource_perfbufferGetMemInterMapParams; + // perfbufferControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__perfbufferControl_Prologue__ = &__nvoc_up_thunk_RmResource_perfbufferControl_Prologue; - pThis->__perfbufferGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_perfbufferGetMemoryMappingDescriptor; + // perfbufferControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__perfbufferControl_Epilogue__ = &__nvoc_up_thunk_RmResource_perfbufferControl_Epilogue; - pThis->__perfbufferControlFilter__ = &__nvoc_thunk_RsResource_perfbufferControlFilter; + // perfbufferCanCopy -- virtual inherited (res) base (gpures) + pThis->__perfbufferCanCopy__ = &__nvoc_up_thunk_RsResource_perfbufferCanCopy; - pThis->__perfbufferControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_perfbufferControlSerialization_Prologue; + // perfbufferIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__perfbufferIsDuplicate__ = &__nvoc_up_thunk_RsResource_perfbufferIsDuplicate; - pThis->__perfbufferCanCopy__ = &__nvoc_thunk_RsResource_perfbufferCanCopy; + // perfbufferPreDestruct -- virtual inherited (res) base (gpures) + pThis->__perfbufferPreDestruct__ = &__nvoc_up_thunk_RsResource_perfbufferPreDestruct; - pThis->__perfbufferIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_perfbufferIsPartialUnmapSupported; + // perfbufferControlFilter -- virtual inherited (res) base (gpures) + pThis->__perfbufferControlFilter__ = &__nvoc_up_thunk_RsResource_perfbufferControlFilter; - pThis->__perfbufferPreDestruct__ = &__nvoc_thunk_RsResource_perfbufferPreDestruct; + // perfbufferIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__perfbufferIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_perfbufferIsPartialUnmapSupported; - pThis->__perfbufferIsDuplicate__ = &__nvoc_thunk_RsResource_perfbufferIsDuplicate; + // perfbufferMapTo -- virtual inherited (res) base (gpures) + pThis->__perfbufferMapTo__ = &__nvoc_up_thunk_RsResource_perfbufferMapTo; - pThis->__perfbufferControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_perfbufferControlSerialization_Epilogue; + // perfbufferUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__perfbufferUnmapFrom__ = &__nvoc_up_thunk_RsResource_perfbufferUnmapFrom; - pThis->__perfbufferMap__ = &__nvoc_thunk_GpuResource_perfbufferMap; + // perfbufferGetRefCount -- virtual inherited (res) base (gpures) + pThis->__perfbufferGetRefCount__ = &__nvoc_up_thunk_RsResource_perfbufferGetRefCount; - pThis->__perfbufferAccessCallback__ = &__nvoc_thunk_RmResource_perfbufferAccessCallback; -} + // perfbufferAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__perfbufferAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_perfbufferAddAdditionalDependants; +} // End __nvoc_init_funcTable_PerfBuffer_1 with approximately 27 basic block(s). + +// Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_PerfBuffer(PerfBuffer *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 26 per-object function pointer(s). __nvoc_init_funcTable_PerfBuffer_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kern_perfbuffer_nvoc.h b/src/nvidia/generated/g_kern_perfbuffer_nvoc.h index 07b17e774e..1fbb87c763 100644 --- a/src/nvidia/generated/g_kern_perfbuffer_nvoc.h +++ b/src/nvidia/generated/g_kern_perfbuffer_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERN_PERFBUFFER_NVOC_H_ #define _G_KERN_PERFBUFFER_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kern_perfbuffer_nvoc.h" #ifndef KERN_PERFBUFFER_H @@ -51,41 +59,52 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct PerfBuffer { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct PerfBuffer *__nvoc_pbase_PerfBuffer; - NV_STATUS (*__perfbufferConstructHal__)(struct PerfBuffer *, struct CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); - NvBool (*__perfbufferShareCallback__)(struct PerfBuffer *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__perfbufferCheckMemInterUnmap__)(struct PerfBuffer *, NvBool); - NV_STATUS (*__perfbufferMapTo__)(struct PerfBuffer *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__perfbufferGetMapAddrSpace__)(struct PerfBuffer *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__perfbufferGetRefCount__)(struct PerfBuffer *); - void (*__perfbufferAddAdditionalDependants__)(struct RsClient *, struct PerfBuffer *, RsResourceRef *); - NV_STATUS (*__perfbufferControl_Prologue__)(struct PerfBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__perfbufferGetRegBaseOffsetAndSize__)(struct PerfBuffer *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__perfbufferInternalControlForward__)(struct PerfBuffer *, NvU32, void *, NvU32); - NV_STATUS (*__perfbufferUnmapFrom__)(struct PerfBuffer *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__perfbufferControl_Epilogue__)(struct PerfBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__perfbufferGetInternalObjectHandle__)(struct PerfBuffer *); - NV_STATUS (*__perfbufferControl__)(struct PerfBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__perfbufferUnmap__)(struct PerfBuffer *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__perfbufferGetMemInterMapParams__)(struct PerfBuffer *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__perfbufferGetMemoryMappingDescriptor__)(struct PerfBuffer *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__perfbufferControlFilter__)(struct PerfBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__perfbufferControlSerialization_Prologue__)(struct PerfBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__perfbufferCanCopy__)(struct PerfBuffer *); - NvBool (*__perfbufferIsPartialUnmapSupported__)(struct PerfBuffer *); - void (*__perfbufferPreDestruct__)(struct PerfBuffer *); - NV_STATUS (*__perfbufferIsDuplicate__)(struct PerfBuffer *, NvHandle, NvBool *); - void (*__perfbufferControlSerialization_Epilogue__)(struct PerfBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__perfbufferMap__)(struct PerfBuffer *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__perfbufferAccessCallback__)(struct PerfBuffer *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct PerfBuffer *__nvoc_pbase_PerfBuffer; // perfbuffer + + // Vtable with 26 per-object function pointers + NV_STATUS (*__perfbufferConstructHal__)(struct PerfBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // halified (2 hals) body + NV_STATUS (*__perfbufferControl__)(struct PerfBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__perfbufferMap__)(struct PerfBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__perfbufferUnmap__)(struct PerfBuffer * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__perfbufferShareCallback__)(struct PerfBuffer * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__perfbufferGetRegBaseOffsetAndSize__)(struct PerfBuffer * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__perfbufferGetMapAddrSpace__)(struct PerfBuffer * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__perfbufferInternalControlForward__)(struct PerfBuffer * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__perfbufferGetInternalObjectHandle__)(struct PerfBuffer * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__perfbufferAccessCallback__)(struct PerfBuffer * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__perfbufferGetMemInterMapParams__)(struct PerfBuffer * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__perfbufferCheckMemInterUnmap__)(struct PerfBuffer * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__perfbufferGetMemoryMappingDescriptor__)(struct PerfBuffer * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__perfbufferControlSerialization_Prologue__)(struct PerfBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__perfbufferControlSerialization_Epilogue__)(struct PerfBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__perfbufferControl_Prologue__)(struct PerfBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__perfbufferControl_Epilogue__)(struct PerfBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__perfbufferCanCopy__)(struct PerfBuffer * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__perfbufferIsDuplicate__)(struct PerfBuffer * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__perfbufferPreDestruct__)(struct PerfBuffer * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__perfbufferControlFilter__)(struct PerfBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__perfbufferIsPartialUnmapSupported__)(struct PerfBuffer * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__perfbufferMapTo__)(struct PerfBuffer * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__perfbufferUnmapFrom__)(struct PerfBuffer * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__perfbufferGetRefCount__)(struct PerfBuffer * /*this*/); // virtual inherited (res) base (gpures) + void (*__perfbufferAddAdditionalDependants__)(struct RsClient *, struct PerfBuffer * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members void *pObject; }; @@ -98,6 +117,7 @@ typedef struct PerfBuffer PerfBuffer; #define __nvoc_class_id_PerfBuffer 0x4bc43b #endif /* __nvoc_class_id_PerfBuffer */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_PerfBuffer; #define __staticCast_PerfBuffer(pThis) \ @@ -110,154 +130,183 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_PerfBuffer; ((PerfBuffer*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(PerfBuffer))) #endif //__nvoc_kern_perfbuffer_h_disabled - NV_STATUS __nvoc_objCreateDynamic_PerfBuffer(PerfBuffer**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_PerfBuffer(PerfBuffer**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_PerfBuffer(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_PerfBuffer((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define perfbufferConstructHal_FNPTR(pResource) pResource->__perfbufferConstructHal__ #define perfbufferConstructHal(pResource, pCallContext, pParams) perfbufferConstructHal_DISPATCH(pResource, pCallContext, pParams) #define perfbufferConstructHal_HAL(pResource, pCallContext, pParams) perfbufferConstructHal_DISPATCH(pResource, pCallContext, pParams) +#define perfbufferControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define perfbufferControl(pGpuResource, pCallContext, pParams) perfbufferControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define perfbufferMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define perfbufferMap(pGpuResource, pCallContext, pParams, pCpuMapping) perfbufferMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define perfbufferUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define perfbufferUnmap(pGpuResource, pCallContext, pCpuMapping) perfbufferUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define perfbufferShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define perfbufferShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) perfbufferShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define perfbufferCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) perfbufferCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define perfbufferMapTo(pResource, pParams) perfbufferMapTo_DISPATCH(pResource, pParams) -#define perfbufferGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) perfbufferGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define perfbufferGetRefCount(pResource) perfbufferGetRefCount_DISPATCH(pResource) -#define perfbufferAddAdditionalDependants(pClient, pResource, pReference) perfbufferAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define perfbufferControl_Prologue(pResource, pCallContext, pParams) perfbufferControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define perfbufferGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define perfbufferGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) perfbufferGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define perfbufferGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define perfbufferGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) perfbufferGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define perfbufferInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define perfbufferInternalControlForward(pGpuResource, command, pParams, size) perfbufferInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define perfbufferUnmapFrom(pResource, pParams) perfbufferUnmapFrom_DISPATCH(pResource, pParams) -#define perfbufferControl_Epilogue(pResource, pCallContext, pParams) perfbufferControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define perfbufferGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define perfbufferGetInternalObjectHandle(pGpuResource) perfbufferGetInternalObjectHandle_DISPATCH(pGpuResource) -#define perfbufferControl(pGpuResource, pCallContext, pParams) perfbufferControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define perfbufferUnmap(pGpuResource, pCallContext, pCpuMapping) perfbufferUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define perfbufferAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define perfbufferAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) perfbufferAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define perfbufferGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define perfbufferGetMemInterMapParams(pRmResource, pParams) perfbufferGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define perfbufferCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define perfbufferCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) perfbufferCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define perfbufferGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define perfbufferGetMemoryMappingDescriptor(pRmResource, ppMemDesc) perfbufferGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define perfbufferControlFilter(pResource, pCallContext, pParams) perfbufferControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define perfbufferControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define perfbufferControlSerialization_Prologue(pResource, pCallContext, pParams) perfbufferControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define perfbufferControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define perfbufferControlSerialization_Epilogue(pResource, pCallContext, pParams) perfbufferControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define perfbufferControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define perfbufferControl_Prologue(pResource, pCallContext, pParams) perfbufferControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define perfbufferControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define perfbufferControl_Epilogue(pResource, pCallContext, pParams) perfbufferControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define perfbufferCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define perfbufferCanCopy(pResource) perfbufferCanCopy_DISPATCH(pResource) -#define perfbufferIsPartialUnmapSupported(pResource) perfbufferIsPartialUnmapSupported_DISPATCH(pResource) -#define perfbufferPreDestruct(pResource) perfbufferPreDestruct_DISPATCH(pResource) +#define perfbufferIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define perfbufferIsDuplicate(pResource, hMemory, pDuplicate) perfbufferIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define perfbufferControlSerialization_Epilogue(pResource, pCallContext, pParams) perfbufferControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define perfbufferMap(pGpuResource, pCallContext, pParams, pCpuMapping) perfbufferMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define perfbufferAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) perfbufferAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -static inline void perfbufferDestruct_b3696a(struct PerfBuffer *pResource) { - return; -} +#define perfbufferPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define perfbufferPreDestruct(pResource) perfbufferPreDestruct_DISPATCH(pResource) +#define perfbufferControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define perfbufferControlFilter(pResource, pCallContext, pParams) perfbufferControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define perfbufferIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define perfbufferIsPartialUnmapSupported(pResource) perfbufferIsPartialUnmapSupported_DISPATCH(pResource) +#define perfbufferMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define perfbufferMapTo(pResource, pParams) perfbufferMapTo_DISPATCH(pResource, pParams) +#define perfbufferUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define perfbufferUnmapFrom(pResource, pParams) perfbufferUnmapFrom_DISPATCH(pResource, pParams) +#define perfbufferGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define perfbufferGetRefCount(pResource) perfbufferGetRefCount_DISPATCH(pResource) +#define perfbufferAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define perfbufferAddAdditionalDependants(pClient, pResource, pReference) perfbufferAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions +static inline NV_STATUS perfbufferConstructHal_DISPATCH(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + return pResource->__perfbufferConstructHal__(pResource, pCallContext, pParams); +} -#define __nvoc_perfbufferDestruct(pResource) perfbufferDestruct_b3696a(pResource) -NV_STATUS perfbufferConstructHal_KERNEL(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); +static inline NV_STATUS perfbufferControl_DISPATCH(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__perfbufferControl__(pGpuResource, pCallContext, pParams); +} -static inline NV_STATUS perfbufferConstructHal_46f6a7(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS perfbufferMap_DISPATCH(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__perfbufferMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS perfbufferConstructHal_DISPATCH(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - return pResource->__perfbufferConstructHal__(pResource, pCallContext, pParams); +static inline NV_STATUS perfbufferUnmap_DISPATCH(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__perfbufferUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool perfbufferShareCallback_DISPATCH(struct PerfBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return pGpuResource->__perfbufferShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline NV_STATUS perfbufferCheckMemInterUnmap_DISPATCH(struct PerfBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__perfbufferCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); -} - -static inline NV_STATUS perfbufferMapTo_DISPATCH(struct PerfBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__perfbufferMapTo__(pResource, pParams); +static inline NV_STATUS perfbufferGetRegBaseOffsetAndSize_DISPATCH(struct PerfBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__perfbufferGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS perfbufferGetMapAddrSpace_DISPATCH(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__perfbufferGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NvU32 perfbufferGetRefCount_DISPATCH(struct PerfBuffer *pResource) { - return pResource->__perfbufferGetRefCount__(pResource); +static inline NV_STATUS perfbufferInternalControlForward_DISPATCH(struct PerfBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__perfbufferInternalControlForward__(pGpuResource, command, pParams, size); } -static inline void perfbufferAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct PerfBuffer *pResource, RsResourceRef *pReference) { - pResource->__perfbufferAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvHandle perfbufferGetInternalObjectHandle_DISPATCH(struct PerfBuffer *pGpuResource) { + return pGpuResource->__perfbufferGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS perfbufferControl_Prologue_DISPATCH(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__perfbufferControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool perfbufferAccessCallback_DISPATCH(struct PerfBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__perfbufferAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS perfbufferGetRegBaseOffsetAndSize_DISPATCH(struct PerfBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__perfbufferGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS perfbufferGetMemInterMapParams_DISPATCH(struct PerfBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__perfbufferGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS perfbufferInternalControlForward_DISPATCH(struct PerfBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__perfbufferInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS perfbufferCheckMemInterUnmap_DISPATCH(struct PerfBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__perfbufferCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS perfbufferUnmapFrom_DISPATCH(struct PerfBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__perfbufferUnmapFrom__(pResource, pParams); +static inline NV_STATUS perfbufferGetMemoryMappingDescriptor_DISPATCH(struct PerfBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__perfbufferGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline void perfbufferControl_Epilogue_DISPATCH(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__perfbufferControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS perfbufferControlSerialization_Prologue_DISPATCH(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__perfbufferControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvHandle perfbufferGetInternalObjectHandle_DISPATCH(struct PerfBuffer *pGpuResource) { - return pGpuResource->__perfbufferGetInternalObjectHandle__(pGpuResource); +static inline void perfbufferControlSerialization_Epilogue_DISPATCH(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__perfbufferControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS perfbufferControl_DISPATCH(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__perfbufferControl__(pGpuResource, pCallContext, pParams); +static inline NV_STATUS perfbufferControl_Prologue_DISPATCH(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__perfbufferControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS perfbufferUnmap_DISPATCH(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__perfbufferUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline void perfbufferControl_Epilogue_DISPATCH(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__perfbufferControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS perfbufferGetMemInterMapParams_DISPATCH(struct PerfBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__perfbufferGetMemInterMapParams__(pRmResource, pParams); +static inline NvBool perfbufferCanCopy_DISPATCH(struct PerfBuffer *pResource) { + return pResource->__perfbufferCanCopy__(pResource); } -static inline NV_STATUS perfbufferGetMemoryMappingDescriptor_DISPATCH(struct PerfBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__perfbufferGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS perfbufferIsDuplicate_DISPATCH(struct PerfBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__perfbufferIsDuplicate__(pResource, hMemory, pDuplicate); +} + +static inline void perfbufferPreDestruct_DISPATCH(struct PerfBuffer *pResource) { + pResource->__perfbufferPreDestruct__(pResource); } static inline NV_STATUS perfbufferControlFilter_DISPATCH(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__perfbufferControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS perfbufferControlSerialization_Prologue_DISPATCH(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__perfbufferControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NvBool perfbufferIsPartialUnmapSupported_DISPATCH(struct PerfBuffer *pResource) { + return pResource->__perfbufferIsPartialUnmapSupported__(pResource); } -static inline NvBool perfbufferCanCopy_DISPATCH(struct PerfBuffer *pResource) { - return pResource->__perfbufferCanCopy__(pResource); +static inline NV_STATUS perfbufferMapTo_DISPATCH(struct PerfBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__perfbufferMapTo__(pResource, pParams); } -static inline NvBool perfbufferIsPartialUnmapSupported_DISPATCH(struct PerfBuffer *pResource) { - return pResource->__perfbufferIsPartialUnmapSupported__(pResource); +static inline NV_STATUS perfbufferUnmapFrom_DISPATCH(struct PerfBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__perfbufferUnmapFrom__(pResource, pParams); } -static inline void perfbufferPreDestruct_DISPATCH(struct PerfBuffer *pResource) { - pResource->__perfbufferPreDestruct__(pResource); +static inline NvU32 perfbufferGetRefCount_DISPATCH(struct PerfBuffer *pResource) { + return pResource->__perfbufferGetRefCount__(pResource); } -static inline NV_STATUS perfbufferIsDuplicate_DISPATCH(struct PerfBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__perfbufferIsDuplicate__(pResource, hMemory, pDuplicate); +static inline void perfbufferAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct PerfBuffer *pResource, RsResourceRef *pReference) { + pResource->__perfbufferAddAdditionalDependants__(pClient, pResource, pReference); } -static inline void perfbufferControlSerialization_Epilogue_DISPATCH(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__perfbufferControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline void perfbufferDestruct_b3696a(struct PerfBuffer *pResource) { + return; } -static inline NV_STATUS perfbufferMap_DISPATCH(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__perfbufferMap__(pGpuResource, pCallContext, pParams, pCpuMapping); -} -static inline NvBool perfbufferAccessCallback_DISPATCH(struct PerfBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__perfbufferAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +#define __nvoc_perfbufferDestruct(pResource) perfbufferDestruct_b3696a(pResource) +NV_STATUS perfbufferConstructHal_KERNEL(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); + +static inline NV_STATUS perfbufferConstructHal_46f6a7(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + return NV_ERR_NOT_SUPPORTED; } static inline NV_STATUS __nvoc_perfbufferConstruct(struct PerfBuffer *arg_pResource, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams) { diff --git a/src/nvidia/generated/g_kern_pmu_nvoc.c b/src/nvidia/generated/g_kern_pmu_nvoc.c index f96dec021e..3d535628a9 100644 --- a/src/nvidia/generated/g_kern_pmu_nvoc.c +++ b/src/nvidia/generated/g_kern_pmu_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelPmu = /*pExportInfo=*/ &__nvoc_export_info_KernelPmu }; -static NV_STATUS __nvoc_thunk_KernelPmu_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPmu, ENGDESCRIPTOR engDesc) { - return kpmuConstructEngine(pGpu, (struct KernelPmu *)(((unsigned char *)pKernelPmu) - __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), engDesc); +// 3 down-thunk(s) defined to bridge methods in KernelPmu from superclasses + +// kpmuConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelPmu_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPmu, ENGDESCRIPTOR engDesc) { + return kpmuConstructEngine(pGpu, (struct KernelPmu *)(((unsigned char *) pKernelPmu) - __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), engDesc); } -static void __nvoc_thunk_KernelPmu_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPmu) { - kpmuStateDestroy(pGpu, (struct KernelPmu *)(((unsigned char *)pKernelPmu) - __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); +// kpmuStateDestroy: virtual override (engstate) base (engstate) +static void __nvoc_down_thunk_KernelPmu_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPmu) { + kpmuStateDestroy(pGpu, (struct KernelPmu *)(((unsigned char *) pKernelPmu) - __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_KernelPmu_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPmu) { - return kpmuStateInitLocked(pGpu, (struct KernelPmu *)(((unsigned char *)pKernelPmu) - __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); +// kpmuStateInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelPmu_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPmu) { + return kpmuStateInitLocked(pGpu, (struct KernelPmu *)(((unsigned char *) pKernelPmu) - __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kpmuStateLoad(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg0) { - return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), arg0); + +// 11 up-thunk(s) defined to bridge methods in KernelPmu to superclasses + +// kpmuInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kpmuInitMissing(POBJGPU pGpu, struct KernelPmu *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kpmuStateUnload(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg0) { - return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), arg0); +// kpmuStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePreInitLocked(POBJGPU pGpu, struct KernelPmu *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kpmuStatePreLoad(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), arg0); +// kpmuStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePreInitUnlocked(POBJGPU pGpu, struct KernelPmu *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kpmuStatePostUnload(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), arg0); +// kpmuStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStateInitUnlocked(POBJGPU pGpu, struct KernelPmu *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kpmuStatePreUnload(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), arg0); +// kpmuStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePreLoad(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kpmuStateInitUnlocked(POBJGPU pGpu, struct KernelPmu *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); +// kpmuStateLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStateLoad(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { + return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_kpmuInitMissing(POBJGPU pGpu, struct KernelPmu *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); +// kpmuStatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePostLoad(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kpmuStatePreInitLocked(POBJGPU pGpu, struct KernelPmu *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); +// kpmuStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePreUnload(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kpmuStatePreInitUnlocked(POBJGPU pGpu, struct KernelPmu *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); +// kpmuStateUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStateUnload(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { + return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kpmuStatePostLoad(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), arg0); +// kpmuStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePostUnload(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), arg3); } -static NvBool __nvoc_thunk_OBJENGSTATE_kpmuIsPresent(POBJGPU pGpu, struct KernelPmu *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); +// kpmuIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_kpmuIsPresent(POBJGPU pGpu, struct KernelPmu *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelPmu = { /*numEntries=*/ 0, @@ -153,45 +173,61 @@ NV_STATUS __nvoc_ctor_KernelPmu(KernelPmu *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelPmu_1(KernelPmu *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // kpmuConstructEngine -- virtual override (engstate) base (engstate) pThis->__kpmuConstructEngine__ = &kpmuConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelPmu_engstateConstructEngine; + // kpmuStateDestroy -- virtual override (engstate) base (engstate) pThis->__kpmuStateDestroy__ = &kpmuStateDestroy_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelPmu_engstateStateDestroy; + // kpmuStateInitLocked -- virtual override (engstate) base (engstate) pThis->__kpmuStateInitLocked__ = &kpmuStateInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelPmu_engstateStateInitLocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelPmu_engstateConstructEngine; + // kpmuInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__kpmuInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuInitMissing; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_thunk_KernelPmu_engstateStateDestroy; + // kpmuStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__kpmuStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStatePreInitLocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_thunk_KernelPmu_engstateStateInitLocked; + // kpmuStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kpmuStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStatePreInitUnlocked; - pThis->__kpmuStateLoad__ = &__nvoc_thunk_OBJENGSTATE_kpmuStateLoad; + // kpmuStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kpmuStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStateInitUnlocked; - pThis->__kpmuStateUnload__ = &__nvoc_thunk_OBJENGSTATE_kpmuStateUnload; + // kpmuStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__kpmuStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStatePreLoad; - pThis->__kpmuStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_kpmuStatePreLoad; + // kpmuStateLoad -- virtual inherited (engstate) base (engstate) + pThis->__kpmuStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStateLoad; - pThis->__kpmuStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_kpmuStatePostUnload; + // kpmuStatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__kpmuStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStatePostLoad; - pThis->__kpmuStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_kpmuStatePreUnload; + // kpmuStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__kpmuStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStatePreUnload; - pThis->__kpmuStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kpmuStateInitUnlocked; + // kpmuStateUnload -- virtual inherited (engstate) base (engstate) + pThis->__kpmuStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStateUnload; - pThis->__kpmuInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kpmuInitMissing; + // kpmuStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__kpmuStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStatePostUnload; - pThis->__kpmuStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kpmuStatePreInitLocked; + // kpmuIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__kpmuIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuIsPresent; +} // End __nvoc_init_funcTable_KernelPmu_1 with approximately 17 basic block(s). - pThis->__kpmuStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kpmuStatePreInitUnlocked; - - pThis->__kpmuStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_kpmuStatePostLoad; - - pThis->__kpmuIsPresent__ = &__nvoc_thunk_OBJENGSTATE_kpmuIsPresent; -} +// Initialize vtable(s) for 14 virtual method(s). void __nvoc_init_funcTable_KernelPmu(KernelPmu *pThis) { + + // Initialize vtable(s) with 14 per-object function pointer(s). __nvoc_init_funcTable_KernelPmu_1(pThis); } diff --git a/src/nvidia/generated/g_kern_pmu_nvoc.h b/src/nvidia/generated/g_kern_pmu_nvoc.h index 51f8e5864f..a96d9fcbb7 100644 --- a/src/nvidia/generated/g_kern_pmu_nvoc.h +++ b/src/nvidia/generated/g_kern_pmu_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_KERN_PMU_NVOC_H_ #define _G_KERN_PMU_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kern_pmu_nvoc.h" #ifndef KERNEL_PMU_H @@ -47,6 +55,15 @@ extern "C" { #define PMU_LOG_BUFFER_MAX_SIZE 0x1000 +// This value is used in both Physical-RM and Kernel-RM +#define PMU_RESERVED_MEMORY_SURFACES_SIZE 0x1000000 + +/*! + * Alignment to use for reserved memory region + */ +#define KPMU_RESERVED_MEMORY_ALIGNMENT \ + (128U * (1U << 10U)) + /*! * KernelPmu is a logical abstraction of the GPU Pmu Engine. The * Public API of the Pmu Engine is exposed through this object, and any @@ -63,27 +80,37 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelPmu { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct KernelPmu *__nvoc_pbase_KernelPmu; - NV_STATUS (*__kpmuConstructEngine__)(struct OBJGPU *, struct KernelPmu *, ENGDESCRIPTOR); - void (*__kpmuStateDestroy__)(struct OBJGPU *, struct KernelPmu *); - NV_STATUS (*__kpmuStateInitLocked__)(struct OBJGPU *, struct KernelPmu *); - NV_STATUS (*__kpmuStateLoad__)(POBJGPU, struct KernelPmu *, NvU32); - NV_STATUS (*__kpmuStateUnload__)(POBJGPU, struct KernelPmu *, NvU32); - NV_STATUS (*__kpmuStatePreLoad__)(POBJGPU, struct KernelPmu *, NvU32); - NV_STATUS (*__kpmuStatePostUnload__)(POBJGPU, struct KernelPmu *, NvU32); - NV_STATUS (*__kpmuStatePreUnload__)(POBJGPU, struct KernelPmu *, NvU32); - NV_STATUS (*__kpmuStateInitUnlocked__)(POBJGPU, struct KernelPmu *); - void (*__kpmuInitMissing__)(POBJGPU, struct KernelPmu *); - NV_STATUS (*__kpmuStatePreInitLocked__)(POBJGPU, struct KernelPmu *); - NV_STATUS (*__kpmuStatePreInitUnlocked__)(POBJGPU, struct KernelPmu *); - NV_STATUS (*__kpmuStatePostLoad__)(POBJGPU, struct KernelPmu *, NvU32); - NvBool (*__kpmuIsPresent__)(POBJGPU, struct KernelPmu *); - MEMORY_DESCRIPTOR *pPmuRsvdMemdesc; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct KernelPmu *__nvoc_pbase_KernelPmu; // kpmu + + // Vtable with 14 per-object function pointers + NV_STATUS (*__kpmuConstructEngine__)(struct OBJGPU *, struct KernelPmu * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + void (*__kpmuStateDestroy__)(struct OBJGPU *, struct KernelPmu * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kpmuStateInitLocked__)(struct OBJGPU *, struct KernelPmu * /*this*/); // virtual override (engstate) base (engstate) + void (*__kpmuInitMissing__)(POBJGPU, struct KernelPmu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kpmuStatePreInitLocked__)(POBJGPU, struct KernelPmu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kpmuStatePreInitUnlocked__)(POBJGPU, struct KernelPmu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kpmuStateInitUnlocked__)(POBJGPU, struct KernelPmu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kpmuStatePreLoad__)(POBJGPU, struct KernelPmu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kpmuStateLoad__)(POBJGPU, struct KernelPmu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kpmuStatePostLoad__)(POBJGPU, struct KernelPmu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kpmuStatePreUnload__)(POBJGPU, struct KernelPmu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kpmuStateUnload__)(POBJGPU, struct KernelPmu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kpmuStatePostUnload__)(POBJGPU, struct KernelPmu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__kpmuIsPresent__)(POBJGPU, struct KernelPmu * /*this*/); // virtual inherited (engstate) base (engstate) + + // Data members LIBOS_LOG_DECODE logDecode; NvU32 printBufSize; NvU8 *pPrintBuf; @@ -100,6 +127,7 @@ typedef struct KernelPmu KernelPmu; #define __nvoc_class_id_KernelPmu 0xab9d7d #endif /* __nvoc_class_id_KernelPmu */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelPmu; #define __staticCast_KernelPmu(pThis) \ @@ -112,6 +140,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelPmu; ((KernelPmu*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelPmu))) #endif //__nvoc_kern_pmu_h_disabled +// Property macros #define PDB_PROP_KPMU_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_KPMU_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -121,82 +150,100 @@ NV_STATUS __nvoc_objCreate_KernelPmu(KernelPmu**, Dynamic*, NvU32); #define __objCreate_KernelPmu(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelPmu((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define kpmuConstructEngine_FNPTR(pKernelPmu) pKernelPmu->__kpmuConstructEngine__ #define kpmuConstructEngine(pGpu, pKernelPmu, engDesc) kpmuConstructEngine_DISPATCH(pGpu, pKernelPmu, engDesc) +#define kpmuStateDestroy_FNPTR(pKernelPmu) pKernelPmu->__kpmuStateDestroy__ #define kpmuStateDestroy(pGpu, pKernelPmu) kpmuStateDestroy_DISPATCH(pGpu, pKernelPmu) +#define kpmuStateInitLocked_FNPTR(pKernelPmu) pKernelPmu->__kpmuStateInitLocked__ #define kpmuStateInitLocked(pGpu, pKernelPmu) kpmuStateInitLocked_DISPATCH(pGpu, pKernelPmu) -#define kpmuStateLoad(pGpu, pEngstate, arg0) kpmuStateLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kpmuStateUnload(pGpu, pEngstate, arg0) kpmuStateUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kpmuStatePreLoad(pGpu, pEngstate, arg0) kpmuStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kpmuStatePostUnload(pGpu, pEngstate, arg0) kpmuStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kpmuStatePreUnload(pGpu, pEngstate, arg0) kpmuStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kpmuStateInitUnlocked(pGpu, pEngstate) kpmuStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kpmuInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define kpmuInitMissing(pGpu, pEngstate) kpmuInitMissing_DISPATCH(pGpu, pEngstate) +#define kpmuStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define kpmuStatePreInitLocked(pGpu, pEngstate) kpmuStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define kpmuStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define kpmuStatePreInitUnlocked(pGpu, pEngstate) kpmuStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kpmuStatePostLoad(pGpu, pEngstate, arg0) kpmuStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) +#define kpmuStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kpmuStateInitUnlocked(pGpu, pEngstate) kpmuStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kpmuStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kpmuStatePreLoad(pGpu, pEngstate, arg3) kpmuStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kpmuStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define kpmuStateLoad(pGpu, pEngstate, arg3) kpmuStateLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kpmuStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kpmuStatePostLoad(pGpu, pEngstate, arg3) kpmuStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kpmuStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kpmuStatePreUnload(pGpu, pEngstate, arg3) kpmuStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kpmuStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define kpmuStateUnload(pGpu, pEngstate, arg3) kpmuStateUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kpmuStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kpmuStatePostUnload(pGpu, pEngstate, arg3) kpmuStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kpmuIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define kpmuIsPresent(pGpu, pEngstate) kpmuIsPresent_DISPATCH(pGpu, pEngstate) -NV_STATUS kpmuConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelPmu *pKernelPmu, ENGDESCRIPTOR engDesc); +// Dispatch functions static inline NV_STATUS kpmuConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelPmu *pKernelPmu, ENGDESCRIPTOR engDesc) { return pKernelPmu->__kpmuConstructEngine__(pGpu, pKernelPmu, engDesc); } -void kpmuStateDestroy_IMPL(struct OBJGPU *pGpu, struct KernelPmu *pKernelPmu); - static inline void kpmuStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct KernelPmu *pKernelPmu) { pKernelPmu->__kpmuStateDestroy__(pGpu, pKernelPmu); } -NV_STATUS kpmuStateInitLocked_IMPL(struct OBJGPU *pGpu, struct KernelPmu *pKernelPmu); - static inline NV_STATUS kpmuStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelPmu *pKernelPmu) { return pKernelPmu->__kpmuStateInitLocked__(pGpu, pKernelPmu); } -static inline NV_STATUS kpmuStateLoad_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg0) { - return pEngstate->__kpmuStateLoad__(pGpu, pEngstate, arg0); +static inline void kpmuInitMissing_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate) { + pEngstate->__kpmuInitMissing__(pGpu, pEngstate); } -static inline NV_STATUS kpmuStateUnload_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg0) { - return pEngstate->__kpmuStateUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS kpmuStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate) { + return pEngstate->__kpmuStatePreInitLocked__(pGpu, pEngstate); } -static inline NV_STATUS kpmuStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg0) { - return pEngstate->__kpmuStatePreLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS kpmuStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate) { + return pEngstate->__kpmuStatePreInitUnlocked__(pGpu, pEngstate); } -static inline NV_STATUS kpmuStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg0) { - return pEngstate->__kpmuStatePostUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS kpmuStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate) { + return pEngstate->__kpmuStateInitUnlocked__(pGpu, pEngstate); } -static inline NV_STATUS kpmuStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg0) { - return pEngstate->__kpmuStatePreUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS kpmuStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { + return pEngstate->__kpmuStatePreLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kpmuStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate) { - return pEngstate->__kpmuStateInitUnlocked__(pGpu, pEngstate); +static inline NV_STATUS kpmuStateLoad_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { + return pEngstate->__kpmuStateLoad__(pGpu, pEngstate, arg3); } -static inline void kpmuInitMissing_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate) { - pEngstate->__kpmuInitMissing__(pGpu, pEngstate); +static inline NV_STATUS kpmuStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { + return pEngstate->__kpmuStatePostLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kpmuStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate) { - return pEngstate->__kpmuStatePreInitLocked__(pGpu, pEngstate); +static inline NV_STATUS kpmuStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { + return pEngstate->__kpmuStatePreUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kpmuStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate) { - return pEngstate->__kpmuStatePreInitUnlocked__(pGpu, pEngstate); +static inline NV_STATUS kpmuStateUnload_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { + return pEngstate->__kpmuStateUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kpmuStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg0) { - return pEngstate->__kpmuStatePostLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS kpmuStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { + return pEngstate->__kpmuStatePostUnload__(pGpu, pEngstate, arg3); } static inline NvBool kpmuIsPresent_DISPATCH(POBJGPU pGpu, struct KernelPmu *pEngstate) { return pEngstate->__kpmuIsPresent__(pGpu, pEngstate); } +NV_STATUS kpmuConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelPmu *pKernelPmu, ENGDESCRIPTOR engDesc); + +void kpmuStateDestroy_IMPL(struct OBJGPU *pGpu, struct KernelPmu *pKernelPmu); + +NV_STATUS kpmuStateInitLocked_IMPL(struct OBJGPU *pGpu, struct KernelPmu *pKernelPmu); + void kpmuDestruct_IMPL(struct KernelPmu *pKernelPmu); #define __nvoc_kpmuDestruct(pKernelPmu) kpmuDestruct_IMPL(pKernelPmu) @@ -211,6 +258,39 @@ static inline NvU32 kpmuReservedMemorySizeGet(struct KernelPmu *pKernelPmu) { #define kpmuReservedMemorySizeGet(pKernelPmu) kpmuReservedMemorySizeGet_IMPL(pKernelPmu) #endif //__nvoc_kern_pmu_h_disabled +NvU32 kpmuReservedMemoryBackingStoreSizeGet_IMPL(struct KernelPmu *pKernelPmu); + +#ifdef __nvoc_kern_pmu_h_disabled +static inline NvU32 kpmuReservedMemoryBackingStoreSizeGet(struct KernelPmu *pKernelPmu) { + NV_ASSERT_FAILED_PRECOMP("KernelPmu was disabled!"); + return 0; +} +#else //__nvoc_kern_pmu_h_disabled +#define kpmuReservedMemoryBackingStoreSizeGet(pKernelPmu) kpmuReservedMemoryBackingStoreSizeGet_IMPL(pKernelPmu) +#endif //__nvoc_kern_pmu_h_disabled + +NvU32 kpmuReservedMemorySurfacesSizeGet_IMPL(struct KernelPmu *pKernelPmu); + +#ifdef __nvoc_kern_pmu_h_disabled +static inline NvU32 kpmuReservedMemorySurfacesSizeGet(struct KernelPmu *pKernelPmu) { + NV_ASSERT_FAILED_PRECOMP("KernelPmu was disabled!"); + return 0; +} +#else //__nvoc_kern_pmu_h_disabled +#define kpmuReservedMemorySurfacesSizeGet(pKernelPmu) kpmuReservedMemorySurfacesSizeGet_IMPL(pKernelPmu) +#endif //__nvoc_kern_pmu_h_disabled + +NvU32 kpmuReservedMemoryMiscSizeGet_IMPL(struct KernelPmu *pKernelPmu); + +#ifdef __nvoc_kern_pmu_h_disabled +static inline NvU32 kpmuReservedMemoryMiscSizeGet(struct KernelPmu *pKernelPmu) { + NV_ASSERT_FAILED_PRECOMP("KernelPmu was disabled!"); + return 0; +} +#else //__nvoc_kern_pmu_h_disabled +#define kpmuReservedMemoryMiscSizeGet(pKernelPmu) kpmuReservedMemoryMiscSizeGet_IMPL(pKernelPmu) +#endif //__nvoc_kern_pmu_h_disabled + NvU64 kpmuReservedMemoryOffsetGet_IMPL(struct OBJGPU *pGpu, struct KernelPmu *pKernelPmu); #ifdef __nvoc_kern_pmu_h_disabled diff --git a/src/nvidia/generated/g_kernel_bif_nvoc.c b/src/nvidia/generated/g_kernel_bif_nvoc.c index f40dfd9c0f..30982e6380 100644 --- a/src/nvidia/generated/g_kernel_bif_nvoc.c +++ b/src/nvidia/generated/g_kernel_bif_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelBif = /*pExportInfo=*/ &__nvoc_export_info_KernelBif }; -static NV_STATUS __nvoc_thunk_KernelBif_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif, ENGDESCRIPTOR arg0) { - return kbifConstructEngine(pGpu, (struct KernelBif *)(((unsigned char *)pKernelBif) - __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg0); +// 5 down-thunk(s) defined to bridge methods in KernelBif from superclasses + +// kbifConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelBif_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif, ENGDESCRIPTOR arg3) { + return kbifConstructEngine(pGpu, (struct KernelBif *)(((unsigned char *) pKernelBif) - __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelBif_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif) { - return kbifStateInitLocked(pGpu, (struct KernelBif *)(((unsigned char *)pKernelBif) - __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); +// kbifStateInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelBif_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif) { + return kbifStateInitLocked(pGpu, (struct KernelBif *)(((unsigned char *) pKernelBif) - __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_KernelBif_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif, NvU32 arg0) { - return kbifStateLoad(pGpu, (struct KernelBif *)(((unsigned char *)pKernelBif) - __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg0); +// kbifStateLoad: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_KernelBif_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif, NvU32 arg3) { + return kbifStateLoad(pGpu, (struct KernelBif *)(((unsigned char *) pKernelBif) - __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelBif_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif, NvU32 arg0) { - return kbifStatePostLoad(pGpu, (struct KernelBif *)(((unsigned char *)pKernelBif) - __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg0); +// kbifStatePostLoad: virtual halified (2 hals) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_KernelBif_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif, NvU32 arg3) { + return kbifStatePostLoad(pGpu, (struct KernelBif *)(((unsigned char *) pKernelBif) - __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelBif_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif, NvU32 arg0) { - return kbifStateUnload(pGpu, (struct KernelBif *)(((unsigned char *)pKernelBif) - __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg0); +// kbifStateUnload: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_KernelBif_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif, NvU32 arg3) { + return kbifStateUnload(pGpu, (struct KernelBif *)(((unsigned char *) pKernelBif) - __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kbifStatePreLoad(POBJGPU pGpu, struct KernelBif *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg0); + +// 9 up-thunk(s) defined to bridge methods in KernelBif to superclasses + +// kbifInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kbifInitMissing(POBJGPU pGpu, struct KernelBif *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kbifStatePostUnload(POBJGPU pGpu, struct KernelBif *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg0); +// kbifStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStatePreInitLocked(POBJGPU pGpu, struct KernelBif *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_kbifStateDestroy(POBJGPU pGpu, struct KernelBif *pEngstate) { - engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); +// kbifStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStatePreInitUnlocked(POBJGPU pGpu, struct KernelBif *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kbifStatePreUnload(POBJGPU pGpu, struct KernelBif *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg0); +// kbifStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStateInitUnlocked(POBJGPU pGpu, struct KernelBif *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kbifStateInitUnlocked(POBJGPU pGpu, struct KernelBif *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); +// kbifStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStatePreLoad(POBJGPU pGpu, struct KernelBif *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_kbifInitMissing(POBJGPU pGpu, struct KernelBif *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); +// kbifStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStatePreUnload(POBJGPU pGpu, struct KernelBif *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kbifStatePreInitLocked(POBJGPU pGpu, struct KernelBif *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); +// kbifStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStatePostUnload(POBJGPU pGpu, struct KernelBif *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kbifStatePreInitUnlocked(POBJGPU pGpu, struct KernelBif *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); +// kbifStateDestroy: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kbifStateDestroy(POBJGPU pGpu, struct KernelBif *pEngstate) { + engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); } -static NvBool __nvoc_thunk_OBJENGSTATE_kbifIsPresent(POBJGPU pGpu, struct KernelBif *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); +// kbifIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_kbifIsPresent(POBJGPU pGpu, struct KernelBif *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelBif = { /*numEntries=*/ 0, @@ -221,6 +241,17 @@ void __nvoc_init_dataField_KernelBif(KernelBif *pThis, RmHalspecOwner *pRmhalspe { pThis->setProperty(pThis, PDB_PROP_KBIF_FLR_PRE_CONDITIONING_REQUIRED, ((NvBool)(0 != 0))); } + + // NVOC Property Hal field -- PDB_PROP_KBIF_FLR_HANDLED_BY_OS + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ + { + pThis->setProperty(pThis, PDB_PROP_KBIF_FLR_HANDLED_BY_OS, ((NvBool)(0 == 0))); + } + // default + else + { + pThis->setProperty(pThis, PDB_PROP_KBIF_FLR_HANDLED_BY_OS, ((NvBool)(0 != 0))); + } } NV_STATUS __nvoc_ctor_OBJENGSTATE(OBJENGSTATE* ); @@ -237,6 +268,7 @@ NV_STATUS __nvoc_ctor_KernelBif(KernelBif *pThis, RmHalspecOwner *pRmhalspecowne return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -249,14 +281,19 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); + // kbifConstructEngine -- virtual override (engstate) base (engstate) pThis->__kbifConstructEngine__ = &kbifConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelBif_engstateConstructEngine; + // kbifStateInitLocked -- virtual override (engstate) base (engstate) pThis->__kbifStateInitLocked__ = &kbifStateInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelBif_engstateStateInitLocked; - // Hal function -- kbifStateLoad + // kbifStateLoad -- virtual halified (singleton optimized) override (engstate) base (engstate) body pThis->__kbifStateLoad__ = &kbifStateLoad_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelBif_engstateStateLoad; - // Hal function -- kbifStatePostLoad + // kbifStatePostLoad -- virtual halified (2 hals) override (engstate) base (engstate) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbifStatePostLoad__ = &kbifStatePostLoad_56cd7a; @@ -265,11 +302,13 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * { pThis->__kbifStatePostLoad__ = &kbifStatePostLoad_IMPL; } + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelBif_engstateStatePostLoad; - // Hal function -- kbifStateUnload + // kbifStateUnload -- virtual halified (singleton optimized) override (engstate) base (engstate) body pThis->__kbifStateUnload__ = &kbifStateUnload_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelBif_engstateStateUnload; - // Hal function -- kbifGetBusIntfType + // kbifGetBusIntfType -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbifGetBusIntfType__ = &kbifGetBusIntfType_28ceda; @@ -279,17 +318,17 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifGetBusIntfType__ = &kbifGetBusIntfType_2f2c74; } - // Hal function -- kbifInitDmaCaps + // kbifInitDmaCaps -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__kbifInitDmaCaps__ = &kbifInitDmaCaps_VGPUSTUB; + pThis->__kbifInitDmaCaps__ = &kbifInitDmaCaps_VF; } else { pThis->__kbifInitDmaCaps__ = &kbifInitDmaCaps_IMPL; } - // Hal function -- kbifSavePcieConfigRegisters + // kbifSavePcieConfigRegisters -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifSavePcieConfigRegisters__ = &kbifSavePcieConfigRegisters_GH100; @@ -299,7 +338,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifSavePcieConfigRegisters__ = &kbifSavePcieConfigRegisters_GM107; } - // Hal function -- kbifRestorePcieConfigRegisters + // kbifRestorePcieConfigRegisters -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifRestorePcieConfigRegisters__ = &kbifRestorePcieConfigRegisters_GH100; @@ -309,7 +348,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifRestorePcieConfigRegisters__ = &kbifRestorePcieConfigRegisters_GM107; } - // Hal function -- kbifGetXveStatusBits + // kbifGetXveStatusBits -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifGetXveStatusBits__ = &kbifGetXveStatusBits_GH100; @@ -319,7 +358,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifGetXveStatusBits__ = &kbifGetXveStatusBits_GM107; } - // Hal function -- kbifClearXveStatus + // kbifClearXveStatus -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifClearXveStatus__ = &kbifClearXveStatus_GH100; @@ -329,7 +368,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifClearXveStatus__ = &kbifClearXveStatus_GM107; } - // Hal function -- kbifGetXveAerBits + // kbifGetXveAerBits -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifGetXveAerBits__ = &kbifGetXveAerBits_GH100; @@ -339,7 +378,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifGetXveAerBits__ = &kbifGetXveAerBits_GM107; } - // Hal function -- kbifClearXveAer + // kbifClearXveAer -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifClearXveAer__ = &kbifClearXveAer_GH100; @@ -349,7 +388,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifClearXveAer__ = &kbifClearXveAer_GM107; } - // Hal function -- kbifGetPcieConfigAccessTestRegisters + // kbifGetPcieConfigAccessTestRegisters -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifGetPcieConfigAccessTestRegisters__ = &kbifGetPcieConfigAccessTestRegisters_b3696a; @@ -359,7 +398,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifGetPcieConfigAccessTestRegisters__ = &kbifGetPcieConfigAccessTestRegisters_GM107; } - // Hal function -- kbifVerifyPcieConfigAccessTestRegisters + // kbifVerifyPcieConfigAccessTestRegisters -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifVerifyPcieConfigAccessTestRegisters__ = &kbifVerifyPcieConfigAccessTestRegisters_56cd7a; @@ -369,7 +408,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifVerifyPcieConfigAccessTestRegisters__ = &kbifVerifyPcieConfigAccessTestRegisters_GM107; } - // Hal function -- kbifRearmMSI + // kbifRearmMSI -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifRearmMSI__ = &kbifRearmMSI_f2d351; @@ -379,7 +418,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifRearmMSI__ = &kbifRearmMSI_GM107; } - // Hal function -- kbifIsMSIEnabledInHW + // kbifIsMSIEnabledInHW -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifIsMSIEnabledInHW__ = &kbifIsMSIEnabledInHW_GH100; @@ -389,7 +428,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifIsMSIEnabledInHW__ = &kbifIsMSIEnabledInHW_GM107; } - // Hal function -- kbifIsMSIXEnabledInHW + // kbifIsMSIXEnabledInHW -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifIsMSIXEnabledInHW__ = &kbifIsMSIXEnabledInHW_GH100; @@ -399,7 +438,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifIsMSIXEnabledInHW__ = &kbifIsMSIXEnabledInHW_TU102; } - // Hal function -- kbifIsPciIoAccessEnabled + // kbifIsPciIoAccessEnabled -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ { pThis->__kbifIsPciIoAccessEnabled__ = &kbifIsPciIoAccessEnabled_491d52; @@ -409,7 +448,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifIsPciIoAccessEnabled__ = &kbifIsPciIoAccessEnabled_GM107; } - // Hal function -- kbifIs3dController + // kbifIs3dController -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifIs3dController__ = &kbifIs3dController_GH100; @@ -419,7 +458,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifIs3dController__ = &kbifIs3dController_GM107; } - // Hal function -- kbifExecC73War + // kbifExecC73War -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifExecC73War__ = &kbifExecC73War_b3696a; @@ -429,7 +468,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifExecC73War__ = &kbifExecC73War_GM107; } - // Hal function -- kbifEnableExtendedTagSupport + // kbifEnableExtendedTagSupport -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifEnableExtendedTagSupport__ = &kbifEnableExtendedTagSupport_GH100; @@ -440,7 +479,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifEnableExtendedTagSupport__ = &kbifEnableExtendedTagSupport_b3696a; } - // Hal function -- kbifPcieConfigEnableRelaxedOrdering + // kbifPcieConfigEnableRelaxedOrdering -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifPcieConfigEnableRelaxedOrdering__ = &kbifPcieConfigEnableRelaxedOrdering_GH100; @@ -450,7 +489,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifPcieConfigEnableRelaxedOrdering__ = &kbifPcieConfigEnableRelaxedOrdering_GM107; } - // Hal function -- kbifPcieConfigDisableRelaxedOrdering + // kbifPcieConfigDisableRelaxedOrdering -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifPcieConfigDisableRelaxedOrdering__ = &kbifPcieConfigDisableRelaxedOrdering_GH100; @@ -460,7 +499,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifPcieConfigDisableRelaxedOrdering__ = &kbifPcieConfigDisableRelaxedOrdering_GM107; } - // Hal function -- kbifInitRelaxedOrderingFromEmulatedConfigSpace + // kbifInitRelaxedOrderingFromEmulatedConfigSpace -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbifInitRelaxedOrderingFromEmulatedConfigSpace__ = &kbifInitRelaxedOrderingFromEmulatedConfigSpace_b3696a; @@ -478,7 +517,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * } } - // Hal function -- kbifEnableNoSnoop + // kbifEnableNoSnoop -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifEnableNoSnoop__ = &kbifEnableNoSnoop_GH100; @@ -488,7 +527,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifEnableNoSnoop__ = &kbifEnableNoSnoop_GM107; } - // Hal function -- kbifApplyWARBug3208922 + // kbifApplyWARBug3208922 -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x100003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GH100 */ { pThis->__kbifApplyWARBug3208922__ = &kbifApplyWARBug3208922_b3696a; @@ -498,7 +537,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifApplyWARBug3208922__ = &kbifApplyWARBug3208922_GA100; } - // Hal function -- kbifProbePcieReqAtomicCaps + // kbifProbePcieReqAtomicCaps -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbifProbePcieReqAtomicCaps__ = &kbifProbePcieReqAtomicCaps_b3696a; @@ -516,7 +555,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * } } - // Hal function -- kbifEnablePcieAtomics + // kbifEnablePcieAtomics -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifEnablePcieAtomics__ = &kbifEnablePcieAtomics_GH100; @@ -527,7 +566,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifEnablePcieAtomics__ = &kbifEnablePcieAtomics_b3696a; } - // Hal function -- kbifDoFunctionLevelReset + // kbifDoFunctionLevelReset -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifDoFunctionLevelReset__ = &kbifDoFunctionLevelReset_GH100; @@ -537,7 +576,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifDoFunctionLevelReset__ = &kbifDoFunctionLevelReset_TU102; } - // Hal function -- kbifInitXveRegMap + // kbifInitXveRegMap -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kbifInitXveRegMap__ = &kbifInitXveRegMap_TU102; @@ -547,7 +586,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifInitXveRegMap__ = &kbifInitXveRegMap_GA102; } - // Hal function -- kbifGetMSIXTableVectorControlSize + // kbifGetMSIXTableVectorControlSize -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifGetMSIXTableVectorControlSize__ = &kbifGetMSIXTableVectorControlSize_GH100; @@ -557,7 +596,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifGetMSIXTableVectorControlSize__ = &kbifGetMSIXTableVectorControlSize_TU102; } - // Hal function -- kbifSaveMsixTable + // kbifSaveMsixTable -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifSaveMsixTable__ = &kbifSaveMsixTable_GH100; @@ -568,7 +607,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifSaveMsixTable__ = &kbifSaveMsixTable_46f6a7; } - // Hal function -- kbifRestoreMsixTable + // kbifRestoreMsixTable -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifRestoreMsixTable__ = &kbifRestoreMsixTable_GH100; @@ -579,7 +618,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifRestoreMsixTable__ = &kbifRestoreMsixTable_46f6a7; } - // Hal function -- kbifConfigAccessWait + // kbifConfigAccessWait -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifConfigAccessWait__ = &kbifConfigAccessWait_GH100; @@ -590,7 +629,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifConfigAccessWait__ = &kbifConfigAccessWait_46f6a7; } - // Hal function -- kbifGetPciConfigSpacePriMirror + // kbifGetPciConfigSpacePriMirror -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifGetPciConfigSpacePriMirror__ = &kbifGetPciConfigSpacePriMirror_GH100; @@ -600,7 +639,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifGetPciConfigSpacePriMirror__ = &kbifGetPciConfigSpacePriMirror_GM107; } - // Hal function -- kbifGetBusOptionsAddr + // kbifGetBusOptionsAddr -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifGetBusOptionsAddr__ = &kbifGetBusOptionsAddr_GH100; @@ -610,7 +649,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifGetBusOptionsAddr__ = &kbifGetBusOptionsAddr_GM107; } - // Hal function -- kbifPreOsGlobalErotGrantRequest + // kbifPreOsGlobalErotGrantRequest -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f00000UL) )) /* ChipHal: AD102 | AD103 | AD104 | AD106 | AD107 */ { pThis->__kbifPreOsGlobalErotGrantRequest__ = &kbifPreOsGlobalErotGrantRequest_AD102; @@ -621,7 +660,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifPreOsGlobalErotGrantRequest__ = &kbifPreOsGlobalErotGrantRequest_56cd7a; } - // Hal function -- kbifStopSysMemRequests + // kbifStopSysMemRequests -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kbifStopSysMemRequests__ = &kbifStopSysMemRequests_56cd7a; @@ -638,7 +677,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * } } - // Hal function -- kbifWaitForTransactionsComplete + // kbifWaitForTransactionsComplete -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifWaitForTransactionsComplete__ = &kbifWaitForTransactionsComplete_GH100; @@ -648,7 +687,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifWaitForTransactionsComplete__ = &kbifWaitForTransactionsComplete_TU102; } - // Hal function -- kbifTriggerFlr + // kbifTriggerFlr -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifTriggerFlr__ = &kbifTriggerFlr_GH100; @@ -658,7 +697,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifTriggerFlr__ = &kbifTriggerFlr_TU102; } - // Hal function -- kbifCacheFlrSupport + // kbifCacheFlrSupport -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifCacheFlrSupport__ = &kbifCacheFlrSupport_GH100; @@ -668,7 +707,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifCacheFlrSupport__ = &kbifCacheFlrSupport_TU102; } - // Hal function -- kbifCache64bBar0Support + // kbifCache64bBar0Support -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifCache64bBar0Support__ = &kbifCache64bBar0Support_GH100; @@ -683,7 +722,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifCache64bBar0Support__ = &kbifCache64bBar0Support_b3696a; } - // Hal function -- kbifCacheVFInfo + // kbifCacheVFInfo -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifCacheVFInfo__ = &kbifCacheVFInfo_GH100; @@ -693,7 +732,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifCacheVFInfo__ = &kbifCacheVFInfo_TU102; } - // Hal function -- kbifRestoreBar0 + // kbifRestoreBar0 -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kbifRestoreBar0__ = &kbifRestoreBar0_GM107; @@ -703,7 +742,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifRestoreBar0__ = &kbifRestoreBar0_GA100; } - // Hal function -- kbifAnyBarsAreValid + // kbifAnyBarsAreValid -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kbifAnyBarsAreValid__ = &kbifAnyBarsAreValid_GM107; @@ -713,7 +752,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifAnyBarsAreValid__ = &kbifAnyBarsAreValid_GA100; } - // Hal function -- kbifRestoreBarsAndCommand + // kbifRestoreBarsAndCommand -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifRestoreBarsAndCommand__ = &kbifRestoreBarsAndCommand_GH100; @@ -727,7 +766,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifRestoreBarsAndCommand__ = &kbifRestoreBarsAndCommand_GA100; } - // Hal function -- kbifStoreBarRegOffsets + // kbifStoreBarRegOffsets -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ { pThis->__kbifStoreBarRegOffsets__ = &kbifStoreBarRegOffsets_GA100; @@ -738,7 +777,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifStoreBarRegOffsets__ = &kbifStoreBarRegOffsets_b3696a; } - // Hal function -- kbifInit + // kbifInit -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifInit__ = &kbifInit_GH100; @@ -748,7 +787,46 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifInit__ = &kbifInit_GM107; } - // Hal function -- kbifGetValidEnginesToReset + // kbifPrepareForFullChipReset -- halified (3 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ + { + pThis->__kbifPrepareForFullChipReset__ = &kbifPrepareForFullChipReset_GH100; + } + else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ + { + pThis->__kbifPrepareForFullChipReset__ = &kbifPrepareForFullChipReset_GM107; + } + else + { + pThis->__kbifPrepareForFullChipReset__ = &kbifPrepareForFullChipReset_GA100; + } + + // kbifDoFullChipReset -- halified (3 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ + { + pThis->__kbifDoFullChipReset__ = &kbifDoFullChipReset_GH100; + } + else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ + { + pThis->__kbifDoFullChipReset__ = &kbifDoFullChipReset_GP10X; + } + else + { + pThis->__kbifDoFullChipReset__ = &kbifDoFullChipReset_GA100; + } + + // kbifResetHostEngines -- halified (2 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ + { + pThis->__kbifResetHostEngines__ = &kbifResetHostEngines_GA100; + } + // default + else + { + pThis->__kbifResetHostEngines__ = &kbifResetHostEngines_b3696a; + } + + // kbifGetValidEnginesToReset -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kbifGetValidEnginesToReset__ = &kbifGetValidEnginesToReset_TU102; @@ -758,7 +836,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifGetValidEnginesToReset__ = &kbifGetValidEnginesToReset_GA100; } - // Hal function -- kbifGetValidDeviceEnginesToReset + // kbifGetValidDeviceEnginesToReset -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x100003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GH100 */ { pThis->__kbifGetValidDeviceEnginesToReset__ = &kbifGetValidDeviceEnginesToReset_15a734; @@ -768,7 +846,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifGetValidDeviceEnginesToReset__ = &kbifGetValidDeviceEnginesToReset_GA100; } - // Hal function -- kbifGetEccCounts + // kbifGetEccCounts -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kbifGetEccCounts__ = &kbifGetEccCounts_GH100; @@ -779,36 +857,70 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifGetEccCounts__ = &kbifGetEccCounts_4a4dee; } - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelBif_engstateConstructEngine; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_thunk_KernelBif_engstateStateInitLocked; + // kbifAllowGpuOutboundPcieAtomics -- halified (2 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ + { + pThis->__kbifAllowGpuOutboundPcieAtomics__ = &kbifAllowGpuOutboundPcieAtomics_GH100; + } + // default + else + { + pThis->__kbifAllowGpuOutboundPcieAtomics__ = &kbifAllowGpuOutboundPcieAtomics_491d52; + } - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_thunk_KernelBif_engstateStateLoad; + // kbifClearDownstreamReadCounter -- halified (2 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x100003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GH100 */ + { + pThis->__kbifClearDownstreamReadCounter__ = &kbifClearDownstreamReadCounter_b3696a; + } + else + { + pThis->__kbifClearDownstreamReadCounter__ = &kbifClearDownstreamReadCounter_GA100; + } - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_thunk_KernelBif_engstateStatePostLoad; + // kbifDoSecondaryBusHotReset -- halified (2 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ + { + pThis->__kbifDoSecondaryBusHotReset__ = &kbifDoSecondaryBusHotReset_GH100; + } + else + { + pThis->__kbifDoSecondaryBusHotReset__ = &kbifDoSecondaryBusHotReset_GM107; + } - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_thunk_KernelBif_engstateStateUnload; + // kbifInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__kbifInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kbifInitMissing; - pThis->__kbifStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_kbifStatePreLoad; + // kbifStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__kbifStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStatePreInitLocked; - pThis->__kbifStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_kbifStatePostUnload; + // kbifStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kbifStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStatePreInitUnlocked; - pThis->__kbifStateDestroy__ = &__nvoc_thunk_OBJENGSTATE_kbifStateDestroy; + // kbifStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kbifStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStateInitUnlocked; - pThis->__kbifStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_kbifStatePreUnload; + // kbifStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__kbifStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStatePreLoad; - pThis->__kbifStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kbifStateInitUnlocked; + // kbifStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__kbifStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStatePreUnload; - pThis->__kbifInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kbifInitMissing; + // kbifStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__kbifStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStatePostUnload; - pThis->__kbifStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kbifStatePreInitLocked; + // kbifStateDestroy -- virtual inherited (engstate) base (engstate) + pThis->__kbifStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStateDestroy; - pThis->__kbifStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kbifStatePreInitUnlocked; + // kbifIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__kbifIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kbifIsPresent; +} // End __nvoc_init_funcTable_KernelBif_1 with approximately 133 basic block(s). - pThis->__kbifIsPresent__ = &__nvoc_thunk_OBJENGSTATE_kbifIsPresent; -} +// Initialize vtable(s) for 67 virtual method(s). void __nvoc_init_funcTable_KernelBif(KernelBif *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 67 per-object function pointer(s). __nvoc_init_funcTable_KernelBif_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_bif_nvoc.h b/src/nvidia/generated/g_kernel_bif_nvoc.h index 1947756892..9fe866a84a 100644 --- a/src/nvidia/generated/g_kernel_bif_nvoc.h +++ b/src/nvidia/generated/g_kernel_bif_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_BIF_NVOC_H_ #define _G_KERNEL_BIF_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -31,6 +38,7 @@ extern "C" { /* ------------------------ Includes ---------------------------------------- */ +#pragma once #include "g_kernel_bif_nvoc.h" #ifndef KERNEL_BIF_H @@ -129,73 +137,90 @@ typedef struct KERNEL_HOST_VGPU_DEVICE KERNEL_HOST_VGPU_DEVICE; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelBif { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct KernelBif *__nvoc_pbase_KernelBif; - NV_STATUS (*__kbifConstructEngine__)(struct OBJGPU *, struct KernelBif *, ENGDESCRIPTOR); - NV_STATUS (*__kbifStateInitLocked__)(struct OBJGPU *, struct KernelBif *); - NV_STATUS (*__kbifStateLoad__)(struct OBJGPU *, struct KernelBif *, NvU32); - NV_STATUS (*__kbifStatePostLoad__)(struct OBJGPU *, struct KernelBif *, NvU32); - NV_STATUS (*__kbifStateUnload__)(struct OBJGPU *, struct KernelBif *, NvU32); - NvU32 (*__kbifGetBusIntfType__)(struct KernelBif *); - void (*__kbifInitDmaCaps__)(struct OBJGPU *, struct KernelBif *); - NV_STATUS (*__kbifSavePcieConfigRegisters__)(struct OBJGPU *, struct KernelBif *); - NV_STATUS (*__kbifRestorePcieConfigRegisters__)(struct OBJGPU *, struct KernelBif *); - NV_STATUS (*__kbifGetXveStatusBits__)(struct OBJGPU *, struct KernelBif *, NvU32 *, NvU32 *); - NV_STATUS (*__kbifClearXveStatus__)(struct OBJGPU *, struct KernelBif *, NvU32 *); - NV_STATUS (*__kbifGetXveAerBits__)(struct OBJGPU *, struct KernelBif *, NvU32 *); - NV_STATUS (*__kbifClearXveAer__)(struct OBJGPU *, struct KernelBif *, NvU32); - void (*__kbifGetPcieConfigAccessTestRegisters__)(struct OBJGPU *, struct KernelBif *, NvU32 *, NvU32 *); - NV_STATUS (*__kbifVerifyPcieConfigAccessTestRegisters__)(struct OBJGPU *, struct KernelBif *, NvU32, NvU32); - void (*__kbifRearmMSI__)(struct OBJGPU *, struct KernelBif *); - NvBool (*__kbifIsMSIEnabledInHW__)(struct OBJGPU *, struct KernelBif *); - NvBool (*__kbifIsMSIXEnabledInHW__)(struct OBJGPU *, struct KernelBif *); - NvBool (*__kbifIsPciIoAccessEnabled__)(struct OBJGPU *, struct KernelBif *); - NvBool (*__kbifIs3dController__)(struct OBJGPU *, struct KernelBif *); - void (*__kbifExecC73War__)(struct OBJGPU *, struct KernelBif *); - void (*__kbifEnableExtendedTagSupport__)(struct OBJGPU *, struct KernelBif *); - void (*__kbifPcieConfigEnableRelaxedOrdering__)(struct OBJGPU *, struct KernelBif *); - void (*__kbifPcieConfigDisableRelaxedOrdering__)(struct OBJGPU *, struct KernelBif *); - void (*__kbifInitRelaxedOrderingFromEmulatedConfigSpace__)(struct OBJGPU *, struct KernelBif *); - NV_STATUS (*__kbifEnableNoSnoop__)(struct OBJGPU *, struct KernelBif *, NvBool); - void (*__kbifApplyWARBug3208922__)(struct OBJGPU *, struct KernelBif *); - void (*__kbifProbePcieReqAtomicCaps__)(struct OBJGPU *, struct KernelBif *); - void (*__kbifEnablePcieAtomics__)(struct OBJGPU *, struct KernelBif *); - NV_STATUS (*__kbifDoFunctionLevelReset__)(struct OBJGPU *, struct KernelBif *); - NV_STATUS (*__kbifInitXveRegMap__)(struct OBJGPU *, struct KernelBif *, NvU8); - NvU32 (*__kbifGetMSIXTableVectorControlSize__)(struct OBJGPU *, struct KernelBif *); - NV_STATUS (*__kbifSaveMsixTable__)(struct OBJGPU *, struct KernelBif *); - NV_STATUS (*__kbifRestoreMsixTable__)(struct OBJGPU *, struct KernelBif *); - NV_STATUS (*__kbifConfigAccessWait__)(struct OBJGPU *, struct KernelBif *, RMTIMEOUT *); - NV_STATUS (*__kbifGetPciConfigSpacePriMirror__)(struct OBJGPU *, struct KernelBif *, NvU32 *, NvU32 *); - NV_STATUS (*__kbifGetBusOptionsAddr__)(struct OBJGPU *, struct KernelBif *, BUS_OPTIONS, NvU32 *); - NV_STATUS (*__kbifPreOsGlobalErotGrantRequest__)(struct OBJGPU *, struct KernelBif *); - NV_STATUS (*__kbifStopSysMemRequests__)(struct OBJGPU *, struct KernelBif *, NvBool); - NV_STATUS (*__kbifWaitForTransactionsComplete__)(struct OBJGPU *, struct KernelBif *); - NV_STATUS (*__kbifTriggerFlr__)(struct OBJGPU *, struct KernelBif *); - void (*__kbifCacheFlrSupport__)(struct OBJGPU *, struct KernelBif *); - void (*__kbifCache64bBar0Support__)(struct OBJGPU *, struct KernelBif *); - void (*__kbifCacheVFInfo__)(struct OBJGPU *, struct KernelBif *); - void (*__kbifRestoreBar0__)(struct OBJGPU *, struct KernelBif *, void *, NvU32 *); - NvBool (*__kbifAnyBarsAreValid__)(struct OBJGPU *, struct KernelBif *); - NV_STATUS (*__kbifRestoreBarsAndCommand__)(struct OBJGPU *, struct KernelBif *); - void (*__kbifStoreBarRegOffsets__)(struct OBJGPU *, struct KernelBif *, NvU32); - NV_STATUS (*__kbifInit__)(struct OBJGPU *, struct KernelBif *); - NvU32 (*__kbifGetValidEnginesToReset__)(struct OBJGPU *, struct KernelBif *); - NvU32 (*__kbifGetValidDeviceEnginesToReset__)(struct OBJGPU *, struct KernelBif *); - NvU32 (*__kbifGetEccCounts__)(struct OBJGPU *, struct KernelBif *); - NV_STATUS (*__kbifStatePreLoad__)(POBJGPU, struct KernelBif *, NvU32); - NV_STATUS (*__kbifStatePostUnload__)(POBJGPU, struct KernelBif *, NvU32); - void (*__kbifStateDestroy__)(POBJGPU, struct KernelBif *); - NV_STATUS (*__kbifStatePreUnload__)(POBJGPU, struct KernelBif *, NvU32); - NV_STATUS (*__kbifStateInitUnlocked__)(POBJGPU, struct KernelBif *); - void (*__kbifInitMissing__)(POBJGPU, struct KernelBif *); - NV_STATUS (*__kbifStatePreInitLocked__)(POBJGPU, struct KernelBif *); - NV_STATUS (*__kbifStatePreInitUnlocked__)(POBJGPU, struct KernelBif *); - NvBool (*__kbifIsPresent__)(POBJGPU, struct KernelBif *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct KernelBif *__nvoc_pbase_KernelBif; // kbif + + // Vtable with 67 per-object function pointers + NV_STATUS (*__kbifConstructEngine__)(struct OBJGPU *, struct KernelBif * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kbifStateInitLocked__)(struct OBJGPU *, struct KernelBif * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kbifStateLoad__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kbifStatePostLoad__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32); // virtual halified (2 hals) override (engstate) base (engstate) body + NV_STATUS (*__kbifStateUnload__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NvU32 (*__kbifGetBusIntfType__)(struct KernelBif * /*this*/); // halified (2 hals) body + void (*__kbifInitDmaCaps__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) + NV_STATUS (*__kbifSavePcieConfigRegisters__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbifRestorePcieConfigRegisters__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbifGetXveStatusBits__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32 *, NvU32 *); // halified (2 hals) body + NV_STATUS (*__kbifClearXveStatus__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32 *); // halified (2 hals) body + NV_STATUS (*__kbifGetXveAerBits__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32 *); // halified (2 hals) body + NV_STATUS (*__kbifClearXveAer__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32); // halified (2 hals) body + void (*__kbifGetPcieConfigAccessTestRegisters__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32 *, NvU32 *); // halified (2 hals) body + NV_STATUS (*__kbifVerifyPcieConfigAccessTestRegisters__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32, NvU32); // halified (2 hals) body + void (*__kbifRearmMSI__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + NvBool (*__kbifIsMSIEnabledInHW__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + NvBool (*__kbifIsMSIXEnabledInHW__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + NvBool (*__kbifIsPciIoAccessEnabled__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + NvBool (*__kbifIs3dController__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + void (*__kbifExecC73War__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + void (*__kbifEnableExtendedTagSupport__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + void (*__kbifPcieConfigEnableRelaxedOrdering__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + void (*__kbifPcieConfigDisableRelaxedOrdering__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + void (*__kbifInitRelaxedOrderingFromEmulatedConfigSpace__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (3 hals) body + NV_STATUS (*__kbifEnableNoSnoop__)(struct OBJGPU *, struct KernelBif * /*this*/, NvBool); // halified (2 hals) body + void (*__kbifApplyWARBug3208922__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + void (*__kbifProbePcieReqAtomicCaps__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (3 hals) body + void (*__kbifEnablePcieAtomics__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbifDoFunctionLevelReset__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbifInitXveRegMap__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU8); // halified (2 hals) body + NvU32 (*__kbifGetMSIXTableVectorControlSize__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbifSaveMsixTable__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbifRestoreMsixTable__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbifConfigAccessWait__)(struct OBJGPU *, struct KernelBif * /*this*/, RMTIMEOUT *); // halified (2 hals) body + NV_STATUS (*__kbifGetPciConfigSpacePriMirror__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32 *, NvU32 *); // halified (2 hals) body + NV_STATUS (*__kbifGetBusOptionsAddr__)(struct OBJGPU *, struct KernelBif * /*this*/, BUS_OPTIONS, NvU32 *); // halified (2 hals) body + NV_STATUS (*__kbifPreOsGlobalErotGrantRequest__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbifStopSysMemRequests__)(struct OBJGPU *, struct KernelBif * /*this*/, NvBool); // halified (3 hals) body + NV_STATUS (*__kbifWaitForTransactionsComplete__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbifTriggerFlr__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + void (*__kbifCacheFlrSupport__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + void (*__kbifCache64bBar0Support__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (3 hals) body + void (*__kbifCacheVFInfo__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + void (*__kbifRestoreBar0__)(struct OBJGPU *, struct KernelBif * /*this*/, void *, NvU32 *); // halified (2 hals) body + NvBool (*__kbifAnyBarsAreValid__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbifRestoreBarsAndCommand__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (3 hals) body + void (*__kbifStoreBarRegOffsets__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__kbifInit__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + void (*__kbifPrepareForFullChipReset__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (3 hals) body + NV_STATUS (*__kbifDoFullChipReset__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (3 hals) body + void (*__kbifResetHostEngines__)(struct OBJGPU *, struct KernelBif * /*this*/, struct KernelMc *); // halified (2 hals) body + NvU32 (*__kbifGetValidEnginesToReset__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + NvU32 (*__kbifGetValidDeviceEnginesToReset__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + NvU32 (*__kbifGetEccCounts__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + NvBool (*__kbifAllowGpuOutboundPcieAtomics__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + void (*__kbifClearDownstreamReadCounter__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbifDoSecondaryBusHotReset__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + void (*__kbifInitMissing__)(POBJGPU, struct KernelBif * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kbifStatePreInitLocked__)(POBJGPU, struct KernelBif * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kbifStatePreInitUnlocked__)(POBJGPU, struct KernelBif * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kbifStateInitUnlocked__)(POBJGPU, struct KernelBif * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kbifStatePreLoad__)(POBJGPU, struct KernelBif * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kbifStatePreUnload__)(POBJGPU, struct KernelBif * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kbifStatePostUnload__)(POBJGPU, struct KernelBif * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__kbifStateDestroy__)(POBJGPU, struct KernelBif * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__kbifIsPresent__)(POBJGPU, struct KernelBif * /*this*/); // virtual inherited (engstate) base (engstate) + + // 25 PDB properties NvBool PDB_PROP_KBIF_CHECK_IF_GPU_EXISTS_DEF; NvBool PDB_PROP_KBIF_IS_MSI_ENABLED; NvBool PDB_PROP_KBIF_IS_MSI_CACHED; @@ -220,6 +245,9 @@ struct KernelBif { NvBool PDB_PROP_KBIF_SECONDARY_BUS_RESET_ENABLED; NvBool PDB_PROP_KBIF_FORCE_PCIE_CONFIG_SAVE; NvBool PDB_PROP_KBIF_FLR_PRE_CONDITIONING_REQUIRED; + NvBool PDB_PROP_KBIF_FLR_HANDLED_BY_OS; + + // Data members NvU32 dmaCaps; RmPhysAddr dmaWindowStartAddress; NvU32 p2pOverride; @@ -246,6 +274,7 @@ typedef struct KernelBif KernelBif; #define __nvoc_class_id_KernelBif 0xdbe523 #endif /* __nvoc_class_id_KernelBif */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelBif; #define __staticCast_KernelBif(pThis) \ @@ -258,6 +287,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelBif; ((KernelBif*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelBif))) #endif //__nvoc_kernel_bif_h_disabled +// Property macros #define PDB_PROP_KBIF_CHECK_IF_GPU_EXISTS_DEF_BASE_CAST #define PDB_PROP_KBIF_CHECK_IF_GPU_EXISTS_DEF_BASE_NAME PDB_PROP_KBIF_CHECK_IF_GPU_EXISTS_DEF #define PDB_PROP_KBIF_IS_C2C_LINK_UP_BASE_CAST @@ -290,6 +320,8 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelBif; #define PDB_PROP_KBIF_SYSTEM_ACCESS_DISABLED_BASE_NAME PDB_PROP_KBIF_SYSTEM_ACCESS_DISABLED #define PDB_PROP_KBIF_FLR_PRE_CONDITIONING_REQUIRED_BASE_CAST #define PDB_PROP_KBIF_FLR_PRE_CONDITIONING_REQUIRED_BASE_NAME PDB_PROP_KBIF_FLR_PRE_CONDITIONING_REQUIRED +#define PDB_PROP_KBIF_FLR_HANDLED_BY_OS_BASE_CAST +#define PDB_PROP_KBIF_FLR_HANDLED_BY_OS_BASE_NAME PDB_PROP_KBIF_FLR_HANDLED_BY_OS #define PDB_PROP_KBIF_PCIE_RELAXED_ORDERING_SET_IN_EMULATED_CONFIG_SPACE_BASE_CAST #define PDB_PROP_KBIF_PCIE_RELAXED_ORDERING_SET_IN_EMULATED_CONFIG_SPACE_BASE_NAME PDB_PROP_KBIF_PCIE_RELAXED_ORDERING_SET_IN_EMULATED_CONFIG_SPACE #define PDB_PROP_KBIF_GCX_PMU_CFG_SPACE_RESTORE_BASE_CAST @@ -315,133 +347,484 @@ NV_STATUS __nvoc_objCreate_KernelBif(KernelBif**, Dynamic*, NvU32); #define __objCreate_KernelBif(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelBif((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define kbifConstructEngine(pGpu, pKernelBif, arg0) kbifConstructEngine_DISPATCH(pGpu, pKernelBif, arg0) + +// Wrapper macros +#define kbifConstructEngine_FNPTR(pKernelBif) pKernelBif->__kbifConstructEngine__ +#define kbifConstructEngine(pGpu, pKernelBif, arg3) kbifConstructEngine_DISPATCH(pGpu, pKernelBif, arg3) +#define kbifStateInitLocked_FNPTR(pKernelBif) pKernelBif->__kbifStateInitLocked__ #define kbifStateInitLocked(pGpu, pKernelBif) kbifStateInitLocked_DISPATCH(pGpu, pKernelBif) -#define kbifStateLoad(pGpu, pKernelBif, arg0) kbifStateLoad_DISPATCH(pGpu, pKernelBif, arg0) -#define kbifStateLoad_HAL(pGpu, pKernelBif, arg0) kbifStateLoad_DISPATCH(pGpu, pKernelBif, arg0) -#define kbifStatePostLoad(pGpu, pKernelBif, arg0) kbifStatePostLoad_DISPATCH(pGpu, pKernelBif, arg0) -#define kbifStatePostLoad_HAL(pGpu, pKernelBif, arg0) kbifStatePostLoad_DISPATCH(pGpu, pKernelBif, arg0) -#define kbifStateUnload(pGpu, pKernelBif, arg0) kbifStateUnload_DISPATCH(pGpu, pKernelBif, arg0) -#define kbifStateUnload_HAL(pGpu, pKernelBif, arg0) kbifStateUnload_DISPATCH(pGpu, pKernelBif, arg0) +#define kbifStateLoad_FNPTR(pKernelBif) pKernelBif->__kbifStateLoad__ +#define kbifStateLoad(pGpu, pKernelBif, arg3) kbifStateLoad_DISPATCH(pGpu, pKernelBif, arg3) +#define kbifStateLoad_HAL(pGpu, pKernelBif, arg3) kbifStateLoad_DISPATCH(pGpu, pKernelBif, arg3) +#define kbifStatePostLoad_FNPTR(pKernelBif) pKernelBif->__kbifStatePostLoad__ +#define kbifStatePostLoad(pGpu, pKernelBif, arg3) kbifStatePostLoad_DISPATCH(pGpu, pKernelBif, arg3) +#define kbifStatePostLoad_HAL(pGpu, pKernelBif, arg3) kbifStatePostLoad_DISPATCH(pGpu, pKernelBif, arg3) +#define kbifStateUnload_FNPTR(pKernelBif) pKernelBif->__kbifStateUnload__ +#define kbifStateUnload(pGpu, pKernelBif, arg3) kbifStateUnload_DISPATCH(pGpu, pKernelBif, arg3) +#define kbifStateUnload_HAL(pGpu, pKernelBif, arg3) kbifStateUnload_DISPATCH(pGpu, pKernelBif, arg3) +#define kbifGetBusIntfType_FNPTR(pKernelBif) pKernelBif->__kbifGetBusIntfType__ #define kbifGetBusIntfType(pKernelBif) kbifGetBusIntfType_DISPATCH(pKernelBif) #define kbifGetBusIntfType_HAL(pKernelBif) kbifGetBusIntfType_DISPATCH(pKernelBif) +#define kbifInitDmaCaps_FNPTR(pKernelBif) pKernelBif->__kbifInitDmaCaps__ #define kbifInitDmaCaps(pGpu, pKernelBif) kbifInitDmaCaps_DISPATCH(pGpu, pKernelBif) #define kbifInitDmaCaps_HAL(pGpu, pKernelBif) kbifInitDmaCaps_DISPATCH(pGpu, pKernelBif) +#define kbifSavePcieConfigRegisters_FNPTR(pKernelBif) pKernelBif->__kbifSavePcieConfigRegisters__ #define kbifSavePcieConfigRegisters(pGpu, pKernelBif) kbifSavePcieConfigRegisters_DISPATCH(pGpu, pKernelBif) #define kbifSavePcieConfigRegisters_HAL(pGpu, pKernelBif) kbifSavePcieConfigRegisters_DISPATCH(pGpu, pKernelBif) +#define kbifRestorePcieConfigRegisters_FNPTR(pKernelBif) pKernelBif->__kbifRestorePcieConfigRegisters__ #define kbifRestorePcieConfigRegisters(pGpu, pKernelBif) kbifRestorePcieConfigRegisters_DISPATCH(pGpu, pKernelBif) #define kbifRestorePcieConfigRegisters_HAL(pGpu, pKernelBif) kbifRestorePcieConfigRegisters_DISPATCH(pGpu, pKernelBif) +#define kbifGetXveStatusBits_FNPTR(pKernelBif) pKernelBif->__kbifGetXveStatusBits__ #define kbifGetXveStatusBits(pGpu, pKernelBif, pBits, pStatus) kbifGetXveStatusBits_DISPATCH(pGpu, pKernelBif, pBits, pStatus) #define kbifGetXveStatusBits_HAL(pGpu, pKernelBif, pBits, pStatus) kbifGetXveStatusBits_DISPATCH(pGpu, pKernelBif, pBits, pStatus) +#define kbifClearXveStatus_FNPTR(pKernelBif) pKernelBif->__kbifClearXveStatus__ #define kbifClearXveStatus(pGpu, pKernelBif, pStatus) kbifClearXveStatus_DISPATCH(pGpu, pKernelBif, pStatus) #define kbifClearXveStatus_HAL(pGpu, pKernelBif, pStatus) kbifClearXveStatus_DISPATCH(pGpu, pKernelBif, pStatus) +#define kbifGetXveAerBits_FNPTR(pKernelBif) pKernelBif->__kbifGetXveAerBits__ #define kbifGetXveAerBits(pGpu, pKernelBif, pBits) kbifGetXveAerBits_DISPATCH(pGpu, pKernelBif, pBits) #define kbifGetXveAerBits_HAL(pGpu, pKernelBif, pBits) kbifGetXveAerBits_DISPATCH(pGpu, pKernelBif, pBits) +#define kbifClearXveAer_FNPTR(pKernelBif) pKernelBif->__kbifClearXveAer__ #define kbifClearXveAer(pGpu, pKernelBif, bits) kbifClearXveAer_DISPATCH(pGpu, pKernelBif, bits) #define kbifClearXveAer_HAL(pGpu, pKernelBif, bits) kbifClearXveAer_DISPATCH(pGpu, pKernelBif, bits) +#define kbifGetPcieConfigAccessTestRegisters_FNPTR(pKernelBif) pKernelBif->__kbifGetPcieConfigAccessTestRegisters__ #define kbifGetPcieConfigAccessTestRegisters(pGpu, pKernelBif, pciStart, pcieStart) kbifGetPcieConfigAccessTestRegisters_DISPATCH(pGpu, pKernelBif, pciStart, pcieStart) #define kbifGetPcieConfigAccessTestRegisters_HAL(pGpu, pKernelBif, pciStart, pcieStart) kbifGetPcieConfigAccessTestRegisters_DISPATCH(pGpu, pKernelBif, pciStart, pcieStart) +#define kbifVerifyPcieConfigAccessTestRegisters_FNPTR(pKernelBif) pKernelBif->__kbifVerifyPcieConfigAccessTestRegisters__ #define kbifVerifyPcieConfigAccessTestRegisters(pGpu, pKernelBif, nvXveId, nvXveVccapHdr) kbifVerifyPcieConfigAccessTestRegisters_DISPATCH(pGpu, pKernelBif, nvXveId, nvXveVccapHdr) #define kbifVerifyPcieConfigAccessTestRegisters_HAL(pGpu, pKernelBif, nvXveId, nvXveVccapHdr) kbifVerifyPcieConfigAccessTestRegisters_DISPATCH(pGpu, pKernelBif, nvXveId, nvXveVccapHdr) +#define kbifRearmMSI_FNPTR(pKernelBif) pKernelBif->__kbifRearmMSI__ #define kbifRearmMSI(pGpu, pKernelBif) kbifRearmMSI_DISPATCH(pGpu, pKernelBif) #define kbifRearmMSI_HAL(pGpu, pKernelBif) kbifRearmMSI_DISPATCH(pGpu, pKernelBif) +#define kbifIsMSIEnabledInHW_FNPTR(pKernelBif) pKernelBif->__kbifIsMSIEnabledInHW__ #define kbifIsMSIEnabledInHW(pGpu, pKernelBif) kbifIsMSIEnabledInHW_DISPATCH(pGpu, pKernelBif) #define kbifIsMSIEnabledInHW_HAL(pGpu, pKernelBif) kbifIsMSIEnabledInHW_DISPATCH(pGpu, pKernelBif) +#define kbifIsMSIXEnabledInHW_FNPTR(pKernelBif) pKernelBif->__kbifIsMSIXEnabledInHW__ #define kbifIsMSIXEnabledInHW(pGpu, pKernelBif) kbifIsMSIXEnabledInHW_DISPATCH(pGpu, pKernelBif) #define kbifIsMSIXEnabledInHW_HAL(pGpu, pKernelBif) kbifIsMSIXEnabledInHW_DISPATCH(pGpu, pKernelBif) +#define kbifIsPciIoAccessEnabled_FNPTR(pKernelBif) pKernelBif->__kbifIsPciIoAccessEnabled__ #define kbifIsPciIoAccessEnabled(pGpu, pKernelBif) kbifIsPciIoAccessEnabled_DISPATCH(pGpu, pKernelBif) #define kbifIsPciIoAccessEnabled_HAL(pGpu, pKernelBif) kbifIsPciIoAccessEnabled_DISPATCH(pGpu, pKernelBif) +#define kbifIs3dController_FNPTR(pKernelBif) pKernelBif->__kbifIs3dController__ #define kbifIs3dController(pGpu, pKernelBif) kbifIs3dController_DISPATCH(pGpu, pKernelBif) #define kbifIs3dController_HAL(pGpu, pKernelBif) kbifIs3dController_DISPATCH(pGpu, pKernelBif) +#define kbifExecC73War_FNPTR(pKernelBif) pKernelBif->__kbifExecC73War__ #define kbifExecC73War(pGpu, pKernelBif) kbifExecC73War_DISPATCH(pGpu, pKernelBif) #define kbifExecC73War_HAL(pGpu, pKernelBif) kbifExecC73War_DISPATCH(pGpu, pKernelBif) +#define kbifEnableExtendedTagSupport_FNPTR(pKernelBif) pKernelBif->__kbifEnableExtendedTagSupport__ #define kbifEnableExtendedTagSupport(pGpu, pKernelBif) kbifEnableExtendedTagSupport_DISPATCH(pGpu, pKernelBif) #define kbifEnableExtendedTagSupport_HAL(pGpu, pKernelBif) kbifEnableExtendedTagSupport_DISPATCH(pGpu, pKernelBif) +#define kbifPcieConfigEnableRelaxedOrdering_FNPTR(pKernelBif) pKernelBif->__kbifPcieConfigEnableRelaxedOrdering__ #define kbifPcieConfigEnableRelaxedOrdering(pGpu, pKernelBif) kbifPcieConfigEnableRelaxedOrdering_DISPATCH(pGpu, pKernelBif) #define kbifPcieConfigEnableRelaxedOrdering_HAL(pGpu, pKernelBif) kbifPcieConfigEnableRelaxedOrdering_DISPATCH(pGpu, pKernelBif) +#define kbifPcieConfigDisableRelaxedOrdering_FNPTR(pKernelBif) pKernelBif->__kbifPcieConfigDisableRelaxedOrdering__ #define kbifPcieConfigDisableRelaxedOrdering(pGpu, pKernelBif) kbifPcieConfigDisableRelaxedOrdering_DISPATCH(pGpu, pKernelBif) #define kbifPcieConfigDisableRelaxedOrdering_HAL(pGpu, pKernelBif) kbifPcieConfigDisableRelaxedOrdering_DISPATCH(pGpu, pKernelBif) +#define kbifInitRelaxedOrderingFromEmulatedConfigSpace_FNPTR(pBif) pBif->__kbifInitRelaxedOrderingFromEmulatedConfigSpace__ #define kbifInitRelaxedOrderingFromEmulatedConfigSpace(pGpu, pBif) kbifInitRelaxedOrderingFromEmulatedConfigSpace_DISPATCH(pGpu, pBif) #define kbifInitRelaxedOrderingFromEmulatedConfigSpace_HAL(pGpu, pBif) kbifInitRelaxedOrderingFromEmulatedConfigSpace_DISPATCH(pGpu, pBif) +#define kbifEnableNoSnoop_FNPTR(pKernelBif) pKernelBif->__kbifEnableNoSnoop__ #define kbifEnableNoSnoop(pGpu, pKernelBif, bEnable) kbifEnableNoSnoop_DISPATCH(pGpu, pKernelBif, bEnable) #define kbifEnableNoSnoop_HAL(pGpu, pKernelBif, bEnable) kbifEnableNoSnoop_DISPATCH(pGpu, pKernelBif, bEnable) +#define kbifApplyWARBug3208922_FNPTR(pKernelBif) pKernelBif->__kbifApplyWARBug3208922__ #define kbifApplyWARBug3208922(pGpu, pKernelBif) kbifApplyWARBug3208922_DISPATCH(pGpu, pKernelBif) #define kbifApplyWARBug3208922_HAL(pGpu, pKernelBif) kbifApplyWARBug3208922_DISPATCH(pGpu, pKernelBif) +#define kbifProbePcieReqAtomicCaps_FNPTR(pKernelBif) pKernelBif->__kbifProbePcieReqAtomicCaps__ #define kbifProbePcieReqAtomicCaps(pGpu, pKernelBif) kbifProbePcieReqAtomicCaps_DISPATCH(pGpu, pKernelBif) #define kbifProbePcieReqAtomicCaps_HAL(pGpu, pKernelBif) kbifProbePcieReqAtomicCaps_DISPATCH(pGpu, pKernelBif) +#define kbifEnablePcieAtomics_FNPTR(pKernelBif) pKernelBif->__kbifEnablePcieAtomics__ #define kbifEnablePcieAtomics(pGpu, pKernelBif) kbifEnablePcieAtomics_DISPATCH(pGpu, pKernelBif) #define kbifEnablePcieAtomics_HAL(pGpu, pKernelBif) kbifEnablePcieAtomics_DISPATCH(pGpu, pKernelBif) +#define kbifDoFunctionLevelReset_FNPTR(pKernelBif) pKernelBif->__kbifDoFunctionLevelReset__ #define kbifDoFunctionLevelReset(pGpu, pKernelBif) kbifDoFunctionLevelReset_DISPATCH(pGpu, pKernelBif) #define kbifDoFunctionLevelReset_HAL(pGpu, pKernelBif) kbifDoFunctionLevelReset_DISPATCH(pGpu, pKernelBif) -#define kbifInitXveRegMap(pGpu, pKernelBif, arg0) kbifInitXveRegMap_DISPATCH(pGpu, pKernelBif, arg0) -#define kbifInitXveRegMap_HAL(pGpu, pKernelBif, arg0) kbifInitXveRegMap_DISPATCH(pGpu, pKernelBif, arg0) +#define kbifInitXveRegMap_FNPTR(pKernelBif) pKernelBif->__kbifInitXveRegMap__ +#define kbifInitXveRegMap(pGpu, pKernelBif, arg3) kbifInitXveRegMap_DISPATCH(pGpu, pKernelBif, arg3) +#define kbifInitXveRegMap_HAL(pGpu, pKernelBif, arg3) kbifInitXveRegMap_DISPATCH(pGpu, pKernelBif, arg3) +#define kbifGetMSIXTableVectorControlSize_FNPTR(pKernelBif) pKernelBif->__kbifGetMSIXTableVectorControlSize__ #define kbifGetMSIXTableVectorControlSize(pGpu, pKernelBif) kbifGetMSIXTableVectorControlSize_DISPATCH(pGpu, pKernelBif) #define kbifGetMSIXTableVectorControlSize_HAL(pGpu, pKernelBif) kbifGetMSIXTableVectorControlSize_DISPATCH(pGpu, pKernelBif) +#define kbifSaveMsixTable_FNPTR(pKernelBif) pKernelBif->__kbifSaveMsixTable__ #define kbifSaveMsixTable(pGpu, pKernelBif) kbifSaveMsixTable_DISPATCH(pGpu, pKernelBif) #define kbifSaveMsixTable_HAL(pGpu, pKernelBif) kbifSaveMsixTable_DISPATCH(pGpu, pKernelBif) +#define kbifRestoreMsixTable_FNPTR(pKernelBif) pKernelBif->__kbifRestoreMsixTable__ #define kbifRestoreMsixTable(pGpu, pKernelBif) kbifRestoreMsixTable_DISPATCH(pGpu, pKernelBif) #define kbifRestoreMsixTable_HAL(pGpu, pKernelBif) kbifRestoreMsixTable_DISPATCH(pGpu, pKernelBif) +#define kbifConfigAccessWait_FNPTR(pKernelBif) pKernelBif->__kbifConfigAccessWait__ #define kbifConfigAccessWait(pGpu, pKernelBif, pTimeout) kbifConfigAccessWait_DISPATCH(pGpu, pKernelBif, pTimeout) #define kbifConfigAccessWait_HAL(pGpu, pKernelBif, pTimeout) kbifConfigAccessWait_DISPATCH(pGpu, pKernelBif, pTimeout) +#define kbifGetPciConfigSpacePriMirror_FNPTR(pKernelBif) pKernelBif->__kbifGetPciConfigSpacePriMirror__ #define kbifGetPciConfigSpacePriMirror(pGpu, pKernelBif, pMirrorBase, pMirrorSize) kbifGetPciConfigSpacePriMirror_DISPATCH(pGpu, pKernelBif, pMirrorBase, pMirrorSize) #define kbifGetPciConfigSpacePriMirror_HAL(pGpu, pKernelBif, pMirrorBase, pMirrorSize) kbifGetPciConfigSpacePriMirror_DISPATCH(pGpu, pKernelBif, pMirrorBase, pMirrorSize) +#define kbifGetBusOptionsAddr_FNPTR(pKernelBif) pKernelBif->__kbifGetBusOptionsAddr__ #define kbifGetBusOptionsAddr(pGpu, pKernelBif, options, addrReg) kbifGetBusOptionsAddr_DISPATCH(pGpu, pKernelBif, options, addrReg) #define kbifGetBusOptionsAddr_HAL(pGpu, pKernelBif, options, addrReg) kbifGetBusOptionsAddr_DISPATCH(pGpu, pKernelBif, options, addrReg) +#define kbifPreOsGlobalErotGrantRequest_FNPTR(pKernelBif) pKernelBif->__kbifPreOsGlobalErotGrantRequest__ #define kbifPreOsGlobalErotGrantRequest(pGpu, pKernelBif) kbifPreOsGlobalErotGrantRequest_DISPATCH(pGpu, pKernelBif) #define kbifPreOsGlobalErotGrantRequest_HAL(pGpu, pKernelBif) kbifPreOsGlobalErotGrantRequest_DISPATCH(pGpu, pKernelBif) +#define kbifStopSysMemRequests_FNPTR(pKernelBif) pKernelBif->__kbifStopSysMemRequests__ #define kbifStopSysMemRequests(pGpu, pKernelBif, bStop) kbifStopSysMemRequests_DISPATCH(pGpu, pKernelBif, bStop) #define kbifStopSysMemRequests_HAL(pGpu, pKernelBif, bStop) kbifStopSysMemRequests_DISPATCH(pGpu, pKernelBif, bStop) +#define kbifWaitForTransactionsComplete_FNPTR(pKernelBif) pKernelBif->__kbifWaitForTransactionsComplete__ #define kbifWaitForTransactionsComplete(pGpu, pKernelBif) kbifWaitForTransactionsComplete_DISPATCH(pGpu, pKernelBif) #define kbifWaitForTransactionsComplete_HAL(pGpu, pKernelBif) kbifWaitForTransactionsComplete_DISPATCH(pGpu, pKernelBif) +#define kbifTriggerFlr_FNPTR(pKernelBif) pKernelBif->__kbifTriggerFlr__ #define kbifTriggerFlr(pGpu, pKernelBif) kbifTriggerFlr_DISPATCH(pGpu, pKernelBif) #define kbifTriggerFlr_HAL(pGpu, pKernelBif) kbifTriggerFlr_DISPATCH(pGpu, pKernelBif) +#define kbifCacheFlrSupport_FNPTR(pKernelBif) pKernelBif->__kbifCacheFlrSupport__ #define kbifCacheFlrSupport(pGpu, pKernelBif) kbifCacheFlrSupport_DISPATCH(pGpu, pKernelBif) #define kbifCacheFlrSupport_HAL(pGpu, pKernelBif) kbifCacheFlrSupport_DISPATCH(pGpu, pKernelBif) +#define kbifCache64bBar0Support_FNPTR(pKernelBif) pKernelBif->__kbifCache64bBar0Support__ #define kbifCache64bBar0Support(pGpu, pKernelBif) kbifCache64bBar0Support_DISPATCH(pGpu, pKernelBif) #define kbifCache64bBar0Support_HAL(pGpu, pKernelBif) kbifCache64bBar0Support_DISPATCH(pGpu, pKernelBif) +#define kbifCacheVFInfo_FNPTR(pKernelBif) pKernelBif->__kbifCacheVFInfo__ #define kbifCacheVFInfo(pGpu, pKernelBif) kbifCacheVFInfo_DISPATCH(pGpu, pKernelBif) #define kbifCacheVFInfo_HAL(pGpu, pKernelBif) kbifCacheVFInfo_DISPATCH(pGpu, pKernelBif) -#define kbifRestoreBar0(pGpu, pKernelBif, arg0, arg1) kbifRestoreBar0_DISPATCH(pGpu, pKernelBif, arg0, arg1) -#define kbifRestoreBar0_HAL(pGpu, pKernelBif, arg0, arg1) kbifRestoreBar0_DISPATCH(pGpu, pKernelBif, arg0, arg1) +#define kbifRestoreBar0_FNPTR(pKernelBif) pKernelBif->__kbifRestoreBar0__ +#define kbifRestoreBar0(pGpu, pKernelBif, arg3, arg4) kbifRestoreBar0_DISPATCH(pGpu, pKernelBif, arg3, arg4) +#define kbifRestoreBar0_HAL(pGpu, pKernelBif, arg3, arg4) kbifRestoreBar0_DISPATCH(pGpu, pKernelBif, arg3, arg4) +#define kbifAnyBarsAreValid_FNPTR(pKernelBif) pKernelBif->__kbifAnyBarsAreValid__ #define kbifAnyBarsAreValid(pGpu, pKernelBif) kbifAnyBarsAreValid_DISPATCH(pGpu, pKernelBif) #define kbifAnyBarsAreValid_HAL(pGpu, pKernelBif) kbifAnyBarsAreValid_DISPATCH(pGpu, pKernelBif) +#define kbifRestoreBarsAndCommand_FNPTR(pKernelBif) pKernelBif->__kbifRestoreBarsAndCommand__ #define kbifRestoreBarsAndCommand(pGpu, pKernelBif) kbifRestoreBarsAndCommand_DISPATCH(pGpu, pKernelBif) #define kbifRestoreBarsAndCommand_HAL(pGpu, pKernelBif) kbifRestoreBarsAndCommand_DISPATCH(pGpu, pKernelBif) -#define kbifStoreBarRegOffsets(pGpu, pKernelBif, arg0) kbifStoreBarRegOffsets_DISPATCH(pGpu, pKernelBif, arg0) -#define kbifStoreBarRegOffsets_HAL(pGpu, pKernelBif, arg0) kbifStoreBarRegOffsets_DISPATCH(pGpu, pKernelBif, arg0) +#define kbifStoreBarRegOffsets_FNPTR(pKernelBif) pKernelBif->__kbifStoreBarRegOffsets__ +#define kbifStoreBarRegOffsets(pGpu, pKernelBif, arg3) kbifStoreBarRegOffsets_DISPATCH(pGpu, pKernelBif, arg3) +#define kbifStoreBarRegOffsets_HAL(pGpu, pKernelBif, arg3) kbifStoreBarRegOffsets_DISPATCH(pGpu, pKernelBif, arg3) +#define kbifInit_FNPTR(pKernelBif) pKernelBif->__kbifInit__ #define kbifInit(pGpu, pKernelBif) kbifInit_DISPATCH(pGpu, pKernelBif) #define kbifInit_HAL(pGpu, pKernelBif) kbifInit_DISPATCH(pGpu, pKernelBif) +#define kbifPrepareForFullChipReset_FNPTR(pKernelBif) pKernelBif->__kbifPrepareForFullChipReset__ +#define kbifPrepareForFullChipReset(pGpu, pKernelBif) kbifPrepareForFullChipReset_DISPATCH(pGpu, pKernelBif) +#define kbifPrepareForFullChipReset_HAL(pGpu, pKernelBif) kbifPrepareForFullChipReset_DISPATCH(pGpu, pKernelBif) +#define kbifDoFullChipReset_FNPTR(pKernelBif) pKernelBif->__kbifDoFullChipReset__ +#define kbifDoFullChipReset(pGpu, pKernelBif) kbifDoFullChipReset_DISPATCH(pGpu, pKernelBif) +#define kbifDoFullChipReset_HAL(pGpu, pKernelBif) kbifDoFullChipReset_DISPATCH(pGpu, pKernelBif) +#define kbifResetHostEngines_FNPTR(pKernelBif) pKernelBif->__kbifResetHostEngines__ +#define kbifResetHostEngines(pGpu, pKernelBif, arg3) kbifResetHostEngines_DISPATCH(pGpu, pKernelBif, arg3) +#define kbifResetHostEngines_HAL(pGpu, pKernelBif, arg3) kbifResetHostEngines_DISPATCH(pGpu, pKernelBif, arg3) +#define kbifGetValidEnginesToReset_FNPTR(pKernelBif) pKernelBif->__kbifGetValidEnginesToReset__ #define kbifGetValidEnginesToReset(pGpu, pKernelBif) kbifGetValidEnginesToReset_DISPATCH(pGpu, pKernelBif) #define kbifGetValidEnginesToReset_HAL(pGpu, pKernelBif) kbifGetValidEnginesToReset_DISPATCH(pGpu, pKernelBif) +#define kbifGetValidDeviceEnginesToReset_FNPTR(pKernelBif) pKernelBif->__kbifGetValidDeviceEnginesToReset__ #define kbifGetValidDeviceEnginesToReset(pGpu, pKernelBif) kbifGetValidDeviceEnginesToReset_DISPATCH(pGpu, pKernelBif) #define kbifGetValidDeviceEnginesToReset_HAL(pGpu, pKernelBif) kbifGetValidDeviceEnginesToReset_DISPATCH(pGpu, pKernelBif) +#define kbifGetEccCounts_FNPTR(pKernelBif) pKernelBif->__kbifGetEccCounts__ #define kbifGetEccCounts(pGpu, pKernelBif) kbifGetEccCounts_DISPATCH(pGpu, pKernelBif) #define kbifGetEccCounts_HAL(pGpu, pKernelBif) kbifGetEccCounts_DISPATCH(pGpu, pKernelBif) -#define kbifStatePreLoad(pGpu, pEngstate, arg0) kbifStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kbifStatePostUnload(pGpu, pEngstate, arg0) kbifStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kbifStateDestroy(pGpu, pEngstate) kbifStateDestroy_DISPATCH(pGpu, pEngstate) -#define kbifStatePreUnload(pGpu, pEngstate, arg0) kbifStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kbifStateInitUnlocked(pGpu, pEngstate) kbifStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kbifAllowGpuOutboundPcieAtomics_FNPTR(pKernelBif) pKernelBif->__kbifAllowGpuOutboundPcieAtomics__ +#define kbifAllowGpuOutboundPcieAtomics(pGpu, pKernelBif) kbifAllowGpuOutboundPcieAtomics_DISPATCH(pGpu, pKernelBif) +#define kbifAllowGpuOutboundPcieAtomics_HAL(pGpu, pKernelBif) kbifAllowGpuOutboundPcieAtomics_DISPATCH(pGpu, pKernelBif) +#define kbifClearDownstreamReadCounter_FNPTR(pKernelBif) pKernelBif->__kbifClearDownstreamReadCounter__ +#define kbifClearDownstreamReadCounter(pGpu, pKernelBif) kbifClearDownstreamReadCounter_DISPATCH(pGpu, pKernelBif) +#define kbifClearDownstreamReadCounter_HAL(pGpu, pKernelBif) kbifClearDownstreamReadCounter_DISPATCH(pGpu, pKernelBif) +#define kbifDoSecondaryBusHotReset_FNPTR(pKernelBif) pKernelBif->__kbifDoSecondaryBusHotReset__ +#define kbifDoSecondaryBusHotReset(pGpu, pKernelBif) kbifDoSecondaryBusHotReset_DISPATCH(pGpu, pKernelBif) +#define kbifDoSecondaryBusHotReset_HAL(pGpu, pKernelBif) kbifDoSecondaryBusHotReset_DISPATCH(pGpu, pKernelBif) +#define kbifInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define kbifInitMissing(pGpu, pEngstate) kbifInitMissing_DISPATCH(pGpu, pEngstate) +#define kbifStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define kbifStatePreInitLocked(pGpu, pEngstate) kbifStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define kbifStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define kbifStatePreInitUnlocked(pGpu, pEngstate) kbifStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kbifStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kbifStateInitUnlocked(pGpu, pEngstate) kbifStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kbifStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kbifStatePreLoad(pGpu, pEngstate, arg3) kbifStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kbifStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kbifStatePreUnload(pGpu, pEngstate, arg3) kbifStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kbifStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kbifStatePostUnload(pGpu, pEngstate, arg3) kbifStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kbifStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define kbifStateDestroy(pGpu, pEngstate) kbifStateDestroy_DISPATCH(pGpu, pEngstate) +#define kbifIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define kbifIsPresent(pGpu, pEngstate) kbifIsPresent_DISPATCH(pGpu, pEngstate) + +// Dispatch functions +static inline NV_STATUS kbifConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, ENGDESCRIPTOR arg3) { + return pKernelBif->__kbifConstructEngine__(pGpu, pKernelBif, arg3); +} + +static inline NV_STATUS kbifStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifStateInitLocked__(pGpu, pKernelBif); +} + +static inline NV_STATUS kbifStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg3) { + return pKernelBif->__kbifStateLoad__(pGpu, pKernelBif, arg3); +} + +static inline NV_STATUS kbifStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg3) { + return pKernelBif->__kbifStatePostLoad__(pGpu, pKernelBif, arg3); +} + +static inline NV_STATUS kbifStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg3) { + return pKernelBif->__kbifStateUnload__(pGpu, pKernelBif, arg3); +} + +static inline NvU32 kbifGetBusIntfType_DISPATCH(struct KernelBif *pKernelBif) { + return pKernelBif->__kbifGetBusIntfType__(pKernelBif); +} + +static inline void kbifInitDmaCaps_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + pKernelBif->__kbifInitDmaCaps__(pGpu, pKernelBif); +} + +static inline NV_STATUS kbifSavePcieConfigRegisters_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifSavePcieConfigRegisters__(pGpu, pKernelBif); +} + +static inline NV_STATUS kbifRestorePcieConfigRegisters_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifRestorePcieConfigRegisters__(pGpu, pKernelBif); +} + +static inline NV_STATUS kbifGetXveStatusBits_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBits, NvU32 *pStatus) { + return pKernelBif->__kbifGetXveStatusBits__(pGpu, pKernelBif, pBits, pStatus); +} + +static inline NV_STATUS kbifClearXveStatus_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pStatus) { + return pKernelBif->__kbifClearXveStatus__(pGpu, pKernelBif, pStatus); +} + +static inline NV_STATUS kbifGetXveAerBits_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBits) { + return pKernelBif->__kbifGetXveAerBits__(pGpu, pKernelBif, pBits); +} + +static inline NV_STATUS kbifClearXveAer_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 bits) { + return pKernelBif->__kbifClearXveAer__(pGpu, pKernelBif, bits); +} + +static inline void kbifGetPcieConfigAccessTestRegisters_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pciStart, NvU32 *pcieStart) { + pKernelBif->__kbifGetPcieConfigAccessTestRegisters__(pGpu, pKernelBif, pciStart, pcieStart); +} + +static inline NV_STATUS kbifVerifyPcieConfigAccessTestRegisters_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 nvXveId, NvU32 nvXveVccapHdr) { + return pKernelBif->__kbifVerifyPcieConfigAccessTestRegisters__(pGpu, pKernelBif, nvXveId, nvXveVccapHdr); +} + +static inline void kbifRearmMSI_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + pKernelBif->__kbifRearmMSI__(pGpu, pKernelBif); +} + +static inline NvBool kbifIsMSIEnabledInHW_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifIsMSIEnabledInHW__(pGpu, pKernelBif); +} + +static inline NvBool kbifIsMSIXEnabledInHW_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifIsMSIXEnabledInHW__(pGpu, pKernelBif); +} + +static inline NvBool kbifIsPciIoAccessEnabled_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifIsPciIoAccessEnabled__(pGpu, pKernelBif); +} + +static inline NvBool kbifIs3dController_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifIs3dController__(pGpu, pKernelBif); +} + +static inline void kbifExecC73War_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + pKernelBif->__kbifExecC73War__(pGpu, pKernelBif); +} + +static inline void kbifEnableExtendedTagSupport_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + pKernelBif->__kbifEnableExtendedTagSupport__(pGpu, pKernelBif); +} + +static inline void kbifPcieConfigEnableRelaxedOrdering_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + pKernelBif->__kbifPcieConfigEnableRelaxedOrdering__(pGpu, pKernelBif); +} + +static inline void kbifPcieConfigDisableRelaxedOrdering_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + pKernelBif->__kbifPcieConfigDisableRelaxedOrdering__(pGpu, pKernelBif); +} + +static inline void kbifInitRelaxedOrderingFromEmulatedConfigSpace_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pBif) { + pBif->__kbifInitRelaxedOrderingFromEmulatedConfigSpace__(pGpu, pBif); +} + +static inline NV_STATUS kbifEnableNoSnoop_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool bEnable) { + return pKernelBif->__kbifEnableNoSnoop__(pGpu, pKernelBif, bEnable); +} + +static inline void kbifApplyWARBug3208922_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + pKernelBif->__kbifApplyWARBug3208922__(pGpu, pKernelBif); +} + +static inline void kbifProbePcieReqAtomicCaps_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + pKernelBif->__kbifProbePcieReqAtomicCaps__(pGpu, pKernelBif); +} + +static inline void kbifEnablePcieAtomics_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + pKernelBif->__kbifEnablePcieAtomics__(pGpu, pKernelBif); +} + +static inline NV_STATUS kbifDoFunctionLevelReset_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifDoFunctionLevelReset__(pGpu, pKernelBif); +} + +static inline NV_STATUS kbifInitXveRegMap_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU8 arg3) { + return pKernelBif->__kbifInitXveRegMap__(pGpu, pKernelBif, arg3); +} + +static inline NvU32 kbifGetMSIXTableVectorControlSize_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifGetMSIXTableVectorControlSize__(pGpu, pKernelBif); +} + +static inline NV_STATUS kbifSaveMsixTable_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifSaveMsixTable__(pGpu, pKernelBif); +} + +static inline NV_STATUS kbifRestoreMsixTable_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifRestoreMsixTable__(pGpu, pKernelBif); +} + +static inline NV_STATUS kbifConfigAccessWait_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, RMTIMEOUT *pTimeout) { + return pKernelBif->__kbifConfigAccessWait__(pGpu, pKernelBif, pTimeout); +} + +static inline NV_STATUS kbifGetPciConfigSpacePriMirror_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pMirrorBase, NvU32 *pMirrorSize) { + return pKernelBif->__kbifGetPciConfigSpacePriMirror__(pGpu, pKernelBif, pMirrorBase, pMirrorSize); +} + +static inline NV_STATUS kbifGetBusOptionsAddr_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, BUS_OPTIONS options, NvU32 *addrReg) { + return pKernelBif->__kbifGetBusOptionsAddr__(pGpu, pKernelBif, options, addrReg); +} + +static inline NV_STATUS kbifPreOsGlobalErotGrantRequest_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifPreOsGlobalErotGrantRequest__(pGpu, pKernelBif); +} + +static inline NV_STATUS kbifStopSysMemRequests_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool bStop) { + return pKernelBif->__kbifStopSysMemRequests__(pGpu, pKernelBif, bStop); +} + +static inline NV_STATUS kbifWaitForTransactionsComplete_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifWaitForTransactionsComplete__(pGpu, pKernelBif); +} + +static inline NV_STATUS kbifTriggerFlr_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifTriggerFlr__(pGpu, pKernelBif); +} + +static inline void kbifCacheFlrSupport_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + pKernelBif->__kbifCacheFlrSupport__(pGpu, pKernelBif); +} + +static inline void kbifCache64bBar0Support_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + pKernelBif->__kbifCache64bBar0Support__(pGpu, pKernelBif); +} + +static inline void kbifCacheVFInfo_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + pKernelBif->__kbifCacheVFInfo__(pGpu, pKernelBif); +} + +static inline void kbifRestoreBar0_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, void *arg3, NvU32 *arg4) { + pKernelBif->__kbifRestoreBar0__(pGpu, pKernelBif, arg3, arg4); +} + +static inline NvBool kbifAnyBarsAreValid_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifAnyBarsAreValid__(pGpu, pKernelBif); +} + +static inline NV_STATUS kbifRestoreBarsAndCommand_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifRestoreBarsAndCommand__(pGpu, pKernelBif); +} + +static inline void kbifStoreBarRegOffsets_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg3) { + pKernelBif->__kbifStoreBarRegOffsets__(pGpu, pKernelBif, arg3); +} + +static inline NV_STATUS kbifInit_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifInit__(pGpu, pKernelBif); +} + +static inline void kbifPrepareForFullChipReset_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + pKernelBif->__kbifPrepareForFullChipReset__(pGpu, pKernelBif); +} + +static inline NV_STATUS kbifDoFullChipReset_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifDoFullChipReset__(pGpu, pKernelBif); +} + +static inline void kbifResetHostEngines_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, struct KernelMc *arg3) { + pKernelBif->__kbifResetHostEngines__(pGpu, pKernelBif, arg3); +} + +static inline NvU32 kbifGetValidEnginesToReset_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifGetValidEnginesToReset__(pGpu, pKernelBif); +} + +static inline NvU32 kbifGetValidDeviceEnginesToReset_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifGetValidDeviceEnginesToReset__(pGpu, pKernelBif); +} + +static inline NvU32 kbifGetEccCounts_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifGetEccCounts__(pGpu, pKernelBif); +} + +static inline NvBool kbifAllowGpuOutboundPcieAtomics_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifAllowGpuOutboundPcieAtomics__(pGpu, pKernelBif); +} + +static inline void kbifClearDownstreamReadCounter_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + pKernelBif->__kbifClearDownstreamReadCounter__(pGpu, pKernelBif); +} + +static inline NV_STATUS kbifDoSecondaryBusHotReset_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return pKernelBif->__kbifDoSecondaryBusHotReset__(pGpu, pKernelBif); +} + +static inline void kbifInitMissing_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) { + pEngstate->__kbifInitMissing__(pGpu, pEngstate); +} + +static inline NV_STATUS kbifStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) { + return pEngstate->__kbifStatePreInitLocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kbifStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) { + return pEngstate->__kbifStatePreInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kbifStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) { + return pEngstate->__kbifStateInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kbifStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate, NvU32 arg3) { + return pEngstate->__kbifStatePreLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS kbifStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate, NvU32 arg3) { + return pEngstate->__kbifStatePreUnload__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS kbifStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate, NvU32 arg3) { + return pEngstate->__kbifStatePostUnload__(pGpu, pEngstate, arg3); +} + +static inline void kbifStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) { + pEngstate->__kbifStateDestroy__(pGpu, pEngstate); +} + +static inline NvBool kbifIsPresent_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) { + return pEngstate->__kbifIsPresent__(pGpu, pEngstate); +} + void kbifDestruct_GM107(struct KernelBif *pKernelBif); #define __nvoc_kbifDestruct(pKernelBif) kbifDestruct_GM107(pKernelBif) -void kbifClearConfigErrors_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool arg0, NvU32 arg1); +void kbifClearConfigErrors_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool arg3, NvU32 arg4); #ifdef __nvoc_kernel_bif_h_disabled -static inline void kbifClearConfigErrors(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool arg0, NvU32 arg1) { +static inline void kbifClearConfigErrors(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool arg3, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); } #else //__nvoc_kernel_bif_h_disabled -#define kbifClearConfigErrors(pGpu, pKernelBif, arg0, arg1) kbifClearConfigErrors_IMPL(pGpu, pKernelBif, arg0, arg1) +#define kbifClearConfigErrors(pGpu, pKernelBif, arg3, arg4) kbifClearConfigErrors_IMPL(pGpu, pKernelBif, arg3, arg4) #endif //__nvoc_kernel_bif_h_disabled -#define kbifClearConfigErrors_HAL(pGpu, pKernelBif, arg0, arg1) kbifClearConfigErrors(pGpu, pKernelBif, arg0, arg1) +#define kbifClearConfigErrors_HAL(pGpu, pKernelBif, arg3, arg4) kbifClearConfigErrors(pGpu, pKernelBif, arg3, arg4) void kbifDisableP2PTransactions_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); @@ -470,33 +853,33 @@ static inline NV_STATUS kbifGetVFSparseMmapRegions(struct OBJGPU *pGpu, struct K #define kbifGetVFSparseMmapRegions_HAL(pGpu, pKernelBif, pKernelHostVgpuDevice, osPageSize, pNumAreas, pOffsets, pSizes) kbifGetVFSparseMmapRegions(pGpu, pKernelBif, pKernelHostVgpuDevice, osPageSize, pNumAreas, pOffsets, pSizes) -NV_STATUS kbifSaveMSIXVectorControlMasks_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *arg0); +NV_STATUS kbifSaveMSIXVectorControlMasks_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *arg3); #ifdef __nvoc_kernel_bif_h_disabled -static inline NV_STATUS kbifSaveMSIXVectorControlMasks(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *arg0) { +static inline NV_STATUS kbifSaveMSIXVectorControlMasks(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_bif_h_disabled -#define kbifSaveMSIXVectorControlMasks(pGpu, pKernelBif, arg0) kbifSaveMSIXVectorControlMasks_TU102(pGpu, pKernelBif, arg0) +#define kbifSaveMSIXVectorControlMasks(pGpu, pKernelBif, arg3) kbifSaveMSIXVectorControlMasks_TU102(pGpu, pKernelBif, arg3) #endif //__nvoc_kernel_bif_h_disabled -#define kbifSaveMSIXVectorControlMasks_HAL(pGpu, pKernelBif, arg0) kbifSaveMSIXVectorControlMasks(pGpu, pKernelBif, arg0) +#define kbifSaveMSIXVectorControlMasks_HAL(pGpu, pKernelBif, arg3) kbifSaveMSIXVectorControlMasks(pGpu, pKernelBif, arg3) -NV_STATUS kbifRestoreMSIXVectorControlMasks_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0); +NV_STATUS kbifRestoreMSIXVectorControlMasks_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg3); #ifdef __nvoc_kernel_bif_h_disabled -static inline NV_STATUS kbifRestoreMSIXVectorControlMasks(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0) { +static inline NV_STATUS kbifRestoreMSIXVectorControlMasks(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_bif_h_disabled -#define kbifRestoreMSIXVectorControlMasks(pGpu, pKernelBif, arg0) kbifRestoreMSIXVectorControlMasks_TU102(pGpu, pKernelBif, arg0) +#define kbifRestoreMSIXVectorControlMasks(pGpu, pKernelBif, arg3) kbifRestoreMSIXVectorControlMasks_TU102(pGpu, pKernelBif, arg3) #endif //__nvoc_kernel_bif_h_disabled -#define kbifRestoreMSIXVectorControlMasks_HAL(pGpu, pKernelBif, arg0) kbifRestoreMSIXVectorControlMasks(pGpu, pKernelBif, arg0) +#define kbifRestoreMSIXVectorControlMasks_HAL(pGpu, pKernelBif, arg3) kbifRestoreMSIXVectorControlMasks(pGpu, pKernelBif, arg3) NV_STATUS kbifDisableSysmemAccess_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool bDisable); @@ -527,40 +910,64 @@ static inline void kbifCacheMnocSupport(struct OBJGPU *pGpu, struct KernelBif *p #define kbifCacheMnocSupport_HAL(pGpu, pKernelBif) kbifCacheMnocSupport(pGpu, pKernelBif) -NV_STATUS kbifConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, ENGDESCRIPTOR arg0); +NV_STATUS kbifPrepareForXveReset_GP100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); + -static inline NV_STATUS kbifConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, ENGDESCRIPTOR arg0) { - return pKernelBif->__kbifConstructEngine__(pGpu, pKernelBif, arg0); +#ifdef __nvoc_kernel_bif_h_disabled +static inline NV_STATUS kbifPrepareForXveReset(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_bif_h_disabled +#define kbifPrepareForXveReset(pGpu, pKernelBif) kbifPrepareForXveReset_GP100(pGpu, pKernelBif) +#endif //__nvoc_kernel_bif_h_disabled -NV_STATUS kbifStateInitLocked_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); +#define kbifPrepareForXveReset_HAL(pGpu, pKernelBif) kbifPrepareForXveReset(pGpu, pKernelBif) -static inline NV_STATUS kbifStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifStateInitLocked__(pGpu, pKernelBif); +static inline NV_STATUS kbifApplyWarForBug1511451_56cd7a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return NV_OK; } -NV_STATUS kbifStateLoad_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0); -static inline NV_STATUS kbifStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0) { - return pKernelBif->__kbifStateLoad__(pGpu, pKernelBif, arg0); +#ifdef __nvoc_kernel_bif_h_disabled +static inline NV_STATUS kbifApplyWarForBug1511451(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_bif_h_disabled +#define kbifApplyWarForBug1511451(pGpu, pKernelBif) kbifApplyWarForBug1511451_56cd7a(pGpu, pKernelBif) +#endif //__nvoc_kernel_bif_h_disabled -static inline NV_STATUS kbifStatePostLoad_56cd7a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0) { - return NV_OK; -} +#define kbifApplyWarForBug1511451_HAL(pGpu, pKernelBif) kbifApplyWarForBug1511451(pGpu, pKernelBif) + +NV_STATUS kbifDoSecondaryBusResetOrFunctionLevelReset_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -NV_STATUS kbifStatePostLoad_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0); -static inline NV_STATUS kbifStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0) { - return pKernelBif->__kbifStatePostLoad__(pGpu, pKernelBif, arg0); +#ifdef __nvoc_kernel_bif_h_disabled +static inline NV_STATUS kbifDoSecondaryBusResetOrFunctionLevelReset(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_bif_h_disabled +#define kbifDoSecondaryBusResetOrFunctionLevelReset(pGpu, pKernelBif) kbifDoSecondaryBusResetOrFunctionLevelReset_TU102(pGpu, pKernelBif) +#endif //__nvoc_kernel_bif_h_disabled + +#define kbifDoSecondaryBusResetOrFunctionLevelReset_HAL(pGpu, pKernelBif) kbifDoSecondaryBusResetOrFunctionLevelReset(pGpu, pKernelBif) -NV_STATUS kbifStateUnload_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0); +NV_STATUS kbifConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, ENGDESCRIPTOR arg3); -static inline NV_STATUS kbifStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0) { - return pKernelBif->__kbifStateUnload__(pGpu, pKernelBif, arg0); +NV_STATUS kbifStateInitLocked_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); + +NV_STATUS kbifStateLoad_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg3); + +static inline NV_STATUS kbifStatePostLoad_56cd7a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg3) { + return NV_OK; } +NV_STATUS kbifStatePostLoad_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg3); + +NV_STATUS kbifStateUnload_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg3); + static inline NvU32 kbifGetBusIntfType_28ceda(struct KernelBif *pKernelBif) { return (1); } @@ -569,294 +976,162 @@ static inline NvU32 kbifGetBusIntfType_2f2c74(struct KernelBif *pKernelBif) { return (3); } -static inline NvU32 kbifGetBusIntfType_DISPATCH(struct KernelBif *pKernelBif) { - return pKernelBif->__kbifGetBusIntfType__(pKernelBif); -} - -void kbifInitDmaCaps_VGPUSTUB(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); +void kbifInitDmaCaps_VF(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); void kbifInitDmaCaps_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline void kbifInitDmaCaps_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - pKernelBif->__kbifInitDmaCaps__(pGpu, pKernelBif); -} - NV_STATUS kbifSavePcieConfigRegisters_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); NV_STATUS kbifSavePcieConfigRegisters_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline NV_STATUS kbifSavePcieConfigRegisters_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifSavePcieConfigRegisters__(pGpu, pKernelBif); -} - NV_STATUS kbifRestorePcieConfigRegisters_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); NV_STATUS kbifRestorePcieConfigRegisters_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline NV_STATUS kbifRestorePcieConfigRegisters_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifRestorePcieConfigRegisters__(pGpu, pKernelBif); -} - NV_STATUS kbifGetXveStatusBits_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBits, NvU32 *pStatus); NV_STATUS kbifGetXveStatusBits_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBits, NvU32 *pStatus); -static inline NV_STATUS kbifGetXveStatusBits_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBits, NvU32 *pStatus) { - return pKernelBif->__kbifGetXveStatusBits__(pGpu, pKernelBif, pBits, pStatus); -} - NV_STATUS kbifClearXveStatus_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pStatus); NV_STATUS kbifClearXveStatus_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pStatus); -static inline NV_STATUS kbifClearXveStatus_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pStatus) { - return pKernelBif->__kbifClearXveStatus__(pGpu, pKernelBif, pStatus); -} - NV_STATUS kbifGetXveAerBits_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBits); NV_STATUS kbifGetXveAerBits_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBits); -static inline NV_STATUS kbifGetXveAerBits_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBits) { - return pKernelBif->__kbifGetXveAerBits__(pGpu, pKernelBif, pBits); -} - NV_STATUS kbifClearXveAer_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 bits); NV_STATUS kbifClearXveAer_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 bits); -static inline NV_STATUS kbifClearXveAer_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 bits) { - return pKernelBif->__kbifClearXveAer__(pGpu, pKernelBif, bits); -} - void kbifGetPcieConfigAccessTestRegisters_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pciStart, NvU32 *pcieStart); static inline void kbifGetPcieConfigAccessTestRegisters_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pciStart, NvU32 *pcieStart) { return; } -static inline void kbifGetPcieConfigAccessTestRegisters_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pciStart, NvU32 *pcieStart) { - pKernelBif->__kbifGetPcieConfigAccessTestRegisters__(pGpu, pKernelBif, pciStart, pcieStart); -} - NV_STATUS kbifVerifyPcieConfigAccessTestRegisters_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 nvXveId, NvU32 nvXveVccapHdr); static inline NV_STATUS kbifVerifyPcieConfigAccessTestRegisters_56cd7a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 nvXveId, NvU32 nvXveVccapHdr) { return NV_OK; } -static inline NV_STATUS kbifVerifyPcieConfigAccessTestRegisters_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 nvXveId, NvU32 nvXveVccapHdr) { - return pKernelBif->__kbifVerifyPcieConfigAccessTestRegisters__(pGpu, pKernelBif, nvXveId, nvXveVccapHdr); -} - void kbifRearmMSI_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); static inline void kbifRearmMSI_f2d351(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { NV_ASSERT_PRECOMP(0); } -static inline void kbifRearmMSI_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - pKernelBif->__kbifRearmMSI__(pGpu, pKernelBif); -} - NvBool kbifIsMSIEnabledInHW_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); NvBool kbifIsMSIEnabledInHW_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline NvBool kbifIsMSIEnabledInHW_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifIsMSIEnabledInHW__(pGpu, pKernelBif); -} - NvBool kbifIsMSIXEnabledInHW_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); NvBool kbifIsMSIXEnabledInHW_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline NvBool kbifIsMSIXEnabledInHW_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifIsMSIXEnabledInHW__(pGpu, pKernelBif); -} - NvBool kbifIsPciIoAccessEnabled_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); static inline NvBool kbifIsPciIoAccessEnabled_491d52(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { return ((NvBool)(0 != 0)); } -static inline NvBool kbifIsPciIoAccessEnabled_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifIsPciIoAccessEnabled__(pGpu, pKernelBif); -} - NvBool kbifIs3dController_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); NvBool kbifIs3dController_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline NvBool kbifIs3dController_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifIs3dController__(pGpu, pKernelBif); -} - void kbifExecC73War_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); static inline void kbifExecC73War_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { return; } -static inline void kbifExecC73War_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - pKernelBif->__kbifExecC73War__(pGpu, pKernelBif); -} - void kbifEnableExtendedTagSupport_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); static inline void kbifEnableExtendedTagSupport_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { return; } -static inline void kbifEnableExtendedTagSupport_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - pKernelBif->__kbifEnableExtendedTagSupport__(pGpu, pKernelBif); -} - void kbifPcieConfigEnableRelaxedOrdering_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); void kbifPcieConfigEnableRelaxedOrdering_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline void kbifPcieConfigEnableRelaxedOrdering_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - pKernelBif->__kbifPcieConfigEnableRelaxedOrdering__(pGpu, pKernelBif); -} - void kbifPcieConfigDisableRelaxedOrdering_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); void kbifPcieConfigDisableRelaxedOrdering_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline void kbifPcieConfigDisableRelaxedOrdering_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - pKernelBif->__kbifPcieConfigDisableRelaxedOrdering__(pGpu, pKernelBif); -} - static inline void kbifInitRelaxedOrderingFromEmulatedConfigSpace_b3696a(struct OBJGPU *pGpu, struct KernelBif *pBif) { return; } void kbifInitRelaxedOrderingFromEmulatedConfigSpace_GA100(struct OBJGPU *pGpu, struct KernelBif *pBif); -static inline void kbifInitRelaxedOrderingFromEmulatedConfigSpace_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pBif) { - pBif->__kbifInitRelaxedOrderingFromEmulatedConfigSpace__(pGpu, pBif); -} - NV_STATUS kbifEnableNoSnoop_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool bEnable); NV_STATUS kbifEnableNoSnoop_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool bEnable); -static inline NV_STATUS kbifEnableNoSnoop_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool bEnable) { - return pKernelBif->__kbifEnableNoSnoop__(pGpu, pKernelBif, bEnable); -} - void kbifApplyWARBug3208922_GA100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); static inline void kbifApplyWARBug3208922_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { return; } -static inline void kbifApplyWARBug3208922_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - pKernelBif->__kbifApplyWARBug3208922__(pGpu, pKernelBif); -} - static inline void kbifProbePcieReqAtomicCaps_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { return; } void kbifProbePcieReqAtomicCaps_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline void kbifProbePcieReqAtomicCaps_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - pKernelBif->__kbifProbePcieReqAtomicCaps__(pGpu, pKernelBif); -} - void kbifEnablePcieAtomics_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); static inline void kbifEnablePcieAtomics_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { return; } -static inline void kbifEnablePcieAtomics_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - pKernelBif->__kbifEnablePcieAtomics__(pGpu, pKernelBif); -} - NV_STATUS kbifDoFunctionLevelReset_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); NV_STATUS kbifDoFunctionLevelReset_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline NV_STATUS kbifDoFunctionLevelReset_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifDoFunctionLevelReset__(pGpu, pKernelBif); -} - -NV_STATUS kbifInitXveRegMap_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU8 arg0); - -NV_STATUS kbifInitXveRegMap_GA102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU8 arg0); +NV_STATUS kbifInitXveRegMap_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU8 arg3); -static inline NV_STATUS kbifInitXveRegMap_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU8 arg0) { - return pKernelBif->__kbifInitXveRegMap__(pGpu, pKernelBif, arg0); -} +NV_STATUS kbifInitXveRegMap_GA102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU8 arg3); NvU32 kbifGetMSIXTableVectorControlSize_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); NvU32 kbifGetMSIXTableVectorControlSize_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline NvU32 kbifGetMSIXTableVectorControlSize_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifGetMSIXTableVectorControlSize__(pGpu, pKernelBif); -} - NV_STATUS kbifSaveMsixTable_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); static inline NV_STATUS kbifSaveMsixTable_46f6a7(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbifSaveMsixTable_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifSaveMsixTable__(pGpu, pKernelBif); -} - NV_STATUS kbifRestoreMsixTable_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); static inline NV_STATUS kbifRestoreMsixTable_46f6a7(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbifRestoreMsixTable_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifRestoreMsixTable__(pGpu, pKernelBif); -} - NV_STATUS kbifConfigAccessWait_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, RMTIMEOUT *pTimeout); static inline NV_STATUS kbifConfigAccessWait_46f6a7(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, RMTIMEOUT *pTimeout) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kbifConfigAccessWait_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, RMTIMEOUT *pTimeout) { - return pKernelBif->__kbifConfigAccessWait__(pGpu, pKernelBif, pTimeout); -} - NV_STATUS kbifGetPciConfigSpacePriMirror_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pMirrorBase, NvU32 *pMirrorSize); NV_STATUS kbifGetPciConfigSpacePriMirror_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pMirrorBase, NvU32 *pMirrorSize); -static inline NV_STATUS kbifGetPciConfigSpacePriMirror_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pMirrorBase, NvU32 *pMirrorSize) { - return pKernelBif->__kbifGetPciConfigSpacePriMirror__(pGpu, pKernelBif, pMirrorBase, pMirrorSize); -} - NV_STATUS kbifGetBusOptionsAddr_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, BUS_OPTIONS options, NvU32 *addrReg); NV_STATUS kbifGetBusOptionsAddr_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, BUS_OPTIONS options, NvU32 *addrReg); -static inline NV_STATUS kbifGetBusOptionsAddr_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, BUS_OPTIONS options, NvU32 *addrReg) { - return pKernelBif->__kbifGetBusOptionsAddr__(pGpu, pKernelBif, options, addrReg); -} - NV_STATUS kbifPreOsGlobalErotGrantRequest_AD102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); static inline NV_STATUS kbifPreOsGlobalErotGrantRequest_56cd7a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { return NV_OK; } -static inline NV_STATUS kbifPreOsGlobalErotGrantRequest_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifPreOsGlobalErotGrantRequest__(pGpu, pKernelBif); -} - static inline NV_STATUS kbifStopSysMemRequests_56cd7a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool bStop) { return NV_OK; } @@ -865,34 +1140,18 @@ NV_STATUS kbifStopSysMemRequests_GM107(struct OBJGPU *pGpu, struct KernelBif *pK NV_STATUS kbifStopSysMemRequests_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool bStop); -static inline NV_STATUS kbifStopSysMemRequests_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool bStop) { - return pKernelBif->__kbifStopSysMemRequests__(pGpu, pKernelBif, bStop); -} - NV_STATUS kbifWaitForTransactionsComplete_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); NV_STATUS kbifWaitForTransactionsComplete_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline NV_STATUS kbifWaitForTransactionsComplete_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifWaitForTransactionsComplete__(pGpu, pKernelBif); -} - NV_STATUS kbifTriggerFlr_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); NV_STATUS kbifTriggerFlr_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline NV_STATUS kbifTriggerFlr_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifTriggerFlr__(pGpu, pKernelBif); -} - void kbifCacheFlrSupport_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); void kbifCacheFlrSupport_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline void kbifCacheFlrSupport_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - pKernelBif->__kbifCacheFlrSupport__(pGpu, pKernelBif); -} - static inline void kbifCache64bBar0Support_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { return; } @@ -901,125 +1160,83 @@ void kbifCache64bBar0Support_GA100(struct OBJGPU *pGpu, struct KernelBif *pKerne void kbifCache64bBar0Support_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline void kbifCache64bBar0Support_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - pKernelBif->__kbifCache64bBar0Support__(pGpu, pKernelBif); -} - void kbifCacheVFInfo_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); void kbifCacheVFInfo_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline void kbifCacheVFInfo_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - pKernelBif->__kbifCacheVFInfo__(pGpu, pKernelBif); -} - -void kbifRestoreBar0_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, void *arg0, NvU32 *arg1); - -void kbifRestoreBar0_GA100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, void *arg0, NvU32 *arg1); +void kbifRestoreBar0_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, void *arg3, NvU32 *arg4); -static inline void kbifRestoreBar0_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, void *arg0, NvU32 *arg1) { - pKernelBif->__kbifRestoreBar0__(pGpu, pKernelBif, arg0, arg1); -} +void kbifRestoreBar0_GA100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, void *arg3, NvU32 *arg4); NvBool kbifAnyBarsAreValid_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); NvBool kbifAnyBarsAreValid_GA100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline NvBool kbifAnyBarsAreValid_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifAnyBarsAreValid__(pGpu, pKernelBif); -} - NV_STATUS kbifRestoreBarsAndCommand_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); NV_STATUS kbifRestoreBarsAndCommand_GA100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); NV_STATUS kbifRestoreBarsAndCommand_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline NV_STATUS kbifRestoreBarsAndCommand_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifRestoreBarsAndCommand__(pGpu, pKernelBif); -} - -void kbifStoreBarRegOffsets_GA100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0); +void kbifStoreBarRegOffsets_GA100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg3); -static inline void kbifStoreBarRegOffsets_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0) { +static inline void kbifStoreBarRegOffsets_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg3) { return; } -static inline void kbifStoreBarRegOffsets_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0) { - pKernelBif->__kbifStoreBarRegOffsets__(pGpu, pKernelBif, arg0); -} - NV_STATUS kbifInit_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); NV_STATUS kbifInit_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline NV_STATUS kbifInit_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifInit__(pGpu, pKernelBif); +void kbifPrepareForFullChipReset_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); + +void kbifPrepareForFullChipReset_GA100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); + +void kbifPrepareForFullChipReset_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); + +NV_STATUS kbifDoFullChipReset_GP10X(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); + +NV_STATUS kbifDoFullChipReset_GA100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); + +NV_STATUS kbifDoFullChipReset_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); + +void kbifResetHostEngines_GA100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, struct KernelMc *arg3); + +static inline void kbifResetHostEngines_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, struct KernelMc *arg3) { + return; } NvU32 kbifGetValidEnginesToReset_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); NvU32 kbifGetValidEnginesToReset_GA100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline NvU32 kbifGetValidEnginesToReset_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifGetValidEnginesToReset__(pGpu, pKernelBif); -} - NvU32 kbifGetValidDeviceEnginesToReset_GA100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); static inline NvU32 kbifGetValidDeviceEnginesToReset_15a734(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { return 0U; } -static inline NvU32 kbifGetValidDeviceEnginesToReset_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifGetValidDeviceEnginesToReset__(pGpu, pKernelBif); -} - NvU32 kbifGetEccCounts_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); static inline NvU32 kbifGetEccCounts_4a4dee(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { return 0; } -static inline NvU32 kbifGetEccCounts_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifGetEccCounts__(pGpu, pKernelBif); -} - -static inline NV_STATUS kbifStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate, NvU32 arg0) { - return pEngstate->__kbifStatePreLoad__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS kbifStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate, NvU32 arg0) { - return pEngstate->__kbifStatePostUnload__(pGpu, pEngstate, arg0); -} - -static inline void kbifStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) { - pEngstate->__kbifStateDestroy__(pGpu, pEngstate); -} - -static inline NV_STATUS kbifStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate, NvU32 arg0) { - return pEngstate->__kbifStatePreUnload__(pGpu, pEngstate, arg0); -} +NvBool kbifAllowGpuOutboundPcieAtomics_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline NV_STATUS kbifStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) { - return pEngstate->__kbifStateInitUnlocked__(pGpu, pEngstate); +static inline NvBool kbifAllowGpuOutboundPcieAtomics_491d52(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return ((NvBool)(0 != 0)); } -static inline void kbifInitMissing_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) { - pEngstate->__kbifInitMissing__(pGpu, pEngstate); -} +void kbifClearDownstreamReadCounter_GA100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline NV_STATUS kbifStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) { - return pEngstate->__kbifStatePreInitLocked__(pGpu, pEngstate); +static inline void kbifClearDownstreamReadCounter_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return; } -static inline NV_STATUS kbifStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) { - return pEngstate->__kbifStatePreInitUnlocked__(pGpu, pEngstate); -} +NV_STATUS kbifDoSecondaryBusHotReset_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline NvBool kbifIsPresent_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) { - return pEngstate->__kbifIsPresent__(pGpu, pEngstate); -} +NV_STATUS kbifDoSecondaryBusHotReset_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); NV_STATUS kbifStaticInfoInit_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); @@ -1140,6 +1357,17 @@ static inline NvU32 kbifGetGpuL1PmSubstatesCtrl1(struct OBJGPU *pGpu, struct Ker #define kbifGetGpuL1PmSubstatesCtrl1(pGpu, pKernelBif) kbifGetGpuL1PmSubstatesCtrl1_IMPL(pGpu, pKernelBif) #endif //__nvoc_kernel_bif_h_disabled +NV_STATUS kbifWaitForConfigAccessAfterReset_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); + +#ifdef __nvoc_kernel_bif_h_disabled +static inline NV_STATUS kbifWaitForConfigAccessAfterReset(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kernel_bif_h_disabled +#define kbifWaitForConfigAccessAfterReset(pGpu, pKernelBif) kbifWaitForConfigAccessAfterReset_IMPL(pGpu, pKernelBif) +#endif //__nvoc_kernel_bif_h_disabled + NvBool kbifIsPciBusFamily_IMPL(struct KernelBif *pKernelBif); #ifdef __nvoc_kernel_bif_h_disabled @@ -1173,6 +1401,17 @@ static inline NvU32 kbifGetDmaCaps(struct OBJGPU *pGpu, struct KernelBif *pKerne #define kbifGetDmaCaps(pGpu, pKernelBif) kbifGetDmaCaps_IMPL(pGpu, pKernelBif) #endif //__nvoc_kernel_bif_h_disabled +NV_STATUS kbifResetFromTimeoutFullChip_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); + +#ifdef __nvoc_kernel_bif_h_disabled +static inline NV_STATUS kbifResetFromTimeoutFullChip(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kernel_bif_h_disabled +#define kbifResetFromTimeoutFullChip(pGpu, pKernelBif) kbifResetFromTimeoutFullChip_IMPL(pGpu, pKernelBif) +#endif //__nvoc_kernel_bif_h_disabled + #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_kernel_ccu_api_nvoc.c b/src/nvidia/generated/g_kernel_ccu_api_nvoc.c index 23f4046c56..83d46f5cd2 100644 --- a/src/nvidia/generated/g_kernel_ccu_api_nvoc.c +++ b/src/nvidia/generated/g_kernel_ccu_api_nvoc.c @@ -93,106 +93,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCcuApi = /*pExportInfo=*/ &__nvoc_export_info_KernelCcuApi }; -static NV_STATUS __nvoc_thunk_KernelCcuApi_gpuresMap(struct GpuResource *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return kccuapiMap((struct KernelCcuApi *)(((unsigned char *)pKernelCcuApi) - __nvoc_rtti_KernelCcuApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_KernelCcuApi_gpuresUnmap(struct GpuResource *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return kccuapiUnmap((struct KernelCcuApi *)(((unsigned char *)pKernelCcuApi) - __nvoc_rtti_KernelCcuApi_GpuResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_KernelCcuApi_gpuresGetMapAddrSpace(struct GpuResource *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return kccuapiGetMapAddrSpace((struct KernelCcuApi *)(((unsigned char *)pKernelCcuApi) - __nvoc_rtti_KernelCcuApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} - -static NV_STATUS __nvoc_thunk_KernelCcuApi_rmresGetMemoryMappingDescriptor(struct RmResource *pKernelCcuApi, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return kccuapiGetMemoryMappingDescriptor((struct KernelCcuApi *)(((unsigned char *)pKernelCcuApi) - __nvoc_rtti_KernelCcuApi_RmResource.offset), ppMemDesc); -} - -static NvBool __nvoc_thunk_GpuResource_kccuapiShareCallback(struct KernelCcuApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCcuApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_kccuapiCheckMemInterUnmap(struct KernelCcuApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RsResource_kccuapiMapTo(struct KernelCcuApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset), pParams); -} - -static NvU32 __nvoc_thunk_RsResource_kccuapiGetRefCount(struct KernelCcuApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_kccuapiAddAdditionalDependants(struct RsClient *pClient, struct KernelCcuApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_kccuapiControl_Prologue(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kccuapiGetRegBaseOffsetAndSize(struct KernelCcuApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCcuApi_GpuResource.offset), pGpu, pOffset, pSize); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kccuapiInternalControlForward(struct KernelCcuApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCcuApi_GpuResource.offset), command, pParams, size); -} - -static NV_STATUS __nvoc_thunk_RsResource_kccuapiUnmapFrom(struct KernelCcuApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_kccuapiControl_Epilogue(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), pCallContext, pParams); -} - -static NvHandle __nvoc_thunk_GpuResource_kccuapiGetInternalObjectHandle(struct KernelCcuApi *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCcuApi_GpuResource.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kccuapiControl(struct KernelCcuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCcuApi_GpuResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_kccuapiGetMemInterMapParams(struct KernelCcuApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_kccuapiControlFilter(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_kccuapiControlSerialization_Prologue(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_kccuapiCanCopy(struct KernelCcuApi *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_kccuapiIsPartialUnmapSupported(struct KernelCcuApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_kccuapiPreDestruct(struct KernelCcuApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_kccuapiIsDuplicate(struct KernelCcuApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_kccuapiControlSerialization_Epilogue(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RmResource_kccuapiAccessCallback(struct KernelCcuApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -200,12 +100,12 @@ static NvBool __nvoc_thunk_RmResource_kccuapiAccessCallback(struct KernelCcuApi static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCcuApi[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kccuapiCtrlCmdSubscribe_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xcbca0101u, /*paramSize=*/ sizeof(NV_COUNTER_COLLECTION_UNIT_SUBSCRIBE_PARAMS), @@ -215,12 +115,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCc #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kccuapiCtrlCmdUnsubscribe_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xcbca0102u, /*paramSize=*/ 0, @@ -230,12 +130,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCc #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kccuapiCtrlCmdSetStreamState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xcbca0103u, /*paramSize=*/ sizeof(NV_COUNTER_COLLECTION_UNIT_STREAM_STATE_PARAMS), @@ -245,12 +145,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCc #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kccuapiCtrlCmdGetStreamState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xcbca0104u, /*paramSize=*/ sizeof(NV_COUNTER_COLLECTION_UNIT_STREAM_STATE_PARAMS), @@ -262,6 +162,137 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCc }; +// 4 down-thunk(s) defined to bridge methods in KernelCcuApi from superclasses + +// kccuapiMap: virtual override (res) base (gpures) +static NV_STATUS __nvoc_down_thunk_KernelCcuApi_gpuresMap(struct GpuResource *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return kccuapiMap((struct KernelCcuApi *)(((unsigned char *) pKernelCcuApi) - __nvoc_rtti_KernelCcuApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// kccuapiUnmap: virtual override (res) base (gpures) +static NV_STATUS __nvoc_down_thunk_KernelCcuApi_gpuresUnmap(struct GpuResource *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return kccuapiUnmap((struct KernelCcuApi *)(((unsigned char *) pKernelCcuApi) - __nvoc_rtti_KernelCcuApi_GpuResource.offset), pCallContext, pCpuMapping); +} + +// kccuapiGetMapAddrSpace: virtual override (gpures) base (gpures) +static NV_STATUS __nvoc_down_thunk_KernelCcuApi_gpuresGetMapAddrSpace(struct GpuResource *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return kccuapiGetMapAddrSpace((struct KernelCcuApi *)(((unsigned char *) pKernelCcuApi) - __nvoc_rtti_KernelCcuApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + +// kccuapiGetMemoryMappingDescriptor: virtual override (rmres) base (gpures) +static NV_STATUS __nvoc_down_thunk_KernelCcuApi_rmresGetMemoryMappingDescriptor(struct RmResource *pKernelCcuApi, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return kccuapiGetMemoryMappingDescriptor((struct KernelCcuApi *)(((unsigned char *) pKernelCcuApi) - __nvoc_rtti_KernelCcuApi_RmResource.offset), ppMemDesc); +} + + +// 21 up-thunk(s) defined to bridge methods in KernelCcuApi to superclasses + +// kccuapiControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kccuapiControl(struct KernelCcuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCcuApi_GpuResource.offset), pCallContext, pParams); +} + +// kccuapiShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_kccuapiShareCallback(struct KernelCcuApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCcuApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// kccuapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kccuapiGetRegBaseOffsetAndSize(struct KernelCcuApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCcuApi_GpuResource.offset), pGpu, pOffset, pSize); +} + +// kccuapiInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kccuapiInternalControlForward(struct KernelCcuApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCcuApi_GpuResource.offset), command, pParams, size); +} + +// kccuapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_kccuapiGetInternalObjectHandle(struct KernelCcuApi *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCcuApi_GpuResource.offset)); +} + +// kccuapiAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_kccuapiAccessCallback(struct KernelCcuApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// kccuapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kccuapiGetMemInterMapParams(struct KernelCcuApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), pParams); +} + +// kccuapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kccuapiCheckMemInterUnmap(struct KernelCcuApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), bSubdeviceHandleProvided); +} + +// kccuapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kccuapiControlSerialization_Prologue(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), pCallContext, pParams); +} + +// kccuapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_kccuapiControlSerialization_Epilogue(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), pCallContext, pParams); +} + +// kccuapiControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kccuapiControl_Prologue(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), pCallContext, pParams); +} + +// kccuapiControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_kccuapiControl_Epilogue(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), pCallContext, pParams); +} + +// kccuapiCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_kccuapiCanCopy(struct KernelCcuApi *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset)); +} + +// kccuapiIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kccuapiIsDuplicate(struct KernelCcuApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset), hMemory, pDuplicate); +} + +// kccuapiPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_kccuapiPreDestruct(struct KernelCcuApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset)); +} + +// kccuapiControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kccuapiControlFilter(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset), pCallContext, pParams); +} + +// kccuapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_kccuapiIsPartialUnmapSupported(struct KernelCcuApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset)); +} + +// kccuapiMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kccuapiMapTo(struct KernelCcuApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset), pParams); +} + +// kccuapiUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kccuapiUnmapFrom(struct KernelCcuApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset), pParams); +} + +// kccuapiGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_kccuapiGetRefCount(struct KernelCcuApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset)); +} + +// kccuapiAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_kccuapiAddAdditionalDependants(struct RsClient *pClient, struct KernelCcuApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset), pReference); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelCcuApi = { /*numEntries=*/ 4, @@ -298,85 +329,115 @@ NV_STATUS __nvoc_ctor_KernelCcuApi(KernelCcuApi *pThis, struct CALL_CONTEXT * ar return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelCcuApi_1(KernelCcuApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // kccuapiMap -- virtual override (res) base (gpures) pThis->__kccuapiMap__ = &kccuapiMap_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresMap__ = &__nvoc_down_thunk_KernelCcuApi_gpuresMap; + // kccuapiUnmap -- virtual override (res) base (gpures) pThis->__kccuapiUnmap__ = &kccuapiUnmap_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresUnmap__ = &__nvoc_down_thunk_KernelCcuApi_gpuresUnmap; + // kccuapiGetMapAddrSpace -- virtual override (gpures) base (gpures) pThis->__kccuapiGetMapAddrSpace__ = &kccuapiGetMapAddrSpace_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_down_thunk_KernelCcuApi_gpuresGetMapAddrSpace; + // kccuapiGetMemoryMappingDescriptor -- virtual override (rmres) base (gpures) pThis->__kccuapiGetMemoryMappingDescriptor__ = &kccuapiGetMemoryMappingDescriptor_IMPL; + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_KernelCcuApi_rmresGetMemoryMappingDescriptor; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kccuapiCtrlCmdSubscribe -- exported (id=0xcbca0101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kccuapiCtrlCmdSubscribe__ = &kccuapiCtrlCmdSubscribe_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kccuapiCtrlCmdUnsubscribe -- exported (id=0xcbca0102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kccuapiCtrlCmdUnsubscribe__ = &kccuapiCtrlCmdUnsubscribe_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kccuapiCtrlCmdSetStreamState -- exported (id=0xcbca0103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kccuapiCtrlCmdSetStreamState__ = &kccuapiCtrlCmdSetStreamState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kccuapiCtrlCmdGetStreamState -- exported (id=0xcbca0104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kccuapiCtrlCmdGetStreamState__ = &kccuapiCtrlCmdGetStreamState_IMPL; #endif - pThis->__nvoc_base_GpuResource.__gpuresMap__ = &__nvoc_thunk_KernelCcuApi_gpuresMap; - - pThis->__nvoc_base_GpuResource.__gpuresUnmap__ = &__nvoc_thunk_KernelCcuApi_gpuresUnmap; - - pThis->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_thunk_KernelCcuApi_gpuresGetMapAddrSpace; + // kccuapiControl -- virtual inherited (gpures) base (gpures) + pThis->__kccuapiControl__ = &__nvoc_up_thunk_GpuResource_kccuapiControl; - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_thunk_KernelCcuApi_rmresGetMemoryMappingDescriptor; + // kccuapiShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__kccuapiShareCallback__ = &__nvoc_up_thunk_GpuResource_kccuapiShareCallback; - pThis->__kccuapiShareCallback__ = &__nvoc_thunk_GpuResource_kccuapiShareCallback; + // kccuapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__kccuapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kccuapiGetRegBaseOffsetAndSize; - pThis->__kccuapiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_kccuapiCheckMemInterUnmap; + // kccuapiInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__kccuapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kccuapiInternalControlForward; - pThis->__kccuapiMapTo__ = &__nvoc_thunk_RsResource_kccuapiMapTo; + // kccuapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__kccuapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kccuapiGetInternalObjectHandle; - pThis->__kccuapiGetRefCount__ = &__nvoc_thunk_RsResource_kccuapiGetRefCount; + // kccuapiAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__kccuapiAccessCallback__ = &__nvoc_up_thunk_RmResource_kccuapiAccessCallback; - pThis->__kccuapiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_kccuapiAddAdditionalDependants; + // kccuapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__kccuapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_kccuapiGetMemInterMapParams; - pThis->__kccuapiControl_Prologue__ = &__nvoc_thunk_RmResource_kccuapiControl_Prologue; + // kccuapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__kccuapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_kccuapiCheckMemInterUnmap; - pThis->__kccuapiGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_kccuapiGetRegBaseOffsetAndSize; + // kccuapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__kccuapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kccuapiControlSerialization_Prologue; - pThis->__kccuapiInternalControlForward__ = &__nvoc_thunk_GpuResource_kccuapiInternalControlForward; + // kccuapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__kccuapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kccuapiControlSerialization_Epilogue; - pThis->__kccuapiUnmapFrom__ = &__nvoc_thunk_RsResource_kccuapiUnmapFrom; + // kccuapiControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__kccuapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_kccuapiControl_Prologue; - pThis->__kccuapiControl_Epilogue__ = &__nvoc_thunk_RmResource_kccuapiControl_Epilogue; + // kccuapiControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__kccuapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kccuapiControl_Epilogue; - pThis->__kccuapiGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_kccuapiGetInternalObjectHandle; + // kccuapiCanCopy -- virtual inherited (res) base (gpures) + pThis->__kccuapiCanCopy__ = &__nvoc_up_thunk_RsResource_kccuapiCanCopy; - pThis->__kccuapiControl__ = &__nvoc_thunk_GpuResource_kccuapiControl; + // kccuapiIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__kccuapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_kccuapiIsDuplicate; - pThis->__kccuapiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_kccuapiGetMemInterMapParams; + // kccuapiPreDestruct -- virtual inherited (res) base (gpures) + pThis->__kccuapiPreDestruct__ = &__nvoc_up_thunk_RsResource_kccuapiPreDestruct; - pThis->__kccuapiControlFilter__ = &__nvoc_thunk_RsResource_kccuapiControlFilter; + // kccuapiControlFilter -- virtual inherited (res) base (gpures) + pThis->__kccuapiControlFilter__ = &__nvoc_up_thunk_RsResource_kccuapiControlFilter; - pThis->__kccuapiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_kccuapiControlSerialization_Prologue; + // kccuapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__kccuapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kccuapiIsPartialUnmapSupported; - pThis->__kccuapiCanCopy__ = &__nvoc_thunk_RsResource_kccuapiCanCopy; + // kccuapiMapTo -- virtual inherited (res) base (gpures) + pThis->__kccuapiMapTo__ = &__nvoc_up_thunk_RsResource_kccuapiMapTo; - pThis->__kccuapiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_kccuapiIsPartialUnmapSupported; + // kccuapiUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__kccuapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_kccuapiUnmapFrom; - pThis->__kccuapiPreDestruct__ = &__nvoc_thunk_RsResource_kccuapiPreDestruct; + // kccuapiGetRefCount -- virtual inherited (res) base (gpures) + pThis->__kccuapiGetRefCount__ = &__nvoc_up_thunk_RsResource_kccuapiGetRefCount; - pThis->__kccuapiIsDuplicate__ = &__nvoc_thunk_RsResource_kccuapiIsDuplicate; + // kccuapiAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__kccuapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kccuapiAddAdditionalDependants; +} // End __nvoc_init_funcTable_KernelCcuApi_1 with approximately 33 basic block(s). - pThis->__kccuapiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_kccuapiControlSerialization_Epilogue; - - pThis->__kccuapiAccessCallback__ = &__nvoc_thunk_RmResource_kccuapiAccessCallback; -} +// Initialize vtable(s) for 29 virtual method(s). void __nvoc_init_funcTable_KernelCcuApi(KernelCcuApi *pThis) { + + // Initialize vtable(s) with 29 per-object function pointer(s). __nvoc_init_funcTable_KernelCcuApi_1(pThis); } diff --git a/src/nvidia/generated/g_kernel_ccu_api_nvoc.h b/src/nvidia/generated/g_kernel_ccu_api_nvoc.h index edc07fd650..6fcc27f288 100644 --- a/src/nvidia/generated/g_kernel_ccu_api_nvoc.h +++ b/src/nvidia/generated/g_kernel_ccu_api_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_CCU_API_NVOC_H_ #define _G_KERNEL_CCU_API_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_ccu_api_nvoc.h" #ifndef KERNEL_CCU_API_H @@ -53,44 +61,53 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelCcuApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct KernelCcuApi *__nvoc_pbase_KernelCcuApi; - NV_STATUS (*__kccuapiMap__)(struct KernelCcuApi *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NV_STATUS (*__kccuapiUnmap__)(struct KernelCcuApi *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__kccuapiGetMapAddrSpace__)(struct KernelCcuApi *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NV_STATUS (*__kccuapiGetMemoryMappingDescriptor__)(struct KernelCcuApi *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__kccuapiCtrlCmdSubscribe__)(struct KernelCcuApi *, NV_COUNTER_COLLECTION_UNIT_SUBSCRIBE_PARAMS *); - NV_STATUS (*__kccuapiCtrlCmdUnsubscribe__)(struct KernelCcuApi *); - NV_STATUS (*__kccuapiCtrlCmdSetStreamState__)(struct KernelCcuApi *, NV_COUNTER_COLLECTION_UNIT_STREAM_STATE_PARAMS *); - NV_STATUS (*__kccuapiCtrlCmdGetStreamState__)(struct KernelCcuApi *, NV_COUNTER_COLLECTION_UNIT_STREAM_STATE_PARAMS *); - NvBool (*__kccuapiShareCallback__)(struct KernelCcuApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__kccuapiCheckMemInterUnmap__)(struct KernelCcuApi *, NvBool); - NV_STATUS (*__kccuapiMapTo__)(struct KernelCcuApi *, RS_RES_MAP_TO_PARAMS *); - NvU32 (*__kccuapiGetRefCount__)(struct KernelCcuApi *); - void (*__kccuapiAddAdditionalDependants__)(struct RsClient *, struct KernelCcuApi *, RsResourceRef *); - NV_STATUS (*__kccuapiControl_Prologue__)(struct KernelCcuApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kccuapiGetRegBaseOffsetAndSize__)(struct KernelCcuApi *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__kccuapiInternalControlForward__)(struct KernelCcuApi *, NvU32, void *, NvU32); - NV_STATUS (*__kccuapiUnmapFrom__)(struct KernelCcuApi *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__kccuapiControl_Epilogue__)(struct KernelCcuApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__kccuapiGetInternalObjectHandle__)(struct KernelCcuApi *); - NV_STATUS (*__kccuapiControl__)(struct KernelCcuApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kccuapiGetMemInterMapParams__)(struct KernelCcuApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__kccuapiControlFilter__)(struct KernelCcuApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kccuapiControlSerialization_Prologue__)(struct KernelCcuApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__kccuapiCanCopy__)(struct KernelCcuApi *); - NvBool (*__kccuapiIsPartialUnmapSupported__)(struct KernelCcuApi *); - void (*__kccuapiPreDestruct__)(struct KernelCcuApi *); - NV_STATUS (*__kccuapiIsDuplicate__)(struct KernelCcuApi *, NvHandle, NvBool *); - void (*__kccuapiControlSerialization_Epilogue__)(struct KernelCcuApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__kccuapiAccessCallback__)(struct KernelCcuApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct KernelCcuApi *__nvoc_pbase_KernelCcuApi; // kccuapi + + // Vtable with 29 per-object function pointers + NV_STATUS (*__kccuapiMap__)(struct KernelCcuApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual override (res) base (gpures) + NV_STATUS (*__kccuapiUnmap__)(struct KernelCcuApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual override (res) base (gpures) + NV_STATUS (*__kccuapiGetMapAddrSpace__)(struct KernelCcuApi * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (gpures) base (gpures) + NV_STATUS (*__kccuapiGetMemoryMappingDescriptor__)(struct KernelCcuApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual override (rmres) base (gpures) + NV_STATUS (*__kccuapiCtrlCmdSubscribe__)(struct KernelCcuApi * /*this*/, NV_COUNTER_COLLECTION_UNIT_SUBSCRIBE_PARAMS *); // exported (id=0xcbca0101) + NV_STATUS (*__kccuapiCtrlCmdUnsubscribe__)(struct KernelCcuApi * /*this*/); // exported (id=0xcbca0102) + NV_STATUS (*__kccuapiCtrlCmdSetStreamState__)(struct KernelCcuApi * /*this*/, NV_COUNTER_COLLECTION_UNIT_STREAM_STATE_PARAMS *); // exported (id=0xcbca0103) + NV_STATUS (*__kccuapiCtrlCmdGetStreamState__)(struct KernelCcuApi * /*this*/, NV_COUNTER_COLLECTION_UNIT_STREAM_STATE_PARAMS *); // exported (id=0xcbca0104) + NV_STATUS (*__kccuapiControl__)(struct KernelCcuApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NvBool (*__kccuapiShareCallback__)(struct KernelCcuApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kccuapiGetRegBaseOffsetAndSize__)(struct KernelCcuApi * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kccuapiInternalControlForward__)(struct KernelCcuApi * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__kccuapiGetInternalObjectHandle__)(struct KernelCcuApi * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__kccuapiAccessCallback__)(struct KernelCcuApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kccuapiGetMemInterMapParams__)(struct KernelCcuApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kccuapiCheckMemInterUnmap__)(struct KernelCcuApi * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kccuapiControlSerialization_Prologue__)(struct KernelCcuApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__kccuapiControlSerialization_Epilogue__)(struct KernelCcuApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kccuapiControl_Prologue__)(struct KernelCcuApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__kccuapiControl_Epilogue__)(struct KernelCcuApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__kccuapiCanCopy__)(struct KernelCcuApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__kccuapiIsDuplicate__)(struct KernelCcuApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__kccuapiPreDestruct__)(struct KernelCcuApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__kccuapiControlFilter__)(struct KernelCcuApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__kccuapiIsPartialUnmapSupported__)(struct KernelCcuApi * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__kccuapiMapTo__)(struct KernelCcuApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__kccuapiUnmapFrom__)(struct KernelCcuApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__kccuapiGetRefCount__)(struct KernelCcuApi * /*this*/); // virtual inherited (res) base (gpures) + void (*__kccuapiAddAdditionalDependants__)(struct RsClient *, struct KernelCcuApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) }; #ifndef __NVOC_CLASS_KernelCcuApi_TYPEDEF__ @@ -102,6 +119,7 @@ typedef struct KernelCcuApi KernelCcuApi; #define __nvoc_class_id_KernelCcuApi 0x3abed3 #endif /* __nvoc_class_id_KernelCcuApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCcuApi; #define __staticCast_KernelCcuApi(pThis) \ @@ -114,174 +132,206 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCcuApi; ((KernelCcuApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelCcuApi))) #endif //__nvoc_kernel_ccu_api_h_disabled - NV_STATUS __nvoc_objCreateDynamic_KernelCcuApi(KernelCcuApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_KernelCcuApi(KernelCcuApi**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_KernelCcuApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_KernelCcuApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define kccuapiMap_FNPTR(pKernelCcuApi) pKernelCcuApi->__kccuapiMap__ #define kccuapiMap(pKernelCcuApi, pCallContext, pParams, pCpuMapping) kccuapiMap_DISPATCH(pKernelCcuApi, pCallContext, pParams, pCpuMapping) +#define kccuapiUnmap_FNPTR(pKernelCcuApi) pKernelCcuApi->__kccuapiUnmap__ #define kccuapiUnmap(pKernelCcuApi, pCallContext, pCpuMapping) kccuapiUnmap_DISPATCH(pKernelCcuApi, pCallContext, pCpuMapping) +#define kccuapiGetMapAddrSpace_FNPTR(pKernelCcuApi) pKernelCcuApi->__kccuapiGetMapAddrSpace__ #define kccuapiGetMapAddrSpace(pKernelCcuApi, pCallContext, mapFlags, pAddrSpace) kccuapiGetMapAddrSpace_DISPATCH(pKernelCcuApi, pCallContext, mapFlags, pAddrSpace) +#define kccuapiGetMemoryMappingDescriptor_FNPTR(pKernelCcuApi) pKernelCcuApi->__kccuapiGetMemoryMappingDescriptor__ #define kccuapiGetMemoryMappingDescriptor(pKernelCcuApi, ppMemDesc) kccuapiGetMemoryMappingDescriptor_DISPATCH(pKernelCcuApi, ppMemDesc) +#define kccuapiCtrlCmdSubscribe_FNPTR(pKernelCcuApi) pKernelCcuApi->__kccuapiCtrlCmdSubscribe__ #define kccuapiCtrlCmdSubscribe(pKernelCcuApi, pParams) kccuapiCtrlCmdSubscribe_DISPATCH(pKernelCcuApi, pParams) +#define kccuapiCtrlCmdUnsubscribe_FNPTR(pKernelCcuApi) pKernelCcuApi->__kccuapiCtrlCmdUnsubscribe__ #define kccuapiCtrlCmdUnsubscribe(pKernelCcuApi) kccuapiCtrlCmdUnsubscribe_DISPATCH(pKernelCcuApi) +#define kccuapiCtrlCmdSetStreamState_FNPTR(pKernelCcuApi) pKernelCcuApi->__kccuapiCtrlCmdSetStreamState__ #define kccuapiCtrlCmdSetStreamState(pKernelCcuApi, pParams) kccuapiCtrlCmdSetStreamState_DISPATCH(pKernelCcuApi, pParams) +#define kccuapiCtrlCmdGetStreamState_FNPTR(pKernelCcuApi) pKernelCcuApi->__kccuapiCtrlCmdGetStreamState__ #define kccuapiCtrlCmdGetStreamState(pKernelCcuApi, pParams) kccuapiCtrlCmdGetStreamState_DISPATCH(pKernelCcuApi, pParams) +#define kccuapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define kccuapiControl(pGpuResource, pCallContext, pParams) kccuapiControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define kccuapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define kccuapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) kccuapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define kccuapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) kccuapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define kccuapiMapTo(pResource, pParams) kccuapiMapTo_DISPATCH(pResource, pParams) -#define kccuapiGetRefCount(pResource) kccuapiGetRefCount_DISPATCH(pResource) -#define kccuapiAddAdditionalDependants(pClient, pResource, pReference) kccuapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define kccuapiControl_Prologue(pResource, pCallContext, pParams) kccuapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define kccuapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define kccuapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) kccuapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define kccuapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define kccuapiInternalControlForward(pGpuResource, command, pParams, size) kccuapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define kccuapiUnmapFrom(pResource, pParams) kccuapiUnmapFrom_DISPATCH(pResource, pParams) -#define kccuapiControl_Epilogue(pResource, pCallContext, pParams) kccuapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kccuapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define kccuapiGetInternalObjectHandle(pGpuResource) kccuapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define kccuapiControl(pGpuResource, pCallContext, pParams) kccuapiControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define kccuapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define kccuapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kccuapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define kccuapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define kccuapiGetMemInterMapParams(pRmResource, pParams) kccuapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define kccuapiControlFilter(pResource, pCallContext, pParams) kccuapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define kccuapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define kccuapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) kccuapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define kccuapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define kccuapiControlSerialization_Prologue(pResource, pCallContext, pParams) kccuapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define kccuapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define kccuapiControlSerialization_Epilogue(pResource, pCallContext, pParams) kccuapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kccuapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define kccuapiControl_Prologue(pResource, pCallContext, pParams) kccuapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define kccuapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define kccuapiControl_Epilogue(pResource, pCallContext, pParams) kccuapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kccuapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define kccuapiCanCopy(pResource) kccuapiCanCopy_DISPATCH(pResource) -#define kccuapiIsPartialUnmapSupported(pResource) kccuapiIsPartialUnmapSupported_DISPATCH(pResource) -#define kccuapiPreDestruct(pResource) kccuapiPreDestruct_DISPATCH(pResource) +#define kccuapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define kccuapiIsDuplicate(pResource, hMemory, pDuplicate) kccuapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define kccuapiControlSerialization_Epilogue(pResource, pCallContext, pParams) kccuapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kccuapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kccuapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS kccuapiMap_IMPL(struct KernelCcuApi *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); +#define kccuapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define kccuapiPreDestruct(pResource) kccuapiPreDestruct_DISPATCH(pResource) +#define kccuapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define kccuapiControlFilter(pResource, pCallContext, pParams) kccuapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define kccuapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define kccuapiIsPartialUnmapSupported(pResource) kccuapiIsPartialUnmapSupported_DISPATCH(pResource) +#define kccuapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define kccuapiMapTo(pResource, pParams) kccuapiMapTo_DISPATCH(pResource, pParams) +#define kccuapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define kccuapiUnmapFrom(pResource, pParams) kccuapiUnmapFrom_DISPATCH(pResource, pParams) +#define kccuapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define kccuapiGetRefCount(pResource) kccuapiGetRefCount_DISPATCH(pResource) +#define kccuapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define kccuapiAddAdditionalDependants(pClient, pResource, pReference) kccuapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS kccuapiMap_DISPATCH(struct KernelCcuApi *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return pKernelCcuApi->__kccuapiMap__(pKernelCcuApi, pCallContext, pParams, pCpuMapping); } -NV_STATUS kccuapiUnmap_IMPL(struct KernelCcuApi *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); - static inline NV_STATUS kccuapiUnmap_DISPATCH(struct KernelCcuApi *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return pKernelCcuApi->__kccuapiUnmap__(pKernelCcuApi, pCallContext, pCpuMapping); } -NV_STATUS kccuapiGetMapAddrSpace_IMPL(struct KernelCcuApi *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); - static inline NV_STATUS kccuapiGetMapAddrSpace_DISPATCH(struct KernelCcuApi *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pKernelCcuApi->__kccuapiGetMapAddrSpace__(pKernelCcuApi, pCallContext, mapFlags, pAddrSpace); } -NV_STATUS kccuapiGetMemoryMappingDescriptor_IMPL(struct KernelCcuApi *pKernelCcuApi, struct MEMORY_DESCRIPTOR **ppMemDesc); - static inline NV_STATUS kccuapiGetMemoryMappingDescriptor_DISPATCH(struct KernelCcuApi *pKernelCcuApi, struct MEMORY_DESCRIPTOR **ppMemDesc) { return pKernelCcuApi->__kccuapiGetMemoryMappingDescriptor__(pKernelCcuApi, ppMemDesc); } -NV_STATUS kccuapiCtrlCmdSubscribe_IMPL(struct KernelCcuApi *pKernelCcuApi, NV_COUNTER_COLLECTION_UNIT_SUBSCRIBE_PARAMS *pParams); - static inline NV_STATUS kccuapiCtrlCmdSubscribe_DISPATCH(struct KernelCcuApi *pKernelCcuApi, NV_COUNTER_COLLECTION_UNIT_SUBSCRIBE_PARAMS *pParams) { return pKernelCcuApi->__kccuapiCtrlCmdSubscribe__(pKernelCcuApi, pParams); } -NV_STATUS kccuapiCtrlCmdUnsubscribe_IMPL(struct KernelCcuApi *pKernelCcuApi); - static inline NV_STATUS kccuapiCtrlCmdUnsubscribe_DISPATCH(struct KernelCcuApi *pKernelCcuApi) { return pKernelCcuApi->__kccuapiCtrlCmdUnsubscribe__(pKernelCcuApi); } -NV_STATUS kccuapiCtrlCmdSetStreamState_IMPL(struct KernelCcuApi *pKernelCcuApi, NV_COUNTER_COLLECTION_UNIT_STREAM_STATE_PARAMS *pParams); - static inline NV_STATUS kccuapiCtrlCmdSetStreamState_DISPATCH(struct KernelCcuApi *pKernelCcuApi, NV_COUNTER_COLLECTION_UNIT_STREAM_STATE_PARAMS *pParams) { return pKernelCcuApi->__kccuapiCtrlCmdSetStreamState__(pKernelCcuApi, pParams); } -NV_STATUS kccuapiCtrlCmdGetStreamState_IMPL(struct KernelCcuApi *pKernelCcuApi, NV_COUNTER_COLLECTION_UNIT_STREAM_STATE_PARAMS *pParams); - static inline NV_STATUS kccuapiCtrlCmdGetStreamState_DISPATCH(struct KernelCcuApi *pKernelCcuApi, NV_COUNTER_COLLECTION_UNIT_STREAM_STATE_PARAMS *pParams) { return pKernelCcuApi->__kccuapiCtrlCmdGetStreamState__(pKernelCcuApi, pParams); } +static inline NV_STATUS kccuapiControl_DISPATCH(struct KernelCcuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__kccuapiControl__(pGpuResource, pCallContext, pParams); +} + static inline NvBool kccuapiShareCallback_DISPATCH(struct KernelCcuApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return pGpuResource->__kccuapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline NV_STATUS kccuapiCheckMemInterUnmap_DISPATCH(struct KernelCcuApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__kccuapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS kccuapiGetRegBaseOffsetAndSize_DISPATCH(struct KernelCcuApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__kccuapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS kccuapiMapTo_DISPATCH(struct KernelCcuApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__kccuapiMapTo__(pResource, pParams); +static inline NV_STATUS kccuapiInternalControlForward_DISPATCH(struct KernelCcuApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__kccuapiInternalControlForward__(pGpuResource, command, pParams, size); } -static inline NvU32 kccuapiGetRefCount_DISPATCH(struct KernelCcuApi *pResource) { - return pResource->__kccuapiGetRefCount__(pResource); +static inline NvHandle kccuapiGetInternalObjectHandle_DISPATCH(struct KernelCcuApi *pGpuResource) { + return pGpuResource->__kccuapiGetInternalObjectHandle__(pGpuResource); } -static inline void kccuapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelCcuApi *pResource, RsResourceRef *pReference) { - pResource->__kccuapiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvBool kccuapiAccessCallback_DISPATCH(struct KernelCcuApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__kccuapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS kccuapiControl_Prologue_DISPATCH(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kccuapiControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS kccuapiGetMemInterMapParams_DISPATCH(struct KernelCcuApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__kccuapiGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS kccuapiGetRegBaseOffsetAndSize_DISPATCH(struct KernelCcuApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__kccuapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS kccuapiCheckMemInterUnmap_DISPATCH(struct KernelCcuApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__kccuapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS kccuapiInternalControlForward_DISPATCH(struct KernelCcuApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__kccuapiInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS kccuapiControlSerialization_Prologue_DISPATCH(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kccuapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS kccuapiUnmapFrom_DISPATCH(struct KernelCcuApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__kccuapiUnmapFrom__(pResource, pParams); +static inline void kccuapiControlSerialization_Epilogue_DISPATCH(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__kccuapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS kccuapiControl_Prologue_DISPATCH(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kccuapiControl_Prologue__(pResource, pCallContext, pParams); } static inline void kccuapiControl_Epilogue_DISPATCH(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { pResource->__kccuapiControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NvHandle kccuapiGetInternalObjectHandle_DISPATCH(struct KernelCcuApi *pGpuResource) { - return pGpuResource->__kccuapiGetInternalObjectHandle__(pGpuResource); +static inline NvBool kccuapiCanCopy_DISPATCH(struct KernelCcuApi *pResource) { + return pResource->__kccuapiCanCopy__(pResource); } -static inline NV_STATUS kccuapiControl_DISPATCH(struct KernelCcuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__kccuapiControl__(pGpuResource, pCallContext, pParams); +static inline NV_STATUS kccuapiIsDuplicate_DISPATCH(struct KernelCcuApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__kccuapiIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS kccuapiGetMemInterMapParams_DISPATCH(struct KernelCcuApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__kccuapiGetMemInterMapParams__(pRmResource, pParams); +static inline void kccuapiPreDestruct_DISPATCH(struct KernelCcuApi *pResource) { + pResource->__kccuapiPreDestruct__(pResource); } static inline NV_STATUS kccuapiControlFilter_DISPATCH(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__kccuapiControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS kccuapiControlSerialization_Prologue_DISPATCH(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kccuapiControlSerialization_Prologue__(pResource, pCallContext, pParams); -} - -static inline NvBool kccuapiCanCopy_DISPATCH(struct KernelCcuApi *pResource) { - return pResource->__kccuapiCanCopy__(pResource); -} - static inline NvBool kccuapiIsPartialUnmapSupported_DISPATCH(struct KernelCcuApi *pResource) { return pResource->__kccuapiIsPartialUnmapSupported__(pResource); } -static inline void kccuapiPreDestruct_DISPATCH(struct KernelCcuApi *pResource) { - pResource->__kccuapiPreDestruct__(pResource); +static inline NV_STATUS kccuapiMapTo_DISPATCH(struct KernelCcuApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__kccuapiMapTo__(pResource, pParams); } -static inline NV_STATUS kccuapiIsDuplicate_DISPATCH(struct KernelCcuApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__kccuapiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS kccuapiUnmapFrom_DISPATCH(struct KernelCcuApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__kccuapiUnmapFrom__(pResource, pParams); } -static inline void kccuapiControlSerialization_Epilogue_DISPATCH(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kccuapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 kccuapiGetRefCount_DISPATCH(struct KernelCcuApi *pResource) { + return pResource->__kccuapiGetRefCount__(pResource); } -static inline NvBool kccuapiAccessCallback_DISPATCH(struct KernelCcuApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__kccuapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline void kccuapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelCcuApi *pResource, RsResourceRef *pReference) { + pResource->__kccuapiAddAdditionalDependants__(pClient, pResource, pReference); } +NV_STATUS kccuapiMap_IMPL(struct KernelCcuApi *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); + +NV_STATUS kccuapiUnmap_IMPL(struct KernelCcuApi *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); + +NV_STATUS kccuapiGetMapAddrSpace_IMPL(struct KernelCcuApi *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); + +NV_STATUS kccuapiGetMemoryMappingDescriptor_IMPL(struct KernelCcuApi *pKernelCcuApi, struct MEMORY_DESCRIPTOR **ppMemDesc); + +NV_STATUS kccuapiCtrlCmdSubscribe_IMPL(struct KernelCcuApi *pKernelCcuApi, NV_COUNTER_COLLECTION_UNIT_SUBSCRIBE_PARAMS *pParams); + +NV_STATUS kccuapiCtrlCmdUnsubscribe_IMPL(struct KernelCcuApi *pKernelCcuApi); + +NV_STATUS kccuapiCtrlCmdSetStreamState_IMPL(struct KernelCcuApi *pKernelCcuApi, NV_COUNTER_COLLECTION_UNIT_STREAM_STATE_PARAMS *pParams); + +NV_STATUS kccuapiCtrlCmdGetStreamState_IMPL(struct KernelCcuApi *pKernelCcuApi, NV_COUNTER_COLLECTION_UNIT_STREAM_STATE_PARAMS *pParams); + NV_STATUS kccuapiConstruct_IMPL(struct KernelCcuApi *arg_pKernelCcuApi, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_kccuapiConstruct(arg_pKernelCcuApi, arg_pCallContext, arg_pParams) kccuapiConstruct_IMPL(arg_pKernelCcuApi, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_kernel_ccu_nvoc.c b/src/nvidia/generated/g_kernel_ccu_nvoc.c index 32f63b6e99..ad8baaa5ce 100644 --- a/src/nvidia/generated/g_kernel_ccu_nvoc.c +++ b/src/nvidia/generated/g_kernel_ccu_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCcu = /*pExportInfo=*/ &__nvoc_export_info_KernelCcu }; -static NV_STATUS __nvoc_thunk_KernelCcu_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelCcu, ENGDESCRIPTOR engDesc) { - return kccuConstructEngine(pGpu, (struct KernelCcu *)(((unsigned char *)pKernelCcu) - __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), engDesc); +// 3 down-thunk(s) defined to bridge methods in KernelCcu from superclasses + +// kccuConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelCcu_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelCcu, ENGDESCRIPTOR engDesc) { + return kccuConstructEngine(pGpu, (struct KernelCcu *)(((unsigned char *) pKernelCcu) - __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), engDesc); } -static NV_STATUS __nvoc_thunk_KernelCcu_engstateStateLoad(OBJGPU *arg0, struct OBJENGSTATE *arg1, NvU32 flags) { - return kccuStateLoad(arg0, (struct KernelCcu *)(((unsigned char *)arg1) - __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), flags); +// kccuStateLoad: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelCcu_engstateStateLoad(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags) { + return kccuStateLoad(arg1, (struct KernelCcu *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), flags); } -static NV_STATUS __nvoc_thunk_KernelCcu_engstateStateUnload(OBJGPU *arg0, struct OBJENGSTATE *arg1, NvU32 flags) { - return kccuStateUnload(arg0, (struct KernelCcu *)(((unsigned char *)arg1) - __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), flags); +// kccuStateUnload: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelCcu_engstateStateUnload(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags) { + return kccuStateUnload(arg1, (struct KernelCcu *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), flags); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kccuStateInitLocked(POBJGPU pGpu, struct KernelCcu *pEngstate) { - return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); + +// 11 up-thunk(s) defined to bridge methods in KernelCcu to superclasses + +// kccuInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kccuInitMissing(POBJGPU pGpu, struct KernelCcu *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kccuStatePreLoad(POBJGPU pGpu, struct KernelCcu *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), arg0); +// kccuStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePreInitLocked(POBJGPU pGpu, struct KernelCcu *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kccuStatePostUnload(POBJGPU pGpu, struct KernelCcu *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), arg0); +// kccuStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePreInitUnlocked(POBJGPU pGpu, struct KernelCcu *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_kccuStateDestroy(POBJGPU pGpu, struct KernelCcu *pEngstate) { - engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); +// kccuStateInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStateInitLocked(POBJGPU pGpu, struct KernelCcu *pEngstate) { + return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kccuStatePreUnload(POBJGPU pGpu, struct KernelCcu *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), arg0); +// kccuStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStateInitUnlocked(POBJGPU pGpu, struct KernelCcu *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kccuStateInitUnlocked(POBJGPU pGpu, struct KernelCcu *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); +// kccuStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePreLoad(POBJGPU pGpu, struct KernelCcu *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_kccuInitMissing(POBJGPU pGpu, struct KernelCcu *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); +// kccuStatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePostLoad(POBJGPU pGpu, struct KernelCcu *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kccuStatePreInitLocked(POBJGPU pGpu, struct KernelCcu *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); +// kccuStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePreUnload(POBJGPU pGpu, struct KernelCcu *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kccuStatePreInitUnlocked(POBJGPU pGpu, struct KernelCcu *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); +// kccuStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePostUnload(POBJGPU pGpu, struct KernelCcu *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kccuStatePostLoad(POBJGPU pGpu, struct KernelCcu *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), arg0); +// kccuStateDestroy: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kccuStateDestroy(POBJGPU pGpu, struct KernelCcu *pEngstate) { + engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); } -static NvBool __nvoc_thunk_OBJENGSTATE_kccuIsPresent(POBJGPU pGpu, struct KernelCcu *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); +// kccuIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_kccuIsPresent(POBJGPU pGpu, struct KernelCcu *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelCcu = { /*numEntries=*/ 0, @@ -171,6 +191,7 @@ NV_STATUS __nvoc_ctor_KernelCcu(KernelCcu *pThis, RmHalspecOwner *pRmhalspecowne return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelCcu_1(KernelCcu *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -183,13 +204,19 @@ static void __nvoc_init_funcTable_KernelCcu_1(KernelCcu *pThis, RmHalspecOwner * PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); + // kccuConstructEngine -- virtual override (engstate) base (engstate) pThis->__kccuConstructEngine__ = &kccuConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelCcu_engstateConstructEngine; + // kccuStateLoad -- virtual override (engstate) base (engstate) pThis->__kccuStateLoad__ = &kccuStateLoad_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelCcu_engstateStateLoad; + // kccuStateUnload -- virtual override (engstate) base (engstate) pThis->__kccuStateUnload__ = &kccuStateUnload_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelCcu_engstateStateUnload; - // Hal function -- kccuMigShrBufHandler + // kccuMigShrBufHandler -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kccuMigShrBufHandler__ = &kccuMigShrBufHandler_GH100; @@ -200,36 +227,56 @@ static void __nvoc_init_funcTable_KernelCcu_1(KernelCcu *pThis, RmHalspecOwner * pThis->__kccuMigShrBufHandler__ = &kccuMigShrBufHandler_46f6a7; } - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelCcu_engstateConstructEngine; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_thunk_KernelCcu_engstateStateLoad; + // kccuGetBufSize -- halified (2 hals) + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ + { + pThis->__kccuGetBufSize__ = &kccuGetBufSize_GH100; + } + // default + else + { + pThis->__kccuGetBufSize__ = &kccuGetBufSize_46f6a7; + } - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_thunk_KernelCcu_engstateStateUnload; + // kccuInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__kccuInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kccuInitMissing; - pThis->__kccuStateInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kccuStateInitLocked; + // kccuStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__kccuStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStatePreInitLocked; - pThis->__kccuStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_kccuStatePreLoad; + // kccuStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kccuStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStatePreInitUnlocked; - pThis->__kccuStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_kccuStatePostUnload; + // kccuStateInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__kccuStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStateInitLocked; - pThis->__kccuStateDestroy__ = &__nvoc_thunk_OBJENGSTATE_kccuStateDestroy; + // kccuStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kccuStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStateInitUnlocked; - pThis->__kccuStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_kccuStatePreUnload; + // kccuStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__kccuStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStatePreLoad; - pThis->__kccuStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kccuStateInitUnlocked; + // kccuStatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__kccuStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStatePostLoad; - pThis->__kccuInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kccuInitMissing; + // kccuStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__kccuStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStatePreUnload; - pThis->__kccuStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kccuStatePreInitLocked; + // kccuStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__kccuStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStatePostUnload; - pThis->__kccuStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kccuStatePreInitUnlocked; + // kccuStateDestroy -- virtual inherited (engstate) base (engstate) + pThis->__kccuStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStateDestroy; - pThis->__kccuStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_kccuStatePostLoad; + // kccuIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__kccuIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kccuIsPresent; +} // End __nvoc_init_funcTable_KernelCcu_1 with approximately 21 basic block(s). - pThis->__kccuIsPresent__ = &__nvoc_thunk_OBJENGSTATE_kccuIsPresent; -} +// Initialize vtable(s) for 16 virtual method(s). void __nvoc_init_funcTable_KernelCcu(KernelCcu *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 16 per-object function pointer(s). __nvoc_init_funcTable_KernelCcu_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_ccu_nvoc.h b/src/nvidia/generated/g_kernel_ccu_nvoc.h index f3f3da5be8..9bb1520a93 100644 --- a/src/nvidia/generated/g_kernel_ccu_nvoc.h +++ b/src/nvidia/generated/g_kernel_ccu_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_KERNEL_CCU_NVOC_H_ #define _G_KERNEL_CCU_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_ccu_nvoc.h" #ifndef KERNEL_CCU_H @@ -55,11 +63,11 @@ extern "C" { * interfaces which do not manage the underlying Ccu can be managed by * this object. */ +#define CCU_DEV_BUF_SIZE_16KB (16 * 1024) +#define CCU_MIG_BUF_SIZE_2KB (2 * 1024) -#define CCU_PER_GPU_COUNTER_Q_SIZE (16384) #define CCU_TIMESTAMP_SIZE (sizeof(NvU64)) #define CCU_TIMEOUT_100MSECS (100000000) -#define CCU_MIG_INST_COUNTER_Q_SIZE (2048) #define CCU_DEV_SHRBUF_ID (0) #define CCU_MIG_SHRBUF_ID_START (1) @@ -71,14 +79,11 @@ extern "C" { #define CCU_MIG_COMPUTEID_SIZE (sizeof(NvU8)) #define CCU_MIG_INVALID_COMPUTEID (0xFF) -#define CCU_DEV_COUNTER_ENTRY_MAX (2048) -#define CCU_MIG_COUNTER_ENTRY_MAX (256) - #define CCU_STREAM_STATE_DISABLE (0) #define CCU_STREAM_STATE_ENABLE (1) -#define CCU_GPU_SHARED_BUFFER_SIZE_MAX (CCU_PER_GPU_COUNTER_Q_SIZE + (2 * CCU_TIMESTAMP_SIZE) + CCU_MIG_SWIZZID_SIZE) // 16K counter block + head & tail timestamp size + mig-SwizzId size -#define CCU_MIG_INST_SHARED_BUFFER_SIZE_MAX (CCU_MIG_INST_COUNTER_Q_SIZE + (2 * CCU_TIMESTAMP_SIZE) + CCU_MIG_SWIZZID_SIZE + CCU_MIG_COMPUTEID_SIZE) // 2K counter block + head & tail timestamp size + mig-SwizzId size + compute-instId size +#define CCU_DEV_SHARED_BUF_SIZE (CCU_DEV_BUF_SIZE_16KB + (2 * CCU_TIMESTAMP_SIZE) + CCU_MIG_SWIZZID_SIZE) // 16K counter block + head & tail timestamp size + mig-SwizzId size +#define CCU_MIG_SHARED_BUF_SIZE (CCU_MIG_BUF_SIZE_2KB + (2 * CCU_TIMESTAMP_SIZE) + CCU_MIG_SWIZZID_SIZE + CCU_MIG_COMPUTEID_SIZE) // 2K counter block + head & tail timestamp size + mig-SwizzId size + compute-instId size typedef struct { @@ -113,31 +118,49 @@ typedef struct #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelCcu { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct KernelCcu *__nvoc_pbase_KernelCcu; - NV_STATUS (*__kccuConstructEngine__)(OBJGPU *, struct KernelCcu *, ENGDESCRIPTOR); - NV_STATUS (*__kccuStateLoad__)(OBJGPU *, struct KernelCcu *, NvU32); - NV_STATUS (*__kccuStateUnload__)(OBJGPU *, struct KernelCcu *, NvU32); - NV_STATUS (*__kccuMigShrBufHandler__)(OBJGPU *, struct KernelCcu *, NvBool); - NV_STATUS (*__kccuStateInitLocked__)(POBJGPU, struct KernelCcu *); - NV_STATUS (*__kccuStatePreLoad__)(POBJGPU, struct KernelCcu *, NvU32); - NV_STATUS (*__kccuStatePostUnload__)(POBJGPU, struct KernelCcu *, NvU32); - void (*__kccuStateDestroy__)(POBJGPU, struct KernelCcu *); - NV_STATUS (*__kccuStatePreUnload__)(POBJGPU, struct KernelCcu *, NvU32); - NV_STATUS (*__kccuStateInitUnlocked__)(POBJGPU, struct KernelCcu *); - void (*__kccuInitMissing__)(POBJGPU, struct KernelCcu *); - NV_STATUS (*__kccuStatePreInitLocked__)(POBJGPU, struct KernelCcu *); - NV_STATUS (*__kccuStatePreInitUnlocked__)(POBJGPU, struct KernelCcu *); - NV_STATUS (*__kccuStatePostLoad__)(POBJGPU, struct KernelCcu *, NvU32); - NvBool (*__kccuIsPresent__)(POBJGPU, struct KernelCcu *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct KernelCcu *__nvoc_pbase_KernelCcu; // kccu + + // Vtable with 16 per-object function pointers + NV_STATUS (*__kccuConstructEngine__)(OBJGPU *, struct KernelCcu * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kccuStateLoad__)(OBJGPU *, struct KernelCcu * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kccuStateUnload__)(OBJGPU *, struct KernelCcu * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kccuMigShrBufHandler__)(OBJGPU *, struct KernelCcu * /*this*/, NvBool); // halified (2 hals) + NV_STATUS (*__kccuGetBufSize__)(OBJGPU *, struct KernelCcu * /*this*/); // halified (2 hals) + void (*__kccuInitMissing__)(POBJGPU, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kccuStatePreInitLocked__)(POBJGPU, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kccuStatePreInitUnlocked__)(POBJGPU, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kccuStateInitLocked__)(POBJGPU, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kccuStateInitUnlocked__)(POBJGPU, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kccuStatePreLoad__)(POBJGPU, struct KernelCcu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kccuStatePostLoad__)(POBJGPU, struct KernelCcu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kccuStatePreUnload__)(POBJGPU, struct KernelCcu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kccuStatePostUnload__)(POBJGPU, struct KernelCcu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__kccuStateDestroy__)(POBJGPU, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__kccuIsPresent__)(POBJGPU, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) + + // 1 PDB property + + // Data members MEMORY_DESCRIPTOR *pMemDesc[9]; NvBool bStreamState; CCU_SHRBUF shrBuf[9]; NvBool bMigShrBufAllocated; + NvU32 devBufSize; + NvU32 devSharedBufSize; + NvU32 migBufSize; + NvU32 migSharedBufSize; }; #ifndef __NVOC_CLASS_KernelCcu_TYPEDEF__ @@ -149,6 +172,7 @@ typedef struct KernelCcu KernelCcu; #define __nvoc_class_id_KernelCcu 0x5d5b68 #endif /* __nvoc_class_id_KernelCcu */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCcu; #define __staticCast_KernelCcu(pThis) \ @@ -161,6 +185,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCcu; ((KernelCcu*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelCcu))) #endif //__nvoc_kernel_ccu_h_disabled +// Property macros #define PDB_PROP_KCCU_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_KCCU_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -170,190 +195,211 @@ NV_STATUS __nvoc_objCreate_KernelCcu(KernelCcu**, Dynamic*, NvU32); #define __objCreate_KernelCcu(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelCcu((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define kccuConstructEngine_FNPTR(pKernelCcu) pKernelCcu->__kccuConstructEngine__ #define kccuConstructEngine(pGpu, pKernelCcu, engDesc) kccuConstructEngine_DISPATCH(pGpu, pKernelCcu, engDesc) -#define kccuStateLoad(arg0, arg1, flags) kccuStateLoad_DISPATCH(arg0, arg1, flags) -#define kccuStateUnload(arg0, arg1, flags) kccuStateUnload_DISPATCH(arg0, arg1, flags) -#define kccuMigShrBufHandler(arg0, arg1, bMigEnabled) kccuMigShrBufHandler_DISPATCH(arg0, arg1, bMigEnabled) -#define kccuMigShrBufHandler_HAL(arg0, arg1, bMigEnabled) kccuMigShrBufHandler_DISPATCH(arg0, arg1, bMigEnabled) -#define kccuStateInitLocked(pGpu, pEngstate) kccuStateInitLocked_DISPATCH(pGpu, pEngstate) -#define kccuStatePreLoad(pGpu, pEngstate, arg0) kccuStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kccuStatePostUnload(pGpu, pEngstate, arg0) kccuStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kccuStateDestroy(pGpu, pEngstate) kccuStateDestroy_DISPATCH(pGpu, pEngstate) -#define kccuStatePreUnload(pGpu, pEngstate, arg0) kccuStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kccuStateInitUnlocked(pGpu, pEngstate) kccuStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kccuStateLoad_FNPTR(arg_this) arg_this->__kccuStateLoad__ +#define kccuStateLoad(arg1, arg_this, flags) kccuStateLoad_DISPATCH(arg1, arg_this, flags) +#define kccuStateUnload_FNPTR(arg_this) arg_this->__kccuStateUnload__ +#define kccuStateUnload(arg1, arg_this, flags) kccuStateUnload_DISPATCH(arg1, arg_this, flags) +#define kccuMigShrBufHandler_FNPTR(arg_this) arg_this->__kccuMigShrBufHandler__ +#define kccuMigShrBufHandler(arg1, arg_this, bMigEnabled) kccuMigShrBufHandler_DISPATCH(arg1, arg_this, bMigEnabled) +#define kccuMigShrBufHandler_HAL(arg1, arg_this, bMigEnabled) kccuMigShrBufHandler_DISPATCH(arg1, arg_this, bMigEnabled) +#define kccuGetBufSize_FNPTR(arg_this) arg_this->__kccuGetBufSize__ +#define kccuGetBufSize(arg1, arg_this) kccuGetBufSize_DISPATCH(arg1, arg_this) +#define kccuGetBufSize_HAL(arg1, arg_this) kccuGetBufSize_DISPATCH(arg1, arg_this) +#define kccuInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define kccuInitMissing(pGpu, pEngstate) kccuInitMissing_DISPATCH(pGpu, pEngstate) +#define kccuStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define kccuStatePreInitLocked(pGpu, pEngstate) kccuStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define kccuStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define kccuStatePreInitUnlocked(pGpu, pEngstate) kccuStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kccuStatePostLoad(pGpu, pEngstate, arg0) kccuStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) +#define kccuStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define kccuStateInitLocked(pGpu, pEngstate) kccuStateInitLocked_DISPATCH(pGpu, pEngstate) +#define kccuStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kccuStateInitUnlocked(pGpu, pEngstate) kccuStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kccuStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kccuStatePreLoad(pGpu, pEngstate, arg3) kccuStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kccuStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kccuStatePostLoad(pGpu, pEngstate, arg3) kccuStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kccuStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kccuStatePreUnload(pGpu, pEngstate, arg3) kccuStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kccuStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kccuStatePostUnload(pGpu, pEngstate, arg3) kccuStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kccuStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define kccuStateDestroy(pGpu, pEngstate) kccuStateDestroy_DISPATCH(pGpu, pEngstate) +#define kccuIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define kccuIsPresent(pGpu, pEngstate) kccuIsPresent_DISPATCH(pGpu, pEngstate) -NV_STATUS kccuConstructEngine_IMPL(OBJGPU *pGpu, struct KernelCcu *pKernelCcu, ENGDESCRIPTOR engDesc); +// Dispatch functions static inline NV_STATUS kccuConstructEngine_DISPATCH(OBJGPU *pGpu, struct KernelCcu *pKernelCcu, ENGDESCRIPTOR engDesc) { return pKernelCcu->__kccuConstructEngine__(pGpu, pKernelCcu, engDesc); } -NV_STATUS kccuStateLoad_IMPL(OBJGPU *arg0, struct KernelCcu *arg1, NvU32 flags); +static inline NV_STATUS kccuStateLoad_DISPATCH(OBJGPU *arg1, struct KernelCcu *arg_this, NvU32 flags) { + return arg_this->__kccuStateLoad__(arg1, arg_this, flags); +} -static inline NV_STATUS kccuStateLoad_DISPATCH(OBJGPU *arg0, struct KernelCcu *arg1, NvU32 flags) { - return arg1->__kccuStateLoad__(arg0, arg1, flags); +static inline NV_STATUS kccuStateUnload_DISPATCH(OBJGPU *arg1, struct KernelCcu *arg_this, NvU32 flags) { + return arg_this->__kccuStateUnload__(arg1, arg_this, flags); } -NV_STATUS kccuStateUnload_IMPL(OBJGPU *arg0, struct KernelCcu *arg1, NvU32 flags); +static inline NV_STATUS kccuMigShrBufHandler_DISPATCH(OBJGPU *arg1, struct KernelCcu *arg_this, NvBool bMigEnabled) { + return arg_this->__kccuMigShrBufHandler__(arg1, arg_this, bMigEnabled); +} -static inline NV_STATUS kccuStateUnload_DISPATCH(OBJGPU *arg0, struct KernelCcu *arg1, NvU32 flags) { - return arg1->__kccuStateUnload__(arg0, arg1, flags); +static inline NV_STATUS kccuGetBufSize_DISPATCH(OBJGPU *arg1, struct KernelCcu *arg_this) { + return arg_this->__kccuGetBufSize__(arg1, arg_this); } -static inline NV_STATUS kccuMigShrBufHandler_46f6a7(OBJGPU *arg0, struct KernelCcu *arg1, NvBool bMigEnabled) { - return NV_ERR_NOT_SUPPORTED; +static inline void kccuInitMissing_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate) { + pEngstate->__kccuInitMissing__(pGpu, pEngstate); } -NV_STATUS kccuMigShrBufHandler_GH100(OBJGPU *arg0, struct KernelCcu *arg1, NvBool bMigEnabled); +static inline NV_STATUS kccuStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate) { + return pEngstate->__kccuStatePreInitLocked__(pGpu, pEngstate); +} -static inline NV_STATUS kccuMigShrBufHandler_DISPATCH(OBJGPU *arg0, struct KernelCcu *arg1, NvBool bMigEnabled) { - return arg1->__kccuMigShrBufHandler__(arg0, arg1, bMigEnabled); +static inline NV_STATUS kccuStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate) { + return pEngstate->__kccuStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kccuStateInitLocked_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate) { return pEngstate->__kccuStateInitLocked__(pGpu, pEngstate); } -static inline NV_STATUS kccuStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate, NvU32 arg0) { - return pEngstate->__kccuStatePreLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS kccuStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate) { + return pEngstate->__kccuStateInitUnlocked__(pGpu, pEngstate); } -static inline NV_STATUS kccuStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate, NvU32 arg0) { - return pEngstate->__kccuStatePostUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS kccuStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate, NvU32 arg3) { + return pEngstate->__kccuStatePreLoad__(pGpu, pEngstate, arg3); } -static inline void kccuStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate) { - pEngstate->__kccuStateDestroy__(pGpu, pEngstate); +static inline NV_STATUS kccuStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate, NvU32 arg3) { + return pEngstate->__kccuStatePostLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kccuStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate, NvU32 arg0) { - return pEngstate->__kccuStatePreUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS kccuStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate, NvU32 arg3) { + return pEngstate->__kccuStatePreUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kccuStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate) { - return pEngstate->__kccuStateInitUnlocked__(pGpu, pEngstate); +static inline NV_STATUS kccuStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate, NvU32 arg3) { + return pEngstate->__kccuStatePostUnload__(pGpu, pEngstate, arg3); } -static inline void kccuInitMissing_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate) { - pEngstate->__kccuInitMissing__(pGpu, pEngstate); +static inline void kccuStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate) { + pEngstate->__kccuStateDestroy__(pGpu, pEngstate); } -static inline NV_STATUS kccuStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate) { - return pEngstate->__kccuStatePreInitLocked__(pGpu, pEngstate); +static inline NvBool kccuIsPresent_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate) { + return pEngstate->__kccuIsPresent__(pGpu, pEngstate); } -static inline NV_STATUS kccuStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate) { - return pEngstate->__kccuStatePreInitUnlocked__(pGpu, pEngstate); -} +NV_STATUS kccuConstructEngine_IMPL(OBJGPU *pGpu, struct KernelCcu *pKernelCcu, ENGDESCRIPTOR engDesc); -static inline NV_STATUS kccuStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate, NvU32 arg0) { - return pEngstate->__kccuStatePostLoad__(pGpu, pEngstate, arg0); -} +NV_STATUS kccuStateLoad_IMPL(OBJGPU *arg1, struct KernelCcu *arg2, NvU32 flags); -static inline NvBool kccuIsPresent_DISPATCH(POBJGPU pGpu, struct KernelCcu *pEngstate) { - return pEngstate->__kccuIsPresent__(pGpu, pEngstate); +NV_STATUS kccuStateUnload_IMPL(OBJGPU *arg1, struct KernelCcu *arg2, NvU32 flags); + +static inline NV_STATUS kccuMigShrBufHandler_46f6a7(OBJGPU *arg1, struct KernelCcu *arg2, NvBool bMigEnabled) { + return NV_ERR_NOT_SUPPORTED; } -NV_STATUS kccuMemDescGetForSwizzId_IMPL(OBJGPU *arg0, struct KernelCcu *arg1, NvU8 swizzId, MEMORY_DESCRIPTOR **arg2); +NV_STATUS kccuMigShrBufHandler_GH100(OBJGPU *arg1, struct KernelCcu *arg2, NvBool bMigEnabled); -#ifdef __nvoc_kernel_ccu_h_disabled -static inline NV_STATUS kccuMemDescGetForSwizzId(OBJGPU *arg0, struct KernelCcu *arg1, NvU8 swizzId, MEMORY_DESCRIPTOR **arg2) { - NV_ASSERT_FAILED_PRECOMP("KernelCcu was disabled!"); +NV_STATUS kccuGetBufSize_GH100(OBJGPU *arg1, struct KernelCcu *arg2); + +static inline NV_STATUS kccuGetBufSize_46f6a7(OBJGPU *arg1, struct KernelCcu *arg2) { return NV_ERR_NOT_SUPPORTED; } -#else //__nvoc_kernel_ccu_h_disabled -#define kccuMemDescGetForSwizzId(arg0, arg1, swizzId, arg2) kccuMemDescGetForSwizzId_IMPL(arg0, arg1, swizzId, arg2) -#endif //__nvoc_kernel_ccu_h_disabled -NV_STATUS kccuMemDescGetForShrBufId_IMPL(OBJGPU *arg0, struct KernelCcu *arg1, NvU32 shrbufId, MEMORY_DESCRIPTOR **arg2); +NV_STATUS kccuMemDescGetForShrBufId_IMPL(OBJGPU *arg1, struct KernelCcu *arg2, NvU32 shrbufId, MEMORY_DESCRIPTOR **arg4); #ifdef __nvoc_kernel_ccu_h_disabled -static inline NV_STATUS kccuMemDescGetForShrBufId(OBJGPU *arg0, struct KernelCcu *arg1, NvU32 shrbufId, MEMORY_DESCRIPTOR **arg2) { +static inline NV_STATUS kccuMemDescGetForShrBufId(OBJGPU *arg1, struct KernelCcu *arg2, NvU32 shrbufId, MEMORY_DESCRIPTOR **arg4) { NV_ASSERT_FAILED_PRECOMP("KernelCcu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_ccu_h_disabled -#define kccuMemDescGetForShrBufId(arg0, arg1, shrbufId, arg2) kccuMemDescGetForShrBufId_IMPL(arg0, arg1, shrbufId, arg2) +#define kccuMemDescGetForShrBufId(arg1, arg2, shrbufId, arg4) kccuMemDescGetForShrBufId_IMPL(arg1, arg2, shrbufId, arg4) #endif //__nvoc_kernel_ccu_h_disabled -NvU32 kccuCounterBlockSizeGet_IMPL(OBJGPU *arg0, struct KernelCcu *arg1, NvBool bDevCounter); +NvU32 kccuCounterBlockSizeGet_IMPL(OBJGPU *arg1, struct KernelCcu *arg2, NvBool bDevCounter); #ifdef __nvoc_kernel_ccu_h_disabled -static inline NvU32 kccuCounterBlockSizeGet(OBJGPU *arg0, struct KernelCcu *arg1, NvBool bDevCounter) { +static inline NvU32 kccuCounterBlockSizeGet(OBJGPU *arg1, struct KernelCcu *arg2, NvBool bDevCounter) { NV_ASSERT_FAILED_PRECOMP("KernelCcu was disabled!"); return 0; } #else //__nvoc_kernel_ccu_h_disabled -#define kccuCounterBlockSizeGet(arg0, arg1, bDevCounter) kccuCounterBlockSizeGet_IMPL(arg0, arg1, bDevCounter) +#define kccuCounterBlockSizeGet(arg1, arg2, bDevCounter) kccuCounterBlockSizeGet_IMPL(arg1, arg2, bDevCounter) #endif //__nvoc_kernel_ccu_h_disabled -NV_STATUS kccuStreamStateSet_IMPL(OBJGPU *arg0, struct KernelCcu *arg1, NV_COUNTER_COLLECTION_UNIT_STREAM_STATE_PARAMS *arg2); +NV_STATUS kccuStreamStateSet_IMPL(OBJGPU *arg1, struct KernelCcu *arg2, NV_COUNTER_COLLECTION_UNIT_STREAM_STATE_PARAMS *arg3); #ifdef __nvoc_kernel_ccu_h_disabled -static inline NV_STATUS kccuStreamStateSet(OBJGPU *arg0, struct KernelCcu *arg1, NV_COUNTER_COLLECTION_UNIT_STREAM_STATE_PARAMS *arg2) { +static inline NV_STATUS kccuStreamStateSet(OBJGPU *arg1, struct KernelCcu *arg2, NV_COUNTER_COLLECTION_UNIT_STREAM_STATE_PARAMS *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelCcu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_ccu_h_disabled -#define kccuStreamStateSet(arg0, arg1, arg2) kccuStreamStateSet_IMPL(arg0, arg1, arg2) +#define kccuStreamStateSet(arg1, arg2, arg3) kccuStreamStateSet_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_ccu_h_disabled -NvBool kccuStreamStateGet_IMPL(OBJGPU *arg0, struct KernelCcu *arg1); +NvBool kccuStreamStateGet_IMPL(OBJGPU *arg1, struct KernelCcu *arg2); #ifdef __nvoc_kernel_ccu_h_disabled -static inline NvBool kccuStreamStateGet(OBJGPU *arg0, struct KernelCcu *arg1) { +static inline NvBool kccuStreamStateGet(OBJGPU *arg1, struct KernelCcu *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelCcu was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_ccu_h_disabled -#define kccuStreamStateGet(arg0, arg1) kccuStreamStateGet_IMPL(arg0, arg1) +#define kccuStreamStateGet(arg1, arg2) kccuStreamStateGet_IMPL(arg1, arg2) #endif //__nvoc_kernel_ccu_h_disabled -NV_STATUS kccuInitMigSharedBuffer_IMPL(OBJGPU *arg0, struct KernelCcu *arg1); +NV_STATUS kccuInitMigSharedBuffer_IMPL(OBJGPU *arg1, struct KernelCcu *arg2); #ifdef __nvoc_kernel_ccu_h_disabled -static inline NV_STATUS kccuInitMigSharedBuffer(OBJGPU *arg0, struct KernelCcu *arg1) { +static inline NV_STATUS kccuInitMigSharedBuffer(OBJGPU *arg1, struct KernelCcu *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelCcu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_ccu_h_disabled -#define kccuInitMigSharedBuffer(arg0, arg1) kccuInitMigSharedBuffer_IMPL(arg0, arg1) +#define kccuInitMigSharedBuffer(arg1, arg2) kccuInitMigSharedBuffer_IMPL(arg1, arg2) #endif //__nvoc_kernel_ccu_h_disabled -NV_STATUS kccuShrBufInfoToCcu_IMPL(OBJGPU *arg0, struct KernelCcu *arg1, NvU32 shrBufStartIdx); +NV_STATUS kccuShrBufInfoToCcu_IMPL(OBJGPU *arg1, struct KernelCcu *arg2, NvU32 shrBufStartIdx); #ifdef __nvoc_kernel_ccu_h_disabled -static inline NV_STATUS kccuShrBufInfoToCcu(OBJGPU *arg0, struct KernelCcu *arg1, NvU32 shrBufStartIdx) { +static inline NV_STATUS kccuShrBufInfoToCcu(OBJGPU *arg1, struct KernelCcu *arg2, NvU32 shrBufStartIdx) { NV_ASSERT_FAILED_PRECOMP("KernelCcu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_ccu_h_disabled -#define kccuShrBufInfoToCcu(arg0, arg1, shrBufStartIdx) kccuShrBufInfoToCcu_IMPL(arg0, arg1, shrBufStartIdx) +#define kccuShrBufInfoToCcu(arg1, arg2, shrBufStartIdx) kccuShrBufInfoToCcu_IMPL(arg1, arg2, shrBufStartIdx) #endif //__nvoc_kernel_ccu_h_disabled -void kccuShrBufIdxCleanup_IMPL(OBJGPU *arg0, struct KernelCcu *arg1, NvU32 shrBufIdx); +void kccuShrBufIdxCleanup_IMPL(OBJGPU *arg1, struct KernelCcu *arg2, NvU32 shrBufIdx); #ifdef __nvoc_kernel_ccu_h_disabled -static inline void kccuShrBufIdxCleanup(OBJGPU *arg0, struct KernelCcu *arg1, NvU32 shrBufIdx) { +static inline void kccuShrBufIdxCleanup(OBJGPU *arg1, struct KernelCcu *arg2, NvU32 shrBufIdx) { NV_ASSERT_FAILED_PRECOMP("KernelCcu was disabled!"); } #else //__nvoc_kernel_ccu_h_disabled -#define kccuShrBufIdxCleanup(arg0, arg1, shrBufIdx) kccuShrBufIdxCleanup_IMPL(arg0, arg1, shrBufIdx) +#define kccuShrBufIdxCleanup(arg1, arg2, shrBufIdx) kccuShrBufIdxCleanup_IMPL(arg1, arg2, shrBufIdx) #endif //__nvoc_kernel_ccu_h_disabled -NV_STATUS kccuMemDescGetForComputeInst_IMPL(OBJGPU *arg0, struct KernelCcu *arg1, NvU8 swizzId, NvU8 computeId, MEMORY_DESCRIPTOR **arg2); +NV_STATUS kccuMemDescGetForComputeInst_IMPL(OBJGPU *arg1, struct KernelCcu *arg2, NvU8 swizzId, NvU8 computeId, MEMORY_DESCRIPTOR **arg5); #ifdef __nvoc_kernel_ccu_h_disabled -static inline NV_STATUS kccuMemDescGetForComputeInst(OBJGPU *arg0, struct KernelCcu *arg1, NvU8 swizzId, NvU8 computeId, MEMORY_DESCRIPTOR **arg2) { +static inline NV_STATUS kccuMemDescGetForComputeInst(OBJGPU *arg1, struct KernelCcu *arg2, NvU8 swizzId, NvU8 computeId, MEMORY_DESCRIPTOR **arg5) { NV_ASSERT_FAILED_PRECOMP("KernelCcu was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_ccu_h_disabled -#define kccuMemDescGetForComputeInst(arg0, arg1, swizzId, computeId, arg2) kccuMemDescGetForComputeInst_IMPL(arg0, arg1, swizzId, computeId, arg2) +#define kccuMemDescGetForComputeInst(arg1, arg2, swizzId, computeId, arg5) kccuMemDescGetForComputeInst_IMPL(arg1, arg2, swizzId, computeId, arg5) #endif //__nvoc_kernel_ccu_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_kernel_ce_context_nvoc.c b/src/nvidia/generated/g_kernel_ce_context_nvoc.c index c24f103c05..80a4e25552 100644 --- a/src/nvidia/generated/g_kernel_ce_context_nvoc.c +++ b/src/nvidia/generated/g_kernel_ce_context_nvoc.c @@ -120,134 +120,169 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCeContext = /*pExportInfo=*/ &__nvoc_export_info_KernelCeContext }; -static NV_STATUS __nvoc_thunk_ChannelDescendant_kcectxCheckMemInterUnmap(struct KernelCeContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_KernelCeContext_ChannelDescendant.offset), bSubdeviceHandleProvided); +// 32 up-thunk(s) defined to bridge methods in KernelCeContext to superclasses + +// kcectxGetSwMethods: virtual inherited (chandes) base (chandes) +static NV_STATUS __nvoc_up_thunk_ChannelDescendant_kcectxGetSwMethods(struct KernelCeContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { + return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_KernelCeContext_ChannelDescendant.offset), ppMethods, pNumMethods); } -static NvBool __nvoc_thunk_GpuResource_kcectxShareCallback(struct KernelCeContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// kcectxIsSwMethodStalling: virtual inherited (chandes) base (chandes) +static NvBool __nvoc_up_thunk_ChannelDescendant_kcectxIsSwMethodStalling(struct KernelCeContext *pChannelDescendant, NvU32 hHandle) { + return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_KernelCeContext_ChannelDescendant.offset), hHandle); } -static NvBool __nvoc_thunk_RmResource_kcectxAccessCallback(struct KernelCeContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// kcectxCheckMemInterUnmap: virtual inherited (chandes) base (chandes) +static NV_STATUS __nvoc_up_thunk_ChannelDescendant_kcectxCheckMemInterUnmap(struct KernelCeContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { + return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_KernelCeContext_ChannelDescendant.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RsResource_kcectxMapTo(struct KernelCeContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset), pParams); +// kcectxControl: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_kcectxControl(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_kcectxGetMapAddrSpace(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// kcectxMap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_kcectxMap(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static void __nvoc_thunk_Notifier_kcectxSetNotificationShare(struct KernelCeContext *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelCeContext_Notifier.offset), pNotifShare); +// kcectxUnmap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_kcectxUnmap(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), pCallContext, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_kcectxGetRefCount(struct KernelCeContext *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset)); +// kcectxShareCallback: virtual inherited (gpures) base (chandes) +static NvBool __nvoc_up_thunk_GpuResource_kcectxShareCallback(struct KernelCeContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static void __nvoc_thunk_RsResource_kcectxAddAdditionalDependants(struct RsClient *pClient, struct KernelCeContext *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset), pReference); +// kcectxGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_kcectxGetRegBaseOffsetAndSize(struct KernelCeContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_RmResource_kcectxControl_Prologue(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), pCallContext, pParams); +// kcectxGetMapAddrSpace: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_kcectxGetMapAddrSpace(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_GpuResource_kcectxGetRegBaseOffsetAndSize(struct KernelCeContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), pGpu, pOffset, pSize); +// kcectxInternalControlForward: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_kcectxInternalControlForward(struct KernelCeContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_GpuResource_kcectxInternalControlForward(struct KernelCeContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), command, pParams, size); +// kcectxGetInternalObjectHandle: virtual inherited (gpures) base (chandes) +static NvHandle __nvoc_up_thunk_GpuResource_kcectxGetInternalObjectHandle(struct KernelCeContext *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_kcectxUnmapFrom(struct KernelCeContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset), pParams); +// kcectxAccessCallback: virtual inherited (rmres) base (chandes) +static NvBool __nvoc_up_thunk_RmResource_kcectxAccessCallback(struct KernelCeContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static void __nvoc_thunk_RmResource_kcectxControl_Epilogue(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), pCallContext, pParams); +// kcectxGetMemInterMapParams: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_kcectxGetMemInterMapParams(struct KernelCeContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_ChannelDescendant_kcectxGetSwMethods(struct KernelCeContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_KernelCeContext_ChannelDescendant.offset), ppMethods, pNumMethods); +// kcectxGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_kcectxGetMemoryMappingDescriptor(struct KernelCeContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), ppMemDesc); } -static NvHandle __nvoc_thunk_GpuResource_kcectxGetInternalObjectHandle(struct KernelCeContext *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset)); +// kcectxControlSerialization_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_kcectxControlSerialization_Prologue(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_kcectxControl(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), pCallContext, pParams); +// kcectxControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_kcectxControlSerialization_Epilogue(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_kcectxUnmap(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), pCallContext, pCpuMapping); +// kcectxControl_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_kcectxControl_Prologue(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_kcectxGetMemInterMapParams(struct KernelCeContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), pParams); +// kcectxControl_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_kcectxControl_Epilogue(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_kcectxGetMemoryMappingDescriptor(struct KernelCeContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), ppMemDesc); +// kcectxCanCopy: virtual inherited (res) base (chandes) +static NvBool __nvoc_up_thunk_RsResource_kcectxCanCopy(struct KernelCeContext *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset)); } -static NvBool __nvoc_thunk_ChannelDescendant_kcectxIsSwMethodStalling(struct KernelCeContext *pChannelDescendant, NvU32 hHandle) { - return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_KernelCeContext_ChannelDescendant.offset), hHandle); +// kcectxIsDuplicate: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_kcectxIsDuplicate(struct KernelCeContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_kcectxControlFilter(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset), pCallContext, pParams); +// kcectxPreDestruct: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_kcectxPreDestruct(struct KernelCeContext *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_kcectxUnregisterEvent(struct KernelCeContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelCeContext_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// kcectxControlFilter: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_kcectxControlFilter(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_kcectxControlSerialization_Prologue(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), pCallContext, pParams); +// kcectxIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body +static NvBool __nvoc_up_thunk_RsResource_kcectxIsPartialUnmapSupported(struct KernelCeContext *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_kcectxCanCopy(struct KernelCeContext *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset)); +// kcectxMapTo: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_kcectxMapTo(struct KernelCeContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RsResource_kcectxIsPartialUnmapSupported(struct KernelCeContext *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset)); +// kcectxUnmapFrom: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_kcectxUnmapFrom(struct KernelCeContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset), pParams); } -static void __nvoc_thunk_RsResource_kcectxPreDestruct(struct KernelCeContext *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset)); +// kcectxGetRefCount: virtual inherited (res) base (chandes) +static NvU32 __nvoc_up_thunk_RsResource_kcectxGetRefCount(struct KernelCeContext *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_kcectxIsDuplicate(struct KernelCeContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset), hMemory, pDuplicate); +// kcectxAddAdditionalDependants: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_kcectxAddAdditionalDependants(struct RsClient *pClient, struct KernelCeContext *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset), pReference); } -static void __nvoc_thunk_RmResource_kcectxControlSerialization_Epilogue(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), pCallContext, pParams); +// kcectxGetNotificationListPtr: virtual inherited (notify) base (chandes) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_kcectxGetNotificationListPtr(struct KernelCeContext *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelCeContext_Notifier.offset)); } -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_kcectxGetNotificationListPtr(struct KernelCeContext *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelCeContext_Notifier.offset)); +// kcectxGetNotificationShare: virtual inherited (notify) base (chandes) +static struct NotifShare * __nvoc_up_thunk_Notifier_kcectxGetNotificationShare(struct KernelCeContext *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelCeContext_Notifier.offset)); } -static struct NotifShare *__nvoc_thunk_Notifier_kcectxGetNotificationShare(struct KernelCeContext *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelCeContext_Notifier.offset)); +// kcectxSetNotificationShare: virtual inherited (notify) base (chandes) +static void __nvoc_up_thunk_Notifier_kcectxSetNotificationShare(struct KernelCeContext *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelCeContext_Notifier.offset), pNotifShare); } -static NV_STATUS __nvoc_thunk_GpuResource_kcectxMap(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// kcectxUnregisterEvent: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_kcectxUnregisterEvent(struct KernelCeContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelCeContext_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static NV_STATUS __nvoc_thunk_Notifier_kcectxGetOrAllocNotifShare(struct KernelCeContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelCeContext_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +// kcectxGetOrAllocNotifShare: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_kcectxGetOrAllocNotifShare(struct KernelCeContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelCeContext_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelCeContext = { /*numEntries=*/ 0, @@ -284,75 +319,112 @@ NV_STATUS __nvoc_ctor_KernelCeContext(KernelCeContext *pThis, RmHalspecOwner *pR return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelCeContext_1(KernelCeContext *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - pThis->__kcectxCheckMemInterUnmap__ = &__nvoc_thunk_ChannelDescendant_kcectxCheckMemInterUnmap; + // kcectxGetSwMethods -- virtual inherited (chandes) base (chandes) + pThis->__kcectxGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_kcectxGetSwMethods; - pThis->__kcectxShareCallback__ = &__nvoc_thunk_GpuResource_kcectxShareCallback; + // kcectxIsSwMethodStalling -- virtual inherited (chandes) base (chandes) + pThis->__kcectxIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_kcectxIsSwMethodStalling; - pThis->__kcectxAccessCallback__ = &__nvoc_thunk_RmResource_kcectxAccessCallback; + // kcectxCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) + pThis->__kcectxCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_kcectxCheckMemInterUnmap; - pThis->__kcectxMapTo__ = &__nvoc_thunk_RsResource_kcectxMapTo; + // kcectxControl -- virtual inherited (gpures) base (chandes) + pThis->__kcectxControl__ = &__nvoc_up_thunk_GpuResource_kcectxControl; - pThis->__kcectxGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_kcectxGetMapAddrSpace; + // kcectxMap -- virtual inherited (gpures) base (chandes) + pThis->__kcectxMap__ = &__nvoc_up_thunk_GpuResource_kcectxMap; - pThis->__kcectxSetNotificationShare__ = &__nvoc_thunk_Notifier_kcectxSetNotificationShare; + // kcectxUnmap -- virtual inherited (gpures) base (chandes) + pThis->__kcectxUnmap__ = &__nvoc_up_thunk_GpuResource_kcectxUnmap; - pThis->__kcectxGetRefCount__ = &__nvoc_thunk_RsResource_kcectxGetRefCount; + // kcectxShareCallback -- virtual inherited (gpures) base (chandes) + pThis->__kcectxShareCallback__ = &__nvoc_up_thunk_GpuResource_kcectxShareCallback; - pThis->__kcectxAddAdditionalDependants__ = &__nvoc_thunk_RsResource_kcectxAddAdditionalDependants; + // kcectxGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) + pThis->__kcectxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kcectxGetRegBaseOffsetAndSize; - pThis->__kcectxControl_Prologue__ = &__nvoc_thunk_RmResource_kcectxControl_Prologue; + // kcectxGetMapAddrSpace -- virtual inherited (gpures) base (chandes) + pThis->__kcectxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_kcectxGetMapAddrSpace; - pThis->__kcectxGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_kcectxGetRegBaseOffsetAndSize; + // kcectxInternalControlForward -- virtual inherited (gpures) base (chandes) + pThis->__kcectxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kcectxInternalControlForward; - pThis->__kcectxInternalControlForward__ = &__nvoc_thunk_GpuResource_kcectxInternalControlForward; + // kcectxGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) + pThis->__kcectxGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kcectxGetInternalObjectHandle; - pThis->__kcectxUnmapFrom__ = &__nvoc_thunk_RsResource_kcectxUnmapFrom; + // kcectxAccessCallback -- virtual inherited (rmres) base (chandes) + pThis->__kcectxAccessCallback__ = &__nvoc_up_thunk_RmResource_kcectxAccessCallback; - pThis->__kcectxControl_Epilogue__ = &__nvoc_thunk_RmResource_kcectxControl_Epilogue; + // kcectxGetMemInterMapParams -- virtual inherited (rmres) base (chandes) + pThis->__kcectxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_kcectxGetMemInterMapParams; - pThis->__kcectxGetSwMethods__ = &__nvoc_thunk_ChannelDescendant_kcectxGetSwMethods; + // kcectxGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) + pThis->__kcectxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kcectxGetMemoryMappingDescriptor; - pThis->__kcectxGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_kcectxGetInternalObjectHandle; + // kcectxControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__kcectxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kcectxControlSerialization_Prologue; - pThis->__kcectxControl__ = &__nvoc_thunk_GpuResource_kcectxControl; + // kcectxControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__kcectxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kcectxControlSerialization_Epilogue; - pThis->__kcectxUnmap__ = &__nvoc_thunk_GpuResource_kcectxUnmap; + // kcectxControl_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__kcectxControl_Prologue__ = &__nvoc_up_thunk_RmResource_kcectxControl_Prologue; - pThis->__kcectxGetMemInterMapParams__ = &__nvoc_thunk_RmResource_kcectxGetMemInterMapParams; + // kcectxControl_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__kcectxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kcectxControl_Epilogue; - pThis->__kcectxGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_kcectxGetMemoryMappingDescriptor; + // kcectxCanCopy -- virtual inherited (res) base (chandes) + pThis->__kcectxCanCopy__ = &__nvoc_up_thunk_RsResource_kcectxCanCopy; - pThis->__kcectxIsSwMethodStalling__ = &__nvoc_thunk_ChannelDescendant_kcectxIsSwMethodStalling; + // kcectxIsDuplicate -- virtual inherited (res) base (chandes) + pThis->__kcectxIsDuplicate__ = &__nvoc_up_thunk_RsResource_kcectxIsDuplicate; - pThis->__kcectxControlFilter__ = &__nvoc_thunk_RsResource_kcectxControlFilter; + // kcectxPreDestruct -- virtual inherited (res) base (chandes) + pThis->__kcectxPreDestruct__ = &__nvoc_up_thunk_RsResource_kcectxPreDestruct; - pThis->__kcectxUnregisterEvent__ = &__nvoc_thunk_Notifier_kcectxUnregisterEvent; + // kcectxControlFilter -- virtual inherited (res) base (chandes) + pThis->__kcectxControlFilter__ = &__nvoc_up_thunk_RsResource_kcectxControlFilter; - pThis->__kcectxControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_kcectxControlSerialization_Prologue; + // kcectxIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body + pThis->__kcectxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kcectxIsPartialUnmapSupported; - pThis->__kcectxCanCopy__ = &__nvoc_thunk_RsResource_kcectxCanCopy; + // kcectxMapTo -- virtual inherited (res) base (chandes) + pThis->__kcectxMapTo__ = &__nvoc_up_thunk_RsResource_kcectxMapTo; - pThis->__kcectxIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_kcectxIsPartialUnmapSupported; + // kcectxUnmapFrom -- virtual inherited (res) base (chandes) + pThis->__kcectxUnmapFrom__ = &__nvoc_up_thunk_RsResource_kcectxUnmapFrom; - pThis->__kcectxPreDestruct__ = &__nvoc_thunk_RsResource_kcectxPreDestruct; + // kcectxGetRefCount -- virtual inherited (res) base (chandes) + pThis->__kcectxGetRefCount__ = &__nvoc_up_thunk_RsResource_kcectxGetRefCount; - pThis->__kcectxIsDuplicate__ = &__nvoc_thunk_RsResource_kcectxIsDuplicate; + // kcectxAddAdditionalDependants -- virtual inherited (res) base (chandes) + pThis->__kcectxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kcectxAddAdditionalDependants; - pThis->__kcectxControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_kcectxControlSerialization_Epilogue; + // kcectxGetNotificationListPtr -- virtual inherited (notify) base (chandes) + pThis->__kcectxGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_kcectxGetNotificationListPtr; - pThis->__kcectxGetNotificationListPtr__ = &__nvoc_thunk_Notifier_kcectxGetNotificationListPtr; + // kcectxGetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__kcectxGetNotificationShare__ = &__nvoc_up_thunk_Notifier_kcectxGetNotificationShare; - pThis->__kcectxGetNotificationShare__ = &__nvoc_thunk_Notifier_kcectxGetNotificationShare; + // kcectxSetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__kcectxSetNotificationShare__ = &__nvoc_up_thunk_Notifier_kcectxSetNotificationShare; - pThis->__kcectxMap__ = &__nvoc_thunk_GpuResource_kcectxMap; + // kcectxUnregisterEvent -- virtual inherited (notify) base (chandes) + pThis->__kcectxUnregisterEvent__ = &__nvoc_up_thunk_Notifier_kcectxUnregisterEvent; - pThis->__kcectxGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_kcectxGetOrAllocNotifShare; -} + // kcectxGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) + pThis->__kcectxGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_kcectxGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_KernelCeContext_1 with approximately 32 basic block(s). + +// Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_KernelCeContext(KernelCeContext *pThis) { + + // Initialize vtable(s) with 32 per-object function pointer(s). __nvoc_init_funcTable_KernelCeContext_1(pThis); } diff --git a/src/nvidia/generated/g_kernel_ce_context_nvoc.h b/src/nvidia/generated/g_kernel_ce_context_nvoc.h index 983ce7dc91..a99e1cd31d 100644 --- a/src/nvidia/generated/g_kernel_ce_context_nvoc.h +++ b/src/nvidia/generated/g_kernel_ce_context_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_CE_CONTEXT_NVOC_H_ #define _G_KERNEL_CE_CONTEXT_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_ce_context_nvoc.h" #ifndef KERNEL_CE_CONTEXT_H @@ -55,50 +63,59 @@ ENGDESCRIPTOR kceGetEngineDescFromAllocParams(struct OBJGPU *pGpu, NvU32 externa #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelCeContext { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; - struct KernelCeContext *__nvoc_pbase_KernelCeContext; - NV_STATUS (*__kcectxCheckMemInterUnmap__)(struct KernelCeContext *, NvBool); - NvBool (*__kcectxShareCallback__)(struct KernelCeContext *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NvBool (*__kcectxAccessCallback__)(struct KernelCeContext *, struct RsClient *, void *, RsAccessRight); - NV_STATUS (*__kcectxMapTo__)(struct KernelCeContext *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__kcectxGetMapAddrSpace__)(struct KernelCeContext *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__kcectxSetNotificationShare__)(struct KernelCeContext *, struct NotifShare *); - NvU32 (*__kcectxGetRefCount__)(struct KernelCeContext *); - void (*__kcectxAddAdditionalDependants__)(struct RsClient *, struct KernelCeContext *, RsResourceRef *); - NV_STATUS (*__kcectxControl_Prologue__)(struct KernelCeContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kcectxGetRegBaseOffsetAndSize__)(struct KernelCeContext *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__kcectxInternalControlForward__)(struct KernelCeContext *, NvU32, void *, NvU32); - NV_STATUS (*__kcectxUnmapFrom__)(struct KernelCeContext *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__kcectxControl_Epilogue__)(struct KernelCeContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kcectxGetSwMethods__)(struct KernelCeContext *, const METHOD **, NvU32 *); - NvHandle (*__kcectxGetInternalObjectHandle__)(struct KernelCeContext *); - NV_STATUS (*__kcectxControl__)(struct KernelCeContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kcectxUnmap__)(struct KernelCeContext *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__kcectxGetMemInterMapParams__)(struct KernelCeContext *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__kcectxGetMemoryMappingDescriptor__)(struct KernelCeContext *, struct MEMORY_DESCRIPTOR **); - NvBool (*__kcectxIsSwMethodStalling__)(struct KernelCeContext *, NvU32); - NV_STATUS (*__kcectxControlFilter__)(struct KernelCeContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kcectxUnregisterEvent__)(struct KernelCeContext *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__kcectxControlSerialization_Prologue__)(struct KernelCeContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__kcectxCanCopy__)(struct KernelCeContext *); - NvBool (*__kcectxIsPartialUnmapSupported__)(struct KernelCeContext *); - void (*__kcectxPreDestruct__)(struct KernelCeContext *); - NV_STATUS (*__kcectxIsDuplicate__)(struct KernelCeContext *, NvHandle, NvBool *); - void (*__kcectxControlSerialization_Epilogue__)(struct KernelCeContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__kcectxGetNotificationListPtr__)(struct KernelCeContext *); - struct NotifShare *(*__kcectxGetNotificationShare__)(struct KernelCeContext *); - NV_STATUS (*__kcectxMap__)(struct KernelCeContext *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NV_STATUS (*__kcectxGetOrAllocNotifShare__)(struct KernelCeContext *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super^2 + struct INotifier *__nvoc_pbase_INotifier; // inotify super^3 + struct Notifier *__nvoc_pbase_Notifier; // notify super^2 + struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super + struct KernelCeContext *__nvoc_pbase_KernelCeContext; // kcectx + + // Vtable with 32 per-object function pointers + NV_STATUS (*__kcectxGetSwMethods__)(struct KernelCeContext * /*this*/, const METHOD **, NvU32 *); // virtual inherited (chandes) base (chandes) + NvBool (*__kcectxIsSwMethodStalling__)(struct KernelCeContext * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__kcectxCheckMemInterUnmap__)(struct KernelCeContext * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__kcectxControl__)(struct KernelCeContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__kcectxMap__)(struct KernelCeContext * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__kcectxUnmap__)(struct KernelCeContext * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NvBool (*__kcectxShareCallback__)(struct KernelCeContext * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__kcectxGetRegBaseOffsetAndSize__)(struct KernelCeContext * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__kcectxGetMapAddrSpace__)(struct KernelCeContext * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__kcectxInternalControlForward__)(struct KernelCeContext * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (chandes) + NvHandle (*__kcectxGetInternalObjectHandle__)(struct KernelCeContext * /*this*/); // virtual inherited (gpures) base (chandes) + NvBool (*__kcectxAccessCallback__)(struct KernelCeContext * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__kcectxGetMemInterMapParams__)(struct KernelCeContext * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__kcectxGetMemoryMappingDescriptor__)(struct KernelCeContext * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__kcectxControlSerialization_Prologue__)(struct KernelCeContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__kcectxControlSerialization_Epilogue__)(struct KernelCeContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__kcectxControl_Prologue__)(struct KernelCeContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__kcectxControl_Epilogue__)(struct KernelCeContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NvBool (*__kcectxCanCopy__)(struct KernelCeContext * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__kcectxIsDuplicate__)(struct KernelCeContext * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (chandes) + void (*__kcectxPreDestruct__)(struct KernelCeContext * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__kcectxControlFilter__)(struct KernelCeContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (chandes) + NvBool (*__kcectxIsPartialUnmapSupported__)(struct KernelCeContext * /*this*/); // inline virtual inherited (res) base (chandes) body + NV_STATUS (*__kcectxMapTo__)(struct KernelCeContext * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (chandes) + NV_STATUS (*__kcectxUnmapFrom__)(struct KernelCeContext * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (chandes) + NvU32 (*__kcectxGetRefCount__)(struct KernelCeContext * /*this*/); // virtual inherited (res) base (chandes) + void (*__kcectxAddAdditionalDependants__)(struct RsClient *, struct KernelCeContext * /*this*/, RsResourceRef *); // virtual inherited (res) base (chandes) + PEVENTNOTIFICATION * (*__kcectxGetNotificationListPtr__)(struct KernelCeContext * /*this*/); // virtual inherited (notify) base (chandes) + struct NotifShare * (*__kcectxGetNotificationShare__)(struct KernelCeContext * /*this*/); // virtual inherited (notify) base (chandes) + void (*__kcectxSetNotificationShare__)(struct KernelCeContext * /*this*/, struct NotifShare *); // virtual inherited (notify) base (chandes) + NV_STATUS (*__kcectxUnregisterEvent__)(struct KernelCeContext * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (chandes) + NV_STATUS (*__kcectxGetOrAllocNotifShare__)(struct KernelCeContext * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (chandes) }; #ifndef __NVOC_CLASS_KernelCeContext_TYPEDEF__ @@ -110,6 +127,7 @@ typedef struct KernelCeContext KernelCeContext; #define __nvoc_class_id_KernelCeContext 0x2d0ee9 #endif /* __nvoc_class_id_KernelCeContext */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCeContext; #define __staticCast_KernelCeContext(pThis) \ @@ -122,111 +140,126 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCeContext; ((KernelCeContext*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelCeContext))) #endif //__nvoc_kernel_ce_context_h_disabled - NV_STATUS __nvoc_objCreateDynamic_KernelCeContext(KernelCeContext**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_KernelCeContext(KernelCeContext**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_KernelCeContext(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_KernelCeContext((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define kcectxGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ +#define kcectxGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) kcectxGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) +#define kcectxIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define kcectxIsSwMethodStalling(pChannelDescendant, hHandle) kcectxIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) +#define kcectxCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ #define kcectxCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) kcectxCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) +#define kcectxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define kcectxControl(pGpuResource, pCallContext, pParams) kcectxControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define kcectxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define kcectxMap(pGpuResource, pCallContext, pParams, pCpuMapping) kcectxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define kcectxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define kcectxUnmap(pGpuResource, pCallContext, pCpuMapping) kcectxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define kcectxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ #define kcectxShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) kcectxShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define kcectxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kcectxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define kcectxMapTo(pResource, pParams) kcectxMapTo_DISPATCH(pResource, pParams) -#define kcectxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) kcectxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define kcectxSetNotificationShare(pNotifier, pNotifShare) kcectxSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define kcectxGetRefCount(pResource) kcectxGetRefCount_DISPATCH(pResource) -#define kcectxAddAdditionalDependants(pClient, pResource, pReference) kcectxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define kcectxControl_Prologue(pResource, pCallContext, pParams) kcectxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define kcectxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define kcectxGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) kcectxGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define kcectxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define kcectxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) kcectxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define kcectxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define kcectxInternalControlForward(pGpuResource, command, pParams, size) kcectxInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define kcectxUnmapFrom(pResource, pParams) kcectxUnmapFrom_DISPATCH(pResource, pParams) -#define kcectxControl_Epilogue(pResource, pCallContext, pParams) kcectxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kcectxGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) kcectxGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) +#define kcectxGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define kcectxGetInternalObjectHandle(pGpuResource) kcectxGetInternalObjectHandle_DISPATCH(pGpuResource) -#define kcectxControl(pGpuResource, pCallContext, pParams) kcectxControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define kcectxUnmap(pGpuResource, pCallContext, pCpuMapping) kcectxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define kcectxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define kcectxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kcectxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define kcectxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define kcectxGetMemInterMapParams(pRmResource, pParams) kcectxGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define kcectxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define kcectxGetMemoryMappingDescriptor(pRmResource, ppMemDesc) kcectxGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define kcectxIsSwMethodStalling(pChannelDescendant, hHandle) kcectxIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define kcectxControlFilter(pResource, pCallContext, pParams) kcectxControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define kcectxUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) kcectxUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define kcectxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define kcectxControlSerialization_Prologue(pResource, pCallContext, pParams) kcectxControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define kcectxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define kcectxControlSerialization_Epilogue(pResource, pCallContext, pParams) kcectxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kcectxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define kcectxControl_Prologue(pResource, pCallContext, pParams) kcectxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define kcectxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define kcectxControl_Epilogue(pResource, pCallContext, pParams) kcectxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kcectxCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define kcectxCanCopy(pResource) kcectxCanCopy_DISPATCH(pResource) -#define kcectxIsPartialUnmapSupported(pResource) kcectxIsPartialUnmapSupported_DISPATCH(pResource) -#define kcectxPreDestruct(pResource) kcectxPreDestruct_DISPATCH(pResource) +#define kcectxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define kcectxIsDuplicate(pResource, hMemory, pDuplicate) kcectxIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define kcectxControlSerialization_Epilogue(pResource, pCallContext, pParams) kcectxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kcectxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define kcectxPreDestruct(pResource) kcectxPreDestruct_DISPATCH(pResource) +#define kcectxControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define kcectxControlFilter(pResource, pCallContext, pParams) kcectxControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define kcectxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define kcectxIsPartialUnmapSupported(pResource) kcectxIsPartialUnmapSupported_DISPATCH(pResource) +#define kcectxMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define kcectxMapTo(pResource, pParams) kcectxMapTo_DISPATCH(pResource, pParams) +#define kcectxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define kcectxUnmapFrom(pResource, pParams) kcectxUnmapFrom_DISPATCH(pResource, pParams) +#define kcectxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define kcectxGetRefCount(pResource) kcectxGetRefCount_DISPATCH(pResource) +#define kcectxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define kcectxAddAdditionalDependants(pClient, pResource, pReference) kcectxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define kcectxGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define kcectxGetNotificationListPtr(pNotifier) kcectxGetNotificationListPtr_DISPATCH(pNotifier) +#define kcectxGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ #define kcectxGetNotificationShare(pNotifier) kcectxGetNotificationShare_DISPATCH(pNotifier) -#define kcectxMap(pGpuResource, pCallContext, pParams, pCpuMapping) kcectxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define kcectxSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define kcectxSetNotificationShare(pNotifier, pNotifShare) kcectxSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define kcectxUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define kcectxUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) kcectxUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define kcectxGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ #define kcectxGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) kcectxGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -static inline NV_STATUS kcectxCheckMemInterUnmap_DISPATCH(struct KernelCeContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return pChannelDescendant->__kcectxCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); -} -static inline NvBool kcectxShareCallback_DISPATCH(struct KernelCeContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__kcectxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NvBool kcectxAccessCallback_DISPATCH(struct KernelCeContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__kcectxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +// Dispatch functions +static inline NV_STATUS kcectxGetSwMethods_DISPATCH(struct KernelCeContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { + return pChannelDescendant->__kcectxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); } -static inline NV_STATUS kcectxMapTo_DISPATCH(struct KernelCeContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__kcectxMapTo__(pResource, pParams); +static inline NvBool kcectxIsSwMethodStalling_DISPATCH(struct KernelCeContext *pChannelDescendant, NvU32 hHandle) { + return pChannelDescendant->__kcectxIsSwMethodStalling__(pChannelDescendant, hHandle); } -static inline NV_STATUS kcectxGetMapAddrSpace_DISPATCH(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__kcectxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +static inline NV_STATUS kcectxCheckMemInterUnmap_DISPATCH(struct KernelCeContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { + return pChannelDescendant->__kcectxCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } -static inline void kcectxSetNotificationShare_DISPATCH(struct KernelCeContext *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__kcectxSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS kcectxControl_DISPATCH(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__kcectxControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 kcectxGetRefCount_DISPATCH(struct KernelCeContext *pResource) { - return pResource->__kcectxGetRefCount__(pResource); +static inline NV_STATUS kcectxMap_DISPATCH(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__kcectxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void kcectxAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelCeContext *pResource, RsResourceRef *pReference) { - pResource->__kcectxAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS kcectxUnmap_DISPATCH(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__kcectxUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS kcectxControl_Prologue_DISPATCH(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kcectxControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool kcectxShareCallback_DISPATCH(struct KernelCeContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__kcectxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS kcectxGetRegBaseOffsetAndSize_DISPATCH(struct KernelCeContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__kcectxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS kcectxInternalControlForward_DISPATCH(struct KernelCeContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__kcectxInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS kcectxUnmapFrom_DISPATCH(struct KernelCeContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__kcectxUnmapFrom__(pResource, pParams); -} - -static inline void kcectxControl_Epilogue_DISPATCH(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kcectxControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS kcectxGetMapAddrSpace_DISPATCH(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__kcectxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NV_STATUS kcectxGetSwMethods_DISPATCH(struct KernelCeContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return pChannelDescendant->__kcectxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); +static inline NV_STATUS kcectxInternalControlForward_DISPATCH(struct KernelCeContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__kcectxInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle kcectxGetInternalObjectHandle_DISPATCH(struct KernelCeContext *pGpuResource) { return pGpuResource->__kcectxGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS kcectxControl_DISPATCH(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__kcectxControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS kcectxUnmap_DISPATCH(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kcectxUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool kcectxAccessCallback_DISPATCH(struct KernelCeContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__kcectxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS kcectxGetMemInterMapParams_DISPATCH(struct KernelCeContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { @@ -237,52 +270,72 @@ static inline NV_STATUS kcectxGetMemoryMappingDescriptor_DISPATCH(struct KernelC return pRmResource->__kcectxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NvBool kcectxIsSwMethodStalling_DISPATCH(struct KernelCeContext *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__kcectxIsSwMethodStalling__(pChannelDescendant, hHandle); +static inline NV_STATUS kcectxControlSerialization_Prologue_DISPATCH(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kcectxControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS kcectxControlFilter_DISPATCH(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kcectxControlFilter__(pResource, pCallContext, pParams); +static inline void kcectxControlSerialization_Epilogue_DISPATCH(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__kcectxControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS kcectxUnregisterEvent_DISPATCH(struct KernelCeContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__kcectxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline NV_STATUS kcectxControl_Prologue_DISPATCH(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kcectxControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS kcectxControlSerialization_Prologue_DISPATCH(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kcectxControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline void kcectxControl_Epilogue_DISPATCH(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__kcectxControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool kcectxCanCopy_DISPATCH(struct KernelCeContext *pResource) { return pResource->__kcectxCanCopy__(pResource); } -static inline NvBool kcectxIsPartialUnmapSupported_DISPATCH(struct KernelCeContext *pResource) { - return pResource->__kcectxIsPartialUnmapSupported__(pResource); +static inline NV_STATUS kcectxIsDuplicate_DISPATCH(struct KernelCeContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__kcectxIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void kcectxPreDestruct_DISPATCH(struct KernelCeContext *pResource) { pResource->__kcectxPreDestruct__(pResource); } -static inline NV_STATUS kcectxIsDuplicate_DISPATCH(struct KernelCeContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__kcectxIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS kcectxControlFilter_DISPATCH(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kcectxControlFilter__(pResource, pCallContext, pParams); } -static inline void kcectxControlSerialization_Epilogue_DISPATCH(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kcectxControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool kcectxIsPartialUnmapSupported_DISPATCH(struct KernelCeContext *pResource) { + return pResource->__kcectxIsPartialUnmapSupported__(pResource); } -static inline PEVENTNOTIFICATION *kcectxGetNotificationListPtr_DISPATCH(struct KernelCeContext *pNotifier) { +static inline NV_STATUS kcectxMapTo_DISPATCH(struct KernelCeContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__kcectxMapTo__(pResource, pParams); +} + +static inline NV_STATUS kcectxUnmapFrom_DISPATCH(struct KernelCeContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__kcectxUnmapFrom__(pResource, pParams); +} + +static inline NvU32 kcectxGetRefCount_DISPATCH(struct KernelCeContext *pResource) { + return pResource->__kcectxGetRefCount__(pResource); +} + +static inline void kcectxAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelCeContext *pResource, RsResourceRef *pReference) { + pResource->__kcectxAddAdditionalDependants__(pClient, pResource, pReference); +} + +static inline PEVENTNOTIFICATION * kcectxGetNotificationListPtr_DISPATCH(struct KernelCeContext *pNotifier) { return pNotifier->__kcectxGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *kcectxGetNotificationShare_DISPATCH(struct KernelCeContext *pNotifier) { +static inline struct NotifShare * kcectxGetNotificationShare_DISPATCH(struct KernelCeContext *pNotifier) { return pNotifier->__kcectxGetNotificationShare__(pNotifier); } -static inline NV_STATUS kcectxMap_DISPATCH(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kcectxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void kcectxSetNotificationShare_DISPATCH(struct KernelCeContext *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__kcectxSetNotificationShare__(pNotifier, pNotifShare); +} + +static inline NV_STATUS kcectxUnregisterEvent_DISPATCH(struct KernelCeContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__kcectxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS kcectxGetOrAllocNotifShare_DISPATCH(struct KernelCeContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { diff --git a/src/nvidia/generated/g_kernel_ce_nvoc.c b/src/nvidia/generated/g_kernel_ce_nvoc.c index 3fce796864..d231457612 100644 --- a/src/nvidia/generated/g_kernel_ce_nvoc.c +++ b/src/nvidia/generated/g_kernel_ce_nvoc.c @@ -75,78 +75,102 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCE = /*pExportInfo=*/ &__nvoc_export_info_KernelCE }; -static NV_STATUS __nvoc_thunk_KernelCE_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKCe, ENGDESCRIPTOR arg0) { - return kceConstructEngine(pGpu, (struct KernelCE *)(((unsigned char *)pKCe) - __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg0); +// 6 down-thunk(s) defined to bridge methods in KernelCE from superclasses + +// kceConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelCE_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKCe, ENGDESCRIPTOR arg3) { + return kceConstructEngine(pGpu, (struct KernelCE *)(((unsigned char *) pKCe) - __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg3); } -static NvBool __nvoc_thunk_KernelCE_engstateIsPresent(OBJGPU *pGpu, struct OBJENGSTATE *pKCe) { - return kceIsPresent(pGpu, (struct KernelCE *)(((unsigned char *)pKCe) - __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); +// kceIsPresent: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NvBool __nvoc_down_thunk_KernelCE_engstateIsPresent(OBJGPU *pGpu, struct OBJENGSTATE *pKCe) { + return kceIsPresent(pGpu, (struct KernelCE *)(((unsigned char *) pKCe) - __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_KernelCE_engstateStateInitLocked(OBJGPU *arg0, struct OBJENGSTATE *arg1) { - return kceStateInitLocked(arg0, (struct KernelCE *)(((unsigned char *)arg1) - __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); +// kceStateLoad: virtual halified (singleton optimized) override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelCE_engstateStateLoad(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3) { + return kceStateLoad(arg1, (struct KernelCE *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelCE_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKCe, NvU32 flags) { - return kceStateUnload(pGpu, (struct KernelCE *)(((unsigned char *)pKCe) - __nvoc_rtti_KernelCE_OBJENGSTATE.offset), flags); +// kceStateUnload: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_KernelCE_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKCe, NvU32 flags) { + return kceStateUnload(pGpu, (struct KernelCE *)(((unsigned char *) pKCe) - __nvoc_rtti_KernelCE_OBJENGSTATE.offset), flags); } -static NV_STATUS __nvoc_thunk_KernelCE_engstateStateLoad(OBJGPU *arg0, struct OBJENGSTATE *arg1, NvU32 arg2) { - return kceStateLoad(arg0, (struct KernelCE *)(((unsigned char *)arg1) - __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg2); +// kceRegisterIntrService: virtual override (intrserv) base (intrserv) +static void __nvoc_down_thunk_KernelCE_intrservRegisterIntrService(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceRecord arg3[175]) { + kceRegisterIntrService(arg1, (struct KernelCE *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCE_IntrService.offset), arg3); } -static void __nvoc_thunk_KernelCE_engstateStateDestroy(OBJGPU *arg0, struct OBJENGSTATE *arg1) { - kceStateDestroy(arg0, (struct KernelCE *)(((unsigned char *)arg1) - __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); +// kceServiceNotificationInterrupt: virtual override (intrserv) base (intrserv) +static NV_STATUS __nvoc_down_thunk_KernelCE_intrservServiceNotificationInterrupt(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3) { + return kceServiceNotificationInterrupt(arg1, (struct KernelCE *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCE_IntrService.offset), arg3); } -static void __nvoc_thunk_KernelCE_intrservRegisterIntrService(OBJGPU *arg0, struct IntrService *arg1, IntrServiceRecord arg2[171]) { - kceRegisterIntrService(arg0, (struct KernelCE *)(((unsigned char *)arg1) - __nvoc_rtti_KernelCE_IntrService.offset), arg2); + +// 12 up-thunk(s) defined to bridge methods in KernelCE to superclasses + +// kceInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kceInitMissing(POBJGPU pGpu, struct KernelCE *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_KernelCE_intrservServiceNotificationInterrupt(OBJGPU *arg0, struct IntrService *arg1, IntrServiceServiceNotificationInterruptArguments *arg2) { - return kceServiceNotificationInterrupt(arg0, (struct KernelCE *)(((unsigned char *)arg1) - __nvoc_rtti_KernelCE_IntrService.offset), arg2); +// kceStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePreInitLocked(POBJGPU pGpu, struct KernelCE *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kceStatePreLoad(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg0); +// kceStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePreInitUnlocked(POBJGPU pGpu, struct KernelCE *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kceStatePostUnload(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg0); +// kceStateInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStateInitLocked(POBJGPU pGpu, struct KernelCE *pEngstate) { + return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kceStatePreUnload(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg0); +// kceStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStateInitUnlocked(POBJGPU pGpu, struct KernelCE *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kceStateInitUnlocked(POBJGPU pGpu, struct KernelCE *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); +// kceStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePreLoad(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_kceInitMissing(POBJGPU pGpu, struct KernelCE *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); +// kceStatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePostLoad(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kceStatePreInitLocked(POBJGPU pGpu, struct KernelCE *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); +// kceStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePreUnload(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kceStatePreInitUnlocked(POBJGPU pGpu, struct KernelCE *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); +// kceStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePostUnload(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg3); } -static NvBool __nvoc_thunk_IntrService_kceClearInterrupt(OBJGPU *pGpu, struct KernelCE *pIntrService, IntrServiceClearInterruptArguments *pParams) { - return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_KernelCE_IntrService.offset), pParams); +// kceStateDestroy: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kceStateDestroy(POBJGPU pGpu, struct KernelCE *pEngstate) { + engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kceStatePostLoad(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg0); +// kceClearInterrupt: virtual inherited (intrserv) base (intrserv) +static NvBool __nvoc_up_thunk_IntrService_kceClearInterrupt(OBJGPU *pGpu, struct KernelCE *pIntrService, IntrServiceClearInterruptArguments *pParams) { + return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_KernelCE_IntrService.offset), pParams); } -static NvU32 __nvoc_thunk_IntrService_kceServiceInterrupt(OBJGPU *pGpu, struct KernelCE *pIntrService, IntrServiceServiceInterruptArguments *pParams) { - return intrservServiceInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_KernelCE_IntrService.offset), pParams); +// kceServiceInterrupt: virtual inherited (intrserv) base (intrserv) +static NvU32 __nvoc_up_thunk_IntrService_kceServiceInterrupt(OBJGPU *pGpu, struct KernelCE *pIntrService, IntrServiceServiceInterruptArguments *pParams) { + return intrservServiceInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_KernelCE_IntrService.offset), pParams); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelCE = { /*numEntries=*/ 0, @@ -172,17 +196,6 @@ void __nvoc_init_dataField_KernelCE(KernelCE *pThis, RmHalspecOwner *pRmhalspeco PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - - // Hal field -- bCcFipsSelfTestRequired - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ - { - pThis->bCcFipsSelfTestRequired = ((NvBool)(0 == 0)); - } - // default - else - { - pThis->bCcFipsSelfTestRequired = ((NvBool)(0 != 0)); - } } NV_STATUS __nvoc_ctor_OBJENGSTATE(OBJENGSTATE* ); @@ -204,6 +217,7 @@ NV_STATUS __nvoc_ctor_KernelCE(KernelCE *pThis, RmHalspecOwner *pRmhalspecowner) return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -216,27 +230,31 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); + // kceConstructEngine -- virtual override (engstate) base (engstate) pThis->__kceConstructEngine__ = &kceConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelCE_engstateConstructEngine; - // Hal function -- kceIsPresent + // kceIsPresent -- virtual halified (singleton optimized) override (engstate) base (engstate) body pThis->__kceIsPresent__ = &kceIsPresent_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ = &__nvoc_down_thunk_KernelCE_engstateIsPresent; - pThis->__kceStateInitLocked__ = &kceStateInitLocked_IMPL; - - // Hal function -- kceStateUnload - // default - pThis->__kceStateUnload__ = &kceStateUnload_56cd7a; - - // Hal function -- kceStateLoad + // kceStateLoad -- virtual halified (singleton optimized) override (engstate) base (engstate) pThis->__kceStateLoad__ = &kceStateLoad_GP100; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelCE_engstateStateLoad; - pThis->__kceStateDestroy__ = &kceStateDestroy_IMPL; + // kceStateUnload -- virtual halified (singleton optimized) override (engstate) base (engstate) body + pThis->__kceStateUnload__ = &kceStateUnload_56cd7a; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelCE_engstateStateUnload; + // kceRegisterIntrService -- virtual override (intrserv) base (intrserv) pThis->__kceRegisterIntrService__ = &kceRegisterIntrService_IMPL; + pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_KernelCE_intrservRegisterIntrService; + // kceServiceNotificationInterrupt -- virtual override (intrserv) base (intrserv) pThis->__kceServiceNotificationInterrupt__ = &kceServiceNotificationInterrupt_IMPL; + pThis->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_down_thunk_KernelCE_intrservServiceNotificationInterrupt; - // Hal function -- kceGetP2PCes + // kceGetP2PCes -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kceGetP2PCes__ = &kceGetP2PCes_GH100; @@ -246,7 +264,7 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR pThis->__kceGetP2PCes__ = &kceGetP2PCes_GV100; } - // Hal function -- kceGetNvlinkAutoConfigCeValues + // kceGetNvlinkAutoConfigCeValues -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kceGetNvlinkAutoConfigCeValues__ = &kceGetNvlinkAutoConfigCeValues_TU102; @@ -256,7 +274,7 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR pThis->__kceGetNvlinkAutoConfigCeValues__ = &kceGetNvlinkAutoConfigCeValues_GA100; } - // Hal function -- kceGetNvlinkMaxTopoForTable + // kceGetNvlinkMaxTopoForTable -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kceGetNvlinkMaxTopoForTable__ = &kceGetNvlinkMaxTopoForTable_GP100; @@ -266,7 +284,7 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR pThis->__kceGetNvlinkMaxTopoForTable__ = &kceGetNvlinkMaxTopoForTable_491d52; } - // Hal function -- kceIsCurrentMaxTopology + // kceIsCurrentMaxTopology -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kceIsCurrentMaxTopology__ = &kceIsCurrentMaxTopology_491d52; @@ -276,7 +294,7 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR pThis->__kceIsCurrentMaxTopology__ = &kceIsCurrentMaxTopology_GA100; } - // Hal function -- kceGetAutoConfigTableEntry + // kceGetAutoConfigTableEntry -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kceGetAutoConfigTableEntry__ = &kceGetAutoConfigTableEntry_GH100; @@ -286,7 +304,7 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR pThis->__kceGetAutoConfigTableEntry__ = &kceGetAutoConfigTableEntry_GV100; } - // Hal function -- kceGetPce2lceConfigSize1 + // kceGetPce2lceConfigSize1 -- halified (4 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__kceGetPce2lceConfigSize1__ = &kceGetPce2lceConfigSize1_GA100; @@ -304,7 +322,7 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR pThis->__kceGetPce2lceConfigSize1__ = &kceGetPce2lceConfigSize1_GA102; } - // Hal function -- kceGetMappings + // kceGetMappings -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kceGetMappings__ = &kceGetMappings_GH100; @@ -318,7 +336,7 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR pThis->__kceGetMappings__ = &kceGetMappings_GA100; } - // Hal function -- kceMapPceLceForC2C + // kceMapPceLceForC2C -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kceMapPceLceForC2C__ = &kceMapPceLceForC2C_GH100; @@ -328,7 +346,7 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR pThis->__kceMapPceLceForC2C__ = &kceMapPceLceForC2C_46f6a7; } - // Hal function -- kceMapPceLceForGRCE + // kceMapPceLceForGRCE -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kceMapPceLceForGRCE__ = &kceMapPceLceForGRCE_GH100; @@ -339,7 +357,7 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR pThis->__kceMapPceLceForGRCE__ = &kceMapPceLceForGRCE_b3696a; } - // Hal function -- kceMapPceLceForSysmemLinks + // kceMapPceLceForSysmemLinks -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__kceMapPceLceForSysmemLinks__ = &kceMapPceLceForSysmemLinks_GA100; @@ -353,7 +371,7 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR pThis->__kceMapPceLceForSysmemLinks__ = &kceMapPceLceForSysmemLinks_GA102; } - // Hal function -- kceMapPceLceForNvlinkPeers + // kceMapPceLceForNvlinkPeers -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kceMapPceLceForNvlinkPeers__ = &kceMapPceLceForNvlinkPeers_GH100; @@ -367,7 +385,7 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR pThis->__kceMapPceLceForNvlinkPeers__ = &kceMapPceLceForNvlinkPeers_GA100; } - // Hal function -- kceGetSysmemSupportedLceMask + // kceGetSysmemSupportedLceMask -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__kceGetSysmemSupportedLceMask__ = &kceGetSysmemSupportedLceMask_GA100; @@ -381,7 +399,7 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR pThis->__kceGetSysmemSupportedLceMask__ = &kceGetSysmemSupportedLceMask_GA102; } - // Hal function -- kceMapAsyncLceDefault + // kceMapAsyncLceDefault -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kceMapAsyncLceDefault__ = &kceMapAsyncLceDefault_GH100; @@ -395,7 +413,7 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR pThis->__kceMapAsyncLceDefault__ = &kceMapAsyncLceDefault_GA100; } - // Hal function -- kceGetNvlinkPeerSupportedLceMask + // kceGetNvlinkPeerSupportedLceMask -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ { pThis->__kceGetNvlinkPeerSupportedLceMask__ = &kceGetNvlinkPeerSupportedLceMask_GA100; @@ -409,7 +427,7 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR pThis->__kceGetNvlinkPeerSupportedLceMask__ = &kceGetNvlinkPeerSupportedLceMask_GA102; } - // Hal function -- kceGetGrceSupportedLceMask + // kceGetGrceSupportedLceMask -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__kceGetGrceSupportedLceMask__ = &kceGetGrceSupportedLceMask_GA100; @@ -423,7 +441,7 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR pThis->__kceGetGrceSupportedLceMask__ = &kceGetGrceSupportedLceMask_GA102; } - // Hal function -- kceIsGenXorHigherSupported + // kceIsGenXorHigherSupported -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__kceIsGenXorHigherSupported__ = &kceIsGenXorHigherSupported_GA100; @@ -437,7 +455,7 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR pThis->__kceIsGenXorHigherSupported__ = &kceIsGenXorHigherSupported_cbe027; } - // Hal function -- kceApplyGen4orHigherMapping + // kceApplyGen4orHigherMapping -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__kceApplyGen4orHigherMapping__ = &kceApplyGen4orHigherMapping_GA100; @@ -447,44 +465,48 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR pThis->__kceApplyGen4orHigherMapping__ = &kceApplyGen4orHigherMapping_b3696a; } - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelCE_engstateConstructEngine; - - pThis->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ = &__nvoc_thunk_KernelCE_engstateIsPresent; + // kceInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__kceInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kceInitMissing; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_thunk_KernelCE_engstateStateInitLocked; + // kceStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__kceStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kceStatePreInitLocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_thunk_KernelCE_engstateStateUnload; + // kceStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kceStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kceStatePreInitUnlocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_thunk_KernelCE_engstateStateLoad; + // kceStateInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__kceStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kceStateInitLocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_thunk_KernelCE_engstateStateDestroy; + // kceStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kceStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kceStateInitUnlocked; - pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_thunk_KernelCE_intrservRegisterIntrService; + // kceStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__kceStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kceStatePreLoad; - pThis->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_thunk_KernelCE_intrservServiceNotificationInterrupt; + // kceStatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__kceStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kceStatePostLoad; - pThis->__kceStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_kceStatePreLoad; + // kceStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__kceStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kceStatePreUnload; - pThis->__kceStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_kceStatePostUnload; + // kceStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__kceStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kceStatePostUnload; - pThis->__kceStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_kceStatePreUnload; + // kceStateDestroy -- virtual inherited (engstate) base (engstate) + pThis->__kceStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_kceStateDestroy; - pThis->__kceStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kceStateInitUnlocked; + // kceClearInterrupt -- virtual inherited (intrserv) base (intrserv) + pThis->__kceClearInterrupt__ = &__nvoc_up_thunk_IntrService_kceClearInterrupt; - pThis->__kceInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kceInitMissing; + // kceServiceInterrupt -- virtual inherited (intrserv) base (intrserv) + pThis->__kceServiceInterrupt__ = &__nvoc_up_thunk_IntrService_kceServiceInterrupt; +} // End __nvoc_init_funcTable_KernelCE_1 with approximately 68 basic block(s). - pThis->__kceStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kceStatePreInitLocked; - - pThis->__kceStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kceStatePreInitUnlocked; - - pThis->__kceClearInterrupt__ = &__nvoc_thunk_IntrService_kceClearInterrupt; - - pThis->__kceStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_kceStatePostLoad; - - pThis->__kceServiceInterrupt__ = &__nvoc_thunk_IntrService_kceServiceInterrupt; -} +// Initialize vtable(s) for 35 virtual method(s). void __nvoc_init_funcTable_KernelCE(KernelCE *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 35 per-object function pointer(s). __nvoc_init_funcTable_KernelCE_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_ce_nvoc.h b/src/nvidia/generated/g_kernel_ce_nvoc.h index 10039b95a0..df98d99d16 100644 --- a/src/nvidia/generated/g_kernel_ce_nvoc.h +++ b/src/nvidia/generated/g_kernel_ce_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_KERNEL_CE_NVOC_H_ #define _G_KERNEL_CE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_ce_nvoc.h" #ifndef KERNEL_CE_H @@ -105,49 +113,60 @@ typedef struct NVLINK_CE_AUTO_CONFIG_TABLE #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelCE { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; struct IntrService __nvoc_base_IntrService; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct IntrService *__nvoc_pbase_IntrService; - struct KernelCE *__nvoc_pbase_KernelCE; - NV_STATUS (*__kceConstructEngine__)(OBJGPU *, struct KernelCE *, ENGDESCRIPTOR); - NvBool (*__kceIsPresent__)(OBJGPU *, struct KernelCE *); - NV_STATUS (*__kceStateInitLocked__)(OBJGPU *, struct KernelCE *); - NV_STATUS (*__kceStateUnload__)(OBJGPU *, struct KernelCE *, NvU32); - NV_STATUS (*__kceStateLoad__)(OBJGPU *, struct KernelCE *, NvU32); - void (*__kceStateDestroy__)(OBJGPU *, struct KernelCE *); - void (*__kceRegisterIntrService__)(OBJGPU *, struct KernelCE *, IntrServiceRecord *); - NV_STATUS (*__kceServiceNotificationInterrupt__)(OBJGPU *, struct KernelCE *, IntrServiceServiceNotificationInterruptArguments *); - NV_STATUS (*__kceGetP2PCes__)(struct KernelCE *, OBJGPU *, NvU32, NvU32 *); - NV_STATUS (*__kceGetNvlinkAutoConfigCeValues__)(OBJGPU *, struct KernelCE *, NvU32 *, NvU32 *, NvU32 *); - NvBool (*__kceGetNvlinkMaxTopoForTable__)(OBJGPU *, struct KernelCE *, struct NVLINK_TOPOLOGY_PARAMS *, void *, NvU32, NvU32 *); - NvBool (*__kceIsCurrentMaxTopology__)(OBJGPU *, struct KernelCE *, struct NVLINK_TOPOLOGY_PARAMS *, NvU32 *, NvU32 *); - NvBool (*__kceGetAutoConfigTableEntry__)(OBJGPU *, struct KernelCE *, struct NVLINK_TOPOLOGY_PARAMS *, struct NVLINK_CE_AUTO_CONFIG_TABLE *, NvU32, NvU32 *, NvU32 *); - NvU32 (*__kceGetPce2lceConfigSize1__)(struct KernelCE *); - NV_STATUS (*__kceGetMappings__)(OBJGPU *, struct KernelCE *, NVLINK_TOPOLOGY_PARAMS *, NvU32 *, NvU32 *, NvU32 *); - NV_STATUS (*__kceMapPceLceForC2C__)(OBJGPU *, struct KernelCE *, NvU32 *, NvU32 *, NvU32 *); - void (*__kceMapPceLceForGRCE__)(OBJGPU *, struct KernelCE *, NvU32 *, NvU32 *, NvU32 *, NvU32 *, NvU32); - NV_STATUS (*__kceMapPceLceForSysmemLinks__)(OBJGPU *, struct KernelCE *, NvU32 *, NvU32 *, NvU32 *, NvU32); - NV_STATUS (*__kceMapPceLceForNvlinkPeers__)(OBJGPU *, struct KernelCE *, NvU32 *, NvU32 *, NvU32 *); - NvU32 (*__kceGetSysmemSupportedLceMask__)(OBJGPU *, struct KernelCE *); - NV_STATUS (*__kceMapAsyncLceDefault__)(OBJGPU *, struct KernelCE *, NvU32 *, NvU32 *, NvU32 *, NvU32); - NvU32 (*__kceGetNvlinkPeerSupportedLceMask__)(OBJGPU *, struct KernelCE *, NvU32); - NvU32 (*__kceGetGrceSupportedLceMask__)(OBJGPU *, struct KernelCE *); - NvBool (*__kceIsGenXorHigherSupported__)(OBJGPU *, struct KernelCE *, NvU32); - void (*__kceApplyGen4orHigherMapping__)(OBJGPU *, struct KernelCE *, NvU32 *, NvU32 *, NvU32, NvU32); - NV_STATUS (*__kceStatePreLoad__)(POBJGPU, struct KernelCE *, NvU32); - NV_STATUS (*__kceStatePostUnload__)(POBJGPU, struct KernelCE *, NvU32); - NV_STATUS (*__kceStatePreUnload__)(POBJGPU, struct KernelCE *, NvU32); - NV_STATUS (*__kceStateInitUnlocked__)(POBJGPU, struct KernelCE *); - void (*__kceInitMissing__)(POBJGPU, struct KernelCE *); - NV_STATUS (*__kceStatePreInitLocked__)(POBJGPU, struct KernelCE *); - NV_STATUS (*__kceStatePreInitUnlocked__)(POBJGPU, struct KernelCE *); - NvBool (*__kceClearInterrupt__)(OBJGPU *, struct KernelCE *, IntrServiceClearInterruptArguments *); - NV_STATUS (*__kceStatePostLoad__)(POBJGPU, struct KernelCE *, NvU32); - NvU32 (*__kceServiceInterrupt__)(OBJGPU *, struct KernelCE *, IntrServiceServiceInterruptArguments *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct IntrService *__nvoc_pbase_IntrService; // intrserv super + struct KernelCE *__nvoc_pbase_KernelCE; // kce + + // Vtable with 35 per-object function pointers + NV_STATUS (*__kceConstructEngine__)(OBJGPU *, struct KernelCE * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NvBool (*__kceIsPresent__)(OBJGPU *, struct KernelCE * /*this*/); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kceStateLoad__)(OBJGPU *, struct KernelCE * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) + NV_STATUS (*__kceStateUnload__)(OBJGPU *, struct KernelCE * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + void (*__kceRegisterIntrService__)(OBJGPU *, struct KernelCE * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) + NV_STATUS (*__kceServiceNotificationInterrupt__)(OBJGPU *, struct KernelCE * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual override (intrserv) base (intrserv) + NV_STATUS (*__kceGetP2PCes__)(struct KernelCE * /*this*/, OBJGPU *, NvU32, NvU32 *); // halified (2 hals) + NV_STATUS (*__kceGetNvlinkAutoConfigCeValues__)(OBJGPU *, struct KernelCE * /*this*/, NvU32 *, NvU32 *, NvU32 *); // halified (2 hals) body + NvBool (*__kceGetNvlinkMaxTopoForTable__)(OBJGPU *, struct KernelCE * /*this*/, struct NVLINK_TOPOLOGY_PARAMS *, void *, NvU32, NvU32 *); // halified (2 hals) body + NvBool (*__kceIsCurrentMaxTopology__)(OBJGPU *, struct KernelCE * /*this*/, struct NVLINK_TOPOLOGY_PARAMS *, NvU32 *, NvU32 *); // halified (2 hals) + NvBool (*__kceGetAutoConfigTableEntry__)(OBJGPU *, struct KernelCE * /*this*/, struct NVLINK_TOPOLOGY_PARAMS *, struct NVLINK_CE_AUTO_CONFIG_TABLE *, NvU32, NvU32 *, NvU32 *); // halified (2 hals) body + NvU32 (*__kceGetPce2lceConfigSize1__)(struct KernelCE * /*this*/); // halified (4 hals) + NV_STATUS (*__kceGetMappings__)(OBJGPU *, struct KernelCE * /*this*/, NVLINK_TOPOLOGY_PARAMS *, NvU32 *, NvU32 *, NvU32 *); // halified (3 hals) body + NV_STATUS (*__kceMapPceLceForC2C__)(OBJGPU *, struct KernelCE * /*this*/, NvU32 *, NvU32 *, NvU32 *); // halified (2 hals) body + void (*__kceMapPceLceForGRCE__)(OBJGPU *, struct KernelCE * /*this*/, NvU32 *, NvU32 *, NvU32 *, NvU32 *, NvU32); // halified (2 hals) body + NV_STATUS (*__kceMapPceLceForSysmemLinks__)(OBJGPU *, struct KernelCE * /*this*/, NvU32 *, NvU32 *, NvU32 *, NvU32); // halified (3 hals) body + NV_STATUS (*__kceMapPceLceForNvlinkPeers__)(OBJGPU *, struct KernelCE * /*this*/, NvU32 *, NvU32 *, NvU32 *); // halified (3 hals) body + NvU32 (*__kceGetSysmemSupportedLceMask__)(OBJGPU *, struct KernelCE * /*this*/); // halified (3 hals) body + NV_STATUS (*__kceMapAsyncLceDefault__)(OBJGPU *, struct KernelCE * /*this*/, NvU32 *, NvU32 *, NvU32 *, NvU32); // halified (3 hals) body + NvU32 (*__kceGetNvlinkPeerSupportedLceMask__)(OBJGPU *, struct KernelCE * /*this*/, NvU32); // halified (3 hals) body + NvU32 (*__kceGetGrceSupportedLceMask__)(OBJGPU *, struct KernelCE * /*this*/); // halified (3 hals) body + NvBool (*__kceIsGenXorHigherSupported__)(OBJGPU *, struct KernelCE * /*this*/, NvU32); // halified (3 hals) body + void (*__kceApplyGen4orHigherMapping__)(OBJGPU *, struct KernelCE * /*this*/, NvU32 *, NvU32 *, NvU32, NvU32); // halified (2 hals) body + void (*__kceInitMissing__)(POBJGPU, struct KernelCE * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kceStatePreInitLocked__)(POBJGPU, struct KernelCE * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kceStatePreInitUnlocked__)(POBJGPU, struct KernelCE * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kceStateInitLocked__)(POBJGPU, struct KernelCE * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kceStateInitUnlocked__)(POBJGPU, struct KernelCE * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kceStatePreLoad__)(POBJGPU, struct KernelCE * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kceStatePostLoad__)(POBJGPU, struct KernelCE * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kceStatePreUnload__)(POBJGPU, struct KernelCE * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kceStatePostUnload__)(POBJGPU, struct KernelCE * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__kceStateDestroy__)(POBJGPU, struct KernelCE * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__kceClearInterrupt__)(OBJGPU *, struct KernelCE * /*this*/, IntrServiceClearInterruptArguments *); // virtual inherited (intrserv) base (intrserv) + NvU32 (*__kceServiceInterrupt__)(OBJGPU *, struct KernelCE * /*this*/, IntrServiceServiceInterruptArguments *); // virtual inherited (intrserv) base (intrserv) + + // Data members NvU32 publicID; NvBool bShimOwner; NvBool bStubbed; @@ -156,7 +175,6 @@ struct KernelCE { NvBool bIsAutoConfigEnabled; NvBool bUseGen4Mapping; struct IoAperture aperture; - NvBool bCcFipsSelfTestRequired; }; #ifndef __NVOC_CLASS_KernelCE_TYPEDEF__ @@ -168,6 +186,7 @@ typedef struct KernelCE KernelCE; #define __nvoc_class_id_KernelCE 0x242aca #endif /* __nvoc_class_id_KernelCE */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCE; #define __staticCast_KernelCE(pThis) \ @@ -180,6 +199,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCE; ((KernelCE*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelCE))) #endif //__nvoc_kernel_ce_h_disabled +// Property macros #define PDB_PROP_KCE_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_KCE_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -189,75 +209,254 @@ NV_STATUS __nvoc_objCreate_KernelCE(KernelCE**, Dynamic*, NvU32); #define __objCreate_KernelCE(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelCE((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define kceConstructEngine(pGpu, pKCe, arg0) kceConstructEngine_DISPATCH(pGpu, pKCe, arg0) + +// Wrapper macros +#define kceConstructEngine_FNPTR(pKCe) pKCe->__kceConstructEngine__ +#define kceConstructEngine(pGpu, pKCe, arg3) kceConstructEngine_DISPATCH(pGpu, pKCe, arg3) +#define kceIsPresent_FNPTR(pKCe) pKCe->__kceIsPresent__ #define kceIsPresent(pGpu, pKCe) kceIsPresent_DISPATCH(pGpu, pKCe) #define kceIsPresent_HAL(pGpu, pKCe) kceIsPresent_DISPATCH(pGpu, pKCe) -#define kceStateInitLocked(arg0, arg1) kceStateInitLocked_DISPATCH(arg0, arg1) +#define kceStateLoad_FNPTR(arg_this) arg_this->__kceStateLoad__ +#define kceStateLoad(arg1, arg_this, arg3) kceStateLoad_DISPATCH(arg1, arg_this, arg3) +#define kceStateLoad_HAL(arg1, arg_this, arg3) kceStateLoad_DISPATCH(arg1, arg_this, arg3) +#define kceStateUnload_FNPTR(pKCe) pKCe->__kceStateUnload__ #define kceStateUnload(pGpu, pKCe, flags) kceStateUnload_DISPATCH(pGpu, pKCe, flags) #define kceStateUnload_HAL(pGpu, pKCe, flags) kceStateUnload_DISPATCH(pGpu, pKCe, flags) -#define kceStateLoad(arg0, arg1, arg2) kceStateLoad_DISPATCH(arg0, arg1, arg2) -#define kceStateLoad_HAL(arg0, arg1, arg2) kceStateLoad_DISPATCH(arg0, arg1, arg2) -#define kceStateDestroy(arg0, arg1) kceStateDestroy_DISPATCH(arg0, arg1) -#define kceRegisterIntrService(arg0, arg1, arg2) kceRegisterIntrService_DISPATCH(arg0, arg1, arg2) -#define kceServiceNotificationInterrupt(arg0, arg1, arg2) kceServiceNotificationInterrupt_DISPATCH(arg0, arg1, arg2) -#define kceGetP2PCes(arg0, pGpu, gpuMask, nvlinkP2PCeMask) kceGetP2PCes_DISPATCH(arg0, pGpu, gpuMask, nvlinkP2PCeMask) -#define kceGetP2PCes_HAL(arg0, pGpu, gpuMask, nvlinkP2PCeMask) kceGetP2PCes_DISPATCH(arg0, pGpu, gpuMask, nvlinkP2PCeMask) -#define kceGetNvlinkAutoConfigCeValues(pGpu, pKCe, arg0, arg1, arg2) kceGetNvlinkAutoConfigCeValues_DISPATCH(pGpu, pKCe, arg0, arg1, arg2) -#define kceGetNvlinkAutoConfigCeValues_HAL(pGpu, pKCe, arg0, arg1, arg2) kceGetNvlinkAutoConfigCeValues_DISPATCH(pGpu, pKCe, arg0, arg1, arg2) -#define kceGetNvlinkMaxTopoForTable(pGpu, pKCe, arg0, arg1, arg2, arg3) kceGetNvlinkMaxTopoForTable_DISPATCH(pGpu, pKCe, arg0, arg1, arg2, arg3) -#define kceGetNvlinkMaxTopoForTable_HAL(pGpu, pKCe, arg0, arg1, arg2, arg3) kceGetNvlinkMaxTopoForTable_DISPATCH(pGpu, pKCe, arg0, arg1, arg2, arg3) -#define kceIsCurrentMaxTopology(pGpu, arg0, arg1, arg2, arg3) kceIsCurrentMaxTopology_DISPATCH(pGpu, arg0, arg1, arg2, arg3) -#define kceIsCurrentMaxTopology_HAL(pGpu, arg0, arg1, arg2, arg3) kceIsCurrentMaxTopology_DISPATCH(pGpu, arg0, arg1, arg2, arg3) -#define kceGetAutoConfigTableEntry(pGpu, pKCe, arg0, arg1, arg2, arg3, arg4) kceGetAutoConfigTableEntry_DISPATCH(pGpu, pKCe, arg0, arg1, arg2, arg3, arg4) -#define kceGetAutoConfigTableEntry_HAL(pGpu, pKCe, arg0, arg1, arg2, arg3, arg4) kceGetAutoConfigTableEntry_DISPATCH(pGpu, pKCe, arg0, arg1, arg2, arg3, arg4) -#define kceGetPce2lceConfigSize1(arg0) kceGetPce2lceConfigSize1_DISPATCH(arg0) -#define kceGetPce2lceConfigSize1_HAL(arg0) kceGetPce2lceConfigSize1_DISPATCH(arg0) -#define kceGetMappings(pGpu, pCe, arg0, arg1, arg2, arg3) kceGetMappings_DISPATCH(pGpu, pCe, arg0, arg1, arg2, arg3) -#define kceGetMappings_HAL(pGpu, pCe, arg0, arg1, arg2, arg3) kceGetMappings_DISPATCH(pGpu, pCe, arg0, arg1, arg2, arg3) -#define kceMapPceLceForC2C(pGpu, pKCe, arg0, arg1, arg2) kceMapPceLceForC2C_DISPATCH(pGpu, pKCe, arg0, arg1, arg2) -#define kceMapPceLceForC2C_HAL(pGpu, pKCe, arg0, arg1, arg2) kceMapPceLceForC2C_DISPATCH(pGpu, pKCe, arg0, arg1, arg2) -#define kceMapPceLceForGRCE(pGpu, pKCe, arg0, arg1, arg2, arg3, arg4) kceMapPceLceForGRCE_DISPATCH(pGpu, pKCe, arg0, arg1, arg2, arg3, arg4) -#define kceMapPceLceForGRCE_HAL(pGpu, pKCe, arg0, arg1, arg2, arg3, arg4) kceMapPceLceForGRCE_DISPATCH(pGpu, pKCe, arg0, arg1, arg2, arg3, arg4) -#define kceMapPceLceForSysmemLinks(pGpu, pCe, arg0, arg1, arg2, arg3) kceMapPceLceForSysmemLinks_DISPATCH(pGpu, pCe, arg0, arg1, arg2, arg3) -#define kceMapPceLceForSysmemLinks_HAL(pGpu, pCe, arg0, arg1, arg2, arg3) kceMapPceLceForSysmemLinks_DISPATCH(pGpu, pCe, arg0, arg1, arg2, arg3) -#define kceMapPceLceForNvlinkPeers(pGpu, pCe, arg0, arg1, arg2) kceMapPceLceForNvlinkPeers_DISPATCH(pGpu, pCe, arg0, arg1, arg2) -#define kceMapPceLceForNvlinkPeers_HAL(pGpu, pCe, arg0, arg1, arg2) kceMapPceLceForNvlinkPeers_DISPATCH(pGpu, pCe, arg0, arg1, arg2) +#define kceRegisterIntrService_FNPTR(arg_this) arg_this->__kceRegisterIntrService__ +#define kceRegisterIntrService(arg1, arg_this, arg3) kceRegisterIntrService_DISPATCH(arg1, arg_this, arg3) +#define kceServiceNotificationInterrupt_FNPTR(arg_this) arg_this->__kceServiceNotificationInterrupt__ +#define kceServiceNotificationInterrupt(arg1, arg_this, arg3) kceServiceNotificationInterrupt_DISPATCH(arg1, arg_this, arg3) +#define kceGetP2PCes_FNPTR(arg_this) arg_this->__kceGetP2PCes__ +#define kceGetP2PCes(arg_this, pGpu, gpuMask, nvlinkP2PCeMask) kceGetP2PCes_DISPATCH(arg_this, pGpu, gpuMask, nvlinkP2PCeMask) +#define kceGetP2PCes_HAL(arg_this, pGpu, gpuMask, nvlinkP2PCeMask) kceGetP2PCes_DISPATCH(arg_this, pGpu, gpuMask, nvlinkP2PCeMask) +#define kceGetNvlinkAutoConfigCeValues_FNPTR(pKCe) pKCe->__kceGetNvlinkAutoConfigCeValues__ +#define kceGetNvlinkAutoConfigCeValues(pGpu, pKCe, arg3, arg4, arg5) kceGetNvlinkAutoConfigCeValues_DISPATCH(pGpu, pKCe, arg3, arg4, arg5) +#define kceGetNvlinkAutoConfigCeValues_HAL(pGpu, pKCe, arg3, arg4, arg5) kceGetNvlinkAutoConfigCeValues_DISPATCH(pGpu, pKCe, arg3, arg4, arg5) +#define kceGetNvlinkMaxTopoForTable_FNPTR(pKCe) pKCe->__kceGetNvlinkMaxTopoForTable__ +#define kceGetNvlinkMaxTopoForTable(pGpu, pKCe, arg3, arg4, arg5, arg6) kceGetNvlinkMaxTopoForTable_DISPATCH(pGpu, pKCe, arg3, arg4, arg5, arg6) +#define kceGetNvlinkMaxTopoForTable_HAL(pGpu, pKCe, arg3, arg4, arg5, arg6) kceGetNvlinkMaxTopoForTable_DISPATCH(pGpu, pKCe, arg3, arg4, arg5, arg6) +#define kceIsCurrentMaxTopology_FNPTR(arg_this) arg_this->__kceIsCurrentMaxTopology__ +#define kceIsCurrentMaxTopology(pGpu, arg_this, arg3, arg4, arg5) kceIsCurrentMaxTopology_DISPATCH(pGpu, arg_this, arg3, arg4, arg5) +#define kceIsCurrentMaxTopology_HAL(pGpu, arg_this, arg3, arg4, arg5) kceIsCurrentMaxTopology_DISPATCH(pGpu, arg_this, arg3, arg4, arg5) +#define kceGetAutoConfigTableEntry_FNPTR(pKCe) pKCe->__kceGetAutoConfigTableEntry__ +#define kceGetAutoConfigTableEntry(pGpu, pKCe, arg3, arg4, arg5, arg6, arg7) kceGetAutoConfigTableEntry_DISPATCH(pGpu, pKCe, arg3, arg4, arg5, arg6, arg7) +#define kceGetAutoConfigTableEntry_HAL(pGpu, pKCe, arg3, arg4, arg5, arg6, arg7) kceGetAutoConfigTableEntry_DISPATCH(pGpu, pKCe, arg3, arg4, arg5, arg6, arg7) +#define kceGetPce2lceConfigSize1_FNPTR(arg_this) arg_this->__kceGetPce2lceConfigSize1__ +#define kceGetPce2lceConfigSize1(arg_this) kceGetPce2lceConfigSize1_DISPATCH(arg_this) +#define kceGetPce2lceConfigSize1_HAL(arg_this) kceGetPce2lceConfigSize1_DISPATCH(arg_this) +#define kceGetMappings_FNPTR(pCe) pCe->__kceGetMappings__ +#define kceGetMappings(pGpu, pCe, arg3, arg4, arg5, arg6) kceGetMappings_DISPATCH(pGpu, pCe, arg3, arg4, arg5, arg6) +#define kceGetMappings_HAL(pGpu, pCe, arg3, arg4, arg5, arg6) kceGetMappings_DISPATCH(pGpu, pCe, arg3, arg4, arg5, arg6) +#define kceMapPceLceForC2C_FNPTR(pKCe) pKCe->__kceMapPceLceForC2C__ +#define kceMapPceLceForC2C(pGpu, pKCe, arg3, arg4, arg5) kceMapPceLceForC2C_DISPATCH(pGpu, pKCe, arg3, arg4, arg5) +#define kceMapPceLceForC2C_HAL(pGpu, pKCe, arg3, arg4, arg5) kceMapPceLceForC2C_DISPATCH(pGpu, pKCe, arg3, arg4, arg5) +#define kceMapPceLceForGRCE_FNPTR(pKCe) pKCe->__kceMapPceLceForGRCE__ +#define kceMapPceLceForGRCE(pGpu, pKCe, arg3, arg4, arg5, arg6, arg7) kceMapPceLceForGRCE_DISPATCH(pGpu, pKCe, arg3, arg4, arg5, arg6, arg7) +#define kceMapPceLceForGRCE_HAL(pGpu, pKCe, arg3, arg4, arg5, arg6, arg7) kceMapPceLceForGRCE_DISPATCH(pGpu, pKCe, arg3, arg4, arg5, arg6, arg7) +#define kceMapPceLceForSysmemLinks_FNPTR(pCe) pCe->__kceMapPceLceForSysmemLinks__ +#define kceMapPceLceForSysmemLinks(pGpu, pCe, arg3, arg4, arg5, arg6) kceMapPceLceForSysmemLinks_DISPATCH(pGpu, pCe, arg3, arg4, arg5, arg6) +#define kceMapPceLceForSysmemLinks_HAL(pGpu, pCe, arg3, arg4, arg5, arg6) kceMapPceLceForSysmemLinks_DISPATCH(pGpu, pCe, arg3, arg4, arg5, arg6) +#define kceMapPceLceForNvlinkPeers_FNPTR(pCe) pCe->__kceMapPceLceForNvlinkPeers__ +#define kceMapPceLceForNvlinkPeers(pGpu, pCe, arg3, arg4, arg5) kceMapPceLceForNvlinkPeers_DISPATCH(pGpu, pCe, arg3, arg4, arg5) +#define kceMapPceLceForNvlinkPeers_HAL(pGpu, pCe, arg3, arg4, arg5) kceMapPceLceForNvlinkPeers_DISPATCH(pGpu, pCe, arg3, arg4, arg5) +#define kceGetSysmemSupportedLceMask_FNPTR(pCe) pCe->__kceGetSysmemSupportedLceMask__ #define kceGetSysmemSupportedLceMask(pGpu, pCe) kceGetSysmemSupportedLceMask_DISPATCH(pGpu, pCe) #define kceGetSysmemSupportedLceMask_HAL(pGpu, pCe) kceGetSysmemSupportedLceMask_DISPATCH(pGpu, pCe) -#define kceMapAsyncLceDefault(pGpu, pCe, arg0, arg1, arg2, arg3) kceMapAsyncLceDefault_DISPATCH(pGpu, pCe, arg0, arg1, arg2, arg3) -#define kceMapAsyncLceDefault_HAL(pGpu, pCe, arg0, arg1, arg2, arg3) kceMapAsyncLceDefault_DISPATCH(pGpu, pCe, arg0, arg1, arg2, arg3) -#define kceGetNvlinkPeerSupportedLceMask(pGpu, pCe, arg0) kceGetNvlinkPeerSupportedLceMask_DISPATCH(pGpu, pCe, arg0) -#define kceGetNvlinkPeerSupportedLceMask_HAL(pGpu, pCe, arg0) kceGetNvlinkPeerSupportedLceMask_DISPATCH(pGpu, pCe, arg0) +#define kceMapAsyncLceDefault_FNPTR(pCe) pCe->__kceMapAsyncLceDefault__ +#define kceMapAsyncLceDefault(pGpu, pCe, arg3, arg4, arg5, arg6) kceMapAsyncLceDefault_DISPATCH(pGpu, pCe, arg3, arg4, arg5, arg6) +#define kceMapAsyncLceDefault_HAL(pGpu, pCe, arg3, arg4, arg5, arg6) kceMapAsyncLceDefault_DISPATCH(pGpu, pCe, arg3, arg4, arg5, arg6) +#define kceGetNvlinkPeerSupportedLceMask_FNPTR(pCe) pCe->__kceGetNvlinkPeerSupportedLceMask__ +#define kceGetNvlinkPeerSupportedLceMask(pGpu, pCe, arg3) kceGetNvlinkPeerSupportedLceMask_DISPATCH(pGpu, pCe, arg3) +#define kceGetNvlinkPeerSupportedLceMask_HAL(pGpu, pCe, arg3) kceGetNvlinkPeerSupportedLceMask_DISPATCH(pGpu, pCe, arg3) +#define kceGetGrceSupportedLceMask_FNPTR(pCe) pCe->__kceGetGrceSupportedLceMask__ #define kceGetGrceSupportedLceMask(pGpu, pCe) kceGetGrceSupportedLceMask_DISPATCH(pGpu, pCe) #define kceGetGrceSupportedLceMask_HAL(pGpu, pCe) kceGetGrceSupportedLceMask_DISPATCH(pGpu, pCe) +#define kceIsGenXorHigherSupported_FNPTR(pCe) pCe->__kceIsGenXorHigherSupported__ #define kceIsGenXorHigherSupported(pGpu, pCe, checkGen) kceIsGenXorHigherSupported_DISPATCH(pGpu, pCe, checkGen) #define kceIsGenXorHigherSupported_HAL(pGpu, pCe, checkGen) kceIsGenXorHigherSupported_DISPATCH(pGpu, pCe, checkGen) -#define kceApplyGen4orHigherMapping(pGpu, pCe, arg0, arg1, arg2, arg3) kceApplyGen4orHigherMapping_DISPATCH(pGpu, pCe, arg0, arg1, arg2, arg3) -#define kceApplyGen4orHigherMapping_HAL(pGpu, pCe, arg0, arg1, arg2, arg3) kceApplyGen4orHigherMapping_DISPATCH(pGpu, pCe, arg0, arg1, arg2, arg3) -#define kceStatePreLoad(pGpu, pEngstate, arg0) kceStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kceStatePostUnload(pGpu, pEngstate, arg0) kceStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kceStatePreUnload(pGpu, pEngstate, arg0) kceStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kceStateInitUnlocked(pGpu, pEngstate) kceStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kceApplyGen4orHigherMapping_FNPTR(pCe) pCe->__kceApplyGen4orHigherMapping__ +#define kceApplyGen4orHigherMapping(pGpu, pCe, arg3, arg4, arg5, arg6) kceApplyGen4orHigherMapping_DISPATCH(pGpu, pCe, arg3, arg4, arg5, arg6) +#define kceApplyGen4orHigherMapping_HAL(pGpu, pCe, arg3, arg4, arg5, arg6) kceApplyGen4orHigherMapping_DISPATCH(pGpu, pCe, arg3, arg4, arg5, arg6) +#define kceInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define kceInitMissing(pGpu, pEngstate) kceInitMissing_DISPATCH(pGpu, pEngstate) +#define kceStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define kceStatePreInitLocked(pGpu, pEngstate) kceStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define kceStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define kceStatePreInitUnlocked(pGpu, pEngstate) kceStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kceStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define kceStateInitLocked(pGpu, pEngstate) kceStateInitLocked_DISPATCH(pGpu, pEngstate) +#define kceStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kceStateInitUnlocked(pGpu, pEngstate) kceStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kceStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kceStatePreLoad(pGpu, pEngstate, arg3) kceStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kceStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kceStatePostLoad(pGpu, pEngstate, arg3) kceStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kceStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kceStatePreUnload(pGpu, pEngstate, arg3) kceStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kceStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kceStatePostUnload(pGpu, pEngstate, arg3) kceStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kceStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define kceStateDestroy(pGpu, pEngstate) kceStateDestroy_DISPATCH(pGpu, pEngstate) +#define kceClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservClearInterrupt__ #define kceClearInterrupt(pGpu, pIntrService, pParams) kceClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define kceStatePostLoad(pGpu, pEngstate, arg0) kceStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) +#define kceServiceInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservServiceInterrupt__ #define kceServiceInterrupt(pGpu, pIntrService, pParams) kceServiceInterrupt_DISPATCH(pGpu, pIntrService, pParams) -static inline void kceNonstallIntrCheckAndClear_b3696a(OBJGPU *arg0, struct KernelCE *arg1, struct THREAD_STATE_NODE *arg2) { + +// Dispatch functions +static inline NV_STATUS kceConstructEngine_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, ENGDESCRIPTOR arg3) { + return pKCe->__kceConstructEngine__(pGpu, pKCe, arg3); +} + +static inline NvBool kceIsPresent_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe) { + return pKCe->__kceIsPresent__(pGpu, pKCe); +} + +static inline NV_STATUS kceStateLoad_DISPATCH(OBJGPU *arg1, struct KernelCE *arg_this, NvU32 arg3) { + return arg_this->__kceStateLoad__(arg1, arg_this, arg3); +} + +static inline NV_STATUS kceStateUnload_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 flags) { + return pKCe->__kceStateUnload__(pGpu, pKCe, flags); +} + +static inline void kceRegisterIntrService_DISPATCH(OBJGPU *arg1, struct KernelCE *arg_this, IntrServiceRecord arg3[175]) { + arg_this->__kceRegisterIntrService__(arg1, arg_this, arg3); +} + +static inline NV_STATUS kceServiceNotificationInterrupt_DISPATCH(OBJGPU *arg1, struct KernelCE *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3) { + return arg_this->__kceServiceNotificationInterrupt__(arg1, arg_this, arg3); +} + +static inline NV_STATUS kceGetP2PCes_DISPATCH(struct KernelCE *arg_this, OBJGPU *pGpu, NvU32 gpuMask, NvU32 *nvlinkP2PCeMask) { + return arg_this->__kceGetP2PCes__(arg_this, pGpu, gpuMask, nvlinkP2PCeMask); +} + +static inline NV_STATUS kceGetNvlinkAutoConfigCeValues_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5) { + return pKCe->__kceGetNvlinkAutoConfigCeValues__(pGpu, pKCe, arg3, arg4, arg5); +} + +static inline NvBool kceGetNvlinkMaxTopoForTable_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg3, void *arg4, NvU32 arg5, NvU32 *arg6) { + return pKCe->__kceGetNvlinkMaxTopoForTable__(pGpu, pKCe, arg3, arg4, arg5, arg6); +} + +static inline NvBool kceIsCurrentMaxTopology_DISPATCH(OBJGPU *pGpu, struct KernelCE *arg_this, struct NVLINK_TOPOLOGY_PARAMS *arg3, NvU32 *arg4, NvU32 *arg5) { + return arg_this->__kceIsCurrentMaxTopology__(pGpu, arg_this, arg3, arg4, arg5); +} + +static inline NvBool kceGetAutoConfigTableEntry_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg3, struct NVLINK_CE_AUTO_CONFIG_TABLE *arg4, NvU32 arg5, NvU32 *arg6, NvU32 *arg7) { + return pKCe->__kceGetAutoConfigTableEntry__(pGpu, pKCe, arg3, arg4, arg5, arg6, arg7); +} + +static inline NvU32 kceGetPce2lceConfigSize1_DISPATCH(struct KernelCE *arg_this) { + return arg_this->__kceGetPce2lceConfigSize1__(arg_this); +} + +static inline NV_STATUS kceGetMappings_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe, NVLINK_TOPOLOGY_PARAMS *arg3, NvU32 *arg4, NvU32 *arg5, NvU32 *arg6) { + return pCe->__kceGetMappings__(pGpu, pCe, arg3, arg4, arg5, arg6); +} + +static inline NV_STATUS kceMapPceLceForC2C_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5) { + return pKCe->__kceMapPceLceForC2C__(pGpu, pKCe, arg3, arg4, arg5); +} + +static inline void kceMapPceLceForGRCE_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5, NvU32 *arg6, NvU32 arg7) { + pKCe->__kceMapPceLceForGRCE__(pGpu, pKCe, arg3, arg4, arg5, arg6, arg7); +} + +static inline NV_STATUS kceMapPceLceForSysmemLinks_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5, NvU32 arg6) { + return pCe->__kceMapPceLceForSysmemLinks__(pGpu, pCe, arg3, arg4, arg5, arg6); +} + +static inline NV_STATUS kceMapPceLceForNvlinkPeers_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5) { + return pCe->__kceMapPceLceForNvlinkPeers__(pGpu, pCe, arg3, arg4, arg5); +} + +static inline NvU32 kceGetSysmemSupportedLceMask_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe) { + return pCe->__kceGetSysmemSupportedLceMask__(pGpu, pCe); +} + +static inline NV_STATUS kceMapAsyncLceDefault_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5, NvU32 arg6) { + return pCe->__kceMapAsyncLceDefault__(pGpu, pCe, arg3, arg4, arg5, arg6); +} + +static inline NvU32 kceGetNvlinkPeerSupportedLceMask_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 arg3) { + return pCe->__kceGetNvlinkPeerSupportedLceMask__(pGpu, pCe, arg3); +} + +static inline NvU32 kceGetGrceSupportedLceMask_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe) { + return pCe->__kceGetGrceSupportedLceMask__(pGpu, pCe); +} + +static inline NvBool kceIsGenXorHigherSupported_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 checkGen) { + return pCe->__kceIsGenXorHigherSupported__(pGpu, pCe, checkGen); +} + +static inline void kceApplyGen4orHigherMapping_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg3, NvU32 *arg4, NvU32 arg5, NvU32 arg6) { + pCe->__kceApplyGen4orHigherMapping__(pGpu, pCe, arg3, arg4, arg5, arg6); +} + +static inline void kceInitMissing_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate) { + pEngstate->__kceInitMissing__(pGpu, pEngstate); +} + +static inline NV_STATUS kceStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate) { + return pEngstate->__kceStatePreInitLocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kceStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate) { + return pEngstate->__kceStatePreInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kceStateInitLocked_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate) { + return pEngstate->__kceStateInitLocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kceStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate) { + return pEngstate->__kceStateInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kceStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg3) { + return pEngstate->__kceStatePreLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS kceStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg3) { + return pEngstate->__kceStatePostLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS kceStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg3) { + return pEngstate->__kceStatePreUnload__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS kceStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg3) { + return pEngstate->__kceStatePostUnload__(pGpu, pEngstate, arg3); +} + +static inline void kceStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate) { + pEngstate->__kceStateDestroy__(pGpu, pEngstate); +} + +static inline NvBool kceClearInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelCE *pIntrService, IntrServiceClearInterruptArguments *pParams) { + return pIntrService->__kceClearInterrupt__(pGpu, pIntrService, pParams); +} + +static inline NvU32 kceServiceInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelCE *pIntrService, IntrServiceServiceInterruptArguments *pParams) { + return pIntrService->__kceServiceInterrupt__(pGpu, pIntrService, pParams); +} + +static inline void kceNonstallIntrCheckAndClear_b3696a(OBJGPU *arg1, struct KernelCE *arg2, struct THREAD_STATE_NODE *arg3) { return; } #ifdef __nvoc_kernel_ce_h_disabled -static inline void kceNonstallIntrCheckAndClear(OBJGPU *arg0, struct KernelCE *arg1, struct THREAD_STATE_NODE *arg2) { +static inline void kceNonstallIntrCheckAndClear(OBJGPU *arg1, struct KernelCE *arg2, struct THREAD_STATE_NODE *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelCE was disabled!"); } #else //__nvoc_kernel_ce_h_disabled -#define kceNonstallIntrCheckAndClear(arg0, arg1, arg2) kceNonstallIntrCheckAndClear_b3696a(arg0, arg1, arg2) +#define kceNonstallIntrCheckAndClear(arg1, arg2, arg3) kceNonstallIntrCheckAndClear_b3696a(arg1, arg2, arg3) #endif //__nvoc_kernel_ce_h_disabled -#define kceNonstallIntrCheckAndClear_HAL(arg0, arg1, arg2) kceNonstallIntrCheckAndClear(arg0, arg1, arg2) +#define kceNonstallIntrCheckAndClear_HAL(arg1, arg2, arg3) kceNonstallIntrCheckAndClear(arg1, arg2, arg3) NV_STATUS kceUpdateClassDB_KERNEL(OBJGPU *pGpu, struct KernelCE *pKCe); @@ -315,18 +514,18 @@ static inline NvBool kceIsCeNvlinkP2P(OBJGPU *pGpu, struct KernelCE *pKCe) { #define kceIsCeNvlinkP2P_HAL(pGpu, pKCe) kceIsCeNvlinkP2P(pGpu, pKCe) -void kceGetSysmemRWLCEs_GV100(struct KernelCE *arg0, NvU32 *rd, NvU32 *wr); +void kceGetSysmemRWLCEs_GV100(struct KernelCE *arg1, NvU32 *rd, NvU32 *wr); #ifdef __nvoc_kernel_ce_h_disabled -static inline void kceGetSysmemRWLCEs(struct KernelCE *arg0, NvU32 *rd, NvU32 *wr) { +static inline void kceGetSysmemRWLCEs(struct KernelCE *arg1, NvU32 *rd, NvU32 *wr) { NV_ASSERT_FAILED_PRECOMP("KernelCE was disabled!"); } #else //__nvoc_kernel_ce_h_disabled -#define kceGetSysmemRWLCEs(arg0, rd, wr) kceGetSysmemRWLCEs_GV100(arg0, rd, wr) +#define kceGetSysmemRWLCEs(arg1, rd, wr) kceGetSysmemRWLCEs_GV100(arg1, rd, wr) #endif //__nvoc_kernel_ce_h_disabled -#define kceGetSysmemRWLCEs_HAL(arg0, rd, wr) kceGetSysmemRWLCEs(arg0, rd, wr) +#define kceGetSysmemRWLCEs_HAL(arg1, rd, wr) kceGetSysmemRWLCEs(arg1, rd, wr) void kceClearAssignedNvlinkPeerMasks_GV100(OBJGPU *pGpu, struct KernelCE *pKCe); @@ -341,182 +540,102 @@ static inline void kceClearAssignedNvlinkPeerMasks(OBJGPU *pGpu, struct KernelCE #define kceClearAssignedNvlinkPeerMasks_HAL(pGpu, pKCe) kceClearAssignedNvlinkPeerMasks(pGpu, pKCe) -NvU32 kceGetGrceConfigSize1_TU102(struct KernelCE *arg0); +NvU32 kceGetGrceConfigSize1_TU102(struct KernelCE *arg1); #ifdef __nvoc_kernel_ce_h_disabled -static inline NvU32 kceGetGrceConfigSize1(struct KernelCE *arg0) { +static inline NvU32 kceGetGrceConfigSize1(struct KernelCE *arg1) { NV_ASSERT_FAILED_PRECOMP("KernelCE was disabled!"); return 0; } #else //__nvoc_kernel_ce_h_disabled -#define kceGetGrceConfigSize1(arg0) kceGetGrceConfigSize1_TU102(arg0) +#define kceGetGrceConfigSize1(arg1) kceGetGrceConfigSize1_TU102(arg1) #endif //__nvoc_kernel_ce_h_disabled -#define kceGetGrceConfigSize1_HAL(arg0) kceGetGrceConfigSize1(arg0) +#define kceGetGrceConfigSize1_HAL(arg1) kceGetGrceConfigSize1(arg1) -NV_STATUS kceConstructEngine_IMPL(OBJGPU *pGpu, struct KernelCE *pKCe, ENGDESCRIPTOR arg0); - -static inline NV_STATUS kceConstructEngine_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, ENGDESCRIPTOR arg0) { - return pKCe->__kceConstructEngine__(pGpu, pKCe, arg0); -} +NV_STATUS kceConstructEngine_IMPL(OBJGPU *pGpu, struct KernelCE *pKCe, ENGDESCRIPTOR arg3); NvBool kceIsPresent_IMPL(OBJGPU *pGpu, struct KernelCE *pKCe); -static inline NvBool kceIsPresent_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe) { - return pKCe->__kceIsPresent__(pGpu, pKCe); -} - -NV_STATUS kceStateInitLocked_IMPL(OBJGPU *arg0, struct KernelCE *arg1); - -static inline NV_STATUS kceStateInitLocked_DISPATCH(OBJGPU *arg0, struct KernelCE *arg1) { - return arg1->__kceStateInitLocked__(arg0, arg1); -} +NV_STATUS kceStateLoad_GP100(OBJGPU *arg1, struct KernelCE *arg2, NvU32 arg3); static inline NV_STATUS kceStateUnload_56cd7a(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 flags) { return NV_OK; } -static inline NV_STATUS kceStateUnload_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 flags) { - return pKCe->__kceStateUnload__(pGpu, pKCe, flags); -} - -NV_STATUS kceStateLoad_GP100(OBJGPU *arg0, struct KernelCE *arg1, NvU32 arg2); - -static inline NV_STATUS kceStateLoad_DISPATCH(OBJGPU *arg0, struct KernelCE *arg1, NvU32 arg2) { - return arg1->__kceStateLoad__(arg0, arg1, arg2); -} - -void kceStateDestroy_IMPL(OBJGPU *arg0, struct KernelCE *arg1); +void kceRegisterIntrService_IMPL(OBJGPU *arg1, struct KernelCE *arg2, IntrServiceRecord arg3[175]); -static inline void kceStateDestroy_DISPATCH(OBJGPU *arg0, struct KernelCE *arg1) { - arg1->__kceStateDestroy__(arg0, arg1); -} - -void kceRegisterIntrService_IMPL(OBJGPU *arg0, struct KernelCE *arg1, IntrServiceRecord arg2[171]); - -static inline void kceRegisterIntrService_DISPATCH(OBJGPU *arg0, struct KernelCE *arg1, IntrServiceRecord arg2[171]) { - arg1->__kceRegisterIntrService__(arg0, arg1, arg2); -} +NV_STATUS kceServiceNotificationInterrupt_IMPL(OBJGPU *arg1, struct KernelCE *arg2, IntrServiceServiceNotificationInterruptArguments *arg3); -NV_STATUS kceServiceNotificationInterrupt_IMPL(OBJGPU *arg0, struct KernelCE *arg1, IntrServiceServiceNotificationInterruptArguments *arg2); +NV_STATUS kceGetP2PCes_GV100(struct KernelCE *arg1, OBJGPU *pGpu, NvU32 gpuMask, NvU32 *nvlinkP2PCeMask); -static inline NV_STATUS kceServiceNotificationInterrupt_DISPATCH(OBJGPU *arg0, struct KernelCE *arg1, IntrServiceServiceNotificationInterruptArguments *arg2) { - return arg1->__kceServiceNotificationInterrupt__(arg0, arg1, arg2); -} +NV_STATUS kceGetP2PCes_GH100(struct KernelCE *arg1, OBJGPU *pGpu, NvU32 gpuMask, NvU32 *nvlinkP2PCeMask); -NV_STATUS kceGetP2PCes_GV100(struct KernelCE *arg0, OBJGPU *pGpu, NvU32 gpuMask, NvU32 *nvlinkP2PCeMask); +NV_STATUS kceGetNvlinkAutoConfigCeValues_TU102(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5); -NV_STATUS kceGetP2PCes_GH100(struct KernelCE *arg0, OBJGPU *pGpu, NvU32 gpuMask, NvU32 *nvlinkP2PCeMask); +NV_STATUS kceGetNvlinkAutoConfigCeValues_GA100(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5); -static inline NV_STATUS kceGetP2PCes_DISPATCH(struct KernelCE *arg0, OBJGPU *pGpu, NvU32 gpuMask, NvU32 *nvlinkP2PCeMask) { - return arg0->__kceGetP2PCes__(arg0, pGpu, gpuMask, nvlinkP2PCeMask); -} +NvBool kceGetNvlinkMaxTopoForTable_GP100(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg3, void *arg4, NvU32 arg5, NvU32 *arg6); -NV_STATUS kceGetNvlinkAutoConfigCeValues_TU102(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2); - -NV_STATUS kceGetNvlinkAutoConfigCeValues_GA100(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2); - -static inline NV_STATUS kceGetNvlinkAutoConfigCeValues_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2) { - return pKCe->__kceGetNvlinkAutoConfigCeValues__(pGpu, pKCe, arg0, arg1, arg2); -} - -NvBool kceGetNvlinkMaxTopoForTable_GP100(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg0, void *arg1, NvU32 arg2, NvU32 *arg3); - -static inline NvBool kceGetNvlinkMaxTopoForTable_491d52(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg0, void *arg1, NvU32 arg2, NvU32 *arg3) { +static inline NvBool kceGetNvlinkMaxTopoForTable_491d52(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg3, void *arg4, NvU32 arg5, NvU32 *arg6) { return ((NvBool)(0 != 0)); } -static inline NvBool kceGetNvlinkMaxTopoForTable_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg0, void *arg1, NvU32 arg2, NvU32 *arg3) { - return pKCe->__kceGetNvlinkMaxTopoForTable__(pGpu, pKCe, arg0, arg1, arg2, arg3); -} - -NvBool kceIsCurrentMaxTopology_GA100(OBJGPU *pGpu, struct KernelCE *arg0, struct NVLINK_TOPOLOGY_PARAMS *arg1, NvU32 *arg2, NvU32 *arg3); +NvBool kceIsCurrentMaxTopology_GA100(OBJGPU *pGpu, struct KernelCE *arg2, struct NVLINK_TOPOLOGY_PARAMS *arg3, NvU32 *arg4, NvU32 *arg5); -static inline NvBool kceIsCurrentMaxTopology_491d52(OBJGPU *pGpu, struct KernelCE *arg0, struct NVLINK_TOPOLOGY_PARAMS *arg1, NvU32 *arg2, NvU32 *arg3) { +static inline NvBool kceIsCurrentMaxTopology_491d52(OBJGPU *pGpu, struct KernelCE *arg2, struct NVLINK_TOPOLOGY_PARAMS *arg3, NvU32 *arg4, NvU32 *arg5) { return ((NvBool)(0 != 0)); } -static inline NvBool kceIsCurrentMaxTopology_DISPATCH(OBJGPU *pGpu, struct KernelCE *arg0, struct NVLINK_TOPOLOGY_PARAMS *arg1, NvU32 *arg2, NvU32 *arg3) { - return arg0->__kceIsCurrentMaxTopology__(pGpu, arg0, arg1, arg2, arg3); -} - -NvBool kceGetAutoConfigTableEntry_GV100(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg0, struct NVLINK_CE_AUTO_CONFIG_TABLE *arg1, NvU32 arg2, NvU32 *arg3, NvU32 *arg4); - -NvBool kceGetAutoConfigTableEntry_GH100(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg0, struct NVLINK_CE_AUTO_CONFIG_TABLE *arg1, NvU32 arg2, NvU32 *arg3, NvU32 *arg4); - -static inline NvBool kceGetAutoConfigTableEntry_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg0, struct NVLINK_CE_AUTO_CONFIG_TABLE *arg1, NvU32 arg2, NvU32 *arg3, NvU32 *arg4) { - return pKCe->__kceGetAutoConfigTableEntry__(pGpu, pKCe, arg0, arg1, arg2, arg3, arg4); -} +NvBool kceGetAutoConfigTableEntry_GV100(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg3, struct NVLINK_CE_AUTO_CONFIG_TABLE *arg4, NvU32 arg5, NvU32 *arg6, NvU32 *arg7); -NvU32 kceGetPce2lceConfigSize1_TU102(struct KernelCE *arg0); +NvBool kceGetAutoConfigTableEntry_GH100(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg3, struct NVLINK_CE_AUTO_CONFIG_TABLE *arg4, NvU32 arg5, NvU32 *arg6, NvU32 *arg7); -NvU32 kceGetPce2lceConfigSize1_GA100(struct KernelCE *arg0); +NvU32 kceGetPce2lceConfigSize1_TU102(struct KernelCE *arg1); -NvU32 kceGetPce2lceConfigSize1_GA102(struct KernelCE *arg0); +NvU32 kceGetPce2lceConfigSize1_GA100(struct KernelCE *arg1); -NvU32 kceGetPce2lceConfigSize1_GH100(struct KernelCE *arg0); +NvU32 kceGetPce2lceConfigSize1_GA102(struct KernelCE *arg1); -static inline NvU32 kceGetPce2lceConfigSize1_DISPATCH(struct KernelCE *arg0) { - return arg0->__kceGetPce2lceConfigSize1__(arg0); -} +NvU32 kceGetPce2lceConfigSize1_GH100(struct KernelCE *arg1); -NV_STATUS kceGetMappings_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NVLINK_TOPOLOGY_PARAMS *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 *arg3); +NV_STATUS kceGetMappings_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NVLINK_TOPOLOGY_PARAMS *arg3, NvU32 *arg4, NvU32 *arg5, NvU32 *arg6); -NV_STATUS kceGetMappings_GH100(OBJGPU *pGpu, struct KernelCE *pCe, NVLINK_TOPOLOGY_PARAMS *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 *arg3); +NV_STATUS kceGetMappings_GH100(OBJGPU *pGpu, struct KernelCE *pCe, NVLINK_TOPOLOGY_PARAMS *arg3, NvU32 *arg4, NvU32 *arg5, NvU32 *arg6); -static inline NV_STATUS kceGetMappings_46f6a7(OBJGPU *pGpu, struct KernelCE *pCe, NVLINK_TOPOLOGY_PARAMS *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 *arg3) { +static inline NV_STATUS kceGetMappings_46f6a7(OBJGPU *pGpu, struct KernelCE *pCe, NVLINK_TOPOLOGY_PARAMS *arg3, NvU32 *arg4, NvU32 *arg5, NvU32 *arg6) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kceGetMappings_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe, NVLINK_TOPOLOGY_PARAMS *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 *arg3) { - return pCe->__kceGetMappings__(pGpu, pCe, arg0, arg1, arg2, arg3); -} - -NV_STATUS kceMapPceLceForC2C_GH100(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2); +NV_STATUS kceMapPceLceForC2C_GH100(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5); -static inline NV_STATUS kceMapPceLceForC2C_46f6a7(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2) { +static inline NV_STATUS kceMapPceLceForC2C_46f6a7(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kceMapPceLceForC2C_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2) { - return pKCe->__kceMapPceLceForC2C__(pGpu, pKCe, arg0, arg1, arg2); -} - -void kceMapPceLceForGRCE_GH100(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 *arg3, NvU32 arg4); +void kceMapPceLceForGRCE_GH100(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5, NvU32 *arg6, NvU32 arg7); -static inline void kceMapPceLceForGRCE_b3696a(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 *arg3, NvU32 arg4) { +static inline void kceMapPceLceForGRCE_b3696a(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5, NvU32 *arg6, NvU32 arg7) { return; } -static inline void kceMapPceLceForGRCE_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 *arg3, NvU32 arg4) { - pKCe->__kceMapPceLceForGRCE__(pGpu, pKCe, arg0, arg1, arg2, arg3, arg4); -} - -NV_STATUS kceMapPceLceForSysmemLinks_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 arg3); +NV_STATUS kceMapPceLceForSysmemLinks_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5, NvU32 arg6); -NV_STATUS kceMapPceLceForSysmemLinks_GA102(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 arg3); +NV_STATUS kceMapPceLceForSysmemLinks_GA102(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5, NvU32 arg6); -static inline NV_STATUS kceMapPceLceForSysmemLinks_46f6a7(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 arg3) { +static inline NV_STATUS kceMapPceLceForSysmemLinks_46f6a7(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5, NvU32 arg6) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kceMapPceLceForSysmemLinks_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 arg3) { - return pCe->__kceMapPceLceForSysmemLinks__(pGpu, pCe, arg0, arg1, arg2, arg3); -} - -NV_STATUS kceMapPceLceForNvlinkPeers_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2); +NV_STATUS kceMapPceLceForNvlinkPeers_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5); -NV_STATUS kceMapPceLceForNvlinkPeers_GH100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2); +NV_STATUS kceMapPceLceForNvlinkPeers_GH100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5); -static inline NV_STATUS kceMapPceLceForNvlinkPeers_46f6a7(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2) { +static inline NV_STATUS kceMapPceLceForNvlinkPeers_46f6a7(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kceMapPceLceForNvlinkPeers_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2) { - return pCe->__kceMapPceLceForNvlinkPeers__(pGpu, pCe, arg0, arg1, arg2); -} - NvU32 kceGetSysmemSupportedLceMask_GA100(OBJGPU *pGpu, struct KernelCE *pCe); NvU32 kceGetSysmemSupportedLceMask_GA102(OBJGPU *pGpu, struct KernelCE *pCe); @@ -525,34 +644,22 @@ static inline NvU32 kceGetSysmemSupportedLceMask_4a4dee(OBJGPU *pGpu, struct Ker return 0; } -static inline NvU32 kceGetSysmemSupportedLceMask_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe) { - return pCe->__kceGetSysmemSupportedLceMask__(pGpu, pCe); -} - -NV_STATUS kceMapAsyncLceDefault_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 arg3); +NV_STATUS kceMapAsyncLceDefault_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5, NvU32 arg6); -NV_STATUS kceMapAsyncLceDefault_GH100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 arg3); +NV_STATUS kceMapAsyncLceDefault_GH100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5, NvU32 arg6); -static inline NV_STATUS kceMapAsyncLceDefault_46f6a7(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 arg3) { +static inline NV_STATUS kceMapAsyncLceDefault_46f6a7(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5, NvU32 arg6) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kceMapAsyncLceDefault_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 arg3) { - return pCe->__kceMapAsyncLceDefault__(pGpu, pCe, arg0, arg1, arg2, arg3); -} +NvU32 kceGetNvlinkPeerSupportedLceMask_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 arg3); -NvU32 kceGetNvlinkPeerSupportedLceMask_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 arg0); +NvU32 kceGetNvlinkPeerSupportedLceMask_GA102(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 arg3); -NvU32 kceGetNvlinkPeerSupportedLceMask_GA102(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 arg0); - -static inline NvU32 kceGetNvlinkPeerSupportedLceMask_4a4dee(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 arg0) { +static inline NvU32 kceGetNvlinkPeerSupportedLceMask_4a4dee(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 arg3) { return 0; } -static inline NvU32 kceGetNvlinkPeerSupportedLceMask_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 arg0) { - return pCe->__kceGetNvlinkPeerSupportedLceMask__(pGpu, pCe, arg0); -} - NvU32 kceGetGrceSupportedLceMask_GA100(OBJGPU *pGpu, struct KernelCE *pCe); NvU32 kceGetGrceSupportedLceMask_GA102(OBJGPU *pGpu, struct KernelCE *pCe); @@ -561,10 +668,6 @@ static inline NvU32 kceGetGrceSupportedLceMask_4a4dee(OBJGPU *pGpu, struct Kerne return 0; } -static inline NvU32 kceGetGrceSupportedLceMask_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe) { - return pCe->__kceGetGrceSupportedLceMask__(pGpu, pCe); -} - NvBool kceIsGenXorHigherSupported_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 checkGen); NvBool kceIsGenXorHigherSupported_GH100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 checkGen); @@ -573,60 +676,12 @@ static inline NvBool kceIsGenXorHigherSupported_cbe027(OBJGPU *pGpu, struct Kern return ((NvBool)(0 == 0)); } -static inline NvBool kceIsGenXorHigherSupported_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 checkGen) { - return pCe->__kceIsGenXorHigherSupported__(pGpu, pCe, checkGen); -} - -void kceApplyGen4orHigherMapping_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 arg2, NvU32 arg3); +void kceApplyGen4orHigherMapping_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg3, NvU32 *arg4, NvU32 arg5, NvU32 arg6); -static inline void kceApplyGen4orHigherMapping_b3696a(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 arg2, NvU32 arg3) { +static inline void kceApplyGen4orHigherMapping_b3696a(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg3, NvU32 *arg4, NvU32 arg5, NvU32 arg6) { return; } -static inline void kceApplyGen4orHigherMapping_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 arg2, NvU32 arg3) { - pCe->__kceApplyGen4orHigherMapping__(pGpu, pCe, arg0, arg1, arg2, arg3); -} - -static inline NV_STATUS kceStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg0) { - return pEngstate->__kceStatePreLoad__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS kceStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg0) { - return pEngstate->__kceStatePostUnload__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS kceStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg0) { - return pEngstate->__kceStatePreUnload__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS kceStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate) { - return pEngstate->__kceStateInitUnlocked__(pGpu, pEngstate); -} - -static inline void kceInitMissing_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate) { - pEngstate->__kceInitMissing__(pGpu, pEngstate); -} - -static inline NV_STATUS kceStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate) { - return pEngstate->__kceStatePreInitLocked__(pGpu, pEngstate); -} - -static inline NV_STATUS kceStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate) { - return pEngstate->__kceStatePreInitUnlocked__(pGpu, pEngstate); -} - -static inline NvBool kceClearInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelCE *pIntrService, IntrServiceClearInterruptArguments *pParams) { - return pIntrService->__kceClearInterrupt__(pGpu, pIntrService, pParams); -} - -static inline NV_STATUS kceStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg0) { - return pEngstate->__kceStatePostLoad__(pGpu, pEngstate, arg0); -} - -static inline NvU32 kceServiceInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelCE *pIntrService, IntrServiceServiceInterruptArguments *pParams) { - return pIntrService->__kceServiceInterrupt__(pGpu, pIntrService, pParams); -} - NV_STATUS kceFindFirstInstance_IMPL(OBJGPU *pGpu, struct KernelCE **ppKCe); #define kceFindFirstInstance(pGpu, ppKCe) kceFindFirstInstance_IMPL(pGpu, ppKCe) @@ -689,15 +744,15 @@ static inline NV_STATUS kceFindShimOwner(OBJGPU *gpu, struct KernelCE *pKCe, str #define kceFindShimOwner(gpu, pKCe, ppKCe) kceFindShimOwner_IMPL(gpu, pKCe, ppKCe) #endif //__nvoc_kernel_ce_h_disabled -NV_STATUS kceGetCeFromNvlinkConfig_IMPL(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 arg0, NvU32 *arg1, NvU32 *arg2, NvU32 *arg3); +NV_STATUS kceGetCeFromNvlinkConfig_IMPL(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 arg3, NvU32 *arg4, NvU32 *arg5, NvU32 *arg6); #ifdef __nvoc_kernel_ce_h_disabled -static inline NV_STATUS kceGetCeFromNvlinkConfig(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 arg0, NvU32 *arg1, NvU32 *arg2, NvU32 *arg3) { +static inline NV_STATUS kceGetCeFromNvlinkConfig(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 arg3, NvU32 *arg4, NvU32 *arg5, NvU32 *arg6) { NV_ASSERT_FAILED_PRECOMP("KernelCE was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_ce_h_disabled -#define kceGetCeFromNvlinkConfig(pGpu, pKCe, arg0, arg1, arg2, arg3) kceGetCeFromNvlinkConfig_IMPL(pGpu, pKCe, arg0, arg1, arg2, arg3) +#define kceGetCeFromNvlinkConfig(pGpu, pKCe, arg3, arg4, arg5, arg6) kceGetCeFromNvlinkConfig_IMPL(pGpu, pKCe, arg3, arg4, arg5, arg6) #endif //__nvoc_kernel_ce_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_kernel_channel_group_api_nvoc.c b/src/nvidia/generated/g_kernel_channel_group_api_nvoc.c index d2d12bba0f..5abe5588b3 100644 --- a/src/nvidia/generated/g_kernel_channel_group_api_nvoc.c +++ b/src/nvidia/generated/g_kernel_channel_group_api_nvoc.c @@ -93,106 +93,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelChannelGroupApi = /*pExportInfo=*/ &__nvoc_export_info_KernelChannelGroupApi }; -static NvBool __nvoc_thunk_KernelChannelGroupApi_resCanCopy(struct RsResource *pKernelChannelGroupApi) { - return kchangrpapiCanCopy((struct KernelChannelGroupApi *)(((unsigned char *)pKernelChannelGroupApi) - __nvoc_rtti_KernelChannelGroupApi_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_KernelChannelGroupApi_gpuresControl(struct GpuResource *pKernelChannelGroupApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return kchangrpapiControl((struct KernelChannelGroupApi *)(((unsigned char *)pKernelChannelGroupApi) - __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_GpuResource_kchangrpapiShareCallback(struct KernelChannelGroupApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_kchangrpapiCheckMemInterUnmap(struct KernelChannelGroupApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RsResource_kchangrpapiMapTo(struct KernelChannelGroupApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kchangrpapiGetMapAddrSpace(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} - -static NvU32 __nvoc_thunk_RsResource_kchangrpapiGetRefCount(struct KernelChannelGroupApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_kchangrpapiAddAdditionalDependants(struct RsClient *pClient, struct KernelChannelGroupApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_kchangrpapiControl_Prologue(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kchangrpapiGetRegBaseOffsetAndSize(struct KernelChannelGroupApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), pGpu, pOffset, pSize); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kchangrpapiInternalControlForward(struct KernelChannelGroupApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), command, pParams, size); -} - -static NV_STATUS __nvoc_thunk_RsResource_kchangrpapiUnmapFrom(struct KernelChannelGroupApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_kchangrpapiControl_Epilogue(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), pCallContext, pParams); -} - -static NvHandle __nvoc_thunk_GpuResource_kchangrpapiGetInternalObjectHandle(struct KernelChannelGroupApi *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kchangrpapiUnmap(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_kchangrpapiGetMemInterMapParams(struct KernelChannelGroupApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_kchangrpapiGetMemoryMappingDescriptor(struct KernelChannelGroupApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_kchangrpapiControlFilter(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_kchangrpapiControlSerialization_Prologue(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_kchangrpapiIsPartialUnmapSupported(struct KernelChannelGroupApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_kchangrpapiPreDestruct(struct KernelChannelGroupApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_kchangrpapiIsDuplicate(struct KernelChannelGroupApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_kchangrpapiControlSerialization_Epilogue(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kchangrpapiMap(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_kchangrpapiAccessCallback(struct KernelChannelGroupApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -200,12 +100,12 @@ static NvBool __nvoc_thunk_RmResource_kchangrpapiAccessCallback(struct KernelCha static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelChannelGroupApi[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchangrpapiCtrlSetTpcPartitionMode_a094e1, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x900101u, /*paramSize=*/ sizeof(NV0090_CTRL_TPC_PARTITION_MODE_PARAMS), @@ -215,12 +115,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchangrpapiCtrlGetTpcPartitionMode_a094e1, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x900103u, /*paramSize=*/ sizeof(NV0090_CTRL_TPC_PARTITION_MODE_PARAMS), @@ -230,12 +130,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchangrpapiCtrlGetMMUDebugMode_a094e1, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x900105u, /*paramSize=*/ sizeof(NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS), @@ -245,12 +145,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchangrpapiCtrlProgramVidmemPromote_a094e1, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x900107u, /*paramSize=*/ sizeof(NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS), @@ -260,12 +160,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchangrpapiCtrlCmdGpFifoSchedule_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa06c0101u, /*paramSize=*/ sizeof(NVA06C_CTRL_GPFIFO_SCHEDULE_PARAMS), @@ -275,12 +175,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [5] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchangrpapiCtrlCmdBind_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa06c0102u, /*paramSize=*/ sizeof(NVA06C_CTRL_BIND_PARAMS), @@ -290,12 +190,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [6] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchangrpapiCtrlCmdSetTimeslice_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa06c0103u, /*paramSize=*/ sizeof(NVA06C_CTRL_TIMESLICE_PARAMS), @@ -305,12 +205,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [7] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchangrpapiCtrlCmdGetTimeslice_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa06c0104u, /*paramSize=*/ sizeof(NVA06C_CTRL_TIMESLICE_PARAMS), @@ -320,12 +220,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [8] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchangrpapiCtrlCmdPreempt_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0xa06c0105u, /*paramSize=*/ sizeof(NVA06C_CTRL_PREEMPT_PARAMS), @@ -335,12 +235,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [9] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchangrpapiCtrlCmdGetInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa06c0106u, /*paramSize=*/ sizeof(NVA06C_CTRL_GET_INFO_PARAMS), @@ -350,12 +250,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [10] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x110u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x28u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchangrpapiCtrlCmdSetInterleaveLevel_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x110u) - /*flags=*/ 0x110u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x28u) + /*flags=*/ 0x28u, /*accessRight=*/0x2u, /*methodId=*/ 0xa06c0107u, /*paramSize=*/ sizeof(NVA06C_CTRL_INTERLEAVE_LEVEL_PARAMS), @@ -365,12 +265,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [11] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchangrpapiCtrlCmdProgramVidmemPromote_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0xa06c0109u, /*paramSize=*/ sizeof(NVA06C_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS), @@ -380,12 +280,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [12] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x142200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14240u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchangrpapiCtrlCmdInternalPromoteFaultMethodBuffers_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x142200u) - /*flags=*/ 0x142200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14240u) + /*flags=*/ 0x14240u, /*accessRight=*/0x0u, /*methodId=*/ 0xa06c010au, /*paramSize=*/ sizeof(NVA06C_CTRL_INTERNAL_PROMOTE_FAULT_METHOD_BUFFERS_PARAMS), @@ -395,12 +295,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [13] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchangrpapiCtrlCmdMakeRealtime_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x2u, /*methodId=*/ 0xa06c0110u, /*paramSize=*/ sizeof(NVA06C_CTRL_MAKE_REALTIME_PARAMS), @@ -410,12 +310,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [14] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2610u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchangrpapiCtrlCmdInternalGpFifoSchedule_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2610u) - /*flags=*/ 0x2610u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c8u) + /*flags=*/ 0x2c8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa06c0201u, /*paramSize=*/ sizeof(NVA06C_CTRL_GPFIFO_SCHEDULE_PARAMS), @@ -425,12 +325,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [15] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2610u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchangrpapiCtrlCmdInternalSetTimeslice_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2610u) - /*flags=*/ 0x2610u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c8u) + /*flags=*/ 0x2c8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa06c0202u, /*paramSize=*/ sizeof(NVA06C_CTRL_TIMESLICE_PARAMS), @@ -442,6 +342,137 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh }; +// 2 down-thunk(s) defined to bridge methods in KernelChannelGroupApi from superclasses + +// kchangrpapiCanCopy: virtual override (res) base (gpures) +static NvBool __nvoc_down_thunk_KernelChannelGroupApi_resCanCopy(struct RsResource *pKernelChannelGroupApi) { + return kchangrpapiCanCopy((struct KernelChannelGroupApi *)(((unsigned char *) pKernelChannelGroupApi) - __nvoc_rtti_KernelChannelGroupApi_RsResource.offset)); +} + +// kchangrpapiControl: virtual override (res) base (gpures) +static NV_STATUS __nvoc_down_thunk_KernelChannelGroupApi_gpuresControl(struct GpuResource *pKernelChannelGroupApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return kchangrpapiControl((struct KernelChannelGroupApi *)(((unsigned char *) pKernelChannelGroupApi) - __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), pCallContext, pParams); +} + + +// 23 up-thunk(s) defined to bridge methods in KernelChannelGroupApi to superclasses + +// kchangrpapiMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kchangrpapiMap(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// kchangrpapiUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kchangrpapiUnmap(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), pCallContext, pCpuMapping); +} + +// kchangrpapiShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_kchangrpapiShareCallback(struct KernelChannelGroupApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// kchangrpapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kchangrpapiGetRegBaseOffsetAndSize(struct KernelChannelGroupApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), pGpu, pOffset, pSize); +} + +// kchangrpapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kchangrpapiGetMapAddrSpace(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + +// kchangrpapiInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kchangrpapiInternalControlForward(struct KernelChannelGroupApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), command, pParams, size); +} + +// kchangrpapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_kchangrpapiGetInternalObjectHandle(struct KernelChannelGroupApi *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset)); +} + +// kchangrpapiAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_kchangrpapiAccessCallback(struct KernelChannelGroupApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// kchangrpapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kchangrpapiGetMemInterMapParams(struct KernelChannelGroupApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), pParams); +} + +// kchangrpapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kchangrpapiCheckMemInterUnmap(struct KernelChannelGroupApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), bSubdeviceHandleProvided); +} + +// kchangrpapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kchangrpapiGetMemoryMappingDescriptor(struct KernelChannelGroupApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), ppMemDesc); +} + +// kchangrpapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kchangrpapiControlSerialization_Prologue(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), pCallContext, pParams); +} + +// kchangrpapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_kchangrpapiControlSerialization_Epilogue(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), pCallContext, pParams); +} + +// kchangrpapiControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kchangrpapiControl_Prologue(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), pCallContext, pParams); +} + +// kchangrpapiControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_kchangrpapiControl_Epilogue(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), pCallContext, pParams); +} + +// kchangrpapiIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kchangrpapiIsDuplicate(struct KernelChannelGroupApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset), hMemory, pDuplicate); +} + +// kchangrpapiPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_kchangrpapiPreDestruct(struct KernelChannelGroupApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset)); +} + +// kchangrpapiControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kchangrpapiControlFilter(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset), pCallContext, pParams); +} + +// kchangrpapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_kchangrpapiIsPartialUnmapSupported(struct KernelChannelGroupApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset)); +} + +// kchangrpapiMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kchangrpapiMapTo(struct KernelChannelGroupApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset), pParams); +} + +// kchangrpapiUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kchangrpapiUnmapFrom(struct KernelChannelGroupApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset), pParams); +} + +// kchangrpapiGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_kchangrpapiGetRefCount(struct KernelChannelGroupApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset)); +} + +// kchangrpapiAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_kchangrpapiAddAdditionalDependants(struct RsClient *pClient, struct KernelChannelGroupApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset), pReference); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelChannelGroupApi = { /*numEntries=*/ 16, @@ -478,131 +509,173 @@ NV_STATUS __nvoc_ctor_KernelChannelGroupApi(KernelChannelGroupApi *pThis, struct return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelChannelGroupApi_1(KernelChannelGroupApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // kchangrpapiCanCopy -- virtual override (res) base (gpures) pThis->__kchangrpapiCanCopy__ = &kchangrpapiCanCopy_IMPL; + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_KernelChannelGroupApi_resCanCopy; + // kchangrpapiControl -- virtual override (res) base (gpures) pThis->__kchangrpapiControl__ = &kchangrpapiControl_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresControl__ = &__nvoc_down_thunk_KernelChannelGroupApi_gpuresControl; - pThis->__kchangrpapiSetLegacyMode__ = &kchangrpapiSetLegacyMode_IMPL; - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchangrpapiCtrlCmdGpFifoSchedule -- exported (id=0xa06c0101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchangrpapiCtrlCmdGpFifoSchedule__ = &kchangrpapiCtrlCmdGpFifoSchedule_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchangrpapiCtrlCmdBind -- exported (id=0xa06c0102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchangrpapiCtrlCmdBind__ = &kchangrpapiCtrlCmdBind_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchangrpapiCtrlCmdSetTimeslice -- exported (id=0xa06c0103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchangrpapiCtrlCmdSetTimeslice__ = &kchangrpapiCtrlCmdSetTimeslice_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchangrpapiCtrlCmdGetTimeslice -- exported (id=0xa06c0104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchangrpapiCtrlCmdGetTimeslice__ = &kchangrpapiCtrlCmdGetTimeslice_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // kchangrpapiCtrlCmdPreempt -- exported (id=0xa06c0105) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__kchangrpapiCtrlCmdPreempt__ = &kchangrpapiCtrlCmdPreempt_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchangrpapiCtrlCmdGetInfo -- exported (id=0xa06c0106) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchangrpapiCtrlCmdGetInfo__ = &kchangrpapiCtrlCmdGetInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x110u) + // kchangrpapiCtrlCmdSetInterleaveLevel -- exported (id=0xa06c0107) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x28u) pThis->__kchangrpapiCtrlCmdSetInterleaveLevel__ = &kchangrpapiCtrlCmdSetInterleaveLevel_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // kchangrpapiCtrlCmdProgramVidmemPromote -- exported (id=0xa06c0109) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__kchangrpapiCtrlCmdProgramVidmemPromote__ = &kchangrpapiCtrlCmdProgramVidmemPromote_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x142200u) + // kchangrpapiCtrlCmdInternalPromoteFaultMethodBuffers -- exported (id=0xa06c010a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14240u) pThis->__kchangrpapiCtrlCmdInternalPromoteFaultMethodBuffers__ = &kchangrpapiCtrlCmdInternalPromoteFaultMethodBuffers_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // kchangrpapiCtrlCmdMakeRealtime -- exported (id=0xa06c0110) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__kchangrpapiCtrlCmdMakeRealtime__ = &kchangrpapiCtrlCmdMakeRealtime_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2610u) + // kchangrpapiCtrlCmdInternalGpFifoSchedule -- exported (id=0xa06c0201) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c8u) pThis->__kchangrpapiCtrlCmdInternalGpFifoSchedule__ = &kchangrpapiCtrlCmdInternalGpFifoSchedule_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2610u) + // kchangrpapiCtrlCmdInternalSetTimeslice -- exported (id=0xa06c0202) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c8u) pThis->__kchangrpapiCtrlCmdInternalSetTimeslice__ = &kchangrpapiCtrlCmdInternalSetTimeslice_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchangrpapiCtrlGetTpcPartitionMode -- inline exported (id=0x900103) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchangrpapiCtrlGetTpcPartitionMode__ = &kchangrpapiCtrlGetTpcPartitionMode_a094e1; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchangrpapiCtrlSetTpcPartitionMode -- inline exported (id=0x900101) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchangrpapiCtrlSetTpcPartitionMode__ = &kchangrpapiCtrlSetTpcPartitionMode_a094e1; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchangrpapiCtrlGetMMUDebugMode -- inline exported (id=0x900105) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchangrpapiCtrlGetMMUDebugMode__ = &kchangrpapiCtrlGetMMUDebugMode_a094e1; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchangrpapiCtrlProgramVidmemPromote -- inline exported (id=0x900107) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchangrpapiCtrlProgramVidmemPromote__ = &kchangrpapiCtrlProgramVidmemPromote_a094e1; #endif - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_KernelChannelGroupApi_resCanCopy; + // kchangrpapiMap -- virtual inherited (gpures) base (gpures) + pThis->__kchangrpapiMap__ = &__nvoc_up_thunk_GpuResource_kchangrpapiMap; - pThis->__nvoc_base_GpuResource.__gpuresControl__ = &__nvoc_thunk_KernelChannelGroupApi_gpuresControl; + // kchangrpapiUnmap -- virtual inherited (gpures) base (gpures) + pThis->__kchangrpapiUnmap__ = &__nvoc_up_thunk_GpuResource_kchangrpapiUnmap; - pThis->__kchangrpapiShareCallback__ = &__nvoc_thunk_GpuResource_kchangrpapiShareCallback; + // kchangrpapiShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__kchangrpapiShareCallback__ = &__nvoc_up_thunk_GpuResource_kchangrpapiShareCallback; - pThis->__kchangrpapiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_kchangrpapiCheckMemInterUnmap; + // kchangrpapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__kchangrpapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kchangrpapiGetRegBaseOffsetAndSize; - pThis->__kchangrpapiMapTo__ = &__nvoc_thunk_RsResource_kchangrpapiMapTo; + // kchangrpapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__kchangrpapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_kchangrpapiGetMapAddrSpace; - pThis->__kchangrpapiGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_kchangrpapiGetMapAddrSpace; + // kchangrpapiInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__kchangrpapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kchangrpapiInternalControlForward; - pThis->__kchangrpapiGetRefCount__ = &__nvoc_thunk_RsResource_kchangrpapiGetRefCount; + // kchangrpapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__kchangrpapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kchangrpapiGetInternalObjectHandle; - pThis->__kchangrpapiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_kchangrpapiAddAdditionalDependants; + // kchangrpapiAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__kchangrpapiAccessCallback__ = &__nvoc_up_thunk_RmResource_kchangrpapiAccessCallback; - pThis->__kchangrpapiControl_Prologue__ = &__nvoc_thunk_RmResource_kchangrpapiControl_Prologue; + // kchangrpapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__kchangrpapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_kchangrpapiGetMemInterMapParams; - pThis->__kchangrpapiGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_kchangrpapiGetRegBaseOffsetAndSize; + // kchangrpapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__kchangrpapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_kchangrpapiCheckMemInterUnmap; - pThis->__kchangrpapiInternalControlForward__ = &__nvoc_thunk_GpuResource_kchangrpapiInternalControlForward; + // kchangrpapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__kchangrpapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kchangrpapiGetMemoryMappingDescriptor; - pThis->__kchangrpapiUnmapFrom__ = &__nvoc_thunk_RsResource_kchangrpapiUnmapFrom; + // kchangrpapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__kchangrpapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kchangrpapiControlSerialization_Prologue; - pThis->__kchangrpapiControl_Epilogue__ = &__nvoc_thunk_RmResource_kchangrpapiControl_Epilogue; + // kchangrpapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__kchangrpapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kchangrpapiControlSerialization_Epilogue; - pThis->__kchangrpapiGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_kchangrpapiGetInternalObjectHandle; + // kchangrpapiControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__kchangrpapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_kchangrpapiControl_Prologue; - pThis->__kchangrpapiUnmap__ = &__nvoc_thunk_GpuResource_kchangrpapiUnmap; + // kchangrpapiControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__kchangrpapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kchangrpapiControl_Epilogue; - pThis->__kchangrpapiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_kchangrpapiGetMemInterMapParams; + // kchangrpapiIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__kchangrpapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_kchangrpapiIsDuplicate; - pThis->__kchangrpapiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_kchangrpapiGetMemoryMappingDescriptor; + // kchangrpapiPreDestruct -- virtual inherited (res) base (gpures) + pThis->__kchangrpapiPreDestruct__ = &__nvoc_up_thunk_RsResource_kchangrpapiPreDestruct; - pThis->__kchangrpapiControlFilter__ = &__nvoc_thunk_RsResource_kchangrpapiControlFilter; + // kchangrpapiControlFilter -- virtual inherited (res) base (gpures) + pThis->__kchangrpapiControlFilter__ = &__nvoc_up_thunk_RsResource_kchangrpapiControlFilter; - pThis->__kchangrpapiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_kchangrpapiControlSerialization_Prologue; + // kchangrpapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__kchangrpapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kchangrpapiIsPartialUnmapSupported; - pThis->__kchangrpapiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_kchangrpapiIsPartialUnmapSupported; + // kchangrpapiMapTo -- virtual inherited (res) base (gpures) + pThis->__kchangrpapiMapTo__ = &__nvoc_up_thunk_RsResource_kchangrpapiMapTo; - pThis->__kchangrpapiPreDestruct__ = &__nvoc_thunk_RsResource_kchangrpapiPreDestruct; + // kchangrpapiUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__kchangrpapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_kchangrpapiUnmapFrom; - pThis->__kchangrpapiIsDuplicate__ = &__nvoc_thunk_RsResource_kchangrpapiIsDuplicate; + // kchangrpapiGetRefCount -- virtual inherited (res) base (gpures) + pThis->__kchangrpapiGetRefCount__ = &__nvoc_up_thunk_RsResource_kchangrpapiGetRefCount; - pThis->__kchangrpapiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_kchangrpapiControlSerialization_Epilogue; + // kchangrpapiAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__kchangrpapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kchangrpapiAddAdditionalDependants; +} // End __nvoc_init_funcTable_KernelChannelGroupApi_1 with approximately 43 basic block(s). - pThis->__kchangrpapiMap__ = &__nvoc_thunk_GpuResource_kchangrpapiMap; - - pThis->__kchangrpapiAccessCallback__ = &__nvoc_thunk_RmResource_kchangrpapiAccessCallback; -} +// Initialize vtable(s) for 41 virtual method(s). void __nvoc_init_funcTable_KernelChannelGroupApi(KernelChannelGroupApi *pThis) { + + // Initialize vtable(s) with 41 per-object function pointer(s). __nvoc_init_funcTable_KernelChannelGroupApi_1(pThis); } diff --git a/src/nvidia/generated/g_kernel_channel_group_api_nvoc.h b/src/nvidia/generated/g_kernel_channel_group_api_nvoc.h index 8953a6aa41..52bdc560d5 100644 --- a/src/nvidia/generated/g_kernel_channel_group_api_nvoc.h +++ b/src/nvidia/generated/g_kernel_channel_group_api_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_CHANNEL_GROUP_API_NVOC_H_ #define _G_KERNEL_CHANNEL_GROUP_API_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_channel_group_api_nvoc.h" #ifndef KERNEL_CHANNEL_GROUP_API_H @@ -44,6 +52,7 @@ extern "C" { #include "nvoc/prelude.h" #include "resserv/resserv.h" + struct OBJGPU; #ifndef __NVOC_CLASS_OBJGPU_TYPEDEF__ @@ -56,6 +65,7 @@ typedef struct OBJGPU OBJGPU; #endif /* __nvoc_class_id_OBJGPU */ + struct KernelChannelGroup; #ifndef __NVOC_CLASS_KernelChannelGroup_TYPEDEF__ @@ -79,57 +89,67 @@ typedef struct KernelChannelGroup KernelChannelGroup; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelChannelGroupApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct KernelChannelGroupApi *__nvoc_pbase_KernelChannelGroupApi; - NvBool (*__kchangrpapiCanCopy__)(struct KernelChannelGroupApi *); - NV_STATUS (*__kchangrpapiControl__)(struct KernelChannelGroupApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kchangrpapiSetLegacyMode__)(struct KernelChannelGroupApi *, struct OBJGPU *, struct KernelFifo *, NvHandle); - NV_STATUS (*__kchangrpapiCtrlCmdGpFifoSchedule__)(struct KernelChannelGroupApi *, NVA06C_CTRL_GPFIFO_SCHEDULE_PARAMS *); - NV_STATUS (*__kchangrpapiCtrlCmdBind__)(struct KernelChannelGroupApi *, NVA06C_CTRL_BIND_PARAMS *); - NV_STATUS (*__kchangrpapiCtrlCmdSetTimeslice__)(struct KernelChannelGroupApi *, NVA06C_CTRL_TIMESLICE_PARAMS *); - NV_STATUS (*__kchangrpapiCtrlCmdGetTimeslice__)(struct KernelChannelGroupApi *, NVA06C_CTRL_TIMESLICE_PARAMS *); - NV_STATUS (*__kchangrpapiCtrlCmdPreempt__)(struct KernelChannelGroupApi *, NVA06C_CTRL_PREEMPT_PARAMS *); - NV_STATUS (*__kchangrpapiCtrlCmdGetInfo__)(struct KernelChannelGroupApi *, NVA06C_CTRL_GET_INFO_PARAMS *); - NV_STATUS (*__kchangrpapiCtrlCmdSetInterleaveLevel__)(struct KernelChannelGroupApi *, NVA06C_CTRL_INTERLEAVE_LEVEL_PARAMS *); - NV_STATUS (*__kchangrpapiCtrlCmdProgramVidmemPromote__)(struct KernelChannelGroupApi *, NVA06C_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *); - NV_STATUS (*__kchangrpapiCtrlCmdInternalPromoteFaultMethodBuffers__)(struct KernelChannelGroupApi *, NVA06C_CTRL_INTERNAL_PROMOTE_FAULT_METHOD_BUFFERS_PARAMS *); - NV_STATUS (*__kchangrpapiCtrlCmdMakeRealtime__)(struct KernelChannelGroupApi *, NVA06C_CTRL_MAKE_REALTIME_PARAMS *); - NV_STATUS (*__kchangrpapiCtrlCmdInternalGpFifoSchedule__)(struct KernelChannelGroupApi *, NVA06C_CTRL_GPFIFO_SCHEDULE_PARAMS *); - NV_STATUS (*__kchangrpapiCtrlCmdInternalSetTimeslice__)(struct KernelChannelGroupApi *, NVA06C_CTRL_TIMESLICE_PARAMS *); - NV_STATUS (*__kchangrpapiCtrlGetTpcPartitionMode__)(struct KernelChannelGroupApi *, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); - NV_STATUS (*__kchangrpapiCtrlSetTpcPartitionMode__)(struct KernelChannelGroupApi *, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); - NV_STATUS (*__kchangrpapiCtrlGetMMUDebugMode__)(struct KernelChannelGroupApi *, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *); - NV_STATUS (*__kchangrpapiCtrlProgramVidmemPromote__)(struct KernelChannelGroupApi *, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *); - NvBool (*__kchangrpapiShareCallback__)(struct KernelChannelGroupApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__kchangrpapiCheckMemInterUnmap__)(struct KernelChannelGroupApi *, NvBool); - NV_STATUS (*__kchangrpapiMapTo__)(struct KernelChannelGroupApi *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__kchangrpapiGetMapAddrSpace__)(struct KernelChannelGroupApi *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__kchangrpapiGetRefCount__)(struct KernelChannelGroupApi *); - void (*__kchangrpapiAddAdditionalDependants__)(struct RsClient *, struct KernelChannelGroupApi *, RsResourceRef *); - NV_STATUS (*__kchangrpapiControl_Prologue__)(struct KernelChannelGroupApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kchangrpapiGetRegBaseOffsetAndSize__)(struct KernelChannelGroupApi *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__kchangrpapiInternalControlForward__)(struct KernelChannelGroupApi *, NvU32, void *, NvU32); - NV_STATUS (*__kchangrpapiUnmapFrom__)(struct KernelChannelGroupApi *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__kchangrpapiControl_Epilogue__)(struct KernelChannelGroupApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__kchangrpapiGetInternalObjectHandle__)(struct KernelChannelGroupApi *); - NV_STATUS (*__kchangrpapiUnmap__)(struct KernelChannelGroupApi *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__kchangrpapiGetMemInterMapParams__)(struct KernelChannelGroupApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__kchangrpapiGetMemoryMappingDescriptor__)(struct KernelChannelGroupApi *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__kchangrpapiControlFilter__)(struct KernelChannelGroupApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kchangrpapiControlSerialization_Prologue__)(struct KernelChannelGroupApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__kchangrpapiIsPartialUnmapSupported__)(struct KernelChannelGroupApi *); - void (*__kchangrpapiPreDestruct__)(struct KernelChannelGroupApi *); - NV_STATUS (*__kchangrpapiIsDuplicate__)(struct KernelChannelGroupApi *, NvHandle, NvBool *); - void (*__kchangrpapiControlSerialization_Epilogue__)(struct KernelChannelGroupApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kchangrpapiMap__)(struct KernelChannelGroupApi *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__kchangrpapiAccessCallback__)(struct KernelChannelGroupApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct KernelChannelGroupApi *__nvoc_pbase_KernelChannelGroupApi; // kchangrpapi + + // Vtable with 41 per-object function pointers + NvBool (*__kchangrpapiCanCopy__)(struct KernelChannelGroupApi * /*this*/); // virtual override (res) base (gpures) + NV_STATUS (*__kchangrpapiControl__)(struct KernelChannelGroupApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) + NV_STATUS (*__kchangrpapiCtrlCmdGpFifoSchedule__)(struct KernelChannelGroupApi * /*this*/, NVA06C_CTRL_GPFIFO_SCHEDULE_PARAMS *); // exported (id=0xa06c0101) + NV_STATUS (*__kchangrpapiCtrlCmdBind__)(struct KernelChannelGroupApi * /*this*/, NVA06C_CTRL_BIND_PARAMS *); // exported (id=0xa06c0102) + NV_STATUS (*__kchangrpapiCtrlCmdSetTimeslice__)(struct KernelChannelGroupApi * /*this*/, NVA06C_CTRL_TIMESLICE_PARAMS *); // exported (id=0xa06c0103) + NV_STATUS (*__kchangrpapiCtrlCmdGetTimeslice__)(struct KernelChannelGroupApi * /*this*/, NVA06C_CTRL_TIMESLICE_PARAMS *); // exported (id=0xa06c0104) + NV_STATUS (*__kchangrpapiCtrlCmdPreempt__)(struct KernelChannelGroupApi * /*this*/, NVA06C_CTRL_PREEMPT_PARAMS *); // exported (id=0xa06c0105) + NV_STATUS (*__kchangrpapiCtrlCmdGetInfo__)(struct KernelChannelGroupApi * /*this*/, NVA06C_CTRL_GET_INFO_PARAMS *); // exported (id=0xa06c0106) + NV_STATUS (*__kchangrpapiCtrlCmdSetInterleaveLevel__)(struct KernelChannelGroupApi * /*this*/, NVA06C_CTRL_INTERLEAVE_LEVEL_PARAMS *); // exported (id=0xa06c0107) + NV_STATUS (*__kchangrpapiCtrlCmdProgramVidmemPromote__)(struct KernelChannelGroupApi * /*this*/, NVA06C_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *); // exported (id=0xa06c0109) + NV_STATUS (*__kchangrpapiCtrlCmdInternalPromoteFaultMethodBuffers__)(struct KernelChannelGroupApi * /*this*/, NVA06C_CTRL_INTERNAL_PROMOTE_FAULT_METHOD_BUFFERS_PARAMS *); // exported (id=0xa06c010a) + NV_STATUS (*__kchangrpapiCtrlCmdMakeRealtime__)(struct KernelChannelGroupApi * /*this*/, NVA06C_CTRL_MAKE_REALTIME_PARAMS *); // exported (id=0xa06c0110) + NV_STATUS (*__kchangrpapiCtrlCmdInternalGpFifoSchedule__)(struct KernelChannelGroupApi * /*this*/, NVA06C_CTRL_GPFIFO_SCHEDULE_PARAMS *); // exported (id=0xa06c0201) + NV_STATUS (*__kchangrpapiCtrlCmdInternalSetTimeslice__)(struct KernelChannelGroupApi * /*this*/, NVA06C_CTRL_TIMESLICE_PARAMS *); // exported (id=0xa06c0202) + NV_STATUS (*__kchangrpapiCtrlGetTpcPartitionMode__)(struct KernelChannelGroupApi * /*this*/, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); // inline exported (id=0x900103) body + NV_STATUS (*__kchangrpapiCtrlSetTpcPartitionMode__)(struct KernelChannelGroupApi * /*this*/, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); // inline exported (id=0x900101) body + NV_STATUS (*__kchangrpapiCtrlGetMMUDebugMode__)(struct KernelChannelGroupApi * /*this*/, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *); // inline exported (id=0x900105) body + NV_STATUS (*__kchangrpapiCtrlProgramVidmemPromote__)(struct KernelChannelGroupApi * /*this*/, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *); // inline exported (id=0x900107) body + NV_STATUS (*__kchangrpapiMap__)(struct KernelChannelGroupApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kchangrpapiUnmap__)(struct KernelChannelGroupApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__kchangrpapiShareCallback__)(struct KernelChannelGroupApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kchangrpapiGetRegBaseOffsetAndSize__)(struct KernelChannelGroupApi * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kchangrpapiGetMapAddrSpace__)(struct KernelChannelGroupApi * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kchangrpapiInternalControlForward__)(struct KernelChannelGroupApi * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__kchangrpapiGetInternalObjectHandle__)(struct KernelChannelGroupApi * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__kchangrpapiAccessCallback__)(struct KernelChannelGroupApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kchangrpapiGetMemInterMapParams__)(struct KernelChannelGroupApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kchangrpapiCheckMemInterUnmap__)(struct KernelChannelGroupApi * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kchangrpapiGetMemoryMappingDescriptor__)(struct KernelChannelGroupApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kchangrpapiControlSerialization_Prologue__)(struct KernelChannelGroupApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__kchangrpapiControlSerialization_Epilogue__)(struct KernelChannelGroupApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kchangrpapiControl_Prologue__)(struct KernelChannelGroupApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__kchangrpapiControl_Epilogue__)(struct KernelChannelGroupApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kchangrpapiIsDuplicate__)(struct KernelChannelGroupApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__kchangrpapiPreDestruct__)(struct KernelChannelGroupApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__kchangrpapiControlFilter__)(struct KernelChannelGroupApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__kchangrpapiIsPartialUnmapSupported__)(struct KernelChannelGroupApi * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__kchangrpapiMapTo__)(struct KernelChannelGroupApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__kchangrpapiUnmapFrom__)(struct KernelChannelGroupApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__kchangrpapiGetRefCount__)(struct KernelChannelGroupApi * /*this*/); // virtual inherited (res) base (gpures) + void (*__kchangrpapiAddAdditionalDependants__)(struct RsClient *, struct KernelChannelGroupApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members struct KernelChannelGroup *pKernelChannelGroup; NvHandle hErrorContext; NvHandle hEccErrorContext; @@ -148,6 +168,7 @@ typedef struct KernelChannelGroupApi KernelChannelGroupApi; #define __nvoc_class_id_KernelChannelGroupApi 0x2b5b80 #endif /* __nvoc_class_id_KernelChannelGroupApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelChannelGroupApi; #define __staticCast_KernelChannelGroupApi(pThis) \ @@ -160,267 +181,304 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelChannelGroupApi; ((KernelChannelGroupApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelChannelGroupApi))) #endif //__nvoc_kernel_channel_group_api_h_disabled - NV_STATUS __nvoc_objCreateDynamic_KernelChannelGroupApi(KernelChannelGroupApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_KernelChannelGroupApi(KernelChannelGroupApi**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_KernelChannelGroupApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_KernelChannelGroupApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define kchangrpapiCanCopy_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiCanCopy__ #define kchangrpapiCanCopy(pKernelChannelGroupApi) kchangrpapiCanCopy_DISPATCH(pKernelChannelGroupApi) +#define kchangrpapiControl_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiControl__ #define kchangrpapiControl(pKernelChannelGroupApi, pCallContext, pParams) kchangrpapiControl_DISPATCH(pKernelChannelGroupApi, pCallContext, pParams) -#define kchangrpapiSetLegacyMode(pKernelChannelGroupApi, pGpu, pKernelFifo, hClient) kchangrpapiSetLegacyMode_DISPATCH(pKernelChannelGroupApi, pGpu, pKernelFifo, hClient) +#define kchangrpapiCtrlCmdGpFifoSchedule_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiCtrlCmdGpFifoSchedule__ #define kchangrpapiCtrlCmdGpFifoSchedule(pKernelChannelGroupApi, pSchedParams) kchangrpapiCtrlCmdGpFifoSchedule_DISPATCH(pKernelChannelGroupApi, pSchedParams) +#define kchangrpapiCtrlCmdBind_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiCtrlCmdBind__ #define kchangrpapiCtrlCmdBind(pKernelChannelGroupApi, pParams) kchangrpapiCtrlCmdBind_DISPATCH(pKernelChannelGroupApi, pParams) +#define kchangrpapiCtrlCmdSetTimeslice_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiCtrlCmdSetTimeslice__ #define kchangrpapiCtrlCmdSetTimeslice(pKernelChannelGroupApi, pTsParams) kchangrpapiCtrlCmdSetTimeslice_DISPATCH(pKernelChannelGroupApi, pTsParams) +#define kchangrpapiCtrlCmdGetTimeslice_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiCtrlCmdGetTimeslice__ #define kchangrpapiCtrlCmdGetTimeslice(pKernelChannelGroupApi, pTsParams) kchangrpapiCtrlCmdGetTimeslice_DISPATCH(pKernelChannelGroupApi, pTsParams) +#define kchangrpapiCtrlCmdPreempt_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiCtrlCmdPreempt__ #define kchangrpapiCtrlCmdPreempt(pKernelChannelGroupApi, pPreemptParams) kchangrpapiCtrlCmdPreempt_DISPATCH(pKernelChannelGroupApi, pPreemptParams) +#define kchangrpapiCtrlCmdGetInfo_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiCtrlCmdGetInfo__ #define kchangrpapiCtrlCmdGetInfo(pKernelChannelGroupApi, pParams) kchangrpapiCtrlCmdGetInfo_DISPATCH(pKernelChannelGroupApi, pParams) +#define kchangrpapiCtrlCmdSetInterleaveLevel_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiCtrlCmdSetInterleaveLevel__ #define kchangrpapiCtrlCmdSetInterleaveLevel(pKernelChannelGroupApi, pParams) kchangrpapiCtrlCmdSetInterleaveLevel_DISPATCH(pKernelChannelGroupApi, pParams) +#define kchangrpapiCtrlCmdProgramVidmemPromote_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiCtrlCmdProgramVidmemPromote__ #define kchangrpapiCtrlCmdProgramVidmemPromote(pKernelChannelGroupApi, pParams) kchangrpapiCtrlCmdProgramVidmemPromote_DISPATCH(pKernelChannelGroupApi, pParams) +#define kchangrpapiCtrlCmdInternalPromoteFaultMethodBuffers_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiCtrlCmdInternalPromoteFaultMethodBuffers__ #define kchangrpapiCtrlCmdInternalPromoteFaultMethodBuffers(pKernelChannelGroupApi, pParams) kchangrpapiCtrlCmdInternalPromoteFaultMethodBuffers_DISPATCH(pKernelChannelGroupApi, pParams) +#define kchangrpapiCtrlCmdMakeRealtime_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiCtrlCmdMakeRealtime__ #define kchangrpapiCtrlCmdMakeRealtime(pKernelChannelGroupApi, pParams) kchangrpapiCtrlCmdMakeRealtime_DISPATCH(pKernelChannelGroupApi, pParams) +#define kchangrpapiCtrlCmdInternalGpFifoSchedule_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiCtrlCmdInternalGpFifoSchedule__ #define kchangrpapiCtrlCmdInternalGpFifoSchedule(pKernelChannelGroupApi, pSchedParams) kchangrpapiCtrlCmdInternalGpFifoSchedule_DISPATCH(pKernelChannelGroupApi, pSchedParams) +#define kchangrpapiCtrlCmdInternalSetTimeslice_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiCtrlCmdInternalSetTimeslice__ #define kchangrpapiCtrlCmdInternalSetTimeslice(pKernelChannelGroupApi, pTsParams) kchangrpapiCtrlCmdInternalSetTimeslice_DISPATCH(pKernelChannelGroupApi, pTsParams) +#define kchangrpapiCtrlGetTpcPartitionMode_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiCtrlGetTpcPartitionMode__ #define kchangrpapiCtrlGetTpcPartitionMode(pKernelChannelGroupApi, pParams) kchangrpapiCtrlGetTpcPartitionMode_DISPATCH(pKernelChannelGroupApi, pParams) +#define kchangrpapiCtrlSetTpcPartitionMode_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiCtrlSetTpcPartitionMode__ #define kchangrpapiCtrlSetTpcPartitionMode(pKernelChannelGroupApi, pParams) kchangrpapiCtrlSetTpcPartitionMode_DISPATCH(pKernelChannelGroupApi, pParams) +#define kchangrpapiCtrlGetMMUDebugMode_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiCtrlGetMMUDebugMode__ #define kchangrpapiCtrlGetMMUDebugMode(pKernelChannelGroupApi, pParams) kchangrpapiCtrlGetMMUDebugMode_DISPATCH(pKernelChannelGroupApi, pParams) +#define kchangrpapiCtrlProgramVidmemPromote_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiCtrlProgramVidmemPromote__ #define kchangrpapiCtrlProgramVidmemPromote(pKernelChannelGroupApi, pParams) kchangrpapiCtrlProgramVidmemPromote_DISPATCH(pKernelChannelGroupApi, pParams) +#define kchangrpapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define kchangrpapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) kchangrpapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define kchangrpapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define kchangrpapiUnmap(pGpuResource, pCallContext, pCpuMapping) kchangrpapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define kchangrpapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define kchangrpapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) kchangrpapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define kchangrpapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) kchangrpapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define kchangrpapiMapTo(pResource, pParams) kchangrpapiMapTo_DISPATCH(pResource, pParams) -#define kchangrpapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) kchangrpapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define kchangrpapiGetRefCount(pResource) kchangrpapiGetRefCount_DISPATCH(pResource) -#define kchangrpapiAddAdditionalDependants(pClient, pResource, pReference) kchangrpapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define kchangrpapiControl_Prologue(pResource, pCallContext, pParams) kchangrpapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define kchangrpapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define kchangrpapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) kchangrpapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define kchangrpapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define kchangrpapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) kchangrpapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define kchangrpapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define kchangrpapiInternalControlForward(pGpuResource, command, pParams, size) kchangrpapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define kchangrpapiUnmapFrom(pResource, pParams) kchangrpapiUnmapFrom_DISPATCH(pResource, pParams) -#define kchangrpapiControl_Epilogue(pResource, pCallContext, pParams) kchangrpapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kchangrpapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define kchangrpapiGetInternalObjectHandle(pGpuResource) kchangrpapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define kchangrpapiUnmap(pGpuResource, pCallContext, pCpuMapping) kchangrpapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define kchangrpapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define kchangrpapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kchangrpapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define kchangrpapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define kchangrpapiGetMemInterMapParams(pRmResource, pParams) kchangrpapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define kchangrpapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define kchangrpapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) kchangrpapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define kchangrpapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define kchangrpapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) kchangrpapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define kchangrpapiControlFilter(pResource, pCallContext, pParams) kchangrpapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define kchangrpapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define kchangrpapiControlSerialization_Prologue(pResource, pCallContext, pParams) kchangrpapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define kchangrpapiIsPartialUnmapSupported(pResource) kchangrpapiIsPartialUnmapSupported_DISPATCH(pResource) -#define kchangrpapiPreDestruct(pResource) kchangrpapiPreDestruct_DISPATCH(pResource) -#define kchangrpapiIsDuplicate(pResource, hMemory, pDuplicate) kchangrpapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define kchangrpapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ #define kchangrpapiControlSerialization_Epilogue(pResource, pCallContext, pParams) kchangrpapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kchangrpapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) kchangrpapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define kchangrpapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kchangrpapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool kchangrpapiCanCopy_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi); +#define kchangrpapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define kchangrpapiControl_Prologue(pResource, pCallContext, pParams) kchangrpapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define kchangrpapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define kchangrpapiControl_Epilogue(pResource, pCallContext, pParams) kchangrpapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kchangrpapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define kchangrpapiIsDuplicate(pResource, hMemory, pDuplicate) kchangrpapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define kchangrpapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define kchangrpapiPreDestruct(pResource) kchangrpapiPreDestruct_DISPATCH(pResource) +#define kchangrpapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define kchangrpapiControlFilter(pResource, pCallContext, pParams) kchangrpapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define kchangrpapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define kchangrpapiIsPartialUnmapSupported(pResource) kchangrpapiIsPartialUnmapSupported_DISPATCH(pResource) +#define kchangrpapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define kchangrpapiMapTo(pResource, pParams) kchangrpapiMapTo_DISPATCH(pResource, pParams) +#define kchangrpapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define kchangrpapiUnmapFrom(pResource, pParams) kchangrpapiUnmapFrom_DISPATCH(pResource, pParams) +#define kchangrpapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define kchangrpapiGetRefCount(pResource) kchangrpapiGetRefCount_DISPATCH(pResource) +#define kchangrpapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define kchangrpapiAddAdditionalDependants(pClient, pResource, pReference) kchangrpapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NvBool kchangrpapiCanCopy_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi) { return pKernelChannelGroupApi->__kchangrpapiCanCopy__(pKernelChannelGroupApi); } -NV_STATUS kchangrpapiControl_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline NV_STATUS kchangrpapiControl_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pKernelChannelGroupApi->__kchangrpapiControl__(pKernelChannelGroupApi, pCallContext, pParams); } -NV_STATUS kchangrpapiSetLegacyMode_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvHandle hClient); - -static inline NV_STATUS kchangrpapiSetLegacyMode_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi, struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvHandle hClient) { - return pKernelChannelGroupApi->__kchangrpapiSetLegacyMode__(pKernelChannelGroupApi, pGpu, pKernelFifo, hClient); -} - -NV_STATUS kchangrpapiCtrlCmdGpFifoSchedule_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams); - static inline NV_STATUS kchangrpapiCtrlCmdGpFifoSchedule_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams) { return pKernelChannelGroupApi->__kchangrpapiCtrlCmdGpFifoSchedule__(pKernelChannelGroupApi, pSchedParams); } -NV_STATUS kchangrpapiCtrlCmdBind_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_BIND_PARAMS *pParams); - static inline NV_STATUS kchangrpapiCtrlCmdBind_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_BIND_PARAMS *pParams) { return pKernelChannelGroupApi->__kchangrpapiCtrlCmdBind__(pKernelChannelGroupApi, pParams); } -NV_STATUS kchangrpapiCtrlCmdSetTimeslice_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_TIMESLICE_PARAMS *pTsParams); - static inline NV_STATUS kchangrpapiCtrlCmdSetTimeslice_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_TIMESLICE_PARAMS *pTsParams) { return pKernelChannelGroupApi->__kchangrpapiCtrlCmdSetTimeslice__(pKernelChannelGroupApi, pTsParams); } -NV_STATUS kchangrpapiCtrlCmdGetTimeslice_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_TIMESLICE_PARAMS *pTsParams); - static inline NV_STATUS kchangrpapiCtrlCmdGetTimeslice_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_TIMESLICE_PARAMS *pTsParams) { return pKernelChannelGroupApi->__kchangrpapiCtrlCmdGetTimeslice__(pKernelChannelGroupApi, pTsParams); } -NV_STATUS kchangrpapiCtrlCmdPreempt_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_PREEMPT_PARAMS *pPreemptParams); - static inline NV_STATUS kchangrpapiCtrlCmdPreempt_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_PREEMPT_PARAMS *pPreemptParams) { return pKernelChannelGroupApi->__kchangrpapiCtrlCmdPreempt__(pKernelChannelGroupApi, pPreemptParams); } -NV_STATUS kchangrpapiCtrlCmdGetInfo_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_GET_INFO_PARAMS *pParams); - static inline NV_STATUS kchangrpapiCtrlCmdGetInfo_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_GET_INFO_PARAMS *pParams) { return pKernelChannelGroupApi->__kchangrpapiCtrlCmdGetInfo__(pKernelChannelGroupApi, pParams); } -NV_STATUS kchangrpapiCtrlCmdSetInterleaveLevel_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_INTERLEAVE_LEVEL_PARAMS *pParams); - static inline NV_STATUS kchangrpapiCtrlCmdSetInterleaveLevel_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_INTERLEAVE_LEVEL_PARAMS *pParams) { return pKernelChannelGroupApi->__kchangrpapiCtrlCmdSetInterleaveLevel__(pKernelChannelGroupApi, pParams); } -NV_STATUS kchangrpapiCtrlCmdProgramVidmemPromote_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *pParams); - static inline NV_STATUS kchangrpapiCtrlCmdProgramVidmemPromote_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *pParams) { return pKernelChannelGroupApi->__kchangrpapiCtrlCmdProgramVidmemPromote__(pKernelChannelGroupApi, pParams); } -NV_STATUS kchangrpapiCtrlCmdInternalPromoteFaultMethodBuffers_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_INTERNAL_PROMOTE_FAULT_METHOD_BUFFERS_PARAMS *pParams); - static inline NV_STATUS kchangrpapiCtrlCmdInternalPromoteFaultMethodBuffers_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_INTERNAL_PROMOTE_FAULT_METHOD_BUFFERS_PARAMS *pParams) { return pKernelChannelGroupApi->__kchangrpapiCtrlCmdInternalPromoteFaultMethodBuffers__(pKernelChannelGroupApi, pParams); } -NV_STATUS kchangrpapiCtrlCmdMakeRealtime_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_MAKE_REALTIME_PARAMS *pParams); - static inline NV_STATUS kchangrpapiCtrlCmdMakeRealtime_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_MAKE_REALTIME_PARAMS *pParams) { return pKernelChannelGroupApi->__kchangrpapiCtrlCmdMakeRealtime__(pKernelChannelGroupApi, pParams); } -NV_STATUS kchangrpapiCtrlCmdInternalGpFifoSchedule_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams); - static inline NV_STATUS kchangrpapiCtrlCmdInternalGpFifoSchedule_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams) { return pKernelChannelGroupApi->__kchangrpapiCtrlCmdInternalGpFifoSchedule__(pKernelChannelGroupApi, pSchedParams); } -NV_STATUS kchangrpapiCtrlCmdInternalSetTimeslice_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_TIMESLICE_PARAMS *pTsParams); - static inline NV_STATUS kchangrpapiCtrlCmdInternalSetTimeslice_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_TIMESLICE_PARAMS *pTsParams) { return pKernelChannelGroupApi->__kchangrpapiCtrlCmdInternalSetTimeslice__(pKernelChannelGroupApi, pTsParams); } -static inline NV_STATUS kchangrpapiCtrlGetTpcPartitionMode_a094e1(struct KernelChannelGroupApi *pKernelChannelGroupApi, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *pParams) { - return kgrctxCtrlHandle(resservGetTlsCallContext(), pKernelChannelGroupApi->hKernelGraphicsContext); -} - static inline NV_STATUS kchangrpapiCtrlGetTpcPartitionMode_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *pParams) { return pKernelChannelGroupApi->__kchangrpapiCtrlGetTpcPartitionMode__(pKernelChannelGroupApi, pParams); } -static inline NV_STATUS kchangrpapiCtrlSetTpcPartitionMode_a094e1(struct KernelChannelGroupApi *pKernelChannelGroupApi, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *pParams) { - return kgrctxCtrlHandle(resservGetTlsCallContext(), pKernelChannelGroupApi->hKernelGraphicsContext); -} - static inline NV_STATUS kchangrpapiCtrlSetTpcPartitionMode_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *pParams) { return pKernelChannelGroupApi->__kchangrpapiCtrlSetTpcPartitionMode__(pKernelChannelGroupApi, pParams); } -static inline NV_STATUS kchangrpapiCtrlGetMMUDebugMode_a094e1(struct KernelChannelGroupApi *pKernelChannelGroupApi, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *pParams) { - return kgrctxCtrlHandle(resservGetTlsCallContext(), pKernelChannelGroupApi->hKernelGraphicsContext); -} - static inline NV_STATUS kchangrpapiCtrlGetMMUDebugMode_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *pParams) { return pKernelChannelGroupApi->__kchangrpapiCtrlGetMMUDebugMode__(pKernelChannelGroupApi, pParams); } -static inline NV_STATUS kchangrpapiCtrlProgramVidmemPromote_a094e1(struct KernelChannelGroupApi *pKernelChannelGroupApi, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *pParams) { - return kgrctxCtrlHandle(resservGetTlsCallContext(), pKernelChannelGroupApi->hKernelGraphicsContext); -} - static inline NV_STATUS kchangrpapiCtrlProgramVidmemPromote_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *pParams) { return pKernelChannelGroupApi->__kchangrpapiCtrlProgramVidmemPromote__(pKernelChannelGroupApi, pParams); } -static inline NvBool kchangrpapiShareCallback_DISPATCH(struct KernelChannelGroupApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__kchangrpapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS kchangrpapiMap_DISPATCH(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__kchangrpapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS kchangrpapiCheckMemInterUnmap_DISPATCH(struct KernelChannelGroupApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__kchangrpapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS kchangrpapiUnmap_DISPATCH(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__kchangrpapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS kchangrpapiMapTo_DISPATCH(struct KernelChannelGroupApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__kchangrpapiMapTo__(pResource, pParams); +static inline NvBool kchangrpapiShareCallback_DISPATCH(struct KernelChannelGroupApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__kchangrpapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +} + +static inline NV_STATUS kchangrpapiGetRegBaseOffsetAndSize_DISPATCH(struct KernelChannelGroupApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__kchangrpapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS kchangrpapiGetMapAddrSpace_DISPATCH(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__kchangrpapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NvU32 kchangrpapiGetRefCount_DISPATCH(struct KernelChannelGroupApi *pResource) { - return pResource->__kchangrpapiGetRefCount__(pResource); +static inline NV_STATUS kchangrpapiInternalControlForward_DISPATCH(struct KernelChannelGroupApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__kchangrpapiInternalControlForward__(pGpuResource, command, pParams, size); } -static inline void kchangrpapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelChannelGroupApi *pResource, RsResourceRef *pReference) { - pResource->__kchangrpapiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvHandle kchangrpapiGetInternalObjectHandle_DISPATCH(struct KernelChannelGroupApi *pGpuResource) { + return pGpuResource->__kchangrpapiGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS kchangrpapiControl_Prologue_DISPATCH(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kchangrpapiControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool kchangrpapiAccessCallback_DISPATCH(struct KernelChannelGroupApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__kchangrpapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS kchangrpapiGetRegBaseOffsetAndSize_DISPATCH(struct KernelChannelGroupApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__kchangrpapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS kchangrpapiGetMemInterMapParams_DISPATCH(struct KernelChannelGroupApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__kchangrpapiGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS kchangrpapiInternalControlForward_DISPATCH(struct KernelChannelGroupApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__kchangrpapiInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS kchangrpapiCheckMemInterUnmap_DISPATCH(struct KernelChannelGroupApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__kchangrpapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS kchangrpapiUnmapFrom_DISPATCH(struct KernelChannelGroupApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__kchangrpapiUnmapFrom__(pResource, pParams); +static inline NV_STATUS kchangrpapiGetMemoryMappingDescriptor_DISPATCH(struct KernelChannelGroupApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__kchangrpapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline void kchangrpapiControl_Epilogue_DISPATCH(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kchangrpapiControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS kchangrpapiControlSerialization_Prologue_DISPATCH(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kchangrpapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvHandle kchangrpapiGetInternalObjectHandle_DISPATCH(struct KernelChannelGroupApi *pGpuResource) { - return pGpuResource->__kchangrpapiGetInternalObjectHandle__(pGpuResource); +static inline void kchangrpapiControlSerialization_Epilogue_DISPATCH(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__kchangrpapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS kchangrpapiUnmap_DISPATCH(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kchangrpapiUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NV_STATUS kchangrpapiControl_Prologue_DISPATCH(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kchangrpapiControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS kchangrpapiGetMemInterMapParams_DISPATCH(struct KernelChannelGroupApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__kchangrpapiGetMemInterMapParams__(pRmResource, pParams); +static inline void kchangrpapiControl_Epilogue_DISPATCH(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__kchangrpapiControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS kchangrpapiGetMemoryMappingDescriptor_DISPATCH(struct KernelChannelGroupApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__kchangrpapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS kchangrpapiIsDuplicate_DISPATCH(struct KernelChannelGroupApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__kchangrpapiIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS kchangrpapiControlFilter_DISPATCH(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kchangrpapiControlFilter__(pResource, pCallContext, pParams); +static inline void kchangrpapiPreDestruct_DISPATCH(struct KernelChannelGroupApi *pResource) { + pResource->__kchangrpapiPreDestruct__(pResource); } -static inline NV_STATUS kchangrpapiControlSerialization_Prologue_DISPATCH(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kchangrpapiControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS kchangrpapiControlFilter_DISPATCH(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kchangrpapiControlFilter__(pResource, pCallContext, pParams); } static inline NvBool kchangrpapiIsPartialUnmapSupported_DISPATCH(struct KernelChannelGroupApi *pResource) { return pResource->__kchangrpapiIsPartialUnmapSupported__(pResource); } -static inline void kchangrpapiPreDestruct_DISPATCH(struct KernelChannelGroupApi *pResource) { - pResource->__kchangrpapiPreDestruct__(pResource); +static inline NV_STATUS kchangrpapiMapTo_DISPATCH(struct KernelChannelGroupApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__kchangrpapiMapTo__(pResource, pParams); } -static inline NV_STATUS kchangrpapiIsDuplicate_DISPATCH(struct KernelChannelGroupApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__kchangrpapiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS kchangrpapiUnmapFrom_DISPATCH(struct KernelChannelGroupApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__kchangrpapiUnmapFrom__(pResource, pParams); } -static inline void kchangrpapiControlSerialization_Epilogue_DISPATCH(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kchangrpapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 kchangrpapiGetRefCount_DISPATCH(struct KernelChannelGroupApi *pResource) { + return pResource->__kchangrpapiGetRefCount__(pResource); } -static inline NV_STATUS kchangrpapiMap_DISPATCH(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kchangrpapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void kchangrpapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelChannelGroupApi *pResource, RsResourceRef *pReference) { + pResource->__kchangrpapiAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NvBool kchangrpapiAccessCallback_DISPATCH(struct KernelChannelGroupApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__kchangrpapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +NvBool kchangrpapiCanCopy_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi); + +NV_STATUS kchangrpapiControl_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +NV_STATUS kchangrpapiCtrlCmdGpFifoSchedule_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams); + +NV_STATUS kchangrpapiCtrlCmdBind_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_BIND_PARAMS *pParams); + +NV_STATUS kchangrpapiCtrlCmdSetTimeslice_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_TIMESLICE_PARAMS *pTsParams); + +NV_STATUS kchangrpapiCtrlCmdGetTimeslice_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_TIMESLICE_PARAMS *pTsParams); + +NV_STATUS kchangrpapiCtrlCmdPreempt_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_PREEMPT_PARAMS *pPreemptParams); + +NV_STATUS kchangrpapiCtrlCmdGetInfo_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_GET_INFO_PARAMS *pParams); + +NV_STATUS kchangrpapiCtrlCmdSetInterleaveLevel_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_INTERLEAVE_LEVEL_PARAMS *pParams); + +NV_STATUS kchangrpapiCtrlCmdProgramVidmemPromote_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *pParams); + +NV_STATUS kchangrpapiCtrlCmdInternalPromoteFaultMethodBuffers_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_INTERNAL_PROMOTE_FAULT_METHOD_BUFFERS_PARAMS *pParams); + +NV_STATUS kchangrpapiCtrlCmdMakeRealtime_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_MAKE_REALTIME_PARAMS *pParams); + +NV_STATUS kchangrpapiCtrlCmdInternalGpFifoSchedule_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams); + +NV_STATUS kchangrpapiCtrlCmdInternalSetTimeslice_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_TIMESLICE_PARAMS *pTsParams); + +static inline NV_STATUS kchangrpapiCtrlGetTpcPartitionMode_a094e1(struct KernelChannelGroupApi *pKernelChannelGroupApi, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *pParams) { + return kgrctxCtrlHandle(resservGetTlsCallContext(), pKernelChannelGroupApi->hKernelGraphicsContext); +} + +static inline NV_STATUS kchangrpapiCtrlSetTpcPartitionMode_a094e1(struct KernelChannelGroupApi *pKernelChannelGroupApi, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *pParams) { + return kgrctxCtrlHandle(resservGetTlsCallContext(), pKernelChannelGroupApi->hKernelGraphicsContext); +} + +static inline NV_STATUS kchangrpapiCtrlGetMMUDebugMode_a094e1(struct KernelChannelGroupApi *pKernelChannelGroupApi, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *pParams) { + return kgrctxCtrlHandle(resservGetTlsCallContext(), pKernelChannelGroupApi->hKernelGraphicsContext); +} + +static inline NV_STATUS kchangrpapiCtrlProgramVidmemPromote_a094e1(struct KernelChannelGroupApi *pKernelChannelGroupApi, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *pParams) { + return kgrctxCtrlHandle(resservGetTlsCallContext(), pKernelChannelGroupApi->hKernelGraphicsContext); } NV_STATUS kchangrpapiConstruct_IMPL(struct KernelChannelGroupApi *arg_pKernelChannelGroupApi, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); @@ -440,6 +498,17 @@ static inline NV_STATUS kchangrpapiCopyConstruct(struct KernelChannelGroupApi *p void kchangrpapiDestruct_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi); #define __nvoc_kchangrpapiDestruct(pKernelChannelGroupApi) kchangrpapiDestruct_IMPL(pKernelChannelGroupApi) +NV_STATUS kchangrpapiSetLegacyMode_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi, struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvHandle hClient); + +#ifdef __nvoc_kernel_channel_group_api_h_disabled +static inline NV_STATUS kchangrpapiSetLegacyMode(struct KernelChannelGroupApi *pKernelChannelGroupApi, struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvHandle hClient) { + NV_ASSERT_FAILED_PRECOMP("KernelChannelGroupApi was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kernel_channel_group_api_h_disabled +#define kchangrpapiSetLegacyMode(pKernelChannelGroupApi, pGpu, pKernelFifo, hClient) kchangrpapiSetLegacyMode_IMPL(pKernelChannelGroupApi, pGpu, pKernelFifo, hClient) +#endif //__nvoc_kernel_channel_group_api_h_disabled + #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_kernel_channel_group_nvoc.c b/src/nvidia/generated/g_kernel_channel_group_nvoc.c index 37fed4a189..360ac6b966 100644 --- a/src/nvidia/generated/g_kernel_channel_group_nvoc.c +++ b/src/nvidia/generated/g_kernel_channel_group_nvoc.c @@ -111,6 +111,7 @@ NV_STATUS __nvoc_ctor_KernelChannelGroup(KernelChannelGroup *pThis, RmHalspecOwn return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelChannelGroup_1(KernelChannelGroup *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -122,8 +123,10 @@ static void __nvoc_init_funcTable_KernelChannelGroup_1(KernelChannelGroup *pThis PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); -} +} // End __nvoc_init_funcTable_KernelChannelGroup_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_KernelChannelGroup(KernelChannelGroup *pThis, RmHalspecOwner *pRmhalspecowner) { __nvoc_init_funcTable_KernelChannelGroup_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_channel_group_nvoc.h b/src/nvidia/generated/g_kernel_channel_group_nvoc.h index 2886b9b723..931d469a7d 100644 --- a/src/nvidia/generated/g_kernel_channel_group_nvoc.h +++ b/src/nvidia/generated/g_kernel_channel_group_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_KERNEL_CHANNEL_GROUP_NVOC_H_ #define _G_KERNEL_CHANNEL_GROUP_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_channel_group_nvoc.h" #ifndef KERNEL_CHANNEL_GROUP_H @@ -49,6 +57,7 @@ extern "C" { #include "kernel/gpu/fifo/kernel_ctxshare.h" // Forward declaration + struct KernelChannelGroupApi; #ifndef __NVOC_CLASS_KernelChannelGroupApi_TYPEDEF__ @@ -119,12 +128,21 @@ typedef struct _HW_ENG_FAULT_METHOD_BUFFER #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelChannelGroup { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RsShared __nvoc_base_RsShared; - struct Object *__nvoc_pbase_Object; - struct RsShared *__nvoc_pbase_RsShared; - struct KernelChannelGroup *__nvoc_pbase_KernelChannelGroup; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct RsShared *__nvoc_pbase_RsShared; // shr super + struct KernelChannelGroup *__nvoc_pbase_KernelChannelGroup; // kchangrp + + // Data members NODE node; NvU32 grpID; NvU32 runlistId; @@ -160,6 +178,7 @@ typedef struct KernelChannelGroup KernelChannelGroup; #define __nvoc_class_id_KernelChannelGroup 0xec6de1 #endif /* __nvoc_class_id_KernelChannelGroup */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelChannelGroup; #define __staticCast_KernelChannelGroup(pThis) \ @@ -172,13 +191,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelChannelGroup; ((KernelChannelGroup*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelChannelGroup))) #endif //__nvoc_kernel_channel_group_h_disabled - NV_STATUS __nvoc_objCreateDynamic_KernelChannelGroup(KernelChannelGroup**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_KernelChannelGroup(KernelChannelGroup**, Dynamic*, NvU32); #define __objCreate_KernelChannelGroup(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelChannelGroup((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions static inline NV_STATUS kchangrpSetInterleaveLevelSched_56cd7a(struct OBJGPU *pGpu, struct KernelChannelGroup *pKernelChannelGroup, NvU32 value) { return NV_OK; } @@ -197,54 +219,54 @@ static inline NV_STATUS kchangrpSetInterleaveLevelSched(struct OBJGPU *pGpu, str #define kchangrpSetInterleaveLevelSched_HAL(pGpu, pKernelChannelGroup, value) kchangrpSetInterleaveLevelSched(pGpu, pKernelChannelGroup, value) -static inline void kchangrpUpdateSubcontextMask_b3696a(struct OBJGPU *pGpu, struct KernelChannelGroup *arg0, NvU32 arg1, NvBool arg2) { +static inline void kchangrpUpdateSubcontextMask_b3696a(struct OBJGPU *pGpu, struct KernelChannelGroup *arg2, NvU32 arg3, NvBool arg4) { return; } -void kchangrpUpdateSubcontextMask_GV100(struct OBJGPU *pGpu, struct KernelChannelGroup *arg0, NvU32 arg1, NvBool arg2); +void kchangrpUpdateSubcontextMask_GV100(struct OBJGPU *pGpu, struct KernelChannelGroup *arg2, NvU32 arg3, NvBool arg4); #ifdef __nvoc_kernel_channel_group_h_disabled -static inline void kchangrpUpdateSubcontextMask(struct OBJGPU *pGpu, struct KernelChannelGroup *arg0, NvU32 arg1, NvBool arg2) { +static inline void kchangrpUpdateSubcontextMask(struct OBJGPU *pGpu, struct KernelChannelGroup *arg2, NvU32 arg3, NvBool arg4) { NV_ASSERT_FAILED_PRECOMP("KernelChannelGroup was disabled!"); } #else //__nvoc_kernel_channel_group_h_disabled -#define kchangrpUpdateSubcontextMask(pGpu, arg0, arg1, arg2) kchangrpUpdateSubcontextMask_b3696a(pGpu, arg0, arg1, arg2) +#define kchangrpUpdateSubcontextMask(pGpu, arg2, arg3, arg4) kchangrpUpdateSubcontextMask_b3696a(pGpu, arg2, arg3, arg4) #endif //__nvoc_kernel_channel_group_h_disabled -#define kchangrpUpdateSubcontextMask_HAL(pGpu, arg0, arg1, arg2) kchangrpUpdateSubcontextMask(pGpu, arg0, arg1, arg2) +#define kchangrpUpdateSubcontextMask_HAL(pGpu, arg2, arg3, arg4) kchangrpUpdateSubcontextMask(pGpu, arg2, arg3, arg4) -static inline void kchangrpSetSubcontextZombieState_b3696a(struct OBJGPU *pGpu, struct KernelChannelGroup *arg0, NvU32 arg1, NvBool arg2) { +static inline void kchangrpSetSubcontextZombieState_b3696a(struct OBJGPU *pGpu, struct KernelChannelGroup *arg2, NvU32 arg3, NvBool arg4) { return; } #ifdef __nvoc_kernel_channel_group_h_disabled -static inline void kchangrpSetSubcontextZombieState(struct OBJGPU *pGpu, struct KernelChannelGroup *arg0, NvU32 arg1, NvBool arg2) { +static inline void kchangrpSetSubcontextZombieState(struct OBJGPU *pGpu, struct KernelChannelGroup *arg2, NvU32 arg3, NvBool arg4) { NV_ASSERT_FAILED_PRECOMP("KernelChannelGroup was disabled!"); } #else //__nvoc_kernel_channel_group_h_disabled -#define kchangrpSetSubcontextZombieState(pGpu, arg0, arg1, arg2) kchangrpSetSubcontextZombieState_b3696a(pGpu, arg0, arg1, arg2) +#define kchangrpSetSubcontextZombieState(pGpu, arg2, arg3, arg4) kchangrpSetSubcontextZombieState_b3696a(pGpu, arg2, arg3, arg4) #endif //__nvoc_kernel_channel_group_h_disabled -#define kchangrpSetSubcontextZombieState_HAL(pGpu, arg0, arg1, arg2) kchangrpSetSubcontextZombieState(pGpu, arg0, arg1, arg2) +#define kchangrpSetSubcontextZombieState_HAL(pGpu, arg2, arg3, arg4) kchangrpSetSubcontextZombieState(pGpu, arg2, arg3, arg4) -static inline NvBool kchangrpGetSubcontextZombieState_ceaee8(struct OBJGPU *pGpu, struct KernelChannelGroup *arg0, NvU32 arg1) { +static inline NvBool kchangrpGetSubcontextZombieState_ceaee8(struct OBJGPU *pGpu, struct KernelChannelGroup *arg2, NvU32 arg3) { NV_ASSERT_PRECOMP(0); return ((NvBool)(0 != 0)); } #ifdef __nvoc_kernel_channel_group_h_disabled -static inline NvBool kchangrpGetSubcontextZombieState(struct OBJGPU *pGpu, struct KernelChannelGroup *arg0, NvU32 arg1) { +static inline NvBool kchangrpGetSubcontextZombieState(struct OBJGPU *pGpu, struct KernelChannelGroup *arg2, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("KernelChannelGroup was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_channel_group_h_disabled -#define kchangrpGetSubcontextZombieState(pGpu, arg0, arg1) kchangrpGetSubcontextZombieState_ceaee8(pGpu, arg0, arg1) +#define kchangrpGetSubcontextZombieState(pGpu, arg2, arg3) kchangrpGetSubcontextZombieState_ceaee8(pGpu, arg2, arg3) #endif //__nvoc_kernel_channel_group_h_disabled -#define kchangrpGetSubcontextZombieState_HAL(pGpu, arg0, arg1) kchangrpGetSubcontextZombieState(pGpu, arg0, arg1) +#define kchangrpGetSubcontextZombieState_HAL(pGpu, arg2, arg3) kchangrpGetSubcontextZombieState(pGpu, arg2, arg3) NV_STATUS kchangrpAllocFaultMethodBuffers_GV100(struct OBJGPU *pGpu, struct KernelChannelGroup *pKernelChannelGroup); @@ -410,15 +432,15 @@ static inline NV_STATUS kchangrpAllocEngineContextDescriptor(struct OBJGPU *pGpu #define kchangrpAllocEngineContextDescriptor(pGpu, pKernelChannelGroup) kchangrpAllocEngineContextDescriptor_IMPL(pGpu, pKernelChannelGroup) #endif //__nvoc_kernel_channel_group_h_disabled -NV_STATUS kchangrpGetEngineContextMemDesc_IMPL(struct OBJGPU *pGpu, struct KernelChannelGroup *arg0, MEMORY_DESCRIPTOR **arg1); +NV_STATUS kchangrpGetEngineContextMemDesc_IMPL(struct OBJGPU *pGpu, struct KernelChannelGroup *arg2, MEMORY_DESCRIPTOR **arg3); #ifdef __nvoc_kernel_channel_group_h_disabled -static inline NV_STATUS kchangrpGetEngineContextMemDesc(struct OBJGPU *pGpu, struct KernelChannelGroup *arg0, MEMORY_DESCRIPTOR **arg1) { +static inline NV_STATUS kchangrpGetEngineContextMemDesc(struct OBJGPU *pGpu, struct KernelChannelGroup *arg2, MEMORY_DESCRIPTOR **arg3) { NV_ASSERT_FAILED_PRECOMP("KernelChannelGroup was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_channel_group_h_disabled -#define kchangrpGetEngineContextMemDesc(pGpu, arg0, arg1) kchangrpGetEngineContextMemDesc_IMPL(pGpu, arg0, arg1) +#define kchangrpGetEngineContextMemDesc(pGpu, arg2, arg3) kchangrpGetEngineContextMemDesc_IMPL(pGpu, arg2, arg3) #endif //__nvoc_kernel_channel_group_h_disabled NV_STATUS kchangrpSetInterleaveLevel_IMPL(struct OBJGPU *pGpu, struct KernelChannelGroup *pKernelChannelGroup, NvU32 value); diff --git a/src/nvidia/generated/g_kernel_channel_nvoc.c b/src/nvidia/generated/g_kernel_channel_nvoc.c index 89de11e18e..0eeceed892 100644 --- a/src/nvidia/generated/g_kernel_channel_nvoc.c +++ b/src/nvidia/generated/g_kernel_channel_nvoc.c @@ -111,126 +111,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelChannel = /*pExportInfo=*/ &__nvoc_export_info_KernelChannel }; -static NV_STATUS __nvoc_thunk_KernelChannel_gpuresMap(struct GpuResource *pKernelChannel, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return kchannelMap((struct KernelChannel *)(((unsigned char *)pKernelChannel) - __nvoc_rtti_KernelChannel_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_KernelChannel_gpuresUnmap(struct GpuResource *pKernelChannel, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return kchannelUnmap((struct KernelChannel *)(((unsigned char *)pKernelChannel) - __nvoc_rtti_KernelChannel_GpuResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_KernelChannel_gpuresGetMapAddrSpace(struct GpuResource *pKernelChannel, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return kchannelGetMapAddrSpace((struct KernelChannel *)(((unsigned char *)pKernelChannel) - __nvoc_rtti_KernelChannel_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} - -static NV_STATUS __nvoc_thunk_KernelChannel_rmresGetMemInterMapParams(struct RmResource *pKernelChannel, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return kchannelGetMemInterMapParams((struct KernelChannel *)(((unsigned char *)pKernelChannel) - __nvoc_rtti_KernelChannel_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_KernelChannel_rmresCheckMemInterUnmap(struct RmResource *pKernelChannel, NvBool bSubdeviceHandleProvided) { - return kchannelCheckMemInterUnmap((struct KernelChannel *)(((unsigned char *)pKernelChannel) - __nvoc_rtti_KernelChannel_RmResource.offset), bSubdeviceHandleProvided); -} - -static NvBool __nvoc_thunk_GpuResource_kchannelShareCallback(struct KernelChannel *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelChannel_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_Notifier_kchannelGetOrAllocNotifShare(struct KernelChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelChannel_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); -} - -static NV_STATUS __nvoc_thunk_RsResource_kchannelMapTo(struct KernelChannel *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannel_RsResource.offset), pParams); -} - -static void __nvoc_thunk_Notifier_kchannelSetNotificationShare(struct KernelChannel *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelChannel_Notifier.offset), pNotifShare); -} - -static NvU32 __nvoc_thunk_RsResource_kchannelGetRefCount(struct KernelChannel *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannel_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_kchannelAddAdditionalDependants(struct RsClient *pClient, struct KernelChannel *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannel_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_kchannelControl_Prologue(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannel_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kchannelGetRegBaseOffsetAndSize(struct KernelChannel *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelChannel_GpuResource.offset), pGpu, pOffset, pSize); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kchannelInternalControlForward(struct KernelChannel *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelChannel_GpuResource.offset), command, pParams, size); -} - -static NV_STATUS __nvoc_thunk_RsResource_kchannelUnmapFrom(struct KernelChannel *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannel_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_kchannelControl_Epilogue(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannel_RmResource.offset), pCallContext, pParams); -} - -static NvHandle __nvoc_thunk_GpuResource_kchannelGetInternalObjectHandle(struct KernelChannel *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelChannel_GpuResource.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kchannelControl(struct KernelChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelChannel_GpuResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_kchannelGetMemoryMappingDescriptor(struct KernelChannel *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelChannel_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_kchannelControlFilter(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannel_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_Notifier_kchannelUnregisterEvent(struct KernelChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelChannel_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static NV_STATUS __nvoc_thunk_RmResource_kchannelControlSerialization_Prologue(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannel_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_kchannelCanCopy(struct KernelChannel *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannel_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_kchannelIsPartialUnmapSupported(struct KernelChannel *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannel_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_kchannelPreDestruct(struct KernelChannel *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannel_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_kchannelIsDuplicate(struct KernelChannel *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannel_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_kchannelControlSerialization_Epilogue(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannel_RmResource.offset), pCallContext, pParams); -} - -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_kchannelGetNotificationListPtr(struct KernelChannel *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelChannel_Notifier.offset)); -} - -static struct NotifShare *__nvoc_thunk_Notifier_kchannelGetNotificationShare(struct KernelChannel *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelChannel_Notifier.offset)); -} - -static NvBool __nvoc_thunk_RmResource_kchannelAccessCallback(struct KernelChannel *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelChannel_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -238,12 +118,12 @@ static NvBool __nvoc_thunk_RmResource_kchannelAccessCallback(struct KernelChanne static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelChannel[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlSetTpcPartitionMode_a094e1, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x900101u, /*paramSize=*/ sizeof(NV0090_CTRL_TPC_PARTITION_MODE_PARAMS), @@ -253,12 +133,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlGetTpcPartitionMode_a094e1, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x900103u, /*paramSize=*/ sizeof(NV0090_CTRL_TPC_PARTITION_MODE_PARAMS), @@ -268,12 +148,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlGetMMUDebugMode_a094e1, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x900105u, /*paramSize=*/ sizeof(NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS), @@ -283,12 +163,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlProgramVidmemPromote_a094e1, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x900107u, /*paramSize=*/ sizeof(NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS), @@ -298,12 +178,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdResetIsolatedChannel_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x506f0105u, /*paramSize=*/ sizeof(NV506F_CTRL_CMD_RESET_ISOLATED_CHANNEL_PARAMS), @@ -313,12 +193,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [5] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2610u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdInternalResetIsolatedChannel_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2610u) - /*flags=*/ 0x2610u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c8u) + /*flags=*/ 0x2c8u, /*accessRight=*/0x0u, /*methodId=*/ 0x506f0106u, /*paramSize=*/ sizeof(NV506F_CTRL_CMD_INTERNAL_RESET_ISOLATED_CHANNEL_PARAMS), @@ -328,12 +208,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [6] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGetClassEngineid_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x906f0101u, /*paramSize=*/ sizeof(NV906F_CTRL_GET_CLASS_ENGINEID_PARAMS), @@ -343,12 +223,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [7] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdResetChannel_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x906f0102u, /*paramSize=*/ sizeof(NV906F_CTRL_CMD_RESET_CHANNEL_PARAMS), @@ -358,12 +238,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [8] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGetDeferRCState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x906f0105u, /*paramSize=*/ sizeof(NV906F_CTRL_CMD_GET_DEFER_RC_STATE_PARAMS), @@ -373,12 +253,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [9] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGetMmuFaultInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x906f0106u, /*paramSize=*/ sizeof(NV906F_CTRL_GET_MMU_FAULT_INFO_PARAMS), @@ -388,12 +268,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [10] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdEventSetNotification_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x906f0203u, /*paramSize=*/ sizeof(NV906F_CTRL_EVENT_SET_NOTIFICATION_PARAMS), @@ -403,42 +283,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [11] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGetClassEngineidA06F_6a9a13, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xa06f0101u, - /*paramSize=*/ sizeof(NVA06F_CTRL_GET_CLASS_ENGINEID_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelCtrlCmdGetClassEngineidA06F" -#endif - }, - { /* [12] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdResetChannelA06F_ef73a1, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xa06f0102u, - /*paramSize=*/ sizeof(NVA06F_CTRL_CMD_RESET_CHANNEL_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelCtrlCmdResetChannelA06F" -#endif - }, - { /* [13] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGpFifoSchedule_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa06f0103u, /*paramSize=*/ sizeof(NVA06F_CTRL_GPFIFO_SCHEDULE_PARAMS), @@ -447,13 +297,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh /*func=*/ "kchannelCtrlCmdGpFifoSchedule" #endif }, - { /* [14] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [12] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdBind_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa06f0104u, /*paramSize=*/ sizeof(NVA06F_CTRL_BIND_PARAMS), @@ -462,28 +312,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh /*func=*/ "kchannelCtrlCmdBind" #endif }, - { /* [15] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGetMmuFaultInfoA06F_a7f9ac, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xa06f0107u, - /*paramSize=*/ sizeof(NVA06F_CTRL_GET_MMU_FAULT_INFO_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelCtrlCmdGetMmuFaultInfoA06F" -#endif - }, - { /* [16] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [13] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdSetErrorNotifier_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa06f0108u, /*paramSize=*/ sizeof(NVA06F_CTRL_SET_ERROR_NOTIFIER_PARAMS), @@ -492,13 +327,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh /*func=*/ "kchannelCtrlCmdSetErrorNotifier" #endif }, - { /* [17] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x110u) + { /* [14] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x28u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdSetInterleaveLevel_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x110u) - /*flags=*/ 0x110u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x28u) + /*flags=*/ 0x28u, /*accessRight=*/0x2u, /*methodId=*/ 0xa06f0109u, /*paramSize=*/ sizeof(NVA06F_CTRL_INTERLEAVE_LEVEL_PARAMS), @@ -507,13 +342,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh /*func=*/ "kchannelCtrlCmdSetInterleaveLevel" #endif }, - { /* [18] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + { /* [15] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdRestartRunlist_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x2u, /*methodId=*/ 0xa06f0111u, /*paramSize=*/ sizeof(NVA06F_CTRL_RESTART_RUNLIST_PARAMS), @@ -522,13 +357,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh /*func=*/ "kchannelCtrlCmdRestartRunlist" #endif }, - { /* [19] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [16] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdStopChannel_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa06f0112u, /*paramSize=*/ sizeof(NVA06F_CTRL_STOP_CHANNEL_PARAMS), @@ -537,163 +372,28 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh /*func=*/ "kchannelCtrlCmdStopChannel" #endif }, - { /* [20] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGetClassEngineidA16F_6a9a13, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xa16f0101u, - /*paramSize=*/ sizeof(NVA16F_CTRL_GET_CLASS_ENGINEID_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelCtrlCmdGetClassEngineidA16F" -#endif - }, - { /* [21] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdResetChannelA16F_ef73a1, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xa16f0102u, - /*paramSize=*/ sizeof(NVA16F_CTRL_CMD_RESET_CHANNEL_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelCtrlCmdResetChannelA16F" -#endif - }, - { /* [22] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGpFifoScheduleA16F_6546a6, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xa16f0103u, - /*paramSize=*/ sizeof(NVA16F_CTRL_GPFIFO_SCHEDULE_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelCtrlCmdGpFifoScheduleA16F" -#endif - }, - { /* [23] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGetClassEngineidA26F_6a9a13, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xa26f0101u, - /*paramSize=*/ sizeof(NVA26F_CTRL_GET_CLASS_ENGINEID_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelCtrlCmdGetClassEngineidA26F" -#endif - }, - { /* [24] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdResetChannelA26F_ef73a1, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xa26f0102u, - /*paramSize=*/ sizeof(NVA26F_CTRL_CMD_RESET_CHANNEL_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelCtrlCmdResetChannelA26F" -#endif - }, - { /* [25] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kchannelFCtrlCmdGpFifoScheduleA26F_6546a6, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xa26f0103u, - /*paramSize=*/ sizeof(NVA26F_CTRL_GPFIFO_SCHEDULE_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelFCtrlCmdGpFifoScheduleA26F" -#endif - }, - { /* [26] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGetClassEngineidB06F_6a9a13, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xb06f0101u, - /*paramSize=*/ sizeof(NVB06F_CTRL_GET_CLASS_ENGINEID_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelCtrlCmdGetClassEngineidB06F" -#endif - }, - { /* [27] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdResetChannelB06F_ef73a1, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xb06f0102u, - /*paramSize=*/ sizeof(NVB06F_CTRL_CMD_RESET_CHANNEL_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelCtrlCmdResetChannelB06F" -#endif - }, - { /* [28] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGpFifoScheduleB06F_6546a6, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xb06f0103u, - /*paramSize=*/ sizeof(NVB06F_CTRL_GPFIFO_SCHEDULE_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelCtrlCmdGpFifoScheduleB06F" -#endif - }, - { /* [29] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [17] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else - /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdBindB06F_2c1c21, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, + /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGetContextId_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, - /*methodId=*/ 0xb06f0104u, - /*paramSize=*/ sizeof(NVB06F_CTRL_BIND_PARAMS), + /*methodId=*/ 0xa06f0113u, + /*paramSize=*/ sizeof(NVA06F_CTRL_GET_CONTEXT_ID_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), #if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelCtrlCmdBindB06F" + /*func=*/ "kchannelCtrlCmdGetContextId" #endif }, - { /* [30] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + { /* [18] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGetEngineCtxSize_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0xb06f010bu, /*paramSize=*/ sizeof(NVB06F_CTRL_GET_ENGINE_CTX_SIZE_PARAMS), @@ -702,13 +402,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh /*func=*/ "kchannelCtrlCmdGetEngineCtxSize" #endif }, - { /* [31] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + { /* [19] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGetEngineCtxData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0xb06f010cu, /*paramSize=*/ sizeof(NVB06F_CTRL_GET_ENGINE_CTX_DATA_PARAMS), @@ -717,13 +417,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh /*func=*/ "kchannelCtrlCmdGetEngineCtxData" #endif }, - { /* [32] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x42204u) + { /* [20] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4244u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdMigrateEngineCtxData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x42204u) - /*flags=*/ 0x42204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4244u) + /*flags=*/ 0x4244u, /*accessRight=*/0x0u, /*methodId=*/ 0xb06f010du, /*paramSize=*/ sizeof(NVB06F_CTRL_MIGRATE_ENGINE_CTX_DATA_PARAMS), @@ -732,13 +432,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh /*func=*/ "kchannelCtrlCmdMigrateEngineCtxData" #endif }, - { /* [33] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + { /* [21] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGetEngineCtxState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0xb06f010eu, /*paramSize=*/ sizeof(NVB06F_CTRL_GET_ENGINE_CTX_STATE_PARAMS), @@ -747,13 +447,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh /*func=*/ "kchannelCtrlCmdGetEngineCtxState" #endif }, - { /* [34] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + { /* [22] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGetChannelHwState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0xb06f010fu, /*paramSize=*/ sizeof(NVB06F_CTRL_GET_CHANNEL_HW_STATE_PARAMS), @@ -762,13 +462,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh /*func=*/ "kchannelCtrlCmdGetChannelHwState" #endif }, - { /* [35] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x142204u) + { /* [23] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14244u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdSetChannelHwState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x142204u) - /*flags=*/ 0x142204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14244u) + /*flags=*/ 0x14244u, /*accessRight=*/0x0u, /*methodId=*/ 0xb06f0110u, /*paramSize=*/ sizeof(NVB06F_CTRL_SET_CHANNEL_HW_STATE_PARAMS), @@ -777,13 +477,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh /*func=*/ "kchannelCtrlCmdSetChannelHwState" #endif }, - { /* [36] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + { /* [24] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdSaveEngineCtxData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0xb06f0111u, /*paramSize=*/ sizeof(NVB06F_CTRL_SAVE_ENGINE_CTX_DATA_PARAMS), @@ -792,13 +492,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh /*func=*/ "kchannelCtrlCmdSaveEngineCtxData" #endif }, - { /* [37] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x142204u) + { /* [25] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14244u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdRestoreEngineCtxData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x142204u) - /*flags=*/ 0x142204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14244u) + /*flags=*/ 0x14244u, /*accessRight=*/0x0u, /*methodId=*/ 0xb06f0112u, /*paramSize=*/ sizeof(NVB06F_CTRL_RESTORE_ENGINE_CTX_DATA_PARAMS), @@ -807,133 +507,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh /*func=*/ "kchannelCtrlCmdRestoreEngineCtxData" #endif }, - { /* [38] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGetClassEngineidC06F_6a9a13, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xc06f0101u, - /*paramSize=*/ sizeof(NVC06F_CTRL_GET_CLASS_ENGINEID_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelCtrlCmdGetClassEngineidC06F" -#endif - }, - { /* [39] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdResetChannelC06F_ef73a1, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xc06f0102u, - /*paramSize=*/ sizeof(NVC06F_CTRL_CMD_RESET_CHANNEL_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelCtrlCmdResetChannelC06F" -#endif - }, - { /* [40] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGpFifoScheduleC06F_6546a6, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xc06f0103u, - /*paramSize=*/ sizeof(NVC06F_CTRL_GPFIFO_SCHEDULE_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelCtrlCmdGpFifoScheduleC06F" -#endif - }, - { /* [41] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdBindC06F_2c1c21, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xc06f0104u, - /*paramSize=*/ sizeof(NVC06F_CTRL_BIND_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelCtrlCmdBindC06F" -#endif - }, - { /* [42] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGetClassEngineidC36F_6a9a13, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xc36f0101u, - /*paramSize=*/ sizeof(NVC36F_CTRL_GET_CLASS_ENGINEID_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelCtrlCmdGetClassEngineidC36F" -#endif - }, - { /* [43] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdResetChannelC36F_ef73a1, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xc36f0102u, - /*paramSize=*/ sizeof(NVC36F_CTRL_CMD_RESET_CHANNEL_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelCtrlCmdResetChannelC36F" -#endif - }, - { /* [44] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGpFifoScheduleC36F_6546a6, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xc36f0103u, - /*paramSize=*/ sizeof(NVC36F_CTRL_GPFIFO_SCHEDULE_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelCtrlCmdGpFifoScheduleC36F" -#endif - }, - { /* [45] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdBindC36F_2c1c21, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xc36f0104u, - /*paramSize=*/ sizeof(NVC36F_CTRL_BIND_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kchannelCtrlCmdBindC36F" -#endif - }, - { /* [46] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [26] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGpfifoGetWorkSubmitToken_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xc36f0108u, /*paramSize=*/ sizeof(NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS), @@ -942,13 +522,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh /*func=*/ "kchannelCtrlCmdGpfifoGetWorkSubmitToken" #endif }, - { /* [47] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2204u) + { /* [27] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2204u) - /*flags=*/ 0x2204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) + /*flags=*/ 0x244u, /*accessRight=*/0x0u, /*methodId=*/ 0xc36f0109u, /*paramSize=*/ sizeof(NVC36F_CTRL_GPFIFO_UPDATE_FAULT_METHOD_BUFFER_PARAMS), @@ -957,13 +537,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh /*func=*/ "kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer" #endif }, - { /* [48] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [28] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGpfifoSetWorkSubmitTokenNotifIndex_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xc36f010au, /*paramSize=*/ sizeof(NVC36F_CTRL_GPFIFO_SET_WORK_SUBMIT_TOKEN_NOTIF_INDEX_PARAMS), @@ -972,13 +552,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh /*func=*/ "kchannelCtrlCmdGpfifoSetWorkSubmitTokenNotifIndex" #endif }, - { /* [49] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2010u) + { /* [29] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdGetKmb_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2010u) - /*flags=*/ 0x2010u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) + /*flags=*/ 0x208u, /*accessRight=*/0x0u, /*methodId=*/ 0xc56f010bu, /*paramSize=*/ sizeof(NVC56F_CTRL_CMD_GET_KMB_PARAMS), @@ -987,13 +567,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh /*func=*/ "kchannelCtrlCmdGetKmb" #endif }, - { /* [50] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2010u) + { /* [30] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kchannelCtrlRotateSecureChannelIv_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2010u) - /*flags=*/ 0x2010u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) + /*flags=*/ 0x208u, /*accessRight=*/0x0u, /*methodId=*/ 0xc56f010cu, /*paramSize=*/ sizeof(NVC56F_CTRL_ROTATE_SECURE_CHANNEL_IV_PARAMS), @@ -1005,9 +585,165 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh }; +// 5 down-thunk(s) defined to bridge methods in KernelChannel from superclasses + +// kchannelMap: virtual override (res) base (gpures) +static NV_STATUS __nvoc_down_thunk_KernelChannel_gpuresMap(struct GpuResource *pKernelChannel, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return kchannelMap((struct KernelChannel *)(((unsigned char *) pKernelChannel) - __nvoc_rtti_KernelChannel_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// kchannelUnmap: virtual override (res) base (gpures) +static NV_STATUS __nvoc_down_thunk_KernelChannel_gpuresUnmap(struct GpuResource *pKernelChannel, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return kchannelUnmap((struct KernelChannel *)(((unsigned char *) pKernelChannel) - __nvoc_rtti_KernelChannel_GpuResource.offset), pCallContext, pCpuMapping); +} + +// kchannelGetMapAddrSpace: virtual override (gpures) base (gpures) +static NV_STATUS __nvoc_down_thunk_KernelChannel_gpuresGetMapAddrSpace(struct GpuResource *pKernelChannel, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return kchannelGetMapAddrSpace((struct KernelChannel *)(((unsigned char *) pKernelChannel) - __nvoc_rtti_KernelChannel_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + +// kchannelGetMemInterMapParams: virtual override (rmres) base (gpures) +static NV_STATUS __nvoc_down_thunk_KernelChannel_rmresGetMemInterMapParams(struct RmResource *pKernelChannel, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return kchannelGetMemInterMapParams((struct KernelChannel *)(((unsigned char *) pKernelChannel) - __nvoc_rtti_KernelChannel_RmResource.offset), pParams); +} + +// kchannelCheckMemInterUnmap: virtual override (rmres) base (gpures) +static NV_STATUS __nvoc_down_thunk_KernelChannel_rmresCheckMemInterUnmap(struct RmResource *pKernelChannel, NvBool bSubdeviceHandleProvided) { + return kchannelCheckMemInterUnmap((struct KernelChannel *)(((unsigned char *) pKernelChannel) - __nvoc_rtti_KernelChannel_RmResource.offset), bSubdeviceHandleProvided); +} + + +// 25 up-thunk(s) defined to bridge methods in KernelChannel to superclasses + +// kchannelControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kchannelControl(struct KernelChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannel_GpuResource.offset), pCallContext, pParams); +} + +// kchannelShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_kchannelShareCallback(struct KernelChannel *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannel_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// kchannelGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kchannelGetRegBaseOffsetAndSize(struct KernelChannel *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannel_GpuResource.offset), pGpu, pOffset, pSize); +} + +// kchannelInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kchannelInternalControlForward(struct KernelChannel *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannel_GpuResource.offset), command, pParams, size); +} + +// kchannelGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_kchannelGetInternalObjectHandle(struct KernelChannel *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannel_GpuResource.offset)); +} + +// kchannelAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_kchannelAccessCallback(struct KernelChannel *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// kchannelGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kchannelGetMemoryMappingDescriptor(struct KernelChannel *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelChannel_RmResource.offset), ppMemDesc); +} + +// kchannelControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kchannelControlSerialization_Prologue(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RmResource.offset), pCallContext, pParams); +} + +// kchannelControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_kchannelControlSerialization_Epilogue(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RmResource.offset), pCallContext, pParams); +} + +// kchannelControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kchannelControl_Prologue(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RmResource.offset), pCallContext, pParams); +} + +// kchannelControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_kchannelControl_Epilogue(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RmResource.offset), pCallContext, pParams); +} + +// kchannelCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_kchannelCanCopy(struct KernelChannel *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RsResource.offset)); +} + +// kchannelIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kchannelIsDuplicate(struct KernelChannel *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RsResource.offset), hMemory, pDuplicate); +} + +// kchannelPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_kchannelPreDestruct(struct KernelChannel *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RsResource.offset)); +} + +// kchannelControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kchannelControlFilter(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RsResource.offset), pCallContext, pParams); +} + +// kchannelIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_kchannelIsPartialUnmapSupported(struct KernelChannel *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RsResource.offset)); +} + +// kchannelMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kchannelMapTo(struct KernelChannel *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RsResource.offset), pParams); +} + +// kchannelUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kchannelUnmapFrom(struct KernelChannel *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RsResource.offset), pParams); +} + +// kchannelGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_kchannelGetRefCount(struct KernelChannel *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RsResource.offset)); +} + +// kchannelAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_kchannelAddAdditionalDependants(struct RsClient *pClient, struct KernelChannel *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RsResource.offset), pReference); +} + +// kchannelGetNotificationListPtr: virtual inherited (notify) base (notify) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_kchannelGetNotificationListPtr(struct KernelChannel *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelChannel_Notifier.offset)); +} + +// kchannelGetNotificationShare: virtual inherited (notify) base (notify) +static struct NotifShare * __nvoc_up_thunk_Notifier_kchannelGetNotificationShare(struct KernelChannel *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelChannel_Notifier.offset)); +} + +// kchannelSetNotificationShare: virtual inherited (notify) base (notify) +static void __nvoc_up_thunk_Notifier_kchannelSetNotificationShare(struct KernelChannel *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelChannel_Notifier.offset), pNotifShare); +} + +// kchannelUnregisterEvent: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_kchannelUnregisterEvent(struct KernelChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelChannel_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +} + +// kchannelGetOrAllocNotifShare: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_kchannelGetOrAllocNotifShare(struct KernelChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelChannel_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelChannel = { - /*numEntries=*/ 51, + /*numEntries=*/ 31, /*pExportEntries=*/ __nvoc_exported_method_def_KernelChannel }; @@ -1057,6 +793,7 @@ NV_STATUS __nvoc_ctor_KernelChannel(KernelChannel *pThis, RmHalspecOwner *pRmhal return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelChannel_1(KernelChannel *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -1069,17 +806,27 @@ static void __nvoc_init_funcTable_KernelChannel_1(KernelChannel *pThis, RmHalspe PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); + // kchannelMap -- virtual override (res) base (gpures) pThis->__kchannelMap__ = &kchannelMap_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresMap__ = &__nvoc_down_thunk_KernelChannel_gpuresMap; + // kchannelUnmap -- virtual override (res) base (gpures) pThis->__kchannelUnmap__ = &kchannelUnmap_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresUnmap__ = &__nvoc_down_thunk_KernelChannel_gpuresUnmap; + // kchannelGetMapAddrSpace -- virtual override (gpures) base (gpures) pThis->__kchannelGetMapAddrSpace__ = &kchannelGetMapAddrSpace_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_down_thunk_KernelChannel_gpuresGetMapAddrSpace; + // kchannelGetMemInterMapParams -- virtual override (rmres) base (gpures) pThis->__kchannelGetMemInterMapParams__ = &kchannelGetMemInterMapParams_IMPL; + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_KernelChannel_rmresGetMemInterMapParams; + // kchannelCheckMemInterUnmap -- virtual override (rmres) base (gpures) pThis->__kchannelCheckMemInterUnmap__ = &kchannelCheckMemInterUnmap_IMPL; + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_KernelChannel_rmresCheckMemInterUnmap; - // Hal function -- kchannelCreateUserMemDesc + // kchannelCreateUserMemDesc -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kchannelCreateUserMemDesc__ = &kchannelCreateUserMemDesc_GA10B; @@ -1089,7 +836,7 @@ static void __nvoc_init_funcTable_KernelChannel_1(KernelChannel *pThis, RmHalspe pThis->__kchannelCreateUserMemDesc__ = &kchannelCreateUserMemDesc_GM107; } - // Hal function -- kchannelIsUserdAddrSizeValid + // kchannelIsUserdAddrSizeValid -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kchannelIsUserdAddrSizeValid__ = &kchannelIsUserdAddrSizeValid_GH100; @@ -1103,187 +850,132 @@ static void __nvoc_init_funcTable_KernelChannel_1(KernelChannel *pThis, RmHalspe pThis->__kchannelIsUserdAddrSizeValid__ = &kchannelIsUserdAddrSizeValid_GA100; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchannelCtrlCmdResetIsolatedChannel -- exported (id=0x506f0105) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchannelCtrlCmdResetIsolatedChannel__ = &kchannelCtrlCmdResetIsolatedChannel_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2610u) + // kchannelCtrlCmdInternalResetIsolatedChannel -- exported (id=0x506f0106) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c8u) pThis->__kchannelCtrlCmdInternalResetIsolatedChannel__ = &kchannelCtrlCmdInternalResetIsolatedChannel_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchannelCtrlCmdGetClassEngineid -- exported (id=0x906f0101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchannelCtrlCmdGetClassEngineid__ = &kchannelCtrlCmdGetClassEngineid_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchannelCtrlCmdResetChannel -- exported (id=0x906f0102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchannelCtrlCmdResetChannel__ = &kchannelCtrlCmdResetChannel_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // kchannelCtrlCmdGetDeferRCState -- exported (id=0x906f0105) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__kchannelCtrlCmdGetDeferRCState__ = &kchannelCtrlCmdGetDeferRCState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // kchannelCtrlCmdGetMmuFaultInfo -- exported (id=0x906f0106) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__kchannelCtrlCmdGetMmuFaultInfo__ = &kchannelCtrlCmdGetMmuFaultInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchannelCtrlCmdEventSetNotification -- exported (id=0x906f0203) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchannelCtrlCmdEventSetNotification__ = &kchannelCtrlCmdEventSetNotification_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__kchannelCtrlCmdGetClassEngineidA06F__ = &kchannelCtrlCmdGetClassEngineidA06F_6a9a13; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__kchannelCtrlCmdResetChannelA06F__ = &kchannelCtrlCmdResetChannelA06F_ef73a1; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchannelCtrlCmdGpFifoSchedule -- exported (id=0xa06f0103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchannelCtrlCmdGpFifoSchedule__ = &kchannelCtrlCmdGpFifoSchedule_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchannelCtrlCmdBind -- exported (id=0xa06f0104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchannelCtrlCmdBind__ = &kchannelCtrlCmdBind_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - pThis->__kchannelCtrlCmdGetMmuFaultInfoA06F__ = &kchannelCtrlCmdGetMmuFaultInfoA06F_a7f9ac; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchannelCtrlCmdSetErrorNotifier -- exported (id=0xa06f0108) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchannelCtrlCmdSetErrorNotifier__ = &kchannelCtrlCmdSetErrorNotifier_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x110u) + // kchannelCtrlCmdSetInterleaveLevel -- exported (id=0xa06f0109) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x28u) pThis->__kchannelCtrlCmdSetInterleaveLevel__ = &kchannelCtrlCmdSetInterleaveLevel_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - pThis->__kchannelCtrlCmdRestartRunlist__ = &kchannelCtrlCmdRestartRunlist_IMPL; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__kchannelCtrlCmdGetClassEngineidA16F__ = &kchannelCtrlCmdGetClassEngineidA16F_6a9a13; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__kchannelCtrlCmdResetChannelA16F__ = &kchannelCtrlCmdResetChannelA16F_ef73a1; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__kchannelCtrlCmdGpFifoScheduleA16F__ = &kchannelCtrlCmdGpFifoScheduleA16F_6546a6; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__kchannelCtrlCmdGetClassEngineidA26F__ = &kchannelCtrlCmdGetClassEngineidA26F_6a9a13; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__kchannelCtrlCmdResetChannelA26F__ = &kchannelCtrlCmdResetChannelA26F_ef73a1; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__kchannelFCtrlCmdGpFifoScheduleA26F__ = &kchannelFCtrlCmdGpFifoScheduleA26F_6546a6; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__kchannelCtrlCmdGetClassEngineidB06F__ = &kchannelCtrlCmdGetClassEngineidB06F_6a9a13; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__kchannelCtrlCmdResetChannelB06F__ = &kchannelCtrlCmdResetChannelB06F_ef73a1; + // kchannelCtrlCmdGetContextId -- exported (id=0xa06f0113) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + pThis->__kchannelCtrlCmdGetContextId__ = &kchannelCtrlCmdGetContextId_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__kchannelCtrlCmdGpFifoScheduleB06F__ = &kchannelCtrlCmdGpFifoScheduleB06F_6546a6; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__kchannelCtrlCmdBindB06F__ = &kchannelCtrlCmdBindB06F_2c1c21; + // kchannelCtrlCmdRestartRunlist -- exported (id=0xa06f0111) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + pThis->__kchannelCtrlCmdRestartRunlist__ = &kchannelCtrlCmdRestartRunlist_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // kchannelCtrlCmdGetEngineCtxSize -- exported (id=0xb06f010b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__kchannelCtrlCmdGetEngineCtxSize__ = &kchannelCtrlCmdGetEngineCtxSize_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // kchannelCtrlCmdGetEngineCtxData -- exported (id=0xb06f010c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__kchannelCtrlCmdGetEngineCtxData__ = &kchannelCtrlCmdGetEngineCtxData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x42204u) + // kchannelCtrlCmdMigrateEngineCtxData -- exported (id=0xb06f010d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4244u) pThis->__kchannelCtrlCmdMigrateEngineCtxData__ = &kchannelCtrlCmdMigrateEngineCtxData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // kchannelCtrlCmdGetEngineCtxState -- exported (id=0xb06f010e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__kchannelCtrlCmdGetEngineCtxState__ = &kchannelCtrlCmdGetEngineCtxState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // kchannelCtrlCmdGetChannelHwState -- exported (id=0xb06f010f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__kchannelCtrlCmdGetChannelHwState__ = &kchannelCtrlCmdGetChannelHwState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x142204u) + // kchannelCtrlCmdSetChannelHwState -- exported (id=0xb06f0110) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14244u) pThis->__kchannelCtrlCmdSetChannelHwState__ = &kchannelCtrlCmdSetChannelHwState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // kchannelCtrlCmdSaveEngineCtxData -- exported (id=0xb06f0111) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__kchannelCtrlCmdSaveEngineCtxData__ = &kchannelCtrlCmdSaveEngineCtxData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x142204u) + // kchannelCtrlCmdRestoreEngineCtxData -- exported (id=0xb06f0112) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14244u) pThis->__kchannelCtrlCmdRestoreEngineCtxData__ = &kchannelCtrlCmdRestoreEngineCtxData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__kchannelCtrlCmdGetClassEngineidC06F__ = &kchannelCtrlCmdGetClassEngineidC06F_6a9a13; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__kchannelCtrlCmdResetChannelC06F__ = &kchannelCtrlCmdResetChannelC06F_ef73a1; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__kchannelCtrlCmdGpFifoScheduleC06F__ = &kchannelCtrlCmdGpFifoScheduleC06F_6546a6; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__kchannelCtrlCmdBindC06F__ = &kchannelCtrlCmdBindC06F_2c1c21; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__kchannelCtrlCmdGetClassEngineidC36F__ = &kchannelCtrlCmdGetClassEngineidC36F_6a9a13; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__kchannelCtrlCmdResetChannelC36F__ = &kchannelCtrlCmdResetChannelC36F_ef73a1; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__kchannelCtrlCmdGpFifoScheduleC36F__ = &kchannelCtrlCmdGpFifoScheduleC36F_6546a6; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__kchannelCtrlCmdBindC36F__ = &kchannelCtrlCmdBindC36F_2c1c21; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchannelCtrlCmdGpfifoGetWorkSubmitToken -- exported (id=0xc36f0108) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchannelCtrlCmdGpfifoGetWorkSubmitToken__ = &kchannelCtrlCmdGpfifoGetWorkSubmitToken_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2204u) + // kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer -- exported (id=0xc36f0109) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) pThis->__kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer__ = &kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchannelCtrlCmdGpfifoSetWorkSubmitTokenNotifIndex -- exported (id=0xc36f010a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchannelCtrlCmdGpfifoSetWorkSubmitTokenNotifIndex__ = &kchannelCtrlCmdGpfifoSetWorkSubmitTokenNotifIndex_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchannelCtrlCmdStopChannel -- exported (id=0xa06f0112) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchannelCtrlCmdStopChannel__ = &kchannelCtrlCmdStopChannel_IMPL; #endif - // Hal function -- kchannelCtrlCmdGetKmb + // kchannelCtrlCmdGetKmb -- halified (2 hals) exported (id=0xc56f010b) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kchannelCtrlCmdGetKmb__ = &kchannelCtrlCmdGetKmb_46f6a7; @@ -1293,7 +985,7 @@ static void __nvoc_init_funcTable_KernelChannel_1(KernelChannel *pThis, RmHalspe pThis->__kchannelCtrlCmdGetKmb__ = &kchannelCtrlCmdGetKmb_KERNEL; } - // Hal function -- kchannelCtrlRotateSecureChannelIv + // kchannelCtrlRotateSecureChannelIv -- halified (2 hals) exported (id=0xc56f010c) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kchannelCtrlRotateSecureChannelIv__ = &kchannelCtrlRotateSecureChannelIv_46f6a7; @@ -1303,23 +995,37 @@ static void __nvoc_init_funcTable_KernelChannel_1(KernelChannel *pThis, RmHalspe pThis->__kchannelCtrlRotateSecureChannelIv__ = &kchannelCtrlRotateSecureChannelIv_KERNEL; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchannelSetEncryptionStatsBuffer -- halified (2 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__kchannelSetEncryptionStatsBuffer__ = &kchannelSetEncryptionStatsBuffer_56cd7a; + } + else + { + pThis->__kchannelSetEncryptionStatsBuffer__ = &kchannelSetEncryptionStatsBuffer_KERNEL; + } + + // kchannelCtrlGetTpcPartitionMode -- inline exported (id=0x900103) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchannelCtrlGetTpcPartitionMode__ = &kchannelCtrlGetTpcPartitionMode_a094e1; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchannelCtrlSetTpcPartitionMode -- inline exported (id=0x900101) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchannelCtrlSetTpcPartitionMode__ = &kchannelCtrlSetTpcPartitionMode_a094e1; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchannelCtrlGetMMUDebugMode -- inline exported (id=0x900105) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchannelCtrlGetMMUDebugMode__ = &kchannelCtrlGetMMUDebugMode_a094e1; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kchannelCtrlProgramVidmemPromote -- inline exported (id=0x900107) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchannelCtrlProgramVidmemPromote__ = &kchannelCtrlProgramVidmemPromote_a094e1; #endif - // Hal function -- kchannelRetrieveKmb + // kchannelRetrieveKmb -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kchannelRetrieveKmb__ = &kchannelRetrieveKmb_56cd7a; @@ -1329,7 +1035,7 @@ static void __nvoc_init_funcTable_KernelChannel_1(KernelChannel *pThis, RmHalspe pThis->__kchannelRetrieveKmb__ = &kchannelRetrieveKmb_KERNEL; } - // Hal function -- kchannelSetKeyRotationNotifier + // kchannelSetKeyRotationNotifier -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kchannelSetKeyRotationNotifier__ = &kchannelSetKeyRotationNotifier_56cd7a; @@ -1339,78 +1045,87 @@ static void __nvoc_init_funcTable_KernelChannel_1(KernelChannel *pThis, RmHalspe pThis->__kchannelSetKeyRotationNotifier__ = &kchannelSetKeyRotationNotifier_KERNEL; } - // Hal function -- kchannelSetEncryptionStatsBuffer - if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ - { - pThis->__kchannelSetEncryptionStatsBuffer__ = &kchannelSetEncryptionStatsBuffer_56cd7a; - } - else - { - pThis->__kchannelSetEncryptionStatsBuffer__ = &kchannelSetEncryptionStatsBuffer_KERNEL; - } - - pThis->__nvoc_base_GpuResource.__gpuresMap__ = &__nvoc_thunk_KernelChannel_gpuresMap; - - pThis->__nvoc_base_GpuResource.__gpuresUnmap__ = &__nvoc_thunk_KernelChannel_gpuresUnmap; + // kchannelControl -- virtual inherited (gpures) base (gpures) + pThis->__kchannelControl__ = &__nvoc_up_thunk_GpuResource_kchannelControl; - pThis->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_thunk_KernelChannel_gpuresGetMapAddrSpace; + // kchannelShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__kchannelShareCallback__ = &__nvoc_up_thunk_GpuResource_kchannelShareCallback; - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ = &__nvoc_thunk_KernelChannel_rmresGetMemInterMapParams; + // kchannelGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__kchannelGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kchannelGetRegBaseOffsetAndSize; - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_thunk_KernelChannel_rmresCheckMemInterUnmap; + // kchannelInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__kchannelInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kchannelInternalControlForward; - pThis->__kchannelShareCallback__ = &__nvoc_thunk_GpuResource_kchannelShareCallback; + // kchannelGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__kchannelGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kchannelGetInternalObjectHandle; - pThis->__kchannelGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_kchannelGetOrAllocNotifShare; + // kchannelAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__kchannelAccessCallback__ = &__nvoc_up_thunk_RmResource_kchannelAccessCallback; - pThis->__kchannelMapTo__ = &__nvoc_thunk_RsResource_kchannelMapTo; + // kchannelGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__kchannelGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kchannelGetMemoryMappingDescriptor; - pThis->__kchannelSetNotificationShare__ = &__nvoc_thunk_Notifier_kchannelSetNotificationShare; + // kchannelControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__kchannelControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kchannelControlSerialization_Prologue; - pThis->__kchannelGetRefCount__ = &__nvoc_thunk_RsResource_kchannelGetRefCount; + // kchannelControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__kchannelControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kchannelControlSerialization_Epilogue; - pThis->__kchannelAddAdditionalDependants__ = &__nvoc_thunk_RsResource_kchannelAddAdditionalDependants; + // kchannelControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__kchannelControl_Prologue__ = &__nvoc_up_thunk_RmResource_kchannelControl_Prologue; - pThis->__kchannelControl_Prologue__ = &__nvoc_thunk_RmResource_kchannelControl_Prologue; + // kchannelControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__kchannelControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kchannelControl_Epilogue; - pThis->__kchannelGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_kchannelGetRegBaseOffsetAndSize; + // kchannelCanCopy -- virtual inherited (res) base (gpures) + pThis->__kchannelCanCopy__ = &__nvoc_up_thunk_RsResource_kchannelCanCopy; - pThis->__kchannelInternalControlForward__ = &__nvoc_thunk_GpuResource_kchannelInternalControlForward; + // kchannelIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__kchannelIsDuplicate__ = &__nvoc_up_thunk_RsResource_kchannelIsDuplicate; - pThis->__kchannelUnmapFrom__ = &__nvoc_thunk_RsResource_kchannelUnmapFrom; + // kchannelPreDestruct -- virtual inherited (res) base (gpures) + pThis->__kchannelPreDestruct__ = &__nvoc_up_thunk_RsResource_kchannelPreDestruct; - pThis->__kchannelControl_Epilogue__ = &__nvoc_thunk_RmResource_kchannelControl_Epilogue; + // kchannelControlFilter -- virtual inherited (res) base (gpures) + pThis->__kchannelControlFilter__ = &__nvoc_up_thunk_RsResource_kchannelControlFilter; - pThis->__kchannelGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_kchannelGetInternalObjectHandle; + // kchannelIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__kchannelIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kchannelIsPartialUnmapSupported; - pThis->__kchannelControl__ = &__nvoc_thunk_GpuResource_kchannelControl; + // kchannelMapTo -- virtual inherited (res) base (gpures) + pThis->__kchannelMapTo__ = &__nvoc_up_thunk_RsResource_kchannelMapTo; - pThis->__kchannelGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_kchannelGetMemoryMappingDescriptor; + // kchannelUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__kchannelUnmapFrom__ = &__nvoc_up_thunk_RsResource_kchannelUnmapFrom; - pThis->__kchannelControlFilter__ = &__nvoc_thunk_RsResource_kchannelControlFilter; + // kchannelGetRefCount -- virtual inherited (res) base (gpures) + pThis->__kchannelGetRefCount__ = &__nvoc_up_thunk_RsResource_kchannelGetRefCount; - pThis->__kchannelUnregisterEvent__ = &__nvoc_thunk_Notifier_kchannelUnregisterEvent; + // kchannelAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__kchannelAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kchannelAddAdditionalDependants; - pThis->__kchannelControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_kchannelControlSerialization_Prologue; + // kchannelGetNotificationListPtr -- virtual inherited (notify) base (notify) + pThis->__kchannelGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_kchannelGetNotificationListPtr; - pThis->__kchannelCanCopy__ = &__nvoc_thunk_RsResource_kchannelCanCopy; + // kchannelGetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__kchannelGetNotificationShare__ = &__nvoc_up_thunk_Notifier_kchannelGetNotificationShare; - pThis->__kchannelIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_kchannelIsPartialUnmapSupported; + // kchannelSetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__kchannelSetNotificationShare__ = &__nvoc_up_thunk_Notifier_kchannelSetNotificationShare; - pThis->__kchannelPreDestruct__ = &__nvoc_thunk_RsResource_kchannelPreDestruct; + // kchannelUnregisterEvent -- virtual inherited (notify) base (notify) + pThis->__kchannelUnregisterEvent__ = &__nvoc_up_thunk_Notifier_kchannelUnregisterEvent; - pThis->__kchannelIsDuplicate__ = &__nvoc_thunk_RsResource_kchannelIsDuplicate; + // kchannelGetOrAllocNotifShare -- virtual inherited (notify) base (notify) + pThis->__kchannelGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_kchannelGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_KernelChannel_1 with approximately 79 basic block(s). - pThis->__kchannelControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_kchannelControlSerialization_Epilogue; - - pThis->__kchannelGetNotificationListPtr__ = &__nvoc_thunk_Notifier_kchannelGetNotificationListPtr; - - pThis->__kchannelGetNotificationShare__ = &__nvoc_thunk_Notifier_kchannelGetNotificationShare; - - pThis->__kchannelAccessCallback__ = &__nvoc_thunk_RmResource_kchannelAccessCallback; -} +// Initialize vtable(s) for 66 virtual method(s). void __nvoc_init_funcTable_KernelChannel(KernelChannel *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 66 per-object function pointer(s). __nvoc_init_funcTable_KernelChannel_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_channel_nvoc.h b/src/nvidia/generated/g_kernel_channel_nvoc.h index fa5bd3fe4e..1e290bff4f 100644 --- a/src/nvidia/generated/g_kernel_channel_nvoc.h +++ b/src/nvidia/generated/g_kernel_channel_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_KERNEL_CHANNEL_NVOC_H_ #define _G_KERNEL_CHANNEL_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,13 +36,13 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_channel_nvoc.h" #ifndef KERNEL_CHANNEL_H #define KERNEL_CHANNEL_H #include "core/core.h" -#include "os/os.h" #include "resserv/resserv.h" #include "nvoc/prelude.h" #include "gpu/gpu_resource.h" @@ -60,6 +67,7 @@ extern "C" { #include "cc_drv.h" + struct OBJGPU; #ifndef __NVOC_CLASS_OBJGPU_TYPEDEF__ @@ -72,6 +80,7 @@ typedef struct OBJGPU OBJGPU; #endif /* __nvoc_class_id_OBJGPU */ + struct UserInfo; #ifndef __NVOC_CLASS_UserInfo_TYPEDEF__ @@ -188,6 +197,11 @@ typedef struct _def_instance_block #define NV_KERNELCHANNEL_ALLOC_INTERNALFLAGS_ECC_ERROR_NOTIFIER_TYPE_CTXDMA ERROR_NOTIFIER_TYPE_CTXDMA #define NV_KERNELCHANNEL_ALLOC_INTERNALFLAGS_ECC_ERROR_NOTIFIER_TYPE_MEMORY ERROR_NOTIFIER_TYPE_MEMORY +// Channel is created by GSP RM +#define NV_KERNELCHANNEL_ALLOC_INTERNALFLAGS_GSP_OWNED 6:6 +#define NV_KERNELCHANNEL_ALLOC_INTERNALFLAGS_GSP_OWNED_NO 0x0 +#define NV_KERNELCHANNEL_ALLOC_INTERNALFLAGS_GSP_OWNED_YES 0x1 + /*! * Class for the kernel side of a Channel object. */ @@ -201,104 +215,95 @@ typedef struct _def_instance_block #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelChannel { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; struct Notifier __nvoc_base_Notifier; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct KernelChannel *__nvoc_pbase_KernelChannel; - NV_STATUS (*__kchannelMap__)(struct KernelChannel *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NV_STATUS (*__kchannelUnmap__)(struct KernelChannel *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__kchannelGetMapAddrSpace__)(struct KernelChannel *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NV_STATUS (*__kchannelGetMemInterMapParams__)(struct KernelChannel *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__kchannelCheckMemInterUnmap__)(struct KernelChannel *, NvBool); - NV_STATUS (*__kchannelCreateUserMemDesc__)(struct OBJGPU *, struct KernelChannel *); - NvBool (*__kchannelIsUserdAddrSizeValid__)(struct KernelChannel *, NvU32, NvU32); - NV_STATUS (*__kchannelCtrlCmdResetIsolatedChannel__)(struct KernelChannel *, NV506F_CTRL_CMD_RESET_ISOLATED_CHANNEL_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdInternalResetIsolatedChannel__)(struct KernelChannel *, NV506F_CTRL_CMD_INTERNAL_RESET_ISOLATED_CHANNEL_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGetClassEngineid__)(struct KernelChannel *, NV906F_CTRL_GET_CLASS_ENGINEID_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdResetChannel__)(struct KernelChannel *, NV906F_CTRL_CMD_RESET_CHANNEL_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGetDeferRCState__)(struct KernelChannel *, NV906F_CTRL_CMD_GET_DEFER_RC_STATE_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGetMmuFaultInfo__)(struct KernelChannel *, NV906F_CTRL_GET_MMU_FAULT_INFO_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdEventSetNotification__)(struct KernelChannel *, NV906F_CTRL_EVENT_SET_NOTIFICATION_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGetClassEngineidA06F__)(struct KernelChannel *, NVA06F_CTRL_GET_CLASS_ENGINEID_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdResetChannelA06F__)(struct KernelChannel *, NVA06F_CTRL_CMD_RESET_CHANNEL_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGpFifoSchedule__)(struct KernelChannel *, NVA06F_CTRL_GPFIFO_SCHEDULE_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdBind__)(struct KernelChannel *, NVA06F_CTRL_BIND_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGetMmuFaultInfoA06F__)(struct KernelChannel *, NVA06F_CTRL_GET_MMU_FAULT_INFO_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdSetErrorNotifier__)(struct KernelChannel *, NVA06F_CTRL_SET_ERROR_NOTIFIER_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdSetInterleaveLevel__)(struct KernelChannel *, NVA06F_CTRL_INTERLEAVE_LEVEL_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdRestartRunlist__)(struct KernelChannel *, NVA06F_CTRL_RESTART_RUNLIST_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGetClassEngineidA16F__)(struct KernelChannel *, NVA16F_CTRL_GET_CLASS_ENGINEID_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdResetChannelA16F__)(struct KernelChannel *, NVA16F_CTRL_CMD_RESET_CHANNEL_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGpFifoScheduleA16F__)(struct KernelChannel *, NVA16F_CTRL_GPFIFO_SCHEDULE_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGetClassEngineidA26F__)(struct KernelChannel *, NVA26F_CTRL_GET_CLASS_ENGINEID_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdResetChannelA26F__)(struct KernelChannel *, NVA26F_CTRL_CMD_RESET_CHANNEL_PARAMS *); - NV_STATUS (*__kchannelFCtrlCmdGpFifoScheduleA26F__)(struct KernelChannel *, NVA26F_CTRL_GPFIFO_SCHEDULE_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGetClassEngineidB06F__)(struct KernelChannel *, NVB06F_CTRL_GET_CLASS_ENGINEID_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdResetChannelB06F__)(struct KernelChannel *, NVB06F_CTRL_CMD_RESET_CHANNEL_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGpFifoScheduleB06F__)(struct KernelChannel *, NVB06F_CTRL_GPFIFO_SCHEDULE_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdBindB06F__)(struct KernelChannel *, NVB06F_CTRL_BIND_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGetEngineCtxSize__)(struct KernelChannel *, NVB06F_CTRL_GET_ENGINE_CTX_SIZE_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGetEngineCtxData__)(struct KernelChannel *, NVB06F_CTRL_GET_ENGINE_CTX_DATA_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdMigrateEngineCtxData__)(struct KernelChannel *, NVB06F_CTRL_MIGRATE_ENGINE_CTX_DATA_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGetEngineCtxState__)(struct KernelChannel *, NVB06F_CTRL_GET_ENGINE_CTX_STATE_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGetChannelHwState__)(struct KernelChannel *, NVB06F_CTRL_GET_CHANNEL_HW_STATE_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdSetChannelHwState__)(struct KernelChannel *, NVB06F_CTRL_SET_CHANNEL_HW_STATE_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdSaveEngineCtxData__)(struct KernelChannel *, NVB06F_CTRL_SAVE_ENGINE_CTX_DATA_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdRestoreEngineCtxData__)(struct KernelChannel *, NVB06F_CTRL_RESTORE_ENGINE_CTX_DATA_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGetClassEngineidC06F__)(struct KernelChannel *, NVC06F_CTRL_GET_CLASS_ENGINEID_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdResetChannelC06F__)(struct KernelChannel *, NVC06F_CTRL_CMD_RESET_CHANNEL_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGpFifoScheduleC06F__)(struct KernelChannel *, NVC06F_CTRL_GPFIFO_SCHEDULE_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdBindC06F__)(struct KernelChannel *, NVC06F_CTRL_BIND_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGetClassEngineidC36F__)(struct KernelChannel *, NVC36F_CTRL_GET_CLASS_ENGINEID_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdResetChannelC36F__)(struct KernelChannel *, NVC36F_CTRL_CMD_RESET_CHANNEL_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGpFifoScheduleC36F__)(struct KernelChannel *, NVC36F_CTRL_GPFIFO_SCHEDULE_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdBindC36F__)(struct KernelChannel *, NVC36F_CTRL_BIND_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGpfifoGetWorkSubmitToken__)(struct KernelChannel *, NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer__)(struct KernelChannel *, NVC36F_CTRL_GPFIFO_UPDATE_FAULT_METHOD_BUFFER_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGpfifoSetWorkSubmitTokenNotifIndex__)(struct KernelChannel *, NVC36F_CTRL_GPFIFO_SET_WORK_SUBMIT_TOKEN_NOTIF_INDEX_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdStopChannel__)(struct KernelChannel *, NVA06F_CTRL_STOP_CHANNEL_PARAMS *); - NV_STATUS (*__kchannelCtrlCmdGetKmb__)(struct KernelChannel *, NVC56F_CTRL_CMD_GET_KMB_PARAMS *); - NV_STATUS (*__kchannelCtrlRotateSecureChannelIv__)(struct KernelChannel *, NVC56F_CTRL_ROTATE_SECURE_CHANNEL_IV_PARAMS *); - NV_STATUS (*__kchannelCtrlGetTpcPartitionMode__)(struct KernelChannel *, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); - NV_STATUS (*__kchannelCtrlSetTpcPartitionMode__)(struct KernelChannel *, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); - NV_STATUS (*__kchannelCtrlGetMMUDebugMode__)(struct KernelChannel *, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *); - NV_STATUS (*__kchannelCtrlProgramVidmemPromote__)(struct KernelChannel *, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *); - NV_STATUS (*__kchannelRetrieveKmb__)(struct OBJGPU *, struct KernelChannel *, ROTATE_IV_TYPE, NvBool, CC_KMB *); - NV_STATUS (*__kchannelSetKeyRotationNotifier__)(struct OBJGPU *, struct KernelChannel *, NvBool); - NV_STATUS (*__kchannelSetEncryptionStatsBuffer__)(struct OBJGPU *, struct KernelChannel *, NvBool); - NvBool (*__kchannelShareCallback__)(struct KernelChannel *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__kchannelGetOrAllocNotifShare__)(struct KernelChannel *, NvHandle, NvHandle, struct NotifShare **); - NV_STATUS (*__kchannelMapTo__)(struct KernelChannel *, RS_RES_MAP_TO_PARAMS *); - void (*__kchannelSetNotificationShare__)(struct KernelChannel *, struct NotifShare *); - NvU32 (*__kchannelGetRefCount__)(struct KernelChannel *); - void (*__kchannelAddAdditionalDependants__)(struct RsClient *, struct KernelChannel *, RsResourceRef *); - NV_STATUS (*__kchannelControl_Prologue__)(struct KernelChannel *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kchannelGetRegBaseOffsetAndSize__)(struct KernelChannel *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__kchannelInternalControlForward__)(struct KernelChannel *, NvU32, void *, NvU32); - NV_STATUS (*__kchannelUnmapFrom__)(struct KernelChannel *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__kchannelControl_Epilogue__)(struct KernelChannel *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__kchannelGetInternalObjectHandle__)(struct KernelChannel *); - NV_STATUS (*__kchannelControl__)(struct KernelChannel *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kchannelGetMemoryMappingDescriptor__)(struct KernelChannel *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__kchannelControlFilter__)(struct KernelChannel *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kchannelUnregisterEvent__)(struct KernelChannel *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__kchannelControlSerialization_Prologue__)(struct KernelChannel *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__kchannelCanCopy__)(struct KernelChannel *); - NvBool (*__kchannelIsPartialUnmapSupported__)(struct KernelChannel *); - void (*__kchannelPreDestruct__)(struct KernelChannel *); - NV_STATUS (*__kchannelIsDuplicate__)(struct KernelChannel *, NvHandle, NvBool *); - void (*__kchannelControlSerialization_Epilogue__)(struct KernelChannel *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__kchannelGetNotificationListPtr__)(struct KernelChannel *); - struct NotifShare *(*__kchannelGetNotificationShare__)(struct KernelChannel *); - NvBool (*__kchannelAccessCallback__)(struct KernelChannel *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct INotifier *__nvoc_pbase_INotifier; // inotify super^2 + struct Notifier *__nvoc_pbase_Notifier; // notify super + struct KernelChannel *__nvoc_pbase_KernelChannel; // kchannel + + // Vtable with 66 per-object function pointers + NV_STATUS (*__kchannelMap__)(struct KernelChannel * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual override (res) base (gpures) + NV_STATUS (*__kchannelUnmap__)(struct KernelChannel * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual override (res) base (gpures) + NV_STATUS (*__kchannelGetMapAddrSpace__)(struct KernelChannel * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (gpures) base (gpures) + NV_STATUS (*__kchannelGetMemInterMapParams__)(struct KernelChannel * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual override (rmres) base (gpures) + NV_STATUS (*__kchannelCheckMemInterUnmap__)(struct KernelChannel * /*this*/, NvBool); // virtual override (rmres) base (gpures) + NV_STATUS (*__kchannelCreateUserMemDesc__)(struct OBJGPU *, struct KernelChannel * /*this*/); // halified (2 hals) + NvBool (*__kchannelIsUserdAddrSizeValid__)(struct KernelChannel * /*this*/, NvU32, NvU32); // halified (3 hals) body + NV_STATUS (*__kchannelCtrlCmdResetIsolatedChannel__)(struct KernelChannel * /*this*/, NV506F_CTRL_CMD_RESET_ISOLATED_CHANNEL_PARAMS *); // exported (id=0x506f0105) + NV_STATUS (*__kchannelCtrlCmdInternalResetIsolatedChannel__)(struct KernelChannel * /*this*/, NV506F_CTRL_CMD_INTERNAL_RESET_ISOLATED_CHANNEL_PARAMS *); // exported (id=0x506f0106) + NV_STATUS (*__kchannelCtrlCmdGetClassEngineid__)(struct KernelChannel * /*this*/, NV906F_CTRL_GET_CLASS_ENGINEID_PARAMS *); // exported (id=0x906f0101) + NV_STATUS (*__kchannelCtrlCmdResetChannel__)(struct KernelChannel * /*this*/, NV906F_CTRL_CMD_RESET_CHANNEL_PARAMS *); // exported (id=0x906f0102) + NV_STATUS (*__kchannelCtrlCmdGetDeferRCState__)(struct KernelChannel * /*this*/, NV906F_CTRL_CMD_GET_DEFER_RC_STATE_PARAMS *); // exported (id=0x906f0105) + NV_STATUS (*__kchannelCtrlCmdGetMmuFaultInfo__)(struct KernelChannel * /*this*/, NV906F_CTRL_GET_MMU_FAULT_INFO_PARAMS *); // exported (id=0x906f0106) + NV_STATUS (*__kchannelCtrlCmdEventSetNotification__)(struct KernelChannel * /*this*/, NV906F_CTRL_EVENT_SET_NOTIFICATION_PARAMS *); // exported (id=0x906f0203) + NV_STATUS (*__kchannelCtrlCmdGpFifoSchedule__)(struct KernelChannel * /*this*/, NVA06F_CTRL_GPFIFO_SCHEDULE_PARAMS *); // exported (id=0xa06f0103) + NV_STATUS (*__kchannelCtrlCmdBind__)(struct KernelChannel * /*this*/, NVA06F_CTRL_BIND_PARAMS *); // exported (id=0xa06f0104) + NV_STATUS (*__kchannelCtrlCmdSetErrorNotifier__)(struct KernelChannel * /*this*/, NVA06F_CTRL_SET_ERROR_NOTIFIER_PARAMS *); // exported (id=0xa06f0108) + NV_STATUS (*__kchannelCtrlCmdSetInterleaveLevel__)(struct KernelChannel * /*this*/, NVA06F_CTRL_INTERLEAVE_LEVEL_PARAMS *); // exported (id=0xa06f0109) + NV_STATUS (*__kchannelCtrlCmdGetContextId__)(struct KernelChannel * /*this*/, NVA06F_CTRL_GET_CONTEXT_ID_PARAMS *); // exported (id=0xa06f0113) + NV_STATUS (*__kchannelCtrlCmdRestartRunlist__)(struct KernelChannel * /*this*/, NVA06F_CTRL_RESTART_RUNLIST_PARAMS *); // exported (id=0xa06f0111) + NV_STATUS (*__kchannelCtrlCmdGetEngineCtxSize__)(struct KernelChannel * /*this*/, NVB06F_CTRL_GET_ENGINE_CTX_SIZE_PARAMS *); // exported (id=0xb06f010b) + NV_STATUS (*__kchannelCtrlCmdGetEngineCtxData__)(struct KernelChannel * /*this*/, NVB06F_CTRL_GET_ENGINE_CTX_DATA_PARAMS *); // exported (id=0xb06f010c) + NV_STATUS (*__kchannelCtrlCmdMigrateEngineCtxData__)(struct KernelChannel * /*this*/, NVB06F_CTRL_MIGRATE_ENGINE_CTX_DATA_PARAMS *); // exported (id=0xb06f010d) + NV_STATUS (*__kchannelCtrlCmdGetEngineCtxState__)(struct KernelChannel * /*this*/, NVB06F_CTRL_GET_ENGINE_CTX_STATE_PARAMS *); // exported (id=0xb06f010e) + NV_STATUS (*__kchannelCtrlCmdGetChannelHwState__)(struct KernelChannel * /*this*/, NVB06F_CTRL_GET_CHANNEL_HW_STATE_PARAMS *); // exported (id=0xb06f010f) + NV_STATUS (*__kchannelCtrlCmdSetChannelHwState__)(struct KernelChannel * /*this*/, NVB06F_CTRL_SET_CHANNEL_HW_STATE_PARAMS *); // exported (id=0xb06f0110) + NV_STATUS (*__kchannelCtrlCmdSaveEngineCtxData__)(struct KernelChannel * /*this*/, NVB06F_CTRL_SAVE_ENGINE_CTX_DATA_PARAMS *); // exported (id=0xb06f0111) + NV_STATUS (*__kchannelCtrlCmdRestoreEngineCtxData__)(struct KernelChannel * /*this*/, NVB06F_CTRL_RESTORE_ENGINE_CTX_DATA_PARAMS *); // exported (id=0xb06f0112) + NV_STATUS (*__kchannelCtrlCmdGpfifoGetWorkSubmitToken__)(struct KernelChannel * /*this*/, NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS *); // exported (id=0xc36f0108) + NV_STATUS (*__kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer__)(struct KernelChannel * /*this*/, NVC36F_CTRL_GPFIFO_UPDATE_FAULT_METHOD_BUFFER_PARAMS *); // exported (id=0xc36f0109) + NV_STATUS (*__kchannelCtrlCmdGpfifoSetWorkSubmitTokenNotifIndex__)(struct KernelChannel * /*this*/, NVC36F_CTRL_GPFIFO_SET_WORK_SUBMIT_TOKEN_NOTIF_INDEX_PARAMS *); // exported (id=0xc36f010a) + NV_STATUS (*__kchannelCtrlCmdStopChannel__)(struct KernelChannel * /*this*/, NVA06F_CTRL_STOP_CHANNEL_PARAMS *); // exported (id=0xa06f0112) + NV_STATUS (*__kchannelCtrlCmdGetKmb__)(struct KernelChannel * /*this*/, NVC56F_CTRL_CMD_GET_KMB_PARAMS *); // halified (2 hals) exported (id=0xc56f010b) body + NV_STATUS (*__kchannelCtrlRotateSecureChannelIv__)(struct KernelChannel * /*this*/, NVC56F_CTRL_ROTATE_SECURE_CHANNEL_IV_PARAMS *); // halified (2 hals) exported (id=0xc56f010c) body + NV_STATUS (*__kchannelSetEncryptionStatsBuffer__)(struct OBJGPU *, struct KernelChannel * /*this*/, MEMORY_DESCRIPTOR *, NvBool); // halified (2 hals) body + NV_STATUS (*__kchannelCtrlGetTpcPartitionMode__)(struct KernelChannel * /*this*/, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); // inline exported (id=0x900103) body + NV_STATUS (*__kchannelCtrlSetTpcPartitionMode__)(struct KernelChannel * /*this*/, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); // inline exported (id=0x900101) body + NV_STATUS (*__kchannelCtrlGetMMUDebugMode__)(struct KernelChannel * /*this*/, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *); // inline exported (id=0x900105) body + NV_STATUS (*__kchannelCtrlProgramVidmemPromote__)(struct KernelChannel * /*this*/, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *); // inline exported (id=0x900107) body + NV_STATUS (*__kchannelRetrieveKmb__)(struct OBJGPU *, struct KernelChannel * /*this*/, ROTATE_IV_TYPE, NvBool, CC_KMB *); // halified (2 hals) body + NV_STATUS (*__kchannelSetKeyRotationNotifier__)(struct OBJGPU *, struct KernelChannel * /*this*/, NvBool); // halified (2 hals) body + NV_STATUS (*__kchannelControl__)(struct KernelChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NvBool (*__kchannelShareCallback__)(struct KernelChannel * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kchannelGetRegBaseOffsetAndSize__)(struct KernelChannel * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kchannelInternalControlForward__)(struct KernelChannel * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__kchannelGetInternalObjectHandle__)(struct KernelChannel * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__kchannelAccessCallback__)(struct KernelChannel * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kchannelGetMemoryMappingDescriptor__)(struct KernelChannel * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kchannelControlSerialization_Prologue__)(struct KernelChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__kchannelControlSerialization_Epilogue__)(struct KernelChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kchannelControl_Prologue__)(struct KernelChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__kchannelControl_Epilogue__)(struct KernelChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__kchannelCanCopy__)(struct KernelChannel * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__kchannelIsDuplicate__)(struct KernelChannel * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__kchannelPreDestruct__)(struct KernelChannel * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__kchannelControlFilter__)(struct KernelChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__kchannelIsPartialUnmapSupported__)(struct KernelChannel * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__kchannelMapTo__)(struct KernelChannel * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__kchannelUnmapFrom__)(struct KernelChannel * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__kchannelGetRefCount__)(struct KernelChannel * /*this*/); // virtual inherited (res) base (gpures) + void (*__kchannelAddAdditionalDependants__)(struct RsClient *, struct KernelChannel * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + PEVENTNOTIFICATION * (*__kchannelGetNotificationListPtr__)(struct KernelChannel * /*this*/); // virtual inherited (notify) base (notify) + struct NotifShare * (*__kchannelGetNotificationShare__)(struct KernelChannel * /*this*/); // virtual inherited (notify) base (notify) + void (*__kchannelSetNotificationShare__)(struct KernelChannel * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) + NV_STATUS (*__kchannelUnregisterEvent__)(struct KernelChannel * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) + NV_STATUS (*__kchannelGetOrAllocNotifShare__)(struct KernelChannel * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) + + // Data members NvU16 nextObjectClassID; struct KernelChannel *pNextBindKernelChannel; FIFO_MMU_EXCEPTION_DATA *pMmuExceptionData; @@ -320,6 +325,7 @@ struct KernelChannel { struct KernelChannelGroupApi *pKernelChannelGroupApi; struct KernelCtxShareApi *pKernelCtxShareApi; NvU32 refCount; + NvBool bGspOwned; NvBool bIsContextBound; FIFO_INSTANCE_BLOCK *pFifoHalData[8]; MEMORY_DESCRIPTOR *pInstSubDeviceMemDesc[8]; @@ -356,6 +362,7 @@ typedef struct KernelChannel KernelChannel; #define __nvoc_class_id_KernelChannel 0x5d8d70 #endif /* __nvoc_class_id_KernelChannel */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelChannel; #define __staticCast_KernelChannel(pThis) \ @@ -368,937 +375,824 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelChannel; ((KernelChannel*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelChannel))) #endif //__nvoc_kernel_channel_h_disabled - NV_STATUS __nvoc_objCreateDynamic_KernelChannel(KernelChannel**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_KernelChannel(KernelChannel**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_KernelChannel(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_KernelChannel((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define kchannelMap_FNPTR(pKernelChannel) pKernelChannel->__kchannelMap__ #define kchannelMap(pKernelChannel, pCallContext, pParams, pCpuMapping) kchannelMap_DISPATCH(pKernelChannel, pCallContext, pParams, pCpuMapping) +#define kchannelUnmap_FNPTR(pKernelChannel) pKernelChannel->__kchannelUnmap__ #define kchannelUnmap(pKernelChannel, pCallContext, pCpuMapping) kchannelUnmap_DISPATCH(pKernelChannel, pCallContext, pCpuMapping) +#define kchannelGetMapAddrSpace_FNPTR(pKernelChannel) pKernelChannel->__kchannelGetMapAddrSpace__ #define kchannelGetMapAddrSpace(pKernelChannel, pCallContext, mapFlags, pAddrSpace) kchannelGetMapAddrSpace_DISPATCH(pKernelChannel, pCallContext, mapFlags, pAddrSpace) +#define kchannelGetMemInterMapParams_FNPTR(pKernelChannel) pKernelChannel->__kchannelGetMemInterMapParams__ #define kchannelGetMemInterMapParams(pKernelChannel, pParams) kchannelGetMemInterMapParams_DISPATCH(pKernelChannel, pParams) +#define kchannelCheckMemInterUnmap_FNPTR(pKernelChannel) pKernelChannel->__kchannelCheckMemInterUnmap__ #define kchannelCheckMemInterUnmap(pKernelChannel, bSubdeviceHandleProvided) kchannelCheckMemInterUnmap_DISPATCH(pKernelChannel, bSubdeviceHandleProvided) -#define kchannelCreateUserMemDesc(pGpu, arg0) kchannelCreateUserMemDesc_DISPATCH(pGpu, arg0) -#define kchannelCreateUserMemDesc_HAL(pGpu, arg0) kchannelCreateUserMemDesc_DISPATCH(pGpu, arg0) +#define kchannelCreateUserMemDesc_FNPTR(arg_this) arg_this->__kchannelCreateUserMemDesc__ +#define kchannelCreateUserMemDesc(pGpu, arg_this) kchannelCreateUserMemDesc_DISPATCH(pGpu, arg_this) +#define kchannelCreateUserMemDesc_HAL(pGpu, arg_this) kchannelCreateUserMemDesc_DISPATCH(pGpu, arg_this) +#define kchannelIsUserdAddrSizeValid_FNPTR(pKernelChannel) pKernelChannel->__kchannelIsUserdAddrSizeValid__ #define kchannelIsUserdAddrSizeValid(pKernelChannel, userdAddrLo, userdAddrHi) kchannelIsUserdAddrSizeValid_DISPATCH(pKernelChannel, userdAddrLo, userdAddrHi) #define kchannelIsUserdAddrSizeValid_HAL(pKernelChannel, userdAddrLo, userdAddrHi) kchannelIsUserdAddrSizeValid_DISPATCH(pKernelChannel, userdAddrLo, userdAddrHi) +#define kchannelCtrlCmdResetIsolatedChannel_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdResetIsolatedChannel__ #define kchannelCtrlCmdResetIsolatedChannel(pKernelChannel, pResetParams) kchannelCtrlCmdResetIsolatedChannel_DISPATCH(pKernelChannel, pResetParams) +#define kchannelCtrlCmdInternalResetIsolatedChannel_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdInternalResetIsolatedChannel__ #define kchannelCtrlCmdInternalResetIsolatedChannel(pKernelChannel, pResetParams) kchannelCtrlCmdInternalResetIsolatedChannel_DISPATCH(pKernelChannel, pResetParams) +#define kchannelCtrlCmdGetClassEngineid_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdGetClassEngineid__ #define kchannelCtrlCmdGetClassEngineid(pKernelChannel, pParams) kchannelCtrlCmdGetClassEngineid_DISPATCH(pKernelChannel, pParams) +#define kchannelCtrlCmdResetChannel_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdResetChannel__ #define kchannelCtrlCmdResetChannel(pKernelChannel, pResetChannelParams) kchannelCtrlCmdResetChannel_DISPATCH(pKernelChannel, pResetChannelParams) +#define kchannelCtrlCmdGetDeferRCState_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdGetDeferRCState__ #define kchannelCtrlCmdGetDeferRCState(pKernelChannel, pStateParams) kchannelCtrlCmdGetDeferRCState_DISPATCH(pKernelChannel, pStateParams) +#define kchannelCtrlCmdGetMmuFaultInfo_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdGetMmuFaultInfo__ #define kchannelCtrlCmdGetMmuFaultInfo(pKernelChannel, pFaultInfoParams) kchannelCtrlCmdGetMmuFaultInfo_DISPATCH(pKernelChannel, pFaultInfoParams) +#define kchannelCtrlCmdEventSetNotification_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdEventSetNotification__ #define kchannelCtrlCmdEventSetNotification(pKernelChannel, pSetEventParams) kchannelCtrlCmdEventSetNotification_DISPATCH(pKernelChannel, pSetEventParams) -#define kchannelCtrlCmdGetClassEngineidA06F(pKernelChannel, pParams) kchannelCtrlCmdGetClassEngineidA06F_DISPATCH(pKernelChannel, pParams) -#define kchannelCtrlCmdResetChannelA06F(pKernelChannel, pResetChannelParams) kchannelCtrlCmdResetChannelA06F_DISPATCH(pKernelChannel, pResetChannelParams) +#define kchannelCtrlCmdGpFifoSchedule_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdGpFifoSchedule__ #define kchannelCtrlCmdGpFifoSchedule(pKernelChannel, pSchedParams) kchannelCtrlCmdGpFifoSchedule_DISPATCH(pKernelChannel, pSchedParams) +#define kchannelCtrlCmdBind_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdBind__ #define kchannelCtrlCmdBind(pKernelChannel, pParams) kchannelCtrlCmdBind_DISPATCH(pKernelChannel, pParams) -#define kchannelCtrlCmdGetMmuFaultInfoA06F(pKernelChannel, pFaultInfoParams) kchannelCtrlCmdGetMmuFaultInfoA06F_DISPATCH(pKernelChannel, pFaultInfoParams) +#define kchannelCtrlCmdSetErrorNotifier_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdSetErrorNotifier__ #define kchannelCtrlCmdSetErrorNotifier(pKernelChannel, pSetErrorNotifierParams) kchannelCtrlCmdSetErrorNotifier_DISPATCH(pKernelChannel, pSetErrorNotifierParams) +#define kchannelCtrlCmdSetInterleaveLevel_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdSetInterleaveLevel__ #define kchannelCtrlCmdSetInterleaveLevel(pKernelChannel, pParams) kchannelCtrlCmdSetInterleaveLevel_DISPATCH(pKernelChannel, pParams) +#define kchannelCtrlCmdGetContextId_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdGetContextId__ +#define kchannelCtrlCmdGetContextId(pKernelChannel, pParams) kchannelCtrlCmdGetContextId_DISPATCH(pKernelChannel, pParams) +#define kchannelCtrlCmdRestartRunlist_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdRestartRunlist__ #define kchannelCtrlCmdRestartRunlist(pKernelChannel, pParams) kchannelCtrlCmdRestartRunlist_DISPATCH(pKernelChannel, pParams) -#define kchannelCtrlCmdGetClassEngineidA16F(pKernelChannel, pParams) kchannelCtrlCmdGetClassEngineidA16F_DISPATCH(pKernelChannel, pParams) -#define kchannelCtrlCmdResetChannelA16F(pKernelChannel, pResetChannelParams) kchannelCtrlCmdResetChannelA16F_DISPATCH(pKernelChannel, pResetChannelParams) -#define kchannelCtrlCmdGpFifoScheduleA16F(pKernelChannel, pSchedParams) kchannelCtrlCmdGpFifoScheduleA16F_DISPATCH(pKernelChannel, pSchedParams) -#define kchannelCtrlCmdGetClassEngineidA26F(pKernelChannel, pParams) kchannelCtrlCmdGetClassEngineidA26F_DISPATCH(pKernelChannel, pParams) -#define kchannelCtrlCmdResetChannelA26F(pKernelChannel, pResetChannelParams) kchannelCtrlCmdResetChannelA26F_DISPATCH(pKernelChannel, pResetChannelParams) -#define kchannelFCtrlCmdGpFifoScheduleA26F(pKernelChannel, pSchedParams) kchannelFCtrlCmdGpFifoScheduleA26F_DISPATCH(pKernelChannel, pSchedParams) -#define kchannelCtrlCmdGetClassEngineidB06F(pKernelChannel, pParams) kchannelCtrlCmdGetClassEngineidB06F_DISPATCH(pKernelChannel, pParams) -#define kchannelCtrlCmdResetChannelB06F(pKernelChannel, pResetChannelParams) kchannelCtrlCmdResetChannelB06F_DISPATCH(pKernelChannel, pResetChannelParams) -#define kchannelCtrlCmdGpFifoScheduleB06F(pKernelChannel, pSchedParams) kchannelCtrlCmdGpFifoScheduleB06F_DISPATCH(pKernelChannel, pSchedParams) -#define kchannelCtrlCmdBindB06F(pKernelChannel, pParams) kchannelCtrlCmdBindB06F_DISPATCH(pKernelChannel, pParams) +#define kchannelCtrlCmdGetEngineCtxSize_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdGetEngineCtxSize__ #define kchannelCtrlCmdGetEngineCtxSize(pKernelChannel, pCtxSizeParams) kchannelCtrlCmdGetEngineCtxSize_DISPATCH(pKernelChannel, pCtxSizeParams) +#define kchannelCtrlCmdGetEngineCtxData_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdGetEngineCtxData__ #define kchannelCtrlCmdGetEngineCtxData(pKernelChannel, pCtxBuffParams) kchannelCtrlCmdGetEngineCtxData_DISPATCH(pKernelChannel, pCtxBuffParams) +#define kchannelCtrlCmdMigrateEngineCtxData_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdMigrateEngineCtxData__ #define kchannelCtrlCmdMigrateEngineCtxData(pKernelChannel, pCtxBuffParams) kchannelCtrlCmdMigrateEngineCtxData_DISPATCH(pKernelChannel, pCtxBuffParams) +#define kchannelCtrlCmdGetEngineCtxState_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdGetEngineCtxState__ #define kchannelCtrlCmdGetEngineCtxState(pKernelChannel, pCtxStateParams) kchannelCtrlCmdGetEngineCtxState_DISPATCH(pKernelChannel, pCtxStateParams) +#define kchannelCtrlCmdGetChannelHwState_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdGetChannelHwState__ #define kchannelCtrlCmdGetChannelHwState(pKernelChannel, pParams) kchannelCtrlCmdGetChannelHwState_DISPATCH(pKernelChannel, pParams) +#define kchannelCtrlCmdSetChannelHwState_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdSetChannelHwState__ #define kchannelCtrlCmdSetChannelHwState(pKernelChannel, pParams) kchannelCtrlCmdSetChannelHwState_DISPATCH(pKernelChannel, pParams) +#define kchannelCtrlCmdSaveEngineCtxData_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdSaveEngineCtxData__ #define kchannelCtrlCmdSaveEngineCtxData(pKernelChannel, pCtxBuffParams) kchannelCtrlCmdSaveEngineCtxData_DISPATCH(pKernelChannel, pCtxBuffParams) +#define kchannelCtrlCmdRestoreEngineCtxData_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdRestoreEngineCtxData__ #define kchannelCtrlCmdRestoreEngineCtxData(pKernelChannel, pCtxBuffParams) kchannelCtrlCmdRestoreEngineCtxData_DISPATCH(pKernelChannel, pCtxBuffParams) -#define kchannelCtrlCmdGetClassEngineidC06F(pKernelChannel, pParams) kchannelCtrlCmdGetClassEngineidC06F_DISPATCH(pKernelChannel, pParams) -#define kchannelCtrlCmdResetChannelC06F(pKernelChannel, pResetChannelParams) kchannelCtrlCmdResetChannelC06F_DISPATCH(pKernelChannel, pResetChannelParams) -#define kchannelCtrlCmdGpFifoScheduleC06F(pKernelChannel, pSchedParams) kchannelCtrlCmdGpFifoScheduleC06F_DISPATCH(pKernelChannel, pSchedParams) -#define kchannelCtrlCmdBindC06F(pKernelChannel, pParams) kchannelCtrlCmdBindC06F_DISPATCH(pKernelChannel, pParams) -#define kchannelCtrlCmdGetClassEngineidC36F(pKernelChannel, pParams) kchannelCtrlCmdGetClassEngineidC36F_DISPATCH(pKernelChannel, pParams) -#define kchannelCtrlCmdResetChannelC36F(pKernelChannel, pResetChannelParams) kchannelCtrlCmdResetChannelC36F_DISPATCH(pKernelChannel, pResetChannelParams) -#define kchannelCtrlCmdGpFifoScheduleC36F(pKernelChannel, pSchedParams) kchannelCtrlCmdGpFifoScheduleC36F_DISPATCH(pKernelChannel, pSchedParams) -#define kchannelCtrlCmdBindC36F(pKernelChannel, pParams) kchannelCtrlCmdBindC36F_DISPATCH(pKernelChannel, pParams) +#define kchannelCtrlCmdGpfifoGetWorkSubmitToken_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdGpfifoGetWorkSubmitToken__ #define kchannelCtrlCmdGpfifoGetWorkSubmitToken(pKernelChannel, pTokenParams) kchannelCtrlCmdGpfifoGetWorkSubmitToken_DISPATCH(pKernelChannel, pTokenParams) +#define kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer__ #define kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer(pKernelChannel, pFaultMthdBufferParams) kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer_DISPATCH(pKernelChannel, pFaultMthdBufferParams) +#define kchannelCtrlCmdGpfifoSetWorkSubmitTokenNotifIndex_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdGpfifoSetWorkSubmitTokenNotifIndex__ #define kchannelCtrlCmdGpfifoSetWorkSubmitTokenNotifIndex(pKernelChannel, pParams) kchannelCtrlCmdGpfifoSetWorkSubmitTokenNotifIndex_DISPATCH(pKernelChannel, pParams) +#define kchannelCtrlCmdStopChannel_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdStopChannel__ #define kchannelCtrlCmdStopChannel(pKernelChannel, pStopChannelParams) kchannelCtrlCmdStopChannel_DISPATCH(pKernelChannel, pStopChannelParams) +#define kchannelCtrlCmdGetKmb_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdGetKmb__ #define kchannelCtrlCmdGetKmb(pKernelChannel, pGetKmbParams) kchannelCtrlCmdGetKmb_DISPATCH(pKernelChannel, pGetKmbParams) #define kchannelCtrlCmdGetKmb_HAL(pKernelChannel, pGetKmbParams) kchannelCtrlCmdGetKmb_DISPATCH(pKernelChannel, pGetKmbParams) +#define kchannelCtrlRotateSecureChannelIv_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlRotateSecureChannelIv__ #define kchannelCtrlRotateSecureChannelIv(pKernelChannel, pRotateIvParams) kchannelCtrlRotateSecureChannelIv_DISPATCH(pKernelChannel, pRotateIvParams) #define kchannelCtrlRotateSecureChannelIv_HAL(pKernelChannel, pRotateIvParams) kchannelCtrlRotateSecureChannelIv_DISPATCH(pKernelChannel, pRotateIvParams) +#define kchannelSetEncryptionStatsBuffer_FNPTR(pKernelChannel) pKernelChannel->__kchannelSetEncryptionStatsBuffer__ +#define kchannelSetEncryptionStatsBuffer(pGpu, pKernelChannel, pMemDesc, bSet) kchannelSetEncryptionStatsBuffer_DISPATCH(pGpu, pKernelChannel, pMemDesc, bSet) +#define kchannelSetEncryptionStatsBuffer_HAL(pGpu, pKernelChannel, pMemDesc, bSet) kchannelSetEncryptionStatsBuffer_DISPATCH(pGpu, pKernelChannel, pMemDesc, bSet) +#define kchannelCtrlGetTpcPartitionMode_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlGetTpcPartitionMode__ #define kchannelCtrlGetTpcPartitionMode(pKernelChannel, pParams) kchannelCtrlGetTpcPartitionMode_DISPATCH(pKernelChannel, pParams) +#define kchannelCtrlSetTpcPartitionMode_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlSetTpcPartitionMode__ #define kchannelCtrlSetTpcPartitionMode(pKernelChannel, pParams) kchannelCtrlSetTpcPartitionMode_DISPATCH(pKernelChannel, pParams) +#define kchannelCtrlGetMMUDebugMode_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlGetMMUDebugMode__ #define kchannelCtrlGetMMUDebugMode(pKernelChannel, pParams) kchannelCtrlGetMMUDebugMode_DISPATCH(pKernelChannel, pParams) +#define kchannelCtrlProgramVidmemPromote_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlProgramVidmemPromote__ #define kchannelCtrlProgramVidmemPromote(pKernelChannel, pParams) kchannelCtrlProgramVidmemPromote_DISPATCH(pKernelChannel, pParams) +#define kchannelRetrieveKmb_FNPTR(pKernelChannel) pKernelChannel->__kchannelRetrieveKmb__ #define kchannelRetrieveKmb(pGpu, pKernelChannel, rotateOperation, includeSecrets, keyMaterialBundle) kchannelRetrieveKmb_DISPATCH(pGpu, pKernelChannel, rotateOperation, includeSecrets, keyMaterialBundle) #define kchannelRetrieveKmb_HAL(pGpu, pKernelChannel, rotateOperation, includeSecrets, keyMaterialBundle) kchannelRetrieveKmb_DISPATCH(pGpu, pKernelChannel, rotateOperation, includeSecrets, keyMaterialBundle) +#define kchannelSetKeyRotationNotifier_FNPTR(pKernelChannel) pKernelChannel->__kchannelSetKeyRotationNotifier__ #define kchannelSetKeyRotationNotifier(pGpu, pKernelChannel, bSet) kchannelSetKeyRotationNotifier_DISPATCH(pGpu, pKernelChannel, bSet) #define kchannelSetKeyRotationNotifier_HAL(pGpu, pKernelChannel, bSet) kchannelSetKeyRotationNotifier_DISPATCH(pGpu, pKernelChannel, bSet) -#define kchannelSetEncryptionStatsBuffer(pGpu, pKernelChannel, bSet) kchannelSetEncryptionStatsBuffer_DISPATCH(pGpu, pKernelChannel, bSet) -#define kchannelSetEncryptionStatsBuffer_HAL(pGpu, pKernelChannel, bSet) kchannelSetEncryptionStatsBuffer_DISPATCH(pGpu, pKernelChannel, bSet) +#define kchannelControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define kchannelControl(pGpuResource, pCallContext, pParams) kchannelControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define kchannelShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define kchannelShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) kchannelShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define kchannelGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) kchannelGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -#define kchannelMapTo(pResource, pParams) kchannelMapTo_DISPATCH(pResource, pParams) -#define kchannelSetNotificationShare(pNotifier, pNotifShare) kchannelSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define kchannelGetRefCount(pResource) kchannelGetRefCount_DISPATCH(pResource) -#define kchannelAddAdditionalDependants(pClient, pResource, pReference) kchannelAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define kchannelControl_Prologue(pResource, pCallContext, pParams) kchannelControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define kchannelGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define kchannelGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) kchannelGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define kchannelInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define kchannelInternalControlForward(pGpuResource, command, pParams, size) kchannelInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define kchannelUnmapFrom(pResource, pParams) kchannelUnmapFrom_DISPATCH(pResource, pParams) -#define kchannelControl_Epilogue(pResource, pCallContext, pParams) kchannelControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kchannelGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define kchannelGetInternalObjectHandle(pGpuResource) kchannelGetInternalObjectHandle_DISPATCH(pGpuResource) -#define kchannelControl(pGpuResource, pCallContext, pParams) kchannelControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define kchannelAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define kchannelAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kchannelAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define kchannelGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define kchannelGetMemoryMappingDescriptor(pRmResource, ppMemDesc) kchannelGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define kchannelControlFilter(pResource, pCallContext, pParams) kchannelControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define kchannelUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) kchannelUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define kchannelControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define kchannelControlSerialization_Prologue(pResource, pCallContext, pParams) kchannelControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define kchannelControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define kchannelControlSerialization_Epilogue(pResource, pCallContext, pParams) kchannelControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kchannelControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define kchannelControl_Prologue(pResource, pCallContext, pParams) kchannelControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define kchannelControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define kchannelControl_Epilogue(pResource, pCallContext, pParams) kchannelControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kchannelCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define kchannelCanCopy(pResource) kchannelCanCopy_DISPATCH(pResource) -#define kchannelIsPartialUnmapSupported(pResource) kchannelIsPartialUnmapSupported_DISPATCH(pResource) -#define kchannelPreDestruct(pResource) kchannelPreDestruct_DISPATCH(pResource) +#define kchannelIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define kchannelIsDuplicate(pResource, hMemory, pDuplicate) kchannelIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define kchannelControlSerialization_Epilogue(pResource, pCallContext, pParams) kchannelControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kchannelPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define kchannelPreDestruct(pResource) kchannelPreDestruct_DISPATCH(pResource) +#define kchannelControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define kchannelControlFilter(pResource, pCallContext, pParams) kchannelControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define kchannelIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define kchannelIsPartialUnmapSupported(pResource) kchannelIsPartialUnmapSupported_DISPATCH(pResource) +#define kchannelMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define kchannelMapTo(pResource, pParams) kchannelMapTo_DISPATCH(pResource, pParams) +#define kchannelUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define kchannelUnmapFrom(pResource, pParams) kchannelUnmapFrom_DISPATCH(pResource, pParams) +#define kchannelGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define kchannelGetRefCount(pResource) kchannelGetRefCount_DISPATCH(pResource) +#define kchannelAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define kchannelAddAdditionalDependants(pClient, pResource, pReference) kchannelAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define kchannelGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define kchannelGetNotificationListPtr(pNotifier) kchannelGetNotificationListPtr_DISPATCH(pNotifier) +#define kchannelGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ #define kchannelGetNotificationShare(pNotifier) kchannelGetNotificationShare_DISPATCH(pNotifier) -#define kchannelAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kchannelAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS kchannelNotifyRc_IMPL(struct KernelChannel *pKernelChannel); - +#define kchannelSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define kchannelSetNotificationShare(pNotifier, pNotifShare) kchannelSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define kchannelUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define kchannelUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) kchannelUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define kchannelGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define kchannelGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) kchannelGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -#ifdef __nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelNotifyRc(struct KernelChannel *pKernelChannel) { - NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); - return NV_ERR_NOT_SUPPORTED; +// Dispatch functions +static inline NV_STATUS kchannelMap_DISPATCH(struct KernelChannel *pKernelChannel, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pKernelChannel->__kchannelMap__(pKernelChannel, pCallContext, pParams, pCpuMapping); } -#else //__nvoc_kernel_channel_h_disabled -#define kchannelNotifyRc(pKernelChannel) kchannelNotifyRc_IMPL(pKernelChannel) -#endif //__nvoc_kernel_channel_h_disabled - -#define kchannelNotifyRc_HAL(pKernelChannel) kchannelNotifyRc(pKernelChannel) -NvBool kchannelIsSchedulable_IMPL(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel); +static inline NV_STATUS kchannelUnmap_DISPATCH(struct KernelChannel *pKernelChannel, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pKernelChannel->__kchannelUnmap__(pKernelChannel, pCallContext, pCpuMapping); +} +static inline NV_STATUS kchannelGetMapAddrSpace_DISPATCH(struct KernelChannel *pKernelChannel, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pKernelChannel->__kchannelGetMapAddrSpace__(pKernelChannel, pCallContext, mapFlags, pAddrSpace); +} -#ifdef __nvoc_kernel_channel_h_disabled -static inline NvBool kchannelIsSchedulable(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel) { - NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); - return NV_FALSE; +static inline NV_STATUS kchannelGetMemInterMapParams_DISPATCH(struct KernelChannel *pKernelChannel, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pKernelChannel->__kchannelGetMemInterMapParams__(pKernelChannel, pParams); } -#else //__nvoc_kernel_channel_h_disabled -#define kchannelIsSchedulable(pGpu, pKernelChannel) kchannelIsSchedulable_IMPL(pGpu, pKernelChannel) -#endif //__nvoc_kernel_channel_h_disabled -#define kchannelIsSchedulable_HAL(pGpu, pKernelChannel) kchannelIsSchedulable(pGpu, pKernelChannel) +static inline NV_STATUS kchannelCheckMemInterUnmap_DISPATCH(struct KernelChannel *pKernelChannel, NvBool bSubdeviceHandleProvided) { + return pKernelChannel->__kchannelCheckMemInterUnmap__(pKernelChannel, bSubdeviceHandleProvided); +} -NV_STATUS kchannelAllocMem_GM107(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvU32 Flags, NvU32 verifFlags); +static inline NV_STATUS kchannelCreateUserMemDesc_DISPATCH(struct OBJGPU *pGpu, struct KernelChannel *arg_this) { + return arg_this->__kchannelCreateUserMemDesc__(pGpu, arg_this); +} +static inline NvBool kchannelIsUserdAddrSizeValid_DISPATCH(struct KernelChannel *pKernelChannel, NvU32 userdAddrLo, NvU32 userdAddrHi) { + return pKernelChannel->__kchannelIsUserdAddrSizeValid__(pKernelChannel, userdAddrLo, userdAddrHi); +} -#ifdef __nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelAllocMem(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvU32 Flags, NvU32 verifFlags) { - NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kchannelCtrlCmdResetIsolatedChannel_DISPATCH(struct KernelChannel *pKernelChannel, NV506F_CTRL_CMD_RESET_ISOLATED_CHANNEL_PARAMS *pResetParams) { + return pKernelChannel->__kchannelCtrlCmdResetIsolatedChannel__(pKernelChannel, pResetParams); } -#else //__nvoc_kernel_channel_h_disabled -#define kchannelAllocMem(pGpu, pKernelChannel, Flags, verifFlags) kchannelAllocMem_GM107(pGpu, pKernelChannel, Flags, verifFlags) -#endif //__nvoc_kernel_channel_h_disabled -#define kchannelAllocMem_HAL(pGpu, pKernelChannel, Flags, verifFlags) kchannelAllocMem(pGpu, pKernelChannel, Flags, verifFlags) +static inline NV_STATUS kchannelCtrlCmdInternalResetIsolatedChannel_DISPATCH(struct KernelChannel *pKernelChannel, NV506F_CTRL_CMD_INTERNAL_RESET_ISOLATED_CHANNEL_PARAMS *pResetParams) { + return pKernelChannel->__kchannelCtrlCmdInternalResetIsolatedChannel__(pKernelChannel, pResetParams); +} -void kchannelDestroyMem_GM107(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel); +static inline NV_STATUS kchannelCtrlCmdGetClassEngineid_DISPATCH(struct KernelChannel *pKernelChannel, NV906F_CTRL_GET_CLASS_ENGINEID_PARAMS *pParams) { + return pKernelChannel->__kchannelCtrlCmdGetClassEngineid__(pKernelChannel, pParams); +} +static inline NV_STATUS kchannelCtrlCmdResetChannel_DISPATCH(struct KernelChannel *pKernelChannel, NV906F_CTRL_CMD_RESET_CHANNEL_PARAMS *pResetChannelParams) { + return pKernelChannel->__kchannelCtrlCmdResetChannel__(pKernelChannel, pResetChannelParams); +} -#ifdef __nvoc_kernel_channel_h_disabled -static inline void kchannelDestroyMem(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel) { - NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); +static inline NV_STATUS kchannelCtrlCmdGetDeferRCState_DISPATCH(struct KernelChannel *pKernelChannel, NV906F_CTRL_CMD_GET_DEFER_RC_STATE_PARAMS *pStateParams) { + return pKernelChannel->__kchannelCtrlCmdGetDeferRCState__(pKernelChannel, pStateParams); } -#else //__nvoc_kernel_channel_h_disabled -#define kchannelDestroyMem(pGpu, pKernelChannel) kchannelDestroyMem_GM107(pGpu, pKernelChannel) -#endif //__nvoc_kernel_channel_h_disabled -#define kchannelDestroyMem_HAL(pGpu, pKernelChannel) kchannelDestroyMem(pGpu, pKernelChannel) +static inline NV_STATUS kchannelCtrlCmdGetMmuFaultInfo_DISPATCH(struct KernelChannel *pKernelChannel, NV906F_CTRL_GET_MMU_FAULT_INFO_PARAMS *pFaultInfoParams) { + return pKernelChannel->__kchannelCtrlCmdGetMmuFaultInfo__(pKernelChannel, pFaultInfoParams); +} -NV_STATUS kchannelGetChannelPhysicalState_KERNEL(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NV208F_CTRL_FIFO_GET_CHANNEL_STATE_PARAMS *pChannelStateParams); +static inline NV_STATUS kchannelCtrlCmdEventSetNotification_DISPATCH(struct KernelChannel *pKernelChannel, NV906F_CTRL_EVENT_SET_NOTIFICATION_PARAMS *pSetEventParams) { + return pKernelChannel->__kchannelCtrlCmdEventSetNotification__(pKernelChannel, pSetEventParams); +} +static inline NV_STATUS kchannelCtrlCmdGpFifoSchedule_DISPATCH(struct KernelChannel *pKernelChannel, NVA06F_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams) { + return pKernelChannel->__kchannelCtrlCmdGpFifoSchedule__(pKernelChannel, pSchedParams); +} -#ifdef __nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelGetChannelPhysicalState(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NV208F_CTRL_FIFO_GET_CHANNEL_STATE_PARAMS *pChannelStateParams) { - NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kchannelCtrlCmdBind_DISPATCH(struct KernelChannel *pKernelChannel, NVA06F_CTRL_BIND_PARAMS *pParams) { + return pKernelChannel->__kchannelCtrlCmdBind__(pKernelChannel, pParams); } -#else //__nvoc_kernel_channel_h_disabled -#define kchannelGetChannelPhysicalState(pGpu, pKernelChannel, pChannelStateParams) kchannelGetChannelPhysicalState_KERNEL(pGpu, pKernelChannel, pChannelStateParams) -#endif //__nvoc_kernel_channel_h_disabled -#define kchannelGetChannelPhysicalState_HAL(pGpu, pKernelChannel, pChannelStateParams) kchannelGetChannelPhysicalState(pGpu, pKernelChannel, pChannelStateParams) +static inline NV_STATUS kchannelCtrlCmdSetErrorNotifier_DISPATCH(struct KernelChannel *pKernelChannel, NVA06F_CTRL_SET_ERROR_NOTIFIER_PARAMS *pSetErrorNotifierParams) { + return pKernelChannel->__kchannelCtrlCmdSetErrorNotifier__(pKernelChannel, pSetErrorNotifierParams); +} -static inline NvU32 kchannelEmbedRunlistID_13cd8d(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel) { - NV_ASSERT_PRECOMP(0); - return 0; +static inline NV_STATUS kchannelCtrlCmdSetInterleaveLevel_DISPATCH(struct KernelChannel *pKernelChannel, NVA06F_CTRL_INTERLEAVE_LEVEL_PARAMS *pParams) { + return pKernelChannel->__kchannelCtrlCmdSetInterleaveLevel__(pKernelChannel, pParams); } +static inline NV_STATUS kchannelCtrlCmdGetContextId_DISPATCH(struct KernelChannel *pKernelChannel, NVA06F_CTRL_GET_CONTEXT_ID_PARAMS *pParams) { + return pKernelChannel->__kchannelCtrlCmdGetContextId__(pKernelChannel, pParams); +} -#ifdef __nvoc_kernel_channel_h_disabled -static inline NvU32 kchannelEmbedRunlistID(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel) { - NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); - return 0; +static inline NV_STATUS kchannelCtrlCmdRestartRunlist_DISPATCH(struct KernelChannel *pKernelChannel, NVA06F_CTRL_RESTART_RUNLIST_PARAMS *pParams) { + return pKernelChannel->__kchannelCtrlCmdRestartRunlist__(pKernelChannel, pParams); } -#else //__nvoc_kernel_channel_h_disabled -#define kchannelEmbedRunlistID(pGpu, pKernelChannel) kchannelEmbedRunlistID_13cd8d(pGpu, pKernelChannel) -#endif //__nvoc_kernel_channel_h_disabled -#define kchannelEmbedRunlistID_HAL(pGpu, pKernelChannel) kchannelEmbedRunlistID(pGpu, pKernelChannel) +static inline NV_STATUS kchannelCtrlCmdGetEngineCtxSize_DISPATCH(struct KernelChannel *pKernelChannel, NVB06F_CTRL_GET_ENGINE_CTX_SIZE_PARAMS *pCtxSizeParams) { + return pKernelChannel->__kchannelCtrlCmdGetEngineCtxSize__(pKernelChannel, pCtxSizeParams); +} -NV_STATUS kchannelAllocHwID_GM107(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvHandle hClient, NvU32 Flags, NvU32 verifFlags2, NvU32 ChID); +static inline NV_STATUS kchannelCtrlCmdGetEngineCtxData_DISPATCH(struct KernelChannel *pKernelChannel, NVB06F_CTRL_GET_ENGINE_CTX_DATA_PARAMS *pCtxBuffParams) { + return pKernelChannel->__kchannelCtrlCmdGetEngineCtxData__(pKernelChannel, pCtxBuffParams); +} +static inline NV_STATUS kchannelCtrlCmdMigrateEngineCtxData_DISPATCH(struct KernelChannel *pKernelChannel, NVB06F_CTRL_MIGRATE_ENGINE_CTX_DATA_PARAMS *pCtxBuffParams) { + return pKernelChannel->__kchannelCtrlCmdMigrateEngineCtxData__(pKernelChannel, pCtxBuffParams); +} -#ifdef __nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelAllocHwID(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvHandle hClient, NvU32 Flags, NvU32 verifFlags2, NvU32 ChID) { - NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kchannelCtrlCmdGetEngineCtxState_DISPATCH(struct KernelChannel *pKernelChannel, NVB06F_CTRL_GET_ENGINE_CTX_STATE_PARAMS *pCtxStateParams) { + return pKernelChannel->__kchannelCtrlCmdGetEngineCtxState__(pKernelChannel, pCtxStateParams); } -#else //__nvoc_kernel_channel_h_disabled -#define kchannelAllocHwID(pGpu, pKernelChannel, hClient, Flags, verifFlags2, ChID) kchannelAllocHwID_GM107(pGpu, pKernelChannel, hClient, Flags, verifFlags2, ChID) -#endif //__nvoc_kernel_channel_h_disabled -#define kchannelAllocHwID_HAL(pGpu, pKernelChannel, hClient, Flags, verifFlags2, ChID) kchannelAllocHwID(pGpu, pKernelChannel, hClient, Flags, verifFlags2, ChID) +static inline NV_STATUS kchannelCtrlCmdGetChannelHwState_DISPATCH(struct KernelChannel *pKernelChannel, NVB06F_CTRL_GET_CHANNEL_HW_STATE_PARAMS *pParams) { + return pKernelChannel->__kchannelCtrlCmdGetChannelHwState__(pKernelChannel, pParams); +} -NV_STATUS kchannelFreeHwID_GM107(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel); +static inline NV_STATUS kchannelCtrlCmdSetChannelHwState_DISPATCH(struct KernelChannel *pKernelChannel, NVB06F_CTRL_SET_CHANNEL_HW_STATE_PARAMS *pParams) { + return pKernelChannel->__kchannelCtrlCmdSetChannelHwState__(pKernelChannel, pParams); +} +static inline NV_STATUS kchannelCtrlCmdSaveEngineCtxData_DISPATCH(struct KernelChannel *pKernelChannel, NVB06F_CTRL_SAVE_ENGINE_CTX_DATA_PARAMS *pCtxBuffParams) { + return pKernelChannel->__kchannelCtrlCmdSaveEngineCtxData__(pKernelChannel, pCtxBuffParams); +} -#ifdef __nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelFreeHwID(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel) { - NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kchannelCtrlCmdRestoreEngineCtxData_DISPATCH(struct KernelChannel *pKernelChannel, NVB06F_CTRL_RESTORE_ENGINE_CTX_DATA_PARAMS *pCtxBuffParams) { + return pKernelChannel->__kchannelCtrlCmdRestoreEngineCtxData__(pKernelChannel, pCtxBuffParams); } -#else //__nvoc_kernel_channel_h_disabled -#define kchannelFreeHwID(pGpu, pKernelChannel) kchannelFreeHwID_GM107(pGpu, pKernelChannel) -#endif //__nvoc_kernel_channel_h_disabled -#define kchannelFreeHwID_HAL(pGpu, pKernelChannel) kchannelFreeHwID(pGpu, pKernelChannel) +static inline NV_STATUS kchannelCtrlCmdGpfifoGetWorkSubmitToken_DISPATCH(struct KernelChannel *pKernelChannel, NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS *pTokenParams) { + return pKernelChannel->__kchannelCtrlCmdGpfifoGetWorkSubmitToken__(pKernelChannel, pTokenParams); +} -NV_STATUS kchannelGetUserdInfo_GM107(struct OBJGPU *pGpu, struct KernelChannel *arg0, NvU64 *userBase, NvU64 *offset, NvU64 *length); +static inline NV_STATUS kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer_DISPATCH(struct KernelChannel *pKernelChannel, NVC36F_CTRL_GPFIFO_UPDATE_FAULT_METHOD_BUFFER_PARAMS *pFaultMthdBufferParams) { + return pKernelChannel->__kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer__(pKernelChannel, pFaultMthdBufferParams); +} +static inline NV_STATUS kchannelCtrlCmdGpfifoSetWorkSubmitTokenNotifIndex_DISPATCH(struct KernelChannel *pKernelChannel, NVC36F_CTRL_GPFIFO_SET_WORK_SUBMIT_TOKEN_NOTIF_INDEX_PARAMS *pParams) { + return pKernelChannel->__kchannelCtrlCmdGpfifoSetWorkSubmitTokenNotifIndex__(pKernelChannel, pParams); +} -#ifdef __nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelGetUserdInfo(struct OBJGPU *pGpu, struct KernelChannel *arg0, NvU64 *userBase, NvU64 *offset, NvU64 *length) { - NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kchannelCtrlCmdStopChannel_DISPATCH(struct KernelChannel *pKernelChannel, NVA06F_CTRL_STOP_CHANNEL_PARAMS *pStopChannelParams) { + return pKernelChannel->__kchannelCtrlCmdStopChannel__(pKernelChannel, pStopChannelParams); } -#else //__nvoc_kernel_channel_h_disabled -#define kchannelGetUserdInfo(pGpu, arg0, userBase, offset, length) kchannelGetUserdInfo_GM107(pGpu, arg0, userBase, offset, length) -#endif //__nvoc_kernel_channel_h_disabled -#define kchannelGetUserdInfo_HAL(pGpu, arg0, userBase, offset, length) kchannelGetUserdInfo(pGpu, arg0, userBase, offset, length) +static inline NV_STATUS kchannelCtrlCmdGetKmb_DISPATCH(struct KernelChannel *pKernelChannel, NVC56F_CTRL_CMD_GET_KMB_PARAMS *pGetKmbParams) { + return pKernelChannel->__kchannelCtrlCmdGetKmb__(pKernelChannel, pGetKmbParams); +} -NV_STATUS kchannelGetUserdBar1MapOffset_GM107(struct OBJGPU *pGpu, struct KernelChannel *arg0, NvU64 *bar1Offset, NvU32 *bar1MapSize); +static inline NV_STATUS kchannelCtrlRotateSecureChannelIv_DISPATCH(struct KernelChannel *pKernelChannel, NVC56F_CTRL_ROTATE_SECURE_CHANNEL_IV_PARAMS *pRotateIvParams) { + return pKernelChannel->__kchannelCtrlRotateSecureChannelIv__(pKernelChannel, pRotateIvParams); +} +static inline NV_STATUS kchannelSetEncryptionStatsBuffer_DISPATCH(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, MEMORY_DESCRIPTOR *pMemDesc, NvBool bSet) { + return pKernelChannel->__kchannelSetEncryptionStatsBuffer__(pGpu, pKernelChannel, pMemDesc, bSet); +} -#ifdef __nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelGetUserdBar1MapOffset(struct OBJGPU *pGpu, struct KernelChannel *arg0, NvU64 *bar1Offset, NvU32 *bar1MapSize) { - NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kchannelCtrlGetTpcPartitionMode_DISPATCH(struct KernelChannel *pKernelChannel, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *pParams) { + return pKernelChannel->__kchannelCtrlGetTpcPartitionMode__(pKernelChannel, pParams); } -#else //__nvoc_kernel_channel_h_disabled -#define kchannelGetUserdBar1MapOffset(pGpu, arg0, bar1Offset, bar1MapSize) kchannelGetUserdBar1MapOffset_GM107(pGpu, arg0, bar1Offset, bar1MapSize) -#endif //__nvoc_kernel_channel_h_disabled -#define kchannelGetUserdBar1MapOffset_HAL(pGpu, arg0, bar1Offset, bar1MapSize) kchannelGetUserdBar1MapOffset(pGpu, arg0, bar1Offset, bar1MapSize) +static inline NV_STATUS kchannelCtrlSetTpcPartitionMode_DISPATCH(struct KernelChannel *pKernelChannel, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *pParams) { + return pKernelChannel->__kchannelCtrlSetTpcPartitionMode__(pKernelChannel, pParams); +} -NV_STATUS kchannelCreateUserdMemDescBc_GV100(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvHandle arg0, NvHandle *arg1, NvU64 *arg2); +static inline NV_STATUS kchannelCtrlGetMMUDebugMode_DISPATCH(struct KernelChannel *pKernelChannel, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *pParams) { + return pKernelChannel->__kchannelCtrlGetMMUDebugMode__(pKernelChannel, pParams); +} +static inline NV_STATUS kchannelCtrlProgramVidmemPromote_DISPATCH(struct KernelChannel *pKernelChannel, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *pParams) { + return pKernelChannel->__kchannelCtrlProgramVidmemPromote__(pKernelChannel, pParams); +} -#ifdef __nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelCreateUserdMemDescBc(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvHandle arg0, NvHandle *arg1, NvU64 *arg2) { - NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kchannelRetrieveKmb_DISPATCH(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, ROTATE_IV_TYPE rotateOperation, NvBool includeSecrets, CC_KMB *keyMaterialBundle) { + return pKernelChannel->__kchannelRetrieveKmb__(pGpu, pKernelChannel, rotateOperation, includeSecrets, keyMaterialBundle); } -#else //__nvoc_kernel_channel_h_disabled -#define kchannelCreateUserdMemDescBc(pGpu, pKernelChannel, arg0, arg1, arg2) kchannelCreateUserdMemDescBc_GV100(pGpu, pKernelChannel, arg0, arg1, arg2) -#endif //__nvoc_kernel_channel_h_disabled -#define kchannelCreateUserdMemDescBc_HAL(pGpu, pKernelChannel, arg0, arg1, arg2) kchannelCreateUserdMemDescBc(pGpu, pKernelChannel, arg0, arg1, arg2) +static inline NV_STATUS kchannelSetKeyRotationNotifier_DISPATCH(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvBool bSet) { + return pKernelChannel->__kchannelSetKeyRotationNotifier__(pGpu, pKernelChannel, bSet); +} -NV_STATUS kchannelCreateUserdMemDesc_GV100(struct OBJGPU *pGpu, struct KernelChannel *arg0, NvHandle arg1, NvHandle arg2, NvU64 arg3, NvU64 *arg4, NvU32 *arg5); +static inline NV_STATUS kchannelControl_DISPATCH(struct KernelChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__kchannelControl__(pGpuResource, pCallContext, pParams); +} +static inline NvBool kchannelShareCallback_DISPATCH(struct KernelChannel *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__kchannelShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +} -#ifdef __nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelCreateUserdMemDesc(struct OBJGPU *pGpu, struct KernelChannel *arg0, NvHandle arg1, NvHandle arg2, NvU64 arg3, NvU64 *arg4, NvU32 *arg5) { - NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kchannelGetRegBaseOffsetAndSize_DISPATCH(struct KernelChannel *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__kchannelGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -#else //__nvoc_kernel_channel_h_disabled -#define kchannelCreateUserdMemDesc(pGpu, arg0, arg1, arg2, arg3, arg4, arg5) kchannelCreateUserdMemDesc_GV100(pGpu, arg0, arg1, arg2, arg3, arg4, arg5) -#endif //__nvoc_kernel_channel_h_disabled -#define kchannelCreateUserdMemDesc_HAL(pGpu, arg0, arg1, arg2, arg3, arg4, arg5) kchannelCreateUserdMemDesc(pGpu, arg0, arg1, arg2, arg3, arg4, arg5) +static inline NV_STATUS kchannelInternalControlForward_DISPATCH(struct KernelChannel *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__kchannelInternalControlForward__(pGpuResource, command, pParams, size); +} -void kchannelDestroyUserdMemDesc_GV100(struct OBJGPU *pGpu, struct KernelChannel *arg0); +static inline NvHandle kchannelGetInternalObjectHandle_DISPATCH(struct KernelChannel *pGpuResource) { + return pGpuResource->__kchannelGetInternalObjectHandle__(pGpuResource); +} +static inline NvBool kchannelAccessCallback_DISPATCH(struct KernelChannel *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__kchannelAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +} -#ifdef __nvoc_kernel_channel_h_disabled -static inline void kchannelDestroyUserdMemDesc(struct OBJGPU *pGpu, struct KernelChannel *arg0) { - NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); +static inline NV_STATUS kchannelGetMemoryMappingDescriptor_DISPATCH(struct KernelChannel *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__kchannelGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -#else //__nvoc_kernel_channel_h_disabled -#define kchannelDestroyUserdMemDesc(pGpu, arg0) kchannelDestroyUserdMemDesc_GV100(pGpu, arg0) -#endif //__nvoc_kernel_channel_h_disabled -#define kchannelDestroyUserdMemDesc_HAL(pGpu, arg0) kchannelDestroyUserdMemDesc(pGpu, arg0) +static inline NV_STATUS kchannelControlSerialization_Prologue_DISPATCH(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kchannelControlSerialization_Prologue__(pResource, pCallContext, pParams); +} -NV_STATUS kchannelGetEngine_GM107(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvU32 *engDesc); +static inline void kchannelControlSerialization_Epilogue_DISPATCH(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__kchannelControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} +static inline NV_STATUS kchannelControl_Prologue_DISPATCH(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kchannelControl_Prologue__(pResource, pCallContext, pParams); +} -#ifdef __nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelGetEngine(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvU32 *engDesc) { - NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline void kchannelControl_Epilogue_DISPATCH(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__kchannelControl_Epilogue__(pResource, pCallContext, pParams); } -#else //__nvoc_kernel_channel_h_disabled -#define kchannelGetEngine(pGpu, pKernelChannel, engDesc) kchannelGetEngine_GM107(pGpu, pKernelChannel, engDesc) -#endif //__nvoc_kernel_channel_h_disabled -#define kchannelGetEngine_HAL(pGpu, pKernelChannel, engDesc) kchannelGetEngine(pGpu, pKernelChannel, engDesc) +static inline NvBool kchannelCanCopy_DISPATCH(struct KernelChannel *pResource) { + return pResource->__kchannelCanCopy__(pResource); +} -static inline NV_STATUS kchannelFwdToInternalCtrl_56cd7a(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvU32 internalCmd, RmCtrlParams *pRmCtrlParams) { - return NV_OK; +static inline NV_STATUS kchannelIsDuplicate_DISPATCH(struct KernelChannel *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__kchannelIsDuplicate__(pResource, hMemory, pDuplicate); } +static inline void kchannelPreDestruct_DISPATCH(struct KernelChannel *pResource) { + pResource->__kchannelPreDestruct__(pResource); +} -#ifdef __nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelFwdToInternalCtrl(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvU32 internalCmd, RmCtrlParams *pRmCtrlParams) { - NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kchannelControlFilter_DISPATCH(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kchannelControlFilter__(pResource, pCallContext, pParams); } -#else //__nvoc_kernel_channel_h_disabled -#define kchannelFwdToInternalCtrl(pGpu, pKernelChannel, internalCmd, pRmCtrlParams) kchannelFwdToInternalCtrl_56cd7a(pGpu, pKernelChannel, internalCmd, pRmCtrlParams) -#endif //__nvoc_kernel_channel_h_disabled -#define kchannelFwdToInternalCtrl_HAL(pGpu, pKernelChannel, internalCmd, pRmCtrlParams) kchannelFwdToInternalCtrl(pGpu, pKernelChannel, internalCmd, pRmCtrlParams) +static inline NvBool kchannelIsPartialUnmapSupported_DISPATCH(struct KernelChannel *pResource) { + return pResource->__kchannelIsPartialUnmapSupported__(pResource); +} -static inline NV_STATUS kchannelAllocChannel_56cd7a(struct KernelChannel *pKernelChannel, NV_CHANNEL_ALLOC_PARAMS *pChannelGpfifoParams) { - return NV_OK; +static inline NV_STATUS kchannelMapTo_DISPATCH(struct KernelChannel *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__kchannelMapTo__(pResource, pParams); +} + +static inline NV_STATUS kchannelUnmapFrom_DISPATCH(struct KernelChannel *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__kchannelUnmapFrom__(pResource, pParams); +} + +static inline NvU32 kchannelGetRefCount_DISPATCH(struct KernelChannel *pResource) { + return pResource->__kchannelGetRefCount__(pResource); +} + +static inline void kchannelAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelChannel *pResource, RsResourceRef *pReference) { + pResource->__kchannelAddAdditionalDependants__(pClient, pResource, pReference); } +static inline PEVENTNOTIFICATION * kchannelGetNotificationListPtr_DISPATCH(struct KernelChannel *pNotifier) { + return pNotifier->__kchannelGetNotificationListPtr__(pNotifier); +} + +static inline struct NotifShare * kchannelGetNotificationShare_DISPATCH(struct KernelChannel *pNotifier) { + return pNotifier->__kchannelGetNotificationShare__(pNotifier); +} + +static inline void kchannelSetNotificationShare_DISPATCH(struct KernelChannel *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__kchannelSetNotificationShare__(pNotifier, pNotifShare); +} + +static inline NV_STATUS kchannelUnregisterEvent_DISPATCH(struct KernelChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__kchannelUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +} + +static inline NV_STATUS kchannelGetOrAllocNotifShare_DISPATCH(struct KernelChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return pNotifier->__kchannelGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); +} + +NV_STATUS kchannelNotifyRc_IMPL(struct KernelChannel *pKernelChannel); + #ifdef __nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelAllocChannel(struct KernelChannel *pKernelChannel, NV_CHANNEL_ALLOC_PARAMS *pChannelGpfifoParams) { +static inline NV_STATUS kchannelNotifyRc(struct KernelChannel *pKernelChannel) { NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_channel_h_disabled -#define kchannelAllocChannel(pKernelChannel, pChannelGpfifoParams) kchannelAllocChannel_56cd7a(pKernelChannel, pChannelGpfifoParams) +#define kchannelNotifyRc(pKernelChannel) kchannelNotifyRc_IMPL(pKernelChannel) #endif //__nvoc_kernel_channel_h_disabled -#define kchannelAllocChannel_HAL(pKernelChannel, pChannelGpfifoParams) kchannelAllocChannel(pKernelChannel, pChannelGpfifoParams) +#define kchannelNotifyRc_HAL(pKernelChannel) kchannelNotifyRc(pKernelChannel) -static inline NvBool kchannelIsValid_cbe027(struct KernelChannel *pKernelChannel) { - return ((NvBool)(0 == 0)); -} +NvBool kchannelIsSchedulable_IMPL(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel); #ifdef __nvoc_kernel_channel_h_disabled -static inline NvBool kchannelIsValid(struct KernelChannel *pKernelChannel) { +static inline NvBool kchannelIsSchedulable(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel) { NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_channel_h_disabled -#define kchannelIsValid(pKernelChannel) kchannelIsValid_cbe027(pKernelChannel) +#define kchannelIsSchedulable(pGpu, pKernelChannel) kchannelIsSchedulable_IMPL(pGpu, pKernelChannel) #endif //__nvoc_kernel_channel_h_disabled -#define kchannelIsValid_HAL(pKernelChannel) kchannelIsValid(pKernelChannel) +#define kchannelIsSchedulable_HAL(pGpu, pKernelChannel) kchannelIsSchedulable(pGpu, pKernelChannel) -NV_STATUS kchannelGetClassEngineID_GM107(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvHandle handle, NvU32 *classEngineID, NvU32 *classID, RM_ENGINE_TYPE *rmEngineID); +NV_STATUS kchannelAllocMem_GM107(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvU32 Flags, NvU32 verifFlags); #ifdef __nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelGetClassEngineID(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvHandle handle, NvU32 *classEngineID, NvU32 *classID, RM_ENGINE_TYPE *rmEngineID) { +static inline NV_STATUS kchannelAllocMem(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvU32 Flags, NvU32 verifFlags) { NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_channel_h_disabled -#define kchannelGetClassEngineID(pGpu, pKernelChannel, handle, classEngineID, classID, rmEngineID) kchannelGetClassEngineID_GM107(pGpu, pKernelChannel, handle, classEngineID, classID, rmEngineID) +#define kchannelAllocMem(pGpu, pKernelChannel, Flags, verifFlags) kchannelAllocMem_GM107(pGpu, pKernelChannel, Flags, verifFlags) #endif //__nvoc_kernel_channel_h_disabled -#define kchannelGetClassEngineID_HAL(pGpu, pKernelChannel, handle, classEngineID, classID, rmEngineID) kchannelGetClassEngineID(pGpu, pKernelChannel, handle, classEngineID, classID, rmEngineID) +#define kchannelAllocMem_HAL(pGpu, pKernelChannel, Flags, verifFlags) kchannelAllocMem(pGpu, pKernelChannel, Flags, verifFlags) -NV_STATUS kchannelEnableVirtualContext_GM107(struct KernelChannel *arg0); +void kchannelDestroyMem_GM107(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel); #ifdef __nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelEnableVirtualContext(struct KernelChannel *arg0) { +static inline void kchannelDestroyMem(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel) { NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); - return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_channel_h_disabled -#define kchannelEnableVirtualContext(arg0) kchannelEnableVirtualContext_GM107(arg0) +#define kchannelDestroyMem(pGpu, pKernelChannel) kchannelDestroyMem_GM107(pGpu, pKernelChannel) #endif //__nvoc_kernel_channel_h_disabled -#define kchannelEnableVirtualContext_HAL(arg0) kchannelEnableVirtualContext(arg0) +#define kchannelDestroyMem_HAL(pGpu, pKernelChannel) kchannelDestroyMem(pGpu, pKernelChannel) -static inline NV_STATUS kchannelRotateSecureChannelIv_46f6a7(struct KernelChannel *pKernelChannel, ROTATE_IV_TYPE rotateOperation, NvU32 *encryptIv, NvU32 *decryptIv) { - return NV_ERR_NOT_SUPPORTED; -} +NV_STATUS kchannelGetChannelPhysicalState_KERNEL(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NV208F_CTRL_FIFO_GET_CHANNEL_STATE_PARAMS *pChannelStateParams); #ifdef __nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelRotateSecureChannelIv(struct KernelChannel *pKernelChannel, ROTATE_IV_TYPE rotateOperation, NvU32 *encryptIv, NvU32 *decryptIv) { +static inline NV_STATUS kchannelGetChannelPhysicalState(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NV208F_CTRL_FIFO_GET_CHANNEL_STATE_PARAMS *pChannelStateParams) { NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_channel_h_disabled -#define kchannelRotateSecureChannelIv(pKernelChannel, rotateOperation, encryptIv, decryptIv) kchannelRotateSecureChannelIv_46f6a7(pKernelChannel, rotateOperation, encryptIv, decryptIv) +#define kchannelGetChannelPhysicalState(pGpu, pKernelChannel, pChannelStateParams) kchannelGetChannelPhysicalState_KERNEL(pGpu, pKernelChannel, pChannelStateParams) #endif //__nvoc_kernel_channel_h_disabled -#define kchannelRotateSecureChannelIv_HAL(pKernelChannel, rotateOperation, encryptIv, decryptIv) kchannelRotateSecureChannelIv(pKernelChannel, rotateOperation, encryptIv, decryptIv) - -NV_STATUS kchannelMap_IMPL(struct KernelChannel *pKernelChannel, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); - -static inline NV_STATUS kchannelMap_DISPATCH(struct KernelChannel *pKernelChannel, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pKernelChannel->__kchannelMap__(pKernelChannel, pCallContext, pParams, pCpuMapping); -} - -NV_STATUS kchannelUnmap_IMPL(struct KernelChannel *pKernelChannel, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); - -static inline NV_STATUS kchannelUnmap_DISPATCH(struct KernelChannel *pKernelChannel, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pKernelChannel->__kchannelUnmap__(pKernelChannel, pCallContext, pCpuMapping); -} - -NV_STATUS kchannelGetMapAddrSpace_IMPL(struct KernelChannel *pKernelChannel, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); +#define kchannelGetChannelPhysicalState_HAL(pGpu, pKernelChannel, pChannelStateParams) kchannelGetChannelPhysicalState(pGpu, pKernelChannel, pChannelStateParams) -static inline NV_STATUS kchannelGetMapAddrSpace_DISPATCH(struct KernelChannel *pKernelChannel, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pKernelChannel->__kchannelGetMapAddrSpace__(pKernelChannel, pCallContext, mapFlags, pAddrSpace); +static inline NvU32 kchannelEmbedRunlistID_13cd8d(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel) { + NV_ASSERT_PRECOMP(0); + return 0; } -NV_STATUS kchannelGetMemInterMapParams_IMPL(struct KernelChannel *pKernelChannel, RMRES_MEM_INTER_MAP_PARAMS *pParams); -static inline NV_STATUS kchannelGetMemInterMapParams_DISPATCH(struct KernelChannel *pKernelChannel, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pKernelChannel->__kchannelGetMemInterMapParams__(pKernelChannel, pParams); +#ifdef __nvoc_kernel_channel_h_disabled +static inline NvU32 kchannelEmbedRunlistID(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel) { + NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); + return 0; } +#else //__nvoc_kernel_channel_h_disabled +#define kchannelEmbedRunlistID(pGpu, pKernelChannel) kchannelEmbedRunlistID_13cd8d(pGpu, pKernelChannel) +#endif //__nvoc_kernel_channel_h_disabled -NV_STATUS kchannelCheckMemInterUnmap_IMPL(struct KernelChannel *pKernelChannel, NvBool bSubdeviceHandleProvided); - -static inline NV_STATUS kchannelCheckMemInterUnmap_DISPATCH(struct KernelChannel *pKernelChannel, NvBool bSubdeviceHandleProvided) { - return pKernelChannel->__kchannelCheckMemInterUnmap__(pKernelChannel, bSubdeviceHandleProvided); -} +#define kchannelEmbedRunlistID_HAL(pGpu, pKernelChannel) kchannelEmbedRunlistID(pGpu, pKernelChannel) -NV_STATUS kchannelCreateUserMemDesc_GM107(struct OBJGPU *pGpu, struct KernelChannel *arg0); +NV_STATUS kchannelAllocHwID_GM107(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvHandle hClient, NvU32 Flags, NvU32 verifFlags2, NvU32 ChID); -NV_STATUS kchannelCreateUserMemDesc_GA10B(struct OBJGPU *pGpu, struct KernelChannel *arg0); -static inline NV_STATUS kchannelCreateUserMemDesc_DISPATCH(struct OBJGPU *pGpu, struct KernelChannel *arg0) { - return arg0->__kchannelCreateUserMemDesc__(pGpu, arg0); +#ifdef __nvoc_kernel_channel_h_disabled +static inline NV_STATUS kchannelAllocHwID(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvHandle hClient, NvU32 Flags, NvU32 verifFlags2, NvU32 ChID) { + NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_channel_h_disabled +#define kchannelAllocHwID(pGpu, pKernelChannel, hClient, Flags, verifFlags2, ChID) kchannelAllocHwID_GM107(pGpu, pKernelChannel, hClient, Flags, verifFlags2, ChID) +#endif //__nvoc_kernel_channel_h_disabled -NvBool kchannelIsUserdAddrSizeValid_GV100(struct KernelChannel *pKernelChannel, NvU32 userdAddrLo, NvU32 userdAddrHi); +#define kchannelAllocHwID_HAL(pGpu, pKernelChannel, hClient, Flags, verifFlags2, ChID) kchannelAllocHwID(pGpu, pKernelChannel, hClient, Flags, verifFlags2, ChID) -NvBool kchannelIsUserdAddrSizeValid_GA100(struct KernelChannel *pKernelChannel, NvU32 userdAddrLo, NvU32 userdAddrHi); +NV_STATUS kchannelFreeHwID_GM107(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel); -NvBool kchannelIsUserdAddrSizeValid_GH100(struct KernelChannel *pKernelChannel, NvU32 userdAddrLo, NvU32 userdAddrHi); -static inline NvBool kchannelIsUserdAddrSizeValid_DISPATCH(struct KernelChannel *pKernelChannel, NvU32 userdAddrLo, NvU32 userdAddrHi) { - return pKernelChannel->__kchannelIsUserdAddrSizeValid__(pKernelChannel, userdAddrLo, userdAddrHi); +#ifdef __nvoc_kernel_channel_h_disabled +static inline NV_STATUS kchannelFreeHwID(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel) { + NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_channel_h_disabled +#define kchannelFreeHwID(pGpu, pKernelChannel) kchannelFreeHwID_GM107(pGpu, pKernelChannel) +#endif //__nvoc_kernel_channel_h_disabled -NV_STATUS kchannelCtrlCmdResetIsolatedChannel_IMPL(struct KernelChannel *pKernelChannel, NV506F_CTRL_CMD_RESET_ISOLATED_CHANNEL_PARAMS *pResetParams); +#define kchannelFreeHwID_HAL(pGpu, pKernelChannel) kchannelFreeHwID(pGpu, pKernelChannel) -static inline NV_STATUS kchannelCtrlCmdResetIsolatedChannel_DISPATCH(struct KernelChannel *pKernelChannel, NV506F_CTRL_CMD_RESET_ISOLATED_CHANNEL_PARAMS *pResetParams) { - return pKernelChannel->__kchannelCtrlCmdResetIsolatedChannel__(pKernelChannel, pResetParams); -} +NV_STATUS kchannelGetUserdInfo_GM107(struct OBJGPU *pGpu, struct KernelChannel *arg2, NvU64 *userBase, NvU64 *offset, NvU64 *length); -NV_STATUS kchannelCtrlCmdInternalResetIsolatedChannel_IMPL(struct KernelChannel *pKernelChannel, NV506F_CTRL_CMD_INTERNAL_RESET_ISOLATED_CHANNEL_PARAMS *pResetParams); -static inline NV_STATUS kchannelCtrlCmdInternalResetIsolatedChannel_DISPATCH(struct KernelChannel *pKernelChannel, NV506F_CTRL_CMD_INTERNAL_RESET_ISOLATED_CHANNEL_PARAMS *pResetParams) { - return pKernelChannel->__kchannelCtrlCmdInternalResetIsolatedChannel__(pKernelChannel, pResetParams); -} - -NV_STATUS kchannelCtrlCmdGetClassEngineid_IMPL(struct KernelChannel *pKernelChannel, NV906F_CTRL_GET_CLASS_ENGINEID_PARAMS *pParams); - -static inline NV_STATUS kchannelCtrlCmdGetClassEngineid_DISPATCH(struct KernelChannel *pKernelChannel, NV906F_CTRL_GET_CLASS_ENGINEID_PARAMS *pParams) { - return pKernelChannel->__kchannelCtrlCmdGetClassEngineid__(pKernelChannel, pParams); +#ifdef __nvoc_kernel_channel_h_disabled +static inline NV_STATUS kchannelGetUserdInfo(struct OBJGPU *pGpu, struct KernelChannel *arg2, NvU64 *userBase, NvU64 *offset, NvU64 *length) { + NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_channel_h_disabled +#define kchannelGetUserdInfo(pGpu, arg2, userBase, offset, length) kchannelGetUserdInfo_GM107(pGpu, arg2, userBase, offset, length) +#endif //__nvoc_kernel_channel_h_disabled -NV_STATUS kchannelCtrlCmdResetChannel_IMPL(struct KernelChannel *pKernelChannel, NV906F_CTRL_CMD_RESET_CHANNEL_PARAMS *pResetChannelParams); +#define kchannelGetUserdInfo_HAL(pGpu, arg2, userBase, offset, length) kchannelGetUserdInfo(pGpu, arg2, userBase, offset, length) -static inline NV_STATUS kchannelCtrlCmdResetChannel_DISPATCH(struct KernelChannel *pKernelChannel, NV906F_CTRL_CMD_RESET_CHANNEL_PARAMS *pResetChannelParams) { - return pKernelChannel->__kchannelCtrlCmdResetChannel__(pKernelChannel, pResetChannelParams); -} +NV_STATUS kchannelGetUserdBar1MapOffset_GM107(struct OBJGPU *pGpu, struct KernelChannel *arg2, NvU64 *bar1Offset, NvU32 *bar1MapSize); -NV_STATUS kchannelCtrlCmdGetDeferRCState_IMPL(struct KernelChannel *pKernelChannel, NV906F_CTRL_CMD_GET_DEFER_RC_STATE_PARAMS *pStateParams); -static inline NV_STATUS kchannelCtrlCmdGetDeferRCState_DISPATCH(struct KernelChannel *pKernelChannel, NV906F_CTRL_CMD_GET_DEFER_RC_STATE_PARAMS *pStateParams) { - return pKernelChannel->__kchannelCtrlCmdGetDeferRCState__(pKernelChannel, pStateParams); +#ifdef __nvoc_kernel_channel_h_disabled +static inline NV_STATUS kchannelGetUserdBar1MapOffset(struct OBJGPU *pGpu, struct KernelChannel *arg2, NvU64 *bar1Offset, NvU32 *bar1MapSize) { + NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_channel_h_disabled +#define kchannelGetUserdBar1MapOffset(pGpu, arg2, bar1Offset, bar1MapSize) kchannelGetUserdBar1MapOffset_GM107(pGpu, arg2, bar1Offset, bar1MapSize) +#endif //__nvoc_kernel_channel_h_disabled -NV_STATUS kchannelCtrlCmdGetMmuFaultInfo_IMPL(struct KernelChannel *pKernelChannel, NV906F_CTRL_GET_MMU_FAULT_INFO_PARAMS *pFaultInfoParams); +#define kchannelGetUserdBar1MapOffset_HAL(pGpu, arg2, bar1Offset, bar1MapSize) kchannelGetUserdBar1MapOffset(pGpu, arg2, bar1Offset, bar1MapSize) -static inline NV_STATUS kchannelCtrlCmdGetMmuFaultInfo_DISPATCH(struct KernelChannel *pKernelChannel, NV906F_CTRL_GET_MMU_FAULT_INFO_PARAMS *pFaultInfoParams) { - return pKernelChannel->__kchannelCtrlCmdGetMmuFaultInfo__(pKernelChannel, pFaultInfoParams); -} +NV_STATUS kchannelCreateUserdMemDescBc_GV100(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvHandle arg3, NvHandle *arg4, NvU64 *arg5); -NV_STATUS kchannelCtrlCmdEventSetNotification_IMPL(struct KernelChannel *pKernelChannel, NV906F_CTRL_EVENT_SET_NOTIFICATION_PARAMS *pSetEventParams); -static inline NV_STATUS kchannelCtrlCmdEventSetNotification_DISPATCH(struct KernelChannel *pKernelChannel, NV906F_CTRL_EVENT_SET_NOTIFICATION_PARAMS *pSetEventParams) { - return pKernelChannel->__kchannelCtrlCmdEventSetNotification__(pKernelChannel, pSetEventParams); +#ifdef __nvoc_kernel_channel_h_disabled +static inline NV_STATUS kchannelCreateUserdMemDescBc(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvHandle arg3, NvHandle *arg4, NvU64 *arg5) { + NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_channel_h_disabled +#define kchannelCreateUserdMemDescBc(pGpu, pKernelChannel, arg3, arg4, arg5) kchannelCreateUserdMemDescBc_GV100(pGpu, pKernelChannel, arg3, arg4, arg5) +#endif //__nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelCtrlCmdGetClassEngineidA06F_6a9a13(struct KernelChannel *pKernelChannel, NVA06F_CTRL_GET_CLASS_ENGINEID_PARAMS *pParams) { - return kchannelCtrlCmdGetClassEngineid(pKernelChannel, pParams); -} +#define kchannelCreateUserdMemDescBc_HAL(pGpu, pKernelChannel, arg3, arg4, arg5) kchannelCreateUserdMemDescBc(pGpu, pKernelChannel, arg3, arg4, arg5) -static inline NV_STATUS kchannelCtrlCmdGetClassEngineidA06F_DISPATCH(struct KernelChannel *pKernelChannel, NVA06F_CTRL_GET_CLASS_ENGINEID_PARAMS *pParams) { - return pKernelChannel->__kchannelCtrlCmdGetClassEngineidA06F__(pKernelChannel, pParams); -} +NV_STATUS kchannelCreateUserdMemDesc_GV100(struct OBJGPU *pGpu, struct KernelChannel *arg2, NvHandle arg3, NvHandle arg4, NvU64 arg5, NvU64 *arg6, NvU32 *arg7); -static inline NV_STATUS kchannelCtrlCmdResetChannelA06F_ef73a1(struct KernelChannel *pKernelChannel, NVA06F_CTRL_CMD_RESET_CHANNEL_PARAMS *pResetChannelParams) { - return kchannelCtrlCmdResetChannel(pKernelChannel, pResetChannelParams); -} -static inline NV_STATUS kchannelCtrlCmdResetChannelA06F_DISPATCH(struct KernelChannel *pKernelChannel, NVA06F_CTRL_CMD_RESET_CHANNEL_PARAMS *pResetChannelParams) { - return pKernelChannel->__kchannelCtrlCmdResetChannelA06F__(pKernelChannel, pResetChannelParams); +#ifdef __nvoc_kernel_channel_h_disabled +static inline NV_STATUS kchannelCreateUserdMemDesc(struct OBJGPU *pGpu, struct KernelChannel *arg2, NvHandle arg3, NvHandle arg4, NvU64 arg5, NvU64 *arg6, NvU32 *arg7) { + NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_channel_h_disabled +#define kchannelCreateUserdMemDesc(pGpu, arg2, arg3, arg4, arg5, arg6, arg7) kchannelCreateUserdMemDesc_GV100(pGpu, arg2, arg3, arg4, arg5, arg6, arg7) +#endif //__nvoc_kernel_channel_h_disabled -NV_STATUS kchannelCtrlCmdGpFifoSchedule_IMPL(struct KernelChannel *pKernelChannel, NVA06F_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams); +#define kchannelCreateUserdMemDesc_HAL(pGpu, arg2, arg3, arg4, arg5, arg6, arg7) kchannelCreateUserdMemDesc(pGpu, arg2, arg3, arg4, arg5, arg6, arg7) -static inline NV_STATUS kchannelCtrlCmdGpFifoSchedule_DISPATCH(struct KernelChannel *pKernelChannel, NVA06F_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams) { - return pKernelChannel->__kchannelCtrlCmdGpFifoSchedule__(pKernelChannel, pSchedParams); -} +void kchannelDestroyUserdMemDesc_GV100(struct OBJGPU *pGpu, struct KernelChannel *arg2); -NV_STATUS kchannelCtrlCmdBind_IMPL(struct KernelChannel *pKernelChannel, NVA06F_CTRL_BIND_PARAMS *pParams); -static inline NV_STATUS kchannelCtrlCmdBind_DISPATCH(struct KernelChannel *pKernelChannel, NVA06F_CTRL_BIND_PARAMS *pParams) { - return pKernelChannel->__kchannelCtrlCmdBind__(pKernelChannel, pParams); +#ifdef __nvoc_kernel_channel_h_disabled +static inline void kchannelDestroyUserdMemDesc(struct OBJGPU *pGpu, struct KernelChannel *arg2) { + NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); } +#else //__nvoc_kernel_channel_h_disabled +#define kchannelDestroyUserdMemDesc(pGpu, arg2) kchannelDestroyUserdMemDesc_GV100(pGpu, arg2) +#endif //__nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelCtrlCmdGetMmuFaultInfoA06F_a7f9ac(struct KernelChannel *pKernelChannel, NVA06F_CTRL_GET_MMU_FAULT_INFO_PARAMS *pFaultInfoParams) { - return kchannelCtrlCmdGetMmuFaultInfo(pKernelChannel, pFaultInfoParams); -} +#define kchannelDestroyUserdMemDesc_HAL(pGpu, arg2) kchannelDestroyUserdMemDesc(pGpu, arg2) -static inline NV_STATUS kchannelCtrlCmdGetMmuFaultInfoA06F_DISPATCH(struct KernelChannel *pKernelChannel, NVA06F_CTRL_GET_MMU_FAULT_INFO_PARAMS *pFaultInfoParams) { - return pKernelChannel->__kchannelCtrlCmdGetMmuFaultInfoA06F__(pKernelChannel, pFaultInfoParams); -} +NV_STATUS kchannelGetEngine_GM107(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvU32 *engDesc); -NV_STATUS kchannelCtrlCmdSetErrorNotifier_IMPL(struct KernelChannel *pKernelChannel, NVA06F_CTRL_SET_ERROR_NOTIFIER_PARAMS *pSetErrorNotifierParams); -static inline NV_STATUS kchannelCtrlCmdSetErrorNotifier_DISPATCH(struct KernelChannel *pKernelChannel, NVA06F_CTRL_SET_ERROR_NOTIFIER_PARAMS *pSetErrorNotifierParams) { - return pKernelChannel->__kchannelCtrlCmdSetErrorNotifier__(pKernelChannel, pSetErrorNotifierParams); +#ifdef __nvoc_kernel_channel_h_disabled +static inline NV_STATUS kchannelGetEngine(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvU32 *engDesc) { + NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_channel_h_disabled +#define kchannelGetEngine(pGpu, pKernelChannel, engDesc) kchannelGetEngine_GM107(pGpu, pKernelChannel, engDesc) +#endif //__nvoc_kernel_channel_h_disabled -NV_STATUS kchannelCtrlCmdSetInterleaveLevel_IMPL(struct KernelChannel *pKernelChannel, NVA06F_CTRL_INTERLEAVE_LEVEL_PARAMS *pParams); +#define kchannelGetEngine_HAL(pGpu, pKernelChannel, engDesc) kchannelGetEngine(pGpu, pKernelChannel, engDesc) -static inline NV_STATUS kchannelCtrlCmdSetInterleaveLevel_DISPATCH(struct KernelChannel *pKernelChannel, NVA06F_CTRL_INTERLEAVE_LEVEL_PARAMS *pParams) { - return pKernelChannel->__kchannelCtrlCmdSetInterleaveLevel__(pKernelChannel, pParams); +static inline NV_STATUS kchannelFwdToInternalCtrl_56cd7a(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvU32 internalCmd, RmCtrlParams *pRmCtrlParams) { + return NV_OK; } -NV_STATUS kchannelCtrlCmdRestartRunlist_IMPL(struct KernelChannel *pKernelChannel, NVA06F_CTRL_RESTART_RUNLIST_PARAMS *pParams); -static inline NV_STATUS kchannelCtrlCmdRestartRunlist_DISPATCH(struct KernelChannel *pKernelChannel, NVA06F_CTRL_RESTART_RUNLIST_PARAMS *pParams) { - return pKernelChannel->__kchannelCtrlCmdRestartRunlist__(pKernelChannel, pParams); +#ifdef __nvoc_kernel_channel_h_disabled +static inline NV_STATUS kchannelFwdToInternalCtrl(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvU32 internalCmd, RmCtrlParams *pRmCtrlParams) { + NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_channel_h_disabled +#define kchannelFwdToInternalCtrl(pGpu, pKernelChannel, internalCmd, pRmCtrlParams) kchannelFwdToInternalCtrl_56cd7a(pGpu, pKernelChannel, internalCmd, pRmCtrlParams) +#endif //__nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelCtrlCmdGetClassEngineidA16F_6a9a13(struct KernelChannel *pKernelChannel, NVA16F_CTRL_GET_CLASS_ENGINEID_PARAMS *pParams) { - return kchannelCtrlCmdGetClassEngineid(pKernelChannel, pParams); -} +#define kchannelFwdToInternalCtrl_HAL(pGpu, pKernelChannel, internalCmd, pRmCtrlParams) kchannelFwdToInternalCtrl(pGpu, pKernelChannel, internalCmd, pRmCtrlParams) -static inline NV_STATUS kchannelCtrlCmdGetClassEngineidA16F_DISPATCH(struct KernelChannel *pKernelChannel, NVA16F_CTRL_GET_CLASS_ENGINEID_PARAMS *pParams) { - return pKernelChannel->__kchannelCtrlCmdGetClassEngineidA16F__(pKernelChannel, pParams); +static inline NV_STATUS kchannelAllocChannel_56cd7a(struct KernelChannel *pKernelChannel, NV_CHANNEL_ALLOC_PARAMS *pChannelGpfifoParams) { + return NV_OK; } -static inline NV_STATUS kchannelCtrlCmdResetChannelA16F_ef73a1(struct KernelChannel *pKernelChannel, NVA16F_CTRL_CMD_RESET_CHANNEL_PARAMS *pResetChannelParams) { - return kchannelCtrlCmdResetChannel(pKernelChannel, pResetChannelParams); -} -static inline NV_STATUS kchannelCtrlCmdResetChannelA16F_DISPATCH(struct KernelChannel *pKernelChannel, NVA16F_CTRL_CMD_RESET_CHANNEL_PARAMS *pResetChannelParams) { - return pKernelChannel->__kchannelCtrlCmdResetChannelA16F__(pKernelChannel, pResetChannelParams); +#ifdef __nvoc_kernel_channel_h_disabled +static inline NV_STATUS kchannelAllocChannel(struct KernelChannel *pKernelChannel, NV_CHANNEL_ALLOC_PARAMS *pChannelGpfifoParams) { + NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_channel_h_disabled +#define kchannelAllocChannel(pKernelChannel, pChannelGpfifoParams) kchannelAllocChannel_56cd7a(pKernelChannel, pChannelGpfifoParams) +#endif //__nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelCtrlCmdGpFifoScheduleA16F_6546a6(struct KernelChannel *pKernelChannel, NVA16F_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams) { - return kchannelCtrlCmdGpFifoSchedule(pKernelChannel, pSchedParams); -} +#define kchannelAllocChannel_HAL(pKernelChannel, pChannelGpfifoParams) kchannelAllocChannel(pKernelChannel, pChannelGpfifoParams) -static inline NV_STATUS kchannelCtrlCmdGpFifoScheduleA16F_DISPATCH(struct KernelChannel *pKernelChannel, NVA16F_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams) { - return pKernelChannel->__kchannelCtrlCmdGpFifoScheduleA16F__(pKernelChannel, pSchedParams); +static inline NvBool kchannelIsValid_cbe027(struct KernelChannel *pKernelChannel) { + return ((NvBool)(0 == 0)); } -static inline NV_STATUS kchannelCtrlCmdGetClassEngineidA26F_6a9a13(struct KernelChannel *pKernelChannel, NVA26F_CTRL_GET_CLASS_ENGINEID_PARAMS *pParams) { - return kchannelCtrlCmdGetClassEngineid(pKernelChannel, pParams); -} -static inline NV_STATUS kchannelCtrlCmdGetClassEngineidA26F_DISPATCH(struct KernelChannel *pKernelChannel, NVA26F_CTRL_GET_CLASS_ENGINEID_PARAMS *pParams) { - return pKernelChannel->__kchannelCtrlCmdGetClassEngineidA26F__(pKernelChannel, pParams); +#ifdef __nvoc_kernel_channel_h_disabled +static inline NvBool kchannelIsValid(struct KernelChannel *pKernelChannel) { + NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); + return NV_FALSE; } +#else //__nvoc_kernel_channel_h_disabled +#define kchannelIsValid(pKernelChannel) kchannelIsValid_cbe027(pKernelChannel) +#endif //__nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelCtrlCmdResetChannelA26F_ef73a1(struct KernelChannel *pKernelChannel, NVA26F_CTRL_CMD_RESET_CHANNEL_PARAMS *pResetChannelParams) { - return kchannelCtrlCmdResetChannel(pKernelChannel, pResetChannelParams); -} +#define kchannelIsValid_HAL(pKernelChannel) kchannelIsValid(pKernelChannel) -static inline NV_STATUS kchannelCtrlCmdResetChannelA26F_DISPATCH(struct KernelChannel *pKernelChannel, NVA26F_CTRL_CMD_RESET_CHANNEL_PARAMS *pResetChannelParams) { - return pKernelChannel->__kchannelCtrlCmdResetChannelA26F__(pKernelChannel, pResetChannelParams); -} +NV_STATUS kchannelGetClassEngineID_GM107(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvHandle handle, NvU32 *classEngineID, NvU32 *classID, RM_ENGINE_TYPE *rmEngineID); -static inline NV_STATUS kchannelFCtrlCmdGpFifoScheduleA26F_6546a6(struct KernelChannel *pKernelChannel, NVA26F_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams) { - return kchannelCtrlCmdGpFifoSchedule(pKernelChannel, pSchedParams); -} -static inline NV_STATUS kchannelFCtrlCmdGpFifoScheduleA26F_DISPATCH(struct KernelChannel *pKernelChannel, NVA26F_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams) { - return pKernelChannel->__kchannelFCtrlCmdGpFifoScheduleA26F__(pKernelChannel, pSchedParams); +#ifdef __nvoc_kernel_channel_h_disabled +static inline NV_STATUS kchannelGetClassEngineID(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvHandle handle, NvU32 *classEngineID, NvU32 *classID, RM_ENGINE_TYPE *rmEngineID) { + NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_channel_h_disabled +#define kchannelGetClassEngineID(pGpu, pKernelChannel, handle, classEngineID, classID, rmEngineID) kchannelGetClassEngineID_GM107(pGpu, pKernelChannel, handle, classEngineID, classID, rmEngineID) +#endif //__nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelCtrlCmdGetClassEngineidB06F_6a9a13(struct KernelChannel *pKernelChannel, NVB06F_CTRL_GET_CLASS_ENGINEID_PARAMS *pParams) { - return kchannelCtrlCmdGetClassEngineid(pKernelChannel, pParams); -} +#define kchannelGetClassEngineID_HAL(pGpu, pKernelChannel, handle, classEngineID, classID, rmEngineID) kchannelGetClassEngineID(pGpu, pKernelChannel, handle, classEngineID, classID, rmEngineID) -static inline NV_STATUS kchannelCtrlCmdGetClassEngineidB06F_DISPATCH(struct KernelChannel *pKernelChannel, NVB06F_CTRL_GET_CLASS_ENGINEID_PARAMS *pParams) { - return pKernelChannel->__kchannelCtrlCmdGetClassEngineidB06F__(pKernelChannel, pParams); -} +NV_STATUS kchannelEnableVirtualContext_GM107(struct KernelChannel *arg1); -static inline NV_STATUS kchannelCtrlCmdResetChannelB06F_ef73a1(struct KernelChannel *pKernelChannel, NVB06F_CTRL_CMD_RESET_CHANNEL_PARAMS *pResetChannelParams) { - return kchannelCtrlCmdResetChannel(pKernelChannel, pResetChannelParams); -} -static inline NV_STATUS kchannelCtrlCmdResetChannelB06F_DISPATCH(struct KernelChannel *pKernelChannel, NVB06F_CTRL_CMD_RESET_CHANNEL_PARAMS *pResetChannelParams) { - return pKernelChannel->__kchannelCtrlCmdResetChannelB06F__(pKernelChannel, pResetChannelParams); +#ifdef __nvoc_kernel_channel_h_disabled +static inline NV_STATUS kchannelEnableVirtualContext(struct KernelChannel *arg1) { + NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_channel_h_disabled +#define kchannelEnableVirtualContext(arg1) kchannelEnableVirtualContext_GM107(arg1) +#endif //__nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelCtrlCmdGpFifoScheduleB06F_6546a6(struct KernelChannel *pKernelChannel, NVB06F_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams) { - return kchannelCtrlCmdGpFifoSchedule(pKernelChannel, pSchedParams); -} +#define kchannelEnableVirtualContext_HAL(arg1) kchannelEnableVirtualContext(arg1) -static inline NV_STATUS kchannelCtrlCmdGpFifoScheduleB06F_DISPATCH(struct KernelChannel *pKernelChannel, NVB06F_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams) { - return pKernelChannel->__kchannelCtrlCmdGpFifoScheduleB06F__(pKernelChannel, pSchedParams); +static inline NV_STATUS kchannelRotateSecureChannelIv_46f6a7(struct KernelChannel *pKernelChannel, ROTATE_IV_TYPE rotateOperation, NvU32 *encryptIv, NvU32 *decryptIv) { + return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kchannelCtrlCmdBindB06F_2c1c21(struct KernelChannel *pKernelChannel, NVB06F_CTRL_BIND_PARAMS *pParams) { - return kchannelCtrlCmdBind(pKernelChannel, pParams); -} -static inline NV_STATUS kchannelCtrlCmdBindB06F_DISPATCH(struct KernelChannel *pKernelChannel, NVB06F_CTRL_BIND_PARAMS *pParams) { - return pKernelChannel->__kchannelCtrlCmdBindB06F__(pKernelChannel, pParams); +#ifdef __nvoc_kernel_channel_h_disabled +static inline NV_STATUS kchannelRotateSecureChannelIv(struct KernelChannel *pKernelChannel, ROTATE_IV_TYPE rotateOperation, NvU32 *encryptIv, NvU32 *decryptIv) { + NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_channel_h_disabled +#define kchannelRotateSecureChannelIv(pKernelChannel, rotateOperation, encryptIv, decryptIv) kchannelRotateSecureChannelIv_46f6a7(pKernelChannel, rotateOperation, encryptIv, decryptIv) +#endif //__nvoc_kernel_channel_h_disabled -NV_STATUS kchannelCtrlCmdGetEngineCtxSize_IMPL(struct KernelChannel *pKernelChannel, NVB06F_CTRL_GET_ENGINE_CTX_SIZE_PARAMS *pCtxSizeParams); +#define kchannelRotateSecureChannelIv_HAL(pKernelChannel, rotateOperation, encryptIv, decryptIv) kchannelRotateSecureChannelIv(pKernelChannel, rotateOperation, encryptIv, decryptIv) -static inline NV_STATUS kchannelCtrlCmdGetEngineCtxSize_DISPATCH(struct KernelChannel *pKernelChannel, NVB06F_CTRL_GET_ENGINE_CTX_SIZE_PARAMS *pCtxSizeParams) { - return pKernelChannel->__kchannelCtrlCmdGetEngineCtxSize__(pKernelChannel, pCtxSizeParams); -} +NV_STATUS kchannelMap_IMPL(struct KernelChannel *pKernelChannel, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); -NV_STATUS kchannelCtrlCmdGetEngineCtxData_IMPL(struct KernelChannel *pKernelChannel, NVB06F_CTRL_GET_ENGINE_CTX_DATA_PARAMS *pCtxBuffParams); +NV_STATUS kchannelUnmap_IMPL(struct KernelChannel *pKernelChannel, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); -static inline NV_STATUS kchannelCtrlCmdGetEngineCtxData_DISPATCH(struct KernelChannel *pKernelChannel, NVB06F_CTRL_GET_ENGINE_CTX_DATA_PARAMS *pCtxBuffParams) { - return pKernelChannel->__kchannelCtrlCmdGetEngineCtxData__(pKernelChannel, pCtxBuffParams); -} +NV_STATUS kchannelGetMapAddrSpace_IMPL(struct KernelChannel *pKernelChannel, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); -NV_STATUS kchannelCtrlCmdMigrateEngineCtxData_IMPL(struct KernelChannel *pKernelChannel, NVB06F_CTRL_MIGRATE_ENGINE_CTX_DATA_PARAMS *pCtxBuffParams); +NV_STATUS kchannelGetMemInterMapParams_IMPL(struct KernelChannel *pKernelChannel, RMRES_MEM_INTER_MAP_PARAMS *pParams); -static inline NV_STATUS kchannelCtrlCmdMigrateEngineCtxData_DISPATCH(struct KernelChannel *pKernelChannel, NVB06F_CTRL_MIGRATE_ENGINE_CTX_DATA_PARAMS *pCtxBuffParams) { - return pKernelChannel->__kchannelCtrlCmdMigrateEngineCtxData__(pKernelChannel, pCtxBuffParams); -} +NV_STATUS kchannelCheckMemInterUnmap_IMPL(struct KernelChannel *pKernelChannel, NvBool bSubdeviceHandleProvided); -NV_STATUS kchannelCtrlCmdGetEngineCtxState_IMPL(struct KernelChannel *pKernelChannel, NVB06F_CTRL_GET_ENGINE_CTX_STATE_PARAMS *pCtxStateParams); +NV_STATUS kchannelCreateUserMemDesc_GM107(struct OBJGPU *pGpu, struct KernelChannel *arg2); -static inline NV_STATUS kchannelCtrlCmdGetEngineCtxState_DISPATCH(struct KernelChannel *pKernelChannel, NVB06F_CTRL_GET_ENGINE_CTX_STATE_PARAMS *pCtxStateParams) { - return pKernelChannel->__kchannelCtrlCmdGetEngineCtxState__(pKernelChannel, pCtxStateParams); -} +NV_STATUS kchannelCreateUserMemDesc_GA10B(struct OBJGPU *pGpu, struct KernelChannel *arg2); -NV_STATUS kchannelCtrlCmdGetChannelHwState_IMPL(struct KernelChannel *pKernelChannel, NVB06F_CTRL_GET_CHANNEL_HW_STATE_PARAMS *pParams); +NvBool kchannelIsUserdAddrSizeValid_GV100(struct KernelChannel *pKernelChannel, NvU32 userdAddrLo, NvU32 userdAddrHi); -static inline NV_STATUS kchannelCtrlCmdGetChannelHwState_DISPATCH(struct KernelChannel *pKernelChannel, NVB06F_CTRL_GET_CHANNEL_HW_STATE_PARAMS *pParams) { - return pKernelChannel->__kchannelCtrlCmdGetChannelHwState__(pKernelChannel, pParams); -} +NvBool kchannelIsUserdAddrSizeValid_GA100(struct KernelChannel *pKernelChannel, NvU32 userdAddrLo, NvU32 userdAddrHi); -NV_STATUS kchannelCtrlCmdSetChannelHwState_IMPL(struct KernelChannel *pKernelChannel, NVB06F_CTRL_SET_CHANNEL_HW_STATE_PARAMS *pParams); +NvBool kchannelIsUserdAddrSizeValid_GH100(struct KernelChannel *pKernelChannel, NvU32 userdAddrLo, NvU32 userdAddrHi); -static inline NV_STATUS kchannelCtrlCmdSetChannelHwState_DISPATCH(struct KernelChannel *pKernelChannel, NVB06F_CTRL_SET_CHANNEL_HW_STATE_PARAMS *pParams) { - return pKernelChannel->__kchannelCtrlCmdSetChannelHwState__(pKernelChannel, pParams); -} +NV_STATUS kchannelCtrlCmdResetIsolatedChannel_IMPL(struct KernelChannel *pKernelChannel, NV506F_CTRL_CMD_RESET_ISOLATED_CHANNEL_PARAMS *pResetParams); -NV_STATUS kchannelCtrlCmdSaveEngineCtxData_IMPL(struct KernelChannel *pKernelChannel, NVB06F_CTRL_SAVE_ENGINE_CTX_DATA_PARAMS *pCtxBuffParams); +NV_STATUS kchannelCtrlCmdInternalResetIsolatedChannel_IMPL(struct KernelChannel *pKernelChannel, NV506F_CTRL_CMD_INTERNAL_RESET_ISOLATED_CHANNEL_PARAMS *pResetParams); -static inline NV_STATUS kchannelCtrlCmdSaveEngineCtxData_DISPATCH(struct KernelChannel *pKernelChannel, NVB06F_CTRL_SAVE_ENGINE_CTX_DATA_PARAMS *pCtxBuffParams) { - return pKernelChannel->__kchannelCtrlCmdSaveEngineCtxData__(pKernelChannel, pCtxBuffParams); -} +NV_STATUS kchannelCtrlCmdGetClassEngineid_IMPL(struct KernelChannel *pKernelChannel, NV906F_CTRL_GET_CLASS_ENGINEID_PARAMS *pParams); -NV_STATUS kchannelCtrlCmdRestoreEngineCtxData_IMPL(struct KernelChannel *pKernelChannel, NVB06F_CTRL_RESTORE_ENGINE_CTX_DATA_PARAMS *pCtxBuffParams); +NV_STATUS kchannelCtrlCmdResetChannel_IMPL(struct KernelChannel *pKernelChannel, NV906F_CTRL_CMD_RESET_CHANNEL_PARAMS *pResetChannelParams); -static inline NV_STATUS kchannelCtrlCmdRestoreEngineCtxData_DISPATCH(struct KernelChannel *pKernelChannel, NVB06F_CTRL_RESTORE_ENGINE_CTX_DATA_PARAMS *pCtxBuffParams) { - return pKernelChannel->__kchannelCtrlCmdRestoreEngineCtxData__(pKernelChannel, pCtxBuffParams); -} +NV_STATUS kchannelCtrlCmdGetDeferRCState_IMPL(struct KernelChannel *pKernelChannel, NV906F_CTRL_CMD_GET_DEFER_RC_STATE_PARAMS *pStateParams); -static inline NV_STATUS kchannelCtrlCmdGetClassEngineidC06F_6a9a13(struct KernelChannel *pKernelChannel, NVC06F_CTRL_GET_CLASS_ENGINEID_PARAMS *pParams) { - return kchannelCtrlCmdGetClassEngineid(pKernelChannel, pParams); -} +NV_STATUS kchannelCtrlCmdGetMmuFaultInfo_IMPL(struct KernelChannel *pKernelChannel, NV906F_CTRL_GET_MMU_FAULT_INFO_PARAMS *pFaultInfoParams); -static inline NV_STATUS kchannelCtrlCmdGetClassEngineidC06F_DISPATCH(struct KernelChannel *pKernelChannel, NVC06F_CTRL_GET_CLASS_ENGINEID_PARAMS *pParams) { - return pKernelChannel->__kchannelCtrlCmdGetClassEngineidC06F__(pKernelChannel, pParams); -} +NV_STATUS kchannelCtrlCmdEventSetNotification_IMPL(struct KernelChannel *pKernelChannel, NV906F_CTRL_EVENT_SET_NOTIFICATION_PARAMS *pSetEventParams); -static inline NV_STATUS kchannelCtrlCmdResetChannelC06F_ef73a1(struct KernelChannel *pKernelChannel, NVC06F_CTRL_CMD_RESET_CHANNEL_PARAMS *pResetChannelParams) { - return kchannelCtrlCmdResetChannel(pKernelChannel, pResetChannelParams); -} +NV_STATUS kchannelCtrlCmdGpFifoSchedule_IMPL(struct KernelChannel *pKernelChannel, NVA06F_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams); -static inline NV_STATUS kchannelCtrlCmdResetChannelC06F_DISPATCH(struct KernelChannel *pKernelChannel, NVC06F_CTRL_CMD_RESET_CHANNEL_PARAMS *pResetChannelParams) { - return pKernelChannel->__kchannelCtrlCmdResetChannelC06F__(pKernelChannel, pResetChannelParams); -} +NV_STATUS kchannelCtrlCmdBind_IMPL(struct KernelChannel *pKernelChannel, NVA06F_CTRL_BIND_PARAMS *pParams); -static inline NV_STATUS kchannelCtrlCmdGpFifoScheduleC06F_6546a6(struct KernelChannel *pKernelChannel, NVC06F_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams) { - return kchannelCtrlCmdGpFifoSchedule(pKernelChannel, pSchedParams); -} +NV_STATUS kchannelCtrlCmdSetErrorNotifier_IMPL(struct KernelChannel *pKernelChannel, NVA06F_CTRL_SET_ERROR_NOTIFIER_PARAMS *pSetErrorNotifierParams); -static inline NV_STATUS kchannelCtrlCmdGpFifoScheduleC06F_DISPATCH(struct KernelChannel *pKernelChannel, NVC06F_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams) { - return pKernelChannel->__kchannelCtrlCmdGpFifoScheduleC06F__(pKernelChannel, pSchedParams); -} +NV_STATUS kchannelCtrlCmdSetInterleaveLevel_IMPL(struct KernelChannel *pKernelChannel, NVA06F_CTRL_INTERLEAVE_LEVEL_PARAMS *pParams); -static inline NV_STATUS kchannelCtrlCmdBindC06F_2c1c21(struct KernelChannel *pKernelChannel, NVC06F_CTRL_BIND_PARAMS *pParams) { - return kchannelCtrlCmdBind(pKernelChannel, pParams); -} +NV_STATUS kchannelCtrlCmdGetContextId_IMPL(struct KernelChannel *pKernelChannel, NVA06F_CTRL_GET_CONTEXT_ID_PARAMS *pParams); -static inline NV_STATUS kchannelCtrlCmdBindC06F_DISPATCH(struct KernelChannel *pKernelChannel, NVC06F_CTRL_BIND_PARAMS *pParams) { - return pKernelChannel->__kchannelCtrlCmdBindC06F__(pKernelChannel, pParams); -} +NV_STATUS kchannelCtrlCmdRestartRunlist_IMPL(struct KernelChannel *pKernelChannel, NVA06F_CTRL_RESTART_RUNLIST_PARAMS *pParams); -static inline NV_STATUS kchannelCtrlCmdGetClassEngineidC36F_6a9a13(struct KernelChannel *pKernelChannel, NVC36F_CTRL_GET_CLASS_ENGINEID_PARAMS *pParams) { - return kchannelCtrlCmdGetClassEngineid(pKernelChannel, pParams); -} +NV_STATUS kchannelCtrlCmdGetEngineCtxSize_IMPL(struct KernelChannel *pKernelChannel, NVB06F_CTRL_GET_ENGINE_CTX_SIZE_PARAMS *pCtxSizeParams); -static inline NV_STATUS kchannelCtrlCmdGetClassEngineidC36F_DISPATCH(struct KernelChannel *pKernelChannel, NVC36F_CTRL_GET_CLASS_ENGINEID_PARAMS *pParams) { - return pKernelChannel->__kchannelCtrlCmdGetClassEngineidC36F__(pKernelChannel, pParams); -} +NV_STATUS kchannelCtrlCmdGetEngineCtxData_IMPL(struct KernelChannel *pKernelChannel, NVB06F_CTRL_GET_ENGINE_CTX_DATA_PARAMS *pCtxBuffParams); -static inline NV_STATUS kchannelCtrlCmdResetChannelC36F_ef73a1(struct KernelChannel *pKernelChannel, NVC36F_CTRL_CMD_RESET_CHANNEL_PARAMS *pResetChannelParams) { - return kchannelCtrlCmdResetChannel(pKernelChannel, pResetChannelParams); -} +NV_STATUS kchannelCtrlCmdMigrateEngineCtxData_IMPL(struct KernelChannel *pKernelChannel, NVB06F_CTRL_MIGRATE_ENGINE_CTX_DATA_PARAMS *pCtxBuffParams); -static inline NV_STATUS kchannelCtrlCmdResetChannelC36F_DISPATCH(struct KernelChannel *pKernelChannel, NVC36F_CTRL_CMD_RESET_CHANNEL_PARAMS *pResetChannelParams) { - return pKernelChannel->__kchannelCtrlCmdResetChannelC36F__(pKernelChannel, pResetChannelParams); -} +NV_STATUS kchannelCtrlCmdGetEngineCtxState_IMPL(struct KernelChannel *pKernelChannel, NVB06F_CTRL_GET_ENGINE_CTX_STATE_PARAMS *pCtxStateParams); -static inline NV_STATUS kchannelCtrlCmdGpFifoScheduleC36F_6546a6(struct KernelChannel *pKernelChannel, NVC36F_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams) { - return kchannelCtrlCmdGpFifoSchedule(pKernelChannel, pSchedParams); -} +NV_STATUS kchannelCtrlCmdGetChannelHwState_IMPL(struct KernelChannel *pKernelChannel, NVB06F_CTRL_GET_CHANNEL_HW_STATE_PARAMS *pParams); -static inline NV_STATUS kchannelCtrlCmdGpFifoScheduleC36F_DISPATCH(struct KernelChannel *pKernelChannel, NVC36F_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams) { - return pKernelChannel->__kchannelCtrlCmdGpFifoScheduleC36F__(pKernelChannel, pSchedParams); -} +NV_STATUS kchannelCtrlCmdSetChannelHwState_IMPL(struct KernelChannel *pKernelChannel, NVB06F_CTRL_SET_CHANNEL_HW_STATE_PARAMS *pParams); -static inline NV_STATUS kchannelCtrlCmdBindC36F_2c1c21(struct KernelChannel *pKernelChannel, NVC36F_CTRL_BIND_PARAMS *pParams) { - return kchannelCtrlCmdBind(pKernelChannel, pParams); -} +NV_STATUS kchannelCtrlCmdSaveEngineCtxData_IMPL(struct KernelChannel *pKernelChannel, NVB06F_CTRL_SAVE_ENGINE_CTX_DATA_PARAMS *pCtxBuffParams); -static inline NV_STATUS kchannelCtrlCmdBindC36F_DISPATCH(struct KernelChannel *pKernelChannel, NVC36F_CTRL_BIND_PARAMS *pParams) { - return pKernelChannel->__kchannelCtrlCmdBindC36F__(pKernelChannel, pParams); -} +NV_STATUS kchannelCtrlCmdRestoreEngineCtxData_IMPL(struct KernelChannel *pKernelChannel, NVB06F_CTRL_RESTORE_ENGINE_CTX_DATA_PARAMS *pCtxBuffParams); NV_STATUS kchannelCtrlCmdGpfifoGetWorkSubmitToken_IMPL(struct KernelChannel *pKernelChannel, NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS *pTokenParams); -static inline NV_STATUS kchannelCtrlCmdGpfifoGetWorkSubmitToken_DISPATCH(struct KernelChannel *pKernelChannel, NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS *pTokenParams) { - return pKernelChannel->__kchannelCtrlCmdGpfifoGetWorkSubmitToken__(pKernelChannel, pTokenParams); -} - NV_STATUS kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer_IMPL(struct KernelChannel *pKernelChannel, NVC36F_CTRL_GPFIFO_UPDATE_FAULT_METHOD_BUFFER_PARAMS *pFaultMthdBufferParams); -static inline NV_STATUS kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer_DISPATCH(struct KernelChannel *pKernelChannel, NVC36F_CTRL_GPFIFO_UPDATE_FAULT_METHOD_BUFFER_PARAMS *pFaultMthdBufferParams) { - return pKernelChannel->__kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer__(pKernelChannel, pFaultMthdBufferParams); -} - NV_STATUS kchannelCtrlCmdGpfifoSetWorkSubmitTokenNotifIndex_IMPL(struct KernelChannel *pKernelChannel, NVC36F_CTRL_GPFIFO_SET_WORK_SUBMIT_TOKEN_NOTIF_INDEX_PARAMS *pParams); -static inline NV_STATUS kchannelCtrlCmdGpfifoSetWorkSubmitTokenNotifIndex_DISPATCH(struct KernelChannel *pKernelChannel, NVC36F_CTRL_GPFIFO_SET_WORK_SUBMIT_TOKEN_NOTIF_INDEX_PARAMS *pParams) { - return pKernelChannel->__kchannelCtrlCmdGpfifoSetWorkSubmitTokenNotifIndex__(pKernelChannel, pParams); -} - NV_STATUS kchannelCtrlCmdStopChannel_IMPL(struct KernelChannel *pKernelChannel, NVA06F_CTRL_STOP_CHANNEL_PARAMS *pStopChannelParams); -static inline NV_STATUS kchannelCtrlCmdStopChannel_DISPATCH(struct KernelChannel *pKernelChannel, NVA06F_CTRL_STOP_CHANNEL_PARAMS *pStopChannelParams) { - return pKernelChannel->__kchannelCtrlCmdStopChannel__(pKernelChannel, pStopChannelParams); -} - static inline NV_STATUS kchannelCtrlCmdGetKmb_46f6a7(struct KernelChannel *pKernelChannel, NVC56F_CTRL_CMD_GET_KMB_PARAMS *pGetKmbParams) { return NV_ERR_NOT_SUPPORTED; } NV_STATUS kchannelCtrlCmdGetKmb_KERNEL(struct KernelChannel *pKernelChannel, NVC56F_CTRL_CMD_GET_KMB_PARAMS *pGetKmbParams); -static inline NV_STATUS kchannelCtrlCmdGetKmb_DISPATCH(struct KernelChannel *pKernelChannel, NVC56F_CTRL_CMD_GET_KMB_PARAMS *pGetKmbParams) { - return pKernelChannel->__kchannelCtrlCmdGetKmb__(pKernelChannel, pGetKmbParams); -} - static inline NV_STATUS kchannelCtrlRotateSecureChannelIv_46f6a7(struct KernelChannel *pKernelChannel, NVC56F_CTRL_ROTATE_SECURE_CHANNEL_IV_PARAMS *pRotateIvParams) { return NV_ERR_NOT_SUPPORTED; } NV_STATUS kchannelCtrlRotateSecureChannelIv_KERNEL(struct KernelChannel *pKernelChannel, NVC56F_CTRL_ROTATE_SECURE_CHANNEL_IV_PARAMS *pRotateIvParams); -static inline NV_STATUS kchannelCtrlRotateSecureChannelIv_DISPATCH(struct KernelChannel *pKernelChannel, NVC56F_CTRL_ROTATE_SECURE_CHANNEL_IV_PARAMS *pRotateIvParams) { - return pKernelChannel->__kchannelCtrlRotateSecureChannelIv__(pKernelChannel, pRotateIvParams); +NV_STATUS kchannelSetEncryptionStatsBuffer_KERNEL(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, MEMORY_DESCRIPTOR *pMemDesc, NvBool bSet); + +static inline NV_STATUS kchannelSetEncryptionStatsBuffer_56cd7a(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, MEMORY_DESCRIPTOR *pMemDesc, NvBool bSet) { + return NV_OK; } static inline NV_STATUS kchannelCtrlGetTpcPartitionMode_a094e1(struct KernelChannel *pKernelChannel, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *pParams) { return kgrctxCtrlHandle(resservGetTlsCallContext(), pKernelChannel->hKernelGraphicsContext); } -static inline NV_STATUS kchannelCtrlGetTpcPartitionMode_DISPATCH(struct KernelChannel *pKernelChannel, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *pParams) { - return pKernelChannel->__kchannelCtrlGetTpcPartitionMode__(pKernelChannel, pParams); -} - static inline NV_STATUS kchannelCtrlSetTpcPartitionMode_a094e1(struct KernelChannel *pKernelChannel, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *pParams) { return kgrctxCtrlHandle(resservGetTlsCallContext(), pKernelChannel->hKernelGraphicsContext); } -static inline NV_STATUS kchannelCtrlSetTpcPartitionMode_DISPATCH(struct KernelChannel *pKernelChannel, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *pParams) { - return pKernelChannel->__kchannelCtrlSetTpcPartitionMode__(pKernelChannel, pParams); -} - static inline NV_STATUS kchannelCtrlGetMMUDebugMode_a094e1(struct KernelChannel *pKernelChannel, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *pParams) { return kgrctxCtrlHandle(resservGetTlsCallContext(), pKernelChannel->hKernelGraphicsContext); } -static inline NV_STATUS kchannelCtrlGetMMUDebugMode_DISPATCH(struct KernelChannel *pKernelChannel, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *pParams) { - return pKernelChannel->__kchannelCtrlGetMMUDebugMode__(pKernelChannel, pParams); -} - static inline NV_STATUS kchannelCtrlProgramVidmemPromote_a094e1(struct KernelChannel *pKernelChannel, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *pParams) { return kgrctxCtrlHandle(resservGetTlsCallContext(), pKernelChannel->hKernelGraphicsContext); } -static inline NV_STATUS kchannelCtrlProgramVidmemPromote_DISPATCH(struct KernelChannel *pKernelChannel, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *pParams) { - return pKernelChannel->__kchannelCtrlProgramVidmemPromote__(pKernelChannel, pParams); -} - static inline NV_STATUS kchannelRetrieveKmb_56cd7a(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, ROTATE_IV_TYPE rotateOperation, NvBool includeSecrets, CC_KMB *keyMaterialBundle) { return NV_OK; } NV_STATUS kchannelRetrieveKmb_KERNEL(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, ROTATE_IV_TYPE rotateOperation, NvBool includeSecrets, CC_KMB *keyMaterialBundle); -static inline NV_STATUS kchannelRetrieveKmb_DISPATCH(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, ROTATE_IV_TYPE rotateOperation, NvBool includeSecrets, CC_KMB *keyMaterialBundle) { - return pKernelChannel->__kchannelRetrieveKmb__(pGpu, pKernelChannel, rotateOperation, includeSecrets, keyMaterialBundle); -} - NV_STATUS kchannelSetKeyRotationNotifier_KERNEL(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvBool bSet); static inline NV_STATUS kchannelSetKeyRotationNotifier_56cd7a(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvBool bSet) { return NV_OK; } -static inline NV_STATUS kchannelSetKeyRotationNotifier_DISPATCH(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvBool bSet) { - return pKernelChannel->__kchannelSetKeyRotationNotifier__(pGpu, pKernelChannel, bSet); -} - -NV_STATUS kchannelSetEncryptionStatsBuffer_KERNEL(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvBool bSet); - -static inline NV_STATUS kchannelSetEncryptionStatsBuffer_56cd7a(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvBool bSet) { - return NV_OK; -} - -static inline NV_STATUS kchannelSetEncryptionStatsBuffer_DISPATCH(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvBool bSet) { - return pKernelChannel->__kchannelSetEncryptionStatsBuffer__(pGpu, pKernelChannel, bSet); -} - -static inline NvBool kchannelShareCallback_DISPATCH(struct KernelChannel *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__kchannelShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS kchannelGetOrAllocNotifShare_DISPATCH(struct KernelChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__kchannelGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); -} - -static inline NV_STATUS kchannelMapTo_DISPATCH(struct KernelChannel *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__kchannelMapTo__(pResource, pParams); -} - -static inline void kchannelSetNotificationShare_DISPATCH(struct KernelChannel *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__kchannelSetNotificationShare__(pNotifier, pNotifShare); -} - -static inline NvU32 kchannelGetRefCount_DISPATCH(struct KernelChannel *pResource) { - return pResource->__kchannelGetRefCount__(pResource); -} - -static inline void kchannelAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelChannel *pResource, RsResourceRef *pReference) { - pResource->__kchannelAddAdditionalDependants__(pClient, pResource, pReference); -} - -static inline NV_STATUS kchannelControl_Prologue_DISPATCH(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kchannelControl_Prologue__(pResource, pCallContext, pParams); -} - -static inline NV_STATUS kchannelGetRegBaseOffsetAndSize_DISPATCH(struct KernelChannel *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__kchannelGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); -} - -static inline NV_STATUS kchannelInternalControlForward_DISPATCH(struct KernelChannel *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__kchannelInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS kchannelUnmapFrom_DISPATCH(struct KernelChannel *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__kchannelUnmapFrom__(pResource, pParams); -} - -static inline void kchannelControl_Epilogue_DISPATCH(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kchannelControl_Epilogue__(pResource, pCallContext, pParams); -} - -static inline NvHandle kchannelGetInternalObjectHandle_DISPATCH(struct KernelChannel *pGpuResource) { - return pGpuResource->__kchannelGetInternalObjectHandle__(pGpuResource); -} - -static inline NV_STATUS kchannelControl_DISPATCH(struct KernelChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__kchannelControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS kchannelGetMemoryMappingDescriptor_DISPATCH(struct KernelChannel *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__kchannelGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); -} - -static inline NV_STATUS kchannelControlFilter_DISPATCH(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kchannelControlFilter__(pResource, pCallContext, pParams); -} - -static inline NV_STATUS kchannelUnregisterEvent_DISPATCH(struct KernelChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__kchannelUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static inline NV_STATUS kchannelControlSerialization_Prologue_DISPATCH(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kchannelControlSerialization_Prologue__(pResource, pCallContext, pParams); -} - -static inline NvBool kchannelCanCopy_DISPATCH(struct KernelChannel *pResource) { - return pResource->__kchannelCanCopy__(pResource); -} - -static inline NvBool kchannelIsPartialUnmapSupported_DISPATCH(struct KernelChannel *pResource) { - return pResource->__kchannelIsPartialUnmapSupported__(pResource); -} - -static inline void kchannelPreDestruct_DISPATCH(struct KernelChannel *pResource) { - pResource->__kchannelPreDestruct__(pResource); -} - -static inline NV_STATUS kchannelIsDuplicate_DISPATCH(struct KernelChannel *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__kchannelIsDuplicate__(pResource, hMemory, pDuplicate); -} - -static inline void kchannelControlSerialization_Epilogue_DISPATCH(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kchannelControlSerialization_Epilogue__(pResource, pCallContext, pParams); -} - -static inline PEVENTNOTIFICATION *kchannelGetNotificationListPtr_DISPATCH(struct KernelChannel *pNotifier) { - return pNotifier->__kchannelGetNotificationListPtr__(pNotifier); -} - -static inline struct NotifShare *kchannelGetNotificationShare_DISPATCH(struct KernelChannel *pNotifier) { - return pNotifier->__kchannelGetNotificationShare__(pNotifier); -} - -static inline NvBool kchannelAccessCallback_DISPATCH(struct KernelChannel *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__kchannelAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} - static inline NvU32 kchannelGetDebugTag(const struct KernelChannel *pKernelChannel) { if (pKernelChannel == ((void *)0)) return 4294967295U; @@ -1474,57 +1368,57 @@ static inline NV_STATUS kchannelCheckBcStateCurrent(struct OBJGPU *pGpu, struct #define kchannelCheckBcStateCurrent(pGpu, pKernelChannel) kchannelCheckBcStateCurrent_IMPL(pGpu, pKernelChannel) #endif //__nvoc_kernel_channel_h_disabled -NV_STATUS kchannelUpdateWorkSubmitTokenNotifIndex_IMPL(struct OBJGPU *pGpu, struct KernelChannel *arg0, NvU32 index); +NV_STATUS kchannelUpdateWorkSubmitTokenNotifIndex_IMPL(struct OBJGPU *pGpu, struct KernelChannel *arg2, NvU32 index); #ifdef __nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelUpdateWorkSubmitTokenNotifIndex(struct OBJGPU *pGpu, struct KernelChannel *arg0, NvU32 index) { +static inline NV_STATUS kchannelUpdateWorkSubmitTokenNotifIndex(struct OBJGPU *pGpu, struct KernelChannel *arg2, NvU32 index) { NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_channel_h_disabled -#define kchannelUpdateWorkSubmitTokenNotifIndex(pGpu, arg0, index) kchannelUpdateWorkSubmitTokenNotifIndex_IMPL(pGpu, arg0, index) +#define kchannelUpdateWorkSubmitTokenNotifIndex(pGpu, arg2, index) kchannelUpdateWorkSubmitTokenNotifIndex_IMPL(pGpu, arg2, index) #endif //__nvoc_kernel_channel_h_disabled -NV_STATUS kchannelNotifyWorkSubmitToken_IMPL(struct OBJGPU *pGpu, struct KernelChannel *arg0, NvU32 token); +NV_STATUS kchannelNotifyWorkSubmitToken_IMPL(struct OBJGPU *pGpu, struct KernelChannel *arg2, NvU32 token); #ifdef __nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelNotifyWorkSubmitToken(struct OBJGPU *pGpu, struct KernelChannel *arg0, NvU32 token) { +static inline NV_STATUS kchannelNotifyWorkSubmitToken(struct OBJGPU *pGpu, struct KernelChannel *arg2, NvU32 token) { NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_channel_h_disabled -#define kchannelNotifyWorkSubmitToken(pGpu, arg0, token) kchannelNotifyWorkSubmitToken_IMPL(pGpu, arg0, token) +#define kchannelNotifyWorkSubmitToken(pGpu, arg2, token) kchannelNotifyWorkSubmitToken_IMPL(pGpu, arg2, token) #endif //__nvoc_kernel_channel_h_disabled -NV_STATUS kchannelMapUserD_IMPL(struct OBJGPU *pGpu, struct KernelChannel *arg0, RS_PRIV_LEVEL arg1, NvU64 arg2, NvU32 arg3, NvP64 *arg4, NvP64 *arg5); +NV_STATUS kchannelMapUserD_IMPL(struct OBJGPU *pGpu, struct KernelChannel *arg2, RS_PRIV_LEVEL arg3, NvU64 arg4, NvU32 arg5, NvP64 *arg6, NvP64 *arg7); #ifdef __nvoc_kernel_channel_h_disabled -static inline NV_STATUS kchannelMapUserD(struct OBJGPU *pGpu, struct KernelChannel *arg0, RS_PRIV_LEVEL arg1, NvU64 arg2, NvU32 arg3, NvP64 *arg4, NvP64 *arg5) { +static inline NV_STATUS kchannelMapUserD(struct OBJGPU *pGpu, struct KernelChannel *arg2, RS_PRIV_LEVEL arg3, NvU64 arg4, NvU32 arg5, NvP64 *arg6, NvP64 *arg7) { NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_channel_h_disabled -#define kchannelMapUserD(pGpu, arg0, arg1, arg2, arg3, arg4, arg5) kchannelMapUserD_IMPL(pGpu, arg0, arg1, arg2, arg3, arg4, arg5) +#define kchannelMapUserD(pGpu, arg2, arg3, arg4, arg5, arg6, arg7) kchannelMapUserD_IMPL(pGpu, arg2, arg3, arg4, arg5, arg6, arg7) #endif //__nvoc_kernel_channel_h_disabled -void kchannelUnmapUserD_IMPL(struct OBJGPU *pGpu, struct KernelChannel *arg0, RS_PRIV_LEVEL arg1, NvP64 *arg2, NvP64 *arg3); +void kchannelUnmapUserD_IMPL(struct OBJGPU *pGpu, struct KernelChannel *arg2, RS_PRIV_LEVEL arg3, NvP64 *arg4, NvP64 *arg5); #ifdef __nvoc_kernel_channel_h_disabled -static inline void kchannelUnmapUserD(struct OBJGPU *pGpu, struct KernelChannel *arg0, RS_PRIV_LEVEL arg1, NvP64 *arg2, NvP64 *arg3) { +static inline void kchannelUnmapUserD(struct OBJGPU *pGpu, struct KernelChannel *arg2, RS_PRIV_LEVEL arg3, NvP64 *arg4, NvP64 *arg5) { NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); } #else //__nvoc_kernel_channel_h_disabled -#define kchannelUnmapUserD(pGpu, arg0, arg1, arg2, arg3) kchannelUnmapUserD_IMPL(pGpu, arg0, arg1, arg2, arg3) +#define kchannelUnmapUserD(pGpu, arg2, arg3, arg4, arg5) kchannelUnmapUserD_IMPL(pGpu, arg2, arg3, arg4, arg5) #endif //__nvoc_kernel_channel_h_disabled -void kchannelFillMmuExceptionInfo_IMPL(struct KernelChannel *pKernelChannel, FIFO_MMU_EXCEPTION_DATA *arg0); +void kchannelFillMmuExceptionInfo_IMPL(struct KernelChannel *pKernelChannel, FIFO_MMU_EXCEPTION_DATA *arg2); #ifdef __nvoc_kernel_channel_h_disabled -static inline void kchannelFillMmuExceptionInfo(struct KernelChannel *pKernelChannel, FIFO_MMU_EXCEPTION_DATA *arg0) { +static inline void kchannelFillMmuExceptionInfo(struct KernelChannel *pKernelChannel, FIFO_MMU_EXCEPTION_DATA *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelChannel was disabled!"); } #else //__nvoc_kernel_channel_h_disabled -#define kchannelFillMmuExceptionInfo(pKernelChannel, arg0) kchannelFillMmuExceptionInfo_IMPL(pKernelChannel, arg0) +#define kchannelFillMmuExceptionInfo(pKernelChannel, arg2) kchannelFillMmuExceptionInfo_IMPL(pKernelChannel, arg2) #endif //__nvoc_kernel_channel_h_disabled void kchannelFreeMmuExceptionInfo_IMPL(struct KernelChannel *pKernelChannel); @@ -1537,12 +1431,12 @@ static inline void kchannelFreeMmuExceptionInfo(struct KernelChannel *pKernelCha #define kchannelFreeMmuExceptionInfo(pKernelChannel) kchannelFreeMmuExceptionInfo_IMPL(pKernelChannel) #endif //__nvoc_kernel_channel_h_disabled -NV_STATUS kchannelGetFromDualHandle_IMPL(struct RsClient *arg0, NvHandle arg1, struct KernelChannel **arg2); +NV_STATUS kchannelGetFromDualHandle_IMPL(struct RsClient *arg1, NvHandle arg2, struct KernelChannel **arg3); -#define kchannelGetFromDualHandle(arg0, arg1, arg2) kchannelGetFromDualHandle_IMPL(arg0, arg1, arg2) -NV_STATUS kchannelGetFromDualHandleRestricted_IMPL(struct RsClient *arg0, NvHandle arg1, struct KernelChannel **arg2); +#define kchannelGetFromDualHandle(arg1, arg2, arg3) kchannelGetFromDualHandle_IMPL(arg1, arg2, arg3) +NV_STATUS kchannelGetFromDualHandleRestricted_IMPL(struct RsClient *arg1, NvHandle arg2, struct KernelChannel **arg3); -#define kchannelGetFromDualHandleRestricted(arg0, arg1, arg2) kchannelGetFromDualHandleRestricted_IMPL(arg0, arg1, arg2) +#define kchannelGetFromDualHandleRestricted(arg1, arg2, arg3) kchannelGetFromDualHandleRestricted_IMPL(arg1, arg2, arg3) NvU32 kchannelGetGfid_IMPL(struct KernelChannel *pKernelChannel); #ifdef __nvoc_kernel_channel_h_disabled @@ -1569,12 +1463,6 @@ NV_STATUS NVOC_PRIVATE_FUNCTION(kchannelSetKeyRotationNotifier)(struct OBJGPU *p #undef kchannelSetKeyRotationNotifier_HAL NV_STATUS NVOC_PRIVATE_FUNCTION(kchannelSetKeyRotationNotifier_HAL)(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvBool bSet); -#undef kchannelSetEncryptionStatsBuffer -NV_STATUS NVOC_PRIVATE_FUNCTION(kchannelSetEncryptionStatsBuffer)(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvBool bSet); - -#undef kchannelSetEncryptionStatsBuffer_HAL -NV_STATUS NVOC_PRIVATE_FUNCTION(kchannelSetEncryptionStatsBuffer_HAL)(struct OBJGPU *pGpu, struct KernelChannel *pKernelChannel, NvBool bSet); - #ifndef __nvoc_kernel_channel_h_disabled #undef kchannelRotateSecureChannelIv NV_STATUS NVOC_PRIVATE_FUNCTION(kchannelRotateSecureChannelIv)(struct KernelChannel *pKernelChannel, ROTATE_IV_TYPE rotateOperation, NvU32 *encryptIv, NvU32 *decryptIv); diff --git a/src/nvidia/generated/g_kernel_crashcat_engine_nvoc.c b/src/nvidia/generated/g_kernel_crashcat_engine_nvoc.c index d74709dc9d..50dd9a5bfd 100644 --- a/src/nvidia/generated/g_kernel_crashcat_engine_nvoc.c +++ b/src/nvidia/generated/g_kernel_crashcat_engine_nvoc.c @@ -62,46 +62,59 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCrashCatEngine = /*pExportInfo=*/ &__nvoc_export_info_KernelCrashCatEngine }; -static NvBool __nvoc_thunk_KernelCrashCatEngine_crashcatEngineConfigured(struct CrashCatEngine *arg0) { - return kcrashcatEngineConfigured((struct KernelCrashCatEngine *)(((unsigned char *)arg0) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset)); +// 10 down-thunk(s) defined to bridge methods in KernelCrashCatEngine from superclasses + +// kcrashcatEngineConfigured: virtual override (crashcatEngine) base (crashcatEngine) +static NvBool __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineConfigured(struct CrashCatEngine *arg_this) { + return kcrashcatEngineConfigured((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset)); } -static void __nvoc_thunk_KernelCrashCatEngine_crashcatEngineUnload(struct CrashCatEngine *arg0) { - kcrashcatEngineUnload((struct KernelCrashCatEngine *)(((unsigned char *)arg0) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset)); +// kcrashcatEngineUnload: virtual override (crashcatEngine) base (crashcatEngine) +static void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnload(struct CrashCatEngine *arg_this) { + kcrashcatEngineUnload((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset)); } -static void __nvoc_thunk_KernelCrashCatEngine_crashcatEngineVprintf(struct CrashCatEngine *arg0, NvBool bReportStart, const char *fmt, va_list args) { - kcrashcatEngineVprintf((struct KernelCrashCatEngine *)(((unsigned char *)arg0) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), bReportStart, fmt, args); +// kcrashcatEngineVprintf: virtual override (crashcatEngine) base (crashcatEngine) +static void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineVprintf(struct CrashCatEngine *arg_this, NvBool bReportStart, const char *fmt, va_list args) { + kcrashcatEngineVprintf((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), bReportStart, fmt, args); } -static NvU32 __nvoc_thunk_KernelCrashCatEngine_crashcatEnginePriRead(struct CrashCatEngine *arg0, NvU32 offset) { - return kcrashcatEnginePriRead((struct KernelCrashCatEngine *)(((unsigned char *)arg0) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), offset); +// kcrashcatEnginePriRead: virtual override (crashcatEngine) base (crashcatEngine) +static NvU32 __nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriRead(struct CrashCatEngine *arg_this, NvU32 offset) { + return kcrashcatEnginePriRead((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), offset); } -static void __nvoc_thunk_KernelCrashCatEngine_crashcatEnginePriWrite(struct CrashCatEngine *arg0, NvU32 offset, NvU32 data) { - kcrashcatEnginePriWrite((struct KernelCrashCatEngine *)(((unsigned char *)arg0) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), offset, data); +// kcrashcatEnginePriWrite: virtual override (crashcatEngine) base (crashcatEngine) +static void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriWrite(struct CrashCatEngine *arg_this, NvU32 offset, NvU32 data) { + kcrashcatEnginePriWrite((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), offset, data); } -static void *__nvoc_thunk_KernelCrashCatEngine_crashcatEngineMapBufferDescriptor(struct CrashCatEngine *arg0, CrashCatBufferDescriptor *pBufDesc) { - return kcrashcatEngineMapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *)arg0) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), pBufDesc); +// kcrashcatEngineMapBufferDescriptor: virtual override (crashcatEngine) base (crashcatEngine) +static void * __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineMapBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc) { + return kcrashcatEngineMapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), pBufDesc); } -static void __nvoc_thunk_KernelCrashCatEngine_crashcatEngineUnmapBufferDescriptor(struct CrashCatEngine *arg0, CrashCatBufferDescriptor *pBufDesc) { - kcrashcatEngineUnmapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *)arg0) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), pBufDesc); +// kcrashcatEngineUnmapBufferDescriptor: virtual override (crashcatEngine) base (crashcatEngine) +static void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnmapBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc) { + kcrashcatEngineUnmapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), pBufDesc); } -static void __nvoc_thunk_KernelCrashCatEngine_crashcatEngineSyncBufferDescriptor(struct CrashCatEngine *arg0, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { - kcrashcatEngineSyncBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *)arg0) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), pBufDesc, offset, size); +// kcrashcatEngineSyncBufferDescriptor: virtual override (crashcatEngine) base (crashcatEngine) +static void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineSyncBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { + kcrashcatEngineSyncBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), pBufDesc, offset, size); } -static const NvU32 *__nvoc_thunk_KernelCrashCatEngine_crashcatEngineGetScratchOffsets(struct CrashCatEngine *arg0, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { - return kcrashcatEngineGetScratchOffsets((struct KernelCrashCatEngine *)(((unsigned char *)arg0) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), scratchGroupId); +// kcrashcatEngineGetScratchOffsets: virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) +static const NvU32 * __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetScratchOffsets(struct CrashCatEngine *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { + return kcrashcatEngineGetScratchOffsets((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), scratchGroupId); } -static NvU32 __nvoc_thunk_KernelCrashCatEngine_crashcatEngineGetWFL0Offset(struct CrashCatEngine *arg0) { - return kcrashcatEngineGetWFL0Offset((struct KernelCrashCatEngine *)(((unsigned char *)arg0) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset)); +// kcrashcatEngineGetWFL0Offset: virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) +static NvU32 __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetWFL0Offset(struct CrashCatEngine *arg_this) { + return kcrashcatEngineGetWFL0Offset((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelCrashCatEngine = { /*numEntries=*/ 0, @@ -137,6 +150,7 @@ NV_STATUS __nvoc_ctor_KernelCrashCatEngine(KernelCrashCatEngine *pThis, RmHalspe return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelCrashCatEngine_1(KernelCrashCatEngine *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -145,61 +159,67 @@ static void __nvoc_init_funcTable_KernelCrashCatEngine_1(KernelCrashCatEngine *p PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); + // kcrashcatEngineConfigured -- virtual override (crashcatEngine) base (crashcatEngine) pThis->__kcrashcatEngineConfigured__ = &kcrashcatEngineConfigured_IMPL; + pThis->__nvoc_base_CrashCatEngine.__crashcatEngineConfigured__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineConfigured; + // kcrashcatEngineUnload -- virtual override (crashcatEngine) base (crashcatEngine) pThis->__kcrashcatEngineUnload__ = &kcrashcatEngineUnload_IMPL; + pThis->__nvoc_base_CrashCatEngine.__crashcatEngineUnload__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnload; + // kcrashcatEngineVprintf -- virtual override (crashcatEngine) base (crashcatEngine) pThis->__kcrashcatEngineVprintf__ = &kcrashcatEngineVprintf_IMPL; + pThis->__nvoc_base_CrashCatEngine.__crashcatEngineVprintf__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineVprintf; + // kcrashcatEngineRegRead -- pure virtual pThis->__kcrashcatEngineRegRead__ = NULL; + // kcrashcatEngineRegWrite -- pure virtual pThis->__kcrashcatEngineRegWrite__ = NULL; + // kcrashcatEngineMaskDmemAddr -- pure virtual pThis->__kcrashcatEngineMaskDmemAddr__ = NULL; + // kcrashcatEnginePriRead -- virtual override (crashcatEngine) base (crashcatEngine) pThis->__kcrashcatEnginePriRead__ = &kcrashcatEnginePriRead_IMPL; + pThis->__nvoc_base_CrashCatEngine.__crashcatEnginePriRead__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriRead; + // kcrashcatEnginePriWrite -- virtual override (crashcatEngine) base (crashcatEngine) pThis->__kcrashcatEnginePriWrite__ = &kcrashcatEnginePriWrite_IMPL; + pThis->__nvoc_base_CrashCatEngine.__crashcatEnginePriWrite__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriWrite; + // kcrashcatEngineMapBufferDescriptor -- virtual override (crashcatEngine) base (crashcatEngine) pThis->__kcrashcatEngineMapBufferDescriptor__ = &kcrashcatEngineMapBufferDescriptor_IMPL; + pThis->__nvoc_base_CrashCatEngine.__crashcatEngineMapBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineMapBufferDescriptor; + // kcrashcatEngineUnmapBufferDescriptor -- virtual override (crashcatEngine) base (crashcatEngine) pThis->__kcrashcatEngineUnmapBufferDescriptor__ = &kcrashcatEngineUnmapBufferDescriptor_IMPL; + pThis->__nvoc_base_CrashCatEngine.__crashcatEngineUnmapBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnmapBufferDescriptor; + // kcrashcatEngineSyncBufferDescriptor -- virtual override (crashcatEngine) base (crashcatEngine) pThis->__kcrashcatEngineSyncBufferDescriptor__ = &kcrashcatEngineSyncBufferDescriptor_IMPL; + pThis->__nvoc_base_CrashCatEngine.__crashcatEngineSyncBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineSyncBufferDescriptor; - // Hal function -- kcrashcatEngineReadDmem + // kcrashcatEngineReadDmem -- virtual halified (singleton optimized) pThis->__kcrashcatEngineReadDmem__ = &kcrashcatEngineReadDmem_TU102; + // kcrashcatEngineReadEmem -- virtual halified (singleton optimized) pThis->__kcrashcatEngineReadEmem__ = &kcrashcatEngineReadEmem_2fced3; - // Hal function -- kcrashcatEngineGetScratchOffsets + // kcrashcatEngineGetScratchOffsets -- virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) pThis->__kcrashcatEngineGetScratchOffsets__ = &kcrashcatEngineGetScratchOffsets_TU102; + pThis->__nvoc_base_CrashCatEngine.__crashcatEngineGetScratchOffsets__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetScratchOffsets; - // Hal function -- kcrashcatEngineGetWFL0Offset + // kcrashcatEngineGetWFL0Offset -- virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) pThis->__kcrashcatEngineGetWFL0Offset__ = &kcrashcatEngineGetWFL0Offset_TU102; + pThis->__nvoc_base_CrashCatEngine.__crashcatEngineGetWFL0Offset__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetWFL0Offset; +} // End __nvoc_init_funcTable_KernelCrashCatEngine_1 with approximately 25 basic block(s). - pThis->__nvoc_base_CrashCatEngine.__crashcatEngineConfigured__ = &__nvoc_thunk_KernelCrashCatEngine_crashcatEngineConfigured; - - pThis->__nvoc_base_CrashCatEngine.__crashcatEngineUnload__ = &__nvoc_thunk_KernelCrashCatEngine_crashcatEngineUnload; - - pThis->__nvoc_base_CrashCatEngine.__crashcatEngineVprintf__ = &__nvoc_thunk_KernelCrashCatEngine_crashcatEngineVprintf; - - pThis->__nvoc_base_CrashCatEngine.__crashcatEnginePriRead__ = &__nvoc_thunk_KernelCrashCatEngine_crashcatEnginePriRead; - - pThis->__nvoc_base_CrashCatEngine.__crashcatEnginePriWrite__ = &__nvoc_thunk_KernelCrashCatEngine_crashcatEnginePriWrite; - - pThis->__nvoc_base_CrashCatEngine.__crashcatEngineMapBufferDescriptor__ = &__nvoc_thunk_KernelCrashCatEngine_crashcatEngineMapBufferDescriptor; - - pThis->__nvoc_base_CrashCatEngine.__crashcatEngineUnmapBufferDescriptor__ = &__nvoc_thunk_KernelCrashCatEngine_crashcatEngineUnmapBufferDescriptor; - - pThis->__nvoc_base_CrashCatEngine.__crashcatEngineSyncBufferDescriptor__ = &__nvoc_thunk_KernelCrashCatEngine_crashcatEngineSyncBufferDescriptor; - - pThis->__nvoc_base_CrashCatEngine.__crashcatEngineGetScratchOffsets__ = &__nvoc_thunk_KernelCrashCatEngine_crashcatEngineGetScratchOffsets; - - pThis->__nvoc_base_CrashCatEngine.__crashcatEngineGetWFL0Offset__ = &__nvoc_thunk_KernelCrashCatEngine_crashcatEngineGetWFL0Offset; -} +// Initialize vtable(s) for 15 virtual method(s). void __nvoc_init_funcTable_KernelCrashCatEngine(KernelCrashCatEngine *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 15 per-object function pointer(s). __nvoc_init_funcTable_KernelCrashCatEngine_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_crashcat_engine_nvoc.h b/src/nvidia/generated/g_kernel_crashcat_engine_nvoc.h index e8c0de645f..3f09cb4030 100644 --- a/src/nvidia/generated/g_kernel_crashcat_engine_nvoc.h +++ b/src/nvidia/generated/g_kernel_crashcat_engine_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_CRASHCAT_ENGINE_NVOC_H_ #define _G_KERNEL_CRASHCAT_ENGINE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_crashcat_engine_nvoc.h" #ifndef KERNEL_CRASHCAT_ENGINE_H @@ -62,26 +70,37 @@ typedef struct KernelCrashCatEngineConfig #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelCrashCatEngine { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct CrashCatEngine __nvoc_base_CrashCatEngine; - struct CrashCatEngine *__nvoc_pbase_CrashCatEngine; - struct KernelCrashCatEngine *__nvoc_pbase_KernelCrashCatEngine; - NvBool (*__kcrashcatEngineConfigured__)(struct KernelCrashCatEngine *); - void (*__kcrashcatEngineUnload__)(struct KernelCrashCatEngine *); - void (*__kcrashcatEngineVprintf__)(struct KernelCrashCatEngine *, NvBool, const char *, va_list); - NvU32 (*__kcrashcatEngineRegRead__)(struct OBJGPU *, struct KernelCrashCatEngine *, NvU32); - void (*__kcrashcatEngineRegWrite__)(struct OBJGPU *, struct KernelCrashCatEngine *, NvU32, NvU32); - NvU32 (*__kcrashcatEngineMaskDmemAddr__)(struct OBJGPU *, struct KernelCrashCatEngine *, NvU32); - NvU32 (*__kcrashcatEnginePriRead__)(struct KernelCrashCatEngine *, NvU32); - void (*__kcrashcatEnginePriWrite__)(struct KernelCrashCatEngine *, NvU32, NvU32); - void *(*__kcrashcatEngineMapBufferDescriptor__)(struct KernelCrashCatEngine *, CrashCatBufferDescriptor *); - void (*__kcrashcatEngineUnmapBufferDescriptor__)(struct KernelCrashCatEngine *, CrashCatBufferDescriptor *); - void (*__kcrashcatEngineSyncBufferDescriptor__)(struct KernelCrashCatEngine *, CrashCatBufferDescriptor *, NvU32, NvU32); - void (*__kcrashcatEngineReadDmem__)(struct KernelCrashCatEngine *, NvU32, NvU32, void *); - void (*__kcrashcatEngineReadEmem__)(struct KernelCrashCatEngine *, NvU64, NvU64, void *); - const NvU32 *(*__kcrashcatEngineGetScratchOffsets__)(struct KernelCrashCatEngine *, NV_CRASHCAT_SCRATCH_GROUP_ID); - NvU32 (*__kcrashcatEngineGetWFL0Offset__)(struct KernelCrashCatEngine *); + + // Ancestor object pointers for `staticCast` feature + struct CrashCatEngine *__nvoc_pbase_CrashCatEngine; // crashcatEngine super + struct KernelCrashCatEngine *__nvoc_pbase_KernelCrashCatEngine; // kcrashcatEngine + + // Vtable with 15 per-object function pointers + NvBool (*__kcrashcatEngineConfigured__)(struct KernelCrashCatEngine * /*this*/); // virtual override (crashcatEngine) base (crashcatEngine) + void (*__kcrashcatEngineUnload__)(struct KernelCrashCatEngine * /*this*/); // virtual override (crashcatEngine) base (crashcatEngine) + void (*__kcrashcatEngineVprintf__)(struct KernelCrashCatEngine * /*this*/, NvBool, const char *, va_list); // virtual override (crashcatEngine) base (crashcatEngine) + NvU32 (*__kcrashcatEngineRegRead__)(struct OBJGPU *, struct KernelCrashCatEngine * /*this*/, NvU32); // pure virtual + void (*__kcrashcatEngineRegWrite__)(struct OBJGPU *, struct KernelCrashCatEngine * /*this*/, NvU32, NvU32); // pure virtual + NvU32 (*__kcrashcatEngineMaskDmemAddr__)(struct OBJGPU *, struct KernelCrashCatEngine * /*this*/, NvU32); // pure virtual + NvU32 (*__kcrashcatEnginePriRead__)(struct KernelCrashCatEngine * /*this*/, NvU32); // virtual override (crashcatEngine) base (crashcatEngine) + void (*__kcrashcatEnginePriWrite__)(struct KernelCrashCatEngine * /*this*/, NvU32, NvU32); // virtual override (crashcatEngine) base (crashcatEngine) + void * (*__kcrashcatEngineMapBufferDescriptor__)(struct KernelCrashCatEngine * /*this*/, CrashCatBufferDescriptor *); // virtual override (crashcatEngine) base (crashcatEngine) + void (*__kcrashcatEngineUnmapBufferDescriptor__)(struct KernelCrashCatEngine * /*this*/, CrashCatBufferDescriptor *); // virtual override (crashcatEngine) base (crashcatEngine) + void (*__kcrashcatEngineSyncBufferDescriptor__)(struct KernelCrashCatEngine * /*this*/, CrashCatBufferDescriptor *, NvU32, NvU32); // virtual override (crashcatEngine) base (crashcatEngine) + void (*__kcrashcatEngineReadDmem__)(struct KernelCrashCatEngine * /*this*/, NvU32, NvU32, void *); // virtual halified (singleton optimized) + void (*__kcrashcatEngineReadEmem__)(struct KernelCrashCatEngine * /*this*/, NvU64, NvU64, void *); // virtual halified (singleton optimized) + const NvU32 * (*__kcrashcatEngineGetScratchOffsets__)(struct KernelCrashCatEngine * /*this*/, NV_CRASHCAT_SCRATCH_GROUP_ID); // virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) + NvU32 (*__kcrashcatEngineGetWFL0Offset__)(struct KernelCrashCatEngine * /*this*/); // virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) + + // Data members NvBool PRIVATE_FIELD(bConfigured); MEMORY_DESCRIPTOR *PRIVATE_FIELD(pQueueMemDesc); const char *PRIVATE_FIELD(pName); @@ -101,6 +120,7 @@ typedef struct KernelCrashCatEngine KernelCrashCatEngine; #define __nvoc_class_id_KernelCrashCatEngine 0xc37aef #endif /* __nvoc_class_id_KernelCrashCatEngine */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCrashCatEngine; #define __staticCast_KernelCrashCatEngine(pThis) \ @@ -113,159 +133,177 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCrashCatEngine; ((KernelCrashCatEngine*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelCrashCatEngine))) #endif //__nvoc_kernel_crashcat_engine_h_disabled - NV_STATUS __nvoc_objCreateDynamic_KernelCrashCatEngine(KernelCrashCatEngine**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_KernelCrashCatEngine(KernelCrashCatEngine**, Dynamic*, NvU32); #define __objCreate_KernelCrashCatEngine(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelCrashCatEngine((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define kcrashcatEngineConfigured(arg0) kcrashcatEngineConfigured_DISPATCH(arg0) -#define kcrashcatEngineUnload(arg0) kcrashcatEngineUnload_DISPATCH(arg0) -#define kcrashcatEngineVprintf(arg0, bReportStart, fmt, args) kcrashcatEngineVprintf_DISPATCH(arg0, bReportStart, fmt, args) -#define kcrashcatEngineRegRead(pGpu, arg0, offset) kcrashcatEngineRegRead_DISPATCH(pGpu, arg0, offset) -#define kcrashcatEngineRegWrite(pGpu, arg0, offset, data) kcrashcatEngineRegWrite_DISPATCH(pGpu, arg0, offset, data) -#define kcrashcatEngineMaskDmemAddr(pGpu, arg0, addr) kcrashcatEngineMaskDmemAddr_DISPATCH(pGpu, arg0, addr) -#define kcrashcatEnginePriRead(arg0, offset) kcrashcatEnginePriRead_DISPATCH(arg0, offset) -#define kcrashcatEnginePriWrite(arg0, offset, data) kcrashcatEnginePriWrite_DISPATCH(arg0, offset, data) -#define kcrashcatEngineMapBufferDescriptor(arg0, pBufDesc) kcrashcatEngineMapBufferDescriptor_DISPATCH(arg0, pBufDesc) -#define kcrashcatEngineUnmapBufferDescriptor(arg0, pBufDesc) kcrashcatEngineUnmapBufferDescriptor_DISPATCH(arg0, pBufDesc) -#define kcrashcatEngineSyncBufferDescriptor(arg0, pBufDesc, offset, size) kcrashcatEngineSyncBufferDescriptor_DISPATCH(arg0, pBufDesc, offset, size) -#define kcrashcatEngineReadDmem(arg0, offset, size, pBuf) kcrashcatEngineReadDmem_DISPATCH(arg0, offset, size, pBuf) -#define kcrashcatEngineReadDmem_HAL(arg0, offset, size, pBuf) kcrashcatEngineReadDmem_DISPATCH(arg0, offset, size, pBuf) -#define kcrashcatEngineReadEmem(arg0, offset, size, pBuf) kcrashcatEngineReadEmem_DISPATCH(arg0, offset, size, pBuf) -#define kcrashcatEngineReadEmem_HAL(arg0, offset, size, pBuf) kcrashcatEngineReadEmem_DISPATCH(arg0, offset, size, pBuf) -#define kcrashcatEngineGetScratchOffsets(arg0, scratchGroupId) kcrashcatEngineGetScratchOffsets_DISPATCH(arg0, scratchGroupId) -#define kcrashcatEngineGetScratchOffsets_HAL(arg0, scratchGroupId) kcrashcatEngineGetScratchOffsets_DISPATCH(arg0, scratchGroupId) -#define kcrashcatEngineGetWFL0Offset(arg0) kcrashcatEngineGetWFL0Offset_DISPATCH(arg0) -#define kcrashcatEngineGetWFL0Offset_HAL(arg0) kcrashcatEngineGetWFL0Offset_DISPATCH(arg0) -NvBool kcrashcatEngineConfigured_IMPL(struct KernelCrashCatEngine *arg0); - -static inline NvBool kcrashcatEngineConfigured_DISPATCH(struct KernelCrashCatEngine *arg0) { - return arg0->__kcrashcatEngineConfigured__(arg0); -} -void kcrashcatEngineUnload_IMPL(struct KernelCrashCatEngine *arg0); +// Wrapper macros +#define kcrashcatEngineConfigured_FNPTR(arg_this) arg_this->__kcrashcatEngineConfigured__ +#define kcrashcatEngineConfigured(arg_this) kcrashcatEngineConfigured_DISPATCH(arg_this) +#define kcrashcatEngineUnload_FNPTR(arg_this) arg_this->__kcrashcatEngineUnload__ +#define kcrashcatEngineUnload(arg_this) kcrashcatEngineUnload_DISPATCH(arg_this) +#define kcrashcatEngineVprintf_FNPTR(arg_this) arg_this->__kcrashcatEngineVprintf__ +#define kcrashcatEngineVprintf(arg_this, bReportStart, fmt, args) kcrashcatEngineVprintf_DISPATCH(arg_this, bReportStart, fmt, args) +#define kcrashcatEngineRegRead_FNPTR(arg_this) arg_this->__kcrashcatEngineRegRead__ +#define kcrashcatEngineRegRead(pGpu, arg_this, offset) kcrashcatEngineRegRead_DISPATCH(pGpu, arg_this, offset) +#define kcrashcatEngineRegWrite_FNPTR(arg_this) arg_this->__kcrashcatEngineRegWrite__ +#define kcrashcatEngineRegWrite(pGpu, arg_this, offset, data) kcrashcatEngineRegWrite_DISPATCH(pGpu, arg_this, offset, data) +#define kcrashcatEngineMaskDmemAddr_FNPTR(arg_this) arg_this->__kcrashcatEngineMaskDmemAddr__ +#define kcrashcatEngineMaskDmemAddr(pGpu, arg_this, addr) kcrashcatEngineMaskDmemAddr_DISPATCH(pGpu, arg_this, addr) +#define kcrashcatEnginePriRead_FNPTR(arg_this) arg_this->__kcrashcatEnginePriRead__ +#define kcrashcatEnginePriRead(arg_this, offset) kcrashcatEnginePriRead_DISPATCH(arg_this, offset) +#define kcrashcatEnginePriWrite_FNPTR(arg_this) arg_this->__kcrashcatEnginePriWrite__ +#define kcrashcatEnginePriWrite(arg_this, offset, data) kcrashcatEnginePriWrite_DISPATCH(arg_this, offset, data) +#define kcrashcatEngineMapBufferDescriptor_FNPTR(arg_this) arg_this->__kcrashcatEngineMapBufferDescriptor__ +#define kcrashcatEngineMapBufferDescriptor(arg_this, pBufDesc) kcrashcatEngineMapBufferDescriptor_DISPATCH(arg_this, pBufDesc) +#define kcrashcatEngineUnmapBufferDescriptor_FNPTR(arg_this) arg_this->__kcrashcatEngineUnmapBufferDescriptor__ +#define kcrashcatEngineUnmapBufferDescriptor(arg_this, pBufDesc) kcrashcatEngineUnmapBufferDescriptor_DISPATCH(arg_this, pBufDesc) +#define kcrashcatEngineSyncBufferDescriptor_FNPTR(arg_this) arg_this->__kcrashcatEngineSyncBufferDescriptor__ +#define kcrashcatEngineSyncBufferDescriptor(arg_this, pBufDesc, offset, size) kcrashcatEngineSyncBufferDescriptor_DISPATCH(arg_this, pBufDesc, offset, size) +#define kcrashcatEngineReadDmem_FNPTR(arg_this) arg_this->__kcrashcatEngineReadDmem__ +#define kcrashcatEngineReadDmem(arg_this, offset, size, pBuf) kcrashcatEngineReadDmem_DISPATCH(arg_this, offset, size, pBuf) +#define kcrashcatEngineReadDmem_HAL(arg_this, offset, size, pBuf) kcrashcatEngineReadDmem_DISPATCH(arg_this, offset, size, pBuf) +#define kcrashcatEngineReadEmem_FNPTR(arg_this) arg_this->__kcrashcatEngineReadEmem__ +#define kcrashcatEngineReadEmem(arg_this, offset, size, pBuf) kcrashcatEngineReadEmem_DISPATCH(arg_this, offset, size, pBuf) +#define kcrashcatEngineReadEmem_HAL(arg_this, offset, size, pBuf) kcrashcatEngineReadEmem_DISPATCH(arg_this, offset, size, pBuf) +#define kcrashcatEngineGetScratchOffsets_FNPTR(arg_this) arg_this->__kcrashcatEngineGetScratchOffsets__ +#define kcrashcatEngineGetScratchOffsets(arg_this, scratchGroupId) kcrashcatEngineGetScratchOffsets_DISPATCH(arg_this, scratchGroupId) +#define kcrashcatEngineGetScratchOffsets_HAL(arg_this, scratchGroupId) kcrashcatEngineGetScratchOffsets_DISPATCH(arg_this, scratchGroupId) +#define kcrashcatEngineGetWFL0Offset_FNPTR(arg_this) arg_this->__kcrashcatEngineGetWFL0Offset__ +#define kcrashcatEngineGetWFL0Offset(arg_this) kcrashcatEngineGetWFL0Offset_DISPATCH(arg_this) +#define kcrashcatEngineGetWFL0Offset_HAL(arg_this) kcrashcatEngineGetWFL0Offset_DISPATCH(arg_this) + +// Dispatch functions +static inline NvBool kcrashcatEngineConfigured_DISPATCH(struct KernelCrashCatEngine *arg_this) { + return arg_this->__kcrashcatEngineConfigured__(arg_this); +} -static inline void kcrashcatEngineUnload_DISPATCH(struct KernelCrashCatEngine *arg0) { - arg0->__kcrashcatEngineUnload__(arg0); +static inline void kcrashcatEngineUnload_DISPATCH(struct KernelCrashCatEngine *arg_this) { + arg_this->__kcrashcatEngineUnload__(arg_this); } -void kcrashcatEngineVprintf_IMPL(struct KernelCrashCatEngine *arg0, NvBool bReportStart, const char *fmt, va_list args); +static inline void kcrashcatEngineVprintf_DISPATCH(struct KernelCrashCatEngine *arg_this, NvBool bReportStart, const char *fmt, va_list args) { + arg_this->__kcrashcatEngineVprintf__(arg_this, bReportStart, fmt, args); +} -static inline void kcrashcatEngineVprintf_DISPATCH(struct KernelCrashCatEngine *arg0, NvBool bReportStart, const char *fmt, va_list args) { - arg0->__kcrashcatEngineVprintf__(arg0, bReportStart, fmt, args); +static inline NvU32 kcrashcatEngineRegRead_DISPATCH(struct OBJGPU *pGpu, struct KernelCrashCatEngine *arg_this, NvU32 offset) { + return arg_this->__kcrashcatEngineRegRead__(pGpu, arg_this, offset); } -static inline NvU32 kcrashcatEngineRegRead_DISPATCH(struct OBJGPU *pGpu, struct KernelCrashCatEngine *arg0, NvU32 offset) { - return arg0->__kcrashcatEngineRegRead__(pGpu, arg0, offset); +static inline void kcrashcatEngineRegWrite_DISPATCH(struct OBJGPU *pGpu, struct KernelCrashCatEngine *arg_this, NvU32 offset, NvU32 data) { + arg_this->__kcrashcatEngineRegWrite__(pGpu, arg_this, offset, data); } -static inline void kcrashcatEngineRegWrite_DISPATCH(struct OBJGPU *pGpu, struct KernelCrashCatEngine *arg0, NvU32 offset, NvU32 data) { - arg0->__kcrashcatEngineRegWrite__(pGpu, arg0, offset, data); +static inline NvU32 kcrashcatEngineMaskDmemAddr_DISPATCH(struct OBJGPU *pGpu, struct KernelCrashCatEngine *arg_this, NvU32 addr) { + return arg_this->__kcrashcatEngineMaskDmemAddr__(pGpu, arg_this, addr); } -static inline NvU32 kcrashcatEngineMaskDmemAddr_DISPATCH(struct OBJGPU *pGpu, struct KernelCrashCatEngine *arg0, NvU32 addr) { - return arg0->__kcrashcatEngineMaskDmemAddr__(pGpu, arg0, addr); +static inline NvU32 kcrashcatEnginePriRead_DISPATCH(struct KernelCrashCatEngine *arg_this, NvU32 offset) { + return arg_this->__kcrashcatEnginePriRead__(arg_this, offset); } -NvU32 kcrashcatEnginePriRead_IMPL(struct KernelCrashCatEngine *arg0, NvU32 offset); +static inline void kcrashcatEnginePriWrite_DISPATCH(struct KernelCrashCatEngine *arg_this, NvU32 offset, NvU32 data) { + arg_this->__kcrashcatEnginePriWrite__(arg_this, offset, data); +} -static inline NvU32 kcrashcatEnginePriRead_DISPATCH(struct KernelCrashCatEngine *arg0, NvU32 offset) { - return arg0->__kcrashcatEnginePriRead__(arg0, offset); +static inline void * kcrashcatEngineMapBufferDescriptor_DISPATCH(struct KernelCrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc) { + return arg_this->__kcrashcatEngineMapBufferDescriptor__(arg_this, pBufDesc); } -void kcrashcatEnginePriWrite_IMPL(struct KernelCrashCatEngine *arg0, NvU32 offset, NvU32 data); +static inline void kcrashcatEngineUnmapBufferDescriptor_DISPATCH(struct KernelCrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc) { + arg_this->__kcrashcatEngineUnmapBufferDescriptor__(arg_this, pBufDesc); +} -static inline void kcrashcatEnginePriWrite_DISPATCH(struct KernelCrashCatEngine *arg0, NvU32 offset, NvU32 data) { - arg0->__kcrashcatEnginePriWrite__(arg0, offset, data); +static inline void kcrashcatEngineSyncBufferDescriptor_DISPATCH(struct KernelCrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { + arg_this->__kcrashcatEngineSyncBufferDescriptor__(arg_this, pBufDesc, offset, size); } -void *kcrashcatEngineMapBufferDescriptor_IMPL(struct KernelCrashCatEngine *arg0, CrashCatBufferDescriptor *pBufDesc); +static inline void kcrashcatEngineReadDmem_DISPATCH(struct KernelCrashCatEngine *arg_this, NvU32 offset, NvU32 size, void *pBuf) { + arg_this->__kcrashcatEngineReadDmem__(arg_this, offset, size, pBuf); +} -static inline void *kcrashcatEngineMapBufferDescriptor_DISPATCH(struct KernelCrashCatEngine *arg0, CrashCatBufferDescriptor *pBufDesc) { - return arg0->__kcrashcatEngineMapBufferDescriptor__(arg0, pBufDesc); +static inline void kcrashcatEngineReadEmem_DISPATCH(struct KernelCrashCatEngine *arg_this, NvU64 offset, NvU64 size, void *pBuf) { + arg_this->__kcrashcatEngineReadEmem__(arg_this, offset, size, pBuf); } -void kcrashcatEngineUnmapBufferDescriptor_IMPL(struct KernelCrashCatEngine *arg0, CrashCatBufferDescriptor *pBufDesc); +static inline const NvU32 * kcrashcatEngineGetScratchOffsets_DISPATCH(struct KernelCrashCatEngine *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { + return arg_this->__kcrashcatEngineGetScratchOffsets__(arg_this, scratchGroupId); +} -static inline void kcrashcatEngineUnmapBufferDescriptor_DISPATCH(struct KernelCrashCatEngine *arg0, CrashCatBufferDescriptor *pBufDesc) { - arg0->__kcrashcatEngineUnmapBufferDescriptor__(arg0, pBufDesc); +static inline NvU32 kcrashcatEngineGetWFL0Offset_DISPATCH(struct KernelCrashCatEngine *arg_this) { + return arg_this->__kcrashcatEngineGetWFL0Offset__(arg_this); } -void kcrashcatEngineSyncBufferDescriptor_IMPL(struct KernelCrashCatEngine *arg0, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size); +NvBool kcrashcatEngineConfigured_IMPL(struct KernelCrashCatEngine *arg1); -static inline void kcrashcatEngineSyncBufferDescriptor_DISPATCH(struct KernelCrashCatEngine *arg0, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { - arg0->__kcrashcatEngineSyncBufferDescriptor__(arg0, pBufDesc, offset, size); -} +void kcrashcatEngineUnload_IMPL(struct KernelCrashCatEngine *arg1); -void kcrashcatEngineReadDmem_TU102(struct KernelCrashCatEngine *arg0, NvU32 offset, NvU32 size, void *pBuf); +void kcrashcatEngineVprintf_IMPL(struct KernelCrashCatEngine *arg1, NvBool bReportStart, const char *fmt, va_list args); -static inline void kcrashcatEngineReadDmem_DISPATCH(struct KernelCrashCatEngine *arg0, NvU32 offset, NvU32 size, void *pBuf) { - arg0->__kcrashcatEngineReadDmem__(arg0, offset, size, pBuf); -} +NvU32 kcrashcatEnginePriRead_IMPL(struct KernelCrashCatEngine *arg1, NvU32 offset); -static inline void kcrashcatEngineReadEmem_2fced3(struct KernelCrashCatEngine *arg0, NvU64 offset, NvU64 size, void *pBuf) { - NV_ASSERT_PRECOMP(0); -} +void kcrashcatEnginePriWrite_IMPL(struct KernelCrashCatEngine *arg1, NvU32 offset, NvU32 data); -static inline void kcrashcatEngineReadEmem_DISPATCH(struct KernelCrashCatEngine *arg0, NvU64 offset, NvU64 size, void *pBuf) { - arg0->__kcrashcatEngineReadEmem__(arg0, offset, size, pBuf); -} +void *kcrashcatEngineMapBufferDescriptor_IMPL(struct KernelCrashCatEngine *arg1, CrashCatBufferDescriptor *pBufDesc); -const NvU32 *kcrashcatEngineGetScratchOffsets_TU102(struct KernelCrashCatEngine *arg0, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId); +void kcrashcatEngineUnmapBufferDescriptor_IMPL(struct KernelCrashCatEngine *arg1, CrashCatBufferDescriptor *pBufDesc); -static inline const NvU32 *kcrashcatEngineGetScratchOffsets_DISPATCH(struct KernelCrashCatEngine *arg0, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { - return arg0->__kcrashcatEngineGetScratchOffsets__(arg0, scratchGroupId); -} +void kcrashcatEngineSyncBufferDescriptor_IMPL(struct KernelCrashCatEngine *arg1, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size); -NvU32 kcrashcatEngineGetWFL0Offset_TU102(struct KernelCrashCatEngine *arg0); +void kcrashcatEngineReadDmem_TU102(struct KernelCrashCatEngine *arg1, NvU32 offset, NvU32 size, void *pBuf); -static inline NvU32 kcrashcatEngineGetWFL0Offset_DISPATCH(struct KernelCrashCatEngine *arg0) { - return arg0->__kcrashcatEngineGetWFL0Offset__(arg0); +static inline void kcrashcatEngineReadEmem_2fced3(struct KernelCrashCatEngine *arg1, NvU64 offset, NvU64 size, void *pBuf) { + NV_ASSERT_PRECOMP(0); } -NV_STATUS kcrashcatEngineConfigure_IMPL(struct KernelCrashCatEngine *arg0, KernelCrashCatEngineConfig *pEngConfig); +const NvU32 *kcrashcatEngineGetScratchOffsets_TU102(struct KernelCrashCatEngine *arg1, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId); + +NvU32 kcrashcatEngineGetWFL0Offset_TU102(struct KernelCrashCatEngine *arg1); + +NV_STATUS kcrashcatEngineConfigure_IMPL(struct KernelCrashCatEngine *arg1, KernelCrashCatEngineConfig *pEngConfig); #ifdef __nvoc_kernel_crashcat_engine_h_disabled -static inline NV_STATUS kcrashcatEngineConfigure(struct KernelCrashCatEngine *arg0, KernelCrashCatEngineConfig *pEngConfig) { +static inline NV_STATUS kcrashcatEngineConfigure(struct KernelCrashCatEngine *arg1, KernelCrashCatEngineConfig *pEngConfig) { NV_ASSERT_FAILED_PRECOMP("KernelCrashCatEngine was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_crashcat_engine_h_disabled -#define kcrashcatEngineConfigure(arg0, pEngConfig) kcrashcatEngineConfigure_IMPL(arg0, pEngConfig) +#define kcrashcatEngineConfigure(arg1, pEngConfig) kcrashcatEngineConfigure_IMPL(arg1, pEngConfig) #endif //__nvoc_kernel_crashcat_engine_h_disabled -MEMORY_DESCRIPTOR *kcrashcatEngineGetQueueMemDesc_IMPL(struct KernelCrashCatEngine *arg0); +MEMORY_DESCRIPTOR *kcrashcatEngineGetQueueMemDesc_IMPL(struct KernelCrashCatEngine *arg1); #ifdef __nvoc_kernel_crashcat_engine_h_disabled -static inline MEMORY_DESCRIPTOR *kcrashcatEngineGetQueueMemDesc(struct KernelCrashCatEngine *arg0) { +static inline MEMORY_DESCRIPTOR *kcrashcatEngineGetQueueMemDesc(struct KernelCrashCatEngine *arg1) { NV_ASSERT_FAILED_PRECOMP("KernelCrashCatEngine was disabled!"); return NULL; } #else //__nvoc_kernel_crashcat_engine_h_disabled -#define kcrashcatEngineGetQueueMemDesc(arg0) kcrashcatEngineGetQueueMemDesc_IMPL(arg0) +#define kcrashcatEngineGetQueueMemDesc(arg1) kcrashcatEngineGetQueueMemDesc_IMPL(arg1) #endif //__nvoc_kernel_crashcat_engine_h_disabled -NV_STATUS kcrashcatEngineRegisterCrashBuffer_IMPL(struct KernelCrashCatEngine *arg0, MEMORY_DESCRIPTOR *arg1); +NV_STATUS kcrashcatEngineRegisterCrashBuffer_IMPL(struct KernelCrashCatEngine *arg1, MEMORY_DESCRIPTOR *arg2); #ifdef __nvoc_kernel_crashcat_engine_h_disabled -static inline NV_STATUS kcrashcatEngineRegisterCrashBuffer(struct KernelCrashCatEngine *arg0, MEMORY_DESCRIPTOR *arg1) { +static inline NV_STATUS kcrashcatEngineRegisterCrashBuffer(struct KernelCrashCatEngine *arg1, MEMORY_DESCRIPTOR *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelCrashCatEngine was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_crashcat_engine_h_disabled -#define kcrashcatEngineRegisterCrashBuffer(arg0, arg1) kcrashcatEngineRegisterCrashBuffer_IMPL(arg0, arg1) +#define kcrashcatEngineRegisterCrashBuffer(arg1, arg2) kcrashcatEngineRegisterCrashBuffer_IMPL(arg1, arg2) #endif //__nvoc_kernel_crashcat_engine_h_disabled -void kcrashcatEngineUnregisterCrashBuffer_IMPL(struct KernelCrashCatEngine *arg0, MEMORY_DESCRIPTOR *arg1); +void kcrashcatEngineUnregisterCrashBuffer_IMPL(struct KernelCrashCatEngine *arg1, MEMORY_DESCRIPTOR *arg2); #ifdef __nvoc_kernel_crashcat_engine_h_disabled -static inline void kcrashcatEngineUnregisterCrashBuffer(struct KernelCrashCatEngine *arg0, MEMORY_DESCRIPTOR *arg1) { +static inline void kcrashcatEngineUnregisterCrashBuffer(struct KernelCrashCatEngine *arg1, MEMORY_DESCRIPTOR *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelCrashCatEngine was disabled!"); } #else //__nvoc_kernel_crashcat_engine_h_disabled -#define kcrashcatEngineUnregisterCrashBuffer(arg0, arg1) kcrashcatEngineUnregisterCrashBuffer_IMPL(arg0, arg1) +#define kcrashcatEngineUnregisterCrashBuffer(arg1, arg2) kcrashcatEngineUnregisterCrashBuffer_IMPL(arg1, arg2) #endif //__nvoc_kernel_crashcat_engine_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_kernel_ctxshare_nvoc.c b/src/nvidia/generated/g_kernel_ctxshare_nvoc.c index 8ca00663bd..1f8969af14 100644 --- a/src/nvidia/generated/g_kernel_ctxshare_nvoc.c +++ b/src/nvidia/generated/g_kernel_ctxshare_nvoc.c @@ -107,6 +107,7 @@ NV_STATUS __nvoc_ctor_KernelCtxShare(KernelCtxShare *pThis, RmHalspecOwner *pRmh return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelCtxShare_1(KernelCtxShare *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -114,8 +115,10 @@ static void __nvoc_init_funcTable_KernelCtxShare_1(KernelCtxShare *pThis, RmHals PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); -} +} // End __nvoc_init_funcTable_KernelCtxShare_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_KernelCtxShare(KernelCtxShare *pThis, RmHalspecOwner *pRmhalspecowner) { __nvoc_init_funcTable_KernelCtxShare_1(pThis, pRmhalspecowner); } @@ -289,159 +292,190 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCtxShareApi = /*pExportInfo=*/ &__nvoc_export_info_KernelCtxShareApi }; -static NvBool __nvoc_thunk_KernelCtxShareApi_resCanCopy(struct RsResource *pKernelCtxShareApi) { - return kctxshareapiCanCopy((struct KernelCtxShareApi *)(((unsigned char *)pKernelCtxShareApi) - __nvoc_rtti_KernelCtxShareApi_RsResource.offset)); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NvBool __nvoc_thunk_GpuResource_kctxshareapiShareCallback(struct KernelCtxShareApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCtxShareApi[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) kctxshareapiCtrlCmdSetTpcPartitionTable_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) + /*flags=*/ 0x240u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x90670102u, + /*paramSize=*/ sizeof(NV9067_CTRL_TPC_PARTITION_TABLE_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_KernelCtxShareApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "kctxshareapiCtrlCmdSetTpcPartitionTable" +#endif + }, + { /* [1] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) kctxshareapiCtrlCmdGetCwdWatermark_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) + /*flags=*/ 0x240u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x90670201u, + /*paramSize=*/ sizeof(NV9067_CTRL_CWD_WATERMARK_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_KernelCtxShareApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "kctxshareapiCtrlCmdGetCwdWatermark" +#endif + }, + { /* [2] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) kctxshareapiCtrlCmdSetCwdWatermark_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) + /*flags=*/ 0x240u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x90670202u, + /*paramSize=*/ sizeof(NV9067_CTRL_CWD_WATERMARK_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_KernelCtxShareApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "kctxshareapiCtrlCmdSetCwdWatermark" +#endif + }, + +}; + +// 1 down-thunk(s) defined to bridge methods in KernelCtxShareApi from superclasses -static NV_STATUS __nvoc_thunk_RmResource_kctxshareapiCheckMemInterUnmap(struct KernelCtxShareApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), bSubdeviceHandleProvided); +// kctxshareapiCanCopy: virtual override (res) base (gpures) +static NvBool __nvoc_down_thunk_KernelCtxShareApi_resCanCopy(struct RsResource *pKernelCtxShareApi) { + return kctxshareapiCanCopy((struct KernelCtxShareApi *)(((unsigned char *) pKernelCtxShareApi) - __nvoc_rtti_KernelCtxShareApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_kctxshareapiMapTo(struct KernelCtxShareApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset), pParams); + +// 24 up-thunk(s) defined to bridge methods in KernelCtxShareApi to superclasses + +// kctxshareapiControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiControl(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_kctxshareapiGetMapAddrSpace(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// kctxshareapiMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiMap(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_kctxshareapiGetRefCount(struct KernelCtxShareApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset)); +// kctxshareapiUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiUnmap(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_RsResource_kctxshareapiAddAdditionalDependants(struct RsClient *pClient, struct KernelCtxShareApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset), pReference); +// kctxshareapiShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_kctxshareapiShareCallback(struct KernelCtxShareApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RmResource_kctxshareapiControl_Prologue(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), pCallContext, pParams); +// kctxshareapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiGetRegBaseOffsetAndSize(struct KernelCtxShareApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_GpuResource_kctxshareapiGetRegBaseOffsetAndSize(struct KernelCtxShareApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), pGpu, pOffset, pSize); +// kctxshareapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiGetMapAddrSpace(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_GpuResource_kctxshareapiInternalControlForward(struct KernelCtxShareApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), command, pParams, size); +// kctxshareapiInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiInternalControlForward(struct KernelCtxShareApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_RsResource_kctxshareapiUnmapFrom(struct KernelCtxShareApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset), pParams); +// kctxshareapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_kctxshareapiGetInternalObjectHandle(struct KernelCtxShareApi *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset)); } -static void __nvoc_thunk_RmResource_kctxshareapiControl_Epilogue(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), pCallContext, pParams); +// kctxshareapiAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_kctxshareapiAccessCallback(struct KernelCtxShareApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NvHandle __nvoc_thunk_GpuResource_kctxshareapiGetInternalObjectHandle(struct KernelCtxShareApi *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset)); +// kctxshareapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kctxshareapiGetMemInterMapParams(struct KernelCtxShareApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_kctxshareapiControl(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), pCallContext, pParams); +// kctxshareapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kctxshareapiCheckMemInterUnmap(struct KernelCtxShareApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_GpuResource_kctxshareapiUnmap(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), pCallContext, pCpuMapping); +// kctxshareapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kctxshareapiGetMemoryMappingDescriptor(struct KernelCtxShareApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_RmResource_kctxshareapiGetMemInterMapParams(struct KernelCtxShareApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), pParams); +// kctxshareapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kctxshareapiControlSerialization_Prologue(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_kctxshareapiGetMemoryMappingDescriptor(struct KernelCtxShareApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), ppMemDesc); +// kctxshareapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_kctxshareapiControlSerialization_Epilogue(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_kctxshareapiControlFilter(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset), pCallContext, pParams); +// kctxshareapiControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kctxshareapiControl_Prologue(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_kctxshareapiControlSerialization_Prologue(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), pCallContext, pParams); +// kctxshareapiControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_kctxshareapiControl_Epilogue(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_kctxshareapiIsPartialUnmapSupported(struct KernelCtxShareApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset)); +// kctxshareapiIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kctxshareapiIsDuplicate(struct KernelCtxShareApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset), hMemory, pDuplicate); } -static void __nvoc_thunk_RsResource_kctxshareapiPreDestruct(struct KernelCtxShareApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset)); +// kctxshareapiPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_kctxshareapiPreDestruct(struct KernelCtxShareApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_kctxshareapiIsDuplicate(struct KernelCtxShareApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset), hMemory, pDuplicate); +// kctxshareapiControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kctxshareapiControlFilter(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RmResource_kctxshareapiControlSerialization_Epilogue(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), pCallContext, pParams); +// kctxshareapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_kctxshareapiIsPartialUnmapSupported(struct KernelCtxShareApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_kctxshareapiMap(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// kctxshareapiMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kctxshareapiMapTo(struct KernelCtxShareApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RmResource_kctxshareapiAccessCallback(struct KernelCtxShareApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// kctxshareapiUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kctxshareapiUnmapFrom(struct KernelCtxShareApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset), pParams); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// kctxshareapiGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_kctxshareapiGetRefCount(struct KernelCtxShareApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset)); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCtxShareApi[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kctxshareapiCtrlCmdSetTpcPartitionTable_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) - /*flags=*/ 0x2200u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x90670102u, - /*paramSize=*/ sizeof(NV9067_CTRL_TPC_PARTITION_TABLE_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelCtxShareApi.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kctxshareapiCtrlCmdSetTpcPartitionTable" -#endif - }, - { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kctxshareapiCtrlCmdGetCwdWatermark_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) - /*flags=*/ 0x2200u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x90670201u, - /*paramSize=*/ sizeof(NV9067_CTRL_CWD_WATERMARK_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelCtxShareApi.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kctxshareapiCtrlCmdGetCwdWatermark" -#endif - }, - { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) kctxshareapiCtrlCmdSetCwdWatermark_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) - /*flags=*/ 0x2200u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x90670202u, - /*paramSize=*/ sizeof(NV9067_CTRL_CWD_WATERMARK_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_KernelCtxShareApi.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "kctxshareapiCtrlCmdSetCwdWatermark" -#endif - }, +// kctxshareapiAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_kctxshareapiAddAdditionalDependants(struct RsClient *pClient, struct KernelCtxShareApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset), pReference); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelCtxShareApi = { @@ -479,75 +513,107 @@ NV_STATUS __nvoc_ctor_KernelCtxShareApi(KernelCtxShareApi *pThis, struct CALL_CO return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelCtxShareApi_1(KernelCtxShareApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // kctxshareapiCanCopy -- virtual override (res) base (gpures) pThis->__kctxshareapiCanCopy__ = &kctxshareapiCanCopy_IMPL; + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_KernelCtxShareApi_resCanCopy; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) + // kctxshareapiCtrlCmdSetTpcPartitionTable -- exported (id=0x90670102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) pThis->__kctxshareapiCtrlCmdSetTpcPartitionTable__ = &kctxshareapiCtrlCmdSetTpcPartitionTable_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) + // kctxshareapiCtrlCmdGetCwdWatermark -- exported (id=0x90670201) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) pThis->__kctxshareapiCtrlCmdGetCwdWatermark__ = &kctxshareapiCtrlCmdGetCwdWatermark_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) + // kctxshareapiCtrlCmdSetCwdWatermark -- exported (id=0x90670202) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) pThis->__kctxshareapiCtrlCmdSetCwdWatermark__ = &kctxshareapiCtrlCmdSetCwdWatermark_IMPL; #endif - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_KernelCtxShareApi_resCanCopy; + // kctxshareapiControl -- virtual inherited (gpures) base (gpures) + pThis->__kctxshareapiControl__ = &__nvoc_up_thunk_GpuResource_kctxshareapiControl; - pThis->__kctxshareapiShareCallback__ = &__nvoc_thunk_GpuResource_kctxshareapiShareCallback; + // kctxshareapiMap -- virtual inherited (gpures) base (gpures) + pThis->__kctxshareapiMap__ = &__nvoc_up_thunk_GpuResource_kctxshareapiMap; - pThis->__kctxshareapiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_kctxshareapiCheckMemInterUnmap; + // kctxshareapiUnmap -- virtual inherited (gpures) base (gpures) + pThis->__kctxshareapiUnmap__ = &__nvoc_up_thunk_GpuResource_kctxshareapiUnmap; - pThis->__kctxshareapiMapTo__ = &__nvoc_thunk_RsResource_kctxshareapiMapTo; + // kctxshareapiShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__kctxshareapiShareCallback__ = &__nvoc_up_thunk_GpuResource_kctxshareapiShareCallback; - pThis->__kctxshareapiGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_kctxshareapiGetMapAddrSpace; + // kctxshareapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__kctxshareapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kctxshareapiGetRegBaseOffsetAndSize; - pThis->__kctxshareapiGetRefCount__ = &__nvoc_thunk_RsResource_kctxshareapiGetRefCount; + // kctxshareapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__kctxshareapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_kctxshareapiGetMapAddrSpace; - pThis->__kctxshareapiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_kctxshareapiAddAdditionalDependants; + // kctxshareapiInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__kctxshareapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kctxshareapiInternalControlForward; - pThis->__kctxshareapiControl_Prologue__ = &__nvoc_thunk_RmResource_kctxshareapiControl_Prologue; + // kctxshareapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__kctxshareapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kctxshareapiGetInternalObjectHandle; - pThis->__kctxshareapiGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_kctxshareapiGetRegBaseOffsetAndSize; + // kctxshareapiAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__kctxshareapiAccessCallback__ = &__nvoc_up_thunk_RmResource_kctxshareapiAccessCallback; - pThis->__kctxshareapiInternalControlForward__ = &__nvoc_thunk_GpuResource_kctxshareapiInternalControlForward; + // kctxshareapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__kctxshareapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_kctxshareapiGetMemInterMapParams; - pThis->__kctxshareapiUnmapFrom__ = &__nvoc_thunk_RsResource_kctxshareapiUnmapFrom; + // kctxshareapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__kctxshareapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_kctxshareapiCheckMemInterUnmap; - pThis->__kctxshareapiControl_Epilogue__ = &__nvoc_thunk_RmResource_kctxshareapiControl_Epilogue; + // kctxshareapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__kctxshareapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kctxshareapiGetMemoryMappingDescriptor; - pThis->__kctxshareapiGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_kctxshareapiGetInternalObjectHandle; + // kctxshareapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__kctxshareapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kctxshareapiControlSerialization_Prologue; - pThis->__kctxshareapiControl__ = &__nvoc_thunk_GpuResource_kctxshareapiControl; + // kctxshareapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__kctxshareapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kctxshareapiControlSerialization_Epilogue; - pThis->__kctxshareapiUnmap__ = &__nvoc_thunk_GpuResource_kctxshareapiUnmap; + // kctxshareapiControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__kctxshareapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_kctxshareapiControl_Prologue; - pThis->__kctxshareapiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_kctxshareapiGetMemInterMapParams; + // kctxshareapiControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__kctxshareapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kctxshareapiControl_Epilogue; - pThis->__kctxshareapiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_kctxshareapiGetMemoryMappingDescriptor; + // kctxshareapiIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__kctxshareapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_kctxshareapiIsDuplicate; - pThis->__kctxshareapiControlFilter__ = &__nvoc_thunk_RsResource_kctxshareapiControlFilter; + // kctxshareapiPreDestruct -- virtual inherited (res) base (gpures) + pThis->__kctxshareapiPreDestruct__ = &__nvoc_up_thunk_RsResource_kctxshareapiPreDestruct; - pThis->__kctxshareapiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_kctxshareapiControlSerialization_Prologue; + // kctxshareapiControlFilter -- virtual inherited (res) base (gpures) + pThis->__kctxshareapiControlFilter__ = &__nvoc_up_thunk_RsResource_kctxshareapiControlFilter; - pThis->__kctxshareapiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_kctxshareapiIsPartialUnmapSupported; + // kctxshareapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__kctxshareapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kctxshareapiIsPartialUnmapSupported; - pThis->__kctxshareapiPreDestruct__ = &__nvoc_thunk_RsResource_kctxshareapiPreDestruct; + // kctxshareapiMapTo -- virtual inherited (res) base (gpures) + pThis->__kctxshareapiMapTo__ = &__nvoc_up_thunk_RsResource_kctxshareapiMapTo; - pThis->__kctxshareapiIsDuplicate__ = &__nvoc_thunk_RsResource_kctxshareapiIsDuplicate; + // kctxshareapiUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__kctxshareapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_kctxshareapiUnmapFrom; - pThis->__kctxshareapiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_kctxshareapiControlSerialization_Epilogue; + // kctxshareapiGetRefCount -- virtual inherited (res) base (gpures) + pThis->__kctxshareapiGetRefCount__ = &__nvoc_up_thunk_RsResource_kctxshareapiGetRefCount; - pThis->__kctxshareapiMap__ = &__nvoc_thunk_GpuResource_kctxshareapiMap; + // kctxshareapiAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__kctxshareapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kctxshareapiAddAdditionalDependants; +} // End __nvoc_init_funcTable_KernelCtxShareApi_1 with approximately 29 basic block(s). - pThis->__kctxshareapiAccessCallback__ = &__nvoc_thunk_RmResource_kctxshareapiAccessCallback; -} +// Initialize vtable(s) for 28 virtual method(s). void __nvoc_init_funcTable_KernelCtxShareApi(KernelCtxShareApi *pThis) { + + // Initialize vtable(s) with 28 per-object function pointer(s). __nvoc_init_funcTable_KernelCtxShareApi_1(pThis); } diff --git a/src/nvidia/generated/g_kernel_ctxshare_nvoc.h b/src/nvidia/generated/g_kernel_ctxshare_nvoc.h index cabbf50bf8..c1b41f7925 100644 --- a/src/nvidia/generated/g_kernel_ctxshare_nvoc.h +++ b/src/nvidia/generated/g_kernel_ctxshare_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_CTXSHARE_NVOC_H_ #define _G_KERNEL_CTXSHARE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_ctxshare_nvoc.h" #ifndef CTXSHARE_H @@ -48,6 +56,7 @@ extern "C" { #include "containers/btree.h" // Forward declaration + struct OBJGPU; #ifndef __NVOC_CLASS_OBJGPU_TYPEDEF__ @@ -60,6 +69,7 @@ typedef struct OBJGPU OBJGPU; #endif /* __nvoc_class_id_OBJGPU */ + struct KernelCtxShareApi; #ifndef __NVOC_CLASS_KernelCtxShareApi_TYPEDEF__ @@ -89,12 +99,21 @@ typedef struct KernelCtxShareApi KernelCtxShareApi; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelCtxShare { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RsShared __nvoc_base_RsShared; - struct Object *__nvoc_pbase_Object; - struct RsShared *__nvoc_pbase_RsShared; - struct KernelCtxShare *__nvoc_pbase_KernelCtxShare; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct RsShared *__nvoc_pbase_RsShared; // shr super + struct KernelCtxShare *__nvoc_pbase_KernelCtxShare; // kctxshare + + // Data members struct OBJVASPACE *pVAS; struct KernelChannelGroup *pKernelChannelGroup; NvU32 subctxId; @@ -110,6 +129,7 @@ typedef struct KernelCtxShare KernelCtxShare; #define __nvoc_class_id_KernelCtxShare 0x5ae2fe #endif /* __nvoc_class_id_KernelCtxShare */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCtxShare; #define __staticCast_KernelCtxShare(pThis) \ @@ -122,13 +142,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCtxShare; ((KernelCtxShare*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelCtxShare))) #endif //__nvoc_kernel_ctxshare_h_disabled - NV_STATUS __nvoc_objCreateDynamic_KernelCtxShare(KernelCtxShare**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_KernelCtxShare(KernelCtxShare**, Dynamic*, NvU32); #define __objCreate_KernelCtxShare(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelCtxShare((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions static inline NV_STATUS kctxshareInit_56cd7a(struct KernelCtxShare *pKernelCtxShare, struct KernelCtxShareApi *pKernelCtxShareApi, struct OBJGPU *pGpu, struct OBJVASPACE *pVAS, struct KernelChannelGroupApi *pKernelChannelGroupApi, NvU64 offset, struct EMEMBLOCK *pBlock) { return NV_OK; } @@ -202,43 +225,54 @@ void kctxshareDestruct_IMPL(struct KernelCtxShare *pKernelCtxShare); #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelCtxShareApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct KernelCtxShareApi *__nvoc_pbase_KernelCtxShareApi; - NvBool (*__kctxshareapiCanCopy__)(struct KernelCtxShareApi *); - NV_STATUS (*__kctxshareapiCtrlCmdSetTpcPartitionTable__)(struct KernelCtxShareApi *, NV9067_CTRL_TPC_PARTITION_TABLE_PARAMS *); - NV_STATUS (*__kctxshareapiCtrlCmdGetCwdWatermark__)(struct KernelCtxShareApi *, NV9067_CTRL_CWD_WATERMARK_PARAMS *); - NV_STATUS (*__kctxshareapiCtrlCmdSetCwdWatermark__)(struct KernelCtxShareApi *, NV9067_CTRL_CWD_WATERMARK_PARAMS *); - NvBool (*__kctxshareapiShareCallback__)(struct KernelCtxShareApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__kctxshareapiCheckMemInterUnmap__)(struct KernelCtxShareApi *, NvBool); - NV_STATUS (*__kctxshareapiMapTo__)(struct KernelCtxShareApi *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__kctxshareapiGetMapAddrSpace__)(struct KernelCtxShareApi *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__kctxshareapiGetRefCount__)(struct KernelCtxShareApi *); - void (*__kctxshareapiAddAdditionalDependants__)(struct RsClient *, struct KernelCtxShareApi *, RsResourceRef *); - NV_STATUS (*__kctxshareapiControl_Prologue__)(struct KernelCtxShareApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kctxshareapiGetRegBaseOffsetAndSize__)(struct KernelCtxShareApi *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__kctxshareapiInternalControlForward__)(struct KernelCtxShareApi *, NvU32, void *, NvU32); - NV_STATUS (*__kctxshareapiUnmapFrom__)(struct KernelCtxShareApi *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__kctxshareapiControl_Epilogue__)(struct KernelCtxShareApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__kctxshareapiGetInternalObjectHandle__)(struct KernelCtxShareApi *); - NV_STATUS (*__kctxshareapiControl__)(struct KernelCtxShareApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kctxshareapiUnmap__)(struct KernelCtxShareApi *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__kctxshareapiGetMemInterMapParams__)(struct KernelCtxShareApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__kctxshareapiGetMemoryMappingDescriptor__)(struct KernelCtxShareApi *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__kctxshareapiControlFilter__)(struct KernelCtxShareApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kctxshareapiControlSerialization_Prologue__)(struct KernelCtxShareApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__kctxshareapiIsPartialUnmapSupported__)(struct KernelCtxShareApi *); - void (*__kctxshareapiPreDestruct__)(struct KernelCtxShareApi *); - NV_STATUS (*__kctxshareapiIsDuplicate__)(struct KernelCtxShareApi *, NvHandle, NvBool *); - void (*__kctxshareapiControlSerialization_Epilogue__)(struct KernelCtxShareApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kctxshareapiMap__)(struct KernelCtxShareApi *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__kctxshareapiAccessCallback__)(struct KernelCtxShareApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct KernelCtxShareApi *__nvoc_pbase_KernelCtxShareApi; // kctxshareapi + + // Vtable with 28 per-object function pointers + NvBool (*__kctxshareapiCanCopy__)(struct KernelCtxShareApi * /*this*/); // virtual override (res) base (gpures) + NV_STATUS (*__kctxshareapiCtrlCmdSetTpcPartitionTable__)(struct KernelCtxShareApi * /*this*/, NV9067_CTRL_TPC_PARTITION_TABLE_PARAMS *); // exported (id=0x90670102) + NV_STATUS (*__kctxshareapiCtrlCmdGetCwdWatermark__)(struct KernelCtxShareApi * /*this*/, NV9067_CTRL_CWD_WATERMARK_PARAMS *); // exported (id=0x90670201) + NV_STATUS (*__kctxshareapiCtrlCmdSetCwdWatermark__)(struct KernelCtxShareApi * /*this*/, NV9067_CTRL_CWD_WATERMARK_PARAMS *); // exported (id=0x90670202) + NV_STATUS (*__kctxshareapiControl__)(struct KernelCtxShareApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kctxshareapiMap__)(struct KernelCtxShareApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kctxshareapiUnmap__)(struct KernelCtxShareApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__kctxshareapiShareCallback__)(struct KernelCtxShareApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kctxshareapiGetRegBaseOffsetAndSize__)(struct KernelCtxShareApi * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kctxshareapiGetMapAddrSpace__)(struct KernelCtxShareApi * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kctxshareapiInternalControlForward__)(struct KernelCtxShareApi * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__kctxshareapiGetInternalObjectHandle__)(struct KernelCtxShareApi * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__kctxshareapiAccessCallback__)(struct KernelCtxShareApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kctxshareapiGetMemInterMapParams__)(struct KernelCtxShareApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kctxshareapiCheckMemInterUnmap__)(struct KernelCtxShareApi * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kctxshareapiGetMemoryMappingDescriptor__)(struct KernelCtxShareApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kctxshareapiControlSerialization_Prologue__)(struct KernelCtxShareApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__kctxshareapiControlSerialization_Epilogue__)(struct KernelCtxShareApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kctxshareapiControl_Prologue__)(struct KernelCtxShareApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__kctxshareapiControl_Epilogue__)(struct KernelCtxShareApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kctxshareapiIsDuplicate__)(struct KernelCtxShareApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__kctxshareapiPreDestruct__)(struct KernelCtxShareApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__kctxshareapiControlFilter__)(struct KernelCtxShareApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__kctxshareapiIsPartialUnmapSupported__)(struct KernelCtxShareApi * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__kctxshareapiMapTo__)(struct KernelCtxShareApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__kctxshareapiUnmapFrom__)(struct KernelCtxShareApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__kctxshareapiGetRefCount__)(struct KernelCtxShareApi * /*this*/); // virtual inherited (res) base (gpures) + void (*__kctxshareapiAddAdditionalDependants__)(struct RsClient *, struct KernelCtxShareApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members struct KernelCtxShare *pShareData; NvHandle hVASpace; }; @@ -252,6 +286,7 @@ typedef struct KernelCtxShareApi KernelCtxShareApi; #define __nvoc_class_id_KernelCtxShareApi 0x1f9af1 #endif /* __nvoc_class_id_KernelCtxShareApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCtxShareApi; #define __staticCast_KernelCtxShareApi(pThis) \ @@ -264,160 +299,191 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCtxShareApi; ((KernelCtxShareApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelCtxShareApi))) #endif //__nvoc_kernel_ctxshare_h_disabled - NV_STATUS __nvoc_objCreateDynamic_KernelCtxShareApi(KernelCtxShareApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_KernelCtxShareApi(KernelCtxShareApi**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_KernelCtxShareApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_KernelCtxShareApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define kctxshareapiCanCopy_FNPTR(pKernelCtxShareApi) pKernelCtxShareApi->__kctxshareapiCanCopy__ #define kctxshareapiCanCopy(pKernelCtxShareApi) kctxshareapiCanCopy_DISPATCH(pKernelCtxShareApi) +#define kctxshareapiCtrlCmdSetTpcPartitionTable_FNPTR(pKernelCtxShareApi) pKernelCtxShareApi->__kctxshareapiCtrlCmdSetTpcPartitionTable__ #define kctxshareapiCtrlCmdSetTpcPartitionTable(pKernelCtxShareApi, pParams) kctxshareapiCtrlCmdSetTpcPartitionTable_DISPATCH(pKernelCtxShareApi, pParams) +#define kctxshareapiCtrlCmdGetCwdWatermark_FNPTR(pKernelCtxShareApi) pKernelCtxShareApi->__kctxshareapiCtrlCmdGetCwdWatermark__ #define kctxshareapiCtrlCmdGetCwdWatermark(pKernelCtxShareApi, pParams) kctxshareapiCtrlCmdGetCwdWatermark_DISPATCH(pKernelCtxShareApi, pParams) +#define kctxshareapiCtrlCmdSetCwdWatermark_FNPTR(pKernelCtxShareApi) pKernelCtxShareApi->__kctxshareapiCtrlCmdSetCwdWatermark__ #define kctxshareapiCtrlCmdSetCwdWatermark(pKernelCtxShareApi, pParams) kctxshareapiCtrlCmdSetCwdWatermark_DISPATCH(pKernelCtxShareApi, pParams) +#define kctxshareapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define kctxshareapiControl(pGpuResource, pCallContext, pParams) kctxshareapiControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define kctxshareapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define kctxshareapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) kctxshareapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define kctxshareapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define kctxshareapiUnmap(pGpuResource, pCallContext, pCpuMapping) kctxshareapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define kctxshareapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define kctxshareapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) kctxshareapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define kctxshareapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) kctxshareapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define kctxshareapiMapTo(pResource, pParams) kctxshareapiMapTo_DISPATCH(pResource, pParams) -#define kctxshareapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) kctxshareapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define kctxshareapiGetRefCount(pResource) kctxshareapiGetRefCount_DISPATCH(pResource) -#define kctxshareapiAddAdditionalDependants(pClient, pResource, pReference) kctxshareapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define kctxshareapiControl_Prologue(pResource, pCallContext, pParams) kctxshareapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define kctxshareapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define kctxshareapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) kctxshareapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define kctxshareapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define kctxshareapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) kctxshareapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define kctxshareapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define kctxshareapiInternalControlForward(pGpuResource, command, pParams, size) kctxshareapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define kctxshareapiUnmapFrom(pResource, pParams) kctxshareapiUnmapFrom_DISPATCH(pResource, pParams) -#define kctxshareapiControl_Epilogue(pResource, pCallContext, pParams) kctxshareapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kctxshareapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define kctxshareapiGetInternalObjectHandle(pGpuResource) kctxshareapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define kctxshareapiControl(pGpuResource, pCallContext, pParams) kctxshareapiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define kctxshareapiUnmap(pGpuResource, pCallContext, pCpuMapping) kctxshareapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define kctxshareapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define kctxshareapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kctxshareapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define kctxshareapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define kctxshareapiGetMemInterMapParams(pRmResource, pParams) kctxshareapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define kctxshareapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define kctxshareapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) kctxshareapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define kctxshareapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define kctxshareapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) kctxshareapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define kctxshareapiControlFilter(pResource, pCallContext, pParams) kctxshareapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define kctxshareapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define kctxshareapiControlSerialization_Prologue(pResource, pCallContext, pParams) kctxshareapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define kctxshareapiIsPartialUnmapSupported(pResource) kctxshareapiIsPartialUnmapSupported_DISPATCH(pResource) -#define kctxshareapiPreDestruct(pResource) kctxshareapiPreDestruct_DISPATCH(pResource) -#define kctxshareapiIsDuplicate(pResource, hMemory, pDuplicate) kctxshareapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define kctxshareapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ #define kctxshareapiControlSerialization_Epilogue(pResource, pCallContext, pParams) kctxshareapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kctxshareapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) kctxshareapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define kctxshareapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kctxshareapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool kctxshareapiCanCopy_IMPL(struct KernelCtxShareApi *pKernelCtxShareApi); +#define kctxshareapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define kctxshareapiControl_Prologue(pResource, pCallContext, pParams) kctxshareapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define kctxshareapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define kctxshareapiControl_Epilogue(pResource, pCallContext, pParams) kctxshareapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kctxshareapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define kctxshareapiIsDuplicate(pResource, hMemory, pDuplicate) kctxshareapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define kctxshareapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define kctxshareapiPreDestruct(pResource) kctxshareapiPreDestruct_DISPATCH(pResource) +#define kctxshareapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define kctxshareapiControlFilter(pResource, pCallContext, pParams) kctxshareapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define kctxshareapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define kctxshareapiIsPartialUnmapSupported(pResource) kctxshareapiIsPartialUnmapSupported_DISPATCH(pResource) +#define kctxshareapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define kctxshareapiMapTo(pResource, pParams) kctxshareapiMapTo_DISPATCH(pResource, pParams) +#define kctxshareapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define kctxshareapiUnmapFrom(pResource, pParams) kctxshareapiUnmapFrom_DISPATCH(pResource, pParams) +#define kctxshareapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define kctxshareapiGetRefCount(pResource) kctxshareapiGetRefCount_DISPATCH(pResource) +#define kctxshareapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define kctxshareapiAddAdditionalDependants(pClient, pResource, pReference) kctxshareapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NvBool kctxshareapiCanCopy_DISPATCH(struct KernelCtxShareApi *pKernelCtxShareApi) { return pKernelCtxShareApi->__kctxshareapiCanCopy__(pKernelCtxShareApi); } -NV_STATUS kctxshareapiCtrlCmdSetTpcPartitionTable_IMPL(struct KernelCtxShareApi *pKernelCtxShareApi, NV9067_CTRL_TPC_PARTITION_TABLE_PARAMS *pParams); - static inline NV_STATUS kctxshareapiCtrlCmdSetTpcPartitionTable_DISPATCH(struct KernelCtxShareApi *pKernelCtxShareApi, NV9067_CTRL_TPC_PARTITION_TABLE_PARAMS *pParams) { return pKernelCtxShareApi->__kctxshareapiCtrlCmdSetTpcPartitionTable__(pKernelCtxShareApi, pParams); } -NV_STATUS kctxshareapiCtrlCmdGetCwdWatermark_IMPL(struct KernelCtxShareApi *pKernelCtxShareApi, NV9067_CTRL_CWD_WATERMARK_PARAMS *pParams); - static inline NV_STATUS kctxshareapiCtrlCmdGetCwdWatermark_DISPATCH(struct KernelCtxShareApi *pKernelCtxShareApi, NV9067_CTRL_CWD_WATERMARK_PARAMS *pParams) { return pKernelCtxShareApi->__kctxshareapiCtrlCmdGetCwdWatermark__(pKernelCtxShareApi, pParams); } -NV_STATUS kctxshareapiCtrlCmdSetCwdWatermark_IMPL(struct KernelCtxShareApi *pKernelCtxShareApi, NV9067_CTRL_CWD_WATERMARK_PARAMS *pParams); - static inline NV_STATUS kctxshareapiCtrlCmdSetCwdWatermark_DISPATCH(struct KernelCtxShareApi *pKernelCtxShareApi, NV9067_CTRL_CWD_WATERMARK_PARAMS *pParams) { return pKernelCtxShareApi->__kctxshareapiCtrlCmdSetCwdWatermark__(pKernelCtxShareApi, pParams); } -static inline NvBool kctxshareapiShareCallback_DISPATCH(struct KernelCtxShareApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__kctxshareapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS kctxshareapiControl_DISPATCH(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__kctxshareapiControl__(pGpuResource, pCallContext, pParams); } -static inline NV_STATUS kctxshareapiCheckMemInterUnmap_DISPATCH(struct KernelCtxShareApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__kctxshareapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS kctxshareapiMap_DISPATCH(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__kctxshareapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS kctxshareapiMapTo_DISPATCH(struct KernelCtxShareApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__kctxshareapiMapTo__(pResource, pParams); +static inline NV_STATUS kctxshareapiUnmap_DISPATCH(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__kctxshareapiUnmap__(pGpuResource, pCallContext, pCpuMapping); +} + +static inline NvBool kctxshareapiShareCallback_DISPATCH(struct KernelCtxShareApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__kctxshareapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +} + +static inline NV_STATUS kctxshareapiGetRegBaseOffsetAndSize_DISPATCH(struct KernelCtxShareApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__kctxshareapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS kctxshareapiGetMapAddrSpace_DISPATCH(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__kctxshareapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NvU32 kctxshareapiGetRefCount_DISPATCH(struct KernelCtxShareApi *pResource) { - return pResource->__kctxshareapiGetRefCount__(pResource); +static inline NV_STATUS kctxshareapiInternalControlForward_DISPATCH(struct KernelCtxShareApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__kctxshareapiInternalControlForward__(pGpuResource, command, pParams, size); } -static inline void kctxshareapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelCtxShareApi *pResource, RsResourceRef *pReference) { - pResource->__kctxshareapiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvHandle kctxshareapiGetInternalObjectHandle_DISPATCH(struct KernelCtxShareApi *pGpuResource) { + return pGpuResource->__kctxshareapiGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS kctxshareapiControl_Prologue_DISPATCH(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kctxshareapiControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool kctxshareapiAccessCallback_DISPATCH(struct KernelCtxShareApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__kctxshareapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS kctxshareapiGetRegBaseOffsetAndSize_DISPATCH(struct KernelCtxShareApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__kctxshareapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS kctxshareapiGetMemInterMapParams_DISPATCH(struct KernelCtxShareApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__kctxshareapiGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS kctxshareapiInternalControlForward_DISPATCH(struct KernelCtxShareApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__kctxshareapiInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS kctxshareapiCheckMemInterUnmap_DISPATCH(struct KernelCtxShareApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__kctxshareapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS kctxshareapiUnmapFrom_DISPATCH(struct KernelCtxShareApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__kctxshareapiUnmapFrom__(pResource, pParams); +static inline NV_STATUS kctxshareapiGetMemoryMappingDescriptor_DISPATCH(struct KernelCtxShareApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__kctxshareapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline void kctxshareapiControl_Epilogue_DISPATCH(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kctxshareapiControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS kctxshareapiControlSerialization_Prologue_DISPATCH(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kctxshareapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvHandle kctxshareapiGetInternalObjectHandle_DISPATCH(struct KernelCtxShareApi *pGpuResource) { - return pGpuResource->__kctxshareapiGetInternalObjectHandle__(pGpuResource); +static inline void kctxshareapiControlSerialization_Epilogue_DISPATCH(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__kctxshareapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS kctxshareapiControl_DISPATCH(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__kctxshareapiControl__(pGpuResource, pCallContext, pParams); +static inline NV_STATUS kctxshareapiControl_Prologue_DISPATCH(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kctxshareapiControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS kctxshareapiUnmap_DISPATCH(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kctxshareapiUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline void kctxshareapiControl_Epilogue_DISPATCH(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__kctxshareapiControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS kctxshareapiGetMemInterMapParams_DISPATCH(struct KernelCtxShareApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__kctxshareapiGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS kctxshareapiIsDuplicate_DISPATCH(struct KernelCtxShareApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__kctxshareapiIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS kctxshareapiGetMemoryMappingDescriptor_DISPATCH(struct KernelCtxShareApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__kctxshareapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void kctxshareapiPreDestruct_DISPATCH(struct KernelCtxShareApi *pResource) { + pResource->__kctxshareapiPreDestruct__(pResource); } static inline NV_STATUS kctxshareapiControlFilter_DISPATCH(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__kctxshareapiControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS kctxshareapiControlSerialization_Prologue_DISPATCH(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kctxshareapiControlSerialization_Prologue__(pResource, pCallContext, pParams); -} - static inline NvBool kctxshareapiIsPartialUnmapSupported_DISPATCH(struct KernelCtxShareApi *pResource) { return pResource->__kctxshareapiIsPartialUnmapSupported__(pResource); } -static inline void kctxshareapiPreDestruct_DISPATCH(struct KernelCtxShareApi *pResource) { - pResource->__kctxshareapiPreDestruct__(pResource); +static inline NV_STATUS kctxshareapiMapTo_DISPATCH(struct KernelCtxShareApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__kctxshareapiMapTo__(pResource, pParams); } -static inline NV_STATUS kctxshareapiIsDuplicate_DISPATCH(struct KernelCtxShareApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__kctxshareapiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS kctxshareapiUnmapFrom_DISPATCH(struct KernelCtxShareApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__kctxshareapiUnmapFrom__(pResource, pParams); } -static inline void kctxshareapiControlSerialization_Epilogue_DISPATCH(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kctxshareapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 kctxshareapiGetRefCount_DISPATCH(struct KernelCtxShareApi *pResource) { + return pResource->__kctxshareapiGetRefCount__(pResource); } -static inline NV_STATUS kctxshareapiMap_DISPATCH(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kctxshareapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void kctxshareapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelCtxShareApi *pResource, RsResourceRef *pReference) { + pResource->__kctxshareapiAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NvBool kctxshareapiAccessCallback_DISPATCH(struct KernelCtxShareApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__kctxshareapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} +NvBool kctxshareapiCanCopy_IMPL(struct KernelCtxShareApi *pKernelCtxShareApi); + +NV_STATUS kctxshareapiCtrlCmdSetTpcPartitionTable_IMPL(struct KernelCtxShareApi *pKernelCtxShareApi, NV9067_CTRL_TPC_PARTITION_TABLE_PARAMS *pParams); + +NV_STATUS kctxshareapiCtrlCmdGetCwdWatermark_IMPL(struct KernelCtxShareApi *pKernelCtxShareApi, NV9067_CTRL_CWD_WATERMARK_PARAMS *pParams); + +NV_STATUS kctxshareapiCtrlCmdSetCwdWatermark_IMPL(struct KernelCtxShareApi *pKernelCtxShareApi, NV9067_CTRL_CWD_WATERMARK_PARAMS *pParams); NV_STATUS kctxshareapiConstruct_IMPL(struct KernelCtxShareApi *arg_pKernelCtxShareApi, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_kernel_falcon_nvoc.c b/src/nvidia/generated/g_kernel_falcon_nvoc.c index cbe9db5e3f..c4b14d2638 100644 --- a/src/nvidia/generated/g_kernel_falcon_nvoc.c +++ b/src/nvidia/generated/g_kernel_falcon_nvoc.c @@ -69,66 +69,87 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelFalcon = /*pExportInfo=*/ &__nvoc_export_info_KernelFalcon }; -static NvU32 __nvoc_thunk_KernelFalcon_kcrashcatEngineRegRead(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 offset) { - return kflcnRegRead(pGpu, (struct KernelFalcon *)(((unsigned char *)pKernelFlcn) - __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), offset); +// 3 down-thunk(s) defined to bridge methods in KernelFalcon from superclasses + +// kflcnRegRead: virtual halified (2 hals) override (kcrashcatEngine) base (kcrashcatEngine) body +static NvU32 __nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegRead(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 offset) { + return kflcnRegRead(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) - __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), offset); } -static void __nvoc_thunk_KernelFalcon_kcrashcatEngineRegWrite(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 offset, NvU32 data) { - kflcnRegWrite(pGpu, (struct KernelFalcon *)(((unsigned char *)pKernelFlcn) - __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), offset, data); +// kflcnRegWrite: virtual halified (2 hals) override (kcrashcatEngine) base (kcrashcatEngine) body +static void __nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegWrite(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 offset, NvU32 data) { + kflcnRegWrite(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) - __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), offset, data); } -static NvU32 __nvoc_thunk_KernelFalcon_kcrashcatEngineMaskDmemAddr(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 addr) { - return kflcnMaskDmemAddr(pGpu, (struct KernelFalcon *)(((unsigned char *)pKernelFlcn) - __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), addr); +// kflcnMaskDmemAddr: virtual halified (3 hals) override (kcrashcatEngine) base (kcrashcatEngine) body +static NvU32 __nvoc_down_thunk_KernelFalcon_kcrashcatEngineMaskDmemAddr(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 addr) { + return kflcnMaskDmemAddr(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) - __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), addr); } -static void __nvoc_thunk_KernelCrashCatEngine_kflcnReadEmem(struct KernelFalcon *arg0, NvU64 offset, NvU64 size, void *pBuf) { - kcrashcatEngineReadEmem((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), offset, size, pBuf); + +// 12 up-thunk(s) defined to bridge methods in KernelFalcon to superclasses + +// kflcnConfigured: virtual inherited (kcrashcatEngine) base (kcrashcatEngine) +static NvBool __nvoc_up_thunk_KernelCrashCatEngine_kflcnConfigured(struct KernelFalcon *arg_this) { + return kcrashcatEngineConfigured((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset)); } -static NvU32 __nvoc_thunk_KernelCrashCatEngine_kflcnGetWFL0Offset(struct KernelFalcon *arg0) { - return kcrashcatEngineGetWFL0Offset((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset)); +// kflcnUnload: virtual inherited (kcrashcatEngine) base (kcrashcatEngine) +static void __nvoc_up_thunk_KernelCrashCatEngine_kflcnUnload(struct KernelFalcon *arg_this) { + kcrashcatEngineUnload((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset)); } -static const NvU32 *__nvoc_thunk_KernelCrashCatEngine_kflcnGetScratchOffsets(struct KernelFalcon *arg0, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { - return kcrashcatEngineGetScratchOffsets((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), scratchGroupId); +// kflcnVprintf: virtual inherited (kcrashcatEngine) base (kcrashcatEngine) +static void __nvoc_up_thunk_KernelCrashCatEngine_kflcnVprintf(struct KernelFalcon *arg_this, NvBool bReportStart, const char *fmt, va_list args) { + kcrashcatEngineVprintf((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), bReportStart, fmt, args); } -static void __nvoc_thunk_KernelCrashCatEngine_kflcnUnload(struct KernelFalcon *arg0) { - kcrashcatEngineUnload((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset)); +// kflcnPriRead: virtual inherited (kcrashcatEngine) base (kcrashcatEngine) +static NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kflcnPriRead(struct KernelFalcon *arg_this, NvU32 offset) { + return kcrashcatEnginePriRead((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), offset); } -static NvBool __nvoc_thunk_KernelCrashCatEngine_kflcnConfigured(struct KernelFalcon *arg0) { - return kcrashcatEngineConfigured((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset)); +// kflcnPriWrite: virtual inherited (kcrashcatEngine) base (kcrashcatEngine) +static void __nvoc_up_thunk_KernelCrashCatEngine_kflcnPriWrite(struct KernelFalcon *arg_this, NvU32 offset, NvU32 data) { + kcrashcatEnginePriWrite((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), offset, data); } -static NvU32 __nvoc_thunk_KernelCrashCatEngine_kflcnPriRead(struct KernelFalcon *arg0, NvU32 offset) { - return kcrashcatEnginePriRead((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), offset); +// kflcnMapBufferDescriptor: virtual inherited (kcrashcatEngine) base (kcrashcatEngine) +static void * __nvoc_up_thunk_KernelCrashCatEngine_kflcnMapBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc) { + return kcrashcatEngineMapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), pBufDesc); } -static void __nvoc_thunk_KernelCrashCatEngine_kflcnVprintf(struct KernelFalcon *arg0, NvBool bReportStart, const char *fmt, va_list args) { - kcrashcatEngineVprintf((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), bReportStart, fmt, args); +// kflcnUnmapBufferDescriptor: virtual inherited (kcrashcatEngine) base (kcrashcatEngine) +static void __nvoc_up_thunk_KernelCrashCatEngine_kflcnUnmapBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc) { + kcrashcatEngineUnmapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), pBufDesc); } -static void __nvoc_thunk_KernelCrashCatEngine_kflcnPriWrite(struct KernelFalcon *arg0, NvU32 offset, NvU32 data) { - kcrashcatEnginePriWrite((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), offset, data); +// kflcnSyncBufferDescriptor: virtual inherited (kcrashcatEngine) base (kcrashcatEngine) +static void __nvoc_up_thunk_KernelCrashCatEngine_kflcnSyncBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { + kcrashcatEngineSyncBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), pBufDesc, offset, size); } -static void __nvoc_thunk_KernelCrashCatEngine_kflcnSyncBufferDescriptor(struct KernelFalcon *arg0, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { - kcrashcatEngineSyncBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), pBufDesc, offset, size); +// kflcnReadDmem: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) +static void __nvoc_up_thunk_KernelCrashCatEngine_kflcnReadDmem(struct KernelFalcon *arg_this, NvU32 offset, NvU32 size, void *pBuf) { + kcrashcatEngineReadDmem((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), offset, size, pBuf); } -static void *__nvoc_thunk_KernelCrashCatEngine_kflcnMapBufferDescriptor(struct KernelFalcon *arg0, CrashCatBufferDescriptor *pBufDesc) { - return kcrashcatEngineMapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), pBufDesc); +// kflcnReadEmem: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) +static void __nvoc_up_thunk_KernelCrashCatEngine_kflcnReadEmem(struct KernelFalcon *arg_this, NvU64 offset, NvU64 size, void *pBuf) { + kcrashcatEngineReadEmem((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), offset, size, pBuf); } -static void __nvoc_thunk_KernelCrashCatEngine_kflcnUnmapBufferDescriptor(struct KernelFalcon *arg0, CrashCatBufferDescriptor *pBufDesc) { - kcrashcatEngineUnmapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), pBufDesc); +// kflcnGetScratchOffsets: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) +static const NvU32 * __nvoc_up_thunk_KernelCrashCatEngine_kflcnGetScratchOffsets(struct KernelFalcon *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { + return kcrashcatEngineGetScratchOffsets((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), scratchGroupId); } -static void __nvoc_thunk_KernelCrashCatEngine_kflcnReadDmem(struct KernelFalcon *arg0, NvU32 offset, NvU32 size, void *pBuf) { - kcrashcatEngineReadDmem((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), offset, size, pBuf); +// kflcnGetWFL0Offset: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) +static NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kflcnGetWFL0Offset(struct KernelFalcon *arg_this) { + return kcrashcatEngineGetWFL0Offset((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelFalcon = { /*numEntries=*/ 0, @@ -168,6 +189,7 @@ NV_STATUS __nvoc_ctor_KernelFalcon(KernelFalcon *pThis, RmHalspecOwner *pRmhalsp return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -180,7 +202,7 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // Hal function -- kflcnRegRead + // kflcnRegRead -- virtual halified (2 hals) override (kcrashcatEngine) base (kcrashcatEngine) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kflcnRegRead__ = &kflcnRegRead_474d46; @@ -189,8 +211,9 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO { pThis->__kflcnRegRead__ = &kflcnRegRead_TU102; } + pThis->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineRegRead__ = &__nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegRead; - // Hal function -- kflcnRegWrite + // kflcnRegWrite -- virtual halified (2 hals) override (kcrashcatEngine) base (kcrashcatEngine) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kflcnRegWrite__ = &kflcnRegWrite_f2d351; @@ -199,8 +222,9 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO { pThis->__kflcnRegWrite__ = &kflcnRegWrite_TU102; } + pThis->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineRegWrite__ = &__nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegWrite; - // Hal function -- kflcnRiscvRegRead + // kflcnRiscvRegRead -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kflcnRiscvRegRead__ = &kflcnRiscvRegRead_474d46; @@ -210,7 +234,7 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO pThis->__kflcnRiscvRegRead__ = &kflcnRiscvRegRead_TU102; } - // Hal function -- kflcnRiscvRegWrite + // kflcnRiscvRegWrite -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kflcnRiscvRegWrite__ = &kflcnRiscvRegWrite_f2d351; @@ -220,7 +244,7 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO pThis->__kflcnRiscvRegWrite__ = &kflcnRiscvRegWrite_TU102; } - // Hal function -- kflcnIsRiscvCpuEnabled + // kflcnIsRiscvCpuEnabled -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kflcnIsRiscvCpuEnabled__ = &kflcnIsRiscvCpuEnabled_108313; @@ -230,7 +254,7 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO pThis->__kflcnIsRiscvCpuEnabled__ = &kflcnIsRiscvCpuEnabled_TU102; } - // Hal function -- kflcnIsRiscvActive + // kflcnIsRiscvActive -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kflcnIsRiscvActive__ = &kflcnIsRiscvActive_108313; @@ -247,7 +271,7 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO } } - // Hal function -- kflcnRiscvProgramBcr + // kflcnRiscvProgramBcr -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kflcnRiscvProgramBcr__ = &kflcnRiscvProgramBcr_f2d351; @@ -264,7 +288,7 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO } } - // Hal function -- kflcnSwitchToFalcon + // kflcnSwitchToFalcon -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kflcnSwitchToFalcon__ = &kflcnSwitchToFalcon_f2d351; @@ -281,9 +305,10 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO } } + // kflcnResetHw -- pure virtual pThis->__kflcnResetHw__ = NULL; - // Hal function -- kflcnReset + // kflcnReset -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kflcnReset__ = &kflcnReset_f2d351; @@ -293,7 +318,7 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO pThis->__kflcnReset__ = &kflcnReset_TU102; } - // Hal function -- kflcnResetIntoRiscv + // kflcnResetIntoRiscv -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kflcnResetIntoRiscv__ = &kflcnResetIntoRiscv_f2d351; @@ -310,7 +335,7 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO } } - // Hal function -- kflcnStartCpu + // kflcnStartCpu -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kflcnStartCpu__ = &kflcnStartCpu_f2d351; @@ -320,7 +345,7 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO pThis->__kflcnStartCpu__ = &kflcnStartCpu_TU102; } - // Hal function -- kflcnDisableCtxReq + // kflcnDisableCtxReq -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kflcnDisableCtxReq__ = &kflcnDisableCtxReq_f2d351; @@ -330,7 +355,7 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO pThis->__kflcnDisableCtxReq__ = &kflcnDisableCtxReq_TU102; } - // Hal function -- kflcnPreResetWait + // kflcnPreResetWait -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kflcnPreResetWait__ = &kflcnPreResetWait_5baef9; @@ -348,7 +373,7 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO } } - // Hal function -- kflcnWaitForResetToFinish + // kflcnWaitForResetToFinish -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kflcnWaitForResetToFinish__ = &kflcnWaitForResetToFinish_5baef9; @@ -365,7 +390,7 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO } } - // Hal function -- kflcnWaitForHalt + // kflcnWaitForHalt -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kflcnWaitForHalt__ = &kflcnWaitForHalt_5baef9; @@ -375,7 +400,7 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO pThis->__kflcnWaitForHalt__ = &kflcnWaitForHalt_TU102; } - // Hal function -- kflcnReadIntrStatus + // kflcnReadIntrStatus -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kflcnReadIntrStatus__ = &kflcnReadIntrStatus_474d46; @@ -392,7 +417,7 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO } } - // Hal function -- kflcnIntrRetrigger + // kflcnIntrRetrigger -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kflcnIntrRetrigger__ = &kflcnIntrRetrigger_f2d351; @@ -409,7 +434,7 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO } } - // Hal function -- kflcnMaskImemAddr + // kflcnMaskImemAddr -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kflcnMaskImemAddr__ = &kflcnMaskImemAddr_474d46; @@ -426,7 +451,7 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO } } - // Hal function -- kflcnMaskDmemAddr + // kflcnMaskDmemAddr -- virtual halified (3 hals) override (kcrashcatEngine) base (kcrashcatEngine) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kflcnMaskDmemAddr__ = &kflcnMaskDmemAddr_474d46; @@ -442,39 +467,50 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO pThis->__kflcnMaskDmemAddr__ = &kflcnMaskDmemAddr_GA100; } } + pThis->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineMaskDmemAddr__ = &__nvoc_down_thunk_KernelFalcon_kcrashcatEngineMaskDmemAddr; - pThis->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineRegRead__ = &__nvoc_thunk_KernelFalcon_kcrashcatEngineRegRead; + // kflcnConfigured -- virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + pThis->__kflcnConfigured__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnConfigured; - pThis->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineRegWrite__ = &__nvoc_thunk_KernelFalcon_kcrashcatEngineRegWrite; + // kflcnUnload -- virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + pThis->__kflcnUnload__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnUnload; - pThis->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineMaskDmemAddr__ = &__nvoc_thunk_KernelFalcon_kcrashcatEngineMaskDmemAddr; + // kflcnVprintf -- virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + pThis->__kflcnVprintf__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnVprintf; - pThis->__kflcnReadEmem__ = &__nvoc_thunk_KernelCrashCatEngine_kflcnReadEmem; + // kflcnPriRead -- virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + pThis->__kflcnPriRead__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnPriRead; - pThis->__kflcnGetWFL0Offset__ = &__nvoc_thunk_KernelCrashCatEngine_kflcnGetWFL0Offset; + // kflcnPriWrite -- virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + pThis->__kflcnPriWrite__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnPriWrite; - pThis->__kflcnGetScratchOffsets__ = &__nvoc_thunk_KernelCrashCatEngine_kflcnGetScratchOffsets; + // kflcnMapBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + pThis->__kflcnMapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnMapBufferDescriptor; - pThis->__kflcnUnload__ = &__nvoc_thunk_KernelCrashCatEngine_kflcnUnload; + // kflcnUnmapBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + pThis->__kflcnUnmapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnUnmapBufferDescriptor; - pThis->__kflcnConfigured__ = &__nvoc_thunk_KernelCrashCatEngine_kflcnConfigured; + // kflcnSyncBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + pThis->__kflcnSyncBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnSyncBufferDescriptor; - pThis->__kflcnPriRead__ = &__nvoc_thunk_KernelCrashCatEngine_kflcnPriRead; + // kflcnReadDmem -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + pThis->__kflcnReadDmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnReadDmem; - pThis->__kflcnVprintf__ = &__nvoc_thunk_KernelCrashCatEngine_kflcnVprintf; + // kflcnReadEmem -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + pThis->__kflcnReadEmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnReadEmem; - pThis->__kflcnPriWrite__ = &__nvoc_thunk_KernelCrashCatEngine_kflcnPriWrite; + // kflcnGetScratchOffsets -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + pThis->__kflcnGetScratchOffsets__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnGetScratchOffsets; - pThis->__kflcnSyncBufferDescriptor__ = &__nvoc_thunk_KernelCrashCatEngine_kflcnSyncBufferDescriptor; + // kflcnGetWFL0Offset -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + pThis->__kflcnGetWFL0Offset__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnGetWFL0Offset; +} // End __nvoc_init_funcTable_KernelFalcon_1 with approximately 64 basic block(s). - pThis->__kflcnMapBufferDescriptor__ = &__nvoc_thunk_KernelCrashCatEngine_kflcnMapBufferDescriptor; - - pThis->__kflcnUnmapBufferDescriptor__ = &__nvoc_thunk_KernelCrashCatEngine_kflcnUnmapBufferDescriptor; - - pThis->__kflcnReadDmem__ = &__nvoc_thunk_KernelCrashCatEngine_kflcnReadDmem; -} +// Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_KernelFalcon(KernelFalcon *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 32 per-object function pointer(s). __nvoc_init_funcTable_KernelFalcon_1(pThis, pRmhalspecowner); } @@ -573,86 +609,112 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_GenericKernelFalcon = /*pExportInfo=*/ &__nvoc_export_info_GenericKernelFalcon }; -static NV_STATUS __nvoc_thunk_GenericKernelFalcon_kflcnResetHw(struct OBJGPU *pGpu, struct KernelFalcon *pGenKernFlcn) { - return gkflcnResetHw(pGpu, (struct GenericKernelFalcon *)(((unsigned char *)pGenKernFlcn) - __nvoc_rtti_GenericKernelFalcon_KernelFalcon.offset)); +// 3 down-thunk(s) defined to bridge methods in GenericKernelFalcon from superclasses + +// gkflcnResetHw: virtual override (kflcn) base (kflcn) +static NV_STATUS __nvoc_down_thunk_GenericKernelFalcon_kflcnResetHw(struct OBJGPU *pGpu, struct KernelFalcon *pGenKernFlcn) { + return gkflcnResetHw(pGpu, (struct GenericKernelFalcon *)(((unsigned char *) pGenKernFlcn) - __nvoc_rtti_GenericKernelFalcon_KernelFalcon.offset)); } -static void __nvoc_thunk_GenericKernelFalcon_intrservRegisterIntrService(struct OBJGPU *arg0, struct IntrService *arg1, IntrServiceRecord arg2[171]) { - gkflcnRegisterIntrService(arg0, (struct GenericKernelFalcon *)(((unsigned char *)arg1) - __nvoc_rtti_GenericKernelFalcon_IntrService.offset), arg2); +// gkflcnRegisterIntrService: virtual override (intrserv) base (intrserv) +static void __nvoc_down_thunk_GenericKernelFalcon_intrservRegisterIntrService(struct OBJGPU *arg1, struct IntrService *arg_this, IntrServiceRecord arg3[175]) { + gkflcnRegisterIntrService(arg1, (struct GenericKernelFalcon *)(((unsigned char *) arg_this) - __nvoc_rtti_GenericKernelFalcon_IntrService.offset), arg3); } -static NV_STATUS __nvoc_thunk_GenericKernelFalcon_intrservServiceNotificationInterrupt(struct OBJGPU *arg0, struct IntrService *arg1, IntrServiceServiceNotificationInterruptArguments *arg2) { - return gkflcnServiceNotificationInterrupt(arg0, (struct GenericKernelFalcon *)(((unsigned char *)arg1) - __nvoc_rtti_GenericKernelFalcon_IntrService.offset), arg2); +// gkflcnServiceNotificationInterrupt: virtual override (intrserv) base (intrserv) +static NV_STATUS __nvoc_down_thunk_GenericKernelFalcon_intrservServiceNotificationInterrupt(struct OBJGPU *arg1, struct IntrService *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3) { + return gkflcnServiceNotificationInterrupt(arg1, (struct GenericKernelFalcon *)(((unsigned char *) arg_this) - __nvoc_rtti_GenericKernelFalcon_IntrService.offset), arg3); } -static void __nvoc_thunk_KernelCrashCatEngine_gkflcnReadEmem(struct GenericKernelFalcon *arg0, NvU64 offset, NvU64 size, void *pBuf) { - kcrashcatEngineReadEmem((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), offset, size, pBuf); + +// 17 up-thunk(s) defined to bridge methods in GenericKernelFalcon to superclasses + +// gkflcnRegRead: virtual halified (2 hals) inherited (kflcn) base (kflcn) body +static NvU32 __nvoc_up_thunk_KernelFalcon_gkflcnRegRead(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 offset) { + return kflcnRegRead(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) + __nvoc_rtti_GenericKernelFalcon_KernelFalcon.offset), offset); } -static NvU32 __nvoc_thunk_KernelCrashCatEngine_gkflcnGetWFL0Offset(struct GenericKernelFalcon *arg0) { - return kcrashcatEngineGetWFL0Offset((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset)); +// gkflcnRegWrite: virtual halified (2 hals) inherited (kflcn) base (kflcn) body +static void __nvoc_up_thunk_KernelFalcon_gkflcnRegWrite(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 offset, NvU32 data) { + kflcnRegWrite(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) + __nvoc_rtti_GenericKernelFalcon_KernelFalcon.offset), offset, data); } -static void __nvoc_thunk_KernelCrashCatEngine_gkflcnUnload(struct GenericKernelFalcon *arg0) { - kcrashcatEngineUnload((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset)); +// gkflcnMaskDmemAddr: virtual halified (3 hals) inherited (kflcn) base (kflcn) body +static NvU32 __nvoc_up_thunk_KernelFalcon_gkflcnMaskDmemAddr(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 addr) { + return kflcnMaskDmemAddr(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) + __nvoc_rtti_GenericKernelFalcon_KernelFalcon.offset), addr); } -static NvBool __nvoc_thunk_KernelCrashCatEngine_gkflcnConfigured(struct GenericKernelFalcon *arg0) { - return kcrashcatEngineConfigured((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset)); +// gkflcnConfigured: virtual inherited (kcrashcatEngine) base (kflcn) +static NvBool __nvoc_up_thunk_KernelCrashCatEngine_gkflcnConfigured(struct GenericKernelFalcon *arg_this) { + return kcrashcatEngineConfigured((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset)); } -static NvU32 __nvoc_thunk_KernelCrashCatEngine_gkflcnPriRead(struct GenericKernelFalcon *arg0, NvU32 offset) { - return kcrashcatEnginePriRead((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), offset); +// gkflcnUnload: virtual inherited (kcrashcatEngine) base (kflcn) +static void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnUnload(struct GenericKernelFalcon *arg_this) { + kcrashcatEngineUnload((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset)); } -static const NvU32 *__nvoc_thunk_KernelCrashCatEngine_gkflcnGetScratchOffsets(struct GenericKernelFalcon *arg0, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { - return kcrashcatEngineGetScratchOffsets((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), scratchGroupId); +// gkflcnVprintf: virtual inherited (kcrashcatEngine) base (kflcn) +static void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnVprintf(struct GenericKernelFalcon *arg_this, NvBool bReportStart, const char *fmt, va_list args) { + kcrashcatEngineVprintf((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), bReportStart, fmt, args); } -static void __nvoc_thunk_KernelFalcon_gkflcnRegWrite(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 offset, NvU32 data) { - kflcnRegWrite(pGpu, (struct KernelFalcon *)(((unsigned char *)pKernelFlcn) + __nvoc_rtti_GenericKernelFalcon_KernelFalcon.offset), offset, data); +// gkflcnPriRead: virtual inherited (kcrashcatEngine) base (kflcn) +static NvU32 __nvoc_up_thunk_KernelCrashCatEngine_gkflcnPriRead(struct GenericKernelFalcon *arg_this, NvU32 offset) { + return kcrashcatEnginePriRead((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), offset); } -static NvU32 __nvoc_thunk_KernelFalcon_gkflcnMaskDmemAddr(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 addr) { - return kflcnMaskDmemAddr(pGpu, (struct KernelFalcon *)(((unsigned char *)pKernelFlcn) + __nvoc_rtti_GenericKernelFalcon_KernelFalcon.offset), addr); +// gkflcnPriWrite: virtual inherited (kcrashcatEngine) base (kflcn) +static void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnPriWrite(struct GenericKernelFalcon *arg_this, NvU32 offset, NvU32 data) { + kcrashcatEnginePriWrite((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), offset, data); } -static void __nvoc_thunk_KernelCrashCatEngine_gkflcnVprintf(struct GenericKernelFalcon *arg0, NvBool bReportStart, const char *fmt, va_list args) { - kcrashcatEngineVprintf((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), bReportStart, fmt, args); +// gkflcnMapBufferDescriptor: virtual inherited (kcrashcatEngine) base (kflcn) +static void * __nvoc_up_thunk_KernelCrashCatEngine_gkflcnMapBufferDescriptor(struct GenericKernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc) { + return kcrashcatEngineMapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), pBufDesc); } -static NvBool __nvoc_thunk_IntrService_gkflcnClearInterrupt(struct OBJGPU *pGpu, struct GenericKernelFalcon *pIntrService, IntrServiceClearInterruptArguments *pParams) { - return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_GenericKernelFalcon_IntrService.offset), pParams); +// gkflcnUnmapBufferDescriptor: virtual inherited (kcrashcatEngine) base (kflcn) +static void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnUnmapBufferDescriptor(struct GenericKernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc) { + kcrashcatEngineUnmapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), pBufDesc); } -static void __nvoc_thunk_KernelCrashCatEngine_gkflcnPriWrite(struct GenericKernelFalcon *arg0, NvU32 offset, NvU32 data) { - kcrashcatEnginePriWrite((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), offset, data); +// gkflcnSyncBufferDescriptor: virtual inherited (kcrashcatEngine) base (kflcn) +static void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnSyncBufferDescriptor(struct GenericKernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { + kcrashcatEngineSyncBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), pBufDesc, offset, size); } -static void *__nvoc_thunk_KernelCrashCatEngine_gkflcnMapBufferDescriptor(struct GenericKernelFalcon *arg0, CrashCatBufferDescriptor *pBufDesc) { - return kcrashcatEngineMapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), pBufDesc); +// gkflcnReadDmem: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) +static void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnReadDmem(struct GenericKernelFalcon *arg_this, NvU32 offset, NvU32 size, void *pBuf) { + kcrashcatEngineReadDmem((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), offset, size, pBuf); } -static void __nvoc_thunk_KernelCrashCatEngine_gkflcnSyncBufferDescriptor(struct GenericKernelFalcon *arg0, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { - kcrashcatEngineSyncBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), pBufDesc, offset, size); +// gkflcnReadEmem: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) +static void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnReadEmem(struct GenericKernelFalcon *arg_this, NvU64 offset, NvU64 size, void *pBuf) { + kcrashcatEngineReadEmem((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), offset, size, pBuf); } -static NvU32 __nvoc_thunk_KernelFalcon_gkflcnRegRead(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 offset) { - return kflcnRegRead(pGpu, (struct KernelFalcon *)(((unsigned char *)pKernelFlcn) + __nvoc_rtti_GenericKernelFalcon_KernelFalcon.offset), offset); +// gkflcnGetScratchOffsets: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) +static const NvU32 * __nvoc_up_thunk_KernelCrashCatEngine_gkflcnGetScratchOffsets(struct GenericKernelFalcon *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { + return kcrashcatEngineGetScratchOffsets((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), scratchGroupId); } -static void __nvoc_thunk_KernelCrashCatEngine_gkflcnUnmapBufferDescriptor(struct GenericKernelFalcon *arg0, CrashCatBufferDescriptor *pBufDesc) { - kcrashcatEngineUnmapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), pBufDesc); +// gkflcnGetWFL0Offset: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) +static NvU32 __nvoc_up_thunk_KernelCrashCatEngine_gkflcnGetWFL0Offset(struct GenericKernelFalcon *arg_this) { + return kcrashcatEngineGetWFL0Offset((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset)); } -static NvU32 __nvoc_thunk_IntrService_gkflcnServiceInterrupt(struct OBJGPU *pGpu, struct GenericKernelFalcon *pIntrService, IntrServiceServiceInterruptArguments *pParams) { - return intrservServiceInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_GenericKernelFalcon_IntrService.offset), pParams); +// gkflcnClearInterrupt: virtual inherited (intrserv) base (intrserv) +static NvBool __nvoc_up_thunk_IntrService_gkflcnClearInterrupt(struct OBJGPU *pGpu, struct GenericKernelFalcon *pIntrService, IntrServiceClearInterruptArguments *pParams) { + return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_GenericKernelFalcon_IntrService.offset), pParams); } -static void __nvoc_thunk_KernelCrashCatEngine_gkflcnReadDmem(struct GenericKernelFalcon *arg0, NvU32 offset, NvU32 size, void *pBuf) { - kcrashcatEngineReadDmem((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), offset, size, pBuf); +// gkflcnServiceInterrupt: virtual inherited (intrserv) base (intrserv) +static NvU32 __nvoc_up_thunk_IntrService_gkflcnServiceInterrupt(struct OBJGPU *pGpu, struct GenericKernelFalcon *pIntrService, IntrServiceServiceInterruptArguments *pParams) { + return intrservServiceInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_GenericKernelFalcon_IntrService.offset), pParams); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_GenericKernelFalcon = { /*numEntries=*/ 0, @@ -702,57 +764,79 @@ NV_STATUS __nvoc_ctor_GenericKernelFalcon(GenericKernelFalcon *pThis, RmHalspecO return status; } +// Vtable initialization static void __nvoc_init_funcTable_GenericKernelFalcon_1(GenericKernelFalcon *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // gkflcnResetHw -- virtual override (kflcn) base (kflcn) pThis->__gkflcnResetHw__ = &gkflcnResetHw_IMPL; + pThis->__nvoc_base_KernelFalcon.__kflcnResetHw__ = &__nvoc_down_thunk_GenericKernelFalcon_kflcnResetHw; + // gkflcnRegisterIntrService -- virtual override (intrserv) base (intrserv) pThis->__gkflcnRegisterIntrService__ = &gkflcnRegisterIntrService_IMPL; + pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_GenericKernelFalcon_intrservRegisterIntrService; + // gkflcnServiceNotificationInterrupt -- virtual override (intrserv) base (intrserv) pThis->__gkflcnServiceNotificationInterrupt__ = &gkflcnServiceNotificationInterrupt_IMPL; + pThis->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_down_thunk_GenericKernelFalcon_intrservServiceNotificationInterrupt; - pThis->__nvoc_base_KernelFalcon.__kflcnResetHw__ = &__nvoc_thunk_GenericKernelFalcon_kflcnResetHw; + // gkflcnRegRead -- virtual halified (2 hals) inherited (kflcn) base (kflcn) body + pThis->__gkflcnRegRead__ = &__nvoc_up_thunk_KernelFalcon_gkflcnRegRead; - pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_thunk_GenericKernelFalcon_intrservRegisterIntrService; + // gkflcnRegWrite -- virtual halified (2 hals) inherited (kflcn) base (kflcn) body + pThis->__gkflcnRegWrite__ = &__nvoc_up_thunk_KernelFalcon_gkflcnRegWrite; - pThis->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_thunk_GenericKernelFalcon_intrservServiceNotificationInterrupt; + // gkflcnMaskDmemAddr -- virtual halified (3 hals) inherited (kflcn) base (kflcn) body + pThis->__gkflcnMaskDmemAddr__ = &__nvoc_up_thunk_KernelFalcon_gkflcnMaskDmemAddr; - pThis->__gkflcnReadEmem__ = &__nvoc_thunk_KernelCrashCatEngine_gkflcnReadEmem; + // gkflcnConfigured -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__gkflcnConfigured__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnConfigured; - pThis->__gkflcnGetWFL0Offset__ = &__nvoc_thunk_KernelCrashCatEngine_gkflcnGetWFL0Offset; + // gkflcnUnload -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__gkflcnUnload__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnUnload; - pThis->__gkflcnUnload__ = &__nvoc_thunk_KernelCrashCatEngine_gkflcnUnload; + // gkflcnVprintf -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__gkflcnVprintf__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnVprintf; - pThis->__gkflcnConfigured__ = &__nvoc_thunk_KernelCrashCatEngine_gkflcnConfigured; + // gkflcnPriRead -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__gkflcnPriRead__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnPriRead; - pThis->__gkflcnPriRead__ = &__nvoc_thunk_KernelCrashCatEngine_gkflcnPriRead; + // gkflcnPriWrite -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__gkflcnPriWrite__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnPriWrite; - pThis->__gkflcnGetScratchOffsets__ = &__nvoc_thunk_KernelCrashCatEngine_gkflcnGetScratchOffsets; + // gkflcnMapBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__gkflcnMapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnMapBufferDescriptor; - pThis->__gkflcnRegWrite__ = &__nvoc_thunk_KernelFalcon_gkflcnRegWrite; + // gkflcnUnmapBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__gkflcnUnmapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnUnmapBufferDescriptor; - pThis->__gkflcnMaskDmemAddr__ = &__nvoc_thunk_KernelFalcon_gkflcnMaskDmemAddr; + // gkflcnSyncBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__gkflcnSyncBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnSyncBufferDescriptor; - pThis->__gkflcnVprintf__ = &__nvoc_thunk_KernelCrashCatEngine_gkflcnVprintf; + // gkflcnReadDmem -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + pThis->__gkflcnReadDmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnReadDmem; - pThis->__gkflcnClearInterrupt__ = &__nvoc_thunk_IntrService_gkflcnClearInterrupt; + // gkflcnReadEmem -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + pThis->__gkflcnReadEmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnReadEmem; - pThis->__gkflcnPriWrite__ = &__nvoc_thunk_KernelCrashCatEngine_gkflcnPriWrite; + // gkflcnGetScratchOffsets -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + pThis->__gkflcnGetScratchOffsets__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnGetScratchOffsets; - pThis->__gkflcnMapBufferDescriptor__ = &__nvoc_thunk_KernelCrashCatEngine_gkflcnMapBufferDescriptor; + // gkflcnGetWFL0Offset -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + pThis->__gkflcnGetWFL0Offset__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnGetWFL0Offset; - pThis->__gkflcnSyncBufferDescriptor__ = &__nvoc_thunk_KernelCrashCatEngine_gkflcnSyncBufferDescriptor; + // gkflcnClearInterrupt -- virtual inherited (intrserv) base (intrserv) + pThis->__gkflcnClearInterrupt__ = &__nvoc_up_thunk_IntrService_gkflcnClearInterrupt; - pThis->__gkflcnRegRead__ = &__nvoc_thunk_KernelFalcon_gkflcnRegRead; + // gkflcnServiceInterrupt -- virtual inherited (intrserv) base (intrserv) + pThis->__gkflcnServiceInterrupt__ = &__nvoc_up_thunk_IntrService_gkflcnServiceInterrupt; +} // End __nvoc_init_funcTable_GenericKernelFalcon_1 with approximately 27 basic block(s). - pThis->__gkflcnUnmapBufferDescriptor__ = &__nvoc_thunk_KernelCrashCatEngine_gkflcnUnmapBufferDescriptor; - - pThis->__gkflcnServiceInterrupt__ = &__nvoc_thunk_IntrService_gkflcnServiceInterrupt; - - pThis->__gkflcnReadDmem__ = &__nvoc_thunk_KernelCrashCatEngine_gkflcnReadDmem; -} +// Initialize vtable(s) for 20 virtual method(s). void __nvoc_init_funcTable_GenericKernelFalcon(GenericKernelFalcon *pThis) { + + // Initialize vtable(s) with 20 per-object function pointer(s). __nvoc_init_funcTable_GenericKernelFalcon_1(pThis); } diff --git a/src/nvidia/generated/g_kernel_falcon_nvoc.h b/src/nvidia/generated/g_kernel_falcon_nvoc.h index d13fad51e9..07c22ce9f6 100644 --- a/src/nvidia/generated/g_kernel_falcon_nvoc.h +++ b/src/nvidia/generated/g_kernel_falcon_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_FALCON_NVOC_H_ #define _G_KERNEL_FALCON_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -34,6 +41,7 @@ extern "C" { * interfaces. */ +#pragma once #include "g_kernel_falcon_nvoc.h" #ifndef KERNEL_FALCON_H @@ -44,6 +52,7 @@ extern "C" { #include "gpu/falcon/kernel_crashcat_engine.h" #include "gpu/intr/intr_service.h" + struct KernelChannel; #ifndef __NVOC_CLASS_KernelChannel_TYPEDEF__ @@ -85,44 +94,55 @@ typedef struct KernelFalconEngineConfig { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelFalcon { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct KernelCrashCatEngine __nvoc_base_KernelCrashCatEngine; - struct CrashCatEngine *__nvoc_pbase_CrashCatEngine; - struct KernelCrashCatEngine *__nvoc_pbase_KernelCrashCatEngine; - struct KernelFalcon *__nvoc_pbase_KernelFalcon; - NvU32 (*__kflcnRegRead__)(struct OBJGPU *, struct KernelFalcon *, NvU32); - void (*__kflcnRegWrite__)(struct OBJGPU *, struct KernelFalcon *, NvU32, NvU32); - NvU32 (*__kflcnRiscvRegRead__)(struct OBJGPU *, struct KernelFalcon *, NvU32); - void (*__kflcnRiscvRegWrite__)(struct OBJGPU *, struct KernelFalcon *, NvU32, NvU32); - NvBool (*__kflcnIsRiscvCpuEnabled__)(struct OBJGPU *, struct KernelFalcon *); - NvBool (*__kflcnIsRiscvActive__)(struct OBJGPU *, struct KernelFalcon *); - void (*__kflcnRiscvProgramBcr__)(struct OBJGPU *, struct KernelFalcon *, NvBool); - void (*__kflcnSwitchToFalcon__)(struct OBJGPU *, struct KernelFalcon *); - NV_STATUS (*__kflcnResetHw__)(struct OBJGPU *, struct KernelFalcon *); - void (*__kflcnReset__)(struct OBJGPU *, struct KernelFalcon *); - void (*__kflcnResetIntoRiscv__)(struct OBJGPU *, struct KernelFalcon *); - void (*__kflcnStartCpu__)(struct OBJGPU *, struct KernelFalcon *); - void (*__kflcnDisableCtxReq__)(struct OBJGPU *, struct KernelFalcon *); - NV_STATUS (*__kflcnPreResetWait__)(struct OBJGPU *, struct KernelFalcon *); - NV_STATUS (*__kflcnWaitForResetToFinish__)(struct OBJGPU *, struct KernelFalcon *); - NV_STATUS (*__kflcnWaitForHalt__)(struct OBJGPU *, struct KernelFalcon *, NvU32, NvU32); - NvU32 (*__kflcnReadIntrStatus__)(struct OBJGPU *, struct KernelFalcon *); - void (*__kflcnIntrRetrigger__)(struct OBJGPU *, struct KernelFalcon *); - NvU32 (*__kflcnMaskImemAddr__)(struct OBJGPU *, struct KernelFalcon *, NvU32); - NvU32 (*__kflcnMaskDmemAddr__)(struct OBJGPU *, struct KernelFalcon *, NvU32); - void (*__kflcnReadEmem__)(struct KernelFalcon *, NvU64, NvU64, void *); - NvU32 (*__kflcnGetWFL0Offset__)(struct KernelFalcon *); - const NvU32 *(*__kflcnGetScratchOffsets__)(struct KernelFalcon *, NV_CRASHCAT_SCRATCH_GROUP_ID); - void (*__kflcnUnload__)(struct KernelFalcon *); - NvBool (*__kflcnConfigured__)(struct KernelFalcon *); - NvU32 (*__kflcnPriRead__)(struct KernelFalcon *, NvU32); - void (*__kflcnVprintf__)(struct KernelFalcon *, NvBool, const char *, va_list); - void (*__kflcnPriWrite__)(struct KernelFalcon *, NvU32, NvU32); - void (*__kflcnSyncBufferDescriptor__)(struct KernelFalcon *, CrashCatBufferDescriptor *, NvU32, NvU32); - void *(*__kflcnMapBufferDescriptor__)(struct KernelFalcon *, CrashCatBufferDescriptor *); - void (*__kflcnUnmapBufferDescriptor__)(struct KernelFalcon *, CrashCatBufferDescriptor *); - void (*__kflcnReadDmem__)(struct KernelFalcon *, NvU32, NvU32, void *); + + // Ancestor object pointers for `staticCast` feature + struct CrashCatEngine *__nvoc_pbase_CrashCatEngine; // crashcatEngine super^2 + struct KernelCrashCatEngine *__nvoc_pbase_KernelCrashCatEngine; // kcrashcatEngine super + struct KernelFalcon *__nvoc_pbase_KernelFalcon; // kflcn + + // Vtable with 32 per-object function pointers + NvU32 (*__kflcnRegRead__)(struct OBJGPU *, struct KernelFalcon * /*this*/, NvU32); // virtual halified (2 hals) override (kcrashcatEngine) base (kcrashcatEngine) body + void (*__kflcnRegWrite__)(struct OBJGPU *, struct KernelFalcon * /*this*/, NvU32, NvU32); // virtual halified (2 hals) override (kcrashcatEngine) base (kcrashcatEngine) body + NvU32 (*__kflcnRiscvRegRead__)(struct OBJGPU *, struct KernelFalcon * /*this*/, NvU32); // halified (2 hals) body + void (*__kflcnRiscvRegWrite__)(struct OBJGPU *, struct KernelFalcon * /*this*/, NvU32, NvU32); // halified (2 hals) body + NvBool (*__kflcnIsRiscvCpuEnabled__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (2 hals) body + NvBool (*__kflcnIsRiscvActive__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (3 hals) body + void (*__kflcnRiscvProgramBcr__)(struct OBJGPU *, struct KernelFalcon * /*this*/, NvBool); // halified (3 hals) body + void (*__kflcnSwitchToFalcon__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (3 hals) body + NV_STATUS (*__kflcnResetHw__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // pure virtual + void (*__kflcnReset__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (2 hals) body + void (*__kflcnResetIntoRiscv__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (3 hals) body + void (*__kflcnStartCpu__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (2 hals) body + void (*__kflcnDisableCtxReq__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (2 hals) body + NV_STATUS (*__kflcnPreResetWait__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (3 hals) body + NV_STATUS (*__kflcnWaitForResetToFinish__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (3 hals) body + NV_STATUS (*__kflcnWaitForHalt__)(struct OBJGPU *, struct KernelFalcon * /*this*/, NvU32, NvU32); // halified (2 hals) body + NvU32 (*__kflcnReadIntrStatus__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (3 hals) body + void (*__kflcnIntrRetrigger__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (3 hals) body + NvU32 (*__kflcnMaskImemAddr__)(struct OBJGPU *, struct KernelFalcon * /*this*/, NvU32); // halified (3 hals) body + NvU32 (*__kflcnMaskDmemAddr__)(struct OBJGPU *, struct KernelFalcon * /*this*/, NvU32); // virtual halified (3 hals) override (kcrashcatEngine) base (kcrashcatEngine) body + NvBool (*__kflcnConfigured__)(struct KernelFalcon * /*this*/); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + void (*__kflcnUnload__)(struct KernelFalcon * /*this*/); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + void (*__kflcnVprintf__)(struct KernelFalcon * /*this*/, NvBool, const char *, va_list); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + NvU32 (*__kflcnPriRead__)(struct KernelFalcon * /*this*/, NvU32); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + void (*__kflcnPriWrite__)(struct KernelFalcon * /*this*/, NvU32, NvU32); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + void * (*__kflcnMapBufferDescriptor__)(struct KernelFalcon * /*this*/, CrashCatBufferDescriptor *); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + void (*__kflcnUnmapBufferDescriptor__)(struct KernelFalcon * /*this*/, CrashCatBufferDescriptor *); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + void (*__kflcnSyncBufferDescriptor__)(struct KernelFalcon * /*this*/, CrashCatBufferDescriptor *, NvU32, NvU32); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + void (*__kflcnReadDmem__)(struct KernelFalcon * /*this*/, NvU32, NvU32, void *); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + void (*__kflcnReadEmem__)(struct KernelFalcon * /*this*/, NvU64, NvU64, void *); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + const NvU32 * (*__kflcnGetScratchOffsets__)(struct KernelFalcon * /*this*/, NV_CRASHCAT_SCRATCH_GROUP_ID); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + NvU32 (*__kflcnGetWFL0Offset__)(struct KernelFalcon * /*this*/); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + + // Data members NvU32 registerBase; NvU32 riscvRegisterBase; NvU32 fbifBase; @@ -144,6 +164,7 @@ typedef struct KernelFalcon KernelFalcon; #define __nvoc_class_id_KernelFalcon 0xb6b1af #endif /* __nvoc_class_id_KernelFalcon */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelFalcon; #define __staticCast_KernelFalcon(pThis) \ @@ -156,114 +177,261 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelFalcon; ((KernelFalcon*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelFalcon))) #endif //__nvoc_kernel_falcon_h_disabled - NV_STATUS __nvoc_objCreateDynamic_KernelFalcon(KernelFalcon**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_KernelFalcon(KernelFalcon**, Dynamic*, NvU32); #define __objCreate_KernelFalcon(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelFalcon((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define kflcnRegRead_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnRegRead__ #define kflcnRegRead(pGpu, pKernelFlcn, offset) kflcnRegRead_DISPATCH(pGpu, pKernelFlcn, offset) #define kflcnRegRead_HAL(pGpu, pKernelFlcn, offset) kflcnRegRead_DISPATCH(pGpu, pKernelFlcn, offset) +#define kflcnRegWrite_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnRegWrite__ #define kflcnRegWrite(pGpu, pKernelFlcn, offset, data) kflcnRegWrite_DISPATCH(pGpu, pKernelFlcn, offset, data) #define kflcnRegWrite_HAL(pGpu, pKernelFlcn, offset, data) kflcnRegWrite_DISPATCH(pGpu, pKernelFlcn, offset, data) +#define kflcnRiscvRegRead_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnRiscvRegRead__ #define kflcnRiscvRegRead(pGpu, pKernelFlcn, offset) kflcnRiscvRegRead_DISPATCH(pGpu, pKernelFlcn, offset) #define kflcnRiscvRegRead_HAL(pGpu, pKernelFlcn, offset) kflcnRiscvRegRead_DISPATCH(pGpu, pKernelFlcn, offset) +#define kflcnRiscvRegWrite_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnRiscvRegWrite__ #define kflcnRiscvRegWrite(pGpu, pKernelFlcn, offset, data) kflcnRiscvRegWrite_DISPATCH(pGpu, pKernelFlcn, offset, data) #define kflcnRiscvRegWrite_HAL(pGpu, pKernelFlcn, offset, data) kflcnRiscvRegWrite_DISPATCH(pGpu, pKernelFlcn, offset, data) +#define kflcnIsRiscvCpuEnabled_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnIsRiscvCpuEnabled__ #define kflcnIsRiscvCpuEnabled(pGpu, pKernelFlcn) kflcnIsRiscvCpuEnabled_DISPATCH(pGpu, pKernelFlcn) #define kflcnIsRiscvCpuEnabled_HAL(pGpu, pKernelFlcn) kflcnIsRiscvCpuEnabled_DISPATCH(pGpu, pKernelFlcn) +#define kflcnIsRiscvActive_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnIsRiscvActive__ #define kflcnIsRiscvActive(pGpu, pKernelFlcn) kflcnIsRiscvActive_DISPATCH(pGpu, pKernelFlcn) #define kflcnIsRiscvActive_HAL(pGpu, pKernelFlcn) kflcnIsRiscvActive_DISPATCH(pGpu, pKernelFlcn) +#define kflcnRiscvProgramBcr_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnRiscvProgramBcr__ #define kflcnRiscvProgramBcr(pGpu, pKernelFlcn, bBRFetch) kflcnRiscvProgramBcr_DISPATCH(pGpu, pKernelFlcn, bBRFetch) #define kflcnRiscvProgramBcr_HAL(pGpu, pKernelFlcn, bBRFetch) kflcnRiscvProgramBcr_DISPATCH(pGpu, pKernelFlcn, bBRFetch) +#define kflcnSwitchToFalcon_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnSwitchToFalcon__ #define kflcnSwitchToFalcon(pGpu, pKernelFlcn) kflcnSwitchToFalcon_DISPATCH(pGpu, pKernelFlcn) #define kflcnSwitchToFalcon_HAL(pGpu, pKernelFlcn) kflcnSwitchToFalcon_DISPATCH(pGpu, pKernelFlcn) +#define kflcnResetHw_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnResetHw__ #define kflcnResetHw(pGpu, pKernelFlcn) kflcnResetHw_DISPATCH(pGpu, pKernelFlcn) +#define kflcnReset_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnReset__ #define kflcnReset(pGpu, pKernelFlcn) kflcnReset_DISPATCH(pGpu, pKernelFlcn) #define kflcnReset_HAL(pGpu, pKernelFlcn) kflcnReset_DISPATCH(pGpu, pKernelFlcn) +#define kflcnResetIntoRiscv_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnResetIntoRiscv__ #define kflcnResetIntoRiscv(pGpu, pKernelFlcn) kflcnResetIntoRiscv_DISPATCH(pGpu, pKernelFlcn) #define kflcnResetIntoRiscv_HAL(pGpu, pKernelFlcn) kflcnResetIntoRiscv_DISPATCH(pGpu, pKernelFlcn) +#define kflcnStartCpu_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnStartCpu__ #define kflcnStartCpu(pGpu, pKernelFlcn) kflcnStartCpu_DISPATCH(pGpu, pKernelFlcn) #define kflcnStartCpu_HAL(pGpu, pKernelFlcn) kflcnStartCpu_DISPATCH(pGpu, pKernelFlcn) +#define kflcnDisableCtxReq_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnDisableCtxReq__ #define kflcnDisableCtxReq(pGpu, pKernelFlcn) kflcnDisableCtxReq_DISPATCH(pGpu, pKernelFlcn) #define kflcnDisableCtxReq_HAL(pGpu, pKernelFlcn) kflcnDisableCtxReq_DISPATCH(pGpu, pKernelFlcn) +#define kflcnPreResetWait_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnPreResetWait__ #define kflcnPreResetWait(pGpu, pKernelFlcn) kflcnPreResetWait_DISPATCH(pGpu, pKernelFlcn) #define kflcnPreResetWait_HAL(pGpu, pKernelFlcn) kflcnPreResetWait_DISPATCH(pGpu, pKernelFlcn) +#define kflcnWaitForResetToFinish_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnWaitForResetToFinish__ #define kflcnWaitForResetToFinish(pGpu, pKernelFlcn) kflcnWaitForResetToFinish_DISPATCH(pGpu, pKernelFlcn) #define kflcnWaitForResetToFinish_HAL(pGpu, pKernelFlcn) kflcnWaitForResetToFinish_DISPATCH(pGpu, pKernelFlcn) +#define kflcnWaitForHalt_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnWaitForHalt__ #define kflcnWaitForHalt(pGpu, pKernelFlcn, timeoutUs, flags) kflcnWaitForHalt_DISPATCH(pGpu, pKernelFlcn, timeoutUs, flags) #define kflcnWaitForHalt_HAL(pGpu, pKernelFlcn, timeoutUs, flags) kflcnWaitForHalt_DISPATCH(pGpu, pKernelFlcn, timeoutUs, flags) +#define kflcnReadIntrStatus_FNPTR(pKerneFlcn) pKerneFlcn->__kflcnReadIntrStatus__ #define kflcnReadIntrStatus(pGpu, pKerneFlcn) kflcnReadIntrStatus_DISPATCH(pGpu, pKerneFlcn) #define kflcnReadIntrStatus_HAL(pGpu, pKerneFlcn) kflcnReadIntrStatus_DISPATCH(pGpu, pKerneFlcn) +#define kflcnIntrRetrigger_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnIntrRetrigger__ #define kflcnIntrRetrigger(pGpu, pKernelFlcn) kflcnIntrRetrigger_DISPATCH(pGpu, pKernelFlcn) #define kflcnIntrRetrigger_HAL(pGpu, pKernelFlcn) kflcnIntrRetrigger_DISPATCH(pGpu, pKernelFlcn) +#define kflcnMaskImemAddr_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnMaskImemAddr__ #define kflcnMaskImemAddr(pGpu, pKernelFlcn, addr) kflcnMaskImemAddr_DISPATCH(pGpu, pKernelFlcn, addr) #define kflcnMaskImemAddr_HAL(pGpu, pKernelFlcn, addr) kflcnMaskImemAddr_DISPATCH(pGpu, pKernelFlcn, addr) +#define kflcnMaskDmemAddr_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnMaskDmemAddr__ #define kflcnMaskDmemAddr(pGpu, pKernelFlcn, addr) kflcnMaskDmemAddr_DISPATCH(pGpu, pKernelFlcn, addr) #define kflcnMaskDmemAddr_HAL(pGpu, pKernelFlcn, addr) kflcnMaskDmemAddr_DISPATCH(pGpu, pKernelFlcn, addr) -#define kflcnReadEmem(arg0, offset, size, pBuf) kflcnReadEmem_DISPATCH(arg0, offset, size, pBuf) -#define kflcnGetWFL0Offset(arg0) kflcnGetWFL0Offset_DISPATCH(arg0) -#define kflcnGetScratchOffsets(arg0, scratchGroupId) kflcnGetScratchOffsets_DISPATCH(arg0, scratchGroupId) -#define kflcnUnload(arg0) kflcnUnload_DISPATCH(arg0) -#define kflcnConfigured(arg0) kflcnConfigured_DISPATCH(arg0) -#define kflcnPriRead(arg0, offset) kflcnPriRead_DISPATCH(arg0, offset) -#define kflcnVprintf(arg0, bReportStart, fmt, args) kflcnVprintf_DISPATCH(arg0, bReportStart, fmt, args) -#define kflcnPriWrite(arg0, offset, data) kflcnPriWrite_DISPATCH(arg0, offset, data) -#define kflcnSyncBufferDescriptor(arg0, pBufDesc, offset, size) kflcnSyncBufferDescriptor_DISPATCH(arg0, pBufDesc, offset, size) -#define kflcnMapBufferDescriptor(arg0, pBufDesc) kflcnMapBufferDescriptor_DISPATCH(arg0, pBufDesc) -#define kflcnUnmapBufferDescriptor(arg0, pBufDesc) kflcnUnmapBufferDescriptor_DISPATCH(arg0, pBufDesc) -#define kflcnReadDmem(arg0, offset, size, pBuf) kflcnReadDmem_DISPATCH(arg0, offset, size, pBuf) +#define kflcnConfigured_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineConfigured__ +#define kflcnConfigured(arg_this) kflcnConfigured_DISPATCH(arg_this) +#define kflcnUnload_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineUnload__ +#define kflcnUnload(arg_this) kflcnUnload_DISPATCH(arg_this) +#define kflcnVprintf_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineVprintf__ +#define kflcnVprintf(arg_this, bReportStart, fmt, args) kflcnVprintf_DISPATCH(arg_this, bReportStart, fmt, args) +#define kflcnPriRead_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEnginePriRead__ +#define kflcnPriRead(arg_this, offset) kflcnPriRead_DISPATCH(arg_this, offset) +#define kflcnPriWrite_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEnginePriWrite__ +#define kflcnPriWrite(arg_this, offset, data) kflcnPriWrite_DISPATCH(arg_this, offset, data) +#define kflcnMapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineMapBufferDescriptor__ +#define kflcnMapBufferDescriptor(arg_this, pBufDesc) kflcnMapBufferDescriptor_DISPATCH(arg_this, pBufDesc) +#define kflcnUnmapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineUnmapBufferDescriptor__ +#define kflcnUnmapBufferDescriptor(arg_this, pBufDesc) kflcnUnmapBufferDescriptor_DISPATCH(arg_this, pBufDesc) +#define kflcnSyncBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineSyncBufferDescriptor__ +#define kflcnSyncBufferDescriptor(arg_this, pBufDesc, offset, size) kflcnSyncBufferDescriptor_DISPATCH(arg_this, pBufDesc, offset, size) +#define kflcnReadDmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineReadDmem__ +#define kflcnReadDmem(arg_this, offset, size, pBuf) kflcnReadDmem_DISPATCH(arg_this, offset, size, pBuf) +#define kflcnReadDmem_HAL(arg_this, offset, size, pBuf) kflcnReadDmem_DISPATCH(arg_this, offset, size, pBuf) +#define kflcnReadEmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineReadEmem__ +#define kflcnReadEmem(arg_this, offset, size, pBuf) kflcnReadEmem_DISPATCH(arg_this, offset, size, pBuf) +#define kflcnReadEmem_HAL(arg_this, offset, size, pBuf) kflcnReadEmem_DISPATCH(arg_this, offset, size, pBuf) +#define kflcnGetScratchOffsets_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineGetScratchOffsets__ +#define kflcnGetScratchOffsets(arg_this, scratchGroupId) kflcnGetScratchOffsets_DISPATCH(arg_this, scratchGroupId) +#define kflcnGetScratchOffsets_HAL(arg_this, scratchGroupId) kflcnGetScratchOffsets_DISPATCH(arg_this, scratchGroupId) +#define kflcnGetWFL0Offset_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineGetWFL0Offset__ +#define kflcnGetWFL0Offset(arg_this) kflcnGetWFL0Offset_DISPATCH(arg_this) +#define kflcnGetWFL0Offset_HAL(arg_this) kflcnGetWFL0Offset_DISPATCH(arg_this) + +// Dispatch functions +static inline NvU32 kflcnRegRead_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 offset) { + return pKernelFlcn->__kflcnRegRead__(pGpu, pKernelFlcn, offset); +} + +static inline void kflcnRegWrite_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 offset, NvU32 data) { + pKernelFlcn->__kflcnRegWrite__(pGpu, pKernelFlcn, offset, data); +} + +static inline NvU32 kflcnRiscvRegRead_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 offset) { + return pKernelFlcn->__kflcnRiscvRegRead__(pGpu, pKernelFlcn, offset); +} + +static inline void kflcnRiscvRegWrite_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 offset, NvU32 data) { + pKernelFlcn->__kflcnRiscvRegWrite__(pGpu, pKernelFlcn, offset, data); +} + +static inline NvBool kflcnIsRiscvCpuEnabled_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { + return pKernelFlcn->__kflcnIsRiscvCpuEnabled__(pGpu, pKernelFlcn); +} + +static inline NvBool kflcnIsRiscvActive_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { + return pKernelFlcn->__kflcnIsRiscvActive__(pGpu, pKernelFlcn); +} + +static inline void kflcnRiscvProgramBcr_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvBool bBRFetch) { + pKernelFlcn->__kflcnRiscvProgramBcr__(pGpu, pKernelFlcn, bBRFetch); +} + +static inline void kflcnSwitchToFalcon_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { + pKernelFlcn->__kflcnSwitchToFalcon__(pGpu, pKernelFlcn); +} + +static inline NV_STATUS kflcnResetHw_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { + return pKernelFlcn->__kflcnResetHw__(pGpu, pKernelFlcn); +} + +static inline void kflcnReset_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { + pKernelFlcn->__kflcnReset__(pGpu, pKernelFlcn); +} + +static inline void kflcnResetIntoRiscv_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { + pKernelFlcn->__kflcnResetIntoRiscv__(pGpu, pKernelFlcn); +} + +static inline void kflcnStartCpu_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { + pKernelFlcn->__kflcnStartCpu__(pGpu, pKernelFlcn); +} + +static inline void kflcnDisableCtxReq_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { + pKernelFlcn->__kflcnDisableCtxReq__(pGpu, pKernelFlcn); +} + +static inline NV_STATUS kflcnPreResetWait_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { + return pKernelFlcn->__kflcnPreResetWait__(pGpu, pKernelFlcn); +} + +static inline NV_STATUS kflcnWaitForResetToFinish_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { + return pKernelFlcn->__kflcnWaitForResetToFinish__(pGpu, pKernelFlcn); +} + +static inline NV_STATUS kflcnWaitForHalt_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 timeoutUs, NvU32 flags) { + return pKernelFlcn->__kflcnWaitForHalt__(pGpu, pKernelFlcn, timeoutUs, flags); +} + +static inline NvU32 kflcnReadIntrStatus_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKerneFlcn) { + return pKerneFlcn->__kflcnReadIntrStatus__(pGpu, pKerneFlcn); +} + +static inline void kflcnIntrRetrigger_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { + pKernelFlcn->__kflcnIntrRetrigger__(pGpu, pKernelFlcn); +} + +static inline NvU32 kflcnMaskImemAddr_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 addr) { + return pKernelFlcn->__kflcnMaskImemAddr__(pGpu, pKernelFlcn, addr); +} + +static inline NvU32 kflcnMaskDmemAddr_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 addr) { + return pKernelFlcn->__kflcnMaskDmemAddr__(pGpu, pKernelFlcn, addr); +} + +static inline NvBool kflcnConfigured_DISPATCH(struct KernelFalcon *arg_this) { + return arg_this->__kflcnConfigured__(arg_this); +} + +static inline void kflcnUnload_DISPATCH(struct KernelFalcon *arg_this) { + arg_this->__kflcnUnload__(arg_this); +} + +static inline void kflcnVprintf_DISPATCH(struct KernelFalcon *arg_this, NvBool bReportStart, const char *fmt, va_list args) { + arg_this->__kflcnVprintf__(arg_this, bReportStart, fmt, args); +} + +static inline NvU32 kflcnPriRead_DISPATCH(struct KernelFalcon *arg_this, NvU32 offset) { + return arg_this->__kflcnPriRead__(arg_this, offset); +} + +static inline void kflcnPriWrite_DISPATCH(struct KernelFalcon *arg_this, NvU32 offset, NvU32 data) { + arg_this->__kflcnPriWrite__(arg_this, offset, data); +} + +static inline void * kflcnMapBufferDescriptor_DISPATCH(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc) { + return arg_this->__kflcnMapBufferDescriptor__(arg_this, pBufDesc); +} + +static inline void kflcnUnmapBufferDescriptor_DISPATCH(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc) { + arg_this->__kflcnUnmapBufferDescriptor__(arg_this, pBufDesc); +} + +static inline void kflcnSyncBufferDescriptor_DISPATCH(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { + arg_this->__kflcnSyncBufferDescriptor__(arg_this, pBufDesc, offset, size); +} + +static inline void kflcnReadDmem_DISPATCH(struct KernelFalcon *arg_this, NvU32 offset, NvU32 size, void *pBuf) { + arg_this->__kflcnReadDmem__(arg_this, offset, size, pBuf); +} + +static inline void kflcnReadEmem_DISPATCH(struct KernelFalcon *arg_this, NvU64 offset, NvU64 size, void *pBuf) { + arg_this->__kflcnReadEmem__(arg_this, offset, size, pBuf); +} + +static inline const NvU32 * kflcnGetScratchOffsets_DISPATCH(struct KernelFalcon *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { + return arg_this->__kflcnGetScratchOffsets__(arg_this, scratchGroupId); +} + +static inline NvU32 kflcnGetWFL0Offset_DISPATCH(struct KernelFalcon *arg_this) { + return arg_this->__kflcnGetWFL0Offset__(arg_this); +} + NvU32 kflcnRegRead_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 offset); static inline NvU32 kflcnRegRead_474d46(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 offset) { NV_ASSERT_OR_RETURN_PRECOMP(0, 0); } -static inline NvU32 kflcnRegRead_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 offset) { - return pKernelFlcn->__kflcnRegRead__(pGpu, pKernelFlcn, offset); -} - void kflcnRegWrite_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 offset, NvU32 data); static inline void kflcnRegWrite_f2d351(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 offset, NvU32 data) { NV_ASSERT_PRECOMP(0); } -static inline void kflcnRegWrite_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 offset, NvU32 data) { - pKernelFlcn->__kflcnRegWrite__(pGpu, pKernelFlcn, offset, data); -} - NvU32 kflcnRiscvRegRead_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 offset); static inline NvU32 kflcnRiscvRegRead_474d46(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 offset) { NV_ASSERT_OR_RETURN_PRECOMP(0, 0); } -static inline NvU32 kflcnRiscvRegRead_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 offset) { - return pKernelFlcn->__kflcnRiscvRegRead__(pGpu, pKernelFlcn, offset); -} - void kflcnRiscvRegWrite_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 offset, NvU32 data); static inline void kflcnRiscvRegWrite_f2d351(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 offset, NvU32 data) { NV_ASSERT_PRECOMP(0); } -static inline void kflcnRiscvRegWrite_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 offset, NvU32 data) { - pKernelFlcn->__kflcnRiscvRegWrite__(pGpu, pKernelFlcn, offset, data); -} - NvBool kflcnIsRiscvCpuEnabled_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn); static inline NvBool kflcnIsRiscvCpuEnabled_108313(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); } -static inline NvBool kflcnIsRiscvCpuEnabled_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { - return pKernelFlcn->__kflcnIsRiscvCpuEnabled__(pGpu, pKernelFlcn); -} - NvBool kflcnIsRiscvActive_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn); NvBool kflcnIsRiscvActive_GA10X(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn); @@ -272,20 +440,12 @@ static inline NvBool kflcnIsRiscvActive_108313(struct OBJGPU *pGpu, struct Kerne NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); } -static inline NvBool kflcnIsRiscvActive_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { - return pKernelFlcn->__kflcnIsRiscvActive__(pGpu, pKernelFlcn); -} - void kflcnRiscvProgramBcr_GA102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvBool bBRFetch); static inline void kflcnRiscvProgramBcr_f2d351(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvBool bBRFetch) { NV_ASSERT_PRECOMP(0); } -static inline void kflcnRiscvProgramBcr_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvBool bBRFetch) { - pKernelFlcn->__kflcnRiscvProgramBcr__(pGpu, pKernelFlcn, bBRFetch); -} - void kflcnSwitchToFalcon_GA10X(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn); static inline void kflcnSwitchToFalcon_b3696a(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { @@ -296,24 +456,12 @@ static inline void kflcnSwitchToFalcon_f2d351(struct OBJGPU *pGpu, struct Kernel NV_ASSERT_PRECOMP(0); } -static inline void kflcnSwitchToFalcon_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { - pKernelFlcn->__kflcnSwitchToFalcon__(pGpu, pKernelFlcn); -} - -static inline NV_STATUS kflcnResetHw_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { - return pKernelFlcn->__kflcnResetHw__(pGpu, pKernelFlcn); -} - void kflcnReset_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn); static inline void kflcnReset_f2d351(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { NV_ASSERT_PRECOMP(0); } -static inline void kflcnReset_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { - pKernelFlcn->__kflcnReset__(pGpu, pKernelFlcn); -} - void kflcnResetIntoRiscv_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn); void kflcnResetIntoRiscv_GA102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn); @@ -322,30 +470,18 @@ static inline void kflcnResetIntoRiscv_f2d351(struct OBJGPU *pGpu, struct Kernel NV_ASSERT_PRECOMP(0); } -static inline void kflcnResetIntoRiscv_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { - pKernelFlcn->__kflcnResetIntoRiscv__(pGpu, pKernelFlcn); -} - void kflcnStartCpu_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn); static inline void kflcnStartCpu_f2d351(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { NV_ASSERT_PRECOMP(0); } -static inline void kflcnStartCpu_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { - pKernelFlcn->__kflcnStartCpu__(pGpu, pKernelFlcn); -} - void kflcnDisableCtxReq_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn); static inline void kflcnDisableCtxReq_f2d351(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { NV_ASSERT_PRECOMP(0); } -static inline void kflcnDisableCtxReq_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { - pKernelFlcn->__kflcnDisableCtxReq__(pGpu, pKernelFlcn); -} - NV_STATUS kflcnPreResetWait_GA10X(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn); static inline NV_STATUS kflcnPreResetWait_56cd7a(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { @@ -356,10 +492,6 @@ static inline NV_STATUS kflcnPreResetWait_5baef9(struct OBJGPU *pGpu, struct Ker NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NV_STATUS kflcnPreResetWait_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { - return pKernelFlcn->__kflcnPreResetWait__(pGpu, pKernelFlcn); -} - NV_STATUS kflcnWaitForResetToFinish_GA102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn); NV_STATUS kflcnWaitForResetToFinish_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn); @@ -368,20 +500,12 @@ static inline NV_STATUS kflcnWaitForResetToFinish_5baef9(struct OBJGPU *pGpu, st NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NV_STATUS kflcnWaitForResetToFinish_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { - return pKernelFlcn->__kflcnWaitForResetToFinish__(pGpu, pKernelFlcn); -} - NV_STATUS kflcnWaitForHalt_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 timeoutUs, NvU32 flags); static inline NV_STATUS kflcnWaitForHalt_5baef9(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 timeoutUs, NvU32 flags) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NV_STATUS kflcnWaitForHalt_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 timeoutUs, NvU32 flags) { - return pKernelFlcn->__kflcnWaitForHalt__(pGpu, pKernelFlcn, timeoutUs, flags); -} - NvU32 kflcnReadIntrStatus_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKerneFlcn); NvU32 kflcnReadIntrStatus_GA102(struct OBJGPU *pGpu, struct KernelFalcon *pKerneFlcn); @@ -390,10 +514,6 @@ static inline NvU32 kflcnReadIntrStatus_474d46(struct OBJGPU *pGpu, struct Kerne NV_ASSERT_OR_RETURN_PRECOMP(0, 0); } -static inline NvU32 kflcnReadIntrStatus_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKerneFlcn) { - return pKerneFlcn->__kflcnReadIntrStatus__(pGpu, pKerneFlcn); -} - void kflcnIntrRetrigger_GA100(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn); static inline void kflcnIntrRetrigger_b3696a(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { @@ -404,10 +524,6 @@ static inline void kflcnIntrRetrigger_f2d351(struct OBJGPU *pGpu, struct KernelF NV_ASSERT_PRECOMP(0); } -static inline void kflcnIntrRetrigger_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { - pKernelFlcn->__kflcnIntrRetrigger__(pGpu, pKernelFlcn); -} - NvU32 kflcnMaskImemAddr_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 addr); NvU32 kflcnMaskImemAddr_GA100(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 addr); @@ -416,10 +532,6 @@ static inline NvU32 kflcnMaskImemAddr_474d46(struct OBJGPU *pGpu, struct KernelF NV_ASSERT_OR_RETURN_PRECOMP(0, 0); } -static inline NvU32 kflcnMaskImemAddr_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 addr) { - return pKernelFlcn->__kflcnMaskImemAddr__(pGpu, pKernelFlcn, addr); -} - NvU32 kflcnMaskDmemAddr_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 addr); NvU32 kflcnMaskDmemAddr_GA100(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 addr); @@ -428,58 +540,6 @@ static inline NvU32 kflcnMaskDmemAddr_474d46(struct OBJGPU *pGpu, struct KernelF NV_ASSERT_OR_RETURN_PRECOMP(0, 0); } -static inline NvU32 kflcnMaskDmemAddr_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 addr) { - return pKernelFlcn->__kflcnMaskDmemAddr__(pGpu, pKernelFlcn, addr); -} - -static inline void kflcnReadEmem_DISPATCH(struct KernelFalcon *arg0, NvU64 offset, NvU64 size, void *pBuf) { - arg0->__kflcnReadEmem__(arg0, offset, size, pBuf); -} - -static inline NvU32 kflcnGetWFL0Offset_DISPATCH(struct KernelFalcon *arg0) { - return arg0->__kflcnGetWFL0Offset__(arg0); -} - -static inline const NvU32 *kflcnGetScratchOffsets_DISPATCH(struct KernelFalcon *arg0, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { - return arg0->__kflcnGetScratchOffsets__(arg0, scratchGroupId); -} - -static inline void kflcnUnload_DISPATCH(struct KernelFalcon *arg0) { - arg0->__kflcnUnload__(arg0); -} - -static inline NvBool kflcnConfigured_DISPATCH(struct KernelFalcon *arg0) { - return arg0->__kflcnConfigured__(arg0); -} - -static inline NvU32 kflcnPriRead_DISPATCH(struct KernelFalcon *arg0, NvU32 offset) { - return arg0->__kflcnPriRead__(arg0, offset); -} - -static inline void kflcnVprintf_DISPATCH(struct KernelFalcon *arg0, NvBool bReportStart, const char *fmt, va_list args) { - arg0->__kflcnVprintf__(arg0, bReportStart, fmt, args); -} - -static inline void kflcnPriWrite_DISPATCH(struct KernelFalcon *arg0, NvU32 offset, NvU32 data) { - arg0->__kflcnPriWrite__(arg0, offset, data); -} - -static inline void kflcnSyncBufferDescriptor_DISPATCH(struct KernelFalcon *arg0, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { - arg0->__kflcnSyncBufferDescriptor__(arg0, pBufDesc, offset, size); -} - -static inline void *kflcnMapBufferDescriptor_DISPATCH(struct KernelFalcon *arg0, CrashCatBufferDescriptor *pBufDesc) { - return arg0->__kflcnMapBufferDescriptor__(arg0, pBufDesc); -} - -static inline void kflcnUnmapBufferDescriptor_DISPATCH(struct KernelFalcon *arg0, CrashCatBufferDescriptor *pBufDesc) { - arg0->__kflcnUnmapBufferDescriptor__(arg0, pBufDesc); -} - -static inline void kflcnReadDmem_DISPATCH(struct KernelFalcon *arg0, NvU32 offset, NvU32 size, void *pBuf) { - arg0->__kflcnReadDmem__(arg0, offset, size, pBuf); -} - void kflcnConfigureEngine_IMPL(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFalcon, KernelFalconEngineConfig *pFalconConfig); #ifdef __nvoc_kernel_falcon_h_disabled @@ -490,26 +550,26 @@ static inline void kflcnConfigureEngine(struct OBJGPU *pGpu, struct KernelFalcon #define kflcnConfigureEngine(pGpu, pKernelFalcon, pFalconConfig) kflcnConfigureEngine_IMPL(pGpu, pKernelFalcon, pFalconConfig) #endif //__nvoc_kernel_falcon_h_disabled -NV_STATUS kflcnAllocContext_IMPL(struct OBJGPU *arg0, struct KernelFalcon *arg1, struct KernelChannel *arg2, NvU32 arg3); +NV_STATUS kflcnAllocContext_IMPL(struct OBJGPU *arg1, struct KernelFalcon *arg2, struct KernelChannel *arg3, NvU32 arg4); #ifdef __nvoc_kernel_falcon_h_disabled -static inline NV_STATUS kflcnAllocContext(struct OBJGPU *arg0, struct KernelFalcon *arg1, struct KernelChannel *arg2, NvU32 arg3) { +static inline NV_STATUS kflcnAllocContext(struct OBJGPU *arg1, struct KernelFalcon *arg2, struct KernelChannel *arg3, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("KernelFalcon was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_falcon_h_disabled -#define kflcnAllocContext(arg0, arg1, arg2, arg3) kflcnAllocContext_IMPL(arg0, arg1, arg2, arg3) +#define kflcnAllocContext(arg1, arg2, arg3, arg4) kflcnAllocContext_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_falcon_h_disabled -NV_STATUS kflcnFreeContext_IMPL(struct OBJGPU *arg0, struct KernelFalcon *arg1, struct KernelChannel *arg2, NvU32 arg3); +NV_STATUS kflcnFreeContext_IMPL(struct OBJGPU *arg1, struct KernelFalcon *arg2, struct KernelChannel *arg3, NvU32 arg4); #ifdef __nvoc_kernel_falcon_h_disabled -static inline NV_STATUS kflcnFreeContext(struct OBJGPU *arg0, struct KernelFalcon *arg1, struct KernelChannel *arg2, NvU32 arg3) { +static inline NV_STATUS kflcnFreeContext(struct OBJGPU *arg1, struct KernelFalcon *arg2, struct KernelChannel *arg3, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("KernelFalcon was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_falcon_h_disabled -#define kflcnFreeContext(arg0, arg1, arg2, arg3) kflcnFreeContext_IMPL(arg0, arg1, arg2, arg3) +#define kflcnFreeContext(arg1, arg2, arg3, arg4) kflcnFreeContext_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_falcon_h_disabled struct KernelFalcon *kflcnGetKernelFalconForEngine_IMPL(struct OBJGPU *pGpu, ENGDESCRIPTOR physEngDesc); @@ -529,37 +589,46 @@ struct KernelFalcon *kflcnGetKernelFalconForEngine_IMPL(struct OBJGPU *pGpu, ENG #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct GenericKernelFalcon { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct KernelFalcon __nvoc_base_KernelFalcon; struct IntrService __nvoc_base_IntrService; struct Object __nvoc_base_Object; - struct CrashCatEngine *__nvoc_pbase_CrashCatEngine; - struct KernelCrashCatEngine *__nvoc_pbase_KernelCrashCatEngine; - struct KernelFalcon *__nvoc_pbase_KernelFalcon; - struct IntrService *__nvoc_pbase_IntrService; - struct Object *__nvoc_pbase_Object; - struct GenericKernelFalcon *__nvoc_pbase_GenericKernelFalcon; - NV_STATUS (*__gkflcnResetHw__)(struct OBJGPU *, struct GenericKernelFalcon *); - void (*__gkflcnRegisterIntrService__)(struct OBJGPU *, struct GenericKernelFalcon *, IntrServiceRecord *); - NV_STATUS (*__gkflcnServiceNotificationInterrupt__)(struct OBJGPU *, struct GenericKernelFalcon *, IntrServiceServiceNotificationInterruptArguments *); - void (*__gkflcnReadEmem__)(struct GenericKernelFalcon *, NvU64, NvU64, void *); - NvU32 (*__gkflcnGetWFL0Offset__)(struct GenericKernelFalcon *); - void (*__gkflcnUnload__)(struct GenericKernelFalcon *); - NvBool (*__gkflcnConfigured__)(struct GenericKernelFalcon *); - NvU32 (*__gkflcnPriRead__)(struct GenericKernelFalcon *, NvU32); - const NvU32 *(*__gkflcnGetScratchOffsets__)(struct GenericKernelFalcon *, NV_CRASHCAT_SCRATCH_GROUP_ID); - void (*__gkflcnRegWrite__)(struct OBJGPU *, struct GenericKernelFalcon *, NvU32, NvU32); - NvU32 (*__gkflcnMaskDmemAddr__)(struct OBJGPU *, struct GenericKernelFalcon *, NvU32); - void (*__gkflcnVprintf__)(struct GenericKernelFalcon *, NvBool, const char *, va_list); - NvBool (*__gkflcnClearInterrupt__)(struct OBJGPU *, struct GenericKernelFalcon *, IntrServiceClearInterruptArguments *); - void (*__gkflcnPriWrite__)(struct GenericKernelFalcon *, NvU32, NvU32); - void *(*__gkflcnMapBufferDescriptor__)(struct GenericKernelFalcon *, CrashCatBufferDescriptor *); - void (*__gkflcnSyncBufferDescriptor__)(struct GenericKernelFalcon *, CrashCatBufferDescriptor *, NvU32, NvU32); - NvU32 (*__gkflcnRegRead__)(struct OBJGPU *, struct GenericKernelFalcon *, NvU32); - void (*__gkflcnUnmapBufferDescriptor__)(struct GenericKernelFalcon *, CrashCatBufferDescriptor *); - NvU32 (*__gkflcnServiceInterrupt__)(struct OBJGPU *, struct GenericKernelFalcon *, IntrServiceServiceInterruptArguments *); - void (*__gkflcnReadDmem__)(struct GenericKernelFalcon *, NvU32, NvU32, void *); + + // Ancestor object pointers for `staticCast` feature + struct CrashCatEngine *__nvoc_pbase_CrashCatEngine; // crashcatEngine super^3 + struct KernelCrashCatEngine *__nvoc_pbase_KernelCrashCatEngine; // kcrashcatEngine super^2 + struct KernelFalcon *__nvoc_pbase_KernelFalcon; // kflcn super + struct IntrService *__nvoc_pbase_IntrService; // intrserv super + struct Object *__nvoc_pbase_Object; // obj super + struct GenericKernelFalcon *__nvoc_pbase_GenericKernelFalcon; // gkflcn + + // Vtable with 20 per-object function pointers + NV_STATUS (*__gkflcnResetHw__)(struct OBJGPU *, struct GenericKernelFalcon * /*this*/); // virtual override (kflcn) base (kflcn) + void (*__gkflcnRegisterIntrService__)(struct OBJGPU *, struct GenericKernelFalcon * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) + NV_STATUS (*__gkflcnServiceNotificationInterrupt__)(struct OBJGPU *, struct GenericKernelFalcon * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual override (intrserv) base (intrserv) + NvU32 (*__gkflcnRegRead__)(struct OBJGPU *, struct GenericKernelFalcon * /*this*/, NvU32); // virtual halified (2 hals) inherited (kflcn) base (kflcn) body + void (*__gkflcnRegWrite__)(struct OBJGPU *, struct GenericKernelFalcon * /*this*/, NvU32, NvU32); // virtual halified (2 hals) inherited (kflcn) base (kflcn) body + NvU32 (*__gkflcnMaskDmemAddr__)(struct OBJGPU *, struct GenericKernelFalcon * /*this*/, NvU32); // virtual halified (3 hals) inherited (kflcn) base (kflcn) body + NvBool (*__gkflcnConfigured__)(struct GenericKernelFalcon * /*this*/); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__gkflcnUnload__)(struct GenericKernelFalcon * /*this*/); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__gkflcnVprintf__)(struct GenericKernelFalcon * /*this*/, NvBool, const char *, va_list); // virtual inherited (kcrashcatEngine) base (kflcn) + NvU32 (*__gkflcnPriRead__)(struct GenericKernelFalcon * /*this*/, NvU32); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__gkflcnPriWrite__)(struct GenericKernelFalcon * /*this*/, NvU32, NvU32); // virtual inherited (kcrashcatEngine) base (kflcn) + void * (*__gkflcnMapBufferDescriptor__)(struct GenericKernelFalcon * /*this*/, CrashCatBufferDescriptor *); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__gkflcnUnmapBufferDescriptor__)(struct GenericKernelFalcon * /*this*/, CrashCatBufferDescriptor *); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__gkflcnSyncBufferDescriptor__)(struct GenericKernelFalcon * /*this*/, CrashCatBufferDescriptor *, NvU32, NvU32); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__gkflcnReadDmem__)(struct GenericKernelFalcon * /*this*/, NvU32, NvU32, void *); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + void (*__gkflcnReadEmem__)(struct GenericKernelFalcon * /*this*/, NvU64, NvU64, void *); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + const NvU32 * (*__gkflcnGetScratchOffsets__)(struct GenericKernelFalcon * /*this*/, NV_CRASHCAT_SCRATCH_GROUP_ID); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + NvU32 (*__gkflcnGetWFL0Offset__)(struct GenericKernelFalcon * /*this*/); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + NvBool (*__gkflcnClearInterrupt__)(struct OBJGPU *, struct GenericKernelFalcon * /*this*/, IntrServiceClearInterruptArguments *); // virtual inherited (intrserv) base (intrserv) + NvU32 (*__gkflcnServiceInterrupt__)(struct OBJGPU *, struct GenericKernelFalcon * /*this*/, IntrServiceServiceInterruptArguments *); // virtual inherited (intrserv) base (intrserv) }; #ifndef __NVOC_CLASS_GenericKernelFalcon_TYPEDEF__ @@ -571,6 +640,7 @@ typedef struct GenericKernelFalcon GenericKernelFalcon; #define __nvoc_class_id_GenericKernelFalcon 0xabcf08 #endif /* __nvoc_class_id_GenericKernelFalcon */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_GenericKernelFalcon; #define __staticCast_GenericKernelFalcon(pThis) \ @@ -583,118 +653,148 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_GenericKernelFalcon; ((GenericKernelFalcon*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(GenericKernelFalcon))) #endif //__nvoc_kernel_falcon_h_disabled - NV_STATUS __nvoc_objCreateDynamic_GenericKernelFalcon(GenericKernelFalcon**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_GenericKernelFalcon(GenericKernelFalcon**, Dynamic*, NvU32, struct OBJGPU * arg_pGpu, KernelFalconEngineConfig * arg_pFalconConfig); #define __objCreate_GenericKernelFalcon(ppNewObj, pParent, createFlags, arg_pGpu, arg_pFalconConfig) \ __nvoc_objCreate_GenericKernelFalcon((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pGpu, arg_pFalconConfig) + +// Wrapper macros +#define gkflcnResetHw_FNPTR(pGenKernFlcn) pGenKernFlcn->__gkflcnResetHw__ #define gkflcnResetHw(pGpu, pGenKernFlcn) gkflcnResetHw_DISPATCH(pGpu, pGenKernFlcn) -#define gkflcnRegisterIntrService(arg0, arg1, arg2) gkflcnRegisterIntrService_DISPATCH(arg0, arg1, arg2) -#define gkflcnServiceNotificationInterrupt(arg0, arg1, arg2) gkflcnServiceNotificationInterrupt_DISPATCH(arg0, arg1, arg2) -#define gkflcnReadEmem(arg0, offset, size, pBuf) gkflcnReadEmem_DISPATCH(arg0, offset, size, pBuf) -#define gkflcnGetWFL0Offset(arg0) gkflcnGetWFL0Offset_DISPATCH(arg0) -#define gkflcnUnload(arg0) gkflcnUnload_DISPATCH(arg0) -#define gkflcnConfigured(arg0) gkflcnConfigured_DISPATCH(arg0) -#define gkflcnPriRead(arg0, offset) gkflcnPriRead_DISPATCH(arg0, offset) -#define gkflcnGetScratchOffsets(arg0, scratchGroupId) gkflcnGetScratchOffsets_DISPATCH(arg0, scratchGroupId) +#define gkflcnRegisterIntrService_FNPTR(arg_this) arg_this->__gkflcnRegisterIntrService__ +#define gkflcnRegisterIntrService(arg1, arg_this, arg3) gkflcnRegisterIntrService_DISPATCH(arg1, arg_this, arg3) +#define gkflcnServiceNotificationInterrupt_FNPTR(arg_this) arg_this->__gkflcnServiceNotificationInterrupt__ +#define gkflcnServiceNotificationInterrupt(arg1, arg_this, arg3) gkflcnServiceNotificationInterrupt_DISPATCH(arg1, arg_this, arg3) +#define gkflcnRegRead_FNPTR(pKernelFlcn) pKernelFlcn->__nvoc_base_KernelFalcon.__kflcnRegRead__ +#define gkflcnRegRead(pGpu, pKernelFlcn, offset) gkflcnRegRead_DISPATCH(pGpu, pKernelFlcn, offset) +#define gkflcnRegRead_HAL(pGpu, pKernelFlcn, offset) gkflcnRegRead_DISPATCH(pGpu, pKernelFlcn, offset) +#define gkflcnRegWrite_FNPTR(pKernelFlcn) pKernelFlcn->__nvoc_base_KernelFalcon.__kflcnRegWrite__ #define gkflcnRegWrite(pGpu, pKernelFlcn, offset, data) gkflcnRegWrite_DISPATCH(pGpu, pKernelFlcn, offset, data) +#define gkflcnRegWrite_HAL(pGpu, pKernelFlcn, offset, data) gkflcnRegWrite_DISPATCH(pGpu, pKernelFlcn, offset, data) +#define gkflcnMaskDmemAddr_FNPTR(pKernelFlcn) pKernelFlcn->__nvoc_base_KernelFalcon.__kflcnMaskDmemAddr__ #define gkflcnMaskDmemAddr(pGpu, pKernelFlcn, addr) gkflcnMaskDmemAddr_DISPATCH(pGpu, pKernelFlcn, addr) -#define gkflcnVprintf(arg0, bReportStart, fmt, args) gkflcnVprintf_DISPATCH(arg0, bReportStart, fmt, args) +#define gkflcnMaskDmemAddr_HAL(pGpu, pKernelFlcn, addr) gkflcnMaskDmemAddr_DISPATCH(pGpu, pKernelFlcn, addr) +#define gkflcnConfigured_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineConfigured__ +#define gkflcnConfigured(arg_this) gkflcnConfigured_DISPATCH(arg_this) +#define gkflcnUnload_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineUnload__ +#define gkflcnUnload(arg_this) gkflcnUnload_DISPATCH(arg_this) +#define gkflcnVprintf_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineVprintf__ +#define gkflcnVprintf(arg_this, bReportStart, fmt, args) gkflcnVprintf_DISPATCH(arg_this, bReportStart, fmt, args) +#define gkflcnPriRead_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEnginePriRead__ +#define gkflcnPriRead(arg_this, offset) gkflcnPriRead_DISPATCH(arg_this, offset) +#define gkflcnPriWrite_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEnginePriWrite__ +#define gkflcnPriWrite(arg_this, offset, data) gkflcnPriWrite_DISPATCH(arg_this, offset, data) +#define gkflcnMapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineMapBufferDescriptor__ +#define gkflcnMapBufferDescriptor(arg_this, pBufDesc) gkflcnMapBufferDescriptor_DISPATCH(arg_this, pBufDesc) +#define gkflcnUnmapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineUnmapBufferDescriptor__ +#define gkflcnUnmapBufferDescriptor(arg_this, pBufDesc) gkflcnUnmapBufferDescriptor_DISPATCH(arg_this, pBufDesc) +#define gkflcnSyncBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineSyncBufferDescriptor__ +#define gkflcnSyncBufferDescriptor(arg_this, pBufDesc, offset, size) gkflcnSyncBufferDescriptor_DISPATCH(arg_this, pBufDesc, offset, size) +#define gkflcnReadDmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineReadDmem__ +#define gkflcnReadDmem(arg_this, offset, size, pBuf) gkflcnReadDmem_DISPATCH(arg_this, offset, size, pBuf) +#define gkflcnReadDmem_HAL(arg_this, offset, size, pBuf) gkflcnReadDmem_DISPATCH(arg_this, offset, size, pBuf) +#define gkflcnReadEmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineReadEmem__ +#define gkflcnReadEmem(arg_this, offset, size, pBuf) gkflcnReadEmem_DISPATCH(arg_this, offset, size, pBuf) +#define gkflcnReadEmem_HAL(arg_this, offset, size, pBuf) gkflcnReadEmem_DISPATCH(arg_this, offset, size, pBuf) +#define gkflcnGetScratchOffsets_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineGetScratchOffsets__ +#define gkflcnGetScratchOffsets(arg_this, scratchGroupId) gkflcnGetScratchOffsets_DISPATCH(arg_this, scratchGroupId) +#define gkflcnGetScratchOffsets_HAL(arg_this, scratchGroupId) gkflcnGetScratchOffsets_DISPATCH(arg_this, scratchGroupId) +#define gkflcnGetWFL0Offset_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineGetWFL0Offset__ +#define gkflcnGetWFL0Offset(arg_this) gkflcnGetWFL0Offset_DISPATCH(arg_this) +#define gkflcnGetWFL0Offset_HAL(arg_this) gkflcnGetWFL0Offset_DISPATCH(arg_this) +#define gkflcnClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservClearInterrupt__ #define gkflcnClearInterrupt(pGpu, pIntrService, pParams) gkflcnClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define gkflcnPriWrite(arg0, offset, data) gkflcnPriWrite_DISPATCH(arg0, offset, data) -#define gkflcnMapBufferDescriptor(arg0, pBufDesc) gkflcnMapBufferDescriptor_DISPATCH(arg0, pBufDesc) -#define gkflcnSyncBufferDescriptor(arg0, pBufDesc, offset, size) gkflcnSyncBufferDescriptor_DISPATCH(arg0, pBufDesc, offset, size) -#define gkflcnRegRead(pGpu, pKernelFlcn, offset) gkflcnRegRead_DISPATCH(pGpu, pKernelFlcn, offset) -#define gkflcnUnmapBufferDescriptor(arg0, pBufDesc) gkflcnUnmapBufferDescriptor_DISPATCH(arg0, pBufDesc) +#define gkflcnServiceInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservServiceInterrupt__ #define gkflcnServiceInterrupt(pGpu, pIntrService, pParams) gkflcnServiceInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define gkflcnReadDmem(arg0, offset, size, pBuf) gkflcnReadDmem_DISPATCH(arg0, offset, size, pBuf) -NV_STATUS gkflcnResetHw_IMPL(struct OBJGPU *pGpu, struct GenericKernelFalcon *pGenKernFlcn); +// Dispatch functions static inline NV_STATUS gkflcnResetHw_DISPATCH(struct OBJGPU *pGpu, struct GenericKernelFalcon *pGenKernFlcn) { return pGenKernFlcn->__gkflcnResetHw__(pGpu, pGenKernFlcn); } -void gkflcnRegisterIntrService_IMPL(struct OBJGPU *arg0, struct GenericKernelFalcon *arg1, IntrServiceRecord arg2[171]); - -static inline void gkflcnRegisterIntrService_DISPATCH(struct OBJGPU *arg0, struct GenericKernelFalcon *arg1, IntrServiceRecord arg2[171]) { - arg1->__gkflcnRegisterIntrService__(arg0, arg1, arg2); +static inline void gkflcnRegisterIntrService_DISPATCH(struct OBJGPU *arg1, struct GenericKernelFalcon *arg_this, IntrServiceRecord arg3[175]) { + arg_this->__gkflcnRegisterIntrService__(arg1, arg_this, arg3); } -NV_STATUS gkflcnServiceNotificationInterrupt_IMPL(struct OBJGPU *arg0, struct GenericKernelFalcon *arg1, IntrServiceServiceNotificationInterruptArguments *arg2); +static inline NV_STATUS gkflcnServiceNotificationInterrupt_DISPATCH(struct OBJGPU *arg1, struct GenericKernelFalcon *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3) { + return arg_this->__gkflcnServiceNotificationInterrupt__(arg1, arg_this, arg3); +} -static inline NV_STATUS gkflcnServiceNotificationInterrupt_DISPATCH(struct OBJGPU *arg0, struct GenericKernelFalcon *arg1, IntrServiceServiceNotificationInterruptArguments *arg2) { - return arg1->__gkflcnServiceNotificationInterrupt__(arg0, arg1, arg2); +static inline NvU32 gkflcnRegRead_DISPATCH(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 offset) { + return pKernelFlcn->__gkflcnRegRead__(pGpu, pKernelFlcn, offset); } -static inline void gkflcnReadEmem_DISPATCH(struct GenericKernelFalcon *arg0, NvU64 offset, NvU64 size, void *pBuf) { - arg0->__gkflcnReadEmem__(arg0, offset, size, pBuf); +static inline void gkflcnRegWrite_DISPATCH(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 offset, NvU32 data) { + pKernelFlcn->__gkflcnRegWrite__(pGpu, pKernelFlcn, offset, data); } -static inline NvU32 gkflcnGetWFL0Offset_DISPATCH(struct GenericKernelFalcon *arg0) { - return arg0->__gkflcnGetWFL0Offset__(arg0); +static inline NvU32 gkflcnMaskDmemAddr_DISPATCH(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 addr) { + return pKernelFlcn->__gkflcnMaskDmemAddr__(pGpu, pKernelFlcn, addr); } -static inline void gkflcnUnload_DISPATCH(struct GenericKernelFalcon *arg0) { - arg0->__gkflcnUnload__(arg0); +static inline NvBool gkflcnConfigured_DISPATCH(struct GenericKernelFalcon *arg_this) { + return arg_this->__gkflcnConfigured__(arg_this); } -static inline NvBool gkflcnConfigured_DISPATCH(struct GenericKernelFalcon *arg0) { - return arg0->__gkflcnConfigured__(arg0); +static inline void gkflcnUnload_DISPATCH(struct GenericKernelFalcon *arg_this) { + arg_this->__gkflcnUnload__(arg_this); } -static inline NvU32 gkflcnPriRead_DISPATCH(struct GenericKernelFalcon *arg0, NvU32 offset) { - return arg0->__gkflcnPriRead__(arg0, offset); +static inline void gkflcnVprintf_DISPATCH(struct GenericKernelFalcon *arg_this, NvBool bReportStart, const char *fmt, va_list args) { + arg_this->__gkflcnVprintf__(arg_this, bReportStart, fmt, args); } -static inline const NvU32 *gkflcnGetScratchOffsets_DISPATCH(struct GenericKernelFalcon *arg0, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { - return arg0->__gkflcnGetScratchOffsets__(arg0, scratchGroupId); +static inline NvU32 gkflcnPriRead_DISPATCH(struct GenericKernelFalcon *arg_this, NvU32 offset) { + return arg_this->__gkflcnPriRead__(arg_this, offset); } -static inline void gkflcnRegWrite_DISPATCH(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 offset, NvU32 data) { - pKernelFlcn->__gkflcnRegWrite__(pGpu, pKernelFlcn, offset, data); +static inline void gkflcnPriWrite_DISPATCH(struct GenericKernelFalcon *arg_this, NvU32 offset, NvU32 data) { + arg_this->__gkflcnPriWrite__(arg_this, offset, data); } -static inline NvU32 gkflcnMaskDmemAddr_DISPATCH(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 addr) { - return pKernelFlcn->__gkflcnMaskDmemAddr__(pGpu, pKernelFlcn, addr); +static inline void * gkflcnMapBufferDescriptor_DISPATCH(struct GenericKernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc) { + return arg_this->__gkflcnMapBufferDescriptor__(arg_this, pBufDesc); } -static inline void gkflcnVprintf_DISPATCH(struct GenericKernelFalcon *arg0, NvBool bReportStart, const char *fmt, va_list args) { - arg0->__gkflcnVprintf__(arg0, bReportStart, fmt, args); +static inline void gkflcnUnmapBufferDescriptor_DISPATCH(struct GenericKernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc) { + arg_this->__gkflcnUnmapBufferDescriptor__(arg_this, pBufDesc); } -static inline NvBool gkflcnClearInterrupt_DISPATCH(struct OBJGPU *pGpu, struct GenericKernelFalcon *pIntrService, IntrServiceClearInterruptArguments *pParams) { - return pIntrService->__gkflcnClearInterrupt__(pGpu, pIntrService, pParams); +static inline void gkflcnSyncBufferDescriptor_DISPATCH(struct GenericKernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { + arg_this->__gkflcnSyncBufferDescriptor__(arg_this, pBufDesc, offset, size); } -static inline void gkflcnPriWrite_DISPATCH(struct GenericKernelFalcon *arg0, NvU32 offset, NvU32 data) { - arg0->__gkflcnPriWrite__(arg0, offset, data); +static inline void gkflcnReadDmem_DISPATCH(struct GenericKernelFalcon *arg_this, NvU32 offset, NvU32 size, void *pBuf) { + arg_this->__gkflcnReadDmem__(arg_this, offset, size, pBuf); } -static inline void *gkflcnMapBufferDescriptor_DISPATCH(struct GenericKernelFalcon *arg0, CrashCatBufferDescriptor *pBufDesc) { - return arg0->__gkflcnMapBufferDescriptor__(arg0, pBufDesc); +static inline void gkflcnReadEmem_DISPATCH(struct GenericKernelFalcon *arg_this, NvU64 offset, NvU64 size, void *pBuf) { + arg_this->__gkflcnReadEmem__(arg_this, offset, size, pBuf); } -static inline void gkflcnSyncBufferDescriptor_DISPATCH(struct GenericKernelFalcon *arg0, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { - arg0->__gkflcnSyncBufferDescriptor__(arg0, pBufDesc, offset, size); +static inline const NvU32 * gkflcnGetScratchOffsets_DISPATCH(struct GenericKernelFalcon *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { + return arg_this->__gkflcnGetScratchOffsets__(arg_this, scratchGroupId); } -static inline NvU32 gkflcnRegRead_DISPATCH(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 offset) { - return pKernelFlcn->__gkflcnRegRead__(pGpu, pKernelFlcn, offset); +static inline NvU32 gkflcnGetWFL0Offset_DISPATCH(struct GenericKernelFalcon *arg_this) { + return arg_this->__gkflcnGetWFL0Offset__(arg_this); } -static inline void gkflcnUnmapBufferDescriptor_DISPATCH(struct GenericKernelFalcon *arg0, CrashCatBufferDescriptor *pBufDesc) { - arg0->__gkflcnUnmapBufferDescriptor__(arg0, pBufDesc); +static inline NvBool gkflcnClearInterrupt_DISPATCH(struct OBJGPU *pGpu, struct GenericKernelFalcon *pIntrService, IntrServiceClearInterruptArguments *pParams) { + return pIntrService->__gkflcnClearInterrupt__(pGpu, pIntrService, pParams); } static inline NvU32 gkflcnServiceInterrupt_DISPATCH(struct OBJGPU *pGpu, struct GenericKernelFalcon *pIntrService, IntrServiceServiceInterruptArguments *pParams) { return pIntrService->__gkflcnServiceInterrupt__(pGpu, pIntrService, pParams); } -static inline void gkflcnReadDmem_DISPATCH(struct GenericKernelFalcon *arg0, NvU32 offset, NvU32 size, void *pBuf) { - arg0->__gkflcnReadDmem__(arg0, offset, size, pBuf); -} +NV_STATUS gkflcnResetHw_IMPL(struct OBJGPU *pGpu, struct GenericKernelFalcon *pGenKernFlcn); + +void gkflcnRegisterIntrService_IMPL(struct OBJGPU *arg1, struct GenericKernelFalcon *arg2, IntrServiceRecord arg3[175]); + +NV_STATUS gkflcnServiceNotificationInterrupt_IMPL(struct OBJGPU *arg1, struct GenericKernelFalcon *arg2, IntrServiceServiceNotificationInterruptArguments *arg3); NV_STATUS gkflcnConstruct_IMPL(struct GenericKernelFalcon *arg_pGenKernFlcn, struct OBJGPU *arg_pGpu, KernelFalconEngineConfig *arg_pFalconConfig); diff --git a/src/nvidia/generated/g_kernel_fifo_nvoc.c b/src/nvidia/generated/g_kernel_fifo_nvoc.c index 4df672d0b6..deacc09b6c 100644 --- a/src/nvidia/generated/g_kernel_fifo_nvoc.c +++ b/src/nvidia/generated/g_kernel_fifo_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelFifo = /*pExportInfo=*/ &__nvoc_export_info_KernelFifo }; -static NV_STATUS __nvoc_thunk_KernelFifo_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, ENGDESCRIPTOR engDesc) { - return kfifoConstructEngine(pGpu, (struct KernelFifo *)(((unsigned char *)pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), engDesc); +// 7 down-thunk(s) defined to bridge methods in KernelFifo from superclasses + +// kfifoConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelFifo_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, ENGDESCRIPTOR engDesc) { + return kfifoConstructEngine(pGpu, (struct KernelFifo *)(((unsigned char *) pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), engDesc); } -static NV_STATUS __nvoc_thunk_KernelFifo_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags) { - return kfifoStateLoad(pGpu, (struct KernelFifo *)(((unsigned char *)pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), flags); +// kfifoStateLoad: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_KernelFifo_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags) { + return kfifoStateLoad(pGpu, (struct KernelFifo *)(((unsigned char *) pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), flags); } -static NV_STATUS __nvoc_thunk_KernelFifo_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags) { - return kfifoStateUnload(pGpu, (struct KernelFifo *)(((unsigned char *)pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), flags); +// kfifoStateUnload: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_KernelFifo_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags) { + return kfifoStateUnload(pGpu, (struct KernelFifo *)(((unsigned char *) pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), flags); } -static NV_STATUS __nvoc_thunk_KernelFifo_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo) { - return kfifoStateInitLocked(pGpu, (struct KernelFifo *)(((unsigned char *)pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); +// kfifoStateInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelFifo_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo) { + return kfifoStateInitLocked(pGpu, (struct KernelFifo *)(((unsigned char *) pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); } -static void __nvoc_thunk_KernelFifo_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo) { - kfifoStateDestroy(pGpu, (struct KernelFifo *)(((unsigned char *)pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); +// kfifoStateDestroy: virtual override (engstate) base (engstate) +static void __nvoc_down_thunk_KernelFifo_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo) { + kfifoStateDestroy(pGpu, (struct KernelFifo *)(((unsigned char *) pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_KernelFifo_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags) { - return kfifoStatePostLoad(pGpu, (struct KernelFifo *)(((unsigned char *)pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), flags); +// kfifoStatePostLoad: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_KernelFifo_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags) { + return kfifoStatePostLoad(pGpu, (struct KernelFifo *)(((unsigned char *) pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), flags); } -static NV_STATUS __nvoc_thunk_KernelFifo_engstateStatePreUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags) { - return kfifoStatePreUnload(pGpu, (struct KernelFifo *)(((unsigned char *)pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), flags); +// kfifoStatePreUnload: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_KernelFifo_engstateStatePreUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags) { + return kfifoStatePreUnload(pGpu, (struct KernelFifo *)(((unsigned char *) pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), flags); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kfifoStatePreLoad(POBJGPU pGpu, struct KernelFifo *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), arg0); + +// 7 up-thunk(s) defined to bridge methods in KernelFifo to superclasses + +// kfifoInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kfifoInitMissing(POBJGPU pGpu, struct KernelFifo *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kfifoStatePostUnload(POBJGPU pGpu, struct KernelFifo *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), arg0); +// kfifoStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfifoStatePreInitLocked(POBJGPU pGpu, struct KernelFifo *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kfifoStateInitUnlocked(POBJGPU pGpu, struct KernelFifo *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); +// kfifoStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfifoStatePreInitUnlocked(POBJGPU pGpu, struct KernelFifo *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_kfifoInitMissing(POBJGPU pGpu, struct KernelFifo *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); +// kfifoStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfifoStateInitUnlocked(POBJGPU pGpu, struct KernelFifo *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kfifoStatePreInitLocked(POBJGPU pGpu, struct KernelFifo *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); +// kfifoStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfifoStatePreLoad(POBJGPU pGpu, struct KernelFifo *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kfifoStatePreInitUnlocked(POBJGPU pGpu, struct KernelFifo *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); +// kfifoStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfifoStatePostUnload(POBJGPU pGpu, struct KernelFifo *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), arg3); } -static NvBool __nvoc_thunk_OBJENGSTATE_kfifoIsPresent(POBJGPU pGpu, struct KernelFifo *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); +// kfifoIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_kfifoIsPresent(POBJGPU pGpu, struct KernelFifo *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelFifo = { /*numEntries=*/ 0, @@ -154,7 +174,10 @@ void __nvoc_init_dataField_KernelFifo(KernelFifo *pThis, RmHalspecOwner *pRmhals } // Hal field -- bUsePerRunlistChram - pThis->bUsePerRunlistChram = ((NvBool)(0 != 0)); + // default + { + pThis->bUsePerRunlistChram = ((NvBool)(0 != 0)); + } // Hal field -- bIsPerRunlistChramSupportedInHw if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ @@ -235,6 +258,7 @@ NV_STATUS __nvoc_ctor_KernelFifo(KernelFifo *pThis, RmHalspecOwner *pRmhalspecow return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -247,41 +271,35 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); + // kfifoConstructEngine -- virtual override (engstate) base (engstate) pThis->__kfifoConstructEngine__ = &kfifoConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelFifo_engstateConstructEngine; - // Hal function -- kfifoStateLoad - if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ - { - pThis->__kfifoStateLoad__ = &kfifoStateLoad_IMPL; - } - // default - else - { - pThis->__kfifoStateLoad__ = &kfifoStateLoad_56cd7a; - } + // kfifoStateLoad -- virtual halified (singleton optimized) override (engstate) base (engstate) body + pThis->__kfifoStateLoad__ = &kfifoStateLoad_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelFifo_engstateStateLoad; - // Hal function -- kfifoStateUnload - if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ - { - pThis->__kfifoStateUnload__ = &kfifoStateUnload_IMPL; - } - // default - else - { - pThis->__kfifoStateUnload__ = &kfifoStateUnload_56cd7a; - } + // kfifoStateUnload -- virtual halified (singleton optimized) override (engstate) base (engstate) body + pThis->__kfifoStateUnload__ = &kfifoStateUnload_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelFifo_engstateStateUnload; + // kfifoStateInitLocked -- virtual override (engstate) base (engstate) pThis->__kfifoStateInitLocked__ = &kfifoStateInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelFifo_engstateStateInitLocked; + // kfifoStateDestroy -- virtual override (engstate) base (engstate) pThis->__kfifoStateDestroy__ = &kfifoStateDestroy_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelFifo_engstateStateDestroy; - // Hal function -- kfifoStatePostLoad + // kfifoStatePostLoad -- virtual halified (singleton optimized) override (engstate) base (engstate) body pThis->__kfifoStatePostLoad__ = &kfifoStatePostLoad_GM107; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelFifo_engstateStatePostLoad; - // Hal function -- kfifoStatePreUnload + // kfifoStatePreUnload -- virtual halified (singleton optimized) override (engstate) base (engstate) body pThis->__kfifoStatePreUnload__ = &kfifoStatePreUnload_GM107; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_KernelFifo_engstateStatePreUnload; - // Hal function -- kfifoCheckChannelAllocAddrSpaces + // kfifoCheckChannelAllocAddrSpaces -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfifoCheckChannelAllocAddrSpaces__ = &kfifoCheckChannelAllocAddrSpaces_GH100; @@ -292,7 +310,7 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoCheckChannelAllocAddrSpaces__ = &kfifoCheckChannelAllocAddrSpaces_56cd7a; } - // Hal function -- kfifoConstructUsermodeMemdescs + // kfifoConstructUsermodeMemdescs -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfifoConstructUsermodeMemdescs__ = &kfifoConstructUsermodeMemdescs_GH100; @@ -302,7 +320,7 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoConstructUsermodeMemdescs__ = &kfifoConstructUsermodeMemdescs_GV100; } - // Hal function -- kfifoChannelGroupGetLocalMaxSubcontext + // kfifoChannelGroupGetLocalMaxSubcontext -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kfifoChannelGroupGetLocalMaxSubcontext__ = &kfifoChannelGroupGetLocalMaxSubcontext_GM107; @@ -312,7 +330,7 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoChannelGroupGetLocalMaxSubcontext__ = &kfifoChannelGroupGetLocalMaxSubcontext_GA100; } - // Hal function -- kfifoGetCtxBufferMapFlags + // kfifoGetCtxBufferMapFlags -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfifoGetCtxBufferMapFlags__ = &kfifoGetCtxBufferMapFlags_GH100; @@ -323,7 +341,7 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoGetCtxBufferMapFlags__ = &kfifoGetCtxBufferMapFlags_b3696a; } - // Hal function -- kfifoEngineInfoXlate + // kfifoEngineInfoXlate -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kfifoEngineInfoXlate__ = &kfifoEngineInfoXlate_GV100; @@ -333,7 +351,7 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoEngineInfoXlate__ = &kfifoEngineInfoXlate_GA100; } - // Hal function -- kfifoGenerateWorkSubmitToken + // kfifoGenerateWorkSubmitToken -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kfifoGenerateWorkSubmitToken__ = &kfifoGenerateWorkSubmitToken_TU102; @@ -343,7 +361,7 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoGenerateWorkSubmitToken__ = &kfifoGenerateWorkSubmitToken_GA100; } - // Hal function -- kfifoUpdateUsermodeDoorbell + // kfifoUpdateUsermodeDoorbell -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kfifoUpdateUsermodeDoorbell__ = &kfifoUpdateUsermodeDoorbell_TU102; @@ -353,7 +371,7 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoUpdateUsermodeDoorbell__ = &kfifoUpdateUsermodeDoorbell_GA100; } - // Hal function -- kfifoRunlistGetBaseShift + // kfifoRunlistGetBaseShift -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__kfifoRunlistGetBaseShift__ = &kfifoRunlistGetBaseShift_GA100; @@ -367,7 +385,7 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoRunlistGetBaseShift__ = &kfifoRunlistGetBaseShift_GA102; } - // Hal function -- kfifoGetUserdBar1MapStartOffset + // kfifoGetUserdBar1MapStartOffset -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kfifoGetUserdBar1MapStartOffset__ = &kfifoGetUserdBar1MapStartOffset_VF; @@ -377,7 +395,7 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoGetUserdBar1MapStartOffset__ = &kfifoGetUserdBar1MapStartOffset_4a4dee; } - // Hal function -- kfifoGetMaxCeChannelGroups + // kfifoGetMaxCeChannelGroups -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kfifoGetMaxCeChannelGroups__ = &kfifoGetMaxCeChannelGroups_GV100; @@ -387,7 +405,7 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoGetMaxCeChannelGroups__ = &kfifoGetMaxCeChannelGroups_GA100; } - // Hal function -- kfifoGetVChIdForSChId + // kfifoGetVChIdForSChId -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kfifoGetVChIdForSChId__ = &kfifoGetVChIdForSChId_c04480; @@ -397,7 +415,7 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoGetVChIdForSChId__ = &kfifoGetVChIdForSChId_FWCLIENT; } - // Hal function -- kfifoProgramChIdTable + // kfifoProgramChIdTable -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kfifoProgramChIdTable__ = &kfifoProgramChIdTable_c04480; @@ -407,7 +425,7 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoProgramChIdTable__ = &kfifoProgramChIdTable_56cd7a; } - // Hal function -- kfifoRecoverAllChannels + // kfifoRecoverAllChannels -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kfifoRecoverAllChannels__ = &kfifoRecoverAllChannels_56cd7a; @@ -417,7 +435,7 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoRecoverAllChannels__ = &kfifoRecoverAllChannels_92bfc3; } - // Hal function -- kfifoGetEnginePbdmaFaultIds + // kfifoGetEnginePbdmaFaultIds -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kfifoGetEnginePbdmaFaultIds__ = &kfifoGetEnginePbdmaFaultIds_5baef9; @@ -427,7 +445,7 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoGetEnginePbdmaFaultIds__ = &kfifoGetEnginePbdmaFaultIds_GA100; } - // Hal function -- kfifoGetNumPBDMAs + // kfifoGetNumPBDMAs -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kfifoGetNumPBDMAs__ = &kfifoGetNumPBDMAs_GM200; @@ -437,7 +455,7 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoGetNumPBDMAs__ = &kfifoGetNumPBDMAs_GA100; } - // Hal function -- kfifoPrintPbdmaId + // kfifoPrintPbdmaId -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kfifoPrintPbdmaId__ = &kfifoPrintPbdmaId_TU102; @@ -447,7 +465,7 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoPrintPbdmaId__ = &kfifoPrintPbdmaId_GA100; } - // Hal function -- kfifoPrintInternalEngine + // kfifoPrintInternalEngine -- halified (4 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfifoPrintInternalEngine__ = &kfifoPrintInternalEngine_GH100; @@ -465,17 +483,18 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoPrintInternalEngine__ = &kfifoPrintInternalEngine_GA100; } - // Hal function -- kfifoPrintInternalEngineCheck - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x100003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GH100 */ + // kfifoPrintInternalEngineCheck -- halified (2 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ { - pThis->__kfifoPrintInternalEngineCheck__ = &kfifoPrintInternalEngineCheck_fa6e19; + pThis->__kfifoPrintInternalEngineCheck__ = &kfifoPrintInternalEngineCheck_GA100; } + // default else { - pThis->__kfifoPrintInternalEngineCheck__ = &kfifoPrintInternalEngineCheck_GA100; + pThis->__kfifoPrintInternalEngineCheck__ = &kfifoPrintInternalEngineCheck_fa6e19; } - // Hal function -- kfifoGetClientIdStringCommon + // kfifoGetClientIdStringCommon -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfifoGetClientIdStringCommon__ = &kfifoGetClientIdStringCommon_GH100; @@ -486,7 +505,7 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoGetClientIdStringCommon__ = &kfifoGetClientIdStringCommon_95626c; } - // Hal function -- kfifoGetClientIdString + // kfifoGetClientIdString -- halified (4 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kfifoGetClientIdString__ = &kfifoGetClientIdString_GH100; @@ -504,7 +523,7 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoGetClientIdString__ = &kfifoGetClientIdString_GA100; } - // Hal function -- kfifoGetClientIdStringCheck + // kfifoGetClientIdStringCheck -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kfifoGetClientIdStringCheck__ = &kfifoGetClientIdStringCheck_da47da; @@ -514,36 +533,33 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoGetClientIdStringCheck__ = &kfifoGetClientIdStringCheck_GA100; } - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelFifo_engstateConstructEngine; + // kfifoInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__kfifoInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoInitMissing; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_thunk_KernelFifo_engstateStateLoad; + // kfifoStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__kfifoStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoStatePreInitLocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_thunk_KernelFifo_engstateStateUnload; + // kfifoStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kfifoStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoStatePreInitUnlocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_thunk_KernelFifo_engstateStateInitLocked; + // kfifoStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kfifoStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoStateInitUnlocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_thunk_KernelFifo_engstateStateDestroy; + // kfifoStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__kfifoStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoStatePreLoad; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_thunk_KernelFifo_engstateStatePostLoad; + // kfifoStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__kfifoStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoStatePostUnload; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_thunk_KernelFifo_engstateStatePreUnload; + // kfifoIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__kfifoIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoIsPresent; +} // End __nvoc_init_funcTable_KernelFifo_1 with approximately 68 basic block(s). - pThis->__kfifoStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_kfifoStatePreLoad; - - pThis->__kfifoStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_kfifoStatePostUnload; - - pThis->__kfifoStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kfifoStateInitUnlocked; - - pThis->__kfifoInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kfifoInitMissing; - - pThis->__kfifoStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kfifoStatePreInitLocked; - - pThis->__kfifoStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kfifoStatePreInitUnlocked; - - pThis->__kfifoIsPresent__ = &__nvoc_thunk_OBJENGSTATE_kfifoIsPresent; -} +// Initialize vtable(s) for 35 virtual method(s). void __nvoc_init_funcTable_KernelFifo(KernelFifo *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 35 per-object function pointer(s). __nvoc_init_funcTable_KernelFifo_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_fifo_nvoc.h b/src/nvidia/generated/g_kernel_fifo_nvoc.h index 347d26de61..1c2c135e9f 100644 --- a/src/nvidia/generated/g_kernel_fifo_nvoc.h +++ b/src/nvidia/generated/g_kernel_fifo_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_KERNEL_FIFO_NVOC_H_ #define _G_KERNEL_FIFO_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_fifo_nvoc.h" #ifndef _KERNELFIFO_H_ @@ -59,6 +67,7 @@ extern "C" { #include "class/clc369.h" // MMU_FAULT_BUFFER + struct KernelChannel; #ifndef __NVOC_CLASS_KernelChannel_TYPEDEF__ @@ -71,6 +80,7 @@ typedef struct KernelChannel KernelChannel; #endif /* __nvoc_class_id_KernelChannel */ + struct KernelChannelGroup; #ifndef __NVOC_CLASS_KernelChannelGroup_TYPEDEF__ @@ -83,6 +93,7 @@ typedef struct KernelChannelGroup KernelChannelGroup; #endif /* __nvoc_class_id_KernelChannelGroup */ + struct KernelSchedMgr; #ifndef __NVOC_CLASS_KernelSchedMgr_TYPEDEF__ @@ -341,6 +352,7 @@ typedef struct _def_preallocated_userd_info NvU64 userdBar1MapStartOffset; // base offset of 's BAR1 map NvU32 userdBar1MapSize; // sizeof 's map NvU8 *userdBar1CpuPtr; // cpu map of + NvU8 *userdBar1Priv; // priv data of NvU32 userdBar1RefMask; // mask of GPUs referencing userD } PREALLOCATED_USERD_INFO; @@ -389,47 +401,58 @@ MAKE_LIST(FifoSchedulingHandlerEntryList, FifoSchedulingHandlerEntry); #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelFifo { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct KernelFifo *__nvoc_pbase_KernelFifo; - NV_STATUS (*__kfifoConstructEngine__)(struct OBJGPU *, struct KernelFifo *, ENGDESCRIPTOR); - NV_STATUS (*__kfifoStateLoad__)(struct OBJGPU *, struct KernelFifo *, NvU32); - NV_STATUS (*__kfifoStateUnload__)(struct OBJGPU *, struct KernelFifo *, NvU32); - NV_STATUS (*__kfifoStateInitLocked__)(struct OBJGPU *, struct KernelFifo *); - void (*__kfifoStateDestroy__)(struct OBJGPU *, struct KernelFifo *); - NV_STATUS (*__kfifoStatePostLoad__)(struct OBJGPU *, struct KernelFifo *, NvU32); - NV_STATUS (*__kfifoStatePreUnload__)(struct OBJGPU *, struct KernelFifo *, NvU32); - NV_STATUS (*__kfifoCheckChannelAllocAddrSpaces__)(struct KernelFifo *, NV_ADDRESS_SPACE, NV_ADDRESS_SPACE, NV_ADDRESS_SPACE); - NV_STATUS (*__kfifoConstructUsermodeMemdescs__)(struct OBJGPU *, struct KernelFifo *); - NvU32 (*__kfifoChannelGroupGetLocalMaxSubcontext__)(struct OBJGPU *, struct KernelFifo *, struct KernelChannelGroup *, NvBool); - void (*__kfifoGetCtxBufferMapFlags__)(struct OBJGPU *, struct KernelFifo *, NvU32, NvU32 *); - NV_STATUS (*__kfifoEngineInfoXlate__)(struct OBJGPU *, struct KernelFifo *, ENGINE_INFO_TYPE, NvU32, ENGINE_INFO_TYPE, NvU32 *); - NV_STATUS (*__kfifoGenerateWorkSubmitToken__)(struct OBJGPU *, struct KernelFifo *, struct KernelChannel *, NvU32 *, NvBool); - NV_STATUS (*__kfifoUpdateUsermodeDoorbell__)(struct OBJGPU *, struct KernelFifo *, NvU32, NvU32); - NvU32 (*__kfifoRunlistGetBaseShift__)(struct KernelFifo *); - NvU64 (*__kfifoGetUserdBar1MapStartOffset__)(struct OBJGPU *, struct KernelFifo *); - NvU32 (*__kfifoGetMaxCeChannelGroups__)(struct OBJGPU *, struct KernelFifo *); - NV_STATUS (*__kfifoGetVChIdForSChId__)(struct OBJGPU *, struct KernelFifo *, NvU32, NvU32, NvU32, NvU32 *); - NV_STATUS (*__kfifoProgramChIdTable__)(struct OBJGPU *, struct KernelFifo *, CHID_MGR *, NvU32, NvU32, NvU32, struct Device *, NvU32, FIFO_ENGINE_LIST *); - NV_STATUS (*__kfifoRecoverAllChannels__)(struct OBJGPU *, struct KernelFifo *, NvU32); - NV_STATUS (*__kfifoGetEnginePbdmaFaultIds__)(struct OBJGPU *, struct KernelFifo *, ENGINE_INFO_TYPE, NvU32, NvU32 **, NvU32 *); - NvU32 (*__kfifoGetNumPBDMAs__)(struct OBJGPU *, struct KernelFifo *); - const char *(*__kfifoPrintPbdmaId__)(struct OBJGPU *, struct KernelFifo *, NvU32); - const char *(*__kfifoPrintInternalEngine__)(struct OBJGPU *, struct KernelFifo *, NvU32); - const char *(*__kfifoPrintInternalEngineCheck__)(struct OBJGPU *, struct KernelFifo *, NvU32); - const char *(*__kfifoGetClientIdStringCommon__)(struct OBJGPU *, struct KernelFifo *, FIFO_MMU_EXCEPTION_DATA *); - const char *(*__kfifoGetClientIdString__)(struct OBJGPU *, struct KernelFifo *, FIFO_MMU_EXCEPTION_DATA *); - const char *(*__kfifoGetClientIdStringCheck__)(struct OBJGPU *, struct KernelFifo *, NvU32); - NV_STATUS (*__kfifoStatePreLoad__)(POBJGPU, struct KernelFifo *, NvU32); - NV_STATUS (*__kfifoStatePostUnload__)(POBJGPU, struct KernelFifo *, NvU32); - NV_STATUS (*__kfifoStateInitUnlocked__)(POBJGPU, struct KernelFifo *); - void (*__kfifoInitMissing__)(POBJGPU, struct KernelFifo *); - NV_STATUS (*__kfifoStatePreInitLocked__)(POBJGPU, struct KernelFifo *); - NV_STATUS (*__kfifoStatePreInitUnlocked__)(POBJGPU, struct KernelFifo *); - NvBool (*__kfifoIsPresent__)(POBJGPU, struct KernelFifo *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct KernelFifo *__nvoc_pbase_KernelFifo; // kfifo + + // Vtable with 35 per-object function pointers + NV_STATUS (*__kfifoConstructEngine__)(struct OBJGPU *, struct KernelFifo * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kfifoStateLoad__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kfifoStateUnload__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kfifoStateInitLocked__)(struct OBJGPU *, struct KernelFifo * /*this*/); // virtual override (engstate) base (engstate) + void (*__kfifoStateDestroy__)(struct OBJGPU *, struct KernelFifo * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kfifoStatePostLoad__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kfifoStatePreUnload__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kfifoCheckChannelAllocAddrSpaces__)(struct KernelFifo * /*this*/, NV_ADDRESS_SPACE, NV_ADDRESS_SPACE, NV_ADDRESS_SPACE); // halified (2 hals) body + NV_STATUS (*__kfifoConstructUsermodeMemdescs__)(struct OBJGPU *, struct KernelFifo * /*this*/); // halified (2 hals) body + NvU32 (*__kfifoChannelGroupGetLocalMaxSubcontext__)(struct OBJGPU *, struct KernelFifo * /*this*/, struct KernelChannelGroup *, NvBool); // halified (2 hals) body + void (*__kfifoGetCtxBufferMapFlags__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32, NvU32 *); // halified (2 hals) body + NV_STATUS (*__kfifoEngineInfoXlate__)(struct OBJGPU *, struct KernelFifo * /*this*/, ENGINE_INFO_TYPE, NvU32, ENGINE_INFO_TYPE, NvU32 *); // halified (2 hals) body + NV_STATUS (*__kfifoGenerateWorkSubmitToken__)(struct OBJGPU *, struct KernelFifo * /*this*/, struct KernelChannel *, NvU32 *, NvBool); // halified (2 hals) + NV_STATUS (*__kfifoUpdateUsermodeDoorbell__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32, NvU32); // halified (2 hals) + NvU32 (*__kfifoRunlistGetBaseShift__)(struct KernelFifo * /*this*/); // halified (3 hals) body + NvU64 (*__kfifoGetUserdBar1MapStartOffset__)(struct OBJGPU *, struct KernelFifo * /*this*/); // halified (2 hals) body + NvU32 (*__kfifoGetMaxCeChannelGroups__)(struct OBJGPU *, struct KernelFifo * /*this*/); // halified (2 hals) body + NV_STATUS (*__kfifoGetVChIdForSChId__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32, NvU32, NvU32, NvU32 *); // halified (2 hals) body + NV_STATUS (*__kfifoProgramChIdTable__)(struct OBJGPU *, struct KernelFifo * /*this*/, CHID_MGR *, NvU32, NvU32, NvU32, struct Device *, NvU32, FIFO_ENGINE_LIST *); // halified (2 hals) body + NV_STATUS (*__kfifoRecoverAllChannels__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__kfifoGetEnginePbdmaFaultIds__)(struct OBJGPU *, struct KernelFifo * /*this*/, ENGINE_INFO_TYPE, NvU32, NvU32 **, NvU32 *); // halified (2 hals) body + NvU32 (*__kfifoGetNumPBDMAs__)(struct OBJGPU *, struct KernelFifo * /*this*/); // halified (2 hals) body + const char * (*__kfifoPrintPbdmaId__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // halified (2 hals) body + const char * (*__kfifoPrintInternalEngine__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // halified (4 hals) body + const char * (*__kfifoPrintInternalEngineCheck__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // halified (2 hals) body + const char * (*__kfifoGetClientIdStringCommon__)(struct OBJGPU *, struct KernelFifo * /*this*/, FIFO_MMU_EXCEPTION_DATA *); // halified (2 hals) body + const char * (*__kfifoGetClientIdString__)(struct OBJGPU *, struct KernelFifo * /*this*/, FIFO_MMU_EXCEPTION_DATA *); // halified (4 hals) body + const char * (*__kfifoGetClientIdStringCheck__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // halified (2 hals) body + void (*__kfifoInitMissing__)(POBJGPU, struct KernelFifo * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfifoStatePreInitLocked__)(POBJGPU, struct KernelFifo * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfifoStatePreInitUnlocked__)(POBJGPU, struct KernelFifo * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfifoStateInitUnlocked__)(POBJGPU, struct KernelFifo * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfifoStatePreLoad__)(POBJGPU, struct KernelFifo * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfifoStatePostUnload__)(POBJGPU, struct KernelFifo * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__kfifoIsPresent__)(POBJGPU, struct KernelFifo * /*this*/); // virtual inherited (engstate) base (engstate) + + // Data members struct KernelSchedMgr *pKernelSchedMgr; CHID_MGR **ppChidMgr; NvU32 numChidMgrs; @@ -478,6 +501,7 @@ typedef struct KernelFifo KernelFifo; #define __nvoc_class_id_KernelFifo 0xf3e155 #endif /* __nvoc_class_id_KernelFifo */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelFifo; #define __staticCast_KernelFifo(pThis) \ @@ -490,6 +514,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelFifo; ((KernelFifo*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelFifo))) #endif //__nvoc_kernel_fifo_h_disabled +// Property macros #define PDB_PROP_KFIFO_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_KFIFO_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -499,66 +524,245 @@ NV_STATUS __nvoc_objCreate_KernelFifo(KernelFifo**, Dynamic*, NvU32); #define __objCreate_KernelFifo(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelFifo((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define kfifoConstructEngine_FNPTR(pKernelFifo) pKernelFifo->__kfifoConstructEngine__ #define kfifoConstructEngine(pGpu, pKernelFifo, engDesc) kfifoConstructEngine_DISPATCH(pGpu, pKernelFifo, engDesc) +#define kfifoStateLoad_FNPTR(pKernelFifo) pKernelFifo->__kfifoStateLoad__ #define kfifoStateLoad(pGpu, pKernelFifo, flags) kfifoStateLoad_DISPATCH(pGpu, pKernelFifo, flags) #define kfifoStateLoad_HAL(pGpu, pKernelFifo, flags) kfifoStateLoad_DISPATCH(pGpu, pKernelFifo, flags) +#define kfifoStateUnload_FNPTR(pKernelFifo) pKernelFifo->__kfifoStateUnload__ #define kfifoStateUnload(pGpu, pKernelFifo, flags) kfifoStateUnload_DISPATCH(pGpu, pKernelFifo, flags) #define kfifoStateUnload_HAL(pGpu, pKernelFifo, flags) kfifoStateUnload_DISPATCH(pGpu, pKernelFifo, flags) +#define kfifoStateInitLocked_FNPTR(pKernelFifo) pKernelFifo->__kfifoStateInitLocked__ #define kfifoStateInitLocked(pGpu, pKernelFifo) kfifoStateInitLocked_DISPATCH(pGpu, pKernelFifo) +#define kfifoStateDestroy_FNPTR(pKernelFifo) pKernelFifo->__kfifoStateDestroy__ #define kfifoStateDestroy(pGpu, pKernelFifo) kfifoStateDestroy_DISPATCH(pGpu, pKernelFifo) +#define kfifoStatePostLoad_FNPTR(pKernelFifo) pKernelFifo->__kfifoStatePostLoad__ #define kfifoStatePostLoad(pGpu, pKernelFifo, flags) kfifoStatePostLoad_DISPATCH(pGpu, pKernelFifo, flags) #define kfifoStatePostLoad_HAL(pGpu, pKernelFifo, flags) kfifoStatePostLoad_DISPATCH(pGpu, pKernelFifo, flags) +#define kfifoStatePreUnload_FNPTR(pKernelFifo) pKernelFifo->__kfifoStatePreUnload__ #define kfifoStatePreUnload(pGpu, pKernelFifo, flags) kfifoStatePreUnload_DISPATCH(pGpu, pKernelFifo, flags) #define kfifoStatePreUnload_HAL(pGpu, pKernelFifo, flags) kfifoStatePreUnload_DISPATCH(pGpu, pKernelFifo, flags) +#define kfifoCheckChannelAllocAddrSpaces_FNPTR(pKernelFifo) pKernelFifo->__kfifoCheckChannelAllocAddrSpaces__ #define kfifoCheckChannelAllocAddrSpaces(pKernelFifo, userdAddrSpace, pushBuffAddrSpace, gpFifoAddrSpace) kfifoCheckChannelAllocAddrSpaces_DISPATCH(pKernelFifo, userdAddrSpace, pushBuffAddrSpace, gpFifoAddrSpace) #define kfifoCheckChannelAllocAddrSpaces_HAL(pKernelFifo, userdAddrSpace, pushBuffAddrSpace, gpFifoAddrSpace) kfifoCheckChannelAllocAddrSpaces_DISPATCH(pKernelFifo, userdAddrSpace, pushBuffAddrSpace, gpFifoAddrSpace) +#define kfifoConstructUsermodeMemdescs_FNPTR(pKernelFifo) pKernelFifo->__kfifoConstructUsermodeMemdescs__ #define kfifoConstructUsermodeMemdescs(pGpu, pKernelFifo) kfifoConstructUsermodeMemdescs_DISPATCH(pGpu, pKernelFifo) #define kfifoConstructUsermodeMemdescs_HAL(pGpu, pKernelFifo) kfifoConstructUsermodeMemdescs_DISPATCH(pGpu, pKernelFifo) -#define kfifoChannelGroupGetLocalMaxSubcontext(pGpu, pKernelFifo, arg0, arg1) kfifoChannelGroupGetLocalMaxSubcontext_DISPATCH(pGpu, pKernelFifo, arg0, arg1) -#define kfifoChannelGroupGetLocalMaxSubcontext_HAL(pGpu, pKernelFifo, arg0, arg1) kfifoChannelGroupGetLocalMaxSubcontext_DISPATCH(pGpu, pKernelFifo, arg0, arg1) +#define kfifoChannelGroupGetLocalMaxSubcontext_FNPTR(pKernelFifo) pKernelFifo->__kfifoChannelGroupGetLocalMaxSubcontext__ +#define kfifoChannelGroupGetLocalMaxSubcontext(pGpu, pKernelFifo, arg3, arg4) kfifoChannelGroupGetLocalMaxSubcontext_DISPATCH(pGpu, pKernelFifo, arg3, arg4) +#define kfifoChannelGroupGetLocalMaxSubcontext_HAL(pGpu, pKernelFifo, arg3, arg4) kfifoChannelGroupGetLocalMaxSubcontext_DISPATCH(pGpu, pKernelFifo, arg3, arg4) +#define kfifoGetCtxBufferMapFlags_FNPTR(pKernelFifo) pKernelFifo->__kfifoGetCtxBufferMapFlags__ #define kfifoGetCtxBufferMapFlags(pGpu, pKernelFifo, engine, pFlags) kfifoGetCtxBufferMapFlags_DISPATCH(pGpu, pKernelFifo, engine, pFlags) #define kfifoGetCtxBufferMapFlags_HAL(pGpu, pKernelFifo, engine, pFlags) kfifoGetCtxBufferMapFlags_DISPATCH(pGpu, pKernelFifo, engine, pFlags) +#define kfifoEngineInfoXlate_FNPTR(pKernelFifo) pKernelFifo->__kfifoEngineInfoXlate__ #define kfifoEngineInfoXlate(pGpu, pKernelFifo, inType, inVal, outType, pOutVal) kfifoEngineInfoXlate_DISPATCH(pGpu, pKernelFifo, inType, inVal, outType, pOutVal) #define kfifoEngineInfoXlate_HAL(pGpu, pKernelFifo, inType, inVal, outType, pOutVal) kfifoEngineInfoXlate_DISPATCH(pGpu, pKernelFifo, inType, inVal, outType, pOutVal) -#define kfifoGenerateWorkSubmitToken(pGpu, arg0, arg1, pGeneratedToken, bUsedForHost) kfifoGenerateWorkSubmitToken_DISPATCH(pGpu, arg0, arg1, pGeneratedToken, bUsedForHost) -#define kfifoGenerateWorkSubmitToken_HAL(pGpu, arg0, arg1, pGeneratedToken, bUsedForHost) kfifoGenerateWorkSubmitToken_DISPATCH(pGpu, arg0, arg1, pGeneratedToken, bUsedForHost) -#define kfifoUpdateUsermodeDoorbell(arg0, arg1, workSubmitToken, runlisId) kfifoUpdateUsermodeDoorbell_DISPATCH(arg0, arg1, workSubmitToken, runlisId) -#define kfifoUpdateUsermodeDoorbell_HAL(arg0, arg1, workSubmitToken, runlisId) kfifoUpdateUsermodeDoorbell_DISPATCH(arg0, arg1, workSubmitToken, runlisId) +#define kfifoGenerateWorkSubmitToken_FNPTR(arg_this) arg_this->__kfifoGenerateWorkSubmitToken__ +#define kfifoGenerateWorkSubmitToken(pGpu, arg_this, arg3, pGeneratedToken, bUsedForHost) kfifoGenerateWorkSubmitToken_DISPATCH(pGpu, arg_this, arg3, pGeneratedToken, bUsedForHost) +#define kfifoGenerateWorkSubmitToken_HAL(pGpu, arg_this, arg3, pGeneratedToken, bUsedForHost) kfifoGenerateWorkSubmitToken_DISPATCH(pGpu, arg_this, arg3, pGeneratedToken, bUsedForHost) +#define kfifoUpdateUsermodeDoorbell_FNPTR(arg_this) arg_this->__kfifoUpdateUsermodeDoorbell__ +#define kfifoUpdateUsermodeDoorbell(arg1, arg_this, workSubmitToken, runlisId) kfifoUpdateUsermodeDoorbell_DISPATCH(arg1, arg_this, workSubmitToken, runlisId) +#define kfifoUpdateUsermodeDoorbell_HAL(arg1, arg_this, workSubmitToken, runlisId) kfifoUpdateUsermodeDoorbell_DISPATCH(arg1, arg_this, workSubmitToken, runlisId) +#define kfifoRunlistGetBaseShift_FNPTR(pKernelFifo) pKernelFifo->__kfifoRunlistGetBaseShift__ #define kfifoRunlistGetBaseShift(pKernelFifo) kfifoRunlistGetBaseShift_DISPATCH(pKernelFifo) #define kfifoRunlistGetBaseShift_HAL(pKernelFifo) kfifoRunlistGetBaseShift_DISPATCH(pKernelFifo) +#define kfifoGetUserdBar1MapStartOffset_FNPTR(pKernelFifo) pKernelFifo->__kfifoGetUserdBar1MapStartOffset__ #define kfifoGetUserdBar1MapStartOffset(pGpu, pKernelFifo) kfifoGetUserdBar1MapStartOffset_DISPATCH(pGpu, pKernelFifo) #define kfifoGetUserdBar1MapStartOffset_HAL(pGpu, pKernelFifo) kfifoGetUserdBar1MapStartOffset_DISPATCH(pGpu, pKernelFifo) +#define kfifoGetMaxCeChannelGroups_FNPTR(pKernelFifo) pKernelFifo->__kfifoGetMaxCeChannelGroups__ #define kfifoGetMaxCeChannelGroups(pGpu, pKernelFifo) kfifoGetMaxCeChannelGroups_DISPATCH(pGpu, pKernelFifo) #define kfifoGetMaxCeChannelGroups_HAL(pGpu, pKernelFifo) kfifoGetMaxCeChannelGroups_DISPATCH(pGpu, pKernelFifo) +#define kfifoGetVChIdForSChId_FNPTR(pKernelFifo) pKernelFifo->__kfifoGetVChIdForSChId__ #define kfifoGetVChIdForSChId(pGpu, pKernelFifo, chId, gfid, engineId, pVChid) kfifoGetVChIdForSChId_DISPATCH(pGpu, pKernelFifo, chId, gfid, engineId, pVChid) #define kfifoGetVChIdForSChId_HAL(pGpu, pKernelFifo, chId, gfid, engineId, pVChid) kfifoGetVChIdForSChId_DISPATCH(pGpu, pKernelFifo, chId, gfid, engineId, pVChid) +#define kfifoProgramChIdTable_FNPTR(pKernelFifo) pKernelFifo->__kfifoProgramChIdTable__ #define kfifoProgramChIdTable(pGpu, pKernelFifo, pChidMgr, offset, numChannels, gfid, pMigDevice, engineFifoListNumEntries, pEngineFifoList) kfifoProgramChIdTable_DISPATCH(pGpu, pKernelFifo, pChidMgr, offset, numChannels, gfid, pMigDevice, engineFifoListNumEntries, pEngineFifoList) #define kfifoProgramChIdTable_HAL(pGpu, pKernelFifo, pChidMgr, offset, numChannels, gfid, pMigDevice, engineFifoListNumEntries, pEngineFifoList) kfifoProgramChIdTable_DISPATCH(pGpu, pKernelFifo, pChidMgr, offset, numChannels, gfid, pMigDevice, engineFifoListNumEntries, pEngineFifoList) +#define kfifoRecoverAllChannels_FNPTR(pKernelFifo) pKernelFifo->__kfifoRecoverAllChannels__ #define kfifoRecoverAllChannels(pGpu, pKernelFifo, gfid) kfifoRecoverAllChannels_DISPATCH(pGpu, pKernelFifo, gfid) #define kfifoRecoverAllChannels_HAL(pGpu, pKernelFifo, gfid) kfifoRecoverAllChannels_DISPATCH(pGpu, pKernelFifo, gfid) -#define kfifoGetEnginePbdmaFaultIds(pGpu, pKernelFifo, arg0, arg1, arg2, arg3) kfifoGetEnginePbdmaFaultIds_DISPATCH(pGpu, pKernelFifo, arg0, arg1, arg2, arg3) -#define kfifoGetEnginePbdmaFaultIds_HAL(pGpu, pKernelFifo, arg0, arg1, arg2, arg3) kfifoGetEnginePbdmaFaultIds_DISPATCH(pGpu, pKernelFifo, arg0, arg1, arg2, arg3) +#define kfifoGetEnginePbdmaFaultIds_FNPTR(pKernelFifo) pKernelFifo->__kfifoGetEnginePbdmaFaultIds__ +#define kfifoGetEnginePbdmaFaultIds(pGpu, pKernelFifo, arg3, arg4, arg5, arg6) kfifoGetEnginePbdmaFaultIds_DISPATCH(pGpu, pKernelFifo, arg3, arg4, arg5, arg6) +#define kfifoGetEnginePbdmaFaultIds_HAL(pGpu, pKernelFifo, arg3, arg4, arg5, arg6) kfifoGetEnginePbdmaFaultIds_DISPATCH(pGpu, pKernelFifo, arg3, arg4, arg5, arg6) +#define kfifoGetNumPBDMAs_FNPTR(pKernelFifo) pKernelFifo->__kfifoGetNumPBDMAs__ #define kfifoGetNumPBDMAs(pGpu, pKernelFifo) kfifoGetNumPBDMAs_DISPATCH(pGpu, pKernelFifo) #define kfifoGetNumPBDMAs_HAL(pGpu, pKernelFifo) kfifoGetNumPBDMAs_DISPATCH(pGpu, pKernelFifo) +#define kfifoPrintPbdmaId_FNPTR(pKernelFifo) pKernelFifo->__kfifoPrintPbdmaId__ #define kfifoPrintPbdmaId(pGpu, pKernelFifo, pbdmaId) kfifoPrintPbdmaId_DISPATCH(pGpu, pKernelFifo, pbdmaId) #define kfifoPrintPbdmaId_HAL(pGpu, pKernelFifo, pbdmaId) kfifoPrintPbdmaId_DISPATCH(pGpu, pKernelFifo, pbdmaId) -#define kfifoPrintInternalEngine(pGpu, pKernelFifo, arg0) kfifoPrintInternalEngine_DISPATCH(pGpu, pKernelFifo, arg0) -#define kfifoPrintInternalEngine_HAL(pGpu, pKernelFifo, arg0) kfifoPrintInternalEngine_DISPATCH(pGpu, pKernelFifo, arg0) -#define kfifoPrintInternalEngineCheck(pGpu, pKernelFifo, arg0) kfifoPrintInternalEngineCheck_DISPATCH(pGpu, pKernelFifo, arg0) -#define kfifoPrintInternalEngineCheck_HAL(pGpu, pKernelFifo, arg0) kfifoPrintInternalEngineCheck_DISPATCH(pGpu, pKernelFifo, arg0) -#define kfifoGetClientIdStringCommon(pGpu, pKernelFifo, arg0) kfifoGetClientIdStringCommon_DISPATCH(pGpu, pKernelFifo, arg0) -#define kfifoGetClientIdStringCommon_HAL(pGpu, pKernelFifo, arg0) kfifoGetClientIdStringCommon_DISPATCH(pGpu, pKernelFifo, arg0) -#define kfifoGetClientIdString(pGpu, pKernelFifo, arg0) kfifoGetClientIdString_DISPATCH(pGpu, pKernelFifo, arg0) -#define kfifoGetClientIdString_HAL(pGpu, pKernelFifo, arg0) kfifoGetClientIdString_DISPATCH(pGpu, pKernelFifo, arg0) -#define kfifoGetClientIdStringCheck(pGpu, pKernelFifo, arg0) kfifoGetClientIdStringCheck_DISPATCH(pGpu, pKernelFifo, arg0) -#define kfifoGetClientIdStringCheck_HAL(pGpu, pKernelFifo, arg0) kfifoGetClientIdStringCheck_DISPATCH(pGpu, pKernelFifo, arg0) -#define kfifoStatePreLoad(pGpu, pEngstate, arg0) kfifoStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kfifoStatePostUnload(pGpu, pEngstate, arg0) kfifoStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kfifoStateInitUnlocked(pGpu, pEngstate) kfifoStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kfifoPrintInternalEngine_FNPTR(pKernelFifo) pKernelFifo->__kfifoPrintInternalEngine__ +#define kfifoPrintInternalEngine(pGpu, pKernelFifo, arg3) kfifoPrintInternalEngine_DISPATCH(pGpu, pKernelFifo, arg3) +#define kfifoPrintInternalEngine_HAL(pGpu, pKernelFifo, arg3) kfifoPrintInternalEngine_DISPATCH(pGpu, pKernelFifo, arg3) +#define kfifoPrintInternalEngineCheck_FNPTR(pKernelFifo) pKernelFifo->__kfifoPrintInternalEngineCheck__ +#define kfifoPrintInternalEngineCheck(pGpu, pKernelFifo, arg3) kfifoPrintInternalEngineCheck_DISPATCH(pGpu, pKernelFifo, arg3) +#define kfifoPrintInternalEngineCheck_HAL(pGpu, pKernelFifo, arg3) kfifoPrintInternalEngineCheck_DISPATCH(pGpu, pKernelFifo, arg3) +#define kfifoGetClientIdStringCommon_FNPTR(pKernelFifo) pKernelFifo->__kfifoGetClientIdStringCommon__ +#define kfifoGetClientIdStringCommon(pGpu, pKernelFifo, arg3) kfifoGetClientIdStringCommon_DISPATCH(pGpu, pKernelFifo, arg3) +#define kfifoGetClientIdStringCommon_HAL(pGpu, pKernelFifo, arg3) kfifoGetClientIdStringCommon_DISPATCH(pGpu, pKernelFifo, arg3) +#define kfifoGetClientIdString_FNPTR(pKernelFifo) pKernelFifo->__kfifoGetClientIdString__ +#define kfifoGetClientIdString(pGpu, pKernelFifo, arg3) kfifoGetClientIdString_DISPATCH(pGpu, pKernelFifo, arg3) +#define kfifoGetClientIdString_HAL(pGpu, pKernelFifo, arg3) kfifoGetClientIdString_DISPATCH(pGpu, pKernelFifo, arg3) +#define kfifoGetClientIdStringCheck_FNPTR(pKernelFifo) pKernelFifo->__kfifoGetClientIdStringCheck__ +#define kfifoGetClientIdStringCheck(pGpu, pKernelFifo, arg3) kfifoGetClientIdStringCheck_DISPATCH(pGpu, pKernelFifo, arg3) +#define kfifoGetClientIdStringCheck_HAL(pGpu, pKernelFifo, arg3) kfifoGetClientIdStringCheck_DISPATCH(pGpu, pKernelFifo, arg3) +#define kfifoInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define kfifoInitMissing(pGpu, pEngstate) kfifoInitMissing_DISPATCH(pGpu, pEngstate) +#define kfifoStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define kfifoStatePreInitLocked(pGpu, pEngstate) kfifoStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define kfifoStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define kfifoStatePreInitUnlocked(pGpu, pEngstate) kfifoStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kfifoStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kfifoStateInitUnlocked(pGpu, pEngstate) kfifoStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kfifoStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kfifoStatePreLoad(pGpu, pEngstate, arg3) kfifoStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kfifoStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kfifoStatePostUnload(pGpu, pEngstate, arg3) kfifoStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kfifoIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define kfifoIsPresent(pGpu, pEngstate) kfifoIsPresent_DISPATCH(pGpu, pEngstate) + +// Dispatch functions +static inline NV_STATUS kfifoConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, ENGDESCRIPTOR engDesc) { + return pKernelFifo->__kfifoConstructEngine__(pGpu, pKernelFifo, engDesc); +} + +static inline NV_STATUS kfifoStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 flags) { + return pKernelFifo->__kfifoStateLoad__(pGpu, pKernelFifo, flags); +} + +static inline NV_STATUS kfifoStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 flags) { + return pKernelFifo->__kfifoStateUnload__(pGpu, pKernelFifo, flags); +} + +static inline NV_STATUS kfifoStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo) { + return pKernelFifo->__kfifoStateInitLocked__(pGpu, pKernelFifo); +} + +static inline void kfifoStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo) { + pKernelFifo->__kfifoStateDestroy__(pGpu, pKernelFifo); +} + +static inline NV_STATUS kfifoStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 flags) { + return pKernelFifo->__kfifoStatePostLoad__(pGpu, pKernelFifo, flags); +} + +static inline NV_STATUS kfifoStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 flags) { + return pKernelFifo->__kfifoStatePreUnload__(pGpu, pKernelFifo, flags); +} + +static inline NV_STATUS kfifoCheckChannelAllocAddrSpaces_DISPATCH(struct KernelFifo *pKernelFifo, NV_ADDRESS_SPACE userdAddrSpace, NV_ADDRESS_SPACE pushBuffAddrSpace, NV_ADDRESS_SPACE gpFifoAddrSpace) { + return pKernelFifo->__kfifoCheckChannelAllocAddrSpaces__(pKernelFifo, userdAddrSpace, pushBuffAddrSpace, gpFifoAddrSpace); +} + +static inline NV_STATUS kfifoConstructUsermodeMemdescs_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo) { + return pKernelFifo->__kfifoConstructUsermodeMemdescs__(pGpu, pKernelFifo); +} + +static inline NvU32 kfifoChannelGroupGetLocalMaxSubcontext_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannelGroup *arg3, NvBool arg4) { + return pKernelFifo->__kfifoChannelGroupGetLocalMaxSubcontext__(pGpu, pKernelFifo, arg3, arg4); +} + +static inline void kfifoGetCtxBufferMapFlags_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 engine, NvU32 *pFlags) { + pKernelFifo->__kfifoGetCtxBufferMapFlags__(pGpu, pKernelFifo, engine, pFlags); +} + +static inline NV_STATUS kfifoEngineInfoXlate_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, ENGINE_INFO_TYPE inType, NvU32 inVal, ENGINE_INFO_TYPE outType, NvU32 *pOutVal) { + return pKernelFifo->__kfifoEngineInfoXlate__(pGpu, pKernelFifo, inType, inVal, outType, pOutVal); +} + +static inline NV_STATUS kfifoGenerateWorkSubmitToken_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *arg_this, struct KernelChannel *arg3, NvU32 *pGeneratedToken, NvBool bUsedForHost) { + return arg_this->__kfifoGenerateWorkSubmitToken__(pGpu, arg_this, arg3, pGeneratedToken, bUsedForHost); +} + +static inline NV_STATUS kfifoUpdateUsermodeDoorbell_DISPATCH(struct OBJGPU *arg1, struct KernelFifo *arg_this, NvU32 workSubmitToken, NvU32 runlisId) { + return arg_this->__kfifoUpdateUsermodeDoorbell__(arg1, arg_this, workSubmitToken, runlisId); +} + +static inline NvU32 kfifoRunlistGetBaseShift_DISPATCH(struct KernelFifo *pKernelFifo) { + return pKernelFifo->__kfifoRunlistGetBaseShift__(pKernelFifo); +} + +static inline NvU64 kfifoGetUserdBar1MapStartOffset_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo) { + return pKernelFifo->__kfifoGetUserdBar1MapStartOffset__(pGpu, pKernelFifo); +} + +static inline NvU32 kfifoGetMaxCeChannelGroups_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo) { + return pKernelFifo->__kfifoGetMaxCeChannelGroups__(pGpu, pKernelFifo); +} + +static inline NV_STATUS kfifoGetVChIdForSChId_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 chId, NvU32 gfid, NvU32 engineId, NvU32 *pVChid) { + return pKernelFifo->__kfifoGetVChIdForSChId__(pGpu, pKernelFifo, chId, gfid, engineId, pVChid); +} + +static inline NV_STATUS kfifoProgramChIdTable_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, CHID_MGR *pChidMgr, NvU32 offset, NvU32 numChannels, NvU32 gfid, struct Device *pMigDevice, NvU32 engineFifoListNumEntries, FIFO_ENGINE_LIST *pEngineFifoList) { + return pKernelFifo->__kfifoProgramChIdTable__(pGpu, pKernelFifo, pChidMgr, offset, numChannels, gfid, pMigDevice, engineFifoListNumEntries, pEngineFifoList); +} + +static inline NV_STATUS kfifoRecoverAllChannels_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 gfid) { + return pKernelFifo->__kfifoRecoverAllChannels__(pGpu, pKernelFifo, gfid); +} + +static inline NV_STATUS kfifoGetEnginePbdmaFaultIds_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, ENGINE_INFO_TYPE arg3, NvU32 arg4, NvU32 **arg5, NvU32 *arg6) { + return pKernelFifo->__kfifoGetEnginePbdmaFaultIds__(pGpu, pKernelFifo, arg3, arg4, arg5, arg6); +} + +static inline NvU32 kfifoGetNumPBDMAs_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo) { + return pKernelFifo->__kfifoGetNumPBDMAs__(pGpu, pKernelFifo); +} + +static inline const char * kfifoPrintPbdmaId_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 pbdmaId) { + return pKernelFifo->__kfifoPrintPbdmaId__(pGpu, pKernelFifo, pbdmaId); +} + +static inline const char * kfifoPrintInternalEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3) { + return pKernelFifo->__kfifoPrintInternalEngine__(pGpu, pKernelFifo, arg3); +} + +static inline const char * kfifoPrintInternalEngineCheck_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3) { + return pKernelFifo->__kfifoPrintInternalEngineCheck__(pGpu, pKernelFifo, arg3); +} + +static inline const char * kfifoGetClientIdStringCommon_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, FIFO_MMU_EXCEPTION_DATA *arg3) { + return pKernelFifo->__kfifoGetClientIdStringCommon__(pGpu, pKernelFifo, arg3); +} + +static inline const char * kfifoGetClientIdString_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, FIFO_MMU_EXCEPTION_DATA *arg3) { + return pKernelFifo->__kfifoGetClientIdString__(pGpu, pKernelFifo, arg3); +} + +static inline const char * kfifoGetClientIdStringCheck_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3) { + return pKernelFifo->__kfifoGetClientIdStringCheck__(pGpu, pKernelFifo, arg3); +} + +static inline void kfifoInitMissing_DISPATCH(POBJGPU pGpu, struct KernelFifo *pEngstate) { + pEngstate->__kfifoInitMissing__(pGpu, pEngstate); +} + +static inline NV_STATUS kfifoStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelFifo *pEngstate) { + return pEngstate->__kfifoStatePreInitLocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kfifoStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelFifo *pEngstate) { + return pEngstate->__kfifoStatePreInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kfifoStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelFifo *pEngstate) { + return pEngstate->__kfifoStateInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kfifoStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelFifo *pEngstate, NvU32 arg3) { + return pEngstate->__kfifoStatePreLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS kfifoStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelFifo *pEngstate, NvU32 arg3) { + return pEngstate->__kfifoStatePostUnload__(pGpu, pEngstate, arg3); +} + +static inline NvBool kfifoIsPresent_DISPATCH(POBJGPU pGpu, struct KernelFifo *pEngstate) { + return pEngstate->__kfifoIsPresent__(pGpu, pEngstate); +} + NV_STATUS kfifoConstructHal_GM107(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo); @@ -758,47 +962,47 @@ static inline NV_STATUS kfifoChannelGetFifoContextMemDesc(struct OBJGPU *pGpu, s #define kfifoChannelGetFifoContextMemDesc_HAL(pGpu, pKernelFifo, pKernelChannel, engState, ppMemdesc) kfifoChannelGetFifoContextMemDesc(pGpu, pKernelFifo, pKernelChannel, engState, ppMemdesc) -NV_STATUS kfifoConvertInstToKernelChannel_GM107(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, INST_BLOCK_DESC *arg0, struct KernelChannel **arg1); +NV_STATUS kfifoConvertInstToKernelChannel_GM107(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, INST_BLOCK_DESC *arg3, struct KernelChannel **arg4); #ifdef __nvoc_kernel_fifo_h_disabled -static inline NV_STATUS kfifoConvertInstToKernelChannel(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, INST_BLOCK_DESC *arg0, struct KernelChannel **arg1) { +static inline NV_STATUS kfifoConvertInstToKernelChannel(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, INST_BLOCK_DESC *arg3, struct KernelChannel **arg4) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoConvertInstToKernelChannel(pGpu, pKernelFifo, arg0, arg1) kfifoConvertInstToKernelChannel_GM107(pGpu, pKernelFifo, arg0, arg1) +#define kfifoConvertInstToKernelChannel(pGpu, pKernelFifo, arg3, arg4) kfifoConvertInstToKernelChannel_GM107(pGpu, pKernelFifo, arg3, arg4) #endif //__nvoc_kernel_fifo_h_disabled -#define kfifoConvertInstToKernelChannel_HAL(pGpu, pKernelFifo, arg0, arg1) kfifoConvertInstToKernelChannel(pGpu, pKernelFifo, arg0, arg1) +#define kfifoConvertInstToKernelChannel_HAL(pGpu, pKernelFifo, arg3, arg4) kfifoConvertInstToKernelChannel(pGpu, pKernelFifo, arg3, arg4) -NV_STATUS kfifoGetUsermodeMapInfo_GV100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU64 *arg0, NvU32 *arg1); +NV_STATUS kfifoGetUsermodeMapInfo_GV100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU64 *arg3, NvU32 *arg4); #ifdef __nvoc_kernel_fifo_h_disabled -static inline NV_STATUS kfifoGetUsermodeMapInfo(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU64 *arg0, NvU32 *arg1) { +static inline NV_STATUS kfifoGetUsermodeMapInfo(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU64 *arg3, NvU32 *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoGetUsermodeMapInfo(pGpu, pKernelFifo, arg0, arg1) kfifoGetUsermodeMapInfo_GV100(pGpu, pKernelFifo, arg0, arg1) +#define kfifoGetUsermodeMapInfo(pGpu, pKernelFifo, arg3, arg4) kfifoGetUsermodeMapInfo_GV100(pGpu, pKernelFifo, arg3, arg4) #endif //__nvoc_kernel_fifo_h_disabled -#define kfifoGetUsermodeMapInfo_HAL(pGpu, pKernelFifo, arg0, arg1) kfifoGetUsermodeMapInfo(pGpu, pKernelFifo, arg0, arg1) +#define kfifoGetUsermodeMapInfo_HAL(pGpu, pKernelFifo, arg3, arg4) kfifoGetUsermodeMapInfo(pGpu, pKernelFifo, arg3, arg4) -NvU32 kfifoGetMaxSubcontext_GV100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvBool arg0); +NvU32 kfifoGetMaxSubcontext_GV100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvBool arg3); #ifdef __nvoc_kernel_fifo_h_disabled -static inline NvU32 kfifoGetMaxSubcontext(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvBool arg0) { +static inline NvU32 kfifoGetMaxSubcontext(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvBool arg3) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return 0; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoGetMaxSubcontext(pGpu, pKernelFifo, arg0) kfifoGetMaxSubcontext_GV100(pGpu, pKernelFifo, arg0) +#define kfifoGetMaxSubcontext(pGpu, pKernelFifo, arg3) kfifoGetMaxSubcontext_GV100(pGpu, pKernelFifo, arg3) #endif //__nvoc_kernel_fifo_h_disabled -#define kfifoGetMaxSubcontext_HAL(pGpu, pKernelFifo, arg0) kfifoGetMaxSubcontext(pGpu, pKernelFifo, arg0) +#define kfifoGetMaxSubcontext_HAL(pGpu, pKernelFifo, arg3) kfifoGetMaxSubcontext(pGpu, pKernelFifo, arg3) NvU32 kfifoGetMaxSubcontextFromGr_KERNEL(struct OBJGPU *pGpu, struct KernelFifo *pKernel); @@ -904,62 +1108,62 @@ static inline NV_STATUS kfifoGetHostDeviceInfoTable(struct OBJGPU *pGpu, struct #define kfifoGetHostDeviceInfoTable_HAL(pGpu, pKernelFifo, pEngineInfo, pMigDevice) kfifoGetHostDeviceInfoTable(pGpu, pKernelFifo, pEngineInfo, pMigDevice) -void kfifoGetSubctxType_GV100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannel *arg0, NvU32 *arg1); +void kfifoGetSubctxType_GV100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannel *arg3, NvU32 *arg4); #ifdef __nvoc_kernel_fifo_h_disabled -static inline void kfifoGetSubctxType(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannel *arg0, NvU32 *arg1) { +static inline void kfifoGetSubctxType(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannel *arg3, NvU32 *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoGetSubctxType(pGpu, pKernelFifo, arg0, arg1) kfifoGetSubctxType_GV100(pGpu, pKernelFifo, arg0, arg1) +#define kfifoGetSubctxType(pGpu, pKernelFifo, arg3, arg4) kfifoGetSubctxType_GV100(pGpu, pKernelFifo, arg3, arg4) #endif //__nvoc_kernel_fifo_h_disabled -#define kfifoGetSubctxType_HAL(pGpu, pKernelFifo, arg0, arg1) kfifoGetSubctxType(pGpu, pKernelFifo, arg0, arg1) +#define kfifoGetSubctxType_HAL(pGpu, pKernelFifo, arg3, arg4) kfifoGetSubctxType(pGpu, pKernelFifo, arg3, arg4) -static inline NV_STATUS kfifoGenerateInternalWorkSubmitToken_c04480(struct OBJGPU *pGpu, struct KernelFifo *arg0, struct KernelChannel *arg1) { +static inline NV_STATUS kfifoGenerateInternalWorkSubmitToken_c04480(struct OBJGPU *pGpu, struct KernelFifo *arg2, struct KernelChannel *arg3, NvU32 *pGeneratedToken) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -NV_STATUS kfifoGenerateInternalWorkSubmitToken_GA100(struct OBJGPU *pGpu, struct KernelFifo *arg0, struct KernelChannel *arg1); +NV_STATUS kfifoGenerateInternalWorkSubmitToken_GA100(struct OBJGPU *pGpu, struct KernelFifo *arg2, struct KernelChannel *arg3, NvU32 *pGeneratedToken); -static inline NV_STATUS kfifoGenerateInternalWorkSubmitToken_5baef9(struct OBJGPU *pGpu, struct KernelFifo *arg0, struct KernelChannel *arg1) { +static inline NV_STATUS kfifoGenerateInternalWorkSubmitToken_5baef9(struct OBJGPU *pGpu, struct KernelFifo *arg2, struct KernelChannel *arg3, NvU32 *pGeneratedToken) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } #ifdef __nvoc_kernel_fifo_h_disabled -static inline NV_STATUS kfifoGenerateInternalWorkSubmitToken(struct OBJGPU *pGpu, struct KernelFifo *arg0, struct KernelChannel *arg1) { +static inline NV_STATUS kfifoGenerateInternalWorkSubmitToken(struct OBJGPU *pGpu, struct KernelFifo *arg2, struct KernelChannel *arg3, NvU32 *pGeneratedToken) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoGenerateInternalWorkSubmitToken(pGpu, arg0, arg1) kfifoGenerateInternalWorkSubmitToken_c04480(pGpu, arg0, arg1) +#define kfifoGenerateInternalWorkSubmitToken(pGpu, arg2, arg3, pGeneratedToken) kfifoGenerateInternalWorkSubmitToken_c04480(pGpu, arg2, arg3, pGeneratedToken) #endif //__nvoc_kernel_fifo_h_disabled -#define kfifoGenerateInternalWorkSubmitToken_HAL(pGpu, arg0, arg1) kfifoGenerateInternalWorkSubmitToken(pGpu, arg0, arg1) +#define kfifoGenerateInternalWorkSubmitToken_HAL(pGpu, arg2, arg3, pGeneratedToken) kfifoGenerateInternalWorkSubmitToken(pGpu, arg2, arg3, pGeneratedToken) -static inline NV_STATUS kfifoUpdateInternalDoorbellForUsermode_c04480(struct OBJGPU *arg0, struct KernelFifo *arg1, NvU32 workSubmitToken, NvU32 runlisId) { +static inline NV_STATUS kfifoUpdateInternalDoorbellForUsermode_c04480(struct OBJGPU *arg1, struct KernelFifo *arg2, NvU32 workSubmitToken, NvU32 runlisId) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -NV_STATUS kfifoUpdateInternalDoorbellForUsermode_GA100(struct OBJGPU *arg0, struct KernelFifo *arg1, NvU32 workSubmitToken, NvU32 runlisId); +NV_STATUS kfifoUpdateInternalDoorbellForUsermode_GA100(struct OBJGPU *arg1, struct KernelFifo *arg2, NvU32 workSubmitToken, NvU32 runlisId); -static inline NV_STATUS kfifoUpdateInternalDoorbellForUsermode_5baef9(struct OBJGPU *arg0, struct KernelFifo *arg1, NvU32 workSubmitToken, NvU32 runlisId) { +static inline NV_STATUS kfifoUpdateInternalDoorbellForUsermode_5baef9(struct OBJGPU *arg1, struct KernelFifo *arg2, NvU32 workSubmitToken, NvU32 runlisId) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } #ifdef __nvoc_kernel_fifo_h_disabled -static inline NV_STATUS kfifoUpdateInternalDoorbellForUsermode(struct OBJGPU *arg0, struct KernelFifo *arg1, NvU32 workSubmitToken, NvU32 runlisId) { +static inline NV_STATUS kfifoUpdateInternalDoorbellForUsermode(struct OBJGPU *arg1, struct KernelFifo *arg2, NvU32 workSubmitToken, NvU32 runlisId) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoUpdateInternalDoorbellForUsermode(arg0, arg1, workSubmitToken, runlisId) kfifoUpdateInternalDoorbellForUsermode_c04480(arg0, arg1, workSubmitToken, runlisId) +#define kfifoUpdateInternalDoorbellForUsermode(arg1, arg2, workSubmitToken, runlisId) kfifoUpdateInternalDoorbellForUsermode_c04480(arg1, arg2, workSubmitToken, runlisId) #endif //__nvoc_kernel_fifo_h_disabled -#define kfifoUpdateInternalDoorbellForUsermode_HAL(arg0, arg1, workSubmitToken, runlisId) kfifoUpdateInternalDoorbellForUsermode(arg0, arg1, workSubmitToken, runlisId) +#define kfifoUpdateInternalDoorbellForUsermode_HAL(arg1, arg2, workSubmitToken, runlisId) kfifoUpdateInternalDoorbellForUsermode(arg1, arg2, workSubmitToken, runlisId) static inline NvBool kfifoIsLiteModeEnabled_491d52(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo) { return ((NvBool)(0 != 0)); @@ -1033,21 +1237,21 @@ static inline NV_STATUS kfifoGetEnginePbdmaIds(struct OBJGPU *pGpu, struct Kerne #define kfifoGetEnginePbdmaIds_HAL(pGpu, pKernelFifo, type, val, ppPbdmaIds, pNumPbdmas) kfifoGetEnginePbdmaIds(pGpu, pKernelFifo, type, val, ppPbdmaIds, pNumPbdmas) -static inline NV_STATUS kfifoReservePbdmaFaultIds_56cd7a(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, FIFO_ENGINE_LIST *arg0, NvU32 arg1) { +static inline NV_STATUS kfifoReservePbdmaFaultIds_56cd7a(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, FIFO_ENGINE_LIST *arg3, NvU32 arg4) { return NV_OK; } #ifdef __nvoc_kernel_fifo_h_disabled -static inline NV_STATUS kfifoReservePbdmaFaultIds(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, FIFO_ENGINE_LIST *arg0, NvU32 arg1) { +static inline NV_STATUS kfifoReservePbdmaFaultIds(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, FIFO_ENGINE_LIST *arg3, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoReservePbdmaFaultIds(pGpu, pKernelFifo, arg0, arg1) kfifoReservePbdmaFaultIds_56cd7a(pGpu, pKernelFifo, arg0, arg1) +#define kfifoReservePbdmaFaultIds(pGpu, pKernelFifo, arg3, arg4) kfifoReservePbdmaFaultIds_56cd7a(pGpu, pKernelFifo, arg3, arg4) #endif //__nvoc_kernel_fifo_h_disabled -#define kfifoReservePbdmaFaultIds_HAL(pGpu, pKernelFifo, arg0, arg1) kfifoReservePbdmaFaultIds(pGpu, pKernelFifo, arg0, arg1) +#define kfifoReservePbdmaFaultIds_HAL(pGpu, pKernelFifo, arg3, arg4) kfifoReservePbdmaFaultIds(pGpu, pKernelFifo, arg3, arg4) NV_STATUS kfifoGetEnginePartnerList_GM107(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NV2080_CTRL_GPU_GET_ENGINE_PARTNERLIST_PARAMS *pParams); @@ -1063,35 +1267,35 @@ static inline NV_STATUS kfifoGetEnginePartnerList(struct OBJGPU *pGpu, struct Ke #define kfifoGetEnginePartnerList_HAL(pGpu, pKernelFifo, pParams) kfifoGetEnginePartnerList(pGpu, pKernelFifo, pParams) -static inline NvBool kfifoRunlistIsTsgHeaderSupported_cbe027(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0) { +static inline NvBool kfifoRunlistIsTsgHeaderSupported_cbe027(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3) { return ((NvBool)(0 == 0)); } #ifdef __nvoc_kernel_fifo_h_disabled -static inline NvBool kfifoRunlistIsTsgHeaderSupported(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0) { +static inline NvBool kfifoRunlistIsTsgHeaderSupported(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoRunlistIsTsgHeaderSupported(pGpu, pKernelFifo, arg0) kfifoRunlistIsTsgHeaderSupported_cbe027(pGpu, pKernelFifo, arg0) +#define kfifoRunlistIsTsgHeaderSupported(pGpu, pKernelFifo, arg3) kfifoRunlistIsTsgHeaderSupported_cbe027(pGpu, pKernelFifo, arg3) #endif //__nvoc_kernel_fifo_h_disabled -#define kfifoRunlistIsTsgHeaderSupported_HAL(pGpu, pKernelFifo, arg0) kfifoRunlistIsTsgHeaderSupported(pGpu, pKernelFifo, arg0) +#define kfifoRunlistIsTsgHeaderSupported_HAL(pGpu, pKernelFifo, arg3) kfifoRunlistIsTsgHeaderSupported(pGpu, pKernelFifo, arg3) -NvU32 kfifoRunlistGetEntrySize_GV100(struct KernelFifo *arg0); +NvU32 kfifoRunlistGetEntrySize_GV100(struct KernelFifo *arg1); #ifdef __nvoc_kernel_fifo_h_disabled -static inline NvU32 kfifoRunlistGetEntrySize(struct KernelFifo *arg0) { +static inline NvU32 kfifoRunlistGetEntrySize(struct KernelFifo *arg1) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return 0; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoRunlistGetEntrySize(arg0) kfifoRunlistGetEntrySize_GV100(arg0) +#define kfifoRunlistGetEntrySize(arg1) kfifoRunlistGetEntrySize_GV100(arg1) #endif //__nvoc_kernel_fifo_h_disabled -#define kfifoRunlistGetEntrySize_HAL(arg0) kfifoRunlistGetEntrySize(arg0) +#define kfifoRunlistGetEntrySize_HAL(arg1) kfifoRunlistGetEntrySize(arg1) static inline void kfifoSetupBar1UserdSnoop_b3696a(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvBool bEnable, NvU64 offset) { return; @@ -1234,33 +1438,33 @@ static inline NV_STATUS kfifoGetMaxSecureChannels(struct OBJGPU *pGpu, struct Ke #define kfifoGetMaxSecureChannels_HAL(pGpu, pKernelFifo) kfifoGetMaxSecureChannels(pGpu, pKernelFifo) -NV_STATUS kfifoRunlistSetId_GM107(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannel *arg0, NvU32 runlistId); +NV_STATUS kfifoRunlistSetId_GM107(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannel *arg3, NvU32 runlistId); #ifdef __nvoc_kernel_fifo_h_disabled -static inline NV_STATUS kfifoRunlistSetId(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannel *arg0, NvU32 runlistId) { +static inline NV_STATUS kfifoRunlistSetId(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannel *arg3, NvU32 runlistId) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoRunlistSetId(pGpu, pKernelFifo, arg0, runlistId) kfifoRunlistSetId_GM107(pGpu, pKernelFifo, arg0, runlistId) +#define kfifoRunlistSetId(pGpu, pKernelFifo, arg3, runlistId) kfifoRunlistSetId_GM107(pGpu, pKernelFifo, arg3, runlistId) #endif //__nvoc_kernel_fifo_h_disabled -#define kfifoRunlistSetId_HAL(pGpu, pKernelFifo, arg0, runlistId) kfifoRunlistSetId(pGpu, pKernelFifo, arg0, runlistId) +#define kfifoRunlistSetId_HAL(pGpu, pKernelFifo, arg3, runlistId) kfifoRunlistSetId(pGpu, pKernelFifo, arg3, runlistId) -NV_STATUS kfifoRunlistSetIdByEngine_GM107(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannel *arg0, NvU32 engDesc); +NV_STATUS kfifoRunlistSetIdByEngine_GM107(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannel *arg3, NvU32 engDesc); #ifdef __nvoc_kernel_fifo_h_disabled -static inline NV_STATUS kfifoRunlistSetIdByEngine(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannel *arg0, NvU32 engDesc) { +static inline NV_STATUS kfifoRunlistSetIdByEngine(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannel *arg3, NvU32 engDesc) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoRunlistSetIdByEngine(pGpu, pKernelFifo, arg0, engDesc) kfifoRunlistSetIdByEngine_GM107(pGpu, pKernelFifo, arg0, engDesc) +#define kfifoRunlistSetIdByEngine(pGpu, pKernelFifo, arg3, engDesc) kfifoRunlistSetIdByEngine_GM107(pGpu, pKernelFifo, arg3, engDesc) #endif //__nvoc_kernel_fifo_h_disabled -#define kfifoRunlistSetIdByEngine_HAL(pGpu, pKernelFifo, arg0, engDesc) kfifoRunlistSetIdByEngine(pGpu, pKernelFifo, arg0, engDesc) +#define kfifoRunlistSetIdByEngine_HAL(pGpu, pKernelFifo, arg3, engDesc) kfifoRunlistSetIdByEngine(pGpu, pKernelFifo, arg3, engDesc) void kfifoSetupUserD_GM107(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, MEMORY_DESCRIPTOR *pMemDesc); @@ -1275,95 +1479,47 @@ static inline void kfifoSetupUserD(struct OBJGPU *pGpu, struct KernelFifo *pKern #define kfifoSetupUserD_HAL(pGpu, pKernelFifo, pMemDesc) kfifoSetupUserD(pGpu, pKernelFifo, pMemDesc) -const char *kfifoGetFaultAccessTypeString_GV100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0); +const char *kfifoGetFaultAccessTypeString_GV100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3); #ifdef __nvoc_kernel_fifo_h_disabled -static inline const char *kfifoGetFaultAccessTypeString(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0) { +static inline const char *kfifoGetFaultAccessTypeString(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return NULL; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoGetFaultAccessTypeString(pGpu, pKernelFifo, arg0) kfifoGetFaultAccessTypeString_GV100(pGpu, pKernelFifo, arg0) +#define kfifoGetFaultAccessTypeString(pGpu, pKernelFifo, arg3) kfifoGetFaultAccessTypeString_GV100(pGpu, pKernelFifo, arg3) #endif //__nvoc_kernel_fifo_h_disabled -#define kfifoGetFaultAccessTypeString_HAL(pGpu, pKernelFifo, arg0) kfifoGetFaultAccessTypeString(pGpu, pKernelFifo, arg0) +#define kfifoGetFaultAccessTypeString_HAL(pGpu, pKernelFifo, arg3) kfifoGetFaultAccessTypeString(pGpu, pKernelFifo, arg3) NV_STATUS kfifoConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, ENGDESCRIPTOR engDesc); -static inline NV_STATUS kfifoConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, ENGDESCRIPTOR engDesc) { - return pKernelFifo->__kfifoConstructEngine__(pGpu, pKernelFifo, engDesc); -} - NV_STATUS kfifoStateLoad_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 flags); -static inline NV_STATUS kfifoStateLoad_56cd7a(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 flags) { - return NV_OK; -} - -static inline NV_STATUS kfifoStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 flags) { - return pKernelFifo->__kfifoStateLoad__(pGpu, pKernelFifo, flags); -} - NV_STATUS kfifoStateUnload_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 flags); -static inline NV_STATUS kfifoStateUnload_56cd7a(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 flags) { - return NV_OK; -} - -static inline NV_STATUS kfifoStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 flags) { - return pKernelFifo->__kfifoStateUnload__(pGpu, pKernelFifo, flags); -} - NV_STATUS kfifoStateInitLocked_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo); -static inline NV_STATUS kfifoStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo) { - return pKernelFifo->__kfifoStateInitLocked__(pGpu, pKernelFifo); -} - void kfifoStateDestroy_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo); -static inline void kfifoStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo) { - pKernelFifo->__kfifoStateDestroy__(pGpu, pKernelFifo); -} - NV_STATUS kfifoStatePostLoad_GM107(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 flags); -static inline NV_STATUS kfifoStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 flags) { - return pKernelFifo->__kfifoStatePostLoad__(pGpu, pKernelFifo, flags); -} - NV_STATUS kfifoStatePreUnload_GM107(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 flags); -static inline NV_STATUS kfifoStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 flags) { - return pKernelFifo->__kfifoStatePreUnload__(pGpu, pKernelFifo, flags); -} - NV_STATUS kfifoCheckChannelAllocAddrSpaces_GH100(struct KernelFifo *pKernelFifo, NV_ADDRESS_SPACE userdAddrSpace, NV_ADDRESS_SPACE pushBuffAddrSpace, NV_ADDRESS_SPACE gpFifoAddrSpace); static inline NV_STATUS kfifoCheckChannelAllocAddrSpaces_56cd7a(struct KernelFifo *pKernelFifo, NV_ADDRESS_SPACE userdAddrSpace, NV_ADDRESS_SPACE pushBuffAddrSpace, NV_ADDRESS_SPACE gpFifoAddrSpace) { return NV_OK; } -static inline NV_STATUS kfifoCheckChannelAllocAddrSpaces_DISPATCH(struct KernelFifo *pKernelFifo, NV_ADDRESS_SPACE userdAddrSpace, NV_ADDRESS_SPACE pushBuffAddrSpace, NV_ADDRESS_SPACE gpFifoAddrSpace) { - return pKernelFifo->__kfifoCheckChannelAllocAddrSpaces__(pKernelFifo, userdAddrSpace, pushBuffAddrSpace, gpFifoAddrSpace); -} - NV_STATUS kfifoConstructUsermodeMemdescs_GH100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo); NV_STATUS kfifoConstructUsermodeMemdescs_GV100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo); -static inline NV_STATUS kfifoConstructUsermodeMemdescs_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo) { - return pKernelFifo->__kfifoConstructUsermodeMemdescs__(pGpu, pKernelFifo); -} - -NvU32 kfifoChannelGroupGetLocalMaxSubcontext_GM107(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannelGroup *arg0, NvBool arg1); +NvU32 kfifoChannelGroupGetLocalMaxSubcontext_GM107(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannelGroup *arg3, NvBool arg4); -NvU32 kfifoChannelGroupGetLocalMaxSubcontext_GA100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannelGroup *arg0, NvBool arg1); - -static inline NvU32 kfifoChannelGroupGetLocalMaxSubcontext_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannelGroup *arg0, NvBool arg1) { - return pKernelFifo->__kfifoChannelGroupGetLocalMaxSubcontext__(pGpu, pKernelFifo, arg0, arg1); -} +NvU32 kfifoChannelGroupGetLocalMaxSubcontext_GA100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannelGroup *arg3, NvBool arg4); void kfifoGetCtxBufferMapFlags_GH100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 engine, NvU32 *pFlags); @@ -1371,33 +1527,17 @@ static inline void kfifoGetCtxBufferMapFlags_b3696a(struct OBJGPU *pGpu, struct return; } -static inline void kfifoGetCtxBufferMapFlags_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 engine, NvU32 *pFlags) { - pKernelFifo->__kfifoGetCtxBufferMapFlags__(pGpu, pKernelFifo, engine, pFlags); -} - NV_STATUS kfifoEngineInfoXlate_GV100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, ENGINE_INFO_TYPE inType, NvU32 inVal, ENGINE_INFO_TYPE outType, NvU32 *pOutVal); NV_STATUS kfifoEngineInfoXlate_GA100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, ENGINE_INFO_TYPE inType, NvU32 inVal, ENGINE_INFO_TYPE outType, NvU32 *pOutVal); -static inline NV_STATUS kfifoEngineInfoXlate_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, ENGINE_INFO_TYPE inType, NvU32 inVal, ENGINE_INFO_TYPE outType, NvU32 *pOutVal) { - return pKernelFifo->__kfifoEngineInfoXlate__(pGpu, pKernelFifo, inType, inVal, outType, pOutVal); -} - -NV_STATUS kfifoGenerateWorkSubmitToken_TU102(struct OBJGPU *pGpu, struct KernelFifo *arg0, struct KernelChannel *arg1, NvU32 *pGeneratedToken, NvBool bUsedForHost); +NV_STATUS kfifoGenerateWorkSubmitToken_TU102(struct OBJGPU *pGpu, struct KernelFifo *arg2, struct KernelChannel *arg3, NvU32 *pGeneratedToken, NvBool bUsedForHost); -NV_STATUS kfifoGenerateWorkSubmitToken_GA100(struct OBJGPU *pGpu, struct KernelFifo *arg0, struct KernelChannel *arg1, NvU32 *pGeneratedToken, NvBool bUsedForHost); +NV_STATUS kfifoGenerateWorkSubmitToken_GA100(struct OBJGPU *pGpu, struct KernelFifo *arg2, struct KernelChannel *arg3, NvU32 *pGeneratedToken, NvBool bUsedForHost); -static inline NV_STATUS kfifoGenerateWorkSubmitToken_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *arg0, struct KernelChannel *arg1, NvU32 *pGeneratedToken, NvBool bUsedForHost) { - return arg0->__kfifoGenerateWorkSubmitToken__(pGpu, arg0, arg1, pGeneratedToken, bUsedForHost); -} - -NV_STATUS kfifoUpdateUsermodeDoorbell_TU102(struct OBJGPU *arg0, struct KernelFifo *arg1, NvU32 workSubmitToken, NvU32 runlisId); +NV_STATUS kfifoUpdateUsermodeDoorbell_TU102(struct OBJGPU *arg1, struct KernelFifo *arg2, NvU32 workSubmitToken, NvU32 runlisId); -NV_STATUS kfifoUpdateUsermodeDoorbell_GA100(struct OBJGPU *arg0, struct KernelFifo *arg1, NvU32 workSubmitToken, NvU32 runlisId); - -static inline NV_STATUS kfifoUpdateUsermodeDoorbell_DISPATCH(struct OBJGPU *arg0, struct KernelFifo *arg1, NvU32 workSubmitToken, NvU32 runlisId) { - return arg1->__kfifoUpdateUsermodeDoorbell__(arg0, arg1, workSubmitToken, runlisId); -} +NV_STATUS kfifoUpdateUsermodeDoorbell_GA100(struct OBJGPU *arg1, struct KernelFifo *arg2, NvU32 workSubmitToken, NvU32 runlisId); NvU32 kfifoRunlistGetBaseShift_GM107(struct KernelFifo *pKernelFifo); @@ -1405,38 +1545,22 @@ NvU32 kfifoRunlistGetBaseShift_GA100(struct KernelFifo *pKernelFifo); NvU32 kfifoRunlistGetBaseShift_GA102(struct KernelFifo *pKernelFifo); -static inline NvU32 kfifoRunlistGetBaseShift_DISPATCH(struct KernelFifo *pKernelFifo) { - return pKernelFifo->__kfifoRunlistGetBaseShift__(pKernelFifo); -} - NvU64 kfifoGetUserdBar1MapStartOffset_VF(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo); static inline NvU64 kfifoGetUserdBar1MapStartOffset_4a4dee(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo) { return 0; } -static inline NvU64 kfifoGetUserdBar1MapStartOffset_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo) { - return pKernelFifo->__kfifoGetUserdBar1MapStartOffset__(pGpu, pKernelFifo); -} - NvU32 kfifoGetMaxCeChannelGroups_GV100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo); NvU32 kfifoGetMaxCeChannelGroups_GA100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo); -static inline NvU32 kfifoGetMaxCeChannelGroups_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo) { - return pKernelFifo->__kfifoGetMaxCeChannelGroups__(pGpu, pKernelFifo); -} - static inline NV_STATUS kfifoGetVChIdForSChId_c04480(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 chId, NvU32 gfid, NvU32 engineId, NvU32 *pVChid) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } NV_STATUS kfifoGetVChIdForSChId_FWCLIENT(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 chId, NvU32 gfid, NvU32 engineId, NvU32 *pVChid); -static inline NV_STATUS kfifoGetVChIdForSChId_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 chId, NvU32 gfid, NvU32 engineId, NvU32 *pVChid) { - return pKernelFifo->__kfifoGetVChIdForSChId__(pGpu, pKernelFifo, chId, gfid, engineId, pVChid); -} - static inline NV_STATUS kfifoProgramChIdTable_c04480(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, CHID_MGR *pChidMgr, NvU32 offset, NvU32 numChannels, NvU32 gfid, struct Device *pMigDevice, NvU32 engineFifoListNumEntries, FIFO_ENGINE_LIST *pEngineFifoList) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } @@ -1445,10 +1569,6 @@ static inline NV_STATUS kfifoProgramChIdTable_56cd7a(struct OBJGPU *pGpu, struct return NV_OK; } -static inline NV_STATUS kfifoProgramChIdTable_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, CHID_MGR *pChidMgr, NvU32 offset, NvU32 numChannels, NvU32 gfid, struct Device *pMigDevice, NvU32 engineFifoListNumEntries, FIFO_ENGINE_LIST *pEngineFifoList) { - return pKernelFifo->__kfifoProgramChIdTable__(pGpu, pKernelFifo, pChidMgr, offset, numChannels, gfid, pMigDevice, engineFifoListNumEntries, pEngineFifoList); -} - static inline NV_STATUS kfifoRecoverAllChannels_56cd7a(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 gfid) { return NV_OK; } @@ -1458,118 +1578,54 @@ static inline NV_STATUS kfifoRecoverAllChannels_92bfc3(struct OBJGPU *pGpu, stru return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kfifoRecoverAllChannels_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 gfid) { - return pKernelFifo->__kfifoRecoverAllChannels__(pGpu, pKernelFifo, gfid); -} - -NV_STATUS kfifoGetEnginePbdmaFaultIds_GA100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, ENGINE_INFO_TYPE arg0, NvU32 arg1, NvU32 **arg2, NvU32 *arg3); +NV_STATUS kfifoGetEnginePbdmaFaultIds_GA100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, ENGINE_INFO_TYPE arg3, NvU32 arg4, NvU32 **arg5, NvU32 *arg6); -static inline NV_STATUS kfifoGetEnginePbdmaFaultIds_5baef9(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, ENGINE_INFO_TYPE arg0, NvU32 arg1, NvU32 **arg2, NvU32 *arg3) { +static inline NV_STATUS kfifoGetEnginePbdmaFaultIds_5baef9(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, ENGINE_INFO_TYPE arg3, NvU32 arg4, NvU32 **arg5, NvU32 *arg6) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NV_STATUS kfifoGetEnginePbdmaFaultIds_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, ENGINE_INFO_TYPE arg0, NvU32 arg1, NvU32 **arg2, NvU32 *arg3) { - return pKernelFifo->__kfifoGetEnginePbdmaFaultIds__(pGpu, pKernelFifo, arg0, arg1, arg2, arg3); -} - NvU32 kfifoGetNumPBDMAs_GM200(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo); NvU32 kfifoGetNumPBDMAs_GA100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo); -static inline NvU32 kfifoGetNumPBDMAs_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo) { - return pKernelFifo->__kfifoGetNumPBDMAs__(pGpu, pKernelFifo); -} - const char *kfifoPrintPbdmaId_TU102(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 pbdmaId); const char *kfifoPrintPbdmaId_GA100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 pbdmaId); -static inline const char *kfifoPrintPbdmaId_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 pbdmaId) { - return pKernelFifo->__kfifoPrintPbdmaId__(pGpu, pKernelFifo, pbdmaId); -} - -const char *kfifoPrintInternalEngine_TU102(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0); - -const char *kfifoPrintInternalEngine_GA100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0); +const char *kfifoPrintInternalEngine_TU102(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3); -const char *kfifoPrintInternalEngine_AD102(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0); +const char *kfifoPrintInternalEngine_GA100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3); -const char *kfifoPrintInternalEngine_GH100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0); +const char *kfifoPrintInternalEngine_AD102(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3); -static inline const char *kfifoPrintInternalEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0) { - return pKernelFifo->__kfifoPrintInternalEngine__(pGpu, pKernelFifo, arg0); -} +const char *kfifoPrintInternalEngine_GH100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3); -const char *kfifoPrintInternalEngineCheck_GA100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0); +const char *kfifoPrintInternalEngineCheck_GA100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3); -static inline const char *kfifoPrintInternalEngineCheck_fa6e19(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0) { +static inline const char *kfifoPrintInternalEngineCheck_fa6e19(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3) { return ((void *)0); } -static inline const char *kfifoPrintInternalEngineCheck_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0) { - return pKernelFifo->__kfifoPrintInternalEngineCheck__(pGpu, pKernelFifo, arg0); -} +const char *kfifoGetClientIdStringCommon_GH100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, FIFO_MMU_EXCEPTION_DATA *arg3); -const char *kfifoGetClientIdStringCommon_GH100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, FIFO_MMU_EXCEPTION_DATA *arg0); - -static inline const char *kfifoGetClientIdStringCommon_95626c(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, FIFO_MMU_EXCEPTION_DATA *arg0) { +static inline const char *kfifoGetClientIdStringCommon_95626c(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, FIFO_MMU_EXCEPTION_DATA *arg3) { NV_ASSERT_OR_RETURN_PRECOMP(0, "UNKNOWN"); } -static inline const char *kfifoGetClientIdStringCommon_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, FIFO_MMU_EXCEPTION_DATA *arg0) { - return pKernelFifo->__kfifoGetClientIdStringCommon__(pGpu, pKernelFifo, arg0); -} - -const char *kfifoGetClientIdString_TU102(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, FIFO_MMU_EXCEPTION_DATA *arg0); - -const char *kfifoGetClientIdString_GA100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, FIFO_MMU_EXCEPTION_DATA *arg0); +const char *kfifoGetClientIdString_TU102(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, FIFO_MMU_EXCEPTION_DATA *arg3); -const char *kfifoGetClientIdString_AD102(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, FIFO_MMU_EXCEPTION_DATA *arg0); +const char *kfifoGetClientIdString_GA100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, FIFO_MMU_EXCEPTION_DATA *arg3); -const char *kfifoGetClientIdString_GH100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, FIFO_MMU_EXCEPTION_DATA *arg0); +const char *kfifoGetClientIdString_AD102(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, FIFO_MMU_EXCEPTION_DATA *arg3); -static inline const char *kfifoGetClientIdString_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, FIFO_MMU_EXCEPTION_DATA *arg0) { - return pKernelFifo->__kfifoGetClientIdString__(pGpu, pKernelFifo, arg0); -} +const char *kfifoGetClientIdString_GH100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, FIFO_MMU_EXCEPTION_DATA *arg3); -const char *kfifoGetClientIdStringCheck_GA100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0); +const char *kfifoGetClientIdStringCheck_GA100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3); -static inline const char *kfifoGetClientIdStringCheck_da47da(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0) { +static inline const char *kfifoGetClientIdStringCheck_da47da(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3) { return "UNKNOWN"; } -static inline const char *kfifoGetClientIdStringCheck_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0) { - return pKernelFifo->__kfifoGetClientIdStringCheck__(pGpu, pKernelFifo, arg0); -} - -static inline NV_STATUS kfifoStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelFifo *pEngstate, NvU32 arg0) { - return pEngstate->__kfifoStatePreLoad__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS kfifoStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelFifo *pEngstate, NvU32 arg0) { - return pEngstate->__kfifoStatePostUnload__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS kfifoStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelFifo *pEngstate) { - return pEngstate->__kfifoStateInitUnlocked__(pGpu, pEngstate); -} - -static inline void kfifoInitMissing_DISPATCH(POBJGPU pGpu, struct KernelFifo *pEngstate) { - pEngstate->__kfifoInitMissing__(pGpu, pEngstate); -} - -static inline NV_STATUS kfifoStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelFifo *pEngstate) { - return pEngstate->__kfifoStatePreInitLocked__(pGpu, pEngstate); -} - -static inline NV_STATUS kfifoStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelFifo *pEngstate) { - return pEngstate->__kfifoStatePreInitUnlocked__(pGpu, pEngstate); -} - -static inline NvBool kfifoIsPresent_DISPATCH(POBJGPU pGpu, struct KernelFifo *pEngstate) { - return pEngstate->__kfifoIsPresent__(pGpu, pEngstate); -} - static inline const ENGINE_INFO *kfifoGetEngineInfo(struct KernelFifo *pKernelFifo) { if (pKernelFifo->engineInfo.engineInfoList == ((void *)0)) return ((void *)0); @@ -1660,15 +1716,15 @@ static inline void kfifoChidMgrDestruct(struct KernelFifo *pKernelFifo) { #define kfifoChidMgrDestruct(pKernelFifo) kfifoChidMgrDestruct_IMPL(pKernelFifo) #endif //__nvoc_kernel_fifo_h_disabled -NV_STATUS kfifoChidMgrAllocChid_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, CHID_MGR *pChidMgr, NvHandle hClient, CHANNEL_HW_ID_ALLOC_MODE arg0, NvBool bForceInternalIdx, NvU32 internalIdx, NvBool bForceUserdPage, NvU32 userdPageIdx, NvU32 ChID, struct KernelChannel *arg1); +NV_STATUS kfifoChidMgrAllocChid_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, CHID_MGR *pChidMgr, NvHandle hClient, CHANNEL_HW_ID_ALLOC_MODE arg5, NvBool bForceInternalIdx, NvU32 internalIdx, NvBool bForceUserdPage, NvU32 userdPageIdx, NvU32 ChID, struct KernelChannel *arg11); #ifdef __nvoc_kernel_fifo_h_disabled -static inline NV_STATUS kfifoChidMgrAllocChid(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, CHID_MGR *pChidMgr, NvHandle hClient, CHANNEL_HW_ID_ALLOC_MODE arg0, NvBool bForceInternalIdx, NvU32 internalIdx, NvBool bForceUserdPage, NvU32 userdPageIdx, NvU32 ChID, struct KernelChannel *arg1) { +static inline NV_STATUS kfifoChidMgrAllocChid(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, CHID_MGR *pChidMgr, NvHandle hClient, CHANNEL_HW_ID_ALLOC_MODE arg5, NvBool bForceInternalIdx, NvU32 internalIdx, NvBool bForceUserdPage, NvU32 userdPageIdx, NvU32 ChID, struct KernelChannel *arg11) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoChidMgrAllocChid(pGpu, pKernelFifo, pChidMgr, hClient, arg0, bForceInternalIdx, internalIdx, bForceUserdPage, userdPageIdx, ChID, arg1) kfifoChidMgrAllocChid_IMPL(pGpu, pKernelFifo, pChidMgr, hClient, arg0, bForceInternalIdx, internalIdx, bForceUserdPage, userdPageIdx, ChID, arg1) +#define kfifoChidMgrAllocChid(pGpu, pKernelFifo, pChidMgr, hClient, arg5, bForceInternalIdx, internalIdx, bForceUserdPage, userdPageIdx, ChID, arg11) kfifoChidMgrAllocChid_IMPL(pGpu, pKernelFifo, pChidMgr, hClient, arg5, bForceInternalIdx, internalIdx, bForceUserdPage, userdPageIdx, ChID, arg11) #endif //__nvoc_kernel_fifo_h_disabled NV_STATUS kfifoChidMgrRetainChid_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, CHID_MGR *pChidMgr, NvU32 ChID); @@ -1803,15 +1859,15 @@ static inline CHID_MGR *kfifoGetChidMgr(struct OBJGPU *pGpu, struct KernelFifo * #define kfifoGetChidMgr(pGpu, pKernelFifo, runlistId) kfifoGetChidMgr_IMPL(pGpu, pKernelFifo, runlistId) #endif //__nvoc_kernel_fifo_h_disabled -NV_STATUS kfifoGetChidMgrFromType_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 engineInfoType, NvU32 value, CHID_MGR **arg0); +NV_STATUS kfifoGetChidMgrFromType_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 engineInfoType, NvU32 value, CHID_MGR **arg5); #ifdef __nvoc_kernel_fifo_h_disabled -static inline NV_STATUS kfifoGetChidMgrFromType(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 engineInfoType, NvU32 value, CHID_MGR **arg0) { +static inline NV_STATUS kfifoGetChidMgrFromType(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 engineInfoType, NvU32 value, CHID_MGR **arg5) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoGetChidMgrFromType(pGpu, pKernelFifo, engineInfoType, value, arg0) kfifoGetChidMgrFromType_IMPL(pGpu, pKernelFifo, engineInfoType, value, arg0) +#define kfifoGetChidMgrFromType(pGpu, pKernelFifo, engineInfoType, value, arg5) kfifoGetChidMgrFromType_IMPL(pGpu, pKernelFifo, engineInfoType, value, arg5) #endif //__nvoc_kernel_fifo_h_disabled struct KernelChannelGroup *kfifoGetChannelGroup_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 grpID, NvU32 runlistID); @@ -1889,59 +1945,59 @@ static inline NvU32 kfifoGetAllocatedChannelMask(struct OBJGPU *pGpu, struct Ker #define kfifoGetAllocatedChannelMask(pGpu, pKernelFifo, runlistId, pBitMask, bitMaskSize) kfifoGetAllocatedChannelMask_IMPL(pGpu, pKernelFifo, runlistId, pBitMask, bitMaskSize) #endif //__nvoc_kernel_fifo_h_disabled -NV_STATUS kfifoChannelListCreate_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, CHANNEL_LIST **arg0); +NV_STATUS kfifoChannelListCreate_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, CHANNEL_LIST **arg3); #ifdef __nvoc_kernel_fifo_h_disabled -static inline NV_STATUS kfifoChannelListCreate(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, CHANNEL_LIST **arg0) { +static inline NV_STATUS kfifoChannelListCreate(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, CHANNEL_LIST **arg3) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoChannelListCreate(pGpu, pKernelFifo, arg0) kfifoChannelListCreate_IMPL(pGpu, pKernelFifo, arg0) +#define kfifoChannelListCreate(pGpu, pKernelFifo, arg3) kfifoChannelListCreate_IMPL(pGpu, pKernelFifo, arg3) #endif //__nvoc_kernel_fifo_h_disabled -NV_STATUS kfifoChannelListDestroy_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, CHANNEL_LIST *arg0); +NV_STATUS kfifoChannelListDestroy_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, CHANNEL_LIST *arg3); #ifdef __nvoc_kernel_fifo_h_disabled -static inline NV_STATUS kfifoChannelListDestroy(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, CHANNEL_LIST *arg0) { +static inline NV_STATUS kfifoChannelListDestroy(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, CHANNEL_LIST *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoChannelListDestroy(pGpu, pKernelFifo, arg0) kfifoChannelListDestroy_IMPL(pGpu, pKernelFifo, arg0) +#define kfifoChannelListDestroy(pGpu, pKernelFifo, arg3) kfifoChannelListDestroy_IMPL(pGpu, pKernelFifo, arg3) #endif //__nvoc_kernel_fifo_h_disabled -NV_STATUS kfifoChannelListAppend_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannel *arg0, CHANNEL_LIST *arg1); +NV_STATUS kfifoChannelListAppend_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannel *arg3, CHANNEL_LIST *arg4); #ifdef __nvoc_kernel_fifo_h_disabled -static inline NV_STATUS kfifoChannelListAppend(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannel *arg0, CHANNEL_LIST *arg1) { +static inline NV_STATUS kfifoChannelListAppend(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannel *arg3, CHANNEL_LIST *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoChannelListAppend(pGpu, pKernelFifo, arg0, arg1) kfifoChannelListAppend_IMPL(pGpu, pKernelFifo, arg0, arg1) +#define kfifoChannelListAppend(pGpu, pKernelFifo, arg3, arg4) kfifoChannelListAppend_IMPL(pGpu, pKernelFifo, arg3, arg4) #endif //__nvoc_kernel_fifo_h_disabled -NV_STATUS kfifoChannelListRemove_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannel *arg0, CHANNEL_LIST *arg1); +NV_STATUS kfifoChannelListRemove_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannel *arg3, CHANNEL_LIST *arg4); #ifdef __nvoc_kernel_fifo_h_disabled -static inline NV_STATUS kfifoChannelListRemove(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannel *arg0, CHANNEL_LIST *arg1) { +static inline NV_STATUS kfifoChannelListRemove(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannel *arg3, CHANNEL_LIST *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoChannelListRemove(pGpu, pKernelFifo, arg0, arg1) kfifoChannelListRemove_IMPL(pGpu, pKernelFifo, arg0, arg1) +#define kfifoChannelListRemove(pGpu, pKernelFifo, arg3, arg4) kfifoChannelListRemove_IMPL(pGpu, pKernelFifo, arg3, arg4) #endif //__nvoc_kernel_fifo_h_disabled -NvBool kfifoEngineListHasChannel_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, RM_ENGINE_TYPE *arg0, NvU32 arg1); +NvBool kfifoEngineListHasChannel_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, RM_ENGINE_TYPE *arg3, NvU32 arg4); #ifdef __nvoc_kernel_fifo_h_disabled -static inline NvBool kfifoEngineListHasChannel(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, RM_ENGINE_TYPE *arg0, NvU32 arg1) { +static inline NvBool kfifoEngineListHasChannel(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, RM_ENGINE_TYPE *arg3, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoEngineListHasChannel(pGpu, pKernelFifo, arg0, arg1) kfifoEngineListHasChannel_IMPL(pGpu, pKernelFifo, arg0, arg1) +#define kfifoEngineListHasChannel(pGpu, pKernelFifo, arg3, arg4) kfifoEngineListHasChannel_IMPL(pGpu, pKernelFifo, arg3, arg4) #endif //__nvoc_kernel_fifo_h_disabled CTX_BUF_POOL_INFO *kfifoGetRunlistBufPool_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, RM_ENGINE_TYPE rmEngineType); @@ -1955,15 +2011,15 @@ static inline CTX_BUF_POOL_INFO *kfifoGetRunlistBufPool(struct OBJGPU *pGpu, str #define kfifoGetRunlistBufPool(pGpu, pKernelFifo, rmEngineType) kfifoGetRunlistBufPool_IMPL(pGpu, pKernelFifo, rmEngineType) #endif //__nvoc_kernel_fifo_h_disabled -NV_STATUS kfifoGetRunlistBufInfo_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0, NvBool arg1, NvU32 arg2, NvU64 *arg3, NvU64 *arg4); +NV_STATUS kfifoGetRunlistBufInfo_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3, NvBool arg4, NvU32 arg5, NvU64 *arg6, NvU64 *arg7); #ifdef __nvoc_kernel_fifo_h_disabled -static inline NV_STATUS kfifoGetRunlistBufInfo(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0, NvBool arg1, NvU32 arg2, NvU64 *arg3, NvU64 *arg4) { +static inline NV_STATUS kfifoGetRunlistBufInfo(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3, NvBool arg4, NvU32 arg5, NvU64 *arg6, NvU64 *arg7) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoGetRunlistBufInfo(pGpu, pKernelFifo, arg0, arg1, arg2, arg3, arg4) kfifoGetRunlistBufInfo_IMPL(pGpu, pKernelFifo, arg0, arg1, arg2, arg3, arg4) +#define kfifoGetRunlistBufInfo(pGpu, pKernelFifo, arg3, arg4, arg5, arg6, arg7) kfifoGetRunlistBufInfo_IMPL(pGpu, pKernelFifo, arg3, arg4, arg5, arg6, arg7) #endif //__nvoc_kernel_fifo_h_disabled NV_STATUS kfifoAddSchedulingHandler_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, PFifoSchedulingHandler pPostSchedulingEnableHandler, void *pPostSchedulingEnableHandlerData, PFifoSchedulingHandler pPreSchedulingDisableHandler, void *pPreSchedulingDisableHandlerData); @@ -2088,37 +2144,37 @@ static inline NvU32 kfifoGetChannelClassId(struct OBJGPU *pGpu, struct KernelFif #define kfifoGetChannelClassId(pGpu, pKernelFifo) kfifoGetChannelClassId_IMPL(pGpu, pKernelFifo) #endif //__nvoc_kernel_fifo_h_disabled -NvBool kfifoIsMmuFaultEngineIdPbdma_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0); +NvBool kfifoIsMmuFaultEngineIdPbdma_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3); #ifdef __nvoc_kernel_fifo_h_disabled -static inline NvBool kfifoIsMmuFaultEngineIdPbdma(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0) { +static inline NvBool kfifoIsMmuFaultEngineIdPbdma(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoIsMmuFaultEngineIdPbdma(pGpu, pKernelFifo, arg0) kfifoIsMmuFaultEngineIdPbdma_IMPL(pGpu, pKernelFifo, arg0) +#define kfifoIsMmuFaultEngineIdPbdma(pGpu, pKernelFifo, arg3) kfifoIsMmuFaultEngineIdPbdma_IMPL(pGpu, pKernelFifo, arg3) #endif //__nvoc_kernel_fifo_h_disabled -NV_STATUS kfifoGetPbdmaIdFromMmuFaultId_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0, NvU32 *arg1); +NV_STATUS kfifoGetPbdmaIdFromMmuFaultId_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3, NvU32 *arg4); #ifdef __nvoc_kernel_fifo_h_disabled -static inline NV_STATUS kfifoGetPbdmaIdFromMmuFaultId(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0, NvU32 *arg1) { +static inline NV_STATUS kfifoGetPbdmaIdFromMmuFaultId(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3, NvU32 *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoGetPbdmaIdFromMmuFaultId(pGpu, pKernelFifo, arg0, arg1) kfifoGetPbdmaIdFromMmuFaultId_IMPL(pGpu, pKernelFifo, arg0, arg1) +#define kfifoGetPbdmaIdFromMmuFaultId(pGpu, pKernelFifo, arg3, arg4) kfifoGetPbdmaIdFromMmuFaultId_IMPL(pGpu, pKernelFifo, arg3, arg4) #endif //__nvoc_kernel_fifo_h_disabled -NV_STATUS kfifoGetEngineTypeFromPbdmaFaultId_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0, RM_ENGINE_TYPE *arg1); +NV_STATUS kfifoGetEngineTypeFromPbdmaFaultId_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3, RM_ENGINE_TYPE *arg4); #ifdef __nvoc_kernel_fifo_h_disabled -static inline NV_STATUS kfifoGetEngineTypeFromPbdmaFaultId(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg0, RM_ENGINE_TYPE *arg1) { +static inline NV_STATUS kfifoGetEngineTypeFromPbdmaFaultId(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3, RM_ENGINE_TYPE *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoGetEngineTypeFromPbdmaFaultId(pGpu, pKernelFifo, arg0, arg1) kfifoGetEngineTypeFromPbdmaFaultId_IMPL(pGpu, pKernelFifo, arg0, arg1) +#define kfifoGetEngineTypeFromPbdmaFaultId(pGpu, pKernelFifo, arg3, arg4) kfifoGetEngineTypeFromPbdmaFaultId_IMPL(pGpu, pKernelFifo, arg3, arg4) #endif //__nvoc_kernel_fifo_h_disabled NV_STATUS kfifoChannelGroupSetTimeslice_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannelGroup *pKernelChannelGroup, NvU64 timesliceUs, NvBool bSkipSubmit); diff --git a/src/nvidia/generated/g_kernel_graphics_context_nvoc.c b/src/nvidia/generated/g_kernel_graphics_context_nvoc.c index 9012d3cc9d..fc990288a8 100644 --- a/src/nvidia/generated/g_kernel_graphics_context_nvoc.c +++ b/src/nvidia/generated/g_kernel_graphics_context_nvoc.c @@ -93,106 +93,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGraphicsContext = /*pExportInfo=*/ &__nvoc_export_info_KernelGraphicsContext }; -static NvBool __nvoc_thunk_KernelGraphicsContext_resCanCopy(struct RsResource *arg0) { - return kgrctxCanCopy((struct KernelGraphicsContext *)(((unsigned char *)arg0) - __nvoc_rtti_KernelGraphicsContext_RsResource.offset)); -} - -static NvHandle __nvoc_thunk_KernelGraphicsContext_gpuresGetInternalObjectHandle(struct GpuResource *arg0) { - return kgrctxGetInternalObjectHandle((struct KernelGraphicsContext *)(((unsigned char *)arg0) - __nvoc_rtti_KernelGraphicsContext_GpuResource.offset)); -} - -static NvBool __nvoc_thunk_GpuResource_kgrctxShareCallback(struct KernelGraphicsContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_kgrctxCheckMemInterUnmap(struct KernelGraphicsContext *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RsResource_kgrctxMapTo(struct KernelGraphicsContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kgrctxGetMapAddrSpace(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} - -static NvU32 __nvoc_thunk_RsResource_kgrctxGetRefCount(struct KernelGraphicsContext *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_kgrctxAddAdditionalDependants(struct RsClient *pClient, struct KernelGraphicsContext *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_kgrctxControl_Prologue(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kgrctxGetRegBaseOffsetAndSize(struct KernelGraphicsContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), pGpu, pOffset, pSize); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kgrctxInternalControlForward(struct KernelGraphicsContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), command, pParams, size); -} - -static NV_STATUS __nvoc_thunk_RsResource_kgrctxUnmapFrom(struct KernelGraphicsContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_kgrctxControl_Epilogue(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kgrctxControl(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kgrctxUnmap(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_kgrctxGetMemInterMapParams(struct KernelGraphicsContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_kgrctxGetMemoryMappingDescriptor(struct KernelGraphicsContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_kgrctxControlFilter(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_kgrctxControlSerialization_Prologue(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_kgrctxIsPartialUnmapSupported(struct KernelGraphicsContext *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_kgrctxPreDestruct(struct KernelGraphicsContext *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_kgrctxIsDuplicate(struct KernelGraphicsContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_kgrctxControlSerialization_Epilogue(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kgrctxMap(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_kgrctxAccessCallback(struct KernelGraphicsContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -200,12 +100,12 @@ static NvBool __nvoc_thunk_RmResource_kgrctxAccessCallback(struct KernelGraphics static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelGraphicsContext[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kgrctxCtrlSetTpcPartitionMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x900101u, /*paramSize=*/ sizeof(NV0090_CTRL_TPC_PARTITION_MODE_PARAMS), @@ -215,12 +115,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelGr #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kgrctxCtrlGetTpcPartitionMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x900103u, /*paramSize=*/ sizeof(NV0090_CTRL_TPC_PARTITION_MODE_PARAMS), @@ -230,12 +130,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelGr #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kgrctxCtrlGetMMUDebugMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x900105u, /*paramSize=*/ sizeof(NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS), @@ -245,12 +145,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelGr #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kgrctxCtrlProgramVidmemPromote_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x900107u, /*paramSize=*/ sizeof(NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS), @@ -262,6 +162,137 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelGr }; +// 2 down-thunk(s) defined to bridge methods in KernelGraphicsContext from superclasses + +// kgrctxCanCopy: inline virtual override (res) base (gpures) body +static NvBool __nvoc_down_thunk_KernelGraphicsContext_resCanCopy(struct RsResource *arg_this) { + return kgrctxCanCopy((struct KernelGraphicsContext *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphicsContext_RsResource.offset)); +} + +// kgrctxGetInternalObjectHandle: virtual override (gpures) base (gpures) +static NvHandle __nvoc_down_thunk_KernelGraphicsContext_gpuresGetInternalObjectHandle(struct GpuResource *arg_this) { + return kgrctxGetInternalObjectHandle((struct KernelGraphicsContext *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphicsContext_GpuResource.offset)); +} + + +// 23 up-thunk(s) defined to bridge methods in KernelGraphicsContext to superclasses + +// kgrctxControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxControl(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), pCallContext, pParams); +} + +// kgrctxMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxMap(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// kgrctxUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxUnmap(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), pCallContext, pCpuMapping); +} + +// kgrctxShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_kgrctxShareCallback(struct KernelGraphicsContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// kgrctxGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxGetRegBaseOffsetAndSize(struct KernelGraphicsContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), pGpu, pOffset, pSize); +} + +// kgrctxGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxGetMapAddrSpace(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + +// kgrctxInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxInternalControlForward(struct KernelGraphicsContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), command, pParams, size); +} + +// kgrctxAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_kgrctxAccessCallback(struct KernelGraphicsContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// kgrctxGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kgrctxGetMemInterMapParams(struct KernelGraphicsContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), pParams); +} + +// kgrctxCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kgrctxCheckMemInterUnmap(struct KernelGraphicsContext *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), bSubdeviceHandleProvided); +} + +// kgrctxGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kgrctxGetMemoryMappingDescriptor(struct KernelGraphicsContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), ppMemDesc); +} + +// kgrctxControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kgrctxControlSerialization_Prologue(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), pCallContext, pParams); +} + +// kgrctxControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_kgrctxControlSerialization_Epilogue(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), pCallContext, pParams); +} + +// kgrctxControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kgrctxControl_Prologue(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), pCallContext, pParams); +} + +// kgrctxControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_kgrctxControl_Epilogue(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), pCallContext, pParams); +} + +// kgrctxIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kgrctxIsDuplicate(struct KernelGraphicsContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset), hMemory, pDuplicate); +} + +// kgrctxPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_kgrctxPreDestruct(struct KernelGraphicsContext *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset)); +} + +// kgrctxControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kgrctxControlFilter(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset), pCallContext, pParams); +} + +// kgrctxIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_kgrctxIsPartialUnmapSupported(struct KernelGraphicsContext *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset)); +} + +// kgrctxMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kgrctxMapTo(struct KernelGraphicsContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset), pParams); +} + +// kgrctxUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kgrctxUnmapFrom(struct KernelGraphicsContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset), pParams); +} + +// kgrctxGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_kgrctxGetRefCount(struct KernelGraphicsContext *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset)); +} + +// kgrctxAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_kgrctxAddAdditionalDependants(struct RsClient *pClient, struct KernelGraphicsContext *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset), pReference); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelGraphicsContext = { /*numEntries=*/ 4, @@ -307,6 +338,7 @@ NV_STATUS __nvoc_ctor_KernelGraphicsContext(KernelGraphicsContext *pThis, RmHals return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelGraphicsContext_1(KernelGraphicsContext *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -319,11 +351,15 @@ static void __nvoc_init_funcTable_KernelGraphicsContext_1(KernelGraphicsContext PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); + // kgrctxCanCopy -- inline virtual override (res) base (gpures) body pThis->__kgrctxCanCopy__ = &kgrctxCanCopy_0c883b; + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_KernelGraphicsContext_resCanCopy; + // kgrctxGetInternalObjectHandle -- virtual override (gpures) base (gpures) pThis->__kgrctxGetInternalObjectHandle__ = &kgrctxGetInternalObjectHandle_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ = &__nvoc_down_thunk_KernelGraphicsContext_gpuresGetInternalObjectHandle; - // Hal function -- kgrctxShouldPreAllocPmBuffer + // kgrctxShouldPreAllocPmBuffer -- halified (2 hals) body if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ && (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ )) { pThis->__kgrctxShouldPreAllocPmBuffer__ = &kgrctxShouldPreAllocPmBuffer_VF; @@ -333,7 +369,7 @@ static void __nvoc_init_funcTable_KernelGraphicsContext_1(KernelGraphicsContext pThis->__kgrctxShouldPreAllocPmBuffer__ = &kgrctxShouldPreAllocPmBuffer_PF; } - // Hal function -- kgrctxGetRegisterAccessMapId + // kgrctxGetRegisterAccessMapId -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgrctxGetRegisterAccessMapId__ = &kgrctxGetRegisterAccessMapId_aa21e9; @@ -343,74 +379,101 @@ static void __nvoc_init_funcTable_KernelGraphicsContext_1(KernelGraphicsContext pThis->__kgrctxGetRegisterAccessMapId__ = &kgrctxGetRegisterAccessMapId_PF; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kgrctxCtrlGetTpcPartitionMode -- exported (id=0x900103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kgrctxCtrlGetTpcPartitionMode__ = &kgrctxCtrlGetTpcPartitionMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kgrctxCtrlSetTpcPartitionMode -- exported (id=0x900101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kgrctxCtrlSetTpcPartitionMode__ = &kgrctxCtrlSetTpcPartitionMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kgrctxCtrlGetMMUDebugMode -- exported (id=0x900105) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kgrctxCtrlGetMMUDebugMode__ = &kgrctxCtrlGetMMUDebugMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kgrctxCtrlProgramVidmemPromote -- exported (id=0x900107) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kgrctxCtrlProgramVidmemPromote__ = &kgrctxCtrlProgramVidmemPromote_IMPL; #endif - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_KernelGraphicsContext_resCanCopy; - - pThis->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ = &__nvoc_thunk_KernelGraphicsContext_gpuresGetInternalObjectHandle; + // kgrctxControl -- virtual inherited (gpures) base (gpures) + pThis->__kgrctxControl__ = &__nvoc_up_thunk_GpuResource_kgrctxControl; - pThis->__kgrctxShareCallback__ = &__nvoc_thunk_GpuResource_kgrctxShareCallback; + // kgrctxMap -- virtual inherited (gpures) base (gpures) + pThis->__kgrctxMap__ = &__nvoc_up_thunk_GpuResource_kgrctxMap; - pThis->__kgrctxCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_kgrctxCheckMemInterUnmap; + // kgrctxUnmap -- virtual inherited (gpures) base (gpures) + pThis->__kgrctxUnmap__ = &__nvoc_up_thunk_GpuResource_kgrctxUnmap; - pThis->__kgrctxMapTo__ = &__nvoc_thunk_RsResource_kgrctxMapTo; + // kgrctxShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__kgrctxShareCallback__ = &__nvoc_up_thunk_GpuResource_kgrctxShareCallback; - pThis->__kgrctxGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_kgrctxGetMapAddrSpace; + // kgrctxGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__kgrctxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kgrctxGetRegBaseOffsetAndSize; - pThis->__kgrctxGetRefCount__ = &__nvoc_thunk_RsResource_kgrctxGetRefCount; + // kgrctxGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__kgrctxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_kgrctxGetMapAddrSpace; - pThis->__kgrctxAddAdditionalDependants__ = &__nvoc_thunk_RsResource_kgrctxAddAdditionalDependants; + // kgrctxInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__kgrctxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kgrctxInternalControlForward; - pThis->__kgrctxControl_Prologue__ = &__nvoc_thunk_RmResource_kgrctxControl_Prologue; + // kgrctxAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__kgrctxAccessCallback__ = &__nvoc_up_thunk_RmResource_kgrctxAccessCallback; - pThis->__kgrctxGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_kgrctxGetRegBaseOffsetAndSize; + // kgrctxGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__kgrctxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_kgrctxGetMemInterMapParams; - pThis->__kgrctxInternalControlForward__ = &__nvoc_thunk_GpuResource_kgrctxInternalControlForward; + // kgrctxCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__kgrctxCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_kgrctxCheckMemInterUnmap; - pThis->__kgrctxUnmapFrom__ = &__nvoc_thunk_RsResource_kgrctxUnmapFrom; + // kgrctxGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__kgrctxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kgrctxGetMemoryMappingDescriptor; - pThis->__kgrctxControl_Epilogue__ = &__nvoc_thunk_RmResource_kgrctxControl_Epilogue; + // kgrctxControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__kgrctxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kgrctxControlSerialization_Prologue; - pThis->__kgrctxControl__ = &__nvoc_thunk_GpuResource_kgrctxControl; + // kgrctxControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__kgrctxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kgrctxControlSerialization_Epilogue; - pThis->__kgrctxUnmap__ = &__nvoc_thunk_GpuResource_kgrctxUnmap; + // kgrctxControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__kgrctxControl_Prologue__ = &__nvoc_up_thunk_RmResource_kgrctxControl_Prologue; - pThis->__kgrctxGetMemInterMapParams__ = &__nvoc_thunk_RmResource_kgrctxGetMemInterMapParams; + // kgrctxControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__kgrctxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kgrctxControl_Epilogue; - pThis->__kgrctxGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_kgrctxGetMemoryMappingDescriptor; + // kgrctxIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__kgrctxIsDuplicate__ = &__nvoc_up_thunk_RsResource_kgrctxIsDuplicate; - pThis->__kgrctxControlFilter__ = &__nvoc_thunk_RsResource_kgrctxControlFilter; + // kgrctxPreDestruct -- virtual inherited (res) base (gpures) + pThis->__kgrctxPreDestruct__ = &__nvoc_up_thunk_RsResource_kgrctxPreDestruct; - pThis->__kgrctxControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_kgrctxControlSerialization_Prologue; + // kgrctxControlFilter -- virtual inherited (res) base (gpures) + pThis->__kgrctxControlFilter__ = &__nvoc_up_thunk_RsResource_kgrctxControlFilter; - pThis->__kgrctxIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_kgrctxIsPartialUnmapSupported; + // kgrctxIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__kgrctxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kgrctxIsPartialUnmapSupported; - pThis->__kgrctxPreDestruct__ = &__nvoc_thunk_RsResource_kgrctxPreDestruct; + // kgrctxMapTo -- virtual inherited (res) base (gpures) + pThis->__kgrctxMapTo__ = &__nvoc_up_thunk_RsResource_kgrctxMapTo; - pThis->__kgrctxIsDuplicate__ = &__nvoc_thunk_RsResource_kgrctxIsDuplicate; + // kgrctxUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__kgrctxUnmapFrom__ = &__nvoc_up_thunk_RsResource_kgrctxUnmapFrom; - pThis->__kgrctxControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_kgrctxControlSerialization_Epilogue; + // kgrctxGetRefCount -- virtual inherited (res) base (gpures) + pThis->__kgrctxGetRefCount__ = &__nvoc_up_thunk_RsResource_kgrctxGetRefCount; - pThis->__kgrctxMap__ = &__nvoc_thunk_GpuResource_kgrctxMap; + // kgrctxAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__kgrctxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kgrctxAddAdditionalDependants; +} // End __nvoc_init_funcTable_KernelGraphicsContext_1 with approximately 35 basic block(s). - pThis->__kgrctxAccessCallback__ = &__nvoc_thunk_RmResource_kgrctxAccessCallback; -} +// Initialize vtable(s) for 31 virtual method(s). void __nvoc_init_funcTable_KernelGraphicsContext(KernelGraphicsContext *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 31 per-object function pointer(s). __nvoc_init_funcTable_KernelGraphicsContext_1(pThis, pRmhalspecowner); } @@ -597,10 +660,13 @@ NV_STATUS __nvoc_ctor_KernelGraphicsContextShared(KernelGraphicsContextShared *p return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelGraphicsContextShared_1(KernelGraphicsContextShared *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_KernelGraphicsContextShared_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_KernelGraphicsContextShared(KernelGraphicsContextShared *pThis) { __nvoc_init_funcTable_KernelGraphicsContextShared_1(pThis); } diff --git a/src/nvidia/generated/g_kernel_graphics_context_nvoc.h b/src/nvidia/generated/g_kernel_graphics_context_nvoc.h index 2e21723ac7..2502a942e7 100644 --- a/src/nvidia/generated/g_kernel_graphics_context_nvoc.h +++ b/src/nvidia/generated/g_kernel_graphics_context_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_GRAPHICS_CONTEXT_NVOC_H_ #define _G_KERNEL_GRAPHICS_CONTEXT_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_graphics_context_nvoc.h" #ifndef _KERNEL_GRAPHICS_CONTEXT_H_ @@ -44,6 +52,7 @@ extern "C" { #include "mem_mgr/vaddr_list.h" #include "kernel/gpu/gr/kernel_graphics_context_buffers.h" + struct KernelChannel; #ifndef __NVOC_CLASS_KernelChannel_TYPEDEF__ @@ -56,6 +65,7 @@ typedef struct KernelChannel KernelChannel; #endif /* __nvoc_class_id_KernelChannel */ + struct KernelChannelGroupApi; #ifndef __NVOC_CLASS_KernelChannelGroupApi_TYPEDEF__ @@ -68,6 +78,7 @@ typedef struct KernelChannelGroupApi KernelChannelGroupApi; #endif /* __nvoc_class_id_KernelChannelGroupApi */ + struct KernelSMDebuggerSession; #ifndef __NVOC_CLASS_KernelSMDebuggerSession_TYPEDEF__ @@ -125,6 +136,7 @@ typedef struct struct KernelGraphicsContextUnicast; typedef struct KernelGraphicsContextUnicast KernelGraphicsContextUnicast; + struct KernelGraphics; #ifndef __NVOC_CLASS_KernelGraphics_TYPEDEF__ @@ -137,6 +149,7 @@ typedef struct KernelGraphics KernelGraphics; #endif /* __nvoc_class_id_KernelGraphics */ + struct KernelGraphicsContextShared; #ifndef __NVOC_CLASS_KernelGraphicsContextShared_TYPEDEF__ @@ -149,6 +162,7 @@ typedef struct KernelGraphicsContextShared KernelGraphicsContextShared; #endif /* __nvoc_class_id_KernelGraphicsContextShared */ + struct KernelGraphicsObject; #ifndef __NVOC_CLASS_KernelGraphicsObject_TYPEDEF__ @@ -178,90 +192,112 @@ typedef struct KernelGraphicsObject KernelGraphicsObject; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelGraphicsContext { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct KernelGraphicsContext *__nvoc_pbase_KernelGraphicsContext; - NvBool (*__kgrctxCanCopy__)(struct KernelGraphicsContext *); - NvHandle (*__kgrctxGetInternalObjectHandle__)(struct KernelGraphicsContext *); - NvBool (*__kgrctxShouldPreAllocPmBuffer__)(struct OBJGPU *, struct KernelGraphicsContext *, struct KernelChannel *); - GR_GLOBALCTX_BUFFER (*__kgrctxGetRegisterAccessMapId__)(struct OBJGPU *, struct KernelGraphicsContext *, struct KernelChannel *); - NV_STATUS (*__kgrctxCtrlGetTpcPartitionMode__)(struct KernelGraphicsContext *, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); - NV_STATUS (*__kgrctxCtrlSetTpcPartitionMode__)(struct KernelGraphicsContext *, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); - NV_STATUS (*__kgrctxCtrlGetMMUDebugMode__)(struct KernelGraphicsContext *, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *); - NV_STATUS (*__kgrctxCtrlProgramVidmemPromote__)(struct KernelGraphicsContext *, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *); - NvBool (*__kgrctxShareCallback__)(struct KernelGraphicsContext *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__kgrctxCheckMemInterUnmap__)(struct KernelGraphicsContext *, NvBool); - NV_STATUS (*__kgrctxMapTo__)(struct KernelGraphicsContext *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__kgrctxGetMapAddrSpace__)(struct KernelGraphicsContext *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__kgrctxGetRefCount__)(struct KernelGraphicsContext *); - void (*__kgrctxAddAdditionalDependants__)(struct RsClient *, struct KernelGraphicsContext *, RsResourceRef *); - NV_STATUS (*__kgrctxControl_Prologue__)(struct KernelGraphicsContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kgrctxGetRegBaseOffsetAndSize__)(struct KernelGraphicsContext *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__kgrctxInternalControlForward__)(struct KernelGraphicsContext *, NvU32, void *, NvU32); - NV_STATUS (*__kgrctxUnmapFrom__)(struct KernelGraphicsContext *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__kgrctxControl_Epilogue__)(struct KernelGraphicsContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kgrctxControl__)(struct KernelGraphicsContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kgrctxUnmap__)(struct KernelGraphicsContext *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__kgrctxGetMemInterMapParams__)(struct KernelGraphicsContext *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__kgrctxGetMemoryMappingDescriptor__)(struct KernelGraphicsContext *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__kgrctxControlFilter__)(struct KernelGraphicsContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kgrctxControlSerialization_Prologue__)(struct KernelGraphicsContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__kgrctxIsPartialUnmapSupported__)(struct KernelGraphicsContext *); - void (*__kgrctxPreDestruct__)(struct KernelGraphicsContext *); - NV_STATUS (*__kgrctxIsDuplicate__)(struct KernelGraphicsContext *, NvHandle, NvBool *); - void (*__kgrctxControlSerialization_Epilogue__)(struct KernelGraphicsContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kgrctxMap__)(struct KernelGraphicsContext *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__kgrctxAccessCallback__)(struct KernelGraphicsContext *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct KernelGraphicsContext *__nvoc_pbase_KernelGraphicsContext; // kgrctx + + // Vtable with 31 per-object function pointers + NvBool (*__kgrctxCanCopy__)(struct KernelGraphicsContext * /*this*/); // inline virtual override (res) base (gpures) body + NvHandle (*__kgrctxGetInternalObjectHandle__)(struct KernelGraphicsContext * /*this*/); // virtual override (gpures) base (gpures) + NvBool (*__kgrctxShouldPreAllocPmBuffer__)(struct OBJGPU *, struct KernelGraphicsContext * /*this*/, struct KernelChannel *); // halified (2 hals) body + GR_GLOBALCTX_BUFFER (*__kgrctxGetRegisterAccessMapId__)(struct OBJGPU *, struct KernelGraphicsContext * /*this*/, struct KernelChannel *); // halified (2 hals) + NV_STATUS (*__kgrctxCtrlGetTpcPartitionMode__)(struct KernelGraphicsContext * /*this*/, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); // exported (id=0x900103) + NV_STATUS (*__kgrctxCtrlSetTpcPartitionMode__)(struct KernelGraphicsContext * /*this*/, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); // exported (id=0x900101) + NV_STATUS (*__kgrctxCtrlGetMMUDebugMode__)(struct KernelGraphicsContext * /*this*/, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *); // exported (id=0x900105) + NV_STATUS (*__kgrctxCtrlProgramVidmemPromote__)(struct KernelGraphicsContext * /*this*/, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *); // exported (id=0x900107) + NV_STATUS (*__kgrctxControl__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kgrctxMap__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kgrctxUnmap__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__kgrctxShareCallback__)(struct KernelGraphicsContext * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kgrctxGetRegBaseOffsetAndSize__)(struct KernelGraphicsContext * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kgrctxGetMapAddrSpace__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kgrctxInternalControlForward__)(struct KernelGraphicsContext * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvBool (*__kgrctxAccessCallback__)(struct KernelGraphicsContext * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kgrctxGetMemInterMapParams__)(struct KernelGraphicsContext * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kgrctxCheckMemInterUnmap__)(struct KernelGraphicsContext * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kgrctxGetMemoryMappingDescriptor__)(struct KernelGraphicsContext * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kgrctxControlSerialization_Prologue__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__kgrctxControlSerialization_Epilogue__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kgrctxControl_Prologue__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__kgrctxControl_Epilogue__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kgrctxIsDuplicate__)(struct KernelGraphicsContext * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__kgrctxPreDestruct__)(struct KernelGraphicsContext * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__kgrctxControlFilter__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__kgrctxIsPartialUnmapSupported__)(struct KernelGraphicsContext * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__kgrctxMapTo__)(struct KernelGraphicsContext * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__kgrctxUnmapFrom__)(struct KernelGraphicsContext * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__kgrctxGetRefCount__)(struct KernelGraphicsContext * /*this*/); // virtual inherited (res) base (gpures) + void (*__kgrctxAddAdditionalDependants__)(struct RsClient *, struct KernelGraphicsContext * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members struct KernelGraphicsContextShared *PRIVATE_FIELD(pShared); VGPU_GFXP_BUFFERS *PRIVATE_FIELD(pVgpuGfxpBuffers); }; + struct KernelGraphicsContext_PRIVATE { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct KernelGraphicsContext *__nvoc_pbase_KernelGraphicsContext; - NvBool (*__kgrctxCanCopy__)(struct KernelGraphicsContext *); - NvHandle (*__kgrctxGetInternalObjectHandle__)(struct KernelGraphicsContext *); - NvBool (*__kgrctxShouldPreAllocPmBuffer__)(struct OBJGPU *, struct KernelGraphicsContext *, struct KernelChannel *); - GR_GLOBALCTX_BUFFER (*__kgrctxGetRegisterAccessMapId__)(struct OBJGPU *, struct KernelGraphicsContext *, struct KernelChannel *); - NV_STATUS (*__kgrctxCtrlGetTpcPartitionMode__)(struct KernelGraphicsContext *, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); - NV_STATUS (*__kgrctxCtrlSetTpcPartitionMode__)(struct KernelGraphicsContext *, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); - NV_STATUS (*__kgrctxCtrlGetMMUDebugMode__)(struct KernelGraphicsContext *, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *); - NV_STATUS (*__kgrctxCtrlProgramVidmemPromote__)(struct KernelGraphicsContext *, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *); - NvBool (*__kgrctxShareCallback__)(struct KernelGraphicsContext *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__kgrctxCheckMemInterUnmap__)(struct KernelGraphicsContext *, NvBool); - NV_STATUS (*__kgrctxMapTo__)(struct KernelGraphicsContext *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__kgrctxGetMapAddrSpace__)(struct KernelGraphicsContext *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__kgrctxGetRefCount__)(struct KernelGraphicsContext *); - void (*__kgrctxAddAdditionalDependants__)(struct RsClient *, struct KernelGraphicsContext *, RsResourceRef *); - NV_STATUS (*__kgrctxControl_Prologue__)(struct KernelGraphicsContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kgrctxGetRegBaseOffsetAndSize__)(struct KernelGraphicsContext *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__kgrctxInternalControlForward__)(struct KernelGraphicsContext *, NvU32, void *, NvU32); - NV_STATUS (*__kgrctxUnmapFrom__)(struct KernelGraphicsContext *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__kgrctxControl_Epilogue__)(struct KernelGraphicsContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kgrctxControl__)(struct KernelGraphicsContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kgrctxUnmap__)(struct KernelGraphicsContext *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__kgrctxGetMemInterMapParams__)(struct KernelGraphicsContext *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__kgrctxGetMemoryMappingDescriptor__)(struct KernelGraphicsContext *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__kgrctxControlFilter__)(struct KernelGraphicsContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kgrctxControlSerialization_Prologue__)(struct KernelGraphicsContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__kgrctxIsPartialUnmapSupported__)(struct KernelGraphicsContext *); - void (*__kgrctxPreDestruct__)(struct KernelGraphicsContext *); - NV_STATUS (*__kgrctxIsDuplicate__)(struct KernelGraphicsContext *, NvHandle, NvBool *); - void (*__kgrctxControlSerialization_Epilogue__)(struct KernelGraphicsContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kgrctxMap__)(struct KernelGraphicsContext *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__kgrctxAccessCallback__)(struct KernelGraphicsContext *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct KernelGraphicsContext *__nvoc_pbase_KernelGraphicsContext; // kgrctx + + // Vtable with 31 per-object function pointers + NvBool (*__kgrctxCanCopy__)(struct KernelGraphicsContext * /*this*/); // inline virtual override (res) base (gpures) body + NvHandle (*__kgrctxGetInternalObjectHandle__)(struct KernelGraphicsContext * /*this*/); // virtual override (gpures) base (gpures) + NvBool (*__kgrctxShouldPreAllocPmBuffer__)(struct OBJGPU *, struct KernelGraphicsContext * /*this*/, struct KernelChannel *); // halified (2 hals) body + GR_GLOBALCTX_BUFFER (*__kgrctxGetRegisterAccessMapId__)(struct OBJGPU *, struct KernelGraphicsContext * /*this*/, struct KernelChannel *); // halified (2 hals) + NV_STATUS (*__kgrctxCtrlGetTpcPartitionMode__)(struct KernelGraphicsContext * /*this*/, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); // exported (id=0x900103) + NV_STATUS (*__kgrctxCtrlSetTpcPartitionMode__)(struct KernelGraphicsContext * /*this*/, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); // exported (id=0x900101) + NV_STATUS (*__kgrctxCtrlGetMMUDebugMode__)(struct KernelGraphicsContext * /*this*/, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *); // exported (id=0x900105) + NV_STATUS (*__kgrctxCtrlProgramVidmemPromote__)(struct KernelGraphicsContext * /*this*/, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *); // exported (id=0x900107) + NV_STATUS (*__kgrctxControl__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kgrctxMap__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kgrctxUnmap__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__kgrctxShareCallback__)(struct KernelGraphicsContext * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kgrctxGetRegBaseOffsetAndSize__)(struct KernelGraphicsContext * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kgrctxGetMapAddrSpace__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kgrctxInternalControlForward__)(struct KernelGraphicsContext * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvBool (*__kgrctxAccessCallback__)(struct KernelGraphicsContext * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kgrctxGetMemInterMapParams__)(struct KernelGraphicsContext * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kgrctxCheckMemInterUnmap__)(struct KernelGraphicsContext * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kgrctxGetMemoryMappingDescriptor__)(struct KernelGraphicsContext * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kgrctxControlSerialization_Prologue__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__kgrctxControlSerialization_Epilogue__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kgrctxControl_Prologue__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__kgrctxControl_Epilogue__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kgrctxIsDuplicate__)(struct KernelGraphicsContext * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__kgrctxPreDestruct__)(struct KernelGraphicsContext * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__kgrctxControlFilter__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__kgrctxIsPartialUnmapSupported__)(struct KernelGraphicsContext * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__kgrctxMapTo__)(struct KernelGraphicsContext * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__kgrctxUnmapFrom__)(struct KernelGraphicsContext * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__kgrctxGetRefCount__)(struct KernelGraphicsContext * /*this*/); // virtual inherited (res) base (gpures) + void (*__kgrctxAddAdditionalDependants__)(struct RsClient *, struct KernelGraphicsContext * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members struct KernelGraphicsContextShared *pShared; VGPU_GFXP_BUFFERS *pVgpuGfxpBuffers; }; @@ -275,6 +311,7 @@ typedef struct KernelGraphicsContext KernelGraphicsContext; #define __nvoc_class_id_KernelGraphicsContext 0x7ead09 #endif /* __nvoc_class_id_KernelGraphicsContext */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGraphicsContext; #define __staticCast_KernelGraphicsContext(pThis) \ @@ -287,197 +324,194 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGraphicsContext; ((KernelGraphicsContext*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelGraphicsContext))) #endif //__nvoc_kernel_graphics_context_h_disabled - NV_STATUS __nvoc_objCreateDynamic_KernelGraphicsContext(KernelGraphicsContext**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_KernelGraphicsContext(KernelGraphicsContext**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_KernelGraphicsContext(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_KernelGraphicsContext((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) -#define kgrctxCanCopy(arg0) kgrctxCanCopy_DISPATCH(arg0) -#define kgrctxGetInternalObjectHandle(arg0) kgrctxGetInternalObjectHandle_DISPATCH(arg0) + +// Wrapper macros +#define kgrctxCanCopy_FNPTR(arg_this) arg_this->__kgrctxCanCopy__ +#define kgrctxCanCopy(arg_this) kgrctxCanCopy_DISPATCH(arg_this) +#define kgrctxGetInternalObjectHandle_FNPTR(arg_this) arg_this->__kgrctxGetInternalObjectHandle__ +#define kgrctxGetInternalObjectHandle(arg_this) kgrctxGetInternalObjectHandle_DISPATCH(arg_this) +#define kgrctxShouldPreAllocPmBuffer_FNPTR(pKernelGraphicsContext) pKernelGraphicsContext->__kgrctxShouldPreAllocPmBuffer__ #define kgrctxShouldPreAllocPmBuffer(pGpu, pKernelGraphicsContext, pKernelChannel) kgrctxShouldPreAllocPmBuffer_DISPATCH(pGpu, pKernelGraphicsContext, pKernelChannel) #define kgrctxShouldPreAllocPmBuffer_HAL(pGpu, pKernelGraphicsContext, pKernelChannel) kgrctxShouldPreAllocPmBuffer_DISPATCH(pGpu, pKernelGraphicsContext, pKernelChannel) -#define kgrctxGetRegisterAccessMapId(arg0, arg1, arg2) kgrctxGetRegisterAccessMapId_DISPATCH(arg0, arg1, arg2) -#define kgrctxGetRegisterAccessMapId_HAL(arg0, arg1, arg2) kgrctxGetRegisterAccessMapId_DISPATCH(arg0, arg1, arg2) +#define kgrctxGetRegisterAccessMapId_FNPTR(arg_this) arg_this->__kgrctxGetRegisterAccessMapId__ +#define kgrctxGetRegisterAccessMapId(arg1, arg_this, arg3) kgrctxGetRegisterAccessMapId_DISPATCH(arg1, arg_this, arg3) +#define kgrctxGetRegisterAccessMapId_HAL(arg1, arg_this, arg3) kgrctxGetRegisterAccessMapId_DISPATCH(arg1, arg_this, arg3) +#define kgrctxCtrlGetTpcPartitionMode_FNPTR(pKernelGraphicsContext) pKernelGraphicsContext->__kgrctxCtrlGetTpcPartitionMode__ #define kgrctxCtrlGetTpcPartitionMode(pKernelGraphicsContext, pParams) kgrctxCtrlGetTpcPartitionMode_DISPATCH(pKernelGraphicsContext, pParams) +#define kgrctxCtrlSetTpcPartitionMode_FNPTR(pKernelGraphicsContext) pKernelGraphicsContext->__kgrctxCtrlSetTpcPartitionMode__ #define kgrctxCtrlSetTpcPartitionMode(pKernelGraphicsContext, pParams) kgrctxCtrlSetTpcPartitionMode_DISPATCH(pKernelGraphicsContext, pParams) +#define kgrctxCtrlGetMMUDebugMode_FNPTR(pKernelGraphicsContext) pKernelGraphicsContext->__kgrctxCtrlGetMMUDebugMode__ #define kgrctxCtrlGetMMUDebugMode(pKernelGraphicsContext, pParams) kgrctxCtrlGetMMUDebugMode_DISPATCH(pKernelGraphicsContext, pParams) +#define kgrctxCtrlProgramVidmemPromote_FNPTR(pKernelGraphicsContext) pKernelGraphicsContext->__kgrctxCtrlProgramVidmemPromote__ #define kgrctxCtrlProgramVidmemPromote(pKernelGraphicsContext, pParams) kgrctxCtrlProgramVidmemPromote_DISPATCH(pKernelGraphicsContext, pParams) +#define kgrctxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define kgrctxControl(pGpuResource, pCallContext, pParams) kgrctxControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define kgrctxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define kgrctxMap(pGpuResource, pCallContext, pParams, pCpuMapping) kgrctxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define kgrctxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define kgrctxUnmap(pGpuResource, pCallContext, pCpuMapping) kgrctxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define kgrctxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define kgrctxShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) kgrctxShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define kgrctxCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) kgrctxCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define kgrctxMapTo(pResource, pParams) kgrctxMapTo_DISPATCH(pResource, pParams) -#define kgrctxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) kgrctxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define kgrctxGetRefCount(pResource) kgrctxGetRefCount_DISPATCH(pResource) -#define kgrctxAddAdditionalDependants(pClient, pResource, pReference) kgrctxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define kgrctxControl_Prologue(pResource, pCallContext, pParams) kgrctxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define kgrctxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define kgrctxGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) kgrctxGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define kgrctxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define kgrctxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) kgrctxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define kgrctxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define kgrctxInternalControlForward(pGpuResource, command, pParams, size) kgrctxInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define kgrctxUnmapFrom(pResource, pParams) kgrctxUnmapFrom_DISPATCH(pResource, pParams) -#define kgrctxControl_Epilogue(pResource, pCallContext, pParams) kgrctxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kgrctxControl(pGpuResource, pCallContext, pParams) kgrctxControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define kgrctxUnmap(pGpuResource, pCallContext, pCpuMapping) kgrctxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define kgrctxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define kgrctxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kgrctxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define kgrctxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define kgrctxGetMemInterMapParams(pRmResource, pParams) kgrctxGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define kgrctxCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define kgrctxCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) kgrctxCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define kgrctxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define kgrctxGetMemoryMappingDescriptor(pRmResource, ppMemDesc) kgrctxGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define kgrctxControlFilter(pResource, pCallContext, pParams) kgrctxControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define kgrctxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define kgrctxControlSerialization_Prologue(pResource, pCallContext, pParams) kgrctxControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define kgrctxIsPartialUnmapSupported(pResource) kgrctxIsPartialUnmapSupported_DISPATCH(pResource) -#define kgrctxPreDestruct(pResource) kgrctxPreDestruct_DISPATCH(pResource) -#define kgrctxIsDuplicate(pResource, hMemory, pDuplicate) kgrctxIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define kgrctxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ #define kgrctxControlSerialization_Epilogue(pResource, pCallContext, pParams) kgrctxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kgrctxMap(pGpuResource, pCallContext, pParams, pCpuMapping) kgrctxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define kgrctxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kgrctxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool kgrctxShouldManageCtxBuffers_KERNEL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, NvU32 gfid); - +#define kgrctxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define kgrctxControl_Prologue(pResource, pCallContext, pParams) kgrctxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define kgrctxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define kgrctxControl_Epilogue(pResource, pCallContext, pParams) kgrctxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kgrctxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define kgrctxIsDuplicate(pResource, hMemory, pDuplicate) kgrctxIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define kgrctxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define kgrctxPreDestruct(pResource) kgrctxPreDestruct_DISPATCH(pResource) +#define kgrctxControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define kgrctxControlFilter(pResource, pCallContext, pParams) kgrctxControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define kgrctxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define kgrctxIsPartialUnmapSupported(pResource) kgrctxIsPartialUnmapSupported_DISPATCH(pResource) +#define kgrctxMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define kgrctxMapTo(pResource, pParams) kgrctxMapTo_DISPATCH(pResource, pParams) +#define kgrctxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define kgrctxUnmapFrom(pResource, pParams) kgrctxUnmapFrom_DISPATCH(pResource, pParams) +#define kgrctxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define kgrctxGetRefCount(pResource) kgrctxGetRefCount_DISPATCH(pResource) +#define kgrctxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define kgrctxAddAdditionalDependants(pClient, pResource, pReference) kgrctxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NvBool kgrctxShouldManageCtxBuffers(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, NvU32 gfid) { - NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); - return NV_FALSE; +// Dispatch functions +static inline NvBool kgrctxCanCopy_DISPATCH(struct KernelGraphicsContext *arg_this) { + return arg_this->__kgrctxCanCopy__(arg_this); } -#else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxShouldManageCtxBuffers(arg0, arg1, gfid) kgrctxShouldManageCtxBuffers_KERNEL(arg0, arg1, gfid) -#endif //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxShouldManageCtxBuffers_HAL(arg0, arg1, gfid) kgrctxShouldManageCtxBuffers(arg0, arg1, gfid) - -NvBool kgrctxShouldCleanup_KERNEL(struct OBJGPU *pGpu, struct KernelGraphicsContext *pKernelGraphicsContext); - - -#ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NvBool kgrctxShouldCleanup(struct OBJGPU *pGpu, struct KernelGraphicsContext *pKernelGraphicsContext) { - NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); - return NV_FALSE; +static inline NvHandle kgrctxGetInternalObjectHandle_DISPATCH(struct KernelGraphicsContext *arg_this) { + return arg_this->__kgrctxGetInternalObjectHandle__(arg_this); } -#else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxShouldCleanup(pGpu, pKernelGraphicsContext) kgrctxShouldCleanup_KERNEL(pGpu, pKernelGraphicsContext) -#endif //__nvoc_kernel_graphics_context_h_disabled - -#define kgrctxShouldCleanup_HAL(pGpu, pKernelGraphicsContext) kgrctxShouldCleanup(pGpu, pKernelGraphicsContext) - -void kgrctxUnmapBuffers_KERNEL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, KernelGraphicsContextUnicast *arg2, struct KernelChannel *arg3); - -#ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxUnmapBuffers(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, KernelGraphicsContextUnicast *arg2, struct KernelChannel *arg3) { - NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); +static inline NvBool kgrctxShouldPreAllocPmBuffer_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphicsContext *pKernelGraphicsContext, struct KernelChannel *pKernelChannel) { + return pKernelGraphicsContext->__kgrctxShouldPreAllocPmBuffer__(pGpu, pKernelGraphicsContext, pKernelChannel); } -#else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxUnmapBuffers(arg0, arg1, arg2, arg3) kgrctxUnmapBuffers_KERNEL(arg0, arg1, arg2, arg3) -#endif //__nvoc_kernel_graphics_context_h_disabled - -#define kgrctxUnmapBuffers_HAL(arg0, arg1, arg2, arg3) kgrctxUnmapBuffers(arg0, arg1, arg2, arg3) - -NV_STATUS kgrctxUnmapCtxBuffers_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphicsObject *arg2, struct KernelGraphics *arg3, NvBool bDestructor); - -#ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxUnmapCtxBuffers(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphicsObject *arg2, struct KernelGraphics *arg3, NvBool bDestructor) { - NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline GR_GLOBALCTX_BUFFER kgrctxGetRegisterAccessMapId_DISPATCH(struct OBJGPU *arg1, struct KernelGraphicsContext *arg_this, struct KernelChannel *arg3) { + return arg_this->__kgrctxGetRegisterAccessMapId__(arg1, arg_this, arg3); } -#else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxUnmapCtxBuffers(arg0, arg1, arg2, arg3, bDestructor) kgrctxUnmapCtxBuffers_IMPL(arg0, arg1, arg2, arg3, bDestructor) -#endif //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxUnmapCtxBuffers_HAL(arg0, arg1, arg2, arg3, bDestructor) kgrctxUnmapCtxBuffers(arg0, arg1, arg2, arg3, bDestructor) - -void kgrctxIncObjectCount_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, NvU32 classNum); - - -#ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxIncObjectCount(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, NvU32 classNum) { - NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); +static inline NV_STATUS kgrctxCtrlGetTpcPartitionMode_DISPATCH(struct KernelGraphicsContext *pKernelGraphicsContext, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *pParams) { + return pKernelGraphicsContext->__kgrctxCtrlGetTpcPartitionMode__(pKernelGraphicsContext, pParams); } -#else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxIncObjectCount(arg0, arg1, classNum) kgrctxIncObjectCount_IMPL(arg0, arg1, classNum) -#endif //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxIncObjectCount_HAL(arg0, arg1, classNum) kgrctxIncObjectCount(arg0, arg1, classNum) - -void kgrctxDecObjectCount_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, NvU32 classNum); - - -#ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxDecObjectCount(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, NvU32 classNum) { - NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); +static inline NV_STATUS kgrctxCtrlSetTpcPartitionMode_DISPATCH(struct KernelGraphicsContext *pKernelGraphicsContext, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *pParams) { + return pKernelGraphicsContext->__kgrctxCtrlSetTpcPartitionMode__(pKernelGraphicsContext, pParams); } -#else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxDecObjectCount(arg0, arg1, classNum) kgrctxDecObjectCount_IMPL(arg0, arg1, classNum) -#endif //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxDecObjectCount_HAL(arg0, arg1, classNum) kgrctxDecObjectCount(arg0, arg1, classNum) +static inline NV_STATUS kgrctxCtrlGetMMUDebugMode_DISPATCH(struct KernelGraphicsContext *pKernelGraphicsContext, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *pParams) { + return pKernelGraphicsContext->__kgrctxCtrlGetMMUDebugMode__(pKernelGraphicsContext, pParams); +} -static inline NvBool kgrctxCanCopy_0c883b(struct KernelGraphicsContext *arg0) { - return ((NvBool)(0 == 0)); +static inline NV_STATUS kgrctxCtrlProgramVidmemPromote_DISPATCH(struct KernelGraphicsContext *pKernelGraphicsContext, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *pParams) { + return pKernelGraphicsContext->__kgrctxCtrlProgramVidmemPromote__(pKernelGraphicsContext, pParams); } -static inline NvBool kgrctxCanCopy_DISPATCH(struct KernelGraphicsContext *arg0) { - return arg0->__kgrctxCanCopy__(arg0); +static inline NV_STATUS kgrctxControl_DISPATCH(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__kgrctxControl__(pGpuResource, pCallContext, pParams); } -NvHandle kgrctxGetInternalObjectHandle_IMPL(struct KernelGraphicsContext *arg0); +static inline NV_STATUS kgrctxMap_DISPATCH(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__kgrctxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +} -static inline NvHandle kgrctxGetInternalObjectHandle_DISPATCH(struct KernelGraphicsContext *arg0) { - return arg0->__kgrctxGetInternalObjectHandle__(arg0); +static inline NV_STATUS kgrctxUnmap_DISPATCH(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__kgrctxUnmap__(pGpuResource, pCallContext, pCpuMapping); } -NvBool kgrctxShouldPreAllocPmBuffer_VF(struct OBJGPU *pGpu, struct KernelGraphicsContext *pKernelGraphicsContext, struct KernelChannel *pKernelChannel); +static inline NvBool kgrctxShareCallback_DISPATCH(struct KernelGraphicsContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__kgrctxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +} -NvBool kgrctxShouldPreAllocPmBuffer_PF(struct OBJGPU *pGpu, struct KernelGraphicsContext *pKernelGraphicsContext, struct KernelChannel *pKernelChannel); +static inline NV_STATUS kgrctxGetRegBaseOffsetAndSize_DISPATCH(struct KernelGraphicsContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__kgrctxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +} -static inline NvBool kgrctxShouldPreAllocPmBuffer_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphicsContext *pKernelGraphicsContext, struct KernelChannel *pKernelChannel) { - return pKernelGraphicsContext->__kgrctxShouldPreAllocPmBuffer__(pGpu, pKernelGraphicsContext, pKernelChannel); +static inline NV_STATUS kgrctxGetMapAddrSpace_DISPATCH(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__kgrctxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline GR_GLOBALCTX_BUFFER kgrctxGetRegisterAccessMapId_aa21e9(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelChannel *arg2) { - return GR_GLOBALCTX_BUFFER_PRIV_ACCESS_MAP; +static inline NV_STATUS kgrctxInternalControlForward_DISPATCH(struct KernelGraphicsContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__kgrctxInternalControlForward__(pGpuResource, command, pParams, size); } -GR_GLOBALCTX_BUFFER kgrctxGetRegisterAccessMapId_PF(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelChannel *arg2); +static inline NvBool kgrctxAccessCallback_DISPATCH(struct KernelGraphicsContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__kgrctxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +} -static inline GR_GLOBALCTX_BUFFER kgrctxGetRegisterAccessMapId_DISPATCH(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelChannel *arg2) { - return arg1->__kgrctxGetRegisterAccessMapId__(arg0, arg1, arg2); +static inline NV_STATUS kgrctxGetMemInterMapParams_DISPATCH(struct KernelGraphicsContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__kgrctxGetMemInterMapParams__(pRmResource, pParams); } -NV_STATUS kgrctxCtrlGetTpcPartitionMode_IMPL(struct KernelGraphicsContext *pKernelGraphicsContext, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *pParams); +static inline NV_STATUS kgrctxCheckMemInterUnmap_DISPATCH(struct KernelGraphicsContext *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__kgrctxCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +} -static inline NV_STATUS kgrctxCtrlGetTpcPartitionMode_DISPATCH(struct KernelGraphicsContext *pKernelGraphicsContext, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *pParams) { - return pKernelGraphicsContext->__kgrctxCtrlGetTpcPartitionMode__(pKernelGraphicsContext, pParams); +static inline NV_STATUS kgrctxGetMemoryMappingDescriptor_DISPATCH(struct KernelGraphicsContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__kgrctxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -NV_STATUS kgrctxCtrlSetTpcPartitionMode_IMPL(struct KernelGraphicsContext *pKernelGraphicsContext, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *pParams); +static inline NV_STATUS kgrctxControlSerialization_Prologue_DISPATCH(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kgrctxControlSerialization_Prologue__(pResource, pCallContext, pParams); +} -static inline NV_STATUS kgrctxCtrlSetTpcPartitionMode_DISPATCH(struct KernelGraphicsContext *pKernelGraphicsContext, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *pParams) { - return pKernelGraphicsContext->__kgrctxCtrlSetTpcPartitionMode__(pKernelGraphicsContext, pParams); +static inline void kgrctxControlSerialization_Epilogue_DISPATCH(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__kgrctxControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -NV_STATUS kgrctxCtrlGetMMUDebugMode_IMPL(struct KernelGraphicsContext *pKernelGraphicsContext, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *pParams); +static inline NV_STATUS kgrctxControl_Prologue_DISPATCH(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kgrctxControl_Prologue__(pResource, pCallContext, pParams); +} -static inline NV_STATUS kgrctxCtrlGetMMUDebugMode_DISPATCH(struct KernelGraphicsContext *pKernelGraphicsContext, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *pParams) { - return pKernelGraphicsContext->__kgrctxCtrlGetMMUDebugMode__(pKernelGraphicsContext, pParams); +static inline void kgrctxControl_Epilogue_DISPATCH(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__kgrctxControl_Epilogue__(pResource, pCallContext, pParams); } -NV_STATUS kgrctxCtrlProgramVidmemPromote_IMPL(struct KernelGraphicsContext *pKernelGraphicsContext, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *pParams); +static inline NV_STATUS kgrctxIsDuplicate_DISPATCH(struct KernelGraphicsContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__kgrctxIsDuplicate__(pResource, hMemory, pDuplicate); +} -static inline NV_STATUS kgrctxCtrlProgramVidmemPromote_DISPATCH(struct KernelGraphicsContext *pKernelGraphicsContext, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *pParams) { - return pKernelGraphicsContext->__kgrctxCtrlProgramVidmemPromote__(pKernelGraphicsContext, pParams); +static inline void kgrctxPreDestruct_DISPATCH(struct KernelGraphicsContext *pResource) { + pResource->__kgrctxPreDestruct__(pResource); } -static inline NvBool kgrctxShareCallback_DISPATCH(struct KernelGraphicsContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__kgrctxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS kgrctxControlFilter_DISPATCH(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kgrctxControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS kgrctxCheckMemInterUnmap_DISPATCH(struct KernelGraphicsContext *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__kgrctxCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NvBool kgrctxIsPartialUnmapSupported_DISPATCH(struct KernelGraphicsContext *pResource) { + return pResource->__kgrctxIsPartialUnmapSupported__(pResource); } static inline NV_STATUS kgrctxMapTo_DISPATCH(struct KernelGraphicsContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return pResource->__kgrctxMapTo__(pResource, pParams); } -static inline NV_STATUS kgrctxGetMapAddrSpace_DISPATCH(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__kgrctxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +static inline NV_STATUS kgrctxUnmapFrom_DISPATCH(struct KernelGraphicsContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__kgrctxUnmapFrom__(pResource, pParams); } static inline NvU32 kgrctxGetRefCount_DISPATCH(struct KernelGraphicsContext *pResource) { @@ -488,74 +522,111 @@ static inline void kgrctxAddAdditionalDependants_DISPATCH(struct RsClient *pClie pResource->__kgrctxAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NV_STATUS kgrctxControl_Prologue_DISPATCH(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kgrctxControl_Prologue__(pResource, pCallContext, pParams); -} +NvBool kgrctxShouldManageCtxBuffers_KERNEL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, NvU32 gfid); -static inline NV_STATUS kgrctxGetRegBaseOffsetAndSize_DISPATCH(struct KernelGraphicsContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__kgrctxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); -} -static inline NV_STATUS kgrctxInternalControlForward_DISPATCH(struct KernelGraphicsContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__kgrctxInternalControlForward__(pGpuResource, command, pParams, size); +#ifdef __nvoc_kernel_graphics_context_h_disabled +static inline NvBool kgrctxShouldManageCtxBuffers(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, NvU32 gfid) { + NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); + return NV_FALSE; } +#else //__nvoc_kernel_graphics_context_h_disabled +#define kgrctxShouldManageCtxBuffers(arg1, arg2, gfid) kgrctxShouldManageCtxBuffers_KERNEL(arg1, arg2, gfid) +#endif //__nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxUnmapFrom_DISPATCH(struct KernelGraphicsContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__kgrctxUnmapFrom__(pResource, pParams); -} +#define kgrctxShouldManageCtxBuffers_HAL(arg1, arg2, gfid) kgrctxShouldManageCtxBuffers(arg1, arg2, gfid) -static inline void kgrctxControl_Epilogue_DISPATCH(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kgrctxControl_Epilogue__(pResource, pCallContext, pParams); -} +NvBool kgrctxShouldCleanup_KERNEL(struct OBJGPU *pGpu, struct KernelGraphicsContext *pKernelGraphicsContext); -static inline NV_STATUS kgrctxControl_DISPATCH(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__kgrctxControl__(pGpuResource, pCallContext, pParams); -} -static inline NV_STATUS kgrctxUnmap_DISPATCH(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kgrctxUnmap__(pGpuResource, pCallContext, pCpuMapping); +#ifdef __nvoc_kernel_graphics_context_h_disabled +static inline NvBool kgrctxShouldCleanup(struct OBJGPU *pGpu, struct KernelGraphicsContext *pKernelGraphicsContext) { + NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); + return NV_FALSE; } +#else //__nvoc_kernel_graphics_context_h_disabled +#define kgrctxShouldCleanup(pGpu, pKernelGraphicsContext) kgrctxShouldCleanup_KERNEL(pGpu, pKernelGraphicsContext) +#endif //__nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxGetMemInterMapParams_DISPATCH(struct KernelGraphicsContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__kgrctxGetMemInterMapParams__(pRmResource, pParams); -} +#define kgrctxShouldCleanup_HAL(pGpu, pKernelGraphicsContext) kgrctxShouldCleanup(pGpu, pKernelGraphicsContext) -static inline NV_STATUS kgrctxGetMemoryMappingDescriptor_DISPATCH(struct KernelGraphicsContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__kgrctxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); -} +void kgrctxUnmapBuffers_KERNEL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, KernelGraphicsContextUnicast *arg3, struct KernelChannel *arg4); -static inline NV_STATUS kgrctxControlFilter_DISPATCH(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kgrctxControlFilter__(pResource, pCallContext, pParams); -} -static inline NV_STATUS kgrctxControlSerialization_Prologue_DISPATCH(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kgrctxControlSerialization_Prologue__(pResource, pCallContext, pParams); +#ifdef __nvoc_kernel_graphics_context_h_disabled +static inline void kgrctxUnmapBuffers(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, KernelGraphicsContextUnicast *arg3, struct KernelChannel *arg4) { + NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); } +#else //__nvoc_kernel_graphics_context_h_disabled +#define kgrctxUnmapBuffers(arg1, arg2, arg3, arg4) kgrctxUnmapBuffers_KERNEL(arg1, arg2, arg3, arg4) +#endif //__nvoc_kernel_graphics_context_h_disabled -static inline NvBool kgrctxIsPartialUnmapSupported_DISPATCH(struct KernelGraphicsContext *pResource) { - return pResource->__kgrctxIsPartialUnmapSupported__(pResource); -} +#define kgrctxUnmapBuffers_HAL(arg1, arg2, arg3, arg4) kgrctxUnmapBuffers(arg1, arg2, arg3, arg4) -static inline void kgrctxPreDestruct_DISPATCH(struct KernelGraphicsContext *pResource) { - pResource->__kgrctxPreDestruct__(pResource); +NV_STATUS kgrctxUnmapCtxBuffers_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphicsObject *arg3, struct KernelGraphics *arg4, NvBool bDestructor); + + +#ifdef __nvoc_kernel_graphics_context_h_disabled +static inline NV_STATUS kgrctxUnmapCtxBuffers(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphicsObject *arg3, struct KernelGraphics *arg4, NvBool bDestructor) { + NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_graphics_context_h_disabled +#define kgrctxUnmapCtxBuffers(arg1, arg2, arg3, arg4, bDestructor) kgrctxUnmapCtxBuffers_IMPL(arg1, arg2, arg3, arg4, bDestructor) +#endif //__nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxIsDuplicate_DISPATCH(struct KernelGraphicsContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__kgrctxIsDuplicate__(pResource, hMemory, pDuplicate); +#define kgrctxUnmapCtxBuffers_HAL(arg1, arg2, arg3, arg4, bDestructor) kgrctxUnmapCtxBuffers(arg1, arg2, arg3, arg4, bDestructor) + +void kgrctxIncObjectCount_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, NvU32 classNum); + + +#ifdef __nvoc_kernel_graphics_context_h_disabled +static inline void kgrctxIncObjectCount(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, NvU32 classNum) { + NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); } +#else //__nvoc_kernel_graphics_context_h_disabled +#define kgrctxIncObjectCount(arg1, arg2, classNum) kgrctxIncObjectCount_IMPL(arg1, arg2, classNum) +#endif //__nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxControlSerialization_Epilogue_DISPATCH(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kgrctxControlSerialization_Epilogue__(pResource, pCallContext, pParams); +#define kgrctxIncObjectCount_HAL(arg1, arg2, classNum) kgrctxIncObjectCount(arg1, arg2, classNum) + +void kgrctxDecObjectCount_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, NvU32 classNum); + + +#ifdef __nvoc_kernel_graphics_context_h_disabled +static inline void kgrctxDecObjectCount(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, NvU32 classNum) { + NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); } +#else //__nvoc_kernel_graphics_context_h_disabled +#define kgrctxDecObjectCount(arg1, arg2, classNum) kgrctxDecObjectCount_IMPL(arg1, arg2, classNum) +#endif //__nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxMap_DISPATCH(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kgrctxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +#define kgrctxDecObjectCount_HAL(arg1, arg2, classNum) kgrctxDecObjectCount(arg1, arg2, classNum) + +static inline NvBool kgrctxCanCopy_0c883b(struct KernelGraphicsContext *arg1) { + return ((NvBool)(0 == 0)); } -static inline NvBool kgrctxAccessCallback_DISPATCH(struct KernelGraphicsContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__kgrctxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +NvHandle kgrctxGetInternalObjectHandle_IMPL(struct KernelGraphicsContext *arg1); + +NvBool kgrctxShouldPreAllocPmBuffer_VF(struct OBJGPU *pGpu, struct KernelGraphicsContext *pKernelGraphicsContext, struct KernelChannel *pKernelChannel); + +NvBool kgrctxShouldPreAllocPmBuffer_PF(struct OBJGPU *pGpu, struct KernelGraphicsContext *pKernelGraphicsContext, struct KernelChannel *pKernelChannel); + +static inline GR_GLOBALCTX_BUFFER kgrctxGetRegisterAccessMapId_aa21e9(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelChannel *arg3) { + return GR_GLOBALCTX_BUFFER_PRIV_ACCESS_MAP; } +GR_GLOBALCTX_BUFFER kgrctxGetRegisterAccessMapId_PF(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelChannel *arg3); + +NV_STATUS kgrctxCtrlGetTpcPartitionMode_IMPL(struct KernelGraphicsContext *pKernelGraphicsContext, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *pParams); + +NV_STATUS kgrctxCtrlSetTpcPartitionMode_IMPL(struct KernelGraphicsContext *pKernelGraphicsContext, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *pParams); + +NV_STATUS kgrctxCtrlGetMMUDebugMode_IMPL(struct KernelGraphicsContext *pKernelGraphicsContext, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *pParams); + +NV_STATUS kgrctxCtrlProgramVidmemPromote_IMPL(struct KernelGraphicsContext *pKernelGraphicsContext, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *pParams); + static inline struct KernelGraphicsContextShared *kgrctxGetShared(struct OBJGPU *pGpu, struct KernelGraphicsContext *pKernelGraphicsContext) { struct KernelGraphicsContext_PRIVATE *pKernelGraphicsContext_PRIVATE = (struct KernelGraphicsContext_PRIVATE *)pKernelGraphicsContext; return pKernelGraphicsContext_PRIVATE->pShared; @@ -571,473 +642,493 @@ static inline void kgrctxSetVgpuGfxpBuffers(struct KernelGraphicsContext *pKerne pKernelGraphicsContext_PRIVATE->pVgpuGfxpBuffers = pBuffers; } -NV_STATUS kgrctxFromKernelChannel_IMPL(struct KernelChannel *arg0, struct KernelGraphicsContext **arg1); +NV_STATUS kgrctxFromKernelChannel_IMPL(struct KernelChannel *arg1, struct KernelGraphicsContext **arg2); -#define kgrctxFromKernelChannel(arg0, arg1) kgrctxFromKernelChannel_IMPL(arg0, arg1) -NV_STATUS kgrctxFromKernelChannelGroupApi_IMPL(struct KernelChannelGroupApi *arg0, struct KernelGraphicsContext **arg1); +#define kgrctxFromKernelChannel(arg1, arg2) kgrctxFromKernelChannel_IMPL(arg1, arg2) +NV_STATUS kgrctxFromKernelChannelGroupApi_IMPL(struct KernelChannelGroupApi *arg1, struct KernelGraphicsContext **arg2); -#define kgrctxFromKernelChannelGroupApi(arg0, arg1) kgrctxFromKernelChannelGroupApi_IMPL(arg0, arg1) -NV_STATUS kgrctxGetGlobalContextBufferExternalId_IMPL(GR_GLOBALCTX_BUFFER arg0, NvU32 *pExternalId); +#define kgrctxFromKernelChannelGroupApi(arg1, arg2) kgrctxFromKernelChannelGroupApi_IMPL(arg1, arg2) +NV_STATUS kgrctxGetGlobalContextBufferExternalId_IMPL(GR_GLOBALCTX_BUFFER arg1, NvU32 *pExternalId); -#define kgrctxGetGlobalContextBufferExternalId(arg0, pExternalId) kgrctxGetGlobalContextBufferExternalId_IMPL(arg0, pExternalId) -NV_STATUS kgrctxGetGlobalContextBufferInternalId_IMPL(NvU32 externalId, GR_GLOBALCTX_BUFFER *arg0); +#define kgrctxGetGlobalContextBufferExternalId(arg1, pExternalId) kgrctxGetGlobalContextBufferExternalId_IMPL(arg1, pExternalId) +NV_STATUS kgrctxGetGlobalContextBufferInternalId_IMPL(NvU32 externalId, GR_GLOBALCTX_BUFFER *arg2); -#define kgrctxGetGlobalContextBufferInternalId(externalId, arg0) kgrctxGetGlobalContextBufferInternalId_IMPL(externalId, arg0) -NV_STATUS kgrctxCtxBufferToFifoEngineId_IMPL(GR_CTX_BUFFER arg0, NvU32 *pFifoEngineId); +#define kgrctxGetGlobalContextBufferInternalId(externalId, arg2) kgrctxGetGlobalContextBufferInternalId_IMPL(externalId, arg2) +NV_STATUS kgrctxCtxBufferToFifoEngineId_IMPL(GR_CTX_BUFFER arg1, NvU32 *pFifoEngineId); -#define kgrctxCtxBufferToFifoEngineId(arg0, pFifoEngineId) kgrctxCtxBufferToFifoEngineId_IMPL(arg0, pFifoEngineId) -NV_STATUS kgrctxGlobalCtxBufferToFifoEngineId_IMPL(GR_GLOBALCTX_BUFFER arg0, NvU32 *pFifoEngineId); +#define kgrctxCtxBufferToFifoEngineId(arg1, pFifoEngineId) kgrctxCtxBufferToFifoEngineId_IMPL(arg1, pFifoEngineId) +NV_STATUS kgrctxGlobalCtxBufferToFifoEngineId_IMPL(GR_GLOBALCTX_BUFFER arg1, NvU32 *pFifoEngineId); -#define kgrctxGlobalCtxBufferToFifoEngineId(arg0, pFifoEngineId) kgrctxGlobalCtxBufferToFifoEngineId_IMPL(arg0, pFifoEngineId) +#define kgrctxGlobalCtxBufferToFifoEngineId(arg1, pFifoEngineId) kgrctxGlobalCtxBufferToFifoEngineId_IMPL(arg1, pFifoEngineId) NV_STATUS kgrctxGetGidInfoInPlace_IMPL(struct OBJGPU *pGpu, NvU8 *pUuidBuffer, NvU32 uuidBufferSize, NvU32 flags); #define kgrctxGetGidInfoInPlace(pGpu, pUuidBuffer, uuidBufferSize, flags) kgrctxGetGidInfoInPlace_IMPL(pGpu, pUuidBuffer, uuidBufferSize, flags) GMMU_APERTURE kgrctxGetExternalAllocAperture_IMPL(NvU32 addressSpace); #define kgrctxGetExternalAllocAperture(addressSpace) kgrctxGetExternalAllocAperture_IMPL(addressSpace) -NV_STATUS kgrctxFillCtxBufferInfo_IMPL(struct MEMORY_DESCRIPTOR *arg0, NvU32 externalId, NvBool bBufferGlobal, NV2080_CTRL_GR_CTX_BUFFER_INFO *arg1); +NV_STATUS kgrctxFillCtxBufferInfo_IMPL(struct MEMORY_DESCRIPTOR *arg1, NvU32 externalId, NvBool bBufferGlobal, NV2080_CTRL_GR_CTX_BUFFER_INFO *arg4); -#define kgrctxFillCtxBufferInfo(arg0, externalId, bBufferGlobal, arg1) kgrctxFillCtxBufferInfo_IMPL(arg0, externalId, bBufferGlobal, arg1) +#define kgrctxFillCtxBufferInfo(arg1, externalId, bBufferGlobal, arg4) kgrctxFillCtxBufferInfo_IMPL(arg1, externalId, bBufferGlobal, arg4) NV_STATUS kgrctxConstruct_IMPL(struct KernelGraphicsContext *arg_pKernelGraphicsContext, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_kgrctxConstruct(arg_pKernelGraphicsContext, arg_pCallContext, arg_pParams) kgrctxConstruct_IMPL(arg_pKernelGraphicsContext, arg_pCallContext, arg_pParams) -NV_STATUS kgrctxCopyConstruct_IMPL(struct KernelGraphicsContext *arg0, struct CALL_CONTEXT *arg1, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg2); +NV_STATUS kgrctxCopyConstruct_IMPL(struct KernelGraphicsContext *arg1, struct CALL_CONTEXT *arg2, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg3); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxCopyConstruct(struct KernelGraphicsContext *arg0, struct CALL_CONTEXT *arg1, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg2) { +static inline NV_STATUS kgrctxCopyConstruct(struct KernelGraphicsContext *arg1, struct CALL_CONTEXT *arg2, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxCopyConstruct(arg0, arg1, arg2) kgrctxCopyConstruct_IMPL(arg0, arg1, arg2) +#define kgrctxCopyConstruct(arg1, arg2, arg3) kgrctxCopyConstruct_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_graphics_context_h_disabled -void kgrctxDestruct_IMPL(struct KernelGraphicsContext *arg0); +void kgrctxDestruct_IMPL(struct KernelGraphicsContext *arg1); -#define __nvoc_kgrctxDestruct(arg0) kgrctxDestruct_IMPL(arg0) -NV_STATUS kgrctxGetUnicast_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, KernelGraphicsContextUnicast **arg2); +#define __nvoc_kgrctxDestruct(arg1) kgrctxDestruct_IMPL(arg1) +NV_STATUS kgrctxGetUnicast_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, KernelGraphicsContextUnicast **arg3); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxGetUnicast(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, KernelGraphicsContextUnicast **arg2) { +static inline NV_STATUS kgrctxGetUnicast(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, KernelGraphicsContextUnicast **arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxGetUnicast(arg0, arg1, arg2) kgrctxGetUnicast_IMPL(arg0, arg1, arg2) +#define kgrctxGetUnicast(arg1, arg2, arg3) kgrctxGetUnicast_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_graphics_context_h_disabled -NV_STATUS kgrctxLookupMmuFaultInfo_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, NV83DE_CTRL_DEBUG_READ_MMU_FAULT_INFO_PARAMS *arg2); +NV_STATUS kgrctxLookupMmuFaultInfo_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, NV83DE_CTRL_DEBUG_READ_MMU_FAULT_INFO_PARAMS *arg3); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxLookupMmuFaultInfo(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, NV83DE_CTRL_DEBUG_READ_MMU_FAULT_INFO_PARAMS *arg2) { +static inline NV_STATUS kgrctxLookupMmuFaultInfo(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, NV83DE_CTRL_DEBUG_READ_MMU_FAULT_INFO_PARAMS *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxLookupMmuFaultInfo(arg0, arg1, arg2) kgrctxLookupMmuFaultInfo_IMPL(arg0, arg1, arg2) +#define kgrctxLookupMmuFaultInfo(arg1, arg2, arg3) kgrctxLookupMmuFaultInfo_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_graphics_context_h_disabled -NV_STATUS kgrctxLookupMmuFault_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, NV83DE_MMU_FAULT_INFO *arg2); +NV_STATUS kgrctxLookupMmuFault_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, NV83DE_MMU_FAULT_INFO *arg3); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxLookupMmuFault(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, NV83DE_MMU_FAULT_INFO *arg2) { +static inline NV_STATUS kgrctxLookupMmuFault(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, NV83DE_MMU_FAULT_INFO *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxLookupMmuFault(arg0, arg1, arg2) kgrctxLookupMmuFault_IMPL(arg0, arg1, arg2) +#define kgrctxLookupMmuFault(arg1, arg2, arg3) kgrctxLookupMmuFault_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_graphics_context_h_disabled -NV_STATUS kgrctxClearMmuFault_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1); +NV_STATUS kgrctxClearMmuFault_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxClearMmuFault(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1) { +static inline NV_STATUS kgrctxClearMmuFault(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxClearMmuFault(arg0, arg1) kgrctxClearMmuFault_IMPL(arg0, arg1) +#define kgrctxClearMmuFault(arg1, arg2) kgrctxClearMmuFault_IMPL(arg1, arg2) #endif //__nvoc_kernel_graphics_context_h_disabled -void kgrctxRecordMmuFault_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, NvU32 mmuFaultInfo, NvU64 mmuFaultAddress, NvU32 mmuFaultType, NvU32 mmuFaultAccessType); +void kgrctxRecordMmuFault_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, NvU32 mmuFaultInfo, NvU64 mmuFaultAddress, NvU32 mmuFaultType, NvU32 mmuFaultAccessType); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxRecordMmuFault(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, NvU32 mmuFaultInfo, NvU64 mmuFaultAddress, NvU32 mmuFaultType, NvU32 mmuFaultAccessType) { +static inline void kgrctxRecordMmuFault(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, NvU32 mmuFaultInfo, NvU64 mmuFaultAddress, NvU32 mmuFaultType, NvU32 mmuFaultAccessType) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxRecordMmuFault(arg0, arg1, mmuFaultInfo, mmuFaultAddress, mmuFaultType, mmuFaultAccessType) kgrctxRecordMmuFault_IMPL(arg0, arg1, mmuFaultInfo, mmuFaultAddress, mmuFaultType, mmuFaultAccessType) +#define kgrctxRecordMmuFault(arg1, arg2, mmuFaultInfo, mmuFaultAddress, mmuFaultType, mmuFaultAccessType) kgrctxRecordMmuFault_IMPL(arg1, arg2, mmuFaultInfo, mmuFaultAddress, mmuFaultType, mmuFaultAccessType) #endif //__nvoc_kernel_graphics_context_h_disabled -KernelSMDebuggerSessionListIter kgrctxGetDebuggerSessionIter_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1); +KernelSMDebuggerSessionListIter kgrctxGetDebuggerSessionIter_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline KernelSMDebuggerSessionListIter kgrctxGetDebuggerSessionIter(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1) { +static inline KernelSMDebuggerSessionListIter kgrctxGetDebuggerSessionIter(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); KernelSMDebuggerSessionListIter ret; portMemSet(&ret, 0, sizeof(KernelSMDebuggerSessionListIter)); return ret; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxGetDebuggerSessionIter(arg0, arg1) kgrctxGetDebuggerSessionIter_IMPL(arg0, arg1) +#define kgrctxGetDebuggerSessionIter(arg1, arg2) kgrctxGetDebuggerSessionIter_IMPL(arg1, arg2) #endif //__nvoc_kernel_graphics_context_h_disabled -NvBool kgrctxRegisterKernelSMDebuggerSession_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelSMDebuggerSession *arg2); +NvBool kgrctxRegisterKernelSMDebuggerSession_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelSMDebuggerSession *arg3); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NvBool kgrctxRegisterKernelSMDebuggerSession(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelSMDebuggerSession *arg2) { +static inline NvBool kgrctxRegisterKernelSMDebuggerSession(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelSMDebuggerSession *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxRegisterKernelSMDebuggerSession(arg0, arg1, arg2) kgrctxRegisterKernelSMDebuggerSession_IMPL(arg0, arg1, arg2) +#define kgrctxRegisterKernelSMDebuggerSession(arg1, arg2, arg3) kgrctxRegisterKernelSMDebuggerSession_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_graphics_context_h_disabled -void kgrctxDeregisterKernelSMDebuggerSession_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelSMDebuggerSession *arg2); +void kgrctxDeregisterKernelSMDebuggerSession_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelSMDebuggerSession *arg3); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxDeregisterKernelSMDebuggerSession(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelSMDebuggerSession *arg2) { +static inline void kgrctxDeregisterKernelSMDebuggerSession(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelSMDebuggerSession *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxDeregisterKernelSMDebuggerSession(arg0, arg1, arg2) kgrctxDeregisterKernelSMDebuggerSession_IMPL(arg0, arg1, arg2) +#define kgrctxDeregisterKernelSMDebuggerSession(arg1, arg2, arg3) kgrctxDeregisterKernelSMDebuggerSession_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_graphics_context_h_disabled -NvBool kgrctxIsValid_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelChannel *arg2); +NvBool kgrctxIsValid_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelChannel *arg3); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NvBool kgrctxIsValid(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelChannel *arg2) { +static inline NvBool kgrctxIsValid(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelChannel *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxIsValid(arg0, arg1, arg2) kgrctxIsValid_IMPL(arg0, arg1, arg2) +#define kgrctxIsValid(arg1, arg2, arg3) kgrctxIsValid_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_graphics_context_h_disabled -NvBool kgrctxIsMainContextAllocated_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1); +NvBool kgrctxIsMainContextAllocated_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NvBool kgrctxIsMainContextAllocated(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1) { +static inline NvBool kgrctxIsMainContextAllocated(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxIsMainContextAllocated(arg0, arg1) kgrctxIsMainContextAllocated_IMPL(arg0, arg1) +#define kgrctxIsMainContextAllocated(arg1, arg2) kgrctxIsMainContextAllocated_IMPL(arg1, arg2) #endif //__nvoc_kernel_graphics_context_h_disabled -NV_STATUS kgrctxGetMainContextBuffer_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct MEMORY_DESCRIPTOR **arg2); +NV_STATUS kgrctxGetMainContextBuffer_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct MEMORY_DESCRIPTOR **arg3); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxGetMainContextBuffer(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct MEMORY_DESCRIPTOR **arg2) { +static inline NV_STATUS kgrctxGetMainContextBuffer(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct MEMORY_DESCRIPTOR **arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxGetMainContextBuffer(arg0, arg1, arg2) kgrctxGetMainContextBuffer_IMPL(arg0, arg1, arg2) +#define kgrctxGetMainContextBuffer(arg1, arg2, arg3) kgrctxGetMainContextBuffer_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_graphics_context_h_disabled -NV_STATUS kgrctxGetBufferCount_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, NvU32 *pBufferCount); +NV_STATUS kgrctxGetBufferCount_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, NvU32 *pBufferCount); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxGetBufferCount(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, NvU32 *pBufferCount) { +static inline NV_STATUS kgrctxGetBufferCount(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, NvU32 *pBufferCount) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxGetBufferCount(arg0, arg1, arg2, pBufferCount) kgrctxGetBufferCount_IMPL(arg0, arg1, arg2, pBufferCount) +#define kgrctxGetBufferCount(arg1, arg2, arg3, pBufferCount) kgrctxGetBufferCount_IMPL(arg1, arg2, arg3, pBufferCount) #endif //__nvoc_kernel_graphics_context_h_disabled -NV_STATUS kgrctxGetCtxBuffers_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, NvU32 gfid, NvU32 bufferCount, struct MEMORY_DESCRIPTOR **arg3, NvU32 *pCtxBufferType, NvU32 *pBufferCountOut, NvU32 *pFirstGlobalBuffer); +NV_STATUS kgrctxGetCtxBuffers_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, NvU32 gfid, NvU32 bufferCount, struct MEMORY_DESCRIPTOR **arg6, NvU32 *pCtxBufferType, NvU32 *pBufferCountOut, NvU32 *pFirstGlobalBuffer); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxGetCtxBuffers(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, NvU32 gfid, NvU32 bufferCount, struct MEMORY_DESCRIPTOR **arg3, NvU32 *pCtxBufferType, NvU32 *pBufferCountOut, NvU32 *pFirstGlobalBuffer) { +static inline NV_STATUS kgrctxGetCtxBuffers(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, NvU32 gfid, NvU32 bufferCount, struct MEMORY_DESCRIPTOR **arg6, NvU32 *pCtxBufferType, NvU32 *pBufferCountOut, NvU32 *pFirstGlobalBuffer) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxGetCtxBuffers(arg0, arg1, arg2, gfid, bufferCount, arg3, pCtxBufferType, pBufferCountOut, pFirstGlobalBuffer) kgrctxGetCtxBuffers_IMPL(arg0, arg1, arg2, gfid, bufferCount, arg3, pCtxBufferType, pBufferCountOut, pFirstGlobalBuffer) +#define kgrctxGetCtxBuffers(arg1, arg2, arg3, gfid, bufferCount, arg6, pCtxBufferType, pBufferCountOut, pFirstGlobalBuffer) kgrctxGetCtxBuffers_IMPL(arg1, arg2, arg3, gfid, bufferCount, arg6, pCtxBufferType, pBufferCountOut, pFirstGlobalBuffer) #endif //__nvoc_kernel_graphics_context_h_disabled -NV_STATUS kgrctxGetCtxBufferInfo_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, NvU32 gfid, NvU32 bufferMaxCount, NvU32 *pBufferCount, NV2080_CTRL_GR_CTX_BUFFER_INFO *arg3); +NV_STATUS kgrctxGetCtxBufferInfo_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, NvU32 gfid, NvU32 bufferMaxCount, NvU32 *pBufferCount, NV2080_CTRL_GR_CTX_BUFFER_INFO *arg7); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxGetCtxBufferInfo(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, NvU32 gfid, NvU32 bufferMaxCount, NvU32 *pBufferCount, NV2080_CTRL_GR_CTX_BUFFER_INFO *arg3) { +static inline NV_STATUS kgrctxGetCtxBufferInfo(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, NvU32 gfid, NvU32 bufferMaxCount, NvU32 *pBufferCount, NV2080_CTRL_GR_CTX_BUFFER_INFO *arg7) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxGetCtxBufferInfo(arg0, arg1, arg2, gfid, bufferMaxCount, pBufferCount, arg3) kgrctxGetCtxBufferInfo_IMPL(arg0, arg1, arg2, gfid, bufferMaxCount, pBufferCount, arg3) +#define kgrctxGetCtxBufferInfo(arg1, arg2, arg3, gfid, bufferMaxCount, pBufferCount, arg7) kgrctxGetCtxBufferInfo_IMPL(arg1, arg2, arg3, gfid, bufferMaxCount, pBufferCount, arg7) #endif //__nvoc_kernel_graphics_context_h_disabled -NV_STATUS kgrctxGetCtxBufferPtes_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, NvU32 gfid, NvU32 bufferType, NvU32 firstPage, NvU64 *pPhysAddrs, NvU32 addrsSize, NvU32 *pNumPages, NvBool *pbNoMorePages); +NV_STATUS kgrctxGetCtxBufferPtes_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, NvU32 gfid, NvU32 bufferType, NvU32 firstPage, NvU64 *pPhysAddrs, NvU32 addrsSize, NvU32 *pNumPages, NvBool *pbNoMorePages); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxGetCtxBufferPtes(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, NvU32 gfid, NvU32 bufferType, NvU32 firstPage, NvU64 *pPhysAddrs, NvU32 addrsSize, NvU32 *pNumPages, NvBool *pbNoMorePages) { +static inline NV_STATUS kgrctxGetCtxBufferPtes(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, NvU32 gfid, NvU32 bufferType, NvU32 firstPage, NvU64 *pPhysAddrs, NvU32 addrsSize, NvU32 *pNumPages, NvBool *pbNoMorePages) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxGetCtxBufferPtes(arg0, arg1, arg2, gfid, bufferType, firstPage, pPhysAddrs, addrsSize, pNumPages, pbNoMorePages) kgrctxGetCtxBufferPtes_IMPL(arg0, arg1, arg2, gfid, bufferType, firstPage, pPhysAddrs, addrsSize, pNumPages, pbNoMorePages) +#define kgrctxGetCtxBufferPtes(arg1, arg2, arg3, gfid, bufferType, firstPage, pPhysAddrs, addrsSize, pNumPages, pbNoMorePages) kgrctxGetCtxBufferPtes_IMPL(arg1, arg2, arg3, gfid, bufferType, firstPage, pPhysAddrs, addrsSize, pNumPages, pbNoMorePages) #endif //__nvoc_kernel_graphics_context_h_disabled -NV_STATUS kgrctxAllocMainCtxBuffer_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct KernelChannel *arg3); +NV_STATUS kgrctxAllocMainCtxBuffer_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct KernelChannel *arg4); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxAllocMainCtxBuffer(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct KernelChannel *arg3) { +static inline NV_STATUS kgrctxAllocMainCtxBuffer(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct KernelChannel *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxAllocMainCtxBuffer(arg0, arg1, arg2, arg3) kgrctxAllocMainCtxBuffer_IMPL(arg0, arg1, arg2, arg3) +#define kgrctxAllocMainCtxBuffer(arg1, arg2, arg3, arg4) kgrctxAllocMainCtxBuffer_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_graphics_context_h_disabled -NV_STATUS kgrctxAllocPatchBuffer_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct KernelChannel *arg3); +NV_STATUS kgrctxAllocPatchBuffer_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct KernelChannel *arg4); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxAllocPatchBuffer(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct KernelChannel *arg3) { +static inline NV_STATUS kgrctxAllocPatchBuffer(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct KernelChannel *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxAllocPatchBuffer(arg0, arg1, arg2, arg3) kgrctxAllocPatchBuffer_IMPL(arg0, arg1, arg2, arg3) +#define kgrctxAllocPatchBuffer(arg1, arg2, arg3, arg4) kgrctxAllocPatchBuffer_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_graphics_context_h_disabled -NV_STATUS kgrctxAllocPmBuffer_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct KernelChannel *arg3); +NV_STATUS kgrctxAllocPmBuffer_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct KernelChannel *arg4); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxAllocPmBuffer(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct KernelChannel *arg3) { +static inline NV_STATUS kgrctxAllocPmBuffer(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct KernelChannel *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxAllocPmBuffer(arg0, arg1, arg2, arg3) kgrctxAllocPmBuffer_IMPL(arg0, arg1, arg2, arg3) +#define kgrctxAllocPmBuffer(arg1, arg2, arg3, arg4) kgrctxAllocPmBuffer_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_graphics_context_h_disabled -NV_STATUS kgrctxAllocCtxBuffers_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct KernelGraphicsObject *arg3); +NV_STATUS kgrctxAllocCtxBuffers_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct KernelGraphicsObject *arg4); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxAllocCtxBuffers(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct KernelGraphicsObject *arg3) { +static inline NV_STATUS kgrctxAllocCtxBuffers(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct KernelGraphicsObject *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxAllocCtxBuffers(arg0, arg1, arg2, arg3) kgrctxAllocCtxBuffers_IMPL(arg0, arg1, arg2, arg3) +#define kgrctxAllocCtxBuffers(arg1, arg2, arg3, arg4) kgrctxAllocCtxBuffers_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_graphics_context_h_disabled -NV_STATUS kgrctxMapGlobalCtxBuffer_IMPL(struct OBJGPU *pGpu, struct KernelGraphicsContext *arg0, struct KernelGraphics *arg1, NvU32 gfid, struct OBJVASPACE *arg2, GR_GLOBALCTX_BUFFER arg3, NvBool bIsReadOnly); +NV_STATUS kgrctxMapGlobalCtxBuffer_IMPL(struct OBJGPU *pGpu, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, NvU32 gfid, struct OBJVASPACE *arg5, GR_GLOBALCTX_BUFFER arg6, NvBool bIsReadOnly); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxMapGlobalCtxBuffer(struct OBJGPU *pGpu, struct KernelGraphicsContext *arg0, struct KernelGraphics *arg1, NvU32 gfid, struct OBJVASPACE *arg2, GR_GLOBALCTX_BUFFER arg3, NvBool bIsReadOnly) { +static inline NV_STATUS kgrctxMapGlobalCtxBuffer(struct OBJGPU *pGpu, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, NvU32 gfid, struct OBJVASPACE *arg5, GR_GLOBALCTX_BUFFER arg6, NvBool bIsReadOnly) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxMapGlobalCtxBuffer(pGpu, arg0, arg1, gfid, arg2, arg3, bIsReadOnly) kgrctxMapGlobalCtxBuffer_IMPL(pGpu, arg0, arg1, gfid, arg2, arg3, bIsReadOnly) +#define kgrctxMapGlobalCtxBuffer(pGpu, arg2, arg3, gfid, arg5, arg6, bIsReadOnly) kgrctxMapGlobalCtxBuffer_IMPL(pGpu, arg2, arg3, gfid, arg5, arg6, bIsReadOnly) #endif //__nvoc_kernel_graphics_context_h_disabled -NV_STATUS kgrctxMapGlobalCtxBuffers_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, NvU32 gfid, struct KernelChannel *arg3); +NV_STATUS kgrctxMapGlobalCtxBuffers_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, NvU32 gfid, struct KernelChannel *arg5); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxMapGlobalCtxBuffers(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, NvU32 gfid, struct KernelChannel *arg3) { +static inline NV_STATUS kgrctxMapGlobalCtxBuffers(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, NvU32 gfid, struct KernelChannel *arg5) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxMapGlobalCtxBuffers(arg0, arg1, arg2, gfid, arg3) kgrctxMapGlobalCtxBuffers_IMPL(arg0, arg1, arg2, gfid, arg3) +#define kgrctxMapGlobalCtxBuffers(arg1, arg2, arg3, gfid, arg5) kgrctxMapGlobalCtxBuffers_IMPL(arg1, arg2, arg3, gfid, arg5) #endif //__nvoc_kernel_graphics_context_h_disabled -NV_STATUS kgrctxMapCtxBuffers_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct KernelGraphicsObject *arg3); +NV_STATUS kgrctxMapCtxBuffers_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct KernelGraphicsObject *arg4); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxMapCtxBuffers(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct KernelGraphicsObject *arg3) { +static inline NV_STATUS kgrctxMapCtxBuffers(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct KernelGraphicsObject *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxMapCtxBuffers(arg0, arg1, arg2, arg3) kgrctxMapCtxBuffers_IMPL(arg0, arg1, arg2, arg3) +#define kgrctxMapCtxBuffers(arg1, arg2, arg3, arg4) kgrctxMapCtxBuffers_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_graphics_context_h_disabled -NV_STATUS kgrctxPrepareInitializeCtxBuffer_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct KernelChannel *arg3, NvU32 externalId, NV2080_CTRL_GPU_PROMOTE_CTX_BUFFER_ENTRY *arg4, NvBool *pbAddEntry); +NV_STATUS kgrctxPrepareInitializeCtxBuffer_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct KernelChannel *arg4, NvU32 externalId, NV2080_CTRL_GPU_PROMOTE_CTX_BUFFER_ENTRY *arg6, NvBool *pbAddEntry); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxPrepareInitializeCtxBuffer(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct KernelChannel *arg3, NvU32 externalId, NV2080_CTRL_GPU_PROMOTE_CTX_BUFFER_ENTRY *arg4, NvBool *pbAddEntry) { +static inline NV_STATUS kgrctxPrepareInitializeCtxBuffer(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct KernelChannel *arg4, NvU32 externalId, NV2080_CTRL_GPU_PROMOTE_CTX_BUFFER_ENTRY *arg6, NvBool *pbAddEntry) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxPrepareInitializeCtxBuffer(arg0, arg1, arg2, arg3, externalId, arg4, pbAddEntry) kgrctxPrepareInitializeCtxBuffer_IMPL(arg0, arg1, arg2, arg3, externalId, arg4, pbAddEntry) +#define kgrctxPrepareInitializeCtxBuffer(arg1, arg2, arg3, arg4, externalId, arg6, pbAddEntry) kgrctxPrepareInitializeCtxBuffer_IMPL(arg1, arg2, arg3, arg4, externalId, arg6, pbAddEntry) #endif //__nvoc_kernel_graphics_context_h_disabled -NV_STATUS kgrctxPreparePromoteCtxBuffer_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelChannel *arg2, NvU32 externalId, NV2080_CTRL_GPU_PROMOTE_CTX_BUFFER_ENTRY *arg3, NvBool *pbAddEntry); +NV_STATUS kgrctxPreparePromoteCtxBuffer_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelChannel *arg3, NvU32 externalId, NV2080_CTRL_GPU_PROMOTE_CTX_BUFFER_ENTRY *arg5, NvBool *pbAddEntry); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxPreparePromoteCtxBuffer(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelChannel *arg2, NvU32 externalId, NV2080_CTRL_GPU_PROMOTE_CTX_BUFFER_ENTRY *arg3, NvBool *pbAddEntry) { +static inline NV_STATUS kgrctxPreparePromoteCtxBuffer(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelChannel *arg3, NvU32 externalId, NV2080_CTRL_GPU_PROMOTE_CTX_BUFFER_ENTRY *arg5, NvBool *pbAddEntry) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxPreparePromoteCtxBuffer(arg0, arg1, arg2, externalId, arg3, pbAddEntry) kgrctxPreparePromoteCtxBuffer_IMPL(arg0, arg1, arg2, externalId, arg3, pbAddEntry) +#define kgrctxPreparePromoteCtxBuffer(arg1, arg2, arg3, externalId, arg5, pbAddEntry) kgrctxPreparePromoteCtxBuffer_IMPL(arg1, arg2, arg3, externalId, arg5, pbAddEntry) #endif //__nvoc_kernel_graphics_context_h_disabled -void kgrctxMarkCtxBufferInitialized_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct KernelChannel *arg3, NvU32 externalId); +void kgrctxMarkCtxBufferInitialized_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct KernelChannel *arg4, NvU32 externalId); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxMarkCtxBufferInitialized(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct KernelChannel *arg3, NvU32 externalId) { +static inline void kgrctxMarkCtxBufferInitialized(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct KernelChannel *arg4, NvU32 externalId) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxMarkCtxBufferInitialized(arg0, arg1, arg2, arg3, externalId) kgrctxMarkCtxBufferInitialized_IMPL(arg0, arg1, arg2, arg3, externalId) +#define kgrctxMarkCtxBufferInitialized(arg1, arg2, arg3, arg4, externalId) kgrctxMarkCtxBufferInitialized_IMPL(arg1, arg2, arg3, arg4, externalId) #endif //__nvoc_kernel_graphics_context_h_disabled -NV_STATUS kgrctxSetupDeferredPmBuffer_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct KernelChannel *arg3); +NV_STATUS kgrctxSetupDeferredPmBuffer_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct KernelChannel *arg4); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS kgrctxSetupDeferredPmBuffer(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct KernelChannel *arg3) { +static inline NV_STATUS kgrctxSetupDeferredPmBuffer(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct KernelChannel *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxSetupDeferredPmBuffer(arg0, arg1, arg2, arg3) kgrctxSetupDeferredPmBuffer_IMPL(arg0, arg1, arg2, arg3) +#define kgrctxSetupDeferredPmBuffer(arg1, arg2, arg3, arg4) kgrctxSetupDeferredPmBuffer_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_graphics_context_h_disabled -void kgrctxUnmapGlobalCtxBuffers_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct OBJVASPACE *arg3, NvU32 gfid); +void kgrctxUnmapGlobalCtxBuffers_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct OBJVASPACE *arg4, NvU32 gfid); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxUnmapGlobalCtxBuffers(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct OBJVASPACE *arg3, NvU32 gfid) { +static inline void kgrctxUnmapGlobalCtxBuffers(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct OBJVASPACE *arg4, NvU32 gfid) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxUnmapGlobalCtxBuffers(arg0, arg1, arg2, arg3, gfid) kgrctxUnmapGlobalCtxBuffers_IMPL(arg0, arg1, arg2, arg3, gfid) +#define kgrctxUnmapGlobalCtxBuffers(arg1, arg2, arg3, arg4, gfid) kgrctxUnmapGlobalCtxBuffers_IMPL(arg1, arg2, arg3, arg4, gfid) #endif //__nvoc_kernel_graphics_context_h_disabled -void kgrctxUnmapGlobalCtxBuffer_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct OBJVASPACE *arg3, GR_GLOBALCTX_BUFFER arg4); +void kgrctxUnmapGlobalCtxBuffer_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct OBJVASPACE *arg4, GR_GLOBALCTX_BUFFER arg5); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxUnmapGlobalCtxBuffer(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct OBJVASPACE *arg3, GR_GLOBALCTX_BUFFER arg4) { +static inline void kgrctxUnmapGlobalCtxBuffer(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct OBJVASPACE *arg4, GR_GLOBALCTX_BUFFER arg5) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxUnmapGlobalCtxBuffer(arg0, arg1, arg2, arg3, arg4) kgrctxUnmapGlobalCtxBuffer_IMPL(arg0, arg1, arg2, arg3, arg4) +#define kgrctxUnmapGlobalCtxBuffer(arg1, arg2, arg3, arg4, arg5) kgrctxUnmapGlobalCtxBuffer_IMPL(arg1, arg2, arg3, arg4, arg5) #endif //__nvoc_kernel_graphics_context_h_disabled -void kgrctxUnmapMainCtxBuffer_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct KernelChannel *arg3); +void kgrctxUnmapMainCtxBuffer_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct KernelChannel *arg4); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxUnmapMainCtxBuffer(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct KernelChannel *arg3) { +static inline void kgrctxUnmapMainCtxBuffer(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct KernelChannel *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxUnmapMainCtxBuffer(arg0, arg1, arg2, arg3) kgrctxUnmapMainCtxBuffer_IMPL(arg0, arg1, arg2, arg3) +#define kgrctxUnmapMainCtxBuffer(arg1, arg2, arg3, arg4) kgrctxUnmapMainCtxBuffer_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_graphics_context_h_disabled -void kgrctxUnmapCtxPmBuffer_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct OBJVASPACE *arg3); +void kgrctxUnmapCtxPmBuffer_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct OBJVASPACE *arg4); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxUnmapCtxPmBuffer(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct OBJVASPACE *arg3) { +static inline void kgrctxUnmapCtxPmBuffer(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct OBJVASPACE *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxUnmapCtxPmBuffer(arg0, arg1, arg2, arg3) kgrctxUnmapCtxPmBuffer_IMPL(arg0, arg1, arg2, arg3) +#define kgrctxUnmapCtxPmBuffer(arg1, arg2, arg3, arg4) kgrctxUnmapCtxPmBuffer_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_graphics_context_h_disabled -void kgrctxUnmapCtxZcullBuffer_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct OBJVASPACE *arg3); +void kgrctxUnmapCtxZcullBuffer_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct OBJVASPACE *arg4); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxUnmapCtxZcullBuffer(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct OBJVASPACE *arg3) { +static inline void kgrctxUnmapCtxZcullBuffer(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct OBJVASPACE *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxUnmapCtxZcullBuffer(arg0, arg1, arg2, arg3) kgrctxUnmapCtxZcullBuffer_IMPL(arg0, arg1, arg2, arg3) +#define kgrctxUnmapCtxZcullBuffer(arg1, arg2, arg3, arg4) kgrctxUnmapCtxZcullBuffer_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_graphics_context_h_disabled -void kgrctxUnmapCtxPreemptionBuffers_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct OBJVASPACE *arg3); +void kgrctxUnmapCtxPreemptionBuffers_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct OBJVASPACE *arg4); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxUnmapCtxPreemptionBuffers(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct OBJVASPACE *arg3) { +static inline void kgrctxUnmapCtxPreemptionBuffers(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct OBJVASPACE *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxUnmapCtxPreemptionBuffers(arg0, arg1, arg2, arg3) kgrctxUnmapCtxPreemptionBuffers_IMPL(arg0, arg1, arg2, arg3) +#define kgrctxUnmapCtxPreemptionBuffers(arg1, arg2, arg3, arg4) kgrctxUnmapCtxPreemptionBuffers_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_graphics_context_h_disabled -void kgrctxUnmapAssociatedCtxBuffers_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct KernelChannel *arg3); +void kgrctxUnmapCtxSetupBuffer_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct OBJVASPACE *arg4); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxUnmapAssociatedCtxBuffers(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1, struct KernelGraphics *arg2, struct KernelChannel *arg3) { +static inline void kgrctxUnmapCtxSetupBuffer(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct OBJVASPACE *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxUnmapAssociatedCtxBuffers(arg0, arg1, arg2, arg3) kgrctxUnmapAssociatedCtxBuffers_IMPL(arg0, arg1, arg2, arg3) +#define kgrctxUnmapCtxSetupBuffer(arg1, arg2, arg3, arg4) kgrctxUnmapCtxSetupBuffer_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_graphics_context_h_disabled -void kgrctxFreeMainCtxBuffer_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1); +void kgrctxUnmapAssociatedCtxBuffers_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct KernelChannel *arg4); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxFreeMainCtxBuffer(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1) { +static inline void kgrctxUnmapAssociatedCtxBuffers(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, struct KernelChannel *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxFreeMainCtxBuffer(arg0, arg1) kgrctxFreeMainCtxBuffer_IMPL(arg0, arg1) +#define kgrctxUnmapAssociatedCtxBuffers(arg1, arg2, arg3, arg4) kgrctxUnmapAssociatedCtxBuffers_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_graphics_context_h_disabled -void kgrctxFreeZcullBuffer_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1); +void kgrctxFreeMainCtxBuffer_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxFreeZcullBuffer(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1) { +static inline void kgrctxFreeMainCtxBuffer(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxFreeZcullBuffer(arg0, arg1) kgrctxFreeZcullBuffer_IMPL(arg0, arg1) +#define kgrctxFreeMainCtxBuffer(arg1, arg2) kgrctxFreeMainCtxBuffer_IMPL(arg1, arg2) #endif //__nvoc_kernel_graphics_context_h_disabled -void kgrctxFreeCtxPreemptionBuffers_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1); +void kgrctxFreeZcullBuffer_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxFreeCtxPreemptionBuffers(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1) { +static inline void kgrctxFreeZcullBuffer(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxFreeCtxPreemptionBuffers(arg0, arg1) kgrctxFreeCtxPreemptionBuffers_IMPL(arg0, arg1) +#define kgrctxFreeZcullBuffer(arg1, arg2) kgrctxFreeZcullBuffer_IMPL(arg1, arg2) #endif //__nvoc_kernel_graphics_context_h_disabled -void kgrctxFreePatchBuffer_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1); +void kgrctxFreeCtxPreemptionBuffers_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxFreePatchBuffer(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1) { +static inline void kgrctxFreeCtxPreemptionBuffers(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxFreePatchBuffer(arg0, arg1) kgrctxFreePatchBuffer_IMPL(arg0, arg1) +#define kgrctxFreeCtxPreemptionBuffers(arg1, arg2) kgrctxFreeCtxPreemptionBuffers_IMPL(arg1, arg2) #endif //__nvoc_kernel_graphics_context_h_disabled -void kgrctxFreePmBuffer_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1); +void kgrctxFreeSetupBuffer_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxFreePmBuffer(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1) { +static inline void kgrctxFreeSetupBuffer(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxFreePmBuffer(arg0, arg1) kgrctxFreePmBuffer_IMPL(arg0, arg1) +#define kgrctxFreeSetupBuffer(arg1, arg2) kgrctxFreeSetupBuffer_IMPL(arg1, arg2) #endif //__nvoc_kernel_graphics_context_h_disabled -void kgrctxFreeLocalGlobalCtxBuffers_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1); +void kgrctxFreePatchBuffer_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxFreeLocalGlobalCtxBuffers(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1) { +static inline void kgrctxFreePatchBuffer(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxFreeLocalGlobalCtxBuffers(arg0, arg1) kgrctxFreeLocalGlobalCtxBuffers_IMPL(arg0, arg1) +#define kgrctxFreePatchBuffer(arg1, arg2) kgrctxFreePatchBuffer_IMPL(arg1, arg2) #endif //__nvoc_kernel_graphics_context_h_disabled -void kgrctxFreeAssociatedCtxBuffers_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1); +void kgrctxFreePmBuffer_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void kgrctxFreeAssociatedCtxBuffers(struct OBJGPU *arg0, struct KernelGraphicsContext *arg1) { +static inline void kgrctxFreePmBuffer(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); } #else //__nvoc_kernel_graphics_context_h_disabled -#define kgrctxFreeAssociatedCtxBuffers(arg0, arg1) kgrctxFreeAssociatedCtxBuffers_IMPL(arg0, arg1) +#define kgrctxFreePmBuffer(arg1, arg2) kgrctxFreePmBuffer_IMPL(arg1, arg2) +#endif //__nvoc_kernel_graphics_context_h_disabled + +void kgrctxFreeLocalGlobalCtxBuffers_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2); + +#ifdef __nvoc_kernel_graphics_context_h_disabled +static inline void kgrctxFreeLocalGlobalCtxBuffers(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2) { + NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); +} +#else //__nvoc_kernel_graphics_context_h_disabled +#define kgrctxFreeLocalGlobalCtxBuffers(arg1, arg2) kgrctxFreeLocalGlobalCtxBuffers_IMPL(arg1, arg2) +#endif //__nvoc_kernel_graphics_context_h_disabled + +void kgrctxFreeAssociatedCtxBuffers_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2); + +#ifdef __nvoc_kernel_graphics_context_h_disabled +static inline void kgrctxFreeAssociatedCtxBuffers(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2) { + NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContext was disabled!"); +} +#else //__nvoc_kernel_graphics_context_h_disabled +#define kgrctxFreeAssociatedCtxBuffers(arg1, arg2) kgrctxFreeAssociatedCtxBuffers_IMPL(arg1, arg2) #endif //__nvoc_kernel_graphics_context_h_disabled #undef PRIVATE_FIELD @@ -1086,12 +1177,21 @@ struct KernelGraphicsContextUnicast { }; + struct KernelGraphicsContextShared { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RsShared __nvoc_base_RsShared; - struct Object *__nvoc_pbase_Object; - struct RsShared *__nvoc_pbase_RsShared; - struct KernelGraphicsContextShared *__nvoc_pbase_KernelGraphicsContextShared; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct RsShared *__nvoc_pbase_RsShared; // shr super + struct KernelGraphicsContextShared *__nvoc_pbase_KernelGraphicsContextShared; // shrkgrctx + + // Data members struct KernelGraphicsContextUnicast PRIVATE_FIELD(kernelGraphicsContextUnicast); KernelSMDebuggerSessionList PRIVATE_FIELD(activeDebuggers); }; @@ -1105,6 +1205,7 @@ typedef struct KernelGraphicsContextShared KernelGraphicsContextShared; #define __nvoc_class_id_KernelGraphicsContextShared 0xe7abeb #endif /* __nvoc_class_id_KernelGraphicsContextShared */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGraphicsContextShared; #define __staticCast_KernelGraphicsContextShared(pThis) \ @@ -1117,69 +1218,72 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGraphicsContextShared; ((KernelGraphicsContextShared*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelGraphicsContextShared))) #endif //__nvoc_kernel_graphics_context_h_disabled - NV_STATUS __nvoc_objCreateDynamic_KernelGraphicsContextShared(KernelGraphicsContextShared**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_KernelGraphicsContextShared(KernelGraphicsContextShared**, Dynamic*, NvU32); #define __objCreate_KernelGraphicsContextShared(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelGraphicsContextShared((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS shrkgrctxConstruct_IMPL(struct KernelGraphicsContextShared *arg_); #define __nvoc_shrkgrctxConstruct(arg_) shrkgrctxConstruct_IMPL(arg_) -NV_STATUS shrkgrctxInit_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContextShared *arg1, struct KernelGraphicsContext *arg2); +NV_STATUS shrkgrctxInit_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContextShared *arg2, struct KernelGraphicsContext *arg3); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS shrkgrctxInit(struct OBJGPU *arg0, struct KernelGraphicsContextShared *arg1, struct KernelGraphicsContext *arg2) { +static inline NV_STATUS shrkgrctxInit(struct OBJGPU *arg1, struct KernelGraphicsContextShared *arg2, struct KernelGraphicsContext *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContextShared was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define shrkgrctxInit(arg0, arg1, arg2) shrkgrctxInit_IMPL(arg0, arg1, arg2) +#define shrkgrctxInit(arg1, arg2, arg3) shrkgrctxInit_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_graphics_context_h_disabled -NV_STATUS shrkgrctxConstructUnicast_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContextShared *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, KernelGraphicsContextUnicast *arg4); +NV_STATUS shrkgrctxConstructUnicast_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContextShared *arg2, struct KernelGraphicsContext *arg3, struct KernelGraphics *arg4, KernelGraphicsContextUnicast *arg5); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline NV_STATUS shrkgrctxConstructUnicast(struct OBJGPU *arg0, struct KernelGraphicsContextShared *arg1, struct KernelGraphicsContext *arg2, struct KernelGraphics *arg3, KernelGraphicsContextUnicast *arg4) { +static inline NV_STATUS shrkgrctxConstructUnicast(struct OBJGPU *arg1, struct KernelGraphicsContextShared *arg2, struct KernelGraphicsContext *arg3, struct KernelGraphics *arg4, KernelGraphicsContextUnicast *arg5) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContextShared was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_context_h_disabled -#define shrkgrctxConstructUnicast(arg0, arg1, arg2, arg3, arg4) shrkgrctxConstructUnicast_IMPL(arg0, arg1, arg2, arg3, arg4) +#define shrkgrctxConstructUnicast(arg1, arg2, arg3, arg4, arg5) shrkgrctxConstructUnicast_IMPL(arg1, arg2, arg3, arg4, arg5) #endif //__nvoc_kernel_graphics_context_h_disabled -void shrkgrctxDestruct_IMPL(struct KernelGraphicsContextShared *arg0); +void shrkgrctxDestruct_IMPL(struct KernelGraphicsContextShared *arg1); -#define __nvoc_shrkgrctxDestruct(arg0) shrkgrctxDestruct_IMPL(arg0) -void shrkgrctxTeardown_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContextShared *arg1, struct KernelGraphicsContext *arg2); +#define __nvoc_shrkgrctxDestruct(arg1) shrkgrctxDestruct_IMPL(arg1) +void shrkgrctxTeardown_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContextShared *arg2, struct KernelGraphicsContext *arg3); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void shrkgrctxTeardown(struct OBJGPU *arg0, struct KernelGraphicsContextShared *arg1, struct KernelGraphicsContext *arg2) { +static inline void shrkgrctxTeardown(struct OBJGPU *arg1, struct KernelGraphicsContextShared *arg2, struct KernelGraphicsContext *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContextShared was disabled!"); } #else //__nvoc_kernel_graphics_context_h_disabled -#define shrkgrctxTeardown(arg0, arg1, arg2) shrkgrctxTeardown_IMPL(arg0, arg1, arg2) +#define shrkgrctxTeardown(arg1, arg2, arg3) shrkgrctxTeardown_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_graphics_context_h_disabled -void shrkgrctxDestructUnicast_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContextShared *arg1, struct KernelGraphicsContext *arg2, KernelGraphicsContextUnicast *arg3); +void shrkgrctxDestructUnicast_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContextShared *arg2, struct KernelGraphicsContext *arg3, KernelGraphicsContextUnicast *arg4); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void shrkgrctxDestructUnicast(struct OBJGPU *arg0, struct KernelGraphicsContextShared *arg1, struct KernelGraphicsContext *arg2, KernelGraphicsContextUnicast *arg3) { +static inline void shrkgrctxDestructUnicast(struct OBJGPU *arg1, struct KernelGraphicsContextShared *arg2, struct KernelGraphicsContext *arg3, KernelGraphicsContextUnicast *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContextShared was disabled!"); } #else //__nvoc_kernel_graphics_context_h_disabled -#define shrkgrctxDestructUnicast(arg0, arg1, arg2, arg3) shrkgrctxDestructUnicast_IMPL(arg0, arg1, arg2, arg3) +#define shrkgrctxDestructUnicast(arg1, arg2, arg3, arg4) shrkgrctxDestructUnicast_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_graphics_context_h_disabled -void shrkgrctxDetach_IMPL(struct OBJGPU *arg0, struct KernelGraphicsContextShared *arg1, struct KernelGraphicsContext *arg2, struct KernelChannel *arg3); +void shrkgrctxDetach_IMPL(struct OBJGPU *arg1, struct KernelGraphicsContextShared *arg2, struct KernelGraphicsContext *arg3, struct KernelChannel *arg4); #ifdef __nvoc_kernel_graphics_context_h_disabled -static inline void shrkgrctxDetach(struct OBJGPU *arg0, struct KernelGraphicsContextShared *arg1, struct KernelGraphicsContext *arg2, struct KernelChannel *arg3) { +static inline void shrkgrctxDetach(struct OBJGPU *arg1, struct KernelGraphicsContextShared *arg2, struct KernelGraphicsContext *arg3, struct KernelChannel *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsContextShared was disabled!"); } #else //__nvoc_kernel_graphics_context_h_disabled -#define shrkgrctxDetach(arg0, arg1, arg2, arg3) shrkgrctxDetach_IMPL(arg0, arg1, arg2, arg3) +#define shrkgrctxDetach(arg1, arg2, arg3, arg4) shrkgrctxDetach_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_graphics_context_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_kernel_graphics_manager_nvoc.c b/src/nvidia/generated/g_kernel_graphics_manager_nvoc.c index 329e1ec70a..7b2602d35a 100644 --- a/src/nvidia/generated/g_kernel_graphics_manager_nvoc.c +++ b/src/nvidia/generated/g_kernel_graphics_manager_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGraphicsManager = /*pExportInfo=*/ &__nvoc_export_info_KernelGraphicsManager }; -static NV_STATUS __nvoc_thunk_KernelGraphicsManager_engstateConstructEngine(OBJGPU *arg0, struct OBJENGSTATE *arg1, ENGDESCRIPTOR arg2) { - return kgrmgrConstructEngine(arg0, (struct KernelGraphicsManager *)(((unsigned char *)arg1) - __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg2); +// 2 down-thunk(s) defined to bridge methods in KernelGraphicsManager from superclasses + +// kgrmgrConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelGraphicsManager_engstateConstructEngine(OBJGPU *arg1, struct OBJENGSTATE *arg_this, ENGDESCRIPTOR arg3) { + return kgrmgrConstructEngine(arg1, (struct KernelGraphicsManager *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgrmgrStateLoad(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg0) { - return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg0); +// kgrmgrStateDestroy: virtual override (engstate) base (engstate) +static void __nvoc_down_thunk_KernelGraphicsManager_engstateStateDestroy(OBJGPU *arg1, struct OBJENGSTATE *arg_this) { + kgrmgrStateDestroy(arg1, (struct KernelGraphicsManager *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgrmgrStateUnload(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg0) { - return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg0); + +// 12 up-thunk(s) defined to bridge methods in KernelGraphicsManager to superclasses + +// kgrmgrInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kgrmgrInitMissing(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgrmgrStateInitLocked(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { - return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); +// kgrmgrStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreInitLocked(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgrmgrStatePreLoad(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg0); +// kgrmgrStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreInitUnlocked(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgrmgrStatePostUnload(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg0); +// kgrmgrStateInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStateInitLocked(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { + return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_kgrmgrStateDestroy(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { - engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); +// kgrmgrStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStateInitUnlocked(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgrmgrStatePreUnload(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg0); +// kgrmgrStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreLoad(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgrmgrStateInitUnlocked(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); +// kgrmgrStateLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStateLoad(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { + return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_kgrmgrInitMissing(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); +// kgrmgrStatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePostLoad(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgrmgrStatePreInitLocked(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); +// kgrmgrStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreUnload(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgrmgrStatePreInitUnlocked(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); +// kgrmgrStateUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStateUnload(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { + return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgrmgrStatePostLoad(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg0); +// kgrmgrStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePostUnload(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg3); } -static NvBool __nvoc_thunk_OBJENGSTATE_kgrmgrIsPresent(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); +// kgrmgrIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_kgrmgrIsPresent(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelGraphicsManager = { /*numEntries=*/ 0, @@ -158,6 +178,7 @@ NV_STATUS __nvoc_ctor_KernelGraphicsManager(KernelGraphicsManager *pThis, RmHals return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelGraphicsManager_1(KernelGraphicsManager *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -166,9 +187,15 @@ static void __nvoc_init_funcTable_KernelGraphicsManager_1(KernelGraphicsManager PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); + // kgrmgrConstructEngine -- virtual override (engstate) base (engstate) pThis->__kgrmgrConstructEngine__ = &kgrmgrConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelGraphicsManager_engstateConstructEngine; - // Hal function -- kgrmgrGetVeidsFromGpcCount + // kgrmgrStateDestroy -- virtual override (engstate) base (engstate) + pThis->__kgrmgrStateDestroy__ = &kgrmgrStateDestroy_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelGraphicsManager_engstateStateDestroy; + + // kgrmgrGetVeidsFromGpcCount -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ { pThis->__kgrmgrGetVeidsFromGpcCount__ = &kgrmgrGetVeidsFromGpcCount_GA100; @@ -179,36 +206,48 @@ static void __nvoc_init_funcTable_KernelGraphicsManager_1(KernelGraphicsManager pThis->__kgrmgrGetVeidsFromGpcCount__ = &kgrmgrGetVeidsFromGpcCount_46f6a7; } - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelGraphicsManager_engstateConstructEngine; - - pThis->__kgrmgrStateLoad__ = &__nvoc_thunk_OBJENGSTATE_kgrmgrStateLoad; + // kgrmgrInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__kgrmgrInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrInitMissing; - pThis->__kgrmgrStateUnload__ = &__nvoc_thunk_OBJENGSTATE_kgrmgrStateUnload; + // kgrmgrStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__kgrmgrStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreInitLocked; - pThis->__kgrmgrStateInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kgrmgrStateInitLocked; + // kgrmgrStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kgrmgrStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreInitUnlocked; - pThis->__kgrmgrStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_kgrmgrStatePreLoad; + // kgrmgrStateInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__kgrmgrStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStateInitLocked; - pThis->__kgrmgrStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_kgrmgrStatePostUnload; + // kgrmgrStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kgrmgrStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStateInitUnlocked; - pThis->__kgrmgrStateDestroy__ = &__nvoc_thunk_OBJENGSTATE_kgrmgrStateDestroy; + // kgrmgrStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__kgrmgrStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreLoad; - pThis->__kgrmgrStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_kgrmgrStatePreUnload; + // kgrmgrStateLoad -- virtual inherited (engstate) base (engstate) + pThis->__kgrmgrStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStateLoad; - pThis->__kgrmgrStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kgrmgrStateInitUnlocked; + // kgrmgrStatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__kgrmgrStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePostLoad; - pThis->__kgrmgrInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kgrmgrInitMissing; + // kgrmgrStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__kgrmgrStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreUnload; - pThis->__kgrmgrStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kgrmgrStatePreInitLocked; + // kgrmgrStateUnload -- virtual inherited (engstate) base (engstate) + pThis->__kgrmgrStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStateUnload; - pThis->__kgrmgrStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kgrmgrStatePreInitUnlocked; + // kgrmgrStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__kgrmgrStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePostUnload; - pThis->__kgrmgrStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_kgrmgrStatePostLoad; + // kgrmgrIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__kgrmgrIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrIsPresent; +} // End __nvoc_init_funcTable_KernelGraphicsManager_1 with approximately 18 basic block(s). - pThis->__kgrmgrIsPresent__ = &__nvoc_thunk_OBJENGSTATE_kgrmgrIsPresent; -} +// Initialize vtable(s) for 15 virtual method(s). void __nvoc_init_funcTable_KernelGraphicsManager(KernelGraphicsManager *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 15 per-object function pointer(s). __nvoc_init_funcTable_KernelGraphicsManager_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_graphics_manager_nvoc.h b/src/nvidia/generated/g_kernel_graphics_manager_nvoc.h index a38ee1c787..a642da796a 100644 --- a/src/nvidia/generated/g_kernel_graphics_manager_nvoc.h +++ b/src/nvidia/generated/g_kernel_graphics_manager_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_KERNEL_GRAPHICS_MANAGER_NVOC_H_ #define _G_KERNEL_GRAPHICS_MANAGER_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_graphics_manager_nvoc.h" #ifndef KERNEL_GRAPHICS_MANAGER_H @@ -71,27 +79,38 @@ typedef struct KGRMGR_FECS_VGPU_GLOBAL_TRACE_INFO KGRMGR_FECS_VGPU_GLOBAL_TRACE_ #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelGraphicsManager { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct KernelGraphicsManager *__nvoc_pbase_KernelGraphicsManager; - NV_STATUS (*__kgrmgrConstructEngine__)(OBJGPU *, struct KernelGraphicsManager *, ENGDESCRIPTOR); - NV_STATUS (*__kgrmgrGetVeidsFromGpcCount__)(OBJGPU *, struct KernelGraphicsManager *, NvU32, NvU32 *); - NV_STATUS (*__kgrmgrStateLoad__)(POBJGPU, struct KernelGraphicsManager *, NvU32); - NV_STATUS (*__kgrmgrStateUnload__)(POBJGPU, struct KernelGraphicsManager *, NvU32); - NV_STATUS (*__kgrmgrStateInitLocked__)(POBJGPU, struct KernelGraphicsManager *); - NV_STATUS (*__kgrmgrStatePreLoad__)(POBJGPU, struct KernelGraphicsManager *, NvU32); - NV_STATUS (*__kgrmgrStatePostUnload__)(POBJGPU, struct KernelGraphicsManager *, NvU32); - void (*__kgrmgrStateDestroy__)(POBJGPU, struct KernelGraphicsManager *); - NV_STATUS (*__kgrmgrStatePreUnload__)(POBJGPU, struct KernelGraphicsManager *, NvU32); - NV_STATUS (*__kgrmgrStateInitUnlocked__)(POBJGPU, struct KernelGraphicsManager *); - void (*__kgrmgrInitMissing__)(POBJGPU, struct KernelGraphicsManager *); - NV_STATUS (*__kgrmgrStatePreInitLocked__)(POBJGPU, struct KernelGraphicsManager *); - NV_STATUS (*__kgrmgrStatePreInitUnlocked__)(POBJGPU, struct KernelGraphicsManager *); - NV_STATUS (*__kgrmgrStatePostLoad__)(POBJGPU, struct KernelGraphicsManager *, NvU32); - NvBool (*__kgrmgrIsPresent__)(POBJGPU, struct KernelGraphicsManager *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct KernelGraphicsManager *__nvoc_pbase_KernelGraphicsManager; // kgrmgr + + // Vtable with 15 per-object function pointers + NV_STATUS (*__kgrmgrConstructEngine__)(OBJGPU *, struct KernelGraphicsManager * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + void (*__kgrmgrStateDestroy__)(OBJGPU *, struct KernelGraphicsManager * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgrmgrGetVeidsFromGpcCount__)(OBJGPU *, struct KernelGraphicsManager * /*this*/, NvU32, NvU32 *); // halified (2 hals) + void (*__kgrmgrInitMissing__)(POBJGPU, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgrmgrStatePreInitLocked__)(POBJGPU, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgrmgrStatePreInitUnlocked__)(POBJGPU, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgrmgrStateInitLocked__)(POBJGPU, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgrmgrStateInitUnlocked__)(POBJGPU, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgrmgrStatePreLoad__)(POBJGPU, struct KernelGraphicsManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgrmgrStateLoad__)(POBJGPU, struct KernelGraphicsManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgrmgrStatePostLoad__)(POBJGPU, struct KernelGraphicsManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgrmgrStatePreUnload__)(POBJGPU, struct KernelGraphicsManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgrmgrStateUnload__)(POBJGPU, struct KernelGraphicsManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgrmgrStatePostUnload__)(POBJGPU, struct KernelGraphicsManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__kgrmgrIsPresent__)(POBJGPU, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) + + // Data members GRMGR_LEGACY_KGRAPHICS_STATIC_INFO PRIVATE_FIELD(legacyKgraphicsStaticInfo); NvU64 PRIVATE_FIELD(veidInUseMask); NvU64 PRIVATE_FIELD(grIdxVeidMask)[8]; @@ -100,27 +119,38 @@ struct KernelGraphicsManager { CTX_BUF_INFO PRIVATE_FIELD(globalCtxBufInfo)[10]; }; + struct KernelGraphicsManager_PRIVATE { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct KernelGraphicsManager *__nvoc_pbase_KernelGraphicsManager; - NV_STATUS (*__kgrmgrConstructEngine__)(OBJGPU *, struct KernelGraphicsManager *, ENGDESCRIPTOR); - NV_STATUS (*__kgrmgrGetVeidsFromGpcCount__)(OBJGPU *, struct KernelGraphicsManager *, NvU32, NvU32 *); - NV_STATUS (*__kgrmgrStateLoad__)(POBJGPU, struct KernelGraphicsManager *, NvU32); - NV_STATUS (*__kgrmgrStateUnload__)(POBJGPU, struct KernelGraphicsManager *, NvU32); - NV_STATUS (*__kgrmgrStateInitLocked__)(POBJGPU, struct KernelGraphicsManager *); - NV_STATUS (*__kgrmgrStatePreLoad__)(POBJGPU, struct KernelGraphicsManager *, NvU32); - NV_STATUS (*__kgrmgrStatePostUnload__)(POBJGPU, struct KernelGraphicsManager *, NvU32); - void (*__kgrmgrStateDestroy__)(POBJGPU, struct KernelGraphicsManager *); - NV_STATUS (*__kgrmgrStatePreUnload__)(POBJGPU, struct KernelGraphicsManager *, NvU32); - NV_STATUS (*__kgrmgrStateInitUnlocked__)(POBJGPU, struct KernelGraphicsManager *); - void (*__kgrmgrInitMissing__)(POBJGPU, struct KernelGraphicsManager *); - NV_STATUS (*__kgrmgrStatePreInitLocked__)(POBJGPU, struct KernelGraphicsManager *); - NV_STATUS (*__kgrmgrStatePreInitUnlocked__)(POBJGPU, struct KernelGraphicsManager *); - NV_STATUS (*__kgrmgrStatePostLoad__)(POBJGPU, struct KernelGraphicsManager *, NvU32); - NvBool (*__kgrmgrIsPresent__)(POBJGPU, struct KernelGraphicsManager *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct KernelGraphicsManager *__nvoc_pbase_KernelGraphicsManager; // kgrmgr + + // Vtable with 15 per-object function pointers + NV_STATUS (*__kgrmgrConstructEngine__)(OBJGPU *, struct KernelGraphicsManager * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + void (*__kgrmgrStateDestroy__)(OBJGPU *, struct KernelGraphicsManager * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgrmgrGetVeidsFromGpcCount__)(OBJGPU *, struct KernelGraphicsManager * /*this*/, NvU32, NvU32 *); // halified (2 hals) + void (*__kgrmgrInitMissing__)(POBJGPU, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgrmgrStatePreInitLocked__)(POBJGPU, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgrmgrStatePreInitUnlocked__)(POBJGPU, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgrmgrStateInitLocked__)(POBJGPU, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgrmgrStateInitUnlocked__)(POBJGPU, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgrmgrStatePreLoad__)(POBJGPU, struct KernelGraphicsManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgrmgrStateLoad__)(POBJGPU, struct KernelGraphicsManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgrmgrStatePostLoad__)(POBJGPU, struct KernelGraphicsManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgrmgrStatePreUnload__)(POBJGPU, struct KernelGraphicsManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgrmgrStateUnload__)(POBJGPU, struct KernelGraphicsManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgrmgrStatePostUnload__)(POBJGPU, struct KernelGraphicsManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__kgrmgrIsPresent__)(POBJGPU, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) + + // Data members GRMGR_LEGACY_KGRAPHICS_STATIC_INFO legacyKgraphicsStaticInfo; NvU64 veidInUseMask; NvU64 grIdxVeidMask[8]; @@ -138,6 +168,7 @@ typedef struct KernelGraphicsManager KernelGraphicsManager; #define __nvoc_class_id_KernelGraphicsManager 0xd22179 #endif /* __nvoc_class_id_KernelGraphicsManager */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGraphicsManager; #define __staticCast_KernelGraphicsManager(pThis) \ @@ -150,6 +181,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGraphicsManager; ((KernelGraphicsManager*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelGraphicsManager))) #endif //__nvoc_kernel_graphics_manager_h_disabled +// Property macros #define PDB_PROP_KGRMGR_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_KGRMGR_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -159,88 +191,109 @@ NV_STATUS __nvoc_objCreate_KernelGraphicsManager(KernelGraphicsManager**, Dynami #define __objCreate_KernelGraphicsManager(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelGraphicsManager((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define kgrmgrConstructEngine(arg0, arg1, arg2) kgrmgrConstructEngine_DISPATCH(arg0, arg1, arg2) -#define kgrmgrGetVeidsFromGpcCount(arg0, arg1, gpcCount, pVeidCount) kgrmgrGetVeidsFromGpcCount_DISPATCH(arg0, arg1, gpcCount, pVeidCount) -#define kgrmgrGetVeidsFromGpcCount_HAL(arg0, arg1, gpcCount, pVeidCount) kgrmgrGetVeidsFromGpcCount_DISPATCH(arg0, arg1, gpcCount, pVeidCount) -#define kgrmgrStateLoad(pGpu, pEngstate, arg0) kgrmgrStateLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kgrmgrStateUnload(pGpu, pEngstate, arg0) kgrmgrStateUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kgrmgrStateInitLocked(pGpu, pEngstate) kgrmgrStateInitLocked_DISPATCH(pGpu, pEngstate) -#define kgrmgrStatePreLoad(pGpu, pEngstate, arg0) kgrmgrStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kgrmgrStatePostUnload(pGpu, pEngstate, arg0) kgrmgrStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kgrmgrStateDestroy(pGpu, pEngstate) kgrmgrStateDestroy_DISPATCH(pGpu, pEngstate) -#define kgrmgrStatePreUnload(pGpu, pEngstate, arg0) kgrmgrStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kgrmgrStateInitUnlocked(pGpu, pEngstate) kgrmgrStateInitUnlocked_DISPATCH(pGpu, pEngstate) + +// Wrapper macros +#define kgrmgrConstructEngine_FNPTR(arg_this) arg_this->__kgrmgrConstructEngine__ +#define kgrmgrConstructEngine(arg1, arg_this, arg3) kgrmgrConstructEngine_DISPATCH(arg1, arg_this, arg3) +#define kgrmgrStateDestroy_FNPTR(arg_this) arg_this->__kgrmgrStateDestroy__ +#define kgrmgrStateDestroy(arg1, arg_this) kgrmgrStateDestroy_DISPATCH(arg1, arg_this) +#define kgrmgrGetVeidsFromGpcCount_FNPTR(arg_this) arg_this->__kgrmgrGetVeidsFromGpcCount__ +#define kgrmgrGetVeidsFromGpcCount(arg1, arg_this, gpcCount, pVeidCount) kgrmgrGetVeidsFromGpcCount_DISPATCH(arg1, arg_this, gpcCount, pVeidCount) +#define kgrmgrGetVeidsFromGpcCount_HAL(arg1, arg_this, gpcCount, pVeidCount) kgrmgrGetVeidsFromGpcCount_DISPATCH(arg1, arg_this, gpcCount, pVeidCount) +#define kgrmgrInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define kgrmgrInitMissing(pGpu, pEngstate) kgrmgrInitMissing_DISPATCH(pGpu, pEngstate) +#define kgrmgrStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define kgrmgrStatePreInitLocked(pGpu, pEngstate) kgrmgrStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define kgrmgrStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define kgrmgrStatePreInitUnlocked(pGpu, pEngstate) kgrmgrStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kgrmgrStatePostLoad(pGpu, pEngstate, arg0) kgrmgrStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) +#define kgrmgrStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define kgrmgrStateInitLocked(pGpu, pEngstate) kgrmgrStateInitLocked_DISPATCH(pGpu, pEngstate) +#define kgrmgrStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kgrmgrStateInitUnlocked(pGpu, pEngstate) kgrmgrStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kgrmgrStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kgrmgrStatePreLoad(pGpu, pEngstate, arg3) kgrmgrStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kgrmgrStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define kgrmgrStateLoad(pGpu, pEngstate, arg3) kgrmgrStateLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kgrmgrStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kgrmgrStatePostLoad(pGpu, pEngstate, arg3) kgrmgrStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kgrmgrStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kgrmgrStatePreUnload(pGpu, pEngstate, arg3) kgrmgrStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kgrmgrStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define kgrmgrStateUnload(pGpu, pEngstate, arg3) kgrmgrStateUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kgrmgrStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kgrmgrStatePostUnload(pGpu, pEngstate, arg3) kgrmgrStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kgrmgrIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define kgrmgrIsPresent(pGpu, pEngstate) kgrmgrIsPresent_DISPATCH(pGpu, pEngstate) -NV_STATUS kgrmgrConstructEngine_IMPL(OBJGPU *arg0, struct KernelGraphicsManager *arg1, ENGDESCRIPTOR arg2); -static inline NV_STATUS kgrmgrConstructEngine_DISPATCH(OBJGPU *arg0, struct KernelGraphicsManager *arg1, ENGDESCRIPTOR arg2) { - return arg1->__kgrmgrConstructEngine__(arg0, arg1, arg2); +// Dispatch functions +static inline NV_STATUS kgrmgrConstructEngine_DISPATCH(OBJGPU *arg1, struct KernelGraphicsManager *arg_this, ENGDESCRIPTOR arg3) { + return arg_this->__kgrmgrConstructEngine__(arg1, arg_this, arg3); } -NV_STATUS kgrmgrGetVeidsFromGpcCount_GA100(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 gpcCount, NvU32 *pVeidCount); +static inline void kgrmgrStateDestroy_DISPATCH(OBJGPU *arg1, struct KernelGraphicsManager *arg_this) { + arg_this->__kgrmgrStateDestroy__(arg1, arg_this); +} -static inline NV_STATUS kgrmgrGetVeidsFromGpcCount_46f6a7(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 gpcCount, NvU32 *pVeidCount) { - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kgrmgrGetVeidsFromGpcCount_DISPATCH(OBJGPU *arg1, struct KernelGraphicsManager *arg_this, NvU32 gpcCount, NvU32 *pVeidCount) { + return arg_this->__kgrmgrGetVeidsFromGpcCount__(arg1, arg_this, gpcCount, pVeidCount); } -static inline NV_STATUS kgrmgrGetVeidsFromGpcCount_DISPATCH(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 gpcCount, NvU32 *pVeidCount) { - return arg1->__kgrmgrGetVeidsFromGpcCount__(arg0, arg1, gpcCount, pVeidCount); +static inline void kgrmgrInitMissing_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { + pEngstate->__kgrmgrInitMissing__(pGpu, pEngstate); } -static inline NV_STATUS kgrmgrStateLoad_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg0) { - return pEngstate->__kgrmgrStateLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS kgrmgrStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { + return pEngstate->__kgrmgrStatePreInitLocked__(pGpu, pEngstate); } -static inline NV_STATUS kgrmgrStateUnload_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg0) { - return pEngstate->__kgrmgrStateUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS kgrmgrStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { + return pEngstate->__kgrmgrStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kgrmgrStateInitLocked_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { return pEngstate->__kgrmgrStateInitLocked__(pGpu, pEngstate); } -static inline NV_STATUS kgrmgrStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg0) { - return pEngstate->__kgrmgrStatePreLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS kgrmgrStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { + return pEngstate->__kgrmgrStateInitUnlocked__(pGpu, pEngstate); } -static inline NV_STATUS kgrmgrStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg0) { - return pEngstate->__kgrmgrStatePostUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS kgrmgrStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { + return pEngstate->__kgrmgrStatePreLoad__(pGpu, pEngstate, arg3); } -static inline void kgrmgrStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { - pEngstate->__kgrmgrStateDestroy__(pGpu, pEngstate); +static inline NV_STATUS kgrmgrStateLoad_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { + return pEngstate->__kgrmgrStateLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kgrmgrStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg0) { - return pEngstate->__kgrmgrStatePreUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS kgrmgrStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { + return pEngstate->__kgrmgrStatePostLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kgrmgrStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { - return pEngstate->__kgrmgrStateInitUnlocked__(pGpu, pEngstate); +static inline NV_STATUS kgrmgrStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { + return pEngstate->__kgrmgrStatePreUnload__(pGpu, pEngstate, arg3); } -static inline void kgrmgrInitMissing_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { - pEngstate->__kgrmgrInitMissing__(pGpu, pEngstate); +static inline NV_STATUS kgrmgrStateUnload_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { + return pEngstate->__kgrmgrStateUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kgrmgrStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { - return pEngstate->__kgrmgrStatePreInitLocked__(pGpu, pEngstate); +static inline NV_STATUS kgrmgrStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { + return pEngstate->__kgrmgrStatePostUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kgrmgrStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { - return pEngstate->__kgrmgrStatePreInitUnlocked__(pGpu, pEngstate); +static inline NvBool kgrmgrIsPresent_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { + return pEngstate->__kgrmgrIsPresent__(pGpu, pEngstate); } -static inline NV_STATUS kgrmgrStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg0) { - return pEngstate->__kgrmgrStatePostLoad__(pGpu, pEngstate, arg0); -} +NV_STATUS kgrmgrConstructEngine_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2, ENGDESCRIPTOR arg3); -static inline NvBool kgrmgrIsPresent_DISPATCH(POBJGPU pGpu, struct KernelGraphicsManager *pEngstate) { - return pEngstate->__kgrmgrIsPresent__(pGpu, pEngstate); +void kgrmgrStateDestroy_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2); + +NV_STATUS kgrmgrGetVeidsFromGpcCount_GA100(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 gpcCount, NvU32 *pVeidCount); + +static inline NV_STATUS kgrmgrGetVeidsFromGpcCount_46f6a7(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 gpcCount, NvU32 *pVeidCount) { + return NV_ERR_NOT_SUPPORTED; } static inline NvU64 kgrmgrGetGrIdxVeidMask(OBJGPU *pGpu, struct KernelGraphicsManager *pKernelGraphicsManager, NvU32 grIdx) { @@ -281,214 +334,225 @@ static inline KGRMGR_FECS_VGPU_GLOBAL_TRACE_INFO *kgrmgrGetFecsVgpuGlobalTraceIn void kgrmgrGetGrObjectType_IMPL(NvU32 classNum, NvU32 *pObjectType); #define kgrmgrGetGrObjectType(classNum, pObjectType) kgrmgrGetGrObjectType_IMPL(classNum, pObjectType) -NvBool kgrmgrIsCtxBufSupported_IMPL(GR_CTX_BUFFER arg0, NvBool bClassSupported2D); +NvBool kgrmgrIsCtxBufSupported_IMPL(GR_CTX_BUFFER arg1, NvBool bClassSupported2D); -#define kgrmgrIsCtxBufSupported(arg0, bClassSupported2D) kgrmgrIsCtxBufSupported_IMPL(arg0, bClassSupported2D) -NvBool kgrmgrIsGlobalCtxBufSupported_IMPL(GR_GLOBALCTX_BUFFER arg0, NvBool bClassSupported2D); +#define kgrmgrIsCtxBufSupported(arg1, bClassSupported2D) kgrmgrIsCtxBufSupported_IMPL(arg1, bClassSupported2D) +NvBool kgrmgrIsGlobalCtxBufSupported_IMPL(GR_GLOBALCTX_BUFFER arg1, NvBool bClassSupported2D); -#define kgrmgrIsGlobalCtxBufSupported(arg0, bClassSupported2D) kgrmgrIsGlobalCtxBufSupported_IMPL(arg0, bClassSupported2D) -void kgrmgrCtrlSetEngineID_IMPL(NvU32 engID, NV2080_CTRL_GR_ROUTE_INFO *arg0); +#define kgrmgrIsGlobalCtxBufSupported(arg1, bClassSupported2D) kgrmgrIsGlobalCtxBufSupported_IMPL(arg1, bClassSupported2D) +void kgrmgrCtrlSetEngineID_IMPL(NvU32 engID, NV2080_CTRL_GR_ROUTE_INFO *arg2); -#define kgrmgrCtrlSetEngineID(engID, arg0) kgrmgrCtrlSetEngineID_IMPL(engID, arg0) -void kgrmgrCtrlSetChannelHandle_IMPL(NvHandle hChannel, NV2080_CTRL_GR_ROUTE_INFO *arg0); +#define kgrmgrCtrlSetEngineID(engID, arg2) kgrmgrCtrlSetEngineID_IMPL(engID, arg2) +void kgrmgrCtrlSetChannelHandle_IMPL(NvHandle hChannel, NV2080_CTRL_GR_ROUTE_INFO *arg2); -#define kgrmgrCtrlSetChannelHandle(hChannel, arg0) kgrmgrCtrlSetChannelHandle_IMPL(hChannel, arg0) -void kgrmgrDestruct_IMPL(struct KernelGraphicsManager *arg0); +#define kgrmgrCtrlSetChannelHandle(hChannel, arg2) kgrmgrCtrlSetChannelHandle_IMPL(hChannel, arg2) +void kgrmgrDestruct_IMPL(struct KernelGraphicsManager *arg1); -#define __nvoc_kgrmgrDestruct(arg0) kgrmgrDestruct_IMPL(arg0) -void kgrmgrSetLegacyKgraphicsStaticInfo_IMPL(OBJGPU *arg0, struct KernelGraphicsManager *arg1, struct KernelGraphics *arg2); +#define __nvoc_kgrmgrDestruct(arg1) kgrmgrDestruct_IMPL(arg1) +void kgrmgrSetLegacyKgraphicsStaticInfo_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2, struct KernelGraphics *arg3); #ifdef __nvoc_kernel_graphics_manager_h_disabled -static inline void kgrmgrSetLegacyKgraphicsStaticInfo(OBJGPU *arg0, struct KernelGraphicsManager *arg1, struct KernelGraphics *arg2) { +static inline void kgrmgrSetLegacyKgraphicsStaticInfo(OBJGPU *arg1, struct KernelGraphicsManager *arg2, struct KernelGraphics *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsManager was disabled!"); } #else //__nvoc_kernel_graphics_manager_h_disabled -#define kgrmgrSetLegacyKgraphicsStaticInfo(arg0, arg1, arg2) kgrmgrSetLegacyKgraphicsStaticInfo_IMPL(arg0, arg1, arg2) +#define kgrmgrSetLegacyKgraphicsStaticInfo(arg1, arg2, arg3) kgrmgrSetLegacyKgraphicsStaticInfo_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_graphics_manager_h_disabled -NV_STATUS kgrmgrCtrlRouteKGRWithDevice_IMPL(OBJGPU *arg0, struct KernelGraphicsManager *arg1, Device *pDevice, const NV2080_CTRL_GR_ROUTE_INFO *pGrRouteInfo, struct KernelGraphics **ppKernelGraphics); +NV_STATUS kgrmgrCtrlRouteKGRWithDevice_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2, Device *pDevice, const NV2080_CTRL_GR_ROUTE_INFO *pGrRouteInfo, struct KernelGraphics **ppKernelGraphics); #ifdef __nvoc_kernel_graphics_manager_h_disabled -static inline NV_STATUS kgrmgrCtrlRouteKGRWithDevice(OBJGPU *arg0, struct KernelGraphicsManager *arg1, Device *pDevice, const NV2080_CTRL_GR_ROUTE_INFO *pGrRouteInfo, struct KernelGraphics **ppKernelGraphics) { +static inline NV_STATUS kgrmgrCtrlRouteKGRWithDevice(OBJGPU *arg1, struct KernelGraphicsManager *arg2, Device *pDevice, const NV2080_CTRL_GR_ROUTE_INFO *pGrRouteInfo, struct KernelGraphics **ppKernelGraphics) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_manager_h_disabled -#define kgrmgrCtrlRouteKGRWithDevice(arg0, arg1, pDevice, pGrRouteInfo, ppKernelGraphics) kgrmgrCtrlRouteKGRWithDevice_IMPL(arg0, arg1, pDevice, pGrRouteInfo, ppKernelGraphics) +#define kgrmgrCtrlRouteKGRWithDevice(arg1, arg2, pDevice, pGrRouteInfo, ppKernelGraphics) kgrmgrCtrlRouteKGRWithDevice_IMPL(arg1, arg2, pDevice, pGrRouteInfo, ppKernelGraphics) #endif //__nvoc_kernel_graphics_manager_h_disabled -NvU32 kgrmgrGetLegacyGpcMask_IMPL(OBJGPU *arg0, struct KernelGraphicsManager *arg1); +NvU32 kgrmgrGetLegacyGpcMask_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2); #ifdef __nvoc_kernel_graphics_manager_h_disabled -static inline NvU32 kgrmgrGetLegacyGpcMask(OBJGPU *arg0, struct KernelGraphicsManager *arg1) { +static inline NvU32 kgrmgrGetLegacyGpcMask(OBJGPU *arg1, struct KernelGraphicsManager *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsManager was disabled!"); return 0; } #else //__nvoc_kernel_graphics_manager_h_disabled -#define kgrmgrGetLegacyGpcMask(arg0, arg1) kgrmgrGetLegacyGpcMask_IMPL(arg0, arg1) +#define kgrmgrGetLegacyGpcMask(arg1, arg2) kgrmgrGetLegacyGpcMask_IMPL(arg1, arg2) #endif //__nvoc_kernel_graphics_manager_h_disabled -NvU32 kgrmgrGetLegacyPhysGfxGpcMask_IMPL(OBJGPU *arg0, struct KernelGraphicsManager *arg1); +NvU32 kgrmgrGetLegacyPhysGfxGpcMask_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2); #ifdef __nvoc_kernel_graphics_manager_h_disabled -static inline NvU32 kgrmgrGetLegacyPhysGfxGpcMask(OBJGPU *arg0, struct KernelGraphicsManager *arg1) { +static inline NvU32 kgrmgrGetLegacyPhysGfxGpcMask(OBJGPU *arg1, struct KernelGraphicsManager *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsManager was disabled!"); return 0; } #else //__nvoc_kernel_graphics_manager_h_disabled -#define kgrmgrGetLegacyPhysGfxGpcMask(arg0, arg1) kgrmgrGetLegacyPhysGfxGpcMask_IMPL(arg0, arg1) +#define kgrmgrGetLegacyPhysGfxGpcMask(arg1, arg2) kgrmgrGetLegacyPhysGfxGpcMask_IMPL(arg1, arg2) #endif //__nvoc_kernel_graphics_manager_h_disabled -NvU32 kgrmgrGetLegacyTpcMask_IMPL(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 gpcId); +NvU32 kgrmgrGetLegacyTpcMask_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 gpcId); #ifdef __nvoc_kernel_graphics_manager_h_disabled -static inline NvU32 kgrmgrGetLegacyTpcMask(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 gpcId) { +static inline NvU32 kgrmgrGetLegacyTpcMask(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 gpcId) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsManager was disabled!"); return 0; } #else //__nvoc_kernel_graphics_manager_h_disabled -#define kgrmgrGetLegacyTpcMask(arg0, arg1, gpcId) kgrmgrGetLegacyTpcMask_IMPL(arg0, arg1, gpcId) +#define kgrmgrGetLegacyTpcMask(arg1, arg2, gpcId) kgrmgrGetLegacyTpcMask_IMPL(arg1, arg2, gpcId) #endif //__nvoc_kernel_graphics_manager_h_disabled -NV_STATUS kgrmgrGetLegacyPpcMask_IMPL(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 physGpcId, NvU32 *pPpcMask); +NV_STATUS kgrmgrGetLegacyPpcMask_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 physGpcId, NvU32 *pPpcMask); #ifdef __nvoc_kernel_graphics_manager_h_disabled -static inline NV_STATUS kgrmgrGetLegacyPpcMask(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 physGpcId, NvU32 *pPpcMask) { +static inline NV_STATUS kgrmgrGetLegacyPpcMask(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 physGpcId, NvU32 *pPpcMask) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_manager_h_disabled -#define kgrmgrGetLegacyPpcMask(arg0, arg1, physGpcId, pPpcMask) kgrmgrGetLegacyPpcMask_IMPL(arg0, arg1, physGpcId, pPpcMask) +#define kgrmgrGetLegacyPpcMask(arg1, arg2, physGpcId, pPpcMask) kgrmgrGetLegacyPpcMask_IMPL(arg1, arg2, physGpcId, pPpcMask) #endif //__nvoc_kernel_graphics_manager_h_disabled -NvU32 kgrmgrGetLegacyZcullMask_IMPL(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 physGpcId); +NvU32 kgrmgrGetLegacyZcullMask_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 physGpcId); #ifdef __nvoc_kernel_graphics_manager_h_disabled -static inline NvU32 kgrmgrGetLegacyZcullMask(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 physGpcId) { +static inline NvU32 kgrmgrGetLegacyZcullMask(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 physGpcId) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsManager was disabled!"); return 0; } #else //__nvoc_kernel_graphics_manager_h_disabled -#define kgrmgrGetLegacyZcullMask(arg0, arg1, physGpcId) kgrmgrGetLegacyZcullMask_IMPL(arg0, arg1, physGpcId) +#define kgrmgrGetLegacyZcullMask(arg1, arg2, physGpcId) kgrmgrGetLegacyZcullMask_IMPL(arg1, arg2, physGpcId) #endif //__nvoc_kernel_graphics_manager_h_disabled -NV_STATUS kgrmgrAllocVeidsForGrIdx_IMPL(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 grIdx, NvU32 veidSpanOffset, NvU32 veidCount, KERNEL_MIG_GPU_INSTANCE *arg2); +NV_STATUS kgrmgrAllocVeidsForGrIdx_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 grIdx, NvU32 veidSpanOffset, NvU32 veidCount, KERNEL_MIG_GPU_INSTANCE *arg6); #ifdef __nvoc_kernel_graphics_manager_h_disabled -static inline NV_STATUS kgrmgrAllocVeidsForGrIdx(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 grIdx, NvU32 veidSpanOffset, NvU32 veidCount, KERNEL_MIG_GPU_INSTANCE *arg2) { +static inline NV_STATUS kgrmgrAllocVeidsForGrIdx(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 grIdx, NvU32 veidSpanOffset, NvU32 veidCount, KERNEL_MIG_GPU_INSTANCE *arg6) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_manager_h_disabled -#define kgrmgrAllocVeidsForGrIdx(arg0, arg1, grIdx, veidSpanOffset, veidCount, arg2) kgrmgrAllocVeidsForGrIdx_IMPL(arg0, arg1, grIdx, veidSpanOffset, veidCount, arg2) +#define kgrmgrAllocVeidsForGrIdx(arg1, arg2, grIdx, veidSpanOffset, veidCount, arg6) kgrmgrAllocVeidsForGrIdx_IMPL(arg1, arg2, grIdx, veidSpanOffset, veidCount, arg6) +#endif //__nvoc_kernel_graphics_manager_h_disabled + +void kgrmgrClearVeidsForGrIdx_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 grIdx); + +#ifdef __nvoc_kernel_graphics_manager_h_disabled +static inline void kgrmgrClearVeidsForGrIdx(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 grIdx) { + NV_ASSERT_FAILED_PRECOMP("KernelGraphicsManager was disabled!"); +} +#else //__nvoc_kernel_graphics_manager_h_disabled +#define kgrmgrClearVeidsForGrIdx(arg1, arg2, grIdx) kgrmgrClearVeidsForGrIdx_IMPL(arg1, arg2, grIdx) #endif //__nvoc_kernel_graphics_manager_h_disabled -void kgrmgrClearVeidsForGrIdx_IMPL(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 grIdx); +NV_STATUS kgrmgrGetVeidStepSize_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 *pVeidStepSize); #ifdef __nvoc_kernel_graphics_manager_h_disabled -static inline void kgrmgrClearVeidsForGrIdx(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 grIdx) { +static inline NV_STATUS kgrmgrGetVeidStepSize(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 *pVeidStepSize) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsManager was disabled!"); + return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_manager_h_disabled -#define kgrmgrClearVeidsForGrIdx(arg0, arg1, grIdx) kgrmgrClearVeidsForGrIdx_IMPL(arg0, arg1, grIdx) +#define kgrmgrGetVeidStepSize(arg1, arg2, pVeidStepSize) kgrmgrGetVeidStepSize_IMPL(arg1, arg2, pVeidStepSize) #endif //__nvoc_kernel_graphics_manager_h_disabled -NV_STATUS kgrmgrGetVeidStepSize_IMPL(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 *pVeidStepSize); +NV_STATUS kgrmgrGetVeidSizePerSpan_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 *pVeidSizePerSpan); #ifdef __nvoc_kernel_graphics_manager_h_disabled -static inline NV_STATUS kgrmgrGetVeidStepSize(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 *pVeidStepSize) { +static inline NV_STATUS kgrmgrGetVeidSizePerSpan(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 *pVeidSizePerSpan) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_manager_h_disabled -#define kgrmgrGetVeidStepSize(arg0, arg1, pVeidStepSize) kgrmgrGetVeidStepSize_IMPL(arg0, arg1, pVeidStepSize) +#define kgrmgrGetVeidSizePerSpan(arg1, arg2, pVeidSizePerSpan) kgrmgrGetVeidSizePerSpan_IMPL(arg1, arg2, pVeidSizePerSpan) #endif //__nvoc_kernel_graphics_manager_h_disabled -NV_STATUS kgrmgrGetVeidBaseForGrIdx_IMPL(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 grIdx, NvU32 *pVeidStart); +NV_STATUS kgrmgrGetVeidBaseForGrIdx_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 grIdx, NvU32 *pVeidStart); #ifdef __nvoc_kernel_graphics_manager_h_disabled -static inline NV_STATUS kgrmgrGetVeidBaseForGrIdx(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 grIdx, NvU32 *pVeidStart) { +static inline NV_STATUS kgrmgrGetVeidBaseForGrIdx(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 grIdx, NvU32 *pVeidStart) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_manager_h_disabled -#define kgrmgrGetVeidBaseForGrIdx(arg0, arg1, grIdx, pVeidStart) kgrmgrGetVeidBaseForGrIdx_IMPL(arg0, arg1, grIdx, pVeidStart) +#define kgrmgrGetVeidBaseForGrIdx(arg1, arg2, grIdx, pVeidStart) kgrmgrGetVeidBaseForGrIdx_IMPL(arg1, arg2, grIdx, pVeidStart) #endif //__nvoc_kernel_graphics_manager_h_disabled -NV_STATUS kgrmgrGetGrIdxForVeid_IMPL(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 veid, NvU32 *pGrIdx); +NV_STATUS kgrmgrGetGrIdxForVeid_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 veid, NvU32 *pGrIdx); #ifdef __nvoc_kernel_graphics_manager_h_disabled -static inline NV_STATUS kgrmgrGetGrIdxForVeid(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 veid, NvU32 *pGrIdx) { +static inline NV_STATUS kgrmgrGetGrIdxForVeid(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 veid, NvU32 *pGrIdx) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_manager_h_disabled -#define kgrmgrGetGrIdxForVeid(arg0, arg1, veid, pGrIdx) kgrmgrGetGrIdxForVeid_IMPL(arg0, arg1, veid, pGrIdx) +#define kgrmgrGetGrIdxForVeid(arg1, arg2, veid, pGrIdx) kgrmgrGetGrIdxForVeid_IMPL(arg1, arg2, veid, pGrIdx) #endif //__nvoc_kernel_graphics_manager_h_disabled -NV_STATUS kgrmgrDiscoverMaxLocalCtxBufInfo_IMPL(OBJGPU *arg0, struct KernelGraphicsManager *arg1, struct KernelGraphics *arg2, NvU32 swizzId); +NV_STATUS kgrmgrDiscoverMaxLocalCtxBufInfo_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2, struct KernelGraphics *arg3, NvU32 swizzId); #ifdef __nvoc_kernel_graphics_manager_h_disabled -static inline NV_STATUS kgrmgrDiscoverMaxLocalCtxBufInfo(OBJGPU *arg0, struct KernelGraphicsManager *arg1, struct KernelGraphics *arg2, NvU32 swizzId) { +static inline NV_STATUS kgrmgrDiscoverMaxLocalCtxBufInfo(OBJGPU *arg1, struct KernelGraphicsManager *arg2, struct KernelGraphics *arg3, NvU32 swizzId) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_manager_h_disabled -#define kgrmgrDiscoverMaxLocalCtxBufInfo(arg0, arg1, arg2, swizzId) kgrmgrDiscoverMaxLocalCtxBufInfo_IMPL(arg0, arg1, arg2, swizzId) +#define kgrmgrDiscoverMaxLocalCtxBufInfo(arg1, arg2, arg3, swizzId) kgrmgrDiscoverMaxLocalCtxBufInfo_IMPL(arg1, arg2, arg3, swizzId) #endif //__nvoc_kernel_graphics_manager_h_disabled -const CTX_BUF_INFO *kgrmgrGetGlobalCtxBufInfo_IMPL(OBJGPU *arg0, struct KernelGraphicsManager *arg1, GR_GLOBALCTX_BUFFER arg2); +const CTX_BUF_INFO *kgrmgrGetGlobalCtxBufInfo_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2, GR_GLOBALCTX_BUFFER arg3); #ifdef __nvoc_kernel_graphics_manager_h_disabled -static inline const CTX_BUF_INFO *kgrmgrGetGlobalCtxBufInfo(OBJGPU *arg0, struct KernelGraphicsManager *arg1, GR_GLOBALCTX_BUFFER arg2) { +static inline const CTX_BUF_INFO *kgrmgrGetGlobalCtxBufInfo(OBJGPU *arg1, struct KernelGraphicsManager *arg2, GR_GLOBALCTX_BUFFER arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsManager was disabled!"); return NULL; } #else //__nvoc_kernel_graphics_manager_h_disabled -#define kgrmgrGetGlobalCtxBufInfo(arg0, arg1, arg2) kgrmgrGetGlobalCtxBufInfo_IMPL(arg0, arg1, arg2) +#define kgrmgrGetGlobalCtxBufInfo(arg1, arg2, arg3) kgrmgrGetGlobalCtxBufInfo_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_graphics_manager_h_disabled -void kgrmgrSetGlobalCtxBufInfo_IMPL(OBJGPU *arg0, struct KernelGraphicsManager *arg1, GR_GLOBALCTX_BUFFER arg2, NvU64 size, NvU64 align, RM_ATTR_PAGE_SIZE attr, NvBool bContiguous); +void kgrmgrSetGlobalCtxBufInfo_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2, GR_GLOBALCTX_BUFFER arg3, NvU64 size, NvU64 align, RM_ATTR_PAGE_SIZE attr, NvBool bContiguous); #ifdef __nvoc_kernel_graphics_manager_h_disabled -static inline void kgrmgrSetGlobalCtxBufInfo(OBJGPU *arg0, struct KernelGraphicsManager *arg1, GR_GLOBALCTX_BUFFER arg2, NvU64 size, NvU64 align, RM_ATTR_PAGE_SIZE attr, NvBool bContiguous) { +static inline void kgrmgrSetGlobalCtxBufInfo(OBJGPU *arg1, struct KernelGraphicsManager *arg2, GR_GLOBALCTX_BUFFER arg3, NvU64 size, NvU64 align, RM_ATTR_PAGE_SIZE attr, NvBool bContiguous) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsManager was disabled!"); } #else //__nvoc_kernel_graphics_manager_h_disabled -#define kgrmgrSetGlobalCtxBufInfo(arg0, arg1, arg2, size, align, attr, bContiguous) kgrmgrSetGlobalCtxBufInfo_IMPL(arg0, arg1, arg2, size, align, attr, bContiguous) +#define kgrmgrSetGlobalCtxBufInfo(arg1, arg2, arg3, size, align, attr, bContiguous) kgrmgrSetGlobalCtxBufInfo_IMPL(arg1, arg2, arg3, size, align, attr, bContiguous) #endif //__nvoc_kernel_graphics_manager_h_disabled -NV_STATUS kgrmgrDiscoverMaxGlobalCtxBufSizes_IMPL(OBJGPU *arg0, struct KernelGraphicsManager *arg1, struct KernelGraphics *arg2, NvBool bMemoryPartitioningNeeded); +NV_STATUS kgrmgrDiscoverMaxGlobalCtxBufSizes_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2, struct KernelGraphics *arg3, NvBool bMemoryPartitioningNeeded); #ifdef __nvoc_kernel_graphics_manager_h_disabled -static inline NV_STATUS kgrmgrDiscoverMaxGlobalCtxBufSizes(OBJGPU *arg0, struct KernelGraphicsManager *arg1, struct KernelGraphics *arg2, NvBool bMemoryPartitioningNeeded) { +static inline NV_STATUS kgrmgrDiscoverMaxGlobalCtxBufSizes(OBJGPU *arg1, struct KernelGraphicsManager *arg2, struct KernelGraphics *arg3, NvBool bMemoryPartitioningNeeded) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_manager_h_disabled -#define kgrmgrDiscoverMaxGlobalCtxBufSizes(arg0, arg1, arg2, bMemoryPartitioningNeeded) kgrmgrDiscoverMaxGlobalCtxBufSizes_IMPL(arg0, arg1, arg2, bMemoryPartitioningNeeded) +#define kgrmgrDiscoverMaxGlobalCtxBufSizes(arg1, arg2, arg3, bMemoryPartitioningNeeded) kgrmgrDiscoverMaxGlobalCtxBufSizes_IMPL(arg1, arg2, arg3, bMemoryPartitioningNeeded) #endif //__nvoc_kernel_graphics_manager_h_disabled -NvU32 kgrmgrGetLegacyGpcTpcCount_IMPL(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 gpcId); +NvU32 kgrmgrGetLegacyGpcTpcCount_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 gpcId); #ifdef __nvoc_kernel_graphics_manager_h_disabled -static inline NvU32 kgrmgrGetLegacyGpcTpcCount(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU32 gpcId) { +static inline NvU32 kgrmgrGetLegacyGpcTpcCount(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU32 gpcId) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsManager was disabled!"); return 0; } #else //__nvoc_kernel_graphics_manager_h_disabled -#define kgrmgrGetLegacyGpcTpcCount(arg0, arg1, gpcId) kgrmgrGetLegacyGpcTpcCount_IMPL(arg0, arg1, gpcId) +#define kgrmgrGetLegacyGpcTpcCount(arg1, arg2, gpcId) kgrmgrGetLegacyGpcTpcCount_IMPL(arg1, arg2, gpcId) #endif //__nvoc_kernel_graphics_manager_h_disabled -NV_STATUS kgrmgrCheckVeidsRequest_IMPL(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU64 *pInUseMask, NvU32 veidCount, NvU32 *pSpanStart, KERNEL_MIG_GPU_INSTANCE *arg2); +NV_STATUS kgrmgrCheckVeidsRequest_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU64 *pInUseMask, NvU32 veidCount, NvU32 *pSpanStart, KERNEL_MIG_GPU_INSTANCE *arg6); #ifdef __nvoc_kernel_graphics_manager_h_disabled -static inline NV_STATUS kgrmgrCheckVeidsRequest(OBJGPU *arg0, struct KernelGraphicsManager *arg1, NvU64 *pInUseMask, NvU32 veidCount, NvU32 *pSpanStart, KERNEL_MIG_GPU_INSTANCE *arg2) { +static inline NV_STATUS kgrmgrCheckVeidsRequest(OBJGPU *arg1, struct KernelGraphicsManager *arg2, NvU64 *pInUseMask, NvU32 veidCount, NvU32 *pSpanStart, KERNEL_MIG_GPU_INSTANCE *arg6) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_manager_h_disabled -#define kgrmgrCheckVeidsRequest(arg0, arg1, pInUseMask, veidCount, pSpanStart, arg2) kgrmgrCheckVeidsRequest_IMPL(arg0, arg1, pInUseMask, veidCount, pSpanStart, arg2) +#define kgrmgrCheckVeidsRequest(arg1, arg2, pInUseMask, veidCount, pSpanStart, arg6) kgrmgrCheckVeidsRequest_IMPL(arg1, arg2, pInUseMask, veidCount, pSpanStart, arg6) #endif //__nvoc_kernel_graphics_manager_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_kernel_graphics_nvoc.c b/src/nvidia/generated/g_kernel_graphics_nvoc.c index 7ebabb1149..c3866c9ec5 100644 --- a/src/nvidia/generated/g_kernel_graphics_nvoc.c +++ b/src/nvidia/generated/g_kernel_graphics_nvoc.c @@ -75,78 +75,102 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGraphics = /*pExportInfo=*/ &__nvoc_export_info_KernelGraphics }; -static NV_STATUS __nvoc_thunk_KernelGraphics_engstateConstructEngine(OBJGPU *arg0, struct OBJENGSTATE *arg1, ENGDESCRIPTOR arg2) { - return kgraphicsConstructEngine(arg0, (struct KernelGraphics *)(((unsigned char *)arg1) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), arg2); +// 12 down-thunk(s) defined to bridge methods in KernelGraphics from superclasses + +// kgraphicsConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateConstructEngine(OBJGPU *arg1, struct OBJENGSTATE *arg_this, ENGDESCRIPTOR arg3) { + return kgraphicsConstructEngine(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelGraphics_engstateStateInitLocked(OBJGPU *arg0, struct OBJENGSTATE *arg1) { - return kgraphicsStateInitLocked(arg0, (struct KernelGraphics *)(((unsigned char *)arg1) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); +// kgraphicsStateInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateStateInitLocked(OBJGPU *arg1, struct OBJENGSTATE *arg_this) { + return kgraphicsStateInitLocked(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_KernelGraphics_engstateStateLoad(OBJGPU *arg0, struct OBJENGSTATE *arg1, NvU32 flags) { - return kgraphicsStateLoad(arg0, (struct KernelGraphics *)(((unsigned char *)arg1) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), flags); +// kgraphicsStateLoad: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateStateLoad(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags) { + return kgraphicsStateLoad(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), flags); } -static NV_STATUS __nvoc_thunk_KernelGraphics_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *arg0, NvU32 flags) { - return kgraphicsStatePreUnload(pGpu, (struct KernelGraphics *)(((unsigned char *)arg0) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), flags); +// kgraphicsStatePreUnload: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *arg_this, NvU32 flags) { + return kgraphicsStatePreUnload(pGpu, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), flags); } -static NV_STATUS __nvoc_thunk_KernelGraphics_engstateStateUnload(OBJGPU *arg0, struct OBJENGSTATE *arg1, NvU32 flags) { - return kgraphicsStateUnload(arg0, (struct KernelGraphics *)(((unsigned char *)arg1) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), flags); +// kgraphicsStateUnload: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateStateUnload(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags) { + return kgraphicsStateUnload(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), flags); } -static void __nvoc_thunk_KernelGraphics_engstateStateDestroy(OBJGPU *arg0, struct OBJENGSTATE *arg1) { - kgraphicsStateDestroy(arg0, (struct KernelGraphics *)(((unsigned char *)arg1) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); +// kgraphicsStateDestroy: virtual override (engstate) base (engstate) +static void __nvoc_down_thunk_KernelGraphics_engstateStateDestroy(OBJGPU *arg1, struct OBJENGSTATE *arg_this) { + kgraphicsStateDestroy(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); } -static NvBool __nvoc_thunk_KernelGraphics_engstateIsPresent(OBJGPU *arg0, struct OBJENGSTATE *arg1) { - return kgraphicsIsPresent(arg0, (struct KernelGraphics *)(((unsigned char *)arg1) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); +// kgraphicsIsPresent: virtual override (engstate) base (engstate) +static NvBool __nvoc_down_thunk_KernelGraphics_engstateIsPresent(OBJGPU *arg1, struct OBJENGSTATE *arg_this) { + return kgraphicsIsPresent(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_KernelGraphics_engstateStatePostLoad(OBJGPU *arg0, struct OBJENGSTATE *arg1, NvU32 flags) { - return kgraphicsStatePostLoad(arg0, (struct KernelGraphics *)(((unsigned char *)arg1) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), flags); +// kgraphicsStatePostLoad: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateStatePostLoad(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags) { + return kgraphicsStatePostLoad(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), flags); } -static void __nvoc_thunk_KernelGraphics_intrservRegisterIntrService(OBJGPU *arg0, struct IntrService *arg1, IntrServiceRecord arg2[171]) { - kgraphicsRegisterIntrService(arg0, (struct KernelGraphics *)(((unsigned char *)arg1) - __nvoc_rtti_KernelGraphics_IntrService.offset), arg2); +// kgraphicsRegisterIntrService: virtual override (intrserv) base (intrserv) +static void __nvoc_down_thunk_KernelGraphics_intrservRegisterIntrService(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceRecord arg3[175]) { + kgraphicsRegisterIntrService(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_IntrService.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelGraphics_intrservServiceNotificationInterrupt(OBJGPU *arg0, struct IntrService *arg1, IntrServiceServiceNotificationInterruptArguments *arg2) { - return kgraphicsServiceNotificationInterrupt(arg0, (struct KernelGraphics *)(((unsigned char *)arg1) - __nvoc_rtti_KernelGraphics_IntrService.offset), arg2); +// kgraphicsServiceNotificationInterrupt: virtual override (intrserv) base (intrserv) +static NV_STATUS __nvoc_down_thunk_KernelGraphics_intrservServiceNotificationInterrupt(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3) { + return kgraphicsServiceNotificationInterrupt(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_IntrService.offset), arg3); } -static NvBool __nvoc_thunk_KernelGraphics_intrservClearInterrupt(OBJGPU *arg0, struct IntrService *arg1, IntrServiceClearInterruptArguments *arg2) { - return kgraphicsClearInterrupt(arg0, (struct KernelGraphics *)(((unsigned char *)arg1) - __nvoc_rtti_KernelGraphics_IntrService.offset), arg2); +// kgraphicsClearInterrupt: virtual halified (singleton optimized) override (intrserv) base (intrserv) +static NvBool __nvoc_down_thunk_KernelGraphics_intrservClearInterrupt(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceClearInterruptArguments *arg3) { + return kgraphicsClearInterrupt(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_IntrService.offset), arg3); } -static NvU32 __nvoc_thunk_KernelGraphics_intrservServiceInterrupt(OBJGPU *arg0, struct IntrService *arg1, IntrServiceServiceInterruptArguments *arg2) { - return kgraphicsServiceInterrupt(arg0, (struct KernelGraphics *)(((unsigned char *)arg1) - __nvoc_rtti_KernelGraphics_IntrService.offset), arg2); +// kgraphicsServiceInterrupt: virtual halified (singleton optimized) override (intrserv) base (intrserv) +static NvU32 __nvoc_down_thunk_KernelGraphics_intrservServiceInterrupt(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceServiceInterruptArguments *arg3) { + return kgraphicsServiceInterrupt(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_IntrService.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgraphicsStatePreLoad(POBJGPU pGpu, struct KernelGraphics *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), arg0); + +// 6 up-thunk(s) defined to bridge methods in KernelGraphics to superclasses + +// kgraphicsInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kgraphicsInitMissing(POBJGPU pGpu, struct KernelGraphics *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgraphicsStatePostUnload(POBJGPU pGpu, struct KernelGraphics *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), arg0); +// kgraphicsStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreInitLocked(POBJGPU pGpu, struct KernelGraphics *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgraphicsStateInitUnlocked(POBJGPU pGpu, struct KernelGraphics *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); +// kgraphicsStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreInitUnlocked(POBJGPU pGpu, struct KernelGraphics *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_kgraphicsInitMissing(POBJGPU pGpu, struct KernelGraphics *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); +// kgraphicsStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgraphicsStateInitUnlocked(POBJGPU pGpu, struct KernelGraphics *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgraphicsStatePreInitLocked(POBJGPU pGpu, struct KernelGraphics *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); +// kgraphicsStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreLoad(POBJGPU pGpu, struct KernelGraphics *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgraphicsStatePreInitUnlocked(POBJGPU pGpu, struct KernelGraphics *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); +// kgraphicsStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePostUnload(POBJGPU pGpu, struct KernelGraphics *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), arg3); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelGraphics = { /*numEntries=*/ 0, @@ -180,9 +204,6 @@ void __nvoc_init_dataField_KernelGraphics(KernelGraphics *pThis, RmHalspecOwner pThis->bCtxswLoggingSupported = ((NvBool)(0 == 0)); } - // Hal field -- bUsePriFecsMailbox - pThis->bUsePriFecsMailbox = ((NvBool)(0 != 0)); - // Hal field -- bDeferContextInit if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000003UL) )) /* RmVariantHal: VF | PF_KERNEL_ONLY */ { @@ -251,6 +272,7 @@ NV_STATUS __nvoc_ctor_KernelGraphics(KernelGraphics *pThis, RmHalspecOwner *pRmh return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelGraphics_1(KernelGraphics *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -263,27 +285,47 @@ static void __nvoc_init_funcTable_KernelGraphics_1(KernelGraphics *pThis, RmHals PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); + // kgraphicsConstructEngine -- virtual override (engstate) base (engstate) pThis->__kgraphicsConstructEngine__ = &kgraphicsConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelGraphics_engstateConstructEngine; + // kgraphicsStateInitLocked -- virtual override (engstate) base (engstate) pThis->__kgraphicsStateInitLocked__ = &kgraphicsStateInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelGraphics_engstateStateInitLocked; + // kgraphicsStateLoad -- virtual override (engstate) base (engstate) pThis->__kgraphicsStateLoad__ = &kgraphicsStateLoad_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelGraphics_engstateStateLoad; + // kgraphicsStatePreUnload -- virtual override (engstate) base (engstate) pThis->__kgraphicsStatePreUnload__ = &kgraphicsStatePreUnload_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_KernelGraphics_engstateStatePreUnload; + // kgraphicsStateUnload -- virtual override (engstate) base (engstate) pThis->__kgraphicsStateUnload__ = &kgraphicsStateUnload_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelGraphics_engstateStateUnload; + // kgraphicsStateDestroy -- virtual override (engstate) base (engstate) pThis->__kgraphicsStateDestroy__ = &kgraphicsStateDestroy_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelGraphics_engstateStateDestroy; + // kgraphicsIsPresent -- virtual override (engstate) base (engstate) pThis->__kgraphicsIsPresent__ = &kgraphicsIsPresent_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ = &__nvoc_down_thunk_KernelGraphics_engstateIsPresent; + // kgraphicsStatePostLoad -- virtual override (engstate) base (engstate) pThis->__kgraphicsStatePostLoad__ = &kgraphicsStatePostLoad_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelGraphics_engstateStatePostLoad; + // kgraphicsRegisterIntrService -- virtual override (intrserv) base (intrserv) pThis->__kgraphicsRegisterIntrService__ = &kgraphicsRegisterIntrService_IMPL; + pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_KernelGraphics_intrservRegisterIntrService; + // kgraphicsServiceNotificationInterrupt -- virtual override (intrserv) base (intrserv) pThis->__kgraphicsServiceNotificationInterrupt__ = &kgraphicsServiceNotificationInterrupt_IMPL; + pThis->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_down_thunk_KernelGraphics_intrservServiceNotificationInterrupt; - // Hal function -- kgraphicsLoadStaticInfo + // kgraphicsLoadStaticInfo -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgraphicsLoadStaticInfo__ = &kgraphicsLoadStaticInfo_VF; @@ -293,13 +335,15 @@ static void __nvoc_init_funcTable_KernelGraphics_1(KernelGraphics *pThis, RmHals pThis->__kgraphicsLoadStaticInfo__ = &kgraphicsLoadStaticInfo_KERNEL; } - // Hal function -- kgraphicsClearInterrupt + // kgraphicsClearInterrupt -- virtual halified (singleton optimized) override (intrserv) base (intrserv) pThis->__kgraphicsClearInterrupt__ = &kgraphicsClearInterrupt_GP100; + pThis->__nvoc_base_IntrService.__intrservClearInterrupt__ = &__nvoc_down_thunk_KernelGraphics_intrservClearInterrupt; - // Hal function -- kgraphicsServiceInterrupt + // kgraphicsServiceInterrupt -- virtual halified (singleton optimized) override (intrserv) base (intrserv) pThis->__kgraphicsServiceInterrupt__ = &kgraphicsServiceInterrupt_GP100; + pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_KernelGraphics_intrservServiceInterrupt; - // Hal function -- kgraphicsIsUnrestrictedAccessMapSupported + // kgraphicsIsUnrestrictedAccessMapSupported -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgraphicsIsUnrestrictedAccessMapSupported__ = &kgraphicsIsUnrestrictedAccessMapSupported_491d52; @@ -310,7 +354,7 @@ static void __nvoc_init_funcTable_KernelGraphics_1(KernelGraphics *pThis, RmHals pThis->__kgraphicsIsUnrestrictedAccessMapSupported__ = &kgraphicsIsUnrestrictedAccessMapSupported_PF; } - // Hal function -- kgraphicsGetFecsTraceRdOffset + // kgraphicsGetFecsTraceRdOffset -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kgraphicsGetFecsTraceRdOffset__ = &kgraphicsGetFecsTraceRdOffset_474d46; @@ -320,7 +364,7 @@ static void __nvoc_init_funcTable_KernelGraphics_1(KernelGraphics *pThis, RmHals pThis->__kgraphicsGetFecsTraceRdOffset__ = &kgraphicsGetFecsTraceRdOffset_GA100; } - // Hal function -- kgraphicsSetFecsTraceRdOffset + // kgraphicsSetFecsTraceRdOffset -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kgraphicsSetFecsTraceRdOffset__ = &kgraphicsSetFecsTraceRdOffset_d44104; @@ -330,7 +374,7 @@ static void __nvoc_init_funcTable_KernelGraphics_1(KernelGraphics *pThis, RmHals pThis->__kgraphicsSetFecsTraceRdOffset__ = &kgraphicsSetFecsTraceRdOffset_GA100; } - // Hal function -- kgraphicsSetFecsTraceWrOffset + // kgraphicsSetFecsTraceWrOffset -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kgraphicsSetFecsTraceWrOffset__ = &kgraphicsSetFecsTraceWrOffset_d44104; @@ -340,7 +384,7 @@ static void __nvoc_init_funcTable_KernelGraphics_1(KernelGraphics *pThis, RmHals pThis->__kgraphicsSetFecsTraceWrOffset__ = &kgraphicsSetFecsTraceWrOffset_GA100; } - // Hal function -- kgraphicsSetFecsTraceHwEnable + // kgraphicsSetFecsTraceHwEnable -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__kgraphicsSetFecsTraceHwEnable__ = &kgraphicsSetFecsTraceHwEnable_d44104; @@ -350,44 +394,30 @@ static void __nvoc_init_funcTable_KernelGraphics_1(KernelGraphics *pThis, RmHals pThis->__kgraphicsSetFecsTraceHwEnable__ = &kgraphicsSetFecsTraceHwEnable_GA100; } - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelGraphics_engstateConstructEngine; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_thunk_KernelGraphics_engstateStateInitLocked; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_thunk_KernelGraphics_engstateStateLoad; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_thunk_KernelGraphics_engstateStatePreUnload; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_thunk_KernelGraphics_engstateStateUnload; + // kgraphicsInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__kgraphicsInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kgraphicsInitMissing; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_thunk_KernelGraphics_engstateStateDestroy; + // kgraphicsStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__kgraphicsStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreInitLocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ = &__nvoc_thunk_KernelGraphics_engstateIsPresent; + // kgraphicsStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kgraphicsStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreInitUnlocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_thunk_KernelGraphics_engstateStatePostLoad; + // kgraphicsStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kgraphicsStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgraphicsStateInitUnlocked; - pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_thunk_KernelGraphics_intrservRegisterIntrService; + // kgraphicsStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__kgraphicsStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreLoad; - pThis->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_thunk_KernelGraphics_intrservServiceNotificationInterrupt; + // kgraphicsStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__kgraphicsStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePostUnload; +} // End __nvoc_init_funcTable_KernelGraphics_1 with approximately 42 basic block(s). - pThis->__nvoc_base_IntrService.__intrservClearInterrupt__ = &__nvoc_thunk_KernelGraphics_intrservClearInterrupt; - - pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_thunk_KernelGraphics_intrservServiceInterrupt; - - pThis->__kgraphicsStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_kgraphicsStatePreLoad; - - pThis->__kgraphicsStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_kgraphicsStatePostUnload; - - pThis->__kgraphicsStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kgraphicsStateInitUnlocked; - - pThis->__kgraphicsInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kgraphicsInitMissing; - - pThis->__kgraphicsStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kgraphicsStatePreInitLocked; - - pThis->__kgraphicsStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kgraphicsStatePreInitUnlocked; -} +// Initialize vtable(s) for 24 virtual method(s). void __nvoc_init_funcTable_KernelGraphics(KernelGraphics *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 24 per-object function pointer(s). __nvoc_init_funcTable_KernelGraphics_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_graphics_nvoc.h b/src/nvidia/generated/g_kernel_graphics_nvoc.h index bdd97b4ebe..fb39c59db0 100644 --- a/src/nvidia/generated/g_kernel_graphics_nvoc.h +++ b/src/nvidia/generated/g_kernel_graphics_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_GRAPHICS_NVOC_H_ #define _G_KERNEL_GRAPHICS_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_graphics_nvoc.h" #ifndef _KERNEL_GRAPHICS_H_ @@ -155,41 +163,51 @@ typedef struct KGRAPHICS_FECS_TRACE_INFO KGRAPHICS_FECS_TRACE_INFO; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelGraphics { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; struct IntrService __nvoc_base_IntrService; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct IntrService *__nvoc_pbase_IntrService; - struct KernelGraphics *__nvoc_pbase_KernelGraphics; - NV_STATUS (*__kgraphicsConstructEngine__)(OBJGPU *, struct KernelGraphics *, ENGDESCRIPTOR); - NV_STATUS (*__kgraphicsStateInitLocked__)(OBJGPU *, struct KernelGraphics *); - NV_STATUS (*__kgraphicsStateLoad__)(OBJGPU *, struct KernelGraphics *, NvU32); - NV_STATUS (*__kgraphicsStatePreUnload__)(OBJGPU *, struct KernelGraphics *, NvU32); - NV_STATUS (*__kgraphicsStateUnload__)(OBJGPU *, struct KernelGraphics *, NvU32); - void (*__kgraphicsStateDestroy__)(OBJGPU *, struct KernelGraphics *); - NvBool (*__kgraphicsIsPresent__)(OBJGPU *, struct KernelGraphics *); - NV_STATUS (*__kgraphicsStatePostLoad__)(OBJGPU *, struct KernelGraphics *, NvU32); - void (*__kgraphicsRegisterIntrService__)(OBJGPU *, struct KernelGraphics *, IntrServiceRecord *); - NV_STATUS (*__kgraphicsServiceNotificationInterrupt__)(OBJGPU *, struct KernelGraphics *, IntrServiceServiceNotificationInterruptArguments *); - NV_STATUS (*__kgraphicsLoadStaticInfo__)(OBJGPU *, struct KernelGraphics *, NvU32); - NvBool (*__kgraphicsClearInterrupt__)(OBJGPU *, struct KernelGraphics *, IntrServiceClearInterruptArguments *); - NvU32 (*__kgraphicsServiceInterrupt__)(OBJGPU *, struct KernelGraphics *, IntrServiceServiceInterruptArguments *); - NvBool (*__kgraphicsIsUnrestrictedAccessMapSupported__)(OBJGPU *, struct KernelGraphics *); - NvU32 (*__kgraphicsGetFecsTraceRdOffset__)(OBJGPU *, struct KernelGraphics *); - void (*__kgraphicsSetFecsTraceRdOffset__)(OBJGPU *, struct KernelGraphics *, NvU32); - void (*__kgraphicsSetFecsTraceWrOffset__)(OBJGPU *, struct KernelGraphics *, NvU32); - void (*__kgraphicsSetFecsTraceHwEnable__)(OBJGPU *, struct KernelGraphics *, NvBool); - NV_STATUS (*__kgraphicsStatePreLoad__)(POBJGPU, struct KernelGraphics *, NvU32); - NV_STATUS (*__kgraphicsStatePostUnload__)(POBJGPU, struct KernelGraphics *, NvU32); - NV_STATUS (*__kgraphicsStateInitUnlocked__)(POBJGPU, struct KernelGraphics *); - void (*__kgraphicsInitMissing__)(POBJGPU, struct KernelGraphics *); - NV_STATUS (*__kgraphicsStatePreInitLocked__)(POBJGPU, struct KernelGraphics *); - NV_STATUS (*__kgraphicsStatePreInitUnlocked__)(POBJGPU, struct KernelGraphics *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct IntrService *__nvoc_pbase_IntrService; // intrserv super + struct KernelGraphics *__nvoc_pbase_KernelGraphics; // kgraphics + + // Vtable with 24 per-object function pointers + NV_STATUS (*__kgraphicsConstructEngine__)(OBJGPU *, struct KernelGraphics * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgraphicsStateInitLocked__)(OBJGPU *, struct KernelGraphics * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgraphicsStateLoad__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgraphicsStatePreUnload__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgraphicsStateUnload__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual override (engstate) base (engstate) + void (*__kgraphicsStateDestroy__)(OBJGPU *, struct KernelGraphics * /*this*/); // virtual override (engstate) base (engstate) + NvBool (*__kgraphicsIsPresent__)(OBJGPU *, struct KernelGraphics * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgraphicsStatePostLoad__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual override (engstate) base (engstate) + void (*__kgraphicsRegisterIntrService__)(OBJGPU *, struct KernelGraphics * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) + NV_STATUS (*__kgraphicsServiceNotificationInterrupt__)(OBJGPU *, struct KernelGraphics * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual override (intrserv) base (intrserv) + NV_STATUS (*__kgraphicsLoadStaticInfo__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // halified (2 hals) + NvBool (*__kgraphicsClearInterrupt__)(OBJGPU *, struct KernelGraphics * /*this*/, IntrServiceClearInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) + NvU32 (*__kgraphicsServiceInterrupt__)(OBJGPU *, struct KernelGraphics * /*this*/, IntrServiceServiceInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) + NvBool (*__kgraphicsIsUnrestrictedAccessMapSupported__)(OBJGPU *, struct KernelGraphics * /*this*/); // halified (2 hals) + NvU32 (*__kgraphicsGetFecsTraceRdOffset__)(OBJGPU *, struct KernelGraphics * /*this*/); // halified (2 hals) + void (*__kgraphicsSetFecsTraceRdOffset__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // halified (2 hals) + void (*__kgraphicsSetFecsTraceWrOffset__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // halified (2 hals) + void (*__kgraphicsSetFecsTraceHwEnable__)(OBJGPU *, struct KernelGraphics * /*this*/, NvBool); // halified (2 hals) + void (*__kgraphicsInitMissing__)(POBJGPU, struct KernelGraphics * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgraphicsStatePreInitLocked__)(POBJGPU, struct KernelGraphics * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgraphicsStatePreInitUnlocked__)(POBJGPU, struct KernelGraphics * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgraphicsStateInitUnlocked__)(POBJGPU, struct KernelGraphics * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgraphicsStatePreLoad__)(POBJGPU, struct KernelGraphics * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgraphicsStatePostUnload__)(POBJGPU, struct KernelGraphics * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + + // Data members NvBool PRIVATE_FIELD(bCtxswLoggingSupported); NvBool PRIVATE_FIELD(bCtxswLoggingEnabled); - NvBool PRIVATE_FIELD(bUsePriFecsMailbox); NvBool PRIVATE_FIELD(bIntrDrivenCtxswLoggingEnabled); NvBool PRIVATE_FIELD(bBottomHalfCtxswLoggingEnabled); NvBool PRIVATE_FIELD(bDeferContextInit); @@ -208,41 +226,51 @@ struct KernelGraphics { GR_BUFFER_ATTR PRIVATE_FIELD(ctxAttr)[10]; }; + struct KernelGraphics_PRIVATE { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; struct IntrService __nvoc_base_IntrService; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct IntrService *__nvoc_pbase_IntrService; - struct KernelGraphics *__nvoc_pbase_KernelGraphics; - NV_STATUS (*__kgraphicsConstructEngine__)(OBJGPU *, struct KernelGraphics *, ENGDESCRIPTOR); - NV_STATUS (*__kgraphicsStateInitLocked__)(OBJGPU *, struct KernelGraphics *); - NV_STATUS (*__kgraphicsStateLoad__)(OBJGPU *, struct KernelGraphics *, NvU32); - NV_STATUS (*__kgraphicsStatePreUnload__)(OBJGPU *, struct KernelGraphics *, NvU32); - NV_STATUS (*__kgraphicsStateUnload__)(OBJGPU *, struct KernelGraphics *, NvU32); - void (*__kgraphicsStateDestroy__)(OBJGPU *, struct KernelGraphics *); - NvBool (*__kgraphicsIsPresent__)(OBJGPU *, struct KernelGraphics *); - NV_STATUS (*__kgraphicsStatePostLoad__)(OBJGPU *, struct KernelGraphics *, NvU32); - void (*__kgraphicsRegisterIntrService__)(OBJGPU *, struct KernelGraphics *, IntrServiceRecord *); - NV_STATUS (*__kgraphicsServiceNotificationInterrupt__)(OBJGPU *, struct KernelGraphics *, IntrServiceServiceNotificationInterruptArguments *); - NV_STATUS (*__kgraphicsLoadStaticInfo__)(OBJGPU *, struct KernelGraphics *, NvU32); - NvBool (*__kgraphicsClearInterrupt__)(OBJGPU *, struct KernelGraphics *, IntrServiceClearInterruptArguments *); - NvU32 (*__kgraphicsServiceInterrupt__)(OBJGPU *, struct KernelGraphics *, IntrServiceServiceInterruptArguments *); - NvBool (*__kgraphicsIsUnrestrictedAccessMapSupported__)(OBJGPU *, struct KernelGraphics *); - NvU32 (*__kgraphicsGetFecsTraceRdOffset__)(OBJGPU *, struct KernelGraphics *); - void (*__kgraphicsSetFecsTraceRdOffset__)(OBJGPU *, struct KernelGraphics *, NvU32); - void (*__kgraphicsSetFecsTraceWrOffset__)(OBJGPU *, struct KernelGraphics *, NvU32); - void (*__kgraphicsSetFecsTraceHwEnable__)(OBJGPU *, struct KernelGraphics *, NvBool); - NV_STATUS (*__kgraphicsStatePreLoad__)(POBJGPU, struct KernelGraphics *, NvU32); - NV_STATUS (*__kgraphicsStatePostUnload__)(POBJGPU, struct KernelGraphics *, NvU32); - NV_STATUS (*__kgraphicsStateInitUnlocked__)(POBJGPU, struct KernelGraphics *); - void (*__kgraphicsInitMissing__)(POBJGPU, struct KernelGraphics *); - NV_STATUS (*__kgraphicsStatePreInitLocked__)(POBJGPU, struct KernelGraphics *); - NV_STATUS (*__kgraphicsStatePreInitUnlocked__)(POBJGPU, struct KernelGraphics *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct IntrService *__nvoc_pbase_IntrService; // intrserv super + struct KernelGraphics *__nvoc_pbase_KernelGraphics; // kgraphics + + // Vtable with 24 per-object function pointers + NV_STATUS (*__kgraphicsConstructEngine__)(OBJGPU *, struct KernelGraphics * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgraphicsStateInitLocked__)(OBJGPU *, struct KernelGraphics * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgraphicsStateLoad__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgraphicsStatePreUnload__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgraphicsStateUnload__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual override (engstate) base (engstate) + void (*__kgraphicsStateDestroy__)(OBJGPU *, struct KernelGraphics * /*this*/); // virtual override (engstate) base (engstate) + NvBool (*__kgraphicsIsPresent__)(OBJGPU *, struct KernelGraphics * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgraphicsStatePostLoad__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual override (engstate) base (engstate) + void (*__kgraphicsRegisterIntrService__)(OBJGPU *, struct KernelGraphics * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) + NV_STATUS (*__kgraphicsServiceNotificationInterrupt__)(OBJGPU *, struct KernelGraphics * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual override (intrserv) base (intrserv) + NV_STATUS (*__kgraphicsLoadStaticInfo__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // halified (2 hals) + NvBool (*__kgraphicsClearInterrupt__)(OBJGPU *, struct KernelGraphics * /*this*/, IntrServiceClearInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) + NvU32 (*__kgraphicsServiceInterrupt__)(OBJGPU *, struct KernelGraphics * /*this*/, IntrServiceServiceInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) + NvBool (*__kgraphicsIsUnrestrictedAccessMapSupported__)(OBJGPU *, struct KernelGraphics * /*this*/); // halified (2 hals) + NvU32 (*__kgraphicsGetFecsTraceRdOffset__)(OBJGPU *, struct KernelGraphics * /*this*/); // halified (2 hals) + void (*__kgraphicsSetFecsTraceRdOffset__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // halified (2 hals) + void (*__kgraphicsSetFecsTraceWrOffset__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // halified (2 hals) + void (*__kgraphicsSetFecsTraceHwEnable__)(OBJGPU *, struct KernelGraphics * /*this*/, NvBool); // halified (2 hals) + void (*__kgraphicsInitMissing__)(POBJGPU, struct KernelGraphics * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgraphicsStatePreInitLocked__)(POBJGPU, struct KernelGraphics * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgraphicsStatePreInitUnlocked__)(POBJGPU, struct KernelGraphics * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgraphicsStateInitUnlocked__)(POBJGPU, struct KernelGraphics * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgraphicsStatePreLoad__)(POBJGPU, struct KernelGraphics * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgraphicsStatePostUnload__)(POBJGPU, struct KernelGraphics * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + + // Data members NvBool bCtxswLoggingSupported; NvBool bCtxswLoggingEnabled; - NvBool bUsePriFecsMailbox; NvBool bIntrDrivenCtxswLoggingEnabled; NvBool bBottomHalfCtxswLoggingEnabled; NvBool bDeferContextInit; @@ -270,6 +298,7 @@ typedef struct KernelGraphics KernelGraphics; #define __nvoc_class_id_KernelGraphics 0xea3fa9 #endif /* __nvoc_class_id_KernelGraphics */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGraphics; #define __staticCast_KernelGraphics(pThis) \ @@ -282,6 +311,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGraphics; ((KernelGraphics*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelGraphics))) #endif //__nvoc_kernel_graphics_h_disabled +// Property macros #define PDB_PROP_KGRAPHICS_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_KGRAPHICS_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -291,277 +321,305 @@ NV_STATUS __nvoc_objCreate_KernelGraphics(KernelGraphics**, Dynamic*, NvU32); #define __objCreate_KernelGraphics(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelGraphics((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define kgraphicsConstructEngine(arg0, arg1, arg2) kgraphicsConstructEngine_DISPATCH(arg0, arg1, arg2) -#define kgraphicsStateInitLocked(arg0, arg1) kgraphicsStateInitLocked_DISPATCH(arg0, arg1) -#define kgraphicsStateLoad(arg0, arg1, flags) kgraphicsStateLoad_DISPATCH(arg0, arg1, flags) -#define kgraphicsStatePreUnload(pGpu, arg0, flags) kgraphicsStatePreUnload_DISPATCH(pGpu, arg0, flags) -#define kgraphicsStateUnload(arg0, arg1, flags) kgraphicsStateUnload_DISPATCH(arg0, arg1, flags) -#define kgraphicsStateDestroy(arg0, arg1) kgraphicsStateDestroy_DISPATCH(arg0, arg1) -#define kgraphicsIsPresent(arg0, arg1) kgraphicsIsPresent_DISPATCH(arg0, arg1) -#define kgraphicsStatePostLoad(arg0, arg1, flags) kgraphicsStatePostLoad_DISPATCH(arg0, arg1, flags) -#define kgraphicsRegisterIntrService(arg0, arg1, arg2) kgraphicsRegisterIntrService_DISPATCH(arg0, arg1, arg2) -#define kgraphicsServiceNotificationInterrupt(arg0, arg1, arg2) kgraphicsServiceNotificationInterrupt_DISPATCH(arg0, arg1, arg2) -#define kgraphicsLoadStaticInfo(arg0, arg1, swizzId) kgraphicsLoadStaticInfo_DISPATCH(arg0, arg1, swizzId) -#define kgraphicsLoadStaticInfo_HAL(arg0, arg1, swizzId) kgraphicsLoadStaticInfo_DISPATCH(arg0, arg1, swizzId) -#define kgraphicsClearInterrupt(arg0, arg1, arg2) kgraphicsClearInterrupt_DISPATCH(arg0, arg1, arg2) -#define kgraphicsClearInterrupt_HAL(arg0, arg1, arg2) kgraphicsClearInterrupt_DISPATCH(arg0, arg1, arg2) -#define kgraphicsServiceInterrupt(arg0, arg1, arg2) kgraphicsServiceInterrupt_DISPATCH(arg0, arg1, arg2) -#define kgraphicsServiceInterrupt_HAL(arg0, arg1, arg2) kgraphicsServiceInterrupt_DISPATCH(arg0, arg1, arg2) -#define kgraphicsIsUnrestrictedAccessMapSupported(arg0, arg1) kgraphicsIsUnrestrictedAccessMapSupported_DISPATCH(arg0, arg1) -#define kgraphicsIsUnrestrictedAccessMapSupported_HAL(arg0, arg1) kgraphicsIsUnrestrictedAccessMapSupported_DISPATCH(arg0, arg1) -#define kgraphicsGetFecsTraceRdOffset(arg0, arg1) kgraphicsGetFecsTraceRdOffset_DISPATCH(arg0, arg1) -#define kgraphicsGetFecsTraceRdOffset_HAL(arg0, arg1) kgraphicsGetFecsTraceRdOffset_DISPATCH(arg0, arg1) -#define kgraphicsSetFecsTraceRdOffset(arg0, arg1, rdOffset) kgraphicsSetFecsTraceRdOffset_DISPATCH(arg0, arg1, rdOffset) -#define kgraphicsSetFecsTraceRdOffset_HAL(arg0, arg1, rdOffset) kgraphicsSetFecsTraceRdOffset_DISPATCH(arg0, arg1, rdOffset) -#define kgraphicsSetFecsTraceWrOffset(arg0, arg1, wrOffset) kgraphicsSetFecsTraceWrOffset_DISPATCH(arg0, arg1, wrOffset) -#define kgraphicsSetFecsTraceWrOffset_HAL(arg0, arg1, wrOffset) kgraphicsSetFecsTraceWrOffset_DISPATCH(arg0, arg1, wrOffset) -#define kgraphicsSetFecsTraceHwEnable(arg0, arg1, bEnable) kgraphicsSetFecsTraceHwEnable_DISPATCH(arg0, arg1, bEnable) -#define kgraphicsSetFecsTraceHwEnable_HAL(arg0, arg1, bEnable) kgraphicsSetFecsTraceHwEnable_DISPATCH(arg0, arg1, bEnable) -#define kgraphicsStatePreLoad(pGpu, pEngstate, arg0) kgraphicsStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kgraphicsStatePostUnload(pGpu, pEngstate, arg0) kgraphicsStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kgraphicsStateInitUnlocked(pGpu, pEngstate) kgraphicsStateInitUnlocked_DISPATCH(pGpu, pEngstate) + +// Wrapper macros +#define kgraphicsConstructEngine_FNPTR(arg_this) arg_this->__kgraphicsConstructEngine__ +#define kgraphicsConstructEngine(arg1, arg_this, arg3) kgraphicsConstructEngine_DISPATCH(arg1, arg_this, arg3) +#define kgraphicsStateInitLocked_FNPTR(arg_this) arg_this->__kgraphicsStateInitLocked__ +#define kgraphicsStateInitLocked(arg1, arg_this) kgraphicsStateInitLocked_DISPATCH(arg1, arg_this) +#define kgraphicsStateLoad_FNPTR(arg_this) arg_this->__kgraphicsStateLoad__ +#define kgraphicsStateLoad(arg1, arg_this, flags) kgraphicsStateLoad_DISPATCH(arg1, arg_this, flags) +#define kgraphicsStatePreUnload_FNPTR(arg_this) arg_this->__kgraphicsStatePreUnload__ +#define kgraphicsStatePreUnload(pGpu, arg_this, flags) kgraphicsStatePreUnload_DISPATCH(pGpu, arg_this, flags) +#define kgraphicsStateUnload_FNPTR(arg_this) arg_this->__kgraphicsStateUnload__ +#define kgraphicsStateUnload(arg1, arg_this, flags) kgraphicsStateUnload_DISPATCH(arg1, arg_this, flags) +#define kgraphicsStateDestroy_FNPTR(arg_this) arg_this->__kgraphicsStateDestroy__ +#define kgraphicsStateDestroy(arg1, arg_this) kgraphicsStateDestroy_DISPATCH(arg1, arg_this) +#define kgraphicsIsPresent_FNPTR(arg_this) arg_this->__kgraphicsIsPresent__ +#define kgraphicsIsPresent(arg1, arg_this) kgraphicsIsPresent_DISPATCH(arg1, arg_this) +#define kgraphicsStatePostLoad_FNPTR(arg_this) arg_this->__kgraphicsStatePostLoad__ +#define kgraphicsStatePostLoad(arg1, arg_this, flags) kgraphicsStatePostLoad_DISPATCH(arg1, arg_this, flags) +#define kgraphicsRegisterIntrService_FNPTR(arg_this) arg_this->__kgraphicsRegisterIntrService__ +#define kgraphicsRegisterIntrService(arg1, arg_this, arg3) kgraphicsRegisterIntrService_DISPATCH(arg1, arg_this, arg3) +#define kgraphicsServiceNotificationInterrupt_FNPTR(arg_this) arg_this->__kgraphicsServiceNotificationInterrupt__ +#define kgraphicsServiceNotificationInterrupt(arg1, arg_this, arg3) kgraphicsServiceNotificationInterrupt_DISPATCH(arg1, arg_this, arg3) +#define kgraphicsLoadStaticInfo_FNPTR(arg_this) arg_this->__kgraphicsLoadStaticInfo__ +#define kgraphicsLoadStaticInfo(arg1, arg_this, swizzId) kgraphicsLoadStaticInfo_DISPATCH(arg1, arg_this, swizzId) +#define kgraphicsLoadStaticInfo_HAL(arg1, arg_this, swizzId) kgraphicsLoadStaticInfo_DISPATCH(arg1, arg_this, swizzId) +#define kgraphicsClearInterrupt_FNPTR(arg_this) arg_this->__kgraphicsClearInterrupt__ +#define kgraphicsClearInterrupt(arg1, arg_this, arg3) kgraphicsClearInterrupt_DISPATCH(arg1, arg_this, arg3) +#define kgraphicsClearInterrupt_HAL(arg1, arg_this, arg3) kgraphicsClearInterrupt_DISPATCH(arg1, arg_this, arg3) +#define kgraphicsServiceInterrupt_FNPTR(arg_this) arg_this->__kgraphicsServiceInterrupt__ +#define kgraphicsServiceInterrupt(arg1, arg_this, arg3) kgraphicsServiceInterrupt_DISPATCH(arg1, arg_this, arg3) +#define kgraphicsServiceInterrupt_HAL(arg1, arg_this, arg3) kgraphicsServiceInterrupt_DISPATCH(arg1, arg_this, arg3) +#define kgraphicsIsUnrestrictedAccessMapSupported_FNPTR(arg_this) arg_this->__kgraphicsIsUnrestrictedAccessMapSupported__ +#define kgraphicsIsUnrestrictedAccessMapSupported(arg1, arg_this) kgraphicsIsUnrestrictedAccessMapSupported_DISPATCH(arg1, arg_this) +#define kgraphicsIsUnrestrictedAccessMapSupported_HAL(arg1, arg_this) kgraphicsIsUnrestrictedAccessMapSupported_DISPATCH(arg1, arg_this) +#define kgraphicsGetFecsTraceRdOffset_FNPTR(arg_this) arg_this->__kgraphicsGetFecsTraceRdOffset__ +#define kgraphicsGetFecsTraceRdOffset(arg1, arg_this) kgraphicsGetFecsTraceRdOffset_DISPATCH(arg1, arg_this) +#define kgraphicsGetFecsTraceRdOffset_HAL(arg1, arg_this) kgraphicsGetFecsTraceRdOffset_DISPATCH(arg1, arg_this) +#define kgraphicsSetFecsTraceRdOffset_FNPTR(arg_this) arg_this->__kgraphicsSetFecsTraceRdOffset__ +#define kgraphicsSetFecsTraceRdOffset(arg1, arg_this, rdOffset) kgraphicsSetFecsTraceRdOffset_DISPATCH(arg1, arg_this, rdOffset) +#define kgraphicsSetFecsTraceRdOffset_HAL(arg1, arg_this, rdOffset) kgraphicsSetFecsTraceRdOffset_DISPATCH(arg1, arg_this, rdOffset) +#define kgraphicsSetFecsTraceWrOffset_FNPTR(arg_this) arg_this->__kgraphicsSetFecsTraceWrOffset__ +#define kgraphicsSetFecsTraceWrOffset(arg1, arg_this, wrOffset) kgraphicsSetFecsTraceWrOffset_DISPATCH(arg1, arg_this, wrOffset) +#define kgraphicsSetFecsTraceWrOffset_HAL(arg1, arg_this, wrOffset) kgraphicsSetFecsTraceWrOffset_DISPATCH(arg1, arg_this, wrOffset) +#define kgraphicsSetFecsTraceHwEnable_FNPTR(arg_this) arg_this->__kgraphicsSetFecsTraceHwEnable__ +#define kgraphicsSetFecsTraceHwEnable(arg1, arg_this, bEnable) kgraphicsSetFecsTraceHwEnable_DISPATCH(arg1, arg_this, bEnable) +#define kgraphicsSetFecsTraceHwEnable_HAL(arg1, arg_this, bEnable) kgraphicsSetFecsTraceHwEnable_DISPATCH(arg1, arg_this, bEnable) +#define kgraphicsInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define kgraphicsInitMissing(pGpu, pEngstate) kgraphicsInitMissing_DISPATCH(pGpu, pEngstate) +#define kgraphicsStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define kgraphicsStatePreInitLocked(pGpu, pEngstate) kgraphicsStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define kgraphicsStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define kgraphicsStatePreInitUnlocked(pGpu, pEngstate) kgraphicsStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -static inline NvBool kgraphicsShouldForceMainCtxContiguity_cbe027(OBJGPU *arg0, struct KernelGraphics *arg1) { +#define kgraphicsStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kgraphicsStateInitUnlocked(pGpu, pEngstate) kgraphicsStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kgraphicsStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kgraphicsStatePreLoad(pGpu, pEngstate, arg3) kgraphicsStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kgraphicsStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kgraphicsStatePostUnload(pGpu, pEngstate, arg3) kgraphicsStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) + +// Dispatch functions +static inline NV_STATUS kgraphicsConstructEngine_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this, ENGDESCRIPTOR arg3) { + return arg_this->__kgraphicsConstructEngine__(arg1, arg_this, arg3); +} + +static inline NV_STATUS kgraphicsStateInitLocked_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this) { + return arg_this->__kgraphicsStateInitLocked__(arg1, arg_this); +} + +static inline NV_STATUS kgraphicsStateLoad_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this, NvU32 flags) { + return arg_this->__kgraphicsStateLoad__(arg1, arg_this, flags); +} + +static inline NV_STATUS kgraphicsStatePreUnload_DISPATCH(OBJGPU *pGpu, struct KernelGraphics *arg_this, NvU32 flags) { + return arg_this->__kgraphicsStatePreUnload__(pGpu, arg_this, flags); +} + +static inline NV_STATUS kgraphicsStateUnload_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this, NvU32 flags) { + return arg_this->__kgraphicsStateUnload__(arg1, arg_this, flags); +} + +static inline void kgraphicsStateDestroy_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this) { + arg_this->__kgraphicsStateDestroy__(arg1, arg_this); +} + +static inline NvBool kgraphicsIsPresent_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this) { + return arg_this->__kgraphicsIsPresent__(arg1, arg_this); +} + +static inline NV_STATUS kgraphicsStatePostLoad_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this, NvU32 flags) { + return arg_this->__kgraphicsStatePostLoad__(arg1, arg_this, flags); +} + +static inline void kgraphicsRegisterIntrService_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this, IntrServiceRecord arg3[175]) { + arg_this->__kgraphicsRegisterIntrService__(arg1, arg_this, arg3); +} + +static inline NV_STATUS kgraphicsServiceNotificationInterrupt_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3) { + return arg_this->__kgraphicsServiceNotificationInterrupt__(arg1, arg_this, arg3); +} + +static inline NV_STATUS kgraphicsLoadStaticInfo_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this, NvU32 swizzId) { + return arg_this->__kgraphicsLoadStaticInfo__(arg1, arg_this, swizzId); +} + +static inline NvBool kgraphicsClearInterrupt_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this, IntrServiceClearInterruptArguments *arg3) { + return arg_this->__kgraphicsClearInterrupt__(arg1, arg_this, arg3); +} + +static inline NvU32 kgraphicsServiceInterrupt_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this, IntrServiceServiceInterruptArguments *arg3) { + return arg_this->__kgraphicsServiceInterrupt__(arg1, arg_this, arg3); +} + +static inline NvBool kgraphicsIsUnrestrictedAccessMapSupported_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this) { + return arg_this->__kgraphicsIsUnrestrictedAccessMapSupported__(arg1, arg_this); +} + +static inline NvU32 kgraphicsGetFecsTraceRdOffset_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this) { + return arg_this->__kgraphicsGetFecsTraceRdOffset__(arg1, arg_this); +} + +static inline void kgraphicsSetFecsTraceRdOffset_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this, NvU32 rdOffset) { + arg_this->__kgraphicsSetFecsTraceRdOffset__(arg1, arg_this, rdOffset); +} + +static inline void kgraphicsSetFecsTraceWrOffset_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this, NvU32 wrOffset) { + arg_this->__kgraphicsSetFecsTraceWrOffset__(arg1, arg_this, wrOffset); +} + +static inline void kgraphicsSetFecsTraceHwEnable_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this, NvBool bEnable) { + arg_this->__kgraphicsSetFecsTraceHwEnable__(arg1, arg_this, bEnable); +} + +static inline void kgraphicsInitMissing_DISPATCH(POBJGPU pGpu, struct KernelGraphics *pEngstate) { + pEngstate->__kgraphicsInitMissing__(pGpu, pEngstate); +} + +static inline NV_STATUS kgraphicsStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelGraphics *pEngstate) { + return pEngstate->__kgraphicsStatePreInitLocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kgraphicsStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelGraphics *pEngstate) { + return pEngstate->__kgraphicsStatePreInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kgraphicsStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelGraphics *pEngstate) { + return pEngstate->__kgraphicsStateInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kgraphicsStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelGraphics *pEngstate, NvU32 arg3) { + return pEngstate->__kgraphicsStatePreLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS kgraphicsStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelGraphics *pEngstate, NvU32 arg3) { + return pEngstate->__kgraphicsStatePostUnload__(pGpu, pEngstate, arg3); +} + +static inline NvBool kgraphicsShouldForceMainCtxContiguity_cbe027(OBJGPU *arg1, struct KernelGraphics *arg2) { return ((NvBool)(0 == 0)); } #ifdef __nvoc_kernel_graphics_h_disabled -static inline NvBool kgraphicsShouldForceMainCtxContiguity(OBJGPU *arg0, struct KernelGraphics *arg1) { +static inline NvBool kgraphicsShouldForceMainCtxContiguity(OBJGPU *arg1, struct KernelGraphics *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsShouldForceMainCtxContiguity(arg0, arg1) kgraphicsShouldForceMainCtxContiguity_cbe027(arg0, arg1) +#define kgraphicsShouldForceMainCtxContiguity(arg1, arg2) kgraphicsShouldForceMainCtxContiguity_cbe027(arg1, arg2) #endif //__nvoc_kernel_graphics_h_disabled -#define kgraphicsShouldForceMainCtxContiguity_HAL(arg0, arg1) kgraphicsShouldForceMainCtxContiguity(arg0, arg1) +#define kgraphicsShouldForceMainCtxContiguity_HAL(arg1, arg2) kgraphicsShouldForceMainCtxContiguity(arg1, arg2) -NV_STATUS kgraphicsAllocKgraphicsBuffers_KERNEL(OBJGPU *arg0, struct KernelGraphics *arg1, struct KernelGraphicsContext *arg2, struct KernelChannel *arg3); +NV_STATUS kgraphicsAllocKgraphicsBuffers_KERNEL(OBJGPU *arg1, struct KernelGraphics *arg2, struct KernelGraphicsContext *arg3, struct KernelChannel *arg4); #ifdef __nvoc_kernel_graphics_h_disabled -static inline NV_STATUS kgraphicsAllocKgraphicsBuffers(OBJGPU *arg0, struct KernelGraphics *arg1, struct KernelGraphicsContext *arg2, struct KernelChannel *arg3) { +static inline NV_STATUS kgraphicsAllocKgraphicsBuffers(OBJGPU *arg1, struct KernelGraphics *arg2, struct KernelGraphicsContext *arg3, struct KernelChannel *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsAllocKgraphicsBuffers(arg0, arg1, arg2, arg3) kgraphicsAllocKgraphicsBuffers_KERNEL(arg0, arg1, arg2, arg3) +#define kgraphicsAllocKgraphicsBuffers(arg1, arg2, arg3, arg4) kgraphicsAllocKgraphicsBuffers_KERNEL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_graphics_h_disabled -#define kgraphicsAllocKgraphicsBuffers_HAL(arg0, arg1, arg2, arg3) kgraphicsAllocKgraphicsBuffers(arg0, arg1, arg2, arg3) +#define kgraphicsAllocKgraphicsBuffers_HAL(arg1, arg2, arg3, arg4) kgraphicsAllocKgraphicsBuffers(arg1, arg2, arg3, arg4) -NV_STATUS kgraphicsAllocGrGlobalCtxBuffers_TU102(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 gfid, struct KernelGraphicsContext *arg2); +NV_STATUS kgraphicsAllocGrGlobalCtxBuffers_TU102(OBJGPU *arg1, struct KernelGraphics *arg2, NvU32 gfid, struct KernelGraphicsContext *arg4); #ifdef __nvoc_kernel_graphics_h_disabled -static inline NV_STATUS kgraphicsAllocGrGlobalCtxBuffers(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 gfid, struct KernelGraphicsContext *arg2) { +static inline NV_STATUS kgraphicsAllocGrGlobalCtxBuffers(OBJGPU *arg1, struct KernelGraphics *arg2, NvU32 gfid, struct KernelGraphicsContext *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsAllocGrGlobalCtxBuffers(arg0, arg1, gfid, arg2) kgraphicsAllocGrGlobalCtxBuffers_TU102(arg0, arg1, gfid, arg2) +#define kgraphicsAllocGrGlobalCtxBuffers(arg1, arg2, gfid, arg4) kgraphicsAllocGrGlobalCtxBuffers_TU102(arg1, arg2, gfid, arg4) #endif //__nvoc_kernel_graphics_h_disabled -#define kgraphicsAllocGrGlobalCtxBuffers_HAL(arg0, arg1, gfid, arg2) kgraphicsAllocGrGlobalCtxBuffers(arg0, arg1, gfid, arg2) +#define kgraphicsAllocGrGlobalCtxBuffers_HAL(arg1, arg2, gfid, arg4) kgraphicsAllocGrGlobalCtxBuffers(arg1, arg2, gfid, arg4) -NV_STATUS kgraphicsAllocGlobalCtxBuffers_GP100(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 gfid); +NV_STATUS kgraphicsAllocGlobalCtxBuffers_GP100(OBJGPU *arg1, struct KernelGraphics *arg2, NvU32 gfid); #ifdef __nvoc_kernel_graphics_h_disabled -static inline NV_STATUS kgraphicsAllocGlobalCtxBuffers(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 gfid) { +static inline NV_STATUS kgraphicsAllocGlobalCtxBuffers(OBJGPU *arg1, struct KernelGraphics *arg2, NvU32 gfid) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsAllocGlobalCtxBuffers(arg0, arg1, gfid) kgraphicsAllocGlobalCtxBuffers_GP100(arg0, arg1, gfid) +#define kgraphicsAllocGlobalCtxBuffers(arg1, arg2, gfid) kgraphicsAllocGlobalCtxBuffers_GP100(arg1, arg2, gfid) #endif //__nvoc_kernel_graphics_h_disabled -#define kgraphicsAllocGlobalCtxBuffers_HAL(arg0, arg1, gfid) kgraphicsAllocGlobalCtxBuffers(arg0, arg1, gfid) +#define kgraphicsAllocGlobalCtxBuffers_HAL(arg1, arg2, gfid) kgraphicsAllocGlobalCtxBuffers(arg1, arg2, gfid) -static inline void kgraphicsNonstallIntrCheckAndClear_b3696a(OBJGPU *arg0, struct KernelGraphics *arg1, struct THREAD_STATE_NODE *arg2) { +static inline void kgraphicsNonstallIntrCheckAndClear_b3696a(OBJGPU *arg1, struct KernelGraphics *arg2, struct THREAD_STATE_NODE *arg3) { return; } #ifdef __nvoc_kernel_graphics_h_disabled -static inline void kgraphicsNonstallIntrCheckAndClear(OBJGPU *arg0, struct KernelGraphics *arg1, struct THREAD_STATE_NODE *arg2) { +static inline void kgraphicsNonstallIntrCheckAndClear(OBJGPU *arg1, struct KernelGraphics *arg2, struct THREAD_STATE_NODE *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsNonstallIntrCheckAndClear(arg0, arg1, arg2) kgraphicsNonstallIntrCheckAndClear_b3696a(arg0, arg1, arg2) +#define kgraphicsNonstallIntrCheckAndClear(arg1, arg2, arg3) kgraphicsNonstallIntrCheckAndClear_b3696a(arg1, arg2, arg3) #endif //__nvoc_kernel_graphics_h_disabled -#define kgraphicsNonstallIntrCheckAndClear_HAL(arg0, arg1, arg2) kgraphicsNonstallIntrCheckAndClear(arg0, arg1, arg2) +#define kgraphicsNonstallIntrCheckAndClear_HAL(arg1, arg2, arg3) kgraphicsNonstallIntrCheckAndClear(arg1, arg2, arg3) -void kgraphicsInitFecsRegistryOverrides_GP100(OBJGPU *arg0, struct KernelGraphics *arg1); +void kgraphicsInitFecsRegistryOverrides_GP100(OBJGPU *arg1, struct KernelGraphics *arg2); #ifdef __nvoc_kernel_graphics_h_disabled -static inline void kgraphicsInitFecsRegistryOverrides(OBJGPU *arg0, struct KernelGraphics *arg1) { +static inline void kgraphicsInitFecsRegistryOverrides(OBJGPU *arg1, struct KernelGraphics *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsInitFecsRegistryOverrides(arg0, arg1) kgraphicsInitFecsRegistryOverrides_GP100(arg0, arg1) +#define kgraphicsInitFecsRegistryOverrides(arg1, arg2) kgraphicsInitFecsRegistryOverrides_GP100(arg1, arg2) #endif //__nvoc_kernel_graphics_h_disabled -#define kgraphicsInitFecsRegistryOverrides_HAL(arg0, arg1) kgraphicsInitFecsRegistryOverrides(arg0, arg1) - -NV_STATUS kgraphicsConstructEngine_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1, ENGDESCRIPTOR arg2); - -static inline NV_STATUS kgraphicsConstructEngine_DISPATCH(OBJGPU *arg0, struct KernelGraphics *arg1, ENGDESCRIPTOR arg2) { - return arg1->__kgraphicsConstructEngine__(arg0, arg1, arg2); -} - -NV_STATUS kgraphicsStateInitLocked_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1); - -static inline NV_STATUS kgraphicsStateInitLocked_DISPATCH(OBJGPU *arg0, struct KernelGraphics *arg1) { - return arg1->__kgraphicsStateInitLocked__(arg0, arg1); -} - -NV_STATUS kgraphicsStateLoad_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 flags); - -static inline NV_STATUS kgraphicsStateLoad_DISPATCH(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 flags) { - return arg1->__kgraphicsStateLoad__(arg0, arg1, flags); -} - -NV_STATUS kgraphicsStatePreUnload_IMPL(OBJGPU *pGpu, struct KernelGraphics *arg0, NvU32 flags); - -static inline NV_STATUS kgraphicsStatePreUnload_DISPATCH(OBJGPU *pGpu, struct KernelGraphics *arg0, NvU32 flags) { - return arg0->__kgraphicsStatePreUnload__(pGpu, arg0, flags); -} - -NV_STATUS kgraphicsStateUnload_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 flags); - -static inline NV_STATUS kgraphicsStateUnload_DISPATCH(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 flags) { - return arg1->__kgraphicsStateUnload__(arg0, arg1, flags); -} - -void kgraphicsStateDestroy_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1); - -static inline void kgraphicsStateDestroy_DISPATCH(OBJGPU *arg0, struct KernelGraphics *arg1) { - arg1->__kgraphicsStateDestroy__(arg0, arg1); -} +#define kgraphicsInitFecsRegistryOverrides_HAL(arg1, arg2) kgraphicsInitFecsRegistryOverrides(arg1, arg2) -NvBool kgraphicsIsPresent_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1); +NV_STATUS kgraphicsConstructEngine_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2, ENGDESCRIPTOR arg3); -static inline NvBool kgraphicsIsPresent_DISPATCH(OBJGPU *arg0, struct KernelGraphics *arg1) { - return arg1->__kgraphicsIsPresent__(arg0, arg1); -} +NV_STATUS kgraphicsStateInitLocked_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2); -NV_STATUS kgraphicsStatePostLoad_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 flags); +NV_STATUS kgraphicsStateLoad_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2, NvU32 flags); -static inline NV_STATUS kgraphicsStatePostLoad_DISPATCH(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 flags) { - return arg1->__kgraphicsStatePostLoad__(arg0, arg1, flags); -} +NV_STATUS kgraphicsStatePreUnload_IMPL(OBJGPU *pGpu, struct KernelGraphics *arg2, NvU32 flags); -void kgraphicsRegisterIntrService_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1, IntrServiceRecord arg2[171]); +NV_STATUS kgraphicsStateUnload_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2, NvU32 flags); -static inline void kgraphicsRegisterIntrService_DISPATCH(OBJGPU *arg0, struct KernelGraphics *arg1, IntrServiceRecord arg2[171]) { - arg1->__kgraphicsRegisterIntrService__(arg0, arg1, arg2); -} +void kgraphicsStateDestroy_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2); -NV_STATUS kgraphicsServiceNotificationInterrupt_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1, IntrServiceServiceNotificationInterruptArguments *arg2); +NvBool kgraphicsIsPresent_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2); -static inline NV_STATUS kgraphicsServiceNotificationInterrupt_DISPATCH(OBJGPU *arg0, struct KernelGraphics *arg1, IntrServiceServiceNotificationInterruptArguments *arg2) { - return arg1->__kgraphicsServiceNotificationInterrupt__(arg0, arg1, arg2); -} +NV_STATUS kgraphicsStatePostLoad_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2, NvU32 flags); -NV_STATUS kgraphicsLoadStaticInfo_VF(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 swizzId); +void kgraphicsRegisterIntrService_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2, IntrServiceRecord arg3[175]); -NV_STATUS kgraphicsLoadStaticInfo_KERNEL(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 swizzId); +NV_STATUS kgraphicsServiceNotificationInterrupt_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2, IntrServiceServiceNotificationInterruptArguments *arg3); -static inline NV_STATUS kgraphicsLoadStaticInfo_DISPATCH(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 swizzId) { - return arg1->__kgraphicsLoadStaticInfo__(arg0, arg1, swizzId); -} +NV_STATUS kgraphicsLoadStaticInfo_VF(OBJGPU *arg1, struct KernelGraphics *arg2, NvU32 swizzId); -NvBool kgraphicsClearInterrupt_GP100(OBJGPU *arg0, struct KernelGraphics *arg1, IntrServiceClearInterruptArguments *arg2); +NV_STATUS kgraphicsLoadStaticInfo_KERNEL(OBJGPU *arg1, struct KernelGraphics *arg2, NvU32 swizzId); -static inline NvBool kgraphicsClearInterrupt_DISPATCH(OBJGPU *arg0, struct KernelGraphics *arg1, IntrServiceClearInterruptArguments *arg2) { - return arg1->__kgraphicsClearInterrupt__(arg0, arg1, arg2); -} +NvBool kgraphicsClearInterrupt_GP100(OBJGPU *arg1, struct KernelGraphics *arg2, IntrServiceClearInterruptArguments *arg3); -NvU32 kgraphicsServiceInterrupt_GP100(OBJGPU *arg0, struct KernelGraphics *arg1, IntrServiceServiceInterruptArguments *arg2); +NvU32 kgraphicsServiceInterrupt_GP100(OBJGPU *arg1, struct KernelGraphics *arg2, IntrServiceServiceInterruptArguments *arg3); -static inline NvU32 kgraphicsServiceInterrupt_DISPATCH(OBJGPU *arg0, struct KernelGraphics *arg1, IntrServiceServiceInterruptArguments *arg2) { - return arg1->__kgraphicsServiceInterrupt__(arg0, arg1, arg2); -} - -static inline NvBool kgraphicsIsUnrestrictedAccessMapSupported_491d52(OBJGPU *arg0, struct KernelGraphics *arg1) { +static inline NvBool kgraphicsIsUnrestrictedAccessMapSupported_491d52(OBJGPU *arg1, struct KernelGraphics *arg2) { return ((NvBool)(0 != 0)); } -NvBool kgraphicsIsUnrestrictedAccessMapSupported_PF(OBJGPU *arg0, struct KernelGraphics *arg1); - -static inline NvBool kgraphicsIsUnrestrictedAccessMapSupported_DISPATCH(OBJGPU *arg0, struct KernelGraphics *arg1) { - return arg1->__kgraphicsIsUnrestrictedAccessMapSupported__(arg0, arg1); -} +NvBool kgraphicsIsUnrestrictedAccessMapSupported_PF(OBJGPU *arg1, struct KernelGraphics *arg2); -static inline NvU32 kgraphicsGetFecsTraceRdOffset_474d46(OBJGPU *arg0, struct KernelGraphics *arg1) { +static inline NvU32 kgraphicsGetFecsTraceRdOffset_474d46(OBJGPU *arg1, struct KernelGraphics *arg2) { NV_ASSERT_OR_RETURN_PRECOMP(0, 0); } -NvU32 kgraphicsGetFecsTraceRdOffset_GA100(OBJGPU *arg0, struct KernelGraphics *arg1); - -static inline NvU32 kgraphicsGetFecsTraceRdOffset_DISPATCH(OBJGPU *arg0, struct KernelGraphics *arg1) { - return arg1->__kgraphicsGetFecsTraceRdOffset__(arg0, arg1); -} +NvU32 kgraphicsGetFecsTraceRdOffset_GA100(OBJGPU *arg1, struct KernelGraphics *arg2); -static inline void kgraphicsSetFecsTraceRdOffset_d44104(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 rdOffset) { +static inline void kgraphicsSetFecsTraceRdOffset_d44104(OBJGPU *arg1, struct KernelGraphics *arg2, NvU32 rdOffset) { return; } -void kgraphicsSetFecsTraceRdOffset_GA100(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 rdOffset); - -static inline void kgraphicsSetFecsTraceRdOffset_DISPATCH(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 rdOffset) { - arg1->__kgraphicsSetFecsTraceRdOffset__(arg0, arg1, rdOffset); -} +void kgraphicsSetFecsTraceRdOffset_GA100(OBJGPU *arg1, struct KernelGraphics *arg2, NvU32 rdOffset); -static inline void kgraphicsSetFecsTraceWrOffset_d44104(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 wrOffset) { +static inline void kgraphicsSetFecsTraceWrOffset_d44104(OBJGPU *arg1, struct KernelGraphics *arg2, NvU32 wrOffset) { return; } -void kgraphicsSetFecsTraceWrOffset_GA100(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 wrOffset); - -static inline void kgraphicsSetFecsTraceWrOffset_DISPATCH(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 wrOffset) { - arg1->__kgraphicsSetFecsTraceWrOffset__(arg0, arg1, wrOffset); -} +void kgraphicsSetFecsTraceWrOffset_GA100(OBJGPU *arg1, struct KernelGraphics *arg2, NvU32 wrOffset); -static inline void kgraphicsSetFecsTraceHwEnable_d44104(OBJGPU *arg0, struct KernelGraphics *arg1, NvBool bEnable) { +static inline void kgraphicsSetFecsTraceHwEnable_d44104(OBJGPU *arg1, struct KernelGraphics *arg2, NvBool bEnable) { return; } -void kgraphicsSetFecsTraceHwEnable_GA100(OBJGPU *arg0, struct KernelGraphics *arg1, NvBool bEnable); - -static inline void kgraphicsSetFecsTraceHwEnable_DISPATCH(OBJGPU *arg0, struct KernelGraphics *arg1, NvBool bEnable) { - arg1->__kgraphicsSetFecsTraceHwEnable__(arg0, arg1, bEnable); -} - -static inline NV_STATUS kgraphicsStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelGraphics *pEngstate, NvU32 arg0) { - return pEngstate->__kgraphicsStatePreLoad__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS kgraphicsStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelGraphics *pEngstate, NvU32 arg0) { - return pEngstate->__kgraphicsStatePostUnload__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS kgraphicsStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelGraphics *pEngstate) { - return pEngstate->__kgraphicsStateInitUnlocked__(pGpu, pEngstate); -} - -static inline void kgraphicsInitMissing_DISPATCH(POBJGPU pGpu, struct KernelGraphics *pEngstate) { - pEngstate->__kgraphicsInitMissing__(pGpu, pEngstate); -} - -static inline NV_STATUS kgraphicsStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelGraphics *pEngstate) { - return pEngstate->__kgraphicsStatePreInitLocked__(pGpu, pEngstate); -} - -static inline NV_STATUS kgraphicsStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelGraphics *pEngstate) { - return pEngstate->__kgraphicsStatePreInitUnlocked__(pGpu, pEngstate); -} +void kgraphicsSetFecsTraceHwEnable_GA100(OBJGPU *arg1, struct KernelGraphics *arg2, NvBool bEnable); static inline KGRAPHICS_FECS_TRACE_INFO *kgraphicsGetFecsTraceInfo(OBJGPU *pGpu, struct KernelGraphics *pKernelGraphics) { struct KernelGraphics_PRIVATE *pKernelGraphics_PRIVATE = (struct KernelGraphics_PRIVATE *)pKernelGraphics; @@ -648,199 +706,199 @@ static inline NvBool kgraphicsIsFecsRecordUcodeSeqnoSupported(OBJGPU *pGpu, stru return pKernelGraphics_PRIVATE->bFecsRecordUcodeSeqnoSupported; } -void kgraphicsDestruct_IMPL(struct KernelGraphics *arg0); +void kgraphicsDestruct_IMPL(struct KernelGraphics *arg1); -#define __nvoc_kgraphicsDestruct(arg0) kgraphicsDestruct_IMPL(arg0) -void kgraphicsInvalidateStaticInfo_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1); +#define __nvoc_kgraphicsDestruct(arg1) kgraphicsDestruct_IMPL(arg1) +void kgraphicsInvalidateStaticInfo_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2); #ifdef __nvoc_kernel_graphics_h_disabled -static inline void kgraphicsInvalidateStaticInfo(OBJGPU *arg0, struct KernelGraphics *arg1) { +static inline void kgraphicsInvalidateStaticInfo(OBJGPU *arg1, struct KernelGraphics *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsInvalidateStaticInfo(arg0, arg1) kgraphicsInvalidateStaticInfo_IMPL(arg0, arg1) +#define kgraphicsInvalidateStaticInfo(arg1, arg2) kgraphicsInvalidateStaticInfo_IMPL(arg1, arg2) #endif //__nvoc_kernel_graphics_h_disabled -const CTX_BUF_INFO *kgraphicsGetCtxBufferInfo_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1, GR_CTX_BUFFER arg2); +const CTX_BUF_INFO *kgraphicsGetCtxBufferInfo_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2, GR_CTX_BUFFER arg3); #ifdef __nvoc_kernel_graphics_h_disabled -static inline const CTX_BUF_INFO *kgraphicsGetCtxBufferInfo(OBJGPU *arg0, struct KernelGraphics *arg1, GR_CTX_BUFFER arg2) { +static inline const CTX_BUF_INFO *kgraphicsGetCtxBufferInfo(OBJGPU *arg1, struct KernelGraphics *arg2, GR_CTX_BUFFER arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); return NULL; } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsGetCtxBufferInfo(arg0, arg1, arg2) kgraphicsGetCtxBufferInfo_IMPL(arg0, arg1, arg2) +#define kgraphicsGetCtxBufferInfo(arg1, arg2, arg3) kgraphicsGetCtxBufferInfo_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_graphics_h_disabled -void kgraphicsSetCtxBufferInfo_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1, GR_CTX_BUFFER arg2, NvU64 size, NvU64 align, RM_ATTR_PAGE_SIZE attr, NvBool bContiguous); +void kgraphicsSetCtxBufferInfo_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2, GR_CTX_BUFFER arg3, NvU64 size, NvU64 align, RM_ATTR_PAGE_SIZE attr, NvBool bContiguous); #ifdef __nvoc_kernel_graphics_h_disabled -static inline void kgraphicsSetCtxBufferInfo(OBJGPU *arg0, struct KernelGraphics *arg1, GR_CTX_BUFFER arg2, NvU64 size, NvU64 align, RM_ATTR_PAGE_SIZE attr, NvBool bContiguous) { +static inline void kgraphicsSetCtxBufferInfo(OBJGPU *arg1, struct KernelGraphics *arg2, GR_CTX_BUFFER arg3, NvU64 size, NvU64 align, RM_ATTR_PAGE_SIZE attr, NvBool bContiguous) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsSetCtxBufferInfo(arg0, arg1, arg2, size, align, attr, bContiguous) kgraphicsSetCtxBufferInfo_IMPL(arg0, arg1, arg2, size, align, attr, bContiguous) +#define kgraphicsSetCtxBufferInfo(arg1, arg2, arg3, size, align, attr, bContiguous) kgraphicsSetCtxBufferInfo_IMPL(arg1, arg2, arg3, size, align, attr, bContiguous) #endif //__nvoc_kernel_graphics_h_disabled -void kgraphicsClearCtxBufferInfo_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1); +void kgraphicsClearCtxBufferInfo_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2); #ifdef __nvoc_kernel_graphics_h_disabled -static inline void kgraphicsClearCtxBufferInfo(OBJGPU *arg0, struct KernelGraphics *arg1) { +static inline void kgraphicsClearCtxBufferInfo(OBJGPU *arg1, struct KernelGraphics *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsClearCtxBufferInfo(arg0, arg1) kgraphicsClearCtxBufferInfo_IMPL(arg0, arg1) +#define kgraphicsClearCtxBufferInfo(arg1, arg2) kgraphicsClearCtxBufferInfo_IMPL(arg1, arg2) #endif //__nvoc_kernel_graphics_h_disabled -NV_STATUS kgraphicsInitCtxBufPool_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1, struct Heap *arg2); +NV_STATUS kgraphicsInitCtxBufPool_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2, struct Heap *arg3); #ifdef __nvoc_kernel_graphics_h_disabled -static inline NV_STATUS kgraphicsInitCtxBufPool(OBJGPU *arg0, struct KernelGraphics *arg1, struct Heap *arg2) { +static inline NV_STATUS kgraphicsInitCtxBufPool(OBJGPU *arg1, struct KernelGraphics *arg2, struct Heap *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsInitCtxBufPool(arg0, arg1, arg2) kgraphicsInitCtxBufPool_IMPL(arg0, arg1, arg2) +#define kgraphicsInitCtxBufPool(arg1, arg2, arg3) kgraphicsInitCtxBufPool_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_graphics_h_disabled -struct CTX_BUF_POOL_INFO *kgraphicsGetCtxBufPool_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1); +struct CTX_BUF_POOL_INFO *kgraphicsGetCtxBufPool_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2); #ifdef __nvoc_kernel_graphics_h_disabled -static inline struct CTX_BUF_POOL_INFO *kgraphicsGetCtxBufPool(OBJGPU *arg0, struct KernelGraphics *arg1) { +static inline struct CTX_BUF_POOL_INFO *kgraphicsGetCtxBufPool(OBJGPU *arg1, struct KernelGraphics *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); return NULL; } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsGetCtxBufPool(arg0, arg1) kgraphicsGetCtxBufPool_IMPL(arg0, arg1) +#define kgraphicsGetCtxBufPool(arg1, arg2) kgraphicsGetCtxBufPool_IMPL(arg1, arg2) #endif //__nvoc_kernel_graphics_h_disabled -void kgraphicsDestroyCtxBufPool_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1); +void kgraphicsDestroyCtxBufPool_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2); #ifdef __nvoc_kernel_graphics_h_disabled -static inline void kgraphicsDestroyCtxBufPool(OBJGPU *arg0, struct KernelGraphics *arg1) { +static inline void kgraphicsDestroyCtxBufPool(OBJGPU *arg1, struct KernelGraphics *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsDestroyCtxBufPool(arg0, arg1) kgraphicsDestroyCtxBufPool_IMPL(arg0, arg1) +#define kgraphicsDestroyCtxBufPool(arg1, arg2) kgraphicsDestroyCtxBufPool_IMPL(arg1, arg2) #endif //__nvoc_kernel_graphics_h_disabled -GR_GLOBALCTX_BUFFERS *kgraphicsGetGlobalCtxBuffers_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 gfid); +GR_GLOBALCTX_BUFFERS *kgraphicsGetGlobalCtxBuffers_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2, NvU32 gfid); #ifdef __nvoc_kernel_graphics_h_disabled -static inline GR_GLOBALCTX_BUFFERS *kgraphicsGetGlobalCtxBuffers(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 gfid) { +static inline GR_GLOBALCTX_BUFFERS *kgraphicsGetGlobalCtxBuffers(OBJGPU *arg1, struct KernelGraphics *arg2, NvU32 gfid) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); return NULL; } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsGetGlobalCtxBuffers(arg0, arg1, gfid) kgraphicsGetGlobalCtxBuffers_IMPL(arg0, arg1, gfid) +#define kgraphicsGetGlobalCtxBuffers(arg1, arg2, gfid) kgraphicsGetGlobalCtxBuffers_IMPL(arg1, arg2, gfid) #endif //__nvoc_kernel_graphics_h_disabled -NvBool kgraphicsIsGlobalCtxBufferSizeAligned_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1, GR_GLOBALCTX_BUFFER arg2); +NvBool kgraphicsIsGlobalCtxBufferSizeAligned_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2, GR_GLOBALCTX_BUFFER arg3); #ifdef __nvoc_kernel_graphics_h_disabled -static inline NvBool kgraphicsIsGlobalCtxBufferSizeAligned(OBJGPU *arg0, struct KernelGraphics *arg1, GR_GLOBALCTX_BUFFER arg2) { +static inline NvBool kgraphicsIsGlobalCtxBufferSizeAligned(OBJGPU *arg1, struct KernelGraphics *arg2, GR_GLOBALCTX_BUFFER arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsIsGlobalCtxBufferSizeAligned(arg0, arg1, arg2) kgraphicsIsGlobalCtxBufferSizeAligned_IMPL(arg0, arg1, arg2) +#define kgraphicsIsGlobalCtxBufferSizeAligned(arg1, arg2, arg3) kgraphicsIsGlobalCtxBufferSizeAligned_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_graphics_h_disabled -const GR_BUFFER_ATTR *kgraphicsGetGlobalPrivAccessMapAttr_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1); +const GR_BUFFER_ATTR *kgraphicsGetGlobalPrivAccessMapAttr_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2); #ifdef __nvoc_kernel_graphics_h_disabled -static inline const GR_BUFFER_ATTR *kgraphicsGetGlobalPrivAccessMapAttr(OBJGPU *arg0, struct KernelGraphics *arg1) { +static inline const GR_BUFFER_ATTR *kgraphicsGetGlobalPrivAccessMapAttr(OBJGPU *arg1, struct KernelGraphics *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); return NULL; } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsGetGlobalPrivAccessMapAttr(arg0, arg1) kgraphicsGetGlobalPrivAccessMapAttr_IMPL(arg0, arg1) +#define kgraphicsGetGlobalPrivAccessMapAttr(arg1, arg2) kgraphicsGetGlobalPrivAccessMapAttr_IMPL(arg1, arg2) #endif //__nvoc_kernel_graphics_h_disabled -NV_STATUS kgraphicsMapCtxBuffer_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1, MEMORY_DESCRIPTOR *arg2, struct OBJVASPACE *arg3, VA_LIST *arg4, NvBool bAlignSize, NvBool bIsReadOnly); +NV_STATUS kgraphicsMapCtxBuffer_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2, MEMORY_DESCRIPTOR *arg3, struct OBJVASPACE *arg4, VA_LIST *arg5, NvBool bAlignSize, NvBool bIsReadOnly); #ifdef __nvoc_kernel_graphics_h_disabled -static inline NV_STATUS kgraphicsMapCtxBuffer(OBJGPU *arg0, struct KernelGraphics *arg1, MEMORY_DESCRIPTOR *arg2, struct OBJVASPACE *arg3, VA_LIST *arg4, NvBool bAlignSize, NvBool bIsReadOnly) { +static inline NV_STATUS kgraphicsMapCtxBuffer(OBJGPU *arg1, struct KernelGraphics *arg2, MEMORY_DESCRIPTOR *arg3, struct OBJVASPACE *arg4, VA_LIST *arg5, NvBool bAlignSize, NvBool bIsReadOnly) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsMapCtxBuffer(arg0, arg1, arg2, arg3, arg4, bAlignSize, bIsReadOnly) kgraphicsMapCtxBuffer_IMPL(arg0, arg1, arg2, arg3, arg4, bAlignSize, bIsReadOnly) +#define kgraphicsMapCtxBuffer(arg1, arg2, arg3, arg4, arg5, bAlignSize, bIsReadOnly) kgraphicsMapCtxBuffer_IMPL(arg1, arg2, arg3, arg4, arg5, bAlignSize, bIsReadOnly) #endif //__nvoc_kernel_graphics_h_disabled -void kgraphicsUnmapCtxBuffer_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1, struct OBJVASPACE *arg2, VA_LIST *arg3); +void kgraphicsUnmapCtxBuffer_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2, struct OBJVASPACE *arg3, VA_LIST *arg4); #ifdef __nvoc_kernel_graphics_h_disabled -static inline void kgraphicsUnmapCtxBuffer(OBJGPU *arg0, struct KernelGraphics *arg1, struct OBJVASPACE *arg2, VA_LIST *arg3) { +static inline void kgraphicsUnmapCtxBuffer(OBJGPU *arg1, struct KernelGraphics *arg2, struct OBJVASPACE *arg3, VA_LIST *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsUnmapCtxBuffer(arg0, arg1, arg2, arg3) kgraphicsUnmapCtxBuffer_IMPL(arg0, arg1, arg2, arg3) +#define kgraphicsUnmapCtxBuffer(arg1, arg2, arg3, arg4) kgraphicsUnmapCtxBuffer_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_graphics_h_disabled -void kgraphicsFreeGlobalCtxBuffers_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 gfid); +void kgraphicsFreeGlobalCtxBuffers_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2, NvU32 gfid); #ifdef __nvoc_kernel_graphics_h_disabled -static inline void kgraphicsFreeGlobalCtxBuffers(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 gfid) { +static inline void kgraphicsFreeGlobalCtxBuffers(OBJGPU *arg1, struct KernelGraphics *arg2, NvU32 gfid) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsFreeGlobalCtxBuffers(arg0, arg1, gfid) kgraphicsFreeGlobalCtxBuffers_IMPL(arg0, arg1, gfid) +#define kgraphicsFreeGlobalCtxBuffers(arg1, arg2, gfid) kgraphicsFreeGlobalCtxBuffers_IMPL(arg1, arg2, gfid) #endif //__nvoc_kernel_graphics_h_disabled -NV_STATUS kgraphicsGetMainCtxBufferSize_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1, NvBool bIncludeSubctxHdrs, NvU32 *pSize); +NV_STATUS kgraphicsGetMainCtxBufferSize_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2, NvBool bIncludeSubctxHdrs, NvU32 *pSize); #ifdef __nvoc_kernel_graphics_h_disabled -static inline NV_STATUS kgraphicsGetMainCtxBufferSize(OBJGPU *arg0, struct KernelGraphics *arg1, NvBool bIncludeSubctxHdrs, NvU32 *pSize) { +static inline NV_STATUS kgraphicsGetMainCtxBufferSize(OBJGPU *arg1, struct KernelGraphics *arg2, NvBool bIncludeSubctxHdrs, NvU32 *pSize) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsGetMainCtxBufferSize(arg0, arg1, bIncludeSubctxHdrs, pSize) kgraphicsGetMainCtxBufferSize_IMPL(arg0, arg1, bIncludeSubctxHdrs, pSize) +#define kgraphicsGetMainCtxBufferSize(arg1, arg2, bIncludeSubctxHdrs, pSize) kgraphicsGetMainCtxBufferSize_IMPL(arg1, arg2, bIncludeSubctxHdrs, pSize) #endif //__nvoc_kernel_graphics_h_disabled -NV_STATUS kgraphicsGetClassByType_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 objectType, NvU32 *pClass); +NV_STATUS kgraphicsGetClassByType_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2, NvU32 objectType, NvU32 *pClass); #ifdef __nvoc_kernel_graphics_h_disabled -static inline NV_STATUS kgraphicsGetClassByType(OBJGPU *arg0, struct KernelGraphics *arg1, NvU32 objectType, NvU32 *pClass) { +static inline NV_STATUS kgraphicsGetClassByType(OBJGPU *arg1, struct KernelGraphics *arg2, NvU32 objectType, NvU32 *pClass) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsGetClassByType(arg0, arg1, objectType, pClass) kgraphicsGetClassByType_IMPL(arg0, arg1, objectType, pClass) +#define kgraphicsGetClassByType(arg1, arg2, objectType, pClass) kgraphicsGetClassByType_IMPL(arg1, arg2, objectType, pClass) #endif //__nvoc_kernel_graphics_h_disabled -const GR_BUFFER_ATTR *kgraphicsGetContextBufferAttr_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1, GR_CTX_BUFFER arg2); +const GR_BUFFER_ATTR *kgraphicsGetContextBufferAttr_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2, GR_CTX_BUFFER arg3); #ifdef __nvoc_kernel_graphics_h_disabled -static inline const GR_BUFFER_ATTR *kgraphicsGetContextBufferAttr(OBJGPU *arg0, struct KernelGraphics *arg1, GR_CTX_BUFFER arg2) { +static inline const GR_BUFFER_ATTR *kgraphicsGetContextBufferAttr(OBJGPU *arg1, struct KernelGraphics *arg2, GR_CTX_BUFFER arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); return NULL; } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsGetContextBufferAttr(arg0, arg1, arg2) kgraphicsGetContextBufferAttr_IMPL(arg0, arg1, arg2) +#define kgraphicsGetContextBufferAttr(arg1, arg2, arg3) kgraphicsGetContextBufferAttr_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_graphics_h_disabled -NV_STATUS kgraphicsCreateGoldenImageChannel_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1); +NV_STATUS kgraphicsCreateGoldenImageChannel_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2); #ifdef __nvoc_kernel_graphics_h_disabled -static inline NV_STATUS kgraphicsCreateGoldenImageChannel(OBJGPU *arg0, struct KernelGraphics *arg1) { +static inline NV_STATUS kgraphicsCreateGoldenImageChannel(OBJGPU *arg1, struct KernelGraphics *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsCreateGoldenImageChannel(arg0, arg1) kgraphicsCreateGoldenImageChannel_IMPL(arg0, arg1) +#define kgraphicsCreateGoldenImageChannel(arg1, arg2) kgraphicsCreateGoldenImageChannel_IMPL(arg1, arg2) #endif //__nvoc_kernel_graphics_h_disabled -NvBool kgraphicsIsGFXSupported_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1); +NvBool kgraphicsIsGFXSupported_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2); #ifdef __nvoc_kernel_graphics_h_disabled -static inline NvBool kgraphicsIsGFXSupported(OBJGPU *arg0, struct KernelGraphics *arg1) { +static inline NvBool kgraphicsIsGFXSupported(OBJGPU *arg1, struct KernelGraphics *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsIsGFXSupported(arg0, arg1) kgraphicsIsGFXSupported_IMPL(arg0, arg1) +#define kgraphicsIsGFXSupported(arg1, arg2) kgraphicsIsGFXSupported_IMPL(arg1, arg2) #endif //__nvoc_kernel_graphics_h_disabled NV_STATUS kgraphicsDiscoverMaxLocalCtxBufferSize_IMPL(OBJGPU *pGpu, struct KernelGraphics *pKernelGraphics); @@ -854,37 +912,37 @@ static inline NV_STATUS kgraphicsDiscoverMaxLocalCtxBufferSize(OBJGPU *pGpu, str #define kgraphicsDiscoverMaxLocalCtxBufferSize(pGpu, pKernelGraphics) kgraphicsDiscoverMaxLocalCtxBufferSize_IMPL(pGpu, pKernelGraphics) #endif //__nvoc_kernel_graphics_h_disabled -NV_STATUS kgraphicsInitializeDeferredStaticData_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1, NvHandle hClient, NvHandle hSubdevice); +NV_STATUS kgraphicsInitializeDeferredStaticData_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2, NvHandle hClient, NvHandle hSubdevice); #ifdef __nvoc_kernel_graphics_h_disabled -static inline NV_STATUS kgraphicsInitializeDeferredStaticData(OBJGPU *arg0, struct KernelGraphics *arg1, NvHandle hClient, NvHandle hSubdevice) { +static inline NV_STATUS kgraphicsInitializeDeferredStaticData(OBJGPU *arg1, struct KernelGraphics *arg2, NvHandle hClient, NvHandle hSubdevice) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsInitializeDeferredStaticData(arg0, arg1, hClient, hSubdevice) kgraphicsInitializeDeferredStaticData_IMPL(arg0, arg1, hClient, hSubdevice) +#define kgraphicsInitializeDeferredStaticData(arg1, arg2, hClient, hSubdevice) kgraphicsInitializeDeferredStaticData_IMPL(arg1, arg2, hClient, hSubdevice) #endif //__nvoc_kernel_graphics_h_disabled -const struct KGRAPHICS_STATIC_INFO *kgraphicsGetStaticInfo_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1); +const struct KGRAPHICS_STATIC_INFO *kgraphicsGetStaticInfo_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2); #ifdef __nvoc_kernel_graphics_h_disabled -static inline const struct KGRAPHICS_STATIC_INFO *kgraphicsGetStaticInfo(OBJGPU *arg0, struct KernelGraphics *arg1) { +static inline const struct KGRAPHICS_STATIC_INFO *kgraphicsGetStaticInfo(OBJGPU *arg1, struct KernelGraphics *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); return NULL; } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsGetStaticInfo(arg0, arg1) kgraphicsGetStaticInfo_IMPL(arg0, arg1) +#define kgraphicsGetStaticInfo(arg1, arg2) kgraphicsGetStaticInfo_IMPL(arg1, arg2) #endif //__nvoc_kernel_graphics_h_disabled -NV_STATUS kgraphicsGetCaps_IMPL(OBJGPU *arg0, struct KernelGraphics *arg1, NvU8 *pGrCaps); +NV_STATUS kgraphicsGetCaps_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2, NvU8 *pGrCaps); #ifdef __nvoc_kernel_graphics_h_disabled -static inline NV_STATUS kgraphicsGetCaps(OBJGPU *arg0, struct KernelGraphics *arg1, NvU8 *pGrCaps) { +static inline NV_STATUS kgraphicsGetCaps(OBJGPU *arg1, struct KernelGraphics *arg2, NvU8 *pGrCaps) { NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsGetCaps(arg0, arg1, pGrCaps) kgraphicsGetCaps_IMPL(arg0, arg1, pGrCaps) +#define kgraphicsGetCaps(arg1, arg2, pGrCaps) kgraphicsGetCaps_IMPL(arg1, arg2, pGrCaps) #endif //__nvoc_kernel_graphics_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_kernel_graphics_object_nvoc.c b/src/nvidia/generated/g_kernel_graphics_object_nvoc.c index 27fe68ac4c..9e5f74ecee 100644 --- a/src/nvidia/generated/g_kernel_graphics_object_nvoc.c +++ b/src/nvidia/generated/g_kernel_graphics_object_nvoc.c @@ -120,134 +120,172 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGraphicsObject = /*pExportInfo=*/ &__nvoc_export_info_KernelGraphicsObject }; -static NV_STATUS __nvoc_thunk_KernelGraphicsObject_rmresGetMemInterMapParams(struct RmResource *arg0, RMRES_MEM_INTER_MAP_PARAMS *arg1) { - return kgrobjGetMemInterMapParams((struct KernelGraphicsObject *)(((unsigned char *)arg0) - __nvoc_rtti_KernelGraphicsObject_RmResource.offset), arg1); +// 1 down-thunk(s) defined to bridge methods in KernelGraphicsObject from superclasses + +// kgrobjGetMemInterMapParams: virtual override (rmres) base (chandes) +static NV_STATUS __nvoc_down_thunk_KernelGraphicsObject_rmresGetMemInterMapParams(struct RmResource *arg_this, RMRES_MEM_INTER_MAP_PARAMS *arg2) { + return kgrobjGetMemInterMapParams((struct KernelGraphicsObject *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphicsObject_RmResource.offset), arg2); } -static NV_STATUS __nvoc_thunk_ChannelDescendant_kgrobjCheckMemInterUnmap(struct KernelGraphicsObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_KernelGraphicsObject_ChannelDescendant.offset), bSubdeviceHandleProvided); + +// 31 up-thunk(s) defined to bridge methods in KernelGraphicsObject to superclasses + +// kgrobjGetSwMethods: virtual inherited (chandes) base (chandes) +static NV_STATUS __nvoc_up_thunk_ChannelDescendant_kgrobjGetSwMethods(struct KernelGraphicsObject *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { + return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_KernelGraphicsObject_ChannelDescendant.offset), ppMethods, pNumMethods); } -static NvBool __nvoc_thunk_GpuResource_kgrobjShareCallback(struct KernelGraphicsObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// kgrobjIsSwMethodStalling: virtual inherited (chandes) base (chandes) +static NvBool __nvoc_up_thunk_ChannelDescendant_kgrobjIsSwMethodStalling(struct KernelGraphicsObject *pChannelDescendant, NvU32 hHandle) { + return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_KernelGraphicsObject_ChannelDescendant.offset), hHandle); } -static NvBool __nvoc_thunk_RmResource_kgrobjAccessCallback(struct KernelGraphicsObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsObject_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// kgrobjCheckMemInterUnmap: virtual inherited (chandes) base (chandes) +static NV_STATUS __nvoc_up_thunk_ChannelDescendant_kgrobjCheckMemInterUnmap(struct KernelGraphicsObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { + return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_KernelGraphicsObject_ChannelDescendant.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RsResource_kgrobjMapTo(struct KernelGraphicsObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset), pParams); +// kgrobjControl: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjControl(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_kgrobjGetMapAddrSpace(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// kgrobjMap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjMap(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static void __nvoc_thunk_Notifier_kgrobjSetNotificationShare(struct KernelGraphicsObject *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelGraphicsObject_Notifier.offset), pNotifShare); +// kgrobjUnmap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjUnmap(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), pCallContext, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_kgrobjGetRefCount(struct KernelGraphicsObject *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset)); +// kgrobjShareCallback: virtual inherited (gpures) base (chandes) +static NvBool __nvoc_up_thunk_GpuResource_kgrobjShareCallback(struct KernelGraphicsObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static void __nvoc_thunk_RsResource_kgrobjAddAdditionalDependants(struct RsClient *pClient, struct KernelGraphicsObject *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset), pReference); +// kgrobjGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjGetRegBaseOffsetAndSize(struct KernelGraphicsObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_RmResource_kgrobjControl_Prologue(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsObject_RmResource.offset), pCallContext, pParams); +// kgrobjGetMapAddrSpace: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjGetMapAddrSpace(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_GpuResource_kgrobjGetRegBaseOffsetAndSize(struct KernelGraphicsObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), pGpu, pOffset, pSize); +// kgrobjInternalControlForward: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjInternalControlForward(struct KernelGraphicsObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_GpuResource_kgrobjInternalControlForward(struct KernelGraphicsObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), command, pParams, size); +// kgrobjGetInternalObjectHandle: virtual inherited (gpures) base (chandes) +static NvHandle __nvoc_up_thunk_GpuResource_kgrobjGetInternalObjectHandle(struct KernelGraphicsObject *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_kgrobjUnmapFrom(struct KernelGraphicsObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset), pParams); +// kgrobjAccessCallback: virtual inherited (rmres) base (chandes) +static NvBool __nvoc_up_thunk_RmResource_kgrobjAccessCallback(struct KernelGraphicsObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static void __nvoc_thunk_RmResource_kgrobjControl_Epilogue(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsObject_RmResource.offset), pCallContext, pParams); +// kgrobjGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_kgrobjGetMemoryMappingDescriptor(struct KernelGraphicsObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelGraphicsObject_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_ChannelDescendant_kgrobjGetSwMethods(struct KernelGraphicsObject *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_KernelGraphicsObject_ChannelDescendant.offset), ppMethods, pNumMethods); +// kgrobjControlSerialization_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_kgrobjControlSerialization_Prologue(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RmResource.offset), pCallContext, pParams); } -static NvHandle __nvoc_thunk_GpuResource_kgrobjGetInternalObjectHandle(struct KernelGraphicsObject *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset)); +// kgrobjControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_kgrobjControlSerialization_Epilogue(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_kgrobjControl(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), pCallContext, pParams); +// kgrobjControl_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_kgrobjControl_Prologue(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_kgrobjUnmap(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), pCallContext, pCpuMapping); +// kgrobjControl_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_kgrobjControl_Epilogue(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_kgrobjGetMemoryMappingDescriptor(struct KernelGraphicsObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelGraphicsObject_RmResource.offset), ppMemDesc); +// kgrobjCanCopy: virtual inherited (res) base (chandes) +static NvBool __nvoc_up_thunk_RsResource_kgrobjCanCopy(struct KernelGraphicsObject *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset)); } -static NvBool __nvoc_thunk_ChannelDescendant_kgrobjIsSwMethodStalling(struct KernelGraphicsObject *pChannelDescendant, NvU32 hHandle) { - return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_KernelGraphicsObject_ChannelDescendant.offset), hHandle); +// kgrobjIsDuplicate: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_kgrobjIsDuplicate(struct KernelGraphicsObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_kgrobjControlFilter(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset), pCallContext, pParams); +// kgrobjPreDestruct: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_kgrobjPreDestruct(struct KernelGraphicsObject *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_kgrobjUnregisterEvent(struct KernelGraphicsObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelGraphicsObject_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// kgrobjControlFilter: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_kgrobjControlFilter(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_kgrobjControlSerialization_Prologue(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsObject_RmResource.offset), pCallContext, pParams); +// kgrobjIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body +static NvBool __nvoc_up_thunk_RsResource_kgrobjIsPartialUnmapSupported(struct KernelGraphicsObject *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_kgrobjCanCopy(struct KernelGraphicsObject *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset)); +// kgrobjMapTo: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_kgrobjMapTo(struct KernelGraphicsObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RsResource_kgrobjIsPartialUnmapSupported(struct KernelGraphicsObject *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset)); +// kgrobjUnmapFrom: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_kgrobjUnmapFrom(struct KernelGraphicsObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset), pParams); } -static void __nvoc_thunk_RsResource_kgrobjPreDestruct(struct KernelGraphicsObject *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset)); +// kgrobjGetRefCount: virtual inherited (res) base (chandes) +static NvU32 __nvoc_up_thunk_RsResource_kgrobjGetRefCount(struct KernelGraphicsObject *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_kgrobjIsDuplicate(struct KernelGraphicsObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset), hMemory, pDuplicate); +// kgrobjAddAdditionalDependants: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_kgrobjAddAdditionalDependants(struct RsClient *pClient, struct KernelGraphicsObject *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset), pReference); } -static void __nvoc_thunk_RmResource_kgrobjControlSerialization_Epilogue(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelGraphicsObject_RmResource.offset), pCallContext, pParams); +// kgrobjGetNotificationListPtr: virtual inherited (notify) base (chandes) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_kgrobjGetNotificationListPtr(struct KernelGraphicsObject *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelGraphicsObject_Notifier.offset)); } -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_kgrobjGetNotificationListPtr(struct KernelGraphicsObject *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelGraphicsObject_Notifier.offset)); +// kgrobjGetNotificationShare: virtual inherited (notify) base (chandes) +static struct NotifShare * __nvoc_up_thunk_Notifier_kgrobjGetNotificationShare(struct KernelGraphicsObject *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelGraphicsObject_Notifier.offset)); } -static struct NotifShare *__nvoc_thunk_Notifier_kgrobjGetNotificationShare(struct KernelGraphicsObject *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelGraphicsObject_Notifier.offset)); +// kgrobjSetNotificationShare: virtual inherited (notify) base (chandes) +static void __nvoc_up_thunk_Notifier_kgrobjSetNotificationShare(struct KernelGraphicsObject *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelGraphicsObject_Notifier.offset), pNotifShare); } -static NV_STATUS __nvoc_thunk_GpuResource_kgrobjMap(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// kgrobjUnregisterEvent: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_kgrobjUnregisterEvent(struct KernelGraphicsObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelGraphicsObject_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static NV_STATUS __nvoc_thunk_Notifier_kgrobjGetOrAllocNotifShare(struct KernelGraphicsObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelGraphicsObject_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +// kgrobjGetOrAllocNotifShare: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_kgrobjGetOrAllocNotifShare(struct KernelGraphicsObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelGraphicsObject_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelGraphicsObject = { /*numEntries=*/ 0, @@ -293,6 +331,7 @@ NV_STATUS __nvoc_ctor_KernelGraphicsObject(KernelGraphicsObject *pThis, RmHalspe return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelGraphicsObject_1(KernelGraphicsObject *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -305,9 +344,11 @@ static void __nvoc_init_funcTable_KernelGraphicsObject_1(KernelGraphicsObject *p PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); + // kgrobjGetMemInterMapParams -- virtual override (rmres) base (chandes) pThis->__kgrobjGetMemInterMapParams__ = &kgrobjGetMemInterMapParams_IMPL; + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_KernelGraphicsObject_rmresGetMemInterMapParams; - // Hal function -- kgrobjGetPromoteIds + // kgrobjGetPromoteIds -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgrobjGetPromoteIds__ = &kgrobjGetPromoteIds_VF; @@ -317,72 +358,105 @@ static void __nvoc_init_funcTable_KernelGraphicsObject_1(KernelGraphicsObject *p pThis->__kgrobjGetPromoteIds__ = &kgrobjGetPromoteIds_FWCLIENT; } - pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ = &__nvoc_thunk_KernelGraphicsObject_rmresGetMemInterMapParams; + // kgrobjGetSwMethods -- virtual inherited (chandes) base (chandes) + pThis->__kgrobjGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_kgrobjGetSwMethods; - pThis->__kgrobjCheckMemInterUnmap__ = &__nvoc_thunk_ChannelDescendant_kgrobjCheckMemInterUnmap; + // kgrobjIsSwMethodStalling -- virtual inherited (chandes) base (chandes) + pThis->__kgrobjIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_kgrobjIsSwMethodStalling; - pThis->__kgrobjShareCallback__ = &__nvoc_thunk_GpuResource_kgrobjShareCallback; + // kgrobjCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) + pThis->__kgrobjCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_kgrobjCheckMemInterUnmap; - pThis->__kgrobjAccessCallback__ = &__nvoc_thunk_RmResource_kgrobjAccessCallback; + // kgrobjControl -- virtual inherited (gpures) base (chandes) + pThis->__kgrobjControl__ = &__nvoc_up_thunk_GpuResource_kgrobjControl; - pThis->__kgrobjMapTo__ = &__nvoc_thunk_RsResource_kgrobjMapTo; + // kgrobjMap -- virtual inherited (gpures) base (chandes) + pThis->__kgrobjMap__ = &__nvoc_up_thunk_GpuResource_kgrobjMap; - pThis->__kgrobjGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_kgrobjGetMapAddrSpace; + // kgrobjUnmap -- virtual inherited (gpures) base (chandes) + pThis->__kgrobjUnmap__ = &__nvoc_up_thunk_GpuResource_kgrobjUnmap; - pThis->__kgrobjSetNotificationShare__ = &__nvoc_thunk_Notifier_kgrobjSetNotificationShare; + // kgrobjShareCallback -- virtual inherited (gpures) base (chandes) + pThis->__kgrobjShareCallback__ = &__nvoc_up_thunk_GpuResource_kgrobjShareCallback; - pThis->__kgrobjGetRefCount__ = &__nvoc_thunk_RsResource_kgrobjGetRefCount; + // kgrobjGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) + pThis->__kgrobjGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kgrobjGetRegBaseOffsetAndSize; - pThis->__kgrobjAddAdditionalDependants__ = &__nvoc_thunk_RsResource_kgrobjAddAdditionalDependants; + // kgrobjGetMapAddrSpace -- virtual inherited (gpures) base (chandes) + pThis->__kgrobjGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_kgrobjGetMapAddrSpace; - pThis->__kgrobjControl_Prologue__ = &__nvoc_thunk_RmResource_kgrobjControl_Prologue; + // kgrobjInternalControlForward -- virtual inherited (gpures) base (chandes) + pThis->__kgrobjInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kgrobjInternalControlForward; - pThis->__kgrobjGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_kgrobjGetRegBaseOffsetAndSize; + // kgrobjGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) + pThis->__kgrobjGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kgrobjGetInternalObjectHandle; - pThis->__kgrobjInternalControlForward__ = &__nvoc_thunk_GpuResource_kgrobjInternalControlForward; + // kgrobjAccessCallback -- virtual inherited (rmres) base (chandes) + pThis->__kgrobjAccessCallback__ = &__nvoc_up_thunk_RmResource_kgrobjAccessCallback; - pThis->__kgrobjUnmapFrom__ = &__nvoc_thunk_RsResource_kgrobjUnmapFrom; + // kgrobjGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) + pThis->__kgrobjGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kgrobjGetMemoryMappingDescriptor; - pThis->__kgrobjControl_Epilogue__ = &__nvoc_thunk_RmResource_kgrobjControl_Epilogue; + // kgrobjControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__kgrobjControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kgrobjControlSerialization_Prologue; - pThis->__kgrobjGetSwMethods__ = &__nvoc_thunk_ChannelDescendant_kgrobjGetSwMethods; + // kgrobjControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__kgrobjControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kgrobjControlSerialization_Epilogue; - pThis->__kgrobjGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_kgrobjGetInternalObjectHandle; + // kgrobjControl_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__kgrobjControl_Prologue__ = &__nvoc_up_thunk_RmResource_kgrobjControl_Prologue; - pThis->__kgrobjControl__ = &__nvoc_thunk_GpuResource_kgrobjControl; + // kgrobjControl_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__kgrobjControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kgrobjControl_Epilogue; - pThis->__kgrobjUnmap__ = &__nvoc_thunk_GpuResource_kgrobjUnmap; + // kgrobjCanCopy -- virtual inherited (res) base (chandes) + pThis->__kgrobjCanCopy__ = &__nvoc_up_thunk_RsResource_kgrobjCanCopy; - pThis->__kgrobjGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_kgrobjGetMemoryMappingDescriptor; + // kgrobjIsDuplicate -- virtual inherited (res) base (chandes) + pThis->__kgrobjIsDuplicate__ = &__nvoc_up_thunk_RsResource_kgrobjIsDuplicate; - pThis->__kgrobjIsSwMethodStalling__ = &__nvoc_thunk_ChannelDescendant_kgrobjIsSwMethodStalling; + // kgrobjPreDestruct -- virtual inherited (res) base (chandes) + pThis->__kgrobjPreDestruct__ = &__nvoc_up_thunk_RsResource_kgrobjPreDestruct; - pThis->__kgrobjControlFilter__ = &__nvoc_thunk_RsResource_kgrobjControlFilter; + // kgrobjControlFilter -- virtual inherited (res) base (chandes) + pThis->__kgrobjControlFilter__ = &__nvoc_up_thunk_RsResource_kgrobjControlFilter; - pThis->__kgrobjUnregisterEvent__ = &__nvoc_thunk_Notifier_kgrobjUnregisterEvent; + // kgrobjIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body + pThis->__kgrobjIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kgrobjIsPartialUnmapSupported; - pThis->__kgrobjControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_kgrobjControlSerialization_Prologue; + // kgrobjMapTo -- virtual inherited (res) base (chandes) + pThis->__kgrobjMapTo__ = &__nvoc_up_thunk_RsResource_kgrobjMapTo; - pThis->__kgrobjCanCopy__ = &__nvoc_thunk_RsResource_kgrobjCanCopy; + // kgrobjUnmapFrom -- virtual inherited (res) base (chandes) + pThis->__kgrobjUnmapFrom__ = &__nvoc_up_thunk_RsResource_kgrobjUnmapFrom; - pThis->__kgrobjIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_kgrobjIsPartialUnmapSupported; + // kgrobjGetRefCount -- virtual inherited (res) base (chandes) + pThis->__kgrobjGetRefCount__ = &__nvoc_up_thunk_RsResource_kgrobjGetRefCount; - pThis->__kgrobjPreDestruct__ = &__nvoc_thunk_RsResource_kgrobjPreDestruct; + // kgrobjAddAdditionalDependants -- virtual inherited (res) base (chandes) + pThis->__kgrobjAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kgrobjAddAdditionalDependants; - pThis->__kgrobjIsDuplicate__ = &__nvoc_thunk_RsResource_kgrobjIsDuplicate; + // kgrobjGetNotificationListPtr -- virtual inherited (notify) base (chandes) + pThis->__kgrobjGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_kgrobjGetNotificationListPtr; - pThis->__kgrobjControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_kgrobjControlSerialization_Epilogue; + // kgrobjGetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__kgrobjGetNotificationShare__ = &__nvoc_up_thunk_Notifier_kgrobjGetNotificationShare; - pThis->__kgrobjGetNotificationListPtr__ = &__nvoc_thunk_Notifier_kgrobjGetNotificationListPtr; + // kgrobjSetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__kgrobjSetNotificationShare__ = &__nvoc_up_thunk_Notifier_kgrobjSetNotificationShare; - pThis->__kgrobjGetNotificationShare__ = &__nvoc_thunk_Notifier_kgrobjGetNotificationShare; + // kgrobjUnregisterEvent -- virtual inherited (notify) base (chandes) + pThis->__kgrobjUnregisterEvent__ = &__nvoc_up_thunk_Notifier_kgrobjUnregisterEvent; - pThis->__kgrobjMap__ = &__nvoc_thunk_GpuResource_kgrobjMap; + // kgrobjGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) + pThis->__kgrobjGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_kgrobjGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_KernelGraphicsObject_1 with approximately 35 basic block(s). - pThis->__kgrobjGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_kgrobjGetOrAllocNotifShare; -} +// Initialize vtable(s) for 33 virtual method(s). void __nvoc_init_funcTable_KernelGraphicsObject(KernelGraphicsObject *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 33 per-object function pointer(s). __nvoc_init_funcTable_KernelGraphicsObject_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_graphics_object_nvoc.h b/src/nvidia/generated/g_kernel_graphics_object_nvoc.h index 11a6bfcb7b..503c2110b4 100644 --- a/src/nvidia/generated/g_kernel_graphics_object_nvoc.h +++ b/src/nvidia/generated/g_kernel_graphics_object_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_GRAPHICS_OBJECT_NVOC_H_ #define _G_KERNEL_GRAPHICS_OBJECT_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_graphics_object_nvoc.h" #ifndef _KERNEL_GRAPHICS_OBJECT_H_ @@ -55,100 +63,122 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelGraphicsObject { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; - struct KernelGraphicsObject *__nvoc_pbase_KernelGraphicsObject; - NV_STATUS (*__kgrobjGetMemInterMapParams__)(struct KernelGraphicsObject *, RMRES_MEM_INTER_MAP_PARAMS *); - void (*__kgrobjGetPromoteIds__)(struct OBJGPU *, struct KernelGraphicsObject *, NvU32, NvU32 *, NvU32 *, NvBool *); - NV_STATUS (*__kgrobjCheckMemInterUnmap__)(struct KernelGraphicsObject *, NvBool); - NvBool (*__kgrobjShareCallback__)(struct KernelGraphicsObject *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NvBool (*__kgrobjAccessCallback__)(struct KernelGraphicsObject *, struct RsClient *, void *, RsAccessRight); - NV_STATUS (*__kgrobjMapTo__)(struct KernelGraphicsObject *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__kgrobjGetMapAddrSpace__)(struct KernelGraphicsObject *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__kgrobjSetNotificationShare__)(struct KernelGraphicsObject *, struct NotifShare *); - NvU32 (*__kgrobjGetRefCount__)(struct KernelGraphicsObject *); - void (*__kgrobjAddAdditionalDependants__)(struct RsClient *, struct KernelGraphicsObject *, RsResourceRef *); - NV_STATUS (*__kgrobjControl_Prologue__)(struct KernelGraphicsObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kgrobjGetRegBaseOffsetAndSize__)(struct KernelGraphicsObject *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__kgrobjInternalControlForward__)(struct KernelGraphicsObject *, NvU32, void *, NvU32); - NV_STATUS (*__kgrobjUnmapFrom__)(struct KernelGraphicsObject *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__kgrobjControl_Epilogue__)(struct KernelGraphicsObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kgrobjGetSwMethods__)(struct KernelGraphicsObject *, const METHOD **, NvU32 *); - NvHandle (*__kgrobjGetInternalObjectHandle__)(struct KernelGraphicsObject *); - NV_STATUS (*__kgrobjControl__)(struct KernelGraphicsObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kgrobjUnmap__)(struct KernelGraphicsObject *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__kgrobjGetMemoryMappingDescriptor__)(struct KernelGraphicsObject *, struct MEMORY_DESCRIPTOR **); - NvBool (*__kgrobjIsSwMethodStalling__)(struct KernelGraphicsObject *, NvU32); - NV_STATUS (*__kgrobjControlFilter__)(struct KernelGraphicsObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kgrobjUnregisterEvent__)(struct KernelGraphicsObject *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__kgrobjControlSerialization_Prologue__)(struct KernelGraphicsObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__kgrobjCanCopy__)(struct KernelGraphicsObject *); - NvBool (*__kgrobjIsPartialUnmapSupported__)(struct KernelGraphicsObject *); - void (*__kgrobjPreDestruct__)(struct KernelGraphicsObject *); - NV_STATUS (*__kgrobjIsDuplicate__)(struct KernelGraphicsObject *, NvHandle, NvBool *); - void (*__kgrobjControlSerialization_Epilogue__)(struct KernelGraphicsObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__kgrobjGetNotificationListPtr__)(struct KernelGraphicsObject *); - struct NotifShare *(*__kgrobjGetNotificationShare__)(struct KernelGraphicsObject *); - NV_STATUS (*__kgrobjMap__)(struct KernelGraphicsObject *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NV_STATUS (*__kgrobjGetOrAllocNotifShare__)(struct KernelGraphicsObject *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super^2 + struct INotifier *__nvoc_pbase_INotifier; // inotify super^3 + struct Notifier *__nvoc_pbase_Notifier; // notify super^2 + struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super + struct KernelGraphicsObject *__nvoc_pbase_KernelGraphicsObject; // kgrobj + + // Vtable with 33 per-object function pointers + NV_STATUS (*__kgrobjGetMemInterMapParams__)(struct KernelGraphicsObject * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual override (rmres) base (chandes) + void (*__kgrobjGetPromoteIds__)(struct OBJGPU *, struct KernelGraphicsObject * /*this*/, NvU32, NvU32 *, NvU32 *, NvBool *); // halified (2 hals) + NV_STATUS (*__kgrobjGetSwMethods__)(struct KernelGraphicsObject * /*this*/, const METHOD **, NvU32 *); // virtual inherited (chandes) base (chandes) + NvBool (*__kgrobjIsSwMethodStalling__)(struct KernelGraphicsObject * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__kgrobjCheckMemInterUnmap__)(struct KernelGraphicsObject * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__kgrobjControl__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__kgrobjMap__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__kgrobjUnmap__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NvBool (*__kgrobjShareCallback__)(struct KernelGraphicsObject * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__kgrobjGetRegBaseOffsetAndSize__)(struct KernelGraphicsObject * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__kgrobjGetMapAddrSpace__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__kgrobjInternalControlForward__)(struct KernelGraphicsObject * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (chandes) + NvHandle (*__kgrobjGetInternalObjectHandle__)(struct KernelGraphicsObject * /*this*/); // virtual inherited (gpures) base (chandes) + NvBool (*__kgrobjAccessCallback__)(struct KernelGraphicsObject * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__kgrobjGetMemoryMappingDescriptor__)(struct KernelGraphicsObject * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__kgrobjControlSerialization_Prologue__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__kgrobjControlSerialization_Epilogue__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__kgrobjControl_Prologue__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__kgrobjControl_Epilogue__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NvBool (*__kgrobjCanCopy__)(struct KernelGraphicsObject * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__kgrobjIsDuplicate__)(struct KernelGraphicsObject * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (chandes) + void (*__kgrobjPreDestruct__)(struct KernelGraphicsObject * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__kgrobjControlFilter__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (chandes) + NvBool (*__kgrobjIsPartialUnmapSupported__)(struct KernelGraphicsObject * /*this*/); // inline virtual inherited (res) base (chandes) body + NV_STATUS (*__kgrobjMapTo__)(struct KernelGraphicsObject * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (chandes) + NV_STATUS (*__kgrobjUnmapFrom__)(struct KernelGraphicsObject * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (chandes) + NvU32 (*__kgrobjGetRefCount__)(struct KernelGraphicsObject * /*this*/); // virtual inherited (res) base (chandes) + void (*__kgrobjAddAdditionalDependants__)(struct RsClient *, struct KernelGraphicsObject * /*this*/, RsResourceRef *); // virtual inherited (res) base (chandes) + PEVENTNOTIFICATION * (*__kgrobjGetNotificationListPtr__)(struct KernelGraphicsObject * /*this*/); // virtual inherited (notify) base (chandes) + struct NotifShare * (*__kgrobjGetNotificationShare__)(struct KernelGraphicsObject * /*this*/); // virtual inherited (notify) base (chandes) + void (*__kgrobjSetNotificationShare__)(struct KernelGraphicsObject * /*this*/, struct NotifShare *); // virtual inherited (notify) base (chandes) + NV_STATUS (*__kgrobjUnregisterEvent__)(struct KernelGraphicsObject * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (chandes) + NV_STATUS (*__kgrobjGetOrAllocNotifShare__)(struct KernelGraphicsObject * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (chandes) + + // Data members MEMORY_DESCRIPTOR *PRIVATE_FIELD(pMmioMemDesc); struct KernelGraphicsContext *PRIVATE_FIELD(pKernelGraphicsContext); }; + struct KernelGraphicsObject_PRIVATE { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; - struct KernelGraphicsObject *__nvoc_pbase_KernelGraphicsObject; - NV_STATUS (*__kgrobjGetMemInterMapParams__)(struct KernelGraphicsObject *, RMRES_MEM_INTER_MAP_PARAMS *); - void (*__kgrobjGetPromoteIds__)(struct OBJGPU *, struct KernelGraphicsObject *, NvU32, NvU32 *, NvU32 *, NvBool *); - NV_STATUS (*__kgrobjCheckMemInterUnmap__)(struct KernelGraphicsObject *, NvBool); - NvBool (*__kgrobjShareCallback__)(struct KernelGraphicsObject *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NvBool (*__kgrobjAccessCallback__)(struct KernelGraphicsObject *, struct RsClient *, void *, RsAccessRight); - NV_STATUS (*__kgrobjMapTo__)(struct KernelGraphicsObject *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__kgrobjGetMapAddrSpace__)(struct KernelGraphicsObject *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__kgrobjSetNotificationShare__)(struct KernelGraphicsObject *, struct NotifShare *); - NvU32 (*__kgrobjGetRefCount__)(struct KernelGraphicsObject *); - void (*__kgrobjAddAdditionalDependants__)(struct RsClient *, struct KernelGraphicsObject *, RsResourceRef *); - NV_STATUS (*__kgrobjControl_Prologue__)(struct KernelGraphicsObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kgrobjGetRegBaseOffsetAndSize__)(struct KernelGraphicsObject *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__kgrobjInternalControlForward__)(struct KernelGraphicsObject *, NvU32, void *, NvU32); - NV_STATUS (*__kgrobjUnmapFrom__)(struct KernelGraphicsObject *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__kgrobjControl_Epilogue__)(struct KernelGraphicsObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kgrobjGetSwMethods__)(struct KernelGraphicsObject *, const METHOD **, NvU32 *); - NvHandle (*__kgrobjGetInternalObjectHandle__)(struct KernelGraphicsObject *); - NV_STATUS (*__kgrobjControl__)(struct KernelGraphicsObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kgrobjUnmap__)(struct KernelGraphicsObject *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__kgrobjGetMemoryMappingDescriptor__)(struct KernelGraphicsObject *, struct MEMORY_DESCRIPTOR **); - NvBool (*__kgrobjIsSwMethodStalling__)(struct KernelGraphicsObject *, NvU32); - NV_STATUS (*__kgrobjControlFilter__)(struct KernelGraphicsObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kgrobjUnregisterEvent__)(struct KernelGraphicsObject *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__kgrobjControlSerialization_Prologue__)(struct KernelGraphicsObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__kgrobjCanCopy__)(struct KernelGraphicsObject *); - NvBool (*__kgrobjIsPartialUnmapSupported__)(struct KernelGraphicsObject *); - void (*__kgrobjPreDestruct__)(struct KernelGraphicsObject *); - NV_STATUS (*__kgrobjIsDuplicate__)(struct KernelGraphicsObject *, NvHandle, NvBool *); - void (*__kgrobjControlSerialization_Epilogue__)(struct KernelGraphicsObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__kgrobjGetNotificationListPtr__)(struct KernelGraphicsObject *); - struct NotifShare *(*__kgrobjGetNotificationShare__)(struct KernelGraphicsObject *); - NV_STATUS (*__kgrobjMap__)(struct KernelGraphicsObject *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NV_STATUS (*__kgrobjGetOrAllocNotifShare__)(struct KernelGraphicsObject *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super^2 + struct INotifier *__nvoc_pbase_INotifier; // inotify super^3 + struct Notifier *__nvoc_pbase_Notifier; // notify super^2 + struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super + struct KernelGraphicsObject *__nvoc_pbase_KernelGraphicsObject; // kgrobj + + // Vtable with 33 per-object function pointers + NV_STATUS (*__kgrobjGetMemInterMapParams__)(struct KernelGraphicsObject * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual override (rmres) base (chandes) + void (*__kgrobjGetPromoteIds__)(struct OBJGPU *, struct KernelGraphicsObject * /*this*/, NvU32, NvU32 *, NvU32 *, NvBool *); // halified (2 hals) + NV_STATUS (*__kgrobjGetSwMethods__)(struct KernelGraphicsObject * /*this*/, const METHOD **, NvU32 *); // virtual inherited (chandes) base (chandes) + NvBool (*__kgrobjIsSwMethodStalling__)(struct KernelGraphicsObject * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__kgrobjCheckMemInterUnmap__)(struct KernelGraphicsObject * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__kgrobjControl__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__kgrobjMap__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__kgrobjUnmap__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NvBool (*__kgrobjShareCallback__)(struct KernelGraphicsObject * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__kgrobjGetRegBaseOffsetAndSize__)(struct KernelGraphicsObject * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__kgrobjGetMapAddrSpace__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__kgrobjInternalControlForward__)(struct KernelGraphicsObject * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (chandes) + NvHandle (*__kgrobjGetInternalObjectHandle__)(struct KernelGraphicsObject * /*this*/); // virtual inherited (gpures) base (chandes) + NvBool (*__kgrobjAccessCallback__)(struct KernelGraphicsObject * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__kgrobjGetMemoryMappingDescriptor__)(struct KernelGraphicsObject * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__kgrobjControlSerialization_Prologue__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__kgrobjControlSerialization_Epilogue__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__kgrobjControl_Prologue__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__kgrobjControl_Epilogue__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NvBool (*__kgrobjCanCopy__)(struct KernelGraphicsObject * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__kgrobjIsDuplicate__)(struct KernelGraphicsObject * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (chandes) + void (*__kgrobjPreDestruct__)(struct KernelGraphicsObject * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__kgrobjControlFilter__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (chandes) + NvBool (*__kgrobjIsPartialUnmapSupported__)(struct KernelGraphicsObject * /*this*/); // inline virtual inherited (res) base (chandes) body + NV_STATUS (*__kgrobjMapTo__)(struct KernelGraphicsObject * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (chandes) + NV_STATUS (*__kgrobjUnmapFrom__)(struct KernelGraphicsObject * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (chandes) + NvU32 (*__kgrobjGetRefCount__)(struct KernelGraphicsObject * /*this*/); // virtual inherited (res) base (chandes) + void (*__kgrobjAddAdditionalDependants__)(struct RsClient *, struct KernelGraphicsObject * /*this*/, RsResourceRef *); // virtual inherited (res) base (chandes) + PEVENTNOTIFICATION * (*__kgrobjGetNotificationListPtr__)(struct KernelGraphicsObject * /*this*/); // virtual inherited (notify) base (chandes) + struct NotifShare * (*__kgrobjGetNotificationShare__)(struct KernelGraphicsObject * /*this*/); // virtual inherited (notify) base (chandes) + void (*__kgrobjSetNotificationShare__)(struct KernelGraphicsObject * /*this*/, struct NotifShare *); // virtual inherited (notify) base (chandes) + NV_STATUS (*__kgrobjUnregisterEvent__)(struct KernelGraphicsObject * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (chandes) + NV_STATUS (*__kgrobjGetOrAllocNotifShare__)(struct KernelGraphicsObject * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (chandes) + + // Data members MEMORY_DESCRIPTOR *pMmioMemDesc; struct KernelGraphicsContext *pKernelGraphicsContext; }; @@ -162,6 +192,7 @@ typedef struct KernelGraphicsObject KernelGraphicsObject; #define __nvoc_class_id_KernelGraphicsObject 0x097648 #endif /* __nvoc_class_id_KernelGraphicsObject */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGraphicsObject; #define __staticCast_KernelGraphicsObject(pThis) \ @@ -174,225 +205,261 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGraphicsObject; ((KernelGraphicsObject*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelGraphicsObject))) #endif //__nvoc_kernel_graphics_object_h_disabled - NV_STATUS __nvoc_objCreateDynamic_KernelGraphicsObject(KernelGraphicsObject**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_KernelGraphicsObject(KernelGraphicsObject**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_KernelGraphicsObject(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_KernelGraphicsObject((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) -#define kgrobjGetMemInterMapParams(arg0, arg1) kgrobjGetMemInterMapParams_DISPATCH(arg0, arg1) -#define kgrobjGetPromoteIds(arg0, arg1, maxPromoteIds, pPromoteIds, pNumEntries, pbPromote) kgrobjGetPromoteIds_DISPATCH(arg0, arg1, maxPromoteIds, pPromoteIds, pNumEntries, pbPromote) -#define kgrobjGetPromoteIds_HAL(arg0, arg1, maxPromoteIds, pPromoteIds, pNumEntries, pbPromote) kgrobjGetPromoteIds_DISPATCH(arg0, arg1, maxPromoteIds, pPromoteIds, pNumEntries, pbPromote) + +// Wrapper macros +#define kgrobjGetMemInterMapParams_FNPTR(arg_this) arg_this->__kgrobjGetMemInterMapParams__ +#define kgrobjGetMemInterMapParams(arg_this, arg2) kgrobjGetMemInterMapParams_DISPATCH(arg_this, arg2) +#define kgrobjGetPromoteIds_FNPTR(arg_this) arg_this->__kgrobjGetPromoteIds__ +#define kgrobjGetPromoteIds(arg1, arg_this, maxPromoteIds, pPromoteIds, pNumEntries, pbPromote) kgrobjGetPromoteIds_DISPATCH(arg1, arg_this, maxPromoteIds, pPromoteIds, pNumEntries, pbPromote) +#define kgrobjGetPromoteIds_HAL(arg1, arg_this, maxPromoteIds, pPromoteIds, pNumEntries, pbPromote) kgrobjGetPromoteIds_DISPATCH(arg1, arg_this, maxPromoteIds, pPromoteIds, pNumEntries, pbPromote) +#define kgrobjGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ +#define kgrobjGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) kgrobjGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) +#define kgrobjIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define kgrobjIsSwMethodStalling(pChannelDescendant, hHandle) kgrobjIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) +#define kgrobjCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ #define kgrobjCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) kgrobjCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) +#define kgrobjControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define kgrobjControl(pGpuResource, pCallContext, pParams) kgrobjControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define kgrobjMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define kgrobjMap(pGpuResource, pCallContext, pParams, pCpuMapping) kgrobjMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define kgrobjUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define kgrobjUnmap(pGpuResource, pCallContext, pCpuMapping) kgrobjUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define kgrobjShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ #define kgrobjShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) kgrobjShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define kgrobjAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kgrobjAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define kgrobjMapTo(pResource, pParams) kgrobjMapTo_DISPATCH(pResource, pParams) -#define kgrobjGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) kgrobjGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define kgrobjSetNotificationShare(pNotifier, pNotifShare) kgrobjSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define kgrobjGetRefCount(pResource) kgrobjGetRefCount_DISPATCH(pResource) -#define kgrobjAddAdditionalDependants(pClient, pResource, pReference) kgrobjAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define kgrobjControl_Prologue(pResource, pCallContext, pParams) kgrobjControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define kgrobjGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define kgrobjGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) kgrobjGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define kgrobjGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define kgrobjGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) kgrobjGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define kgrobjInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define kgrobjInternalControlForward(pGpuResource, command, pParams, size) kgrobjInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define kgrobjUnmapFrom(pResource, pParams) kgrobjUnmapFrom_DISPATCH(pResource, pParams) -#define kgrobjControl_Epilogue(pResource, pCallContext, pParams) kgrobjControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kgrobjGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) kgrobjGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) +#define kgrobjGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define kgrobjGetInternalObjectHandle(pGpuResource) kgrobjGetInternalObjectHandle_DISPATCH(pGpuResource) -#define kgrobjControl(pGpuResource, pCallContext, pParams) kgrobjControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define kgrobjUnmap(pGpuResource, pCallContext, pCpuMapping) kgrobjUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define kgrobjAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define kgrobjAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kgrobjAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define kgrobjGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define kgrobjGetMemoryMappingDescriptor(pRmResource, ppMemDesc) kgrobjGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define kgrobjIsSwMethodStalling(pChannelDescendant, hHandle) kgrobjIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define kgrobjControlFilter(pResource, pCallContext, pParams) kgrobjControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define kgrobjUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) kgrobjUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define kgrobjControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define kgrobjControlSerialization_Prologue(pResource, pCallContext, pParams) kgrobjControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define kgrobjControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define kgrobjControlSerialization_Epilogue(pResource, pCallContext, pParams) kgrobjControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kgrobjControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define kgrobjControl_Prologue(pResource, pCallContext, pParams) kgrobjControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define kgrobjControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define kgrobjControl_Epilogue(pResource, pCallContext, pParams) kgrobjControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kgrobjCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define kgrobjCanCopy(pResource) kgrobjCanCopy_DISPATCH(pResource) -#define kgrobjIsPartialUnmapSupported(pResource) kgrobjIsPartialUnmapSupported_DISPATCH(pResource) -#define kgrobjPreDestruct(pResource) kgrobjPreDestruct_DISPATCH(pResource) +#define kgrobjIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define kgrobjIsDuplicate(pResource, hMemory, pDuplicate) kgrobjIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define kgrobjControlSerialization_Epilogue(pResource, pCallContext, pParams) kgrobjControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kgrobjPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define kgrobjPreDestruct(pResource) kgrobjPreDestruct_DISPATCH(pResource) +#define kgrobjControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define kgrobjControlFilter(pResource, pCallContext, pParams) kgrobjControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define kgrobjIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define kgrobjIsPartialUnmapSupported(pResource) kgrobjIsPartialUnmapSupported_DISPATCH(pResource) +#define kgrobjMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define kgrobjMapTo(pResource, pParams) kgrobjMapTo_DISPATCH(pResource, pParams) +#define kgrobjUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define kgrobjUnmapFrom(pResource, pParams) kgrobjUnmapFrom_DISPATCH(pResource, pParams) +#define kgrobjGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define kgrobjGetRefCount(pResource) kgrobjGetRefCount_DISPATCH(pResource) +#define kgrobjAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define kgrobjAddAdditionalDependants(pClient, pResource, pReference) kgrobjAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define kgrobjGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define kgrobjGetNotificationListPtr(pNotifier) kgrobjGetNotificationListPtr_DISPATCH(pNotifier) +#define kgrobjGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ #define kgrobjGetNotificationShare(pNotifier) kgrobjGetNotificationShare_DISPATCH(pNotifier) -#define kgrobjMap(pGpuResource, pCallContext, pParams, pCpuMapping) kgrobjMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define kgrobjSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define kgrobjSetNotificationShare(pNotifier, pNotifShare) kgrobjSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define kgrobjUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define kgrobjUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) kgrobjUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define kgrobjGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ #define kgrobjGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) kgrobjGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -NvBool kgrobjShouldCleanup_KERNEL(struct OBJGPU *arg0, struct KernelGraphicsObject *arg1); - -#ifdef __nvoc_kernel_graphics_object_h_disabled -static inline NvBool kgrobjShouldCleanup(struct OBJGPU *arg0, struct KernelGraphicsObject *arg1) { - NV_ASSERT_FAILED_PRECOMP("KernelGraphicsObject was disabled!"); - return NV_FALSE; +// Dispatch functions +static inline NV_STATUS kgrobjGetMemInterMapParams_DISPATCH(struct KernelGraphicsObject *arg_this, RMRES_MEM_INTER_MAP_PARAMS *arg2) { + return arg_this->__kgrobjGetMemInterMapParams__(arg_this, arg2); } -#else //__nvoc_kernel_graphics_object_h_disabled -#define kgrobjShouldCleanup(arg0, arg1) kgrobjShouldCleanup_KERNEL(arg0, arg1) -#endif //__nvoc_kernel_graphics_object_h_disabled - -#define kgrobjShouldCleanup_HAL(arg0, arg1) kgrobjShouldCleanup(arg0, arg1) - -NV_STATUS kgrobjSetComputeMmio_IMPL(struct OBJGPU *arg0, struct KernelGraphicsObject *arg1); - -#ifdef __nvoc_kernel_graphics_object_h_disabled -static inline NV_STATUS kgrobjSetComputeMmio(struct OBJGPU *arg0, struct KernelGraphicsObject *arg1) { - NV_ASSERT_FAILED_PRECOMP("KernelGraphicsObject was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline void kgrobjGetPromoteIds_DISPATCH(struct OBJGPU *arg1, struct KernelGraphicsObject *arg_this, NvU32 maxPromoteIds, NvU32 *pPromoteIds, NvU32 *pNumEntries, NvBool *pbPromote) { + arg_this->__kgrobjGetPromoteIds__(arg1, arg_this, maxPromoteIds, pPromoteIds, pNumEntries, pbPromote); } -#else //__nvoc_kernel_graphics_object_h_disabled -#define kgrobjSetComputeMmio(arg0, arg1) kgrobjSetComputeMmio_IMPL(arg0, arg1) -#endif //__nvoc_kernel_graphics_object_h_disabled - -#define kgrobjSetComputeMmio_HAL(arg0, arg1) kgrobjSetComputeMmio(arg0, arg1) - -void kgrobjFreeComputeMmio_IMPL(struct OBJGPU *arg0, struct KernelGraphicsObject *arg1); - -#ifdef __nvoc_kernel_graphics_object_h_disabled -static inline void kgrobjFreeComputeMmio(struct OBJGPU *arg0, struct KernelGraphicsObject *arg1) { - NV_ASSERT_FAILED_PRECOMP("KernelGraphicsObject was disabled!"); +static inline NV_STATUS kgrobjGetSwMethods_DISPATCH(struct KernelGraphicsObject *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { + return pChannelDescendant->__kgrobjGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); } -#else //__nvoc_kernel_graphics_object_h_disabled -#define kgrobjFreeComputeMmio(arg0, arg1) kgrobjFreeComputeMmio_IMPL(arg0, arg1) -#endif //__nvoc_kernel_graphics_object_h_disabled -#define kgrobjFreeComputeMmio_HAL(arg0, arg1) kgrobjFreeComputeMmio(arg0, arg1) - -NV_STATUS kgrobjGetMemInterMapParams_IMPL(struct KernelGraphicsObject *arg0, RMRES_MEM_INTER_MAP_PARAMS *arg1); - -static inline NV_STATUS kgrobjGetMemInterMapParams_DISPATCH(struct KernelGraphicsObject *arg0, RMRES_MEM_INTER_MAP_PARAMS *arg1) { - return arg0->__kgrobjGetMemInterMapParams__(arg0, arg1); +static inline NvBool kgrobjIsSwMethodStalling_DISPATCH(struct KernelGraphicsObject *pChannelDescendant, NvU32 hHandle) { + return pChannelDescendant->__kgrobjIsSwMethodStalling__(pChannelDescendant, hHandle); } -void kgrobjGetPromoteIds_VF(struct OBJGPU *arg0, struct KernelGraphicsObject *arg1, NvU32 maxPromoteIds, NvU32 *pPromoteIds, NvU32 *pNumEntries, NvBool *pbPromote); +static inline NV_STATUS kgrobjCheckMemInterUnmap_DISPATCH(struct KernelGraphicsObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { + return pChannelDescendant->__kgrobjCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); +} -void kgrobjGetPromoteIds_FWCLIENT(struct OBJGPU *arg0, struct KernelGraphicsObject *arg1, NvU32 maxPromoteIds, NvU32 *pPromoteIds, NvU32 *pNumEntries, NvBool *pbPromote); +static inline NV_STATUS kgrobjControl_DISPATCH(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__kgrobjControl__(pGpuResource, pCallContext, pParams); +} -static inline void kgrobjGetPromoteIds_DISPATCH(struct OBJGPU *arg0, struct KernelGraphicsObject *arg1, NvU32 maxPromoteIds, NvU32 *pPromoteIds, NvU32 *pNumEntries, NvBool *pbPromote) { - arg1->__kgrobjGetPromoteIds__(arg0, arg1, maxPromoteIds, pPromoteIds, pNumEntries, pbPromote); +static inline NV_STATUS kgrobjMap_DISPATCH(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__kgrobjMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS kgrobjCheckMemInterUnmap_DISPATCH(struct KernelGraphicsObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return pChannelDescendant->__kgrobjCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); +static inline NV_STATUS kgrobjUnmap_DISPATCH(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__kgrobjUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool kgrobjShareCallback_DISPATCH(struct KernelGraphicsObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return pGpuResource->__kgrobjShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline NvBool kgrobjAccessCallback_DISPATCH(struct KernelGraphicsObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__kgrobjAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} - -static inline NV_STATUS kgrobjMapTo_DISPATCH(struct KernelGraphicsObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__kgrobjMapTo__(pResource, pParams); +static inline NV_STATUS kgrobjGetRegBaseOffsetAndSize_DISPATCH(struct KernelGraphicsObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__kgrobjGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS kgrobjGetMapAddrSpace_DISPATCH(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__kgrobjGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void kgrobjSetNotificationShare_DISPATCH(struct KernelGraphicsObject *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__kgrobjSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS kgrobjInternalControlForward_DISPATCH(struct KernelGraphicsObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__kgrobjInternalControlForward__(pGpuResource, command, pParams, size); } -static inline NvU32 kgrobjGetRefCount_DISPATCH(struct KernelGraphicsObject *pResource) { - return pResource->__kgrobjGetRefCount__(pResource); +static inline NvHandle kgrobjGetInternalObjectHandle_DISPATCH(struct KernelGraphicsObject *pGpuResource) { + return pGpuResource->__kgrobjGetInternalObjectHandle__(pGpuResource); } -static inline void kgrobjAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelGraphicsObject *pResource, RsResourceRef *pReference) { - pResource->__kgrobjAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvBool kgrobjAccessCallback_DISPATCH(struct KernelGraphicsObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__kgrobjAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS kgrobjControl_Prologue_DISPATCH(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kgrobjControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS kgrobjGetMemoryMappingDescriptor_DISPATCH(struct KernelGraphicsObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__kgrobjGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NV_STATUS kgrobjGetRegBaseOffsetAndSize_DISPATCH(struct KernelGraphicsObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__kgrobjGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS kgrobjControlSerialization_Prologue_DISPATCH(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kgrobjControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS kgrobjInternalControlForward_DISPATCH(struct KernelGraphicsObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__kgrobjInternalControlForward__(pGpuResource, command, pParams, size); +static inline void kgrobjControlSerialization_Epilogue_DISPATCH(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__kgrobjControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS kgrobjUnmapFrom_DISPATCH(struct KernelGraphicsObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__kgrobjUnmapFrom__(pResource, pParams); +static inline NV_STATUS kgrobjControl_Prologue_DISPATCH(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kgrobjControl_Prologue__(pResource, pCallContext, pParams); } static inline void kgrobjControl_Epilogue_DISPATCH(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { pResource->__kgrobjControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS kgrobjGetSwMethods_DISPATCH(struct KernelGraphicsObject *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return pChannelDescendant->__kgrobjGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); +static inline NvBool kgrobjCanCopy_DISPATCH(struct KernelGraphicsObject *pResource) { + return pResource->__kgrobjCanCopy__(pResource); } -static inline NvHandle kgrobjGetInternalObjectHandle_DISPATCH(struct KernelGraphicsObject *pGpuResource) { - return pGpuResource->__kgrobjGetInternalObjectHandle__(pGpuResource); +static inline NV_STATUS kgrobjIsDuplicate_DISPATCH(struct KernelGraphicsObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__kgrobjIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS kgrobjControl_DISPATCH(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__kgrobjControl__(pGpuResource, pCallContext, pParams); +static inline void kgrobjPreDestruct_DISPATCH(struct KernelGraphicsObject *pResource) { + pResource->__kgrobjPreDestruct__(pResource); } -static inline NV_STATUS kgrobjUnmap_DISPATCH(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kgrobjUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NV_STATUS kgrobjControlFilter_DISPATCH(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kgrobjControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS kgrobjGetMemoryMappingDescriptor_DISPATCH(struct KernelGraphicsObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__kgrobjGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NvBool kgrobjIsPartialUnmapSupported_DISPATCH(struct KernelGraphicsObject *pResource) { + return pResource->__kgrobjIsPartialUnmapSupported__(pResource); } -static inline NvBool kgrobjIsSwMethodStalling_DISPATCH(struct KernelGraphicsObject *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__kgrobjIsSwMethodStalling__(pChannelDescendant, hHandle); +static inline NV_STATUS kgrobjMapTo_DISPATCH(struct KernelGraphicsObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__kgrobjMapTo__(pResource, pParams); } -static inline NV_STATUS kgrobjControlFilter_DISPATCH(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kgrobjControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS kgrobjUnmapFrom_DISPATCH(struct KernelGraphicsObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__kgrobjUnmapFrom__(pResource, pParams); } -static inline NV_STATUS kgrobjUnregisterEvent_DISPATCH(struct KernelGraphicsObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__kgrobjUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline NvU32 kgrobjGetRefCount_DISPATCH(struct KernelGraphicsObject *pResource) { + return pResource->__kgrobjGetRefCount__(pResource); } -static inline NV_STATUS kgrobjControlSerialization_Prologue_DISPATCH(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kgrobjControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline void kgrobjAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelGraphicsObject *pResource, RsResourceRef *pReference) { + pResource->__kgrobjAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NvBool kgrobjCanCopy_DISPATCH(struct KernelGraphicsObject *pResource) { - return pResource->__kgrobjCanCopy__(pResource); +static inline PEVENTNOTIFICATION * kgrobjGetNotificationListPtr_DISPATCH(struct KernelGraphicsObject *pNotifier) { + return pNotifier->__kgrobjGetNotificationListPtr__(pNotifier); } -static inline NvBool kgrobjIsPartialUnmapSupported_DISPATCH(struct KernelGraphicsObject *pResource) { - return pResource->__kgrobjIsPartialUnmapSupported__(pResource); +static inline struct NotifShare * kgrobjGetNotificationShare_DISPATCH(struct KernelGraphicsObject *pNotifier) { + return pNotifier->__kgrobjGetNotificationShare__(pNotifier); } -static inline void kgrobjPreDestruct_DISPATCH(struct KernelGraphicsObject *pResource) { - pResource->__kgrobjPreDestruct__(pResource); +static inline void kgrobjSetNotificationShare_DISPATCH(struct KernelGraphicsObject *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__kgrobjSetNotificationShare__(pNotifier, pNotifShare); } -static inline NV_STATUS kgrobjIsDuplicate_DISPATCH(struct KernelGraphicsObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__kgrobjIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS kgrobjUnregisterEvent_DISPATCH(struct KernelGraphicsObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__kgrobjUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static inline void kgrobjControlSerialization_Epilogue_DISPATCH(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kgrobjControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS kgrobjGetOrAllocNotifShare_DISPATCH(struct KernelGraphicsObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return pNotifier->__kgrobjGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } -static inline PEVENTNOTIFICATION *kgrobjGetNotificationListPtr_DISPATCH(struct KernelGraphicsObject *pNotifier) { - return pNotifier->__kgrobjGetNotificationListPtr__(pNotifier); -} +NvBool kgrobjShouldCleanup_KERNEL(struct OBJGPU *arg1, struct KernelGraphicsObject *arg2); -static inline struct NotifShare *kgrobjGetNotificationShare_DISPATCH(struct KernelGraphicsObject *pNotifier) { - return pNotifier->__kgrobjGetNotificationShare__(pNotifier); + +#ifdef __nvoc_kernel_graphics_object_h_disabled +static inline NvBool kgrobjShouldCleanup(struct OBJGPU *arg1, struct KernelGraphicsObject *arg2) { + NV_ASSERT_FAILED_PRECOMP("KernelGraphicsObject was disabled!"); + return NV_FALSE; } +#else //__nvoc_kernel_graphics_object_h_disabled +#define kgrobjShouldCleanup(arg1, arg2) kgrobjShouldCleanup_KERNEL(arg1, arg2) +#endif //__nvoc_kernel_graphics_object_h_disabled -static inline NV_STATUS kgrobjMap_DISPATCH(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kgrobjMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +#define kgrobjShouldCleanup_HAL(arg1, arg2) kgrobjShouldCleanup(arg1, arg2) + +NV_STATUS kgrobjSetComputeMmio_IMPL(struct OBJGPU *arg1, struct KernelGraphicsObject *arg2); + + +#ifdef __nvoc_kernel_graphics_object_h_disabled +static inline NV_STATUS kgrobjSetComputeMmio(struct OBJGPU *arg1, struct KernelGraphicsObject *arg2) { + NV_ASSERT_FAILED_PRECOMP("KernelGraphicsObject was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_graphics_object_h_disabled +#define kgrobjSetComputeMmio(arg1, arg2) kgrobjSetComputeMmio_IMPL(arg1, arg2) +#endif //__nvoc_kernel_graphics_object_h_disabled -static inline NV_STATUS kgrobjGetOrAllocNotifShare_DISPATCH(struct KernelGraphicsObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__kgrobjGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); +#define kgrobjSetComputeMmio_HAL(arg1, arg2) kgrobjSetComputeMmio(arg1, arg2) + +void kgrobjFreeComputeMmio_IMPL(struct OBJGPU *arg1, struct KernelGraphicsObject *arg2); + + +#ifdef __nvoc_kernel_graphics_object_h_disabled +static inline void kgrobjFreeComputeMmio(struct OBJGPU *arg1, struct KernelGraphicsObject *arg2) { + NV_ASSERT_FAILED_PRECOMP("KernelGraphicsObject was disabled!"); } +#else //__nvoc_kernel_graphics_object_h_disabled +#define kgrobjFreeComputeMmio(arg1, arg2) kgrobjFreeComputeMmio_IMPL(arg1, arg2) +#endif //__nvoc_kernel_graphics_object_h_disabled + +#define kgrobjFreeComputeMmio_HAL(arg1, arg2) kgrobjFreeComputeMmio(arg1, arg2) + +NV_STATUS kgrobjGetMemInterMapParams_IMPL(struct KernelGraphicsObject *arg1, RMRES_MEM_INTER_MAP_PARAMS *arg2); + +void kgrobjGetPromoteIds_VF(struct OBJGPU *arg1, struct KernelGraphicsObject *arg2, NvU32 maxPromoteIds, NvU32 *pPromoteIds, NvU32 *pNumEntries, NvBool *pbPromote); + +void kgrobjGetPromoteIds_FWCLIENT(struct OBJGPU *arg1, struct KernelGraphicsObject *arg2, NvU32 maxPromoteIds, NvU32 *pPromoteIds, NvU32 *pNumEntries, NvBool *pbPromote); static inline struct KernelGraphicsContext *kgrobjGetKernelGraphicsContext(struct OBJGPU *pGpu, struct KernelGraphicsObject *pKernelGraphicsObject) { struct KernelGraphicsObject_PRIVATE *pKernelGraphicsObject_PRIVATE = (struct KernelGraphicsObject_PRIVATE *)pKernelGraphicsObject; @@ -405,15 +472,15 @@ NV_STATUS kgrobjConstruct_IMPL(struct KernelGraphicsObject *arg_pKernelGraphicsO void kgrobjDestruct_IMPL(struct KernelGraphicsObject *pKernelGraphicsObject); #define __nvoc_kgrobjDestruct(pKernelGraphicsObject) kgrobjDestruct_IMPL(pKernelGraphicsObject) -NV_STATUS kgrobjPromoteContext_IMPL(struct OBJGPU *arg0, struct KernelGraphicsObject *arg1, struct KernelGraphics *arg2); +NV_STATUS kgrobjPromoteContext_IMPL(struct OBJGPU *arg1, struct KernelGraphicsObject *arg2, struct KernelGraphics *arg3); #ifdef __nvoc_kernel_graphics_object_h_disabled -static inline NV_STATUS kgrobjPromoteContext(struct OBJGPU *arg0, struct KernelGraphicsObject *arg1, struct KernelGraphics *arg2) { +static inline NV_STATUS kgrobjPromoteContext(struct OBJGPU *arg1, struct KernelGraphicsObject *arg2, struct KernelGraphics *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelGraphicsObject was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_graphics_object_h_disabled -#define kgrobjPromoteContext(arg0, arg1, arg2) kgrobjPromoteContext_IMPL(arg0, arg1, arg2) +#define kgrobjPromoteContext(arg1, arg2, arg3) kgrobjPromoteContext_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_graphics_object_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_kernel_gsp_nvoc.c b/src/nvidia/generated/g_kernel_gsp_nvoc.c index 2a2c51389e..5ebb774ced 100644 --- a/src/nvidia/generated/g_kernel_gsp_nvoc.c +++ b/src/nvidia/generated/g_kernel_gsp_nvoc.c @@ -102,142 +102,182 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGsp = /*pExportInfo=*/ &__nvoc_export_info_KernelGsp }; -static NV_STATUS __nvoc_thunk_KernelGsp_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelGsp, ENGDESCRIPTOR arg0) { - return kgspConstructEngine(pGpu, (struct KernelGsp *)(((unsigned char *)pKernelGsp) - __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg0); +// 5 down-thunk(s) defined to bridge methods in KernelGsp from superclasses + +// kgspConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelGsp_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelGsp, ENGDESCRIPTOR arg3) { + return kgspConstructEngine(pGpu, (struct KernelGsp *)(((unsigned char *) pKernelGsp) - __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_KernelGsp_intrservRegisterIntrService(struct OBJGPU *pGpu, struct IntrService *pKernelGsp, IntrServiceRecord pRecords[171]) { - kgspRegisterIntrService(pGpu, (struct KernelGsp *)(((unsigned char *)pKernelGsp) - __nvoc_rtti_KernelGsp_IntrService.offset), pRecords); +// kgspRegisterIntrService: virtual override (intrserv) base (intrserv) +static void __nvoc_down_thunk_KernelGsp_intrservRegisterIntrService(struct OBJGPU *pGpu, struct IntrService *pKernelGsp, IntrServiceRecord pRecords[175]) { + kgspRegisterIntrService(pGpu, (struct KernelGsp *)(((unsigned char *) pKernelGsp) - __nvoc_rtti_KernelGsp_IntrService.offset), pRecords); } -static NvU32 __nvoc_thunk_KernelGsp_intrservServiceInterrupt(struct OBJGPU *pGpu, struct IntrService *pKernelGsp, IntrServiceServiceInterruptArguments *pParams) { - return kgspServiceInterrupt(pGpu, (struct KernelGsp *)(((unsigned char *)pKernelGsp) - __nvoc_rtti_KernelGsp_IntrService.offset), pParams); +// kgspServiceInterrupt: virtual override (intrserv) base (intrserv) +static NvU32 __nvoc_down_thunk_KernelGsp_intrservServiceInterrupt(struct OBJGPU *pGpu, struct IntrService *pKernelGsp, IntrServiceServiceInterruptArguments *pParams) { + return kgspServiceInterrupt(pGpu, (struct KernelGsp *)(((unsigned char *) pKernelGsp) - __nvoc_rtti_KernelGsp_IntrService.offset), pParams); } -static NV_STATUS __nvoc_thunk_KernelGsp_kflcnResetHw(struct OBJGPU *pGpu, struct KernelFalcon *pKernelGsp) { - return kgspResetHw(pGpu, (struct KernelGsp *)(((unsigned char *)pKernelGsp) - __nvoc_rtti_KernelGsp_KernelFalcon.offset)); +// kgspResetHw: virtual halified (3 hals) override (kflcn) base (kflcn) body +static NV_STATUS __nvoc_down_thunk_KernelGsp_kflcnResetHw(struct OBJGPU *pGpu, struct KernelFalcon *pKernelGsp) { + return kgspResetHw(pGpu, (struct KernelGsp *)(((unsigned char *) pKernelGsp) - __nvoc_rtti_KernelGsp_KernelFalcon.offset)); } -static void __nvoc_thunk_KernelGsp_kcrashcatEngineReadEmem(struct KernelCrashCatEngine *pKernelGsp, NvU64 offset, NvU64 size, void *pBuf) { - kgspReadEmem((struct KernelGsp *)(((unsigned char *)pKernelGsp) - __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), offset, size, pBuf); +// kgspReadEmem: virtual halified (2 hals) override (kcrashcatEngine) base (kflcn) body +static void __nvoc_down_thunk_KernelGsp_kcrashcatEngineReadEmem(struct KernelCrashCatEngine *pKernelGsp, NvU64 offset, NvU64 size, void *pBuf) { + kgspReadEmem((struct KernelGsp *)(((unsigned char *) pKernelGsp) - __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), offset, size, pBuf); } -static NvBool __nvoc_thunk_KernelCrashCatEngine_kgspConfigured(struct KernelGsp *arg0) { - return kcrashcatEngineConfigured((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset)); + +// 29 up-thunk(s) defined to bridge methods in KernelGsp to superclasses + +// kgspInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kgspInitMissing(POBJGPU pGpu, struct KernelGsp *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); } -static NvU32 __nvoc_thunk_KernelCrashCatEngine_kgspPriRead(struct KernelGsp *arg0, NvU32 offset) { - return kcrashcatEnginePriRead((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), offset); +// kgspStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePreInitLocked(POBJGPU pGpu, struct KernelGsp *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); } -static void __nvoc_thunk_KernelFalcon_kgspRegWrite(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 offset, NvU32 data) { - kflcnRegWrite(pGpu, (struct KernelFalcon *)(((unsigned char *)pKernelFlcn) + __nvoc_rtti_KernelGsp_KernelFalcon.offset), offset, data); +// kgspStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePreInitUnlocked(POBJGPU pGpu, struct KernelGsp *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); } -static NvU32 __nvoc_thunk_KernelFalcon_kgspMaskDmemAddr(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 addr) { - return kflcnMaskDmemAddr(pGpu, (struct KernelFalcon *)(((unsigned char *)pKernelFlcn) + __nvoc_rtti_KernelGsp_KernelFalcon.offset), addr); +// kgspStateInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStateInitLocked(POBJGPU pGpu, struct KernelGsp *pEngstate) { + return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_kgspStateDestroy(POBJGPU pGpu, struct KernelGsp *pEngstate) { - engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); +// kgspStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStateInitUnlocked(POBJGPU pGpu, struct KernelGsp *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); } -static void __nvoc_thunk_KernelCrashCatEngine_kgspVprintf(struct KernelGsp *arg0, NvBool bReportStart, const char *fmt, va_list args) { - kcrashcatEngineVprintf((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), bReportStart, fmt, args); +// kgspStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePreLoad(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg3); } -static NvBool __nvoc_thunk_IntrService_kgspClearInterrupt(struct OBJGPU *pGpu, struct KernelGsp *pIntrService, IntrServiceClearInterruptArguments *pParams) { - return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_KernelGsp_IntrService.offset), pParams); +// kgspStateLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStateLoad(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { + return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_KernelCrashCatEngine_kgspPriWrite(struct KernelGsp *arg0, NvU32 offset, NvU32 data) { - kcrashcatEnginePriWrite((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), offset, data); +// kgspStatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePostLoad(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg3); } -static void *__nvoc_thunk_KernelCrashCatEngine_kgspMapBufferDescriptor(struct KernelGsp *arg0, CrashCatBufferDescriptor *pBufDesc) { - return kcrashcatEngineMapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), pBufDesc); +// kgspStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePreUnload(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_KernelCrashCatEngine_kgspSyncBufferDescriptor(struct KernelGsp *arg0, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { - kcrashcatEngineSyncBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), pBufDesc, offset, size); +// kgspStateUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStateUnload(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { + return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg3); } -static NvU32 __nvoc_thunk_KernelFalcon_kgspRegRead(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 offset) { - return kflcnRegRead(pGpu, (struct KernelFalcon *)(((unsigned char *)pKernelFlcn) + __nvoc_rtti_KernelGsp_KernelFalcon.offset), offset); +// kgspStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePostUnload(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg3); } -static NvBool __nvoc_thunk_OBJENGSTATE_kgspIsPresent(POBJGPU pGpu, struct KernelGsp *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); +// kgspStateDestroy: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kgspStateDestroy(POBJGPU pGpu, struct KernelGsp *pEngstate) { + engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspStateLoad(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg0) { - return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg0); +// kgspIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_kgspIsPresent(POBJGPU pGpu, struct KernelGsp *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); } -static const NvU32 *__nvoc_thunk_KernelCrashCatEngine_kgspGetScratchOffsets(struct KernelGsp *arg0, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { - return kcrashcatEngineGetScratchOffsets((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), scratchGroupId); +// kgspClearInterrupt: virtual inherited (intrserv) base (intrserv) +static NvBool __nvoc_up_thunk_IntrService_kgspClearInterrupt(struct OBJGPU *pGpu, struct KernelGsp *pIntrService, IntrServiceClearInterruptArguments *pParams) { + return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_KernelGsp_IntrService.offset), pParams); } -static void __nvoc_thunk_KernelCrashCatEngine_kgspUnload(struct KernelGsp *arg0) { - kcrashcatEngineUnload((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset)); +// kgspServiceNotificationInterrupt: virtual inherited (intrserv) base (intrserv) +static NV_STATUS __nvoc_up_thunk_IntrService_kgspServiceNotificationInterrupt(struct OBJGPU *pGpu, struct KernelGsp *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { + return intrservServiceNotificationInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_KernelGsp_IntrService.offset), pParams); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspStateUnload(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg0) { - return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg0); +// kgspRegRead: virtual halified (2 hals) inherited (kflcn) base (kflcn) body +static NvU32 __nvoc_up_thunk_KernelFalcon_kgspRegRead(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 offset) { + return kflcnRegRead(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) + __nvoc_rtti_KernelGsp_KernelFalcon.offset), offset); } -static NV_STATUS __nvoc_thunk_IntrService_kgspServiceNotificationInterrupt(struct OBJGPU *pGpu, struct KernelGsp *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { - return intrservServiceNotificationInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_KernelGsp_IntrService.offset), pParams); +// kgspRegWrite: virtual halified (2 hals) inherited (kflcn) base (kflcn) body +static void __nvoc_up_thunk_KernelFalcon_kgspRegWrite(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 offset, NvU32 data) { + kflcnRegWrite(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) + __nvoc_rtti_KernelGsp_KernelFalcon.offset), offset, data); } -static NvU32 __nvoc_thunk_KernelCrashCatEngine_kgspGetWFL0Offset(struct KernelGsp *arg0) { - return kcrashcatEngineGetWFL0Offset((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset)); +// kgspMaskDmemAddr: virtual halified (3 hals) inherited (kflcn) base (kflcn) body +static NvU32 __nvoc_up_thunk_KernelFalcon_kgspMaskDmemAddr(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 addr) { + return kflcnMaskDmemAddr(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) + __nvoc_rtti_KernelGsp_KernelFalcon.offset), addr); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspStateInitLocked(POBJGPU pGpu, struct KernelGsp *pEngstate) { - return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); +// kgspConfigured: virtual inherited (kcrashcatEngine) base (kflcn) +static NvBool __nvoc_up_thunk_KernelCrashCatEngine_kgspConfigured(struct KernelGsp *arg_this) { + return kcrashcatEngineConfigured((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspStatePreLoad(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg0); +// kgspUnload: virtual inherited (kcrashcatEngine) base (kflcn) +static void __nvoc_up_thunk_KernelCrashCatEngine_kgspUnload(struct KernelGsp *arg_this) { + kcrashcatEngineUnload((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspStatePostUnload(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg0); +// kgspVprintf: virtual inherited (kcrashcatEngine) base (kflcn) +static void __nvoc_up_thunk_KernelCrashCatEngine_kgspVprintf(struct KernelGsp *arg_this, NvBool bReportStart, const char *fmt, va_list args) { + kcrashcatEngineVprintf((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), bReportStart, fmt, args); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspStatePreUnload(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg0); +// kgspPriRead: virtual inherited (kcrashcatEngine) base (kflcn) +static NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kgspPriRead(struct KernelGsp *arg_this, NvU32 offset) { + return kcrashcatEnginePriRead((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), offset); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspStateInitUnlocked(POBJGPU pGpu, struct KernelGsp *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); +// kgspPriWrite: virtual inherited (kcrashcatEngine) base (kflcn) +static void __nvoc_up_thunk_KernelCrashCatEngine_kgspPriWrite(struct KernelGsp *arg_this, NvU32 offset, NvU32 data) { + kcrashcatEnginePriWrite((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), offset, data); } -static void __nvoc_thunk_OBJENGSTATE_kgspInitMissing(POBJGPU pGpu, struct KernelGsp *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); +// kgspMapBufferDescriptor: virtual inherited (kcrashcatEngine) base (kflcn) +static void * __nvoc_up_thunk_KernelCrashCatEngine_kgspMapBufferDescriptor(struct KernelGsp *arg_this, CrashCatBufferDescriptor *pBufDesc) { + return kcrashcatEngineMapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), pBufDesc); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspStatePreInitLocked(POBJGPU pGpu, struct KernelGsp *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); +// kgspUnmapBufferDescriptor: virtual inherited (kcrashcatEngine) base (kflcn) +static void __nvoc_up_thunk_KernelCrashCatEngine_kgspUnmapBufferDescriptor(struct KernelGsp *arg_this, CrashCatBufferDescriptor *pBufDesc) { + kcrashcatEngineUnmapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), pBufDesc); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspStatePreInitUnlocked(POBJGPU pGpu, struct KernelGsp *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); +// kgspSyncBufferDescriptor: virtual inherited (kcrashcatEngine) base (kflcn) +static void __nvoc_up_thunk_KernelCrashCatEngine_kgspSyncBufferDescriptor(struct KernelGsp *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { + kcrashcatEngineSyncBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), pBufDesc, offset, size); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspStatePostLoad(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg0); +// kgspReadDmem: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) +static void __nvoc_up_thunk_KernelCrashCatEngine_kgspReadDmem(struct KernelGsp *arg_this, NvU32 offset, NvU32 size, void *pBuf) { + kcrashcatEngineReadDmem((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), offset, size, pBuf); } -static void __nvoc_thunk_KernelCrashCatEngine_kgspUnmapBufferDescriptor(struct KernelGsp *arg0, CrashCatBufferDescriptor *pBufDesc) { - kcrashcatEngineUnmapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), pBufDesc); +// kgspGetScratchOffsets: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) +static const NvU32 * __nvoc_up_thunk_KernelCrashCatEngine_kgspGetScratchOffsets(struct KernelGsp *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { + return kcrashcatEngineGetScratchOffsets((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), scratchGroupId); } -static void __nvoc_thunk_KernelCrashCatEngine_kgspReadDmem(struct KernelGsp *arg0, NvU32 offset, NvU32 size, void *pBuf) { - kcrashcatEngineReadDmem((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), offset, size, pBuf); +// kgspGetWFL0Offset: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) +static NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kgspGetWFL0Offset(struct KernelGsp *arg_this) { + return kcrashcatEngineGetWFL0Offset((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelGsp = { /*numEntries=*/ 0, @@ -267,9 +307,6 @@ void __nvoc_init_dataField_KernelGsp(KernelGsp *pThis, RmHalspecOwner *pRmhalspe PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // Hal field -- bIsTaskIsrQueueRequired - pThis->bIsTaskIsrQueueRequired = ((NvBool)(0 != 0)); - // Hal field -- bPartitionedFmc if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { @@ -353,6 +390,7 @@ NV_STATUS __nvoc_ctor_KernelGsp(KernelGsp *pThis, RmHalspecOwner *pRmhalspecowne return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -365,13 +403,19 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); + // kgspConstructEngine -- virtual override (engstate) base (engstate) pThis->__kgspConstructEngine__ = &kgspConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelGsp_engstateConstructEngine; + // kgspRegisterIntrService -- virtual override (intrserv) base (intrserv) pThis->__kgspRegisterIntrService__ = &kgspRegisterIntrService_IMPL; + pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_KernelGsp_intrservRegisterIntrService; + // kgspServiceInterrupt -- virtual override (intrserv) base (intrserv) pThis->__kgspServiceInterrupt__ = &kgspServiceInterrupt_IMPL; + pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_KernelGsp_intrservServiceInterrupt; - // Hal function -- kgspConfigureFalcon + // kgspConfigureFalcon -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspConfigureFalcon__ = &kgspConfigureFalcon_f2d351; @@ -388,7 +432,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspIsDebugModeEnabled + // kgspIsDebugModeEnabled -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspIsDebugModeEnabled__ = &kgspIsDebugModeEnabled_108313; @@ -405,7 +449,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspAllocBootArgs + // kgspAllocBootArgs -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspAllocBootArgs__ = &kgspAllocBootArgs_5baef9; @@ -422,7 +466,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspFreeBootArgs + // kgspFreeBootArgs -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspFreeBootArgs__ = &kgspFreeBootArgs_f2d351; @@ -439,7 +483,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspProgramLibosBootArgsAddr + // kgspProgramLibosBootArgsAddr -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspProgramLibosBootArgsAddr__ = &kgspProgramLibosBootArgsAddr_f2d351; @@ -449,7 +493,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * pThis->__kgspProgramLibosBootArgsAddr__ = &kgspProgramLibosBootArgsAddr_TU102; } - // Hal function -- kgspSetCmdQueueHead + // kgspSetCmdQueueHead -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspSetCmdQueueHead__ = &kgspSetCmdQueueHead_5baef9; @@ -459,7 +503,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * pThis->__kgspSetCmdQueueHead__ = &kgspSetCmdQueueHead_TU102; } - // Hal function -- kgspPrepareForBootstrap + // kgspPrepareForBootstrap -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspPrepareForBootstrap__ = &kgspPrepareForBootstrap_5baef9; @@ -476,7 +520,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspBootstrap + // kgspBootstrap -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspBootstrap__ = &kgspBootstrap_5baef9; @@ -493,7 +537,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspGetGspRmBootUcodeStorage + // kgspGetGspRmBootUcodeStorage -- halified (4 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspGetGspRmBootUcodeStorage__ = &kgspGetGspRmBootUcodeStorage_f2d351; @@ -514,7 +558,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspGetBinArchiveGspRmBoot + // kgspGetBinArchiveGspRmBoot -- halified (6 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspGetBinArchiveGspRmBoot__ = &kgspGetBinArchiveGspRmBoot_80f438; @@ -543,7 +587,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspGetBinArchiveConcatenatedFMCDesc + // kgspGetBinArchiveConcatenatedFMCDesc -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspGetBinArchiveConcatenatedFMCDesc__ = &kgspGetBinArchiveConcatenatedFMCDesc_80f438; @@ -560,7 +604,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspGetBinArchiveConcatenatedFMC + // kgspGetBinArchiveConcatenatedFMC -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspGetBinArchiveConcatenatedFMC__ = &kgspGetBinArchiveConcatenatedFMC_80f438; @@ -577,7 +621,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspGetBinArchiveGspRmFmcGfwDebugSigned + // kgspGetBinArchiveGspRmFmcGfwDebugSigned -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspGetBinArchiveGspRmFmcGfwDebugSigned__ = &kgspGetBinArchiveGspRmFmcGfwDebugSigned_80f438; @@ -595,7 +639,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspGetBinArchiveGspRmFmcGfwProdSigned + // kgspGetBinArchiveGspRmFmcGfwProdSigned -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspGetBinArchiveGspRmFmcGfwProdSigned__ = &kgspGetBinArchiveGspRmFmcGfwProdSigned_80f438; @@ -613,7 +657,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspGetBinArchiveGspRmCcFmcGfwProdSigned + // kgspGetBinArchiveGspRmCcFmcGfwProdSigned -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspGetBinArchiveGspRmCcFmcGfwProdSigned__ = &kgspGetBinArchiveGspRmCcFmcGfwProdSigned_80f438; @@ -631,7 +675,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspCalculateFbLayout + // kgspCalculateFbLayout -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspCalculateFbLayout__ = &kgspCalculateFbLayout_5baef9; @@ -648,7 +692,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspGetNonWprHeapSize + // kgspGetNonWprHeapSize -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspGetNonWprHeapSize__ = &kgspGetNonWprHeapSize_5baef9; @@ -665,7 +709,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspExecuteSequencerCommand + // kgspExecuteSequencerCommand -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspExecuteSequencerCommand__ = &kgspExecuteSequencerCommand_5baef9; @@ -682,7 +726,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspReadUcodeFuseVersion + // kgspReadUcodeFuseVersion -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspReadUcodeFuseVersion__ = &kgspReadUcodeFuseVersion_474d46; @@ -699,7 +743,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspResetHw + // kgspResetHw -- virtual halified (3 hals) override (kflcn) base (kflcn) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspResetHw__ = &kgspResetHw_5baef9; @@ -715,8 +759,9 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * pThis->__kgspResetHw__ = &kgspResetHw_TU102; } } + pThis->__nvoc_base_KernelFalcon.__kflcnResetHw__ = &__nvoc_down_thunk_KernelGsp_kflcnResetHw; - // Hal function -- kgspHealthCheck + // kgspHealthCheck -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspHealthCheck__ = &kgspHealthCheck_108313; @@ -726,7 +771,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * pThis->__kgspHealthCheck__ = &kgspHealthCheck_TU102; } - // Hal function -- kgspService + // kgspService -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspService__ = &kgspService_474d46; @@ -736,7 +781,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * pThis->__kgspService__ = &kgspService_TU102; } - // Hal function -- kgspIsWpr2Up + // kgspIsWpr2Up -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspIsWpr2Up__ = &kgspIsWpr2Up_108313; @@ -753,7 +798,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspGetFrtsSize + // kgspGetFrtsSize -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspGetFrtsSize__ = &kgspGetFrtsSize_474d46; @@ -770,7 +815,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspGetPrescrubbedTopFbSize + // kgspGetPrescrubbedTopFbSize -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspGetPrescrubbedTopFbSize__ = &kgspGetPrescrubbedTopFbSize_474d46; @@ -787,7 +832,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspExtractVbiosFromRom + // kgspExtractVbiosFromRom -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspExtractVbiosFromRom__ = &kgspExtractVbiosFromRom_5baef9; @@ -804,7 +849,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspPrepareForFwsecFrts + // kgspPrepareForFwsecFrts -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspPrepareForFwsecFrts__ = &kgspPrepareForFwsecFrts_5baef9; @@ -821,7 +866,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspPrepareForFwsecSb + // kgspPrepareForFwsecSb -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspPrepareForFwsecSb__ = &kgspPrepareForFwsecSb_5baef9; @@ -838,7 +883,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspExecuteFwsec + // kgspExecuteFwsec -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspExecuteFwsec__ = &kgspExecuteFwsec_5baef9; @@ -855,7 +900,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspExecuteScrubberIfNeeded + // kgspExecuteScrubberIfNeeded -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspExecuteScrubberIfNeeded__ = &kgspExecuteScrubberIfNeeded_5baef9; @@ -872,7 +917,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspExecuteBooterLoad + // kgspExecuteBooterLoad -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspExecuteBooterLoad__ = &kgspExecuteBooterLoad_5baef9; @@ -889,7 +934,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspExecuteBooterUnloadIfNeeded + // kgspExecuteBooterUnloadIfNeeded -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspExecuteBooterUnloadIfNeeded__ = &kgspExecuteBooterUnloadIfNeeded_5baef9; @@ -906,7 +951,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspExecuteHsFalcon + // kgspExecuteHsFalcon -- halified (4 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspExecuteHsFalcon__ = &kgspExecuteHsFalcon_5baef9; @@ -927,7 +972,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspWaitForProcessorSuspend + // kgspWaitForProcessorSuspend -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspWaitForProcessorSuspend__ = &kgspWaitForProcessorSuspend_5baef9; @@ -937,7 +982,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * pThis->__kgspWaitForProcessorSuspend__ = &kgspWaitForProcessorSuspend_TU102; } - // Hal function -- kgspSavePowerMgmtState + // kgspSavePowerMgmtState -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspSavePowerMgmtState__ = &kgspSavePowerMgmtState_5baef9; @@ -947,7 +992,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * pThis->__kgspSavePowerMgmtState__ = &kgspSavePowerMgmtState_TU102; } - // Hal function -- kgspRestorePowerMgmtState + // kgspRestorePowerMgmtState -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspRestorePowerMgmtState__ = &kgspRestorePowerMgmtState_5baef9; @@ -957,7 +1002,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * pThis->__kgspRestorePowerMgmtState__ = &kgspRestorePowerMgmtState_TU102; } - // Hal function -- kgspFreeSuspendResumeData + // kgspFreeSuspendResumeData -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspFreeSuspendResumeData__ = &kgspFreeSuspendResumeData_f2d351; @@ -967,7 +1012,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * pThis->__kgspFreeSuspendResumeData__ = &kgspFreeSuspendResumeData_TU102; } - // Hal function -- kgspWaitForGfwBootOk + // kgspWaitForGfwBootOk -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspWaitForGfwBootOk__ = &kgspWaitForGfwBootOk_5baef9; @@ -984,7 +1029,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspGetBinArchiveBooterLoadUcode + // kgspGetBinArchiveBooterLoadUcode -- halified (7 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspGetBinArchiveBooterLoadUcode__ = &kgspGetBinArchiveBooterLoadUcode_80f438; @@ -1017,7 +1062,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspGetBinArchiveBooterUnloadUcode + // kgspGetBinArchiveBooterUnloadUcode -- halified (7 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspGetBinArchiveBooterUnloadUcode__ = &kgspGetBinArchiveBooterUnloadUcode_80f438; @@ -1050,7 +1095,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspGetMinWprHeapSizeMB + // kgspGetMinWprHeapSizeMB -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspGetMinWprHeapSizeMB__ = &kgspGetMinWprHeapSizeMB_b2b553; @@ -1067,7 +1112,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspGetMaxWprHeapSizeMB + // kgspGetMaxWprHeapSizeMB -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspGetMaxWprHeapSizeMB__ = &kgspGetMaxWprHeapSizeMB_b2b553; @@ -1084,7 +1129,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspGetFwHeapParamOsCarveoutSize + // kgspGetFwHeapParamOsCarveoutSize -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspGetFwHeapParamOsCarveoutSize__ = &kgspGetFwHeapParamOsCarveoutSize_b2b553; @@ -1101,7 +1146,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspInitVgpuPartitionLogging + // kgspInitVgpuPartitionLogging -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspInitVgpuPartitionLogging__ = &kgspInitVgpuPartitionLogging_395e98; @@ -1118,7 +1163,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspFreeVgpuPartitionLogging + // kgspFreeVgpuPartitionLogging -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspFreeVgpuPartitionLogging__ = &kgspFreeVgpuPartitionLogging_395e98; @@ -1135,7 +1180,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspGetSignatureSectionNamePrefix + // kgspGetSignatureSectionNamePrefix -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspGetSignatureSectionNamePrefix__ = &kgspGetSignatureSectionNamePrefix_80f438; @@ -1153,7 +1198,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspSetupGspFmcArgs + // kgspSetupGspFmcArgs -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspSetupGspFmcArgs__ = &kgspSetupGspFmcArgs_5baef9; @@ -1171,7 +1216,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspReadEmem + // kgspReadEmem -- virtual halified (2 hals) override (kcrashcatEngine) base (kflcn) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspReadEmem__ = &kgspReadEmem_366c4c; @@ -1180,8 +1225,9 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * { pThis->__kgspReadEmem__ = &kgspReadEmem_TU102; } + pThis->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineReadEmem__ = &__nvoc_down_thunk_KernelGsp_kcrashcatEngineReadEmem; - // Hal function -- kgspIssueNotifyOp + // kgspIssueNotifyOp -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspIssueNotifyOp__ = &kgspIssueNotifyOp_5baef9; @@ -1199,7 +1245,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // Hal function -- kgspCheckGspRmCcCleanup + // kgspCheckGspRmCcCleanup -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kgspCheckGspRmCcCleanup__ = &kgspCheckGspRmCcCleanup_5baef9; @@ -1217,76 +1263,99 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelGsp_engstateConstructEngine; - - pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_thunk_KernelGsp_intrservRegisterIntrService; + // kgspInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__kgspInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kgspInitMissing; - pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_thunk_KernelGsp_intrservServiceInterrupt; + // kgspStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__kgspStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStatePreInitLocked; - pThis->__nvoc_base_KernelFalcon.__kflcnResetHw__ = &__nvoc_thunk_KernelGsp_kflcnResetHw; + // kgspStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kgspStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStatePreInitUnlocked; - pThis->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineReadEmem__ = &__nvoc_thunk_KernelGsp_kcrashcatEngineReadEmem; + // kgspStateInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__kgspStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStateInitLocked; - pThis->__kgspConfigured__ = &__nvoc_thunk_KernelCrashCatEngine_kgspConfigured; + // kgspStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kgspStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStateInitUnlocked; - pThis->__kgspPriRead__ = &__nvoc_thunk_KernelCrashCatEngine_kgspPriRead; + // kgspStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__kgspStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStatePreLoad; - pThis->__kgspRegWrite__ = &__nvoc_thunk_KernelFalcon_kgspRegWrite; + // kgspStateLoad -- virtual inherited (engstate) base (engstate) + pThis->__kgspStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStateLoad; - pThis->__kgspMaskDmemAddr__ = &__nvoc_thunk_KernelFalcon_kgspMaskDmemAddr; + // kgspStatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__kgspStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStatePostLoad; - pThis->__kgspStateDestroy__ = &__nvoc_thunk_OBJENGSTATE_kgspStateDestroy; + // kgspStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__kgspStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStatePreUnload; - pThis->__kgspVprintf__ = &__nvoc_thunk_KernelCrashCatEngine_kgspVprintf; + // kgspStateUnload -- virtual inherited (engstate) base (engstate) + pThis->__kgspStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStateUnload; - pThis->__kgspClearInterrupt__ = &__nvoc_thunk_IntrService_kgspClearInterrupt; + // kgspStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__kgspStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStatePostUnload; - pThis->__kgspPriWrite__ = &__nvoc_thunk_KernelCrashCatEngine_kgspPriWrite; + // kgspStateDestroy -- virtual inherited (engstate) base (engstate) + pThis->__kgspStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStateDestroy; - pThis->__kgspMapBufferDescriptor__ = &__nvoc_thunk_KernelCrashCatEngine_kgspMapBufferDescriptor; + // kgspIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__kgspIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kgspIsPresent; - pThis->__kgspSyncBufferDescriptor__ = &__nvoc_thunk_KernelCrashCatEngine_kgspSyncBufferDescriptor; + // kgspClearInterrupt -- virtual inherited (intrserv) base (intrserv) + pThis->__kgspClearInterrupt__ = &__nvoc_up_thunk_IntrService_kgspClearInterrupt; - pThis->__kgspRegRead__ = &__nvoc_thunk_KernelFalcon_kgspRegRead; + // kgspServiceNotificationInterrupt -- virtual inherited (intrserv) base (intrserv) + pThis->__kgspServiceNotificationInterrupt__ = &__nvoc_up_thunk_IntrService_kgspServiceNotificationInterrupt; - pThis->__kgspIsPresent__ = &__nvoc_thunk_OBJENGSTATE_kgspIsPresent; + // kgspRegRead -- virtual halified (2 hals) inherited (kflcn) base (kflcn) body + pThis->__kgspRegRead__ = &__nvoc_up_thunk_KernelFalcon_kgspRegRead; - pThis->__kgspStateLoad__ = &__nvoc_thunk_OBJENGSTATE_kgspStateLoad; + // kgspRegWrite -- virtual halified (2 hals) inherited (kflcn) base (kflcn) body + pThis->__kgspRegWrite__ = &__nvoc_up_thunk_KernelFalcon_kgspRegWrite; - pThis->__kgspGetScratchOffsets__ = &__nvoc_thunk_KernelCrashCatEngine_kgspGetScratchOffsets; + // kgspMaskDmemAddr -- virtual halified (3 hals) inherited (kflcn) base (kflcn) body + pThis->__kgspMaskDmemAddr__ = &__nvoc_up_thunk_KernelFalcon_kgspMaskDmemAddr; - pThis->__kgspUnload__ = &__nvoc_thunk_KernelCrashCatEngine_kgspUnload; + // kgspConfigured -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__kgspConfigured__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspConfigured; - pThis->__kgspStateUnload__ = &__nvoc_thunk_OBJENGSTATE_kgspStateUnload; + // kgspUnload -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__kgspUnload__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspUnload; - pThis->__kgspServiceNotificationInterrupt__ = &__nvoc_thunk_IntrService_kgspServiceNotificationInterrupt; + // kgspVprintf -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__kgspVprintf__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspVprintf; - pThis->__kgspGetWFL0Offset__ = &__nvoc_thunk_KernelCrashCatEngine_kgspGetWFL0Offset; + // kgspPriRead -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__kgspPriRead__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspPriRead; - pThis->__kgspStateInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kgspStateInitLocked; + // kgspPriWrite -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__kgspPriWrite__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspPriWrite; - pThis->__kgspStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_kgspStatePreLoad; + // kgspMapBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__kgspMapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspMapBufferDescriptor; - pThis->__kgspStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_kgspStatePostUnload; + // kgspUnmapBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__kgspUnmapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspUnmapBufferDescriptor; - pThis->__kgspStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_kgspStatePreUnload; + // kgspSyncBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__kgspSyncBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspSyncBufferDescriptor; - pThis->__kgspStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kgspStateInitUnlocked; + // kgspReadDmem -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + pThis->__kgspReadDmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspReadDmem; - pThis->__kgspInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kgspInitMissing; + // kgspGetScratchOffsets -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + pThis->__kgspGetScratchOffsets__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspGetScratchOffsets; - pThis->__kgspStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kgspStatePreInitLocked; + // kgspGetWFL0Offset -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + pThis->__kgspGetWFL0Offset__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspGetWFL0Offset; +} // End __nvoc_init_funcTable_KernelGsp_1 with approximately 195 basic block(s). - pThis->__kgspStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kgspStatePreInitUnlocked; - - pThis->__kgspStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_kgspStatePostLoad; - - pThis->__kgspUnmapBufferDescriptor__ = &__nvoc_thunk_KernelCrashCatEngine_kgspUnmapBufferDescriptor; - - pThis->__kgspReadDmem__ = &__nvoc_thunk_KernelCrashCatEngine_kgspReadDmem; -} +// Initialize vtable(s) for 82 virtual method(s). void __nvoc_init_funcTable_KernelGsp(KernelGsp *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 82 per-object function pointer(s). __nvoc_init_funcTable_KernelGsp_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_gsp_nvoc.h b/src/nvidia/generated/g_kernel_gsp_nvoc.h index 1cfbed764e..2e66ff8121 100644 --- a/src/nvidia/generated/g_kernel_gsp_nvoc.h +++ b/src/nvidia/generated/g_kernel_gsp_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_KERNEL_GSP_NVOC_H_ #define _G_KERNEL_GSP_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2017-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_gsp_nvoc.h" #ifndef KERNEL_GSP_H @@ -302,103 +310,113 @@ typedef struct struct MESSAGE_QUEUE_COLLECTION; + struct KernelGsp { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; struct IntrService __nvoc_base_IntrService; struct KernelFalcon __nvoc_base_KernelFalcon; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct IntrService *__nvoc_pbase_IntrService; - struct CrashCatEngine *__nvoc_pbase_CrashCatEngine; - struct KernelCrashCatEngine *__nvoc_pbase_KernelCrashCatEngine; - struct KernelFalcon *__nvoc_pbase_KernelFalcon; - struct KernelGsp *__nvoc_pbase_KernelGsp; - NV_STATUS (*__kgspConstructEngine__)(struct OBJGPU *, struct KernelGsp *, ENGDESCRIPTOR); - void (*__kgspRegisterIntrService__)(struct OBJGPU *, struct KernelGsp *, IntrServiceRecord *); - NvU32 (*__kgspServiceInterrupt__)(struct OBJGPU *, struct KernelGsp *, IntrServiceServiceInterruptArguments *); - void (*__kgspConfigureFalcon__)(struct OBJGPU *, struct KernelGsp *); - NvBool (*__kgspIsDebugModeEnabled__)(struct OBJGPU *, struct KernelGsp *); - NV_STATUS (*__kgspAllocBootArgs__)(struct OBJGPU *, struct KernelGsp *); - void (*__kgspFreeBootArgs__)(struct OBJGPU *, struct KernelGsp *); - void (*__kgspProgramLibosBootArgsAddr__)(struct OBJGPU *, struct KernelGsp *); - NV_STATUS (*__kgspSetCmdQueueHead__)(struct OBJGPU *, struct KernelGsp *, NvU32, NvU32); - NV_STATUS (*__kgspPrepareForBootstrap__)(struct OBJGPU *, struct KernelGsp *, GSP_FIRMWARE *); - NV_STATUS (*__kgspBootstrap__)(struct OBJGPU *, struct KernelGsp *, GSP_FIRMWARE *); - void (*__kgspGetGspRmBootUcodeStorage__)(struct OBJGPU *, struct KernelGsp *, BINDATA_STORAGE **, BINDATA_STORAGE **); - const BINDATA_ARCHIVE *(*__kgspGetBinArchiveGspRmBoot__)(struct KernelGsp *); - const BINDATA_ARCHIVE *(*__kgspGetBinArchiveConcatenatedFMCDesc__)(struct KernelGsp *); - const BINDATA_ARCHIVE *(*__kgspGetBinArchiveConcatenatedFMC__)(struct KernelGsp *); - const BINDATA_ARCHIVE *(*__kgspGetBinArchiveGspRmFmcGfwDebugSigned__)(struct KernelGsp *); - const BINDATA_ARCHIVE *(*__kgspGetBinArchiveGspRmFmcGfwProdSigned__)(struct KernelGsp *); - const BINDATA_ARCHIVE *(*__kgspGetBinArchiveGspRmCcFmcGfwProdSigned__)(struct KernelGsp *); - NV_STATUS (*__kgspCalculateFbLayout__)(struct OBJGPU *, struct KernelGsp *, GSP_FIRMWARE *); - NvU32 (*__kgspGetNonWprHeapSize__)(struct OBJGPU *, struct KernelGsp *); - NV_STATUS (*__kgspExecuteSequencerCommand__)(struct OBJGPU *, struct KernelGsp *, NvU32, NvU32 *, NvU32); - NvU32 (*__kgspReadUcodeFuseVersion__)(struct OBJGPU *, struct KernelGsp *, NvU32); - NV_STATUS (*__kgspResetHw__)(struct OBJGPU *, struct KernelGsp *); - NvBool (*__kgspHealthCheck__)(struct OBJGPU *, struct KernelGsp *); - NvU32 (*__kgspService__)(struct OBJGPU *, struct KernelGsp *); - NvBool (*__kgspIsWpr2Up__)(struct OBJGPU *, struct KernelGsp *); - NvU32 (*__kgspGetFrtsSize__)(struct OBJGPU *, struct KernelGsp *); - NvU64 (*__kgspGetPrescrubbedTopFbSize__)(struct OBJGPU *, struct KernelGsp *); - NV_STATUS (*__kgspExtractVbiosFromRom__)(struct OBJGPU *, struct KernelGsp *, KernelGspVbiosImg **); - NV_STATUS (*__kgspPrepareForFwsecFrts__)(struct OBJGPU *, struct KernelGsp *, KernelGspFlcnUcode *, const NvU64, KernelGspPreparedFwsecCmd *); - NV_STATUS (*__kgspPrepareForFwsecSb__)(struct OBJGPU *, struct KernelGsp *, KernelGspFlcnUcode *, KernelGspPreparedFwsecCmd *); - NV_STATUS (*__kgspExecuteFwsec__)(struct OBJGPU *, struct KernelGsp *, KernelGspPreparedFwsecCmd *); - NV_STATUS (*__kgspExecuteScrubberIfNeeded__)(struct OBJGPU *, struct KernelGsp *); - NV_STATUS (*__kgspExecuteBooterLoad__)(struct OBJGPU *, struct KernelGsp *, const NvU64); - NV_STATUS (*__kgspExecuteBooterUnloadIfNeeded__)(struct OBJGPU *, struct KernelGsp *, const NvU64); - NV_STATUS (*__kgspExecuteHsFalcon__)(struct OBJGPU *, struct KernelGsp *, KernelGspFlcnUcode *, struct KernelFalcon *, NvU32 *, NvU32 *); - NV_STATUS (*__kgspWaitForProcessorSuspend__)(struct OBJGPU *, struct KernelGsp *); - NV_STATUS (*__kgspSavePowerMgmtState__)(struct OBJGPU *, struct KernelGsp *); - NV_STATUS (*__kgspRestorePowerMgmtState__)(struct OBJGPU *, struct KernelGsp *); - void (*__kgspFreeSuspendResumeData__)(struct OBJGPU *, struct KernelGsp *); - NV_STATUS (*__kgspWaitForGfwBootOk__)(struct OBJGPU *, struct KernelGsp *); - const BINDATA_ARCHIVE *(*__kgspGetBinArchiveBooterLoadUcode__)(struct KernelGsp *); - const BINDATA_ARCHIVE *(*__kgspGetBinArchiveBooterUnloadUcode__)(struct KernelGsp *); - NvU64 (*__kgspGetMinWprHeapSizeMB__)(struct OBJGPU *, struct KernelGsp *); - NvU64 (*__kgspGetMaxWprHeapSizeMB__)(struct OBJGPU *, struct KernelGsp *); - NvU32 (*__kgspGetFwHeapParamOsCarveoutSize__)(struct OBJGPU *, struct KernelGsp *); - NV_STATUS (*__kgspInitVgpuPartitionLogging__)(struct OBJGPU *, struct KernelGsp *, NvU32, NvU64, NvU64, NvU64, NvU64); - NV_STATUS (*__kgspFreeVgpuPartitionLogging__)(struct OBJGPU *, struct KernelGsp *, NvU32); - const char *(*__kgspGetSignatureSectionNamePrefix__)(struct OBJGPU *, struct KernelGsp *); - NV_STATUS (*__kgspSetupGspFmcArgs__)(struct OBJGPU *, struct KernelGsp *, GSP_FIRMWARE *); - void (*__kgspReadEmem__)(struct KernelGsp *, NvU64, NvU64, void *); - NV_STATUS (*__kgspIssueNotifyOp__)(struct OBJGPU *, struct KernelGsp *, NvU32, NvU32 *, NvU32); - NV_STATUS (*__kgspCheckGspRmCcCleanup__)(struct OBJGPU *, struct KernelGsp *); - NvBool (*__kgspConfigured__)(struct KernelGsp *); - NvU32 (*__kgspPriRead__)(struct KernelGsp *, NvU32); - void (*__kgspRegWrite__)(struct OBJGPU *, struct KernelGsp *, NvU32, NvU32); - NvU32 (*__kgspMaskDmemAddr__)(struct OBJGPU *, struct KernelGsp *, NvU32); - void (*__kgspStateDestroy__)(POBJGPU, struct KernelGsp *); - void (*__kgspVprintf__)(struct KernelGsp *, NvBool, const char *, va_list); - NvBool (*__kgspClearInterrupt__)(struct OBJGPU *, struct KernelGsp *, IntrServiceClearInterruptArguments *); - void (*__kgspPriWrite__)(struct KernelGsp *, NvU32, NvU32); - void *(*__kgspMapBufferDescriptor__)(struct KernelGsp *, CrashCatBufferDescriptor *); - void (*__kgspSyncBufferDescriptor__)(struct KernelGsp *, CrashCatBufferDescriptor *, NvU32, NvU32); - NvU32 (*__kgspRegRead__)(struct OBJGPU *, struct KernelGsp *, NvU32); - NvBool (*__kgspIsPresent__)(POBJGPU, struct KernelGsp *); - NV_STATUS (*__kgspStateLoad__)(POBJGPU, struct KernelGsp *, NvU32); - const NvU32 *(*__kgspGetScratchOffsets__)(struct KernelGsp *, NV_CRASHCAT_SCRATCH_GROUP_ID); - void (*__kgspUnload__)(struct KernelGsp *); - NV_STATUS (*__kgspStateUnload__)(POBJGPU, struct KernelGsp *, NvU32); - NV_STATUS (*__kgspServiceNotificationInterrupt__)(struct OBJGPU *, struct KernelGsp *, IntrServiceServiceNotificationInterruptArguments *); - NvU32 (*__kgspGetWFL0Offset__)(struct KernelGsp *); - NV_STATUS (*__kgspStateInitLocked__)(POBJGPU, struct KernelGsp *); - NV_STATUS (*__kgspStatePreLoad__)(POBJGPU, struct KernelGsp *, NvU32); - NV_STATUS (*__kgspStatePostUnload__)(POBJGPU, struct KernelGsp *, NvU32); - NV_STATUS (*__kgspStatePreUnload__)(POBJGPU, struct KernelGsp *, NvU32); - NV_STATUS (*__kgspStateInitUnlocked__)(POBJGPU, struct KernelGsp *); - void (*__kgspInitMissing__)(POBJGPU, struct KernelGsp *); - NV_STATUS (*__kgspStatePreInitLocked__)(POBJGPU, struct KernelGsp *); - NV_STATUS (*__kgspStatePreInitUnlocked__)(POBJGPU, struct KernelGsp *); - NV_STATUS (*__kgspStatePostLoad__)(POBJGPU, struct KernelGsp *, NvU32); - void (*__kgspUnmapBufferDescriptor__)(struct KernelGsp *, CrashCatBufferDescriptor *); - void (*__kgspReadDmem__)(struct KernelGsp *, NvU32, NvU32, void *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct IntrService *__nvoc_pbase_IntrService; // intrserv super + struct CrashCatEngine *__nvoc_pbase_CrashCatEngine; // crashcatEngine super^3 + struct KernelCrashCatEngine *__nvoc_pbase_KernelCrashCatEngine; // kcrashcatEngine super^2 + struct KernelFalcon *__nvoc_pbase_KernelFalcon; // kflcn super + struct KernelGsp *__nvoc_pbase_KernelGsp; // kgsp + + // Vtable with 82 per-object function pointers + NV_STATUS (*__kgspConstructEngine__)(struct OBJGPU *, struct KernelGsp * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + void (*__kgspRegisterIntrService__)(struct OBJGPU *, struct KernelGsp * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) + NvU32 (*__kgspServiceInterrupt__)(struct OBJGPU *, struct KernelGsp * /*this*/, IntrServiceServiceInterruptArguments *); // virtual override (intrserv) base (intrserv) + void (*__kgspConfigureFalcon__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body + NvBool (*__kgspIsDebugModeEnabled__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body + NV_STATUS (*__kgspAllocBootArgs__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body + void (*__kgspFreeBootArgs__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body + void (*__kgspProgramLibosBootArgsAddr__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (2 hals) body + NV_STATUS (*__kgspSetCmdQueueHead__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32, NvU32); // halified (2 hals) body + NV_STATUS (*__kgspPrepareForBootstrap__)(struct OBJGPU *, struct KernelGsp * /*this*/, GSP_FIRMWARE *); // halified (3 hals) body + NV_STATUS (*__kgspBootstrap__)(struct OBJGPU *, struct KernelGsp * /*this*/, GSP_FIRMWARE *); // halified (3 hals) body + void (*__kgspGetGspRmBootUcodeStorage__)(struct OBJGPU *, struct KernelGsp * /*this*/, BINDATA_STORAGE **, BINDATA_STORAGE **); // halified (4 hals) body + const BINDATA_ARCHIVE * (*__kgspGetBinArchiveGspRmBoot__)(struct KernelGsp * /*this*/); // halified (6 hals) body + const BINDATA_ARCHIVE * (*__kgspGetBinArchiveConcatenatedFMCDesc__)(struct KernelGsp * /*this*/); // halified (3 hals) body + const BINDATA_ARCHIVE * (*__kgspGetBinArchiveConcatenatedFMC__)(struct KernelGsp * /*this*/); // halified (3 hals) body + const BINDATA_ARCHIVE * (*__kgspGetBinArchiveGspRmFmcGfwDebugSigned__)(struct KernelGsp * /*this*/); // halified (3 hals) body + const BINDATA_ARCHIVE * (*__kgspGetBinArchiveGspRmFmcGfwProdSigned__)(struct KernelGsp * /*this*/); // halified (3 hals) body + const BINDATA_ARCHIVE * (*__kgspGetBinArchiveGspRmCcFmcGfwProdSigned__)(struct KernelGsp * /*this*/); // halified (3 hals) body + NV_STATUS (*__kgspCalculateFbLayout__)(struct OBJGPU *, struct KernelGsp * /*this*/, GSP_FIRMWARE *); // halified (3 hals) body + NvU32 (*__kgspGetNonWprHeapSize__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body + NV_STATUS (*__kgspExecuteSequencerCommand__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32, NvU32 *, NvU32); // halified (3 hals) body + NvU32 (*__kgspReadUcodeFuseVersion__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // halified (3 hals) body + NV_STATUS (*__kgspResetHw__)(struct OBJGPU *, struct KernelGsp * /*this*/); // virtual halified (3 hals) override (kflcn) base (kflcn) body + NvBool (*__kgspHealthCheck__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (2 hals) body + NvU32 (*__kgspService__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (2 hals) body + NvBool (*__kgspIsWpr2Up__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body + NvU32 (*__kgspGetFrtsSize__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body + NvU64 (*__kgspGetPrescrubbedTopFbSize__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body + NV_STATUS (*__kgspExtractVbiosFromRom__)(struct OBJGPU *, struct KernelGsp * /*this*/, KernelGspVbiosImg **); // halified (3 hals) body + NV_STATUS (*__kgspPrepareForFwsecFrts__)(struct OBJGPU *, struct KernelGsp * /*this*/, KernelGspFlcnUcode *, const NvU64, KernelGspPreparedFwsecCmd *); // halified (3 hals) body + NV_STATUS (*__kgspPrepareForFwsecSb__)(struct OBJGPU *, struct KernelGsp * /*this*/, KernelGspFlcnUcode *, KernelGspPreparedFwsecCmd *); // halified (3 hals) body + NV_STATUS (*__kgspExecuteFwsec__)(struct OBJGPU *, struct KernelGsp * /*this*/, KernelGspPreparedFwsecCmd *); // halified (3 hals) body + NV_STATUS (*__kgspExecuteScrubberIfNeeded__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body + NV_STATUS (*__kgspExecuteBooterLoad__)(struct OBJGPU *, struct KernelGsp * /*this*/, const NvU64); // halified (3 hals) body + NV_STATUS (*__kgspExecuteBooterUnloadIfNeeded__)(struct OBJGPU *, struct KernelGsp * /*this*/, const NvU64); // halified (3 hals) body + NV_STATUS (*__kgspExecuteHsFalcon__)(struct OBJGPU *, struct KernelGsp * /*this*/, KernelGspFlcnUcode *, struct KernelFalcon *, NvU32 *, NvU32 *); // halified (4 hals) body + NV_STATUS (*__kgspWaitForProcessorSuspend__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (2 hals) body + NV_STATUS (*__kgspSavePowerMgmtState__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (2 hals) body + NV_STATUS (*__kgspRestorePowerMgmtState__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (2 hals) body + void (*__kgspFreeSuspendResumeData__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (2 hals) body + NV_STATUS (*__kgspWaitForGfwBootOk__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body + const BINDATA_ARCHIVE * (*__kgspGetBinArchiveBooterLoadUcode__)(struct KernelGsp * /*this*/); // halified (7 hals) body + const BINDATA_ARCHIVE * (*__kgspGetBinArchiveBooterUnloadUcode__)(struct KernelGsp * /*this*/); // halified (7 hals) body + NvU64 (*__kgspGetMinWprHeapSizeMB__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body + NvU64 (*__kgspGetMaxWprHeapSizeMB__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body + NvU32 (*__kgspGetFwHeapParamOsCarveoutSize__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body + NV_STATUS (*__kgspInitVgpuPartitionLogging__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32, NvU64, NvU64, NvU64, NvU64); // halified (3 hals) body + NV_STATUS (*__kgspFreeVgpuPartitionLogging__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // halified (3 hals) body + const char * (*__kgspGetSignatureSectionNamePrefix__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body + NV_STATUS (*__kgspSetupGspFmcArgs__)(struct OBJGPU *, struct KernelGsp * /*this*/, GSP_FIRMWARE *); // halified (3 hals) body + void (*__kgspReadEmem__)(struct KernelGsp * /*this*/, NvU64, NvU64, void *); // virtual halified (2 hals) override (kcrashcatEngine) base (kflcn) body + NV_STATUS (*__kgspIssueNotifyOp__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32, NvU32 *, NvU32); // halified (3 hals) body + NV_STATUS (*__kgspCheckGspRmCcCleanup__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body + void (*__kgspInitMissing__)(POBJGPU, struct KernelGsp * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgspStatePreInitLocked__)(POBJGPU, struct KernelGsp * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgspStatePreInitUnlocked__)(POBJGPU, struct KernelGsp * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgspStateInitLocked__)(POBJGPU, struct KernelGsp * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgspStateInitUnlocked__)(POBJGPU, struct KernelGsp * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgspStatePreLoad__)(POBJGPU, struct KernelGsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgspStateLoad__)(POBJGPU, struct KernelGsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgspStatePostLoad__)(POBJGPU, struct KernelGsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgspStatePreUnload__)(POBJGPU, struct KernelGsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgspStateUnload__)(POBJGPU, struct KernelGsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgspStatePostUnload__)(POBJGPU, struct KernelGsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__kgspStateDestroy__)(POBJGPU, struct KernelGsp * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__kgspIsPresent__)(POBJGPU, struct KernelGsp * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__kgspClearInterrupt__)(struct OBJGPU *, struct KernelGsp * /*this*/, IntrServiceClearInterruptArguments *); // virtual inherited (intrserv) base (intrserv) + NV_STATUS (*__kgspServiceNotificationInterrupt__)(struct OBJGPU *, struct KernelGsp * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual inherited (intrserv) base (intrserv) + NvU32 (*__kgspRegRead__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // virtual halified (2 hals) inherited (kflcn) base (kflcn) body + void (*__kgspRegWrite__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32, NvU32); // virtual halified (2 hals) inherited (kflcn) base (kflcn) body + NvU32 (*__kgspMaskDmemAddr__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // virtual halified (3 hals) inherited (kflcn) base (kflcn) body + NvBool (*__kgspConfigured__)(struct KernelGsp * /*this*/); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__kgspUnload__)(struct KernelGsp * /*this*/); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__kgspVprintf__)(struct KernelGsp * /*this*/, NvBool, const char *, va_list); // virtual inherited (kcrashcatEngine) base (kflcn) + NvU32 (*__kgspPriRead__)(struct KernelGsp * /*this*/, NvU32); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__kgspPriWrite__)(struct KernelGsp * /*this*/, NvU32, NvU32); // virtual inherited (kcrashcatEngine) base (kflcn) + void * (*__kgspMapBufferDescriptor__)(struct KernelGsp * /*this*/, CrashCatBufferDescriptor *); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__kgspUnmapBufferDescriptor__)(struct KernelGsp * /*this*/, CrashCatBufferDescriptor *); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__kgspSyncBufferDescriptor__)(struct KernelGsp * /*this*/, CrashCatBufferDescriptor *, NvU32, NvU32); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__kgspReadDmem__)(struct KernelGsp * /*this*/, NvU32, NvU32, void *); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + const NvU32 * (*__kgspGetScratchOffsets__)(struct KernelGsp * /*this*/, NV_CRASHCAT_SCRATCH_GROUP_ID); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + NvU32 (*__kgspGetWFL0Offset__)(struct KernelGsp * /*this*/); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + + // Data members struct MESSAGE_QUEUE_COLLECTION *pMQCollection; struct OBJRPC *pRpc; - struct OBJRPC *pLocklessRpc; char vbiosVersionStr[16]; KernelGspFlcnUcode *pFwsecUcode; KernelGspFlcnUcode *pScrubberUcode; @@ -451,7 +469,6 @@ struct KernelGsp { void *pProfilerSamplesMDPriv; void *pProfilerSamples; GspStaticConfigInfo gspStaticInfo; - NvBool bIsTaskIsrQueueRequired; NvBool bPartitionedFmc; NvBool bScrubberUcodeSupported; NvU32 fwHeapParamBaseSize; @@ -468,6 +485,7 @@ typedef struct KernelGsp KernelGsp; #define __nvoc_class_id_KernelGsp 0x311d4e #endif /* __nvoc_class_id_KernelGsp */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGsp; #define __staticCast_KernelGsp(pThis) \ @@ -480,6 +498,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGsp; ((KernelGsp*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelGsp))) #endif //__nvoc_kernel_gsp_h_disabled +// Property macros #define PDB_PROP_KGSP_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_KGSP_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -489,872 +508,964 @@ NV_STATUS __nvoc_objCreate_KernelGsp(KernelGsp**, Dynamic*, NvU32); #define __objCreate_KernelGsp(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelGsp((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define kgspConstructEngine(pGpu, pKernelGsp, arg0) kgspConstructEngine_DISPATCH(pGpu, pKernelGsp, arg0) + +// Wrapper macros +#define kgspConstructEngine_FNPTR(pKernelGsp) pKernelGsp->__kgspConstructEngine__ +#define kgspConstructEngine(pGpu, pKernelGsp, arg3) kgspConstructEngine_DISPATCH(pGpu, pKernelGsp, arg3) +#define kgspRegisterIntrService_FNPTR(pKernelGsp) pKernelGsp->__kgspRegisterIntrService__ #define kgspRegisterIntrService(pGpu, pKernelGsp, pRecords) kgspRegisterIntrService_DISPATCH(pGpu, pKernelGsp, pRecords) +#define kgspServiceInterrupt_FNPTR(pKernelGsp) pKernelGsp->__kgspServiceInterrupt__ #define kgspServiceInterrupt(pGpu, pKernelGsp, pParams) kgspServiceInterrupt_DISPATCH(pGpu, pKernelGsp, pParams) +#define kgspConfigureFalcon_FNPTR(pKernelGsp) pKernelGsp->__kgspConfigureFalcon__ #define kgspConfigureFalcon(pGpu, pKernelGsp) kgspConfigureFalcon_DISPATCH(pGpu, pKernelGsp) #define kgspConfigureFalcon_HAL(pGpu, pKernelGsp) kgspConfigureFalcon_DISPATCH(pGpu, pKernelGsp) +#define kgspIsDebugModeEnabled_FNPTR(pKernelGsp) pKernelGsp->__kgspIsDebugModeEnabled__ #define kgspIsDebugModeEnabled(pGpu, pKernelGsp) kgspIsDebugModeEnabled_DISPATCH(pGpu, pKernelGsp) #define kgspIsDebugModeEnabled_HAL(pGpu, pKernelGsp) kgspIsDebugModeEnabled_DISPATCH(pGpu, pKernelGsp) +#define kgspAllocBootArgs_FNPTR(pKernelGsp) pKernelGsp->__kgspAllocBootArgs__ #define kgspAllocBootArgs(pGpu, pKernelGsp) kgspAllocBootArgs_DISPATCH(pGpu, pKernelGsp) #define kgspAllocBootArgs_HAL(pGpu, pKernelGsp) kgspAllocBootArgs_DISPATCH(pGpu, pKernelGsp) +#define kgspFreeBootArgs_FNPTR(pKernelGsp) pKernelGsp->__kgspFreeBootArgs__ #define kgspFreeBootArgs(pGpu, pKernelGsp) kgspFreeBootArgs_DISPATCH(pGpu, pKernelGsp) #define kgspFreeBootArgs_HAL(pGpu, pKernelGsp) kgspFreeBootArgs_DISPATCH(pGpu, pKernelGsp) +#define kgspProgramLibosBootArgsAddr_FNPTR(pKernelGsp) pKernelGsp->__kgspProgramLibosBootArgsAddr__ #define kgspProgramLibosBootArgsAddr(pGpu, pKernelGsp) kgspProgramLibosBootArgsAddr_DISPATCH(pGpu, pKernelGsp) #define kgspProgramLibosBootArgsAddr_HAL(pGpu, pKernelGsp) kgspProgramLibosBootArgsAddr_DISPATCH(pGpu, pKernelGsp) +#define kgspSetCmdQueueHead_FNPTR(pKernelGsp) pKernelGsp->__kgspSetCmdQueueHead__ #define kgspSetCmdQueueHead(pGpu, pKernelGsp, queueIdx, value) kgspSetCmdQueueHead_DISPATCH(pGpu, pKernelGsp, queueIdx, value) #define kgspSetCmdQueueHead_HAL(pGpu, pKernelGsp, queueIdx, value) kgspSetCmdQueueHead_DISPATCH(pGpu, pKernelGsp, queueIdx, value) +#define kgspPrepareForBootstrap_FNPTR(pKernelGsp) pKernelGsp->__kgspPrepareForBootstrap__ #define kgspPrepareForBootstrap(pGpu, pKernelGsp, pGspFw) kgspPrepareForBootstrap_DISPATCH(pGpu, pKernelGsp, pGspFw) #define kgspPrepareForBootstrap_HAL(pGpu, pKernelGsp, pGspFw) kgspPrepareForBootstrap_DISPATCH(pGpu, pKernelGsp, pGspFw) +#define kgspBootstrap_FNPTR(pKernelGsp) pKernelGsp->__kgspBootstrap__ #define kgspBootstrap(pGpu, pKernelGsp, pGspFw) kgspBootstrap_DISPATCH(pGpu, pKernelGsp, pGspFw) #define kgspBootstrap_HAL(pGpu, pKernelGsp, pGspFw) kgspBootstrap_DISPATCH(pGpu, pKernelGsp, pGspFw) +#define kgspGetGspRmBootUcodeStorage_FNPTR(pKernelGsp) pKernelGsp->__kgspGetGspRmBootUcodeStorage__ #define kgspGetGspRmBootUcodeStorage(pGpu, pKernelGsp, ppBinStorageImage, ppBinStorageDesc) kgspGetGspRmBootUcodeStorage_DISPATCH(pGpu, pKernelGsp, ppBinStorageImage, ppBinStorageDesc) #define kgspGetGspRmBootUcodeStorage_HAL(pGpu, pKernelGsp, ppBinStorageImage, ppBinStorageDesc) kgspGetGspRmBootUcodeStorage_DISPATCH(pGpu, pKernelGsp, ppBinStorageImage, ppBinStorageDesc) +#define kgspGetBinArchiveGspRmBoot_FNPTR(pKernelGsp) pKernelGsp->__kgspGetBinArchiveGspRmBoot__ #define kgspGetBinArchiveGspRmBoot(pKernelGsp) kgspGetBinArchiveGspRmBoot_DISPATCH(pKernelGsp) #define kgspGetBinArchiveGspRmBoot_HAL(pKernelGsp) kgspGetBinArchiveGspRmBoot_DISPATCH(pKernelGsp) +#define kgspGetBinArchiveConcatenatedFMCDesc_FNPTR(pKernelGsp) pKernelGsp->__kgspGetBinArchiveConcatenatedFMCDesc__ #define kgspGetBinArchiveConcatenatedFMCDesc(pKernelGsp) kgspGetBinArchiveConcatenatedFMCDesc_DISPATCH(pKernelGsp) #define kgspGetBinArchiveConcatenatedFMCDesc_HAL(pKernelGsp) kgspGetBinArchiveConcatenatedFMCDesc_DISPATCH(pKernelGsp) +#define kgspGetBinArchiveConcatenatedFMC_FNPTR(pKernelGsp) pKernelGsp->__kgspGetBinArchiveConcatenatedFMC__ #define kgspGetBinArchiveConcatenatedFMC(pKernelGsp) kgspGetBinArchiveConcatenatedFMC_DISPATCH(pKernelGsp) #define kgspGetBinArchiveConcatenatedFMC_HAL(pKernelGsp) kgspGetBinArchiveConcatenatedFMC_DISPATCH(pKernelGsp) +#define kgspGetBinArchiveGspRmFmcGfwDebugSigned_FNPTR(pKernelGsp) pKernelGsp->__kgspGetBinArchiveGspRmFmcGfwDebugSigned__ #define kgspGetBinArchiveGspRmFmcGfwDebugSigned(pKernelGsp) kgspGetBinArchiveGspRmFmcGfwDebugSigned_DISPATCH(pKernelGsp) #define kgspGetBinArchiveGspRmFmcGfwDebugSigned_HAL(pKernelGsp) kgspGetBinArchiveGspRmFmcGfwDebugSigned_DISPATCH(pKernelGsp) +#define kgspGetBinArchiveGspRmFmcGfwProdSigned_FNPTR(pKernelGsp) pKernelGsp->__kgspGetBinArchiveGspRmFmcGfwProdSigned__ #define kgspGetBinArchiveGspRmFmcGfwProdSigned(pKernelGsp) kgspGetBinArchiveGspRmFmcGfwProdSigned_DISPATCH(pKernelGsp) #define kgspGetBinArchiveGspRmFmcGfwProdSigned_HAL(pKernelGsp) kgspGetBinArchiveGspRmFmcGfwProdSigned_DISPATCH(pKernelGsp) +#define kgspGetBinArchiveGspRmCcFmcGfwProdSigned_FNPTR(pKernelGsp) pKernelGsp->__kgspGetBinArchiveGspRmCcFmcGfwProdSigned__ #define kgspGetBinArchiveGspRmCcFmcGfwProdSigned(pKernelGsp) kgspGetBinArchiveGspRmCcFmcGfwProdSigned_DISPATCH(pKernelGsp) #define kgspGetBinArchiveGspRmCcFmcGfwProdSigned_HAL(pKernelGsp) kgspGetBinArchiveGspRmCcFmcGfwProdSigned_DISPATCH(pKernelGsp) +#define kgspCalculateFbLayout_FNPTR(pKernelGsp) pKernelGsp->__kgspCalculateFbLayout__ #define kgspCalculateFbLayout(pGpu, pKernelGsp, pGspFw) kgspCalculateFbLayout_DISPATCH(pGpu, pKernelGsp, pGspFw) #define kgspCalculateFbLayout_HAL(pGpu, pKernelGsp, pGspFw) kgspCalculateFbLayout_DISPATCH(pGpu, pKernelGsp, pGspFw) +#define kgspGetNonWprHeapSize_FNPTR(pKernelGsp) pKernelGsp->__kgspGetNonWprHeapSize__ #define kgspGetNonWprHeapSize(pGpu, pKernelGsp) kgspGetNonWprHeapSize_DISPATCH(pGpu, pKernelGsp) #define kgspGetNonWprHeapSize_HAL(pGpu, pKernelGsp) kgspGetNonWprHeapSize_DISPATCH(pGpu, pKernelGsp) +#define kgspExecuteSequencerCommand_FNPTR(pKernelGsp) pKernelGsp->__kgspExecuteSequencerCommand__ #define kgspExecuteSequencerCommand(pGpu, pKernelGsp, opCode, pPayLoad, payloadSize) kgspExecuteSequencerCommand_DISPATCH(pGpu, pKernelGsp, opCode, pPayLoad, payloadSize) #define kgspExecuteSequencerCommand_HAL(pGpu, pKernelGsp, opCode, pPayLoad, payloadSize) kgspExecuteSequencerCommand_DISPATCH(pGpu, pKernelGsp, opCode, pPayLoad, payloadSize) +#define kgspReadUcodeFuseVersion_FNPTR(pKernelGsp) pKernelGsp->__kgspReadUcodeFuseVersion__ #define kgspReadUcodeFuseVersion(pGpu, pKernelGsp, ucodeId) kgspReadUcodeFuseVersion_DISPATCH(pGpu, pKernelGsp, ucodeId) #define kgspReadUcodeFuseVersion_HAL(pGpu, pKernelGsp, ucodeId) kgspReadUcodeFuseVersion_DISPATCH(pGpu, pKernelGsp, ucodeId) +#define kgspResetHw_FNPTR(pKernelGsp) pKernelGsp->__kgspResetHw__ #define kgspResetHw(pGpu, pKernelGsp) kgspResetHw_DISPATCH(pGpu, pKernelGsp) #define kgspResetHw_HAL(pGpu, pKernelGsp) kgspResetHw_DISPATCH(pGpu, pKernelGsp) +#define kgspHealthCheck_FNPTR(pKernelGsp) pKernelGsp->__kgspHealthCheck__ #define kgspHealthCheck(pGpu, pKernelGsp) kgspHealthCheck_DISPATCH(pGpu, pKernelGsp) #define kgspHealthCheck_HAL(pGpu, pKernelGsp) kgspHealthCheck_DISPATCH(pGpu, pKernelGsp) +#define kgspService_FNPTR(pKernelGsp) pKernelGsp->__kgspService__ #define kgspService(pGpu, pKernelGsp) kgspService_DISPATCH(pGpu, pKernelGsp) #define kgspService_HAL(pGpu, pKernelGsp) kgspService_DISPATCH(pGpu, pKernelGsp) +#define kgspIsWpr2Up_FNPTR(pKernelGsp) pKernelGsp->__kgspIsWpr2Up__ #define kgspIsWpr2Up(pGpu, pKernelGsp) kgspIsWpr2Up_DISPATCH(pGpu, pKernelGsp) #define kgspIsWpr2Up_HAL(pGpu, pKernelGsp) kgspIsWpr2Up_DISPATCH(pGpu, pKernelGsp) +#define kgspGetFrtsSize_FNPTR(pKernelGsp) pKernelGsp->__kgspGetFrtsSize__ #define kgspGetFrtsSize(pGpu, pKernelGsp) kgspGetFrtsSize_DISPATCH(pGpu, pKernelGsp) #define kgspGetFrtsSize_HAL(pGpu, pKernelGsp) kgspGetFrtsSize_DISPATCH(pGpu, pKernelGsp) +#define kgspGetPrescrubbedTopFbSize_FNPTR(pKernelGsp) pKernelGsp->__kgspGetPrescrubbedTopFbSize__ #define kgspGetPrescrubbedTopFbSize(pGpu, pKernelGsp) kgspGetPrescrubbedTopFbSize_DISPATCH(pGpu, pKernelGsp) #define kgspGetPrescrubbedTopFbSize_HAL(pGpu, pKernelGsp) kgspGetPrescrubbedTopFbSize_DISPATCH(pGpu, pKernelGsp) +#define kgspExtractVbiosFromRom_FNPTR(pKernelGsp) pKernelGsp->__kgspExtractVbiosFromRom__ #define kgspExtractVbiosFromRom(pGpu, pKernelGsp, ppVbiosImg) kgspExtractVbiosFromRom_DISPATCH(pGpu, pKernelGsp, ppVbiosImg) #define kgspExtractVbiosFromRom_HAL(pGpu, pKernelGsp, ppVbiosImg) kgspExtractVbiosFromRom_DISPATCH(pGpu, pKernelGsp, ppVbiosImg) +#define kgspPrepareForFwsecFrts_FNPTR(pKernelGsp) pKernelGsp->__kgspPrepareForFwsecFrts__ #define kgspPrepareForFwsecFrts(pGpu, pKernelGsp, pFwsecUcode, frtsOffset, preparedCmd) kgspPrepareForFwsecFrts_DISPATCH(pGpu, pKernelGsp, pFwsecUcode, frtsOffset, preparedCmd) #define kgspPrepareForFwsecFrts_HAL(pGpu, pKernelGsp, pFwsecUcode, frtsOffset, preparedCmd) kgspPrepareForFwsecFrts_DISPATCH(pGpu, pKernelGsp, pFwsecUcode, frtsOffset, preparedCmd) +#define kgspPrepareForFwsecSb_FNPTR(pKernelGsp) pKernelGsp->__kgspPrepareForFwsecSb__ #define kgspPrepareForFwsecSb(pGpu, pKernelGsp, pFwsecUcode, preparedCmd) kgspPrepareForFwsecSb_DISPATCH(pGpu, pKernelGsp, pFwsecUcode, preparedCmd) #define kgspPrepareForFwsecSb_HAL(pGpu, pKernelGsp, pFwsecUcode, preparedCmd) kgspPrepareForFwsecSb_DISPATCH(pGpu, pKernelGsp, pFwsecUcode, preparedCmd) +#define kgspExecuteFwsec_FNPTR(pKernelGsp) pKernelGsp->__kgspExecuteFwsec__ #define kgspExecuteFwsec(pGpu, pKernelGsp, preparedCmd) kgspExecuteFwsec_DISPATCH(pGpu, pKernelGsp, preparedCmd) #define kgspExecuteFwsec_HAL(pGpu, pKernelGsp, preparedCmd) kgspExecuteFwsec_DISPATCH(pGpu, pKernelGsp, preparedCmd) +#define kgspExecuteScrubberIfNeeded_FNPTR(pKernelGsp) pKernelGsp->__kgspExecuteScrubberIfNeeded__ #define kgspExecuteScrubberIfNeeded(pGpu, pKernelGsp) kgspExecuteScrubberIfNeeded_DISPATCH(pGpu, pKernelGsp) #define kgspExecuteScrubberIfNeeded_HAL(pGpu, pKernelGsp) kgspExecuteScrubberIfNeeded_DISPATCH(pGpu, pKernelGsp) +#define kgspExecuteBooterLoad_FNPTR(pKernelGsp) pKernelGsp->__kgspExecuteBooterLoad__ #define kgspExecuteBooterLoad(pGpu, pKernelGsp, sysmemAddrOfData) kgspExecuteBooterLoad_DISPATCH(pGpu, pKernelGsp, sysmemAddrOfData) #define kgspExecuteBooterLoad_HAL(pGpu, pKernelGsp, sysmemAddrOfData) kgspExecuteBooterLoad_DISPATCH(pGpu, pKernelGsp, sysmemAddrOfData) +#define kgspExecuteBooterUnloadIfNeeded_FNPTR(pKernelGsp) pKernelGsp->__kgspExecuteBooterUnloadIfNeeded__ #define kgspExecuteBooterUnloadIfNeeded(pGpu, pKernelGsp, sysmemAddrOfSuspendResumeData) kgspExecuteBooterUnloadIfNeeded_DISPATCH(pGpu, pKernelGsp, sysmemAddrOfSuspendResumeData) #define kgspExecuteBooterUnloadIfNeeded_HAL(pGpu, pKernelGsp, sysmemAddrOfSuspendResumeData) kgspExecuteBooterUnloadIfNeeded_DISPATCH(pGpu, pKernelGsp, sysmemAddrOfSuspendResumeData) +#define kgspExecuteHsFalcon_FNPTR(pKernelGsp) pKernelGsp->__kgspExecuteHsFalcon__ #define kgspExecuteHsFalcon(pGpu, pKernelGsp, pFlcnUcode, pKernelFlcn, pMailbox0, pMailbox1) kgspExecuteHsFalcon_DISPATCH(pGpu, pKernelGsp, pFlcnUcode, pKernelFlcn, pMailbox0, pMailbox1) #define kgspExecuteHsFalcon_HAL(pGpu, pKernelGsp, pFlcnUcode, pKernelFlcn, pMailbox0, pMailbox1) kgspExecuteHsFalcon_DISPATCH(pGpu, pKernelGsp, pFlcnUcode, pKernelFlcn, pMailbox0, pMailbox1) +#define kgspWaitForProcessorSuspend_FNPTR(pKernelGsp) pKernelGsp->__kgspWaitForProcessorSuspend__ #define kgspWaitForProcessorSuspend(pGpu, pKernelGsp) kgspWaitForProcessorSuspend_DISPATCH(pGpu, pKernelGsp) #define kgspWaitForProcessorSuspend_HAL(pGpu, pKernelGsp) kgspWaitForProcessorSuspend_DISPATCH(pGpu, pKernelGsp) +#define kgspSavePowerMgmtState_FNPTR(pKernelGsp) pKernelGsp->__kgspSavePowerMgmtState__ #define kgspSavePowerMgmtState(pGpu, pKernelGsp) kgspSavePowerMgmtState_DISPATCH(pGpu, pKernelGsp) #define kgspSavePowerMgmtState_HAL(pGpu, pKernelGsp) kgspSavePowerMgmtState_DISPATCH(pGpu, pKernelGsp) +#define kgspRestorePowerMgmtState_FNPTR(pKernelGsp) pKernelGsp->__kgspRestorePowerMgmtState__ #define kgspRestorePowerMgmtState(pGpu, pKernelGsp) kgspRestorePowerMgmtState_DISPATCH(pGpu, pKernelGsp) #define kgspRestorePowerMgmtState_HAL(pGpu, pKernelGsp) kgspRestorePowerMgmtState_DISPATCH(pGpu, pKernelGsp) +#define kgspFreeSuspendResumeData_FNPTR(pKernelGsp) pKernelGsp->__kgspFreeSuspendResumeData__ #define kgspFreeSuspendResumeData(pGpu, pKernelGsp) kgspFreeSuspendResumeData_DISPATCH(pGpu, pKernelGsp) #define kgspFreeSuspendResumeData_HAL(pGpu, pKernelGsp) kgspFreeSuspendResumeData_DISPATCH(pGpu, pKernelGsp) +#define kgspWaitForGfwBootOk_FNPTR(pKernelGsp) pKernelGsp->__kgspWaitForGfwBootOk__ #define kgspWaitForGfwBootOk(pGpu, pKernelGsp) kgspWaitForGfwBootOk_DISPATCH(pGpu, pKernelGsp) #define kgspWaitForGfwBootOk_HAL(pGpu, pKernelGsp) kgspWaitForGfwBootOk_DISPATCH(pGpu, pKernelGsp) +#define kgspGetBinArchiveBooterLoadUcode_FNPTR(pKernelGsp) pKernelGsp->__kgspGetBinArchiveBooterLoadUcode__ #define kgspGetBinArchiveBooterLoadUcode(pKernelGsp) kgspGetBinArchiveBooterLoadUcode_DISPATCH(pKernelGsp) #define kgspGetBinArchiveBooterLoadUcode_HAL(pKernelGsp) kgspGetBinArchiveBooterLoadUcode_DISPATCH(pKernelGsp) +#define kgspGetBinArchiveBooterUnloadUcode_FNPTR(pKernelGsp) pKernelGsp->__kgspGetBinArchiveBooterUnloadUcode__ #define kgspGetBinArchiveBooterUnloadUcode(pKernelGsp) kgspGetBinArchiveBooterUnloadUcode_DISPATCH(pKernelGsp) #define kgspGetBinArchiveBooterUnloadUcode_HAL(pKernelGsp) kgspGetBinArchiveBooterUnloadUcode_DISPATCH(pKernelGsp) +#define kgspGetMinWprHeapSizeMB_FNPTR(pKernelGsp) pKernelGsp->__kgspGetMinWprHeapSizeMB__ #define kgspGetMinWprHeapSizeMB(pGpu, pKernelGsp) kgspGetMinWprHeapSizeMB_DISPATCH(pGpu, pKernelGsp) #define kgspGetMinWprHeapSizeMB_HAL(pGpu, pKernelGsp) kgspGetMinWprHeapSizeMB_DISPATCH(pGpu, pKernelGsp) +#define kgspGetMaxWprHeapSizeMB_FNPTR(pKernelGsp) pKernelGsp->__kgspGetMaxWprHeapSizeMB__ #define kgspGetMaxWprHeapSizeMB(pGpu, pKernelGsp) kgspGetMaxWprHeapSizeMB_DISPATCH(pGpu, pKernelGsp) #define kgspGetMaxWprHeapSizeMB_HAL(pGpu, pKernelGsp) kgspGetMaxWprHeapSizeMB_DISPATCH(pGpu, pKernelGsp) +#define kgspGetFwHeapParamOsCarveoutSize_FNPTR(pKernelGsp) pKernelGsp->__kgspGetFwHeapParamOsCarveoutSize__ #define kgspGetFwHeapParamOsCarveoutSize(pGpu, pKernelGsp) kgspGetFwHeapParamOsCarveoutSize_DISPATCH(pGpu, pKernelGsp) #define kgspGetFwHeapParamOsCarveoutSize_HAL(pGpu, pKernelGsp) kgspGetFwHeapParamOsCarveoutSize_DISPATCH(pGpu, pKernelGsp) +#define kgspInitVgpuPartitionLogging_FNPTR(pKernelGsp) pKernelGsp->__kgspInitVgpuPartitionLogging__ #define kgspInitVgpuPartitionLogging(pGpu, pKernelGsp, gfid, initTaskLogBUffOffset, initTaskLogBUffSize, vgpuTaskLogBUffOffset, vgpuTaskLogBuffSize) kgspInitVgpuPartitionLogging_DISPATCH(pGpu, pKernelGsp, gfid, initTaskLogBUffOffset, initTaskLogBUffSize, vgpuTaskLogBUffOffset, vgpuTaskLogBuffSize) #define kgspInitVgpuPartitionLogging_HAL(pGpu, pKernelGsp, gfid, initTaskLogBUffOffset, initTaskLogBUffSize, vgpuTaskLogBUffOffset, vgpuTaskLogBuffSize) kgspInitVgpuPartitionLogging_DISPATCH(pGpu, pKernelGsp, gfid, initTaskLogBUffOffset, initTaskLogBUffSize, vgpuTaskLogBUffOffset, vgpuTaskLogBuffSize) +#define kgspFreeVgpuPartitionLogging_FNPTR(pKernelGsp) pKernelGsp->__kgspFreeVgpuPartitionLogging__ #define kgspFreeVgpuPartitionLogging(pGpu, pKernelGsp, gfid) kgspFreeVgpuPartitionLogging_DISPATCH(pGpu, pKernelGsp, gfid) #define kgspFreeVgpuPartitionLogging_HAL(pGpu, pKernelGsp, gfid) kgspFreeVgpuPartitionLogging_DISPATCH(pGpu, pKernelGsp, gfid) +#define kgspGetSignatureSectionNamePrefix_FNPTR(pKernelGsp) pKernelGsp->__kgspGetSignatureSectionNamePrefix__ #define kgspGetSignatureSectionNamePrefix(pGpu, pKernelGsp) kgspGetSignatureSectionNamePrefix_DISPATCH(pGpu, pKernelGsp) #define kgspGetSignatureSectionNamePrefix_HAL(pGpu, pKernelGsp) kgspGetSignatureSectionNamePrefix_DISPATCH(pGpu, pKernelGsp) +#define kgspSetupGspFmcArgs_FNPTR(pKernelGsp) pKernelGsp->__kgspSetupGspFmcArgs__ #define kgspSetupGspFmcArgs(pGpu, pKernelGsp, pGspFw) kgspSetupGspFmcArgs_DISPATCH(pGpu, pKernelGsp, pGspFw) #define kgspSetupGspFmcArgs_HAL(pGpu, pKernelGsp, pGspFw) kgspSetupGspFmcArgs_DISPATCH(pGpu, pKernelGsp, pGspFw) +#define kgspReadEmem_FNPTR(pKernelGsp) pKernelGsp->__kgspReadEmem__ #define kgspReadEmem(pKernelGsp, offset, size, pBuf) kgspReadEmem_DISPATCH(pKernelGsp, offset, size, pBuf) #define kgspReadEmem_HAL(pKernelGsp, offset, size, pBuf) kgspReadEmem_DISPATCH(pKernelGsp, offset, size, pBuf) +#define kgspIssueNotifyOp_FNPTR(pKernelGsp) pKernelGsp->__kgspIssueNotifyOp__ #define kgspIssueNotifyOp(pGpu, pKernelGsp, opCode, pArgs, argc) kgspIssueNotifyOp_DISPATCH(pGpu, pKernelGsp, opCode, pArgs, argc) #define kgspIssueNotifyOp_HAL(pGpu, pKernelGsp, opCode, pArgs, argc) kgspIssueNotifyOp_DISPATCH(pGpu, pKernelGsp, opCode, pArgs, argc) +#define kgspCheckGspRmCcCleanup_FNPTR(pKernelGsp) pKernelGsp->__kgspCheckGspRmCcCleanup__ #define kgspCheckGspRmCcCleanup(pGpu, pKernelGsp) kgspCheckGspRmCcCleanup_DISPATCH(pGpu, pKernelGsp) #define kgspCheckGspRmCcCleanup_HAL(pGpu, pKernelGsp) kgspCheckGspRmCcCleanup_DISPATCH(pGpu, pKernelGsp) -#define kgspConfigured(arg0) kgspConfigured_DISPATCH(arg0) -#define kgspPriRead(arg0, offset) kgspPriRead_DISPATCH(arg0, offset) -#define kgspRegWrite(pGpu, pKernelFlcn, offset, data) kgspRegWrite_DISPATCH(pGpu, pKernelFlcn, offset, data) -#define kgspMaskDmemAddr(pGpu, pKernelFlcn, addr) kgspMaskDmemAddr_DISPATCH(pGpu, pKernelFlcn, addr) -#define kgspStateDestroy(pGpu, pEngstate) kgspStateDestroy_DISPATCH(pGpu, pEngstate) -#define kgspVprintf(arg0, bReportStart, fmt, args) kgspVprintf_DISPATCH(arg0, bReportStart, fmt, args) -#define kgspClearInterrupt(pGpu, pIntrService, pParams) kgspClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define kgspPriWrite(arg0, offset, data) kgspPriWrite_DISPATCH(arg0, offset, data) -#define kgspMapBufferDescriptor(arg0, pBufDesc) kgspMapBufferDescriptor_DISPATCH(arg0, pBufDesc) -#define kgspSyncBufferDescriptor(arg0, pBufDesc, offset, size) kgspSyncBufferDescriptor_DISPATCH(arg0, pBufDesc, offset, size) -#define kgspRegRead(pGpu, pKernelFlcn, offset) kgspRegRead_DISPATCH(pGpu, pKernelFlcn, offset) -#define kgspIsPresent(pGpu, pEngstate) kgspIsPresent_DISPATCH(pGpu, pEngstate) -#define kgspStateLoad(pGpu, pEngstate, arg0) kgspStateLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kgspGetScratchOffsets(arg0, scratchGroupId) kgspGetScratchOffsets_DISPATCH(arg0, scratchGroupId) -#define kgspUnload(arg0) kgspUnload_DISPATCH(arg0) -#define kgspStateUnload(pGpu, pEngstate, arg0) kgspStateUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kgspServiceNotificationInterrupt(pGpu, pIntrService, pParams) kgspServiceNotificationInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define kgspGetWFL0Offset(arg0) kgspGetWFL0Offset_DISPATCH(arg0) -#define kgspStateInitLocked(pGpu, pEngstate) kgspStateInitLocked_DISPATCH(pGpu, pEngstate) -#define kgspStatePreLoad(pGpu, pEngstate, arg0) kgspStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kgspStatePostUnload(pGpu, pEngstate, arg0) kgspStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kgspStatePreUnload(pGpu, pEngstate, arg0) kgspStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kgspStateInitUnlocked(pGpu, pEngstate) kgspStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kgspInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define kgspInitMissing(pGpu, pEngstate) kgspInitMissing_DISPATCH(pGpu, pEngstate) +#define kgspStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define kgspStatePreInitLocked(pGpu, pEngstate) kgspStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define kgspStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define kgspStatePreInitUnlocked(pGpu, pEngstate) kgspStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kgspStatePostLoad(pGpu, pEngstate, arg0) kgspStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kgspUnmapBufferDescriptor(arg0, pBufDesc) kgspUnmapBufferDescriptor_DISPATCH(arg0, pBufDesc) -#define kgspReadDmem(arg0, offset, size, pBuf) kgspReadDmem_DISPATCH(arg0, offset, size, pBuf) -NV_STATUS kgspConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, ENGDESCRIPTOR arg0); - -static inline NV_STATUS kgspConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, ENGDESCRIPTOR arg0) { - return pKernelGsp->__kgspConstructEngine__(pGpu, pKernelGsp, arg0); -} - -void kgspRegisterIntrService_IMPL(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, IntrServiceRecord pRecords[171]); - -static inline void kgspRegisterIntrService_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, IntrServiceRecord pRecords[171]) { +#define kgspStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define kgspStateInitLocked(pGpu, pEngstate) kgspStateInitLocked_DISPATCH(pGpu, pEngstate) +#define kgspStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kgspStateInitUnlocked(pGpu, pEngstate) kgspStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kgspStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kgspStatePreLoad(pGpu, pEngstate, arg3) kgspStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kgspStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define kgspStateLoad(pGpu, pEngstate, arg3) kgspStateLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kgspStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kgspStatePostLoad(pGpu, pEngstate, arg3) kgspStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kgspStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kgspStatePreUnload(pGpu, pEngstate, arg3) kgspStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kgspStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define kgspStateUnload(pGpu, pEngstate, arg3) kgspStateUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kgspStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kgspStatePostUnload(pGpu, pEngstate, arg3) kgspStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kgspStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define kgspStateDestroy(pGpu, pEngstate) kgspStateDestroy_DISPATCH(pGpu, pEngstate) +#define kgspIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define kgspIsPresent(pGpu, pEngstate) kgspIsPresent_DISPATCH(pGpu, pEngstate) +#define kgspClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservClearInterrupt__ +#define kgspClearInterrupt(pGpu, pIntrService, pParams) kgspClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) +#define kgspServiceNotificationInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ +#define kgspServiceNotificationInterrupt(pGpu, pIntrService, pParams) kgspServiceNotificationInterrupt_DISPATCH(pGpu, pIntrService, pParams) +#define kgspRegRead_FNPTR(pKernelFlcn) pKernelFlcn->__nvoc_base_KernelFalcon.__kflcnRegRead__ +#define kgspRegRead(pGpu, pKernelFlcn, offset) kgspRegRead_DISPATCH(pGpu, pKernelFlcn, offset) +#define kgspRegRead_HAL(pGpu, pKernelFlcn, offset) kgspRegRead_DISPATCH(pGpu, pKernelFlcn, offset) +#define kgspRegWrite_FNPTR(pKernelFlcn) pKernelFlcn->__nvoc_base_KernelFalcon.__kflcnRegWrite__ +#define kgspRegWrite(pGpu, pKernelFlcn, offset, data) kgspRegWrite_DISPATCH(pGpu, pKernelFlcn, offset, data) +#define kgspRegWrite_HAL(pGpu, pKernelFlcn, offset, data) kgspRegWrite_DISPATCH(pGpu, pKernelFlcn, offset, data) +#define kgspMaskDmemAddr_FNPTR(pKernelFlcn) pKernelFlcn->__nvoc_base_KernelFalcon.__kflcnMaskDmemAddr__ +#define kgspMaskDmemAddr(pGpu, pKernelFlcn, addr) kgspMaskDmemAddr_DISPATCH(pGpu, pKernelFlcn, addr) +#define kgspMaskDmemAddr_HAL(pGpu, pKernelFlcn, addr) kgspMaskDmemAddr_DISPATCH(pGpu, pKernelFlcn, addr) +#define kgspConfigured_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineConfigured__ +#define kgspConfigured(arg_this) kgspConfigured_DISPATCH(arg_this) +#define kgspUnload_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineUnload__ +#define kgspUnload(arg_this) kgspUnload_DISPATCH(arg_this) +#define kgspVprintf_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineVprintf__ +#define kgspVprintf(arg_this, bReportStart, fmt, args) kgspVprintf_DISPATCH(arg_this, bReportStart, fmt, args) +#define kgspPriRead_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEnginePriRead__ +#define kgspPriRead(arg_this, offset) kgspPriRead_DISPATCH(arg_this, offset) +#define kgspPriWrite_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEnginePriWrite__ +#define kgspPriWrite(arg_this, offset, data) kgspPriWrite_DISPATCH(arg_this, offset, data) +#define kgspMapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineMapBufferDescriptor__ +#define kgspMapBufferDescriptor(arg_this, pBufDesc) kgspMapBufferDescriptor_DISPATCH(arg_this, pBufDesc) +#define kgspUnmapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineUnmapBufferDescriptor__ +#define kgspUnmapBufferDescriptor(arg_this, pBufDesc) kgspUnmapBufferDescriptor_DISPATCH(arg_this, pBufDesc) +#define kgspSyncBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineSyncBufferDescriptor__ +#define kgspSyncBufferDescriptor(arg_this, pBufDesc, offset, size) kgspSyncBufferDescriptor_DISPATCH(arg_this, pBufDesc, offset, size) +#define kgspReadDmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineReadDmem__ +#define kgspReadDmem(arg_this, offset, size, pBuf) kgspReadDmem_DISPATCH(arg_this, offset, size, pBuf) +#define kgspReadDmem_HAL(arg_this, offset, size, pBuf) kgspReadDmem_DISPATCH(arg_this, offset, size, pBuf) +#define kgspGetScratchOffsets_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineGetScratchOffsets__ +#define kgspGetScratchOffsets(arg_this, scratchGroupId) kgspGetScratchOffsets_DISPATCH(arg_this, scratchGroupId) +#define kgspGetScratchOffsets_HAL(arg_this, scratchGroupId) kgspGetScratchOffsets_DISPATCH(arg_this, scratchGroupId) +#define kgspGetWFL0Offset_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineGetWFL0Offset__ +#define kgspGetWFL0Offset(arg_this) kgspGetWFL0Offset_DISPATCH(arg_this) +#define kgspGetWFL0Offset_HAL(arg_this) kgspGetWFL0Offset_DISPATCH(arg_this) + +// Dispatch functions +static inline NV_STATUS kgspConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, ENGDESCRIPTOR arg3) { + return pKernelGsp->__kgspConstructEngine__(pGpu, pKernelGsp, arg3); +} + +static inline void kgspRegisterIntrService_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, IntrServiceRecord pRecords[175]) { pKernelGsp->__kgspRegisterIntrService__(pGpu, pKernelGsp, pRecords); } -NvU32 kgspServiceInterrupt_IMPL(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, IntrServiceServiceInterruptArguments *pParams); - static inline NvU32 kgspServiceInterrupt_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, IntrServiceServiceInterruptArguments *pParams) { return pKernelGsp->__kgspServiceInterrupt__(pGpu, pKernelGsp, pParams); } -void kgspConfigureFalcon_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); - -void kgspConfigureFalcon_GA102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); - -static inline void kgspConfigureFalcon_f2d351(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_PRECOMP(0); -} - static inline void kgspConfigureFalcon_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { pKernelGsp->__kgspConfigureFalcon__(pGpu, pKernelGsp); } -NvBool kgspIsDebugModeEnabled_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); - -NvBool kgspIsDebugModeEnabled_GA100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); - -static inline NvBool kgspIsDebugModeEnabled_108313(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); -} - static inline NvBool kgspIsDebugModeEnabled_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { return pKernelGsp->__kgspIsDebugModeEnabled__(pGpu, pKernelGsp); } -NV_STATUS kgspAllocBootArgs_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); - -NV_STATUS kgspAllocBootArgs_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); - -static inline NV_STATUS kgspAllocBootArgs_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - static inline NV_STATUS kgspAllocBootArgs_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { return pKernelGsp->__kgspAllocBootArgs__(pGpu, pKernelGsp); } -void kgspFreeBootArgs_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); - -void kgspFreeBootArgs_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); - -static inline void kgspFreeBootArgs_f2d351(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_PRECOMP(0); -} - static inline void kgspFreeBootArgs_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { pKernelGsp->__kgspFreeBootArgs__(pGpu, pKernelGsp); } -void kgspProgramLibosBootArgsAddr_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); - -static inline void kgspProgramLibosBootArgsAddr_f2d351(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_PRECOMP(0); -} - static inline void kgspProgramLibosBootArgsAddr_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { pKernelGsp->__kgspProgramLibosBootArgsAddr__(pGpu, pKernelGsp); } -NV_STATUS kgspSetCmdQueueHead_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 queueIdx, NvU32 value); - -static inline NV_STATUS kgspSetCmdQueueHead_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 queueIdx, NvU32 value) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - static inline NV_STATUS kgspSetCmdQueueHead_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 queueIdx, NvU32 value) { return pKernelGsp->__kgspSetCmdQueueHead__(pGpu, pKernelGsp, queueIdx, value); } -NV_STATUS kgspPrepareForBootstrap_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw); - -NV_STATUS kgspPrepareForBootstrap_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw); - -static inline NV_STATUS kgspPrepareForBootstrap_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - static inline NV_STATUS kgspPrepareForBootstrap_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw) { return pKernelGsp->__kgspPrepareForBootstrap__(pGpu, pKernelGsp, pGspFw); } -NV_STATUS kgspBootstrap_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw); - -NV_STATUS kgspBootstrap_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw); - -static inline NV_STATUS kgspBootstrap_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - static inline NV_STATUS kgspBootstrap_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw) { return pKernelGsp->__kgspBootstrap__(pGpu, pKernelGsp, pGspFw); } -void kgspGetGspRmBootUcodeStorage_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, BINDATA_STORAGE **ppBinStorageImage, BINDATA_STORAGE **ppBinStorageDesc); - -void kgspGetGspRmBootUcodeStorage_GA102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, BINDATA_STORAGE **ppBinStorageImage, BINDATA_STORAGE **ppBinStorageDesc); - -void kgspGetGspRmBootUcodeStorage_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, BINDATA_STORAGE **ppBinStorageImage, BINDATA_STORAGE **ppBinStorageDesc); - -static inline void kgspGetGspRmBootUcodeStorage_f2d351(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, BINDATA_STORAGE **ppBinStorageImage, BINDATA_STORAGE **ppBinStorageDesc) { - NV_ASSERT_PRECOMP(0); -} - static inline void kgspGetGspRmBootUcodeStorage_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, BINDATA_STORAGE **ppBinStorageImage, BINDATA_STORAGE **ppBinStorageDesc) { pKernelGsp->__kgspGetGspRmBootUcodeStorage__(pGpu, pKernelGsp, ppBinStorageImage, ppBinStorageDesc); } -const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmBoot_TU102(struct KernelGsp *pKernelGsp); - -const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmBoot_GA100(struct KernelGsp *pKernelGsp); - -const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmBoot_GA102(struct KernelGsp *pKernelGsp); - -const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmBoot_GH100(struct KernelGsp *pKernelGsp); - -const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmBoot_AD102(struct KernelGsp *pKernelGsp); - -static inline const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmBoot_80f438(struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); -} - -static inline const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmBoot_DISPATCH(struct KernelGsp *pKernelGsp) { +static inline const BINDATA_ARCHIVE * kgspGetBinArchiveGspRmBoot_DISPATCH(struct KernelGsp *pKernelGsp) { return pKernelGsp->__kgspGetBinArchiveGspRmBoot__(pKernelGsp); } -const BINDATA_ARCHIVE *kgspGetBinArchiveConcatenatedFMCDesc_GH100(struct KernelGsp *pKernelGsp); - -static inline const BINDATA_ARCHIVE *kgspGetBinArchiveConcatenatedFMCDesc_80f438(struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); -} - -static inline const BINDATA_ARCHIVE *kgspGetBinArchiveConcatenatedFMCDesc_DISPATCH(struct KernelGsp *pKernelGsp) { +static inline const BINDATA_ARCHIVE * kgspGetBinArchiveConcatenatedFMCDesc_DISPATCH(struct KernelGsp *pKernelGsp) { return pKernelGsp->__kgspGetBinArchiveConcatenatedFMCDesc__(pKernelGsp); } -const BINDATA_ARCHIVE *kgspGetBinArchiveConcatenatedFMC_GH100(struct KernelGsp *pKernelGsp); - -static inline const BINDATA_ARCHIVE *kgspGetBinArchiveConcatenatedFMC_80f438(struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); -} - -static inline const BINDATA_ARCHIVE *kgspGetBinArchiveConcatenatedFMC_DISPATCH(struct KernelGsp *pKernelGsp) { +static inline const BINDATA_ARCHIVE * kgspGetBinArchiveConcatenatedFMC_DISPATCH(struct KernelGsp *pKernelGsp) { return pKernelGsp->__kgspGetBinArchiveConcatenatedFMC__(pKernelGsp); } -const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmFmcGfwDebugSigned_GH100(struct KernelGsp *pKernelGsp); - -static inline const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmFmcGfwDebugSigned_80f438(struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); -} - -static inline const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmFmcGfwDebugSigned_DISPATCH(struct KernelGsp *pKernelGsp) { +static inline const BINDATA_ARCHIVE * kgspGetBinArchiveGspRmFmcGfwDebugSigned_DISPATCH(struct KernelGsp *pKernelGsp) { return pKernelGsp->__kgspGetBinArchiveGspRmFmcGfwDebugSigned__(pKernelGsp); } -const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmFmcGfwProdSigned_GH100(struct KernelGsp *pKernelGsp); - -static inline const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmFmcGfwProdSigned_80f438(struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); -} - -static inline const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmFmcGfwProdSigned_DISPATCH(struct KernelGsp *pKernelGsp) { +static inline const BINDATA_ARCHIVE * kgspGetBinArchiveGspRmFmcGfwProdSigned_DISPATCH(struct KernelGsp *pKernelGsp) { return pKernelGsp->__kgspGetBinArchiveGspRmFmcGfwProdSigned__(pKernelGsp); } -const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmCcFmcGfwProdSigned_GH100(struct KernelGsp *pKernelGsp); - -static inline const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmCcFmcGfwProdSigned_80f438(struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); -} - -static inline const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmCcFmcGfwProdSigned_DISPATCH(struct KernelGsp *pKernelGsp) { +static inline const BINDATA_ARCHIVE * kgspGetBinArchiveGspRmCcFmcGfwProdSigned_DISPATCH(struct KernelGsp *pKernelGsp) { return pKernelGsp->__kgspGetBinArchiveGspRmCcFmcGfwProdSigned__(pKernelGsp); } -NV_STATUS kgspCalculateFbLayout_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw); - -NV_STATUS kgspCalculateFbLayout_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw); - -static inline NV_STATUS kgspCalculateFbLayout_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - static inline NV_STATUS kgspCalculateFbLayout_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw) { return pKernelGsp->__kgspCalculateFbLayout__(pGpu, pKernelGsp, pGspFw); } -static inline NvU32 kgspGetNonWprHeapSize_ed6b8b(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return 1048576; -} - -static inline NvU32 kgspGetNonWprHeapSize_d505ea(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return 2097152; -} - -static inline NvU32 kgspGetNonWprHeapSize_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - static inline NvU32 kgspGetNonWprHeapSize_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { return pKernelGsp->__kgspGetNonWprHeapSize__(pGpu, pKernelGsp); } -NV_STATUS kgspExecuteSequencerCommand_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 opCode, NvU32 *pPayLoad, NvU32 payloadSize); - -NV_STATUS kgspExecuteSequencerCommand_GA102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 opCode, NvU32 *pPayLoad, NvU32 payloadSize); - -static inline NV_STATUS kgspExecuteSequencerCommand_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 opCode, NvU32 *pPayLoad, NvU32 payloadSize) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - static inline NV_STATUS kgspExecuteSequencerCommand_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 opCode, NvU32 *pPayLoad, NvU32 payloadSize) { return pKernelGsp->__kgspExecuteSequencerCommand__(pGpu, pKernelGsp, opCode, pPayLoad, payloadSize); } -static inline NvU32 kgspReadUcodeFuseVersion_b2b553(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 ucodeId) { - return 0; -} - -NvU32 kgspReadUcodeFuseVersion_GA100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 ucodeId); - -static inline NvU32 kgspReadUcodeFuseVersion_474d46(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 ucodeId) { - NV_ASSERT_OR_RETURN_PRECOMP(0, 0); -} - static inline NvU32 kgspReadUcodeFuseVersion_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 ucodeId) { return pKernelGsp->__kgspReadUcodeFuseVersion__(pGpu, pKernelGsp, ucodeId); } -NV_STATUS kgspResetHw_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); - -NV_STATUS kgspResetHw_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); - -static inline NV_STATUS kgspResetHw_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - static inline NV_STATUS kgspResetHw_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { return pKernelGsp->__kgspResetHw__(pGpu, pKernelGsp); } -NvBool kgspHealthCheck_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); - -static inline NvBool kgspHealthCheck_108313(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); -} - static inline NvBool kgspHealthCheck_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { return pKernelGsp->__kgspHealthCheck__(pGpu, pKernelGsp); } -NvU32 kgspService_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); - -static inline NvU32 kgspService_474d46(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, 0); -} - static inline NvU32 kgspService_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { return pKernelGsp->__kgspService__(pGpu, pKernelGsp); } -NvBool kgspIsWpr2Up_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); - -NvBool kgspIsWpr2Up_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); - -static inline NvBool kgspIsWpr2Up_108313(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); -} - static inline NvBool kgspIsWpr2Up_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { return pKernelGsp->__kgspIsWpr2Up__(pGpu, pKernelGsp); } -NvU32 kgspGetFrtsSize_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); - -static inline NvU32 kgspGetFrtsSize_4a4dee(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return 0; +static inline NvU32 kgspGetFrtsSize_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return pKernelGsp->__kgspGetFrtsSize__(pGpu, pKernelGsp); } -static inline NvU32 kgspGetFrtsSize_474d46(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, 0); +static inline NvU64 kgspGetPrescrubbedTopFbSize_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return pKernelGsp->__kgspGetPrescrubbedTopFbSize__(pGpu, pKernelGsp); } -static inline NvU32 kgspGetFrtsSize_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return pKernelGsp->__kgspGetFrtsSize__(pGpu, pKernelGsp); +static inline NV_STATUS kgspExtractVbiosFromRom_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspVbiosImg **ppVbiosImg) { + return pKernelGsp->__kgspExtractVbiosFromRom__(pGpu, pKernelGsp, ppVbiosImg); } -static inline NvU64 kgspGetPrescrubbedTopFbSize_e1e623(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return 256 * 1024 * 1024; +static inline NV_STATUS kgspPrepareForFwsecFrts_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFwsecUcode, const NvU64 frtsOffset, KernelGspPreparedFwsecCmd *preparedCmd) { + return pKernelGsp->__kgspPrepareForFwsecFrts__(pGpu, pKernelGsp, pFwsecUcode, frtsOffset, preparedCmd); } -static inline NvU64 kgspGetPrescrubbedTopFbSize_604eb7(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return (+18446744073709551615ULL); +static inline NV_STATUS kgspPrepareForFwsecSb_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFwsecUcode, KernelGspPreparedFwsecCmd *preparedCmd) { + return pKernelGsp->__kgspPrepareForFwsecSb__(pGpu, pKernelGsp, pFwsecUcode, preparedCmd); } -static inline NvU64 kgspGetPrescrubbedTopFbSize_474d46(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, 0); +static inline NV_STATUS kgspExecuteFwsec_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspPreparedFwsecCmd *preparedCmd) { + return pKernelGsp->__kgspExecuteFwsec__(pGpu, pKernelGsp, preparedCmd); } -static inline NvU64 kgspGetPrescrubbedTopFbSize_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return pKernelGsp->__kgspGetPrescrubbedTopFbSize__(pGpu, pKernelGsp); +static inline NV_STATUS kgspExecuteScrubberIfNeeded_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return pKernelGsp->__kgspExecuteScrubberIfNeeded__(pGpu, pKernelGsp); } -NV_STATUS kgspExtractVbiosFromRom_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspVbiosImg **ppVbiosImg); - -static inline NV_STATUS kgspExtractVbiosFromRom_395e98(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspVbiosImg **ppVbiosImg) { - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kgspExecuteBooterLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, const NvU64 sysmemAddrOfData) { + return pKernelGsp->__kgspExecuteBooterLoad__(pGpu, pKernelGsp, sysmemAddrOfData); } -static inline NV_STATUS kgspExtractVbiosFromRom_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspVbiosImg **ppVbiosImg) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +static inline NV_STATUS kgspExecuteBooterUnloadIfNeeded_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, const NvU64 sysmemAddrOfSuspendResumeData) { + return pKernelGsp->__kgspExecuteBooterUnloadIfNeeded__(pGpu, pKernelGsp, sysmemAddrOfSuspendResumeData); } -static inline NV_STATUS kgspExtractVbiosFromRom_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspVbiosImg **ppVbiosImg) { - return pKernelGsp->__kgspExtractVbiosFromRom__(pGpu, pKernelGsp, ppVbiosImg); +static inline NV_STATUS kgspExecuteHsFalcon_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFlcnUcode, struct KernelFalcon *pKernelFlcn, NvU32 *pMailbox0, NvU32 *pMailbox1) { + return pKernelGsp->__kgspExecuteHsFalcon__(pGpu, pKernelGsp, pFlcnUcode, pKernelFlcn, pMailbox0, pMailbox1); } -NV_STATUS kgspPrepareForFwsecFrts_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFwsecUcode, const NvU64 frtsOffset, KernelGspPreparedFwsecCmd *preparedCmd); +static inline NV_STATUS kgspWaitForProcessorSuspend_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return pKernelGsp->__kgspWaitForProcessorSuspend__(pGpu, pKernelGsp); +} -static inline NV_STATUS kgspPrepareForFwsecFrts_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFwsecUcode, const NvU64 frtsOffset, KernelGspPreparedFwsecCmd *preparedCmd) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +static inline NV_STATUS kgspSavePowerMgmtState_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return pKernelGsp->__kgspSavePowerMgmtState__(pGpu, pKernelGsp); } -static inline NV_STATUS kgspPrepareForFwsecFrts_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFwsecUcode, const NvU64 frtsOffset, KernelGspPreparedFwsecCmd *preparedCmd) { - return pKernelGsp->__kgspPrepareForFwsecFrts__(pGpu, pKernelGsp, pFwsecUcode, frtsOffset, preparedCmd); +static inline NV_STATUS kgspRestorePowerMgmtState_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return pKernelGsp->__kgspRestorePowerMgmtState__(pGpu, pKernelGsp); } -NV_STATUS kgspPrepareForFwsecSb_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFwsecUcode, KernelGspPreparedFwsecCmd *preparedCmd); +static inline void kgspFreeSuspendResumeData_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + pKernelGsp->__kgspFreeSuspendResumeData__(pGpu, pKernelGsp); +} -static inline NV_STATUS kgspPrepareForFwsecSb_395e98(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFwsecUcode, KernelGspPreparedFwsecCmd *preparedCmd) { - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kgspWaitForGfwBootOk_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return pKernelGsp->__kgspWaitForGfwBootOk__(pGpu, pKernelGsp); } -static inline NV_STATUS kgspPrepareForFwsecSb_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFwsecUcode, KernelGspPreparedFwsecCmd *preparedCmd) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +static inline const BINDATA_ARCHIVE * kgspGetBinArchiveBooterLoadUcode_DISPATCH(struct KernelGsp *pKernelGsp) { + return pKernelGsp->__kgspGetBinArchiveBooterLoadUcode__(pKernelGsp); } -static inline NV_STATUS kgspPrepareForFwsecSb_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFwsecUcode, KernelGspPreparedFwsecCmd *preparedCmd) { - return pKernelGsp->__kgspPrepareForFwsecSb__(pGpu, pKernelGsp, pFwsecUcode, preparedCmd); +static inline const BINDATA_ARCHIVE * kgspGetBinArchiveBooterUnloadUcode_DISPATCH(struct KernelGsp *pKernelGsp) { + return pKernelGsp->__kgspGetBinArchiveBooterUnloadUcode__(pKernelGsp); } -NV_STATUS kgspExecuteFwsec_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspPreparedFwsecCmd *preparedCmd); +static inline NvU64 kgspGetMinWprHeapSizeMB_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return pKernelGsp->__kgspGetMinWprHeapSizeMB__(pGpu, pKernelGsp); +} -static inline NV_STATUS kgspExecuteFwsec_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspPreparedFwsecCmd *preparedCmd) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +static inline NvU64 kgspGetMaxWprHeapSizeMB_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return pKernelGsp->__kgspGetMaxWprHeapSizeMB__(pGpu, pKernelGsp); } -static inline NV_STATUS kgspExecuteFwsec_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspPreparedFwsecCmd *preparedCmd) { - return pKernelGsp->__kgspExecuteFwsec__(pGpu, pKernelGsp, preparedCmd); +static inline NvU32 kgspGetFwHeapParamOsCarveoutSize_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return pKernelGsp->__kgspGetFwHeapParamOsCarveoutSize__(pGpu, pKernelGsp); } -NV_STATUS kgspExecuteScrubberIfNeeded_AD102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); +static inline NV_STATUS kgspInitVgpuPartitionLogging_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid, NvU64 initTaskLogBUffOffset, NvU64 initTaskLogBUffSize, NvU64 vgpuTaskLogBUffOffset, NvU64 vgpuTaskLogBuffSize) { + return pKernelGsp->__kgspInitVgpuPartitionLogging__(pGpu, pKernelGsp, gfid, initTaskLogBUffOffset, initTaskLogBUffSize, vgpuTaskLogBUffOffset, vgpuTaskLogBuffSize); +} -static inline NV_STATUS kgspExecuteScrubberIfNeeded_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +static inline NV_STATUS kgspFreeVgpuPartitionLogging_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid) { + return pKernelGsp->__kgspFreeVgpuPartitionLogging__(pGpu, pKernelGsp, gfid); } -static inline NV_STATUS kgspExecuteScrubberIfNeeded_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return pKernelGsp->__kgspExecuteScrubberIfNeeded__(pGpu, pKernelGsp); +static inline const char * kgspGetSignatureSectionNamePrefix_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return pKernelGsp->__kgspGetSignatureSectionNamePrefix__(pGpu, pKernelGsp); } -NV_STATUS kgspExecuteBooterLoad_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, const NvU64 sysmemAddrOfData); +static inline NV_STATUS kgspSetupGspFmcArgs_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw) { + return pKernelGsp->__kgspSetupGspFmcArgs__(pGpu, pKernelGsp, pGspFw); +} -static inline NV_STATUS kgspExecuteBooterLoad_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, const NvU64 sysmemAddrOfData) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +static inline void kgspReadEmem_DISPATCH(struct KernelGsp *pKernelGsp, NvU64 offset, NvU64 size, void *pBuf) { + pKernelGsp->__kgspReadEmem__(pKernelGsp, offset, size, pBuf); } -static inline NV_STATUS kgspExecuteBooterLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, const NvU64 sysmemAddrOfData) { - return pKernelGsp->__kgspExecuteBooterLoad__(pGpu, pKernelGsp, sysmemAddrOfData); +static inline NV_STATUS kgspIssueNotifyOp_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 opCode, NvU32 *pArgs, NvU32 argc) { + return pKernelGsp->__kgspIssueNotifyOp__(pGpu, pKernelGsp, opCode, pArgs, argc); } -NV_STATUS kgspExecuteBooterUnloadIfNeeded_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, const NvU64 sysmemAddrOfSuspendResumeData); +static inline NV_STATUS kgspCheckGspRmCcCleanup_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return pKernelGsp->__kgspCheckGspRmCcCleanup__(pGpu, pKernelGsp); +} -static inline NV_STATUS kgspExecuteBooterUnloadIfNeeded_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, const NvU64 sysmemAddrOfSuspendResumeData) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +static inline void kgspInitMissing_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate) { + pEngstate->__kgspInitMissing__(pGpu, pEngstate); } -static inline NV_STATUS kgspExecuteBooterUnloadIfNeeded_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, const NvU64 sysmemAddrOfSuspendResumeData) { - return pKernelGsp->__kgspExecuteBooterUnloadIfNeeded__(pGpu, pKernelGsp, sysmemAddrOfSuspendResumeData); +static inline NV_STATUS kgspStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate) { + return pEngstate->__kgspStatePreInitLocked__(pGpu, pEngstate); } -NV_STATUS kgspExecuteHsFalcon_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFlcnUcode, struct KernelFalcon *pKernelFlcn, NvU32 *pMailbox0, NvU32 *pMailbox1); +static inline NV_STATUS kgspStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate) { + return pEngstate->__kgspStatePreInitUnlocked__(pGpu, pEngstate); +} -NV_STATUS kgspExecuteHsFalcon_GA102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFlcnUcode, struct KernelFalcon *pKernelFlcn, NvU32 *pMailbox0, NvU32 *pMailbox1); +static inline NV_STATUS kgspStateInitLocked_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate) { + return pEngstate->__kgspStateInitLocked__(pGpu, pEngstate); +} -static inline NV_STATUS kgspExecuteHsFalcon_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFlcnUcode, struct KernelFalcon *pKernelFlcn, NvU32 *pMailbox0, NvU32 *pMailbox1) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +static inline NV_STATUS kgspStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate) { + return pEngstate->__kgspStateInitUnlocked__(pGpu, pEngstate); } -static inline NV_STATUS kgspExecuteHsFalcon_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFlcnUcode, struct KernelFalcon *pKernelFlcn, NvU32 *pMailbox0, NvU32 *pMailbox1) { - return pKernelGsp->__kgspExecuteHsFalcon__(pGpu, pKernelGsp, pFlcnUcode, pKernelFlcn, pMailbox0, pMailbox1); +static inline NV_STATUS kgspStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { + return pEngstate->__kgspStatePreLoad__(pGpu, pEngstate, arg3); } -NV_STATUS kgspWaitForProcessorSuspend_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); +static inline NV_STATUS kgspStateLoad_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { + return pEngstate->__kgspStateLoad__(pGpu, pEngstate, arg3); +} -static inline NV_STATUS kgspWaitForProcessorSuspend_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +static inline NV_STATUS kgspStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { + return pEngstate->__kgspStatePostLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kgspWaitForProcessorSuspend_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return pKernelGsp->__kgspWaitForProcessorSuspend__(pGpu, pKernelGsp); +static inline NV_STATUS kgspStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { + return pEngstate->__kgspStatePreUnload__(pGpu, pEngstate, arg3); } -NV_STATUS kgspSavePowerMgmtState_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); +static inline NV_STATUS kgspStateUnload_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { + return pEngstate->__kgspStateUnload__(pGpu, pEngstate, arg3); +} -static inline NV_STATUS kgspSavePowerMgmtState_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +static inline NV_STATUS kgspStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { + return pEngstate->__kgspStatePostUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kgspSavePowerMgmtState_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return pKernelGsp->__kgspSavePowerMgmtState__(pGpu, pKernelGsp); +static inline void kgspStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate) { + pEngstate->__kgspStateDestroy__(pGpu, pEngstate); } -NV_STATUS kgspRestorePowerMgmtState_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); +static inline NvBool kgspIsPresent_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate) { + return pEngstate->__kgspIsPresent__(pGpu, pEngstate); +} -static inline NV_STATUS kgspRestorePowerMgmtState_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +static inline NvBool kgspClearInterrupt_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pIntrService, IntrServiceClearInterruptArguments *pParams) { + return pIntrService->__kgspClearInterrupt__(pGpu, pIntrService, pParams); } -static inline NV_STATUS kgspRestorePowerMgmtState_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return pKernelGsp->__kgspRestorePowerMgmtState__(pGpu, pKernelGsp); +static inline NV_STATUS kgspServiceNotificationInterrupt_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { + return pIntrService->__kgspServiceNotificationInterrupt__(pGpu, pIntrService, pParams); } -void kgspFreeSuspendResumeData_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); +static inline NvU32 kgspRegRead_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 offset) { + return pKernelFlcn->__kgspRegRead__(pGpu, pKernelFlcn, offset); +} -static inline void kgspFreeSuspendResumeData_f2d351(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_PRECOMP(0); +static inline void kgspRegWrite_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 offset, NvU32 data) { + pKernelFlcn->__kgspRegWrite__(pGpu, pKernelFlcn, offset, data); } -static inline void kgspFreeSuspendResumeData_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - pKernelGsp->__kgspFreeSuspendResumeData__(pGpu, pKernelGsp); +static inline NvU32 kgspMaskDmemAddr_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 addr) { + return pKernelFlcn->__kgspMaskDmemAddr__(pGpu, pKernelFlcn, addr); } -NV_STATUS kgspWaitForGfwBootOk_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); +static inline NvBool kgspConfigured_DISPATCH(struct KernelGsp *arg_this) { + return arg_this->__kgspConfigured__(arg_this); +} -NV_STATUS kgspWaitForGfwBootOk_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); +static inline void kgspUnload_DISPATCH(struct KernelGsp *arg_this) { + arg_this->__kgspUnload__(arg_this); +} -static inline NV_STATUS kgspWaitForGfwBootOk_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +static inline void kgspVprintf_DISPATCH(struct KernelGsp *arg_this, NvBool bReportStart, const char *fmt, va_list args) { + arg_this->__kgspVprintf__(arg_this, bReportStart, fmt, args); } -static inline NV_STATUS kgspWaitForGfwBootOk_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return pKernelGsp->__kgspWaitForGfwBootOk__(pGpu, pKernelGsp); +static inline NvU32 kgspPriRead_DISPATCH(struct KernelGsp *arg_this, NvU32 offset) { + return arg_this->__kgspPriRead__(arg_this, offset); } -const BINDATA_ARCHIVE *kgspGetBinArchiveBooterLoadUcode_TU102(struct KernelGsp *pKernelGsp); +static inline void kgspPriWrite_DISPATCH(struct KernelGsp *arg_this, NvU32 offset, NvU32 data) { + arg_this->__kgspPriWrite__(arg_this, offset, data); +} -const BINDATA_ARCHIVE *kgspGetBinArchiveBooterLoadUcode_TU116(struct KernelGsp *pKernelGsp); +static inline void * kgspMapBufferDescriptor_DISPATCH(struct KernelGsp *arg_this, CrashCatBufferDescriptor *pBufDesc) { + return arg_this->__kgspMapBufferDescriptor__(arg_this, pBufDesc); +} -const BINDATA_ARCHIVE *kgspGetBinArchiveBooterLoadUcode_GA100(struct KernelGsp *pKernelGsp); +static inline void kgspUnmapBufferDescriptor_DISPATCH(struct KernelGsp *arg_this, CrashCatBufferDescriptor *pBufDesc) { + arg_this->__kgspUnmapBufferDescriptor__(arg_this, pBufDesc); +} -const BINDATA_ARCHIVE *kgspGetBinArchiveBooterLoadUcode_GA102(struct KernelGsp *pKernelGsp); +static inline void kgspSyncBufferDescriptor_DISPATCH(struct KernelGsp *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { + arg_this->__kgspSyncBufferDescriptor__(arg_this, pBufDesc, offset, size); +} -const BINDATA_ARCHIVE *kgspGetBinArchiveBooterLoadUcode_AD102(struct KernelGsp *pKernelGsp); +static inline void kgspReadDmem_DISPATCH(struct KernelGsp *arg_this, NvU32 offset, NvU32 size, void *pBuf) { + arg_this->__kgspReadDmem__(arg_this, offset, size, pBuf); +} -static inline const BINDATA_ARCHIVE *kgspGetBinArchiveBooterLoadUcode_80f438(struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); +static inline const NvU32 * kgspGetScratchOffsets_DISPATCH(struct KernelGsp *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { + return arg_this->__kgspGetScratchOffsets__(arg_this, scratchGroupId); } -static inline const BINDATA_ARCHIVE *kgspGetBinArchiveBooterLoadUcode_DISPATCH(struct KernelGsp *pKernelGsp) { - return pKernelGsp->__kgspGetBinArchiveBooterLoadUcode__(pKernelGsp); +static inline NvU32 kgspGetWFL0Offset_DISPATCH(struct KernelGsp *arg_this) { + return arg_this->__kgspGetWFL0Offset__(arg_this); } -const BINDATA_ARCHIVE *kgspGetBinArchiveBooterUnloadUcode_TU102(struct KernelGsp *pKernelGsp); +NV_STATUS kgspConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, ENGDESCRIPTOR arg3); -const BINDATA_ARCHIVE *kgspGetBinArchiveBooterUnloadUcode_TU116(struct KernelGsp *pKernelGsp); +void kgspRegisterIntrService_IMPL(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, IntrServiceRecord pRecords[175]); -const BINDATA_ARCHIVE *kgspGetBinArchiveBooterUnloadUcode_GA100(struct KernelGsp *pKernelGsp); +NvU32 kgspServiceInterrupt_IMPL(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, IntrServiceServiceInterruptArguments *pParams); -const BINDATA_ARCHIVE *kgspGetBinArchiveBooterUnloadUcode_GA102(struct KernelGsp *pKernelGsp); +void kgspConfigureFalcon_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); -const BINDATA_ARCHIVE *kgspGetBinArchiveBooterUnloadUcode_AD102(struct KernelGsp *pKernelGsp); +void kgspConfigureFalcon_GA102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); -static inline const BINDATA_ARCHIVE *kgspGetBinArchiveBooterUnloadUcode_80f438(struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); +static inline void kgspConfigureFalcon_f2d351(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_PRECOMP(0); } -static inline const BINDATA_ARCHIVE *kgspGetBinArchiveBooterUnloadUcode_DISPATCH(struct KernelGsp *pKernelGsp) { - return pKernelGsp->__kgspGetBinArchiveBooterUnloadUcode__(pKernelGsp); +NvBool kgspIsDebugModeEnabled_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +NvBool kgspIsDebugModeEnabled_GA100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +static inline NvBool kgspIsDebugModeEnabled_108313(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); } -static inline NvU64 kgspGetMinWprHeapSizeMB_7185bf(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return (64U); +NV_STATUS kgspAllocBootArgs_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +NV_STATUS kgspAllocBootArgs_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +static inline NV_STATUS kgspAllocBootArgs_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NvU64 kgspGetMinWprHeapSizeMB_cc88c3(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return pGpu->bVgpuGspPluginOffloadEnabled ? (565U) : (86U); +void kgspFreeBootArgs_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +void kgspFreeBootArgs_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +static inline void kgspFreeBootArgs_f2d351(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_PRECOMP(0); } -static inline NvU64 kgspGetMinWprHeapSizeMB_b2b553(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return 0; +void kgspProgramLibosBootArgsAddr_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +static inline void kgspProgramLibosBootArgsAddr_f2d351(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_PRECOMP(0); } -static inline NvU64 kgspGetMinWprHeapSizeMB_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return pKernelGsp->__kgspGetMinWprHeapSizeMB__(pGpu, pKernelGsp); +NV_STATUS kgspSetCmdQueueHead_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 queueIdx, NvU32 value); + +static inline NV_STATUS kgspSetCmdQueueHead_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 queueIdx, NvU32 value) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NvU64 kgspGetMaxWprHeapSizeMB_ad4e6a(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return (256U); +NV_STATUS kgspPrepareForBootstrap_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw); + +NV_STATUS kgspPrepareForBootstrap_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw); + +static inline NV_STATUS kgspPrepareForBootstrap_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NvU64 kgspGetMaxWprHeapSizeMB_55728f(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return pGpu->bVgpuGspPluginOffloadEnabled ? (1040U) : (278U); +NV_STATUS kgspBootstrap_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw); + +NV_STATUS kgspBootstrap_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw); + +static inline NV_STATUS kgspBootstrap_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NvU64 kgspGetMaxWprHeapSizeMB_b2b553(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return 0; +void kgspGetGspRmBootUcodeStorage_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, BINDATA_STORAGE **ppBinStorageImage, BINDATA_STORAGE **ppBinStorageDesc); + +void kgspGetGspRmBootUcodeStorage_GA102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, BINDATA_STORAGE **ppBinStorageImage, BINDATA_STORAGE **ppBinStorageDesc); + +void kgspGetGspRmBootUcodeStorage_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, BINDATA_STORAGE **ppBinStorageImage, BINDATA_STORAGE **ppBinStorageDesc); + +static inline void kgspGetGspRmBootUcodeStorage_f2d351(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, BINDATA_STORAGE **ppBinStorageImage, BINDATA_STORAGE **ppBinStorageDesc) { + NV_ASSERT_PRECOMP(0); } -static inline NvU64 kgspGetMaxWprHeapSizeMB_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return pKernelGsp->__kgspGetMaxWprHeapSizeMB__(pGpu, pKernelGsp); +const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmBoot_TU102(struct KernelGsp *pKernelGsp); + +const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmBoot_GA100(struct KernelGsp *pKernelGsp); + +const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmBoot_GA102(struct KernelGsp *pKernelGsp); + +const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmBoot_GH100(struct KernelGsp *pKernelGsp); + +const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmBoot_AD102(struct KernelGsp *pKernelGsp); + +static inline const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmBoot_80f438(struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); } -static inline NvU32 kgspGetFwHeapParamOsCarveoutSize_397f70(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return (0 << 20); +const BINDATA_ARCHIVE *kgspGetBinArchiveConcatenatedFMCDesc_GH100(struct KernelGsp *pKernelGsp); + +static inline const BINDATA_ARCHIVE *kgspGetBinArchiveConcatenatedFMCDesc_80f438(struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); } -static inline NvU32 kgspGetFwHeapParamOsCarveoutSize_4b5307(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return pGpu->bVgpuGspPluginOffloadEnabled ? (36 << 20) : (22 << 20); +const BINDATA_ARCHIVE *kgspGetBinArchiveConcatenatedFMC_GH100(struct KernelGsp *pKernelGsp); + +static inline const BINDATA_ARCHIVE *kgspGetBinArchiveConcatenatedFMC_80f438(struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); } -static inline NvU32 kgspGetFwHeapParamOsCarveoutSize_b2b553(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return 0; +const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmFmcGfwDebugSigned_GH100(struct KernelGsp *pKernelGsp); + +static inline const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmFmcGfwDebugSigned_80f438(struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); } -static inline NvU32 kgspGetFwHeapParamOsCarveoutSize_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return pKernelGsp->__kgspGetFwHeapParamOsCarveoutSize__(pGpu, pKernelGsp); +const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmFmcGfwProdSigned_GH100(struct KernelGsp *pKernelGsp); + +static inline const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmFmcGfwProdSigned_80f438(struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); } -static inline NV_STATUS kgspInitVgpuPartitionLogging_395e98(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid, NvU64 initTaskLogBUffOffset, NvU64 initTaskLogBUffSize, NvU64 vgpuTaskLogBUffOffset, NvU64 vgpuTaskLogBuffSize) { - return NV_ERR_NOT_SUPPORTED; +const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmCcFmcGfwProdSigned_GH100(struct KernelGsp *pKernelGsp); + +static inline const BINDATA_ARCHIVE *kgspGetBinArchiveGspRmCcFmcGfwProdSigned_80f438(struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); } -NV_STATUS kgspInitVgpuPartitionLogging_IMPL(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid, NvU64 initTaskLogBUffOffset, NvU64 initTaskLogBUffSize, NvU64 vgpuTaskLogBUffOffset, NvU64 vgpuTaskLogBuffSize); +NV_STATUS kgspCalculateFbLayout_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw); -static inline NV_STATUS kgspInitVgpuPartitionLogging_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid, NvU64 initTaskLogBUffOffset, NvU64 initTaskLogBUffSize, NvU64 vgpuTaskLogBUffOffset, NvU64 vgpuTaskLogBuffSize) { - return pKernelGsp->__kgspInitVgpuPartitionLogging__(pGpu, pKernelGsp, gfid, initTaskLogBUffOffset, initTaskLogBUffSize, vgpuTaskLogBUffOffset, vgpuTaskLogBuffSize); +NV_STATUS kgspCalculateFbLayout_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw); + +static inline NV_STATUS kgspCalculateFbLayout_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NV_STATUS kgspFreeVgpuPartitionLogging_395e98(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid) { - return NV_ERR_NOT_SUPPORTED; +static inline NvU32 kgspGetNonWprHeapSize_ed6b8b(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return 1048576; } -NV_STATUS kgspFreeVgpuPartitionLogging_IMPL(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid); +static inline NvU32 kgspGetNonWprHeapSize_d505ea(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return 2097152; +} -static inline NV_STATUS kgspFreeVgpuPartitionLogging_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid) { - return pKernelGsp->__kgspFreeVgpuPartitionLogging__(pGpu, pKernelGsp, gfid); +static inline NvU32 kgspGetNonWprHeapSize_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -const char *kgspGetSignatureSectionNamePrefix_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); +NV_STATUS kgspExecuteSequencerCommand_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 opCode, NvU32 *pPayLoad, NvU32 payloadSize); -static inline const char *kgspGetSignatureSectionNamePrefix_789efb(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return ".fwsignature_"; +NV_STATUS kgspExecuteSequencerCommand_GA102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 opCode, NvU32 *pPayLoad, NvU32 payloadSize); + +static inline NV_STATUS kgspExecuteSequencerCommand_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 opCode, NvU32 *pPayLoad, NvU32 payloadSize) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline const char *kgspGetSignatureSectionNamePrefix_80f438(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); +static inline NvU32 kgspReadUcodeFuseVersion_b2b553(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 ucodeId) { + return 0; } -static inline const char *kgspGetSignatureSectionNamePrefix_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return pKernelGsp->__kgspGetSignatureSectionNamePrefix__(pGpu, pKernelGsp); +NvU32 kgspReadUcodeFuseVersion_GA100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 ucodeId); + +static inline NvU32 kgspReadUcodeFuseVersion_474d46(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 ucodeId) { + NV_ASSERT_OR_RETURN_PRECOMP(0, 0); } -NV_STATUS kgspSetupGspFmcArgs_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw); +NV_STATUS kgspResetHw_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); -static inline NV_STATUS kgspSetupGspFmcArgs_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw) { +NV_STATUS kgspResetHw_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +static inline NV_STATUS kgspResetHw_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NV_STATUS kgspSetupGspFmcArgs_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw) { - return pKernelGsp->__kgspSetupGspFmcArgs__(pGpu, pKernelGsp, pGspFw); +NvBool kgspHealthCheck_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +static inline NvBool kgspHealthCheck_108313(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); } -void kgspReadEmem_TU102(struct KernelGsp *pKernelGsp, NvU64 offset, NvU64 size, void *pBuf); +NvU32 kgspService_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); -static inline void kgspReadEmem_366c4c(struct KernelGsp *pKernelGsp, NvU64 offset, NvU64 size, void *pBuf) { - NV_ASSERT(0); +static inline NvU32 kgspService_474d46(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, 0); } -static inline void kgspReadEmem_DISPATCH(struct KernelGsp *pKernelGsp, NvU64 offset, NvU64 size, void *pBuf) { - pKernelGsp->__kgspReadEmem__(pKernelGsp, offset, size, pBuf); +NvBool kgspIsWpr2Up_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +NvBool kgspIsWpr2Up_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +static inline NvBool kgspIsWpr2Up_108313(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); } -NV_STATUS kgspIssueNotifyOp_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 opCode, NvU32 *pArgs, NvU32 argc); +NvU32 kgspGetFrtsSize_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); -static inline NV_STATUS kgspIssueNotifyOp_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 opCode, NvU32 *pArgs, NvU32 argc) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +static inline NvU32 kgspGetFrtsSize_4a4dee(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return 0; } -static inline NV_STATUS kgspIssueNotifyOp_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 opCode, NvU32 *pArgs, NvU32 argc) { - return pKernelGsp->__kgspIssueNotifyOp__(pGpu, pKernelGsp, opCode, pArgs, argc); +static inline NvU32 kgspGetFrtsSize_474d46(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, 0); } -NV_STATUS kgspCheckGspRmCcCleanup_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); +static inline NvU64 kgspGetPrescrubbedTopFbSize_e1e623(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return 256 * 1024 * 1024; +} -static inline NV_STATUS kgspCheckGspRmCcCleanup_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { +static inline NvU64 kgspGetPrescrubbedTopFbSize_604eb7(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return (+18446744073709551615ULL); +} + +static inline NvU64 kgspGetPrescrubbedTopFbSize_474d46(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, 0); +} + +NV_STATUS kgspExtractVbiosFromRom_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspVbiosImg **ppVbiosImg); + +static inline NV_STATUS kgspExtractVbiosFromRom_395e98(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspVbiosImg **ppVbiosImg) { + return NV_ERR_NOT_SUPPORTED; +} + +static inline NV_STATUS kgspExtractVbiosFromRom_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspVbiosImg **ppVbiosImg) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NV_STATUS kgspCheckGspRmCcCleanup_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return pKernelGsp->__kgspCheckGspRmCcCleanup__(pGpu, pKernelGsp); +NV_STATUS kgspPrepareForFwsecFrts_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFwsecUcode, const NvU64 frtsOffset, KernelGspPreparedFwsecCmd *preparedCmd); + +static inline NV_STATUS kgspPrepareForFwsecFrts_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFwsecUcode, const NvU64 frtsOffset, KernelGspPreparedFwsecCmd *preparedCmd) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NvBool kgspConfigured_DISPATCH(struct KernelGsp *arg0) { - return arg0->__kgspConfigured__(arg0); +NV_STATUS kgspPrepareForFwsecSb_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFwsecUcode, KernelGspPreparedFwsecCmd *preparedCmd); + +static inline NV_STATUS kgspPrepareForFwsecSb_395e98(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFwsecUcode, KernelGspPreparedFwsecCmd *preparedCmd) { + return NV_ERR_NOT_SUPPORTED; } -static inline NvU32 kgspPriRead_DISPATCH(struct KernelGsp *arg0, NvU32 offset) { - return arg0->__kgspPriRead__(arg0, offset); +static inline NV_STATUS kgspPrepareForFwsecSb_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFwsecUcode, KernelGspPreparedFwsecCmd *preparedCmd) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline void kgspRegWrite_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 offset, NvU32 data) { - pKernelFlcn->__kgspRegWrite__(pGpu, pKernelFlcn, offset, data); +NV_STATUS kgspExecuteFwsec_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspPreparedFwsecCmd *preparedCmd); + +static inline NV_STATUS kgspExecuteFwsec_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspPreparedFwsecCmd *preparedCmd) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NvU32 kgspMaskDmemAddr_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 addr) { - return pKernelFlcn->__kgspMaskDmemAddr__(pGpu, pKernelFlcn, addr); +NV_STATUS kgspExecuteScrubberIfNeeded_AD102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +static inline NV_STATUS kgspExecuteScrubberIfNeeded_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline void kgspStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate) { - pEngstate->__kgspStateDestroy__(pGpu, pEngstate); +NV_STATUS kgspExecuteBooterLoad_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, const NvU64 sysmemAddrOfData); + +static inline NV_STATUS kgspExecuteBooterLoad_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, const NvU64 sysmemAddrOfData) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline void kgspVprintf_DISPATCH(struct KernelGsp *arg0, NvBool bReportStart, const char *fmt, va_list args) { - arg0->__kgspVprintf__(arg0, bReportStart, fmt, args); +NV_STATUS kgspExecuteBooterUnloadIfNeeded_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, const NvU64 sysmemAddrOfSuspendResumeData); + +static inline NV_STATUS kgspExecuteBooterUnloadIfNeeded_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, const NvU64 sysmemAddrOfSuspendResumeData) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NvBool kgspClearInterrupt_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pIntrService, IntrServiceClearInterruptArguments *pParams) { - return pIntrService->__kgspClearInterrupt__(pGpu, pIntrService, pParams); +NV_STATUS kgspExecuteHsFalcon_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFlcnUcode, struct KernelFalcon *pKernelFlcn, NvU32 *pMailbox0, NvU32 *pMailbox1); + +NV_STATUS kgspExecuteHsFalcon_GA102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFlcnUcode, struct KernelFalcon *pKernelFlcn, NvU32 *pMailbox0, NvU32 *pMailbox1); + +static inline NV_STATUS kgspExecuteHsFalcon_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspFlcnUcode *pFlcnUcode, struct KernelFalcon *pKernelFlcn, NvU32 *pMailbox0, NvU32 *pMailbox1) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline void kgspPriWrite_DISPATCH(struct KernelGsp *arg0, NvU32 offset, NvU32 data) { - arg0->__kgspPriWrite__(arg0, offset, data); +NV_STATUS kgspWaitForProcessorSuspend_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +static inline NV_STATUS kgspWaitForProcessorSuspend_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline void *kgspMapBufferDescriptor_DISPATCH(struct KernelGsp *arg0, CrashCatBufferDescriptor *pBufDesc) { - return arg0->__kgspMapBufferDescriptor__(arg0, pBufDesc); +NV_STATUS kgspSavePowerMgmtState_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +static inline NV_STATUS kgspSavePowerMgmtState_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline void kgspSyncBufferDescriptor_DISPATCH(struct KernelGsp *arg0, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { - arg0->__kgspSyncBufferDescriptor__(arg0, pBufDesc, offset, size); +NV_STATUS kgspRestorePowerMgmtState_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +static inline NV_STATUS kgspRestorePowerMgmtState_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NvU32 kgspRegRead_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 offset) { - return pKernelFlcn->__kgspRegRead__(pGpu, pKernelFlcn, offset); +void kgspFreeSuspendResumeData_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +static inline void kgspFreeSuspendResumeData_f2d351(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_PRECOMP(0); } -static inline NvBool kgspIsPresent_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate) { - return pEngstate->__kgspIsPresent__(pGpu, pEngstate); +NV_STATUS kgspWaitForGfwBootOk_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +NV_STATUS kgspWaitForGfwBootOk_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +static inline NV_STATUS kgspWaitForGfwBootOk_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +} + +const BINDATA_ARCHIVE *kgspGetBinArchiveBooterLoadUcode_TU102(struct KernelGsp *pKernelGsp); + +const BINDATA_ARCHIVE *kgspGetBinArchiveBooterLoadUcode_TU116(struct KernelGsp *pKernelGsp); + +const BINDATA_ARCHIVE *kgspGetBinArchiveBooterLoadUcode_GA100(struct KernelGsp *pKernelGsp); + +const BINDATA_ARCHIVE *kgspGetBinArchiveBooterLoadUcode_GA102(struct KernelGsp *pKernelGsp); + +const BINDATA_ARCHIVE *kgspGetBinArchiveBooterLoadUcode_AD102(struct KernelGsp *pKernelGsp); + +static inline const BINDATA_ARCHIVE *kgspGetBinArchiveBooterLoadUcode_80f438(struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); +} + +const BINDATA_ARCHIVE *kgspGetBinArchiveBooterUnloadUcode_TU102(struct KernelGsp *pKernelGsp); + +const BINDATA_ARCHIVE *kgspGetBinArchiveBooterUnloadUcode_TU116(struct KernelGsp *pKernelGsp); + +const BINDATA_ARCHIVE *kgspGetBinArchiveBooterUnloadUcode_GA100(struct KernelGsp *pKernelGsp); + +const BINDATA_ARCHIVE *kgspGetBinArchiveBooterUnloadUcode_GA102(struct KernelGsp *pKernelGsp); + +const BINDATA_ARCHIVE *kgspGetBinArchiveBooterUnloadUcode_AD102(struct KernelGsp *pKernelGsp); + +static inline const BINDATA_ARCHIVE *kgspGetBinArchiveBooterUnloadUcode_80f438(struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); } -static inline NV_STATUS kgspStateLoad_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg0) { - return pEngstate->__kgspStateLoad__(pGpu, pEngstate, arg0); +static inline NvU64 kgspGetMinWprHeapSizeMB_7185bf(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return (64U); } -static inline const NvU32 *kgspGetScratchOffsets_DISPATCH(struct KernelGsp *arg0, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { - return arg0->__kgspGetScratchOffsets__(arg0, scratchGroupId); +static inline NvU64 kgspGetMinWprHeapSizeMB_cc88c3(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return pGpu->bVgpuGspPluginOffloadEnabled ? (565U) : (86U); } -static inline void kgspUnload_DISPATCH(struct KernelGsp *arg0) { - arg0->__kgspUnload__(arg0); +static inline NvU64 kgspGetMinWprHeapSizeMB_b2b553(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return 0; } -static inline NV_STATUS kgspStateUnload_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg0) { - return pEngstate->__kgspStateUnload__(pGpu, pEngstate, arg0); +static inline NvU64 kgspGetMaxWprHeapSizeMB_ad4e6a(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return (256U); } -static inline NV_STATUS kgspServiceNotificationInterrupt_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { - return pIntrService->__kgspServiceNotificationInterrupt__(pGpu, pIntrService, pParams); +static inline NvU64 kgspGetMaxWprHeapSizeMB_55728f(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return pGpu->bVgpuGspPluginOffloadEnabled ? (1040U) : (278U); } -static inline NvU32 kgspGetWFL0Offset_DISPATCH(struct KernelGsp *arg0) { - return arg0->__kgspGetWFL0Offset__(arg0); +static inline NvU64 kgspGetMaxWprHeapSizeMB_b2b553(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return 0; } -static inline NV_STATUS kgspStateInitLocked_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate) { - return pEngstate->__kgspStateInitLocked__(pGpu, pEngstate); +static inline NvU32 kgspGetFwHeapParamOsCarveoutSize_397f70(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return (0 << 20); } -static inline NV_STATUS kgspStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg0) { - return pEngstate->__kgspStatePreLoad__(pGpu, pEngstate, arg0); +static inline NvU32 kgspGetFwHeapParamOsCarveoutSize_4b5307(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return pGpu->bVgpuGspPluginOffloadEnabled ? (36 << 20) : (22 << 20); } -static inline NV_STATUS kgspStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg0) { - return pEngstate->__kgspStatePostUnload__(pGpu, pEngstate, arg0); +static inline NvU32 kgspGetFwHeapParamOsCarveoutSize_b2b553(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return 0; } -static inline NV_STATUS kgspStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg0) { - return pEngstate->__kgspStatePreUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS kgspInitVgpuPartitionLogging_395e98(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid, NvU64 initTaskLogBUffOffset, NvU64 initTaskLogBUffSize, NvU64 vgpuTaskLogBUffOffset, NvU64 vgpuTaskLogBuffSize) { + return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kgspStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate) { - return pEngstate->__kgspStateInitUnlocked__(pGpu, pEngstate); +NV_STATUS kgspInitVgpuPartitionLogging_IMPL(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid, NvU64 initTaskLogBUffOffset, NvU64 initTaskLogBUffSize, NvU64 vgpuTaskLogBUffOffset, NvU64 vgpuTaskLogBuffSize); + +static inline NV_STATUS kgspFreeVgpuPartitionLogging_395e98(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid) { + return NV_ERR_NOT_SUPPORTED; } -static inline void kgspInitMissing_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate) { - pEngstate->__kgspInitMissing__(pGpu, pEngstate); +NV_STATUS kgspFreeVgpuPartitionLogging_IMPL(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid); + +const char *kgspGetSignatureSectionNamePrefix_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +static inline const char *kgspGetSignatureSectionNamePrefix_789efb(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return ".fwsignature_"; } -static inline NV_STATUS kgspStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate) { - return pEngstate->__kgspStatePreInitLocked__(pGpu, pEngstate); +static inline const char *kgspGetSignatureSectionNamePrefix_80f438(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); } -static inline NV_STATUS kgspStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate) { - return pEngstate->__kgspStatePreInitUnlocked__(pGpu, pEngstate); +NV_STATUS kgspSetupGspFmcArgs_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw); + +static inline NV_STATUS kgspSetupGspFmcArgs_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NV_STATUS kgspStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg0) { - return pEngstate->__kgspStatePostLoad__(pGpu, pEngstate, arg0); +void kgspReadEmem_TU102(struct KernelGsp *pKernelGsp, NvU64 offset, NvU64 size, void *pBuf); + +static inline void kgspReadEmem_366c4c(struct KernelGsp *pKernelGsp, NvU64 offset, NvU64 size, void *pBuf) { + NV_ASSERT(0); } -static inline void kgspUnmapBufferDescriptor_DISPATCH(struct KernelGsp *arg0, CrashCatBufferDescriptor *pBufDesc) { - arg0->__kgspUnmapBufferDescriptor__(arg0, pBufDesc); +NV_STATUS kgspIssueNotifyOp_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 opCode, NvU32 *pArgs, NvU32 argc); + +static inline NV_STATUS kgspIssueNotifyOp_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 opCode, NvU32 *pArgs, NvU32 argc) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline void kgspReadDmem_DISPATCH(struct KernelGsp *arg0, NvU32 offset, NvU32 size, void *pBuf) { - arg0->__kgspReadDmem__(arg0, offset, size, pBuf); +NV_STATUS kgspCheckGspRmCcCleanup_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +static inline NV_STATUS kgspCheckGspRmCcCleanup_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } void kgspDestruct_IMPL(struct KernelGsp *pKernelGsp); @@ -1489,24 +1600,24 @@ static inline NV_STATUS kgspStartLogPolling(struct OBJGPU *pGpu, struct KernelGs #define kgspStartLogPolling(pGpu, pKernelGsp) kgspStartLogPolling_IMPL(pGpu, pKernelGsp) #endif //__nvoc_kernel_gsp_h_disabled -void kgspDumpGspLogs_IMPL(struct KernelGsp *pKernelGsp, NvBool arg0); +void kgspDumpGspLogs_IMPL(struct KernelGsp *pKernelGsp, NvBool arg2); #ifdef __nvoc_kernel_gsp_h_disabled -static inline void kgspDumpGspLogs(struct KernelGsp *pKernelGsp, NvBool arg0) { +static inline void kgspDumpGspLogs(struct KernelGsp *pKernelGsp, NvBool arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGsp was disabled!"); } #else //__nvoc_kernel_gsp_h_disabled -#define kgspDumpGspLogs(pKernelGsp, arg0) kgspDumpGspLogs_IMPL(pKernelGsp, arg0) +#define kgspDumpGspLogs(pKernelGsp, arg2) kgspDumpGspLogs_IMPL(pKernelGsp, arg2) #endif //__nvoc_kernel_gsp_h_disabled -void kgspDumpGspLogsUnlocked_IMPL(struct KernelGsp *pKernelGsp, NvBool arg0); +void kgspDumpGspLogsUnlocked_IMPL(struct KernelGsp *pKernelGsp, NvBool arg2); #ifdef __nvoc_kernel_gsp_h_disabled -static inline void kgspDumpGspLogsUnlocked(struct KernelGsp *pKernelGsp, NvBool arg0) { +static inline void kgspDumpGspLogsUnlocked(struct KernelGsp *pKernelGsp, NvBool arg2) { NV_ASSERT_FAILED_PRECOMP("KernelGsp was disabled!"); } #else //__nvoc_kernel_gsp_h_disabled -#define kgspDumpGspLogsUnlocked(pKernelGsp, arg0) kgspDumpGspLogsUnlocked_IMPL(pKernelGsp, arg0) +#define kgspDumpGspLogsUnlocked(pKernelGsp, arg2) kgspDumpGspLogsUnlocked_IMPL(pKernelGsp, arg2) #endif //__nvoc_kernel_gsp_h_disabled NV_STATUS kgspExecuteSequencerBuffer_IMPL(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, void *pRunCpuSeqParams); diff --git a/src/nvidia/generated/g_kernel_head_nvoc.c b/src/nvidia/generated/g_kernel_head_nvoc.c index 24db371d00..f02927b829 100644 --- a/src/nvidia/generated/g_kernel_head_nvoc.c +++ b/src/nvidia/generated/g_kernel_head_nvoc.c @@ -105,6 +105,7 @@ NV_STATUS __nvoc_ctor_KernelHead(KernelHead *pThis, RmHalspecOwner *pRmhalspecow return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelHead_1(KernelHead *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -121,7 +122,7 @@ static void __nvoc_init_funcTable_KernelHead_1(KernelHead *pThis, RmHalspecOwner PORT_UNREFERENCED_VARIABLE(dispIpHal); PORT_UNREFERENCED_VARIABLE(dispIpHal_HalVarIdx); - // Hal function -- kheadReadVblankIntrEnable + // kheadReadVblankIntrEnable -- halified (2 hals) body if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* DispIpHal: DISPv0400 */ ) || ((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0000f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00000800UL) )) /* DispIpHal: DISPv0401 */ ) || ((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f00000UL) )) /* ChipHal: AD102 | AD103 | AD104 | AD106 | AD107 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00004000UL) )) /* DispIpHal: DISPv0404 */ )) @@ -134,7 +135,7 @@ static void __nvoc_init_funcTable_KernelHead_1(KernelHead *pThis, RmHalspecOwner pThis->__kheadReadVblankIntrEnable__ = &kheadReadVblankIntrEnable_108313; } - // Hal function -- kheadGetDisplayInitialized + // kheadGetDisplayInitialized -- halified (2 hals) body if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* DispIpHal: DISPv0400 */ ) || ((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0000f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00000800UL) )) /* DispIpHal: DISPv0401 */ ) || ((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f00000UL) )) /* ChipHal: AD102 | AD103 | AD104 | AD106 | AD107 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00004000UL) )) /* DispIpHal: DISPv0404 */ )) @@ -147,7 +148,7 @@ static void __nvoc_init_funcTable_KernelHead_1(KernelHead *pThis, RmHalspecOwner pThis->__kheadGetDisplayInitialized__ = &kheadGetDisplayInitialized_108313; } - // Hal function -- kheadWriteVblankIntrEnable + // kheadWriteVblankIntrEnable -- halified (2 hals) body if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* DispIpHal: DISPv0400 */ ) || ((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0000f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00000800UL) )) /* DispIpHal: DISPv0401 */ ) || ((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f00000UL) )) /* ChipHal: AD102 | AD103 | AD104 | AD106 | AD107 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00004000UL) )) /* DispIpHal: DISPv0404 */ )) @@ -160,7 +161,7 @@ static void __nvoc_init_funcTable_KernelHead_1(KernelHead *pThis, RmHalspecOwner pThis->__kheadWriteVblankIntrEnable__ = &kheadWriteVblankIntrEnable_e426af; } - // Hal function -- kheadProcessVblankCallbacks + // kheadProcessVblankCallbacks -- halified (2 hals) body if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* DispIpHal: DISPv0400 */ ) || ((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0000f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00000800UL) )) /* DispIpHal: DISPv0401 */ ) || ((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f00000UL) )) /* ChipHal: AD102 | AD103 | AD104 | AD106 | AD107 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00004000UL) )) /* DispIpHal: DISPv0404 */ )) @@ -173,7 +174,7 @@ static void __nvoc_init_funcTable_KernelHead_1(KernelHead *pThis, RmHalspecOwner pThis->__kheadProcessVblankCallbacks__ = &kheadProcessVblankCallbacks_e426af; } - // Hal function -- kheadResetPendingVblank + // kheadResetPendingVblank -- halified (2 hals) body if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* DispIpHal: DISPv0400 */ ) || ((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0000f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00000800UL) )) /* DispIpHal: DISPv0401 */ ) || ((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f00000UL) )) /* ChipHal: AD102 | AD103 | AD104 | AD106 | AD107 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00004000UL) )) /* DispIpHal: DISPv0404 */ )) @@ -186,7 +187,7 @@ static void __nvoc_init_funcTable_KernelHead_1(KernelHead *pThis, RmHalspecOwner pThis->__kheadResetPendingVblank__ = &kheadResetPendingVblank_e426af; } - // Hal function -- kheadReadPendingVblank + // kheadReadPendingVblank -- halified (2 hals) body if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* DispIpHal: DISPv0400 */ ) || ((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0000f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00000800UL) )) /* DispIpHal: DISPv0401 */ ) || ((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f00000UL) )) /* ChipHal: AD102 | AD103 | AD104 | AD106 | AD107 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00004000UL) )) /* DispIpHal: DISPv0404 */ )) @@ -199,8 +200,8 @@ static void __nvoc_init_funcTable_KernelHead_1(KernelHead *pThis, RmHalspecOwner pThis->__kheadReadPendingVblank__ = &kheadReadPendingVblank_108313; } - // Hal function -- kheadGetLoadVCounter - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00020000UL) )) /* DispIpHal: DISPv0000 */ + // kheadGetLoadVCounter -- halified (2 hals) body + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__kheadGetLoadVCounter__ = &kheadGetLoadVCounter_4a4dee; } @@ -208,9 +209,13 @@ static void __nvoc_init_funcTable_KernelHead_1(KernelHead *pThis, RmHalspecOwner { pThis->__kheadGetLoadVCounter__ = &kheadGetLoadVCounter_v03_00; } -} +} // End __nvoc_init_funcTable_KernelHead_1 with approximately 14 basic block(s). + +// Initialize vtable(s) for 7 virtual method(s). void __nvoc_init_funcTable_KernelHead(KernelHead *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 7 per-object function pointer(s). __nvoc_init_funcTable_KernelHead_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_head_nvoc.h b/src/nvidia/generated/g_kernel_head_nvoc.h index 94a51ad051..557ed355e5 100644 --- a/src/nvidia/generated/g_kernel_head_nvoc.h +++ b/src/nvidia/generated/g_kernel_head_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_HEAD_NVOC_H_ #define _G_KERNEL_HEAD_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -35,6 +42,7 @@ extern "C" { * * \***************************************************************************/ +#pragma once #include "g_kernel_head_nvoc.h" #ifndef KERNEL_HEAD_H @@ -73,18 +81,29 @@ struct __nvoc_inner_struc_KernelHead_1__ { }; + struct KernelHead { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct KernelHead *__nvoc_pbase_KernelHead; - NvBool (*__kheadReadVblankIntrEnable__)(struct OBJGPU *, struct KernelHead *); - NvBool (*__kheadGetDisplayInitialized__)(struct OBJGPU *, struct KernelHead *); - void (*__kheadWriteVblankIntrEnable__)(struct OBJGPU *, struct KernelHead *, NvBool); - void (*__kheadProcessVblankCallbacks__)(struct OBJGPU *, struct KernelHead *, NvU32); - void (*__kheadResetPendingVblank__)(struct OBJGPU *, struct KernelHead *, THREAD_STATE_NODE *); - NvBool (*__kheadReadPendingVblank__)(struct OBJGPU *, struct KernelHead *, NvU32 *, THREAD_STATE_NODE *); - NvU32 (*__kheadGetLoadVCounter__)(struct OBJGPU *, struct KernelHead *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct KernelHead *__nvoc_pbase_KernelHead; // khead + + // Vtable with 7 per-object function pointers + NvBool (*__kheadReadVblankIntrEnable__)(struct OBJGPU *, struct KernelHead * /*this*/); // halified (2 hals) body + NvBool (*__kheadGetDisplayInitialized__)(struct OBJGPU *, struct KernelHead * /*this*/); // halified (2 hals) body + void (*__kheadWriteVblankIntrEnable__)(struct OBJGPU *, struct KernelHead * /*this*/, NvBool); // halified (2 hals) body + void (*__kheadProcessVblankCallbacks__)(struct OBJGPU *, struct KernelHead * /*this*/, NvU32); // halified (2 hals) body + void (*__kheadResetPendingVblank__)(struct OBJGPU *, struct KernelHead * /*this*/, THREAD_STATE_NODE *); // halified (2 hals) body + NvBool (*__kheadReadPendingVblank__)(struct OBJGPU *, struct KernelHead * /*this*/, NvU32 *, THREAD_STATE_NODE *); // halified (2 hals) body + NvU32 (*__kheadGetLoadVCounter__)(struct OBJGPU *, struct KernelHead * /*this*/); // halified (2 hals) body + + // Data members struct __nvoc_inner_struc_KernelHead_1__ Vblank; NvU32 PublicId; }; @@ -98,6 +117,7 @@ typedef struct KernelHead KernelHead; #define __nvoc_class_id_KernelHead 0x0145e6 #endif /* __nvoc_class_id_KernelHead */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelHead; #define __staticCast_KernelHead(pThis) \ @@ -110,27 +130,65 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelHead; ((KernelHead*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelHead))) #endif //__nvoc_kernel_head_h_disabled - NV_STATUS __nvoc_objCreateDynamic_KernelHead(KernelHead**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_KernelHead(KernelHead**, Dynamic*, NvU32); #define __objCreate_KernelHead(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelHead((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define kheadReadVblankIntrEnable_FNPTR(pKernelHead) pKernelHead->__kheadReadVblankIntrEnable__ #define kheadReadVblankIntrEnable(pGpu, pKernelHead) kheadReadVblankIntrEnable_DISPATCH(pGpu, pKernelHead) #define kheadReadVblankIntrEnable_HAL(pGpu, pKernelHead) kheadReadVblankIntrEnable_DISPATCH(pGpu, pKernelHead) +#define kheadGetDisplayInitialized_FNPTR(pKernelHead) pKernelHead->__kheadGetDisplayInitialized__ #define kheadGetDisplayInitialized(pGpu, pKernelHead) kheadGetDisplayInitialized_DISPATCH(pGpu, pKernelHead) #define kheadGetDisplayInitialized_HAL(pGpu, pKernelHead) kheadGetDisplayInitialized_DISPATCH(pGpu, pKernelHead) -#define kheadWriteVblankIntrEnable(pGpu, pKernelHead, arg0) kheadWriteVblankIntrEnable_DISPATCH(pGpu, pKernelHead, arg0) -#define kheadWriteVblankIntrEnable_HAL(pGpu, pKernelHead, arg0) kheadWriteVblankIntrEnable_DISPATCH(pGpu, pKernelHead, arg0) -#define kheadProcessVblankCallbacks(pGpu, pKernelHead, arg0) kheadProcessVblankCallbacks_DISPATCH(pGpu, pKernelHead, arg0) -#define kheadProcessVblankCallbacks_HAL(pGpu, pKernelHead, arg0) kheadProcessVblankCallbacks_DISPATCH(pGpu, pKernelHead, arg0) -#define kheadResetPendingVblank(pGpu, pKernelHead, arg0) kheadResetPendingVblank_DISPATCH(pGpu, pKernelHead, arg0) -#define kheadResetPendingVblank_HAL(pGpu, pKernelHead, arg0) kheadResetPendingVblank_DISPATCH(pGpu, pKernelHead, arg0) +#define kheadWriteVblankIntrEnable_FNPTR(pKernelHead) pKernelHead->__kheadWriteVblankIntrEnable__ +#define kheadWriteVblankIntrEnable(pGpu, pKernelHead, arg3) kheadWriteVblankIntrEnable_DISPATCH(pGpu, pKernelHead, arg3) +#define kheadWriteVblankIntrEnable_HAL(pGpu, pKernelHead, arg3) kheadWriteVblankIntrEnable_DISPATCH(pGpu, pKernelHead, arg3) +#define kheadProcessVblankCallbacks_FNPTR(pKernelHead) pKernelHead->__kheadProcessVblankCallbacks__ +#define kheadProcessVblankCallbacks(pGpu, pKernelHead, arg3) kheadProcessVblankCallbacks_DISPATCH(pGpu, pKernelHead, arg3) +#define kheadProcessVblankCallbacks_HAL(pGpu, pKernelHead, arg3) kheadProcessVblankCallbacks_DISPATCH(pGpu, pKernelHead, arg3) +#define kheadResetPendingVblank_FNPTR(pKernelHead) pKernelHead->__kheadResetPendingVblank__ +#define kheadResetPendingVblank(pGpu, pKernelHead, arg3) kheadResetPendingVblank_DISPATCH(pGpu, pKernelHead, arg3) +#define kheadResetPendingVblank_HAL(pGpu, pKernelHead, arg3) kheadResetPendingVblank_DISPATCH(pGpu, pKernelHead, arg3) +#define kheadReadPendingVblank_FNPTR(pKernelHead) pKernelHead->__kheadReadPendingVblank__ #define kheadReadPendingVblank(pGpu, pKernelHead, pCachedIntr, pThreadState) kheadReadPendingVblank_DISPATCH(pGpu, pKernelHead, pCachedIntr, pThreadState) #define kheadReadPendingVblank_HAL(pGpu, pKernelHead, pCachedIntr, pThreadState) kheadReadPendingVblank_DISPATCH(pGpu, pKernelHead, pCachedIntr, pThreadState) +#define kheadGetLoadVCounter_FNPTR(pKernelHead) pKernelHead->__kheadGetLoadVCounter__ #define kheadGetLoadVCounter(pGpu, pKernelHead) kheadGetLoadVCounter_DISPATCH(pGpu, pKernelHead) #define kheadGetLoadVCounter_HAL(pGpu, pKernelHead) kheadGetLoadVCounter_DISPATCH(pGpu, pKernelHead) + +// Dispatch functions +static inline NvBool kheadReadVblankIntrEnable_DISPATCH(struct OBJGPU *pGpu, struct KernelHead *pKernelHead) { + return pKernelHead->__kheadReadVblankIntrEnable__(pGpu, pKernelHead); +} + +static inline NvBool kheadGetDisplayInitialized_DISPATCH(struct OBJGPU *pGpu, struct KernelHead *pKernelHead) { + return pKernelHead->__kheadGetDisplayInitialized__(pGpu, pKernelHead); +} + +static inline void kheadWriteVblankIntrEnable_DISPATCH(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvBool arg3) { + pKernelHead->__kheadWriteVblankIntrEnable__(pGpu, pKernelHead, arg3); +} + +static inline void kheadProcessVblankCallbacks_DISPATCH(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 arg3) { + pKernelHead->__kheadProcessVblankCallbacks__(pGpu, pKernelHead, arg3); +} + +static inline void kheadResetPendingVblank_DISPATCH(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, THREAD_STATE_NODE *arg3) { + pKernelHead->__kheadResetPendingVblank__(pGpu, pKernelHead, arg3); +} + +static inline NvBool kheadReadPendingVblank_DISPATCH(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 *pCachedIntr, THREAD_STATE_NODE *pThreadState) { + return pKernelHead->__kheadReadPendingVblank__(pGpu, pKernelHead, pCachedIntr, pThreadState); +} + +static inline NvU32 kheadGetLoadVCounter_DISPATCH(struct OBJGPU *pGpu, struct KernelHead *pKernelHead) { + return pKernelHead->__kheadGetLoadVCounter__(pGpu, pKernelHead); +} + NvU32 kheadGetVblankTotalCounter_IMPL(struct KernelHead *pKernelHead); @@ -145,18 +203,18 @@ static inline NvU32 kheadGetVblankTotalCounter(struct KernelHead *pKernelHead) { #define kheadGetVblankTotalCounter_HAL(pKernelHead) kheadGetVblankTotalCounter(pKernelHead) -void kheadSetVblankTotalCounter_IMPL(struct KernelHead *pKernelHead, NvU32 arg0); +void kheadSetVblankTotalCounter_IMPL(struct KernelHead *pKernelHead, NvU32 arg2); #ifdef __nvoc_kernel_head_h_disabled -static inline void kheadSetVblankTotalCounter(struct KernelHead *pKernelHead, NvU32 arg0) { +static inline void kheadSetVblankTotalCounter(struct KernelHead *pKernelHead, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("KernelHead was disabled!"); } #else //__nvoc_kernel_head_h_disabled -#define kheadSetVblankTotalCounter(pKernelHead, arg0) kheadSetVblankTotalCounter_IMPL(pKernelHead, arg0) +#define kheadSetVblankTotalCounter(pKernelHead, arg2) kheadSetVblankTotalCounter_IMPL(pKernelHead, arg2) #endif //__nvoc_kernel_head_h_disabled -#define kheadSetVblankTotalCounter_HAL(pKernelHead, arg0) kheadSetVblankTotalCounter(pKernelHead, arg0) +#define kheadSetVblankTotalCounter_HAL(pKernelHead, arg2) kheadSetVblankTotalCounter(pKernelHead, arg2) NvU32 kheadGetVblankLowLatencyCounter_IMPL(struct KernelHead *pKernelHead); @@ -172,18 +230,18 @@ static inline NvU32 kheadGetVblankLowLatencyCounter(struct KernelHead *pKernelHe #define kheadGetVblankLowLatencyCounter_HAL(pKernelHead) kheadGetVblankLowLatencyCounter(pKernelHead) -void kheadSetVblankLowLatencyCounter_IMPL(struct KernelHead *pKernelHead, NvU32 arg0); +void kheadSetVblankLowLatencyCounter_IMPL(struct KernelHead *pKernelHead, NvU32 arg2); #ifdef __nvoc_kernel_head_h_disabled -static inline void kheadSetVblankLowLatencyCounter(struct KernelHead *pKernelHead, NvU32 arg0) { +static inline void kheadSetVblankLowLatencyCounter(struct KernelHead *pKernelHead, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("KernelHead was disabled!"); } #else //__nvoc_kernel_head_h_disabled -#define kheadSetVblankLowLatencyCounter(pKernelHead, arg0) kheadSetVblankLowLatencyCounter_IMPL(pKernelHead, arg0) +#define kheadSetVblankLowLatencyCounter(pKernelHead, arg2) kheadSetVblankLowLatencyCounter_IMPL(pKernelHead, arg2) #endif //__nvoc_kernel_head_h_disabled -#define kheadSetVblankLowLatencyCounter_HAL(pKernelHead, arg0) kheadSetVblankLowLatencyCounter(pKernelHead, arg0) +#define kheadSetVblankLowLatencyCounter_HAL(pKernelHead, arg2) kheadSetVblankLowLatencyCounter(pKernelHead, arg2) static inline NvU32 kheadGetVblankNormLatencyCounter_46f6a7(struct KernelHead *pKernelHead) { return NV_ERR_NOT_SUPPORTED; @@ -201,20 +259,20 @@ static inline NvU32 kheadGetVblankNormLatencyCounter(struct KernelHead *pKernelH #define kheadGetVblankNormLatencyCounter_HAL(pKernelHead) kheadGetVblankNormLatencyCounter(pKernelHead) -static inline void kheadSetVblankNormLatencyCounter_b3696a(struct KernelHead *pKernelHead, NvU32 arg0) { +static inline void kheadSetVblankNormLatencyCounter_b3696a(struct KernelHead *pKernelHead, NvU32 arg2) { return; } #ifdef __nvoc_kernel_head_h_disabled -static inline void kheadSetVblankNormLatencyCounter(struct KernelHead *pKernelHead, NvU32 arg0) { +static inline void kheadSetVblankNormLatencyCounter(struct KernelHead *pKernelHead, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("KernelHead was disabled!"); } #else //__nvoc_kernel_head_h_disabled -#define kheadSetVblankNormLatencyCounter(pKernelHead, arg0) kheadSetVblankNormLatencyCounter_b3696a(pKernelHead, arg0) +#define kheadSetVblankNormLatencyCounter(pKernelHead, arg2) kheadSetVblankNormLatencyCounter_b3696a(pKernelHead, arg2) #endif //__nvoc_kernel_head_h_disabled -#define kheadSetVblankNormLatencyCounter_HAL(pKernelHead, arg0) kheadSetVblankNormLatencyCounter(pKernelHead, arg0) +#define kheadSetVblankNormLatencyCounter_HAL(pKernelHead, arg2) kheadSetVblankNormLatencyCounter(pKernelHead, arg2) NvBool kheadReadVblankIntrEnable_KERNEL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead); @@ -229,63 +287,43 @@ static inline NvBool kheadReadVblankIntrEnable_ceaee8(struct OBJGPU *pGpu, struc return ((NvBool)(0 != 0)); } -static inline NvBool kheadReadVblankIntrEnable_DISPATCH(struct OBJGPU *pGpu, struct KernelHead *pKernelHead) { - return pKernelHead->__kheadReadVblankIntrEnable__(pGpu, pKernelHead); -} - NvBool kheadGetDisplayInitialized_KERNEL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead); static inline NvBool kheadGetDisplayInitialized_108313(struct OBJGPU *pGpu, struct KernelHead *pKernelHead) { NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); } -static inline NvBool kheadGetDisplayInitialized_DISPATCH(struct OBJGPU *pGpu, struct KernelHead *pKernelHead) { - return pKernelHead->__kheadGetDisplayInitialized__(pGpu, pKernelHead); -} - -void kheadWriteVblankIntrEnable_KERNEL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvBool arg0); +void kheadWriteVblankIntrEnable_KERNEL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvBool arg3); -static inline void kheadWriteVblankIntrEnable_e426af(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvBool arg0) { +static inline void kheadWriteVblankIntrEnable_e426af(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvBool arg3) { NV_ASSERT_PRECOMP(0); return; } -void kheadWriteVblankIntrEnable_v03_00(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvBool arg0); +void kheadWriteVblankIntrEnable_v03_00(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvBool arg3); -static inline void kheadWriteVblankIntrEnable_DISPATCH(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvBool arg0) { - pKernelHead->__kheadWriteVblankIntrEnable__(pGpu, pKernelHead, arg0); -} - -void kheadProcessVblankCallbacks_IMPL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 arg0); +void kheadProcessVblankCallbacks_IMPL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 arg3); -static inline void kheadProcessVblankCallbacks_e426af(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 arg0) { +static inline void kheadProcessVblankCallbacks_e426af(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 arg3) { NV_ASSERT_PRECOMP(0); return; } -static inline void kheadProcessVblankCallbacks_DISPATCH(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 arg0) { - pKernelHead->__kheadProcessVblankCallbacks__(pGpu, pKernelHead, arg0); -} - -void kheadResetPendingVblank_KERNEL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, THREAD_STATE_NODE *arg0); +void kheadResetPendingVblank_KERNEL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, THREAD_STATE_NODE *arg3); -static inline void kheadResetPendingVblank_e426af(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, THREAD_STATE_NODE *arg0) { +static inline void kheadResetPendingVblank_e426af(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, THREAD_STATE_NODE *arg3) { NV_ASSERT_PRECOMP(0); return; } -void kheadResetPendingVblank_v03_00(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, THREAD_STATE_NODE *arg0); +void kheadResetPendingVblank_v03_00(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, THREAD_STATE_NODE *arg3); -void kheadResetPendingVblank_v04_01(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, THREAD_STATE_NODE *arg0); +void kheadResetPendingVblank_v04_01(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, THREAD_STATE_NODE *arg3); -static inline void kheadResetPendingVblank_f2d351(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, THREAD_STATE_NODE *arg0) { +static inline void kheadResetPendingVblank_f2d351(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, THREAD_STATE_NODE *arg3) { NV_ASSERT_PRECOMP(0); } -static inline void kheadResetPendingVblank_DISPATCH(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, THREAD_STATE_NODE *arg0) { - pKernelHead->__kheadResetPendingVblank__(pGpu, pKernelHead, arg0); -} - NvBool kheadReadPendingVblank_KERNEL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 *pCachedIntr, THREAD_STATE_NODE *pThreadState); static inline NvBool kheadReadPendingVblank_108313(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 *pCachedIntr, THREAD_STATE_NODE *pThreadState) { @@ -299,62 +337,54 @@ static inline NvBool kheadReadPendingVblank_ceaee8(struct OBJGPU *pGpu, struct K return ((NvBool)(0 != 0)); } -static inline NvBool kheadReadPendingVblank_DISPATCH(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 *pCachedIntr, THREAD_STATE_NODE *pThreadState) { - return pKernelHead->__kheadReadPendingVblank__(pGpu, pKernelHead, pCachedIntr, pThreadState); -} - NvU32 kheadGetLoadVCounter_v03_00(struct OBJGPU *pGpu, struct KernelHead *pKernelHead); static inline NvU32 kheadGetLoadVCounter_4a4dee(struct OBJGPU *pGpu, struct KernelHead *pKernelHead) { return 0; } -static inline NvU32 kheadGetLoadVCounter_DISPATCH(struct OBJGPU *pGpu, struct KernelHead *pKernelHead) { - return pKernelHead->__kheadGetLoadVCounter__(pGpu, pKernelHead); -} - NV_STATUS kheadConstruct_IMPL(struct KernelHead *arg_pKernelHead); #define __nvoc_kheadConstruct(arg_pKernelHead) kheadConstruct_IMPL(arg_pKernelHead) -void kheadAddVblankCallback_IMPL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, VBLANKCALLBACK *arg0); +void kheadAddVblankCallback_IMPL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, VBLANKCALLBACK *arg3); #ifdef __nvoc_kernel_head_h_disabled -static inline void kheadAddVblankCallback(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, VBLANKCALLBACK *arg0) { +static inline void kheadAddVblankCallback(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, VBLANKCALLBACK *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelHead was disabled!"); } #else //__nvoc_kernel_head_h_disabled -#define kheadAddVblankCallback(pGpu, pKernelHead, arg0) kheadAddVblankCallback_IMPL(pGpu, pKernelHead, arg0) +#define kheadAddVblankCallback(pGpu, pKernelHead, arg3) kheadAddVblankCallback_IMPL(pGpu, pKernelHead, arg3) #endif //__nvoc_kernel_head_h_disabled -void kheadDeleteVblankCallback_IMPL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, VBLANKCALLBACK *arg0); +void kheadDeleteVblankCallback_IMPL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, VBLANKCALLBACK *arg3); #ifdef __nvoc_kernel_head_h_disabled -static inline void kheadDeleteVblankCallback(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, VBLANKCALLBACK *arg0) { +static inline void kheadDeleteVblankCallback(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, VBLANKCALLBACK *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelHead was disabled!"); } #else //__nvoc_kernel_head_h_disabled -#define kheadDeleteVblankCallback(pGpu, pKernelHead, arg0) kheadDeleteVblankCallback_IMPL(pGpu, pKernelHead, arg0) +#define kheadDeleteVblankCallback(pGpu, pKernelHead, arg3) kheadDeleteVblankCallback_IMPL(pGpu, pKernelHead, arg3) #endif //__nvoc_kernel_head_h_disabled -void kheadPauseVblankCbNotifications_IMPL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, VBLANKCALLBACK *arg0); +void kheadPauseVblankCbNotifications_IMPL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, VBLANKCALLBACK *arg3); #ifdef __nvoc_kernel_head_h_disabled -static inline void kheadPauseVblankCbNotifications(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, VBLANKCALLBACK *arg0) { +static inline void kheadPauseVblankCbNotifications(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, VBLANKCALLBACK *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelHead was disabled!"); } #else //__nvoc_kernel_head_h_disabled -#define kheadPauseVblankCbNotifications(pGpu, pKernelHead, arg0) kheadPauseVblankCbNotifications_IMPL(pGpu, pKernelHead, arg0) +#define kheadPauseVblankCbNotifications(pGpu, pKernelHead, arg3) kheadPauseVblankCbNotifications_IMPL(pGpu, pKernelHead, arg3) #endif //__nvoc_kernel_head_h_disabled -NvU32 kheadCheckVblankCallbacksQueued_IMPL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 arg0, NvU32 *arg1); +NvU32 kheadCheckVblankCallbacksQueued_IMPL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 arg3, NvU32 *arg4); #ifdef __nvoc_kernel_head_h_disabled -static inline NvU32 kheadCheckVblankCallbacksQueued(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 arg0, NvU32 *arg1) { +static inline NvU32 kheadCheckVblankCallbacksQueued(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 arg3, NvU32 *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelHead was disabled!"); return 0; } #else //__nvoc_kernel_head_h_disabled -#define kheadCheckVblankCallbacksQueued(pGpu, pKernelHead, arg0, arg1) kheadCheckVblankCallbacksQueued_IMPL(pGpu, pKernelHead, arg0, arg1) +#define kheadCheckVblankCallbacksQueued(pGpu, pKernelHead, arg3, arg4) kheadCheckVblankCallbacksQueued_IMPL(pGpu, pKernelHead, arg3, arg4) #endif //__nvoc_kernel_head_h_disabled NvU32 kheadReadVblankIntrState_IMPL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead); @@ -368,14 +398,14 @@ static inline NvU32 kheadReadVblankIntrState(struct OBJGPU *pGpu, struct KernelH #define kheadReadVblankIntrState(pGpu, pKernelHead) kheadReadVblankIntrState_IMPL(pGpu, pKernelHead) #endif //__nvoc_kernel_head_h_disabled -void kheadWriteVblankIntrState_IMPL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 arg0); +void kheadWriteVblankIntrState_IMPL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 arg3); #ifdef __nvoc_kernel_head_h_disabled -static inline void kheadWriteVblankIntrState(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 arg0) { +static inline void kheadWriteVblankIntrState(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("KernelHead was disabled!"); } #else //__nvoc_kernel_head_h_disabled -#define kheadWriteVblankIntrState(pGpu, pKernelHead, arg0) kheadWriteVblankIntrState_IMPL(pGpu, pKernelHead, arg0) +#define kheadWriteVblankIntrState(pGpu, pKernelHead, arg3) kheadWriteVblankIntrState_IMPL(pGpu, pKernelHead, arg3) #endif //__nvoc_kernel_head_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_kernel_hostvgpudeviceapi_nvoc.c b/src/nvidia/generated/g_kernel_hostvgpudeviceapi_nvoc.c index 254ef3d6db..52aa43a828 100644 --- a/src/nvidia/generated/g_kernel_hostvgpudeviceapi_nvoc.c +++ b/src/nvidia/generated/g_kernel_hostvgpudeviceapi_nvoc.c @@ -102,10 +102,13 @@ NV_STATUS __nvoc_ctor_KernelHostVgpuDeviceShr(KernelHostVgpuDeviceShr *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelHostVgpuDeviceShr_1(KernelHostVgpuDeviceShr *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_KernelHostVgpuDeviceShr_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_KernelHostVgpuDeviceShr(KernelHostVgpuDeviceShr *pThis) { __nvoc_init_funcTable_KernelHostVgpuDeviceShr_1(pThis); } @@ -289,126 +292,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelHostVgpuDeviceApi = /*pExportInfo=*/ &__nvoc_export_info_KernelHostVgpuDeviceApi }; -static NvBool __nvoc_thunk_KernelHostVgpuDeviceApi_resCanCopy(struct RsResource *pKernelHostVgpuDeviceApi) { - return kernelhostvgpudeviceapiCanCopy((struct KernelHostVgpuDeviceApi *)(((unsigned char *)pKernelHostVgpuDeviceApi) - __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset)); -} - -static NvBool __nvoc_thunk_GpuResource_kernelhostvgpudeviceapiShareCallback(struct KernelHostVgpuDeviceApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_kernelhostvgpudeviceapiCheckMemInterUnmap(struct KernelHostVgpuDeviceApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_Notifier_kernelhostvgpudeviceapiGetOrAllocNotifShare(struct KernelHostVgpuDeviceApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelHostVgpuDeviceApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); -} - -static NV_STATUS __nvoc_thunk_RsResource_kernelhostvgpudeviceapiMapTo(struct KernelHostVgpuDeviceApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kernelhostvgpudeviceapiGetMapAddrSpace(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} - -static void __nvoc_thunk_Notifier_kernelhostvgpudeviceapiSetNotificationShare(struct KernelHostVgpuDeviceApi *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelHostVgpuDeviceApi_Notifier.offset), pNotifShare); -} - -static NvU32 __nvoc_thunk_RsResource_kernelhostvgpudeviceapiGetRefCount(struct KernelHostVgpuDeviceApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_kernelhostvgpudeviceapiAddAdditionalDependants(struct RsClient *pClient, struct KernelHostVgpuDeviceApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_kernelhostvgpudeviceapiControl_Prologue(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kernelhostvgpudeviceapiGetRegBaseOffsetAndSize(struct KernelHostVgpuDeviceApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), pGpu, pOffset, pSize); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kernelhostvgpudeviceapiInternalControlForward(struct KernelHostVgpuDeviceApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), command, pParams, size); -} - -static NV_STATUS __nvoc_thunk_RsResource_kernelhostvgpudeviceapiUnmapFrom(struct KernelHostVgpuDeviceApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_kernelhostvgpudeviceapiControl_Epilogue(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), pCallContext, pParams); -} - -static NvHandle __nvoc_thunk_GpuResource_kernelhostvgpudeviceapiGetInternalObjectHandle(struct KernelHostVgpuDeviceApi *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kernelhostvgpudeviceapiControl(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kernelhostvgpudeviceapiUnmap(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_kernelhostvgpudeviceapiGetMemInterMapParams(struct KernelHostVgpuDeviceApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_kernelhostvgpudeviceapiGetMemoryMappingDescriptor(struct KernelHostVgpuDeviceApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_kernelhostvgpudeviceapiControlFilter(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_Notifier_kernelhostvgpudeviceapiUnregisterEvent(struct KernelHostVgpuDeviceApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelHostVgpuDeviceApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static NV_STATUS __nvoc_thunk_RmResource_kernelhostvgpudeviceapiControlSerialization_Prologue(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_kernelhostvgpudeviceapiIsPartialUnmapSupported(struct KernelHostVgpuDeviceApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_kernelhostvgpudeviceapiPreDestruct(struct KernelHostVgpuDeviceApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_kernelhostvgpudeviceapiIsDuplicate(struct KernelHostVgpuDeviceApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_kernelhostvgpudeviceapiControlSerialization_Epilogue(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), pCallContext, pParams); -} - -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_kernelhostvgpudeviceapiGetNotificationListPtr(struct KernelHostVgpuDeviceApi *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelHostVgpuDeviceApi_Notifier.offset)); -} - -static struct NotifShare *__nvoc_thunk_Notifier_kernelhostvgpudeviceapiGetNotificationShare(struct KernelHostVgpuDeviceApi *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelHostVgpuDeviceApi_Notifier.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_kernelhostvgpudeviceapiMap(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_kernelhostvgpudeviceapiAccessCallback(struct KernelHostVgpuDeviceApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -416,12 +299,12 @@ static NvBool __nvoc_thunk_RmResource_kernelhostvgpudeviceapiAccessCallback(stru static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelHostVgpuDeviceApi[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0840101u, /*paramSize=*/ sizeof(NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_VGPU_DEVICE_INFO_PARAMS), @@ -431,12 +314,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelHo #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kernelhostvgpudeviceapiCtrlCmdSetVgpuGuestLifeCycleState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0840102u, /*paramSize=*/ sizeof(NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_VGPU_GUEST_LIFE_CYCLE_STATE_PARAMS), @@ -446,12 +329,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelHo #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kernelhostvgpudeviceapiCtrlCmdSetOfflinedPagePatchInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0840103u, /*paramSize=*/ sizeof(NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_OFFLINED_PAGE_PATCHINFO_PARAMS), @@ -461,12 +344,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelHo #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kernelhostvgpudeviceapiCtrlCmdVfConfigSpaceAccess_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0840104u, /*paramSize=*/ sizeof(NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_VF_CONFIG_SPACE_ACCESS_PARAMS), @@ -476,12 +359,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelHo #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8010u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x808u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kernelhostvgpudeviceapiCtrlCmdBindFecsEvtbuf_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8010u) - /*flags=*/ 0x8010u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x808u) + /*flags=*/ 0x808u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0840105u, /*paramSize=*/ sizeof(NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_BIND_FECS_EVTBUF_PARAMS), @@ -491,12 +374,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelHo #endif }, { /* [5] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kernelhostvgpudeviceapiCtrlCmdTriggerPrivDoorbell_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0840106u, /*paramSize=*/ sizeof(NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_TRIGGER_PRIV_DOORBELL_PARAMS), @@ -506,12 +389,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelHo #endif }, { /* [6] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kernelhostvgpudeviceapiCtrlCmdEventSetNotification_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0840107u, /*paramSize=*/ sizeof(NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_EVENT_SET_NOTIFICATION_PARAMS), @@ -521,12 +404,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelHo #endif }, { /* [7] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kernelhostvgpudeviceapiCtrlCmdGetBarMappingRanges_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa084010au, /*paramSize=*/ sizeof(NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_GET_BAR_MAPPING_RANGES_PARAMS), @@ -536,12 +419,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelHo #endif }, { /* [8] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kernelhostvgpudeviceapiCtrlCmdRestoreDefaultExecPartition_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa084010bu, /*paramSize=*/ 0, @@ -551,12 +434,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelHo #endif }, { /* [9] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kernelhostvgpudeviceapiCtrlCmdFreeStates_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa084010cu, /*paramSize=*/ sizeof(NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_FREE_STATES_PARAMS), @@ -568,6 +451,162 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelHo }; +// 1 down-thunk(s) defined to bridge methods in KernelHostVgpuDeviceApi from superclasses + +// kernelhostvgpudeviceapiCanCopy: virtual override (res) base (gpures) +static NvBool __nvoc_down_thunk_KernelHostVgpuDeviceApi_resCanCopy(struct RsResource *pKernelHostVgpuDeviceApi) { + return kernelhostvgpudeviceapiCanCopy((struct KernelHostVgpuDeviceApi *)(((unsigned char *) pKernelHostVgpuDeviceApi) - __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset)); +} + + +// 29 up-thunk(s) defined to bridge methods in KernelHostVgpuDeviceApi to superclasses + +// kernelhostvgpudeviceapiControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiControl(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), pCallContext, pParams); +} + +// kernelhostvgpudeviceapiMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiMap(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// kernelhostvgpudeviceapiUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiUnmap(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), pCallContext, pCpuMapping); +} + +// kernelhostvgpudeviceapiShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiShareCallback(struct KernelHostVgpuDeviceApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// kernelhostvgpudeviceapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetRegBaseOffsetAndSize(struct KernelHostVgpuDeviceApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), pGpu, pOffset, pSize); +} + +// kernelhostvgpudeviceapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetMapAddrSpace(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + +// kernelhostvgpudeviceapiInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiInternalControlForward(struct KernelHostVgpuDeviceApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), command, pParams, size); +} + +// kernelhostvgpudeviceapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetInternalObjectHandle(struct KernelHostVgpuDeviceApi *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset)); +} + +// kernelhostvgpudeviceapiAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiAccessCallback(struct KernelHostVgpuDeviceApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// kernelhostvgpudeviceapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiGetMemInterMapParams(struct KernelHostVgpuDeviceApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), pParams); +} + +// kernelhostvgpudeviceapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiCheckMemInterUnmap(struct KernelHostVgpuDeviceApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), bSubdeviceHandleProvided); +} + +// kernelhostvgpudeviceapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiGetMemoryMappingDescriptor(struct KernelHostVgpuDeviceApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), ppMemDesc); +} + +// kernelhostvgpudeviceapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControlSerialization_Prologue(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), pCallContext, pParams); +} + +// kernelhostvgpudeviceapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControlSerialization_Epilogue(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), pCallContext, pParams); +} + +// kernelhostvgpudeviceapiControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControl_Prologue(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), pCallContext, pParams); +} + +// kernelhostvgpudeviceapiControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControl_Epilogue(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), pCallContext, pParams); +} + +// kernelhostvgpudeviceapiIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiIsDuplicate(struct KernelHostVgpuDeviceApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset), hMemory, pDuplicate); +} + +// kernelhostvgpudeviceapiPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiPreDestruct(struct KernelHostVgpuDeviceApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset)); +} + +// kernelhostvgpudeviceapiControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiControlFilter(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset), pCallContext, pParams); +} + +// kernelhostvgpudeviceapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiIsPartialUnmapSupported(struct KernelHostVgpuDeviceApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset)); +} + +// kernelhostvgpudeviceapiMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiMapTo(struct KernelHostVgpuDeviceApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset), pParams); +} + +// kernelhostvgpudeviceapiUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiUnmapFrom(struct KernelHostVgpuDeviceApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset), pParams); +} + +// kernelhostvgpudeviceapiGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiGetRefCount(struct KernelHostVgpuDeviceApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset)); +} + +// kernelhostvgpudeviceapiAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiAddAdditionalDependants(struct RsClient *pClient, struct KernelHostVgpuDeviceApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset), pReference); +} + +// kernelhostvgpudeviceapiGetNotificationListPtr: virtual inherited (notify) base (notify) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetNotificationListPtr(struct KernelHostVgpuDeviceApi *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelHostVgpuDeviceApi_Notifier.offset)); +} + +// kernelhostvgpudeviceapiGetNotificationShare: virtual inherited (notify) base (notify) +static struct NotifShare * __nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetNotificationShare(struct KernelHostVgpuDeviceApi *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelHostVgpuDeviceApi_Notifier.offset)); +} + +// kernelhostvgpudeviceapiSetNotificationShare: virtual inherited (notify) base (notify) +static void __nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiSetNotificationShare(struct KernelHostVgpuDeviceApi *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelHostVgpuDeviceApi_Notifier.offset), pNotifShare); +} + +// kernelhostvgpudeviceapiUnregisterEvent: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiUnregisterEvent(struct KernelHostVgpuDeviceApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelHostVgpuDeviceApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +} + +// kernelhostvgpudeviceapiGetOrAllocNotifShare: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetOrAllocNotifShare(struct KernelHostVgpuDeviceApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelHostVgpuDeviceApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelHostVgpuDeviceApi = { /*numEntries=*/ 10, @@ -611,113 +650,157 @@ NV_STATUS __nvoc_ctor_KernelHostVgpuDeviceApi(KernelHostVgpuDeviceApi *pThis, CA return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelHostVgpuDeviceApi_1(KernelHostVgpuDeviceApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // kernelhostvgpudeviceapiCanCopy -- virtual override (res) base (gpures) pThis->__kernelhostvgpudeviceapiCanCopy__ = &kernelhostvgpudeviceapiCanCopy_IMPL; + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_KernelHostVgpuDeviceApi_resCanCopy; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo -- exported (id=0xa0840101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo__ = &kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kernelhostvgpudeviceapiCtrlCmdSetVgpuGuestLifeCycleState -- exported (id=0xa0840102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kernelhostvgpudeviceapiCtrlCmdSetVgpuGuestLifeCycleState__ = &kernelhostvgpudeviceapiCtrlCmdSetVgpuGuestLifeCycleState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kernelhostvgpudeviceapiCtrlCmdSetOfflinedPagePatchInfo -- exported (id=0xa0840103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kernelhostvgpudeviceapiCtrlCmdSetOfflinedPagePatchInfo__ = &kernelhostvgpudeviceapiCtrlCmdSetOfflinedPagePatchInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kernelhostvgpudeviceapiCtrlCmdVfConfigSpaceAccess -- exported (id=0xa0840104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kernelhostvgpudeviceapiCtrlCmdVfConfigSpaceAccess__ = &kernelhostvgpudeviceapiCtrlCmdVfConfigSpaceAccess_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8010u) + // kernelhostvgpudeviceapiCtrlCmdBindFecsEvtbuf -- exported (id=0xa0840105) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x808u) pThis->__kernelhostvgpudeviceapiCtrlCmdBindFecsEvtbuf__ = &kernelhostvgpudeviceapiCtrlCmdBindFecsEvtbuf_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kernelhostvgpudeviceapiCtrlCmdTriggerPrivDoorbell -- exported (id=0xa0840106) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kernelhostvgpudeviceapiCtrlCmdTriggerPrivDoorbell__ = &kernelhostvgpudeviceapiCtrlCmdTriggerPrivDoorbell_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kernelhostvgpudeviceapiCtrlCmdEventSetNotification -- exported (id=0xa0840107) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kernelhostvgpudeviceapiCtrlCmdEventSetNotification__ = &kernelhostvgpudeviceapiCtrlCmdEventSetNotification_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kernelhostvgpudeviceapiCtrlCmdGetBarMappingRanges -- exported (id=0xa084010a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kernelhostvgpudeviceapiCtrlCmdGetBarMappingRanges__ = &kernelhostvgpudeviceapiCtrlCmdGetBarMappingRanges_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kernelhostvgpudeviceapiCtrlCmdRestoreDefaultExecPartition -- exported (id=0xa084010b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kernelhostvgpudeviceapiCtrlCmdRestoreDefaultExecPartition__ = &kernelhostvgpudeviceapiCtrlCmdRestoreDefaultExecPartition_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // kernelhostvgpudeviceapiCtrlCmdFreeStates -- exported (id=0xa084010c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kernelhostvgpudeviceapiCtrlCmdFreeStates__ = &kernelhostvgpudeviceapiCtrlCmdFreeStates_IMPL; #endif - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_KernelHostVgpuDeviceApi_resCanCopy; + // kernelhostvgpudeviceapiControl -- virtual inherited (gpures) base (gpures) + pThis->__kernelhostvgpudeviceapiControl__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiControl; - pThis->__kernelhostvgpudeviceapiShareCallback__ = &__nvoc_thunk_GpuResource_kernelhostvgpudeviceapiShareCallback; + // kernelhostvgpudeviceapiMap -- virtual inherited (gpures) base (gpures) + pThis->__kernelhostvgpudeviceapiMap__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiMap; - pThis->__kernelhostvgpudeviceapiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_kernelhostvgpudeviceapiCheckMemInterUnmap; + // kernelhostvgpudeviceapiUnmap -- virtual inherited (gpures) base (gpures) + pThis->__kernelhostvgpudeviceapiUnmap__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiUnmap; - pThis->__kernelhostvgpudeviceapiGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_kernelhostvgpudeviceapiGetOrAllocNotifShare; + // kernelhostvgpudeviceapiShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__kernelhostvgpudeviceapiShareCallback__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiShareCallback; - pThis->__kernelhostvgpudeviceapiMapTo__ = &__nvoc_thunk_RsResource_kernelhostvgpudeviceapiMapTo; + // kernelhostvgpudeviceapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__kernelhostvgpudeviceapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetRegBaseOffsetAndSize; - pThis->__kernelhostvgpudeviceapiGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_kernelhostvgpudeviceapiGetMapAddrSpace; + // kernelhostvgpudeviceapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__kernelhostvgpudeviceapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetMapAddrSpace; - pThis->__kernelhostvgpudeviceapiSetNotificationShare__ = &__nvoc_thunk_Notifier_kernelhostvgpudeviceapiSetNotificationShare; + // kernelhostvgpudeviceapiInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__kernelhostvgpudeviceapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiInternalControlForward; - pThis->__kernelhostvgpudeviceapiGetRefCount__ = &__nvoc_thunk_RsResource_kernelhostvgpudeviceapiGetRefCount; + // kernelhostvgpudeviceapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__kernelhostvgpudeviceapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetInternalObjectHandle; - pThis->__kernelhostvgpudeviceapiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_kernelhostvgpudeviceapiAddAdditionalDependants; + // kernelhostvgpudeviceapiAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__kernelhostvgpudeviceapiAccessCallback__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiAccessCallback; - pThis->__kernelhostvgpudeviceapiControl_Prologue__ = &__nvoc_thunk_RmResource_kernelhostvgpudeviceapiControl_Prologue; + // kernelhostvgpudeviceapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__kernelhostvgpudeviceapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiGetMemInterMapParams; - pThis->__kernelhostvgpudeviceapiGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_kernelhostvgpudeviceapiGetRegBaseOffsetAndSize; + // kernelhostvgpudeviceapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__kernelhostvgpudeviceapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiCheckMemInterUnmap; - pThis->__kernelhostvgpudeviceapiInternalControlForward__ = &__nvoc_thunk_GpuResource_kernelhostvgpudeviceapiInternalControlForward; + // kernelhostvgpudeviceapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__kernelhostvgpudeviceapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiGetMemoryMappingDescriptor; - pThis->__kernelhostvgpudeviceapiUnmapFrom__ = &__nvoc_thunk_RsResource_kernelhostvgpudeviceapiUnmapFrom; + // kernelhostvgpudeviceapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__kernelhostvgpudeviceapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControlSerialization_Prologue; - pThis->__kernelhostvgpudeviceapiControl_Epilogue__ = &__nvoc_thunk_RmResource_kernelhostvgpudeviceapiControl_Epilogue; + // kernelhostvgpudeviceapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__kernelhostvgpudeviceapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControlSerialization_Epilogue; - pThis->__kernelhostvgpudeviceapiGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_kernelhostvgpudeviceapiGetInternalObjectHandle; + // kernelhostvgpudeviceapiControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__kernelhostvgpudeviceapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControl_Prologue; - pThis->__kernelhostvgpudeviceapiControl__ = &__nvoc_thunk_GpuResource_kernelhostvgpudeviceapiControl; + // kernelhostvgpudeviceapiControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__kernelhostvgpudeviceapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControl_Epilogue; - pThis->__kernelhostvgpudeviceapiUnmap__ = &__nvoc_thunk_GpuResource_kernelhostvgpudeviceapiUnmap; + // kernelhostvgpudeviceapiIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__kernelhostvgpudeviceapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiIsDuplicate; - pThis->__kernelhostvgpudeviceapiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_kernelhostvgpudeviceapiGetMemInterMapParams; + // kernelhostvgpudeviceapiPreDestruct -- virtual inherited (res) base (gpures) + pThis->__kernelhostvgpudeviceapiPreDestruct__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiPreDestruct; - pThis->__kernelhostvgpudeviceapiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_kernelhostvgpudeviceapiGetMemoryMappingDescriptor; + // kernelhostvgpudeviceapiControlFilter -- virtual inherited (res) base (gpures) + pThis->__kernelhostvgpudeviceapiControlFilter__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiControlFilter; - pThis->__kernelhostvgpudeviceapiControlFilter__ = &__nvoc_thunk_RsResource_kernelhostvgpudeviceapiControlFilter; + // kernelhostvgpudeviceapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__kernelhostvgpudeviceapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiIsPartialUnmapSupported; - pThis->__kernelhostvgpudeviceapiUnregisterEvent__ = &__nvoc_thunk_Notifier_kernelhostvgpudeviceapiUnregisterEvent; + // kernelhostvgpudeviceapiMapTo -- virtual inherited (res) base (gpures) + pThis->__kernelhostvgpudeviceapiMapTo__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiMapTo; - pThis->__kernelhostvgpudeviceapiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_kernelhostvgpudeviceapiControlSerialization_Prologue; + // kernelhostvgpudeviceapiUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__kernelhostvgpudeviceapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiUnmapFrom; - pThis->__kernelhostvgpudeviceapiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_kernelhostvgpudeviceapiIsPartialUnmapSupported; + // kernelhostvgpudeviceapiGetRefCount -- virtual inherited (res) base (gpures) + pThis->__kernelhostvgpudeviceapiGetRefCount__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiGetRefCount; - pThis->__kernelhostvgpudeviceapiPreDestruct__ = &__nvoc_thunk_RsResource_kernelhostvgpudeviceapiPreDestruct; + // kernelhostvgpudeviceapiAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__kernelhostvgpudeviceapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiAddAdditionalDependants; - pThis->__kernelhostvgpudeviceapiIsDuplicate__ = &__nvoc_thunk_RsResource_kernelhostvgpudeviceapiIsDuplicate; + // kernelhostvgpudeviceapiGetNotificationListPtr -- virtual inherited (notify) base (notify) + pThis->__kernelhostvgpudeviceapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetNotificationListPtr; - pThis->__kernelhostvgpudeviceapiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_kernelhostvgpudeviceapiControlSerialization_Epilogue; + // kernelhostvgpudeviceapiGetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__kernelhostvgpudeviceapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetNotificationShare; - pThis->__kernelhostvgpudeviceapiGetNotificationListPtr__ = &__nvoc_thunk_Notifier_kernelhostvgpudeviceapiGetNotificationListPtr; + // kernelhostvgpudeviceapiSetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__kernelhostvgpudeviceapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiSetNotificationShare; - pThis->__kernelhostvgpudeviceapiGetNotificationShare__ = &__nvoc_thunk_Notifier_kernelhostvgpudeviceapiGetNotificationShare; + // kernelhostvgpudeviceapiUnregisterEvent -- virtual inherited (notify) base (notify) + pThis->__kernelhostvgpudeviceapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiUnregisterEvent; - pThis->__kernelhostvgpudeviceapiMap__ = &__nvoc_thunk_GpuResource_kernelhostvgpudeviceapiMap; + // kernelhostvgpudeviceapiGetOrAllocNotifShare -- virtual inherited (notify) base (notify) + pThis->__kernelhostvgpudeviceapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_KernelHostVgpuDeviceApi_1 with approximately 41 basic block(s). - pThis->__kernelhostvgpudeviceapiAccessCallback__ = &__nvoc_thunk_RmResource_kernelhostvgpudeviceapiAccessCallback; -} +// Initialize vtable(s) for 40 virtual method(s). void __nvoc_init_funcTable_KernelHostVgpuDeviceApi(KernelHostVgpuDeviceApi *pThis) { + + // Initialize vtable(s) with 40 per-object function pointer(s). __nvoc_init_funcTable_KernelHostVgpuDeviceApi_1(pThis); } diff --git a/src/nvidia/generated/g_kernel_hostvgpudeviceapi_nvoc.h b/src/nvidia/generated/g_kernel_hostvgpudeviceapi_nvoc.h index f5547b82b7..169602076c 100644 --- a/src/nvidia/generated/g_kernel_hostvgpudeviceapi_nvoc.h +++ b/src/nvidia/generated/g_kernel_hostvgpudeviceapi_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_HOSTVGPUDEVICEAPI_NVOC_H_ #define _G_KERNEL_HOSTVGPUDEVICEAPI_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_hostvgpudeviceapi_nvoc.h" #ifndef _KERNEL_HOSTVGPUDEVICEAPI_H_ @@ -51,12 +59,21 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelHostVgpuDeviceShr { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RsShared __nvoc_base_RsShared; - struct Object *__nvoc_pbase_Object; - struct RsShared *__nvoc_pbase_RsShared; - struct KernelHostVgpuDeviceShr *__nvoc_pbase_KernelHostVgpuDeviceShr; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct RsShared *__nvoc_pbase_RsShared; // shr super + struct KernelHostVgpuDeviceShr *__nvoc_pbase_KernelHostVgpuDeviceShr; // kernelhostvgpudeviceshr + + // Data members KERNEL_HOST_VGPU_DEVICE *pDevice; }; @@ -69,6 +86,7 @@ typedef struct KernelHostVgpuDeviceShr KernelHostVgpuDeviceShr; #define __nvoc_class_id_KernelHostVgpuDeviceShr 0xe32156 #endif /* __nvoc_class_id_KernelHostVgpuDeviceShr */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelHostVgpuDeviceShr; #define __staticCast_KernelHostVgpuDeviceShr(pThis) \ @@ -81,13 +99,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelHostVgpuDeviceShr; ((KernelHostVgpuDeviceShr*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelHostVgpuDeviceShr))) #endif //__nvoc_kernel_hostvgpudeviceapi_h_disabled - NV_STATUS __nvoc_objCreateDynamic_KernelHostVgpuDeviceShr(KernelHostVgpuDeviceShr**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_KernelHostVgpuDeviceShr(KernelHostVgpuDeviceShr**, Dynamic*, NvU32); #define __objCreate_KernelHostVgpuDeviceShr(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelHostVgpuDeviceShr((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS kernelhostvgpudeviceshrConstruct_IMPL(struct KernelHostVgpuDeviceShr *arg_pKernelHostVgpuDeviceShr); #define __nvoc_kernelhostvgpudeviceshrConstruct(arg_pKernelHostVgpuDeviceShr) kernelhostvgpudeviceshrConstruct_IMPL(arg_pKernelHostVgpuDeviceShr) @@ -109,58 +130,69 @@ void destroyKernelHostVgpuDeviceShare(struct OBJGPU *pGpu, struct KernelHostVgpu #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelHostVgpuDeviceApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; struct Notifier __nvoc_base_Notifier; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct KernelHostVgpuDeviceApi *__nvoc_pbase_KernelHostVgpuDeviceApi; - NvBool (*__kernelhostvgpudeviceapiCanCopy__)(struct KernelHostVgpuDeviceApi *); - NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo__)(struct KernelHostVgpuDeviceApi *, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_VGPU_DEVICE_INFO_PARAMS *); - NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdSetVgpuGuestLifeCycleState__)(struct KernelHostVgpuDeviceApi *, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_VGPU_GUEST_LIFE_CYCLE_STATE_PARAMS *); - NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdSetOfflinedPagePatchInfo__)(struct KernelHostVgpuDeviceApi *, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_OFFLINED_PAGE_PATCHINFO_PARAMS *); - NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdVfConfigSpaceAccess__)(struct KernelHostVgpuDeviceApi *, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_VF_CONFIG_SPACE_ACCESS_PARAMS *); - NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdBindFecsEvtbuf__)(struct KernelHostVgpuDeviceApi *, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_BIND_FECS_EVTBUF_PARAMS *); - NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdTriggerPrivDoorbell__)(struct KernelHostVgpuDeviceApi *, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_TRIGGER_PRIV_DOORBELL_PARAMS *); - NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdEventSetNotification__)(struct KernelHostVgpuDeviceApi *, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_EVENT_SET_NOTIFICATION_PARAMS *); - NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdGetBarMappingRanges__)(struct KernelHostVgpuDeviceApi *, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_GET_BAR_MAPPING_RANGES_PARAMS *); - NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdRestoreDefaultExecPartition__)(struct KernelHostVgpuDeviceApi *); - NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdFreeStates__)(struct KernelHostVgpuDeviceApi *, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_FREE_STATES_PARAMS *); - NvBool (*__kernelhostvgpudeviceapiShareCallback__)(struct KernelHostVgpuDeviceApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__kernelhostvgpudeviceapiCheckMemInterUnmap__)(struct KernelHostVgpuDeviceApi *, NvBool); - NV_STATUS (*__kernelhostvgpudeviceapiGetOrAllocNotifShare__)(struct KernelHostVgpuDeviceApi *, NvHandle, NvHandle, struct NotifShare **); - NV_STATUS (*__kernelhostvgpudeviceapiMapTo__)(struct KernelHostVgpuDeviceApi *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__kernelhostvgpudeviceapiGetMapAddrSpace__)(struct KernelHostVgpuDeviceApi *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__kernelhostvgpudeviceapiSetNotificationShare__)(struct KernelHostVgpuDeviceApi *, struct NotifShare *); - NvU32 (*__kernelhostvgpudeviceapiGetRefCount__)(struct KernelHostVgpuDeviceApi *); - void (*__kernelhostvgpudeviceapiAddAdditionalDependants__)(struct RsClient *, struct KernelHostVgpuDeviceApi *, RsResourceRef *); - NV_STATUS (*__kernelhostvgpudeviceapiControl_Prologue__)(struct KernelHostVgpuDeviceApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kernelhostvgpudeviceapiGetRegBaseOffsetAndSize__)(struct KernelHostVgpuDeviceApi *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__kernelhostvgpudeviceapiInternalControlForward__)(struct KernelHostVgpuDeviceApi *, NvU32, void *, NvU32); - NV_STATUS (*__kernelhostvgpudeviceapiUnmapFrom__)(struct KernelHostVgpuDeviceApi *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__kernelhostvgpudeviceapiControl_Epilogue__)(struct KernelHostVgpuDeviceApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__kernelhostvgpudeviceapiGetInternalObjectHandle__)(struct KernelHostVgpuDeviceApi *); - NV_STATUS (*__kernelhostvgpudeviceapiControl__)(struct KernelHostVgpuDeviceApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kernelhostvgpudeviceapiUnmap__)(struct KernelHostVgpuDeviceApi *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__kernelhostvgpudeviceapiGetMemInterMapParams__)(struct KernelHostVgpuDeviceApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__kernelhostvgpudeviceapiGetMemoryMappingDescriptor__)(struct KernelHostVgpuDeviceApi *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__kernelhostvgpudeviceapiControlFilter__)(struct KernelHostVgpuDeviceApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__kernelhostvgpudeviceapiUnregisterEvent__)(struct KernelHostVgpuDeviceApi *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__kernelhostvgpudeviceapiControlSerialization_Prologue__)(struct KernelHostVgpuDeviceApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__kernelhostvgpudeviceapiIsPartialUnmapSupported__)(struct KernelHostVgpuDeviceApi *); - void (*__kernelhostvgpudeviceapiPreDestruct__)(struct KernelHostVgpuDeviceApi *); - NV_STATUS (*__kernelhostvgpudeviceapiIsDuplicate__)(struct KernelHostVgpuDeviceApi *, NvHandle, NvBool *); - void (*__kernelhostvgpudeviceapiControlSerialization_Epilogue__)(struct KernelHostVgpuDeviceApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__kernelhostvgpudeviceapiGetNotificationListPtr__)(struct KernelHostVgpuDeviceApi *); - struct NotifShare *(*__kernelhostvgpudeviceapiGetNotificationShare__)(struct KernelHostVgpuDeviceApi *); - NV_STATUS (*__kernelhostvgpudeviceapiMap__)(struct KernelHostVgpuDeviceApi *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__kernelhostvgpudeviceapiAccessCallback__)(struct KernelHostVgpuDeviceApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct INotifier *__nvoc_pbase_INotifier; // inotify super^2 + struct Notifier *__nvoc_pbase_Notifier; // notify super + struct KernelHostVgpuDeviceApi *__nvoc_pbase_KernelHostVgpuDeviceApi; // kernelhostvgpudeviceapi + + // Vtable with 40 per-object function pointers + NvBool (*__kernelhostvgpudeviceapiCanCopy__)(struct KernelHostVgpuDeviceApi * /*this*/); // virtual override (res) base (gpures) + NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo__)(struct KernelHostVgpuDeviceApi * /*this*/, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_VGPU_DEVICE_INFO_PARAMS *); // exported (id=0xa0840101) + NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdSetVgpuGuestLifeCycleState__)(struct KernelHostVgpuDeviceApi * /*this*/, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_VGPU_GUEST_LIFE_CYCLE_STATE_PARAMS *); // exported (id=0xa0840102) + NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdSetOfflinedPagePatchInfo__)(struct KernelHostVgpuDeviceApi * /*this*/, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_OFFLINED_PAGE_PATCHINFO_PARAMS *); // exported (id=0xa0840103) + NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdVfConfigSpaceAccess__)(struct KernelHostVgpuDeviceApi * /*this*/, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_VF_CONFIG_SPACE_ACCESS_PARAMS *); // exported (id=0xa0840104) + NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdBindFecsEvtbuf__)(struct KernelHostVgpuDeviceApi * /*this*/, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_BIND_FECS_EVTBUF_PARAMS *); // exported (id=0xa0840105) + NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdTriggerPrivDoorbell__)(struct KernelHostVgpuDeviceApi * /*this*/, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_TRIGGER_PRIV_DOORBELL_PARAMS *); // exported (id=0xa0840106) + NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdEventSetNotification__)(struct KernelHostVgpuDeviceApi * /*this*/, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_EVENT_SET_NOTIFICATION_PARAMS *); // exported (id=0xa0840107) + NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdGetBarMappingRanges__)(struct KernelHostVgpuDeviceApi * /*this*/, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_GET_BAR_MAPPING_RANGES_PARAMS *); // exported (id=0xa084010a) + NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdRestoreDefaultExecPartition__)(struct KernelHostVgpuDeviceApi * /*this*/); // exported (id=0xa084010b) + NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdFreeStates__)(struct KernelHostVgpuDeviceApi * /*this*/, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_FREE_STATES_PARAMS *); // exported (id=0xa084010c) + NV_STATUS (*__kernelhostvgpudeviceapiControl__)(struct KernelHostVgpuDeviceApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kernelhostvgpudeviceapiMap__)(struct KernelHostVgpuDeviceApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kernelhostvgpudeviceapiUnmap__)(struct KernelHostVgpuDeviceApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__kernelhostvgpudeviceapiShareCallback__)(struct KernelHostVgpuDeviceApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kernelhostvgpudeviceapiGetRegBaseOffsetAndSize__)(struct KernelHostVgpuDeviceApi * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kernelhostvgpudeviceapiGetMapAddrSpace__)(struct KernelHostVgpuDeviceApi * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kernelhostvgpudeviceapiInternalControlForward__)(struct KernelHostVgpuDeviceApi * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__kernelhostvgpudeviceapiGetInternalObjectHandle__)(struct KernelHostVgpuDeviceApi * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__kernelhostvgpudeviceapiAccessCallback__)(struct KernelHostVgpuDeviceApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kernelhostvgpudeviceapiGetMemInterMapParams__)(struct KernelHostVgpuDeviceApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kernelhostvgpudeviceapiCheckMemInterUnmap__)(struct KernelHostVgpuDeviceApi * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kernelhostvgpudeviceapiGetMemoryMappingDescriptor__)(struct KernelHostVgpuDeviceApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kernelhostvgpudeviceapiControlSerialization_Prologue__)(struct KernelHostVgpuDeviceApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__kernelhostvgpudeviceapiControlSerialization_Epilogue__)(struct KernelHostVgpuDeviceApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kernelhostvgpudeviceapiControl_Prologue__)(struct KernelHostVgpuDeviceApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__kernelhostvgpudeviceapiControl_Epilogue__)(struct KernelHostVgpuDeviceApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kernelhostvgpudeviceapiIsDuplicate__)(struct KernelHostVgpuDeviceApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__kernelhostvgpudeviceapiPreDestruct__)(struct KernelHostVgpuDeviceApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__kernelhostvgpudeviceapiControlFilter__)(struct KernelHostVgpuDeviceApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__kernelhostvgpudeviceapiIsPartialUnmapSupported__)(struct KernelHostVgpuDeviceApi * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__kernelhostvgpudeviceapiMapTo__)(struct KernelHostVgpuDeviceApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__kernelhostvgpudeviceapiUnmapFrom__)(struct KernelHostVgpuDeviceApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__kernelhostvgpudeviceapiGetRefCount__)(struct KernelHostVgpuDeviceApi * /*this*/); // virtual inherited (res) base (gpures) + void (*__kernelhostvgpudeviceapiAddAdditionalDependants__)(struct RsClient *, struct KernelHostVgpuDeviceApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + PEVENTNOTIFICATION * (*__kernelhostvgpudeviceapiGetNotificationListPtr__)(struct KernelHostVgpuDeviceApi * /*this*/); // virtual inherited (notify) base (notify) + struct NotifShare * (*__kernelhostvgpudeviceapiGetNotificationShare__)(struct KernelHostVgpuDeviceApi * /*this*/); // virtual inherited (notify) base (notify) + void (*__kernelhostvgpudeviceapiSetNotificationShare__)(struct KernelHostVgpuDeviceApi * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) + NV_STATUS (*__kernelhostvgpudeviceapiUnregisterEvent__)(struct KernelHostVgpuDeviceApi * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) + NV_STATUS (*__kernelhostvgpudeviceapiGetOrAllocNotifShare__)(struct KernelHostVgpuDeviceApi * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) + + // Data members struct KernelHostVgpuDeviceShr *pShared; NvU32 notifyActions[7]; }; @@ -174,6 +206,7 @@ typedef struct KernelHostVgpuDeviceApi KernelHostVgpuDeviceApi; #define __nvoc_class_id_KernelHostVgpuDeviceApi 0xb12d7d #endif /* __nvoc_class_id_KernelHostVgpuDeviceApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelHostVgpuDeviceApi; #define __staticCast_KernelHostVgpuDeviceApi(pThis) \ @@ -186,235 +219,278 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelHostVgpuDeviceApi; ((KernelHostVgpuDeviceApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelHostVgpuDeviceApi))) #endif //__nvoc_kernel_hostvgpudeviceapi_h_disabled - NV_STATUS __nvoc_objCreateDynamic_KernelHostVgpuDeviceApi(KernelHostVgpuDeviceApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_KernelHostVgpuDeviceApi(KernelHostVgpuDeviceApi**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_KernelHostVgpuDeviceApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_KernelHostVgpuDeviceApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define kernelhostvgpudeviceapiCanCopy_FNPTR(pKernelHostVgpuDeviceApi) pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCanCopy__ #define kernelhostvgpudeviceapiCanCopy(pKernelHostVgpuDeviceApi) kernelhostvgpudeviceapiCanCopy_DISPATCH(pKernelHostVgpuDeviceApi) +#define kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo_FNPTR(pKernelHostVgpuDeviceApi) pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo__ #define kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo(pKernelHostVgpuDeviceApi, pParams) kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo_DISPATCH(pKernelHostVgpuDeviceApi, pParams) +#define kernelhostvgpudeviceapiCtrlCmdSetVgpuGuestLifeCycleState_FNPTR(pKernelHostVgpuDeviceApi) pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdSetVgpuGuestLifeCycleState__ #define kernelhostvgpudeviceapiCtrlCmdSetVgpuGuestLifeCycleState(pKernelHostVgpuDeviceApi, pParams) kernelhostvgpudeviceapiCtrlCmdSetVgpuGuestLifeCycleState_DISPATCH(pKernelHostVgpuDeviceApi, pParams) +#define kernelhostvgpudeviceapiCtrlCmdSetOfflinedPagePatchInfo_FNPTR(pKernelHostVgpuDeviceApi) pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdSetOfflinedPagePatchInfo__ #define kernelhostvgpudeviceapiCtrlCmdSetOfflinedPagePatchInfo(pKernelHostVgpuDeviceApi, pParams) kernelhostvgpudeviceapiCtrlCmdSetOfflinedPagePatchInfo_DISPATCH(pKernelHostVgpuDeviceApi, pParams) +#define kernelhostvgpudeviceapiCtrlCmdVfConfigSpaceAccess_FNPTR(pKernelHostVgpuDeviceApi) pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdVfConfigSpaceAccess__ #define kernelhostvgpudeviceapiCtrlCmdVfConfigSpaceAccess(pKernelHostVgpuDeviceApi, pParams) kernelhostvgpudeviceapiCtrlCmdVfConfigSpaceAccess_DISPATCH(pKernelHostVgpuDeviceApi, pParams) +#define kernelhostvgpudeviceapiCtrlCmdBindFecsEvtbuf_FNPTR(pKernelHostVgpuDeviceApi) pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdBindFecsEvtbuf__ #define kernelhostvgpudeviceapiCtrlCmdBindFecsEvtbuf(pKernelHostVgpuDeviceApi, pParams) kernelhostvgpudeviceapiCtrlCmdBindFecsEvtbuf_DISPATCH(pKernelHostVgpuDeviceApi, pParams) +#define kernelhostvgpudeviceapiCtrlCmdTriggerPrivDoorbell_FNPTR(pKernelHostVgpuDeviceApi) pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdTriggerPrivDoorbell__ #define kernelhostvgpudeviceapiCtrlCmdTriggerPrivDoorbell(pKernelHostVgpuDeviceApi, pParams) kernelhostvgpudeviceapiCtrlCmdTriggerPrivDoorbell_DISPATCH(pKernelHostVgpuDeviceApi, pParams) +#define kernelhostvgpudeviceapiCtrlCmdEventSetNotification_FNPTR(pKernelHostVgpuDeviceApi) pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdEventSetNotification__ #define kernelhostvgpudeviceapiCtrlCmdEventSetNotification(pKernelHostVgpuDeviceApi, pSetEventParams) kernelhostvgpudeviceapiCtrlCmdEventSetNotification_DISPATCH(pKernelHostVgpuDeviceApi, pSetEventParams) +#define kernelhostvgpudeviceapiCtrlCmdGetBarMappingRanges_FNPTR(pKernelHostVgpuDeviceApi) pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdGetBarMappingRanges__ #define kernelhostvgpudeviceapiCtrlCmdGetBarMappingRanges(pKernelHostVgpuDeviceApi, pParams) kernelhostvgpudeviceapiCtrlCmdGetBarMappingRanges_DISPATCH(pKernelHostVgpuDeviceApi, pParams) +#define kernelhostvgpudeviceapiCtrlCmdRestoreDefaultExecPartition_FNPTR(pKernelHostVgpuDeviceApi) pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdRestoreDefaultExecPartition__ #define kernelhostvgpudeviceapiCtrlCmdRestoreDefaultExecPartition(pKernelHostVgpuDeviceApi) kernelhostvgpudeviceapiCtrlCmdRestoreDefaultExecPartition_DISPATCH(pKernelHostVgpuDeviceApi) +#define kernelhostvgpudeviceapiCtrlCmdFreeStates_FNPTR(pKernelHostVgpuDeviceApi) pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdFreeStates__ #define kernelhostvgpudeviceapiCtrlCmdFreeStates(pKernelHostVgpuDeviceApi, pParams) kernelhostvgpudeviceapiCtrlCmdFreeStates_DISPATCH(pKernelHostVgpuDeviceApi, pParams) +#define kernelhostvgpudeviceapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define kernelhostvgpudeviceapiControl(pGpuResource, pCallContext, pParams) kernelhostvgpudeviceapiControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define kernelhostvgpudeviceapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define kernelhostvgpudeviceapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) kernelhostvgpudeviceapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define kernelhostvgpudeviceapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define kernelhostvgpudeviceapiUnmap(pGpuResource, pCallContext, pCpuMapping) kernelhostvgpudeviceapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define kernelhostvgpudeviceapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define kernelhostvgpudeviceapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) kernelhostvgpudeviceapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define kernelhostvgpudeviceapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) kernelhostvgpudeviceapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define kernelhostvgpudeviceapiGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) kernelhostvgpudeviceapiGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -#define kernelhostvgpudeviceapiMapTo(pResource, pParams) kernelhostvgpudeviceapiMapTo_DISPATCH(pResource, pParams) -#define kernelhostvgpudeviceapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) kernelhostvgpudeviceapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define kernelhostvgpudeviceapiSetNotificationShare(pNotifier, pNotifShare) kernelhostvgpudeviceapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define kernelhostvgpudeviceapiGetRefCount(pResource) kernelhostvgpudeviceapiGetRefCount_DISPATCH(pResource) -#define kernelhostvgpudeviceapiAddAdditionalDependants(pClient, pResource, pReference) kernelhostvgpudeviceapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define kernelhostvgpudeviceapiControl_Prologue(pResource, pCallContext, pParams) kernelhostvgpudeviceapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define kernelhostvgpudeviceapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define kernelhostvgpudeviceapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) kernelhostvgpudeviceapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define kernelhostvgpudeviceapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define kernelhostvgpudeviceapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) kernelhostvgpudeviceapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define kernelhostvgpudeviceapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define kernelhostvgpudeviceapiInternalControlForward(pGpuResource, command, pParams, size) kernelhostvgpudeviceapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define kernelhostvgpudeviceapiUnmapFrom(pResource, pParams) kernelhostvgpudeviceapiUnmapFrom_DISPATCH(pResource, pParams) -#define kernelhostvgpudeviceapiControl_Epilogue(pResource, pCallContext, pParams) kernelhostvgpudeviceapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kernelhostvgpudeviceapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define kernelhostvgpudeviceapiGetInternalObjectHandle(pGpuResource) kernelhostvgpudeviceapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define kernelhostvgpudeviceapiControl(pGpuResource, pCallContext, pParams) kernelhostvgpudeviceapiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define kernelhostvgpudeviceapiUnmap(pGpuResource, pCallContext, pCpuMapping) kernelhostvgpudeviceapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define kernelhostvgpudeviceapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define kernelhostvgpudeviceapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kernelhostvgpudeviceapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define kernelhostvgpudeviceapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define kernelhostvgpudeviceapiGetMemInterMapParams(pRmResource, pParams) kernelhostvgpudeviceapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define kernelhostvgpudeviceapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define kernelhostvgpudeviceapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) kernelhostvgpudeviceapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define kernelhostvgpudeviceapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define kernelhostvgpudeviceapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) kernelhostvgpudeviceapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define kernelhostvgpudeviceapiControlFilter(pResource, pCallContext, pParams) kernelhostvgpudeviceapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define kernelhostvgpudeviceapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) kernelhostvgpudeviceapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define kernelhostvgpudeviceapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define kernelhostvgpudeviceapiControlSerialization_Prologue(pResource, pCallContext, pParams) kernelhostvgpudeviceapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define kernelhostvgpudeviceapiIsPartialUnmapSupported(pResource) kernelhostvgpudeviceapiIsPartialUnmapSupported_DISPATCH(pResource) -#define kernelhostvgpudeviceapiPreDestruct(pResource) kernelhostvgpudeviceapiPreDestruct_DISPATCH(pResource) -#define kernelhostvgpudeviceapiIsDuplicate(pResource, hMemory, pDuplicate) kernelhostvgpudeviceapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define kernelhostvgpudeviceapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ #define kernelhostvgpudeviceapiControlSerialization_Epilogue(pResource, pCallContext, pParams) kernelhostvgpudeviceapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kernelhostvgpudeviceapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define kernelhostvgpudeviceapiControl_Prologue(pResource, pCallContext, pParams) kernelhostvgpudeviceapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define kernelhostvgpudeviceapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define kernelhostvgpudeviceapiControl_Epilogue(pResource, pCallContext, pParams) kernelhostvgpudeviceapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define kernelhostvgpudeviceapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define kernelhostvgpudeviceapiIsDuplicate(pResource, hMemory, pDuplicate) kernelhostvgpudeviceapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define kernelhostvgpudeviceapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define kernelhostvgpudeviceapiPreDestruct(pResource) kernelhostvgpudeviceapiPreDestruct_DISPATCH(pResource) +#define kernelhostvgpudeviceapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define kernelhostvgpudeviceapiControlFilter(pResource, pCallContext, pParams) kernelhostvgpudeviceapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define kernelhostvgpudeviceapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define kernelhostvgpudeviceapiIsPartialUnmapSupported(pResource) kernelhostvgpudeviceapiIsPartialUnmapSupported_DISPATCH(pResource) +#define kernelhostvgpudeviceapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define kernelhostvgpudeviceapiMapTo(pResource, pParams) kernelhostvgpudeviceapiMapTo_DISPATCH(pResource, pParams) +#define kernelhostvgpudeviceapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define kernelhostvgpudeviceapiUnmapFrom(pResource, pParams) kernelhostvgpudeviceapiUnmapFrom_DISPATCH(pResource, pParams) +#define kernelhostvgpudeviceapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define kernelhostvgpudeviceapiGetRefCount(pResource) kernelhostvgpudeviceapiGetRefCount_DISPATCH(pResource) +#define kernelhostvgpudeviceapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define kernelhostvgpudeviceapiAddAdditionalDependants(pClient, pResource, pReference) kernelhostvgpudeviceapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define kernelhostvgpudeviceapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define kernelhostvgpudeviceapiGetNotificationListPtr(pNotifier) kernelhostvgpudeviceapiGetNotificationListPtr_DISPATCH(pNotifier) +#define kernelhostvgpudeviceapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ #define kernelhostvgpudeviceapiGetNotificationShare(pNotifier) kernelhostvgpudeviceapiGetNotificationShare_DISPATCH(pNotifier) -#define kernelhostvgpudeviceapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) kernelhostvgpudeviceapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define kernelhostvgpudeviceapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kernelhostvgpudeviceapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool kernelhostvgpudeviceapiCanCopy_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi); +#define kernelhostvgpudeviceapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define kernelhostvgpudeviceapiSetNotificationShare(pNotifier, pNotifShare) kernelhostvgpudeviceapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define kernelhostvgpudeviceapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define kernelhostvgpudeviceapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) kernelhostvgpudeviceapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define kernelhostvgpudeviceapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define kernelhostvgpudeviceapiGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) kernelhostvgpudeviceapiGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) +// Dispatch functions static inline NvBool kernelhostvgpudeviceapiCanCopy_DISPATCH(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi) { return pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCanCopy__(pKernelHostVgpuDeviceApi); } -NV_STATUS kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_VGPU_DEVICE_INFO_PARAMS *pParams); - static inline NV_STATUS kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo_DISPATCH(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_VGPU_DEVICE_INFO_PARAMS *pParams) { return pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo__(pKernelHostVgpuDeviceApi, pParams); } -NV_STATUS kernelhostvgpudeviceapiCtrlCmdSetVgpuGuestLifeCycleState_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_VGPU_GUEST_LIFE_CYCLE_STATE_PARAMS *pParams); - static inline NV_STATUS kernelhostvgpudeviceapiCtrlCmdSetVgpuGuestLifeCycleState_DISPATCH(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_VGPU_GUEST_LIFE_CYCLE_STATE_PARAMS *pParams) { return pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdSetVgpuGuestLifeCycleState__(pKernelHostVgpuDeviceApi, pParams); } -NV_STATUS kernelhostvgpudeviceapiCtrlCmdSetOfflinedPagePatchInfo_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_OFFLINED_PAGE_PATCHINFO_PARAMS *pParams); - static inline NV_STATUS kernelhostvgpudeviceapiCtrlCmdSetOfflinedPagePatchInfo_DISPATCH(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_OFFLINED_PAGE_PATCHINFO_PARAMS *pParams) { return pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdSetOfflinedPagePatchInfo__(pKernelHostVgpuDeviceApi, pParams); } -NV_STATUS kernelhostvgpudeviceapiCtrlCmdVfConfigSpaceAccess_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_VF_CONFIG_SPACE_ACCESS_PARAMS *pParams); - static inline NV_STATUS kernelhostvgpudeviceapiCtrlCmdVfConfigSpaceAccess_DISPATCH(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_VF_CONFIG_SPACE_ACCESS_PARAMS *pParams) { return pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdVfConfigSpaceAccess__(pKernelHostVgpuDeviceApi, pParams); } -NV_STATUS kernelhostvgpudeviceapiCtrlCmdBindFecsEvtbuf_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_BIND_FECS_EVTBUF_PARAMS *pParams); - static inline NV_STATUS kernelhostvgpudeviceapiCtrlCmdBindFecsEvtbuf_DISPATCH(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_BIND_FECS_EVTBUF_PARAMS *pParams) { return pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdBindFecsEvtbuf__(pKernelHostVgpuDeviceApi, pParams); } -NV_STATUS kernelhostvgpudeviceapiCtrlCmdTriggerPrivDoorbell_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_TRIGGER_PRIV_DOORBELL_PARAMS *pParams); - static inline NV_STATUS kernelhostvgpudeviceapiCtrlCmdTriggerPrivDoorbell_DISPATCH(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_TRIGGER_PRIV_DOORBELL_PARAMS *pParams) { return pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdTriggerPrivDoorbell__(pKernelHostVgpuDeviceApi, pParams); } -NV_STATUS kernelhostvgpudeviceapiCtrlCmdEventSetNotification_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_EVENT_SET_NOTIFICATION_PARAMS *pSetEventParams); - static inline NV_STATUS kernelhostvgpudeviceapiCtrlCmdEventSetNotification_DISPATCH(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_EVENT_SET_NOTIFICATION_PARAMS *pSetEventParams) { return pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdEventSetNotification__(pKernelHostVgpuDeviceApi, pSetEventParams); } -NV_STATUS kernelhostvgpudeviceapiCtrlCmdGetBarMappingRanges_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_GET_BAR_MAPPING_RANGES_PARAMS *pParams); - static inline NV_STATUS kernelhostvgpudeviceapiCtrlCmdGetBarMappingRanges_DISPATCH(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_GET_BAR_MAPPING_RANGES_PARAMS *pParams) { return pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdGetBarMappingRanges__(pKernelHostVgpuDeviceApi, pParams); } -NV_STATUS kernelhostvgpudeviceapiCtrlCmdRestoreDefaultExecPartition_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi); - static inline NV_STATUS kernelhostvgpudeviceapiCtrlCmdRestoreDefaultExecPartition_DISPATCH(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi) { return pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdRestoreDefaultExecPartition__(pKernelHostVgpuDeviceApi); } -NV_STATUS kernelhostvgpudeviceapiCtrlCmdFreeStates_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_FREE_STATES_PARAMS *pParams); - static inline NV_STATUS kernelhostvgpudeviceapiCtrlCmdFreeStates_DISPATCH(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_FREE_STATES_PARAMS *pParams) { return pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdFreeStates__(pKernelHostVgpuDeviceApi, pParams); } -static inline NvBool kernelhostvgpudeviceapiShareCallback_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__kernelhostvgpudeviceapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS kernelhostvgpudeviceapiControl_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__kernelhostvgpudeviceapiControl__(pGpuResource, pCallContext, pParams); } -static inline NV_STATUS kernelhostvgpudeviceapiCheckMemInterUnmap_DISPATCH(struct KernelHostVgpuDeviceApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__kernelhostvgpudeviceapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS kernelhostvgpudeviceapiMap_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__kernelhostvgpudeviceapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS kernelhostvgpudeviceapiGetOrAllocNotifShare_DISPATCH(struct KernelHostVgpuDeviceApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__kernelhostvgpudeviceapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); +static inline NV_STATUS kernelhostvgpudeviceapiUnmap_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__kernelhostvgpudeviceapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS kernelhostvgpudeviceapiMapTo_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__kernelhostvgpudeviceapiMapTo__(pResource, pParams); +static inline NvBool kernelhostvgpudeviceapiShareCallback_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__kernelhostvgpudeviceapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline NV_STATUS kernelhostvgpudeviceapiGetMapAddrSpace_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__kernelhostvgpudeviceapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +static inline NV_STATUS kernelhostvgpudeviceapiGetRegBaseOffsetAndSize_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__kernelhostvgpudeviceapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline void kernelhostvgpudeviceapiSetNotificationShare_DISPATCH(struct KernelHostVgpuDeviceApi *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__kernelhostvgpudeviceapiSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS kernelhostvgpudeviceapiGetMapAddrSpace_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__kernelhostvgpudeviceapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NvU32 kernelhostvgpudeviceapiGetRefCount_DISPATCH(struct KernelHostVgpuDeviceApi *pResource) { - return pResource->__kernelhostvgpudeviceapiGetRefCount__(pResource); +static inline NV_STATUS kernelhostvgpudeviceapiInternalControlForward_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__kernelhostvgpudeviceapiInternalControlForward__(pGpuResource, command, pParams, size); } -static inline void kernelhostvgpudeviceapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelHostVgpuDeviceApi *pResource, RsResourceRef *pReference) { - pResource->__kernelhostvgpudeviceapiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvHandle kernelhostvgpudeviceapiGetInternalObjectHandle_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource) { + return pGpuResource->__kernelhostvgpudeviceapiGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS kernelhostvgpudeviceapiControl_Prologue_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kernelhostvgpudeviceapiControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool kernelhostvgpudeviceapiAccessCallback_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__kernelhostvgpudeviceapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS kernelhostvgpudeviceapiGetRegBaseOffsetAndSize_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__kernelhostvgpudeviceapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS kernelhostvgpudeviceapiGetMemInterMapParams_DISPATCH(struct KernelHostVgpuDeviceApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__kernelhostvgpudeviceapiGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS kernelhostvgpudeviceapiInternalControlForward_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__kernelhostvgpudeviceapiInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS kernelhostvgpudeviceapiCheckMemInterUnmap_DISPATCH(struct KernelHostVgpuDeviceApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__kernelhostvgpudeviceapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS kernelhostvgpudeviceapiUnmapFrom_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__kernelhostvgpudeviceapiUnmapFrom__(pResource, pParams); +static inline NV_STATUS kernelhostvgpudeviceapiGetMemoryMappingDescriptor_DISPATCH(struct KernelHostVgpuDeviceApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__kernelhostvgpudeviceapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline void kernelhostvgpudeviceapiControl_Epilogue_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kernelhostvgpudeviceapiControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS kernelhostvgpudeviceapiControlSerialization_Prologue_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kernelhostvgpudeviceapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvHandle kernelhostvgpudeviceapiGetInternalObjectHandle_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource) { - return pGpuResource->__kernelhostvgpudeviceapiGetInternalObjectHandle__(pGpuResource); +static inline void kernelhostvgpudeviceapiControlSerialization_Epilogue_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__kernelhostvgpudeviceapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS kernelhostvgpudeviceapiControl_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__kernelhostvgpudeviceapiControl__(pGpuResource, pCallContext, pParams); +static inline NV_STATUS kernelhostvgpudeviceapiControl_Prologue_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__kernelhostvgpudeviceapiControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS kernelhostvgpudeviceapiUnmap_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kernelhostvgpudeviceapiUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline void kernelhostvgpudeviceapiControl_Epilogue_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__kernelhostvgpudeviceapiControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS kernelhostvgpudeviceapiGetMemInterMapParams_DISPATCH(struct KernelHostVgpuDeviceApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__kernelhostvgpudeviceapiGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS kernelhostvgpudeviceapiIsDuplicate_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__kernelhostvgpudeviceapiIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS kernelhostvgpudeviceapiGetMemoryMappingDescriptor_DISPATCH(struct KernelHostVgpuDeviceApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__kernelhostvgpudeviceapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void kernelhostvgpudeviceapiPreDestruct_DISPATCH(struct KernelHostVgpuDeviceApi *pResource) { + pResource->__kernelhostvgpudeviceapiPreDestruct__(pResource); } static inline NV_STATUS kernelhostvgpudeviceapiControlFilter_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__kernelhostvgpudeviceapiControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS kernelhostvgpudeviceapiUnregisterEvent_DISPATCH(struct KernelHostVgpuDeviceApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__kernelhostvgpudeviceapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static inline NV_STATUS kernelhostvgpudeviceapiControlSerialization_Prologue_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kernelhostvgpudeviceapiControlSerialization_Prologue__(pResource, pCallContext, pParams); -} - static inline NvBool kernelhostvgpudeviceapiIsPartialUnmapSupported_DISPATCH(struct KernelHostVgpuDeviceApi *pResource) { return pResource->__kernelhostvgpudeviceapiIsPartialUnmapSupported__(pResource); } -static inline void kernelhostvgpudeviceapiPreDestruct_DISPATCH(struct KernelHostVgpuDeviceApi *pResource) { - pResource->__kernelhostvgpudeviceapiPreDestruct__(pResource); +static inline NV_STATUS kernelhostvgpudeviceapiMapTo_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__kernelhostvgpudeviceapiMapTo__(pResource, pParams); } -static inline NV_STATUS kernelhostvgpudeviceapiIsDuplicate_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__kernelhostvgpudeviceapiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS kernelhostvgpudeviceapiUnmapFrom_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__kernelhostvgpudeviceapiUnmapFrom__(pResource, pParams); } -static inline void kernelhostvgpudeviceapiControlSerialization_Epilogue_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kernelhostvgpudeviceapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 kernelhostvgpudeviceapiGetRefCount_DISPATCH(struct KernelHostVgpuDeviceApi *pResource) { + return pResource->__kernelhostvgpudeviceapiGetRefCount__(pResource); } -static inline PEVENTNOTIFICATION *kernelhostvgpudeviceapiGetNotificationListPtr_DISPATCH(struct KernelHostVgpuDeviceApi *pNotifier) { +static inline void kernelhostvgpudeviceapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelHostVgpuDeviceApi *pResource, RsResourceRef *pReference) { + pResource->__kernelhostvgpudeviceapiAddAdditionalDependants__(pClient, pResource, pReference); +} + +static inline PEVENTNOTIFICATION * kernelhostvgpudeviceapiGetNotificationListPtr_DISPATCH(struct KernelHostVgpuDeviceApi *pNotifier) { return pNotifier->__kernelhostvgpudeviceapiGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *kernelhostvgpudeviceapiGetNotificationShare_DISPATCH(struct KernelHostVgpuDeviceApi *pNotifier) { +static inline struct NotifShare * kernelhostvgpudeviceapiGetNotificationShare_DISPATCH(struct KernelHostVgpuDeviceApi *pNotifier) { return pNotifier->__kernelhostvgpudeviceapiGetNotificationShare__(pNotifier); } -static inline NV_STATUS kernelhostvgpudeviceapiMap_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kernelhostvgpudeviceapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void kernelhostvgpudeviceapiSetNotificationShare_DISPATCH(struct KernelHostVgpuDeviceApi *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__kernelhostvgpudeviceapiSetNotificationShare__(pNotifier, pNotifShare); } -static inline NvBool kernelhostvgpudeviceapiAccessCallback_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__kernelhostvgpudeviceapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS kernelhostvgpudeviceapiUnregisterEvent_DISPATCH(struct KernelHostVgpuDeviceApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__kernelhostvgpudeviceapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } +static inline NV_STATUS kernelhostvgpudeviceapiGetOrAllocNotifShare_DISPATCH(struct KernelHostVgpuDeviceApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return pNotifier->__kernelhostvgpudeviceapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); +} + +NvBool kernelhostvgpudeviceapiCanCopy_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi); + +NV_STATUS kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_VGPU_DEVICE_INFO_PARAMS *pParams); + +NV_STATUS kernelhostvgpudeviceapiCtrlCmdSetVgpuGuestLifeCycleState_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_VGPU_GUEST_LIFE_CYCLE_STATE_PARAMS *pParams); + +NV_STATUS kernelhostvgpudeviceapiCtrlCmdSetOfflinedPagePatchInfo_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_OFFLINED_PAGE_PATCHINFO_PARAMS *pParams); + +NV_STATUS kernelhostvgpudeviceapiCtrlCmdVfConfigSpaceAccess_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_VF_CONFIG_SPACE_ACCESS_PARAMS *pParams); + +NV_STATUS kernelhostvgpudeviceapiCtrlCmdBindFecsEvtbuf_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_BIND_FECS_EVTBUF_PARAMS *pParams); + +NV_STATUS kernelhostvgpudeviceapiCtrlCmdTriggerPrivDoorbell_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_TRIGGER_PRIV_DOORBELL_PARAMS *pParams); + +NV_STATUS kernelhostvgpudeviceapiCtrlCmdEventSetNotification_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_EVENT_SET_NOTIFICATION_PARAMS *pSetEventParams); + +NV_STATUS kernelhostvgpudeviceapiCtrlCmdGetBarMappingRanges_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_GET_BAR_MAPPING_RANGES_PARAMS *pParams); + +NV_STATUS kernelhostvgpudeviceapiCtrlCmdRestoreDefaultExecPartition_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi); + +NV_STATUS kernelhostvgpudeviceapiCtrlCmdFreeStates_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_FREE_STATES_PARAMS *pParams); + NV_STATUS kernelhostvgpudeviceapiConstruct_IMPL(struct KernelHostVgpuDeviceApi *arg_pKernelHostVgpuDeviceApi, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_kernelhostvgpudeviceapiConstruct(arg_pKernelHostVgpuDeviceApi, arg_pCallContext, arg_pParams) kernelhostvgpudeviceapiConstruct_IMPL(arg_pKernelHostVgpuDeviceApi, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_kernel_ioctrl_nvoc.c b/src/nvidia/generated/g_kernel_ioctrl_nvoc.c index 0366dc0c72..5326020e49 100644 --- a/src/nvidia/generated/g_kernel_ioctrl_nvoc.c +++ b/src/nvidia/generated/g_kernel_ioctrl_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelIoctrl = /*pExportInfo=*/ &__nvoc_export_info_KernelIoctrl }; -static NV_STATUS __nvoc_thunk_KernelIoctrl_engstateConstructEngine(struct OBJGPU *arg0, struct OBJENGSTATE *arg1, NvU32 arg2) { - return kioctrlConstructEngine(arg0, (struct KernelIoctrl *)(((unsigned char *)arg1) - __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg2); +// 1 down-thunk(s) defined to bridge methods in KernelIoctrl from superclasses + +// kioctrlConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelIoctrl_engstateConstructEngine(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3) { + return kioctrlConstructEngine(arg1, (struct KernelIoctrl *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kioctrlStateLoad(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg0) { - return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg0); + +// 13 up-thunk(s) defined to bridge methods in KernelIoctrl to superclasses + +// kioctrlInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kioctrlInitMissing(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kioctrlStateUnload(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg0) { - return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg0); +// kioctrlStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreInitLocked(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kioctrlStateInitLocked(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { - return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); +// kioctrlStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreInitUnlocked(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kioctrlStatePreLoad(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg0); +// kioctrlStateInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStateInitLocked(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { + return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kioctrlStatePostUnload(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg0); +// kioctrlStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStateInitUnlocked(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_kioctrlStateDestroy(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { - engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); +// kioctrlStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreLoad(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kioctrlStatePreUnload(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg0); +// kioctrlStateLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStateLoad(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { + return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kioctrlStateInitUnlocked(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); +// kioctrlStatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePostLoad(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_kioctrlInitMissing(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); +// kioctrlStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreUnload(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kioctrlStatePreInitLocked(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); +// kioctrlStateUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStateUnload(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { + return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kioctrlStatePreInitUnlocked(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); +// kioctrlStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePostUnload(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kioctrlStatePostLoad(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg0); +// kioctrlStateDestroy: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kioctrlStateDestroy(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { + engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); } -static NvBool __nvoc_thunk_OBJENGSTATE_kioctrlIsPresent(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); +// kioctrlIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_kioctrlIsPresent(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelIoctrl = { /*numEntries=*/ 0, @@ -178,6 +198,7 @@ NV_STATUS __nvoc_ctor_KernelIoctrl(KernelIoctrl *pThis, RmHalspecOwner *pRmhalsp return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelIoctrl_1(KernelIoctrl *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -190,9 +211,11 @@ static void __nvoc_init_funcTable_KernelIoctrl_1(KernelIoctrl *pThis, RmHalspecO PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); + // kioctrlConstructEngine -- virtual override (engstate) base (engstate) pThis->__kioctrlConstructEngine__ = &kioctrlConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelIoctrl_engstateConstructEngine; - // Hal function -- kioctrlGetMinionEnableDefault + // kioctrlGetMinionEnableDefault -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000380UL) )) /* ChipHal: TU106 | TU116 | TU117 */ { pThis->__kioctrlGetMinionEnableDefault__ = &kioctrlGetMinionEnableDefault_bf6dfa; @@ -202,7 +225,7 @@ static void __nvoc_init_funcTable_KernelIoctrl_1(KernelIoctrl *pThis, RmHalspecO pThis->__kioctrlGetMinionEnableDefault__ = &kioctrlGetMinionEnableDefault_GV100; } - // Hal function -- kioctrlMinionConstruct + // kioctrlMinionConstruct -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000380UL) )) /* ChipHal: TU106 | TU116 | TU117 */ { pThis->__kioctrlMinionConstruct__ = &kioctrlMinionConstruct_ac1694; @@ -212,36 +235,51 @@ static void __nvoc_init_funcTable_KernelIoctrl_1(KernelIoctrl *pThis, RmHalspecO pThis->__kioctrlMinionConstruct__ = &kioctrlMinionConstruct_GV100; } - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelIoctrl_engstateConstructEngine; + // kioctrlInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__kioctrlInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlInitMissing; - pThis->__kioctrlStateLoad__ = &__nvoc_thunk_OBJENGSTATE_kioctrlStateLoad; + // kioctrlStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__kioctrlStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreInitLocked; - pThis->__kioctrlStateUnload__ = &__nvoc_thunk_OBJENGSTATE_kioctrlStateUnload; + // kioctrlStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kioctrlStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreInitUnlocked; - pThis->__kioctrlStateInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kioctrlStateInitLocked; + // kioctrlStateInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__kioctrlStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStateInitLocked; - pThis->__kioctrlStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_kioctrlStatePreLoad; + // kioctrlStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kioctrlStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStateInitUnlocked; - pThis->__kioctrlStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_kioctrlStatePostUnload; + // kioctrlStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__kioctrlStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreLoad; - pThis->__kioctrlStateDestroy__ = &__nvoc_thunk_OBJENGSTATE_kioctrlStateDestroy; + // kioctrlStateLoad -- virtual inherited (engstate) base (engstate) + pThis->__kioctrlStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStateLoad; - pThis->__kioctrlStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_kioctrlStatePreUnload; + // kioctrlStatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__kioctrlStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStatePostLoad; - pThis->__kioctrlStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kioctrlStateInitUnlocked; + // kioctrlStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__kioctrlStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreUnload; - pThis->__kioctrlInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kioctrlInitMissing; + // kioctrlStateUnload -- virtual inherited (engstate) base (engstate) + pThis->__kioctrlStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStateUnload; - pThis->__kioctrlStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kioctrlStatePreInitLocked; + // kioctrlStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__kioctrlStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStatePostUnload; - pThis->__kioctrlStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kioctrlStatePreInitUnlocked; + // kioctrlStateDestroy -- virtual inherited (engstate) base (engstate) + pThis->__kioctrlStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStateDestroy; - pThis->__kioctrlStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_kioctrlStatePostLoad; + // kioctrlIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__kioctrlIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlIsPresent; +} // End __nvoc_init_funcTable_KernelIoctrl_1 with approximately 19 basic block(s). - pThis->__kioctrlIsPresent__ = &__nvoc_thunk_OBJENGSTATE_kioctrlIsPresent; -} +// Initialize vtable(s) for 16 virtual method(s). void __nvoc_init_funcTable_KernelIoctrl(KernelIoctrl *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 16 per-object function pointer(s). __nvoc_init_funcTable_KernelIoctrl_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_ioctrl_nvoc.h b/src/nvidia/generated/g_kernel_ioctrl_nvoc.h index f96acda7f4..95de1646da 100644 --- a/src/nvidia/generated/g_kernel_ioctrl_nvoc.h +++ b/src/nvidia/generated/g_kernel_ioctrl_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_IOCTRL_NVOC_H_ #define _G_KERNEL_IOCTRL_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_ioctrl_nvoc.h" #ifndef _KERNEL_IOCTRL_H_ @@ -65,31 +73,44 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelIoctrl { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct KernelIoctrl *__nvoc_pbase_KernelIoctrl; - NV_STATUS (*__kioctrlConstructEngine__)(struct OBJGPU *, struct KernelIoctrl *, NvU32); - NvBool (*__kioctrlGetMinionEnableDefault__)(struct OBJGPU *, struct KernelIoctrl *); - NV_STATUS (*__kioctrlMinionConstruct__)(struct OBJGPU *, struct KernelIoctrl *); - NV_STATUS (*__kioctrlStateLoad__)(POBJGPU, struct KernelIoctrl *, NvU32); - NV_STATUS (*__kioctrlStateUnload__)(POBJGPU, struct KernelIoctrl *, NvU32); - NV_STATUS (*__kioctrlStateInitLocked__)(POBJGPU, struct KernelIoctrl *); - NV_STATUS (*__kioctrlStatePreLoad__)(POBJGPU, struct KernelIoctrl *, NvU32); - NV_STATUS (*__kioctrlStatePostUnload__)(POBJGPU, struct KernelIoctrl *, NvU32); - void (*__kioctrlStateDestroy__)(POBJGPU, struct KernelIoctrl *); - NV_STATUS (*__kioctrlStatePreUnload__)(POBJGPU, struct KernelIoctrl *, NvU32); - NV_STATUS (*__kioctrlStateInitUnlocked__)(POBJGPU, struct KernelIoctrl *); - void (*__kioctrlInitMissing__)(POBJGPU, struct KernelIoctrl *); - NV_STATUS (*__kioctrlStatePreInitLocked__)(POBJGPU, struct KernelIoctrl *); - NV_STATUS (*__kioctrlStatePreInitUnlocked__)(POBJGPU, struct KernelIoctrl *); - NV_STATUS (*__kioctrlStatePostLoad__)(POBJGPU, struct KernelIoctrl *, NvU32); - NvBool (*__kioctrlIsPresent__)(POBJGPU, struct KernelIoctrl *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct KernelIoctrl *__nvoc_pbase_KernelIoctrl; // kioctrl + + // Vtable with 16 per-object function pointers + NV_STATUS (*__kioctrlConstructEngine__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NvBool (*__kioctrlGetMinionEnableDefault__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // halified (2 hals) body + NV_STATUS (*__kioctrlMinionConstruct__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // halified (2 hals) body + void (*__kioctrlInitMissing__)(POBJGPU, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStatePreInitLocked__)(POBJGPU, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStatePreInitUnlocked__)(POBJGPU, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStateInitLocked__)(POBJGPU, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStateInitUnlocked__)(POBJGPU, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStatePreLoad__)(POBJGPU, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStateLoad__)(POBJGPU, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStatePostLoad__)(POBJGPU, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStatePreUnload__)(POBJGPU, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStateUnload__)(POBJGPU, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStatePostUnload__)(POBJGPU, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__kioctrlStateDestroy__)(POBJGPU, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__kioctrlIsPresent__)(POBJGPU, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) + + // 4 PDB properties NvBool PDB_PROP_KIOCTRL_MINION_AVAILABLE; NvBool PDB_PROP_KIOCTRL_MINION_FORCE_BOOT; NvBool PDB_PROP_KIOCTRL_MINION_CACHE_SEEDS; + + // Data members NvU32 PRIVATE_FIELD(PublicId); NvU32 PRIVATE_FIELD(localDiscoveredLinks); NvU32 PRIVATE_FIELD(localGlobalLinkOffset); @@ -99,31 +120,44 @@ struct KernelIoctrl { NvU8 PRIVATE_FIELD(numDevices); }; + struct KernelIoctrl_PRIVATE { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct KernelIoctrl *__nvoc_pbase_KernelIoctrl; - NV_STATUS (*__kioctrlConstructEngine__)(struct OBJGPU *, struct KernelIoctrl *, NvU32); - NvBool (*__kioctrlGetMinionEnableDefault__)(struct OBJGPU *, struct KernelIoctrl *); - NV_STATUS (*__kioctrlMinionConstruct__)(struct OBJGPU *, struct KernelIoctrl *); - NV_STATUS (*__kioctrlStateLoad__)(POBJGPU, struct KernelIoctrl *, NvU32); - NV_STATUS (*__kioctrlStateUnload__)(POBJGPU, struct KernelIoctrl *, NvU32); - NV_STATUS (*__kioctrlStateInitLocked__)(POBJGPU, struct KernelIoctrl *); - NV_STATUS (*__kioctrlStatePreLoad__)(POBJGPU, struct KernelIoctrl *, NvU32); - NV_STATUS (*__kioctrlStatePostUnload__)(POBJGPU, struct KernelIoctrl *, NvU32); - void (*__kioctrlStateDestroy__)(POBJGPU, struct KernelIoctrl *); - NV_STATUS (*__kioctrlStatePreUnload__)(POBJGPU, struct KernelIoctrl *, NvU32); - NV_STATUS (*__kioctrlStateInitUnlocked__)(POBJGPU, struct KernelIoctrl *); - void (*__kioctrlInitMissing__)(POBJGPU, struct KernelIoctrl *); - NV_STATUS (*__kioctrlStatePreInitLocked__)(POBJGPU, struct KernelIoctrl *); - NV_STATUS (*__kioctrlStatePreInitUnlocked__)(POBJGPU, struct KernelIoctrl *); - NV_STATUS (*__kioctrlStatePostLoad__)(POBJGPU, struct KernelIoctrl *, NvU32); - NvBool (*__kioctrlIsPresent__)(POBJGPU, struct KernelIoctrl *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct KernelIoctrl *__nvoc_pbase_KernelIoctrl; // kioctrl + + // Vtable with 16 per-object function pointers + NV_STATUS (*__kioctrlConstructEngine__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NvBool (*__kioctrlGetMinionEnableDefault__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // halified (2 hals) body + NV_STATUS (*__kioctrlMinionConstruct__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // halified (2 hals) body + void (*__kioctrlInitMissing__)(POBJGPU, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStatePreInitLocked__)(POBJGPU, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStatePreInitUnlocked__)(POBJGPU, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStateInitLocked__)(POBJGPU, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStateInitUnlocked__)(POBJGPU, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStatePreLoad__)(POBJGPU, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStateLoad__)(POBJGPU, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStatePostLoad__)(POBJGPU, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStatePreUnload__)(POBJGPU, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStateUnload__)(POBJGPU, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStatePostUnload__)(POBJGPU, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__kioctrlStateDestroy__)(POBJGPU, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__kioctrlIsPresent__)(POBJGPU, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) + + // 4 PDB properties NvBool PDB_PROP_KIOCTRL_MINION_AVAILABLE; NvBool PDB_PROP_KIOCTRL_MINION_FORCE_BOOT; NvBool PDB_PROP_KIOCTRL_MINION_CACHE_SEEDS; + + // Data members NvU32 PublicId; NvU32 localDiscoveredLinks; NvU32 localGlobalLinkOffset; @@ -142,6 +176,7 @@ typedef struct KernelIoctrl KernelIoctrl; #define __nvoc_class_id_KernelIoctrl 0x880c7d #endif /* __nvoc_class_id_KernelIoctrl */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelIoctrl; #define __staticCast_KernelIoctrl(pThis) \ @@ -154,6 +189,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelIoctrl; ((KernelIoctrl*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelIoctrl))) #endif //__nvoc_kernel_ioctrl_h_disabled +// Property macros #define PDB_PROP_KIOCTRL_MINION_CACHE_SEEDS_BASE_CAST #define PDB_PROP_KIOCTRL_MINION_CACHE_SEEDS_BASE_NAME PDB_PROP_KIOCTRL_MINION_CACHE_SEEDS #define PDB_PROP_KIOCTRL_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. @@ -169,102 +205,122 @@ NV_STATUS __nvoc_objCreate_KernelIoctrl(KernelIoctrl**, Dynamic*, NvU32); #define __objCreate_KernelIoctrl(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelIoctrl((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define kioctrlConstructEngine(arg0, arg1, arg2) kioctrlConstructEngine_DISPATCH(arg0, arg1, arg2) + +// Wrapper macros +#define kioctrlConstructEngine_FNPTR(arg_this) arg_this->__kioctrlConstructEngine__ +#define kioctrlConstructEngine(arg1, arg_this, arg3) kioctrlConstructEngine_DISPATCH(arg1, arg_this, arg3) +#define kioctrlGetMinionEnableDefault_FNPTR(pKernelIoctrl) pKernelIoctrl->__kioctrlGetMinionEnableDefault__ #define kioctrlGetMinionEnableDefault(pGpu, pKernelIoctrl) kioctrlGetMinionEnableDefault_DISPATCH(pGpu, pKernelIoctrl) #define kioctrlGetMinionEnableDefault_HAL(pGpu, pKernelIoctrl) kioctrlGetMinionEnableDefault_DISPATCH(pGpu, pKernelIoctrl) +#define kioctrlMinionConstruct_FNPTR(pKernelIoctrl) pKernelIoctrl->__kioctrlMinionConstruct__ #define kioctrlMinionConstruct(pGpu, pKernelIoctrl) kioctrlMinionConstruct_DISPATCH(pGpu, pKernelIoctrl) #define kioctrlMinionConstruct_HAL(pGpu, pKernelIoctrl) kioctrlMinionConstruct_DISPATCH(pGpu, pKernelIoctrl) -#define kioctrlStateLoad(pGpu, pEngstate, arg0) kioctrlStateLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kioctrlStateUnload(pGpu, pEngstate, arg0) kioctrlStateUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kioctrlStateInitLocked(pGpu, pEngstate) kioctrlStateInitLocked_DISPATCH(pGpu, pEngstate) -#define kioctrlStatePreLoad(pGpu, pEngstate, arg0) kioctrlStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kioctrlStatePostUnload(pGpu, pEngstate, arg0) kioctrlStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kioctrlStateDestroy(pGpu, pEngstate) kioctrlStateDestroy_DISPATCH(pGpu, pEngstate) -#define kioctrlStatePreUnload(pGpu, pEngstate, arg0) kioctrlStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kioctrlStateInitUnlocked(pGpu, pEngstate) kioctrlStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kioctrlInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define kioctrlInitMissing(pGpu, pEngstate) kioctrlInitMissing_DISPATCH(pGpu, pEngstate) +#define kioctrlStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define kioctrlStatePreInitLocked(pGpu, pEngstate) kioctrlStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define kioctrlStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define kioctrlStatePreInitUnlocked(pGpu, pEngstate) kioctrlStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kioctrlStatePostLoad(pGpu, pEngstate, arg0) kioctrlStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) +#define kioctrlStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define kioctrlStateInitLocked(pGpu, pEngstate) kioctrlStateInitLocked_DISPATCH(pGpu, pEngstate) +#define kioctrlStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kioctrlStateInitUnlocked(pGpu, pEngstate) kioctrlStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kioctrlStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kioctrlStatePreLoad(pGpu, pEngstate, arg3) kioctrlStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kioctrlStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define kioctrlStateLoad(pGpu, pEngstate, arg3) kioctrlStateLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kioctrlStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kioctrlStatePostLoad(pGpu, pEngstate, arg3) kioctrlStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kioctrlStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kioctrlStatePreUnload(pGpu, pEngstate, arg3) kioctrlStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kioctrlStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define kioctrlStateUnload(pGpu, pEngstate, arg3) kioctrlStateUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kioctrlStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kioctrlStatePostUnload(pGpu, pEngstate, arg3) kioctrlStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kioctrlStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define kioctrlStateDestroy(pGpu, pEngstate) kioctrlStateDestroy_DISPATCH(pGpu, pEngstate) +#define kioctrlIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define kioctrlIsPresent(pGpu, pEngstate) kioctrlIsPresent_DISPATCH(pGpu, pEngstate) -NV_STATUS kioctrlConstructEngine_IMPL(struct OBJGPU *arg0, struct KernelIoctrl *arg1, NvU32 arg2); -static inline NV_STATUS kioctrlConstructEngine_DISPATCH(struct OBJGPU *arg0, struct KernelIoctrl *arg1, NvU32 arg2) { - return arg1->__kioctrlConstructEngine__(arg0, arg1, arg2); +// Dispatch functions +static inline NV_STATUS kioctrlConstructEngine_DISPATCH(struct OBJGPU *arg1, struct KernelIoctrl *arg_this, NvU32 arg3) { + return arg_this->__kioctrlConstructEngine__(arg1, arg_this, arg3); } -static inline NvBool kioctrlGetMinionEnableDefault_bf6dfa(struct OBJGPU *pGpu, struct KernelIoctrl *pKernelIoctrl) { - return ((NvBool)(0 != 0)); -} - -NvBool kioctrlGetMinionEnableDefault_GV100(struct OBJGPU *pGpu, struct KernelIoctrl *pKernelIoctrl); - static inline NvBool kioctrlGetMinionEnableDefault_DISPATCH(struct OBJGPU *pGpu, struct KernelIoctrl *pKernelIoctrl) { return pKernelIoctrl->__kioctrlGetMinionEnableDefault__(pGpu, pKernelIoctrl); } -static inline NV_STATUS kioctrlMinionConstruct_ac1694(struct OBJGPU *pGpu, struct KernelIoctrl *pKernelIoctrl) { - return NV_OK; -} - -NV_STATUS kioctrlMinionConstruct_GV100(struct OBJGPU *pGpu, struct KernelIoctrl *pKernelIoctrl); - static inline NV_STATUS kioctrlMinionConstruct_DISPATCH(struct OBJGPU *pGpu, struct KernelIoctrl *pKernelIoctrl) { return pKernelIoctrl->__kioctrlMinionConstruct__(pGpu, pKernelIoctrl); } -static inline NV_STATUS kioctrlStateLoad_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg0) { - return pEngstate->__kioctrlStateLoad__(pGpu, pEngstate, arg0); +static inline void kioctrlInitMissing_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { + pEngstate->__kioctrlInitMissing__(pGpu, pEngstate); } -static inline NV_STATUS kioctrlStateUnload_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg0) { - return pEngstate->__kioctrlStateUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS kioctrlStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { + return pEngstate->__kioctrlStatePreInitLocked__(pGpu, pEngstate); +} + +static inline NV_STATUS kioctrlStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { + return pEngstate->__kioctrlStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kioctrlStateInitLocked_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { return pEngstate->__kioctrlStateInitLocked__(pGpu, pEngstate); } -static inline NV_STATUS kioctrlStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg0) { - return pEngstate->__kioctrlStatePreLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS kioctrlStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { + return pEngstate->__kioctrlStateInitUnlocked__(pGpu, pEngstate); } -static inline NV_STATUS kioctrlStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg0) { - return pEngstate->__kioctrlStatePostUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS kioctrlStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { + return pEngstate->__kioctrlStatePreLoad__(pGpu, pEngstate, arg3); } -static inline void kioctrlStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { - pEngstate->__kioctrlStateDestroy__(pGpu, pEngstate); +static inline NV_STATUS kioctrlStateLoad_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { + return pEngstate->__kioctrlStateLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kioctrlStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg0) { - return pEngstate->__kioctrlStatePreUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS kioctrlStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { + return pEngstate->__kioctrlStatePostLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kioctrlStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { - return pEngstate->__kioctrlStateInitUnlocked__(pGpu, pEngstate); -} - -static inline void kioctrlInitMissing_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { - pEngstate->__kioctrlInitMissing__(pGpu, pEngstate); +static inline NV_STATUS kioctrlStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { + return pEngstate->__kioctrlStatePreUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kioctrlStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { - return pEngstate->__kioctrlStatePreInitLocked__(pGpu, pEngstate); +static inline NV_STATUS kioctrlStateUnload_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { + return pEngstate->__kioctrlStateUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kioctrlStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { - return pEngstate->__kioctrlStatePreInitUnlocked__(pGpu, pEngstate); +static inline NV_STATUS kioctrlStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { + return pEngstate->__kioctrlStatePostUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kioctrlStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate, NvU32 arg0) { - return pEngstate->__kioctrlStatePostLoad__(pGpu, pEngstate, arg0); +static inline void kioctrlStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { + pEngstate->__kioctrlStateDestroy__(pGpu, pEngstate); } static inline NvBool kioctrlIsPresent_DISPATCH(POBJGPU pGpu, struct KernelIoctrl *pEngstate) { return pEngstate->__kioctrlIsPresent__(pGpu, pEngstate); } +NV_STATUS kioctrlConstructEngine_IMPL(struct OBJGPU *arg1, struct KernelIoctrl *arg2, NvU32 arg3); + +static inline NvBool kioctrlGetMinionEnableDefault_bf6dfa(struct OBJGPU *pGpu, struct KernelIoctrl *pKernelIoctrl) { + return ((NvBool)(0 != 0)); +} + +NvBool kioctrlGetMinionEnableDefault_GV100(struct OBJGPU *pGpu, struct KernelIoctrl *pKernelIoctrl); + +static inline NV_STATUS kioctrlMinionConstruct_ac1694(struct OBJGPU *pGpu, struct KernelIoctrl *pKernelIoctrl) { + return NV_OK; +} + +NV_STATUS kioctrlMinionConstruct_GV100(struct OBJGPU *pGpu, struct KernelIoctrl *pKernelIoctrl); + static inline NvU32 kioctrlGetLocalDiscoveredLinks(struct OBJGPU *pGpu, struct KernelIoctrl *pKernelIoctrl) { struct KernelIoctrl_PRIVATE *pKernelIoctrl_PRIVATE = (struct KernelIoctrl_PRIVATE *)pKernelIoctrl; return pKernelIoctrl_PRIVATE->localDiscoveredLinks; @@ -280,14 +336,14 @@ static inline NvU32 kioctrlGetPublicId(struct OBJGPU *pGpu, struct KernelIoctrl return pKernelIoctrl_PRIVATE->PublicId; } -void kioctrlDestructEngine_IMPL(struct KernelIoctrl *arg0); +void kioctrlDestructEngine_IMPL(struct KernelIoctrl *arg1); #ifdef __nvoc_kernel_ioctrl_h_disabled -static inline void kioctrlDestructEngine(struct KernelIoctrl *arg0) { +static inline void kioctrlDestructEngine(struct KernelIoctrl *arg1) { NV_ASSERT_FAILED_PRECOMP("KernelIoctrl was disabled!"); } #else //__nvoc_kernel_ioctrl_h_disabled -#define kioctrlDestructEngine(arg0) kioctrlDestructEngine_IMPL(arg0) +#define kioctrlDestructEngine(arg1) kioctrlDestructEngine_IMPL(arg1) #endif //__nvoc_kernel_ioctrl_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_kernel_mc_nvoc.c b/src/nvidia/generated/g_kernel_mc_nvoc.c index ef747d01f3..58a98dd1e1 100644 --- a/src/nvidia/generated/g_kernel_mc_nvoc.c +++ b/src/nvidia/generated/g_kernel_mc_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelMc = /*pExportInfo=*/ &__nvoc_export_info_KernelMc }; -static NV_STATUS __nvoc_thunk_KernelMc_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelMc) { - return kmcStateInitLocked(pGpu, (struct KernelMc *)(((unsigned char *)pKernelMc) - __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); +// 2 down-thunk(s) defined to bridge methods in KernelMc from superclasses + +// kmcStateInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelMc_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelMc) { + return kmcStateInitLocked(pGpu, (struct KernelMc *)(((unsigned char *) pKernelMc) - __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_KernelMc_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelMc, NvU32 arg0) { - return kmcStateLoad(pGpu, (struct KernelMc *)(((unsigned char *)pKernelMc) - __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg0); +// kmcStateLoad: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelMc_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelMc, NvU32 arg3) { + return kmcStateLoad(pGpu, (struct KernelMc *)(((unsigned char *) pKernelMc) - __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmcStateUnload(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg0) { - return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg0); + +// 12 up-thunk(s) defined to bridge methods in KernelMc to superclasses + +// kmcConstructEngine: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcConstructEngine(POBJGPU pGpu, struct KernelMc *pEngstate, ENGDESCRIPTOR arg3) { + return engstateConstructEngine(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmcStatePreLoad(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg0); +// kmcInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kmcInitMissing(POBJGPU pGpu, struct KernelMc *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmcStatePostUnload(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg0); +// kmcStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePreInitLocked(POBJGPU pGpu, struct KernelMc *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_kmcStateDestroy(POBJGPU pGpu, struct KernelMc *pEngstate) { - engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); +// kmcStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePreInitUnlocked(POBJGPU pGpu, struct KernelMc *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmcStatePreUnload(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg0); +// kmcStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStateInitUnlocked(POBJGPU pGpu, struct KernelMc *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmcStateInitUnlocked(POBJGPU pGpu, struct KernelMc *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); +// kmcStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePreLoad(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_kmcInitMissing(POBJGPU pGpu, struct KernelMc *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); +// kmcStatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePostLoad(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmcStatePreInitLocked(POBJGPU pGpu, struct KernelMc *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); +// kmcStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePreUnload(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmcStatePreInitUnlocked(POBJGPU pGpu, struct KernelMc *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); +// kmcStateUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStateUnload(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg3) { + return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmcStatePostLoad(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg0); +// kmcStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePostUnload(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmcConstructEngine(POBJGPU pGpu, struct KernelMc *pEngstate, ENGDESCRIPTOR arg0) { - return engstateConstructEngine(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg0); +// kmcStateDestroy: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kmcStateDestroy(POBJGPU pGpu, struct KernelMc *pEngstate) { + engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); } -static NvBool __nvoc_thunk_OBJENGSTATE_kmcIsPresent(POBJGPU pGpu, struct KernelMc *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); +// kmcIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_kmcIsPresent(POBJGPU pGpu, struct KernelMc *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelMc = { /*numEntries=*/ 0, @@ -157,6 +177,7 @@ NV_STATUS __nvoc_ctor_KernelMc(KernelMc *pThis, RmHalspecOwner *pRmhalspecowner) return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelMc_1(KernelMc *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -165,68 +186,84 @@ static void __nvoc_init_funcTable_KernelMc_1(KernelMc *pThis, RmHalspecOwner *pR PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); + // kmcStateInitLocked -- virtual override (engstate) base (engstate) pThis->__kmcStateInitLocked__ = &kmcStateInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelMc_engstateStateInitLocked; + // kmcStateLoad -- virtual override (engstate) base (engstate) pThis->__kmcStateLoad__ = &kmcStateLoad_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelMc_engstateStateLoad; - // Hal function -- kmcWritePmcEnableReg + // kmcWritePmcEnableReg -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kmcWritePmcEnableReg__ = &kmcWritePmcEnableReg_GH100; } else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { - pThis->__kmcWritePmcEnableReg__ = &kmcWritePmcEnableReg_GK104; + pThis->__kmcWritePmcEnableReg__ = &kmcWritePmcEnableReg_GM107; } else { pThis->__kmcWritePmcEnableReg__ = &kmcWritePmcEnableReg_GA100; } - // Hal function -- kmcReadPmcEnableReg + // kmcReadPmcEnableReg -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__kmcReadPmcEnableReg__ = &kmcReadPmcEnableReg_GH100; } else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { - pThis->__kmcReadPmcEnableReg__ = &kmcReadPmcEnableReg_GK104; + pThis->__kmcReadPmcEnableReg__ = &kmcReadPmcEnableReg_GM107; } else { pThis->__kmcReadPmcEnableReg__ = &kmcReadPmcEnableReg_GA100; } - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_thunk_KernelMc_engstateStateInitLocked; + // kmcConstructEngine -- virtual inherited (engstate) base (engstate) + pThis->__kmcConstructEngine__ = &__nvoc_up_thunk_OBJENGSTATE_kmcConstructEngine; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_thunk_KernelMc_engstateStateLoad; + // kmcInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__kmcInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kmcInitMissing; - pThis->__kmcStateUnload__ = &__nvoc_thunk_OBJENGSTATE_kmcStateUnload; + // kmcStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__kmcStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStatePreInitLocked; - pThis->__kmcStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_kmcStatePreLoad; + // kmcStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kmcStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStatePreInitUnlocked; - pThis->__kmcStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_kmcStatePostUnload; + // kmcStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kmcStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStateInitUnlocked; - pThis->__kmcStateDestroy__ = &__nvoc_thunk_OBJENGSTATE_kmcStateDestroy; + // kmcStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__kmcStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStatePreLoad; - pThis->__kmcStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_kmcStatePreUnload; + // kmcStatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__kmcStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStatePostLoad; - pThis->__kmcStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kmcStateInitUnlocked; + // kmcStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__kmcStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStatePreUnload; - pThis->__kmcInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kmcInitMissing; + // kmcStateUnload -- virtual inherited (engstate) base (engstate) + pThis->__kmcStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStateUnload; - pThis->__kmcStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kmcStatePreInitLocked; + // kmcStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__kmcStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStatePostUnload; - pThis->__kmcStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kmcStatePreInitUnlocked; + // kmcStateDestroy -- virtual inherited (engstate) base (engstate) + pThis->__kmcStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStateDestroy; - pThis->__kmcStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_kmcStatePostLoad; + // kmcIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__kmcIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kmcIsPresent; +} // End __nvoc_init_funcTable_KernelMc_1 with approximately 22 basic block(s). - pThis->__kmcConstructEngine__ = &__nvoc_thunk_OBJENGSTATE_kmcConstructEngine; - - pThis->__kmcIsPresent__ = &__nvoc_thunk_OBJENGSTATE_kmcIsPresent; -} +// Initialize vtable(s) for 16 virtual method(s). void __nvoc_init_funcTable_KernelMc(KernelMc *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 16 per-object function pointer(s). __nvoc_init_funcTable_KernelMc_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_mc_nvoc.h b/src/nvidia/generated/g_kernel_mc_nvoc.h index 8defb4fb3e..8a0c2bf267 100644 --- a/src/nvidia/generated/g_kernel_mc_nvoc.h +++ b/src/nvidia/generated/g_kernel_mc_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_KERNEL_MC_NVOC_H_ #define _G_KERNEL_MC_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_mc_nvoc.h" #ifndef KERNEL_MC_H @@ -61,28 +69,39 @@ typedef struct LATENCY_TIMER_CONTROL #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelMc { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct KernelMc *__nvoc_pbase_KernelMc; - NV_STATUS (*__kmcStateInitLocked__)(struct OBJGPU *, struct KernelMc *); - NV_STATUS (*__kmcStateLoad__)(struct OBJGPU *, struct KernelMc *, NvU32); - NV_STATUS (*__kmcWritePmcEnableReg__)(struct OBJGPU *, struct KernelMc *, NvU32, NvBool, NvBool); - NvU32 (*__kmcReadPmcEnableReg__)(struct OBJGPU *, struct KernelMc *, NvBool); - NV_STATUS (*__kmcStateUnload__)(POBJGPU, struct KernelMc *, NvU32); - NV_STATUS (*__kmcStatePreLoad__)(POBJGPU, struct KernelMc *, NvU32); - NV_STATUS (*__kmcStatePostUnload__)(POBJGPU, struct KernelMc *, NvU32); - void (*__kmcStateDestroy__)(POBJGPU, struct KernelMc *); - NV_STATUS (*__kmcStatePreUnload__)(POBJGPU, struct KernelMc *, NvU32); - NV_STATUS (*__kmcStateInitUnlocked__)(POBJGPU, struct KernelMc *); - void (*__kmcInitMissing__)(POBJGPU, struct KernelMc *); - NV_STATUS (*__kmcStatePreInitLocked__)(POBJGPU, struct KernelMc *); - NV_STATUS (*__kmcStatePreInitUnlocked__)(POBJGPU, struct KernelMc *); - NV_STATUS (*__kmcStatePostLoad__)(POBJGPU, struct KernelMc *, NvU32); - NV_STATUS (*__kmcConstructEngine__)(POBJGPU, struct KernelMc *, ENGDESCRIPTOR); - NvBool (*__kmcIsPresent__)(POBJGPU, struct KernelMc *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct KernelMc *__nvoc_pbase_KernelMc; // kmc + + // Vtable with 16 per-object function pointers + NV_STATUS (*__kmcStateInitLocked__)(struct OBJGPU *, struct KernelMc * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmcStateLoad__)(struct OBJGPU *, struct KernelMc * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmcWritePmcEnableReg__)(struct OBJGPU *, struct KernelMc * /*this*/, NvU32, NvBool, NvBool); // halified (3 hals) body + NvU32 (*__kmcReadPmcEnableReg__)(struct OBJGPU *, struct KernelMc * /*this*/, NvBool); // halified (3 hals) body + NV_STATUS (*__kmcConstructEngine__)(POBJGPU, struct KernelMc * /*this*/, ENGDESCRIPTOR); // virtual inherited (engstate) base (engstate) + void (*__kmcInitMissing__)(POBJGPU, struct KernelMc * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmcStatePreInitLocked__)(POBJGPU, struct KernelMc * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmcStatePreInitUnlocked__)(POBJGPU, struct KernelMc * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmcStateInitUnlocked__)(POBJGPU, struct KernelMc * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmcStatePreLoad__)(POBJGPU, struct KernelMc * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmcStatePostLoad__)(POBJGPU, struct KernelMc * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmcStatePreUnload__)(POBJGPU, struct KernelMc * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmcStateUnload__)(POBJGPU, struct KernelMc * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmcStatePostUnload__)(POBJGPU, struct KernelMc * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__kmcStateDestroy__)(POBJGPU, struct KernelMc * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__kmcIsPresent__)(POBJGPU, struct KernelMc * /*this*/); // virtual inherited (engstate) base (engstate) + + // Data members LATENCY_TIMER_CONTROL LatencyTimerControl; }; @@ -95,6 +114,7 @@ typedef struct KernelMc KernelMc; #define __nvoc_class_id_KernelMc 0x3827ff #endif /* __nvoc_class_id_KernelMc */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelMc; #define __staticCast_KernelMc(pThis) \ @@ -107,6 +127,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelMc; ((KernelMc*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelMc))) #endif //__nvoc_kernel_mc_h_disabled +// Property macros #define PDB_PROP_KMC_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_KMC_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -116,131 +137,151 @@ NV_STATUS __nvoc_objCreate_KernelMc(KernelMc**, Dynamic*, NvU32); #define __objCreate_KernelMc(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelMc((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define kmcStateInitLocked_FNPTR(pKernelMc) pKernelMc->__kmcStateInitLocked__ #define kmcStateInitLocked(pGpu, pKernelMc) kmcStateInitLocked_DISPATCH(pGpu, pKernelMc) -#define kmcStateLoad(pGpu, pKernelMc, arg0) kmcStateLoad_DISPATCH(pGpu, pKernelMc, arg0) -#define kmcWritePmcEnableReg(pGpu, pKernelMc, arg0, arg1, arg2) kmcWritePmcEnableReg_DISPATCH(pGpu, pKernelMc, arg0, arg1, arg2) -#define kmcWritePmcEnableReg_HAL(pGpu, pKernelMc, arg0, arg1, arg2) kmcWritePmcEnableReg_DISPATCH(pGpu, pKernelMc, arg0, arg1, arg2) -#define kmcReadPmcEnableReg(pGpu, pKernelMc, arg0) kmcReadPmcEnableReg_DISPATCH(pGpu, pKernelMc, arg0) -#define kmcReadPmcEnableReg_HAL(pGpu, pKernelMc, arg0) kmcReadPmcEnableReg_DISPATCH(pGpu, pKernelMc, arg0) -#define kmcStateUnload(pGpu, pEngstate, arg0) kmcStateUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kmcStatePreLoad(pGpu, pEngstate, arg0) kmcStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kmcStatePostUnload(pGpu, pEngstate, arg0) kmcStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kmcStateDestroy(pGpu, pEngstate) kmcStateDestroy_DISPATCH(pGpu, pEngstate) -#define kmcStatePreUnload(pGpu, pEngstate, arg0) kmcStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kmcStateInitUnlocked(pGpu, pEngstate) kmcStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kmcStateLoad_FNPTR(pKernelMc) pKernelMc->__kmcStateLoad__ +#define kmcStateLoad(pGpu, pKernelMc, arg3) kmcStateLoad_DISPATCH(pGpu, pKernelMc, arg3) +#define kmcWritePmcEnableReg_FNPTR(pKernelMc) pKernelMc->__kmcWritePmcEnableReg__ +#define kmcWritePmcEnableReg(pGpu, pKernelMc, arg3, arg4, arg5) kmcWritePmcEnableReg_DISPATCH(pGpu, pKernelMc, arg3, arg4, arg5) +#define kmcWritePmcEnableReg_HAL(pGpu, pKernelMc, arg3, arg4, arg5) kmcWritePmcEnableReg_DISPATCH(pGpu, pKernelMc, arg3, arg4, arg5) +#define kmcReadPmcEnableReg_FNPTR(pKernelMc) pKernelMc->__kmcReadPmcEnableReg__ +#define kmcReadPmcEnableReg(pGpu, pKernelMc, arg3) kmcReadPmcEnableReg_DISPATCH(pGpu, pKernelMc, arg3) +#define kmcReadPmcEnableReg_HAL(pGpu, pKernelMc, arg3) kmcReadPmcEnableReg_DISPATCH(pGpu, pKernelMc, arg3) +#define kmcConstructEngine_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ +#define kmcConstructEngine(pGpu, pEngstate, arg3) kmcConstructEngine_DISPATCH(pGpu, pEngstate, arg3) +#define kmcInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define kmcInitMissing(pGpu, pEngstate) kmcInitMissing_DISPATCH(pGpu, pEngstate) +#define kmcStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define kmcStatePreInitLocked(pGpu, pEngstate) kmcStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define kmcStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define kmcStatePreInitUnlocked(pGpu, pEngstate) kmcStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kmcStatePostLoad(pGpu, pEngstate, arg0) kmcStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kmcConstructEngine(pGpu, pEngstate, arg0) kmcConstructEngine_DISPATCH(pGpu, pEngstate, arg0) +#define kmcStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kmcStateInitUnlocked(pGpu, pEngstate) kmcStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kmcStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kmcStatePreLoad(pGpu, pEngstate, arg3) kmcStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kmcStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kmcStatePostLoad(pGpu, pEngstate, arg3) kmcStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kmcStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kmcStatePreUnload(pGpu, pEngstate, arg3) kmcStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kmcStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define kmcStateUnload(pGpu, pEngstate, arg3) kmcStateUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kmcStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kmcStatePostUnload(pGpu, pEngstate, arg3) kmcStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kmcStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define kmcStateDestroy(pGpu, pEngstate) kmcStateDestroy_DISPATCH(pGpu, pEngstate) +#define kmcIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define kmcIsPresent(pGpu, pEngstate) kmcIsPresent_DISPATCH(pGpu, pEngstate) -NV_STATUS kmcPrepareForXVEReset_GK104(struct OBJGPU *pGpu, struct KernelMc *pKernelMc); - - -#ifdef __nvoc_kernel_mc_h_disabled -static inline NV_STATUS kmcPrepareForXVEReset(struct OBJGPU *pGpu, struct KernelMc *pKernelMc) { - NV_ASSERT_FAILED_PRECOMP("KernelMc was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_kernel_mc_h_disabled -#define kmcPrepareForXVEReset(pGpu, pKernelMc) kmcPrepareForXVEReset_GK104(pGpu, pKernelMc) -#endif //__nvoc_kernel_mc_h_disabled - -#define kmcPrepareForXVEReset_HAL(pGpu, pKernelMc) kmcPrepareForXVEReset(pGpu, pKernelMc) - -NV_STATUS kmcGetMcBar0MapInfo_GK104(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU64 *arg0, NvU32 *arg1); - - -#ifdef __nvoc_kernel_mc_h_disabled -static inline NV_STATUS kmcGetMcBar0MapInfo(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU64 *arg0, NvU32 *arg1) { - NV_ASSERT_FAILED_PRECOMP("KernelMc was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_kernel_mc_h_disabled -#define kmcGetMcBar0MapInfo(pGpu, pKernelMc, arg0, arg1) kmcGetMcBar0MapInfo_GK104(pGpu, pKernelMc, arg0, arg1) -#endif //__nvoc_kernel_mc_h_disabled - -#define kmcGetMcBar0MapInfo_HAL(pGpu, pKernelMc, arg0, arg1) kmcGetMcBar0MapInfo(pGpu, pKernelMc, arg0, arg1) - -NV_STATUS kmcStateInitLocked_IMPL(struct OBJGPU *pGpu, struct KernelMc *pKernelMc); +// Dispatch functions static inline NV_STATUS kmcStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pKernelMc) { return pKernelMc->__kmcStateInitLocked__(pGpu, pKernelMc); } -NV_STATUS kmcStateLoad_IMPL(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU32 arg0); +static inline NV_STATUS kmcStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU32 arg3) { + return pKernelMc->__kmcStateLoad__(pGpu, pKernelMc, arg3); +} -static inline NV_STATUS kmcStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU32 arg0) { - return pKernelMc->__kmcStateLoad__(pGpu, pKernelMc, arg0); +static inline NV_STATUS kmcWritePmcEnableReg_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU32 arg3, NvBool arg4, NvBool arg5) { + return pKernelMc->__kmcWritePmcEnableReg__(pGpu, pKernelMc, arg3, arg4, arg5); } -NV_STATUS kmcWritePmcEnableReg_GK104(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU32 arg0, NvBool arg1, NvBool arg2); +static inline NvU32 kmcReadPmcEnableReg_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvBool arg3) { + return pKernelMc->__kmcReadPmcEnableReg__(pGpu, pKernelMc, arg3); +} -NV_STATUS kmcWritePmcEnableReg_GA100(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU32 arg0, NvBool arg1, NvBool arg2); +static inline NV_STATUS kmcConstructEngine_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, ENGDESCRIPTOR arg3) { + return pEngstate->__kmcConstructEngine__(pGpu, pEngstate, arg3); +} -NV_STATUS kmcWritePmcEnableReg_GH100(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU32 arg0, NvBool arg1, NvBool arg2); +static inline void kmcInitMissing_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate) { + pEngstate->__kmcInitMissing__(pGpu, pEngstate); +} -static inline NV_STATUS kmcWritePmcEnableReg_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU32 arg0, NvBool arg1, NvBool arg2) { - return pKernelMc->__kmcWritePmcEnableReg__(pGpu, pKernelMc, arg0, arg1, arg2); +static inline NV_STATUS kmcStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate) { + return pEngstate->__kmcStatePreInitLocked__(pGpu, pEngstate); } -NvU32 kmcReadPmcEnableReg_GK104(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvBool arg0); +static inline NV_STATUS kmcStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate) { + return pEngstate->__kmcStatePreInitUnlocked__(pGpu, pEngstate); +} -NvU32 kmcReadPmcEnableReg_GA100(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvBool arg0); +static inline NV_STATUS kmcStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate) { + return pEngstate->__kmcStateInitUnlocked__(pGpu, pEngstate); +} -NvU32 kmcReadPmcEnableReg_GH100(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvBool arg0); +static inline NV_STATUS kmcStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg3) { + return pEngstate->__kmcStatePreLoad__(pGpu, pEngstate, arg3); +} -static inline NvU32 kmcReadPmcEnableReg_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvBool arg0) { - return pKernelMc->__kmcReadPmcEnableReg__(pGpu, pKernelMc, arg0); +static inline NV_STATUS kmcStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg3) { + return pEngstate->__kmcStatePostLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kmcStateUnload_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg0) { - return pEngstate->__kmcStateUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS kmcStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg3) { + return pEngstate->__kmcStatePreUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kmcStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg0) { - return pEngstate->__kmcStatePreLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS kmcStateUnload_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg3) { + return pEngstate->__kmcStateUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS kmcStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg0) { - return pEngstate->__kmcStatePostUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS kmcStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg3) { + return pEngstate->__kmcStatePostUnload__(pGpu, pEngstate, arg3); } static inline void kmcStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate) { pEngstate->__kmcStateDestroy__(pGpu, pEngstate); } -static inline NV_STATUS kmcStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg0) { - return pEngstate->__kmcStatePreUnload__(pGpu, pEngstate, arg0); +static inline NvBool kmcIsPresent_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate) { + return pEngstate->__kmcIsPresent__(pGpu, pEngstate); } -static inline NV_STATUS kmcStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate) { - return pEngstate->__kmcStateInitUnlocked__(pGpu, pEngstate); -} +NV_STATUS kmcPrepareForXVEReset_GM107(struct OBJGPU *pGpu, struct KernelMc *pKernelMc); -static inline void kmcInitMissing_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate) { - pEngstate->__kmcInitMissing__(pGpu, pEngstate); -} -static inline NV_STATUS kmcStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate) { - return pEngstate->__kmcStatePreInitLocked__(pGpu, pEngstate); +#ifdef __nvoc_kernel_mc_h_disabled +static inline NV_STATUS kmcPrepareForXVEReset(struct OBJGPU *pGpu, struct KernelMc *pKernelMc) { + NV_ASSERT_FAILED_PRECOMP("KernelMc was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_mc_h_disabled +#define kmcPrepareForXVEReset(pGpu, pKernelMc) kmcPrepareForXVEReset_GM107(pGpu, pKernelMc) +#endif //__nvoc_kernel_mc_h_disabled -static inline NV_STATUS kmcStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate) { - return pEngstate->__kmcStatePreInitUnlocked__(pGpu, pEngstate); -} +#define kmcPrepareForXVEReset_HAL(pGpu, pKernelMc) kmcPrepareForXVEReset(pGpu, pKernelMc) -static inline NV_STATUS kmcStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg0) { - return pEngstate->__kmcStatePostLoad__(pGpu, pEngstate, arg0); -} +NV_STATUS kmcGetMcBar0MapInfo_GM107(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU64 *arg3, NvU32 *arg4); -static inline NV_STATUS kmcConstructEngine_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, ENGDESCRIPTOR arg0) { - return pEngstate->__kmcConstructEngine__(pGpu, pEngstate, arg0); -} -static inline NvBool kmcIsPresent_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate) { - return pEngstate->__kmcIsPresent__(pGpu, pEngstate); +#ifdef __nvoc_kernel_mc_h_disabled +static inline NV_STATUS kmcGetMcBar0MapInfo(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU64 *arg3, NvU32 *arg4) { + NV_ASSERT_FAILED_PRECOMP("KernelMc was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_mc_h_disabled +#define kmcGetMcBar0MapInfo(pGpu, pKernelMc, arg3, arg4) kmcGetMcBar0MapInfo_GM107(pGpu, pKernelMc, arg3, arg4) +#endif //__nvoc_kernel_mc_h_disabled + +#define kmcGetMcBar0MapInfo_HAL(pGpu, pKernelMc, arg3, arg4) kmcGetMcBar0MapInfo(pGpu, pKernelMc, arg3, arg4) + +NV_STATUS kmcStateInitLocked_IMPL(struct OBJGPU *pGpu, struct KernelMc *pKernelMc); + +NV_STATUS kmcStateLoad_IMPL(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU32 arg3); + +NV_STATUS kmcWritePmcEnableReg_GM107(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU32 arg3, NvBool arg4, NvBool arg5); + +NV_STATUS kmcWritePmcEnableReg_GA100(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU32 arg3, NvBool arg4, NvBool arg5); + +NV_STATUS kmcWritePmcEnableReg_GH100(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU32 arg3, NvBool arg4, NvBool arg5); + +NvU32 kmcReadPmcEnableReg_GM107(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvBool arg3); + +NvU32 kmcReadPmcEnableReg_GA100(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvBool arg3); + +NvU32 kmcReadPmcEnableReg_GH100(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvBool arg3); #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_kernel_mig_manager_nvoc.c b/src/nvidia/generated/g_kernel_mig_manager_nvoc.c index ff71fb9ef7..b30da4c348 100644 --- a/src/nvidia/generated/g_kernel_mig_manager_nvoc.c +++ b/src/nvidia/generated/g_kernel_mig_manager_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelMIGManager = /*pExportInfo=*/ &__nvoc_export_info_KernelMIGManager }; -static NV_STATUS __nvoc_thunk_KernelMIGManager_engstateConstructEngine(OBJGPU *arg0, struct OBJENGSTATE *arg1, ENGDESCRIPTOR arg2) { - return kmigmgrConstructEngine(arg0, (struct KernelMIGManager *)(((unsigned char *)arg1) - __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), arg2); +// 3 down-thunk(s) defined to bridge methods in KernelMIGManager from superclasses + +// kmigmgrConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelMIGManager_engstateConstructEngine(OBJGPU *arg1, struct OBJENGSTATE *arg_this, ENGDESCRIPTOR arg3) { + return kmigmgrConstructEngine(arg1, (struct KernelMIGManager *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelMIGManager_engstateStateInitLocked(OBJGPU *arg0, struct OBJENGSTATE *arg1) { - return kmigmgrStateInitLocked(arg0, (struct KernelMIGManager *)(((unsigned char *)arg1) - __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); +// kmigmgrStateInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelMIGManager_engstateStateInitLocked(OBJGPU *arg1, struct OBJENGSTATE *arg_this) { + return kmigmgrStateInitLocked(arg1, (struct KernelMIGManager *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_KernelMIGManager_engstateStateUnload(OBJGPU *arg0, struct OBJENGSTATE *arg1, NvU32 flags) { - return kmigmgrStateUnload(arg0, (struct KernelMIGManager *)(((unsigned char *)arg1) - __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), flags); +// kmigmgrStateUnload: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelMIGManager_engstateStateUnload(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags) { + return kmigmgrStateUnload(arg1, (struct KernelMIGManager *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), flags); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmigmgrStateLoad(POBJGPU pGpu, struct KernelMIGManager *pEngstate, NvU32 arg0) { - return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), arg0); + +// 11 up-thunk(s) defined to bridge methods in KernelMIGManager to superclasses + +// kmigmgrInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kmigmgrInitMissing(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmigmgrStatePreLoad(POBJGPU pGpu, struct KernelMIGManager *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), arg0); +// kmigmgrStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreInitLocked(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmigmgrStatePostUnload(POBJGPU pGpu, struct KernelMIGManager *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), arg0); +// kmigmgrStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreInitUnlocked(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_kmigmgrStateDestroy(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { - engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); +// kmigmgrStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStateInitUnlocked(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmigmgrStatePreUnload(POBJGPU pGpu, struct KernelMIGManager *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), arg0); +// kmigmgrStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreLoad(POBJGPU pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmigmgrStateInitUnlocked(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); +// kmigmgrStateLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStateLoad(POBJGPU pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { + return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_kmigmgrInitMissing(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); +// kmigmgrStatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePostLoad(POBJGPU pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmigmgrStatePreInitLocked(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); +// kmigmgrStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreUnload(POBJGPU pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmigmgrStatePreInitUnlocked(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); +// kmigmgrStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePostUnload(POBJGPU pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_kmigmgrStatePostLoad(POBJGPU pGpu, struct KernelMIGManager *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), arg0); +// kmigmgrStateDestroy: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_kmigmgrStateDestroy(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { + engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); } -static NvBool __nvoc_thunk_OBJENGSTATE_kmigmgrIsPresent(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); +// kmigmgrIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_kmigmgrIsPresent(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelMIGManager = { /*numEntries=*/ 0, @@ -162,6 +182,7 @@ NV_STATUS __nvoc_ctor_KernelMIGManager(KernelMIGManager *pThis, RmHalspecOwner * return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -174,13 +195,19 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); + // kmigmgrConstructEngine -- virtual override (engstate) base (engstate) pThis->__kmigmgrConstructEngine__ = &kmigmgrConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelMIGManager_engstateConstructEngine; + // kmigmgrStateInitLocked -- virtual override (engstate) base (engstate) pThis->__kmigmgrStateInitLocked__ = &kmigmgrStateInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelMIGManager_engstateStateInitLocked; + // kmigmgrStateUnload -- virtual override (engstate) base (engstate) pThis->__kmigmgrStateUnload__ = &kmigmgrStateUnload_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelMIGManager_engstateStateUnload; - // Hal function -- kmigmgrLoadStaticInfo + // kmigmgrLoadStaticInfo -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmigmgrLoadStaticInfo__ = &kmigmgrLoadStaticInfo_VF; @@ -190,7 +217,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm pThis->__kmigmgrLoadStaticInfo__ = &kmigmgrLoadStaticInfo_KERNEL; } - // Hal function -- kmigmgrSetStaticInfo + // kmigmgrSetStaticInfo -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmigmgrSetStaticInfo__ = &kmigmgrSetStaticInfo_VF; @@ -200,7 +227,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm pThis->__kmigmgrSetStaticInfo__ = &kmigmgrSetStaticInfo_46f6a7; } - // Hal function -- kmigmgrClearStaticInfo + // kmigmgrClearStaticInfo -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmigmgrClearStaticInfo__ = &kmigmgrClearStaticInfo_VF; @@ -210,7 +237,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm pThis->__kmigmgrClearStaticInfo__ = &kmigmgrClearStaticInfo_b3696a; } - // Hal function -- kmigmgrSaveToPersistenceFromVgpuStaticInfo + // kmigmgrSaveToPersistenceFromVgpuStaticInfo -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmigmgrSaveToPersistenceFromVgpuStaticInfo__ = &kmigmgrSaveToPersistenceFromVgpuStaticInfo_VF; @@ -220,7 +247,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm pThis->__kmigmgrSaveToPersistenceFromVgpuStaticInfo__ = &kmigmgrSaveToPersistenceFromVgpuStaticInfo_46f6a7; } - // Hal function -- kmigmgrDeleteGPUInstanceRunlists + // kmigmgrDeleteGPUInstanceRunlists -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmigmgrDeleteGPUInstanceRunlists__ = &kmigmgrDeleteGPUInstanceRunlists_56cd7a; @@ -230,7 +257,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm pThis->__kmigmgrDeleteGPUInstanceRunlists__ = &kmigmgrDeleteGPUInstanceRunlists_FWCLIENT; } - // Hal function -- kmigmgrCreateGPUInstanceRunlists + // kmigmgrCreateGPUInstanceRunlists -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmigmgrCreateGPUInstanceRunlists__ = &kmigmgrCreateGPUInstanceRunlists_56cd7a; @@ -240,7 +267,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm pThis->__kmigmgrCreateGPUInstanceRunlists__ = &kmigmgrCreateGPUInstanceRunlists_FWCLIENT; } - // Hal function -- kmigmgrRestoreFromPersistence + // kmigmgrRestoreFromPersistence -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmigmgrRestoreFromPersistence__ = &kmigmgrRestoreFromPersistence_VF; @@ -250,7 +277,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm pThis->__kmigmgrRestoreFromPersistence__ = &kmigmgrRestoreFromPersistence_PF; } - // Hal function -- kmigmgrCreateGPUInstanceCheck + // kmigmgrCreateGPUInstanceCheck -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ { pThis->__kmigmgrCreateGPUInstanceCheck__ = &kmigmgrCreateGPUInstanceCheck_GA100; @@ -260,7 +287,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm pThis->__kmigmgrCreateGPUInstanceCheck__ = &kmigmgrCreateGPUInstanceCheck_46f6a7; } - // Hal function -- kmigmgrIsDevinitMIGBitSet + // kmigmgrIsDevinitMIGBitSet -- halified (3 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmigmgrIsDevinitMIGBitSet__ = &kmigmgrIsDevinitMIGBitSet_VF; @@ -278,7 +305,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm } } - // Hal function -- kmigmgrIsGPUInstanceCombinationValid + // kmigmgrIsGPUInstanceCombinationValid -- halified (3 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__kmigmgrIsGPUInstanceCombinationValid__ = &kmigmgrIsGPUInstanceCombinationValid_GA100; @@ -293,7 +320,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm pThis->__kmigmgrIsGPUInstanceCombinationValid__ = &kmigmgrIsGPUInstanceCombinationValid_491d52; } - // Hal function -- kmigmgrIsGPUInstanceFlagValid + // kmigmgrIsGPUInstanceFlagValid -- halified (3 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__kmigmgrIsGPUInstanceFlagValid__ = &kmigmgrIsGPUInstanceFlagValid_GA100; @@ -308,7 +335,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm pThis->__kmigmgrIsGPUInstanceFlagValid__ = &kmigmgrIsGPUInstanceFlagValid_491d52; } - // Hal function -- kmigmgrGenerateComputeInstanceUuid + // kmigmgrGenerateComputeInstanceUuid -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmigmgrGenerateComputeInstanceUuid__ = &kmigmgrGenerateComputeInstanceUuid_VF; @@ -319,7 +346,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm pThis->__kmigmgrGenerateComputeInstanceUuid__ = &kmigmgrGenerateComputeInstanceUuid_5baef9; } - // Hal function -- kmigmgrGenerateGPUInstanceUuid + // kmigmgrGenerateGPUInstanceUuid -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmigmgrGenerateGPUInstanceUuid__ = &kmigmgrGenerateGPUInstanceUuid_VF; @@ -330,7 +357,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm pThis->__kmigmgrGenerateGPUInstanceUuid__ = &kmigmgrGenerateGPUInstanceUuid_5baef9; } - // Hal function -- kmigmgrCreateComputeInstances + // kmigmgrCreateComputeInstances -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmigmgrCreateComputeInstances__ = &kmigmgrCreateComputeInstances_VF; @@ -340,7 +367,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm pThis->__kmigmgrCreateComputeInstances__ = &kmigmgrCreateComputeInstances_FWCLIENT; } - // Hal function -- kmigmgrIsMemoryPartitioningRequested + // kmigmgrIsMemoryPartitioningRequested -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ { pThis->__kmigmgrIsMemoryPartitioningRequested__ = &kmigmgrIsMemoryPartitioningRequested_GA100; @@ -350,7 +377,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm pThis->__kmigmgrIsMemoryPartitioningRequested__ = &kmigmgrIsMemoryPartitioningRequested_491d52; } - // Hal function -- kmigmgrIsMemoryPartitioningNeeded + // kmigmgrIsMemoryPartitioningNeeded -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ { pThis->__kmigmgrIsMemoryPartitioningNeeded__ = &kmigmgrIsMemoryPartitioningNeeded_GA100; @@ -360,7 +387,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm pThis->__kmigmgrIsMemoryPartitioningNeeded__ = &kmigmgrIsMemoryPartitioningNeeded_491d52; } - // Hal function -- kmigmgrMemSizeFlagToSwizzIdRange + // kmigmgrMemSizeFlagToSwizzIdRange -- halified (3 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmigmgrMemSizeFlagToSwizzIdRange__ = &kmigmgrMemSizeFlagToSwizzIdRange_d64cd6; @@ -377,7 +404,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm } } - // Hal function -- kmigmgrSwizzIdToSpan + // kmigmgrSwizzIdToSpan -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ { pThis->__kmigmgrSwizzIdToSpan__ = &kmigmgrSwizzIdToSpan_GA100; @@ -387,7 +414,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm pThis->__kmigmgrSwizzIdToSpan__ = &kmigmgrSwizzIdToSpan_d64cd6; } - // Hal function -- kmigmgrSetMIGState + // kmigmgrSetMIGState -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmigmgrSetMIGState__ = &kmigmgrSetMIGState_VF; @@ -397,7 +424,8 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm pThis->__kmigmgrSetMIGState__ = &kmigmgrSetMIGState_FWCLIENT; } - // Hal function -- kmigmgrIsCTSAlignmentRequired + // kmigmgrIsCTSAlignmentRequired -- halified (2 hals) + // default if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmigmgrIsCTSAlignmentRequired__ = &kmigmgrIsCTSAlignmentRequired_VF; @@ -407,7 +435,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm pThis->__kmigmgrIsCTSAlignmentRequired__ = &kmigmgrIsCTSAlignmentRequired_PF; } - // Hal function -- kmigmgrRestoreFromBootConfig + // kmigmgrRestoreFromBootConfig -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kmigmgrRestoreFromBootConfig__ = &kmigmgrRestoreFromBootConfig_56cd7a; @@ -417,36 +445,45 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm pThis->__kmigmgrRestoreFromBootConfig__ = &kmigmgrRestoreFromBootConfig_PF; } - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelMIGManager_engstateConstructEngine; + // kmigmgrInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__kmigmgrInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrInitMissing; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_thunk_KernelMIGManager_engstateStateInitLocked; + // kmigmgrStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__kmigmgrStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreInitLocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_thunk_KernelMIGManager_engstateStateUnload; + // kmigmgrStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kmigmgrStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreInitUnlocked; - pThis->__kmigmgrStateLoad__ = &__nvoc_thunk_OBJENGSTATE_kmigmgrStateLoad; + // kmigmgrStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__kmigmgrStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStateInitUnlocked; - pThis->__kmigmgrStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_kmigmgrStatePreLoad; + // kmigmgrStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__kmigmgrStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreLoad; - pThis->__kmigmgrStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_kmigmgrStatePostUnload; + // kmigmgrStateLoad -- virtual inherited (engstate) base (engstate) + pThis->__kmigmgrStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStateLoad; - pThis->__kmigmgrStateDestroy__ = &__nvoc_thunk_OBJENGSTATE_kmigmgrStateDestroy; + // kmigmgrStatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__kmigmgrStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePostLoad; - pThis->__kmigmgrStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_kmigmgrStatePreUnload; + // kmigmgrStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__kmigmgrStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreUnload; - pThis->__kmigmgrStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kmigmgrStateInitUnlocked; + // kmigmgrStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__kmigmgrStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePostUnload; - pThis->__kmigmgrInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kmigmgrInitMissing; + // kmigmgrStateDestroy -- virtual inherited (engstate) base (engstate) + pThis->__kmigmgrStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStateDestroy; - pThis->__kmigmgrStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kmigmgrStatePreInitLocked; + // kmigmgrIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__kmigmgrIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrIsPresent; +} // End __nvoc_init_funcTable_KernelMIGManager_1 with approximately 63 basic block(s). - pThis->__kmigmgrStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kmigmgrStatePreInitUnlocked; - - pThis->__kmigmgrStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_kmigmgrStatePostLoad; - - pThis->__kmigmgrIsPresent__ = &__nvoc_thunk_OBJENGSTATE_kmigmgrIsPresent; -} +// Initialize vtable(s) for 35 virtual method(s). void __nvoc_init_funcTable_KernelMIGManager(KernelMIGManager *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 35 per-object function pointer(s). __nvoc_init_funcTable_KernelMIGManager_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_mig_manager_nvoc.h b/src/nvidia/generated/g_kernel_mig_manager_nvoc.h index 22c2a4c926..09a9ed0f7c 100644 --- a/src/nvidia/generated/g_kernel_mig_manager_nvoc.h +++ b/src/nvidia/generated/g_kernel_mig_manager_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_KERNEL_MIG_MANAGER_NVOC_H_ #define _G_KERNEL_MIG_MANAGER_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_mig_manager_nvoc.h" #ifndef KERNEL_MIG_MANAGER_H @@ -106,6 +114,10 @@ typedef struct KMIGMGR_INSTANCE_HANDLES * Subscription handle to make calls into this instance */ NvHandle hSubscription; + /*! + * Internal ThirdPartyP2P handle for tracking persistent mappings under MIG. + */ + NvHandle hThirdPartyP2P; } KMIGMGR_INSTANCE_HANDLES; typedef struct MIG_RESOURCE_ALLOCATION @@ -472,47 +484,58 @@ typedef struct KERNEL_MIG_MANAGER_STATIC_INFO #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelMIGManager { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct KernelMIGManager *__nvoc_pbase_KernelMIGManager; - NV_STATUS (*__kmigmgrConstructEngine__)(OBJGPU *, struct KernelMIGManager *, ENGDESCRIPTOR); - NV_STATUS (*__kmigmgrStateInitLocked__)(OBJGPU *, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrStateUnload__)(OBJGPU *, struct KernelMIGManager *, NvU32); - NV_STATUS (*__kmigmgrLoadStaticInfo__)(OBJGPU *, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrSetStaticInfo__)(OBJGPU *, struct KernelMIGManager *); - void (*__kmigmgrClearStaticInfo__)(OBJGPU *, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrSaveToPersistenceFromVgpuStaticInfo__)(OBJGPU *, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrDeleteGPUInstanceRunlists__)(OBJGPU *, struct KernelMIGManager *, KERNEL_MIG_GPU_INSTANCE *); - NV_STATUS (*__kmigmgrCreateGPUInstanceRunlists__)(OBJGPU *, struct KernelMIGManager *, KERNEL_MIG_GPU_INSTANCE *); - NV_STATUS (*__kmigmgrRestoreFromPersistence__)(OBJGPU *, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrCreateGPUInstanceCheck__)(OBJGPU *, struct KernelMIGManager *, NvBool); - NvBool (*__kmigmgrIsDevinitMIGBitSet__)(OBJGPU *, struct KernelMIGManager *); - NvBool (*__kmigmgrIsGPUInstanceCombinationValid__)(OBJGPU *, struct KernelMIGManager *, NvU32); - NvBool (*__kmigmgrIsGPUInstanceFlagValid__)(OBJGPU *, struct KernelMIGManager *, NvU32); - NV_STATUS (*__kmigmgrGenerateComputeInstanceUuid__)(OBJGPU *, struct KernelMIGManager *, NvU32, NvU32, NvUuid *); - NV_STATUS (*__kmigmgrGenerateGPUInstanceUuid__)(OBJGPU *, struct KernelMIGManager *, NvU32, NvUuid *); - NV_STATUS (*__kmigmgrCreateComputeInstances__)(OBJGPU *, struct KernelMIGManager *, KERNEL_MIG_GPU_INSTANCE *, NvBool, KMIGMGR_CREATE_COMPUTE_INSTANCE_PARAMS, NvU32 *, NvBool); - NvBool (*__kmigmgrIsMemoryPartitioningRequested__)(OBJGPU *, struct KernelMIGManager *, NvU32); - NvBool (*__kmigmgrIsMemoryPartitioningNeeded__)(OBJGPU *, struct KernelMIGManager *, NvU32); - struct NV_RANGE (*__kmigmgrMemSizeFlagToSwizzIdRange__)(OBJGPU *, struct KernelMIGManager *, NvU32); - struct NV_RANGE (*__kmigmgrSwizzIdToSpan__)(OBJGPU *, struct KernelMIGManager *, NvU32); - NV_STATUS (*__kmigmgrSetMIGState__)(OBJGPU *, struct KernelMIGManager *, NvBool, NvBool, NvBool); - NvBool (*__kmigmgrIsCTSAlignmentRequired__)(OBJGPU *, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrRestoreFromBootConfig__)(OBJGPU *, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrStateLoad__)(POBJGPU, struct KernelMIGManager *, NvU32); - NV_STATUS (*__kmigmgrStatePreLoad__)(POBJGPU, struct KernelMIGManager *, NvU32); - NV_STATUS (*__kmigmgrStatePostUnload__)(POBJGPU, struct KernelMIGManager *, NvU32); - void (*__kmigmgrStateDestroy__)(POBJGPU, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrStatePreUnload__)(POBJGPU, struct KernelMIGManager *, NvU32); - NV_STATUS (*__kmigmgrStateInitUnlocked__)(POBJGPU, struct KernelMIGManager *); - void (*__kmigmgrInitMissing__)(POBJGPU, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrStatePreInitLocked__)(POBJGPU, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrStatePreInitUnlocked__)(POBJGPU, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrStatePostLoad__)(POBJGPU, struct KernelMIGManager *, NvU32); - NvBool (*__kmigmgrIsPresent__)(POBJGPU, struct KernelMIGManager *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct KernelMIGManager *__nvoc_pbase_KernelMIGManager; // kmigmgr + + // Vtable with 35 per-object function pointers + NV_STATUS (*__kmigmgrConstructEngine__)(OBJGPU *, struct KernelMIGManager * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmigmgrStateInitLocked__)(OBJGPU *, struct KernelMIGManager * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmigmgrStateUnload__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmigmgrLoadStaticInfo__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) + NV_STATUS (*__kmigmgrSetStaticInfo__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) + void (*__kmigmgrClearStaticInfo__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) + NV_STATUS (*__kmigmgrSaveToPersistenceFromVgpuStaticInfo__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) + NV_STATUS (*__kmigmgrDeleteGPUInstanceRunlists__)(OBJGPU *, struct KernelMIGManager * /*this*/, KERNEL_MIG_GPU_INSTANCE *); // halified (2 hals) + NV_STATUS (*__kmigmgrCreateGPUInstanceRunlists__)(OBJGPU *, struct KernelMIGManager * /*this*/, KERNEL_MIG_GPU_INSTANCE *); // halified (2 hals) + NV_STATUS (*__kmigmgrRestoreFromPersistence__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) + NV_STATUS (*__kmigmgrCreateGPUInstanceCheck__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvBool); // halified (2 hals) + NvBool (*__kmigmgrIsDevinitMIGBitSet__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (3 hals) + NvBool (*__kmigmgrIsGPUInstanceCombinationValid__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // halified (3 hals) + NvBool (*__kmigmgrIsGPUInstanceFlagValid__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // halified (3 hals) + NV_STATUS (*__kmigmgrGenerateComputeInstanceUuid__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32, NvU32, NvUuid *); // halified (2 hals) + NV_STATUS (*__kmigmgrGenerateGPUInstanceUuid__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32, NvUuid *); // halified (2 hals) + NV_STATUS (*__kmigmgrCreateComputeInstances__)(OBJGPU *, struct KernelMIGManager * /*this*/, KERNEL_MIG_GPU_INSTANCE *, NvBool, KMIGMGR_CREATE_COMPUTE_INSTANCE_PARAMS, NvU32 *, NvBool); // halified (2 hals) + NvBool (*__kmigmgrIsMemoryPartitioningRequested__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // halified (2 hals) + NvBool (*__kmigmgrIsMemoryPartitioningNeeded__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // halified (2 hals) + struct NV_RANGE (*__kmigmgrMemSizeFlagToSwizzIdRange__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // halified (3 hals) + struct NV_RANGE (*__kmigmgrSwizzIdToSpan__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // halified (2 hals) + NV_STATUS (*__kmigmgrSetMIGState__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvBool, NvBool, NvBool); // halified (2 hals) + NvBool (*__kmigmgrIsCTSAlignmentRequired__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) + NV_STATUS (*__kmigmgrRestoreFromBootConfig__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) body + void (*__kmigmgrInitMissing__)(POBJGPU, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStatePreInitLocked__)(POBJGPU, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStatePreInitUnlocked__)(POBJGPU, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStateInitUnlocked__)(POBJGPU, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStatePreLoad__)(POBJGPU, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStateLoad__)(POBJGPU, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStatePostLoad__)(POBJGPU, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStatePreUnload__)(POBJGPU, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStatePostUnload__)(POBJGPU, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__kmigmgrStateDestroy__)(POBJGPU, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__kmigmgrIsPresent__)(POBJGPU, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) + + // Data members NvBool PRIVATE_FIELD(bIsA100ReducedConfig); KERNEL_MIG_MANAGER_PRIVATE_DATA *PRIVATE_FIELD(pPrivate); KERNEL_MIG_GPU_INSTANCE PRIVATE_FIELD(kernelMIGGpuInstance)[8]; @@ -530,47 +553,58 @@ struct KernelMIGManager { NvU64 PRIVATE_FIELD(validGlobalGfxCTSIdMask); }; + struct KernelMIGManager_PRIVATE { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct KernelMIGManager *__nvoc_pbase_KernelMIGManager; - NV_STATUS (*__kmigmgrConstructEngine__)(OBJGPU *, struct KernelMIGManager *, ENGDESCRIPTOR); - NV_STATUS (*__kmigmgrStateInitLocked__)(OBJGPU *, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrStateUnload__)(OBJGPU *, struct KernelMIGManager *, NvU32); - NV_STATUS (*__kmigmgrLoadStaticInfo__)(OBJGPU *, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrSetStaticInfo__)(OBJGPU *, struct KernelMIGManager *); - void (*__kmigmgrClearStaticInfo__)(OBJGPU *, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrSaveToPersistenceFromVgpuStaticInfo__)(OBJGPU *, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrDeleteGPUInstanceRunlists__)(OBJGPU *, struct KernelMIGManager *, KERNEL_MIG_GPU_INSTANCE *); - NV_STATUS (*__kmigmgrCreateGPUInstanceRunlists__)(OBJGPU *, struct KernelMIGManager *, KERNEL_MIG_GPU_INSTANCE *); - NV_STATUS (*__kmigmgrRestoreFromPersistence__)(OBJGPU *, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrCreateGPUInstanceCheck__)(OBJGPU *, struct KernelMIGManager *, NvBool); - NvBool (*__kmigmgrIsDevinitMIGBitSet__)(OBJGPU *, struct KernelMIGManager *); - NvBool (*__kmigmgrIsGPUInstanceCombinationValid__)(OBJGPU *, struct KernelMIGManager *, NvU32); - NvBool (*__kmigmgrIsGPUInstanceFlagValid__)(OBJGPU *, struct KernelMIGManager *, NvU32); - NV_STATUS (*__kmigmgrGenerateComputeInstanceUuid__)(OBJGPU *, struct KernelMIGManager *, NvU32, NvU32, NvUuid *); - NV_STATUS (*__kmigmgrGenerateGPUInstanceUuid__)(OBJGPU *, struct KernelMIGManager *, NvU32, NvUuid *); - NV_STATUS (*__kmigmgrCreateComputeInstances__)(OBJGPU *, struct KernelMIGManager *, KERNEL_MIG_GPU_INSTANCE *, NvBool, KMIGMGR_CREATE_COMPUTE_INSTANCE_PARAMS, NvU32 *, NvBool); - NvBool (*__kmigmgrIsMemoryPartitioningRequested__)(OBJGPU *, struct KernelMIGManager *, NvU32); - NvBool (*__kmigmgrIsMemoryPartitioningNeeded__)(OBJGPU *, struct KernelMIGManager *, NvU32); - struct NV_RANGE (*__kmigmgrMemSizeFlagToSwizzIdRange__)(OBJGPU *, struct KernelMIGManager *, NvU32); - struct NV_RANGE (*__kmigmgrSwizzIdToSpan__)(OBJGPU *, struct KernelMIGManager *, NvU32); - NV_STATUS (*__kmigmgrSetMIGState__)(OBJGPU *, struct KernelMIGManager *, NvBool, NvBool, NvBool); - NvBool (*__kmigmgrIsCTSAlignmentRequired__)(OBJGPU *, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrRestoreFromBootConfig__)(OBJGPU *, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrStateLoad__)(POBJGPU, struct KernelMIGManager *, NvU32); - NV_STATUS (*__kmigmgrStatePreLoad__)(POBJGPU, struct KernelMIGManager *, NvU32); - NV_STATUS (*__kmigmgrStatePostUnload__)(POBJGPU, struct KernelMIGManager *, NvU32); - void (*__kmigmgrStateDestroy__)(POBJGPU, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrStatePreUnload__)(POBJGPU, struct KernelMIGManager *, NvU32); - NV_STATUS (*__kmigmgrStateInitUnlocked__)(POBJGPU, struct KernelMIGManager *); - void (*__kmigmgrInitMissing__)(POBJGPU, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrStatePreInitLocked__)(POBJGPU, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrStatePreInitUnlocked__)(POBJGPU, struct KernelMIGManager *); - NV_STATUS (*__kmigmgrStatePostLoad__)(POBJGPU, struct KernelMIGManager *, NvU32); - NvBool (*__kmigmgrIsPresent__)(POBJGPU, struct KernelMIGManager *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct KernelMIGManager *__nvoc_pbase_KernelMIGManager; // kmigmgr + + // Vtable with 35 per-object function pointers + NV_STATUS (*__kmigmgrConstructEngine__)(OBJGPU *, struct KernelMIGManager * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmigmgrStateInitLocked__)(OBJGPU *, struct KernelMIGManager * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmigmgrStateUnload__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmigmgrLoadStaticInfo__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) + NV_STATUS (*__kmigmgrSetStaticInfo__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) + void (*__kmigmgrClearStaticInfo__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) + NV_STATUS (*__kmigmgrSaveToPersistenceFromVgpuStaticInfo__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) + NV_STATUS (*__kmigmgrDeleteGPUInstanceRunlists__)(OBJGPU *, struct KernelMIGManager * /*this*/, KERNEL_MIG_GPU_INSTANCE *); // halified (2 hals) + NV_STATUS (*__kmigmgrCreateGPUInstanceRunlists__)(OBJGPU *, struct KernelMIGManager * /*this*/, KERNEL_MIG_GPU_INSTANCE *); // halified (2 hals) + NV_STATUS (*__kmigmgrRestoreFromPersistence__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) + NV_STATUS (*__kmigmgrCreateGPUInstanceCheck__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvBool); // halified (2 hals) + NvBool (*__kmigmgrIsDevinitMIGBitSet__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (3 hals) + NvBool (*__kmigmgrIsGPUInstanceCombinationValid__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // halified (3 hals) + NvBool (*__kmigmgrIsGPUInstanceFlagValid__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // halified (3 hals) + NV_STATUS (*__kmigmgrGenerateComputeInstanceUuid__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32, NvU32, NvUuid *); // halified (2 hals) + NV_STATUS (*__kmigmgrGenerateGPUInstanceUuid__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32, NvUuid *); // halified (2 hals) + NV_STATUS (*__kmigmgrCreateComputeInstances__)(OBJGPU *, struct KernelMIGManager * /*this*/, KERNEL_MIG_GPU_INSTANCE *, NvBool, KMIGMGR_CREATE_COMPUTE_INSTANCE_PARAMS, NvU32 *, NvBool); // halified (2 hals) + NvBool (*__kmigmgrIsMemoryPartitioningRequested__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // halified (2 hals) + NvBool (*__kmigmgrIsMemoryPartitioningNeeded__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // halified (2 hals) + struct NV_RANGE (*__kmigmgrMemSizeFlagToSwizzIdRange__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // halified (3 hals) + struct NV_RANGE (*__kmigmgrSwizzIdToSpan__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // halified (2 hals) + NV_STATUS (*__kmigmgrSetMIGState__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvBool, NvBool, NvBool); // halified (2 hals) + NvBool (*__kmigmgrIsCTSAlignmentRequired__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) + NV_STATUS (*__kmigmgrRestoreFromBootConfig__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) body + void (*__kmigmgrInitMissing__)(POBJGPU, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStatePreInitLocked__)(POBJGPU, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStatePreInitUnlocked__)(POBJGPU, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStateInitUnlocked__)(POBJGPU, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStatePreLoad__)(POBJGPU, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStateLoad__)(POBJGPU, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStatePostLoad__)(POBJGPU, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStatePreUnload__)(POBJGPU, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStatePostUnload__)(POBJGPU, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__kmigmgrStateDestroy__)(POBJGPU, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__kmigmgrIsPresent__)(POBJGPU, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) + + // Data members NvBool bIsA100ReducedConfig; KERNEL_MIG_MANAGER_PRIVATE_DATA *pPrivate; KERNEL_MIG_GPU_INSTANCE kernelMIGGpuInstance[8]; @@ -597,6 +631,7 @@ typedef struct KernelMIGManager KernelMIGManager; #define __nvoc_class_id_KernelMIGManager 0x01c1bf #endif /* __nvoc_class_id_KernelMIGManager */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelMIGManager; #define __staticCast_KernelMIGManager(pThis) \ @@ -609,6 +644,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelMIGManager; ((KernelMIGManager*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelMIGManager))) #endif //__nvoc_kernel_mig_manager_h_disabled +// Property macros #define PDB_PROP_KMIGMGR_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_KMIGMGR_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -618,355 +654,394 @@ NV_STATUS __nvoc_objCreate_KernelMIGManager(KernelMIGManager**, Dynamic*, NvU32) #define __objCreate_KernelMIGManager(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelMIGManager((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define kmigmgrConstructEngine(arg0, arg1, arg2) kmigmgrConstructEngine_DISPATCH(arg0, arg1, arg2) -#define kmigmgrStateInitLocked(arg0, arg1) kmigmgrStateInitLocked_DISPATCH(arg0, arg1) -#define kmigmgrStateUnload(arg0, arg1, flags) kmigmgrStateUnload_DISPATCH(arg0, arg1, flags) -#define kmigmgrLoadStaticInfo(arg0, arg1) kmigmgrLoadStaticInfo_DISPATCH(arg0, arg1) -#define kmigmgrLoadStaticInfo_HAL(arg0, arg1) kmigmgrLoadStaticInfo_DISPATCH(arg0, arg1) -#define kmigmgrSetStaticInfo(arg0, arg1) kmigmgrSetStaticInfo_DISPATCH(arg0, arg1) -#define kmigmgrSetStaticInfo_HAL(arg0, arg1) kmigmgrSetStaticInfo_DISPATCH(arg0, arg1) -#define kmigmgrClearStaticInfo(arg0, arg1) kmigmgrClearStaticInfo_DISPATCH(arg0, arg1) -#define kmigmgrClearStaticInfo_HAL(arg0, arg1) kmigmgrClearStaticInfo_DISPATCH(arg0, arg1) -#define kmigmgrSaveToPersistenceFromVgpuStaticInfo(arg0, arg1) kmigmgrSaveToPersistenceFromVgpuStaticInfo_DISPATCH(arg0, arg1) -#define kmigmgrSaveToPersistenceFromVgpuStaticInfo_HAL(arg0, arg1) kmigmgrSaveToPersistenceFromVgpuStaticInfo_DISPATCH(arg0, arg1) -#define kmigmgrDeleteGPUInstanceRunlists(arg0, arg1, arg2) kmigmgrDeleteGPUInstanceRunlists_DISPATCH(arg0, arg1, arg2) -#define kmigmgrDeleteGPUInstanceRunlists_HAL(arg0, arg1, arg2) kmigmgrDeleteGPUInstanceRunlists_DISPATCH(arg0, arg1, arg2) -#define kmigmgrCreateGPUInstanceRunlists(arg0, arg1, arg2) kmigmgrCreateGPUInstanceRunlists_DISPATCH(arg0, arg1, arg2) -#define kmigmgrCreateGPUInstanceRunlists_HAL(arg0, arg1, arg2) kmigmgrCreateGPUInstanceRunlists_DISPATCH(arg0, arg1, arg2) -#define kmigmgrRestoreFromPersistence(arg0, arg1) kmigmgrRestoreFromPersistence_DISPATCH(arg0, arg1) -#define kmigmgrRestoreFromPersistence_HAL(arg0, arg1) kmigmgrRestoreFromPersistence_DISPATCH(arg0, arg1) -#define kmigmgrCreateGPUInstanceCheck(arg0, arg1, bMemoryPartitioningNeeded) kmigmgrCreateGPUInstanceCheck_DISPATCH(arg0, arg1, bMemoryPartitioningNeeded) -#define kmigmgrCreateGPUInstanceCheck_HAL(arg0, arg1, bMemoryPartitioningNeeded) kmigmgrCreateGPUInstanceCheck_DISPATCH(arg0, arg1, bMemoryPartitioningNeeded) -#define kmigmgrIsDevinitMIGBitSet(arg0, arg1) kmigmgrIsDevinitMIGBitSet_DISPATCH(arg0, arg1) -#define kmigmgrIsDevinitMIGBitSet_HAL(arg0, arg1) kmigmgrIsDevinitMIGBitSet_DISPATCH(arg0, arg1) -#define kmigmgrIsGPUInstanceCombinationValid(arg0, arg1, gpuInstanceFlag) kmigmgrIsGPUInstanceCombinationValid_DISPATCH(arg0, arg1, gpuInstanceFlag) -#define kmigmgrIsGPUInstanceCombinationValid_HAL(arg0, arg1, gpuInstanceFlag) kmigmgrIsGPUInstanceCombinationValid_DISPATCH(arg0, arg1, gpuInstanceFlag) -#define kmigmgrIsGPUInstanceFlagValid(arg0, arg1, gpuInstanceFlag) kmigmgrIsGPUInstanceFlagValid_DISPATCH(arg0, arg1, gpuInstanceFlag) -#define kmigmgrIsGPUInstanceFlagValid_HAL(arg0, arg1, gpuInstanceFlag) kmigmgrIsGPUInstanceFlagValid_DISPATCH(arg0, arg1, gpuInstanceFlag) -#define kmigmgrGenerateComputeInstanceUuid(arg0, arg1, swizzId, globalGrIdx, arg2) kmigmgrGenerateComputeInstanceUuid_DISPATCH(arg0, arg1, swizzId, globalGrIdx, arg2) -#define kmigmgrGenerateComputeInstanceUuid_HAL(arg0, arg1, swizzId, globalGrIdx, arg2) kmigmgrGenerateComputeInstanceUuid_DISPATCH(arg0, arg1, swizzId, globalGrIdx, arg2) -#define kmigmgrGenerateGPUInstanceUuid(arg0, arg1, swizzId, arg2) kmigmgrGenerateGPUInstanceUuid_DISPATCH(arg0, arg1, swizzId, arg2) -#define kmigmgrGenerateGPUInstanceUuid_HAL(arg0, arg1, swizzId, arg2) kmigmgrGenerateGPUInstanceUuid_DISPATCH(arg0, arg1, swizzId, arg2) -#define kmigmgrCreateComputeInstances(arg0, arg1, arg2, bQuery, arg3, pCIIds, bCreateCap) kmigmgrCreateComputeInstances_DISPATCH(arg0, arg1, arg2, bQuery, arg3, pCIIds, bCreateCap) -#define kmigmgrCreateComputeInstances_HAL(arg0, arg1, arg2, bQuery, arg3, pCIIds, bCreateCap) kmigmgrCreateComputeInstances_DISPATCH(arg0, arg1, arg2, bQuery, arg3, pCIIds, bCreateCap) -#define kmigmgrIsMemoryPartitioningRequested(arg0, arg1, partitionFlags) kmigmgrIsMemoryPartitioningRequested_DISPATCH(arg0, arg1, partitionFlags) -#define kmigmgrIsMemoryPartitioningRequested_HAL(arg0, arg1, partitionFlags) kmigmgrIsMemoryPartitioningRequested_DISPATCH(arg0, arg1, partitionFlags) -#define kmigmgrIsMemoryPartitioningNeeded(arg0, arg1, swizzId) kmigmgrIsMemoryPartitioningNeeded_DISPATCH(arg0, arg1, swizzId) -#define kmigmgrIsMemoryPartitioningNeeded_HAL(arg0, arg1, swizzId) kmigmgrIsMemoryPartitioningNeeded_DISPATCH(arg0, arg1, swizzId) -#define kmigmgrMemSizeFlagToSwizzIdRange(arg0, arg1, memSizeFlag) kmigmgrMemSizeFlagToSwizzIdRange_DISPATCH(arg0, arg1, memSizeFlag) -#define kmigmgrMemSizeFlagToSwizzIdRange_HAL(arg0, arg1, memSizeFlag) kmigmgrMemSizeFlagToSwizzIdRange_DISPATCH(arg0, arg1, memSizeFlag) -#define kmigmgrSwizzIdToSpan(arg0, arg1, swizzId) kmigmgrSwizzIdToSpan_DISPATCH(arg0, arg1, swizzId) -#define kmigmgrSwizzIdToSpan_HAL(arg0, arg1, swizzId) kmigmgrSwizzIdToSpan_DISPATCH(arg0, arg1, swizzId) -#define kmigmgrSetMIGState(arg0, arg1, bMemoryPartitioningNeeded, bEnable, bUnload) kmigmgrSetMIGState_DISPATCH(arg0, arg1, bMemoryPartitioningNeeded, bEnable, bUnload) -#define kmigmgrSetMIGState_HAL(arg0, arg1, bMemoryPartitioningNeeded, bEnable, bUnload) kmigmgrSetMIGState_DISPATCH(arg0, arg1, bMemoryPartitioningNeeded, bEnable, bUnload) -#define kmigmgrIsCTSAlignmentRequired(arg0, arg1) kmigmgrIsCTSAlignmentRequired_DISPATCH(arg0, arg1) -#define kmigmgrIsCTSAlignmentRequired_HAL(arg0, arg1) kmigmgrIsCTSAlignmentRequired_DISPATCH(arg0, arg1) + +// Wrapper macros +#define kmigmgrConstructEngine_FNPTR(arg_this) arg_this->__kmigmgrConstructEngine__ +#define kmigmgrConstructEngine(arg1, arg_this, arg3) kmigmgrConstructEngine_DISPATCH(arg1, arg_this, arg3) +#define kmigmgrStateInitLocked_FNPTR(arg_this) arg_this->__kmigmgrStateInitLocked__ +#define kmigmgrStateInitLocked(arg1, arg_this) kmigmgrStateInitLocked_DISPATCH(arg1, arg_this) +#define kmigmgrStateUnload_FNPTR(arg_this) arg_this->__kmigmgrStateUnload__ +#define kmigmgrStateUnload(arg1, arg_this, flags) kmigmgrStateUnload_DISPATCH(arg1, arg_this, flags) +#define kmigmgrLoadStaticInfo_FNPTR(arg_this) arg_this->__kmigmgrLoadStaticInfo__ +#define kmigmgrLoadStaticInfo(arg1, arg_this) kmigmgrLoadStaticInfo_DISPATCH(arg1, arg_this) +#define kmigmgrLoadStaticInfo_HAL(arg1, arg_this) kmigmgrLoadStaticInfo_DISPATCH(arg1, arg_this) +#define kmigmgrSetStaticInfo_FNPTR(arg_this) arg_this->__kmigmgrSetStaticInfo__ +#define kmigmgrSetStaticInfo(arg1, arg_this) kmigmgrSetStaticInfo_DISPATCH(arg1, arg_this) +#define kmigmgrSetStaticInfo_HAL(arg1, arg_this) kmigmgrSetStaticInfo_DISPATCH(arg1, arg_this) +#define kmigmgrClearStaticInfo_FNPTR(arg_this) arg_this->__kmigmgrClearStaticInfo__ +#define kmigmgrClearStaticInfo(arg1, arg_this) kmigmgrClearStaticInfo_DISPATCH(arg1, arg_this) +#define kmigmgrClearStaticInfo_HAL(arg1, arg_this) kmigmgrClearStaticInfo_DISPATCH(arg1, arg_this) +#define kmigmgrSaveToPersistenceFromVgpuStaticInfo_FNPTR(arg_this) arg_this->__kmigmgrSaveToPersistenceFromVgpuStaticInfo__ +#define kmigmgrSaveToPersistenceFromVgpuStaticInfo(arg1, arg_this) kmigmgrSaveToPersistenceFromVgpuStaticInfo_DISPATCH(arg1, arg_this) +#define kmigmgrSaveToPersistenceFromVgpuStaticInfo_HAL(arg1, arg_this) kmigmgrSaveToPersistenceFromVgpuStaticInfo_DISPATCH(arg1, arg_this) +#define kmigmgrDeleteGPUInstanceRunlists_FNPTR(arg_this) arg_this->__kmigmgrDeleteGPUInstanceRunlists__ +#define kmigmgrDeleteGPUInstanceRunlists(arg1, arg_this, arg3) kmigmgrDeleteGPUInstanceRunlists_DISPATCH(arg1, arg_this, arg3) +#define kmigmgrDeleteGPUInstanceRunlists_HAL(arg1, arg_this, arg3) kmigmgrDeleteGPUInstanceRunlists_DISPATCH(arg1, arg_this, arg3) +#define kmigmgrCreateGPUInstanceRunlists_FNPTR(arg_this) arg_this->__kmigmgrCreateGPUInstanceRunlists__ +#define kmigmgrCreateGPUInstanceRunlists(arg1, arg_this, arg3) kmigmgrCreateGPUInstanceRunlists_DISPATCH(arg1, arg_this, arg3) +#define kmigmgrCreateGPUInstanceRunlists_HAL(arg1, arg_this, arg3) kmigmgrCreateGPUInstanceRunlists_DISPATCH(arg1, arg_this, arg3) +#define kmigmgrRestoreFromPersistence_FNPTR(arg_this) arg_this->__kmigmgrRestoreFromPersistence__ +#define kmigmgrRestoreFromPersistence(arg1, arg_this) kmigmgrRestoreFromPersistence_DISPATCH(arg1, arg_this) +#define kmigmgrRestoreFromPersistence_HAL(arg1, arg_this) kmigmgrRestoreFromPersistence_DISPATCH(arg1, arg_this) +#define kmigmgrCreateGPUInstanceCheck_FNPTR(arg_this) arg_this->__kmigmgrCreateGPUInstanceCheck__ +#define kmigmgrCreateGPUInstanceCheck(arg1, arg_this, bMemoryPartitioningNeeded) kmigmgrCreateGPUInstanceCheck_DISPATCH(arg1, arg_this, bMemoryPartitioningNeeded) +#define kmigmgrCreateGPUInstanceCheck_HAL(arg1, arg_this, bMemoryPartitioningNeeded) kmigmgrCreateGPUInstanceCheck_DISPATCH(arg1, arg_this, bMemoryPartitioningNeeded) +#define kmigmgrIsDevinitMIGBitSet_FNPTR(arg_this) arg_this->__kmigmgrIsDevinitMIGBitSet__ +#define kmigmgrIsDevinitMIGBitSet(arg1, arg_this) kmigmgrIsDevinitMIGBitSet_DISPATCH(arg1, arg_this) +#define kmigmgrIsDevinitMIGBitSet_HAL(arg1, arg_this) kmigmgrIsDevinitMIGBitSet_DISPATCH(arg1, arg_this) +#define kmigmgrIsGPUInstanceCombinationValid_FNPTR(arg_this) arg_this->__kmigmgrIsGPUInstanceCombinationValid__ +#define kmigmgrIsGPUInstanceCombinationValid(arg1, arg_this, gpuInstanceFlag) kmigmgrIsGPUInstanceCombinationValid_DISPATCH(arg1, arg_this, gpuInstanceFlag) +#define kmigmgrIsGPUInstanceCombinationValid_HAL(arg1, arg_this, gpuInstanceFlag) kmigmgrIsGPUInstanceCombinationValid_DISPATCH(arg1, arg_this, gpuInstanceFlag) +#define kmigmgrIsGPUInstanceFlagValid_FNPTR(arg_this) arg_this->__kmigmgrIsGPUInstanceFlagValid__ +#define kmigmgrIsGPUInstanceFlagValid(arg1, arg_this, gpuInstanceFlag) kmigmgrIsGPUInstanceFlagValid_DISPATCH(arg1, arg_this, gpuInstanceFlag) +#define kmigmgrIsGPUInstanceFlagValid_HAL(arg1, arg_this, gpuInstanceFlag) kmigmgrIsGPUInstanceFlagValid_DISPATCH(arg1, arg_this, gpuInstanceFlag) +#define kmigmgrGenerateComputeInstanceUuid_FNPTR(arg_this) arg_this->__kmigmgrGenerateComputeInstanceUuid__ +#define kmigmgrGenerateComputeInstanceUuid(arg1, arg_this, swizzId, globalGrIdx, arg5) kmigmgrGenerateComputeInstanceUuid_DISPATCH(arg1, arg_this, swizzId, globalGrIdx, arg5) +#define kmigmgrGenerateComputeInstanceUuid_HAL(arg1, arg_this, swizzId, globalGrIdx, arg5) kmigmgrGenerateComputeInstanceUuid_DISPATCH(arg1, arg_this, swizzId, globalGrIdx, arg5) +#define kmigmgrGenerateGPUInstanceUuid_FNPTR(arg_this) arg_this->__kmigmgrGenerateGPUInstanceUuid__ +#define kmigmgrGenerateGPUInstanceUuid(arg1, arg_this, swizzId, arg4) kmigmgrGenerateGPUInstanceUuid_DISPATCH(arg1, arg_this, swizzId, arg4) +#define kmigmgrGenerateGPUInstanceUuid_HAL(arg1, arg_this, swizzId, arg4) kmigmgrGenerateGPUInstanceUuid_DISPATCH(arg1, arg_this, swizzId, arg4) +#define kmigmgrCreateComputeInstances_FNPTR(arg_this) arg_this->__kmigmgrCreateComputeInstances__ +#define kmigmgrCreateComputeInstances(arg1, arg_this, arg3, bQuery, arg5, pCIIds, bCreateCap) kmigmgrCreateComputeInstances_DISPATCH(arg1, arg_this, arg3, bQuery, arg5, pCIIds, bCreateCap) +#define kmigmgrCreateComputeInstances_HAL(arg1, arg_this, arg3, bQuery, arg5, pCIIds, bCreateCap) kmigmgrCreateComputeInstances_DISPATCH(arg1, arg_this, arg3, bQuery, arg5, pCIIds, bCreateCap) +#define kmigmgrIsMemoryPartitioningRequested_FNPTR(arg_this) arg_this->__kmigmgrIsMemoryPartitioningRequested__ +#define kmigmgrIsMemoryPartitioningRequested(arg1, arg_this, partitionFlags) kmigmgrIsMemoryPartitioningRequested_DISPATCH(arg1, arg_this, partitionFlags) +#define kmigmgrIsMemoryPartitioningRequested_HAL(arg1, arg_this, partitionFlags) kmigmgrIsMemoryPartitioningRequested_DISPATCH(arg1, arg_this, partitionFlags) +#define kmigmgrIsMemoryPartitioningNeeded_FNPTR(arg_this) arg_this->__kmigmgrIsMemoryPartitioningNeeded__ +#define kmigmgrIsMemoryPartitioningNeeded(arg1, arg_this, swizzId) kmigmgrIsMemoryPartitioningNeeded_DISPATCH(arg1, arg_this, swizzId) +#define kmigmgrIsMemoryPartitioningNeeded_HAL(arg1, arg_this, swizzId) kmigmgrIsMemoryPartitioningNeeded_DISPATCH(arg1, arg_this, swizzId) +#define kmigmgrMemSizeFlagToSwizzIdRange_FNPTR(arg_this) arg_this->__kmigmgrMemSizeFlagToSwizzIdRange__ +#define kmigmgrMemSizeFlagToSwizzIdRange(arg1, arg_this, memSizeFlag) kmigmgrMemSizeFlagToSwizzIdRange_DISPATCH(arg1, arg_this, memSizeFlag) +#define kmigmgrMemSizeFlagToSwizzIdRange_HAL(arg1, arg_this, memSizeFlag) kmigmgrMemSizeFlagToSwizzIdRange_DISPATCH(arg1, arg_this, memSizeFlag) +#define kmigmgrSwizzIdToSpan_FNPTR(arg_this) arg_this->__kmigmgrSwizzIdToSpan__ +#define kmigmgrSwizzIdToSpan(arg1, arg_this, swizzId) kmigmgrSwizzIdToSpan_DISPATCH(arg1, arg_this, swizzId) +#define kmigmgrSwizzIdToSpan_HAL(arg1, arg_this, swizzId) kmigmgrSwizzIdToSpan_DISPATCH(arg1, arg_this, swizzId) +#define kmigmgrSetMIGState_FNPTR(arg_this) arg_this->__kmigmgrSetMIGState__ +#define kmigmgrSetMIGState(arg1, arg_this, bMemoryPartitioningNeeded, bEnable, bUnload) kmigmgrSetMIGState_DISPATCH(arg1, arg_this, bMemoryPartitioningNeeded, bEnable, bUnload) +#define kmigmgrSetMIGState_HAL(arg1, arg_this, bMemoryPartitioningNeeded, bEnable, bUnload) kmigmgrSetMIGState_DISPATCH(arg1, arg_this, bMemoryPartitioningNeeded, bEnable, bUnload) +#define kmigmgrIsCTSAlignmentRequired_FNPTR(arg_this) arg_this->__kmigmgrIsCTSAlignmentRequired__ +#define kmigmgrIsCTSAlignmentRequired(arg1, arg_this) kmigmgrIsCTSAlignmentRequired_DISPATCH(arg1, arg_this) +#define kmigmgrIsCTSAlignmentRequired_HAL(arg1, arg_this) kmigmgrIsCTSAlignmentRequired_DISPATCH(arg1, arg_this) +#define kmigmgrRestoreFromBootConfig_FNPTR(pKernelMIGManager) pKernelMIGManager->__kmigmgrRestoreFromBootConfig__ #define kmigmgrRestoreFromBootConfig(pGpu, pKernelMIGManager) kmigmgrRestoreFromBootConfig_DISPATCH(pGpu, pKernelMIGManager) #define kmigmgrRestoreFromBootConfig_HAL(pGpu, pKernelMIGManager) kmigmgrRestoreFromBootConfig_DISPATCH(pGpu, pKernelMIGManager) -#define kmigmgrStateLoad(pGpu, pEngstate, arg0) kmigmgrStateLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kmigmgrStatePreLoad(pGpu, pEngstate, arg0) kmigmgrStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define kmigmgrStatePostUnload(pGpu, pEngstate, arg0) kmigmgrStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kmigmgrStateDestroy(pGpu, pEngstate) kmigmgrStateDestroy_DISPATCH(pGpu, pEngstate) -#define kmigmgrStatePreUnload(pGpu, pEngstate, arg0) kmigmgrStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define kmigmgrStateInitUnlocked(pGpu, pEngstate) kmigmgrStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kmigmgrInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define kmigmgrInitMissing(pGpu, pEngstate) kmigmgrInitMissing_DISPATCH(pGpu, pEngstate) +#define kmigmgrStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define kmigmgrStatePreInitLocked(pGpu, pEngstate) kmigmgrStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define kmigmgrStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define kmigmgrStatePreInitUnlocked(pGpu, pEngstate) kmigmgrStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kmigmgrStatePostLoad(pGpu, pEngstate, arg0) kmigmgrStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) +#define kmigmgrStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kmigmgrStateInitUnlocked(pGpu, pEngstate) kmigmgrStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define kmigmgrStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kmigmgrStatePreLoad(pGpu, pEngstate, arg3) kmigmgrStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kmigmgrStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define kmigmgrStateLoad(pGpu, pEngstate, arg3) kmigmgrStateLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kmigmgrStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kmigmgrStatePostLoad(pGpu, pEngstate, arg3) kmigmgrStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define kmigmgrStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kmigmgrStatePreUnload(pGpu, pEngstate, arg3) kmigmgrStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kmigmgrStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kmigmgrStatePostUnload(pGpu, pEngstate, arg3) kmigmgrStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define kmigmgrStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define kmigmgrStateDestroy(pGpu, pEngstate) kmigmgrStateDestroy_DISPATCH(pGpu, pEngstate) +#define kmigmgrIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define kmigmgrIsPresent(pGpu, pEngstate) kmigmgrIsPresent_DISPATCH(pGpu, pEngstate) -void kmigmgrDetectReducedConfig_KERNEL(OBJGPU *arg0, struct KernelMIGManager *arg1); - -#ifdef __nvoc_kernel_mig_manager_h_disabled -static inline void kmigmgrDetectReducedConfig(OBJGPU *arg0, struct KernelMIGManager *arg1) { - NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); +// Dispatch functions +static inline NV_STATUS kmigmgrConstructEngine_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this, ENGDESCRIPTOR arg3) { + return arg_this->__kmigmgrConstructEngine__(arg1, arg_this, arg3); } -#else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrDetectReducedConfig(arg0, arg1) kmigmgrDetectReducedConfig_KERNEL(arg0, arg1) -#endif //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrDetectReducedConfig_HAL(arg0, arg1) kmigmgrDetectReducedConfig(arg0, arg1) - -NV_STATUS kmigmgrGetComputeProfileFromGpcCount_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 gpcCount, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile); +static inline NV_STATUS kmigmgrStateInitLocked_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this) { + return arg_this->__kmigmgrStateInitLocked__(arg1, arg_this); +} +static inline NV_STATUS kmigmgrStateUnload_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this, NvU32 flags) { + return arg_this->__kmigmgrStateUnload__(arg1, arg_this, flags); +} -#ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrGetComputeProfileFromGpcCount(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 gpcCount, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile) { - NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kmigmgrLoadStaticInfo_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this) { + return arg_this->__kmigmgrLoadStaticInfo__(arg1, arg_this); } -#else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetComputeProfileFromGpcCount(arg0, arg1, gpcCount, pProfile) kmigmgrGetComputeProfileFromGpcCount_IMPL(arg0, arg1, gpcCount, pProfile) -#endif //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetComputeProfileFromGpcCount_HAL(arg0, arg1, gpcCount, pProfile) kmigmgrGetComputeProfileFromGpcCount(arg0, arg1, gpcCount, pProfile) +static inline NV_STATUS kmigmgrSetStaticInfo_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this) { + return arg_this->__kmigmgrSetStaticInfo__(arg1, arg_this); +} -NV_STATUS kmigmgrConstructEngine_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, ENGDESCRIPTOR arg2); +static inline void kmigmgrClearStaticInfo_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this) { + arg_this->__kmigmgrClearStaticInfo__(arg1, arg_this); +} -static inline NV_STATUS kmigmgrConstructEngine_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1, ENGDESCRIPTOR arg2) { - return arg1->__kmigmgrConstructEngine__(arg0, arg1, arg2); +static inline NV_STATUS kmigmgrSaveToPersistenceFromVgpuStaticInfo_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this) { + return arg_this->__kmigmgrSaveToPersistenceFromVgpuStaticInfo__(arg1, arg_this); } -NV_STATUS kmigmgrStateInitLocked_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1); +static inline NV_STATUS kmigmgrDeleteGPUInstanceRunlists_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this, KERNEL_MIG_GPU_INSTANCE *arg3) { + return arg_this->__kmigmgrDeleteGPUInstanceRunlists__(arg1, arg_this, arg3); +} -static inline NV_STATUS kmigmgrStateInitLocked_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1) { - return arg1->__kmigmgrStateInitLocked__(arg0, arg1); +static inline NV_STATUS kmigmgrCreateGPUInstanceRunlists_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this, KERNEL_MIG_GPU_INSTANCE *arg3) { + return arg_this->__kmigmgrCreateGPUInstanceRunlists__(arg1, arg_this, arg3); } -NV_STATUS kmigmgrStateUnload_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 flags); +static inline NV_STATUS kmigmgrRestoreFromPersistence_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this) { + return arg_this->__kmigmgrRestoreFromPersistence__(arg1, arg_this); +} -static inline NV_STATUS kmigmgrStateUnload_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 flags) { - return arg1->__kmigmgrStateUnload__(arg0, arg1, flags); +static inline NV_STATUS kmigmgrCreateGPUInstanceCheck_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this, NvBool bMemoryPartitioningNeeded) { + return arg_this->__kmigmgrCreateGPUInstanceCheck__(arg1, arg_this, bMemoryPartitioningNeeded); } -NV_STATUS kmigmgrLoadStaticInfo_VF(OBJGPU *arg0, struct KernelMIGManager *arg1); +static inline NvBool kmigmgrIsDevinitMIGBitSet_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this) { + return arg_this->__kmigmgrIsDevinitMIGBitSet__(arg1, arg_this); +} -NV_STATUS kmigmgrLoadStaticInfo_KERNEL(OBJGPU *arg0, struct KernelMIGManager *arg1); +static inline NvBool kmigmgrIsGPUInstanceCombinationValid_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this, NvU32 gpuInstanceFlag) { + return arg_this->__kmigmgrIsGPUInstanceCombinationValid__(arg1, arg_this, gpuInstanceFlag); +} -static inline NV_STATUS kmigmgrLoadStaticInfo_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1) { - return arg1->__kmigmgrLoadStaticInfo__(arg0, arg1); +static inline NvBool kmigmgrIsGPUInstanceFlagValid_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this, NvU32 gpuInstanceFlag) { + return arg_this->__kmigmgrIsGPUInstanceFlagValid__(arg1, arg_this, gpuInstanceFlag); } -NV_STATUS kmigmgrSetStaticInfo_VF(OBJGPU *arg0, struct KernelMIGManager *arg1); +static inline NV_STATUS kmigmgrGenerateComputeInstanceUuid_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this, NvU32 swizzId, NvU32 globalGrIdx, NvUuid *arg5) { + return arg_this->__kmigmgrGenerateComputeInstanceUuid__(arg1, arg_this, swizzId, globalGrIdx, arg5); +} -static inline NV_STATUS kmigmgrSetStaticInfo_46f6a7(OBJGPU *arg0, struct KernelMIGManager *arg1) { - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kmigmgrGenerateGPUInstanceUuid_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this, NvU32 swizzId, NvUuid *arg4) { + return arg_this->__kmigmgrGenerateGPUInstanceUuid__(arg1, arg_this, swizzId, arg4); } -static inline NV_STATUS kmigmgrSetStaticInfo_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1) { - return arg1->__kmigmgrSetStaticInfo__(arg0, arg1); +static inline NV_STATUS kmigmgrCreateComputeInstances_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this, KERNEL_MIG_GPU_INSTANCE *arg3, NvBool bQuery, KMIGMGR_CREATE_COMPUTE_INSTANCE_PARAMS arg5, NvU32 *pCIIds, NvBool bCreateCap) { + return arg_this->__kmigmgrCreateComputeInstances__(arg1, arg_this, arg3, bQuery, arg5, pCIIds, bCreateCap); } -void kmigmgrClearStaticInfo_VF(OBJGPU *arg0, struct KernelMIGManager *arg1); +static inline NvBool kmigmgrIsMemoryPartitioningRequested_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this, NvU32 partitionFlags) { + return arg_this->__kmigmgrIsMemoryPartitioningRequested__(arg1, arg_this, partitionFlags); +} -static inline void kmigmgrClearStaticInfo_b3696a(OBJGPU *arg0, struct KernelMIGManager *arg1) { - return; +static inline NvBool kmigmgrIsMemoryPartitioningNeeded_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this, NvU32 swizzId) { + return arg_this->__kmigmgrIsMemoryPartitioningNeeded__(arg1, arg_this, swizzId); } -static inline void kmigmgrClearStaticInfo_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1) { - arg1->__kmigmgrClearStaticInfo__(arg0, arg1); +static inline struct NV_RANGE kmigmgrMemSizeFlagToSwizzIdRange_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this, NvU32 memSizeFlag) { + return arg_this->__kmigmgrMemSizeFlagToSwizzIdRange__(arg1, arg_this, memSizeFlag); } -NV_STATUS kmigmgrSaveToPersistenceFromVgpuStaticInfo_VF(OBJGPU *arg0, struct KernelMIGManager *arg1); +static inline struct NV_RANGE kmigmgrSwizzIdToSpan_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this, NvU32 swizzId) { + return arg_this->__kmigmgrSwizzIdToSpan__(arg1, arg_this, swizzId); +} -static inline NV_STATUS kmigmgrSaveToPersistenceFromVgpuStaticInfo_46f6a7(OBJGPU *arg0, struct KernelMIGManager *arg1) { - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS kmigmgrSetMIGState_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this, NvBool bMemoryPartitioningNeeded, NvBool bEnable, NvBool bUnload) { + return arg_this->__kmigmgrSetMIGState__(arg1, arg_this, bMemoryPartitioningNeeded, bEnable, bUnload); } -static inline NV_STATUS kmigmgrSaveToPersistenceFromVgpuStaticInfo_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1) { - return arg1->__kmigmgrSaveToPersistenceFromVgpuStaticInfo__(arg0, arg1); +static inline NvBool kmigmgrIsCTSAlignmentRequired_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this) { + return arg_this->__kmigmgrIsCTSAlignmentRequired__(arg1, arg_this); } -static inline NV_STATUS kmigmgrDeleteGPUInstanceRunlists_56cd7a(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2) { - return NV_OK; +static inline NV_STATUS kmigmgrRestoreFromBootConfig_DISPATCH(OBJGPU *pGpu, struct KernelMIGManager *pKernelMIGManager) { + return pKernelMIGManager->__kmigmgrRestoreFromBootConfig__(pGpu, pKernelMIGManager); } -NV_STATUS kmigmgrDeleteGPUInstanceRunlists_FWCLIENT(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2); +static inline void kmigmgrInitMissing_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { + pEngstate->__kmigmgrInitMissing__(pGpu, pEngstate); +} -static inline NV_STATUS kmigmgrDeleteGPUInstanceRunlists_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2) { - return arg1->__kmigmgrDeleteGPUInstanceRunlists__(arg0, arg1, arg2); +static inline NV_STATUS kmigmgrStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { + return pEngstate->__kmigmgrStatePreInitLocked__(pGpu, pEngstate); } -static inline NV_STATUS kmigmgrCreateGPUInstanceRunlists_56cd7a(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2) { - return NV_OK; +static inline NV_STATUS kmigmgrStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { + return pEngstate->__kmigmgrStatePreInitUnlocked__(pGpu, pEngstate); } -NV_STATUS kmigmgrCreateGPUInstanceRunlists_FWCLIENT(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2); +static inline NV_STATUS kmigmgrStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { + return pEngstate->__kmigmgrStateInitUnlocked__(pGpu, pEngstate); +} -static inline NV_STATUS kmigmgrCreateGPUInstanceRunlists_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2) { - return arg1->__kmigmgrCreateGPUInstanceRunlists__(arg0, arg1, arg2); +static inline NV_STATUS kmigmgrStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { + return pEngstate->__kmigmgrStatePreLoad__(pGpu, pEngstate, arg3); } -NV_STATUS kmigmgrRestoreFromPersistence_VF(OBJGPU *arg0, struct KernelMIGManager *arg1); +static inline NV_STATUS kmigmgrStateLoad_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { + return pEngstate->__kmigmgrStateLoad__(pGpu, pEngstate, arg3); +} -NV_STATUS kmigmgrRestoreFromPersistence_PF(OBJGPU *arg0, struct KernelMIGManager *arg1); +static inline NV_STATUS kmigmgrStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { + return pEngstate->__kmigmgrStatePostLoad__(pGpu, pEngstate, arg3); +} -static inline NV_STATUS kmigmgrRestoreFromPersistence_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1) { - return arg1->__kmigmgrRestoreFromPersistence__(arg0, arg1); +static inline NV_STATUS kmigmgrStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { + return pEngstate->__kmigmgrStatePreUnload__(pGpu, pEngstate, arg3); } -NV_STATUS kmigmgrCreateGPUInstanceCheck_GA100(OBJGPU *arg0, struct KernelMIGManager *arg1, NvBool bMemoryPartitioningNeeded); +static inline NV_STATUS kmigmgrStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { + return pEngstate->__kmigmgrStatePostUnload__(pGpu, pEngstate, arg3); +} -static inline NV_STATUS kmigmgrCreateGPUInstanceCheck_46f6a7(OBJGPU *arg0, struct KernelMIGManager *arg1, NvBool bMemoryPartitioningNeeded) { - return NV_ERR_NOT_SUPPORTED; +static inline void kmigmgrStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { + pEngstate->__kmigmgrStateDestroy__(pGpu, pEngstate); } -static inline NV_STATUS kmigmgrCreateGPUInstanceCheck_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1, NvBool bMemoryPartitioningNeeded) { - return arg1->__kmigmgrCreateGPUInstanceCheck__(arg0, arg1, bMemoryPartitioningNeeded); +static inline NvBool kmigmgrIsPresent_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { + return pEngstate->__kmigmgrIsPresent__(pGpu, pEngstate); } -NvBool kmigmgrIsDevinitMIGBitSet_VF(OBJGPU *arg0, struct KernelMIGManager *arg1); +void kmigmgrDetectReducedConfig_KERNEL(OBJGPU *arg1, struct KernelMIGManager *arg2); -NvBool kmigmgrIsDevinitMIGBitSet_GA100(OBJGPU *arg0, struct KernelMIGManager *arg1); -static inline NvBool kmigmgrIsDevinitMIGBitSet_491d52(OBJGPU *arg0, struct KernelMIGManager *arg1) { - return ((NvBool)(0 != 0)); +#ifdef __nvoc_kernel_mig_manager_h_disabled +static inline void kmigmgrDetectReducedConfig(OBJGPU *arg1, struct KernelMIGManager *arg2) { + NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); } +#else //__nvoc_kernel_mig_manager_h_disabled +#define kmigmgrDetectReducedConfig(arg1, arg2) kmigmgrDetectReducedConfig_KERNEL(arg1, arg2) +#endif //__nvoc_kernel_mig_manager_h_disabled -static inline NvBool kmigmgrIsDevinitMIGBitSet_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1) { - return arg1->__kmigmgrIsDevinitMIGBitSet__(arg0, arg1); -} +#define kmigmgrDetectReducedConfig_HAL(arg1, arg2) kmigmgrDetectReducedConfig(arg1, arg2) -NvBool kmigmgrIsGPUInstanceCombinationValid_GA100(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 gpuInstanceFlag); +NV_STATUS kmigmgrGetComputeProfileFromGpcCount_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 gpcCount, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile); -NvBool kmigmgrIsGPUInstanceCombinationValid_GH100(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 gpuInstanceFlag); -static inline NvBool kmigmgrIsGPUInstanceCombinationValid_491d52(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 gpuInstanceFlag) { - return ((NvBool)(0 != 0)); +#ifdef __nvoc_kernel_mig_manager_h_disabled +static inline NV_STATUS kmigmgrGetComputeProfileFromGpcCount(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 gpcCount, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile) { + NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_mig_manager_h_disabled +#define kmigmgrGetComputeProfileFromGpcCount(arg1, arg2, gpcCount, pProfile) kmigmgrGetComputeProfileFromGpcCount_IMPL(arg1, arg2, gpcCount, pProfile) +#endif //__nvoc_kernel_mig_manager_h_disabled -static inline NvBool kmigmgrIsGPUInstanceCombinationValid_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 gpuInstanceFlag) { - return arg1->__kmigmgrIsGPUInstanceCombinationValid__(arg0, arg1, gpuInstanceFlag); -} +#define kmigmgrGetComputeProfileFromGpcCount_HAL(arg1, arg2, gpcCount, pProfile) kmigmgrGetComputeProfileFromGpcCount(arg1, arg2, gpcCount, pProfile) -NvBool kmigmgrIsGPUInstanceFlagValid_GA100(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 gpuInstanceFlag); +NV_STATUS kmigmgrConstructEngine_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, ENGDESCRIPTOR arg3); -NvBool kmigmgrIsGPUInstanceFlagValid_GH100(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 gpuInstanceFlag); +NV_STATUS kmigmgrStateInitLocked_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2); -static inline NvBool kmigmgrIsGPUInstanceFlagValid_491d52(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 gpuInstanceFlag) { - return ((NvBool)(0 != 0)); +NV_STATUS kmigmgrStateUnload_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 flags); + +NV_STATUS kmigmgrLoadStaticInfo_VF(OBJGPU *arg1, struct KernelMIGManager *arg2); + +NV_STATUS kmigmgrLoadStaticInfo_KERNEL(OBJGPU *arg1, struct KernelMIGManager *arg2); + +NV_STATUS kmigmgrSetStaticInfo_VF(OBJGPU *arg1, struct KernelMIGManager *arg2); + +static inline NV_STATUS kmigmgrSetStaticInfo_46f6a7(OBJGPU *arg1, struct KernelMIGManager *arg2) { + return NV_ERR_NOT_SUPPORTED; } -static inline NvBool kmigmgrIsGPUInstanceFlagValid_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 gpuInstanceFlag) { - return arg1->__kmigmgrIsGPUInstanceFlagValid__(arg0, arg1, gpuInstanceFlag); +void kmigmgrClearStaticInfo_VF(OBJGPU *arg1, struct KernelMIGManager *arg2); + +static inline void kmigmgrClearStaticInfo_b3696a(OBJGPU *arg1, struct KernelMIGManager *arg2) { + return; } -NV_STATUS kmigmgrGenerateComputeInstanceUuid_VF(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId, NvU32 globalGrIdx, NvUuid *arg2); +NV_STATUS kmigmgrSaveToPersistenceFromVgpuStaticInfo_VF(OBJGPU *arg1, struct KernelMIGManager *arg2); -static inline NV_STATUS kmigmgrGenerateComputeInstanceUuid_5baef9(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId, NvU32 globalGrIdx, NvUuid *arg2) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +static inline NV_STATUS kmigmgrSaveToPersistenceFromVgpuStaticInfo_46f6a7(OBJGPU *arg1, struct KernelMIGManager *arg2) { + return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS kmigmgrGenerateComputeInstanceUuid_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId, NvU32 globalGrIdx, NvUuid *arg2) { - return arg1->__kmigmgrGenerateComputeInstanceUuid__(arg0, arg1, swizzId, globalGrIdx, arg2); +static inline NV_STATUS kmigmgrDeleteGPUInstanceRunlists_56cd7a(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3) { + return NV_OK; } -NV_STATUS kmigmgrGenerateGPUInstanceUuid_VF(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId, NvUuid *arg2); +NV_STATUS kmigmgrDeleteGPUInstanceRunlists_FWCLIENT(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3); -static inline NV_STATUS kmigmgrGenerateGPUInstanceUuid_5baef9(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId, NvUuid *arg2) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +static inline NV_STATUS kmigmgrCreateGPUInstanceRunlists_56cd7a(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3) { + return NV_OK; } -static inline NV_STATUS kmigmgrGenerateGPUInstanceUuid_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId, NvUuid *arg2) { - return arg1->__kmigmgrGenerateGPUInstanceUuid__(arg0, arg1, swizzId, arg2); -} +NV_STATUS kmigmgrCreateGPUInstanceRunlists_FWCLIENT(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3); -NV_STATUS kmigmgrCreateComputeInstances_VF(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2, NvBool bQuery, KMIGMGR_CREATE_COMPUTE_INSTANCE_PARAMS arg3, NvU32 *pCIIds, NvBool bCreateCap); +NV_STATUS kmigmgrRestoreFromPersistence_VF(OBJGPU *arg1, struct KernelMIGManager *arg2); -NV_STATUS kmigmgrCreateComputeInstances_FWCLIENT(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2, NvBool bQuery, KMIGMGR_CREATE_COMPUTE_INSTANCE_PARAMS arg3, NvU32 *pCIIds, NvBool bCreateCap); +NV_STATUS kmigmgrRestoreFromPersistence_PF(OBJGPU *arg1, struct KernelMIGManager *arg2); -static inline NV_STATUS kmigmgrCreateComputeInstances_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2, NvBool bQuery, KMIGMGR_CREATE_COMPUTE_INSTANCE_PARAMS arg3, NvU32 *pCIIds, NvBool bCreateCap) { - return arg1->__kmigmgrCreateComputeInstances__(arg0, arg1, arg2, bQuery, arg3, pCIIds, bCreateCap); +NV_STATUS kmigmgrCreateGPUInstanceCheck_GA100(OBJGPU *arg1, struct KernelMIGManager *arg2, NvBool bMemoryPartitioningNeeded); + +static inline NV_STATUS kmigmgrCreateGPUInstanceCheck_46f6a7(OBJGPU *arg1, struct KernelMIGManager *arg2, NvBool bMemoryPartitioningNeeded) { + return NV_ERR_NOT_SUPPORTED; } -NvBool kmigmgrIsMemoryPartitioningRequested_GA100(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 partitionFlags); +NvBool kmigmgrIsDevinitMIGBitSet_VF(OBJGPU *arg1, struct KernelMIGManager *arg2); -static inline NvBool kmigmgrIsMemoryPartitioningRequested_491d52(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 partitionFlags) { +NvBool kmigmgrIsDevinitMIGBitSet_GA100(OBJGPU *arg1, struct KernelMIGManager *arg2); + +static inline NvBool kmigmgrIsDevinitMIGBitSet_491d52(OBJGPU *arg1, struct KernelMIGManager *arg2) { return ((NvBool)(0 != 0)); } -static inline NvBool kmigmgrIsMemoryPartitioningRequested_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 partitionFlags) { - return arg1->__kmigmgrIsMemoryPartitioningRequested__(arg0, arg1, partitionFlags); -} +NvBool kmigmgrIsGPUInstanceCombinationValid_GA100(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 gpuInstanceFlag); -NvBool kmigmgrIsMemoryPartitioningNeeded_GA100(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId); +NvBool kmigmgrIsGPUInstanceCombinationValid_GH100(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 gpuInstanceFlag); -static inline NvBool kmigmgrIsMemoryPartitioningNeeded_491d52(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId) { +static inline NvBool kmigmgrIsGPUInstanceCombinationValid_491d52(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 gpuInstanceFlag) { return ((NvBool)(0 != 0)); } -static inline NvBool kmigmgrIsMemoryPartitioningNeeded_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId) { - return arg1->__kmigmgrIsMemoryPartitioningNeeded__(arg0, arg1, swizzId); -} +NvBool kmigmgrIsGPUInstanceFlagValid_GA100(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 gpuInstanceFlag); -static inline struct NV_RANGE kmigmgrMemSizeFlagToSwizzIdRange_d64cd6(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 memSizeFlag) { - return NV_RANGE_EMPTY; -} - -struct NV_RANGE kmigmgrMemSizeFlagToSwizzIdRange_GA100(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 memSizeFlag); +NvBool kmigmgrIsGPUInstanceFlagValid_GH100(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 gpuInstanceFlag); -static inline struct NV_RANGE kmigmgrMemSizeFlagToSwizzIdRange_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 memSizeFlag) { - return arg1->__kmigmgrMemSizeFlagToSwizzIdRange__(arg0, arg1, memSizeFlag); +static inline NvBool kmigmgrIsGPUInstanceFlagValid_491d52(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 gpuInstanceFlag) { + return ((NvBool)(0 != 0)); } -struct NV_RANGE kmigmgrSwizzIdToSpan_GA100(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId); - -static inline struct NV_RANGE kmigmgrSwizzIdToSpan_d64cd6(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId) { - return NV_RANGE_EMPTY; -} +NV_STATUS kmigmgrGenerateComputeInstanceUuid_VF(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId, NvU32 globalGrIdx, NvUuid *arg5); -static inline struct NV_RANGE kmigmgrSwizzIdToSpan_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId) { - return arg1->__kmigmgrSwizzIdToSpan__(arg0, arg1, swizzId); +static inline NV_STATUS kmigmgrGenerateComputeInstanceUuid_5baef9(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId, NvU32 globalGrIdx, NvUuid *arg5) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -NV_STATUS kmigmgrSetMIGState_VF(OBJGPU *arg0, struct KernelMIGManager *arg1, NvBool bMemoryPartitioningNeeded, NvBool bEnable, NvBool bUnload); - -NV_STATUS kmigmgrSetMIGState_FWCLIENT(OBJGPU *arg0, struct KernelMIGManager *arg1, NvBool bMemoryPartitioningNeeded, NvBool bEnable, NvBool bUnload); +NV_STATUS kmigmgrGenerateGPUInstanceUuid_VF(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId, NvUuid *arg4); -static inline NV_STATUS kmigmgrSetMIGState_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1, NvBool bMemoryPartitioningNeeded, NvBool bEnable, NvBool bUnload) { - return arg1->__kmigmgrSetMIGState__(arg0, arg1, bMemoryPartitioningNeeded, bEnable, bUnload); +static inline NV_STATUS kmigmgrGenerateGPUInstanceUuid_5baef9(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId, NvUuid *arg4) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -NvBool kmigmgrIsCTSAlignmentRequired_VF(OBJGPU *arg0, struct KernelMIGManager *arg1); +NV_STATUS kmigmgrCreateComputeInstances_VF(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3, NvBool bQuery, KMIGMGR_CREATE_COMPUTE_INSTANCE_PARAMS arg5, NvU32 *pCIIds, NvBool bCreateCap); -NvBool kmigmgrIsCTSAlignmentRequired_PF(OBJGPU *arg0, struct KernelMIGManager *arg1); +NV_STATUS kmigmgrCreateComputeInstances_FWCLIENT(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3, NvBool bQuery, KMIGMGR_CREATE_COMPUTE_INSTANCE_PARAMS arg5, NvU32 *pCIIds, NvBool bCreateCap); -static inline NvBool kmigmgrIsCTSAlignmentRequired_DISPATCH(OBJGPU *arg0, struct KernelMIGManager *arg1) { - return arg1->__kmigmgrIsCTSAlignmentRequired__(arg0, arg1); -} +NvBool kmigmgrIsMemoryPartitioningRequested_GA100(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 partitionFlags); -NV_STATUS kmigmgrRestoreFromBootConfig_PF(OBJGPU *pGpu, struct KernelMIGManager *pKernelMIGManager); - -static inline NV_STATUS kmigmgrRestoreFromBootConfig_56cd7a(OBJGPU *pGpu, struct KernelMIGManager *pKernelMIGManager) { - return NV_OK; +static inline NvBool kmigmgrIsMemoryPartitioningRequested_491d52(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 partitionFlags) { + return ((NvBool)(0 != 0)); } -static inline NV_STATUS kmigmgrRestoreFromBootConfig_DISPATCH(OBJGPU *pGpu, struct KernelMIGManager *pKernelMIGManager) { - return pKernelMIGManager->__kmigmgrRestoreFromBootConfig__(pGpu, pKernelMIGManager); -} +NvBool kmigmgrIsMemoryPartitioningNeeded_GA100(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId); -static inline NV_STATUS kmigmgrStateLoad_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate, NvU32 arg0) { - return pEngstate->__kmigmgrStateLoad__(pGpu, pEngstate, arg0); +static inline NvBool kmigmgrIsMemoryPartitioningNeeded_491d52(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId) { + return ((NvBool)(0 != 0)); } -static inline NV_STATUS kmigmgrStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate, NvU32 arg0) { - return pEngstate->__kmigmgrStatePreLoad__(pGpu, pEngstate, arg0); +static inline struct NV_RANGE kmigmgrMemSizeFlagToSwizzIdRange_d64cd6(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 memSizeFlag) { + return NV_RANGE_EMPTY; } -static inline NV_STATUS kmigmgrStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate, NvU32 arg0) { - return pEngstate->__kmigmgrStatePostUnload__(pGpu, pEngstate, arg0); -} +struct NV_RANGE kmigmgrMemSizeFlagToSwizzIdRange_GA100(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 memSizeFlag); -static inline void kmigmgrStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { - pEngstate->__kmigmgrStateDestroy__(pGpu, pEngstate); -} +struct NV_RANGE kmigmgrSwizzIdToSpan_GA100(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId); -static inline NV_STATUS kmigmgrStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate, NvU32 arg0) { - return pEngstate->__kmigmgrStatePreUnload__(pGpu, pEngstate, arg0); +static inline struct NV_RANGE kmigmgrSwizzIdToSpan_d64cd6(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId) { + return NV_RANGE_EMPTY; } -static inline NV_STATUS kmigmgrStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { - return pEngstate->__kmigmgrStateInitUnlocked__(pGpu, pEngstate); -} +NV_STATUS kmigmgrSetMIGState_VF(OBJGPU *arg1, struct KernelMIGManager *arg2, NvBool bMemoryPartitioningNeeded, NvBool bEnable, NvBool bUnload); -static inline void kmigmgrInitMissing_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { - pEngstate->__kmigmgrInitMissing__(pGpu, pEngstate); -} +NV_STATUS kmigmgrSetMIGState_FWCLIENT(OBJGPU *arg1, struct KernelMIGManager *arg2, NvBool bMemoryPartitioningNeeded, NvBool bEnable, NvBool bUnload); -static inline NV_STATUS kmigmgrStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { - return pEngstate->__kmigmgrStatePreInitLocked__(pGpu, pEngstate); -} +NvBool kmigmgrIsCTSAlignmentRequired_VF(OBJGPU *arg1, struct KernelMIGManager *arg2); -static inline NV_STATUS kmigmgrStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { - return pEngstate->__kmigmgrStatePreInitUnlocked__(pGpu, pEngstate); -} +NvBool kmigmgrIsCTSAlignmentRequired_PF(OBJGPU *arg1, struct KernelMIGManager *arg2); -static inline NV_STATUS kmigmgrStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate, NvU32 arg0) { - return pEngstate->__kmigmgrStatePostLoad__(pGpu, pEngstate, arg0); -} +NV_STATUS kmigmgrRestoreFromBootConfig_PF(OBJGPU *pGpu, struct KernelMIGManager *pKernelMIGManager); -static inline NvBool kmigmgrIsPresent_DISPATCH(POBJGPU pGpu, struct KernelMIGManager *pEngstate) { - return pEngstate->__kmigmgrIsPresent__(pGpu, pEngstate); +static inline NV_STATUS kmigmgrRestoreFromBootConfig_56cd7a(OBJGPU *pGpu, struct KernelMIGManager *pKernelMIGManager) { + return NV_OK; } static inline NvBool kmigmgrUseLegacyVgpuPolicy(OBJGPU *pGpu, struct KernelMIGManager *pKernelMIGManager) { @@ -1017,18 +1092,18 @@ static inline void kmigmgrSetValidGlobalGfxCTSIdMask(OBJGPU *pGpu, struct Kernel pKernelMIGManager_PRIVATE->validGlobalGfxCTSIdMask = validGlobalGfxCTSIdMask; } -NV_STATUS kmigmgrIncRefCount_IMPL(struct RsShared *arg0); +NV_STATUS kmigmgrIncRefCount_IMPL(struct RsShared *arg1); -#define kmigmgrIncRefCount(arg0) kmigmgrIncRefCount_IMPL(arg0) -NV_STATUS kmigmgrDecRefCount_IMPL(struct RsShared *arg0); +#define kmigmgrIncRefCount(arg1) kmigmgrIncRefCount_IMPL(arg1) +NV_STATUS kmigmgrDecRefCount_IMPL(struct RsShared *arg1); -#define kmigmgrDecRefCount(arg0) kmigmgrDecRefCount_IMPL(arg0) -struct MIG_INSTANCE_REF kmigmgrMakeGIReference_IMPL(KERNEL_MIG_GPU_INSTANCE *arg0); +#define kmigmgrDecRefCount(arg1) kmigmgrDecRefCount_IMPL(arg1) +struct MIG_INSTANCE_REF kmigmgrMakeGIReference_IMPL(KERNEL_MIG_GPU_INSTANCE *arg1); -#define kmigmgrMakeGIReference(arg0) kmigmgrMakeGIReference_IMPL(arg0) -struct MIG_INSTANCE_REF kmigmgrMakeCIReference_IMPL(KERNEL_MIG_GPU_INSTANCE *arg0, MIG_COMPUTE_INSTANCE *arg1); +#define kmigmgrMakeGIReference(arg1) kmigmgrMakeGIReference_IMPL(arg1) +struct MIG_INSTANCE_REF kmigmgrMakeCIReference_IMPL(KERNEL_MIG_GPU_INSTANCE *arg1, MIG_COMPUTE_INSTANCE *arg2); -#define kmigmgrMakeCIReference(arg0, arg1) kmigmgrMakeCIReference_IMPL(arg0, arg1) +#define kmigmgrMakeCIReference(arg1, arg2) kmigmgrMakeCIReference_IMPL(arg1, arg2) NV_STATUS kmigmgrEngineTypeXlate_IMPL(union ENGTYPE_BIT_VECTOR *pSrc, RM_ENGINE_TYPE srcEngineType, union ENGTYPE_BIT_VECTOR *pDst, RM_ENGINE_TYPE *pDstEngineType); #define kmigmgrEngineTypeXlate(pSrc, srcEngineType, pDst, pDstEngineType) kmigmgrEngineTypeXlate_IMPL(pSrc, srcEngineType, pDst, pDstEngineType) @@ -1038,905 +1113,905 @@ NvBool kmigmgrIsInstanceAttributionIdValid_IMPL(NvU16 id); struct MIG_INSTANCE_REF kmigmgrMakeNoMIGReference_IMPL(void); #define kmigmgrMakeNoMIGReference() kmigmgrMakeNoMIGReference_IMPL() -NvBool kmigmgrIsMIGReferenceValid_IMPL(struct MIG_INSTANCE_REF *arg0); +NvBool kmigmgrIsMIGReferenceValid_IMPL(struct MIG_INSTANCE_REF *arg1); -#define kmigmgrIsMIGReferenceValid(arg0) kmigmgrIsMIGReferenceValid_IMPL(arg0) -NvBool kmigmgrAreMIGReferencesSame_IMPL(struct MIG_INSTANCE_REF *arg0, struct MIG_INSTANCE_REF *arg1); +#define kmigmgrIsMIGReferenceValid(arg1) kmigmgrIsMIGReferenceValid_IMPL(arg1) +NvBool kmigmgrAreMIGReferencesSame_IMPL(struct MIG_INSTANCE_REF *arg1, struct MIG_INSTANCE_REF *arg2); -#define kmigmgrAreMIGReferencesSame(arg0, arg1) kmigmgrAreMIGReferencesSame_IMPL(arg0, arg1) -NvU32 kmigmgrCountEnginesOfType_IMPL(const union ENGTYPE_BIT_VECTOR *arg0, RM_ENGINE_TYPE arg1); +#define kmigmgrAreMIGReferencesSame(arg1, arg2) kmigmgrAreMIGReferencesSame_IMPL(arg1, arg2) +NvU32 kmigmgrCountEnginesOfType_IMPL(const union ENGTYPE_BIT_VECTOR *arg1, RM_ENGINE_TYPE arg2); -#define kmigmgrCountEnginesOfType(arg0, arg1) kmigmgrCountEnginesOfType_IMPL(arg0, arg1) -NvU16 kmigmgrGetAttributionIdFromMIGReference_IMPL(struct MIG_INSTANCE_REF arg0); +#define kmigmgrCountEnginesOfType(arg1, arg2) kmigmgrCountEnginesOfType_IMPL(arg1, arg2) +NvU16 kmigmgrGetAttributionIdFromMIGReference_IMPL(struct MIG_INSTANCE_REF arg1); -#define kmigmgrGetAttributionIdFromMIGReference(arg0) kmigmgrGetAttributionIdFromMIGReference_IMPL(arg0) +#define kmigmgrGetAttributionIdFromMIGReference(arg1) kmigmgrGetAttributionIdFromMIGReference_IMPL(arg1) NV_STATUS kmigmgrAllocateInstanceEngines_IMPL(union ENGTYPE_BIT_VECTOR *pSourceEngines, NvBool bShared, struct NV_RANGE engTypeRange, NvU32 reqEngCount, union ENGTYPE_BIT_VECTOR *pOutEngines, union ENGTYPE_BIT_VECTOR *pExclusiveEngines, union ENGTYPE_BIT_VECTOR *pSharedEngines, union ENGTYPE_BIT_VECTOR *pAllocatableEngines); #define kmigmgrAllocateInstanceEngines(pSourceEngines, bShared, engTypeRange, reqEngCount, pOutEngines, pExclusiveEngines, pSharedEngines, pAllocatableEngines) kmigmgrAllocateInstanceEngines_IMPL(pSourceEngines, bShared, engTypeRange, reqEngCount, pOutEngines, pExclusiveEngines, pSharedEngines, pAllocatableEngines) void kmigmgrGetLocalEngineMask_IMPL(union ENGTYPE_BIT_VECTOR *pPhysicalEngineMask, union ENGTYPE_BIT_VECTOR *pLocalEngineMask); #define kmigmgrGetLocalEngineMask(pPhysicalEngineMask, pLocalEngineMask) kmigmgrGetLocalEngineMask_IMPL(pPhysicalEngineMask, pLocalEngineMask) -NV_STATUS kmigmgrAllocGPUInstanceHandles_IMPL(OBJGPU *arg0, NvU32 swizzId, KERNEL_MIG_GPU_INSTANCE *arg1); +NV_STATUS kmigmgrAllocGPUInstanceHandles_IMPL(OBJGPU *arg1, NvU32 swizzId, KERNEL_MIG_GPU_INSTANCE *arg3); -#define kmigmgrAllocGPUInstanceHandles(arg0, swizzId, arg1) kmigmgrAllocGPUInstanceHandles_IMPL(arg0, swizzId, arg1) -void kmigmgrFreeGPUInstanceHandles_IMPL(KERNEL_MIG_GPU_INSTANCE *arg0); +#define kmigmgrAllocGPUInstanceHandles(arg1, swizzId, arg3) kmigmgrAllocGPUInstanceHandles_IMPL(arg1, swizzId, arg3) +void kmigmgrFreeGPUInstanceHandles_IMPL(KERNEL_MIG_GPU_INSTANCE *arg1); -#define kmigmgrFreeGPUInstanceHandles(arg0) kmigmgrFreeGPUInstanceHandles_IMPL(arg0) -NvBool kmigmgrIsGPUInstanceReadyToBeDestroyed_IMPL(KERNEL_MIG_GPU_INSTANCE *arg0); +#define kmigmgrFreeGPUInstanceHandles(arg1) kmigmgrFreeGPUInstanceHandles_IMPL(arg1) +NvBool kmigmgrIsGPUInstanceReadyToBeDestroyed_IMPL(KERNEL_MIG_GPU_INSTANCE *arg1); -#define kmigmgrIsGPUInstanceReadyToBeDestroyed(arg0) kmigmgrIsGPUInstanceReadyToBeDestroyed_IMPL(arg0) -void kmigmgrDestruct_IMPL(struct KernelMIGManager *arg0); +#define kmigmgrIsGPUInstanceReadyToBeDestroyed(arg1) kmigmgrIsGPUInstanceReadyToBeDestroyed_IMPL(arg1) +void kmigmgrDestruct_IMPL(struct KernelMIGManager *arg1); -#define __nvoc_kmigmgrDestruct(arg0) kmigmgrDestruct_IMPL(arg0) -void kmigmgrInitRegistryOverrides_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1); +#define __nvoc_kmigmgrDestruct(arg1) kmigmgrDestruct_IMPL(arg1) +void kmigmgrInitRegistryOverrides_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline void kmigmgrInitRegistryOverrides(OBJGPU *arg0, struct KernelMIGManager *arg1) { +static inline void kmigmgrInitRegistryOverrides(OBJGPU *arg1, struct KernelMIGManager *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrInitRegistryOverrides(arg0, arg1) kmigmgrInitRegistryOverrides_IMPL(arg0, arg1) +#define kmigmgrInitRegistryOverrides(arg1, arg2) kmigmgrInitRegistryOverrides_IMPL(arg1, arg2) #endif //__nvoc_kernel_mig_manager_h_disabled -KERNEL_MIG_GPU_INSTANCE *kmigmgrGetMIGGpuInstanceSlot_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 i); +KERNEL_MIG_GPU_INSTANCE *kmigmgrGetMIGGpuInstanceSlot_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 i); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline KERNEL_MIG_GPU_INSTANCE *kmigmgrGetMIGGpuInstanceSlot(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 i) { +static inline KERNEL_MIG_GPU_INSTANCE *kmigmgrGetMIGGpuInstanceSlot(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 i) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NULL; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetMIGGpuInstanceSlot(arg0, arg1, i) kmigmgrGetMIGGpuInstanceSlot_IMPL(arg0, arg1, i) +#define kmigmgrGetMIGGpuInstanceSlot(arg1, arg2, i) kmigmgrGetMIGGpuInstanceSlot_IMPL(arg1, arg2, i) #endif //__nvoc_kernel_mig_manager_h_disabled -NvBool kmigmgrIsMIGSupported_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1); +NvBool kmigmgrIsMIGSupported_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NvBool kmigmgrIsMIGSupported(OBJGPU *arg0, struct KernelMIGManager *arg1) { +static inline NvBool kmigmgrIsMIGSupported(OBJGPU *arg1, struct KernelMIGManager *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrIsMIGSupported(arg0, arg1) kmigmgrIsMIGSupported_IMPL(arg0, arg1) +#define kmigmgrIsMIGSupported(arg1, arg2) kmigmgrIsMIGSupported_IMPL(arg1, arg2) #endif //__nvoc_kernel_mig_manager_h_disabled -NvBool kmigmgrIsMIGEnabled_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1); +NvBool kmigmgrIsMIGEnabled_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NvBool kmigmgrIsMIGEnabled(OBJGPU *arg0, struct KernelMIGManager *arg1) { +static inline NvBool kmigmgrIsMIGEnabled(OBJGPU *arg1, struct KernelMIGManager *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrIsMIGEnabled(arg0, arg1) kmigmgrIsMIGEnabled_IMPL(arg0, arg1) +#define kmigmgrIsMIGEnabled(arg1, arg2) kmigmgrIsMIGEnabled_IMPL(arg1, arg2) #endif //__nvoc_kernel_mig_manager_h_disabled -NvBool kmigmgrIsMIGGpuInstancingEnabled_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1); +NvBool kmigmgrIsMIGGpuInstancingEnabled_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NvBool kmigmgrIsMIGGpuInstancingEnabled(OBJGPU *arg0, struct KernelMIGManager *arg1) { +static inline NvBool kmigmgrIsMIGGpuInstancingEnabled(OBJGPU *arg1, struct KernelMIGManager *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrIsMIGGpuInstancingEnabled(arg0, arg1) kmigmgrIsMIGGpuInstancingEnabled_IMPL(arg0, arg1) +#define kmigmgrIsMIGGpuInstancingEnabled(arg1, arg2) kmigmgrIsMIGGpuInstancingEnabled_IMPL(arg1, arg2) #endif //__nvoc_kernel_mig_manager_h_disabled -NvBool kmigmgrIsMIGMemPartitioningEnabled_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1); +NvBool kmigmgrIsMIGMemPartitioningEnabled_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NvBool kmigmgrIsMIGMemPartitioningEnabled(OBJGPU *arg0, struct KernelMIGManager *arg1) { +static inline NvBool kmigmgrIsMIGMemPartitioningEnabled(OBJGPU *arg1, struct KernelMIGManager *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrIsMIGMemPartitioningEnabled(arg0, arg1) kmigmgrIsMIGMemPartitioningEnabled_IMPL(arg0, arg1) +#define kmigmgrIsMIGMemPartitioningEnabled(arg1, arg2) kmigmgrIsMIGMemPartitioningEnabled_IMPL(arg1, arg2) #endif //__nvoc_kernel_mig_manager_h_disabled -const KERNEL_MIG_MANAGER_STATIC_INFO *kmigmgrGetStaticInfo_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1); +const KERNEL_MIG_MANAGER_STATIC_INFO *kmigmgrGetStaticInfo_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline const KERNEL_MIG_MANAGER_STATIC_INFO *kmigmgrGetStaticInfo(OBJGPU *arg0, struct KernelMIGManager *arg1) { +static inline const KERNEL_MIG_MANAGER_STATIC_INFO *kmigmgrGetStaticInfo(OBJGPU *arg1, struct KernelMIGManager *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NULL; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetStaticInfo(arg0, arg1) kmigmgrGetStaticInfo_IMPL(arg0, arg1) +#define kmigmgrGetStaticInfo(arg1, arg2) kmigmgrGetStaticInfo_IMPL(arg1, arg2) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrSaveToPersistence_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1); +NV_STATUS kmigmgrSaveToPersistence_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrSaveToPersistence(OBJGPU *arg0, struct KernelMIGManager *arg1) { +static inline NV_STATUS kmigmgrSaveToPersistence(OBJGPU *arg1, struct KernelMIGManager *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrSaveToPersistence(arg0, arg1) kmigmgrSaveToPersistence_IMPL(arg0, arg1) +#define kmigmgrSaveToPersistence(arg1, arg2) kmigmgrSaveToPersistence_IMPL(arg1, arg2) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrDisableWatchdog_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1); +NV_STATUS kmigmgrDisableWatchdog_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrDisableWatchdog(OBJGPU *arg0, struct KernelMIGManager *arg1) { +static inline NV_STATUS kmigmgrDisableWatchdog(OBJGPU *arg1, struct KernelMIGManager *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrDisableWatchdog(arg0, arg1) kmigmgrDisableWatchdog_IMPL(arg0, arg1) +#define kmigmgrDisableWatchdog(arg1, arg2) kmigmgrDisableWatchdog_IMPL(arg1, arg2) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrRestoreWatchdog_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1); +NV_STATUS kmigmgrRestoreWatchdog_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrRestoreWatchdog(OBJGPU *arg0, struct KernelMIGManager *arg1) { +static inline NV_STATUS kmigmgrRestoreWatchdog(OBJGPU *arg1, struct KernelMIGManager *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrRestoreWatchdog(arg0, arg1) kmigmgrRestoreWatchdog_IMPL(arg0, arg1) +#define kmigmgrRestoreWatchdog(arg1, arg2) kmigmgrRestoreWatchdog_IMPL(arg1, arg2) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrSetSwizzIdInUse_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId); +NV_STATUS kmigmgrSetSwizzIdInUse_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrSetSwizzIdInUse(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId) { +static inline NV_STATUS kmigmgrSetSwizzIdInUse(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrSetSwizzIdInUse(arg0, arg1, swizzId) kmigmgrSetSwizzIdInUse_IMPL(arg0, arg1, swizzId) +#define kmigmgrSetSwizzIdInUse(arg1, arg2, swizzId) kmigmgrSetSwizzIdInUse_IMPL(arg1, arg2, swizzId) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrClearSwizzIdInUse_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId); +NV_STATUS kmigmgrClearSwizzIdInUse_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrClearSwizzIdInUse(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId) { +static inline NV_STATUS kmigmgrClearSwizzIdInUse(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrClearSwizzIdInUse(arg0, arg1, swizzId) kmigmgrClearSwizzIdInUse_IMPL(arg0, arg1, swizzId) +#define kmigmgrClearSwizzIdInUse(arg1, arg2, swizzId) kmigmgrClearSwizzIdInUse_IMPL(arg1, arg2, swizzId) #endif //__nvoc_kernel_mig_manager_h_disabled -NvBool kmigmgrIsSwizzIdInUse_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId); +NvBool kmigmgrIsSwizzIdInUse_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NvBool kmigmgrIsSwizzIdInUse(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId) { +static inline NvBool kmigmgrIsSwizzIdInUse(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrIsSwizzIdInUse(arg0, arg1, swizzId) kmigmgrIsSwizzIdInUse_IMPL(arg0, arg1, swizzId) +#define kmigmgrIsSwizzIdInUse(arg1, arg2, swizzId) kmigmgrIsSwizzIdInUse_IMPL(arg1, arg2, swizzId) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrGetInvalidSwizzIdMask_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId, NvU64 *pUnsupportedSwizzIdMask); +NV_STATUS kmigmgrGetInvalidSwizzIdMask_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId, NvU64 *pUnsupportedSwizzIdMask); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrGetInvalidSwizzIdMask(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId, NvU64 *pUnsupportedSwizzIdMask) { +static inline NV_STATUS kmigmgrGetInvalidSwizzIdMask(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId, NvU64 *pUnsupportedSwizzIdMask) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetInvalidSwizzIdMask(arg0, arg1, swizzId, pUnsupportedSwizzIdMask) kmigmgrGetInvalidSwizzIdMask_IMPL(arg0, arg1, swizzId, pUnsupportedSwizzIdMask) +#define kmigmgrGetInvalidSwizzIdMask(arg1, arg2, swizzId, pUnsupportedSwizzIdMask) kmigmgrGetInvalidSwizzIdMask_IMPL(arg1, arg2, swizzId, pUnsupportedSwizzIdMask) #endif //__nvoc_kernel_mig_manager_h_disabled -NvBool kmigmgrIsMIGNvlinkP2PSupported_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1); +NvBool kmigmgrIsMIGNvlinkP2PSupported_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NvBool kmigmgrIsMIGNvlinkP2PSupported(OBJGPU *arg0, struct KernelMIGManager *arg1) { +static inline NvBool kmigmgrIsMIGNvlinkP2PSupported(OBJGPU *arg1, struct KernelMIGManager *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrIsMIGNvlinkP2PSupported(arg0, arg1) kmigmgrIsMIGNvlinkP2PSupported_IMPL(arg0, arg1) +#define kmigmgrIsMIGNvlinkP2PSupported(arg1, arg2) kmigmgrIsMIGNvlinkP2PSupported_IMPL(arg1, arg2) #endif //__nvoc_kernel_mig_manager_h_disabled -NvU64 kmigmgrGetSwizzIdInUseMask_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1); +NvU64 kmigmgrGetSwizzIdInUseMask_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NvU64 kmigmgrGetSwizzIdInUseMask(OBJGPU *arg0, struct KernelMIGManager *arg1) { +static inline NvU64 kmigmgrGetSwizzIdInUseMask(OBJGPU *arg1, struct KernelMIGManager *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return 0; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetSwizzIdInUseMask(arg0, arg1) kmigmgrGetSwizzIdInUseMask_IMPL(arg0, arg1) +#define kmigmgrGetSwizzIdInUseMask(arg1, arg2) kmigmgrGetSwizzIdInUseMask_IMPL(arg1, arg2) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrSetEnginesInUse_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, union ENGTYPE_BIT_VECTOR *pEngines); +NV_STATUS kmigmgrSetEnginesInUse_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, union ENGTYPE_BIT_VECTOR *pEngines); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrSetEnginesInUse(OBJGPU *arg0, struct KernelMIGManager *arg1, union ENGTYPE_BIT_VECTOR *pEngines) { +static inline NV_STATUS kmigmgrSetEnginesInUse(OBJGPU *arg1, struct KernelMIGManager *arg2, union ENGTYPE_BIT_VECTOR *pEngines) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrSetEnginesInUse(arg0, arg1, pEngines) kmigmgrSetEnginesInUse_IMPL(arg0, arg1, pEngines) +#define kmigmgrSetEnginesInUse(arg1, arg2, pEngines) kmigmgrSetEnginesInUse_IMPL(arg1, arg2, pEngines) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrClearEnginesInUse_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, union ENGTYPE_BIT_VECTOR *pEngines); +NV_STATUS kmigmgrClearEnginesInUse_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, union ENGTYPE_BIT_VECTOR *pEngines); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrClearEnginesInUse(OBJGPU *arg0, struct KernelMIGManager *arg1, union ENGTYPE_BIT_VECTOR *pEngines) { +static inline NV_STATUS kmigmgrClearEnginesInUse(OBJGPU *arg1, struct KernelMIGManager *arg2, union ENGTYPE_BIT_VECTOR *pEngines) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrClearEnginesInUse(arg0, arg1, pEngines) kmigmgrClearEnginesInUse_IMPL(arg0, arg1, pEngines) +#define kmigmgrClearEnginesInUse(arg1, arg2, pEngines) kmigmgrClearEnginesInUse_IMPL(arg1, arg2, pEngines) #endif //__nvoc_kernel_mig_manager_h_disabled -NvBool kmigmgrIsEngineInUse_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, RM_ENGINE_TYPE rmEngineType); +NvBool kmigmgrIsEngineInUse_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, RM_ENGINE_TYPE rmEngineType); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NvBool kmigmgrIsEngineInUse(OBJGPU *arg0, struct KernelMIGManager *arg1, RM_ENGINE_TYPE rmEngineType) { +static inline NvBool kmigmgrIsEngineInUse(OBJGPU *arg1, struct KernelMIGManager *arg2, RM_ENGINE_TYPE rmEngineType) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrIsEngineInUse(arg0, arg1, rmEngineType) kmigmgrIsEngineInUse_IMPL(arg0, arg1, rmEngineType) +#define kmigmgrIsEngineInUse(arg1, arg2, rmEngineType) kmigmgrIsEngineInUse_IMPL(arg1, arg2, rmEngineType) #endif //__nvoc_kernel_mig_manager_h_disabled -NvBool kmigmgrIsEnginePartitionable_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, RM_ENGINE_TYPE rmEngineType); +NvBool kmigmgrIsEnginePartitionable_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, RM_ENGINE_TYPE rmEngineType); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NvBool kmigmgrIsEnginePartitionable(OBJGPU *arg0, struct KernelMIGManager *arg1, RM_ENGINE_TYPE rmEngineType) { +static inline NvBool kmigmgrIsEnginePartitionable(OBJGPU *arg1, struct KernelMIGManager *arg2, RM_ENGINE_TYPE rmEngineType) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrIsEnginePartitionable(arg0, arg1, rmEngineType) kmigmgrIsEnginePartitionable_IMPL(arg0, arg1, rmEngineType) +#define kmigmgrIsEnginePartitionable(arg1, arg2, rmEngineType) kmigmgrIsEnginePartitionable_IMPL(arg1, arg2, rmEngineType) #endif //__nvoc_kernel_mig_manager_h_disabled -NvBool kmigmgrIsEngineInInstance_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, RM_ENGINE_TYPE globalRmEngType, struct MIG_INSTANCE_REF arg2); +NvBool kmigmgrIsEngineInInstance_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, RM_ENGINE_TYPE globalRmEngType, struct MIG_INSTANCE_REF arg4); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NvBool kmigmgrIsEngineInInstance(OBJGPU *arg0, struct KernelMIGManager *arg1, RM_ENGINE_TYPE globalRmEngType, struct MIG_INSTANCE_REF arg2) { +static inline NvBool kmigmgrIsEngineInInstance(OBJGPU *arg1, struct KernelMIGManager *arg2, RM_ENGINE_TYPE globalRmEngType, struct MIG_INSTANCE_REF arg4) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrIsEngineInInstance(arg0, arg1, globalRmEngType, arg2) kmigmgrIsEngineInInstance_IMPL(arg0, arg1, globalRmEngType, arg2) +#define kmigmgrIsEngineInInstance(arg1, arg2, globalRmEngType, arg4) kmigmgrIsEngineInInstance_IMPL(arg1, arg2, globalRmEngType, arg4) #endif //__nvoc_kernel_mig_manager_h_disabled -NvBool kmigmgrIsLocalEngineInInstance_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, RM_ENGINE_TYPE localRmEngType, struct MIG_INSTANCE_REF arg2); +NvBool kmigmgrIsLocalEngineInInstance_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, RM_ENGINE_TYPE localRmEngType, struct MIG_INSTANCE_REF arg4); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NvBool kmigmgrIsLocalEngineInInstance(OBJGPU *arg0, struct KernelMIGManager *arg1, RM_ENGINE_TYPE localRmEngType, struct MIG_INSTANCE_REF arg2) { +static inline NvBool kmigmgrIsLocalEngineInInstance(OBJGPU *arg1, struct KernelMIGManager *arg2, RM_ENGINE_TYPE localRmEngType, struct MIG_INSTANCE_REF arg4) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrIsLocalEngineInInstance(arg0, arg1, localRmEngType, arg2) kmigmgrIsLocalEngineInInstance_IMPL(arg0, arg1, localRmEngType, arg2) +#define kmigmgrIsLocalEngineInInstance(arg1, arg2, localRmEngType, arg4) kmigmgrIsLocalEngineInInstance_IMPL(arg1, arg2, localRmEngType, arg4) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrCreateGPUInstance_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId, NvU8 *pUuid, KMIGMGR_CREATE_GPU_INSTANCE_PARAMS arg2, NvBool bValid, NvBool bCreateCap); +NV_STATUS kmigmgrCreateGPUInstance_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId, NvU8 *pUuid, KMIGMGR_CREATE_GPU_INSTANCE_PARAMS arg5, NvBool bValid, NvBool bCreateCap); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrCreateGPUInstance(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId, NvU8 *pUuid, KMIGMGR_CREATE_GPU_INSTANCE_PARAMS arg2, NvBool bValid, NvBool bCreateCap) { +static inline NV_STATUS kmigmgrCreateGPUInstance(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId, NvU8 *pUuid, KMIGMGR_CREATE_GPU_INSTANCE_PARAMS arg5, NvBool bValid, NvBool bCreateCap) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrCreateGPUInstance(arg0, arg1, swizzId, pUuid, arg2, bValid, bCreateCap) kmigmgrCreateGPUInstance_IMPL(arg0, arg1, swizzId, pUuid, arg2, bValid, bCreateCap) +#define kmigmgrCreateGPUInstance(arg1, arg2, swizzId, pUuid, arg5, bValid, bCreateCap) kmigmgrCreateGPUInstance_IMPL(arg1, arg2, swizzId, pUuid, arg5, bValid, bCreateCap) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrInvalidateGPUInstance_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId, NvBool bUnload); +NV_STATUS kmigmgrInvalidateGPUInstance_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId, NvBool bUnload); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrInvalidateGPUInstance(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId, NvBool bUnload) { +static inline NV_STATUS kmigmgrInvalidateGPUInstance(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId, NvBool bUnload) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrInvalidateGPUInstance(arg0, arg1, swizzId, bUnload) kmigmgrInvalidateGPUInstance_IMPL(arg0, arg1, swizzId, bUnload) +#define kmigmgrInvalidateGPUInstance(arg1, arg2, swizzId, bUnload) kmigmgrInvalidateGPUInstance_IMPL(arg1, arg2, swizzId, bUnload) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrInitGPUInstanceScrubber_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2); +NV_STATUS kmigmgrInitGPUInstanceScrubber_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrInitGPUInstanceScrubber(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2) { +static inline NV_STATUS kmigmgrInitGPUInstanceScrubber(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrInitGPUInstanceScrubber(arg0, arg1, arg2) kmigmgrInitGPUInstanceScrubber_IMPL(arg0, arg1, arg2) +#define kmigmgrInitGPUInstanceScrubber(arg1, arg2, arg3) kmigmgrInitGPUInstanceScrubber_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_mig_manager_h_disabled -void kmigmgrDestroyGPUInstanceScrubber_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2); +void kmigmgrDestroyGPUInstanceScrubber_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline void kmigmgrDestroyGPUInstanceScrubber(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2) { +static inline void kmigmgrDestroyGPUInstanceScrubber(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrDestroyGPUInstanceScrubber(arg0, arg1, arg2) kmigmgrDestroyGPUInstanceScrubber_IMPL(arg0, arg1, arg2) +#define kmigmgrDestroyGPUInstanceScrubber(arg1, arg2, arg3) kmigmgrDestroyGPUInstanceScrubber_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrInitGPUInstanceBufPools_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2); +NV_STATUS kmigmgrInitGPUInstanceBufPools_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrInitGPUInstanceBufPools(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2) { +static inline NV_STATUS kmigmgrInitGPUInstanceBufPools(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrInitGPUInstanceBufPools(arg0, arg1, arg2) kmigmgrInitGPUInstanceBufPools_IMPL(arg0, arg1, arg2) +#define kmigmgrInitGPUInstanceBufPools(arg1, arg2, arg3) kmigmgrInitGPUInstanceBufPools_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrInitGPUInstanceGrBufPools_IMPL(OBJGPU *pGpu, struct KernelMIGManager *arg0, KERNEL_MIG_GPU_INSTANCE *arg1); +NV_STATUS kmigmgrInitGPUInstanceGrBufPools_IMPL(OBJGPU *pGpu, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrInitGPUInstanceGrBufPools(OBJGPU *pGpu, struct KernelMIGManager *arg0, KERNEL_MIG_GPU_INSTANCE *arg1) { +static inline NV_STATUS kmigmgrInitGPUInstanceGrBufPools(OBJGPU *pGpu, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrInitGPUInstanceGrBufPools(pGpu, arg0, arg1) kmigmgrInitGPUInstanceGrBufPools_IMPL(pGpu, arg0, arg1) +#define kmigmgrInitGPUInstanceGrBufPools(pGpu, arg2, arg3) kmigmgrInitGPUInstanceGrBufPools_IMPL(pGpu, arg2, arg3) #endif //__nvoc_kernel_mig_manager_h_disabled -void kmigmgrDestroyGPUInstanceGrBufPools_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2); +void kmigmgrDestroyGPUInstanceGrBufPools_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline void kmigmgrDestroyGPUInstanceGrBufPools(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2) { +static inline void kmigmgrDestroyGPUInstanceGrBufPools(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrDestroyGPUInstanceGrBufPools(arg0, arg1, arg2) kmigmgrDestroyGPUInstanceGrBufPools_IMPL(arg0, arg1, arg2) +#define kmigmgrDestroyGPUInstanceGrBufPools(arg1, arg2, arg3) kmigmgrDestroyGPUInstanceGrBufPools_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrInitGPUInstancePool_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2); +NV_STATUS kmigmgrInitGPUInstancePool_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrInitGPUInstancePool(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2) { +static inline NV_STATUS kmigmgrInitGPUInstancePool(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrInitGPUInstancePool(arg0, arg1, arg2) kmigmgrInitGPUInstancePool_IMPL(arg0, arg1, arg2) +#define kmigmgrInitGPUInstancePool(arg1, arg2, arg3) kmigmgrInitGPUInstancePool_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_mig_manager_h_disabled -void kmigmgrDestroyGPUInstancePool_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2); +void kmigmgrDestroyGPUInstancePool_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline void kmigmgrDestroyGPUInstancePool(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2) { +static inline void kmigmgrDestroyGPUInstancePool(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrDestroyGPUInstancePool(arg0, arg1, arg2) kmigmgrDestroyGPUInstancePool_IMPL(arg0, arg1, arg2) +#define kmigmgrDestroyGPUInstancePool(arg1, arg2, arg3) kmigmgrDestroyGPUInstancePool_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrInitGPUInstanceRunlistBufPools_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2); +NV_STATUS kmigmgrInitGPUInstanceRunlistBufPools_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrInitGPUInstanceRunlistBufPools(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2) { +static inline NV_STATUS kmigmgrInitGPUInstanceRunlistBufPools(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrInitGPUInstanceRunlistBufPools(arg0, arg1, arg2) kmigmgrInitGPUInstanceRunlistBufPools_IMPL(arg0, arg1, arg2) +#define kmigmgrInitGPUInstanceRunlistBufPools(arg1, arg2, arg3) kmigmgrInitGPUInstanceRunlistBufPools_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_mig_manager_h_disabled -void kmigmgrDestroyGPUInstanceRunlistBufPools_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2); +void kmigmgrDestroyGPUInstanceRunlistBufPools_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline void kmigmgrDestroyGPUInstanceRunlistBufPools(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2) { +static inline void kmigmgrDestroyGPUInstanceRunlistBufPools(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrDestroyGPUInstanceRunlistBufPools(arg0, arg1, arg2) kmigmgrDestroyGPUInstanceRunlistBufPools_IMPL(arg0, arg1, arg2) +#define kmigmgrDestroyGPUInstanceRunlistBufPools(arg1, arg2, arg3) kmigmgrDestroyGPUInstanceRunlistBufPools_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_mig_manager_h_disabled -void kmigmgrPrintSubscribingClients_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId); +void kmigmgrPrintSubscribingClients_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline void kmigmgrPrintSubscribingClients(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId) { +static inline void kmigmgrPrintSubscribingClients(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrPrintSubscribingClients(arg0, arg1, swizzId) kmigmgrPrintSubscribingClients_IMPL(arg0, arg1, swizzId) +#define kmigmgrPrintSubscribingClients(arg1, arg2, swizzId) kmigmgrPrintSubscribingClients_IMPL(arg1, arg2, swizzId) #endif //__nvoc_kernel_mig_manager_h_disabled -void kmigmgrInitGPUInstanceInfo_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2); +void kmigmgrInitGPUInstanceInfo_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline void kmigmgrInitGPUInstanceInfo(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2) { +static inline void kmigmgrInitGPUInstanceInfo(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrInitGPUInstanceInfo(arg0, arg1, arg2) kmigmgrInitGPUInstanceInfo_IMPL(arg0, arg1, arg2) +#define kmigmgrInitGPUInstanceInfo(arg1, arg2, arg3) kmigmgrInitGPUInstanceInfo_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_mig_manager_h_disabled -void kmigmgrTrimInstanceRunlistBufPools_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2); +void kmigmgrTrimInstanceRunlistBufPools_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline void kmigmgrTrimInstanceRunlistBufPools(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2) { +static inline void kmigmgrTrimInstanceRunlistBufPools(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrTrimInstanceRunlistBufPools(arg0, arg1, arg2) kmigmgrTrimInstanceRunlistBufPools_IMPL(arg0, arg1, arg2) +#define kmigmgrTrimInstanceRunlistBufPools(arg1, arg2, arg3) kmigmgrTrimInstanceRunlistBufPools_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrSetDeviceProfilingInUse_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1); +NV_STATUS kmigmgrSetDeviceProfilingInUse_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrSetDeviceProfilingInUse(OBJGPU *arg0, struct KernelMIGManager *arg1) { +static inline NV_STATUS kmigmgrSetDeviceProfilingInUse(OBJGPU *arg1, struct KernelMIGManager *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrSetDeviceProfilingInUse(arg0, arg1) kmigmgrSetDeviceProfilingInUse_IMPL(arg0, arg1) +#define kmigmgrSetDeviceProfilingInUse(arg1, arg2) kmigmgrSetDeviceProfilingInUse_IMPL(arg1, arg2) #endif //__nvoc_kernel_mig_manager_h_disabled -void kmigmgrClearDeviceProfilingInUse_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1); +void kmigmgrClearDeviceProfilingInUse_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline void kmigmgrClearDeviceProfilingInUse(OBJGPU *arg0, struct KernelMIGManager *arg1) { +static inline void kmigmgrClearDeviceProfilingInUse(OBJGPU *arg1, struct KernelMIGManager *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrClearDeviceProfilingInUse(arg0, arg1) kmigmgrClearDeviceProfilingInUse_IMPL(arg0, arg1) +#define kmigmgrClearDeviceProfilingInUse(arg1, arg2) kmigmgrClearDeviceProfilingInUse_IMPL(arg1, arg2) #endif //__nvoc_kernel_mig_manager_h_disabled -NvBool kmigmgrIsDeviceProfilingInUse_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1); +NvBool kmigmgrIsDeviceProfilingInUse_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NvBool kmigmgrIsDeviceProfilingInUse(OBJGPU *arg0, struct KernelMIGManager *arg1) { +static inline NvBool kmigmgrIsDeviceProfilingInUse(OBJGPU *arg1, struct KernelMIGManager *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrIsDeviceProfilingInUse(arg0, arg1) kmigmgrIsDeviceProfilingInUse_IMPL(arg0, arg1) +#define kmigmgrIsDeviceProfilingInUse(arg1, arg2) kmigmgrIsDeviceProfilingInUse_IMPL(arg1, arg2) #endif //__nvoc_kernel_mig_manager_h_disabled -NvBool kmigmgrIsDeviceUsingDeviceProfiling_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, Device *pDevice); +NvBool kmigmgrIsDeviceUsingDeviceProfiling_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, Device *pDevice); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NvBool kmigmgrIsDeviceUsingDeviceProfiling(OBJGPU *arg0, struct KernelMIGManager *arg1, Device *pDevice) { +static inline NvBool kmigmgrIsDeviceUsingDeviceProfiling(OBJGPU *arg1, struct KernelMIGManager *arg2, Device *pDevice) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrIsDeviceUsingDeviceProfiling(arg0, arg1, pDevice) kmigmgrIsDeviceUsingDeviceProfiling_IMPL(arg0, arg1, pDevice) +#define kmigmgrIsDeviceUsingDeviceProfiling(arg1, arg2, pDevice) kmigmgrIsDeviceUsingDeviceProfiling_IMPL(arg1, arg2, pDevice) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrEnableAllLCEs_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvBool bEnableAllLCEs); +NV_STATUS kmigmgrEnableAllLCEs_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvBool bEnableAllLCEs); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrEnableAllLCEs(OBJGPU *arg0, struct KernelMIGManager *arg1, NvBool bEnableAllLCEs) { +static inline NV_STATUS kmigmgrEnableAllLCEs(OBJGPU *arg1, struct KernelMIGManager *arg2, NvBool bEnableAllLCEs) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrEnableAllLCEs(arg0, arg1, bEnableAllLCEs) kmigmgrEnableAllLCEs_IMPL(arg0, arg1, bEnableAllLCEs) +#define kmigmgrEnableAllLCEs(arg1, arg2, bEnableAllLCEs) kmigmgrEnableAllLCEs_IMPL(arg1, arg2, bEnableAllLCEs) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrGetInstanceRefFromDevice_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, Device *arg2, struct MIG_INSTANCE_REF *arg3); +NV_STATUS kmigmgrGetInstanceRefFromDevice_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, Device *arg3, struct MIG_INSTANCE_REF *arg4); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrGetInstanceRefFromDevice(OBJGPU *arg0, struct KernelMIGManager *arg1, Device *arg2, struct MIG_INSTANCE_REF *arg3) { +static inline NV_STATUS kmigmgrGetInstanceRefFromDevice(OBJGPU *arg1, struct KernelMIGManager *arg2, Device *arg3, struct MIG_INSTANCE_REF *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetInstanceRefFromDevice(arg0, arg1, arg2, arg3) kmigmgrGetInstanceRefFromDevice_IMPL(arg0, arg1, arg2, arg3) +#define kmigmgrGetInstanceRefFromDevice(arg1, arg2, arg3, arg4) kmigmgrGetInstanceRefFromDevice_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrGetMemoryPartitionHeapFromDevice_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, Device *arg2, struct Heap **arg3); +NV_STATUS kmigmgrGetMemoryPartitionHeapFromDevice_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, Device *arg3, struct Heap **arg4); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrGetMemoryPartitionHeapFromDevice(OBJGPU *arg0, struct KernelMIGManager *arg1, Device *arg2, struct Heap **arg3) { +static inline NV_STATUS kmigmgrGetMemoryPartitionHeapFromDevice(OBJGPU *arg1, struct KernelMIGManager *arg2, Device *arg3, struct Heap **arg4) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetMemoryPartitionHeapFromDevice(arg0, arg1, arg2, arg3) kmigmgrGetMemoryPartitionHeapFromDevice_IMPL(arg0, arg1, arg2, arg3) +#define kmigmgrGetMemoryPartitionHeapFromDevice(arg1, arg2, arg3, arg4) kmigmgrGetMemoryPartitionHeapFromDevice_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrGetSwizzIdFromDevice_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, Device *pDevice, NvU32 *pSwizzId); +NV_STATUS kmigmgrGetSwizzIdFromDevice_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, Device *pDevice, NvU32 *pSwizzId); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrGetSwizzIdFromDevice(OBJGPU *arg0, struct KernelMIGManager *arg1, Device *pDevice, NvU32 *pSwizzId) { +static inline NV_STATUS kmigmgrGetSwizzIdFromDevice(OBJGPU *arg1, struct KernelMIGManager *arg2, Device *pDevice, NvU32 *pSwizzId) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetSwizzIdFromDevice(arg0, arg1, pDevice, pSwizzId) kmigmgrGetSwizzIdFromDevice_IMPL(arg0, arg1, pDevice, pSwizzId) +#define kmigmgrGetSwizzIdFromDevice(arg1, arg2, pDevice, pSwizzId) kmigmgrGetSwizzIdFromDevice_IMPL(arg1, arg2, pDevice, pSwizzId) #endif //__nvoc_kernel_mig_manager_h_disabled -void kmigmgrPrintGPUInstanceInfo_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2); +void kmigmgrPrintGPUInstanceInfo_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline void kmigmgrPrintGPUInstanceInfo(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2) { +static inline void kmigmgrPrintGPUInstanceInfo(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrPrintGPUInstanceInfo(arg0, arg1, arg2) kmigmgrPrintGPUInstanceInfo_IMPL(arg0, arg1, arg2) +#define kmigmgrPrintGPUInstanceInfo(arg1, arg2, arg3) kmigmgrPrintGPUInstanceInfo_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrSetGPUInstanceInfo_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId, NvU8 *pUuid, KMIGMGR_CREATE_GPU_INSTANCE_PARAMS arg2); +NV_STATUS kmigmgrSetGPUInstanceInfo_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId, NvU8 *pUuid, KMIGMGR_CREATE_GPU_INSTANCE_PARAMS arg5); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrSetGPUInstanceInfo(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId, NvU8 *pUuid, KMIGMGR_CREATE_GPU_INSTANCE_PARAMS arg2) { +static inline NV_STATUS kmigmgrSetGPUInstanceInfo(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId, NvU8 *pUuid, KMIGMGR_CREATE_GPU_INSTANCE_PARAMS arg5) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrSetGPUInstanceInfo(arg0, arg1, swizzId, pUuid, arg2) kmigmgrSetGPUInstanceInfo_IMPL(arg0, arg1, swizzId, pUuid, arg2) +#define kmigmgrSetGPUInstanceInfo(arg1, arg2, swizzId, pUuid, arg5) kmigmgrSetGPUInstanceInfo_IMPL(arg1, arg2, swizzId, pUuid, arg5) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrGetGPUInstanceInfo_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId, KERNEL_MIG_GPU_INSTANCE **arg2); +NV_STATUS kmigmgrGetGPUInstanceInfo_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId, KERNEL_MIG_GPU_INSTANCE **arg4); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrGetGPUInstanceInfo(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId, KERNEL_MIG_GPU_INSTANCE **arg2) { +static inline NV_STATUS kmigmgrGetGPUInstanceInfo(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId, KERNEL_MIG_GPU_INSTANCE **arg4) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetGPUInstanceInfo(arg0, arg1, swizzId, arg2) kmigmgrGetGPUInstanceInfo_IMPL(arg0, arg1, swizzId, arg2) +#define kmigmgrGetGPUInstanceInfo(arg1, arg2, swizzId, arg4) kmigmgrGetGPUInstanceInfo_IMPL(arg1, arg2, swizzId, arg4) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrGetLocalToGlobalEngineType_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, struct MIG_INSTANCE_REF arg2, RM_ENGINE_TYPE localEngType, RM_ENGINE_TYPE *pGlobalEngType); +NV_STATUS kmigmgrGetLocalToGlobalEngineType_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, struct MIG_INSTANCE_REF arg3, RM_ENGINE_TYPE localEngType, RM_ENGINE_TYPE *pGlobalEngType); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrGetLocalToGlobalEngineType(OBJGPU *arg0, struct KernelMIGManager *arg1, struct MIG_INSTANCE_REF arg2, RM_ENGINE_TYPE localEngType, RM_ENGINE_TYPE *pGlobalEngType) { +static inline NV_STATUS kmigmgrGetLocalToGlobalEngineType(OBJGPU *arg1, struct KernelMIGManager *arg2, struct MIG_INSTANCE_REF arg3, RM_ENGINE_TYPE localEngType, RM_ENGINE_TYPE *pGlobalEngType) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetLocalToGlobalEngineType(arg0, arg1, arg2, localEngType, pGlobalEngType) kmigmgrGetLocalToGlobalEngineType_IMPL(arg0, arg1, arg2, localEngType, pGlobalEngType) +#define kmigmgrGetLocalToGlobalEngineType(arg1, arg2, arg3, localEngType, pGlobalEngType) kmigmgrGetLocalToGlobalEngineType_IMPL(arg1, arg2, arg3, localEngType, pGlobalEngType) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrGetGlobalToLocalEngineType_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, struct MIG_INSTANCE_REF arg2, RM_ENGINE_TYPE globalEngType, RM_ENGINE_TYPE *pLocalEngType); +NV_STATUS kmigmgrGetGlobalToLocalEngineType_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, struct MIG_INSTANCE_REF arg3, RM_ENGINE_TYPE globalEngType, RM_ENGINE_TYPE *pLocalEngType); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrGetGlobalToLocalEngineType(OBJGPU *arg0, struct KernelMIGManager *arg1, struct MIG_INSTANCE_REF arg2, RM_ENGINE_TYPE globalEngType, RM_ENGINE_TYPE *pLocalEngType) { +static inline NV_STATUS kmigmgrGetGlobalToLocalEngineType(OBJGPU *arg1, struct KernelMIGManager *arg2, struct MIG_INSTANCE_REF arg3, RM_ENGINE_TYPE globalEngType, RM_ENGINE_TYPE *pLocalEngType) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetGlobalToLocalEngineType(arg0, arg1, arg2, globalEngType, pLocalEngType) kmigmgrGetGlobalToLocalEngineType_IMPL(arg0, arg1, arg2, globalEngType, pLocalEngType) +#define kmigmgrGetGlobalToLocalEngineType(arg1, arg2, arg3, globalEngType, pLocalEngType) kmigmgrGetGlobalToLocalEngineType_IMPL(arg1, arg2, arg3, globalEngType, pLocalEngType) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrFilterEngineList_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, struct Subdevice *arg2, RM_ENGINE_TYPE *pEngineTypes, NvU32 *pEngineCount); +NV_STATUS kmigmgrFilterEngineList_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, struct Subdevice *arg3, RM_ENGINE_TYPE *pEngineTypes, NvU32 *pEngineCount); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrFilterEngineList(OBJGPU *arg0, struct KernelMIGManager *arg1, struct Subdevice *arg2, RM_ENGINE_TYPE *pEngineTypes, NvU32 *pEngineCount) { +static inline NV_STATUS kmigmgrFilterEngineList(OBJGPU *arg1, struct KernelMIGManager *arg2, struct Subdevice *arg3, RM_ENGINE_TYPE *pEngineTypes, NvU32 *pEngineCount) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrFilterEngineList(arg0, arg1, arg2, pEngineTypes, pEngineCount) kmigmgrFilterEngineList_IMPL(arg0, arg1, arg2, pEngineTypes, pEngineCount) +#define kmigmgrFilterEngineList(arg1, arg2, arg3, pEngineTypes, pEngineCount) kmigmgrFilterEngineList_IMPL(arg1, arg2, arg3, pEngineTypes, pEngineCount) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrFilterEnginePartnerList_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, struct Subdevice *arg2, NV2080_CTRL_GPU_GET_ENGINE_PARTNERLIST_PARAMS *arg3); +NV_STATUS kmigmgrFilterEnginePartnerList_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, struct Subdevice *arg3, NV2080_CTRL_GPU_GET_ENGINE_PARTNERLIST_PARAMS *arg4); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrFilterEnginePartnerList(OBJGPU *arg0, struct KernelMIGManager *arg1, struct Subdevice *arg2, NV2080_CTRL_GPU_GET_ENGINE_PARTNERLIST_PARAMS *arg3) { +static inline NV_STATUS kmigmgrFilterEnginePartnerList(OBJGPU *arg1, struct KernelMIGManager *arg2, struct Subdevice *arg3, NV2080_CTRL_GPU_GET_ENGINE_PARTNERLIST_PARAMS *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrFilterEnginePartnerList(arg0, arg1, arg2, arg3) kmigmgrFilterEnginePartnerList_IMPL(arg0, arg1, arg2, arg3) +#define kmigmgrFilterEnginePartnerList(arg1, arg2, arg3, arg4) kmigmgrFilterEnginePartnerList_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrGetProfileByPartitionFlag_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 partitionFlag, const NV2080_CTRL_INTERNAL_MIGMGR_PROFILE_INFO **arg2); +NV_STATUS kmigmgrGetProfileByPartitionFlag_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 partitionFlag, const NV2080_CTRL_INTERNAL_MIGMGR_PROFILE_INFO **arg4); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrGetProfileByPartitionFlag(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 partitionFlag, const NV2080_CTRL_INTERNAL_MIGMGR_PROFILE_INFO **arg2) { +static inline NV_STATUS kmigmgrGetProfileByPartitionFlag(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 partitionFlag, const NV2080_CTRL_INTERNAL_MIGMGR_PROFILE_INFO **arg4) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetProfileByPartitionFlag(arg0, arg1, partitionFlag, arg2) kmigmgrGetProfileByPartitionFlag_IMPL(arg0, arg1, partitionFlag, arg2) +#define kmigmgrGetProfileByPartitionFlag(arg1, arg2, partitionFlag, arg4) kmigmgrGetProfileByPartitionFlag_IMPL(arg1, arg2, partitionFlag, arg4) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrSaveComputeInstances_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2, GPUMGR_SAVE_COMPUTE_INSTANCE *arg3); +NV_STATUS kmigmgrSaveComputeInstances_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3, GPUMGR_SAVE_COMPUTE_INSTANCE *arg4); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrSaveComputeInstances(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2, GPUMGR_SAVE_COMPUTE_INSTANCE *arg3) { +static inline NV_STATUS kmigmgrSaveComputeInstances(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3, GPUMGR_SAVE_COMPUTE_INSTANCE *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrSaveComputeInstances(arg0, arg1, arg2, arg3) kmigmgrSaveComputeInstances_IMPL(arg0, arg1, arg2, arg3) +#define kmigmgrSaveComputeInstances(arg1, arg2, arg3, arg4) kmigmgrSaveComputeInstances_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrSetPartitioningMode_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1); +NV_STATUS kmigmgrSetPartitioningMode_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrSetPartitioningMode(OBJGPU *arg0, struct KernelMIGManager *arg1) { +static inline NV_STATUS kmigmgrSetPartitioningMode(OBJGPU *arg1, struct KernelMIGManager *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrSetPartitioningMode(arg0, arg1) kmigmgrSetPartitioningMode_IMPL(arg0, arg1) +#define kmigmgrSetPartitioningMode(arg1, arg2) kmigmgrSetPartitioningMode_IMPL(arg1, arg2) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrGetMIGReferenceFromEngineType_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, RM_ENGINE_TYPE rmEngineType, struct MIG_INSTANCE_REF *arg2); +NV_STATUS kmigmgrGetMIGReferenceFromEngineType_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, RM_ENGINE_TYPE rmEngineType, struct MIG_INSTANCE_REF *arg4); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrGetMIGReferenceFromEngineType(OBJGPU *arg0, struct KernelMIGManager *arg1, RM_ENGINE_TYPE rmEngineType, struct MIG_INSTANCE_REF *arg2) { +static inline NV_STATUS kmigmgrGetMIGReferenceFromEngineType(OBJGPU *arg1, struct KernelMIGManager *arg2, RM_ENGINE_TYPE rmEngineType, struct MIG_INSTANCE_REF *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetMIGReferenceFromEngineType(arg0, arg1, rmEngineType, arg2) kmigmgrGetMIGReferenceFromEngineType_IMPL(arg0, arg1, rmEngineType, arg2) +#define kmigmgrGetMIGReferenceFromEngineType(arg1, arg2, rmEngineType, arg4) kmigmgrGetMIGReferenceFromEngineType_IMPL(arg1, arg2, rmEngineType, arg4) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrGetSmallestGpuInstanceSize_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 *pComputeSizeFlag); +NV_STATUS kmigmgrGetSmallestGpuInstanceSize_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 *pComputeSizeFlag); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrGetSmallestGpuInstanceSize(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 *pComputeSizeFlag) { +static inline NV_STATUS kmigmgrGetSmallestGpuInstanceSize(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 *pComputeSizeFlag) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetSmallestGpuInstanceSize(arg0, arg1, pComputeSizeFlag) kmigmgrGetSmallestGpuInstanceSize_IMPL(arg0, arg1, pComputeSizeFlag) +#define kmigmgrGetSmallestGpuInstanceSize(arg1, arg2, pComputeSizeFlag) kmigmgrGetSmallestGpuInstanceSize_IMPL(arg1, arg2, pComputeSizeFlag) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrGetGPUInstanceScrubberCe_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, Device *pDevice, NvU32 *ceInst); +NV_STATUS kmigmgrGetGPUInstanceScrubberCe_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, Device *pDevice, NvU32 *ceInst); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrGetGPUInstanceScrubberCe(OBJGPU *arg0, struct KernelMIGManager *arg1, Device *pDevice, NvU32 *ceInst) { +static inline NV_STATUS kmigmgrGetGPUInstanceScrubberCe(OBJGPU *arg1, struct KernelMIGManager *arg2, Device *pDevice, NvU32 *ceInst) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetGPUInstanceScrubberCe(arg0, arg1, pDevice, ceInst) kmigmgrGetGPUInstanceScrubberCe_IMPL(arg0, arg1, pDevice, ceInst) +#define kmigmgrGetGPUInstanceScrubberCe(arg1, arg2, pDevice, ceInst) kmigmgrGetGPUInstanceScrubberCe_IMPL(arg1, arg2, pDevice, ceInst) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrDescribeGPUInstances_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NV2080_CTRL_GPU_DESCRIBE_PARTITIONS_PARAMS *arg2); +NV_STATUS kmigmgrDescribeGPUInstances_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NV2080_CTRL_GPU_DESCRIBE_PARTITIONS_PARAMS *arg3); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrDescribeGPUInstances(OBJGPU *arg0, struct KernelMIGManager *arg1, NV2080_CTRL_GPU_DESCRIBE_PARTITIONS_PARAMS *arg2) { +static inline NV_STATUS kmigmgrDescribeGPUInstances(OBJGPU *arg1, struct KernelMIGManager *arg2, NV2080_CTRL_GPU_DESCRIBE_PARTITIONS_PARAMS *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrDescribeGPUInstances(arg0, arg1, arg2) kmigmgrDescribeGPUInstances_IMPL(arg0, arg1, arg2) +#define kmigmgrDescribeGPUInstances(arg1, arg2, arg3) kmigmgrDescribeGPUInstances_IMPL(arg1, arg2, arg3) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrSwizzIdToResourceAllocation_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId, KMIGMGR_CREATE_GPU_INSTANCE_PARAMS arg2, KERNEL_MIG_GPU_INSTANCE *arg3, MIG_RESOURCE_ALLOCATION *arg4); +NV_STATUS kmigmgrSwizzIdToResourceAllocation_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId, KMIGMGR_CREATE_GPU_INSTANCE_PARAMS arg4, KERNEL_MIG_GPU_INSTANCE *arg5, MIG_RESOURCE_ALLOCATION *arg6); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrSwizzIdToResourceAllocation(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId, KMIGMGR_CREATE_GPU_INSTANCE_PARAMS arg2, KERNEL_MIG_GPU_INSTANCE *arg3, MIG_RESOURCE_ALLOCATION *arg4) { +static inline NV_STATUS kmigmgrSwizzIdToResourceAllocation(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId, KMIGMGR_CREATE_GPU_INSTANCE_PARAMS arg4, KERNEL_MIG_GPU_INSTANCE *arg5, MIG_RESOURCE_ALLOCATION *arg6) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrSwizzIdToResourceAllocation(arg0, arg1, swizzId, arg2, arg3, arg4) kmigmgrSwizzIdToResourceAllocation_IMPL(arg0, arg1, swizzId, arg2, arg3, arg4) +#define kmigmgrSwizzIdToResourceAllocation(arg1, arg2, swizzId, arg4, arg5, arg6) kmigmgrSwizzIdToResourceAllocation_IMPL(arg1, arg2, swizzId, arg4, arg5, arg6) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrAllocComputeInstanceHandles_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2, MIG_COMPUTE_INSTANCE *arg3); +NV_STATUS kmigmgrAllocComputeInstanceHandles_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3, MIG_COMPUTE_INSTANCE *arg4); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrAllocComputeInstanceHandles(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2, MIG_COMPUTE_INSTANCE *arg3) { +static inline NV_STATUS kmigmgrAllocComputeInstanceHandles(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3, MIG_COMPUTE_INSTANCE *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrAllocComputeInstanceHandles(arg0, arg1, arg2, arg3) kmigmgrAllocComputeInstanceHandles_IMPL(arg0, arg1, arg2, arg3) +#define kmigmgrAllocComputeInstanceHandles(arg1, arg2, arg3, arg4) kmigmgrAllocComputeInstanceHandles_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_mig_manager_h_disabled -void kmigmgrFreeComputeInstanceHandles_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2, MIG_COMPUTE_INSTANCE *arg3); +void kmigmgrFreeComputeInstanceHandles_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3, MIG_COMPUTE_INSTANCE *arg4); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline void kmigmgrFreeComputeInstanceHandles(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2, MIG_COMPUTE_INSTANCE *arg3) { +static inline void kmigmgrFreeComputeInstanceHandles(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3, MIG_COMPUTE_INSTANCE *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrFreeComputeInstanceHandles(arg0, arg1, arg2, arg3) kmigmgrFreeComputeInstanceHandles_IMPL(arg0, arg1, arg2, arg3) +#define kmigmgrFreeComputeInstanceHandles(arg1, arg2, arg3, arg4) kmigmgrFreeComputeInstanceHandles_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_mig_manager_h_disabled -void kmigmgrReleaseComputeInstanceEngines_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2, MIG_COMPUTE_INSTANCE *arg3); +void kmigmgrReleaseComputeInstanceEngines_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3, MIG_COMPUTE_INSTANCE *arg4); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline void kmigmgrReleaseComputeInstanceEngines(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2, MIG_COMPUTE_INSTANCE *arg3) { +static inline void kmigmgrReleaseComputeInstanceEngines(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3, MIG_COMPUTE_INSTANCE *arg4) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrReleaseComputeInstanceEngines(arg0, arg1, arg2, arg3) kmigmgrReleaseComputeInstanceEngines_IMPL(arg0, arg1, arg2, arg3) +#define kmigmgrReleaseComputeInstanceEngines(arg1, arg2, arg3, arg4) kmigmgrReleaseComputeInstanceEngines_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrDeleteComputeInstance_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2, NvU32 CIId, NvBool bUnload); +NV_STATUS kmigmgrDeleteComputeInstance_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3, NvU32 CIId, NvBool bUnload); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrDeleteComputeInstance(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2, NvU32 CIId, NvBool bUnload) { +static inline NV_STATUS kmigmgrDeleteComputeInstance(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3, NvU32 CIId, NvBool bUnload) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrDeleteComputeInstance(arg0, arg1, arg2, CIId, bUnload) kmigmgrDeleteComputeInstance_IMPL(arg0, arg1, arg2, CIId, bUnload) +#define kmigmgrDeleteComputeInstance(arg1, arg2, arg3, CIId, bUnload) kmigmgrDeleteComputeInstance_IMPL(arg1, arg2, arg3, CIId, bUnload) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrConfigureGPUInstance_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId, const KMIGMGR_CONFIGURE_INSTANCE_REQUEST *pConfigRequestPerCi, NvU32 updateEngMask); +NV_STATUS kmigmgrConfigureGPUInstance_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId, const KMIGMGR_CONFIGURE_INSTANCE_REQUEST *pConfigRequestPerCi, NvU32 updateEngMask); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrConfigureGPUInstance(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 swizzId, const KMIGMGR_CONFIGURE_INSTANCE_REQUEST *pConfigRequestPerCi, NvU32 updateEngMask) { +static inline NV_STATUS kmigmgrConfigureGPUInstance(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId, const KMIGMGR_CONFIGURE_INSTANCE_REQUEST *pConfigRequestPerCi, NvU32 updateEngMask) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrConfigureGPUInstance(arg0, arg1, swizzId, pConfigRequestPerCi, updateEngMask) kmigmgrConfigureGPUInstance_IMPL(arg0, arg1, swizzId, pConfigRequestPerCi, updateEngMask) +#define kmigmgrConfigureGPUInstance(arg1, arg2, swizzId, pConfigRequestPerCi, updateEngMask) kmigmgrConfigureGPUInstance_IMPL(arg1, arg2, swizzId, pConfigRequestPerCi, updateEngMask) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrInvalidateGrGpcMapping_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2, NvU32 grIdx); +NV_STATUS kmigmgrInvalidateGrGpcMapping_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3, NvU32 grIdx); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrInvalidateGrGpcMapping(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2, NvU32 grIdx) { +static inline NV_STATUS kmigmgrInvalidateGrGpcMapping(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3, NvU32 grIdx) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrInvalidateGrGpcMapping(arg0, arg1, arg2, grIdx) kmigmgrInvalidateGrGpcMapping_IMPL(arg0, arg1, arg2, grIdx) +#define kmigmgrInvalidateGrGpcMapping(arg1, arg2, arg3, grIdx) kmigmgrInvalidateGrGpcMapping_IMPL(arg1, arg2, arg3, grIdx) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrInvalidateGr_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2, NvU32 grIdx); +NV_STATUS kmigmgrInvalidateGr_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3, NvU32 grIdx); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrInvalidateGr(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2, NvU32 grIdx) { +static inline NV_STATUS kmigmgrInvalidateGr(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3, NvU32 grIdx) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrInvalidateGr(arg0, arg1, arg2, grIdx) kmigmgrInvalidateGr_IMPL(arg0, arg1, arg2, grIdx) +#define kmigmgrInvalidateGr(arg1, arg2, arg3, grIdx) kmigmgrInvalidateGr_IMPL(arg1, arg2, arg3, grIdx) #endif //__nvoc_kernel_mig_manager_h_disabled NvU32 kmigmgrGetNextComputeSize_IMPL(NvBool bGetNextSmallest, NvU32 computeSize); #define kmigmgrGetNextComputeSize(bGetNextSmallest, computeSize) kmigmgrGetNextComputeSize_IMPL(bGetNextSmallest, computeSize) -NV_STATUS kmigmgrGetSkylineFromSize_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 computeSize, const NV2080_CTRL_INTERNAL_GRMGR_SKYLINE_INFO **ppSkyline); +NV_STATUS kmigmgrGetSkylineFromSize_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 computeSize, const NV2080_CTRL_INTERNAL_GRMGR_SKYLINE_INFO **ppSkyline); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrGetSkylineFromSize(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 computeSize, const NV2080_CTRL_INTERNAL_GRMGR_SKYLINE_INFO **ppSkyline) { +static inline NV_STATUS kmigmgrGetSkylineFromSize(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 computeSize, const NV2080_CTRL_INTERNAL_GRMGR_SKYLINE_INFO **ppSkyline) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetSkylineFromSize(arg0, arg1, computeSize, ppSkyline) kmigmgrGetSkylineFromSize_IMPL(arg0, arg1, computeSize, ppSkyline) +#define kmigmgrGetSkylineFromSize(arg1, arg2, computeSize, ppSkyline) kmigmgrGetSkylineFromSize_IMPL(arg1, arg2, computeSize, ppSkyline) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrGetComputeProfileFromSize_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 computeSize, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile); +NV_STATUS kmigmgrGetComputeProfileFromSize_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 computeSize, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrGetComputeProfileFromSize(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 computeSize, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile) { +static inline NV_STATUS kmigmgrGetComputeProfileFromSize(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 computeSize, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetComputeProfileFromSize(arg0, arg1, computeSize, pProfile) kmigmgrGetComputeProfileFromSize_IMPL(arg0, arg1, computeSize, pProfile) +#define kmigmgrGetComputeProfileFromSize(arg1, arg2, computeSize, pProfile) kmigmgrGetComputeProfileFromSize_IMPL(arg1, arg2, computeSize, pProfile) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrGetComputeProfileForRequest_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2, NvU32 smCountRequest, NvU32 gpcCountRequest, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile); +NV_STATUS kmigmgrGetComputeProfileForRequest_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3, NvU32 smCountRequest, NvU32 gpcCountRequest, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrGetComputeProfileForRequest(OBJGPU *arg0, struct KernelMIGManager *arg1, KERNEL_MIG_GPU_INSTANCE *arg2, NvU32 smCountRequest, NvU32 gpcCountRequest, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile) { +static inline NV_STATUS kmigmgrGetComputeProfileForRequest(OBJGPU *arg1, struct KernelMIGManager *arg2, KERNEL_MIG_GPU_INSTANCE *arg3, NvU32 smCountRequest, NvU32 gpcCountRequest, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetComputeProfileForRequest(arg0, arg1, arg2, smCountRequest, gpcCountRequest, pProfile) kmigmgrGetComputeProfileForRequest_IMPL(arg0, arg1, arg2, smCountRequest, gpcCountRequest, pProfile) +#define kmigmgrGetComputeProfileForRequest(arg1, arg2, arg3, smCountRequest, gpcCountRequest, pProfile) kmigmgrGetComputeProfileForRequest_IMPL(arg1, arg2, arg3, smCountRequest, gpcCountRequest, pProfile) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrGetComputeProfileFromSmCount_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 smCount, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile); +NV_STATUS kmigmgrGetComputeProfileFromSmCount_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 smCount, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrGetComputeProfileFromSmCount(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 smCount, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile) { +static inline NV_STATUS kmigmgrGetComputeProfileFromSmCount(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 smCount, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetComputeProfileFromSmCount(arg0, arg1, smCount, pProfile) kmigmgrGetComputeProfileFromSmCount_IMPL(arg0, arg1, smCount, pProfile) +#define kmigmgrGetComputeProfileFromSmCount(arg1, arg2, smCount, pProfile) kmigmgrGetComputeProfileFromSmCount_IMPL(arg1, arg2, smCount, pProfile) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrGetComputeProfileFromCTSId_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 ctsId, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile); +NV_STATUS kmigmgrGetComputeProfileFromCTSId_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 ctsId, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrGetComputeProfileFromCTSId(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 ctsId, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile) { +static inline NV_STATUS kmigmgrGetComputeProfileFromCTSId(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 ctsId, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetComputeProfileFromCTSId(arg0, arg1, ctsId, pProfile) kmigmgrGetComputeProfileFromCTSId_IMPL(arg0, arg1, ctsId, pProfile) +#define kmigmgrGetComputeProfileFromCTSId(arg1, arg2, ctsId, pProfile) kmigmgrGetComputeProfileFromCTSId_IMPL(arg1, arg2, ctsId, pProfile) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrGetInvalidCTSIdMask_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 ctsId, NvU64 *pInvalidCTSIdMask); +NV_STATUS kmigmgrGetInvalidCTSIdMask_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 ctsId, NvU64 *pInvalidCTSIdMask); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrGetInvalidCTSIdMask(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 ctsId, NvU64 *pInvalidCTSIdMask) { +static inline NV_STATUS kmigmgrGetInvalidCTSIdMask(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 ctsId, NvU64 *pInvalidCTSIdMask) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetInvalidCTSIdMask(arg0, arg1, ctsId, pInvalidCTSIdMask) kmigmgrGetInvalidCTSIdMask_IMPL(arg0, arg1, ctsId, pInvalidCTSIdMask) +#define kmigmgrGetInvalidCTSIdMask(arg1, arg2, ctsId, pInvalidCTSIdMask) kmigmgrGetInvalidCTSIdMask_IMPL(arg1, arg2, ctsId, pInvalidCTSIdMask) #endif //__nvoc_kernel_mig_manager_h_disabled struct NV_RANGE kmigmgrComputeProfileSizeToCTSIdRange_IMPL(NvU32 computeSize); #define kmigmgrComputeProfileSizeToCTSIdRange(computeSize) kmigmgrComputeProfileSizeToCTSIdRange_IMPL(computeSize) -struct NV_RANGE kmigmgrCtsIdToSpan_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 ctsId); +struct NV_RANGE kmigmgrCtsIdToSpan_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 ctsId); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline struct NV_RANGE kmigmgrCtsIdToSpan(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 ctsId) { +static inline struct NV_RANGE kmigmgrCtsIdToSpan(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 ctsId) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); struct NV_RANGE ret; portMemSet(&ret, 0, sizeof(struct NV_RANGE)); return ret; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrCtsIdToSpan(arg0, arg1, ctsId) kmigmgrCtsIdToSpan_IMPL(arg0, arg1, ctsId) +#define kmigmgrCtsIdToSpan(arg1, arg2, ctsId) kmigmgrCtsIdToSpan_IMPL(arg1, arg2, ctsId) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrGetFreeCTSId_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 *pCtsId, NvU64 globalValidCtsMask, NvU64 globalValidGfxCtsMask, NvU64 ctsIdsInUseMask, NvU32 profileSize, NvBool bRestrictWithGfx, NvBool bGfxRequested); +NV_STATUS kmigmgrGetFreeCTSId_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 *pCtsId, NvU64 globalValidCtsMask, NvU64 globalValidGfxCtsMask, NvU64 ctsIdsInUseMask, NvU32 profileSize, NvBool bRestrictWithGfx, NvBool bGfxRequested); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrGetFreeCTSId(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 *pCtsId, NvU64 globalValidCtsMask, NvU64 globalValidGfxCtsMask, NvU64 ctsIdsInUseMask, NvU32 profileSize, NvBool bRestrictWithGfx, NvBool bGfxRequested) { +static inline NV_STATUS kmigmgrGetFreeCTSId(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 *pCtsId, NvU64 globalValidCtsMask, NvU64 globalValidGfxCtsMask, NvU64 ctsIdsInUseMask, NvU32 profileSize, NvBool bRestrictWithGfx, NvBool bGfxRequested) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetFreeCTSId(arg0, arg1, pCtsId, globalValidCtsMask, globalValidGfxCtsMask, ctsIdsInUseMask, profileSize, bRestrictWithGfx, bGfxRequested) kmigmgrGetFreeCTSId_IMPL(arg0, arg1, pCtsId, globalValidCtsMask, globalValidGfxCtsMask, ctsIdsInUseMask, profileSize, bRestrictWithGfx, bGfxRequested) +#define kmigmgrGetFreeCTSId(arg1, arg2, pCtsId, globalValidCtsMask, globalValidGfxCtsMask, ctsIdsInUseMask, profileSize, bRestrictWithGfx, bGfxRequested) kmigmgrGetFreeCTSId_IMPL(arg1, arg2, pCtsId, globalValidCtsMask, globalValidGfxCtsMask, ctsIdsInUseMask, profileSize, bRestrictWithGfx, bGfxRequested) #endif //__nvoc_kernel_mig_manager_h_disabled NvU32 kmigmgrGetComputeSizeFromCTSId_IMPL(NvU32 ctsId); #define kmigmgrGetComputeSizeFromCTSId(ctsId) kmigmgrGetComputeSizeFromCTSId_IMPL(ctsId) -NvU32 kmigmgrSmallestComputeProfileSize_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1); +NvU32 kmigmgrSmallestComputeProfileSize_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NvU32 kmigmgrSmallestComputeProfileSize(OBJGPU *arg0, struct KernelMIGManager *arg1) { +static inline NvU32 kmigmgrSmallestComputeProfileSize(OBJGPU *arg1, struct KernelMIGManager *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return 0; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrSmallestComputeProfileSize(arg0, arg1) kmigmgrSmallestComputeProfileSize_IMPL(arg0, arg1) +#define kmigmgrSmallestComputeProfileSize(arg1, arg2) kmigmgrSmallestComputeProfileSize_IMPL(arg1, arg2) #endif //__nvoc_kernel_mig_manager_h_disabled -void kmigmgrSetCTSIdInUse_IMPL(KERNEL_MIG_GPU_INSTANCE *arg0, NvU32 ctsId, NvU32 grId, NvBool bInUse); +void kmigmgrSetCTSIdInUse_IMPL(KERNEL_MIG_GPU_INSTANCE *arg1, NvU32 ctsId, NvU32 grId, NvBool bInUse); -#define kmigmgrSetCTSIdInUse(arg0, ctsId, grId, bInUse) kmigmgrSetCTSIdInUse_IMPL(arg0, ctsId, grId, bInUse) -NV_STATUS kmigmgrXlateSpanStartToCTSId_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 computeSize, NvU32 spanStart, NvU32 *pCtsId); +#define kmigmgrSetCTSIdInUse(arg1, ctsId, grId, bInUse) kmigmgrSetCTSIdInUse_IMPL(arg1, ctsId, grId, bInUse) +NV_STATUS kmigmgrXlateSpanStartToCTSId_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 computeSize, NvU32 spanStart, NvU32 *pCtsId); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrXlateSpanStartToCTSId(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 computeSize, NvU32 spanStart, NvU32 *pCtsId) { +static inline NV_STATUS kmigmgrXlateSpanStartToCTSId(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 computeSize, NvU32 spanStart, NvU32 *pCtsId) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrXlateSpanStartToCTSId(arg0, arg1, computeSize, spanStart, pCtsId) kmigmgrXlateSpanStartToCTSId_IMPL(arg0, arg1, computeSize, spanStart, pCtsId) +#define kmigmgrXlateSpanStartToCTSId(arg1, arg2, computeSize, spanStart, pCtsId) kmigmgrXlateSpanStartToCTSId_IMPL(arg1, arg2, computeSize, spanStart, pCtsId) #endif //__nvoc_kernel_mig_manager_h_disabled -NV_STATUS kmigmgrGetSlotBasisMask_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU64 *pMask); +NV_STATUS kmigmgrGetSlotBasisMask_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU64 *pMask); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NV_STATUS kmigmgrGetSlotBasisMask(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU64 *pMask) { +static inline NV_STATUS kmigmgrGetSlotBasisMask(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU64 *pMask) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetSlotBasisMask(arg0, arg1, pMask) kmigmgrGetSlotBasisMask_IMPL(arg0, arg1, pMask) +#define kmigmgrGetSlotBasisMask(arg1, arg2, pMask) kmigmgrGetSlotBasisMask_IMPL(arg1, arg2, pMask) #endif //__nvoc_kernel_mig_manager_h_disabled -NvU32 kmigmgrGetSpanStartFromCTSId_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 ctsId); +NvU32 kmigmgrGetSpanStartFromCTSId_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 ctsId); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NvU32 kmigmgrGetSpanStartFromCTSId(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU32 ctsId) { +static inline NvU32 kmigmgrGetSpanStartFromCTSId(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 ctsId) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return 0; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrGetSpanStartFromCTSId(arg0, arg1, ctsId) kmigmgrGetSpanStartFromCTSId_IMPL(arg0, arg1, ctsId) +#define kmigmgrGetSpanStartFromCTSId(arg1, arg2, ctsId) kmigmgrGetSpanStartFromCTSId_IMPL(arg1, arg2, ctsId) #endif //__nvoc_kernel_mig_manager_h_disabled -NvBool kmigmgrIsCTSIdAvailable_IMPL(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU64 ctsIdValidMask, NvU64 ctsIdInUseMask, NvU32 ctsId); +NvBool kmigmgrIsCTSIdAvailable_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU64 ctsIdValidMask, NvU64 ctsIdInUseMask, NvU32 ctsId); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NvBool kmigmgrIsCTSIdAvailable(OBJGPU *arg0, struct KernelMIGManager *arg1, NvU64 ctsIdValidMask, NvU64 ctsIdInUseMask, NvU32 ctsId) { +static inline NvBool kmigmgrIsCTSIdAvailable(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU64 ctsIdValidMask, NvU64 ctsIdInUseMask, NvU32 ctsId) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrIsCTSIdAvailable(arg0, arg1, ctsIdValidMask, ctsIdInUseMask, ctsId) kmigmgrIsCTSIdAvailable_IMPL(arg0, arg1, ctsIdValidMask, ctsIdInUseMask, ctsId) +#define kmigmgrIsCTSIdAvailable(arg1, arg2, ctsIdValidMask, ctsIdInUseMask, ctsId) kmigmgrIsCTSIdAvailable_IMPL(arg1, arg2, ctsIdValidMask, ctsIdInUseMask, ctsId) #endif //__nvoc_kernel_mig_manager_h_disabled NV_STATUS kmigmgrUpdateCiConfigForVgpu_IMPL(OBJGPU *pGpu, struct KernelMIGManager *pKernelMIGManager, NvU32 execPartCount, NvU32 *pExecPartId, NvU32 gfid, NvBool bDelete); @@ -1950,15 +2025,15 @@ static inline NV_STATUS kmigmgrUpdateCiConfigForVgpu(OBJGPU *pGpu, struct Kernel #define kmigmgrUpdateCiConfigForVgpu(pGpu, pKernelMIGManager, execPartCount, pExecPartId, gfid, bDelete) kmigmgrUpdateCiConfigForVgpu_IMPL(pGpu, pKernelMIGManager, execPartCount, pExecPartId, gfid, bDelete) #endif //__nvoc_kernel_mig_manager_h_disabled -NvBool kmigmgrIsPartitionVeidAllocationContiguous_IMPL(OBJGPU *pGpu, struct KernelMIGManager *pKernelMIGManager, KERNEL_MIG_GPU_INSTANCE *arg0); +NvBool kmigmgrIsPartitionVeidAllocationContiguous_IMPL(OBJGPU *pGpu, struct KernelMIGManager *pKernelMIGManager, KERNEL_MIG_GPU_INSTANCE *arg3); #ifdef __nvoc_kernel_mig_manager_h_disabled -static inline NvBool kmigmgrIsPartitionVeidAllocationContiguous(OBJGPU *pGpu, struct KernelMIGManager *pKernelMIGManager, KERNEL_MIG_GPU_INSTANCE *arg0) { +static inline NvBool kmigmgrIsPartitionVeidAllocationContiguous(OBJGPU *pGpu, struct KernelMIGManager *pKernelMIGManager, KERNEL_MIG_GPU_INSTANCE *arg3) { NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_mig_manager_h_disabled -#define kmigmgrIsPartitionVeidAllocationContiguous(pGpu, pKernelMIGManager, arg0) kmigmgrIsPartitionVeidAllocationContiguous_IMPL(pGpu, pKernelMIGManager, arg0) +#define kmigmgrIsPartitionVeidAllocationContiguous(pGpu, pKernelMIGManager, arg3) kmigmgrIsPartitionVeidAllocationContiguous_IMPL(pGpu, pKernelMIGManager, arg3) #endif //__nvoc_kernel_mig_manager_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_kernel_nvdec_ctx_nvoc.c b/src/nvidia/generated/g_kernel_nvdec_ctx_nvoc.c index c561b1c998..a4d2606bfa 100644 --- a/src/nvidia/generated/g_kernel_nvdec_ctx_nvoc.c +++ b/src/nvidia/generated/g_kernel_nvdec_ctx_nvoc.c @@ -120,134 +120,169 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_NvdecContext = /*pExportInfo=*/ &__nvoc_export_info_NvdecContext }; -static NV_STATUS __nvoc_thunk_ChannelDescendant_nvdecctxCheckMemInterUnmap(struct NvdecContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_NvdecContext_ChannelDescendant.offset), bSubdeviceHandleProvided); +// 32 up-thunk(s) defined to bridge methods in NvdecContext to superclasses + +// nvdecctxGetSwMethods: virtual inherited (chandes) base (chandes) +static NV_STATUS __nvoc_up_thunk_ChannelDescendant_nvdecctxGetSwMethods(struct NvdecContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { + return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_NvdecContext_ChannelDescendant.offset), ppMethods, pNumMethods); } -static NvBool __nvoc_thunk_GpuResource_nvdecctxShareCallback(struct NvdecContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// nvdecctxIsSwMethodStalling: virtual inherited (chandes) base (chandes) +static NvBool __nvoc_up_thunk_ChannelDescendant_nvdecctxIsSwMethodStalling(struct NvdecContext *pChannelDescendant, NvU32 hHandle) { + return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_NvdecContext_ChannelDescendant.offset), hHandle); } -static NvBool __nvoc_thunk_RmResource_nvdecctxAccessCallback(struct NvdecContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// nvdecctxCheckMemInterUnmap: virtual inherited (chandes) base (chandes) +static NV_STATUS __nvoc_up_thunk_ChannelDescendant_nvdecctxCheckMemInterUnmap(struct NvdecContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { + return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_NvdecContext_ChannelDescendant.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RsResource_nvdecctxMapTo(struct NvdecContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), pParams); +// nvdecctxControl: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxControl(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_nvdecctxGetMapAddrSpace(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// nvdecctxMap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxMap(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static void __nvoc_thunk_Notifier_nvdecctxSetNotificationShare(struct NvdecContext *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_NvdecContext_Notifier.offset), pNotifShare); +// nvdecctxUnmap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxUnmap(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pCallContext, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_nvdecctxGetRefCount(struct NvdecContext *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RsResource.offset)); +// nvdecctxShareCallback: virtual inherited (gpures) base (chandes) +static NvBool __nvoc_up_thunk_GpuResource_nvdecctxShareCallback(struct NvdecContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static void __nvoc_thunk_RsResource_nvdecctxAddAdditionalDependants(struct RsClient *pClient, struct NvdecContext *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), pReference); +// nvdecctxGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxGetRegBaseOffsetAndSize(struct NvdecContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_RmResource_nvdecctxControl_Prologue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pCallContext, pParams); +// nvdecctxGetMapAddrSpace: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxGetMapAddrSpace(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_GpuResource_nvdecctxGetRegBaseOffsetAndSize(struct NvdecContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pGpu, pOffset, pSize); +// nvdecctxInternalControlForward: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxInternalControlForward(struct NvdecContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_GpuResource_nvdecctxInternalControlForward(struct NvdecContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), command, pParams, size); +// nvdecctxGetInternalObjectHandle: virtual inherited (gpures) base (chandes) +static NvHandle __nvoc_up_thunk_GpuResource_nvdecctxGetInternalObjectHandle(struct NvdecContext *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_nvdecctxUnmapFrom(struct NvdecContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), pParams); +// nvdecctxAccessCallback: virtual inherited (rmres) base (chandes) +static NvBool __nvoc_up_thunk_RmResource_nvdecctxAccessCallback(struct NvdecContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static void __nvoc_thunk_RmResource_nvdecctxControl_Epilogue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pCallContext, pParams); +// nvdecctxGetMemInterMapParams: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_nvdecctxGetMemInterMapParams(struct NvdecContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_ChannelDescendant_nvdecctxGetSwMethods(struct NvdecContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_NvdecContext_ChannelDescendant.offset), ppMethods, pNumMethods); +// nvdecctxGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_nvdecctxGetMemoryMappingDescriptor(struct NvdecContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvdecContext_RmResource.offset), ppMemDesc); } -static NvHandle __nvoc_thunk_GpuResource_nvdecctxGetInternalObjectHandle(struct NvdecContext *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset)); +// nvdecctxControlSerialization_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_nvdecctxControlSerialization_Prologue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_nvdecctxControl(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pCallContext, pParams); +// nvdecctxControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_nvdecctxControlSerialization_Epilogue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_nvdecctxUnmap(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pCallContext, pCpuMapping); +// nvdecctxControl_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_nvdecctxControl_Prologue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_nvdecctxGetMemInterMapParams(struct NvdecContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pParams); +// nvdecctxControl_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_nvdecctxControl_Epilogue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_nvdecctxGetMemoryMappingDescriptor(struct NvdecContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_NvdecContext_RmResource.offset), ppMemDesc); +// nvdecctxCanCopy: virtual inherited (res) base (chandes) +static NvBool __nvoc_up_thunk_RsResource_nvdecctxCanCopy(struct NvdecContext *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RsResource.offset)); } -static NvBool __nvoc_thunk_ChannelDescendant_nvdecctxIsSwMethodStalling(struct NvdecContext *pChannelDescendant, NvU32 hHandle) { - return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_NvdecContext_ChannelDescendant.offset), hHandle); +// nvdecctxIsDuplicate: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_nvdecctxIsDuplicate(struct NvdecContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_nvdecctxControlFilter(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), pCallContext, pParams); +// nvdecctxPreDestruct: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_nvdecctxPreDestruct(struct NvdecContext *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_nvdecctxUnregisterEvent(struct NvdecContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_NvdecContext_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// nvdecctxControlFilter: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_nvdecctxControlFilter(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_nvdecctxControlSerialization_Prologue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pCallContext, pParams); +// nvdecctxIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body +static NvBool __nvoc_up_thunk_RsResource_nvdecctxIsPartialUnmapSupported(struct NvdecContext *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_nvdecctxCanCopy(struct NvdecContext *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RsResource.offset)); +// nvdecctxMapTo: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_nvdecctxMapTo(struct NvdecContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RsResource_nvdecctxIsPartialUnmapSupported(struct NvdecContext *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RsResource.offset)); +// nvdecctxUnmapFrom: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_nvdecctxUnmapFrom(struct NvdecContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), pParams); } -static void __nvoc_thunk_RsResource_nvdecctxPreDestruct(struct NvdecContext *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RsResource.offset)); +// nvdecctxGetRefCount: virtual inherited (res) base (chandes) +static NvU32 __nvoc_up_thunk_RsResource_nvdecctxGetRefCount(struct NvdecContext *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_nvdecctxIsDuplicate(struct NvdecContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), hMemory, pDuplicate); +// nvdecctxAddAdditionalDependants: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_nvdecctxAddAdditionalDependants(struct RsClient *pClient, struct NvdecContext *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), pReference); } -static void __nvoc_thunk_RmResource_nvdecctxControlSerialization_Epilogue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pCallContext, pParams); +// nvdecctxGetNotificationListPtr: virtual inherited (notify) base (chandes) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_nvdecctxGetNotificationListPtr(struct NvdecContext *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvdecContext_Notifier.offset)); } -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_nvdecctxGetNotificationListPtr(struct NvdecContext *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_NvdecContext_Notifier.offset)); +// nvdecctxGetNotificationShare: virtual inherited (notify) base (chandes) +static struct NotifShare * __nvoc_up_thunk_Notifier_nvdecctxGetNotificationShare(struct NvdecContext *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvdecContext_Notifier.offset)); } -static struct NotifShare *__nvoc_thunk_Notifier_nvdecctxGetNotificationShare(struct NvdecContext *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_NvdecContext_Notifier.offset)); +// nvdecctxSetNotificationShare: virtual inherited (notify) base (chandes) +static void __nvoc_up_thunk_Notifier_nvdecctxSetNotificationShare(struct NvdecContext *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvdecContext_Notifier.offset), pNotifShare); } -static NV_STATUS __nvoc_thunk_GpuResource_nvdecctxMap(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// nvdecctxUnregisterEvent: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_nvdecctxUnregisterEvent(struct NvdecContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvdecContext_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static NV_STATUS __nvoc_thunk_Notifier_nvdecctxGetOrAllocNotifShare(struct NvdecContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_NvdecContext_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +// nvdecctxGetOrAllocNotifShare: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_nvdecctxGetOrAllocNotifShare(struct NvdecContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvdecContext_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_NvdecContext = { /*numEntries=*/ 0, @@ -289,6 +324,7 @@ NV_STATUS __nvoc_ctor_NvdecContext(NvdecContext *pThis, RmHalspecOwner *pRmhalsp return status; } +// Vtable initialization static void __nvoc_init_funcTable_NvdecContext_1(NvdecContext *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -297,72 +333,108 @@ static void __nvoc_init_funcTable_NvdecContext_1(NvdecContext *pThis, RmHalspecO PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - pThis->__nvdecctxCheckMemInterUnmap__ = &__nvoc_thunk_ChannelDescendant_nvdecctxCheckMemInterUnmap; + // nvdecctxGetSwMethods -- virtual inherited (chandes) base (chandes) + pThis->__nvdecctxGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_nvdecctxGetSwMethods; - pThis->__nvdecctxShareCallback__ = &__nvoc_thunk_GpuResource_nvdecctxShareCallback; + // nvdecctxIsSwMethodStalling -- virtual inherited (chandes) base (chandes) + pThis->__nvdecctxIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_nvdecctxIsSwMethodStalling; - pThis->__nvdecctxAccessCallback__ = &__nvoc_thunk_RmResource_nvdecctxAccessCallback; + // nvdecctxCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) + pThis->__nvdecctxCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_nvdecctxCheckMemInterUnmap; - pThis->__nvdecctxMapTo__ = &__nvoc_thunk_RsResource_nvdecctxMapTo; + // nvdecctxControl -- virtual inherited (gpures) base (chandes) + pThis->__nvdecctxControl__ = &__nvoc_up_thunk_GpuResource_nvdecctxControl; - pThis->__nvdecctxGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_nvdecctxGetMapAddrSpace; + // nvdecctxMap -- virtual inherited (gpures) base (chandes) + pThis->__nvdecctxMap__ = &__nvoc_up_thunk_GpuResource_nvdecctxMap; - pThis->__nvdecctxSetNotificationShare__ = &__nvoc_thunk_Notifier_nvdecctxSetNotificationShare; + // nvdecctxUnmap -- virtual inherited (gpures) base (chandes) + pThis->__nvdecctxUnmap__ = &__nvoc_up_thunk_GpuResource_nvdecctxUnmap; - pThis->__nvdecctxGetRefCount__ = &__nvoc_thunk_RsResource_nvdecctxGetRefCount; + // nvdecctxShareCallback -- virtual inherited (gpures) base (chandes) + pThis->__nvdecctxShareCallback__ = &__nvoc_up_thunk_GpuResource_nvdecctxShareCallback; - pThis->__nvdecctxAddAdditionalDependants__ = &__nvoc_thunk_RsResource_nvdecctxAddAdditionalDependants; + // nvdecctxGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) + pThis->__nvdecctxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_nvdecctxGetRegBaseOffsetAndSize; - pThis->__nvdecctxControl_Prologue__ = &__nvoc_thunk_RmResource_nvdecctxControl_Prologue; + // nvdecctxGetMapAddrSpace -- virtual inherited (gpures) base (chandes) + pThis->__nvdecctxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_nvdecctxGetMapAddrSpace; - pThis->__nvdecctxGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_nvdecctxGetRegBaseOffsetAndSize; + // nvdecctxInternalControlForward -- virtual inherited (gpures) base (chandes) + pThis->__nvdecctxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_nvdecctxInternalControlForward; - pThis->__nvdecctxInternalControlForward__ = &__nvoc_thunk_GpuResource_nvdecctxInternalControlForward; + // nvdecctxGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) + pThis->__nvdecctxGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_nvdecctxGetInternalObjectHandle; - pThis->__nvdecctxUnmapFrom__ = &__nvoc_thunk_RsResource_nvdecctxUnmapFrom; + // nvdecctxAccessCallback -- virtual inherited (rmres) base (chandes) + pThis->__nvdecctxAccessCallback__ = &__nvoc_up_thunk_RmResource_nvdecctxAccessCallback; - pThis->__nvdecctxControl_Epilogue__ = &__nvoc_thunk_RmResource_nvdecctxControl_Epilogue; + // nvdecctxGetMemInterMapParams -- virtual inherited (rmres) base (chandes) + pThis->__nvdecctxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_nvdecctxGetMemInterMapParams; - pThis->__nvdecctxGetSwMethods__ = &__nvoc_thunk_ChannelDescendant_nvdecctxGetSwMethods; + // nvdecctxGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) + pThis->__nvdecctxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_nvdecctxGetMemoryMappingDescriptor; - pThis->__nvdecctxGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_nvdecctxGetInternalObjectHandle; + // nvdecctxControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__nvdecctxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_nvdecctxControlSerialization_Prologue; - pThis->__nvdecctxControl__ = &__nvoc_thunk_GpuResource_nvdecctxControl; + // nvdecctxControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__nvdecctxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_nvdecctxControlSerialization_Epilogue; - pThis->__nvdecctxUnmap__ = &__nvoc_thunk_GpuResource_nvdecctxUnmap; + // nvdecctxControl_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__nvdecctxControl_Prologue__ = &__nvoc_up_thunk_RmResource_nvdecctxControl_Prologue; - pThis->__nvdecctxGetMemInterMapParams__ = &__nvoc_thunk_RmResource_nvdecctxGetMemInterMapParams; + // nvdecctxControl_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__nvdecctxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_nvdecctxControl_Epilogue; - pThis->__nvdecctxGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_nvdecctxGetMemoryMappingDescriptor; + // nvdecctxCanCopy -- virtual inherited (res) base (chandes) + pThis->__nvdecctxCanCopy__ = &__nvoc_up_thunk_RsResource_nvdecctxCanCopy; - pThis->__nvdecctxIsSwMethodStalling__ = &__nvoc_thunk_ChannelDescendant_nvdecctxIsSwMethodStalling; + // nvdecctxIsDuplicate -- virtual inherited (res) base (chandes) + pThis->__nvdecctxIsDuplicate__ = &__nvoc_up_thunk_RsResource_nvdecctxIsDuplicate; - pThis->__nvdecctxControlFilter__ = &__nvoc_thunk_RsResource_nvdecctxControlFilter; + // nvdecctxPreDestruct -- virtual inherited (res) base (chandes) + pThis->__nvdecctxPreDestruct__ = &__nvoc_up_thunk_RsResource_nvdecctxPreDestruct; - pThis->__nvdecctxUnregisterEvent__ = &__nvoc_thunk_Notifier_nvdecctxUnregisterEvent; + // nvdecctxControlFilter -- virtual inherited (res) base (chandes) + pThis->__nvdecctxControlFilter__ = &__nvoc_up_thunk_RsResource_nvdecctxControlFilter; - pThis->__nvdecctxControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_nvdecctxControlSerialization_Prologue; + // nvdecctxIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body + pThis->__nvdecctxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_nvdecctxIsPartialUnmapSupported; - pThis->__nvdecctxCanCopy__ = &__nvoc_thunk_RsResource_nvdecctxCanCopy; + // nvdecctxMapTo -- virtual inherited (res) base (chandes) + pThis->__nvdecctxMapTo__ = &__nvoc_up_thunk_RsResource_nvdecctxMapTo; - pThis->__nvdecctxIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_nvdecctxIsPartialUnmapSupported; + // nvdecctxUnmapFrom -- virtual inherited (res) base (chandes) + pThis->__nvdecctxUnmapFrom__ = &__nvoc_up_thunk_RsResource_nvdecctxUnmapFrom; - pThis->__nvdecctxPreDestruct__ = &__nvoc_thunk_RsResource_nvdecctxPreDestruct; + // nvdecctxGetRefCount -- virtual inherited (res) base (chandes) + pThis->__nvdecctxGetRefCount__ = &__nvoc_up_thunk_RsResource_nvdecctxGetRefCount; - pThis->__nvdecctxIsDuplicate__ = &__nvoc_thunk_RsResource_nvdecctxIsDuplicate; + // nvdecctxAddAdditionalDependants -- virtual inherited (res) base (chandes) + pThis->__nvdecctxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_nvdecctxAddAdditionalDependants; - pThis->__nvdecctxControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_nvdecctxControlSerialization_Epilogue; + // nvdecctxGetNotificationListPtr -- virtual inherited (notify) base (chandes) + pThis->__nvdecctxGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_nvdecctxGetNotificationListPtr; - pThis->__nvdecctxGetNotificationListPtr__ = &__nvoc_thunk_Notifier_nvdecctxGetNotificationListPtr; + // nvdecctxGetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__nvdecctxGetNotificationShare__ = &__nvoc_up_thunk_Notifier_nvdecctxGetNotificationShare; - pThis->__nvdecctxGetNotificationShare__ = &__nvoc_thunk_Notifier_nvdecctxGetNotificationShare; + // nvdecctxSetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__nvdecctxSetNotificationShare__ = &__nvoc_up_thunk_Notifier_nvdecctxSetNotificationShare; - pThis->__nvdecctxMap__ = &__nvoc_thunk_GpuResource_nvdecctxMap; + // nvdecctxUnregisterEvent -- virtual inherited (notify) base (chandes) + pThis->__nvdecctxUnregisterEvent__ = &__nvoc_up_thunk_Notifier_nvdecctxUnregisterEvent; - pThis->__nvdecctxGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_nvdecctxGetOrAllocNotifShare; -} + // nvdecctxGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) + pThis->__nvdecctxGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_nvdecctxGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_NvdecContext_1 with approximately 32 basic block(s). + +// Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_NvdecContext(NvdecContext *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 32 per-object function pointer(s). __nvoc_init_funcTable_NvdecContext_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_nvdec_ctx_nvoc.h b/src/nvidia/generated/g_kernel_nvdec_ctx_nvoc.h index 500cba7607..b3764fd63b 100644 --- a/src/nvidia/generated/g_kernel_nvdec_ctx_nvoc.h +++ b/src/nvidia/generated/g_kernel_nvdec_ctx_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_NVDEC_CTX_NVOC_H_ #define _G_KERNEL_NVDEC_CTX_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_nvdec_ctx_nvoc.h" #ifndef KERNEL_NVDEC_CTX_H @@ -51,50 +59,59 @@ ENGDESCRIPTOR nvdecGetEngineDescFromAllocParams(OBJGPU *pGpu, NvU32 externalClas #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct NvdecContext { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; - struct NvdecContext *__nvoc_pbase_NvdecContext; - NV_STATUS (*__nvdecctxCheckMemInterUnmap__)(struct NvdecContext *, NvBool); - NvBool (*__nvdecctxShareCallback__)(struct NvdecContext *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NvBool (*__nvdecctxAccessCallback__)(struct NvdecContext *, struct RsClient *, void *, RsAccessRight); - NV_STATUS (*__nvdecctxMapTo__)(struct NvdecContext *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__nvdecctxGetMapAddrSpace__)(struct NvdecContext *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__nvdecctxSetNotificationShare__)(struct NvdecContext *, struct NotifShare *); - NvU32 (*__nvdecctxGetRefCount__)(struct NvdecContext *); - void (*__nvdecctxAddAdditionalDependants__)(struct RsClient *, struct NvdecContext *, RsResourceRef *); - NV_STATUS (*__nvdecctxControl_Prologue__)(struct NvdecContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nvdecctxGetRegBaseOffsetAndSize__)(struct NvdecContext *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__nvdecctxInternalControlForward__)(struct NvdecContext *, NvU32, void *, NvU32); - NV_STATUS (*__nvdecctxUnmapFrom__)(struct NvdecContext *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__nvdecctxControl_Epilogue__)(struct NvdecContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nvdecctxGetSwMethods__)(struct NvdecContext *, const METHOD **, NvU32 *); - NvHandle (*__nvdecctxGetInternalObjectHandle__)(struct NvdecContext *); - NV_STATUS (*__nvdecctxControl__)(struct NvdecContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nvdecctxUnmap__)(struct NvdecContext *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__nvdecctxGetMemInterMapParams__)(struct NvdecContext *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__nvdecctxGetMemoryMappingDescriptor__)(struct NvdecContext *, struct MEMORY_DESCRIPTOR **); - NvBool (*__nvdecctxIsSwMethodStalling__)(struct NvdecContext *, NvU32); - NV_STATUS (*__nvdecctxControlFilter__)(struct NvdecContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nvdecctxUnregisterEvent__)(struct NvdecContext *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__nvdecctxControlSerialization_Prologue__)(struct NvdecContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__nvdecctxCanCopy__)(struct NvdecContext *); - NvBool (*__nvdecctxIsPartialUnmapSupported__)(struct NvdecContext *); - void (*__nvdecctxPreDestruct__)(struct NvdecContext *); - NV_STATUS (*__nvdecctxIsDuplicate__)(struct NvdecContext *, NvHandle, NvBool *); - void (*__nvdecctxControlSerialization_Epilogue__)(struct NvdecContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__nvdecctxGetNotificationListPtr__)(struct NvdecContext *); - struct NotifShare *(*__nvdecctxGetNotificationShare__)(struct NvdecContext *); - NV_STATUS (*__nvdecctxMap__)(struct NvdecContext *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NV_STATUS (*__nvdecctxGetOrAllocNotifShare__)(struct NvdecContext *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super^2 + struct INotifier *__nvoc_pbase_INotifier; // inotify super^3 + struct Notifier *__nvoc_pbase_Notifier; // notify super^2 + struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super + struct NvdecContext *__nvoc_pbase_NvdecContext; // nvdecctx + + // Vtable with 32 per-object function pointers + NV_STATUS (*__nvdecctxGetSwMethods__)(struct NvdecContext * /*this*/, const METHOD **, NvU32 *); // virtual inherited (chandes) base (chandes) + NvBool (*__nvdecctxIsSwMethodStalling__)(struct NvdecContext * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__nvdecctxCheckMemInterUnmap__)(struct NvdecContext * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__nvdecctxControl__)(struct NvdecContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__nvdecctxMap__)(struct NvdecContext * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__nvdecctxUnmap__)(struct NvdecContext * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NvBool (*__nvdecctxShareCallback__)(struct NvdecContext * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__nvdecctxGetRegBaseOffsetAndSize__)(struct NvdecContext * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__nvdecctxGetMapAddrSpace__)(struct NvdecContext * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__nvdecctxInternalControlForward__)(struct NvdecContext * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (chandes) + NvHandle (*__nvdecctxGetInternalObjectHandle__)(struct NvdecContext * /*this*/); // virtual inherited (gpures) base (chandes) + NvBool (*__nvdecctxAccessCallback__)(struct NvdecContext * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__nvdecctxGetMemInterMapParams__)(struct NvdecContext * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__nvdecctxGetMemoryMappingDescriptor__)(struct NvdecContext * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__nvdecctxControlSerialization_Prologue__)(struct NvdecContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__nvdecctxControlSerialization_Epilogue__)(struct NvdecContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__nvdecctxControl_Prologue__)(struct NvdecContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__nvdecctxControl_Epilogue__)(struct NvdecContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NvBool (*__nvdecctxCanCopy__)(struct NvdecContext * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__nvdecctxIsDuplicate__)(struct NvdecContext * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (chandes) + void (*__nvdecctxPreDestruct__)(struct NvdecContext * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__nvdecctxControlFilter__)(struct NvdecContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (chandes) + NvBool (*__nvdecctxIsPartialUnmapSupported__)(struct NvdecContext * /*this*/); // inline virtual inherited (res) base (chandes) body + NV_STATUS (*__nvdecctxMapTo__)(struct NvdecContext * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (chandes) + NV_STATUS (*__nvdecctxUnmapFrom__)(struct NvdecContext * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (chandes) + NvU32 (*__nvdecctxGetRefCount__)(struct NvdecContext * /*this*/); // virtual inherited (res) base (chandes) + void (*__nvdecctxAddAdditionalDependants__)(struct RsClient *, struct NvdecContext * /*this*/, RsResourceRef *); // virtual inherited (res) base (chandes) + PEVENTNOTIFICATION * (*__nvdecctxGetNotificationListPtr__)(struct NvdecContext * /*this*/); // virtual inherited (notify) base (chandes) + struct NotifShare * (*__nvdecctxGetNotificationShare__)(struct NvdecContext * /*this*/); // virtual inherited (notify) base (chandes) + void (*__nvdecctxSetNotificationShare__)(struct NvdecContext * /*this*/, struct NotifShare *); // virtual inherited (notify) base (chandes) + NV_STATUS (*__nvdecctxUnregisterEvent__)(struct NvdecContext * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (chandes) + NV_STATUS (*__nvdecctxGetOrAllocNotifShare__)(struct NvdecContext * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (chandes) }; #ifndef __NVOC_CLASS_NvdecContext_TYPEDEF__ @@ -106,6 +123,7 @@ typedef struct NvdecContext NvdecContext; #define __nvoc_class_id_NvdecContext 0x70d2be #endif /* __nvoc_class_id_NvdecContext */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_NvdecContext; #define __staticCast_NvdecContext(pThis) \ @@ -118,138 +136,126 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_NvdecContext; ((NvdecContext*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(NvdecContext))) #endif //__nvoc_kernel_nvdec_ctx_h_disabled - NV_STATUS __nvoc_objCreateDynamic_NvdecContext(NvdecContext**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_NvdecContext(NvdecContext**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_NvdecContext(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_NvdecContext((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define nvdecctxGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ +#define nvdecctxGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) nvdecctxGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) +#define nvdecctxIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define nvdecctxIsSwMethodStalling(pChannelDescendant, hHandle) nvdecctxIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) +#define nvdecctxCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ #define nvdecctxCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) nvdecctxCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) +#define nvdecctxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define nvdecctxControl(pGpuResource, pCallContext, pParams) nvdecctxControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define nvdecctxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define nvdecctxMap(pGpuResource, pCallContext, pParams, pCpuMapping) nvdecctxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define nvdecctxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define nvdecctxUnmap(pGpuResource, pCallContext, pCpuMapping) nvdecctxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define nvdecctxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ #define nvdecctxShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) nvdecctxShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define nvdecctxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) nvdecctxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define nvdecctxMapTo(pResource, pParams) nvdecctxMapTo_DISPATCH(pResource, pParams) -#define nvdecctxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) nvdecctxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define nvdecctxSetNotificationShare(pNotifier, pNotifShare) nvdecctxSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define nvdecctxGetRefCount(pResource) nvdecctxGetRefCount_DISPATCH(pResource) -#define nvdecctxAddAdditionalDependants(pClient, pResource, pReference) nvdecctxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define nvdecctxControl_Prologue(pResource, pCallContext, pParams) nvdecctxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define nvdecctxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define nvdecctxGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) nvdecctxGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define nvdecctxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define nvdecctxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) nvdecctxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define nvdecctxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define nvdecctxInternalControlForward(pGpuResource, command, pParams, size) nvdecctxInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define nvdecctxUnmapFrom(pResource, pParams) nvdecctxUnmapFrom_DISPATCH(pResource, pParams) -#define nvdecctxControl_Epilogue(pResource, pCallContext, pParams) nvdecctxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define nvdecctxGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) nvdecctxGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) +#define nvdecctxGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define nvdecctxGetInternalObjectHandle(pGpuResource) nvdecctxGetInternalObjectHandle_DISPATCH(pGpuResource) -#define nvdecctxControl(pGpuResource, pCallContext, pParams) nvdecctxControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define nvdecctxUnmap(pGpuResource, pCallContext, pCpuMapping) nvdecctxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define nvdecctxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define nvdecctxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) nvdecctxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define nvdecctxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define nvdecctxGetMemInterMapParams(pRmResource, pParams) nvdecctxGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define nvdecctxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define nvdecctxGetMemoryMappingDescriptor(pRmResource, ppMemDesc) nvdecctxGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define nvdecctxIsSwMethodStalling(pChannelDescendant, hHandle) nvdecctxIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define nvdecctxControlFilter(pResource, pCallContext, pParams) nvdecctxControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define nvdecctxUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) nvdecctxUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define nvdecctxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define nvdecctxControlSerialization_Prologue(pResource, pCallContext, pParams) nvdecctxControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define nvdecctxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define nvdecctxControlSerialization_Epilogue(pResource, pCallContext, pParams) nvdecctxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define nvdecctxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define nvdecctxControl_Prologue(pResource, pCallContext, pParams) nvdecctxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define nvdecctxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define nvdecctxControl_Epilogue(pResource, pCallContext, pParams) nvdecctxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define nvdecctxCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define nvdecctxCanCopy(pResource) nvdecctxCanCopy_DISPATCH(pResource) -#define nvdecctxIsPartialUnmapSupported(pResource) nvdecctxIsPartialUnmapSupported_DISPATCH(pResource) -#define nvdecctxPreDestruct(pResource) nvdecctxPreDestruct_DISPATCH(pResource) +#define nvdecctxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define nvdecctxIsDuplicate(pResource, hMemory, pDuplicate) nvdecctxIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define nvdecctxControlSerialization_Epilogue(pResource, pCallContext, pParams) nvdecctxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define nvdecctxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define nvdecctxPreDestruct(pResource) nvdecctxPreDestruct_DISPATCH(pResource) +#define nvdecctxControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define nvdecctxControlFilter(pResource, pCallContext, pParams) nvdecctxControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define nvdecctxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define nvdecctxIsPartialUnmapSupported(pResource) nvdecctxIsPartialUnmapSupported_DISPATCH(pResource) +#define nvdecctxMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define nvdecctxMapTo(pResource, pParams) nvdecctxMapTo_DISPATCH(pResource, pParams) +#define nvdecctxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define nvdecctxUnmapFrom(pResource, pParams) nvdecctxUnmapFrom_DISPATCH(pResource, pParams) +#define nvdecctxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define nvdecctxGetRefCount(pResource) nvdecctxGetRefCount_DISPATCH(pResource) +#define nvdecctxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define nvdecctxAddAdditionalDependants(pClient, pResource, pReference) nvdecctxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define nvdecctxGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define nvdecctxGetNotificationListPtr(pNotifier) nvdecctxGetNotificationListPtr_DISPATCH(pNotifier) +#define nvdecctxGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ #define nvdecctxGetNotificationShare(pNotifier) nvdecctxGetNotificationShare_DISPATCH(pNotifier) -#define nvdecctxMap(pGpuResource, pCallContext, pParams, pCpuMapping) nvdecctxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define nvdecctxSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define nvdecctxSetNotificationShare(pNotifier, pNotifShare) nvdecctxSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define nvdecctxUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define nvdecctxUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) nvdecctxUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define nvdecctxGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ #define nvdecctxGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) nvdecctxGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -NV_STATUS nvdecctxConstructHal_KERNEL(struct NvdecContext *pNvdecContext, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); - -#ifdef __nvoc_kernel_nvdec_ctx_h_disabled -static inline NV_STATUS nvdecctxConstructHal(struct NvdecContext *pNvdecContext, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - NV_ASSERT_FAILED_PRECOMP("NvdecContext was disabled!"); - return NV_ERR_NOT_SUPPORTED; +// Dispatch functions +static inline NV_STATUS nvdecctxGetSwMethods_DISPATCH(struct NvdecContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { + return pChannelDescendant->__nvdecctxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); } -#else //__nvoc_kernel_nvdec_ctx_h_disabled -#define nvdecctxConstructHal(pNvdecContext, pCallContext, pParams) nvdecctxConstructHal_KERNEL(pNvdecContext, pCallContext, pParams) -#endif //__nvoc_kernel_nvdec_ctx_h_disabled -#define nvdecctxConstructHal_HAL(pNvdecContext, pCallContext, pParams) nvdecctxConstructHal(pNvdecContext, pCallContext, pParams) - -void nvdecctxDestructHal_KERNEL(struct NvdecContext *pNvdecContext); - - -#ifdef __nvoc_kernel_nvdec_ctx_h_disabled -static inline void nvdecctxDestructHal(struct NvdecContext *pNvdecContext) { - NV_ASSERT_FAILED_PRECOMP("NvdecContext was disabled!"); +static inline NvBool nvdecctxIsSwMethodStalling_DISPATCH(struct NvdecContext *pChannelDescendant, NvU32 hHandle) { + return pChannelDescendant->__nvdecctxIsSwMethodStalling__(pChannelDescendant, hHandle); } -#else //__nvoc_kernel_nvdec_ctx_h_disabled -#define nvdecctxDestructHal(pNvdecContext) nvdecctxDestructHal_KERNEL(pNvdecContext) -#endif //__nvoc_kernel_nvdec_ctx_h_disabled - -#define nvdecctxDestructHal_HAL(pNvdecContext) nvdecctxDestructHal(pNvdecContext) static inline NV_STATUS nvdecctxCheckMemInterUnmap_DISPATCH(struct NvdecContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { return pChannelDescendant->__nvdecctxCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } -static inline NvBool nvdecctxShareCallback_DISPATCH(struct NvdecContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__nvdecctxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NvBool nvdecctxAccessCallback_DISPATCH(struct NvdecContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__nvdecctxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} - -static inline NV_STATUS nvdecctxMapTo_DISPATCH(struct NvdecContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__nvdecctxMapTo__(pResource, pParams); -} - -static inline NV_STATUS nvdecctxGetMapAddrSpace_DISPATCH(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__nvdecctxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); -} - -static inline void nvdecctxSetNotificationShare_DISPATCH(struct NvdecContext *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__nvdecctxSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS nvdecctxControl_DISPATCH(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__nvdecctxControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 nvdecctxGetRefCount_DISPATCH(struct NvdecContext *pResource) { - return pResource->__nvdecctxGetRefCount__(pResource); +static inline NV_STATUS nvdecctxMap_DISPATCH(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__nvdecctxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void nvdecctxAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct NvdecContext *pResource, RsResourceRef *pReference) { - pResource->__nvdecctxAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS nvdecctxUnmap_DISPATCH(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__nvdecctxUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS nvdecctxControl_Prologue_DISPATCH(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvdecctxControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool nvdecctxShareCallback_DISPATCH(struct NvdecContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__nvdecctxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS nvdecctxGetRegBaseOffsetAndSize_DISPATCH(struct NvdecContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__nvdecctxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS nvdecctxInternalControlForward_DISPATCH(struct NvdecContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__nvdecctxInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS nvdecctxUnmapFrom_DISPATCH(struct NvdecContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__nvdecctxUnmapFrom__(pResource, pParams); -} - -static inline void nvdecctxControl_Epilogue_DISPATCH(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nvdecctxControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS nvdecctxGetMapAddrSpace_DISPATCH(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__nvdecctxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NV_STATUS nvdecctxGetSwMethods_DISPATCH(struct NvdecContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return pChannelDescendant->__nvdecctxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); +static inline NV_STATUS nvdecctxInternalControlForward_DISPATCH(struct NvdecContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__nvdecctxInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle nvdecctxGetInternalObjectHandle_DISPATCH(struct NvdecContext *pGpuResource) { return pGpuResource->__nvdecctxGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS nvdecctxControl_DISPATCH(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__nvdecctxControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS nvdecctxUnmap_DISPATCH(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__nvdecctxUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool nvdecctxAccessCallback_DISPATCH(struct NvdecContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__nvdecctxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS nvdecctxGetMemInterMapParams_DISPATCH(struct NvdecContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { @@ -260,58 +266,105 @@ static inline NV_STATUS nvdecctxGetMemoryMappingDescriptor_DISPATCH(struct Nvdec return pRmResource->__nvdecctxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NvBool nvdecctxIsSwMethodStalling_DISPATCH(struct NvdecContext *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__nvdecctxIsSwMethodStalling__(pChannelDescendant, hHandle); +static inline NV_STATUS nvdecctxControlSerialization_Prologue_DISPATCH(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__nvdecctxControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS nvdecctxControlFilter_DISPATCH(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvdecctxControlFilter__(pResource, pCallContext, pParams); +static inline void nvdecctxControlSerialization_Epilogue_DISPATCH(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__nvdecctxControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS nvdecctxUnregisterEvent_DISPATCH(struct NvdecContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__nvdecctxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline NV_STATUS nvdecctxControl_Prologue_DISPATCH(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__nvdecctxControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS nvdecctxControlSerialization_Prologue_DISPATCH(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvdecctxControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline void nvdecctxControl_Epilogue_DISPATCH(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__nvdecctxControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool nvdecctxCanCopy_DISPATCH(struct NvdecContext *pResource) { return pResource->__nvdecctxCanCopy__(pResource); } -static inline NvBool nvdecctxIsPartialUnmapSupported_DISPATCH(struct NvdecContext *pResource) { - return pResource->__nvdecctxIsPartialUnmapSupported__(pResource); +static inline NV_STATUS nvdecctxIsDuplicate_DISPATCH(struct NvdecContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__nvdecctxIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void nvdecctxPreDestruct_DISPATCH(struct NvdecContext *pResource) { pResource->__nvdecctxPreDestruct__(pResource); } -static inline NV_STATUS nvdecctxIsDuplicate_DISPATCH(struct NvdecContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__nvdecctxIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS nvdecctxControlFilter_DISPATCH(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__nvdecctxControlFilter__(pResource, pCallContext, pParams); } -static inline void nvdecctxControlSerialization_Epilogue_DISPATCH(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nvdecctxControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool nvdecctxIsPartialUnmapSupported_DISPATCH(struct NvdecContext *pResource) { + return pResource->__nvdecctxIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS nvdecctxMapTo_DISPATCH(struct NvdecContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__nvdecctxMapTo__(pResource, pParams); +} + +static inline NV_STATUS nvdecctxUnmapFrom_DISPATCH(struct NvdecContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__nvdecctxUnmapFrom__(pResource, pParams); +} + +static inline NvU32 nvdecctxGetRefCount_DISPATCH(struct NvdecContext *pResource) { + return pResource->__nvdecctxGetRefCount__(pResource); } -static inline PEVENTNOTIFICATION *nvdecctxGetNotificationListPtr_DISPATCH(struct NvdecContext *pNotifier) { +static inline void nvdecctxAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct NvdecContext *pResource, RsResourceRef *pReference) { + pResource->__nvdecctxAddAdditionalDependants__(pClient, pResource, pReference); +} + +static inline PEVENTNOTIFICATION * nvdecctxGetNotificationListPtr_DISPATCH(struct NvdecContext *pNotifier) { return pNotifier->__nvdecctxGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *nvdecctxGetNotificationShare_DISPATCH(struct NvdecContext *pNotifier) { +static inline struct NotifShare * nvdecctxGetNotificationShare_DISPATCH(struct NvdecContext *pNotifier) { return pNotifier->__nvdecctxGetNotificationShare__(pNotifier); } -static inline NV_STATUS nvdecctxMap_DISPATCH(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__nvdecctxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void nvdecctxSetNotificationShare_DISPATCH(struct NvdecContext *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__nvdecctxSetNotificationShare__(pNotifier, pNotifShare); +} + +static inline NV_STATUS nvdecctxUnregisterEvent_DISPATCH(struct NvdecContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__nvdecctxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS nvdecctxGetOrAllocNotifShare_DISPATCH(struct NvdecContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return pNotifier->__nvdecctxGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } +NV_STATUS nvdecctxConstructHal_KERNEL(struct NvdecContext *pNvdecContext, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); + + +#ifdef __nvoc_kernel_nvdec_ctx_h_disabled +static inline NV_STATUS nvdecctxConstructHal(struct NvdecContext *pNvdecContext, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + NV_ASSERT_FAILED_PRECOMP("NvdecContext was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kernel_nvdec_ctx_h_disabled +#define nvdecctxConstructHal(pNvdecContext, pCallContext, pParams) nvdecctxConstructHal_KERNEL(pNvdecContext, pCallContext, pParams) +#endif //__nvoc_kernel_nvdec_ctx_h_disabled + +#define nvdecctxConstructHal_HAL(pNvdecContext, pCallContext, pParams) nvdecctxConstructHal(pNvdecContext, pCallContext, pParams) + +void nvdecctxDestructHal_KERNEL(struct NvdecContext *pNvdecContext); + + +#ifdef __nvoc_kernel_nvdec_ctx_h_disabled +static inline void nvdecctxDestructHal(struct NvdecContext *pNvdecContext) { + NV_ASSERT_FAILED_PRECOMP("NvdecContext was disabled!"); +} +#else //__nvoc_kernel_nvdec_ctx_h_disabled +#define nvdecctxDestructHal(pNvdecContext) nvdecctxDestructHal_KERNEL(pNvdecContext) +#endif //__nvoc_kernel_nvdec_ctx_h_disabled + +#define nvdecctxDestructHal_HAL(pNvdecContext) nvdecctxDestructHal(pNvdecContext) + static inline NV_STATUS __nvoc_nvdecctxConstruct(struct NvdecContext *arg_pNvdecContext, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams) { return nvdecctxConstructHal(arg_pNvdecContext, arg_pCallContext, arg_pParams); } diff --git a/src/nvidia/generated/g_kernel_nvenc_ctx_nvoc.c b/src/nvidia/generated/g_kernel_nvenc_ctx_nvoc.c index 70b0ecc5d4..f7df4b3825 100644 --- a/src/nvidia/generated/g_kernel_nvenc_ctx_nvoc.c +++ b/src/nvidia/generated/g_kernel_nvenc_ctx_nvoc.c @@ -120,134 +120,169 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MsencContext = /*pExportInfo=*/ &__nvoc_export_info_MsencContext }; -static NV_STATUS __nvoc_thunk_ChannelDescendant_msencctxCheckMemInterUnmap(struct MsencContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_MsencContext_ChannelDescendant.offset), bSubdeviceHandleProvided); +// 32 up-thunk(s) defined to bridge methods in MsencContext to superclasses + +// msencctxGetSwMethods: virtual inherited (chandes) base (chandes) +static NV_STATUS __nvoc_up_thunk_ChannelDescendant_msencctxGetSwMethods(struct MsencContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { + return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_MsencContext_ChannelDescendant.offset), ppMethods, pNumMethods); } -static NvBool __nvoc_thunk_GpuResource_msencctxShareCallback(struct MsencContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// msencctxIsSwMethodStalling: virtual inherited (chandes) base (chandes) +static NvBool __nvoc_up_thunk_ChannelDescendant_msencctxIsSwMethodStalling(struct MsencContext *pChannelDescendant, NvU32 hHandle) { + return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_MsencContext_ChannelDescendant.offset), hHandle); } -static NvBool __nvoc_thunk_RmResource_msencctxAccessCallback(struct MsencContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MsencContext_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// msencctxCheckMemInterUnmap: virtual inherited (chandes) base (chandes) +static NV_STATUS __nvoc_up_thunk_ChannelDescendant_msencctxCheckMemInterUnmap(struct MsencContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { + return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_MsencContext_ChannelDescendant.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RsResource_msencctxMapTo(struct MsencContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MsencContext_RsResource.offset), pParams); +// msencctxControl: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_msencctxControl(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_msencctxGetMapAddrSpace(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// msencctxMap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_msencctxMap(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static void __nvoc_thunk_Notifier_msencctxSetNotificationShare(struct MsencContext *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_MsencContext_Notifier.offset), pNotifShare); +// msencctxUnmap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_msencctxUnmap(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), pCallContext, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_msencctxGetRefCount(struct MsencContext *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MsencContext_RsResource.offset)); +// msencctxShareCallback: virtual inherited (gpures) base (chandes) +static NvBool __nvoc_up_thunk_GpuResource_msencctxShareCallback(struct MsencContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static void __nvoc_thunk_RsResource_msencctxAddAdditionalDependants(struct RsClient *pClient, struct MsencContext *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MsencContext_RsResource.offset), pReference); +// msencctxGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_msencctxGetRegBaseOffsetAndSize(struct MsencContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_RmResource_msencctxControl_Prologue(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MsencContext_RmResource.offset), pCallContext, pParams); +// msencctxGetMapAddrSpace: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_msencctxGetMapAddrSpace(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_GpuResource_msencctxGetRegBaseOffsetAndSize(struct MsencContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), pGpu, pOffset, pSize); +// msencctxInternalControlForward: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_msencctxInternalControlForward(struct MsencContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_GpuResource_msencctxInternalControlForward(struct MsencContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), command, pParams, size); +// msencctxGetInternalObjectHandle: virtual inherited (gpures) base (chandes) +static NvHandle __nvoc_up_thunk_GpuResource_msencctxGetInternalObjectHandle(struct MsencContext *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_msencctxUnmapFrom(struct MsencContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MsencContext_RsResource.offset), pParams); +// msencctxAccessCallback: virtual inherited (rmres) base (chandes) +static NvBool __nvoc_up_thunk_RmResource_msencctxAccessCallback(struct MsencContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static void __nvoc_thunk_RmResource_msencctxControl_Epilogue(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MsencContext_RmResource.offset), pCallContext, pParams); +// msencctxGetMemInterMapParams: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_msencctxGetMemInterMapParams(struct MsencContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MsencContext_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_ChannelDescendant_msencctxGetSwMethods(struct MsencContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_MsencContext_ChannelDescendant.offset), ppMethods, pNumMethods); +// msencctxGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_msencctxGetMemoryMappingDescriptor(struct MsencContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MsencContext_RmResource.offset), ppMemDesc); } -static NvHandle __nvoc_thunk_GpuResource_msencctxGetInternalObjectHandle(struct MsencContext *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset)); +// msencctxControlSerialization_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_msencctxControlSerialization_Prologue(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_msencctxControl(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), pCallContext, pParams); +// msencctxControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_msencctxControlSerialization_Epilogue(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_msencctxUnmap(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), pCallContext, pCpuMapping); +// msencctxControl_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_msencctxControl_Prologue(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_msencctxGetMemInterMapParams(struct MsencContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MsencContext_RmResource.offset), pParams); +// msencctxControl_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_msencctxControl_Epilogue(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_msencctxGetMemoryMappingDescriptor(struct MsencContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MsencContext_RmResource.offset), ppMemDesc); +// msencctxCanCopy: virtual inherited (res) base (chandes) +static NvBool __nvoc_up_thunk_RsResource_msencctxCanCopy(struct MsencContext *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RsResource.offset)); } -static NvBool __nvoc_thunk_ChannelDescendant_msencctxIsSwMethodStalling(struct MsencContext *pChannelDescendant, NvU32 hHandle) { - return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_MsencContext_ChannelDescendant.offset), hHandle); +// msencctxIsDuplicate: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_msencctxIsDuplicate(struct MsencContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_msencctxControlFilter(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MsencContext_RsResource.offset), pCallContext, pParams); +// msencctxPreDestruct: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_msencctxPreDestruct(struct MsencContext *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_msencctxUnregisterEvent(struct MsencContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_MsencContext_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// msencctxControlFilter: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_msencctxControlFilter(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_msencctxControlSerialization_Prologue(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MsencContext_RmResource.offset), pCallContext, pParams); +// msencctxIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body +static NvBool __nvoc_up_thunk_RsResource_msencctxIsPartialUnmapSupported(struct MsencContext *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_msencctxCanCopy(struct MsencContext *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MsencContext_RsResource.offset)); +// msencctxMapTo: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_msencctxMapTo(struct MsencContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RsResource_msencctxIsPartialUnmapSupported(struct MsencContext *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MsencContext_RsResource.offset)); +// msencctxUnmapFrom: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_msencctxUnmapFrom(struct MsencContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RsResource.offset), pParams); } -static void __nvoc_thunk_RsResource_msencctxPreDestruct(struct MsencContext *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MsencContext_RsResource.offset)); +// msencctxGetRefCount: virtual inherited (res) base (chandes) +static NvU32 __nvoc_up_thunk_RsResource_msencctxGetRefCount(struct MsencContext *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_msencctxIsDuplicate(struct MsencContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MsencContext_RsResource.offset), hMemory, pDuplicate); +// msencctxAddAdditionalDependants: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_msencctxAddAdditionalDependants(struct RsClient *pClient, struct MsencContext *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RsResource.offset), pReference); } -static void __nvoc_thunk_RmResource_msencctxControlSerialization_Epilogue(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MsencContext_RmResource.offset), pCallContext, pParams); +// msencctxGetNotificationListPtr: virtual inherited (notify) base (chandes) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_msencctxGetNotificationListPtr(struct MsencContext *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_MsencContext_Notifier.offset)); } -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_msencctxGetNotificationListPtr(struct MsencContext *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_MsencContext_Notifier.offset)); +// msencctxGetNotificationShare: virtual inherited (notify) base (chandes) +static struct NotifShare * __nvoc_up_thunk_Notifier_msencctxGetNotificationShare(struct MsencContext *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_MsencContext_Notifier.offset)); } -static struct NotifShare *__nvoc_thunk_Notifier_msencctxGetNotificationShare(struct MsencContext *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_MsencContext_Notifier.offset)); +// msencctxSetNotificationShare: virtual inherited (notify) base (chandes) +static void __nvoc_up_thunk_Notifier_msencctxSetNotificationShare(struct MsencContext *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_MsencContext_Notifier.offset), pNotifShare); } -static NV_STATUS __nvoc_thunk_GpuResource_msencctxMap(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// msencctxUnregisterEvent: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_msencctxUnregisterEvent(struct MsencContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_MsencContext_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static NV_STATUS __nvoc_thunk_Notifier_msencctxGetOrAllocNotifShare(struct MsencContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_MsencContext_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +// msencctxGetOrAllocNotifShare: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_msencctxGetOrAllocNotifShare(struct MsencContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_MsencContext_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_MsencContext = { /*numEntries=*/ 0, @@ -289,6 +324,7 @@ NV_STATUS __nvoc_ctor_MsencContext(MsencContext *pThis, RmHalspecOwner *pRmhalsp return status; } +// Vtable initialization static void __nvoc_init_funcTable_MsencContext_1(MsencContext *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -297,72 +333,108 @@ static void __nvoc_init_funcTable_MsencContext_1(MsencContext *pThis, RmHalspecO PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - pThis->__msencctxCheckMemInterUnmap__ = &__nvoc_thunk_ChannelDescendant_msencctxCheckMemInterUnmap; + // msencctxGetSwMethods -- virtual inherited (chandes) base (chandes) + pThis->__msencctxGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_msencctxGetSwMethods; - pThis->__msencctxShareCallback__ = &__nvoc_thunk_GpuResource_msencctxShareCallback; + // msencctxIsSwMethodStalling -- virtual inherited (chandes) base (chandes) + pThis->__msencctxIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_msencctxIsSwMethodStalling; - pThis->__msencctxAccessCallback__ = &__nvoc_thunk_RmResource_msencctxAccessCallback; + // msencctxCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) + pThis->__msencctxCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_msencctxCheckMemInterUnmap; - pThis->__msencctxMapTo__ = &__nvoc_thunk_RsResource_msencctxMapTo; + // msencctxControl -- virtual inherited (gpures) base (chandes) + pThis->__msencctxControl__ = &__nvoc_up_thunk_GpuResource_msencctxControl; - pThis->__msencctxGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_msencctxGetMapAddrSpace; + // msencctxMap -- virtual inherited (gpures) base (chandes) + pThis->__msencctxMap__ = &__nvoc_up_thunk_GpuResource_msencctxMap; - pThis->__msencctxSetNotificationShare__ = &__nvoc_thunk_Notifier_msencctxSetNotificationShare; + // msencctxUnmap -- virtual inherited (gpures) base (chandes) + pThis->__msencctxUnmap__ = &__nvoc_up_thunk_GpuResource_msencctxUnmap; - pThis->__msencctxGetRefCount__ = &__nvoc_thunk_RsResource_msencctxGetRefCount; + // msencctxShareCallback -- virtual inherited (gpures) base (chandes) + pThis->__msencctxShareCallback__ = &__nvoc_up_thunk_GpuResource_msencctxShareCallback; - pThis->__msencctxAddAdditionalDependants__ = &__nvoc_thunk_RsResource_msencctxAddAdditionalDependants; + // msencctxGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) + pThis->__msencctxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_msencctxGetRegBaseOffsetAndSize; - pThis->__msencctxControl_Prologue__ = &__nvoc_thunk_RmResource_msencctxControl_Prologue; + // msencctxGetMapAddrSpace -- virtual inherited (gpures) base (chandes) + pThis->__msencctxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_msencctxGetMapAddrSpace; - pThis->__msencctxGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_msencctxGetRegBaseOffsetAndSize; + // msencctxInternalControlForward -- virtual inherited (gpures) base (chandes) + pThis->__msencctxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_msencctxInternalControlForward; - pThis->__msencctxInternalControlForward__ = &__nvoc_thunk_GpuResource_msencctxInternalControlForward; + // msencctxGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) + pThis->__msencctxGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_msencctxGetInternalObjectHandle; - pThis->__msencctxUnmapFrom__ = &__nvoc_thunk_RsResource_msencctxUnmapFrom; + // msencctxAccessCallback -- virtual inherited (rmres) base (chandes) + pThis->__msencctxAccessCallback__ = &__nvoc_up_thunk_RmResource_msencctxAccessCallback; - pThis->__msencctxControl_Epilogue__ = &__nvoc_thunk_RmResource_msencctxControl_Epilogue; + // msencctxGetMemInterMapParams -- virtual inherited (rmres) base (chandes) + pThis->__msencctxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_msencctxGetMemInterMapParams; - pThis->__msencctxGetSwMethods__ = &__nvoc_thunk_ChannelDescendant_msencctxGetSwMethods; + // msencctxGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) + pThis->__msencctxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_msencctxGetMemoryMappingDescriptor; - pThis->__msencctxGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_msencctxGetInternalObjectHandle; + // msencctxControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__msencctxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_msencctxControlSerialization_Prologue; - pThis->__msencctxControl__ = &__nvoc_thunk_GpuResource_msencctxControl; + // msencctxControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__msencctxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_msencctxControlSerialization_Epilogue; - pThis->__msencctxUnmap__ = &__nvoc_thunk_GpuResource_msencctxUnmap; + // msencctxControl_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__msencctxControl_Prologue__ = &__nvoc_up_thunk_RmResource_msencctxControl_Prologue; - pThis->__msencctxGetMemInterMapParams__ = &__nvoc_thunk_RmResource_msencctxGetMemInterMapParams; + // msencctxControl_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__msencctxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_msencctxControl_Epilogue; - pThis->__msencctxGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_msencctxGetMemoryMappingDescriptor; + // msencctxCanCopy -- virtual inherited (res) base (chandes) + pThis->__msencctxCanCopy__ = &__nvoc_up_thunk_RsResource_msencctxCanCopy; - pThis->__msencctxIsSwMethodStalling__ = &__nvoc_thunk_ChannelDescendant_msencctxIsSwMethodStalling; + // msencctxIsDuplicate -- virtual inherited (res) base (chandes) + pThis->__msencctxIsDuplicate__ = &__nvoc_up_thunk_RsResource_msencctxIsDuplicate; - pThis->__msencctxControlFilter__ = &__nvoc_thunk_RsResource_msencctxControlFilter; + // msencctxPreDestruct -- virtual inherited (res) base (chandes) + pThis->__msencctxPreDestruct__ = &__nvoc_up_thunk_RsResource_msencctxPreDestruct; - pThis->__msencctxUnregisterEvent__ = &__nvoc_thunk_Notifier_msencctxUnregisterEvent; + // msencctxControlFilter -- virtual inherited (res) base (chandes) + pThis->__msencctxControlFilter__ = &__nvoc_up_thunk_RsResource_msencctxControlFilter; - pThis->__msencctxControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_msencctxControlSerialization_Prologue; + // msencctxIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body + pThis->__msencctxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_msencctxIsPartialUnmapSupported; - pThis->__msencctxCanCopy__ = &__nvoc_thunk_RsResource_msencctxCanCopy; + // msencctxMapTo -- virtual inherited (res) base (chandes) + pThis->__msencctxMapTo__ = &__nvoc_up_thunk_RsResource_msencctxMapTo; - pThis->__msencctxIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_msencctxIsPartialUnmapSupported; + // msencctxUnmapFrom -- virtual inherited (res) base (chandes) + pThis->__msencctxUnmapFrom__ = &__nvoc_up_thunk_RsResource_msencctxUnmapFrom; - pThis->__msencctxPreDestruct__ = &__nvoc_thunk_RsResource_msencctxPreDestruct; + // msencctxGetRefCount -- virtual inherited (res) base (chandes) + pThis->__msencctxGetRefCount__ = &__nvoc_up_thunk_RsResource_msencctxGetRefCount; - pThis->__msencctxIsDuplicate__ = &__nvoc_thunk_RsResource_msencctxIsDuplicate; + // msencctxAddAdditionalDependants -- virtual inherited (res) base (chandes) + pThis->__msencctxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_msencctxAddAdditionalDependants; - pThis->__msencctxControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_msencctxControlSerialization_Epilogue; + // msencctxGetNotificationListPtr -- virtual inherited (notify) base (chandes) + pThis->__msencctxGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_msencctxGetNotificationListPtr; - pThis->__msencctxGetNotificationListPtr__ = &__nvoc_thunk_Notifier_msencctxGetNotificationListPtr; + // msencctxGetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__msencctxGetNotificationShare__ = &__nvoc_up_thunk_Notifier_msencctxGetNotificationShare; - pThis->__msencctxGetNotificationShare__ = &__nvoc_thunk_Notifier_msencctxGetNotificationShare; + // msencctxSetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__msencctxSetNotificationShare__ = &__nvoc_up_thunk_Notifier_msencctxSetNotificationShare; - pThis->__msencctxMap__ = &__nvoc_thunk_GpuResource_msencctxMap; + // msencctxUnregisterEvent -- virtual inherited (notify) base (chandes) + pThis->__msencctxUnregisterEvent__ = &__nvoc_up_thunk_Notifier_msencctxUnregisterEvent; - pThis->__msencctxGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_msencctxGetOrAllocNotifShare; -} + // msencctxGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) + pThis->__msencctxGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_msencctxGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_MsencContext_1 with approximately 32 basic block(s). + +// Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_MsencContext(MsencContext *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 32 per-object function pointer(s). __nvoc_init_funcTable_MsencContext_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_nvenc_ctx_nvoc.h b/src/nvidia/generated/g_kernel_nvenc_ctx_nvoc.h index e802a7d1a7..fab8caa7bc 100644 --- a/src/nvidia/generated/g_kernel_nvenc_ctx_nvoc.h +++ b/src/nvidia/generated/g_kernel_nvenc_ctx_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_NVENC_CTX_NVOC_H_ #define _G_KERNEL_NVENC_CTX_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_nvenc_ctx_nvoc.h" #ifndef KERNEL_NVENC_CTX_H @@ -51,50 +59,59 @@ ENGDESCRIPTOR msencGetEngineDescFromAllocParams(OBJGPU *pGpu, NvU32 externalClas #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct MsencContext { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; - struct MsencContext *__nvoc_pbase_MsencContext; - NV_STATUS (*__msencctxCheckMemInterUnmap__)(struct MsencContext *, NvBool); - NvBool (*__msencctxShareCallback__)(struct MsencContext *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NvBool (*__msencctxAccessCallback__)(struct MsencContext *, struct RsClient *, void *, RsAccessRight); - NV_STATUS (*__msencctxMapTo__)(struct MsencContext *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__msencctxGetMapAddrSpace__)(struct MsencContext *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__msencctxSetNotificationShare__)(struct MsencContext *, struct NotifShare *); - NvU32 (*__msencctxGetRefCount__)(struct MsencContext *); - void (*__msencctxAddAdditionalDependants__)(struct RsClient *, struct MsencContext *, RsResourceRef *); - NV_STATUS (*__msencctxControl_Prologue__)(struct MsencContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__msencctxGetRegBaseOffsetAndSize__)(struct MsencContext *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__msencctxInternalControlForward__)(struct MsencContext *, NvU32, void *, NvU32); - NV_STATUS (*__msencctxUnmapFrom__)(struct MsencContext *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__msencctxControl_Epilogue__)(struct MsencContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__msencctxGetSwMethods__)(struct MsencContext *, const METHOD **, NvU32 *); - NvHandle (*__msencctxGetInternalObjectHandle__)(struct MsencContext *); - NV_STATUS (*__msencctxControl__)(struct MsencContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__msencctxUnmap__)(struct MsencContext *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__msencctxGetMemInterMapParams__)(struct MsencContext *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__msencctxGetMemoryMappingDescriptor__)(struct MsencContext *, struct MEMORY_DESCRIPTOR **); - NvBool (*__msencctxIsSwMethodStalling__)(struct MsencContext *, NvU32); - NV_STATUS (*__msencctxControlFilter__)(struct MsencContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__msencctxUnregisterEvent__)(struct MsencContext *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__msencctxControlSerialization_Prologue__)(struct MsencContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__msencctxCanCopy__)(struct MsencContext *); - NvBool (*__msencctxIsPartialUnmapSupported__)(struct MsencContext *); - void (*__msencctxPreDestruct__)(struct MsencContext *); - NV_STATUS (*__msencctxIsDuplicate__)(struct MsencContext *, NvHandle, NvBool *); - void (*__msencctxControlSerialization_Epilogue__)(struct MsencContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__msencctxGetNotificationListPtr__)(struct MsencContext *); - struct NotifShare *(*__msencctxGetNotificationShare__)(struct MsencContext *); - NV_STATUS (*__msencctxMap__)(struct MsencContext *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NV_STATUS (*__msencctxGetOrAllocNotifShare__)(struct MsencContext *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super^2 + struct INotifier *__nvoc_pbase_INotifier; // inotify super^3 + struct Notifier *__nvoc_pbase_Notifier; // notify super^2 + struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super + struct MsencContext *__nvoc_pbase_MsencContext; // msencctx + + // Vtable with 32 per-object function pointers + NV_STATUS (*__msencctxGetSwMethods__)(struct MsencContext * /*this*/, const METHOD **, NvU32 *); // virtual inherited (chandes) base (chandes) + NvBool (*__msencctxIsSwMethodStalling__)(struct MsencContext * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__msencctxCheckMemInterUnmap__)(struct MsencContext * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__msencctxControl__)(struct MsencContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__msencctxMap__)(struct MsencContext * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__msencctxUnmap__)(struct MsencContext * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NvBool (*__msencctxShareCallback__)(struct MsencContext * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__msencctxGetRegBaseOffsetAndSize__)(struct MsencContext * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__msencctxGetMapAddrSpace__)(struct MsencContext * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__msencctxInternalControlForward__)(struct MsencContext * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (chandes) + NvHandle (*__msencctxGetInternalObjectHandle__)(struct MsencContext * /*this*/); // virtual inherited (gpures) base (chandes) + NvBool (*__msencctxAccessCallback__)(struct MsencContext * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__msencctxGetMemInterMapParams__)(struct MsencContext * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__msencctxGetMemoryMappingDescriptor__)(struct MsencContext * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__msencctxControlSerialization_Prologue__)(struct MsencContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__msencctxControlSerialization_Epilogue__)(struct MsencContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__msencctxControl_Prologue__)(struct MsencContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__msencctxControl_Epilogue__)(struct MsencContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NvBool (*__msencctxCanCopy__)(struct MsencContext * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__msencctxIsDuplicate__)(struct MsencContext * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (chandes) + void (*__msencctxPreDestruct__)(struct MsencContext * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__msencctxControlFilter__)(struct MsencContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (chandes) + NvBool (*__msencctxIsPartialUnmapSupported__)(struct MsencContext * /*this*/); // inline virtual inherited (res) base (chandes) body + NV_STATUS (*__msencctxMapTo__)(struct MsencContext * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (chandes) + NV_STATUS (*__msencctxUnmapFrom__)(struct MsencContext * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (chandes) + NvU32 (*__msencctxGetRefCount__)(struct MsencContext * /*this*/); // virtual inherited (res) base (chandes) + void (*__msencctxAddAdditionalDependants__)(struct RsClient *, struct MsencContext * /*this*/, RsResourceRef *); // virtual inherited (res) base (chandes) + PEVENTNOTIFICATION * (*__msencctxGetNotificationListPtr__)(struct MsencContext * /*this*/); // virtual inherited (notify) base (chandes) + struct NotifShare * (*__msencctxGetNotificationShare__)(struct MsencContext * /*this*/); // virtual inherited (notify) base (chandes) + void (*__msencctxSetNotificationShare__)(struct MsencContext * /*this*/, struct NotifShare *); // virtual inherited (notify) base (chandes) + NV_STATUS (*__msencctxUnregisterEvent__)(struct MsencContext * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (chandes) + NV_STATUS (*__msencctxGetOrAllocNotifShare__)(struct MsencContext * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (chandes) }; #ifndef __NVOC_CLASS_MsencContext_TYPEDEF__ @@ -106,6 +123,7 @@ typedef struct MsencContext MsencContext; #define __nvoc_class_id_MsencContext 0x88c92a #endif /* __nvoc_class_id_MsencContext */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_MsencContext; #define __staticCast_MsencContext(pThis) \ @@ -118,138 +136,126 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_MsencContext; ((MsencContext*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(MsencContext))) #endif //__nvoc_kernel_nvenc_ctx_h_disabled - NV_STATUS __nvoc_objCreateDynamic_MsencContext(MsencContext**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_MsencContext(MsencContext**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_MsencContext(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_MsencContext((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define msencctxGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ +#define msencctxGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) msencctxGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) +#define msencctxIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define msencctxIsSwMethodStalling(pChannelDescendant, hHandle) msencctxIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) +#define msencctxCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ #define msencctxCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) msencctxCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) +#define msencctxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define msencctxControl(pGpuResource, pCallContext, pParams) msencctxControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define msencctxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define msencctxMap(pGpuResource, pCallContext, pParams, pCpuMapping) msencctxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define msencctxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define msencctxUnmap(pGpuResource, pCallContext, pCpuMapping) msencctxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define msencctxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ #define msencctxShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) msencctxShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define msencctxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) msencctxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define msencctxMapTo(pResource, pParams) msencctxMapTo_DISPATCH(pResource, pParams) -#define msencctxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) msencctxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define msencctxSetNotificationShare(pNotifier, pNotifShare) msencctxSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define msencctxGetRefCount(pResource) msencctxGetRefCount_DISPATCH(pResource) -#define msencctxAddAdditionalDependants(pClient, pResource, pReference) msencctxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define msencctxControl_Prologue(pResource, pCallContext, pParams) msencctxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define msencctxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define msencctxGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) msencctxGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define msencctxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define msencctxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) msencctxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define msencctxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define msencctxInternalControlForward(pGpuResource, command, pParams, size) msencctxInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define msencctxUnmapFrom(pResource, pParams) msencctxUnmapFrom_DISPATCH(pResource, pParams) -#define msencctxControl_Epilogue(pResource, pCallContext, pParams) msencctxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define msencctxGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) msencctxGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) +#define msencctxGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define msencctxGetInternalObjectHandle(pGpuResource) msencctxGetInternalObjectHandle_DISPATCH(pGpuResource) -#define msencctxControl(pGpuResource, pCallContext, pParams) msencctxControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define msencctxUnmap(pGpuResource, pCallContext, pCpuMapping) msencctxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define msencctxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define msencctxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) msencctxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define msencctxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define msencctxGetMemInterMapParams(pRmResource, pParams) msencctxGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define msencctxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define msencctxGetMemoryMappingDescriptor(pRmResource, ppMemDesc) msencctxGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define msencctxIsSwMethodStalling(pChannelDescendant, hHandle) msencctxIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define msencctxControlFilter(pResource, pCallContext, pParams) msencctxControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define msencctxUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) msencctxUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define msencctxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define msencctxControlSerialization_Prologue(pResource, pCallContext, pParams) msencctxControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define msencctxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define msencctxControlSerialization_Epilogue(pResource, pCallContext, pParams) msencctxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define msencctxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define msencctxControl_Prologue(pResource, pCallContext, pParams) msencctxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define msencctxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define msencctxControl_Epilogue(pResource, pCallContext, pParams) msencctxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define msencctxCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define msencctxCanCopy(pResource) msencctxCanCopy_DISPATCH(pResource) -#define msencctxIsPartialUnmapSupported(pResource) msencctxIsPartialUnmapSupported_DISPATCH(pResource) -#define msencctxPreDestruct(pResource) msencctxPreDestruct_DISPATCH(pResource) +#define msencctxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define msencctxIsDuplicate(pResource, hMemory, pDuplicate) msencctxIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define msencctxControlSerialization_Epilogue(pResource, pCallContext, pParams) msencctxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define msencctxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define msencctxPreDestruct(pResource) msencctxPreDestruct_DISPATCH(pResource) +#define msencctxControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define msencctxControlFilter(pResource, pCallContext, pParams) msencctxControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define msencctxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define msencctxIsPartialUnmapSupported(pResource) msencctxIsPartialUnmapSupported_DISPATCH(pResource) +#define msencctxMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define msencctxMapTo(pResource, pParams) msencctxMapTo_DISPATCH(pResource, pParams) +#define msencctxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define msencctxUnmapFrom(pResource, pParams) msencctxUnmapFrom_DISPATCH(pResource, pParams) +#define msencctxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define msencctxGetRefCount(pResource) msencctxGetRefCount_DISPATCH(pResource) +#define msencctxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define msencctxAddAdditionalDependants(pClient, pResource, pReference) msencctxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define msencctxGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define msencctxGetNotificationListPtr(pNotifier) msencctxGetNotificationListPtr_DISPATCH(pNotifier) +#define msencctxGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ #define msencctxGetNotificationShare(pNotifier) msencctxGetNotificationShare_DISPATCH(pNotifier) -#define msencctxMap(pGpuResource, pCallContext, pParams, pCpuMapping) msencctxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define msencctxSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define msencctxSetNotificationShare(pNotifier, pNotifShare) msencctxSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define msencctxUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define msencctxUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) msencctxUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define msencctxGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ #define msencctxGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) msencctxGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -NV_STATUS msencctxConstructHal_KERNEL(struct MsencContext *pMsencContext, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); - -#ifdef __nvoc_kernel_nvenc_ctx_h_disabled -static inline NV_STATUS msencctxConstructHal(struct MsencContext *pMsencContext, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - NV_ASSERT_FAILED_PRECOMP("MsencContext was disabled!"); - return NV_ERR_NOT_SUPPORTED; +// Dispatch functions +static inline NV_STATUS msencctxGetSwMethods_DISPATCH(struct MsencContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { + return pChannelDescendant->__msencctxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); } -#else //__nvoc_kernel_nvenc_ctx_h_disabled -#define msencctxConstructHal(pMsencContext, pCallContext, pParams) msencctxConstructHal_KERNEL(pMsencContext, pCallContext, pParams) -#endif //__nvoc_kernel_nvenc_ctx_h_disabled -#define msencctxConstructHal_HAL(pMsencContext, pCallContext, pParams) msencctxConstructHal(pMsencContext, pCallContext, pParams) - -void msencctxDestructHal_KERNEL(struct MsencContext *pMsencContext); - - -#ifdef __nvoc_kernel_nvenc_ctx_h_disabled -static inline void msencctxDestructHal(struct MsencContext *pMsencContext) { - NV_ASSERT_FAILED_PRECOMP("MsencContext was disabled!"); +static inline NvBool msencctxIsSwMethodStalling_DISPATCH(struct MsencContext *pChannelDescendant, NvU32 hHandle) { + return pChannelDescendant->__msencctxIsSwMethodStalling__(pChannelDescendant, hHandle); } -#else //__nvoc_kernel_nvenc_ctx_h_disabled -#define msencctxDestructHal(pMsencContext) msencctxDestructHal_KERNEL(pMsencContext) -#endif //__nvoc_kernel_nvenc_ctx_h_disabled - -#define msencctxDestructHal_HAL(pMsencContext) msencctxDestructHal(pMsencContext) static inline NV_STATUS msencctxCheckMemInterUnmap_DISPATCH(struct MsencContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { return pChannelDescendant->__msencctxCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } -static inline NvBool msencctxShareCallback_DISPATCH(struct MsencContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__msencctxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NvBool msencctxAccessCallback_DISPATCH(struct MsencContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__msencctxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} - -static inline NV_STATUS msencctxMapTo_DISPATCH(struct MsencContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__msencctxMapTo__(pResource, pParams); -} - -static inline NV_STATUS msencctxGetMapAddrSpace_DISPATCH(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__msencctxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); -} - -static inline void msencctxSetNotificationShare_DISPATCH(struct MsencContext *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__msencctxSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS msencctxControl_DISPATCH(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__msencctxControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 msencctxGetRefCount_DISPATCH(struct MsencContext *pResource) { - return pResource->__msencctxGetRefCount__(pResource); +static inline NV_STATUS msencctxMap_DISPATCH(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__msencctxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void msencctxAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MsencContext *pResource, RsResourceRef *pReference) { - pResource->__msencctxAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS msencctxUnmap_DISPATCH(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__msencctxUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS msencctxControl_Prologue_DISPATCH(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__msencctxControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool msencctxShareCallback_DISPATCH(struct MsencContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__msencctxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS msencctxGetRegBaseOffsetAndSize_DISPATCH(struct MsencContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__msencctxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS msencctxInternalControlForward_DISPATCH(struct MsencContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__msencctxInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS msencctxUnmapFrom_DISPATCH(struct MsencContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__msencctxUnmapFrom__(pResource, pParams); -} - -static inline void msencctxControl_Epilogue_DISPATCH(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__msencctxControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS msencctxGetMapAddrSpace_DISPATCH(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__msencctxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NV_STATUS msencctxGetSwMethods_DISPATCH(struct MsencContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return pChannelDescendant->__msencctxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); +static inline NV_STATUS msencctxInternalControlForward_DISPATCH(struct MsencContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__msencctxInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle msencctxGetInternalObjectHandle_DISPATCH(struct MsencContext *pGpuResource) { return pGpuResource->__msencctxGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS msencctxControl_DISPATCH(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__msencctxControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS msencctxUnmap_DISPATCH(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__msencctxUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool msencctxAccessCallback_DISPATCH(struct MsencContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__msencctxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS msencctxGetMemInterMapParams_DISPATCH(struct MsencContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { @@ -260,58 +266,105 @@ static inline NV_STATUS msencctxGetMemoryMappingDescriptor_DISPATCH(struct Msenc return pRmResource->__msencctxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NvBool msencctxIsSwMethodStalling_DISPATCH(struct MsencContext *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__msencctxIsSwMethodStalling__(pChannelDescendant, hHandle); +static inline NV_STATUS msencctxControlSerialization_Prologue_DISPATCH(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__msencctxControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS msencctxControlFilter_DISPATCH(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__msencctxControlFilter__(pResource, pCallContext, pParams); +static inline void msencctxControlSerialization_Epilogue_DISPATCH(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__msencctxControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS msencctxUnregisterEvent_DISPATCH(struct MsencContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__msencctxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline NV_STATUS msencctxControl_Prologue_DISPATCH(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__msencctxControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS msencctxControlSerialization_Prologue_DISPATCH(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__msencctxControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline void msencctxControl_Epilogue_DISPATCH(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__msencctxControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool msencctxCanCopy_DISPATCH(struct MsencContext *pResource) { return pResource->__msencctxCanCopy__(pResource); } -static inline NvBool msencctxIsPartialUnmapSupported_DISPATCH(struct MsencContext *pResource) { - return pResource->__msencctxIsPartialUnmapSupported__(pResource); +static inline NV_STATUS msencctxIsDuplicate_DISPATCH(struct MsencContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__msencctxIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void msencctxPreDestruct_DISPATCH(struct MsencContext *pResource) { pResource->__msencctxPreDestruct__(pResource); } -static inline NV_STATUS msencctxIsDuplicate_DISPATCH(struct MsencContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__msencctxIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS msencctxControlFilter_DISPATCH(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__msencctxControlFilter__(pResource, pCallContext, pParams); } -static inline void msencctxControlSerialization_Epilogue_DISPATCH(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__msencctxControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool msencctxIsPartialUnmapSupported_DISPATCH(struct MsencContext *pResource) { + return pResource->__msencctxIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS msencctxMapTo_DISPATCH(struct MsencContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__msencctxMapTo__(pResource, pParams); +} + +static inline NV_STATUS msencctxUnmapFrom_DISPATCH(struct MsencContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__msencctxUnmapFrom__(pResource, pParams); +} + +static inline NvU32 msencctxGetRefCount_DISPATCH(struct MsencContext *pResource) { + return pResource->__msencctxGetRefCount__(pResource); } -static inline PEVENTNOTIFICATION *msencctxGetNotificationListPtr_DISPATCH(struct MsencContext *pNotifier) { +static inline void msencctxAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MsencContext *pResource, RsResourceRef *pReference) { + pResource->__msencctxAddAdditionalDependants__(pClient, pResource, pReference); +} + +static inline PEVENTNOTIFICATION * msencctxGetNotificationListPtr_DISPATCH(struct MsencContext *pNotifier) { return pNotifier->__msencctxGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *msencctxGetNotificationShare_DISPATCH(struct MsencContext *pNotifier) { +static inline struct NotifShare * msencctxGetNotificationShare_DISPATCH(struct MsencContext *pNotifier) { return pNotifier->__msencctxGetNotificationShare__(pNotifier); } -static inline NV_STATUS msencctxMap_DISPATCH(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__msencctxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void msencctxSetNotificationShare_DISPATCH(struct MsencContext *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__msencctxSetNotificationShare__(pNotifier, pNotifShare); +} + +static inline NV_STATUS msencctxUnregisterEvent_DISPATCH(struct MsencContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__msencctxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS msencctxGetOrAllocNotifShare_DISPATCH(struct MsencContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return pNotifier->__msencctxGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } +NV_STATUS msencctxConstructHal_KERNEL(struct MsencContext *pMsencContext, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); + + +#ifdef __nvoc_kernel_nvenc_ctx_h_disabled +static inline NV_STATUS msencctxConstructHal(struct MsencContext *pMsencContext, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + NV_ASSERT_FAILED_PRECOMP("MsencContext was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kernel_nvenc_ctx_h_disabled +#define msencctxConstructHal(pMsencContext, pCallContext, pParams) msencctxConstructHal_KERNEL(pMsencContext, pCallContext, pParams) +#endif //__nvoc_kernel_nvenc_ctx_h_disabled + +#define msencctxConstructHal_HAL(pMsencContext, pCallContext, pParams) msencctxConstructHal(pMsencContext, pCallContext, pParams) + +void msencctxDestructHal_KERNEL(struct MsencContext *pMsencContext); + + +#ifdef __nvoc_kernel_nvenc_ctx_h_disabled +static inline void msencctxDestructHal(struct MsencContext *pMsencContext) { + NV_ASSERT_FAILED_PRECOMP("MsencContext was disabled!"); +} +#else //__nvoc_kernel_nvenc_ctx_h_disabled +#define msencctxDestructHal(pMsencContext) msencctxDestructHal_KERNEL(pMsencContext) +#endif //__nvoc_kernel_nvenc_ctx_h_disabled + +#define msencctxDestructHal_HAL(pMsencContext) msencctxDestructHal(pMsencContext) + static inline NV_STATUS __nvoc_msencctxConstruct(struct MsencContext *arg_pMsencContext, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams) { return msencctxConstructHal(arg_pMsencContext, arg_pCallContext, arg_pParams); } diff --git a/src/nvidia/generated/g_kernel_nvjpg_ctx_nvoc.c b/src/nvidia/generated/g_kernel_nvjpg_ctx_nvoc.c index b62aa9b06e..f56300502e 100644 --- a/src/nvidia/generated/g_kernel_nvjpg_ctx_nvoc.c +++ b/src/nvidia/generated/g_kernel_nvjpg_ctx_nvoc.c @@ -120,134 +120,169 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_NvjpgContext = /*pExportInfo=*/ &__nvoc_export_info_NvjpgContext }; -static NV_STATUS __nvoc_thunk_ChannelDescendant_nvjpgctxCheckMemInterUnmap(struct NvjpgContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_NvjpgContext_ChannelDescendant.offset), bSubdeviceHandleProvided); +// 32 up-thunk(s) defined to bridge methods in NvjpgContext to superclasses + +// nvjpgctxGetSwMethods: virtual inherited (chandes) base (chandes) +static NV_STATUS __nvoc_up_thunk_ChannelDescendant_nvjpgctxGetSwMethods(struct NvjpgContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { + return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_NvjpgContext_ChannelDescendant.offset), ppMethods, pNumMethods); } -static NvBool __nvoc_thunk_GpuResource_nvjpgctxShareCallback(struct NvjpgContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// nvjpgctxIsSwMethodStalling: virtual inherited (chandes) base (chandes) +static NvBool __nvoc_up_thunk_ChannelDescendant_nvjpgctxIsSwMethodStalling(struct NvjpgContext *pChannelDescendant, NvU32 hHandle) { + return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_NvjpgContext_ChannelDescendant.offset), hHandle); } -static NvBool __nvoc_thunk_RmResource_nvjpgctxAccessCallback(struct NvjpgContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// nvjpgctxCheckMemInterUnmap: virtual inherited (chandes) base (chandes) +static NV_STATUS __nvoc_up_thunk_ChannelDescendant_nvjpgctxCheckMemInterUnmap(struct NvjpgContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { + return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_NvjpgContext_ChannelDescendant.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RsResource_nvjpgctxMapTo(struct NvjpgContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset), pParams); +// nvjpgctxControl: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxControl(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_nvjpgctxGetMapAddrSpace(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// nvjpgctxMap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxMap(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static void __nvoc_thunk_Notifier_nvjpgctxSetNotificationShare(struct NvjpgContext *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_NvjpgContext_Notifier.offset), pNotifShare); +// nvjpgctxUnmap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxUnmap(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), pCallContext, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_nvjpgctxGetRefCount(struct NvjpgContext *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset)); +// nvjpgctxShareCallback: virtual inherited (gpures) base (chandes) +static NvBool __nvoc_up_thunk_GpuResource_nvjpgctxShareCallback(struct NvjpgContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static void __nvoc_thunk_RsResource_nvjpgctxAddAdditionalDependants(struct RsClient *pClient, struct NvjpgContext *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset), pReference); +// nvjpgctxGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxGetRegBaseOffsetAndSize(struct NvjpgContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_RmResource_nvjpgctxControl_Prologue(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), pCallContext, pParams); +// nvjpgctxGetMapAddrSpace: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxGetMapAddrSpace(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_GpuResource_nvjpgctxGetRegBaseOffsetAndSize(struct NvjpgContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), pGpu, pOffset, pSize); +// nvjpgctxInternalControlForward: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxInternalControlForward(struct NvjpgContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_GpuResource_nvjpgctxInternalControlForward(struct NvjpgContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), command, pParams, size); +// nvjpgctxGetInternalObjectHandle: virtual inherited (gpures) base (chandes) +static NvHandle __nvoc_up_thunk_GpuResource_nvjpgctxGetInternalObjectHandle(struct NvjpgContext *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_nvjpgctxUnmapFrom(struct NvjpgContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset), pParams); +// nvjpgctxAccessCallback: virtual inherited (rmres) base (chandes) +static NvBool __nvoc_up_thunk_RmResource_nvjpgctxAccessCallback(struct NvjpgContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static void __nvoc_thunk_RmResource_nvjpgctxControl_Epilogue(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), pCallContext, pParams); +// nvjpgctxGetMemInterMapParams: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_nvjpgctxGetMemInterMapParams(struct NvjpgContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_ChannelDescendant_nvjpgctxGetSwMethods(struct NvjpgContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_NvjpgContext_ChannelDescendant.offset), ppMethods, pNumMethods); +// nvjpgctxGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_nvjpgctxGetMemoryMappingDescriptor(struct NvjpgContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), ppMemDesc); } -static NvHandle __nvoc_thunk_GpuResource_nvjpgctxGetInternalObjectHandle(struct NvjpgContext *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset)); +// nvjpgctxControlSerialization_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_nvjpgctxControlSerialization_Prologue(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_nvjpgctxControl(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), pCallContext, pParams); +// nvjpgctxControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_nvjpgctxControlSerialization_Epilogue(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_nvjpgctxUnmap(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), pCallContext, pCpuMapping); +// nvjpgctxControl_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_nvjpgctxControl_Prologue(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_nvjpgctxGetMemInterMapParams(struct NvjpgContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), pParams); +// nvjpgctxControl_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_nvjpgctxControl_Epilogue(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_nvjpgctxGetMemoryMappingDescriptor(struct NvjpgContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), ppMemDesc); +// nvjpgctxCanCopy: virtual inherited (res) base (chandes) +static NvBool __nvoc_up_thunk_RsResource_nvjpgctxCanCopy(struct NvjpgContext *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset)); } -static NvBool __nvoc_thunk_ChannelDescendant_nvjpgctxIsSwMethodStalling(struct NvjpgContext *pChannelDescendant, NvU32 hHandle) { - return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_NvjpgContext_ChannelDescendant.offset), hHandle); +// nvjpgctxIsDuplicate: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_nvjpgctxIsDuplicate(struct NvjpgContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_nvjpgctxControlFilter(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset), pCallContext, pParams); +// nvjpgctxPreDestruct: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_nvjpgctxPreDestruct(struct NvjpgContext *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_nvjpgctxUnregisterEvent(struct NvjpgContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_NvjpgContext_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// nvjpgctxControlFilter: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_nvjpgctxControlFilter(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_nvjpgctxControlSerialization_Prologue(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), pCallContext, pParams); +// nvjpgctxIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body +static NvBool __nvoc_up_thunk_RsResource_nvjpgctxIsPartialUnmapSupported(struct NvjpgContext *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_nvjpgctxCanCopy(struct NvjpgContext *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset)); +// nvjpgctxMapTo: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_nvjpgctxMapTo(struct NvjpgContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RsResource_nvjpgctxIsPartialUnmapSupported(struct NvjpgContext *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset)); +// nvjpgctxUnmapFrom: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_nvjpgctxUnmapFrom(struct NvjpgContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset), pParams); } -static void __nvoc_thunk_RsResource_nvjpgctxPreDestruct(struct NvjpgContext *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset)); +// nvjpgctxGetRefCount: virtual inherited (res) base (chandes) +static NvU32 __nvoc_up_thunk_RsResource_nvjpgctxGetRefCount(struct NvjpgContext *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_nvjpgctxIsDuplicate(struct NvjpgContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset), hMemory, pDuplicate); +// nvjpgctxAddAdditionalDependants: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_nvjpgctxAddAdditionalDependants(struct RsClient *pClient, struct NvjpgContext *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset), pReference); } -static void __nvoc_thunk_RmResource_nvjpgctxControlSerialization_Epilogue(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), pCallContext, pParams); +// nvjpgctxGetNotificationListPtr: virtual inherited (notify) base (chandes) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_nvjpgctxGetNotificationListPtr(struct NvjpgContext *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvjpgContext_Notifier.offset)); } -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_nvjpgctxGetNotificationListPtr(struct NvjpgContext *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_NvjpgContext_Notifier.offset)); +// nvjpgctxGetNotificationShare: virtual inherited (notify) base (chandes) +static struct NotifShare * __nvoc_up_thunk_Notifier_nvjpgctxGetNotificationShare(struct NvjpgContext *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvjpgContext_Notifier.offset)); } -static struct NotifShare *__nvoc_thunk_Notifier_nvjpgctxGetNotificationShare(struct NvjpgContext *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_NvjpgContext_Notifier.offset)); +// nvjpgctxSetNotificationShare: virtual inherited (notify) base (chandes) +static void __nvoc_up_thunk_Notifier_nvjpgctxSetNotificationShare(struct NvjpgContext *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvjpgContext_Notifier.offset), pNotifShare); } -static NV_STATUS __nvoc_thunk_GpuResource_nvjpgctxMap(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// nvjpgctxUnregisterEvent: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_nvjpgctxUnregisterEvent(struct NvjpgContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvjpgContext_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static NV_STATUS __nvoc_thunk_Notifier_nvjpgctxGetOrAllocNotifShare(struct NvjpgContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_NvjpgContext_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +// nvjpgctxGetOrAllocNotifShare: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_nvjpgctxGetOrAllocNotifShare(struct NvjpgContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvjpgContext_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_NvjpgContext = { /*numEntries=*/ 0, @@ -289,6 +324,7 @@ NV_STATUS __nvoc_ctor_NvjpgContext(NvjpgContext *pThis, RmHalspecOwner *pRmhalsp return status; } +// Vtable initialization static void __nvoc_init_funcTable_NvjpgContext_1(NvjpgContext *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -297,72 +333,108 @@ static void __nvoc_init_funcTable_NvjpgContext_1(NvjpgContext *pThis, RmHalspecO PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - pThis->__nvjpgctxCheckMemInterUnmap__ = &__nvoc_thunk_ChannelDescendant_nvjpgctxCheckMemInterUnmap; + // nvjpgctxGetSwMethods -- virtual inherited (chandes) base (chandes) + pThis->__nvjpgctxGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_nvjpgctxGetSwMethods; - pThis->__nvjpgctxShareCallback__ = &__nvoc_thunk_GpuResource_nvjpgctxShareCallback; + // nvjpgctxIsSwMethodStalling -- virtual inherited (chandes) base (chandes) + pThis->__nvjpgctxIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_nvjpgctxIsSwMethodStalling; - pThis->__nvjpgctxAccessCallback__ = &__nvoc_thunk_RmResource_nvjpgctxAccessCallback; + // nvjpgctxCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) + pThis->__nvjpgctxCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_nvjpgctxCheckMemInterUnmap; - pThis->__nvjpgctxMapTo__ = &__nvoc_thunk_RsResource_nvjpgctxMapTo; + // nvjpgctxControl -- virtual inherited (gpures) base (chandes) + pThis->__nvjpgctxControl__ = &__nvoc_up_thunk_GpuResource_nvjpgctxControl; - pThis->__nvjpgctxGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_nvjpgctxGetMapAddrSpace; + // nvjpgctxMap -- virtual inherited (gpures) base (chandes) + pThis->__nvjpgctxMap__ = &__nvoc_up_thunk_GpuResource_nvjpgctxMap; - pThis->__nvjpgctxSetNotificationShare__ = &__nvoc_thunk_Notifier_nvjpgctxSetNotificationShare; + // nvjpgctxUnmap -- virtual inherited (gpures) base (chandes) + pThis->__nvjpgctxUnmap__ = &__nvoc_up_thunk_GpuResource_nvjpgctxUnmap; - pThis->__nvjpgctxGetRefCount__ = &__nvoc_thunk_RsResource_nvjpgctxGetRefCount; + // nvjpgctxShareCallback -- virtual inherited (gpures) base (chandes) + pThis->__nvjpgctxShareCallback__ = &__nvoc_up_thunk_GpuResource_nvjpgctxShareCallback; - pThis->__nvjpgctxAddAdditionalDependants__ = &__nvoc_thunk_RsResource_nvjpgctxAddAdditionalDependants; + // nvjpgctxGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) + pThis->__nvjpgctxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_nvjpgctxGetRegBaseOffsetAndSize; - pThis->__nvjpgctxControl_Prologue__ = &__nvoc_thunk_RmResource_nvjpgctxControl_Prologue; + // nvjpgctxGetMapAddrSpace -- virtual inherited (gpures) base (chandes) + pThis->__nvjpgctxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_nvjpgctxGetMapAddrSpace; - pThis->__nvjpgctxGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_nvjpgctxGetRegBaseOffsetAndSize; + // nvjpgctxInternalControlForward -- virtual inherited (gpures) base (chandes) + pThis->__nvjpgctxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_nvjpgctxInternalControlForward; - pThis->__nvjpgctxInternalControlForward__ = &__nvoc_thunk_GpuResource_nvjpgctxInternalControlForward; + // nvjpgctxGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) + pThis->__nvjpgctxGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_nvjpgctxGetInternalObjectHandle; - pThis->__nvjpgctxUnmapFrom__ = &__nvoc_thunk_RsResource_nvjpgctxUnmapFrom; + // nvjpgctxAccessCallback -- virtual inherited (rmres) base (chandes) + pThis->__nvjpgctxAccessCallback__ = &__nvoc_up_thunk_RmResource_nvjpgctxAccessCallback; - pThis->__nvjpgctxControl_Epilogue__ = &__nvoc_thunk_RmResource_nvjpgctxControl_Epilogue; + // nvjpgctxGetMemInterMapParams -- virtual inherited (rmres) base (chandes) + pThis->__nvjpgctxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_nvjpgctxGetMemInterMapParams; - pThis->__nvjpgctxGetSwMethods__ = &__nvoc_thunk_ChannelDescendant_nvjpgctxGetSwMethods; + // nvjpgctxGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) + pThis->__nvjpgctxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_nvjpgctxGetMemoryMappingDescriptor; - pThis->__nvjpgctxGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_nvjpgctxGetInternalObjectHandle; + // nvjpgctxControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__nvjpgctxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_nvjpgctxControlSerialization_Prologue; - pThis->__nvjpgctxControl__ = &__nvoc_thunk_GpuResource_nvjpgctxControl; + // nvjpgctxControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__nvjpgctxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_nvjpgctxControlSerialization_Epilogue; - pThis->__nvjpgctxUnmap__ = &__nvoc_thunk_GpuResource_nvjpgctxUnmap; + // nvjpgctxControl_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__nvjpgctxControl_Prologue__ = &__nvoc_up_thunk_RmResource_nvjpgctxControl_Prologue; - pThis->__nvjpgctxGetMemInterMapParams__ = &__nvoc_thunk_RmResource_nvjpgctxGetMemInterMapParams; + // nvjpgctxControl_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__nvjpgctxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_nvjpgctxControl_Epilogue; - pThis->__nvjpgctxGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_nvjpgctxGetMemoryMappingDescriptor; + // nvjpgctxCanCopy -- virtual inherited (res) base (chandes) + pThis->__nvjpgctxCanCopy__ = &__nvoc_up_thunk_RsResource_nvjpgctxCanCopy; - pThis->__nvjpgctxIsSwMethodStalling__ = &__nvoc_thunk_ChannelDescendant_nvjpgctxIsSwMethodStalling; + // nvjpgctxIsDuplicate -- virtual inherited (res) base (chandes) + pThis->__nvjpgctxIsDuplicate__ = &__nvoc_up_thunk_RsResource_nvjpgctxIsDuplicate; - pThis->__nvjpgctxControlFilter__ = &__nvoc_thunk_RsResource_nvjpgctxControlFilter; + // nvjpgctxPreDestruct -- virtual inherited (res) base (chandes) + pThis->__nvjpgctxPreDestruct__ = &__nvoc_up_thunk_RsResource_nvjpgctxPreDestruct; - pThis->__nvjpgctxUnregisterEvent__ = &__nvoc_thunk_Notifier_nvjpgctxUnregisterEvent; + // nvjpgctxControlFilter -- virtual inherited (res) base (chandes) + pThis->__nvjpgctxControlFilter__ = &__nvoc_up_thunk_RsResource_nvjpgctxControlFilter; - pThis->__nvjpgctxControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_nvjpgctxControlSerialization_Prologue; + // nvjpgctxIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body + pThis->__nvjpgctxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_nvjpgctxIsPartialUnmapSupported; - pThis->__nvjpgctxCanCopy__ = &__nvoc_thunk_RsResource_nvjpgctxCanCopy; + // nvjpgctxMapTo -- virtual inherited (res) base (chandes) + pThis->__nvjpgctxMapTo__ = &__nvoc_up_thunk_RsResource_nvjpgctxMapTo; - pThis->__nvjpgctxIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_nvjpgctxIsPartialUnmapSupported; + // nvjpgctxUnmapFrom -- virtual inherited (res) base (chandes) + pThis->__nvjpgctxUnmapFrom__ = &__nvoc_up_thunk_RsResource_nvjpgctxUnmapFrom; - pThis->__nvjpgctxPreDestruct__ = &__nvoc_thunk_RsResource_nvjpgctxPreDestruct; + // nvjpgctxGetRefCount -- virtual inherited (res) base (chandes) + pThis->__nvjpgctxGetRefCount__ = &__nvoc_up_thunk_RsResource_nvjpgctxGetRefCount; - pThis->__nvjpgctxIsDuplicate__ = &__nvoc_thunk_RsResource_nvjpgctxIsDuplicate; + // nvjpgctxAddAdditionalDependants -- virtual inherited (res) base (chandes) + pThis->__nvjpgctxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_nvjpgctxAddAdditionalDependants; - pThis->__nvjpgctxControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_nvjpgctxControlSerialization_Epilogue; + // nvjpgctxGetNotificationListPtr -- virtual inherited (notify) base (chandes) + pThis->__nvjpgctxGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_nvjpgctxGetNotificationListPtr; - pThis->__nvjpgctxGetNotificationListPtr__ = &__nvoc_thunk_Notifier_nvjpgctxGetNotificationListPtr; + // nvjpgctxGetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__nvjpgctxGetNotificationShare__ = &__nvoc_up_thunk_Notifier_nvjpgctxGetNotificationShare; - pThis->__nvjpgctxGetNotificationShare__ = &__nvoc_thunk_Notifier_nvjpgctxGetNotificationShare; + // nvjpgctxSetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__nvjpgctxSetNotificationShare__ = &__nvoc_up_thunk_Notifier_nvjpgctxSetNotificationShare; - pThis->__nvjpgctxMap__ = &__nvoc_thunk_GpuResource_nvjpgctxMap; + // nvjpgctxUnregisterEvent -- virtual inherited (notify) base (chandes) + pThis->__nvjpgctxUnregisterEvent__ = &__nvoc_up_thunk_Notifier_nvjpgctxUnregisterEvent; - pThis->__nvjpgctxGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_nvjpgctxGetOrAllocNotifShare; -} + // nvjpgctxGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) + pThis->__nvjpgctxGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_nvjpgctxGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_NvjpgContext_1 with approximately 32 basic block(s). + +// Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_NvjpgContext(NvjpgContext *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 32 per-object function pointer(s). __nvoc_init_funcTable_NvjpgContext_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_nvjpg_ctx_nvoc.h b/src/nvidia/generated/g_kernel_nvjpg_ctx_nvoc.h index ba40b0272f..f7c3e16f6c 100644 --- a/src/nvidia/generated/g_kernel_nvjpg_ctx_nvoc.h +++ b/src/nvidia/generated/g_kernel_nvjpg_ctx_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_NVJPG_CTX_NVOC_H_ #define _G_KERNEL_NVJPG_CTX_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_nvjpg_ctx_nvoc.h" #ifndef KERNEL_NVJPG_CTX_H @@ -51,50 +59,59 @@ ENGDESCRIPTOR nvjpgGetEngineDescFromAllocParams(OBJGPU *pGpu, NvU32 externalClas #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct NvjpgContext { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; - struct NvjpgContext *__nvoc_pbase_NvjpgContext; - NV_STATUS (*__nvjpgctxCheckMemInterUnmap__)(struct NvjpgContext *, NvBool); - NvBool (*__nvjpgctxShareCallback__)(struct NvjpgContext *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NvBool (*__nvjpgctxAccessCallback__)(struct NvjpgContext *, struct RsClient *, void *, RsAccessRight); - NV_STATUS (*__nvjpgctxMapTo__)(struct NvjpgContext *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__nvjpgctxGetMapAddrSpace__)(struct NvjpgContext *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__nvjpgctxSetNotificationShare__)(struct NvjpgContext *, struct NotifShare *); - NvU32 (*__nvjpgctxGetRefCount__)(struct NvjpgContext *); - void (*__nvjpgctxAddAdditionalDependants__)(struct RsClient *, struct NvjpgContext *, RsResourceRef *); - NV_STATUS (*__nvjpgctxControl_Prologue__)(struct NvjpgContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nvjpgctxGetRegBaseOffsetAndSize__)(struct NvjpgContext *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__nvjpgctxInternalControlForward__)(struct NvjpgContext *, NvU32, void *, NvU32); - NV_STATUS (*__nvjpgctxUnmapFrom__)(struct NvjpgContext *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__nvjpgctxControl_Epilogue__)(struct NvjpgContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nvjpgctxGetSwMethods__)(struct NvjpgContext *, const METHOD **, NvU32 *); - NvHandle (*__nvjpgctxGetInternalObjectHandle__)(struct NvjpgContext *); - NV_STATUS (*__nvjpgctxControl__)(struct NvjpgContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nvjpgctxUnmap__)(struct NvjpgContext *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__nvjpgctxGetMemInterMapParams__)(struct NvjpgContext *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__nvjpgctxGetMemoryMappingDescriptor__)(struct NvjpgContext *, struct MEMORY_DESCRIPTOR **); - NvBool (*__nvjpgctxIsSwMethodStalling__)(struct NvjpgContext *, NvU32); - NV_STATUS (*__nvjpgctxControlFilter__)(struct NvjpgContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nvjpgctxUnregisterEvent__)(struct NvjpgContext *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__nvjpgctxControlSerialization_Prologue__)(struct NvjpgContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__nvjpgctxCanCopy__)(struct NvjpgContext *); - NvBool (*__nvjpgctxIsPartialUnmapSupported__)(struct NvjpgContext *); - void (*__nvjpgctxPreDestruct__)(struct NvjpgContext *); - NV_STATUS (*__nvjpgctxIsDuplicate__)(struct NvjpgContext *, NvHandle, NvBool *); - void (*__nvjpgctxControlSerialization_Epilogue__)(struct NvjpgContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__nvjpgctxGetNotificationListPtr__)(struct NvjpgContext *); - struct NotifShare *(*__nvjpgctxGetNotificationShare__)(struct NvjpgContext *); - NV_STATUS (*__nvjpgctxMap__)(struct NvjpgContext *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NV_STATUS (*__nvjpgctxGetOrAllocNotifShare__)(struct NvjpgContext *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super^2 + struct INotifier *__nvoc_pbase_INotifier; // inotify super^3 + struct Notifier *__nvoc_pbase_Notifier; // notify super^2 + struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super + struct NvjpgContext *__nvoc_pbase_NvjpgContext; // nvjpgctx + + // Vtable with 32 per-object function pointers + NV_STATUS (*__nvjpgctxGetSwMethods__)(struct NvjpgContext * /*this*/, const METHOD **, NvU32 *); // virtual inherited (chandes) base (chandes) + NvBool (*__nvjpgctxIsSwMethodStalling__)(struct NvjpgContext * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__nvjpgctxCheckMemInterUnmap__)(struct NvjpgContext * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__nvjpgctxControl__)(struct NvjpgContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__nvjpgctxMap__)(struct NvjpgContext * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__nvjpgctxUnmap__)(struct NvjpgContext * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NvBool (*__nvjpgctxShareCallback__)(struct NvjpgContext * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__nvjpgctxGetRegBaseOffsetAndSize__)(struct NvjpgContext * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__nvjpgctxGetMapAddrSpace__)(struct NvjpgContext * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__nvjpgctxInternalControlForward__)(struct NvjpgContext * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (chandes) + NvHandle (*__nvjpgctxGetInternalObjectHandle__)(struct NvjpgContext * /*this*/); // virtual inherited (gpures) base (chandes) + NvBool (*__nvjpgctxAccessCallback__)(struct NvjpgContext * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__nvjpgctxGetMemInterMapParams__)(struct NvjpgContext * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__nvjpgctxGetMemoryMappingDescriptor__)(struct NvjpgContext * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__nvjpgctxControlSerialization_Prologue__)(struct NvjpgContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__nvjpgctxControlSerialization_Epilogue__)(struct NvjpgContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__nvjpgctxControl_Prologue__)(struct NvjpgContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__nvjpgctxControl_Epilogue__)(struct NvjpgContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NvBool (*__nvjpgctxCanCopy__)(struct NvjpgContext * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__nvjpgctxIsDuplicate__)(struct NvjpgContext * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (chandes) + void (*__nvjpgctxPreDestruct__)(struct NvjpgContext * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__nvjpgctxControlFilter__)(struct NvjpgContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (chandes) + NvBool (*__nvjpgctxIsPartialUnmapSupported__)(struct NvjpgContext * /*this*/); // inline virtual inherited (res) base (chandes) body + NV_STATUS (*__nvjpgctxMapTo__)(struct NvjpgContext * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (chandes) + NV_STATUS (*__nvjpgctxUnmapFrom__)(struct NvjpgContext * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (chandes) + NvU32 (*__nvjpgctxGetRefCount__)(struct NvjpgContext * /*this*/); // virtual inherited (res) base (chandes) + void (*__nvjpgctxAddAdditionalDependants__)(struct RsClient *, struct NvjpgContext * /*this*/, RsResourceRef *); // virtual inherited (res) base (chandes) + PEVENTNOTIFICATION * (*__nvjpgctxGetNotificationListPtr__)(struct NvjpgContext * /*this*/); // virtual inherited (notify) base (chandes) + struct NotifShare * (*__nvjpgctxGetNotificationShare__)(struct NvjpgContext * /*this*/); // virtual inherited (notify) base (chandes) + void (*__nvjpgctxSetNotificationShare__)(struct NvjpgContext * /*this*/, struct NotifShare *); // virtual inherited (notify) base (chandes) + NV_STATUS (*__nvjpgctxUnregisterEvent__)(struct NvjpgContext * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (chandes) + NV_STATUS (*__nvjpgctxGetOrAllocNotifShare__)(struct NvjpgContext * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (chandes) }; #ifndef __NVOC_CLASS_NvjpgContext_TYPEDEF__ @@ -106,6 +123,7 @@ typedef struct NvjpgContext NvjpgContext; #define __nvoc_class_id_NvjpgContext 0x08c1ce #endif /* __nvoc_class_id_NvjpgContext */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_NvjpgContext; #define __staticCast_NvjpgContext(pThis) \ @@ -118,138 +136,126 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_NvjpgContext; ((NvjpgContext*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(NvjpgContext))) #endif //__nvoc_kernel_nvjpg_ctx_h_disabled - NV_STATUS __nvoc_objCreateDynamic_NvjpgContext(NvjpgContext**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_NvjpgContext(NvjpgContext**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_NvjpgContext(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_NvjpgContext((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define nvjpgctxGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ +#define nvjpgctxGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) nvjpgctxGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) +#define nvjpgctxIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define nvjpgctxIsSwMethodStalling(pChannelDescendant, hHandle) nvjpgctxIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) +#define nvjpgctxCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ #define nvjpgctxCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) nvjpgctxCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) +#define nvjpgctxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define nvjpgctxControl(pGpuResource, pCallContext, pParams) nvjpgctxControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define nvjpgctxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define nvjpgctxMap(pGpuResource, pCallContext, pParams, pCpuMapping) nvjpgctxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define nvjpgctxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define nvjpgctxUnmap(pGpuResource, pCallContext, pCpuMapping) nvjpgctxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define nvjpgctxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ #define nvjpgctxShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) nvjpgctxShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define nvjpgctxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) nvjpgctxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define nvjpgctxMapTo(pResource, pParams) nvjpgctxMapTo_DISPATCH(pResource, pParams) -#define nvjpgctxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) nvjpgctxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define nvjpgctxSetNotificationShare(pNotifier, pNotifShare) nvjpgctxSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define nvjpgctxGetRefCount(pResource) nvjpgctxGetRefCount_DISPATCH(pResource) -#define nvjpgctxAddAdditionalDependants(pClient, pResource, pReference) nvjpgctxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define nvjpgctxControl_Prologue(pResource, pCallContext, pParams) nvjpgctxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define nvjpgctxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define nvjpgctxGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) nvjpgctxGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define nvjpgctxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define nvjpgctxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) nvjpgctxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define nvjpgctxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define nvjpgctxInternalControlForward(pGpuResource, command, pParams, size) nvjpgctxInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define nvjpgctxUnmapFrom(pResource, pParams) nvjpgctxUnmapFrom_DISPATCH(pResource, pParams) -#define nvjpgctxControl_Epilogue(pResource, pCallContext, pParams) nvjpgctxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define nvjpgctxGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) nvjpgctxGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) +#define nvjpgctxGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define nvjpgctxGetInternalObjectHandle(pGpuResource) nvjpgctxGetInternalObjectHandle_DISPATCH(pGpuResource) -#define nvjpgctxControl(pGpuResource, pCallContext, pParams) nvjpgctxControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define nvjpgctxUnmap(pGpuResource, pCallContext, pCpuMapping) nvjpgctxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define nvjpgctxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define nvjpgctxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) nvjpgctxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define nvjpgctxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define nvjpgctxGetMemInterMapParams(pRmResource, pParams) nvjpgctxGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define nvjpgctxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define nvjpgctxGetMemoryMappingDescriptor(pRmResource, ppMemDesc) nvjpgctxGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define nvjpgctxIsSwMethodStalling(pChannelDescendant, hHandle) nvjpgctxIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define nvjpgctxControlFilter(pResource, pCallContext, pParams) nvjpgctxControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define nvjpgctxUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) nvjpgctxUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define nvjpgctxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define nvjpgctxControlSerialization_Prologue(pResource, pCallContext, pParams) nvjpgctxControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define nvjpgctxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define nvjpgctxControlSerialization_Epilogue(pResource, pCallContext, pParams) nvjpgctxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define nvjpgctxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define nvjpgctxControl_Prologue(pResource, pCallContext, pParams) nvjpgctxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define nvjpgctxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define nvjpgctxControl_Epilogue(pResource, pCallContext, pParams) nvjpgctxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define nvjpgctxCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define nvjpgctxCanCopy(pResource) nvjpgctxCanCopy_DISPATCH(pResource) -#define nvjpgctxIsPartialUnmapSupported(pResource) nvjpgctxIsPartialUnmapSupported_DISPATCH(pResource) -#define nvjpgctxPreDestruct(pResource) nvjpgctxPreDestruct_DISPATCH(pResource) +#define nvjpgctxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define nvjpgctxIsDuplicate(pResource, hMemory, pDuplicate) nvjpgctxIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define nvjpgctxControlSerialization_Epilogue(pResource, pCallContext, pParams) nvjpgctxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define nvjpgctxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define nvjpgctxPreDestruct(pResource) nvjpgctxPreDestruct_DISPATCH(pResource) +#define nvjpgctxControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define nvjpgctxControlFilter(pResource, pCallContext, pParams) nvjpgctxControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define nvjpgctxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define nvjpgctxIsPartialUnmapSupported(pResource) nvjpgctxIsPartialUnmapSupported_DISPATCH(pResource) +#define nvjpgctxMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define nvjpgctxMapTo(pResource, pParams) nvjpgctxMapTo_DISPATCH(pResource, pParams) +#define nvjpgctxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define nvjpgctxUnmapFrom(pResource, pParams) nvjpgctxUnmapFrom_DISPATCH(pResource, pParams) +#define nvjpgctxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define nvjpgctxGetRefCount(pResource) nvjpgctxGetRefCount_DISPATCH(pResource) +#define nvjpgctxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define nvjpgctxAddAdditionalDependants(pClient, pResource, pReference) nvjpgctxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define nvjpgctxGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define nvjpgctxGetNotificationListPtr(pNotifier) nvjpgctxGetNotificationListPtr_DISPATCH(pNotifier) +#define nvjpgctxGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ #define nvjpgctxGetNotificationShare(pNotifier) nvjpgctxGetNotificationShare_DISPATCH(pNotifier) -#define nvjpgctxMap(pGpuResource, pCallContext, pParams, pCpuMapping) nvjpgctxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define nvjpgctxSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define nvjpgctxSetNotificationShare(pNotifier, pNotifShare) nvjpgctxSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define nvjpgctxUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define nvjpgctxUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) nvjpgctxUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define nvjpgctxGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ #define nvjpgctxGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) nvjpgctxGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -NV_STATUS nvjpgctxConstructHal_KERNEL(struct NvjpgContext *pNvjpgContext, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); - -#ifdef __nvoc_kernel_nvjpg_ctx_h_disabled -static inline NV_STATUS nvjpgctxConstructHal(struct NvjpgContext *pNvjpgContext, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - NV_ASSERT_FAILED_PRECOMP("NvjpgContext was disabled!"); - return NV_ERR_NOT_SUPPORTED; +// Dispatch functions +static inline NV_STATUS nvjpgctxGetSwMethods_DISPATCH(struct NvjpgContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { + return pChannelDescendant->__nvjpgctxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); } -#else //__nvoc_kernel_nvjpg_ctx_h_disabled -#define nvjpgctxConstructHal(pNvjpgContext, pCallContext, pParams) nvjpgctxConstructHal_KERNEL(pNvjpgContext, pCallContext, pParams) -#endif //__nvoc_kernel_nvjpg_ctx_h_disabled -#define nvjpgctxConstructHal_HAL(pNvjpgContext, pCallContext, pParams) nvjpgctxConstructHal(pNvjpgContext, pCallContext, pParams) - -void nvjpgctxDestructHal_KERNEL(struct NvjpgContext *pNvjpgContext); - - -#ifdef __nvoc_kernel_nvjpg_ctx_h_disabled -static inline void nvjpgctxDestructHal(struct NvjpgContext *pNvjpgContext) { - NV_ASSERT_FAILED_PRECOMP("NvjpgContext was disabled!"); +static inline NvBool nvjpgctxIsSwMethodStalling_DISPATCH(struct NvjpgContext *pChannelDescendant, NvU32 hHandle) { + return pChannelDescendant->__nvjpgctxIsSwMethodStalling__(pChannelDescendant, hHandle); } -#else //__nvoc_kernel_nvjpg_ctx_h_disabled -#define nvjpgctxDestructHal(pNvjpgContext) nvjpgctxDestructHal_KERNEL(pNvjpgContext) -#endif //__nvoc_kernel_nvjpg_ctx_h_disabled - -#define nvjpgctxDestructHal_HAL(pNvjpgContext) nvjpgctxDestructHal(pNvjpgContext) static inline NV_STATUS nvjpgctxCheckMemInterUnmap_DISPATCH(struct NvjpgContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { return pChannelDescendant->__nvjpgctxCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } -static inline NvBool nvjpgctxShareCallback_DISPATCH(struct NvjpgContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__nvjpgctxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NvBool nvjpgctxAccessCallback_DISPATCH(struct NvjpgContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__nvjpgctxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} - -static inline NV_STATUS nvjpgctxMapTo_DISPATCH(struct NvjpgContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__nvjpgctxMapTo__(pResource, pParams); -} - -static inline NV_STATUS nvjpgctxGetMapAddrSpace_DISPATCH(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__nvjpgctxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); -} - -static inline void nvjpgctxSetNotificationShare_DISPATCH(struct NvjpgContext *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__nvjpgctxSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS nvjpgctxControl_DISPATCH(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__nvjpgctxControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 nvjpgctxGetRefCount_DISPATCH(struct NvjpgContext *pResource) { - return pResource->__nvjpgctxGetRefCount__(pResource); +static inline NV_STATUS nvjpgctxMap_DISPATCH(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__nvjpgctxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void nvjpgctxAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct NvjpgContext *pResource, RsResourceRef *pReference) { - pResource->__nvjpgctxAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS nvjpgctxUnmap_DISPATCH(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__nvjpgctxUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS nvjpgctxControl_Prologue_DISPATCH(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvjpgctxControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool nvjpgctxShareCallback_DISPATCH(struct NvjpgContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__nvjpgctxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS nvjpgctxGetRegBaseOffsetAndSize_DISPATCH(struct NvjpgContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__nvjpgctxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS nvjpgctxInternalControlForward_DISPATCH(struct NvjpgContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__nvjpgctxInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS nvjpgctxUnmapFrom_DISPATCH(struct NvjpgContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__nvjpgctxUnmapFrom__(pResource, pParams); -} - -static inline void nvjpgctxControl_Epilogue_DISPATCH(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nvjpgctxControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS nvjpgctxGetMapAddrSpace_DISPATCH(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__nvjpgctxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NV_STATUS nvjpgctxGetSwMethods_DISPATCH(struct NvjpgContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return pChannelDescendant->__nvjpgctxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); +static inline NV_STATUS nvjpgctxInternalControlForward_DISPATCH(struct NvjpgContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__nvjpgctxInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle nvjpgctxGetInternalObjectHandle_DISPATCH(struct NvjpgContext *pGpuResource) { return pGpuResource->__nvjpgctxGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS nvjpgctxControl_DISPATCH(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__nvjpgctxControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS nvjpgctxUnmap_DISPATCH(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__nvjpgctxUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool nvjpgctxAccessCallback_DISPATCH(struct NvjpgContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__nvjpgctxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS nvjpgctxGetMemInterMapParams_DISPATCH(struct NvjpgContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { @@ -260,58 +266,105 @@ static inline NV_STATUS nvjpgctxGetMemoryMappingDescriptor_DISPATCH(struct Nvjpg return pRmResource->__nvjpgctxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NvBool nvjpgctxIsSwMethodStalling_DISPATCH(struct NvjpgContext *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__nvjpgctxIsSwMethodStalling__(pChannelDescendant, hHandle); +static inline NV_STATUS nvjpgctxControlSerialization_Prologue_DISPATCH(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__nvjpgctxControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS nvjpgctxControlFilter_DISPATCH(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvjpgctxControlFilter__(pResource, pCallContext, pParams); +static inline void nvjpgctxControlSerialization_Epilogue_DISPATCH(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__nvjpgctxControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS nvjpgctxUnregisterEvent_DISPATCH(struct NvjpgContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__nvjpgctxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline NV_STATUS nvjpgctxControl_Prologue_DISPATCH(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__nvjpgctxControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS nvjpgctxControlSerialization_Prologue_DISPATCH(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvjpgctxControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline void nvjpgctxControl_Epilogue_DISPATCH(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__nvjpgctxControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool nvjpgctxCanCopy_DISPATCH(struct NvjpgContext *pResource) { return pResource->__nvjpgctxCanCopy__(pResource); } -static inline NvBool nvjpgctxIsPartialUnmapSupported_DISPATCH(struct NvjpgContext *pResource) { - return pResource->__nvjpgctxIsPartialUnmapSupported__(pResource); +static inline NV_STATUS nvjpgctxIsDuplicate_DISPATCH(struct NvjpgContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__nvjpgctxIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void nvjpgctxPreDestruct_DISPATCH(struct NvjpgContext *pResource) { pResource->__nvjpgctxPreDestruct__(pResource); } -static inline NV_STATUS nvjpgctxIsDuplicate_DISPATCH(struct NvjpgContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__nvjpgctxIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS nvjpgctxControlFilter_DISPATCH(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__nvjpgctxControlFilter__(pResource, pCallContext, pParams); } -static inline void nvjpgctxControlSerialization_Epilogue_DISPATCH(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nvjpgctxControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool nvjpgctxIsPartialUnmapSupported_DISPATCH(struct NvjpgContext *pResource) { + return pResource->__nvjpgctxIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS nvjpgctxMapTo_DISPATCH(struct NvjpgContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__nvjpgctxMapTo__(pResource, pParams); +} + +static inline NV_STATUS nvjpgctxUnmapFrom_DISPATCH(struct NvjpgContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__nvjpgctxUnmapFrom__(pResource, pParams); +} + +static inline NvU32 nvjpgctxGetRefCount_DISPATCH(struct NvjpgContext *pResource) { + return pResource->__nvjpgctxGetRefCount__(pResource); } -static inline PEVENTNOTIFICATION *nvjpgctxGetNotificationListPtr_DISPATCH(struct NvjpgContext *pNotifier) { +static inline void nvjpgctxAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct NvjpgContext *pResource, RsResourceRef *pReference) { + pResource->__nvjpgctxAddAdditionalDependants__(pClient, pResource, pReference); +} + +static inline PEVENTNOTIFICATION * nvjpgctxGetNotificationListPtr_DISPATCH(struct NvjpgContext *pNotifier) { return pNotifier->__nvjpgctxGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *nvjpgctxGetNotificationShare_DISPATCH(struct NvjpgContext *pNotifier) { +static inline struct NotifShare * nvjpgctxGetNotificationShare_DISPATCH(struct NvjpgContext *pNotifier) { return pNotifier->__nvjpgctxGetNotificationShare__(pNotifier); } -static inline NV_STATUS nvjpgctxMap_DISPATCH(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__nvjpgctxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void nvjpgctxSetNotificationShare_DISPATCH(struct NvjpgContext *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__nvjpgctxSetNotificationShare__(pNotifier, pNotifShare); +} + +static inline NV_STATUS nvjpgctxUnregisterEvent_DISPATCH(struct NvjpgContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__nvjpgctxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS nvjpgctxGetOrAllocNotifShare_DISPATCH(struct NvjpgContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return pNotifier->__nvjpgctxGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } +NV_STATUS nvjpgctxConstructHal_KERNEL(struct NvjpgContext *pNvjpgContext, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); + + +#ifdef __nvoc_kernel_nvjpg_ctx_h_disabled +static inline NV_STATUS nvjpgctxConstructHal(struct NvjpgContext *pNvjpgContext, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + NV_ASSERT_FAILED_PRECOMP("NvjpgContext was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kernel_nvjpg_ctx_h_disabled +#define nvjpgctxConstructHal(pNvjpgContext, pCallContext, pParams) nvjpgctxConstructHal_KERNEL(pNvjpgContext, pCallContext, pParams) +#endif //__nvoc_kernel_nvjpg_ctx_h_disabled + +#define nvjpgctxConstructHal_HAL(pNvjpgContext, pCallContext, pParams) nvjpgctxConstructHal(pNvjpgContext, pCallContext, pParams) + +void nvjpgctxDestructHal_KERNEL(struct NvjpgContext *pNvjpgContext); + + +#ifdef __nvoc_kernel_nvjpg_ctx_h_disabled +static inline void nvjpgctxDestructHal(struct NvjpgContext *pNvjpgContext) { + NV_ASSERT_FAILED_PRECOMP("NvjpgContext was disabled!"); +} +#else //__nvoc_kernel_nvjpg_ctx_h_disabled +#define nvjpgctxDestructHal(pNvjpgContext) nvjpgctxDestructHal_KERNEL(pNvjpgContext) +#endif //__nvoc_kernel_nvjpg_ctx_h_disabled + +#define nvjpgctxDestructHal_HAL(pNvjpgContext) nvjpgctxDestructHal(pNvjpgContext) + static inline NV_STATUS __nvoc_nvjpgctxConstruct(struct NvjpgContext *arg_pNvjpgContext, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams) { return nvjpgctxConstructHal(arg_pNvjpgContext, arg_pCallContext, arg_pParams); } diff --git a/src/nvidia/generated/g_kernel_nvlink_nvoc.c b/src/nvidia/generated/g_kernel_nvlink_nvoc.c index 100f06b33c..2e02af6a6b 100644 --- a/src/nvidia/generated/g_kernel_nvlink_nvoc.c +++ b/src/nvidia/generated/g_kernel_nvlink_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelNvlink = /*pExportInfo=*/ &__nvoc_export_info_KernelNvlink }; -static NV_STATUS __nvoc_thunk_KernelNvlink_engstateConstructEngine(struct OBJGPU *arg0, struct OBJENGSTATE *arg1, ENGDESCRIPTOR arg2) { - return knvlinkConstructEngine(arg0, (struct KernelNvlink *)(((unsigned char *)arg1) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg2); +// 7 down-thunk(s) defined to bridge methods in KernelNvlink from superclasses + +// knvlinkConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateConstructEngine(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, ENGDESCRIPTOR arg3) { + return knvlinkConstructEngine(arg1, (struct KernelNvlink *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelNvlink_engstateStatePreInitLocked(struct OBJGPU *arg0, struct OBJENGSTATE *arg1) { - return knvlinkStatePreInitLocked(arg0, (struct KernelNvlink *)(((unsigned char *)arg1) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); +// knvlinkStatePreInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateStatePreInitLocked(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this) { + return knvlinkStatePreInitLocked(arg1, (struct KernelNvlink *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_KernelNvlink_engstateStateLoad(struct OBJGPU *arg0, struct OBJENGSTATE *arg1, NvU32 arg2) { - return knvlinkStateLoad(arg0, (struct KernelNvlink *)(((unsigned char *)arg1) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg2); +// knvlinkStateLoad: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateStateLoad(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3) { + return knvlinkStateLoad(arg1, (struct KernelNvlink *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelNvlink_engstateStatePostLoad(struct OBJGPU *arg0, struct OBJENGSTATE *arg1, NvU32 arg2) { - return knvlinkStatePostLoad(arg0, (struct KernelNvlink *)(((unsigned char *)arg1) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg2); +// knvlinkStatePostLoad: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateStatePostLoad(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3) { + return knvlinkStatePostLoad(arg1, (struct KernelNvlink *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelNvlink_engstateStateUnload(struct OBJGPU *arg0, struct OBJENGSTATE *arg1, NvU32 arg2) { - return knvlinkStateUnload(arg0, (struct KernelNvlink *)(((unsigned char *)arg1) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg2); +// knvlinkStateUnload: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateStateUnload(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3) { + return knvlinkStateUnload(arg1, (struct KernelNvlink *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelNvlink_engstateStatePostUnload(struct OBJGPU *arg0, struct OBJENGSTATE *arg1, NvU32 arg2) { - return knvlinkStatePostUnload(arg0, (struct KernelNvlink *)(((unsigned char *)arg1) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg2); +// knvlinkStatePostUnload: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateStatePostUnload(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3) { + return knvlinkStatePostUnload(arg1, (struct KernelNvlink *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg3); } -static NvBool __nvoc_thunk_KernelNvlink_engstateIsPresent(struct OBJGPU *arg0, struct OBJENGSTATE *arg1) { - return knvlinkIsPresent(arg0, (struct KernelNvlink *)(((unsigned char *)arg1) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); +// knvlinkIsPresent: virtual override (engstate) base (engstate) +static NvBool __nvoc_down_thunk_KernelNvlink_engstateIsPresent(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this) { + return knvlinkIsPresent(arg1, (struct KernelNvlink *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_knvlinkStateInitLocked(POBJGPU pGpu, struct KernelNvlink *pEngstate) { - return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); + +// 7 up-thunk(s) defined to bridge methods in KernelNvlink to superclasses + +// knvlinkInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_knvlinkInitMissing(POBJGPU pGpu, struct KernelNvlink *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_knvlinkStatePreLoad(POBJGPU pGpu, struct KernelNvlink *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg0); +// knvlinkStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreInitUnlocked(POBJGPU pGpu, struct KernelNvlink *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_knvlinkStateDestroy(POBJGPU pGpu, struct KernelNvlink *pEngstate) { - engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); +// knvlinkStateInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_knvlinkStateInitLocked(POBJGPU pGpu, struct KernelNvlink *pEngstate) { + return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_knvlinkStatePreUnload(POBJGPU pGpu, struct KernelNvlink *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg0); +// knvlinkStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_knvlinkStateInitUnlocked(POBJGPU pGpu, struct KernelNvlink *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_knvlinkStateInitUnlocked(POBJGPU pGpu, struct KernelNvlink *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); +// knvlinkStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreLoad(POBJGPU pGpu, struct KernelNvlink *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_knvlinkInitMissing(POBJGPU pGpu, struct KernelNvlink *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); +// knvlinkStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreUnload(POBJGPU pGpu, struct KernelNvlink *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_knvlinkStatePreInitUnlocked(POBJGPU pGpu, struct KernelNvlink *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); +// knvlinkStateDestroy: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_knvlinkStateDestroy(POBJGPU pGpu, struct KernelNvlink *pEngstate) { + engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelNvlink = { /*numEntries=*/ 0, @@ -257,8 +277,6 @@ void __nvoc_init_dataField_KernelNvlink(KernelNvlink *pThis, RmHalspecOwner *pRm } pThis->fabricBaseAddr = (+18446744073709551615ULL); - - pThis->fabricEgmBaseAddr = (+18446744073709551615ULL); } NV_STATUS __nvoc_ctor_OBJENGSTATE(OBJENGSTATE* ); @@ -275,6 +293,7 @@ NV_STATUS __nvoc_ctor_KernelNvlink(KernelNvlink *pThis, RmHalspecOwner *pRmhalsp return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -287,21 +306,35 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); + // knvlinkConstructEngine -- virtual override (engstate) base (engstate) pThis->__knvlinkConstructEngine__ = &knvlinkConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelNvlink_engstateConstructEngine; + // knvlinkStatePreInitLocked -- virtual override (engstate) base (engstate) pThis->__knvlinkStatePreInitLocked__ = &knvlinkStatePreInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_KernelNvlink_engstateStatePreInitLocked; + // knvlinkStateLoad -- virtual override (engstate) base (engstate) pThis->__knvlinkStateLoad__ = &knvlinkStateLoad_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelNvlink_engstateStateLoad; + // knvlinkStatePostLoad -- virtual override (engstate) base (engstate) pThis->__knvlinkStatePostLoad__ = &knvlinkStatePostLoad_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelNvlink_engstateStatePostLoad; + // knvlinkStateUnload -- virtual override (engstate) base (engstate) pThis->__knvlinkStateUnload__ = &knvlinkStateUnload_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelNvlink_engstateStateUnload; + // knvlinkStatePostUnload -- virtual override (engstate) base (engstate) pThis->__knvlinkStatePostUnload__ = &knvlinkStatePostUnload_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ = &__nvoc_down_thunk_KernelNvlink_engstateStatePostUnload; + // knvlinkIsPresent -- virtual override (engstate) base (engstate) pThis->__knvlinkIsPresent__ = &knvlinkIsPresent_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ = &__nvoc_down_thunk_KernelNvlink_engstateIsPresent; - // Hal function -- knvlinkSetUniqueFabricBaseAddress + // knvlinkSetUniqueFabricBaseAddress -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__knvlinkSetUniqueFabricBaseAddress__ = &knvlinkSetUniqueFabricBaseAddress_GH100; @@ -316,7 +349,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkSetUniqueFabricBaseAddress__ = &knvlinkSetUniqueFabricBaseAddress_46f6a7; } - // Hal function -- knvlinkClearUniqueFabricBaseAddress + // knvlinkClearUniqueFabricBaseAddress -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__knvlinkClearUniqueFabricBaseAddress__ = &knvlinkClearUniqueFabricBaseAddress_GH100; @@ -327,29 +360,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkClearUniqueFabricBaseAddress__ = &knvlinkClearUniqueFabricBaseAddress_b3696a; } - // Hal function -- knvlinkSetUniqueFabricEgmBaseAddress - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ - { - pThis->__knvlinkSetUniqueFabricEgmBaseAddress__ = &knvlinkSetUniqueFabricEgmBaseAddress_GH100; - } - // default - else - { - pThis->__knvlinkSetUniqueFabricEgmBaseAddress__ = &knvlinkSetUniqueFabricEgmBaseAddress_46f6a7; - } - - // Hal function -- knvlinkClearUniqueFabricEgmBaseAddress - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ - { - pThis->__knvlinkClearUniqueFabricEgmBaseAddress__ = &knvlinkClearUniqueFabricEgmBaseAddress_GH100; - } - // default - else - { - pThis->__knvlinkClearUniqueFabricEgmBaseAddress__ = &knvlinkClearUniqueFabricEgmBaseAddress_b3696a; - } - - // Hal function -- knvlinkHandleFaultUpInterrupt + // knvlinkHandleFaultUpInterrupt -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__knvlinkHandleFaultUpInterrupt__ = &knvlinkHandleFaultUpInterrupt_GH100; @@ -360,7 +371,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkHandleFaultUpInterrupt__ = &knvlinkHandleFaultUpInterrupt_46f6a7; } - // Hal function -- knvlinkValidateFabricBaseAddress + // knvlinkValidateFabricBaseAddress -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__knvlinkValidateFabricBaseAddress__ = &knvlinkValidateFabricBaseAddress_GH100; @@ -375,18 +386,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkValidateFabricBaseAddress__ = &knvlinkValidateFabricBaseAddress_46f6a7; } - // Hal function -- knvlinkValidateFabricEgmBaseAddress - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ - { - pThis->__knvlinkValidateFabricEgmBaseAddress__ = &knvlinkValidateFabricEgmBaseAddress_GH100; - } - // default - else - { - pThis->__knvlinkValidateFabricEgmBaseAddress__ = &knvlinkValidateFabricEgmBaseAddress_46f6a7; - } - - // Hal function -- knvlinkGetConnectedLinksMask + // knvlinkGetConnectedLinksMask -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000380UL) )) /* ChipHal: TU106 | TU116 | TU117 | GH100 */ { pThis->__knvlinkGetConnectedLinksMask__ = &knvlinkGetConnectedLinksMask_15a734; @@ -396,7 +396,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkGetConnectedLinksMask__ = &knvlinkGetConnectedLinksMask_TU102; } - // Hal function -- knvlinkEnableLinksPostTopology + // knvlinkEnableLinksPostTopology -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000060UL) )) /* ChipHal: TU102 | TU104 */ { pThis->__knvlinkEnableLinksPostTopology__ = &knvlinkEnableLinksPostTopology_GV100; @@ -406,7 +406,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkEnableLinksPostTopology__ = &knvlinkEnableLinksPostTopology_56cd7a; } - // Hal function -- knvlinkOverrideConfig + // knvlinkOverrideConfig -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000060UL) )) /* ChipHal: TU102 | TU104 */ { pThis->__knvlinkOverrideConfig__ = &knvlinkOverrideConfig_GV100; @@ -420,7 +420,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkOverrideConfig__ = &knvlinkOverrideConfig_GA100; } - // Hal function -- knvlinkFilterBridgeLinks + // knvlinkFilterBridgeLinks -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000380UL) )) /* ChipHal: TU106 | TU116 | TU117 */ { pThis->__knvlinkFilterBridgeLinks__ = &knvlinkFilterBridgeLinks_46f6a7; @@ -430,7 +430,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkFilterBridgeLinks__ = &knvlinkFilterBridgeLinks_TU102; } - // Hal function -- knvlinkGetUniquePeerIdMask + // knvlinkGetUniquePeerIdMask -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000060UL) )) /* ChipHal: TU102 | TU104 */ { pThis->__knvlinkGetUniquePeerIdMask__ = &knvlinkGetUniquePeerIdMask_GP100; @@ -440,7 +440,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkGetUniquePeerIdMask__ = &knvlinkGetUniquePeerIdMask_15a734; } - // Hal function -- knvlinkGetUniquePeerId + // knvlinkGetUniquePeerId -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000060UL) )) /* ChipHal: TU102 | TU104 */ { pThis->__knvlinkGetUniquePeerId__ = &knvlinkGetUniquePeerId_GP100; @@ -450,7 +450,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkGetUniquePeerId__ = &knvlinkGetUniquePeerId_c732fb; } - // Hal function -- knvlinkRemoveMapping + // knvlinkRemoveMapping -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000060UL) )) /* ChipHal: TU102 | TU104 */ { pThis->__knvlinkRemoveMapping__ = &knvlinkRemoveMapping_GP100; @@ -464,7 +464,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkRemoveMapping__ = &knvlinkRemoveMapping_GA100; } - // Hal function -- knvlinkGetP2POptimalCEs + // knvlinkGetP2POptimalCEs -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000380UL) )) /* ChipHal: TU106 | TU116 | TU117 */ { pThis->__knvlinkGetP2POptimalCEs__ = &knvlinkGetP2POptimalCEs_56cd7a; @@ -474,7 +474,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkGetP2POptimalCEs__ = &knvlinkGetP2POptimalCEs_GP100; } - // Hal function -- knvlinkConstructHal + // knvlinkConstructHal -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000380UL) )) /* ChipHal: TU106 | TU116 | TU117 */ { pThis->__knvlinkConstructHal__ = &knvlinkConstructHal_56cd7a; @@ -484,7 +484,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkConstructHal__ = &knvlinkConstructHal_GV100; } - // Hal function -- knvlinkSetupPeerMapping + // knvlinkSetupPeerMapping -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000380UL) )) /* ChipHal: TU106 | TU116 | TU117 */ { pThis->__knvlinkSetupPeerMapping__ = &knvlinkSetupPeerMapping_b3696a; @@ -494,7 +494,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkSetupPeerMapping__ = &knvlinkSetupPeerMapping_GP100; } - // Hal function -- knvlinkProgramLinkSpeed + // knvlinkProgramLinkSpeed -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000380UL) )) /* ChipHal: TU106 | TU116 | TU117 */ { pThis->__knvlinkProgramLinkSpeed__ = &knvlinkProgramLinkSpeed_56cd7a; @@ -504,7 +504,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkProgramLinkSpeed__ = &knvlinkProgramLinkSpeed_GV100; } - // Hal function -- knvlinkPoweredUpForD3 + // knvlinkPoweredUpForD3 -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000060UL) )) /* ChipHal: TU102 | TU104 */ { pThis->__knvlinkPoweredUpForD3__ = &knvlinkPoweredUpForD3_TU102; @@ -514,7 +514,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkPoweredUpForD3__ = &knvlinkPoweredUpForD3_491d52; } - // Hal function -- knvlinkIsAliSupported + // knvlinkIsAliSupported -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__knvlinkIsAliSupported__ = &knvlinkIsAliSupported_GH100; @@ -524,7 +524,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkIsAliSupported__ = &knvlinkIsAliSupported_56cd7a; } - // Hal function -- knvlinkPostSetupNvlinkPeer + // knvlinkPostSetupNvlinkPeer -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__knvlinkPostSetupNvlinkPeer__ = &knvlinkPostSetupNvlinkPeer_GH100; @@ -534,7 +534,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkPostSetupNvlinkPeer__ = &knvlinkPostSetupNvlinkPeer_56cd7a; } - // Hal function -- knvlinkDiscoverPostRxDetLinks + // knvlinkDiscoverPostRxDetLinks -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__knvlinkDiscoverPostRxDetLinks__ = &knvlinkDiscoverPostRxDetLinks_GH100; @@ -544,17 +544,18 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkDiscoverPostRxDetLinks__ = &knvlinkDiscoverPostRxDetLinks_46f6a7; } - // Hal function -- knvlinkLogAliDebugMessages + // knvlinkLogAliDebugMessages -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__knvlinkLogAliDebugMessages__ = &knvlinkLogAliDebugMessages_GH100; } + // default else { pThis->__knvlinkLogAliDebugMessages__ = &knvlinkLogAliDebugMessages_46f6a7; } - // Hal function -- knvlinkGetEffectivePeerLinkMask + // knvlinkGetEffectivePeerLinkMask -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__knvlinkGetEffectivePeerLinkMask__ = &knvlinkGetEffectivePeerLinkMask_GH100; @@ -564,7 +565,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkGetEffectivePeerLinkMask__ = &knvlinkGetEffectivePeerLinkMask_b3696a; } - // Hal function -- knvlinkGetNumLinksToBeReducedPerIoctrl + // knvlinkGetNumLinksToBeReducedPerIoctrl -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__knvlinkGetNumLinksToBeReducedPerIoctrl__ = &knvlinkGetNumLinksToBeReducedPerIoctrl_GH100; @@ -574,7 +575,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkGetNumLinksToBeReducedPerIoctrl__ = &knvlinkGetNumLinksToBeReducedPerIoctrl_4a4dee; } - // Hal function -- knvlinkIsBandwidthModeOff + // knvlinkIsBandwidthModeOff -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__knvlinkIsBandwidthModeOff__ = &knvlinkIsBandwidthModeOff_GH100; @@ -584,7 +585,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkIsBandwidthModeOff__ = &knvlinkIsBandwidthModeOff_491d52; } - // Hal function -- knvlinkDirectConnectCheck + // knvlinkDirectConnectCheck -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__knvlinkDirectConnectCheck__ = &knvlinkDirectConnectCheck_GH100; @@ -594,7 +595,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkDirectConnectCheck__ = &knvlinkDirectConnectCheck_b3696a; } - // Hal function -- knvlinkIsGpuReducedNvlinkConfig + // knvlinkIsGpuReducedNvlinkConfig -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0000fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 */ { pThis->__knvlinkIsGpuReducedNvlinkConfig__ = &knvlinkIsGpuReducedNvlinkConfig_GA100; @@ -604,7 +605,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkIsGpuReducedNvlinkConfig__ = &knvlinkIsGpuReducedNvlinkConfig_491d52; } - // Hal function -- knvlinkIsFloorSweepingNeeded + // knvlinkIsFloorSweepingNeeded -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__knvlinkIsFloorSweepingNeeded__ = &knvlinkIsFloorSweepingNeeded_GH100; @@ -614,36 +615,33 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO pThis->__knvlinkIsFloorSweepingNeeded__ = &knvlinkIsFloorSweepingNeeded_491d52; } - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelNvlink_engstateConstructEngine; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_thunk_KernelNvlink_engstateStatePreInitLocked; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_thunk_KernelNvlink_engstateStateLoad; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_thunk_KernelNvlink_engstateStatePostLoad; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_thunk_KernelNvlink_engstateStateUnload; + // knvlinkInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__knvlinkInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkInitMissing; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ = &__nvoc_thunk_KernelNvlink_engstateStatePostUnload; + // knvlinkStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__knvlinkStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreInitUnlocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ = &__nvoc_thunk_KernelNvlink_engstateIsPresent; + // knvlinkStateInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__knvlinkStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkStateInitLocked; - pThis->__knvlinkStateInitLocked__ = &__nvoc_thunk_OBJENGSTATE_knvlinkStateInitLocked; + // knvlinkStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__knvlinkStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkStateInitUnlocked; - pThis->__knvlinkStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_knvlinkStatePreLoad; + // knvlinkStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__knvlinkStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreLoad; - pThis->__knvlinkStateDestroy__ = &__nvoc_thunk_OBJENGSTATE_knvlinkStateDestroy; + // knvlinkStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__knvlinkStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreUnload; - pThis->__knvlinkStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_knvlinkStatePreUnload; + // knvlinkStateDestroy -- virtual inherited (engstate) base (engstate) + pThis->__knvlinkStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkStateDestroy; +} // End __nvoc_init_funcTable_KernelNvlink_1 with approximately 77 basic block(s). - pThis->__knvlinkStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_knvlinkStateInitUnlocked; - - pThis->__knvlinkInitMissing__ = &__nvoc_thunk_OBJENGSTATE_knvlinkInitMissing; - - pThis->__knvlinkStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_knvlinkStatePreInitUnlocked; -} +// Initialize vtable(s) for 40 virtual method(s). void __nvoc_init_funcTable_KernelNvlink(KernelNvlink *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 40 per-object function pointer(s). __nvoc_init_funcTable_KernelNvlink_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_nvlink_nvoc.h b/src/nvidia/generated/g_kernel_nvlink_nvoc.h index 9bcc6b4764..f36ee6770b 100644 --- a/src/nvidia/generated/g_kernel_nvlink_nvoc.h +++ b/src/nvidia/generated/g_kernel_nvlink_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_KERNEL_NVLINK_NVOC_H_ #define _G_KERNEL_NVLINK_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_nvlink_nvoc.h" #ifndef _KERNEL_NVLINK_H_ @@ -220,55 +228,63 @@ MAKE_LIST(FaultUpList, NVLINK_ID); #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelNvlink { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct KernelNvlink *__nvoc_pbase_KernelNvlink; - NV_STATUS (*__knvlinkConstructEngine__)(struct OBJGPU *, struct KernelNvlink *, ENGDESCRIPTOR); - NV_STATUS (*__knvlinkStatePreInitLocked__)(struct OBJGPU *, struct KernelNvlink *); - NV_STATUS (*__knvlinkStateLoad__)(struct OBJGPU *, struct KernelNvlink *, NvU32); - NV_STATUS (*__knvlinkStatePostLoad__)(struct OBJGPU *, struct KernelNvlink *, NvU32); - NV_STATUS (*__knvlinkStateUnload__)(struct OBJGPU *, struct KernelNvlink *, NvU32); - NV_STATUS (*__knvlinkStatePostUnload__)(struct OBJGPU *, struct KernelNvlink *, NvU32); - NvBool (*__knvlinkIsPresent__)(struct OBJGPU *, struct KernelNvlink *); - NV_STATUS (*__knvlinkSetUniqueFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink *, NvU64); - void (*__knvlinkClearUniqueFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink *); - NV_STATUS (*__knvlinkSetUniqueFabricEgmBaseAddress__)(struct OBJGPU *, struct KernelNvlink *, NvU64); - void (*__knvlinkClearUniqueFabricEgmBaseAddress__)(struct OBJGPU *, struct KernelNvlink *); - NV_STATUS (*__knvlinkHandleFaultUpInterrupt__)(struct OBJGPU *, struct KernelNvlink *, NvU32); - NV_STATUS (*__knvlinkValidateFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink *, NvU64); - NV_STATUS (*__knvlinkValidateFabricEgmBaseAddress__)(struct OBJGPU *, struct KernelNvlink *, NvU64); - NvU32 (*__knvlinkGetConnectedLinksMask__)(struct OBJGPU *, struct KernelNvlink *); - NV_STATUS (*__knvlinkEnableLinksPostTopology__)(struct OBJGPU *, struct KernelNvlink *, NvU32); - NV_STATUS (*__knvlinkOverrideConfig__)(struct OBJGPU *, struct KernelNvlink *, NvU32); - NV_STATUS (*__knvlinkFilterBridgeLinks__)(struct OBJGPU *, struct KernelNvlink *); - NvU32 (*__knvlinkGetUniquePeerIdMask__)(struct OBJGPU *, struct KernelNvlink *); - NvU32 (*__knvlinkGetUniquePeerId__)(struct OBJGPU *, struct KernelNvlink *, struct OBJGPU *); - NV_STATUS (*__knvlinkRemoveMapping__)(struct OBJGPU *, struct KernelNvlink *, NvBool, NvU32, NvBool); - NV_STATUS (*__knvlinkGetP2POptimalCEs__)(struct OBJGPU *, struct KernelNvlink *, NvU32, NvU32 *, NvU32 *, NvU32 *, NvU32 *); - NV_STATUS (*__knvlinkConstructHal__)(struct OBJGPU *, struct KernelNvlink *); - void (*__knvlinkSetupPeerMapping__)(struct OBJGPU *, struct KernelNvlink *, struct OBJGPU *, NvU32); - NV_STATUS (*__knvlinkProgramLinkSpeed__)(struct OBJGPU *, struct KernelNvlink *); - NvBool (*__knvlinkPoweredUpForD3__)(struct OBJGPU *, struct KernelNvlink *); - NV_STATUS (*__knvlinkIsAliSupported__)(struct OBJGPU *, struct KernelNvlink *); - NV_STATUS (*__knvlinkPostSetupNvlinkPeer__)(struct OBJGPU *, struct KernelNvlink *); - NV_STATUS (*__knvlinkDiscoverPostRxDetLinks__)(struct OBJGPU *, struct KernelNvlink *, struct OBJGPU *); - NV_STATUS (*__knvlinkLogAliDebugMessages__)(struct OBJGPU *, struct KernelNvlink *); - void (*__knvlinkGetEffectivePeerLinkMask__)(struct OBJGPU *, struct KernelNvlink *, struct OBJGPU *, NvU32 *); - NvU32 (*__knvlinkGetNumLinksToBeReducedPerIoctrl__)(struct OBJGPU *, struct KernelNvlink *); - NvBool (*__knvlinkIsBandwidthModeOff__)(struct KernelNvlink *); - void (*__knvlinkDirectConnectCheck__)(struct OBJGPU *, struct KernelNvlink *); - NvBool (*__knvlinkIsGpuReducedNvlinkConfig__)(struct OBJGPU *, struct KernelNvlink *); - NvBool (*__knvlinkIsFloorSweepingNeeded__)(struct OBJGPU *, struct KernelNvlink *, NvU32, NvU32); - NV_STATUS (*__knvlinkStateInitLocked__)(POBJGPU, struct KernelNvlink *); - NV_STATUS (*__knvlinkStatePreLoad__)(POBJGPU, struct KernelNvlink *, NvU32); - void (*__knvlinkStateDestroy__)(POBJGPU, struct KernelNvlink *); - NV_STATUS (*__knvlinkStatePreUnload__)(POBJGPU, struct KernelNvlink *, NvU32); - NV_STATUS (*__knvlinkStateInitUnlocked__)(POBJGPU, struct KernelNvlink *); - void (*__knvlinkInitMissing__)(POBJGPU, struct KernelNvlink *); - NV_STATUS (*__knvlinkStatePreInitUnlocked__)(POBJGPU, struct KernelNvlink *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct KernelNvlink *__nvoc_pbase_KernelNvlink; // knvlink + + // Vtable with 40 per-object function pointers + NV_STATUS (*__knvlinkConstructEngine__)(struct OBJGPU *, struct KernelNvlink * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__knvlinkStatePreInitLocked__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__knvlinkStateLoad__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__knvlinkStatePostLoad__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__knvlinkStateUnload__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__knvlinkStatePostUnload__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NvBool (*__knvlinkIsPresent__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__knvlinkSetUniqueFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU64); // halified (3 hals) body + void (*__knvlinkClearUniqueFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NV_STATUS (*__knvlinkHandleFaultUpInterrupt__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__knvlinkValidateFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU64); // halified (3 hals) body + NvU32 (*__knvlinkGetConnectedLinksMask__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NV_STATUS (*__knvlinkEnableLinksPostTopology__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__knvlinkOverrideConfig__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // halified (3 hals) body + NV_STATUS (*__knvlinkFilterBridgeLinks__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NvU32 (*__knvlinkGetUniquePeerIdMask__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NvU32 (*__knvlinkGetUniquePeerId__)(struct OBJGPU *, struct KernelNvlink * /*this*/, struct OBJGPU *); // halified (2 hals) body + NV_STATUS (*__knvlinkRemoveMapping__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvBool, NvU32, NvBool); // halified (3 hals) body + NV_STATUS (*__knvlinkGetP2POptimalCEs__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32, NvU32 *, NvU32 *, NvU32 *, NvU32 *); // halified (2 hals) body + NV_STATUS (*__knvlinkConstructHal__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + void (*__knvlinkSetupPeerMapping__)(struct OBJGPU *, struct KernelNvlink * /*this*/, struct OBJGPU *, NvU32); // halified (2 hals) body + NV_STATUS (*__knvlinkProgramLinkSpeed__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NvBool (*__knvlinkPoweredUpForD3__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NV_STATUS (*__knvlinkIsAliSupported__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NV_STATUS (*__knvlinkPostSetupNvlinkPeer__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NV_STATUS (*__knvlinkDiscoverPostRxDetLinks__)(struct OBJGPU *, struct KernelNvlink * /*this*/, struct OBJGPU *); // halified (2 hals) body + NV_STATUS (*__knvlinkLogAliDebugMessages__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvBool); // halified (2 hals) body + void (*__knvlinkGetEffectivePeerLinkMask__)(struct OBJGPU *, struct KernelNvlink * /*this*/, struct OBJGPU *, NvU32 *); // halified (2 hals) body + NvU32 (*__knvlinkGetNumLinksToBeReducedPerIoctrl__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NvBool (*__knvlinkIsBandwidthModeOff__)(struct KernelNvlink * /*this*/); // halified (2 hals) body + void (*__knvlinkDirectConnectCheck__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NvBool (*__knvlinkIsGpuReducedNvlinkConfig__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NvBool (*__knvlinkIsFloorSweepingNeeded__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32, NvU32); // halified (2 hals) body + void (*__knvlinkInitMissing__)(POBJGPU, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__knvlinkStatePreInitUnlocked__)(POBJGPU, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__knvlinkStateInitLocked__)(POBJGPU, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__knvlinkStateInitUnlocked__)(POBJGPU, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__knvlinkStatePreLoad__)(POBJGPU, struct KernelNvlink * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__knvlinkStatePreUnload__)(POBJGPU, struct KernelNvlink * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__knvlinkStateDestroy__)(POBJGPU, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) + + // 16 PDB properties NvBool PDB_PROP_KNVLINK_ENABLED; NvBool PDB_PROP_KNVLINK_L2_POWER_STATE_ENABLED; NvBool PDB_PROP_KNVLINK_UNSET_NVLINK_PEER_SUPPORTED; @@ -284,6 +300,8 @@ struct KernelNvlink { NvBool PDB_PROP_KNVLINK_MINION_GFW_BOOT; NvBool PDB_PROP_KNVLINK_SYSMEM_SUPPORT_ENABLED; NvBool PDB_PROP_KNVLINK_FORCED_LOOPBACK_ON_SWITCH_MODE_ENABLED; + + // Data members struct KernelIoctrl *PRIVATE_FIELD(pKernelIoctrl)[3]; NvU32 PRIVATE_FIELD(ioctrlMask); NvU32 PRIVATE_FIELD(ipVerNvlink); @@ -333,58 +351,65 @@ struct KernelNvlink { NvU32 PRIVATE_FIELD(errorRecoveries)[18]; NvBool PRIVATE_FIELD(bNvswitchProxy); NvU64 PRIVATE_FIELD(fabricBaseAddr); - NvU64 PRIVATE_FIELD(fabricEgmBaseAddr); }; + struct KernelNvlink_PRIVATE { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct KernelNvlink *__nvoc_pbase_KernelNvlink; - NV_STATUS (*__knvlinkConstructEngine__)(struct OBJGPU *, struct KernelNvlink *, ENGDESCRIPTOR); - NV_STATUS (*__knvlinkStatePreInitLocked__)(struct OBJGPU *, struct KernelNvlink *); - NV_STATUS (*__knvlinkStateLoad__)(struct OBJGPU *, struct KernelNvlink *, NvU32); - NV_STATUS (*__knvlinkStatePostLoad__)(struct OBJGPU *, struct KernelNvlink *, NvU32); - NV_STATUS (*__knvlinkStateUnload__)(struct OBJGPU *, struct KernelNvlink *, NvU32); - NV_STATUS (*__knvlinkStatePostUnload__)(struct OBJGPU *, struct KernelNvlink *, NvU32); - NvBool (*__knvlinkIsPresent__)(struct OBJGPU *, struct KernelNvlink *); - NV_STATUS (*__knvlinkSetUniqueFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink *, NvU64); - void (*__knvlinkClearUniqueFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink *); - NV_STATUS (*__knvlinkSetUniqueFabricEgmBaseAddress__)(struct OBJGPU *, struct KernelNvlink *, NvU64); - void (*__knvlinkClearUniqueFabricEgmBaseAddress__)(struct OBJGPU *, struct KernelNvlink *); - NV_STATUS (*__knvlinkHandleFaultUpInterrupt__)(struct OBJGPU *, struct KernelNvlink *, NvU32); - NV_STATUS (*__knvlinkValidateFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink *, NvU64); - NV_STATUS (*__knvlinkValidateFabricEgmBaseAddress__)(struct OBJGPU *, struct KernelNvlink *, NvU64); - NvU32 (*__knvlinkGetConnectedLinksMask__)(struct OBJGPU *, struct KernelNvlink *); - NV_STATUS (*__knvlinkEnableLinksPostTopology__)(struct OBJGPU *, struct KernelNvlink *, NvU32); - NV_STATUS (*__knvlinkOverrideConfig__)(struct OBJGPU *, struct KernelNvlink *, NvU32); - NV_STATUS (*__knvlinkFilterBridgeLinks__)(struct OBJGPU *, struct KernelNvlink *); - NvU32 (*__knvlinkGetUniquePeerIdMask__)(struct OBJGPU *, struct KernelNvlink *); - NvU32 (*__knvlinkGetUniquePeerId__)(struct OBJGPU *, struct KernelNvlink *, struct OBJGPU *); - NV_STATUS (*__knvlinkRemoveMapping__)(struct OBJGPU *, struct KernelNvlink *, NvBool, NvU32, NvBool); - NV_STATUS (*__knvlinkGetP2POptimalCEs__)(struct OBJGPU *, struct KernelNvlink *, NvU32, NvU32 *, NvU32 *, NvU32 *, NvU32 *); - NV_STATUS (*__knvlinkConstructHal__)(struct OBJGPU *, struct KernelNvlink *); - void (*__knvlinkSetupPeerMapping__)(struct OBJGPU *, struct KernelNvlink *, struct OBJGPU *, NvU32); - NV_STATUS (*__knvlinkProgramLinkSpeed__)(struct OBJGPU *, struct KernelNvlink *); - NvBool (*__knvlinkPoweredUpForD3__)(struct OBJGPU *, struct KernelNvlink *); - NV_STATUS (*__knvlinkIsAliSupported__)(struct OBJGPU *, struct KernelNvlink *); - NV_STATUS (*__knvlinkPostSetupNvlinkPeer__)(struct OBJGPU *, struct KernelNvlink *); - NV_STATUS (*__knvlinkDiscoverPostRxDetLinks__)(struct OBJGPU *, struct KernelNvlink *, struct OBJGPU *); - NV_STATUS (*__knvlinkLogAliDebugMessages__)(struct OBJGPU *, struct KernelNvlink *); - void (*__knvlinkGetEffectivePeerLinkMask__)(struct OBJGPU *, struct KernelNvlink *, struct OBJGPU *, NvU32 *); - NvU32 (*__knvlinkGetNumLinksToBeReducedPerIoctrl__)(struct OBJGPU *, struct KernelNvlink *); - NvBool (*__knvlinkIsBandwidthModeOff__)(struct KernelNvlink *); - void (*__knvlinkDirectConnectCheck__)(struct OBJGPU *, struct KernelNvlink *); - NvBool (*__knvlinkIsGpuReducedNvlinkConfig__)(struct OBJGPU *, struct KernelNvlink *); - NvBool (*__knvlinkIsFloorSweepingNeeded__)(struct OBJGPU *, struct KernelNvlink *, NvU32, NvU32); - NV_STATUS (*__knvlinkStateInitLocked__)(POBJGPU, struct KernelNvlink *); - NV_STATUS (*__knvlinkStatePreLoad__)(POBJGPU, struct KernelNvlink *, NvU32); - void (*__knvlinkStateDestroy__)(POBJGPU, struct KernelNvlink *); - NV_STATUS (*__knvlinkStatePreUnload__)(POBJGPU, struct KernelNvlink *, NvU32); - NV_STATUS (*__knvlinkStateInitUnlocked__)(POBJGPU, struct KernelNvlink *); - void (*__knvlinkInitMissing__)(POBJGPU, struct KernelNvlink *); - NV_STATUS (*__knvlinkStatePreInitUnlocked__)(POBJGPU, struct KernelNvlink *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct KernelNvlink *__nvoc_pbase_KernelNvlink; // knvlink + + // Vtable with 40 per-object function pointers + NV_STATUS (*__knvlinkConstructEngine__)(struct OBJGPU *, struct KernelNvlink * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__knvlinkStatePreInitLocked__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__knvlinkStateLoad__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__knvlinkStatePostLoad__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__knvlinkStateUnload__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__knvlinkStatePostUnload__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NvBool (*__knvlinkIsPresent__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__knvlinkSetUniqueFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU64); // halified (3 hals) body + void (*__knvlinkClearUniqueFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NV_STATUS (*__knvlinkHandleFaultUpInterrupt__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__knvlinkValidateFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU64); // halified (3 hals) body + NvU32 (*__knvlinkGetConnectedLinksMask__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NV_STATUS (*__knvlinkEnableLinksPostTopology__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__knvlinkOverrideConfig__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // halified (3 hals) body + NV_STATUS (*__knvlinkFilterBridgeLinks__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NvU32 (*__knvlinkGetUniquePeerIdMask__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NvU32 (*__knvlinkGetUniquePeerId__)(struct OBJGPU *, struct KernelNvlink * /*this*/, struct OBJGPU *); // halified (2 hals) body + NV_STATUS (*__knvlinkRemoveMapping__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvBool, NvU32, NvBool); // halified (3 hals) body + NV_STATUS (*__knvlinkGetP2POptimalCEs__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32, NvU32 *, NvU32 *, NvU32 *, NvU32 *); // halified (2 hals) body + NV_STATUS (*__knvlinkConstructHal__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + void (*__knvlinkSetupPeerMapping__)(struct OBJGPU *, struct KernelNvlink * /*this*/, struct OBJGPU *, NvU32); // halified (2 hals) body + NV_STATUS (*__knvlinkProgramLinkSpeed__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NvBool (*__knvlinkPoweredUpForD3__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NV_STATUS (*__knvlinkIsAliSupported__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NV_STATUS (*__knvlinkPostSetupNvlinkPeer__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NV_STATUS (*__knvlinkDiscoverPostRxDetLinks__)(struct OBJGPU *, struct KernelNvlink * /*this*/, struct OBJGPU *); // halified (2 hals) body + NV_STATUS (*__knvlinkLogAliDebugMessages__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvBool); // halified (2 hals) body + void (*__knvlinkGetEffectivePeerLinkMask__)(struct OBJGPU *, struct KernelNvlink * /*this*/, struct OBJGPU *, NvU32 *); // halified (2 hals) body + NvU32 (*__knvlinkGetNumLinksToBeReducedPerIoctrl__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NvBool (*__knvlinkIsBandwidthModeOff__)(struct KernelNvlink * /*this*/); // halified (2 hals) body + void (*__knvlinkDirectConnectCheck__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NvBool (*__knvlinkIsGpuReducedNvlinkConfig__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NvBool (*__knvlinkIsFloorSweepingNeeded__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32, NvU32); // halified (2 hals) body + void (*__knvlinkInitMissing__)(POBJGPU, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__knvlinkStatePreInitUnlocked__)(POBJGPU, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__knvlinkStateInitLocked__)(POBJGPU, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__knvlinkStateInitUnlocked__)(POBJGPU, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__knvlinkStatePreLoad__)(POBJGPU, struct KernelNvlink * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__knvlinkStatePreUnload__)(POBJGPU, struct KernelNvlink * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__knvlinkStateDestroy__)(POBJGPU, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) + + // 16 PDB properties NvBool PDB_PROP_KNVLINK_ENABLED; NvBool PDB_PROP_KNVLINK_L2_POWER_STATE_ENABLED; NvBool PDB_PROP_KNVLINK_UNSET_NVLINK_PEER_SUPPORTED; @@ -400,6 +425,8 @@ struct KernelNvlink_PRIVATE { NvBool PDB_PROP_KNVLINK_MINION_GFW_BOOT; NvBool PDB_PROP_KNVLINK_SYSMEM_SUPPORT_ENABLED; NvBool PDB_PROP_KNVLINK_FORCED_LOOPBACK_ON_SWITCH_MODE_ENABLED; + + // Data members struct KernelIoctrl *pKernelIoctrl[3]; NvU32 ioctrlMask; NvU32 ipVerNvlink; @@ -449,7 +476,6 @@ struct KernelNvlink_PRIVATE { NvU32 errorRecoveries[18]; NvBool bNvswitchProxy; NvU64 fabricBaseAddr; - NvU64 fabricEgmBaseAddr; }; #ifndef __NVOC_CLASS_KernelNvlink_TYPEDEF__ @@ -461,6 +487,7 @@ typedef struct KernelNvlink KernelNvlink; #define __nvoc_class_id_KernelNvlink 0xce6818 #endif /* __nvoc_class_id_KernelNvlink */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelNvlink; #define __staticCast_KernelNvlink(pThis) \ @@ -473,6 +500,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelNvlink; ((KernelNvlink*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelNvlink))) #endif //__nvoc_kernel_nvlink_h_disabled +// Property macros #define PDB_PROP_KNVLINK_MINION_GFW_BOOT_BASE_CAST #define PDB_PROP_KNVLINK_MINION_GFW_BOOT_BASE_NAME PDB_PROP_KNVLINK_MINION_GFW_BOOT #define PDB_PROP_KNVLINK_CONFIG_REQUIRE_INITIALIZED_LINKS_CHECK_BASE_CAST @@ -512,119 +540,317 @@ NV_STATUS __nvoc_objCreate_KernelNvlink(KernelNvlink**, Dynamic*, NvU32); #define __objCreate_KernelNvlink(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelNvlink((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define knvlinkConstructEngine(arg0, arg1, arg2) knvlinkConstructEngine_DISPATCH(arg0, arg1, arg2) -#define knvlinkStatePreInitLocked(arg0, arg1) knvlinkStatePreInitLocked_DISPATCH(arg0, arg1) -#define knvlinkStateLoad(arg0, arg1, arg2) knvlinkStateLoad_DISPATCH(arg0, arg1, arg2) -#define knvlinkStatePostLoad(arg0, arg1, arg2) knvlinkStatePostLoad_DISPATCH(arg0, arg1, arg2) -#define knvlinkStateUnload(arg0, arg1, arg2) knvlinkStateUnload_DISPATCH(arg0, arg1, arg2) -#define knvlinkStatePostUnload(arg0, arg1, arg2) knvlinkStatePostUnload_DISPATCH(arg0, arg1, arg2) -#define knvlinkIsPresent(arg0, arg1) knvlinkIsPresent_DISPATCH(arg0, arg1) -#define knvlinkSetUniqueFabricBaseAddress(pGpu, pKernelNvlink, arg0) knvlinkSetUniqueFabricBaseAddress_DISPATCH(pGpu, pKernelNvlink, arg0) -#define knvlinkSetUniqueFabricBaseAddress_HAL(pGpu, pKernelNvlink, arg0) knvlinkSetUniqueFabricBaseAddress_DISPATCH(pGpu, pKernelNvlink, arg0) + +// Wrapper macros +#define knvlinkConstructEngine_FNPTR(arg_this) arg_this->__knvlinkConstructEngine__ +#define knvlinkConstructEngine(arg1, arg_this, arg3) knvlinkConstructEngine_DISPATCH(arg1, arg_this, arg3) +#define knvlinkStatePreInitLocked_FNPTR(arg_this) arg_this->__knvlinkStatePreInitLocked__ +#define knvlinkStatePreInitLocked(arg1, arg_this) knvlinkStatePreInitLocked_DISPATCH(arg1, arg_this) +#define knvlinkStateLoad_FNPTR(arg_this) arg_this->__knvlinkStateLoad__ +#define knvlinkStateLoad(arg1, arg_this, arg3) knvlinkStateLoad_DISPATCH(arg1, arg_this, arg3) +#define knvlinkStatePostLoad_FNPTR(arg_this) arg_this->__knvlinkStatePostLoad__ +#define knvlinkStatePostLoad(arg1, arg_this, arg3) knvlinkStatePostLoad_DISPATCH(arg1, arg_this, arg3) +#define knvlinkStateUnload_FNPTR(arg_this) arg_this->__knvlinkStateUnload__ +#define knvlinkStateUnload(arg1, arg_this, arg3) knvlinkStateUnload_DISPATCH(arg1, arg_this, arg3) +#define knvlinkStatePostUnload_FNPTR(arg_this) arg_this->__knvlinkStatePostUnload__ +#define knvlinkStatePostUnload(arg1, arg_this, arg3) knvlinkStatePostUnload_DISPATCH(arg1, arg_this, arg3) +#define knvlinkIsPresent_FNPTR(arg_this) arg_this->__knvlinkIsPresent__ +#define knvlinkIsPresent(arg1, arg_this) knvlinkIsPresent_DISPATCH(arg1, arg_this) +#define knvlinkSetUniqueFabricBaseAddress_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkSetUniqueFabricBaseAddress__ +#define knvlinkSetUniqueFabricBaseAddress(pGpu, pKernelNvlink, arg3) knvlinkSetUniqueFabricBaseAddress_DISPATCH(pGpu, pKernelNvlink, arg3) +#define knvlinkSetUniqueFabricBaseAddress_HAL(pGpu, pKernelNvlink, arg3) knvlinkSetUniqueFabricBaseAddress_DISPATCH(pGpu, pKernelNvlink, arg3) +#define knvlinkClearUniqueFabricBaseAddress_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkClearUniqueFabricBaseAddress__ #define knvlinkClearUniqueFabricBaseAddress(pGpu, pKernelNvlink) knvlinkClearUniqueFabricBaseAddress_DISPATCH(pGpu, pKernelNvlink) #define knvlinkClearUniqueFabricBaseAddress_HAL(pGpu, pKernelNvlink) knvlinkClearUniqueFabricBaseAddress_DISPATCH(pGpu, pKernelNvlink) -#define knvlinkSetUniqueFabricEgmBaseAddress(pGpu, pKernelNvlink, arg0) knvlinkSetUniqueFabricEgmBaseAddress_DISPATCH(pGpu, pKernelNvlink, arg0) -#define knvlinkSetUniqueFabricEgmBaseAddress_HAL(pGpu, pKernelNvlink, arg0) knvlinkSetUniqueFabricEgmBaseAddress_DISPATCH(pGpu, pKernelNvlink, arg0) -#define knvlinkClearUniqueFabricEgmBaseAddress(pGpu, pKernelNvlink) knvlinkClearUniqueFabricEgmBaseAddress_DISPATCH(pGpu, pKernelNvlink) -#define knvlinkClearUniqueFabricEgmBaseAddress_HAL(pGpu, pKernelNvlink) knvlinkClearUniqueFabricEgmBaseAddress_DISPATCH(pGpu, pKernelNvlink) -#define knvlinkHandleFaultUpInterrupt(pGpu, pKernelNvlink, arg0) knvlinkHandleFaultUpInterrupt_DISPATCH(pGpu, pKernelNvlink, arg0) -#define knvlinkHandleFaultUpInterrupt_HAL(pGpu, pKernelNvlink, arg0) knvlinkHandleFaultUpInterrupt_DISPATCH(pGpu, pKernelNvlink, arg0) -#define knvlinkValidateFabricBaseAddress(pGpu, pKernelNvlink, arg0) knvlinkValidateFabricBaseAddress_DISPATCH(pGpu, pKernelNvlink, arg0) -#define knvlinkValidateFabricBaseAddress_HAL(pGpu, pKernelNvlink, arg0) knvlinkValidateFabricBaseAddress_DISPATCH(pGpu, pKernelNvlink, arg0) -#define knvlinkValidateFabricEgmBaseAddress(pGpu, pKernelNvlink, arg0) knvlinkValidateFabricEgmBaseAddress_DISPATCH(pGpu, pKernelNvlink, arg0) -#define knvlinkValidateFabricEgmBaseAddress_HAL(pGpu, pKernelNvlink, arg0) knvlinkValidateFabricEgmBaseAddress_DISPATCH(pGpu, pKernelNvlink, arg0) +#define knvlinkHandleFaultUpInterrupt_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkHandleFaultUpInterrupt__ +#define knvlinkHandleFaultUpInterrupt(pGpu, pKernelNvlink, arg3) knvlinkHandleFaultUpInterrupt_DISPATCH(pGpu, pKernelNvlink, arg3) +#define knvlinkHandleFaultUpInterrupt_HAL(pGpu, pKernelNvlink, arg3) knvlinkHandleFaultUpInterrupt_DISPATCH(pGpu, pKernelNvlink, arg3) +#define knvlinkValidateFabricBaseAddress_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkValidateFabricBaseAddress__ +#define knvlinkValidateFabricBaseAddress(pGpu, pKernelNvlink, arg3) knvlinkValidateFabricBaseAddress_DISPATCH(pGpu, pKernelNvlink, arg3) +#define knvlinkValidateFabricBaseAddress_HAL(pGpu, pKernelNvlink, arg3) knvlinkValidateFabricBaseAddress_DISPATCH(pGpu, pKernelNvlink, arg3) +#define knvlinkGetConnectedLinksMask_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkGetConnectedLinksMask__ #define knvlinkGetConnectedLinksMask(pGpu, pKernelNvlink) knvlinkGetConnectedLinksMask_DISPATCH(pGpu, pKernelNvlink) #define knvlinkGetConnectedLinksMask_HAL(pGpu, pKernelNvlink) knvlinkGetConnectedLinksMask_DISPATCH(pGpu, pKernelNvlink) -#define knvlinkEnableLinksPostTopology(pGpu, pKernelNvlink, arg0) knvlinkEnableLinksPostTopology_DISPATCH(pGpu, pKernelNvlink, arg0) -#define knvlinkEnableLinksPostTopology_HAL(pGpu, pKernelNvlink, arg0) knvlinkEnableLinksPostTopology_DISPATCH(pGpu, pKernelNvlink, arg0) -#define knvlinkOverrideConfig(pGpu, pKernelNvlink, arg0) knvlinkOverrideConfig_DISPATCH(pGpu, pKernelNvlink, arg0) -#define knvlinkOverrideConfig_HAL(pGpu, pKernelNvlink, arg0) knvlinkOverrideConfig_DISPATCH(pGpu, pKernelNvlink, arg0) +#define knvlinkEnableLinksPostTopology_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkEnableLinksPostTopology__ +#define knvlinkEnableLinksPostTopology(pGpu, pKernelNvlink, arg3) knvlinkEnableLinksPostTopology_DISPATCH(pGpu, pKernelNvlink, arg3) +#define knvlinkEnableLinksPostTopology_HAL(pGpu, pKernelNvlink, arg3) knvlinkEnableLinksPostTopology_DISPATCH(pGpu, pKernelNvlink, arg3) +#define knvlinkOverrideConfig_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkOverrideConfig__ +#define knvlinkOverrideConfig(pGpu, pKernelNvlink, arg3) knvlinkOverrideConfig_DISPATCH(pGpu, pKernelNvlink, arg3) +#define knvlinkOverrideConfig_HAL(pGpu, pKernelNvlink, arg3) knvlinkOverrideConfig_DISPATCH(pGpu, pKernelNvlink, arg3) +#define knvlinkFilterBridgeLinks_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkFilterBridgeLinks__ #define knvlinkFilterBridgeLinks(pGpu, pKernelNvlink) knvlinkFilterBridgeLinks_DISPATCH(pGpu, pKernelNvlink) #define knvlinkFilterBridgeLinks_HAL(pGpu, pKernelNvlink) knvlinkFilterBridgeLinks_DISPATCH(pGpu, pKernelNvlink) +#define knvlinkGetUniquePeerIdMask_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkGetUniquePeerIdMask__ #define knvlinkGetUniquePeerIdMask(pGpu, pKernelNvlink) knvlinkGetUniquePeerIdMask_DISPATCH(pGpu, pKernelNvlink) #define knvlinkGetUniquePeerIdMask_HAL(pGpu, pKernelNvlink) knvlinkGetUniquePeerIdMask_DISPATCH(pGpu, pKernelNvlink) +#define knvlinkGetUniquePeerId_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkGetUniquePeerId__ #define knvlinkGetUniquePeerId(pGpu, pKernelNvlink, pRemoteGpu) knvlinkGetUniquePeerId_DISPATCH(pGpu, pKernelNvlink, pRemoteGpu) #define knvlinkGetUniquePeerId_HAL(pGpu, pKernelNvlink, pRemoteGpu) knvlinkGetUniquePeerId_DISPATCH(pGpu, pKernelNvlink, pRemoteGpu) +#define knvlinkRemoveMapping_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkRemoveMapping__ #define knvlinkRemoveMapping(pGpu, pKernelNvlink, bAllMapping, peerMask, bL2Entry) knvlinkRemoveMapping_DISPATCH(pGpu, pKernelNvlink, bAllMapping, peerMask, bL2Entry) #define knvlinkRemoveMapping_HAL(pGpu, pKernelNvlink, bAllMapping, peerMask, bL2Entry) knvlinkRemoveMapping_DISPATCH(pGpu, pKernelNvlink, bAllMapping, peerMask, bL2Entry) -#define knvlinkGetP2POptimalCEs(pGpu, pKernelNvlink, arg0, arg1, arg2, arg3, arg4) knvlinkGetP2POptimalCEs_DISPATCH(pGpu, pKernelNvlink, arg0, arg1, arg2, arg3, arg4) -#define knvlinkGetP2POptimalCEs_HAL(pGpu, pKernelNvlink, arg0, arg1, arg2, arg3, arg4) knvlinkGetP2POptimalCEs_DISPATCH(pGpu, pKernelNvlink, arg0, arg1, arg2, arg3, arg4) +#define knvlinkGetP2POptimalCEs_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkGetP2POptimalCEs__ +#define knvlinkGetP2POptimalCEs(pGpu, pKernelNvlink, arg3, arg4, arg5, arg6, arg7) knvlinkGetP2POptimalCEs_DISPATCH(pGpu, pKernelNvlink, arg3, arg4, arg5, arg6, arg7) +#define knvlinkGetP2POptimalCEs_HAL(pGpu, pKernelNvlink, arg3, arg4, arg5, arg6, arg7) knvlinkGetP2POptimalCEs_DISPATCH(pGpu, pKernelNvlink, arg3, arg4, arg5, arg6, arg7) +#define knvlinkConstructHal_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkConstructHal__ #define knvlinkConstructHal(pGpu, pKernelNvlink) knvlinkConstructHal_DISPATCH(pGpu, pKernelNvlink) #define knvlinkConstructHal_HAL(pGpu, pKernelNvlink) knvlinkConstructHal_DISPATCH(pGpu, pKernelNvlink) +#define knvlinkSetupPeerMapping_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkSetupPeerMapping__ #define knvlinkSetupPeerMapping(pGpu, pKernelNvlink, pRemoteGpu, peerId) knvlinkSetupPeerMapping_DISPATCH(pGpu, pKernelNvlink, pRemoteGpu, peerId) #define knvlinkSetupPeerMapping_HAL(pGpu, pKernelNvlink, pRemoteGpu, peerId) knvlinkSetupPeerMapping_DISPATCH(pGpu, pKernelNvlink, pRemoteGpu, peerId) +#define knvlinkProgramLinkSpeed_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkProgramLinkSpeed__ #define knvlinkProgramLinkSpeed(pGpu, pKernelNvlink) knvlinkProgramLinkSpeed_DISPATCH(pGpu, pKernelNvlink) #define knvlinkProgramLinkSpeed_HAL(pGpu, pKernelNvlink) knvlinkProgramLinkSpeed_DISPATCH(pGpu, pKernelNvlink) +#define knvlinkPoweredUpForD3_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkPoweredUpForD3__ #define knvlinkPoweredUpForD3(pGpu, pKernelNvlink) knvlinkPoweredUpForD3_DISPATCH(pGpu, pKernelNvlink) #define knvlinkPoweredUpForD3_HAL(pGpu, pKernelNvlink) knvlinkPoweredUpForD3_DISPATCH(pGpu, pKernelNvlink) +#define knvlinkIsAliSupported_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkIsAliSupported__ #define knvlinkIsAliSupported(pGpu, pKernelNvlink) knvlinkIsAliSupported_DISPATCH(pGpu, pKernelNvlink) #define knvlinkIsAliSupported_HAL(pGpu, pKernelNvlink) knvlinkIsAliSupported_DISPATCH(pGpu, pKernelNvlink) +#define knvlinkPostSetupNvlinkPeer_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkPostSetupNvlinkPeer__ #define knvlinkPostSetupNvlinkPeer(pGpu, pKernelNvlink) knvlinkPostSetupNvlinkPeer_DISPATCH(pGpu, pKernelNvlink) #define knvlinkPostSetupNvlinkPeer_HAL(pGpu, pKernelNvlink) knvlinkPostSetupNvlinkPeer_DISPATCH(pGpu, pKernelNvlink) +#define knvlinkDiscoverPostRxDetLinks_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkDiscoverPostRxDetLinks__ #define knvlinkDiscoverPostRxDetLinks(pGpu, pKernelNvlink, pPeerGpu) knvlinkDiscoverPostRxDetLinks_DISPATCH(pGpu, pKernelNvlink, pPeerGpu) #define knvlinkDiscoverPostRxDetLinks_HAL(pGpu, pKernelNvlink, pPeerGpu) knvlinkDiscoverPostRxDetLinks_DISPATCH(pGpu, pKernelNvlink, pPeerGpu) -#define knvlinkLogAliDebugMessages(pGpu, pKernelNvlink) knvlinkLogAliDebugMessages_DISPATCH(pGpu, pKernelNvlink) -#define knvlinkLogAliDebugMessages_HAL(pGpu, pKernelNvlink) knvlinkLogAliDebugMessages_DISPATCH(pGpu, pKernelNvlink) +#define knvlinkLogAliDebugMessages_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkLogAliDebugMessages__ +#define knvlinkLogAliDebugMessages(pGpu, pKernelNvlink, bFinal) knvlinkLogAliDebugMessages_DISPATCH(pGpu, pKernelNvlink, bFinal) +#define knvlinkLogAliDebugMessages_HAL(pGpu, pKernelNvlink, bFinal) knvlinkLogAliDebugMessages_DISPATCH(pGpu, pKernelNvlink, bFinal) +#define knvlinkGetEffectivePeerLinkMask_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkGetEffectivePeerLinkMask__ #define knvlinkGetEffectivePeerLinkMask(pGpu, pKernelNvlink, pRemoteGpu, pPeerLinkMask) knvlinkGetEffectivePeerLinkMask_DISPATCH(pGpu, pKernelNvlink, pRemoteGpu, pPeerLinkMask) #define knvlinkGetEffectivePeerLinkMask_HAL(pGpu, pKernelNvlink, pRemoteGpu, pPeerLinkMask) knvlinkGetEffectivePeerLinkMask_DISPATCH(pGpu, pKernelNvlink, pRemoteGpu, pPeerLinkMask) +#define knvlinkGetNumLinksToBeReducedPerIoctrl_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkGetNumLinksToBeReducedPerIoctrl__ #define knvlinkGetNumLinksToBeReducedPerIoctrl(pGpu, pKernelNvlink) knvlinkGetNumLinksToBeReducedPerIoctrl_DISPATCH(pGpu, pKernelNvlink) #define knvlinkGetNumLinksToBeReducedPerIoctrl_HAL(pGpu, pKernelNvlink) knvlinkGetNumLinksToBeReducedPerIoctrl_DISPATCH(pGpu, pKernelNvlink) +#define knvlinkIsBandwidthModeOff_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkIsBandwidthModeOff__ #define knvlinkIsBandwidthModeOff(pKernelNvlink) knvlinkIsBandwidthModeOff_DISPATCH(pKernelNvlink) #define knvlinkIsBandwidthModeOff_HAL(pKernelNvlink) knvlinkIsBandwidthModeOff_DISPATCH(pKernelNvlink) +#define knvlinkDirectConnectCheck_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkDirectConnectCheck__ #define knvlinkDirectConnectCheck(pGpu, pKernelNvlink) knvlinkDirectConnectCheck_DISPATCH(pGpu, pKernelNvlink) #define knvlinkDirectConnectCheck_HAL(pGpu, pKernelNvlink) knvlinkDirectConnectCheck_DISPATCH(pGpu, pKernelNvlink) +#define knvlinkIsGpuReducedNvlinkConfig_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkIsGpuReducedNvlinkConfig__ #define knvlinkIsGpuReducedNvlinkConfig(pGpu, pKernelNvlink) knvlinkIsGpuReducedNvlinkConfig_DISPATCH(pGpu, pKernelNvlink) #define knvlinkIsGpuReducedNvlinkConfig_HAL(pGpu, pKernelNvlink) knvlinkIsGpuReducedNvlinkConfig_DISPATCH(pGpu, pKernelNvlink) +#define knvlinkIsFloorSweepingNeeded_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkIsFloorSweepingNeeded__ #define knvlinkIsFloorSweepingNeeded(pGpu, pKernelNvlink, numActiveLinksPerIoctrl, numLinksPerIoctrl) knvlinkIsFloorSweepingNeeded_DISPATCH(pGpu, pKernelNvlink, numActiveLinksPerIoctrl, numLinksPerIoctrl) #define knvlinkIsFloorSweepingNeeded_HAL(pGpu, pKernelNvlink, numActiveLinksPerIoctrl, numLinksPerIoctrl) knvlinkIsFloorSweepingNeeded_DISPATCH(pGpu, pKernelNvlink, numActiveLinksPerIoctrl, numLinksPerIoctrl) -#define knvlinkStateInitLocked(pGpu, pEngstate) knvlinkStateInitLocked_DISPATCH(pGpu, pEngstate) -#define knvlinkStatePreLoad(pGpu, pEngstate, arg0) knvlinkStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define knvlinkStateDestroy(pGpu, pEngstate) knvlinkStateDestroy_DISPATCH(pGpu, pEngstate) -#define knvlinkStatePreUnload(pGpu, pEngstate, arg0) knvlinkStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define knvlinkStateInitUnlocked(pGpu, pEngstate) knvlinkStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define knvlinkInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define knvlinkInitMissing(pGpu, pEngstate) knvlinkInitMissing_DISPATCH(pGpu, pEngstate) +#define knvlinkStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define knvlinkStatePreInitUnlocked(pGpu, pEngstate) knvlinkStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -NvBool knvlinkIsForcedConfig_IMPL(struct OBJGPU *arg0, struct KernelNvlink *arg1); +#define knvlinkStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define knvlinkStateInitLocked(pGpu, pEngstate) knvlinkStateInitLocked_DISPATCH(pGpu, pEngstate) +#define knvlinkStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define knvlinkStateInitUnlocked(pGpu, pEngstate) knvlinkStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define knvlinkStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define knvlinkStatePreLoad(pGpu, pEngstate, arg3) knvlinkStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define knvlinkStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define knvlinkStatePreUnload(pGpu, pEngstate, arg3) knvlinkStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define knvlinkStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define knvlinkStateDestroy(pGpu, pEngstate) knvlinkStateDestroy_DISPATCH(pGpu, pEngstate) + +// Dispatch functions +static inline NV_STATUS knvlinkConstructEngine_DISPATCH(struct OBJGPU *arg1, struct KernelNvlink *arg_this, ENGDESCRIPTOR arg3) { + return arg_this->__knvlinkConstructEngine__(arg1, arg_this, arg3); +} + +static inline NV_STATUS knvlinkStatePreInitLocked_DISPATCH(struct OBJGPU *arg1, struct KernelNvlink *arg_this) { + return arg_this->__knvlinkStatePreInitLocked__(arg1, arg_this); +} + +static inline NV_STATUS knvlinkStateLoad_DISPATCH(struct OBJGPU *arg1, struct KernelNvlink *arg_this, NvU32 arg3) { + return arg_this->__knvlinkStateLoad__(arg1, arg_this, arg3); +} + +static inline NV_STATUS knvlinkStatePostLoad_DISPATCH(struct OBJGPU *arg1, struct KernelNvlink *arg_this, NvU32 arg3) { + return arg_this->__knvlinkStatePostLoad__(arg1, arg_this, arg3); +} + +static inline NV_STATUS knvlinkStateUnload_DISPATCH(struct OBJGPU *arg1, struct KernelNvlink *arg_this, NvU32 arg3) { + return arg_this->__knvlinkStateUnload__(arg1, arg_this, arg3); +} + +static inline NV_STATUS knvlinkStatePostUnload_DISPATCH(struct OBJGPU *arg1, struct KernelNvlink *arg_this, NvU32 arg3) { + return arg_this->__knvlinkStatePostUnload__(arg1, arg_this, arg3); +} + +static inline NvBool knvlinkIsPresent_DISPATCH(struct OBJGPU *arg1, struct KernelNvlink *arg_this) { + return arg_this->__knvlinkIsPresent__(arg1, arg_this); +} + +static inline NV_STATUS knvlinkSetUniqueFabricBaseAddress_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg3) { + return pKernelNvlink->__knvlinkSetUniqueFabricBaseAddress__(pGpu, pKernelNvlink, arg3); +} + +static inline void knvlinkClearUniqueFabricBaseAddress_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { + pKernelNvlink->__knvlinkClearUniqueFabricBaseAddress__(pGpu, pKernelNvlink); +} + +static inline NV_STATUS knvlinkHandleFaultUpInterrupt_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3) { + return pKernelNvlink->__knvlinkHandleFaultUpInterrupt__(pGpu, pKernelNvlink, arg3); +} + +static inline NV_STATUS knvlinkValidateFabricBaseAddress_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg3) { + return pKernelNvlink->__knvlinkValidateFabricBaseAddress__(pGpu, pKernelNvlink, arg3); +} + +static inline NvU32 knvlinkGetConnectedLinksMask_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { + return pKernelNvlink->__knvlinkGetConnectedLinksMask__(pGpu, pKernelNvlink); +} + +static inline NV_STATUS knvlinkEnableLinksPostTopology_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3) { + return pKernelNvlink->__knvlinkEnableLinksPostTopology__(pGpu, pKernelNvlink, arg3); +} + +static inline NV_STATUS knvlinkOverrideConfig_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3) { + return pKernelNvlink->__knvlinkOverrideConfig__(pGpu, pKernelNvlink, arg3); +} + +static inline NV_STATUS knvlinkFilterBridgeLinks_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { + return pKernelNvlink->__knvlinkFilterBridgeLinks__(pGpu, pKernelNvlink); +} + +static inline NvU32 knvlinkGetUniquePeerIdMask_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { + return pKernelNvlink->__knvlinkGetUniquePeerIdMask__(pGpu, pKernelNvlink); +} + +static inline NvU32 knvlinkGetUniquePeerId_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, struct OBJGPU *pRemoteGpu) { + return pKernelNvlink->__knvlinkGetUniquePeerId__(pGpu, pKernelNvlink, pRemoteGpu); +} + +static inline NV_STATUS knvlinkRemoveMapping_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvBool bAllMapping, NvU32 peerMask, NvBool bL2Entry) { + return pKernelNvlink->__knvlinkRemoveMapping__(pGpu, pKernelNvlink, bAllMapping, peerMask, bL2Entry); +} + +static inline NV_STATUS knvlinkGetP2POptimalCEs_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3, NvU32 *arg4, NvU32 *arg5, NvU32 *arg6, NvU32 *arg7) { + return pKernelNvlink->__knvlinkGetP2POptimalCEs__(pGpu, pKernelNvlink, arg3, arg4, arg5, arg6, arg7); +} + +static inline NV_STATUS knvlinkConstructHal_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { + return pKernelNvlink->__knvlinkConstructHal__(pGpu, pKernelNvlink); +} + +static inline void knvlinkSetupPeerMapping_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, struct OBJGPU *pRemoteGpu, NvU32 peerId) { + pKernelNvlink->__knvlinkSetupPeerMapping__(pGpu, pKernelNvlink, pRemoteGpu, peerId); +} + +static inline NV_STATUS knvlinkProgramLinkSpeed_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { + return pKernelNvlink->__knvlinkProgramLinkSpeed__(pGpu, pKernelNvlink); +} + +static inline NvBool knvlinkPoweredUpForD3_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { + return pKernelNvlink->__knvlinkPoweredUpForD3__(pGpu, pKernelNvlink); +} + +static inline NV_STATUS knvlinkIsAliSupported_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { + return pKernelNvlink->__knvlinkIsAliSupported__(pGpu, pKernelNvlink); +} + +static inline NV_STATUS knvlinkPostSetupNvlinkPeer_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { + return pKernelNvlink->__knvlinkPostSetupNvlinkPeer__(pGpu, pKernelNvlink); +} + +static inline NV_STATUS knvlinkDiscoverPostRxDetLinks_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, struct OBJGPU *pPeerGpu) { + return pKernelNvlink->__knvlinkDiscoverPostRxDetLinks__(pGpu, pKernelNvlink, pPeerGpu); +} + +static inline NV_STATUS knvlinkLogAliDebugMessages_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvBool bFinal) { + return pKernelNvlink->__knvlinkLogAliDebugMessages__(pGpu, pKernelNvlink, bFinal); +} + +static inline void knvlinkGetEffectivePeerLinkMask_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, struct OBJGPU *pRemoteGpu, NvU32 *pPeerLinkMask) { + pKernelNvlink->__knvlinkGetEffectivePeerLinkMask__(pGpu, pKernelNvlink, pRemoteGpu, pPeerLinkMask); +} + +static inline NvU32 knvlinkGetNumLinksToBeReducedPerIoctrl_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { + return pKernelNvlink->__knvlinkGetNumLinksToBeReducedPerIoctrl__(pGpu, pKernelNvlink); +} + +static inline NvBool knvlinkIsBandwidthModeOff_DISPATCH(struct KernelNvlink *pKernelNvlink) { + return pKernelNvlink->__knvlinkIsBandwidthModeOff__(pKernelNvlink); +} + +static inline void knvlinkDirectConnectCheck_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { + pKernelNvlink->__knvlinkDirectConnectCheck__(pGpu, pKernelNvlink); +} + +static inline NvBool knvlinkIsGpuReducedNvlinkConfig_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { + return pKernelNvlink->__knvlinkIsGpuReducedNvlinkConfig__(pGpu, pKernelNvlink); +} + +static inline NvBool knvlinkIsFloorSweepingNeeded_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 numActiveLinksPerIoctrl, NvU32 numLinksPerIoctrl) { + return pKernelNvlink->__knvlinkIsFloorSweepingNeeded__(pGpu, pKernelNvlink, numActiveLinksPerIoctrl, numLinksPerIoctrl); +} + +static inline void knvlinkInitMissing_DISPATCH(POBJGPU pGpu, struct KernelNvlink *pEngstate) { + pEngstate->__knvlinkInitMissing__(pGpu, pEngstate); +} + +static inline NV_STATUS knvlinkStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelNvlink *pEngstate) { + return pEngstate->__knvlinkStatePreInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS knvlinkStateInitLocked_DISPATCH(POBJGPU pGpu, struct KernelNvlink *pEngstate) { + return pEngstate->__knvlinkStateInitLocked__(pGpu, pEngstate); +} + +static inline NV_STATUS knvlinkStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelNvlink *pEngstate) { + return pEngstate->__knvlinkStateInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS knvlinkStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelNvlink *pEngstate, NvU32 arg3) { + return pEngstate->__knvlinkStatePreLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS knvlinkStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelNvlink *pEngstate, NvU32 arg3) { + return pEngstate->__knvlinkStatePreUnload__(pGpu, pEngstate, arg3); +} + +static inline void knvlinkStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelNvlink *pEngstate) { + pEngstate->__knvlinkStateDestroy__(pGpu, pEngstate); +} + +NvBool knvlinkIsForcedConfig_IMPL(struct OBJGPU *arg1, struct KernelNvlink *arg2); #ifdef __nvoc_kernel_nvlink_h_disabled -static inline NvBool knvlinkIsForcedConfig(struct OBJGPU *arg0, struct KernelNvlink *arg1) { +static inline NvBool knvlinkIsForcedConfig(struct OBJGPU *arg1, struct KernelNvlink *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_nvlink_h_disabled -#define knvlinkIsForcedConfig(arg0, arg1) knvlinkIsForcedConfig_IMPL(arg0, arg1) +#define knvlinkIsForcedConfig(arg1, arg2) knvlinkIsForcedConfig_IMPL(arg1, arg2) #endif //__nvoc_kernel_nvlink_h_disabled -#define knvlinkIsForcedConfig_HAL(arg0, arg1) knvlinkIsForcedConfig(arg0, arg1) +#define knvlinkIsForcedConfig_HAL(arg1, arg2) knvlinkIsForcedConfig(arg1, arg2) -NV_STATUS knvlinkApplyRegkeyOverrides_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *arg0); +NV_STATUS knvlinkApplyRegkeyOverrides_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *arg2); #ifdef __nvoc_kernel_nvlink_h_disabled -static inline NV_STATUS knvlinkApplyRegkeyOverrides(struct OBJGPU *pGpu, struct KernelNvlink *arg0) { +static inline NV_STATUS knvlinkApplyRegkeyOverrides(struct OBJGPU *pGpu, struct KernelNvlink *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_nvlink_h_disabled -#define knvlinkApplyRegkeyOverrides(pGpu, arg0) knvlinkApplyRegkeyOverrides_IMPL(pGpu, arg0) +#define knvlinkApplyRegkeyOverrides(pGpu, arg2) knvlinkApplyRegkeyOverrides_IMPL(pGpu, arg2) #endif //__nvoc_kernel_nvlink_h_disabled -#define knvlinkApplyRegkeyOverrides_HAL(pGpu, arg0) knvlinkApplyRegkeyOverrides(pGpu, arg0) +#define knvlinkApplyRegkeyOverrides_HAL(pGpu, arg2) knvlinkApplyRegkeyOverrides(pGpu, arg2) -NvBool knvlinkIsNvlinkDefaultEnabled_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *arg0); +NvBool knvlinkIsNvlinkDefaultEnabled_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *arg2); #ifdef __nvoc_kernel_nvlink_h_disabled -static inline NvBool knvlinkIsNvlinkDefaultEnabled(struct OBJGPU *pGpu, struct KernelNvlink *arg0) { +static inline NvBool knvlinkIsNvlinkDefaultEnabled(struct OBJGPU *pGpu, struct KernelNvlink *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_nvlink_h_disabled -#define knvlinkIsNvlinkDefaultEnabled(pGpu, arg0) knvlinkIsNvlinkDefaultEnabled_IMPL(pGpu, arg0) +#define knvlinkIsNvlinkDefaultEnabled(pGpu, arg2) knvlinkIsNvlinkDefaultEnabled_IMPL(pGpu, arg2) #endif //__nvoc_kernel_nvlink_h_disabled -#define knvlinkIsNvlinkDefaultEnabled_HAL(pGpu, arg0) knvlinkIsNvlinkDefaultEnabled(pGpu, arg0) +#define knvlinkIsNvlinkDefaultEnabled_HAL(pGpu, arg2) knvlinkIsNvlinkDefaultEnabled(pGpu, arg2) NvBool knvlinkIsP2pLoopbackSupported_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); @@ -640,19 +866,19 @@ static inline NvBool knvlinkIsP2pLoopbackSupported(struct OBJGPU *pGpu, struct K #define knvlinkIsP2pLoopbackSupported_HAL(pGpu, pKernelNvlink) knvlinkIsP2pLoopbackSupported(pGpu, pKernelNvlink) -NvBool knvlinkIsP2pLoopbackSupportedPerLink_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0); +NvBool knvlinkIsP2pLoopbackSupportedPerLink_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3); #ifdef __nvoc_kernel_nvlink_h_disabled -static inline NvBool knvlinkIsP2pLoopbackSupportedPerLink(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0) { +static inline NvBool knvlinkIsP2pLoopbackSupportedPerLink(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_nvlink_h_disabled -#define knvlinkIsP2pLoopbackSupportedPerLink(pGpu, pKernelNvlink, arg0) knvlinkIsP2pLoopbackSupportedPerLink_IMPL(pGpu, pKernelNvlink, arg0) +#define knvlinkIsP2pLoopbackSupportedPerLink(pGpu, pKernelNvlink, arg3) knvlinkIsP2pLoopbackSupportedPerLink_IMPL(pGpu, pKernelNvlink, arg3) #endif //__nvoc_kernel_nvlink_h_disabled -#define knvlinkIsP2pLoopbackSupportedPerLink_HAL(pGpu, pKernelNvlink, arg0) knvlinkIsP2pLoopbackSupportedPerLink(pGpu, pKernelNvlink, arg0) +#define knvlinkIsP2pLoopbackSupportedPerLink_HAL(pGpu, pKernelNvlink, arg3) knvlinkIsP2pLoopbackSupportedPerLink(pGpu, pKernelNvlink, arg3) NvBool knvlinkIsNvlinkP2pSupported_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, struct OBJGPU *pPeerGpu); @@ -764,19 +990,19 @@ static inline NV_STATUS knvlinkCoreAddDevice(struct OBJGPU *pGpu, struct KernelN #define knvlinkCoreAddDevice_HAL(pGpu, pKernelNvlink) knvlinkCoreAddDevice(pGpu, pKernelNvlink) -NV_STATUS knvlinkCoreAddLink_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0); +NV_STATUS knvlinkCoreAddLink_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3); #ifdef __nvoc_kernel_nvlink_h_disabled -static inline NV_STATUS knvlinkCoreAddLink(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0) { +static inline NV_STATUS knvlinkCoreAddLink(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_nvlink_h_disabled -#define knvlinkCoreAddLink(pGpu, pKernelNvlink, arg0) knvlinkCoreAddLink_IMPL(pGpu, pKernelNvlink, arg0) +#define knvlinkCoreAddLink(pGpu, pKernelNvlink, arg3) knvlinkCoreAddLink_IMPL(pGpu, pKernelNvlink, arg3) #endif //__nvoc_kernel_nvlink_h_disabled -#define knvlinkCoreAddLink_HAL(pGpu, pKernelNvlink, arg0) knvlinkCoreAddLink(pGpu, pKernelNvlink, arg0) +#define knvlinkCoreAddLink_HAL(pGpu, pKernelNvlink, arg3) knvlinkCoreAddLink(pGpu, pKernelNvlink, arg3) NV_STATUS knvlinkCoreRemoveDevice_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); @@ -792,32 +1018,32 @@ static inline NV_STATUS knvlinkCoreRemoveDevice(struct OBJGPU *pGpu, struct Kern #define knvlinkCoreRemoveDevice_HAL(pGpu, pKernelNvlink) knvlinkCoreRemoveDevice(pGpu, pKernelNvlink) -void knvlinkSetDegradedMode_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0); +void knvlinkSetDegradedMode_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3); #ifdef __nvoc_kernel_nvlink_h_disabled -static inline void knvlinkSetDegradedMode(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0) { +static inline void knvlinkSetDegradedMode(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!"); } #else //__nvoc_kernel_nvlink_h_disabled -#define knvlinkSetDegradedMode(pGpu, pKernelNvlink, arg0) knvlinkSetDegradedMode_IMPL(pGpu, pKernelNvlink, arg0) +#define knvlinkSetDegradedMode(pGpu, pKernelNvlink, arg3) knvlinkSetDegradedMode_IMPL(pGpu, pKernelNvlink, arg3) #endif //__nvoc_kernel_nvlink_h_disabled -#define knvlinkSetDegradedMode_HAL(pGpu, pKernelNvlink, arg0) knvlinkSetDegradedMode(pGpu, pKernelNvlink, arg0) +#define knvlinkSetDegradedMode_HAL(pGpu, pKernelNvlink, arg3) knvlinkSetDegradedMode(pGpu, pKernelNvlink, arg3) -NV_STATUS knvlinkCoreRemoveLink_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0); +NV_STATUS knvlinkCoreRemoveLink_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3); #ifdef __nvoc_kernel_nvlink_h_disabled -static inline NV_STATUS knvlinkCoreRemoveLink(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0) { +static inline NV_STATUS knvlinkCoreRemoveLink(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_nvlink_h_disabled -#define knvlinkCoreRemoveLink(pGpu, pKernelNvlink, arg0) knvlinkCoreRemoveLink_IMPL(pGpu, pKernelNvlink, arg0) +#define knvlinkCoreRemoveLink(pGpu, pKernelNvlink, arg3) knvlinkCoreRemoveLink_IMPL(pGpu, pKernelNvlink, arg3) #endif //__nvoc_kernel_nvlink_h_disabled -#define knvlinkCoreRemoveLink_HAL(pGpu, pKernelNvlink, arg0) knvlinkCoreRemoveLink(pGpu, pKernelNvlink, arg0) +#define knvlinkCoreRemoveLink_HAL(pGpu, pKernelNvlink, arg3) knvlinkCoreRemoveLink(pGpu, pKernelNvlink, arg3) NV_STATUS knvlinkCoreShutdownDeviceLinks_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvBool bForcePowerDown); @@ -889,19 +1115,19 @@ static inline NvBool knvlinkIsGpuConnectedToNvswitch(struct OBJGPU *pGpu, struct #define knvlinkIsGpuConnectedToNvswitch_HAL(pGpu, pKernelNvlink) knvlinkIsGpuConnectedToNvswitch(pGpu, pKernelNvlink) -NvBool knvlinkIsLinkConnected_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0); +NvBool knvlinkIsLinkConnected_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3); #ifdef __nvoc_kernel_nvlink_h_disabled -static inline NvBool knvlinkIsLinkConnected(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0) { +static inline NvBool knvlinkIsLinkConnected(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!"); return NV_FALSE; } #else //__nvoc_kernel_nvlink_h_disabled -#define knvlinkIsLinkConnected(pGpu, pKernelNvlink, arg0) knvlinkIsLinkConnected_IMPL(pGpu, pKernelNvlink, arg0) +#define knvlinkIsLinkConnected(pGpu, pKernelNvlink, arg3) knvlinkIsLinkConnected_IMPL(pGpu, pKernelNvlink, arg3) #endif //__nvoc_kernel_nvlink_h_disabled -#define knvlinkIsLinkConnected_HAL(pGpu, pKernelNvlink, arg0) knvlinkIsLinkConnected(pGpu, pKernelNvlink, arg0) +#define knvlinkIsLinkConnected_HAL(pGpu, pKernelNvlink, arg3) knvlinkIsLinkConnected(pGpu, pKernelNvlink, arg3) NV_STATUS knvlinkTrainSysmemLinksToActive_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); @@ -973,33 +1199,33 @@ static inline NV_STATUS knvlinkRetrainLink(struct OBJGPU *pGpu, struct KernelNvl #define knvlinkRetrainLink_HAL(pGpu, pKernelNvlink, linkId, bFromOff) knvlinkRetrainLink(pGpu, pKernelNvlink, linkId, bFromOff) -NvU32 knvlinkGetEnabledLinkMask_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *arg0); +NvU32 knvlinkGetEnabledLinkMask_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *arg2); #ifdef __nvoc_kernel_nvlink_h_disabled -static inline NvU32 knvlinkGetEnabledLinkMask(struct OBJGPU *pGpu, struct KernelNvlink *arg0) { +static inline NvU32 knvlinkGetEnabledLinkMask(struct OBJGPU *pGpu, struct KernelNvlink *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!"); return 0; } #else //__nvoc_kernel_nvlink_h_disabled -#define knvlinkGetEnabledLinkMask(pGpu, arg0) knvlinkGetEnabledLinkMask_IMPL(pGpu, arg0) +#define knvlinkGetEnabledLinkMask(pGpu, arg2) knvlinkGetEnabledLinkMask_IMPL(pGpu, arg2) #endif //__nvoc_kernel_nvlink_h_disabled -#define knvlinkGetEnabledLinkMask_HAL(pGpu, arg0) knvlinkGetEnabledLinkMask(pGpu, arg0) +#define knvlinkGetEnabledLinkMask_HAL(pGpu, arg2) knvlinkGetEnabledLinkMask(pGpu, arg2) -NvU32 knvlinkGetDiscoveredLinkMask_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *arg0); +NvU32 knvlinkGetDiscoveredLinkMask_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *arg2); #ifdef __nvoc_kernel_nvlink_h_disabled -static inline NvU32 knvlinkGetDiscoveredLinkMask(struct OBJGPU *pGpu, struct KernelNvlink *arg0) { +static inline NvU32 knvlinkGetDiscoveredLinkMask(struct OBJGPU *pGpu, struct KernelNvlink *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!"); return 0; } #else //__nvoc_kernel_nvlink_h_disabled -#define knvlinkGetDiscoveredLinkMask(pGpu, arg0) knvlinkGetDiscoveredLinkMask_IMPL(pGpu, arg0) +#define knvlinkGetDiscoveredLinkMask(pGpu, arg2) knvlinkGetDiscoveredLinkMask_IMPL(pGpu, arg2) #endif //__nvoc_kernel_nvlink_h_disabled -#define knvlinkGetDiscoveredLinkMask_HAL(pGpu, arg0) knvlinkGetDiscoveredLinkMask(pGpu, arg0) +#define knvlinkGetDiscoveredLinkMask_HAL(pGpu, arg2) knvlinkGetDiscoveredLinkMask(pGpu, arg2) NV_STATUS knvlinkProcessInitDisabledLinks_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); @@ -1015,19 +1241,19 @@ static inline NV_STATUS knvlinkProcessInitDisabledLinks(struct OBJGPU *pGpu, str #define knvlinkProcessInitDisabledLinks_HAL(pGpu, pKernelNvlink) knvlinkProcessInitDisabledLinks(pGpu, pKernelNvlink) -NvU32 knvlinkGetNumLinksToSystem_IMPL(struct OBJGPU *arg0, struct KernelNvlink *arg1); +NvU32 knvlinkGetNumLinksToSystem_IMPL(struct OBJGPU *arg1, struct KernelNvlink *arg2); #ifdef __nvoc_kernel_nvlink_h_disabled -static inline NvU32 knvlinkGetNumLinksToSystem(struct OBJGPU *arg0, struct KernelNvlink *arg1) { +static inline NvU32 knvlinkGetNumLinksToSystem(struct OBJGPU *arg1, struct KernelNvlink *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!"); return 0; } #else //__nvoc_kernel_nvlink_h_disabled -#define knvlinkGetNumLinksToSystem(arg0, arg1) knvlinkGetNumLinksToSystem_IMPL(arg0, arg1) +#define knvlinkGetNumLinksToSystem(arg1, arg2) knvlinkGetNumLinksToSystem_IMPL(arg1, arg2) #endif //__nvoc_kernel_nvlink_h_disabled -#define knvlinkGetNumLinksToSystem_HAL(arg0, arg1) knvlinkGetNumLinksToSystem(arg0, arg1) +#define knvlinkGetNumLinksToSystem_HAL(arg1, arg2) knvlinkGetNumLinksToSystem(arg1, arg2) NvU32 knvlinkGetNumLinksToPeer_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, struct OBJGPU *pRemoteGpu); @@ -1099,19 +1325,19 @@ static inline NV_STATUS knvlinkPrepareForXVEReset(struct OBJGPU *pGpu, struct Ke #define knvlinkPrepareForXVEReset_HAL(pGpu, pKernelNvlink, bForcePowerDown) knvlinkPrepareForXVEReset(pGpu, pKernelNvlink, bForcePowerDown) -NV_STATUS knvlinkEnterExitSleep_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0, NvBool arg1); +NV_STATUS knvlinkEnterExitSleep_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3, NvBool arg4); #ifdef __nvoc_kernel_nvlink_h_disabled -static inline NV_STATUS knvlinkEnterExitSleep(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0, NvBool arg1) { +static inline NV_STATUS knvlinkEnterExitSleep(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3, NvBool arg4) { NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_nvlink_h_disabled -#define knvlinkEnterExitSleep(pGpu, pKernelNvlink, arg0, arg1) knvlinkEnterExitSleep_IMPL(pGpu, pKernelNvlink, arg0, arg1) +#define knvlinkEnterExitSleep(pGpu, pKernelNvlink, arg3, arg4) knvlinkEnterExitSleep_IMPL(pGpu, pKernelNvlink, arg3, arg4) #endif //__nvoc_kernel_nvlink_h_disabled -#define knvlinkEnterExitSleep_HAL(pGpu, pKernelNvlink, arg0, arg1) knvlinkEnterExitSleep(pGpu, pKernelNvlink, arg0, arg1) +#define knvlinkEnterExitSleep_HAL(pGpu, pKernelNvlink, arg3, arg4) knvlinkEnterExitSleep(pGpu, pKernelNvlink, arg3, arg4) NV_STATUS knvlinkSyncLinkMasksAndVbiosInfo_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); @@ -1169,47 +1395,47 @@ static inline NV_STATUS knvlinkSendInbandData(struct OBJGPU *pGpu, struct Kernel #define knvlinkSendInbandData_HAL(pGpu, pKernelNvlink, pParams) knvlinkSendInbandData(pGpu, pKernelNvlink, pParams) -NV_STATUS knvlinkUpdateLinkConnectionStatus_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0); +NV_STATUS knvlinkUpdateLinkConnectionStatus_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3); #ifdef __nvoc_kernel_nvlink_h_disabled -static inline NV_STATUS knvlinkUpdateLinkConnectionStatus(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0) { +static inline NV_STATUS knvlinkUpdateLinkConnectionStatus(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_nvlink_h_disabled -#define knvlinkUpdateLinkConnectionStatus(pGpu, pKernelNvlink, arg0) knvlinkUpdateLinkConnectionStatus_IMPL(pGpu, pKernelNvlink, arg0) +#define knvlinkUpdateLinkConnectionStatus(pGpu, pKernelNvlink, arg3) knvlinkUpdateLinkConnectionStatus_IMPL(pGpu, pKernelNvlink, arg3) #endif //__nvoc_kernel_nvlink_h_disabled -#define knvlinkUpdateLinkConnectionStatus_HAL(pGpu, pKernelNvlink, arg0) knvlinkUpdateLinkConnectionStatus(pGpu, pKernelNvlink, arg0) +#define knvlinkUpdateLinkConnectionStatus_HAL(pGpu, pKernelNvlink, arg3) knvlinkUpdateLinkConnectionStatus(pGpu, pKernelNvlink, arg3) -NV_STATUS knvlinkPreTrainLinksToActiveAli_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0, NvBool arg1); +NV_STATUS knvlinkPreTrainLinksToActiveAli_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3, NvBool arg4); #ifdef __nvoc_kernel_nvlink_h_disabled -static inline NV_STATUS knvlinkPreTrainLinksToActiveAli(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0, NvBool arg1) { +static inline NV_STATUS knvlinkPreTrainLinksToActiveAli(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3, NvBool arg4) { NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_nvlink_h_disabled -#define knvlinkPreTrainLinksToActiveAli(pGpu, pKernelNvlink, arg0, arg1) knvlinkPreTrainLinksToActiveAli_IMPL(pGpu, pKernelNvlink, arg0, arg1) +#define knvlinkPreTrainLinksToActiveAli(pGpu, pKernelNvlink, arg3, arg4) knvlinkPreTrainLinksToActiveAli_IMPL(pGpu, pKernelNvlink, arg3, arg4) #endif //__nvoc_kernel_nvlink_h_disabled -#define knvlinkPreTrainLinksToActiveAli_HAL(pGpu, pKernelNvlink, arg0, arg1) knvlinkPreTrainLinksToActiveAli(pGpu, pKernelNvlink, arg0, arg1) +#define knvlinkPreTrainLinksToActiveAli_HAL(pGpu, pKernelNvlink, arg3, arg4) knvlinkPreTrainLinksToActiveAli(pGpu, pKernelNvlink, arg3, arg4) -NV_STATUS knvlinkTrainLinksToActiveAli_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0, NvBool arg1); +NV_STATUS knvlinkTrainLinksToActiveAli_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3, NvBool arg4); #ifdef __nvoc_kernel_nvlink_h_disabled -static inline NV_STATUS knvlinkTrainLinksToActiveAli(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0, NvBool arg1) { +static inline NV_STATUS knvlinkTrainLinksToActiveAli(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3, NvBool arg4) { NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_nvlink_h_disabled -#define knvlinkTrainLinksToActiveAli(pGpu, pKernelNvlink, arg0, arg1) knvlinkTrainLinksToActiveAli_IMPL(pGpu, pKernelNvlink, arg0, arg1) +#define knvlinkTrainLinksToActiveAli(pGpu, pKernelNvlink, arg3, arg4) knvlinkTrainLinksToActiveAli_IMPL(pGpu, pKernelNvlink, arg3, arg4) #endif //__nvoc_kernel_nvlink_h_disabled -#define knvlinkTrainLinksToActiveAli_HAL(pGpu, pKernelNvlink, arg0, arg1) knvlinkTrainLinksToActiveAli(pGpu, pKernelNvlink, arg0, arg1) +#define knvlinkTrainLinksToActiveAli_HAL(pGpu, pKernelNvlink, arg3, arg4) knvlinkTrainLinksToActiveAli(pGpu, pKernelNvlink, arg3, arg4) NV_STATUS knvlinkUpdatePostRxDetectLinkMask_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); @@ -1294,19 +1520,19 @@ static inline void knvlinkSetPowerFeatures(struct OBJGPU *pGpu, struct KernelNvl #define knvlinkSetPowerFeatures_HAL(pGpu, pKernelNvlink) knvlinkSetPowerFeatures(pGpu, pKernelNvlink) -NV_STATUS knvlinkExecGspRmRpc_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0, void *arg1, NvU32 arg2); +NV_STATUS knvlinkExecGspRmRpc_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3, void *arg4, NvU32 arg5); #ifdef __nvoc_kernel_nvlink_h_disabled -static inline NV_STATUS knvlinkExecGspRmRpc(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0, void *arg1, NvU32 arg2) { +static inline NV_STATUS knvlinkExecGspRmRpc(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3, void *arg4, NvU32 arg5) { NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_nvlink_h_disabled -#define knvlinkExecGspRmRpc(pGpu, pKernelNvlink, arg0, arg1, arg2) knvlinkExecGspRmRpc_IMPL(pGpu, pKernelNvlink, arg0, arg1, arg2) +#define knvlinkExecGspRmRpc(pGpu, pKernelNvlink, arg3, arg4, arg5) knvlinkExecGspRmRpc_IMPL(pGpu, pKernelNvlink, arg3, arg4, arg5) #endif //__nvoc_kernel_nvlink_h_disabled -#define knvlinkExecGspRmRpc_HAL(pGpu, pKernelNvlink, arg0, arg1, arg2) knvlinkExecGspRmRpc(pGpu, pKernelNvlink, arg0, arg1, arg2) +#define knvlinkExecGspRmRpc_HAL(pGpu, pKernelNvlink, arg3, arg4, arg5) knvlinkExecGspRmRpc(pGpu, pKernelNvlink, arg3, arg4, arg5) NvBool knvlinkIsNvswitchProxyPresent_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); @@ -1335,19 +1561,19 @@ static inline void knvlinkDetectNvswitchProxy(struct OBJGPU *pGpu, struct Kernel #define knvlinkDetectNvswitchProxy_HAL(pGpu, pKernelNvlink) knvlinkDetectNvswitchProxy(pGpu, pKernelNvlink) -NV_STATUS knvlinkSetUniqueFlaBaseAddress_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg0); +NV_STATUS knvlinkSetUniqueFlaBaseAddress_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg3); #ifdef __nvoc_kernel_nvlink_h_disabled -static inline NV_STATUS knvlinkSetUniqueFlaBaseAddress(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg0) { +static inline NV_STATUS knvlinkSetUniqueFlaBaseAddress(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg3) { NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_nvlink_h_disabled -#define knvlinkSetUniqueFlaBaseAddress(pGpu, pKernelNvlink, arg0) knvlinkSetUniqueFlaBaseAddress_IMPL(pGpu, pKernelNvlink, arg0) +#define knvlinkSetUniqueFlaBaseAddress(pGpu, pKernelNvlink, arg3) knvlinkSetUniqueFlaBaseAddress_IMPL(pGpu, pKernelNvlink, arg3) #endif //__nvoc_kernel_nvlink_h_disabled -#define knvlinkSetUniqueFlaBaseAddress_HAL(pGpu, pKernelNvlink, arg0) knvlinkSetUniqueFlaBaseAddress(pGpu, pKernelNvlink, arg0) +#define knvlinkSetUniqueFlaBaseAddress_HAL(pGpu, pKernelNvlink, arg3) knvlinkSetUniqueFlaBaseAddress(pGpu, pKernelNvlink, arg3) NV_STATUS knvlinkFloorSweep_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 numLinksPerIp, NvU32 *pNumActiveLinks); @@ -1380,23 +1606,6 @@ static inline NvU64 knvlinkGetUniqueFabricBaseAddress(struct OBJGPU *pGpu, struc #define knvlinkGetUniqueFabricBaseAddress_HAL(pGpu, pKernelNvlink) knvlinkGetUniqueFabricBaseAddress(pGpu, pKernelNvlink) -static inline NvU64 knvlinkGetUniqueFabricEgmBaseAddress_4de472(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { - struct KernelNvlink_PRIVATE *pKernelNvlink_PRIVATE = (struct KernelNvlink_PRIVATE *)pKernelNvlink; - return pKernelNvlink_PRIVATE->fabricEgmBaseAddr; -} - - -#ifdef __nvoc_kernel_nvlink_h_disabled -static inline NvU64 knvlinkGetUniqueFabricEgmBaseAddress(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { - NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!"); - return 0; -} -#else //__nvoc_kernel_nvlink_h_disabled -#define knvlinkGetUniqueFabricEgmBaseAddress(pGpu, pKernelNvlink) knvlinkGetUniqueFabricEgmBaseAddress_4de472(pGpu, pKernelNvlink) -#endif //__nvoc_kernel_nvlink_h_disabled - -#define knvlinkGetUniqueFabricEgmBaseAddress_HAL(pGpu, pKernelNvlink) knvlinkGetUniqueFabricEgmBaseAddress(pGpu, pKernelNvlink) - NV_STATUS knvlinkStatePostLoadHal_GV100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); @@ -1466,153 +1675,67 @@ static inline void knvlinkCoreGetDevicePciInfo(struct OBJGPU *pGpu, struct Kerne #define knvlinkCoreGetDevicePciInfo_HAL(pGpu, pKernelNvlink, devInfo) knvlinkCoreGetDevicePciInfo(pGpu, pKernelNvlink, devInfo) -NV_STATUS knvlinkConstructEngine_IMPL(struct OBJGPU *arg0, struct KernelNvlink *arg1, ENGDESCRIPTOR arg2); - -static inline NV_STATUS knvlinkConstructEngine_DISPATCH(struct OBJGPU *arg0, struct KernelNvlink *arg1, ENGDESCRIPTOR arg2) { - return arg1->__knvlinkConstructEngine__(arg0, arg1, arg2); -} - -NV_STATUS knvlinkStatePreInitLocked_IMPL(struct OBJGPU *arg0, struct KernelNvlink *arg1); +NV_STATUS knvlinkConstructEngine_IMPL(struct OBJGPU *arg1, struct KernelNvlink *arg2, ENGDESCRIPTOR arg3); -static inline NV_STATUS knvlinkStatePreInitLocked_DISPATCH(struct OBJGPU *arg0, struct KernelNvlink *arg1) { - return arg1->__knvlinkStatePreInitLocked__(arg0, arg1); -} - -NV_STATUS knvlinkStateLoad_IMPL(struct OBJGPU *arg0, struct KernelNvlink *arg1, NvU32 arg2); - -static inline NV_STATUS knvlinkStateLoad_DISPATCH(struct OBJGPU *arg0, struct KernelNvlink *arg1, NvU32 arg2) { - return arg1->__knvlinkStateLoad__(arg0, arg1, arg2); -} - -NV_STATUS knvlinkStatePostLoad_IMPL(struct OBJGPU *arg0, struct KernelNvlink *arg1, NvU32 arg2); +NV_STATUS knvlinkStatePreInitLocked_IMPL(struct OBJGPU *arg1, struct KernelNvlink *arg2); -static inline NV_STATUS knvlinkStatePostLoad_DISPATCH(struct OBJGPU *arg0, struct KernelNvlink *arg1, NvU32 arg2) { - return arg1->__knvlinkStatePostLoad__(arg0, arg1, arg2); -} +NV_STATUS knvlinkStateLoad_IMPL(struct OBJGPU *arg1, struct KernelNvlink *arg2, NvU32 arg3); -NV_STATUS knvlinkStateUnload_IMPL(struct OBJGPU *arg0, struct KernelNvlink *arg1, NvU32 arg2); +NV_STATUS knvlinkStatePostLoad_IMPL(struct OBJGPU *arg1, struct KernelNvlink *arg2, NvU32 arg3); -static inline NV_STATUS knvlinkStateUnload_DISPATCH(struct OBJGPU *arg0, struct KernelNvlink *arg1, NvU32 arg2) { - return arg1->__knvlinkStateUnload__(arg0, arg1, arg2); -} +NV_STATUS knvlinkStateUnload_IMPL(struct OBJGPU *arg1, struct KernelNvlink *arg2, NvU32 arg3); -NV_STATUS knvlinkStatePostUnload_IMPL(struct OBJGPU *arg0, struct KernelNvlink *arg1, NvU32 arg2); +NV_STATUS knvlinkStatePostUnload_IMPL(struct OBJGPU *arg1, struct KernelNvlink *arg2, NvU32 arg3); -static inline NV_STATUS knvlinkStatePostUnload_DISPATCH(struct OBJGPU *arg0, struct KernelNvlink *arg1, NvU32 arg2) { - return arg1->__knvlinkStatePostUnload__(arg0, arg1, arg2); -} +NvBool knvlinkIsPresent_IMPL(struct OBJGPU *arg1, struct KernelNvlink *arg2); -NvBool knvlinkIsPresent_IMPL(struct OBJGPU *arg0, struct KernelNvlink *arg1); - -static inline NvBool knvlinkIsPresent_DISPATCH(struct OBJGPU *arg0, struct KernelNvlink *arg1) { - return arg1->__knvlinkIsPresent__(arg0, arg1); -} +NV_STATUS knvlinkSetUniqueFabricBaseAddress_GV100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg3); -NV_STATUS knvlinkSetUniqueFabricBaseAddress_GV100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg0); +NV_STATUS knvlinkSetUniqueFabricBaseAddress_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg3); -NV_STATUS knvlinkSetUniqueFabricBaseAddress_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg0); - -static inline NV_STATUS knvlinkSetUniqueFabricBaseAddress_46f6a7(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg0) { +static inline NV_STATUS knvlinkSetUniqueFabricBaseAddress_46f6a7(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg3) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS knvlinkSetUniqueFabricBaseAddress_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg0) { - return pKernelNvlink->__knvlinkSetUniqueFabricBaseAddress__(pGpu, pKernelNvlink, arg0); -} - static inline void knvlinkClearUniqueFabricBaseAddress_b3696a(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { return; } void knvlinkClearUniqueFabricBaseAddress_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); -static inline void knvlinkClearUniqueFabricBaseAddress_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { - pKernelNvlink->__knvlinkClearUniqueFabricBaseAddress__(pGpu, pKernelNvlink); -} - -NV_STATUS knvlinkSetUniqueFabricEgmBaseAddress_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg0); +NV_STATUS knvlinkHandleFaultUpInterrupt_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3); -static inline NV_STATUS knvlinkSetUniqueFabricEgmBaseAddress_46f6a7(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg0) { +static inline NV_STATUS knvlinkHandleFaultUpInterrupt_46f6a7(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS knvlinkSetUniqueFabricEgmBaseAddress_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg0) { - return pKernelNvlink->__knvlinkSetUniqueFabricEgmBaseAddress__(pGpu, pKernelNvlink, arg0); -} +NV_STATUS knvlinkValidateFabricBaseAddress_GA100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg3); -static inline void knvlinkClearUniqueFabricEgmBaseAddress_b3696a(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { - return; -} +NV_STATUS knvlinkValidateFabricBaseAddress_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg3); -void knvlinkClearUniqueFabricEgmBaseAddress_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); - -static inline void knvlinkClearUniqueFabricEgmBaseAddress_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { - pKernelNvlink->__knvlinkClearUniqueFabricEgmBaseAddress__(pGpu, pKernelNvlink); -} - -NV_STATUS knvlinkHandleFaultUpInterrupt_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0); - -static inline NV_STATUS knvlinkHandleFaultUpInterrupt_46f6a7(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0) { +static inline NV_STATUS knvlinkValidateFabricBaseAddress_46f6a7(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg3) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS knvlinkHandleFaultUpInterrupt_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0) { - return pKernelNvlink->__knvlinkHandleFaultUpInterrupt__(pGpu, pKernelNvlink, arg0); -} - -NV_STATUS knvlinkValidateFabricBaseAddress_GA100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg0); - -NV_STATUS knvlinkValidateFabricBaseAddress_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg0); - -static inline NV_STATUS knvlinkValidateFabricBaseAddress_46f6a7(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg0) { - return NV_ERR_NOT_SUPPORTED; -} - -static inline NV_STATUS knvlinkValidateFabricBaseAddress_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg0) { - return pKernelNvlink->__knvlinkValidateFabricBaseAddress__(pGpu, pKernelNvlink, arg0); -} - -NV_STATUS knvlinkValidateFabricEgmBaseAddress_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg0); - -static inline NV_STATUS knvlinkValidateFabricEgmBaseAddress_46f6a7(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg0) { - return NV_ERR_NOT_SUPPORTED; -} - -static inline NV_STATUS knvlinkValidateFabricEgmBaseAddress_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg0) { - return pKernelNvlink->__knvlinkValidateFabricEgmBaseAddress__(pGpu, pKernelNvlink, arg0); -} - static inline NvU32 knvlinkGetConnectedLinksMask_15a734(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { return 0U; } NvU32 knvlinkGetConnectedLinksMask_TU102(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); -static inline NvU32 knvlinkGetConnectedLinksMask_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { - return pKernelNvlink->__knvlinkGetConnectedLinksMask__(pGpu, pKernelNvlink); -} - -static inline NV_STATUS knvlinkEnableLinksPostTopology_56cd7a(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0) { +static inline NV_STATUS knvlinkEnableLinksPostTopology_56cd7a(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3) { return NV_OK; } -NV_STATUS knvlinkEnableLinksPostTopology_GV100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0); +NV_STATUS knvlinkEnableLinksPostTopology_GV100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3); -static inline NV_STATUS knvlinkEnableLinksPostTopology_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0) { - return pKernelNvlink->__knvlinkEnableLinksPostTopology__(pGpu, pKernelNvlink, arg0); -} - -static inline NV_STATUS knvlinkOverrideConfig_56cd7a(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0) { +static inline NV_STATUS knvlinkOverrideConfig_56cd7a(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3) { return NV_OK; } -NV_STATUS knvlinkOverrideConfig_GV100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0); - -NV_STATUS knvlinkOverrideConfig_GA100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0); +NV_STATUS knvlinkOverrideConfig_GV100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3); -static inline NV_STATUS knvlinkOverrideConfig_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0) { - return pKernelNvlink->__knvlinkOverrideConfig__(pGpu, pKernelNvlink, arg0); -} +NV_STATUS knvlinkOverrideConfig_GA100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3); NV_STATUS knvlinkFilterBridgeLinks_TU102(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); @@ -1620,30 +1743,18 @@ static inline NV_STATUS knvlinkFilterBridgeLinks_46f6a7(struct OBJGPU *pGpu, str return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS knvlinkFilterBridgeLinks_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { - return pKernelNvlink->__knvlinkFilterBridgeLinks__(pGpu, pKernelNvlink); -} - NvU32 knvlinkGetUniquePeerIdMask_GP100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); static inline NvU32 knvlinkGetUniquePeerIdMask_15a734(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { return 0U; } -static inline NvU32 knvlinkGetUniquePeerIdMask_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { - return pKernelNvlink->__knvlinkGetUniquePeerIdMask__(pGpu, pKernelNvlink); -} - static inline NvU32 knvlinkGetUniquePeerId_c732fb(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, struct OBJGPU *pRemoteGpu) { return 4294967295U; } NvU32 knvlinkGetUniquePeerId_GP100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, struct OBJGPU *pRemoteGpu); -static inline NvU32 knvlinkGetUniquePeerId_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, struct OBJGPU *pRemoteGpu) { - return pKernelNvlink->__knvlinkGetUniquePeerId__(pGpu, pKernelNvlink, pRemoteGpu); -} - static inline NV_STATUS knvlinkRemoveMapping_56cd7a(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvBool bAllMapping, NvU32 peerMask, NvBool bL2Entry) { return NV_OK; } @@ -1652,19 +1763,11 @@ NV_STATUS knvlinkRemoveMapping_GP100(struct OBJGPU *pGpu, struct KernelNvlink *p NV_STATUS knvlinkRemoveMapping_GA100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvBool bAllMapping, NvU32 peerMask, NvBool bL2Entry); -static inline NV_STATUS knvlinkRemoveMapping_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvBool bAllMapping, NvU32 peerMask, NvBool bL2Entry) { - return pKernelNvlink->__knvlinkRemoveMapping__(pGpu, pKernelNvlink, bAllMapping, peerMask, bL2Entry); -} - -static inline NV_STATUS knvlinkGetP2POptimalCEs_56cd7a(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0, NvU32 *arg1, NvU32 *arg2, NvU32 *arg3, NvU32 *arg4) { +static inline NV_STATUS knvlinkGetP2POptimalCEs_56cd7a(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3, NvU32 *arg4, NvU32 *arg5, NvU32 *arg6, NvU32 *arg7) { return NV_OK; } -NV_STATUS knvlinkGetP2POptimalCEs_GP100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0, NvU32 *arg1, NvU32 *arg2, NvU32 *arg3, NvU32 *arg4); - -static inline NV_STATUS knvlinkGetP2POptimalCEs_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg0, NvU32 *arg1, NvU32 *arg2, NvU32 *arg3, NvU32 *arg4) { - return pKernelNvlink->__knvlinkGetP2POptimalCEs__(pGpu, pKernelNvlink, arg0, arg1, arg2, arg3, arg4); -} +NV_STATUS knvlinkGetP2POptimalCEs_GP100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 arg3, NvU32 *arg4, NvU32 *arg5, NvU32 *arg6, NvU32 *arg7); static inline NV_STATUS knvlinkConstructHal_56cd7a(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { return NV_OK; @@ -1672,168 +1775,84 @@ static inline NV_STATUS knvlinkConstructHal_56cd7a(struct OBJGPU *pGpu, struct K NV_STATUS knvlinkConstructHal_GV100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); -static inline NV_STATUS knvlinkConstructHal_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { - return pKernelNvlink->__knvlinkConstructHal__(pGpu, pKernelNvlink); -} - static inline void knvlinkSetupPeerMapping_b3696a(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, struct OBJGPU *pRemoteGpu, NvU32 peerId) { return; } void knvlinkSetupPeerMapping_GP100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, struct OBJGPU *pRemoteGpu, NvU32 peerId); -static inline void knvlinkSetupPeerMapping_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, struct OBJGPU *pRemoteGpu, NvU32 peerId) { - pKernelNvlink->__knvlinkSetupPeerMapping__(pGpu, pKernelNvlink, pRemoteGpu, peerId); -} - static inline NV_STATUS knvlinkProgramLinkSpeed_56cd7a(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { return NV_OK; } NV_STATUS knvlinkProgramLinkSpeed_GV100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); -static inline NV_STATUS knvlinkProgramLinkSpeed_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { - return pKernelNvlink->__knvlinkProgramLinkSpeed__(pGpu, pKernelNvlink); -} - static inline NvBool knvlinkPoweredUpForD3_491d52(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { return ((NvBool)(0 != 0)); } NvBool knvlinkPoweredUpForD3_TU102(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); -static inline NvBool knvlinkPoweredUpForD3_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { - return pKernelNvlink->__knvlinkPoweredUpForD3__(pGpu, pKernelNvlink); -} - static inline NV_STATUS knvlinkIsAliSupported_56cd7a(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { return NV_OK; } NV_STATUS knvlinkIsAliSupported_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); -static inline NV_STATUS knvlinkIsAliSupported_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { - return pKernelNvlink->__knvlinkIsAliSupported__(pGpu, pKernelNvlink); -} - static inline NV_STATUS knvlinkPostSetupNvlinkPeer_56cd7a(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { return NV_OK; } NV_STATUS knvlinkPostSetupNvlinkPeer_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); -static inline NV_STATUS knvlinkPostSetupNvlinkPeer_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { - return pKernelNvlink->__knvlinkPostSetupNvlinkPeer__(pGpu, pKernelNvlink); -} - NV_STATUS knvlinkDiscoverPostRxDetLinks_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, struct OBJGPU *pPeerGpu); static inline NV_STATUS knvlinkDiscoverPostRxDetLinks_46f6a7(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, struct OBJGPU *pPeerGpu) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS knvlinkDiscoverPostRxDetLinks_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, struct OBJGPU *pPeerGpu) { - return pKernelNvlink->__knvlinkDiscoverPostRxDetLinks__(pGpu, pKernelNvlink, pPeerGpu); -} - -NV_STATUS knvlinkLogAliDebugMessages_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); +NV_STATUS knvlinkLogAliDebugMessages_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvBool bFinal); -static inline NV_STATUS knvlinkLogAliDebugMessages_46f6a7(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { +static inline NV_STATUS knvlinkLogAliDebugMessages_46f6a7(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvBool bFinal) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS knvlinkLogAliDebugMessages_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { - return pKernelNvlink->__knvlinkLogAliDebugMessages__(pGpu, pKernelNvlink); -} - static inline void knvlinkGetEffectivePeerLinkMask_b3696a(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, struct OBJGPU *pRemoteGpu, NvU32 *pPeerLinkMask) { return; } void knvlinkGetEffectivePeerLinkMask_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, struct OBJGPU *pRemoteGpu, NvU32 *pPeerLinkMask); -static inline void knvlinkGetEffectivePeerLinkMask_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, struct OBJGPU *pRemoteGpu, NvU32 *pPeerLinkMask) { - pKernelNvlink->__knvlinkGetEffectivePeerLinkMask__(pGpu, pKernelNvlink, pRemoteGpu, pPeerLinkMask); -} - static inline NvU32 knvlinkGetNumLinksToBeReducedPerIoctrl_4a4dee(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { return 0; } NvU32 knvlinkGetNumLinksToBeReducedPerIoctrl_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); -static inline NvU32 knvlinkGetNumLinksToBeReducedPerIoctrl_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { - return pKernelNvlink->__knvlinkGetNumLinksToBeReducedPerIoctrl__(pGpu, pKernelNvlink); -} - static inline NvBool knvlinkIsBandwidthModeOff_491d52(struct KernelNvlink *pKernelNvlink) { return ((NvBool)(0 != 0)); } NvBool knvlinkIsBandwidthModeOff_GH100(struct KernelNvlink *pKernelNvlink); -static inline NvBool knvlinkIsBandwidthModeOff_DISPATCH(struct KernelNvlink *pKernelNvlink) { - return pKernelNvlink->__knvlinkIsBandwidthModeOff__(pKernelNvlink); -} - static inline void knvlinkDirectConnectCheck_b3696a(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { return; } void knvlinkDirectConnectCheck_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); -static inline void knvlinkDirectConnectCheck_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { - pKernelNvlink->__knvlinkDirectConnectCheck__(pGpu, pKernelNvlink); -} - static inline NvBool knvlinkIsGpuReducedNvlinkConfig_491d52(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { return ((NvBool)(0 != 0)); } NvBool knvlinkIsGpuReducedNvlinkConfig_GA100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); -static inline NvBool knvlinkIsGpuReducedNvlinkConfig_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { - return pKernelNvlink->__knvlinkIsGpuReducedNvlinkConfig__(pGpu, pKernelNvlink); -} - static inline NvBool knvlinkIsFloorSweepingNeeded_491d52(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 numActiveLinksPerIoctrl, NvU32 numLinksPerIoctrl) { return ((NvBool)(0 != 0)); } NvBool knvlinkIsFloorSweepingNeeded_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 numActiveLinksPerIoctrl, NvU32 numLinksPerIoctrl); -static inline NvBool knvlinkIsFloorSweepingNeeded_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 numActiveLinksPerIoctrl, NvU32 numLinksPerIoctrl) { - return pKernelNvlink->__knvlinkIsFloorSweepingNeeded__(pGpu, pKernelNvlink, numActiveLinksPerIoctrl, numLinksPerIoctrl); -} - -static inline NV_STATUS knvlinkStateInitLocked_DISPATCH(POBJGPU pGpu, struct KernelNvlink *pEngstate) { - return pEngstate->__knvlinkStateInitLocked__(pGpu, pEngstate); -} - -static inline NV_STATUS knvlinkStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelNvlink *pEngstate, NvU32 arg0) { - return pEngstate->__knvlinkStatePreLoad__(pGpu, pEngstate, arg0); -} - -static inline void knvlinkStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelNvlink *pEngstate) { - pEngstate->__knvlinkStateDestroy__(pGpu, pEngstate); -} - -static inline NV_STATUS knvlinkStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelNvlink *pEngstate, NvU32 arg0) { - return pEngstate->__knvlinkStatePreUnload__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS knvlinkStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelNvlink *pEngstate) { - return pEngstate->__knvlinkStateInitUnlocked__(pGpu, pEngstate); -} - -static inline void knvlinkInitMissing_DISPATCH(POBJGPU pGpu, struct KernelNvlink *pEngstate) { - pEngstate->__knvlinkInitMissing__(pGpu, pEngstate); -} - -static inline NV_STATUS knvlinkStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelNvlink *pEngstate) { - return pEngstate->__knvlinkStatePreInitUnlocked__(pGpu, pEngstate); -} - static inline NvU32 knvlinkGetInitializedLinkMask(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { struct KernelNvlink_PRIVATE *pKernelNvlink_PRIVATE = (struct KernelNvlink_PRIVATE *)pKernelNvlink; return pKernelNvlink_PRIVATE->initializedLinks; @@ -1864,18 +1883,18 @@ static inline NvU32 knvlinkGetMinionControl(struct OBJGPU *pGpu, struct KernelNv return pKernelNvlink_PRIVATE->minionControl; } -void knvlinkDestruct_IMPL(struct KernelNvlink *arg0); +void knvlinkDestruct_IMPL(struct KernelNvlink *arg1); -#define __nvoc_knvlinkDestruct(arg0) knvlinkDestruct_IMPL(arg0) -NV_STATUS knvlinkRemoveMissingIoctrlObjects_IMPL(struct OBJGPU *arg0, struct KernelNvlink *arg1); +#define __nvoc_knvlinkDestruct(arg1) knvlinkDestruct_IMPL(arg1) +NV_STATUS knvlinkRemoveMissingIoctrlObjects_IMPL(struct OBJGPU *arg1, struct KernelNvlink *arg2); #ifdef __nvoc_kernel_nvlink_h_disabled -static inline NV_STATUS knvlinkRemoveMissingIoctrlObjects(struct OBJGPU *arg0, struct KernelNvlink *arg1) { +static inline NV_STATUS knvlinkRemoveMissingIoctrlObjects(struct OBJGPU *arg1, struct KernelNvlink *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_nvlink_h_disabled -#define knvlinkRemoveMissingIoctrlObjects(arg0, arg1) knvlinkRemoveMissingIoctrlObjects_IMPL(arg0, arg1) +#define knvlinkRemoveMissingIoctrlObjects(arg1, arg2) knvlinkRemoveMissingIoctrlObjects_IMPL(arg1, arg2) #endif //__nvoc_kernel_nvlink_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_kernel_ofa_ctx_nvoc.c b/src/nvidia/generated/g_kernel_ofa_ctx_nvoc.c index f333488859..4a61893d49 100644 --- a/src/nvidia/generated/g_kernel_ofa_ctx_nvoc.c +++ b/src/nvidia/generated/g_kernel_ofa_ctx_nvoc.c @@ -120,134 +120,169 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OfaContext = /*pExportInfo=*/ &__nvoc_export_info_OfaContext }; -static NV_STATUS __nvoc_thunk_ChannelDescendant_ofactxCheckMemInterUnmap(struct OfaContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_OfaContext_ChannelDescendant.offset), bSubdeviceHandleProvided); +// 32 up-thunk(s) defined to bridge methods in OfaContext to superclasses + +// ofactxGetSwMethods: virtual inherited (chandes) base (chandes) +static NV_STATUS __nvoc_up_thunk_ChannelDescendant_ofactxGetSwMethods(struct OfaContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { + return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_OfaContext_ChannelDescendant.offset), ppMethods, pNumMethods); } -static NvBool __nvoc_thunk_GpuResource_ofactxShareCallback(struct OfaContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// ofactxIsSwMethodStalling: virtual inherited (chandes) base (chandes) +static NvBool __nvoc_up_thunk_ChannelDescendant_ofactxIsSwMethodStalling(struct OfaContext *pChannelDescendant, NvU32 hHandle) { + return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_OfaContext_ChannelDescendant.offset), hHandle); } -static NvBool __nvoc_thunk_RmResource_ofactxAccessCallback(struct OfaContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_OfaContext_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// ofactxCheckMemInterUnmap: virtual inherited (chandes) base (chandes) +static NV_STATUS __nvoc_up_thunk_ChannelDescendant_ofactxCheckMemInterUnmap(struct OfaContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { + return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_OfaContext_ChannelDescendant.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RsResource_ofactxMapTo(struct OfaContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_OfaContext_RsResource.offset), pParams); +// ofactxControl: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_ofactxControl(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_ofactxGetMapAddrSpace(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// ofactxMap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_ofactxMap(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static void __nvoc_thunk_Notifier_ofactxSetNotificationShare(struct OfaContext *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_OfaContext_Notifier.offset), pNotifShare); +// ofactxUnmap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_ofactxUnmap(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), pCallContext, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_ofactxGetRefCount(struct OfaContext *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_OfaContext_RsResource.offset)); +// ofactxShareCallback: virtual inherited (gpures) base (chandes) +static NvBool __nvoc_up_thunk_GpuResource_ofactxShareCallback(struct OfaContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static void __nvoc_thunk_RsResource_ofactxAddAdditionalDependants(struct RsClient *pClient, struct OfaContext *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_OfaContext_RsResource.offset), pReference); +// ofactxGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_ofactxGetRegBaseOffsetAndSize(struct OfaContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_RmResource_ofactxControl_Prologue(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_OfaContext_RmResource.offset), pCallContext, pParams); +// ofactxGetMapAddrSpace: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_ofactxGetMapAddrSpace(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_GpuResource_ofactxGetRegBaseOffsetAndSize(struct OfaContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), pGpu, pOffset, pSize); +// ofactxInternalControlForward: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_ofactxInternalControlForward(struct OfaContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_GpuResource_ofactxInternalControlForward(struct OfaContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), command, pParams, size); +// ofactxGetInternalObjectHandle: virtual inherited (gpures) base (chandes) +static NvHandle __nvoc_up_thunk_GpuResource_ofactxGetInternalObjectHandle(struct OfaContext *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_ofactxUnmapFrom(struct OfaContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_OfaContext_RsResource.offset), pParams); +// ofactxAccessCallback: virtual inherited (rmres) base (chandes) +static NvBool __nvoc_up_thunk_RmResource_ofactxAccessCallback(struct OfaContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static void __nvoc_thunk_RmResource_ofactxControl_Epilogue(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_OfaContext_RmResource.offset), pCallContext, pParams); +// ofactxGetMemInterMapParams: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_ofactxGetMemInterMapParams(struct OfaContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_OfaContext_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_ChannelDescendant_ofactxGetSwMethods(struct OfaContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_OfaContext_ChannelDescendant.offset), ppMethods, pNumMethods); +// ofactxGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_ofactxGetMemoryMappingDescriptor(struct OfaContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_OfaContext_RmResource.offset), ppMemDesc); } -static NvHandle __nvoc_thunk_GpuResource_ofactxGetInternalObjectHandle(struct OfaContext *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset)); +// ofactxControlSerialization_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_ofactxControlSerialization_Prologue(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_ofactxControl(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), pCallContext, pParams); +// ofactxControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_ofactxControlSerialization_Epilogue(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_ofactxUnmap(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), pCallContext, pCpuMapping); +// ofactxControl_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_ofactxControl_Prologue(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_ofactxGetMemInterMapParams(struct OfaContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_OfaContext_RmResource.offset), pParams); +// ofactxControl_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_ofactxControl_Epilogue(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_ofactxGetMemoryMappingDescriptor(struct OfaContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_OfaContext_RmResource.offset), ppMemDesc); +// ofactxCanCopy: virtual inherited (res) base (chandes) +static NvBool __nvoc_up_thunk_RsResource_ofactxCanCopy(struct OfaContext *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RsResource.offset)); } -static NvBool __nvoc_thunk_ChannelDescendant_ofactxIsSwMethodStalling(struct OfaContext *pChannelDescendant, NvU32 hHandle) { - return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_OfaContext_ChannelDescendant.offset), hHandle); +// ofactxIsDuplicate: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_ofactxIsDuplicate(struct OfaContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_ofactxControlFilter(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_OfaContext_RsResource.offset), pCallContext, pParams); +// ofactxPreDestruct: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_ofactxPreDestruct(struct OfaContext *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_ofactxUnregisterEvent(struct OfaContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_OfaContext_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// ofactxControlFilter: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_ofactxControlFilter(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_ofactxControlSerialization_Prologue(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_OfaContext_RmResource.offset), pCallContext, pParams); +// ofactxIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body +static NvBool __nvoc_up_thunk_RsResource_ofactxIsPartialUnmapSupported(struct OfaContext *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_ofactxCanCopy(struct OfaContext *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_OfaContext_RsResource.offset)); +// ofactxMapTo: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_ofactxMapTo(struct OfaContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RsResource_ofactxIsPartialUnmapSupported(struct OfaContext *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_OfaContext_RsResource.offset)); +// ofactxUnmapFrom: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_ofactxUnmapFrom(struct OfaContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RsResource.offset), pParams); } -static void __nvoc_thunk_RsResource_ofactxPreDestruct(struct OfaContext *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_OfaContext_RsResource.offset)); +// ofactxGetRefCount: virtual inherited (res) base (chandes) +static NvU32 __nvoc_up_thunk_RsResource_ofactxGetRefCount(struct OfaContext *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_ofactxIsDuplicate(struct OfaContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_OfaContext_RsResource.offset), hMemory, pDuplicate); +// ofactxAddAdditionalDependants: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_ofactxAddAdditionalDependants(struct RsClient *pClient, struct OfaContext *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RsResource.offset), pReference); } -static void __nvoc_thunk_RmResource_ofactxControlSerialization_Epilogue(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_OfaContext_RmResource.offset), pCallContext, pParams); +// ofactxGetNotificationListPtr: virtual inherited (notify) base (chandes) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_ofactxGetNotificationListPtr(struct OfaContext *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_OfaContext_Notifier.offset)); } -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_ofactxGetNotificationListPtr(struct OfaContext *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_OfaContext_Notifier.offset)); +// ofactxGetNotificationShare: virtual inherited (notify) base (chandes) +static struct NotifShare * __nvoc_up_thunk_Notifier_ofactxGetNotificationShare(struct OfaContext *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_OfaContext_Notifier.offset)); } -static struct NotifShare *__nvoc_thunk_Notifier_ofactxGetNotificationShare(struct OfaContext *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_OfaContext_Notifier.offset)); +// ofactxSetNotificationShare: virtual inherited (notify) base (chandes) +static void __nvoc_up_thunk_Notifier_ofactxSetNotificationShare(struct OfaContext *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_OfaContext_Notifier.offset), pNotifShare); } -static NV_STATUS __nvoc_thunk_GpuResource_ofactxMap(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// ofactxUnregisterEvent: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_ofactxUnregisterEvent(struct OfaContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_OfaContext_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static NV_STATUS __nvoc_thunk_Notifier_ofactxGetOrAllocNotifShare(struct OfaContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_OfaContext_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +// ofactxGetOrAllocNotifShare: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_ofactxGetOrAllocNotifShare(struct OfaContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_OfaContext_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_OfaContext = { /*numEntries=*/ 0, @@ -289,6 +324,7 @@ NV_STATUS __nvoc_ctor_OfaContext(OfaContext *pThis, RmHalspecOwner *pRmhalspecow return status; } +// Vtable initialization static void __nvoc_init_funcTable_OfaContext_1(OfaContext *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -297,72 +333,108 @@ static void __nvoc_init_funcTable_OfaContext_1(OfaContext *pThis, RmHalspecOwner PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - pThis->__ofactxCheckMemInterUnmap__ = &__nvoc_thunk_ChannelDescendant_ofactxCheckMemInterUnmap; + // ofactxGetSwMethods -- virtual inherited (chandes) base (chandes) + pThis->__ofactxGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_ofactxGetSwMethods; - pThis->__ofactxShareCallback__ = &__nvoc_thunk_GpuResource_ofactxShareCallback; + // ofactxIsSwMethodStalling -- virtual inherited (chandes) base (chandes) + pThis->__ofactxIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_ofactxIsSwMethodStalling; - pThis->__ofactxAccessCallback__ = &__nvoc_thunk_RmResource_ofactxAccessCallback; + // ofactxCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) + pThis->__ofactxCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_ofactxCheckMemInterUnmap; - pThis->__ofactxMapTo__ = &__nvoc_thunk_RsResource_ofactxMapTo; + // ofactxControl -- virtual inherited (gpures) base (chandes) + pThis->__ofactxControl__ = &__nvoc_up_thunk_GpuResource_ofactxControl; - pThis->__ofactxGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_ofactxGetMapAddrSpace; + // ofactxMap -- virtual inherited (gpures) base (chandes) + pThis->__ofactxMap__ = &__nvoc_up_thunk_GpuResource_ofactxMap; - pThis->__ofactxSetNotificationShare__ = &__nvoc_thunk_Notifier_ofactxSetNotificationShare; + // ofactxUnmap -- virtual inherited (gpures) base (chandes) + pThis->__ofactxUnmap__ = &__nvoc_up_thunk_GpuResource_ofactxUnmap; - pThis->__ofactxGetRefCount__ = &__nvoc_thunk_RsResource_ofactxGetRefCount; + // ofactxShareCallback -- virtual inherited (gpures) base (chandes) + pThis->__ofactxShareCallback__ = &__nvoc_up_thunk_GpuResource_ofactxShareCallback; - pThis->__ofactxAddAdditionalDependants__ = &__nvoc_thunk_RsResource_ofactxAddAdditionalDependants; + // ofactxGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) + pThis->__ofactxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_ofactxGetRegBaseOffsetAndSize; - pThis->__ofactxControl_Prologue__ = &__nvoc_thunk_RmResource_ofactxControl_Prologue; + // ofactxGetMapAddrSpace -- virtual inherited (gpures) base (chandes) + pThis->__ofactxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_ofactxGetMapAddrSpace; - pThis->__ofactxGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_ofactxGetRegBaseOffsetAndSize; + // ofactxInternalControlForward -- virtual inherited (gpures) base (chandes) + pThis->__ofactxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_ofactxInternalControlForward; - pThis->__ofactxInternalControlForward__ = &__nvoc_thunk_GpuResource_ofactxInternalControlForward; + // ofactxGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) + pThis->__ofactxGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_ofactxGetInternalObjectHandle; - pThis->__ofactxUnmapFrom__ = &__nvoc_thunk_RsResource_ofactxUnmapFrom; + // ofactxAccessCallback -- virtual inherited (rmres) base (chandes) + pThis->__ofactxAccessCallback__ = &__nvoc_up_thunk_RmResource_ofactxAccessCallback; - pThis->__ofactxControl_Epilogue__ = &__nvoc_thunk_RmResource_ofactxControl_Epilogue; + // ofactxGetMemInterMapParams -- virtual inherited (rmres) base (chandes) + pThis->__ofactxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_ofactxGetMemInterMapParams; - pThis->__ofactxGetSwMethods__ = &__nvoc_thunk_ChannelDescendant_ofactxGetSwMethods; + // ofactxGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) + pThis->__ofactxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_ofactxGetMemoryMappingDescriptor; - pThis->__ofactxGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_ofactxGetInternalObjectHandle; + // ofactxControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__ofactxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_ofactxControlSerialization_Prologue; - pThis->__ofactxControl__ = &__nvoc_thunk_GpuResource_ofactxControl; + // ofactxControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__ofactxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_ofactxControlSerialization_Epilogue; - pThis->__ofactxUnmap__ = &__nvoc_thunk_GpuResource_ofactxUnmap; + // ofactxControl_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__ofactxControl_Prologue__ = &__nvoc_up_thunk_RmResource_ofactxControl_Prologue; - pThis->__ofactxGetMemInterMapParams__ = &__nvoc_thunk_RmResource_ofactxGetMemInterMapParams; + // ofactxControl_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__ofactxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_ofactxControl_Epilogue; - pThis->__ofactxGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_ofactxGetMemoryMappingDescriptor; + // ofactxCanCopy -- virtual inherited (res) base (chandes) + pThis->__ofactxCanCopy__ = &__nvoc_up_thunk_RsResource_ofactxCanCopy; - pThis->__ofactxIsSwMethodStalling__ = &__nvoc_thunk_ChannelDescendant_ofactxIsSwMethodStalling; + // ofactxIsDuplicate -- virtual inherited (res) base (chandes) + pThis->__ofactxIsDuplicate__ = &__nvoc_up_thunk_RsResource_ofactxIsDuplicate; - pThis->__ofactxControlFilter__ = &__nvoc_thunk_RsResource_ofactxControlFilter; + // ofactxPreDestruct -- virtual inherited (res) base (chandes) + pThis->__ofactxPreDestruct__ = &__nvoc_up_thunk_RsResource_ofactxPreDestruct; - pThis->__ofactxUnregisterEvent__ = &__nvoc_thunk_Notifier_ofactxUnregisterEvent; + // ofactxControlFilter -- virtual inherited (res) base (chandes) + pThis->__ofactxControlFilter__ = &__nvoc_up_thunk_RsResource_ofactxControlFilter; - pThis->__ofactxControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_ofactxControlSerialization_Prologue; + // ofactxIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body + pThis->__ofactxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_ofactxIsPartialUnmapSupported; - pThis->__ofactxCanCopy__ = &__nvoc_thunk_RsResource_ofactxCanCopy; + // ofactxMapTo -- virtual inherited (res) base (chandes) + pThis->__ofactxMapTo__ = &__nvoc_up_thunk_RsResource_ofactxMapTo; - pThis->__ofactxIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_ofactxIsPartialUnmapSupported; + // ofactxUnmapFrom -- virtual inherited (res) base (chandes) + pThis->__ofactxUnmapFrom__ = &__nvoc_up_thunk_RsResource_ofactxUnmapFrom; - pThis->__ofactxPreDestruct__ = &__nvoc_thunk_RsResource_ofactxPreDestruct; + // ofactxGetRefCount -- virtual inherited (res) base (chandes) + pThis->__ofactxGetRefCount__ = &__nvoc_up_thunk_RsResource_ofactxGetRefCount; - pThis->__ofactxIsDuplicate__ = &__nvoc_thunk_RsResource_ofactxIsDuplicate; + // ofactxAddAdditionalDependants -- virtual inherited (res) base (chandes) + pThis->__ofactxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_ofactxAddAdditionalDependants; - pThis->__ofactxControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_ofactxControlSerialization_Epilogue; + // ofactxGetNotificationListPtr -- virtual inherited (notify) base (chandes) + pThis->__ofactxGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_ofactxGetNotificationListPtr; - pThis->__ofactxGetNotificationListPtr__ = &__nvoc_thunk_Notifier_ofactxGetNotificationListPtr; + // ofactxGetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__ofactxGetNotificationShare__ = &__nvoc_up_thunk_Notifier_ofactxGetNotificationShare; - pThis->__ofactxGetNotificationShare__ = &__nvoc_thunk_Notifier_ofactxGetNotificationShare; + // ofactxSetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__ofactxSetNotificationShare__ = &__nvoc_up_thunk_Notifier_ofactxSetNotificationShare; - pThis->__ofactxMap__ = &__nvoc_thunk_GpuResource_ofactxMap; + // ofactxUnregisterEvent -- virtual inherited (notify) base (chandes) + pThis->__ofactxUnregisterEvent__ = &__nvoc_up_thunk_Notifier_ofactxUnregisterEvent; - pThis->__ofactxGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_ofactxGetOrAllocNotifShare; -} + // ofactxGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) + pThis->__ofactxGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_ofactxGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_OfaContext_1 with approximately 32 basic block(s). + +// Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_OfaContext(OfaContext *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 32 per-object function pointer(s). __nvoc_init_funcTable_OfaContext_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_ofa_ctx_nvoc.h b/src/nvidia/generated/g_kernel_ofa_ctx_nvoc.h index 191ca5f54e..ace67cc681 100644 --- a/src/nvidia/generated/g_kernel_ofa_ctx_nvoc.h +++ b/src/nvidia/generated/g_kernel_ofa_ctx_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_OFA_CTX_NVOC_H_ #define _G_KERNEL_OFA_CTX_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_ofa_ctx_nvoc.h" #ifndef KERNEL_OFA_CTX_H @@ -51,50 +59,59 @@ ENGDESCRIPTOR ofaGetEngineDescFromAllocParams(OBJGPU *pGpu, NvU32 externalClassI #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OfaContext { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; - struct OfaContext *__nvoc_pbase_OfaContext; - NV_STATUS (*__ofactxCheckMemInterUnmap__)(struct OfaContext *, NvBool); - NvBool (*__ofactxShareCallback__)(struct OfaContext *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NvBool (*__ofactxAccessCallback__)(struct OfaContext *, struct RsClient *, void *, RsAccessRight); - NV_STATUS (*__ofactxMapTo__)(struct OfaContext *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__ofactxGetMapAddrSpace__)(struct OfaContext *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__ofactxSetNotificationShare__)(struct OfaContext *, struct NotifShare *); - NvU32 (*__ofactxGetRefCount__)(struct OfaContext *); - void (*__ofactxAddAdditionalDependants__)(struct RsClient *, struct OfaContext *, RsResourceRef *); - NV_STATUS (*__ofactxControl_Prologue__)(struct OfaContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__ofactxGetRegBaseOffsetAndSize__)(struct OfaContext *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__ofactxInternalControlForward__)(struct OfaContext *, NvU32, void *, NvU32); - NV_STATUS (*__ofactxUnmapFrom__)(struct OfaContext *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__ofactxControl_Epilogue__)(struct OfaContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__ofactxGetSwMethods__)(struct OfaContext *, const METHOD **, NvU32 *); - NvHandle (*__ofactxGetInternalObjectHandle__)(struct OfaContext *); - NV_STATUS (*__ofactxControl__)(struct OfaContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__ofactxUnmap__)(struct OfaContext *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__ofactxGetMemInterMapParams__)(struct OfaContext *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__ofactxGetMemoryMappingDescriptor__)(struct OfaContext *, struct MEMORY_DESCRIPTOR **); - NvBool (*__ofactxIsSwMethodStalling__)(struct OfaContext *, NvU32); - NV_STATUS (*__ofactxControlFilter__)(struct OfaContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__ofactxUnregisterEvent__)(struct OfaContext *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__ofactxControlSerialization_Prologue__)(struct OfaContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__ofactxCanCopy__)(struct OfaContext *); - NvBool (*__ofactxIsPartialUnmapSupported__)(struct OfaContext *); - void (*__ofactxPreDestruct__)(struct OfaContext *); - NV_STATUS (*__ofactxIsDuplicate__)(struct OfaContext *, NvHandle, NvBool *); - void (*__ofactxControlSerialization_Epilogue__)(struct OfaContext *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__ofactxGetNotificationListPtr__)(struct OfaContext *); - struct NotifShare *(*__ofactxGetNotificationShare__)(struct OfaContext *); - NV_STATUS (*__ofactxMap__)(struct OfaContext *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NV_STATUS (*__ofactxGetOrAllocNotifShare__)(struct OfaContext *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super^2 + struct INotifier *__nvoc_pbase_INotifier; // inotify super^3 + struct Notifier *__nvoc_pbase_Notifier; // notify super^2 + struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super + struct OfaContext *__nvoc_pbase_OfaContext; // ofactx + + // Vtable with 32 per-object function pointers + NV_STATUS (*__ofactxGetSwMethods__)(struct OfaContext * /*this*/, const METHOD **, NvU32 *); // virtual inherited (chandes) base (chandes) + NvBool (*__ofactxIsSwMethodStalling__)(struct OfaContext * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__ofactxCheckMemInterUnmap__)(struct OfaContext * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__ofactxControl__)(struct OfaContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__ofactxMap__)(struct OfaContext * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__ofactxUnmap__)(struct OfaContext * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NvBool (*__ofactxShareCallback__)(struct OfaContext * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__ofactxGetRegBaseOffsetAndSize__)(struct OfaContext * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__ofactxGetMapAddrSpace__)(struct OfaContext * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__ofactxInternalControlForward__)(struct OfaContext * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (chandes) + NvHandle (*__ofactxGetInternalObjectHandle__)(struct OfaContext * /*this*/); // virtual inherited (gpures) base (chandes) + NvBool (*__ofactxAccessCallback__)(struct OfaContext * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__ofactxGetMemInterMapParams__)(struct OfaContext * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__ofactxGetMemoryMappingDescriptor__)(struct OfaContext * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__ofactxControlSerialization_Prologue__)(struct OfaContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__ofactxControlSerialization_Epilogue__)(struct OfaContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__ofactxControl_Prologue__)(struct OfaContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__ofactxControl_Epilogue__)(struct OfaContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NvBool (*__ofactxCanCopy__)(struct OfaContext * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__ofactxIsDuplicate__)(struct OfaContext * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (chandes) + void (*__ofactxPreDestruct__)(struct OfaContext * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__ofactxControlFilter__)(struct OfaContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (chandes) + NvBool (*__ofactxIsPartialUnmapSupported__)(struct OfaContext * /*this*/); // inline virtual inherited (res) base (chandes) body + NV_STATUS (*__ofactxMapTo__)(struct OfaContext * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (chandes) + NV_STATUS (*__ofactxUnmapFrom__)(struct OfaContext * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (chandes) + NvU32 (*__ofactxGetRefCount__)(struct OfaContext * /*this*/); // virtual inherited (res) base (chandes) + void (*__ofactxAddAdditionalDependants__)(struct RsClient *, struct OfaContext * /*this*/, RsResourceRef *); // virtual inherited (res) base (chandes) + PEVENTNOTIFICATION * (*__ofactxGetNotificationListPtr__)(struct OfaContext * /*this*/); // virtual inherited (notify) base (chandes) + struct NotifShare * (*__ofactxGetNotificationShare__)(struct OfaContext * /*this*/); // virtual inherited (notify) base (chandes) + void (*__ofactxSetNotificationShare__)(struct OfaContext * /*this*/, struct NotifShare *); // virtual inherited (notify) base (chandes) + NV_STATUS (*__ofactxUnregisterEvent__)(struct OfaContext * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (chandes) + NV_STATUS (*__ofactxGetOrAllocNotifShare__)(struct OfaContext * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (chandes) }; #ifndef __NVOC_CLASS_OfaContext_TYPEDEF__ @@ -106,6 +123,7 @@ typedef struct OfaContext OfaContext; #define __nvoc_class_id_OfaContext 0xf63d99 #endif /* __nvoc_class_id_OfaContext */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OfaContext; #define __staticCast_OfaContext(pThis) \ @@ -118,138 +136,126 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OfaContext; ((OfaContext*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OfaContext))) #endif //__nvoc_kernel_ofa_ctx_h_disabled - NV_STATUS __nvoc_objCreateDynamic_OfaContext(OfaContext**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_OfaContext(OfaContext**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_OfaContext(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_OfaContext((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define ofactxGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ +#define ofactxGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) ofactxGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) +#define ofactxIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define ofactxIsSwMethodStalling(pChannelDescendant, hHandle) ofactxIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) +#define ofactxCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ #define ofactxCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) ofactxCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) +#define ofactxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define ofactxControl(pGpuResource, pCallContext, pParams) ofactxControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define ofactxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define ofactxMap(pGpuResource, pCallContext, pParams, pCpuMapping) ofactxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define ofactxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define ofactxUnmap(pGpuResource, pCallContext, pCpuMapping) ofactxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define ofactxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ #define ofactxShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) ofactxShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define ofactxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) ofactxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define ofactxMapTo(pResource, pParams) ofactxMapTo_DISPATCH(pResource, pParams) -#define ofactxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) ofactxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define ofactxSetNotificationShare(pNotifier, pNotifShare) ofactxSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define ofactxGetRefCount(pResource) ofactxGetRefCount_DISPATCH(pResource) -#define ofactxAddAdditionalDependants(pClient, pResource, pReference) ofactxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define ofactxControl_Prologue(pResource, pCallContext, pParams) ofactxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define ofactxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define ofactxGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) ofactxGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define ofactxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define ofactxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) ofactxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define ofactxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define ofactxInternalControlForward(pGpuResource, command, pParams, size) ofactxInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define ofactxUnmapFrom(pResource, pParams) ofactxUnmapFrom_DISPATCH(pResource, pParams) -#define ofactxControl_Epilogue(pResource, pCallContext, pParams) ofactxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define ofactxGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) ofactxGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) +#define ofactxGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define ofactxGetInternalObjectHandle(pGpuResource) ofactxGetInternalObjectHandle_DISPATCH(pGpuResource) -#define ofactxControl(pGpuResource, pCallContext, pParams) ofactxControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define ofactxUnmap(pGpuResource, pCallContext, pCpuMapping) ofactxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define ofactxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define ofactxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) ofactxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define ofactxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define ofactxGetMemInterMapParams(pRmResource, pParams) ofactxGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define ofactxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define ofactxGetMemoryMappingDescriptor(pRmResource, ppMemDesc) ofactxGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define ofactxIsSwMethodStalling(pChannelDescendant, hHandle) ofactxIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define ofactxControlFilter(pResource, pCallContext, pParams) ofactxControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define ofactxUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) ofactxUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define ofactxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define ofactxControlSerialization_Prologue(pResource, pCallContext, pParams) ofactxControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define ofactxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define ofactxControlSerialization_Epilogue(pResource, pCallContext, pParams) ofactxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define ofactxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define ofactxControl_Prologue(pResource, pCallContext, pParams) ofactxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define ofactxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define ofactxControl_Epilogue(pResource, pCallContext, pParams) ofactxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define ofactxCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define ofactxCanCopy(pResource) ofactxCanCopy_DISPATCH(pResource) -#define ofactxIsPartialUnmapSupported(pResource) ofactxIsPartialUnmapSupported_DISPATCH(pResource) -#define ofactxPreDestruct(pResource) ofactxPreDestruct_DISPATCH(pResource) +#define ofactxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define ofactxIsDuplicate(pResource, hMemory, pDuplicate) ofactxIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define ofactxControlSerialization_Epilogue(pResource, pCallContext, pParams) ofactxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define ofactxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define ofactxPreDestruct(pResource) ofactxPreDestruct_DISPATCH(pResource) +#define ofactxControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define ofactxControlFilter(pResource, pCallContext, pParams) ofactxControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define ofactxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define ofactxIsPartialUnmapSupported(pResource) ofactxIsPartialUnmapSupported_DISPATCH(pResource) +#define ofactxMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define ofactxMapTo(pResource, pParams) ofactxMapTo_DISPATCH(pResource, pParams) +#define ofactxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define ofactxUnmapFrom(pResource, pParams) ofactxUnmapFrom_DISPATCH(pResource, pParams) +#define ofactxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define ofactxGetRefCount(pResource) ofactxGetRefCount_DISPATCH(pResource) +#define ofactxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define ofactxAddAdditionalDependants(pClient, pResource, pReference) ofactxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define ofactxGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define ofactxGetNotificationListPtr(pNotifier) ofactxGetNotificationListPtr_DISPATCH(pNotifier) +#define ofactxGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ #define ofactxGetNotificationShare(pNotifier) ofactxGetNotificationShare_DISPATCH(pNotifier) -#define ofactxMap(pGpuResource, pCallContext, pParams, pCpuMapping) ofactxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define ofactxSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define ofactxSetNotificationShare(pNotifier, pNotifShare) ofactxSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define ofactxUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define ofactxUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) ofactxUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define ofactxGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ #define ofactxGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) ofactxGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -NV_STATUS ofactxConstructHal_KERNEL(struct OfaContext *pOfaContext, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); - -#ifdef __nvoc_kernel_ofa_ctx_h_disabled -static inline NV_STATUS ofactxConstructHal(struct OfaContext *pOfaContext, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - NV_ASSERT_FAILED_PRECOMP("OfaContext was disabled!"); - return NV_ERR_NOT_SUPPORTED; +// Dispatch functions +static inline NV_STATUS ofactxGetSwMethods_DISPATCH(struct OfaContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { + return pChannelDescendant->__ofactxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); } -#else //__nvoc_kernel_ofa_ctx_h_disabled -#define ofactxConstructHal(pOfaContext, pCallContext, pParams) ofactxConstructHal_KERNEL(pOfaContext, pCallContext, pParams) -#endif //__nvoc_kernel_ofa_ctx_h_disabled -#define ofactxConstructHal_HAL(pOfaContext, pCallContext, pParams) ofactxConstructHal(pOfaContext, pCallContext, pParams) - -void ofactxDestructHal_KERNEL(struct OfaContext *pOfaContext); - - -#ifdef __nvoc_kernel_ofa_ctx_h_disabled -static inline void ofactxDestructHal(struct OfaContext *pOfaContext) { - NV_ASSERT_FAILED_PRECOMP("OfaContext was disabled!"); +static inline NvBool ofactxIsSwMethodStalling_DISPATCH(struct OfaContext *pChannelDescendant, NvU32 hHandle) { + return pChannelDescendant->__ofactxIsSwMethodStalling__(pChannelDescendant, hHandle); } -#else //__nvoc_kernel_ofa_ctx_h_disabled -#define ofactxDestructHal(pOfaContext) ofactxDestructHal_KERNEL(pOfaContext) -#endif //__nvoc_kernel_ofa_ctx_h_disabled - -#define ofactxDestructHal_HAL(pOfaContext) ofactxDestructHal(pOfaContext) static inline NV_STATUS ofactxCheckMemInterUnmap_DISPATCH(struct OfaContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { return pChannelDescendant->__ofactxCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } -static inline NvBool ofactxShareCallback_DISPATCH(struct OfaContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__ofactxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NvBool ofactxAccessCallback_DISPATCH(struct OfaContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__ofactxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} - -static inline NV_STATUS ofactxMapTo_DISPATCH(struct OfaContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__ofactxMapTo__(pResource, pParams); -} - -static inline NV_STATUS ofactxGetMapAddrSpace_DISPATCH(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__ofactxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); -} - -static inline void ofactxSetNotificationShare_DISPATCH(struct OfaContext *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__ofactxSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS ofactxControl_DISPATCH(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__ofactxControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 ofactxGetRefCount_DISPATCH(struct OfaContext *pResource) { - return pResource->__ofactxGetRefCount__(pResource); +static inline NV_STATUS ofactxMap_DISPATCH(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__ofactxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void ofactxAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct OfaContext *pResource, RsResourceRef *pReference) { - pResource->__ofactxAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS ofactxUnmap_DISPATCH(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__ofactxUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS ofactxControl_Prologue_DISPATCH(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ofactxControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool ofactxShareCallback_DISPATCH(struct OfaContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__ofactxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS ofactxGetRegBaseOffsetAndSize_DISPATCH(struct OfaContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__ofactxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS ofactxInternalControlForward_DISPATCH(struct OfaContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__ofactxInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS ofactxUnmapFrom_DISPATCH(struct OfaContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__ofactxUnmapFrom__(pResource, pParams); -} - -static inline void ofactxControl_Epilogue_DISPATCH(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__ofactxControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS ofactxGetMapAddrSpace_DISPATCH(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__ofactxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NV_STATUS ofactxGetSwMethods_DISPATCH(struct OfaContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return pChannelDescendant->__ofactxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); +static inline NV_STATUS ofactxInternalControlForward_DISPATCH(struct OfaContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__ofactxInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle ofactxGetInternalObjectHandle_DISPATCH(struct OfaContext *pGpuResource) { return pGpuResource->__ofactxGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS ofactxControl_DISPATCH(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__ofactxControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS ofactxUnmap_DISPATCH(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__ofactxUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool ofactxAccessCallback_DISPATCH(struct OfaContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__ofactxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS ofactxGetMemInterMapParams_DISPATCH(struct OfaContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { @@ -260,58 +266,105 @@ static inline NV_STATUS ofactxGetMemoryMappingDescriptor_DISPATCH(struct OfaCont return pRmResource->__ofactxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NvBool ofactxIsSwMethodStalling_DISPATCH(struct OfaContext *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__ofactxIsSwMethodStalling__(pChannelDescendant, hHandle); +static inline NV_STATUS ofactxControlSerialization_Prologue_DISPATCH(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__ofactxControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS ofactxControlFilter_DISPATCH(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ofactxControlFilter__(pResource, pCallContext, pParams); +static inline void ofactxControlSerialization_Epilogue_DISPATCH(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__ofactxControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS ofactxUnregisterEvent_DISPATCH(struct OfaContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__ofactxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline NV_STATUS ofactxControl_Prologue_DISPATCH(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__ofactxControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS ofactxControlSerialization_Prologue_DISPATCH(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ofactxControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline void ofactxControl_Epilogue_DISPATCH(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__ofactxControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool ofactxCanCopy_DISPATCH(struct OfaContext *pResource) { return pResource->__ofactxCanCopy__(pResource); } -static inline NvBool ofactxIsPartialUnmapSupported_DISPATCH(struct OfaContext *pResource) { - return pResource->__ofactxIsPartialUnmapSupported__(pResource); +static inline NV_STATUS ofactxIsDuplicate_DISPATCH(struct OfaContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__ofactxIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void ofactxPreDestruct_DISPATCH(struct OfaContext *pResource) { pResource->__ofactxPreDestruct__(pResource); } -static inline NV_STATUS ofactxIsDuplicate_DISPATCH(struct OfaContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__ofactxIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS ofactxControlFilter_DISPATCH(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__ofactxControlFilter__(pResource, pCallContext, pParams); } -static inline void ofactxControlSerialization_Epilogue_DISPATCH(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__ofactxControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool ofactxIsPartialUnmapSupported_DISPATCH(struct OfaContext *pResource) { + return pResource->__ofactxIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS ofactxMapTo_DISPATCH(struct OfaContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__ofactxMapTo__(pResource, pParams); +} + +static inline NV_STATUS ofactxUnmapFrom_DISPATCH(struct OfaContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__ofactxUnmapFrom__(pResource, pParams); +} + +static inline NvU32 ofactxGetRefCount_DISPATCH(struct OfaContext *pResource) { + return pResource->__ofactxGetRefCount__(pResource); } -static inline PEVENTNOTIFICATION *ofactxGetNotificationListPtr_DISPATCH(struct OfaContext *pNotifier) { +static inline void ofactxAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct OfaContext *pResource, RsResourceRef *pReference) { + pResource->__ofactxAddAdditionalDependants__(pClient, pResource, pReference); +} + +static inline PEVENTNOTIFICATION * ofactxGetNotificationListPtr_DISPATCH(struct OfaContext *pNotifier) { return pNotifier->__ofactxGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *ofactxGetNotificationShare_DISPATCH(struct OfaContext *pNotifier) { +static inline struct NotifShare * ofactxGetNotificationShare_DISPATCH(struct OfaContext *pNotifier) { return pNotifier->__ofactxGetNotificationShare__(pNotifier); } -static inline NV_STATUS ofactxMap_DISPATCH(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__ofactxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void ofactxSetNotificationShare_DISPATCH(struct OfaContext *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__ofactxSetNotificationShare__(pNotifier, pNotifShare); +} + +static inline NV_STATUS ofactxUnregisterEvent_DISPATCH(struct OfaContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__ofactxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS ofactxGetOrAllocNotifShare_DISPATCH(struct OfaContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return pNotifier->__ofactxGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } +NV_STATUS ofactxConstructHal_KERNEL(struct OfaContext *pOfaContext, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); + + +#ifdef __nvoc_kernel_ofa_ctx_h_disabled +static inline NV_STATUS ofactxConstructHal(struct OfaContext *pOfaContext, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + NV_ASSERT_FAILED_PRECOMP("OfaContext was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kernel_ofa_ctx_h_disabled +#define ofactxConstructHal(pOfaContext, pCallContext, pParams) ofactxConstructHal_KERNEL(pOfaContext, pCallContext, pParams) +#endif //__nvoc_kernel_ofa_ctx_h_disabled + +#define ofactxConstructHal_HAL(pOfaContext, pCallContext, pParams) ofactxConstructHal(pOfaContext, pCallContext, pParams) + +void ofactxDestructHal_KERNEL(struct OfaContext *pOfaContext); + + +#ifdef __nvoc_kernel_ofa_ctx_h_disabled +static inline void ofactxDestructHal(struct OfaContext *pOfaContext) { + NV_ASSERT_FAILED_PRECOMP("OfaContext was disabled!"); +} +#else //__nvoc_kernel_ofa_ctx_h_disabled +#define ofactxDestructHal(pOfaContext) ofactxDestructHal_KERNEL(pOfaContext) +#endif //__nvoc_kernel_ofa_ctx_h_disabled + +#define ofactxDestructHal_HAL(pOfaContext) ofactxDestructHal(pOfaContext) + static inline NV_STATUS __nvoc_ofactxConstruct(struct OfaContext *arg_pOfaContext, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams) { return ofactxConstructHal(arg_pOfaContext, arg_pCallContext, arg_pParams); } diff --git a/src/nvidia/generated/g_kernel_rc_nvoc.c b/src/nvidia/generated/g_kernel_rc_nvoc.c index c548e93cd7..a5de47ca88 100644 --- a/src/nvidia/generated/g_kernel_rc_nvoc.c +++ b/src/nvidia/generated/g_kernel_rc_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelRc = /*pExportInfo=*/ &__nvoc_export_info_KernelRc }; -static NV_STATUS __nvoc_thunk_KernelRc_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelRc, ENGDESCRIPTOR engDescriptor) { - return krcConstructEngine(pGpu, (struct KernelRc *)(((unsigned char *)pKernelRc) - __nvoc_rtti_KernelRc_OBJENGSTATE.offset), engDescriptor); +// 1 down-thunk(s) defined to bridge methods in KernelRc from superclasses + +// krcConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_KernelRc_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelRc, ENGDESCRIPTOR engDescriptor) { + return krcConstructEngine(pGpu, (struct KernelRc *)(((unsigned char *) pKernelRc) - __nvoc_rtti_KernelRc_OBJENGSTATE.offset), engDescriptor); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_krcStateLoad(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg0) { - return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset), arg0); + +// 13 up-thunk(s) defined to bridge methods in KernelRc to superclasses + +// krcInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_krcInitMissing(POBJGPU pGpu, struct KernelRc *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_krcStateUnload(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg0) { - return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset), arg0); +// krcStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePreInitLocked(POBJGPU pGpu, struct KernelRc *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_krcStateInitLocked(POBJGPU pGpu, struct KernelRc *pEngstate) { - return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); +// krcStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePreInitUnlocked(POBJGPU pGpu, struct KernelRc *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_krcStatePreLoad(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset), arg0); +// krcStateInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStateInitLocked(POBJGPU pGpu, struct KernelRc *pEngstate) { + return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_krcStatePostUnload(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset), arg0); +// krcStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStateInitUnlocked(POBJGPU pGpu, struct KernelRc *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_krcStateDestroy(POBJGPU pGpu, struct KernelRc *pEngstate) { - engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); +// krcStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePreLoad(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_krcStatePreUnload(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset), arg0); +// krcStateLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStateLoad(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg3) { + return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_krcStateInitUnlocked(POBJGPU pGpu, struct KernelRc *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); +// krcStatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePostLoad(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_krcInitMissing(POBJGPU pGpu, struct KernelRc *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); +// krcStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePreUnload(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_krcStatePreInitLocked(POBJGPU pGpu, struct KernelRc *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); +// krcStateUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStateUnload(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg3) { + return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_krcStatePreInitUnlocked(POBJGPU pGpu, struct KernelRc *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); +// krcStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePostUnload(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_krcStatePostLoad(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset), arg0); +// krcStateDestroy: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_krcStateDestroy(POBJGPU pGpu, struct KernelRc *pEngstate) { + engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); } -static NvBool __nvoc_thunk_OBJENGSTATE_krcIsPresent(POBJGPU pGpu, struct KernelRc *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); +// krcIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_krcIsPresent(POBJGPU pGpu, struct KernelRc *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelRc = { /*numEntries=*/ 0, @@ -161,6 +181,7 @@ NV_STATUS __nvoc_ctor_KernelRc(KernelRc *pThis, RmHalspecOwner *pRmhalspecowner) return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelRc_1(KernelRc *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -173,9 +194,11 @@ static void __nvoc_init_funcTable_KernelRc_1(KernelRc *pThis, RmHalspecOwner *pR PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); + // krcConstructEngine -- virtual override (engstate) base (engstate) pThis->__krcConstructEngine__ = &krcConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelRc_engstateConstructEngine; - // Hal function -- krcWatchdogRecovery + // krcWatchdogRecovery -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__krcWatchdogRecovery__ = &krcWatchdogRecovery_f2d351; @@ -185,36 +208,51 @@ static void __nvoc_init_funcTable_KernelRc_1(KernelRc *pThis, RmHalspecOwner *pR pThis->__krcWatchdogRecovery__ = &krcWatchdogRecovery_KERNEL; } - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelRc_engstateConstructEngine; + // krcInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__krcInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_krcInitMissing; - pThis->__krcStateLoad__ = &__nvoc_thunk_OBJENGSTATE_krcStateLoad; + // krcStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__krcStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_krcStatePreInitLocked; - pThis->__krcStateUnload__ = &__nvoc_thunk_OBJENGSTATE_krcStateUnload; + // krcStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__krcStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_krcStatePreInitUnlocked; - pThis->__krcStateInitLocked__ = &__nvoc_thunk_OBJENGSTATE_krcStateInitLocked; + // krcStateInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__krcStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_krcStateInitLocked; - pThis->__krcStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_krcStatePreLoad; + // krcStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__krcStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_krcStateInitUnlocked; - pThis->__krcStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_krcStatePostUnload; + // krcStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__krcStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_krcStatePreLoad; - pThis->__krcStateDestroy__ = &__nvoc_thunk_OBJENGSTATE_krcStateDestroy; + // krcStateLoad -- virtual inherited (engstate) base (engstate) + pThis->__krcStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_krcStateLoad; - pThis->__krcStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_krcStatePreUnload; + // krcStatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__krcStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_krcStatePostLoad; - pThis->__krcStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_krcStateInitUnlocked; + // krcStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__krcStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_krcStatePreUnload; - pThis->__krcInitMissing__ = &__nvoc_thunk_OBJENGSTATE_krcInitMissing; + // krcStateUnload -- virtual inherited (engstate) base (engstate) + pThis->__krcStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_krcStateUnload; - pThis->__krcStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_krcStatePreInitLocked; + // krcStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__krcStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_krcStatePostUnload; - pThis->__krcStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_krcStatePreInitUnlocked; + // krcStateDestroy -- virtual inherited (engstate) base (engstate) + pThis->__krcStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_krcStateDestroy; - pThis->__krcStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_krcStatePostLoad; + // krcIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__krcIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_krcIsPresent; +} // End __nvoc_init_funcTable_KernelRc_1 with approximately 17 basic block(s). - pThis->__krcIsPresent__ = &__nvoc_thunk_OBJENGSTATE_krcIsPresent; -} +// Initialize vtable(s) for 15 virtual method(s). void __nvoc_init_funcTable_KernelRc(KernelRc *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 15 per-object function pointer(s). __nvoc_init_funcTable_KernelRc_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_rc_nvoc.h b/src/nvidia/generated/g_kernel_rc_nvoc.h index 94528eb3ad..2e05953494 100644 --- a/src/nvidia/generated/g_kernel_rc_nvoc.h +++ b/src/nvidia/generated/g_kernel_rc_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_RC_NVOC_H_ #define _G_KERNEL_RC_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_rc_nvoc.h" #ifndef KERNEL_RC_H @@ -46,6 +54,7 @@ extern "C" { #include "ctrl/ctrl2080/ctrl2080rc.h" + struct Subdevice; #ifndef __NVOC_CLASS_Subdevice_TYPEDEF__ @@ -77,27 +86,38 @@ typedef enum { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelRc { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct KernelRc *__nvoc_pbase_KernelRc; - NV_STATUS (*__krcConstructEngine__)(struct OBJGPU *, struct KernelRc *, ENGDESCRIPTOR); - void (*__krcWatchdogRecovery__)(struct OBJGPU *, struct KernelRc *); - NV_STATUS (*__krcStateLoad__)(POBJGPU, struct KernelRc *, NvU32); - NV_STATUS (*__krcStateUnload__)(POBJGPU, struct KernelRc *, NvU32); - NV_STATUS (*__krcStateInitLocked__)(POBJGPU, struct KernelRc *); - NV_STATUS (*__krcStatePreLoad__)(POBJGPU, struct KernelRc *, NvU32); - NV_STATUS (*__krcStatePostUnload__)(POBJGPU, struct KernelRc *, NvU32); - void (*__krcStateDestroy__)(POBJGPU, struct KernelRc *); - NV_STATUS (*__krcStatePreUnload__)(POBJGPU, struct KernelRc *, NvU32); - NV_STATUS (*__krcStateInitUnlocked__)(POBJGPU, struct KernelRc *); - void (*__krcInitMissing__)(POBJGPU, struct KernelRc *); - NV_STATUS (*__krcStatePreInitLocked__)(POBJGPU, struct KernelRc *); - NV_STATUS (*__krcStatePreInitUnlocked__)(POBJGPU, struct KernelRc *); - NV_STATUS (*__krcStatePostLoad__)(POBJGPU, struct KernelRc *, NvU32); - NvBool (*__krcIsPresent__)(POBJGPU, struct KernelRc *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct KernelRc *__nvoc_pbase_KernelRc; // krc + + // Vtable with 15 per-object function pointers + NV_STATUS (*__krcConstructEngine__)(struct OBJGPU *, struct KernelRc * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + void (*__krcWatchdogRecovery__)(struct OBJGPU *, struct KernelRc * /*this*/); // halified (2 hals) body + void (*__krcInitMissing__)(POBJGPU, struct KernelRc * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__krcStatePreInitLocked__)(POBJGPU, struct KernelRc * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__krcStatePreInitUnlocked__)(POBJGPU, struct KernelRc * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__krcStateInitLocked__)(POBJGPU, struct KernelRc * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__krcStateInitUnlocked__)(POBJGPU, struct KernelRc * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__krcStatePreLoad__)(POBJGPU, struct KernelRc * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__krcStateLoad__)(POBJGPU, struct KernelRc * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__krcStatePostLoad__)(POBJGPU, struct KernelRc * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__krcStatePreUnload__)(POBJGPU, struct KernelRc * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__krcStateUnload__)(POBJGPU, struct KernelRc * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__krcStatePostUnload__)(POBJGPU, struct KernelRc * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__krcStateDestroy__)(POBJGPU, struct KernelRc * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__krcIsPresent__)(POBJGPU, struct KernelRc * /*this*/); // virtual inherited (engstate) base (engstate) + + // Data members NvBool bRobustChannelsEnabled; NvBool bBreakOnRc; NvBool bLogEvents; @@ -118,6 +138,7 @@ typedef struct KernelRc KernelRc; #define __nvoc_class_id_KernelRc 0x4888db #endif /* __nvoc_class_id_KernelRc */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelRc; #define __staticCast_KernelRc(pThis) \ @@ -130,6 +151,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelRc; ((KernelRc*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelRc))) #endif //__nvoc_kernel_rc_h_disabled +// Property macros #define PDB_PROP_KRC_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_KRC_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -139,22 +161,101 @@ NV_STATUS __nvoc_objCreate_KernelRc(KernelRc**, Dynamic*, NvU32); #define __objCreate_KernelRc(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelRc((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define krcConstructEngine_FNPTR(pKernelRc) pKernelRc->__krcConstructEngine__ #define krcConstructEngine(pGpu, pKernelRc, engDescriptor) krcConstructEngine_DISPATCH(pGpu, pKernelRc, engDescriptor) +#define krcWatchdogRecovery_FNPTR(pKernelRc) pKernelRc->__krcWatchdogRecovery__ #define krcWatchdogRecovery(pGpu, pKernelRc) krcWatchdogRecovery_DISPATCH(pGpu, pKernelRc) #define krcWatchdogRecovery_HAL(pGpu, pKernelRc) krcWatchdogRecovery_DISPATCH(pGpu, pKernelRc) -#define krcStateLoad(pGpu, pEngstate, arg0) krcStateLoad_DISPATCH(pGpu, pEngstate, arg0) -#define krcStateUnload(pGpu, pEngstate, arg0) krcStateUnload_DISPATCH(pGpu, pEngstate, arg0) -#define krcStateInitLocked(pGpu, pEngstate) krcStateInitLocked_DISPATCH(pGpu, pEngstate) -#define krcStatePreLoad(pGpu, pEngstate, arg0) krcStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define krcStatePostUnload(pGpu, pEngstate, arg0) krcStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define krcStateDestroy(pGpu, pEngstate) krcStateDestroy_DISPATCH(pGpu, pEngstate) -#define krcStatePreUnload(pGpu, pEngstate, arg0) krcStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define krcStateInitUnlocked(pGpu, pEngstate) krcStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define krcInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define krcInitMissing(pGpu, pEngstate) krcInitMissing_DISPATCH(pGpu, pEngstate) +#define krcStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define krcStatePreInitLocked(pGpu, pEngstate) krcStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define krcStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define krcStatePreInitUnlocked(pGpu, pEngstate) krcStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define krcStatePostLoad(pGpu, pEngstate, arg0) krcStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) +#define krcStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define krcStateInitLocked(pGpu, pEngstate) krcStateInitLocked_DISPATCH(pGpu, pEngstate) +#define krcStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define krcStateInitUnlocked(pGpu, pEngstate) krcStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define krcStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define krcStatePreLoad(pGpu, pEngstate, arg3) krcStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define krcStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define krcStateLoad(pGpu, pEngstate, arg3) krcStateLoad_DISPATCH(pGpu, pEngstate, arg3) +#define krcStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define krcStatePostLoad(pGpu, pEngstate, arg3) krcStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define krcStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define krcStatePreUnload(pGpu, pEngstate, arg3) krcStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define krcStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define krcStateUnload(pGpu, pEngstate, arg3) krcStateUnload_DISPATCH(pGpu, pEngstate, arg3) +#define krcStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define krcStatePostUnload(pGpu, pEngstate, arg3) krcStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define krcStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define krcStateDestroy(pGpu, pEngstate) krcStateDestroy_DISPATCH(pGpu, pEngstate) +#define krcIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define krcIsPresent(pGpu, pEngstate) krcIsPresent_DISPATCH(pGpu, pEngstate) + +// Dispatch functions +static inline NV_STATUS krcConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelRc *pKernelRc, ENGDESCRIPTOR engDescriptor) { + return pKernelRc->__krcConstructEngine__(pGpu, pKernelRc, engDescriptor); +} + +static inline void krcWatchdogRecovery_DISPATCH(struct OBJGPU *pGpu, struct KernelRc *pKernelRc) { + pKernelRc->__krcWatchdogRecovery__(pGpu, pKernelRc); +} + +static inline void krcInitMissing_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate) { + pEngstate->__krcInitMissing__(pGpu, pEngstate); +} + +static inline NV_STATUS krcStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate) { + return pEngstate->__krcStatePreInitLocked__(pGpu, pEngstate); +} + +static inline NV_STATUS krcStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate) { + return pEngstate->__krcStatePreInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS krcStateInitLocked_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate) { + return pEngstate->__krcStateInitLocked__(pGpu, pEngstate); +} + +static inline NV_STATUS krcStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate) { + return pEngstate->__krcStateInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS krcStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg3) { + return pEngstate->__krcStatePreLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS krcStateLoad_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg3) { + return pEngstate->__krcStateLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS krcStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg3) { + return pEngstate->__krcStatePostLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS krcStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg3) { + return pEngstate->__krcStatePreUnload__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS krcStateUnload_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg3) { + return pEngstate->__krcStateUnload__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS krcStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg3) { + return pEngstate->__krcStatePostUnload__(pGpu, pEngstate, arg3); +} + +static inline void krcStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate) { + pEngstate->__krcStateDestroy__(pGpu, pEngstate); +} + +static inline NvBool krcIsPresent_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate) { + return pEngstate->__krcIsPresent__(pGpu, pEngstate); +} + NV_STATUS krcErrorWriteNotifier_CPU(struct OBJGPU *pGpu, struct KernelRc *pKernelRc, struct KernelChannel *pKernelChannel, NvU32 exceptType, RM_ENGINE_TYPE localRmEngineType, NV_STATUS notifierStatus, NvU32 *pFlushFlags); @@ -169,19 +270,19 @@ static inline NV_STATUS krcErrorWriteNotifier(struct OBJGPU *pGpu, struct Kernel #define krcErrorWriteNotifier_HAL(pGpu, pKernelRc, pKernelChannel, exceptType, localRmEngineType, notifierStatus, pFlushFlags) krcErrorWriteNotifier(pGpu, pKernelRc, pKernelChannel, exceptType, localRmEngineType, notifierStatus, pFlushFlags) -NV_STATUS krcErrorSendEventNotifications_KERNEL(struct OBJGPU *pGpu, struct KernelRc *pKernelRc, struct KernelChannel *pKernelChannel, RM_ENGINE_TYPE rmEngineType, NvU32 exceptType, RC_NOTIFIER_SCOPE scope, NvU16 partitionAttributionId); +NV_STATUS krcErrorSendEventNotifications_KERNEL(struct OBJGPU *pGpu, struct KernelRc *pKernelRc, struct KernelChannel *pKernelChannel, RM_ENGINE_TYPE rmEngineType, NvU32 exceptLevel, NvU32 exceptType, RC_NOTIFIER_SCOPE scope, NvU16 partitionAttributionId, NvBool bOsRcCallbackNeeded); #ifdef __nvoc_kernel_rc_h_disabled -static inline NV_STATUS krcErrorSendEventNotifications(struct OBJGPU *pGpu, struct KernelRc *pKernelRc, struct KernelChannel *pKernelChannel, RM_ENGINE_TYPE rmEngineType, NvU32 exceptType, RC_NOTIFIER_SCOPE scope, NvU16 partitionAttributionId) { +static inline NV_STATUS krcErrorSendEventNotifications(struct OBJGPU *pGpu, struct KernelRc *pKernelRc, struct KernelChannel *pKernelChannel, RM_ENGINE_TYPE rmEngineType, NvU32 exceptLevel, NvU32 exceptType, RC_NOTIFIER_SCOPE scope, NvU16 partitionAttributionId, NvBool bOsRcCallbackNeeded) { NV_ASSERT_FAILED_PRECOMP("KernelRc was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_rc_h_disabled -#define krcErrorSendEventNotifications(pGpu, pKernelRc, pKernelChannel, rmEngineType, exceptType, scope, partitionAttributionId) krcErrorSendEventNotifications_KERNEL(pGpu, pKernelRc, pKernelChannel, rmEngineType, exceptType, scope, partitionAttributionId) +#define krcErrorSendEventNotifications(pGpu, pKernelRc, pKernelChannel, rmEngineType, exceptLevel, exceptType, scope, partitionAttributionId, bOsRcCallbackNeeded) krcErrorSendEventNotifications_KERNEL(pGpu, pKernelRc, pKernelChannel, rmEngineType, exceptLevel, exceptType, scope, partitionAttributionId, bOsRcCallbackNeeded) #endif //__nvoc_kernel_rc_h_disabled -#define krcErrorSendEventNotifications_HAL(pGpu, pKernelRc, pKernelChannel, rmEngineType, exceptType, scope, partitionAttributionId) krcErrorSendEventNotifications(pGpu, pKernelRc, pKernelChannel, rmEngineType, exceptType, scope, partitionAttributionId) +#define krcErrorSendEventNotifications_HAL(pGpu, pKernelRc, pKernelChannel, rmEngineType, exceptLevel, exceptType, scope, partitionAttributionId, bOsRcCallbackNeeded) krcErrorSendEventNotifications(pGpu, pKernelRc, pKernelChannel, rmEngineType, exceptLevel, exceptType, scope, partitionAttributionId, bOsRcCallbackNeeded) NV_STATUS krcErrorSendEventNotificationsCtxDma_FWCLIENT(struct OBJGPU *pGpu, struct KernelRc *pKernelRc, struct KernelChannel *pKernelChannel, RC_NOTIFIER_SCOPE scope); @@ -323,72 +424,12 @@ static inline void krcWatchdogCallbackPerf(struct OBJGPU *pGpu, struct KernelRc NV_STATUS krcConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelRc *pKernelRc, ENGDESCRIPTOR engDescriptor); -static inline NV_STATUS krcConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelRc *pKernelRc, ENGDESCRIPTOR engDescriptor) { - return pKernelRc->__krcConstructEngine__(pGpu, pKernelRc, engDescriptor); -} - static inline void krcWatchdogRecovery_f2d351(struct OBJGPU *pGpu, struct KernelRc *pKernelRc) { NV_ASSERT_PRECOMP(0); } void krcWatchdogRecovery_KERNEL(struct OBJGPU *pGpu, struct KernelRc *pKernelRc); -static inline void krcWatchdogRecovery_DISPATCH(struct OBJGPU *pGpu, struct KernelRc *pKernelRc) { - pKernelRc->__krcWatchdogRecovery__(pGpu, pKernelRc); -} - -static inline NV_STATUS krcStateLoad_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg0) { - return pEngstate->__krcStateLoad__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS krcStateUnload_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg0) { - return pEngstate->__krcStateUnload__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS krcStateInitLocked_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate) { - return pEngstate->__krcStateInitLocked__(pGpu, pEngstate); -} - -static inline NV_STATUS krcStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg0) { - return pEngstate->__krcStatePreLoad__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS krcStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg0) { - return pEngstate->__krcStatePostUnload__(pGpu, pEngstate, arg0); -} - -static inline void krcStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate) { - pEngstate->__krcStateDestroy__(pGpu, pEngstate); -} - -static inline NV_STATUS krcStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg0) { - return pEngstate->__krcStatePreUnload__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS krcStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate) { - return pEngstate->__krcStateInitUnlocked__(pGpu, pEngstate); -} - -static inline void krcInitMissing_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate) { - pEngstate->__krcInitMissing__(pGpu, pEngstate); -} - -static inline NV_STATUS krcStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate) { - return pEngstate->__krcStatePreInitLocked__(pGpu, pEngstate); -} - -static inline NV_STATUS krcStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate) { - return pEngstate->__krcStatePreInitUnlocked__(pGpu, pEngstate); -} - -static inline NV_STATUS krcStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate, NvU32 arg0) { - return pEngstate->__krcStatePostLoad__(pGpu, pEngstate, arg0); -} - -static inline NvBool krcIsPresent_DISPATCH(POBJGPU pGpu, struct KernelRc *pEngstate) { - return pEngstate->__krcIsPresent__(pGpu, pEngstate); -} - void krcInitRegistryOverridesDelayed_IMPL(struct OBJGPU *pGpu, struct KernelRc *pKernelRc); #ifdef __nvoc_kernel_rc_h_disabled @@ -547,15 +588,15 @@ static inline void krcWatchdogCallbackVblankRecovery(struct OBJGPU *pGpu, struct #define krcWatchdogCallbackVblankRecovery(pGpu, pKernelRc) krcWatchdogCallbackVblankRecovery_IMPL(pGpu, pKernelRc) #endif //__nvoc_kernel_rc_h_disabled -NV_STATUS krcWatchdogGetClientHandle_IMPL(struct KernelRc *arg0, NvHandle *arg1); +NV_STATUS krcWatchdogGetClientHandle_IMPL(struct KernelRc *arg1, NvHandle *arg2); #ifdef __nvoc_kernel_rc_h_disabled -static inline NV_STATUS krcWatchdogGetClientHandle(struct KernelRc *arg0, NvHandle *arg1) { +static inline NV_STATUS krcWatchdogGetClientHandle(struct KernelRc *arg1, NvHandle *arg2) { NV_ASSERT_FAILED_PRECOMP("KernelRc was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_rc_h_disabled -#define krcWatchdogGetClientHandle(arg0, arg1) krcWatchdogGetClientHandle_IMPL(arg0, arg1) +#define krcWatchdogGetClientHandle(arg1, arg2) krcWatchdogGetClientHandle_IMPL(arg1, arg2) #endif //__nvoc_kernel_rc_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_kernel_sched_mgr_nvoc.c b/src/nvidia/generated/g_kernel_sched_mgr_nvoc.c index bf303c3052..9b32924d28 100644 --- a/src/nvidia/generated/g_kernel_sched_mgr_nvoc.c +++ b/src/nvidia/generated/g_kernel_sched_mgr_nvoc.c @@ -89,10 +89,13 @@ NV_STATUS __nvoc_ctor_KernelSchedMgr(KernelSchedMgr *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelSchedMgr_1(KernelSchedMgr *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_KernelSchedMgr_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_KernelSchedMgr(KernelSchedMgr *pThis) { __nvoc_init_funcTable_KernelSchedMgr_1(pThis); } diff --git a/src/nvidia/generated/g_kernel_sched_mgr_nvoc.h b/src/nvidia/generated/g_kernel_sched_mgr_nvoc.h index 877b3f24ed..6e7dda90da 100644 --- a/src/nvidia/generated/g_kernel_sched_mgr_nvoc.h +++ b/src/nvidia/generated/g_kernel_sched_mgr_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_SCHED_MGR_NVOC_H_ #define _G_KERNEL_SCHED_MGR_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -34,6 +41,7 @@ extern "C" { * @brief Provides definition for KernelSchedMgr data-structures and interfaces. */ +#pragma once #include "g_kernel_sched_mgr_nvoc.h" #ifndef _KERNELSCHEDMGR_H_ @@ -70,11 +78,20 @@ typedef enum __SCHED_POLICY SCHED_POLICY; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelSchedMgr { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct KernelSchedMgr *__nvoc_pbase_KernelSchedMgr; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct KernelSchedMgr *__nvoc_pbase_KernelSchedMgr; // kschedmgr + + // Data members NvBool bIsSchedSwEnabled; NvU32 configSchedPolicy; }; @@ -88,6 +105,7 @@ typedef struct KernelSchedMgr KernelSchedMgr; #define __nvoc_class_id_KernelSchedMgr 0xea0970 #endif /* __nvoc_class_id_KernelSchedMgr */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelSchedMgr; #define __staticCast_KernelSchedMgr(pThis) \ @@ -100,13 +118,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelSchedMgr; ((KernelSchedMgr*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelSchedMgr))) #endif //__nvoc_kernel_sched_mgr_h_disabled - NV_STATUS __nvoc_objCreateDynamic_KernelSchedMgr(KernelSchedMgr**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_KernelSchedMgr(KernelSchedMgr**, Dynamic*, NvU32); #define __objCreate_KernelSchedMgr(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelSchedMgr((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions static inline NvBool kschedmgrIsSchedSwEnabled(struct KernelSchedMgr *pKernelSchedMgr) { return pKernelSchedMgr->bIsSchedSwEnabled; } diff --git a/src/nvidia/generated/g_kernel_sec2_nvoc.c b/src/nvidia/generated/g_kernel_sec2_nvoc.c index 30c4148152..d551fba7e4 100644 --- a/src/nvidia/generated/g_kernel_sec2_nvoc.c +++ b/src/nvidia/generated/g_kernel_sec2_nvoc.c @@ -102,142 +102,182 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelSec2 = /*pExportInfo=*/ &__nvoc_export_info_KernelSec2 }; -static NV_STATUS __nvoc_thunk_KernelSec2_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelSec2, ENGDESCRIPTOR arg0) { - return ksec2ConstructEngine(pGpu, (struct KernelSec2 *)(((unsigned char *)pKernelSec2) - __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg0); +// 5 down-thunk(s) defined to bridge methods in KernelSec2 from superclasses + +// ksec2ConstructEngine: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_KernelSec2_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelSec2, ENGDESCRIPTOR arg3) { + return ksec2ConstructEngine(pGpu, (struct KernelSec2 *)(((unsigned char *) pKernelSec2) - __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_KernelSec2_intrservRegisterIntrService(struct OBJGPU *pGpu, struct IntrService *pKernelSec2, IntrServiceRecord pRecords[171]) { - ksec2RegisterIntrService(pGpu, (struct KernelSec2 *)(((unsigned char *)pKernelSec2) - __nvoc_rtti_KernelSec2_IntrService.offset), pRecords); +// ksec2RegisterIntrService: virtual halified (singleton optimized) override (intrserv) base (intrserv) body +static void __nvoc_down_thunk_KernelSec2_intrservRegisterIntrService(struct OBJGPU *pGpu, struct IntrService *pKernelSec2, IntrServiceRecord pRecords[175]) { + ksec2RegisterIntrService(pGpu, (struct KernelSec2 *)(((unsigned char *) pKernelSec2) - __nvoc_rtti_KernelSec2_IntrService.offset), pRecords); } -static NV_STATUS __nvoc_thunk_KernelSec2_intrservServiceNotificationInterrupt(struct OBJGPU *arg0, struct IntrService *arg1, IntrServiceServiceNotificationInterruptArguments *arg2) { - return ksec2ServiceNotificationInterrupt(arg0, (struct KernelSec2 *)(((unsigned char *)arg1) - __nvoc_rtti_KernelSec2_IntrService.offset), arg2); +// ksec2ServiceNotificationInterrupt: virtual halified (singleton optimized) override (intrserv) base (intrserv) +static NV_STATUS __nvoc_down_thunk_KernelSec2_intrservServiceNotificationInterrupt(struct OBJGPU *arg1, struct IntrService *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3) { + return ksec2ServiceNotificationInterrupt(arg1, (struct KernelSec2 *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelSec2_IntrService.offset), arg3); } -static NV_STATUS __nvoc_thunk_KernelSec2_kflcnResetHw(struct OBJGPU *pGpu, struct KernelFalcon *pKernelSec2) { - return ksec2ResetHw(pGpu, (struct KernelSec2 *)(((unsigned char *)pKernelSec2) - __nvoc_rtti_KernelSec2_KernelFalcon.offset)); +// ksec2ResetHw: virtual halified (2 hals) override (kflcn) base (kflcn) body +static NV_STATUS __nvoc_down_thunk_KernelSec2_kflcnResetHw(struct OBJGPU *pGpu, struct KernelFalcon *pKernelSec2) { + return ksec2ResetHw(pGpu, (struct KernelSec2 *)(((unsigned char *) pKernelSec2) - __nvoc_rtti_KernelSec2_KernelFalcon.offset)); } -static NV_STATUS __nvoc_thunk_KernelSec2_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelSec2, NvU32 arg0) { - return ksec2StateLoad(pGpu, (struct KernelSec2 *)(((unsigned char *)pKernelSec2) - __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg0); +// ksec2StateLoad: virtual halified (3 hals) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_KernelSec2_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelSec2, NvU32 arg3) { + return ksec2StateLoad(pGpu, (struct KernelSec2 *)(((unsigned char *) pKernelSec2) - __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg3); } -static NvBool __nvoc_thunk_KernelCrashCatEngine_ksec2Configured(struct KernelSec2 *arg0) { - return kcrashcatEngineConfigured((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset)); + +// 29 up-thunk(s) defined to bridge methods in KernelSec2 to superclasses + +// ksec2InitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_ksec2InitMissing(POBJGPU pGpu, struct KernelSec2 *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); } -static NvU32 __nvoc_thunk_KernelCrashCatEngine_ksec2PriRead(struct KernelSec2 *arg0, NvU32 offset) { - return kcrashcatEnginePriRead((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), offset); +// ksec2StatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePreInitLocked(POBJGPU pGpu, struct KernelSec2 *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); } -static void __nvoc_thunk_KernelFalcon_ksec2RegWrite(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 offset, NvU32 data) { - kflcnRegWrite(pGpu, (struct KernelFalcon *)(((unsigned char *)pKernelFlcn) + __nvoc_rtti_KernelSec2_KernelFalcon.offset), offset, data); +// ksec2StatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePreInitUnlocked(POBJGPU pGpu, struct KernelSec2 *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); } -static NvU32 __nvoc_thunk_KernelFalcon_ksec2MaskDmemAddr(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 addr) { - return kflcnMaskDmemAddr(pGpu, (struct KernelFalcon *)(((unsigned char *)pKernelFlcn) + __nvoc_rtti_KernelSec2_KernelFalcon.offset), addr); +// ksec2StateInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StateInitLocked(POBJGPU pGpu, struct KernelSec2 *pEngstate) { + return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_ksec2StateDestroy(POBJGPU pGpu, struct KernelSec2 *pEngstate) { - engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); +// ksec2StateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StateInitUnlocked(POBJGPU pGpu, struct KernelSec2 *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); } -static void __nvoc_thunk_KernelCrashCatEngine_ksec2Vprintf(struct KernelSec2 *arg0, NvBool bReportStart, const char *fmt, va_list args) { - kcrashcatEngineVprintf((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), bReportStart, fmt, args); +// ksec2StatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePreLoad(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg3); } -static NvBool __nvoc_thunk_IntrService_ksec2ClearInterrupt(struct OBJGPU *pGpu, struct KernelSec2 *pIntrService, IntrServiceClearInterruptArguments *pParams) { - return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_KernelSec2_IntrService.offset), pParams); +// ksec2StatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePostLoad(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_KernelCrashCatEngine_ksec2PriWrite(struct KernelSec2 *arg0, NvU32 offset, NvU32 data) { - kcrashcatEnginePriWrite((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), offset, data); +// ksec2StatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePreUnload(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg3); } -static void *__nvoc_thunk_KernelCrashCatEngine_ksec2MapBufferDescriptor(struct KernelSec2 *arg0, CrashCatBufferDescriptor *pBufDesc) { - return kcrashcatEngineMapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), pBufDesc); +// ksec2StateUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StateUnload(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { + return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_KernelCrashCatEngine_ksec2SyncBufferDescriptor(struct KernelSec2 *arg0, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { - kcrashcatEngineSyncBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), pBufDesc, offset, size); +// ksec2StatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePostUnload(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg3); } -static NvU32 __nvoc_thunk_KernelFalcon_ksec2RegRead(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 offset) { - return kflcnRegRead(pGpu, (struct KernelFalcon *)(((unsigned char *)pKernelFlcn) + __nvoc_rtti_KernelSec2_KernelFalcon.offset), offset); +// ksec2StateDestroy: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_ksec2StateDestroy(POBJGPU pGpu, struct KernelSec2 *pEngstate) { + engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); } -static NvBool __nvoc_thunk_OBJENGSTATE_ksec2IsPresent(POBJGPU pGpu, struct KernelSec2 *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); +// ksec2IsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_ksec2IsPresent(POBJGPU pGpu, struct KernelSec2 *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); } -static NvU32 __nvoc_thunk_IntrService_ksec2ServiceInterrupt(struct OBJGPU *pGpu, struct KernelSec2 *pIntrService, IntrServiceServiceInterruptArguments *pParams) { - return intrservServiceInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_KernelSec2_IntrService.offset), pParams); +// ksec2ClearInterrupt: virtual inherited (intrserv) base (intrserv) +static NvBool __nvoc_up_thunk_IntrService_ksec2ClearInterrupt(struct OBJGPU *pGpu, struct KernelSec2 *pIntrService, IntrServiceClearInterruptArguments *pParams) { + return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_KernelSec2_IntrService.offset), pParams); } -static void __nvoc_thunk_KernelCrashCatEngine_ksec2ReadEmem(struct KernelSec2 *arg0, NvU64 offset, NvU64 size, void *pBuf) { - kcrashcatEngineReadEmem((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), offset, size, pBuf); +// ksec2ServiceInterrupt: virtual inherited (intrserv) base (intrserv) +static NvU32 __nvoc_up_thunk_IntrService_ksec2ServiceInterrupt(struct OBJGPU *pGpu, struct KernelSec2 *pIntrService, IntrServiceServiceInterruptArguments *pParams) { + return intrservServiceInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_KernelSec2_IntrService.offset), pParams); } -static const NvU32 *__nvoc_thunk_KernelCrashCatEngine_ksec2GetScratchOffsets(struct KernelSec2 *arg0, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { - return kcrashcatEngineGetScratchOffsets((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), scratchGroupId); +// ksec2RegRead: virtual halified (2 hals) inherited (kflcn) base (kflcn) body +static NvU32 __nvoc_up_thunk_KernelFalcon_ksec2RegRead(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 offset) { + return kflcnRegRead(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) + __nvoc_rtti_KernelSec2_KernelFalcon.offset), offset); } -static void __nvoc_thunk_KernelCrashCatEngine_ksec2Unload(struct KernelSec2 *arg0) { - kcrashcatEngineUnload((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset)); +// ksec2RegWrite: virtual halified (2 hals) inherited (kflcn) base (kflcn) body +static void __nvoc_up_thunk_KernelFalcon_ksec2RegWrite(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 offset, NvU32 data) { + kflcnRegWrite(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) + __nvoc_rtti_KernelSec2_KernelFalcon.offset), offset, data); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_ksec2StateUnload(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg0) { - return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg0); +// ksec2MaskDmemAddr: virtual halified (3 hals) inherited (kflcn) base (kflcn) body +static NvU32 __nvoc_up_thunk_KernelFalcon_ksec2MaskDmemAddr(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 addr) { + return kflcnMaskDmemAddr(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) + __nvoc_rtti_KernelSec2_KernelFalcon.offset), addr); } -static NvU32 __nvoc_thunk_KernelCrashCatEngine_ksec2GetWFL0Offset(struct KernelSec2 *arg0) { - return kcrashcatEngineGetWFL0Offset((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset)); +// ksec2Configured: virtual inherited (kcrashcatEngine) base (kflcn) +static NvBool __nvoc_up_thunk_KernelCrashCatEngine_ksec2Configured(struct KernelSec2 *arg_this) { + return kcrashcatEngineConfigured((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_ksec2StateInitLocked(POBJGPU pGpu, struct KernelSec2 *pEngstate) { - return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); +// ksec2Unload: virtual inherited (kcrashcatEngine) base (kflcn) +static void __nvoc_up_thunk_KernelCrashCatEngine_ksec2Unload(struct KernelSec2 *arg_this) { + kcrashcatEngineUnload((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_ksec2StatePreLoad(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg0); +// ksec2Vprintf: virtual inherited (kcrashcatEngine) base (kflcn) +static void __nvoc_up_thunk_KernelCrashCatEngine_ksec2Vprintf(struct KernelSec2 *arg_this, NvBool bReportStart, const char *fmt, va_list args) { + kcrashcatEngineVprintf((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), bReportStart, fmt, args); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_ksec2StatePostUnload(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg0); +// ksec2PriRead: virtual inherited (kcrashcatEngine) base (kflcn) +static NvU32 __nvoc_up_thunk_KernelCrashCatEngine_ksec2PriRead(struct KernelSec2 *arg_this, NvU32 offset) { + return kcrashcatEnginePriRead((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), offset); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_ksec2StatePreUnload(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg0); +// ksec2PriWrite: virtual inherited (kcrashcatEngine) base (kflcn) +static void __nvoc_up_thunk_KernelCrashCatEngine_ksec2PriWrite(struct KernelSec2 *arg_this, NvU32 offset, NvU32 data) { + kcrashcatEnginePriWrite((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), offset, data); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_ksec2StateInitUnlocked(POBJGPU pGpu, struct KernelSec2 *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); +// ksec2MapBufferDescriptor: virtual inherited (kcrashcatEngine) base (kflcn) +static void * __nvoc_up_thunk_KernelCrashCatEngine_ksec2MapBufferDescriptor(struct KernelSec2 *arg_this, CrashCatBufferDescriptor *pBufDesc) { + return kcrashcatEngineMapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), pBufDesc); } -static void __nvoc_thunk_OBJENGSTATE_ksec2InitMissing(POBJGPU pGpu, struct KernelSec2 *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); +// ksec2UnmapBufferDescriptor: virtual inherited (kcrashcatEngine) base (kflcn) +static void __nvoc_up_thunk_KernelCrashCatEngine_ksec2UnmapBufferDescriptor(struct KernelSec2 *arg_this, CrashCatBufferDescriptor *pBufDesc) { + kcrashcatEngineUnmapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), pBufDesc); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_ksec2StatePreInitLocked(POBJGPU pGpu, struct KernelSec2 *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); +// ksec2SyncBufferDescriptor: virtual inherited (kcrashcatEngine) base (kflcn) +static void __nvoc_up_thunk_KernelCrashCatEngine_ksec2SyncBufferDescriptor(struct KernelSec2 *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { + kcrashcatEngineSyncBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), pBufDesc, offset, size); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_ksec2StatePreInitUnlocked(POBJGPU pGpu, struct KernelSec2 *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); +// ksec2ReadDmem: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) +static void __nvoc_up_thunk_KernelCrashCatEngine_ksec2ReadDmem(struct KernelSec2 *arg_this, NvU32 offset, NvU32 size, void *pBuf) { + kcrashcatEngineReadDmem((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), offset, size, pBuf); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_ksec2StatePostLoad(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg0); +// ksec2ReadEmem: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) +static void __nvoc_up_thunk_KernelCrashCatEngine_ksec2ReadEmem(struct KernelSec2 *arg_this, NvU64 offset, NvU64 size, void *pBuf) { + kcrashcatEngineReadEmem((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), offset, size, pBuf); } -static void __nvoc_thunk_KernelCrashCatEngine_ksec2UnmapBufferDescriptor(struct KernelSec2 *arg0, CrashCatBufferDescriptor *pBufDesc) { - kcrashcatEngineUnmapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), pBufDesc); +// ksec2GetScratchOffsets: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) +static const NvU32 * __nvoc_up_thunk_KernelCrashCatEngine_ksec2GetScratchOffsets(struct KernelSec2 *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { + return kcrashcatEngineGetScratchOffsets((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), scratchGroupId); } -static void __nvoc_thunk_KernelCrashCatEngine_ksec2ReadDmem(struct KernelSec2 *arg0, NvU32 offset, NvU32 size, void *pBuf) { - kcrashcatEngineReadDmem((struct KernelCrashCatEngine *)(((unsigned char *)arg0) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), offset, size, pBuf); +// ksec2GetWFL0Offset: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) +static NvU32 __nvoc_up_thunk_KernelCrashCatEngine_ksec2GetWFL0Offset(struct KernelSec2 *arg_this) { + return kcrashcatEngineGetWFL0Offset((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelSec2 = { /*numEntries=*/ 0, @@ -292,6 +332,7 @@ NV_STATUS __nvoc_ctor_KernelSec2(KernelSec2 *pThis, RmHalspecOwner *pRmhalspecow return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelSec2_1(KernelSec2 *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -304,16 +345,19 @@ static void __nvoc_init_funcTable_KernelSec2_1(KernelSec2 *pThis, RmHalspecOwner PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); - // Hal function -- ksec2ConstructEngine + // ksec2ConstructEngine -- virtual halified (singleton optimized) override (engstate) base (engstate) body pThis->__ksec2ConstructEngine__ = &ksec2ConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelSec2_engstateConstructEngine; - // Hal function -- ksec2RegisterIntrService + // ksec2RegisterIntrService -- virtual halified (singleton optimized) override (intrserv) base (intrserv) body pThis->__ksec2RegisterIntrService__ = &ksec2RegisterIntrService_IMPL; + pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_KernelSec2_intrservRegisterIntrService; - // Hal function -- ksec2ServiceNotificationInterrupt + // ksec2ServiceNotificationInterrupt -- virtual halified (singleton optimized) override (intrserv) base (intrserv) pThis->__ksec2ServiceNotificationInterrupt__ = &ksec2ServiceNotificationInterrupt_IMPL; + pThis->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_down_thunk_KernelSec2_intrservServiceNotificationInterrupt; - // Hal function -- ksec2ConfigureFalcon + // ksec2ConfigureFalcon -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__ksec2ConfigureFalcon__ = &ksec2ConfigureFalcon_GA100; @@ -327,7 +371,7 @@ static void __nvoc_init_funcTable_KernelSec2_1(KernelSec2 *pThis, RmHalspecOwner pThis->__ksec2ConfigureFalcon__ = &ksec2ConfigureFalcon_GA102; } - // Hal function -- ksec2ResetHw + // ksec2ResetHw -- virtual halified (2 hals) override (kflcn) base (kflcn) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__ksec2ResetHw__ = &ksec2ResetHw_5baef9; @@ -336,8 +380,9 @@ static void __nvoc_init_funcTable_KernelSec2_1(KernelSec2 *pThis, RmHalspecOwner { pThis->__ksec2ResetHw__ = &ksec2ResetHw_TU102; } + pThis->__nvoc_base_KernelFalcon.__kflcnResetHw__ = &__nvoc_down_thunk_KernelSec2_kflcnResetHw; - // Hal function -- ksec2StateLoad + // ksec2StateLoad -- virtual halified (3 hals) override (engstate) base (engstate) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__ksec2StateLoad__ = &ksec2StateLoad_56cd7a; @@ -354,8 +399,9 @@ static void __nvoc_init_funcTable_KernelSec2_1(KernelSec2 *pThis, RmHalspecOwner pThis->__ksec2StateLoad__ = &ksec2StateLoad_56cd7a; } } + pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelSec2_engstateStateLoad; - // Hal function -- ksec2ReadUcodeFuseVersion + // ksec2ReadUcodeFuseVersion -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__ksec2ReadUcodeFuseVersion__ = &ksec2ReadUcodeFuseVersion_474d46; @@ -372,7 +418,7 @@ static void __nvoc_init_funcTable_KernelSec2_1(KernelSec2 *pThis, RmHalspecOwner } } - // Hal function -- ksec2GetBinArchiveBlUcode + // ksec2GetBinArchiveBlUcode -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__ksec2GetBinArchiveBlUcode__ = &ksec2GetBinArchiveBlUcode_80f438; @@ -389,7 +435,7 @@ static void __nvoc_init_funcTable_KernelSec2_1(KernelSec2 *pThis, RmHalspecOwner } } - // Hal function -- ksec2GetGenericBlUcode + // ksec2GetGenericBlUcode -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__ksec2GetGenericBlUcode__ = &ksec2GetGenericBlUcode_5baef9; @@ -406,7 +452,7 @@ static void __nvoc_init_funcTable_KernelSec2_1(KernelSec2 *pThis, RmHalspecOwner } } - // Hal function -- ksec2GetBinArchiveSecurescrubUcode + // ksec2GetBinArchiveSecurescrubUcode -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__ksec2GetBinArchiveSecurescrubUcode__ = &ksec2GetBinArchiveSecurescrubUcode_80f438; @@ -423,76 +469,99 @@ static void __nvoc_init_funcTable_KernelSec2_1(KernelSec2 *pThis, RmHalspecOwner } } - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelSec2_engstateConstructEngine; - - pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_thunk_KernelSec2_intrservRegisterIntrService; + // ksec2InitMissing -- virtual inherited (engstate) base (engstate) + pThis->__ksec2InitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2InitMissing; - pThis->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_thunk_KernelSec2_intrservServiceNotificationInterrupt; + // ksec2StatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__ksec2StatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StatePreInitLocked; - pThis->__nvoc_base_KernelFalcon.__kflcnResetHw__ = &__nvoc_thunk_KernelSec2_kflcnResetHw; + // ksec2StatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__ksec2StatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StatePreInitUnlocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_thunk_KernelSec2_engstateStateLoad; + // ksec2StateInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__ksec2StateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StateInitLocked; - pThis->__ksec2Configured__ = &__nvoc_thunk_KernelCrashCatEngine_ksec2Configured; + // ksec2StateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__ksec2StateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StateInitUnlocked; - pThis->__ksec2PriRead__ = &__nvoc_thunk_KernelCrashCatEngine_ksec2PriRead; + // ksec2StatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__ksec2StatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StatePreLoad; - pThis->__ksec2RegWrite__ = &__nvoc_thunk_KernelFalcon_ksec2RegWrite; + // ksec2StatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__ksec2StatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StatePostLoad; - pThis->__ksec2MaskDmemAddr__ = &__nvoc_thunk_KernelFalcon_ksec2MaskDmemAddr; + // ksec2StatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__ksec2StatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StatePreUnload; - pThis->__ksec2StateDestroy__ = &__nvoc_thunk_OBJENGSTATE_ksec2StateDestroy; + // ksec2StateUnload -- virtual inherited (engstate) base (engstate) + pThis->__ksec2StateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StateUnload; - pThis->__ksec2Vprintf__ = &__nvoc_thunk_KernelCrashCatEngine_ksec2Vprintf; + // ksec2StatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__ksec2StatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StatePostUnload; - pThis->__ksec2ClearInterrupt__ = &__nvoc_thunk_IntrService_ksec2ClearInterrupt; + // ksec2StateDestroy -- virtual inherited (engstate) base (engstate) + pThis->__ksec2StateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StateDestroy; - pThis->__ksec2PriWrite__ = &__nvoc_thunk_KernelCrashCatEngine_ksec2PriWrite; + // ksec2IsPresent -- virtual inherited (engstate) base (engstate) + pThis->__ksec2IsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2IsPresent; - pThis->__ksec2MapBufferDescriptor__ = &__nvoc_thunk_KernelCrashCatEngine_ksec2MapBufferDescriptor; + // ksec2ClearInterrupt -- virtual inherited (intrserv) base (intrserv) + pThis->__ksec2ClearInterrupt__ = &__nvoc_up_thunk_IntrService_ksec2ClearInterrupt; - pThis->__ksec2SyncBufferDescriptor__ = &__nvoc_thunk_KernelCrashCatEngine_ksec2SyncBufferDescriptor; + // ksec2ServiceInterrupt -- virtual inherited (intrserv) base (intrserv) + pThis->__ksec2ServiceInterrupt__ = &__nvoc_up_thunk_IntrService_ksec2ServiceInterrupt; - pThis->__ksec2RegRead__ = &__nvoc_thunk_KernelFalcon_ksec2RegRead; + // ksec2RegRead -- virtual halified (2 hals) inherited (kflcn) base (kflcn) body + pThis->__ksec2RegRead__ = &__nvoc_up_thunk_KernelFalcon_ksec2RegRead; - pThis->__ksec2IsPresent__ = &__nvoc_thunk_OBJENGSTATE_ksec2IsPresent; + // ksec2RegWrite -- virtual halified (2 hals) inherited (kflcn) base (kflcn) body + pThis->__ksec2RegWrite__ = &__nvoc_up_thunk_KernelFalcon_ksec2RegWrite; - pThis->__ksec2ServiceInterrupt__ = &__nvoc_thunk_IntrService_ksec2ServiceInterrupt; + // ksec2MaskDmemAddr -- virtual halified (3 hals) inherited (kflcn) base (kflcn) body + pThis->__ksec2MaskDmemAddr__ = &__nvoc_up_thunk_KernelFalcon_ksec2MaskDmemAddr; - pThis->__ksec2ReadEmem__ = &__nvoc_thunk_KernelCrashCatEngine_ksec2ReadEmem; + // ksec2Configured -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__ksec2Configured__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2Configured; - pThis->__ksec2GetScratchOffsets__ = &__nvoc_thunk_KernelCrashCatEngine_ksec2GetScratchOffsets; + // ksec2Unload -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__ksec2Unload__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2Unload; - pThis->__ksec2Unload__ = &__nvoc_thunk_KernelCrashCatEngine_ksec2Unload; + // ksec2Vprintf -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__ksec2Vprintf__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2Vprintf; - pThis->__ksec2StateUnload__ = &__nvoc_thunk_OBJENGSTATE_ksec2StateUnload; + // ksec2PriRead -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__ksec2PriRead__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2PriRead; - pThis->__ksec2GetWFL0Offset__ = &__nvoc_thunk_KernelCrashCatEngine_ksec2GetWFL0Offset; + // ksec2PriWrite -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__ksec2PriWrite__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2PriWrite; - pThis->__ksec2StateInitLocked__ = &__nvoc_thunk_OBJENGSTATE_ksec2StateInitLocked; + // ksec2MapBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__ksec2MapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2MapBufferDescriptor; - pThis->__ksec2StatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_ksec2StatePreLoad; + // ksec2UnmapBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__ksec2UnmapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2UnmapBufferDescriptor; - pThis->__ksec2StatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_ksec2StatePostUnload; + // ksec2SyncBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kflcn) + pThis->__ksec2SyncBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2SyncBufferDescriptor; - pThis->__ksec2StatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_ksec2StatePreUnload; + // ksec2ReadDmem -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + pThis->__ksec2ReadDmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2ReadDmem; - pThis->__ksec2StateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_ksec2StateInitUnlocked; + // ksec2ReadEmem -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + pThis->__ksec2ReadEmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2ReadEmem; - pThis->__ksec2InitMissing__ = &__nvoc_thunk_OBJENGSTATE_ksec2InitMissing; + // ksec2GetScratchOffsets -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + pThis->__ksec2GetScratchOffsets__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2GetScratchOffsets; - pThis->__ksec2StatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_ksec2StatePreInitLocked; + // ksec2GetWFL0Offset -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + pThis->__ksec2GetWFL0Offset__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2GetWFL0Offset; +} // End __nvoc_init_funcTable_KernelSec2_1 with approximately 61 basic block(s). - pThis->__ksec2StatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_ksec2StatePreInitUnlocked; - - pThis->__ksec2StatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_ksec2StatePostLoad; - - pThis->__ksec2UnmapBufferDescriptor__ = &__nvoc_thunk_KernelCrashCatEngine_ksec2UnmapBufferDescriptor; - - pThis->__ksec2ReadDmem__ = &__nvoc_thunk_KernelCrashCatEngine_ksec2ReadDmem; -} +// Initialize vtable(s) for 39 virtual method(s). void __nvoc_init_funcTable_KernelSec2(KernelSec2 *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 39 per-object function pointer(s). __nvoc_init_funcTable_KernelSec2_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_sec2_nvoc.h b/src/nvidia/generated/g_kernel_sec2_nvoc.h index b2407017da..0ca97e65af 100644 --- a/src/nvidia/generated/g_kernel_sec2_nvoc.h +++ b/src/nvidia/generated/g_kernel_sec2_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_SEC2_NVOC_H_ #define _G_KERNEL_SEC2_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_sec2_nvoc.h" #ifndef KERNEL_SEC2_H @@ -54,57 +62,68 @@ typedef struct _def_rm_flcn_bl_desc RM_FLCN_BL_DESC; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelSec2 { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; struct IntrService __nvoc_base_IntrService; struct KernelFalcon __nvoc_base_KernelFalcon; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct IntrService *__nvoc_pbase_IntrService; - struct CrashCatEngine *__nvoc_pbase_CrashCatEngine; - struct KernelCrashCatEngine *__nvoc_pbase_KernelCrashCatEngine; - struct KernelFalcon *__nvoc_pbase_KernelFalcon; - struct KernelSec2 *__nvoc_pbase_KernelSec2; - NV_STATUS (*__ksec2ConstructEngine__)(struct OBJGPU *, struct KernelSec2 *, ENGDESCRIPTOR); - void (*__ksec2RegisterIntrService__)(struct OBJGPU *, struct KernelSec2 *, IntrServiceRecord *); - NV_STATUS (*__ksec2ServiceNotificationInterrupt__)(struct OBJGPU *, struct KernelSec2 *, IntrServiceServiceNotificationInterruptArguments *); - NV_STATUS (*__ksec2ConfigureFalcon__)(struct OBJGPU *, struct KernelSec2 *); - NV_STATUS (*__ksec2ResetHw__)(struct OBJGPU *, struct KernelSec2 *); - NV_STATUS (*__ksec2StateLoad__)(struct OBJGPU *, struct KernelSec2 *, NvU32); - NvU32 (*__ksec2ReadUcodeFuseVersion__)(struct OBJGPU *, struct KernelSec2 *, NvU32); - const BINDATA_ARCHIVE *(*__ksec2GetBinArchiveBlUcode__)(struct OBJGPU *, struct KernelSec2 *); - NV_STATUS (*__ksec2GetGenericBlUcode__)(struct OBJGPU *, struct KernelSec2 *, const RM_FLCN_BL_DESC **, const NvU8 **); - const BINDATA_ARCHIVE *(*__ksec2GetBinArchiveSecurescrubUcode__)(struct OBJGPU *, struct KernelSec2 *); - NvBool (*__ksec2Configured__)(struct KernelSec2 *); - NvU32 (*__ksec2PriRead__)(struct KernelSec2 *, NvU32); - void (*__ksec2RegWrite__)(struct OBJGPU *, struct KernelSec2 *, NvU32, NvU32); - NvU32 (*__ksec2MaskDmemAddr__)(struct OBJGPU *, struct KernelSec2 *, NvU32); - void (*__ksec2StateDestroy__)(POBJGPU, struct KernelSec2 *); - void (*__ksec2Vprintf__)(struct KernelSec2 *, NvBool, const char *, va_list); - NvBool (*__ksec2ClearInterrupt__)(struct OBJGPU *, struct KernelSec2 *, IntrServiceClearInterruptArguments *); - void (*__ksec2PriWrite__)(struct KernelSec2 *, NvU32, NvU32); - void *(*__ksec2MapBufferDescriptor__)(struct KernelSec2 *, CrashCatBufferDescriptor *); - void (*__ksec2SyncBufferDescriptor__)(struct KernelSec2 *, CrashCatBufferDescriptor *, NvU32, NvU32); - NvU32 (*__ksec2RegRead__)(struct OBJGPU *, struct KernelSec2 *, NvU32); - NvBool (*__ksec2IsPresent__)(POBJGPU, struct KernelSec2 *); - NvU32 (*__ksec2ServiceInterrupt__)(struct OBJGPU *, struct KernelSec2 *, IntrServiceServiceInterruptArguments *); - void (*__ksec2ReadEmem__)(struct KernelSec2 *, NvU64, NvU64, void *); - const NvU32 *(*__ksec2GetScratchOffsets__)(struct KernelSec2 *, NV_CRASHCAT_SCRATCH_GROUP_ID); - void (*__ksec2Unload__)(struct KernelSec2 *); - NV_STATUS (*__ksec2StateUnload__)(POBJGPU, struct KernelSec2 *, NvU32); - NvU32 (*__ksec2GetWFL0Offset__)(struct KernelSec2 *); - NV_STATUS (*__ksec2StateInitLocked__)(POBJGPU, struct KernelSec2 *); - NV_STATUS (*__ksec2StatePreLoad__)(POBJGPU, struct KernelSec2 *, NvU32); - NV_STATUS (*__ksec2StatePostUnload__)(POBJGPU, struct KernelSec2 *, NvU32); - NV_STATUS (*__ksec2StatePreUnload__)(POBJGPU, struct KernelSec2 *, NvU32); - NV_STATUS (*__ksec2StateInitUnlocked__)(POBJGPU, struct KernelSec2 *); - void (*__ksec2InitMissing__)(POBJGPU, struct KernelSec2 *); - NV_STATUS (*__ksec2StatePreInitLocked__)(POBJGPU, struct KernelSec2 *); - NV_STATUS (*__ksec2StatePreInitUnlocked__)(POBJGPU, struct KernelSec2 *); - NV_STATUS (*__ksec2StatePostLoad__)(POBJGPU, struct KernelSec2 *, NvU32); - void (*__ksec2UnmapBufferDescriptor__)(struct KernelSec2 *, CrashCatBufferDescriptor *); - void (*__ksec2ReadDmem__)(struct KernelSec2 *, NvU32, NvU32, void *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct IntrService *__nvoc_pbase_IntrService; // intrserv super + struct CrashCatEngine *__nvoc_pbase_CrashCatEngine; // crashcatEngine super^3 + struct KernelCrashCatEngine *__nvoc_pbase_KernelCrashCatEngine; // kcrashcatEngine super^2 + struct KernelFalcon *__nvoc_pbase_KernelFalcon; // kflcn super + struct KernelSec2 *__nvoc_pbase_KernelSec2; // ksec2 + + // Vtable with 39 per-object function pointers + NV_STATUS (*__ksec2ConstructEngine__)(struct OBJGPU *, struct KernelSec2 * /*this*/, ENGDESCRIPTOR); // virtual halified (singleton optimized) override (engstate) base (engstate) body + void (*__ksec2RegisterIntrService__)(struct OBJGPU *, struct KernelSec2 * /*this*/, IntrServiceRecord *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) body + NV_STATUS (*__ksec2ServiceNotificationInterrupt__)(struct OBJGPU *, struct KernelSec2 * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) + NV_STATUS (*__ksec2ConfigureFalcon__)(struct OBJGPU *, struct KernelSec2 * /*this*/); // halified (3 hals) body + NV_STATUS (*__ksec2ResetHw__)(struct OBJGPU *, struct KernelSec2 * /*this*/); // virtual halified (2 hals) override (kflcn) base (kflcn) body + NV_STATUS (*__ksec2StateLoad__)(struct OBJGPU *, struct KernelSec2 * /*this*/, NvU32); // virtual halified (3 hals) override (engstate) base (engstate) body + NvU32 (*__ksec2ReadUcodeFuseVersion__)(struct OBJGPU *, struct KernelSec2 * /*this*/, NvU32); // halified (3 hals) body + const BINDATA_ARCHIVE * (*__ksec2GetBinArchiveBlUcode__)(struct OBJGPU *, struct KernelSec2 * /*this*/); // halified (3 hals) body + NV_STATUS (*__ksec2GetGenericBlUcode__)(struct OBJGPU *, struct KernelSec2 * /*this*/, const RM_FLCN_BL_DESC **, const NvU8 **); // halified (3 hals) body + const BINDATA_ARCHIVE * (*__ksec2GetBinArchiveSecurescrubUcode__)(struct OBJGPU *, struct KernelSec2 * /*this*/); // halified (3 hals) body + void (*__ksec2InitMissing__)(POBJGPU, struct KernelSec2 * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__ksec2StatePreInitLocked__)(POBJGPU, struct KernelSec2 * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__ksec2StatePreInitUnlocked__)(POBJGPU, struct KernelSec2 * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__ksec2StateInitLocked__)(POBJGPU, struct KernelSec2 * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__ksec2StateInitUnlocked__)(POBJGPU, struct KernelSec2 * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__ksec2StatePreLoad__)(POBJGPU, struct KernelSec2 * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__ksec2StatePostLoad__)(POBJGPU, struct KernelSec2 * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__ksec2StatePreUnload__)(POBJGPU, struct KernelSec2 * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__ksec2StateUnload__)(POBJGPU, struct KernelSec2 * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__ksec2StatePostUnload__)(POBJGPU, struct KernelSec2 * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__ksec2StateDestroy__)(POBJGPU, struct KernelSec2 * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__ksec2IsPresent__)(POBJGPU, struct KernelSec2 * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__ksec2ClearInterrupt__)(struct OBJGPU *, struct KernelSec2 * /*this*/, IntrServiceClearInterruptArguments *); // virtual inherited (intrserv) base (intrserv) + NvU32 (*__ksec2ServiceInterrupt__)(struct OBJGPU *, struct KernelSec2 * /*this*/, IntrServiceServiceInterruptArguments *); // virtual inherited (intrserv) base (intrserv) + NvU32 (*__ksec2RegRead__)(struct OBJGPU *, struct KernelSec2 * /*this*/, NvU32); // virtual halified (2 hals) inherited (kflcn) base (kflcn) body + void (*__ksec2RegWrite__)(struct OBJGPU *, struct KernelSec2 * /*this*/, NvU32, NvU32); // virtual halified (2 hals) inherited (kflcn) base (kflcn) body + NvU32 (*__ksec2MaskDmemAddr__)(struct OBJGPU *, struct KernelSec2 * /*this*/, NvU32); // virtual halified (3 hals) inherited (kflcn) base (kflcn) body + NvBool (*__ksec2Configured__)(struct KernelSec2 * /*this*/); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__ksec2Unload__)(struct KernelSec2 * /*this*/); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__ksec2Vprintf__)(struct KernelSec2 * /*this*/, NvBool, const char *, va_list); // virtual inherited (kcrashcatEngine) base (kflcn) + NvU32 (*__ksec2PriRead__)(struct KernelSec2 * /*this*/, NvU32); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__ksec2PriWrite__)(struct KernelSec2 * /*this*/, NvU32, NvU32); // virtual inherited (kcrashcatEngine) base (kflcn) + void * (*__ksec2MapBufferDescriptor__)(struct KernelSec2 * /*this*/, CrashCatBufferDescriptor *); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__ksec2UnmapBufferDescriptor__)(struct KernelSec2 * /*this*/, CrashCatBufferDescriptor *); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__ksec2SyncBufferDescriptor__)(struct KernelSec2 * /*this*/, CrashCatBufferDescriptor *, NvU32, NvU32); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__ksec2ReadDmem__)(struct KernelSec2 * /*this*/, NvU32, NvU32, void *); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + void (*__ksec2ReadEmem__)(struct KernelSec2 * /*this*/, NvU64, NvU64, void *); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + const NvU32 * (*__ksec2GetScratchOffsets__)(struct KernelSec2 * /*this*/, NV_CRASHCAT_SCRATCH_GROUP_ID); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + NvU32 (*__ksec2GetWFL0Offset__)(struct KernelSec2 * /*this*/); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + + // Data members const RM_FLCN_BL_DESC *pGenericBlUcodeDesc; const NvU8 *pGenericBlUcodeImg; }; @@ -118,6 +137,7 @@ typedef struct KernelSec2 KernelSec2; #define __nvoc_class_id_KernelSec2 0x2f36c9 #endif /* __nvoc_class_id_KernelSec2 */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelSec2; #define __staticCast_KernelSec2(pThis) \ @@ -130,6 +150,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelSec2; ((KernelSec2*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelSec2))) #endif //__nvoc_kernel_sec2_h_disabled +// Property macros #define PDB_PROP_KSEC2_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_KSEC2_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -139,261 +160,311 @@ NV_STATUS __nvoc_objCreate_KernelSec2(KernelSec2**, Dynamic*, NvU32); #define __objCreate_KernelSec2(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelSec2((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define ksec2ConstructEngine(pGpu, pKernelSec2, arg0) ksec2ConstructEngine_DISPATCH(pGpu, pKernelSec2, arg0) -#define ksec2ConstructEngine_HAL(pGpu, pKernelSec2, arg0) ksec2ConstructEngine_DISPATCH(pGpu, pKernelSec2, arg0) + +// Wrapper macros +#define ksec2ConstructEngine_FNPTR(pKernelSec2) pKernelSec2->__ksec2ConstructEngine__ +#define ksec2ConstructEngine(pGpu, pKernelSec2, arg3) ksec2ConstructEngine_DISPATCH(pGpu, pKernelSec2, arg3) +#define ksec2ConstructEngine_HAL(pGpu, pKernelSec2, arg3) ksec2ConstructEngine_DISPATCH(pGpu, pKernelSec2, arg3) +#define ksec2RegisterIntrService_FNPTR(pKernelSec2) pKernelSec2->__ksec2RegisterIntrService__ #define ksec2RegisterIntrService(pGpu, pKernelSec2, pRecords) ksec2RegisterIntrService_DISPATCH(pGpu, pKernelSec2, pRecords) #define ksec2RegisterIntrService_HAL(pGpu, pKernelSec2, pRecords) ksec2RegisterIntrService_DISPATCH(pGpu, pKernelSec2, pRecords) -#define ksec2ServiceNotificationInterrupt(arg0, arg1, arg2) ksec2ServiceNotificationInterrupt_DISPATCH(arg0, arg1, arg2) -#define ksec2ServiceNotificationInterrupt_HAL(arg0, arg1, arg2) ksec2ServiceNotificationInterrupt_DISPATCH(arg0, arg1, arg2) +#define ksec2ServiceNotificationInterrupt_FNPTR(arg_this) arg_this->__ksec2ServiceNotificationInterrupt__ +#define ksec2ServiceNotificationInterrupt(arg1, arg_this, arg3) ksec2ServiceNotificationInterrupt_DISPATCH(arg1, arg_this, arg3) +#define ksec2ServiceNotificationInterrupt_HAL(arg1, arg_this, arg3) ksec2ServiceNotificationInterrupt_DISPATCH(arg1, arg_this, arg3) +#define ksec2ConfigureFalcon_FNPTR(pKernelSec2) pKernelSec2->__ksec2ConfigureFalcon__ #define ksec2ConfigureFalcon(pGpu, pKernelSec2) ksec2ConfigureFalcon_DISPATCH(pGpu, pKernelSec2) #define ksec2ConfigureFalcon_HAL(pGpu, pKernelSec2) ksec2ConfigureFalcon_DISPATCH(pGpu, pKernelSec2) +#define ksec2ResetHw_FNPTR(pKernelSec2) pKernelSec2->__ksec2ResetHw__ #define ksec2ResetHw(pGpu, pKernelSec2) ksec2ResetHw_DISPATCH(pGpu, pKernelSec2) #define ksec2ResetHw_HAL(pGpu, pKernelSec2) ksec2ResetHw_DISPATCH(pGpu, pKernelSec2) -#define ksec2StateLoad(pGpu, pKernelSec2, arg0) ksec2StateLoad_DISPATCH(pGpu, pKernelSec2, arg0) -#define ksec2StateLoad_HAL(pGpu, pKernelSec2, arg0) ksec2StateLoad_DISPATCH(pGpu, pKernelSec2, arg0) +#define ksec2StateLoad_FNPTR(pKernelSec2) pKernelSec2->__ksec2StateLoad__ +#define ksec2StateLoad(pGpu, pKernelSec2, arg3) ksec2StateLoad_DISPATCH(pGpu, pKernelSec2, arg3) +#define ksec2StateLoad_HAL(pGpu, pKernelSec2, arg3) ksec2StateLoad_DISPATCH(pGpu, pKernelSec2, arg3) +#define ksec2ReadUcodeFuseVersion_FNPTR(pKernelSec2) pKernelSec2->__ksec2ReadUcodeFuseVersion__ #define ksec2ReadUcodeFuseVersion(pGpu, pKernelSec2, ucodeId) ksec2ReadUcodeFuseVersion_DISPATCH(pGpu, pKernelSec2, ucodeId) #define ksec2ReadUcodeFuseVersion_HAL(pGpu, pKernelSec2, ucodeId) ksec2ReadUcodeFuseVersion_DISPATCH(pGpu, pKernelSec2, ucodeId) +#define ksec2GetBinArchiveBlUcode_FNPTR(pKernelSec2) pKernelSec2->__ksec2GetBinArchiveBlUcode__ #define ksec2GetBinArchiveBlUcode(pGpu, pKernelSec2) ksec2GetBinArchiveBlUcode_DISPATCH(pGpu, pKernelSec2) #define ksec2GetBinArchiveBlUcode_HAL(pGpu, pKernelSec2) ksec2GetBinArchiveBlUcode_DISPATCH(pGpu, pKernelSec2) +#define ksec2GetGenericBlUcode_FNPTR(pKernelSec2) pKernelSec2->__ksec2GetGenericBlUcode__ #define ksec2GetGenericBlUcode(pGpu, pKernelSec2, ppDesc, ppImg) ksec2GetGenericBlUcode_DISPATCH(pGpu, pKernelSec2, ppDesc, ppImg) #define ksec2GetGenericBlUcode_HAL(pGpu, pKernelSec2, ppDesc, ppImg) ksec2GetGenericBlUcode_DISPATCH(pGpu, pKernelSec2, ppDesc, ppImg) +#define ksec2GetBinArchiveSecurescrubUcode_FNPTR(pKernelSec2) pKernelSec2->__ksec2GetBinArchiveSecurescrubUcode__ #define ksec2GetBinArchiveSecurescrubUcode(pGpu, pKernelSec2) ksec2GetBinArchiveSecurescrubUcode_DISPATCH(pGpu, pKernelSec2) #define ksec2GetBinArchiveSecurescrubUcode_HAL(pGpu, pKernelSec2) ksec2GetBinArchiveSecurescrubUcode_DISPATCH(pGpu, pKernelSec2) -#define ksec2Configured(arg0) ksec2Configured_DISPATCH(arg0) -#define ksec2PriRead(arg0, offset) ksec2PriRead_DISPATCH(arg0, offset) -#define ksec2RegWrite(pGpu, pKernelFlcn, offset, data) ksec2RegWrite_DISPATCH(pGpu, pKernelFlcn, offset, data) -#define ksec2MaskDmemAddr(pGpu, pKernelFlcn, addr) ksec2MaskDmemAddr_DISPATCH(pGpu, pKernelFlcn, addr) -#define ksec2StateDestroy(pGpu, pEngstate) ksec2StateDestroy_DISPATCH(pGpu, pEngstate) -#define ksec2Vprintf(arg0, bReportStart, fmt, args) ksec2Vprintf_DISPATCH(arg0, bReportStart, fmt, args) -#define ksec2ClearInterrupt(pGpu, pIntrService, pParams) ksec2ClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define ksec2PriWrite(arg0, offset, data) ksec2PriWrite_DISPATCH(arg0, offset, data) -#define ksec2MapBufferDescriptor(arg0, pBufDesc) ksec2MapBufferDescriptor_DISPATCH(arg0, pBufDesc) -#define ksec2SyncBufferDescriptor(arg0, pBufDesc, offset, size) ksec2SyncBufferDescriptor_DISPATCH(arg0, pBufDesc, offset, size) -#define ksec2RegRead(pGpu, pKernelFlcn, offset) ksec2RegRead_DISPATCH(pGpu, pKernelFlcn, offset) -#define ksec2IsPresent(pGpu, pEngstate) ksec2IsPresent_DISPATCH(pGpu, pEngstate) -#define ksec2ServiceInterrupt(pGpu, pIntrService, pParams) ksec2ServiceInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define ksec2ReadEmem(arg0, offset, size, pBuf) ksec2ReadEmem_DISPATCH(arg0, offset, size, pBuf) -#define ksec2GetScratchOffsets(arg0, scratchGroupId) ksec2GetScratchOffsets_DISPATCH(arg0, scratchGroupId) -#define ksec2Unload(arg0) ksec2Unload_DISPATCH(arg0) -#define ksec2StateUnload(pGpu, pEngstate, arg0) ksec2StateUnload_DISPATCH(pGpu, pEngstate, arg0) -#define ksec2GetWFL0Offset(arg0) ksec2GetWFL0Offset_DISPATCH(arg0) -#define ksec2StateInitLocked(pGpu, pEngstate) ksec2StateInitLocked_DISPATCH(pGpu, pEngstate) -#define ksec2StatePreLoad(pGpu, pEngstate, arg0) ksec2StatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define ksec2StatePostUnload(pGpu, pEngstate, arg0) ksec2StatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define ksec2StatePreUnload(pGpu, pEngstate, arg0) ksec2StatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define ksec2StateInitUnlocked(pGpu, pEngstate) ksec2StateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define ksec2InitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define ksec2InitMissing(pGpu, pEngstate) ksec2InitMissing_DISPATCH(pGpu, pEngstate) +#define ksec2StatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define ksec2StatePreInitLocked(pGpu, pEngstate) ksec2StatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define ksec2StatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define ksec2StatePreInitUnlocked(pGpu, pEngstate) ksec2StatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define ksec2StatePostLoad(pGpu, pEngstate, arg0) ksec2StatePostLoad_DISPATCH(pGpu, pEngstate, arg0) -#define ksec2UnmapBufferDescriptor(arg0, pBufDesc) ksec2UnmapBufferDescriptor_DISPATCH(arg0, pBufDesc) -#define ksec2ReadDmem(arg0, offset, size, pBuf) ksec2ReadDmem_DISPATCH(arg0, offset, size, pBuf) -NV_STATUS ksec2ConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, ENGDESCRIPTOR arg0); - -static inline NV_STATUS ksec2ConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, ENGDESCRIPTOR arg0) { - return pKernelSec2->__ksec2ConstructEngine__(pGpu, pKernelSec2, arg0); -} - -void ksec2RegisterIntrService_IMPL(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, IntrServiceRecord pRecords[171]); - -static inline void ksec2RegisterIntrService_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, IntrServiceRecord pRecords[171]) { +#define ksec2StateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define ksec2StateInitLocked(pGpu, pEngstate) ksec2StateInitLocked_DISPATCH(pGpu, pEngstate) +#define ksec2StateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define ksec2StateInitUnlocked(pGpu, pEngstate) ksec2StateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define ksec2StatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define ksec2StatePreLoad(pGpu, pEngstate, arg3) ksec2StatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define ksec2StatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define ksec2StatePostLoad(pGpu, pEngstate, arg3) ksec2StatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define ksec2StatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define ksec2StatePreUnload(pGpu, pEngstate, arg3) ksec2StatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define ksec2StateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define ksec2StateUnload(pGpu, pEngstate, arg3) ksec2StateUnload_DISPATCH(pGpu, pEngstate, arg3) +#define ksec2StatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define ksec2StatePostUnload(pGpu, pEngstate, arg3) ksec2StatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define ksec2StateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define ksec2StateDestroy(pGpu, pEngstate) ksec2StateDestroy_DISPATCH(pGpu, pEngstate) +#define ksec2IsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define ksec2IsPresent(pGpu, pEngstate) ksec2IsPresent_DISPATCH(pGpu, pEngstate) +#define ksec2ClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservClearInterrupt__ +#define ksec2ClearInterrupt(pGpu, pIntrService, pParams) ksec2ClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) +#define ksec2ServiceInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservServiceInterrupt__ +#define ksec2ServiceInterrupt(pGpu, pIntrService, pParams) ksec2ServiceInterrupt_DISPATCH(pGpu, pIntrService, pParams) +#define ksec2RegRead_FNPTR(pKernelFlcn) pKernelFlcn->__nvoc_base_KernelFalcon.__kflcnRegRead__ +#define ksec2RegRead(pGpu, pKernelFlcn, offset) ksec2RegRead_DISPATCH(pGpu, pKernelFlcn, offset) +#define ksec2RegRead_HAL(pGpu, pKernelFlcn, offset) ksec2RegRead_DISPATCH(pGpu, pKernelFlcn, offset) +#define ksec2RegWrite_FNPTR(pKernelFlcn) pKernelFlcn->__nvoc_base_KernelFalcon.__kflcnRegWrite__ +#define ksec2RegWrite(pGpu, pKernelFlcn, offset, data) ksec2RegWrite_DISPATCH(pGpu, pKernelFlcn, offset, data) +#define ksec2RegWrite_HAL(pGpu, pKernelFlcn, offset, data) ksec2RegWrite_DISPATCH(pGpu, pKernelFlcn, offset, data) +#define ksec2MaskDmemAddr_FNPTR(pKernelFlcn) pKernelFlcn->__nvoc_base_KernelFalcon.__kflcnMaskDmemAddr__ +#define ksec2MaskDmemAddr(pGpu, pKernelFlcn, addr) ksec2MaskDmemAddr_DISPATCH(pGpu, pKernelFlcn, addr) +#define ksec2MaskDmemAddr_HAL(pGpu, pKernelFlcn, addr) ksec2MaskDmemAddr_DISPATCH(pGpu, pKernelFlcn, addr) +#define ksec2Configured_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineConfigured__ +#define ksec2Configured(arg_this) ksec2Configured_DISPATCH(arg_this) +#define ksec2Unload_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineUnload__ +#define ksec2Unload(arg_this) ksec2Unload_DISPATCH(arg_this) +#define ksec2Vprintf_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineVprintf__ +#define ksec2Vprintf(arg_this, bReportStart, fmt, args) ksec2Vprintf_DISPATCH(arg_this, bReportStart, fmt, args) +#define ksec2PriRead_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEnginePriRead__ +#define ksec2PriRead(arg_this, offset) ksec2PriRead_DISPATCH(arg_this, offset) +#define ksec2PriWrite_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEnginePriWrite__ +#define ksec2PriWrite(arg_this, offset, data) ksec2PriWrite_DISPATCH(arg_this, offset, data) +#define ksec2MapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineMapBufferDescriptor__ +#define ksec2MapBufferDescriptor(arg_this, pBufDesc) ksec2MapBufferDescriptor_DISPATCH(arg_this, pBufDesc) +#define ksec2UnmapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineUnmapBufferDescriptor__ +#define ksec2UnmapBufferDescriptor(arg_this, pBufDesc) ksec2UnmapBufferDescriptor_DISPATCH(arg_this, pBufDesc) +#define ksec2SyncBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineSyncBufferDescriptor__ +#define ksec2SyncBufferDescriptor(arg_this, pBufDesc, offset, size) ksec2SyncBufferDescriptor_DISPATCH(arg_this, pBufDesc, offset, size) +#define ksec2ReadDmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineReadDmem__ +#define ksec2ReadDmem(arg_this, offset, size, pBuf) ksec2ReadDmem_DISPATCH(arg_this, offset, size, pBuf) +#define ksec2ReadDmem_HAL(arg_this, offset, size, pBuf) ksec2ReadDmem_DISPATCH(arg_this, offset, size, pBuf) +#define ksec2ReadEmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineReadEmem__ +#define ksec2ReadEmem(arg_this, offset, size, pBuf) ksec2ReadEmem_DISPATCH(arg_this, offset, size, pBuf) +#define ksec2ReadEmem_HAL(arg_this, offset, size, pBuf) ksec2ReadEmem_DISPATCH(arg_this, offset, size, pBuf) +#define ksec2GetScratchOffsets_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineGetScratchOffsets__ +#define ksec2GetScratchOffsets(arg_this, scratchGroupId) ksec2GetScratchOffsets_DISPATCH(arg_this, scratchGroupId) +#define ksec2GetScratchOffsets_HAL(arg_this, scratchGroupId) ksec2GetScratchOffsets_DISPATCH(arg_this, scratchGroupId) +#define ksec2GetWFL0Offset_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineGetWFL0Offset__ +#define ksec2GetWFL0Offset(arg_this) ksec2GetWFL0Offset_DISPATCH(arg_this) +#define ksec2GetWFL0Offset_HAL(arg_this) ksec2GetWFL0Offset_DISPATCH(arg_this) + +// Dispatch functions +static inline NV_STATUS ksec2ConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, ENGDESCRIPTOR arg3) { + return pKernelSec2->__ksec2ConstructEngine__(pGpu, pKernelSec2, arg3); +} + +static inline void ksec2RegisterIntrService_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, IntrServiceRecord pRecords[175]) { pKernelSec2->__ksec2RegisterIntrService__(pGpu, pKernelSec2, pRecords); } -NV_STATUS ksec2ServiceNotificationInterrupt_IMPL(struct OBJGPU *arg0, struct KernelSec2 *arg1, IntrServiceServiceNotificationInterruptArguments *arg2); - -static inline NV_STATUS ksec2ServiceNotificationInterrupt_DISPATCH(struct OBJGPU *arg0, struct KernelSec2 *arg1, IntrServiceServiceNotificationInterruptArguments *arg2) { - return arg1->__ksec2ServiceNotificationInterrupt__(arg0, arg1, arg2); +static inline NV_STATUS ksec2ServiceNotificationInterrupt_DISPATCH(struct OBJGPU *arg1, struct KernelSec2 *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3) { + return arg_this->__ksec2ServiceNotificationInterrupt__(arg1, arg_this, arg3); } -NV_STATUS ksec2ConfigureFalcon_TU102(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2); - -NV_STATUS ksec2ConfigureFalcon_GA100(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2); - -NV_STATUS ksec2ConfigureFalcon_GA102(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2); - static inline NV_STATUS ksec2ConfigureFalcon_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2) { return pKernelSec2->__ksec2ConfigureFalcon__(pGpu, pKernelSec2); } -NV_STATUS ksec2ResetHw_TU102(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2); - -static inline NV_STATUS ksec2ResetHw_5baef9(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - static inline NV_STATUS ksec2ResetHw_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2) { return pKernelSec2->__ksec2ResetHw__(pGpu, pKernelSec2); } -NV_STATUS ksec2StateLoad_GH100(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, NvU32 arg0); - -static inline NV_STATUS ksec2StateLoad_56cd7a(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, NvU32 arg0) { - return NV_OK; +static inline NV_STATUS ksec2StateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, NvU32 arg3) { + return pKernelSec2->__ksec2StateLoad__(pGpu, pKernelSec2, arg3); } -static inline NV_STATUS ksec2StateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, NvU32 arg0) { - return pKernelSec2->__ksec2StateLoad__(pGpu, pKernelSec2, arg0); +static inline NvU32 ksec2ReadUcodeFuseVersion_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, NvU32 ucodeId) { + return pKernelSec2->__ksec2ReadUcodeFuseVersion__(pGpu, pKernelSec2, ucodeId); } -static inline NvU32 ksec2ReadUcodeFuseVersion_b2b553(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, NvU32 ucodeId) { - return 0; +static inline const BINDATA_ARCHIVE * ksec2GetBinArchiveBlUcode_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2) { + return pKernelSec2->__ksec2GetBinArchiveBlUcode__(pGpu, pKernelSec2); } -NvU32 ksec2ReadUcodeFuseVersion_GA100(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, NvU32 ucodeId); - -static inline NvU32 ksec2ReadUcodeFuseVersion_474d46(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, NvU32 ucodeId) { - NV_ASSERT_OR_RETURN_PRECOMP(0, 0); +static inline NV_STATUS ksec2GetGenericBlUcode_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, const RM_FLCN_BL_DESC **ppDesc, const NvU8 **ppImg) { + return pKernelSec2->__ksec2GetGenericBlUcode__(pGpu, pKernelSec2, ppDesc, ppImg); } -static inline NvU32 ksec2ReadUcodeFuseVersion_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, NvU32 ucodeId) { - return pKernelSec2->__ksec2ReadUcodeFuseVersion__(pGpu, pKernelSec2, ucodeId); +static inline const BINDATA_ARCHIVE * ksec2GetBinArchiveSecurescrubUcode_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2) { + return pKernelSec2->__ksec2GetBinArchiveSecurescrubUcode__(pGpu, pKernelSec2); } -const BINDATA_ARCHIVE *ksec2GetBinArchiveBlUcode_TU102(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2); - -static inline const BINDATA_ARCHIVE *ksec2GetBinArchiveBlUcode_80f438(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); +static inline void ksec2InitMissing_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate) { + pEngstate->__ksec2InitMissing__(pGpu, pEngstate); } -static inline const BINDATA_ARCHIVE *ksec2GetBinArchiveBlUcode_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2) { - return pKernelSec2->__ksec2GetBinArchiveBlUcode__(pGpu, pKernelSec2); +static inline NV_STATUS ksec2StatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate) { + return pEngstate->__ksec2StatePreInitLocked__(pGpu, pEngstate); } -NV_STATUS ksec2GetGenericBlUcode_TU102(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, const RM_FLCN_BL_DESC **ppDesc, const NvU8 **ppImg); - -static inline NV_STATUS ksec2GetGenericBlUcode_5baef9(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, const RM_FLCN_BL_DESC **ppDesc, const NvU8 **ppImg) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +static inline NV_STATUS ksec2StatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate) { + return pEngstate->__ksec2StatePreInitUnlocked__(pGpu, pEngstate); } -static inline NV_STATUS ksec2GetGenericBlUcode_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, const RM_FLCN_BL_DESC **ppDesc, const NvU8 **ppImg) { - return pKernelSec2->__ksec2GetGenericBlUcode__(pGpu, pKernelSec2, ppDesc, ppImg); +static inline NV_STATUS ksec2StateInitLocked_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate) { + return pEngstate->__ksec2StateInitLocked__(pGpu, pEngstate); } -const BINDATA_ARCHIVE *ksec2GetBinArchiveSecurescrubUcode_AD10X(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2); - -static inline const BINDATA_ARCHIVE *ksec2GetBinArchiveSecurescrubUcode_80f438(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); +static inline NV_STATUS ksec2StateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate) { + return pEngstate->__ksec2StateInitUnlocked__(pGpu, pEngstate); } -static inline const BINDATA_ARCHIVE *ksec2GetBinArchiveSecurescrubUcode_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2) { - return pKernelSec2->__ksec2GetBinArchiveSecurescrubUcode__(pGpu, pKernelSec2); +static inline NV_STATUS ksec2StatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { + return pEngstate->__ksec2StatePreLoad__(pGpu, pEngstate, arg3); } -static inline NvBool ksec2Configured_DISPATCH(struct KernelSec2 *arg0) { - return arg0->__ksec2Configured__(arg0); +static inline NV_STATUS ksec2StatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { + return pEngstate->__ksec2StatePostLoad__(pGpu, pEngstate, arg3); } -static inline NvU32 ksec2PriRead_DISPATCH(struct KernelSec2 *arg0, NvU32 offset) { - return arg0->__ksec2PriRead__(arg0, offset); +static inline NV_STATUS ksec2StatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { + return pEngstate->__ksec2StatePreUnload__(pGpu, pEngstate, arg3); } -static inline void ksec2RegWrite_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 offset, NvU32 data) { - pKernelFlcn->__ksec2RegWrite__(pGpu, pKernelFlcn, offset, data); +static inline NV_STATUS ksec2StateUnload_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { + return pEngstate->__ksec2StateUnload__(pGpu, pEngstate, arg3); } -static inline NvU32 ksec2MaskDmemAddr_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 addr) { - return pKernelFlcn->__ksec2MaskDmemAddr__(pGpu, pKernelFlcn, addr); +static inline NV_STATUS ksec2StatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { + return pEngstate->__ksec2StatePostUnload__(pGpu, pEngstate, arg3); } static inline void ksec2StateDestroy_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate) { pEngstate->__ksec2StateDestroy__(pGpu, pEngstate); } -static inline void ksec2Vprintf_DISPATCH(struct KernelSec2 *arg0, NvBool bReportStart, const char *fmt, va_list args) { - arg0->__ksec2Vprintf__(arg0, bReportStart, fmt, args); +static inline NvBool ksec2IsPresent_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate) { + return pEngstate->__ksec2IsPresent__(pGpu, pEngstate); } static inline NvBool ksec2ClearInterrupt_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pIntrService, IntrServiceClearInterruptArguments *pParams) { return pIntrService->__ksec2ClearInterrupt__(pGpu, pIntrService, pParams); } -static inline void ksec2PriWrite_DISPATCH(struct KernelSec2 *arg0, NvU32 offset, NvU32 data) { - arg0->__ksec2PriWrite__(arg0, offset, data); +static inline NvU32 ksec2ServiceInterrupt_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pIntrService, IntrServiceServiceInterruptArguments *pParams) { + return pIntrService->__ksec2ServiceInterrupt__(pGpu, pIntrService, pParams); } -static inline void *ksec2MapBufferDescriptor_DISPATCH(struct KernelSec2 *arg0, CrashCatBufferDescriptor *pBufDesc) { - return arg0->__ksec2MapBufferDescriptor__(arg0, pBufDesc); +static inline NvU32 ksec2RegRead_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 offset) { + return pKernelFlcn->__ksec2RegRead__(pGpu, pKernelFlcn, offset); } -static inline void ksec2SyncBufferDescriptor_DISPATCH(struct KernelSec2 *arg0, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { - arg0->__ksec2SyncBufferDescriptor__(arg0, pBufDesc, offset, size); +static inline void ksec2RegWrite_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 offset, NvU32 data) { + pKernelFlcn->__ksec2RegWrite__(pGpu, pKernelFlcn, offset, data); } -static inline NvU32 ksec2RegRead_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 offset) { - return pKernelFlcn->__ksec2RegRead__(pGpu, pKernelFlcn, offset); +static inline NvU32 ksec2MaskDmemAddr_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 addr) { + return pKernelFlcn->__ksec2MaskDmemAddr__(pGpu, pKernelFlcn, addr); } -static inline NvBool ksec2IsPresent_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate) { - return pEngstate->__ksec2IsPresent__(pGpu, pEngstate); +static inline NvBool ksec2Configured_DISPATCH(struct KernelSec2 *arg_this) { + return arg_this->__ksec2Configured__(arg_this); } -static inline NvU32 ksec2ServiceInterrupt_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pIntrService, IntrServiceServiceInterruptArguments *pParams) { - return pIntrService->__ksec2ServiceInterrupt__(pGpu, pIntrService, pParams); +static inline void ksec2Unload_DISPATCH(struct KernelSec2 *arg_this) { + arg_this->__ksec2Unload__(arg_this); } -static inline void ksec2ReadEmem_DISPATCH(struct KernelSec2 *arg0, NvU64 offset, NvU64 size, void *pBuf) { - arg0->__ksec2ReadEmem__(arg0, offset, size, pBuf); +static inline void ksec2Vprintf_DISPATCH(struct KernelSec2 *arg_this, NvBool bReportStart, const char *fmt, va_list args) { + arg_this->__ksec2Vprintf__(arg_this, bReportStart, fmt, args); } -static inline const NvU32 *ksec2GetScratchOffsets_DISPATCH(struct KernelSec2 *arg0, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { - return arg0->__ksec2GetScratchOffsets__(arg0, scratchGroupId); +static inline NvU32 ksec2PriRead_DISPATCH(struct KernelSec2 *arg_this, NvU32 offset) { + return arg_this->__ksec2PriRead__(arg_this, offset); } -static inline void ksec2Unload_DISPATCH(struct KernelSec2 *arg0) { - arg0->__ksec2Unload__(arg0); +static inline void ksec2PriWrite_DISPATCH(struct KernelSec2 *arg_this, NvU32 offset, NvU32 data) { + arg_this->__ksec2PriWrite__(arg_this, offset, data); } -static inline NV_STATUS ksec2StateUnload_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg0) { - return pEngstate->__ksec2StateUnload__(pGpu, pEngstate, arg0); +static inline void * ksec2MapBufferDescriptor_DISPATCH(struct KernelSec2 *arg_this, CrashCatBufferDescriptor *pBufDesc) { + return arg_this->__ksec2MapBufferDescriptor__(arg_this, pBufDesc); } -static inline NvU32 ksec2GetWFL0Offset_DISPATCH(struct KernelSec2 *arg0) { - return arg0->__ksec2GetWFL0Offset__(arg0); +static inline void ksec2UnmapBufferDescriptor_DISPATCH(struct KernelSec2 *arg_this, CrashCatBufferDescriptor *pBufDesc) { + arg_this->__ksec2UnmapBufferDescriptor__(arg_this, pBufDesc); } -static inline NV_STATUS ksec2StateInitLocked_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate) { - return pEngstate->__ksec2StateInitLocked__(pGpu, pEngstate); +static inline void ksec2SyncBufferDescriptor_DISPATCH(struct KernelSec2 *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { + arg_this->__ksec2SyncBufferDescriptor__(arg_this, pBufDesc, offset, size); } -static inline NV_STATUS ksec2StatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg0) { - return pEngstate->__ksec2StatePreLoad__(pGpu, pEngstate, arg0); +static inline void ksec2ReadDmem_DISPATCH(struct KernelSec2 *arg_this, NvU32 offset, NvU32 size, void *pBuf) { + arg_this->__ksec2ReadDmem__(arg_this, offset, size, pBuf); } -static inline NV_STATUS ksec2StatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg0) { - return pEngstate->__ksec2StatePostUnload__(pGpu, pEngstate, arg0); +static inline void ksec2ReadEmem_DISPATCH(struct KernelSec2 *arg_this, NvU64 offset, NvU64 size, void *pBuf) { + arg_this->__ksec2ReadEmem__(arg_this, offset, size, pBuf); } -static inline NV_STATUS ksec2StatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg0) { - return pEngstate->__ksec2StatePreUnload__(pGpu, pEngstate, arg0); +static inline const NvU32 * ksec2GetScratchOffsets_DISPATCH(struct KernelSec2 *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { + return arg_this->__ksec2GetScratchOffsets__(arg_this, scratchGroupId); } -static inline NV_STATUS ksec2StateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate) { - return pEngstate->__ksec2StateInitUnlocked__(pGpu, pEngstate); +static inline NvU32 ksec2GetWFL0Offset_DISPATCH(struct KernelSec2 *arg_this) { + return arg_this->__ksec2GetWFL0Offset__(arg_this); } -static inline void ksec2InitMissing_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate) { - pEngstate->__ksec2InitMissing__(pGpu, pEngstate); +NV_STATUS ksec2ConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, ENGDESCRIPTOR arg3); + +void ksec2RegisterIntrService_IMPL(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, IntrServiceRecord pRecords[175]); + +NV_STATUS ksec2ServiceNotificationInterrupt_IMPL(struct OBJGPU *arg1, struct KernelSec2 *arg2, IntrServiceServiceNotificationInterruptArguments *arg3); + +NV_STATUS ksec2ConfigureFalcon_TU102(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2); + +NV_STATUS ksec2ConfigureFalcon_GA100(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2); + +NV_STATUS ksec2ConfigureFalcon_GA102(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2); + +NV_STATUS ksec2ResetHw_TU102(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2); + +static inline NV_STATUS ksec2ResetHw_5baef9(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NV_STATUS ksec2StatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate) { - return pEngstate->__ksec2StatePreInitLocked__(pGpu, pEngstate); +NV_STATUS ksec2StateLoad_GH100(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, NvU32 arg3); + +static inline NV_STATUS ksec2StateLoad_56cd7a(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, NvU32 arg3) { + return NV_OK; } -static inline NV_STATUS ksec2StatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate) { - return pEngstate->__ksec2StatePreInitUnlocked__(pGpu, pEngstate); +static inline NvU32 ksec2ReadUcodeFuseVersion_b2b553(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, NvU32 ucodeId) { + return 0; } -static inline NV_STATUS ksec2StatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg0) { - return pEngstate->__ksec2StatePostLoad__(pGpu, pEngstate, arg0); +NvU32 ksec2ReadUcodeFuseVersion_GA100(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, NvU32 ucodeId); + +static inline NvU32 ksec2ReadUcodeFuseVersion_474d46(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, NvU32 ucodeId) { + NV_ASSERT_OR_RETURN_PRECOMP(0, 0); +} + +const BINDATA_ARCHIVE *ksec2GetBinArchiveBlUcode_TU102(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2); + +static inline const BINDATA_ARCHIVE *ksec2GetBinArchiveBlUcode_80f438(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2) { + NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); } -static inline void ksec2UnmapBufferDescriptor_DISPATCH(struct KernelSec2 *arg0, CrashCatBufferDescriptor *pBufDesc) { - arg0->__ksec2UnmapBufferDescriptor__(arg0, pBufDesc); +NV_STATUS ksec2GetGenericBlUcode_TU102(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, const RM_FLCN_BL_DESC **ppDesc, const NvU8 **ppImg); + +static inline NV_STATUS ksec2GetGenericBlUcode_5baef9(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, const RM_FLCN_BL_DESC **ppDesc, const NvU8 **ppImg) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline void ksec2ReadDmem_DISPATCH(struct KernelSec2 *arg0, NvU32 offset, NvU32 size, void *pBuf) { - arg0->__ksec2ReadDmem__(arg0, offset, size, pBuf); +const BINDATA_ARCHIVE *ksec2GetBinArchiveSecurescrubUcode_AD10X(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2); + +static inline const BINDATA_ARCHIVE *ksec2GetBinArchiveSecurescrubUcode_80f438(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2) { + NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); } void ksec2Destruct_IMPL(struct KernelSec2 *pKernelSec2); diff --git a/src/nvidia/generated/g_kernel_sm_debugger_session_nvoc.c b/src/nvidia/generated/g_kernel_sm_debugger_session_nvoc.c index f2f78a8950..240d21c2c6 100644 --- a/src/nvidia/generated/g_kernel_sm_debugger_session_nvoc.c +++ b/src/nvidia/generated/g_kernel_sm_debugger_session_nvoc.c @@ -75,14 +75,19 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_RmDebuggerSession = /*pExportInfo=*/ &__nvoc_export_info_RmDebuggerSession }; -static void __nvoc_thunk_RmDebuggerSession_sessionRemoveDependant(struct RsSession *pDbgSession, struct RsResourceRef *pResourceRef) { - dbgSessionRemoveDependant((struct RmDebuggerSession *)(((unsigned char *)pDbgSession) - __nvoc_rtti_RmDebuggerSession_RsSession.offset), pResourceRef); +// 2 down-thunk(s) defined to bridge methods in RmDebuggerSession from superclasses + +// dbgSessionRemoveDependant: virtual override (session) base (session) +static void __nvoc_down_thunk_RmDebuggerSession_sessionRemoveDependant(struct RsSession *pDbgSession, struct RsResourceRef *pResourceRef) { + dbgSessionRemoveDependant((struct RmDebuggerSession *)(((unsigned char *) pDbgSession) - __nvoc_rtti_RmDebuggerSession_RsSession.offset), pResourceRef); } -static void __nvoc_thunk_RmDebuggerSession_sessionRemoveDependency(struct RsSession *pDbgSession, struct RsResourceRef *pResourceRef) { - dbgSessionRemoveDependency((struct RmDebuggerSession *)(((unsigned char *)pDbgSession) - __nvoc_rtti_RmDebuggerSession_RsSession.offset), pResourceRef); +// dbgSessionRemoveDependency: virtual override (session) base (session) +static void __nvoc_down_thunk_RmDebuggerSession_sessionRemoveDependency(struct RsSession *pDbgSession, struct RsResourceRef *pResourceRef) { + dbgSessionRemoveDependency((struct RmDebuggerSession *)(((unsigned char *) pDbgSession) - __nvoc_rtti_RmDebuggerSession_RsSession.offset), pResourceRef); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_RmDebuggerSession = { /*numEntries=*/ 0, @@ -113,19 +118,24 @@ NV_STATUS __nvoc_ctor_RmDebuggerSession(RmDebuggerSession *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_RmDebuggerSession_1(RmDebuggerSession *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // dbgSessionRemoveDependant -- virtual override (session) base (session) pThis->__dbgSessionRemoveDependant__ = &dbgSessionRemoveDependant_IMPL; + pThis->__nvoc_base_RsSession.__sessionRemoveDependant__ = &__nvoc_down_thunk_RmDebuggerSession_sessionRemoveDependant; + // dbgSessionRemoveDependency -- virtual override (session) base (session) pThis->__dbgSessionRemoveDependency__ = &dbgSessionRemoveDependency_IMPL; + pThis->__nvoc_base_RsSession.__sessionRemoveDependency__ = &__nvoc_down_thunk_RmDebuggerSession_sessionRemoveDependency; +} // End __nvoc_init_funcTable_RmDebuggerSession_1 with approximately 4 basic block(s). - pThis->__nvoc_base_RsSession.__sessionRemoveDependant__ = &__nvoc_thunk_RmDebuggerSession_sessionRemoveDependant; - - pThis->__nvoc_base_RsSession.__sessionRemoveDependency__ = &__nvoc_thunk_RmDebuggerSession_sessionRemoveDependency; -} +// Initialize vtable(s) for 2 virtual method(s). void __nvoc_init_funcTable_RmDebuggerSession(RmDebuggerSession *pThis) { + + // Initialize vtable(s) with 2 per-object function pointer(s). __nvoc_init_funcTable_RmDebuggerSession_1(pThis); } @@ -309,126 +319,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelSMDebuggerSession = /*pExportInfo=*/ &__nvoc_export_info_KernelSMDebuggerSession }; -static NV_STATUS __nvoc_thunk_KernelSMDebuggerSession_gpuresInternalControlForward(struct GpuResource *arg0, NvU32 command, void *pParams, NvU32 size) { - return ksmdbgssnInternalControlForward((struct KernelSMDebuggerSession *)(((unsigned char *)arg0) - __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), command, pParams, size); -} - -static NvHandle __nvoc_thunk_KernelSMDebuggerSession_gpuresGetInternalObjectHandle(struct GpuResource *arg0) { - return ksmdbgssnGetInternalObjectHandle((struct KernelSMDebuggerSession *)(((unsigned char *)arg0) - __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset)); -} - -static NvBool __nvoc_thunk_GpuResource_ksmdbgssnShareCallback(struct KernelSMDebuggerSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_ksmdbgssnCheckMemInterUnmap(struct KernelSMDebuggerSession *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_Notifier_ksmdbgssnGetOrAllocNotifShare(struct KernelSMDebuggerSession *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelSMDebuggerSession_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); -} - -static NV_STATUS __nvoc_thunk_RsResource_ksmdbgssnMapTo(struct KernelSMDebuggerSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_ksmdbgssnGetMapAddrSpace(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} - -static void __nvoc_thunk_Notifier_ksmdbgssnSetNotificationShare(struct KernelSMDebuggerSession *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelSMDebuggerSession_Notifier.offset), pNotifShare); -} - -static NvU32 __nvoc_thunk_RsResource_ksmdbgssnGetRefCount(struct KernelSMDebuggerSession *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_ksmdbgssnAddAdditionalDependants(struct RsClient *pClient, struct KernelSMDebuggerSession *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_ksmdbgssnControl_Prologue(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_ksmdbgssnGetRegBaseOffsetAndSize(struct KernelSMDebuggerSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), pGpu, pOffset, pSize); -} - -static NV_STATUS __nvoc_thunk_RsResource_ksmdbgssnUnmapFrom(struct KernelSMDebuggerSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_ksmdbgssnControl_Epilogue(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_ksmdbgssnControl(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_ksmdbgssnUnmap(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_ksmdbgssnGetMemInterMapParams(struct KernelSMDebuggerSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_ksmdbgssnGetMemoryMappingDescriptor(struct KernelSMDebuggerSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_ksmdbgssnControlFilter(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_Notifier_ksmdbgssnUnregisterEvent(struct KernelSMDebuggerSession *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelSMDebuggerSession_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static NV_STATUS __nvoc_thunk_RmResource_ksmdbgssnControlSerialization_Prologue(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_ksmdbgssnCanCopy(struct KernelSMDebuggerSession *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_ksmdbgssnIsPartialUnmapSupported(struct KernelSMDebuggerSession *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_ksmdbgssnPreDestruct(struct KernelSMDebuggerSession *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_ksmdbgssnIsDuplicate(struct KernelSMDebuggerSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_ksmdbgssnControlSerialization_Epilogue(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), pCallContext, pParams); -} - -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_ksmdbgssnGetNotificationListPtr(struct KernelSMDebuggerSession *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelSMDebuggerSession_Notifier.offset)); -} - -static struct NotifShare *__nvoc_thunk_Notifier_ksmdbgssnGetNotificationShare(struct KernelSMDebuggerSession *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_KernelSMDebuggerSession_Notifier.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_ksmdbgssnMap(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_ksmdbgssnAccessCallback(struct KernelSMDebuggerSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -436,12 +326,12 @@ static NvBool __nvoc_thunk_RmResource_ksmdbgssnAccessCallback(struct KernelSMDeb static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSMDebuggerSession[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdSMDebugModeEnable_fcf1ac, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0301u, /*paramSize=*/ 0, @@ -451,12 +341,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdSMDebugModeDisable_fcf1ac, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0302u, /*paramSize=*/ 0, @@ -466,12 +356,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugSetModeMMUDebug_fcf1ac, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0307u, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_SET_MODE_MMU_DEBUG_PARAMS), @@ -481,12 +371,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugGetModeMMUDebug_fcf1ac, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0308u, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_GET_MODE_MMU_DEBUG_PARAMS), @@ -496,12 +386,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugSetExceptionMask_fcf1ac, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0309u, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_SET_EXCEPTION_MASK_PARAMS), @@ -511,12 +401,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [5] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugReadSingleSmErrorState_fcf1ac, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de030bu, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_READ_SINGLE_SM_ERROR_STATE_PARAMS), @@ -526,12 +416,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [6] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugReadAllSmErrorStates_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de030cu, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_READ_ALL_SM_ERROR_STATES_PARAMS), @@ -541,12 +431,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [7] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugClearSingleSmErrorState_fcf1ac, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de030fu, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_CLEAR_SINGLE_SM_ERROR_STATE_PARAMS), @@ -556,12 +446,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [8] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugClearAllSmErrorStates_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0310u, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_CLEAR_ALL_SM_ERROR_STATES_PARAMS), @@ -571,12 +461,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [9] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugSetNextStopTriggerType_fcf1ac, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0313u, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_SET_NEXT_STOP_TRIGGER_TYPE_PARAMS), @@ -586,12 +476,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [10] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugSetSingleStepInterruptHandling_fcf1ac, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0314u, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_SET_SINGLE_STEP_INTERRUPT_HANDLING_PARAMS), @@ -601,12 +491,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [11] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugReadMemory_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0315u, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_READ_MEMORY_PARAMS), @@ -616,12 +506,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [12] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugWriteMemory_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0316u, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_WRITE_MEMORY_PARAMS), @@ -631,12 +521,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [13] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugSuspendContext_fcf1ac, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0317u, /*paramSize=*/ sizeof(NV83DE_CTRL_CMD_DEBUG_SUSPEND_CONTEXT_PARAMS), @@ -646,12 +536,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [14] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugResumeContext_fcf1ac, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0318u, /*paramSize=*/ 0, @@ -661,12 +551,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [15] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdReadSurface_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de031au, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_ACCESS_SURFACE_PARAMETERS), @@ -676,12 +566,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [16] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdWriteSurface_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de031bu, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_ACCESS_SURFACE_PARAMETERS), @@ -691,12 +581,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [17] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdGetMappings_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de031cu, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_GET_MAPPINGS_PARAMETERS), @@ -706,12 +596,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [18] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2010u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugExecRegOps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2010u) - /*flags=*/ 0x2010u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) + /*flags=*/ 0x208u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de031du, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_EXEC_REG_OPS_PARAMS), @@ -721,12 +611,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [19] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugSetModeErrbarDebug_fcf1ac, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de031fu, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_SET_MODE_ERRBAR_DEBUG_PARAMS), @@ -736,12 +626,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [20] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugGetModeErrbarDebug_fcf1ac, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0320u, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_GET_MODE_ERRBAR_DEBUG_PARAMS), @@ -751,12 +641,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [21] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugSetSingleSmSingleStep_fcf1ac, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0321u, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_SET_SINGLE_SM_SINGLE_STEP_PARAMS), @@ -766,12 +656,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [22] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugSetSingleSmStopTrigger_fcf1ac, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0322u, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_SET_SINGLE_SM_STOP_TRIGGER_PARAMS), @@ -781,12 +671,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [23] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugSetSingleSmRunTrigger_fcf1ac, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0323u, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_SET_SINGLE_SM_RUN_TRIGGER_PARAMS), @@ -796,12 +686,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [24] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugSetSingleSmSkipIdleWarpDetect_fcf1ac, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0324u, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_SET_SINGLE_SM_SKIP_IDLE_WARP_DETECT_PARAMS), @@ -811,12 +701,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [25] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugGetSingleSmDebuggerStatus_fcf1ac, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0325u, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_GET_SINGLE_SM_DEBUGGER_STATUS_PARAMS), @@ -826,12 +716,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [26] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugReadBatchMemory_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0326u, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_ACCESS_MEMORY_PARAMS), @@ -841,12 +731,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [27] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugWriteBatchMemory_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0327u, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_ACCESS_MEMORY_PARAMS), @@ -856,12 +746,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM #endif }, { /* [28] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) ksmdbgssnCtrlCmdDebugReadMMUFaultInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x83de0328u, /*paramSize=*/ sizeof(NV83DE_CTRL_DEBUG_READ_MMU_FAULT_INFO_PARAMS), @@ -873,6 +763,162 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM }; +// 2 down-thunk(s) defined to bridge methods in KernelSMDebuggerSession from superclasses + +// ksmdbgssnInternalControlForward: virtual override (gpures) base (gpures) +static NV_STATUS __nvoc_down_thunk_KernelSMDebuggerSession_gpuresInternalControlForward(struct GpuResource *arg_this, NvU32 command, void *pParams, NvU32 size) { + return ksmdbgssnInternalControlForward((struct KernelSMDebuggerSession *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), command, pParams, size); +} + +// ksmdbgssnGetInternalObjectHandle: virtual override (gpures) base (gpures) +static NvHandle __nvoc_down_thunk_KernelSMDebuggerSession_gpuresGetInternalObjectHandle(struct GpuResource *arg_this) { + return ksmdbgssnGetInternalObjectHandle((struct KernelSMDebuggerSession *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset)); +} + + +// 28 up-thunk(s) defined to bridge methods in KernelSMDebuggerSession to superclasses + +// ksmdbgssnControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_ksmdbgssnControl(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), pCallContext, pParams); +} + +// ksmdbgssnMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_ksmdbgssnMap(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// ksmdbgssnUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_ksmdbgssnUnmap(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), pCallContext, pCpuMapping); +} + +// ksmdbgssnShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_ksmdbgssnShareCallback(struct KernelSMDebuggerSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// ksmdbgssnGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_ksmdbgssnGetRegBaseOffsetAndSize(struct KernelSMDebuggerSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), pGpu, pOffset, pSize); +} + +// ksmdbgssnGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_ksmdbgssnGetMapAddrSpace(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + +// ksmdbgssnAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_ksmdbgssnAccessCallback(struct KernelSMDebuggerSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// ksmdbgssnGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_ksmdbgssnGetMemInterMapParams(struct KernelSMDebuggerSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), pParams); +} + +// ksmdbgssnCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_ksmdbgssnCheckMemInterUnmap(struct KernelSMDebuggerSession *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), bSubdeviceHandleProvided); +} + +// ksmdbgssnGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_ksmdbgssnGetMemoryMappingDescriptor(struct KernelSMDebuggerSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), ppMemDesc); +} + +// ksmdbgssnControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_ksmdbgssnControlSerialization_Prologue(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), pCallContext, pParams); +} + +// ksmdbgssnControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_ksmdbgssnControlSerialization_Epilogue(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), pCallContext, pParams); +} + +// ksmdbgssnControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_ksmdbgssnControl_Prologue(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), pCallContext, pParams); +} + +// ksmdbgssnControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_ksmdbgssnControl_Epilogue(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), pCallContext, pParams); +} + +// ksmdbgssnCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_ksmdbgssnCanCopy(struct KernelSMDebuggerSession *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset)); +} + +// ksmdbgssnIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_ksmdbgssnIsDuplicate(struct KernelSMDebuggerSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset), hMemory, pDuplicate); +} + +// ksmdbgssnPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_ksmdbgssnPreDestruct(struct KernelSMDebuggerSession *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset)); +} + +// ksmdbgssnControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_ksmdbgssnControlFilter(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset), pCallContext, pParams); +} + +// ksmdbgssnIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_ksmdbgssnIsPartialUnmapSupported(struct KernelSMDebuggerSession *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset)); +} + +// ksmdbgssnMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_ksmdbgssnMapTo(struct KernelSMDebuggerSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset), pParams); +} + +// ksmdbgssnUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_ksmdbgssnUnmapFrom(struct KernelSMDebuggerSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset), pParams); +} + +// ksmdbgssnGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_ksmdbgssnGetRefCount(struct KernelSMDebuggerSession *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset)); +} + +// ksmdbgssnAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_ksmdbgssnAddAdditionalDependants(struct RsClient *pClient, struct KernelSMDebuggerSession *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset), pReference); +} + +// ksmdbgssnGetNotificationListPtr: virtual inherited (notify) base (notify) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_ksmdbgssnGetNotificationListPtr(struct KernelSMDebuggerSession *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelSMDebuggerSession_Notifier.offset)); +} + +// ksmdbgssnGetNotificationShare: virtual inherited (notify) base (notify) +static struct NotifShare * __nvoc_up_thunk_Notifier_ksmdbgssnGetNotificationShare(struct KernelSMDebuggerSession *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelSMDebuggerSession_Notifier.offset)); +} + +// ksmdbgssnSetNotificationShare: virtual inherited (notify) base (notify) +static void __nvoc_up_thunk_Notifier_ksmdbgssnSetNotificationShare(struct KernelSMDebuggerSession *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelSMDebuggerSession_Notifier.offset), pNotifShare); +} + +// ksmdbgssnUnregisterEvent: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_ksmdbgssnUnregisterEvent(struct KernelSMDebuggerSession *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelSMDebuggerSession_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +} + +// ksmdbgssnGetOrAllocNotifShare: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_ksmdbgssnGetOrAllocNotifShare(struct KernelSMDebuggerSession *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelSMDebuggerSession_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelSMDebuggerSession = { /*numEntries=*/ 29, @@ -916,191 +962,253 @@ NV_STATUS __nvoc_ctor_KernelSMDebuggerSession(KernelSMDebuggerSession *pThis, st return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelSMDebuggerSession_1(KernelSMDebuggerSession *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // ksmdbgssnInternalControlForward -- virtual override (gpures) base (gpures) pThis->__ksmdbgssnInternalControlForward__ = &ksmdbgssnInternalControlForward_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresInternalControlForward__ = &__nvoc_down_thunk_KernelSMDebuggerSession_gpuresInternalControlForward; + // ksmdbgssnGetInternalObjectHandle -- virtual override (gpures) base (gpures) pThis->__ksmdbgssnGetInternalObjectHandle__ = &ksmdbgssnGetInternalObjectHandle_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ = &__nvoc_down_thunk_KernelSMDebuggerSession_gpuresGetInternalObjectHandle; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // ksmdbgssnCtrlCmdSMDebugModeEnable -- inline exported (id=0x83de0301) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__ksmdbgssnCtrlCmdSMDebugModeEnable__ = &ksmdbgssnCtrlCmdSMDebugModeEnable_fcf1ac; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // ksmdbgssnCtrlCmdSMDebugModeDisable -- inline exported (id=0x83de0302) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__ksmdbgssnCtrlCmdSMDebugModeDisable__ = &ksmdbgssnCtrlCmdSMDebugModeDisable_fcf1ac; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // ksmdbgssnCtrlCmdDebugSetModeMMUDebug -- inline exported (id=0x83de0307) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__ksmdbgssnCtrlCmdDebugSetModeMMUDebug__ = &ksmdbgssnCtrlCmdDebugSetModeMMUDebug_fcf1ac; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // ksmdbgssnCtrlCmdDebugGetModeMMUDebug -- inline exported (id=0x83de0308) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__ksmdbgssnCtrlCmdDebugGetModeMMUDebug__ = &ksmdbgssnCtrlCmdDebugGetModeMMUDebug_fcf1ac; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // ksmdbgssnCtrlCmdDebugSetModeErrbarDebug -- inline exported (id=0x83de031f) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__ksmdbgssnCtrlCmdDebugSetModeErrbarDebug__ = &ksmdbgssnCtrlCmdDebugSetModeErrbarDebug_fcf1ac; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // ksmdbgssnCtrlCmdDebugGetModeErrbarDebug -- inline exported (id=0x83de0320) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__ksmdbgssnCtrlCmdDebugGetModeErrbarDebug__ = &ksmdbgssnCtrlCmdDebugGetModeErrbarDebug_fcf1ac; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // ksmdbgssnCtrlCmdDebugSetExceptionMask -- inline exported (id=0x83de0309) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__ksmdbgssnCtrlCmdDebugSetExceptionMask__ = &ksmdbgssnCtrlCmdDebugSetExceptionMask_fcf1ac; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // ksmdbgssnCtrlCmdDebugReadSingleSmErrorState -- inline exported (id=0x83de030b) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__ksmdbgssnCtrlCmdDebugReadSingleSmErrorState__ = &ksmdbgssnCtrlCmdDebugReadSingleSmErrorState_fcf1ac; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) + // ksmdbgssnCtrlCmdDebugReadAllSmErrorStates -- exported (id=0x83de030c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) pThis->__ksmdbgssnCtrlCmdDebugReadAllSmErrorStates__ = &ksmdbgssnCtrlCmdDebugReadAllSmErrorStates_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // ksmdbgssnCtrlCmdDebugClearSingleSmErrorState -- inline exported (id=0x83de030f) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__ksmdbgssnCtrlCmdDebugClearSingleSmErrorState__ = &ksmdbgssnCtrlCmdDebugClearSingleSmErrorState_fcf1ac; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) + // ksmdbgssnCtrlCmdDebugClearAllSmErrorStates -- exported (id=0x83de0310) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) pThis->__ksmdbgssnCtrlCmdDebugClearAllSmErrorStates__ = &ksmdbgssnCtrlCmdDebugClearAllSmErrorStates_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // ksmdbgssnCtrlCmdDebugSuspendContext -- inline exported (id=0x83de0317) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__ksmdbgssnCtrlCmdDebugSuspendContext__ = &ksmdbgssnCtrlCmdDebugSuspendContext_fcf1ac; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // ksmdbgssnCtrlCmdDebugResumeContext -- inline exported (id=0x83de0318) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__ksmdbgssnCtrlCmdDebugResumeContext__ = &ksmdbgssnCtrlCmdDebugResumeContext_fcf1ac; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // ksmdbgssnCtrlCmdReadSurface -- exported (id=0x83de031a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__ksmdbgssnCtrlCmdReadSurface__ = &ksmdbgssnCtrlCmdReadSurface_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // ksmdbgssnCtrlCmdWriteSurface -- exported (id=0x83de031b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__ksmdbgssnCtrlCmdWriteSurface__ = &ksmdbgssnCtrlCmdWriteSurface_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // ksmdbgssnCtrlCmdGetMappings -- exported (id=0x83de031c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__ksmdbgssnCtrlCmdGetMappings__ = &ksmdbgssnCtrlCmdGetMappings_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // ksmdbgssnCtrlCmdDebugSetNextStopTriggerType -- inline exported (id=0x83de0313) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__ksmdbgssnCtrlCmdDebugSetNextStopTriggerType__ = &ksmdbgssnCtrlCmdDebugSetNextStopTriggerType_fcf1ac; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // ksmdbgssnCtrlCmdDebugSetSingleStepInterruptHandling -- inline exported (id=0x83de0314) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__ksmdbgssnCtrlCmdDebugSetSingleStepInterruptHandling__ = &ksmdbgssnCtrlCmdDebugSetSingleStepInterruptHandling_fcf1ac; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // ksmdbgssnCtrlCmdDebugReadMemory -- exported (id=0x83de0315) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__ksmdbgssnCtrlCmdDebugReadMemory__ = &ksmdbgssnCtrlCmdDebugReadMemory_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // ksmdbgssnCtrlCmdDebugWriteMemory -- exported (id=0x83de0316) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__ksmdbgssnCtrlCmdDebugWriteMemory__ = &ksmdbgssnCtrlCmdDebugWriteMemory_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2010u) + // ksmdbgssnCtrlCmdDebugExecRegOps -- exported (id=0x83de031d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) pThis->__ksmdbgssnCtrlCmdDebugExecRegOps__ = &ksmdbgssnCtrlCmdDebugExecRegOps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // ksmdbgssnCtrlCmdDebugSetSingleSmSingleStep -- inline exported (id=0x83de0321) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__ksmdbgssnCtrlCmdDebugSetSingleSmSingleStep__ = &ksmdbgssnCtrlCmdDebugSetSingleSmSingleStep_fcf1ac; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // ksmdbgssnCtrlCmdDebugSetSingleSmStopTrigger -- inline exported (id=0x83de0322) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__ksmdbgssnCtrlCmdDebugSetSingleSmStopTrigger__ = &ksmdbgssnCtrlCmdDebugSetSingleSmStopTrigger_fcf1ac; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // ksmdbgssnCtrlCmdDebugSetSingleSmRunTrigger -- inline exported (id=0x83de0323) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__ksmdbgssnCtrlCmdDebugSetSingleSmRunTrigger__ = &ksmdbgssnCtrlCmdDebugSetSingleSmRunTrigger_fcf1ac; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // ksmdbgssnCtrlCmdDebugSetSingleSmSkipIdleWarpDetect -- inline exported (id=0x83de0324) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__ksmdbgssnCtrlCmdDebugSetSingleSmSkipIdleWarpDetect__ = &ksmdbgssnCtrlCmdDebugSetSingleSmSkipIdleWarpDetect_fcf1ac; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // ksmdbgssnCtrlCmdDebugGetSingleSmDebuggerStatus -- inline exported (id=0x83de0325) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__ksmdbgssnCtrlCmdDebugGetSingleSmDebuggerStatus__ = &ksmdbgssnCtrlCmdDebugGetSingleSmDebuggerStatus_fcf1ac; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // ksmdbgssnCtrlCmdDebugReadBatchMemory -- exported (id=0x83de0326) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__ksmdbgssnCtrlCmdDebugReadBatchMemory__ = &ksmdbgssnCtrlCmdDebugReadBatchMemory_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // ksmdbgssnCtrlCmdDebugWriteBatchMemory -- exported (id=0x83de0327) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__ksmdbgssnCtrlCmdDebugWriteBatchMemory__ = &ksmdbgssnCtrlCmdDebugWriteBatchMemory_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // ksmdbgssnCtrlCmdDebugReadMMUFaultInfo -- exported (id=0x83de0328) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__ksmdbgssnCtrlCmdDebugReadMMUFaultInfo__ = &ksmdbgssnCtrlCmdDebugReadMMUFaultInfo_IMPL; #endif - pThis->__nvoc_base_GpuResource.__gpuresInternalControlForward__ = &__nvoc_thunk_KernelSMDebuggerSession_gpuresInternalControlForward; - - pThis->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ = &__nvoc_thunk_KernelSMDebuggerSession_gpuresGetInternalObjectHandle; + // ksmdbgssnControl -- virtual inherited (gpures) base (gpures) + pThis->__ksmdbgssnControl__ = &__nvoc_up_thunk_GpuResource_ksmdbgssnControl; - pThis->__ksmdbgssnShareCallback__ = &__nvoc_thunk_GpuResource_ksmdbgssnShareCallback; + // ksmdbgssnMap -- virtual inherited (gpures) base (gpures) + pThis->__ksmdbgssnMap__ = &__nvoc_up_thunk_GpuResource_ksmdbgssnMap; - pThis->__ksmdbgssnCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_ksmdbgssnCheckMemInterUnmap; + // ksmdbgssnUnmap -- virtual inherited (gpures) base (gpures) + pThis->__ksmdbgssnUnmap__ = &__nvoc_up_thunk_GpuResource_ksmdbgssnUnmap; - pThis->__ksmdbgssnGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_ksmdbgssnGetOrAllocNotifShare; + // ksmdbgssnShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__ksmdbgssnShareCallback__ = &__nvoc_up_thunk_GpuResource_ksmdbgssnShareCallback; - pThis->__ksmdbgssnMapTo__ = &__nvoc_thunk_RsResource_ksmdbgssnMapTo; + // ksmdbgssnGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__ksmdbgssnGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_ksmdbgssnGetRegBaseOffsetAndSize; - pThis->__ksmdbgssnGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_ksmdbgssnGetMapAddrSpace; + // ksmdbgssnGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__ksmdbgssnGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_ksmdbgssnGetMapAddrSpace; - pThis->__ksmdbgssnSetNotificationShare__ = &__nvoc_thunk_Notifier_ksmdbgssnSetNotificationShare; + // ksmdbgssnAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__ksmdbgssnAccessCallback__ = &__nvoc_up_thunk_RmResource_ksmdbgssnAccessCallback; - pThis->__ksmdbgssnGetRefCount__ = &__nvoc_thunk_RsResource_ksmdbgssnGetRefCount; + // ksmdbgssnGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__ksmdbgssnGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_ksmdbgssnGetMemInterMapParams; - pThis->__ksmdbgssnAddAdditionalDependants__ = &__nvoc_thunk_RsResource_ksmdbgssnAddAdditionalDependants; + // ksmdbgssnCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__ksmdbgssnCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_ksmdbgssnCheckMemInterUnmap; - pThis->__ksmdbgssnControl_Prologue__ = &__nvoc_thunk_RmResource_ksmdbgssnControl_Prologue; + // ksmdbgssnGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__ksmdbgssnGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_ksmdbgssnGetMemoryMappingDescriptor; - pThis->__ksmdbgssnGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_ksmdbgssnGetRegBaseOffsetAndSize; + // ksmdbgssnControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__ksmdbgssnControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_ksmdbgssnControlSerialization_Prologue; - pThis->__ksmdbgssnUnmapFrom__ = &__nvoc_thunk_RsResource_ksmdbgssnUnmapFrom; + // ksmdbgssnControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__ksmdbgssnControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_ksmdbgssnControlSerialization_Epilogue; - pThis->__ksmdbgssnControl_Epilogue__ = &__nvoc_thunk_RmResource_ksmdbgssnControl_Epilogue; + // ksmdbgssnControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__ksmdbgssnControl_Prologue__ = &__nvoc_up_thunk_RmResource_ksmdbgssnControl_Prologue; - pThis->__ksmdbgssnControl__ = &__nvoc_thunk_GpuResource_ksmdbgssnControl; + // ksmdbgssnControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__ksmdbgssnControl_Epilogue__ = &__nvoc_up_thunk_RmResource_ksmdbgssnControl_Epilogue; - pThis->__ksmdbgssnUnmap__ = &__nvoc_thunk_GpuResource_ksmdbgssnUnmap; + // ksmdbgssnCanCopy -- virtual inherited (res) base (gpures) + pThis->__ksmdbgssnCanCopy__ = &__nvoc_up_thunk_RsResource_ksmdbgssnCanCopy; - pThis->__ksmdbgssnGetMemInterMapParams__ = &__nvoc_thunk_RmResource_ksmdbgssnGetMemInterMapParams; + // ksmdbgssnIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__ksmdbgssnIsDuplicate__ = &__nvoc_up_thunk_RsResource_ksmdbgssnIsDuplicate; - pThis->__ksmdbgssnGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_ksmdbgssnGetMemoryMappingDescriptor; + // ksmdbgssnPreDestruct -- virtual inherited (res) base (gpures) + pThis->__ksmdbgssnPreDestruct__ = &__nvoc_up_thunk_RsResource_ksmdbgssnPreDestruct; - pThis->__ksmdbgssnControlFilter__ = &__nvoc_thunk_RsResource_ksmdbgssnControlFilter; + // ksmdbgssnControlFilter -- virtual inherited (res) base (gpures) + pThis->__ksmdbgssnControlFilter__ = &__nvoc_up_thunk_RsResource_ksmdbgssnControlFilter; - pThis->__ksmdbgssnUnregisterEvent__ = &__nvoc_thunk_Notifier_ksmdbgssnUnregisterEvent; + // ksmdbgssnIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__ksmdbgssnIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_ksmdbgssnIsPartialUnmapSupported; - pThis->__ksmdbgssnControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_ksmdbgssnControlSerialization_Prologue; + // ksmdbgssnMapTo -- virtual inherited (res) base (gpures) + pThis->__ksmdbgssnMapTo__ = &__nvoc_up_thunk_RsResource_ksmdbgssnMapTo; - pThis->__ksmdbgssnCanCopy__ = &__nvoc_thunk_RsResource_ksmdbgssnCanCopy; + // ksmdbgssnUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__ksmdbgssnUnmapFrom__ = &__nvoc_up_thunk_RsResource_ksmdbgssnUnmapFrom; - pThis->__ksmdbgssnIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_ksmdbgssnIsPartialUnmapSupported; + // ksmdbgssnGetRefCount -- virtual inherited (res) base (gpures) + pThis->__ksmdbgssnGetRefCount__ = &__nvoc_up_thunk_RsResource_ksmdbgssnGetRefCount; - pThis->__ksmdbgssnPreDestruct__ = &__nvoc_thunk_RsResource_ksmdbgssnPreDestruct; + // ksmdbgssnAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__ksmdbgssnAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_ksmdbgssnAddAdditionalDependants; - pThis->__ksmdbgssnIsDuplicate__ = &__nvoc_thunk_RsResource_ksmdbgssnIsDuplicate; + // ksmdbgssnGetNotificationListPtr -- virtual inherited (notify) base (notify) + pThis->__ksmdbgssnGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_ksmdbgssnGetNotificationListPtr; - pThis->__ksmdbgssnControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_ksmdbgssnControlSerialization_Epilogue; + // ksmdbgssnGetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__ksmdbgssnGetNotificationShare__ = &__nvoc_up_thunk_Notifier_ksmdbgssnGetNotificationShare; - pThis->__ksmdbgssnGetNotificationListPtr__ = &__nvoc_thunk_Notifier_ksmdbgssnGetNotificationListPtr; + // ksmdbgssnSetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__ksmdbgssnSetNotificationShare__ = &__nvoc_up_thunk_Notifier_ksmdbgssnSetNotificationShare; - pThis->__ksmdbgssnGetNotificationShare__ = &__nvoc_thunk_Notifier_ksmdbgssnGetNotificationShare; + // ksmdbgssnUnregisterEvent -- virtual inherited (notify) base (notify) + pThis->__ksmdbgssnUnregisterEvent__ = &__nvoc_up_thunk_Notifier_ksmdbgssnUnregisterEvent; - pThis->__ksmdbgssnMap__ = &__nvoc_thunk_GpuResource_ksmdbgssnMap; + // ksmdbgssnGetOrAllocNotifShare -- virtual inherited (notify) base (notify) + pThis->__ksmdbgssnGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_ksmdbgssnGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_KernelSMDebuggerSession_1 with approximately 61 basic block(s). - pThis->__ksmdbgssnAccessCallback__ = &__nvoc_thunk_RmResource_ksmdbgssnAccessCallback; -} +// Initialize vtable(s) for 59 virtual method(s). void __nvoc_init_funcTable_KernelSMDebuggerSession(KernelSMDebuggerSession *pThis) { + + // Initialize vtable(s) with 59 per-object function pointer(s). __nvoc_init_funcTable_KernelSMDebuggerSession_1(pThis); } diff --git a/src/nvidia/generated/g_kernel_sm_debugger_session_nvoc.h b/src/nvidia/generated/g_kernel_sm_debugger_session_nvoc.h index f689d5eef3..77e34c4b9e 100644 --- a/src/nvidia/generated/g_kernel_sm_debugger_session_nvoc.h +++ b/src/nvidia/generated/g_kernel_sm_debugger_session_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_KERNEL_SM_DEBUGGER_SESSION_NVOC_H_ #define _G_KERNEL_SM_DEBUGGER_SESSION_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_sm_debugger_session_nvoc.h" #ifndef KERNEL_SM_DEBUGGER_SESSION_H @@ -42,6 +50,7 @@ extern "C" { #include "ctrl/ctrl83de.h" + struct KernelGraphicsObject; #ifndef __NVOC_CLASS_KernelGraphicsObject_TYPEDEF__ @@ -88,15 +97,24 @@ typedef struct KernelGraphicsObject KernelGraphicsObject; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct RmDebuggerSession { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RsSession __nvoc_base_RsSession; - struct Object *__nvoc_pbase_Object; - struct RsShared *__nvoc_pbase_RsShared; - struct RsSession *__nvoc_pbase_RsSession; - struct RmDebuggerSession *__nvoc_pbase_RmDebuggerSession; - void (*__dbgSessionRemoveDependant__)(struct RmDebuggerSession *, struct RsResourceRef *); - void (*__dbgSessionRemoveDependency__)(struct RmDebuggerSession *, struct RsResourceRef *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^3 + struct RsShared *__nvoc_pbase_RsShared; // shr super^2 + struct RsSession *__nvoc_pbase_RsSession; // session super + struct RmDebuggerSession *__nvoc_pbase_RmDebuggerSession; // dbgSession + + // Vtable with 2 per-object function pointers + void (*__dbgSessionRemoveDependant__)(struct RmDebuggerSession * /*this*/, struct RsResourceRef *); // virtual override (session) base (session) + void (*__dbgSessionRemoveDependency__)(struct RmDebuggerSession * /*this*/, struct RsResourceRef *); // virtual override (session) base (session) }; #ifndef __NVOC_CLASS_RmDebuggerSession_TYPEDEF__ @@ -108,6 +126,7 @@ typedef struct RmDebuggerSession RmDebuggerSession; #define __nvoc_class_id_RmDebuggerSession 0x48fa7d #endif /* __nvoc_class_id_RmDebuggerSession */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmDebuggerSession; #define __staticCast_RmDebuggerSession(pThis) \ @@ -120,27 +139,32 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmDebuggerSession; ((RmDebuggerSession*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(RmDebuggerSession))) #endif //__nvoc_kernel_sm_debugger_session_h_disabled - NV_STATUS __nvoc_objCreateDynamic_RmDebuggerSession(RmDebuggerSession**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_RmDebuggerSession(RmDebuggerSession**, Dynamic*, NvU32); #define __objCreate_RmDebuggerSession(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_RmDebuggerSession((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define dbgSessionRemoveDependant_FNPTR(pDbgSession) pDbgSession->__dbgSessionRemoveDependant__ #define dbgSessionRemoveDependant(pDbgSession, pResourceRef) dbgSessionRemoveDependant_DISPATCH(pDbgSession, pResourceRef) +#define dbgSessionRemoveDependency_FNPTR(pDbgSession) pDbgSession->__dbgSessionRemoveDependency__ #define dbgSessionRemoveDependency(pDbgSession, pResourceRef) dbgSessionRemoveDependency_DISPATCH(pDbgSession, pResourceRef) -void dbgSessionRemoveDependant_IMPL(struct RmDebuggerSession *pDbgSession, struct RsResourceRef *pResourceRef); +// Dispatch functions static inline void dbgSessionRemoveDependant_DISPATCH(struct RmDebuggerSession *pDbgSession, struct RsResourceRef *pResourceRef) { pDbgSession->__dbgSessionRemoveDependant__(pDbgSession, pResourceRef); } -void dbgSessionRemoveDependency_IMPL(struct RmDebuggerSession *pDbgSession, struct RsResourceRef *pResourceRef); - static inline void dbgSessionRemoveDependency_DISPATCH(struct RmDebuggerSession *pDbgSession, struct RsResourceRef *pResourceRef) { pDbgSession->__dbgSessionRemoveDependency__(pDbgSession, pResourceRef); } +void dbgSessionRemoveDependant_IMPL(struct RmDebuggerSession *pDbgSession, struct RsResourceRef *pResourceRef); + +void dbgSessionRemoveDependency_IMPL(struct RmDebuggerSession *pDbgSession, struct RsResourceRef *pResourceRef); + #undef PRIVATE_FIELD @@ -154,77 +178,88 @@ static inline void dbgSessionRemoveDependency_DISPATCH(struct RmDebuggerSession #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelSMDebuggerSession { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; struct Notifier __nvoc_base_Notifier; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct KernelSMDebuggerSession *__nvoc_pbase_KernelSMDebuggerSession; - NV_STATUS (*__ksmdbgssnInternalControlForward__)(struct KernelSMDebuggerSession *, NvU32, void *, NvU32); - NvHandle (*__ksmdbgssnGetInternalObjectHandle__)(struct KernelSMDebuggerSession *); - NV_STATUS (*__ksmdbgssnCtrlCmdSMDebugModeEnable__)(struct KernelSMDebuggerSession *); - NV_STATUS (*__ksmdbgssnCtrlCmdSMDebugModeDisable__)(struct KernelSMDebuggerSession *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugSetModeMMUDebug__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_SET_MODE_MMU_DEBUG_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugGetModeMMUDebug__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_GET_MODE_MMU_DEBUG_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugSetModeErrbarDebug__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_SET_MODE_ERRBAR_DEBUG_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugGetModeErrbarDebug__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_GET_MODE_ERRBAR_DEBUG_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugSetExceptionMask__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_SET_EXCEPTION_MASK_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugReadSingleSmErrorState__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_READ_SINGLE_SM_ERROR_STATE_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugReadAllSmErrorStates__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_READ_ALL_SM_ERROR_STATES_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugClearSingleSmErrorState__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_CLEAR_SINGLE_SM_ERROR_STATE_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugClearAllSmErrorStates__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_CLEAR_ALL_SM_ERROR_STATES_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugSuspendContext__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_CMD_DEBUG_SUSPEND_CONTEXT_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugResumeContext__)(struct KernelSMDebuggerSession *); - NV_STATUS (*__ksmdbgssnCtrlCmdReadSurface__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_ACCESS_SURFACE_PARAMETERS *); - NV_STATUS (*__ksmdbgssnCtrlCmdWriteSurface__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_ACCESS_SURFACE_PARAMETERS *); - NV_STATUS (*__ksmdbgssnCtrlCmdGetMappings__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_GET_MAPPINGS_PARAMETERS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugSetNextStopTriggerType__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_SET_NEXT_STOP_TRIGGER_TYPE_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugSetSingleStepInterruptHandling__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_SET_SINGLE_STEP_INTERRUPT_HANDLING_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugReadMemory__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_READ_MEMORY_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugWriteMemory__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_WRITE_MEMORY_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugExecRegOps__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_EXEC_REG_OPS_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugSetSingleSmSingleStep__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_SET_SINGLE_SM_SINGLE_STEP_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugSetSingleSmStopTrigger__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_SET_SINGLE_SM_STOP_TRIGGER_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugSetSingleSmRunTrigger__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_SET_SINGLE_SM_RUN_TRIGGER_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugSetSingleSmSkipIdleWarpDetect__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_SET_SINGLE_SM_SKIP_IDLE_WARP_DETECT_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugGetSingleSmDebuggerStatus__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_GET_SINGLE_SM_DEBUGGER_STATUS_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugReadBatchMemory__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_ACCESS_MEMORY_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugWriteBatchMemory__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_ACCESS_MEMORY_PARAMS *); - NV_STATUS (*__ksmdbgssnCtrlCmdDebugReadMMUFaultInfo__)(struct KernelSMDebuggerSession *, NV83DE_CTRL_DEBUG_READ_MMU_FAULT_INFO_PARAMS *); - NvBool (*__ksmdbgssnShareCallback__)(struct KernelSMDebuggerSession *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__ksmdbgssnCheckMemInterUnmap__)(struct KernelSMDebuggerSession *, NvBool); - NV_STATUS (*__ksmdbgssnGetOrAllocNotifShare__)(struct KernelSMDebuggerSession *, NvHandle, NvHandle, struct NotifShare **); - NV_STATUS (*__ksmdbgssnMapTo__)(struct KernelSMDebuggerSession *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__ksmdbgssnGetMapAddrSpace__)(struct KernelSMDebuggerSession *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__ksmdbgssnSetNotificationShare__)(struct KernelSMDebuggerSession *, struct NotifShare *); - NvU32 (*__ksmdbgssnGetRefCount__)(struct KernelSMDebuggerSession *); - void (*__ksmdbgssnAddAdditionalDependants__)(struct RsClient *, struct KernelSMDebuggerSession *, RsResourceRef *); - NV_STATUS (*__ksmdbgssnControl_Prologue__)(struct KernelSMDebuggerSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__ksmdbgssnGetRegBaseOffsetAndSize__)(struct KernelSMDebuggerSession *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__ksmdbgssnUnmapFrom__)(struct KernelSMDebuggerSession *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__ksmdbgssnControl_Epilogue__)(struct KernelSMDebuggerSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__ksmdbgssnControl__)(struct KernelSMDebuggerSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__ksmdbgssnUnmap__)(struct KernelSMDebuggerSession *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__ksmdbgssnGetMemInterMapParams__)(struct KernelSMDebuggerSession *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__ksmdbgssnGetMemoryMappingDescriptor__)(struct KernelSMDebuggerSession *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__ksmdbgssnControlFilter__)(struct KernelSMDebuggerSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__ksmdbgssnUnregisterEvent__)(struct KernelSMDebuggerSession *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__ksmdbgssnControlSerialization_Prologue__)(struct KernelSMDebuggerSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__ksmdbgssnCanCopy__)(struct KernelSMDebuggerSession *); - NvBool (*__ksmdbgssnIsPartialUnmapSupported__)(struct KernelSMDebuggerSession *); - void (*__ksmdbgssnPreDestruct__)(struct KernelSMDebuggerSession *); - NV_STATUS (*__ksmdbgssnIsDuplicate__)(struct KernelSMDebuggerSession *, NvHandle, NvBool *); - void (*__ksmdbgssnControlSerialization_Epilogue__)(struct KernelSMDebuggerSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__ksmdbgssnGetNotificationListPtr__)(struct KernelSMDebuggerSession *); - struct NotifShare *(*__ksmdbgssnGetNotificationShare__)(struct KernelSMDebuggerSession *); - NV_STATUS (*__ksmdbgssnMap__)(struct KernelSMDebuggerSession *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__ksmdbgssnAccessCallback__)(struct KernelSMDebuggerSession *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct INotifier *__nvoc_pbase_INotifier; // inotify super^2 + struct Notifier *__nvoc_pbase_Notifier; // notify super + struct KernelSMDebuggerSession *__nvoc_pbase_KernelSMDebuggerSession; // ksmdbgssn + + // Vtable with 59 per-object function pointers + NV_STATUS (*__ksmdbgssnInternalControlForward__)(struct KernelSMDebuggerSession * /*this*/, NvU32, void *, NvU32); // virtual override (gpures) base (gpures) + NvHandle (*__ksmdbgssnGetInternalObjectHandle__)(struct KernelSMDebuggerSession * /*this*/); // virtual override (gpures) base (gpures) + NV_STATUS (*__ksmdbgssnCtrlCmdSMDebugModeEnable__)(struct KernelSMDebuggerSession * /*this*/); // inline exported (id=0x83de0301) body + NV_STATUS (*__ksmdbgssnCtrlCmdSMDebugModeDisable__)(struct KernelSMDebuggerSession * /*this*/); // inline exported (id=0x83de0302) body + NV_STATUS (*__ksmdbgssnCtrlCmdDebugSetModeMMUDebug__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_SET_MODE_MMU_DEBUG_PARAMS *); // inline exported (id=0x83de0307) body + NV_STATUS (*__ksmdbgssnCtrlCmdDebugGetModeMMUDebug__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_GET_MODE_MMU_DEBUG_PARAMS *); // inline exported (id=0x83de0308) body + NV_STATUS (*__ksmdbgssnCtrlCmdDebugSetModeErrbarDebug__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_SET_MODE_ERRBAR_DEBUG_PARAMS *); // inline exported (id=0x83de031f) body + NV_STATUS (*__ksmdbgssnCtrlCmdDebugGetModeErrbarDebug__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_GET_MODE_ERRBAR_DEBUG_PARAMS *); // inline exported (id=0x83de0320) body + NV_STATUS (*__ksmdbgssnCtrlCmdDebugSetExceptionMask__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_SET_EXCEPTION_MASK_PARAMS *); // inline exported (id=0x83de0309) body + NV_STATUS (*__ksmdbgssnCtrlCmdDebugReadSingleSmErrorState__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_READ_SINGLE_SM_ERROR_STATE_PARAMS *); // inline exported (id=0x83de030b) body + NV_STATUS (*__ksmdbgssnCtrlCmdDebugReadAllSmErrorStates__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_READ_ALL_SM_ERROR_STATES_PARAMS *); // exported (id=0x83de030c) + NV_STATUS (*__ksmdbgssnCtrlCmdDebugClearSingleSmErrorState__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_CLEAR_SINGLE_SM_ERROR_STATE_PARAMS *); // inline exported (id=0x83de030f) body + NV_STATUS (*__ksmdbgssnCtrlCmdDebugClearAllSmErrorStates__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_CLEAR_ALL_SM_ERROR_STATES_PARAMS *); // exported (id=0x83de0310) + NV_STATUS (*__ksmdbgssnCtrlCmdDebugSuspendContext__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_CMD_DEBUG_SUSPEND_CONTEXT_PARAMS *); // inline exported (id=0x83de0317) body + NV_STATUS (*__ksmdbgssnCtrlCmdDebugResumeContext__)(struct KernelSMDebuggerSession * /*this*/); // inline exported (id=0x83de0318) body + NV_STATUS (*__ksmdbgssnCtrlCmdReadSurface__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_ACCESS_SURFACE_PARAMETERS *); // exported (id=0x83de031a) + NV_STATUS (*__ksmdbgssnCtrlCmdWriteSurface__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_ACCESS_SURFACE_PARAMETERS *); // exported (id=0x83de031b) + NV_STATUS (*__ksmdbgssnCtrlCmdGetMappings__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_GET_MAPPINGS_PARAMETERS *); // exported (id=0x83de031c) + NV_STATUS (*__ksmdbgssnCtrlCmdDebugSetNextStopTriggerType__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_SET_NEXT_STOP_TRIGGER_TYPE_PARAMS *); // inline exported (id=0x83de0313) body + NV_STATUS (*__ksmdbgssnCtrlCmdDebugSetSingleStepInterruptHandling__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_SET_SINGLE_STEP_INTERRUPT_HANDLING_PARAMS *); // inline exported (id=0x83de0314) body + NV_STATUS (*__ksmdbgssnCtrlCmdDebugReadMemory__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_READ_MEMORY_PARAMS *); // exported (id=0x83de0315) + NV_STATUS (*__ksmdbgssnCtrlCmdDebugWriteMemory__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_WRITE_MEMORY_PARAMS *); // exported (id=0x83de0316) + NV_STATUS (*__ksmdbgssnCtrlCmdDebugExecRegOps__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_EXEC_REG_OPS_PARAMS *); // exported (id=0x83de031d) + NV_STATUS (*__ksmdbgssnCtrlCmdDebugSetSingleSmSingleStep__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_SET_SINGLE_SM_SINGLE_STEP_PARAMS *); // inline exported (id=0x83de0321) body + NV_STATUS (*__ksmdbgssnCtrlCmdDebugSetSingleSmStopTrigger__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_SET_SINGLE_SM_STOP_TRIGGER_PARAMS *); // inline exported (id=0x83de0322) body + NV_STATUS (*__ksmdbgssnCtrlCmdDebugSetSingleSmRunTrigger__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_SET_SINGLE_SM_RUN_TRIGGER_PARAMS *); // inline exported (id=0x83de0323) body + NV_STATUS (*__ksmdbgssnCtrlCmdDebugSetSingleSmSkipIdleWarpDetect__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_SET_SINGLE_SM_SKIP_IDLE_WARP_DETECT_PARAMS *); // inline exported (id=0x83de0324) body + NV_STATUS (*__ksmdbgssnCtrlCmdDebugGetSingleSmDebuggerStatus__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_GET_SINGLE_SM_DEBUGGER_STATUS_PARAMS *); // inline exported (id=0x83de0325) body + NV_STATUS (*__ksmdbgssnCtrlCmdDebugReadBatchMemory__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_ACCESS_MEMORY_PARAMS *); // exported (id=0x83de0326) + NV_STATUS (*__ksmdbgssnCtrlCmdDebugWriteBatchMemory__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_ACCESS_MEMORY_PARAMS *); // exported (id=0x83de0327) + NV_STATUS (*__ksmdbgssnCtrlCmdDebugReadMMUFaultInfo__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_READ_MMU_FAULT_INFO_PARAMS *); // exported (id=0x83de0328) + NV_STATUS (*__ksmdbgssnControl__)(struct KernelSMDebuggerSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__ksmdbgssnMap__)(struct KernelSMDebuggerSession * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__ksmdbgssnUnmap__)(struct KernelSMDebuggerSession * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__ksmdbgssnShareCallback__)(struct KernelSMDebuggerSession * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__ksmdbgssnGetRegBaseOffsetAndSize__)(struct KernelSMDebuggerSession * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__ksmdbgssnGetMapAddrSpace__)(struct KernelSMDebuggerSession * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NvBool (*__ksmdbgssnAccessCallback__)(struct KernelSMDebuggerSession * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__ksmdbgssnGetMemInterMapParams__)(struct KernelSMDebuggerSession * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__ksmdbgssnCheckMemInterUnmap__)(struct KernelSMDebuggerSession * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__ksmdbgssnGetMemoryMappingDescriptor__)(struct KernelSMDebuggerSession * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__ksmdbgssnControlSerialization_Prologue__)(struct KernelSMDebuggerSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__ksmdbgssnControlSerialization_Epilogue__)(struct KernelSMDebuggerSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__ksmdbgssnControl_Prologue__)(struct KernelSMDebuggerSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__ksmdbgssnControl_Epilogue__)(struct KernelSMDebuggerSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__ksmdbgssnCanCopy__)(struct KernelSMDebuggerSession * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__ksmdbgssnIsDuplicate__)(struct KernelSMDebuggerSession * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__ksmdbgssnPreDestruct__)(struct KernelSMDebuggerSession * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__ksmdbgssnControlFilter__)(struct KernelSMDebuggerSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__ksmdbgssnIsPartialUnmapSupported__)(struct KernelSMDebuggerSession * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__ksmdbgssnMapTo__)(struct KernelSMDebuggerSession * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__ksmdbgssnUnmapFrom__)(struct KernelSMDebuggerSession * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__ksmdbgssnGetRefCount__)(struct KernelSMDebuggerSession * /*this*/); // virtual inherited (res) base (gpures) + void (*__ksmdbgssnAddAdditionalDependants__)(struct RsClient *, struct KernelSMDebuggerSession * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + PEVENTNOTIFICATION * (*__ksmdbgssnGetNotificationListPtr__)(struct KernelSMDebuggerSession * /*this*/); // virtual inherited (notify) base (notify) + struct NotifShare * (*__ksmdbgssnGetNotificationShare__)(struct KernelSMDebuggerSession * /*this*/); // virtual inherited (notify) base (notify) + void (*__ksmdbgssnSetNotificationShare__)(struct KernelSMDebuggerSession * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) + NV_STATUS (*__ksmdbgssnUnregisterEvent__)(struct KernelSMDebuggerSession * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) + NV_STATUS (*__ksmdbgssnGetOrAllocNotifShare__)(struct KernelSMDebuggerSession * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) + + // Data members struct RmDebuggerSession *PRIVATE_FIELD(pDebugSession); struct KernelGraphicsObject *PRIVATE_FIELD(pObject); NvHandle PRIVATE_FIELD(hDebugger); @@ -248,6 +283,7 @@ typedef struct KernelSMDebuggerSession KernelSMDebuggerSession; #define __nvoc_class_id_KernelSMDebuggerSession 0x4adc81 #endif /* __nvoc_class_id_KernelSMDebuggerSession */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelSMDebuggerSession; #define __staticCast_KernelSMDebuggerSession(pThis) \ @@ -260,316 +296,340 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelSMDebuggerSession; ((KernelSMDebuggerSession*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelSMDebuggerSession))) #endif //__nvoc_kernel_sm_debugger_session_h_disabled - NV_STATUS __nvoc_objCreateDynamic_KernelSMDebuggerSession(KernelSMDebuggerSession**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_KernelSMDebuggerSession(KernelSMDebuggerSession**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_KernelSMDebuggerSession(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_KernelSMDebuggerSession((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) -#define ksmdbgssnInternalControlForward(arg0, command, pParams, size) ksmdbgssnInternalControlForward_DISPATCH(arg0, command, pParams, size) -#define ksmdbgssnGetInternalObjectHandle(arg0) ksmdbgssnGetInternalObjectHandle_DISPATCH(arg0) + +// Wrapper macros +#define ksmdbgssnInternalControlForward_FNPTR(arg_this) arg_this->__ksmdbgssnInternalControlForward__ +#define ksmdbgssnInternalControlForward(arg_this, command, pParams, size) ksmdbgssnInternalControlForward_DISPATCH(arg_this, command, pParams, size) +#define ksmdbgssnGetInternalObjectHandle_FNPTR(arg_this) arg_this->__ksmdbgssnGetInternalObjectHandle__ +#define ksmdbgssnGetInternalObjectHandle(arg_this) ksmdbgssnGetInternalObjectHandle_DISPATCH(arg_this) +#define ksmdbgssnCtrlCmdSMDebugModeEnable_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdSMDebugModeEnable__ #define ksmdbgssnCtrlCmdSMDebugModeEnable(pKernelSMDebuggerSession) ksmdbgssnCtrlCmdSMDebugModeEnable_DISPATCH(pKernelSMDebuggerSession) +#define ksmdbgssnCtrlCmdSMDebugModeDisable_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdSMDebugModeDisable__ #define ksmdbgssnCtrlCmdSMDebugModeDisable(pKernelSMDebuggerSession) ksmdbgssnCtrlCmdSMDebugModeDisable_DISPATCH(pKernelSMDebuggerSession) +#define ksmdbgssnCtrlCmdDebugSetModeMMUDebug_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugSetModeMMUDebug__ #define ksmdbgssnCtrlCmdDebugSetModeMMUDebug(pKernelSMDebuggerSession, pParams) ksmdbgssnCtrlCmdDebugSetModeMMUDebug_DISPATCH(pKernelSMDebuggerSession, pParams) +#define ksmdbgssnCtrlCmdDebugGetModeMMUDebug_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugGetModeMMUDebug__ #define ksmdbgssnCtrlCmdDebugGetModeMMUDebug(pKernelSMDebuggerSession, pParams) ksmdbgssnCtrlCmdDebugGetModeMMUDebug_DISPATCH(pKernelSMDebuggerSession, pParams) +#define ksmdbgssnCtrlCmdDebugSetModeErrbarDebug_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugSetModeErrbarDebug__ #define ksmdbgssnCtrlCmdDebugSetModeErrbarDebug(pKernelSMDebuggerSession, pParams) ksmdbgssnCtrlCmdDebugSetModeErrbarDebug_DISPATCH(pKernelSMDebuggerSession, pParams) +#define ksmdbgssnCtrlCmdDebugGetModeErrbarDebug_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugGetModeErrbarDebug__ #define ksmdbgssnCtrlCmdDebugGetModeErrbarDebug(pKernelSMDebuggerSession, pParams) ksmdbgssnCtrlCmdDebugGetModeErrbarDebug_DISPATCH(pKernelSMDebuggerSession, pParams) +#define ksmdbgssnCtrlCmdDebugSetExceptionMask_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugSetExceptionMask__ #define ksmdbgssnCtrlCmdDebugSetExceptionMask(pKernelSMDebuggerSession, pParams) ksmdbgssnCtrlCmdDebugSetExceptionMask_DISPATCH(pKernelSMDebuggerSession, pParams) +#define ksmdbgssnCtrlCmdDebugReadSingleSmErrorState_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugReadSingleSmErrorState__ #define ksmdbgssnCtrlCmdDebugReadSingleSmErrorState(pKernelSMDebuggerSession, pParams) ksmdbgssnCtrlCmdDebugReadSingleSmErrorState_DISPATCH(pKernelSMDebuggerSession, pParams) +#define ksmdbgssnCtrlCmdDebugReadAllSmErrorStates_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugReadAllSmErrorStates__ #define ksmdbgssnCtrlCmdDebugReadAllSmErrorStates(pKernelSMDebuggerSession, pParams) ksmdbgssnCtrlCmdDebugReadAllSmErrorStates_DISPATCH(pKernelSMDebuggerSession, pParams) +#define ksmdbgssnCtrlCmdDebugClearSingleSmErrorState_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugClearSingleSmErrorState__ #define ksmdbgssnCtrlCmdDebugClearSingleSmErrorState(pKernelSMDebuggerSession, pParams) ksmdbgssnCtrlCmdDebugClearSingleSmErrorState_DISPATCH(pKernelSMDebuggerSession, pParams) +#define ksmdbgssnCtrlCmdDebugClearAllSmErrorStates_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugClearAllSmErrorStates__ #define ksmdbgssnCtrlCmdDebugClearAllSmErrorStates(pKernelSMDebuggerSession, pParams) ksmdbgssnCtrlCmdDebugClearAllSmErrorStates_DISPATCH(pKernelSMDebuggerSession, pParams) +#define ksmdbgssnCtrlCmdDebugSuspendContext_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugSuspendContext__ #define ksmdbgssnCtrlCmdDebugSuspendContext(pKernelSMDebuggerSession, pParams) ksmdbgssnCtrlCmdDebugSuspendContext_DISPATCH(pKernelSMDebuggerSession, pParams) +#define ksmdbgssnCtrlCmdDebugResumeContext_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugResumeContext__ #define ksmdbgssnCtrlCmdDebugResumeContext(pKernelSMDebuggerSession) ksmdbgssnCtrlCmdDebugResumeContext_DISPATCH(pKernelSMDebuggerSession) -#define ksmdbgssnCtrlCmdReadSurface(arg0, arg1) ksmdbgssnCtrlCmdReadSurface_DISPATCH(arg0, arg1) -#define ksmdbgssnCtrlCmdWriteSurface(arg0, arg1) ksmdbgssnCtrlCmdWriteSurface_DISPATCH(arg0, arg1) -#define ksmdbgssnCtrlCmdGetMappings(arg0, arg1) ksmdbgssnCtrlCmdGetMappings_DISPATCH(arg0, arg1) +#define ksmdbgssnCtrlCmdReadSurface_FNPTR(arg_this) arg_this->__ksmdbgssnCtrlCmdReadSurface__ +#define ksmdbgssnCtrlCmdReadSurface(arg_this, arg2) ksmdbgssnCtrlCmdReadSurface_DISPATCH(arg_this, arg2) +#define ksmdbgssnCtrlCmdWriteSurface_FNPTR(arg_this) arg_this->__ksmdbgssnCtrlCmdWriteSurface__ +#define ksmdbgssnCtrlCmdWriteSurface(arg_this, arg2) ksmdbgssnCtrlCmdWriteSurface_DISPATCH(arg_this, arg2) +#define ksmdbgssnCtrlCmdGetMappings_FNPTR(arg_this) arg_this->__ksmdbgssnCtrlCmdGetMappings__ +#define ksmdbgssnCtrlCmdGetMappings(arg_this, arg2) ksmdbgssnCtrlCmdGetMappings_DISPATCH(arg_this, arg2) +#define ksmdbgssnCtrlCmdDebugSetNextStopTriggerType_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugSetNextStopTriggerType__ #define ksmdbgssnCtrlCmdDebugSetNextStopTriggerType(pKernelSMDebuggerSession, pParams) ksmdbgssnCtrlCmdDebugSetNextStopTriggerType_DISPATCH(pKernelSMDebuggerSession, pParams) +#define ksmdbgssnCtrlCmdDebugSetSingleStepInterruptHandling_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugSetSingleStepInterruptHandling__ #define ksmdbgssnCtrlCmdDebugSetSingleStepInterruptHandling(pKernelSMDebuggerSession, pParams) ksmdbgssnCtrlCmdDebugSetSingleStepInterruptHandling_DISPATCH(pKernelSMDebuggerSession, pParams) -#define ksmdbgssnCtrlCmdDebugReadMemory(arg0, arg1) ksmdbgssnCtrlCmdDebugReadMemory_DISPATCH(arg0, arg1) -#define ksmdbgssnCtrlCmdDebugWriteMemory(arg0, arg1) ksmdbgssnCtrlCmdDebugWriteMemory_DISPATCH(arg0, arg1) +#define ksmdbgssnCtrlCmdDebugReadMemory_FNPTR(arg_this) arg_this->__ksmdbgssnCtrlCmdDebugReadMemory__ +#define ksmdbgssnCtrlCmdDebugReadMemory(arg_this, arg2) ksmdbgssnCtrlCmdDebugReadMemory_DISPATCH(arg_this, arg2) +#define ksmdbgssnCtrlCmdDebugWriteMemory_FNPTR(arg_this) arg_this->__ksmdbgssnCtrlCmdDebugWriteMemory__ +#define ksmdbgssnCtrlCmdDebugWriteMemory(arg_this, arg2) ksmdbgssnCtrlCmdDebugWriteMemory_DISPATCH(arg_this, arg2) +#define ksmdbgssnCtrlCmdDebugExecRegOps_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugExecRegOps__ #define ksmdbgssnCtrlCmdDebugExecRegOps(pKernelSMDebuggerSession, pParams) ksmdbgssnCtrlCmdDebugExecRegOps_DISPATCH(pKernelSMDebuggerSession, pParams) +#define ksmdbgssnCtrlCmdDebugSetSingleSmSingleStep_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugSetSingleSmSingleStep__ #define ksmdbgssnCtrlCmdDebugSetSingleSmSingleStep(pKernelSMDebuggerSession, pParams) ksmdbgssnCtrlCmdDebugSetSingleSmSingleStep_DISPATCH(pKernelSMDebuggerSession, pParams) +#define ksmdbgssnCtrlCmdDebugSetSingleSmStopTrigger_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugSetSingleSmStopTrigger__ #define ksmdbgssnCtrlCmdDebugSetSingleSmStopTrigger(pKernelSMDebuggerSession, pParams) ksmdbgssnCtrlCmdDebugSetSingleSmStopTrigger_DISPATCH(pKernelSMDebuggerSession, pParams) +#define ksmdbgssnCtrlCmdDebugSetSingleSmRunTrigger_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugSetSingleSmRunTrigger__ #define ksmdbgssnCtrlCmdDebugSetSingleSmRunTrigger(pKernelSMDebuggerSession, pParams) ksmdbgssnCtrlCmdDebugSetSingleSmRunTrigger_DISPATCH(pKernelSMDebuggerSession, pParams) +#define ksmdbgssnCtrlCmdDebugSetSingleSmSkipIdleWarpDetect_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugSetSingleSmSkipIdleWarpDetect__ #define ksmdbgssnCtrlCmdDebugSetSingleSmSkipIdleWarpDetect(pKernelSMDebuggerSession, pParams) ksmdbgssnCtrlCmdDebugSetSingleSmSkipIdleWarpDetect_DISPATCH(pKernelSMDebuggerSession, pParams) +#define ksmdbgssnCtrlCmdDebugGetSingleSmDebuggerStatus_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugGetSingleSmDebuggerStatus__ #define ksmdbgssnCtrlCmdDebugGetSingleSmDebuggerStatus(pKernelSMDebuggerSession, pParams) ksmdbgssnCtrlCmdDebugGetSingleSmDebuggerStatus_DISPATCH(pKernelSMDebuggerSession, pParams) -#define ksmdbgssnCtrlCmdDebugReadBatchMemory(arg0, arg1) ksmdbgssnCtrlCmdDebugReadBatchMemory_DISPATCH(arg0, arg1) -#define ksmdbgssnCtrlCmdDebugWriteBatchMemory(arg0, arg1) ksmdbgssnCtrlCmdDebugWriteBatchMemory_DISPATCH(arg0, arg1) -#define ksmdbgssnCtrlCmdDebugReadMMUFaultInfo(arg0, arg1) ksmdbgssnCtrlCmdDebugReadMMUFaultInfo_DISPATCH(arg0, arg1) -#define ksmdbgssnShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) ksmdbgssnShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define ksmdbgssnCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) ksmdbgssnCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define ksmdbgssnGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) ksmdbgssnGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -#define ksmdbgssnMapTo(pResource, pParams) ksmdbgssnMapTo_DISPATCH(pResource, pParams) -#define ksmdbgssnGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) ksmdbgssnGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define ksmdbgssnSetNotificationShare(pNotifier, pNotifShare) ksmdbgssnSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define ksmdbgssnGetRefCount(pResource) ksmdbgssnGetRefCount_DISPATCH(pResource) -#define ksmdbgssnAddAdditionalDependants(pClient, pResource, pReference) ksmdbgssnAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define ksmdbgssnControl_Prologue(pResource, pCallContext, pParams) ksmdbgssnControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define ksmdbgssnGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) ksmdbgssnGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define ksmdbgssnUnmapFrom(pResource, pParams) ksmdbgssnUnmapFrom_DISPATCH(pResource, pParams) -#define ksmdbgssnControl_Epilogue(pResource, pCallContext, pParams) ksmdbgssnControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define ksmdbgssnCtrlCmdDebugReadBatchMemory_FNPTR(arg_this) arg_this->__ksmdbgssnCtrlCmdDebugReadBatchMemory__ +#define ksmdbgssnCtrlCmdDebugReadBatchMemory(arg_this, arg2) ksmdbgssnCtrlCmdDebugReadBatchMemory_DISPATCH(arg_this, arg2) +#define ksmdbgssnCtrlCmdDebugWriteBatchMemory_FNPTR(arg_this) arg_this->__ksmdbgssnCtrlCmdDebugWriteBatchMemory__ +#define ksmdbgssnCtrlCmdDebugWriteBatchMemory(arg_this, arg2) ksmdbgssnCtrlCmdDebugWriteBatchMemory_DISPATCH(arg_this, arg2) +#define ksmdbgssnCtrlCmdDebugReadMMUFaultInfo_FNPTR(arg_this) arg_this->__ksmdbgssnCtrlCmdDebugReadMMUFaultInfo__ +#define ksmdbgssnCtrlCmdDebugReadMMUFaultInfo(arg_this, arg2) ksmdbgssnCtrlCmdDebugReadMMUFaultInfo_DISPATCH(arg_this, arg2) +#define ksmdbgssnControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ #define ksmdbgssnControl(pGpuResource, pCallContext, pParams) ksmdbgssnControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define ksmdbgssnMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define ksmdbgssnMap(pGpuResource, pCallContext, pParams, pCpuMapping) ksmdbgssnMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define ksmdbgssnUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ #define ksmdbgssnUnmap(pGpuResource, pCallContext, pCpuMapping) ksmdbgssnUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define ksmdbgssnShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define ksmdbgssnShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) ksmdbgssnShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) +#define ksmdbgssnGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define ksmdbgssnGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) ksmdbgssnGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define ksmdbgssnGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define ksmdbgssnGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) ksmdbgssnGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define ksmdbgssnAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define ksmdbgssnAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) ksmdbgssnAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define ksmdbgssnGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define ksmdbgssnGetMemInterMapParams(pRmResource, pParams) ksmdbgssnGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define ksmdbgssnCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define ksmdbgssnCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) ksmdbgssnCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define ksmdbgssnGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define ksmdbgssnGetMemoryMappingDescriptor(pRmResource, ppMemDesc) ksmdbgssnGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define ksmdbgssnControlFilter(pResource, pCallContext, pParams) ksmdbgssnControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define ksmdbgssnUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) ksmdbgssnUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define ksmdbgssnControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define ksmdbgssnControlSerialization_Prologue(pResource, pCallContext, pParams) ksmdbgssnControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define ksmdbgssnControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define ksmdbgssnControlSerialization_Epilogue(pResource, pCallContext, pParams) ksmdbgssnControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define ksmdbgssnControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define ksmdbgssnControl_Prologue(pResource, pCallContext, pParams) ksmdbgssnControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define ksmdbgssnControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define ksmdbgssnControl_Epilogue(pResource, pCallContext, pParams) ksmdbgssnControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define ksmdbgssnCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define ksmdbgssnCanCopy(pResource) ksmdbgssnCanCopy_DISPATCH(pResource) -#define ksmdbgssnIsPartialUnmapSupported(pResource) ksmdbgssnIsPartialUnmapSupported_DISPATCH(pResource) -#define ksmdbgssnPreDestruct(pResource) ksmdbgssnPreDestruct_DISPATCH(pResource) +#define ksmdbgssnIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define ksmdbgssnIsDuplicate(pResource, hMemory, pDuplicate) ksmdbgssnIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define ksmdbgssnControlSerialization_Epilogue(pResource, pCallContext, pParams) ksmdbgssnControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define ksmdbgssnPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define ksmdbgssnPreDestruct(pResource) ksmdbgssnPreDestruct_DISPATCH(pResource) +#define ksmdbgssnControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define ksmdbgssnControlFilter(pResource, pCallContext, pParams) ksmdbgssnControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define ksmdbgssnIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define ksmdbgssnIsPartialUnmapSupported(pResource) ksmdbgssnIsPartialUnmapSupported_DISPATCH(pResource) +#define ksmdbgssnMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define ksmdbgssnMapTo(pResource, pParams) ksmdbgssnMapTo_DISPATCH(pResource, pParams) +#define ksmdbgssnUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define ksmdbgssnUnmapFrom(pResource, pParams) ksmdbgssnUnmapFrom_DISPATCH(pResource, pParams) +#define ksmdbgssnGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define ksmdbgssnGetRefCount(pResource) ksmdbgssnGetRefCount_DISPATCH(pResource) +#define ksmdbgssnAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define ksmdbgssnAddAdditionalDependants(pClient, pResource, pReference) ksmdbgssnAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define ksmdbgssnGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define ksmdbgssnGetNotificationListPtr(pNotifier) ksmdbgssnGetNotificationListPtr_DISPATCH(pNotifier) +#define ksmdbgssnGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ #define ksmdbgssnGetNotificationShare(pNotifier) ksmdbgssnGetNotificationShare_DISPATCH(pNotifier) -#define ksmdbgssnMap(pGpuResource, pCallContext, pParams, pCpuMapping) ksmdbgssnMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define ksmdbgssnAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) ksmdbgssnAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS ksmdbgssnInternalControlForward_IMPL(struct KernelSMDebuggerSession *arg0, NvU32 command, void *pParams, NvU32 size); - -static inline NV_STATUS ksmdbgssnInternalControlForward_DISPATCH(struct KernelSMDebuggerSession *arg0, NvU32 command, void *pParams, NvU32 size) { - return arg0->__ksmdbgssnInternalControlForward__(arg0, command, pParams, size); -} - -NvHandle ksmdbgssnGetInternalObjectHandle_IMPL(struct KernelSMDebuggerSession *arg0); +#define ksmdbgssnSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define ksmdbgssnSetNotificationShare(pNotifier, pNotifShare) ksmdbgssnSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define ksmdbgssnUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define ksmdbgssnUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) ksmdbgssnUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define ksmdbgssnGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define ksmdbgssnGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) ksmdbgssnGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -static inline NvHandle ksmdbgssnGetInternalObjectHandle_DISPATCH(struct KernelSMDebuggerSession *arg0) { - return arg0->__ksmdbgssnGetInternalObjectHandle__(arg0); +// Dispatch functions +static inline NV_STATUS ksmdbgssnInternalControlForward_DISPATCH(struct KernelSMDebuggerSession *arg_this, NvU32 command, void *pParams, NvU32 size) { + return arg_this->__ksmdbgssnInternalControlForward__(arg_this, command, pParams, size); } -static inline NV_STATUS ksmdbgssnCtrlCmdSMDebugModeEnable_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession) { - return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365313U), ((void *)0), 0); +static inline NvHandle ksmdbgssnGetInternalObjectHandle_DISPATCH(struct KernelSMDebuggerSession *arg_this) { + return arg_this->__ksmdbgssnGetInternalObjectHandle__(arg_this); } static inline NV_STATUS ksmdbgssnCtrlCmdSMDebugModeEnable_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdSMDebugModeEnable__(pKernelSMDebuggerSession); } -static inline NV_STATUS ksmdbgssnCtrlCmdSMDebugModeDisable_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession) { - return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365314U), ((void *)0), 0); -} - static inline NV_STATUS ksmdbgssnCtrlCmdSMDebugModeDisable_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdSMDebugModeDisable__(pKernelSMDebuggerSession); } -static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetModeMMUDebug_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_MODE_MMU_DEBUG_PARAMS *pParams) { - return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365315U), pParams, sizeof (*pParams)); -} - static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetModeMMUDebug_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_MODE_MMU_DEBUG_PARAMS *pParams) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugSetModeMMUDebug__(pKernelSMDebuggerSession, pParams); } -static inline NV_STATUS ksmdbgssnCtrlCmdDebugGetModeMMUDebug_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_GET_MODE_MMU_DEBUG_PARAMS *pParams) { - return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365316U), pParams, sizeof (*pParams)); -} - static inline NV_STATUS ksmdbgssnCtrlCmdDebugGetModeMMUDebug_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_GET_MODE_MMU_DEBUG_PARAMS *pParams) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugGetModeMMUDebug__(pKernelSMDebuggerSession, pParams); } -static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetModeErrbarDebug_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_MODE_ERRBAR_DEBUG_PARAMS *pParams) { - return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365328U), pParams, sizeof (*pParams)); -} - static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetModeErrbarDebug_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_MODE_ERRBAR_DEBUG_PARAMS *pParams) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugSetModeErrbarDebug__(pKernelSMDebuggerSession, pParams); } -static inline NV_STATUS ksmdbgssnCtrlCmdDebugGetModeErrbarDebug_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_GET_MODE_ERRBAR_DEBUG_PARAMS *pParams) { - return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365329U), pParams, sizeof (*pParams)); -} - static inline NV_STATUS ksmdbgssnCtrlCmdDebugGetModeErrbarDebug_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_GET_MODE_ERRBAR_DEBUG_PARAMS *pParams) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugGetModeErrbarDebug__(pKernelSMDebuggerSession, pParams); } -static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetExceptionMask_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_EXCEPTION_MASK_PARAMS *pParams) { - return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365317U), pParams, sizeof (*pParams)); -} - static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetExceptionMask_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_EXCEPTION_MASK_PARAMS *pParams) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugSetExceptionMask__(pKernelSMDebuggerSession, pParams); } -static inline NV_STATUS ksmdbgssnCtrlCmdDebugReadSingleSmErrorState_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_READ_SINGLE_SM_ERROR_STATE_PARAMS *pParams) { - return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365319U), pParams, sizeof (*pParams)); -} - static inline NV_STATUS ksmdbgssnCtrlCmdDebugReadSingleSmErrorState_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_READ_SINGLE_SM_ERROR_STATE_PARAMS *pParams) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugReadSingleSmErrorState__(pKernelSMDebuggerSession, pParams); } -NV_STATUS ksmdbgssnCtrlCmdDebugReadAllSmErrorStates_IMPL(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_READ_ALL_SM_ERROR_STATES_PARAMS *pParams); - static inline NV_STATUS ksmdbgssnCtrlCmdDebugReadAllSmErrorStates_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_READ_ALL_SM_ERROR_STATES_PARAMS *pParams) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugReadAllSmErrorStates__(pKernelSMDebuggerSession, pParams); } -static inline NV_STATUS ksmdbgssnCtrlCmdDebugClearSingleSmErrorState_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_CLEAR_SINGLE_SM_ERROR_STATE_PARAMS *pParams) { - return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365321U), pParams, sizeof (*pParams)); -} - static inline NV_STATUS ksmdbgssnCtrlCmdDebugClearSingleSmErrorState_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_CLEAR_SINGLE_SM_ERROR_STATE_PARAMS *pParams) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugClearSingleSmErrorState__(pKernelSMDebuggerSession, pParams); } -NV_STATUS ksmdbgssnCtrlCmdDebugClearAllSmErrorStates_IMPL(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_CLEAR_ALL_SM_ERROR_STATES_PARAMS *pParams); - static inline NV_STATUS ksmdbgssnCtrlCmdDebugClearAllSmErrorStates_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_CLEAR_ALL_SM_ERROR_STATES_PARAMS *pParams) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugClearAllSmErrorStates__(pKernelSMDebuggerSession, pParams); } -static inline NV_STATUS ksmdbgssnCtrlCmdDebugSuspendContext_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_CMD_DEBUG_SUSPEND_CONTEXT_PARAMS *pParams) { - return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365325U), pParams, sizeof (*pParams)); -} - static inline NV_STATUS ksmdbgssnCtrlCmdDebugSuspendContext_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_CMD_DEBUG_SUSPEND_CONTEXT_PARAMS *pParams) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugSuspendContext__(pKernelSMDebuggerSession, pParams); } -static inline NV_STATUS ksmdbgssnCtrlCmdDebugResumeContext_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession) { - return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365326U), ((void *)0), 0); -} - static inline NV_STATUS ksmdbgssnCtrlCmdDebugResumeContext_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugResumeContext__(pKernelSMDebuggerSession); } -NV_STATUS ksmdbgssnCtrlCmdReadSurface_IMPL(struct KernelSMDebuggerSession *arg0, NV83DE_CTRL_DEBUG_ACCESS_SURFACE_PARAMETERS *arg1); - -static inline NV_STATUS ksmdbgssnCtrlCmdReadSurface_DISPATCH(struct KernelSMDebuggerSession *arg0, NV83DE_CTRL_DEBUG_ACCESS_SURFACE_PARAMETERS *arg1) { - return arg0->__ksmdbgssnCtrlCmdReadSurface__(arg0, arg1); -} - -NV_STATUS ksmdbgssnCtrlCmdWriteSurface_IMPL(struct KernelSMDebuggerSession *arg0, NV83DE_CTRL_DEBUG_ACCESS_SURFACE_PARAMETERS *arg1); - -static inline NV_STATUS ksmdbgssnCtrlCmdWriteSurface_DISPATCH(struct KernelSMDebuggerSession *arg0, NV83DE_CTRL_DEBUG_ACCESS_SURFACE_PARAMETERS *arg1) { - return arg0->__ksmdbgssnCtrlCmdWriteSurface__(arg0, arg1); +static inline NV_STATUS ksmdbgssnCtrlCmdReadSurface_DISPATCH(struct KernelSMDebuggerSession *arg_this, NV83DE_CTRL_DEBUG_ACCESS_SURFACE_PARAMETERS *arg2) { + return arg_this->__ksmdbgssnCtrlCmdReadSurface__(arg_this, arg2); } -NV_STATUS ksmdbgssnCtrlCmdGetMappings_IMPL(struct KernelSMDebuggerSession *arg0, NV83DE_CTRL_DEBUG_GET_MAPPINGS_PARAMETERS *arg1); - -static inline NV_STATUS ksmdbgssnCtrlCmdGetMappings_DISPATCH(struct KernelSMDebuggerSession *arg0, NV83DE_CTRL_DEBUG_GET_MAPPINGS_PARAMETERS *arg1) { - return arg0->__ksmdbgssnCtrlCmdGetMappings__(arg0, arg1); +static inline NV_STATUS ksmdbgssnCtrlCmdWriteSurface_DISPATCH(struct KernelSMDebuggerSession *arg_this, NV83DE_CTRL_DEBUG_ACCESS_SURFACE_PARAMETERS *arg2) { + return arg_this->__ksmdbgssnCtrlCmdWriteSurface__(arg_this, arg2); } -static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetNextStopTriggerType_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_NEXT_STOP_TRIGGER_TYPE_PARAMS *pParams) { - return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365323U), pParams, sizeof (*pParams)); +static inline NV_STATUS ksmdbgssnCtrlCmdGetMappings_DISPATCH(struct KernelSMDebuggerSession *arg_this, NV83DE_CTRL_DEBUG_GET_MAPPINGS_PARAMETERS *arg2) { + return arg_this->__ksmdbgssnCtrlCmdGetMappings__(arg_this, arg2); } static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetNextStopTriggerType_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_NEXT_STOP_TRIGGER_TYPE_PARAMS *pParams) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugSetNextStopTriggerType__(pKernelSMDebuggerSession, pParams); } -static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetSingleStepInterruptHandling_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_SINGLE_STEP_INTERRUPT_HANDLING_PARAMS *pParams) { - return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365324U), pParams, sizeof (*pParams)); -} - static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetSingleStepInterruptHandling_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_SINGLE_STEP_INTERRUPT_HANDLING_PARAMS *pParams) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugSetSingleStepInterruptHandling__(pKernelSMDebuggerSession, pParams); } -NV_STATUS ksmdbgssnCtrlCmdDebugReadMemory_IMPL(struct KernelSMDebuggerSession *arg0, NV83DE_CTRL_DEBUG_READ_MEMORY_PARAMS *arg1); - -static inline NV_STATUS ksmdbgssnCtrlCmdDebugReadMemory_DISPATCH(struct KernelSMDebuggerSession *arg0, NV83DE_CTRL_DEBUG_READ_MEMORY_PARAMS *arg1) { - return arg0->__ksmdbgssnCtrlCmdDebugReadMemory__(arg0, arg1); +static inline NV_STATUS ksmdbgssnCtrlCmdDebugReadMemory_DISPATCH(struct KernelSMDebuggerSession *arg_this, NV83DE_CTRL_DEBUG_READ_MEMORY_PARAMS *arg2) { + return arg_this->__ksmdbgssnCtrlCmdDebugReadMemory__(arg_this, arg2); } -NV_STATUS ksmdbgssnCtrlCmdDebugWriteMemory_IMPL(struct KernelSMDebuggerSession *arg0, NV83DE_CTRL_DEBUG_WRITE_MEMORY_PARAMS *arg1); - -static inline NV_STATUS ksmdbgssnCtrlCmdDebugWriteMemory_DISPATCH(struct KernelSMDebuggerSession *arg0, NV83DE_CTRL_DEBUG_WRITE_MEMORY_PARAMS *arg1) { - return arg0->__ksmdbgssnCtrlCmdDebugWriteMemory__(arg0, arg1); +static inline NV_STATUS ksmdbgssnCtrlCmdDebugWriteMemory_DISPATCH(struct KernelSMDebuggerSession *arg_this, NV83DE_CTRL_DEBUG_WRITE_MEMORY_PARAMS *arg2) { + return arg_this->__ksmdbgssnCtrlCmdDebugWriteMemory__(arg_this, arg2); } -NV_STATUS ksmdbgssnCtrlCmdDebugExecRegOps_IMPL(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_EXEC_REG_OPS_PARAMS *pParams); - static inline NV_STATUS ksmdbgssnCtrlCmdDebugExecRegOps_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_EXEC_REG_OPS_PARAMS *pParams) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugExecRegOps__(pKernelSMDebuggerSession, pParams); } -static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetSingleSmSingleStep_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_SINGLE_SM_SINGLE_STEP_PARAMS *pParams) { - return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365330U), pParams, sizeof (*pParams)); -} - static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetSingleSmSingleStep_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_SINGLE_SM_SINGLE_STEP_PARAMS *pParams) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugSetSingleSmSingleStep__(pKernelSMDebuggerSession, pParams); } -static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetSingleSmStopTrigger_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_SINGLE_SM_STOP_TRIGGER_PARAMS *pParams) { - return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365331U), pParams, sizeof (*pParams)); -} - static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetSingleSmStopTrigger_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_SINGLE_SM_STOP_TRIGGER_PARAMS *pParams) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugSetSingleSmStopTrigger__(pKernelSMDebuggerSession, pParams); } -static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetSingleSmRunTrigger_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_SINGLE_SM_RUN_TRIGGER_PARAMS *pParams) { - return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365332U), pParams, sizeof (*pParams)); -} - static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetSingleSmRunTrigger_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_SINGLE_SM_RUN_TRIGGER_PARAMS *pParams) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugSetSingleSmRunTrigger__(pKernelSMDebuggerSession, pParams); } -static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetSingleSmSkipIdleWarpDetect_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_SINGLE_SM_SKIP_IDLE_WARP_DETECT_PARAMS *pParams) { - return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365333U), pParams, sizeof (*pParams)); -} - static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetSingleSmSkipIdleWarpDetect_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_SINGLE_SM_SKIP_IDLE_WARP_DETECT_PARAMS *pParams) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugSetSingleSmSkipIdleWarpDetect__(pKernelSMDebuggerSession, pParams); } -static inline NV_STATUS ksmdbgssnCtrlCmdDebugGetSingleSmDebuggerStatus_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_GET_SINGLE_SM_DEBUGGER_STATUS_PARAMS *pParams) { - return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365334U), pParams, sizeof (*pParams)); -} - static inline NV_STATUS ksmdbgssnCtrlCmdDebugGetSingleSmDebuggerStatus_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_GET_SINGLE_SM_DEBUGGER_STATUS_PARAMS *pParams) { return pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdDebugGetSingleSmDebuggerStatus__(pKernelSMDebuggerSession, pParams); } -NV_STATUS ksmdbgssnCtrlCmdDebugReadBatchMemory_IMPL(struct KernelSMDebuggerSession *arg0, NV83DE_CTRL_DEBUG_ACCESS_MEMORY_PARAMS *arg1); +static inline NV_STATUS ksmdbgssnCtrlCmdDebugReadBatchMemory_DISPATCH(struct KernelSMDebuggerSession *arg_this, NV83DE_CTRL_DEBUG_ACCESS_MEMORY_PARAMS *arg2) { + return arg_this->__ksmdbgssnCtrlCmdDebugReadBatchMemory__(arg_this, arg2); +} -static inline NV_STATUS ksmdbgssnCtrlCmdDebugReadBatchMemory_DISPATCH(struct KernelSMDebuggerSession *arg0, NV83DE_CTRL_DEBUG_ACCESS_MEMORY_PARAMS *arg1) { - return arg0->__ksmdbgssnCtrlCmdDebugReadBatchMemory__(arg0, arg1); +static inline NV_STATUS ksmdbgssnCtrlCmdDebugWriteBatchMemory_DISPATCH(struct KernelSMDebuggerSession *arg_this, NV83DE_CTRL_DEBUG_ACCESS_MEMORY_PARAMS *arg2) { + return arg_this->__ksmdbgssnCtrlCmdDebugWriteBatchMemory__(arg_this, arg2); } -NV_STATUS ksmdbgssnCtrlCmdDebugWriteBatchMemory_IMPL(struct KernelSMDebuggerSession *arg0, NV83DE_CTRL_DEBUG_ACCESS_MEMORY_PARAMS *arg1); +static inline NV_STATUS ksmdbgssnCtrlCmdDebugReadMMUFaultInfo_DISPATCH(struct KernelSMDebuggerSession *arg_this, NV83DE_CTRL_DEBUG_READ_MMU_FAULT_INFO_PARAMS *arg2) { + return arg_this->__ksmdbgssnCtrlCmdDebugReadMMUFaultInfo__(arg_this, arg2); +} -static inline NV_STATUS ksmdbgssnCtrlCmdDebugWriteBatchMemory_DISPATCH(struct KernelSMDebuggerSession *arg0, NV83DE_CTRL_DEBUG_ACCESS_MEMORY_PARAMS *arg1) { - return arg0->__ksmdbgssnCtrlCmdDebugWriteBatchMemory__(arg0, arg1); +static inline NV_STATUS ksmdbgssnControl_DISPATCH(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__ksmdbgssnControl__(pGpuResource, pCallContext, pParams); } -NV_STATUS ksmdbgssnCtrlCmdDebugReadMMUFaultInfo_IMPL(struct KernelSMDebuggerSession *arg0, NV83DE_CTRL_DEBUG_READ_MMU_FAULT_INFO_PARAMS *arg1); +static inline NV_STATUS ksmdbgssnMap_DISPATCH(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__ksmdbgssnMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +} -static inline NV_STATUS ksmdbgssnCtrlCmdDebugReadMMUFaultInfo_DISPATCH(struct KernelSMDebuggerSession *arg0, NV83DE_CTRL_DEBUG_READ_MMU_FAULT_INFO_PARAMS *arg1) { - return arg0->__ksmdbgssnCtrlCmdDebugReadMMUFaultInfo__(arg0, arg1); +static inline NV_STATUS ksmdbgssnUnmap_DISPATCH(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__ksmdbgssnUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool ksmdbgssnShareCallback_DISPATCH(struct KernelSMDebuggerSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return pGpuResource->__ksmdbgssnShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } +static inline NV_STATUS ksmdbgssnGetRegBaseOffsetAndSize_DISPATCH(struct KernelSMDebuggerSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__ksmdbgssnGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +} + +static inline NV_STATUS ksmdbgssnGetMapAddrSpace_DISPATCH(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__ksmdbgssnGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +} + +static inline NvBool ksmdbgssnAccessCallback_DISPATCH(struct KernelSMDebuggerSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__ksmdbgssnAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +} + +static inline NV_STATUS ksmdbgssnGetMemInterMapParams_DISPATCH(struct KernelSMDebuggerSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__ksmdbgssnGetMemInterMapParams__(pRmResource, pParams); +} + static inline NV_STATUS ksmdbgssnCheckMemInterUnmap_DISPATCH(struct KernelSMDebuggerSession *pRmResource, NvBool bSubdeviceHandleProvided) { return pRmResource->__ksmdbgssnCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS ksmdbgssnGetOrAllocNotifShare_DISPATCH(struct KernelSMDebuggerSession *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__ksmdbgssnGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); +static inline NV_STATUS ksmdbgssnGetMemoryMappingDescriptor_DISPATCH(struct KernelSMDebuggerSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__ksmdbgssnGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NV_STATUS ksmdbgssnMapTo_DISPATCH(struct KernelSMDebuggerSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__ksmdbgssnMapTo__(pResource, pParams); +static inline NV_STATUS ksmdbgssnControlSerialization_Prologue_DISPATCH(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__ksmdbgssnControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS ksmdbgssnGetMapAddrSpace_DISPATCH(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__ksmdbgssnGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +static inline void ksmdbgssnControlSerialization_Epilogue_DISPATCH(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__ksmdbgssnControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline void ksmdbgssnSetNotificationShare_DISPATCH(struct KernelSMDebuggerSession *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__ksmdbgssnSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS ksmdbgssnControl_Prologue_DISPATCH(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__ksmdbgssnControl_Prologue__(pResource, pCallContext, pParams); +} + +static inline void ksmdbgssnControl_Epilogue_DISPATCH(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__ksmdbgssnControl_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NvBool ksmdbgssnCanCopy_DISPATCH(struct KernelSMDebuggerSession *pResource) { + return pResource->__ksmdbgssnCanCopy__(pResource); +} + +static inline NV_STATUS ksmdbgssnIsDuplicate_DISPATCH(struct KernelSMDebuggerSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__ksmdbgssnIsDuplicate__(pResource, hMemory, pDuplicate); +} + +static inline void ksmdbgssnPreDestruct_DISPATCH(struct KernelSMDebuggerSession *pResource) { + pResource->__ksmdbgssnPreDestruct__(pResource); +} + +static inline NV_STATUS ksmdbgssnControlFilter_DISPATCH(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__ksmdbgssnControlFilter__(pResource, pCallContext, pParams); +} + +static inline NvBool ksmdbgssnIsPartialUnmapSupported_DISPATCH(struct KernelSMDebuggerSession *pResource) { + return pResource->__ksmdbgssnIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS ksmdbgssnMapTo_DISPATCH(struct KernelSMDebuggerSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__ksmdbgssnMapTo__(pResource, pParams); +} + +static inline NV_STATUS ksmdbgssnUnmapFrom_DISPATCH(struct KernelSMDebuggerSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__ksmdbgssnUnmapFrom__(pResource, pParams); } static inline NvU32 ksmdbgssnGetRefCount_DISPATCH(struct KernelSMDebuggerSession *pResource) { @@ -580,100 +640,138 @@ static inline void ksmdbgssnAddAdditionalDependants_DISPATCH(struct RsClient *pC pResource->__ksmdbgssnAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NV_STATUS ksmdbgssnControl_Prologue_DISPATCH(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ksmdbgssnControl_Prologue__(pResource, pCallContext, pParams); +static inline PEVENTNOTIFICATION * ksmdbgssnGetNotificationListPtr_DISPATCH(struct KernelSMDebuggerSession *pNotifier) { + return pNotifier->__ksmdbgssnGetNotificationListPtr__(pNotifier); } -static inline NV_STATUS ksmdbgssnGetRegBaseOffsetAndSize_DISPATCH(struct KernelSMDebuggerSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__ksmdbgssnGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline struct NotifShare * ksmdbgssnGetNotificationShare_DISPATCH(struct KernelSMDebuggerSession *pNotifier) { + return pNotifier->__ksmdbgssnGetNotificationShare__(pNotifier); } -static inline NV_STATUS ksmdbgssnUnmapFrom_DISPATCH(struct KernelSMDebuggerSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__ksmdbgssnUnmapFrom__(pResource, pParams); +static inline void ksmdbgssnSetNotificationShare_DISPATCH(struct KernelSMDebuggerSession *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__ksmdbgssnSetNotificationShare__(pNotifier, pNotifShare); } -static inline void ksmdbgssnControl_Epilogue_DISPATCH(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__ksmdbgssnControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS ksmdbgssnUnregisterEvent_DISPATCH(struct KernelSMDebuggerSession *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__ksmdbgssnUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static inline NV_STATUS ksmdbgssnControl_DISPATCH(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__ksmdbgssnControl__(pGpuResource, pCallContext, pParams); +static inline NV_STATUS ksmdbgssnGetOrAllocNotifShare_DISPATCH(struct KernelSMDebuggerSession *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return pNotifier->__ksmdbgssnGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } -static inline NV_STATUS ksmdbgssnUnmap_DISPATCH(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__ksmdbgssnUnmap__(pGpuResource, pCallContext, pCpuMapping); +NV_STATUS ksmdbgssnInternalControlForward_IMPL(struct KernelSMDebuggerSession *arg1, NvU32 command, void *pParams, NvU32 size); + +NvHandle ksmdbgssnGetInternalObjectHandle_IMPL(struct KernelSMDebuggerSession *arg1); + +static inline NV_STATUS ksmdbgssnCtrlCmdSMDebugModeEnable_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession) { + return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365313U), ((void *)0), 0); } -static inline NV_STATUS ksmdbgssnGetMemInterMapParams_DISPATCH(struct KernelSMDebuggerSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__ksmdbgssnGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS ksmdbgssnCtrlCmdSMDebugModeDisable_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession) { + return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365314U), ((void *)0), 0); } -static inline NV_STATUS ksmdbgssnGetMemoryMappingDescriptor_DISPATCH(struct KernelSMDebuggerSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__ksmdbgssnGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetModeMMUDebug_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_MODE_MMU_DEBUG_PARAMS *pParams) { + return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365315U), pParams, sizeof (*pParams)); } -static inline NV_STATUS ksmdbgssnControlFilter_DISPATCH(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ksmdbgssnControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS ksmdbgssnCtrlCmdDebugGetModeMMUDebug_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_GET_MODE_MMU_DEBUG_PARAMS *pParams) { + return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365316U), pParams, sizeof (*pParams)); } -static inline NV_STATUS ksmdbgssnUnregisterEvent_DISPATCH(struct KernelSMDebuggerSession *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__ksmdbgssnUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetModeErrbarDebug_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_MODE_ERRBAR_DEBUG_PARAMS *pParams) { + return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365328U), pParams, sizeof (*pParams)); } -static inline NV_STATUS ksmdbgssnControlSerialization_Prologue_DISPATCH(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ksmdbgssnControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS ksmdbgssnCtrlCmdDebugGetModeErrbarDebug_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_GET_MODE_ERRBAR_DEBUG_PARAMS *pParams) { + return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365329U), pParams, sizeof (*pParams)); } -static inline NvBool ksmdbgssnCanCopy_DISPATCH(struct KernelSMDebuggerSession *pResource) { - return pResource->__ksmdbgssnCanCopy__(pResource); +static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetExceptionMask_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_EXCEPTION_MASK_PARAMS *pParams) { + return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365317U), pParams, sizeof (*pParams)); } -static inline NvBool ksmdbgssnIsPartialUnmapSupported_DISPATCH(struct KernelSMDebuggerSession *pResource) { - return pResource->__ksmdbgssnIsPartialUnmapSupported__(pResource); +static inline NV_STATUS ksmdbgssnCtrlCmdDebugReadSingleSmErrorState_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_READ_SINGLE_SM_ERROR_STATE_PARAMS *pParams) { + return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365319U), pParams, sizeof (*pParams)); } -static inline void ksmdbgssnPreDestruct_DISPATCH(struct KernelSMDebuggerSession *pResource) { - pResource->__ksmdbgssnPreDestruct__(pResource); +NV_STATUS ksmdbgssnCtrlCmdDebugReadAllSmErrorStates_IMPL(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_READ_ALL_SM_ERROR_STATES_PARAMS *pParams); + +static inline NV_STATUS ksmdbgssnCtrlCmdDebugClearSingleSmErrorState_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_CLEAR_SINGLE_SM_ERROR_STATE_PARAMS *pParams) { + return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365321U), pParams, sizeof (*pParams)); } -static inline NV_STATUS ksmdbgssnIsDuplicate_DISPATCH(struct KernelSMDebuggerSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__ksmdbgssnIsDuplicate__(pResource, hMemory, pDuplicate); +NV_STATUS ksmdbgssnCtrlCmdDebugClearAllSmErrorStates_IMPL(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_CLEAR_ALL_SM_ERROR_STATES_PARAMS *pParams); + +static inline NV_STATUS ksmdbgssnCtrlCmdDebugSuspendContext_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_CMD_DEBUG_SUSPEND_CONTEXT_PARAMS *pParams) { + return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365325U), pParams, sizeof (*pParams)); } -static inline void ksmdbgssnControlSerialization_Epilogue_DISPATCH(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__ksmdbgssnControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS ksmdbgssnCtrlCmdDebugResumeContext_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession) { + return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365326U), ((void *)0), 0); } -static inline PEVENTNOTIFICATION *ksmdbgssnGetNotificationListPtr_DISPATCH(struct KernelSMDebuggerSession *pNotifier) { - return pNotifier->__ksmdbgssnGetNotificationListPtr__(pNotifier); +NV_STATUS ksmdbgssnCtrlCmdReadSurface_IMPL(struct KernelSMDebuggerSession *arg1, NV83DE_CTRL_DEBUG_ACCESS_SURFACE_PARAMETERS *arg2); + +NV_STATUS ksmdbgssnCtrlCmdWriteSurface_IMPL(struct KernelSMDebuggerSession *arg1, NV83DE_CTRL_DEBUG_ACCESS_SURFACE_PARAMETERS *arg2); + +NV_STATUS ksmdbgssnCtrlCmdGetMappings_IMPL(struct KernelSMDebuggerSession *arg1, NV83DE_CTRL_DEBUG_GET_MAPPINGS_PARAMETERS *arg2); + +static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetNextStopTriggerType_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_NEXT_STOP_TRIGGER_TYPE_PARAMS *pParams) { + return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365323U), pParams, sizeof (*pParams)); } -static inline struct NotifShare *ksmdbgssnGetNotificationShare_DISPATCH(struct KernelSMDebuggerSession *pNotifier) { - return pNotifier->__ksmdbgssnGetNotificationShare__(pNotifier); +static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetSingleStepInterruptHandling_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_SINGLE_STEP_INTERRUPT_HANDLING_PARAMS *pParams) { + return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365324U), pParams, sizeof (*pParams)); } -static inline NV_STATUS ksmdbgssnMap_DISPATCH(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__ksmdbgssnMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +NV_STATUS ksmdbgssnCtrlCmdDebugReadMemory_IMPL(struct KernelSMDebuggerSession *arg1, NV83DE_CTRL_DEBUG_READ_MEMORY_PARAMS *arg2); + +NV_STATUS ksmdbgssnCtrlCmdDebugWriteMemory_IMPL(struct KernelSMDebuggerSession *arg1, NV83DE_CTRL_DEBUG_WRITE_MEMORY_PARAMS *arg2); + +NV_STATUS ksmdbgssnCtrlCmdDebugExecRegOps_IMPL(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_EXEC_REG_OPS_PARAMS *pParams); + +static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetSingleSmSingleStep_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_SINGLE_SM_SINGLE_STEP_PARAMS *pParams) { + return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365330U), pParams, sizeof (*pParams)); } -static inline NvBool ksmdbgssnAccessCallback_DISPATCH(struct KernelSMDebuggerSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__ksmdbgssnAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetSingleSmStopTrigger_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_SINGLE_SM_STOP_TRIGGER_PARAMS *pParams) { + return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365331U), pParams, sizeof (*pParams)); +} + +static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetSingleSmRunTrigger_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_SINGLE_SM_RUN_TRIGGER_PARAMS *pParams) { + return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365332U), pParams, sizeof (*pParams)); +} + +static inline NV_STATUS ksmdbgssnCtrlCmdDebugSetSingleSmSkipIdleWarpDetect_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_SET_SINGLE_SM_SKIP_IDLE_WARP_DETECT_PARAMS *pParams) { + return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365333U), pParams, sizeof (*pParams)); +} + +static inline NV_STATUS ksmdbgssnCtrlCmdDebugGetSingleSmDebuggerStatus_fcf1ac(struct KernelSMDebuggerSession *pKernelSMDebuggerSession, NV83DE_CTRL_DEBUG_GET_SINGLE_SM_DEBUGGER_STATUS_PARAMS *pParams) { + return ksmdbgssnInternalControlForward(pKernelSMDebuggerSession, (2212365334U), pParams, sizeof (*pParams)); } +NV_STATUS ksmdbgssnCtrlCmdDebugReadBatchMemory_IMPL(struct KernelSMDebuggerSession *arg1, NV83DE_CTRL_DEBUG_ACCESS_MEMORY_PARAMS *arg2); + +NV_STATUS ksmdbgssnCtrlCmdDebugWriteBatchMemory_IMPL(struct KernelSMDebuggerSession *arg1, NV83DE_CTRL_DEBUG_ACCESS_MEMORY_PARAMS *arg2); + +NV_STATUS ksmdbgssnCtrlCmdDebugReadMMUFaultInfo_IMPL(struct KernelSMDebuggerSession *arg1, NV83DE_CTRL_DEBUG_READ_MMU_FAULT_INFO_PARAMS *arg2); + NV_STATUS ksmdbgssnConstruct_IMPL(struct KernelSMDebuggerSession *arg_pKernelSMDebuggerSession, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_ksmdbgssnConstruct(arg_pKernelSMDebuggerSession, arg_pCallContext, arg_pParams) ksmdbgssnConstruct_IMPL(arg_pKernelSMDebuggerSession, arg_pCallContext, arg_pParams) -void ksmdbgssnDestruct_IMPL(struct KernelSMDebuggerSession *arg0); +void ksmdbgssnDestruct_IMPL(struct KernelSMDebuggerSession *arg1); -#define __nvoc_ksmdbgssnDestruct(arg0) ksmdbgssnDestruct_IMPL(arg0) -void ksmdbgssnFreeCallback_IMPL(struct KernelSMDebuggerSession *arg0); +#define __nvoc_ksmdbgssnDestruct(arg1) ksmdbgssnDestruct_IMPL(arg1) +void ksmdbgssnFreeCallback_IMPL(struct KernelSMDebuggerSession *arg1); #ifdef __nvoc_kernel_sm_debugger_session_h_disabled -static inline void ksmdbgssnFreeCallback(struct KernelSMDebuggerSession *arg0) { +static inline void ksmdbgssnFreeCallback(struct KernelSMDebuggerSession *arg1) { NV_ASSERT_FAILED_PRECOMP("KernelSMDebuggerSession was disabled!"); } #else //__nvoc_kernel_sm_debugger_session_h_disabled -#define ksmdbgssnFreeCallback(arg0) ksmdbgssnFreeCallback_IMPL(arg0) +#define ksmdbgssnFreeCallback(arg1) ksmdbgssnFreeCallback_IMPL(arg1) #endif //__nvoc_kernel_sm_debugger_session_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_kernel_vgpu_mgr_nvoc.c b/src/nvidia/generated/g_kernel_vgpu_mgr_nvoc.c index 3b07b67485..ae96c22823 100644 --- a/src/nvidia/generated/g_kernel_vgpu_mgr_nvoc.c +++ b/src/nvidia/generated/g_kernel_vgpu_mgr_nvoc.c @@ -93,10 +93,13 @@ NV_STATUS __nvoc_ctor_KernelVgpuMgr(KernelVgpuMgr *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelVgpuMgr_1(KernelVgpuMgr *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_KernelVgpuMgr_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_KernelVgpuMgr(KernelVgpuMgr *pThis) { __nvoc_init_funcTable_KernelVgpuMgr_1(pThis); } diff --git a/src/nvidia/generated/g_kernel_vgpu_mgr_nvoc.h b/src/nvidia/generated/g_kernel_vgpu_mgr_nvoc.h index 17cc27b633..2eecae0b3f 100644 --- a/src/nvidia/generated/g_kernel_vgpu_mgr_nvoc.h +++ b/src/nvidia/generated/g_kernel_vgpu_mgr_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_KERNEL_VGPU_MGR_NVOC_H_ #define _G_KERNEL_VGPU_MGR_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2017-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_vgpu_mgr_nvoc.h" #ifndef __kernel_vgpu_mgr_h__ @@ -49,6 +57,7 @@ extern "C" { #include "virtualization/common_vgpu_mgr.h" #include "gpu_mgr/gpu_mgr.h" + struct PhysMemSubAlloc; #ifndef __NVOC_CLASS_PhysMemSubAlloc_TYPEDEF__ @@ -61,6 +70,7 @@ typedef struct PhysMemSubAlloc PhysMemSubAlloc; #endif /* __nvoc_class_id_PhysMemSubAlloc */ + struct VgpuConfigApi; #ifndef __NVOC_CLASS_VgpuConfigApi_TYPEDEF__ @@ -199,17 +209,11 @@ typedef struct /* vGPU info received from mdev kernel module for KVM */ typedef struct REQUEST_VGPU_INFO_NODE { - char configParams[VGPU_CONFIG_PARAMS_MAX_LENGTH]; NvU8 mdevUuid[VGPU_UUID_SIZE]; - void *waitQueue; - NvU8 *vmName; - NvS32 *returnStatus; NvU32 gpuPciId; - NvU32 qemuPid; - NvU16 vgpuId; - VGPU_DEVICE_STATE deviceState; NvU32 gpuPciBdf; NvU32 swizzId; + NvU16 vgpuId; KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice; } REQUEST_VGPU_INFO_NODE; @@ -225,11 +229,20 @@ MAKE_LIST(REQUEST_VGPU_INFO_NODE_LIST, REQUEST_VGPU_INFO_NODE); #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelVgpuMgr { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct KernelVgpuMgr *__nvoc_pbase_KernelVgpuMgr; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct KernelVgpuMgr *__nvoc_pbase_KernelVgpuMgr; // kvgpumgr + + // Data members KERNEL_PHYS_GPU_INFO pgpuInfo[32]; NvU32 pgpuCount; VGPU_TYPE_LIST listVgpuTypeHead; @@ -249,6 +262,7 @@ typedef struct KernelVgpuMgr KernelVgpuMgr; #define __nvoc_class_id_KernelVgpuMgr 0xa793dd #endif /* __nvoc_class_id_KernelVgpuMgr */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelVgpuMgr; #define __staticCast_KernelVgpuMgr(pThis) \ @@ -261,13 +275,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelVgpuMgr; ((KernelVgpuMgr*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelVgpuMgr))) #endif //__nvoc_kernel_vgpu_mgr_h_disabled - NV_STATUS __nvoc_objCreateDynamic_KernelVgpuMgr(KernelVgpuMgr**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_KernelVgpuMgr(KernelVgpuMgr**, Dynamic*, NvU32); #define __objCreate_KernelVgpuMgr(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_KernelVgpuMgr((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS kvgpumgrConstruct_IMPL(struct KernelVgpuMgr *arg_pKernelVgpuMgr); #define __nvoc_kvgpumgrConstruct(arg_pKernelVgpuMgr) kvgpumgrConstruct_IMPL(arg_pKernelVgpuMgr) @@ -319,6 +336,7 @@ kvgpumgrGuestRegister(struct OBJGPU *pGpu, NvU32 vgpuDeviceInstanceId, NvBool bDisableDefaultSmcExecPartRestore, NvU16 placementId, + NvU8 *pVgpuDevName, KERNEL_HOST_VGPU_DEVICE **ppKernelHostVgpuDevice); NV_STATUS @@ -357,10 +375,6 @@ kvgpumgrGetVgpuFbUsage(struct OBJGPU *pGpu, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_FB_ NV_STATUS kvgpumgrSetVgpuEncoderCapacity(struct OBJGPU *pGpu, NvU8 *vgpuUuid, NvU32 encoderCapacity); -NV_STATUS -kvgpumgrStart(const NvU8 *pMdevUuid, void *waitQueue, NvS32 *returnStatus, - NvU8 *vmName, NvU32 qemuPid); - NV_STATUS kvgpumgrCreateRequestVgpu(NvU32 gpuPciId, const NvU8 *pMdevUuid, NvU32 vgpuTypeId, NvU16 *vgpuId, NvU32 gpuPciBdf); @@ -368,6 +382,10 @@ kvgpumgrCreateRequestVgpu(NvU32 gpuPciId, const NvU8 *pMdevUuid, NV_STATUS kvgpumgrDeleteRequestVgpu(const NvU8 *pMdevUuid, NvU16 vgpuId); +NV_STATUS +kvgpumgrGetAvailableInstances(NvU32 *avail_instances, struct OBJGPU *pGpu, VGPU_TYPE *vgpuTypeInfo, + NvU32 pgpuIndex, NvU8 devfn); + NV_STATUS kvgpumgrGetHostVgpuDeviceFromMdevUuid(NvU32 gpuPciId, const NvU8 *pMdevUuid, KERNEL_HOST_VGPU_DEVICE **ppKernelHostVgpuDevice); diff --git a/src/nvidia/generated/g_kernel_video_engine_nvoc.c b/src/nvidia/generated/g_kernel_video_engine_nvoc.c index c6ee00787d..d677d3b2b0 100644 --- a/src/nvidia/generated/g_kernel_video_engine_nvoc.c +++ b/src/nvidia/generated/g_kernel_video_engine_nvoc.c @@ -97,6 +97,7 @@ NV_STATUS __nvoc_ctor_KernelVideoEngine(KernelVideoEngine *pThis, RmHalspecOwner return status; } +// Vtable initialization static void __nvoc_init_funcTable_KernelVideoEngine_1(KernelVideoEngine *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -104,28 +105,10 @@ static void __nvoc_init_funcTable_KernelVideoEngine_1(KernelVideoEngine *pThis, PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); +} // End __nvoc_init_funcTable_KernelVideoEngine_1 - // Hal function -- kvidengInitLogging - if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ - { - pThis->__kvidengInitLogging__ = &kvidengInitLogging_46f6a7; - } - else - { - pThis->__kvidengInitLogging__ = &kvidengInitLogging_KERNEL; - } - - // Hal function -- kvidengFreeLogging - if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ - { - pThis->__kvidengFreeLogging__ = &kvidengFreeLogging_b3696a; - } - else - { - pThis->__kvidengFreeLogging__ = &kvidengFreeLogging_KERNEL; - } -} +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_KernelVideoEngine(KernelVideoEngine *pThis, RmHalspecOwner *pRmhalspecowner) { __nvoc_init_funcTable_KernelVideoEngine_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_video_engine_nvoc.h b/src/nvidia/generated/g_kernel_video_engine_nvoc.h index 172e565bc7..a078123851 100644 --- a/src/nvidia/generated/g_kernel_video_engine_nvoc.h +++ b/src/nvidia/generated/g_kernel_video_engine_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_KERNEL_VIDEO_ENGINE_NVOC_H_ #define _G_KERNEL_VIDEO_ENGINE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_kernel_video_engine_nvoc.h" #ifndef KERNEL_VIDEO_ENGINE_H @@ -76,6 +84,11 @@ typedef struct * Variable holding the regeky value */ NvU32 eventTraceRegkeyData; + + /*! + * Flag to allow engine to log events even if no client is bound + */ + NvBool bAlwaysLogging; } VIDEO_TRACE_INFO; // Basic implementation of KernelVideoEngine that can be instantiated. @@ -89,13 +102,20 @@ typedef struct #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct KernelVideoEngine { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct KernelVideoEngine *__nvoc_pbase_KernelVideoEngine; - NV_STATUS (*__kvidengInitLogging__)(struct OBJGPU *, struct KernelVideoEngine *); - void (*__kvidengFreeLogging__)(struct OBJGPU *, struct KernelVideoEngine *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct KernelVideoEngine *__nvoc_pbase_KernelVideoEngine; // kvideng + + // Data members ENGDESCRIPTOR physEngDesc; VIDEO_TRACE_INFO videoTraceInfo; NvBool bVideoTraceEnabled; @@ -110,6 +130,7 @@ typedef struct KernelVideoEngine KernelVideoEngine; #define __nvoc_class_id_KernelVideoEngine 0x9e2f3e #endif /* __nvoc_class_id_KernelVideoEngine */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelVideoEngine; #define __staticCast_KernelVideoEngine(pThis) \ @@ -122,17 +143,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelVideoEngine; ((KernelVideoEngine*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelVideoEngine))) #endif //__nvoc_kernel_video_engine_h_disabled - NV_STATUS __nvoc_objCreateDynamic_KernelVideoEngine(KernelVideoEngine**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_KernelVideoEngine(KernelVideoEngine**, Dynamic*, NvU32, struct OBJGPU * arg_pGpu, ENGDESCRIPTOR arg_physEngDesc); #define __objCreate_KernelVideoEngine(ppNewObj, pParent, createFlags, arg_pGpu, arg_physEngDesc) \ __nvoc_objCreate_KernelVideoEngine((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pGpu, arg_physEngDesc) -#define kvidengInitLogging(pGpu, pKernelVideoEngine) kvidengInitLogging_DISPATCH(pGpu, pKernelVideoEngine) -#define kvidengInitLogging_HAL(pGpu, pKernelVideoEngine) kvidengInitLogging_DISPATCH(pGpu, pKernelVideoEngine) -#define kvidengFreeLogging(pGpu, pKernelVideoEngine) kvidengFreeLogging_DISPATCH(pGpu, pKernelVideoEngine) -#define kvidengFreeLogging_HAL(pGpu, pKernelVideoEngine) kvidengFreeLogging_DISPATCH(pGpu, pKernelVideoEngine) + +// Wrapper macros + +// Dispatch functions NvBool kvidengIsVideoTraceLogSupported_IMPL(struct OBJGPU *pGpu); @@ -141,56 +161,63 @@ NvBool kvidengIsVideoTraceLogSupported_IMPL(struct OBJGPU *pGpu); NV_STATUS kvidengInitLogging_KERNEL(struct OBJGPU *pGpu, struct KernelVideoEngine *pKernelVideoEngine); -static inline NV_STATUS kvidengInitLogging_46f6a7(struct OBJGPU *pGpu, struct KernelVideoEngine *pKernelVideoEngine) { + +#ifdef __nvoc_kernel_video_engine_h_disabled +static inline NV_STATUS kvidengInitLogging(struct OBJGPU *pGpu, struct KernelVideoEngine *pKernelVideoEngine) { + NV_ASSERT_FAILED_PRECOMP("KernelVideoEngine was disabled!"); return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_kernel_video_engine_h_disabled +#define kvidengInitLogging(pGpu, pKernelVideoEngine) kvidengInitLogging_KERNEL(pGpu, pKernelVideoEngine) +#endif //__nvoc_kernel_video_engine_h_disabled -static inline NV_STATUS kvidengInitLogging_DISPATCH(struct OBJGPU *pGpu, struct KernelVideoEngine *pKernelVideoEngine) { - return pKernelVideoEngine->__kvidengInitLogging__(pGpu, pKernelVideoEngine); -} +#define kvidengInitLogging_HAL(pGpu, pKernelVideoEngine) kvidengInitLogging(pGpu, pKernelVideoEngine) void kvidengFreeLogging_KERNEL(struct OBJGPU *pGpu, struct KernelVideoEngine *pKernelVideoEngine); -static inline void kvidengFreeLogging_b3696a(struct OBJGPU *pGpu, struct KernelVideoEngine *pKernelVideoEngine) { - return; -} -static inline void kvidengFreeLogging_DISPATCH(struct OBJGPU *pGpu, struct KernelVideoEngine *pKernelVideoEngine) { - pKernelVideoEngine->__kvidengFreeLogging__(pGpu, pKernelVideoEngine); +#ifdef __nvoc_kernel_video_engine_h_disabled +static inline void kvidengFreeLogging(struct OBJGPU *pGpu, struct KernelVideoEngine *pKernelVideoEngine) { + NV_ASSERT_FAILED_PRECOMP("KernelVideoEngine was disabled!"); } +#else //__nvoc_kernel_video_engine_h_disabled +#define kvidengFreeLogging(pGpu, pKernelVideoEngine) kvidengFreeLogging_KERNEL(pGpu, pKernelVideoEngine) +#endif //__nvoc_kernel_video_engine_h_disabled + +#define kvidengFreeLogging_HAL(pGpu, pKernelVideoEngine) kvidengFreeLogging(pGpu, pKernelVideoEngine) NV_STATUS kvidengRingbufferMakeSpace_IMPL(struct OBJGPU *pGpu, NvU32 oldReadPtr, NvU32 size, VIDEO_TRACE_RING_BUFFER *pTraceBuffer); #define kvidengRingbufferMakeSpace(pGpu, oldReadPtr, size, pTraceBuffer) kvidengRingbufferMakeSpace_IMPL(pGpu, oldReadPtr, size, pTraceBuffer) -NvU32 kvidengRingbufferGetDataSize_IMPL(struct OBJGPU *pGpu, VIDEO_TRACE_RING_BUFFER *arg0); +NvU32 kvidengRingbufferGetDataSize_IMPL(struct OBJGPU *pGpu, VIDEO_TRACE_RING_BUFFER *arg2); -#define kvidengRingbufferGetDataSize(pGpu, arg0) kvidengRingbufferGetDataSize_IMPL(pGpu, arg0) +#define kvidengRingbufferGetDataSize(pGpu, arg2) kvidengRingbufferGetDataSize_IMPL(pGpu, arg2) struct KernelVideoEngine *kvidengFromEngDesc_IMPL(struct OBJGPU *pGpu, NvU32 engDesc); #define kvidengFromEngDesc(pGpu, engDesc) kvidengFromEngDesc_IMPL(pGpu, engDesc) NV_STATUS kvidengConstruct_IMPL(struct KernelVideoEngine *arg_pKernelVideoEngine, struct OBJGPU *arg_pGpu, ENGDESCRIPTOR arg_physEngDesc); #define __nvoc_kvidengConstruct(arg_pKernelVideoEngine, arg_pGpu, arg_physEngDesc) kvidengConstruct_IMPL(arg_pKernelVideoEngine, arg_pGpu, arg_physEngDesc) -NvU32 kvidengRingbufferGet_IMPL(struct OBJGPU *arg0, struct KernelVideoEngine *arg1, NvU8 *pDataOut, NvU32 sizeOut, VIDEO_TRACE_RING_BUFFER *arg2); +NvU32 kvidengRingbufferGet_IMPL(struct OBJGPU *arg1, struct KernelVideoEngine *arg2, NvU8 *pDataOut, NvU32 sizeOut, VIDEO_TRACE_RING_BUFFER *arg5); #ifdef __nvoc_kernel_video_engine_h_disabled -static inline NvU32 kvidengRingbufferGet(struct OBJGPU *arg0, struct KernelVideoEngine *arg1, NvU8 *pDataOut, NvU32 sizeOut, VIDEO_TRACE_RING_BUFFER *arg2) { +static inline NvU32 kvidengRingbufferGet(struct OBJGPU *arg1, struct KernelVideoEngine *arg2, NvU8 *pDataOut, NvU32 sizeOut, VIDEO_TRACE_RING_BUFFER *arg5) { NV_ASSERT_FAILED_PRECOMP("KernelVideoEngine was disabled!"); return 0; } #else //__nvoc_kernel_video_engine_h_disabled -#define kvidengRingbufferGet(arg0, arg1, pDataOut, sizeOut, arg2) kvidengRingbufferGet_IMPL(arg0, arg1, pDataOut, sizeOut, arg2) +#define kvidengRingbufferGet(arg1, arg2, pDataOut, sizeOut, arg5) kvidengRingbufferGet_IMPL(arg1, arg2, pDataOut, sizeOut, arg5) #endif //__nvoc_kernel_video_engine_h_disabled -NvU32 kvidengEventbufferGetRecord_IMPL(struct OBJGPU *arg0, struct KernelVideoEngine *arg1, VIDEO_TRACE_RING_BUFFER *pTraceBuffer, VIDEO_ENGINE_EVENT__RECORD *pRecord, NvU32 magic_hi, NvU32 magic_lo); +NvU32 kvidengEventbufferGetRecord_IMPL(struct OBJGPU *arg1, struct KernelVideoEngine *arg2, VIDEO_TRACE_RING_BUFFER *pTraceBuffer, VIDEO_ENGINE_EVENT__RECORD *pRecord, NvU32 magic_hi, NvU32 magic_lo); #ifdef __nvoc_kernel_video_engine_h_disabled -static inline NvU32 kvidengEventbufferGetRecord(struct OBJGPU *arg0, struct KernelVideoEngine *arg1, VIDEO_TRACE_RING_BUFFER *pTraceBuffer, VIDEO_ENGINE_EVENT__RECORD *pRecord, NvU32 magic_hi, NvU32 magic_lo) { +static inline NvU32 kvidengEventbufferGetRecord(struct OBJGPU *arg1, struct KernelVideoEngine *arg2, VIDEO_TRACE_RING_BUFFER *pTraceBuffer, VIDEO_ENGINE_EVENT__RECORD *pRecord, NvU32 magic_hi, NvU32 magic_lo) { NV_ASSERT_FAILED_PRECOMP("KernelVideoEngine was disabled!"); return 0; } #else //__nvoc_kernel_video_engine_h_disabled -#define kvidengEventbufferGetRecord(arg0, arg1, pTraceBuffer, pRecord, magic_hi, magic_lo) kvidengEventbufferGetRecord_IMPL(arg0, arg1, pTraceBuffer, pRecord, magic_hi, magic_lo) +#define kvidengEventbufferGetRecord(arg1, arg2, pTraceBuffer, pRecord, magic_hi, magic_lo) kvidengEventbufferGetRecord_IMPL(arg1, arg2, pTraceBuffer, pRecord, magic_hi, magic_lo) #endif //__nvoc_kernel_video_engine_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_lock_stress_nvoc.c b/src/nvidia/generated/g_lock_stress_nvoc.c new file mode 100644 index 0000000000..42e6bde556 --- /dev/null +++ b/src/nvidia/generated/g_lock_stress_nvoc.c @@ -0,0 +1,636 @@ +#define NVOC_LOCK_STRESS_H_PRIVATE_ACCESS_ALLOWED +#include "nvoc/runtime.h" +#include "nvoc/rtti.h" +#include "nvtypes.h" +#include "nvport/nvport.h" +#include "nvport/inline/util_valist.h" +#include "utils/nvassert.h" +#include "g_lock_stress_nvoc.h" + +#ifdef DEBUG +char __nvoc_class_id_uniqueness_check_0xecce10 = 1; +#endif + +extern const struct NVOC_CLASS_DEF __nvoc_class_def_LockStressObject; + +extern const struct NVOC_CLASS_DEF __nvoc_class_def_Object; + +extern const struct NVOC_CLASS_DEF __nvoc_class_def_RsResource; + +extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmResourceCommon; + +extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmResource; + +extern const struct NVOC_CLASS_DEF __nvoc_class_def_GpuResource; + +void __nvoc_init_LockStressObject(LockStressObject*); +void __nvoc_init_funcTable_LockStressObject(LockStressObject*); +NV_STATUS __nvoc_ctor_LockStressObject(LockStressObject*, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); +void __nvoc_init_dataField_LockStressObject(LockStressObject*); +void __nvoc_dtor_LockStressObject(LockStressObject*); +extern const struct NVOC_EXPORT_INFO __nvoc_export_info_LockStressObject; + +static const struct NVOC_RTTI __nvoc_rtti_LockStressObject_LockStressObject = { + /*pClassDef=*/ &__nvoc_class_def_LockStressObject, + /*dtor=*/ (NVOC_DYNAMIC_DTOR) &__nvoc_dtor_LockStressObject, + /*offset=*/ 0, +}; + +static const struct NVOC_RTTI __nvoc_rtti_LockStressObject_Object = { + /*pClassDef=*/ &__nvoc_class_def_Object, + /*dtor=*/ &__nvoc_destructFromBase, + /*offset=*/ NV_OFFSETOF(LockStressObject, __nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object), +}; + +static const struct NVOC_RTTI __nvoc_rtti_LockStressObject_RsResource = { + /*pClassDef=*/ &__nvoc_class_def_RsResource, + /*dtor=*/ &__nvoc_destructFromBase, + /*offset=*/ NV_OFFSETOF(LockStressObject, __nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource), +}; + +static const struct NVOC_RTTI __nvoc_rtti_LockStressObject_RmResourceCommon = { + /*pClassDef=*/ &__nvoc_class_def_RmResourceCommon, + /*dtor=*/ &__nvoc_destructFromBase, + /*offset=*/ NV_OFFSETOF(LockStressObject, __nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RmResourceCommon), +}; + +static const struct NVOC_RTTI __nvoc_rtti_LockStressObject_RmResource = { + /*pClassDef=*/ &__nvoc_class_def_RmResource, + /*dtor=*/ &__nvoc_destructFromBase, + /*offset=*/ NV_OFFSETOF(LockStressObject, __nvoc_base_GpuResource.__nvoc_base_RmResource), +}; + +static const struct NVOC_RTTI __nvoc_rtti_LockStressObject_GpuResource = { + /*pClassDef=*/ &__nvoc_class_def_GpuResource, + /*dtor=*/ &__nvoc_destructFromBase, + /*offset=*/ NV_OFFSETOF(LockStressObject, __nvoc_base_GpuResource), +}; + +static const struct NVOC_CASTINFO __nvoc_castinfo_LockStressObject = { + /*numRelatives=*/ 6, + /*relatives=*/ { + &__nvoc_rtti_LockStressObject_LockStressObject, + &__nvoc_rtti_LockStressObject_GpuResource, + &__nvoc_rtti_LockStressObject_RmResource, + &__nvoc_rtti_LockStressObject_RmResourceCommon, + &__nvoc_rtti_LockStressObject_RsResource, + &__nvoc_rtti_LockStressObject_Object, + }, +}; + +const struct NVOC_CLASS_DEF __nvoc_class_def_LockStressObject = +{ + /*classInfo=*/ { + /*size=*/ sizeof(LockStressObject), + /*classId=*/ classId(LockStressObject), + /*providerId=*/ &__nvoc_rtti_provider, +#if NV_PRINTF_STRINGS_ALLOWED + /*name=*/ "LockStressObject", +#endif + }, + /*objCreatefn=*/ (NVOC_DYNAMIC_OBJ_CREATE) &__nvoc_objCreateDynamic_LockStressObject, + /*pCastInfo=*/ &__nvoc_castinfo_LockStressObject, + /*pExportInfo=*/ &__nvoc_export_info_LockStressObject +}; + +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif + +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_LockStressObject[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) lockStressObjCtrlCmdResetLockStressState_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x1000101u, + /*paramSize=*/ 0, + /*pClassInfo=*/ &(__nvoc_class_def_LockStressObject.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "lockStressObjCtrlCmdResetLockStressState" +#endif + }, + { /* [1] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) lockStressObjCtrlCmdPerformLockStressAllRmLocks_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x1000102u, + /*paramSize=*/ sizeof(NV0100_CTRL_PERFORM_LOCK_STRESS_ALL_RM_LOCKS_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_LockStressObject.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "lockStressObjCtrlCmdPerformLockStressAllRmLocks" +#endif + }, + { /* [2] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) lockStressObjCtrlCmdPerformLockStressNoGpusLock_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x1000103u, + /*paramSize=*/ sizeof(NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_LockStressObject.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "lockStressObjCtrlCmdPerformLockStressNoGpusLock" +#endif + }, + { /* [3] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) lockStressObjCtrlCmdPerformLockStressApiLockReadMode_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*flags=*/ 0x108u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x1000104u, + /*paramSize=*/ sizeof(NV0100_CTRL_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_LockStressObject.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "lockStressObjCtrlCmdPerformLockStressApiLockReadMode" +#endif + }, + { /* [4] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) lockStressObjCtrlCmdPerformLockStressNoGpusLockApiLockReadMode_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x1000105u, + /*paramSize=*/ sizeof(NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_LockStressObject.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "lockStressObjCtrlCmdPerformLockStressNoGpusLockApiLockReadMode" +#endif + }, + { /* [5] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) lockStressObjCtrlCmdPerformLockStressInternalAllRmLocks_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x1000106u, + /*paramSize=*/ sizeof(NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_ALL_RM_LOCKS_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_LockStressObject.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "lockStressObjCtrlCmdPerformLockStressInternalAllRmLocks" +#endif + }, + { /* [6] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) lockStressObjCtrlCmdPerformLockStressInternalNoGpusLock_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x1000107u, + /*paramSize=*/ sizeof(NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_LockStressObject.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "lockStressObjCtrlCmdPerformLockStressInternalNoGpusLock" +#endif + }, + { /* [7] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) lockStressObjCtrlCmdPerformLockStressInternalApiLockReadMode_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*flags=*/ 0x108u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x1000108u, + /*paramSize=*/ sizeof(NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_API_LOCK_READ_MODE_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_LockStressObject.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "lockStressObjCtrlCmdPerformLockStressInternalApiLockReadMode" +#endif + }, + { /* [8] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) lockStressObjCtrlCmdPerformLockStressInternalNoGpusLockApiLockReadMode_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x1000109u, + /*paramSize=*/ sizeof(NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_LockStressObject.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "lockStressObjCtrlCmdPerformLockStressInternalNoGpusLockApiLockReadMode" +#endif + }, + { /* [9] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) lockStressObjCtrlCmdGetLockStressCounters_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x100010au, + /*paramSize=*/ sizeof(NV0100_CTRL_GET_LOCK_STRESS_COUNTERS_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_LockStressObject.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "lockStressObjCtrlCmdGetLockStressCounters" +#endif + }, + +}; + +// 25 up-thunk(s) defined to bridge methods in LockStressObject to superclasses + +// lockStressObjControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjControl(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_LockStressObject_GpuResource.offset), pCallContext, pParams); +} + +// lockStressObjMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjMap(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_LockStressObject_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// lockStressObjUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjUnmap(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_LockStressObject_GpuResource.offset), pCallContext, pCpuMapping); +} + +// lockStressObjShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_lockStressObjShareCallback(struct LockStressObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_LockStressObject_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// lockStressObjGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjGetRegBaseOffsetAndSize(struct LockStressObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_LockStressObject_GpuResource.offset), pGpu, pOffset, pSize); +} + +// lockStressObjGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjGetMapAddrSpace(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_LockStressObject_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + +// lockStressObjInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjInternalControlForward(struct LockStressObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_LockStressObject_GpuResource.offset), command, pParams, size); +} + +// lockStressObjGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_lockStressObjGetInternalObjectHandle(struct LockStressObject *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_LockStressObject_GpuResource.offset)); +} + +// lockStressObjAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_lockStressObjAccessCallback(struct LockStressObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// lockStressObjGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_lockStressObjGetMemInterMapParams(struct LockStressObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_LockStressObject_RmResource.offset), pParams); +} + +// lockStressObjCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_lockStressObjCheckMemInterUnmap(struct LockStressObject *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_LockStressObject_RmResource.offset), bSubdeviceHandleProvided); +} + +// lockStressObjGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_lockStressObjGetMemoryMappingDescriptor(struct LockStressObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_LockStressObject_RmResource.offset), ppMemDesc); +} + +// lockStressObjControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_lockStressObjControlSerialization_Prologue(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RmResource.offset), pCallContext, pParams); +} + +// lockStressObjControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_lockStressObjControlSerialization_Epilogue(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RmResource.offset), pCallContext, pParams); +} + +// lockStressObjControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_lockStressObjControl_Prologue(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RmResource.offset), pCallContext, pParams); +} + +// lockStressObjControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_lockStressObjControl_Epilogue(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RmResource.offset), pCallContext, pParams); +} + +// lockStressObjCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_lockStressObjCanCopy(struct LockStressObject *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RsResource.offset)); +} + +// lockStressObjIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_lockStressObjIsDuplicate(struct LockStressObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RsResource.offset), hMemory, pDuplicate); +} + +// lockStressObjPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_lockStressObjPreDestruct(struct LockStressObject *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RsResource.offset)); +} + +// lockStressObjControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_lockStressObjControlFilter(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RsResource.offset), pCallContext, pParams); +} + +// lockStressObjIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_lockStressObjIsPartialUnmapSupported(struct LockStressObject *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RsResource.offset)); +} + +// lockStressObjMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_lockStressObjMapTo(struct LockStressObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RsResource.offset), pParams); +} + +// lockStressObjUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_lockStressObjUnmapFrom(struct LockStressObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RsResource.offset), pParams); +} + +// lockStressObjGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_lockStressObjGetRefCount(struct LockStressObject *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RsResource.offset)); +} + +// lockStressObjAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_lockStressObjAddAdditionalDependants(struct RsClient *pClient, struct LockStressObject *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RsResource.offset), pReference); +} + + +const struct NVOC_EXPORT_INFO __nvoc_export_info_LockStressObject = +{ + /*numEntries=*/ 10, + /*pExportEntries=*/ __nvoc_exported_method_def_LockStressObject +}; + +void __nvoc_dtor_GpuResource(GpuResource*); +void __nvoc_dtor_LockStressObject(LockStressObject *pThis) { + __nvoc_lockStressObjDestruct(pThis); + __nvoc_dtor_GpuResource(&pThis->__nvoc_base_GpuResource); + PORT_UNREFERENCED_VARIABLE(pThis); +} + +void __nvoc_init_dataField_LockStressObject(LockStressObject *pThis) { + PORT_UNREFERENCED_VARIABLE(pThis); +} + +NV_STATUS __nvoc_ctor_GpuResource(GpuResource* , struct CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); +NV_STATUS __nvoc_ctor_LockStressObject(LockStressObject *pThis, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams) { + NV_STATUS status = NV_OK; + status = __nvoc_ctor_GpuResource(&pThis->__nvoc_base_GpuResource, arg_pCallContext, arg_pParams); + if (status != NV_OK) goto __nvoc_ctor_LockStressObject_fail_GpuResource; + __nvoc_init_dataField_LockStressObject(pThis); + + status = __nvoc_lockStressObjConstruct(pThis, arg_pCallContext, arg_pParams); + if (status != NV_OK) goto __nvoc_ctor_LockStressObject_fail__init; + goto __nvoc_ctor_LockStressObject_exit; // Success + +__nvoc_ctor_LockStressObject_fail__init: + __nvoc_dtor_GpuResource(&pThis->__nvoc_base_GpuResource); +__nvoc_ctor_LockStressObject_fail_GpuResource: +__nvoc_ctor_LockStressObject_exit: + + return status; +} + +// Vtable initialization +static void __nvoc_init_funcTable_LockStressObject_1(LockStressObject *pThis) { + PORT_UNREFERENCED_VARIABLE(pThis); + + // lockStressObjCtrlCmdResetLockStressState -- exported (id=0x1000101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + pThis->__lockStressObjCtrlCmdResetLockStressState__ = &lockStressObjCtrlCmdResetLockStressState_IMPL; +#endif + + // lockStressObjCtrlCmdPerformLockStressAllRmLocks -- exported (id=0x1000102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + pThis->__lockStressObjCtrlCmdPerformLockStressAllRmLocks__ = &lockStressObjCtrlCmdPerformLockStressAllRmLocks_IMPL; +#endif + + // lockStressObjCtrlCmdPerformLockStressNoGpusLock -- exported (id=0x1000103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + pThis->__lockStressObjCtrlCmdPerformLockStressNoGpusLock__ = &lockStressObjCtrlCmdPerformLockStressNoGpusLock_IMPL; +#endif + + // lockStressObjCtrlCmdPerformLockStressApiLockReadMode -- exported (id=0x1000104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + pThis->__lockStressObjCtrlCmdPerformLockStressApiLockReadMode__ = &lockStressObjCtrlCmdPerformLockStressApiLockReadMode_IMPL; +#endif + + // lockStressObjCtrlCmdPerformLockStressNoGpusLockApiLockReadMode -- exported (id=0x1000105) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + pThis->__lockStressObjCtrlCmdPerformLockStressNoGpusLockApiLockReadMode__ = &lockStressObjCtrlCmdPerformLockStressNoGpusLockApiLockReadMode_IMPL; +#endif + + // lockStressObjCtrlCmdPerformLockStressInternalAllRmLocks -- exported (id=0x1000106) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + pThis->__lockStressObjCtrlCmdPerformLockStressInternalAllRmLocks__ = &lockStressObjCtrlCmdPerformLockStressInternalAllRmLocks_IMPL; +#endif + + // lockStressObjCtrlCmdPerformLockStressInternalNoGpusLock -- exported (id=0x1000107) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + pThis->__lockStressObjCtrlCmdPerformLockStressInternalNoGpusLock__ = &lockStressObjCtrlCmdPerformLockStressInternalNoGpusLock_IMPL; +#endif + + // lockStressObjCtrlCmdPerformLockStressInternalApiLockReadMode -- exported (id=0x1000108) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + pThis->__lockStressObjCtrlCmdPerformLockStressInternalApiLockReadMode__ = &lockStressObjCtrlCmdPerformLockStressInternalApiLockReadMode_IMPL; +#endif + + // lockStressObjCtrlCmdPerformLockStressInternalNoGpusLockApiLockReadMode -- exported (id=0x1000109) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + pThis->__lockStressObjCtrlCmdPerformLockStressInternalNoGpusLockApiLockReadMode__ = &lockStressObjCtrlCmdPerformLockStressInternalNoGpusLockApiLockReadMode_IMPL; +#endif + + // lockStressObjCtrlCmdGetLockStressCounters -- exported (id=0x100010a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + pThis->__lockStressObjCtrlCmdGetLockStressCounters__ = &lockStressObjCtrlCmdGetLockStressCounters_IMPL; +#endif + + // lockStressObjControl -- virtual inherited (gpures) base (gpures) + pThis->__lockStressObjControl__ = &__nvoc_up_thunk_GpuResource_lockStressObjControl; + + // lockStressObjMap -- virtual inherited (gpures) base (gpures) + pThis->__lockStressObjMap__ = &__nvoc_up_thunk_GpuResource_lockStressObjMap; + + // lockStressObjUnmap -- virtual inherited (gpures) base (gpures) + pThis->__lockStressObjUnmap__ = &__nvoc_up_thunk_GpuResource_lockStressObjUnmap; + + // lockStressObjShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__lockStressObjShareCallback__ = &__nvoc_up_thunk_GpuResource_lockStressObjShareCallback; + + // lockStressObjGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__lockStressObjGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_lockStressObjGetRegBaseOffsetAndSize; + + // lockStressObjGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__lockStressObjGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_lockStressObjGetMapAddrSpace; + + // lockStressObjInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__lockStressObjInternalControlForward__ = &__nvoc_up_thunk_GpuResource_lockStressObjInternalControlForward; + + // lockStressObjGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__lockStressObjGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_lockStressObjGetInternalObjectHandle; + + // lockStressObjAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__lockStressObjAccessCallback__ = &__nvoc_up_thunk_RmResource_lockStressObjAccessCallback; + + // lockStressObjGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__lockStressObjGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_lockStressObjGetMemInterMapParams; + + // lockStressObjCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__lockStressObjCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_lockStressObjCheckMemInterUnmap; + + // lockStressObjGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__lockStressObjGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_lockStressObjGetMemoryMappingDescriptor; + + // lockStressObjControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__lockStressObjControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_lockStressObjControlSerialization_Prologue; + + // lockStressObjControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__lockStressObjControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_lockStressObjControlSerialization_Epilogue; + + // lockStressObjControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__lockStressObjControl_Prologue__ = &__nvoc_up_thunk_RmResource_lockStressObjControl_Prologue; + + // lockStressObjControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__lockStressObjControl_Epilogue__ = &__nvoc_up_thunk_RmResource_lockStressObjControl_Epilogue; + + // lockStressObjCanCopy -- virtual inherited (res) base (gpures) + pThis->__lockStressObjCanCopy__ = &__nvoc_up_thunk_RsResource_lockStressObjCanCopy; + + // lockStressObjIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__lockStressObjIsDuplicate__ = &__nvoc_up_thunk_RsResource_lockStressObjIsDuplicate; + + // lockStressObjPreDestruct -- virtual inherited (res) base (gpures) + pThis->__lockStressObjPreDestruct__ = &__nvoc_up_thunk_RsResource_lockStressObjPreDestruct; + + // lockStressObjControlFilter -- virtual inherited (res) base (gpures) + pThis->__lockStressObjControlFilter__ = &__nvoc_up_thunk_RsResource_lockStressObjControlFilter; + + // lockStressObjIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__lockStressObjIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_lockStressObjIsPartialUnmapSupported; + + // lockStressObjMapTo -- virtual inherited (res) base (gpures) + pThis->__lockStressObjMapTo__ = &__nvoc_up_thunk_RsResource_lockStressObjMapTo; + + // lockStressObjUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__lockStressObjUnmapFrom__ = &__nvoc_up_thunk_RsResource_lockStressObjUnmapFrom; + + // lockStressObjGetRefCount -- virtual inherited (res) base (gpures) + pThis->__lockStressObjGetRefCount__ = &__nvoc_up_thunk_RsResource_lockStressObjGetRefCount; + + // lockStressObjAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__lockStressObjAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_lockStressObjAddAdditionalDependants; +} // End __nvoc_init_funcTable_LockStressObject_1 with approximately 35 basic block(s). + + +// Initialize vtable(s) for 35 virtual method(s). +void __nvoc_init_funcTable_LockStressObject(LockStressObject *pThis) { + + // Initialize vtable(s) with 35 per-object function pointer(s). + __nvoc_init_funcTable_LockStressObject_1(pThis); +} + +void __nvoc_init_GpuResource(GpuResource*); +void __nvoc_init_LockStressObject(LockStressObject *pThis) { + pThis->__nvoc_pbase_LockStressObject = pThis; + pThis->__nvoc_pbase_Object = &pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object; + pThis->__nvoc_pbase_RsResource = &pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource; + pThis->__nvoc_pbase_RmResourceCommon = &pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RmResourceCommon; + pThis->__nvoc_pbase_RmResource = &pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource; + pThis->__nvoc_pbase_GpuResource = &pThis->__nvoc_base_GpuResource; + __nvoc_init_GpuResource(&pThis->__nvoc_base_GpuResource); + __nvoc_init_funcTable_LockStressObject(pThis); +} + +NV_STATUS __nvoc_objCreate_LockStressObject(LockStressObject **ppThis, Dynamic *pParent, NvU32 createFlags, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams) +{ + NV_STATUS status; + Object *pParentObj = NULL; + LockStressObject *pThis; + + // Assign `pThis`, allocating memory unless suppressed by flag. + status = __nvoc_handleObjCreateMemAlloc(createFlags, sizeof(LockStressObject), (void**)&pThis, (void**)ppThis); + if (status != NV_OK) + return status; + + // Zero is the initial value for everything. + portMemSet(pThis, 0, sizeof(LockStressObject)); + + // Initialize runtime type information. + __nvoc_initRtti(staticCast(pThis, Dynamic), &__nvoc_class_def_LockStressObject); + + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object.createFlags = createFlags; + + // Link the child into the parent if there is one unless flagged not to do so. + if (pParent != NULL && !(createFlags & NVOC_OBJ_CREATE_FLAGS_PARENT_HALSPEC_ONLY)) + { + pParentObj = dynamicCast(pParent, Object); + objAddChild(pParentObj, &pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object); + } + else + { + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object.pParent = NULL; + } + + __nvoc_init_LockStressObject(pThis); + status = __nvoc_ctor_LockStressObject(pThis, arg_pCallContext, arg_pParams); + if (status != NV_OK) goto __nvoc_objCreate_LockStressObject_cleanup; + + // Assignment has no effect if NVOC_OBJ_CREATE_FLAGS_IN_PLACE_CONSTRUCT is set. + *ppThis = pThis; + + return NV_OK; + +__nvoc_objCreate_LockStressObject_cleanup: + + // Unlink the child from the parent if it was linked above. + if (pParentObj != NULL) + objRemoveChild(pParentObj, &pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object); + + // Do not call destructors here since the constructor already called them. + if (createFlags & NVOC_OBJ_CREATE_FLAGS_IN_PLACE_CONSTRUCT) + portMemSet(pThis, 0, sizeof(LockStressObject)); + else + { + portMemFree(pThis); + *ppThis = NULL; + } + + // coverity[leaked_storage:FALSE] + return status; +} + +NV_STATUS __nvoc_objCreateDynamic_LockStressObject(LockStressObject **ppThis, Dynamic *pParent, NvU32 createFlags, va_list args) { + NV_STATUS status; + struct CALL_CONTEXT * arg_pCallContext = va_arg(args, struct CALL_CONTEXT *); + struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams = va_arg(args, struct RS_RES_ALLOC_PARAMS_INTERNAL *); + + status = __nvoc_objCreate_LockStressObject(ppThis, pParent, createFlags, arg_pCallContext, arg_pParams); + + return status; +} + diff --git a/src/nvidia/generated/g_lock_stress_nvoc.h b/src/nvidia/generated/g_lock_stress_nvoc.h new file mode 100644 index 0000000000..417e1de930 --- /dev/null +++ b/src/nvidia/generated/g_lock_stress_nvoc.h @@ -0,0 +1,400 @@ + +#ifndef _G_LOCK_STRESS_NVOC_H_ +#define _G_LOCK_STRESS_NVOC_H_ +#include "nvoc/runtime.h" + +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once +#include "g_lock_stress_nvoc.h" + +#ifndef LOCK_STRESS_H +#define LOCK_STRESS_H + +#include "gpu/gpu_resource.h" +#include "nvoc/prelude.h" +#include "nvstatus.h" +#include "resserv/resserv.h" + +#include "ctrl/ctrl0100.h" + + +// Private field names are wrapped in PRIVATE_FIELD, which does nothing for +// the matching C source file, but causes diagnostics to be issued if another +// source file references the field. +#ifdef NVOC_LOCK_STRESS_H_PRIVATE_ACCESS_ALLOWED +#define PRIVATE_FIELD(x) x +#else +#define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) +#endif + + +struct LockStressObject { + + // Metadata + const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers + struct GpuResource __nvoc_base_GpuResource; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct LockStressObject *__nvoc_pbase_LockStressObject; // lockStressObj + + // Vtable with 35 per-object function pointers + NV_STATUS (*__lockStressObjCtrlCmdResetLockStressState__)(struct LockStressObject * /*this*/); // exported (id=0x1000101) + NV_STATUS (*__lockStressObjCtrlCmdPerformLockStressAllRmLocks__)(struct LockStressObject * /*this*/, NV0100_CTRL_PERFORM_LOCK_STRESS_ALL_RM_LOCKS_PARAMS *); // exported (id=0x1000102) + NV_STATUS (*__lockStressObjCtrlCmdPerformLockStressNoGpusLock__)(struct LockStressObject * /*this*/, NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_PARAMS *); // exported (id=0x1000103) + NV_STATUS (*__lockStressObjCtrlCmdPerformLockStressApiLockReadMode__)(struct LockStressObject * /*this*/, NV0100_CTRL_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE_PARAMS *); // exported (id=0x1000104) + NV_STATUS (*__lockStressObjCtrlCmdPerformLockStressNoGpusLockApiLockReadMode__)(struct LockStressObject * /*this*/, NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS *); // exported (id=0x1000105) + NV_STATUS (*__lockStressObjCtrlCmdPerformLockStressInternalAllRmLocks__)(struct LockStressObject * /*this*/, NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_ALL_RM_LOCKS_PARAMS *); // exported (id=0x1000106) + NV_STATUS (*__lockStressObjCtrlCmdPerformLockStressInternalNoGpusLock__)(struct LockStressObject * /*this*/, NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_PARAMS *); // exported (id=0x1000107) + NV_STATUS (*__lockStressObjCtrlCmdPerformLockStressInternalApiLockReadMode__)(struct LockStressObject * /*this*/, NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_API_LOCK_READ_MODE_PARAMS *); // exported (id=0x1000108) + NV_STATUS (*__lockStressObjCtrlCmdPerformLockStressInternalNoGpusLockApiLockReadMode__)(struct LockStressObject * /*this*/, NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS *); // exported (id=0x1000109) + NV_STATUS (*__lockStressObjCtrlCmdGetLockStressCounters__)(struct LockStressObject * /*this*/, NV0100_CTRL_GET_LOCK_STRESS_COUNTERS_PARAMS *); // exported (id=0x100010a) + NV_STATUS (*__lockStressObjControl__)(struct LockStressObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__lockStressObjMap__)(struct LockStressObject * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__lockStressObjUnmap__)(struct LockStressObject * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__lockStressObjShareCallback__)(struct LockStressObject * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__lockStressObjGetRegBaseOffsetAndSize__)(struct LockStressObject * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__lockStressObjGetMapAddrSpace__)(struct LockStressObject * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__lockStressObjInternalControlForward__)(struct LockStressObject * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__lockStressObjGetInternalObjectHandle__)(struct LockStressObject * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__lockStressObjAccessCallback__)(struct LockStressObject * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__lockStressObjGetMemInterMapParams__)(struct LockStressObject * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__lockStressObjCheckMemInterUnmap__)(struct LockStressObject * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__lockStressObjGetMemoryMappingDescriptor__)(struct LockStressObject * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__lockStressObjControlSerialization_Prologue__)(struct LockStressObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__lockStressObjControlSerialization_Epilogue__)(struct LockStressObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__lockStressObjControl_Prologue__)(struct LockStressObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__lockStressObjControl_Epilogue__)(struct LockStressObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__lockStressObjCanCopy__)(struct LockStressObject * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__lockStressObjIsDuplicate__)(struct LockStressObject * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__lockStressObjPreDestruct__)(struct LockStressObject * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__lockStressObjControlFilter__)(struct LockStressObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__lockStressObjIsPartialUnmapSupported__)(struct LockStressObject * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__lockStressObjMapTo__)(struct LockStressObject * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__lockStressObjUnmapFrom__)(struct LockStressObject * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__lockStressObjGetRefCount__)(struct LockStressObject * /*this*/); // virtual inherited (res) base (gpures) + void (*__lockStressObjAddAdditionalDependants__)(struct RsClient *, struct LockStressObject * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members + NvHandle PRIVATE_FIELD(hInternalClient); + NvHandle PRIVATE_FIELD(hInternalDevice); + NvHandle PRIVATE_FIELD(hInternalSubdevice); + NvHandle PRIVATE_FIELD(hInternalLockStressObject); +}; + +#ifndef __NVOC_CLASS_LockStressObject_TYPEDEF__ +#define __NVOC_CLASS_LockStressObject_TYPEDEF__ +typedef struct LockStressObject LockStressObject; +#endif /* __NVOC_CLASS_LockStressObject_TYPEDEF__ */ + +#ifndef __nvoc_class_id_LockStressObject +#define __nvoc_class_id_LockStressObject 0xecce10 +#endif /* __nvoc_class_id_LockStressObject */ + +// Casting support +extern const struct NVOC_CLASS_DEF __nvoc_class_def_LockStressObject; + +#define __staticCast_LockStressObject(pThis) \ + ((pThis)->__nvoc_pbase_LockStressObject) + +#ifdef __nvoc_lock_stress_h_disabled +#define __dynamicCast_LockStressObject(pThis) ((LockStressObject*)NULL) +#else //__nvoc_lock_stress_h_disabled +#define __dynamicCast_LockStressObject(pThis) \ + ((LockStressObject*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(LockStressObject))) +#endif //__nvoc_lock_stress_h_disabled + +NV_STATUS __nvoc_objCreateDynamic_LockStressObject(LockStressObject**, Dynamic*, NvU32, va_list); + +NV_STATUS __nvoc_objCreate_LockStressObject(LockStressObject**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); +#define __objCreate_LockStressObject(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ + __nvoc_objCreate_LockStressObject((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + + +// Wrapper macros +#define lockStressObjCtrlCmdResetLockStressState_FNPTR(pResource) pResource->__lockStressObjCtrlCmdResetLockStressState__ +#define lockStressObjCtrlCmdResetLockStressState(pResource) lockStressObjCtrlCmdResetLockStressState_DISPATCH(pResource) +#define lockStressObjCtrlCmdPerformLockStressAllRmLocks_FNPTR(pResource) pResource->__lockStressObjCtrlCmdPerformLockStressAllRmLocks__ +#define lockStressObjCtrlCmdPerformLockStressAllRmLocks(pResource, pParams) lockStressObjCtrlCmdPerformLockStressAllRmLocks_DISPATCH(pResource, pParams) +#define lockStressObjCtrlCmdPerformLockStressNoGpusLock_FNPTR(pResource) pResource->__lockStressObjCtrlCmdPerformLockStressNoGpusLock__ +#define lockStressObjCtrlCmdPerformLockStressNoGpusLock(pResource, pParams) lockStressObjCtrlCmdPerformLockStressNoGpusLock_DISPATCH(pResource, pParams) +#define lockStressObjCtrlCmdPerformLockStressApiLockReadMode_FNPTR(pResource) pResource->__lockStressObjCtrlCmdPerformLockStressApiLockReadMode__ +#define lockStressObjCtrlCmdPerformLockStressApiLockReadMode(pResource, pParams) lockStressObjCtrlCmdPerformLockStressApiLockReadMode_DISPATCH(pResource, pParams) +#define lockStressObjCtrlCmdPerformLockStressNoGpusLockApiLockReadMode_FNPTR(pResource) pResource->__lockStressObjCtrlCmdPerformLockStressNoGpusLockApiLockReadMode__ +#define lockStressObjCtrlCmdPerformLockStressNoGpusLockApiLockReadMode(pResource, pParams) lockStressObjCtrlCmdPerformLockStressNoGpusLockApiLockReadMode_DISPATCH(pResource, pParams) +#define lockStressObjCtrlCmdPerformLockStressInternalAllRmLocks_FNPTR(pResource) pResource->__lockStressObjCtrlCmdPerformLockStressInternalAllRmLocks__ +#define lockStressObjCtrlCmdPerformLockStressInternalAllRmLocks(pResource, pParams) lockStressObjCtrlCmdPerformLockStressInternalAllRmLocks_DISPATCH(pResource, pParams) +#define lockStressObjCtrlCmdPerformLockStressInternalNoGpusLock_FNPTR(pResource) pResource->__lockStressObjCtrlCmdPerformLockStressInternalNoGpusLock__ +#define lockStressObjCtrlCmdPerformLockStressInternalNoGpusLock(pResource, pParams) lockStressObjCtrlCmdPerformLockStressInternalNoGpusLock_DISPATCH(pResource, pParams) +#define lockStressObjCtrlCmdPerformLockStressInternalApiLockReadMode_FNPTR(pResource) pResource->__lockStressObjCtrlCmdPerformLockStressInternalApiLockReadMode__ +#define lockStressObjCtrlCmdPerformLockStressInternalApiLockReadMode(pResource, pParams) lockStressObjCtrlCmdPerformLockStressInternalApiLockReadMode_DISPATCH(pResource, pParams) +#define lockStressObjCtrlCmdPerformLockStressInternalNoGpusLockApiLockReadMode_FNPTR(pResource) pResource->__lockStressObjCtrlCmdPerformLockStressInternalNoGpusLockApiLockReadMode__ +#define lockStressObjCtrlCmdPerformLockStressInternalNoGpusLockApiLockReadMode(pResource, pParams) lockStressObjCtrlCmdPerformLockStressInternalNoGpusLockApiLockReadMode_DISPATCH(pResource, pParams) +#define lockStressObjCtrlCmdGetLockStressCounters_FNPTR(pResource) pResource->__lockStressObjCtrlCmdGetLockStressCounters__ +#define lockStressObjCtrlCmdGetLockStressCounters(pResource, pParams) lockStressObjCtrlCmdGetLockStressCounters_DISPATCH(pResource, pParams) +#define lockStressObjControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define lockStressObjControl(pGpuResource, pCallContext, pParams) lockStressObjControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define lockStressObjMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define lockStressObjMap(pGpuResource, pCallContext, pParams, pCpuMapping) lockStressObjMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define lockStressObjUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define lockStressObjUnmap(pGpuResource, pCallContext, pCpuMapping) lockStressObjUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define lockStressObjShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define lockStressObjShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) lockStressObjShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) +#define lockStressObjGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define lockStressObjGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) lockStressObjGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define lockStressObjGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define lockStressObjGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) lockStressObjGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define lockStressObjInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define lockStressObjInternalControlForward(pGpuResource, command, pParams, size) lockStressObjInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) +#define lockStressObjGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define lockStressObjGetInternalObjectHandle(pGpuResource) lockStressObjGetInternalObjectHandle_DISPATCH(pGpuResource) +#define lockStressObjAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define lockStressObjAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) lockStressObjAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define lockStressObjGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define lockStressObjGetMemInterMapParams(pRmResource, pParams) lockStressObjGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define lockStressObjCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define lockStressObjCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) lockStressObjCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define lockStressObjGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define lockStressObjGetMemoryMappingDescriptor(pRmResource, ppMemDesc) lockStressObjGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) +#define lockStressObjControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define lockStressObjControlSerialization_Prologue(pResource, pCallContext, pParams) lockStressObjControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define lockStressObjControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define lockStressObjControlSerialization_Epilogue(pResource, pCallContext, pParams) lockStressObjControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define lockStressObjControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define lockStressObjControl_Prologue(pResource, pCallContext, pParams) lockStressObjControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define lockStressObjControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define lockStressObjControl_Epilogue(pResource, pCallContext, pParams) lockStressObjControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define lockStressObjCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define lockStressObjCanCopy(pResource) lockStressObjCanCopy_DISPATCH(pResource) +#define lockStressObjIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define lockStressObjIsDuplicate(pResource, hMemory, pDuplicate) lockStressObjIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define lockStressObjPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define lockStressObjPreDestruct(pResource) lockStressObjPreDestruct_DISPATCH(pResource) +#define lockStressObjControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define lockStressObjControlFilter(pResource, pCallContext, pParams) lockStressObjControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define lockStressObjIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define lockStressObjIsPartialUnmapSupported(pResource) lockStressObjIsPartialUnmapSupported_DISPATCH(pResource) +#define lockStressObjMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define lockStressObjMapTo(pResource, pParams) lockStressObjMapTo_DISPATCH(pResource, pParams) +#define lockStressObjUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define lockStressObjUnmapFrom(pResource, pParams) lockStressObjUnmapFrom_DISPATCH(pResource, pParams) +#define lockStressObjGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define lockStressObjGetRefCount(pResource) lockStressObjGetRefCount_DISPATCH(pResource) +#define lockStressObjAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define lockStressObjAddAdditionalDependants(pClient, pResource, pReference) lockStressObjAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) + +// Dispatch functions +static inline NV_STATUS lockStressObjCtrlCmdResetLockStressState_DISPATCH(struct LockStressObject *pResource) { + return pResource->__lockStressObjCtrlCmdResetLockStressState__(pResource); +} + +static inline NV_STATUS lockStressObjCtrlCmdPerformLockStressAllRmLocks_DISPATCH(struct LockStressObject *pResource, NV0100_CTRL_PERFORM_LOCK_STRESS_ALL_RM_LOCKS_PARAMS *pParams) { + return pResource->__lockStressObjCtrlCmdPerformLockStressAllRmLocks__(pResource, pParams); +} + +static inline NV_STATUS lockStressObjCtrlCmdPerformLockStressNoGpusLock_DISPATCH(struct LockStressObject *pResource, NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_PARAMS *pParams) { + return pResource->__lockStressObjCtrlCmdPerformLockStressNoGpusLock__(pResource, pParams); +} + +static inline NV_STATUS lockStressObjCtrlCmdPerformLockStressApiLockReadMode_DISPATCH(struct LockStressObject *pResource, NV0100_CTRL_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE_PARAMS *pParams) { + return pResource->__lockStressObjCtrlCmdPerformLockStressApiLockReadMode__(pResource, pParams); +} + +static inline NV_STATUS lockStressObjCtrlCmdPerformLockStressNoGpusLockApiLockReadMode_DISPATCH(struct LockStressObject *pResource, NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS *pParams) { + return pResource->__lockStressObjCtrlCmdPerformLockStressNoGpusLockApiLockReadMode__(pResource, pParams); +} + +static inline NV_STATUS lockStressObjCtrlCmdPerformLockStressInternalAllRmLocks_DISPATCH(struct LockStressObject *pResource, NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_ALL_RM_LOCKS_PARAMS *pParams) { + return pResource->__lockStressObjCtrlCmdPerformLockStressInternalAllRmLocks__(pResource, pParams); +} + +static inline NV_STATUS lockStressObjCtrlCmdPerformLockStressInternalNoGpusLock_DISPATCH(struct LockStressObject *pResource, NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_PARAMS *pParams) { + return pResource->__lockStressObjCtrlCmdPerformLockStressInternalNoGpusLock__(pResource, pParams); +} + +static inline NV_STATUS lockStressObjCtrlCmdPerformLockStressInternalApiLockReadMode_DISPATCH(struct LockStressObject *pResource, NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_API_LOCK_READ_MODE_PARAMS *pParams) { + return pResource->__lockStressObjCtrlCmdPerformLockStressInternalApiLockReadMode__(pResource, pParams); +} + +static inline NV_STATUS lockStressObjCtrlCmdPerformLockStressInternalNoGpusLockApiLockReadMode_DISPATCH(struct LockStressObject *pResource, NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS *pParams) { + return pResource->__lockStressObjCtrlCmdPerformLockStressInternalNoGpusLockApiLockReadMode__(pResource, pParams); +} + +static inline NV_STATUS lockStressObjCtrlCmdGetLockStressCounters_DISPATCH(struct LockStressObject *pResource, NV0100_CTRL_GET_LOCK_STRESS_COUNTERS_PARAMS *pParams) { + return pResource->__lockStressObjCtrlCmdGetLockStressCounters__(pResource, pParams); +} + +static inline NV_STATUS lockStressObjControl_DISPATCH(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__lockStressObjControl__(pGpuResource, pCallContext, pParams); +} + +static inline NV_STATUS lockStressObjMap_DISPATCH(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__lockStressObjMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +} + +static inline NV_STATUS lockStressObjUnmap_DISPATCH(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__lockStressObjUnmap__(pGpuResource, pCallContext, pCpuMapping); +} + +static inline NvBool lockStressObjShareCallback_DISPATCH(struct LockStressObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__lockStressObjShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +} + +static inline NV_STATUS lockStressObjGetRegBaseOffsetAndSize_DISPATCH(struct LockStressObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__lockStressObjGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +} + +static inline NV_STATUS lockStressObjGetMapAddrSpace_DISPATCH(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__lockStressObjGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +} + +static inline NV_STATUS lockStressObjInternalControlForward_DISPATCH(struct LockStressObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__lockStressObjInternalControlForward__(pGpuResource, command, pParams, size); +} + +static inline NvHandle lockStressObjGetInternalObjectHandle_DISPATCH(struct LockStressObject *pGpuResource) { + return pGpuResource->__lockStressObjGetInternalObjectHandle__(pGpuResource); +} + +static inline NvBool lockStressObjAccessCallback_DISPATCH(struct LockStressObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__lockStressObjAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +} + +static inline NV_STATUS lockStressObjGetMemInterMapParams_DISPATCH(struct LockStressObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__lockStressObjGetMemInterMapParams__(pRmResource, pParams); +} + +static inline NV_STATUS lockStressObjCheckMemInterUnmap_DISPATCH(struct LockStressObject *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__lockStressObjCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +} + +static inline NV_STATUS lockStressObjGetMemoryMappingDescriptor_DISPATCH(struct LockStressObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__lockStressObjGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +} + +static inline NV_STATUS lockStressObjControlSerialization_Prologue_DISPATCH(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__lockStressObjControlSerialization_Prologue__(pResource, pCallContext, pParams); +} + +static inline void lockStressObjControlSerialization_Epilogue_DISPATCH(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__lockStressObjControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS lockStressObjControl_Prologue_DISPATCH(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__lockStressObjControl_Prologue__(pResource, pCallContext, pParams); +} + +static inline void lockStressObjControl_Epilogue_DISPATCH(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__lockStressObjControl_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NvBool lockStressObjCanCopy_DISPATCH(struct LockStressObject *pResource) { + return pResource->__lockStressObjCanCopy__(pResource); +} + +static inline NV_STATUS lockStressObjIsDuplicate_DISPATCH(struct LockStressObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__lockStressObjIsDuplicate__(pResource, hMemory, pDuplicate); +} + +static inline void lockStressObjPreDestruct_DISPATCH(struct LockStressObject *pResource) { + pResource->__lockStressObjPreDestruct__(pResource); +} + +static inline NV_STATUS lockStressObjControlFilter_DISPATCH(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__lockStressObjControlFilter__(pResource, pCallContext, pParams); +} + +static inline NvBool lockStressObjIsPartialUnmapSupported_DISPATCH(struct LockStressObject *pResource) { + return pResource->__lockStressObjIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS lockStressObjMapTo_DISPATCH(struct LockStressObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__lockStressObjMapTo__(pResource, pParams); +} + +static inline NV_STATUS lockStressObjUnmapFrom_DISPATCH(struct LockStressObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__lockStressObjUnmapFrom__(pResource, pParams); +} + +static inline NvU32 lockStressObjGetRefCount_DISPATCH(struct LockStressObject *pResource) { + return pResource->__lockStressObjGetRefCount__(pResource); +} + +static inline void lockStressObjAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct LockStressObject *pResource, RsResourceRef *pReference) { + pResource->__lockStressObjAddAdditionalDependants__(pClient, pResource, pReference); +} + +NV_STATUS lockStressObjCtrlCmdResetLockStressState_IMPL(struct LockStressObject *pResource); + +NV_STATUS lockStressObjCtrlCmdPerformLockStressAllRmLocks_IMPL(struct LockStressObject *pResource, NV0100_CTRL_PERFORM_LOCK_STRESS_ALL_RM_LOCKS_PARAMS *pParams); + +NV_STATUS lockStressObjCtrlCmdPerformLockStressNoGpusLock_IMPL(struct LockStressObject *pResource, NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_PARAMS *pParams); + +NV_STATUS lockStressObjCtrlCmdPerformLockStressApiLockReadMode_IMPL(struct LockStressObject *pResource, NV0100_CTRL_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE_PARAMS *pParams); + +NV_STATUS lockStressObjCtrlCmdPerformLockStressNoGpusLockApiLockReadMode_IMPL(struct LockStressObject *pResource, NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS *pParams); + +NV_STATUS lockStressObjCtrlCmdPerformLockStressInternalAllRmLocks_IMPL(struct LockStressObject *pResource, NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_ALL_RM_LOCKS_PARAMS *pParams); + +NV_STATUS lockStressObjCtrlCmdPerformLockStressInternalNoGpusLock_IMPL(struct LockStressObject *pResource, NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_PARAMS *pParams); + +NV_STATUS lockStressObjCtrlCmdPerformLockStressInternalApiLockReadMode_IMPL(struct LockStressObject *pResource, NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_API_LOCK_READ_MODE_PARAMS *pParams); + +NV_STATUS lockStressObjCtrlCmdPerformLockStressInternalNoGpusLockApiLockReadMode_IMPL(struct LockStressObject *pResource, NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS *pParams); + +NV_STATUS lockStressObjCtrlCmdGetLockStressCounters_IMPL(struct LockStressObject *pResource, NV0100_CTRL_GET_LOCK_STRESS_COUNTERS_PARAMS *pParams); + +NV_STATUS lockStressObjConstruct_IMPL(struct LockStressObject *arg_pResource, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); + +#define __nvoc_lockStressObjConstruct(arg_pResource, arg_pCallContext, arg_pParams) lockStressObjConstruct_IMPL(arg_pResource, arg_pCallContext, arg_pParams) +void lockStressObjDestruct_IMPL(struct LockStressObject *pResource); + +#define __nvoc_lockStressObjDestruct(pResource) lockStressObjDestruct_IMPL(pResource) +#undef PRIVATE_FIELD + + +#endif // LOCK_STRESS_H + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // _G_LOCK_STRESS_NVOC_H_ diff --git a/src/nvidia/generated/g_mem_desc_nvoc.h b/src/nvidia/generated/g_mem_desc_nvoc.h index 2c2be85af6..7fed5b7e55 100644 --- a/src/nvidia/generated/g_mem_desc_nvoc.h +++ b/src/nvidia/generated/g_mem_desc_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_MEM_DESC_NVOC_H_ #define _G_MEM_DESC_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_mem_desc_nvoc.h" #ifndef _MEMDESC_H_ @@ -38,6 +46,7 @@ extern "C" { #include "poolalloc.h" + struct OBJVASPACE; #ifndef __NVOC_CLASS_OBJVASPACE_TYPEDEF__ @@ -50,6 +59,7 @@ typedef struct OBJVASPACE OBJVASPACE; #endif /* __nvoc_class_id_OBJVASPACE */ + struct OBJGPU; #ifndef __NVOC_CLASS_OBJGPU_TYPEDEF__ @@ -62,6 +72,7 @@ typedef struct OBJGPU OBJGPU; #endif /* __nvoc_class_id_OBJGPU */ + struct Heap; #ifndef __NVOC_CLASS_Heap_TYPEDEF__ @@ -74,6 +85,19 @@ typedef struct Heap Heap; #endif /* __nvoc_class_id_Heap */ + +struct RsClient; + +#ifndef __NVOC_CLASS_RsClient_TYPEDEF__ +#define __NVOC_CLASS_RsClient_TYPEDEF__ +typedef struct RsClient RsClient; +#endif /* __NVOC_CLASS_RsClient_TYPEDEF__ */ + +#ifndef __nvoc_class_id_RsClient +#define __nvoc_class_id_RsClient 0x8f87e5 +#endif /* __nvoc_class_id_RsClient */ + + struct MEMORY_DESCRIPTOR; typedef struct CTX_BUF_POOL_INFO CTX_BUF_POOL_INFO; @@ -342,7 +366,7 @@ typedef enum NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_126 = 159U, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_127 = 160U, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_128 = 161U, - NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_129 = 162U, + NV_FB_ALLOC_RM_INTERNAL_OWNER_FBSR_CE_TEST_BUFFER = 162U, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_130 = 163U, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_131 = 164U, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_132 = 165U, @@ -358,11 +382,11 @@ typedef enum NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_142 = 175U, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_143 = 176U, NV_FB_ALLOC_RM_INTERNAL_OWNER_GSP_NOTIFY_OP_SURFACE = 177U, - + NV_FB_ALLOC_RM_INTERNAL_OWNER_FAKE_WPR_RSVD = 178U, + // // Unused tags from here, for any new use-case it's required // to replace the below tags with known verbose strings // - NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_145 = 178U, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_146 = 179U, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_147 = 180U, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_148 = 181U, @@ -891,8 +915,8 @@ NvBool memdescAcquireRmExclusiveUse(MEMORY_DESCRIPTOR *pMemDesc); NV_STATUS memdescFillMemdescForPhysAttr(MEMORY_DESCRIPTOR *pMemDesc, ADDRESS_TRANSLATION addressTranslation, NvU64 *pOffset,NvU32 *pMemAperture, NvU32 *pMemKind, NvU32 *pZCullId, NvU32 *pGpuCacheAttr, NvU32 *pGpuP2PCacheAttr, NvU64 *contigSegmentSize); - NvBool memdescIsEgm(MEMORY_DESCRIPTOR *pMemDesc); + /*! * @brief Get PTE kind * @@ -1155,36 +1179,11 @@ void memdescOverrideInstLocList(NvU32 loc, const char *name, const NV_ADDRESS_SP */ void memdescOverridePhysicalAddressWidthWindowsWAR(OBJGPU *pGpu, MEMORY_DESCRIPTOR *pMemDesc, NvU32 addressWidth); -/*! -* @brief Register memory descriptor referenced by hMemory in CPU-RM to GSP -* -* @param[in] pGpu OBJGPU pointer -* @param[in] hClient client handled -* @param[in] hSubDevice subdevice handle -* @param[in] hMemory memory handle -* -* @returns NV_STATUS -*/ -NV_STATUS memdescRegisterToGSP(OBJGPU *pGpu, NvHandle hClient, NvHandle hParent, NvHandle hMemory); - -/*! -* @brief Deregister memory descriptor referenced by hMemory in CPU-RM from GSP -* -* @param[in] pGpu OBJGPU pointer -* @param[in] hClient client handled -* @param[in] hSubDevice subdevice handle -* @param[in] hMemory memory handle -* -* @returns NV_STATUS -*/ - -NV_STATUS memdescDeregisterFromGSP(OBJGPU *pGpu, NvHandle hClient, NvHandle hParent, NvHandle hMemory); - /*! * @brief Send memory descriptor from CPU-RM to GSP * * This function will create a MemoryList object with the MEMORY_DESCRIPTOR information on CPU-RM -* It will then use memdescRegisterToGSP API to create a corresponding MemoryList object on GSP-RM +* It will then use memRegisterWithGsp API to create a corresponding MemoryList object on GSP-RM * with the same Handle as that on CPU-RM * * This MemoryList object has the same MEMORY_DESCRIPTOR info as the input pMemDesc @@ -1341,6 +1340,8 @@ void memdescSetName(OBJGPU*, MEMORY_DESCRIPTOR *pMemDesc, const char *name, cons // created using NV01_MEMORY_LIST_SYSTEM, NV01_MEMORY_LIST_FBMEM or NV01_MEMORY_LIST_OBJECT. #define MEMDESC_FLAGS_LIST_MEMORY NVBIT64(34) +// unused NVBIT64(35) + // This flag is used to denote that this memdesc is allocated from // a context buffer pool. When this flag is set, we expect a pointer // to this context buffer pool to be cached in memdesc. @@ -1353,7 +1354,7 @@ void memdescSetName(OBJGPU*, MEMORY_DESCRIPTOR *pMemDesc, const char *name, cons #define MEMDESC_FLAGS_SKIP_REGMEM_PRIV_CHECK NVBIT64(37) // This flag denotes the memory descriptor of type Display non iso -#define MEMDESC_FLAGS_MEMORY_TYPE_DISPLAY_NISO NVBIT64(38) +#define MEMDESC_FLAGS_MEMORY_TYPE_DISPLAY_NISO NVBIT64(38) // This flag is used to force mapping of coherent sysmem through // the GMMU over BAR1. This is useful when we need some form @@ -1369,10 +1370,7 @@ void memdescSetName(OBJGPU*, MEMORY_DESCRIPTOR *pMemDesc, const char *name, cons // 32-bit addressable. #define MEMDESC_FLAGS_ALLOC_32BIT_ADDRESSABLE NVBIT64(41) -// -// If this flag is set, the memory is registered in GSP -// -#define MEMDESC_FLAGS_REGISTERED_TO_GSP NVBIT64(42) +// unused NVBIT64(42) // // If this flag is set then it indicates that the memory associated with @@ -1384,12 +1382,12 @@ void memdescSetName(OBJGPU*, MEMORY_DESCRIPTOR *pMemDesc, const char *name, cons // Indicates that this memdesc is tracking client sysmem allocation as // against RM internal sysmem allocation // -#define MEMDESC_FLAGS_SYSMEM_OWNED_BY_CLIENT NVBIT64(44) +#define MEMDESC_FLAGS_SYSMEM_OWNED_BY_CLIENT NVBIT64(44) // // Clients (including RM) should set this flag to request allocations in // unprotected memory. This is required for Confidential Compute cases // -#define MEMDESC_FLAGS_ALLOC_IN_UNPROTECTED_MEMORY NVBIT64(45) +#define MEMDESC_FLAGS_ALLOC_IN_UNPROTECTED_MEMORY NVBIT64(45) // // The following is a special use case for sharing memory between @@ -1397,26 +1395,26 @@ void memdescSetName(OBJGPU*, MEMORY_DESCRIPTOR *pMemDesc, const char *name, cons // currently for this, so a WAR is required for r515. The intent // is to remove this by r525. // -#define MEMDESC_FLAGS_WSL_SHARED_MEMORY NVBIT64(46) +#define MEMDESC_FLAGS_WSL_SHARED_MEMORY NVBIT64(46) // // Skip IOMMU mapping creation during alloc for sysmem. // A mapping might be requested later with custom parameters. // -#define MEMDESC_FLAGS_SKIP_IOMMU_MAPPING NVBIT64(47) +#define MEMDESC_FLAGS_SKIP_IOMMU_MAPPING NVBIT64(47) // // Specical case to allocate the runlists for Guests from its GPA // In MODS, VM's GPA allocated from subheap so using this define to // Forcing memdesc to allocated from subheap // -#define MEMDESC_FLAGS_FORCE_ALLOC_FROM_SUBHEAP NVBIT64(48) +#define MEMDESC_FLAGS_FORCE_ALLOC_FROM_SUBHEAP NVBIT64(48) // // Indicate if memdesc needs to restore pte kind in the static bar1 mode // when it is freed. // -#define MEMDESC_FLAGS_RESTORE_PTE_KIND_ON_FREE NVBIT64(49) +#define MEMDESC_FLAGS_RESTORE_PTE_KIND_ON_FREE NVBIT64(49) #endif // _MEMDESC_H_ diff --git a/src/nvidia/generated/g_mem_export_nvoc.c b/src/nvidia/generated/g_mem_export_nvoc.c index 170454fe8c..d79913cf72 100644 --- a/src/nvidia/generated/g_mem_export_nvoc.c +++ b/src/nvidia/generated/g_mem_export_nvoc.c @@ -84,90 +84,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryExport = /*pExportInfo=*/ &__nvoc_export_info_MemoryExport }; -static NvBool __nvoc_thunk_MemoryExport_resCanCopy(struct RsResource *pMemoryExport) { - return memoryexportCanCopy((struct MemoryExport *)(((unsigned char *)pMemoryExport) - __nvoc_rtti_MemoryExport_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_MemoryExport_resControl(struct RsResource *pMemoryExport, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memoryexportControl((struct MemoryExport *)(((unsigned char *)pMemoryExport) - __nvoc_rtti_MemoryExport_RsResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RmResource_memoryexportShareCallback(struct MemoryExport *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_memoryexportCheckMemInterUnmap(struct MemoryExport *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MemoryExport_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RmResource_memoryexportGetMemInterMapParams(struct MemoryExport *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_memoryexportGetMemoryMappingDescriptor(struct MemoryExport *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MemoryExport_RmResource.offset), ppMemDesc); -} - -static NvU32 __nvoc_thunk_RsResource_memoryexportGetRefCount(struct MemoryExport *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryExport_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_memoryexportControlFilter(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), pCallContext, pParams); -} - -static void __nvoc_thunk_RsResource_memoryexportAddAdditionalDependants(struct RsClient *pClient, struct MemoryExport *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_memoryexportControlSerialization_Prologue(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_memoryexportControl_Prologue(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_memoryexportUnmap(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), pCallContext, pCpuMapping); -} - -static NvBool __nvoc_thunk_RsResource_memoryexportIsPartialUnmapSupported(struct MemoryExport *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryExport_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_memoryexportPreDestruct(struct MemoryExport *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryExport_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_memoryexportMapTo(struct MemoryExport *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_memoryexportIsDuplicate(struct MemoryExport *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_memoryexportControlSerialization_Epilogue(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pCallContext, pParams); -} - -static void __nvoc_thunk_RmResource_memoryexportControl_Epilogue(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_memoryexportUnmapFrom(struct MemoryExport *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_memoryexportMap(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_memoryexportAccessCallback(struct MemoryExport *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -175,12 +91,12 @@ static NvBool __nvoc_thunk_RmResource_memoryexportAccessCallback(struct MemoryEx static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryExport[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memoryexportCtrlExportMem_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0xe00101u, /*paramSize=*/ sizeof(NV00E0_CTRL_EXPORT_MEM_PARAMS), @@ -190,12 +106,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryEx #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memoryexportCtrlImportMem_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0xe00102u, /*paramSize=*/ sizeof(NV00E0_CTRL_IMPORT_MEM_PARAMS), @@ -205,12 +121,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryEx #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memoryexportCtrlGetInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, /*accessRight=*/0x0u, /*methodId=*/ 0xe00103u, /*paramSize=*/ sizeof(NV00E0_CTRL_GET_INFO_PARAMS), @@ -222,6 +138,117 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryEx }; +// 2 down-thunk(s) defined to bridge methods in MemoryExport from superclasses + +// memoryexportCanCopy: virtual override (res) base (rmres) +static NvBool __nvoc_down_thunk_MemoryExport_resCanCopy(struct RsResource *pMemoryExport) { + return memoryexportCanCopy((struct MemoryExport *)(((unsigned char *) pMemoryExport) - __nvoc_rtti_MemoryExport_RsResource.offset)); +} + +// memoryexportControl: virtual override (res) base (rmres) +static NV_STATUS __nvoc_down_thunk_MemoryExport_resControl(struct RsResource *pMemoryExport, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memoryexportControl((struct MemoryExport *)(((unsigned char *) pMemoryExport) - __nvoc_rtti_MemoryExport_RsResource.offset), pCallContext, pParams); +} + + +// 19 up-thunk(s) defined to bridge methods in MemoryExport to superclasses + +// memoryexportAccessCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_memoryexportAccessCallback(struct MemoryExport *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// memoryexportShareCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_memoryexportShareCallback(struct MemoryExport *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// memoryexportGetMemInterMapParams: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_memoryexportGetMemInterMapParams(struct MemoryExport *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pParams); +} + +// memoryexportCheckMemInterUnmap: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_memoryexportCheckMemInterUnmap(struct MemoryExport *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MemoryExport_RmResource.offset), bSubdeviceHandleProvided); +} + +// memoryexportGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_memoryexportGetMemoryMappingDescriptor(struct MemoryExport *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MemoryExport_RmResource.offset), ppMemDesc); +} + +// memoryexportControlSerialization_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_memoryexportControlSerialization_Prologue(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pCallContext, pParams); +} + +// memoryexportControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_memoryexportControlSerialization_Epilogue(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pCallContext, pParams); +} + +// memoryexportControl_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_memoryexportControl_Prologue(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pCallContext, pParams); +} + +// memoryexportControl_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_memoryexportControl_Epilogue(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pCallContext, pParams); +} + +// memoryexportIsDuplicate: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_memoryexportIsDuplicate(struct MemoryExport *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), hMemory, pDuplicate); +} + +// memoryexportPreDestruct: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_memoryexportPreDestruct(struct MemoryExport *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RsResource.offset)); +} + +// memoryexportControlFilter: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_memoryexportControlFilter(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), pCallContext, pParams); +} + +// memoryexportMap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_memoryexportMap(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), pCallContext, pParams, pCpuMapping); +} + +// memoryexportUnmap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_memoryexportUnmap(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), pCallContext, pCpuMapping); +} + +// memoryexportIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body +static NvBool __nvoc_up_thunk_RsResource_memoryexportIsPartialUnmapSupported(struct MemoryExport *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RsResource.offset)); +} + +// memoryexportMapTo: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_memoryexportMapTo(struct MemoryExport *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), pParams); +} + +// memoryexportUnmapFrom: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_memoryexportUnmapFrom(struct MemoryExport *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), pParams); +} + +// memoryexportGetRefCount: virtual inherited (res) base (rmres) +static NvU32 __nvoc_up_thunk_RsResource_memoryexportGetRefCount(struct MemoryExport *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RsResource.offset)); +} + +// memoryexportAddAdditionalDependants: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_memoryexportAddAdditionalDependants(struct RsClient *pClient, struct MemoryExport *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), pReference); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_MemoryExport = { /*numEntries=*/ 3, @@ -258,69 +285,96 @@ NV_STATUS __nvoc_ctor_MemoryExport(MemoryExport *pThis, struct CALL_CONTEXT * ar return status; } +// Vtable initialization static void __nvoc_init_funcTable_MemoryExport_1(MemoryExport *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // memoryexportCanCopy -- virtual override (res) base (rmres) pThis->__memoryexportCanCopy__ = &memoryexportCanCopy_IMPL; + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryExport_resCanCopy; + // memoryexportControl -- virtual override (res) base (rmres) pThis->__memoryexportControl__ = &memoryexportControl_IMPL; + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ = &__nvoc_down_thunk_MemoryExport_resControl; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // memoryexportCtrlExportMem -- exported (id=0xe00101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__memoryexportCtrlExportMem__ = &memoryexportCtrlExportMem_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // memoryexportCtrlImportMem -- exported (id=0xe00102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__memoryexportCtrlImportMem__ = &memoryexportCtrlImportMem_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // memoryexportCtrlGetInfo -- exported (id=0xe00103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__memoryexportCtrlGetInfo__ = &memoryexportCtrlGetInfo_IMPL; #endif - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_MemoryExport_resCanCopy; + // memoryexportAccessCallback -- virtual inherited (rmres) base (rmres) + pThis->__memoryexportAccessCallback__ = &__nvoc_up_thunk_RmResource_memoryexportAccessCallback; - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ = &__nvoc_thunk_MemoryExport_resControl; + // memoryexportShareCallback -- virtual inherited (rmres) base (rmres) + pThis->__memoryexportShareCallback__ = &__nvoc_up_thunk_RmResource_memoryexportShareCallback; - pThis->__memoryexportShareCallback__ = &__nvoc_thunk_RmResource_memoryexportShareCallback; + // memoryexportGetMemInterMapParams -- virtual inherited (rmres) base (rmres) + pThis->__memoryexportGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_memoryexportGetMemInterMapParams; - pThis->__memoryexportCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_memoryexportCheckMemInterUnmap; + // memoryexportCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) + pThis->__memoryexportCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_memoryexportCheckMemInterUnmap; - pThis->__memoryexportGetMemInterMapParams__ = &__nvoc_thunk_RmResource_memoryexportGetMemInterMapParams; + // memoryexportGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) + pThis->__memoryexportGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_memoryexportGetMemoryMappingDescriptor; - pThis->__memoryexportGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_memoryexportGetMemoryMappingDescriptor; + // memoryexportControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__memoryexportControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memoryexportControlSerialization_Prologue; - pThis->__memoryexportGetRefCount__ = &__nvoc_thunk_RsResource_memoryexportGetRefCount; + // memoryexportControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__memoryexportControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryexportControlSerialization_Epilogue; - pThis->__memoryexportControlFilter__ = &__nvoc_thunk_RsResource_memoryexportControlFilter; + // memoryexportControl_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__memoryexportControl_Prologue__ = &__nvoc_up_thunk_RmResource_memoryexportControl_Prologue; - pThis->__memoryexportAddAdditionalDependants__ = &__nvoc_thunk_RsResource_memoryexportAddAdditionalDependants; + // memoryexportControl_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__memoryexportControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryexportControl_Epilogue; - pThis->__memoryexportControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_memoryexportControlSerialization_Prologue; + // memoryexportIsDuplicate -- virtual inherited (res) base (rmres) + pThis->__memoryexportIsDuplicate__ = &__nvoc_up_thunk_RsResource_memoryexportIsDuplicate; - pThis->__memoryexportControl_Prologue__ = &__nvoc_thunk_RmResource_memoryexportControl_Prologue; + // memoryexportPreDestruct -- virtual inherited (res) base (rmres) + pThis->__memoryexportPreDestruct__ = &__nvoc_up_thunk_RsResource_memoryexportPreDestruct; - pThis->__memoryexportUnmap__ = &__nvoc_thunk_RsResource_memoryexportUnmap; + // memoryexportControlFilter -- virtual inherited (res) base (rmres) + pThis->__memoryexportControlFilter__ = &__nvoc_up_thunk_RsResource_memoryexportControlFilter; - pThis->__memoryexportIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_memoryexportIsPartialUnmapSupported; + // memoryexportMap -- virtual inherited (res) base (rmres) + pThis->__memoryexportMap__ = &__nvoc_up_thunk_RsResource_memoryexportMap; - pThis->__memoryexportPreDestruct__ = &__nvoc_thunk_RsResource_memoryexportPreDestruct; + // memoryexportUnmap -- virtual inherited (res) base (rmres) + pThis->__memoryexportUnmap__ = &__nvoc_up_thunk_RsResource_memoryexportUnmap; - pThis->__memoryexportMapTo__ = &__nvoc_thunk_RsResource_memoryexportMapTo; + // memoryexportIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body + pThis->__memoryexportIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memoryexportIsPartialUnmapSupported; - pThis->__memoryexportIsDuplicate__ = &__nvoc_thunk_RsResource_memoryexportIsDuplicate; + // memoryexportMapTo -- virtual inherited (res) base (rmres) + pThis->__memoryexportMapTo__ = &__nvoc_up_thunk_RsResource_memoryexportMapTo; - pThis->__memoryexportControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_memoryexportControlSerialization_Epilogue; + // memoryexportUnmapFrom -- virtual inherited (res) base (rmres) + pThis->__memoryexportUnmapFrom__ = &__nvoc_up_thunk_RsResource_memoryexportUnmapFrom; - pThis->__memoryexportControl_Epilogue__ = &__nvoc_thunk_RmResource_memoryexportControl_Epilogue; + // memoryexportGetRefCount -- virtual inherited (res) base (rmres) + pThis->__memoryexportGetRefCount__ = &__nvoc_up_thunk_RsResource_memoryexportGetRefCount; - pThis->__memoryexportUnmapFrom__ = &__nvoc_thunk_RsResource_memoryexportUnmapFrom; + // memoryexportAddAdditionalDependants -- virtual inherited (res) base (rmres) + pThis->__memoryexportAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memoryexportAddAdditionalDependants; +} // End __nvoc_init_funcTable_MemoryExport_1 with approximately 26 basic block(s). - pThis->__memoryexportMap__ = &__nvoc_thunk_RsResource_memoryexportMap; - - pThis->__memoryexportAccessCallback__ = &__nvoc_thunk_RmResource_memoryexportAccessCallback; -} +// Initialize vtable(s) for 24 virtual method(s). void __nvoc_init_funcTable_MemoryExport(MemoryExport *pThis) { + + // Initialize vtable(s) with 24 per-object function pointer(s). __nvoc_init_funcTable_MemoryExport_1(pThis); } diff --git a/src/nvidia/generated/g_mem_export_nvoc.h b/src/nvidia/generated/g_mem_export_nvoc.h index 1076fb4b20..4dc2df2466 100644 --- a/src/nvidia/generated/g_mem_export_nvoc.h +++ b/src/nvidia/generated/g_mem_export_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_MEM_EXPORT_NVOC_H_ #define _G_MEM_EXPORT_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -36,6 +43,7 @@ extern "C" { * *****************************************************************************/ +#pragma once #include "g_mem_export_nvoc.h" #ifndef _MEMORYEXPORT_H_ @@ -63,38 +71,49 @@ typedef struct mem_export_info MEM_EXPORT_INFO; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct MemoryExport { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct MemoryExport *__nvoc_pbase_MemoryExport; - NvBool (*__memoryexportCanCopy__)(struct MemoryExport *); - NV_STATUS (*__memoryexportControl__)(struct MemoryExport *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memoryexportCtrlExportMem__)(struct MemoryExport *, NV00E0_CTRL_EXPORT_MEM_PARAMS *); - NV_STATUS (*__memoryexportCtrlImportMem__)(struct MemoryExport *, NV00E0_CTRL_IMPORT_MEM_PARAMS *); - NV_STATUS (*__memoryexportCtrlGetInfo__)(struct MemoryExport *, NV00E0_CTRL_GET_INFO_PARAMS *); - NvBool (*__memoryexportShareCallback__)(struct MemoryExport *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__memoryexportCheckMemInterUnmap__)(struct MemoryExport *, NvBool); - NV_STATUS (*__memoryexportGetMemInterMapParams__)(struct MemoryExport *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__memoryexportGetMemoryMappingDescriptor__)(struct MemoryExport *, struct MEMORY_DESCRIPTOR **); - NvU32 (*__memoryexportGetRefCount__)(struct MemoryExport *); - NV_STATUS (*__memoryexportControlFilter__)(struct MemoryExport *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__memoryexportAddAdditionalDependants__)(struct RsClient *, struct MemoryExport *, RsResourceRef *); - NV_STATUS (*__memoryexportControlSerialization_Prologue__)(struct MemoryExport *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memoryexportControl_Prologue__)(struct MemoryExport *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memoryexportUnmap__)(struct MemoryExport *, struct CALL_CONTEXT *, RsCpuMapping *); - NvBool (*__memoryexportIsPartialUnmapSupported__)(struct MemoryExport *); - void (*__memoryexportPreDestruct__)(struct MemoryExport *); - NV_STATUS (*__memoryexportMapTo__)(struct MemoryExport *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__memoryexportIsDuplicate__)(struct MemoryExport *, NvHandle, NvBool *); - void (*__memoryexportControlSerialization_Epilogue__)(struct MemoryExport *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__memoryexportControl_Epilogue__)(struct MemoryExport *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memoryexportUnmapFrom__)(struct MemoryExport *, RS_RES_UNMAP_FROM_PARAMS *); - NV_STATUS (*__memoryexportMap__)(struct MemoryExport *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__memoryexportAccessCallback__)(struct MemoryExport *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^3 + struct RsResource *__nvoc_pbase_RsResource; // res super^2 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^2 + struct RmResource *__nvoc_pbase_RmResource; // rmres super + struct MemoryExport *__nvoc_pbase_MemoryExport; // memoryexport + + // Vtable with 24 per-object function pointers + NvBool (*__memoryexportCanCopy__)(struct MemoryExport * /*this*/); // virtual override (res) base (rmres) + NV_STATUS (*__memoryexportControl__)(struct MemoryExport * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (rmres) + NV_STATUS (*__memoryexportCtrlExportMem__)(struct MemoryExport * /*this*/, NV00E0_CTRL_EXPORT_MEM_PARAMS *); // exported (id=0xe00101) + NV_STATUS (*__memoryexportCtrlImportMem__)(struct MemoryExport * /*this*/, NV00E0_CTRL_IMPORT_MEM_PARAMS *); // exported (id=0xe00102) + NV_STATUS (*__memoryexportCtrlGetInfo__)(struct MemoryExport * /*this*/, NV00E0_CTRL_GET_INFO_PARAMS *); // exported (id=0xe00103) + NvBool (*__memoryexportAccessCallback__)(struct MemoryExport * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) + NvBool (*__memoryexportShareCallback__)(struct MemoryExport * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__memoryexportGetMemInterMapParams__)(struct MemoryExport * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__memoryexportCheckMemInterUnmap__)(struct MemoryExport * /*this*/, NvBool); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__memoryexportGetMemoryMappingDescriptor__)(struct MemoryExport * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__memoryexportControlSerialization_Prologue__)(struct MemoryExport * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__memoryexportControlSerialization_Epilogue__)(struct MemoryExport * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__memoryexportControl_Prologue__)(struct MemoryExport * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__memoryexportControl_Epilogue__)(struct MemoryExport * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__memoryexportIsDuplicate__)(struct MemoryExport * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (rmres) + void (*__memoryexportPreDestruct__)(struct MemoryExport * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__memoryexportControlFilter__)(struct MemoryExport * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__memoryexportMap__)(struct MemoryExport * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NV_STATUS (*__memoryexportUnmap__)(struct MemoryExport * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NvBool (*__memoryexportIsPartialUnmapSupported__)(struct MemoryExport * /*this*/); // inline virtual inherited (res) base (rmres) body + NV_STATUS (*__memoryexportMapTo__)(struct MemoryExport * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) + NV_STATUS (*__memoryexportUnmapFrom__)(struct MemoryExport * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) + NvU32 (*__memoryexportGetRefCount__)(struct MemoryExport * /*this*/); // virtual inherited (res) base (rmres) + void (*__memoryexportAddAdditionalDependants__)(struct RsClient *, struct MemoryExport * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) + + // Data members MEM_EXPORT_INFO *PRIVATE_FIELD(pExportInfo); }; @@ -107,6 +126,7 @@ typedef struct MemoryExport MemoryExport; #define __nvoc_class_id_MemoryExport 0xe7ac53 #endif /* __nvoc_class_id_MemoryExport */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryExport; #define __staticCast_MemoryExport(pThis) \ @@ -119,143 +139,170 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryExport; ((MemoryExport*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(MemoryExport))) #endif //__nvoc_mem_export_h_disabled - NV_STATUS __nvoc_objCreateDynamic_MemoryExport(MemoryExport**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_MemoryExport(MemoryExport**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_MemoryExport(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_MemoryExport((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define memoryexportCanCopy_FNPTR(pMemoryExport) pMemoryExport->__memoryexportCanCopy__ #define memoryexportCanCopy(pMemoryExport) memoryexportCanCopy_DISPATCH(pMemoryExport) +#define memoryexportControl_FNPTR(pMemoryExport) pMemoryExport->__memoryexportControl__ #define memoryexportControl(pMemoryExport, pCallContext, pParams) memoryexportControl_DISPATCH(pMemoryExport, pCallContext, pParams) +#define memoryexportCtrlExportMem_FNPTR(pMemoryExport) pMemoryExport->__memoryexportCtrlExportMem__ #define memoryexportCtrlExportMem(pMemoryExport, pParams) memoryexportCtrlExportMem_DISPATCH(pMemoryExport, pParams) +#define memoryexportCtrlImportMem_FNPTR(pMemoryExport) pMemoryExport->__memoryexportCtrlImportMem__ #define memoryexportCtrlImportMem(pMemoryExport, pParams) memoryexportCtrlImportMem_DISPATCH(pMemoryExport, pParams) +#define memoryexportCtrlGetInfo_FNPTR(pMemoryExport) pMemoryExport->__memoryexportCtrlGetInfo__ #define memoryexportCtrlGetInfo(pMemoryExport, pParams) memoryexportCtrlGetInfo_DISPATCH(pMemoryExport, pParams) +#define memoryexportAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define memoryexportAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memoryexportAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define memoryexportShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ #define memoryexportShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) memoryexportShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define memoryexportCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) memoryexportCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define memoryexportGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define memoryexportGetMemInterMapParams(pRmResource, pParams) memoryexportGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define memoryexportCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define memoryexportCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) memoryexportCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define memoryexportGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define memoryexportGetMemoryMappingDescriptor(pRmResource, ppMemDesc) memoryexportGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define memoryexportGetRefCount(pResource) memoryexportGetRefCount_DISPATCH(pResource) -#define memoryexportControlFilter(pResource, pCallContext, pParams) memoryexportControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define memoryexportAddAdditionalDependants(pClient, pResource, pReference) memoryexportAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define memoryexportControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define memoryexportControlSerialization_Prologue(pResource, pCallContext, pParams) memoryexportControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define memoryexportControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define memoryexportControlSerialization_Epilogue(pResource, pCallContext, pParams) memoryexportControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define memoryexportControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ #define memoryexportControl_Prologue(pResource, pCallContext, pParams) memoryexportControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define memoryexportControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define memoryexportControl_Epilogue(pResource, pCallContext, pParams) memoryexportControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define memoryexportIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define memoryexportIsDuplicate(pResource, hMemory, pDuplicate) memoryexportIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define memoryexportPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define memoryexportPreDestruct(pResource) memoryexportPreDestruct_DISPATCH(pResource) +#define memoryexportControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define memoryexportControlFilter(pResource, pCallContext, pParams) memoryexportControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define memoryexportMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define memoryexportMap(pResource, pCallContext, pParams, pCpuMapping) memoryexportMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define memoryexportUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ #define memoryexportUnmap(pResource, pCallContext, pCpuMapping) memoryexportUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define memoryexportIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ #define memoryexportIsPartialUnmapSupported(pResource) memoryexportIsPartialUnmapSupported_DISPATCH(pResource) -#define memoryexportPreDestruct(pResource) memoryexportPreDestruct_DISPATCH(pResource) +#define memoryexportMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ #define memoryexportMapTo(pResource, pParams) memoryexportMapTo_DISPATCH(pResource, pParams) -#define memoryexportIsDuplicate(pResource, hMemory, pDuplicate) memoryexportIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define memoryexportControlSerialization_Epilogue(pResource, pCallContext, pParams) memoryexportControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memoryexportControl_Epilogue(pResource, pCallContext, pParams) memoryexportControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define memoryexportUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ #define memoryexportUnmapFrom(pResource, pParams) memoryexportUnmapFrom_DISPATCH(pResource, pParams) -#define memoryexportMap(pResource, pCallContext, pParams, pCpuMapping) memoryexportMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define memoryexportAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memoryexportAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool memoryexportCanCopy_IMPL(struct MemoryExport *pMemoryExport); +#define memoryexportGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define memoryexportGetRefCount(pResource) memoryexportGetRefCount_DISPATCH(pResource) +#define memoryexportAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define memoryexportAddAdditionalDependants(pClient, pResource, pReference) memoryexportAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NvBool memoryexportCanCopy_DISPATCH(struct MemoryExport *pMemoryExport) { return pMemoryExport->__memoryexportCanCopy__(pMemoryExport); } -NV_STATUS memoryexportControl_IMPL(struct MemoryExport *pMemoryExport, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline NV_STATUS memoryexportControl_DISPATCH(struct MemoryExport *pMemoryExport, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pMemoryExport->__memoryexportControl__(pMemoryExport, pCallContext, pParams); } -NV_STATUS memoryexportCtrlExportMem_IMPL(struct MemoryExport *pMemoryExport, NV00E0_CTRL_EXPORT_MEM_PARAMS *pParams); - static inline NV_STATUS memoryexportCtrlExportMem_DISPATCH(struct MemoryExport *pMemoryExport, NV00E0_CTRL_EXPORT_MEM_PARAMS *pParams) { return pMemoryExport->__memoryexportCtrlExportMem__(pMemoryExport, pParams); } -NV_STATUS memoryexportCtrlImportMem_IMPL(struct MemoryExport *pMemoryExport, NV00E0_CTRL_IMPORT_MEM_PARAMS *pParams); - static inline NV_STATUS memoryexportCtrlImportMem_DISPATCH(struct MemoryExport *pMemoryExport, NV00E0_CTRL_IMPORT_MEM_PARAMS *pParams) { return pMemoryExport->__memoryexportCtrlImportMem__(pMemoryExport, pParams); } -NV_STATUS memoryexportCtrlGetInfo_IMPL(struct MemoryExport *pMemoryExport, NV00E0_CTRL_GET_INFO_PARAMS *pParams); - static inline NV_STATUS memoryexportCtrlGetInfo_DISPATCH(struct MemoryExport *pMemoryExport, NV00E0_CTRL_GET_INFO_PARAMS *pParams) { return pMemoryExport->__memoryexportCtrlGetInfo__(pMemoryExport, pParams); } -static inline NvBool memoryexportShareCallback_DISPATCH(struct MemoryExport *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__memoryexportShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NvBool memoryexportAccessCallback_DISPATCH(struct MemoryExport *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__memoryexportAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS memoryexportCheckMemInterUnmap_DISPATCH(struct MemoryExport *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__memoryexportCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NvBool memoryexportShareCallback_DISPATCH(struct MemoryExport *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__memoryexportShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS memoryexportGetMemInterMapParams_DISPATCH(struct MemoryExport *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__memoryexportGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS memoryexportGetMemoryMappingDescriptor_DISPATCH(struct MemoryExport *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__memoryexportGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); -} - -static inline NvU32 memoryexportGetRefCount_DISPATCH(struct MemoryExport *pResource) { - return pResource->__memoryexportGetRefCount__(pResource); -} - -static inline NV_STATUS memoryexportControlFilter_DISPATCH(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryexportControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS memoryexportCheckMemInterUnmap_DISPATCH(struct MemoryExport *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__memoryexportCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline void memoryexportAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryExport *pResource, RsResourceRef *pReference) { - pResource->__memoryexportAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS memoryexportGetMemoryMappingDescriptor_DISPATCH(struct MemoryExport *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__memoryexportGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS memoryexportControlSerialization_Prologue_DISPATCH(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__memoryexportControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void memoryexportControlSerialization_Epilogue_DISPATCH(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__memoryexportControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + static inline NV_STATUS memoryexportControl_Prologue_DISPATCH(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__memoryexportControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS memoryexportUnmap_DISPATCH(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__memoryexportUnmap__(pResource, pCallContext, pCpuMapping); +static inline void memoryexportControl_Epilogue_DISPATCH(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__memoryexportControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NvBool memoryexportIsPartialUnmapSupported_DISPATCH(struct MemoryExport *pResource) { - return pResource->__memoryexportIsPartialUnmapSupported__(pResource); +static inline NV_STATUS memoryexportIsDuplicate_DISPATCH(struct MemoryExport *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__memoryexportIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void memoryexportPreDestruct_DISPATCH(struct MemoryExport *pResource) { pResource->__memoryexportPreDestruct__(pResource); } -static inline NV_STATUS memoryexportMapTo_DISPATCH(struct MemoryExport *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__memoryexportMapTo__(pResource, pParams); +static inline NV_STATUS memoryexportControlFilter_DISPATCH(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__memoryexportControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS memoryexportIsDuplicate_DISPATCH(struct MemoryExport *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__memoryexportIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS memoryexportMap_DISPATCH(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__memoryexportMap__(pResource, pCallContext, pParams, pCpuMapping); } -static inline void memoryexportControlSerialization_Epilogue_DISPATCH(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memoryexportControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS memoryexportUnmap_DISPATCH(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pResource->__memoryexportUnmap__(pResource, pCallContext, pCpuMapping); } -static inline void memoryexportControl_Epilogue_DISPATCH(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memoryexportControl_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool memoryexportIsPartialUnmapSupported_DISPATCH(struct MemoryExport *pResource) { + return pResource->__memoryexportIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS memoryexportMapTo_DISPATCH(struct MemoryExport *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__memoryexportMapTo__(pResource, pParams); } static inline NV_STATUS memoryexportUnmapFrom_DISPATCH(struct MemoryExport *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return pResource->__memoryexportUnmapFrom__(pResource, pParams); } -static inline NV_STATUS memoryexportMap_DISPATCH(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__memoryexportMap__(pResource, pCallContext, pParams, pCpuMapping); +static inline NvU32 memoryexportGetRefCount_DISPATCH(struct MemoryExport *pResource) { + return pResource->__memoryexportGetRefCount__(pResource); } -static inline NvBool memoryexportAccessCallback_DISPATCH(struct MemoryExport *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__memoryexportAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline void memoryexportAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryExport *pResource, RsResourceRef *pReference) { + pResource->__memoryexportAddAdditionalDependants__(pClient, pResource, pReference); } +NvBool memoryexportCanCopy_IMPL(struct MemoryExport *pMemoryExport); + +NV_STATUS memoryexportControl_IMPL(struct MemoryExport *pMemoryExport, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +NV_STATUS memoryexportCtrlExportMem_IMPL(struct MemoryExport *pMemoryExport, NV00E0_CTRL_EXPORT_MEM_PARAMS *pParams); + +NV_STATUS memoryexportCtrlImportMem_IMPL(struct MemoryExport *pMemoryExport, NV00E0_CTRL_IMPORT_MEM_PARAMS *pParams); + +NV_STATUS memoryexportCtrlGetInfo_IMPL(struct MemoryExport *pMemoryExport, NV00E0_CTRL_GET_INFO_PARAMS *pParams); + NV_STATUS memoryexportConstruct_IMPL(struct MemoryExport *arg_pMemoryExport, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_memoryexportConstruct(arg_pMemoryExport, arg_pCallContext, arg_pParams) memoryexportConstruct_IMPL(arg_pMemoryExport, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_mem_fabric_import_ref_nvoc.c b/src/nvidia/generated/g_mem_fabric_import_ref_nvoc.c index f9363de7b4..5e0ba7ef02 100644 --- a/src/nvidia/generated/g_mem_fabric_import_ref_nvoc.c +++ b/src/nvidia/generated/g_mem_fabric_import_ref_nvoc.c @@ -84,113 +84,140 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryFabricImportedRef = /*pExportInfo=*/ &__nvoc_export_info_MemoryFabricImportedRef }; -static NvBool __nvoc_thunk_MemoryFabricImportedRef_resCanCopy(struct RsResource *pMemoryFabricImportedRef) { - return memoryfabricimportedrefCanCopy((struct MemoryFabricImportedRef *)(((unsigned char *)pMemoryFabricImportedRef) - __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset)); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NvBool __nvoc_thunk_RmResource_memoryfabricimportedrefShareCallback(struct MemoryFabricImportedRef *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryFabricImportedRef[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) memoryfabricimportedrefCtrlValidate_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, + /*accessRight=*/0x0u, + /*methodId=*/ 0xfb0101u, + /*paramSize=*/ sizeof(NV00FB_CTRL_VALIDATE_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_MemoryFabricImportedRef.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "memoryfabricimportedrefCtrlValidate" +#endif + }, + +}; -static NV_STATUS __nvoc_thunk_RmResource_memoryfabricimportedrefCheckMemInterUnmap(struct MemoryFabricImportedRef *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), bSubdeviceHandleProvided); +// 1 down-thunk(s) defined to bridge methods in MemoryFabricImportedRef from superclasses + +// memoryfabricimportedrefCanCopy: virtual override (res) base (rmres) +static NvBool __nvoc_down_thunk_MemoryFabricImportedRef_resCanCopy(struct RsResource *pMemoryFabricImportedRef) { + return memoryfabricimportedrefCanCopy((struct MemoryFabricImportedRef *)(((unsigned char *) pMemoryFabricImportedRef) - __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_memoryfabricimportedrefControl(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControl((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pCallContext, pParams); + +// 20 up-thunk(s) defined to bridge methods in MemoryFabricImportedRef to superclasses + +// memoryfabricimportedrefAccessCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_memoryfabricimportedrefAccessCallback(struct MemoryFabricImportedRef *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RmResource_memoryfabricimportedrefGetMemInterMapParams(struct MemoryFabricImportedRef *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pParams); +// memoryfabricimportedrefShareCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_memoryfabricimportedrefShareCallback(struct MemoryFabricImportedRef *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RmResource_memoryfabricimportedrefGetMemoryMappingDescriptor(struct MemoryFabricImportedRef *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), ppMemDesc); +// memoryfabricimportedrefGetMemInterMapParams: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportedrefGetMemInterMapParams(struct MemoryFabricImportedRef *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pParams); } -static NvU32 __nvoc_thunk_RsResource_memoryfabricimportedrefGetRefCount(struct MemoryFabricImportedRef *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset)); +// memoryfabricimportedrefCheckMemInterUnmap: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportedrefCheckMemInterUnmap(struct MemoryFabricImportedRef *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RsResource_memoryfabricimportedrefControlFilter(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pCallContext, pParams); +// memoryfabricimportedrefGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportedrefGetMemoryMappingDescriptor(struct MemoryFabricImportedRef *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), ppMemDesc); } -static void __nvoc_thunk_RsResource_memoryfabricimportedrefAddAdditionalDependants(struct RsClient *pClient, struct MemoryFabricImportedRef *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pReference); +// memoryfabricimportedrefControlSerialization_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportedrefControlSerialization_Prologue(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_memoryfabricimportedrefControlSerialization_Prologue(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pCallContext, pParams); +// memoryfabricimportedrefControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_memoryfabricimportedrefControlSerialization_Epilogue(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_memoryfabricimportedrefControl_Prologue(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pCallContext, pParams); +// memoryfabricimportedrefControl_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportedrefControl_Prologue(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_memoryfabricimportedrefUnmap(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pCallContext, pCpuMapping); +// memoryfabricimportedrefControl_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_memoryfabricimportedrefControl_Epilogue(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_memoryfabricimportedrefIsPartialUnmapSupported(struct MemoryFabricImportedRef *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset)); +// memoryfabricimportedrefIsDuplicate: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefIsDuplicate(struct MemoryFabricImportedRef *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), hMemory, pDuplicate); } -static void __nvoc_thunk_RsResource_memoryfabricimportedrefPreDestruct(struct MemoryFabricImportedRef *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset)); +// memoryfabricimportedrefPreDestruct: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_memoryfabricimportedrefPreDestruct(struct MemoryFabricImportedRef *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_memoryfabricimportedrefMapTo(struct MemoryFabricImportedRef *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pParams); +// memoryfabricimportedrefControl: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefControl(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_memoryfabricimportedrefIsDuplicate(struct MemoryFabricImportedRef *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), hMemory, pDuplicate); +// memoryfabricimportedrefControlFilter: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefControlFilter(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RmResource_memoryfabricimportedrefControlSerialization_Epilogue(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pCallContext, pParams); +// memoryfabricimportedrefMap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefMap(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pCallContext, pParams, pCpuMapping); } -static void __nvoc_thunk_RmResource_memoryfabricimportedrefControl_Epilogue(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pCallContext, pParams); +// memoryfabricimportedrefUnmap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefUnmap(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_memoryfabricimportedrefUnmapFrom(struct MemoryFabricImportedRef *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pParams); +// memoryfabricimportedrefIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body +static NvBool __nvoc_up_thunk_RsResource_memoryfabricimportedrefIsPartialUnmapSupported(struct MemoryFabricImportedRef *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_memoryfabricimportedrefMap(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pCallContext, pParams, pCpuMapping); +// memoryfabricimportedrefMapTo: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefMapTo(struct MemoryFabricImportedRef *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RmResource_memoryfabricimportedrefAccessCallback(struct MemoryFabricImportedRef *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// memoryfabricimportedrefUnmapFrom: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefUnmapFrom(struct MemoryFabricImportedRef *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pParams); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// memoryfabricimportedrefGetRefCount: virtual inherited (res) base (rmres) +static NvU32 __nvoc_up_thunk_RsResource_memoryfabricimportedrefGetRefCount(struct MemoryFabricImportedRef *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset)); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryFabricImportedRef[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) memoryfabricimportedrefCtrlValidate_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xfb0101u, - /*paramSize=*/ sizeof(NV00FB_CTRL_VALIDATE_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_MemoryFabricImportedRef.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "memoryfabricimportedrefCtrlValidate" -#endif - }, +// memoryfabricimportedrefAddAdditionalDependants: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_memoryfabricimportedrefAddAdditionalDependants(struct RsClient *pClient, struct MemoryFabricImportedRef *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pReference); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_MemoryFabricImportedRef = { @@ -228,59 +255,85 @@ NV_STATUS __nvoc_ctor_MemoryFabricImportedRef(MemoryFabricImportedRef *pThis, CA return status; } +// Vtable initialization static void __nvoc_init_funcTable_MemoryFabricImportedRef_1(MemoryFabricImportedRef *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // memoryfabricimportedrefCanCopy -- virtual override (res) base (rmres) pThis->__memoryfabricimportedrefCanCopy__ = &memoryfabricimportedrefCanCopy_IMPL; + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryFabricImportedRef_resCanCopy; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // memoryfabricimportedrefCtrlValidate -- exported (id=0xfb0101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__memoryfabricimportedrefCtrlValidate__ = &memoryfabricimportedrefCtrlValidate_IMPL; #endif - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_MemoryFabricImportedRef_resCanCopy; + // memoryfabricimportedrefAccessCallback -- virtual inherited (rmres) base (rmres) + pThis->__memoryfabricimportedrefAccessCallback__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefAccessCallback; - pThis->__memoryfabricimportedrefShareCallback__ = &__nvoc_thunk_RmResource_memoryfabricimportedrefShareCallback; + // memoryfabricimportedrefShareCallback -- virtual inherited (rmres) base (rmres) + pThis->__memoryfabricimportedrefShareCallback__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefShareCallback; - pThis->__memoryfabricimportedrefCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_memoryfabricimportedrefCheckMemInterUnmap; + // memoryfabricimportedrefGetMemInterMapParams -- virtual inherited (rmres) base (rmres) + pThis->__memoryfabricimportedrefGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefGetMemInterMapParams; - pThis->__memoryfabricimportedrefControl__ = &__nvoc_thunk_RsResource_memoryfabricimportedrefControl; + // memoryfabricimportedrefCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) + pThis->__memoryfabricimportedrefCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefCheckMemInterUnmap; - pThis->__memoryfabricimportedrefGetMemInterMapParams__ = &__nvoc_thunk_RmResource_memoryfabricimportedrefGetMemInterMapParams; + // memoryfabricimportedrefGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) + pThis->__memoryfabricimportedrefGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefGetMemoryMappingDescriptor; - pThis->__memoryfabricimportedrefGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_memoryfabricimportedrefGetMemoryMappingDescriptor; + // memoryfabricimportedrefControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__memoryfabricimportedrefControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefControlSerialization_Prologue; - pThis->__memoryfabricimportedrefGetRefCount__ = &__nvoc_thunk_RsResource_memoryfabricimportedrefGetRefCount; + // memoryfabricimportedrefControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__memoryfabricimportedrefControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefControlSerialization_Epilogue; - pThis->__memoryfabricimportedrefControlFilter__ = &__nvoc_thunk_RsResource_memoryfabricimportedrefControlFilter; + // memoryfabricimportedrefControl_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__memoryfabricimportedrefControl_Prologue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefControl_Prologue; - pThis->__memoryfabricimportedrefAddAdditionalDependants__ = &__nvoc_thunk_RsResource_memoryfabricimportedrefAddAdditionalDependants; + // memoryfabricimportedrefControl_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__memoryfabricimportedrefControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefControl_Epilogue; - pThis->__memoryfabricimportedrefControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_memoryfabricimportedrefControlSerialization_Prologue; + // memoryfabricimportedrefIsDuplicate -- virtual inherited (res) base (rmres) + pThis->__memoryfabricimportedrefIsDuplicate__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefIsDuplicate; - pThis->__memoryfabricimportedrefControl_Prologue__ = &__nvoc_thunk_RmResource_memoryfabricimportedrefControl_Prologue; + // memoryfabricimportedrefPreDestruct -- virtual inherited (res) base (rmres) + pThis->__memoryfabricimportedrefPreDestruct__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefPreDestruct; - pThis->__memoryfabricimportedrefUnmap__ = &__nvoc_thunk_RsResource_memoryfabricimportedrefUnmap; + // memoryfabricimportedrefControl -- virtual inherited (res) base (rmres) + pThis->__memoryfabricimportedrefControl__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefControl; - pThis->__memoryfabricimportedrefIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_memoryfabricimportedrefIsPartialUnmapSupported; + // memoryfabricimportedrefControlFilter -- virtual inherited (res) base (rmres) + pThis->__memoryfabricimportedrefControlFilter__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefControlFilter; - pThis->__memoryfabricimportedrefPreDestruct__ = &__nvoc_thunk_RsResource_memoryfabricimportedrefPreDestruct; + // memoryfabricimportedrefMap -- virtual inherited (res) base (rmres) + pThis->__memoryfabricimportedrefMap__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefMap; - pThis->__memoryfabricimportedrefMapTo__ = &__nvoc_thunk_RsResource_memoryfabricimportedrefMapTo; + // memoryfabricimportedrefUnmap -- virtual inherited (res) base (rmres) + pThis->__memoryfabricimportedrefUnmap__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefUnmap; - pThis->__memoryfabricimportedrefIsDuplicate__ = &__nvoc_thunk_RsResource_memoryfabricimportedrefIsDuplicate; + // memoryfabricimportedrefIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body + pThis->__memoryfabricimportedrefIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefIsPartialUnmapSupported; - pThis->__memoryfabricimportedrefControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_memoryfabricimportedrefControlSerialization_Epilogue; + // memoryfabricimportedrefMapTo -- virtual inherited (res) base (rmres) + pThis->__memoryfabricimportedrefMapTo__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefMapTo; - pThis->__memoryfabricimportedrefControl_Epilogue__ = &__nvoc_thunk_RmResource_memoryfabricimportedrefControl_Epilogue; + // memoryfabricimportedrefUnmapFrom -- virtual inherited (res) base (rmres) + pThis->__memoryfabricimportedrefUnmapFrom__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefUnmapFrom; - pThis->__memoryfabricimportedrefUnmapFrom__ = &__nvoc_thunk_RsResource_memoryfabricimportedrefUnmapFrom; + // memoryfabricimportedrefGetRefCount -- virtual inherited (res) base (rmres) + pThis->__memoryfabricimportedrefGetRefCount__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefGetRefCount; - pThis->__memoryfabricimportedrefMap__ = &__nvoc_thunk_RsResource_memoryfabricimportedrefMap; + // memoryfabricimportedrefAddAdditionalDependants -- virtual inherited (res) base (rmres) + pThis->__memoryfabricimportedrefAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefAddAdditionalDependants; +} // End __nvoc_init_funcTable_MemoryFabricImportedRef_1 with approximately 23 basic block(s). - pThis->__memoryfabricimportedrefAccessCallback__ = &__nvoc_thunk_RmResource_memoryfabricimportedrefAccessCallback; -} +// Initialize vtable(s) for 22 virtual method(s). void __nvoc_init_funcTable_MemoryFabricImportedRef(MemoryFabricImportedRef *pThis) { + + // Initialize vtable(s) with 22 per-object function pointer(s). __nvoc_init_funcTable_MemoryFabricImportedRef_1(pThis); } diff --git a/src/nvidia/generated/g_mem_fabric_import_ref_nvoc.h b/src/nvidia/generated/g_mem_fabric_import_ref_nvoc.h index 7ca817ab1d..f98891980f 100644 --- a/src/nvidia/generated/g_mem_fabric_import_ref_nvoc.h +++ b/src/nvidia/generated/g_mem_fabric_import_ref_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_MEM_FABRIC_IMPORT_REF_NVOC_H_ #define _G_MEM_FABRIC_IMPORT_REF_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -37,6 +44,7 @@ extern "C" { * *****************************************************************************/ +#pragma once #include "g_mem_fabric_import_ref_nvoc.h" #ifndef _MEMORYFABRICIMPORTREF_H_ @@ -62,36 +70,47 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct MemoryFabricImportedRef { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct MemoryFabricImportedRef *__nvoc_pbase_MemoryFabricImportedRef; - NvBool (*__memoryfabricimportedrefCanCopy__)(struct MemoryFabricImportedRef *); - NV_STATUS (*__memoryfabricimportedrefCtrlValidate__)(struct MemoryFabricImportedRef *, NV00FB_CTRL_VALIDATE_PARAMS *); - NvBool (*__memoryfabricimportedrefShareCallback__)(struct MemoryFabricImportedRef *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__memoryfabricimportedrefCheckMemInterUnmap__)(struct MemoryFabricImportedRef *, NvBool); - NV_STATUS (*__memoryfabricimportedrefControl__)(struct MemoryFabricImportedRef *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memoryfabricimportedrefGetMemInterMapParams__)(struct MemoryFabricImportedRef *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__memoryfabricimportedrefGetMemoryMappingDescriptor__)(struct MemoryFabricImportedRef *, struct MEMORY_DESCRIPTOR **); - NvU32 (*__memoryfabricimportedrefGetRefCount__)(struct MemoryFabricImportedRef *); - NV_STATUS (*__memoryfabricimportedrefControlFilter__)(struct MemoryFabricImportedRef *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__memoryfabricimportedrefAddAdditionalDependants__)(struct RsClient *, struct MemoryFabricImportedRef *, RsResourceRef *); - NV_STATUS (*__memoryfabricimportedrefControlSerialization_Prologue__)(struct MemoryFabricImportedRef *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memoryfabricimportedrefControl_Prologue__)(struct MemoryFabricImportedRef *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memoryfabricimportedrefUnmap__)(struct MemoryFabricImportedRef *, struct CALL_CONTEXT *, RsCpuMapping *); - NvBool (*__memoryfabricimportedrefIsPartialUnmapSupported__)(struct MemoryFabricImportedRef *); - void (*__memoryfabricimportedrefPreDestruct__)(struct MemoryFabricImportedRef *); - NV_STATUS (*__memoryfabricimportedrefMapTo__)(struct MemoryFabricImportedRef *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__memoryfabricimportedrefIsDuplicate__)(struct MemoryFabricImportedRef *, NvHandle, NvBool *); - void (*__memoryfabricimportedrefControlSerialization_Epilogue__)(struct MemoryFabricImportedRef *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__memoryfabricimportedrefControl_Epilogue__)(struct MemoryFabricImportedRef *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memoryfabricimportedrefUnmapFrom__)(struct MemoryFabricImportedRef *, RS_RES_UNMAP_FROM_PARAMS *); - NV_STATUS (*__memoryfabricimportedrefMap__)(struct MemoryFabricImportedRef *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__memoryfabricimportedrefAccessCallback__)(struct MemoryFabricImportedRef *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^3 + struct RsResource *__nvoc_pbase_RsResource; // res super^2 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^2 + struct RmResource *__nvoc_pbase_RmResource; // rmres super + struct MemoryFabricImportedRef *__nvoc_pbase_MemoryFabricImportedRef; // memoryfabricimportedref + + // Vtable with 22 per-object function pointers + NvBool (*__memoryfabricimportedrefCanCopy__)(struct MemoryFabricImportedRef * /*this*/); // virtual override (res) base (rmres) + NV_STATUS (*__memoryfabricimportedrefCtrlValidate__)(struct MemoryFabricImportedRef * /*this*/, NV00FB_CTRL_VALIDATE_PARAMS *); // exported (id=0xfb0101) + NvBool (*__memoryfabricimportedrefAccessCallback__)(struct MemoryFabricImportedRef * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) + NvBool (*__memoryfabricimportedrefShareCallback__)(struct MemoryFabricImportedRef * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__memoryfabricimportedrefGetMemInterMapParams__)(struct MemoryFabricImportedRef * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__memoryfabricimportedrefCheckMemInterUnmap__)(struct MemoryFabricImportedRef * /*this*/, NvBool); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__memoryfabricimportedrefGetMemoryMappingDescriptor__)(struct MemoryFabricImportedRef * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__memoryfabricimportedrefControlSerialization_Prologue__)(struct MemoryFabricImportedRef * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__memoryfabricimportedrefControlSerialization_Epilogue__)(struct MemoryFabricImportedRef * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__memoryfabricimportedrefControl_Prologue__)(struct MemoryFabricImportedRef * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__memoryfabricimportedrefControl_Epilogue__)(struct MemoryFabricImportedRef * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__memoryfabricimportedrefIsDuplicate__)(struct MemoryFabricImportedRef * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (rmres) + void (*__memoryfabricimportedrefPreDestruct__)(struct MemoryFabricImportedRef * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__memoryfabricimportedrefControl__)(struct MemoryFabricImportedRef * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__memoryfabricimportedrefControlFilter__)(struct MemoryFabricImportedRef * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__memoryfabricimportedrefMap__)(struct MemoryFabricImportedRef * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NV_STATUS (*__memoryfabricimportedrefUnmap__)(struct MemoryFabricImportedRef * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NvBool (*__memoryfabricimportedrefIsPartialUnmapSupported__)(struct MemoryFabricImportedRef * /*this*/); // inline virtual inherited (res) base (rmres) body + NV_STATUS (*__memoryfabricimportedrefMapTo__)(struct MemoryFabricImportedRef * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) + NV_STATUS (*__memoryfabricimportedrefUnmapFrom__)(struct MemoryFabricImportedRef * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) + NvU32 (*__memoryfabricimportedrefGetRefCount__)(struct MemoryFabricImportedRef * /*this*/); // virtual inherited (res) base (rmres) + void (*__memoryfabricimportedrefAddAdditionalDependants__)(struct RsClient *, struct MemoryFabricImportedRef * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) + + // Data members NvU64 PRIVATE_FIELD(numUpdatedPfns); MEMORY_DESCRIPTOR *PRIVATE_FIELD(pTempMemDesc); MEM_FABRIC_IMPORT_DESCRIPTOR *PRIVATE_FIELD(pFabricImportDesc); @@ -106,6 +125,7 @@ typedef struct MemoryFabricImportedRef MemoryFabricImportedRef; #define __nvoc_class_id_MemoryFabricImportedRef 0x189bad #endif /* __nvoc_class_id_MemoryFabricImportedRef */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryFabricImportedRef; #define __staticCast_MemoryFabricImportedRef(pThis) \ @@ -118,127 +138,152 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryFabricImportedRef; ((MemoryFabricImportedRef*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(MemoryFabricImportedRef))) #endif //__nvoc_mem_fabric_import_ref_h_disabled - NV_STATUS __nvoc_objCreateDynamic_MemoryFabricImportedRef(MemoryFabricImportedRef**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_MemoryFabricImportedRef(MemoryFabricImportedRef**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_MemoryFabricImportedRef(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_MemoryFabricImportedRef((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define memoryfabricimportedrefCanCopy_FNPTR(pMemoryFabricImportedRef) pMemoryFabricImportedRef->__memoryfabricimportedrefCanCopy__ #define memoryfabricimportedrefCanCopy(pMemoryFabricImportedRef) memoryfabricimportedrefCanCopy_DISPATCH(pMemoryFabricImportedRef) +#define memoryfabricimportedrefCtrlValidate_FNPTR(pMemoryFabricImportedRef) pMemoryFabricImportedRef->__memoryfabricimportedrefCtrlValidate__ #define memoryfabricimportedrefCtrlValidate(pMemoryFabricImportedRef, pParams) memoryfabricimportedrefCtrlValidate_DISPATCH(pMemoryFabricImportedRef, pParams) +#define memoryfabricimportedrefAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define memoryfabricimportedrefAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memoryfabricimportedrefAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define memoryfabricimportedrefShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ #define memoryfabricimportedrefShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) memoryfabricimportedrefShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define memoryfabricimportedrefCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) memoryfabricimportedrefCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define memoryfabricimportedrefControl(pResource, pCallContext, pParams) memoryfabricimportedrefControl_DISPATCH(pResource, pCallContext, pParams) +#define memoryfabricimportedrefGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define memoryfabricimportedrefGetMemInterMapParams(pRmResource, pParams) memoryfabricimportedrefGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define memoryfabricimportedrefCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define memoryfabricimportedrefCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) memoryfabricimportedrefCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define memoryfabricimportedrefGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define memoryfabricimportedrefGetMemoryMappingDescriptor(pRmResource, ppMemDesc) memoryfabricimportedrefGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define memoryfabricimportedrefGetRefCount(pResource) memoryfabricimportedrefGetRefCount_DISPATCH(pResource) -#define memoryfabricimportedrefControlFilter(pResource, pCallContext, pParams) memoryfabricimportedrefControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricimportedrefAddAdditionalDependants(pClient, pResource, pReference) memoryfabricimportedrefAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define memoryfabricimportedrefControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define memoryfabricimportedrefControlSerialization_Prologue(pResource, pCallContext, pParams) memoryfabricimportedrefControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define memoryfabricimportedrefControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define memoryfabricimportedrefControlSerialization_Epilogue(pResource, pCallContext, pParams) memoryfabricimportedrefControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define memoryfabricimportedrefControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ #define memoryfabricimportedrefControl_Prologue(pResource, pCallContext, pParams) memoryfabricimportedrefControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define memoryfabricimportedrefControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define memoryfabricimportedrefControl_Epilogue(pResource, pCallContext, pParams) memoryfabricimportedrefControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define memoryfabricimportedrefIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define memoryfabricimportedrefIsDuplicate(pResource, hMemory, pDuplicate) memoryfabricimportedrefIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define memoryfabricimportedrefPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define memoryfabricimportedrefPreDestruct(pResource) memoryfabricimportedrefPreDestruct_DISPATCH(pResource) +#define memoryfabricimportedrefControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define memoryfabricimportedrefControl(pResource, pCallContext, pParams) memoryfabricimportedrefControl_DISPATCH(pResource, pCallContext, pParams) +#define memoryfabricimportedrefControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define memoryfabricimportedrefControlFilter(pResource, pCallContext, pParams) memoryfabricimportedrefControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define memoryfabricimportedrefMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define memoryfabricimportedrefMap(pResource, pCallContext, pParams, pCpuMapping) memoryfabricimportedrefMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define memoryfabricimportedrefUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ #define memoryfabricimportedrefUnmap(pResource, pCallContext, pCpuMapping) memoryfabricimportedrefUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define memoryfabricimportedrefIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ #define memoryfabricimportedrefIsPartialUnmapSupported(pResource) memoryfabricimportedrefIsPartialUnmapSupported_DISPATCH(pResource) -#define memoryfabricimportedrefPreDestruct(pResource) memoryfabricimportedrefPreDestruct_DISPATCH(pResource) +#define memoryfabricimportedrefMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ #define memoryfabricimportedrefMapTo(pResource, pParams) memoryfabricimportedrefMapTo_DISPATCH(pResource, pParams) -#define memoryfabricimportedrefIsDuplicate(pResource, hMemory, pDuplicate) memoryfabricimportedrefIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define memoryfabricimportedrefControlSerialization_Epilogue(pResource, pCallContext, pParams) memoryfabricimportedrefControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricimportedrefControl_Epilogue(pResource, pCallContext, pParams) memoryfabricimportedrefControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define memoryfabricimportedrefUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ #define memoryfabricimportedrefUnmapFrom(pResource, pParams) memoryfabricimportedrefUnmapFrom_DISPATCH(pResource, pParams) -#define memoryfabricimportedrefMap(pResource, pCallContext, pParams, pCpuMapping) memoryfabricimportedrefMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define memoryfabricimportedrefAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memoryfabricimportedrefAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool memoryfabricimportedrefCanCopy_IMPL(struct MemoryFabricImportedRef *pMemoryFabricImportedRef); +#define memoryfabricimportedrefGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define memoryfabricimportedrefGetRefCount(pResource) memoryfabricimportedrefGetRefCount_DISPATCH(pResource) +#define memoryfabricimportedrefAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define memoryfabricimportedrefAddAdditionalDependants(pClient, pResource, pReference) memoryfabricimportedrefAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NvBool memoryfabricimportedrefCanCopy_DISPATCH(struct MemoryFabricImportedRef *pMemoryFabricImportedRef) { return pMemoryFabricImportedRef->__memoryfabricimportedrefCanCopy__(pMemoryFabricImportedRef); } -NV_STATUS memoryfabricimportedrefCtrlValidate_IMPL(struct MemoryFabricImportedRef *pMemoryFabricImportedRef, NV00FB_CTRL_VALIDATE_PARAMS *pParams); - static inline NV_STATUS memoryfabricimportedrefCtrlValidate_DISPATCH(struct MemoryFabricImportedRef *pMemoryFabricImportedRef, NV00FB_CTRL_VALIDATE_PARAMS *pParams) { return pMemoryFabricImportedRef->__memoryfabricimportedrefCtrlValidate__(pMemoryFabricImportedRef, pParams); } -static inline NvBool memoryfabricimportedrefShareCallback_DISPATCH(struct MemoryFabricImportedRef *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__memoryfabricimportedrefShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS memoryfabricimportedrefCheckMemInterUnmap_DISPATCH(struct MemoryFabricImportedRef *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__memoryfabricimportedrefCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NvBool memoryfabricimportedrefAccessCallback_DISPATCH(struct MemoryFabricImportedRef *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__memoryfabricimportedrefAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS memoryfabricimportedrefControl_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryfabricimportedrefControl__(pResource, pCallContext, pParams); +static inline NvBool memoryfabricimportedrefShareCallback_DISPATCH(struct MemoryFabricImportedRef *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__memoryfabricimportedrefShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS memoryfabricimportedrefGetMemInterMapParams_DISPATCH(struct MemoryFabricImportedRef *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__memoryfabricimportedrefGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS memoryfabricimportedrefGetMemoryMappingDescriptor_DISPATCH(struct MemoryFabricImportedRef *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__memoryfabricimportedrefGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); -} - -static inline NvU32 memoryfabricimportedrefGetRefCount_DISPATCH(struct MemoryFabricImportedRef *pResource) { - return pResource->__memoryfabricimportedrefGetRefCount__(pResource); -} - -static inline NV_STATUS memoryfabricimportedrefControlFilter_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryfabricimportedrefControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS memoryfabricimportedrefCheckMemInterUnmap_DISPATCH(struct MemoryFabricImportedRef *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__memoryfabricimportedrefCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline void memoryfabricimportedrefAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryFabricImportedRef *pResource, RsResourceRef *pReference) { - pResource->__memoryfabricimportedrefAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS memoryfabricimportedrefGetMemoryMappingDescriptor_DISPATCH(struct MemoryFabricImportedRef *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__memoryfabricimportedrefGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS memoryfabricimportedrefControlSerialization_Prologue_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__memoryfabricimportedrefControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void memoryfabricimportedrefControlSerialization_Epilogue_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__memoryfabricimportedrefControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + static inline NV_STATUS memoryfabricimportedrefControl_Prologue_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__memoryfabricimportedrefControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS memoryfabricimportedrefUnmap_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__memoryfabricimportedrefUnmap__(pResource, pCallContext, pCpuMapping); +static inline void memoryfabricimportedrefControl_Epilogue_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__memoryfabricimportedrefControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NvBool memoryfabricimportedrefIsPartialUnmapSupported_DISPATCH(struct MemoryFabricImportedRef *pResource) { - return pResource->__memoryfabricimportedrefIsPartialUnmapSupported__(pResource); +static inline NV_STATUS memoryfabricimportedrefIsDuplicate_DISPATCH(struct MemoryFabricImportedRef *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__memoryfabricimportedrefIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void memoryfabricimportedrefPreDestruct_DISPATCH(struct MemoryFabricImportedRef *pResource) { pResource->__memoryfabricimportedrefPreDestruct__(pResource); } -static inline NV_STATUS memoryfabricimportedrefMapTo_DISPATCH(struct MemoryFabricImportedRef *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__memoryfabricimportedrefMapTo__(pResource, pParams); +static inline NV_STATUS memoryfabricimportedrefControl_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__memoryfabricimportedrefControl__(pResource, pCallContext, pParams); } -static inline NV_STATUS memoryfabricimportedrefIsDuplicate_DISPATCH(struct MemoryFabricImportedRef *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__memoryfabricimportedrefIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS memoryfabricimportedrefControlFilter_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__memoryfabricimportedrefControlFilter__(pResource, pCallContext, pParams); } -static inline void memoryfabricimportedrefControlSerialization_Epilogue_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memoryfabricimportedrefControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS memoryfabricimportedrefMap_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__memoryfabricimportedrefMap__(pResource, pCallContext, pParams, pCpuMapping); } -static inline void memoryfabricimportedrefControl_Epilogue_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memoryfabricimportedrefControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS memoryfabricimportedrefUnmap_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pResource->__memoryfabricimportedrefUnmap__(pResource, pCallContext, pCpuMapping); +} + +static inline NvBool memoryfabricimportedrefIsPartialUnmapSupported_DISPATCH(struct MemoryFabricImportedRef *pResource) { + return pResource->__memoryfabricimportedrefIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS memoryfabricimportedrefMapTo_DISPATCH(struct MemoryFabricImportedRef *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__memoryfabricimportedrefMapTo__(pResource, pParams); } static inline NV_STATUS memoryfabricimportedrefUnmapFrom_DISPATCH(struct MemoryFabricImportedRef *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return pResource->__memoryfabricimportedrefUnmapFrom__(pResource, pParams); } -static inline NV_STATUS memoryfabricimportedrefMap_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__memoryfabricimportedrefMap__(pResource, pCallContext, pParams, pCpuMapping); +static inline NvU32 memoryfabricimportedrefGetRefCount_DISPATCH(struct MemoryFabricImportedRef *pResource) { + return pResource->__memoryfabricimportedrefGetRefCount__(pResource); } -static inline NvBool memoryfabricimportedrefAccessCallback_DISPATCH(struct MemoryFabricImportedRef *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__memoryfabricimportedrefAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline void memoryfabricimportedrefAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryFabricImportedRef *pResource, RsResourceRef *pReference) { + pResource->__memoryfabricimportedrefAddAdditionalDependants__(pClient, pResource, pReference); } +NvBool memoryfabricimportedrefCanCopy_IMPL(struct MemoryFabricImportedRef *pMemoryFabricImportedRef); + +NV_STATUS memoryfabricimportedrefCtrlValidate_IMPL(struct MemoryFabricImportedRef *pMemoryFabricImportedRef, NV00FB_CTRL_VALIDATE_PARAMS *pParams); + NV_STATUS memoryfabricimportedrefConstruct_IMPL(struct MemoryFabricImportedRef *arg_pMemoryFabricImportedRef, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_memoryfabricimportedrefConstruct(arg_pMemoryFabricImportedRef, arg_pCallContext, arg_pParams) memoryfabricimportedrefConstruct_IMPL(arg_pMemoryFabricImportedRef, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_mem_fabric_import_v2_nvoc.c b/src/nvidia/generated/g_mem_fabric_import_v2_nvoc.c index fca3741736..3b118deccb 100644 --- a/src/nvidia/generated/g_mem_fabric_import_v2_nvoc.c +++ b/src/nvidia/generated/g_mem_fabric_import_v2_nvoc.c @@ -93,133 +93,165 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryFabricImportV2 = /*pExportInfo=*/ &__nvoc_export_info_MemoryFabricImportV2 }; -static NvBool __nvoc_thunk_MemoryFabricImportV2_resCanCopy(struct RsResource *pMemoryFabricImportV2) { - return memoryfabricimportv2CanCopy((struct MemoryFabricImportV2 *)(((unsigned char *)pMemoryFabricImportV2) - __nvoc_rtti_MemoryFabricImportV2_RsResource.offset)); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NV_STATUS __nvoc_thunk_MemoryFabricImportV2_memIsReady(struct Memory *pMemoryFabricImportV2, NvBool bCopyConstructorContext) { - return memoryfabricimportv2IsReady((struct MemoryFabricImportV2 *)(((unsigned char *)pMemoryFabricImportV2) - __nvoc_rtti_MemoryFabricImportV2_Memory.offset), bCopyConstructorContext); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryFabricImportV2[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) memoryfabricimportv2CtrlGetInfo_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, + /*accessRight=*/0x0u, + /*methodId=*/ 0xf90101u, + /*paramSize=*/ sizeof(NV00F9_CTRL_GET_INFO_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_MemoryFabricImportV2.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "memoryfabricimportv2CtrlGetInfo" +#endif + }, -static NV_STATUS __nvoc_thunk_MemoryFabricImportV2_memControl(struct Memory *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memoryfabricimportv2Control((struct MemoryFabricImportV2 *)(((unsigned char *)pMemoryFabricImportV2) - __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pCallContext, pParams); +}; + +// 6 down-thunk(s) defined to bridge methods in MemoryFabricImportV2 from superclasses + +// memoryfabricimportv2CanCopy: virtual override (res) base (mem) +static NvBool __nvoc_down_thunk_MemoryFabricImportV2_resCanCopy(struct RsResource *pMemoryFabricImportV2) { + return memoryfabricimportv2CanCopy((struct MemoryFabricImportV2 *)(((unsigned char *) pMemoryFabricImportV2) - __nvoc_rtti_MemoryFabricImportV2_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_MemoryFabricImportV2_memGetMapAddrSpace(struct Memory *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return memoryfabricimportv2GetMapAddrSpace((struct MemoryFabricImportV2 *)(((unsigned char *)pMemoryFabricImportV2) - __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pCallContext, mapFlags, pAddrSpace); +// memoryfabricimportv2IsReady: virtual override (mem) base (mem) +static NV_STATUS __nvoc_down_thunk_MemoryFabricImportV2_memIsReady(struct Memory *pMemoryFabricImportV2, NvBool bCopyConstructorContext) { + return memoryfabricimportv2IsReady((struct MemoryFabricImportV2 *)(((unsigned char *) pMemoryFabricImportV2) - __nvoc_rtti_MemoryFabricImportV2_Memory.offset), bCopyConstructorContext); } -static NvBool __nvoc_thunk_MemoryFabricImportV2_memIsGpuMapAllowed(struct Memory *pMemoryFabricImportV2, struct OBJGPU *pGpu) { - return memoryfabricimportv2IsGpuMapAllowed((struct MemoryFabricImportV2 *)(((unsigned char *)pMemoryFabricImportV2) - __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pGpu); +// memoryfabricimportv2Control: virtual override (res) base (mem) +static NV_STATUS __nvoc_down_thunk_MemoryFabricImportV2_memControl(struct Memory *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memoryfabricimportv2Control((struct MemoryFabricImportV2 *)(((unsigned char *) pMemoryFabricImportV2) - __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_MemoryFabricImportV2_memIsExportAllowed(struct Memory *pMemoryFabricImportV2) { - return memoryfabricimportv2IsExportAllowed((struct MemoryFabricImportV2 *)(((unsigned char *)pMemoryFabricImportV2) - __nvoc_rtti_MemoryFabricImportV2_Memory.offset)); +// memoryfabricimportv2GetMapAddrSpace: virtual override (mem) base (mem) +static NV_STATUS __nvoc_down_thunk_MemoryFabricImportV2_memGetMapAddrSpace(struct Memory *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return memoryfabricimportv2GetMapAddrSpace((struct MemoryFabricImportV2 *)(((unsigned char *) pMemoryFabricImportV2) - __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_Memory_memoryfabricimportv2CheckMemInterUnmap(struct MemoryFabricImportV2 *pMemory, NvBool bSubdeviceHandleProvided) { - return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), bSubdeviceHandleProvided); +// memoryfabricimportv2IsGpuMapAllowed: virtual override (mem) base (mem) +static NvBool __nvoc_down_thunk_MemoryFabricImportV2_memIsGpuMapAllowed(struct Memory *pMemoryFabricImportV2, struct OBJGPU *pGpu) { + return memoryfabricimportv2IsGpuMapAllowed((struct MemoryFabricImportV2 *)(((unsigned char *) pMemoryFabricImportV2) - __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pGpu); } -static NvBool __nvoc_thunk_RmResource_memoryfabricimportv2ShareCallback(struct MemoryFabricImportV2 *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportV2_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// memoryfabricimportv2IsExportAllowed: virtual override (mem) base (mem) +static NvBool __nvoc_down_thunk_MemoryFabricImportV2_memIsExportAllowed(struct Memory *pMemoryFabricImportV2) { + return memoryfabricimportv2IsExportAllowed((struct MemoryFabricImportV2 *)(((unsigned char *) pMemoryFabricImportV2) - __nvoc_rtti_MemoryFabricImportV2_Memory.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_memoryfabricimportv2MapTo(struct MemoryFabricImportV2 *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset), pParams); + +// 20 up-thunk(s) defined to bridge methods in MemoryFabricImportV2 to superclasses + +// memoryfabricimportv2IsDuplicate: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2IsDuplicate(struct MemoryFabricImportV2 *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), hMemory, pDuplicate); } -static NvU32 __nvoc_thunk_RsResource_memoryfabricimportv2GetRefCount(struct MemoryFabricImportV2 *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset)); +// memoryfabricimportv2Map: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2Map(struct MemoryFabricImportV2 *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pCallContext, pParams, pCpuMapping); } -static void __nvoc_thunk_RsResource_memoryfabricimportv2AddAdditionalDependants(struct RsClient *pClient, struct MemoryFabricImportV2 *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset), pReference); +// memoryfabricimportv2Unmap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2Unmap(struct MemoryFabricImportV2 *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RmResource_memoryfabricimportv2Control_Prologue(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportV2_RmResource.offset), pCallContext, pParams); +// memoryfabricimportv2GetMemInterMapParams: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2GetMemInterMapParams(struct MemoryFabricImportV2 *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_memoryfabricimportv2UnmapFrom(struct MemoryFabricImportV2 *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset), pParams); +// memoryfabricimportv2CheckMemInterUnmap: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2CheckMemInterUnmap(struct MemoryFabricImportV2 *pMemory, NvBool bSubdeviceHandleProvided) { + return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), bSubdeviceHandleProvided); } -static void __nvoc_thunk_RmResource_memoryfabricimportv2Control_Epilogue(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportV2_RmResource.offset), pCallContext, pParams); +// memoryfabricimportv2GetMemoryMappingDescriptor: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2GetMemoryMappingDescriptor(struct MemoryFabricImportV2 *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_Memory_memoryfabricimportv2Unmap(struct MemoryFabricImportV2 *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pCallContext, pCpuMapping); +// memoryfabricimportv2CheckCopyPermissions: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2CheckCopyPermissions(struct MemoryFabricImportV2 *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pDstGpu, pDstDevice); } -static NV_STATUS __nvoc_thunk_Memory_memoryfabricimportv2GetMemInterMapParams(struct MemoryFabricImportV2 *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pParams); +// memoryfabricimportv2AccessCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_memoryfabricimportv2AccessCallback(struct MemoryFabricImportV2 *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_Memory_memoryfabricimportv2GetMemoryMappingDescriptor(struct MemoryFabricImportV2 *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), ppMemDesc); +// memoryfabricimportv2ShareCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_memoryfabricimportv2ShareCallback(struct MemoryFabricImportV2 *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RsResource_memoryfabricimportv2ControlFilter(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset), pCallContext, pParams); +// memoryfabricimportv2ControlSerialization_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportv2ControlSerialization_Prologue(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_memoryfabricimportv2ControlSerialization_Prologue(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportV2_RmResource.offset), pCallContext, pParams); +// memoryfabricimportv2ControlSerialization_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_memoryfabricimportv2ControlSerialization_Epilogue(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_memoryfabricimportv2IsPartialUnmapSupported(struct MemoryFabricImportV2 *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset)); +// memoryfabricimportv2Control_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportv2Control_Prologue(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_memoryfabricimportv2CheckCopyPermissions(struct MemoryFabricImportV2 *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return memCheckCopyPermissions((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pDstGpu, pDstDevice); +// memoryfabricimportv2Control_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_memoryfabricimportv2Control_Epilogue(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RmResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_memoryfabricimportv2PreDestruct(struct MemoryFabricImportV2 *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset)); +// memoryfabricimportv2PreDestruct: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_memoryfabricimportv2PreDestruct(struct MemoryFabricImportV2 *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_memoryfabricimportv2IsDuplicate(struct MemoryFabricImportV2 *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), hMemory, pDuplicate); +// memoryfabricimportv2ControlFilter: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportv2ControlFilter(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RmResource_memoryfabricimportv2ControlSerialization_Epilogue(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportV2_RmResource.offset), pCallContext, pParams); +// memoryfabricimportv2IsPartialUnmapSupported: inline virtual inherited (res) base (mem) body +static NvBool __nvoc_up_thunk_RsResource_memoryfabricimportv2IsPartialUnmapSupported(struct MemoryFabricImportV2 *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_memoryfabricimportv2Map(struct MemoryFabricImportV2 *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pCallContext, pParams, pCpuMapping); +// memoryfabricimportv2MapTo: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportv2MapTo(struct MemoryFabricImportV2 *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RmResource_memoryfabricimportv2AccessCallback(struct MemoryFabricImportV2 *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabricImportV2_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// memoryfabricimportv2UnmapFrom: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportv2UnmapFrom(struct MemoryFabricImportV2 *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset), pParams); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// memoryfabricimportv2GetRefCount: virtual inherited (res) base (mem) +static NvU32 __nvoc_up_thunk_RsResource_memoryfabricimportv2GetRefCount(struct MemoryFabricImportV2 *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset)); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryFabricImportV2[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) memoryfabricimportv2CtrlGetInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xf90101u, - /*paramSize=*/ sizeof(NV00F9_CTRL_GET_INFO_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_MemoryFabricImportV2.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "memoryfabricimportv2CtrlGetInfo" -#endif - }, +// memoryfabricimportv2AddAdditionalDependants: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_memoryfabricimportv2AddAdditionalDependants(struct RsClient *pClient, struct MemoryFabricImportV2 *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset), pReference); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_MemoryFabricImportV2 = { @@ -257,81 +289,108 @@ NV_STATUS __nvoc_ctor_MemoryFabricImportV2(MemoryFabricImportV2 *pThis, CALL_CON return status; } +// Vtable initialization static void __nvoc_init_funcTable_MemoryFabricImportV2_1(MemoryFabricImportV2 *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // memoryfabricimportv2CanCopy -- virtual override (res) base (mem) pThis->__memoryfabricimportv2CanCopy__ = &memoryfabricimportv2CanCopy_IMPL; + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryFabricImportV2_resCanCopy; + // memoryfabricimportv2IsReady -- virtual override (mem) base (mem) pThis->__memoryfabricimportv2IsReady__ = &memoryfabricimportv2IsReady_IMPL; + pThis->__nvoc_base_Memory.__memIsReady__ = &__nvoc_down_thunk_MemoryFabricImportV2_memIsReady; + // memoryfabricimportv2CopyConstruct -- virtual override (mem) base (mem) pThis->__memoryfabricimportv2CopyConstruct__ = &memoryfabricimportv2CopyConstruct_IMPL; + // memoryfabricimportv2Control -- virtual override (res) base (mem) pThis->__memoryfabricimportv2Control__ = &memoryfabricimportv2Control_IMPL; + pThis->__nvoc_base_Memory.__memControl__ = &__nvoc_down_thunk_MemoryFabricImportV2_memControl; + // memoryfabricimportv2GetMapAddrSpace -- virtual override (mem) base (mem) pThis->__memoryfabricimportv2GetMapAddrSpace__ = &memoryfabricimportv2GetMapAddrSpace_IMPL; + pThis->__nvoc_base_Memory.__memGetMapAddrSpace__ = &__nvoc_down_thunk_MemoryFabricImportV2_memGetMapAddrSpace; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // memoryfabricimportv2CtrlGetInfo -- exported (id=0xf90101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__memoryfabricimportv2CtrlGetInfo__ = &memoryfabricimportv2CtrlGetInfo_IMPL; #endif + // memoryfabricimportv2IsGpuMapAllowed -- virtual override (mem) base (mem) pThis->__memoryfabricimportv2IsGpuMapAllowed__ = &memoryfabricimportv2IsGpuMapAllowed_IMPL; + pThis->__nvoc_base_Memory.__memIsGpuMapAllowed__ = &__nvoc_down_thunk_MemoryFabricImportV2_memIsGpuMapAllowed; + // memoryfabricimportv2IsExportAllowed -- virtual override (mem) base (mem) pThis->__memoryfabricimportv2IsExportAllowed__ = &memoryfabricimportv2IsExportAllowed_IMPL; + pThis->__nvoc_base_Memory.__memIsExportAllowed__ = &__nvoc_down_thunk_MemoryFabricImportV2_memIsExportAllowed; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_MemoryFabricImportV2_resCanCopy; - - pThis->__nvoc_base_Memory.__memIsReady__ = &__nvoc_thunk_MemoryFabricImportV2_memIsReady; + // memoryfabricimportv2IsDuplicate -- virtual inherited (mem) base (mem) + pThis->__memoryfabricimportv2IsDuplicate__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2IsDuplicate; - pThis->__nvoc_base_Memory.__memControl__ = &__nvoc_thunk_MemoryFabricImportV2_memControl; + // memoryfabricimportv2Map -- virtual inherited (mem) base (mem) + pThis->__memoryfabricimportv2Map__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2Map; - pThis->__nvoc_base_Memory.__memGetMapAddrSpace__ = &__nvoc_thunk_MemoryFabricImportV2_memGetMapAddrSpace; + // memoryfabricimportv2Unmap -- virtual inherited (mem) base (mem) + pThis->__memoryfabricimportv2Unmap__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2Unmap; - pThis->__nvoc_base_Memory.__memIsGpuMapAllowed__ = &__nvoc_thunk_MemoryFabricImportV2_memIsGpuMapAllowed; + // memoryfabricimportv2GetMemInterMapParams -- virtual inherited (mem) base (mem) + pThis->__memoryfabricimportv2GetMemInterMapParams__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2GetMemInterMapParams; - pThis->__nvoc_base_Memory.__memIsExportAllowed__ = &__nvoc_thunk_MemoryFabricImportV2_memIsExportAllowed; + // memoryfabricimportv2CheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body + pThis->__memoryfabricimportv2CheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2CheckMemInterUnmap; - pThis->__memoryfabricimportv2CheckMemInterUnmap__ = &__nvoc_thunk_Memory_memoryfabricimportv2CheckMemInterUnmap; + // memoryfabricimportv2GetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) + pThis->__memoryfabricimportv2GetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2GetMemoryMappingDescriptor; - pThis->__memoryfabricimportv2ShareCallback__ = &__nvoc_thunk_RmResource_memoryfabricimportv2ShareCallback; + // memoryfabricimportv2CheckCopyPermissions -- inline virtual inherited (mem) base (mem) body + pThis->__memoryfabricimportv2CheckCopyPermissions__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2CheckCopyPermissions; - pThis->__memoryfabricimportv2MapTo__ = &__nvoc_thunk_RsResource_memoryfabricimportv2MapTo; + // memoryfabricimportv2AccessCallback -- virtual inherited (rmres) base (mem) + pThis->__memoryfabricimportv2AccessCallback__ = &__nvoc_up_thunk_RmResource_memoryfabricimportv2AccessCallback; - pThis->__memoryfabricimportv2GetRefCount__ = &__nvoc_thunk_RsResource_memoryfabricimportv2GetRefCount; + // memoryfabricimportv2ShareCallback -- virtual inherited (rmres) base (mem) + pThis->__memoryfabricimportv2ShareCallback__ = &__nvoc_up_thunk_RmResource_memoryfabricimportv2ShareCallback; - pThis->__memoryfabricimportv2AddAdditionalDependants__ = &__nvoc_thunk_RsResource_memoryfabricimportv2AddAdditionalDependants; + // memoryfabricimportv2ControlSerialization_Prologue -- virtual inherited (rmres) base (mem) + pThis->__memoryfabricimportv2ControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportv2ControlSerialization_Prologue; - pThis->__memoryfabricimportv2Control_Prologue__ = &__nvoc_thunk_RmResource_memoryfabricimportv2Control_Prologue; + // memoryfabricimportv2ControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__memoryfabricimportv2ControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportv2ControlSerialization_Epilogue; - pThis->__memoryfabricimportv2UnmapFrom__ = &__nvoc_thunk_RsResource_memoryfabricimportv2UnmapFrom; + // memoryfabricimportv2Control_Prologue -- virtual inherited (rmres) base (mem) + pThis->__memoryfabricimportv2Control_Prologue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportv2Control_Prologue; - pThis->__memoryfabricimportv2Control_Epilogue__ = &__nvoc_thunk_RmResource_memoryfabricimportv2Control_Epilogue; + // memoryfabricimportv2Control_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__memoryfabricimportv2Control_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportv2Control_Epilogue; - pThis->__memoryfabricimportv2Unmap__ = &__nvoc_thunk_Memory_memoryfabricimportv2Unmap; + // memoryfabricimportv2PreDestruct -- virtual inherited (res) base (mem) + pThis->__memoryfabricimportv2PreDestruct__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2PreDestruct; - pThis->__memoryfabricimportv2GetMemInterMapParams__ = &__nvoc_thunk_Memory_memoryfabricimportv2GetMemInterMapParams; + // memoryfabricimportv2ControlFilter -- virtual inherited (res) base (mem) + pThis->__memoryfabricimportv2ControlFilter__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2ControlFilter; - pThis->__memoryfabricimportv2GetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_memoryfabricimportv2GetMemoryMappingDescriptor; + // memoryfabricimportv2IsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body + pThis->__memoryfabricimportv2IsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2IsPartialUnmapSupported; - pThis->__memoryfabricimportv2ControlFilter__ = &__nvoc_thunk_RsResource_memoryfabricimportv2ControlFilter; + // memoryfabricimportv2MapTo -- virtual inherited (res) base (mem) + pThis->__memoryfabricimportv2MapTo__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2MapTo; - pThis->__memoryfabricimportv2ControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_memoryfabricimportv2ControlSerialization_Prologue; + // memoryfabricimportv2UnmapFrom -- virtual inherited (res) base (mem) + pThis->__memoryfabricimportv2UnmapFrom__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2UnmapFrom; - pThis->__memoryfabricimportv2IsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_memoryfabricimportv2IsPartialUnmapSupported; + // memoryfabricimportv2GetRefCount -- virtual inherited (res) base (mem) + pThis->__memoryfabricimportv2GetRefCount__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2GetRefCount; - pThis->__memoryfabricimportv2CheckCopyPermissions__ = &__nvoc_thunk_Memory_memoryfabricimportv2CheckCopyPermissions; + // memoryfabricimportv2AddAdditionalDependants -- virtual inherited (res) base (mem) + pThis->__memoryfabricimportv2AddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2AddAdditionalDependants; +} // End __nvoc_init_funcTable_MemoryFabricImportV2_1 with approximately 34 basic block(s). - pThis->__memoryfabricimportv2PreDestruct__ = &__nvoc_thunk_RsResource_memoryfabricimportv2PreDestruct; - - pThis->__memoryfabricimportv2IsDuplicate__ = &__nvoc_thunk_Memory_memoryfabricimportv2IsDuplicate; - - pThis->__memoryfabricimportv2ControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_memoryfabricimportv2ControlSerialization_Epilogue; - - pThis->__memoryfabricimportv2Map__ = &__nvoc_thunk_Memory_memoryfabricimportv2Map; - - pThis->__memoryfabricimportv2AccessCallback__ = &__nvoc_thunk_RmResource_memoryfabricimportv2AccessCallback; -} +// Initialize vtable(s) for 28 virtual method(s). void __nvoc_init_funcTable_MemoryFabricImportV2(MemoryFabricImportV2 *pThis) { + + // Initialize vtable(s) with 28 per-object function pointer(s). __nvoc_init_funcTable_MemoryFabricImportV2_1(pThis); } diff --git a/src/nvidia/generated/g_mem_fabric_import_v2_nvoc.h b/src/nvidia/generated/g_mem_fabric_import_v2_nvoc.h index d28f9ba9f6..1d46992009 100644 --- a/src/nvidia/generated/g_mem_fabric_import_v2_nvoc.h +++ b/src/nvidia/generated/g_mem_fabric_import_v2_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_MEM_FABRIC_IMPORT_V2_NVOC_H_ #define _G_MEM_FABRIC_IMPORT_V2_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -36,6 +43,7 @@ extern "C" { * *****************************************************************************/ +#pragma once #include "g_mem_fabric_import_v2_nvoc.h" #ifndef _MEMORYFABRICIMPORTV2_H_ @@ -65,43 +73,54 @@ typedef struct mem_fabric_import_descriptor MEM_FABRIC_IMPORT_DESCRIPTOR; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct MemoryFabricImportV2 { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Memory *__nvoc_pbase_Memory; - struct MemoryFabricImportV2 *__nvoc_pbase_MemoryFabricImportV2; - NvBool (*__memoryfabricimportv2CanCopy__)(struct MemoryFabricImportV2 *); - NV_STATUS (*__memoryfabricimportv2IsReady__)(struct MemoryFabricImportV2 *, NvBool); - NV_STATUS (*__memoryfabricimportv2CopyConstruct__)(struct MemoryFabricImportV2 *, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); - NV_STATUS (*__memoryfabricimportv2Control__)(struct MemoryFabricImportV2 *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memoryfabricimportv2GetMapAddrSpace__)(struct MemoryFabricImportV2 *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NV_STATUS (*__memoryfabricimportv2CtrlGetInfo__)(struct MemoryFabricImportV2 *, NV00F9_CTRL_GET_INFO_PARAMS *); - NvBool (*__memoryfabricimportv2IsGpuMapAllowed__)(struct MemoryFabricImportV2 *, struct OBJGPU *); - NvBool (*__memoryfabricimportv2IsExportAllowed__)(struct MemoryFabricImportV2 *); - NV_STATUS (*__memoryfabricimportv2CheckMemInterUnmap__)(struct MemoryFabricImportV2 *, NvBool); - NvBool (*__memoryfabricimportv2ShareCallback__)(struct MemoryFabricImportV2 *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__memoryfabricimportv2MapTo__)(struct MemoryFabricImportV2 *, RS_RES_MAP_TO_PARAMS *); - NvU32 (*__memoryfabricimportv2GetRefCount__)(struct MemoryFabricImportV2 *); - void (*__memoryfabricimportv2AddAdditionalDependants__)(struct RsClient *, struct MemoryFabricImportV2 *, RsResourceRef *); - NV_STATUS (*__memoryfabricimportv2Control_Prologue__)(struct MemoryFabricImportV2 *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memoryfabricimportv2UnmapFrom__)(struct MemoryFabricImportV2 *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__memoryfabricimportv2Control_Epilogue__)(struct MemoryFabricImportV2 *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memoryfabricimportv2Unmap__)(struct MemoryFabricImportV2 *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__memoryfabricimportv2GetMemInterMapParams__)(struct MemoryFabricImportV2 *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__memoryfabricimportv2GetMemoryMappingDescriptor__)(struct MemoryFabricImportV2 *, MEMORY_DESCRIPTOR **); - NV_STATUS (*__memoryfabricimportv2ControlFilter__)(struct MemoryFabricImportV2 *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memoryfabricimportv2ControlSerialization_Prologue__)(struct MemoryFabricImportV2 *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__memoryfabricimportv2IsPartialUnmapSupported__)(struct MemoryFabricImportV2 *); - NV_STATUS (*__memoryfabricimportv2CheckCopyPermissions__)(struct MemoryFabricImportV2 *, struct OBJGPU *, struct Device *); - void (*__memoryfabricimportv2PreDestruct__)(struct MemoryFabricImportV2 *); - NV_STATUS (*__memoryfabricimportv2IsDuplicate__)(struct MemoryFabricImportV2 *, NvHandle, NvBool *); - void (*__memoryfabricimportv2ControlSerialization_Epilogue__)(struct MemoryFabricImportV2 *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memoryfabricimportv2Map__)(struct MemoryFabricImportV2 *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__memoryfabricimportv2AccessCallback__)(struct MemoryFabricImportV2 *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct Memory *__nvoc_pbase_Memory; // mem super + struct MemoryFabricImportV2 *__nvoc_pbase_MemoryFabricImportV2; // memoryfabricimportv2 + + // Vtable with 28 per-object function pointers + NvBool (*__memoryfabricimportv2CanCopy__)(struct MemoryFabricImportV2 * /*this*/); // virtual override (res) base (mem) + NV_STATUS (*__memoryfabricimportv2IsReady__)(struct MemoryFabricImportV2 * /*this*/, NvBool); // virtual override (mem) base (mem) + NV_STATUS (*__memoryfabricimportv2CopyConstruct__)(struct MemoryFabricImportV2 * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // virtual override (mem) base (mem) + NV_STATUS (*__memoryfabricimportv2Control__)(struct MemoryFabricImportV2 * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (mem) + NV_STATUS (*__memoryfabricimportv2GetMapAddrSpace__)(struct MemoryFabricImportV2 * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (mem) base (mem) + NV_STATUS (*__memoryfabricimportv2CtrlGetInfo__)(struct MemoryFabricImportV2 * /*this*/, NV00F9_CTRL_GET_INFO_PARAMS *); // exported (id=0xf90101) + NvBool (*__memoryfabricimportv2IsGpuMapAllowed__)(struct MemoryFabricImportV2 * /*this*/, struct OBJGPU *); // virtual override (mem) base (mem) + NvBool (*__memoryfabricimportv2IsExportAllowed__)(struct MemoryFabricImportV2 * /*this*/); // virtual override (mem) base (mem) + NV_STATUS (*__memoryfabricimportv2IsDuplicate__)(struct MemoryFabricImportV2 * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) + NV_STATUS (*__memoryfabricimportv2Map__)(struct MemoryFabricImportV2 * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__memoryfabricimportv2Unmap__)(struct MemoryFabricImportV2 * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__memoryfabricimportv2GetMemInterMapParams__)(struct MemoryFabricImportV2 * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (mem) base (mem) + NV_STATUS (*__memoryfabricimportv2CheckMemInterUnmap__)(struct MemoryFabricImportV2 * /*this*/, NvBool); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__memoryfabricimportv2GetMemoryMappingDescriptor__)(struct MemoryFabricImportV2 * /*this*/, MEMORY_DESCRIPTOR **); // virtual inherited (mem) base (mem) + NV_STATUS (*__memoryfabricimportv2CheckCopyPermissions__)(struct MemoryFabricImportV2 * /*this*/, struct OBJGPU *, struct Device *); // inline virtual inherited (mem) base (mem) body + NvBool (*__memoryfabricimportv2AccessCallback__)(struct MemoryFabricImportV2 * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (mem) + NvBool (*__memoryfabricimportv2ShareCallback__)(struct MemoryFabricImportV2 * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__memoryfabricimportv2ControlSerialization_Prologue__)(struct MemoryFabricImportV2 * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__memoryfabricimportv2ControlSerialization_Epilogue__)(struct MemoryFabricImportV2 * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__memoryfabricimportv2Control_Prologue__)(struct MemoryFabricImportV2 * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__memoryfabricimportv2Control_Epilogue__)(struct MemoryFabricImportV2 * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__memoryfabricimportv2PreDestruct__)(struct MemoryFabricImportV2 * /*this*/); // virtual inherited (res) base (mem) + NV_STATUS (*__memoryfabricimportv2ControlFilter__)(struct MemoryFabricImportV2 * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (mem) + NvBool (*__memoryfabricimportv2IsPartialUnmapSupported__)(struct MemoryFabricImportV2 * /*this*/); // inline virtual inherited (res) base (mem) body + NV_STATUS (*__memoryfabricimportv2MapTo__)(struct MemoryFabricImportV2 * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (mem) + NV_STATUS (*__memoryfabricimportv2UnmapFrom__)(struct MemoryFabricImportV2 * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (mem) + NvU32 (*__memoryfabricimportv2GetRefCount__)(struct MemoryFabricImportV2 * /*this*/); // virtual inherited (res) base (mem) + void (*__memoryfabricimportv2AddAdditionalDependants__)(struct RsClient *, struct MemoryFabricImportV2 * /*this*/, RsResourceRef *); // virtual inherited (res) base (mem) + + // Data members NvU16 expNodeId; MEM_FABRIC_IMPORT_DESCRIPTOR *PRIVATE_FIELD(pFabricImportDesc); }; @@ -115,6 +134,7 @@ typedef struct MemoryFabricImportV2 MemoryFabricImportV2; #define __nvoc_class_id_MemoryFabricImportV2 0xf96871 #endif /* __nvoc_class_id_MemoryFabricImportV2 */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryFabricImportV2; #define __staticCast_MemoryFabricImportV2(pThis) \ @@ -127,169 +147,200 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryFabricImportV2; ((MemoryFabricImportV2*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(MemoryFabricImportV2))) #endif //__nvoc_mem_fabric_import_v2_h_disabled - NV_STATUS __nvoc_objCreateDynamic_MemoryFabricImportV2(MemoryFabricImportV2**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_MemoryFabricImportV2(MemoryFabricImportV2**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_MemoryFabricImportV2(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_MemoryFabricImportV2((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define memoryfabricimportv2CanCopy_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__memoryfabricimportv2CanCopy__ #define memoryfabricimportv2CanCopy(pMemoryFabricImportV2) memoryfabricimportv2CanCopy_DISPATCH(pMemoryFabricImportV2) +#define memoryfabricimportv2IsReady_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__memoryfabricimportv2IsReady__ #define memoryfabricimportv2IsReady(pMemoryFabricImportV2, bCopyConstructorContext) memoryfabricimportv2IsReady_DISPATCH(pMemoryFabricImportV2, bCopyConstructorContext) +#define memoryfabricimportv2CopyConstruct_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__memoryfabricimportv2CopyConstruct__ #define memoryfabricimportv2CopyConstruct(pMemoryFabricImportV2, pCallContext, pParams) memoryfabricimportv2CopyConstruct_DISPATCH(pMemoryFabricImportV2, pCallContext, pParams) +#define memoryfabricimportv2Control_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__memoryfabricimportv2Control__ #define memoryfabricimportv2Control(pMemoryFabricImportV2, pCallContext, pParams) memoryfabricimportv2Control_DISPATCH(pMemoryFabricImportV2, pCallContext, pParams) +#define memoryfabricimportv2GetMapAddrSpace_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__memoryfabricimportv2GetMapAddrSpace__ #define memoryfabricimportv2GetMapAddrSpace(pMemoryFabricImportV2, pCallContext, mapFlags, pAddrSpace) memoryfabricimportv2GetMapAddrSpace_DISPATCH(pMemoryFabricImportV2, pCallContext, mapFlags, pAddrSpace) +#define memoryfabricimportv2CtrlGetInfo_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__memoryfabricimportv2CtrlGetInfo__ #define memoryfabricimportv2CtrlGetInfo(pMemoryFabricImportV2, pParams) memoryfabricimportv2CtrlGetInfo_DISPATCH(pMemoryFabricImportV2, pParams) +#define memoryfabricimportv2IsGpuMapAllowed_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__memoryfabricimportv2IsGpuMapAllowed__ #define memoryfabricimportv2IsGpuMapAllowed(pMemoryFabricImportV2, pGpu) memoryfabricimportv2IsGpuMapAllowed_DISPATCH(pMemoryFabricImportV2, pGpu) +#define memoryfabricimportv2IsExportAllowed_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__memoryfabricimportv2IsExportAllowed__ #define memoryfabricimportv2IsExportAllowed(pMemoryFabricImportV2) memoryfabricimportv2IsExportAllowed_DISPATCH(pMemoryFabricImportV2) +#define memoryfabricimportv2IsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define memoryfabricimportv2IsDuplicate(pMemory, hMemory, pDuplicate) memoryfabricimportv2IsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) +#define memoryfabricimportv2Map_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define memoryfabricimportv2Map(pMemory, pCallContext, pParams, pCpuMapping) memoryfabricimportv2Map_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define memoryfabricimportv2Unmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ +#define memoryfabricimportv2Unmap(pMemory, pCallContext, pCpuMapping) memoryfabricimportv2Unmap_DISPATCH(pMemory, pCallContext, pCpuMapping) +#define memoryfabricimportv2GetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ +#define memoryfabricimportv2GetMemInterMapParams(pMemory, pParams) memoryfabricimportv2GetMemInterMapParams_DISPATCH(pMemory, pParams) +#define memoryfabricimportv2CheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ #define memoryfabricimportv2CheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) memoryfabricimportv2CheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) +#define memoryfabricimportv2GetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define memoryfabricimportv2GetMemoryMappingDescriptor(pMemory, ppMemDesc) memoryfabricimportv2GetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) +#define memoryfabricimportv2CheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ +#define memoryfabricimportv2CheckCopyPermissions(pMemory, pDstGpu, pDstDevice) memoryfabricimportv2CheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) +#define memoryfabricimportv2AccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define memoryfabricimportv2AccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memoryfabricimportv2AccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define memoryfabricimportv2ShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ #define memoryfabricimportv2ShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) memoryfabricimportv2ShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define memoryfabricimportv2MapTo(pResource, pParams) memoryfabricimportv2MapTo_DISPATCH(pResource, pParams) -#define memoryfabricimportv2GetRefCount(pResource) memoryfabricimportv2GetRefCount_DISPATCH(pResource) -#define memoryfabricimportv2AddAdditionalDependants(pClient, pResource, pReference) memoryfabricimportv2AddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define memoryfabricimportv2ControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define memoryfabricimportv2ControlSerialization_Prologue(pResource, pCallContext, pParams) memoryfabricimportv2ControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define memoryfabricimportv2ControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define memoryfabricimportv2ControlSerialization_Epilogue(pResource, pCallContext, pParams) memoryfabricimportv2ControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define memoryfabricimportv2Control_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ #define memoryfabricimportv2Control_Prologue(pResource, pCallContext, pParams) memoryfabricimportv2Control_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricimportv2UnmapFrom(pResource, pParams) memoryfabricimportv2UnmapFrom_DISPATCH(pResource, pParams) +#define memoryfabricimportv2Control_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ #define memoryfabricimportv2Control_Epilogue(pResource, pCallContext, pParams) memoryfabricimportv2Control_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricimportv2Unmap(pMemory, pCallContext, pCpuMapping) memoryfabricimportv2Unmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define memoryfabricimportv2GetMemInterMapParams(pMemory, pParams) memoryfabricimportv2GetMemInterMapParams_DISPATCH(pMemory, pParams) -#define memoryfabricimportv2GetMemoryMappingDescriptor(pMemory, ppMemDesc) memoryfabricimportv2GetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) +#define memoryfabricimportv2PreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define memoryfabricimportv2PreDestruct(pResource) memoryfabricimportv2PreDestruct_DISPATCH(pResource) +#define memoryfabricimportv2ControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ #define memoryfabricimportv2ControlFilter(pResource, pCallContext, pParams) memoryfabricimportv2ControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricimportv2ControlSerialization_Prologue(pResource, pCallContext, pParams) memoryfabricimportv2ControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define memoryfabricimportv2IsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ #define memoryfabricimportv2IsPartialUnmapSupported(pResource) memoryfabricimportv2IsPartialUnmapSupported_DISPATCH(pResource) -#define memoryfabricimportv2CheckCopyPermissions(pMemory, pDstGpu, pDstDevice) memoryfabricimportv2CheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define memoryfabricimportv2PreDestruct(pResource) memoryfabricimportv2PreDestruct_DISPATCH(pResource) -#define memoryfabricimportv2IsDuplicate(pMemory, hMemory, pDuplicate) memoryfabricimportv2IsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define memoryfabricimportv2ControlSerialization_Epilogue(pResource, pCallContext, pParams) memoryfabricimportv2ControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricimportv2Map(pMemory, pCallContext, pParams, pCpuMapping) memoryfabricimportv2Map_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define memoryfabricimportv2AccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memoryfabricimportv2AccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool memoryfabricimportv2CanCopy_IMPL(struct MemoryFabricImportV2 *pMemoryFabricImportV2); +#define memoryfabricimportv2MapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define memoryfabricimportv2MapTo(pResource, pParams) memoryfabricimportv2MapTo_DISPATCH(pResource, pParams) +#define memoryfabricimportv2UnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define memoryfabricimportv2UnmapFrom(pResource, pParams) memoryfabricimportv2UnmapFrom_DISPATCH(pResource, pParams) +#define memoryfabricimportv2GetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define memoryfabricimportv2GetRefCount(pResource) memoryfabricimportv2GetRefCount_DISPATCH(pResource) +#define memoryfabricimportv2AddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define memoryfabricimportv2AddAdditionalDependants(pClient, pResource, pReference) memoryfabricimportv2AddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NvBool memoryfabricimportv2CanCopy_DISPATCH(struct MemoryFabricImportV2 *pMemoryFabricImportV2) { return pMemoryFabricImportV2->__memoryfabricimportv2CanCopy__(pMemoryFabricImportV2); } -NV_STATUS memoryfabricimportv2IsReady_IMPL(struct MemoryFabricImportV2 *pMemoryFabricImportV2, NvBool bCopyConstructorContext); - static inline NV_STATUS memoryfabricimportv2IsReady_DISPATCH(struct MemoryFabricImportV2 *pMemoryFabricImportV2, NvBool bCopyConstructorContext) { return pMemoryFabricImportV2->__memoryfabricimportv2IsReady__(pMemoryFabricImportV2, bCopyConstructorContext); } -NV_STATUS memoryfabricimportv2CopyConstruct_IMPL(struct MemoryFabricImportV2 *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); - static inline NV_STATUS memoryfabricimportv2CopyConstruct_DISPATCH(struct MemoryFabricImportV2 *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { return pMemoryFabricImportV2->__memoryfabricimportv2CopyConstruct__(pMemoryFabricImportV2, pCallContext, pParams); } -NV_STATUS memoryfabricimportv2Control_IMPL(struct MemoryFabricImportV2 *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline NV_STATUS memoryfabricimportv2Control_DISPATCH(struct MemoryFabricImportV2 *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pMemoryFabricImportV2->__memoryfabricimportv2Control__(pMemoryFabricImportV2, pCallContext, pParams); } -NV_STATUS memoryfabricimportv2GetMapAddrSpace_IMPL(struct MemoryFabricImportV2 *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); - static inline NV_STATUS memoryfabricimportv2GetMapAddrSpace_DISPATCH(struct MemoryFabricImportV2 *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pMemoryFabricImportV2->__memoryfabricimportv2GetMapAddrSpace__(pMemoryFabricImportV2, pCallContext, mapFlags, pAddrSpace); } -NV_STATUS memoryfabricimportv2CtrlGetInfo_IMPL(struct MemoryFabricImportV2 *pMemoryFabricImportV2, NV00F9_CTRL_GET_INFO_PARAMS *pParams); - static inline NV_STATUS memoryfabricimportv2CtrlGetInfo_DISPATCH(struct MemoryFabricImportV2 *pMemoryFabricImportV2, NV00F9_CTRL_GET_INFO_PARAMS *pParams) { return pMemoryFabricImportV2->__memoryfabricimportv2CtrlGetInfo__(pMemoryFabricImportV2, pParams); } -NvBool memoryfabricimportv2IsGpuMapAllowed_IMPL(struct MemoryFabricImportV2 *pMemoryFabricImportV2, struct OBJGPU *pGpu); - static inline NvBool memoryfabricimportv2IsGpuMapAllowed_DISPATCH(struct MemoryFabricImportV2 *pMemoryFabricImportV2, struct OBJGPU *pGpu) { return pMemoryFabricImportV2->__memoryfabricimportv2IsGpuMapAllowed__(pMemoryFabricImportV2, pGpu); } -NvBool memoryfabricimportv2IsExportAllowed_IMPL(struct MemoryFabricImportV2 *pMemoryFabricImportV2); - static inline NvBool memoryfabricimportv2IsExportAllowed_DISPATCH(struct MemoryFabricImportV2 *pMemoryFabricImportV2) { return pMemoryFabricImportV2->__memoryfabricimportv2IsExportAllowed__(pMemoryFabricImportV2); } -static inline NV_STATUS memoryfabricimportv2CheckMemInterUnmap_DISPATCH(struct MemoryFabricImportV2 *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__memoryfabricimportv2CheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); +static inline NV_STATUS memoryfabricimportv2IsDuplicate_DISPATCH(struct MemoryFabricImportV2 *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return pMemory->__memoryfabricimportv2IsDuplicate__(pMemory, hMemory, pDuplicate); } -static inline NvBool memoryfabricimportv2ShareCallback_DISPATCH(struct MemoryFabricImportV2 *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__memoryfabricimportv2ShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS memoryfabricimportv2Map_DISPATCH(struct MemoryFabricImportV2 *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pMemory->__memoryfabricimportv2Map__(pMemory, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS memoryfabricimportv2MapTo_DISPATCH(struct MemoryFabricImportV2 *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__memoryfabricimportv2MapTo__(pResource, pParams); +static inline NV_STATUS memoryfabricimportv2Unmap_DISPATCH(struct MemoryFabricImportV2 *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pMemory->__memoryfabricimportv2Unmap__(pMemory, pCallContext, pCpuMapping); } -static inline NvU32 memoryfabricimportv2GetRefCount_DISPATCH(struct MemoryFabricImportV2 *pResource) { - return pResource->__memoryfabricimportv2GetRefCount__(pResource); +static inline NV_STATUS memoryfabricimportv2GetMemInterMapParams_DISPATCH(struct MemoryFabricImportV2 *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pMemory->__memoryfabricimportv2GetMemInterMapParams__(pMemory, pParams); } -static inline void memoryfabricimportv2AddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryFabricImportV2 *pResource, RsResourceRef *pReference) { - pResource->__memoryfabricimportv2AddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS memoryfabricimportv2CheckMemInterUnmap_DISPATCH(struct MemoryFabricImportV2 *pMemory, NvBool bSubdeviceHandleProvided) { + return pMemory->__memoryfabricimportv2CheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } -static inline NV_STATUS memoryfabricimportv2Control_Prologue_DISPATCH(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryfabricimportv2Control_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS memoryfabricimportv2GetMemoryMappingDescriptor_DISPATCH(struct MemoryFabricImportV2 *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return pMemory->__memoryfabricimportv2GetMemoryMappingDescriptor__(pMemory, ppMemDesc); } -static inline NV_STATUS memoryfabricimportv2UnmapFrom_DISPATCH(struct MemoryFabricImportV2 *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__memoryfabricimportv2UnmapFrom__(pResource, pParams); +static inline NV_STATUS memoryfabricimportv2CheckCopyPermissions_DISPATCH(struct MemoryFabricImportV2 *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return pMemory->__memoryfabricimportv2CheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } -static inline void memoryfabricimportv2Control_Epilogue_DISPATCH(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memoryfabricimportv2Control_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool memoryfabricimportv2AccessCallback_DISPATCH(struct MemoryFabricImportV2 *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__memoryfabricimportv2AccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS memoryfabricimportv2Unmap_DISPATCH(struct MemoryFabricImportV2 *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__memoryfabricimportv2Unmap__(pMemory, pCallContext, pCpuMapping); +static inline NvBool memoryfabricimportv2ShareCallback_DISPATCH(struct MemoryFabricImportV2 *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__memoryfabricimportv2ShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline NV_STATUS memoryfabricimportv2GetMemInterMapParams_DISPATCH(struct MemoryFabricImportV2 *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__memoryfabricimportv2GetMemInterMapParams__(pMemory, pParams); +static inline NV_STATUS memoryfabricimportv2ControlSerialization_Prologue_DISPATCH(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__memoryfabricimportv2ControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS memoryfabricimportv2GetMemoryMappingDescriptor_DISPATCH(struct MemoryFabricImportV2 *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__memoryfabricimportv2GetMemoryMappingDescriptor__(pMemory, ppMemDesc); +static inline void memoryfabricimportv2ControlSerialization_Epilogue_DISPATCH(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__memoryfabricimportv2ControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS memoryfabricimportv2ControlFilter_DISPATCH(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryfabricimportv2ControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS memoryfabricimportv2Control_Prologue_DISPATCH(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__memoryfabricimportv2Control_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS memoryfabricimportv2ControlSerialization_Prologue_DISPATCH(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryfabricimportv2ControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline void memoryfabricimportv2Control_Epilogue_DISPATCH(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__memoryfabricimportv2Control_Epilogue__(pResource, pCallContext, pParams); } -static inline NvBool memoryfabricimportv2IsPartialUnmapSupported_DISPATCH(struct MemoryFabricImportV2 *pResource) { - return pResource->__memoryfabricimportv2IsPartialUnmapSupported__(pResource); +static inline void memoryfabricimportv2PreDestruct_DISPATCH(struct MemoryFabricImportV2 *pResource) { + pResource->__memoryfabricimportv2PreDestruct__(pResource); } -static inline NV_STATUS memoryfabricimportv2CheckCopyPermissions_DISPATCH(struct MemoryFabricImportV2 *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__memoryfabricimportv2CheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); +static inline NV_STATUS memoryfabricimportv2ControlFilter_DISPATCH(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__memoryfabricimportv2ControlFilter__(pResource, pCallContext, pParams); } -static inline void memoryfabricimportv2PreDestruct_DISPATCH(struct MemoryFabricImportV2 *pResource) { - pResource->__memoryfabricimportv2PreDestruct__(pResource); +static inline NvBool memoryfabricimportv2IsPartialUnmapSupported_DISPATCH(struct MemoryFabricImportV2 *pResource) { + return pResource->__memoryfabricimportv2IsPartialUnmapSupported__(pResource); } -static inline NV_STATUS memoryfabricimportv2IsDuplicate_DISPATCH(struct MemoryFabricImportV2 *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__memoryfabricimportv2IsDuplicate__(pMemory, hMemory, pDuplicate); +static inline NV_STATUS memoryfabricimportv2MapTo_DISPATCH(struct MemoryFabricImportV2 *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__memoryfabricimportv2MapTo__(pResource, pParams); } -static inline void memoryfabricimportv2ControlSerialization_Epilogue_DISPATCH(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memoryfabricimportv2ControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS memoryfabricimportv2UnmapFrom_DISPATCH(struct MemoryFabricImportV2 *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__memoryfabricimportv2UnmapFrom__(pResource, pParams); } -static inline NV_STATUS memoryfabricimportv2Map_DISPATCH(struct MemoryFabricImportV2 *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__memoryfabricimportv2Map__(pMemory, pCallContext, pParams, pCpuMapping); +static inline NvU32 memoryfabricimportv2GetRefCount_DISPATCH(struct MemoryFabricImportV2 *pResource) { + return pResource->__memoryfabricimportv2GetRefCount__(pResource); } -static inline NvBool memoryfabricimportv2AccessCallback_DISPATCH(struct MemoryFabricImportV2 *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__memoryfabricimportv2AccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline void memoryfabricimportv2AddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryFabricImportV2 *pResource, RsResourceRef *pReference) { + pResource->__memoryfabricimportv2AddAdditionalDependants__(pClient, pResource, pReference); } +NvBool memoryfabricimportv2CanCopy_IMPL(struct MemoryFabricImportV2 *pMemoryFabricImportV2); + +NV_STATUS memoryfabricimportv2IsReady_IMPL(struct MemoryFabricImportV2 *pMemoryFabricImportV2, NvBool bCopyConstructorContext); + +NV_STATUS memoryfabricimportv2CopyConstruct_IMPL(struct MemoryFabricImportV2 *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); + +NV_STATUS memoryfabricimportv2Control_IMPL(struct MemoryFabricImportV2 *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +NV_STATUS memoryfabricimportv2GetMapAddrSpace_IMPL(struct MemoryFabricImportV2 *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); + +NV_STATUS memoryfabricimportv2CtrlGetInfo_IMPL(struct MemoryFabricImportV2 *pMemoryFabricImportV2, NV00F9_CTRL_GET_INFO_PARAMS *pParams); + +NvBool memoryfabricimportv2IsGpuMapAllowed_IMPL(struct MemoryFabricImportV2 *pMemoryFabricImportV2, struct OBJGPU *pGpu); + +NvBool memoryfabricimportv2IsExportAllowed_IMPL(struct MemoryFabricImportV2 *pMemoryFabricImportV2); + NV_STATUS memoryfabricimportv2Construct_IMPL(struct MemoryFabricImportV2 *arg_pMemoryFabricImportV2, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_memoryfabricimportv2Construct(arg_pMemoryFabricImportV2, arg_pCallContext, arg_pParams) memoryfabricimportv2Construct_IMPL(arg_pMemoryFabricImportV2, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_mem_fabric_nvoc.c b/src/nvidia/generated/g_mem_fabric_nvoc.c index 9c40e26e12..62818ea2a9 100644 --- a/src/nvidia/generated/g_mem_fabric_nvoc.c +++ b/src/nvidia/generated/g_mem_fabric_nvoc.c @@ -93,110 +93,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryFabric = /*pExportInfo=*/ &__nvoc_export_info_MemoryFabric }; -static NvBool __nvoc_thunk_MemoryFabric_resCanCopy(struct RsResource *pMemoryFabric) { - return memoryfabricCanCopy((struct MemoryFabric *)(((unsigned char *)pMemoryFabric) - __nvoc_rtti_MemoryFabric_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_MemoryFabric_memControl(struct Memory *pMemoryFabric, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memoryfabricControl((struct MemoryFabric *)(((unsigned char *)pMemoryFabric) - __nvoc_rtti_MemoryFabric_Memory.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_Memory_memoryfabricCheckMemInterUnmap(struct MemoryFabric *pMemory, NvBool bSubdeviceHandleProvided) { - return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), bSubdeviceHandleProvided); -} - -static NvBool __nvoc_thunk_RmResource_memoryfabricShareCallback(struct MemoryFabric *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabric_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RsResource_memoryfabricMapTo(struct MemoryFabric *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_Memory_memoryfabricGetMapAddrSpace(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return memGetMapAddrSpace((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), pCallContext, mapFlags, pAddrSpace); -} - -static NvBool __nvoc_thunk_Memory_memoryfabricIsExportAllowed(struct MemoryFabric *pMemory) { - return memIsExportAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset)); -} - -static NvU32 __nvoc_thunk_RsResource_memoryfabricGetRefCount(struct MemoryFabric *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_memoryfabricAddAdditionalDependants(struct RsClient *pClient, struct MemoryFabric *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_memoryfabricControl_Prologue(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabric_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_Memory_memoryfabricIsGpuMapAllowed(struct MemoryFabric *pMemory, struct OBJGPU *pGpu) { - return memIsGpuMapAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), pGpu); -} - -static NV_STATUS __nvoc_thunk_RsResource_memoryfabricUnmapFrom(struct MemoryFabric *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_memoryfabricControl_Epilogue(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabric_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_Memory_memoryfabricUnmap(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_Memory_memoryfabricGetMemInterMapParams(struct MemoryFabric *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_Memory_memoryfabricGetMemoryMappingDescriptor(struct MemoryFabric *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_memoryfabricControlFilter(struct MemoryFabric *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_memoryfabricControlSerialization_Prologue(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabric_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_memoryfabricIsPartialUnmapSupported(struct MemoryFabric *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_Memory_memoryfabricIsReady(struct MemoryFabric *pMemory, NvBool bCopyConstructorContext) { - return memIsReady((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), bCopyConstructorContext); -} - -static NV_STATUS __nvoc_thunk_Memory_memoryfabricCheckCopyPermissions(struct MemoryFabric *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return memCheckCopyPermissions((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), pDstGpu, pDstDevice); -} - -static void __nvoc_thunk_RsResource_memoryfabricPreDestruct(struct MemoryFabric *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_Memory_memoryfabricIsDuplicate(struct MemoryFabric *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_memoryfabricControlSerialization_Epilogue(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabric_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_Memory_memoryfabricMap(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_memoryfabricAccessCallback(struct MemoryFabric *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryFabric_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -204,12 +100,12 @@ static NvBool __nvoc_thunk_RmResource_memoryfabricAccessCallback(struct MemoryFa static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryFabric[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memoryfabricCtrlGetInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0xf80101u, /*paramSize=*/ sizeof(NV00F8_CTRL_GET_INFO_PARAMS), @@ -219,12 +115,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryFa #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x318u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memoryfabricCtrlCmdDescribe_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2850u) - /*flags=*/ 0x2850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x318u) + /*flags=*/ 0x318u, /*accessRight=*/0x0u, /*methodId=*/ 0xf80102u, /*paramSize=*/ sizeof(NV00F8_CTRL_DESCRIBE_PARAMS), @@ -234,12 +130,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryFa #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8810u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x908u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memoryfabricCtrlAttachMem_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8810u) - /*flags=*/ 0x8810u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x908u) + /*flags=*/ 0x908u, /*accessRight=*/0x0u, /*methodId=*/ 0xf80103u, /*paramSize=*/ sizeof(NV00F8_CTRL_ATTACH_MEM_PARAMS), @@ -249,12 +145,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryFa #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8810u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x908u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memoryfabricCtrlDetachMem_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8810u) - /*flags=*/ 0x8810u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x908u) + /*flags=*/ 0x908u, /*accessRight=*/0x0u, /*methodId=*/ 0xf80104u, /*paramSize=*/ sizeof(NV00F8_CTRL_DETACH_MEM_PARAMS), @@ -264,12 +160,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryFa #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memoryfabricCtrlGetNumAttachedMem_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0xf80105u, /*paramSize=*/ sizeof(NV00F8_CTRL_GET_NUM_ATTACHED_MEM_PARAMS), @@ -279,12 +175,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryFa #endif }, { /* [5] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memoryfabricCtrlGetAttachedMem_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) - /*flags=*/ 0x810u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*flags=*/ 0x108u, /*accessRight=*/0x0u, /*methodId=*/ 0xf80106u, /*paramSize=*/ sizeof(NV00F8_CTRL_GET_ATTACHED_MEM_PARAMS), @@ -294,12 +190,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryFa #endif }, { /* [6] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x840u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x110u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memoryfabricCtrlGetPageLevelInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x840u) - /*flags=*/ 0x840u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x110u) + /*flags=*/ 0x110u, /*accessRight=*/0x0u, /*methodId=*/ 0xf80107u, /*paramSize=*/ sizeof(NV00F8_CTRL_GET_PAGE_LEVEL_INFO_PARAMS), @@ -311,6 +207,142 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryFa }; +// 2 down-thunk(s) defined to bridge methods in MemoryFabric from superclasses + +// memoryfabricCanCopy: virtual override (res) base (mem) +static NvBool __nvoc_down_thunk_MemoryFabric_resCanCopy(struct RsResource *pMemoryFabric) { + return memoryfabricCanCopy((struct MemoryFabric *)(((unsigned char *) pMemoryFabric) - __nvoc_rtti_MemoryFabric_RsResource.offset)); +} + +// memoryfabricControl: virtual override (res) base (mem) +static NV_STATUS __nvoc_down_thunk_MemoryFabric_memControl(struct Memory *pMemoryFabric, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memoryfabricControl((struct MemoryFabric *)(((unsigned char *) pMemoryFabric) - __nvoc_rtti_MemoryFabric_Memory.offset), pCallContext, pParams); +} + + +// 24 up-thunk(s) defined to bridge methods in MemoryFabric to superclasses + +// memoryfabricIsDuplicate: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricIsDuplicate(struct MemoryFabric *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), hMemory, pDuplicate); +} + +// memoryfabricGetMapAddrSpace: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricGetMapAddrSpace(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), pCallContext, mapFlags, pAddrSpace); +} + +// memoryfabricMap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricMap(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), pCallContext, pParams, pCpuMapping); +} + +// memoryfabricUnmap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricUnmap(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), pCallContext, pCpuMapping); +} + +// memoryfabricGetMemInterMapParams: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricGetMemInterMapParams(struct MemoryFabric *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), pParams); +} + +// memoryfabricCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricCheckMemInterUnmap(struct MemoryFabric *pMemory, NvBool bSubdeviceHandleProvided) { + return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), bSubdeviceHandleProvided); +} + +// memoryfabricGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricGetMemoryMappingDescriptor(struct MemoryFabric *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), ppMemDesc); +} + +// memoryfabricCheckCopyPermissions: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricCheckCopyPermissions(struct MemoryFabric *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), pDstGpu, pDstDevice); +} + +// memoryfabricIsReady: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricIsReady(struct MemoryFabric *pMemory, NvBool bCopyConstructorContext) { + return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), bCopyConstructorContext); +} + +// memoryfabricIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_memoryfabricIsGpuMapAllowed(struct MemoryFabric *pMemory, struct OBJGPU *pGpu) { + return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), pGpu); +} + +// memoryfabricIsExportAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_memoryfabricIsExportAllowed(struct MemoryFabric *pMemory) { + return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset)); +} + +// memoryfabricAccessCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_memoryfabricAccessCallback(struct MemoryFabric *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// memoryfabricShareCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_memoryfabricShareCallback(struct MemoryFabric *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// memoryfabricControlSerialization_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricControlSerialization_Prologue(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RmResource.offset), pCallContext, pParams); +} + +// memoryfabricControlSerialization_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_memoryfabricControlSerialization_Epilogue(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RmResource.offset), pCallContext, pParams); +} + +// memoryfabricControl_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricControl_Prologue(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RmResource.offset), pCallContext, pParams); +} + +// memoryfabricControl_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_memoryfabricControl_Epilogue(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RmResource.offset), pCallContext, pParams); +} + +// memoryfabricPreDestruct: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_memoryfabricPreDestruct(struct MemoryFabric *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset)); +} + +// memoryfabricControlFilter: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricControlFilter(struct MemoryFabric *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset), pCallContext, pParams); +} + +// memoryfabricIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body +static NvBool __nvoc_up_thunk_RsResource_memoryfabricIsPartialUnmapSupported(struct MemoryFabric *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset)); +} + +// memoryfabricMapTo: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricMapTo(struct MemoryFabric *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset), pParams); +} + +// memoryfabricUnmapFrom: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricUnmapFrom(struct MemoryFabric *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset), pParams); +} + +// memoryfabricGetRefCount: virtual inherited (res) base (mem) +static NvU32 __nvoc_up_thunk_RsResource_memoryfabricGetRefCount(struct MemoryFabric *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset)); +} + +// memoryfabricAddAdditionalDependants: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_memoryfabricAddAdditionalDependants(struct RsClient *pClient, struct MemoryFabric *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset), pReference); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_MemoryFabric = { /*numEntries=*/ 7, @@ -347,97 +379,134 @@ NV_STATUS __nvoc_ctor_MemoryFabric(MemoryFabric *pThis, CALL_CONTEXT * arg_pCall return status; } +// Vtable initialization static void __nvoc_init_funcTable_MemoryFabric_1(MemoryFabric *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // memoryfabricCanCopy -- virtual override (res) base (mem) pThis->__memoryfabricCanCopy__ = &memoryfabricCanCopy_IMPL; + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryFabric_resCanCopy; + // memoryfabricCopyConstruct -- virtual override (mem) base (mem) pThis->__memoryfabricCopyConstruct__ = &memoryfabricCopyConstruct_IMPL; + // memoryfabricControl -- virtual override (res) base (mem) pThis->__memoryfabricControl__ = &memoryfabricControl_IMPL; + pThis->__nvoc_base_Memory.__memControl__ = &__nvoc_down_thunk_MemoryFabric_memControl; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // memoryfabricCtrlGetInfo -- exported (id=0xf80101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__memoryfabricCtrlGetInfo__ = &memoryfabricCtrlGetInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2850u) + // memoryfabricCtrlCmdDescribe -- exported (id=0xf80102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x318u) pThis->__memoryfabricCtrlCmdDescribe__ = &memoryfabricCtrlCmdDescribe_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8810u) + // memoryfabricCtrlAttachMem -- exported (id=0xf80103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x908u) pThis->__memoryfabricCtrlAttachMem__ = &memoryfabricCtrlAttachMem_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8810u) + // memoryfabricCtrlDetachMem -- exported (id=0xf80104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x908u) pThis->__memoryfabricCtrlDetachMem__ = &memoryfabricCtrlDetachMem_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // memoryfabricCtrlGetNumAttachedMem -- exported (id=0xf80105) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__memoryfabricCtrlGetNumAttachedMem__ = &memoryfabricCtrlGetNumAttachedMem_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) + // memoryfabricCtrlGetAttachedMem -- exported (id=0xf80106) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) pThis->__memoryfabricCtrlGetAttachedMem__ = &memoryfabricCtrlGetAttachedMem_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x840u) + // memoryfabricCtrlGetPageLevelInfo -- exported (id=0xf80107) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x110u) pThis->__memoryfabricCtrlGetPageLevelInfo__ = &memoryfabricCtrlGetPageLevelInfo_IMPL; #endif - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_MemoryFabric_resCanCopy; + // memoryfabricIsDuplicate -- virtual inherited (mem) base (mem) + pThis->__memoryfabricIsDuplicate__ = &__nvoc_up_thunk_Memory_memoryfabricIsDuplicate; - pThis->__nvoc_base_Memory.__memControl__ = &__nvoc_thunk_MemoryFabric_memControl; + // memoryfabricGetMapAddrSpace -- virtual inherited (mem) base (mem) + pThis->__memoryfabricGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_memoryfabricGetMapAddrSpace; - pThis->__memoryfabricCheckMemInterUnmap__ = &__nvoc_thunk_Memory_memoryfabricCheckMemInterUnmap; + // memoryfabricMap -- virtual inherited (mem) base (mem) + pThis->__memoryfabricMap__ = &__nvoc_up_thunk_Memory_memoryfabricMap; - pThis->__memoryfabricShareCallback__ = &__nvoc_thunk_RmResource_memoryfabricShareCallback; + // memoryfabricUnmap -- virtual inherited (mem) base (mem) + pThis->__memoryfabricUnmap__ = &__nvoc_up_thunk_Memory_memoryfabricUnmap; - pThis->__memoryfabricMapTo__ = &__nvoc_thunk_RsResource_memoryfabricMapTo; + // memoryfabricGetMemInterMapParams -- virtual inherited (mem) base (mem) + pThis->__memoryfabricGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_memoryfabricGetMemInterMapParams; - pThis->__memoryfabricGetMapAddrSpace__ = &__nvoc_thunk_Memory_memoryfabricGetMapAddrSpace; + // memoryfabricCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body + pThis->__memoryfabricCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_memoryfabricCheckMemInterUnmap; - pThis->__memoryfabricIsExportAllowed__ = &__nvoc_thunk_Memory_memoryfabricIsExportAllowed; + // memoryfabricGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) + pThis->__memoryfabricGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_memoryfabricGetMemoryMappingDescriptor; - pThis->__memoryfabricGetRefCount__ = &__nvoc_thunk_RsResource_memoryfabricGetRefCount; + // memoryfabricCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body + pThis->__memoryfabricCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_memoryfabricCheckCopyPermissions; - pThis->__memoryfabricAddAdditionalDependants__ = &__nvoc_thunk_RsResource_memoryfabricAddAdditionalDependants; + // memoryfabricIsReady -- virtual inherited (mem) base (mem) + pThis->__memoryfabricIsReady__ = &__nvoc_up_thunk_Memory_memoryfabricIsReady; - pThis->__memoryfabricControl_Prologue__ = &__nvoc_thunk_RmResource_memoryfabricControl_Prologue; + // memoryfabricIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__memoryfabricIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_memoryfabricIsGpuMapAllowed; - pThis->__memoryfabricIsGpuMapAllowed__ = &__nvoc_thunk_Memory_memoryfabricIsGpuMapAllowed; + // memoryfabricIsExportAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__memoryfabricIsExportAllowed__ = &__nvoc_up_thunk_Memory_memoryfabricIsExportAllowed; - pThis->__memoryfabricUnmapFrom__ = &__nvoc_thunk_RsResource_memoryfabricUnmapFrom; + // memoryfabricAccessCallback -- virtual inherited (rmres) base (mem) + pThis->__memoryfabricAccessCallback__ = &__nvoc_up_thunk_RmResource_memoryfabricAccessCallback; - pThis->__memoryfabricControl_Epilogue__ = &__nvoc_thunk_RmResource_memoryfabricControl_Epilogue; + // memoryfabricShareCallback -- virtual inherited (rmres) base (mem) + pThis->__memoryfabricShareCallback__ = &__nvoc_up_thunk_RmResource_memoryfabricShareCallback; - pThis->__memoryfabricUnmap__ = &__nvoc_thunk_Memory_memoryfabricUnmap; + // memoryfabricControlSerialization_Prologue -- virtual inherited (rmres) base (mem) + pThis->__memoryfabricControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memoryfabricControlSerialization_Prologue; - pThis->__memoryfabricGetMemInterMapParams__ = &__nvoc_thunk_Memory_memoryfabricGetMemInterMapParams; + // memoryfabricControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__memoryfabricControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryfabricControlSerialization_Epilogue; - pThis->__memoryfabricGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_memoryfabricGetMemoryMappingDescriptor; + // memoryfabricControl_Prologue -- virtual inherited (rmres) base (mem) + pThis->__memoryfabricControl_Prologue__ = &__nvoc_up_thunk_RmResource_memoryfabricControl_Prologue; - pThis->__memoryfabricControlFilter__ = &__nvoc_thunk_RsResource_memoryfabricControlFilter; + // memoryfabricControl_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__memoryfabricControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryfabricControl_Epilogue; - pThis->__memoryfabricControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_memoryfabricControlSerialization_Prologue; + // memoryfabricPreDestruct -- virtual inherited (res) base (mem) + pThis->__memoryfabricPreDestruct__ = &__nvoc_up_thunk_RsResource_memoryfabricPreDestruct; - pThis->__memoryfabricIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_memoryfabricIsPartialUnmapSupported; + // memoryfabricControlFilter -- virtual inherited (res) base (mem) + pThis->__memoryfabricControlFilter__ = &__nvoc_up_thunk_RsResource_memoryfabricControlFilter; - pThis->__memoryfabricIsReady__ = &__nvoc_thunk_Memory_memoryfabricIsReady; + // memoryfabricIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body + pThis->__memoryfabricIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memoryfabricIsPartialUnmapSupported; - pThis->__memoryfabricCheckCopyPermissions__ = &__nvoc_thunk_Memory_memoryfabricCheckCopyPermissions; + // memoryfabricMapTo -- virtual inherited (res) base (mem) + pThis->__memoryfabricMapTo__ = &__nvoc_up_thunk_RsResource_memoryfabricMapTo; - pThis->__memoryfabricPreDestruct__ = &__nvoc_thunk_RsResource_memoryfabricPreDestruct; + // memoryfabricUnmapFrom -- virtual inherited (res) base (mem) + pThis->__memoryfabricUnmapFrom__ = &__nvoc_up_thunk_RsResource_memoryfabricUnmapFrom; - pThis->__memoryfabricIsDuplicate__ = &__nvoc_thunk_Memory_memoryfabricIsDuplicate; + // memoryfabricGetRefCount -- virtual inherited (res) base (mem) + pThis->__memoryfabricGetRefCount__ = &__nvoc_up_thunk_RsResource_memoryfabricGetRefCount; - pThis->__memoryfabricControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_memoryfabricControlSerialization_Epilogue; + // memoryfabricAddAdditionalDependants -- virtual inherited (res) base (mem) + pThis->__memoryfabricAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memoryfabricAddAdditionalDependants; +} // End __nvoc_init_funcTable_MemoryFabric_1 with approximately 36 basic block(s). - pThis->__memoryfabricMap__ = &__nvoc_thunk_Memory_memoryfabricMap; - - pThis->__memoryfabricAccessCallback__ = &__nvoc_thunk_RmResource_memoryfabricAccessCallback; -} +// Initialize vtable(s) for 34 virtual method(s). void __nvoc_init_funcTable_MemoryFabric(MemoryFabric *pThis) { + + // Initialize vtable(s) with 34 per-object function pointer(s). __nvoc_init_funcTable_MemoryFabric_1(pThis); } diff --git a/src/nvidia/generated/g_mem_fabric_nvoc.h b/src/nvidia/generated/g_mem_fabric_nvoc.h index 5a98afa2c7..b163a0a49e 100644 --- a/src/nvidia/generated/g_mem_fabric_nvoc.h +++ b/src/nvidia/generated/g_mem_fabric_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_MEM_FABRIC_NVOC_H_ #define _G_MEM_FABRIC_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -36,6 +43,7 @@ extern "C" { * *****************************************************************************/ +#pragma once #include "g_mem_fabric_nvoc.h" #ifndef _MEMORYFABRIC_H_ @@ -62,49 +70,58 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct MemoryFabric { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Memory *__nvoc_pbase_Memory; - struct MemoryFabric *__nvoc_pbase_MemoryFabric; - NvBool (*__memoryfabricCanCopy__)(struct MemoryFabric *); - NV_STATUS (*__memoryfabricCopyConstruct__)(struct MemoryFabric *, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); - NV_STATUS (*__memoryfabricControl__)(struct MemoryFabric *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memoryfabricCtrlGetInfo__)(struct MemoryFabric *, NV00F8_CTRL_GET_INFO_PARAMS *); - NV_STATUS (*__memoryfabricCtrlCmdDescribe__)(struct MemoryFabric *, NV00F8_CTRL_DESCRIBE_PARAMS *); - NV_STATUS (*__memoryfabricCtrlAttachMem__)(struct MemoryFabric *, NV00F8_CTRL_ATTACH_MEM_PARAMS *); - NV_STATUS (*__memoryfabricCtrlDetachMem__)(struct MemoryFabric *, NV00F8_CTRL_DETACH_MEM_PARAMS *); - NV_STATUS (*__memoryfabricCtrlGetNumAttachedMem__)(struct MemoryFabric *, NV00F8_CTRL_GET_NUM_ATTACHED_MEM_PARAMS *); - NV_STATUS (*__memoryfabricCtrlGetAttachedMem__)(struct MemoryFabric *, NV00F8_CTRL_GET_ATTACHED_MEM_PARAMS *); - NV_STATUS (*__memoryfabricCtrlGetPageLevelInfo__)(struct MemoryFabric *, NV00F8_CTRL_GET_PAGE_LEVEL_INFO_PARAMS *); - NV_STATUS (*__memoryfabricCheckMemInterUnmap__)(struct MemoryFabric *, NvBool); - NvBool (*__memoryfabricShareCallback__)(struct MemoryFabric *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__memoryfabricMapTo__)(struct MemoryFabric *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__memoryfabricGetMapAddrSpace__)(struct MemoryFabric *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvBool (*__memoryfabricIsExportAllowed__)(struct MemoryFabric *); - NvU32 (*__memoryfabricGetRefCount__)(struct MemoryFabric *); - void (*__memoryfabricAddAdditionalDependants__)(struct RsClient *, struct MemoryFabric *, RsResourceRef *); - NV_STATUS (*__memoryfabricControl_Prologue__)(struct MemoryFabric *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__memoryfabricIsGpuMapAllowed__)(struct MemoryFabric *, struct OBJGPU *); - NV_STATUS (*__memoryfabricUnmapFrom__)(struct MemoryFabric *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__memoryfabricControl_Epilogue__)(struct MemoryFabric *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memoryfabricUnmap__)(struct MemoryFabric *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__memoryfabricGetMemInterMapParams__)(struct MemoryFabric *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__memoryfabricGetMemoryMappingDescriptor__)(struct MemoryFabric *, MEMORY_DESCRIPTOR **); - NV_STATUS (*__memoryfabricControlFilter__)(struct MemoryFabric *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memoryfabricControlSerialization_Prologue__)(struct MemoryFabric *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__memoryfabricIsPartialUnmapSupported__)(struct MemoryFabric *); - NV_STATUS (*__memoryfabricIsReady__)(struct MemoryFabric *, NvBool); - NV_STATUS (*__memoryfabricCheckCopyPermissions__)(struct MemoryFabric *, struct OBJGPU *, struct Device *); - void (*__memoryfabricPreDestruct__)(struct MemoryFabric *); - NV_STATUS (*__memoryfabricIsDuplicate__)(struct MemoryFabric *, NvHandle, NvBool *); - void (*__memoryfabricControlSerialization_Epilogue__)(struct MemoryFabric *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memoryfabricMap__)(struct MemoryFabric *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__memoryfabricAccessCallback__)(struct MemoryFabric *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct Memory *__nvoc_pbase_Memory; // mem super + struct MemoryFabric *__nvoc_pbase_MemoryFabric; // memoryfabric + + // Vtable with 34 per-object function pointers + NvBool (*__memoryfabricCanCopy__)(struct MemoryFabric * /*this*/); // virtual override (res) base (mem) + NV_STATUS (*__memoryfabricCopyConstruct__)(struct MemoryFabric * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // virtual override (mem) base (mem) + NV_STATUS (*__memoryfabricControl__)(struct MemoryFabric * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (mem) + NV_STATUS (*__memoryfabricCtrlGetInfo__)(struct MemoryFabric * /*this*/, NV00F8_CTRL_GET_INFO_PARAMS *); // exported (id=0xf80101) + NV_STATUS (*__memoryfabricCtrlCmdDescribe__)(struct MemoryFabric * /*this*/, NV00F8_CTRL_DESCRIBE_PARAMS *); // exported (id=0xf80102) + NV_STATUS (*__memoryfabricCtrlAttachMem__)(struct MemoryFabric * /*this*/, NV00F8_CTRL_ATTACH_MEM_PARAMS *); // exported (id=0xf80103) + NV_STATUS (*__memoryfabricCtrlDetachMem__)(struct MemoryFabric * /*this*/, NV00F8_CTRL_DETACH_MEM_PARAMS *); // exported (id=0xf80104) + NV_STATUS (*__memoryfabricCtrlGetNumAttachedMem__)(struct MemoryFabric * /*this*/, NV00F8_CTRL_GET_NUM_ATTACHED_MEM_PARAMS *); // exported (id=0xf80105) + NV_STATUS (*__memoryfabricCtrlGetAttachedMem__)(struct MemoryFabric * /*this*/, NV00F8_CTRL_GET_ATTACHED_MEM_PARAMS *); // exported (id=0xf80106) + NV_STATUS (*__memoryfabricCtrlGetPageLevelInfo__)(struct MemoryFabric * /*this*/, NV00F8_CTRL_GET_PAGE_LEVEL_INFO_PARAMS *); // exported (id=0xf80107) + NV_STATUS (*__memoryfabricIsDuplicate__)(struct MemoryFabric * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) + NV_STATUS (*__memoryfabricGetMapAddrSpace__)(struct MemoryFabric * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) + NV_STATUS (*__memoryfabricMap__)(struct MemoryFabric * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__memoryfabricUnmap__)(struct MemoryFabric * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__memoryfabricGetMemInterMapParams__)(struct MemoryFabric * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (mem) base (mem) + NV_STATUS (*__memoryfabricCheckMemInterUnmap__)(struct MemoryFabric * /*this*/, NvBool); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__memoryfabricGetMemoryMappingDescriptor__)(struct MemoryFabric * /*this*/, MEMORY_DESCRIPTOR **); // virtual inherited (mem) base (mem) + NV_STATUS (*__memoryfabricCheckCopyPermissions__)(struct MemoryFabric * /*this*/, struct OBJGPU *, struct Device *); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__memoryfabricIsReady__)(struct MemoryFabric * /*this*/, NvBool); // virtual inherited (mem) base (mem) + NvBool (*__memoryfabricIsGpuMapAllowed__)(struct MemoryFabric * /*this*/, struct OBJGPU *); // inline virtual inherited (mem) base (mem) body + NvBool (*__memoryfabricIsExportAllowed__)(struct MemoryFabric * /*this*/); // inline virtual inherited (mem) base (mem) body + NvBool (*__memoryfabricAccessCallback__)(struct MemoryFabric * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (mem) + NvBool (*__memoryfabricShareCallback__)(struct MemoryFabric * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__memoryfabricControlSerialization_Prologue__)(struct MemoryFabric * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__memoryfabricControlSerialization_Epilogue__)(struct MemoryFabric * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__memoryfabricControl_Prologue__)(struct MemoryFabric * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__memoryfabricControl_Epilogue__)(struct MemoryFabric * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__memoryfabricPreDestruct__)(struct MemoryFabric * /*this*/); // virtual inherited (res) base (mem) + NV_STATUS (*__memoryfabricControlFilter__)(struct MemoryFabric * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (mem) + NvBool (*__memoryfabricIsPartialUnmapSupported__)(struct MemoryFabric * /*this*/); // inline virtual inherited (res) base (mem) body + NV_STATUS (*__memoryfabricMapTo__)(struct MemoryFabric * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (mem) + NV_STATUS (*__memoryfabricUnmapFrom__)(struct MemoryFabric * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (mem) + NvU32 (*__memoryfabricGetRefCount__)(struct MemoryFabric * /*this*/); // virtual inherited (res) base (mem) + void (*__memoryfabricAddAdditionalDependants__)(struct RsClient *, struct MemoryFabric * /*this*/, RsResourceRef *); // virtual inherited (res) base (mem) }; #ifndef __NVOC_CLASS_MemoryFabric_TYPEDEF__ @@ -116,6 +133,7 @@ typedef struct MemoryFabric MemoryFabric; #define __nvoc_class_id_MemoryFabric 0x127499 #endif /* __nvoc_class_id_MemoryFabric */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryFabric; #define __staticCast_MemoryFabric(pThis) \ @@ -128,203 +146,240 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryFabric; ((MemoryFabric*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(MemoryFabric))) #endif //__nvoc_mem_fabric_h_disabled - NV_STATUS __nvoc_objCreateDynamic_MemoryFabric(MemoryFabric**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_MemoryFabric(MemoryFabric**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_MemoryFabric(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_MemoryFabric((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define memoryfabricCanCopy_FNPTR(pMemoryFabric) pMemoryFabric->__memoryfabricCanCopy__ #define memoryfabricCanCopy(pMemoryFabric) memoryfabricCanCopy_DISPATCH(pMemoryFabric) +#define memoryfabricCopyConstruct_FNPTR(pMemoryFabric) pMemoryFabric->__memoryfabricCopyConstruct__ #define memoryfabricCopyConstruct(pMemoryFabric, pCallContext, pParams) memoryfabricCopyConstruct_DISPATCH(pMemoryFabric, pCallContext, pParams) +#define memoryfabricControl_FNPTR(pMemoryFabric) pMemoryFabric->__memoryfabricControl__ #define memoryfabricControl(pMemoryFabric, pCallContext, pParams) memoryfabricControl_DISPATCH(pMemoryFabric, pCallContext, pParams) +#define memoryfabricCtrlGetInfo_FNPTR(pMemoryFabric) pMemoryFabric->__memoryfabricCtrlGetInfo__ #define memoryfabricCtrlGetInfo(pMemoryFabric, pParams) memoryfabricCtrlGetInfo_DISPATCH(pMemoryFabric, pParams) +#define memoryfabricCtrlCmdDescribe_FNPTR(pMemoryFabric) pMemoryFabric->__memoryfabricCtrlCmdDescribe__ #define memoryfabricCtrlCmdDescribe(pMemoryFabric, pParams) memoryfabricCtrlCmdDescribe_DISPATCH(pMemoryFabric, pParams) +#define memoryfabricCtrlAttachMem_FNPTR(pMemoryFabric) pMemoryFabric->__memoryfabricCtrlAttachMem__ #define memoryfabricCtrlAttachMem(pMemoryFabric, pParams) memoryfabricCtrlAttachMem_DISPATCH(pMemoryFabric, pParams) +#define memoryfabricCtrlDetachMem_FNPTR(pMemoryFabric) pMemoryFabric->__memoryfabricCtrlDetachMem__ #define memoryfabricCtrlDetachMem(pMemoryFabric, pParams) memoryfabricCtrlDetachMem_DISPATCH(pMemoryFabric, pParams) +#define memoryfabricCtrlGetNumAttachedMem_FNPTR(pMemoryFabric) pMemoryFabric->__memoryfabricCtrlGetNumAttachedMem__ #define memoryfabricCtrlGetNumAttachedMem(pMemoryFabric, pParams) memoryfabricCtrlGetNumAttachedMem_DISPATCH(pMemoryFabric, pParams) +#define memoryfabricCtrlGetAttachedMem_FNPTR(pMemoryFabric) pMemoryFabric->__memoryfabricCtrlGetAttachedMem__ #define memoryfabricCtrlGetAttachedMem(pMemoryFabric, pParams) memoryfabricCtrlGetAttachedMem_DISPATCH(pMemoryFabric, pParams) +#define memoryfabricCtrlGetPageLevelInfo_FNPTR(pMemoryFabric) pMemoryFabric->__memoryfabricCtrlGetPageLevelInfo__ #define memoryfabricCtrlGetPageLevelInfo(pMemoryFabric, pParams) memoryfabricCtrlGetPageLevelInfo_DISPATCH(pMemoryFabric, pParams) -#define memoryfabricCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) memoryfabricCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define memoryfabricShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) memoryfabricShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define memoryfabricMapTo(pResource, pParams) memoryfabricMapTo_DISPATCH(pResource, pParams) +#define memoryfabricIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define memoryfabricIsDuplicate(pMemory, hMemory, pDuplicate) memoryfabricIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) +#define memoryfabricGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ #define memoryfabricGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) memoryfabricGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define memoryfabricIsExportAllowed(pMemory) memoryfabricIsExportAllowed_DISPATCH(pMemory) -#define memoryfabricGetRefCount(pResource) memoryfabricGetRefCount_DISPATCH(pResource) -#define memoryfabricAddAdditionalDependants(pClient, pResource, pReference) memoryfabricAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define memoryfabricControl_Prologue(pResource, pCallContext, pParams) memoryfabricControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricIsGpuMapAllowed(pMemory, pGpu) memoryfabricIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define memoryfabricUnmapFrom(pResource, pParams) memoryfabricUnmapFrom_DISPATCH(pResource, pParams) -#define memoryfabricControl_Epilogue(pResource, pCallContext, pParams) memoryfabricControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define memoryfabricMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define memoryfabricMap(pMemory, pCallContext, pParams, pCpuMapping) memoryfabricMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define memoryfabricUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ #define memoryfabricUnmap(pMemory, pCallContext, pCpuMapping) memoryfabricUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) +#define memoryfabricGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ #define memoryfabricGetMemInterMapParams(pMemory, pParams) memoryfabricGetMemInterMapParams_DISPATCH(pMemory, pParams) +#define memoryfabricCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define memoryfabricCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) memoryfabricCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) +#define memoryfabricGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ #define memoryfabricGetMemoryMappingDescriptor(pMemory, ppMemDesc) memoryfabricGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define memoryfabricControlFilter(pResource, pCallContext, pParams) memoryfabricControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricControlSerialization_Prologue(pResource, pCallContext, pParams) memoryfabricControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricIsPartialUnmapSupported(pResource) memoryfabricIsPartialUnmapSupported_DISPATCH(pResource) -#define memoryfabricIsReady(pMemory, bCopyConstructorContext) memoryfabricIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define memoryfabricCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ #define memoryfabricCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) memoryfabricCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define memoryfabricPreDestruct(pResource) memoryfabricPreDestruct_DISPATCH(pResource) -#define memoryfabricIsDuplicate(pMemory, hMemory, pDuplicate) memoryfabricIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define memoryfabricControlSerialization_Epilogue(pResource, pCallContext, pParams) memoryfabricControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricMap(pMemory, pCallContext, pParams, pCpuMapping) memoryfabricMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define memoryfabricIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define memoryfabricIsReady(pMemory, bCopyConstructorContext) memoryfabricIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define memoryfabricIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define memoryfabricIsGpuMapAllowed(pMemory, pGpu) memoryfabricIsGpuMapAllowed_DISPATCH(pMemory, pGpu) +#define memoryfabricIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define memoryfabricIsExportAllowed(pMemory) memoryfabricIsExportAllowed_DISPATCH(pMemory) +#define memoryfabricAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ #define memoryfabricAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memoryfabricAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool memoryfabricCanCopy_IMPL(struct MemoryFabric *pMemoryFabric); +#define memoryfabricShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define memoryfabricShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) memoryfabricShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define memoryfabricControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define memoryfabricControlSerialization_Prologue(pResource, pCallContext, pParams) memoryfabricControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define memoryfabricControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define memoryfabricControlSerialization_Epilogue(pResource, pCallContext, pParams) memoryfabricControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define memoryfabricControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define memoryfabricControl_Prologue(pResource, pCallContext, pParams) memoryfabricControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define memoryfabricControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define memoryfabricControl_Epilogue(pResource, pCallContext, pParams) memoryfabricControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define memoryfabricPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define memoryfabricPreDestruct(pResource) memoryfabricPreDestruct_DISPATCH(pResource) +#define memoryfabricControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define memoryfabricControlFilter(pResource, pCallContext, pParams) memoryfabricControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define memoryfabricIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define memoryfabricIsPartialUnmapSupported(pResource) memoryfabricIsPartialUnmapSupported_DISPATCH(pResource) +#define memoryfabricMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define memoryfabricMapTo(pResource, pParams) memoryfabricMapTo_DISPATCH(pResource, pParams) +#define memoryfabricUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define memoryfabricUnmapFrom(pResource, pParams) memoryfabricUnmapFrom_DISPATCH(pResource, pParams) +#define memoryfabricGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define memoryfabricGetRefCount(pResource) memoryfabricGetRefCount_DISPATCH(pResource) +#define memoryfabricAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define memoryfabricAddAdditionalDependants(pClient, pResource, pReference) memoryfabricAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NvBool memoryfabricCanCopy_DISPATCH(struct MemoryFabric *pMemoryFabric) { return pMemoryFabric->__memoryfabricCanCopy__(pMemoryFabric); } -NV_STATUS memoryfabricCopyConstruct_IMPL(struct MemoryFabric *pMemoryFabric, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); - static inline NV_STATUS memoryfabricCopyConstruct_DISPATCH(struct MemoryFabric *pMemoryFabric, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { return pMemoryFabric->__memoryfabricCopyConstruct__(pMemoryFabric, pCallContext, pParams); } -NV_STATUS memoryfabricControl_IMPL(struct MemoryFabric *pMemoryFabric, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline NV_STATUS memoryfabricControl_DISPATCH(struct MemoryFabric *pMemoryFabric, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pMemoryFabric->__memoryfabricControl__(pMemoryFabric, pCallContext, pParams); } -NV_STATUS memoryfabricCtrlGetInfo_IMPL(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_GET_INFO_PARAMS *pParams); - static inline NV_STATUS memoryfabricCtrlGetInfo_DISPATCH(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_GET_INFO_PARAMS *pParams) { return pMemoryFabric->__memoryfabricCtrlGetInfo__(pMemoryFabric, pParams); } -NV_STATUS memoryfabricCtrlCmdDescribe_IMPL(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_DESCRIBE_PARAMS *pParams); - static inline NV_STATUS memoryfabricCtrlCmdDescribe_DISPATCH(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_DESCRIBE_PARAMS *pParams) { return pMemoryFabric->__memoryfabricCtrlCmdDescribe__(pMemoryFabric, pParams); } -NV_STATUS memoryfabricCtrlAttachMem_IMPL(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_ATTACH_MEM_PARAMS *pParams); - static inline NV_STATUS memoryfabricCtrlAttachMem_DISPATCH(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_ATTACH_MEM_PARAMS *pParams) { return pMemoryFabric->__memoryfabricCtrlAttachMem__(pMemoryFabric, pParams); } -NV_STATUS memoryfabricCtrlDetachMem_IMPL(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_DETACH_MEM_PARAMS *pParams); - static inline NV_STATUS memoryfabricCtrlDetachMem_DISPATCH(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_DETACH_MEM_PARAMS *pParams) { return pMemoryFabric->__memoryfabricCtrlDetachMem__(pMemoryFabric, pParams); } -NV_STATUS memoryfabricCtrlGetNumAttachedMem_IMPL(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_GET_NUM_ATTACHED_MEM_PARAMS *pParams); - static inline NV_STATUS memoryfabricCtrlGetNumAttachedMem_DISPATCH(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_GET_NUM_ATTACHED_MEM_PARAMS *pParams) { return pMemoryFabric->__memoryfabricCtrlGetNumAttachedMem__(pMemoryFabric, pParams); } -NV_STATUS memoryfabricCtrlGetAttachedMem_IMPL(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_GET_ATTACHED_MEM_PARAMS *pParams); - static inline NV_STATUS memoryfabricCtrlGetAttachedMem_DISPATCH(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_GET_ATTACHED_MEM_PARAMS *pParams) { return pMemoryFabric->__memoryfabricCtrlGetAttachedMem__(pMemoryFabric, pParams); } -NV_STATUS memoryfabricCtrlGetPageLevelInfo_IMPL(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_GET_PAGE_LEVEL_INFO_PARAMS *pParams); - static inline NV_STATUS memoryfabricCtrlGetPageLevelInfo_DISPATCH(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_GET_PAGE_LEVEL_INFO_PARAMS *pParams) { return pMemoryFabric->__memoryfabricCtrlGetPageLevelInfo__(pMemoryFabric, pParams); } -static inline NV_STATUS memoryfabricCheckMemInterUnmap_DISPATCH(struct MemoryFabric *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__memoryfabricCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); -} - -static inline NvBool memoryfabricShareCallback_DISPATCH(struct MemoryFabric *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__memoryfabricShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS memoryfabricMapTo_DISPATCH(struct MemoryFabric *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__memoryfabricMapTo__(pResource, pParams); +static inline NV_STATUS memoryfabricIsDuplicate_DISPATCH(struct MemoryFabric *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return pMemory->__memoryfabricIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS memoryfabricGetMapAddrSpace_DISPATCH(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pMemory->__memoryfabricGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } -static inline NvBool memoryfabricIsExportAllowed_DISPATCH(struct MemoryFabric *pMemory) { - return pMemory->__memoryfabricIsExportAllowed__(pMemory); +static inline NV_STATUS memoryfabricMap_DISPATCH(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pMemory->__memoryfabricMap__(pMemory, pCallContext, pParams, pCpuMapping); } -static inline NvU32 memoryfabricGetRefCount_DISPATCH(struct MemoryFabric *pResource) { - return pResource->__memoryfabricGetRefCount__(pResource); +static inline NV_STATUS memoryfabricUnmap_DISPATCH(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pMemory->__memoryfabricUnmap__(pMemory, pCallContext, pCpuMapping); } -static inline void memoryfabricAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryFabric *pResource, RsResourceRef *pReference) { - pResource->__memoryfabricAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS memoryfabricGetMemInterMapParams_DISPATCH(struct MemoryFabric *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pMemory->__memoryfabricGetMemInterMapParams__(pMemory, pParams); } -static inline NV_STATUS memoryfabricControl_Prologue_DISPATCH(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryfabricControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS memoryfabricCheckMemInterUnmap_DISPATCH(struct MemoryFabric *pMemory, NvBool bSubdeviceHandleProvided) { + return pMemory->__memoryfabricCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } -static inline NvBool memoryfabricIsGpuMapAllowed_DISPATCH(struct MemoryFabric *pMemory, struct OBJGPU *pGpu) { - return pMemory->__memoryfabricIsGpuMapAllowed__(pMemory, pGpu); +static inline NV_STATUS memoryfabricGetMemoryMappingDescriptor_DISPATCH(struct MemoryFabric *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return pMemory->__memoryfabricGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } -static inline NV_STATUS memoryfabricUnmapFrom_DISPATCH(struct MemoryFabric *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__memoryfabricUnmapFrom__(pResource, pParams); +static inline NV_STATUS memoryfabricCheckCopyPermissions_DISPATCH(struct MemoryFabric *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return pMemory->__memoryfabricCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } -static inline void memoryfabricControl_Epilogue_DISPATCH(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memoryfabricControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS memoryfabricIsReady_DISPATCH(struct MemoryFabric *pMemory, NvBool bCopyConstructorContext) { + return pMemory->__memoryfabricIsReady__(pMemory, bCopyConstructorContext); } -static inline NV_STATUS memoryfabricUnmap_DISPATCH(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__memoryfabricUnmap__(pMemory, pCallContext, pCpuMapping); +static inline NvBool memoryfabricIsGpuMapAllowed_DISPATCH(struct MemoryFabric *pMemory, struct OBJGPU *pGpu) { + return pMemory->__memoryfabricIsGpuMapAllowed__(pMemory, pGpu); } -static inline NV_STATUS memoryfabricGetMemInterMapParams_DISPATCH(struct MemoryFabric *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__memoryfabricGetMemInterMapParams__(pMemory, pParams); +static inline NvBool memoryfabricIsExportAllowed_DISPATCH(struct MemoryFabric *pMemory) { + return pMemory->__memoryfabricIsExportAllowed__(pMemory); } -static inline NV_STATUS memoryfabricGetMemoryMappingDescriptor_DISPATCH(struct MemoryFabric *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__memoryfabricGetMemoryMappingDescriptor__(pMemory, ppMemDesc); +static inline NvBool memoryfabricAccessCallback_DISPATCH(struct MemoryFabric *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__memoryfabricAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS memoryfabricControlFilter_DISPATCH(struct MemoryFabric *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryfabricControlFilter__(pResource, pCallContext, pParams); +static inline NvBool memoryfabricShareCallback_DISPATCH(struct MemoryFabric *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__memoryfabricShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS memoryfabricControlSerialization_Prologue_DISPATCH(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__memoryfabricControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool memoryfabricIsPartialUnmapSupported_DISPATCH(struct MemoryFabric *pResource) { - return pResource->__memoryfabricIsPartialUnmapSupported__(pResource); +static inline void memoryfabricControlSerialization_Epilogue_DISPATCH(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__memoryfabricControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS memoryfabricIsReady_DISPATCH(struct MemoryFabric *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__memoryfabricIsReady__(pMemory, bCopyConstructorContext); +static inline NV_STATUS memoryfabricControl_Prologue_DISPATCH(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__memoryfabricControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS memoryfabricCheckCopyPermissions_DISPATCH(struct MemoryFabric *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__memoryfabricCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); +static inline void memoryfabricControl_Epilogue_DISPATCH(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__memoryfabricControl_Epilogue__(pResource, pCallContext, pParams); } static inline void memoryfabricPreDestruct_DISPATCH(struct MemoryFabric *pResource) { pResource->__memoryfabricPreDestruct__(pResource); } -static inline NV_STATUS memoryfabricIsDuplicate_DISPATCH(struct MemoryFabric *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__memoryfabricIsDuplicate__(pMemory, hMemory, pDuplicate); +static inline NV_STATUS memoryfabricControlFilter_DISPATCH(struct MemoryFabric *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__memoryfabricControlFilter__(pResource, pCallContext, pParams); } -static inline void memoryfabricControlSerialization_Epilogue_DISPATCH(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memoryfabricControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool memoryfabricIsPartialUnmapSupported_DISPATCH(struct MemoryFabric *pResource) { + return pResource->__memoryfabricIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS memoryfabricMap_DISPATCH(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__memoryfabricMap__(pMemory, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS memoryfabricMapTo_DISPATCH(struct MemoryFabric *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__memoryfabricMapTo__(pResource, pParams); } -static inline NvBool memoryfabricAccessCallback_DISPATCH(struct MemoryFabric *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__memoryfabricAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS memoryfabricUnmapFrom_DISPATCH(struct MemoryFabric *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__memoryfabricUnmapFrom__(pResource, pParams); } +static inline NvU32 memoryfabricGetRefCount_DISPATCH(struct MemoryFabric *pResource) { + return pResource->__memoryfabricGetRefCount__(pResource); +} + +static inline void memoryfabricAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryFabric *pResource, RsResourceRef *pReference) { + pResource->__memoryfabricAddAdditionalDependants__(pClient, pResource, pReference); +} + +NvBool memoryfabricCanCopy_IMPL(struct MemoryFabric *pMemoryFabric); + +NV_STATUS memoryfabricCopyConstruct_IMPL(struct MemoryFabric *pMemoryFabric, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); + +NV_STATUS memoryfabricControl_IMPL(struct MemoryFabric *pMemoryFabric, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +NV_STATUS memoryfabricCtrlGetInfo_IMPL(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_GET_INFO_PARAMS *pParams); + +NV_STATUS memoryfabricCtrlCmdDescribe_IMPL(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_DESCRIBE_PARAMS *pParams); + +NV_STATUS memoryfabricCtrlAttachMem_IMPL(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_ATTACH_MEM_PARAMS *pParams); + +NV_STATUS memoryfabricCtrlDetachMem_IMPL(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_DETACH_MEM_PARAMS *pParams); + +NV_STATUS memoryfabricCtrlGetNumAttachedMem_IMPL(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_GET_NUM_ATTACHED_MEM_PARAMS *pParams); + +NV_STATUS memoryfabricCtrlGetAttachedMem_IMPL(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_GET_ATTACHED_MEM_PARAMS *pParams); + +NV_STATUS memoryfabricCtrlGetPageLevelInfo_IMPL(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_GET_PAGE_LEVEL_INFO_PARAMS *pParams); + NV_STATUS memoryfabricConstruct_IMPL(struct MemoryFabric *arg_pMemoryFabric, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_memoryfabricConstruct(arg_pMemoryFabric, arg_pCallContext, arg_pParams) memoryfabricConstruct_IMPL(arg_pMemoryFabric, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_mem_list_nvoc.c b/src/nvidia/generated/g_mem_list_nvoc.c index bc8e50f32e..d36cbd66c1 100644 --- a/src/nvidia/generated/g_mem_list_nvoc.c +++ b/src/nvidia/generated/g_mem_list_nvoc.c @@ -93,110 +93,142 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryList = /*pExportInfo=*/ &__nvoc_export_info_MemoryList }; -static NvBool __nvoc_thunk_MemoryList_resCanCopy(struct RsResource *pMemoryList) { - return memlistCanCopy((struct MemoryList *)(((unsigned char *)pMemoryList) - __nvoc_rtti_MemoryList_RsResource.offset)); +// 1 down-thunk(s) defined to bridge methods in MemoryList from superclasses + +// memlistCanCopy: virtual override (res) base (mem) +static NvBool __nvoc_down_thunk_MemoryList_resCanCopy(struct RsResource *pMemoryList) { + return memlistCanCopy((struct MemoryList *)(((unsigned char *) pMemoryList) - __nvoc_rtti_MemoryList_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_memlistCheckMemInterUnmap(struct MemoryList *pMemory, NvBool bSubdeviceHandleProvided) { - return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryList_Memory.offset), bSubdeviceHandleProvided); + +// 25 up-thunk(s) defined to bridge methods in MemoryList to superclasses + +// memlistIsDuplicate: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memlistIsDuplicate(struct MemoryList *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_RmResource_memlistShareCallback(struct MemoryList *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryList_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// memlistGetMapAddrSpace: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memlistGetMapAddrSpace(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_RsResource_memlistMapTo(struct MemoryList *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryList_RsResource.offset), pParams); +// memlistControl: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memlistControl(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_memlistGetMapAddrSpace(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return memGetMapAddrSpace((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pCallContext, mapFlags, pAddrSpace); +// memlistMap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memlistMap(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pCallContext, pParams, pCpuMapping); } -static NvBool __nvoc_thunk_Memory_memlistIsExportAllowed(struct MemoryList *pMemory) { - return memIsExportAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryList_Memory.offset)); +// memlistUnmap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memlistUnmap(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pCallContext, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_memlistGetRefCount(struct MemoryList *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryList_RsResource.offset)); +// memlistGetMemInterMapParams: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memlistGetMemInterMapParams(struct MemoryList *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pParams); } -static void __nvoc_thunk_RsResource_memlistAddAdditionalDependants(struct RsClient *pClient, struct MemoryList *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryList_RsResource.offset), pReference); +// memlistCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_memlistCheckMemInterUnmap(struct MemoryList *pMemory, NvBool bSubdeviceHandleProvided) { + return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RmResource_memlistControl_Prologue(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryList_RmResource.offset), pCallContext, pParams); +// memlistGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memlistGetMemoryMappingDescriptor(struct MemoryList *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), ppMemDesc); } -static NvBool __nvoc_thunk_Memory_memlistIsGpuMapAllowed(struct MemoryList *pMemory, struct OBJGPU *pGpu) { - return memIsGpuMapAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pGpu); +// memlistCheckCopyPermissions: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_memlistCheckCopyPermissions(struct MemoryList *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pDstGpu, pDstDevice); } -static NV_STATUS __nvoc_thunk_RsResource_memlistUnmapFrom(struct MemoryList *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryList_RsResource.offset), pParams); +// memlistIsReady: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memlistIsReady(struct MemoryList *pMemory, NvBool bCopyConstructorContext) { + return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), bCopyConstructorContext); } -static void __nvoc_thunk_RmResource_memlistControl_Epilogue(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryList_RmResource.offset), pCallContext, pParams); +// memlistIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_memlistIsGpuMapAllowed(struct MemoryList *pMemory, struct OBJGPU *pGpu) { + return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pGpu); } -static NV_STATUS __nvoc_thunk_Memory_memlistControl(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memControl((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pCallContext, pParams); +// memlistIsExportAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_memlistIsExportAllowed(struct MemoryList *pMemory) { + return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset)); } -static NV_STATUS __nvoc_thunk_Memory_memlistUnmap(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pCallContext, pCpuMapping); +// memlistAccessCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_memlistAccessCallback(struct MemoryList *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_Memory_memlistGetMemInterMapParams(struct MemoryList *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pParams); +// memlistShareCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_memlistShareCallback(struct MemoryList *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_Memory_memlistGetMemoryMappingDescriptor(struct MemoryList *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryList_Memory.offset), ppMemDesc); +// memlistControlSerialization_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_memlistControlSerialization_Prologue(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_memlistControlFilter(struct MemoryList *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryList_RsResource.offset), pCallContext, pParams); +// memlistControlSerialization_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_memlistControlSerialization_Epilogue(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_memlistControlSerialization_Prologue(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryList_RmResource.offset), pCallContext, pParams); +// memlistControl_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_memlistControl_Prologue(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_memlistIsPartialUnmapSupported(struct MemoryList *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryList_RsResource.offset)); +// memlistControl_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_memlistControl_Epilogue(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_memlistIsReady(struct MemoryList *pMemory, NvBool bCopyConstructorContext) { - return memIsReady((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryList_Memory.offset), bCopyConstructorContext); +// memlistPreDestruct: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_memlistPreDestruct(struct MemoryList *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_memlistCheckCopyPermissions(struct MemoryList *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return memCheckCopyPermissions((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pDstGpu, pDstDevice); +// memlistControlFilter: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_memlistControlFilter(struct MemoryList *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_memlistPreDestruct(struct MemoryList *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryList_RsResource.offset)); +// memlistIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body +static NvBool __nvoc_up_thunk_RsResource_memlistIsPartialUnmapSupported(struct MemoryList *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_memlistIsDuplicate(struct MemoryList *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryList_Memory.offset), hMemory, pDuplicate); +// memlistMapTo: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_memlistMapTo(struct MemoryList *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_memlistControlSerialization_Epilogue(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryList_RmResource.offset), pCallContext, pParams); +// memlistUnmapFrom: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_memlistUnmapFrom(struct MemoryList *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_Memory_memlistMap(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pCallContext, pParams, pCpuMapping); +// memlistGetRefCount: virtual inherited (res) base (mem) +static NvU32 __nvoc_up_thunk_RsResource_memlistGetRefCount(struct MemoryList *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_memlistAccessCallback(struct MemoryList *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryList_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// memlistAddAdditionalDependants: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_memlistAddAdditionalDependants(struct RsClient *pClient, struct MemoryList *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_MemoryList = { /*numEntries=*/ 0, @@ -232,65 +264,95 @@ NV_STATUS __nvoc_ctor_MemoryList(MemoryList *pThis, CALL_CONTEXT * arg_pCallCont return status; } +// Vtable initialization static void __nvoc_init_funcTable_MemoryList_1(MemoryList *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // memlistCanCopy -- virtual override (res) base (mem) pThis->__memlistCanCopy__ = &memlistCanCopy_IMPL; + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryList_resCanCopy; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_MemoryList_resCanCopy; + // memlistIsDuplicate -- virtual inherited (mem) base (mem) + pThis->__memlistIsDuplicate__ = &__nvoc_up_thunk_Memory_memlistIsDuplicate; - pThis->__memlistCheckMemInterUnmap__ = &__nvoc_thunk_Memory_memlistCheckMemInterUnmap; + // memlistGetMapAddrSpace -- virtual inherited (mem) base (mem) + pThis->__memlistGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_memlistGetMapAddrSpace; - pThis->__memlistShareCallback__ = &__nvoc_thunk_RmResource_memlistShareCallback; + // memlistControl -- virtual inherited (mem) base (mem) + pThis->__memlistControl__ = &__nvoc_up_thunk_Memory_memlistControl; - pThis->__memlistMapTo__ = &__nvoc_thunk_RsResource_memlistMapTo; + // memlistMap -- virtual inherited (mem) base (mem) + pThis->__memlistMap__ = &__nvoc_up_thunk_Memory_memlistMap; - pThis->__memlistGetMapAddrSpace__ = &__nvoc_thunk_Memory_memlistGetMapAddrSpace; + // memlistUnmap -- virtual inherited (mem) base (mem) + pThis->__memlistUnmap__ = &__nvoc_up_thunk_Memory_memlistUnmap; - pThis->__memlistIsExportAllowed__ = &__nvoc_thunk_Memory_memlistIsExportAllowed; + // memlistGetMemInterMapParams -- virtual inherited (mem) base (mem) + pThis->__memlistGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_memlistGetMemInterMapParams; - pThis->__memlistGetRefCount__ = &__nvoc_thunk_RsResource_memlistGetRefCount; + // memlistCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body + pThis->__memlistCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_memlistCheckMemInterUnmap; - pThis->__memlistAddAdditionalDependants__ = &__nvoc_thunk_RsResource_memlistAddAdditionalDependants; + // memlistGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) + pThis->__memlistGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_memlistGetMemoryMappingDescriptor; - pThis->__memlistControl_Prologue__ = &__nvoc_thunk_RmResource_memlistControl_Prologue; + // memlistCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body + pThis->__memlistCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_memlistCheckCopyPermissions; - pThis->__memlistIsGpuMapAllowed__ = &__nvoc_thunk_Memory_memlistIsGpuMapAllowed; + // memlistIsReady -- virtual inherited (mem) base (mem) + pThis->__memlistIsReady__ = &__nvoc_up_thunk_Memory_memlistIsReady; - pThis->__memlistUnmapFrom__ = &__nvoc_thunk_RsResource_memlistUnmapFrom; + // memlistIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__memlistIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_memlistIsGpuMapAllowed; - pThis->__memlistControl_Epilogue__ = &__nvoc_thunk_RmResource_memlistControl_Epilogue; + // memlistIsExportAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__memlistIsExportAllowed__ = &__nvoc_up_thunk_Memory_memlistIsExportAllowed; - pThis->__memlistControl__ = &__nvoc_thunk_Memory_memlistControl; + // memlistAccessCallback -- virtual inherited (rmres) base (mem) + pThis->__memlistAccessCallback__ = &__nvoc_up_thunk_RmResource_memlistAccessCallback; - pThis->__memlistUnmap__ = &__nvoc_thunk_Memory_memlistUnmap; + // memlistShareCallback -- virtual inherited (rmres) base (mem) + pThis->__memlistShareCallback__ = &__nvoc_up_thunk_RmResource_memlistShareCallback; - pThis->__memlistGetMemInterMapParams__ = &__nvoc_thunk_Memory_memlistGetMemInterMapParams; + // memlistControlSerialization_Prologue -- virtual inherited (rmres) base (mem) + pThis->__memlistControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memlistControlSerialization_Prologue; - pThis->__memlistGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_memlistGetMemoryMappingDescriptor; + // memlistControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__memlistControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memlistControlSerialization_Epilogue; - pThis->__memlistControlFilter__ = &__nvoc_thunk_RsResource_memlistControlFilter; + // memlistControl_Prologue -- virtual inherited (rmres) base (mem) + pThis->__memlistControl_Prologue__ = &__nvoc_up_thunk_RmResource_memlistControl_Prologue; - pThis->__memlistControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_memlistControlSerialization_Prologue; + // memlistControl_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__memlistControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memlistControl_Epilogue; - pThis->__memlistIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_memlistIsPartialUnmapSupported; + // memlistPreDestruct -- virtual inherited (res) base (mem) + pThis->__memlistPreDestruct__ = &__nvoc_up_thunk_RsResource_memlistPreDestruct; - pThis->__memlistIsReady__ = &__nvoc_thunk_Memory_memlistIsReady; + // memlistControlFilter -- virtual inherited (res) base (mem) + pThis->__memlistControlFilter__ = &__nvoc_up_thunk_RsResource_memlistControlFilter; - pThis->__memlistCheckCopyPermissions__ = &__nvoc_thunk_Memory_memlistCheckCopyPermissions; + // memlistIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body + pThis->__memlistIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memlistIsPartialUnmapSupported; - pThis->__memlistPreDestruct__ = &__nvoc_thunk_RsResource_memlistPreDestruct; + // memlistMapTo -- virtual inherited (res) base (mem) + pThis->__memlistMapTo__ = &__nvoc_up_thunk_RsResource_memlistMapTo; - pThis->__memlistIsDuplicate__ = &__nvoc_thunk_Memory_memlistIsDuplicate; + // memlistUnmapFrom -- virtual inherited (res) base (mem) + pThis->__memlistUnmapFrom__ = &__nvoc_up_thunk_RsResource_memlistUnmapFrom; - pThis->__memlistControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_memlistControlSerialization_Epilogue; + // memlistGetRefCount -- virtual inherited (res) base (mem) + pThis->__memlistGetRefCount__ = &__nvoc_up_thunk_RsResource_memlistGetRefCount; - pThis->__memlistMap__ = &__nvoc_thunk_Memory_memlistMap; + // memlistAddAdditionalDependants -- virtual inherited (res) base (mem) + pThis->__memlistAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memlistAddAdditionalDependants; +} // End __nvoc_init_funcTable_MemoryList_1 with approximately 27 basic block(s). - pThis->__memlistAccessCallback__ = &__nvoc_thunk_RmResource_memlistAccessCallback; -} +// Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_MemoryList(MemoryList *pThis) { + + // Initialize vtable(s) with 26 per-object function pointer(s). __nvoc_init_funcTable_MemoryList_1(pThis); } diff --git a/src/nvidia/generated/g_mem_list_nvoc.h b/src/nvidia/generated/g_mem_list_nvoc.h index 290a17fd33..4234805cbd 100644 --- a/src/nvidia/generated/g_mem_list_nvoc.h +++ b/src/nvidia/generated/g_mem_list_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_MEM_LIST_NVOC_H_ #define _G_MEM_LIST_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_mem_list_nvoc.h" #ifndef _MEMORY_LIST_H_ @@ -50,41 +58,50 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct MemoryList { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Memory *__nvoc_pbase_Memory; - struct MemoryList *__nvoc_pbase_MemoryList; - NvBool (*__memlistCanCopy__)(struct MemoryList *); - NV_STATUS (*__memlistCheckMemInterUnmap__)(struct MemoryList *, NvBool); - NvBool (*__memlistShareCallback__)(struct MemoryList *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__memlistMapTo__)(struct MemoryList *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__memlistGetMapAddrSpace__)(struct MemoryList *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvBool (*__memlistIsExportAllowed__)(struct MemoryList *); - NvU32 (*__memlistGetRefCount__)(struct MemoryList *); - void (*__memlistAddAdditionalDependants__)(struct RsClient *, struct MemoryList *, RsResourceRef *); - NV_STATUS (*__memlistControl_Prologue__)(struct MemoryList *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__memlistIsGpuMapAllowed__)(struct MemoryList *, struct OBJGPU *); - NV_STATUS (*__memlistUnmapFrom__)(struct MemoryList *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__memlistControl_Epilogue__)(struct MemoryList *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memlistControl__)(struct MemoryList *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memlistUnmap__)(struct MemoryList *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__memlistGetMemInterMapParams__)(struct MemoryList *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__memlistGetMemoryMappingDescriptor__)(struct MemoryList *, MEMORY_DESCRIPTOR **); - NV_STATUS (*__memlistControlFilter__)(struct MemoryList *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memlistControlSerialization_Prologue__)(struct MemoryList *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__memlistIsPartialUnmapSupported__)(struct MemoryList *); - NV_STATUS (*__memlistIsReady__)(struct MemoryList *, NvBool); - NV_STATUS (*__memlistCheckCopyPermissions__)(struct MemoryList *, struct OBJGPU *, struct Device *); - void (*__memlistPreDestruct__)(struct MemoryList *); - NV_STATUS (*__memlistIsDuplicate__)(struct MemoryList *, NvHandle, NvBool *); - void (*__memlistControlSerialization_Epilogue__)(struct MemoryList *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memlistMap__)(struct MemoryList *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__memlistAccessCallback__)(struct MemoryList *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct Memory *__nvoc_pbase_Memory; // mem super + struct MemoryList *__nvoc_pbase_MemoryList; // memlist + + // Vtable with 26 per-object function pointers + NvBool (*__memlistCanCopy__)(struct MemoryList * /*this*/); // virtual override (res) base (mem) + NV_STATUS (*__memlistIsDuplicate__)(struct MemoryList * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) + NV_STATUS (*__memlistGetMapAddrSpace__)(struct MemoryList * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) + NV_STATUS (*__memlistControl__)(struct MemoryList * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (mem) base (mem) + NV_STATUS (*__memlistMap__)(struct MemoryList * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__memlistUnmap__)(struct MemoryList * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__memlistGetMemInterMapParams__)(struct MemoryList * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (mem) base (mem) + NV_STATUS (*__memlistCheckMemInterUnmap__)(struct MemoryList * /*this*/, NvBool); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__memlistGetMemoryMappingDescriptor__)(struct MemoryList * /*this*/, MEMORY_DESCRIPTOR **); // virtual inherited (mem) base (mem) + NV_STATUS (*__memlistCheckCopyPermissions__)(struct MemoryList * /*this*/, struct OBJGPU *, struct Device *); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__memlistIsReady__)(struct MemoryList * /*this*/, NvBool); // virtual inherited (mem) base (mem) + NvBool (*__memlistIsGpuMapAllowed__)(struct MemoryList * /*this*/, struct OBJGPU *); // inline virtual inherited (mem) base (mem) body + NvBool (*__memlistIsExportAllowed__)(struct MemoryList * /*this*/); // inline virtual inherited (mem) base (mem) body + NvBool (*__memlistAccessCallback__)(struct MemoryList * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (mem) + NvBool (*__memlistShareCallback__)(struct MemoryList * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__memlistControlSerialization_Prologue__)(struct MemoryList * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__memlistControlSerialization_Epilogue__)(struct MemoryList * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__memlistControl_Prologue__)(struct MemoryList * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__memlistControl_Epilogue__)(struct MemoryList * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__memlistPreDestruct__)(struct MemoryList * /*this*/); // virtual inherited (res) base (mem) + NV_STATUS (*__memlistControlFilter__)(struct MemoryList * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (mem) + NvBool (*__memlistIsPartialUnmapSupported__)(struct MemoryList * /*this*/); // inline virtual inherited (res) base (mem) body + NV_STATUS (*__memlistMapTo__)(struct MemoryList * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (mem) + NV_STATUS (*__memlistUnmapFrom__)(struct MemoryList * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (mem) + NvU32 (*__memlistGetRefCount__)(struct MemoryList * /*this*/); // virtual inherited (res) base (mem) + void (*__memlistAddAdditionalDependants__)(struct RsClient *, struct MemoryList * /*this*/, RsResourceRef *); // virtual inherited (res) base (mem) }; #ifndef __NVOC_CLASS_MemoryList_TYPEDEF__ @@ -96,6 +113,7 @@ typedef struct MemoryList MemoryList; #define __nvoc_class_id_MemoryList 0x298f78 #endif /* __nvoc_class_id_MemoryList */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryList; #define __staticCast_MemoryList(pThis) \ @@ -108,145 +126,174 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryList; ((MemoryList*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(MemoryList))) #endif //__nvoc_mem_list_h_disabled - NV_STATUS __nvoc_objCreateDynamic_MemoryList(MemoryList**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_MemoryList(MemoryList**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_MemoryList(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_MemoryList((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define memlistCanCopy_FNPTR(pMemoryList) pMemoryList->__memlistCanCopy__ #define memlistCanCopy(pMemoryList) memlistCanCopy_DISPATCH(pMemoryList) -#define memlistCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) memlistCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define memlistShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) memlistShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define memlistMapTo(pResource, pParams) memlistMapTo_DISPATCH(pResource, pParams) +#define memlistIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define memlistIsDuplicate(pMemory, hMemory, pDuplicate) memlistIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) +#define memlistGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ #define memlistGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) memlistGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define memlistIsExportAllowed(pMemory) memlistIsExportAllowed_DISPATCH(pMemory) -#define memlistGetRefCount(pResource) memlistGetRefCount_DISPATCH(pResource) -#define memlistAddAdditionalDependants(pClient, pResource, pReference) memlistAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define memlistControl_Prologue(pResource, pCallContext, pParams) memlistControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memlistIsGpuMapAllowed(pMemory, pGpu) memlistIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define memlistUnmapFrom(pResource, pParams) memlistUnmapFrom_DISPATCH(pResource, pParams) -#define memlistControl_Epilogue(pResource, pCallContext, pParams) memlistControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define memlistControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ #define memlistControl(pMemory, pCallContext, pParams) memlistControl_DISPATCH(pMemory, pCallContext, pParams) +#define memlistMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define memlistMap(pMemory, pCallContext, pParams, pCpuMapping) memlistMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define memlistUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ #define memlistUnmap(pMemory, pCallContext, pCpuMapping) memlistUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) +#define memlistGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ #define memlistGetMemInterMapParams(pMemory, pParams) memlistGetMemInterMapParams_DISPATCH(pMemory, pParams) +#define memlistCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define memlistCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) memlistCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) +#define memlistGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ #define memlistGetMemoryMappingDescriptor(pMemory, ppMemDesc) memlistGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define memlistControlFilter(pResource, pCallContext, pParams) memlistControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define memlistControlSerialization_Prologue(pResource, pCallContext, pParams) memlistControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memlistIsPartialUnmapSupported(pResource) memlistIsPartialUnmapSupported_DISPATCH(pResource) -#define memlistIsReady(pMemory, bCopyConstructorContext) memlistIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define memlistCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ #define memlistCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) memlistCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define memlistPreDestruct(pResource) memlistPreDestruct_DISPATCH(pResource) -#define memlistIsDuplicate(pMemory, hMemory, pDuplicate) memlistIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define memlistControlSerialization_Epilogue(pResource, pCallContext, pParams) memlistControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memlistMap(pMemory, pCallContext, pParams, pCpuMapping) memlistMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define memlistIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define memlistIsReady(pMemory, bCopyConstructorContext) memlistIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define memlistIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define memlistIsGpuMapAllowed(pMemory, pGpu) memlistIsGpuMapAllowed_DISPATCH(pMemory, pGpu) +#define memlistIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define memlistIsExportAllowed(pMemory) memlistIsExportAllowed_DISPATCH(pMemory) +#define memlistAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ #define memlistAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memlistAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool memlistCanCopy_IMPL(struct MemoryList *pMemoryList); +#define memlistShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define memlistShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) memlistShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define memlistControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define memlistControlSerialization_Prologue(pResource, pCallContext, pParams) memlistControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define memlistControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define memlistControlSerialization_Epilogue(pResource, pCallContext, pParams) memlistControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define memlistControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define memlistControl_Prologue(pResource, pCallContext, pParams) memlistControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define memlistControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define memlistControl_Epilogue(pResource, pCallContext, pParams) memlistControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define memlistPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define memlistPreDestruct(pResource) memlistPreDestruct_DISPATCH(pResource) +#define memlistControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define memlistControlFilter(pResource, pCallContext, pParams) memlistControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define memlistIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define memlistIsPartialUnmapSupported(pResource) memlistIsPartialUnmapSupported_DISPATCH(pResource) +#define memlistMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define memlistMapTo(pResource, pParams) memlistMapTo_DISPATCH(pResource, pParams) +#define memlistUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define memlistUnmapFrom(pResource, pParams) memlistUnmapFrom_DISPATCH(pResource, pParams) +#define memlistGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define memlistGetRefCount(pResource) memlistGetRefCount_DISPATCH(pResource) +#define memlistAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define memlistAddAdditionalDependants(pClient, pResource, pReference) memlistAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NvBool memlistCanCopy_DISPATCH(struct MemoryList *pMemoryList) { return pMemoryList->__memlistCanCopy__(pMemoryList); } -static inline NV_STATUS memlistCheckMemInterUnmap_DISPATCH(struct MemoryList *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__memlistCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); -} - -static inline NvBool memlistShareCallback_DISPATCH(struct MemoryList *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__memlistShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS memlistMapTo_DISPATCH(struct MemoryList *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__memlistMapTo__(pResource, pParams); +static inline NV_STATUS memlistIsDuplicate_DISPATCH(struct MemoryList *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return pMemory->__memlistIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS memlistGetMapAddrSpace_DISPATCH(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pMemory->__memlistGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } -static inline NvBool memlistIsExportAllowed_DISPATCH(struct MemoryList *pMemory) { - return pMemory->__memlistIsExportAllowed__(pMemory); +static inline NV_STATUS memlistControl_DISPATCH(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pMemory->__memlistControl__(pMemory, pCallContext, pParams); } -static inline NvU32 memlistGetRefCount_DISPATCH(struct MemoryList *pResource) { - return pResource->__memlistGetRefCount__(pResource); +static inline NV_STATUS memlistMap_DISPATCH(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pMemory->__memlistMap__(pMemory, pCallContext, pParams, pCpuMapping); } -static inline void memlistAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryList *pResource, RsResourceRef *pReference) { - pResource->__memlistAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS memlistUnmap_DISPATCH(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pMemory->__memlistUnmap__(pMemory, pCallContext, pCpuMapping); } -static inline NV_STATUS memlistControl_Prologue_DISPATCH(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memlistControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS memlistGetMemInterMapParams_DISPATCH(struct MemoryList *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pMemory->__memlistGetMemInterMapParams__(pMemory, pParams); } -static inline NvBool memlistIsGpuMapAllowed_DISPATCH(struct MemoryList *pMemory, struct OBJGPU *pGpu) { - return pMemory->__memlistIsGpuMapAllowed__(pMemory, pGpu); +static inline NV_STATUS memlistCheckMemInterUnmap_DISPATCH(struct MemoryList *pMemory, NvBool bSubdeviceHandleProvided) { + return pMemory->__memlistCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } -static inline NV_STATUS memlistUnmapFrom_DISPATCH(struct MemoryList *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__memlistUnmapFrom__(pResource, pParams); +static inline NV_STATUS memlistGetMemoryMappingDescriptor_DISPATCH(struct MemoryList *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return pMemory->__memlistGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } -static inline void memlistControl_Epilogue_DISPATCH(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memlistControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS memlistCheckCopyPermissions_DISPATCH(struct MemoryList *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return pMemory->__memlistCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } -static inline NV_STATUS memlistControl_DISPATCH(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__memlistControl__(pMemory, pCallContext, pParams); +static inline NV_STATUS memlistIsReady_DISPATCH(struct MemoryList *pMemory, NvBool bCopyConstructorContext) { + return pMemory->__memlistIsReady__(pMemory, bCopyConstructorContext); } -static inline NV_STATUS memlistUnmap_DISPATCH(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__memlistUnmap__(pMemory, pCallContext, pCpuMapping); +static inline NvBool memlistIsGpuMapAllowed_DISPATCH(struct MemoryList *pMemory, struct OBJGPU *pGpu) { + return pMemory->__memlistIsGpuMapAllowed__(pMemory, pGpu); } -static inline NV_STATUS memlistGetMemInterMapParams_DISPATCH(struct MemoryList *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__memlistGetMemInterMapParams__(pMemory, pParams); +static inline NvBool memlistIsExportAllowed_DISPATCH(struct MemoryList *pMemory) { + return pMemory->__memlistIsExportAllowed__(pMemory); } -static inline NV_STATUS memlistGetMemoryMappingDescriptor_DISPATCH(struct MemoryList *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__memlistGetMemoryMappingDescriptor__(pMemory, ppMemDesc); +static inline NvBool memlistAccessCallback_DISPATCH(struct MemoryList *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__memlistAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS memlistControlFilter_DISPATCH(struct MemoryList *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memlistControlFilter__(pResource, pCallContext, pParams); +static inline NvBool memlistShareCallback_DISPATCH(struct MemoryList *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__memlistShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS memlistControlSerialization_Prologue_DISPATCH(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__memlistControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool memlistIsPartialUnmapSupported_DISPATCH(struct MemoryList *pResource) { - return pResource->__memlistIsPartialUnmapSupported__(pResource); +static inline void memlistControlSerialization_Epilogue_DISPATCH(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__memlistControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS memlistIsReady_DISPATCH(struct MemoryList *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__memlistIsReady__(pMemory, bCopyConstructorContext); +static inline NV_STATUS memlistControl_Prologue_DISPATCH(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__memlistControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS memlistCheckCopyPermissions_DISPATCH(struct MemoryList *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__memlistCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); +static inline void memlistControl_Epilogue_DISPATCH(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__memlistControl_Epilogue__(pResource, pCallContext, pParams); } static inline void memlistPreDestruct_DISPATCH(struct MemoryList *pResource) { pResource->__memlistPreDestruct__(pResource); } -static inline NV_STATUS memlistIsDuplicate_DISPATCH(struct MemoryList *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__memlistIsDuplicate__(pMemory, hMemory, pDuplicate); +static inline NV_STATUS memlistControlFilter_DISPATCH(struct MemoryList *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__memlistControlFilter__(pResource, pCallContext, pParams); } -static inline void memlistControlSerialization_Epilogue_DISPATCH(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memlistControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool memlistIsPartialUnmapSupported_DISPATCH(struct MemoryList *pResource) { + return pResource->__memlistIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS memlistMap_DISPATCH(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__memlistMap__(pMemory, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS memlistMapTo_DISPATCH(struct MemoryList *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__memlistMapTo__(pResource, pParams); } -static inline NvBool memlistAccessCallback_DISPATCH(struct MemoryList *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__memlistAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS memlistUnmapFrom_DISPATCH(struct MemoryList *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__memlistUnmapFrom__(pResource, pParams); } +static inline NvU32 memlistGetRefCount_DISPATCH(struct MemoryList *pResource) { + return pResource->__memlistGetRefCount__(pResource); +} + +static inline void memlistAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryList *pResource, RsResourceRef *pReference) { + pResource->__memlistAddAdditionalDependants__(pClient, pResource, pReference); +} + +NvBool memlistCanCopy_IMPL(struct MemoryList *pMemoryList); + NV_STATUS memlistConstruct_IMPL(struct MemoryList *arg_pMemoryList, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_memlistConstruct(arg_pMemoryList, arg_pCallContext, arg_pParams) memlistConstruct_IMPL(arg_pMemoryList, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_mem_mapper_nvoc.c b/src/nvidia/generated/g_mem_mapper_nvoc.c index 575a46f55a..b8de6dd2a3 100644 --- a/src/nvidia/generated/g_mem_mapper_nvoc.c +++ b/src/nvidia/generated/g_mem_mapper_nvoc.c @@ -93,133 +93,176 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryMapper = /*pExportInfo=*/ &__nvoc_export_info_MemoryMapper }; -static NvBool __nvoc_thunk_GpuResource_memmapperShareCallback(struct MemoryMapper *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NV_STATUS __nvoc_thunk_RmResource_memmapperCheckMemInterUnmap(struct MemoryMapper *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), bSubdeviceHandleProvided); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryMapper[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) memmapperCtrlCmdSubmitOperations_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0xfe0101u, + /*paramSize=*/ sizeof(NV00FE_CTRL_SUBMIT_OPERATIONS_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_MemoryMapper.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "memmapperCtrlCmdSubmitOperations" +#endif + }, + { /* [1] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) memmapperCtrlCmdResizeQueue_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0xfe0102u, + /*paramSize=*/ sizeof(NV00FE_CTRL_RESIZE_QUEUE_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_MemoryMapper.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "memmapperCtrlCmdResizeQueue" +#endif + }, + +}; + +// 25 up-thunk(s) defined to bridge methods in MemoryMapper to superclasses -static NV_STATUS __nvoc_thunk_RsResource_memmapperMapTo(struct MemoryMapper *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset), pParams); +// memmapperControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_memmapperControl(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_memmapperGetMapAddrSpace(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// memmapperMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_memmapperMap(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_memmapperGetRefCount(struct MemoryMapper *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset)); +// memmapperUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_memmapperUnmap(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_RsResource_memmapperAddAdditionalDependants(struct RsClient *pClient, struct MemoryMapper *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset), pReference); +// memmapperShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_memmapperShareCallback(struct MemoryMapper *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RmResource_memmapperControl_Prologue(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), pCallContext, pParams); +// memmapperGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_memmapperGetRegBaseOffsetAndSize(struct MemoryMapper *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_GpuResource_memmapperGetRegBaseOffsetAndSize(struct MemoryMapper *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), pGpu, pOffset, pSize); +// memmapperGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_memmapperGetMapAddrSpace(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_GpuResource_memmapperInternalControlForward(struct MemoryMapper *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), command, pParams, size); +// memmapperInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_memmapperInternalControlForward(struct MemoryMapper *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_RsResource_memmapperUnmapFrom(struct MemoryMapper *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset), pParams); +// memmapperGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_memmapperGetInternalObjectHandle(struct MemoryMapper *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset)); } -static void __nvoc_thunk_RmResource_memmapperControl_Epilogue(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), pCallContext, pParams); +// memmapperAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_memmapperAccessCallback(struct MemoryMapper *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NvHandle __nvoc_thunk_GpuResource_memmapperGetInternalObjectHandle(struct MemoryMapper *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset)); +// memmapperGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_memmapperGetMemInterMapParams(struct MemoryMapper *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_memmapperControl(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), pCallContext, pParams); +// memmapperCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_memmapperCheckMemInterUnmap(struct MemoryMapper *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_GpuResource_memmapperUnmap(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), pCallContext, pCpuMapping); +// memmapperGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_memmapperGetMemoryMappingDescriptor(struct MemoryMapper *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_RmResource_memmapperGetMemInterMapParams(struct MemoryMapper *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), pParams); +// memmapperControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_memmapperControlSerialization_Prologue(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_memmapperGetMemoryMappingDescriptor(struct MemoryMapper *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), ppMemDesc); +// memmapperControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_memmapperControlSerialization_Epilogue(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_memmapperControlFilter(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset), pCallContext, pParams); +// memmapperControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_memmapperControl_Prologue(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_memmapperControlSerialization_Prologue(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), pCallContext, pParams); +// memmapperControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_memmapperControl_Epilogue(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_memmapperCanCopy(struct MemoryMapper *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset)); +// memmapperCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_memmapperCanCopy(struct MemoryMapper *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_memmapperIsPartialUnmapSupported(struct MemoryMapper *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset)); +// memmapperIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_memmapperIsDuplicate(struct MemoryMapper *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset), hMemory, pDuplicate); } -static void __nvoc_thunk_RsResource_memmapperPreDestruct(struct MemoryMapper *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset)); +// memmapperPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_memmapperPreDestruct(struct MemoryMapper *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_memmapperIsDuplicate(struct MemoryMapper *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset), hMemory, pDuplicate); +// memmapperControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_memmapperControlFilter(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RmResource_memmapperControlSerialization_Epilogue(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), pCallContext, pParams); +// memmapperIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_memmapperIsPartialUnmapSupported(struct MemoryMapper *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_memmapperMap(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// memmapperMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_memmapperMapTo(struct MemoryMapper *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RmResource_memmapperAccessCallback(struct MemoryMapper *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// memmapperUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_memmapperUnmapFrom(struct MemoryMapper *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset), pParams); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// memmapperGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_memmapperGetRefCount(struct MemoryMapper *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset)); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryMapper[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) memmapperCtrlCmdSubmitOperations_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xfe0101u, - /*paramSize=*/ sizeof(NV00FE_CTRL_SUBMIT_OPERATIONS_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_MemoryMapper.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "memmapperCtrlCmdSubmitOperations" -#endif - }, +// memmapperAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_memmapperAddAdditionalDependants(struct RsClient *pClient, struct MemoryMapper *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset), pReference); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_MemoryMapper = { - /*numEntries=*/ 1, + /*numEntries=*/ 2, /*pExportEntries=*/ __nvoc_exported_method_def_MemoryMapper }; @@ -253,65 +296,101 @@ NV_STATUS __nvoc_ctor_MemoryMapper(MemoryMapper *pThis, struct CALL_CONTEXT * ar return status; } +// Vtable initialization static void __nvoc_init_funcTable_MemoryMapper_1(MemoryMapper *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // memmapperCtrlCmdSubmitOperations -- exported (id=0xfe0101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__memmapperCtrlCmdSubmitOperations__ = &memmapperCtrlCmdSubmitOperations_IMPL; #endif - pThis->__memmapperShareCallback__ = &__nvoc_thunk_GpuResource_memmapperShareCallback; + // memmapperCtrlCmdResizeQueue -- exported (id=0xfe0102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + pThis->__memmapperCtrlCmdResizeQueue__ = &memmapperCtrlCmdResizeQueue_IMPL; +#endif - pThis->__memmapperCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_memmapperCheckMemInterUnmap; + // memmapperControl -- virtual inherited (gpures) base (gpures) + pThis->__memmapperControl__ = &__nvoc_up_thunk_GpuResource_memmapperControl; - pThis->__memmapperMapTo__ = &__nvoc_thunk_RsResource_memmapperMapTo; + // memmapperMap -- virtual inherited (gpures) base (gpures) + pThis->__memmapperMap__ = &__nvoc_up_thunk_GpuResource_memmapperMap; - pThis->__memmapperGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_memmapperGetMapAddrSpace; + // memmapperUnmap -- virtual inherited (gpures) base (gpures) + pThis->__memmapperUnmap__ = &__nvoc_up_thunk_GpuResource_memmapperUnmap; - pThis->__memmapperGetRefCount__ = &__nvoc_thunk_RsResource_memmapperGetRefCount; + // memmapperShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__memmapperShareCallback__ = &__nvoc_up_thunk_GpuResource_memmapperShareCallback; - pThis->__memmapperAddAdditionalDependants__ = &__nvoc_thunk_RsResource_memmapperAddAdditionalDependants; + // memmapperGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__memmapperGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_memmapperGetRegBaseOffsetAndSize; - pThis->__memmapperControl_Prologue__ = &__nvoc_thunk_RmResource_memmapperControl_Prologue; + // memmapperGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__memmapperGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_memmapperGetMapAddrSpace; - pThis->__memmapperGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_memmapperGetRegBaseOffsetAndSize; + // memmapperInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__memmapperInternalControlForward__ = &__nvoc_up_thunk_GpuResource_memmapperInternalControlForward; - pThis->__memmapperInternalControlForward__ = &__nvoc_thunk_GpuResource_memmapperInternalControlForward; + // memmapperGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__memmapperGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_memmapperGetInternalObjectHandle; - pThis->__memmapperUnmapFrom__ = &__nvoc_thunk_RsResource_memmapperUnmapFrom; + // memmapperAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__memmapperAccessCallback__ = &__nvoc_up_thunk_RmResource_memmapperAccessCallback; - pThis->__memmapperControl_Epilogue__ = &__nvoc_thunk_RmResource_memmapperControl_Epilogue; + // memmapperGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__memmapperGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_memmapperGetMemInterMapParams; - pThis->__memmapperGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_memmapperGetInternalObjectHandle; + // memmapperCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__memmapperCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_memmapperCheckMemInterUnmap; - pThis->__memmapperControl__ = &__nvoc_thunk_GpuResource_memmapperControl; + // memmapperGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__memmapperGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_memmapperGetMemoryMappingDescriptor; - pThis->__memmapperUnmap__ = &__nvoc_thunk_GpuResource_memmapperUnmap; + // memmapperControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__memmapperControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memmapperControlSerialization_Prologue; - pThis->__memmapperGetMemInterMapParams__ = &__nvoc_thunk_RmResource_memmapperGetMemInterMapParams; + // memmapperControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__memmapperControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memmapperControlSerialization_Epilogue; - pThis->__memmapperGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_memmapperGetMemoryMappingDescriptor; + // memmapperControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__memmapperControl_Prologue__ = &__nvoc_up_thunk_RmResource_memmapperControl_Prologue; - pThis->__memmapperControlFilter__ = &__nvoc_thunk_RsResource_memmapperControlFilter; + // memmapperControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__memmapperControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memmapperControl_Epilogue; - pThis->__memmapperControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_memmapperControlSerialization_Prologue; + // memmapperCanCopy -- virtual inherited (res) base (gpures) + pThis->__memmapperCanCopy__ = &__nvoc_up_thunk_RsResource_memmapperCanCopy; - pThis->__memmapperCanCopy__ = &__nvoc_thunk_RsResource_memmapperCanCopy; + // memmapperIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__memmapperIsDuplicate__ = &__nvoc_up_thunk_RsResource_memmapperIsDuplicate; - pThis->__memmapperIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_memmapperIsPartialUnmapSupported; + // memmapperPreDestruct -- virtual inherited (res) base (gpures) + pThis->__memmapperPreDestruct__ = &__nvoc_up_thunk_RsResource_memmapperPreDestruct; - pThis->__memmapperPreDestruct__ = &__nvoc_thunk_RsResource_memmapperPreDestruct; + // memmapperControlFilter -- virtual inherited (res) base (gpures) + pThis->__memmapperControlFilter__ = &__nvoc_up_thunk_RsResource_memmapperControlFilter; - pThis->__memmapperIsDuplicate__ = &__nvoc_thunk_RsResource_memmapperIsDuplicate; + // memmapperIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__memmapperIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memmapperIsPartialUnmapSupported; - pThis->__memmapperControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_memmapperControlSerialization_Epilogue; + // memmapperMapTo -- virtual inherited (res) base (gpures) + pThis->__memmapperMapTo__ = &__nvoc_up_thunk_RsResource_memmapperMapTo; - pThis->__memmapperMap__ = &__nvoc_thunk_GpuResource_memmapperMap; + // memmapperUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__memmapperUnmapFrom__ = &__nvoc_up_thunk_RsResource_memmapperUnmapFrom; - pThis->__memmapperAccessCallback__ = &__nvoc_thunk_RmResource_memmapperAccessCallback; -} + // memmapperGetRefCount -- virtual inherited (res) base (gpures) + pThis->__memmapperGetRefCount__ = &__nvoc_up_thunk_RsResource_memmapperGetRefCount; + // memmapperAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__memmapperAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memmapperAddAdditionalDependants; +} // End __nvoc_init_funcTable_MemoryMapper_1 with approximately 27 basic block(s). + + +// Initialize vtable(s) for 27 virtual method(s). void __nvoc_init_funcTable_MemoryMapper(MemoryMapper *pThis) { + + // Initialize vtable(s) with 27 per-object function pointer(s). __nvoc_init_funcTable_MemoryMapper_1(pThis); } diff --git a/src/nvidia/generated/g_mem_mapper_nvoc.h b/src/nvidia/generated/g_mem_mapper_nvoc.h index 72c712595e..a242d44493 100644 --- a/src/nvidia/generated/g_mem_mapper_nvoc.h +++ b/src/nvidia/generated/g_mem_mapper_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_MEM_MAPPER_NVOC_H_ #define _G_MEM_MAPPER_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_mem_mapper_nvoc.h" #ifndef MEMORY_MAPPER_H @@ -43,6 +51,7 @@ extern "C" { #include "ctrl/ctrl00fe.h" #include "ctrl/ctrl2080/ctrl2080fb.h" + struct Subdevice; #ifndef __NVOC_CLASS_Subdevice_TYPEDEF__ @@ -55,6 +64,20 @@ typedef struct Subdevice Subdevice; #endif /* __nvoc_class_id_Subdevice */ + +struct Memory; + +#ifndef __NVOC_CLASS_Memory_TYPEDEF__ +#define __NVOC_CLASS_Memory_TYPEDEF__ +typedef struct Memory Memory; +#endif /* __NVOC_CLASS_Memory_TYPEDEF__ */ + +#ifndef __nvoc_class_id_Memory +#define __nvoc_class_id_Memory 0x4789f2 +#endif /* __nvoc_class_id_Memory */ + + + struct OBJGPU; #ifndef __NVOC_CLASS_OBJGPU_TYPEDEF__ @@ -67,6 +90,7 @@ typedef struct OBJGPU OBJGPU; #endif /* __nvoc_class_id_OBJGPU */ + struct SemaphoreSurface; #ifndef __NVOC_CLASS_SemaphoreSurface_TYPEDEF__ @@ -79,6 +103,7 @@ typedef struct SemaphoreSurface SemaphoreSurface; #endif /* __nvoc_class_id_SemaphoreSurface */ + struct MemoryMapper; #ifndef __NVOC_CLASS_MemoryMapper_TYPEDEF__ @@ -113,42 +138,56 @@ typedef struct #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct MemoryMapper { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct MemoryMapper *__nvoc_pbase_MemoryMapper; - NV_STATUS (*__memmapperCtrlCmdSubmitOperations__)(struct MemoryMapper *, NV00FE_CTRL_SUBMIT_OPERATIONS_PARAMS *); - NvBool (*__memmapperShareCallback__)(struct MemoryMapper *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__memmapperCheckMemInterUnmap__)(struct MemoryMapper *, NvBool); - NV_STATUS (*__memmapperMapTo__)(struct MemoryMapper *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__memmapperGetMapAddrSpace__)(struct MemoryMapper *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__memmapperGetRefCount__)(struct MemoryMapper *); - void (*__memmapperAddAdditionalDependants__)(struct RsClient *, struct MemoryMapper *, RsResourceRef *); - NV_STATUS (*__memmapperControl_Prologue__)(struct MemoryMapper *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memmapperGetRegBaseOffsetAndSize__)(struct MemoryMapper *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__memmapperInternalControlForward__)(struct MemoryMapper *, NvU32, void *, NvU32); - NV_STATUS (*__memmapperUnmapFrom__)(struct MemoryMapper *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__memmapperControl_Epilogue__)(struct MemoryMapper *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__memmapperGetInternalObjectHandle__)(struct MemoryMapper *); - NV_STATUS (*__memmapperControl__)(struct MemoryMapper *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memmapperUnmap__)(struct MemoryMapper *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__memmapperGetMemInterMapParams__)(struct MemoryMapper *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__memmapperGetMemoryMappingDescriptor__)(struct MemoryMapper *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__memmapperControlFilter__)(struct MemoryMapper *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memmapperControlSerialization_Prologue__)(struct MemoryMapper *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__memmapperCanCopy__)(struct MemoryMapper *); - NvBool (*__memmapperIsPartialUnmapSupported__)(struct MemoryMapper *); - void (*__memmapperPreDestruct__)(struct MemoryMapper *); - NV_STATUS (*__memmapperIsDuplicate__)(struct MemoryMapper *, NvHandle, NvBool *); - void (*__memmapperControlSerialization_Epilogue__)(struct MemoryMapper *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memmapperMap__)(struct MemoryMapper *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__memmapperAccessCallback__)(struct MemoryMapper *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct MemoryMapper *__nvoc_pbase_MemoryMapper; // memmapper + + // Vtable with 27 per-object function pointers + NV_STATUS (*__memmapperCtrlCmdSubmitOperations__)(struct MemoryMapper * /*this*/, NV00FE_CTRL_SUBMIT_OPERATIONS_PARAMS *); // exported (id=0xfe0101) + NV_STATUS (*__memmapperCtrlCmdResizeQueue__)(struct MemoryMapper * /*this*/, NV00FE_CTRL_RESIZE_QUEUE_PARAMS *); // exported (id=0xfe0102) + NV_STATUS (*__memmapperControl__)(struct MemoryMapper * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__memmapperMap__)(struct MemoryMapper * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__memmapperUnmap__)(struct MemoryMapper * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__memmapperShareCallback__)(struct MemoryMapper * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__memmapperGetRegBaseOffsetAndSize__)(struct MemoryMapper * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__memmapperGetMapAddrSpace__)(struct MemoryMapper * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__memmapperInternalControlForward__)(struct MemoryMapper * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__memmapperGetInternalObjectHandle__)(struct MemoryMapper * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__memmapperAccessCallback__)(struct MemoryMapper * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__memmapperGetMemInterMapParams__)(struct MemoryMapper * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__memmapperCheckMemInterUnmap__)(struct MemoryMapper * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__memmapperGetMemoryMappingDescriptor__)(struct MemoryMapper * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__memmapperControlSerialization_Prologue__)(struct MemoryMapper * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__memmapperControlSerialization_Epilogue__)(struct MemoryMapper * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__memmapperControl_Prologue__)(struct MemoryMapper * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__memmapperControl_Epilogue__)(struct MemoryMapper * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__memmapperCanCopy__)(struct MemoryMapper * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__memmapperIsDuplicate__)(struct MemoryMapper * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__memmapperPreDestruct__)(struct MemoryMapper * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__memmapperControlFilter__)(struct MemoryMapper * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__memmapperIsPartialUnmapSupported__)(struct MemoryMapper * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__memmapperMapTo__)(struct MemoryMapper * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__memmapperUnmapFrom__)(struct MemoryMapper * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__memmapperGetRefCount__)(struct MemoryMapper * /*this*/); // virtual inherited (res) base (gpures) + void (*__memmapperAddAdditionalDependants__)(struct RsClient *, struct MemoryMapper * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members struct Subdevice *pSubdevice; + struct Memory *pNotificationMemory; + NvU64 notificationOffset; NV00FE_CTRL_OPERATION *pOperationQueue; NvU32 operationQueuePut; NvU32 operationQueueGet; @@ -169,6 +208,7 @@ typedef struct MemoryMapper MemoryMapper; #define __nvoc_class_id_MemoryMapper 0xb8e4a2 #endif /* __nvoc_class_id_MemoryMapper */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryMapper; #define __staticCast_MemoryMapper(pThis) \ @@ -181,145 +221,182 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryMapper; ((MemoryMapper*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(MemoryMapper))) #endif //__nvoc_mem_mapper_h_disabled - NV_STATUS __nvoc_objCreateDynamic_MemoryMapper(MemoryMapper**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_MemoryMapper(MemoryMapper**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_MemoryMapper(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_MemoryMapper((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define memmapperCtrlCmdSubmitOperations_FNPTR(pMemoryMapper) pMemoryMapper->__memmapperCtrlCmdSubmitOperations__ #define memmapperCtrlCmdSubmitOperations(pMemoryMapper, pParams) memmapperCtrlCmdSubmitOperations_DISPATCH(pMemoryMapper, pParams) +#define memmapperCtrlCmdResizeQueue_FNPTR(pMemoryMapper) pMemoryMapper->__memmapperCtrlCmdResizeQueue__ +#define memmapperCtrlCmdResizeQueue(pMemoryMapper, pParams) memmapperCtrlCmdResizeQueue_DISPATCH(pMemoryMapper, pParams) +#define memmapperControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define memmapperControl(pGpuResource, pCallContext, pParams) memmapperControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define memmapperMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define memmapperMap(pGpuResource, pCallContext, pParams, pCpuMapping) memmapperMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define memmapperUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define memmapperUnmap(pGpuResource, pCallContext, pCpuMapping) memmapperUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define memmapperShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define memmapperShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) memmapperShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define memmapperCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) memmapperCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define memmapperMapTo(pResource, pParams) memmapperMapTo_DISPATCH(pResource, pParams) -#define memmapperGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) memmapperGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define memmapperGetRefCount(pResource) memmapperGetRefCount_DISPATCH(pResource) -#define memmapperAddAdditionalDependants(pClient, pResource, pReference) memmapperAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define memmapperControl_Prologue(pResource, pCallContext, pParams) memmapperControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define memmapperGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define memmapperGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) memmapperGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define memmapperGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define memmapperGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) memmapperGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define memmapperInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define memmapperInternalControlForward(pGpuResource, command, pParams, size) memmapperInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define memmapperUnmapFrom(pResource, pParams) memmapperUnmapFrom_DISPATCH(pResource, pParams) -#define memmapperControl_Epilogue(pResource, pCallContext, pParams) memmapperControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define memmapperGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define memmapperGetInternalObjectHandle(pGpuResource) memmapperGetInternalObjectHandle_DISPATCH(pGpuResource) -#define memmapperControl(pGpuResource, pCallContext, pParams) memmapperControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define memmapperUnmap(pGpuResource, pCallContext, pCpuMapping) memmapperUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define memmapperAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define memmapperAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memmapperAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define memmapperGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define memmapperGetMemInterMapParams(pRmResource, pParams) memmapperGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define memmapperCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define memmapperCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) memmapperCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define memmapperGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define memmapperGetMemoryMappingDescriptor(pRmResource, ppMemDesc) memmapperGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define memmapperControlFilter(pResource, pCallContext, pParams) memmapperControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define memmapperControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define memmapperControlSerialization_Prologue(pResource, pCallContext, pParams) memmapperControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define memmapperControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define memmapperControlSerialization_Epilogue(pResource, pCallContext, pParams) memmapperControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define memmapperControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define memmapperControl_Prologue(pResource, pCallContext, pParams) memmapperControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define memmapperControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define memmapperControl_Epilogue(pResource, pCallContext, pParams) memmapperControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define memmapperCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define memmapperCanCopy(pResource) memmapperCanCopy_DISPATCH(pResource) -#define memmapperIsPartialUnmapSupported(pResource) memmapperIsPartialUnmapSupported_DISPATCH(pResource) -#define memmapperPreDestruct(pResource) memmapperPreDestruct_DISPATCH(pResource) +#define memmapperIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define memmapperIsDuplicate(pResource, hMemory, pDuplicate) memmapperIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define memmapperControlSerialization_Epilogue(pResource, pCallContext, pParams) memmapperControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memmapperMap(pGpuResource, pCallContext, pParams, pCpuMapping) memmapperMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define memmapperAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memmapperAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS memmapperCtrlCmdSubmitOperations_IMPL(struct MemoryMapper *pMemoryMapper, NV00FE_CTRL_SUBMIT_OPERATIONS_PARAMS *pParams); +#define memmapperPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define memmapperPreDestruct(pResource) memmapperPreDestruct_DISPATCH(pResource) +#define memmapperControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define memmapperControlFilter(pResource, pCallContext, pParams) memmapperControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define memmapperIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define memmapperIsPartialUnmapSupported(pResource) memmapperIsPartialUnmapSupported_DISPATCH(pResource) +#define memmapperMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define memmapperMapTo(pResource, pParams) memmapperMapTo_DISPATCH(pResource, pParams) +#define memmapperUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define memmapperUnmapFrom(pResource, pParams) memmapperUnmapFrom_DISPATCH(pResource, pParams) +#define memmapperGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define memmapperGetRefCount(pResource) memmapperGetRefCount_DISPATCH(pResource) +#define memmapperAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define memmapperAddAdditionalDependants(pClient, pResource, pReference) memmapperAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS memmapperCtrlCmdSubmitOperations_DISPATCH(struct MemoryMapper *pMemoryMapper, NV00FE_CTRL_SUBMIT_OPERATIONS_PARAMS *pParams) { return pMemoryMapper->__memmapperCtrlCmdSubmitOperations__(pMemoryMapper, pParams); } -static inline NvBool memmapperShareCallback_DISPATCH(struct MemoryMapper *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__memmapperShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS memmapperCtrlCmdResizeQueue_DISPATCH(struct MemoryMapper *pMemoryMapper, NV00FE_CTRL_RESIZE_QUEUE_PARAMS *pParams) { + return pMemoryMapper->__memmapperCtrlCmdResizeQueue__(pMemoryMapper, pParams); } -static inline NV_STATUS memmapperCheckMemInterUnmap_DISPATCH(struct MemoryMapper *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__memmapperCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); -} - -static inline NV_STATUS memmapperMapTo_DISPATCH(struct MemoryMapper *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__memmapperMapTo__(pResource, pParams); -} - -static inline NV_STATUS memmapperGetMapAddrSpace_DISPATCH(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__memmapperGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +static inline NV_STATUS memmapperControl_DISPATCH(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__memmapperControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 memmapperGetRefCount_DISPATCH(struct MemoryMapper *pResource) { - return pResource->__memmapperGetRefCount__(pResource); +static inline NV_STATUS memmapperMap_DISPATCH(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__memmapperMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void memmapperAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryMapper *pResource, RsResourceRef *pReference) { - pResource->__memmapperAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS memmapperUnmap_DISPATCH(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__memmapperUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS memmapperControl_Prologue_DISPATCH(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memmapperControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool memmapperShareCallback_DISPATCH(struct MemoryMapper *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__memmapperShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS memmapperGetRegBaseOffsetAndSize_DISPATCH(struct MemoryMapper *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__memmapperGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS memmapperInternalControlForward_DISPATCH(struct MemoryMapper *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__memmapperInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS memmapperUnmapFrom_DISPATCH(struct MemoryMapper *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__memmapperUnmapFrom__(pResource, pParams); +static inline NV_STATUS memmapperGetMapAddrSpace_DISPATCH(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__memmapperGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void memmapperControl_Epilogue_DISPATCH(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memmapperControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS memmapperInternalControlForward_DISPATCH(struct MemoryMapper *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__memmapperInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle memmapperGetInternalObjectHandle_DISPATCH(struct MemoryMapper *pGpuResource) { return pGpuResource->__memmapperGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS memmapperControl_DISPATCH(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__memmapperControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS memmapperUnmap_DISPATCH(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__memmapperUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool memmapperAccessCallback_DISPATCH(struct MemoryMapper *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__memmapperAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS memmapperGetMemInterMapParams_DISPATCH(struct MemoryMapper *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__memmapperGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS memmapperGetMemoryMappingDescriptor_DISPATCH(struct MemoryMapper *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__memmapperGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS memmapperCheckMemInterUnmap_DISPATCH(struct MemoryMapper *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__memmapperCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS memmapperControlFilter_DISPATCH(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memmapperControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS memmapperGetMemoryMappingDescriptor_DISPATCH(struct MemoryMapper *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__memmapperGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS memmapperControlSerialization_Prologue_DISPATCH(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__memmapperControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void memmapperControlSerialization_Epilogue_DISPATCH(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__memmapperControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS memmapperControl_Prologue_DISPATCH(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__memmapperControl_Prologue__(pResource, pCallContext, pParams); +} + +static inline void memmapperControl_Epilogue_DISPATCH(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__memmapperControl_Epilogue__(pResource, pCallContext, pParams); +} + static inline NvBool memmapperCanCopy_DISPATCH(struct MemoryMapper *pResource) { return pResource->__memmapperCanCopy__(pResource); } -static inline NvBool memmapperIsPartialUnmapSupported_DISPATCH(struct MemoryMapper *pResource) { - return pResource->__memmapperIsPartialUnmapSupported__(pResource); +static inline NV_STATUS memmapperIsDuplicate_DISPATCH(struct MemoryMapper *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__memmapperIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void memmapperPreDestruct_DISPATCH(struct MemoryMapper *pResource) { pResource->__memmapperPreDestruct__(pResource); } -static inline NV_STATUS memmapperIsDuplicate_DISPATCH(struct MemoryMapper *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__memmapperIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS memmapperControlFilter_DISPATCH(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__memmapperControlFilter__(pResource, pCallContext, pParams); } -static inline void memmapperControlSerialization_Epilogue_DISPATCH(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memmapperControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool memmapperIsPartialUnmapSupported_DISPATCH(struct MemoryMapper *pResource) { + return pResource->__memmapperIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS memmapperMap_DISPATCH(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__memmapperMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS memmapperMapTo_DISPATCH(struct MemoryMapper *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__memmapperMapTo__(pResource, pParams); } -static inline NvBool memmapperAccessCallback_DISPATCH(struct MemoryMapper *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__memmapperAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS memmapperUnmapFrom_DISPATCH(struct MemoryMapper *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__memmapperUnmapFrom__(pResource, pParams); +} + +static inline NvU32 memmapperGetRefCount_DISPATCH(struct MemoryMapper *pResource) { + return pResource->__memmapperGetRefCount__(pResource); } +static inline void memmapperAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryMapper *pResource, RsResourceRef *pReference) { + pResource->__memmapperAddAdditionalDependants__(pClient, pResource, pReference); +} + +NV_STATUS memmapperCtrlCmdSubmitOperations_IMPL(struct MemoryMapper *pMemoryMapper, NV00FE_CTRL_SUBMIT_OPERATIONS_PARAMS *pParams); + +NV_STATUS memmapperCtrlCmdResizeQueue_IMPL(struct MemoryMapper *pMemoryMapper, NV00FE_CTRL_RESIZE_QUEUE_PARAMS *pParams); + NV_STATUS memmapperConstruct_IMPL(struct MemoryMapper *arg_pMemoryMapper, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_memmapperConstruct(arg_pMemoryMapper, arg_pCallContext, arg_pParams) memmapperConstruct_IMPL(arg_pMemoryMapper, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_mem_mgr_nvoc.c b/src/nvidia/generated/g_mem_mgr_nvoc.c index ffaa81da17..c97dad3f92 100644 --- a/src/nvidia/generated/g_mem_mgr_nvoc.c +++ b/src/nvidia/generated/g_mem_mgr_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryManager = /*pExportInfo=*/ &__nvoc_export_info_MemoryManager }; -static NV_STATUS __nvoc_thunk_MemoryManager_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, ENGDESCRIPTOR arg0) { - return memmgrConstructEngine(pGpu, (struct MemoryManager *)(((unsigned char *)pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg0); +// 8 down-thunk(s) defined to bridge methods in MemoryManager from superclasses + +// memmgrConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_MemoryManager_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, ENGDESCRIPTOR arg3) { + return memmgrConstructEngine(pGpu, (struct MemoryManager *)(((unsigned char *) pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_MemoryManager_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager) { - return memmgrStatePreInitLocked(pGpu, (struct MemoryManager *)(((unsigned char *)pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); +// memmgrStatePreInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager) { + return memmgrStatePreInitLocked(pGpu, (struct MemoryManager *)(((unsigned char *) pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_MemoryManager_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager) { - return memmgrStateInitLocked(pGpu, (struct MemoryManager *)(((unsigned char *)pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); +// memmgrStateInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager) { + return memmgrStateInitLocked(pGpu, (struct MemoryManager *)(((unsigned char *) pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_MemoryManager_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, NvU32 arg0) { - return memmgrStateLoad(pGpu, (struct MemoryManager *)(((unsigned char *)pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg0); +// memmgrStateLoad: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, NvU32 arg3) { + return memmgrStateLoad(pGpu, (struct MemoryManager *)(((unsigned char *) pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_MemoryManager_engstateStatePostLoad(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, NvU32 arg0) { - return memmgrStatePostLoad(pGpu, (struct MemoryManager *)(((unsigned char *)pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg0); +// memmgrStatePostLoad: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStatePostLoad(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, NvU32 arg3) { + return memmgrStatePostLoad(pGpu, (struct MemoryManager *)(((unsigned char *) pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_MemoryManager_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, NvU32 arg0) { - return memmgrStatePreUnload(pGpu, (struct MemoryManager *)(((unsigned char *)pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg0); +// memmgrStatePreUnload: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, NvU32 arg3) { + return memmgrStatePreUnload(pGpu, (struct MemoryManager *)(((unsigned char *) pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_MemoryManager_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, NvU32 arg0) { - return memmgrStateUnload(pGpu, (struct MemoryManager *)(((unsigned char *)pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg0); +// memmgrStateUnload: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, NvU32 arg3) { + return memmgrStateUnload(pGpu, (struct MemoryManager *)(((unsigned char *) pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_MemoryManager_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager) { - memmgrStateDestroy(pGpu, (struct MemoryManager *)(((unsigned char *)pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); +// memmgrStateDestroy: virtual override (engstate) base (engstate) +static void __nvoc_down_thunk_MemoryManager_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager) { + memmgrStateDestroy(pGpu, (struct MemoryManager *)(((unsigned char *) pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_memmgrStatePreLoad(POBJGPU pGpu, struct MemoryManager *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg0); + +// 6 up-thunk(s) defined to bridge methods in MemoryManager to superclasses + +// memmgrInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_memmgrInitMissing(POBJGPU pGpu, struct MemoryManager *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_memmgrStatePostUnload(POBJGPU pGpu, struct MemoryManager *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg0); +// memmgrStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_memmgrStatePreInitUnlocked(POBJGPU pGpu, struct MemoryManager *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_memmgrStateInitUnlocked(POBJGPU pGpu, struct MemoryManager *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); +// memmgrStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_memmgrStateInitUnlocked(POBJGPU pGpu, struct MemoryManager *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_memmgrInitMissing(POBJGPU pGpu, struct MemoryManager *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); +// memmgrStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_memmgrStatePreLoad(POBJGPU pGpu, struct MemoryManager *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_memmgrStatePreInitUnlocked(POBJGPU pGpu, struct MemoryManager *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); +// memmgrStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_memmgrStatePostUnload(POBJGPU pGpu, struct MemoryManager *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg3); } -static NvBool __nvoc_thunk_OBJENGSTATE_memmgrIsPresent(POBJGPU pGpu, struct MemoryManager *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); +// memmgrIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_memmgrIsPresent(POBJGPU pGpu, struct MemoryManager *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_MemoryManager = { /*numEntries=*/ 0, @@ -299,6 +319,7 @@ NV_STATUS __nvoc_ctor_MemoryManager(MemoryManager *pThis, RmHalspecOwner *pRmhal return status; } +// Vtable initialization static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -311,23 +332,39 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); + // memmgrConstructEngine -- virtual override (engstate) base (engstate) pThis->__memmgrConstructEngine__ = &memmgrConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_MemoryManager_engstateConstructEngine; + // memmgrStatePreInitLocked -- virtual override (engstate) base (engstate) pThis->__memmgrStatePreInitLocked__ = &memmgrStatePreInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_MemoryManager_engstateStatePreInitLocked; + // memmgrStateInitLocked -- virtual override (engstate) base (engstate) pThis->__memmgrStateInitLocked__ = &memmgrStateInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_MemoryManager_engstateStateInitLocked; + // memmgrStateLoad -- virtual override (engstate) base (engstate) pThis->__memmgrStateLoad__ = &memmgrStateLoad_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_MemoryManager_engstateStateLoad; + // memmgrStatePostLoad -- virtual override (engstate) base (engstate) pThis->__memmgrStatePostLoad__ = &memmgrStatePostLoad_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_MemoryManager_engstateStatePostLoad; + // memmgrStatePreUnload -- virtual override (engstate) base (engstate) pThis->__memmgrStatePreUnload__ = &memmgrStatePreUnload_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_MemoryManager_engstateStatePreUnload; + // memmgrStateUnload -- virtual override (engstate) base (engstate) pThis->__memmgrStateUnload__ = &memmgrStateUnload_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_MemoryManager_engstateStateUnload; + // memmgrStateDestroy -- virtual override (engstate) base (engstate) pThis->__memmgrStateDestroy__ = &memmgrStateDestroy_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_MemoryManager_engstateStateDestroy; - // Hal function -- memmgrAllocateConsoleRegion + // memmgrAllocateConsoleRegion -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__memmgrAllocateConsoleRegion__ = &memmgrAllocateConsoleRegion_56cd7a; @@ -337,7 +374,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrAllocateConsoleRegion__ = &memmgrAllocateConsoleRegion_IMPL; } - // Hal function -- memmgrMemUtilsSec2CtxInit + // memmgrMemUtilsSec2CtxInit -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__memmgrMemUtilsSec2CtxInit__ = &memmgrMemUtilsSec2CtxInit_GH100; @@ -348,7 +385,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrMemUtilsSec2CtxInit__ = &memmgrMemUtilsSec2CtxInit_46f6a7; } - // Hal function -- memmgrMemUtilsCheckMemoryFastScrubEnable + // memmgrMemUtilsCheckMemoryFastScrubEnable -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__memmgrMemUtilsCheckMemoryFastScrubEnable__ = &memmgrMemUtilsCheckMemoryFastScrubEnable_GH100; @@ -358,7 +395,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrMemUtilsCheckMemoryFastScrubEnable__ = &memmgrMemUtilsCheckMemoryFastScrubEnable_491d52; } - // Hal function -- memmgrAllocDetermineAlignment + // memmgrAllocDetermineAlignment -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__memmgrAllocDetermineAlignment__ = &memmgrAllocDetermineAlignment_GM107; @@ -368,7 +405,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrAllocDetermineAlignment__ = &memmgrAllocDetermineAlignment_GA100; } - // Hal function -- memmgrGetMaxContextSize + // memmgrGetMaxContextSize -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__memmgrGetMaxContextSize__ = &memmgrGetMaxContextSize_TU102; @@ -382,17 +419,17 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrGetMaxContextSize__ = &memmgrGetMaxContextSize_GA100; } - // Hal function -- memmgrGetFbTaxSize + // memmgrGetFbTaxSize -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__memmgrGetFbTaxSize__ = &memmgrGetFbTaxSize_VGPUSTUB; + pThis->__memmgrGetFbTaxSize__ = &memmgrGetFbTaxSize_VF; } else { pThis->__memmgrGetFbTaxSize__ = &memmgrGetFbTaxSize_4a4dee; } - // Hal function -- memmgrScrubRegistryOverrides + // memmgrScrubRegistryOverrides -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__memmgrScrubRegistryOverrides__ = &memmgrScrubRegistryOverrides_GM107; @@ -402,7 +439,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrScrubRegistryOverrides__ = &memmgrScrubRegistryOverrides_GA100; } - // Hal function -- memmgrGetPteKindBl + // memmgrGetPteKindBl -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__memmgrGetPteKindBl__ = &memmgrGetPteKindBl_474d46; @@ -412,7 +449,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrGetPteKindBl__ = &memmgrGetPteKindBl_GM107; } - // Hal function -- memmgrGetPteKindPitch + // memmgrGetPteKindPitch -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__memmgrGetPteKindPitch__ = &memmgrGetPteKindPitch_474d46; @@ -422,7 +459,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrGetPteKindPitch__ = &memmgrGetPteKindPitch_GM107; } - // Hal function -- memmgrChooseKindCompressC + // memmgrChooseKindCompressC -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__memmgrChooseKindCompressC__ = &memmgrChooseKindCompressC_474d46; @@ -432,7 +469,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrChooseKindCompressC__ = &memmgrChooseKindCompressC_GP100; } - // Hal function -- memmgrGetFlaKind + // memmgrGetFlaKind -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__memmgrGetFlaKind__ = &memmgrGetFlaKind_46f6a7; @@ -442,7 +479,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrGetFlaKind__ = &memmgrGetFlaKind_GA100; } - // Hal function -- memmgrIsMemDescSupportedByFla + // memmgrIsMemDescSupportedByFla -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ { pThis->__memmgrIsMemDescSupportedByFla__ = &memmgrIsMemDescSupportedByFla_GA100; @@ -453,7 +490,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrIsMemDescSupportedByFla__ = &memmgrIsMemDescSupportedByFla_46f6a7; } - // Hal function -- memmgrDetermineComptag + // memmgrDetermineComptag -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__memmgrDetermineComptag__ = &memmgrDetermineComptag_TU102; @@ -463,17 +500,17 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrDetermineComptag__ = &memmgrDetermineComptag_13cd8d; } - // Hal function -- memmgrGetGrHeapReservationSize + // memmgrGetGrHeapReservationSize -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__memmgrGetGrHeapReservationSize__ = &memmgrGetGrHeapReservationSize_VGPUSTUB; + pThis->__memmgrGetGrHeapReservationSize__ = &memmgrGetGrHeapReservationSize_VF; } else { pThis->__memmgrGetGrHeapReservationSize__ = &memmgrGetGrHeapReservationSize_4a4dee; } - // Hal function -- memmgrGetRunlistEntriesReservedFbSpace + // memmgrGetRunlistEntriesReservedFbSpace -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__memmgrGetRunlistEntriesReservedFbSpace__ = &memmgrGetRunlistEntriesReservedFbSpace_4a4dee; @@ -483,7 +520,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrGetRunlistEntriesReservedFbSpace__ = &memmgrGetRunlistEntriesReservedFbSpace_GM107; } - // Hal function -- memmgrGetUserdReservedFbSpace + // memmgrGetUserdReservedFbSpace -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__memmgrGetUserdReservedFbSpace__ = &memmgrGetUserdReservedFbSpace_4a4dee; @@ -493,7 +530,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrGetUserdReservedFbSpace__ = &memmgrGetUserdReservedFbSpace_GM107; } - // Hal function -- memmgrCheckReservedMemorySize + // memmgrCheckReservedMemorySize -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__memmgrCheckReservedMemorySize__ = &memmgrCheckReservedMemorySize_GK104; @@ -504,7 +541,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrCheckReservedMemorySize__ = &memmgrCheckReservedMemorySize_56cd7a; } - // Hal function -- memmgrReadMmuLock + // memmgrReadMmuLock -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__memmgrReadMmuLock__ = &memmgrReadMmuLock_GA100; @@ -514,7 +551,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrReadMmuLock__ = &memmgrReadMmuLock_e133c0; } - // Hal function -- memmgrBlockMemLockedMemory + // memmgrBlockMemLockedMemory -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__memmgrBlockMemLockedMemory__ = &memmgrBlockMemLockedMemory_GA100; @@ -524,7 +561,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrBlockMemLockedMemory__ = &memmgrBlockMemLockedMemory_56cd7a; } - // Hal function -- memmgrInsertUnprotectedRegionAtBottomOfFb + // memmgrInsertUnprotectedRegionAtBottomOfFb -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__memmgrInsertUnprotectedRegionAtBottomOfFb__ = &memmgrInsertUnprotectedRegionAtBottomOfFb_GA100; @@ -534,17 +571,17 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrInsertUnprotectedRegionAtBottomOfFb__ = &memmgrInsertUnprotectedRegionAtBottomOfFb_56cd7a; } - // Hal function -- memmgrInitBaseFbRegions + // memmgrInitBaseFbRegions -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__memmgrInitBaseFbRegions__ = &memmgrInitBaseFbRegions_VGPUSTUB; + pThis->__memmgrInitBaseFbRegions__ = &memmgrInitBaseFbRegions_VF; } else { pThis->__memmgrInitBaseFbRegions__ = &memmgrInitBaseFbRegions_FWCLIENT; } - // Hal function -- memmgrGetDisablePlcKind + // memmgrGetDisablePlcKind -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__memmgrGetDisablePlcKind__ = &memmgrGetDisablePlcKind_b3696a; @@ -554,7 +591,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrGetDisablePlcKind__ = &memmgrGetDisablePlcKind_GA100; } - // Hal function -- memmgrEnableDynamicPageOfflining + // memmgrEnableDynamicPageOfflining -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { pThis->__memmgrEnableDynamicPageOfflining__ = &memmgrEnableDynamicPageOfflining_GA100; @@ -568,7 +605,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrEnableDynamicPageOfflining__ = &memmgrEnableDynamicPageOfflining_GA102; } - // Hal function -- memmgrSetPartitionableMem + // memmgrSetPartitionableMem -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__memmgrSetPartitionableMem__ = &memmgrSetPartitionableMem_56cd7a; @@ -579,7 +616,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrSetPartitionableMem__ = &memmgrSetPartitionableMem_IMPL; } - // Hal function -- memmgrAllocMIGGPUInstanceMemory + // memmgrAllocMIGGPUInstanceMemory -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__memmgrAllocMIGGPUInstanceMemory__ = &memmgrAllocMIGGPUInstanceMemory_VF; @@ -589,7 +626,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrAllocMIGGPUInstanceMemory__ = &memmgrAllocMIGGPUInstanceMemory_PF; } - // Hal function -- memmgrGetBlackListPages + // memmgrGetBlackListPages -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__memmgrGetBlackListPages__ = &memmgrGetBlackListPages_GM107; @@ -599,7 +636,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrGetBlackListPages__ = &memmgrGetBlackListPages_GA100; } - // Hal function -- memmgrDiscoverMIGPartitionableMemoryRange + // memmgrDiscoverMIGPartitionableMemoryRange -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__memmgrDiscoverMIGPartitionableMemoryRange__ = &memmgrDiscoverMIGPartitionableMemoryRange_VF; @@ -609,47 +646,30 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe pThis->__memmgrDiscoverMIGPartitionableMemoryRange__ = &memmgrDiscoverMIGPartitionableMemoryRange_46f6a7; } - // Hal function -- memmgrValidateFBEndReservation - if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ - { - pThis->__memmgrValidateFBEndReservation__ = &memmgrValidateFBEndReservation_PF; - } - // default - else - { - pThis->__memmgrValidateFBEndReservation__ = &memmgrValidateFBEndReservation_56cd7a; - } - - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_MemoryManager_engstateConstructEngine; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_thunk_MemoryManager_engstateStatePreInitLocked; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_thunk_MemoryManager_engstateStateInitLocked; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_thunk_MemoryManager_engstateStateLoad; - - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_thunk_MemoryManager_engstateStatePostLoad; + // memmgrInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__memmgrInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_memmgrInitMissing; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_thunk_MemoryManager_engstateStatePreUnload; + // memmgrStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__memmgrStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_memmgrStatePreInitUnlocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_thunk_MemoryManager_engstateStateUnload; + // memmgrStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__memmgrStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_memmgrStateInitUnlocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_thunk_MemoryManager_engstateStateDestroy; + // memmgrStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__memmgrStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_memmgrStatePreLoad; - pThis->__memmgrStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_memmgrStatePreLoad; + // memmgrStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__memmgrStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_memmgrStatePostUnload; - pThis->__memmgrStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_memmgrStatePostUnload; + // memmgrIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__memmgrIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_memmgrIsPresent; +} // End __nvoc_init_funcTable_MemoryManager_1 with approximately 78 basic block(s). - pThis->__memmgrStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_memmgrStateInitUnlocked; - - pThis->__memmgrInitMissing__ = &__nvoc_thunk_OBJENGSTATE_memmgrInitMissing; - - pThis->__memmgrStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_memmgrStatePreInitUnlocked; - - pThis->__memmgrIsPresent__ = &__nvoc_thunk_OBJENGSTATE_memmgrIsPresent; -} +// Initialize vtable(s) for 41 virtual method(s). void __nvoc_init_funcTable_MemoryManager(MemoryManager *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 41 per-object function pointer(s). __nvoc_init_funcTable_MemoryManager_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_mem_mgr_nvoc.h b/src/nvidia/generated/g_mem_mgr_nvoc.h index 8881723be9..c98b83ce72 100644 --- a/src/nvidia/generated/g_mem_mgr_nvoc.h +++ b/src/nvidia/generated/g_mem_mgr_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_MEM_MGR_NVOC_H_ #define _G_MEM_MGR_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_mem_mgr_nvoc.h" #ifndef MEM_MGR_H @@ -51,6 +59,7 @@ extern "C" { #include "gpu/mem_mgr/phys_mem_allocator/phys_mem_allocator.h" + struct CeUtils; #ifndef __NVOC_CLASS_CeUtils_TYPEDEF__ @@ -338,8 +347,7 @@ typedef struct OBJCHANNEL KERNEL_MIG_GPU_INSTANCE *pKernelMIGGpuInstance; NvHandle hPartitionRef; - NvBool bSecure; - + NvBool bUseBar1; } OBJCHANNEL, *POBJCHANNEL; #define NV_METHOD(SubCh, Method, Num) \ @@ -389,6 +397,7 @@ typedef struct NvBool bProtected; // Represents a protected region of memory. NvBool bInternalHeap; // PMA:Used for internal RM allocations NvBool bLostOnSuspend; // Not required to be Saved during S/R. + NvBool bPreserveOnSuspend; // Required to be Saved during S/R. } FB_REGION_DESCRIPTOR, *PFB_REGION_DESCRIPTOR; #define MAX_FB_REGIONS 16 @@ -409,13 +418,12 @@ typedef struct _def_fb_mem_node } FB_MEM_NODE, *PFB_MEM_NODE; // defines for MemoryManager::fbsrReservedRanges -#define MAX_FBSR_RESERVED_REGIONS 6 // Max. Memory descriptors for RM Instance memory -#define FBSR_RESERVED_INST_MEMORY_BEFORE_BAR2PTE 0 -#define FBSR_RESERVED_INST_MEMORY_AFTER_BAR2PTE 1 -#define FBSR_RESERVED_INST_MEMORY_GSP_HEAP 2 -#define FBSR_RESERVED_INST_MEMORY_GSP_NON_WPR 3 -#define FBSR_RESERVED_INST_MEMORY_GSP_WPR 4 -#define FBSR_RESERVED_INST_MEMORY_VGA_WORKSPACE 5 +#define MAX_FBSR_RESERVED_REGIONS 5 // Max. Memory descriptors for RM Instance memory +#define FBSR_RESERVED_INST_MEMORY_BEFORE_BAR2PTE 0 // Described on Kernel-RM and Physical-RM (Monolithic / GSP offload) +#define FBSR_RESERVED_INST_MEMORY_AFTER_BAR2PTE 1 // Described on Kernel-RM and Physical-RM (Monolithic / GSP offload) +#define FBSR_RESERVED_INST_MEMORY_GSP_HEAP 2 // Allocated on Kernel-RM and sent to Physical-RM (GSP offload) +#define FBSR_RESERVED_INST_MEMORY_GSP_NON_WPR 3 // Described on Physical-RM (GSP offload) +#define FBSR_RESERVED_INST_MEMORY_VGA_WORKSPACE 4 // Described on Physical-RM (GSP offload) /*! * MemoryManager provides the root memory management of GPU video memory. @@ -476,54 +484,64 @@ struct MIG_MEMORY_PARTITIONING_INFO { }; + struct MemoryManager { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct MemoryManager *__nvoc_pbase_MemoryManager; - NV_STATUS (*__memmgrConstructEngine__)(OBJGPU *, struct MemoryManager *, ENGDESCRIPTOR); - NV_STATUS (*__memmgrStatePreInitLocked__)(OBJGPU *, struct MemoryManager *); - NV_STATUS (*__memmgrStateInitLocked__)(OBJGPU *, struct MemoryManager *); - NV_STATUS (*__memmgrStateLoad__)(OBJGPU *, struct MemoryManager *, NvU32); - NV_STATUS (*__memmgrStatePostLoad__)(OBJGPU *, struct MemoryManager *, NvU32); - NV_STATUS (*__memmgrStatePreUnload__)(OBJGPU *, struct MemoryManager *, NvU32); - NV_STATUS (*__memmgrStateUnload__)(OBJGPU *, struct MemoryManager *, NvU32); - void (*__memmgrStateDestroy__)(OBJGPU *, struct MemoryManager *); - NV_STATUS (*__memmgrAllocateConsoleRegion__)(OBJGPU *, struct MemoryManager *, FB_REGION_DESCRIPTOR *); - NV_STATUS (*__memmgrMemUtilsSec2CtxInit__)(OBJGPU *, struct MemoryManager *, OBJCHANNEL *); - NvBool (*__memmgrMemUtilsCheckMemoryFastScrubEnable__)(OBJGPU *, struct MemoryManager *, NvU32, NvBool, RmPhysAddr, NvU32, NV_ADDRESS_SPACE); - NV_STATUS (*__memmgrAllocDetermineAlignment__)(OBJGPU *, struct MemoryManager *, NvU64 *, NvU64 *, NvU64, NvU32, NvU32, NvU32, NvU64); - NvU64 (*__memmgrGetMaxContextSize__)(OBJGPU *, struct MemoryManager *); - NvU64 (*__memmgrGetFbTaxSize__)(OBJGPU *, struct MemoryManager *); - void (*__memmgrScrubRegistryOverrides__)(OBJGPU *, struct MemoryManager *); - NvU32 (*__memmgrGetPteKindBl__)(OBJGPU *, struct MemoryManager *); - NvU32 (*__memmgrGetPteKindPitch__)(OBJGPU *, struct MemoryManager *); - NvU32 (*__memmgrChooseKindCompressC__)(OBJGPU *, struct MemoryManager *, FB_ALLOC_PAGE_FORMAT *); - NV_STATUS (*__memmgrGetFlaKind__)(OBJGPU *, struct MemoryManager *, NvU32 *); - NvBool (*__memmgrIsMemDescSupportedByFla__)(OBJGPU *, struct MemoryManager *, MEMORY_DESCRIPTOR *); - NvU32 (*__memmgrDetermineComptag__)(OBJGPU *, struct MemoryManager *, RmPhysAddr); - NvU32 (*__memmgrGetGrHeapReservationSize__)(OBJGPU *, struct MemoryManager *); - NvU32 (*__memmgrGetRunlistEntriesReservedFbSpace__)(OBJGPU *, struct MemoryManager *); - NvU32 (*__memmgrGetUserdReservedFbSpace__)(OBJGPU *, struct MemoryManager *); - NV_STATUS (*__memmgrCheckReservedMemorySize__)(OBJGPU *, struct MemoryManager *); - NV_STATUS (*__memmgrReadMmuLock__)(OBJGPU *, struct MemoryManager *, NvBool *, NvU64 *, NvU64 *); - NV_STATUS (*__memmgrBlockMemLockedMemory__)(OBJGPU *, struct MemoryManager *); - NV_STATUS (*__memmgrInsertUnprotectedRegionAtBottomOfFb__)(OBJGPU *, struct MemoryManager *, NvU64 *); - NV_STATUS (*__memmgrInitBaseFbRegions__)(OBJGPU *, struct MemoryManager *); - void (*__memmgrGetDisablePlcKind__)(struct MemoryManager *, NvU32 *); - void (*__memmgrEnableDynamicPageOfflining__)(OBJGPU *, struct MemoryManager *); - NV_STATUS (*__memmgrSetPartitionableMem__)(OBJGPU *, struct MemoryManager *); - NV_STATUS (*__memmgrAllocMIGGPUInstanceMemory__)(OBJGPU *, struct MemoryManager *, NvU32, NvHandle *, struct NV_RANGE *, struct Heap **); - NV_STATUS (*__memmgrGetBlackListPages__)(OBJGPU *, struct MemoryManager *, BLACKLIST_ADDRESS *, NvU32 *); - NV_STATUS (*__memmgrDiscoverMIGPartitionableMemoryRange__)(OBJGPU *, struct MemoryManager *, struct NV_RANGE *); - NV_STATUS (*__memmgrValidateFBEndReservation__)(OBJGPU *, struct MemoryManager *); - NV_STATUS (*__memmgrStatePreLoad__)(POBJGPU, struct MemoryManager *, NvU32); - NV_STATUS (*__memmgrStatePostUnload__)(POBJGPU, struct MemoryManager *, NvU32); - NV_STATUS (*__memmgrStateInitUnlocked__)(POBJGPU, struct MemoryManager *); - void (*__memmgrInitMissing__)(POBJGPU, struct MemoryManager *); - NV_STATUS (*__memmgrStatePreInitUnlocked__)(POBJGPU, struct MemoryManager *); - NvBool (*__memmgrIsPresent__)(POBJGPU, struct MemoryManager *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct MemoryManager *__nvoc_pbase_MemoryManager; // memmgr + + // Vtable with 41 per-object function pointers + NV_STATUS (*__memmgrConstructEngine__)(OBJGPU *, struct MemoryManager * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__memmgrStatePreInitLocked__)(OBJGPU *, struct MemoryManager * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__memmgrStateInitLocked__)(OBJGPU *, struct MemoryManager * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__memmgrStateLoad__)(OBJGPU *, struct MemoryManager * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__memmgrStatePostLoad__)(OBJGPU *, struct MemoryManager * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__memmgrStatePreUnload__)(OBJGPU *, struct MemoryManager * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__memmgrStateUnload__)(OBJGPU *, struct MemoryManager * /*this*/, NvU32); // virtual override (engstate) base (engstate) + void (*__memmgrStateDestroy__)(OBJGPU *, struct MemoryManager * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__memmgrAllocateConsoleRegion__)(OBJGPU *, struct MemoryManager * /*this*/, FB_REGION_DESCRIPTOR *); // halified (2 hals) body + NV_STATUS (*__memmgrMemUtilsSec2CtxInit__)(OBJGPU *, struct MemoryManager * /*this*/, OBJCHANNEL *); // halified (2 hals) body + NvBool (*__memmgrMemUtilsCheckMemoryFastScrubEnable__)(OBJGPU *, struct MemoryManager * /*this*/, NvU32, NvBool, RmPhysAddr, NvU32, NV_ADDRESS_SPACE); // halified (2 hals) body + NV_STATUS (*__memmgrAllocDetermineAlignment__)(OBJGPU *, struct MemoryManager * /*this*/, NvU64 *, NvU64 *, NvU64, NvU32, NvU32, NvU32, NvU64); // halified (2 hals) body + NvU64 (*__memmgrGetMaxContextSize__)(OBJGPU *, struct MemoryManager * /*this*/); // halified (3 hals) body + NvU64 (*__memmgrGetFbTaxSize__)(OBJGPU *, struct MemoryManager * /*this*/); // halified (2 hals) body + void (*__memmgrScrubRegistryOverrides__)(OBJGPU *, struct MemoryManager * /*this*/); // halified (2 hals) body + NvU32 (*__memmgrGetPteKindBl__)(OBJGPU *, struct MemoryManager * /*this*/); // halified (2 hals) body + NvU32 (*__memmgrGetPteKindPitch__)(OBJGPU *, struct MemoryManager * /*this*/); // halified (2 hals) body + NvU32 (*__memmgrChooseKindCompressC__)(OBJGPU *, struct MemoryManager * /*this*/, FB_ALLOC_PAGE_FORMAT *); // halified (2 hals) body + NV_STATUS (*__memmgrGetFlaKind__)(OBJGPU *, struct MemoryManager * /*this*/, NvU32 *); // halified (2 hals) body + NvBool (*__memmgrIsMemDescSupportedByFla__)(OBJGPU *, struct MemoryManager * /*this*/, MEMORY_DESCRIPTOR *); // halified (2 hals) body + NvU32 (*__memmgrDetermineComptag__)(OBJGPU *, struct MemoryManager * /*this*/, RmPhysAddr); // halified (2 hals) body + NvU32 (*__memmgrGetGrHeapReservationSize__)(OBJGPU *, struct MemoryManager * /*this*/); // halified (2 hals) body + NvU32 (*__memmgrGetRunlistEntriesReservedFbSpace__)(OBJGPU *, struct MemoryManager * /*this*/); // halified (2 hals) body + NvU32 (*__memmgrGetUserdReservedFbSpace__)(OBJGPU *, struct MemoryManager * /*this*/); // halified (2 hals) body + NV_STATUS (*__memmgrCheckReservedMemorySize__)(OBJGPU *, struct MemoryManager * /*this*/); // halified (2 hals) body + NV_STATUS (*__memmgrReadMmuLock__)(OBJGPU *, struct MemoryManager * /*this*/, NvBool *, NvU64 *, NvU64 *); // halified (2 hals) body + NV_STATUS (*__memmgrBlockMemLockedMemory__)(OBJGPU *, struct MemoryManager * /*this*/); // halified (2 hals) body + NV_STATUS (*__memmgrInsertUnprotectedRegionAtBottomOfFb__)(OBJGPU *, struct MemoryManager * /*this*/, NvU64 *); // halified (2 hals) body + NV_STATUS (*__memmgrInitBaseFbRegions__)(OBJGPU *, struct MemoryManager * /*this*/); // halified (2 hals) body + void (*__memmgrGetDisablePlcKind__)(struct MemoryManager * /*this*/, NvU32 *); // halified (2 hals) body + void (*__memmgrEnableDynamicPageOfflining__)(OBJGPU *, struct MemoryManager * /*this*/); // halified (3 hals) body + NV_STATUS (*__memmgrSetPartitionableMem__)(OBJGPU *, struct MemoryManager * /*this*/); // halified (2 hals) body + NV_STATUS (*__memmgrAllocMIGGPUInstanceMemory__)(OBJGPU *, struct MemoryManager * /*this*/, NvU32, NvHandle *, struct NV_RANGE *, struct Heap **); // halified (2 hals) + NV_STATUS (*__memmgrGetBlackListPages__)(OBJGPU *, struct MemoryManager * /*this*/, BLACKLIST_ADDRESS *, NvU32 *); // halified (2 hals) body + NV_STATUS (*__memmgrDiscoverMIGPartitionableMemoryRange__)(OBJGPU *, struct MemoryManager * /*this*/, struct NV_RANGE *); // halified (2 hals) body + void (*__memmgrInitMissing__)(POBJGPU, struct MemoryManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__memmgrStatePreInitUnlocked__)(POBJGPU, struct MemoryManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__memmgrStateInitUnlocked__)(POBJGPU, struct MemoryManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__memmgrStatePreLoad__)(POBJGPU, struct MemoryManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__memmgrStatePostUnload__)(POBJGPU, struct MemoryManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__memmgrIsPresent__)(POBJGPU, struct MemoryManager * /*this*/); // virtual inherited (engstate) base (engstate) + + // Data members NvBool bFbsrWddmModeEnabled; NvBool bFbRegionsSupported; NvBool bPmaSupportedOnPlatform; @@ -572,7 +590,6 @@ struct MemoryManager { NvU64 rsvdMemoryBase; NvU32 rsvdMemorySize; struct CeUtils *pCeUtils; - struct CeUtils *pCeUtilsSuspended; NvBool bDisableGlobalCeUtils; OBJSCRUB eccScrubberState; struct __nvoc_inner_struc_MemoryManager_1__ Ram; @@ -585,7 +602,7 @@ struct MemoryManager { struct OBJFBSR *pActiveFbsr; NvU32 fbsrStartMode; NvU32 fixedFbsrModesMask; - MEMORY_DESCRIPTOR *fbsrReservedRanges[6]; + MEMORY_DESCRIPTOR *fbsrReservedRanges[5]; PFB_MEM_NODE pMemHeadNode; PFB_MEM_NODE pMemTailNode; struct RM_POOL_ALLOC_MEM_RESERVE_INFO *pPageLevelReserve; @@ -595,6 +612,8 @@ struct MemoryManager { NvHandle hDevice; NvHandle hSubdevice; NvBool bReservedMemAtBottom; + NvU64 bug4146226ReserveOffset; + NvBool bBug4146226ReserveWar; NvHandle hThirdPartyP2P; NvBool bMonitoredFenceSupported; NvBool b64BitSemaphoresSupported; @@ -610,6 +629,7 @@ typedef struct MemoryManager MemoryManager; #define __nvoc_class_id_MemoryManager 0x22ad47 #endif /* __nvoc_class_id_MemoryManager */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryManager; #define __staticCast_MemoryManager(pThis) \ @@ -622,6 +642,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryManager; ((MemoryManager*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(MemoryManager))) #endif //__nvoc_mem_mgr_h_disabled +// Property macros #define PDB_PROP_MEMMGR_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_MEMMGR_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -631,76 +652,283 @@ NV_STATUS __nvoc_objCreate_MemoryManager(MemoryManager**, Dynamic*, NvU32); #define __objCreate_MemoryManager(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_MemoryManager((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define memmgrConstructEngine(pGpu, pMemoryManager, arg0) memmgrConstructEngine_DISPATCH(pGpu, pMemoryManager, arg0) + +// Wrapper macros +#define memmgrConstructEngine_FNPTR(pMemoryManager) pMemoryManager->__memmgrConstructEngine__ +#define memmgrConstructEngine(pGpu, pMemoryManager, arg3) memmgrConstructEngine_DISPATCH(pGpu, pMemoryManager, arg3) +#define memmgrStatePreInitLocked_FNPTR(pMemoryManager) pMemoryManager->__memmgrStatePreInitLocked__ #define memmgrStatePreInitLocked(pGpu, pMemoryManager) memmgrStatePreInitLocked_DISPATCH(pGpu, pMemoryManager) +#define memmgrStateInitLocked_FNPTR(pMemoryManager) pMemoryManager->__memmgrStateInitLocked__ #define memmgrStateInitLocked(pGpu, pMemoryManager) memmgrStateInitLocked_DISPATCH(pGpu, pMemoryManager) -#define memmgrStateLoad(pGpu, pMemoryManager, arg0) memmgrStateLoad_DISPATCH(pGpu, pMemoryManager, arg0) -#define memmgrStatePostLoad(pGpu, pMemoryManager, arg0) memmgrStatePostLoad_DISPATCH(pGpu, pMemoryManager, arg0) -#define memmgrStatePreUnload(pGpu, pMemoryManager, arg0) memmgrStatePreUnload_DISPATCH(pGpu, pMemoryManager, arg0) -#define memmgrStateUnload(pGpu, pMemoryManager, arg0) memmgrStateUnload_DISPATCH(pGpu, pMemoryManager, arg0) +#define memmgrStateLoad_FNPTR(pMemoryManager) pMemoryManager->__memmgrStateLoad__ +#define memmgrStateLoad(pGpu, pMemoryManager, arg3) memmgrStateLoad_DISPATCH(pGpu, pMemoryManager, arg3) +#define memmgrStatePostLoad_FNPTR(pMemoryManager) pMemoryManager->__memmgrStatePostLoad__ +#define memmgrStatePostLoad(pGpu, pMemoryManager, arg3) memmgrStatePostLoad_DISPATCH(pGpu, pMemoryManager, arg3) +#define memmgrStatePreUnload_FNPTR(pMemoryManager) pMemoryManager->__memmgrStatePreUnload__ +#define memmgrStatePreUnload(pGpu, pMemoryManager, arg3) memmgrStatePreUnload_DISPATCH(pGpu, pMemoryManager, arg3) +#define memmgrStateUnload_FNPTR(pMemoryManager) pMemoryManager->__memmgrStateUnload__ +#define memmgrStateUnload(pGpu, pMemoryManager, arg3) memmgrStateUnload_DISPATCH(pGpu, pMemoryManager, arg3) +#define memmgrStateDestroy_FNPTR(pMemoryManager) pMemoryManager->__memmgrStateDestroy__ #define memmgrStateDestroy(pGpu, pMemoryManager) memmgrStateDestroy_DISPATCH(pGpu, pMemoryManager) -#define memmgrAllocateConsoleRegion(pGpu, pMemoryManager, arg0) memmgrAllocateConsoleRegion_DISPATCH(pGpu, pMemoryManager, arg0) -#define memmgrAllocateConsoleRegion_HAL(pGpu, pMemoryManager, arg0) memmgrAllocateConsoleRegion_DISPATCH(pGpu, pMemoryManager, arg0) -#define memmgrMemUtilsSec2CtxInit(pGpu, pMemoryManager, arg0) memmgrMemUtilsSec2CtxInit_DISPATCH(pGpu, pMemoryManager, arg0) -#define memmgrMemUtilsSec2CtxInit_HAL(pGpu, pMemoryManager, arg0) memmgrMemUtilsSec2CtxInit_DISPATCH(pGpu, pMemoryManager, arg0) -#define memmgrMemUtilsCheckMemoryFastScrubEnable(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4) memmgrMemUtilsCheckMemoryFastScrubEnable_DISPATCH(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4) -#define memmgrMemUtilsCheckMemoryFastScrubEnable_HAL(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4) memmgrMemUtilsCheckMemoryFastScrubEnable_DISPATCH(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4) +#define memmgrAllocateConsoleRegion_FNPTR(pMemoryManager) pMemoryManager->__memmgrAllocateConsoleRegion__ +#define memmgrAllocateConsoleRegion(pGpu, pMemoryManager, arg3) memmgrAllocateConsoleRegion_DISPATCH(pGpu, pMemoryManager, arg3) +#define memmgrAllocateConsoleRegion_HAL(pGpu, pMemoryManager, arg3) memmgrAllocateConsoleRegion_DISPATCH(pGpu, pMemoryManager, arg3) +#define memmgrMemUtilsSec2CtxInit_FNPTR(pMemoryManager) pMemoryManager->__memmgrMemUtilsSec2CtxInit__ +#define memmgrMemUtilsSec2CtxInit(pGpu, pMemoryManager, arg3) memmgrMemUtilsSec2CtxInit_DISPATCH(pGpu, pMemoryManager, arg3) +#define memmgrMemUtilsSec2CtxInit_HAL(pGpu, pMemoryManager, arg3) memmgrMemUtilsSec2CtxInit_DISPATCH(pGpu, pMemoryManager, arg3) +#define memmgrMemUtilsCheckMemoryFastScrubEnable_FNPTR(pMemoryManager) pMemoryManager->__memmgrMemUtilsCheckMemoryFastScrubEnable__ +#define memmgrMemUtilsCheckMemoryFastScrubEnable(pGpu, pMemoryManager, arg3, arg4, arg5, arg6, arg7) memmgrMemUtilsCheckMemoryFastScrubEnable_DISPATCH(pGpu, pMemoryManager, arg3, arg4, arg5, arg6, arg7) +#define memmgrMemUtilsCheckMemoryFastScrubEnable_HAL(pGpu, pMemoryManager, arg3, arg4, arg5, arg6, arg7) memmgrMemUtilsCheckMemoryFastScrubEnable_DISPATCH(pGpu, pMemoryManager, arg3, arg4, arg5, arg6, arg7) +#define memmgrAllocDetermineAlignment_FNPTR(pMemoryManager) pMemoryManager->__memmgrAllocDetermineAlignment__ #define memmgrAllocDetermineAlignment(pGpu, pMemoryManager, pMemSize, pAlign, alignPad, allocFlags, retAttr, retAttr2, hwAlignment) memmgrAllocDetermineAlignment_DISPATCH(pGpu, pMemoryManager, pMemSize, pAlign, alignPad, allocFlags, retAttr, retAttr2, hwAlignment) #define memmgrAllocDetermineAlignment_HAL(pGpu, pMemoryManager, pMemSize, pAlign, alignPad, allocFlags, retAttr, retAttr2, hwAlignment) memmgrAllocDetermineAlignment_DISPATCH(pGpu, pMemoryManager, pMemSize, pAlign, alignPad, allocFlags, retAttr, retAttr2, hwAlignment) +#define memmgrGetMaxContextSize_FNPTR(pMemoryManager) pMemoryManager->__memmgrGetMaxContextSize__ #define memmgrGetMaxContextSize(pGpu, pMemoryManager) memmgrGetMaxContextSize_DISPATCH(pGpu, pMemoryManager) #define memmgrGetMaxContextSize_HAL(pGpu, pMemoryManager) memmgrGetMaxContextSize_DISPATCH(pGpu, pMemoryManager) +#define memmgrGetFbTaxSize_FNPTR(pMemoryManager) pMemoryManager->__memmgrGetFbTaxSize__ #define memmgrGetFbTaxSize(pGpu, pMemoryManager) memmgrGetFbTaxSize_DISPATCH(pGpu, pMemoryManager) #define memmgrGetFbTaxSize_HAL(pGpu, pMemoryManager) memmgrGetFbTaxSize_DISPATCH(pGpu, pMemoryManager) +#define memmgrScrubRegistryOverrides_FNPTR(pMemoryManager) pMemoryManager->__memmgrScrubRegistryOverrides__ #define memmgrScrubRegistryOverrides(pGpu, pMemoryManager) memmgrScrubRegistryOverrides_DISPATCH(pGpu, pMemoryManager) #define memmgrScrubRegistryOverrides_HAL(pGpu, pMemoryManager) memmgrScrubRegistryOverrides_DISPATCH(pGpu, pMemoryManager) +#define memmgrGetPteKindBl_FNPTR(pMemoryManager) pMemoryManager->__memmgrGetPteKindBl__ #define memmgrGetPteKindBl(pGpu, pMemoryManager) memmgrGetPteKindBl_DISPATCH(pGpu, pMemoryManager) #define memmgrGetPteKindBl_HAL(pGpu, pMemoryManager) memmgrGetPteKindBl_DISPATCH(pGpu, pMemoryManager) +#define memmgrGetPteKindPitch_FNPTR(pMemoryManager) pMemoryManager->__memmgrGetPteKindPitch__ #define memmgrGetPteKindPitch(pGpu, pMemoryManager) memmgrGetPteKindPitch_DISPATCH(pGpu, pMemoryManager) #define memmgrGetPteKindPitch_HAL(pGpu, pMemoryManager) memmgrGetPteKindPitch_DISPATCH(pGpu, pMemoryManager) -#define memmgrChooseKindCompressC(pGpu, pMemoryManager, arg0) memmgrChooseKindCompressC_DISPATCH(pGpu, pMemoryManager, arg0) -#define memmgrChooseKindCompressC_HAL(pGpu, pMemoryManager, arg0) memmgrChooseKindCompressC_DISPATCH(pGpu, pMemoryManager, arg0) -#define memmgrGetFlaKind(pGpu, pMemoryManager, arg0) memmgrGetFlaKind_DISPATCH(pGpu, pMemoryManager, arg0) -#define memmgrGetFlaKind_HAL(pGpu, pMemoryManager, arg0) memmgrGetFlaKind_DISPATCH(pGpu, pMemoryManager, arg0) +#define memmgrChooseKindCompressC_FNPTR(pMemoryManager) pMemoryManager->__memmgrChooseKindCompressC__ +#define memmgrChooseKindCompressC(pGpu, pMemoryManager, arg3) memmgrChooseKindCompressC_DISPATCH(pGpu, pMemoryManager, arg3) +#define memmgrChooseKindCompressC_HAL(pGpu, pMemoryManager, arg3) memmgrChooseKindCompressC_DISPATCH(pGpu, pMemoryManager, arg3) +#define memmgrGetFlaKind_FNPTR(pMemoryManager) pMemoryManager->__memmgrGetFlaKind__ +#define memmgrGetFlaKind(pGpu, pMemoryManager, arg3) memmgrGetFlaKind_DISPATCH(pGpu, pMemoryManager, arg3) +#define memmgrGetFlaKind_HAL(pGpu, pMemoryManager, arg3) memmgrGetFlaKind_DISPATCH(pGpu, pMemoryManager, arg3) +#define memmgrIsMemDescSupportedByFla_FNPTR(pMemoryManager) pMemoryManager->__memmgrIsMemDescSupportedByFla__ #define memmgrIsMemDescSupportedByFla(pGpu, pMemoryManager, pMemDesc) memmgrIsMemDescSupportedByFla_DISPATCH(pGpu, pMemoryManager, pMemDesc) #define memmgrIsMemDescSupportedByFla_HAL(pGpu, pMemoryManager, pMemDesc) memmgrIsMemDescSupportedByFla_DISPATCH(pGpu, pMemoryManager, pMemDesc) -#define memmgrDetermineComptag(pGpu, pMemoryManager, arg0) memmgrDetermineComptag_DISPATCH(pGpu, pMemoryManager, arg0) -#define memmgrDetermineComptag_HAL(pGpu, pMemoryManager, arg0) memmgrDetermineComptag_DISPATCH(pGpu, pMemoryManager, arg0) +#define memmgrDetermineComptag_FNPTR(pMemoryManager) pMemoryManager->__memmgrDetermineComptag__ +#define memmgrDetermineComptag(pGpu, pMemoryManager, arg3) memmgrDetermineComptag_DISPATCH(pGpu, pMemoryManager, arg3) +#define memmgrDetermineComptag_HAL(pGpu, pMemoryManager, arg3) memmgrDetermineComptag_DISPATCH(pGpu, pMemoryManager, arg3) +#define memmgrGetGrHeapReservationSize_FNPTR(pMemoryManager) pMemoryManager->__memmgrGetGrHeapReservationSize__ #define memmgrGetGrHeapReservationSize(pGpu, pMemoryManager) memmgrGetGrHeapReservationSize_DISPATCH(pGpu, pMemoryManager) #define memmgrGetGrHeapReservationSize_HAL(pGpu, pMemoryManager) memmgrGetGrHeapReservationSize_DISPATCH(pGpu, pMemoryManager) +#define memmgrGetRunlistEntriesReservedFbSpace_FNPTR(pMemoryManager) pMemoryManager->__memmgrGetRunlistEntriesReservedFbSpace__ #define memmgrGetRunlistEntriesReservedFbSpace(pGpu, pMemoryManager) memmgrGetRunlistEntriesReservedFbSpace_DISPATCH(pGpu, pMemoryManager) #define memmgrGetRunlistEntriesReservedFbSpace_HAL(pGpu, pMemoryManager) memmgrGetRunlistEntriesReservedFbSpace_DISPATCH(pGpu, pMemoryManager) +#define memmgrGetUserdReservedFbSpace_FNPTR(pMemoryManager) pMemoryManager->__memmgrGetUserdReservedFbSpace__ #define memmgrGetUserdReservedFbSpace(pGpu, pMemoryManager) memmgrGetUserdReservedFbSpace_DISPATCH(pGpu, pMemoryManager) #define memmgrGetUserdReservedFbSpace_HAL(pGpu, pMemoryManager) memmgrGetUserdReservedFbSpace_DISPATCH(pGpu, pMemoryManager) +#define memmgrCheckReservedMemorySize_FNPTR(pMemoryManager) pMemoryManager->__memmgrCheckReservedMemorySize__ #define memmgrCheckReservedMemorySize(pGpu, pMemoryManager) memmgrCheckReservedMemorySize_DISPATCH(pGpu, pMemoryManager) #define memmgrCheckReservedMemorySize_HAL(pGpu, pMemoryManager) memmgrCheckReservedMemorySize_DISPATCH(pGpu, pMemoryManager) +#define memmgrReadMmuLock_FNPTR(pMemoryManager) pMemoryManager->__memmgrReadMmuLock__ #define memmgrReadMmuLock(pGpu, pMemoryManager, pbIsValid, pMmuLockLo, pMmuLockHi) memmgrReadMmuLock_DISPATCH(pGpu, pMemoryManager, pbIsValid, pMmuLockLo, pMmuLockHi) #define memmgrReadMmuLock_HAL(pGpu, pMemoryManager, pbIsValid, pMmuLockLo, pMmuLockHi) memmgrReadMmuLock_DISPATCH(pGpu, pMemoryManager, pbIsValid, pMmuLockLo, pMmuLockHi) +#define memmgrBlockMemLockedMemory_FNPTR(pMemoryManager) pMemoryManager->__memmgrBlockMemLockedMemory__ #define memmgrBlockMemLockedMemory(pGpu, pMemoryManager) memmgrBlockMemLockedMemory_DISPATCH(pGpu, pMemoryManager) #define memmgrBlockMemLockedMemory_HAL(pGpu, pMemoryManager) memmgrBlockMemLockedMemory_DISPATCH(pGpu, pMemoryManager) +#define memmgrInsertUnprotectedRegionAtBottomOfFb_FNPTR(pMemoryManager) pMemoryManager->__memmgrInsertUnprotectedRegionAtBottomOfFb__ #define memmgrInsertUnprotectedRegionAtBottomOfFb(pGpu, pMemoryManager, pSize) memmgrInsertUnprotectedRegionAtBottomOfFb_DISPATCH(pGpu, pMemoryManager, pSize) #define memmgrInsertUnprotectedRegionAtBottomOfFb_HAL(pGpu, pMemoryManager, pSize) memmgrInsertUnprotectedRegionAtBottomOfFb_DISPATCH(pGpu, pMemoryManager, pSize) +#define memmgrInitBaseFbRegions_FNPTR(pMemoryManager) pMemoryManager->__memmgrInitBaseFbRegions__ #define memmgrInitBaseFbRegions(pGpu, pMemoryManager) memmgrInitBaseFbRegions_DISPATCH(pGpu, pMemoryManager) #define memmgrInitBaseFbRegions_HAL(pGpu, pMemoryManager) memmgrInitBaseFbRegions_DISPATCH(pGpu, pMemoryManager) +#define memmgrGetDisablePlcKind_FNPTR(pMemoryManager) pMemoryManager->__memmgrGetDisablePlcKind__ #define memmgrGetDisablePlcKind(pMemoryManager, pteKind) memmgrGetDisablePlcKind_DISPATCH(pMemoryManager, pteKind) #define memmgrGetDisablePlcKind_HAL(pMemoryManager, pteKind) memmgrGetDisablePlcKind_DISPATCH(pMemoryManager, pteKind) +#define memmgrEnableDynamicPageOfflining_FNPTR(pMemoryManager) pMemoryManager->__memmgrEnableDynamicPageOfflining__ #define memmgrEnableDynamicPageOfflining(pGpu, pMemoryManager) memmgrEnableDynamicPageOfflining_DISPATCH(pGpu, pMemoryManager) #define memmgrEnableDynamicPageOfflining_HAL(pGpu, pMemoryManager) memmgrEnableDynamicPageOfflining_DISPATCH(pGpu, pMemoryManager) +#define memmgrSetPartitionableMem_FNPTR(pMemoryManager) pMemoryManager->__memmgrSetPartitionableMem__ #define memmgrSetPartitionableMem(pGpu, pMemoryManager) memmgrSetPartitionableMem_DISPATCH(pGpu, pMemoryManager) #define memmgrSetPartitionableMem_HAL(pGpu, pMemoryManager) memmgrSetPartitionableMem_DISPATCH(pGpu, pMemoryManager) +#define memmgrAllocMIGGPUInstanceMemory_FNPTR(pMemoryManager) pMemoryManager->__memmgrAllocMIGGPUInstanceMemory__ #define memmgrAllocMIGGPUInstanceMemory(pGpu, pMemoryManager, swizzId, phMemory, pAddrRange, ppMemoryPartitionHeap) memmgrAllocMIGGPUInstanceMemory_DISPATCH(pGpu, pMemoryManager, swizzId, phMemory, pAddrRange, ppMemoryPartitionHeap) #define memmgrAllocMIGGPUInstanceMemory_HAL(pGpu, pMemoryManager, swizzId, phMemory, pAddrRange, ppMemoryPartitionHeap) memmgrAllocMIGGPUInstanceMemory_DISPATCH(pGpu, pMemoryManager, swizzId, phMemory, pAddrRange, ppMemoryPartitionHeap) +#define memmgrGetBlackListPages_FNPTR(pMemoryManager) pMemoryManager->__memmgrGetBlackListPages__ #define memmgrGetBlackListPages(pGpu, pMemoryManager, pBlAddrs, pCount) memmgrGetBlackListPages_DISPATCH(pGpu, pMemoryManager, pBlAddrs, pCount) #define memmgrGetBlackListPages_HAL(pGpu, pMemoryManager, pBlAddrs, pCount) memmgrGetBlackListPages_DISPATCH(pGpu, pMemoryManager, pBlAddrs, pCount) +#define memmgrDiscoverMIGPartitionableMemoryRange_FNPTR(pMemoryManager) pMemoryManager->__memmgrDiscoverMIGPartitionableMemoryRange__ #define memmgrDiscoverMIGPartitionableMemoryRange(pGpu, pMemoryManager, pMemoryRange) memmgrDiscoverMIGPartitionableMemoryRange_DISPATCH(pGpu, pMemoryManager, pMemoryRange) #define memmgrDiscoverMIGPartitionableMemoryRange_HAL(pGpu, pMemoryManager, pMemoryRange) memmgrDiscoverMIGPartitionableMemoryRange_DISPATCH(pGpu, pMemoryManager, pMemoryRange) -#define memmgrValidateFBEndReservation(pGpu, pMemoryManager) memmgrValidateFBEndReservation_DISPATCH(pGpu, pMemoryManager) -#define memmgrValidateFBEndReservation_HAL(pGpu, pMemoryManager) memmgrValidateFBEndReservation_DISPATCH(pGpu, pMemoryManager) -#define memmgrStatePreLoad(pGpu, pEngstate, arg0) memmgrStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define memmgrStatePostUnload(pGpu, pEngstate, arg0) memmgrStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define memmgrStateInitUnlocked(pGpu, pEngstate) memmgrStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define memmgrInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define memmgrInitMissing(pGpu, pEngstate) memmgrInitMissing_DISPATCH(pGpu, pEngstate) +#define memmgrStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define memmgrStatePreInitUnlocked(pGpu, pEngstate) memmgrStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) +#define memmgrStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define memmgrStateInitUnlocked(pGpu, pEngstate) memmgrStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define memmgrStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define memmgrStatePreLoad(pGpu, pEngstate, arg3) memmgrStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define memmgrStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define memmgrStatePostUnload(pGpu, pEngstate, arg3) memmgrStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define memmgrIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define memmgrIsPresent(pGpu, pEngstate) memmgrIsPresent_DISPATCH(pGpu, pEngstate) + +// Dispatch functions +static inline NV_STATUS memmgrConstructEngine_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, ENGDESCRIPTOR arg3) { + return pMemoryManager->__memmgrConstructEngine__(pGpu, pMemoryManager, arg3); +} + +static inline NV_STATUS memmgrStatePreInitLocked_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + return pMemoryManager->__memmgrStatePreInitLocked__(pGpu, pMemoryManager); +} + +static inline NV_STATUS memmgrStateInitLocked_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + return pMemoryManager->__memmgrStateInitLocked__(pGpu, pMemoryManager); +} + +static inline NV_STATUS memmgrStateLoad_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3) { + return pMemoryManager->__memmgrStateLoad__(pGpu, pMemoryManager, arg3); +} + +static inline NV_STATUS memmgrStatePostLoad_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3) { + return pMemoryManager->__memmgrStatePostLoad__(pGpu, pMemoryManager, arg3); +} + +static inline NV_STATUS memmgrStatePreUnload_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3) { + return pMemoryManager->__memmgrStatePreUnload__(pGpu, pMemoryManager, arg3); +} + +static inline NV_STATUS memmgrStateUnload_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3) { + return pMemoryManager->__memmgrStateUnload__(pGpu, pMemoryManager, arg3); +} + +static inline void memmgrStateDestroy_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + pMemoryManager->__memmgrStateDestroy__(pGpu, pMemoryManager); +} + +static inline NV_STATUS memmgrAllocateConsoleRegion_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_REGION_DESCRIPTOR *arg3) { + return pMemoryManager->__memmgrAllocateConsoleRegion__(pGpu, pMemoryManager, arg3); +} + +static inline NV_STATUS memmgrMemUtilsSec2CtxInit_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3) { + return pMemoryManager->__memmgrMemUtilsSec2CtxInit__(pGpu, pMemoryManager, arg3); +} + +static inline NvBool memmgrMemUtilsCheckMemoryFastScrubEnable_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3, NvBool arg4, RmPhysAddr arg5, NvU32 arg6, NV_ADDRESS_SPACE arg7) { + return pMemoryManager->__memmgrMemUtilsCheckMemoryFastScrubEnable__(pGpu, pMemoryManager, arg3, arg4, arg5, arg6, arg7); +} + +static inline NV_STATUS memmgrAllocDetermineAlignment_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *pMemSize, NvU64 *pAlign, NvU64 alignPad, NvU32 allocFlags, NvU32 retAttr, NvU32 retAttr2, NvU64 hwAlignment) { + return pMemoryManager->__memmgrAllocDetermineAlignment__(pGpu, pMemoryManager, pMemSize, pAlign, alignPad, allocFlags, retAttr, retAttr2, hwAlignment); +} + +static inline NvU64 memmgrGetMaxContextSize_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + return pMemoryManager->__memmgrGetMaxContextSize__(pGpu, pMemoryManager); +} + +static inline NvU64 memmgrGetFbTaxSize_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + return pMemoryManager->__memmgrGetFbTaxSize__(pGpu, pMemoryManager); +} + +static inline void memmgrScrubRegistryOverrides_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + pMemoryManager->__memmgrScrubRegistryOverrides__(pGpu, pMemoryManager); +} + +static inline NvU32 memmgrGetPteKindBl_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + return pMemoryManager->__memmgrGetPteKindBl__(pGpu, pMemoryManager); +} + +static inline NvU32 memmgrGetPteKindPitch_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + return pMemoryManager->__memmgrGetPteKindPitch__(pGpu, pMemoryManager); +} + +static inline NvU32 memmgrChooseKindCompressC_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg3) { + return pMemoryManager->__memmgrChooseKindCompressC__(pGpu, pMemoryManager, arg3); +} + +static inline NV_STATUS memmgrGetFlaKind_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 *arg3) { + return pMemoryManager->__memmgrGetFlaKind__(pGpu, pMemoryManager, arg3); +} + +static inline NvBool memmgrIsMemDescSupportedByFla_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc) { + return pMemoryManager->__memmgrIsMemDescSupportedByFla__(pGpu, pMemoryManager, pMemDesc); +} + +static inline NvU32 memmgrDetermineComptag_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, RmPhysAddr arg3) { + return pMemoryManager->__memmgrDetermineComptag__(pGpu, pMemoryManager, arg3); +} + +static inline NvU32 memmgrGetGrHeapReservationSize_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + return pMemoryManager->__memmgrGetGrHeapReservationSize__(pGpu, pMemoryManager); +} + +static inline NvU32 memmgrGetRunlistEntriesReservedFbSpace_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + return pMemoryManager->__memmgrGetRunlistEntriesReservedFbSpace__(pGpu, pMemoryManager); +} + +static inline NvU32 memmgrGetUserdReservedFbSpace_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + return pMemoryManager->__memmgrGetUserdReservedFbSpace__(pGpu, pMemoryManager); +} + +static inline NV_STATUS memmgrCheckReservedMemorySize_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + return pMemoryManager->__memmgrCheckReservedMemorySize__(pGpu, pMemoryManager); +} + +static inline NV_STATUS memmgrReadMmuLock_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvBool *pbIsValid, NvU64 *pMmuLockLo, NvU64 *pMmuLockHi) { + return pMemoryManager->__memmgrReadMmuLock__(pGpu, pMemoryManager, pbIsValid, pMmuLockLo, pMmuLockHi); +} + +static inline NV_STATUS memmgrBlockMemLockedMemory_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + return pMemoryManager->__memmgrBlockMemLockedMemory__(pGpu, pMemoryManager); +} + +static inline NV_STATUS memmgrInsertUnprotectedRegionAtBottomOfFb_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *pSize) { + return pMemoryManager->__memmgrInsertUnprotectedRegionAtBottomOfFb__(pGpu, pMemoryManager, pSize); +} + +static inline NV_STATUS memmgrInitBaseFbRegions_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + return pMemoryManager->__memmgrInitBaseFbRegions__(pGpu, pMemoryManager); +} + +static inline void memmgrGetDisablePlcKind_DISPATCH(struct MemoryManager *pMemoryManager, NvU32 *pteKind) { + pMemoryManager->__memmgrGetDisablePlcKind__(pMemoryManager, pteKind); +} + +static inline void memmgrEnableDynamicPageOfflining_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + pMemoryManager->__memmgrEnableDynamicPageOfflining__(pGpu, pMemoryManager); +} + +static inline NV_STATUS memmgrSetPartitionableMem_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + return pMemoryManager->__memmgrSetPartitionableMem__(pGpu, pMemoryManager); +} + +static inline NV_STATUS memmgrAllocMIGGPUInstanceMemory_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 swizzId, NvHandle *phMemory, struct NV_RANGE *pAddrRange, struct Heap **ppMemoryPartitionHeap) { + return pMemoryManager->__memmgrAllocMIGGPUInstanceMemory__(pGpu, pMemoryManager, swizzId, phMemory, pAddrRange, ppMemoryPartitionHeap); +} + +static inline NV_STATUS memmgrGetBlackListPages_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, BLACKLIST_ADDRESS *pBlAddrs, NvU32 *pCount) { + return pMemoryManager->__memmgrGetBlackListPages__(pGpu, pMemoryManager, pBlAddrs, pCount); +} + +static inline NV_STATUS memmgrDiscoverMIGPartitionableMemoryRange_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct NV_RANGE *pMemoryRange) { + return pMemoryManager->__memmgrDiscoverMIGPartitionableMemoryRange__(pGpu, pMemoryManager, pMemoryRange); +} + +static inline void memmgrInitMissing_DISPATCH(POBJGPU pGpu, struct MemoryManager *pEngstate) { + pEngstate->__memmgrInitMissing__(pGpu, pEngstate); +} + +static inline NV_STATUS memmgrStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct MemoryManager *pEngstate) { + return pEngstate->__memmgrStatePreInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS memmgrStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct MemoryManager *pEngstate) { + return pEngstate->__memmgrStateInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS memmgrStatePreLoad_DISPATCH(POBJGPU pGpu, struct MemoryManager *pEngstate, NvU32 arg3) { + return pEngstate->__memmgrStatePreLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS memmgrStatePostUnload_DISPATCH(POBJGPU pGpu, struct MemoryManager *pEngstate, NvU32 arg3) { + return pEngstate->__memmgrStatePostUnload__(pGpu, pEngstate, arg3); +} + +static inline NvBool memmgrIsPresent_DISPATCH(POBJGPU pGpu, struct MemoryManager *pEngstate) { + return pEngstate->__memmgrIsPresent__(pGpu, pEngstate); +} + NV_STATUS memmgrSavePowerMgmtState_KERNEL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); @@ -743,35 +971,35 @@ static inline NvU64 memmgrDeterminePageSize(struct MemoryManager *pMemoryManager #define memmgrDeterminePageSize_HAL(pMemoryManager, hClient, memSize, memFormat, pageFormatFlags, pRetAttr, pRetAttr2) memmgrDeterminePageSize(pMemoryManager, hClient, memSize, memFormat, pageFormatFlags, pRetAttr, pRetAttr2) -static inline NV_STATUS memmgrReserveConsoleRegion_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_REGION_DESCRIPTOR *arg0) { +static inline NV_STATUS memmgrReserveConsoleRegion_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_REGION_DESCRIPTOR *arg3) { return NV_OK; } #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrReserveConsoleRegion(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_REGION_DESCRIPTOR *arg0) { +static inline NV_STATUS memmgrReserveConsoleRegion(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_REGION_DESCRIPTOR *arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrReserveConsoleRegion(pGpu, pMemoryManager, arg0) memmgrReserveConsoleRegion_56cd7a(pGpu, pMemoryManager, arg0) +#define memmgrReserveConsoleRegion(pGpu, pMemoryManager, arg3) memmgrReserveConsoleRegion_56cd7a(pGpu, pMemoryManager, arg3) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrReserveConsoleRegion_HAL(pGpu, pMemoryManager, arg0) memmgrReserveConsoleRegion(pGpu, pMemoryManager, arg0) +#define memmgrReserveConsoleRegion_HAL(pGpu, pMemoryManager, arg3) memmgrReserveConsoleRegion(pGpu, pMemoryManager, arg3) -NV_STATUS memmgrGetKindComprForGpu_KERNEL(struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *arg0, OBJGPU *pGpu, NvU64 offset, NvU32 *kind, COMPR_INFO *pComprInfo); +NV_STATUS memmgrGetKindComprForGpu_KERNEL(struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *arg2, OBJGPU *pGpu, NvU64 offset, NvU32 *kind, COMPR_INFO *pComprInfo); #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrGetKindComprForGpu(struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *arg0, OBJGPU *pGpu, NvU64 offset, NvU32 *kind, COMPR_INFO *pComprInfo) { +static inline NV_STATUS memmgrGetKindComprForGpu(struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *arg2, OBJGPU *pGpu, NvU64 offset, NvU32 *kind, COMPR_INFO *pComprInfo) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrGetKindComprForGpu(pMemoryManager, arg0, pGpu, offset, kind, pComprInfo) memmgrGetKindComprForGpu_KERNEL(pMemoryManager, arg0, pGpu, offset, kind, pComprInfo) +#define memmgrGetKindComprForGpu(pMemoryManager, arg2, pGpu, offset, kind, pComprInfo) memmgrGetKindComprForGpu_KERNEL(pMemoryManager, arg2, pGpu, offset, kind, pComprInfo) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrGetKindComprForGpu_HAL(pMemoryManager, arg0, pGpu, offset, kind, pComprInfo) memmgrGetKindComprForGpu(pMemoryManager, arg0, pGpu, offset, kind, pComprInfo) +#define memmgrGetKindComprForGpu_HAL(pMemoryManager, arg2, pGpu, offset, kind, pComprInfo) memmgrGetKindComprForGpu(pMemoryManager, arg2, pGpu, offset, kind, pComprInfo) static inline NV_STATUS memmgrScrubInit_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { return NV_OK; @@ -803,20 +1031,20 @@ static inline NV_STATUS memmgrScrubHandlePostSchedulingEnable(OBJGPU *pGpu, stru #define memmgrScrubHandlePostSchedulingEnable_HAL(pGpu, pMemoryManager) memmgrScrubHandlePostSchedulingEnable(pGpu, pMemoryManager) -static inline void memmgrGetScrubState_f2d351(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg0, NvU64 *arg1, NvBool *arg2) { +static inline void memmgrGetScrubState_f2d351(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg3, NvU64 *arg4, NvBool *arg5) { NV_ASSERT_PRECOMP(0); } #ifdef __nvoc_mem_mgr_h_disabled -static inline void memmgrGetScrubState(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg0, NvU64 *arg1, NvBool *arg2) { +static inline void memmgrGetScrubState(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg3, NvU64 *arg4, NvBool *arg5) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); } #else //__nvoc_mem_mgr_h_disabled -#define memmgrGetScrubState(pGpu, pMemoryManager, arg0, arg1, arg2) memmgrGetScrubState_f2d351(pGpu, pMemoryManager, arg0, arg1, arg2) +#define memmgrGetScrubState(pGpu, pMemoryManager, arg3, arg4, arg5) memmgrGetScrubState_f2d351(pGpu, pMemoryManager, arg3, arg4, arg5) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrGetScrubState_HAL(pGpu, pMemoryManager, arg0, arg1, arg2) memmgrGetScrubState(pGpu, pMemoryManager, arg0, arg1, arg2) +#define memmgrGetScrubState_HAL(pGpu, pMemoryManager, arg3, arg4, arg5) memmgrGetScrubState(pGpu, pMemoryManager, arg3, arg4, arg5) static inline void memmgrScrubInternalRegions_b3696a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { return; @@ -851,20 +1079,20 @@ static inline NvBool memmgrEccScrubInProgress(OBJGPU *pGpu, struct MemoryManager #define memmgrEccScrubInProgress_HAL(pGpu, pMemoryManager) memmgrEccScrubInProgress(pGpu, pMemoryManager) -static inline void memmgrAsyncScrubRegion_f2d351(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 arg0, NvU64 arg1) { +static inline void memmgrAsyncScrubRegion_f2d351(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 arg3, NvU64 arg4) { NV_ASSERT_PRECOMP(0); } #ifdef __nvoc_mem_mgr_h_disabled -static inline void memmgrAsyncScrubRegion(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 arg0, NvU64 arg1) { +static inline void memmgrAsyncScrubRegion(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 arg3, NvU64 arg4) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); } #else //__nvoc_mem_mgr_h_disabled -#define memmgrAsyncScrubRegion(pGpu, pMemoryManager, arg0, arg1) memmgrAsyncScrubRegion_f2d351(pGpu, pMemoryManager, arg0, arg1) +#define memmgrAsyncScrubRegion(pGpu, pMemoryManager, arg3, arg4) memmgrAsyncScrubRegion_f2d351(pGpu, pMemoryManager, arg3, arg4) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrAsyncScrubRegion_HAL(pGpu, pMemoryManager, arg0, arg1) memmgrAsyncScrubRegion(pGpu, pMemoryManager, arg0, arg1) +#define memmgrAsyncScrubRegion_HAL(pGpu, pMemoryManager, arg3, arg4) memmgrAsyncScrubRegion(pGpu, pMemoryManager, arg3, arg4) NV_STATUS memmgrScrubHandlePreSchedulingDisable_GP100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); @@ -895,118 +1123,118 @@ static inline void memmgrScrubDestroy(OBJGPU *pGpu, struct MemoryManager *pMemor #define memmgrScrubDestroy_HAL(pGpu, pMemoryManager) memmgrScrubDestroy(pGpu, pMemoryManager) -static inline void memmgrScrubMemory_b3696a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, RmPhysAddr arg0, NvU64 arg1) { +static inline void memmgrScrubMemory_b3696a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, RmPhysAddr arg3, NvU64 arg4) { return; } -void memmgrScrubMemory_GP100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, RmPhysAddr arg0, NvU64 arg1); +void memmgrScrubMemory_GP100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, RmPhysAddr arg3, NvU64 arg4); #ifdef __nvoc_mem_mgr_h_disabled -static inline void memmgrScrubMemory(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, RmPhysAddr arg0, NvU64 arg1) { +static inline void memmgrScrubMemory(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, RmPhysAddr arg3, NvU64 arg4) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); } #else //__nvoc_mem_mgr_h_disabled -#define memmgrScrubMemory(pGpu, pMemoryManager, arg0, arg1) memmgrScrubMemory_b3696a(pGpu, pMemoryManager, arg0, arg1) +#define memmgrScrubMemory(pGpu, pMemoryManager, arg3, arg4) memmgrScrubMemory_b3696a(pGpu, pMemoryManager, arg3, arg4) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrScrubMemory_HAL(pGpu, pMemoryManager, arg0, arg1) memmgrScrubMemory(pGpu, pMemoryManager, arg0, arg1) +#define memmgrScrubMemory_HAL(pGpu, pMemoryManager, arg3, arg4) memmgrScrubMemory(pGpu, pMemoryManager, arg3, arg4) -static inline NV_STATUS memmgrMemUtilsMemSetBlocking_92bfc3(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0, RmPhysAddr arg1, NvU64 arg2) { +static inline NV_STATUS memmgrMemUtilsMemSetBlocking_92bfc3(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3, RmPhysAddr arg4, NvU64 arg5) { NV_ASSERT_PRECOMP(0); return NV_ERR_NOT_SUPPORTED; } #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrMemUtilsMemSetBlocking(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0, RmPhysAddr arg1, NvU64 arg2) { +static inline NV_STATUS memmgrMemUtilsMemSetBlocking(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3, RmPhysAddr arg4, NvU64 arg5) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrMemUtilsMemSetBlocking(pGpu, pMemoryManager, arg0, arg1, arg2) memmgrMemUtilsMemSetBlocking_92bfc3(pGpu, pMemoryManager, arg0, arg1, arg2) +#define memmgrMemUtilsMemSetBlocking(pGpu, pMemoryManager, arg3, arg4, arg5) memmgrMemUtilsMemSetBlocking_92bfc3(pGpu, pMemoryManager, arg3, arg4, arg5) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrMemUtilsMemSetBlocking_HAL(pGpu, pMemoryManager, arg0, arg1, arg2) memmgrMemUtilsMemSetBlocking(pGpu, pMemoryManager, arg0, arg1, arg2) +#define memmgrMemUtilsMemSetBlocking_HAL(pGpu, pMemoryManager, arg3, arg4, arg5) memmgrMemUtilsMemSetBlocking(pGpu, pMemoryManager, arg3, arg4, arg5) -static inline NV_STATUS memmgrMemUtilsMemSet_92bfc3(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0, RmPhysAddr arg1, NvU64 arg2, NvU32 arg3, NvU32 *arg4) { +static inline NV_STATUS memmgrMemUtilsMemSet_92bfc3(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3, RmPhysAddr arg4, NvU64 arg5, NvU32 arg6, NvU32 *arg7) { NV_ASSERT_PRECOMP(0); return NV_ERR_NOT_SUPPORTED; } #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrMemUtilsMemSet(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0, RmPhysAddr arg1, NvU64 arg2, NvU32 arg3, NvU32 *arg4) { +static inline NV_STATUS memmgrMemUtilsMemSet(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3, RmPhysAddr arg4, NvU64 arg5, NvU32 arg6, NvU32 *arg7) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrMemUtilsMemSet(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4) memmgrMemUtilsMemSet_92bfc3(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4) +#define memmgrMemUtilsMemSet(pGpu, pMemoryManager, arg3, arg4, arg5, arg6, arg7) memmgrMemUtilsMemSet_92bfc3(pGpu, pMemoryManager, arg3, arg4, arg5, arg6, arg7) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrMemUtilsMemSet_HAL(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4) memmgrMemUtilsMemSet(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4) +#define memmgrMemUtilsMemSet_HAL(pGpu, pMemoryManager, arg3, arg4, arg5, arg6, arg7) memmgrMemUtilsMemSet(pGpu, pMemoryManager, arg3, arg4, arg5, arg6, arg7) -static inline NV_STATUS memmgrMemUtilsAllocateEccScrubber_92bfc3(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) { +static inline NV_STATUS memmgrMemUtilsAllocateEccScrubber_92bfc3(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3) { NV_ASSERT_PRECOMP(0); return NV_ERR_NOT_SUPPORTED; } #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrMemUtilsAllocateEccScrubber(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) { +static inline NV_STATUS memmgrMemUtilsAllocateEccScrubber(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrMemUtilsAllocateEccScrubber(pGpu, pMemoryManager, arg0) memmgrMemUtilsAllocateEccScrubber_92bfc3(pGpu, pMemoryManager, arg0) +#define memmgrMemUtilsAllocateEccScrubber(pGpu, pMemoryManager, arg3) memmgrMemUtilsAllocateEccScrubber_92bfc3(pGpu, pMemoryManager, arg3) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrMemUtilsAllocateEccScrubber_HAL(pGpu, pMemoryManager, arg0) memmgrMemUtilsAllocateEccScrubber(pGpu, pMemoryManager, arg0) +#define memmgrMemUtilsAllocateEccScrubber_HAL(pGpu, pMemoryManager, arg3) memmgrMemUtilsAllocateEccScrubber(pGpu, pMemoryManager, arg3) -static inline NV_STATUS memmgrMemUtilsAllocateEccAllocScrubber_92bfc3(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) { +static inline NV_STATUS memmgrMemUtilsAllocateEccAllocScrubber_92bfc3(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3) { NV_ASSERT_PRECOMP(0); return NV_ERR_NOT_SUPPORTED; } #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrMemUtilsAllocateEccAllocScrubber(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) { +static inline NV_STATUS memmgrMemUtilsAllocateEccAllocScrubber(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrMemUtilsAllocateEccAllocScrubber(pGpu, pMemoryManager, arg0) memmgrMemUtilsAllocateEccAllocScrubber_92bfc3(pGpu, pMemoryManager, arg0) +#define memmgrMemUtilsAllocateEccAllocScrubber(pGpu, pMemoryManager, arg3) memmgrMemUtilsAllocateEccAllocScrubber_92bfc3(pGpu, pMemoryManager, arg3) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrMemUtilsAllocateEccAllocScrubber_HAL(pGpu, pMemoryManager, arg0) memmgrMemUtilsAllocateEccAllocScrubber(pGpu, pMemoryManager, arg0) +#define memmgrMemUtilsAllocateEccAllocScrubber_HAL(pGpu, pMemoryManager, arg3) memmgrMemUtilsAllocateEccAllocScrubber(pGpu, pMemoryManager, arg3) -NV_STATUS memmgrMemUtilsChannelInitialize_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0); +NV_STATUS memmgrMemUtilsChannelInitialize_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3); #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrMemUtilsChannelInitialize(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) { +static inline NV_STATUS memmgrMemUtilsChannelInitialize(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrMemUtilsChannelInitialize(pGpu, pMemoryManager, arg0) memmgrMemUtilsChannelInitialize_GM107(pGpu, pMemoryManager, arg0) +#define memmgrMemUtilsChannelInitialize(pGpu, pMemoryManager, arg3) memmgrMemUtilsChannelInitialize_GM107(pGpu, pMemoryManager, arg3) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrMemUtilsChannelInitialize_HAL(pGpu, pMemoryManager, arg0) memmgrMemUtilsChannelInitialize(pGpu, pMemoryManager, arg0) +#define memmgrMemUtilsChannelInitialize_HAL(pGpu, pMemoryManager, arg3) memmgrMemUtilsChannelInitialize(pGpu, pMemoryManager, arg3) -NV_STATUS memmgrMemUtilsCopyEngineInitialize_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0); +NV_STATUS memmgrMemUtilsCopyEngineInitialize_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3); #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrMemUtilsCopyEngineInitialize(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) { +static inline NV_STATUS memmgrMemUtilsCopyEngineInitialize(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrMemUtilsCopyEngineInitialize(pGpu, pMemoryManager, arg0) memmgrMemUtilsCopyEngineInitialize_GM107(pGpu, pMemoryManager, arg0) +#define memmgrMemUtilsCopyEngineInitialize(pGpu, pMemoryManager, arg3) memmgrMemUtilsCopyEngineInitialize_GM107(pGpu, pMemoryManager, arg3) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrMemUtilsCopyEngineInitialize_HAL(pGpu, pMemoryManager, arg0) memmgrMemUtilsCopyEngineInitialize(pGpu, pMemoryManager, arg0) +#define memmgrMemUtilsCopyEngineInitialize_HAL(pGpu, pMemoryManager, arg3) memmgrMemUtilsCopyEngineInitialize(pGpu, pMemoryManager, arg3) NV_STATUS memmgrMemUtilsGetCopyEngineClass_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 *pClass); @@ -1022,19 +1250,19 @@ static inline NV_STATUS memmgrMemUtilsGetCopyEngineClass(OBJGPU *pGpu, struct Me #define memmgrMemUtilsGetCopyEngineClass_HAL(pGpu, pMemoryManager, pClass) memmgrMemUtilsGetCopyEngineClass(pGpu, pMemoryManager, pClass) -NV_STATUS memmgrMemUtilsCreateMemoryAlias_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0); +NV_STATUS memmgrMemUtilsCreateMemoryAlias_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3); #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrMemUtilsCreateMemoryAlias(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) { +static inline NV_STATUS memmgrMemUtilsCreateMemoryAlias(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrMemUtilsCreateMemoryAlias(pGpu, pMemoryManager, arg0) memmgrMemUtilsCreateMemoryAlias_GM107(pGpu, pMemoryManager, arg0) +#define memmgrMemUtilsCreateMemoryAlias(pGpu, pMemoryManager, arg3) memmgrMemUtilsCreateMemoryAlias_GM107(pGpu, pMemoryManager, arg3) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrMemUtilsCreateMemoryAlias_HAL(pGpu, pMemoryManager, arg0) memmgrMemUtilsCreateMemoryAlias(pGpu, pMemoryManager, arg0) +#define memmgrMemUtilsCreateMemoryAlias_HAL(pGpu, pMemoryManager, arg3) memmgrMemUtilsCreateMemoryAlias(pGpu, pMemoryManager, arg3) NV_STATUS memmgrAllocHal_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *pFbAllocInfo); @@ -1064,21 +1292,21 @@ static inline NV_STATUS memmgrFreeHal(OBJGPU *pGpu, struct MemoryManager *pMemor #define memmgrFreeHal_HAL(pGpu, pMemoryManager, pFbAllocInfo, pTimeout) memmgrFreeHal(pGpu, pMemoryManager, pFbAllocInfo, pTimeout) -static inline NV_STATUS memmgrUpdateSurfaceCompression_5baef9(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, Memory *arg0, NvBool arg1) { +static inline NV_STATUS memmgrUpdateSurfaceCompression_5baef9(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, Memory *arg3, NvBool arg4) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrUpdateSurfaceCompression(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, Memory *arg0, NvBool arg1) { +static inline NV_STATUS memmgrUpdateSurfaceCompression(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, Memory *arg3, NvBool arg4) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrUpdateSurfaceCompression(pGpu, pMemoryManager, arg0, arg1) memmgrUpdateSurfaceCompression_5baef9(pGpu, pMemoryManager, arg0, arg1) +#define memmgrUpdateSurfaceCompression(pGpu, pMemoryManager, arg3, arg4) memmgrUpdateSurfaceCompression_5baef9(pGpu, pMemoryManager, arg3, arg4) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrUpdateSurfaceCompression_HAL(pGpu, pMemoryManager, arg0, arg1) memmgrUpdateSurfaceCompression(pGpu, pMemoryManager, arg0, arg1) +#define memmgrUpdateSurfaceCompression_HAL(pGpu, pMemoryManager, arg3, arg4) memmgrUpdateSurfaceCompression(pGpu, pMemoryManager, arg3, arg4) NV_STATUS memmgrGetBankPlacementData_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 *pBankPlacementLowData); @@ -1212,57 +1440,57 @@ static inline NvU64 memmgrGetRsvdSizeForSr(OBJGPU *pGpu, struct MemoryManager *p #define memmgrGetRsvdSizeForSr_HAL(pGpu, pMemoryManager) memmgrGetRsvdSizeForSr(pGpu, pMemoryManager) -static inline NvBool memmgrVerifyDepthSurfaceAttrs_cbe027(struct MemoryManager *pMemoryManager, NvU32 arg0, NvU32 arg1) { +static inline NvBool memmgrVerifyDepthSurfaceAttrs_cbe027(struct MemoryManager *pMemoryManager, NvU32 arg2, NvU32 arg3) { return ((NvBool)(0 == 0)); } #ifdef __nvoc_mem_mgr_h_disabled -static inline NvBool memmgrVerifyDepthSurfaceAttrs(struct MemoryManager *pMemoryManager, NvU32 arg0, NvU32 arg1) { +static inline NvBool memmgrVerifyDepthSurfaceAttrs(struct MemoryManager *pMemoryManager, NvU32 arg2, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_FALSE; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrVerifyDepthSurfaceAttrs(pMemoryManager, arg0, arg1) memmgrVerifyDepthSurfaceAttrs_cbe027(pMemoryManager, arg0, arg1) +#define memmgrVerifyDepthSurfaceAttrs(pMemoryManager, arg2, arg3) memmgrVerifyDepthSurfaceAttrs_cbe027(pMemoryManager, arg2, arg3) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrVerifyDepthSurfaceAttrs_HAL(pMemoryManager, arg0, arg1) memmgrVerifyDepthSurfaceAttrs(pMemoryManager, arg0, arg1) +#define memmgrVerifyDepthSurfaceAttrs_HAL(pMemoryManager, arg2, arg3) memmgrVerifyDepthSurfaceAttrs(pMemoryManager, arg2, arg3) -NV_STATUS memmgrAllocMemToSaveVgaWorkspace_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR **arg0, MEMORY_DESCRIPTOR **arg1); +NV_STATUS memmgrAllocMemToSaveVgaWorkspace_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR **arg3, MEMORY_DESCRIPTOR **arg4); -static inline NV_STATUS memmgrAllocMemToSaveVgaWorkspace_46f6a7(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR **arg0, MEMORY_DESCRIPTOR **arg1) { +static inline NV_STATUS memmgrAllocMemToSaveVgaWorkspace_46f6a7(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR **arg3, MEMORY_DESCRIPTOR **arg4) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS memmgrAllocMemToSaveVgaWorkspace_5baef9(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR **arg0, MEMORY_DESCRIPTOR **arg1) { +static inline NV_STATUS memmgrAllocMemToSaveVgaWorkspace_5baef9(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR **arg3, MEMORY_DESCRIPTOR **arg4) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrAllocMemToSaveVgaWorkspace(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR **arg0, MEMORY_DESCRIPTOR **arg1) { +static inline NV_STATUS memmgrAllocMemToSaveVgaWorkspace(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR **arg3, MEMORY_DESCRIPTOR **arg4) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrAllocMemToSaveVgaWorkspace(pGpu, pMemoryManager, arg0, arg1) memmgrAllocMemToSaveVgaWorkspace_5baef9(pGpu, pMemoryManager, arg0, arg1) +#define memmgrAllocMemToSaveVgaWorkspace(pGpu, pMemoryManager, arg3, arg4) memmgrAllocMemToSaveVgaWorkspace_5baef9(pGpu, pMemoryManager, arg3, arg4) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrAllocMemToSaveVgaWorkspace_HAL(pGpu, pMemoryManager, arg0, arg1) memmgrAllocMemToSaveVgaWorkspace(pGpu, pMemoryManager, arg0, arg1) +#define memmgrAllocMemToSaveVgaWorkspace_HAL(pGpu, pMemoryManager, arg3, arg4) memmgrAllocMemToSaveVgaWorkspace(pGpu, pMemoryManager, arg3, arg4) -NvBool memmgrComparePhysicalAddresses_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0, NvU64 arg1, NvU32 arg2, NvU64 arg3); +NvBool memmgrComparePhysicalAddresses_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3, NvU64 arg4, NvU32 arg5, NvU64 arg6); #ifdef __nvoc_mem_mgr_h_disabled -static inline NvBool memmgrComparePhysicalAddresses(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0, NvU64 arg1, NvU32 arg2, NvU64 arg3) { +static inline NvBool memmgrComparePhysicalAddresses(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3, NvU64 arg4, NvU32 arg5, NvU64 arg6) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_FALSE; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrComparePhysicalAddresses(pGpu, pMemoryManager, arg0, arg1, arg2, arg3) memmgrComparePhysicalAddresses_GM107(pGpu, pMemoryManager, arg0, arg1, arg2, arg3) +#define memmgrComparePhysicalAddresses(pGpu, pMemoryManager, arg3, arg4, arg5, arg6) memmgrComparePhysicalAddresses_GM107(pGpu, pMemoryManager, arg3, arg4, arg5, arg6) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrComparePhysicalAddresses_HAL(pGpu, pMemoryManager, arg0, arg1, arg2, arg3) memmgrComparePhysicalAddresses(pGpu, pMemoryManager, arg0, arg1, arg2, arg3) +#define memmgrComparePhysicalAddresses_HAL(pGpu, pMemoryManager, arg3, arg4, arg5, arg6) memmgrComparePhysicalAddresses(pGpu, pMemoryManager, arg3, arg4, arg5, arg6) RmPhysAddr memmgrGetInvalidOffset_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); @@ -1322,95 +1550,95 @@ static inline NV_STATUS memmgrGetSurfacePhysAttr(OBJGPU *pGpu, struct MemoryMana #define memmgrGetSurfacePhysAttr_HAL(pGpu, pMemoryManager, pMemory, pOffset, pMemAperture, pMemKind, pComprOffset, pComprKind, pLineMin, pLineMax, pZCullId, pGpuCacheAttr, pGpuP2PCacheAttr, contigSegmentSize) memmgrGetSurfacePhysAttr(pGpu, pMemoryManager, pMemory, pOffset, pMemAperture, pMemKind, pComprOffset, pComprKind, pLineMin, pLineMax, pZCullId, pGpuCacheAttr, pGpuP2PCacheAttr, contigSegmentSize) -static inline NvBool memmgrVerifyComprAttrs_cbe027(struct MemoryManager *pMemoryManager, NvU32 arg0, NvU32 arg1, NvU32 arg2) { +static inline NvBool memmgrVerifyComprAttrs_cbe027(struct MemoryManager *pMemoryManager, NvU32 arg2, NvU32 arg3, NvU32 arg4) { return ((NvBool)(0 == 0)); } #ifdef __nvoc_mem_mgr_h_disabled -static inline NvBool memmgrVerifyComprAttrs(struct MemoryManager *pMemoryManager, NvU32 arg0, NvU32 arg1, NvU32 arg2) { +static inline NvBool memmgrVerifyComprAttrs(struct MemoryManager *pMemoryManager, NvU32 arg2, NvU32 arg3, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_FALSE; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrVerifyComprAttrs(pMemoryManager, arg0, arg1, arg2) memmgrVerifyComprAttrs_cbe027(pMemoryManager, arg0, arg1, arg2) +#define memmgrVerifyComprAttrs(pMemoryManager, arg2, arg3, arg4) memmgrVerifyComprAttrs_cbe027(pMemoryManager, arg2, arg3, arg4) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrVerifyComprAttrs_HAL(pMemoryManager, arg0, arg1, arg2) memmgrVerifyComprAttrs(pMemoryManager, arg0, arg1, arg2) +#define memmgrVerifyComprAttrs_HAL(pMemoryManager, arg2, arg3, arg4) memmgrVerifyComprAttrs(pMemoryManager, arg2, arg3, arg4) -NvBool memmgrIsKindCompressible_TU102(struct MemoryManager *pMemoryManager, NvU32 arg0); +NvBool memmgrIsKindCompressible_TU102(struct MemoryManager *pMemoryManager, NvU32 arg2); #ifdef __nvoc_mem_mgr_h_disabled -static inline NvBool memmgrIsKindCompressible(struct MemoryManager *pMemoryManager, NvU32 arg0) { +static inline NvBool memmgrIsKindCompressible(struct MemoryManager *pMemoryManager, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_FALSE; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrIsKindCompressible(pMemoryManager, arg0) memmgrIsKindCompressible_TU102(pMemoryManager, arg0) +#define memmgrIsKindCompressible(pMemoryManager, arg2) memmgrIsKindCompressible_TU102(pMemoryManager, arg2) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrIsKindCompressible_HAL(pMemoryManager, arg0) memmgrIsKindCompressible(pMemoryManager, arg0) +#define memmgrIsKindCompressible_HAL(pMemoryManager, arg2) memmgrIsKindCompressible(pMemoryManager, arg2) -static inline NvBool memmgrIsKindBlocklinear_491d52(struct MemoryManager *pMemoryManager, NvU32 arg0) { +static inline NvBool memmgrIsKindBlocklinear_491d52(struct MemoryManager *pMemoryManager, NvU32 arg2) { return ((NvBool)(0 != 0)); } #ifdef __nvoc_mem_mgr_h_disabled -static inline NvBool memmgrIsKindBlocklinear(struct MemoryManager *pMemoryManager, NvU32 arg0) { +static inline NvBool memmgrIsKindBlocklinear(struct MemoryManager *pMemoryManager, NvU32 arg2) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_FALSE; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrIsKindBlocklinear(pMemoryManager, arg0) memmgrIsKindBlocklinear_491d52(pMemoryManager, arg0) +#define memmgrIsKindBlocklinear(pMemoryManager, arg2) memmgrIsKindBlocklinear_491d52(pMemoryManager, arg2) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrIsKindBlocklinear_HAL(pMemoryManager, arg0) memmgrIsKindBlocklinear(pMemoryManager, arg0) +#define memmgrIsKindBlocklinear_HAL(pMemoryManager, arg2) memmgrIsKindBlocklinear(pMemoryManager, arg2) -NvU32 memmgrChooseKindZ_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg0); +NvU32 memmgrChooseKindZ_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg3); #ifdef __nvoc_mem_mgr_h_disabled -static inline NvU32 memmgrChooseKindZ(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg0) { +static inline NvU32 memmgrChooseKindZ(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return 0; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrChooseKindZ(pGpu, pMemoryManager, arg0) memmgrChooseKindZ_TU102(pGpu, pMemoryManager, arg0) +#define memmgrChooseKindZ(pGpu, pMemoryManager, arg3) memmgrChooseKindZ_TU102(pGpu, pMemoryManager, arg3) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrChooseKindZ_HAL(pGpu, pMemoryManager, arg0) memmgrChooseKindZ(pGpu, pMemoryManager, arg0) +#define memmgrChooseKindZ_HAL(pGpu, pMemoryManager, arg3) memmgrChooseKindZ(pGpu, pMemoryManager, arg3) -NvU32 memmgrChooseKindCompressZ_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg0); +NvU32 memmgrChooseKindCompressZ_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg3); #ifdef __nvoc_mem_mgr_h_disabled -static inline NvU32 memmgrChooseKindCompressZ(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg0) { +static inline NvU32 memmgrChooseKindCompressZ(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return 0; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrChooseKindCompressZ(pGpu, pMemoryManager, arg0) memmgrChooseKindCompressZ_TU102(pGpu, pMemoryManager, arg0) +#define memmgrChooseKindCompressZ(pGpu, pMemoryManager, arg3) memmgrChooseKindCompressZ_TU102(pGpu, pMemoryManager, arg3) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrChooseKindCompressZ_HAL(pGpu, pMemoryManager, arg0) memmgrChooseKindCompressZ(pGpu, pMemoryManager, arg0) +#define memmgrChooseKindCompressZ_HAL(pGpu, pMemoryManager, arg3) memmgrChooseKindCompressZ(pGpu, pMemoryManager, arg3) -static inline NvU32 memmgrChooseKindCompressCForMS2_4a4dee(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0) { +static inline NvU32 memmgrChooseKindCompressCForMS2_4a4dee(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3) { return 0; } #ifdef __nvoc_mem_mgr_h_disabled -static inline NvU32 memmgrChooseKindCompressCForMS2(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0) { +static inline NvU32 memmgrChooseKindCompressCForMS2(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return 0; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrChooseKindCompressCForMS2(pGpu, pMemoryManager, arg0) memmgrChooseKindCompressCForMS2_4a4dee(pGpu, pMemoryManager, arg0) +#define memmgrChooseKindCompressCForMS2(pGpu, pMemoryManager, arg3) memmgrChooseKindCompressCForMS2_4a4dee(pGpu, pMemoryManager, arg3) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrChooseKindCompressCForMS2_HAL(pGpu, pMemoryManager, arg0) memmgrChooseKindCompressCForMS2(pGpu, pMemoryManager, arg0) +#define memmgrChooseKindCompressCForMS2_HAL(pGpu, pMemoryManager, arg3) memmgrChooseKindCompressCForMS2(pGpu, pMemoryManager, arg3) NvU32 memmgrGetUncompressedKind_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 kind, NvBool releaseReacquire); @@ -1426,49 +1654,49 @@ static inline NvU32 memmgrGetUncompressedKind(OBJGPU *pGpu, struct MemoryManager #define memmgrGetUncompressedKind_HAL(pGpu, pMemoryManager, kind, releaseReacquire) memmgrGetUncompressedKind(pGpu, pMemoryManager, kind, releaseReacquire) -static inline NV_STATUS memmgrGetUncompressedKindForMS2_5baef9(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0, NvU32 *arg1) { +static inline NV_STATUS memmgrGetUncompressedKindForMS2_5baef9(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3, NvU32 *arg4) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrGetUncompressedKindForMS2(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0, NvU32 *arg1) { +static inline NV_STATUS memmgrGetUncompressedKindForMS2(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3, NvU32 *arg4) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrGetUncompressedKindForMS2(pGpu, pMemoryManager, arg0, arg1) memmgrGetUncompressedKindForMS2_5baef9(pGpu, pMemoryManager, arg0, arg1) +#define memmgrGetUncompressedKindForMS2(pGpu, pMemoryManager, arg3, arg4) memmgrGetUncompressedKindForMS2_5baef9(pGpu, pMemoryManager, arg3, arg4) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrGetUncompressedKindForMS2_HAL(pGpu, pMemoryManager, arg0, arg1) memmgrGetUncompressedKindForMS2(pGpu, pMemoryManager, arg0, arg1) +#define memmgrGetUncompressedKindForMS2_HAL(pGpu, pMemoryManager, arg3, arg4) memmgrGetUncompressedKindForMS2(pGpu, pMemoryManager, arg3, arg4) -NV_STATUS memmgrChooseKind_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg0, NvU32 arg1, NvU32 *arg2); +NV_STATUS memmgrChooseKind_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg3, NvU32 arg4, NvU32 *arg5); #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrChooseKind(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg0, NvU32 arg1, NvU32 *arg2) { +static inline NV_STATUS memmgrChooseKind(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg3, NvU32 arg4, NvU32 *arg5) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrChooseKind(pGpu, pMemoryManager, arg0, arg1, arg2) memmgrChooseKind_TU102(pGpu, pMemoryManager, arg0, arg1, arg2) +#define memmgrChooseKind(pGpu, pMemoryManager, arg3, arg4, arg5) memmgrChooseKind_TU102(pGpu, pMemoryManager, arg3, arg4, arg5) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrChooseKind_HAL(pGpu, pMemoryManager, arg0, arg1, arg2) memmgrChooseKind(pGpu, pMemoryManager, arg0, arg1, arg2) +#define memmgrChooseKind_HAL(pGpu, pMemoryManager, arg3, arg4, arg5) memmgrChooseKind(pGpu, pMemoryManager, arg3, arg4, arg5) -NvBool memmgrIsKind_TU102(struct MemoryManager *pMemoryManager, FB_IS_KIND_OP arg0, NvU32 arg1); +NvBool memmgrIsKind_TU102(struct MemoryManager *pMemoryManager, FB_IS_KIND_OP arg2, NvU32 arg3); #ifdef __nvoc_mem_mgr_h_disabled -static inline NvBool memmgrIsKind(struct MemoryManager *pMemoryManager, FB_IS_KIND_OP arg0, NvU32 arg1) { +static inline NvBool memmgrIsKind(struct MemoryManager *pMemoryManager, FB_IS_KIND_OP arg2, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_FALSE; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrIsKind(pMemoryManager, arg0, arg1) memmgrIsKind_TU102(pMemoryManager, arg0, arg1) +#define memmgrIsKind(pMemoryManager, arg2, arg3) memmgrIsKind_TU102(pMemoryManager, arg2, arg3) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrIsKind_HAL(pMemoryManager, arg0, arg1) memmgrIsKind(pMemoryManager, arg0, arg1) +#define memmgrIsKind_HAL(pMemoryManager, arg2, arg3) memmgrIsKind(pMemoryManager, arg2, arg3) NvU32 memmgrGetMessageKind_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); @@ -1498,19 +1726,19 @@ static inline NvU32 memmgrGetDefaultPteKindForNoHandle(OBJGPU *pGpu, struct Memo #define memmgrGetDefaultPteKindForNoHandle_HAL(pGpu, pMemoryManager) memmgrGetDefaultPteKindForNoHandle(pGpu, pMemoryManager) -NvBool memmgrIsSurfaceBlockLinear_TU102(struct MemoryManager *pMemoryManager, Memory *arg0, NvU32 arg1, NvU32 arg2); +NvBool memmgrIsSurfaceBlockLinear_TU102(struct MemoryManager *pMemoryManager, Memory *arg2, NvU32 arg3, NvU32 arg4); #ifdef __nvoc_mem_mgr_h_disabled -static inline NvBool memmgrIsSurfaceBlockLinear(struct MemoryManager *pMemoryManager, Memory *arg0, NvU32 arg1, NvU32 arg2) { +static inline NvBool memmgrIsSurfaceBlockLinear(struct MemoryManager *pMemoryManager, Memory *arg2, NvU32 arg3, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_FALSE; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrIsSurfaceBlockLinear(pMemoryManager, arg0, arg1, arg2) memmgrIsSurfaceBlockLinear_TU102(pMemoryManager, arg0, arg1, arg2) +#define memmgrIsSurfaceBlockLinear(pMemoryManager, arg2, arg3, arg4) memmgrIsSurfaceBlockLinear_TU102(pMemoryManager, arg2, arg3, arg4) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrIsSurfaceBlockLinear_HAL(pMemoryManager, arg0, arg1, arg2) memmgrIsSurfaceBlockLinear(pMemoryManager, arg0, arg1, arg2) +#define memmgrIsSurfaceBlockLinear_HAL(pMemoryManager, arg2, arg3, arg4) memmgrIsSurfaceBlockLinear(pMemoryManager, arg2, arg3, arg4) NvU32 memmgrGetHwPteKindFromSwPteKind_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 pteKind); @@ -1540,89 +1768,89 @@ static inline NvU32 memmgrGetSwPteKindFromHwPteKind(OBJGPU *pGpu, struct MemoryM #define memmgrGetSwPteKindFromHwPteKind_HAL(pGpu, pMemoryManager, pteKind) memmgrGetSwPteKindFromHwPteKind(pGpu, pMemoryManager, pteKind) -void memmgrGetPteKindForScrubber_TU102(struct MemoryManager *pMemoryManager, NvU32 *arg0); +void memmgrGetPteKindForScrubber_TU102(struct MemoryManager *pMemoryManager, NvU32 *arg2); #ifdef __nvoc_mem_mgr_h_disabled -static inline void memmgrGetPteKindForScrubber(struct MemoryManager *pMemoryManager, NvU32 *arg0) { +static inline void memmgrGetPteKindForScrubber(struct MemoryManager *pMemoryManager, NvU32 *arg2) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); } #else //__nvoc_mem_mgr_h_disabled -#define memmgrGetPteKindForScrubber(pMemoryManager, arg0) memmgrGetPteKindForScrubber_TU102(pMemoryManager, arg0) +#define memmgrGetPteKindForScrubber(pMemoryManager, arg2) memmgrGetPteKindForScrubber_TU102(pMemoryManager, arg2) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrGetPteKindForScrubber_HAL(pMemoryManager, arg0) memmgrGetPteKindForScrubber(pMemoryManager, arg0) +#define memmgrGetPteKindForScrubber_HAL(pMemoryManager, arg2) memmgrGetPteKindForScrubber(pMemoryManager, arg2) -NvU32 memmgrGetCtagOffsetFromParams_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg0); +NvU32 memmgrGetCtagOffsetFromParams_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg3); #ifdef __nvoc_mem_mgr_h_disabled -static inline NvU32 memmgrGetCtagOffsetFromParams(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg0) { +static inline NvU32 memmgrGetCtagOffsetFromParams(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return 0; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrGetCtagOffsetFromParams(pGpu, pMemoryManager, arg0) memmgrGetCtagOffsetFromParams_TU102(pGpu, pMemoryManager, arg0) +#define memmgrGetCtagOffsetFromParams(pGpu, pMemoryManager, arg3) memmgrGetCtagOffsetFromParams_TU102(pGpu, pMemoryManager, arg3) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrGetCtagOffsetFromParams_HAL(pGpu, pMemoryManager, arg0) memmgrGetCtagOffsetFromParams(pGpu, pMemoryManager, arg0) +#define memmgrGetCtagOffsetFromParams_HAL(pGpu, pMemoryManager, arg3) memmgrGetCtagOffsetFromParams(pGpu, pMemoryManager, arg3) -void memmgrSetCtagOffsetInParams_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg0, NvU32 arg1); +void memmgrSetCtagOffsetInParams_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg3, NvU32 arg4); #ifdef __nvoc_mem_mgr_h_disabled -static inline void memmgrSetCtagOffsetInParams(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg0, NvU32 arg1) { +static inline void memmgrSetCtagOffsetInParams(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg3, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); } #else //__nvoc_mem_mgr_h_disabled -#define memmgrSetCtagOffsetInParams(pGpu, pMemoryManager, arg0, arg1) memmgrSetCtagOffsetInParams_TU102(pGpu, pMemoryManager, arg0, arg1) +#define memmgrSetCtagOffsetInParams(pGpu, pMemoryManager, arg3, arg4) memmgrSetCtagOffsetInParams_TU102(pGpu, pMemoryManager, arg3, arg4) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrSetCtagOffsetInParams_HAL(pGpu, pMemoryManager, arg0, arg1) memmgrSetCtagOffsetInParams(pGpu, pMemoryManager, arg0, arg1) +#define memmgrSetCtagOffsetInParams_HAL(pGpu, pMemoryManager, arg3, arg4) memmgrSetCtagOffsetInParams(pGpu, pMemoryManager, arg3, arg4) -static inline void memmgrChannelPushSemaphoreMethodsBlock_f2d351(struct MemoryManager *pMemoryManager, NvU32 arg0, NvU64 arg1, NvU32 arg2, NvU32 **arg3) { +static inline void memmgrChannelPushSemaphoreMethodsBlock_f2d351(struct MemoryManager *pMemoryManager, NvU32 arg2, NvU64 arg3, NvU32 arg4, NvU32 **arg5) { NV_ASSERT_PRECOMP(0); } #ifdef __nvoc_mem_mgr_h_disabled -static inline void memmgrChannelPushSemaphoreMethodsBlock(struct MemoryManager *pMemoryManager, NvU32 arg0, NvU64 arg1, NvU32 arg2, NvU32 **arg3) { +static inline void memmgrChannelPushSemaphoreMethodsBlock(struct MemoryManager *pMemoryManager, NvU32 arg2, NvU64 arg3, NvU32 arg4, NvU32 **arg5) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); } #else //__nvoc_mem_mgr_h_disabled -#define memmgrChannelPushSemaphoreMethodsBlock(pMemoryManager, arg0, arg1, arg2, arg3) memmgrChannelPushSemaphoreMethodsBlock_f2d351(pMemoryManager, arg0, arg1, arg2, arg3) +#define memmgrChannelPushSemaphoreMethodsBlock(pMemoryManager, arg2, arg3, arg4, arg5) memmgrChannelPushSemaphoreMethodsBlock_f2d351(pMemoryManager, arg2, arg3, arg4, arg5) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrChannelPushSemaphoreMethodsBlock_HAL(pMemoryManager, arg0, arg1, arg2, arg3) memmgrChannelPushSemaphoreMethodsBlock(pMemoryManager, arg0, arg1, arg2, arg3) +#define memmgrChannelPushSemaphoreMethodsBlock_HAL(pMemoryManager, arg2, arg3, arg4, arg5) memmgrChannelPushSemaphoreMethodsBlock(pMemoryManager, arg2, arg3, arg4, arg5) -static inline void memmgrChannelPushAddressMethodsBlock_f2d351(struct MemoryManager *pMemoryManager, NvBool arg0, NvU32 arg1, RmPhysAddr arg2, NvU32 **arg3) { +static inline void memmgrChannelPushAddressMethodsBlock_f2d351(struct MemoryManager *pMemoryManager, NvBool arg2, NvU32 arg3, RmPhysAddr arg4, NvU32 **arg5) { NV_ASSERT_PRECOMP(0); } #ifdef __nvoc_mem_mgr_h_disabled -static inline void memmgrChannelPushAddressMethodsBlock(struct MemoryManager *pMemoryManager, NvBool arg0, NvU32 arg1, RmPhysAddr arg2, NvU32 **arg3) { +static inline void memmgrChannelPushAddressMethodsBlock(struct MemoryManager *pMemoryManager, NvBool arg2, NvU32 arg3, RmPhysAddr arg4, NvU32 **arg5) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); } #else //__nvoc_mem_mgr_h_disabled -#define memmgrChannelPushAddressMethodsBlock(pMemoryManager, arg0, arg1, arg2, arg3) memmgrChannelPushAddressMethodsBlock_f2d351(pMemoryManager, arg0, arg1, arg2, arg3) +#define memmgrChannelPushAddressMethodsBlock(pMemoryManager, arg2, arg3, arg4, arg5) memmgrChannelPushAddressMethodsBlock_f2d351(pMemoryManager, arg2, arg3, arg4, arg5) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrChannelPushAddressMethodsBlock_HAL(pMemoryManager, arg0, arg1, arg2, arg3) memmgrChannelPushAddressMethodsBlock(pMemoryManager, arg0, arg1, arg2, arg3) +#define memmgrChannelPushAddressMethodsBlock_HAL(pMemoryManager, arg2, arg3, arg4, arg5) memmgrChannelPushAddressMethodsBlock(pMemoryManager, arg2, arg3, arg4, arg5) -NV_STATUS memmgrScrubMapDoorbellRegion_GV100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0); +NV_STATUS memmgrScrubMapDoorbellRegion_GV100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3); #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrScrubMapDoorbellRegion(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) { +static inline NV_STATUS memmgrScrubMapDoorbellRegion(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrScrubMapDoorbellRegion(pGpu, pMemoryManager, arg0) memmgrScrubMapDoorbellRegion_GV100(pGpu, pMemoryManager, arg0) +#define memmgrScrubMapDoorbellRegion(pGpu, pMemoryManager, arg3) memmgrScrubMapDoorbellRegion_GV100(pGpu, pMemoryManager, arg3) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrScrubMapDoorbellRegion_HAL(pGpu, pMemoryManager, arg0) memmgrScrubMapDoorbellRegion(pGpu, pMemoryManager, arg0) +#define memmgrScrubMapDoorbellRegion_HAL(pGpu, pMemoryManager, arg3) memmgrScrubMapDoorbellRegion(pGpu, pMemoryManager, arg3) NV_STATUS memmgrSetAllocParameters_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *pFbAllocInfo); @@ -1638,45 +1866,45 @@ static inline NV_STATUS memmgrSetAllocParameters(OBJGPU *pGpu, struct MemoryMana #define memmgrSetAllocParameters_HAL(pGpu, pMemoryManager, pFbAllocInfo) memmgrSetAllocParameters(pGpu, pMemoryManager, pFbAllocInfo) -void memmgrCalcReservedFbSpaceForUVM_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg0); +void memmgrCalcReservedFbSpaceForUVM_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg3); #ifdef __nvoc_mem_mgr_h_disabled -static inline void memmgrCalcReservedFbSpaceForUVM(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg0) { +static inline void memmgrCalcReservedFbSpaceForUVM(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); } #else //__nvoc_mem_mgr_h_disabled -#define memmgrCalcReservedFbSpaceForUVM(pGpu, pMemoryManager, arg0) memmgrCalcReservedFbSpaceForUVM_GM107(pGpu, pMemoryManager, arg0) +#define memmgrCalcReservedFbSpaceForUVM(pGpu, pMemoryManager, arg3) memmgrCalcReservedFbSpaceForUVM_GM107(pGpu, pMemoryManager, arg3) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrCalcReservedFbSpaceForUVM_HAL(pGpu, pMemoryManager, arg0) memmgrCalcReservedFbSpaceForUVM(pGpu, pMemoryManager, arg0) +#define memmgrCalcReservedFbSpaceForUVM_HAL(pGpu, pMemoryManager, arg3) memmgrCalcReservedFbSpaceForUVM(pGpu, pMemoryManager, arg3) -void memmgrCalcReservedFbSpaceHal_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg0, NvU64 *arg1, NvU64 *arg2); +void memmgrCalcReservedFbSpaceHal_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg3, NvU64 *arg4, NvU64 *arg5); #ifdef __nvoc_mem_mgr_h_disabled -static inline void memmgrCalcReservedFbSpaceHal(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg0, NvU64 *arg1, NvU64 *arg2) { +static inline void memmgrCalcReservedFbSpaceHal(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg3, NvU64 *arg4, NvU64 *arg5) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); } #else //__nvoc_mem_mgr_h_disabled -#define memmgrCalcReservedFbSpaceHal(pGpu, pMemoryManager, arg0, arg1, arg2) memmgrCalcReservedFbSpaceHal_GM107(pGpu, pMemoryManager, arg0, arg1, arg2) +#define memmgrCalcReservedFbSpaceHal(pGpu, pMemoryManager, arg3, arg4, arg5) memmgrCalcReservedFbSpaceHal_GM107(pGpu, pMemoryManager, arg3, arg4, arg5) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrCalcReservedFbSpaceHal_HAL(pGpu, pMemoryManager, arg0, arg1, arg2) memmgrCalcReservedFbSpaceHal(pGpu, pMemoryManager, arg0, arg1, arg2) +#define memmgrCalcReservedFbSpaceHal_HAL(pGpu, pMemoryManager, arg3, arg4, arg5) memmgrCalcReservedFbSpaceHal(pGpu, pMemoryManager, arg3, arg4, arg5) -NV_STATUS memmgrInitReservedMemory_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 arg0); +NV_STATUS memmgrInitReservedMemory_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 arg3); #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrInitReservedMemory(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 arg0) { +static inline NV_STATUS memmgrInitReservedMemory(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrInitReservedMemory(pGpu, pMemoryManager, arg0) memmgrInitReservedMemory_GM107(pGpu, pMemoryManager, arg0) +#define memmgrInitReservedMemory(pGpu, pMemoryManager, arg3) memmgrInitReservedMemory_GM107(pGpu, pMemoryManager, arg3) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrInitReservedMemory_HAL(pGpu, pMemoryManager, arg0) memmgrInitReservedMemory(pGpu, pMemoryManager, arg0) +#define memmgrInitReservedMemory_HAL(pGpu, pMemoryManager, arg3) memmgrInitReservedMemory(pGpu, pMemoryManager, arg3) NV_STATUS memmgrPreInitReservedMemory_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); @@ -1692,19 +1920,19 @@ static inline NV_STATUS memmgrPreInitReservedMemory(OBJGPU *pGpu, struct MemoryM #define memmgrPreInitReservedMemory_HAL(pGpu, pMemoryManager) memmgrPreInitReservedMemory(pGpu, pMemoryManager) -NV_STATUS memmgrSetMemDescPageSize_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, PMEMORY_DESCRIPTOR arg0, ADDRESS_TRANSLATION arg1, RM_ATTR_PAGE_SIZE arg2); +NV_STATUS memmgrSetMemDescPageSize_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, PMEMORY_DESCRIPTOR arg3, ADDRESS_TRANSLATION arg4, RM_ATTR_PAGE_SIZE arg5); #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrSetMemDescPageSize(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, PMEMORY_DESCRIPTOR arg0, ADDRESS_TRANSLATION arg1, RM_ATTR_PAGE_SIZE arg2) { +static inline NV_STATUS memmgrSetMemDescPageSize(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, PMEMORY_DESCRIPTOR arg3, ADDRESS_TRANSLATION arg4, RM_ATTR_PAGE_SIZE arg5) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrSetMemDescPageSize(pGpu, pMemoryManager, arg0, arg1, arg2) memmgrSetMemDescPageSize_GM107(pGpu, pMemoryManager, arg0, arg1, arg2) +#define memmgrSetMemDescPageSize(pGpu, pMemoryManager, arg3, arg4, arg5) memmgrSetMemDescPageSize_GM107(pGpu, pMemoryManager, arg3, arg4, arg5) #endif //__nvoc_mem_mgr_h_disabled -#define memmgrSetMemDescPageSize_HAL(pGpu, pMemoryManager, arg0, arg1, arg2) memmgrSetMemDescPageSize(pGpu, pMemoryManager, arg0, arg1, arg2) +#define memmgrSetMemDescPageSize_HAL(pGpu, pMemoryManager, arg3, arg4, arg5) memmgrSetMemDescPageSize(pGpu, pMemoryManager, arg3, arg4, arg5) NV_STATUS memmgrGetBlackListPagesForHeap_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct Heap *pHeap); @@ -1734,6 +1962,38 @@ static inline NvU32 memmgrGetFBEndReserveSizeEstimate(OBJGPU *pGpu, struct Memor #define memmgrGetFBEndReserveSizeEstimate_HAL(pGpu, pMemoryManager) memmgrGetFBEndReserveSizeEstimate(pGpu, pMemoryManager) +static inline NV_STATUS memmgrValidateFBEndReservation_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + return NV_OK; +} + + +#ifdef __nvoc_mem_mgr_h_disabled +static inline NV_STATUS memmgrValidateFBEndReservation(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_mem_mgr_h_disabled +#define memmgrValidateFBEndReservation(pGpu, pMemoryManager) memmgrValidateFBEndReservation_56cd7a(pGpu, pMemoryManager) +#endif //__nvoc_mem_mgr_h_disabled + +#define memmgrValidateFBEndReservation_HAL(pGpu, pMemoryManager) memmgrValidateFBEndReservation(pGpu, pMemoryManager) + +static inline NV_STATUS memmgrReserveMemoryForFakeWPR_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + return NV_OK; +} + + +#ifdef __nvoc_mem_mgr_h_disabled +static inline NV_STATUS memmgrReserveMemoryForFakeWPR(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_mem_mgr_h_disabled +#define memmgrReserveMemoryForFakeWPR(pGpu, pMemoryManager) memmgrReserveMemoryForFakeWPR_56cd7a(pGpu, pMemoryManager) +#endif //__nvoc_mem_mgr_h_disabled + +#define memmgrReserveMemoryForFakeWPR_HAL(pGpu, pMemoryManager) memmgrReserveMemoryForFakeWPR(pGpu, pMemoryManager) + static inline NV_STATUS memmgrReserveMemoryForPmu_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { return NV_OK; } @@ -1797,196 +2057,98 @@ static inline NV_STATUS memmgrCalculateHeapOffsetWithGSP(OBJGPU *pGpu, struct Me #define memmgrCalculateHeapOffsetWithGSP_HAL(pGpu, pMemoryManager, offset) memmgrCalculateHeapOffsetWithGSP(pGpu, pMemoryManager, offset) -NvBool memmgrIsGspOwnedMemory_KERNEL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc); - - -#ifdef __nvoc_mem_mgr_h_disabled -static inline NvBool memmgrIsGspOwnedMemory(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc) { - NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); - return NV_FALSE; -} -#else //__nvoc_mem_mgr_h_disabled -#define memmgrIsGspOwnedMemory(pGpu, pMemoryManager, pMemDesc) memmgrIsGspOwnedMemory_KERNEL(pGpu, pMemoryManager, pMemDesc) -#endif //__nvoc_mem_mgr_h_disabled - -#define memmgrIsGspOwnedMemory_HAL(pGpu, pMemoryManager, pMemDesc) memmgrIsGspOwnedMemory(pGpu, pMemoryManager, pMemDesc) - -NV_STATUS memmgrConstructEngine_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, ENGDESCRIPTOR arg0); - -static inline NV_STATUS memmgrConstructEngine_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, ENGDESCRIPTOR arg0) { - return pMemoryManager->__memmgrConstructEngine__(pGpu, pMemoryManager, arg0); -} +NV_STATUS memmgrConstructEngine_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, ENGDESCRIPTOR arg3); NV_STATUS memmgrStatePreInitLocked_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); -static inline NV_STATUS memmgrStatePreInitLocked_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - return pMemoryManager->__memmgrStatePreInitLocked__(pGpu, pMemoryManager); -} - NV_STATUS memmgrStateInitLocked_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); -static inline NV_STATUS memmgrStateInitLocked_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - return pMemoryManager->__memmgrStateInitLocked__(pGpu, pMemoryManager); -} - -NV_STATUS memmgrStateLoad_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0); +NV_STATUS memmgrStateLoad_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3); -static inline NV_STATUS memmgrStateLoad_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0) { - return pMemoryManager->__memmgrStateLoad__(pGpu, pMemoryManager, arg0); -} - -NV_STATUS memmgrStatePostLoad_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0); - -static inline NV_STATUS memmgrStatePostLoad_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0) { - return pMemoryManager->__memmgrStatePostLoad__(pGpu, pMemoryManager, arg0); -} - -NV_STATUS memmgrStatePreUnload_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0); +NV_STATUS memmgrStatePostLoad_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3); -static inline NV_STATUS memmgrStatePreUnload_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0) { - return pMemoryManager->__memmgrStatePreUnload__(pGpu, pMemoryManager, arg0); -} +NV_STATUS memmgrStatePreUnload_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3); -NV_STATUS memmgrStateUnload_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0); - -static inline NV_STATUS memmgrStateUnload_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0) { - return pMemoryManager->__memmgrStateUnload__(pGpu, pMemoryManager, arg0); -} +NV_STATUS memmgrStateUnload_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3); void memmgrStateDestroy_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); -static inline void memmgrStateDestroy_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - pMemoryManager->__memmgrStateDestroy__(pGpu, pMemoryManager); -} - -static inline NV_STATUS memmgrAllocateConsoleRegion_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_REGION_DESCRIPTOR *arg0) { +static inline NV_STATUS memmgrAllocateConsoleRegion_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_REGION_DESCRIPTOR *arg3) { return NV_OK; } -NV_STATUS memmgrAllocateConsoleRegion_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_REGION_DESCRIPTOR *arg0); - -static inline NV_STATUS memmgrAllocateConsoleRegion_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_REGION_DESCRIPTOR *arg0) { - return pMemoryManager->__memmgrAllocateConsoleRegion__(pGpu, pMemoryManager, arg0); -} +NV_STATUS memmgrAllocateConsoleRegion_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_REGION_DESCRIPTOR *arg3); -NV_STATUS memmgrMemUtilsSec2CtxInit_GH100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0); +NV_STATUS memmgrMemUtilsSec2CtxInit_GH100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3); -static inline NV_STATUS memmgrMemUtilsSec2CtxInit_46f6a7(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) { +static inline NV_STATUS memmgrMemUtilsSec2CtxInit_46f6a7(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS memmgrMemUtilsSec2CtxInit_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) { - return pMemoryManager->__memmgrMemUtilsSec2CtxInit__(pGpu, pMemoryManager, arg0); -} - -NvBool memmgrMemUtilsCheckMemoryFastScrubEnable_GH100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0, NvBool arg1, RmPhysAddr arg2, NvU32 arg3, NV_ADDRESS_SPACE arg4); +NvBool memmgrMemUtilsCheckMemoryFastScrubEnable_GH100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3, NvBool arg4, RmPhysAddr arg5, NvU32 arg6, NV_ADDRESS_SPACE arg7); -static inline NvBool memmgrMemUtilsCheckMemoryFastScrubEnable_491d52(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0, NvBool arg1, RmPhysAddr arg2, NvU32 arg3, NV_ADDRESS_SPACE arg4) { +static inline NvBool memmgrMemUtilsCheckMemoryFastScrubEnable_491d52(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3, NvBool arg4, RmPhysAddr arg5, NvU32 arg6, NV_ADDRESS_SPACE arg7) { return ((NvBool)(0 != 0)); } -static inline NvBool memmgrMemUtilsCheckMemoryFastScrubEnable_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0, NvBool arg1, RmPhysAddr arg2, NvU32 arg3, NV_ADDRESS_SPACE arg4) { - return pMemoryManager->__memmgrMemUtilsCheckMemoryFastScrubEnable__(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4); -} - NV_STATUS memmgrAllocDetermineAlignment_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *pMemSize, NvU64 *pAlign, NvU64 alignPad, NvU32 allocFlags, NvU32 retAttr, NvU32 retAttr2, NvU64 hwAlignment); NV_STATUS memmgrAllocDetermineAlignment_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *pMemSize, NvU64 *pAlign, NvU64 alignPad, NvU32 allocFlags, NvU32 retAttr, NvU32 retAttr2, NvU64 hwAlignment); -static inline NV_STATUS memmgrAllocDetermineAlignment_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *pMemSize, NvU64 *pAlign, NvU64 alignPad, NvU32 allocFlags, NvU32 retAttr, NvU32 retAttr2, NvU64 hwAlignment) { - return pMemoryManager->__memmgrAllocDetermineAlignment__(pGpu, pMemoryManager, pMemSize, pAlign, alignPad, allocFlags, retAttr, retAttr2, hwAlignment); -} - NvU64 memmgrGetMaxContextSize_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); NvU64 memmgrGetMaxContextSize_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); NvU64 memmgrGetMaxContextSize_AD102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); -static inline NvU64 memmgrGetMaxContextSize_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - return pMemoryManager->__memmgrGetMaxContextSize__(pGpu, pMemoryManager); -} - -NvU64 memmgrGetFbTaxSize_VGPUSTUB(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); +NvU64 memmgrGetFbTaxSize_VF(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); static inline NvU64 memmgrGetFbTaxSize_4a4dee(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { return 0; } -static inline NvU64 memmgrGetFbTaxSize_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - return pMemoryManager->__memmgrGetFbTaxSize__(pGpu, pMemoryManager); -} - void memmgrScrubRegistryOverrides_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); void memmgrScrubRegistryOverrides_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); -static inline void memmgrScrubRegistryOverrides_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - pMemoryManager->__memmgrScrubRegistryOverrides__(pGpu, pMemoryManager); -} - NvU32 memmgrGetPteKindBl_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); static inline NvU32 memmgrGetPteKindBl_474d46(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { NV_ASSERT_OR_RETURN_PRECOMP(0, 0); } -static inline NvU32 memmgrGetPteKindBl_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - return pMemoryManager->__memmgrGetPteKindBl__(pGpu, pMemoryManager); -} - NvU32 memmgrGetPteKindPitch_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); static inline NvU32 memmgrGetPteKindPitch_474d46(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { NV_ASSERT_OR_RETURN_PRECOMP(0, 0); } -static inline NvU32 memmgrGetPteKindPitch_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - return pMemoryManager->__memmgrGetPteKindPitch__(pGpu, pMemoryManager); -} - -NvU32 memmgrChooseKindCompressC_GP100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg0); +NvU32 memmgrChooseKindCompressC_GP100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg3); -static inline NvU32 memmgrChooseKindCompressC_474d46(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg0) { +static inline NvU32 memmgrChooseKindCompressC_474d46(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg3) { NV_ASSERT_OR_RETURN_PRECOMP(0, 0); } -static inline NvU32 memmgrChooseKindCompressC_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg0) { - return pMemoryManager->__memmgrChooseKindCompressC__(pGpu, pMemoryManager, arg0); -} - -NV_STATUS memmgrGetFlaKind_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 *arg0); +NV_STATUS memmgrGetFlaKind_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 *arg3); -static inline NV_STATUS memmgrGetFlaKind_46f6a7(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 *arg0) { +static inline NV_STATUS memmgrGetFlaKind_46f6a7(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 *arg3) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS memmgrGetFlaKind_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 *arg0) { - return pMemoryManager->__memmgrGetFlaKind__(pGpu, pMemoryManager, arg0); -} - NvBool memmgrIsMemDescSupportedByFla_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc); static inline NvBool memmgrIsMemDescSupportedByFla_46f6a7(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc) { return NV_ERR_NOT_SUPPORTED; } -static inline NvBool memmgrIsMemDescSupportedByFla_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc) { - return pMemoryManager->__memmgrIsMemDescSupportedByFla__(pGpu, pMemoryManager, pMemDesc); -} - -NvU32 memmgrDetermineComptag_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, RmPhysAddr arg0); +NvU32 memmgrDetermineComptag_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, RmPhysAddr arg3); -static inline NvU32 memmgrDetermineComptag_13cd8d(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, RmPhysAddr arg0) { +static inline NvU32 memmgrDetermineComptag_13cd8d(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, RmPhysAddr arg3) { NV_ASSERT_PRECOMP(0); return 0; } -static inline NvU32 memmgrDetermineComptag_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, RmPhysAddr arg0) { - return pMemoryManager->__memmgrDetermineComptag__(pGpu, pMemoryManager, arg0); -} - -NvU32 memmgrGetGrHeapReservationSize_VGPUSTUB(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); +NvU32 memmgrGetGrHeapReservationSize_VF(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); static inline NvU32 memmgrGetGrHeapReservationSize_4a4dee(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { return 0; @@ -1994,40 +2156,24 @@ static inline NvU32 memmgrGetGrHeapReservationSize_4a4dee(OBJGPU *pGpu, struct M NvU32 memmgrGetGrHeapReservationSize_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); -static inline NvU32 memmgrGetGrHeapReservationSize_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - return pMemoryManager->__memmgrGetGrHeapReservationSize__(pGpu, pMemoryManager); -} - static inline NvU32 memmgrGetRunlistEntriesReservedFbSpace_4a4dee(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { return 0; } NvU32 memmgrGetRunlistEntriesReservedFbSpace_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); -static inline NvU32 memmgrGetRunlistEntriesReservedFbSpace_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - return pMemoryManager->__memmgrGetRunlistEntriesReservedFbSpace__(pGpu, pMemoryManager); -} - static inline NvU32 memmgrGetUserdReservedFbSpace_4a4dee(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { return 0; } NvU32 memmgrGetUserdReservedFbSpace_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); -static inline NvU32 memmgrGetUserdReservedFbSpace_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - return pMemoryManager->__memmgrGetUserdReservedFbSpace__(pGpu, pMemoryManager); -} - NV_STATUS memmgrCheckReservedMemorySize_GK104(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); static inline NV_STATUS memmgrCheckReservedMemorySize_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { return NV_OK; } -static inline NV_STATUS memmgrCheckReservedMemorySize_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - return pMemoryManager->__memmgrCheckReservedMemorySize__(pGpu, pMemoryManager); -} - NV_STATUS memmgrReadMmuLock_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvBool *pbIsValid, NvU64 *pMmuLockLo, NvU64 *pMmuLockHi); static inline NV_STATUS memmgrReadMmuLock_e133c0(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvBool *pbIsValid, NvU64 *pMmuLockLo, NvU64 *pMmuLockHi) { @@ -2035,50 +2181,30 @@ static inline NV_STATUS memmgrReadMmuLock_e133c0(OBJGPU *pGpu, struct MemoryMana return NV_OK; } -static inline NV_STATUS memmgrReadMmuLock_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvBool *pbIsValid, NvU64 *pMmuLockLo, NvU64 *pMmuLockHi) { - return pMemoryManager->__memmgrReadMmuLock__(pGpu, pMemoryManager, pbIsValid, pMmuLockLo, pMmuLockHi); -} - NV_STATUS memmgrBlockMemLockedMemory_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); static inline NV_STATUS memmgrBlockMemLockedMemory_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { return NV_OK; } -static inline NV_STATUS memmgrBlockMemLockedMemory_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - return pMemoryManager->__memmgrBlockMemLockedMemory__(pGpu, pMemoryManager); -} - NV_STATUS memmgrInsertUnprotectedRegionAtBottomOfFb_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *pSize); static inline NV_STATUS memmgrInsertUnprotectedRegionAtBottomOfFb_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *pSize) { return NV_OK; } -static inline NV_STATUS memmgrInsertUnprotectedRegionAtBottomOfFb_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *pSize) { - return pMemoryManager->__memmgrInsertUnprotectedRegionAtBottomOfFb__(pGpu, pMemoryManager, pSize); -} - NV_STATUS memmgrInitBaseFbRegions_FWCLIENT(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); -NV_STATUS memmgrInitBaseFbRegions_VGPUSTUB(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); +NV_STATUS memmgrInitBaseFbRegions_VF(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); NV_STATUS memmgrInitBaseFbRegions_GP102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); -static inline NV_STATUS memmgrInitBaseFbRegions_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - return pMemoryManager->__memmgrInitBaseFbRegions__(pGpu, pMemoryManager); -} - void memmgrGetDisablePlcKind_GA100(struct MemoryManager *pMemoryManager, NvU32 *pteKind); static inline void memmgrGetDisablePlcKind_b3696a(struct MemoryManager *pMemoryManager, NvU32 *pteKind) { return; } -static inline void memmgrGetDisablePlcKind_DISPATCH(struct MemoryManager *pMemoryManager, NvU32 *pteKind) { - pMemoryManager->__memmgrGetDisablePlcKind__(pMemoryManager, pteKind); -} - void memmgrEnableDynamicPageOfflining_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); void memmgrEnableDynamicPageOfflining_GA102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); @@ -2087,80 +2213,26 @@ static inline void memmgrEnableDynamicPageOfflining_b3696a(OBJGPU *pGpu, struct return; } -static inline void memmgrEnableDynamicPageOfflining_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - pMemoryManager->__memmgrEnableDynamicPageOfflining__(pGpu, pMemoryManager); -} - static inline NV_STATUS memmgrSetPartitionableMem_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { return NV_OK; } NV_STATUS memmgrSetPartitionableMem_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); -static inline NV_STATUS memmgrSetPartitionableMem_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - return pMemoryManager->__memmgrSetPartitionableMem__(pGpu, pMemoryManager); -} - NV_STATUS memmgrAllocMIGGPUInstanceMemory_VF(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 swizzId, NvHandle *phMemory, struct NV_RANGE *pAddrRange, struct Heap **ppMemoryPartitionHeap); NV_STATUS memmgrAllocMIGGPUInstanceMemory_PF(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 swizzId, NvHandle *phMemory, struct NV_RANGE *pAddrRange, struct Heap **ppMemoryPartitionHeap); -static inline NV_STATUS memmgrAllocMIGGPUInstanceMemory_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 swizzId, NvHandle *phMemory, struct NV_RANGE *pAddrRange, struct Heap **ppMemoryPartitionHeap) { - return pMemoryManager->__memmgrAllocMIGGPUInstanceMemory__(pGpu, pMemoryManager, swizzId, phMemory, pAddrRange, ppMemoryPartitionHeap); -} - NV_STATUS memmgrGetBlackListPages_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, BLACKLIST_ADDRESS *pBlAddrs, NvU32 *pCount); NV_STATUS memmgrGetBlackListPages_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, BLACKLIST_ADDRESS *pBlAddrs, NvU32 *pCount); -static inline NV_STATUS memmgrGetBlackListPages_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, BLACKLIST_ADDRESS *pBlAddrs, NvU32 *pCount) { - return pMemoryManager->__memmgrGetBlackListPages__(pGpu, pMemoryManager, pBlAddrs, pCount); -} - NV_STATUS memmgrDiscoverMIGPartitionableMemoryRange_VF(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct NV_RANGE *pMemoryRange); static inline NV_STATUS memmgrDiscoverMIGPartitionableMemoryRange_46f6a7(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct NV_RANGE *pMemoryRange) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS memmgrDiscoverMIGPartitionableMemoryRange_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct NV_RANGE *pMemoryRange) { - return pMemoryManager->__memmgrDiscoverMIGPartitionableMemoryRange__(pGpu, pMemoryManager, pMemoryRange); -} - -NV_STATUS memmgrValidateFBEndReservation_PF(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); - -static inline NV_STATUS memmgrValidateFBEndReservation_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - return NV_OK; -} - -static inline NV_STATUS memmgrValidateFBEndReservation_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - return pMemoryManager->__memmgrValidateFBEndReservation__(pGpu, pMemoryManager); -} - -static inline NV_STATUS memmgrStatePreLoad_DISPATCH(POBJGPU pGpu, struct MemoryManager *pEngstate, NvU32 arg0) { - return pEngstate->__memmgrStatePreLoad__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS memmgrStatePostUnload_DISPATCH(POBJGPU pGpu, struct MemoryManager *pEngstate, NvU32 arg0) { - return pEngstate->__memmgrStatePostUnload__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS memmgrStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct MemoryManager *pEngstate) { - return pEngstate->__memmgrStateInitUnlocked__(pGpu, pEngstate); -} - -static inline void memmgrInitMissing_DISPATCH(POBJGPU pGpu, struct MemoryManager *pEngstate) { - pEngstate->__memmgrInitMissing__(pGpu, pEngstate); -} - -static inline NV_STATUS memmgrStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct MemoryManager *pEngstate) { - return pEngstate->__memmgrStatePreInitUnlocked__(pGpu, pEngstate); -} - -static inline NvBool memmgrIsPresent_DISPATCH(POBJGPU pGpu, struct MemoryManager *pEngstate) { - return pEngstate->__memmgrIsPresent__(pGpu, pEngstate); -} - static inline NvBool memmgrIsLocalEgmSupported(struct MemoryManager *pMemoryManager) { return pMemoryManager->bLocalEgmSupported; } @@ -2259,15 +2331,15 @@ static inline NV_STATUS memmgrAllocResources(OBJGPU *pGpu, struct MemoryManager #define memmgrAllocResources(pGpu, pMemoryManager, pAllocRequest, pFbAllocInfo) memmgrAllocResources_IMPL(pGpu, pMemoryManager, pAllocRequest, pFbAllocInfo) #endif //__nvoc_mem_mgr_h_disabled -NV_STATUS memmgrFree_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct Heap *arg0, NvHandle arg1, NvHandle arg2, NvHandle arg3, NvU32 arg4, MEMORY_DESCRIPTOR *arg5); +NV_STATUS memmgrFree_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct Heap *arg3, NvHandle arg4, NvHandle arg5, NvHandle arg6, NvU32 arg7, MEMORY_DESCRIPTOR *arg8); #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrFree(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct Heap *arg0, NvHandle arg1, NvHandle arg2, NvHandle arg3, NvU32 arg4, MEMORY_DESCRIPTOR *arg5) { +static inline NV_STATUS memmgrFree(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct Heap *arg3, NvHandle arg4, NvHandle arg5, NvHandle arg6, NvU32 arg7, MEMORY_DESCRIPTOR *arg8) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrFree(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4, arg5) memmgrFree_IMPL(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4, arg5) +#define memmgrFree(pGpu, pMemoryManager, arg3, arg4, arg5, arg6, arg7, arg8) memmgrFree_IMPL(pGpu, pMemoryManager, arg3, arg4, arg5, arg6, arg7, arg8) #endif //__nvoc_mem_mgr_h_disabled NV_STATUS memmgrAddMemNode_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc, NvBool bFreeDescriptor); @@ -2324,6 +2396,17 @@ static inline NV_STATUS memmgrMemCopy(struct MemoryManager *pMemoryManager, TRAN #define memmgrMemCopy(pMemoryManager, pDst, pSrc, size, flags) memmgrMemCopy_IMPL(pMemoryManager, pDst, pSrc, size, flags) #endif //__nvoc_mem_mgr_h_disabled +NV_STATUS memmgrMemsetInBlocks_IMPL(struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc, NvU32 value, NvU64 baseOffset, NvU64 size, NvU32 flags, NvU32 blockSize); + +#ifdef __nvoc_mem_mgr_h_disabled +static inline NV_STATUS memmgrMemsetInBlocks(struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc, NvU32 value, NvU64 baseOffset, NvU64 size, NvU32 flags, NvU32 blockSize) { + NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_mem_mgr_h_disabled +#define memmgrMemsetInBlocks(pMemoryManager, pMemDesc, value, baseOffset, size, flags, blockSize) memmgrMemsetInBlocks_IMPL(pMemoryManager, pMemDesc, value, baseOffset, size, flags, blockSize) +#endif //__nvoc_mem_mgr_h_disabled + NV_STATUS memmgrMemSet_IMPL(struct MemoryManager *pMemoryManager, TRANSFER_SURFACE *pDst, NvU32 value, NvU32 size, NvU32 flags); #ifdef __nvoc_mem_mgr_h_disabled @@ -2434,59 +2517,59 @@ static inline NV_STATUS memmgrCreateHeap(struct MemoryManager *pMemoryManager) { #define memmgrCreateHeap(pMemoryManager) memmgrCreateHeap_IMPL(pMemoryManager) #endif //__nvoc_mem_mgr_h_disabled -NV_STATUS memmgrGetUsedRamSize_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg0); +NV_STATUS memmgrGetUsedRamSize_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg3); #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrGetUsedRamSize(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg0) { +static inline NV_STATUS memmgrGetUsedRamSize(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrGetUsedRamSize(pGpu, pMemoryManager, arg0) memmgrGetUsedRamSize_IMPL(pGpu, pMemoryManager, arg0) +#define memmgrGetUsedRamSize(pGpu, pMemoryManager, arg3) memmgrGetUsedRamSize_IMPL(pGpu, pMemoryManager, arg3) #endif //__nvoc_mem_mgr_h_disabled -NV_STATUS memmgrAllocHwResources_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg0); +NV_STATUS memmgrAllocHwResources_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg3); #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrAllocHwResources(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg0) { +static inline NV_STATUS memmgrAllocHwResources(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrAllocHwResources(pGpu, pMemoryManager, arg0) memmgrAllocHwResources_IMPL(pGpu, pMemoryManager, arg0) +#define memmgrAllocHwResources(pGpu, pMemoryManager, arg3) memmgrAllocHwResources_IMPL(pGpu, pMemoryManager, arg3) #endif //__nvoc_mem_mgr_h_disabled -NV_STATUS memmgrFreeHwResources_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg0); +NV_STATUS memmgrFreeHwResources_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg3); #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrFreeHwResources(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg0) { +static inline NV_STATUS memmgrFreeHwResources(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrFreeHwResources(pGpu, pMemoryManager, arg0) memmgrFreeHwResources_IMPL(pGpu, pMemoryManager, arg0) +#define memmgrFreeHwResources(pGpu, pMemoryManager, arg3) memmgrFreeHwResources_IMPL(pGpu, pMemoryManager, arg3) #endif //__nvoc_mem_mgr_h_disabled -NvBool memmgrLargePageSupported_IMPL(struct MemoryManager *pMemoryManager, NV_ADDRESS_SPACE arg0); +NvBool memmgrLargePageSupported_IMPL(struct MemoryManager *pMemoryManager, NV_ADDRESS_SPACE arg2); #ifdef __nvoc_mem_mgr_h_disabled -static inline NvBool memmgrLargePageSupported(struct MemoryManager *pMemoryManager, NV_ADDRESS_SPACE arg0) { +static inline NvBool memmgrLargePageSupported(struct MemoryManager *pMemoryManager, NV_ADDRESS_SPACE arg2) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_FALSE; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrLargePageSupported(pMemoryManager, arg0) memmgrLargePageSupported_IMPL(pMemoryManager, arg0) +#define memmgrLargePageSupported(pMemoryManager, arg2) memmgrLargePageSupported_IMPL(pMemoryManager, arg2) #endif //__nvoc_mem_mgr_h_disabled -NvBool memmgrComprSupported_IMPL(struct MemoryManager *pMemoryManager, NV_ADDRESS_SPACE arg0); +NvBool memmgrComprSupported_IMPL(struct MemoryManager *pMemoryManager, NV_ADDRESS_SPACE arg2); #ifdef __nvoc_mem_mgr_h_disabled -static inline NvBool memmgrComprSupported(struct MemoryManager *pMemoryManager, NV_ADDRESS_SPACE arg0) { +static inline NvBool memmgrComprSupported(struct MemoryManager *pMemoryManager, NV_ADDRESS_SPACE arg2) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_FALSE; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrComprSupported(pMemoryManager, arg0) memmgrComprSupported_IMPL(pMemoryManager, arg0) +#define memmgrComprSupported(pMemoryManager, arg2) memmgrComprSupported_IMPL(pMemoryManager, arg2) #endif //__nvoc_mem_mgr_h_disabled NvU32 memmgrGetMappableRamSizeMb_IMPL(struct MemoryManager *pMemoryManager); @@ -2511,15 +2594,15 @@ static inline PFB_REGION_DESCRIPTOR memmgrLookupFbRegionByOffset(OBJGPU *pGpu, s #define memmgrLookupFbRegionByOffset(pGpu, pMemoryManager, fbOffset, fbLimit) memmgrLookupFbRegionByOffset_IMPL(pGpu, pMemoryManager, fbOffset, fbLimit) #endif //__nvoc_mem_mgr_h_disabled -NV_STATUS memmgrFillMemdescForPhysAttr_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, PMEMORY_DESCRIPTOR arg0, ADDRESS_TRANSLATION arg1, NvU64 *arg2, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5, NvU32 *arg6, NvU32 *arg7, NvU64 *arg8); +NV_STATUS memmgrFillMemdescForPhysAttr_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, PMEMORY_DESCRIPTOR arg3, ADDRESS_TRANSLATION arg4, NvU64 *arg5, NvU32 *arg6, NvU32 *arg7, NvU32 *arg8, NvU32 *arg9, NvU32 *arg10, NvU64 *arg11); #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrFillMemdescForPhysAttr(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, PMEMORY_DESCRIPTOR arg0, ADDRESS_TRANSLATION arg1, NvU64 *arg2, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5, NvU32 *arg6, NvU32 *arg7, NvU64 *arg8) { +static inline NV_STATUS memmgrFillMemdescForPhysAttr(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, PMEMORY_DESCRIPTOR arg3, ADDRESS_TRANSLATION arg4, NvU64 *arg5, NvU32 *arg6, NvU32 *arg7, NvU32 *arg8, NvU32 *arg9, NvU32 *arg10, NvU64 *arg11) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrFillMemdescForPhysAttr(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8) memmgrFillMemdescForPhysAttr_IMPL(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8) +#define memmgrFillMemdescForPhysAttr(pGpu, pMemoryManager, arg3, arg4, arg5, arg6, arg7, arg8, arg9, arg10, arg11) memmgrFillMemdescForPhysAttr_IMPL(pGpu, pMemoryManager, arg3, arg4, arg5, arg6, arg7, arg8, arg9, arg10, arg11) #endif //__nvoc_mem_mgr_h_disabled NV_STATUS memmgrSetPlatformPmaSupport_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); @@ -2574,15 +2657,15 @@ static inline void memmgrRegenerateFbRegionPriority(OBJGPU *pGpu, struct MemoryM #define memmgrRegenerateFbRegionPriority(pGpu, pMemoryManager) memmgrRegenerateFbRegionPriority_IMPL(pGpu, pMemoryManager) #endif //__nvoc_mem_mgr_h_disabled -NvU32 memmgrInsertFbRegion_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, PFB_REGION_DESCRIPTOR arg0); +NvU32 memmgrInsertFbRegion_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, PFB_REGION_DESCRIPTOR arg3); #ifdef __nvoc_mem_mgr_h_disabled -static inline NvU32 memmgrInsertFbRegion(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, PFB_REGION_DESCRIPTOR arg0) { +static inline NvU32 memmgrInsertFbRegion(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, PFB_REGION_DESCRIPTOR arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return 0; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrInsertFbRegion(pGpu, pMemoryManager, arg0) memmgrInsertFbRegion_IMPL(pGpu, pMemoryManager, arg0) +#define memmgrInsertFbRegion(pGpu, pMemoryManager, arg3) memmgrInsertFbRegion_IMPL(pGpu, pMemoryManager, arg3) #endif //__nvoc_mem_mgr_h_disabled void memmgrDumpFbRegions_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); @@ -2626,14 +2709,14 @@ static inline PMEMORY_DESCRIPTOR memmgrGetReservedConsoleMemDesc(OBJGPU *pGpu, s #define memmgrGetReservedConsoleMemDesc(pGpu, pMemoryManager) memmgrGetReservedConsoleMemDesc_IMPL(pGpu, pMemoryManager) #endif //__nvoc_mem_mgr_h_disabled -void memmgrReserveBar2BackingStore_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg0); +void memmgrReserveBar2BackingStore_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg3); #ifdef __nvoc_mem_mgr_h_disabled -static inline void memmgrReserveBar2BackingStore(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg0) { +static inline void memmgrReserveBar2BackingStore(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); } #else //__nvoc_mem_mgr_h_disabled -#define memmgrReserveBar2BackingStore(pGpu, pMemoryManager, arg0) memmgrReserveBar2BackingStore_IMPL(pGpu, pMemoryManager, arg0) +#define memmgrReserveBar2BackingStore(pGpu, pMemoryManager, arg3) memmgrReserveBar2BackingStore_IMPL(pGpu, pMemoryManager, arg3) #endif //__nvoc_mem_mgr_h_disabled void memmgrCalcReservedFbSpace_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); @@ -2646,47 +2729,47 @@ static inline void memmgrCalcReservedFbSpace(OBJGPU *pGpu, struct MemoryManager #define memmgrCalcReservedFbSpace(pGpu, pMemoryManager) memmgrCalcReservedFbSpace_IMPL(pGpu, pMemoryManager) #endif //__nvoc_mem_mgr_h_disabled -void memmgrMemUtilsSetupChannelBufferSizes_IMPL(struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0, NvU32 arg1); +void memmgrMemUtilsSetupChannelBufferSizes_IMPL(struct MemoryManager *pMemoryManager, OBJCHANNEL *arg2, NvU32 arg3); #ifdef __nvoc_mem_mgr_h_disabled -static inline void memmgrMemUtilsSetupChannelBufferSizes(struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0, NvU32 arg1) { +static inline void memmgrMemUtilsSetupChannelBufferSizes(struct MemoryManager *pMemoryManager, OBJCHANNEL *arg2, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); } #else //__nvoc_mem_mgr_h_disabled -#define memmgrMemUtilsSetupChannelBufferSizes(pMemoryManager, arg0, arg1) memmgrMemUtilsSetupChannelBufferSizes_IMPL(pMemoryManager, arg0, arg1) +#define memmgrMemUtilsSetupChannelBufferSizes(pMemoryManager, arg2, arg3) memmgrMemUtilsSetupChannelBufferSizes_IMPL(pMemoryManager, arg2, arg3) #endif //__nvoc_mem_mgr_h_disabled -NV_STATUS memmgrMemUtilsChannelSchedulingSetup_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0); +NV_STATUS memmgrMemUtilsChannelSchedulingSetup_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3); #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrMemUtilsChannelSchedulingSetup(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) { +static inline NV_STATUS memmgrMemUtilsChannelSchedulingSetup(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrMemUtilsChannelSchedulingSetup(pGpu, pMemoryManager, arg0) memmgrMemUtilsChannelSchedulingSetup_IMPL(pGpu, pMemoryManager, arg0) +#define memmgrMemUtilsChannelSchedulingSetup(pGpu, pMemoryManager, arg3) memmgrMemUtilsChannelSchedulingSetup_IMPL(pGpu, pMemoryManager, arg3) #endif //__nvoc_mem_mgr_h_disabled -NV_STATUS memmgrGetKindComprFromMemDesc_IMPL(struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *arg0, NvU64 offset, NvU32 *kind, COMPR_INFO *pComprInfo); +NV_STATUS memmgrGetKindComprFromMemDesc_IMPL(struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *arg2, NvU64 offset, NvU32 *kind, COMPR_INFO *pComprInfo); #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrGetKindComprFromMemDesc(struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *arg0, NvU64 offset, NvU32 *kind, COMPR_INFO *pComprInfo) { +static inline NV_STATUS memmgrGetKindComprFromMemDesc(struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *arg2, NvU64 offset, NvU32 *kind, COMPR_INFO *pComprInfo) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrGetKindComprFromMemDesc(pMemoryManager, arg0, offset, kind, pComprInfo) memmgrGetKindComprFromMemDesc_IMPL(pMemoryManager, arg0, offset, kind, pComprInfo) +#define memmgrGetKindComprFromMemDesc(pMemoryManager, arg2, offset, kind, pComprInfo) memmgrGetKindComprFromMemDesc_IMPL(pMemoryManager, arg2, offset, kind, pComprInfo) #endif //__nvoc_mem_mgr_h_disabled -NV_STATUS memmgrFillComprInfo_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 arg0, NvU32 arg1, NvU32 arg2, NvU64 arg3, NvU32 arg4, COMPR_INFO *arg5); +NV_STATUS memmgrFillComprInfo_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 arg3, NvU32 arg4, NvU32 arg5, NvU64 arg6, NvU32 arg7, COMPR_INFO *arg8); #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrFillComprInfo(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 arg0, NvU32 arg1, NvU32 arg2, NvU64 arg3, NvU32 arg4, COMPR_INFO *arg5) { +static inline NV_STATUS memmgrFillComprInfo(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 arg3, NvU32 arg4, NvU32 arg5, NvU64 arg6, NvU32 arg7, COMPR_INFO *arg8) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrFillComprInfo(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4, arg5) memmgrFillComprInfo_IMPL(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4, arg5) +#define memmgrFillComprInfo(pGpu, pMemoryManager, arg3, arg4, arg5, arg6, arg7, arg8) memmgrFillComprInfo_IMPL(pGpu, pMemoryManager, arg3, arg4, arg5, arg6, arg7, arg8) #endif //__nvoc_mem_mgr_h_disabled void memmgrComprInfoDisableCompression_IMPL(struct MemoryManager *pMemoryManager, COMPR_INFO *pComprInfo); @@ -2764,61 +2847,61 @@ static inline NV_STATUS memmgrInitCeUtils(struct MemoryManager *pMemoryManager, #define memmgrInitCeUtils(pMemoryManager, bFifoLite) memmgrInitCeUtils_IMPL(pMemoryManager, bFifoLite) #endif //__nvoc_mem_mgr_h_disabled -void memmgrDestroyCeUtils_IMPL(struct MemoryManager *pMemoryManager, NvBool bSuspendCeUtils); +void memmgrDestroyCeUtils_IMPL(struct MemoryManager *pMemoryManager); #ifdef __nvoc_mem_mgr_h_disabled -static inline void memmgrDestroyCeUtils(struct MemoryManager *pMemoryManager, NvBool bSuspendCeUtils) { +static inline void memmgrDestroyCeUtils(struct MemoryManager *pMemoryManager) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); } #else //__nvoc_mem_mgr_h_disabled -#define memmgrDestroyCeUtils(pMemoryManager, bSuspendCeUtils) memmgrDestroyCeUtils_IMPL(pMemoryManager, bSuspendCeUtils) +#define memmgrDestroyCeUtils(pMemoryManager) memmgrDestroyCeUtils_IMPL(pMemoryManager) #endif //__nvoc_mem_mgr_h_disabled -NV_STATUS memmgrSetMIGPartitionableBAR1Range_IMPL(OBJGPU *arg0, struct MemoryManager *arg1); +NV_STATUS memmgrSetMIGPartitionableBAR1Range_IMPL(OBJGPU *arg1, struct MemoryManager *arg2); #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrSetMIGPartitionableBAR1Range(OBJGPU *arg0, struct MemoryManager *arg1) { +static inline NV_STATUS memmgrSetMIGPartitionableBAR1Range(OBJGPU *arg1, struct MemoryManager *arg2) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrSetMIGPartitionableBAR1Range(arg0, arg1) memmgrSetMIGPartitionableBAR1Range_IMPL(arg0, arg1) +#define memmgrSetMIGPartitionableBAR1Range(arg1, arg2) memmgrSetMIGPartitionableBAR1Range_IMPL(arg1, arg2) #endif //__nvoc_mem_mgr_h_disabled -struct NV_RANGE memmgrGetMIGPartitionableBAR1Range_IMPL(OBJGPU *arg0, struct MemoryManager *arg1); +struct NV_RANGE memmgrGetMIGPartitionableBAR1Range_IMPL(OBJGPU *arg1, struct MemoryManager *arg2); #ifdef __nvoc_mem_mgr_h_disabled -static inline struct NV_RANGE memmgrGetMIGPartitionableBAR1Range(OBJGPU *arg0, struct MemoryManager *arg1) { +static inline struct NV_RANGE memmgrGetMIGPartitionableBAR1Range(OBJGPU *arg1, struct MemoryManager *arg2) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); struct NV_RANGE ret; portMemSet(&ret, 0, sizeof(struct NV_RANGE)); return ret; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrGetMIGPartitionableBAR1Range(arg0, arg1) memmgrGetMIGPartitionableBAR1Range_IMPL(arg0, arg1) +#define memmgrGetMIGPartitionableBAR1Range(arg1, arg2) memmgrGetMIGPartitionableBAR1Range_IMPL(arg1, arg2) #endif //__nvoc_mem_mgr_h_disabled -void memmgrSetMIGPartitionableMemoryRange_IMPL(OBJGPU *arg0, struct MemoryManager *arg1, struct NV_RANGE arg2); +void memmgrSetMIGPartitionableMemoryRange_IMPL(OBJGPU *arg1, struct MemoryManager *arg2, struct NV_RANGE arg3); #ifdef __nvoc_mem_mgr_h_disabled -static inline void memmgrSetMIGPartitionableMemoryRange(OBJGPU *arg0, struct MemoryManager *arg1, struct NV_RANGE arg2) { +static inline void memmgrSetMIGPartitionableMemoryRange(OBJGPU *arg1, struct MemoryManager *arg2, struct NV_RANGE arg3) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); } #else //__nvoc_mem_mgr_h_disabled -#define memmgrSetMIGPartitionableMemoryRange(arg0, arg1, arg2) memmgrSetMIGPartitionableMemoryRange_IMPL(arg0, arg1, arg2) +#define memmgrSetMIGPartitionableMemoryRange(arg1, arg2, arg3) memmgrSetMIGPartitionableMemoryRange_IMPL(arg1, arg2, arg3) #endif //__nvoc_mem_mgr_h_disabled -struct NV_RANGE memmgrGetMIGPartitionableMemoryRange_IMPL(OBJGPU *arg0, struct MemoryManager *arg1); +struct NV_RANGE memmgrGetMIGPartitionableMemoryRange_IMPL(OBJGPU *arg1, struct MemoryManager *arg2); #ifdef __nvoc_mem_mgr_h_disabled -static inline struct NV_RANGE memmgrGetMIGPartitionableMemoryRange(OBJGPU *arg0, struct MemoryManager *arg1) { +static inline struct NV_RANGE memmgrGetMIGPartitionableMemoryRange(OBJGPU *arg1, struct MemoryManager *arg2) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); struct NV_RANGE ret; portMemSet(&ret, 0, sizeof(struct NV_RANGE)); return ret; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrGetMIGPartitionableMemoryRange(arg0, arg1) memmgrGetMIGPartitionableMemoryRange_IMPL(arg0, arg1) +#define memmgrGetMIGPartitionableMemoryRange(arg1, arg2) memmgrGetMIGPartitionableMemoryRange_IMPL(arg1, arg2) #endif //__nvoc_mem_mgr_h_disabled NV_STATUS memmgrFreeMIGGPUInstanceMemory_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 swizzId, NvHandle hMemory, struct Heap **ppMemoryPartitionHeap); @@ -2853,15 +2936,15 @@ static inline void memmgrPageLevelPoolsDestroy(OBJGPU *pGpu, struct MemoryManage #define memmgrPageLevelPoolsDestroy(pGpu, pMemoryManager) memmgrPageLevelPoolsDestroy_IMPL(pGpu, pMemoryManager) #endif //__nvoc_mem_mgr_h_disabled -NV_STATUS memmgrPageLevelPoolsGetInfo_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct Device *pDevice, struct RM_POOL_ALLOC_MEM_RESERVE_INFO **arg0); +NV_STATUS memmgrPageLevelPoolsGetInfo_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct Device *pDevice, struct RM_POOL_ALLOC_MEM_RESERVE_INFO **arg4); #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrPageLevelPoolsGetInfo(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct Device *pDevice, struct RM_POOL_ALLOC_MEM_RESERVE_INFO **arg0) { +static inline NV_STATUS memmgrPageLevelPoolsGetInfo(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct Device *pDevice, struct RM_POOL_ALLOC_MEM_RESERVE_INFO **arg4) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrPageLevelPoolsGetInfo(pGpu, pMemoryManager, pDevice, arg0) memmgrPageLevelPoolsGetInfo_IMPL(pGpu, pMemoryManager, pDevice, arg0) +#define memmgrPageLevelPoolsGetInfo(pGpu, pMemoryManager, pDevice, arg4) memmgrPageLevelPoolsGetInfo_IMPL(pGpu, pMemoryManager, pDevice, arg4) #endif //__nvoc_mem_mgr_h_disabled NV_STATUS memmgrAllocMIGMemoryAllocationInternalHandles_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); @@ -2905,14 +2988,14 @@ static inline void memmgrGetTotalMemoryForAllMIGGPUInstances(OBJGPU *pGpu, struc #define memmgrGetTotalMemoryForAllMIGGPUInstances(pGpu, pMemoryManager, pBytes) memmgrGetTotalMemoryForAllMIGGPUInstances_IMPL(pGpu, pMemoryManager, pBytes) #endif //__nvoc_mem_mgr_h_disabled -void memmgrGetTopLevelScrubberStatus_IMPL(OBJGPU *arg0, struct MemoryManager *arg1, NvBool *pbTopLevelScrubberEnabled, NvBool *pbTopLevelScrubberConstructed); +void memmgrGetTopLevelScrubberStatus_IMPL(OBJGPU *arg1, struct MemoryManager *arg2, NvBool *pbTopLevelScrubberEnabled, NvBool *pbTopLevelScrubberConstructed); #ifdef __nvoc_mem_mgr_h_disabled -static inline void memmgrGetTopLevelScrubberStatus(OBJGPU *arg0, struct MemoryManager *arg1, NvBool *pbTopLevelScrubberEnabled, NvBool *pbTopLevelScrubberConstructed) { +static inline void memmgrGetTopLevelScrubberStatus(OBJGPU *arg1, struct MemoryManager *arg2, NvBool *pbTopLevelScrubberEnabled, NvBool *pbTopLevelScrubberConstructed) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); } #else //__nvoc_mem_mgr_h_disabled -#define memmgrGetTopLevelScrubberStatus(arg0, arg1, pbTopLevelScrubberEnabled, pbTopLevelScrubberConstructed) memmgrGetTopLevelScrubberStatus_IMPL(arg0, arg1, pbTopLevelScrubberEnabled, pbTopLevelScrubberConstructed) +#define memmgrGetTopLevelScrubberStatus(arg1, arg2, pbTopLevelScrubberEnabled, pbTopLevelScrubberConstructed) memmgrGetTopLevelScrubberStatus_IMPL(arg1, arg2, pbTopLevelScrubberEnabled, pbTopLevelScrubberConstructed) #endif //__nvoc_mem_mgr_h_disabled MEMORY_DESCRIPTOR *memmgrMemUtilsGetMemDescFromHandle_IMPL(struct MemoryManager *pMemoryManager, NvHandle hClient, NvHandle hMemory); @@ -2926,15 +3009,26 @@ static inline MEMORY_DESCRIPTOR *memmgrMemUtilsGetMemDescFromHandle(struct Memor #define memmgrMemUtilsGetMemDescFromHandle(pMemoryManager, hClient, hMemory) memmgrMemUtilsGetMemDescFromHandle_IMPL(pMemoryManager, hClient, hMemory) #endif //__nvoc_mem_mgr_h_disabled -NV_STATUS memmgrVerifyGspDmaOps_IMPL(OBJGPU *arg0, struct MemoryManager *arg1); +NV_STATUS memmgrVerifyGspDmaOps_IMPL(OBJGPU *arg1, struct MemoryManager *arg2); + +#ifdef __nvoc_mem_mgr_h_disabled +static inline NV_STATUS memmgrVerifyGspDmaOps(OBJGPU *arg1, struct MemoryManager *arg2) { + NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_mem_mgr_h_disabled +#define memmgrVerifyGspDmaOps(arg1, arg2) memmgrVerifyGspDmaOps_IMPL(arg1, arg2) +#endif //__nvoc_mem_mgr_h_disabled + +NV_STATUS memmgrAllocReservedFBRegionMemdesc_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR **ppMemdesc, NvU64 rangeStart, NvU64 allocSize, NvU64 memdescFlags, NV_FB_ALLOC_RM_INTERNAL_OWNER allocTag); #ifdef __nvoc_mem_mgr_h_disabled -static inline NV_STATUS memmgrVerifyGspDmaOps(OBJGPU *arg0, struct MemoryManager *arg1) { +static inline NV_STATUS memmgrAllocReservedFBRegionMemdesc(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR **ppMemdesc, NvU64 rangeStart, NvU64 allocSize, NvU64 memdescFlags, NV_FB_ALLOC_RM_INTERNAL_OWNER allocTag) { NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrVerifyGspDmaOps(arg0, arg1) memmgrVerifyGspDmaOps_IMPL(arg0, arg1) +#define memmgrAllocReservedFBRegionMemdesc(pGpu, pMemoryManager, ppMemdesc, rangeStart, allocSize, memdescFlags, allocTag) memmgrAllocReservedFBRegionMemdesc_IMPL(pGpu, pMemoryManager, ppMemdesc, rangeStart, allocSize, memdescFlags, allocTag) #endif //__nvoc_mem_mgr_h_disabled NV_STATUS memmgrReserveMemoryForFsp_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); diff --git a/src/nvidia/generated/g_mem_multicast_fabric_nvoc.c b/src/nvidia/generated/g_mem_multicast_fabric_nvoc.c index 2701ec436a..f11621ace0 100644 --- a/src/nvidia/generated/g_mem_multicast_fabric_nvoc.c +++ b/src/nvidia/generated/g_mem_multicast_fabric_nvoc.c @@ -93,110 +93,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryMulticastFabric = /*pExportInfo=*/ &__nvoc_export_info_MemoryMulticastFabric }; -static NvBool __nvoc_thunk_MemoryMulticastFabric_resCanCopy(struct RsResource *pMemoryMulticastFabric) { - return memorymulticastfabricCanCopy((struct MemoryMulticastFabric *)(((unsigned char *)pMemoryMulticastFabric) - __nvoc_rtti_MemoryMulticastFabric_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_MemoryMulticastFabric_memIsReady(struct Memory *pMemoryMulticastFabric, NvBool bCopyConstructorContext) { - return memorymulticastfabricIsReady((struct MemoryMulticastFabric *)(((unsigned char *)pMemoryMulticastFabric) - __nvoc_rtti_MemoryMulticastFabric_Memory.offset), bCopyConstructorContext); -} - -static NV_STATUS __nvoc_thunk_MemoryMulticastFabric_memControl(struct Memory *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memorymulticastfabricControl((struct MemoryMulticastFabric *)(((unsigned char *)pMemoryMulticastFabric) - __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_MemoryMulticastFabric_memIsGpuMapAllowed(struct Memory *pMemoryMulticastFabric, struct OBJGPU *pGpu) { - return memorymulticastfabricIsGpuMapAllowed((struct MemoryMulticastFabric *)(((unsigned char *)pMemoryMulticastFabric) - __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pGpu); -} - -static NvBool __nvoc_thunk_MemoryMulticastFabric_memIsExportAllowed(struct Memory *pMemoryMulticastFabric) { - return memorymulticastfabricIsExportAllowed((struct MemoryMulticastFabric *)(((unsigned char *)pMemoryMulticastFabric) - __nvoc_rtti_MemoryMulticastFabric_Memory.offset)); -} - -static NV_STATUS __nvoc_thunk_MemoryMulticastFabric_memGetMapAddrSpace(struct Memory *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return memorymulticastfabricGetMapAddrSpace((struct MemoryMulticastFabric *)(((unsigned char *)pMemoryMulticastFabric) - __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pCallContext, mapFlags, pAddrSpace); -} - -static NV_STATUS __nvoc_thunk_Memory_memorymulticastfabricCheckMemInterUnmap(struct MemoryMulticastFabric *pMemory, NvBool bSubdeviceHandleProvided) { - return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), bSubdeviceHandleProvided); -} - -static NvBool __nvoc_thunk_RmResource_memorymulticastfabricShareCallback(struct MemoryMulticastFabric *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMulticastFabric_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RsResource_memorymulticastfabricMapTo(struct MemoryMulticastFabric *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset), pParams); -} - -static NvU32 __nvoc_thunk_RsResource_memorymulticastfabricGetRefCount(struct MemoryMulticastFabric *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_memorymulticastfabricAddAdditionalDependants(struct RsClient *pClient, struct MemoryMulticastFabric *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_memorymulticastfabricControl_Prologue(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMulticastFabric_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_memorymulticastfabricUnmapFrom(struct MemoryMulticastFabric *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_memorymulticastfabricControl_Epilogue(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMulticastFabric_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_Memory_memorymulticastfabricUnmap(struct MemoryMulticastFabric *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_Memory_memorymulticastfabricGetMemInterMapParams(struct MemoryMulticastFabric *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_Memory_memorymulticastfabricGetMemoryMappingDescriptor(struct MemoryMulticastFabric *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_memorymulticastfabricControlFilter(struct MemoryMulticastFabric *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_memorymulticastfabricControlSerialization_Prologue(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMulticastFabric_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_memorymulticastfabricIsPartialUnmapSupported(struct MemoryMulticastFabric *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_Memory_memorymulticastfabricCheckCopyPermissions(struct MemoryMulticastFabric *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return memCheckCopyPermissions((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pDstGpu, pDstDevice); -} - -static void __nvoc_thunk_RsResource_memorymulticastfabricPreDestruct(struct MemoryMulticastFabric *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_Memory_memorymulticastfabricIsDuplicate(struct MemoryMulticastFabric *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_memorymulticastfabricControlSerialization_Epilogue(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMulticastFabric_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_Memory_memorymulticastfabricMap(struct MemoryMulticastFabric *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_memorymulticastfabricAccessCallback(struct MemoryMulticastFabric *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MemoryMulticastFabric_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -204,12 +100,12 @@ static NvBool __nvoc_thunk_RmResource_memorymulticastfabricAccessCallback(struct static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryMulticastFabric[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memorymulticastfabricCtrlGetInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, /*accessRight=*/0x0u, /*methodId=*/ 0xfd0101u, /*paramSize=*/ sizeof(NV00FD_CTRL_GET_INFO_PARAMS), @@ -219,12 +115,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryMu #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memorymulticastfabricCtrlAttachMem_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0xfd0102u, /*paramSize=*/ sizeof(NV00FD_CTRL_ATTACH_MEM_PARAMS), @@ -234,12 +130,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryMu #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memorymulticastfabricCtrlRegisterEvent_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, /*accessRight=*/0x0u, /*methodId=*/ 0xfd0103u, /*paramSize=*/ sizeof(NV00FD_CTRL_REGISTER_EVENT_PARAMS), @@ -249,12 +145,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryMu #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memorymulticastfabricCtrlAttachGpu_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0xfd0104u, /*paramSize=*/ sizeof(NV00FD_CTRL_ATTACH_GPU_PARAMS), @@ -264,12 +160,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryMu #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memorymulticastfabricCtrlDetachMem_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0xfd0105u, /*paramSize=*/ sizeof(NV00FD_CTRL_DETACH_MEM_PARAMS), @@ -279,12 +175,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryMu #endif }, { /* [5] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memorymulticastfabricCtrlAttachRemoteGpu_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0xfd0106u, /*paramSize=*/ sizeof(NV00FD_CTRL_ATTACH_REMOTE_GPU_PARAMS), @@ -294,12 +190,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryMu #endif }, { /* [6] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memorymulticastfabricCtrlSetFailure_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, /*accessRight=*/0x0u, /*methodId=*/ 0xfd0107u, /*paramSize=*/ sizeof(NV00FD_CTRL_SET_FAILURE_PARAMS), @@ -311,6 +207,142 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryMu }; +// 6 down-thunk(s) defined to bridge methods in MemoryMulticastFabric from superclasses + +// memorymulticastfabricCanCopy: virtual override (res) base (mem) +static NvBool __nvoc_down_thunk_MemoryMulticastFabric_resCanCopy(struct RsResource *pMemoryMulticastFabric) { + return memorymulticastfabricCanCopy((struct MemoryMulticastFabric *)(((unsigned char *) pMemoryMulticastFabric) - __nvoc_rtti_MemoryMulticastFabric_RsResource.offset)); +} + +// memorymulticastfabricIsReady: virtual override (mem) base (mem) +static NV_STATUS __nvoc_down_thunk_MemoryMulticastFabric_memIsReady(struct Memory *pMemoryMulticastFabric, NvBool bCopyConstructorContext) { + return memorymulticastfabricIsReady((struct MemoryMulticastFabric *)(((unsigned char *) pMemoryMulticastFabric) - __nvoc_rtti_MemoryMulticastFabric_Memory.offset), bCopyConstructorContext); +} + +// memorymulticastfabricControl: virtual override (res) base (mem) +static NV_STATUS __nvoc_down_thunk_MemoryMulticastFabric_memControl(struct Memory *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memorymulticastfabricControl((struct MemoryMulticastFabric *)(((unsigned char *) pMemoryMulticastFabric) - __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pCallContext, pParams); +} + +// memorymulticastfabricIsGpuMapAllowed: virtual override (mem) base (mem) +static NvBool __nvoc_down_thunk_MemoryMulticastFabric_memIsGpuMapAllowed(struct Memory *pMemoryMulticastFabric, struct OBJGPU *pGpu) { + return memorymulticastfabricIsGpuMapAllowed((struct MemoryMulticastFabric *)(((unsigned char *) pMemoryMulticastFabric) - __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pGpu); +} + +// memorymulticastfabricIsExportAllowed: virtual override (mem) base (mem) +static NvBool __nvoc_down_thunk_MemoryMulticastFabric_memIsExportAllowed(struct Memory *pMemoryMulticastFabric) { + return memorymulticastfabricIsExportAllowed((struct MemoryMulticastFabric *)(((unsigned char *) pMemoryMulticastFabric) - __nvoc_rtti_MemoryMulticastFabric_Memory.offset)); +} + +// memorymulticastfabricGetMapAddrSpace: virtual override (mem) base (mem) +static NV_STATUS __nvoc_down_thunk_MemoryMulticastFabric_memGetMapAddrSpace(struct Memory *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return memorymulticastfabricGetMapAddrSpace((struct MemoryMulticastFabric *)(((unsigned char *) pMemoryMulticastFabric) - __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pCallContext, mapFlags, pAddrSpace); +} + + +// 20 up-thunk(s) defined to bridge methods in MemoryMulticastFabric to superclasses + +// memorymulticastfabricIsDuplicate: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricIsDuplicate(struct MemoryMulticastFabric *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), hMemory, pDuplicate); +} + +// memorymulticastfabricMap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricMap(struct MemoryMulticastFabric *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pCallContext, pParams, pCpuMapping); +} + +// memorymulticastfabricUnmap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricUnmap(struct MemoryMulticastFabric *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pCallContext, pCpuMapping); +} + +// memorymulticastfabricGetMemInterMapParams: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricGetMemInterMapParams(struct MemoryMulticastFabric *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pParams); +} + +// memorymulticastfabricCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricCheckMemInterUnmap(struct MemoryMulticastFabric *pMemory, NvBool bSubdeviceHandleProvided) { + return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), bSubdeviceHandleProvided); +} + +// memorymulticastfabricGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricGetMemoryMappingDescriptor(struct MemoryMulticastFabric *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), ppMemDesc); +} + +// memorymulticastfabricCheckCopyPermissions: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricCheckCopyPermissions(struct MemoryMulticastFabric *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pDstGpu, pDstDevice); +} + +// memorymulticastfabricAccessCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_memorymulticastfabricAccessCallback(struct MemoryMulticastFabric *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// memorymulticastfabricShareCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_memorymulticastfabricShareCallback(struct MemoryMulticastFabric *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// memorymulticastfabricControlSerialization_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_memorymulticastfabricControlSerialization_Prologue(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RmResource.offset), pCallContext, pParams); +} + +// memorymulticastfabricControlSerialization_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_memorymulticastfabricControlSerialization_Epilogue(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RmResource.offset), pCallContext, pParams); +} + +// memorymulticastfabricControl_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_memorymulticastfabricControl_Prologue(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RmResource.offset), pCallContext, pParams); +} + +// memorymulticastfabricControl_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_memorymulticastfabricControl_Epilogue(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RmResource.offset), pCallContext, pParams); +} + +// memorymulticastfabricPreDestruct: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_memorymulticastfabricPreDestruct(struct MemoryMulticastFabric *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset)); +} + +// memorymulticastfabricControlFilter: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_memorymulticastfabricControlFilter(struct MemoryMulticastFabric *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset), pCallContext, pParams); +} + +// memorymulticastfabricIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body +static NvBool __nvoc_up_thunk_RsResource_memorymulticastfabricIsPartialUnmapSupported(struct MemoryMulticastFabric *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset)); +} + +// memorymulticastfabricMapTo: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_memorymulticastfabricMapTo(struct MemoryMulticastFabric *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset), pParams); +} + +// memorymulticastfabricUnmapFrom: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_memorymulticastfabricUnmapFrom(struct MemoryMulticastFabric *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset), pParams); +} + +// memorymulticastfabricGetRefCount: virtual inherited (res) base (mem) +static NvU32 __nvoc_up_thunk_RsResource_memorymulticastfabricGetRefCount(struct MemoryMulticastFabric *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset)); +} + +// memorymulticastfabricAddAdditionalDependants: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_memorymulticastfabricAddAdditionalDependants(struct RsClient *pClient, struct MemoryMulticastFabric *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset), pReference); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_MemoryMulticastFabric = { /*numEntries=*/ 7, @@ -347,105 +379,138 @@ NV_STATUS __nvoc_ctor_MemoryMulticastFabric(MemoryMulticastFabric *pThis, CALL_C return status; } +// Vtable initialization static void __nvoc_init_funcTable_MemoryMulticastFabric_1(MemoryMulticastFabric *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // memorymulticastfabricCanCopy -- virtual override (res) base (mem) pThis->__memorymulticastfabricCanCopy__ = &memorymulticastfabricCanCopy_IMPL; + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryMulticastFabric_resCanCopy; + // memorymulticastfabricCopyConstruct -- virtual override (mem) base (mem) pThis->__memorymulticastfabricCopyConstruct__ = &memorymulticastfabricCopyConstruct_IMPL; + // memorymulticastfabricIsReady -- virtual override (mem) base (mem) pThis->__memorymulticastfabricIsReady__ = &memorymulticastfabricIsReady_IMPL; + pThis->__nvoc_base_Memory.__memIsReady__ = &__nvoc_down_thunk_MemoryMulticastFabric_memIsReady; + // memorymulticastfabricControl -- virtual override (res) base (mem) pThis->__memorymulticastfabricControl__ = &memorymulticastfabricControl_IMPL; + pThis->__nvoc_base_Memory.__memControl__ = &__nvoc_down_thunk_MemoryMulticastFabric_memControl; + // memorymulticastfabricIsGpuMapAllowed -- virtual override (mem) base (mem) pThis->__memorymulticastfabricIsGpuMapAllowed__ = &memorymulticastfabricIsGpuMapAllowed_IMPL; + pThis->__nvoc_base_Memory.__memIsGpuMapAllowed__ = &__nvoc_down_thunk_MemoryMulticastFabric_memIsGpuMapAllowed; + // memorymulticastfabricIsExportAllowed -- virtual override (mem) base (mem) pThis->__memorymulticastfabricIsExportAllowed__ = &memorymulticastfabricIsExportAllowed_IMPL; + pThis->__nvoc_base_Memory.__memIsExportAllowed__ = &__nvoc_down_thunk_MemoryMulticastFabric_memIsExportAllowed; + // memorymulticastfabricGetMapAddrSpace -- virtual override (mem) base (mem) pThis->__memorymulticastfabricGetMapAddrSpace__ = &memorymulticastfabricGetMapAddrSpace_IMPL; + pThis->__nvoc_base_Memory.__memGetMapAddrSpace__ = &__nvoc_down_thunk_MemoryMulticastFabric_memGetMapAddrSpace; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // memorymulticastfabricCtrlGetInfo -- exported (id=0xfd0101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__memorymulticastfabricCtrlGetInfo__ = &memorymulticastfabricCtrlGetInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // memorymulticastfabricCtrlAttachMem -- exported (id=0xfd0102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__memorymulticastfabricCtrlAttachMem__ = &memorymulticastfabricCtrlAttachMem_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // memorymulticastfabricCtrlDetachMem -- exported (id=0xfd0105) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__memorymulticastfabricCtrlDetachMem__ = &memorymulticastfabricCtrlDetachMem_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // memorymulticastfabricCtrlAttachGpu -- exported (id=0xfd0104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__memorymulticastfabricCtrlAttachGpu__ = &memorymulticastfabricCtrlAttachGpu_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // memorymulticastfabricCtrlRegisterEvent -- exported (id=0xfd0103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__memorymulticastfabricCtrlRegisterEvent__ = &memorymulticastfabricCtrlRegisterEvent_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // memorymulticastfabricCtrlAttachRemoteGpu -- exported (id=0xfd0106) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__memorymulticastfabricCtrlAttachRemoteGpu__ = &memorymulticastfabricCtrlAttachRemoteGpu_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // memorymulticastfabricCtrlSetFailure -- exported (id=0xfd0107) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__memorymulticastfabricCtrlSetFailure__ = &memorymulticastfabricCtrlSetFailure_IMPL; #endif - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_MemoryMulticastFabric_resCanCopy; + // memorymulticastfabricIsDuplicate -- virtual inherited (mem) base (mem) + pThis->__memorymulticastfabricIsDuplicate__ = &__nvoc_up_thunk_Memory_memorymulticastfabricIsDuplicate; - pThis->__nvoc_base_Memory.__memIsReady__ = &__nvoc_thunk_MemoryMulticastFabric_memIsReady; + // memorymulticastfabricMap -- virtual inherited (mem) base (mem) + pThis->__memorymulticastfabricMap__ = &__nvoc_up_thunk_Memory_memorymulticastfabricMap; - pThis->__nvoc_base_Memory.__memControl__ = &__nvoc_thunk_MemoryMulticastFabric_memControl; + // memorymulticastfabricUnmap -- virtual inherited (mem) base (mem) + pThis->__memorymulticastfabricUnmap__ = &__nvoc_up_thunk_Memory_memorymulticastfabricUnmap; - pThis->__nvoc_base_Memory.__memIsGpuMapAllowed__ = &__nvoc_thunk_MemoryMulticastFabric_memIsGpuMapAllowed; + // memorymulticastfabricGetMemInterMapParams -- virtual inherited (mem) base (mem) + pThis->__memorymulticastfabricGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_memorymulticastfabricGetMemInterMapParams; - pThis->__nvoc_base_Memory.__memIsExportAllowed__ = &__nvoc_thunk_MemoryMulticastFabric_memIsExportAllowed; + // memorymulticastfabricCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body + pThis->__memorymulticastfabricCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_memorymulticastfabricCheckMemInterUnmap; - pThis->__nvoc_base_Memory.__memGetMapAddrSpace__ = &__nvoc_thunk_MemoryMulticastFabric_memGetMapAddrSpace; + // memorymulticastfabricGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) + pThis->__memorymulticastfabricGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_memorymulticastfabricGetMemoryMappingDescriptor; - pThis->__memorymulticastfabricCheckMemInterUnmap__ = &__nvoc_thunk_Memory_memorymulticastfabricCheckMemInterUnmap; + // memorymulticastfabricCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body + pThis->__memorymulticastfabricCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_memorymulticastfabricCheckCopyPermissions; - pThis->__memorymulticastfabricShareCallback__ = &__nvoc_thunk_RmResource_memorymulticastfabricShareCallback; + // memorymulticastfabricAccessCallback -- virtual inherited (rmres) base (mem) + pThis->__memorymulticastfabricAccessCallback__ = &__nvoc_up_thunk_RmResource_memorymulticastfabricAccessCallback; - pThis->__memorymulticastfabricMapTo__ = &__nvoc_thunk_RsResource_memorymulticastfabricMapTo; + // memorymulticastfabricShareCallback -- virtual inherited (rmres) base (mem) + pThis->__memorymulticastfabricShareCallback__ = &__nvoc_up_thunk_RmResource_memorymulticastfabricShareCallback; - pThis->__memorymulticastfabricGetRefCount__ = &__nvoc_thunk_RsResource_memorymulticastfabricGetRefCount; + // memorymulticastfabricControlSerialization_Prologue -- virtual inherited (rmres) base (mem) + pThis->__memorymulticastfabricControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memorymulticastfabricControlSerialization_Prologue; - pThis->__memorymulticastfabricAddAdditionalDependants__ = &__nvoc_thunk_RsResource_memorymulticastfabricAddAdditionalDependants; + // memorymulticastfabricControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__memorymulticastfabricControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memorymulticastfabricControlSerialization_Epilogue; - pThis->__memorymulticastfabricControl_Prologue__ = &__nvoc_thunk_RmResource_memorymulticastfabricControl_Prologue; + // memorymulticastfabricControl_Prologue -- virtual inherited (rmres) base (mem) + pThis->__memorymulticastfabricControl_Prologue__ = &__nvoc_up_thunk_RmResource_memorymulticastfabricControl_Prologue; - pThis->__memorymulticastfabricUnmapFrom__ = &__nvoc_thunk_RsResource_memorymulticastfabricUnmapFrom; + // memorymulticastfabricControl_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__memorymulticastfabricControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memorymulticastfabricControl_Epilogue; - pThis->__memorymulticastfabricControl_Epilogue__ = &__nvoc_thunk_RmResource_memorymulticastfabricControl_Epilogue; + // memorymulticastfabricPreDestruct -- virtual inherited (res) base (mem) + pThis->__memorymulticastfabricPreDestruct__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricPreDestruct; - pThis->__memorymulticastfabricUnmap__ = &__nvoc_thunk_Memory_memorymulticastfabricUnmap; + // memorymulticastfabricControlFilter -- virtual inherited (res) base (mem) + pThis->__memorymulticastfabricControlFilter__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricControlFilter; - pThis->__memorymulticastfabricGetMemInterMapParams__ = &__nvoc_thunk_Memory_memorymulticastfabricGetMemInterMapParams; + // memorymulticastfabricIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body + pThis->__memorymulticastfabricIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricIsPartialUnmapSupported; - pThis->__memorymulticastfabricGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_memorymulticastfabricGetMemoryMappingDescriptor; + // memorymulticastfabricMapTo -- virtual inherited (res) base (mem) + pThis->__memorymulticastfabricMapTo__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricMapTo; - pThis->__memorymulticastfabricControlFilter__ = &__nvoc_thunk_RsResource_memorymulticastfabricControlFilter; + // memorymulticastfabricUnmapFrom -- virtual inherited (res) base (mem) + pThis->__memorymulticastfabricUnmapFrom__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricUnmapFrom; - pThis->__memorymulticastfabricControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_memorymulticastfabricControlSerialization_Prologue; + // memorymulticastfabricGetRefCount -- virtual inherited (res) base (mem) + pThis->__memorymulticastfabricGetRefCount__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricGetRefCount; - pThis->__memorymulticastfabricIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_memorymulticastfabricIsPartialUnmapSupported; + // memorymulticastfabricAddAdditionalDependants -- virtual inherited (res) base (mem) + pThis->__memorymulticastfabricAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricAddAdditionalDependants; +} // End __nvoc_init_funcTable_MemoryMulticastFabric_1 with approximately 40 basic block(s). - pThis->__memorymulticastfabricCheckCopyPermissions__ = &__nvoc_thunk_Memory_memorymulticastfabricCheckCopyPermissions; - - pThis->__memorymulticastfabricPreDestruct__ = &__nvoc_thunk_RsResource_memorymulticastfabricPreDestruct; - - pThis->__memorymulticastfabricIsDuplicate__ = &__nvoc_thunk_Memory_memorymulticastfabricIsDuplicate; - - pThis->__memorymulticastfabricControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_memorymulticastfabricControlSerialization_Epilogue; - - pThis->__memorymulticastfabricMap__ = &__nvoc_thunk_Memory_memorymulticastfabricMap; - - pThis->__memorymulticastfabricAccessCallback__ = &__nvoc_thunk_RmResource_memorymulticastfabricAccessCallback; -} +// Initialize vtable(s) for 34 virtual method(s). void __nvoc_init_funcTable_MemoryMulticastFabric(MemoryMulticastFabric *pThis) { + + // Initialize vtable(s) with 34 per-object function pointer(s). __nvoc_init_funcTable_MemoryMulticastFabric_1(pThis); } diff --git a/src/nvidia/generated/g_mem_multicast_fabric_nvoc.h b/src/nvidia/generated/g_mem_multicast_fabric_nvoc.h index 885ac0610a..8253e020d8 100644 --- a/src/nvidia/generated/g_mem_multicast_fabric_nvoc.h +++ b/src/nvidia/generated/g_mem_multicast_fabric_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_MEM_MULTICAST_FABRIC_NVOC_H_ #define _G_MEM_MULTICAST_FABRIC_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -36,6 +43,7 @@ extern "C" { * *****************************************************************************/ +#pragma once #include "g_mem_multicast_fabric_nvoc.h" #ifndef _MEMORYMULTICASTFABRIC_H_ @@ -66,49 +74,60 @@ typedef struct mem_multicast_fabric_descriptor MEM_MULTICAST_FABRIC_DESCRIPTOR; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct MemoryMulticastFabric { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Memory *__nvoc_pbase_Memory; - struct MemoryMulticastFabric *__nvoc_pbase_MemoryMulticastFabric; - NvBool (*__memorymulticastfabricCanCopy__)(struct MemoryMulticastFabric *); - NV_STATUS (*__memorymulticastfabricCopyConstruct__)(struct MemoryMulticastFabric *, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); - NV_STATUS (*__memorymulticastfabricIsReady__)(struct MemoryMulticastFabric *, NvBool); - NV_STATUS (*__memorymulticastfabricControl__)(struct MemoryMulticastFabric *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__memorymulticastfabricIsGpuMapAllowed__)(struct MemoryMulticastFabric *, struct OBJGPU *); - NvBool (*__memorymulticastfabricIsExportAllowed__)(struct MemoryMulticastFabric *); - NV_STATUS (*__memorymulticastfabricGetMapAddrSpace__)(struct MemoryMulticastFabric *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NV_STATUS (*__memorymulticastfabricCtrlGetInfo__)(struct MemoryMulticastFabric *, NV00FD_CTRL_GET_INFO_PARAMS *); - NV_STATUS (*__memorymulticastfabricCtrlAttachMem__)(struct MemoryMulticastFabric *, NV00FD_CTRL_ATTACH_MEM_PARAMS *); - NV_STATUS (*__memorymulticastfabricCtrlDetachMem__)(struct MemoryMulticastFabric *, NV00FD_CTRL_DETACH_MEM_PARAMS *); - NV_STATUS (*__memorymulticastfabricCtrlAttachGpu__)(struct MemoryMulticastFabric *, NV00FD_CTRL_ATTACH_GPU_PARAMS *); - NV_STATUS (*__memorymulticastfabricCtrlRegisterEvent__)(struct MemoryMulticastFabric *, NV00FD_CTRL_REGISTER_EVENT_PARAMS *); - NV_STATUS (*__memorymulticastfabricCtrlAttachRemoteGpu__)(struct MemoryMulticastFabric *, NV00FD_CTRL_ATTACH_REMOTE_GPU_PARAMS *); - NV_STATUS (*__memorymulticastfabricCtrlSetFailure__)(struct MemoryMulticastFabric *, NV00FD_CTRL_SET_FAILURE_PARAMS *); - NV_STATUS (*__memorymulticastfabricCheckMemInterUnmap__)(struct MemoryMulticastFabric *, NvBool); - NvBool (*__memorymulticastfabricShareCallback__)(struct MemoryMulticastFabric *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__memorymulticastfabricMapTo__)(struct MemoryMulticastFabric *, RS_RES_MAP_TO_PARAMS *); - NvU32 (*__memorymulticastfabricGetRefCount__)(struct MemoryMulticastFabric *); - void (*__memorymulticastfabricAddAdditionalDependants__)(struct RsClient *, struct MemoryMulticastFabric *, RsResourceRef *); - NV_STATUS (*__memorymulticastfabricControl_Prologue__)(struct MemoryMulticastFabric *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memorymulticastfabricUnmapFrom__)(struct MemoryMulticastFabric *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__memorymulticastfabricControl_Epilogue__)(struct MemoryMulticastFabric *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memorymulticastfabricUnmap__)(struct MemoryMulticastFabric *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__memorymulticastfabricGetMemInterMapParams__)(struct MemoryMulticastFabric *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__memorymulticastfabricGetMemoryMappingDescriptor__)(struct MemoryMulticastFabric *, MEMORY_DESCRIPTOR **); - NV_STATUS (*__memorymulticastfabricControlFilter__)(struct MemoryMulticastFabric *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memorymulticastfabricControlSerialization_Prologue__)(struct MemoryMulticastFabric *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__memorymulticastfabricIsPartialUnmapSupported__)(struct MemoryMulticastFabric *); - NV_STATUS (*__memorymulticastfabricCheckCopyPermissions__)(struct MemoryMulticastFabric *, struct OBJGPU *, struct Device *); - void (*__memorymulticastfabricPreDestruct__)(struct MemoryMulticastFabric *); - NV_STATUS (*__memorymulticastfabricIsDuplicate__)(struct MemoryMulticastFabric *, NvHandle, NvBool *); - void (*__memorymulticastfabricControlSerialization_Epilogue__)(struct MemoryMulticastFabric *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memorymulticastfabricMap__)(struct MemoryMulticastFabric *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__memorymulticastfabricAccessCallback__)(struct MemoryMulticastFabric *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct Memory *__nvoc_pbase_Memory; // mem super + struct MemoryMulticastFabric *__nvoc_pbase_MemoryMulticastFabric; // memorymulticastfabric + + // Vtable with 34 per-object function pointers + NvBool (*__memorymulticastfabricCanCopy__)(struct MemoryMulticastFabric * /*this*/); // virtual override (res) base (mem) + NV_STATUS (*__memorymulticastfabricCopyConstruct__)(struct MemoryMulticastFabric * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // virtual override (mem) base (mem) + NV_STATUS (*__memorymulticastfabricIsReady__)(struct MemoryMulticastFabric * /*this*/, NvBool); // virtual override (mem) base (mem) + NV_STATUS (*__memorymulticastfabricControl__)(struct MemoryMulticastFabric * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (mem) + NvBool (*__memorymulticastfabricIsGpuMapAllowed__)(struct MemoryMulticastFabric * /*this*/, struct OBJGPU *); // virtual override (mem) base (mem) + NvBool (*__memorymulticastfabricIsExportAllowed__)(struct MemoryMulticastFabric * /*this*/); // virtual override (mem) base (mem) + NV_STATUS (*__memorymulticastfabricGetMapAddrSpace__)(struct MemoryMulticastFabric * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (mem) base (mem) + NV_STATUS (*__memorymulticastfabricCtrlGetInfo__)(struct MemoryMulticastFabric * /*this*/, NV00FD_CTRL_GET_INFO_PARAMS *); // exported (id=0xfd0101) + NV_STATUS (*__memorymulticastfabricCtrlAttachMem__)(struct MemoryMulticastFabric * /*this*/, NV00FD_CTRL_ATTACH_MEM_PARAMS *); // exported (id=0xfd0102) + NV_STATUS (*__memorymulticastfabricCtrlDetachMem__)(struct MemoryMulticastFabric * /*this*/, NV00FD_CTRL_DETACH_MEM_PARAMS *); // exported (id=0xfd0105) + NV_STATUS (*__memorymulticastfabricCtrlAttachGpu__)(struct MemoryMulticastFabric * /*this*/, NV00FD_CTRL_ATTACH_GPU_PARAMS *); // exported (id=0xfd0104) + NV_STATUS (*__memorymulticastfabricCtrlRegisterEvent__)(struct MemoryMulticastFabric * /*this*/, NV00FD_CTRL_REGISTER_EVENT_PARAMS *); // exported (id=0xfd0103) + NV_STATUS (*__memorymulticastfabricCtrlAttachRemoteGpu__)(struct MemoryMulticastFabric * /*this*/, NV00FD_CTRL_ATTACH_REMOTE_GPU_PARAMS *); // exported (id=0xfd0106) + NV_STATUS (*__memorymulticastfabricCtrlSetFailure__)(struct MemoryMulticastFabric * /*this*/, NV00FD_CTRL_SET_FAILURE_PARAMS *); // exported (id=0xfd0107) + NV_STATUS (*__memorymulticastfabricIsDuplicate__)(struct MemoryMulticastFabric * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) + NV_STATUS (*__memorymulticastfabricMap__)(struct MemoryMulticastFabric * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__memorymulticastfabricUnmap__)(struct MemoryMulticastFabric * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__memorymulticastfabricGetMemInterMapParams__)(struct MemoryMulticastFabric * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (mem) base (mem) + NV_STATUS (*__memorymulticastfabricCheckMemInterUnmap__)(struct MemoryMulticastFabric * /*this*/, NvBool); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__memorymulticastfabricGetMemoryMappingDescriptor__)(struct MemoryMulticastFabric * /*this*/, MEMORY_DESCRIPTOR **); // virtual inherited (mem) base (mem) + NV_STATUS (*__memorymulticastfabricCheckCopyPermissions__)(struct MemoryMulticastFabric * /*this*/, struct OBJGPU *, struct Device *); // inline virtual inherited (mem) base (mem) body + NvBool (*__memorymulticastfabricAccessCallback__)(struct MemoryMulticastFabric * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (mem) + NvBool (*__memorymulticastfabricShareCallback__)(struct MemoryMulticastFabric * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__memorymulticastfabricControlSerialization_Prologue__)(struct MemoryMulticastFabric * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__memorymulticastfabricControlSerialization_Epilogue__)(struct MemoryMulticastFabric * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__memorymulticastfabricControl_Prologue__)(struct MemoryMulticastFabric * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__memorymulticastfabricControl_Epilogue__)(struct MemoryMulticastFabric * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__memorymulticastfabricPreDestruct__)(struct MemoryMulticastFabric * /*this*/); // virtual inherited (res) base (mem) + NV_STATUS (*__memorymulticastfabricControlFilter__)(struct MemoryMulticastFabric * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (mem) + NvBool (*__memorymulticastfabricIsPartialUnmapSupported__)(struct MemoryMulticastFabric * /*this*/); // inline virtual inherited (res) base (mem) body + NV_STATUS (*__memorymulticastfabricMapTo__)(struct MemoryMulticastFabric * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (mem) + NV_STATUS (*__memorymulticastfabricUnmapFrom__)(struct MemoryMulticastFabric * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (mem) + NvU32 (*__memorymulticastfabricGetRefCount__)(struct MemoryMulticastFabric * /*this*/); // virtual inherited (res) base (mem) + void (*__memorymulticastfabricAddAdditionalDependants__)(struct RsClient *, struct MemoryMulticastFabric * /*this*/, RsResourceRef *); // virtual inherited (res) base (mem) + + // Data members NvU16 expNodeId; NvBool bImported; MEM_MULTICAST_FABRIC_DESCRIPTOR *PRIVATE_FIELD(pMulticastFabricDesc); @@ -123,6 +142,7 @@ typedef struct MemoryMulticastFabric MemoryMulticastFabric; #define __nvoc_class_id_MemoryMulticastFabric 0x130210 #endif /* __nvoc_class_id_MemoryMulticastFabric */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryMulticastFabric; #define __staticCast_MemoryMulticastFabric(pThis) \ @@ -135,211 +155,248 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryMulticastFabric; ((MemoryMulticastFabric*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(MemoryMulticastFabric))) #endif //__nvoc_mem_multicast_fabric_h_disabled - NV_STATUS __nvoc_objCreateDynamic_MemoryMulticastFabric(MemoryMulticastFabric**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_MemoryMulticastFabric(MemoryMulticastFabric**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_MemoryMulticastFabric(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_MemoryMulticastFabric((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define memorymulticastfabricCanCopy_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricCanCopy__ #define memorymulticastfabricCanCopy(pMemoryMulticastFabric) memorymulticastfabricCanCopy_DISPATCH(pMemoryMulticastFabric) +#define memorymulticastfabricCopyConstruct_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricCopyConstruct__ #define memorymulticastfabricCopyConstruct(pMemoryMulticastFabric, pCallContext, pParams) memorymulticastfabricCopyConstruct_DISPATCH(pMemoryMulticastFabric, pCallContext, pParams) +#define memorymulticastfabricIsReady_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricIsReady__ #define memorymulticastfabricIsReady(pMemoryMulticastFabric, bCopyConstructorContext) memorymulticastfabricIsReady_DISPATCH(pMemoryMulticastFabric, bCopyConstructorContext) +#define memorymulticastfabricControl_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricControl__ #define memorymulticastfabricControl(pMemoryMulticastFabric, pCallContext, pParams) memorymulticastfabricControl_DISPATCH(pMemoryMulticastFabric, pCallContext, pParams) +#define memorymulticastfabricIsGpuMapAllowed_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricIsGpuMapAllowed__ #define memorymulticastfabricIsGpuMapAllowed(pMemoryMulticastFabric, pGpu) memorymulticastfabricIsGpuMapAllowed_DISPATCH(pMemoryMulticastFabric, pGpu) +#define memorymulticastfabricIsExportAllowed_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricIsExportAllowed__ #define memorymulticastfabricIsExportAllowed(pMemoryMulticastFabric) memorymulticastfabricIsExportAllowed_DISPATCH(pMemoryMulticastFabric) +#define memorymulticastfabricGetMapAddrSpace_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricGetMapAddrSpace__ #define memorymulticastfabricGetMapAddrSpace(pMemoryMulticastFabric, pCallContext, mapFlags, pAddrSpace) memorymulticastfabricGetMapAddrSpace_DISPATCH(pMemoryMulticastFabric, pCallContext, mapFlags, pAddrSpace) +#define memorymulticastfabricCtrlGetInfo_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricCtrlGetInfo__ #define memorymulticastfabricCtrlGetInfo(pMemoryMulticastFabric, pParams) memorymulticastfabricCtrlGetInfo_DISPATCH(pMemoryMulticastFabric, pParams) +#define memorymulticastfabricCtrlAttachMem_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricCtrlAttachMem__ #define memorymulticastfabricCtrlAttachMem(pMemoryMulticastFabric, pParams) memorymulticastfabricCtrlAttachMem_DISPATCH(pMemoryMulticastFabric, pParams) +#define memorymulticastfabricCtrlDetachMem_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricCtrlDetachMem__ #define memorymulticastfabricCtrlDetachMem(pMemoryMulticastFabric, pParams) memorymulticastfabricCtrlDetachMem_DISPATCH(pMemoryMulticastFabric, pParams) +#define memorymulticastfabricCtrlAttachGpu_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricCtrlAttachGpu__ #define memorymulticastfabricCtrlAttachGpu(pMemoryMulticastFabric, pParams) memorymulticastfabricCtrlAttachGpu_DISPATCH(pMemoryMulticastFabric, pParams) +#define memorymulticastfabricCtrlRegisterEvent_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricCtrlRegisterEvent__ #define memorymulticastfabricCtrlRegisterEvent(pMemoryMulticastFabric, pParams) memorymulticastfabricCtrlRegisterEvent_DISPATCH(pMemoryMulticastFabric, pParams) +#define memorymulticastfabricCtrlAttachRemoteGpu_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricCtrlAttachRemoteGpu__ #define memorymulticastfabricCtrlAttachRemoteGpu(pMemoryMulticastFabric, pParams) memorymulticastfabricCtrlAttachRemoteGpu_DISPATCH(pMemoryMulticastFabric, pParams) +#define memorymulticastfabricCtrlSetFailure_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricCtrlSetFailure__ #define memorymulticastfabricCtrlSetFailure(pMemoryMulticastFabric, pParams) memorymulticastfabricCtrlSetFailure_DISPATCH(pMemoryMulticastFabric, pParams) +#define memorymulticastfabricIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define memorymulticastfabricIsDuplicate(pMemory, hMemory, pDuplicate) memorymulticastfabricIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) +#define memorymulticastfabricMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define memorymulticastfabricMap(pMemory, pCallContext, pParams, pCpuMapping) memorymulticastfabricMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define memorymulticastfabricUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ +#define memorymulticastfabricUnmap(pMemory, pCallContext, pCpuMapping) memorymulticastfabricUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) +#define memorymulticastfabricGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ +#define memorymulticastfabricGetMemInterMapParams(pMemory, pParams) memorymulticastfabricGetMemInterMapParams_DISPATCH(pMemory, pParams) +#define memorymulticastfabricCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ #define memorymulticastfabricCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) memorymulticastfabricCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) +#define memorymulticastfabricGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define memorymulticastfabricGetMemoryMappingDescriptor(pMemory, ppMemDesc) memorymulticastfabricGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) +#define memorymulticastfabricCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ +#define memorymulticastfabricCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) memorymulticastfabricCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) +#define memorymulticastfabricAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define memorymulticastfabricAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memorymulticastfabricAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define memorymulticastfabricShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ #define memorymulticastfabricShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) memorymulticastfabricShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define memorymulticastfabricMapTo(pResource, pParams) memorymulticastfabricMapTo_DISPATCH(pResource, pParams) -#define memorymulticastfabricGetRefCount(pResource) memorymulticastfabricGetRefCount_DISPATCH(pResource) -#define memorymulticastfabricAddAdditionalDependants(pClient, pResource, pReference) memorymulticastfabricAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define memorymulticastfabricControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define memorymulticastfabricControlSerialization_Prologue(pResource, pCallContext, pParams) memorymulticastfabricControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define memorymulticastfabricControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define memorymulticastfabricControlSerialization_Epilogue(pResource, pCallContext, pParams) memorymulticastfabricControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define memorymulticastfabricControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ #define memorymulticastfabricControl_Prologue(pResource, pCallContext, pParams) memorymulticastfabricControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memorymulticastfabricUnmapFrom(pResource, pParams) memorymulticastfabricUnmapFrom_DISPATCH(pResource, pParams) +#define memorymulticastfabricControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ #define memorymulticastfabricControl_Epilogue(pResource, pCallContext, pParams) memorymulticastfabricControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memorymulticastfabricUnmap(pMemory, pCallContext, pCpuMapping) memorymulticastfabricUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define memorymulticastfabricGetMemInterMapParams(pMemory, pParams) memorymulticastfabricGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define memorymulticastfabricGetMemoryMappingDescriptor(pMemory, ppMemDesc) memorymulticastfabricGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) +#define memorymulticastfabricPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define memorymulticastfabricPreDestruct(pResource) memorymulticastfabricPreDestruct_DISPATCH(pResource) +#define memorymulticastfabricControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ #define memorymulticastfabricControlFilter(pResource, pCallContext, pParams) memorymulticastfabricControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define memorymulticastfabricControlSerialization_Prologue(pResource, pCallContext, pParams) memorymulticastfabricControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define memorymulticastfabricIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ #define memorymulticastfabricIsPartialUnmapSupported(pResource) memorymulticastfabricIsPartialUnmapSupported_DISPATCH(pResource) -#define memorymulticastfabricCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) memorymulticastfabricCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define memorymulticastfabricPreDestruct(pResource) memorymulticastfabricPreDestruct_DISPATCH(pResource) -#define memorymulticastfabricIsDuplicate(pMemory, hMemory, pDuplicate) memorymulticastfabricIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define memorymulticastfabricControlSerialization_Epilogue(pResource, pCallContext, pParams) memorymulticastfabricControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memorymulticastfabricMap(pMemory, pCallContext, pParams, pCpuMapping) memorymulticastfabricMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define memorymulticastfabricAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memorymulticastfabricAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool memorymulticastfabricCanCopy_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric); +#define memorymulticastfabricMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define memorymulticastfabricMapTo(pResource, pParams) memorymulticastfabricMapTo_DISPATCH(pResource, pParams) +#define memorymulticastfabricUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define memorymulticastfabricUnmapFrom(pResource, pParams) memorymulticastfabricUnmapFrom_DISPATCH(pResource, pParams) +#define memorymulticastfabricGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define memorymulticastfabricGetRefCount(pResource) memorymulticastfabricGetRefCount_DISPATCH(pResource) +#define memorymulticastfabricAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define memorymulticastfabricAddAdditionalDependants(pClient, pResource, pReference) memorymulticastfabricAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NvBool memorymulticastfabricCanCopy_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric) { return pMemoryMulticastFabric->__memorymulticastfabricCanCopy__(pMemoryMulticastFabric); } -NV_STATUS memorymulticastfabricCopyConstruct_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); - static inline NV_STATUS memorymulticastfabricCopyConstruct_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { return pMemoryMulticastFabric->__memorymulticastfabricCopyConstruct__(pMemoryMulticastFabric, pCallContext, pParams); } -NV_STATUS memorymulticastfabricIsReady_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, NvBool bCopyConstructorContext); - static inline NV_STATUS memorymulticastfabricIsReady_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric, NvBool bCopyConstructorContext) { return pMemoryMulticastFabric->__memorymulticastfabricIsReady__(pMemoryMulticastFabric, bCopyConstructorContext); } -NV_STATUS memorymulticastfabricControl_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline NV_STATUS memorymulticastfabricControl_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pMemoryMulticastFabric->__memorymulticastfabricControl__(pMemoryMulticastFabric, pCallContext, pParams); } -NvBool memorymulticastfabricIsGpuMapAllowed_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, struct OBJGPU *pGpu); - static inline NvBool memorymulticastfabricIsGpuMapAllowed_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric, struct OBJGPU *pGpu) { return pMemoryMulticastFabric->__memorymulticastfabricIsGpuMapAllowed__(pMemoryMulticastFabric, pGpu); } -NvBool memorymulticastfabricIsExportAllowed_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric); - static inline NvBool memorymulticastfabricIsExportAllowed_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric) { return pMemoryMulticastFabric->__memorymulticastfabricIsExportAllowed__(pMemoryMulticastFabric); } -NV_STATUS memorymulticastfabricGetMapAddrSpace_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); - static inline NV_STATUS memorymulticastfabricGetMapAddrSpace_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pMemoryMulticastFabric->__memorymulticastfabricGetMapAddrSpace__(pMemoryMulticastFabric, pCallContext, mapFlags, pAddrSpace); } -NV_STATUS memorymulticastfabricCtrlGetInfo_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_GET_INFO_PARAMS *pParams); - static inline NV_STATUS memorymulticastfabricCtrlGetInfo_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_GET_INFO_PARAMS *pParams) { return pMemoryMulticastFabric->__memorymulticastfabricCtrlGetInfo__(pMemoryMulticastFabric, pParams); } -NV_STATUS memorymulticastfabricCtrlAttachMem_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_ATTACH_MEM_PARAMS *pParams); - static inline NV_STATUS memorymulticastfabricCtrlAttachMem_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_ATTACH_MEM_PARAMS *pParams) { return pMemoryMulticastFabric->__memorymulticastfabricCtrlAttachMem__(pMemoryMulticastFabric, pParams); } -NV_STATUS memorymulticastfabricCtrlDetachMem_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_DETACH_MEM_PARAMS *pParams); - static inline NV_STATUS memorymulticastfabricCtrlDetachMem_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_DETACH_MEM_PARAMS *pParams) { return pMemoryMulticastFabric->__memorymulticastfabricCtrlDetachMem__(pMemoryMulticastFabric, pParams); } -NV_STATUS memorymulticastfabricCtrlAttachGpu_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_ATTACH_GPU_PARAMS *pParams); - static inline NV_STATUS memorymulticastfabricCtrlAttachGpu_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_ATTACH_GPU_PARAMS *pParams) { return pMemoryMulticastFabric->__memorymulticastfabricCtrlAttachGpu__(pMemoryMulticastFabric, pParams); } -NV_STATUS memorymulticastfabricCtrlRegisterEvent_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_REGISTER_EVENT_PARAMS *pParams); - static inline NV_STATUS memorymulticastfabricCtrlRegisterEvent_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_REGISTER_EVENT_PARAMS *pParams) { return pMemoryMulticastFabric->__memorymulticastfabricCtrlRegisterEvent__(pMemoryMulticastFabric, pParams); } -NV_STATUS memorymulticastfabricCtrlAttachRemoteGpu_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_ATTACH_REMOTE_GPU_PARAMS *pParams); - static inline NV_STATUS memorymulticastfabricCtrlAttachRemoteGpu_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_ATTACH_REMOTE_GPU_PARAMS *pParams) { return pMemoryMulticastFabric->__memorymulticastfabricCtrlAttachRemoteGpu__(pMemoryMulticastFabric, pParams); } -NV_STATUS memorymulticastfabricCtrlSetFailure_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_SET_FAILURE_PARAMS *pParams); - static inline NV_STATUS memorymulticastfabricCtrlSetFailure_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_SET_FAILURE_PARAMS *pParams) { return pMemoryMulticastFabric->__memorymulticastfabricCtrlSetFailure__(pMemoryMulticastFabric, pParams); } -static inline NV_STATUS memorymulticastfabricCheckMemInterUnmap_DISPATCH(struct MemoryMulticastFabric *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__memorymulticastfabricCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); +static inline NV_STATUS memorymulticastfabricIsDuplicate_DISPATCH(struct MemoryMulticastFabric *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return pMemory->__memorymulticastfabricIsDuplicate__(pMemory, hMemory, pDuplicate); } -static inline NvBool memorymulticastfabricShareCallback_DISPATCH(struct MemoryMulticastFabric *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__memorymulticastfabricShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS memorymulticastfabricMap_DISPATCH(struct MemoryMulticastFabric *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pMemory->__memorymulticastfabricMap__(pMemory, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS memorymulticastfabricMapTo_DISPATCH(struct MemoryMulticastFabric *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__memorymulticastfabricMapTo__(pResource, pParams); +static inline NV_STATUS memorymulticastfabricUnmap_DISPATCH(struct MemoryMulticastFabric *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pMemory->__memorymulticastfabricUnmap__(pMemory, pCallContext, pCpuMapping); } -static inline NvU32 memorymulticastfabricGetRefCount_DISPATCH(struct MemoryMulticastFabric *pResource) { - return pResource->__memorymulticastfabricGetRefCount__(pResource); +static inline NV_STATUS memorymulticastfabricGetMemInterMapParams_DISPATCH(struct MemoryMulticastFabric *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pMemory->__memorymulticastfabricGetMemInterMapParams__(pMemory, pParams); } -static inline void memorymulticastfabricAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryMulticastFabric *pResource, RsResourceRef *pReference) { - pResource->__memorymulticastfabricAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS memorymulticastfabricCheckMemInterUnmap_DISPATCH(struct MemoryMulticastFabric *pMemory, NvBool bSubdeviceHandleProvided) { + return pMemory->__memorymulticastfabricCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } -static inline NV_STATUS memorymulticastfabricControl_Prologue_DISPATCH(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memorymulticastfabricControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS memorymulticastfabricGetMemoryMappingDescriptor_DISPATCH(struct MemoryMulticastFabric *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return pMemory->__memorymulticastfabricGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } -static inline NV_STATUS memorymulticastfabricUnmapFrom_DISPATCH(struct MemoryMulticastFabric *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__memorymulticastfabricUnmapFrom__(pResource, pParams); +static inline NV_STATUS memorymulticastfabricCheckCopyPermissions_DISPATCH(struct MemoryMulticastFabric *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return pMemory->__memorymulticastfabricCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } -static inline void memorymulticastfabricControl_Epilogue_DISPATCH(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memorymulticastfabricControl_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool memorymulticastfabricAccessCallback_DISPATCH(struct MemoryMulticastFabric *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__memorymulticastfabricAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS memorymulticastfabricUnmap_DISPATCH(struct MemoryMulticastFabric *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__memorymulticastfabricUnmap__(pMemory, pCallContext, pCpuMapping); +static inline NvBool memorymulticastfabricShareCallback_DISPATCH(struct MemoryMulticastFabric *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__memorymulticastfabricShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline NV_STATUS memorymulticastfabricGetMemInterMapParams_DISPATCH(struct MemoryMulticastFabric *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__memorymulticastfabricGetMemInterMapParams__(pMemory, pParams); +static inline NV_STATUS memorymulticastfabricControlSerialization_Prologue_DISPATCH(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__memorymulticastfabricControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS memorymulticastfabricGetMemoryMappingDescriptor_DISPATCH(struct MemoryMulticastFabric *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__memorymulticastfabricGetMemoryMappingDescriptor__(pMemory, ppMemDesc); +static inline void memorymulticastfabricControlSerialization_Epilogue_DISPATCH(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__memorymulticastfabricControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS memorymulticastfabricControlFilter_DISPATCH(struct MemoryMulticastFabric *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memorymulticastfabricControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS memorymulticastfabricControl_Prologue_DISPATCH(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__memorymulticastfabricControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS memorymulticastfabricControlSerialization_Prologue_DISPATCH(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memorymulticastfabricControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline void memorymulticastfabricControl_Epilogue_DISPATCH(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__memorymulticastfabricControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NvBool memorymulticastfabricIsPartialUnmapSupported_DISPATCH(struct MemoryMulticastFabric *pResource) { - return pResource->__memorymulticastfabricIsPartialUnmapSupported__(pResource); +static inline void memorymulticastfabricPreDestruct_DISPATCH(struct MemoryMulticastFabric *pResource) { + pResource->__memorymulticastfabricPreDestruct__(pResource); } -static inline NV_STATUS memorymulticastfabricCheckCopyPermissions_DISPATCH(struct MemoryMulticastFabric *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__memorymulticastfabricCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); +static inline NV_STATUS memorymulticastfabricControlFilter_DISPATCH(struct MemoryMulticastFabric *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__memorymulticastfabricControlFilter__(pResource, pCallContext, pParams); } -static inline void memorymulticastfabricPreDestruct_DISPATCH(struct MemoryMulticastFabric *pResource) { - pResource->__memorymulticastfabricPreDestruct__(pResource); +static inline NvBool memorymulticastfabricIsPartialUnmapSupported_DISPATCH(struct MemoryMulticastFabric *pResource) { + return pResource->__memorymulticastfabricIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS memorymulticastfabricIsDuplicate_DISPATCH(struct MemoryMulticastFabric *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__memorymulticastfabricIsDuplicate__(pMemory, hMemory, pDuplicate); +static inline NV_STATUS memorymulticastfabricMapTo_DISPATCH(struct MemoryMulticastFabric *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__memorymulticastfabricMapTo__(pResource, pParams); } -static inline void memorymulticastfabricControlSerialization_Epilogue_DISPATCH(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memorymulticastfabricControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS memorymulticastfabricUnmapFrom_DISPATCH(struct MemoryMulticastFabric *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__memorymulticastfabricUnmapFrom__(pResource, pParams); } -static inline NV_STATUS memorymulticastfabricMap_DISPATCH(struct MemoryMulticastFabric *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__memorymulticastfabricMap__(pMemory, pCallContext, pParams, pCpuMapping); +static inline NvU32 memorymulticastfabricGetRefCount_DISPATCH(struct MemoryMulticastFabric *pResource) { + return pResource->__memorymulticastfabricGetRefCount__(pResource); } -static inline NvBool memorymulticastfabricAccessCallback_DISPATCH(struct MemoryMulticastFabric *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__memorymulticastfabricAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline void memorymulticastfabricAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryMulticastFabric *pResource, RsResourceRef *pReference) { + pResource->__memorymulticastfabricAddAdditionalDependants__(pClient, pResource, pReference); } +NvBool memorymulticastfabricCanCopy_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric); + +NV_STATUS memorymulticastfabricCopyConstruct_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); + +NV_STATUS memorymulticastfabricIsReady_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, NvBool bCopyConstructorContext); + +NV_STATUS memorymulticastfabricControl_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +NvBool memorymulticastfabricIsGpuMapAllowed_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, struct OBJGPU *pGpu); + +NvBool memorymulticastfabricIsExportAllowed_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric); + +NV_STATUS memorymulticastfabricGetMapAddrSpace_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); + +NV_STATUS memorymulticastfabricCtrlGetInfo_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_GET_INFO_PARAMS *pParams); + +NV_STATUS memorymulticastfabricCtrlAttachMem_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_ATTACH_MEM_PARAMS *pParams); + +NV_STATUS memorymulticastfabricCtrlDetachMem_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_DETACH_MEM_PARAMS *pParams); + +NV_STATUS memorymulticastfabricCtrlAttachGpu_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_ATTACH_GPU_PARAMS *pParams); + +NV_STATUS memorymulticastfabricCtrlRegisterEvent_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_REGISTER_EVENT_PARAMS *pParams); + +NV_STATUS memorymulticastfabricCtrlAttachRemoteGpu_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_ATTACH_REMOTE_GPU_PARAMS *pParams); + +NV_STATUS memorymulticastfabricCtrlSetFailure_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_SET_FAILURE_PARAMS *pParams); + NV_STATUS memorymulticastfabricConstruct_IMPL(struct MemoryMulticastFabric *arg_pMemoryMulticastFabric, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_memorymulticastfabricConstruct(arg_pMemoryMulticastFabric, arg_pCallContext, arg_pParams) memorymulticastfabricConstruct_IMPL(arg_pMemoryMulticastFabric, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_mem_nvoc.c b/src/nvidia/generated/g_mem_nvoc.c index 385c1175a8..a331122ba0 100644 --- a/src/nvidia/generated/g_mem_nvoc.c +++ b/src/nvidia/generated/g_mem_nvoc.c @@ -84,90 +84,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_Memory = /*pExportInfo=*/ &__nvoc_export_info_Memory }; -static NV_STATUS __nvoc_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) - __nvoc_rtti_Memory_RsResource.offset), hMemory, pDuplicate); -} - -static NV_STATUS __nvoc_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memControl((struct Memory *)(((unsigned char *)pMemory) - __nvoc_rtti_Memory_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return memMap((struct Memory *)(((unsigned char *)pMemory) - __nvoc_rtti_Memory_RsResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return memUnmap((struct Memory *)(((unsigned char *)pMemory) - __nvoc_rtti_Memory_RsResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) - __nvoc_rtti_Memory_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided) { - return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) - __nvoc_rtti_Memory_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) - __nvoc_rtti_Memory_RmResource.offset), ppMemDesc); -} - -static NvBool __nvoc_thunk_RmResource_memShareCallback(struct Memory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Memory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NvU32 __nvoc_thunk_RsResource_memGetRefCount(struct Memory *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Memory_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Memory_RsResource.offset), pCallContext, pParams); -} - -static void __nvoc_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Memory_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Memory_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Memory_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_memCanCopy(struct Memory *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Memory_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Memory_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_memPreDestruct(struct Memory *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Memory_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Memory_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Memory_RmResource.offset), pCallContext, pParams); -} - -static void __nvoc_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Memory_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Memory_RsResource.offset), pParams); -} - -static NvBool __nvoc_thunk_RmResource_memAccessCallback(struct Memory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Memory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -190,12 +106,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Memory[] #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memCtrlCmdGetSurfaceInfoLvm_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x410110u, /*paramSize=*/ sizeof(NV0041_CTRL_GET_SURFACE_INFO_PARAMS), @@ -205,12 +121,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Memory[] #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2010u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memCtrlCmdGetSurfaceCompressionCoverageLvm_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2010u) - /*flags=*/ 0x2010u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) + /*flags=*/ 0x208u, /*accessRight=*/0x0u, /*methodId=*/ 0x410112u, /*paramSize=*/ sizeof(NV0041_CTRL_GET_SURFACE_COMPRESSION_COVERAGE_PARAMS), @@ -220,12 +136,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Memory[] #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memCtrlCmdSurfaceFlushGpuCache_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x410116u, /*paramSize=*/ sizeof(NV0041_CTRL_SURFACE_FLUSH_GPU_CACHE_PARAMS), @@ -235,12 +151,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Memory[] #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memCtrlCmdGetMemPageSize_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x410118u, /*paramSize=*/ sizeof(NV0041_CTRL_GET_MEM_PAGE_SIZE_PARAMS), @@ -250,12 +166,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Memory[] #endif }, { /* [5] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memCtrlCmdSetTag_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x410120u, /*paramSize=*/ sizeof(NV0041_CTRL_CMD_SET_TAG_PARAMS), @@ -265,12 +181,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Memory[] #endif }, { /* [6] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) memCtrlCmdGetTag_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x410121u, /*paramSize=*/ sizeof(NV0041_CTRL_CMD_GET_TAG_PARAMS), @@ -282,6 +198,117 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Memory[] }; +// 7 down-thunk(s) defined to bridge methods in Memory from superclasses + +// memIsDuplicate: virtual override (res) base (rmres) +static NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) - __nvoc_rtti_Memory_RsResource.offset), hMemory, pDuplicate); +} + +// memControl: virtual override (res) base (rmres) +static NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memControl((struct Memory *)(((unsigned char *) pMemory) - __nvoc_rtti_Memory_RsResource.offset), pCallContext, pParams); +} + +// memMap: virtual override (res) base (rmres) +static NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return memMap((struct Memory *)(((unsigned char *) pMemory) - __nvoc_rtti_Memory_RsResource.offset), pCallContext, pParams, pCpuMapping); +} + +// memUnmap: virtual override (res) base (rmres) +static NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return memUnmap((struct Memory *)(((unsigned char *) pMemory) - __nvoc_rtti_Memory_RsResource.offset), pCallContext, pCpuMapping); +} + +// memGetMemInterMapParams: virtual override (rmres) base (rmres) +static NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) - __nvoc_rtti_Memory_RmResource.offset), pParams); +} + +// memCheckMemInterUnmap: inline virtual override (rmres) base (rmres) body +static NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided) { + return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) - __nvoc_rtti_Memory_RmResource.offset), bSubdeviceHandleProvided); +} + +// memGetMemoryMappingDescriptor: virtual override (rmres) base (rmres) +static NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) - __nvoc_rtti_Memory_RmResource.offset), ppMemDesc); +} + + +// 14 up-thunk(s) defined to bridge methods in Memory to superclasses + +// memAccessCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// memShareCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// memControlSerialization_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RmResource.offset), pCallContext, pParams); +} + +// memControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RmResource.offset), pCallContext, pParams); +} + +// memControl_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RmResource.offset), pCallContext, pParams); +} + +// memControl_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RmResource.offset), pCallContext, pParams); +} + +// memCanCopy: virtual inherited (res) base (rmres) +static NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RsResource.offset)); +} + +// memPreDestruct: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RsResource.offset)); +} + +// memControlFilter: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RsResource.offset), pCallContext, pParams); +} + +// memIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body +static NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RsResource.offset)); +} + +// memMapTo: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RsResource.offset), pParams); +} + +// memUnmapFrom: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RsResource.offset), pParams); +} + +// memGetRefCount: virtual inherited (res) base (rmres) +static NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RsResource.offset)); +} + +// memAddAdditionalDependants: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RsResource.offset), pReference); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_Memory = { /*numEntries=*/ 7, @@ -318,105 +345,136 @@ NV_STATUS __nvoc_ctor_Memory(Memory *pThis, CALL_CONTEXT * arg_pCallContext, str return status; } +// Vtable initialization static void __nvoc_init_funcTable_Memory_1(Memory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // memIsDuplicate -- virtual override (res) base (rmres) pThis->__memIsDuplicate__ = &memIsDuplicate_IMPL; + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate; + // memGetMapAddrSpace -- virtual pThis->__memGetMapAddrSpace__ = &memGetMapAddrSpace_IMPL; + // memControl -- virtual override (res) base (rmres) pThis->__memControl__ = &memControl_IMPL; + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl; + // memMap -- virtual override (res) base (rmres) pThis->__memMap__ = &memMap_IMPL; + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap; + // memUnmap -- virtual override (res) base (rmres) pThis->__memUnmap__ = &memUnmap_IMPL; + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap; + // memGetMemInterMapParams -- virtual override (rmres) base (rmres) pThis->__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL; + pThis->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams; + // memCheckMemInterUnmap -- inline virtual override (rmres) base (rmres) body pThis->__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694; + pThis->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap; + // memGetMemoryMappingDescriptor -- virtual override (rmres) base (rmres) pThis->__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL; + pThis->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor; + // memCheckCopyPermissions -- inline virtual body pThis->__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694; + // memIsReady -- virtual pThis->__memIsReady__ = &memIsReady_IMPL; + // memIsGpuMapAllowed -- inline virtual body pThis->__memIsGpuMapAllowed__ = &memIsGpuMapAllowed_0c883b; + // memIsExportAllowed -- inline virtual body pThis->__memIsExportAllowed__ = &memIsExportAllowed_0c883b; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2010u) + // memCtrlCmdGetSurfaceCompressionCoverageLvm -- exported (id=0x410112) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) pThis->__memCtrlCmdGetSurfaceCompressionCoverageLvm__ = &memCtrlCmdGetSurfaceCompressionCoverageLvm_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // memCtrlCmdGetSurfaceInfoLvm -- exported (id=0x410110) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__memCtrlCmdGetSurfaceInfoLvm__ = &memCtrlCmdGetSurfaceInfoLvm_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // memCtrlCmdSurfaceFlushGpuCache -- exported (id=0x410116) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__memCtrlCmdSurfaceFlushGpuCache__ = &memCtrlCmdSurfaceFlushGpuCache_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // memCtrlCmdGetMemPageSize -- exported (id=0x410118) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__memCtrlCmdGetMemPageSize__ = &memCtrlCmdGetMemPageSize_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // memCtrlCmdSetTag -- exported (id=0x410120) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__memCtrlCmdSetTag__ = &memCtrlCmdSetTag_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // memCtrlCmdGetTag -- exported (id=0x410121) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__memCtrlCmdGetTag__ = &memCtrlCmdGetTag_IMPL; #endif + // memCtrlCmdGetSurfacePhysAttrLvm -- exported (id=0x410103) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__memCtrlCmdGetSurfacePhysAttrLvm__ = &memCtrlCmdGetSurfacePhysAttrLvm_IMPL; #endif - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ = &__nvoc_thunk_Memory_resIsDuplicate; - - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ = &__nvoc_thunk_Memory_resControl; - - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ = &__nvoc_thunk_Memory_resMap; + // memAccessCallback -- virtual inherited (rmres) base (rmres) + pThis->__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback; - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ = &__nvoc_thunk_Memory_resUnmap; + // memShareCallback -- virtual inherited (rmres) base (rmres) + pThis->__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback; - pThis->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ = &__nvoc_thunk_Memory_rmresGetMemInterMapParams; + // memControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue; - pThis->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_thunk_Memory_rmresCheckMemInterUnmap; + // memControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue; - pThis->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_rmresGetMemoryMappingDescriptor; + // memControl_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue; - pThis->__memShareCallback__ = &__nvoc_thunk_RmResource_memShareCallback; + // memControl_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue; - pThis->__memGetRefCount__ = &__nvoc_thunk_RsResource_memGetRefCount; + // memCanCopy -- virtual inherited (res) base (rmres) + pThis->__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy; - pThis->__memControlFilter__ = &__nvoc_thunk_RsResource_memControlFilter; + // memPreDestruct -- virtual inherited (res) base (rmres) + pThis->__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct; - pThis->__memAddAdditionalDependants__ = &__nvoc_thunk_RsResource_memAddAdditionalDependants; + // memControlFilter -- virtual inherited (res) base (rmres) + pThis->__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter; - pThis->__memControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_memControlSerialization_Prologue; + // memIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body + pThis->__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported; - pThis->__memControl_Prologue__ = &__nvoc_thunk_RmResource_memControl_Prologue; + // memMapTo -- virtual inherited (res) base (rmres) + pThis->__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo; - pThis->__memCanCopy__ = &__nvoc_thunk_RsResource_memCanCopy; + // memUnmapFrom -- virtual inherited (res) base (rmres) + pThis->__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom; - pThis->__memIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_memIsPartialUnmapSupported; + // memGetRefCount -- virtual inherited (res) base (rmres) + pThis->__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount; - pThis->__memPreDestruct__ = &__nvoc_thunk_RsResource_memPreDestruct; + // memAddAdditionalDependants -- virtual inherited (res) base (rmres) + pThis->__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants; +} // End __nvoc_init_funcTable_Memory_1 with approximately 40 basic block(s). - pThis->__memMapTo__ = &__nvoc_thunk_RsResource_memMapTo; - - pThis->__memControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_memControlSerialization_Epilogue; - - pThis->__memControl_Epilogue__ = &__nvoc_thunk_RmResource_memControl_Epilogue; - - pThis->__memUnmapFrom__ = &__nvoc_thunk_RsResource_memUnmapFrom; - - pThis->__memAccessCallback__ = &__nvoc_thunk_RmResource_memAccessCallback; -} +// Initialize vtable(s) for 33 virtual method(s). void __nvoc_init_funcTable_Memory(Memory *pThis) { + + // Initialize vtable(s) with 33 per-object function pointer(s). __nvoc_init_funcTable_Memory_1(pThis); } diff --git a/src/nvidia/generated/g_mem_nvoc.h b/src/nvidia/generated/g_mem_nvoc.h index 38a61e34ab..c5f5d234fd 100644 --- a/src/nvidia/generated/g_mem_nvoc.h +++ b/src/nvidia/generated/g_mem_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_MEM_NVOC_H_ #define _G_MEM_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_mem_nvoc.h" #ifndef _MEMORY_API_H_ @@ -43,6 +51,7 @@ extern "C" { #include "ctrl/ctrl0041.h" + struct Device; #ifndef __NVOC_CLASS_Device_TYPEDEF__ @@ -55,6 +64,7 @@ typedef struct Device Device; #endif /* __nvoc_class_id_Device */ + struct Subdevice; #ifndef __NVOC_CLASS_Subdevice_TYPEDEF__ @@ -67,6 +77,7 @@ typedef struct Subdevice Subdevice; #endif /* __nvoc_class_id_Subdevice */ + struct RsClient; #ifndef __NVOC_CLASS_RsClient_TYPEDEF__ @@ -79,6 +90,7 @@ typedef struct RsClient RsClient; #endif /* __nvoc_class_id_RsClient */ + struct Heap; #ifndef __NVOC_CLASS_Heap_TYPEDEF__ @@ -91,6 +103,7 @@ typedef struct Heap Heap; #endif /* __nvoc_class_id_Heap */ + struct OBJGPU; #ifndef __NVOC_CLASS_OBJGPU_TYPEDEF__ @@ -145,47 +158,58 @@ typedef struct #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct Memory { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Memory *__nvoc_pbase_Memory; - NV_STATUS (*__memIsDuplicate__)(struct Memory *, NvHandle, NvBool *); - NV_STATUS (*__memGetMapAddrSpace__)(struct Memory *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NV_STATUS (*__memControl__)(struct Memory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memMap__)(struct Memory *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NV_STATUS (*__memUnmap__)(struct Memory *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__memGetMemInterMapParams__)(struct Memory *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__memCheckMemInterUnmap__)(struct Memory *, NvBool); - NV_STATUS (*__memGetMemoryMappingDescriptor__)(struct Memory *, MEMORY_DESCRIPTOR **); - NV_STATUS (*__memCheckCopyPermissions__)(struct Memory *, struct OBJGPU *, struct Device *); - NV_STATUS (*__memIsReady__)(struct Memory *, NvBool); - NvBool (*__memIsGpuMapAllowed__)(struct Memory *, struct OBJGPU *); - NvBool (*__memIsExportAllowed__)(struct Memory *); - NV_STATUS (*__memCtrlCmdGetSurfaceCompressionCoverageLvm__)(struct Memory *, NV0041_CTRL_GET_SURFACE_COMPRESSION_COVERAGE_PARAMS *); - NV_STATUS (*__memCtrlCmdGetSurfaceInfoLvm__)(struct Memory *, NV0041_CTRL_GET_SURFACE_INFO_PARAMS *); - NV_STATUS (*__memCtrlCmdSurfaceFlushGpuCache__)(struct Memory *, NV0041_CTRL_SURFACE_FLUSH_GPU_CACHE_PARAMS *); - NV_STATUS (*__memCtrlCmdGetMemPageSize__)(struct Memory *, NV0041_CTRL_GET_MEM_PAGE_SIZE_PARAMS *); - NV_STATUS (*__memCtrlCmdSetTag__)(struct Memory *, NV0041_CTRL_CMD_SET_TAG_PARAMS *); - NV_STATUS (*__memCtrlCmdGetTag__)(struct Memory *, NV0041_CTRL_CMD_GET_TAG_PARAMS *); - NV_STATUS (*__memCtrlCmdGetSurfacePhysAttrLvm__)(struct Memory *, NV0041_CTRL_GET_SURFACE_PHYS_ATTR_PARAMS *); - NvBool (*__memShareCallback__)(struct Memory *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NvU32 (*__memGetRefCount__)(struct Memory *); - NV_STATUS (*__memControlFilter__)(struct Memory *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__memAddAdditionalDependants__)(struct RsClient *, struct Memory *, RsResourceRef *); - NV_STATUS (*__memControlSerialization_Prologue__)(struct Memory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memControl_Prologue__)(struct Memory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__memCanCopy__)(struct Memory *); - NvBool (*__memIsPartialUnmapSupported__)(struct Memory *); - void (*__memPreDestruct__)(struct Memory *); - NV_STATUS (*__memMapTo__)(struct Memory *, RS_RES_MAP_TO_PARAMS *); - void (*__memControlSerialization_Epilogue__)(struct Memory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__memControl_Epilogue__)(struct Memory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__memUnmapFrom__)(struct Memory *, RS_RES_UNMAP_FROM_PARAMS *); - NvBool (*__memAccessCallback__)(struct Memory *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^3 + struct RsResource *__nvoc_pbase_RsResource; // res super^2 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^2 + struct RmResource *__nvoc_pbase_RmResource; // rmres super + struct Memory *__nvoc_pbase_Memory; // mem + + // Vtable with 33 per-object function pointers + NV_STATUS (*__memIsDuplicate__)(struct Memory * /*this*/, NvHandle, NvBool *); // virtual override (res) base (rmres) + NV_STATUS (*__memGetMapAddrSpace__)(struct Memory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual + NV_STATUS (*__memControl__)(struct Memory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (rmres) + NV_STATUS (*__memMap__)(struct Memory * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual override (res) base (rmres) + NV_STATUS (*__memUnmap__)(struct Memory * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual override (res) base (rmres) + NV_STATUS (*__memGetMemInterMapParams__)(struct Memory * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual override (rmres) base (rmres) + NV_STATUS (*__memCheckMemInterUnmap__)(struct Memory * /*this*/, NvBool); // inline virtual override (rmres) base (rmres) body + NV_STATUS (*__memGetMemoryMappingDescriptor__)(struct Memory * /*this*/, MEMORY_DESCRIPTOR **); // virtual override (rmres) base (rmres) + NV_STATUS (*__memCheckCopyPermissions__)(struct Memory * /*this*/, struct OBJGPU *, struct Device *); // inline virtual body + NV_STATUS (*__memIsReady__)(struct Memory * /*this*/, NvBool); // virtual + NvBool (*__memIsGpuMapAllowed__)(struct Memory * /*this*/, struct OBJGPU *); // inline virtual body + NvBool (*__memIsExportAllowed__)(struct Memory * /*this*/); // inline virtual body + NV_STATUS (*__memCtrlCmdGetSurfaceCompressionCoverageLvm__)(struct Memory * /*this*/, NV0041_CTRL_GET_SURFACE_COMPRESSION_COVERAGE_PARAMS *); // exported (id=0x410112) + NV_STATUS (*__memCtrlCmdGetSurfaceInfoLvm__)(struct Memory * /*this*/, NV0041_CTRL_GET_SURFACE_INFO_PARAMS *); // exported (id=0x410110) + NV_STATUS (*__memCtrlCmdSurfaceFlushGpuCache__)(struct Memory * /*this*/, NV0041_CTRL_SURFACE_FLUSH_GPU_CACHE_PARAMS *); // exported (id=0x410116) + NV_STATUS (*__memCtrlCmdGetMemPageSize__)(struct Memory * /*this*/, NV0041_CTRL_GET_MEM_PAGE_SIZE_PARAMS *); // exported (id=0x410118) + NV_STATUS (*__memCtrlCmdSetTag__)(struct Memory * /*this*/, NV0041_CTRL_CMD_SET_TAG_PARAMS *); // exported (id=0x410120) + NV_STATUS (*__memCtrlCmdGetTag__)(struct Memory * /*this*/, NV0041_CTRL_CMD_GET_TAG_PARAMS *); // exported (id=0x410121) + NV_STATUS (*__memCtrlCmdGetSurfacePhysAttrLvm__)(struct Memory * /*this*/, NV0041_CTRL_GET_SURFACE_PHYS_ATTR_PARAMS *); // exported (id=0x410103) + NvBool (*__memAccessCallback__)(struct Memory * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) + NvBool (*__memShareCallback__)(struct Memory * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__memControlSerialization_Prologue__)(struct Memory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__memControlSerialization_Epilogue__)(struct Memory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__memControl_Prologue__)(struct Memory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__memControl_Epilogue__)(struct Memory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NvBool (*__memCanCopy__)(struct Memory * /*this*/); // virtual inherited (res) base (rmres) + void (*__memPreDestruct__)(struct Memory * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__memControlFilter__)(struct Memory * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NvBool (*__memIsPartialUnmapSupported__)(struct Memory * /*this*/); // inline virtual inherited (res) base (rmres) body + NV_STATUS (*__memMapTo__)(struct Memory * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) + NV_STATUS (*__memUnmapFrom__)(struct Memory * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) + NvU32 (*__memGetRefCount__)(struct Memory * /*this*/); // virtual inherited (res) base (rmres) + void (*__memAddAdditionalDependants__)(struct RsClient *, struct Memory * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) + + // Data members NvBool bConstructed; struct Device *pDevice; struct Subdevice *pSubDevice; @@ -212,6 +236,7 @@ struct Memory { NvU64 osDeviceHandle; HWRESOURCE_INFO *pHwResource; NvBool bRpcAlloc; + NvBool bRegisteredWithGsp; VGPU_NS_INTR vgpuNsIntr; }; @@ -224,6 +249,7 @@ typedef struct Memory Memory; #define __nvoc_class_id_Memory 0x4789f2 #endif /* __nvoc_class_id_Memory */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_Memory; #define __staticCast_Memory(pThis) \ @@ -236,224 +262,260 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_Memory; ((Memory*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(Memory))) #endif //__nvoc_mem_h_disabled - NV_STATUS __nvoc_objCreateDynamic_Memory(Memory**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_Memory(Memory**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_Memory(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_Memory((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define memIsDuplicate_FNPTR(pMemory) pMemory->__memIsDuplicate__ #define memIsDuplicate(pMemory, hMemory, pDuplicate) memIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) +#define memGetMapAddrSpace_FNPTR(pMemory) pMemory->__memGetMapAddrSpace__ #define memGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) memGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) +#define memControl_FNPTR(pMemory) pMemory->__memControl__ #define memControl(pMemory, pCallContext, pParams) memControl_DISPATCH(pMemory, pCallContext, pParams) +#define memMap_FNPTR(pMemory) pMemory->__memMap__ #define memMap(pMemory, pCallContext, pParams, pCpuMapping) memMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define memUnmap_FNPTR(pMemory) pMemory->__memUnmap__ #define memUnmap(pMemory, pCallContext, pCpuMapping) memUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) +#define memGetMemInterMapParams_FNPTR(pMemory) pMemory->__memGetMemInterMapParams__ #define memGetMemInterMapParams(pMemory, pParams) memGetMemInterMapParams_DISPATCH(pMemory, pParams) +#define memCheckMemInterUnmap_FNPTR(pMemory) pMemory->__memCheckMemInterUnmap__ #define memCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) memCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) +#define memGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__memGetMemoryMappingDescriptor__ #define memGetMemoryMappingDescriptor(pMemory, ppMemDesc) memGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) +#define memCheckCopyPermissions_FNPTR(pMemory) pMemory->__memCheckCopyPermissions__ #define memCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) memCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) +#define memIsReady_FNPTR(pMemory) pMemory->__memIsReady__ #define memIsReady(pMemory, bCopyConstructorContext) memIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define memIsGpuMapAllowed_FNPTR(pMemory) pMemory->__memIsGpuMapAllowed__ #define memIsGpuMapAllowed(pMemory, pGpu) memIsGpuMapAllowed_DISPATCH(pMemory, pGpu) +#define memIsExportAllowed_FNPTR(pMemory) pMemory->__memIsExportAllowed__ #define memIsExportAllowed(pMemory) memIsExportAllowed_DISPATCH(pMemory) +#define memCtrlCmdGetSurfaceCompressionCoverageLvm_FNPTR(pMemory) pMemory->__memCtrlCmdGetSurfaceCompressionCoverageLvm__ #define memCtrlCmdGetSurfaceCompressionCoverageLvm(pMemory, pParams) memCtrlCmdGetSurfaceCompressionCoverageLvm_DISPATCH(pMemory, pParams) +#define memCtrlCmdGetSurfaceInfoLvm_FNPTR(pMemory) pMemory->__memCtrlCmdGetSurfaceInfoLvm__ #define memCtrlCmdGetSurfaceInfoLvm(pMemory, pSurfaceInfoParams) memCtrlCmdGetSurfaceInfoLvm_DISPATCH(pMemory, pSurfaceInfoParams) +#define memCtrlCmdSurfaceFlushGpuCache_FNPTR(pMemory) pMemory->__memCtrlCmdSurfaceFlushGpuCache__ #define memCtrlCmdSurfaceFlushGpuCache(pMemory, pCacheFlushParams) memCtrlCmdSurfaceFlushGpuCache_DISPATCH(pMemory, pCacheFlushParams) +#define memCtrlCmdGetMemPageSize_FNPTR(pMemory) pMemory->__memCtrlCmdGetMemPageSize__ #define memCtrlCmdGetMemPageSize(pMemory, pPageSizeParams) memCtrlCmdGetMemPageSize_DISPATCH(pMemory, pPageSizeParams) +#define memCtrlCmdSetTag_FNPTR(pMemory) pMemory->__memCtrlCmdSetTag__ #define memCtrlCmdSetTag(pMemory, pParams) memCtrlCmdSetTag_DISPATCH(pMemory, pParams) +#define memCtrlCmdGetTag_FNPTR(pMemory) pMemory->__memCtrlCmdGetTag__ #define memCtrlCmdGetTag(pMemory, pParams) memCtrlCmdGetTag_DISPATCH(pMemory, pParams) +#define memCtrlCmdGetSurfacePhysAttrLvm_FNPTR(pMemory) pMemory->__memCtrlCmdGetSurfacePhysAttrLvm__ #define memCtrlCmdGetSurfacePhysAttrLvm(pMemory, pGPAP) memCtrlCmdGetSurfacePhysAttrLvm_DISPATCH(pMemory, pGPAP) +#define memAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define memAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define memShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ #define memShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) memShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define memGetRefCount(pResource) memGetRefCount_DISPATCH(pResource) -#define memControlFilter(pResource, pCallContext, pParams) memControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define memAddAdditionalDependants(pClient, pResource, pReference) memAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define memControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define memControlSerialization_Prologue(pResource, pCallContext, pParams) memControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define memControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define memControlSerialization_Epilogue(pResource, pCallContext, pParams) memControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define memControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ #define memControl_Prologue(pResource, pCallContext, pParams) memControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define memControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define memControl_Epilogue(pResource, pCallContext, pParams) memControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define memCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define memCanCopy(pResource) memCanCopy_DISPATCH(pResource) -#define memIsPartialUnmapSupported(pResource) memIsPartialUnmapSupported_DISPATCH(pResource) +#define memPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ #define memPreDestruct(pResource) memPreDestruct_DISPATCH(pResource) +#define memControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define memControlFilter(pResource, pCallContext, pParams) memControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define memIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define memIsPartialUnmapSupported(pResource) memIsPartialUnmapSupported_DISPATCH(pResource) +#define memMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ #define memMapTo(pResource, pParams) memMapTo_DISPATCH(pResource, pParams) -#define memControlSerialization_Epilogue(pResource, pCallContext, pParams) memControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memControl_Epilogue(pResource, pCallContext, pParams) memControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define memUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ #define memUnmapFrom(pResource, pParams) memUnmapFrom_DISPATCH(pResource, pParams) -#define memAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS memIsDuplicate_IMPL(struct Memory *pMemory, NvHandle hMemory, NvBool *pDuplicate); +#define memGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define memGetRefCount(pResource) memGetRefCount_DISPATCH(pResource) +#define memAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define memAddAdditionalDependants(pClient, pResource, pReference) memAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS memIsDuplicate_DISPATCH(struct Memory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return pMemory->__memIsDuplicate__(pMemory, hMemory, pDuplicate); } -NV_STATUS memGetMapAddrSpace_IMPL(struct Memory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); - static inline NV_STATUS memGetMapAddrSpace_DISPATCH(struct Memory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pMemory->__memGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } -NV_STATUS memControl_IMPL(struct Memory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline NV_STATUS memControl_DISPATCH(struct Memory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pMemory->__memControl__(pMemory, pCallContext, pParams); } -NV_STATUS memMap_IMPL(struct Memory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); - static inline NV_STATUS memMap_DISPATCH(struct Memory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return pMemory->__memMap__(pMemory, pCallContext, pParams, pCpuMapping); } -NV_STATUS memUnmap_IMPL(struct Memory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); - static inline NV_STATUS memUnmap_DISPATCH(struct Memory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return pMemory->__memUnmap__(pMemory, pCallContext, pCpuMapping); } -NV_STATUS memGetMemInterMapParams_IMPL(struct Memory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); - static inline NV_STATUS memGetMemInterMapParams_DISPATCH(struct Memory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pMemory->__memGetMemInterMapParams__(pMemory, pParams); } -static inline NV_STATUS memCheckMemInterUnmap_ac1694(struct Memory *pMemory, NvBool bSubdeviceHandleProvided) { - return NV_OK; -} - static inline NV_STATUS memCheckMemInterUnmap_DISPATCH(struct Memory *pMemory, NvBool bSubdeviceHandleProvided) { return pMemory->__memCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } -NV_STATUS memGetMemoryMappingDescriptor_IMPL(struct Memory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); - static inline NV_STATUS memGetMemoryMappingDescriptor_DISPATCH(struct Memory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return pMemory->__memGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } -static inline NV_STATUS memCheckCopyPermissions_ac1694(struct Memory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return NV_OK; -} - static inline NV_STATUS memCheckCopyPermissions_DISPATCH(struct Memory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return pMemory->__memCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } -NV_STATUS memIsReady_IMPL(struct Memory *pMemory, NvBool bCopyConstructorContext); - static inline NV_STATUS memIsReady_DISPATCH(struct Memory *pMemory, NvBool bCopyConstructorContext) { return pMemory->__memIsReady__(pMemory, bCopyConstructorContext); } -static inline NvBool memIsGpuMapAllowed_0c883b(struct Memory *pMemory, struct OBJGPU *pGpu) { - return ((NvBool)(0 == 0)); -} - static inline NvBool memIsGpuMapAllowed_DISPATCH(struct Memory *pMemory, struct OBJGPU *pGpu) { return pMemory->__memIsGpuMapAllowed__(pMemory, pGpu); } -static inline NvBool memIsExportAllowed_0c883b(struct Memory *pMemory) { - return ((NvBool)(0 == 0)); -} - static inline NvBool memIsExportAllowed_DISPATCH(struct Memory *pMemory) { return pMemory->__memIsExportAllowed__(pMemory); } -NV_STATUS memCtrlCmdGetSurfaceCompressionCoverageLvm_IMPL(struct Memory *pMemory, NV0041_CTRL_GET_SURFACE_COMPRESSION_COVERAGE_PARAMS *pParams); - static inline NV_STATUS memCtrlCmdGetSurfaceCompressionCoverageLvm_DISPATCH(struct Memory *pMemory, NV0041_CTRL_GET_SURFACE_COMPRESSION_COVERAGE_PARAMS *pParams) { return pMemory->__memCtrlCmdGetSurfaceCompressionCoverageLvm__(pMemory, pParams); } -NV_STATUS memCtrlCmdGetSurfaceInfoLvm_IMPL(struct Memory *pMemory, NV0041_CTRL_GET_SURFACE_INFO_PARAMS *pSurfaceInfoParams); - static inline NV_STATUS memCtrlCmdGetSurfaceInfoLvm_DISPATCH(struct Memory *pMemory, NV0041_CTRL_GET_SURFACE_INFO_PARAMS *pSurfaceInfoParams) { return pMemory->__memCtrlCmdGetSurfaceInfoLvm__(pMemory, pSurfaceInfoParams); } -NV_STATUS memCtrlCmdSurfaceFlushGpuCache_IMPL(struct Memory *pMemory, NV0041_CTRL_SURFACE_FLUSH_GPU_CACHE_PARAMS *pCacheFlushParams); - static inline NV_STATUS memCtrlCmdSurfaceFlushGpuCache_DISPATCH(struct Memory *pMemory, NV0041_CTRL_SURFACE_FLUSH_GPU_CACHE_PARAMS *pCacheFlushParams) { return pMemory->__memCtrlCmdSurfaceFlushGpuCache__(pMemory, pCacheFlushParams); } -NV_STATUS memCtrlCmdGetMemPageSize_IMPL(struct Memory *pMemory, NV0041_CTRL_GET_MEM_PAGE_SIZE_PARAMS *pPageSizeParams); - static inline NV_STATUS memCtrlCmdGetMemPageSize_DISPATCH(struct Memory *pMemory, NV0041_CTRL_GET_MEM_PAGE_SIZE_PARAMS *pPageSizeParams) { return pMemory->__memCtrlCmdGetMemPageSize__(pMemory, pPageSizeParams); } -NV_STATUS memCtrlCmdSetTag_IMPL(struct Memory *pMemory, NV0041_CTRL_CMD_SET_TAG_PARAMS *pParams); - static inline NV_STATUS memCtrlCmdSetTag_DISPATCH(struct Memory *pMemory, NV0041_CTRL_CMD_SET_TAG_PARAMS *pParams) { return pMemory->__memCtrlCmdSetTag__(pMemory, pParams); } -NV_STATUS memCtrlCmdGetTag_IMPL(struct Memory *pMemory, NV0041_CTRL_CMD_GET_TAG_PARAMS *pParams); - static inline NV_STATUS memCtrlCmdGetTag_DISPATCH(struct Memory *pMemory, NV0041_CTRL_CMD_GET_TAG_PARAMS *pParams) { return pMemory->__memCtrlCmdGetTag__(pMemory, pParams); } -NV_STATUS memCtrlCmdGetSurfacePhysAttrLvm_IMPL(struct Memory *pMemory, NV0041_CTRL_GET_SURFACE_PHYS_ATTR_PARAMS *pGPAP); - static inline NV_STATUS memCtrlCmdGetSurfacePhysAttrLvm_DISPATCH(struct Memory *pMemory, NV0041_CTRL_GET_SURFACE_PHYS_ATTR_PARAMS *pGPAP) { return pMemory->__memCtrlCmdGetSurfacePhysAttrLvm__(pMemory, pGPAP); } -static inline NvBool memShareCallback_DISPATCH(struct Memory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__memShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NvU32 memGetRefCount_DISPATCH(struct Memory *pResource) { - return pResource->__memGetRefCount__(pResource); -} - -static inline NV_STATUS memControlFilter_DISPATCH(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memControlFilter__(pResource, pCallContext, pParams); +static inline NvBool memAccessCallback_DISPATCH(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__memAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline void memAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference) { - pResource->__memAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvBool memShareCallback_DISPATCH(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__memShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS memControlSerialization_Prologue_DISPATCH(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__memControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void memControlSerialization_Epilogue_DISPATCH(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__memControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + static inline NV_STATUS memControl_Prologue_DISPATCH(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__memControl_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool memCanCopy_DISPATCH(struct Memory *pResource) { - return pResource->__memCanCopy__(pResource); +static inline void memControl_Epilogue_DISPATCH(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__memControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NvBool memIsPartialUnmapSupported_DISPATCH(struct Memory *pResource) { - return pResource->__memIsPartialUnmapSupported__(pResource); +static inline NvBool memCanCopy_DISPATCH(struct Memory *pResource) { + return pResource->__memCanCopy__(pResource); } static inline void memPreDestruct_DISPATCH(struct Memory *pResource) { pResource->__memPreDestruct__(pResource); } -static inline NV_STATUS memMapTo_DISPATCH(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__memMapTo__(pResource, pParams); +static inline NV_STATUS memControlFilter_DISPATCH(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__memControlFilter__(pResource, pCallContext, pParams); } -static inline void memControlSerialization_Epilogue_DISPATCH(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool memIsPartialUnmapSupported_DISPATCH(struct Memory *pResource) { + return pResource->__memIsPartialUnmapSupported__(pResource); } -static inline void memControl_Epilogue_DISPATCH(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS memMapTo_DISPATCH(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__memMapTo__(pResource, pParams); } static inline NV_STATUS memUnmapFrom_DISPATCH(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return pResource->__memUnmapFrom__(pResource, pParams); } -static inline NvBool memAccessCallback_DISPATCH(struct Memory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__memAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NvU32 memGetRefCount_DISPATCH(struct Memory *pResource) { + return pResource->__memGetRefCount__(pResource); +} + +static inline void memAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference) { + pResource->__memAddAdditionalDependants__(pClient, pResource, pReference); +} + +NV_STATUS memIsDuplicate_IMPL(struct Memory *pMemory, NvHandle hMemory, NvBool *pDuplicate); + +NV_STATUS memGetMapAddrSpace_IMPL(struct Memory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); + +NV_STATUS memControl_IMPL(struct Memory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +NV_STATUS memMap_IMPL(struct Memory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); + +NV_STATUS memUnmap_IMPL(struct Memory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); + +NV_STATUS memGetMemInterMapParams_IMPL(struct Memory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); + +static inline NV_STATUS memCheckMemInterUnmap_ac1694(struct Memory *pMemory, NvBool bSubdeviceHandleProvided) { + return NV_OK; } +NV_STATUS memGetMemoryMappingDescriptor_IMPL(struct Memory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); + +static inline NV_STATUS memCheckCopyPermissions_ac1694(struct Memory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return NV_OK; +} + +NV_STATUS memIsReady_IMPL(struct Memory *pMemory, NvBool bCopyConstructorContext); + +static inline NvBool memIsGpuMapAllowed_0c883b(struct Memory *pMemory, struct OBJGPU *pGpu) { + return ((NvBool)(0 == 0)); +} + +static inline NvBool memIsExportAllowed_0c883b(struct Memory *pMemory) { + return ((NvBool)(0 == 0)); +} + +NV_STATUS memCtrlCmdGetSurfaceCompressionCoverageLvm_IMPL(struct Memory *pMemory, NV0041_CTRL_GET_SURFACE_COMPRESSION_COVERAGE_PARAMS *pParams); + +NV_STATUS memCtrlCmdGetSurfaceInfoLvm_IMPL(struct Memory *pMemory, NV0041_CTRL_GET_SURFACE_INFO_PARAMS *pSurfaceInfoParams); + +NV_STATUS memCtrlCmdSurfaceFlushGpuCache_IMPL(struct Memory *pMemory, NV0041_CTRL_SURFACE_FLUSH_GPU_CACHE_PARAMS *pCacheFlushParams); + +NV_STATUS memCtrlCmdGetMemPageSize_IMPL(struct Memory *pMemory, NV0041_CTRL_GET_MEM_PAGE_SIZE_PARAMS *pPageSizeParams); + +NV_STATUS memCtrlCmdSetTag_IMPL(struct Memory *pMemory, NV0041_CTRL_CMD_SET_TAG_PARAMS *pParams); + +NV_STATUS memCtrlCmdGetTag_IMPL(struct Memory *pMemory, NV0041_CTRL_CMD_GET_TAG_PARAMS *pParams); + +NV_STATUS memCtrlCmdGetSurfacePhysAttrLvm_IMPL(struct Memory *pMemory, NV0041_CTRL_GET_SURFACE_PHYS_ATTR_PARAMS *pGPAP); + NV_STATUS memConstruct_IMPL(struct Memory *arg_pMemory, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_memConstruct(arg_pMemory, arg_pCallContext, arg_pParams) memConstruct_IMPL(arg_pMemory, arg_pCallContext, arg_pParams) @@ -515,6 +577,9 @@ NV_STATUS memGetByHandleAndDevice_IMPL(struct RsClient *pClient, NvHandle hMemor NV_STATUS memGetByHandleAndGroupedGpu_IMPL(struct RsClient *pClient, NvHandle hMemory, struct OBJGPU *pGpu, struct Memory **ppMemory); #define memGetByHandleAndGroupedGpu(pClient, hMemory, pGpu, ppMemory) memGetByHandleAndGroupedGpu_IMPL(pClient, hMemory, pGpu, ppMemory) +NV_STATUS memRegisterWithGsp_IMPL(struct OBJGPU *pGpu, struct RsClient *pClient, NvHandle hParent, NvHandle hMemory); + +#define memRegisterWithGsp(pGpu, pClient, hParent, hMemory) memRegisterWithGsp_IMPL(pGpu, pClient, hParent, hMemory) #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_mig_config_session_nvoc.c b/src/nvidia/generated/g_mig_config_session_nvoc.c index e9766c1b0f..93d11b44a7 100644 --- a/src/nvidia/generated/g_mig_config_session_nvoc.c +++ b/src/nvidia/generated/g_mig_config_session_nvoc.c @@ -84,90 +84,114 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MIGConfigSession = /*pExportInfo=*/ &__nvoc_export_info_MIGConfigSession }; -static NvBool __nvoc_thunk_RmResource_migconfigsessionShareCallback(struct MIGConfigSession *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// 21 up-thunk(s) defined to bridge methods in MIGConfigSession to superclasses + +// migconfigsessionAccessCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_migconfigsessionAccessCallback(struct MIGConfigSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RmResource_migconfigsessionCheckMemInterUnmap(struct MIGConfigSession *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), bSubdeviceHandleProvided); +// migconfigsessionShareCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_migconfigsessionShareCallback(struct MIGConfigSession *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RsResource_migconfigsessionControl(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControl((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pCallContext, pParams); +// migconfigsessionGetMemInterMapParams: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_migconfigsessionGetMemInterMapParams(struct MIGConfigSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RmResource_migconfigsessionGetMemInterMapParams(struct MIGConfigSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pParams); +// migconfigsessionCheckMemInterUnmap: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_migconfigsessionCheckMemInterUnmap(struct MIGConfigSession *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RmResource_migconfigsessionGetMemoryMappingDescriptor(struct MIGConfigSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), ppMemDesc); +// migconfigsessionGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_migconfigsessionGetMemoryMappingDescriptor(struct MIGConfigSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), ppMemDesc); } -static NvU32 __nvoc_thunk_RsResource_migconfigsessionGetRefCount(struct MIGConfigSession *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset)); +// migconfigsessionControlSerialization_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_migconfigsessionControlSerialization_Prologue(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_migconfigsessionControlFilter(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pCallContext, pParams); +// migconfigsessionControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_migconfigsessionControlSerialization_Epilogue(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_migconfigsessionAddAdditionalDependants(struct RsClient *pClient, struct MIGConfigSession *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pReference); +// migconfigsessionControl_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_migconfigsessionControl_Prologue(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_migconfigsessionControlSerialization_Prologue(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pCallContext, pParams); +// migconfigsessionControl_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_migconfigsessionControl_Epilogue(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_migconfigsessionControl_Prologue(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pCallContext, pParams); +// migconfigsessionCanCopy: virtual inherited (res) base (rmres) +static NvBool __nvoc_up_thunk_RsResource_migconfigsessionCanCopy(struct MIGConfigSession *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_migconfigsessionCanCopy(struct MIGConfigSession *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset)); +// migconfigsessionIsDuplicate: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionIsDuplicate(struct MIGConfigSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_migconfigsessionUnmap(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pCallContext, pCpuMapping); +// migconfigsessionPreDestruct: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_migconfigsessionPreDestruct(struct MIGConfigSession *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_migconfigsessionIsPartialUnmapSupported(struct MIGConfigSession *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset)); +// migconfigsessionControl: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionControl(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_migconfigsessionPreDestruct(struct MIGConfigSession *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset)); +// migconfigsessionControlFilter: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionControlFilter(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_migconfigsessionMapTo(struct MIGConfigSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pParams); +// migconfigsessionMap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionMap(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_migconfigsessionIsDuplicate(struct MIGConfigSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), hMemory, pDuplicate); +// migconfigsessionUnmap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionUnmap(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_RmResource_migconfigsessionControlSerialization_Epilogue(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pCallContext, pParams); +// migconfigsessionIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body +static NvBool __nvoc_up_thunk_RsResource_migconfigsessionIsPartialUnmapSupported(struct MIGConfigSession *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset)); } -static void __nvoc_thunk_RmResource_migconfigsessionControl_Epilogue(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pCallContext, pParams); +// migconfigsessionMapTo: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionMapTo(struct MIGConfigSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_migconfigsessionUnmapFrom(struct MIGConfigSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pParams); +// migconfigsessionUnmapFrom: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionUnmapFrom(struct MIGConfigSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_migconfigsessionMap(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pCallContext, pParams, pCpuMapping); +// migconfigsessionGetRefCount: virtual inherited (res) base (rmres) +static NvU32 __nvoc_up_thunk_RsResource_migconfigsessionGetRefCount(struct MIGConfigSession *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_migconfigsessionAccessCallback(struct MIGConfigSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// migconfigsessionAddAdditionalDependants: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_migconfigsessionAddAdditionalDependants(struct RsClient *pClient, struct MIGConfigSession *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_MIGConfigSession = { /*numEntries=*/ 0, @@ -204,53 +228,79 @@ NV_STATUS __nvoc_ctor_MIGConfigSession(MIGConfigSession *pThis, struct CALL_CONT return status; } +// Vtable initialization static void __nvoc_init_funcTable_MIGConfigSession_1(MIGConfigSession *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - pThis->__migconfigsessionShareCallback__ = &__nvoc_thunk_RmResource_migconfigsessionShareCallback; + // migconfigsessionAccessCallback -- virtual inherited (rmres) base (rmres) + pThis->__migconfigsessionAccessCallback__ = &__nvoc_up_thunk_RmResource_migconfigsessionAccessCallback; - pThis->__migconfigsessionCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_migconfigsessionCheckMemInterUnmap; + // migconfigsessionShareCallback -- virtual inherited (rmres) base (rmres) + pThis->__migconfigsessionShareCallback__ = &__nvoc_up_thunk_RmResource_migconfigsessionShareCallback; - pThis->__migconfigsessionControl__ = &__nvoc_thunk_RsResource_migconfigsessionControl; + // migconfigsessionGetMemInterMapParams -- virtual inherited (rmres) base (rmres) + pThis->__migconfigsessionGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_migconfigsessionGetMemInterMapParams; - pThis->__migconfigsessionGetMemInterMapParams__ = &__nvoc_thunk_RmResource_migconfigsessionGetMemInterMapParams; + // migconfigsessionCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) + pThis->__migconfigsessionCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_migconfigsessionCheckMemInterUnmap; - pThis->__migconfigsessionGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_migconfigsessionGetMemoryMappingDescriptor; + // migconfigsessionGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) + pThis->__migconfigsessionGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_migconfigsessionGetMemoryMappingDescriptor; - pThis->__migconfigsessionGetRefCount__ = &__nvoc_thunk_RsResource_migconfigsessionGetRefCount; + // migconfigsessionControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__migconfigsessionControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_migconfigsessionControlSerialization_Prologue; - pThis->__migconfigsessionControlFilter__ = &__nvoc_thunk_RsResource_migconfigsessionControlFilter; + // migconfigsessionControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__migconfigsessionControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_migconfigsessionControlSerialization_Epilogue; - pThis->__migconfigsessionAddAdditionalDependants__ = &__nvoc_thunk_RsResource_migconfigsessionAddAdditionalDependants; + // migconfigsessionControl_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__migconfigsessionControl_Prologue__ = &__nvoc_up_thunk_RmResource_migconfigsessionControl_Prologue; - pThis->__migconfigsessionControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_migconfigsessionControlSerialization_Prologue; + // migconfigsessionControl_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__migconfigsessionControl_Epilogue__ = &__nvoc_up_thunk_RmResource_migconfigsessionControl_Epilogue; - pThis->__migconfigsessionControl_Prologue__ = &__nvoc_thunk_RmResource_migconfigsessionControl_Prologue; + // migconfigsessionCanCopy -- virtual inherited (res) base (rmres) + pThis->__migconfigsessionCanCopy__ = &__nvoc_up_thunk_RsResource_migconfigsessionCanCopy; - pThis->__migconfigsessionCanCopy__ = &__nvoc_thunk_RsResource_migconfigsessionCanCopy; + // migconfigsessionIsDuplicate -- virtual inherited (res) base (rmres) + pThis->__migconfigsessionIsDuplicate__ = &__nvoc_up_thunk_RsResource_migconfigsessionIsDuplicate; - pThis->__migconfigsessionUnmap__ = &__nvoc_thunk_RsResource_migconfigsessionUnmap; + // migconfigsessionPreDestruct -- virtual inherited (res) base (rmres) + pThis->__migconfigsessionPreDestruct__ = &__nvoc_up_thunk_RsResource_migconfigsessionPreDestruct; - pThis->__migconfigsessionIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_migconfigsessionIsPartialUnmapSupported; + // migconfigsessionControl -- virtual inherited (res) base (rmres) + pThis->__migconfigsessionControl__ = &__nvoc_up_thunk_RsResource_migconfigsessionControl; - pThis->__migconfigsessionPreDestruct__ = &__nvoc_thunk_RsResource_migconfigsessionPreDestruct; + // migconfigsessionControlFilter -- virtual inherited (res) base (rmres) + pThis->__migconfigsessionControlFilter__ = &__nvoc_up_thunk_RsResource_migconfigsessionControlFilter; - pThis->__migconfigsessionMapTo__ = &__nvoc_thunk_RsResource_migconfigsessionMapTo; + // migconfigsessionMap -- virtual inherited (res) base (rmres) + pThis->__migconfigsessionMap__ = &__nvoc_up_thunk_RsResource_migconfigsessionMap; - pThis->__migconfigsessionIsDuplicate__ = &__nvoc_thunk_RsResource_migconfigsessionIsDuplicate; + // migconfigsessionUnmap -- virtual inherited (res) base (rmres) + pThis->__migconfigsessionUnmap__ = &__nvoc_up_thunk_RsResource_migconfigsessionUnmap; - pThis->__migconfigsessionControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_migconfigsessionControlSerialization_Epilogue; + // migconfigsessionIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body + pThis->__migconfigsessionIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_migconfigsessionIsPartialUnmapSupported; - pThis->__migconfigsessionControl_Epilogue__ = &__nvoc_thunk_RmResource_migconfigsessionControl_Epilogue; + // migconfigsessionMapTo -- virtual inherited (res) base (rmres) + pThis->__migconfigsessionMapTo__ = &__nvoc_up_thunk_RsResource_migconfigsessionMapTo; - pThis->__migconfigsessionUnmapFrom__ = &__nvoc_thunk_RsResource_migconfigsessionUnmapFrom; + // migconfigsessionUnmapFrom -- virtual inherited (res) base (rmres) + pThis->__migconfigsessionUnmapFrom__ = &__nvoc_up_thunk_RsResource_migconfigsessionUnmapFrom; - pThis->__migconfigsessionMap__ = &__nvoc_thunk_RsResource_migconfigsessionMap; + // migconfigsessionGetRefCount -- virtual inherited (res) base (rmres) + pThis->__migconfigsessionGetRefCount__ = &__nvoc_up_thunk_RsResource_migconfigsessionGetRefCount; - pThis->__migconfigsessionAccessCallback__ = &__nvoc_thunk_RmResource_migconfigsessionAccessCallback; -} + // migconfigsessionAddAdditionalDependants -- virtual inherited (res) base (rmres) + pThis->__migconfigsessionAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_migconfigsessionAddAdditionalDependants; +} // End __nvoc_init_funcTable_MIGConfigSession_1 with approximately 21 basic block(s). + +// Initialize vtable(s) for 21 virtual method(s). void __nvoc_init_funcTable_MIGConfigSession(MIGConfigSession *pThis) { + + // Initialize vtable(s) with 21 per-object function pointer(s). __nvoc_init_funcTable_MIGConfigSession_1(pThis); } diff --git a/src/nvidia/generated/g_mig_config_session_nvoc.h b/src/nvidia/generated/g_mig_config_session_nvoc.h index f261f0d0ba..f54e5abbd5 100644 --- a/src/nvidia/generated/g_mig_config_session_nvoc.h +++ b/src/nvidia/generated/g_mig_config_session_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_MIG_CONFIG_SESSION_NVOC_H_ #define _G_MIG_CONFIG_SESSION_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -40,6 +47,7 @@ extern "C" { * - RmApi lock must be held. *****************************************************************************/ +#pragma once #include "g_mig_config_session_nvoc.h" #ifndef MIG_CONFIG_SESSION_H @@ -62,35 +70,46 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct MIGConfigSession { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct MIGConfigSession *__nvoc_pbase_MIGConfigSession; - NvBool (*__migconfigsessionShareCallback__)(struct MIGConfigSession *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__migconfigsessionCheckMemInterUnmap__)(struct MIGConfigSession *, NvBool); - NV_STATUS (*__migconfigsessionControl__)(struct MIGConfigSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__migconfigsessionGetMemInterMapParams__)(struct MIGConfigSession *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__migconfigsessionGetMemoryMappingDescriptor__)(struct MIGConfigSession *, struct MEMORY_DESCRIPTOR **); - NvU32 (*__migconfigsessionGetRefCount__)(struct MIGConfigSession *); - NV_STATUS (*__migconfigsessionControlFilter__)(struct MIGConfigSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__migconfigsessionAddAdditionalDependants__)(struct RsClient *, struct MIGConfigSession *, RsResourceRef *); - NV_STATUS (*__migconfigsessionControlSerialization_Prologue__)(struct MIGConfigSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__migconfigsessionControl_Prologue__)(struct MIGConfigSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__migconfigsessionCanCopy__)(struct MIGConfigSession *); - NV_STATUS (*__migconfigsessionUnmap__)(struct MIGConfigSession *, struct CALL_CONTEXT *, RsCpuMapping *); - NvBool (*__migconfigsessionIsPartialUnmapSupported__)(struct MIGConfigSession *); - void (*__migconfigsessionPreDestruct__)(struct MIGConfigSession *); - NV_STATUS (*__migconfigsessionMapTo__)(struct MIGConfigSession *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__migconfigsessionIsDuplicate__)(struct MIGConfigSession *, NvHandle, NvBool *); - void (*__migconfigsessionControlSerialization_Epilogue__)(struct MIGConfigSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__migconfigsessionControl_Epilogue__)(struct MIGConfigSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__migconfigsessionUnmapFrom__)(struct MIGConfigSession *, RS_RES_UNMAP_FROM_PARAMS *); - NV_STATUS (*__migconfigsessionMap__)(struct MIGConfigSession *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__migconfigsessionAccessCallback__)(struct MIGConfigSession *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^3 + struct RsResource *__nvoc_pbase_RsResource; // res super^2 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^2 + struct RmResource *__nvoc_pbase_RmResource; // rmres super + struct MIGConfigSession *__nvoc_pbase_MIGConfigSession; // migconfigsession + + // Vtable with 21 per-object function pointers + NvBool (*__migconfigsessionAccessCallback__)(struct MIGConfigSession * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) + NvBool (*__migconfigsessionShareCallback__)(struct MIGConfigSession * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__migconfigsessionGetMemInterMapParams__)(struct MIGConfigSession * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__migconfigsessionCheckMemInterUnmap__)(struct MIGConfigSession * /*this*/, NvBool); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__migconfigsessionGetMemoryMappingDescriptor__)(struct MIGConfigSession * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__migconfigsessionControlSerialization_Prologue__)(struct MIGConfigSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__migconfigsessionControlSerialization_Epilogue__)(struct MIGConfigSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__migconfigsessionControl_Prologue__)(struct MIGConfigSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__migconfigsessionControl_Epilogue__)(struct MIGConfigSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NvBool (*__migconfigsessionCanCopy__)(struct MIGConfigSession * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__migconfigsessionIsDuplicate__)(struct MIGConfigSession * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (rmres) + void (*__migconfigsessionPreDestruct__)(struct MIGConfigSession * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__migconfigsessionControl__)(struct MIGConfigSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__migconfigsessionControlFilter__)(struct MIGConfigSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__migconfigsessionMap__)(struct MIGConfigSession * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NV_STATUS (*__migconfigsessionUnmap__)(struct MIGConfigSession * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NvBool (*__migconfigsessionIsPartialUnmapSupported__)(struct MIGConfigSession * /*this*/); // inline virtual inherited (res) base (rmres) body + NV_STATUS (*__migconfigsessionMapTo__)(struct MIGConfigSession * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) + NV_STATUS (*__migconfigsessionUnmapFrom__)(struct MIGConfigSession * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) + NvU32 (*__migconfigsessionGetRefCount__)(struct MIGConfigSession * /*this*/); // virtual inherited (res) base (rmres) + void (*__migconfigsessionAddAdditionalDependants__)(struct RsClient *, struct MIGConfigSession * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) + + // Data members NvU64 PRIVATE_FIELD(dupedCapDescriptor); }; @@ -103,6 +122,7 @@ typedef struct MIGConfigSession MIGConfigSession; #define __nvoc_class_id_MIGConfigSession 0x36a941 #endif /* __nvoc_class_id_MIGConfigSession */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_MIGConfigSession; #define __staticCast_MIGConfigSession(pThis) \ @@ -115,116 +135,140 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_MIGConfigSession; ((MIGConfigSession*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(MIGConfigSession))) #endif //__nvoc_mig_config_session_h_disabled - NV_STATUS __nvoc_objCreateDynamic_MIGConfigSession(MIGConfigSession**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_MIGConfigSession(MIGConfigSession**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_MIGConfigSession(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_MIGConfigSession((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define migconfigsessionAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define migconfigsessionAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) migconfigsessionAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define migconfigsessionShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ #define migconfigsessionShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) migconfigsessionShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define migconfigsessionCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) migconfigsessionCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define migconfigsessionControl(pResource, pCallContext, pParams) migconfigsessionControl_DISPATCH(pResource, pCallContext, pParams) +#define migconfigsessionGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define migconfigsessionGetMemInterMapParams(pRmResource, pParams) migconfigsessionGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define migconfigsessionCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define migconfigsessionCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) migconfigsessionCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define migconfigsessionGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define migconfigsessionGetMemoryMappingDescriptor(pRmResource, ppMemDesc) migconfigsessionGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define migconfigsessionGetRefCount(pResource) migconfigsessionGetRefCount_DISPATCH(pResource) -#define migconfigsessionControlFilter(pResource, pCallContext, pParams) migconfigsessionControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define migconfigsessionAddAdditionalDependants(pClient, pResource, pReference) migconfigsessionAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define migconfigsessionControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define migconfigsessionControlSerialization_Prologue(pResource, pCallContext, pParams) migconfigsessionControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define migconfigsessionControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define migconfigsessionControlSerialization_Epilogue(pResource, pCallContext, pParams) migconfigsessionControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define migconfigsessionControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ #define migconfigsessionControl_Prologue(pResource, pCallContext, pParams) migconfigsessionControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define migconfigsessionControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define migconfigsessionControl_Epilogue(pResource, pCallContext, pParams) migconfigsessionControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define migconfigsessionCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define migconfigsessionCanCopy(pResource) migconfigsessionCanCopy_DISPATCH(pResource) +#define migconfigsessionIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define migconfigsessionIsDuplicate(pResource, hMemory, pDuplicate) migconfigsessionIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define migconfigsessionPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define migconfigsessionPreDestruct(pResource) migconfigsessionPreDestruct_DISPATCH(pResource) +#define migconfigsessionControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define migconfigsessionControl(pResource, pCallContext, pParams) migconfigsessionControl_DISPATCH(pResource, pCallContext, pParams) +#define migconfigsessionControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define migconfigsessionControlFilter(pResource, pCallContext, pParams) migconfigsessionControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define migconfigsessionMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define migconfigsessionMap(pResource, pCallContext, pParams, pCpuMapping) migconfigsessionMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define migconfigsessionUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ #define migconfigsessionUnmap(pResource, pCallContext, pCpuMapping) migconfigsessionUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define migconfigsessionIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ #define migconfigsessionIsPartialUnmapSupported(pResource) migconfigsessionIsPartialUnmapSupported_DISPATCH(pResource) -#define migconfigsessionPreDestruct(pResource) migconfigsessionPreDestruct_DISPATCH(pResource) +#define migconfigsessionMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ #define migconfigsessionMapTo(pResource, pParams) migconfigsessionMapTo_DISPATCH(pResource, pParams) -#define migconfigsessionIsDuplicate(pResource, hMemory, pDuplicate) migconfigsessionIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define migconfigsessionControlSerialization_Epilogue(pResource, pCallContext, pParams) migconfigsessionControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define migconfigsessionControl_Epilogue(pResource, pCallContext, pParams) migconfigsessionControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define migconfigsessionUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ #define migconfigsessionUnmapFrom(pResource, pParams) migconfigsessionUnmapFrom_DISPATCH(pResource, pParams) -#define migconfigsessionMap(pResource, pCallContext, pParams, pCpuMapping) migconfigsessionMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define migconfigsessionAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) migconfigsessionAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -static inline NvBool migconfigsessionShareCallback_DISPATCH(struct MIGConfigSession *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__migconfigsessionShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} +#define migconfigsessionGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define migconfigsessionGetRefCount(pResource) migconfigsessionGetRefCount_DISPATCH(pResource) +#define migconfigsessionAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define migconfigsessionAddAdditionalDependants(pClient, pResource, pReference) migconfigsessionAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -static inline NV_STATUS migconfigsessionCheckMemInterUnmap_DISPATCH(struct MIGConfigSession *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__migconfigsessionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +// Dispatch functions +static inline NvBool migconfigsessionAccessCallback_DISPATCH(struct MIGConfigSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__migconfigsessionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS migconfigsessionControl_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__migconfigsessionControl__(pResource, pCallContext, pParams); +static inline NvBool migconfigsessionShareCallback_DISPATCH(struct MIGConfigSession *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__migconfigsessionShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS migconfigsessionGetMemInterMapParams_DISPATCH(struct MIGConfigSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__migconfigsessionGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS migconfigsessionGetMemoryMappingDescriptor_DISPATCH(struct MIGConfigSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__migconfigsessionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); -} - -static inline NvU32 migconfigsessionGetRefCount_DISPATCH(struct MIGConfigSession *pResource) { - return pResource->__migconfigsessionGetRefCount__(pResource); -} - -static inline NV_STATUS migconfigsessionControlFilter_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__migconfigsessionControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS migconfigsessionCheckMemInterUnmap_DISPATCH(struct MIGConfigSession *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__migconfigsessionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline void migconfigsessionAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MIGConfigSession *pResource, RsResourceRef *pReference) { - pResource->__migconfigsessionAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS migconfigsessionGetMemoryMappingDescriptor_DISPATCH(struct MIGConfigSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__migconfigsessionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS migconfigsessionControlSerialization_Prologue_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__migconfigsessionControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void migconfigsessionControlSerialization_Epilogue_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__migconfigsessionControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + static inline NV_STATUS migconfigsessionControl_Prologue_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__migconfigsessionControl_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool migconfigsessionCanCopy_DISPATCH(struct MIGConfigSession *pResource) { - return pResource->__migconfigsessionCanCopy__(pResource); +static inline void migconfigsessionControl_Epilogue_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__migconfigsessionControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS migconfigsessionUnmap_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__migconfigsessionUnmap__(pResource, pCallContext, pCpuMapping); +static inline NvBool migconfigsessionCanCopy_DISPATCH(struct MIGConfigSession *pResource) { + return pResource->__migconfigsessionCanCopy__(pResource); } -static inline NvBool migconfigsessionIsPartialUnmapSupported_DISPATCH(struct MIGConfigSession *pResource) { - return pResource->__migconfigsessionIsPartialUnmapSupported__(pResource); +static inline NV_STATUS migconfigsessionIsDuplicate_DISPATCH(struct MIGConfigSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__migconfigsessionIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void migconfigsessionPreDestruct_DISPATCH(struct MIGConfigSession *pResource) { pResource->__migconfigsessionPreDestruct__(pResource); } -static inline NV_STATUS migconfigsessionMapTo_DISPATCH(struct MIGConfigSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__migconfigsessionMapTo__(pResource, pParams); +static inline NV_STATUS migconfigsessionControl_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__migconfigsessionControl__(pResource, pCallContext, pParams); } -static inline NV_STATUS migconfigsessionIsDuplicate_DISPATCH(struct MIGConfigSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__migconfigsessionIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS migconfigsessionControlFilter_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__migconfigsessionControlFilter__(pResource, pCallContext, pParams); } -static inline void migconfigsessionControlSerialization_Epilogue_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__migconfigsessionControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS migconfigsessionMap_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__migconfigsessionMap__(pResource, pCallContext, pParams, pCpuMapping); } -static inline void migconfigsessionControl_Epilogue_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__migconfigsessionControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS migconfigsessionUnmap_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pResource->__migconfigsessionUnmap__(pResource, pCallContext, pCpuMapping); +} + +static inline NvBool migconfigsessionIsPartialUnmapSupported_DISPATCH(struct MIGConfigSession *pResource) { + return pResource->__migconfigsessionIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS migconfigsessionMapTo_DISPATCH(struct MIGConfigSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__migconfigsessionMapTo__(pResource, pParams); } static inline NV_STATUS migconfigsessionUnmapFrom_DISPATCH(struct MIGConfigSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return pResource->__migconfigsessionUnmapFrom__(pResource, pParams); } -static inline NV_STATUS migconfigsessionMap_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__migconfigsessionMap__(pResource, pCallContext, pParams, pCpuMapping); +static inline NvU32 migconfigsessionGetRefCount_DISPATCH(struct MIGConfigSession *pResource) { + return pResource->__migconfigsessionGetRefCount__(pResource); } -static inline NvBool migconfigsessionAccessCallback_DISPATCH(struct MIGConfigSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__migconfigsessionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline void migconfigsessionAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MIGConfigSession *pResource, RsResourceRef *pReference) { + pResource->__migconfigsessionAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS migconfigsessionConstruct_IMPL(struct MIGConfigSession *arg_pMIGConfigSession, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_mig_monitor_session_nvoc.c b/src/nvidia/generated/g_mig_monitor_session_nvoc.c index 77c7796369..d090656448 100644 --- a/src/nvidia/generated/g_mig_monitor_session_nvoc.c +++ b/src/nvidia/generated/g_mig_monitor_session_nvoc.c @@ -84,90 +84,114 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MIGMonitorSession = /*pExportInfo=*/ &__nvoc_export_info_MIGMonitorSession }; -static NvBool __nvoc_thunk_RmResource_migmonitorsessionShareCallback(struct MIGMonitorSession *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// 21 up-thunk(s) defined to bridge methods in MIGMonitorSession to superclasses + +// migmonitorsessionAccessCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_migmonitorsessionAccessCallback(struct MIGMonitorSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RmResource_migmonitorsessionCheckMemInterUnmap(struct MIGMonitorSession *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), bSubdeviceHandleProvided); +// migmonitorsessionShareCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_migmonitorsessionShareCallback(struct MIGMonitorSession *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RsResource_migmonitorsessionControl(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControl((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pCallContext, pParams); +// migmonitorsessionGetMemInterMapParams: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_migmonitorsessionGetMemInterMapParams(struct MIGMonitorSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RmResource_migmonitorsessionGetMemInterMapParams(struct MIGMonitorSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pParams); +// migmonitorsessionCheckMemInterUnmap: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_migmonitorsessionCheckMemInterUnmap(struct MIGMonitorSession *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RmResource_migmonitorsessionGetMemoryMappingDescriptor(struct MIGMonitorSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), ppMemDesc); +// migmonitorsessionGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_migmonitorsessionGetMemoryMappingDescriptor(struct MIGMonitorSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), ppMemDesc); } -static NvU32 __nvoc_thunk_RsResource_migmonitorsessionGetRefCount(struct MIGMonitorSession *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset)); +// migmonitorsessionControlSerialization_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_migmonitorsessionControlSerialization_Prologue(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_migmonitorsessionControlFilter(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pCallContext, pParams); +// migmonitorsessionControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_migmonitorsessionControlSerialization_Epilogue(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_migmonitorsessionAddAdditionalDependants(struct RsClient *pClient, struct MIGMonitorSession *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pReference); +// migmonitorsessionControl_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_migmonitorsessionControl_Prologue(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_migmonitorsessionControlSerialization_Prologue(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pCallContext, pParams); +// migmonitorsessionControl_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_migmonitorsessionControl_Epilogue(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_migmonitorsessionControl_Prologue(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pCallContext, pParams); +// migmonitorsessionCanCopy: virtual inherited (res) base (rmres) +static NvBool __nvoc_up_thunk_RsResource_migmonitorsessionCanCopy(struct MIGMonitorSession *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_migmonitorsessionCanCopy(struct MIGMonitorSession *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset)); +// migmonitorsessionIsDuplicate: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionIsDuplicate(struct MIGMonitorSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_migmonitorsessionUnmap(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pCallContext, pCpuMapping); +// migmonitorsessionPreDestruct: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_migmonitorsessionPreDestruct(struct MIGMonitorSession *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_migmonitorsessionIsPartialUnmapSupported(struct MIGMonitorSession *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset)); +// migmonitorsessionControl: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionControl(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_migmonitorsessionPreDestruct(struct MIGMonitorSession *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset)); +// migmonitorsessionControlFilter: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionControlFilter(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_migmonitorsessionMapTo(struct MIGMonitorSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pParams); +// migmonitorsessionMap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionMap(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_migmonitorsessionIsDuplicate(struct MIGMonitorSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), hMemory, pDuplicate); +// migmonitorsessionUnmap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionUnmap(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_RmResource_migmonitorsessionControlSerialization_Epilogue(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pCallContext, pParams); +// migmonitorsessionIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body +static NvBool __nvoc_up_thunk_RsResource_migmonitorsessionIsPartialUnmapSupported(struct MIGMonitorSession *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset)); } -static void __nvoc_thunk_RmResource_migmonitorsessionControl_Epilogue(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pCallContext, pParams); +// migmonitorsessionMapTo: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionMapTo(struct MIGMonitorSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_migmonitorsessionUnmapFrom(struct MIGMonitorSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pParams); +// migmonitorsessionUnmapFrom: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionUnmapFrom(struct MIGMonitorSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_migmonitorsessionMap(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pCallContext, pParams, pCpuMapping); +// migmonitorsessionGetRefCount: virtual inherited (res) base (rmres) +static NvU32 __nvoc_up_thunk_RsResource_migmonitorsessionGetRefCount(struct MIGMonitorSession *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_migmonitorsessionAccessCallback(struct MIGMonitorSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// migmonitorsessionAddAdditionalDependants: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_migmonitorsessionAddAdditionalDependants(struct RsClient *pClient, struct MIGMonitorSession *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_MIGMonitorSession = { /*numEntries=*/ 0, @@ -204,53 +228,79 @@ NV_STATUS __nvoc_ctor_MIGMonitorSession(MIGMonitorSession *pThis, struct CALL_CO return status; } +// Vtable initialization static void __nvoc_init_funcTable_MIGMonitorSession_1(MIGMonitorSession *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - pThis->__migmonitorsessionShareCallback__ = &__nvoc_thunk_RmResource_migmonitorsessionShareCallback; + // migmonitorsessionAccessCallback -- virtual inherited (rmres) base (rmres) + pThis->__migmonitorsessionAccessCallback__ = &__nvoc_up_thunk_RmResource_migmonitorsessionAccessCallback; - pThis->__migmonitorsessionCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_migmonitorsessionCheckMemInterUnmap; + // migmonitorsessionShareCallback -- virtual inherited (rmres) base (rmres) + pThis->__migmonitorsessionShareCallback__ = &__nvoc_up_thunk_RmResource_migmonitorsessionShareCallback; - pThis->__migmonitorsessionControl__ = &__nvoc_thunk_RsResource_migmonitorsessionControl; + // migmonitorsessionGetMemInterMapParams -- virtual inherited (rmres) base (rmres) + pThis->__migmonitorsessionGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_migmonitorsessionGetMemInterMapParams; - pThis->__migmonitorsessionGetMemInterMapParams__ = &__nvoc_thunk_RmResource_migmonitorsessionGetMemInterMapParams; + // migmonitorsessionCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) + pThis->__migmonitorsessionCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_migmonitorsessionCheckMemInterUnmap; - pThis->__migmonitorsessionGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_migmonitorsessionGetMemoryMappingDescriptor; + // migmonitorsessionGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) + pThis->__migmonitorsessionGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_migmonitorsessionGetMemoryMappingDescriptor; - pThis->__migmonitorsessionGetRefCount__ = &__nvoc_thunk_RsResource_migmonitorsessionGetRefCount; + // migmonitorsessionControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__migmonitorsessionControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_migmonitorsessionControlSerialization_Prologue; - pThis->__migmonitorsessionControlFilter__ = &__nvoc_thunk_RsResource_migmonitorsessionControlFilter; + // migmonitorsessionControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__migmonitorsessionControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_migmonitorsessionControlSerialization_Epilogue; - pThis->__migmonitorsessionAddAdditionalDependants__ = &__nvoc_thunk_RsResource_migmonitorsessionAddAdditionalDependants; + // migmonitorsessionControl_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__migmonitorsessionControl_Prologue__ = &__nvoc_up_thunk_RmResource_migmonitorsessionControl_Prologue; - pThis->__migmonitorsessionControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_migmonitorsessionControlSerialization_Prologue; + // migmonitorsessionControl_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__migmonitorsessionControl_Epilogue__ = &__nvoc_up_thunk_RmResource_migmonitorsessionControl_Epilogue; - pThis->__migmonitorsessionControl_Prologue__ = &__nvoc_thunk_RmResource_migmonitorsessionControl_Prologue; + // migmonitorsessionCanCopy -- virtual inherited (res) base (rmres) + pThis->__migmonitorsessionCanCopy__ = &__nvoc_up_thunk_RsResource_migmonitorsessionCanCopy; - pThis->__migmonitorsessionCanCopy__ = &__nvoc_thunk_RsResource_migmonitorsessionCanCopy; + // migmonitorsessionIsDuplicate -- virtual inherited (res) base (rmres) + pThis->__migmonitorsessionIsDuplicate__ = &__nvoc_up_thunk_RsResource_migmonitorsessionIsDuplicate; - pThis->__migmonitorsessionUnmap__ = &__nvoc_thunk_RsResource_migmonitorsessionUnmap; + // migmonitorsessionPreDestruct -- virtual inherited (res) base (rmres) + pThis->__migmonitorsessionPreDestruct__ = &__nvoc_up_thunk_RsResource_migmonitorsessionPreDestruct; - pThis->__migmonitorsessionIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_migmonitorsessionIsPartialUnmapSupported; + // migmonitorsessionControl -- virtual inherited (res) base (rmres) + pThis->__migmonitorsessionControl__ = &__nvoc_up_thunk_RsResource_migmonitorsessionControl; - pThis->__migmonitorsessionPreDestruct__ = &__nvoc_thunk_RsResource_migmonitorsessionPreDestruct; + // migmonitorsessionControlFilter -- virtual inherited (res) base (rmres) + pThis->__migmonitorsessionControlFilter__ = &__nvoc_up_thunk_RsResource_migmonitorsessionControlFilter; - pThis->__migmonitorsessionMapTo__ = &__nvoc_thunk_RsResource_migmonitorsessionMapTo; + // migmonitorsessionMap -- virtual inherited (res) base (rmres) + pThis->__migmonitorsessionMap__ = &__nvoc_up_thunk_RsResource_migmonitorsessionMap; - pThis->__migmonitorsessionIsDuplicate__ = &__nvoc_thunk_RsResource_migmonitorsessionIsDuplicate; + // migmonitorsessionUnmap -- virtual inherited (res) base (rmres) + pThis->__migmonitorsessionUnmap__ = &__nvoc_up_thunk_RsResource_migmonitorsessionUnmap; - pThis->__migmonitorsessionControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_migmonitorsessionControlSerialization_Epilogue; + // migmonitorsessionIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body + pThis->__migmonitorsessionIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_migmonitorsessionIsPartialUnmapSupported; - pThis->__migmonitorsessionControl_Epilogue__ = &__nvoc_thunk_RmResource_migmonitorsessionControl_Epilogue; + // migmonitorsessionMapTo -- virtual inherited (res) base (rmres) + pThis->__migmonitorsessionMapTo__ = &__nvoc_up_thunk_RsResource_migmonitorsessionMapTo; - pThis->__migmonitorsessionUnmapFrom__ = &__nvoc_thunk_RsResource_migmonitorsessionUnmapFrom; + // migmonitorsessionUnmapFrom -- virtual inherited (res) base (rmres) + pThis->__migmonitorsessionUnmapFrom__ = &__nvoc_up_thunk_RsResource_migmonitorsessionUnmapFrom; - pThis->__migmonitorsessionMap__ = &__nvoc_thunk_RsResource_migmonitorsessionMap; + // migmonitorsessionGetRefCount -- virtual inherited (res) base (rmres) + pThis->__migmonitorsessionGetRefCount__ = &__nvoc_up_thunk_RsResource_migmonitorsessionGetRefCount; - pThis->__migmonitorsessionAccessCallback__ = &__nvoc_thunk_RmResource_migmonitorsessionAccessCallback; -} + // migmonitorsessionAddAdditionalDependants -- virtual inherited (res) base (rmres) + pThis->__migmonitorsessionAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_migmonitorsessionAddAdditionalDependants; +} // End __nvoc_init_funcTable_MIGMonitorSession_1 with approximately 21 basic block(s). + +// Initialize vtable(s) for 21 virtual method(s). void __nvoc_init_funcTable_MIGMonitorSession(MIGMonitorSession *pThis) { + + // Initialize vtable(s) with 21 per-object function pointer(s). __nvoc_init_funcTable_MIGMonitorSession_1(pThis); } diff --git a/src/nvidia/generated/g_mig_monitor_session_nvoc.h b/src/nvidia/generated/g_mig_monitor_session_nvoc.h index f44a1f28ca..d04733db55 100644 --- a/src/nvidia/generated/g_mig_monitor_session_nvoc.h +++ b/src/nvidia/generated/g_mig_monitor_session_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_MIG_MONITOR_SESSION_NVOC_H_ #define _G_MIG_MONITOR_SESSION_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -42,6 +49,7 @@ extern "C" { * - RmApi lock must be held. *****************************************************************************/ +#pragma once #include "g_mig_monitor_session_nvoc.h" #ifndef MIG_MONITOR_SESSION_H @@ -63,35 +71,46 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct MIGMonitorSession { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct MIGMonitorSession *__nvoc_pbase_MIGMonitorSession; - NvBool (*__migmonitorsessionShareCallback__)(struct MIGMonitorSession *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__migmonitorsessionCheckMemInterUnmap__)(struct MIGMonitorSession *, NvBool); - NV_STATUS (*__migmonitorsessionControl__)(struct MIGMonitorSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__migmonitorsessionGetMemInterMapParams__)(struct MIGMonitorSession *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__migmonitorsessionGetMemoryMappingDescriptor__)(struct MIGMonitorSession *, struct MEMORY_DESCRIPTOR **); - NvU32 (*__migmonitorsessionGetRefCount__)(struct MIGMonitorSession *); - NV_STATUS (*__migmonitorsessionControlFilter__)(struct MIGMonitorSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__migmonitorsessionAddAdditionalDependants__)(struct RsClient *, struct MIGMonitorSession *, RsResourceRef *); - NV_STATUS (*__migmonitorsessionControlSerialization_Prologue__)(struct MIGMonitorSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__migmonitorsessionControl_Prologue__)(struct MIGMonitorSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__migmonitorsessionCanCopy__)(struct MIGMonitorSession *); - NV_STATUS (*__migmonitorsessionUnmap__)(struct MIGMonitorSession *, struct CALL_CONTEXT *, RsCpuMapping *); - NvBool (*__migmonitorsessionIsPartialUnmapSupported__)(struct MIGMonitorSession *); - void (*__migmonitorsessionPreDestruct__)(struct MIGMonitorSession *); - NV_STATUS (*__migmonitorsessionMapTo__)(struct MIGMonitorSession *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__migmonitorsessionIsDuplicate__)(struct MIGMonitorSession *, NvHandle, NvBool *); - void (*__migmonitorsessionControlSerialization_Epilogue__)(struct MIGMonitorSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__migmonitorsessionControl_Epilogue__)(struct MIGMonitorSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__migmonitorsessionUnmapFrom__)(struct MIGMonitorSession *, RS_RES_UNMAP_FROM_PARAMS *); - NV_STATUS (*__migmonitorsessionMap__)(struct MIGMonitorSession *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__migmonitorsessionAccessCallback__)(struct MIGMonitorSession *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^3 + struct RsResource *__nvoc_pbase_RsResource; // res super^2 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^2 + struct RmResource *__nvoc_pbase_RmResource; // rmres super + struct MIGMonitorSession *__nvoc_pbase_MIGMonitorSession; // migmonitorsession + + // Vtable with 21 per-object function pointers + NvBool (*__migmonitorsessionAccessCallback__)(struct MIGMonitorSession * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) + NvBool (*__migmonitorsessionShareCallback__)(struct MIGMonitorSession * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__migmonitorsessionGetMemInterMapParams__)(struct MIGMonitorSession * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__migmonitorsessionCheckMemInterUnmap__)(struct MIGMonitorSession * /*this*/, NvBool); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__migmonitorsessionGetMemoryMappingDescriptor__)(struct MIGMonitorSession * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__migmonitorsessionControlSerialization_Prologue__)(struct MIGMonitorSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__migmonitorsessionControlSerialization_Epilogue__)(struct MIGMonitorSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__migmonitorsessionControl_Prologue__)(struct MIGMonitorSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__migmonitorsessionControl_Epilogue__)(struct MIGMonitorSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NvBool (*__migmonitorsessionCanCopy__)(struct MIGMonitorSession * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__migmonitorsessionIsDuplicate__)(struct MIGMonitorSession * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (rmres) + void (*__migmonitorsessionPreDestruct__)(struct MIGMonitorSession * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__migmonitorsessionControl__)(struct MIGMonitorSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__migmonitorsessionControlFilter__)(struct MIGMonitorSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__migmonitorsessionMap__)(struct MIGMonitorSession * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NV_STATUS (*__migmonitorsessionUnmap__)(struct MIGMonitorSession * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NvBool (*__migmonitorsessionIsPartialUnmapSupported__)(struct MIGMonitorSession * /*this*/); // inline virtual inherited (res) base (rmres) body + NV_STATUS (*__migmonitorsessionMapTo__)(struct MIGMonitorSession * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) + NV_STATUS (*__migmonitorsessionUnmapFrom__)(struct MIGMonitorSession * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) + NvU32 (*__migmonitorsessionGetRefCount__)(struct MIGMonitorSession * /*this*/); // virtual inherited (res) base (rmres) + void (*__migmonitorsessionAddAdditionalDependants__)(struct RsClient *, struct MIGMonitorSession * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) + + // Data members NvU64 PRIVATE_FIELD(dupedCapDescriptor); }; @@ -104,6 +123,7 @@ typedef struct MIGMonitorSession MIGMonitorSession; #define __nvoc_class_id_MIGMonitorSession 0x29e15c #endif /* __nvoc_class_id_MIGMonitorSession */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_MIGMonitorSession; #define __staticCast_MIGMonitorSession(pThis) \ @@ -116,116 +136,140 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_MIGMonitorSession; ((MIGMonitorSession*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(MIGMonitorSession))) #endif //__nvoc_mig_monitor_session_h_disabled - NV_STATUS __nvoc_objCreateDynamic_MIGMonitorSession(MIGMonitorSession**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_MIGMonitorSession(MIGMonitorSession**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_MIGMonitorSession(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_MIGMonitorSession((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define migmonitorsessionAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define migmonitorsessionAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) migmonitorsessionAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define migmonitorsessionShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ #define migmonitorsessionShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) migmonitorsessionShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define migmonitorsessionCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) migmonitorsessionCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define migmonitorsessionControl(pResource, pCallContext, pParams) migmonitorsessionControl_DISPATCH(pResource, pCallContext, pParams) +#define migmonitorsessionGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define migmonitorsessionGetMemInterMapParams(pRmResource, pParams) migmonitorsessionGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define migmonitorsessionCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define migmonitorsessionCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) migmonitorsessionCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define migmonitorsessionGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define migmonitorsessionGetMemoryMappingDescriptor(pRmResource, ppMemDesc) migmonitorsessionGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define migmonitorsessionGetRefCount(pResource) migmonitorsessionGetRefCount_DISPATCH(pResource) -#define migmonitorsessionControlFilter(pResource, pCallContext, pParams) migmonitorsessionControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define migmonitorsessionAddAdditionalDependants(pClient, pResource, pReference) migmonitorsessionAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define migmonitorsessionControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define migmonitorsessionControlSerialization_Prologue(pResource, pCallContext, pParams) migmonitorsessionControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define migmonitorsessionControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define migmonitorsessionControlSerialization_Epilogue(pResource, pCallContext, pParams) migmonitorsessionControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define migmonitorsessionControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ #define migmonitorsessionControl_Prologue(pResource, pCallContext, pParams) migmonitorsessionControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define migmonitorsessionControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define migmonitorsessionControl_Epilogue(pResource, pCallContext, pParams) migmonitorsessionControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define migmonitorsessionCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define migmonitorsessionCanCopy(pResource) migmonitorsessionCanCopy_DISPATCH(pResource) +#define migmonitorsessionIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define migmonitorsessionIsDuplicate(pResource, hMemory, pDuplicate) migmonitorsessionIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define migmonitorsessionPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define migmonitorsessionPreDestruct(pResource) migmonitorsessionPreDestruct_DISPATCH(pResource) +#define migmonitorsessionControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define migmonitorsessionControl(pResource, pCallContext, pParams) migmonitorsessionControl_DISPATCH(pResource, pCallContext, pParams) +#define migmonitorsessionControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define migmonitorsessionControlFilter(pResource, pCallContext, pParams) migmonitorsessionControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define migmonitorsessionMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define migmonitorsessionMap(pResource, pCallContext, pParams, pCpuMapping) migmonitorsessionMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define migmonitorsessionUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ #define migmonitorsessionUnmap(pResource, pCallContext, pCpuMapping) migmonitorsessionUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define migmonitorsessionIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ #define migmonitorsessionIsPartialUnmapSupported(pResource) migmonitorsessionIsPartialUnmapSupported_DISPATCH(pResource) -#define migmonitorsessionPreDestruct(pResource) migmonitorsessionPreDestruct_DISPATCH(pResource) +#define migmonitorsessionMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ #define migmonitorsessionMapTo(pResource, pParams) migmonitorsessionMapTo_DISPATCH(pResource, pParams) -#define migmonitorsessionIsDuplicate(pResource, hMemory, pDuplicate) migmonitorsessionIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define migmonitorsessionControlSerialization_Epilogue(pResource, pCallContext, pParams) migmonitorsessionControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define migmonitorsessionControl_Epilogue(pResource, pCallContext, pParams) migmonitorsessionControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define migmonitorsessionUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ #define migmonitorsessionUnmapFrom(pResource, pParams) migmonitorsessionUnmapFrom_DISPATCH(pResource, pParams) -#define migmonitorsessionMap(pResource, pCallContext, pParams, pCpuMapping) migmonitorsessionMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define migmonitorsessionAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) migmonitorsessionAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -static inline NvBool migmonitorsessionShareCallback_DISPATCH(struct MIGMonitorSession *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__migmonitorsessionShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} +#define migmonitorsessionGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define migmonitorsessionGetRefCount(pResource) migmonitorsessionGetRefCount_DISPATCH(pResource) +#define migmonitorsessionAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define migmonitorsessionAddAdditionalDependants(pClient, pResource, pReference) migmonitorsessionAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -static inline NV_STATUS migmonitorsessionCheckMemInterUnmap_DISPATCH(struct MIGMonitorSession *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__migmonitorsessionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +// Dispatch functions +static inline NvBool migmonitorsessionAccessCallback_DISPATCH(struct MIGMonitorSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__migmonitorsessionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS migmonitorsessionControl_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__migmonitorsessionControl__(pResource, pCallContext, pParams); +static inline NvBool migmonitorsessionShareCallback_DISPATCH(struct MIGMonitorSession *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__migmonitorsessionShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS migmonitorsessionGetMemInterMapParams_DISPATCH(struct MIGMonitorSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__migmonitorsessionGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS migmonitorsessionGetMemoryMappingDescriptor_DISPATCH(struct MIGMonitorSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__migmonitorsessionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); -} - -static inline NvU32 migmonitorsessionGetRefCount_DISPATCH(struct MIGMonitorSession *pResource) { - return pResource->__migmonitorsessionGetRefCount__(pResource); -} - -static inline NV_STATUS migmonitorsessionControlFilter_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__migmonitorsessionControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS migmonitorsessionCheckMemInterUnmap_DISPATCH(struct MIGMonitorSession *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__migmonitorsessionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline void migmonitorsessionAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MIGMonitorSession *pResource, RsResourceRef *pReference) { - pResource->__migmonitorsessionAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS migmonitorsessionGetMemoryMappingDescriptor_DISPATCH(struct MIGMonitorSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__migmonitorsessionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS migmonitorsessionControlSerialization_Prologue_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__migmonitorsessionControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void migmonitorsessionControlSerialization_Epilogue_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__migmonitorsessionControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + static inline NV_STATUS migmonitorsessionControl_Prologue_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__migmonitorsessionControl_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool migmonitorsessionCanCopy_DISPATCH(struct MIGMonitorSession *pResource) { - return pResource->__migmonitorsessionCanCopy__(pResource); +static inline void migmonitorsessionControl_Epilogue_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__migmonitorsessionControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS migmonitorsessionUnmap_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__migmonitorsessionUnmap__(pResource, pCallContext, pCpuMapping); +static inline NvBool migmonitorsessionCanCopy_DISPATCH(struct MIGMonitorSession *pResource) { + return pResource->__migmonitorsessionCanCopy__(pResource); } -static inline NvBool migmonitorsessionIsPartialUnmapSupported_DISPATCH(struct MIGMonitorSession *pResource) { - return pResource->__migmonitorsessionIsPartialUnmapSupported__(pResource); +static inline NV_STATUS migmonitorsessionIsDuplicate_DISPATCH(struct MIGMonitorSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__migmonitorsessionIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void migmonitorsessionPreDestruct_DISPATCH(struct MIGMonitorSession *pResource) { pResource->__migmonitorsessionPreDestruct__(pResource); } -static inline NV_STATUS migmonitorsessionMapTo_DISPATCH(struct MIGMonitorSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__migmonitorsessionMapTo__(pResource, pParams); +static inline NV_STATUS migmonitorsessionControl_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__migmonitorsessionControl__(pResource, pCallContext, pParams); } -static inline NV_STATUS migmonitorsessionIsDuplicate_DISPATCH(struct MIGMonitorSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__migmonitorsessionIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS migmonitorsessionControlFilter_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__migmonitorsessionControlFilter__(pResource, pCallContext, pParams); } -static inline void migmonitorsessionControlSerialization_Epilogue_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__migmonitorsessionControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS migmonitorsessionMap_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__migmonitorsessionMap__(pResource, pCallContext, pParams, pCpuMapping); } -static inline void migmonitorsessionControl_Epilogue_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__migmonitorsessionControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS migmonitorsessionUnmap_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pResource->__migmonitorsessionUnmap__(pResource, pCallContext, pCpuMapping); +} + +static inline NvBool migmonitorsessionIsPartialUnmapSupported_DISPATCH(struct MIGMonitorSession *pResource) { + return pResource->__migmonitorsessionIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS migmonitorsessionMapTo_DISPATCH(struct MIGMonitorSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__migmonitorsessionMapTo__(pResource, pParams); } static inline NV_STATUS migmonitorsessionUnmapFrom_DISPATCH(struct MIGMonitorSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return pResource->__migmonitorsessionUnmapFrom__(pResource, pParams); } -static inline NV_STATUS migmonitorsessionMap_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__migmonitorsessionMap__(pResource, pCallContext, pParams, pCpuMapping); +static inline NvU32 migmonitorsessionGetRefCount_DISPATCH(struct MIGMonitorSession *pResource) { + return pResource->__migmonitorsessionGetRefCount__(pResource); } -static inline NvBool migmonitorsessionAccessCallback_DISPATCH(struct MIGMonitorSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__migmonitorsessionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline void migmonitorsessionAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MIGMonitorSession *pResource, RsResourceRef *pReference) { + pResource->__migmonitorsessionAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS migmonitorsessionConstruct_IMPL(struct MIGMonitorSession *arg_pMIGMonitorSession, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_mmu_fault_buffer_nvoc.c b/src/nvidia/generated/g_mmu_fault_buffer_nvoc.c index c39de54948..62e3d45c17 100644 --- a/src/nvidia/generated/g_mmu_fault_buffer_nvoc.c +++ b/src/nvidia/generated/g_mmu_fault_buffer_nvoc.c @@ -111,126 +111,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MmuFaultBuffer = /*pExportInfo=*/ &__nvoc_export_info_MmuFaultBuffer }; -static NV_STATUS __nvoc_thunk_MmuFaultBuffer_gpuresMap(struct GpuResource *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return faultbufMap((struct MmuFaultBuffer *)(((unsigned char *)pMmuFaultBuffer) - __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_MmuFaultBuffer_gpuresUnmap(struct GpuResource *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return faultbufUnmap((struct MmuFaultBuffer *)(((unsigned char *)pMmuFaultBuffer) - __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_MmuFaultBuffer_gpuresGetMapAddrSpace(struct GpuResource *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return faultbufGetMapAddrSpace((struct MmuFaultBuffer *)(((unsigned char *)pMmuFaultBuffer) - __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} - -static NvBool __nvoc_thunk_GpuResource_faultbufShareCallback(struct MmuFaultBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_faultbufCheckMemInterUnmap(struct MmuFaultBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_Notifier_faultbufGetOrAllocNotifShare(struct MmuFaultBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_MmuFaultBuffer_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); -} - -static NV_STATUS __nvoc_thunk_RsResource_faultbufMapTo(struct MmuFaultBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset), pParams); -} - -static void __nvoc_thunk_Notifier_faultbufSetNotificationShare(struct MmuFaultBuffer *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_MmuFaultBuffer_Notifier.offset), pNotifShare); -} - -static NvU32 __nvoc_thunk_RsResource_faultbufGetRefCount(struct MmuFaultBuffer *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_faultbufAddAdditionalDependants(struct RsClient *pClient, struct MmuFaultBuffer *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_faultbufControl_Prologue(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_faultbufGetRegBaseOffsetAndSize(struct MmuFaultBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), pGpu, pOffset, pSize); -} - -static NV_STATUS __nvoc_thunk_GpuResource_faultbufInternalControlForward(struct MmuFaultBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), command, pParams, size); -} - -static NV_STATUS __nvoc_thunk_RsResource_faultbufUnmapFrom(struct MmuFaultBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_faultbufControl_Epilogue(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), pCallContext, pParams); -} - -static NvHandle __nvoc_thunk_GpuResource_faultbufGetInternalObjectHandle(struct MmuFaultBuffer *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MmuFaultBuffer_GpuResource.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_faultbufControl(struct MmuFaultBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_faultbufGetMemInterMapParams(struct MmuFaultBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_faultbufGetMemoryMappingDescriptor(struct MmuFaultBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_faultbufControlFilter(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_Notifier_faultbufUnregisterEvent(struct MmuFaultBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_MmuFaultBuffer_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static NV_STATUS __nvoc_thunk_RmResource_faultbufControlSerialization_Prologue(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_faultbufCanCopy(struct MmuFaultBuffer *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_faultbufIsPartialUnmapSupported(struct MmuFaultBuffer *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_faultbufPreDestruct(struct MmuFaultBuffer *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_faultbufIsDuplicate(struct MmuFaultBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_faultbufControlSerialization_Epilogue(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), pCallContext, pParams); -} - -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_faultbufGetNotificationListPtr(struct MmuFaultBuffer *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_MmuFaultBuffer_Notifier.offset)); -} - -static struct NotifShare *__nvoc_thunk_Notifier_faultbufGetNotificationShare(struct MmuFaultBuffer *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_MmuFaultBuffer_Notifier.offset)); -} - -static NvBool __nvoc_thunk_RmResource_faultbufAccessCallback(struct MmuFaultBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -238,12 +118,12 @@ static NvBool __nvoc_thunk_RmResource_faultbufAccessCallback(struct MmuFaultBuff static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MmuFaultBuffer[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) faultbufCtrlCmdFaultbufferGetSize_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0690105u, /*paramSize=*/ sizeof(NVB069_CTRL_FAULTBUFFER_GET_SIZE_PARAMS), @@ -330,6 +210,162 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MmuFault }; +// 3 down-thunk(s) defined to bridge methods in MmuFaultBuffer from superclasses + +// faultbufMap: virtual override (res) base (gpures) +static NV_STATUS __nvoc_down_thunk_MmuFaultBuffer_gpuresMap(struct GpuResource *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return faultbufMap((struct MmuFaultBuffer *)(((unsigned char *) pMmuFaultBuffer) - __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// faultbufUnmap: virtual override (res) base (gpures) +static NV_STATUS __nvoc_down_thunk_MmuFaultBuffer_gpuresUnmap(struct GpuResource *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return faultbufUnmap((struct MmuFaultBuffer *)(((unsigned char *) pMmuFaultBuffer) - __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), pCallContext, pCpuMapping); +} + +// faultbufGetMapAddrSpace: virtual override (gpures) base (gpures) +static NV_STATUS __nvoc_down_thunk_MmuFaultBuffer_gpuresGetMapAddrSpace(struct GpuResource *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return faultbufGetMapAddrSpace((struct MmuFaultBuffer *)(((unsigned char *) pMmuFaultBuffer) - __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + + +// 27 up-thunk(s) defined to bridge methods in MmuFaultBuffer to superclasses + +// faultbufControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_faultbufControl(struct MmuFaultBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), pCallContext, pParams); +} + +// faultbufShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_faultbufShareCallback(struct MmuFaultBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// faultbufGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_faultbufGetRegBaseOffsetAndSize(struct MmuFaultBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), pGpu, pOffset, pSize); +} + +// faultbufInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_faultbufInternalControlForward(struct MmuFaultBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), command, pParams, size); +} + +// faultbufGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_faultbufGetInternalObjectHandle(struct MmuFaultBuffer *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MmuFaultBuffer_GpuResource.offset)); +} + +// faultbufAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_faultbufAccessCallback(struct MmuFaultBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// faultbufGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_faultbufGetMemInterMapParams(struct MmuFaultBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), pParams); +} + +// faultbufCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_faultbufCheckMemInterUnmap(struct MmuFaultBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), bSubdeviceHandleProvided); +} + +// faultbufGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_faultbufGetMemoryMappingDescriptor(struct MmuFaultBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), ppMemDesc); +} + +// faultbufControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_faultbufControlSerialization_Prologue(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), pCallContext, pParams); +} + +// faultbufControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_faultbufControlSerialization_Epilogue(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), pCallContext, pParams); +} + +// faultbufControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_faultbufControl_Prologue(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), pCallContext, pParams); +} + +// faultbufControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_faultbufControl_Epilogue(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), pCallContext, pParams); +} + +// faultbufCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_faultbufCanCopy(struct MmuFaultBuffer *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset)); +} + +// faultbufIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_faultbufIsDuplicate(struct MmuFaultBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset), hMemory, pDuplicate); +} + +// faultbufPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_faultbufPreDestruct(struct MmuFaultBuffer *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset)); +} + +// faultbufControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_faultbufControlFilter(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset), pCallContext, pParams); +} + +// faultbufIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_faultbufIsPartialUnmapSupported(struct MmuFaultBuffer *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset)); +} + +// faultbufMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_faultbufMapTo(struct MmuFaultBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset), pParams); +} + +// faultbufUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_faultbufUnmapFrom(struct MmuFaultBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset), pParams); +} + +// faultbufGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_faultbufGetRefCount(struct MmuFaultBuffer *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset)); +} + +// faultbufAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_faultbufAddAdditionalDependants(struct RsClient *pClient, struct MmuFaultBuffer *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset), pReference); +} + +// faultbufGetNotificationListPtr: virtual inherited (notify) base (notify) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_faultbufGetNotificationListPtr(struct MmuFaultBuffer *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_MmuFaultBuffer_Notifier.offset)); +} + +// faultbufGetNotificationShare: virtual inherited (notify) base (notify) +static struct NotifShare * __nvoc_up_thunk_Notifier_faultbufGetNotificationShare(struct MmuFaultBuffer *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_MmuFaultBuffer_Notifier.offset)); +} + +// faultbufSetNotificationShare: virtual inherited (notify) base (notify) +static void __nvoc_up_thunk_Notifier_faultbufSetNotificationShare(struct MmuFaultBuffer *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_MmuFaultBuffer_Notifier.offset), pNotifShare); +} + +// faultbufUnregisterEvent: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_faultbufUnregisterEvent(struct MmuFaultBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_MmuFaultBuffer_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +} + +// faultbufGetOrAllocNotifShare: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_faultbufGetOrAllocNotifShare(struct MmuFaultBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_MmuFaultBuffer_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_MmuFaultBuffer = { /*numEntries=*/ 6, @@ -373,101 +409,139 @@ NV_STATUS __nvoc_ctor_MmuFaultBuffer(MmuFaultBuffer *pThis, struct CALL_CONTEXT return status; } +// Vtable initialization static void __nvoc_init_funcTable_MmuFaultBuffer_1(MmuFaultBuffer *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // faultbufMap -- virtual override (res) base (gpures) pThis->__faultbufMap__ = &faultbufMap_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresMap__ = &__nvoc_down_thunk_MmuFaultBuffer_gpuresMap; + // faultbufUnmap -- virtual override (res) base (gpures) pThis->__faultbufUnmap__ = &faultbufUnmap_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresUnmap__ = &__nvoc_down_thunk_MmuFaultBuffer_gpuresUnmap; + // faultbufGetMapAddrSpace -- virtual override (gpures) base (gpures) pThis->__faultbufGetMapAddrSpace__ = &faultbufGetMapAddrSpace_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_down_thunk_MmuFaultBuffer_gpuresGetMapAddrSpace; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // faultbufCtrlCmdFaultbufferGetSize -- exported (id=0xb0690105) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__faultbufCtrlCmdFaultbufferGetSize__ = &faultbufCtrlCmdFaultbufferGetSize_IMPL; #endif + // faultbufCtrlCmdFaultbufferGetRegisterMappings -- exported (id=0xb0690106) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__faultbufCtrlCmdFaultbufferGetRegisterMappings__ = &faultbufCtrlCmdFaultbufferGetRegisterMappings_IMPL; #endif + // faultbufCtrlCmdMmuFaultBufferRegisterNonReplayBuf -- exported (id=0xc3690101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__faultbufCtrlCmdMmuFaultBufferRegisterNonReplayBuf__ = &faultbufCtrlCmdMmuFaultBufferRegisterNonReplayBuf_IMPL; #endif + // faultbufCtrlCmdMmuFaultBufferUnregisterNonReplayBuf -- exported (id=0xc3690102) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__faultbufCtrlCmdMmuFaultBufferUnregisterNonReplayBuf__ = &faultbufCtrlCmdMmuFaultBufferUnregisterNonReplayBuf_IMPL; #endif + // faultbufCtrlCmdMmuFaultBufferRegisterReplayBuf -- exported (id=0xc3690103) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__faultbufCtrlCmdMmuFaultBufferRegisterReplayBuf__ = &faultbufCtrlCmdMmuFaultBufferRegisterReplayBuf_IMPL; #endif + // faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf -- exported (id=0xc3690104) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf__ = &faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf_IMPL; #endif - pThis->__nvoc_base_GpuResource.__gpuresMap__ = &__nvoc_thunk_MmuFaultBuffer_gpuresMap; + // faultbufControl -- virtual inherited (gpures) base (gpures) + pThis->__faultbufControl__ = &__nvoc_up_thunk_GpuResource_faultbufControl; - pThis->__nvoc_base_GpuResource.__gpuresUnmap__ = &__nvoc_thunk_MmuFaultBuffer_gpuresUnmap; + // faultbufShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__faultbufShareCallback__ = &__nvoc_up_thunk_GpuResource_faultbufShareCallback; - pThis->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_thunk_MmuFaultBuffer_gpuresGetMapAddrSpace; + // faultbufGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__faultbufGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_faultbufGetRegBaseOffsetAndSize; - pThis->__faultbufShareCallback__ = &__nvoc_thunk_GpuResource_faultbufShareCallback; + // faultbufInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__faultbufInternalControlForward__ = &__nvoc_up_thunk_GpuResource_faultbufInternalControlForward; - pThis->__faultbufCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_faultbufCheckMemInterUnmap; + // faultbufGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__faultbufGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_faultbufGetInternalObjectHandle; - pThis->__faultbufGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_faultbufGetOrAllocNotifShare; + // faultbufAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__faultbufAccessCallback__ = &__nvoc_up_thunk_RmResource_faultbufAccessCallback; - pThis->__faultbufMapTo__ = &__nvoc_thunk_RsResource_faultbufMapTo; + // faultbufGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__faultbufGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_faultbufGetMemInterMapParams; - pThis->__faultbufSetNotificationShare__ = &__nvoc_thunk_Notifier_faultbufSetNotificationShare; + // faultbufCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__faultbufCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_faultbufCheckMemInterUnmap; - pThis->__faultbufGetRefCount__ = &__nvoc_thunk_RsResource_faultbufGetRefCount; + // faultbufGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__faultbufGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_faultbufGetMemoryMappingDescriptor; - pThis->__faultbufAddAdditionalDependants__ = &__nvoc_thunk_RsResource_faultbufAddAdditionalDependants; + // faultbufControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__faultbufControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_faultbufControlSerialization_Prologue; - pThis->__faultbufControl_Prologue__ = &__nvoc_thunk_RmResource_faultbufControl_Prologue; + // faultbufControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__faultbufControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_faultbufControlSerialization_Epilogue; - pThis->__faultbufGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_faultbufGetRegBaseOffsetAndSize; + // faultbufControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__faultbufControl_Prologue__ = &__nvoc_up_thunk_RmResource_faultbufControl_Prologue; - pThis->__faultbufInternalControlForward__ = &__nvoc_thunk_GpuResource_faultbufInternalControlForward; + // faultbufControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__faultbufControl_Epilogue__ = &__nvoc_up_thunk_RmResource_faultbufControl_Epilogue; - pThis->__faultbufUnmapFrom__ = &__nvoc_thunk_RsResource_faultbufUnmapFrom; + // faultbufCanCopy -- virtual inherited (res) base (gpures) + pThis->__faultbufCanCopy__ = &__nvoc_up_thunk_RsResource_faultbufCanCopy; - pThis->__faultbufControl_Epilogue__ = &__nvoc_thunk_RmResource_faultbufControl_Epilogue; + // faultbufIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__faultbufIsDuplicate__ = &__nvoc_up_thunk_RsResource_faultbufIsDuplicate; - pThis->__faultbufGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_faultbufGetInternalObjectHandle; + // faultbufPreDestruct -- virtual inherited (res) base (gpures) + pThis->__faultbufPreDestruct__ = &__nvoc_up_thunk_RsResource_faultbufPreDestruct; - pThis->__faultbufControl__ = &__nvoc_thunk_GpuResource_faultbufControl; + // faultbufControlFilter -- virtual inherited (res) base (gpures) + pThis->__faultbufControlFilter__ = &__nvoc_up_thunk_RsResource_faultbufControlFilter; - pThis->__faultbufGetMemInterMapParams__ = &__nvoc_thunk_RmResource_faultbufGetMemInterMapParams; + // faultbufIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__faultbufIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_faultbufIsPartialUnmapSupported; - pThis->__faultbufGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_faultbufGetMemoryMappingDescriptor; + // faultbufMapTo -- virtual inherited (res) base (gpures) + pThis->__faultbufMapTo__ = &__nvoc_up_thunk_RsResource_faultbufMapTo; - pThis->__faultbufControlFilter__ = &__nvoc_thunk_RsResource_faultbufControlFilter; + // faultbufUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__faultbufUnmapFrom__ = &__nvoc_up_thunk_RsResource_faultbufUnmapFrom; - pThis->__faultbufUnregisterEvent__ = &__nvoc_thunk_Notifier_faultbufUnregisterEvent; + // faultbufGetRefCount -- virtual inherited (res) base (gpures) + pThis->__faultbufGetRefCount__ = &__nvoc_up_thunk_RsResource_faultbufGetRefCount; - pThis->__faultbufControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_faultbufControlSerialization_Prologue; + // faultbufAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__faultbufAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_faultbufAddAdditionalDependants; - pThis->__faultbufCanCopy__ = &__nvoc_thunk_RsResource_faultbufCanCopy; + // faultbufGetNotificationListPtr -- virtual inherited (notify) base (notify) + pThis->__faultbufGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_faultbufGetNotificationListPtr; - pThis->__faultbufIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_faultbufIsPartialUnmapSupported; + // faultbufGetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__faultbufGetNotificationShare__ = &__nvoc_up_thunk_Notifier_faultbufGetNotificationShare; - pThis->__faultbufPreDestruct__ = &__nvoc_thunk_RsResource_faultbufPreDestruct; + // faultbufSetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__faultbufSetNotificationShare__ = &__nvoc_up_thunk_Notifier_faultbufSetNotificationShare; - pThis->__faultbufIsDuplicate__ = &__nvoc_thunk_RsResource_faultbufIsDuplicate; + // faultbufUnregisterEvent -- virtual inherited (notify) base (notify) + pThis->__faultbufUnregisterEvent__ = &__nvoc_up_thunk_Notifier_faultbufUnregisterEvent; - pThis->__faultbufControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_faultbufControlSerialization_Epilogue; + // faultbufGetOrAllocNotifShare -- virtual inherited (notify) base (notify) + pThis->__faultbufGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_faultbufGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_MmuFaultBuffer_1 with approximately 39 basic block(s). - pThis->__faultbufGetNotificationListPtr__ = &__nvoc_thunk_Notifier_faultbufGetNotificationListPtr; - - pThis->__faultbufGetNotificationShare__ = &__nvoc_thunk_Notifier_faultbufGetNotificationShare; - - pThis->__faultbufAccessCallback__ = &__nvoc_thunk_RmResource_faultbufAccessCallback; -} +// Initialize vtable(s) for 36 virtual method(s). void __nvoc_init_funcTable_MmuFaultBuffer(MmuFaultBuffer *pThis) { + + // Initialize vtable(s) with 36 per-object function pointer(s). __nvoc_init_funcTable_MmuFaultBuffer_1(pThis); } diff --git a/src/nvidia/generated/g_mmu_fault_buffer_nvoc.h b/src/nvidia/generated/g_mmu_fault_buffer_nvoc.h index c944fe0204..b0970d9ccd 100644 --- a/src/nvidia/generated/g_mmu_fault_buffer_nvoc.h +++ b/src/nvidia/generated/g_mmu_fault_buffer_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_MMU_FAULT_BUFFER_NVOC_H_ #define _G_MMU_FAULT_BUFFER_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_mmu_fault_buffer_nvoc.h" #ifndef MMU_FAULT_BUFFER_H @@ -53,54 +61,63 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct MmuFaultBuffer { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; struct Notifier __nvoc_base_Notifier; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct MmuFaultBuffer *__nvoc_pbase_MmuFaultBuffer; - NV_STATUS (*__faultbufMap__)(struct MmuFaultBuffer *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NV_STATUS (*__faultbufUnmap__)(struct MmuFaultBuffer *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__faultbufGetMapAddrSpace__)(struct MmuFaultBuffer *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NV_STATUS (*__faultbufCtrlCmdFaultbufferGetSize__)(struct MmuFaultBuffer *, NVB069_CTRL_FAULTBUFFER_GET_SIZE_PARAMS *); - NV_STATUS (*__faultbufCtrlCmdFaultbufferGetRegisterMappings__)(struct MmuFaultBuffer *, NVB069_CTRL_CMD_FAULTBUFFER_GET_REGISTER_MAPPINGS_PARAMS *); - NV_STATUS (*__faultbufCtrlCmdMmuFaultBufferRegisterNonReplayBuf__)(struct MmuFaultBuffer *, NVC369_CTRL_MMU_FAULT_BUFFER_REGISTER_NON_REPLAY_BUF_PARAMS *); - NV_STATUS (*__faultbufCtrlCmdMmuFaultBufferUnregisterNonReplayBuf__)(struct MmuFaultBuffer *, NVC369_CTRL_MMU_FAULT_BUFFER_UNREGISTER_NON_REPLAY_BUF_PARAMS *); - NV_STATUS (*__faultbufCtrlCmdMmuFaultBufferRegisterReplayBuf__)(struct MmuFaultBuffer *, NVC369_CTRL_MMU_FAULT_BUFFER_REGISTER_REPLAY_BUF_PARAMS *); - NV_STATUS (*__faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf__)(struct MmuFaultBuffer *, NVC369_CTRL_MMU_FAULT_BUFFER_UNREGISTER_REPLAY_BUF_PARAMS *); - NvBool (*__faultbufShareCallback__)(struct MmuFaultBuffer *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__faultbufCheckMemInterUnmap__)(struct MmuFaultBuffer *, NvBool); - NV_STATUS (*__faultbufGetOrAllocNotifShare__)(struct MmuFaultBuffer *, NvHandle, NvHandle, struct NotifShare **); - NV_STATUS (*__faultbufMapTo__)(struct MmuFaultBuffer *, RS_RES_MAP_TO_PARAMS *); - void (*__faultbufSetNotificationShare__)(struct MmuFaultBuffer *, struct NotifShare *); - NvU32 (*__faultbufGetRefCount__)(struct MmuFaultBuffer *); - void (*__faultbufAddAdditionalDependants__)(struct RsClient *, struct MmuFaultBuffer *, RsResourceRef *); - NV_STATUS (*__faultbufControl_Prologue__)(struct MmuFaultBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__faultbufGetRegBaseOffsetAndSize__)(struct MmuFaultBuffer *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__faultbufInternalControlForward__)(struct MmuFaultBuffer *, NvU32, void *, NvU32); - NV_STATUS (*__faultbufUnmapFrom__)(struct MmuFaultBuffer *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__faultbufControl_Epilogue__)(struct MmuFaultBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__faultbufGetInternalObjectHandle__)(struct MmuFaultBuffer *); - NV_STATUS (*__faultbufControl__)(struct MmuFaultBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__faultbufGetMemInterMapParams__)(struct MmuFaultBuffer *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__faultbufGetMemoryMappingDescriptor__)(struct MmuFaultBuffer *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__faultbufControlFilter__)(struct MmuFaultBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__faultbufUnregisterEvent__)(struct MmuFaultBuffer *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__faultbufControlSerialization_Prologue__)(struct MmuFaultBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__faultbufCanCopy__)(struct MmuFaultBuffer *); - NvBool (*__faultbufIsPartialUnmapSupported__)(struct MmuFaultBuffer *); - void (*__faultbufPreDestruct__)(struct MmuFaultBuffer *); - NV_STATUS (*__faultbufIsDuplicate__)(struct MmuFaultBuffer *, NvHandle, NvBool *); - void (*__faultbufControlSerialization_Epilogue__)(struct MmuFaultBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__faultbufGetNotificationListPtr__)(struct MmuFaultBuffer *); - struct NotifShare *(*__faultbufGetNotificationShare__)(struct MmuFaultBuffer *); - NvBool (*__faultbufAccessCallback__)(struct MmuFaultBuffer *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct INotifier *__nvoc_pbase_INotifier; // inotify super^2 + struct Notifier *__nvoc_pbase_Notifier; // notify super + struct MmuFaultBuffer *__nvoc_pbase_MmuFaultBuffer; // faultbuf + + // Vtable with 36 per-object function pointers + NV_STATUS (*__faultbufMap__)(struct MmuFaultBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual override (res) base (gpures) + NV_STATUS (*__faultbufUnmap__)(struct MmuFaultBuffer * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual override (res) base (gpures) + NV_STATUS (*__faultbufGetMapAddrSpace__)(struct MmuFaultBuffer * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (gpures) base (gpures) + NV_STATUS (*__faultbufCtrlCmdFaultbufferGetSize__)(struct MmuFaultBuffer * /*this*/, NVB069_CTRL_FAULTBUFFER_GET_SIZE_PARAMS *); // exported (id=0xb0690105) + NV_STATUS (*__faultbufCtrlCmdFaultbufferGetRegisterMappings__)(struct MmuFaultBuffer * /*this*/, NVB069_CTRL_CMD_FAULTBUFFER_GET_REGISTER_MAPPINGS_PARAMS *); // exported (id=0xb0690106) + NV_STATUS (*__faultbufCtrlCmdMmuFaultBufferRegisterNonReplayBuf__)(struct MmuFaultBuffer * /*this*/, NVC369_CTRL_MMU_FAULT_BUFFER_REGISTER_NON_REPLAY_BUF_PARAMS *); // exported (id=0xc3690101) + NV_STATUS (*__faultbufCtrlCmdMmuFaultBufferUnregisterNonReplayBuf__)(struct MmuFaultBuffer * /*this*/, NVC369_CTRL_MMU_FAULT_BUFFER_UNREGISTER_NON_REPLAY_BUF_PARAMS *); // exported (id=0xc3690102) + NV_STATUS (*__faultbufCtrlCmdMmuFaultBufferRegisterReplayBuf__)(struct MmuFaultBuffer * /*this*/, NVC369_CTRL_MMU_FAULT_BUFFER_REGISTER_REPLAY_BUF_PARAMS *); // exported (id=0xc3690103) + NV_STATUS (*__faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf__)(struct MmuFaultBuffer * /*this*/, NVC369_CTRL_MMU_FAULT_BUFFER_UNREGISTER_REPLAY_BUF_PARAMS *); // exported (id=0xc3690104) + NV_STATUS (*__faultbufControl__)(struct MmuFaultBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NvBool (*__faultbufShareCallback__)(struct MmuFaultBuffer * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__faultbufGetRegBaseOffsetAndSize__)(struct MmuFaultBuffer * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__faultbufInternalControlForward__)(struct MmuFaultBuffer * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__faultbufGetInternalObjectHandle__)(struct MmuFaultBuffer * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__faultbufAccessCallback__)(struct MmuFaultBuffer * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__faultbufGetMemInterMapParams__)(struct MmuFaultBuffer * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__faultbufCheckMemInterUnmap__)(struct MmuFaultBuffer * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__faultbufGetMemoryMappingDescriptor__)(struct MmuFaultBuffer * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__faultbufControlSerialization_Prologue__)(struct MmuFaultBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__faultbufControlSerialization_Epilogue__)(struct MmuFaultBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__faultbufControl_Prologue__)(struct MmuFaultBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__faultbufControl_Epilogue__)(struct MmuFaultBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__faultbufCanCopy__)(struct MmuFaultBuffer * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__faultbufIsDuplicate__)(struct MmuFaultBuffer * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__faultbufPreDestruct__)(struct MmuFaultBuffer * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__faultbufControlFilter__)(struct MmuFaultBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__faultbufIsPartialUnmapSupported__)(struct MmuFaultBuffer * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__faultbufMapTo__)(struct MmuFaultBuffer * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__faultbufUnmapFrom__)(struct MmuFaultBuffer * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__faultbufGetRefCount__)(struct MmuFaultBuffer * /*this*/); // virtual inherited (res) base (gpures) + void (*__faultbufAddAdditionalDependants__)(struct RsClient *, struct MmuFaultBuffer * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + PEVENTNOTIFICATION * (*__faultbufGetNotificationListPtr__)(struct MmuFaultBuffer * /*this*/); // virtual inherited (notify) base (notify) + struct NotifShare * (*__faultbufGetNotificationShare__)(struct MmuFaultBuffer * /*this*/); // virtual inherited (notify) base (notify) + void (*__faultbufSetNotificationShare__)(struct MmuFaultBuffer * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) + NV_STATUS (*__faultbufUnregisterEvent__)(struct MmuFaultBuffer * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) + NV_STATUS (*__faultbufGetOrAllocNotifShare__)(struct MmuFaultBuffer * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) }; #ifndef __NVOC_CLASS_MmuFaultBuffer_TYPEDEF__ @@ -112,6 +129,7 @@ typedef struct MmuFaultBuffer MmuFaultBuffer; #define __nvoc_class_id_MmuFaultBuffer 0x7e1829 #endif /* __nvoc_class_id_MmuFaultBuffer */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_MmuFaultBuffer; #define __staticCast_MmuFaultBuffer(pThis) \ @@ -124,211 +142,250 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_MmuFaultBuffer; ((MmuFaultBuffer*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(MmuFaultBuffer))) #endif //__nvoc_mmu_fault_buffer_h_disabled - NV_STATUS __nvoc_objCreateDynamic_MmuFaultBuffer(MmuFaultBuffer**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_MmuFaultBuffer(MmuFaultBuffer**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_MmuFaultBuffer(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_MmuFaultBuffer((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define faultbufMap_FNPTR(pMmuFaultBuffer) pMmuFaultBuffer->__faultbufMap__ #define faultbufMap(pMmuFaultBuffer, pCallContext, pParams, pCpuMapping) faultbufMap_DISPATCH(pMmuFaultBuffer, pCallContext, pParams, pCpuMapping) +#define faultbufUnmap_FNPTR(pMmuFaultBuffer) pMmuFaultBuffer->__faultbufUnmap__ #define faultbufUnmap(pMmuFaultBuffer, pCallContext, pCpuMapping) faultbufUnmap_DISPATCH(pMmuFaultBuffer, pCallContext, pCpuMapping) +#define faultbufGetMapAddrSpace_FNPTR(pMmuFaultBuffer) pMmuFaultBuffer->__faultbufGetMapAddrSpace__ #define faultbufGetMapAddrSpace(pMmuFaultBuffer, pCallContext, mapFlags, pAddrSpace) faultbufGetMapAddrSpace_DISPATCH(pMmuFaultBuffer, pCallContext, mapFlags, pAddrSpace) +#define faultbufCtrlCmdFaultbufferGetSize_FNPTR(pMmuFaultBuffer) pMmuFaultBuffer->__faultbufCtrlCmdFaultbufferGetSize__ #define faultbufCtrlCmdFaultbufferGetSize(pMmuFaultBuffer, pGetParams) faultbufCtrlCmdFaultbufferGetSize_DISPATCH(pMmuFaultBuffer, pGetParams) +#define faultbufCtrlCmdFaultbufferGetRegisterMappings_FNPTR(pMmuFaultBuffer) pMmuFaultBuffer->__faultbufCtrlCmdFaultbufferGetRegisterMappings__ #define faultbufCtrlCmdFaultbufferGetRegisterMappings(pMmuFaultBuffer, pParams) faultbufCtrlCmdFaultbufferGetRegisterMappings_DISPATCH(pMmuFaultBuffer, pParams) +#define faultbufCtrlCmdMmuFaultBufferRegisterNonReplayBuf_FNPTR(pMmuFaultBuffer) pMmuFaultBuffer->__faultbufCtrlCmdMmuFaultBufferRegisterNonReplayBuf__ #define faultbufCtrlCmdMmuFaultBufferRegisterNonReplayBuf(pMmuFaultBuffer, pParams) faultbufCtrlCmdMmuFaultBufferRegisterNonReplayBuf_DISPATCH(pMmuFaultBuffer, pParams) +#define faultbufCtrlCmdMmuFaultBufferUnregisterNonReplayBuf_FNPTR(pMmuFaultBuffer) pMmuFaultBuffer->__faultbufCtrlCmdMmuFaultBufferUnregisterNonReplayBuf__ #define faultbufCtrlCmdMmuFaultBufferUnregisterNonReplayBuf(pMmuFaultBuffer, pParams) faultbufCtrlCmdMmuFaultBufferUnregisterNonReplayBuf_DISPATCH(pMmuFaultBuffer, pParams) +#define faultbufCtrlCmdMmuFaultBufferRegisterReplayBuf_FNPTR(pMmuFaultBuffer) pMmuFaultBuffer->__faultbufCtrlCmdMmuFaultBufferRegisterReplayBuf__ #define faultbufCtrlCmdMmuFaultBufferRegisterReplayBuf(pMmuFaultBuffer, pParams) faultbufCtrlCmdMmuFaultBufferRegisterReplayBuf_DISPATCH(pMmuFaultBuffer, pParams) +#define faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf_FNPTR(pMmuFaultBuffer) pMmuFaultBuffer->__faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf__ #define faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf(pMmuFaultBuffer, pParams) faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf_DISPATCH(pMmuFaultBuffer, pParams) +#define faultbufControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define faultbufControl(pGpuResource, pCallContext, pParams) faultbufControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define faultbufShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define faultbufShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) faultbufShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define faultbufCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) faultbufCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define faultbufGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) faultbufGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -#define faultbufMapTo(pResource, pParams) faultbufMapTo_DISPATCH(pResource, pParams) -#define faultbufSetNotificationShare(pNotifier, pNotifShare) faultbufSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define faultbufGetRefCount(pResource) faultbufGetRefCount_DISPATCH(pResource) -#define faultbufAddAdditionalDependants(pClient, pResource, pReference) faultbufAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define faultbufControl_Prologue(pResource, pCallContext, pParams) faultbufControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define faultbufGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define faultbufGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) faultbufGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define faultbufInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define faultbufInternalControlForward(pGpuResource, command, pParams, size) faultbufInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define faultbufUnmapFrom(pResource, pParams) faultbufUnmapFrom_DISPATCH(pResource, pParams) -#define faultbufControl_Epilogue(pResource, pCallContext, pParams) faultbufControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define faultbufGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define faultbufGetInternalObjectHandle(pGpuResource) faultbufGetInternalObjectHandle_DISPATCH(pGpuResource) -#define faultbufControl(pGpuResource, pCallContext, pParams) faultbufControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define faultbufAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define faultbufAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) faultbufAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define faultbufGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define faultbufGetMemInterMapParams(pRmResource, pParams) faultbufGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define faultbufCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define faultbufCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) faultbufCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define faultbufGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define faultbufGetMemoryMappingDescriptor(pRmResource, ppMemDesc) faultbufGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define faultbufControlFilter(pResource, pCallContext, pParams) faultbufControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define faultbufUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) faultbufUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define faultbufControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define faultbufControlSerialization_Prologue(pResource, pCallContext, pParams) faultbufControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define faultbufControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define faultbufControlSerialization_Epilogue(pResource, pCallContext, pParams) faultbufControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define faultbufControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define faultbufControl_Prologue(pResource, pCallContext, pParams) faultbufControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define faultbufControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define faultbufControl_Epilogue(pResource, pCallContext, pParams) faultbufControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define faultbufCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define faultbufCanCopy(pResource) faultbufCanCopy_DISPATCH(pResource) -#define faultbufIsPartialUnmapSupported(pResource) faultbufIsPartialUnmapSupported_DISPATCH(pResource) -#define faultbufPreDestruct(pResource) faultbufPreDestruct_DISPATCH(pResource) +#define faultbufIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define faultbufIsDuplicate(pResource, hMemory, pDuplicate) faultbufIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define faultbufControlSerialization_Epilogue(pResource, pCallContext, pParams) faultbufControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define faultbufPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define faultbufPreDestruct(pResource) faultbufPreDestruct_DISPATCH(pResource) +#define faultbufControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define faultbufControlFilter(pResource, pCallContext, pParams) faultbufControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define faultbufIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define faultbufIsPartialUnmapSupported(pResource) faultbufIsPartialUnmapSupported_DISPATCH(pResource) +#define faultbufMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define faultbufMapTo(pResource, pParams) faultbufMapTo_DISPATCH(pResource, pParams) +#define faultbufUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define faultbufUnmapFrom(pResource, pParams) faultbufUnmapFrom_DISPATCH(pResource, pParams) +#define faultbufGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define faultbufGetRefCount(pResource) faultbufGetRefCount_DISPATCH(pResource) +#define faultbufAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define faultbufAddAdditionalDependants(pClient, pResource, pReference) faultbufAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define faultbufGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define faultbufGetNotificationListPtr(pNotifier) faultbufGetNotificationListPtr_DISPATCH(pNotifier) +#define faultbufGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ #define faultbufGetNotificationShare(pNotifier) faultbufGetNotificationShare_DISPATCH(pNotifier) -#define faultbufAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) faultbufAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS faultbufMap_IMPL(struct MmuFaultBuffer *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); +#define faultbufSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define faultbufSetNotificationShare(pNotifier, pNotifShare) faultbufSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define faultbufUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define faultbufUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) faultbufUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define faultbufGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define faultbufGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) faultbufGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) +// Dispatch functions static inline NV_STATUS faultbufMap_DISPATCH(struct MmuFaultBuffer *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return pMmuFaultBuffer->__faultbufMap__(pMmuFaultBuffer, pCallContext, pParams, pCpuMapping); } -NV_STATUS faultbufUnmap_IMPL(struct MmuFaultBuffer *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); - static inline NV_STATUS faultbufUnmap_DISPATCH(struct MmuFaultBuffer *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return pMmuFaultBuffer->__faultbufUnmap__(pMmuFaultBuffer, pCallContext, pCpuMapping); } -NV_STATUS faultbufGetMapAddrSpace_IMPL(struct MmuFaultBuffer *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); - static inline NV_STATUS faultbufGetMapAddrSpace_DISPATCH(struct MmuFaultBuffer *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pMmuFaultBuffer->__faultbufGetMapAddrSpace__(pMmuFaultBuffer, pCallContext, mapFlags, pAddrSpace); } -NV_STATUS faultbufCtrlCmdFaultbufferGetSize_IMPL(struct MmuFaultBuffer *pMmuFaultBuffer, NVB069_CTRL_FAULTBUFFER_GET_SIZE_PARAMS *pGetParams); - static inline NV_STATUS faultbufCtrlCmdFaultbufferGetSize_DISPATCH(struct MmuFaultBuffer *pMmuFaultBuffer, NVB069_CTRL_FAULTBUFFER_GET_SIZE_PARAMS *pGetParams) { return pMmuFaultBuffer->__faultbufCtrlCmdFaultbufferGetSize__(pMmuFaultBuffer, pGetParams); } -NV_STATUS faultbufCtrlCmdFaultbufferGetRegisterMappings_IMPL(struct MmuFaultBuffer *pMmuFaultBuffer, NVB069_CTRL_CMD_FAULTBUFFER_GET_REGISTER_MAPPINGS_PARAMS *pParams); - static inline NV_STATUS faultbufCtrlCmdFaultbufferGetRegisterMappings_DISPATCH(struct MmuFaultBuffer *pMmuFaultBuffer, NVB069_CTRL_CMD_FAULTBUFFER_GET_REGISTER_MAPPINGS_PARAMS *pParams) { return pMmuFaultBuffer->__faultbufCtrlCmdFaultbufferGetRegisterMappings__(pMmuFaultBuffer, pParams); } -NV_STATUS faultbufCtrlCmdMmuFaultBufferRegisterNonReplayBuf_IMPL(struct MmuFaultBuffer *pMmuFaultBuffer, NVC369_CTRL_MMU_FAULT_BUFFER_REGISTER_NON_REPLAY_BUF_PARAMS *pParams); - static inline NV_STATUS faultbufCtrlCmdMmuFaultBufferRegisterNonReplayBuf_DISPATCH(struct MmuFaultBuffer *pMmuFaultBuffer, NVC369_CTRL_MMU_FAULT_BUFFER_REGISTER_NON_REPLAY_BUF_PARAMS *pParams) { return pMmuFaultBuffer->__faultbufCtrlCmdMmuFaultBufferRegisterNonReplayBuf__(pMmuFaultBuffer, pParams); } -NV_STATUS faultbufCtrlCmdMmuFaultBufferUnregisterNonReplayBuf_IMPL(struct MmuFaultBuffer *pMmuFaultBuffer, NVC369_CTRL_MMU_FAULT_BUFFER_UNREGISTER_NON_REPLAY_BUF_PARAMS *pParams); - static inline NV_STATUS faultbufCtrlCmdMmuFaultBufferUnregisterNonReplayBuf_DISPATCH(struct MmuFaultBuffer *pMmuFaultBuffer, NVC369_CTRL_MMU_FAULT_BUFFER_UNREGISTER_NON_REPLAY_BUF_PARAMS *pParams) { return pMmuFaultBuffer->__faultbufCtrlCmdMmuFaultBufferUnregisterNonReplayBuf__(pMmuFaultBuffer, pParams); } -NV_STATUS faultbufCtrlCmdMmuFaultBufferRegisterReplayBuf_IMPL(struct MmuFaultBuffer *pMmuFaultBuffer, NVC369_CTRL_MMU_FAULT_BUFFER_REGISTER_REPLAY_BUF_PARAMS *pParams); - static inline NV_STATUS faultbufCtrlCmdMmuFaultBufferRegisterReplayBuf_DISPATCH(struct MmuFaultBuffer *pMmuFaultBuffer, NVC369_CTRL_MMU_FAULT_BUFFER_REGISTER_REPLAY_BUF_PARAMS *pParams) { return pMmuFaultBuffer->__faultbufCtrlCmdMmuFaultBufferRegisterReplayBuf__(pMmuFaultBuffer, pParams); } -NV_STATUS faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf_IMPL(struct MmuFaultBuffer *pMmuFaultBuffer, NVC369_CTRL_MMU_FAULT_BUFFER_UNREGISTER_REPLAY_BUF_PARAMS *pParams); - static inline NV_STATUS faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf_DISPATCH(struct MmuFaultBuffer *pMmuFaultBuffer, NVC369_CTRL_MMU_FAULT_BUFFER_UNREGISTER_REPLAY_BUF_PARAMS *pParams) { return pMmuFaultBuffer->__faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf__(pMmuFaultBuffer, pParams); } +static inline NV_STATUS faultbufControl_DISPATCH(struct MmuFaultBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__faultbufControl__(pGpuResource, pCallContext, pParams); +} + static inline NvBool faultbufShareCallback_DISPATCH(struct MmuFaultBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return pGpuResource->__faultbufShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline NV_STATUS faultbufCheckMemInterUnmap_DISPATCH(struct MmuFaultBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__faultbufCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS faultbufGetRegBaseOffsetAndSize_DISPATCH(struct MmuFaultBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__faultbufGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS faultbufGetOrAllocNotifShare_DISPATCH(struct MmuFaultBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__faultbufGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); +static inline NV_STATUS faultbufInternalControlForward_DISPATCH(struct MmuFaultBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__faultbufInternalControlForward__(pGpuResource, command, pParams, size); } -static inline NV_STATUS faultbufMapTo_DISPATCH(struct MmuFaultBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__faultbufMapTo__(pResource, pParams); +static inline NvHandle faultbufGetInternalObjectHandle_DISPATCH(struct MmuFaultBuffer *pGpuResource) { + return pGpuResource->__faultbufGetInternalObjectHandle__(pGpuResource); } -static inline void faultbufSetNotificationShare_DISPATCH(struct MmuFaultBuffer *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__faultbufSetNotificationShare__(pNotifier, pNotifShare); +static inline NvBool faultbufAccessCallback_DISPATCH(struct MmuFaultBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__faultbufAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NvU32 faultbufGetRefCount_DISPATCH(struct MmuFaultBuffer *pResource) { - return pResource->__faultbufGetRefCount__(pResource); +static inline NV_STATUS faultbufGetMemInterMapParams_DISPATCH(struct MmuFaultBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__faultbufGetMemInterMapParams__(pRmResource, pParams); } -static inline void faultbufAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MmuFaultBuffer *pResource, RsResourceRef *pReference) { - pResource->__faultbufAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS faultbufCheckMemInterUnmap_DISPATCH(struct MmuFaultBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__faultbufCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS faultbufControl_Prologue_DISPATCH(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__faultbufControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS faultbufGetMemoryMappingDescriptor_DISPATCH(struct MmuFaultBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__faultbufGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NV_STATUS faultbufGetRegBaseOffsetAndSize_DISPATCH(struct MmuFaultBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__faultbufGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS faultbufControlSerialization_Prologue_DISPATCH(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__faultbufControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS faultbufInternalControlForward_DISPATCH(struct MmuFaultBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__faultbufInternalControlForward__(pGpuResource, command, pParams, size); +static inline void faultbufControlSerialization_Epilogue_DISPATCH(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__faultbufControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS faultbufUnmapFrom_DISPATCH(struct MmuFaultBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__faultbufUnmapFrom__(pResource, pParams); +static inline NV_STATUS faultbufControl_Prologue_DISPATCH(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__faultbufControl_Prologue__(pResource, pCallContext, pParams); } static inline void faultbufControl_Epilogue_DISPATCH(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { pResource->__faultbufControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NvHandle faultbufGetInternalObjectHandle_DISPATCH(struct MmuFaultBuffer *pGpuResource) { - return pGpuResource->__faultbufGetInternalObjectHandle__(pGpuResource); -} - -static inline NV_STATUS faultbufControl_DISPATCH(struct MmuFaultBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__faultbufControl__(pGpuResource, pCallContext, pParams); +static inline NvBool faultbufCanCopy_DISPATCH(struct MmuFaultBuffer *pResource) { + return pResource->__faultbufCanCopy__(pResource); } -static inline NV_STATUS faultbufGetMemInterMapParams_DISPATCH(struct MmuFaultBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__faultbufGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS faultbufIsDuplicate_DISPATCH(struct MmuFaultBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__faultbufIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS faultbufGetMemoryMappingDescriptor_DISPATCH(struct MmuFaultBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__faultbufGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void faultbufPreDestruct_DISPATCH(struct MmuFaultBuffer *pResource) { + pResource->__faultbufPreDestruct__(pResource); } static inline NV_STATUS faultbufControlFilter_DISPATCH(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__faultbufControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS faultbufUnregisterEvent_DISPATCH(struct MmuFaultBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__faultbufUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline NvBool faultbufIsPartialUnmapSupported_DISPATCH(struct MmuFaultBuffer *pResource) { + return pResource->__faultbufIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS faultbufControlSerialization_Prologue_DISPATCH(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__faultbufControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS faultbufMapTo_DISPATCH(struct MmuFaultBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__faultbufMapTo__(pResource, pParams); } -static inline NvBool faultbufCanCopy_DISPATCH(struct MmuFaultBuffer *pResource) { - return pResource->__faultbufCanCopy__(pResource); +static inline NV_STATUS faultbufUnmapFrom_DISPATCH(struct MmuFaultBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__faultbufUnmapFrom__(pResource, pParams); } -static inline NvBool faultbufIsPartialUnmapSupported_DISPATCH(struct MmuFaultBuffer *pResource) { - return pResource->__faultbufIsPartialUnmapSupported__(pResource); +static inline NvU32 faultbufGetRefCount_DISPATCH(struct MmuFaultBuffer *pResource) { + return pResource->__faultbufGetRefCount__(pResource); } -static inline void faultbufPreDestruct_DISPATCH(struct MmuFaultBuffer *pResource) { - pResource->__faultbufPreDestruct__(pResource); +static inline void faultbufAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MmuFaultBuffer *pResource, RsResourceRef *pReference) { + pResource->__faultbufAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NV_STATUS faultbufIsDuplicate_DISPATCH(struct MmuFaultBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__faultbufIsDuplicate__(pResource, hMemory, pDuplicate); +static inline PEVENTNOTIFICATION * faultbufGetNotificationListPtr_DISPATCH(struct MmuFaultBuffer *pNotifier) { + return pNotifier->__faultbufGetNotificationListPtr__(pNotifier); } -static inline void faultbufControlSerialization_Epilogue_DISPATCH(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__faultbufControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline struct NotifShare * faultbufGetNotificationShare_DISPATCH(struct MmuFaultBuffer *pNotifier) { + return pNotifier->__faultbufGetNotificationShare__(pNotifier); } -static inline PEVENTNOTIFICATION *faultbufGetNotificationListPtr_DISPATCH(struct MmuFaultBuffer *pNotifier) { - return pNotifier->__faultbufGetNotificationListPtr__(pNotifier); +static inline void faultbufSetNotificationShare_DISPATCH(struct MmuFaultBuffer *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__faultbufSetNotificationShare__(pNotifier, pNotifShare); } -static inline struct NotifShare *faultbufGetNotificationShare_DISPATCH(struct MmuFaultBuffer *pNotifier) { - return pNotifier->__faultbufGetNotificationShare__(pNotifier); +static inline NV_STATUS faultbufUnregisterEvent_DISPATCH(struct MmuFaultBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__faultbufUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static inline NvBool faultbufAccessCallback_DISPATCH(struct MmuFaultBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__faultbufAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS faultbufGetOrAllocNotifShare_DISPATCH(struct MmuFaultBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return pNotifier->__faultbufGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } +NV_STATUS faultbufMap_IMPL(struct MmuFaultBuffer *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); + +NV_STATUS faultbufUnmap_IMPL(struct MmuFaultBuffer *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); + +NV_STATUS faultbufGetMapAddrSpace_IMPL(struct MmuFaultBuffer *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); + +NV_STATUS faultbufCtrlCmdFaultbufferGetSize_IMPL(struct MmuFaultBuffer *pMmuFaultBuffer, NVB069_CTRL_FAULTBUFFER_GET_SIZE_PARAMS *pGetParams); + +NV_STATUS faultbufCtrlCmdFaultbufferGetRegisterMappings_IMPL(struct MmuFaultBuffer *pMmuFaultBuffer, NVB069_CTRL_CMD_FAULTBUFFER_GET_REGISTER_MAPPINGS_PARAMS *pParams); + +NV_STATUS faultbufCtrlCmdMmuFaultBufferRegisterNonReplayBuf_IMPL(struct MmuFaultBuffer *pMmuFaultBuffer, NVC369_CTRL_MMU_FAULT_BUFFER_REGISTER_NON_REPLAY_BUF_PARAMS *pParams); + +NV_STATUS faultbufCtrlCmdMmuFaultBufferUnregisterNonReplayBuf_IMPL(struct MmuFaultBuffer *pMmuFaultBuffer, NVC369_CTRL_MMU_FAULT_BUFFER_UNREGISTER_NON_REPLAY_BUF_PARAMS *pParams); + +NV_STATUS faultbufCtrlCmdMmuFaultBufferRegisterReplayBuf_IMPL(struct MmuFaultBuffer *pMmuFaultBuffer, NVC369_CTRL_MMU_FAULT_BUFFER_REGISTER_REPLAY_BUF_PARAMS *pParams); + +NV_STATUS faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf_IMPL(struct MmuFaultBuffer *pMmuFaultBuffer, NVC369_CTRL_MMU_FAULT_BUFFER_UNREGISTER_REPLAY_BUF_PARAMS *pParams); + NV_STATUS faultbufConstruct_IMPL(struct MmuFaultBuffer *arg_pMmuFaultBuffer, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_faultbufConstruct(arg_pMmuFaultBuffer, arg_pCallContext, arg_pParams) faultbufConstruct_IMPL(arg_pMmuFaultBuffer, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_mps_api_nvoc.c b/src/nvidia/generated/g_mps_api_nvoc.c index 2a8b80336a..1f2df00acd 100644 --- a/src/nvidia/generated/g_mps_api_nvoc.c +++ b/src/nvidia/generated/g_mps_api_nvoc.c @@ -84,90 +84,114 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MpsApi = /*pExportInfo=*/ &__nvoc_export_info_MpsApi }; -static NvBool __nvoc_thunk_RmResource_mpsApiShareCallback(struct MpsApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MpsApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// 21 up-thunk(s) defined to bridge methods in MpsApi to superclasses + +// mpsApiAccessCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_mpsApiAccessCallback(struct MpsApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RmResource_mpsApiCheckMemInterUnmap(struct MpsApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MpsApi_RmResource.offset), bSubdeviceHandleProvided); +// mpsApiShareCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_mpsApiShareCallback(struct MpsApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RsResource_mpsApiControl(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControl((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pCallContext, pParams); +// mpsApiGetMemInterMapParams: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_mpsApiGetMemInterMapParams(struct MpsApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MpsApi_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RmResource_mpsApiGetMemInterMapParams(struct MpsApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MpsApi_RmResource.offset), pParams); +// mpsApiCheckMemInterUnmap: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_mpsApiCheckMemInterUnmap(struct MpsApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MpsApi_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RmResource_mpsApiGetMemoryMappingDescriptor(struct MpsApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_MpsApi_RmResource.offset), ppMemDesc); +// mpsApiGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_mpsApiGetMemoryMappingDescriptor(struct MpsApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MpsApi_RmResource.offset), ppMemDesc); } -static NvU32 __nvoc_thunk_RsResource_mpsApiGetRefCount(struct MpsApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MpsApi_RsResource.offset)); +// mpsApiControlSerialization_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_mpsApiControlSerialization_Prologue(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_mpsApiControlFilter(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pCallContext, pParams); +// mpsApiControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_mpsApiControlSerialization_Epilogue(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RmResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_mpsApiAddAdditionalDependants(struct RsClient *pClient, struct MpsApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pReference); +// mpsApiControl_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_mpsApiControl_Prologue(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_mpsApiControlSerialization_Prologue(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MpsApi_RmResource.offset), pCallContext, pParams); +// mpsApiControl_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_mpsApiControl_Epilogue(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_mpsApiControl_Prologue(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MpsApi_RmResource.offset), pCallContext, pParams); +// mpsApiCanCopy: virtual inherited (res) base (rmres) +static NvBool __nvoc_up_thunk_RsResource_mpsApiCanCopy(struct MpsApi *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_mpsApiCanCopy(struct MpsApi *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MpsApi_RsResource.offset)); +// mpsApiIsDuplicate: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_mpsApiIsDuplicate(struct MpsApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_mpsApiUnmap(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pCallContext, pCpuMapping); +// mpsApiPreDestruct: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_mpsApiPreDestruct(struct MpsApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_mpsApiIsPartialUnmapSupported(struct MpsApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MpsApi_RsResource.offset)); +// mpsApiControl: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_mpsApiControl(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_mpsApiPreDestruct(struct MpsApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MpsApi_RsResource.offset)); +// mpsApiControlFilter: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_mpsApiControlFilter(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_mpsApiMapTo(struct MpsApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pParams); +// mpsApiMap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_mpsApiMap(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_mpsApiIsDuplicate(struct MpsApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MpsApi_RsResource.offset), hMemory, pDuplicate); +// mpsApiUnmap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_mpsApiUnmap(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_RmResource_mpsApiControlSerialization_Epilogue(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MpsApi_RmResource.offset), pCallContext, pParams); +// mpsApiIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body +static NvBool __nvoc_up_thunk_RsResource_mpsApiIsPartialUnmapSupported(struct MpsApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset)); } -static void __nvoc_thunk_RmResource_mpsApiControl_Epilogue(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MpsApi_RmResource.offset), pCallContext, pParams); +// mpsApiMapTo: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_mpsApiMapTo(struct MpsApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_mpsApiUnmapFrom(struct MpsApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pParams); +// mpsApiUnmapFrom: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_mpsApiUnmapFrom(struct MpsApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_mpsApiMap(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pCallContext, pParams, pCpuMapping); +// mpsApiGetRefCount: virtual inherited (res) base (rmres) +static NvU32 __nvoc_up_thunk_RsResource_mpsApiGetRefCount(struct MpsApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_mpsApiAccessCallback(struct MpsApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_MpsApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// mpsApiAddAdditionalDependants: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_mpsApiAddAdditionalDependants(struct RsClient *pClient, struct MpsApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_MpsApi = { /*numEntries=*/ 0, @@ -204,53 +228,79 @@ NV_STATUS __nvoc_ctor_MpsApi(MpsApi *pThis, CALL_CONTEXT * arg_pCallContext, str return status; } +// Vtable initialization static void __nvoc_init_funcTable_MpsApi_1(MpsApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - pThis->__mpsApiShareCallback__ = &__nvoc_thunk_RmResource_mpsApiShareCallback; + // mpsApiAccessCallback -- virtual inherited (rmres) base (rmres) + pThis->__mpsApiAccessCallback__ = &__nvoc_up_thunk_RmResource_mpsApiAccessCallback; - pThis->__mpsApiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_mpsApiCheckMemInterUnmap; + // mpsApiShareCallback -- virtual inherited (rmres) base (rmres) + pThis->__mpsApiShareCallback__ = &__nvoc_up_thunk_RmResource_mpsApiShareCallback; - pThis->__mpsApiControl__ = &__nvoc_thunk_RsResource_mpsApiControl; + // mpsApiGetMemInterMapParams -- virtual inherited (rmres) base (rmres) + pThis->__mpsApiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_mpsApiGetMemInterMapParams; - pThis->__mpsApiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_mpsApiGetMemInterMapParams; + // mpsApiCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) + pThis->__mpsApiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_mpsApiCheckMemInterUnmap; - pThis->__mpsApiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_mpsApiGetMemoryMappingDescriptor; + // mpsApiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) + pThis->__mpsApiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_mpsApiGetMemoryMappingDescriptor; - pThis->__mpsApiGetRefCount__ = &__nvoc_thunk_RsResource_mpsApiGetRefCount; + // mpsApiControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__mpsApiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_mpsApiControlSerialization_Prologue; - pThis->__mpsApiControlFilter__ = &__nvoc_thunk_RsResource_mpsApiControlFilter; + // mpsApiControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__mpsApiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_mpsApiControlSerialization_Epilogue; - pThis->__mpsApiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_mpsApiAddAdditionalDependants; + // mpsApiControl_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__mpsApiControl_Prologue__ = &__nvoc_up_thunk_RmResource_mpsApiControl_Prologue; - pThis->__mpsApiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_mpsApiControlSerialization_Prologue; + // mpsApiControl_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__mpsApiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_mpsApiControl_Epilogue; - pThis->__mpsApiControl_Prologue__ = &__nvoc_thunk_RmResource_mpsApiControl_Prologue; + // mpsApiCanCopy -- virtual inherited (res) base (rmres) + pThis->__mpsApiCanCopy__ = &__nvoc_up_thunk_RsResource_mpsApiCanCopy; - pThis->__mpsApiCanCopy__ = &__nvoc_thunk_RsResource_mpsApiCanCopy; + // mpsApiIsDuplicate -- virtual inherited (res) base (rmres) + pThis->__mpsApiIsDuplicate__ = &__nvoc_up_thunk_RsResource_mpsApiIsDuplicate; - pThis->__mpsApiUnmap__ = &__nvoc_thunk_RsResource_mpsApiUnmap; + // mpsApiPreDestruct -- virtual inherited (res) base (rmres) + pThis->__mpsApiPreDestruct__ = &__nvoc_up_thunk_RsResource_mpsApiPreDestruct; - pThis->__mpsApiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_mpsApiIsPartialUnmapSupported; + // mpsApiControl -- virtual inherited (res) base (rmres) + pThis->__mpsApiControl__ = &__nvoc_up_thunk_RsResource_mpsApiControl; - pThis->__mpsApiPreDestruct__ = &__nvoc_thunk_RsResource_mpsApiPreDestruct; + // mpsApiControlFilter -- virtual inherited (res) base (rmres) + pThis->__mpsApiControlFilter__ = &__nvoc_up_thunk_RsResource_mpsApiControlFilter; - pThis->__mpsApiMapTo__ = &__nvoc_thunk_RsResource_mpsApiMapTo; + // mpsApiMap -- virtual inherited (res) base (rmres) + pThis->__mpsApiMap__ = &__nvoc_up_thunk_RsResource_mpsApiMap; - pThis->__mpsApiIsDuplicate__ = &__nvoc_thunk_RsResource_mpsApiIsDuplicate; + // mpsApiUnmap -- virtual inherited (res) base (rmres) + pThis->__mpsApiUnmap__ = &__nvoc_up_thunk_RsResource_mpsApiUnmap; - pThis->__mpsApiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_mpsApiControlSerialization_Epilogue; + // mpsApiIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body + pThis->__mpsApiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_mpsApiIsPartialUnmapSupported; - pThis->__mpsApiControl_Epilogue__ = &__nvoc_thunk_RmResource_mpsApiControl_Epilogue; + // mpsApiMapTo -- virtual inherited (res) base (rmres) + pThis->__mpsApiMapTo__ = &__nvoc_up_thunk_RsResource_mpsApiMapTo; - pThis->__mpsApiUnmapFrom__ = &__nvoc_thunk_RsResource_mpsApiUnmapFrom; + // mpsApiUnmapFrom -- virtual inherited (res) base (rmres) + pThis->__mpsApiUnmapFrom__ = &__nvoc_up_thunk_RsResource_mpsApiUnmapFrom; - pThis->__mpsApiMap__ = &__nvoc_thunk_RsResource_mpsApiMap; + // mpsApiGetRefCount -- virtual inherited (res) base (rmres) + pThis->__mpsApiGetRefCount__ = &__nvoc_up_thunk_RsResource_mpsApiGetRefCount; - pThis->__mpsApiAccessCallback__ = &__nvoc_thunk_RmResource_mpsApiAccessCallback; -} + // mpsApiAddAdditionalDependants -- virtual inherited (res) base (rmres) + pThis->__mpsApiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_mpsApiAddAdditionalDependants; +} // End __nvoc_init_funcTable_MpsApi_1 with approximately 21 basic block(s). + +// Initialize vtable(s) for 21 virtual method(s). void __nvoc_init_funcTable_MpsApi(MpsApi *pThis) { + + // Initialize vtable(s) with 21 per-object function pointer(s). __nvoc_init_funcTable_MpsApi_1(pThis); } diff --git a/src/nvidia/generated/g_mps_api_nvoc.h b/src/nvidia/generated/g_mps_api_nvoc.h index 0029b9a105..80c4ccd0db 100644 --- a/src/nvidia/generated/g_mps_api_nvoc.h +++ b/src/nvidia/generated/g_mps_api_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_MPS_API_NVOC_H_ #define _G_MPS_API_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -39,6 +46,7 @@ extern "C" { * *****************************************************************************/ +#pragma once #include "g_mps_api_nvoc.h" #ifndef _MPSAPI_H_ @@ -67,35 +75,44 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct MpsApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct MpsApi *__nvoc_pbase_MpsApi; - NvBool (*__mpsApiShareCallback__)(struct MpsApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__mpsApiCheckMemInterUnmap__)(struct MpsApi *, NvBool); - NV_STATUS (*__mpsApiControl__)(struct MpsApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__mpsApiGetMemInterMapParams__)(struct MpsApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__mpsApiGetMemoryMappingDescriptor__)(struct MpsApi *, struct MEMORY_DESCRIPTOR **); - NvU32 (*__mpsApiGetRefCount__)(struct MpsApi *); - NV_STATUS (*__mpsApiControlFilter__)(struct MpsApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__mpsApiAddAdditionalDependants__)(struct RsClient *, struct MpsApi *, RsResourceRef *); - NV_STATUS (*__mpsApiControlSerialization_Prologue__)(struct MpsApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__mpsApiControl_Prologue__)(struct MpsApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__mpsApiCanCopy__)(struct MpsApi *); - NV_STATUS (*__mpsApiUnmap__)(struct MpsApi *, struct CALL_CONTEXT *, RsCpuMapping *); - NvBool (*__mpsApiIsPartialUnmapSupported__)(struct MpsApi *); - void (*__mpsApiPreDestruct__)(struct MpsApi *); - NV_STATUS (*__mpsApiMapTo__)(struct MpsApi *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__mpsApiIsDuplicate__)(struct MpsApi *, NvHandle, NvBool *); - void (*__mpsApiControlSerialization_Epilogue__)(struct MpsApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__mpsApiControl_Epilogue__)(struct MpsApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__mpsApiUnmapFrom__)(struct MpsApi *, RS_RES_UNMAP_FROM_PARAMS *); - NV_STATUS (*__mpsApiMap__)(struct MpsApi *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__mpsApiAccessCallback__)(struct MpsApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^3 + struct RsResource *__nvoc_pbase_RsResource; // res super^2 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^2 + struct RmResource *__nvoc_pbase_RmResource; // rmres super + struct MpsApi *__nvoc_pbase_MpsApi; // mpsApi + + // Vtable with 21 per-object function pointers + NvBool (*__mpsApiAccessCallback__)(struct MpsApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) + NvBool (*__mpsApiShareCallback__)(struct MpsApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__mpsApiGetMemInterMapParams__)(struct MpsApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__mpsApiCheckMemInterUnmap__)(struct MpsApi * /*this*/, NvBool); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__mpsApiGetMemoryMappingDescriptor__)(struct MpsApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__mpsApiControlSerialization_Prologue__)(struct MpsApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__mpsApiControlSerialization_Epilogue__)(struct MpsApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__mpsApiControl_Prologue__)(struct MpsApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__mpsApiControl_Epilogue__)(struct MpsApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NvBool (*__mpsApiCanCopy__)(struct MpsApi * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__mpsApiIsDuplicate__)(struct MpsApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (rmres) + void (*__mpsApiPreDestruct__)(struct MpsApi * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__mpsApiControl__)(struct MpsApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__mpsApiControlFilter__)(struct MpsApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__mpsApiMap__)(struct MpsApi * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NV_STATUS (*__mpsApiUnmap__)(struct MpsApi * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NvBool (*__mpsApiIsPartialUnmapSupported__)(struct MpsApi * /*this*/); // inline virtual inherited (res) base (rmres) body + NV_STATUS (*__mpsApiMapTo__)(struct MpsApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) + NV_STATUS (*__mpsApiUnmapFrom__)(struct MpsApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) + NvU32 (*__mpsApiGetRefCount__)(struct MpsApi * /*this*/); // virtual inherited (res) base (rmres) + void (*__mpsApiAddAdditionalDependants__)(struct RsClient *, struct MpsApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) }; #ifndef __NVOC_CLASS_MpsApi_TYPEDEF__ @@ -107,6 +124,7 @@ typedef struct MpsApi MpsApi; #define __nvoc_class_id_MpsApi 0x22ce42 #endif /* __nvoc_class_id_MpsApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_MpsApi; #define __staticCast_MpsApi(pThis) \ @@ -119,116 +137,140 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_MpsApi; ((MpsApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(MpsApi))) #endif //__nvoc_mps_api_h_disabled - NV_STATUS __nvoc_objCreateDynamic_MpsApi(MpsApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_MpsApi(MpsApi**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_MpsApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_MpsApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define mpsApiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define mpsApiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) mpsApiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define mpsApiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ #define mpsApiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) mpsApiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define mpsApiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) mpsApiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define mpsApiControl(pResource, pCallContext, pParams) mpsApiControl_DISPATCH(pResource, pCallContext, pParams) +#define mpsApiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define mpsApiGetMemInterMapParams(pRmResource, pParams) mpsApiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define mpsApiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define mpsApiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) mpsApiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define mpsApiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define mpsApiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) mpsApiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define mpsApiGetRefCount(pResource) mpsApiGetRefCount_DISPATCH(pResource) -#define mpsApiControlFilter(pResource, pCallContext, pParams) mpsApiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define mpsApiAddAdditionalDependants(pClient, pResource, pReference) mpsApiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define mpsApiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define mpsApiControlSerialization_Prologue(pResource, pCallContext, pParams) mpsApiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define mpsApiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define mpsApiControlSerialization_Epilogue(pResource, pCallContext, pParams) mpsApiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define mpsApiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ #define mpsApiControl_Prologue(pResource, pCallContext, pParams) mpsApiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define mpsApiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define mpsApiControl_Epilogue(pResource, pCallContext, pParams) mpsApiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define mpsApiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define mpsApiCanCopy(pResource) mpsApiCanCopy_DISPATCH(pResource) +#define mpsApiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define mpsApiIsDuplicate(pResource, hMemory, pDuplicate) mpsApiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define mpsApiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define mpsApiPreDestruct(pResource) mpsApiPreDestruct_DISPATCH(pResource) +#define mpsApiControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define mpsApiControl(pResource, pCallContext, pParams) mpsApiControl_DISPATCH(pResource, pCallContext, pParams) +#define mpsApiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define mpsApiControlFilter(pResource, pCallContext, pParams) mpsApiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define mpsApiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define mpsApiMap(pResource, pCallContext, pParams, pCpuMapping) mpsApiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define mpsApiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ #define mpsApiUnmap(pResource, pCallContext, pCpuMapping) mpsApiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define mpsApiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ #define mpsApiIsPartialUnmapSupported(pResource) mpsApiIsPartialUnmapSupported_DISPATCH(pResource) -#define mpsApiPreDestruct(pResource) mpsApiPreDestruct_DISPATCH(pResource) +#define mpsApiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ #define mpsApiMapTo(pResource, pParams) mpsApiMapTo_DISPATCH(pResource, pParams) -#define mpsApiIsDuplicate(pResource, hMemory, pDuplicate) mpsApiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define mpsApiControlSerialization_Epilogue(pResource, pCallContext, pParams) mpsApiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define mpsApiControl_Epilogue(pResource, pCallContext, pParams) mpsApiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define mpsApiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ #define mpsApiUnmapFrom(pResource, pParams) mpsApiUnmapFrom_DISPATCH(pResource, pParams) -#define mpsApiMap(pResource, pCallContext, pParams, pCpuMapping) mpsApiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define mpsApiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) mpsApiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -static inline NvBool mpsApiShareCallback_DISPATCH(struct MpsApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__mpsApiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} +#define mpsApiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define mpsApiGetRefCount(pResource) mpsApiGetRefCount_DISPATCH(pResource) +#define mpsApiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define mpsApiAddAdditionalDependants(pClient, pResource, pReference) mpsApiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -static inline NV_STATUS mpsApiCheckMemInterUnmap_DISPATCH(struct MpsApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__mpsApiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +// Dispatch functions +static inline NvBool mpsApiAccessCallback_DISPATCH(struct MpsApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__mpsApiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS mpsApiControl_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__mpsApiControl__(pResource, pCallContext, pParams); +static inline NvBool mpsApiShareCallback_DISPATCH(struct MpsApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__mpsApiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS mpsApiGetMemInterMapParams_DISPATCH(struct MpsApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__mpsApiGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS mpsApiGetMemoryMappingDescriptor_DISPATCH(struct MpsApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__mpsApiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); -} - -static inline NvU32 mpsApiGetRefCount_DISPATCH(struct MpsApi *pResource) { - return pResource->__mpsApiGetRefCount__(pResource); -} - -static inline NV_STATUS mpsApiControlFilter_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__mpsApiControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS mpsApiCheckMemInterUnmap_DISPATCH(struct MpsApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__mpsApiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline void mpsApiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MpsApi *pResource, RsResourceRef *pReference) { - pResource->__mpsApiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS mpsApiGetMemoryMappingDescriptor_DISPATCH(struct MpsApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__mpsApiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS mpsApiControlSerialization_Prologue_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__mpsApiControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void mpsApiControlSerialization_Epilogue_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__mpsApiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + static inline NV_STATUS mpsApiControl_Prologue_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__mpsApiControl_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool mpsApiCanCopy_DISPATCH(struct MpsApi *pResource) { - return pResource->__mpsApiCanCopy__(pResource); +static inline void mpsApiControl_Epilogue_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__mpsApiControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS mpsApiUnmap_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__mpsApiUnmap__(pResource, pCallContext, pCpuMapping); +static inline NvBool mpsApiCanCopy_DISPATCH(struct MpsApi *pResource) { + return pResource->__mpsApiCanCopy__(pResource); } -static inline NvBool mpsApiIsPartialUnmapSupported_DISPATCH(struct MpsApi *pResource) { - return pResource->__mpsApiIsPartialUnmapSupported__(pResource); +static inline NV_STATUS mpsApiIsDuplicate_DISPATCH(struct MpsApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__mpsApiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void mpsApiPreDestruct_DISPATCH(struct MpsApi *pResource) { pResource->__mpsApiPreDestruct__(pResource); } -static inline NV_STATUS mpsApiMapTo_DISPATCH(struct MpsApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__mpsApiMapTo__(pResource, pParams); +static inline NV_STATUS mpsApiControl_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__mpsApiControl__(pResource, pCallContext, pParams); } -static inline NV_STATUS mpsApiIsDuplicate_DISPATCH(struct MpsApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__mpsApiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS mpsApiControlFilter_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__mpsApiControlFilter__(pResource, pCallContext, pParams); } -static inline void mpsApiControlSerialization_Epilogue_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__mpsApiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS mpsApiMap_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__mpsApiMap__(pResource, pCallContext, pParams, pCpuMapping); } -static inline void mpsApiControl_Epilogue_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__mpsApiControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS mpsApiUnmap_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pResource->__mpsApiUnmap__(pResource, pCallContext, pCpuMapping); +} + +static inline NvBool mpsApiIsPartialUnmapSupported_DISPATCH(struct MpsApi *pResource) { + return pResource->__mpsApiIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS mpsApiMapTo_DISPATCH(struct MpsApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__mpsApiMapTo__(pResource, pParams); } static inline NV_STATUS mpsApiUnmapFrom_DISPATCH(struct MpsApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return pResource->__mpsApiUnmapFrom__(pResource, pParams); } -static inline NV_STATUS mpsApiMap_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__mpsApiMap__(pResource, pCallContext, pParams, pCpuMapping); +static inline NvU32 mpsApiGetRefCount_DISPATCH(struct MpsApi *pResource) { + return pResource->__mpsApiGetRefCount__(pResource); } -static inline NvBool mpsApiAccessCallback_DISPATCH(struct MpsApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__mpsApiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline void mpsApiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MpsApi *pResource, RsResourceRef *pReference) { + pResource->__mpsApiAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS mpsApiConstruct_IMPL(struct MpsApi *arg_pMpsApi, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_no_device_mem_nvoc.c b/src/nvidia/generated/g_no_device_mem_nvoc.c index b53bcd0162..5d8d5fabaa 100644 --- a/src/nvidia/generated/g_no_device_mem_nvoc.c +++ b/src/nvidia/generated/g_no_device_mem_nvoc.c @@ -93,110 +93,142 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_NoDeviceMemory = /*pExportInfo=*/ &__nvoc_export_info_NoDeviceMemory }; -static NV_STATUS __nvoc_thunk_NoDeviceMemory_memGetMapAddrSpace(struct Memory *pNoDeviceMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return nodevicememGetMapAddrSpace((struct NoDeviceMemory *)(((unsigned char *)pNoDeviceMemory) - __nvoc_rtti_NoDeviceMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); +// 1 down-thunk(s) defined to bridge methods in NoDeviceMemory from superclasses + +// nodevicememGetMapAddrSpace: virtual override (mem) base (mem) +static NV_STATUS __nvoc_down_thunk_NoDeviceMemory_memGetMapAddrSpace(struct Memory *pNoDeviceMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return nodevicememGetMapAddrSpace((struct NoDeviceMemory *)(((unsigned char *) pNoDeviceMemory) - __nvoc_rtti_NoDeviceMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_Memory_nodevicememCheckMemInterUnmap(struct NoDeviceMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), bSubdeviceHandleProvided); + +// 25 up-thunk(s) defined to bridge methods in NoDeviceMemory to superclasses + +// nodevicememIsDuplicate: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_nodevicememIsDuplicate(struct NoDeviceMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_RmResource_nodevicememShareCallback(struct NoDeviceMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NoDeviceMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// nodevicememControl: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_nodevicememControl(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_nodevicememMapTo(struct NoDeviceMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset), pParams); +// nodevicememMap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_nodevicememMap(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } -static NvBool __nvoc_thunk_Memory_nodevicememIsExportAllowed(struct NoDeviceMemory *pMemory) { - return memIsExportAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset)); +// nodevicememUnmap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_nodevicememUnmap(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), pCallContext, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_nodevicememGetRefCount(struct NoDeviceMemory *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset)); +// nodevicememGetMemInterMapParams: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_nodevicememGetMemInterMapParams(struct NoDeviceMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), pParams); } -static void __nvoc_thunk_RsResource_nodevicememAddAdditionalDependants(struct RsClient *pClient, struct NoDeviceMemory *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset), pReference); +// nodevicememCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_nodevicememCheckMemInterUnmap(struct NoDeviceMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RmResource_nodevicememControl_Prologue(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NoDeviceMemory_RmResource.offset), pCallContext, pParams); +// nodevicememGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_nodevicememGetMemoryMappingDescriptor(struct NoDeviceMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), ppMemDesc); } -static NvBool __nvoc_thunk_Memory_nodevicememIsGpuMapAllowed(struct NoDeviceMemory *pMemory, struct OBJGPU *pGpu) { - return memIsGpuMapAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), pGpu); +// nodevicememCheckCopyPermissions: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_nodevicememCheckCopyPermissions(struct NoDeviceMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), pDstGpu, pDstDevice); } -static NV_STATUS __nvoc_thunk_RsResource_nodevicememUnmapFrom(struct NoDeviceMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset), pParams); +// nodevicememIsReady: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_nodevicememIsReady(struct NoDeviceMemory *pMemory, NvBool bCopyConstructorContext) { + return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), bCopyConstructorContext); } -static void __nvoc_thunk_RmResource_nodevicememControl_Epilogue(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NoDeviceMemory_RmResource.offset), pCallContext, pParams); +// nodevicememIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_nodevicememIsGpuMapAllowed(struct NoDeviceMemory *pMemory, struct OBJGPU *pGpu) { + return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), pGpu); } -static NV_STATUS __nvoc_thunk_Memory_nodevicememControl(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memControl((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), pCallContext, pParams); +// nodevicememIsExportAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_nodevicememIsExportAllowed(struct NoDeviceMemory *pMemory) { + return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset)); } -static NV_STATUS __nvoc_thunk_Memory_nodevicememUnmap(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), pCallContext, pCpuMapping); +// nodevicememAccessCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_nodevicememAccessCallback(struct NoDeviceMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_Memory_nodevicememGetMemInterMapParams(struct NoDeviceMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), pParams); +// nodevicememShareCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_nodevicememShareCallback(struct NoDeviceMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_Memory_nodevicememGetMemoryMappingDescriptor(struct NoDeviceMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), ppMemDesc); +// nodevicememControlSerialization_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_nodevicememControlSerialization_Prologue(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_nodevicememControlFilter(struct NoDeviceMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset), pCallContext, pParams); +// nodevicememControlSerialization_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_nodevicememControlSerialization_Epilogue(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_nodevicememControlSerialization_Prologue(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NoDeviceMemory_RmResource.offset), pCallContext, pParams); +// nodevicememControl_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_nodevicememControl_Prologue(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_nodevicememCanCopy(struct NoDeviceMemory *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset)); +// nodevicememControl_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_nodevicememControl_Epilogue(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_nodevicememIsPartialUnmapSupported(struct NoDeviceMemory *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset)); +// nodevicememCanCopy: virtual inherited (res) base (mem) +static NvBool __nvoc_up_thunk_RsResource_nodevicememCanCopy(struct NoDeviceMemory *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_nodevicememIsReady(struct NoDeviceMemory *pMemory, NvBool bCopyConstructorContext) { - return memIsReady((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), bCopyConstructorContext); +// nodevicememPreDestruct: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_nodevicememPreDestruct(struct NoDeviceMemory *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_nodevicememCheckCopyPermissions(struct NoDeviceMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return memCheckCopyPermissions((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), pDstGpu, pDstDevice); +// nodevicememControlFilter: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_nodevicememControlFilter(struct NoDeviceMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_nodevicememPreDestruct(struct NoDeviceMemory *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset)); +// nodevicememIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body +static NvBool __nvoc_up_thunk_RsResource_nodevicememIsPartialUnmapSupported(struct NoDeviceMemory *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_nodevicememIsDuplicate(struct NoDeviceMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), hMemory, pDuplicate); +// nodevicememMapTo: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_nodevicememMapTo(struct NoDeviceMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_nodevicememControlSerialization_Epilogue(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NoDeviceMemory_RmResource.offset), pCallContext, pParams); +// nodevicememUnmapFrom: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_nodevicememUnmapFrom(struct NoDeviceMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_Memory_nodevicememMap(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), pCallContext, pParams, pCpuMapping); +// nodevicememGetRefCount: virtual inherited (res) base (mem) +static NvU32 __nvoc_up_thunk_RsResource_nodevicememGetRefCount(struct NoDeviceMemory *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_nodevicememAccessCallback(struct NoDeviceMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NoDeviceMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// nodevicememAddAdditionalDependants: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_nodevicememAddAdditionalDependants(struct RsClient *pClient, struct NoDeviceMemory *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_NoDeviceMemory = { /*numEntries=*/ 0, @@ -233,65 +265,95 @@ NV_STATUS __nvoc_ctor_NoDeviceMemory(NoDeviceMemory *pThis, CALL_CONTEXT * arg_p return status; } +// Vtable initialization static void __nvoc_init_funcTable_NoDeviceMemory_1(NoDeviceMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // nodevicememGetMapAddrSpace -- virtual override (mem) base (mem) pThis->__nodevicememGetMapAddrSpace__ = &nodevicememGetMapAddrSpace_IMPL; + pThis->__nvoc_base_Memory.__memGetMapAddrSpace__ = &__nvoc_down_thunk_NoDeviceMemory_memGetMapAddrSpace; - pThis->__nvoc_base_Memory.__memGetMapAddrSpace__ = &__nvoc_thunk_NoDeviceMemory_memGetMapAddrSpace; + // nodevicememIsDuplicate -- virtual inherited (mem) base (mem) + pThis->__nodevicememIsDuplicate__ = &__nvoc_up_thunk_Memory_nodevicememIsDuplicate; - pThis->__nodevicememCheckMemInterUnmap__ = &__nvoc_thunk_Memory_nodevicememCheckMemInterUnmap; + // nodevicememControl -- virtual inherited (mem) base (mem) + pThis->__nodevicememControl__ = &__nvoc_up_thunk_Memory_nodevicememControl; - pThis->__nodevicememShareCallback__ = &__nvoc_thunk_RmResource_nodevicememShareCallback; + // nodevicememMap -- virtual inherited (mem) base (mem) + pThis->__nodevicememMap__ = &__nvoc_up_thunk_Memory_nodevicememMap; - pThis->__nodevicememMapTo__ = &__nvoc_thunk_RsResource_nodevicememMapTo; + // nodevicememUnmap -- virtual inherited (mem) base (mem) + pThis->__nodevicememUnmap__ = &__nvoc_up_thunk_Memory_nodevicememUnmap; - pThis->__nodevicememIsExportAllowed__ = &__nvoc_thunk_Memory_nodevicememIsExportAllowed; + // nodevicememGetMemInterMapParams -- virtual inherited (mem) base (mem) + pThis->__nodevicememGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_nodevicememGetMemInterMapParams; - pThis->__nodevicememGetRefCount__ = &__nvoc_thunk_RsResource_nodevicememGetRefCount; + // nodevicememCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body + pThis->__nodevicememCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_nodevicememCheckMemInterUnmap; - pThis->__nodevicememAddAdditionalDependants__ = &__nvoc_thunk_RsResource_nodevicememAddAdditionalDependants; + // nodevicememGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) + pThis->__nodevicememGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_nodevicememGetMemoryMappingDescriptor; - pThis->__nodevicememControl_Prologue__ = &__nvoc_thunk_RmResource_nodevicememControl_Prologue; + // nodevicememCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body + pThis->__nodevicememCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_nodevicememCheckCopyPermissions; - pThis->__nodevicememIsGpuMapAllowed__ = &__nvoc_thunk_Memory_nodevicememIsGpuMapAllowed; + // nodevicememIsReady -- virtual inherited (mem) base (mem) + pThis->__nodevicememIsReady__ = &__nvoc_up_thunk_Memory_nodevicememIsReady; - pThis->__nodevicememUnmapFrom__ = &__nvoc_thunk_RsResource_nodevicememUnmapFrom; + // nodevicememIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__nodevicememIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_nodevicememIsGpuMapAllowed; - pThis->__nodevicememControl_Epilogue__ = &__nvoc_thunk_RmResource_nodevicememControl_Epilogue; + // nodevicememIsExportAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__nodevicememIsExportAllowed__ = &__nvoc_up_thunk_Memory_nodevicememIsExportAllowed; - pThis->__nodevicememControl__ = &__nvoc_thunk_Memory_nodevicememControl; + // nodevicememAccessCallback -- virtual inherited (rmres) base (mem) + pThis->__nodevicememAccessCallback__ = &__nvoc_up_thunk_RmResource_nodevicememAccessCallback; - pThis->__nodevicememUnmap__ = &__nvoc_thunk_Memory_nodevicememUnmap; + // nodevicememShareCallback -- virtual inherited (rmres) base (mem) + pThis->__nodevicememShareCallback__ = &__nvoc_up_thunk_RmResource_nodevicememShareCallback; - pThis->__nodevicememGetMemInterMapParams__ = &__nvoc_thunk_Memory_nodevicememGetMemInterMapParams; + // nodevicememControlSerialization_Prologue -- virtual inherited (rmres) base (mem) + pThis->__nodevicememControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_nodevicememControlSerialization_Prologue; - pThis->__nodevicememGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_nodevicememGetMemoryMappingDescriptor; + // nodevicememControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__nodevicememControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_nodevicememControlSerialization_Epilogue; - pThis->__nodevicememControlFilter__ = &__nvoc_thunk_RsResource_nodevicememControlFilter; + // nodevicememControl_Prologue -- virtual inherited (rmres) base (mem) + pThis->__nodevicememControl_Prologue__ = &__nvoc_up_thunk_RmResource_nodevicememControl_Prologue; - pThis->__nodevicememControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_nodevicememControlSerialization_Prologue; + // nodevicememControl_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__nodevicememControl_Epilogue__ = &__nvoc_up_thunk_RmResource_nodevicememControl_Epilogue; - pThis->__nodevicememCanCopy__ = &__nvoc_thunk_RsResource_nodevicememCanCopy; + // nodevicememCanCopy -- virtual inherited (res) base (mem) + pThis->__nodevicememCanCopy__ = &__nvoc_up_thunk_RsResource_nodevicememCanCopy; - pThis->__nodevicememIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_nodevicememIsPartialUnmapSupported; + // nodevicememPreDestruct -- virtual inherited (res) base (mem) + pThis->__nodevicememPreDestruct__ = &__nvoc_up_thunk_RsResource_nodevicememPreDestruct; - pThis->__nodevicememIsReady__ = &__nvoc_thunk_Memory_nodevicememIsReady; + // nodevicememControlFilter -- virtual inherited (res) base (mem) + pThis->__nodevicememControlFilter__ = &__nvoc_up_thunk_RsResource_nodevicememControlFilter; - pThis->__nodevicememCheckCopyPermissions__ = &__nvoc_thunk_Memory_nodevicememCheckCopyPermissions; + // nodevicememIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body + pThis->__nodevicememIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_nodevicememIsPartialUnmapSupported; - pThis->__nodevicememPreDestruct__ = &__nvoc_thunk_RsResource_nodevicememPreDestruct; + // nodevicememMapTo -- virtual inherited (res) base (mem) + pThis->__nodevicememMapTo__ = &__nvoc_up_thunk_RsResource_nodevicememMapTo; - pThis->__nodevicememIsDuplicate__ = &__nvoc_thunk_Memory_nodevicememIsDuplicate; + // nodevicememUnmapFrom -- virtual inherited (res) base (mem) + pThis->__nodevicememUnmapFrom__ = &__nvoc_up_thunk_RsResource_nodevicememUnmapFrom; - pThis->__nodevicememControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_nodevicememControlSerialization_Epilogue; + // nodevicememGetRefCount -- virtual inherited (res) base (mem) + pThis->__nodevicememGetRefCount__ = &__nvoc_up_thunk_RsResource_nodevicememGetRefCount; - pThis->__nodevicememMap__ = &__nvoc_thunk_Memory_nodevicememMap; + // nodevicememAddAdditionalDependants -- virtual inherited (res) base (mem) + pThis->__nodevicememAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_nodevicememAddAdditionalDependants; +} // End __nvoc_init_funcTable_NoDeviceMemory_1 with approximately 27 basic block(s). - pThis->__nodevicememAccessCallback__ = &__nvoc_thunk_RmResource_nodevicememAccessCallback; -} +// Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_NoDeviceMemory(NoDeviceMemory *pThis) { + + // Initialize vtable(s) with 26 per-object function pointer(s). __nvoc_init_funcTable_NoDeviceMemory_1(pThis); } diff --git a/src/nvidia/generated/g_no_device_mem_nvoc.h b/src/nvidia/generated/g_no_device_mem_nvoc.h index 4c3326046d..2b8fb722e2 100644 --- a/src/nvidia/generated/g_no_device_mem_nvoc.h +++ b/src/nvidia/generated/g_no_device_mem_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_NO_DEVICE_MEM_NVOC_H_ #define _G_NO_DEVICE_MEM_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_no_device_mem_nvoc.h" #ifndef _NO_DEVICE_MEMORY_H_ @@ -51,41 +59,50 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct NoDeviceMemory { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Memory *__nvoc_pbase_Memory; - struct NoDeviceMemory *__nvoc_pbase_NoDeviceMemory; - NV_STATUS (*__nodevicememGetMapAddrSpace__)(struct NoDeviceMemory *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NV_STATUS (*__nodevicememCheckMemInterUnmap__)(struct NoDeviceMemory *, NvBool); - NvBool (*__nodevicememShareCallback__)(struct NoDeviceMemory *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__nodevicememMapTo__)(struct NoDeviceMemory *, RS_RES_MAP_TO_PARAMS *); - NvBool (*__nodevicememIsExportAllowed__)(struct NoDeviceMemory *); - NvU32 (*__nodevicememGetRefCount__)(struct NoDeviceMemory *); - void (*__nodevicememAddAdditionalDependants__)(struct RsClient *, struct NoDeviceMemory *, RsResourceRef *); - NV_STATUS (*__nodevicememControl_Prologue__)(struct NoDeviceMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__nodevicememIsGpuMapAllowed__)(struct NoDeviceMemory *, struct OBJGPU *); - NV_STATUS (*__nodevicememUnmapFrom__)(struct NoDeviceMemory *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__nodevicememControl_Epilogue__)(struct NoDeviceMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nodevicememControl__)(struct NoDeviceMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nodevicememUnmap__)(struct NoDeviceMemory *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__nodevicememGetMemInterMapParams__)(struct NoDeviceMemory *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__nodevicememGetMemoryMappingDescriptor__)(struct NoDeviceMemory *, MEMORY_DESCRIPTOR **); - NV_STATUS (*__nodevicememControlFilter__)(struct NoDeviceMemory *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nodevicememControlSerialization_Prologue__)(struct NoDeviceMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__nodevicememCanCopy__)(struct NoDeviceMemory *); - NvBool (*__nodevicememIsPartialUnmapSupported__)(struct NoDeviceMemory *); - NV_STATUS (*__nodevicememIsReady__)(struct NoDeviceMemory *, NvBool); - NV_STATUS (*__nodevicememCheckCopyPermissions__)(struct NoDeviceMemory *, struct OBJGPU *, struct Device *); - void (*__nodevicememPreDestruct__)(struct NoDeviceMemory *); - NV_STATUS (*__nodevicememIsDuplicate__)(struct NoDeviceMemory *, NvHandle, NvBool *); - void (*__nodevicememControlSerialization_Epilogue__)(struct NoDeviceMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nodevicememMap__)(struct NoDeviceMemory *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__nodevicememAccessCallback__)(struct NoDeviceMemory *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct Memory *__nvoc_pbase_Memory; // mem super + struct NoDeviceMemory *__nvoc_pbase_NoDeviceMemory; // nodevicemem + + // Vtable with 26 per-object function pointers + NV_STATUS (*__nodevicememGetMapAddrSpace__)(struct NoDeviceMemory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (mem) base (mem) + NV_STATUS (*__nodevicememIsDuplicate__)(struct NoDeviceMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) + NV_STATUS (*__nodevicememControl__)(struct NoDeviceMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (mem) base (mem) + NV_STATUS (*__nodevicememMap__)(struct NoDeviceMemory * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__nodevicememUnmap__)(struct NoDeviceMemory * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__nodevicememGetMemInterMapParams__)(struct NoDeviceMemory * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (mem) base (mem) + NV_STATUS (*__nodevicememCheckMemInterUnmap__)(struct NoDeviceMemory * /*this*/, NvBool); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__nodevicememGetMemoryMappingDescriptor__)(struct NoDeviceMemory * /*this*/, MEMORY_DESCRIPTOR **); // virtual inherited (mem) base (mem) + NV_STATUS (*__nodevicememCheckCopyPermissions__)(struct NoDeviceMemory * /*this*/, struct OBJGPU *, struct Device *); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__nodevicememIsReady__)(struct NoDeviceMemory * /*this*/, NvBool); // virtual inherited (mem) base (mem) + NvBool (*__nodevicememIsGpuMapAllowed__)(struct NoDeviceMemory * /*this*/, struct OBJGPU *); // inline virtual inherited (mem) base (mem) body + NvBool (*__nodevicememIsExportAllowed__)(struct NoDeviceMemory * /*this*/); // inline virtual inherited (mem) base (mem) body + NvBool (*__nodevicememAccessCallback__)(struct NoDeviceMemory * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (mem) + NvBool (*__nodevicememShareCallback__)(struct NoDeviceMemory * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__nodevicememControlSerialization_Prologue__)(struct NoDeviceMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__nodevicememControlSerialization_Epilogue__)(struct NoDeviceMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__nodevicememControl_Prologue__)(struct NoDeviceMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__nodevicememControl_Epilogue__)(struct NoDeviceMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + NvBool (*__nodevicememCanCopy__)(struct NoDeviceMemory * /*this*/); // virtual inherited (res) base (mem) + void (*__nodevicememPreDestruct__)(struct NoDeviceMemory * /*this*/); // virtual inherited (res) base (mem) + NV_STATUS (*__nodevicememControlFilter__)(struct NoDeviceMemory * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (mem) + NvBool (*__nodevicememIsPartialUnmapSupported__)(struct NoDeviceMemory * /*this*/); // inline virtual inherited (res) base (mem) body + NV_STATUS (*__nodevicememMapTo__)(struct NoDeviceMemory * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (mem) + NV_STATUS (*__nodevicememUnmapFrom__)(struct NoDeviceMemory * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (mem) + NvU32 (*__nodevicememGetRefCount__)(struct NoDeviceMemory * /*this*/); // virtual inherited (res) base (mem) + void (*__nodevicememAddAdditionalDependants__)(struct RsClient *, struct NoDeviceMemory * /*this*/, RsResourceRef *); // virtual inherited (res) base (mem) }; #ifndef __NVOC_CLASS_NoDeviceMemory_TYPEDEF__ @@ -97,6 +114,7 @@ typedef struct NoDeviceMemory NoDeviceMemory; #define __nvoc_class_id_NoDeviceMemory 0x6c0832 #endif /* __nvoc_class_id_NoDeviceMemory */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_NoDeviceMemory; #define __staticCast_NoDeviceMemory(pThis) \ @@ -109,144 +127,173 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_NoDeviceMemory; ((NoDeviceMemory*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(NoDeviceMemory))) #endif //__nvoc_no_device_mem_h_disabled - NV_STATUS __nvoc_objCreateDynamic_NoDeviceMemory(NoDeviceMemory**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_NoDeviceMemory(NoDeviceMemory**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_NoDeviceMemory(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_NoDeviceMemory((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define nodevicememGetMapAddrSpace_FNPTR(pNoDeviceMemory) pNoDeviceMemory->__nodevicememGetMapAddrSpace__ #define nodevicememGetMapAddrSpace(pNoDeviceMemory, pCallContext, mapFlags, pAddrSpace) nodevicememGetMapAddrSpace_DISPATCH(pNoDeviceMemory, pCallContext, mapFlags, pAddrSpace) -#define nodevicememCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) nodevicememCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define nodevicememShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) nodevicememShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define nodevicememMapTo(pResource, pParams) nodevicememMapTo_DISPATCH(pResource, pParams) -#define nodevicememIsExportAllowed(pMemory) nodevicememIsExportAllowed_DISPATCH(pMemory) -#define nodevicememGetRefCount(pResource) nodevicememGetRefCount_DISPATCH(pResource) -#define nodevicememAddAdditionalDependants(pClient, pResource, pReference) nodevicememAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define nodevicememControl_Prologue(pResource, pCallContext, pParams) nodevicememControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define nodevicememIsGpuMapAllowed(pMemory, pGpu) nodevicememIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define nodevicememUnmapFrom(pResource, pParams) nodevicememUnmapFrom_DISPATCH(pResource, pParams) -#define nodevicememControl_Epilogue(pResource, pCallContext, pParams) nodevicememControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define nodevicememIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define nodevicememIsDuplicate(pMemory, hMemory, pDuplicate) nodevicememIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) +#define nodevicememControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ #define nodevicememControl(pMemory, pCallContext, pParams) nodevicememControl_DISPATCH(pMemory, pCallContext, pParams) +#define nodevicememMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define nodevicememMap(pMemory, pCallContext, pParams, pCpuMapping) nodevicememMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define nodevicememUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ #define nodevicememUnmap(pMemory, pCallContext, pCpuMapping) nodevicememUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) +#define nodevicememGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ #define nodevicememGetMemInterMapParams(pMemory, pParams) nodevicememGetMemInterMapParams_DISPATCH(pMemory, pParams) +#define nodevicememCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define nodevicememCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) nodevicememCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) +#define nodevicememGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ #define nodevicememGetMemoryMappingDescriptor(pMemory, ppMemDesc) nodevicememGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define nodevicememControlFilter(pResource, pCallContext, pParams) nodevicememControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define nodevicememCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ +#define nodevicememCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) nodevicememCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) +#define nodevicememIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define nodevicememIsReady(pMemory, bCopyConstructorContext) nodevicememIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define nodevicememIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define nodevicememIsGpuMapAllowed(pMemory, pGpu) nodevicememIsGpuMapAllowed_DISPATCH(pMemory, pGpu) +#define nodevicememIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define nodevicememIsExportAllowed(pMemory) nodevicememIsExportAllowed_DISPATCH(pMemory) +#define nodevicememAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define nodevicememAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) nodevicememAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define nodevicememShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define nodevicememShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) nodevicememShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define nodevicememControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define nodevicememControlSerialization_Prologue(pResource, pCallContext, pParams) nodevicememControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define nodevicememControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define nodevicememControlSerialization_Epilogue(pResource, pCallContext, pParams) nodevicememControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define nodevicememControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define nodevicememControl_Prologue(pResource, pCallContext, pParams) nodevicememControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define nodevicememControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define nodevicememControl_Epilogue(pResource, pCallContext, pParams) nodevicememControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define nodevicememCanCopy_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define nodevicememCanCopy(pResource) nodevicememCanCopy_DISPATCH(pResource) -#define nodevicememIsPartialUnmapSupported(pResource) nodevicememIsPartialUnmapSupported_DISPATCH(pResource) -#define nodevicememIsReady(pMemory, bCopyConstructorContext) nodevicememIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define nodevicememCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) nodevicememCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) +#define nodevicememPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ #define nodevicememPreDestruct(pResource) nodevicememPreDestruct_DISPATCH(pResource) -#define nodevicememIsDuplicate(pMemory, hMemory, pDuplicate) nodevicememIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define nodevicememControlSerialization_Epilogue(pResource, pCallContext, pParams) nodevicememControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define nodevicememMap(pMemory, pCallContext, pParams, pCpuMapping) nodevicememMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define nodevicememAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) nodevicememAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS nodevicememGetMapAddrSpace_IMPL(struct NoDeviceMemory *pNoDeviceMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); +#define nodevicememControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define nodevicememControlFilter(pResource, pCallContext, pParams) nodevicememControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define nodevicememIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define nodevicememIsPartialUnmapSupported(pResource) nodevicememIsPartialUnmapSupported_DISPATCH(pResource) +#define nodevicememMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define nodevicememMapTo(pResource, pParams) nodevicememMapTo_DISPATCH(pResource, pParams) +#define nodevicememUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define nodevicememUnmapFrom(pResource, pParams) nodevicememUnmapFrom_DISPATCH(pResource, pParams) +#define nodevicememGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define nodevicememGetRefCount(pResource) nodevicememGetRefCount_DISPATCH(pResource) +#define nodevicememAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define nodevicememAddAdditionalDependants(pClient, pResource, pReference) nodevicememAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS nodevicememGetMapAddrSpace_DISPATCH(struct NoDeviceMemory *pNoDeviceMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pNoDeviceMemory->__nodevicememGetMapAddrSpace__(pNoDeviceMemory, pCallContext, mapFlags, pAddrSpace); } -static inline NV_STATUS nodevicememCheckMemInterUnmap_DISPATCH(struct NoDeviceMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__nodevicememCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); +static inline NV_STATUS nodevicememIsDuplicate_DISPATCH(struct NoDeviceMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return pMemory->__nodevicememIsDuplicate__(pMemory, hMemory, pDuplicate); } -static inline NvBool nodevicememShareCallback_DISPATCH(struct NoDeviceMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__nodevicememShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS nodevicememControl_DISPATCH(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pMemory->__nodevicememControl__(pMemory, pCallContext, pParams); } -static inline NV_STATUS nodevicememMapTo_DISPATCH(struct NoDeviceMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__nodevicememMapTo__(pResource, pParams); +static inline NV_STATUS nodevicememMap_DISPATCH(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pMemory->__nodevicememMap__(pMemory, pCallContext, pParams, pCpuMapping); } -static inline NvBool nodevicememIsExportAllowed_DISPATCH(struct NoDeviceMemory *pMemory) { - return pMemory->__nodevicememIsExportAllowed__(pMemory); +static inline NV_STATUS nodevicememUnmap_DISPATCH(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pMemory->__nodevicememUnmap__(pMemory, pCallContext, pCpuMapping); } -static inline NvU32 nodevicememGetRefCount_DISPATCH(struct NoDeviceMemory *pResource) { - return pResource->__nodevicememGetRefCount__(pResource); +static inline NV_STATUS nodevicememGetMemInterMapParams_DISPATCH(struct NoDeviceMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pMemory->__nodevicememGetMemInterMapParams__(pMemory, pParams); } -static inline void nodevicememAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct NoDeviceMemory *pResource, RsResourceRef *pReference) { - pResource->__nodevicememAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS nodevicememCheckMemInterUnmap_DISPATCH(struct NoDeviceMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return pMemory->__nodevicememCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } -static inline NV_STATUS nodevicememControl_Prologue_DISPATCH(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nodevicememControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS nodevicememGetMemoryMappingDescriptor_DISPATCH(struct NoDeviceMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return pMemory->__nodevicememGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } -static inline NvBool nodevicememIsGpuMapAllowed_DISPATCH(struct NoDeviceMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__nodevicememIsGpuMapAllowed__(pMemory, pGpu); +static inline NV_STATUS nodevicememCheckCopyPermissions_DISPATCH(struct NoDeviceMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return pMemory->__nodevicememCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } -static inline NV_STATUS nodevicememUnmapFrom_DISPATCH(struct NoDeviceMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__nodevicememUnmapFrom__(pResource, pParams); +static inline NV_STATUS nodevicememIsReady_DISPATCH(struct NoDeviceMemory *pMemory, NvBool bCopyConstructorContext) { + return pMemory->__nodevicememIsReady__(pMemory, bCopyConstructorContext); } -static inline void nodevicememControl_Epilogue_DISPATCH(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nodevicememControl_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool nodevicememIsGpuMapAllowed_DISPATCH(struct NoDeviceMemory *pMemory, struct OBJGPU *pGpu) { + return pMemory->__nodevicememIsGpuMapAllowed__(pMemory, pGpu); } -static inline NV_STATUS nodevicememControl_DISPATCH(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__nodevicememControl__(pMemory, pCallContext, pParams); +static inline NvBool nodevicememIsExportAllowed_DISPATCH(struct NoDeviceMemory *pMemory) { + return pMemory->__nodevicememIsExportAllowed__(pMemory); } -static inline NV_STATUS nodevicememUnmap_DISPATCH(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__nodevicememUnmap__(pMemory, pCallContext, pCpuMapping); +static inline NvBool nodevicememAccessCallback_DISPATCH(struct NoDeviceMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__nodevicememAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS nodevicememGetMemInterMapParams_DISPATCH(struct NoDeviceMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__nodevicememGetMemInterMapParams__(pMemory, pParams); +static inline NvBool nodevicememShareCallback_DISPATCH(struct NoDeviceMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__nodevicememShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline NV_STATUS nodevicememGetMemoryMappingDescriptor_DISPATCH(struct NoDeviceMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__nodevicememGetMemoryMappingDescriptor__(pMemory, ppMemDesc); +static inline NV_STATUS nodevicememControlSerialization_Prologue_DISPATCH(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__nodevicememControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS nodevicememControlFilter_DISPATCH(struct NoDeviceMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nodevicememControlFilter__(pResource, pCallContext, pParams); +static inline void nodevicememControlSerialization_Epilogue_DISPATCH(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__nodevicememControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS nodevicememControlSerialization_Prologue_DISPATCH(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nodevicememControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS nodevicememControl_Prologue_DISPATCH(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__nodevicememControl_Prologue__(pResource, pCallContext, pParams); +} + +static inline void nodevicememControl_Epilogue_DISPATCH(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__nodevicememControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool nodevicememCanCopy_DISPATCH(struct NoDeviceMemory *pResource) { return pResource->__nodevicememCanCopy__(pResource); } -static inline NvBool nodevicememIsPartialUnmapSupported_DISPATCH(struct NoDeviceMemory *pResource) { - return pResource->__nodevicememIsPartialUnmapSupported__(pResource); +static inline void nodevicememPreDestruct_DISPATCH(struct NoDeviceMemory *pResource) { + pResource->__nodevicememPreDestruct__(pResource); } -static inline NV_STATUS nodevicememIsReady_DISPATCH(struct NoDeviceMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__nodevicememIsReady__(pMemory, bCopyConstructorContext); +static inline NV_STATUS nodevicememControlFilter_DISPATCH(struct NoDeviceMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__nodevicememControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS nodevicememCheckCopyPermissions_DISPATCH(struct NoDeviceMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__nodevicememCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); +static inline NvBool nodevicememIsPartialUnmapSupported_DISPATCH(struct NoDeviceMemory *pResource) { + return pResource->__nodevicememIsPartialUnmapSupported__(pResource); } -static inline void nodevicememPreDestruct_DISPATCH(struct NoDeviceMemory *pResource) { - pResource->__nodevicememPreDestruct__(pResource); +static inline NV_STATUS nodevicememMapTo_DISPATCH(struct NoDeviceMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__nodevicememMapTo__(pResource, pParams); } -static inline NV_STATUS nodevicememIsDuplicate_DISPATCH(struct NoDeviceMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__nodevicememIsDuplicate__(pMemory, hMemory, pDuplicate); +static inline NV_STATUS nodevicememUnmapFrom_DISPATCH(struct NoDeviceMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__nodevicememUnmapFrom__(pResource, pParams); } -static inline void nodevicememControlSerialization_Epilogue_DISPATCH(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nodevicememControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 nodevicememGetRefCount_DISPATCH(struct NoDeviceMemory *pResource) { + return pResource->__nodevicememGetRefCount__(pResource); } -static inline NV_STATUS nodevicememMap_DISPATCH(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__nodevicememMap__(pMemory, pCallContext, pParams, pCpuMapping); +static inline void nodevicememAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct NoDeviceMemory *pResource, RsResourceRef *pReference) { + pResource->__nodevicememAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NvBool nodevicememAccessCallback_DISPATCH(struct NoDeviceMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__nodevicememAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} +NV_STATUS nodevicememGetMapAddrSpace_IMPL(struct NoDeviceMemory *pNoDeviceMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); NV_STATUS nodevicememConstruct_IMPL(struct NoDeviceMemory *arg_pNoDeviceMemory, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_nv_debug_dump_nvoc.c b/src/nvidia/generated/g_nv_debug_dump_nvoc.c index c303a76d7b..ccf85eccfb 100644 --- a/src/nvidia/generated/g_nv_debug_dump_nvoc.c +++ b/src/nvidia/generated/g_nv_debug_dump_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_NvDebugDump = /*pExportInfo=*/ &__nvoc_export_info_NvDebugDump }; -static NV_STATUS __nvoc_thunk_NvDebugDump_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pNvd, ENGDESCRIPTOR arg0) { - return nvdConstructEngine(pGpu, (struct NvDebugDump *)(((unsigned char *)pNvd) - __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg0); +// 2 down-thunk(s) defined to bridge methods in NvDebugDump from superclasses + +// nvdConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_NvDebugDump_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pNvd, ENGDESCRIPTOR arg3) { + return nvdConstructEngine(pGpu, (struct NvDebugDump *)(((unsigned char *) pNvd) - __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_NvDebugDump_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pNvd) { - return nvdStateInitLocked(pGpu, (struct NvDebugDump *)(((unsigned char *)pNvd) - __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); +// nvdStateInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_NvDebugDump_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pNvd) { + return nvdStateInitLocked(pGpu, (struct NvDebugDump *)(((unsigned char *) pNvd) - __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_nvdStateLoad(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg0) { - return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg0); + +// 12 up-thunk(s) defined to bridge methods in NvDebugDump to superclasses + +// nvdInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_nvdInitMissing(POBJGPU pGpu, struct NvDebugDump *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_nvdStateUnload(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg0) { - return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg0); +// nvdStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePreInitLocked(POBJGPU pGpu, struct NvDebugDump *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_nvdStatePreLoad(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg0); +// nvdStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePreInitUnlocked(POBJGPU pGpu, struct NvDebugDump *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_nvdStatePostUnload(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg0); +// nvdStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStateInitUnlocked(POBJGPU pGpu, struct NvDebugDump *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_nvdStateDestroy(POBJGPU pGpu, struct NvDebugDump *pEngstate) { - engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); +// nvdStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePreLoad(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_nvdStatePreUnload(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg0); +// nvdStateLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStateLoad(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { + return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_nvdStateInitUnlocked(POBJGPU pGpu, struct NvDebugDump *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); +// nvdStatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePostLoad(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_nvdInitMissing(POBJGPU pGpu, struct NvDebugDump *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); +// nvdStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePreUnload(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_nvdStatePreInitLocked(POBJGPU pGpu, struct NvDebugDump *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); +// nvdStateUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStateUnload(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { + return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_nvdStatePreInitUnlocked(POBJGPU pGpu, struct NvDebugDump *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); +// nvdStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePostUnload(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_nvdStatePostLoad(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg0); +// nvdStateDestroy: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_nvdStateDestroy(POBJGPU pGpu, struct NvDebugDump *pEngstate) { + engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); } -static NvBool __nvoc_thunk_OBJENGSTATE_nvdIsPresent(POBJGPU pGpu, struct NvDebugDump *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); +// nvdIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_nvdIsPresent(POBJGPU pGpu, struct NvDebugDump *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_NvDebugDump = { /*numEntries=*/ 0, @@ -153,43 +173,60 @@ NV_STATUS __nvoc_ctor_NvDebugDump(NvDebugDump *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_NvDebugDump_1(NvDebugDump *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // nvdConstructEngine -- virtual override (engstate) base (engstate) pThis->__nvdConstructEngine__ = &nvdConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_NvDebugDump_engstateConstructEngine; + // nvdStateInitLocked -- virtual override (engstate) base (engstate) pThis->__nvdStateInitLocked__ = &nvdStateInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_NvDebugDump_engstateStateInitLocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_NvDebugDump_engstateConstructEngine; + // nvdInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__nvdInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_nvdInitMissing; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_thunk_NvDebugDump_engstateStateInitLocked; + // nvdStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__nvdStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStatePreInitLocked; - pThis->__nvdStateLoad__ = &__nvoc_thunk_OBJENGSTATE_nvdStateLoad; + // nvdStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__nvdStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStatePreInitUnlocked; - pThis->__nvdStateUnload__ = &__nvoc_thunk_OBJENGSTATE_nvdStateUnload; + // nvdStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__nvdStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStateInitUnlocked; - pThis->__nvdStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_nvdStatePreLoad; + // nvdStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__nvdStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStatePreLoad; - pThis->__nvdStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_nvdStatePostUnload; + // nvdStateLoad -- virtual inherited (engstate) base (engstate) + pThis->__nvdStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStateLoad; - pThis->__nvdStateDestroy__ = &__nvoc_thunk_OBJENGSTATE_nvdStateDestroy; + // nvdStatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__nvdStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStatePostLoad; - pThis->__nvdStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_nvdStatePreUnload; + // nvdStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__nvdStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStatePreUnload; - pThis->__nvdStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_nvdStateInitUnlocked; + // nvdStateUnload -- virtual inherited (engstate) base (engstate) + pThis->__nvdStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStateUnload; - pThis->__nvdInitMissing__ = &__nvoc_thunk_OBJENGSTATE_nvdInitMissing; + // nvdStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__nvdStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStatePostUnload; - pThis->__nvdStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_nvdStatePreInitLocked; + // nvdStateDestroy -- virtual inherited (engstate) base (engstate) + pThis->__nvdStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStateDestroy; - pThis->__nvdStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_nvdStatePreInitUnlocked; + // nvdIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__nvdIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_nvdIsPresent; +} // End __nvoc_init_funcTable_NvDebugDump_1 with approximately 16 basic block(s). - pThis->__nvdStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_nvdStatePostLoad; - - pThis->__nvdIsPresent__ = &__nvoc_thunk_OBJENGSTATE_nvdIsPresent; -} +// Initialize vtable(s) for 14 virtual method(s). void __nvoc_init_funcTable_NvDebugDump(NvDebugDump *pThis) { + + // Initialize vtable(s) with 14 per-object function pointer(s). __nvoc_init_funcTable_NvDebugDump_1(pThis); } diff --git a/src/nvidia/generated/g_nv_debug_dump_nvoc.h b/src/nvidia/generated/g_nv_debug_dump_nvoc.h index f9afe0c632..6546a89bbb 100644 --- a/src/nvidia/generated/g_nv_debug_dump_nvoc.h +++ b/src/nvidia/generated/g_nv_debug_dump_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_NV_DEBUG_DUMP_NVOC_H_ #define _G_NV_DEBUG_DUMP_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_nv_debug_dump_nvoc.h" #ifndef _NV_DEBUG_DUMP_H_ @@ -161,26 +169,37 @@ typedef struct _def_nvd_engine_callback { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct NvDebugDump { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct NvDebugDump *__nvoc_pbase_NvDebugDump; - NV_STATUS (*__nvdConstructEngine__)(struct OBJGPU *, struct NvDebugDump *, ENGDESCRIPTOR); - NV_STATUS (*__nvdStateInitLocked__)(struct OBJGPU *, struct NvDebugDump *); - NV_STATUS (*__nvdStateLoad__)(POBJGPU, struct NvDebugDump *, NvU32); - NV_STATUS (*__nvdStateUnload__)(POBJGPU, struct NvDebugDump *, NvU32); - NV_STATUS (*__nvdStatePreLoad__)(POBJGPU, struct NvDebugDump *, NvU32); - NV_STATUS (*__nvdStatePostUnload__)(POBJGPU, struct NvDebugDump *, NvU32); - void (*__nvdStateDestroy__)(POBJGPU, struct NvDebugDump *); - NV_STATUS (*__nvdStatePreUnload__)(POBJGPU, struct NvDebugDump *, NvU32); - NV_STATUS (*__nvdStateInitUnlocked__)(POBJGPU, struct NvDebugDump *); - void (*__nvdInitMissing__)(POBJGPU, struct NvDebugDump *); - NV_STATUS (*__nvdStatePreInitLocked__)(POBJGPU, struct NvDebugDump *); - NV_STATUS (*__nvdStatePreInitUnlocked__)(POBJGPU, struct NvDebugDump *); - NV_STATUS (*__nvdStatePostLoad__)(POBJGPU, struct NvDebugDump *, NvU32); - NvBool (*__nvdIsPresent__)(POBJGPU, struct NvDebugDump *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct NvDebugDump *__nvoc_pbase_NvDebugDump; // nvd + + // Vtable with 14 per-object function pointers + NV_STATUS (*__nvdConstructEngine__)(struct OBJGPU *, struct NvDebugDump * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__nvdStateInitLocked__)(struct OBJGPU *, struct NvDebugDump * /*this*/); // virtual override (engstate) base (engstate) + void (*__nvdInitMissing__)(POBJGPU, struct NvDebugDump * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__nvdStatePreInitLocked__)(POBJGPU, struct NvDebugDump * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__nvdStatePreInitUnlocked__)(POBJGPU, struct NvDebugDump * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__nvdStateInitUnlocked__)(POBJGPU, struct NvDebugDump * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__nvdStatePreLoad__)(POBJGPU, struct NvDebugDump * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__nvdStateLoad__)(POBJGPU, struct NvDebugDump * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__nvdStatePostLoad__)(POBJGPU, struct NvDebugDump * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__nvdStatePreUnload__)(POBJGPU, struct NvDebugDump * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__nvdStateUnload__)(POBJGPU, struct NvDebugDump * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__nvdStatePostUnload__)(POBJGPU, struct NvDebugDump * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__nvdStateDestroy__)(POBJGPU, struct NvDebugDump * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__nvdIsPresent__)(POBJGPU, struct NvDebugDump * /*this*/); // virtual inherited (engstate) base (engstate) + + // Data members NVD_DEBUG_BUFFER *pHeadDebugBuffer; NVD_ENGINE_CALLBACK *pCallbacks; }; @@ -194,6 +213,7 @@ typedef struct NvDebugDump NvDebugDump; #define __nvoc_class_id_NvDebugDump 0x7e80a2 #endif /* __nvoc_class_id_NvDebugDump */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_NvDebugDump; #define __staticCast_NvDebugDump(pThis) \ @@ -206,6 +226,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_NvDebugDump; ((NvDebugDump*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(NvDebugDump))) #endif //__nvoc_nv_debug_dump_h_disabled +// Property macros #define PDB_PROP_NVD_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_NVD_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -215,80 +236,98 @@ NV_STATUS __nvoc_objCreate_NvDebugDump(NvDebugDump**, Dynamic*, NvU32); #define __objCreate_NvDebugDump(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_NvDebugDump((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define nvdConstructEngine(pGpu, pNvd, arg0) nvdConstructEngine_DISPATCH(pGpu, pNvd, arg0) + +// Wrapper macros +#define nvdConstructEngine_FNPTR(pNvd) pNvd->__nvdConstructEngine__ +#define nvdConstructEngine(pGpu, pNvd, arg3) nvdConstructEngine_DISPATCH(pGpu, pNvd, arg3) +#define nvdStateInitLocked_FNPTR(pNvd) pNvd->__nvdStateInitLocked__ #define nvdStateInitLocked(pGpu, pNvd) nvdStateInitLocked_DISPATCH(pGpu, pNvd) -#define nvdStateLoad(pGpu, pEngstate, arg0) nvdStateLoad_DISPATCH(pGpu, pEngstate, arg0) -#define nvdStateUnload(pGpu, pEngstate, arg0) nvdStateUnload_DISPATCH(pGpu, pEngstate, arg0) -#define nvdStatePreLoad(pGpu, pEngstate, arg0) nvdStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define nvdStatePostUnload(pGpu, pEngstate, arg0) nvdStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define nvdStateDestroy(pGpu, pEngstate) nvdStateDestroy_DISPATCH(pGpu, pEngstate) -#define nvdStatePreUnload(pGpu, pEngstate, arg0) nvdStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define nvdStateInitUnlocked(pGpu, pEngstate) nvdStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define nvdInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define nvdInitMissing(pGpu, pEngstate) nvdInitMissing_DISPATCH(pGpu, pEngstate) +#define nvdStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define nvdStatePreInitLocked(pGpu, pEngstate) nvdStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define nvdStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define nvdStatePreInitUnlocked(pGpu, pEngstate) nvdStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define nvdStatePostLoad(pGpu, pEngstate, arg0) nvdStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) +#define nvdStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define nvdStateInitUnlocked(pGpu, pEngstate) nvdStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define nvdStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define nvdStatePreLoad(pGpu, pEngstate, arg3) nvdStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define nvdStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define nvdStateLoad(pGpu, pEngstate, arg3) nvdStateLoad_DISPATCH(pGpu, pEngstate, arg3) +#define nvdStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define nvdStatePostLoad(pGpu, pEngstate, arg3) nvdStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define nvdStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define nvdStatePreUnload(pGpu, pEngstate, arg3) nvdStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define nvdStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define nvdStateUnload(pGpu, pEngstate, arg3) nvdStateUnload_DISPATCH(pGpu, pEngstate, arg3) +#define nvdStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define nvdStatePostUnload(pGpu, pEngstate, arg3) nvdStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define nvdStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define nvdStateDestroy(pGpu, pEngstate) nvdStateDestroy_DISPATCH(pGpu, pEngstate) +#define nvdIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define nvdIsPresent(pGpu, pEngstate) nvdIsPresent_DISPATCH(pGpu, pEngstate) -NV_STATUS nvdConstructEngine_IMPL(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, ENGDESCRIPTOR arg0); -static inline NV_STATUS nvdConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, ENGDESCRIPTOR arg0) { - return pNvd->__nvdConstructEngine__(pGpu, pNvd, arg0); +// Dispatch functions +static inline NV_STATUS nvdConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, ENGDESCRIPTOR arg3) { + return pNvd->__nvdConstructEngine__(pGpu, pNvd, arg3); } -NV_STATUS nvdStateInitLocked_IMPL(struct OBJGPU *pGpu, struct NvDebugDump *pNvd); - static inline NV_STATUS nvdStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct NvDebugDump *pNvd) { return pNvd->__nvdStateInitLocked__(pGpu, pNvd); } -static inline NV_STATUS nvdStateLoad_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg0) { - return pEngstate->__nvdStateLoad__(pGpu, pEngstate, arg0); +static inline void nvdInitMissing_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate) { + pEngstate->__nvdInitMissing__(pGpu, pEngstate); } -static inline NV_STATUS nvdStateUnload_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg0) { - return pEngstate->__nvdStateUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS nvdStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate) { + return pEngstate->__nvdStatePreInitLocked__(pGpu, pEngstate); } -static inline NV_STATUS nvdStatePreLoad_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg0) { - return pEngstate->__nvdStatePreLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS nvdStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate) { + return pEngstate->__nvdStatePreInitUnlocked__(pGpu, pEngstate); } -static inline NV_STATUS nvdStatePostUnload_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg0) { - return pEngstate->__nvdStatePostUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS nvdStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate) { + return pEngstate->__nvdStateInitUnlocked__(pGpu, pEngstate); } -static inline void nvdStateDestroy_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate) { - pEngstate->__nvdStateDestroy__(pGpu, pEngstate); +static inline NV_STATUS nvdStatePreLoad_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { + return pEngstate->__nvdStatePreLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS nvdStatePreUnload_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg0) { - return pEngstate->__nvdStatePreUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS nvdStateLoad_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { + return pEngstate->__nvdStateLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS nvdStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate) { - return pEngstate->__nvdStateInitUnlocked__(pGpu, pEngstate); +static inline NV_STATUS nvdStatePostLoad_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { + return pEngstate->__nvdStatePostLoad__(pGpu, pEngstate, arg3); } -static inline void nvdInitMissing_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate) { - pEngstate->__nvdInitMissing__(pGpu, pEngstate); +static inline NV_STATUS nvdStatePreUnload_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { + return pEngstate->__nvdStatePreUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS nvdStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate) { - return pEngstate->__nvdStatePreInitLocked__(pGpu, pEngstate); +static inline NV_STATUS nvdStateUnload_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { + return pEngstate->__nvdStateUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS nvdStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate) { - return pEngstate->__nvdStatePreInitUnlocked__(pGpu, pEngstate); +static inline NV_STATUS nvdStatePostUnload_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { + return pEngstate->__nvdStatePostUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS nvdStatePostLoad_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate, NvU32 arg0) { - return pEngstate->__nvdStatePostLoad__(pGpu, pEngstate, arg0); +static inline void nvdStateDestroy_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate) { + pEngstate->__nvdStateDestroy__(pGpu, pEngstate); } static inline NvBool nvdIsPresent_DISPATCH(POBJGPU pGpu, struct NvDebugDump *pEngstate) { return pEngstate->__nvdIsPresent__(pGpu, pEngstate); } +NV_STATUS nvdConstructEngine_IMPL(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, ENGDESCRIPTOR arg3); + +NV_STATUS nvdStateInitLocked_IMPL(struct OBJGPU *pGpu, struct NvDebugDump *pNvd); + void nvdDestruct_IMPL(struct NvDebugDump *pNvd); #define __nvoc_nvdDestruct(pNvd) nvdDestruct_IMPL(pNvd) @@ -303,48 +342,48 @@ static inline NV_STATUS nvdDumpComponent(struct OBJGPU *pGpu, struct NvDebugDump #define nvdDumpComponent(pGpu, pNvd, component, pBuffer, policy, pBufferCallback) nvdDumpComponent_IMPL(pGpu, pNvd, component, pBuffer, policy, pBufferCallback) #endif //__nvoc_nv_debug_dump_h_disabled -NV_STATUS nvdAllocDebugBuffer_IMPL(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, NvU32 arg0, NvU32 *arg1, MEMORY_DESCRIPTOR **arg2); +NV_STATUS nvdAllocDebugBuffer_IMPL(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, NvU32 arg3, NvU32 *arg4, MEMORY_DESCRIPTOR **arg5); #ifdef __nvoc_nv_debug_dump_h_disabled -static inline NV_STATUS nvdAllocDebugBuffer(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, NvU32 arg0, NvU32 *arg1, MEMORY_DESCRIPTOR **arg2) { +static inline NV_STATUS nvdAllocDebugBuffer(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, NvU32 arg3, NvU32 *arg4, MEMORY_DESCRIPTOR **arg5) { NV_ASSERT_FAILED_PRECOMP("NvDebugDump was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_nv_debug_dump_h_disabled -#define nvdAllocDebugBuffer(pGpu, pNvd, arg0, arg1, arg2) nvdAllocDebugBuffer_IMPL(pGpu, pNvd, arg0, arg1, arg2) +#define nvdAllocDebugBuffer(pGpu, pNvd, arg3, arg4, arg5) nvdAllocDebugBuffer_IMPL(pGpu, pNvd, arg3, arg4, arg5) #endif //__nvoc_nv_debug_dump_h_disabled -NV_STATUS nvdFreeDebugBuffer_IMPL(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, MEMORY_DESCRIPTOR *arg0); +NV_STATUS nvdFreeDebugBuffer_IMPL(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, MEMORY_DESCRIPTOR *arg3); #ifdef __nvoc_nv_debug_dump_h_disabled -static inline NV_STATUS nvdFreeDebugBuffer(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, MEMORY_DESCRIPTOR *arg0) { +static inline NV_STATUS nvdFreeDebugBuffer(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, MEMORY_DESCRIPTOR *arg3) { NV_ASSERT_FAILED_PRECOMP("NvDebugDump was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_nv_debug_dump_h_disabled -#define nvdFreeDebugBuffer(pGpu, pNvd, arg0) nvdFreeDebugBuffer_IMPL(pGpu, pNvd, arg0) +#define nvdFreeDebugBuffer(pGpu, pNvd, arg3) nvdFreeDebugBuffer_IMPL(pGpu, pNvd, arg3) #endif //__nvoc_nv_debug_dump_h_disabled -NV_STATUS nvdDumpDebugBuffers_IMPL(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, PRB_ENCODER *arg0); +NV_STATUS nvdDumpDebugBuffers_IMPL(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, PRB_ENCODER *arg3); #ifdef __nvoc_nv_debug_dump_h_disabled -static inline NV_STATUS nvdDumpDebugBuffers(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, PRB_ENCODER *arg0) { +static inline NV_STATUS nvdDumpDebugBuffers(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, PRB_ENCODER *arg3) { NV_ASSERT_FAILED_PRECOMP("NvDebugDump was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_nv_debug_dump_h_disabled -#define nvdDumpDebugBuffers(pGpu, pNvd, arg0) nvdDumpDebugBuffers_IMPL(pGpu, pNvd, arg0) +#define nvdDumpDebugBuffers(pGpu, pNvd, arg3) nvdDumpDebugBuffers_IMPL(pGpu, pNvd, arg3) #endif //__nvoc_nv_debug_dump_h_disabled -NV_STATUS nvdEngineSignUp_IMPL(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, NvdDumpEngineFunc *arg0, NvU32 engDesc, NvU32 flags, void *arg1); +NV_STATUS nvdEngineSignUp_IMPL(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, NvdDumpEngineFunc *arg3, NvU32 engDesc, NvU32 flags, void *arg6); #ifdef __nvoc_nv_debug_dump_h_disabled -static inline NV_STATUS nvdEngineSignUp(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, NvdDumpEngineFunc *arg0, NvU32 engDesc, NvU32 flags, void *arg1) { +static inline NV_STATUS nvdEngineSignUp(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, NvdDumpEngineFunc *arg3, NvU32 engDesc, NvU32 flags, void *arg6) { NV_ASSERT_FAILED_PRECOMP("NvDebugDump was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_nv_debug_dump_h_disabled -#define nvdEngineSignUp(pGpu, pNvd, arg0, engDesc, flags, arg1) nvdEngineSignUp_IMPL(pGpu, pNvd, arg0, engDesc, flags, arg1) +#define nvdEngineSignUp(pGpu, pNvd, arg3, engDesc, flags, arg6) nvdEngineSignUp_IMPL(pGpu, pNvd, arg3, engDesc, flags, arg6) #endif //__nvoc_nv_debug_dump_h_disabled NV_STATUS nvdEngineRelease_IMPL(struct OBJGPU *pGpu, struct NvDebugDump *pNvd); @@ -358,15 +397,15 @@ static inline NV_STATUS nvdEngineRelease(struct OBJGPU *pGpu, struct NvDebugDump #define nvdEngineRelease(pGpu, pNvd) nvdEngineRelease_IMPL(pGpu, pNvd) #endif //__nvoc_nv_debug_dump_h_disabled -NV_STATUS nvdDoEngineDump_IMPL(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, PRB_ENCODER *pPrbEnc, NVD_STATE *pNvDumpState, NvU32 arg0); +NV_STATUS nvdDoEngineDump_IMPL(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, PRB_ENCODER *pPrbEnc, NVD_STATE *pNvDumpState, NvU32 arg5); #ifdef __nvoc_nv_debug_dump_h_disabled -static inline NV_STATUS nvdDoEngineDump(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, PRB_ENCODER *pPrbEnc, NVD_STATE *pNvDumpState, NvU32 arg0) { +static inline NV_STATUS nvdDoEngineDump(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, PRB_ENCODER *pPrbEnc, NVD_STATE *pNvDumpState, NvU32 arg5) { NV_ASSERT_FAILED_PRECOMP("NvDebugDump was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_nv_debug_dump_h_disabled -#define nvdDoEngineDump(pGpu, pNvd, pPrbEnc, pNvDumpState, arg0) nvdDoEngineDump_IMPL(pGpu, pNvd, pPrbEnc, pNvDumpState, arg0) +#define nvdDoEngineDump(pGpu, pNvd, pPrbEnc, pNvDumpState, arg5) nvdDoEngineDump_IMPL(pGpu, pNvd, pPrbEnc, pNvDumpState, arg5) #endif //__nvoc_nv_debug_dump_h_disabled NV_STATUS nvdDumpAllEngines_IMPL(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, PRB_ENCODER *pPrbEnc, NVD_STATE *pNvDumpState); diff --git a/src/nvidia/generated/g_nv_name_released.h b/src/nvidia/generated/g_nv_name_released.h index ac403b482f..232682dbe6 100644 --- a/src/nvidia/generated/g_nv_name_released.h +++ b/src/nvidia/generated/g_nv_name_released.h @@ -1003,6 +1003,7 @@ static const CHIPS_RELEASED sChipsReleased[] = { { 0x25FB, 0x0000, 0x0000, "NVIDIA RTX A500 Embedded GPU" }, { 0x2684, 0x0000, 0x0000, "NVIDIA GeForce RTX 4090" }, { 0x2685, 0x0000, 0x0000, "NVIDIA GeForce RTX 4090 D" }, + { 0x2689, 0x0000, 0x0000, "NVIDIA GeForce RTX 4070 Ti SUPER" }, { 0x26B1, 0x16a1, 0x1028, "NVIDIA RTX 6000 Ada Generation" }, { 0x26B1, 0x16a1, 0x103c, "NVIDIA RTX 6000 Ada Generation" }, { 0x26B1, 0x16a1, 0x10de, "NVIDIA RTX 6000 Ada Generation" }, diff --git a/src/nvidia/generated/g_nvencsession_nvoc.c b/src/nvidia/generated/g_nvencsession_nvoc.c index b307b47374..f95c1f16e2 100644 --- a/src/nvidia/generated/g_nvencsession_nvoc.c +++ b/src/nvidia/generated/g_nvencsession_nvoc.c @@ -93,144 +93,172 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_NvencSession = /*pExportInfo=*/ &__nvoc_export_info_NvencSession }; -static NvBool __nvoc_thunk_GpuResource_nvencsessionShareCallback(struct NvencSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NV_STATUS __nvoc_thunk_RmResource_nvencsessionCheckMemInterUnmap(struct NvencSession *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_NvencSession_RmResource.offset), bSubdeviceHandleProvided); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_NvencSession[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) nvencsessionCtrlCmdNvencSwSessionUpdateInfo_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0xa0bc0101u, + /*paramSize=*/ sizeof(NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_NvencSession.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "nvencsessionCtrlCmdNvencSwSessionUpdateInfo" +#endif + }, + { /* [1] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0xa0bc0102u, + /*paramSize=*/ sizeof(NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_V2_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_NvencSession.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2" +#endif + }, -static NV_STATUS __nvoc_thunk_RsResource_nvencsessionMapTo(struct NvencSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvencSession_RsResource.offset), pParams); +}; + +// 25 up-thunk(s) defined to bridge methods in NvencSession to superclasses + +// nvencsessionControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionControl(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_nvencsessionGetMapAddrSpace(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// nvencsessionMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionMap(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_nvencsessionGetRefCount(struct NvencSession *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvencSession_RsResource.offset)); +// nvencsessionUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionUnmap(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_RsResource_nvencsessionAddAdditionalDependants(struct RsClient *pClient, struct NvencSession *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvencSession_RsResource.offset), pReference); +// nvencsessionShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_nvencsessionShareCallback(struct NvencSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RmResource_nvencsessionControl_Prologue(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvencSession_RmResource.offset), pCallContext, pParams); +// nvencsessionGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionGetRegBaseOffsetAndSize(struct NvencSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_GpuResource_nvencsessionGetRegBaseOffsetAndSize(struct NvencSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), pGpu, pOffset, pSize); +// nvencsessionGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionGetMapAddrSpace(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_GpuResource_nvencsessionInternalControlForward(struct NvencSession *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), command, pParams, size); +// nvencsessionInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionInternalControlForward(struct NvencSession *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_RsResource_nvencsessionUnmapFrom(struct NvencSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvencSession_RsResource.offset), pParams); +// nvencsessionGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_nvencsessionGetInternalObjectHandle(struct NvencSession *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset)); } -static void __nvoc_thunk_RmResource_nvencsessionControl_Epilogue(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvencSession_RmResource.offset), pCallContext, pParams); +// nvencsessionAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_nvencsessionAccessCallback(struct NvencSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NvHandle __nvoc_thunk_GpuResource_nvencsessionGetInternalObjectHandle(struct NvencSession *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset)); +// nvencsessionGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_nvencsessionGetMemInterMapParams(struct NvencSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvencSession_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_nvencsessionControl(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), pCallContext, pParams); +// nvencsessionCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_nvencsessionCheckMemInterUnmap(struct NvencSession *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvencSession_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_GpuResource_nvencsessionUnmap(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), pCallContext, pCpuMapping); +// nvencsessionGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_nvencsessionGetMemoryMappingDescriptor(struct NvencSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvencSession_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_RmResource_nvencsessionGetMemInterMapParams(struct NvencSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_NvencSession_RmResource.offset), pParams); +// nvencsessionControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_nvencsessionControlSerialization_Prologue(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_nvencsessionGetMemoryMappingDescriptor(struct NvencSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_NvencSession_RmResource.offset), ppMemDesc); +// nvencsessionControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_nvencsessionControlSerialization_Epilogue(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_nvencsessionControlFilter(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvencSession_RsResource.offset), pCallContext, pParams); +// nvencsessionControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_nvencsessionControl_Prologue(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_nvencsessionControlSerialization_Prologue(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvencSession_RmResource.offset), pCallContext, pParams); +// nvencsessionControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_nvencsessionControl_Epilogue(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_nvencsessionCanCopy(struct NvencSession *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvencSession_RsResource.offset)); +// nvencsessionCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_nvencsessionCanCopy(struct NvencSession *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_nvencsessionIsPartialUnmapSupported(struct NvencSession *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvencSession_RsResource.offset)); +// nvencsessionIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_nvencsessionIsDuplicate(struct NvencSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RsResource.offset), hMemory, pDuplicate); } -static void __nvoc_thunk_RsResource_nvencsessionPreDestruct(struct NvencSession *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvencSession_RsResource.offset)); +// nvencsessionPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_nvencsessionPreDestruct(struct NvencSession *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_nvencsessionIsDuplicate(struct NvencSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvencSession_RsResource.offset), hMemory, pDuplicate); +// nvencsessionControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_nvencsessionControlFilter(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RmResource_nvencsessionControlSerialization_Epilogue(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvencSession_RmResource.offset), pCallContext, pParams); +// nvencsessionIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_nvencsessionIsPartialUnmapSupported(struct NvencSession *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_nvencsessionMap(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// nvencsessionMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_nvencsessionMapTo(struct NvencSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RmResource_nvencsessionAccessCallback(struct NvencSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvencSession_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// nvencsessionUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_nvencsessionUnmapFrom(struct NvencSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RsResource.offset), pParams); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// nvencsessionGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_nvencsessionGetRefCount(struct NvencSession *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RsResource.offset)); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_NvencSession[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) nvencsessionCtrlCmdNvencSwSessionUpdateInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xa0bc0101u, - /*paramSize=*/ sizeof(NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_NvencSession.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "nvencsessionCtrlCmdNvencSwSessionUpdateInfo" -#endif - }, - { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xa0bc0102u, - /*paramSize=*/ sizeof(NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_V2_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_NvencSession.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2" -#endif - }, +// nvencsessionAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_nvencsessionAddAdditionalDependants(struct RsClient *pClient, struct NvencSession *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RsResource.offset), pReference); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_NvencSession = { @@ -268,69 +296,101 @@ NV_STATUS __nvoc_ctor_NvencSession(NvencSession *pThis, struct CALL_CONTEXT * ar return status; } +// Vtable initialization static void __nvoc_init_funcTable_NvencSession_1(NvencSession *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // nvencsessionCtrlCmdNvencSwSessionUpdateInfo -- exported (id=0xa0bc0101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__nvencsessionCtrlCmdNvencSwSessionUpdateInfo__ = &nvencsessionCtrlCmdNvencSwSessionUpdateInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2 -- exported (id=0xa0bc0102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2__ = &nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2_IMPL; #endif - pThis->__nvencsessionShareCallback__ = &__nvoc_thunk_GpuResource_nvencsessionShareCallback; + // nvencsessionControl -- virtual inherited (gpures) base (gpures) + pThis->__nvencsessionControl__ = &__nvoc_up_thunk_GpuResource_nvencsessionControl; - pThis->__nvencsessionCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_nvencsessionCheckMemInterUnmap; + // nvencsessionMap -- virtual inherited (gpures) base (gpures) + pThis->__nvencsessionMap__ = &__nvoc_up_thunk_GpuResource_nvencsessionMap; - pThis->__nvencsessionMapTo__ = &__nvoc_thunk_RsResource_nvencsessionMapTo; + // nvencsessionUnmap -- virtual inherited (gpures) base (gpures) + pThis->__nvencsessionUnmap__ = &__nvoc_up_thunk_GpuResource_nvencsessionUnmap; - pThis->__nvencsessionGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_nvencsessionGetMapAddrSpace; + // nvencsessionShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__nvencsessionShareCallback__ = &__nvoc_up_thunk_GpuResource_nvencsessionShareCallback; - pThis->__nvencsessionGetRefCount__ = &__nvoc_thunk_RsResource_nvencsessionGetRefCount; + // nvencsessionGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__nvencsessionGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_nvencsessionGetRegBaseOffsetAndSize; - pThis->__nvencsessionAddAdditionalDependants__ = &__nvoc_thunk_RsResource_nvencsessionAddAdditionalDependants; + // nvencsessionGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__nvencsessionGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_nvencsessionGetMapAddrSpace; - pThis->__nvencsessionControl_Prologue__ = &__nvoc_thunk_RmResource_nvencsessionControl_Prologue; + // nvencsessionInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__nvencsessionInternalControlForward__ = &__nvoc_up_thunk_GpuResource_nvencsessionInternalControlForward; - pThis->__nvencsessionGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_nvencsessionGetRegBaseOffsetAndSize; + // nvencsessionGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__nvencsessionGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_nvencsessionGetInternalObjectHandle; - pThis->__nvencsessionInternalControlForward__ = &__nvoc_thunk_GpuResource_nvencsessionInternalControlForward; + // nvencsessionAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__nvencsessionAccessCallback__ = &__nvoc_up_thunk_RmResource_nvencsessionAccessCallback; - pThis->__nvencsessionUnmapFrom__ = &__nvoc_thunk_RsResource_nvencsessionUnmapFrom; + // nvencsessionGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__nvencsessionGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_nvencsessionGetMemInterMapParams; - pThis->__nvencsessionControl_Epilogue__ = &__nvoc_thunk_RmResource_nvencsessionControl_Epilogue; + // nvencsessionCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__nvencsessionCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_nvencsessionCheckMemInterUnmap; - pThis->__nvencsessionGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_nvencsessionGetInternalObjectHandle; + // nvencsessionGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__nvencsessionGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_nvencsessionGetMemoryMappingDescriptor; - pThis->__nvencsessionControl__ = &__nvoc_thunk_GpuResource_nvencsessionControl; + // nvencsessionControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__nvencsessionControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_nvencsessionControlSerialization_Prologue; - pThis->__nvencsessionUnmap__ = &__nvoc_thunk_GpuResource_nvencsessionUnmap; + // nvencsessionControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__nvencsessionControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_nvencsessionControlSerialization_Epilogue; - pThis->__nvencsessionGetMemInterMapParams__ = &__nvoc_thunk_RmResource_nvencsessionGetMemInterMapParams; + // nvencsessionControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__nvencsessionControl_Prologue__ = &__nvoc_up_thunk_RmResource_nvencsessionControl_Prologue; - pThis->__nvencsessionGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_nvencsessionGetMemoryMappingDescriptor; + // nvencsessionControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__nvencsessionControl_Epilogue__ = &__nvoc_up_thunk_RmResource_nvencsessionControl_Epilogue; - pThis->__nvencsessionControlFilter__ = &__nvoc_thunk_RsResource_nvencsessionControlFilter; + // nvencsessionCanCopy -- virtual inherited (res) base (gpures) + pThis->__nvencsessionCanCopy__ = &__nvoc_up_thunk_RsResource_nvencsessionCanCopy; - pThis->__nvencsessionControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_nvencsessionControlSerialization_Prologue; + // nvencsessionIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__nvencsessionIsDuplicate__ = &__nvoc_up_thunk_RsResource_nvencsessionIsDuplicate; - pThis->__nvencsessionCanCopy__ = &__nvoc_thunk_RsResource_nvencsessionCanCopy; + // nvencsessionPreDestruct -- virtual inherited (res) base (gpures) + pThis->__nvencsessionPreDestruct__ = &__nvoc_up_thunk_RsResource_nvencsessionPreDestruct; - pThis->__nvencsessionIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_nvencsessionIsPartialUnmapSupported; + // nvencsessionControlFilter -- virtual inherited (res) base (gpures) + pThis->__nvencsessionControlFilter__ = &__nvoc_up_thunk_RsResource_nvencsessionControlFilter; - pThis->__nvencsessionPreDestruct__ = &__nvoc_thunk_RsResource_nvencsessionPreDestruct; + // nvencsessionIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__nvencsessionIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_nvencsessionIsPartialUnmapSupported; - pThis->__nvencsessionIsDuplicate__ = &__nvoc_thunk_RsResource_nvencsessionIsDuplicate; + // nvencsessionMapTo -- virtual inherited (res) base (gpures) + pThis->__nvencsessionMapTo__ = &__nvoc_up_thunk_RsResource_nvencsessionMapTo; - pThis->__nvencsessionControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_nvencsessionControlSerialization_Epilogue; + // nvencsessionUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__nvencsessionUnmapFrom__ = &__nvoc_up_thunk_RsResource_nvencsessionUnmapFrom; - pThis->__nvencsessionMap__ = &__nvoc_thunk_GpuResource_nvencsessionMap; + // nvencsessionGetRefCount -- virtual inherited (res) base (gpures) + pThis->__nvencsessionGetRefCount__ = &__nvoc_up_thunk_RsResource_nvencsessionGetRefCount; - pThis->__nvencsessionAccessCallback__ = &__nvoc_thunk_RmResource_nvencsessionAccessCallback; -} + // nvencsessionAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__nvencsessionAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_nvencsessionAddAdditionalDependants; +} // End __nvoc_init_funcTable_NvencSession_1 with approximately 27 basic block(s). + +// Initialize vtable(s) for 27 virtual method(s). void __nvoc_init_funcTable_NvencSession(NvencSession *pThis) { + + // Initialize vtable(s) with 27 per-object function pointer(s). __nvoc_init_funcTable_NvencSession_1(pThis); } diff --git a/src/nvidia/generated/g_nvencsession_nvoc.h b/src/nvidia/generated/g_nvencsession_nvoc.h index 7daa8c2681..5319f06c07 100644 --- a/src/nvidia/generated/g_nvencsession_nvoc.h +++ b/src/nvidia/generated/g_nvencsession_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_NVENCSESSION_NVOC_H_ #define _G_NVENCSESSION_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_nvencsession_nvoc.h" #ifndef _NVENCSESSION_H_ @@ -40,6 +48,7 @@ extern "C" { #include "class/cla0bc.h" #include "ctrl/ctrla0bc.h" + struct Memory; #ifndef __NVOC_CLASS_Memory_TYPEDEF__ @@ -84,42 +93,53 @@ typedef struct NVENC_SESSION_ENTRY #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct NvencSession { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct NvencSession *__nvoc_pbase_NvencSession; - NV_STATUS (*__nvencsessionCtrlCmdNvencSwSessionUpdateInfo__)(struct NvencSession *, NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_PARAMS *); - NV_STATUS (*__nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2__)(struct NvencSession *, NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_V2_PARAMS *); - NvBool (*__nvencsessionShareCallback__)(struct NvencSession *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__nvencsessionCheckMemInterUnmap__)(struct NvencSession *, NvBool); - NV_STATUS (*__nvencsessionMapTo__)(struct NvencSession *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__nvencsessionGetMapAddrSpace__)(struct NvencSession *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__nvencsessionGetRefCount__)(struct NvencSession *); - void (*__nvencsessionAddAdditionalDependants__)(struct RsClient *, struct NvencSession *, RsResourceRef *); - NV_STATUS (*__nvencsessionControl_Prologue__)(struct NvencSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nvencsessionGetRegBaseOffsetAndSize__)(struct NvencSession *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__nvencsessionInternalControlForward__)(struct NvencSession *, NvU32, void *, NvU32); - NV_STATUS (*__nvencsessionUnmapFrom__)(struct NvencSession *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__nvencsessionControl_Epilogue__)(struct NvencSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__nvencsessionGetInternalObjectHandle__)(struct NvencSession *); - NV_STATUS (*__nvencsessionControl__)(struct NvencSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nvencsessionUnmap__)(struct NvencSession *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__nvencsessionGetMemInterMapParams__)(struct NvencSession *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__nvencsessionGetMemoryMappingDescriptor__)(struct NvencSession *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__nvencsessionControlFilter__)(struct NvencSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nvencsessionControlSerialization_Prologue__)(struct NvencSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__nvencsessionCanCopy__)(struct NvencSession *); - NvBool (*__nvencsessionIsPartialUnmapSupported__)(struct NvencSession *); - void (*__nvencsessionPreDestruct__)(struct NvencSession *); - NV_STATUS (*__nvencsessionIsDuplicate__)(struct NvencSession *, NvHandle, NvBool *); - void (*__nvencsessionControlSerialization_Epilogue__)(struct NvencSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nvencsessionMap__)(struct NvencSession *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__nvencsessionAccessCallback__)(struct NvencSession *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct NvencSession *__nvoc_pbase_NvencSession; // nvencsession + + // Vtable with 27 per-object function pointers + NV_STATUS (*__nvencsessionCtrlCmdNvencSwSessionUpdateInfo__)(struct NvencSession * /*this*/, NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_PARAMS *); // exported (id=0xa0bc0101) + NV_STATUS (*__nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2__)(struct NvencSession * /*this*/, NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_V2_PARAMS *); // exported (id=0xa0bc0102) + NV_STATUS (*__nvencsessionControl__)(struct NvencSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__nvencsessionMap__)(struct NvencSession * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__nvencsessionUnmap__)(struct NvencSession * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__nvencsessionShareCallback__)(struct NvencSession * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__nvencsessionGetRegBaseOffsetAndSize__)(struct NvencSession * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__nvencsessionGetMapAddrSpace__)(struct NvencSession * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__nvencsessionInternalControlForward__)(struct NvencSession * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__nvencsessionGetInternalObjectHandle__)(struct NvencSession * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__nvencsessionAccessCallback__)(struct NvencSession * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__nvencsessionGetMemInterMapParams__)(struct NvencSession * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__nvencsessionCheckMemInterUnmap__)(struct NvencSession * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__nvencsessionGetMemoryMappingDescriptor__)(struct NvencSession * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__nvencsessionControlSerialization_Prologue__)(struct NvencSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__nvencsessionControlSerialization_Epilogue__)(struct NvencSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__nvencsessionControl_Prologue__)(struct NvencSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__nvencsessionControl_Epilogue__)(struct NvencSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__nvencsessionCanCopy__)(struct NvencSession * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__nvencsessionIsDuplicate__)(struct NvencSession * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__nvencsessionPreDestruct__)(struct NvencSession * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__nvencsessionControlFilter__)(struct NvencSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__nvencsessionIsPartialUnmapSupported__)(struct NvencSession * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__nvencsessionMapTo__)(struct NvencSession * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__nvencsessionUnmapFrom__)(struct NvencSession * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__nvencsessionGetRefCount__)(struct NvencSession * /*this*/); // virtual inherited (res) base (gpures) + void (*__nvencsessionAddAdditionalDependants__)(struct RsClient *, struct NvencSession * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members NvHandle handle; NVENC_SESSION_ENTRY nvencSessionEntry; NvU32 version; @@ -140,6 +160,7 @@ typedef struct NvencSession NvencSession; #define __nvoc_class_id_NvencSession 0x3434af #endif /* __nvoc_class_id_NvencSession */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_NvencSession; #define __staticCast_NvencSession(pThis) \ @@ -152,152 +173,182 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_NvencSession; ((NvencSession*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(NvencSession))) #endif //__nvoc_nvencsession_h_disabled - NV_STATUS __nvoc_objCreateDynamic_NvencSession(NvencSession**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_NvencSession(NvencSession**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_NvencSession(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_NvencSession((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define nvencsessionCtrlCmdNvencSwSessionUpdateInfo_FNPTR(pNvencSession) pNvencSession->__nvencsessionCtrlCmdNvencSwSessionUpdateInfo__ #define nvencsessionCtrlCmdNvencSwSessionUpdateInfo(pNvencSession, pParams) nvencsessionCtrlCmdNvencSwSessionUpdateInfo_DISPATCH(pNvencSession, pParams) +#define nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2_FNPTR(pNvencSession) pNvencSession->__nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2__ #define nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2(pNvencSession, pParams) nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2_DISPATCH(pNvencSession, pParams) +#define nvencsessionControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define nvencsessionControl(pGpuResource, pCallContext, pParams) nvencsessionControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define nvencsessionMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define nvencsessionMap(pGpuResource, pCallContext, pParams, pCpuMapping) nvencsessionMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define nvencsessionUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define nvencsessionUnmap(pGpuResource, pCallContext, pCpuMapping) nvencsessionUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define nvencsessionShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define nvencsessionShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) nvencsessionShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define nvencsessionCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) nvencsessionCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define nvencsessionMapTo(pResource, pParams) nvencsessionMapTo_DISPATCH(pResource, pParams) -#define nvencsessionGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) nvencsessionGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define nvencsessionGetRefCount(pResource) nvencsessionGetRefCount_DISPATCH(pResource) -#define nvencsessionAddAdditionalDependants(pClient, pResource, pReference) nvencsessionAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define nvencsessionControl_Prologue(pResource, pCallContext, pParams) nvencsessionControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define nvencsessionGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define nvencsessionGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) nvencsessionGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define nvencsessionGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define nvencsessionGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) nvencsessionGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define nvencsessionInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define nvencsessionInternalControlForward(pGpuResource, command, pParams, size) nvencsessionInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define nvencsessionUnmapFrom(pResource, pParams) nvencsessionUnmapFrom_DISPATCH(pResource, pParams) -#define nvencsessionControl_Epilogue(pResource, pCallContext, pParams) nvencsessionControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define nvencsessionGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define nvencsessionGetInternalObjectHandle(pGpuResource) nvencsessionGetInternalObjectHandle_DISPATCH(pGpuResource) -#define nvencsessionControl(pGpuResource, pCallContext, pParams) nvencsessionControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define nvencsessionUnmap(pGpuResource, pCallContext, pCpuMapping) nvencsessionUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define nvencsessionAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define nvencsessionAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) nvencsessionAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define nvencsessionGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define nvencsessionGetMemInterMapParams(pRmResource, pParams) nvencsessionGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define nvencsessionCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define nvencsessionCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) nvencsessionCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define nvencsessionGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define nvencsessionGetMemoryMappingDescriptor(pRmResource, ppMemDesc) nvencsessionGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define nvencsessionControlFilter(pResource, pCallContext, pParams) nvencsessionControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define nvencsessionControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define nvencsessionControlSerialization_Prologue(pResource, pCallContext, pParams) nvencsessionControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define nvencsessionControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define nvencsessionControlSerialization_Epilogue(pResource, pCallContext, pParams) nvencsessionControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define nvencsessionControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define nvencsessionControl_Prologue(pResource, pCallContext, pParams) nvencsessionControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define nvencsessionControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define nvencsessionControl_Epilogue(pResource, pCallContext, pParams) nvencsessionControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define nvencsessionCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define nvencsessionCanCopy(pResource) nvencsessionCanCopy_DISPATCH(pResource) -#define nvencsessionIsPartialUnmapSupported(pResource) nvencsessionIsPartialUnmapSupported_DISPATCH(pResource) -#define nvencsessionPreDestruct(pResource) nvencsessionPreDestruct_DISPATCH(pResource) +#define nvencsessionIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define nvencsessionIsDuplicate(pResource, hMemory, pDuplicate) nvencsessionIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define nvencsessionControlSerialization_Epilogue(pResource, pCallContext, pParams) nvencsessionControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define nvencsessionMap(pGpuResource, pCallContext, pParams, pCpuMapping) nvencsessionMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define nvencsessionAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) nvencsessionAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS nvencsessionCtrlCmdNvencSwSessionUpdateInfo_IMPL(struct NvencSession *pNvencSession, NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_PARAMS *pParams); +#define nvencsessionPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define nvencsessionPreDestruct(pResource) nvencsessionPreDestruct_DISPATCH(pResource) +#define nvencsessionControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define nvencsessionControlFilter(pResource, pCallContext, pParams) nvencsessionControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define nvencsessionIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define nvencsessionIsPartialUnmapSupported(pResource) nvencsessionIsPartialUnmapSupported_DISPATCH(pResource) +#define nvencsessionMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define nvencsessionMapTo(pResource, pParams) nvencsessionMapTo_DISPATCH(pResource, pParams) +#define nvencsessionUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define nvencsessionUnmapFrom(pResource, pParams) nvencsessionUnmapFrom_DISPATCH(pResource, pParams) +#define nvencsessionGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define nvencsessionGetRefCount(pResource) nvencsessionGetRefCount_DISPATCH(pResource) +#define nvencsessionAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define nvencsessionAddAdditionalDependants(pClient, pResource, pReference) nvencsessionAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS nvencsessionCtrlCmdNvencSwSessionUpdateInfo_DISPATCH(struct NvencSession *pNvencSession, NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_PARAMS *pParams) { return pNvencSession->__nvencsessionCtrlCmdNvencSwSessionUpdateInfo__(pNvencSession, pParams); } -NV_STATUS nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2_IMPL(struct NvencSession *pNvencSession, NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_V2_PARAMS *pParams); - static inline NV_STATUS nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2_DISPATCH(struct NvencSession *pNvencSession, NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_V2_PARAMS *pParams) { return pNvencSession->__nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2__(pNvencSession, pParams); } -static inline NvBool nvencsessionShareCallback_DISPATCH(struct NvencSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__nvencsessionShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS nvencsessionCheckMemInterUnmap_DISPATCH(struct NvencSession *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__nvencsessionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); -} - -static inline NV_STATUS nvencsessionMapTo_DISPATCH(struct NvencSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__nvencsessionMapTo__(pResource, pParams); -} - -static inline NV_STATUS nvencsessionGetMapAddrSpace_DISPATCH(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__nvencsessionGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +static inline NV_STATUS nvencsessionControl_DISPATCH(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__nvencsessionControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 nvencsessionGetRefCount_DISPATCH(struct NvencSession *pResource) { - return pResource->__nvencsessionGetRefCount__(pResource); +static inline NV_STATUS nvencsessionMap_DISPATCH(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__nvencsessionMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void nvencsessionAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct NvencSession *pResource, RsResourceRef *pReference) { - pResource->__nvencsessionAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS nvencsessionUnmap_DISPATCH(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__nvencsessionUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS nvencsessionControl_Prologue_DISPATCH(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvencsessionControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool nvencsessionShareCallback_DISPATCH(struct NvencSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__nvencsessionShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS nvencsessionGetRegBaseOffsetAndSize_DISPATCH(struct NvencSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__nvencsessionGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS nvencsessionInternalControlForward_DISPATCH(struct NvencSession *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__nvencsessionInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS nvencsessionUnmapFrom_DISPATCH(struct NvencSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__nvencsessionUnmapFrom__(pResource, pParams); +static inline NV_STATUS nvencsessionGetMapAddrSpace_DISPATCH(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__nvencsessionGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void nvencsessionControl_Epilogue_DISPATCH(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nvencsessionControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS nvencsessionInternalControlForward_DISPATCH(struct NvencSession *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__nvencsessionInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle nvencsessionGetInternalObjectHandle_DISPATCH(struct NvencSession *pGpuResource) { return pGpuResource->__nvencsessionGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS nvencsessionControl_DISPATCH(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__nvencsessionControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS nvencsessionUnmap_DISPATCH(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__nvencsessionUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool nvencsessionAccessCallback_DISPATCH(struct NvencSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__nvencsessionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS nvencsessionGetMemInterMapParams_DISPATCH(struct NvencSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__nvencsessionGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS nvencsessionGetMemoryMappingDescriptor_DISPATCH(struct NvencSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__nvencsessionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS nvencsessionCheckMemInterUnmap_DISPATCH(struct NvencSession *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__nvencsessionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS nvencsessionControlFilter_DISPATCH(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvencsessionControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS nvencsessionGetMemoryMappingDescriptor_DISPATCH(struct NvencSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__nvencsessionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS nvencsessionControlSerialization_Prologue_DISPATCH(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__nvencsessionControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void nvencsessionControlSerialization_Epilogue_DISPATCH(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__nvencsessionControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS nvencsessionControl_Prologue_DISPATCH(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__nvencsessionControl_Prologue__(pResource, pCallContext, pParams); +} + +static inline void nvencsessionControl_Epilogue_DISPATCH(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__nvencsessionControl_Epilogue__(pResource, pCallContext, pParams); +} + static inline NvBool nvencsessionCanCopy_DISPATCH(struct NvencSession *pResource) { return pResource->__nvencsessionCanCopy__(pResource); } -static inline NvBool nvencsessionIsPartialUnmapSupported_DISPATCH(struct NvencSession *pResource) { - return pResource->__nvencsessionIsPartialUnmapSupported__(pResource); +static inline NV_STATUS nvencsessionIsDuplicate_DISPATCH(struct NvencSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__nvencsessionIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void nvencsessionPreDestruct_DISPATCH(struct NvencSession *pResource) { pResource->__nvencsessionPreDestruct__(pResource); } -static inline NV_STATUS nvencsessionIsDuplicate_DISPATCH(struct NvencSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__nvencsessionIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS nvencsessionControlFilter_DISPATCH(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__nvencsessionControlFilter__(pResource, pCallContext, pParams); } -static inline void nvencsessionControlSerialization_Epilogue_DISPATCH(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nvencsessionControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool nvencsessionIsPartialUnmapSupported_DISPATCH(struct NvencSession *pResource) { + return pResource->__nvencsessionIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS nvencsessionMap_DISPATCH(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__nvencsessionMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS nvencsessionMapTo_DISPATCH(struct NvencSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__nvencsessionMapTo__(pResource, pParams); } -static inline NvBool nvencsessionAccessCallback_DISPATCH(struct NvencSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__nvencsessionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS nvencsessionUnmapFrom_DISPATCH(struct NvencSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__nvencsessionUnmapFrom__(pResource, pParams); +} + +static inline NvU32 nvencsessionGetRefCount_DISPATCH(struct NvencSession *pResource) { + return pResource->__nvencsessionGetRefCount__(pResource); +} + +static inline void nvencsessionAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct NvencSession *pResource, RsResourceRef *pReference) { + pResource->__nvencsessionAddAdditionalDependants__(pClient, pResource, pReference); } +NV_STATUS nvencsessionCtrlCmdNvencSwSessionUpdateInfo_IMPL(struct NvencSession *pNvencSession, NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_PARAMS *pParams); + +NV_STATUS nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2_IMPL(struct NvencSession *pNvencSession, NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_V2_PARAMS *pParams); + NV_STATUS nvencsessionConstruct_IMPL(struct NvencSession *arg_pNvencSession, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_nvencsessionConstruct(arg_pNvencSession, arg_pCallContext, arg_pParams) nvencsessionConstruct_IMPL(arg_pNvencSession, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_nvfbc_session_nvoc.c b/src/nvidia/generated/g_nvfbc_session_nvoc.c index 7e557b6a58..0a5bd7775c 100644 --- a/src/nvidia/generated/g_nvfbc_session_nvoc.c +++ b/src/nvidia/generated/g_nvfbc_session_nvoc.c @@ -93,129 +93,157 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_NvfbcSession = /*pExportInfo=*/ &__nvoc_export_info_NvfbcSession }; -static NvBool __nvoc_thunk_GpuResource_nvfbcsessionShareCallback(struct NvfbcSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NV_STATUS __nvoc_thunk_RmResource_nvfbcsessionCheckMemInterUnmap(struct NvfbcSession *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), bSubdeviceHandleProvided); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_NvfbcSession[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0xa0bd0101u, + /*paramSize=*/ sizeof(NVA0BD_CTRL_NVFBC_SW_SESSION_UPDATE_INFO_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_NvfbcSession.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo" +#endif + }, + +}; -static NV_STATUS __nvoc_thunk_RsResource_nvfbcsessionMapTo(struct NvfbcSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset), pParams); +// 25 up-thunk(s) defined to bridge methods in NvfbcSession to superclasses + +// nvfbcsessionControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionControl(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_nvfbcsessionGetMapAddrSpace(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// nvfbcsessionMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionMap(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_nvfbcsessionGetRefCount(struct NvfbcSession *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset)); +// nvfbcsessionUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionUnmap(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_RsResource_nvfbcsessionAddAdditionalDependants(struct RsClient *pClient, struct NvfbcSession *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset), pReference); +// nvfbcsessionShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_nvfbcsessionShareCallback(struct NvfbcSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RmResource_nvfbcsessionControl_Prologue(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), pCallContext, pParams); +// nvfbcsessionGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionGetRegBaseOffsetAndSize(struct NvfbcSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_GpuResource_nvfbcsessionGetRegBaseOffsetAndSize(struct NvfbcSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), pGpu, pOffset, pSize); +// nvfbcsessionGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionGetMapAddrSpace(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_GpuResource_nvfbcsessionInternalControlForward(struct NvfbcSession *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), command, pParams, size); +// nvfbcsessionInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionInternalControlForward(struct NvfbcSession *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_RsResource_nvfbcsessionUnmapFrom(struct NvfbcSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset), pParams); +// nvfbcsessionGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_nvfbcsessionGetInternalObjectHandle(struct NvfbcSession *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset)); } -static void __nvoc_thunk_RmResource_nvfbcsessionControl_Epilogue(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), pCallContext, pParams); +// nvfbcsessionAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_nvfbcsessionAccessCallback(struct NvfbcSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NvHandle __nvoc_thunk_GpuResource_nvfbcsessionGetInternalObjectHandle(struct NvfbcSession *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset)); +// nvfbcsessionGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_nvfbcsessionGetMemInterMapParams(struct NvfbcSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_nvfbcsessionControl(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), pCallContext, pParams); +// nvfbcsessionCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_nvfbcsessionCheckMemInterUnmap(struct NvfbcSession *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_GpuResource_nvfbcsessionUnmap(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), pCallContext, pCpuMapping); +// nvfbcsessionGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_nvfbcsessionGetMemoryMappingDescriptor(struct NvfbcSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_RmResource_nvfbcsessionGetMemInterMapParams(struct NvfbcSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), pParams); +// nvfbcsessionControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_nvfbcsessionControlSerialization_Prologue(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_nvfbcsessionGetMemoryMappingDescriptor(struct NvfbcSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), ppMemDesc); +// nvfbcsessionControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_nvfbcsessionControlSerialization_Epilogue(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_nvfbcsessionControlFilter(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset), pCallContext, pParams); +// nvfbcsessionControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_nvfbcsessionControl_Prologue(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_nvfbcsessionControlSerialization_Prologue(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), pCallContext, pParams); +// nvfbcsessionControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_nvfbcsessionControl_Epilogue(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_nvfbcsessionCanCopy(struct NvfbcSession *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset)); +// nvfbcsessionCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_nvfbcsessionCanCopy(struct NvfbcSession *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_nvfbcsessionIsPartialUnmapSupported(struct NvfbcSession *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset)); +// nvfbcsessionIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_nvfbcsessionIsDuplicate(struct NvfbcSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset), hMemory, pDuplicate); } -static void __nvoc_thunk_RsResource_nvfbcsessionPreDestruct(struct NvfbcSession *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset)); +// nvfbcsessionPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_nvfbcsessionPreDestruct(struct NvfbcSession *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_nvfbcsessionIsDuplicate(struct NvfbcSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset), hMemory, pDuplicate); +// nvfbcsessionControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_nvfbcsessionControlFilter(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RmResource_nvfbcsessionControlSerialization_Epilogue(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), pCallContext, pParams); +// nvfbcsessionIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_nvfbcsessionIsPartialUnmapSupported(struct NvfbcSession *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_nvfbcsessionMap(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// nvfbcsessionMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_nvfbcsessionMapTo(struct NvfbcSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RmResource_nvfbcsessionAccessCallback(struct NvfbcSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// nvfbcsessionUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_nvfbcsessionUnmapFrom(struct NvfbcSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset), pParams); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// nvfbcsessionGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_nvfbcsessionGetRefCount(struct NvfbcSession *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset)); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_NvfbcSession[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xa0bd0101u, - /*paramSize=*/ sizeof(NVA0BD_CTRL_NVFBC_SW_SESSION_UPDATE_INFO_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_NvfbcSession.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo" -#endif - }, +// nvfbcsessionAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_nvfbcsessionAddAdditionalDependants(struct RsClient *pClient, struct NvfbcSession *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset), pReference); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_NvfbcSession = { @@ -253,65 +281,96 @@ NV_STATUS __nvoc_ctor_NvfbcSession(NvfbcSession *pThis, struct CALL_CONTEXT * ar return status; } +// Vtable initialization static void __nvoc_init_funcTable_NvfbcSession_1(NvfbcSession *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo -- exported (id=0xa0bd0101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo__ = &nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo_IMPL; #endif - pThis->__nvfbcsessionShareCallback__ = &__nvoc_thunk_GpuResource_nvfbcsessionShareCallback; + // nvfbcsessionControl -- virtual inherited (gpures) base (gpures) + pThis->__nvfbcsessionControl__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionControl; - pThis->__nvfbcsessionCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_nvfbcsessionCheckMemInterUnmap; + // nvfbcsessionMap -- virtual inherited (gpures) base (gpures) + pThis->__nvfbcsessionMap__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionMap; - pThis->__nvfbcsessionMapTo__ = &__nvoc_thunk_RsResource_nvfbcsessionMapTo; + // nvfbcsessionUnmap -- virtual inherited (gpures) base (gpures) + pThis->__nvfbcsessionUnmap__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionUnmap; - pThis->__nvfbcsessionGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_nvfbcsessionGetMapAddrSpace; + // nvfbcsessionShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__nvfbcsessionShareCallback__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionShareCallback; - pThis->__nvfbcsessionGetRefCount__ = &__nvoc_thunk_RsResource_nvfbcsessionGetRefCount; + // nvfbcsessionGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__nvfbcsessionGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionGetRegBaseOffsetAndSize; - pThis->__nvfbcsessionAddAdditionalDependants__ = &__nvoc_thunk_RsResource_nvfbcsessionAddAdditionalDependants; + // nvfbcsessionGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__nvfbcsessionGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionGetMapAddrSpace; - pThis->__nvfbcsessionControl_Prologue__ = &__nvoc_thunk_RmResource_nvfbcsessionControl_Prologue; + // nvfbcsessionInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__nvfbcsessionInternalControlForward__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionInternalControlForward; - pThis->__nvfbcsessionGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_nvfbcsessionGetRegBaseOffsetAndSize; + // nvfbcsessionGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__nvfbcsessionGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionGetInternalObjectHandle; - pThis->__nvfbcsessionInternalControlForward__ = &__nvoc_thunk_GpuResource_nvfbcsessionInternalControlForward; + // nvfbcsessionAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__nvfbcsessionAccessCallback__ = &__nvoc_up_thunk_RmResource_nvfbcsessionAccessCallback; - pThis->__nvfbcsessionUnmapFrom__ = &__nvoc_thunk_RsResource_nvfbcsessionUnmapFrom; + // nvfbcsessionGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__nvfbcsessionGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_nvfbcsessionGetMemInterMapParams; - pThis->__nvfbcsessionControl_Epilogue__ = &__nvoc_thunk_RmResource_nvfbcsessionControl_Epilogue; + // nvfbcsessionCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__nvfbcsessionCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_nvfbcsessionCheckMemInterUnmap; - pThis->__nvfbcsessionGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_nvfbcsessionGetInternalObjectHandle; + // nvfbcsessionGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__nvfbcsessionGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_nvfbcsessionGetMemoryMappingDescriptor; - pThis->__nvfbcsessionControl__ = &__nvoc_thunk_GpuResource_nvfbcsessionControl; + // nvfbcsessionControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__nvfbcsessionControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_nvfbcsessionControlSerialization_Prologue; - pThis->__nvfbcsessionUnmap__ = &__nvoc_thunk_GpuResource_nvfbcsessionUnmap; + // nvfbcsessionControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__nvfbcsessionControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_nvfbcsessionControlSerialization_Epilogue; - pThis->__nvfbcsessionGetMemInterMapParams__ = &__nvoc_thunk_RmResource_nvfbcsessionGetMemInterMapParams; + // nvfbcsessionControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__nvfbcsessionControl_Prologue__ = &__nvoc_up_thunk_RmResource_nvfbcsessionControl_Prologue; - pThis->__nvfbcsessionGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_nvfbcsessionGetMemoryMappingDescriptor; + // nvfbcsessionControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__nvfbcsessionControl_Epilogue__ = &__nvoc_up_thunk_RmResource_nvfbcsessionControl_Epilogue; - pThis->__nvfbcsessionControlFilter__ = &__nvoc_thunk_RsResource_nvfbcsessionControlFilter; + // nvfbcsessionCanCopy -- virtual inherited (res) base (gpures) + pThis->__nvfbcsessionCanCopy__ = &__nvoc_up_thunk_RsResource_nvfbcsessionCanCopy; - pThis->__nvfbcsessionControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_nvfbcsessionControlSerialization_Prologue; + // nvfbcsessionIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__nvfbcsessionIsDuplicate__ = &__nvoc_up_thunk_RsResource_nvfbcsessionIsDuplicate; - pThis->__nvfbcsessionCanCopy__ = &__nvoc_thunk_RsResource_nvfbcsessionCanCopy; + // nvfbcsessionPreDestruct -- virtual inherited (res) base (gpures) + pThis->__nvfbcsessionPreDestruct__ = &__nvoc_up_thunk_RsResource_nvfbcsessionPreDestruct; - pThis->__nvfbcsessionIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_nvfbcsessionIsPartialUnmapSupported; + // nvfbcsessionControlFilter -- virtual inherited (res) base (gpures) + pThis->__nvfbcsessionControlFilter__ = &__nvoc_up_thunk_RsResource_nvfbcsessionControlFilter; - pThis->__nvfbcsessionPreDestruct__ = &__nvoc_thunk_RsResource_nvfbcsessionPreDestruct; + // nvfbcsessionIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__nvfbcsessionIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_nvfbcsessionIsPartialUnmapSupported; - pThis->__nvfbcsessionIsDuplicate__ = &__nvoc_thunk_RsResource_nvfbcsessionIsDuplicate; + // nvfbcsessionMapTo -- virtual inherited (res) base (gpures) + pThis->__nvfbcsessionMapTo__ = &__nvoc_up_thunk_RsResource_nvfbcsessionMapTo; - pThis->__nvfbcsessionControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_nvfbcsessionControlSerialization_Epilogue; + // nvfbcsessionUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__nvfbcsessionUnmapFrom__ = &__nvoc_up_thunk_RsResource_nvfbcsessionUnmapFrom; - pThis->__nvfbcsessionMap__ = &__nvoc_thunk_GpuResource_nvfbcsessionMap; + // nvfbcsessionGetRefCount -- virtual inherited (res) base (gpures) + pThis->__nvfbcsessionGetRefCount__ = &__nvoc_up_thunk_RsResource_nvfbcsessionGetRefCount; - pThis->__nvfbcsessionAccessCallback__ = &__nvoc_thunk_RmResource_nvfbcsessionAccessCallback; -} + // nvfbcsessionAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__nvfbcsessionAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_nvfbcsessionAddAdditionalDependants; +} // End __nvoc_init_funcTable_NvfbcSession_1 with approximately 26 basic block(s). + +// Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_NvfbcSession(NvfbcSession *pThis) { + + // Initialize vtable(s) with 26 per-object function pointer(s). __nvoc_init_funcTable_NvfbcSession_1(pThis); } diff --git a/src/nvidia/generated/g_nvfbc_session_nvoc.h b/src/nvidia/generated/g_nvfbc_session_nvoc.h index 7a790b5c13..137bf9eb64 100644 --- a/src/nvidia/generated/g_nvfbc_session_nvoc.h +++ b/src/nvidia/generated/g_nvfbc_session_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_NVFBC_SESSION_NVOC_H_ #define _G_NVFBC_SESSION_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_nvfbc_session_nvoc.h" #ifndef _NVFBCSESSION_H_ @@ -83,41 +91,52 @@ typedef struct NVFBC_SESSION_ENTRY #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct NvfbcSession { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct NvfbcSession *__nvoc_pbase_NvfbcSession; - NV_STATUS (*__nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo__)(struct NvfbcSession *, NVA0BD_CTRL_NVFBC_SW_SESSION_UPDATE_INFO_PARAMS *); - NvBool (*__nvfbcsessionShareCallback__)(struct NvfbcSession *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__nvfbcsessionCheckMemInterUnmap__)(struct NvfbcSession *, NvBool); - NV_STATUS (*__nvfbcsessionMapTo__)(struct NvfbcSession *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__nvfbcsessionGetMapAddrSpace__)(struct NvfbcSession *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__nvfbcsessionGetRefCount__)(struct NvfbcSession *); - void (*__nvfbcsessionAddAdditionalDependants__)(struct RsClient *, struct NvfbcSession *, RsResourceRef *); - NV_STATUS (*__nvfbcsessionControl_Prologue__)(struct NvfbcSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nvfbcsessionGetRegBaseOffsetAndSize__)(struct NvfbcSession *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__nvfbcsessionInternalControlForward__)(struct NvfbcSession *, NvU32, void *, NvU32); - NV_STATUS (*__nvfbcsessionUnmapFrom__)(struct NvfbcSession *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__nvfbcsessionControl_Epilogue__)(struct NvfbcSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__nvfbcsessionGetInternalObjectHandle__)(struct NvfbcSession *); - NV_STATUS (*__nvfbcsessionControl__)(struct NvfbcSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nvfbcsessionUnmap__)(struct NvfbcSession *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__nvfbcsessionGetMemInterMapParams__)(struct NvfbcSession *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__nvfbcsessionGetMemoryMappingDescriptor__)(struct NvfbcSession *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__nvfbcsessionControlFilter__)(struct NvfbcSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nvfbcsessionControlSerialization_Prologue__)(struct NvfbcSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__nvfbcsessionCanCopy__)(struct NvfbcSession *); - NvBool (*__nvfbcsessionIsPartialUnmapSupported__)(struct NvfbcSession *); - void (*__nvfbcsessionPreDestruct__)(struct NvfbcSession *); - NV_STATUS (*__nvfbcsessionIsDuplicate__)(struct NvfbcSession *, NvHandle, NvBool *); - void (*__nvfbcsessionControlSerialization_Epilogue__)(struct NvfbcSession *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__nvfbcsessionMap__)(struct NvfbcSession *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__nvfbcsessionAccessCallback__)(struct NvfbcSession *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct NvfbcSession *__nvoc_pbase_NvfbcSession; // nvfbcsession + + // Vtable with 26 per-object function pointers + NV_STATUS (*__nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo__)(struct NvfbcSession * /*this*/, NVA0BD_CTRL_NVFBC_SW_SESSION_UPDATE_INFO_PARAMS *); // exported (id=0xa0bd0101) + NV_STATUS (*__nvfbcsessionControl__)(struct NvfbcSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__nvfbcsessionMap__)(struct NvfbcSession * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__nvfbcsessionUnmap__)(struct NvfbcSession * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__nvfbcsessionShareCallback__)(struct NvfbcSession * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__nvfbcsessionGetRegBaseOffsetAndSize__)(struct NvfbcSession * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__nvfbcsessionGetMapAddrSpace__)(struct NvfbcSession * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__nvfbcsessionInternalControlForward__)(struct NvfbcSession * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__nvfbcsessionGetInternalObjectHandle__)(struct NvfbcSession * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__nvfbcsessionAccessCallback__)(struct NvfbcSession * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__nvfbcsessionGetMemInterMapParams__)(struct NvfbcSession * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__nvfbcsessionCheckMemInterUnmap__)(struct NvfbcSession * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__nvfbcsessionGetMemoryMappingDescriptor__)(struct NvfbcSession * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__nvfbcsessionControlSerialization_Prologue__)(struct NvfbcSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__nvfbcsessionControlSerialization_Epilogue__)(struct NvfbcSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__nvfbcsessionControl_Prologue__)(struct NvfbcSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__nvfbcsessionControl_Epilogue__)(struct NvfbcSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__nvfbcsessionCanCopy__)(struct NvfbcSession * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__nvfbcsessionIsDuplicate__)(struct NvfbcSession * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__nvfbcsessionPreDestruct__)(struct NvfbcSession * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__nvfbcsessionControlFilter__)(struct NvfbcSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__nvfbcsessionIsPartialUnmapSupported__)(struct NvfbcSession * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__nvfbcsessionMapTo__)(struct NvfbcSession * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__nvfbcsessionUnmapFrom__)(struct NvfbcSession * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__nvfbcsessionGetRefCount__)(struct NvfbcSession * /*this*/); // virtual inherited (res) base (gpures) + void (*__nvfbcsessionAddAdditionalDependants__)(struct RsClient *, struct NvfbcSession * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members NVFBC_SESSION_ENTRY nvfbcSessionEntry; }; @@ -130,6 +149,7 @@ typedef struct NvfbcSession NvfbcSession; #define __nvoc_class_id_NvfbcSession 0xcbde75 #endif /* __nvoc_class_id_NvfbcSession */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_NvfbcSession; #define __staticCast_NvfbcSession(pThis) \ @@ -142,145 +162,174 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_NvfbcSession; ((NvfbcSession*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(NvfbcSession))) #endif //__nvoc_nvfbc_session_h_disabled - NV_STATUS __nvoc_objCreateDynamic_NvfbcSession(NvfbcSession**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_NvfbcSession(NvfbcSession**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_NvfbcSession(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_NvfbcSession((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo_FNPTR(pNvfbcSession) pNvfbcSession->__nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo__ #define nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo(pNvfbcSession, pParams) nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo_DISPATCH(pNvfbcSession, pParams) +#define nvfbcsessionControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define nvfbcsessionControl(pGpuResource, pCallContext, pParams) nvfbcsessionControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define nvfbcsessionMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define nvfbcsessionMap(pGpuResource, pCallContext, pParams, pCpuMapping) nvfbcsessionMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define nvfbcsessionUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define nvfbcsessionUnmap(pGpuResource, pCallContext, pCpuMapping) nvfbcsessionUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define nvfbcsessionShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define nvfbcsessionShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) nvfbcsessionShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define nvfbcsessionCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) nvfbcsessionCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define nvfbcsessionMapTo(pResource, pParams) nvfbcsessionMapTo_DISPATCH(pResource, pParams) -#define nvfbcsessionGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) nvfbcsessionGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define nvfbcsessionGetRefCount(pResource) nvfbcsessionGetRefCount_DISPATCH(pResource) -#define nvfbcsessionAddAdditionalDependants(pClient, pResource, pReference) nvfbcsessionAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define nvfbcsessionControl_Prologue(pResource, pCallContext, pParams) nvfbcsessionControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define nvfbcsessionGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define nvfbcsessionGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) nvfbcsessionGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define nvfbcsessionGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define nvfbcsessionGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) nvfbcsessionGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define nvfbcsessionInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define nvfbcsessionInternalControlForward(pGpuResource, command, pParams, size) nvfbcsessionInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define nvfbcsessionUnmapFrom(pResource, pParams) nvfbcsessionUnmapFrom_DISPATCH(pResource, pParams) -#define nvfbcsessionControl_Epilogue(pResource, pCallContext, pParams) nvfbcsessionControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define nvfbcsessionGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define nvfbcsessionGetInternalObjectHandle(pGpuResource) nvfbcsessionGetInternalObjectHandle_DISPATCH(pGpuResource) -#define nvfbcsessionControl(pGpuResource, pCallContext, pParams) nvfbcsessionControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define nvfbcsessionUnmap(pGpuResource, pCallContext, pCpuMapping) nvfbcsessionUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define nvfbcsessionAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define nvfbcsessionAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) nvfbcsessionAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define nvfbcsessionGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define nvfbcsessionGetMemInterMapParams(pRmResource, pParams) nvfbcsessionGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define nvfbcsessionCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define nvfbcsessionCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) nvfbcsessionCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define nvfbcsessionGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define nvfbcsessionGetMemoryMappingDescriptor(pRmResource, ppMemDesc) nvfbcsessionGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define nvfbcsessionControlFilter(pResource, pCallContext, pParams) nvfbcsessionControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define nvfbcsessionControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define nvfbcsessionControlSerialization_Prologue(pResource, pCallContext, pParams) nvfbcsessionControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define nvfbcsessionControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define nvfbcsessionControlSerialization_Epilogue(pResource, pCallContext, pParams) nvfbcsessionControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define nvfbcsessionControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define nvfbcsessionControl_Prologue(pResource, pCallContext, pParams) nvfbcsessionControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define nvfbcsessionControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define nvfbcsessionControl_Epilogue(pResource, pCallContext, pParams) nvfbcsessionControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define nvfbcsessionCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define nvfbcsessionCanCopy(pResource) nvfbcsessionCanCopy_DISPATCH(pResource) -#define nvfbcsessionIsPartialUnmapSupported(pResource) nvfbcsessionIsPartialUnmapSupported_DISPATCH(pResource) -#define nvfbcsessionPreDestruct(pResource) nvfbcsessionPreDestruct_DISPATCH(pResource) +#define nvfbcsessionIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define nvfbcsessionIsDuplicate(pResource, hMemory, pDuplicate) nvfbcsessionIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define nvfbcsessionControlSerialization_Epilogue(pResource, pCallContext, pParams) nvfbcsessionControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define nvfbcsessionMap(pGpuResource, pCallContext, pParams, pCpuMapping) nvfbcsessionMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define nvfbcsessionAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) nvfbcsessionAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo_IMPL(struct NvfbcSession *pNvfbcSession, NVA0BD_CTRL_NVFBC_SW_SESSION_UPDATE_INFO_PARAMS *pParams); +#define nvfbcsessionPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define nvfbcsessionPreDestruct(pResource) nvfbcsessionPreDestruct_DISPATCH(pResource) +#define nvfbcsessionControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define nvfbcsessionControlFilter(pResource, pCallContext, pParams) nvfbcsessionControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define nvfbcsessionIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define nvfbcsessionIsPartialUnmapSupported(pResource) nvfbcsessionIsPartialUnmapSupported_DISPATCH(pResource) +#define nvfbcsessionMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define nvfbcsessionMapTo(pResource, pParams) nvfbcsessionMapTo_DISPATCH(pResource, pParams) +#define nvfbcsessionUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define nvfbcsessionUnmapFrom(pResource, pParams) nvfbcsessionUnmapFrom_DISPATCH(pResource, pParams) +#define nvfbcsessionGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define nvfbcsessionGetRefCount(pResource) nvfbcsessionGetRefCount_DISPATCH(pResource) +#define nvfbcsessionAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define nvfbcsessionAddAdditionalDependants(pClient, pResource, pReference) nvfbcsessionAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo_DISPATCH(struct NvfbcSession *pNvfbcSession, NVA0BD_CTRL_NVFBC_SW_SESSION_UPDATE_INFO_PARAMS *pParams) { return pNvfbcSession->__nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo__(pNvfbcSession, pParams); } -static inline NvBool nvfbcsessionShareCallback_DISPATCH(struct NvfbcSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__nvfbcsessionShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS nvfbcsessionCheckMemInterUnmap_DISPATCH(struct NvfbcSession *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__nvfbcsessionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); -} - -static inline NV_STATUS nvfbcsessionMapTo_DISPATCH(struct NvfbcSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__nvfbcsessionMapTo__(pResource, pParams); -} - -static inline NV_STATUS nvfbcsessionGetMapAddrSpace_DISPATCH(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__nvfbcsessionGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +static inline NV_STATUS nvfbcsessionControl_DISPATCH(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__nvfbcsessionControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 nvfbcsessionGetRefCount_DISPATCH(struct NvfbcSession *pResource) { - return pResource->__nvfbcsessionGetRefCount__(pResource); +static inline NV_STATUS nvfbcsessionMap_DISPATCH(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__nvfbcsessionMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void nvfbcsessionAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct NvfbcSession *pResource, RsResourceRef *pReference) { - pResource->__nvfbcsessionAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS nvfbcsessionUnmap_DISPATCH(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__nvfbcsessionUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS nvfbcsessionControl_Prologue_DISPATCH(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvfbcsessionControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool nvfbcsessionShareCallback_DISPATCH(struct NvfbcSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__nvfbcsessionShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS nvfbcsessionGetRegBaseOffsetAndSize_DISPATCH(struct NvfbcSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__nvfbcsessionGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS nvfbcsessionInternalControlForward_DISPATCH(struct NvfbcSession *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__nvfbcsessionInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS nvfbcsessionUnmapFrom_DISPATCH(struct NvfbcSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__nvfbcsessionUnmapFrom__(pResource, pParams); +static inline NV_STATUS nvfbcsessionGetMapAddrSpace_DISPATCH(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__nvfbcsessionGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void nvfbcsessionControl_Epilogue_DISPATCH(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nvfbcsessionControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS nvfbcsessionInternalControlForward_DISPATCH(struct NvfbcSession *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__nvfbcsessionInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle nvfbcsessionGetInternalObjectHandle_DISPATCH(struct NvfbcSession *pGpuResource) { return pGpuResource->__nvfbcsessionGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS nvfbcsessionControl_DISPATCH(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__nvfbcsessionControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS nvfbcsessionUnmap_DISPATCH(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__nvfbcsessionUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool nvfbcsessionAccessCallback_DISPATCH(struct NvfbcSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__nvfbcsessionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS nvfbcsessionGetMemInterMapParams_DISPATCH(struct NvfbcSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__nvfbcsessionGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS nvfbcsessionGetMemoryMappingDescriptor_DISPATCH(struct NvfbcSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__nvfbcsessionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS nvfbcsessionCheckMemInterUnmap_DISPATCH(struct NvfbcSession *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__nvfbcsessionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS nvfbcsessionControlFilter_DISPATCH(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvfbcsessionControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS nvfbcsessionGetMemoryMappingDescriptor_DISPATCH(struct NvfbcSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__nvfbcsessionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS nvfbcsessionControlSerialization_Prologue_DISPATCH(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__nvfbcsessionControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void nvfbcsessionControlSerialization_Epilogue_DISPATCH(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__nvfbcsessionControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS nvfbcsessionControl_Prologue_DISPATCH(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__nvfbcsessionControl_Prologue__(pResource, pCallContext, pParams); +} + +static inline void nvfbcsessionControl_Epilogue_DISPATCH(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__nvfbcsessionControl_Epilogue__(pResource, pCallContext, pParams); +} + static inline NvBool nvfbcsessionCanCopy_DISPATCH(struct NvfbcSession *pResource) { return pResource->__nvfbcsessionCanCopy__(pResource); } -static inline NvBool nvfbcsessionIsPartialUnmapSupported_DISPATCH(struct NvfbcSession *pResource) { - return pResource->__nvfbcsessionIsPartialUnmapSupported__(pResource); +static inline NV_STATUS nvfbcsessionIsDuplicate_DISPATCH(struct NvfbcSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__nvfbcsessionIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void nvfbcsessionPreDestruct_DISPATCH(struct NvfbcSession *pResource) { pResource->__nvfbcsessionPreDestruct__(pResource); } -static inline NV_STATUS nvfbcsessionIsDuplicate_DISPATCH(struct NvfbcSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__nvfbcsessionIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS nvfbcsessionControlFilter_DISPATCH(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__nvfbcsessionControlFilter__(pResource, pCallContext, pParams); } -static inline void nvfbcsessionControlSerialization_Epilogue_DISPATCH(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nvfbcsessionControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool nvfbcsessionIsPartialUnmapSupported_DISPATCH(struct NvfbcSession *pResource) { + return pResource->__nvfbcsessionIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS nvfbcsessionMap_DISPATCH(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__nvfbcsessionMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS nvfbcsessionMapTo_DISPATCH(struct NvfbcSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__nvfbcsessionMapTo__(pResource, pParams); } -static inline NvBool nvfbcsessionAccessCallback_DISPATCH(struct NvfbcSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__nvfbcsessionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS nvfbcsessionUnmapFrom_DISPATCH(struct NvfbcSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__nvfbcsessionUnmapFrom__(pResource, pParams); } +static inline NvU32 nvfbcsessionGetRefCount_DISPATCH(struct NvfbcSession *pResource) { + return pResource->__nvfbcsessionGetRefCount__(pResource); +} + +static inline void nvfbcsessionAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct NvfbcSession *pResource, RsResourceRef *pReference) { + pResource->__nvfbcsessionAddAdditionalDependants__(pClient, pResource, pReference); +} + +NV_STATUS nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo_IMPL(struct NvfbcSession *pNvfbcSession, NVA0BD_CTRL_NVFBC_SW_SESSION_UPDATE_INFO_PARAMS *pParams); + NV_STATUS nvfbcsessionConstruct_IMPL(struct NvfbcSession *arg_pNvfbcSession, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_nvfbcsessionConstruct(arg_pNvfbcSession, arg_pCallContext, arg_pParams) nvfbcsessionConstruct_IMPL(arg_pNvfbcSession, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_object_nvoc.c b/src/nvidia/generated/g_object_nvoc.c index 404d278a2d..d86d8b2075 100644 --- a/src/nvidia/generated/g_object_nvoc.c +++ b/src/nvidia/generated/g_object_nvoc.c @@ -72,10 +72,13 @@ NV_STATUS __nvoc_ctor_Object(Object *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_Object_1(Object *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_Object_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_Object(Object *pThis) { __nvoc_init_funcTable_Object_1(pThis); } diff --git a/src/nvidia/generated/g_object_nvoc.h b/src/nvidia/generated/g_object_nvoc.h index ff1237acf6..7bb54c7715 100644 --- a/src/nvidia/generated/g_object_nvoc.h +++ b/src/nvidia/generated/g_object_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_OBJECT_NVOC_H_ #define _G_OBJECT_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -33,6 +40,7 @@ extern "C" { * This file is part of the NVOC runtime. */ +#pragma once #include "g_object_nvoc.h" #ifndef _NVOC_OBJECT_H_ @@ -43,6 +51,7 @@ extern "C" { #include "nvoc/prelude.h" + struct Object; #ifndef __NVOC_CLASS_Object_TYPEDEF__ @@ -78,9 +87,16 @@ struct NVOC_CHILD_TREE #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct Object { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; - struct Object *__nvoc_pbase_Object; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj + + // Data members struct Object *pParent; struct NVOC_CHILD_TREE childTree; NvU32 ipVersion; @@ -96,6 +112,7 @@ typedef struct Object Object; #define __nvoc_class_id_Object 0x497031 #endif /* __nvoc_class_id_Object */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_Object; #define __staticCast_Object(pThis) \ @@ -108,13 +125,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_Object; ((Object*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(Object))) #endif //__nvoc_object_h_disabled - NV_STATUS __nvoc_objCreateDynamic_Object(Object**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_Object(Object**, Dynamic*, NvU32); #define __objCreate_Object(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_Object((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions void objAddChild_IMPL(struct Object *pObj, struct Object *pChild); #ifdef __nvoc_object_h_disabled diff --git a/src/nvidia/generated/g_objgpumon_nvoc.c b/src/nvidia/generated/g_objgpumon_nvoc.c index 5777352e8b..b2c18b6915 100644 --- a/src/nvidia/generated/g_objgpumon_nvoc.c +++ b/src/nvidia/generated/g_objgpumon_nvoc.c @@ -66,62 +66,79 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPUMON = /*pExportInfo=*/ &__nvoc_export_info_OBJGPUMON }; -static NV_STATUS __nvoc_thunk_OBJENGSTATE_gpumonStateLoad(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg0) { - return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg0); +// 14 up-thunk(s) defined to bridge methods in OBJGPUMON to superclasses + +// gpumonConstructEngine: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonConstructEngine(POBJGPU pGpu, struct OBJGPUMON *pEngstate, ENGDESCRIPTOR arg3) { + return engstateConstructEngine(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_gpumonStateUnload(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg0) { - return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg0); +// gpumonInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_gpumonInitMissing(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_gpumonStateInitLocked(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { - return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); +// gpumonStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonStatePreInitLocked(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_gpumonStatePreLoad(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg0); +// gpumonStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonStatePreInitUnlocked(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_gpumonStatePostUnload(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg0); +// gpumonStateInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonStateInitLocked(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { + return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_gpumonStateDestroy(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { - engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); +// gpumonStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonStateInitUnlocked(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_gpumonStatePreUnload(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg0); +// gpumonStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonStatePreLoad(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_gpumonStateInitUnlocked(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); +// gpumonStateLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonStateLoad(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { + return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_gpumonInitMissing(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); +// gpumonStatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonStatePostLoad(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_gpumonStatePreInitLocked(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); +// gpumonStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonStatePreUnload(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_gpumonStatePreInitUnlocked(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); +// gpumonStateUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonStateUnload(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { + return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_gpumonStatePostLoad(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg0); +// gpumonStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonStatePostUnload(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_gpumonConstructEngine(POBJGPU pGpu, struct OBJGPUMON *pEngstate, ENGDESCRIPTOR arg0) { - return engstateConstructEngine(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg0); +// gpumonStateDestroy: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_gpumonStateDestroy(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { + engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); } -static NvBool __nvoc_thunk_OBJENGSTATE_gpumonIsPresent(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); +// gpumonIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_gpumonIsPresent(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJGPUMON = { /*numEntries=*/ 0, @@ -157,6 +174,7 @@ NV_STATUS __nvoc_ctor_OBJGPUMON(OBJGPUMON *pThis, RmHalspecOwner *pRmhalspecowne return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJGPUMON_1(OBJGPUMON *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -165,36 +183,54 @@ static void __nvoc_init_funcTable_OBJGPUMON_1(OBJGPUMON *pThis, RmHalspecOwner * PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); - pThis->__gpumonStateLoad__ = &__nvoc_thunk_OBJENGSTATE_gpumonStateLoad; + // gpumonConstructEngine -- virtual inherited (engstate) base (engstate) + pThis->__gpumonConstructEngine__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonConstructEngine; - pThis->__gpumonStateUnload__ = &__nvoc_thunk_OBJENGSTATE_gpumonStateUnload; + // gpumonInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__gpumonInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonInitMissing; - pThis->__gpumonStateInitLocked__ = &__nvoc_thunk_OBJENGSTATE_gpumonStateInitLocked; + // gpumonStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__gpumonStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStatePreInitLocked; - pThis->__gpumonStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_gpumonStatePreLoad; + // gpumonStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__gpumonStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStatePreInitUnlocked; - pThis->__gpumonStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_gpumonStatePostUnload; + // gpumonStateInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__gpumonStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStateInitLocked; - pThis->__gpumonStateDestroy__ = &__nvoc_thunk_OBJENGSTATE_gpumonStateDestroy; + // gpumonStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__gpumonStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStateInitUnlocked; - pThis->__gpumonStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_gpumonStatePreUnload; + // gpumonStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__gpumonStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStatePreLoad; - pThis->__gpumonStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_gpumonStateInitUnlocked; + // gpumonStateLoad -- virtual inherited (engstate) base (engstate) + pThis->__gpumonStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStateLoad; - pThis->__gpumonInitMissing__ = &__nvoc_thunk_OBJENGSTATE_gpumonInitMissing; + // gpumonStatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__gpumonStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStatePostLoad; - pThis->__gpumonStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_gpumonStatePreInitLocked; + // gpumonStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__gpumonStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStatePreUnload; - pThis->__gpumonStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_gpumonStatePreInitUnlocked; + // gpumonStateUnload -- virtual inherited (engstate) base (engstate) + pThis->__gpumonStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStateUnload; - pThis->__gpumonStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_gpumonStatePostLoad; + // gpumonStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__gpumonStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStatePostUnload; - pThis->__gpumonConstructEngine__ = &__nvoc_thunk_OBJENGSTATE_gpumonConstructEngine; + // gpumonStateDestroy -- virtual inherited (engstate) base (engstate) + pThis->__gpumonStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStateDestroy; - pThis->__gpumonIsPresent__ = &__nvoc_thunk_OBJENGSTATE_gpumonIsPresent; -} + // gpumonIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__gpumonIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonIsPresent; +} // End __nvoc_init_funcTable_OBJGPUMON_1 with approximately 14 basic block(s). + +// Initialize vtable(s) for 14 virtual method(s). void __nvoc_init_funcTable_OBJGPUMON(OBJGPUMON *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 14 per-object function pointer(s). __nvoc_init_funcTable_OBJGPUMON_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_objgpumon_nvoc.h b/src/nvidia/generated/g_objgpumon_nvoc.h index ffaf59531d..be4b680cf8 100644 --- a/src/nvidia/generated/g_objgpumon_nvoc.h +++ b/src/nvidia/generated/g_objgpumon_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_OBJGPUMON_NVOC_H_ #define _G_OBJGPUMON_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_objgpumon_nvoc.h" #ifndef OBJGPUMON_H @@ -57,26 +65,35 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJGPUMON { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct OBJGPUMON *__nvoc_pbase_OBJGPUMON; - NV_STATUS (*__gpumonStateLoad__)(POBJGPU, struct OBJGPUMON *, NvU32); - NV_STATUS (*__gpumonStateUnload__)(POBJGPU, struct OBJGPUMON *, NvU32); - NV_STATUS (*__gpumonStateInitLocked__)(POBJGPU, struct OBJGPUMON *); - NV_STATUS (*__gpumonStatePreLoad__)(POBJGPU, struct OBJGPUMON *, NvU32); - NV_STATUS (*__gpumonStatePostUnload__)(POBJGPU, struct OBJGPUMON *, NvU32); - void (*__gpumonStateDestroy__)(POBJGPU, struct OBJGPUMON *); - NV_STATUS (*__gpumonStatePreUnload__)(POBJGPU, struct OBJGPUMON *, NvU32); - NV_STATUS (*__gpumonStateInitUnlocked__)(POBJGPU, struct OBJGPUMON *); - void (*__gpumonInitMissing__)(POBJGPU, struct OBJGPUMON *); - NV_STATUS (*__gpumonStatePreInitLocked__)(POBJGPU, struct OBJGPUMON *); - NV_STATUS (*__gpumonStatePreInitUnlocked__)(POBJGPU, struct OBJGPUMON *); - NV_STATUS (*__gpumonStatePostLoad__)(POBJGPU, struct OBJGPUMON *, NvU32); - NV_STATUS (*__gpumonConstructEngine__)(POBJGPU, struct OBJGPUMON *, ENGDESCRIPTOR); - NvBool (*__gpumonIsPresent__)(POBJGPU, struct OBJGPUMON *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct OBJGPUMON *__nvoc_pbase_OBJGPUMON; // gpumon + + // Vtable with 14 per-object function pointers + NV_STATUS (*__gpumonConstructEngine__)(POBJGPU, struct OBJGPUMON * /*this*/, ENGDESCRIPTOR); // virtual inherited (engstate) base (engstate) + void (*__gpumonInitMissing__)(POBJGPU, struct OBJGPUMON * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__gpumonStatePreInitLocked__)(POBJGPU, struct OBJGPUMON * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__gpumonStatePreInitUnlocked__)(POBJGPU, struct OBJGPUMON * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__gpumonStateInitLocked__)(POBJGPU, struct OBJGPUMON * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__gpumonStateInitUnlocked__)(POBJGPU, struct OBJGPUMON * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__gpumonStatePreLoad__)(POBJGPU, struct OBJGPUMON * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__gpumonStateLoad__)(POBJGPU, struct OBJGPUMON * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__gpumonStatePostLoad__)(POBJGPU, struct OBJGPUMON * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__gpumonStatePreUnload__)(POBJGPU, struct OBJGPUMON * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__gpumonStateUnload__)(POBJGPU, struct OBJGPUMON * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__gpumonStatePostUnload__)(POBJGPU, struct OBJGPUMON * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__gpumonStateDestroy__)(POBJGPU, struct OBJGPUMON * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__gpumonIsPresent__)(POBJGPU, struct OBJGPUMON * /*this*/); // virtual inherited (engstate) base (engstate) }; #ifndef __NVOC_CLASS_OBJGPUMON_TYPEDEF__ @@ -88,6 +105,7 @@ typedef struct OBJGPUMON OBJGPUMON; #define __nvoc_class_id_OBJGPUMON 0x2b424b #endif /* __nvoc_class_id_OBJGPUMON */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPUMON; #define __staticCast_OBJGPUMON(pThis) \ @@ -100,6 +118,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPUMON; ((OBJGPUMON*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJGPUMON))) #endif //__nvoc_objgpumon_h_disabled +// Property macros #define PDB_PROP_GPUMON_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_GPUMON_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -109,98 +128,116 @@ NV_STATUS __nvoc_objCreate_OBJGPUMON(OBJGPUMON**, Dynamic*, NvU32); #define __objCreate_OBJGPUMON(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJGPUMON((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define gpumonStateLoad(pGpu, pEngstate, arg0) gpumonStateLoad_DISPATCH(pGpu, pEngstate, arg0) -#define gpumonStateUnload(pGpu, pEngstate, arg0) gpumonStateUnload_DISPATCH(pGpu, pEngstate, arg0) -#define gpumonStateInitLocked(pGpu, pEngstate) gpumonStateInitLocked_DISPATCH(pGpu, pEngstate) -#define gpumonStatePreLoad(pGpu, pEngstate, arg0) gpumonStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define gpumonStatePostUnload(pGpu, pEngstate, arg0) gpumonStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define gpumonStateDestroy(pGpu, pEngstate) gpumonStateDestroy_DISPATCH(pGpu, pEngstate) -#define gpumonStatePreUnload(pGpu, pEngstate, arg0) gpumonStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define gpumonStateInitUnlocked(pGpu, pEngstate) gpumonStateInitUnlocked_DISPATCH(pGpu, pEngstate) + +// Wrapper macros +#define gpumonConstructEngine_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ +#define gpumonConstructEngine(pGpu, pEngstate, arg3) gpumonConstructEngine_DISPATCH(pGpu, pEngstate, arg3) +#define gpumonInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define gpumonInitMissing(pGpu, pEngstate) gpumonInitMissing_DISPATCH(pGpu, pEngstate) +#define gpumonStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define gpumonStatePreInitLocked(pGpu, pEngstate) gpumonStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define gpumonStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define gpumonStatePreInitUnlocked(pGpu, pEngstate) gpumonStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define gpumonStatePostLoad(pGpu, pEngstate, arg0) gpumonStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) -#define gpumonConstructEngine(pGpu, pEngstate, arg0) gpumonConstructEngine_DISPATCH(pGpu, pEngstate, arg0) +#define gpumonStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define gpumonStateInitLocked(pGpu, pEngstate) gpumonStateInitLocked_DISPATCH(pGpu, pEngstate) +#define gpumonStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define gpumonStateInitUnlocked(pGpu, pEngstate) gpumonStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define gpumonStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define gpumonStatePreLoad(pGpu, pEngstate, arg3) gpumonStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define gpumonStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define gpumonStateLoad(pGpu, pEngstate, arg3) gpumonStateLoad_DISPATCH(pGpu, pEngstate, arg3) +#define gpumonStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define gpumonStatePostLoad(pGpu, pEngstate, arg3) gpumonStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define gpumonStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define gpumonStatePreUnload(pGpu, pEngstate, arg3) gpumonStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define gpumonStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define gpumonStateUnload(pGpu, pEngstate, arg3) gpumonStateUnload_DISPATCH(pGpu, pEngstate, arg3) +#define gpumonStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define gpumonStatePostUnload(pGpu, pEngstate, arg3) gpumonStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define gpumonStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define gpumonStateDestroy(pGpu, pEngstate) gpumonStateDestroy_DISPATCH(pGpu, pEngstate) +#define gpumonIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define gpumonIsPresent(pGpu, pEngstate) gpumonIsPresent_DISPATCH(pGpu, pEngstate) -void gpumonGetContextProcessInfo_GM107(struct OBJGPU *pGpu, struct OBJGPUMON *pGpumon, RM_ENGINE_TYPE rmEngineTypeBegin, RM_ENGINE_TYPE rmEngineTypeEnd, NvU32 context, NvU32 *pProcID, NvU32 *pSubProcessID, const char **pSubProcessName); - -#ifdef __nvoc_objgpumon_h_disabled -static inline void gpumonGetContextProcessInfo(struct OBJGPU *pGpu, struct OBJGPUMON *pGpumon, RM_ENGINE_TYPE rmEngineTypeBegin, RM_ENGINE_TYPE rmEngineTypeEnd, NvU32 context, NvU32 *pProcID, NvU32 *pSubProcessID, const char **pSubProcessName) { - NV_ASSERT_FAILED_PRECOMP("OBJGPUMON was disabled!"); +// Dispatch functions +static inline NV_STATUS gpumonConstructEngine_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate, ENGDESCRIPTOR arg3) { + return pEngstate->__gpumonConstructEngine__(pGpu, pEngstate, arg3); } -#else //__nvoc_objgpumon_h_disabled -#define gpumonGetContextProcessInfo(pGpu, pGpumon, rmEngineTypeBegin, rmEngineTypeEnd, context, pProcID, pSubProcessID, pSubProcessName) gpumonGetContextProcessInfo_GM107(pGpu, pGpumon, rmEngineTypeBegin, rmEngineTypeEnd, context, pProcID, pSubProcessID, pSubProcessName) -#endif //__nvoc_objgpumon_h_disabled -#define gpumonGetContextProcessInfo_HAL(pGpu, pGpumon, rmEngineTypeBegin, rmEngineTypeEnd, context, pProcID, pSubProcessID, pSubProcessName) gpumonGetContextProcessInfo(pGpu, pGpumon, rmEngineTypeBegin, rmEngineTypeEnd, context, pProcID, pSubProcessID, pSubProcessName) +static inline void gpumonInitMissing_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { + pEngstate->__gpumonInitMissing__(pGpu, pEngstate); +} -static inline NV_STATUS gpumonStateLoad_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg0) { - return pEngstate->__gpumonStateLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS gpumonStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { + return pEngstate->__gpumonStatePreInitLocked__(pGpu, pEngstate); } -static inline NV_STATUS gpumonStateUnload_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg0) { - return pEngstate->__gpumonStateUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS gpumonStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { + return pEngstate->__gpumonStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS gpumonStateInitLocked_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { return pEngstate->__gpumonStateInitLocked__(pGpu, pEngstate); } -static inline NV_STATUS gpumonStatePreLoad_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg0) { - return pEngstate->__gpumonStatePreLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS gpumonStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { + return pEngstate->__gpumonStateInitUnlocked__(pGpu, pEngstate); } -static inline NV_STATUS gpumonStatePostUnload_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg0) { - return pEngstate->__gpumonStatePostUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS gpumonStatePreLoad_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { + return pEngstate->__gpumonStatePreLoad__(pGpu, pEngstate, arg3); } -static inline void gpumonStateDestroy_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { - pEngstate->__gpumonStateDestroy__(pGpu, pEngstate); +static inline NV_STATUS gpumonStateLoad_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { + return pEngstate->__gpumonStateLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS gpumonStatePreUnload_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg0) { - return pEngstate->__gpumonStatePreUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS gpumonStatePostLoad_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { + return pEngstate->__gpumonStatePostLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS gpumonStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { - return pEngstate->__gpumonStateInitUnlocked__(pGpu, pEngstate); +static inline NV_STATUS gpumonStatePreUnload_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { + return pEngstate->__gpumonStatePreUnload__(pGpu, pEngstate, arg3); } -static inline void gpumonInitMissing_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { - pEngstate->__gpumonInitMissing__(pGpu, pEngstate); +static inline NV_STATUS gpumonStateUnload_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { + return pEngstate->__gpumonStateUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS gpumonStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { - return pEngstate->__gpumonStatePreInitLocked__(pGpu, pEngstate); +static inline NV_STATUS gpumonStatePostUnload_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { + return pEngstate->__gpumonStatePostUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS gpumonStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { - return pEngstate->__gpumonStatePreInitUnlocked__(pGpu, pEngstate); +static inline void gpumonStateDestroy_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { + pEngstate->__gpumonStateDestroy__(pGpu, pEngstate); } -static inline NV_STATUS gpumonStatePostLoad_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate, NvU32 arg0) { - return pEngstate->__gpumonStatePostLoad__(pGpu, pEngstate, arg0); +static inline NvBool gpumonIsPresent_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { + return pEngstate->__gpumonIsPresent__(pGpu, pEngstate); } -static inline NV_STATUS gpumonConstructEngine_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate, ENGDESCRIPTOR arg0) { - return pEngstate->__gpumonConstructEngine__(pGpu, pEngstate, arg0); -} +void gpumonGetContextProcessInfo_GM107(struct OBJGPU *pGpu, struct OBJGPUMON *pGpumon, RM_ENGINE_TYPE rmEngineTypeBegin, RM_ENGINE_TYPE rmEngineTypeEnd, NvU32 context, NvU32 *pProcID, NvU32 *pSubProcessID, const char **pSubProcessName); -static inline NvBool gpumonIsPresent_DISPATCH(POBJGPU pGpu, struct OBJGPUMON *pEngstate) { - return pEngstate->__gpumonIsPresent__(pGpu, pEngstate); + +#ifdef __nvoc_objgpumon_h_disabled +static inline void gpumonGetContextProcessInfo(struct OBJGPU *pGpu, struct OBJGPUMON *pGpumon, RM_ENGINE_TYPE rmEngineTypeBegin, RM_ENGINE_TYPE rmEngineTypeEnd, NvU32 context, NvU32 *pProcID, NvU32 *pSubProcessID, const char **pSubProcessName) { + NV_ASSERT_FAILED_PRECOMP("OBJGPUMON was disabled!"); } +#else //__nvoc_objgpumon_h_disabled +#define gpumonGetContextProcessInfo(pGpu, pGpumon, rmEngineTypeBegin, rmEngineTypeEnd, context, pProcID, pSubProcessID, pSubProcessName) gpumonGetContextProcessInfo_GM107(pGpu, pGpumon, rmEngineTypeBegin, rmEngineTypeEnd, context, pProcID, pSubProcessID, pSubProcessName) +#endif //__nvoc_objgpumon_h_disabled + +#define gpumonGetContextProcessInfo_HAL(pGpu, pGpumon, rmEngineTypeBegin, rmEngineTypeEnd, context, pProcID, pSubProcessID, pSubProcessName) gpumonGetContextProcessInfo(pGpu, pGpumon, rmEngineTypeBegin, rmEngineTypeEnd, context, pProcID, pSubProcessID, pSubProcessName) -NV_STATUS gpumonGetPerfmonUtilSamples_IMPL(struct OBJGPU *pGpu, struct OBJGPUMON *pGpumon, NV2080_CTRL_PERF_GPUMON_PERFMON_UTIL_SAMPLE *arg0, NvU32 arg1, NvU32 *arg2); +NV_STATUS gpumonGetPerfmonUtilSamples_IMPL(struct OBJGPU *pGpu, struct OBJGPUMON *pGpumon, NV2080_CTRL_PERF_GPUMON_PERFMON_UTIL_SAMPLE *arg3, NvU32 arg4, NvU32 *arg5); #ifdef __nvoc_objgpumon_h_disabled -static inline NV_STATUS gpumonGetPerfmonUtilSamples(struct OBJGPU *pGpu, struct OBJGPUMON *pGpumon, NV2080_CTRL_PERF_GPUMON_PERFMON_UTIL_SAMPLE *arg0, NvU32 arg1, NvU32 *arg2) { +static inline NV_STATUS gpumonGetPerfmonUtilSamples(struct OBJGPU *pGpu, struct OBJGPUMON *pGpumon, NV2080_CTRL_PERF_GPUMON_PERFMON_UTIL_SAMPLE *arg3, NvU32 arg4, NvU32 *arg5) { NV_ASSERT_FAILED_PRECOMP("OBJGPUMON was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_objgpumon_h_disabled -#define gpumonGetPerfmonUtilSamples(pGpu, pGpumon, arg0, arg1, arg2) gpumonGetPerfmonUtilSamples_IMPL(pGpu, pGpumon, arg0, arg1, arg2) +#define gpumonGetPerfmonUtilSamples(pGpu, pGpumon, arg3, arg4, arg5) gpumonGetPerfmonUtilSamples_IMPL(pGpu, pGpumon, arg3, arg4, arg5) #endif //__nvoc_objgpumon_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_objsweng_nvoc.c b/src/nvidia/generated/g_objsweng_nvoc.c index 833f274e77..9d8f284df3 100644 --- a/src/nvidia/generated/g_objsweng_nvoc.c +++ b/src/nvidia/generated/g_objsweng_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJSWENG = /*pExportInfo=*/ &__nvoc_export_info_OBJSWENG }; -static NV_STATUS __nvoc_thunk_OBJSWENG_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pSweng, ENGDESCRIPTOR arg0) { - return swengConstructEngine(pGpu, (struct OBJSWENG *)(((unsigned char *)pSweng) - __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg0); +// 1 down-thunk(s) defined to bridge methods in OBJSWENG from superclasses + +// swengConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_OBJSWENG_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pSweng, ENGDESCRIPTOR arg3) { + return swengConstructEngine(pGpu, (struct OBJSWENG *)(((unsigned char *) pSweng) - __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swengStateLoad(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg0) { - return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg0); + +// 13 up-thunk(s) defined to bridge methods in OBJSWENG to superclasses + +// swengInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_swengInitMissing(POBJGPU pGpu, struct OBJSWENG *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swengStateUnload(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg0) { - return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg0); +// swengStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePreInitLocked(POBJGPU pGpu, struct OBJSWENG *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swengStateInitLocked(POBJGPU pGpu, struct OBJSWENG *pEngstate) { - return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); +// swengStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePreInitUnlocked(POBJGPU pGpu, struct OBJSWENG *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swengStatePreLoad(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg0); +// swengStateInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStateInitLocked(POBJGPU pGpu, struct OBJSWENG *pEngstate) { + return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swengStatePostUnload(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg0); +// swengStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStateInitUnlocked(POBJGPU pGpu, struct OBJSWENG *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_swengStateDestroy(POBJGPU pGpu, struct OBJSWENG *pEngstate) { - engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); +// swengStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePreLoad(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swengStatePreUnload(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg0); +// swengStateLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStateLoad(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { + return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swengStateInitUnlocked(POBJGPU pGpu, struct OBJSWENG *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); +// swengStatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePostLoad(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_swengInitMissing(POBJGPU pGpu, struct OBJSWENG *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); +// swengStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePreUnload(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swengStatePreInitLocked(POBJGPU pGpu, struct OBJSWENG *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); +// swengStateUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStateUnload(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { + return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swengStatePreInitUnlocked(POBJGPU pGpu, struct OBJSWENG *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); +// swengStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePostUnload(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swengStatePostLoad(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg0); +// swengStateDestroy: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_swengStateDestroy(POBJGPU pGpu, struct OBJSWENG *pEngstate) { + engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); } -static NvBool __nvoc_thunk_OBJENGSTATE_swengIsPresent(POBJGPU pGpu, struct OBJSWENG *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); +// swengIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_swengIsPresent(POBJGPU pGpu, struct OBJSWENG *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJSWENG = { /*numEntries=*/ 0, @@ -152,41 +172,59 @@ NV_STATUS __nvoc_ctor_OBJSWENG(OBJSWENG *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJSWENG_1(OBJSWENG *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // swengConstructEngine -- virtual override (engstate) base (engstate) pThis->__swengConstructEngine__ = &swengConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_OBJSWENG_engstateConstructEngine; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_OBJSWENG_engstateConstructEngine; + // swengInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__swengInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_swengInitMissing; - pThis->__swengStateLoad__ = &__nvoc_thunk_OBJENGSTATE_swengStateLoad; + // swengStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__swengStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_swengStatePreInitLocked; - pThis->__swengStateUnload__ = &__nvoc_thunk_OBJENGSTATE_swengStateUnload; + // swengStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__swengStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_swengStatePreInitUnlocked; - pThis->__swengStateInitLocked__ = &__nvoc_thunk_OBJENGSTATE_swengStateInitLocked; + // swengStateInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__swengStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_swengStateInitLocked; - pThis->__swengStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_swengStatePreLoad; + // swengStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__swengStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_swengStateInitUnlocked; - pThis->__swengStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_swengStatePostUnload; + // swengStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__swengStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_swengStatePreLoad; - pThis->__swengStateDestroy__ = &__nvoc_thunk_OBJENGSTATE_swengStateDestroy; + // swengStateLoad -- virtual inherited (engstate) base (engstate) + pThis->__swengStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_swengStateLoad; - pThis->__swengStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_swengStatePreUnload; + // swengStatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__swengStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_swengStatePostLoad; - pThis->__swengStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_swengStateInitUnlocked; + // swengStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__swengStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_swengStatePreUnload; - pThis->__swengInitMissing__ = &__nvoc_thunk_OBJENGSTATE_swengInitMissing; + // swengStateUnload -- virtual inherited (engstate) base (engstate) + pThis->__swengStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_swengStateUnload; - pThis->__swengStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_swengStatePreInitLocked; + // swengStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__swengStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_swengStatePostUnload; - pThis->__swengStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_swengStatePreInitUnlocked; + // swengStateDestroy -- virtual inherited (engstate) base (engstate) + pThis->__swengStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_swengStateDestroy; - pThis->__swengStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_swengStatePostLoad; + // swengIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__swengIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_swengIsPresent; +} // End __nvoc_init_funcTable_OBJSWENG_1 with approximately 15 basic block(s). - pThis->__swengIsPresent__ = &__nvoc_thunk_OBJENGSTATE_swengIsPresent; -} +// Initialize vtable(s) for 14 virtual method(s). void __nvoc_init_funcTable_OBJSWENG(OBJSWENG *pThis) { + + // Initialize vtable(s) with 14 per-object function pointer(s). __nvoc_init_funcTable_OBJSWENG_1(pThis); } diff --git a/src/nvidia/generated/g_objsweng_nvoc.h b/src/nvidia/generated/g_objsweng_nvoc.h index f29eff5859..84d6445e2e 100644 --- a/src/nvidia/generated/g_objsweng_nvoc.h +++ b/src/nvidia/generated/g_objsweng_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_OBJSWENG_NVOC_H_ #define _G_OBJSWENG_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -37,6 +44,7 @@ extern "C" { * * ****************************************************************************/ +#pragma once #include "g_objsweng_nvoc.h" #ifndef _OBJSWENG_H_ @@ -57,26 +65,35 @@ typedef struct OBJSWENG *POBJSWENG; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJSWENG { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct OBJSWENG *__nvoc_pbase_OBJSWENG; - NV_STATUS (*__swengConstructEngine__)(struct OBJGPU *, struct OBJSWENG *, ENGDESCRIPTOR); - NV_STATUS (*__swengStateLoad__)(POBJGPU, struct OBJSWENG *, NvU32); - NV_STATUS (*__swengStateUnload__)(POBJGPU, struct OBJSWENG *, NvU32); - NV_STATUS (*__swengStateInitLocked__)(POBJGPU, struct OBJSWENG *); - NV_STATUS (*__swengStatePreLoad__)(POBJGPU, struct OBJSWENG *, NvU32); - NV_STATUS (*__swengStatePostUnload__)(POBJGPU, struct OBJSWENG *, NvU32); - void (*__swengStateDestroy__)(POBJGPU, struct OBJSWENG *); - NV_STATUS (*__swengStatePreUnload__)(POBJGPU, struct OBJSWENG *, NvU32); - NV_STATUS (*__swengStateInitUnlocked__)(POBJGPU, struct OBJSWENG *); - void (*__swengInitMissing__)(POBJGPU, struct OBJSWENG *); - NV_STATUS (*__swengStatePreInitLocked__)(POBJGPU, struct OBJSWENG *); - NV_STATUS (*__swengStatePreInitUnlocked__)(POBJGPU, struct OBJSWENG *); - NV_STATUS (*__swengStatePostLoad__)(POBJGPU, struct OBJSWENG *, NvU32); - NvBool (*__swengIsPresent__)(POBJGPU, struct OBJSWENG *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct OBJSWENG *__nvoc_pbase_OBJSWENG; // sweng + + // Vtable with 14 per-object function pointers + NV_STATUS (*__swengConstructEngine__)(struct OBJGPU *, struct OBJSWENG * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + void (*__swengInitMissing__)(POBJGPU, struct OBJSWENG * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__swengStatePreInitLocked__)(POBJGPU, struct OBJSWENG * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__swengStatePreInitUnlocked__)(POBJGPU, struct OBJSWENG * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__swengStateInitLocked__)(POBJGPU, struct OBJSWENG * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__swengStateInitUnlocked__)(POBJGPU, struct OBJSWENG * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__swengStatePreLoad__)(POBJGPU, struct OBJSWENG * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__swengStateLoad__)(POBJGPU, struct OBJSWENG * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__swengStatePostLoad__)(POBJGPU, struct OBJSWENG * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__swengStatePreUnload__)(POBJGPU, struct OBJSWENG * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__swengStateUnload__)(POBJGPU, struct OBJSWENG * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__swengStatePostUnload__)(POBJGPU, struct OBJSWENG * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__swengStateDestroy__)(POBJGPU, struct OBJSWENG * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__swengIsPresent__)(POBJGPU, struct OBJSWENG * /*this*/); // virtual inherited (engstate) base (engstate) }; #ifndef __NVOC_CLASS_OBJSWENG_TYPEDEF__ @@ -88,6 +105,7 @@ typedef struct OBJSWENG OBJSWENG; #define __nvoc_class_id_OBJSWENG 0x95a6f5 #endif /* __nvoc_class_id_OBJSWENG */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJSWENG; #define __staticCast_OBJSWENG(pThis) \ @@ -100,6 +118,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJSWENG; ((OBJSWENG*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJSWENG))) #endif //__nvoc_objsweng_h_disabled +// Property macros #define PDB_PROP_SWENG_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_SWENG_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -109,78 +128,96 @@ NV_STATUS __nvoc_objCreate_OBJSWENG(OBJSWENG**, Dynamic*, NvU32); #define __objCreate_OBJSWENG(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJSWENG((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define swengConstructEngine(pGpu, pSweng, arg0) swengConstructEngine_DISPATCH(pGpu, pSweng, arg0) -#define swengStateLoad(pGpu, pEngstate, arg0) swengStateLoad_DISPATCH(pGpu, pEngstate, arg0) -#define swengStateUnload(pGpu, pEngstate, arg0) swengStateUnload_DISPATCH(pGpu, pEngstate, arg0) -#define swengStateInitLocked(pGpu, pEngstate) swengStateInitLocked_DISPATCH(pGpu, pEngstate) -#define swengStatePreLoad(pGpu, pEngstate, arg0) swengStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define swengStatePostUnload(pGpu, pEngstate, arg0) swengStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define swengStateDestroy(pGpu, pEngstate) swengStateDestroy_DISPATCH(pGpu, pEngstate) -#define swengStatePreUnload(pGpu, pEngstate, arg0) swengStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define swengStateInitUnlocked(pGpu, pEngstate) swengStateInitUnlocked_DISPATCH(pGpu, pEngstate) + +// Wrapper macros +#define swengConstructEngine_FNPTR(pSweng) pSweng->__swengConstructEngine__ +#define swengConstructEngine(pGpu, pSweng, arg3) swengConstructEngine_DISPATCH(pGpu, pSweng, arg3) +#define swengInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define swengInitMissing(pGpu, pEngstate) swengInitMissing_DISPATCH(pGpu, pEngstate) +#define swengStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define swengStatePreInitLocked(pGpu, pEngstate) swengStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define swengStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define swengStatePreInitUnlocked(pGpu, pEngstate) swengStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define swengStatePostLoad(pGpu, pEngstate, arg0) swengStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) +#define swengStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define swengStateInitLocked(pGpu, pEngstate) swengStateInitLocked_DISPATCH(pGpu, pEngstate) +#define swengStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define swengStateInitUnlocked(pGpu, pEngstate) swengStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define swengStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define swengStatePreLoad(pGpu, pEngstate, arg3) swengStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define swengStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define swengStateLoad(pGpu, pEngstate, arg3) swengStateLoad_DISPATCH(pGpu, pEngstate, arg3) +#define swengStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define swengStatePostLoad(pGpu, pEngstate, arg3) swengStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define swengStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define swengStatePreUnload(pGpu, pEngstate, arg3) swengStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define swengStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define swengStateUnload(pGpu, pEngstate, arg3) swengStateUnload_DISPATCH(pGpu, pEngstate, arg3) +#define swengStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define swengStatePostUnload(pGpu, pEngstate, arg3) swengStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define swengStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define swengStateDestroy(pGpu, pEngstate) swengStateDestroy_DISPATCH(pGpu, pEngstate) +#define swengIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define swengIsPresent(pGpu, pEngstate) swengIsPresent_DISPATCH(pGpu, pEngstate) -NV_STATUS swengConstructEngine_IMPL(struct OBJGPU *pGpu, struct OBJSWENG *pSweng, ENGDESCRIPTOR arg0); -static inline NV_STATUS swengConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct OBJSWENG *pSweng, ENGDESCRIPTOR arg0) { - return pSweng->__swengConstructEngine__(pGpu, pSweng, arg0); +// Dispatch functions +static inline NV_STATUS swengConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct OBJSWENG *pSweng, ENGDESCRIPTOR arg3) { + return pSweng->__swengConstructEngine__(pGpu, pSweng, arg3); } -static inline NV_STATUS swengStateLoad_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg0) { - return pEngstate->__swengStateLoad__(pGpu, pEngstate, arg0); +static inline void swengInitMissing_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate) { + pEngstate->__swengInitMissing__(pGpu, pEngstate); } -static inline NV_STATUS swengStateUnload_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg0) { - return pEngstate->__swengStateUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS swengStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate) { + return pEngstate->__swengStatePreInitLocked__(pGpu, pEngstate); } -static inline NV_STATUS swengStateInitLocked_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate) { - return pEngstate->__swengStateInitLocked__(pGpu, pEngstate); +static inline NV_STATUS swengStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate) { + return pEngstate->__swengStatePreInitUnlocked__(pGpu, pEngstate); } -static inline NV_STATUS swengStatePreLoad_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg0) { - return pEngstate->__swengStatePreLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS swengStateInitLocked_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate) { + return pEngstate->__swengStateInitLocked__(pGpu, pEngstate); } -static inline NV_STATUS swengStatePostUnload_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg0) { - return pEngstate->__swengStatePostUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS swengStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate) { + return pEngstate->__swengStateInitUnlocked__(pGpu, pEngstate); } -static inline void swengStateDestroy_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate) { - pEngstate->__swengStateDestroy__(pGpu, pEngstate); +static inline NV_STATUS swengStatePreLoad_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { + return pEngstate->__swengStatePreLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS swengStatePreUnload_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg0) { - return pEngstate->__swengStatePreUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS swengStateLoad_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { + return pEngstate->__swengStateLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS swengStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate) { - return pEngstate->__swengStateInitUnlocked__(pGpu, pEngstate); +static inline NV_STATUS swengStatePostLoad_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { + return pEngstate->__swengStatePostLoad__(pGpu, pEngstate, arg3); } -static inline void swengInitMissing_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate) { - pEngstate->__swengInitMissing__(pGpu, pEngstate); +static inline NV_STATUS swengStatePreUnload_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { + return pEngstate->__swengStatePreUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS swengStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate) { - return pEngstate->__swengStatePreInitLocked__(pGpu, pEngstate); +static inline NV_STATUS swengStateUnload_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { + return pEngstate->__swengStateUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS swengStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate) { - return pEngstate->__swengStatePreInitUnlocked__(pGpu, pEngstate); +static inline NV_STATUS swengStatePostUnload_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { + return pEngstate->__swengStatePostUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS swengStatePostLoad_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate, NvU32 arg0) { - return pEngstate->__swengStatePostLoad__(pGpu, pEngstate, arg0); +static inline void swengStateDestroy_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate) { + pEngstate->__swengStateDestroy__(pGpu, pEngstate); } static inline NvBool swengIsPresent_DISPATCH(POBJGPU pGpu, struct OBJSWENG *pEngstate) { return pEngstate->__swengIsPresent__(pGpu, pEngstate); } +NV_STATUS swengConstructEngine_IMPL(struct OBJGPU *pGpu, struct OBJSWENG *pSweng, ENGDESCRIPTOR arg3); + #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_objtmr_nvoc.c b/src/nvidia/generated/g_objtmr_nvoc.c index 0339183ce5..2d41827431 100644 --- a/src/nvidia/generated/g_objtmr_nvoc.c +++ b/src/nvidia/generated/g_objtmr_nvoc.c @@ -75,78 +75,102 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJTMR = /*pExportInfo=*/ &__nvoc_export_info_OBJTMR }; -static void __nvoc_thunk_OBJTMR_intrservRegisterIntrService(OBJGPU *pGpu, struct IntrService *pTmr, IntrServiceRecord pRecords[171]) { - tmrRegisterIntrService(pGpu, (struct OBJTMR *)(((unsigned char *)pTmr) - __nvoc_rtti_OBJTMR_IntrService.offset), pRecords); +// 9 down-thunk(s) defined to bridge methods in OBJTMR from superclasses + +// tmrRegisterIntrService: virtual override (intrserv) base (intrserv) +static void __nvoc_down_thunk_OBJTMR_intrservRegisterIntrService(OBJGPU *pGpu, struct IntrService *pTmr, IntrServiceRecord pRecords[175]) { + tmrRegisterIntrService(pGpu, (struct OBJTMR *)(((unsigned char *) pTmr) - __nvoc_rtti_OBJTMR_IntrService.offset), pRecords); } -static NvBool __nvoc_thunk_OBJTMR_intrservClearInterrupt(OBJGPU *pGpu, struct IntrService *pTmr, IntrServiceClearInterruptArguments *pParams) { - return tmrClearInterrupt(pGpu, (struct OBJTMR *)(((unsigned char *)pTmr) - __nvoc_rtti_OBJTMR_IntrService.offset), pParams); +// tmrClearInterrupt: virtual override (intrserv) base (intrserv) +static NvBool __nvoc_down_thunk_OBJTMR_intrservClearInterrupt(OBJGPU *pGpu, struct IntrService *pTmr, IntrServiceClearInterruptArguments *pParams) { + return tmrClearInterrupt(pGpu, (struct OBJTMR *)(((unsigned char *) pTmr) - __nvoc_rtti_OBJTMR_IntrService.offset), pParams); } -static NvU32 __nvoc_thunk_OBJTMR_intrservServiceInterrupt(OBJGPU *pGpu, struct IntrService *pTmr, IntrServiceServiceInterruptArguments *pParams) { - return tmrServiceInterrupt(pGpu, (struct OBJTMR *)(((unsigned char *)pTmr) - __nvoc_rtti_OBJTMR_IntrService.offset), pParams); +// tmrServiceInterrupt: virtual halified (3 hals) override (intrserv) base (intrserv) body +static NvU32 __nvoc_down_thunk_OBJTMR_intrservServiceInterrupt(OBJGPU *pGpu, struct IntrService *pTmr, IntrServiceServiceInterruptArguments *pParams) { + return tmrServiceInterrupt(pGpu, (struct OBJTMR *)(((unsigned char *) pTmr) - __nvoc_rtti_OBJTMR_IntrService.offset), pParams); } -static NV_STATUS __nvoc_thunk_OBJTMR_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pTmr, ENGDESCRIPTOR arg0) { - return tmrConstructEngine(pGpu, (struct OBJTMR *)(((unsigned char *)pTmr) - __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg0); +// tmrConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_OBJTMR_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pTmr, ENGDESCRIPTOR arg3) { + return tmrConstructEngine(pGpu, (struct OBJTMR *)(((unsigned char *) pTmr) - __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJTMR_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pTmr) { - return tmrStateInitLocked(pGpu, (struct OBJTMR *)(((unsigned char *)pTmr) - __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); +// tmrStatePreInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_OBJTMR_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pTmr) { + return tmrStatePreInitLocked(pGpu, (struct OBJTMR *)(((unsigned char *) pTmr) - __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJTMR_engstateStateInitUnlocked(OBJGPU *pGpu, struct OBJENGSTATE *pTmr) { - return tmrStateInitUnlocked(pGpu, (struct OBJTMR *)(((unsigned char *)pTmr) - __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); +// tmrStateInitUnlocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_OBJTMR_engstateStateInitUnlocked(OBJGPU *pGpu, struct OBJENGSTATE *pTmr) { + return tmrStateInitUnlocked(pGpu, (struct OBJTMR *)(((unsigned char *) pTmr) - __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJTMR_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pTmr, NvU32 arg0) { - return tmrStateLoad(pGpu, (struct OBJTMR *)(((unsigned char *)pTmr) - __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg0); +// tmrStateLoad: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_OBJTMR_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pTmr, NvU32 arg3) { + return tmrStateLoad(pGpu, (struct OBJTMR *)(((unsigned char *) pTmr) - __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJTMR_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pTmr, NvU32 arg0) { - return tmrStateUnload(pGpu, (struct OBJTMR *)(((unsigned char *)pTmr) - __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg0); +// tmrStateUnload: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_OBJTMR_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pTmr, NvU32 arg3) { + return tmrStateUnload(pGpu, (struct OBJTMR *)(((unsigned char *) pTmr) - __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJTMR_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pTmr) { - tmrStateDestroy(pGpu, (struct OBJTMR *)(((unsigned char *)pTmr) - __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); +// tmrStateDestroy: virtual override (engstate) base (engstate) +static void __nvoc_down_thunk_OBJTMR_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pTmr) { + tmrStateDestroy(pGpu, (struct OBJTMR *)(((unsigned char *) pTmr) - __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_IntrService_tmrServiceNotificationInterrupt(OBJGPU *pGpu, struct OBJTMR *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { - return intrservServiceNotificationInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_OBJTMR_IntrService.offset), pParams); + +// 9 up-thunk(s) defined to bridge methods in OBJTMR to superclasses + +// tmrInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_tmrInitMissing(POBJGPU pGpu, struct OBJTMR *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_tmrStatePreLoad(POBJGPU pGpu, struct OBJTMR *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg0); +// tmrStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStatePreInitUnlocked(POBJGPU pGpu, struct OBJTMR *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_tmrStatePostUnload(POBJGPU pGpu, struct OBJTMR *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg0); +// tmrStateInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStateInitLocked(POBJGPU pGpu, struct OBJTMR *pEngstate) { + return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_tmrStatePreUnload(POBJGPU pGpu, struct OBJTMR *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg0); +// tmrStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStatePreLoad(POBJGPU pGpu, struct OBJTMR *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_tmrInitMissing(POBJGPU pGpu, struct OBJTMR *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); +// tmrStatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStatePostLoad(POBJGPU pGpu, struct OBJTMR *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_tmrStatePreInitLocked(POBJGPU pGpu, struct OBJTMR *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); +// tmrStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStatePreUnload(POBJGPU pGpu, struct OBJTMR *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_tmrStatePreInitUnlocked(POBJGPU pGpu, struct OBJTMR *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); +// tmrStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStatePostUnload(POBJGPU pGpu, struct OBJTMR *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_tmrStatePostLoad(POBJGPU pGpu, struct OBJTMR *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg0); +// tmrIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_tmrIsPresent(POBJGPU pGpu, struct OBJTMR *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); } -static NvBool __nvoc_thunk_OBJENGSTATE_tmrIsPresent(POBJGPU pGpu, struct OBJTMR *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); +// tmrServiceNotificationInterrupt: virtual inherited (intrserv) base (intrserv) +static NV_STATUS __nvoc_up_thunk_IntrService_tmrServiceNotificationInterrupt(OBJGPU *pGpu, struct OBJTMR *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { + return intrservServiceNotificationInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_OBJTMR_IntrService.offset), pParams); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJTMR = { /*numEntries=*/ 0, @@ -237,6 +261,7 @@ NV_STATUS __nvoc_ctor_OBJTMR(OBJTMR *pThis, RmHalspecOwner *pRmhalspecowner) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJTMR_1(OBJTMR *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -249,7 +274,7 @@ static void __nvoc_init_funcTable_OBJTMR_1(OBJTMR *pThis, RmHalspecOwner *pRmhal PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // Hal function -- tmrDelay + // tmrDelay -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__tmrDelay__ = &tmrDelay_PTIMER; @@ -259,11 +284,15 @@ static void __nvoc_init_funcTable_OBJTMR_1(OBJTMR *pThis, RmHalspecOwner *pRmhal pThis->__tmrDelay__ = &tmrDelay_OSTIMER; } + // tmrRegisterIntrService -- virtual override (intrserv) base (intrserv) pThis->__tmrRegisterIntrService__ = &tmrRegisterIntrService_IMPL; + pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_OBJTMR_intrservRegisterIntrService; + // tmrClearInterrupt -- virtual override (intrserv) base (intrserv) pThis->__tmrClearInterrupt__ = &tmrClearInterrupt_IMPL; + pThis->__nvoc_base_IntrService.__intrservClearInterrupt__ = &__nvoc_down_thunk_OBJTMR_intrservClearInterrupt; - // Hal function -- tmrServiceInterrupt + // tmrServiceInterrupt -- virtual halified (3 hals) override (intrserv) base (intrserv) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ @@ -279,20 +308,33 @@ static void __nvoc_init_funcTable_OBJTMR_1(OBJTMR *pThis, RmHalspecOwner *pRmhal { pThis->__tmrServiceInterrupt__ = &tmrServiceInterrupt_56cd7a; } + pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_OBJTMR_intrservServiceInterrupt; + // tmrConstructEngine -- virtual override (engstate) base (engstate) pThis->__tmrConstructEngine__ = &tmrConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_OBJTMR_engstateConstructEngine; - pThis->__tmrStateInitLocked__ = &tmrStateInitLocked_IMPL; + // tmrStatePreInitLocked -- virtual override (engstate) base (engstate) + pThis->__tmrStatePreInitLocked__ = &tmrStatePreInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_OBJTMR_engstateStatePreInitLocked; + // tmrStateInitUnlocked -- virtual override (engstate) base (engstate) pThis->__tmrStateInitUnlocked__ = &tmrStateInitUnlocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ = &__nvoc_down_thunk_OBJTMR_engstateStateInitUnlocked; + // tmrStateLoad -- virtual override (engstate) base (engstate) pThis->__tmrStateLoad__ = &tmrStateLoad_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_OBJTMR_engstateStateLoad; + // tmrStateUnload -- virtual override (engstate) base (engstate) pThis->__tmrStateUnload__ = &tmrStateUnload_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_OBJTMR_engstateStateUnload; + // tmrStateDestroy -- virtual override (engstate) base (engstate) pThis->__tmrStateDestroy__ = &tmrStateDestroy_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_OBJTMR_engstateStateDestroy; - // Hal function -- tmrSetCurrentTime + // tmrSetCurrentTime -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__tmrSetCurrentTime__ = &tmrSetCurrentTime_56cd7a; @@ -309,7 +351,7 @@ static void __nvoc_init_funcTable_OBJTMR_1(OBJTMR *pThis, RmHalspecOwner *pRmhal } } - // Hal function -- tmrGetTimeLo + // tmrGetTimeLo -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__tmrGetTimeLo__ = &tmrGetTimeLo_GM107; @@ -319,7 +361,7 @@ static void __nvoc_init_funcTable_OBJTMR_1(OBJTMR *pThis, RmHalspecOwner *pRmhal pThis->__tmrGetTimeLo__ = &tmrGetTimeLo_cf0499; } - // Hal function -- tmrGetTime + // tmrGetTime -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__tmrGetTime__ = &tmrGetTime_GM107; @@ -329,7 +371,7 @@ static void __nvoc_init_funcTable_OBJTMR_1(OBJTMR *pThis, RmHalspecOwner *pRmhal pThis->__tmrGetTime__ = &tmrGetTime_fa6bbe; } - // Hal function -- tmrGetTimeEx + // tmrGetTimeEx -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__tmrGetTimeEx__ = &tmrGetTimeEx_GH100; @@ -339,7 +381,7 @@ static void __nvoc_init_funcTable_OBJTMR_1(OBJTMR *pThis, RmHalspecOwner *pRmhal pThis->__tmrGetTimeEx__ = &tmrGetTimeEx_GM107; } - // Hal function -- tmrSetCountdownIntrDisable + // tmrSetCountdownIntrDisable -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__tmrSetCountdownIntrDisable__ = &tmrSetCountdownIntrDisable_56cd7a; @@ -349,7 +391,7 @@ static void __nvoc_init_funcTable_OBJTMR_1(OBJTMR *pThis, RmHalspecOwner *pRmhal pThis->__tmrSetCountdownIntrDisable__ = &tmrSetCountdownIntrDisable_GM200; } - // Hal function -- tmrSetCountdown + // tmrSetCountdown -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__tmrSetCountdown__ = &tmrSetCountdown_GH100; @@ -359,7 +401,7 @@ static void __nvoc_init_funcTable_OBJTMR_1(OBJTMR *pThis, RmHalspecOwner *pRmhal pThis->__tmrSetCountdown__ = &tmrSetCountdown_TU102; } - // Hal function -- tmrGrTickFreqChange + // tmrGrTickFreqChange -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__tmrGrTickFreqChange__ = &tmrGrTickFreqChange_46f6a7; @@ -369,7 +411,7 @@ static void __nvoc_init_funcTable_OBJTMR_1(OBJTMR *pThis, RmHalspecOwner *pRmhal pThis->__tmrGrTickFreqChange__ = &tmrGrTickFreqChange_GM107; } - // Hal function -- tmrGetGpuPtimerOffset + // tmrGetGpuPtimerOffset -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { pThis->__tmrGetGpuPtimerOffset__ = &tmrGetGpuPtimerOffset_TU102; @@ -379,44 +421,39 @@ static void __nvoc_init_funcTable_OBJTMR_1(OBJTMR *pThis, RmHalspecOwner *pRmhal pThis->__tmrGetGpuPtimerOffset__ = &tmrGetGpuPtimerOffset_GA100; } - pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_thunk_OBJTMR_intrservRegisterIntrService; - - pThis->__nvoc_base_IntrService.__intrservClearInterrupt__ = &__nvoc_thunk_OBJTMR_intrservClearInterrupt; - - pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_thunk_OBJTMR_intrservServiceInterrupt; - - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_OBJTMR_engstateConstructEngine; + // tmrInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__tmrInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_tmrInitMissing; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_thunk_OBJTMR_engstateStateInitLocked; + // tmrStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__tmrStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_tmrStatePreInitUnlocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ = &__nvoc_thunk_OBJTMR_engstateStateInitUnlocked; + // tmrStateInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__tmrStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_tmrStateInitLocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_thunk_OBJTMR_engstateStateLoad; + // tmrStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__tmrStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_tmrStatePreLoad; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_thunk_OBJTMR_engstateStateUnload; + // tmrStatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__tmrStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_tmrStatePostLoad; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_thunk_OBJTMR_engstateStateDestroy; + // tmrStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__tmrStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_tmrStatePreUnload; - pThis->__tmrServiceNotificationInterrupt__ = &__nvoc_thunk_IntrService_tmrServiceNotificationInterrupt; + // tmrStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__tmrStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_tmrStatePostUnload; - pThis->__tmrStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_tmrStatePreLoad; + // tmrIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__tmrIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_tmrIsPresent; - pThis->__tmrStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_tmrStatePostUnload; + // tmrServiceNotificationInterrupt -- virtual inherited (intrserv) base (intrserv) + pThis->__tmrServiceNotificationInterrupt__ = &__nvoc_up_thunk_IntrService_tmrServiceNotificationInterrupt; +} // End __nvoc_init_funcTable_OBJTMR_1 with approximately 48 basic block(s). - pThis->__tmrStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_tmrStatePreUnload; - - pThis->__tmrInitMissing__ = &__nvoc_thunk_OBJENGSTATE_tmrInitMissing; - - pThis->__tmrStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_tmrStatePreInitLocked; - - pThis->__tmrStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_tmrStatePreInitUnlocked; - - pThis->__tmrStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_tmrStatePostLoad; - - pThis->__tmrIsPresent__ = &__nvoc_thunk_OBJENGSTATE_tmrIsPresent; -} +// Initialize vtable(s) for 27 virtual method(s). void __nvoc_init_funcTable_OBJTMR(OBJTMR *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 27 per-object function pointer(s). __nvoc_init_funcTable_OBJTMR_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_objtmr_nvoc.h b/src/nvidia/generated/g_objtmr_nvoc.h index 9ecddd2204..3b2e687457 100644 --- a/src/nvidia/generated/g_objtmr_nvoc.h +++ b/src/nvidia/generated/g_objtmr_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_OBJTMR_NVOC_H_ #define _G_OBJTMR_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_objtmr_nvoc.h" #ifndef _OBJTMR_H_ @@ -189,47 +197,60 @@ typedef struct TMR_EVENT_GENERAL_PARAMS { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJTMR { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; struct IntrService __nvoc_base_IntrService; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct IntrService *__nvoc_pbase_IntrService; - struct OBJTMR *__nvoc_pbase_OBJTMR; - NV_STATUS (*__tmrDelay__)(struct OBJTMR *, NvU32); - void (*__tmrRegisterIntrService__)(OBJGPU *, struct OBJTMR *, IntrServiceRecord *); - NvBool (*__tmrClearInterrupt__)(OBJGPU *, struct OBJTMR *, IntrServiceClearInterruptArguments *); - NvU32 (*__tmrServiceInterrupt__)(OBJGPU *, struct OBJTMR *, IntrServiceServiceInterruptArguments *); - NV_STATUS (*__tmrConstructEngine__)(OBJGPU *, struct OBJTMR *, ENGDESCRIPTOR); - NV_STATUS (*__tmrStateInitLocked__)(OBJGPU *, struct OBJTMR *); - NV_STATUS (*__tmrStateInitUnlocked__)(OBJGPU *, struct OBJTMR *); - NV_STATUS (*__tmrStateLoad__)(OBJGPU *, struct OBJTMR *, NvU32); - NV_STATUS (*__tmrStateUnload__)(OBJGPU *, struct OBJTMR *, NvU32); - void (*__tmrStateDestroy__)(OBJGPU *, struct OBJTMR *); - NV_STATUS (*__tmrSetCurrentTime__)(OBJGPU *, struct OBJTMR *); - NvU32 (*__tmrGetTimeLo__)(OBJGPU *, struct OBJTMR *); - NvU64 (*__tmrGetTime__)(OBJGPU *, struct OBJTMR *); - NvU64 (*__tmrGetTimeEx__)(OBJGPU *, struct OBJTMR *, struct THREAD_STATE_NODE *); - NV_STATUS (*__tmrSetCountdownIntrDisable__)(OBJGPU *, struct OBJTMR *); - NV_STATUS (*__tmrSetCountdown__)(OBJGPU *, struct OBJTMR *, NvU32, NvU32, struct THREAD_STATE_NODE *); - NV_STATUS (*__tmrGrTickFreqChange__)(OBJGPU *, struct OBJTMR *, NvBool); - NV_STATUS (*__tmrGetGpuPtimerOffset__)(OBJGPU *, struct OBJTMR *, NvU32 *, NvU32 *); - NV_STATUS (*__tmrServiceNotificationInterrupt__)(OBJGPU *, struct OBJTMR *, IntrServiceServiceNotificationInterruptArguments *); - NV_STATUS (*__tmrStatePreLoad__)(POBJGPU, struct OBJTMR *, NvU32); - NV_STATUS (*__tmrStatePostUnload__)(POBJGPU, struct OBJTMR *, NvU32); - NV_STATUS (*__tmrStatePreUnload__)(POBJGPU, struct OBJTMR *, NvU32); - void (*__tmrInitMissing__)(POBJGPU, struct OBJTMR *); - NV_STATUS (*__tmrStatePreInitLocked__)(POBJGPU, struct OBJTMR *); - NV_STATUS (*__tmrStatePreInitUnlocked__)(POBJGPU, struct OBJTMR *); - NV_STATUS (*__tmrStatePostLoad__)(POBJGPU, struct OBJTMR *, NvU32); - NvBool (*__tmrIsPresent__)(POBJGPU, struct OBJTMR *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct IntrService *__nvoc_pbase_IntrService; // intrserv super + struct OBJTMR *__nvoc_pbase_OBJTMR; // tmr + + // Vtable with 27 per-object function pointers + NV_STATUS (*__tmrDelay__)(struct OBJTMR * /*this*/, NvU32); // halified (2 hals) + void (*__tmrRegisterIntrService__)(OBJGPU *, struct OBJTMR * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) + NvBool (*__tmrClearInterrupt__)(OBJGPU *, struct OBJTMR * /*this*/, IntrServiceClearInterruptArguments *); // virtual override (intrserv) base (intrserv) + NvU32 (*__tmrServiceInterrupt__)(OBJGPU *, struct OBJTMR * /*this*/, IntrServiceServiceInterruptArguments *); // virtual halified (3 hals) override (intrserv) base (intrserv) body + NV_STATUS (*__tmrConstructEngine__)(OBJGPU *, struct OBJTMR * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__tmrStatePreInitLocked__)(OBJGPU *, struct OBJTMR * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__tmrStateInitUnlocked__)(OBJGPU *, struct OBJTMR * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__tmrStateLoad__)(OBJGPU *, struct OBJTMR * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__tmrStateUnload__)(OBJGPU *, struct OBJTMR * /*this*/, NvU32); // virtual override (engstate) base (engstate) + void (*__tmrStateDestroy__)(OBJGPU *, struct OBJTMR * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__tmrSetCurrentTime__)(OBJGPU *, struct OBJTMR * /*this*/); // halified (3 hals) body + NvU32 (*__tmrGetTimeLo__)(OBJGPU *, struct OBJTMR * /*this*/); // halified (2 hals) body + NvU64 (*__tmrGetTime__)(OBJGPU *, struct OBJTMR * /*this*/); // halified (2 hals) body + NvU64 (*__tmrGetTimeEx__)(OBJGPU *, struct OBJTMR * /*this*/, struct THREAD_STATE_NODE *); // halified (2 hals) body + NV_STATUS (*__tmrSetCountdownIntrDisable__)(OBJGPU *, struct OBJTMR * /*this*/); // halified (2 hals) body + NV_STATUS (*__tmrSetCountdown__)(OBJGPU *, struct OBJTMR * /*this*/, NvU32, NvU32, struct THREAD_STATE_NODE *); // halified (2 hals) body + NV_STATUS (*__tmrGrTickFreqChange__)(OBJGPU *, struct OBJTMR * /*this*/, NvBool); // halified (2 hals) body + NV_STATUS (*__tmrGetGpuPtimerOffset__)(OBJGPU *, struct OBJTMR * /*this*/, NvU32 *, NvU32 *); // halified (2 hals) body + void (*__tmrInitMissing__)(POBJGPU, struct OBJTMR * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__tmrStatePreInitUnlocked__)(POBJGPU, struct OBJTMR * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__tmrStateInitLocked__)(POBJGPU, struct OBJTMR * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__tmrStatePreLoad__)(POBJGPU, struct OBJTMR * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__tmrStatePostLoad__)(POBJGPU, struct OBJTMR * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__tmrStatePreUnload__)(POBJGPU, struct OBJTMR * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__tmrStatePostUnload__)(POBJGPU, struct OBJTMR * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__tmrIsPresent__)(POBJGPU, struct OBJTMR * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__tmrServiceNotificationInterrupt__)(OBJGPU *, struct OBJTMR * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual inherited (intrserv) base (intrserv) + + // 6 PDB properties NvBool PDB_PROP_TMR_USE_COUNTDOWN_TIMER_FOR_RM_CALLBACKS; NvBool PDB_PROP_TMR_ALARM_INTR_REMOVED_FROM_PMC_TREE; NvBool PDB_PROP_TMR_USE_OS_TIMER_FOR_CALLBACKS; NvBool PDB_PROP_TMR_USE_PTIMER_FOR_OSTIMER_CALLBACKS; NvBool PDB_PROP_TMR_USE_POLLING_FOR_CALLBACKS; NvBool PDB_PROP_TMR_USE_SECOND_COUNTDOWN_TIMER_FOR_SWRL; + + // Data members PTMR_EVENT_PVT pRmActiveEventList; PTMR_EVENT_PVT pRmActiveOSTimerEventList; PTMR_EVENT_PVT pRmCallbackFreeList_OBSOLETE; @@ -258,6 +279,7 @@ typedef struct OBJTMR OBJTMR; #define __nvoc_class_id_OBJTMR 0x9ddede #endif /* __nvoc_class_id_OBJTMR */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJTMR; #define __staticCast_OBJTMR(pThis) \ @@ -270,6 +292,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJTMR; ((OBJTMR*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJTMR))) #endif //__nvoc_objtmr_h_disabled +// Property macros #define PDB_PROP_TMR_USE_COUNTDOWN_TIMER_FOR_RM_CALLBACKS_BASE_CAST #define PDB_PROP_TMR_USE_COUNTDOWN_TIMER_FOR_RM_CALLBACKS_BASE_NAME PDB_PROP_TMR_USE_COUNTDOWN_TIMER_FOR_RM_CALLBACKS #define PDB_PROP_TMR_USE_OS_TIMER_FOR_CALLBACKS_BASE_CAST @@ -291,43 +314,182 @@ NV_STATUS __nvoc_objCreate_OBJTMR(OBJTMR**, Dynamic*, NvU32); #define __objCreate_OBJTMR(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJTMR((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define tmrDelay(pTmr, arg0) tmrDelay_DISPATCH(pTmr, arg0) -#define tmrDelay_HAL(pTmr, arg0) tmrDelay_DISPATCH(pTmr, arg0) + +// Wrapper macros +#define tmrDelay_FNPTR(pTmr) pTmr->__tmrDelay__ +#define tmrDelay(pTmr, arg2) tmrDelay_DISPATCH(pTmr, arg2) +#define tmrDelay_HAL(pTmr, arg2) tmrDelay_DISPATCH(pTmr, arg2) +#define tmrRegisterIntrService_FNPTR(pTmr) pTmr->__tmrRegisterIntrService__ #define tmrRegisterIntrService(pGpu, pTmr, pRecords) tmrRegisterIntrService_DISPATCH(pGpu, pTmr, pRecords) +#define tmrClearInterrupt_FNPTR(pTmr) pTmr->__tmrClearInterrupt__ #define tmrClearInterrupt(pGpu, pTmr, pParams) tmrClearInterrupt_DISPATCH(pGpu, pTmr, pParams) +#define tmrServiceInterrupt_FNPTR(pTmr) pTmr->__tmrServiceInterrupt__ #define tmrServiceInterrupt(pGpu, pTmr, pParams) tmrServiceInterrupt_DISPATCH(pGpu, pTmr, pParams) #define tmrServiceInterrupt_HAL(pGpu, pTmr, pParams) tmrServiceInterrupt_DISPATCH(pGpu, pTmr, pParams) -#define tmrConstructEngine(pGpu, pTmr, arg0) tmrConstructEngine_DISPATCH(pGpu, pTmr, arg0) -#define tmrStateInitLocked(pGpu, pTmr) tmrStateInitLocked_DISPATCH(pGpu, pTmr) +#define tmrConstructEngine_FNPTR(pTmr) pTmr->__tmrConstructEngine__ +#define tmrConstructEngine(pGpu, pTmr, arg3) tmrConstructEngine_DISPATCH(pGpu, pTmr, arg3) +#define tmrStatePreInitLocked_FNPTR(pTmr) pTmr->__tmrStatePreInitLocked__ +#define tmrStatePreInitLocked(pGpu, pTmr) tmrStatePreInitLocked_DISPATCH(pGpu, pTmr) +#define tmrStateInitUnlocked_FNPTR(pTmr) pTmr->__tmrStateInitUnlocked__ #define tmrStateInitUnlocked(pGpu, pTmr) tmrStateInitUnlocked_DISPATCH(pGpu, pTmr) -#define tmrStateLoad(pGpu, pTmr, arg0) tmrStateLoad_DISPATCH(pGpu, pTmr, arg0) -#define tmrStateUnload(pGpu, pTmr, arg0) tmrStateUnload_DISPATCH(pGpu, pTmr, arg0) +#define tmrStateLoad_FNPTR(pTmr) pTmr->__tmrStateLoad__ +#define tmrStateLoad(pGpu, pTmr, arg3) tmrStateLoad_DISPATCH(pGpu, pTmr, arg3) +#define tmrStateUnload_FNPTR(pTmr) pTmr->__tmrStateUnload__ +#define tmrStateUnload(pGpu, pTmr, arg3) tmrStateUnload_DISPATCH(pGpu, pTmr, arg3) +#define tmrStateDestroy_FNPTR(pTmr) pTmr->__tmrStateDestroy__ #define tmrStateDestroy(pGpu, pTmr) tmrStateDestroy_DISPATCH(pGpu, pTmr) +#define tmrSetCurrentTime_FNPTR(pTmr) pTmr->__tmrSetCurrentTime__ #define tmrSetCurrentTime(pGpu, pTmr) tmrSetCurrentTime_DISPATCH(pGpu, pTmr) #define tmrSetCurrentTime_HAL(pGpu, pTmr) tmrSetCurrentTime_DISPATCH(pGpu, pTmr) +#define tmrGetTimeLo_FNPTR(pTmr) pTmr->__tmrGetTimeLo__ #define tmrGetTimeLo(pGpu, pTmr) tmrGetTimeLo_DISPATCH(pGpu, pTmr) #define tmrGetTimeLo_HAL(pGpu, pTmr) tmrGetTimeLo_DISPATCH(pGpu, pTmr) +#define tmrGetTime_FNPTR(pTmr) pTmr->__tmrGetTime__ #define tmrGetTime(pGpu, pTmr) tmrGetTime_DISPATCH(pGpu, pTmr) #define tmrGetTime_HAL(pGpu, pTmr) tmrGetTime_DISPATCH(pGpu, pTmr) -#define tmrGetTimeEx(pGpu, pTmr, arg0) tmrGetTimeEx_DISPATCH(pGpu, pTmr, arg0) -#define tmrGetTimeEx_HAL(pGpu, pTmr, arg0) tmrGetTimeEx_DISPATCH(pGpu, pTmr, arg0) +#define tmrGetTimeEx_FNPTR(pTmr) pTmr->__tmrGetTimeEx__ +#define tmrGetTimeEx(pGpu, pTmr, arg3) tmrGetTimeEx_DISPATCH(pGpu, pTmr, arg3) +#define tmrGetTimeEx_HAL(pGpu, pTmr, arg3) tmrGetTimeEx_DISPATCH(pGpu, pTmr, arg3) +#define tmrSetCountdownIntrDisable_FNPTR(pTmr) pTmr->__tmrSetCountdownIntrDisable__ #define tmrSetCountdownIntrDisable(pGpu, pTmr) tmrSetCountdownIntrDisable_DISPATCH(pGpu, pTmr) #define tmrSetCountdownIntrDisable_HAL(pGpu, pTmr) tmrSetCountdownIntrDisable_DISPATCH(pGpu, pTmr) -#define tmrSetCountdown(pGpu, pTmr, arg0, arg1, arg2) tmrSetCountdown_DISPATCH(pGpu, pTmr, arg0, arg1, arg2) -#define tmrSetCountdown_HAL(pGpu, pTmr, arg0, arg1, arg2) tmrSetCountdown_DISPATCH(pGpu, pTmr, arg0, arg1, arg2) -#define tmrGrTickFreqChange(pGpu, pTmr, arg0) tmrGrTickFreqChange_DISPATCH(pGpu, pTmr, arg0) -#define tmrGrTickFreqChange_HAL(pGpu, pTmr, arg0) tmrGrTickFreqChange_DISPATCH(pGpu, pTmr, arg0) -#define tmrGetGpuPtimerOffset(pGpu, pTmr, arg0, arg1) tmrGetGpuPtimerOffset_DISPATCH(pGpu, pTmr, arg0, arg1) -#define tmrGetGpuPtimerOffset_HAL(pGpu, pTmr, arg0, arg1) tmrGetGpuPtimerOffset_DISPATCH(pGpu, pTmr, arg0, arg1) -#define tmrServiceNotificationInterrupt(pGpu, pIntrService, pParams) tmrServiceNotificationInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define tmrStatePreLoad(pGpu, pEngstate, arg0) tmrStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define tmrStatePostUnload(pGpu, pEngstate, arg0) tmrStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define tmrStatePreUnload(pGpu, pEngstate, arg0) tmrStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) +#define tmrSetCountdown_FNPTR(pTmr) pTmr->__tmrSetCountdown__ +#define tmrSetCountdown(pGpu, pTmr, arg3, arg4, arg5) tmrSetCountdown_DISPATCH(pGpu, pTmr, arg3, arg4, arg5) +#define tmrSetCountdown_HAL(pGpu, pTmr, arg3, arg4, arg5) tmrSetCountdown_DISPATCH(pGpu, pTmr, arg3, arg4, arg5) +#define tmrGrTickFreqChange_FNPTR(pTmr) pTmr->__tmrGrTickFreqChange__ +#define tmrGrTickFreqChange(pGpu, pTmr, arg3) tmrGrTickFreqChange_DISPATCH(pGpu, pTmr, arg3) +#define tmrGrTickFreqChange_HAL(pGpu, pTmr, arg3) tmrGrTickFreqChange_DISPATCH(pGpu, pTmr, arg3) +#define tmrGetGpuPtimerOffset_FNPTR(pTmr) pTmr->__tmrGetGpuPtimerOffset__ +#define tmrGetGpuPtimerOffset(pGpu, pTmr, arg3, arg4) tmrGetGpuPtimerOffset_DISPATCH(pGpu, pTmr, arg3, arg4) +#define tmrGetGpuPtimerOffset_HAL(pGpu, pTmr, arg3, arg4) tmrGetGpuPtimerOffset_DISPATCH(pGpu, pTmr, arg3, arg4) +#define tmrInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define tmrInitMissing(pGpu, pEngstate) tmrInitMissing_DISPATCH(pGpu, pEngstate) -#define tmrStatePreInitLocked(pGpu, pEngstate) tmrStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define tmrStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define tmrStatePreInitUnlocked(pGpu, pEngstate) tmrStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define tmrStatePostLoad(pGpu, pEngstate, arg0) tmrStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) +#define tmrStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define tmrStateInitLocked(pGpu, pEngstate) tmrStateInitLocked_DISPATCH(pGpu, pEngstate) +#define tmrStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define tmrStatePreLoad(pGpu, pEngstate, arg3) tmrStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define tmrStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define tmrStatePostLoad(pGpu, pEngstate, arg3) tmrStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define tmrStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define tmrStatePreUnload(pGpu, pEngstate, arg3) tmrStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define tmrStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define tmrStatePostUnload(pGpu, pEngstate, arg3) tmrStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define tmrIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define tmrIsPresent(pGpu, pEngstate) tmrIsPresent_DISPATCH(pGpu, pEngstate) +#define tmrServiceNotificationInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ +#define tmrServiceNotificationInterrupt(pGpu, pIntrService, pParams) tmrServiceNotificationInterrupt_DISPATCH(pGpu, pIntrService, pParams) + +// Dispatch functions +static inline NV_STATUS tmrDelay_DISPATCH(struct OBJTMR *pTmr, NvU32 arg2) { + return pTmr->__tmrDelay__(pTmr, arg2); +} + +static inline void tmrRegisterIntrService_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, IntrServiceRecord pRecords[175]) { + pTmr->__tmrRegisterIntrService__(pGpu, pTmr, pRecords); +} + +static inline NvBool tmrClearInterrupt_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, IntrServiceClearInterruptArguments *pParams) { + return pTmr->__tmrClearInterrupt__(pGpu, pTmr, pParams); +} + +static inline NvU32 tmrServiceInterrupt_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, IntrServiceServiceInterruptArguments *pParams) { + return pTmr->__tmrServiceInterrupt__(pGpu, pTmr, pParams); +} + +static inline NV_STATUS tmrConstructEngine_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, ENGDESCRIPTOR arg3) { + return pTmr->__tmrConstructEngine__(pGpu, pTmr, arg3); +} + +static inline NV_STATUS tmrStatePreInitLocked_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr) { + return pTmr->__tmrStatePreInitLocked__(pGpu, pTmr); +} + +static inline NV_STATUS tmrStateInitUnlocked_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr) { + return pTmr->__tmrStateInitUnlocked__(pGpu, pTmr); +} + +static inline NV_STATUS tmrStateLoad_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 arg3) { + return pTmr->__tmrStateLoad__(pGpu, pTmr, arg3); +} + +static inline NV_STATUS tmrStateUnload_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 arg3) { + return pTmr->__tmrStateUnload__(pGpu, pTmr, arg3); +} + +static inline void tmrStateDestroy_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr) { + pTmr->__tmrStateDestroy__(pGpu, pTmr); +} + +static inline NV_STATUS tmrSetCurrentTime_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr) { + return pTmr->__tmrSetCurrentTime__(pGpu, pTmr); +} + +static inline NvU32 tmrGetTimeLo_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr) { + return pTmr->__tmrGetTimeLo__(pGpu, pTmr); +} + +static inline NvU64 tmrGetTime_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr) { + return pTmr->__tmrGetTime__(pGpu, pTmr); +} + +static inline NvU64 tmrGetTimeEx_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { + return pTmr->__tmrGetTimeEx__(pGpu, pTmr, arg3); +} + +static inline NV_STATUS tmrSetCountdownIntrDisable_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr) { + return pTmr->__tmrSetCountdownIntrDisable__(pGpu, pTmr); +} + +static inline NV_STATUS tmrSetCountdown_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5) { + return pTmr->__tmrSetCountdown__(pGpu, pTmr, arg3, arg4, arg5); +} + +static inline NV_STATUS tmrGrTickFreqChange_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, NvBool arg3) { + return pTmr->__tmrGrTickFreqChange__(pGpu, pTmr, arg3); +} + +static inline NV_STATUS tmrGetGpuPtimerOffset_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 *arg3, NvU32 *arg4) { + return pTmr->__tmrGetGpuPtimerOffset__(pGpu, pTmr, arg3, arg4); +} + +static inline void tmrInitMissing_DISPATCH(POBJGPU pGpu, struct OBJTMR *pEngstate) { + pEngstate->__tmrInitMissing__(pGpu, pEngstate); +} + +static inline NV_STATUS tmrStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct OBJTMR *pEngstate) { + return pEngstate->__tmrStatePreInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS tmrStateInitLocked_DISPATCH(POBJGPU pGpu, struct OBJTMR *pEngstate) { + return pEngstate->__tmrStateInitLocked__(pGpu, pEngstate); +} + +static inline NV_STATUS tmrStatePreLoad_DISPATCH(POBJGPU pGpu, struct OBJTMR *pEngstate, NvU32 arg3) { + return pEngstate->__tmrStatePreLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS tmrStatePostLoad_DISPATCH(POBJGPU pGpu, struct OBJTMR *pEngstate, NvU32 arg3) { + return pEngstate->__tmrStatePostLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS tmrStatePreUnload_DISPATCH(POBJGPU pGpu, struct OBJTMR *pEngstate, NvU32 arg3) { + return pEngstate->__tmrStatePreUnload__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS tmrStatePostUnload_DISPATCH(POBJGPU pGpu, struct OBJTMR *pEngstate, NvU32 arg3) { + return pEngstate->__tmrStatePostUnload__(pGpu, pEngstate, arg3); +} + +static inline NvBool tmrIsPresent_DISPATCH(POBJGPU pGpu, struct OBJTMR *pEngstate) { + return pEngstate->__tmrIsPresent__(pGpu, pEngstate); +} + +static inline NV_STATUS tmrServiceNotificationInterrupt_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { + return pIntrService->__tmrServiceNotificationInterrupt__(pGpu, pIntrService, pParams); +} + NV_STATUS tmrGetCurrentTime_IMPL(struct OBJTMR *pTmr, NvU64 *pTime); @@ -342,19 +504,19 @@ static inline NV_STATUS tmrGetCurrentTime(struct OBJTMR *pTmr, NvU64 *pTime) { #define tmrGetCurrentTime_HAL(pTmr, pTime) tmrGetCurrentTime(pTmr, pTime) -NV_STATUS tmrGetCurrentTimeEx_IMPL(struct OBJTMR *pTmr, NvU64 *pTime, struct THREAD_STATE_NODE *arg0); +NV_STATUS tmrGetCurrentTimeEx_IMPL(struct OBJTMR *pTmr, NvU64 *pTime, struct THREAD_STATE_NODE *arg3); #ifdef __nvoc_objtmr_h_disabled -static inline NV_STATUS tmrGetCurrentTimeEx(struct OBJTMR *pTmr, NvU64 *pTime, struct THREAD_STATE_NODE *arg0) { +static inline NV_STATUS tmrGetCurrentTimeEx(struct OBJTMR *pTmr, NvU64 *pTime, struct THREAD_STATE_NODE *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJTMR was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_objtmr_h_disabled -#define tmrGetCurrentTimeEx(pTmr, pTime, arg0) tmrGetCurrentTimeEx_IMPL(pTmr, pTime, arg0) +#define tmrGetCurrentTimeEx(pTmr, pTime, arg3) tmrGetCurrentTimeEx_IMPL(pTmr, pTime, arg3) #endif //__nvoc_objtmr_h_disabled -#define tmrGetCurrentTimeEx_HAL(pTmr, pTime, arg0) tmrGetCurrentTimeEx(pTmr, pTime, arg0) +#define tmrGetCurrentTimeEx_HAL(pTmr, pTime, arg3) tmrGetCurrentTimeEx(pTmr, pTime, arg3) static inline NV_STATUS tmrSetAlarmIntrDisable_56cd7a(OBJGPU *pGpu, struct OBJTMR *pTmr) { return NV_OK; @@ -404,78 +566,78 @@ static inline NV_STATUS tmrSetAlarmIntrEnable(OBJGPU *pGpu, struct OBJTMR *pTmr) #define tmrSetAlarmIntrEnable_HAL(pGpu, pTmr) tmrSetAlarmIntrEnable(pGpu, pTmr) -static inline NV_STATUS tmrSetAlarmIntrReset_56cd7a(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0) { +static inline NV_STATUS tmrSetAlarmIntrReset_56cd7a(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { return NV_OK; } -NV_STATUS tmrSetAlarmIntrReset_GM107(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0); +NV_STATUS tmrSetAlarmIntrReset_GM107(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3); -NV_STATUS tmrSetAlarmIntrReset_GA100(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0); +NV_STATUS tmrSetAlarmIntrReset_GA100(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3); -static inline NV_STATUS tmrSetAlarmIntrReset_46f6a7(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0) { +static inline NV_STATUS tmrSetAlarmIntrReset_46f6a7(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { return NV_ERR_NOT_SUPPORTED; } #ifdef __nvoc_objtmr_h_disabled -static inline NV_STATUS tmrSetAlarmIntrReset(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0) { +static inline NV_STATUS tmrSetAlarmIntrReset(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJTMR was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_objtmr_h_disabled -#define tmrSetAlarmIntrReset(pGpu, pTmr, arg0) tmrSetAlarmIntrReset_56cd7a(pGpu, pTmr, arg0) +#define tmrSetAlarmIntrReset(pGpu, pTmr, arg3) tmrSetAlarmIntrReset_56cd7a(pGpu, pTmr, arg3) #endif //__nvoc_objtmr_h_disabled -#define tmrSetAlarmIntrReset_HAL(pGpu, pTmr, arg0) tmrSetAlarmIntrReset(pGpu, pTmr, arg0) +#define tmrSetAlarmIntrReset_HAL(pGpu, pTmr, arg3) tmrSetAlarmIntrReset(pGpu, pTmr, arg3) -static inline NV_STATUS tmrGetIntrStatus_cb5ce8(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 *pStatus, struct THREAD_STATE_NODE *arg0) { +static inline NV_STATUS tmrGetIntrStatus_cb5ce8(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 *pStatus, struct THREAD_STATE_NODE *arg4) { *pStatus = 0; return NV_OK; } -NV_STATUS tmrGetIntrStatus_TU102(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 *pStatus, struct THREAD_STATE_NODE *arg0); +NV_STATUS tmrGetIntrStatus_TU102(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 *pStatus, struct THREAD_STATE_NODE *arg4); -NV_STATUS tmrGetIntrStatus_GA100(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 *pStatus, struct THREAD_STATE_NODE *arg0); +NV_STATUS tmrGetIntrStatus_GA100(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 *pStatus, struct THREAD_STATE_NODE *arg4); #ifdef __nvoc_objtmr_h_disabled -static inline NV_STATUS tmrGetIntrStatus(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 *pStatus, struct THREAD_STATE_NODE *arg0) { +static inline NV_STATUS tmrGetIntrStatus(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 *pStatus, struct THREAD_STATE_NODE *arg4) { NV_ASSERT_FAILED_PRECOMP("OBJTMR was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_objtmr_h_disabled -#define tmrGetIntrStatus(pGpu, pTmr, pStatus, arg0) tmrGetIntrStatus_cb5ce8(pGpu, pTmr, pStatus, arg0) +#define tmrGetIntrStatus(pGpu, pTmr, pStatus, arg4) tmrGetIntrStatus_cb5ce8(pGpu, pTmr, pStatus, arg4) #endif //__nvoc_objtmr_h_disabled -#define tmrGetIntrStatus_HAL(pGpu, pTmr, pStatus, arg0) tmrGetIntrStatus(pGpu, pTmr, pStatus, arg0) +#define tmrGetIntrStatus_HAL(pGpu, pTmr, pStatus, arg4) tmrGetIntrStatus(pGpu, pTmr, pStatus, arg4) -NvU32 tmrReadTimeLoReg_TU102(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0); +NvU32 tmrReadTimeLoReg_TU102(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3); #ifdef __nvoc_objtmr_h_disabled -static inline NvU32 tmrReadTimeLoReg(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0) { +static inline NvU32 tmrReadTimeLoReg(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJTMR was disabled!"); return 0; } #else //__nvoc_objtmr_h_disabled -#define tmrReadTimeLoReg(pGpu, pTmr, arg0) tmrReadTimeLoReg_TU102(pGpu, pTmr, arg0) +#define tmrReadTimeLoReg(pGpu, pTmr, arg3) tmrReadTimeLoReg_TU102(pGpu, pTmr, arg3) #endif //__nvoc_objtmr_h_disabled -#define tmrReadTimeLoReg_HAL(pGpu, pTmr, arg0) tmrReadTimeLoReg(pGpu, pTmr, arg0) +#define tmrReadTimeLoReg_HAL(pGpu, pTmr, arg3) tmrReadTimeLoReg(pGpu, pTmr, arg3) -NvU32 tmrReadTimeHiReg_TU102(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0); +NvU32 tmrReadTimeHiReg_TU102(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3); #ifdef __nvoc_objtmr_h_disabled -static inline NvU32 tmrReadTimeHiReg(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0) { +static inline NvU32 tmrReadTimeHiReg(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJTMR was disabled!"); return 0; } #else //__nvoc_objtmr_h_disabled -#define tmrReadTimeHiReg(pGpu, pTmr, arg0) tmrReadTimeHiReg_TU102(pGpu, pTmr, arg0) +#define tmrReadTimeHiReg(pGpu, pTmr, arg3) tmrReadTimeHiReg_TU102(pGpu, pTmr, arg3) #endif //__nvoc_objtmr_h_disabled -#define tmrReadTimeHiReg_HAL(pGpu, pTmr, arg0) tmrReadTimeHiReg(pGpu, pTmr, arg0) +#define tmrReadTimeHiReg_HAL(pGpu, pTmr, arg3) tmrReadTimeHiReg(pGpu, pTmr, arg3) static inline NV_STATUS tmrSetAlarm_56cd7a(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU64 alarm, struct THREAD_STATE_NODE *pThreadState) { return NV_OK; @@ -499,25 +661,25 @@ static inline NV_STATUS tmrSetAlarm(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU64 ala #define tmrSetAlarm_HAL(pGpu, pTmr, alarm, pThreadState) tmrSetAlarm(pGpu, pTmr, alarm, pThreadState) -static inline NvBool tmrGetAlarmPending_491d52(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0) { +static inline NvBool tmrGetAlarmPending_491d52(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { return ((NvBool)(0 != 0)); } -NvBool tmrGetAlarmPending_GM107(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0); +NvBool tmrGetAlarmPending_GM107(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3); -NvBool tmrGetAlarmPending_GA100(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0); +NvBool tmrGetAlarmPending_GA100(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3); #ifdef __nvoc_objtmr_h_disabled -static inline NvBool tmrGetAlarmPending(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0) { +static inline NvBool tmrGetAlarmPending(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJTMR was disabled!"); return NV_FALSE; } #else //__nvoc_objtmr_h_disabled -#define tmrGetAlarmPending(pGpu, pTmr, arg0) tmrGetAlarmPending_491d52(pGpu, pTmr, arg0) +#define tmrGetAlarmPending(pGpu, pTmr, arg3) tmrGetAlarmPending_491d52(pGpu, pTmr, arg3) #endif //__nvoc_objtmr_h_disabled -#define tmrGetAlarmPending_HAL(pGpu, pTmr, arg0) tmrGetAlarmPending(pGpu, pTmr, arg0) +#define tmrGetAlarmPending_HAL(pGpu, pTmr, arg3) tmrGetAlarmPending(pGpu, pTmr, arg3) NV_STATUS tmrSetCountdownIntrEnable_TU102(OBJGPU *pGpu, struct OBJTMR *pTmr); @@ -533,81 +695,81 @@ static inline NV_STATUS tmrSetCountdownIntrEnable(OBJGPU *pGpu, struct OBJTMR *p #define tmrSetCountdownIntrEnable_HAL(pGpu, pTmr) tmrSetCountdownIntrEnable(pGpu, pTmr) -NV_STATUS tmrSetCountdownIntrReset_TU102(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0); +NV_STATUS tmrSetCountdownIntrReset_TU102(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3); #ifdef __nvoc_objtmr_h_disabled -static inline NV_STATUS tmrSetCountdownIntrReset(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0) { +static inline NV_STATUS tmrSetCountdownIntrReset(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJTMR was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_objtmr_h_disabled -#define tmrSetCountdownIntrReset(pGpu, pTmr, arg0) tmrSetCountdownIntrReset_TU102(pGpu, pTmr, arg0) +#define tmrSetCountdownIntrReset(pGpu, pTmr, arg3) tmrSetCountdownIntrReset_TU102(pGpu, pTmr, arg3) #endif //__nvoc_objtmr_h_disabled -#define tmrSetCountdownIntrReset_HAL(pGpu, pTmr, arg0) tmrSetCountdownIntrReset(pGpu, pTmr, arg0) +#define tmrSetCountdownIntrReset_HAL(pGpu, pTmr, arg3) tmrSetCountdownIntrReset(pGpu, pTmr, arg3) -static inline NvBool tmrGetCountdownPending_491d52(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0) { +static inline NvBool tmrGetCountdownPending_491d52(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { return ((NvBool)(0 != 0)); } #ifdef __nvoc_objtmr_h_disabled -static inline NvBool tmrGetCountdownPending(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0) { +static inline NvBool tmrGetCountdownPending(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJTMR was disabled!"); return NV_FALSE; } #else //__nvoc_objtmr_h_disabled -#define tmrGetCountdownPending(pGpu, pTmr, arg0) tmrGetCountdownPending_491d52(pGpu, pTmr, arg0) +#define tmrGetCountdownPending(pGpu, pTmr, arg3) tmrGetCountdownPending_491d52(pGpu, pTmr, arg3) #endif //__nvoc_objtmr_h_disabled -#define tmrGetCountdownPending_HAL(pGpu, pTmr, arg0) tmrGetCountdownPending(pGpu, pTmr, arg0) +#define tmrGetCountdownPending_HAL(pGpu, pTmr, arg3) tmrGetCountdownPending(pGpu, pTmr, arg3) -NV_STATUS tmrGetTimerBar0MapInfo_PTIMER(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU64 *arg0, NvU32 *arg1); +NV_STATUS tmrGetTimerBar0MapInfo_PTIMER(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU64 *arg3, NvU32 *arg4); #ifdef __nvoc_objtmr_h_disabled -static inline NV_STATUS tmrGetTimerBar0MapInfo(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU64 *arg0, NvU32 *arg1) { +static inline NV_STATUS tmrGetTimerBar0MapInfo(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU64 *arg3, NvU32 *arg4) { NV_ASSERT_FAILED_PRECOMP("OBJTMR was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_objtmr_h_disabled -#define tmrGetTimerBar0MapInfo(pGpu, pTmr, arg0, arg1) tmrGetTimerBar0MapInfo_PTIMER(pGpu, pTmr, arg0, arg1) +#define tmrGetTimerBar0MapInfo(pGpu, pTmr, arg3, arg4) tmrGetTimerBar0MapInfo_PTIMER(pGpu, pTmr, arg3, arg4) #endif //__nvoc_objtmr_h_disabled -#define tmrGetTimerBar0MapInfo_HAL(pGpu, pTmr, arg0, arg1) tmrGetTimerBar0MapInfo(pGpu, pTmr, arg0, arg1) +#define tmrGetTimerBar0MapInfo_HAL(pGpu, pTmr, arg3, arg4) tmrGetTimerBar0MapInfo(pGpu, pTmr, arg3, arg4) -static inline NvU32 tmrGetUtilsClkScaleFactor_4a4dee(OBJGPU *pGpu, struct OBJTMR *pTmr) { +static inline NvU32 tmrGetWallClkScaleFactor_4a4dee(OBJGPU *pGpu, struct OBJTMR *pTmr) { return 0; } -NvU32 tmrGetUtilsClkScaleFactor_GM107(OBJGPU *pGpu, struct OBJTMR *pTmr); +NvU32 tmrGetWallClkScaleFactor_GM107(OBJGPU *pGpu, struct OBJTMR *pTmr); #ifdef __nvoc_objtmr_h_disabled -static inline NvU32 tmrGetUtilsClkScaleFactor(OBJGPU *pGpu, struct OBJTMR *pTmr) { +static inline NvU32 tmrGetWallClkScaleFactor(OBJGPU *pGpu, struct OBJTMR *pTmr) { NV_ASSERT_FAILED_PRECOMP("OBJTMR was disabled!"); return 0; } #else //__nvoc_objtmr_h_disabled -#define tmrGetUtilsClkScaleFactor(pGpu, pTmr) tmrGetUtilsClkScaleFactor_4a4dee(pGpu, pTmr) +#define tmrGetWallClkScaleFactor(pGpu, pTmr) tmrGetWallClkScaleFactor_4a4dee(pGpu, pTmr) #endif //__nvoc_objtmr_h_disabled -#define tmrGetUtilsClkScaleFactor_HAL(pGpu, pTmr) tmrGetUtilsClkScaleFactor(pGpu, pTmr) +#define tmrGetWallClkScaleFactor_HAL(pGpu, pTmr) tmrGetWallClkScaleFactor(pGpu, pTmr) -NV_STATUS tmrGetGpuAndCpuTimestampPair_GM107(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU64 *arg0, NvU64 *arg1); +NV_STATUS tmrGetGpuAndCpuTimestampPair_GM107(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU64 *arg3, NvU64 *arg4); #ifdef __nvoc_objtmr_h_disabled -static inline NV_STATUS tmrGetGpuAndCpuTimestampPair(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU64 *arg0, NvU64 *arg1) { +static inline NV_STATUS tmrGetGpuAndCpuTimestampPair(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU64 *arg3, NvU64 *arg4) { NV_ASSERT_FAILED_PRECOMP("OBJTMR was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_objtmr_h_disabled -#define tmrGetGpuAndCpuTimestampPair(pGpu, pTmr, arg0, arg1) tmrGetGpuAndCpuTimestampPair_GM107(pGpu, pTmr, arg0, arg1) +#define tmrGetGpuAndCpuTimestampPair(pGpu, pTmr, arg3, arg4) tmrGetGpuAndCpuTimestampPair_GM107(pGpu, pTmr, arg3, arg4) #endif //__nvoc_objtmr_h_disabled -#define tmrGetGpuAndCpuTimestampPair_HAL(pGpu, pTmr, arg0, arg1) tmrGetGpuAndCpuTimestampPair(pGpu, pTmr, arg0, arg1) +#define tmrGetGpuAndCpuTimestampPair_HAL(pGpu, pTmr, arg3, arg4) tmrGetGpuAndCpuTimestampPair(pGpu, pTmr, arg3, arg4) static inline void tmrResetTimerRegistersForVF_b3696a(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 gfid) { return; @@ -698,26 +860,14 @@ static inline NV_STATUS tmrEventDestroyOSTimer(struct OBJTMR *pTmr, PTMR_EVENT p #define tmrEventDestroyOSTimer_HAL(pTmr, pEvent) tmrEventDestroyOSTimer(pTmr, pEvent) -NV_STATUS tmrDelay_OSTIMER(struct OBJTMR *pTmr, NvU32 arg0); +NV_STATUS tmrDelay_OSTIMER(struct OBJTMR *pTmr, NvU32 arg2); -NV_STATUS tmrDelay_PTIMER(struct OBJTMR *pTmr, NvU32 arg0); +NV_STATUS tmrDelay_PTIMER(struct OBJTMR *pTmr, NvU32 arg2); -static inline NV_STATUS tmrDelay_DISPATCH(struct OBJTMR *pTmr, NvU32 arg0) { - return pTmr->__tmrDelay__(pTmr, arg0); -} - -void tmrRegisterIntrService_IMPL(OBJGPU *pGpu, struct OBJTMR *pTmr, IntrServiceRecord pRecords[171]); - -static inline void tmrRegisterIntrService_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, IntrServiceRecord pRecords[171]) { - pTmr->__tmrRegisterIntrService__(pGpu, pTmr, pRecords); -} +void tmrRegisterIntrService_IMPL(OBJGPU *pGpu, struct OBJTMR *pTmr, IntrServiceRecord pRecords[175]); NvBool tmrClearInterrupt_IMPL(OBJGPU *pGpu, struct OBJTMR *pTmr, IntrServiceClearInterruptArguments *pParams); -static inline NvBool tmrClearInterrupt_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, IntrServiceClearInterruptArguments *pParams) { - return pTmr->__tmrClearInterrupt__(pGpu, pTmr, pParams); -} - static inline NvU32 tmrServiceInterrupt_56cd7a(OBJGPU *pGpu, struct OBJTMR *pTmr, IntrServiceServiceInterruptArguments *pParams) { return NV_OK; } @@ -726,46 +876,18 @@ NvU32 tmrServiceInterrupt_TU102(OBJGPU *pGpu, struct OBJTMR *pTmr, IntrServiceSe NvU32 tmrServiceInterrupt_GA100(OBJGPU *pGpu, struct OBJTMR *pTmr, IntrServiceServiceInterruptArguments *pParams); -static inline NvU32 tmrServiceInterrupt_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, IntrServiceServiceInterruptArguments *pParams) { - return pTmr->__tmrServiceInterrupt__(pGpu, pTmr, pParams); -} - -NV_STATUS tmrConstructEngine_IMPL(OBJGPU *pGpu, struct OBJTMR *pTmr, ENGDESCRIPTOR arg0); +NV_STATUS tmrConstructEngine_IMPL(OBJGPU *pGpu, struct OBJTMR *pTmr, ENGDESCRIPTOR arg3); -static inline NV_STATUS tmrConstructEngine_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, ENGDESCRIPTOR arg0) { - return pTmr->__tmrConstructEngine__(pGpu, pTmr, arg0); -} - -NV_STATUS tmrStateInitLocked_IMPL(OBJGPU *pGpu, struct OBJTMR *pTmr); - -static inline NV_STATUS tmrStateInitLocked_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr) { - return pTmr->__tmrStateInitLocked__(pGpu, pTmr); -} +NV_STATUS tmrStatePreInitLocked_IMPL(OBJGPU *pGpu, struct OBJTMR *pTmr); NV_STATUS tmrStateInitUnlocked_IMPL(OBJGPU *pGpu, struct OBJTMR *pTmr); -static inline NV_STATUS tmrStateInitUnlocked_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr) { - return pTmr->__tmrStateInitUnlocked__(pGpu, pTmr); -} - -NV_STATUS tmrStateLoad_IMPL(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 arg0); +NV_STATUS tmrStateLoad_IMPL(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 arg3); -static inline NV_STATUS tmrStateLoad_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 arg0) { - return pTmr->__tmrStateLoad__(pGpu, pTmr, arg0); -} - -NV_STATUS tmrStateUnload_IMPL(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 arg0); - -static inline NV_STATUS tmrStateUnload_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 arg0) { - return pTmr->__tmrStateUnload__(pGpu, pTmr, arg0); -} +NV_STATUS tmrStateUnload_IMPL(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 arg3); void tmrStateDestroy_IMPL(OBJGPU *pGpu, struct OBJTMR *pTmr); -static inline void tmrStateDestroy_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr) { - pTmr->__tmrStateDestroy__(pGpu, pTmr); -} - static inline NV_STATUS tmrSetCurrentTime_56cd7a(OBJGPU *pGpu, struct OBJTMR *pTmr) { return NV_OK; } @@ -774,37 +896,21 @@ NV_STATUS tmrSetCurrentTime_GV100(OBJGPU *pGpu, struct OBJTMR *pTmr); NV_STATUS tmrSetCurrentTime_GH100(OBJGPU *pGpu, struct OBJTMR *pTmr); -static inline NV_STATUS tmrSetCurrentTime_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr) { - return pTmr->__tmrSetCurrentTime__(pGpu, pTmr); -} - static inline NvU32 tmrGetTimeLo_cf0499(OBJGPU *pGpu, struct OBJTMR *pTmr) { return ((NvU32)(((NvU64)(osGetTimestamp())) & 4294967295U)); } NvU32 tmrGetTimeLo_GM107(OBJGPU *pGpu, struct OBJTMR *pTmr); -static inline NvU32 tmrGetTimeLo_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr) { - return pTmr->__tmrGetTimeLo__(pGpu, pTmr); -} - static inline NvU64 tmrGetTime_fa6bbe(OBJGPU *pGpu, struct OBJTMR *pTmr) { return osGetTimestamp(); } NvU64 tmrGetTime_GM107(OBJGPU *pGpu, struct OBJTMR *pTmr); -static inline NvU64 tmrGetTime_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr) { - return pTmr->__tmrGetTime__(pGpu, pTmr); -} +NvU64 tmrGetTimeEx_GM107(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3); -NvU64 tmrGetTimeEx_GM107(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0); - -NvU64 tmrGetTimeEx_GH100(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0); - -static inline NvU64 tmrGetTimeEx_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0) { - return pTmr->__tmrGetTimeEx__(pGpu, pTmr, arg0); -} +NvU64 tmrGetTimeEx_GH100(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3); NV_STATUS tmrSetCountdownIntrDisable_GM200(OBJGPU *pGpu, struct OBJTMR *pTmr); @@ -812,85 +918,33 @@ static inline NV_STATUS tmrSetCountdownIntrDisable_56cd7a(OBJGPU *pGpu, struct O return NV_OK; } -static inline NV_STATUS tmrSetCountdownIntrDisable_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr) { - return pTmr->__tmrSetCountdownIntrDisable__(pGpu, pTmr); -} +NV_STATUS tmrSetCountdown_TU102(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5); -NV_STATUS tmrSetCountdown_TU102(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2); +NV_STATUS tmrSetCountdown_GH100(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5); -NV_STATUS tmrSetCountdown_GH100(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2); - -static inline NV_STATUS tmrSetCountdown_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 arg0, NvU32 arg1, struct THREAD_STATE_NODE *arg2) { - return pTmr->__tmrSetCountdown__(pGpu, pTmr, arg0, arg1, arg2); -} +NV_STATUS tmrGrTickFreqChange_GM107(OBJGPU *pGpu, struct OBJTMR *pTmr, NvBool arg3); -NV_STATUS tmrGrTickFreqChange_GM107(OBJGPU *pGpu, struct OBJTMR *pTmr, NvBool arg0); - -static inline NV_STATUS tmrGrTickFreqChange_46f6a7(OBJGPU *pGpu, struct OBJTMR *pTmr, NvBool arg0) { +static inline NV_STATUS tmrGrTickFreqChange_46f6a7(OBJGPU *pGpu, struct OBJTMR *pTmr, NvBool arg3) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS tmrGrTickFreqChange_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, NvBool arg0) { - return pTmr->__tmrGrTickFreqChange__(pGpu, pTmr, arg0); -} - -NV_STATUS tmrGetGpuPtimerOffset_TU102(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 *arg0, NvU32 *arg1); - -NV_STATUS tmrGetGpuPtimerOffset_GA100(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 *arg0, NvU32 *arg1); - -static inline NV_STATUS tmrGetGpuPtimerOffset_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 *arg0, NvU32 *arg1) { - return pTmr->__tmrGetGpuPtimerOffset__(pGpu, pTmr, arg0, arg1); -} - -static inline NV_STATUS tmrServiceNotificationInterrupt_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { - return pIntrService->__tmrServiceNotificationInterrupt__(pGpu, pIntrService, pParams); -} - -static inline NV_STATUS tmrStatePreLoad_DISPATCH(POBJGPU pGpu, struct OBJTMR *pEngstate, NvU32 arg0) { - return pEngstate->__tmrStatePreLoad__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS tmrStatePostUnload_DISPATCH(POBJGPU pGpu, struct OBJTMR *pEngstate, NvU32 arg0) { - return pEngstate->__tmrStatePostUnload__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS tmrStatePreUnload_DISPATCH(POBJGPU pGpu, struct OBJTMR *pEngstate, NvU32 arg0) { - return pEngstate->__tmrStatePreUnload__(pGpu, pEngstate, arg0); -} +NV_STATUS tmrGetGpuPtimerOffset_TU102(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 *arg3, NvU32 *arg4); -static inline void tmrInitMissing_DISPATCH(POBJGPU pGpu, struct OBJTMR *pEngstate) { - pEngstate->__tmrInitMissing__(pGpu, pEngstate); -} - -static inline NV_STATUS tmrStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct OBJTMR *pEngstate) { - return pEngstate->__tmrStatePreInitLocked__(pGpu, pEngstate); -} - -static inline NV_STATUS tmrStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct OBJTMR *pEngstate) { - return pEngstate->__tmrStatePreInitUnlocked__(pGpu, pEngstate); -} - -static inline NV_STATUS tmrStatePostLoad_DISPATCH(POBJGPU pGpu, struct OBJTMR *pEngstate, NvU32 arg0) { - return pEngstate->__tmrStatePostLoad__(pGpu, pEngstate, arg0); -} - -static inline NvBool tmrIsPresent_DISPATCH(POBJGPU pGpu, struct OBJTMR *pEngstate) { - return pEngstate->__tmrIsPresent__(pGpu, pEngstate); -} +NV_STATUS tmrGetGpuPtimerOffset_GA100(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 *arg3, NvU32 *arg4); -static inline NvBool tmrServiceSwrlCallbacksPmcTree(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0) { +static inline NvBool tmrServiceSwrlCallbacksPmcTree(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { return ((NvBool)(0 != 0)); } -static inline NvBool tmrClearSwrlCallbacksSemaphore(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0) { +static inline NvBool tmrClearSwrlCallbacksSemaphore(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { return ((NvBool)(0 != 0)); } -static inline void tmrServiceSwrlCallbacks(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0) { +static inline void tmrServiceSwrlCallbacks(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { return; } -static inline NvBool tmrServiceSwrlWrapper(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg0) { +static inline NvBool tmrServiceSwrlWrapper(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { return ((NvBool)(0 != 0)); } @@ -938,14 +992,14 @@ static inline void tmrInitCallbacks(struct OBJTMR *pTmr) { #define tmrInitCallbacks(pTmr) tmrInitCallbacks_IMPL(pTmr) #endif //__nvoc_objtmr_h_disabled -void tmrSetCountdownCallback_IMPL(struct OBJTMR *pTmr, TIMEPROC_COUNTDOWN arg0); +void tmrSetCountdownCallback_IMPL(struct OBJTMR *pTmr, TIMEPROC_COUNTDOWN arg2); #ifdef __nvoc_objtmr_h_disabled -static inline void tmrSetCountdownCallback(struct OBJTMR *pTmr, TIMEPROC_COUNTDOWN arg0) { +static inline void tmrSetCountdownCallback(struct OBJTMR *pTmr, TIMEPROC_COUNTDOWN arg2) { NV_ASSERT_FAILED_PRECOMP("OBJTMR was disabled!"); } #else //__nvoc_objtmr_h_disabled -#define tmrSetCountdownCallback(pTmr, arg0) tmrSetCountdownCallback_IMPL(pTmr, arg0) +#define tmrSetCountdownCallback(pTmr, arg2) tmrSetCountdownCallback_IMPL(pTmr, arg2) #endif //__nvoc_objtmr_h_disabled NV_STATUS tmrCancelCallback_IMPL(struct OBJTMR *pTmr, void *pObject); @@ -959,15 +1013,15 @@ static inline NV_STATUS tmrCancelCallback(struct OBJTMR *pTmr, void *pObject) { #define tmrCancelCallback(pTmr, pObject) tmrCancelCallback_IMPL(pTmr, pObject) #endif //__nvoc_objtmr_h_disabled -NV_STATUS tmrGetCurrentDiffTime_IMPL(struct OBJTMR *pTmr, NvU64 arg0, NvU64 *arg1); +NV_STATUS tmrGetCurrentDiffTime_IMPL(struct OBJTMR *pTmr, NvU64 arg2, NvU64 *arg3); #ifdef __nvoc_objtmr_h_disabled -static inline NV_STATUS tmrGetCurrentDiffTime(struct OBJTMR *pTmr, NvU64 arg0, NvU64 *arg1) { +static inline NV_STATUS tmrGetCurrentDiffTime(struct OBJTMR *pTmr, NvU64 arg2, NvU64 *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJTMR was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_objtmr_h_disabled -#define tmrGetCurrentDiffTime(pTmr, arg0, arg1) tmrGetCurrentDiffTime_IMPL(pTmr, arg0, arg1) +#define tmrGetCurrentDiffTime(pTmr, arg2, arg3) tmrGetCurrentDiffTime_IMPL(pTmr, arg2, arg3) #endif //__nvoc_objtmr_h_disabled void tmrGetSystemTime_IMPL(struct OBJTMR *pTmr, PDAYMSECTIME pTime); @@ -1013,15 +1067,15 @@ static inline NV_STATUS tmrEventScheduleAbs(struct OBJTMR *pTmr, PTMR_EVENT pEve #define tmrEventScheduleAbs(pTmr, pEvent, timeAbs) tmrEventScheduleAbs_IMPL(pTmr, pEvent, timeAbs) #endif //__nvoc_objtmr_h_disabled -NV_STATUS tmrScheduleCallbackAbs_IMPL(struct OBJTMR *pTmr, TIMEPROC_OBSOLETE arg0, void *arg1, NvU64 arg2, NvU32 arg3, NvU32 arg4); +NV_STATUS tmrScheduleCallbackAbs_IMPL(struct OBJTMR *pTmr, TIMEPROC_OBSOLETE arg2, void *arg3, NvU64 arg4, NvU32 arg5, NvU32 arg6); #ifdef __nvoc_objtmr_h_disabled -static inline NV_STATUS tmrScheduleCallbackAbs(struct OBJTMR *pTmr, TIMEPROC_OBSOLETE arg0, void *arg1, NvU64 arg2, NvU32 arg3, NvU32 arg4) { +static inline NV_STATUS tmrScheduleCallbackAbs(struct OBJTMR *pTmr, TIMEPROC_OBSOLETE arg2, void *arg3, NvU64 arg4, NvU32 arg5, NvU32 arg6) { NV_ASSERT_FAILED_PRECOMP("OBJTMR was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_objtmr_h_disabled -#define tmrScheduleCallbackAbs(pTmr, arg0, arg1, arg2, arg3, arg4) tmrScheduleCallbackAbs_IMPL(pTmr, arg0, arg1, arg2, arg3, arg4) +#define tmrScheduleCallbackAbs(pTmr, arg2, arg3, arg4, arg5, arg6) tmrScheduleCallbackAbs_IMPL(pTmr, arg2, arg3, arg4, arg5, arg6) #endif //__nvoc_objtmr_h_disabled NV_STATUS tmrEventScheduleRel_IMPL(struct OBJTMR *pTmr, PTMR_EVENT pEvent, NvU64 timeRel); @@ -1035,26 +1089,26 @@ static inline NV_STATUS tmrEventScheduleRel(struct OBJTMR *pTmr, PTMR_EVENT pEve #define tmrEventScheduleRel(pTmr, pEvent, timeRel) tmrEventScheduleRel_IMPL(pTmr, pEvent, timeRel) #endif //__nvoc_objtmr_h_disabled -NV_STATUS tmrScheduleCallbackRel_IMPL(struct OBJTMR *pTmr, TIMEPROC_OBSOLETE arg0, void *arg1, NvU64 arg2, NvU32 arg3, NvU32 arg4); +NV_STATUS tmrScheduleCallbackRel_IMPL(struct OBJTMR *pTmr, TIMEPROC_OBSOLETE arg2, void *arg3, NvU64 arg4, NvU32 arg5, NvU32 arg6); #ifdef __nvoc_objtmr_h_disabled -static inline NV_STATUS tmrScheduleCallbackRel(struct OBJTMR *pTmr, TIMEPROC_OBSOLETE arg0, void *arg1, NvU64 arg2, NvU32 arg3, NvU32 arg4) { +static inline NV_STATUS tmrScheduleCallbackRel(struct OBJTMR *pTmr, TIMEPROC_OBSOLETE arg2, void *arg3, NvU64 arg4, NvU32 arg5, NvU32 arg6) { NV_ASSERT_FAILED_PRECOMP("OBJTMR was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_objtmr_h_disabled -#define tmrScheduleCallbackRel(pTmr, arg0, arg1, arg2, arg3, arg4) tmrScheduleCallbackRel_IMPL(pTmr, arg0, arg1, arg2, arg3, arg4) +#define tmrScheduleCallbackRel(pTmr, arg2, arg3, arg4, arg5, arg6) tmrScheduleCallbackRel_IMPL(pTmr, arg2, arg3, arg4, arg5, arg6) #endif //__nvoc_objtmr_h_disabled -NV_STATUS tmrScheduleCallbackRelSec_IMPL(struct OBJTMR *pTmr, TIMEPROC_OBSOLETE arg0, void *arg1, NvU32 arg2, NvU32 arg3, NvU32 arg4); +NV_STATUS tmrScheduleCallbackRelSec_IMPL(struct OBJTMR *pTmr, TIMEPROC_OBSOLETE arg2, void *arg3, NvU32 arg4, NvU32 arg5, NvU32 arg6); #ifdef __nvoc_objtmr_h_disabled -static inline NV_STATUS tmrScheduleCallbackRelSec(struct OBJTMR *pTmr, TIMEPROC_OBSOLETE arg0, void *arg1, NvU32 arg2, NvU32 arg3, NvU32 arg4) { +static inline NV_STATUS tmrScheduleCallbackRelSec(struct OBJTMR *pTmr, TIMEPROC_OBSOLETE arg2, void *arg3, NvU32 arg4, NvU32 arg5, NvU32 arg6) { NV_ASSERT_FAILED_PRECOMP("OBJTMR was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_objtmr_h_disabled -#define tmrScheduleCallbackRelSec(pTmr, arg0, arg1, arg2, arg3, arg4) tmrScheduleCallbackRelSec_IMPL(pTmr, arg0, arg1, arg2, arg3, arg4) +#define tmrScheduleCallbackRelSec(pTmr, arg2, arg3, arg4, arg5, arg6) tmrScheduleCallbackRelSec_IMPL(pTmr, arg2, arg3, arg4, arg5, arg6) #endif //__nvoc_objtmr_h_disabled NvBool tmrEventOnList_IMPL(struct OBJTMR *pTmr, PTMR_EVENT pEvent); @@ -1079,15 +1133,15 @@ static inline NV_STATUS tmrEventServiceTimer(OBJGPU *pGpu, struct OBJTMR *pTmr, #define tmrEventServiceTimer(pGpu, pTmr, pEvent) tmrEventServiceTimer_IMPL(pGpu, pTmr, pEvent) #endif //__nvoc_objtmr_h_disabled -NvBool tmrCallbackOnList_IMPL(struct OBJTMR *pTmr, TIMEPROC_OBSOLETE arg0, void *arg1); +NvBool tmrCallbackOnList_IMPL(struct OBJTMR *pTmr, TIMEPROC_OBSOLETE arg2, void *arg3); #ifdef __nvoc_objtmr_h_disabled -static inline NvBool tmrCallbackOnList(struct OBJTMR *pTmr, TIMEPROC_OBSOLETE arg0, void *arg1) { +static inline NvBool tmrCallbackOnList(struct OBJTMR *pTmr, TIMEPROC_OBSOLETE arg2, void *arg3) { NV_ASSERT_FAILED_PRECOMP("OBJTMR was disabled!"); return NV_FALSE; } #else //__nvoc_objtmr_h_disabled -#define tmrCallbackOnList(pTmr, arg0, arg1) tmrCallbackOnList_IMPL(pTmr, arg0, arg1) +#define tmrCallbackOnList(pTmr, arg2, arg3) tmrCallbackOnList_IMPL(pTmr, arg2, arg3) #endif //__nvoc_objtmr_h_disabled void tmrRmCallbackIntrEnable_IMPL(struct OBJTMR *pTmr, OBJGPU *pGpu); diff --git a/src/nvidia/generated/g_os_desc_mem_nvoc.c b/src/nvidia/generated/g_os_desc_mem_nvoc.c index b8d7897ce0..e66723488b 100644 --- a/src/nvidia/generated/g_os_desc_mem_nvoc.c +++ b/src/nvidia/generated/g_os_desc_mem_nvoc.c @@ -93,110 +93,142 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OsDescMemory = /*pExportInfo=*/ &__nvoc_export_info_OsDescMemory }; -static NvBool __nvoc_thunk_OsDescMemory_resCanCopy(struct RsResource *pOsDescMemory) { - return osdescCanCopy((struct OsDescMemory *)(((unsigned char *)pOsDescMemory) - __nvoc_rtti_OsDescMemory_RsResource.offset)); +// 1 down-thunk(s) defined to bridge methods in OsDescMemory from superclasses + +// osdescCanCopy: virtual override (res) base (mem) +static NvBool __nvoc_down_thunk_OsDescMemory_resCanCopy(struct RsResource *pOsDescMemory) { + return osdescCanCopy((struct OsDescMemory *)(((unsigned char *) pOsDescMemory) - __nvoc_rtti_OsDescMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_osdescCheckMemInterUnmap(struct OsDescMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), bSubdeviceHandleProvided); + +// 25 up-thunk(s) defined to bridge methods in OsDescMemory to superclasses + +// osdescIsDuplicate: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_osdescIsDuplicate(struct OsDescMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_RmResource_osdescShareCallback(struct OsDescMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_OsDescMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// osdescGetMapAddrSpace: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_osdescGetMapAddrSpace(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_RsResource_osdescMapTo(struct OsDescMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset), pParams); +// osdescControl: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_osdescControl(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_osdescGetMapAddrSpace(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return memGetMapAddrSpace((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); +// osdescMap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_osdescMap(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } -static NvBool __nvoc_thunk_Memory_osdescIsExportAllowed(struct OsDescMemory *pMemory) { - return memIsExportAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset)); +// osdescUnmap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_osdescUnmap(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pCallContext, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_osdescGetRefCount(struct OsDescMemory *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset)); +// osdescGetMemInterMapParams: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_osdescGetMemInterMapParams(struct OsDescMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pParams); } -static void __nvoc_thunk_RsResource_osdescAddAdditionalDependants(struct RsClient *pClient, struct OsDescMemory *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset), pReference); +// osdescCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_osdescCheckMemInterUnmap(struct OsDescMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RmResource_osdescControl_Prologue(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_OsDescMemory_RmResource.offset), pCallContext, pParams); +// osdescGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_osdescGetMemoryMappingDescriptor(struct OsDescMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), ppMemDesc); } -static NvBool __nvoc_thunk_Memory_osdescIsGpuMapAllowed(struct OsDescMemory *pMemory, struct OBJGPU *pGpu) { - return memIsGpuMapAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pGpu); +// osdescCheckCopyPermissions: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_osdescCheckCopyPermissions(struct OsDescMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pDstGpu, pDstDevice); } -static NV_STATUS __nvoc_thunk_RsResource_osdescUnmapFrom(struct OsDescMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset), pParams); +// osdescIsReady: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_osdescIsReady(struct OsDescMemory *pMemory, NvBool bCopyConstructorContext) { + return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), bCopyConstructorContext); } -static void __nvoc_thunk_RmResource_osdescControl_Epilogue(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_OsDescMemory_RmResource.offset), pCallContext, pParams); +// osdescIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_osdescIsGpuMapAllowed(struct OsDescMemory *pMemory, struct OBJGPU *pGpu) { + return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pGpu); } -static NV_STATUS __nvoc_thunk_Memory_osdescControl(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memControl((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pCallContext, pParams); +// osdescIsExportAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_osdescIsExportAllowed(struct OsDescMemory *pMemory) { + return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset)); } -static NV_STATUS __nvoc_thunk_Memory_osdescUnmap(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pCallContext, pCpuMapping); +// osdescAccessCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_osdescAccessCallback(struct OsDescMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_Memory_osdescGetMemInterMapParams(struct OsDescMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pParams); +// osdescShareCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_osdescShareCallback(struct OsDescMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_Memory_osdescGetMemoryMappingDescriptor(struct OsDescMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), ppMemDesc); +// osdescControlSerialization_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_osdescControlSerialization_Prologue(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_osdescControlFilter(struct OsDescMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset), pCallContext, pParams); +// osdescControlSerialization_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_osdescControlSerialization_Epilogue(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_osdescControlSerialization_Prologue(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_OsDescMemory_RmResource.offset), pCallContext, pParams); +// osdescControl_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_osdescControl_Prologue(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_osdescIsPartialUnmapSupported(struct OsDescMemory *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset)); +// osdescControl_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_osdescControl_Epilogue(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_osdescIsReady(struct OsDescMemory *pMemory, NvBool bCopyConstructorContext) { - return memIsReady((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), bCopyConstructorContext); +// osdescPreDestruct: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_osdescPreDestruct(struct OsDescMemory *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_osdescCheckCopyPermissions(struct OsDescMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return memCheckCopyPermissions((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pDstGpu, pDstDevice); +// osdescControlFilter: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_osdescControlFilter(struct OsDescMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_osdescPreDestruct(struct OsDescMemory *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset)); +// osdescIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body +static NvBool __nvoc_up_thunk_RsResource_osdescIsPartialUnmapSupported(struct OsDescMemory *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_osdescIsDuplicate(struct OsDescMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), hMemory, pDuplicate); +// osdescMapTo: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_osdescMapTo(struct OsDescMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_osdescControlSerialization_Epilogue(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_OsDescMemory_RmResource.offset), pCallContext, pParams); +// osdescUnmapFrom: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_osdescUnmapFrom(struct OsDescMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_Memory_osdescMap(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pCallContext, pParams, pCpuMapping); +// osdescGetRefCount: virtual inherited (res) base (mem) +static NvU32 __nvoc_up_thunk_RsResource_osdescGetRefCount(struct OsDescMemory *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_osdescAccessCallback(struct OsDescMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_OsDescMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// osdescAddAdditionalDependants: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_osdescAddAdditionalDependants(struct RsClient *pClient, struct OsDescMemory *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_OsDescMemory = { /*numEntries=*/ 0, @@ -232,65 +264,95 @@ NV_STATUS __nvoc_ctor_OsDescMemory(OsDescMemory *pThis, CALL_CONTEXT * arg_pCall return status; } +// Vtable initialization static void __nvoc_init_funcTable_OsDescMemory_1(OsDescMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // osdescCanCopy -- virtual override (res) base (mem) pThis->__osdescCanCopy__ = &osdescCanCopy_IMPL; + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_OsDescMemory_resCanCopy; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_OsDescMemory_resCanCopy; + // osdescIsDuplicate -- virtual inherited (mem) base (mem) + pThis->__osdescIsDuplicate__ = &__nvoc_up_thunk_Memory_osdescIsDuplicate; - pThis->__osdescCheckMemInterUnmap__ = &__nvoc_thunk_Memory_osdescCheckMemInterUnmap; + // osdescGetMapAddrSpace -- virtual inherited (mem) base (mem) + pThis->__osdescGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_osdescGetMapAddrSpace; - pThis->__osdescShareCallback__ = &__nvoc_thunk_RmResource_osdescShareCallback; + // osdescControl -- virtual inherited (mem) base (mem) + pThis->__osdescControl__ = &__nvoc_up_thunk_Memory_osdescControl; - pThis->__osdescMapTo__ = &__nvoc_thunk_RsResource_osdescMapTo; + // osdescMap -- virtual inherited (mem) base (mem) + pThis->__osdescMap__ = &__nvoc_up_thunk_Memory_osdescMap; - pThis->__osdescGetMapAddrSpace__ = &__nvoc_thunk_Memory_osdescGetMapAddrSpace; + // osdescUnmap -- virtual inherited (mem) base (mem) + pThis->__osdescUnmap__ = &__nvoc_up_thunk_Memory_osdescUnmap; - pThis->__osdescIsExportAllowed__ = &__nvoc_thunk_Memory_osdescIsExportAllowed; + // osdescGetMemInterMapParams -- virtual inherited (mem) base (mem) + pThis->__osdescGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_osdescGetMemInterMapParams; - pThis->__osdescGetRefCount__ = &__nvoc_thunk_RsResource_osdescGetRefCount; + // osdescCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body + pThis->__osdescCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_osdescCheckMemInterUnmap; - pThis->__osdescAddAdditionalDependants__ = &__nvoc_thunk_RsResource_osdescAddAdditionalDependants; + // osdescGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) + pThis->__osdescGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_osdescGetMemoryMappingDescriptor; - pThis->__osdescControl_Prologue__ = &__nvoc_thunk_RmResource_osdescControl_Prologue; + // osdescCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body + pThis->__osdescCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_osdescCheckCopyPermissions; - pThis->__osdescIsGpuMapAllowed__ = &__nvoc_thunk_Memory_osdescIsGpuMapAllowed; + // osdescIsReady -- virtual inherited (mem) base (mem) + pThis->__osdescIsReady__ = &__nvoc_up_thunk_Memory_osdescIsReady; - pThis->__osdescUnmapFrom__ = &__nvoc_thunk_RsResource_osdescUnmapFrom; + // osdescIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__osdescIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_osdescIsGpuMapAllowed; - pThis->__osdescControl_Epilogue__ = &__nvoc_thunk_RmResource_osdescControl_Epilogue; + // osdescIsExportAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__osdescIsExportAllowed__ = &__nvoc_up_thunk_Memory_osdescIsExportAllowed; - pThis->__osdescControl__ = &__nvoc_thunk_Memory_osdescControl; + // osdescAccessCallback -- virtual inherited (rmres) base (mem) + pThis->__osdescAccessCallback__ = &__nvoc_up_thunk_RmResource_osdescAccessCallback; - pThis->__osdescUnmap__ = &__nvoc_thunk_Memory_osdescUnmap; + // osdescShareCallback -- virtual inherited (rmres) base (mem) + pThis->__osdescShareCallback__ = &__nvoc_up_thunk_RmResource_osdescShareCallback; - pThis->__osdescGetMemInterMapParams__ = &__nvoc_thunk_Memory_osdescGetMemInterMapParams; + // osdescControlSerialization_Prologue -- virtual inherited (rmres) base (mem) + pThis->__osdescControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_osdescControlSerialization_Prologue; - pThis->__osdescGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_osdescGetMemoryMappingDescriptor; + // osdescControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__osdescControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_osdescControlSerialization_Epilogue; - pThis->__osdescControlFilter__ = &__nvoc_thunk_RsResource_osdescControlFilter; + // osdescControl_Prologue -- virtual inherited (rmres) base (mem) + pThis->__osdescControl_Prologue__ = &__nvoc_up_thunk_RmResource_osdescControl_Prologue; - pThis->__osdescControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_osdescControlSerialization_Prologue; + // osdescControl_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__osdescControl_Epilogue__ = &__nvoc_up_thunk_RmResource_osdescControl_Epilogue; - pThis->__osdescIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_osdescIsPartialUnmapSupported; + // osdescPreDestruct -- virtual inherited (res) base (mem) + pThis->__osdescPreDestruct__ = &__nvoc_up_thunk_RsResource_osdescPreDestruct; - pThis->__osdescIsReady__ = &__nvoc_thunk_Memory_osdescIsReady; + // osdescControlFilter -- virtual inherited (res) base (mem) + pThis->__osdescControlFilter__ = &__nvoc_up_thunk_RsResource_osdescControlFilter; - pThis->__osdescCheckCopyPermissions__ = &__nvoc_thunk_Memory_osdescCheckCopyPermissions; + // osdescIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body + pThis->__osdescIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_osdescIsPartialUnmapSupported; - pThis->__osdescPreDestruct__ = &__nvoc_thunk_RsResource_osdescPreDestruct; + // osdescMapTo -- virtual inherited (res) base (mem) + pThis->__osdescMapTo__ = &__nvoc_up_thunk_RsResource_osdescMapTo; - pThis->__osdescIsDuplicate__ = &__nvoc_thunk_Memory_osdescIsDuplicate; + // osdescUnmapFrom -- virtual inherited (res) base (mem) + pThis->__osdescUnmapFrom__ = &__nvoc_up_thunk_RsResource_osdescUnmapFrom; - pThis->__osdescControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_osdescControlSerialization_Epilogue; + // osdescGetRefCount -- virtual inherited (res) base (mem) + pThis->__osdescGetRefCount__ = &__nvoc_up_thunk_RsResource_osdescGetRefCount; - pThis->__osdescMap__ = &__nvoc_thunk_Memory_osdescMap; + // osdescAddAdditionalDependants -- virtual inherited (res) base (mem) + pThis->__osdescAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_osdescAddAdditionalDependants; +} // End __nvoc_init_funcTable_OsDescMemory_1 with approximately 27 basic block(s). - pThis->__osdescAccessCallback__ = &__nvoc_thunk_RmResource_osdescAccessCallback; -} +// Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_OsDescMemory(OsDescMemory *pThis) { + + // Initialize vtable(s) with 26 per-object function pointer(s). __nvoc_init_funcTable_OsDescMemory_1(pThis); } diff --git a/src/nvidia/generated/g_os_desc_mem_nvoc.h b/src/nvidia/generated/g_os_desc_mem_nvoc.h index 835838addc..49548ff009 100644 --- a/src/nvidia/generated/g_os_desc_mem_nvoc.h +++ b/src/nvidia/generated/g_os_desc_mem_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_OS_DESC_MEM_NVOC_H_ #define _G_OS_DESC_MEM_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_os_desc_mem_nvoc.h" #ifndef _OS_DESC_MEMORY_H_ @@ -49,41 +57,50 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OsDescMemory { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Memory *__nvoc_pbase_Memory; - struct OsDescMemory *__nvoc_pbase_OsDescMemory; - NvBool (*__osdescCanCopy__)(struct OsDescMemory *); - NV_STATUS (*__osdescCheckMemInterUnmap__)(struct OsDescMemory *, NvBool); - NvBool (*__osdescShareCallback__)(struct OsDescMemory *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__osdescMapTo__)(struct OsDescMemory *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__osdescGetMapAddrSpace__)(struct OsDescMemory *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvBool (*__osdescIsExportAllowed__)(struct OsDescMemory *); - NvU32 (*__osdescGetRefCount__)(struct OsDescMemory *); - void (*__osdescAddAdditionalDependants__)(struct RsClient *, struct OsDescMemory *, RsResourceRef *); - NV_STATUS (*__osdescControl_Prologue__)(struct OsDescMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__osdescIsGpuMapAllowed__)(struct OsDescMemory *, struct OBJGPU *); - NV_STATUS (*__osdescUnmapFrom__)(struct OsDescMemory *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__osdescControl_Epilogue__)(struct OsDescMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__osdescControl__)(struct OsDescMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__osdescUnmap__)(struct OsDescMemory *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__osdescGetMemInterMapParams__)(struct OsDescMemory *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__osdescGetMemoryMappingDescriptor__)(struct OsDescMemory *, MEMORY_DESCRIPTOR **); - NV_STATUS (*__osdescControlFilter__)(struct OsDescMemory *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__osdescControlSerialization_Prologue__)(struct OsDescMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__osdescIsPartialUnmapSupported__)(struct OsDescMemory *); - NV_STATUS (*__osdescIsReady__)(struct OsDescMemory *, NvBool); - NV_STATUS (*__osdescCheckCopyPermissions__)(struct OsDescMemory *, struct OBJGPU *, struct Device *); - void (*__osdescPreDestruct__)(struct OsDescMemory *); - NV_STATUS (*__osdescIsDuplicate__)(struct OsDescMemory *, NvHandle, NvBool *); - void (*__osdescControlSerialization_Epilogue__)(struct OsDescMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__osdescMap__)(struct OsDescMemory *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__osdescAccessCallback__)(struct OsDescMemory *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct Memory *__nvoc_pbase_Memory; // mem super + struct OsDescMemory *__nvoc_pbase_OsDescMemory; // osdesc + + // Vtable with 26 per-object function pointers + NvBool (*__osdescCanCopy__)(struct OsDescMemory * /*this*/); // virtual override (res) base (mem) + NV_STATUS (*__osdescIsDuplicate__)(struct OsDescMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) + NV_STATUS (*__osdescGetMapAddrSpace__)(struct OsDescMemory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) + NV_STATUS (*__osdescControl__)(struct OsDescMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (mem) base (mem) + NV_STATUS (*__osdescMap__)(struct OsDescMemory * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__osdescUnmap__)(struct OsDescMemory * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__osdescGetMemInterMapParams__)(struct OsDescMemory * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (mem) base (mem) + NV_STATUS (*__osdescCheckMemInterUnmap__)(struct OsDescMemory * /*this*/, NvBool); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__osdescGetMemoryMappingDescriptor__)(struct OsDescMemory * /*this*/, MEMORY_DESCRIPTOR **); // virtual inherited (mem) base (mem) + NV_STATUS (*__osdescCheckCopyPermissions__)(struct OsDescMemory * /*this*/, struct OBJGPU *, struct Device *); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__osdescIsReady__)(struct OsDescMemory * /*this*/, NvBool); // virtual inherited (mem) base (mem) + NvBool (*__osdescIsGpuMapAllowed__)(struct OsDescMemory * /*this*/, struct OBJGPU *); // inline virtual inherited (mem) base (mem) body + NvBool (*__osdescIsExportAllowed__)(struct OsDescMemory * /*this*/); // inline virtual inherited (mem) base (mem) body + NvBool (*__osdescAccessCallback__)(struct OsDescMemory * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (mem) + NvBool (*__osdescShareCallback__)(struct OsDescMemory * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__osdescControlSerialization_Prologue__)(struct OsDescMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__osdescControlSerialization_Epilogue__)(struct OsDescMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__osdescControl_Prologue__)(struct OsDescMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__osdescControl_Epilogue__)(struct OsDescMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__osdescPreDestruct__)(struct OsDescMemory * /*this*/); // virtual inherited (res) base (mem) + NV_STATUS (*__osdescControlFilter__)(struct OsDescMemory * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (mem) + NvBool (*__osdescIsPartialUnmapSupported__)(struct OsDescMemory * /*this*/); // inline virtual inherited (res) base (mem) body + NV_STATUS (*__osdescMapTo__)(struct OsDescMemory * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (mem) + NV_STATUS (*__osdescUnmapFrom__)(struct OsDescMemory * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (mem) + NvU32 (*__osdescGetRefCount__)(struct OsDescMemory * /*this*/); // virtual inherited (res) base (mem) + void (*__osdescAddAdditionalDependants__)(struct RsClient *, struct OsDescMemory * /*this*/, RsResourceRef *); // virtual inherited (res) base (mem) }; #ifndef __NVOC_CLASS_OsDescMemory_TYPEDEF__ @@ -95,6 +112,7 @@ typedef struct OsDescMemory OsDescMemory; #define __nvoc_class_id_OsDescMemory 0xb3dacd #endif /* __nvoc_class_id_OsDescMemory */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OsDescMemory; #define __staticCast_OsDescMemory(pThis) \ @@ -107,145 +125,174 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OsDescMemory; ((OsDescMemory*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OsDescMemory))) #endif //__nvoc_os_desc_mem_h_disabled - NV_STATUS __nvoc_objCreateDynamic_OsDescMemory(OsDescMemory**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_OsDescMemory(OsDescMemory**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_OsDescMemory(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_OsDescMemory((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define osdescCanCopy_FNPTR(pOsDescMemory) pOsDescMemory->__osdescCanCopy__ #define osdescCanCopy(pOsDescMemory) osdescCanCopy_DISPATCH(pOsDescMemory) -#define osdescCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) osdescCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define osdescShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) osdescShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define osdescMapTo(pResource, pParams) osdescMapTo_DISPATCH(pResource, pParams) +#define osdescIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define osdescIsDuplicate(pMemory, hMemory, pDuplicate) osdescIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) +#define osdescGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ #define osdescGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) osdescGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define osdescIsExportAllowed(pMemory) osdescIsExportAllowed_DISPATCH(pMemory) -#define osdescGetRefCount(pResource) osdescGetRefCount_DISPATCH(pResource) -#define osdescAddAdditionalDependants(pClient, pResource, pReference) osdescAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define osdescControl_Prologue(pResource, pCallContext, pParams) osdescControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define osdescIsGpuMapAllowed(pMemory, pGpu) osdescIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define osdescUnmapFrom(pResource, pParams) osdescUnmapFrom_DISPATCH(pResource, pParams) -#define osdescControl_Epilogue(pResource, pCallContext, pParams) osdescControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define osdescControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ #define osdescControl(pMemory, pCallContext, pParams) osdescControl_DISPATCH(pMemory, pCallContext, pParams) +#define osdescMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define osdescMap(pMemory, pCallContext, pParams, pCpuMapping) osdescMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define osdescUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ #define osdescUnmap(pMemory, pCallContext, pCpuMapping) osdescUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) +#define osdescGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ #define osdescGetMemInterMapParams(pMemory, pParams) osdescGetMemInterMapParams_DISPATCH(pMemory, pParams) +#define osdescCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define osdescCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) osdescCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) +#define osdescGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ #define osdescGetMemoryMappingDescriptor(pMemory, ppMemDesc) osdescGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define osdescControlFilter(pResource, pCallContext, pParams) osdescControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define osdescControlSerialization_Prologue(pResource, pCallContext, pParams) osdescControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define osdescIsPartialUnmapSupported(pResource) osdescIsPartialUnmapSupported_DISPATCH(pResource) -#define osdescIsReady(pMemory, bCopyConstructorContext) osdescIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define osdescCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ #define osdescCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) osdescCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define osdescPreDestruct(pResource) osdescPreDestruct_DISPATCH(pResource) -#define osdescIsDuplicate(pMemory, hMemory, pDuplicate) osdescIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define osdescControlSerialization_Epilogue(pResource, pCallContext, pParams) osdescControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define osdescMap(pMemory, pCallContext, pParams, pCpuMapping) osdescMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define osdescIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define osdescIsReady(pMemory, bCopyConstructorContext) osdescIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define osdescIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define osdescIsGpuMapAllowed(pMemory, pGpu) osdescIsGpuMapAllowed_DISPATCH(pMemory, pGpu) +#define osdescIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define osdescIsExportAllowed(pMemory) osdescIsExportAllowed_DISPATCH(pMemory) +#define osdescAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ #define osdescAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) osdescAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool osdescCanCopy_IMPL(struct OsDescMemory *pOsDescMemory); +#define osdescShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define osdescShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) osdescShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define osdescControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define osdescControlSerialization_Prologue(pResource, pCallContext, pParams) osdescControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define osdescControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define osdescControlSerialization_Epilogue(pResource, pCallContext, pParams) osdescControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define osdescControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define osdescControl_Prologue(pResource, pCallContext, pParams) osdescControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define osdescControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define osdescControl_Epilogue(pResource, pCallContext, pParams) osdescControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define osdescPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define osdescPreDestruct(pResource) osdescPreDestruct_DISPATCH(pResource) +#define osdescControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define osdescControlFilter(pResource, pCallContext, pParams) osdescControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define osdescIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define osdescIsPartialUnmapSupported(pResource) osdescIsPartialUnmapSupported_DISPATCH(pResource) +#define osdescMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define osdescMapTo(pResource, pParams) osdescMapTo_DISPATCH(pResource, pParams) +#define osdescUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define osdescUnmapFrom(pResource, pParams) osdescUnmapFrom_DISPATCH(pResource, pParams) +#define osdescGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define osdescGetRefCount(pResource) osdescGetRefCount_DISPATCH(pResource) +#define osdescAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define osdescAddAdditionalDependants(pClient, pResource, pReference) osdescAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NvBool osdescCanCopy_DISPATCH(struct OsDescMemory *pOsDescMemory) { return pOsDescMemory->__osdescCanCopy__(pOsDescMemory); } -static inline NV_STATUS osdescCheckMemInterUnmap_DISPATCH(struct OsDescMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__osdescCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); -} - -static inline NvBool osdescShareCallback_DISPATCH(struct OsDescMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__osdescShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS osdescMapTo_DISPATCH(struct OsDescMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__osdescMapTo__(pResource, pParams); +static inline NV_STATUS osdescIsDuplicate_DISPATCH(struct OsDescMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return pMemory->__osdescIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS osdescGetMapAddrSpace_DISPATCH(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pMemory->__osdescGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } -static inline NvBool osdescIsExportAllowed_DISPATCH(struct OsDescMemory *pMemory) { - return pMemory->__osdescIsExportAllowed__(pMemory); +static inline NV_STATUS osdescControl_DISPATCH(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pMemory->__osdescControl__(pMemory, pCallContext, pParams); } -static inline NvU32 osdescGetRefCount_DISPATCH(struct OsDescMemory *pResource) { - return pResource->__osdescGetRefCount__(pResource); +static inline NV_STATUS osdescMap_DISPATCH(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pMemory->__osdescMap__(pMemory, pCallContext, pParams, pCpuMapping); } -static inline void osdescAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct OsDescMemory *pResource, RsResourceRef *pReference) { - pResource->__osdescAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS osdescUnmap_DISPATCH(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pMemory->__osdescUnmap__(pMemory, pCallContext, pCpuMapping); } -static inline NV_STATUS osdescControl_Prologue_DISPATCH(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__osdescControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS osdescGetMemInterMapParams_DISPATCH(struct OsDescMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pMemory->__osdescGetMemInterMapParams__(pMemory, pParams); } -static inline NvBool osdescIsGpuMapAllowed_DISPATCH(struct OsDescMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__osdescIsGpuMapAllowed__(pMemory, pGpu); +static inline NV_STATUS osdescCheckMemInterUnmap_DISPATCH(struct OsDescMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return pMemory->__osdescCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } -static inline NV_STATUS osdescUnmapFrom_DISPATCH(struct OsDescMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__osdescUnmapFrom__(pResource, pParams); +static inline NV_STATUS osdescGetMemoryMappingDescriptor_DISPATCH(struct OsDescMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return pMemory->__osdescGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } -static inline void osdescControl_Epilogue_DISPATCH(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__osdescControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS osdescCheckCopyPermissions_DISPATCH(struct OsDescMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return pMemory->__osdescCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } -static inline NV_STATUS osdescControl_DISPATCH(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__osdescControl__(pMemory, pCallContext, pParams); +static inline NV_STATUS osdescIsReady_DISPATCH(struct OsDescMemory *pMemory, NvBool bCopyConstructorContext) { + return pMemory->__osdescIsReady__(pMemory, bCopyConstructorContext); } -static inline NV_STATUS osdescUnmap_DISPATCH(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__osdescUnmap__(pMemory, pCallContext, pCpuMapping); +static inline NvBool osdescIsGpuMapAllowed_DISPATCH(struct OsDescMemory *pMemory, struct OBJGPU *pGpu) { + return pMemory->__osdescIsGpuMapAllowed__(pMemory, pGpu); } -static inline NV_STATUS osdescGetMemInterMapParams_DISPATCH(struct OsDescMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__osdescGetMemInterMapParams__(pMemory, pParams); +static inline NvBool osdescIsExportAllowed_DISPATCH(struct OsDescMemory *pMemory) { + return pMemory->__osdescIsExportAllowed__(pMemory); } -static inline NV_STATUS osdescGetMemoryMappingDescriptor_DISPATCH(struct OsDescMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__osdescGetMemoryMappingDescriptor__(pMemory, ppMemDesc); +static inline NvBool osdescAccessCallback_DISPATCH(struct OsDescMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__osdescAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS osdescControlFilter_DISPATCH(struct OsDescMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__osdescControlFilter__(pResource, pCallContext, pParams); +static inline NvBool osdescShareCallback_DISPATCH(struct OsDescMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__osdescShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS osdescControlSerialization_Prologue_DISPATCH(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__osdescControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool osdescIsPartialUnmapSupported_DISPATCH(struct OsDescMemory *pResource) { - return pResource->__osdescIsPartialUnmapSupported__(pResource); +static inline void osdescControlSerialization_Epilogue_DISPATCH(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__osdescControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS osdescIsReady_DISPATCH(struct OsDescMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__osdescIsReady__(pMemory, bCopyConstructorContext); +static inline NV_STATUS osdescControl_Prologue_DISPATCH(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__osdescControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS osdescCheckCopyPermissions_DISPATCH(struct OsDescMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__osdescCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); +static inline void osdescControl_Epilogue_DISPATCH(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__osdescControl_Epilogue__(pResource, pCallContext, pParams); } static inline void osdescPreDestruct_DISPATCH(struct OsDescMemory *pResource) { pResource->__osdescPreDestruct__(pResource); } -static inline NV_STATUS osdescIsDuplicate_DISPATCH(struct OsDescMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__osdescIsDuplicate__(pMemory, hMemory, pDuplicate); +static inline NV_STATUS osdescControlFilter_DISPATCH(struct OsDescMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__osdescControlFilter__(pResource, pCallContext, pParams); } -static inline void osdescControlSerialization_Epilogue_DISPATCH(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__osdescControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool osdescIsPartialUnmapSupported_DISPATCH(struct OsDescMemory *pResource) { + return pResource->__osdescIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS osdescMap_DISPATCH(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__osdescMap__(pMemory, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS osdescMapTo_DISPATCH(struct OsDescMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__osdescMapTo__(pResource, pParams); } -static inline NvBool osdescAccessCallback_DISPATCH(struct OsDescMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__osdescAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS osdescUnmapFrom_DISPATCH(struct OsDescMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__osdescUnmapFrom__(pResource, pParams); } +static inline NvU32 osdescGetRefCount_DISPATCH(struct OsDescMemory *pResource) { + return pResource->__osdescGetRefCount__(pResource); +} + +static inline void osdescAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct OsDescMemory *pResource, RsResourceRef *pReference) { + pResource->__osdescAddAdditionalDependants__(pClient, pResource, pReference); +} + +NvBool osdescCanCopy_IMPL(struct OsDescMemory *pOsDescMemory); + NV_STATUS osdescConstruct_IMPL(struct OsDescMemory *arg_pOsDescMemory, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_osdescConstruct(arg_pOsDescMemory, arg_pCallContext, arg_pParams) osdescConstruct_IMPL(arg_pOsDescMemory, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_os_nvoc.c b/src/nvidia/generated/g_os_nvoc.c index 37f1294a05..a4c9cc7c09 100644 --- a/src/nvidia/generated/g_os_nvoc.c +++ b/src/nvidia/generated/g_os_nvoc.c @@ -88,10 +88,13 @@ NV_STATUS __nvoc_ctor_OBJOS(OBJOS *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJOS_1(OBJOS *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_OBJOS_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_OBJOS(OBJOS *pThis) { __nvoc_init_funcTable_OBJOS_1(pThis); } diff --git a/src/nvidia/generated/g_os_nvoc.h b/src/nvidia/generated/g_os_nvoc.h index cd759aa671..18db31b4f2 100644 --- a/src/nvidia/generated/g_os_nvoc.h +++ b/src/nvidia/generated/g_os_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_OS_NVOC_H_ #define _G_OS_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_os_nvoc.h" @@ -56,6 +64,7 @@ extern "C" { #include "os/capability.h" /* ------------------------ Forward Declarations ---------------------------- */ + struct OBJOS; #ifndef __NVOC_CLASS_OBJOS_TYPEDEF__ @@ -140,13 +149,6 @@ typedef struct RM_PAGEABLE_SECTION { } RM_PAGEABLE_SECTION; -// OSSetVideoSource defines -#define NV_OS_VIDEO_SOURCE_MCE 0x0 -#define NV_OS_VIDEO_SOURCE_WINDVR 0x1 -#define NV_OS_VIDEO_SOURCE_WMP9 0x2 -#define NV_OS_VIDEO_SOURCE_VMR9 0x3 -#define NV_OS_VIDEO_SOURCE_WINDVD 0x4 - // OSPollHotkeyState return values #define NV_OS_HOTKEY_STATE_DISPLAY_CHANGE 0:0 #define NV_OS_HOTKEY_STATE_DISPLAY_CHANGE_NOT_FOUND 0x00000000 @@ -173,10 +175,6 @@ typedef struct RM_PAGEABLE_SECTION { #define NV_ACPI_DOD_DISPLAY_OWNER_MGPU 0x00000001 #define NV_ACPI_DOD_DISPLAY_OWNER_DGPU1 0x00000002 -#define NV_OS_ALLOCFLAGS_LOCKPAGES NVBIT(0) -#define NV_OS_ALLOCFLAGS_PAGEDPOOL NVBIT(1) -#define NV_OS_ALLOCFLAGS_NONPAGEDPOOL 0 - // ACPI 3.0a definitions for requested data length #define NV_ACPI_DDC_REQUESTED_DATA_LENGTH_128B 0x00000001 #define NV_ACPI_DDC_REQUESTED_DATA_LENGTH_256B 0x00000002 @@ -184,13 +182,6 @@ typedef struct RM_PAGEABLE_SECTION { #define NV_ACPI_DDC_REQUESTED_DATA_LENGTH_512B 0x00000004 #define NV_ACPI_DDC_REQUESTED_DATA_LENGTH_DEFAULT 0x00000001 -typedef enum _OS_PEX_RECOVERY_STATUS -{ - OS_PEX_RECOVERY_GPU_RESET_PENDING = 0, - OS_PEX_RECOVERY_GPU_RESTORED, - OS_PEX_RECOVERY_GPU_REMOVED -} OS_PEX_RECOVERY_STATUS; - // osBugCheck bugcode defines #define OS_BUG_CHECK_BUGCODE_UNKNOWN (0) #define OS_BUG_CHECK_BUGCODE_INTERNAL_TEST (1) @@ -385,10 +376,6 @@ typedef void OSInitScalabilityOptions(OBJGPU *, void *); typedef void OSHandleDeferredRecovery(OBJGPU *); typedef NvBool OSIsSwPreInitOnly(OS_GPU_INFO *); -#define NVRM_MAX_FILE_NAME_LENGTH (128) -#define NVRM_FILE_ACCESS_READ NVBIT(0) -#define NVRM_FILE_ACCESS_WRITE NVBIT(1) - typedef void OSGetTimeoutParams(OBJGPU *, NvU32 *, NvU32 *, NvU32 *); typedef NvBool OSIsRaisedIRQL(void); typedef NvBool OSIsISR(void); @@ -406,18 +393,17 @@ typedef NvBool OSIsEqualGUID(void *, void *); #define OS_QUEUE_WORKITEM_FLAGS_LOCK_SEMA NVBIT(8) #define OS_QUEUE_WORKITEM_FLAGS_LOCK_API_RW NVBIT(9) #define OS_QUEUE_WORKITEM_FLAGS_LOCK_API_RO NVBIT(10) -#define OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS_RW NVBIT(11) -#define OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS_RO NVBIT(12) -#define OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_DEVICE_RW NVBIT(13) -#define OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_DEVICE_RO NVBIT(14) -#define OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_SUBDEVICE_RW NVBIT(15) -#define OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_SUBDEVICE_RO NVBIT(16) +#define OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS NVBIT(11) +#define OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_DEVICE_RW NVBIT(12) +#define OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_DEVICE_RO NVBIT(13) +#define OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_SUBDEVICE_RW NVBIT(14) +#define OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_SUBDEVICE_RO NVBIT(15) // // Perform a GPU full power sanity after getting GPU locks. // One of the above LOCK_GPU flags must be provided when using this flag. // -#define OS_QUEUE_WORKITEM_FLAGS_FULL_GPU_SANITY NVBIT(17) -#define OS_QUEUE_WORKITEM_FLAGS_FOR_PM_RESUME NVBIT(18) +#define OS_QUEUE_WORKITEM_FLAGS_FULL_GPU_SANITY NVBIT(16) +#define OS_QUEUE_WORKITEM_FLAGS_FOR_PM_RESUME NVBIT(17) typedef void OSWorkItemFunction(NvU32 gpuInstance, void *); typedef void OSSystemWorkItemFunction(void *); NV_STATUS osQueueWorkItemWithFlags(OBJGPU *, OSWorkItemFunction, void *, NvU32); @@ -466,17 +452,9 @@ void osQADbgRegistryInit(void); typedef NV_STATUS OSGetVersionDump(void *); // End of WinNT -// OS functions typically only implemented for MacOS core -// These next functions also appear on UNIX typedef NvU32 OSnv_rdcr4(struct OBJOS *); typedef NvU64 OSnv_rdxcr0(struct OBJOS *); typedef int OSnv_cpuid(struct OBJOS *, int, int, NvU32 *, NvU32 *, NvU32 *, NvU32 *); -// end of functions shared between MacOSX and UNIX - -// These next functions also appear on UNIX -typedef NvU32 OSnv_rdmsr(struct OBJOS *, NvU32, NvU32 *, NvU32 *); -typedef NvU32 OSnv_wrmsr(struct OBJOS *, NvU32, NvU32, NvU32); -// end functions shared by MacOS and UNIX // NOTE: The following functions are also implemented in MODS NV_STATUS osSimEscapeWrite(OBJGPU *, const char *path, NvU32 Index, NvU32 Size, NvU32 Value); @@ -496,50 +474,9 @@ NV_STATUS osSetupVBlank(OBJGPU *pGpu, void * pProc, void * pParm1, void * pParm2, NvU32 Head, void * pParm3); // Heap reserve tracking functions -typedef void OSInternalReserveAllocCallback(NvU64 offset, NvU64 size, NvU32 gpuId); -typedef void OSInternalReserveFreeCallback(NvU64 offset, NvU32 gpuId); - - -// -// SPB_GPS (Vista) specific defines -// -typedef struct -{ - NvU64 cpuFPCounter1; // CPU Fixed Performance Counter 1 - NvU64 cpuFPCounter2; // CPU Fixed Performance Counter 2 - NvU64 cpuC0Counter; // C0 Counter - NvU64 cpuCoreTSC; // per core Time Stamp Counter value - NvU8 cpuCoreC0Value; // average C0 residency per core - NvU8 cpuCoreAperf; // CPU Aperf value per core - -}OS_CPU_CORE_PERF_COUNTERS, *POS_CPU_CORE_PERF_COUNTERS; - -typedef NV_STATUS OsGetSystemCpuLogicalCoreCounts(NvU32 *pCpuCoreCount); -typedef NV_STATUS OsGetSystemCpuC0AndAPerfCounters(NvU32 coreIndex, POS_CPU_CORE_PERF_COUNTERS pCpuPerfData); -typedef void OsEnableCpuPerformanceCounters(struct OBJOS *pOS); -typedef NV_STATUS OsCpuDpcObjInit(void **ppCpuDpcObj, OBJGPU *pGpu, NvU32 coreCount); -typedef void OsCpuDpcObjQueue(void **ppCpuDpcObj, NvU32 coreCount, POS_CPU_CORE_PERF_COUNTERS pCpuPerfData); -typedef void OsCpuDpcObjFree(void **ppCpuDpcObj); -typedef NV_STATUS OsSystemGetBatteryDrain(NvS32 *pChargeRate); - -// OSDRIVERERROR structure -typedef struct -{ - enum { - OS_DRIVER_ERROR_CODE_NONE = 0, - OS_DRIVER_ERROR_CODE_HP_GT216_VBIOS_BUG_587560, - OS_DRIVER_ERROR_CODE_COUNT, // Must always be last - } code; - - union - { - void *osDriverErrorContextNone; - - } context; - -} OSDRIVERERROR, * POSDRIVERERROR; +void osInternalReserveAllocCallback(NvU64 offset, NvU64 size, NvU32 gpuId); +void osInternalReserveFreeCallback(NvU64 offset, NvU32 gpuId); -typedef NV_STATUS OSPexRecoveryCallback(OS_GPU_INFO *, OS_PEX_RECOVERY_STATUS); // // Function pointer typedef for use as callback prototype when filtering @@ -562,13 +499,9 @@ typedef struct // OS's. // -typedef NvBool OSRmInitRm(struct OBJOS *); -typedef NV_STATUS OSGetPanelStrapAndIndex(struct OBJOS *, OBJGPU *, NvU32 *, NvU32 *); -typedef NV_STATUS OSNotifySbiosDisplayChangeEnd(OBJGPU *, NvU32); -typedef NvU32 OSGetDfpScalerFromSbios(OBJGPU *); +NV_STATUS osRmInitRm(void); typedef NvU32 OSPollHotkeyState(OBJGPU *); -typedef NV_STATUS OSInitGpuMgr(OBJGPUMGR *); typedef void OSSyncWithRmDestroy(void); typedef void OSSyncWithGpuDestroy(NvBool); @@ -582,9 +515,7 @@ typedef NV_STATUS OSGetCarveoutInfo(NvU64*, NvU64*); typedef NV_STATUS OSGetVPRInfo(NvU64*, NvU64*); typedef NV_STATUS OSAllocInVPR(MEMORY_DESCRIPTOR*); typedef NV_STATUS OSGetGenCarveout(NvU64*, NvU64 *, NvU32, NvU64); - -typedef NvU32 OSPepReadReg(OBJGPU *, NvU32); -typedef void OSPepWriteReg(OBJGPU *, NvU32, NvU32); +typedef NV_STATUS OSGetSysmemInfo(OBJGPU *, NvU64*, NvU64*); typedef NV_STATUS OSI2CClosePorts(OS_GPU_INFO *, NvU32); typedef NV_STATUS OSWriteI2CBufferDirect(OBJGPU *, NvU32, NvU8, void *, NvU32, void *, NvU32); @@ -593,20 +524,11 @@ typedef NV_STATUS OSI2CTransfer(OBJGPU *, NvU32, NvU8, nv_i2c_msg_t *, NvU typedef NV_STATUS OSSetGpuRailVoltage(OBJGPU *, NvU32, NvU32*); typedef NV_STATUS OSGetGpuRailVoltage(OBJGPU *, NvU32*); typedef NV_STATUS OSGetGpuRailVoltageInfo(OBJGPU *, NvU32 *, NvU32 *, NvU32 *); -typedef NV_STATUS OSTegraSocGetImpImportData(TEGRA_IMP_IMPORT_DATA *); -typedef NV_STATUS OSTegraSocEnableDisableRfl(OS_GPU_INFO *, NvBool); -typedef NV_STATUS OSTegraAllocateDisplayBandwidth(OS_GPU_INFO *, NvU32, NvU32); - -typedef NV_STATUS OSMemdrvQueryInterface(OS_GPU_INFO *); -typedef void OSMemdrvReleaseInterface(void); -typedef NV_STATUS OSMemdrvGetAsid(NvU32, NvU32 *); -typedef NV_STATUS OSMemdrvGetStreamId(NvU32, NvU32 *); typedef NV_STATUS OSGC6PowerControl(OBJGPU *, NvU32, NvU32 *); -typedef RmPhysAddr OSPageArrayGetPhysAddr(OS_GPU_INFO *pOsGpuInfo, void* pPageData, NvU32 pageIndex); +RmPhysAddr osPageArrayGetPhysAddr(OS_GPU_INFO *pOsGpuInfo, void* pPageData, NvU32 pageIndex); typedef NV_STATUS OSGetChipInfo(OBJGPU *, NvU32*, NvU32*, NvU32*, NvU32*); -typedef NV_STATUS OSGetCurrentIrqPrivData(OS_GPU_INFO *, NvU32*); typedef enum { @@ -631,11 +553,20 @@ typedef NV_STATUS OSReadPFPciConfigInVF(NvU32, NvU32*); #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJOS { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct OBJOS *__nvoc_pbase_OBJOS; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct OBJOS *__nvoc_pbase_OBJOS; // os + + // 13 PDB properties NvBool PDB_PROP_OS_PAT_UNSUPPORTED; NvBool PDB_PROP_OS_SLI_ALLOWED; NvBool PDB_PROP_OS_SYSTEM_EVENTS_SUPPORTED; @@ -649,16 +580,11 @@ struct OBJOS { NvBool PDB_PROP_OS_SUPPORTS_DISPLAY_REMAPPER; NvBool PDB_PROP_OS_DOES_NOT_ALLOW_DIRECT_PCIE_MAPPINGS; NvBool PDB_PROP_OS_NO_PAGED_SEGMENT_ACCESS; + + // Data members OSnv_rdcr4 *osNv_rdcr4; OSnv_rdxcr0 *osNv_rdxcr0; OSnv_cpuid *osNv_cpuid; - OSnv_rdmsr *osNv_rdmsr; - OSnv_wrmsr *osNv_wrmsr; - OSRmInitRm *osRmInitRm; - OSPexRecoveryCallback *osPexRecoveryCallback; - OSInternalReserveAllocCallback *osInternalReserveAllocCallback; - OSInternalReserveFreeCallback *osInternalReserveFreeCallback; - OSPageArrayGetPhysAddr *osPageArrayGetPhysAddr; NvU32 dynamicPowerSupportGpuMask; NvBool bIsSimMods; }; @@ -672,6 +598,7 @@ typedef struct OBJOS OBJOS; #define __nvoc_class_id_OBJOS 0xaa1d70 #endif /* __nvoc_class_id_OBJOS */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJOS; #define __staticCast_OBJOS(pThis) \ @@ -684,6 +611,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJOS; ((OBJOS*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJOS))) #endif //__nvoc_os_h_disabled +// Property macros #define PDB_PROP_OS_SUPPORTS_DISPLAY_REMAPPER_BASE_CAST #define PDB_PROP_OS_SUPPORTS_DISPLAY_REMAPPER_BASE_NAME PDB_PROP_OS_SUPPORTS_DISPLAY_REMAPPER #define PDB_PROP_OS_NO_PAGED_SEGMENT_ACCESS_BASE_CAST @@ -717,6 +645,10 @@ NV_STATUS __nvoc_objCreate_OBJOS(OBJOS**, Dynamic*, NvU32); #define __objCreate_OBJOS(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJOS((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions #undef PRIVATE_FIELD @@ -731,6 +663,9 @@ OSFlushCpuCache osFlushCpuCache; OSAddRecordForCrashLog osAddRecordForCrashLog; OSDeleteRecordForCrashLog osDeleteRecordForCrashLog; +NV_STATUS osTegraSocPowerManagement(OS_GPU_INFO *pOsGpuInfo, + NvBool bInPMTransition, + NvU32 newPMLevel); // // This file should only contain the most common OS functions that provide @@ -851,11 +786,13 @@ NvBool osRemoveGpuSupported(void); void initVGXSpecificRegistry(OBJGPU *); -NV_STATUS osVgpuVfioWake(void *waitQueue); -NV_STATUS osVgpuInjectInterrupt(void *pArg1); -NV_STATUS osVgpuRegisterMdev(OS_GPU_INFO *pArg1); +NV_STATUS nv_vgpu_rm_get_bar_info(OBJGPU *pGpu, const NvU8 *pMdevUuid, NvU64 *barSizes, + NvU64 *sparseOffsets, NvU64 *sparseSizes, + NvU32 *sparseCount, NvBool *isBar064bit, + NvU8 *configParams); NV_STATUS osIsVgpuVfioPresent(void); NV_STATUS osIsVfioPciCorePresent(void); +void osWakeRemoveVgpu(NvU32, NvU32); NV_STATUS rm_is_vgpu_supported_device(OS_GPU_INFO *pNv, NvU32 pmc_boot_1, NvU32 pmc_boot_42); NV_STATUS osLockPageableDataSection(RM_PAGEABLE_SECTION *pSection); @@ -1235,8 +1172,6 @@ NV_STATUS osSanityTestIsr(OBJGPU *pGpu); void osAllocatedRmClient(void* pOSInfo); -NvBool osTegraSocIsSimNetlistNet07(OS_GPU_INFO *pArg1); - NV_STATUS osConfigurePcieReqAtomics(OS_GPU_INFO *pOsGpuInfo, NvU32 *pMask); NvBool osDmabufIsSupported(void); @@ -1317,7 +1252,6 @@ OSHandleGpuLost osHandleGpuLost; OSHandleGpuSurpriseRemoval osHandleGpuSurpriseRemoval; OSInitScalabilityOptions osInitScalabilityOptions; OSQueueDpc osQueueDpc; -OSRmInitRm osRmInitRm; OSSetEvent osSetEvent; OSEventNotification osEventNotification; OSEventNotificationWithInfo osEventNotificationWithInfo; @@ -1403,27 +1337,18 @@ OSIsRaisedIRQL osIsRaisedIRQL; OSIsISR osIsISR; OSGetDriverBlock osGetDriverBlock; -OSInitGpuMgr osInitGpuMgr; - OSSyncWithRmDestroy osSyncWithRmDestroy; OSSyncWithGpuDestroy osSyncWithGpuDestroy; OSModifyGpuSwStatePersistence osModifyGpuSwStatePersistence; -OSPexRecoveryCallback osPexRecoveryCallback; OSHandleDeferredRecovery osHandleDeferredRecovery; OSIsSwPreInitOnly osIsSwPreInitOnly; OSGetCarveoutInfo osGetCarveoutInfo; OSGetVPRInfo osGetVPRInfo; OSAllocInVPR osAllocInVPR; OSGetGenCarveout osGetGenCarveout; -OsGetSystemCpuLogicalCoreCounts osGetSystemCpuLogicalCoreCounts; -OsGetSystemCpuC0AndAPerfCounters osGetSystemCpuC0AndAPerfCounters; -OsEnableCpuPerformanceCounters osEnableCpuPerformanceCounters; -OsCpuDpcObjInit osCpuDpcObjInit; -OsCpuDpcObjQueue osCpuDpcObjQueue; -OsCpuDpcObjFree osCpuDpcObjFree; -OsSystemGetBatteryDrain osSystemGetBatteryDrain; +OSGetSysmemInfo osGetSysmemInfo; OSGC6PowerControl osGC6PowerControl; OSReadPFPciConfigInVF osReadPFPciConfigInVF; @@ -1511,6 +1436,7 @@ extern OSGetTimeoutParams osGetTimeoutParams; // OS-agnostic code. Cross-OS code shouldn't pull in per-OS headers or // per-OS definitions. // +#pragma once #include "os_custom.h" #define NV_SEMA_RELEASE_SUCCEED 0 // lock released, no waiting thread to notify diff --git a/src/nvidia/generated/g_p2p_api_nvoc.c b/src/nvidia/generated/g_p2p_api_nvoc.c index f9af609cd4..b05958c319 100644 --- a/src/nvidia/generated/g_p2p_api_nvoc.c +++ b/src/nvidia/generated/g_p2p_api_nvoc.c @@ -84,90 +84,114 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_P2PApi = /*pExportInfo=*/ &__nvoc_export_info_P2PApi }; -static NvBool __nvoc_thunk_RmResource_p2papiShareCallback(struct P2PApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_P2PApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// 21 up-thunk(s) defined to bridge methods in P2PApi to superclasses + +// p2papiAccessCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_p2papiAccessCallback(struct P2PApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RmResource_p2papiCheckMemInterUnmap(struct P2PApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_P2PApi_RmResource.offset), bSubdeviceHandleProvided); +// p2papiShareCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_p2papiShareCallback(struct P2PApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RsResource_p2papiControl(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControl((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pCallContext, pParams); +// p2papiGetMemInterMapParams: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_p2papiGetMemInterMapParams(struct P2PApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_P2PApi_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RmResource_p2papiGetMemInterMapParams(struct P2PApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_P2PApi_RmResource.offset), pParams); +// p2papiCheckMemInterUnmap: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_p2papiCheckMemInterUnmap(struct P2PApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_P2PApi_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RmResource_p2papiGetMemoryMappingDescriptor(struct P2PApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_P2PApi_RmResource.offset), ppMemDesc); +// p2papiGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_p2papiGetMemoryMappingDescriptor(struct P2PApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_P2PApi_RmResource.offset), ppMemDesc); } -static NvU32 __nvoc_thunk_RsResource_p2papiGetRefCount(struct P2PApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_P2PApi_RsResource.offset)); +// p2papiControlSerialization_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_p2papiControlSerialization_Prologue(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_p2papiControlFilter(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pCallContext, pParams); +// p2papiControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_p2papiControlSerialization_Epilogue(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RmResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_p2papiAddAdditionalDependants(struct RsClient *pClient, struct P2PApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pReference); +// p2papiControl_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_p2papiControl_Prologue(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_p2papiControlSerialization_Prologue(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_P2PApi_RmResource.offset), pCallContext, pParams); +// p2papiControl_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_p2papiControl_Epilogue(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_p2papiControl_Prologue(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_P2PApi_RmResource.offset), pCallContext, pParams); +// p2papiCanCopy: virtual inherited (res) base (rmres) +static NvBool __nvoc_up_thunk_RsResource_p2papiCanCopy(struct P2PApi *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_p2papiCanCopy(struct P2PApi *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_P2PApi_RsResource.offset)); +// p2papiIsDuplicate: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_p2papiIsDuplicate(struct P2PApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_p2papiUnmap(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pCallContext, pCpuMapping); +// p2papiPreDestruct: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_p2papiPreDestruct(struct P2PApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_p2papiIsPartialUnmapSupported(struct P2PApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_P2PApi_RsResource.offset)); +// p2papiControl: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_p2papiControl(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_p2papiPreDestruct(struct P2PApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_P2PApi_RsResource.offset)); +// p2papiControlFilter: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_p2papiControlFilter(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_p2papiMapTo(struct P2PApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pParams); +// p2papiMap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_p2papiMap(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_p2papiIsDuplicate(struct P2PApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_P2PApi_RsResource.offset), hMemory, pDuplicate); +// p2papiUnmap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_p2papiUnmap(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_RmResource_p2papiControlSerialization_Epilogue(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_P2PApi_RmResource.offset), pCallContext, pParams); +// p2papiIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body +static NvBool __nvoc_up_thunk_RsResource_p2papiIsPartialUnmapSupported(struct P2PApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset)); } -static void __nvoc_thunk_RmResource_p2papiControl_Epilogue(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_P2PApi_RmResource.offset), pCallContext, pParams); +// p2papiMapTo: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_p2papiMapTo(struct P2PApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_p2papiUnmapFrom(struct P2PApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pParams); +// p2papiUnmapFrom: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_p2papiUnmapFrom(struct P2PApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_p2papiMap(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pCallContext, pParams, pCpuMapping); +// p2papiGetRefCount: virtual inherited (res) base (rmres) +static NvU32 __nvoc_up_thunk_RsResource_p2papiGetRefCount(struct P2PApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_p2papiAccessCallback(struct P2PApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_P2PApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// p2papiAddAdditionalDependants: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_p2papiAddAdditionalDependants(struct RsClient *pClient, struct P2PApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_P2PApi = { /*numEntries=*/ 0, @@ -204,53 +228,79 @@ NV_STATUS __nvoc_ctor_P2PApi(P2PApi *pThis, struct CALL_CONTEXT * arg_pCallConte return status; } +// Vtable initialization static void __nvoc_init_funcTable_P2PApi_1(P2PApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - pThis->__p2papiShareCallback__ = &__nvoc_thunk_RmResource_p2papiShareCallback; + // p2papiAccessCallback -- virtual inherited (rmres) base (rmres) + pThis->__p2papiAccessCallback__ = &__nvoc_up_thunk_RmResource_p2papiAccessCallback; - pThis->__p2papiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_p2papiCheckMemInterUnmap; + // p2papiShareCallback -- virtual inherited (rmres) base (rmres) + pThis->__p2papiShareCallback__ = &__nvoc_up_thunk_RmResource_p2papiShareCallback; - pThis->__p2papiControl__ = &__nvoc_thunk_RsResource_p2papiControl; + // p2papiGetMemInterMapParams -- virtual inherited (rmres) base (rmres) + pThis->__p2papiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_p2papiGetMemInterMapParams; - pThis->__p2papiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_p2papiGetMemInterMapParams; + // p2papiCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) + pThis->__p2papiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_p2papiCheckMemInterUnmap; - pThis->__p2papiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_p2papiGetMemoryMappingDescriptor; + // p2papiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) + pThis->__p2papiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_p2papiGetMemoryMappingDescriptor; - pThis->__p2papiGetRefCount__ = &__nvoc_thunk_RsResource_p2papiGetRefCount; + // p2papiControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__p2papiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_p2papiControlSerialization_Prologue; - pThis->__p2papiControlFilter__ = &__nvoc_thunk_RsResource_p2papiControlFilter; + // p2papiControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__p2papiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_p2papiControlSerialization_Epilogue; - pThis->__p2papiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_p2papiAddAdditionalDependants; + // p2papiControl_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__p2papiControl_Prologue__ = &__nvoc_up_thunk_RmResource_p2papiControl_Prologue; - pThis->__p2papiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_p2papiControlSerialization_Prologue; + // p2papiControl_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__p2papiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_p2papiControl_Epilogue; - pThis->__p2papiControl_Prologue__ = &__nvoc_thunk_RmResource_p2papiControl_Prologue; + // p2papiCanCopy -- virtual inherited (res) base (rmres) + pThis->__p2papiCanCopy__ = &__nvoc_up_thunk_RsResource_p2papiCanCopy; - pThis->__p2papiCanCopy__ = &__nvoc_thunk_RsResource_p2papiCanCopy; + // p2papiIsDuplicate -- virtual inherited (res) base (rmres) + pThis->__p2papiIsDuplicate__ = &__nvoc_up_thunk_RsResource_p2papiIsDuplicate; - pThis->__p2papiUnmap__ = &__nvoc_thunk_RsResource_p2papiUnmap; + // p2papiPreDestruct -- virtual inherited (res) base (rmres) + pThis->__p2papiPreDestruct__ = &__nvoc_up_thunk_RsResource_p2papiPreDestruct; - pThis->__p2papiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_p2papiIsPartialUnmapSupported; + // p2papiControl -- virtual inherited (res) base (rmres) + pThis->__p2papiControl__ = &__nvoc_up_thunk_RsResource_p2papiControl; - pThis->__p2papiPreDestruct__ = &__nvoc_thunk_RsResource_p2papiPreDestruct; + // p2papiControlFilter -- virtual inherited (res) base (rmres) + pThis->__p2papiControlFilter__ = &__nvoc_up_thunk_RsResource_p2papiControlFilter; - pThis->__p2papiMapTo__ = &__nvoc_thunk_RsResource_p2papiMapTo; + // p2papiMap -- virtual inherited (res) base (rmres) + pThis->__p2papiMap__ = &__nvoc_up_thunk_RsResource_p2papiMap; - pThis->__p2papiIsDuplicate__ = &__nvoc_thunk_RsResource_p2papiIsDuplicate; + // p2papiUnmap -- virtual inherited (res) base (rmres) + pThis->__p2papiUnmap__ = &__nvoc_up_thunk_RsResource_p2papiUnmap; - pThis->__p2papiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_p2papiControlSerialization_Epilogue; + // p2papiIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body + pThis->__p2papiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_p2papiIsPartialUnmapSupported; - pThis->__p2papiControl_Epilogue__ = &__nvoc_thunk_RmResource_p2papiControl_Epilogue; + // p2papiMapTo -- virtual inherited (res) base (rmres) + pThis->__p2papiMapTo__ = &__nvoc_up_thunk_RsResource_p2papiMapTo; - pThis->__p2papiUnmapFrom__ = &__nvoc_thunk_RsResource_p2papiUnmapFrom; + // p2papiUnmapFrom -- virtual inherited (res) base (rmres) + pThis->__p2papiUnmapFrom__ = &__nvoc_up_thunk_RsResource_p2papiUnmapFrom; - pThis->__p2papiMap__ = &__nvoc_thunk_RsResource_p2papiMap; + // p2papiGetRefCount -- virtual inherited (res) base (rmres) + pThis->__p2papiGetRefCount__ = &__nvoc_up_thunk_RsResource_p2papiGetRefCount; - pThis->__p2papiAccessCallback__ = &__nvoc_thunk_RmResource_p2papiAccessCallback; -} + // p2papiAddAdditionalDependants -- virtual inherited (res) base (rmres) + pThis->__p2papiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_p2papiAddAdditionalDependants; +} // End __nvoc_init_funcTable_P2PApi_1 with approximately 21 basic block(s). + +// Initialize vtable(s) for 21 virtual method(s). void __nvoc_init_funcTable_P2PApi(P2PApi *pThis) { + + // Initialize vtable(s) with 21 per-object function pointer(s). __nvoc_init_funcTable_P2PApi_1(pThis); } diff --git a/src/nvidia/generated/g_p2p_api_nvoc.h b/src/nvidia/generated/g_p2p_api_nvoc.h index fc987c734b..0ae0173788 100644 --- a/src/nvidia/generated/g_p2p_api_nvoc.h +++ b/src/nvidia/generated/g_p2p_api_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_P2P_API_NVOC_H_ #define _G_P2P_API_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2009-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2009-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_p2p_api_nvoc.h" @@ -66,35 +74,46 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct P2PApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct P2PApi *__nvoc_pbase_P2PApi; - NvBool (*__p2papiShareCallback__)(struct P2PApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__p2papiCheckMemInterUnmap__)(struct P2PApi *, NvBool); - NV_STATUS (*__p2papiControl__)(struct P2PApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__p2papiGetMemInterMapParams__)(struct P2PApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__p2papiGetMemoryMappingDescriptor__)(struct P2PApi *, struct MEMORY_DESCRIPTOR **); - NvU32 (*__p2papiGetRefCount__)(struct P2PApi *); - NV_STATUS (*__p2papiControlFilter__)(struct P2PApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__p2papiAddAdditionalDependants__)(struct RsClient *, struct P2PApi *, RsResourceRef *); - NV_STATUS (*__p2papiControlSerialization_Prologue__)(struct P2PApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__p2papiControl_Prologue__)(struct P2PApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__p2papiCanCopy__)(struct P2PApi *); - NV_STATUS (*__p2papiUnmap__)(struct P2PApi *, struct CALL_CONTEXT *, RsCpuMapping *); - NvBool (*__p2papiIsPartialUnmapSupported__)(struct P2PApi *); - void (*__p2papiPreDestruct__)(struct P2PApi *); - NV_STATUS (*__p2papiMapTo__)(struct P2PApi *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__p2papiIsDuplicate__)(struct P2PApi *, NvHandle, NvBool *); - void (*__p2papiControlSerialization_Epilogue__)(struct P2PApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__p2papiControl_Epilogue__)(struct P2PApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__p2papiUnmapFrom__)(struct P2PApi *, RS_RES_UNMAP_FROM_PARAMS *); - NV_STATUS (*__p2papiMap__)(struct P2PApi *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__p2papiAccessCallback__)(struct P2PApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^3 + struct RsResource *__nvoc_pbase_RsResource; // res super^2 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^2 + struct RmResource *__nvoc_pbase_RmResource; // rmres super + struct P2PApi *__nvoc_pbase_P2PApi; // p2papi + + // Vtable with 21 per-object function pointers + NvBool (*__p2papiAccessCallback__)(struct P2PApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) + NvBool (*__p2papiShareCallback__)(struct P2PApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__p2papiGetMemInterMapParams__)(struct P2PApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__p2papiCheckMemInterUnmap__)(struct P2PApi * /*this*/, NvBool); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__p2papiGetMemoryMappingDescriptor__)(struct P2PApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__p2papiControlSerialization_Prologue__)(struct P2PApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__p2papiControlSerialization_Epilogue__)(struct P2PApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__p2papiControl_Prologue__)(struct P2PApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__p2papiControl_Epilogue__)(struct P2PApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NvBool (*__p2papiCanCopy__)(struct P2PApi * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__p2papiIsDuplicate__)(struct P2PApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (rmres) + void (*__p2papiPreDestruct__)(struct P2PApi * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__p2papiControl__)(struct P2PApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__p2papiControlFilter__)(struct P2PApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__p2papiMap__)(struct P2PApi * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NV_STATUS (*__p2papiUnmap__)(struct P2PApi * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NvBool (*__p2papiIsPartialUnmapSupported__)(struct P2PApi * /*this*/); // inline virtual inherited (res) base (rmres) body + NV_STATUS (*__p2papiMapTo__)(struct P2PApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) + NV_STATUS (*__p2papiUnmapFrom__)(struct P2PApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) + NvU32 (*__p2papiGetRefCount__)(struct P2PApi * /*this*/); // virtual inherited (res) base (rmres) + void (*__p2papiAddAdditionalDependants__)(struct RsClient *, struct P2PApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) + + // Data members struct OBJGPU *peer1; struct OBJGPU *peer2; NvU32 localGfid; @@ -115,6 +134,7 @@ typedef struct P2PApi P2PApi; #define __nvoc_class_id_P2PApi 0x3982b7 #endif /* __nvoc_class_id_P2PApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_P2PApi; #define __staticCast_P2PApi(pThis) \ @@ -127,116 +147,140 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_P2PApi; ((P2PApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(P2PApi))) #endif //__nvoc_p2p_api_h_disabled - NV_STATUS __nvoc_objCreateDynamic_P2PApi(P2PApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_P2PApi(P2PApi**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_P2PApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_P2PApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define p2papiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define p2papiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) p2papiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define p2papiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ #define p2papiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) p2papiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define p2papiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) p2papiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define p2papiControl(pResource, pCallContext, pParams) p2papiControl_DISPATCH(pResource, pCallContext, pParams) +#define p2papiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define p2papiGetMemInterMapParams(pRmResource, pParams) p2papiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define p2papiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define p2papiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) p2papiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define p2papiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define p2papiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) p2papiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define p2papiGetRefCount(pResource) p2papiGetRefCount_DISPATCH(pResource) -#define p2papiControlFilter(pResource, pCallContext, pParams) p2papiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define p2papiAddAdditionalDependants(pClient, pResource, pReference) p2papiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define p2papiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define p2papiControlSerialization_Prologue(pResource, pCallContext, pParams) p2papiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define p2papiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define p2papiControlSerialization_Epilogue(pResource, pCallContext, pParams) p2papiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define p2papiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ #define p2papiControl_Prologue(pResource, pCallContext, pParams) p2papiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define p2papiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define p2papiControl_Epilogue(pResource, pCallContext, pParams) p2papiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define p2papiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define p2papiCanCopy(pResource) p2papiCanCopy_DISPATCH(pResource) +#define p2papiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define p2papiIsDuplicate(pResource, hMemory, pDuplicate) p2papiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define p2papiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define p2papiPreDestruct(pResource) p2papiPreDestruct_DISPATCH(pResource) +#define p2papiControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define p2papiControl(pResource, pCallContext, pParams) p2papiControl_DISPATCH(pResource, pCallContext, pParams) +#define p2papiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define p2papiControlFilter(pResource, pCallContext, pParams) p2papiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define p2papiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define p2papiMap(pResource, pCallContext, pParams, pCpuMapping) p2papiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define p2papiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ #define p2papiUnmap(pResource, pCallContext, pCpuMapping) p2papiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define p2papiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ #define p2papiIsPartialUnmapSupported(pResource) p2papiIsPartialUnmapSupported_DISPATCH(pResource) -#define p2papiPreDestruct(pResource) p2papiPreDestruct_DISPATCH(pResource) +#define p2papiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ #define p2papiMapTo(pResource, pParams) p2papiMapTo_DISPATCH(pResource, pParams) -#define p2papiIsDuplicate(pResource, hMemory, pDuplicate) p2papiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define p2papiControlSerialization_Epilogue(pResource, pCallContext, pParams) p2papiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define p2papiControl_Epilogue(pResource, pCallContext, pParams) p2papiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define p2papiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ #define p2papiUnmapFrom(pResource, pParams) p2papiUnmapFrom_DISPATCH(pResource, pParams) -#define p2papiMap(pResource, pCallContext, pParams, pCpuMapping) p2papiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define p2papiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) p2papiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -static inline NvBool p2papiShareCallback_DISPATCH(struct P2PApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__p2papiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} +#define p2papiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define p2papiGetRefCount(pResource) p2papiGetRefCount_DISPATCH(pResource) +#define p2papiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define p2papiAddAdditionalDependants(pClient, pResource, pReference) p2papiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -static inline NV_STATUS p2papiCheckMemInterUnmap_DISPATCH(struct P2PApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__p2papiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +// Dispatch functions +static inline NvBool p2papiAccessCallback_DISPATCH(struct P2PApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__p2papiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS p2papiControl_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__p2papiControl__(pResource, pCallContext, pParams); +static inline NvBool p2papiShareCallback_DISPATCH(struct P2PApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__p2papiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS p2papiGetMemInterMapParams_DISPATCH(struct P2PApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__p2papiGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS p2papiGetMemoryMappingDescriptor_DISPATCH(struct P2PApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__p2papiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); -} - -static inline NvU32 p2papiGetRefCount_DISPATCH(struct P2PApi *pResource) { - return pResource->__p2papiGetRefCount__(pResource); -} - -static inline NV_STATUS p2papiControlFilter_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__p2papiControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS p2papiCheckMemInterUnmap_DISPATCH(struct P2PApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__p2papiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline void p2papiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct P2PApi *pResource, RsResourceRef *pReference) { - pResource->__p2papiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS p2papiGetMemoryMappingDescriptor_DISPATCH(struct P2PApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__p2papiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS p2papiControlSerialization_Prologue_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__p2papiControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void p2papiControlSerialization_Epilogue_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__p2papiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + static inline NV_STATUS p2papiControl_Prologue_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__p2papiControl_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool p2papiCanCopy_DISPATCH(struct P2PApi *pResource) { - return pResource->__p2papiCanCopy__(pResource); +static inline void p2papiControl_Epilogue_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__p2papiControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS p2papiUnmap_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__p2papiUnmap__(pResource, pCallContext, pCpuMapping); +static inline NvBool p2papiCanCopy_DISPATCH(struct P2PApi *pResource) { + return pResource->__p2papiCanCopy__(pResource); } -static inline NvBool p2papiIsPartialUnmapSupported_DISPATCH(struct P2PApi *pResource) { - return pResource->__p2papiIsPartialUnmapSupported__(pResource); +static inline NV_STATUS p2papiIsDuplicate_DISPATCH(struct P2PApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__p2papiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void p2papiPreDestruct_DISPATCH(struct P2PApi *pResource) { pResource->__p2papiPreDestruct__(pResource); } -static inline NV_STATUS p2papiMapTo_DISPATCH(struct P2PApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__p2papiMapTo__(pResource, pParams); +static inline NV_STATUS p2papiControl_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__p2papiControl__(pResource, pCallContext, pParams); } -static inline NV_STATUS p2papiIsDuplicate_DISPATCH(struct P2PApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__p2papiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS p2papiControlFilter_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__p2papiControlFilter__(pResource, pCallContext, pParams); } -static inline void p2papiControlSerialization_Epilogue_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__p2papiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS p2papiMap_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__p2papiMap__(pResource, pCallContext, pParams, pCpuMapping); } -static inline void p2papiControl_Epilogue_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__p2papiControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS p2papiUnmap_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pResource->__p2papiUnmap__(pResource, pCallContext, pCpuMapping); +} + +static inline NvBool p2papiIsPartialUnmapSupported_DISPATCH(struct P2PApi *pResource) { + return pResource->__p2papiIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS p2papiMapTo_DISPATCH(struct P2PApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__p2papiMapTo__(pResource, pParams); } static inline NV_STATUS p2papiUnmapFrom_DISPATCH(struct P2PApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return pResource->__p2papiUnmapFrom__(pResource, pParams); } -static inline NV_STATUS p2papiMap_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__p2papiMap__(pResource, pCallContext, pParams, pCpuMapping); +static inline NvU32 p2papiGetRefCount_DISPATCH(struct P2PApi *pResource) { + return pResource->__p2papiGetRefCount__(pResource); } -static inline NvBool p2papiAccessCallback_DISPATCH(struct P2PApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__p2papiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline void p2papiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct P2PApi *pResource, RsResourceRef *pReference) { + pResource->__p2papiAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS p2papiConstruct_IMPL(struct P2PApi *arg_pResource, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_phys_mem_nvoc.c b/src/nvidia/generated/g_phys_mem_nvoc.c index 533b51d415..aa58c0a216 100644 --- a/src/nvidia/generated/g_phys_mem_nvoc.c +++ b/src/nvidia/generated/g_phys_mem_nvoc.c @@ -93,110 +93,142 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_PhysicalMemory = /*pExportInfo=*/ &__nvoc_export_info_PhysicalMemory }; -static NvBool __nvoc_thunk_PhysicalMemory_resCanCopy(struct RsResource *pPhysicalMemory) { - return physmemCanCopy((struct PhysicalMemory *)(((unsigned char *)pPhysicalMemory) - __nvoc_rtti_PhysicalMemory_RsResource.offset)); +// 1 down-thunk(s) defined to bridge methods in PhysicalMemory from superclasses + +// physmemCanCopy: virtual override (res) base (mem) +static NvBool __nvoc_down_thunk_PhysicalMemory_resCanCopy(struct RsResource *pPhysicalMemory) { + return physmemCanCopy((struct PhysicalMemory *)(((unsigned char *) pPhysicalMemory) - __nvoc_rtti_PhysicalMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_physmemCheckMemInterUnmap(struct PhysicalMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), bSubdeviceHandleProvided); + +// 25 up-thunk(s) defined to bridge methods in PhysicalMemory to superclasses + +// physmemIsDuplicate: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_physmemIsDuplicate(struct PhysicalMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_RmResource_physmemShareCallback(struct PhysicalMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_PhysicalMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// physmemGetMapAddrSpace: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_physmemGetMapAddrSpace(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_RsResource_physmemMapTo(struct PhysicalMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset), pParams); +// physmemControl: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_physmemControl(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_physmemGetMapAddrSpace(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return memGetMapAddrSpace((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); +// physmemMap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_physmemMap(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } -static NvBool __nvoc_thunk_Memory_physmemIsExportAllowed(struct PhysicalMemory *pMemory) { - return memIsExportAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset)); +// physmemUnmap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_physmemUnmap(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pCallContext, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_physmemGetRefCount(struct PhysicalMemory *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset)); +// physmemGetMemInterMapParams: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_physmemGetMemInterMapParams(struct PhysicalMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pParams); } -static void __nvoc_thunk_RsResource_physmemAddAdditionalDependants(struct RsClient *pClient, struct PhysicalMemory *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset), pReference); +// physmemCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_physmemCheckMemInterUnmap(struct PhysicalMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RmResource_physmemControl_Prologue(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_PhysicalMemory_RmResource.offset), pCallContext, pParams); +// physmemGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_physmemGetMemoryMappingDescriptor(struct PhysicalMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), ppMemDesc); } -static NvBool __nvoc_thunk_Memory_physmemIsGpuMapAllowed(struct PhysicalMemory *pMemory, struct OBJGPU *pGpu) { - return memIsGpuMapAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pGpu); +// physmemCheckCopyPermissions: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_physmemCheckCopyPermissions(struct PhysicalMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pDstGpu, pDstDevice); } -static NV_STATUS __nvoc_thunk_RsResource_physmemUnmapFrom(struct PhysicalMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset), pParams); +// physmemIsReady: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_physmemIsReady(struct PhysicalMemory *pMemory, NvBool bCopyConstructorContext) { + return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), bCopyConstructorContext); } -static void __nvoc_thunk_RmResource_physmemControl_Epilogue(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_PhysicalMemory_RmResource.offset), pCallContext, pParams); +// physmemIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_physmemIsGpuMapAllowed(struct PhysicalMemory *pMemory, struct OBJGPU *pGpu) { + return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pGpu); } -static NV_STATUS __nvoc_thunk_Memory_physmemControl(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memControl((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pCallContext, pParams); +// physmemIsExportAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_physmemIsExportAllowed(struct PhysicalMemory *pMemory) { + return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset)); } -static NV_STATUS __nvoc_thunk_Memory_physmemUnmap(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pCallContext, pCpuMapping); +// physmemAccessCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_physmemAccessCallback(struct PhysicalMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_Memory_physmemGetMemInterMapParams(struct PhysicalMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pParams); +// physmemShareCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_physmemShareCallback(struct PhysicalMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_Memory_physmemGetMemoryMappingDescriptor(struct PhysicalMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), ppMemDesc); +// physmemControlSerialization_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_physmemControlSerialization_Prologue(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_physmemControlFilter(struct PhysicalMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset), pCallContext, pParams); +// physmemControlSerialization_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_physmemControlSerialization_Epilogue(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_physmemControlSerialization_Prologue(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_PhysicalMemory_RmResource.offset), pCallContext, pParams); +// physmemControl_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_physmemControl_Prologue(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_physmemIsPartialUnmapSupported(struct PhysicalMemory *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset)); +// physmemControl_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_physmemControl_Epilogue(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_physmemIsReady(struct PhysicalMemory *pMemory, NvBool bCopyConstructorContext) { - return memIsReady((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), bCopyConstructorContext); +// physmemPreDestruct: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_physmemPreDestruct(struct PhysicalMemory *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_physmemCheckCopyPermissions(struct PhysicalMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return memCheckCopyPermissions((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pDstGpu, pDstDevice); +// physmemControlFilter: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_physmemControlFilter(struct PhysicalMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_physmemPreDestruct(struct PhysicalMemory *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset)); +// physmemIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body +static NvBool __nvoc_up_thunk_RsResource_physmemIsPartialUnmapSupported(struct PhysicalMemory *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_physmemIsDuplicate(struct PhysicalMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), hMemory, pDuplicate); +// physmemMapTo: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_physmemMapTo(struct PhysicalMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_physmemControlSerialization_Epilogue(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_PhysicalMemory_RmResource.offset), pCallContext, pParams); +// physmemUnmapFrom: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_physmemUnmapFrom(struct PhysicalMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_Memory_physmemMap(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pCallContext, pParams, pCpuMapping); +// physmemGetRefCount: virtual inherited (res) base (mem) +static NvU32 __nvoc_up_thunk_RsResource_physmemGetRefCount(struct PhysicalMemory *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_physmemAccessCallback(struct PhysicalMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_PhysicalMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// physmemAddAdditionalDependants: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_physmemAddAdditionalDependants(struct RsClient *pClient, struct PhysicalMemory *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_PhysicalMemory = { /*numEntries=*/ 0, @@ -232,65 +264,95 @@ NV_STATUS __nvoc_ctor_PhysicalMemory(PhysicalMemory *pThis, CALL_CONTEXT * arg_p return status; } +// Vtable initialization static void __nvoc_init_funcTable_PhysicalMemory_1(PhysicalMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // physmemCanCopy -- virtual override (res) base (mem) pThis->__physmemCanCopy__ = &physmemCanCopy_IMPL; + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_PhysicalMemory_resCanCopy; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_PhysicalMemory_resCanCopy; + // physmemIsDuplicate -- virtual inherited (mem) base (mem) + pThis->__physmemIsDuplicate__ = &__nvoc_up_thunk_Memory_physmemIsDuplicate; - pThis->__physmemCheckMemInterUnmap__ = &__nvoc_thunk_Memory_physmemCheckMemInterUnmap; + // physmemGetMapAddrSpace -- virtual inherited (mem) base (mem) + pThis->__physmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_physmemGetMapAddrSpace; - pThis->__physmemShareCallback__ = &__nvoc_thunk_RmResource_physmemShareCallback; + // physmemControl -- virtual inherited (mem) base (mem) + pThis->__physmemControl__ = &__nvoc_up_thunk_Memory_physmemControl; - pThis->__physmemMapTo__ = &__nvoc_thunk_RsResource_physmemMapTo; + // physmemMap -- virtual inherited (mem) base (mem) + pThis->__physmemMap__ = &__nvoc_up_thunk_Memory_physmemMap; - pThis->__physmemGetMapAddrSpace__ = &__nvoc_thunk_Memory_physmemGetMapAddrSpace; + // physmemUnmap -- virtual inherited (mem) base (mem) + pThis->__physmemUnmap__ = &__nvoc_up_thunk_Memory_physmemUnmap; - pThis->__physmemIsExportAllowed__ = &__nvoc_thunk_Memory_physmemIsExportAllowed; + // physmemGetMemInterMapParams -- virtual inherited (mem) base (mem) + pThis->__physmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_physmemGetMemInterMapParams; - pThis->__physmemGetRefCount__ = &__nvoc_thunk_RsResource_physmemGetRefCount; + // physmemCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body + pThis->__physmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_physmemCheckMemInterUnmap; - pThis->__physmemAddAdditionalDependants__ = &__nvoc_thunk_RsResource_physmemAddAdditionalDependants; + // physmemGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) + pThis->__physmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_physmemGetMemoryMappingDescriptor; - pThis->__physmemControl_Prologue__ = &__nvoc_thunk_RmResource_physmemControl_Prologue; + // physmemCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body + pThis->__physmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_physmemCheckCopyPermissions; - pThis->__physmemIsGpuMapAllowed__ = &__nvoc_thunk_Memory_physmemIsGpuMapAllowed; + // physmemIsReady -- virtual inherited (mem) base (mem) + pThis->__physmemIsReady__ = &__nvoc_up_thunk_Memory_physmemIsReady; - pThis->__physmemUnmapFrom__ = &__nvoc_thunk_RsResource_physmemUnmapFrom; + // physmemIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__physmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_physmemIsGpuMapAllowed; - pThis->__physmemControl_Epilogue__ = &__nvoc_thunk_RmResource_physmemControl_Epilogue; + // physmemIsExportAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__physmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_physmemIsExportAllowed; - pThis->__physmemControl__ = &__nvoc_thunk_Memory_physmemControl; + // physmemAccessCallback -- virtual inherited (rmres) base (mem) + pThis->__physmemAccessCallback__ = &__nvoc_up_thunk_RmResource_physmemAccessCallback; - pThis->__physmemUnmap__ = &__nvoc_thunk_Memory_physmemUnmap; + // physmemShareCallback -- virtual inherited (rmres) base (mem) + pThis->__physmemShareCallback__ = &__nvoc_up_thunk_RmResource_physmemShareCallback; - pThis->__physmemGetMemInterMapParams__ = &__nvoc_thunk_Memory_physmemGetMemInterMapParams; + // physmemControlSerialization_Prologue -- virtual inherited (rmres) base (mem) + pThis->__physmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_physmemControlSerialization_Prologue; - pThis->__physmemGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_physmemGetMemoryMappingDescriptor; + // physmemControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__physmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_physmemControlSerialization_Epilogue; - pThis->__physmemControlFilter__ = &__nvoc_thunk_RsResource_physmemControlFilter; + // physmemControl_Prologue -- virtual inherited (rmres) base (mem) + pThis->__physmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_physmemControl_Prologue; - pThis->__physmemControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_physmemControlSerialization_Prologue; + // physmemControl_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__physmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_physmemControl_Epilogue; - pThis->__physmemIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_physmemIsPartialUnmapSupported; + // physmemPreDestruct -- virtual inherited (res) base (mem) + pThis->__physmemPreDestruct__ = &__nvoc_up_thunk_RsResource_physmemPreDestruct; - pThis->__physmemIsReady__ = &__nvoc_thunk_Memory_physmemIsReady; + // physmemControlFilter -- virtual inherited (res) base (mem) + pThis->__physmemControlFilter__ = &__nvoc_up_thunk_RsResource_physmemControlFilter; - pThis->__physmemCheckCopyPermissions__ = &__nvoc_thunk_Memory_physmemCheckCopyPermissions; + // physmemIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body + pThis->__physmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_physmemIsPartialUnmapSupported; - pThis->__physmemPreDestruct__ = &__nvoc_thunk_RsResource_physmemPreDestruct; + // physmemMapTo -- virtual inherited (res) base (mem) + pThis->__physmemMapTo__ = &__nvoc_up_thunk_RsResource_physmemMapTo; - pThis->__physmemIsDuplicate__ = &__nvoc_thunk_Memory_physmemIsDuplicate; + // physmemUnmapFrom -- virtual inherited (res) base (mem) + pThis->__physmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_physmemUnmapFrom; - pThis->__physmemControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_physmemControlSerialization_Epilogue; + // physmemGetRefCount -- virtual inherited (res) base (mem) + pThis->__physmemGetRefCount__ = &__nvoc_up_thunk_RsResource_physmemGetRefCount; - pThis->__physmemMap__ = &__nvoc_thunk_Memory_physmemMap; + // physmemAddAdditionalDependants -- virtual inherited (res) base (mem) + pThis->__physmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_physmemAddAdditionalDependants; +} // End __nvoc_init_funcTable_PhysicalMemory_1 with approximately 27 basic block(s). - pThis->__physmemAccessCallback__ = &__nvoc_thunk_RmResource_physmemAccessCallback; -} +// Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_PhysicalMemory(PhysicalMemory *pThis) { + + // Initialize vtable(s) with 26 per-object function pointer(s). __nvoc_init_funcTable_PhysicalMemory_1(pThis); } diff --git a/src/nvidia/generated/g_phys_mem_nvoc.h b/src/nvidia/generated/g_phys_mem_nvoc.h index caec4c32aa..cbb7800693 100644 --- a/src/nvidia/generated/g_phys_mem_nvoc.h +++ b/src/nvidia/generated/g_phys_mem_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_PHYS_MEM_NVOC_H_ #define _G_PHYS_MEM_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_phys_mem_nvoc.h" #ifndef _PHYSICAL_MEMORY_H_ @@ -51,41 +59,50 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct PhysicalMemory { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Memory *__nvoc_pbase_Memory; - struct PhysicalMemory *__nvoc_pbase_PhysicalMemory; - NvBool (*__physmemCanCopy__)(struct PhysicalMemory *); - NV_STATUS (*__physmemCheckMemInterUnmap__)(struct PhysicalMemory *, NvBool); - NvBool (*__physmemShareCallback__)(struct PhysicalMemory *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__physmemMapTo__)(struct PhysicalMemory *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__physmemGetMapAddrSpace__)(struct PhysicalMemory *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvBool (*__physmemIsExportAllowed__)(struct PhysicalMemory *); - NvU32 (*__physmemGetRefCount__)(struct PhysicalMemory *); - void (*__physmemAddAdditionalDependants__)(struct RsClient *, struct PhysicalMemory *, RsResourceRef *); - NV_STATUS (*__physmemControl_Prologue__)(struct PhysicalMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__physmemIsGpuMapAllowed__)(struct PhysicalMemory *, struct OBJGPU *); - NV_STATUS (*__physmemUnmapFrom__)(struct PhysicalMemory *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__physmemControl_Epilogue__)(struct PhysicalMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__physmemControl__)(struct PhysicalMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__physmemUnmap__)(struct PhysicalMemory *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__physmemGetMemInterMapParams__)(struct PhysicalMemory *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__physmemGetMemoryMappingDescriptor__)(struct PhysicalMemory *, MEMORY_DESCRIPTOR **); - NV_STATUS (*__physmemControlFilter__)(struct PhysicalMemory *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__physmemControlSerialization_Prologue__)(struct PhysicalMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__physmemIsPartialUnmapSupported__)(struct PhysicalMemory *); - NV_STATUS (*__physmemIsReady__)(struct PhysicalMemory *, NvBool); - NV_STATUS (*__physmemCheckCopyPermissions__)(struct PhysicalMemory *, struct OBJGPU *, struct Device *); - void (*__physmemPreDestruct__)(struct PhysicalMemory *); - NV_STATUS (*__physmemIsDuplicate__)(struct PhysicalMemory *, NvHandle, NvBool *); - void (*__physmemControlSerialization_Epilogue__)(struct PhysicalMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__physmemMap__)(struct PhysicalMemory *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__physmemAccessCallback__)(struct PhysicalMemory *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct Memory *__nvoc_pbase_Memory; // mem super + struct PhysicalMemory *__nvoc_pbase_PhysicalMemory; // physmem + + // Vtable with 26 per-object function pointers + NvBool (*__physmemCanCopy__)(struct PhysicalMemory * /*this*/); // virtual override (res) base (mem) + NV_STATUS (*__physmemIsDuplicate__)(struct PhysicalMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) + NV_STATUS (*__physmemGetMapAddrSpace__)(struct PhysicalMemory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) + NV_STATUS (*__physmemControl__)(struct PhysicalMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (mem) base (mem) + NV_STATUS (*__physmemMap__)(struct PhysicalMemory * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__physmemUnmap__)(struct PhysicalMemory * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__physmemGetMemInterMapParams__)(struct PhysicalMemory * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (mem) base (mem) + NV_STATUS (*__physmemCheckMemInterUnmap__)(struct PhysicalMemory * /*this*/, NvBool); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__physmemGetMemoryMappingDescriptor__)(struct PhysicalMemory * /*this*/, MEMORY_DESCRIPTOR **); // virtual inherited (mem) base (mem) + NV_STATUS (*__physmemCheckCopyPermissions__)(struct PhysicalMemory * /*this*/, struct OBJGPU *, struct Device *); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__physmemIsReady__)(struct PhysicalMemory * /*this*/, NvBool); // virtual inherited (mem) base (mem) + NvBool (*__physmemIsGpuMapAllowed__)(struct PhysicalMemory * /*this*/, struct OBJGPU *); // inline virtual inherited (mem) base (mem) body + NvBool (*__physmemIsExportAllowed__)(struct PhysicalMemory * /*this*/); // inline virtual inherited (mem) base (mem) body + NvBool (*__physmemAccessCallback__)(struct PhysicalMemory * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (mem) + NvBool (*__physmemShareCallback__)(struct PhysicalMemory * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__physmemControlSerialization_Prologue__)(struct PhysicalMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__physmemControlSerialization_Epilogue__)(struct PhysicalMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__physmemControl_Prologue__)(struct PhysicalMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__physmemControl_Epilogue__)(struct PhysicalMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__physmemPreDestruct__)(struct PhysicalMemory * /*this*/); // virtual inherited (res) base (mem) + NV_STATUS (*__physmemControlFilter__)(struct PhysicalMemory * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (mem) + NvBool (*__physmemIsPartialUnmapSupported__)(struct PhysicalMemory * /*this*/); // inline virtual inherited (res) base (mem) body + NV_STATUS (*__physmemMapTo__)(struct PhysicalMemory * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (mem) + NV_STATUS (*__physmemUnmapFrom__)(struct PhysicalMemory * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (mem) + NvU32 (*__physmemGetRefCount__)(struct PhysicalMemory * /*this*/); // virtual inherited (res) base (mem) + void (*__physmemAddAdditionalDependants__)(struct RsClient *, struct PhysicalMemory * /*this*/, RsResourceRef *); // virtual inherited (res) base (mem) }; #ifndef __NVOC_CLASS_PhysicalMemory_TYPEDEF__ @@ -97,6 +114,7 @@ typedef struct PhysicalMemory PhysicalMemory; #define __nvoc_class_id_PhysicalMemory 0x5fccf2 #endif /* __nvoc_class_id_PhysicalMemory */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_PhysicalMemory; #define __staticCast_PhysicalMemory(pThis) \ @@ -109,145 +127,174 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_PhysicalMemory; ((PhysicalMemory*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(PhysicalMemory))) #endif //__nvoc_phys_mem_h_disabled - NV_STATUS __nvoc_objCreateDynamic_PhysicalMemory(PhysicalMemory**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_PhysicalMemory(PhysicalMemory**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_PhysicalMemory(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_PhysicalMemory((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define physmemCanCopy_FNPTR(pPhysicalMemory) pPhysicalMemory->__physmemCanCopy__ #define physmemCanCopy(pPhysicalMemory) physmemCanCopy_DISPATCH(pPhysicalMemory) -#define physmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) physmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define physmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) physmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define physmemMapTo(pResource, pParams) physmemMapTo_DISPATCH(pResource, pParams) +#define physmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define physmemIsDuplicate(pMemory, hMemory, pDuplicate) physmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) +#define physmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ #define physmemGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) physmemGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define physmemIsExportAllowed(pMemory) physmemIsExportAllowed_DISPATCH(pMemory) -#define physmemGetRefCount(pResource) physmemGetRefCount_DISPATCH(pResource) -#define physmemAddAdditionalDependants(pClient, pResource, pReference) physmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define physmemControl_Prologue(pResource, pCallContext, pParams) physmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define physmemIsGpuMapAllowed(pMemory, pGpu) physmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define physmemUnmapFrom(pResource, pParams) physmemUnmapFrom_DISPATCH(pResource, pParams) -#define physmemControl_Epilogue(pResource, pCallContext, pParams) physmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define physmemControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ #define physmemControl(pMemory, pCallContext, pParams) physmemControl_DISPATCH(pMemory, pCallContext, pParams) +#define physmemMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define physmemMap(pMemory, pCallContext, pParams, pCpuMapping) physmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define physmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ #define physmemUnmap(pMemory, pCallContext, pCpuMapping) physmemUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) +#define physmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ #define physmemGetMemInterMapParams(pMemory, pParams) physmemGetMemInterMapParams_DISPATCH(pMemory, pParams) +#define physmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define physmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) physmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) +#define physmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ #define physmemGetMemoryMappingDescriptor(pMemory, ppMemDesc) physmemGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define physmemControlFilter(pResource, pCallContext, pParams) physmemControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define physmemControlSerialization_Prologue(pResource, pCallContext, pParams) physmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define physmemIsPartialUnmapSupported(pResource) physmemIsPartialUnmapSupported_DISPATCH(pResource) -#define physmemIsReady(pMemory, bCopyConstructorContext) physmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define physmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ #define physmemCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) physmemCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define physmemPreDestruct(pResource) physmemPreDestruct_DISPATCH(pResource) -#define physmemIsDuplicate(pMemory, hMemory, pDuplicate) physmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define physmemControlSerialization_Epilogue(pResource, pCallContext, pParams) physmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define physmemMap(pMemory, pCallContext, pParams, pCpuMapping) physmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define physmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define physmemIsReady(pMemory, bCopyConstructorContext) physmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define physmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define physmemIsGpuMapAllowed(pMemory, pGpu) physmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) +#define physmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define physmemIsExportAllowed(pMemory) physmemIsExportAllowed_DISPATCH(pMemory) +#define physmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ #define physmemAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) physmemAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool physmemCanCopy_IMPL(struct PhysicalMemory *pPhysicalMemory); +#define physmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define physmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) physmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define physmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define physmemControlSerialization_Prologue(pResource, pCallContext, pParams) physmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define physmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define physmemControlSerialization_Epilogue(pResource, pCallContext, pParams) physmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define physmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define physmemControl_Prologue(pResource, pCallContext, pParams) physmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define physmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define physmemControl_Epilogue(pResource, pCallContext, pParams) physmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define physmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define physmemPreDestruct(pResource) physmemPreDestruct_DISPATCH(pResource) +#define physmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define physmemControlFilter(pResource, pCallContext, pParams) physmemControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define physmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define physmemIsPartialUnmapSupported(pResource) physmemIsPartialUnmapSupported_DISPATCH(pResource) +#define physmemMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define physmemMapTo(pResource, pParams) physmemMapTo_DISPATCH(pResource, pParams) +#define physmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define physmemUnmapFrom(pResource, pParams) physmemUnmapFrom_DISPATCH(pResource, pParams) +#define physmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define physmemGetRefCount(pResource) physmemGetRefCount_DISPATCH(pResource) +#define physmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define physmemAddAdditionalDependants(pClient, pResource, pReference) physmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NvBool physmemCanCopy_DISPATCH(struct PhysicalMemory *pPhysicalMemory) { return pPhysicalMemory->__physmemCanCopy__(pPhysicalMemory); } -static inline NV_STATUS physmemCheckMemInterUnmap_DISPATCH(struct PhysicalMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__physmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); -} - -static inline NvBool physmemShareCallback_DISPATCH(struct PhysicalMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__physmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS physmemMapTo_DISPATCH(struct PhysicalMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__physmemMapTo__(pResource, pParams); +static inline NV_STATUS physmemIsDuplicate_DISPATCH(struct PhysicalMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return pMemory->__physmemIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS physmemGetMapAddrSpace_DISPATCH(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pMemory->__physmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } -static inline NvBool physmemIsExportAllowed_DISPATCH(struct PhysicalMemory *pMemory) { - return pMemory->__physmemIsExportAllowed__(pMemory); +static inline NV_STATUS physmemControl_DISPATCH(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pMemory->__physmemControl__(pMemory, pCallContext, pParams); } -static inline NvU32 physmemGetRefCount_DISPATCH(struct PhysicalMemory *pResource) { - return pResource->__physmemGetRefCount__(pResource); +static inline NV_STATUS physmemMap_DISPATCH(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pMemory->__physmemMap__(pMemory, pCallContext, pParams, pCpuMapping); } -static inline void physmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct PhysicalMemory *pResource, RsResourceRef *pReference) { - pResource->__physmemAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS physmemUnmap_DISPATCH(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pMemory->__physmemUnmap__(pMemory, pCallContext, pCpuMapping); } -static inline NV_STATUS physmemControl_Prologue_DISPATCH(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__physmemControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS physmemGetMemInterMapParams_DISPATCH(struct PhysicalMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pMemory->__physmemGetMemInterMapParams__(pMemory, pParams); } -static inline NvBool physmemIsGpuMapAllowed_DISPATCH(struct PhysicalMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__physmemIsGpuMapAllowed__(pMemory, pGpu); +static inline NV_STATUS physmemCheckMemInterUnmap_DISPATCH(struct PhysicalMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return pMemory->__physmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } -static inline NV_STATUS physmemUnmapFrom_DISPATCH(struct PhysicalMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__physmemUnmapFrom__(pResource, pParams); +static inline NV_STATUS physmemGetMemoryMappingDescriptor_DISPATCH(struct PhysicalMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return pMemory->__physmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } -static inline void physmemControl_Epilogue_DISPATCH(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__physmemControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS physmemCheckCopyPermissions_DISPATCH(struct PhysicalMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return pMemory->__physmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } -static inline NV_STATUS physmemControl_DISPATCH(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__physmemControl__(pMemory, pCallContext, pParams); +static inline NV_STATUS physmemIsReady_DISPATCH(struct PhysicalMemory *pMemory, NvBool bCopyConstructorContext) { + return pMemory->__physmemIsReady__(pMemory, bCopyConstructorContext); } -static inline NV_STATUS physmemUnmap_DISPATCH(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__physmemUnmap__(pMemory, pCallContext, pCpuMapping); +static inline NvBool physmemIsGpuMapAllowed_DISPATCH(struct PhysicalMemory *pMemory, struct OBJGPU *pGpu) { + return pMemory->__physmemIsGpuMapAllowed__(pMemory, pGpu); } -static inline NV_STATUS physmemGetMemInterMapParams_DISPATCH(struct PhysicalMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__physmemGetMemInterMapParams__(pMemory, pParams); +static inline NvBool physmemIsExportAllowed_DISPATCH(struct PhysicalMemory *pMemory) { + return pMemory->__physmemIsExportAllowed__(pMemory); } -static inline NV_STATUS physmemGetMemoryMappingDescriptor_DISPATCH(struct PhysicalMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__physmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); +static inline NvBool physmemAccessCallback_DISPATCH(struct PhysicalMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__physmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS physmemControlFilter_DISPATCH(struct PhysicalMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__physmemControlFilter__(pResource, pCallContext, pParams); +static inline NvBool physmemShareCallback_DISPATCH(struct PhysicalMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__physmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS physmemControlSerialization_Prologue_DISPATCH(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__physmemControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool physmemIsPartialUnmapSupported_DISPATCH(struct PhysicalMemory *pResource) { - return pResource->__physmemIsPartialUnmapSupported__(pResource); +static inline void physmemControlSerialization_Epilogue_DISPATCH(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__physmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS physmemIsReady_DISPATCH(struct PhysicalMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__physmemIsReady__(pMemory, bCopyConstructorContext); +static inline NV_STATUS physmemControl_Prologue_DISPATCH(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__physmemControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS physmemCheckCopyPermissions_DISPATCH(struct PhysicalMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__physmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); +static inline void physmemControl_Epilogue_DISPATCH(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__physmemControl_Epilogue__(pResource, pCallContext, pParams); } static inline void physmemPreDestruct_DISPATCH(struct PhysicalMemory *pResource) { pResource->__physmemPreDestruct__(pResource); } -static inline NV_STATUS physmemIsDuplicate_DISPATCH(struct PhysicalMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__physmemIsDuplicate__(pMemory, hMemory, pDuplicate); +static inline NV_STATUS physmemControlFilter_DISPATCH(struct PhysicalMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__physmemControlFilter__(pResource, pCallContext, pParams); } -static inline void physmemControlSerialization_Epilogue_DISPATCH(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__physmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool physmemIsPartialUnmapSupported_DISPATCH(struct PhysicalMemory *pResource) { + return pResource->__physmemIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS physmemMap_DISPATCH(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__physmemMap__(pMemory, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS physmemMapTo_DISPATCH(struct PhysicalMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__physmemMapTo__(pResource, pParams); } -static inline NvBool physmemAccessCallback_DISPATCH(struct PhysicalMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__physmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS physmemUnmapFrom_DISPATCH(struct PhysicalMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__physmemUnmapFrom__(pResource, pParams); } +static inline NvU32 physmemGetRefCount_DISPATCH(struct PhysicalMemory *pResource) { + return pResource->__physmemGetRefCount__(pResource); +} + +static inline void physmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct PhysicalMemory *pResource, RsResourceRef *pReference) { + pResource->__physmemAddAdditionalDependants__(pClient, pResource, pReference); +} + +NvBool physmemCanCopy_IMPL(struct PhysicalMemory *pPhysicalMemory); + NV_STATUS physmemConstruct_IMPL(struct PhysicalMemory *arg_pPhysicalMemory, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_physmemConstruct(arg_pPhysicalMemory, arg_pCallContext, arg_pParams) physmemConstruct_IMPL(arg_pPhysicalMemory, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_platform_nvoc.c b/src/nvidia/generated/g_platform_nvoc.c index bcdb2faab1..7370f08ad5 100644 --- a/src/nvidia/generated/g_platform_nvoc.c +++ b/src/nvidia/generated/g_platform_nvoc.c @@ -94,10 +94,13 @@ NV_STATUS __nvoc_ctor_OBJPFM(OBJPFM *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJPFM_1(OBJPFM *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_OBJPFM_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_OBJPFM(OBJPFM *pThis) { __nvoc_init_funcTable_OBJPFM_1(pThis); } diff --git a/src/nvidia/generated/g_platform_nvoc.h b/src/nvidia/generated/g_platform_nvoc.h index 00e369dc98..f0118cf3ea 100644 --- a/src/nvidia/generated/g_platform_nvoc.h +++ b/src/nvidia/generated/g_platform_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_PLATFORM_NVOC_H_ #define _G_PLATFORM_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_platform_nvoc.h" #ifndef _PLATFORM_H_ @@ -92,11 +100,20 @@ typedef struct #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJPFM { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct OBJPFM *__nvoc_pbase_OBJPFM; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct OBJPFM *__nvoc_pbase_OBJPFM; // pfm + + // 9 PDB properties NvBool PDB_PROP_PFM_SUPPORTS_ACPI; NvBool PDB_PROP_PFM_IS_MOBILE; NvBool PDB_PROP_PFM_IS_TOSHIBA_MOBILE; @@ -106,6 +123,8 @@ struct OBJPFM { NvBool PDB_PROP_PFM_MODS_USE_TWO_STAGE_RC_RECOVER; NvBool PDB_PROP_PFM_POSSIBLE_HIGHRES_BOOT; NvBool PDB_PROP_PFM_APPLE_EDP_SUPPORTED; + + // Data members NBSI_OBJ nbsi; ACPI_ID_MAPPING acpiIdMapping[32][16]; }; @@ -119,6 +138,7 @@ typedef struct OBJPFM OBJPFM; #define __nvoc_class_id_OBJPFM 0xb543ae #endif /* __nvoc_class_id_OBJPFM */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJPFM; #define __staticCast_OBJPFM(pThis) \ @@ -131,6 +151,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJPFM; ((OBJPFM*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJPFM))) #endif //__nvoc_platform_h_disabled +// Property macros #define PDB_PROP_PFM_SKIP_DP_IRQ_HANDLE_BASE_CAST #define PDB_PROP_PFM_SKIP_DP_IRQ_HANDLE_BASE_NAME PDB_PROP_PFM_SKIP_DP_IRQ_HANDLE #define PDB_PROP_PFM_APPLE_EDP_SUPPORTED_BASE_CAST @@ -156,71 +177,75 @@ NV_STATUS __nvoc_objCreate_OBJPFM(OBJPFM**, Dynamic*, NvU32); #define __objCreate_OBJPFM(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJPFM((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS pfmConstruct_IMPL(struct OBJPFM *arg_pPfm); #define __nvoc_pfmConstruct(arg_pPfm) pfmConstruct_IMPL(arg_pPfm) -void pfmUpdateAcpiIdMapping_IMPL(struct OBJPFM *arg0, OBJGPU *arg1, NvU32 arg2, NvU32 arg3, NvU32 arg4, NvU32 arg5); +void pfmUpdateAcpiIdMapping_IMPL(struct OBJPFM *arg1, OBJGPU *arg2, NvU32 arg3, NvU32 arg4, NvU32 arg5, NvU32 arg6); #ifdef __nvoc_platform_h_disabled -static inline void pfmUpdateAcpiIdMapping(struct OBJPFM *arg0, OBJGPU *arg1, NvU32 arg2, NvU32 arg3, NvU32 arg4, NvU32 arg5) { +static inline void pfmUpdateAcpiIdMapping(struct OBJPFM *arg1, OBJGPU *arg2, NvU32 arg3, NvU32 arg4, NvU32 arg5, NvU32 arg6) { NV_ASSERT_FAILED_PRECOMP("OBJPFM was disabled!"); } #else //__nvoc_platform_h_disabled -#define pfmUpdateAcpiIdMapping(arg0, arg1, arg2, arg3, arg4, arg5) pfmUpdateAcpiIdMapping_IMPL(arg0, arg1, arg2, arg3, arg4, arg5) +#define pfmUpdateAcpiIdMapping(arg1, arg2, arg3, arg4, arg5, arg6) pfmUpdateAcpiIdMapping_IMPL(arg1, arg2, arg3, arg4, arg5, arg6) #endif //__nvoc_platform_h_disabled -NvU32 pfmFindAcpiId_IMPL(struct OBJPFM *arg0, OBJGPU *arg1, NvU32 arg2); +NvU32 pfmFindAcpiId_IMPL(struct OBJPFM *arg1, OBJGPU *arg2, NvU32 arg3); #ifdef __nvoc_platform_h_disabled -static inline NvU32 pfmFindAcpiId(struct OBJPFM *arg0, OBJGPU *arg1, NvU32 arg2) { +static inline NvU32 pfmFindAcpiId(struct OBJPFM *arg1, OBJGPU *arg2, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("OBJPFM was disabled!"); return 0; } #else //__nvoc_platform_h_disabled -#define pfmFindAcpiId(arg0, arg1, arg2) pfmFindAcpiId_IMPL(arg0, arg1, arg2) +#define pfmFindAcpiId(arg1, arg2, arg3) pfmFindAcpiId_IMPL(arg1, arg2, arg3) #endif //__nvoc_platform_h_disabled -NvU32 pfmFindDodIndex_IMPL(struct OBJPFM *arg0, OBJGPU *arg1, NvU32 arg2); +NvU32 pfmFindDodIndex_IMPL(struct OBJPFM *arg1, OBJGPU *arg2, NvU32 arg3); #ifdef __nvoc_platform_h_disabled -static inline NvU32 pfmFindDodIndex(struct OBJPFM *arg0, OBJGPU *arg1, NvU32 arg2) { +static inline NvU32 pfmFindDodIndex(struct OBJPFM *arg1, OBJGPU *arg2, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("OBJPFM was disabled!"); return 0; } #else //__nvoc_platform_h_disabled -#define pfmFindDodIndex(arg0, arg1, arg2) pfmFindDodIndex_IMPL(arg0, arg1, arg2) +#define pfmFindDodIndex(arg1, arg2, arg3) pfmFindDodIndex_IMPL(arg1, arg2, arg3) #endif //__nvoc_platform_h_disabled -NvU32 pfmFindDevMaskFromDodIndex_IMPL(struct OBJPFM *arg0, OBJGPU *arg1, NvU32 arg2); +NvU32 pfmFindDevMaskFromDodIndex_IMPL(struct OBJPFM *arg1, OBJGPU *arg2, NvU32 arg3); #ifdef __nvoc_platform_h_disabled -static inline NvU32 pfmFindDevMaskFromDodIndex(struct OBJPFM *arg0, OBJGPU *arg1, NvU32 arg2) { +static inline NvU32 pfmFindDevMaskFromDodIndex(struct OBJPFM *arg1, OBJGPU *arg2, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("OBJPFM was disabled!"); return 0; } #else //__nvoc_platform_h_disabled -#define pfmFindDevMaskFromDodIndex(arg0, arg1, arg2) pfmFindDevMaskFromDodIndex_IMPL(arg0, arg1, arg2) +#define pfmFindDevMaskFromDodIndex(arg1, arg2, arg3) pfmFindDevMaskFromDodIndex_IMPL(arg1, arg2, arg3) #endif //__nvoc_platform_h_disabled -NvU32 pfmFindDevMaskFromAcpiId_IMPL(struct OBJPFM *arg0, OBJGPU *arg1, NvU32 arg2); +NvU32 pfmFindDevMaskFromAcpiId_IMPL(struct OBJPFM *arg1, OBJGPU *arg2, NvU32 arg3); #ifdef __nvoc_platform_h_disabled -static inline NvU32 pfmFindDevMaskFromAcpiId(struct OBJPFM *arg0, OBJGPU *arg1, NvU32 arg2) { +static inline NvU32 pfmFindDevMaskFromAcpiId(struct OBJPFM *arg1, OBJGPU *arg2, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("OBJPFM was disabled!"); return 0; } #else //__nvoc_platform_h_disabled -#define pfmFindDevMaskFromAcpiId(arg0, arg1, arg2) pfmFindDevMaskFromAcpiId_IMPL(arg0, arg1, arg2) +#define pfmFindDevMaskFromAcpiId(arg1, arg2, arg3) pfmFindDevMaskFromAcpiId_IMPL(arg1, arg2, arg3) #endif //__nvoc_platform_h_disabled -void pfmUpdateDeviceAcpiId_IMPL(struct OBJPFM *arg0, OBJGPU *arg1, NvU32 arg2, NvU32 arg3); +void pfmUpdateDeviceAcpiId_IMPL(struct OBJPFM *arg1, OBJGPU *arg2, NvU32 arg3, NvU32 arg4); #ifdef __nvoc_platform_h_disabled -static inline void pfmUpdateDeviceAcpiId(struct OBJPFM *arg0, OBJGPU *arg1, NvU32 arg2, NvU32 arg3) { +static inline void pfmUpdateDeviceAcpiId(struct OBJPFM *arg1, OBJGPU *arg2, NvU32 arg3, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("OBJPFM was disabled!"); } #else //__nvoc_platform_h_disabled -#define pfmUpdateDeviceAcpiId(arg0, arg1, arg2, arg3) pfmUpdateDeviceAcpiId_IMPL(arg0, arg1, arg2, arg3) +#define pfmUpdateDeviceAcpiId(arg1, arg2, arg3, arg4) pfmUpdateDeviceAcpiId_IMPL(arg1, arg2, arg3, arg4) #endif //__nvoc_platform_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_platform_request_handler_nvoc.c b/src/nvidia/generated/g_platform_request_handler_nvoc.c index c0b3e3b469..70a94693bc 100644 --- a/src/nvidia/generated/g_platform_request_handler_nvoc.c +++ b/src/nvidia/generated/g_platform_request_handler_nvoc.c @@ -92,10 +92,13 @@ NV_STATUS __nvoc_ctor_PlatformRequestHandler(PlatformRequestHandler *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_PlatformRequestHandler_1(PlatformRequestHandler *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_PlatformRequestHandler_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_PlatformRequestHandler(PlatformRequestHandler *pThis) { __nvoc_init_funcTable_PlatformRequestHandler_1(pThis); } diff --git a/src/nvidia/generated/g_platform_request_handler_nvoc.h b/src/nvidia/generated/g_platform_request_handler_nvoc.h index d2c529191f..826891c139 100644 --- a/src/nvidia/generated/g_platform_request_handler_nvoc.h +++ b/src/nvidia/generated/g_platform_request_handler_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_PLATFORM_REQUEST_HANDLER_NVOC_H_ #define _G_PLATFORM_REQUEST_HANDLER_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_platform_request_handler_nvoc.h" #ifndef PLATFORM_REQUEST_HANDLER_H @@ -45,7 +53,6 @@ extern "C" { /* ------------------------ Includes --------------------------------------- */ #include "core/core.h" -#include "os/os.h" #include "platform/platform_request_handler_utils.h" #include "ctrl/ctrl0000/ctrl0000system.h" #include "ctrl/ctrl2080/ctrl2080internal.h" @@ -278,14 +285,25 @@ typedef struct #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct PlatformRequestHandler { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct PlatformRequestHandler *__nvoc_pbase_PlatformRequestHandler; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct PlatformRequestHandler *__nvoc_pbase_PlatformRequestHandler; // pfmreqhndlr + + // 3 PDB properties NvBool PDB_PROP_PFMREQHNDLR_SUPPORTED; NvBool PDB_PROP_PFMREQHNDLR_SYS_CONTROL_SUPPORTED; NvBool PDB_PROP_PFMREQHNDLR_IS_PLATFORM_LEGACY; + + // Data members NvU32 pfmreqhndlrSupportedGpuIdx; PFM_REQ_HNDLR_SENSOR_DATA sensorData; PFM_REQ_HNDLR_PPM_DATA ppmData; @@ -305,6 +323,7 @@ typedef struct PlatformRequestHandler PlatformRequestHandler; #define __nvoc_class_id_PlatformRequestHandler 0x641a7f #endif /* __nvoc_class_id_PlatformRequestHandler */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_PlatformRequestHandler; #define __staticCast_PlatformRequestHandler(pThis) \ @@ -317,6 +336,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_PlatformRequestHandler; ((PlatformRequestHandler*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(PlatformRequestHandler))) #endif //__nvoc_platform_request_handler_h_disabled +// Property macros #define PDB_PROP_PFMREQHNDLR_SYS_CONTROL_SUPPORTED_BASE_CAST #define PDB_PROP_PFMREQHNDLR_SYS_CONTROL_SUPPORTED_BASE_NAME PDB_PROP_PFMREQHNDLR_SYS_CONTROL_SUPPORTED #define PDB_PROP_PFMREQHNDLR_IS_PLATFORM_LEGACY_BASE_CAST @@ -330,6 +350,10 @@ NV_STATUS __nvoc_objCreate_PlatformRequestHandler(PlatformRequestHandler**, Dyna #define __objCreate_PlatformRequestHandler(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_PlatformRequestHandler((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS pfmreqhndlrConstruct_IMPL(struct PlatformRequestHandler *arg_pPlatformRequestHandler); #define __nvoc_pfmreqhndlrConstruct(arg_pPlatformRequestHandler) pfmreqhndlrConstruct_IMPL(arg_pPlatformRequestHandler) @@ -387,15 +411,15 @@ static inline NvBool pfmreqhndlrIsInitialized(struct PlatformRequestHandler *pPl #define pfmreqhndlrIsInitialized(pPlatformRequestHandler) pfmreqhndlrIsInitialized_IMPL(pPlatformRequestHandler) #endif //__nvoc_platform_request_handler_h_disabled -NV_STATUS pfmreqhndlrControl_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, NvU16 arg0, NvU16 arg1, NvU32 *arg2); +NV_STATUS pfmreqhndlrControl_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, NvU16 arg2, NvU16 arg3, NvU32 *arg4); #ifdef __nvoc_platform_request_handler_h_disabled -static inline NV_STATUS pfmreqhndlrControl(struct PlatformRequestHandler *pPlatformRequestHandler, NvU16 arg0, NvU16 arg1, NvU32 *arg2) { +static inline NV_STATUS pfmreqhndlrControl(struct PlatformRequestHandler *pPlatformRequestHandler, NvU16 arg2, NvU16 arg3, NvU32 *arg4) { NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_platform_request_handler_h_disabled -#define pfmreqhndlrControl(pPlatformRequestHandler, arg0, arg1, arg2) pfmreqhndlrControl_IMPL(pPlatformRequestHandler, arg0, arg1, arg2) +#define pfmreqhndlrControl(pPlatformRequestHandler, arg2, arg3, arg4) pfmreqhndlrControl_IMPL(pPlatformRequestHandler, arg2, arg3, arg4) #endif //__nvoc_platform_request_handler_h_disabled NV_STATUS pfmreqhndlrPcontrol_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, NvU32 input, NvBool bSbiosCall); diff --git a/src/nvidia/generated/g_prereq_tracker_nvoc.c b/src/nvidia/generated/g_prereq_tracker_nvoc.c index 0e46fa086c..fd09dc65cd 100644 --- a/src/nvidia/generated/g_prereq_tracker_nvoc.c +++ b/src/nvidia/generated/g_prereq_tracker_nvoc.c @@ -93,10 +93,13 @@ NV_STATUS __nvoc_ctor_PrereqTracker(PrereqTracker *pThis, struct OBJGPU * arg_pP return status; } +// Vtable initialization static void __nvoc_init_funcTable_PrereqTracker_1(PrereqTracker *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_PrereqTracker_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_PrereqTracker(PrereqTracker *pThis) { __nvoc_init_funcTable_PrereqTracker_1(pThis); } diff --git a/src/nvidia/generated/g_prereq_tracker_nvoc.h b/src/nvidia/generated/g_prereq_tracker_nvoc.h index 8f92fa8d0f..020a6b2e01 100644 --- a/src/nvidia/generated/g_prereq_tracker_nvoc.h +++ b/src/nvidia/generated/g_prereq_tracker_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_PREREQ_TRACKER_NVOC_H_ #define _G_PREREQ_TRACKER_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -53,6 +60,7 @@ extern "C" { * stateLoad() or later. */ +#pragma once #include "g_prereq_tracker_nvoc.h" #ifndef __PREREQUISITE_TRACKER_H__ @@ -81,6 +89,7 @@ extern "C" { /* ------------------------ Datatypes --------------------------------------- */ + struct OBJGPU; #ifndef __NVOC_CLASS_OBJGPU_TYPEDEF__ @@ -165,11 +174,20 @@ MAKE_LIST(PrereqList, PREREQ_ENTRY); #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct PrereqTracker { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct PrereqTracker *__nvoc_pbase_PrereqTracker; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct PrereqTracker *__nvoc_pbase_PrereqTracker; // prereq + + // Data members union PREREQ_ID_BIT_VECTOR satisfied; NvBool bInitialized; PrereqList prereqList; @@ -185,6 +203,7 @@ typedef struct PrereqTracker PrereqTracker; #define __nvoc_class_id_PrereqTracker 0x0e171b #endif /* __nvoc_class_id_PrereqTracker */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_PrereqTracker; #define __staticCast_PrereqTracker(pThis) \ @@ -197,13 +216,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_PrereqTracker; ((PrereqTracker*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(PrereqTracker))) #endif //__nvoc_prereq_tracker_h_disabled - NV_STATUS __nvoc_objCreateDynamic_PrereqTracker(PrereqTracker**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_PrereqTracker(PrereqTracker**, Dynamic*, NvU32, struct OBJGPU * arg_pParent); #define __objCreate_PrereqTracker(ppNewObj, pParent, createFlags, arg_pParent) \ __nvoc_objCreate_PrereqTracker((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pParent) + +// Wrapper macros + +// Dispatch functions NV_STATUS prereqConstruct_IMPL(struct PrereqTracker *arg_pTracker, struct OBJGPU *arg_pParent); #define __nvoc_prereqConstruct(arg_pTracker, arg_pParent) prereqConstruct_IMPL(arg_pTracker, arg_pParent) diff --git a/src/nvidia/generated/g_profiler_v1_nvoc.c b/src/nvidia/generated/g_profiler_v1_nvoc.c index 34dccfd662..ea6f1ac708 100644 --- a/src/nvidia/generated/g_profiler_v1_nvoc.c +++ b/src/nvidia/generated/g_profiler_v1_nvoc.c @@ -93,106 +93,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_Profiler = /*pExportInfo=*/ &__nvoc_export_info_Profiler }; -static NV_STATUS __nvoc_thunk_Profiler_gpuresControl(struct GpuResource *pProfiler, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return profilerControl((struct Profiler *)(((unsigned char *)pProfiler) - __nvoc_rtti_Profiler_GpuResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_GpuResource_profilerShareCallback(struct Profiler *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_profilerCheckMemInterUnmap(struct Profiler *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_Profiler_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RsResource_profilerMapTo(struct Profiler *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Profiler_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_profilerGetMapAddrSpace(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} - -static NvU32 __nvoc_thunk_RsResource_profilerGetRefCount(struct Profiler *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Profiler_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_profilerAddAdditionalDependants(struct RsClient *pClient, struct Profiler *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Profiler_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_profilerControl_Prologue(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Profiler_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_profilerGetRegBaseOffsetAndSize(struct Profiler *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset), pGpu, pOffset, pSize); -} - -static NV_STATUS __nvoc_thunk_GpuResource_profilerInternalControlForward(struct Profiler *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset), command, pParams, size); -} - -static NV_STATUS __nvoc_thunk_RsResource_profilerUnmapFrom(struct Profiler *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Profiler_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_profilerControl_Epilogue(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Profiler_RmResource.offset), pCallContext, pParams); -} - -static NvHandle __nvoc_thunk_GpuResource_profilerGetInternalObjectHandle(struct Profiler *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_profilerUnmap(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_profilerGetMemInterMapParams(struct Profiler *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_Profiler_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_profilerGetMemoryMappingDescriptor(struct Profiler *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_Profiler_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_profilerControlFilter(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Profiler_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_profilerControlSerialization_Prologue(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Profiler_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_profilerCanCopy(struct Profiler *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Profiler_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_profilerIsPartialUnmapSupported(struct Profiler *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Profiler_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_profilerPreDestruct(struct Profiler *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Profiler_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_profilerIsDuplicate(struct Profiler *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Profiler_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_profilerControlSerialization_Epilogue(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Profiler_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_profilerMap(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_profilerAccessCallback(struct Profiler *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Profiler_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -200,12 +100,12 @@ static NvBool __nvoc_thunk_RmResource_profilerAccessCallback(struct Profiler *pR static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerCtrlCmdProfilerReserveHwpm_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x90cc0101u, /*paramSize=*/ 0, @@ -215,12 +115,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerCtrlCmdProfilerReleaseHwpm_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x90cc0102u, /*paramSize=*/ 0, @@ -230,12 +130,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerCtrlCmdProfilerGetHwpmReservationInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x90cc0103u, /*paramSize=*/ sizeof(NV90CC_CTRL_HWPM_GET_RESERVATION_INFO_PARAMS), @@ -245,12 +145,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerCtrlCmdProfilerRequestCgControls_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x90cc0301u, /*paramSize=*/ sizeof(NV90CC_CTRL_POWER_REQUEST_FEATURES_PARAMS), @@ -260,12 +160,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerCtrlCmdProfilerReleaseCgControls_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x90cc0302u, /*paramSize=*/ sizeof(NV90CC_CTRL_POWER_RELEASE_FEATURES_PARAMS), @@ -277,6 +177,137 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler }; +// 1 down-thunk(s) defined to bridge methods in Profiler from superclasses + +// profilerControl: virtual override (res) base (gpures) +static NV_STATUS __nvoc_down_thunk_Profiler_gpuresControl(struct GpuResource *pProfiler, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return profilerControl((struct Profiler *)(((unsigned char *) pProfiler) - __nvoc_rtti_Profiler_GpuResource.offset), pCallContext, pParams); +} + + +// 24 up-thunk(s) defined to bridge methods in Profiler to superclasses + +// profilerMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_profilerMap(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// profilerUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_profilerUnmap(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset), pCallContext, pCpuMapping); +} + +// profilerShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_profilerShareCallback(struct Profiler *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// profilerGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_profilerGetRegBaseOffsetAndSize(struct Profiler *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset), pGpu, pOffset, pSize); +} + +// profilerGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_profilerGetMapAddrSpace(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + +// profilerInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_profilerInternalControlForward(struct Profiler *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset), command, pParams, size); +} + +// profilerGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_profilerGetInternalObjectHandle(struct Profiler *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset)); +} + +// profilerAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_profilerAccessCallback(struct Profiler *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// profilerGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_profilerGetMemInterMapParams(struct Profiler *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Profiler_RmResource.offset), pParams); +} + +// profilerCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_profilerCheckMemInterUnmap(struct Profiler *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Profiler_RmResource.offset), bSubdeviceHandleProvided); +} + +// profilerGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_profilerGetMemoryMappingDescriptor(struct Profiler *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Profiler_RmResource.offset), ppMemDesc); +} + +// profilerControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_profilerControlSerialization_Prologue(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RmResource.offset), pCallContext, pParams); +} + +// profilerControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_profilerControlSerialization_Epilogue(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RmResource.offset), pCallContext, pParams); +} + +// profilerControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_profilerControl_Prologue(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RmResource.offset), pCallContext, pParams); +} + +// profilerControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_profilerControl_Epilogue(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RmResource.offset), pCallContext, pParams); +} + +// profilerCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_profilerCanCopy(struct Profiler *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RsResource.offset)); +} + +// profilerIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_profilerIsDuplicate(struct Profiler *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RsResource.offset), hMemory, pDuplicate); +} + +// profilerPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_profilerPreDestruct(struct Profiler *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RsResource.offset)); +} + +// profilerControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_profilerControlFilter(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RsResource.offset), pCallContext, pParams); +} + +// profilerIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_profilerIsPartialUnmapSupported(struct Profiler *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RsResource.offset)); +} + +// profilerMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_profilerMapTo(struct Profiler *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RsResource.offset), pParams); +} + +// profilerUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_profilerUnmapFrom(struct Profiler *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RsResource.offset), pParams); +} + +// profilerGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_profilerGetRefCount(struct Profiler *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RsResource.offset)); +} + +// profilerAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_profilerAddAdditionalDependants(struct RsClient *pClient, struct Profiler *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RsResource.offset), pReference); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_Profiler = { /*numEntries=*/ 5, @@ -318,6 +349,7 @@ NV_STATUS __nvoc_ctor_Profiler(Profiler *pThis, RmHalspecOwner *pRmhalspecowner, return status; } +// Vtable initialization static void __nvoc_init_funcTable_Profiler_1(Profiler *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -326,80 +358,113 @@ static void __nvoc_init_funcTable_Profiler_1(Profiler *pThis, RmHalspecOwner *pR PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); + // profilerControl -- virtual override (res) base (gpures) pThis->__profilerControl__ = &profilerControl_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresControl__ = &__nvoc_down_thunk_Profiler_gpuresControl; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // profilerCtrlCmdProfilerReserveHwpm -- exported (id=0x90cc0101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__profilerCtrlCmdProfilerReserveHwpm__ = &profilerCtrlCmdProfilerReserveHwpm_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // profilerCtrlCmdProfilerReleaseHwpm -- exported (id=0x90cc0102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__profilerCtrlCmdProfilerReleaseHwpm__ = &profilerCtrlCmdProfilerReleaseHwpm_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // profilerCtrlCmdProfilerGetHwpmReservationInfo -- exported (id=0x90cc0103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__profilerCtrlCmdProfilerGetHwpmReservationInfo__ = &profilerCtrlCmdProfilerGetHwpmReservationInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // profilerCtrlCmdProfilerRequestCgControls -- exported (id=0x90cc0301) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__profilerCtrlCmdProfilerRequestCgControls__ = &profilerCtrlCmdProfilerRequestCgControls_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // profilerCtrlCmdProfilerReleaseCgControls -- exported (id=0x90cc0302) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__profilerCtrlCmdProfilerReleaseCgControls__ = &profilerCtrlCmdProfilerReleaseCgControls_IMPL; #endif - pThis->__nvoc_base_GpuResource.__gpuresControl__ = &__nvoc_thunk_Profiler_gpuresControl; + // profilerMap -- virtual inherited (gpures) base (gpures) + pThis->__profilerMap__ = &__nvoc_up_thunk_GpuResource_profilerMap; - pThis->__profilerShareCallback__ = &__nvoc_thunk_GpuResource_profilerShareCallback; + // profilerUnmap -- virtual inherited (gpures) base (gpures) + pThis->__profilerUnmap__ = &__nvoc_up_thunk_GpuResource_profilerUnmap; - pThis->__profilerCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_profilerCheckMemInterUnmap; + // profilerShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__profilerShareCallback__ = &__nvoc_up_thunk_GpuResource_profilerShareCallback; - pThis->__profilerMapTo__ = &__nvoc_thunk_RsResource_profilerMapTo; + // profilerGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__profilerGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_profilerGetRegBaseOffsetAndSize; - pThis->__profilerGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_profilerGetMapAddrSpace; + // profilerGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__profilerGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_profilerGetMapAddrSpace; - pThis->__profilerGetRefCount__ = &__nvoc_thunk_RsResource_profilerGetRefCount; + // profilerInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__profilerInternalControlForward__ = &__nvoc_up_thunk_GpuResource_profilerInternalControlForward; - pThis->__profilerAddAdditionalDependants__ = &__nvoc_thunk_RsResource_profilerAddAdditionalDependants; + // profilerGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__profilerGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_profilerGetInternalObjectHandle; - pThis->__profilerControl_Prologue__ = &__nvoc_thunk_RmResource_profilerControl_Prologue; + // profilerAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__profilerAccessCallback__ = &__nvoc_up_thunk_RmResource_profilerAccessCallback; - pThis->__profilerGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_profilerGetRegBaseOffsetAndSize; + // profilerGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__profilerGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_profilerGetMemInterMapParams; - pThis->__profilerInternalControlForward__ = &__nvoc_thunk_GpuResource_profilerInternalControlForward; + // profilerCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__profilerCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_profilerCheckMemInterUnmap; - pThis->__profilerUnmapFrom__ = &__nvoc_thunk_RsResource_profilerUnmapFrom; + // profilerGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__profilerGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_profilerGetMemoryMappingDescriptor; - pThis->__profilerControl_Epilogue__ = &__nvoc_thunk_RmResource_profilerControl_Epilogue; + // profilerControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__profilerControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_profilerControlSerialization_Prologue; - pThis->__profilerGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_profilerGetInternalObjectHandle; + // profilerControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__profilerControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerControlSerialization_Epilogue; - pThis->__profilerUnmap__ = &__nvoc_thunk_GpuResource_profilerUnmap; + // profilerControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__profilerControl_Prologue__ = &__nvoc_up_thunk_RmResource_profilerControl_Prologue; - pThis->__profilerGetMemInterMapParams__ = &__nvoc_thunk_RmResource_profilerGetMemInterMapParams; + // profilerControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__profilerControl_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerControl_Epilogue; - pThis->__profilerGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_profilerGetMemoryMappingDescriptor; + // profilerCanCopy -- virtual inherited (res) base (gpures) + pThis->__profilerCanCopy__ = &__nvoc_up_thunk_RsResource_profilerCanCopy; - pThis->__profilerControlFilter__ = &__nvoc_thunk_RsResource_profilerControlFilter; + // profilerIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__profilerIsDuplicate__ = &__nvoc_up_thunk_RsResource_profilerIsDuplicate; - pThis->__profilerControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_profilerControlSerialization_Prologue; + // profilerPreDestruct -- virtual inherited (res) base (gpures) + pThis->__profilerPreDestruct__ = &__nvoc_up_thunk_RsResource_profilerPreDestruct; - pThis->__profilerCanCopy__ = &__nvoc_thunk_RsResource_profilerCanCopy; + // profilerControlFilter -- virtual inherited (res) base (gpures) + pThis->__profilerControlFilter__ = &__nvoc_up_thunk_RsResource_profilerControlFilter; - pThis->__profilerIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_profilerIsPartialUnmapSupported; + // profilerIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__profilerIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_profilerIsPartialUnmapSupported; - pThis->__profilerPreDestruct__ = &__nvoc_thunk_RsResource_profilerPreDestruct; + // profilerMapTo -- virtual inherited (res) base (gpures) + pThis->__profilerMapTo__ = &__nvoc_up_thunk_RsResource_profilerMapTo; - pThis->__profilerIsDuplicate__ = &__nvoc_thunk_RsResource_profilerIsDuplicate; + // profilerUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__profilerUnmapFrom__ = &__nvoc_up_thunk_RsResource_profilerUnmapFrom; - pThis->__profilerControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_profilerControlSerialization_Epilogue; + // profilerGetRefCount -- virtual inherited (res) base (gpures) + pThis->__profilerGetRefCount__ = &__nvoc_up_thunk_RsResource_profilerGetRefCount; - pThis->__profilerMap__ = &__nvoc_thunk_GpuResource_profilerMap; + // profilerAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__profilerAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_profilerAddAdditionalDependants; +} // End __nvoc_init_funcTable_Profiler_1 with approximately 31 basic block(s). - pThis->__profilerAccessCallback__ = &__nvoc_thunk_RmResource_profilerAccessCallback; -} +// Initialize vtable(s) for 30 virtual method(s). void __nvoc_init_funcTable_Profiler(Profiler *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 30 per-object function pointer(s). __nvoc_init_funcTable_Profiler_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_profiler_v1_nvoc.h b/src/nvidia/generated/g_profiler_v1_nvoc.h index a576198bc3..94220c1ca5 100644 --- a/src/nvidia/generated/g_profiler_v1_nvoc.h +++ b/src/nvidia/generated/g_profiler_v1_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_PROFILER_V1_NVOC_H_ #define _G_PROFILER_V1_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_profiler_v1_nvoc.h" #ifndef PROFILER_V1_H @@ -52,45 +60,54 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct Profiler { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct Profiler *__nvoc_pbase_Profiler; - NV_STATUS (*__profilerControl__)(struct Profiler *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__profilerCtrlCmdProfilerReserveHwpm__)(struct Profiler *); - NV_STATUS (*__profilerCtrlCmdProfilerReleaseHwpm__)(struct Profiler *); - NV_STATUS (*__profilerCtrlCmdProfilerGetHwpmReservationInfo__)(struct Profiler *, NV90CC_CTRL_HWPM_GET_RESERVATION_INFO_PARAMS *); - NV_STATUS (*__profilerCtrlCmdProfilerRequestCgControls__)(struct Profiler *, NV90CC_CTRL_POWER_REQUEST_FEATURES_PARAMS *); - NV_STATUS (*__profilerCtrlCmdProfilerReleaseCgControls__)(struct Profiler *, NV90CC_CTRL_POWER_RELEASE_FEATURES_PARAMS *); - NvBool (*__profilerShareCallback__)(struct Profiler *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__profilerCheckMemInterUnmap__)(struct Profiler *, NvBool); - NV_STATUS (*__profilerMapTo__)(struct Profiler *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__profilerGetMapAddrSpace__)(struct Profiler *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__profilerGetRefCount__)(struct Profiler *); - void (*__profilerAddAdditionalDependants__)(struct RsClient *, struct Profiler *, RsResourceRef *); - NV_STATUS (*__profilerControl_Prologue__)(struct Profiler *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__profilerGetRegBaseOffsetAndSize__)(struct Profiler *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__profilerInternalControlForward__)(struct Profiler *, NvU32, void *, NvU32); - NV_STATUS (*__profilerUnmapFrom__)(struct Profiler *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__profilerControl_Epilogue__)(struct Profiler *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__profilerGetInternalObjectHandle__)(struct Profiler *); - NV_STATUS (*__profilerUnmap__)(struct Profiler *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__profilerGetMemInterMapParams__)(struct Profiler *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__profilerGetMemoryMappingDescriptor__)(struct Profiler *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__profilerControlFilter__)(struct Profiler *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__profilerControlSerialization_Prologue__)(struct Profiler *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__profilerCanCopy__)(struct Profiler *); - NvBool (*__profilerIsPartialUnmapSupported__)(struct Profiler *); - void (*__profilerPreDestruct__)(struct Profiler *); - NV_STATUS (*__profilerIsDuplicate__)(struct Profiler *, NvHandle, NvBool *); - void (*__profilerControlSerialization_Epilogue__)(struct Profiler *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__profilerMap__)(struct Profiler *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__profilerAccessCallback__)(struct Profiler *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct Profiler *__nvoc_pbase_Profiler; // profiler + + // Vtable with 30 per-object function pointers + NV_STATUS (*__profilerControl__)(struct Profiler * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) + NV_STATUS (*__profilerCtrlCmdProfilerReserveHwpm__)(struct Profiler * /*this*/); // exported (id=0x90cc0101) + NV_STATUS (*__profilerCtrlCmdProfilerReleaseHwpm__)(struct Profiler * /*this*/); // exported (id=0x90cc0102) + NV_STATUS (*__profilerCtrlCmdProfilerGetHwpmReservationInfo__)(struct Profiler * /*this*/, NV90CC_CTRL_HWPM_GET_RESERVATION_INFO_PARAMS *); // exported (id=0x90cc0103) + NV_STATUS (*__profilerCtrlCmdProfilerRequestCgControls__)(struct Profiler * /*this*/, NV90CC_CTRL_POWER_REQUEST_FEATURES_PARAMS *); // exported (id=0x90cc0301) + NV_STATUS (*__profilerCtrlCmdProfilerReleaseCgControls__)(struct Profiler * /*this*/, NV90CC_CTRL_POWER_RELEASE_FEATURES_PARAMS *); // exported (id=0x90cc0302) + NV_STATUS (*__profilerMap__)(struct Profiler * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__profilerUnmap__)(struct Profiler * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__profilerShareCallback__)(struct Profiler * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__profilerGetRegBaseOffsetAndSize__)(struct Profiler * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__profilerGetMapAddrSpace__)(struct Profiler * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__profilerInternalControlForward__)(struct Profiler * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__profilerGetInternalObjectHandle__)(struct Profiler * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__profilerAccessCallback__)(struct Profiler * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__profilerGetMemInterMapParams__)(struct Profiler * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__profilerCheckMemInterUnmap__)(struct Profiler * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__profilerGetMemoryMappingDescriptor__)(struct Profiler * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__profilerControlSerialization_Prologue__)(struct Profiler * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__profilerControlSerialization_Epilogue__)(struct Profiler * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__profilerControl_Prologue__)(struct Profiler * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__profilerControl_Epilogue__)(struct Profiler * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__profilerCanCopy__)(struct Profiler * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__profilerIsDuplicate__)(struct Profiler * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__profilerPreDestruct__)(struct Profiler * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__profilerControlFilter__)(struct Profiler * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__profilerIsPartialUnmapSupported__)(struct Profiler * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__profilerMapTo__)(struct Profiler * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__profilerUnmapFrom__)(struct Profiler * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__profilerGetRefCount__)(struct Profiler * /*this*/); // virtual inherited (res) base (gpures) + void (*__profilerAddAdditionalDependants__)(struct RsClient *, struct Profiler * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) }; #ifndef __NVOC_CLASS_Profiler_TYPEDEF__ @@ -102,6 +119,7 @@ typedef struct Profiler Profiler; #define __nvoc_class_id_Profiler 0x65b4c7 #endif /* __nvoc_class_id_Profiler */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_Profiler; #define __staticCast_Profiler(pThis) \ @@ -114,145 +132,186 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_Profiler; ((Profiler*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(Profiler))) #endif //__nvoc_profiler_v1_h_disabled - NV_STATUS __nvoc_objCreateDynamic_Profiler(Profiler**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_Profiler(Profiler**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_Profiler(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_Profiler((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define profilerControl_FNPTR(pProfiler) pProfiler->__profilerControl__ #define profilerControl(pProfiler, pCallContext, pParams) profilerControl_DISPATCH(pProfiler, pCallContext, pParams) +#define profilerCtrlCmdProfilerReserveHwpm_FNPTR(pProfiler) pProfiler->__profilerCtrlCmdProfilerReserveHwpm__ #define profilerCtrlCmdProfilerReserveHwpm(pProfiler) profilerCtrlCmdProfilerReserveHwpm_DISPATCH(pProfiler) +#define profilerCtrlCmdProfilerReleaseHwpm_FNPTR(pProfiler) pProfiler->__profilerCtrlCmdProfilerReleaseHwpm__ #define profilerCtrlCmdProfilerReleaseHwpm(pProfiler) profilerCtrlCmdProfilerReleaseHwpm_DISPATCH(pProfiler) +#define profilerCtrlCmdProfilerGetHwpmReservationInfo_FNPTR(pProfiler) pProfiler->__profilerCtrlCmdProfilerGetHwpmReservationInfo__ #define profilerCtrlCmdProfilerGetHwpmReservationInfo(pProfiler, pParams) profilerCtrlCmdProfilerGetHwpmReservationInfo_DISPATCH(pProfiler, pParams) +#define profilerCtrlCmdProfilerRequestCgControls_FNPTR(pProfiler) pProfiler->__profilerCtrlCmdProfilerRequestCgControls__ #define profilerCtrlCmdProfilerRequestCgControls(pProfiler, pParams) profilerCtrlCmdProfilerRequestCgControls_DISPATCH(pProfiler, pParams) +#define profilerCtrlCmdProfilerReleaseCgControls_FNPTR(pProfiler) pProfiler->__profilerCtrlCmdProfilerReleaseCgControls__ #define profilerCtrlCmdProfilerReleaseCgControls(pProfiler, pParams) profilerCtrlCmdProfilerReleaseCgControls_DISPATCH(pProfiler, pParams) +#define profilerMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define profilerMap(pGpuResource, pCallContext, pParams, pCpuMapping) profilerMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define profilerUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define profilerUnmap(pGpuResource, pCallContext, pCpuMapping) profilerUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define profilerShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define profilerShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) profilerShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define profilerCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) profilerCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define profilerMapTo(pResource, pParams) profilerMapTo_DISPATCH(pResource, pParams) -#define profilerGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) profilerGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define profilerGetRefCount(pResource) profilerGetRefCount_DISPATCH(pResource) -#define profilerAddAdditionalDependants(pClient, pResource, pReference) profilerAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define profilerControl_Prologue(pResource, pCallContext, pParams) profilerControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define profilerGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define profilerGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) profilerGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define profilerGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define profilerGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) profilerGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define profilerInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define profilerInternalControlForward(pGpuResource, command, pParams, size) profilerInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define profilerUnmapFrom(pResource, pParams) profilerUnmapFrom_DISPATCH(pResource, pParams) -#define profilerControl_Epilogue(pResource, pCallContext, pParams) profilerControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define profilerGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define profilerGetInternalObjectHandle(pGpuResource) profilerGetInternalObjectHandle_DISPATCH(pGpuResource) -#define profilerUnmap(pGpuResource, pCallContext, pCpuMapping) profilerUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define profilerAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define profilerAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) profilerAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define profilerGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define profilerGetMemInterMapParams(pRmResource, pParams) profilerGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define profilerCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define profilerCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) profilerCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define profilerGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define profilerGetMemoryMappingDescriptor(pRmResource, ppMemDesc) profilerGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define profilerControlFilter(pResource, pCallContext, pParams) profilerControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define profilerControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define profilerControlSerialization_Prologue(pResource, pCallContext, pParams) profilerControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define profilerControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define profilerControlSerialization_Epilogue(pResource, pCallContext, pParams) profilerControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define profilerControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define profilerControl_Prologue(pResource, pCallContext, pParams) profilerControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define profilerControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define profilerControl_Epilogue(pResource, pCallContext, pParams) profilerControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define profilerCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define profilerCanCopy(pResource) profilerCanCopy_DISPATCH(pResource) -#define profilerIsPartialUnmapSupported(pResource) profilerIsPartialUnmapSupported_DISPATCH(pResource) -#define profilerPreDestruct(pResource) profilerPreDestruct_DISPATCH(pResource) +#define profilerIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define profilerIsDuplicate(pResource, hMemory, pDuplicate) profilerIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define profilerControlSerialization_Epilogue(pResource, pCallContext, pParams) profilerControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define profilerMap(pGpuResource, pCallContext, pParams, pCpuMapping) profilerMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define profilerAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) profilerAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool profilerIsProfilingPermitted_IMPL(struct Profiler *pProfiler); - +#define profilerPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define profilerPreDestruct(pResource) profilerPreDestruct_DISPATCH(pResource) +#define profilerControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define profilerControlFilter(pResource, pCallContext, pParams) profilerControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define profilerIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define profilerIsPartialUnmapSupported(pResource) profilerIsPartialUnmapSupported_DISPATCH(pResource) +#define profilerMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define profilerMapTo(pResource, pParams) profilerMapTo_DISPATCH(pResource, pParams) +#define profilerUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define profilerUnmapFrom(pResource, pParams) profilerUnmapFrom_DISPATCH(pResource, pParams) +#define profilerGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define profilerGetRefCount(pResource) profilerGetRefCount_DISPATCH(pResource) +#define profilerAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define profilerAddAdditionalDependants(pClient, pResource, pReference) profilerAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#ifdef __nvoc_profiler_v1_h_disabled -static inline NvBool profilerIsProfilingPermitted(struct Profiler *pProfiler) { - NV_ASSERT_FAILED_PRECOMP("Profiler was disabled!"); - return NV_FALSE; +// Dispatch functions +static inline NV_STATUS profilerControl_DISPATCH(struct Profiler *pProfiler, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pProfiler->__profilerControl__(pProfiler, pCallContext, pParams); } -#else //__nvoc_profiler_v1_h_disabled -#define profilerIsProfilingPermitted(pProfiler) profilerIsProfilingPermitted_IMPL(pProfiler) -#endif //__nvoc_profiler_v1_h_disabled -#define profilerIsProfilingPermitted_HAL(pProfiler) profilerIsProfilingPermitted(pProfiler) +static inline NV_STATUS profilerCtrlCmdProfilerReserveHwpm_DISPATCH(struct Profiler *pProfiler) { + return pProfiler->__profilerCtrlCmdProfilerReserveHwpm__(pProfiler); +} -static inline NV_STATUS profilerConstructState_ac1694(struct Profiler *pProfiler, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - return NV_OK; +static inline NV_STATUS profilerCtrlCmdProfilerReleaseHwpm_DISPATCH(struct Profiler *pProfiler) { + return pProfiler->__profilerCtrlCmdProfilerReleaseHwpm__(pProfiler); } +static inline NV_STATUS profilerCtrlCmdProfilerGetHwpmReservationInfo_DISPATCH(struct Profiler *pProfiler, NV90CC_CTRL_HWPM_GET_RESERVATION_INFO_PARAMS *pParams) { + return pProfiler->__profilerCtrlCmdProfilerGetHwpmReservationInfo__(pProfiler, pParams); +} -#ifdef __nvoc_profiler_v1_h_disabled -static inline NV_STATUS profilerConstructState(struct Profiler *pProfiler, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - NV_ASSERT_FAILED_PRECOMP("Profiler was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS profilerCtrlCmdProfilerRequestCgControls_DISPATCH(struct Profiler *pProfiler, NV90CC_CTRL_POWER_REQUEST_FEATURES_PARAMS *pParams) { + return pProfiler->__profilerCtrlCmdProfilerRequestCgControls__(pProfiler, pParams); } -#else //__nvoc_profiler_v1_h_disabled -#define profilerConstructState(pProfiler, pCallContext, pParams) profilerConstructState_ac1694(pProfiler, pCallContext, pParams) -#endif //__nvoc_profiler_v1_h_disabled -#define profilerConstructState_HAL(pProfiler, pCallContext, pParams) profilerConstructState(pProfiler, pCallContext, pParams) +static inline NV_STATUS profilerCtrlCmdProfilerReleaseCgControls_DISPATCH(struct Profiler *pProfiler, NV90CC_CTRL_POWER_RELEASE_FEATURES_PARAMS *pParams) { + return pProfiler->__profilerCtrlCmdProfilerReleaseCgControls__(pProfiler, pParams); +} -static inline void profilerDestruct_d44104(struct Profiler *pProfiler) { - return; +static inline NV_STATUS profilerMap_DISPATCH(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__profilerMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } +static inline NV_STATUS profilerUnmap_DISPATCH(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__profilerUnmap__(pGpuResource, pCallContext, pCpuMapping); +} -#define __nvoc_profilerDestruct(pProfiler) profilerDestruct_d44104(pProfiler) -static inline NV_STATUS profilerControlHwpmSupported_ac1694(struct Profiler *pProfiler, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return NV_OK; +static inline NvBool profilerShareCallback_DISPATCH(struct Profiler *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__profilerShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } +static inline NV_STATUS profilerGetRegBaseOffsetAndSize_DISPATCH(struct Profiler *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__profilerGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +} -#ifdef __nvoc_profiler_v1_h_disabled -static inline NV_STATUS profilerControlHwpmSupported(struct Profiler *pProfiler, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - NV_ASSERT_FAILED_PRECOMP("Profiler was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS profilerGetMapAddrSpace_DISPATCH(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__profilerGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -#else //__nvoc_profiler_v1_h_disabled -#define profilerControlHwpmSupported(pProfiler, pParams) profilerControlHwpmSupported_ac1694(pProfiler, pParams) -#endif //__nvoc_profiler_v1_h_disabled -#define profilerControlHwpmSupported_HAL(pProfiler, pParams) profilerControlHwpmSupported(pProfiler, pParams) +static inline NV_STATUS profilerInternalControlForward_DISPATCH(struct Profiler *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__profilerInternalControlForward__(pGpuResource, command, pParams, size); +} -NV_STATUS profilerControl_IMPL(struct Profiler *pProfiler, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); +static inline NvHandle profilerGetInternalObjectHandle_DISPATCH(struct Profiler *pGpuResource) { + return pGpuResource->__profilerGetInternalObjectHandle__(pGpuResource); +} -static inline NV_STATUS profilerControl_DISPATCH(struct Profiler *pProfiler, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pProfiler->__profilerControl__(pProfiler, pCallContext, pParams); +static inline NvBool profilerAccessCallback_DISPATCH(struct Profiler *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__profilerAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -NV_STATUS profilerCtrlCmdProfilerReserveHwpm_IMPL(struct Profiler *pProfiler); +static inline NV_STATUS profilerGetMemInterMapParams_DISPATCH(struct Profiler *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__profilerGetMemInterMapParams__(pRmResource, pParams); +} -static inline NV_STATUS profilerCtrlCmdProfilerReserveHwpm_DISPATCH(struct Profiler *pProfiler) { - return pProfiler->__profilerCtrlCmdProfilerReserveHwpm__(pProfiler); +static inline NV_STATUS profilerCheckMemInterUnmap_DISPATCH(struct Profiler *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__profilerCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -NV_STATUS profilerCtrlCmdProfilerReleaseHwpm_IMPL(struct Profiler *pProfiler); +static inline NV_STATUS profilerGetMemoryMappingDescriptor_DISPATCH(struct Profiler *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__profilerGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +} -static inline NV_STATUS profilerCtrlCmdProfilerReleaseHwpm_DISPATCH(struct Profiler *pProfiler) { - return pProfiler->__profilerCtrlCmdProfilerReleaseHwpm__(pProfiler); +static inline NV_STATUS profilerControlSerialization_Prologue_DISPATCH(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__profilerControlSerialization_Prologue__(pResource, pCallContext, pParams); } -NV_STATUS profilerCtrlCmdProfilerGetHwpmReservationInfo_IMPL(struct Profiler *pProfiler, NV90CC_CTRL_HWPM_GET_RESERVATION_INFO_PARAMS *pParams); +static inline void profilerControlSerialization_Epilogue_DISPATCH(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__profilerControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} -static inline NV_STATUS profilerCtrlCmdProfilerGetHwpmReservationInfo_DISPATCH(struct Profiler *pProfiler, NV90CC_CTRL_HWPM_GET_RESERVATION_INFO_PARAMS *pParams) { - return pProfiler->__profilerCtrlCmdProfilerGetHwpmReservationInfo__(pProfiler, pParams); +static inline NV_STATUS profilerControl_Prologue_DISPATCH(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__profilerControl_Prologue__(pResource, pCallContext, pParams); } -NV_STATUS profilerCtrlCmdProfilerRequestCgControls_IMPL(struct Profiler *pProfiler, NV90CC_CTRL_POWER_REQUEST_FEATURES_PARAMS *pParams); +static inline void profilerControl_Epilogue_DISPATCH(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__profilerControl_Epilogue__(pResource, pCallContext, pParams); +} -static inline NV_STATUS profilerCtrlCmdProfilerRequestCgControls_DISPATCH(struct Profiler *pProfiler, NV90CC_CTRL_POWER_REQUEST_FEATURES_PARAMS *pParams) { - return pProfiler->__profilerCtrlCmdProfilerRequestCgControls__(pProfiler, pParams); +static inline NvBool profilerCanCopy_DISPATCH(struct Profiler *pResource) { + return pResource->__profilerCanCopy__(pResource); } -NV_STATUS profilerCtrlCmdProfilerReleaseCgControls_IMPL(struct Profiler *pProfiler, NV90CC_CTRL_POWER_RELEASE_FEATURES_PARAMS *pParams); +static inline NV_STATUS profilerIsDuplicate_DISPATCH(struct Profiler *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__profilerIsDuplicate__(pResource, hMemory, pDuplicate); +} -static inline NV_STATUS profilerCtrlCmdProfilerReleaseCgControls_DISPATCH(struct Profiler *pProfiler, NV90CC_CTRL_POWER_RELEASE_FEATURES_PARAMS *pParams) { - return pProfiler->__profilerCtrlCmdProfilerReleaseCgControls__(pProfiler, pParams); +static inline void profilerPreDestruct_DISPATCH(struct Profiler *pResource) { + pResource->__profilerPreDestruct__(pResource); } -static inline NvBool profilerShareCallback_DISPATCH(struct Profiler *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__profilerShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS profilerControlFilter_DISPATCH(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__profilerControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS profilerCheckMemInterUnmap_DISPATCH(struct Profiler *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__profilerCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NvBool profilerIsPartialUnmapSupported_DISPATCH(struct Profiler *pResource) { + return pResource->__profilerIsPartialUnmapSupported__(pResource); } static inline NV_STATUS profilerMapTo_DISPATCH(struct Profiler *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return pResource->__profilerMapTo__(pResource, pParams); } -static inline NV_STATUS profilerGetMapAddrSpace_DISPATCH(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__profilerGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +static inline NV_STATUS profilerUnmapFrom_DISPATCH(struct Profiler *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__profilerUnmapFrom__(pResource, pParams); } static inline NvU32 profilerGetRefCount_DISPATCH(struct Profiler *pResource) { @@ -263,77 +322,69 @@ static inline void profilerAddAdditionalDependants_DISPATCH(struct RsClient *pCl pResource->__profilerAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NV_STATUS profilerControl_Prologue_DISPATCH(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__profilerControl_Prologue__(pResource, pCallContext, pParams); -} +NvBool profilerIsProfilingPermitted_IMPL(struct Profiler *pProfiler); -static inline NV_STATUS profilerGetRegBaseOffsetAndSize_DISPATCH(struct Profiler *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__profilerGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); -} -static inline NV_STATUS profilerInternalControlForward_DISPATCH(struct Profiler *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__profilerInternalControlForward__(pGpuResource, command, pParams, size); +#ifdef __nvoc_profiler_v1_h_disabled +static inline NvBool profilerIsProfilingPermitted(struct Profiler *pProfiler) { + NV_ASSERT_FAILED_PRECOMP("Profiler was disabled!"); + return NV_FALSE; } +#else //__nvoc_profiler_v1_h_disabled +#define profilerIsProfilingPermitted(pProfiler) profilerIsProfilingPermitted_IMPL(pProfiler) +#endif //__nvoc_profiler_v1_h_disabled -static inline NV_STATUS profilerUnmapFrom_DISPATCH(struct Profiler *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__profilerUnmapFrom__(pResource, pParams); -} +#define profilerIsProfilingPermitted_HAL(pProfiler) profilerIsProfilingPermitted(pProfiler) -static inline void profilerControl_Epilogue_DISPATCH(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__profilerControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS profilerConstructState_ac1694(struct Profiler *pProfiler, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + return NV_OK; } -static inline NvHandle profilerGetInternalObjectHandle_DISPATCH(struct Profiler *pGpuResource) { - return pGpuResource->__profilerGetInternalObjectHandle__(pGpuResource); -} -static inline NV_STATUS profilerUnmap_DISPATCH(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__profilerUnmap__(pGpuResource, pCallContext, pCpuMapping); +#ifdef __nvoc_profiler_v1_h_disabled +static inline NV_STATUS profilerConstructState(struct Profiler *pProfiler, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + NV_ASSERT_FAILED_PRECOMP("Profiler was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_profiler_v1_h_disabled +#define profilerConstructState(pProfiler, pCallContext, pParams) profilerConstructState_ac1694(pProfiler, pCallContext, pParams) +#endif //__nvoc_profiler_v1_h_disabled -static inline NV_STATUS profilerGetMemInterMapParams_DISPATCH(struct Profiler *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__profilerGetMemInterMapParams__(pRmResource, pParams); -} +#define profilerConstructState_HAL(pProfiler, pCallContext, pParams) profilerConstructState(pProfiler, pCallContext, pParams) -static inline NV_STATUS profilerGetMemoryMappingDescriptor_DISPATCH(struct Profiler *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__profilerGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void profilerDestruct_d44104(struct Profiler *pProfiler) { + return; } -static inline NV_STATUS profilerControlFilter_DISPATCH(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__profilerControlFilter__(pResource, pCallContext, pParams); -} -static inline NV_STATUS profilerControlSerialization_Prologue_DISPATCH(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__profilerControlSerialization_Prologue__(pResource, pCallContext, pParams); +#define __nvoc_profilerDestruct(pProfiler) profilerDestruct_d44104(pProfiler) +static inline NV_STATUS profilerControlHwpmSupported_ac1694(struct Profiler *pProfiler, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return NV_OK; } -static inline NvBool profilerCanCopy_DISPATCH(struct Profiler *pResource) { - return pResource->__profilerCanCopy__(pResource); -} -static inline NvBool profilerIsPartialUnmapSupported_DISPATCH(struct Profiler *pResource) { - return pResource->__profilerIsPartialUnmapSupported__(pResource); +#ifdef __nvoc_profiler_v1_h_disabled +static inline NV_STATUS profilerControlHwpmSupported(struct Profiler *pProfiler, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + NV_ASSERT_FAILED_PRECOMP("Profiler was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_profiler_v1_h_disabled +#define profilerControlHwpmSupported(pProfiler, pParams) profilerControlHwpmSupported_ac1694(pProfiler, pParams) +#endif //__nvoc_profiler_v1_h_disabled -static inline void profilerPreDestruct_DISPATCH(struct Profiler *pResource) { - pResource->__profilerPreDestruct__(pResource); -} +#define profilerControlHwpmSupported_HAL(pProfiler, pParams) profilerControlHwpmSupported(pProfiler, pParams) -static inline NV_STATUS profilerIsDuplicate_DISPATCH(struct Profiler *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__profilerIsDuplicate__(pResource, hMemory, pDuplicate); -} +NV_STATUS profilerControl_IMPL(struct Profiler *pProfiler, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); -static inline void profilerControlSerialization_Epilogue_DISPATCH(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__profilerControlSerialization_Epilogue__(pResource, pCallContext, pParams); -} +NV_STATUS profilerCtrlCmdProfilerReserveHwpm_IMPL(struct Profiler *pProfiler); -static inline NV_STATUS profilerMap_DISPATCH(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__profilerMap__(pGpuResource, pCallContext, pParams, pCpuMapping); -} +NV_STATUS profilerCtrlCmdProfilerReleaseHwpm_IMPL(struct Profiler *pProfiler); -static inline NvBool profilerAccessCallback_DISPATCH(struct Profiler *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__profilerAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} +NV_STATUS profilerCtrlCmdProfilerGetHwpmReservationInfo_IMPL(struct Profiler *pProfiler, NV90CC_CTRL_HWPM_GET_RESERVATION_INFO_PARAMS *pParams); + +NV_STATUS profilerCtrlCmdProfilerRequestCgControls_IMPL(struct Profiler *pProfiler, NV90CC_CTRL_POWER_REQUEST_FEATURES_PARAMS *pParams); + +NV_STATUS profilerCtrlCmdProfilerReleaseCgControls_IMPL(struct Profiler *pProfiler, NV90CC_CTRL_POWER_RELEASE_FEATURES_PARAMS *pParams); NV_STATUS profilerConstruct_IMPL(struct Profiler *arg_pProfiler, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_profiler_v2_nvoc.c b/src/nvidia/generated/g_profiler_v2_nvoc.c index 1df91c0915..826b9e4372 100644 --- a/src/nvidia/generated/g_profiler_v2_nvoc.c +++ b/src/nvidia/generated/g_profiler_v2_nvoc.c @@ -93,106 +93,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_ProfilerBase = /*pExportInfo=*/ &__nvoc_export_info_ProfilerBase }; -static NvBool __nvoc_thunk_GpuResource_profilerBaseShareCallback(struct ProfilerBase *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_profilerBaseCheckMemInterUnmap(struct ProfilerBase *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RsResource_profilerBaseMapTo(struct ProfilerBase *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_profilerBaseGetMapAddrSpace(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} - -static NvU32 __nvoc_thunk_RsResource_profilerBaseGetRefCount(struct ProfilerBase *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_profilerBaseAddAdditionalDependants(struct RsClient *pClient, struct ProfilerBase *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_profilerBaseControl_Prologue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_profilerBaseGetRegBaseOffsetAndSize(struct ProfilerBase *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), pGpu, pOffset, pSize); -} - -static NV_STATUS __nvoc_thunk_GpuResource_profilerBaseInternalControlForward(struct ProfilerBase *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), command, pParams, size); -} - -static NV_STATUS __nvoc_thunk_RsResource_profilerBaseUnmapFrom(struct ProfilerBase *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_profilerBaseControl_Epilogue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), pCallContext, pParams); -} - -static NvHandle __nvoc_thunk_GpuResource_profilerBaseGetInternalObjectHandle(struct ProfilerBase *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_profilerBaseControl(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_profilerBaseUnmap(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_profilerBaseGetMemInterMapParams(struct ProfilerBase *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_profilerBaseGetMemoryMappingDescriptor(struct ProfilerBase *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_profilerBaseControlFilter(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_profilerBaseControlSerialization_Prologue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_profilerBaseCanCopy(struct ProfilerBase *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_profilerBaseIsPartialUnmapSupported(struct ProfilerBase *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_profilerBasePreDestruct(struct ProfilerBase *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_profilerBaseIsDuplicate(struct ProfilerBase *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_profilerBaseControlSerialization_Epilogue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_profilerBaseMap(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_profilerBaseAccessCallback(struct ProfilerBase *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -200,12 +100,12 @@ static NvBool __nvoc_thunk_RmResource_profilerBaseAccessCallback(struct Profiler static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ProfilerBase[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2010u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdReserveHwpmLegacy_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2010u) - /*flags=*/ 0x2010u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) + /*flags=*/ 0x208u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0101u, /*paramSize=*/ sizeof(NVB0CC_CTRL_RESERVE_HWPM_LEGACY_PARAMS), @@ -215,12 +115,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdReleaseHwpmLegacy_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0102u, /*paramSize=*/ 0, @@ -230,12 +130,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdReservePmAreaSmpc_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0103u, /*paramSize=*/ sizeof(NVB0CC_CTRL_RESERVE_PM_AREA_SMPC_PARAMS), @@ -245,12 +145,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdReleasePmAreaSmpc_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0104u, /*paramSize=*/ 0, @@ -260,12 +160,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdAllocPmaStream_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0105u, /*paramSize=*/ sizeof(NVB0CC_CTRL_ALLOC_PMA_STREAM_PARAMS), @@ -275,12 +175,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [5] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdFreePmaStream_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0106u, /*paramSize=*/ sizeof(NVB0CC_CTRL_FREE_PMA_STREAM_PARAMS), @@ -290,12 +190,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [6] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdBindPmResources_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0107u, /*paramSize=*/ 0, @@ -305,12 +205,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [7] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdUnbindPmResources_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0108u, /*paramSize=*/ 0, @@ -320,12 +220,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [8] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdPmaStreamUpdateGetPut_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0109u, /*paramSize=*/ sizeof(NVB0CC_CTRL_PMA_STREAM_UPDATE_GET_PUT_PARAMS), @@ -335,12 +235,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [9] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdExecRegops_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc010au, /*paramSize=*/ sizeof(NVB0CC_CTRL_EXEC_REG_OPS_PARAMS), @@ -350,12 +250,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [10] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdReservePmAreaPcSampler_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc010bu, /*paramSize=*/ 0, @@ -365,12 +265,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [11] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdReleasePmAreaPcSampler_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc010cu, /*paramSize=*/ 0, @@ -380,12 +280,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [12] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdGetTotalHsCredits_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc010du, /*paramSize=*/ sizeof(NVB0CC_CTRL_GET_TOTAL_HS_CREDITS_PARAMS), @@ -395,12 +295,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [13] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdSetHsCredits_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc010eu, /*paramSize=*/ sizeof(NVB0CC_CTRL_SET_HS_CREDITS_PARAMS), @@ -410,12 +310,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [14] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdGetHsCredits_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc010fu, /*paramSize=*/ sizeof(NVB0CC_CTRL_GET_HS_CREDITS_PARAMS), @@ -425,12 +325,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [15] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdReserveHes_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0113u, /*paramSize=*/ sizeof(NVB0CC_CTRL_RESERVE_HES_PARAMS), @@ -440,12 +340,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [16] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdReleaseHes_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0114u, /*paramSize=*/ sizeof(NVB0CC_CTRL_RELEASE_HES_PARAMS), @@ -455,12 +355,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [17] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdDisableDynamicMMABoost_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0117u, /*paramSize=*/ sizeof(NVB0CC_CTRL_DISABLE_DYNAMIC_MMA_BOOST_PARAMS), @@ -470,12 +370,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [18] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdGetDynamicMMABoostStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0118u, /*paramSize=*/ sizeof(NVB0CC_CTRL_GET_DYNAMIC_MMA_BOOST_STATUS_PARAMS), @@ -485,12 +385,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [19] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdInternalQuiescePmaChannel_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0201u, /*paramSize=*/ sizeof(NVB0CC_CTRL_INTERNAL_QUIESCE_PMA_CHANNEL_PARAMS), @@ -500,12 +400,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [20] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400010u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40008u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdInternalSriovPromotePmaStream_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400010u) - /*flags=*/ 0x400010u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40008u) + /*flags=*/ 0x40008u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0202u, /*paramSize=*/ sizeof(NVB0CC_CTRL_INTERNAL_SRIOV_PROMOTE_PMA_STREAM_PARAMS), @@ -515,12 +415,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [21] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdInternalPermissionsInit_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0203u, /*paramSize=*/ sizeof(NVB0CC_CTRL_INTERNAL_PERMISSIONS_INIT_PARAMS), @@ -530,12 +430,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [22] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400610u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdInternalAllocPmaStream_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400610u) - /*flags=*/ 0x400610u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c8u) + /*flags=*/ 0x400c8u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0204u, /*paramSize=*/ sizeof(NVB0CC_CTRL_INTERNAL_ALLOC_PMA_STREAM_PARAMS), @@ -545,12 +445,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [23] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400610u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdInternalFreePmaStream_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400610u) - /*flags=*/ 0x400610u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c8u) + /*flags=*/ 0x400c8u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0206u, /*paramSize=*/ sizeof(NVB0CC_CTRL_INTERNAL_FREE_PMA_STREAM_PARAMS), @@ -560,12 +460,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [24] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400610u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdInternalGetMaxPmas_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400610u) - /*flags=*/ 0x400610u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c8u) + /*flags=*/ 0x400c8u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0207u, /*paramSize=*/ sizeof(NVB0CC_CTRL_INTERNAL_GET_MAX_PMAS_PARAMS), @@ -575,12 +475,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [25] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdInternalBindPmResources_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) - /*flags=*/ 0x610u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) + /*flags=*/ 0xc8u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0208u, /*paramSize=*/ 0, @@ -590,12 +490,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [26] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdInternalUnbindPmResources_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) - /*flags=*/ 0x610u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) + /*flags=*/ 0xc8u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0209u, /*paramSize=*/ 0, @@ -605,12 +505,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [27] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdInternalReserveHwpmLegacy_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) - /*flags=*/ 0x610u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) + /*flags=*/ 0xc8u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc020au, /*paramSize=*/ sizeof(NVB0CC_CTRL_INTERNAL_RESERVE_HWPM_LEGACY_PARAMS), @@ -620,12 +520,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [28] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdRequestCgControls_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0301u, /*paramSize=*/ sizeof(NVB0CC_CTRL_POWER_REQUEST_FEATURES_PARAMS), @@ -635,12 +535,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler #endif }, { /* [29] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) profilerBaseCtrlCmdReleaseCgControls_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0xb0cc0302u, /*paramSize=*/ sizeof(NVB0CC_CTRL_POWER_RELEASE_FEATURES_PARAMS), @@ -652,6 +552,134 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler }; +// 25 up-thunk(s) defined to bridge methods in ProfilerBase to superclasses + +// profilerBaseControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseControl(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), pCallContext, pParams); +} + +// profilerBaseMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseMap(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// profilerBaseUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseUnmap(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), pCallContext, pCpuMapping); +} + +// profilerBaseShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_profilerBaseShareCallback(struct ProfilerBase *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// profilerBaseGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseGetRegBaseOffsetAndSize(struct ProfilerBase *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), pGpu, pOffset, pSize); +} + +// profilerBaseGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseGetMapAddrSpace(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + +// profilerBaseInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseInternalControlForward(struct ProfilerBase *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), command, pParams, size); +} + +// profilerBaseGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_profilerBaseGetInternalObjectHandle(struct ProfilerBase *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset)); +} + +// profilerBaseAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_profilerBaseAccessCallback(struct ProfilerBase *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// profilerBaseGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseGetMemInterMapParams(struct ProfilerBase *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), pParams); +} + +// profilerBaseCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseCheckMemInterUnmap(struct ProfilerBase *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), bSubdeviceHandleProvided); +} + +// profilerBaseGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseGetMemoryMappingDescriptor(struct ProfilerBase *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), ppMemDesc); +} + +// profilerBaseControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Prologue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), pCallContext, pParams); +} + +// profilerBaseControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Epilogue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), pCallContext, pParams); +} + +// profilerBaseControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseControl_Prologue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), pCallContext, pParams); +} + +// profilerBaseControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_profilerBaseControl_Epilogue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), pCallContext, pParams); +} + +// profilerBaseCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_profilerBaseCanCopy(struct ProfilerBase *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset)); +} + +// profilerBaseIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseIsDuplicate(struct ProfilerBase *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset), hMemory, pDuplicate); +} + +// profilerBasePreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_profilerBasePreDestruct(struct ProfilerBase *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset)); +} + +// profilerBaseControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseControlFilter(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset), pCallContext, pParams); +} + +// profilerBaseIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_profilerBaseIsPartialUnmapSupported(struct ProfilerBase *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset)); +} + +// profilerBaseMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseMapTo(struct ProfilerBase *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset), pParams); +} + +// profilerBaseUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseUnmapFrom(struct ProfilerBase *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset), pParams); +} + +// profilerBaseGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_profilerBaseGetRefCount(struct ProfilerBase *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset)); +} + +// profilerBaseAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_profilerBaseAddAdditionalDependants(struct RsClient *pClient, struct ProfilerBase *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset), pReference); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_ProfilerBase = { /*numEntries=*/ 30, @@ -693,6 +721,7 @@ NV_STATUS __nvoc_ctor_ProfilerBase(ProfilerBase *pThis, RmHalspecOwner *pRmhalsp return status; } +// Vtable initialization static void __nvoc_init_funcTable_ProfilerBase_1(ProfilerBase *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -701,7 +730,7 @@ static void __nvoc_init_funcTable_ProfilerBase_1(ProfilerBase *pThis, RmHalspecO PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // Hal function -- profilerBaseConstructState + // profilerBaseConstructState -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__profilerBaseConstructState__ = &profilerBaseConstructState_IMPL; @@ -711,7 +740,7 @@ static void __nvoc_init_funcTable_ProfilerBase_1(ProfilerBase *pThis, RmHalspecO pThis->__profilerBaseConstructState__ = &profilerBaseConstructState_56cd7a; } - // Hal function -- profilerBaseDestructState + // profilerBaseDestructState -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__profilerBaseDestructState__ = &profilerBaseDestructState_VF; @@ -721,35 +750,42 @@ static void __nvoc_init_funcTable_ProfilerBase_1(ProfilerBase *pThis, RmHalspecO pThis->__profilerBaseDestructState__ = &profilerBaseDestructState_b3696a; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2010u) + // profilerBaseCtrlCmdReserveHwpmLegacy -- exported (id=0xb0cc0101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) pThis->__profilerBaseCtrlCmdReserveHwpmLegacy__ = &profilerBaseCtrlCmdReserveHwpmLegacy_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) + // profilerBaseCtrlCmdInternalReserveHwpmLegacy -- exported (id=0xb0cc020a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) pThis->__profilerBaseCtrlCmdInternalReserveHwpmLegacy__ = &profilerBaseCtrlCmdInternalReserveHwpmLegacy_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // profilerBaseCtrlCmdReleaseHwpmLegacy -- exported (id=0xb0cc0102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__profilerBaseCtrlCmdReleaseHwpmLegacy__ = &profilerBaseCtrlCmdReleaseHwpmLegacy_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // profilerBaseCtrlCmdReservePmAreaSmpc -- exported (id=0xb0cc0103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__profilerBaseCtrlCmdReservePmAreaSmpc__ = &profilerBaseCtrlCmdReservePmAreaSmpc_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // profilerBaseCtrlCmdReleasePmAreaSmpc -- exported (id=0xb0cc0104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__profilerBaseCtrlCmdReleasePmAreaSmpc__ = &profilerBaseCtrlCmdReleasePmAreaSmpc_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // profilerBaseCtrlCmdAllocPmaStream -- exported (id=0xb0cc0105) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__profilerBaseCtrlCmdAllocPmaStream__ = &profilerBaseCtrlCmdAllocPmaStream_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // profilerBaseCtrlCmdFreePmaStream -- exported (id=0xb0cc0106) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__profilerBaseCtrlCmdFreePmaStream__ = &profilerBaseCtrlCmdFreePmaStream_IMPL; #endif - // Hal function -- profilerBaseCtrlCmdInternalFreePmaStream + // profilerBaseCtrlCmdInternalFreePmaStream -- halified (2 hals) exported (id=0xb0cc0206) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__profilerBaseCtrlCmdInternalFreePmaStream__ = &profilerBaseCtrlCmdInternalFreePmaStream_VF; @@ -759,27 +795,32 @@ static void __nvoc_init_funcTable_ProfilerBase_1(ProfilerBase *pThis, RmHalspecO pThis->__profilerBaseCtrlCmdInternalFreePmaStream__ = &profilerBaseCtrlCmdInternalFreePmaStream_56cd7a; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400610u) + // profilerBaseCtrlCmdInternalGetMaxPmas -- exported (id=0xb0cc0207) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c8u) pThis->__profilerBaseCtrlCmdInternalGetMaxPmas__ = &profilerBaseCtrlCmdInternalGetMaxPmas_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // profilerBaseCtrlCmdBindPmResources -- exported (id=0xb0cc0107) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__profilerBaseCtrlCmdBindPmResources__ = &profilerBaseCtrlCmdBindPmResources_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // profilerBaseCtrlCmdUnbindPmResources -- exported (id=0xb0cc0108) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__profilerBaseCtrlCmdUnbindPmResources__ = &profilerBaseCtrlCmdUnbindPmResources_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) + // profilerBaseCtrlCmdInternalBindPmResources -- exported (id=0xb0cc0208) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) pThis->__profilerBaseCtrlCmdInternalBindPmResources__ = &profilerBaseCtrlCmdInternalBindPmResources_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) + // profilerBaseCtrlCmdInternalUnbindPmResources -- exported (id=0xb0cc0209) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) pThis->__profilerBaseCtrlCmdInternalUnbindPmResources__ = &profilerBaseCtrlCmdInternalUnbindPmResources_IMPL; #endif - // Hal function -- profilerBaseCtrlCmdPmaStreamUpdateGetPut + // profilerBaseCtrlCmdPmaStreamUpdateGetPut -- halified (2 hals) exported (id=0xb0cc0109) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__profilerBaseCtrlCmdPmaStreamUpdateGetPut__ = &profilerBaseCtrlCmdPmaStreamUpdateGetPut_VF; @@ -789,11 +830,12 @@ static void __nvoc_init_funcTable_ProfilerBase_1(ProfilerBase *pThis, RmHalspecO pThis->__profilerBaseCtrlCmdPmaStreamUpdateGetPut__ = &profilerBaseCtrlCmdPmaStreamUpdateGetPut_56cd7a; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // profilerBaseCtrlCmdExecRegops -- exported (id=0xb0cc010a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__profilerBaseCtrlCmdExecRegops__ = &profilerBaseCtrlCmdExecRegops_IMPL; #endif - // Hal function -- profilerBaseCtrlCmdInternalAllocPmaStream + // profilerBaseCtrlCmdInternalAllocPmaStream -- halified (2 hals) exported (id=0xb0cc0204) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__profilerBaseCtrlCmdInternalAllocPmaStream__ = &profilerBaseCtrlCmdInternalAllocPmaStream_VF; @@ -803,11 +845,12 @@ static void __nvoc_init_funcTable_ProfilerBase_1(ProfilerBase *pThis, RmHalspecO pThis->__profilerBaseCtrlCmdInternalAllocPmaStream__ = &profilerBaseCtrlCmdInternalAllocPmaStream_56cd7a; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // profilerBaseCtrlCmdInternalQuiescePmaChannel -- exported (id=0xb0cc0201) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__profilerBaseCtrlCmdInternalQuiescePmaChannel__ = &profilerBaseCtrlCmdInternalQuiescePmaChannel_IMPL; #endif - // Hal function -- profilerBaseCtrlCmdInternalSriovPromotePmaStream + // profilerBaseCtrlCmdInternalSriovPromotePmaStream -- halified (2 hals) exported (id=0xb0cc0202) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__profilerBaseCtrlCmdInternalSriovPromotePmaStream__ = &profilerBaseCtrlCmdInternalSriovPromotePmaStream_VF; @@ -817,39 +860,47 @@ static void __nvoc_init_funcTable_ProfilerBase_1(ProfilerBase *pThis, RmHalspecO pThis->__profilerBaseCtrlCmdInternalSriovPromotePmaStream__ = &profilerBaseCtrlCmdInternalSriovPromotePmaStream_108313; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // profilerBaseCtrlCmdInternalPermissionsInit -- exported (id=0xb0cc0203) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__profilerBaseCtrlCmdInternalPermissionsInit__ = &profilerBaseCtrlCmdInternalPermissionsInit_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // profilerBaseCtrlCmdReservePmAreaPcSampler -- exported (id=0xb0cc010b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__profilerBaseCtrlCmdReservePmAreaPcSampler__ = &profilerBaseCtrlCmdReservePmAreaPcSampler_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // profilerBaseCtrlCmdReleasePmAreaPcSampler -- exported (id=0xb0cc010c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__profilerBaseCtrlCmdReleasePmAreaPcSampler__ = &profilerBaseCtrlCmdReleasePmAreaPcSampler_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // profilerBaseCtrlCmdGetTotalHsCredits -- exported (id=0xb0cc010d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__profilerBaseCtrlCmdGetTotalHsCredits__ = &profilerBaseCtrlCmdGetTotalHsCredits_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // profilerBaseCtrlCmdGetHsCredits -- exported (id=0xb0cc010f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__profilerBaseCtrlCmdGetHsCredits__ = &profilerBaseCtrlCmdGetHsCredits_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // profilerBaseCtrlCmdSetHsCredits -- exported (id=0xb0cc010e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__profilerBaseCtrlCmdSetHsCredits__ = &profilerBaseCtrlCmdSetHsCredits_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // profilerBaseCtrlCmdReserveHes -- exported (id=0xb0cc0113) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__profilerBaseCtrlCmdReserveHes__ = &profilerBaseCtrlCmdReserveHes_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // profilerBaseCtrlCmdReleaseHes -- exported (id=0xb0cc0114) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__profilerBaseCtrlCmdReleaseHes__ = &profilerBaseCtrlCmdReleaseHes_IMPL; #endif - // Hal function -- profilerBaseCtrlCmdRequestCgControls + // profilerBaseCtrlCmdRequestCgControls -- halified (2 hals) exported (id=0xb0cc0301) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__profilerBaseCtrlCmdRequestCgControls__ = &profilerBaseCtrlCmdRequestCgControls_VF; @@ -859,7 +910,7 @@ static void __nvoc_init_funcTable_ProfilerBase_1(ProfilerBase *pThis, RmHalspecO pThis->__profilerBaseCtrlCmdRequestCgControls__ = &profilerBaseCtrlCmdRequestCgControls_92bfc3; } - // Hal function -- profilerBaseCtrlCmdReleaseCgControls + // profilerBaseCtrlCmdReleaseCgControls -- halified (2 hals) exported (id=0xb0cc0302) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__profilerBaseCtrlCmdReleaseCgControls__ = &profilerBaseCtrlCmdReleaseCgControls_56cd7a; @@ -869,66 +920,97 @@ static void __nvoc_init_funcTable_ProfilerBase_1(ProfilerBase *pThis, RmHalspecO pThis->__profilerBaseCtrlCmdReleaseCgControls__ = &profilerBaseCtrlCmdReleaseCgControls_92bfc3; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // profilerBaseCtrlCmdDisableDynamicMMABoost -- exported (id=0xb0cc0117) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__profilerBaseCtrlCmdDisableDynamicMMABoost__ = &profilerBaseCtrlCmdDisableDynamicMMABoost_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // profilerBaseCtrlCmdGetDynamicMMABoostStatus -- exported (id=0xb0cc0118) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__profilerBaseCtrlCmdGetDynamicMMABoostStatus__ = &profilerBaseCtrlCmdGetDynamicMMABoostStatus_IMPL; #endif - pThis->__profilerBaseShareCallback__ = &__nvoc_thunk_GpuResource_profilerBaseShareCallback; + // profilerBaseControl -- virtual inherited (gpures) base (gpures) + pThis->__profilerBaseControl__ = &__nvoc_up_thunk_GpuResource_profilerBaseControl; - pThis->__profilerBaseCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_profilerBaseCheckMemInterUnmap; + // profilerBaseMap -- virtual inherited (gpures) base (gpures) + pThis->__profilerBaseMap__ = &__nvoc_up_thunk_GpuResource_profilerBaseMap; - pThis->__profilerBaseMapTo__ = &__nvoc_thunk_RsResource_profilerBaseMapTo; + // profilerBaseUnmap -- virtual inherited (gpures) base (gpures) + pThis->__profilerBaseUnmap__ = &__nvoc_up_thunk_GpuResource_profilerBaseUnmap; - pThis->__profilerBaseGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_profilerBaseGetMapAddrSpace; + // profilerBaseShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__profilerBaseShareCallback__ = &__nvoc_up_thunk_GpuResource_profilerBaseShareCallback; - pThis->__profilerBaseGetRefCount__ = &__nvoc_thunk_RsResource_profilerBaseGetRefCount; + // profilerBaseGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__profilerBaseGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_profilerBaseGetRegBaseOffsetAndSize; - pThis->__profilerBaseAddAdditionalDependants__ = &__nvoc_thunk_RsResource_profilerBaseAddAdditionalDependants; + // profilerBaseGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__profilerBaseGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_profilerBaseGetMapAddrSpace; - pThis->__profilerBaseControl_Prologue__ = &__nvoc_thunk_RmResource_profilerBaseControl_Prologue; + // profilerBaseInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__profilerBaseInternalControlForward__ = &__nvoc_up_thunk_GpuResource_profilerBaseInternalControlForward; - pThis->__profilerBaseGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_profilerBaseGetRegBaseOffsetAndSize; + // profilerBaseGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__profilerBaseGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_profilerBaseGetInternalObjectHandle; - pThis->__profilerBaseInternalControlForward__ = &__nvoc_thunk_GpuResource_profilerBaseInternalControlForward; + // profilerBaseAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__profilerBaseAccessCallback__ = &__nvoc_up_thunk_RmResource_profilerBaseAccessCallback; - pThis->__profilerBaseUnmapFrom__ = &__nvoc_thunk_RsResource_profilerBaseUnmapFrom; + // profilerBaseGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__profilerBaseGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_profilerBaseGetMemInterMapParams; - pThis->__profilerBaseControl_Epilogue__ = &__nvoc_thunk_RmResource_profilerBaseControl_Epilogue; + // profilerBaseCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__profilerBaseCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_profilerBaseCheckMemInterUnmap; - pThis->__profilerBaseGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_profilerBaseGetInternalObjectHandle; + // profilerBaseGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__profilerBaseGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_profilerBaseGetMemoryMappingDescriptor; - pThis->__profilerBaseControl__ = &__nvoc_thunk_GpuResource_profilerBaseControl; + // profilerBaseControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__profilerBaseControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Prologue; - pThis->__profilerBaseUnmap__ = &__nvoc_thunk_GpuResource_profilerBaseUnmap; + // profilerBaseControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__profilerBaseControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Epilogue; - pThis->__profilerBaseGetMemInterMapParams__ = &__nvoc_thunk_RmResource_profilerBaseGetMemInterMapParams; + // profilerBaseControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__profilerBaseControl_Prologue__ = &__nvoc_up_thunk_RmResource_profilerBaseControl_Prologue; - pThis->__profilerBaseGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_profilerBaseGetMemoryMappingDescriptor; + // profilerBaseControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__profilerBaseControl_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerBaseControl_Epilogue; - pThis->__profilerBaseControlFilter__ = &__nvoc_thunk_RsResource_profilerBaseControlFilter; + // profilerBaseCanCopy -- virtual inherited (res) base (gpures) + pThis->__profilerBaseCanCopy__ = &__nvoc_up_thunk_RsResource_profilerBaseCanCopy; - pThis->__profilerBaseControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_profilerBaseControlSerialization_Prologue; + // profilerBaseIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__profilerBaseIsDuplicate__ = &__nvoc_up_thunk_RsResource_profilerBaseIsDuplicate; - pThis->__profilerBaseCanCopy__ = &__nvoc_thunk_RsResource_profilerBaseCanCopy; + // profilerBasePreDestruct -- virtual inherited (res) base (gpures) + pThis->__profilerBasePreDestruct__ = &__nvoc_up_thunk_RsResource_profilerBasePreDestruct; - pThis->__profilerBaseIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_profilerBaseIsPartialUnmapSupported; + // profilerBaseControlFilter -- virtual inherited (res) base (gpures) + pThis->__profilerBaseControlFilter__ = &__nvoc_up_thunk_RsResource_profilerBaseControlFilter; - pThis->__profilerBasePreDestruct__ = &__nvoc_thunk_RsResource_profilerBasePreDestruct; + // profilerBaseIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__profilerBaseIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_profilerBaseIsPartialUnmapSupported; - pThis->__profilerBaseIsDuplicate__ = &__nvoc_thunk_RsResource_profilerBaseIsDuplicate; + // profilerBaseMapTo -- virtual inherited (res) base (gpures) + pThis->__profilerBaseMapTo__ = &__nvoc_up_thunk_RsResource_profilerBaseMapTo; - pThis->__profilerBaseControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_profilerBaseControlSerialization_Epilogue; + // profilerBaseUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__profilerBaseUnmapFrom__ = &__nvoc_up_thunk_RsResource_profilerBaseUnmapFrom; - pThis->__profilerBaseMap__ = &__nvoc_thunk_GpuResource_profilerBaseMap; + // profilerBaseGetRefCount -- virtual inherited (res) base (gpures) + pThis->__profilerBaseGetRefCount__ = &__nvoc_up_thunk_RsResource_profilerBaseGetRefCount; + + // profilerBaseAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__profilerBaseAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_profilerBaseAddAdditionalDependants; +} // End __nvoc_init_funcTable_ProfilerBase_1 with approximately 65 basic block(s). - pThis->__profilerBaseAccessCallback__ = &__nvoc_thunk_RmResource_profilerBaseAccessCallback; -} +// Initialize vtable(s) for 57 virtual method(s). void __nvoc_init_funcTable_ProfilerBase(ProfilerBase *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 57 per-object function pointer(s). __nvoc_init_funcTable_ProfilerBase_1(pThis, pRmhalspecowner); } @@ -1115,106 +1197,134 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_ProfilerDev = /*pExportInfo=*/ &__nvoc_export_info_ProfilerDev }; -static NvBool __nvoc_thunk_GpuResource_profilerDevShareCallback(struct ProfilerDev *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// 25 up-thunk(s) defined to bridge methods in ProfilerDev to superclasses + +// profilerDevControl: virtual inherited (gpures) base (profilerBase) +static NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevControl(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_profilerDevCheckMemInterUnmap(struct ProfilerDev *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), bSubdeviceHandleProvided); +// profilerDevMap: virtual inherited (gpures) base (profilerBase) +static NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevMap(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_profilerDevMapTo(struct ProfilerDev *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset), pParams); +// profilerDevUnmap: virtual inherited (gpures) base (profilerBase) +static NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevUnmap(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_GpuResource_profilerDevGetMapAddrSpace(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// profilerDevShareCallback: virtual inherited (gpures) base (profilerBase) +static NvBool __nvoc_up_thunk_GpuResource_profilerDevShareCallback(struct ProfilerDev *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NvU32 __nvoc_thunk_RsResource_profilerDevGetRefCount(struct ProfilerDev *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset)); +// profilerDevGetRegBaseOffsetAndSize: virtual inherited (gpures) base (profilerBase) +static NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevGetRegBaseOffsetAndSize(struct ProfilerDev *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), pGpu, pOffset, pSize); } -static void __nvoc_thunk_RsResource_profilerDevAddAdditionalDependants(struct RsClient *pClient, struct ProfilerDev *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset), pReference); +// profilerDevGetMapAddrSpace: virtual inherited (gpures) base (profilerBase) +static NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevGetMapAddrSpace(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_RmResource_profilerDevControl_Prologue(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), pCallContext, pParams); +// profilerDevInternalControlForward: virtual inherited (gpures) base (profilerBase) +static NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevInternalControlForward(struct ProfilerDev *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_GpuResource_profilerDevGetRegBaseOffsetAndSize(struct ProfilerDev *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), pGpu, pOffset, pSize); +// profilerDevGetInternalObjectHandle: virtual inherited (gpures) base (profilerBase) +static NvHandle __nvoc_up_thunk_GpuResource_profilerDevGetInternalObjectHandle(struct ProfilerDev *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_profilerDevInternalControlForward(struct ProfilerDev *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), command, pParams, size); +// profilerDevAccessCallback: virtual inherited (rmres) base (profilerBase) +static NvBool __nvoc_up_thunk_RmResource_profilerDevAccessCallback(struct ProfilerDev *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RsResource_profilerDevUnmapFrom(struct ProfilerDev *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset), pParams); +// profilerDevGetMemInterMapParams: virtual inherited (rmres) base (profilerBase) +static NV_STATUS __nvoc_up_thunk_RmResource_profilerDevGetMemInterMapParams(struct ProfilerDev *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), pParams); } -static void __nvoc_thunk_RmResource_profilerDevControl_Epilogue(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), pCallContext, pParams); +// profilerDevCheckMemInterUnmap: virtual inherited (rmres) base (profilerBase) +static NV_STATUS __nvoc_up_thunk_RmResource_profilerDevCheckMemInterUnmap(struct ProfilerDev *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), bSubdeviceHandleProvided); } -static NvHandle __nvoc_thunk_GpuResource_profilerDevGetInternalObjectHandle(struct ProfilerDev *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset)); +// profilerDevGetMemoryMappingDescriptor: virtual inherited (rmres) base (profilerBase) +static NV_STATUS __nvoc_up_thunk_RmResource_profilerDevGetMemoryMappingDescriptor(struct ProfilerDev *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_GpuResource_profilerDevControl(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), pCallContext, pParams); +// profilerDevControlSerialization_Prologue: virtual inherited (rmres) base (profilerBase) +static NV_STATUS __nvoc_up_thunk_RmResource_profilerDevControlSerialization_Prologue(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_profilerDevUnmap(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), pCallContext, pCpuMapping); +// profilerDevControlSerialization_Epilogue: virtual inherited (rmres) base (profilerBase) +static void __nvoc_up_thunk_RmResource_profilerDevControlSerialization_Epilogue(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_profilerDevGetMemInterMapParams(struct ProfilerDev *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), pParams); +// profilerDevControl_Prologue: virtual inherited (rmres) base (profilerBase) +static NV_STATUS __nvoc_up_thunk_RmResource_profilerDevControl_Prologue(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_profilerDevGetMemoryMappingDescriptor(struct ProfilerDev *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), ppMemDesc); +// profilerDevControl_Epilogue: virtual inherited (rmres) base (profilerBase) +static void __nvoc_up_thunk_RmResource_profilerDevControl_Epilogue(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_profilerDevControlFilter(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset), pCallContext, pParams); +// profilerDevCanCopy: virtual inherited (res) base (profilerBase) +static NvBool __nvoc_up_thunk_RsResource_profilerDevCanCopy(struct ProfilerDev *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RmResource_profilerDevControlSerialization_Prologue(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), pCallContext, pParams); +// profilerDevIsDuplicate: virtual inherited (res) base (profilerBase) +static NV_STATUS __nvoc_up_thunk_RsResource_profilerDevIsDuplicate(struct ProfilerDev *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_RsResource_profilerDevCanCopy(struct ProfilerDev *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset)); +// profilerDevPreDestruct: virtual inherited (res) base (profilerBase) +static void __nvoc_up_thunk_RsResource_profilerDevPreDestruct(struct ProfilerDev *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_profilerDevIsPartialUnmapSupported(struct ProfilerDev *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset)); +// profilerDevControlFilter: virtual inherited (res) base (profilerBase) +static NV_STATUS __nvoc_up_thunk_RsResource_profilerDevControlFilter(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_profilerDevPreDestruct(struct ProfilerDev *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset)); +// profilerDevIsPartialUnmapSupported: inline virtual inherited (res) base (profilerBase) body +static NvBool __nvoc_up_thunk_RsResource_profilerDevIsPartialUnmapSupported(struct ProfilerDev *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_profilerDevIsDuplicate(struct ProfilerDev *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset), hMemory, pDuplicate); +// profilerDevMapTo: virtual inherited (res) base (profilerBase) +static NV_STATUS __nvoc_up_thunk_RsResource_profilerDevMapTo(struct ProfilerDev *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_profilerDevControlSerialization_Epilogue(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), pCallContext, pParams); +// profilerDevUnmapFrom: virtual inherited (res) base (profilerBase) +static NV_STATUS __nvoc_up_thunk_RsResource_profilerDevUnmapFrom(struct ProfilerDev *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_profilerDevMap(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// profilerDevGetRefCount: virtual inherited (res) base (profilerBase) +static NvU32 __nvoc_up_thunk_RsResource_profilerDevGetRefCount(struct ProfilerDev *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_profilerDevAccessCallback(struct ProfilerDev *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// profilerDevAddAdditionalDependants: virtual inherited (res) base (profilerBase) +static void __nvoc_up_thunk_RsResource_profilerDevAddAdditionalDependants(struct RsClient *pClient, struct ProfilerDev *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_ProfilerDev = { /*numEntries=*/ 0, @@ -1256,6 +1366,7 @@ NV_STATUS __nvoc_ctor_ProfilerDev(ProfilerDev *pThis, RmHalspecOwner *pRmhalspec return status; } +// Vtable initialization static void __nvoc_init_funcTable_ProfilerDev_1(ProfilerDev *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -1264,7 +1375,7 @@ static void __nvoc_init_funcTable_ProfilerDev_1(ProfilerDev *pThis, RmHalspecOwn PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // Hal function -- profilerDevConstructState + // profilerDevConstructState -- halified (2 hals) override (profilerBase) base (profilerBase) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__profilerDevConstructState__ = &profilerDevConstructState_VF; @@ -1274,7 +1385,7 @@ static void __nvoc_init_funcTable_ProfilerDev_1(ProfilerDev *pThis, RmHalspecOwn pThis->__profilerDevConstructState__ = &profilerDevConstructState_IMPL; } - // Hal function -- profilerDevConstructStatePrologue + // profilerDevConstructStatePrologue -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__profilerDevConstructStatePrologue__ = &profilerDevConstructStatePrologue_92bfc3; @@ -1284,7 +1395,7 @@ static void __nvoc_init_funcTable_ProfilerDev_1(ProfilerDev *pThis, RmHalspecOwn pThis->__profilerDevConstructStatePrologue__ = &profilerDevConstructStatePrologue_FWCLIENT; } - // Hal function -- profilerDevConstructStateInterlude + // profilerDevConstructStateInterlude -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__profilerDevConstructStateInterlude__ = &profilerDevConstructStateInterlude_92bfc3; @@ -1294,17 +1405,17 @@ static void __nvoc_init_funcTable_ProfilerDev_1(ProfilerDev *pThis, RmHalspecOwn pThis->__profilerDevConstructStateInterlude__ = &profilerDevConstructStateInterlude_IMPL; } - // Hal function -- profilerDevConstructStateEpilogue + // profilerDevConstructStateEpilogue -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__profilerDevConstructStateEpilogue__ = &profilerDevConstructStateEpilogue_92bfc3; } else { - pThis->__profilerDevConstructStateEpilogue__ = &profilerDevConstructStateEpilogue_56cd7a; + pThis->__profilerDevConstructStateEpilogue__ = &profilerDevConstructStateEpilogue_FWCLIENT; } - // Hal function -- profilerDevDestructState + // profilerDevDestructState -- halified (2 hals) override (profilerBase) base (profilerBase) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__profilerDevDestructState__ = &profilerDevDestructState_b3696a; @@ -1314,58 +1425,87 @@ static void __nvoc_init_funcTable_ProfilerDev_1(ProfilerDev *pThis, RmHalspecOwn pThis->__profilerDevDestructState__ = &profilerDevDestructState_FWCLIENT; } - pThis->__profilerDevShareCallback__ = &__nvoc_thunk_GpuResource_profilerDevShareCallback; + // profilerDevControl -- virtual inherited (gpures) base (profilerBase) + pThis->__profilerDevControl__ = &__nvoc_up_thunk_GpuResource_profilerDevControl; - pThis->__profilerDevCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_profilerDevCheckMemInterUnmap; + // profilerDevMap -- virtual inherited (gpures) base (profilerBase) + pThis->__profilerDevMap__ = &__nvoc_up_thunk_GpuResource_profilerDevMap; - pThis->__profilerDevMapTo__ = &__nvoc_thunk_RsResource_profilerDevMapTo; + // profilerDevUnmap -- virtual inherited (gpures) base (profilerBase) + pThis->__profilerDevUnmap__ = &__nvoc_up_thunk_GpuResource_profilerDevUnmap; - pThis->__profilerDevGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_profilerDevGetMapAddrSpace; + // profilerDevShareCallback -- virtual inherited (gpures) base (profilerBase) + pThis->__profilerDevShareCallback__ = &__nvoc_up_thunk_GpuResource_profilerDevShareCallback; - pThis->__profilerDevGetRefCount__ = &__nvoc_thunk_RsResource_profilerDevGetRefCount; + // profilerDevGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (profilerBase) + pThis->__profilerDevGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_profilerDevGetRegBaseOffsetAndSize; - pThis->__profilerDevAddAdditionalDependants__ = &__nvoc_thunk_RsResource_profilerDevAddAdditionalDependants; + // profilerDevGetMapAddrSpace -- virtual inherited (gpures) base (profilerBase) + pThis->__profilerDevGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_profilerDevGetMapAddrSpace; - pThis->__profilerDevControl_Prologue__ = &__nvoc_thunk_RmResource_profilerDevControl_Prologue; + // profilerDevInternalControlForward -- virtual inherited (gpures) base (profilerBase) + pThis->__profilerDevInternalControlForward__ = &__nvoc_up_thunk_GpuResource_profilerDevInternalControlForward; - pThis->__profilerDevGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_profilerDevGetRegBaseOffsetAndSize; + // profilerDevGetInternalObjectHandle -- virtual inherited (gpures) base (profilerBase) + pThis->__profilerDevGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_profilerDevGetInternalObjectHandle; - pThis->__profilerDevInternalControlForward__ = &__nvoc_thunk_GpuResource_profilerDevInternalControlForward; + // profilerDevAccessCallback -- virtual inherited (rmres) base (profilerBase) + pThis->__profilerDevAccessCallback__ = &__nvoc_up_thunk_RmResource_profilerDevAccessCallback; - pThis->__profilerDevUnmapFrom__ = &__nvoc_thunk_RsResource_profilerDevUnmapFrom; + // profilerDevGetMemInterMapParams -- virtual inherited (rmres) base (profilerBase) + pThis->__profilerDevGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_profilerDevGetMemInterMapParams; - pThis->__profilerDevControl_Epilogue__ = &__nvoc_thunk_RmResource_profilerDevControl_Epilogue; + // profilerDevCheckMemInterUnmap -- virtual inherited (rmres) base (profilerBase) + pThis->__profilerDevCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_profilerDevCheckMemInterUnmap; - pThis->__profilerDevGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_profilerDevGetInternalObjectHandle; + // profilerDevGetMemoryMappingDescriptor -- virtual inherited (rmres) base (profilerBase) + pThis->__profilerDevGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_profilerDevGetMemoryMappingDescriptor; - pThis->__profilerDevControl__ = &__nvoc_thunk_GpuResource_profilerDevControl; + // profilerDevControlSerialization_Prologue -- virtual inherited (rmres) base (profilerBase) + pThis->__profilerDevControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_profilerDevControlSerialization_Prologue; - pThis->__profilerDevUnmap__ = &__nvoc_thunk_GpuResource_profilerDevUnmap; + // profilerDevControlSerialization_Epilogue -- virtual inherited (rmres) base (profilerBase) + pThis->__profilerDevControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerDevControlSerialization_Epilogue; - pThis->__profilerDevGetMemInterMapParams__ = &__nvoc_thunk_RmResource_profilerDevGetMemInterMapParams; + // profilerDevControl_Prologue -- virtual inherited (rmres) base (profilerBase) + pThis->__profilerDevControl_Prologue__ = &__nvoc_up_thunk_RmResource_profilerDevControl_Prologue; - pThis->__profilerDevGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_profilerDevGetMemoryMappingDescriptor; + // profilerDevControl_Epilogue -- virtual inherited (rmres) base (profilerBase) + pThis->__profilerDevControl_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerDevControl_Epilogue; - pThis->__profilerDevControlFilter__ = &__nvoc_thunk_RsResource_profilerDevControlFilter; + // profilerDevCanCopy -- virtual inherited (res) base (profilerBase) + pThis->__profilerDevCanCopy__ = &__nvoc_up_thunk_RsResource_profilerDevCanCopy; - pThis->__profilerDevControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_profilerDevControlSerialization_Prologue; + // profilerDevIsDuplicate -- virtual inherited (res) base (profilerBase) + pThis->__profilerDevIsDuplicate__ = &__nvoc_up_thunk_RsResource_profilerDevIsDuplicate; - pThis->__profilerDevCanCopy__ = &__nvoc_thunk_RsResource_profilerDevCanCopy; + // profilerDevPreDestruct -- virtual inherited (res) base (profilerBase) + pThis->__profilerDevPreDestruct__ = &__nvoc_up_thunk_RsResource_profilerDevPreDestruct; - pThis->__profilerDevIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_profilerDevIsPartialUnmapSupported; + // profilerDevControlFilter -- virtual inherited (res) base (profilerBase) + pThis->__profilerDevControlFilter__ = &__nvoc_up_thunk_RsResource_profilerDevControlFilter; - pThis->__profilerDevPreDestruct__ = &__nvoc_thunk_RsResource_profilerDevPreDestruct; + // profilerDevIsPartialUnmapSupported -- inline virtual inherited (res) base (profilerBase) body + pThis->__profilerDevIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_profilerDevIsPartialUnmapSupported; - pThis->__profilerDevIsDuplicate__ = &__nvoc_thunk_RsResource_profilerDevIsDuplicate; + // profilerDevMapTo -- virtual inherited (res) base (profilerBase) + pThis->__profilerDevMapTo__ = &__nvoc_up_thunk_RsResource_profilerDevMapTo; - pThis->__profilerDevControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_profilerDevControlSerialization_Epilogue; + // profilerDevUnmapFrom -- virtual inherited (res) base (profilerBase) + pThis->__profilerDevUnmapFrom__ = &__nvoc_up_thunk_RsResource_profilerDevUnmapFrom; - pThis->__profilerDevMap__ = &__nvoc_thunk_GpuResource_profilerDevMap; + // profilerDevGetRefCount -- virtual inherited (res) base (profilerBase) + pThis->__profilerDevGetRefCount__ = &__nvoc_up_thunk_RsResource_profilerDevGetRefCount; + + // profilerDevAddAdditionalDependants -- virtual inherited (res) base (profilerBase) + pThis->__profilerDevAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_profilerDevAddAdditionalDependants; +} // End __nvoc_init_funcTable_ProfilerDev_1 with approximately 35 basic block(s). - pThis->__profilerDevAccessCallback__ = &__nvoc_thunk_RmResource_profilerDevAccessCallback; -} +// Initialize vtable(s) for 30 virtual method(s). void __nvoc_init_funcTable_ProfilerDev(ProfilerDev *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 30 per-object function pointer(s). __nvoc_init_funcTable_ProfilerDev_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_profiler_v2_nvoc.h b/src/nvidia/generated/g_profiler_v2_nvoc.h index 6811876b64..d8f0d3c4f3 100644 --- a/src/nvidia/generated/g_profiler_v2_nvoc.h +++ b/src/nvidia/generated/g_profiler_v2_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_PROFILER_V2_NVOC_H_ #define _G_PROFILER_V2_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_profiler_v2_nvoc.h" #ifndef PROFILER_V2_H @@ -63,72 +71,83 @@ typedef struct #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct ProfilerBase { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct ProfilerBase *__nvoc_pbase_ProfilerBase; - NV_STATUS (*__profilerBaseConstructState__)(struct ProfilerBase *, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); - void (*__profilerBaseDestructState__)(struct ProfilerBase *); - NV_STATUS (*__profilerBaseCtrlCmdReserveHwpmLegacy__)(struct ProfilerBase *, NVB0CC_CTRL_RESERVE_HWPM_LEGACY_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdInternalReserveHwpmLegacy__)(struct ProfilerBase *, NVB0CC_CTRL_INTERNAL_RESERVE_HWPM_LEGACY_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdReleaseHwpmLegacy__)(struct ProfilerBase *); - NV_STATUS (*__profilerBaseCtrlCmdReservePmAreaSmpc__)(struct ProfilerBase *, NVB0CC_CTRL_RESERVE_PM_AREA_SMPC_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdReleasePmAreaSmpc__)(struct ProfilerBase *); - NV_STATUS (*__profilerBaseCtrlCmdAllocPmaStream__)(struct ProfilerBase *, NVB0CC_CTRL_ALLOC_PMA_STREAM_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdFreePmaStream__)(struct ProfilerBase *, NVB0CC_CTRL_FREE_PMA_STREAM_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdInternalFreePmaStream__)(struct ProfilerBase *, NVB0CC_CTRL_INTERNAL_FREE_PMA_STREAM_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdInternalGetMaxPmas__)(struct ProfilerBase *, NVB0CC_CTRL_INTERNAL_GET_MAX_PMAS_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdBindPmResources__)(struct ProfilerBase *); - NV_STATUS (*__profilerBaseCtrlCmdUnbindPmResources__)(struct ProfilerBase *); - NV_STATUS (*__profilerBaseCtrlCmdInternalBindPmResources__)(struct ProfilerBase *); - NV_STATUS (*__profilerBaseCtrlCmdInternalUnbindPmResources__)(struct ProfilerBase *); - NV_STATUS (*__profilerBaseCtrlCmdPmaStreamUpdateGetPut__)(struct ProfilerBase *, NVB0CC_CTRL_PMA_STREAM_UPDATE_GET_PUT_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdExecRegops__)(struct ProfilerBase *, NVB0CC_CTRL_EXEC_REG_OPS_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdInternalAllocPmaStream__)(struct ProfilerBase *, NVB0CC_CTRL_INTERNAL_ALLOC_PMA_STREAM_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdInternalQuiescePmaChannel__)(struct ProfilerBase *, NVB0CC_CTRL_INTERNAL_QUIESCE_PMA_CHANNEL_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdInternalSriovPromotePmaStream__)(struct ProfilerBase *, NVB0CC_CTRL_INTERNAL_SRIOV_PROMOTE_PMA_STREAM_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdInternalPermissionsInit__)(struct ProfilerBase *, NVB0CC_CTRL_INTERNAL_PERMISSIONS_INIT_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdReservePmAreaPcSampler__)(struct ProfilerBase *); - NV_STATUS (*__profilerBaseCtrlCmdReleasePmAreaPcSampler__)(struct ProfilerBase *); - NV_STATUS (*__profilerBaseCtrlCmdGetTotalHsCredits__)(struct ProfilerBase *, NVB0CC_CTRL_GET_TOTAL_HS_CREDITS_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdGetHsCredits__)(struct ProfilerBase *, NVB0CC_CTRL_GET_HS_CREDITS_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdSetHsCredits__)(struct ProfilerBase *, NVB0CC_CTRL_SET_HS_CREDITS_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdReserveHes__)(struct ProfilerBase *, NVB0CC_CTRL_RESERVE_HES_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdReleaseHes__)(struct ProfilerBase *, NVB0CC_CTRL_RELEASE_HES_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdRequestCgControls__)(struct ProfilerBase *, NVB0CC_CTRL_POWER_REQUEST_FEATURES_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdReleaseCgControls__)(struct ProfilerBase *, NVB0CC_CTRL_POWER_RELEASE_FEATURES_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdDisableDynamicMMABoost__)(struct ProfilerBase *, NVB0CC_CTRL_DISABLE_DYNAMIC_MMA_BOOST_PARAMS *); - NV_STATUS (*__profilerBaseCtrlCmdGetDynamicMMABoostStatus__)(struct ProfilerBase *, NVB0CC_CTRL_GET_DYNAMIC_MMA_BOOST_STATUS_PARAMS *); - NvBool (*__profilerBaseShareCallback__)(struct ProfilerBase *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__profilerBaseCheckMemInterUnmap__)(struct ProfilerBase *, NvBool); - NV_STATUS (*__profilerBaseMapTo__)(struct ProfilerBase *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__profilerBaseGetMapAddrSpace__)(struct ProfilerBase *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__profilerBaseGetRefCount__)(struct ProfilerBase *); - void (*__profilerBaseAddAdditionalDependants__)(struct RsClient *, struct ProfilerBase *, RsResourceRef *); - NV_STATUS (*__profilerBaseControl_Prologue__)(struct ProfilerBase *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__profilerBaseGetRegBaseOffsetAndSize__)(struct ProfilerBase *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__profilerBaseInternalControlForward__)(struct ProfilerBase *, NvU32, void *, NvU32); - NV_STATUS (*__profilerBaseUnmapFrom__)(struct ProfilerBase *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__profilerBaseControl_Epilogue__)(struct ProfilerBase *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__profilerBaseGetInternalObjectHandle__)(struct ProfilerBase *); - NV_STATUS (*__profilerBaseControl__)(struct ProfilerBase *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__profilerBaseUnmap__)(struct ProfilerBase *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__profilerBaseGetMemInterMapParams__)(struct ProfilerBase *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__profilerBaseGetMemoryMappingDescriptor__)(struct ProfilerBase *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__profilerBaseControlFilter__)(struct ProfilerBase *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__profilerBaseControlSerialization_Prologue__)(struct ProfilerBase *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__profilerBaseCanCopy__)(struct ProfilerBase *); - NvBool (*__profilerBaseIsPartialUnmapSupported__)(struct ProfilerBase *); - void (*__profilerBasePreDestruct__)(struct ProfilerBase *); - NV_STATUS (*__profilerBaseIsDuplicate__)(struct ProfilerBase *, NvHandle, NvBool *); - void (*__profilerBaseControlSerialization_Epilogue__)(struct ProfilerBase *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__profilerBaseMap__)(struct ProfilerBase *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__profilerBaseAccessCallback__)(struct ProfilerBase *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct ProfilerBase *__nvoc_pbase_ProfilerBase; // profilerBase + + // Vtable with 57 per-object function pointers + NV_STATUS (*__profilerBaseConstructState__)(struct ProfilerBase * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // halified (2 hals) body + void (*__profilerBaseDestructState__)(struct ProfilerBase * /*this*/); // halified (2 hals) body + NV_STATUS (*__profilerBaseCtrlCmdReserveHwpmLegacy__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_RESERVE_HWPM_LEGACY_PARAMS *); // exported (id=0xb0cc0101) + NV_STATUS (*__profilerBaseCtrlCmdInternalReserveHwpmLegacy__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_INTERNAL_RESERVE_HWPM_LEGACY_PARAMS *); // exported (id=0xb0cc020a) + NV_STATUS (*__profilerBaseCtrlCmdReleaseHwpmLegacy__)(struct ProfilerBase * /*this*/); // exported (id=0xb0cc0102) + NV_STATUS (*__profilerBaseCtrlCmdReservePmAreaSmpc__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_RESERVE_PM_AREA_SMPC_PARAMS *); // exported (id=0xb0cc0103) + NV_STATUS (*__profilerBaseCtrlCmdReleasePmAreaSmpc__)(struct ProfilerBase * /*this*/); // exported (id=0xb0cc0104) + NV_STATUS (*__profilerBaseCtrlCmdAllocPmaStream__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_ALLOC_PMA_STREAM_PARAMS *); // exported (id=0xb0cc0105) + NV_STATUS (*__profilerBaseCtrlCmdFreePmaStream__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_FREE_PMA_STREAM_PARAMS *); // exported (id=0xb0cc0106) + NV_STATUS (*__profilerBaseCtrlCmdInternalFreePmaStream__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_INTERNAL_FREE_PMA_STREAM_PARAMS *); // halified (2 hals) exported (id=0xb0cc0206) body + NV_STATUS (*__profilerBaseCtrlCmdInternalGetMaxPmas__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_INTERNAL_GET_MAX_PMAS_PARAMS *); // exported (id=0xb0cc0207) + NV_STATUS (*__profilerBaseCtrlCmdBindPmResources__)(struct ProfilerBase * /*this*/); // exported (id=0xb0cc0107) + NV_STATUS (*__profilerBaseCtrlCmdUnbindPmResources__)(struct ProfilerBase * /*this*/); // exported (id=0xb0cc0108) + NV_STATUS (*__profilerBaseCtrlCmdInternalBindPmResources__)(struct ProfilerBase * /*this*/); // exported (id=0xb0cc0208) + NV_STATUS (*__profilerBaseCtrlCmdInternalUnbindPmResources__)(struct ProfilerBase * /*this*/); // exported (id=0xb0cc0209) + NV_STATUS (*__profilerBaseCtrlCmdPmaStreamUpdateGetPut__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_PMA_STREAM_UPDATE_GET_PUT_PARAMS *); // halified (2 hals) exported (id=0xb0cc0109) body + NV_STATUS (*__profilerBaseCtrlCmdExecRegops__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_EXEC_REG_OPS_PARAMS *); // exported (id=0xb0cc010a) + NV_STATUS (*__profilerBaseCtrlCmdInternalAllocPmaStream__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_INTERNAL_ALLOC_PMA_STREAM_PARAMS *); // halified (2 hals) exported (id=0xb0cc0204) body + NV_STATUS (*__profilerBaseCtrlCmdInternalQuiescePmaChannel__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_INTERNAL_QUIESCE_PMA_CHANNEL_PARAMS *); // exported (id=0xb0cc0201) + NV_STATUS (*__profilerBaseCtrlCmdInternalSriovPromotePmaStream__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_INTERNAL_SRIOV_PROMOTE_PMA_STREAM_PARAMS *); // halified (2 hals) exported (id=0xb0cc0202) body + NV_STATUS (*__profilerBaseCtrlCmdInternalPermissionsInit__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_INTERNAL_PERMISSIONS_INIT_PARAMS *); // exported (id=0xb0cc0203) + NV_STATUS (*__profilerBaseCtrlCmdReservePmAreaPcSampler__)(struct ProfilerBase * /*this*/); // exported (id=0xb0cc010b) + NV_STATUS (*__profilerBaseCtrlCmdReleasePmAreaPcSampler__)(struct ProfilerBase * /*this*/); // exported (id=0xb0cc010c) + NV_STATUS (*__profilerBaseCtrlCmdGetTotalHsCredits__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_GET_TOTAL_HS_CREDITS_PARAMS *); // exported (id=0xb0cc010d) + NV_STATUS (*__profilerBaseCtrlCmdGetHsCredits__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_GET_HS_CREDITS_PARAMS *); // exported (id=0xb0cc010f) + NV_STATUS (*__profilerBaseCtrlCmdSetHsCredits__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_SET_HS_CREDITS_PARAMS *); // exported (id=0xb0cc010e) + NV_STATUS (*__profilerBaseCtrlCmdReserveHes__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_RESERVE_HES_PARAMS *); // exported (id=0xb0cc0113) + NV_STATUS (*__profilerBaseCtrlCmdReleaseHes__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_RELEASE_HES_PARAMS *); // exported (id=0xb0cc0114) + NV_STATUS (*__profilerBaseCtrlCmdRequestCgControls__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_POWER_REQUEST_FEATURES_PARAMS *); // halified (2 hals) exported (id=0xb0cc0301) body + NV_STATUS (*__profilerBaseCtrlCmdReleaseCgControls__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_POWER_RELEASE_FEATURES_PARAMS *); // halified (2 hals) exported (id=0xb0cc0302) body + NV_STATUS (*__profilerBaseCtrlCmdDisableDynamicMMABoost__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_DISABLE_DYNAMIC_MMA_BOOST_PARAMS *); // exported (id=0xb0cc0117) + NV_STATUS (*__profilerBaseCtrlCmdGetDynamicMMABoostStatus__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_GET_DYNAMIC_MMA_BOOST_STATUS_PARAMS *); // exported (id=0xb0cc0118) + NV_STATUS (*__profilerBaseControl__)(struct ProfilerBase * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__profilerBaseMap__)(struct ProfilerBase * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__profilerBaseUnmap__)(struct ProfilerBase * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__profilerBaseShareCallback__)(struct ProfilerBase * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__profilerBaseGetRegBaseOffsetAndSize__)(struct ProfilerBase * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__profilerBaseGetMapAddrSpace__)(struct ProfilerBase * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__profilerBaseInternalControlForward__)(struct ProfilerBase * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__profilerBaseGetInternalObjectHandle__)(struct ProfilerBase * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__profilerBaseAccessCallback__)(struct ProfilerBase * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__profilerBaseGetMemInterMapParams__)(struct ProfilerBase * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__profilerBaseCheckMemInterUnmap__)(struct ProfilerBase * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__profilerBaseGetMemoryMappingDescriptor__)(struct ProfilerBase * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__profilerBaseControlSerialization_Prologue__)(struct ProfilerBase * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__profilerBaseControlSerialization_Epilogue__)(struct ProfilerBase * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__profilerBaseControl_Prologue__)(struct ProfilerBase * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__profilerBaseControl_Epilogue__)(struct ProfilerBase * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__profilerBaseCanCopy__)(struct ProfilerBase * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__profilerBaseIsDuplicate__)(struct ProfilerBase * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__profilerBasePreDestruct__)(struct ProfilerBase * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__profilerBaseControlFilter__)(struct ProfilerBase * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__profilerBaseIsPartialUnmapSupported__)(struct ProfilerBase * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__profilerBaseMapTo__)(struct ProfilerBase * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__profilerBaseUnmapFrom__)(struct ProfilerBase * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__profilerBaseGetRefCount__)(struct ProfilerBase * /*this*/); // virtual inherited (res) base (gpures) + void (*__profilerBaseAddAdditionalDependants__)(struct RsClient *, struct ProfilerBase * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members NvU32 maxPmaChannels; NvU32 pmaVchIdx; NvBool bLegacyHwpm; @@ -140,6 +159,7 @@ struct ProfilerBase { HWPM_PMA_STREAM *pPmaStreamList; NvBool *pBindPointAllocated; NvBool bMmaBoostDisabled; + NvHandle hSubDevice; }; #ifndef __NVOC_CLASS_ProfilerBase_TYPEDEF__ @@ -151,6 +171,7 @@ typedef struct ProfilerBase ProfilerBase; #define __nvoc_class_id_ProfilerBase 0x4976fc #endif /* __nvoc_class_id_ProfilerBase */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_ProfilerBase; #define __staticCast_ProfilerBase(pThis) \ @@ -163,475 +184,544 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_ProfilerBase; ((ProfilerBase*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(ProfilerBase))) #endif //__nvoc_profiler_v2_h_disabled - NV_STATUS __nvoc_objCreateDynamic_ProfilerBase(ProfilerBase**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_ProfilerBase(ProfilerBase**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_ProfilerBase(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_ProfilerBase((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define profilerBaseConstructState_FNPTR(pProf) pProf->__profilerBaseConstructState__ #define profilerBaseConstructState(pProf, pCallContext, pParams) profilerBaseConstructState_DISPATCH(pProf, pCallContext, pParams) #define profilerBaseConstructState_HAL(pProf, pCallContext, pParams) profilerBaseConstructState_DISPATCH(pProf, pCallContext, pParams) +#define profilerBaseDestructState_FNPTR(pProf) pProf->__profilerBaseDestructState__ #define profilerBaseDestructState(pProf) profilerBaseDestructState_DISPATCH(pProf) #define profilerBaseDestructState_HAL(pProf) profilerBaseDestructState_DISPATCH(pProf) +#define profilerBaseCtrlCmdReserveHwpmLegacy_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdReserveHwpmLegacy__ #define profilerBaseCtrlCmdReserveHwpmLegacy(pProfiler, pParams) profilerBaseCtrlCmdReserveHwpmLegacy_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdInternalReserveHwpmLegacy_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdInternalReserveHwpmLegacy__ #define profilerBaseCtrlCmdInternalReserveHwpmLegacy(pProfiler, pParams) profilerBaseCtrlCmdInternalReserveHwpmLegacy_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdReleaseHwpmLegacy_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdReleaseHwpmLegacy__ #define profilerBaseCtrlCmdReleaseHwpmLegacy(pProfiler) profilerBaseCtrlCmdReleaseHwpmLegacy_DISPATCH(pProfiler) +#define profilerBaseCtrlCmdReservePmAreaSmpc_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdReservePmAreaSmpc__ #define profilerBaseCtrlCmdReservePmAreaSmpc(pProfiler, pParams) profilerBaseCtrlCmdReservePmAreaSmpc_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdReleasePmAreaSmpc_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdReleasePmAreaSmpc__ #define profilerBaseCtrlCmdReleasePmAreaSmpc(pProfiler) profilerBaseCtrlCmdReleasePmAreaSmpc_DISPATCH(pProfiler) +#define profilerBaseCtrlCmdAllocPmaStream_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdAllocPmaStream__ #define profilerBaseCtrlCmdAllocPmaStream(pProfiler, pParams) profilerBaseCtrlCmdAllocPmaStream_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdFreePmaStream_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdFreePmaStream__ #define profilerBaseCtrlCmdFreePmaStream(pProfiler, pParams) profilerBaseCtrlCmdFreePmaStream_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdInternalFreePmaStream_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdInternalFreePmaStream__ #define profilerBaseCtrlCmdInternalFreePmaStream(pProfiler, pParams) profilerBaseCtrlCmdInternalFreePmaStream_DISPATCH(pProfiler, pParams) #define profilerBaseCtrlCmdInternalFreePmaStream_HAL(pProfiler, pParams) profilerBaseCtrlCmdInternalFreePmaStream_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdInternalGetMaxPmas_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdInternalGetMaxPmas__ #define profilerBaseCtrlCmdInternalGetMaxPmas(pProfiler, pParams) profilerBaseCtrlCmdInternalGetMaxPmas_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdBindPmResources_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdBindPmResources__ #define profilerBaseCtrlCmdBindPmResources(pProfiler) profilerBaseCtrlCmdBindPmResources_DISPATCH(pProfiler) +#define profilerBaseCtrlCmdUnbindPmResources_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdUnbindPmResources__ #define profilerBaseCtrlCmdUnbindPmResources(pProfiler) profilerBaseCtrlCmdUnbindPmResources_DISPATCH(pProfiler) +#define profilerBaseCtrlCmdInternalBindPmResources_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdInternalBindPmResources__ #define profilerBaseCtrlCmdInternalBindPmResources(pProfiler) profilerBaseCtrlCmdInternalBindPmResources_DISPATCH(pProfiler) +#define profilerBaseCtrlCmdInternalUnbindPmResources_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdInternalUnbindPmResources__ #define profilerBaseCtrlCmdInternalUnbindPmResources(pProfiler) profilerBaseCtrlCmdInternalUnbindPmResources_DISPATCH(pProfiler) +#define profilerBaseCtrlCmdPmaStreamUpdateGetPut_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdPmaStreamUpdateGetPut__ #define profilerBaseCtrlCmdPmaStreamUpdateGetPut(pProfiler, pParams) profilerBaseCtrlCmdPmaStreamUpdateGetPut_DISPATCH(pProfiler, pParams) #define profilerBaseCtrlCmdPmaStreamUpdateGetPut_HAL(pProfiler, pParams) profilerBaseCtrlCmdPmaStreamUpdateGetPut_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdExecRegops_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdExecRegops__ #define profilerBaseCtrlCmdExecRegops(pProfiler, pParams) profilerBaseCtrlCmdExecRegops_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdInternalAllocPmaStream_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdInternalAllocPmaStream__ #define profilerBaseCtrlCmdInternalAllocPmaStream(pProfiler, pParams) profilerBaseCtrlCmdInternalAllocPmaStream_DISPATCH(pProfiler, pParams) #define profilerBaseCtrlCmdInternalAllocPmaStream_HAL(pProfiler, pParams) profilerBaseCtrlCmdInternalAllocPmaStream_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdInternalQuiescePmaChannel_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdInternalQuiescePmaChannel__ #define profilerBaseCtrlCmdInternalQuiescePmaChannel(pProfiler, pParams) profilerBaseCtrlCmdInternalQuiescePmaChannel_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdInternalSriovPromotePmaStream_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdInternalSriovPromotePmaStream__ #define profilerBaseCtrlCmdInternalSriovPromotePmaStream(pProfiler, pParams) profilerBaseCtrlCmdInternalSriovPromotePmaStream_DISPATCH(pProfiler, pParams) #define profilerBaseCtrlCmdInternalSriovPromotePmaStream_HAL(pProfiler, pParams) profilerBaseCtrlCmdInternalSriovPromotePmaStream_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdInternalPermissionsInit_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdInternalPermissionsInit__ #define profilerBaseCtrlCmdInternalPermissionsInit(pProfiler, pParams) profilerBaseCtrlCmdInternalPermissionsInit_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdReservePmAreaPcSampler_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdReservePmAreaPcSampler__ #define profilerBaseCtrlCmdReservePmAreaPcSampler(pProfiler) profilerBaseCtrlCmdReservePmAreaPcSampler_DISPATCH(pProfiler) +#define profilerBaseCtrlCmdReleasePmAreaPcSampler_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdReleasePmAreaPcSampler__ #define profilerBaseCtrlCmdReleasePmAreaPcSampler(pProfiler) profilerBaseCtrlCmdReleasePmAreaPcSampler_DISPATCH(pProfiler) +#define profilerBaseCtrlCmdGetTotalHsCredits_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdGetTotalHsCredits__ #define profilerBaseCtrlCmdGetTotalHsCredits(pProfiler, pParams) profilerBaseCtrlCmdGetTotalHsCredits_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdGetHsCredits_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdGetHsCredits__ #define profilerBaseCtrlCmdGetHsCredits(pProfiler, pParams) profilerBaseCtrlCmdGetHsCredits_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdSetHsCredits_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdSetHsCredits__ #define profilerBaseCtrlCmdSetHsCredits(pProfiler, pParams) profilerBaseCtrlCmdSetHsCredits_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdReserveHes_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdReserveHes__ #define profilerBaseCtrlCmdReserveHes(pProfiler, pParams) profilerBaseCtrlCmdReserveHes_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdReleaseHes_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdReleaseHes__ #define profilerBaseCtrlCmdReleaseHes(pProfiler, pParams) profilerBaseCtrlCmdReleaseHes_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdRequestCgControls_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdRequestCgControls__ #define profilerBaseCtrlCmdRequestCgControls(pProfiler, pParams) profilerBaseCtrlCmdRequestCgControls_DISPATCH(pProfiler, pParams) #define profilerBaseCtrlCmdRequestCgControls_HAL(pProfiler, pParams) profilerBaseCtrlCmdRequestCgControls_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdReleaseCgControls_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdReleaseCgControls__ #define profilerBaseCtrlCmdReleaseCgControls(pProfiler, pParams) profilerBaseCtrlCmdReleaseCgControls_DISPATCH(pProfiler, pParams) #define profilerBaseCtrlCmdReleaseCgControls_HAL(pProfiler, pParams) profilerBaseCtrlCmdReleaseCgControls_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdDisableDynamicMMABoost_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdDisableDynamicMMABoost__ #define profilerBaseCtrlCmdDisableDynamicMMABoost(pProfiler, pParams) profilerBaseCtrlCmdDisableDynamicMMABoost_DISPATCH(pProfiler, pParams) +#define profilerBaseCtrlCmdGetDynamicMMABoostStatus_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdGetDynamicMMABoostStatus__ #define profilerBaseCtrlCmdGetDynamicMMABoostStatus(pProfiler, pParams) profilerBaseCtrlCmdGetDynamicMMABoostStatus_DISPATCH(pProfiler, pParams) +#define profilerBaseControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define profilerBaseControl(pGpuResource, pCallContext, pParams) profilerBaseControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define profilerBaseMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define profilerBaseMap(pGpuResource, pCallContext, pParams, pCpuMapping) profilerBaseMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define profilerBaseUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define profilerBaseUnmap(pGpuResource, pCallContext, pCpuMapping) profilerBaseUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define profilerBaseShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define profilerBaseShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) profilerBaseShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define profilerBaseCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) profilerBaseCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define profilerBaseMapTo(pResource, pParams) profilerBaseMapTo_DISPATCH(pResource, pParams) -#define profilerBaseGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) profilerBaseGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define profilerBaseGetRefCount(pResource) profilerBaseGetRefCount_DISPATCH(pResource) -#define profilerBaseAddAdditionalDependants(pClient, pResource, pReference) profilerBaseAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define profilerBaseControl_Prologue(pResource, pCallContext, pParams) profilerBaseControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define profilerBaseGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define profilerBaseGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) profilerBaseGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define profilerBaseGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define profilerBaseGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) profilerBaseGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define profilerBaseInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define profilerBaseInternalControlForward(pGpuResource, command, pParams, size) profilerBaseInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define profilerBaseUnmapFrom(pResource, pParams) profilerBaseUnmapFrom_DISPATCH(pResource, pParams) -#define profilerBaseControl_Epilogue(pResource, pCallContext, pParams) profilerBaseControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define profilerBaseGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define profilerBaseGetInternalObjectHandle(pGpuResource) profilerBaseGetInternalObjectHandle_DISPATCH(pGpuResource) -#define profilerBaseControl(pGpuResource, pCallContext, pParams) profilerBaseControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define profilerBaseUnmap(pGpuResource, pCallContext, pCpuMapping) profilerBaseUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define profilerBaseAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define profilerBaseAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) profilerBaseAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define profilerBaseGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define profilerBaseGetMemInterMapParams(pRmResource, pParams) profilerBaseGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define profilerBaseCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define profilerBaseCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) profilerBaseCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define profilerBaseGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define profilerBaseGetMemoryMappingDescriptor(pRmResource, ppMemDesc) profilerBaseGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define profilerBaseControlFilter(pResource, pCallContext, pParams) profilerBaseControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define profilerBaseControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define profilerBaseControlSerialization_Prologue(pResource, pCallContext, pParams) profilerBaseControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define profilerBaseControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define profilerBaseControlSerialization_Epilogue(pResource, pCallContext, pParams) profilerBaseControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define profilerBaseControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define profilerBaseControl_Prologue(pResource, pCallContext, pParams) profilerBaseControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define profilerBaseControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define profilerBaseControl_Epilogue(pResource, pCallContext, pParams) profilerBaseControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define profilerBaseCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define profilerBaseCanCopy(pResource) profilerBaseCanCopy_DISPATCH(pResource) -#define profilerBaseIsPartialUnmapSupported(pResource) profilerBaseIsPartialUnmapSupported_DISPATCH(pResource) -#define profilerBasePreDestruct(pResource) profilerBasePreDestruct_DISPATCH(pResource) +#define profilerBaseIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define profilerBaseIsDuplicate(pResource, hMemory, pDuplicate) profilerBaseIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define profilerBaseControlSerialization_Epilogue(pResource, pCallContext, pParams) profilerBaseControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define profilerBaseMap(pGpuResource, pCallContext, pParams, pCpuMapping) profilerBaseMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define profilerBaseAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) profilerBaseAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -static inline NV_STATUS profilerBaseConstructState_56cd7a(struct ProfilerBase *pProf, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - return NV_OK; -} - -NV_STATUS profilerBaseConstructState_IMPL(struct ProfilerBase *pProf, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); +#define profilerBasePreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define profilerBasePreDestruct(pResource) profilerBasePreDestruct_DISPATCH(pResource) +#define profilerBaseControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define profilerBaseControlFilter(pResource, pCallContext, pParams) profilerBaseControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define profilerBaseIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define profilerBaseIsPartialUnmapSupported(pResource) profilerBaseIsPartialUnmapSupported_DISPATCH(pResource) +#define profilerBaseMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define profilerBaseMapTo(pResource, pParams) profilerBaseMapTo_DISPATCH(pResource, pParams) +#define profilerBaseUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define profilerBaseUnmapFrom(pResource, pParams) profilerBaseUnmapFrom_DISPATCH(pResource, pParams) +#define profilerBaseGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define profilerBaseGetRefCount(pResource) profilerBaseGetRefCount_DISPATCH(pResource) +#define profilerBaseAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define profilerBaseAddAdditionalDependants(pClient, pResource, pReference) profilerBaseAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS profilerBaseConstructState_DISPATCH(struct ProfilerBase *pProf, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { return pProf->__profilerBaseConstructState__(pProf, pCallContext, pParams); } -void profilerBaseDestructState_VF(struct ProfilerBase *pProf); - -static inline void profilerBaseDestructState_b3696a(struct ProfilerBase *pProf) { - return; -} - static inline void profilerBaseDestructState_DISPATCH(struct ProfilerBase *pProf) { pProf->__profilerBaseDestructState__(pProf); } -NV_STATUS profilerBaseCtrlCmdReserveHwpmLegacy_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_RESERVE_HWPM_LEGACY_PARAMS *pParams); - static inline NV_STATUS profilerBaseCtrlCmdReserveHwpmLegacy_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_RESERVE_HWPM_LEGACY_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdReserveHwpmLegacy__(pProfiler, pParams); } -NV_STATUS profilerBaseCtrlCmdInternalReserveHwpmLegacy_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_RESERVE_HWPM_LEGACY_PARAMS *pParams); - static inline NV_STATUS profilerBaseCtrlCmdInternalReserveHwpmLegacy_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_RESERVE_HWPM_LEGACY_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdInternalReserveHwpmLegacy__(pProfiler, pParams); } -NV_STATUS profilerBaseCtrlCmdReleaseHwpmLegacy_IMPL(struct ProfilerBase *pProfiler); - static inline NV_STATUS profilerBaseCtrlCmdReleaseHwpmLegacy_DISPATCH(struct ProfilerBase *pProfiler) { return pProfiler->__profilerBaseCtrlCmdReleaseHwpmLegacy__(pProfiler); } -NV_STATUS profilerBaseCtrlCmdReservePmAreaSmpc_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_RESERVE_PM_AREA_SMPC_PARAMS *pParams); - static inline NV_STATUS profilerBaseCtrlCmdReservePmAreaSmpc_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_RESERVE_PM_AREA_SMPC_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdReservePmAreaSmpc__(pProfiler, pParams); } -NV_STATUS profilerBaseCtrlCmdReleasePmAreaSmpc_IMPL(struct ProfilerBase *pProfiler); - static inline NV_STATUS profilerBaseCtrlCmdReleasePmAreaSmpc_DISPATCH(struct ProfilerBase *pProfiler) { return pProfiler->__profilerBaseCtrlCmdReleasePmAreaSmpc__(pProfiler); } -NV_STATUS profilerBaseCtrlCmdAllocPmaStream_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_ALLOC_PMA_STREAM_PARAMS *pParams); - static inline NV_STATUS profilerBaseCtrlCmdAllocPmaStream_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_ALLOC_PMA_STREAM_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdAllocPmaStream__(pProfiler, pParams); } -NV_STATUS profilerBaseCtrlCmdFreePmaStream_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_FREE_PMA_STREAM_PARAMS *pParams); - static inline NV_STATUS profilerBaseCtrlCmdFreePmaStream_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_FREE_PMA_STREAM_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdFreePmaStream__(pProfiler, pParams); } -NV_STATUS profilerBaseCtrlCmdInternalFreePmaStream_VF(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_FREE_PMA_STREAM_PARAMS *pParams); - -static inline NV_STATUS profilerBaseCtrlCmdInternalFreePmaStream_56cd7a(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_FREE_PMA_STREAM_PARAMS *pParams) { - return NV_OK; -} - static inline NV_STATUS profilerBaseCtrlCmdInternalFreePmaStream_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_FREE_PMA_STREAM_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdInternalFreePmaStream__(pProfiler, pParams); } -NV_STATUS profilerBaseCtrlCmdInternalGetMaxPmas_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_GET_MAX_PMAS_PARAMS *pParams); - static inline NV_STATUS profilerBaseCtrlCmdInternalGetMaxPmas_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_GET_MAX_PMAS_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdInternalGetMaxPmas__(pProfiler, pParams); } -NV_STATUS profilerBaseCtrlCmdBindPmResources_IMPL(struct ProfilerBase *pProfiler); - static inline NV_STATUS profilerBaseCtrlCmdBindPmResources_DISPATCH(struct ProfilerBase *pProfiler) { return pProfiler->__profilerBaseCtrlCmdBindPmResources__(pProfiler); } -NV_STATUS profilerBaseCtrlCmdUnbindPmResources_IMPL(struct ProfilerBase *pProfiler); - static inline NV_STATUS profilerBaseCtrlCmdUnbindPmResources_DISPATCH(struct ProfilerBase *pProfiler) { return pProfiler->__profilerBaseCtrlCmdUnbindPmResources__(pProfiler); } -NV_STATUS profilerBaseCtrlCmdInternalBindPmResources_IMPL(struct ProfilerBase *pProfiler); - static inline NV_STATUS profilerBaseCtrlCmdInternalBindPmResources_DISPATCH(struct ProfilerBase *pProfiler) { return pProfiler->__profilerBaseCtrlCmdInternalBindPmResources__(pProfiler); } -NV_STATUS profilerBaseCtrlCmdInternalUnbindPmResources_IMPL(struct ProfilerBase *pProfiler); - static inline NV_STATUS profilerBaseCtrlCmdInternalUnbindPmResources_DISPATCH(struct ProfilerBase *pProfiler) { return pProfiler->__profilerBaseCtrlCmdInternalUnbindPmResources__(pProfiler); } -NV_STATUS profilerBaseCtrlCmdPmaStreamUpdateGetPut_VF(struct ProfilerBase *pProfiler, NVB0CC_CTRL_PMA_STREAM_UPDATE_GET_PUT_PARAMS *pParams); - -static inline NV_STATUS profilerBaseCtrlCmdPmaStreamUpdateGetPut_56cd7a(struct ProfilerBase *pProfiler, NVB0CC_CTRL_PMA_STREAM_UPDATE_GET_PUT_PARAMS *pParams) { - return NV_OK; -} - static inline NV_STATUS profilerBaseCtrlCmdPmaStreamUpdateGetPut_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_PMA_STREAM_UPDATE_GET_PUT_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdPmaStreamUpdateGetPut__(pProfiler, pParams); } -NV_STATUS profilerBaseCtrlCmdExecRegops_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_EXEC_REG_OPS_PARAMS *pParams); - static inline NV_STATUS profilerBaseCtrlCmdExecRegops_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_EXEC_REG_OPS_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdExecRegops__(pProfiler, pParams); } -NV_STATUS profilerBaseCtrlCmdInternalAllocPmaStream_VF(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_ALLOC_PMA_STREAM_PARAMS *pParams); - -static inline NV_STATUS profilerBaseCtrlCmdInternalAllocPmaStream_56cd7a(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_ALLOC_PMA_STREAM_PARAMS *pParams) { - return NV_OK; -} - static inline NV_STATUS profilerBaseCtrlCmdInternalAllocPmaStream_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_ALLOC_PMA_STREAM_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdInternalAllocPmaStream__(pProfiler, pParams); } -NV_STATUS profilerBaseCtrlCmdInternalQuiescePmaChannel_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_QUIESCE_PMA_CHANNEL_PARAMS *pParams); - static inline NV_STATUS profilerBaseCtrlCmdInternalQuiescePmaChannel_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_QUIESCE_PMA_CHANNEL_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdInternalQuiescePmaChannel__(pProfiler, pParams); } -static inline NV_STATUS profilerBaseCtrlCmdInternalSriovPromotePmaStream_108313(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_SRIOV_PROMOTE_PMA_STREAM_PARAMS *pParams) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); -} - -NV_STATUS profilerBaseCtrlCmdInternalSriovPromotePmaStream_VF(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_SRIOV_PROMOTE_PMA_STREAM_PARAMS *pParams); - static inline NV_STATUS profilerBaseCtrlCmdInternalSriovPromotePmaStream_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_SRIOV_PROMOTE_PMA_STREAM_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdInternalSriovPromotePmaStream__(pProfiler, pParams); } -NV_STATUS profilerBaseCtrlCmdInternalPermissionsInit_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_PERMISSIONS_INIT_PARAMS *pParams); - static inline NV_STATUS profilerBaseCtrlCmdInternalPermissionsInit_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_PERMISSIONS_INIT_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdInternalPermissionsInit__(pProfiler, pParams); } -NV_STATUS profilerBaseCtrlCmdReservePmAreaPcSampler_IMPL(struct ProfilerBase *pProfiler); - static inline NV_STATUS profilerBaseCtrlCmdReservePmAreaPcSampler_DISPATCH(struct ProfilerBase *pProfiler) { return pProfiler->__profilerBaseCtrlCmdReservePmAreaPcSampler__(pProfiler); } -NV_STATUS profilerBaseCtrlCmdReleasePmAreaPcSampler_IMPL(struct ProfilerBase *pProfiler); - static inline NV_STATUS profilerBaseCtrlCmdReleasePmAreaPcSampler_DISPATCH(struct ProfilerBase *pProfiler) { return pProfiler->__profilerBaseCtrlCmdReleasePmAreaPcSampler__(pProfiler); } -NV_STATUS profilerBaseCtrlCmdGetTotalHsCredits_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_GET_TOTAL_HS_CREDITS_PARAMS *pParams); - static inline NV_STATUS profilerBaseCtrlCmdGetTotalHsCredits_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_GET_TOTAL_HS_CREDITS_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdGetTotalHsCredits__(pProfiler, pParams); } -NV_STATUS profilerBaseCtrlCmdGetHsCredits_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_GET_HS_CREDITS_PARAMS *pParams); - static inline NV_STATUS profilerBaseCtrlCmdGetHsCredits_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_GET_HS_CREDITS_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdGetHsCredits__(pProfiler, pParams); } -NV_STATUS profilerBaseCtrlCmdSetHsCredits_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_SET_HS_CREDITS_PARAMS *pParams); - static inline NV_STATUS profilerBaseCtrlCmdSetHsCredits_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_SET_HS_CREDITS_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdSetHsCredits__(pProfiler, pParams); } -NV_STATUS profilerBaseCtrlCmdReserveHes_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_RESERVE_HES_PARAMS *pParams); - static inline NV_STATUS profilerBaseCtrlCmdReserveHes_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_RESERVE_HES_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdReserveHes__(pProfiler, pParams); } -NV_STATUS profilerBaseCtrlCmdReleaseHes_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_RELEASE_HES_PARAMS *pParams); - static inline NV_STATUS profilerBaseCtrlCmdReleaseHes_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_RELEASE_HES_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdReleaseHes__(pProfiler, pParams); } -NV_STATUS profilerBaseCtrlCmdRequestCgControls_VF(struct ProfilerBase *pProfiler, NVB0CC_CTRL_POWER_REQUEST_FEATURES_PARAMS *pParams); - -static inline NV_STATUS profilerBaseCtrlCmdRequestCgControls_92bfc3(struct ProfilerBase *pProfiler, NVB0CC_CTRL_POWER_REQUEST_FEATURES_PARAMS *pParams) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS profilerBaseCtrlCmdRequestCgControls_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_POWER_REQUEST_FEATURES_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdRequestCgControls__(pProfiler, pParams); } -static inline NV_STATUS profilerBaseCtrlCmdReleaseCgControls_56cd7a(struct ProfilerBase *pProfiler, NVB0CC_CTRL_POWER_RELEASE_FEATURES_PARAMS *pParams) { - return NV_OK; -} - -static inline NV_STATUS profilerBaseCtrlCmdReleaseCgControls_92bfc3(struct ProfilerBase *pProfiler, NVB0CC_CTRL_POWER_RELEASE_FEATURES_PARAMS *pParams) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS profilerBaseCtrlCmdReleaseCgControls_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_POWER_RELEASE_FEATURES_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdReleaseCgControls__(pProfiler, pParams); } -NV_STATUS profilerBaseCtrlCmdDisableDynamicMMABoost_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_DISABLE_DYNAMIC_MMA_BOOST_PARAMS *pParams); - static inline NV_STATUS profilerBaseCtrlCmdDisableDynamicMMABoost_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_DISABLE_DYNAMIC_MMA_BOOST_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdDisableDynamicMMABoost__(pProfiler, pParams); } -NV_STATUS profilerBaseCtrlCmdGetDynamicMMABoostStatus_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_GET_DYNAMIC_MMA_BOOST_STATUS_PARAMS *pParams); - static inline NV_STATUS profilerBaseCtrlCmdGetDynamicMMABoostStatus_DISPATCH(struct ProfilerBase *pProfiler, NVB0CC_CTRL_GET_DYNAMIC_MMA_BOOST_STATUS_PARAMS *pParams) { return pProfiler->__profilerBaseCtrlCmdGetDynamicMMABoostStatus__(pProfiler, pParams); } -static inline NvBool profilerBaseShareCallback_DISPATCH(struct ProfilerBase *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__profilerBaseShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS profilerBaseCheckMemInterUnmap_DISPATCH(struct ProfilerBase *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__profilerBaseCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); -} - -static inline NV_STATUS profilerBaseMapTo_DISPATCH(struct ProfilerBase *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__profilerBaseMapTo__(pResource, pParams); -} - -static inline NV_STATUS profilerBaseGetMapAddrSpace_DISPATCH(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__profilerBaseGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +static inline NV_STATUS profilerBaseControl_DISPATCH(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__profilerBaseControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 profilerBaseGetRefCount_DISPATCH(struct ProfilerBase *pResource) { - return pResource->__profilerBaseGetRefCount__(pResource); +static inline NV_STATUS profilerBaseMap_DISPATCH(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__profilerBaseMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void profilerBaseAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ProfilerBase *pResource, RsResourceRef *pReference) { - pResource->__profilerBaseAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS profilerBaseUnmap_DISPATCH(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__profilerBaseUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS profilerBaseControl_Prologue_DISPATCH(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__profilerBaseControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool profilerBaseShareCallback_DISPATCH(struct ProfilerBase *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__profilerBaseShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS profilerBaseGetRegBaseOffsetAndSize_DISPATCH(struct ProfilerBase *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__profilerBaseGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS profilerBaseInternalControlForward_DISPATCH(struct ProfilerBase *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__profilerBaseInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS profilerBaseUnmapFrom_DISPATCH(struct ProfilerBase *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__profilerBaseUnmapFrom__(pResource, pParams); +static inline NV_STATUS profilerBaseGetMapAddrSpace_DISPATCH(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__profilerBaseGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void profilerBaseControl_Epilogue_DISPATCH(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__profilerBaseControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS profilerBaseInternalControlForward_DISPATCH(struct ProfilerBase *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__profilerBaseInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle profilerBaseGetInternalObjectHandle_DISPATCH(struct ProfilerBase *pGpuResource) { return pGpuResource->__profilerBaseGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS profilerBaseControl_DISPATCH(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__profilerBaseControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS profilerBaseUnmap_DISPATCH(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__profilerBaseUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool profilerBaseAccessCallback_DISPATCH(struct ProfilerBase *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__profilerBaseAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS profilerBaseGetMemInterMapParams_DISPATCH(struct ProfilerBase *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__profilerBaseGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS profilerBaseGetMemoryMappingDescriptor_DISPATCH(struct ProfilerBase *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__profilerBaseGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS profilerBaseCheckMemInterUnmap_DISPATCH(struct ProfilerBase *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__profilerBaseCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS profilerBaseControlFilter_DISPATCH(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__profilerBaseControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS profilerBaseGetMemoryMappingDescriptor_DISPATCH(struct ProfilerBase *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__profilerBaseGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS profilerBaseControlSerialization_Prologue_DISPATCH(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__profilerBaseControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void profilerBaseControlSerialization_Epilogue_DISPATCH(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__profilerBaseControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS profilerBaseControl_Prologue_DISPATCH(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__profilerBaseControl_Prologue__(pResource, pCallContext, pParams); +} + +static inline void profilerBaseControl_Epilogue_DISPATCH(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__profilerBaseControl_Epilogue__(pResource, pCallContext, pParams); +} + static inline NvBool profilerBaseCanCopy_DISPATCH(struct ProfilerBase *pResource) { return pResource->__profilerBaseCanCopy__(pResource); } -static inline NvBool profilerBaseIsPartialUnmapSupported_DISPATCH(struct ProfilerBase *pResource) { - return pResource->__profilerBaseIsPartialUnmapSupported__(pResource); +static inline NV_STATUS profilerBaseIsDuplicate_DISPATCH(struct ProfilerBase *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__profilerBaseIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void profilerBasePreDestruct_DISPATCH(struct ProfilerBase *pResource) { pResource->__profilerBasePreDestruct__(pResource); } -static inline NV_STATUS profilerBaseIsDuplicate_DISPATCH(struct ProfilerBase *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__profilerBaseIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS profilerBaseControlFilter_DISPATCH(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__profilerBaseControlFilter__(pResource, pCallContext, pParams); } -static inline void profilerBaseControlSerialization_Epilogue_DISPATCH(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__profilerBaseControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool profilerBaseIsPartialUnmapSupported_DISPATCH(struct ProfilerBase *pResource) { + return pResource->__profilerBaseIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS profilerBaseMap_DISPATCH(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__profilerBaseMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS profilerBaseMapTo_DISPATCH(struct ProfilerBase *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__profilerBaseMapTo__(pResource, pParams); } -static inline NvBool profilerBaseAccessCallback_DISPATCH(struct ProfilerBase *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__profilerBaseAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS profilerBaseUnmapFrom_DISPATCH(struct ProfilerBase *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__profilerBaseUnmapFrom__(pResource, pParams); } -NV_STATUS profilerBaseConstruct_IMPL(struct ProfilerBase *arg_pProf, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); - -#define __nvoc_profilerBaseConstruct(arg_pProf, arg_pCallContext, arg_pParams) profilerBaseConstruct_IMPL(arg_pProf, arg_pCallContext, arg_pParams) -void profilerBaseDestruct_IMPL(struct ProfilerBase *pProf); +static inline NvU32 profilerBaseGetRefCount_DISPATCH(struct ProfilerBase *pResource) { + return pResource->__profilerBaseGetRefCount__(pResource); +} -#define __nvoc_profilerBaseDestruct(pProf) profilerBaseDestruct_IMPL(pProf) -NV_STATUS profilerBaseQuiesceStreamout_IMPL(struct ProfilerBase *pProf, OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 pmaChIdx); +static inline void profilerBaseAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ProfilerBase *pResource, RsResourceRef *pReference) { + pResource->__profilerBaseAddAdditionalDependants__(pClient, pResource, pReference); +} -#ifdef __nvoc_profiler_v2_h_disabled -static inline NV_STATUS profilerBaseQuiesceStreamout(struct ProfilerBase *pProf, OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 pmaChIdx) { - NV_ASSERT_FAILED_PRECOMP("ProfilerBase was disabled!"); - return NV_ERR_NOT_SUPPORTED; +static inline NV_STATUS profilerBaseConstructState_56cd7a(struct ProfilerBase *pProf, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + return NV_OK; } -#else //__nvoc_profiler_v2_h_disabled -#define profilerBaseQuiesceStreamout(pProf, pGpu, pKernelHwpm, pmaChIdx) profilerBaseQuiesceStreamout_IMPL(pProf, pGpu, pKernelHwpm, pmaChIdx) -#endif //__nvoc_profiler_v2_h_disabled -#undef PRIVATE_FIELD +NV_STATUS profilerBaseConstructState_IMPL(struct ProfilerBase *pProf, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); +void profilerBaseDestructState_VF(struct ProfilerBase *pProf); -// Private field names are wrapped in PRIVATE_FIELD, which does nothing for -// the matching C source file, but causes diagnostics to be issued if another -// source file references the field. -#ifdef NVOC_PROFILER_V2_H_PRIVATE_ACCESS_ALLOWED +static inline void profilerBaseDestructState_b3696a(struct ProfilerBase *pProf) { + return; +} + +NV_STATUS profilerBaseCtrlCmdReserveHwpmLegacy_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_RESERVE_HWPM_LEGACY_PARAMS *pParams); + +NV_STATUS profilerBaseCtrlCmdInternalReserveHwpmLegacy_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_RESERVE_HWPM_LEGACY_PARAMS *pParams); + +NV_STATUS profilerBaseCtrlCmdReleaseHwpmLegacy_IMPL(struct ProfilerBase *pProfiler); + +NV_STATUS profilerBaseCtrlCmdReservePmAreaSmpc_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_RESERVE_PM_AREA_SMPC_PARAMS *pParams); + +NV_STATUS profilerBaseCtrlCmdReleasePmAreaSmpc_IMPL(struct ProfilerBase *pProfiler); + +NV_STATUS profilerBaseCtrlCmdAllocPmaStream_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_ALLOC_PMA_STREAM_PARAMS *pParams); + +NV_STATUS profilerBaseCtrlCmdFreePmaStream_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_FREE_PMA_STREAM_PARAMS *pParams); + +NV_STATUS profilerBaseCtrlCmdInternalFreePmaStream_VF(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_FREE_PMA_STREAM_PARAMS *pParams); + +static inline NV_STATUS profilerBaseCtrlCmdInternalFreePmaStream_56cd7a(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_FREE_PMA_STREAM_PARAMS *pParams) { + return NV_OK; +} + +NV_STATUS profilerBaseCtrlCmdInternalGetMaxPmas_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_GET_MAX_PMAS_PARAMS *pParams); + +NV_STATUS profilerBaseCtrlCmdBindPmResources_IMPL(struct ProfilerBase *pProfiler); + +NV_STATUS profilerBaseCtrlCmdUnbindPmResources_IMPL(struct ProfilerBase *pProfiler); + +NV_STATUS profilerBaseCtrlCmdInternalBindPmResources_IMPL(struct ProfilerBase *pProfiler); + +NV_STATUS profilerBaseCtrlCmdInternalUnbindPmResources_IMPL(struct ProfilerBase *pProfiler); + +NV_STATUS profilerBaseCtrlCmdPmaStreamUpdateGetPut_VF(struct ProfilerBase *pProfiler, NVB0CC_CTRL_PMA_STREAM_UPDATE_GET_PUT_PARAMS *pParams); + +static inline NV_STATUS profilerBaseCtrlCmdPmaStreamUpdateGetPut_56cd7a(struct ProfilerBase *pProfiler, NVB0CC_CTRL_PMA_STREAM_UPDATE_GET_PUT_PARAMS *pParams) { + return NV_OK; +} + +NV_STATUS profilerBaseCtrlCmdExecRegops_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_EXEC_REG_OPS_PARAMS *pParams); + +NV_STATUS profilerBaseCtrlCmdInternalAllocPmaStream_VF(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_ALLOC_PMA_STREAM_PARAMS *pParams); + +static inline NV_STATUS profilerBaseCtrlCmdInternalAllocPmaStream_56cd7a(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_ALLOC_PMA_STREAM_PARAMS *pParams) { + return NV_OK; +} + +NV_STATUS profilerBaseCtrlCmdInternalQuiescePmaChannel_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_QUIESCE_PMA_CHANNEL_PARAMS *pParams); + +static inline NV_STATUS profilerBaseCtrlCmdInternalSriovPromotePmaStream_108313(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_SRIOV_PROMOTE_PMA_STREAM_PARAMS *pParams) { + NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); +} + +NV_STATUS profilerBaseCtrlCmdInternalSriovPromotePmaStream_VF(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_SRIOV_PROMOTE_PMA_STREAM_PARAMS *pParams); + +NV_STATUS profilerBaseCtrlCmdInternalPermissionsInit_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_PERMISSIONS_INIT_PARAMS *pParams); + +NV_STATUS profilerBaseCtrlCmdReservePmAreaPcSampler_IMPL(struct ProfilerBase *pProfiler); + +NV_STATUS profilerBaseCtrlCmdReleasePmAreaPcSampler_IMPL(struct ProfilerBase *pProfiler); + +NV_STATUS profilerBaseCtrlCmdGetTotalHsCredits_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_GET_TOTAL_HS_CREDITS_PARAMS *pParams); + +NV_STATUS profilerBaseCtrlCmdGetHsCredits_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_GET_HS_CREDITS_PARAMS *pParams); + +NV_STATUS profilerBaseCtrlCmdSetHsCredits_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_SET_HS_CREDITS_PARAMS *pParams); + +NV_STATUS profilerBaseCtrlCmdReserveHes_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_RESERVE_HES_PARAMS *pParams); + +NV_STATUS profilerBaseCtrlCmdReleaseHes_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_RELEASE_HES_PARAMS *pParams); + +NV_STATUS profilerBaseCtrlCmdRequestCgControls_VF(struct ProfilerBase *pProfiler, NVB0CC_CTRL_POWER_REQUEST_FEATURES_PARAMS *pParams); + +static inline NV_STATUS profilerBaseCtrlCmdRequestCgControls_92bfc3(struct ProfilerBase *pProfiler, NVB0CC_CTRL_POWER_REQUEST_FEATURES_PARAMS *pParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +static inline NV_STATUS profilerBaseCtrlCmdReleaseCgControls_56cd7a(struct ProfilerBase *pProfiler, NVB0CC_CTRL_POWER_RELEASE_FEATURES_PARAMS *pParams) { + return NV_OK; +} + +static inline NV_STATUS profilerBaseCtrlCmdReleaseCgControls_92bfc3(struct ProfilerBase *pProfiler, NVB0CC_CTRL_POWER_RELEASE_FEATURES_PARAMS *pParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS profilerBaseCtrlCmdDisableDynamicMMABoost_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_DISABLE_DYNAMIC_MMA_BOOST_PARAMS *pParams); + +NV_STATUS profilerBaseCtrlCmdGetDynamicMMABoostStatus_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_GET_DYNAMIC_MMA_BOOST_STATUS_PARAMS *pParams); + +NV_STATUS profilerBaseConstruct_IMPL(struct ProfilerBase *arg_pProf, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); + +#define __nvoc_profilerBaseConstruct(arg_pProf, arg_pCallContext, arg_pParams) profilerBaseConstruct_IMPL(arg_pProf, arg_pCallContext, arg_pParams) +void profilerBaseDestruct_IMPL(struct ProfilerBase *pProf); + +#define __nvoc_profilerBaseDestruct(pProf) profilerBaseDestruct_IMPL(pProf) +NV_STATUS profilerBaseQuiesceStreamout_IMPL(struct ProfilerBase *pProf, OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 pmaChIdx); + +#ifdef __nvoc_profiler_v2_h_disabled +static inline NV_STATUS profilerBaseQuiesceStreamout(struct ProfilerBase *pProf, OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 pmaChIdx) { + NV_ASSERT_FAILED_PRECOMP("ProfilerBase was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_profiler_v2_h_disabled +#define profilerBaseQuiesceStreamout(pProf, pGpu, pKernelHwpm, pmaChIdx) profilerBaseQuiesceStreamout_IMPL(pProf, pGpu, pKernelHwpm, pmaChIdx) +#endif //__nvoc_profiler_v2_h_disabled + +#undef PRIVATE_FIELD + + +// Private field names are wrapped in PRIVATE_FIELD, which does nothing for +// the matching C source file, but causes diagnostics to be issued if another +// source file references the field. +#ifdef NVOC_PROFILER_V2_H_PRIVATE_ACCESS_ALLOWED #define PRIVATE_FIELD(x) x #else #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct ProfilerDev { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct ProfilerBase __nvoc_base_ProfilerBase; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct ProfilerBase *__nvoc_pbase_ProfilerBase; - struct ProfilerDev *__nvoc_pbase_ProfilerDev; - NV_STATUS (*__profilerDevConstructState__)(struct ProfilerDev *, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *, PROFILER_CLIENT_PERMISSIONS); - NV_STATUS (*__profilerDevConstructStatePrologue__)(struct ProfilerDev *, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); - NV_STATUS (*__profilerDevConstructStateInterlude__)(struct ProfilerDev *, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *, PROFILER_CLIENT_PERMISSIONS); - NV_STATUS (*__profilerDevConstructStateEpilogue__)(struct ProfilerDev *, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); - void (*__profilerDevDestructState__)(struct ProfilerDev *); - NvBool (*__profilerDevShareCallback__)(struct ProfilerDev *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__profilerDevCheckMemInterUnmap__)(struct ProfilerDev *, NvBool); - NV_STATUS (*__profilerDevMapTo__)(struct ProfilerDev *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__profilerDevGetMapAddrSpace__)(struct ProfilerDev *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__profilerDevGetRefCount__)(struct ProfilerDev *); - void (*__profilerDevAddAdditionalDependants__)(struct RsClient *, struct ProfilerDev *, RsResourceRef *); - NV_STATUS (*__profilerDevControl_Prologue__)(struct ProfilerDev *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__profilerDevGetRegBaseOffsetAndSize__)(struct ProfilerDev *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__profilerDevInternalControlForward__)(struct ProfilerDev *, NvU32, void *, NvU32); - NV_STATUS (*__profilerDevUnmapFrom__)(struct ProfilerDev *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__profilerDevControl_Epilogue__)(struct ProfilerDev *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__profilerDevGetInternalObjectHandle__)(struct ProfilerDev *); - NV_STATUS (*__profilerDevControl__)(struct ProfilerDev *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__profilerDevUnmap__)(struct ProfilerDev *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__profilerDevGetMemInterMapParams__)(struct ProfilerDev *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__profilerDevGetMemoryMappingDescriptor__)(struct ProfilerDev *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__profilerDevControlFilter__)(struct ProfilerDev *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__profilerDevControlSerialization_Prologue__)(struct ProfilerDev *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__profilerDevCanCopy__)(struct ProfilerDev *); - NvBool (*__profilerDevIsPartialUnmapSupported__)(struct ProfilerDev *); - void (*__profilerDevPreDestruct__)(struct ProfilerDev *); - NV_STATUS (*__profilerDevIsDuplicate__)(struct ProfilerDev *, NvHandle, NvBool *); - void (*__profilerDevControlSerialization_Epilogue__)(struct ProfilerDev *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__profilerDevMap__)(struct ProfilerDev *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__profilerDevAccessCallback__)(struct ProfilerDev *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super^2 + struct ProfilerBase *__nvoc_pbase_ProfilerBase; // profilerBase super + struct ProfilerDev *__nvoc_pbase_ProfilerDev; // profilerDev + + // Vtable with 30 per-object function pointers + NV_STATUS (*__profilerDevConstructState__)(struct ProfilerDev * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *, PROFILER_CLIENT_PERMISSIONS); // halified (2 hals) override (profilerBase) base (profilerBase) + NV_STATUS (*__profilerDevConstructStatePrologue__)(struct ProfilerDev * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // halified (2 hals) body + NV_STATUS (*__profilerDevConstructStateInterlude__)(struct ProfilerDev * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *, PROFILER_CLIENT_PERMISSIONS); // halified (2 hals) body + NV_STATUS (*__profilerDevConstructStateEpilogue__)(struct ProfilerDev * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // halified (2 hals) body + void (*__profilerDevDestructState__)(struct ProfilerDev * /*this*/); // halified (2 hals) override (profilerBase) base (profilerBase) body + NV_STATUS (*__profilerDevControl__)(struct ProfilerDev * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (profilerBase) + NV_STATUS (*__profilerDevMap__)(struct ProfilerDev * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (profilerBase) + NV_STATUS (*__profilerDevUnmap__)(struct ProfilerDev * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (profilerBase) + NvBool (*__profilerDevShareCallback__)(struct ProfilerDev * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (profilerBase) + NV_STATUS (*__profilerDevGetRegBaseOffsetAndSize__)(struct ProfilerDev * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (profilerBase) + NV_STATUS (*__profilerDevGetMapAddrSpace__)(struct ProfilerDev * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (profilerBase) + NV_STATUS (*__profilerDevInternalControlForward__)(struct ProfilerDev * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (profilerBase) + NvHandle (*__profilerDevGetInternalObjectHandle__)(struct ProfilerDev * /*this*/); // virtual inherited (gpures) base (profilerBase) + NvBool (*__profilerDevAccessCallback__)(struct ProfilerDev * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (profilerBase) + NV_STATUS (*__profilerDevGetMemInterMapParams__)(struct ProfilerDev * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (profilerBase) + NV_STATUS (*__profilerDevCheckMemInterUnmap__)(struct ProfilerDev * /*this*/, NvBool); // virtual inherited (rmres) base (profilerBase) + NV_STATUS (*__profilerDevGetMemoryMappingDescriptor__)(struct ProfilerDev * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (profilerBase) + NV_STATUS (*__profilerDevControlSerialization_Prologue__)(struct ProfilerDev * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (profilerBase) + void (*__profilerDevControlSerialization_Epilogue__)(struct ProfilerDev * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (profilerBase) + NV_STATUS (*__profilerDevControl_Prologue__)(struct ProfilerDev * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (profilerBase) + void (*__profilerDevControl_Epilogue__)(struct ProfilerDev * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (profilerBase) + NvBool (*__profilerDevCanCopy__)(struct ProfilerDev * /*this*/); // virtual inherited (res) base (profilerBase) + NV_STATUS (*__profilerDevIsDuplicate__)(struct ProfilerDev * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (profilerBase) + void (*__profilerDevPreDestruct__)(struct ProfilerDev * /*this*/); // virtual inherited (res) base (profilerBase) + NV_STATUS (*__profilerDevControlFilter__)(struct ProfilerDev * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (profilerBase) + NvBool (*__profilerDevIsPartialUnmapSupported__)(struct ProfilerDev * /*this*/); // inline virtual inherited (res) base (profilerBase) body + NV_STATUS (*__profilerDevMapTo__)(struct ProfilerDev * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (profilerBase) + NV_STATUS (*__profilerDevUnmapFrom__)(struct ProfilerDev * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (profilerBase) + NvU32 (*__profilerDevGetRefCount__)(struct ProfilerDev * /*this*/); // virtual inherited (res) base (profilerBase) + void (*__profilerDevAddAdditionalDependants__)(struct RsClient *, struct ProfilerDev * /*this*/, RsResourceRef *); // virtual inherited (res) base (profilerBase) }; #ifndef __NVOC_CLASS_ProfilerDev_TYPEDEF__ @@ -643,6 +733,7 @@ typedef struct ProfilerDev ProfilerDev; #define __nvoc_class_id_ProfilerDev 0x54d077 #endif /* __nvoc_class_id_ProfilerDev */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_ProfilerDev; #define __staticCast_ProfilerDev(pThis) \ @@ -655,213 +746,244 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_ProfilerDev; ((ProfilerDev*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(ProfilerDev))) #endif //__nvoc_profiler_v2_h_disabled - NV_STATUS __nvoc_objCreateDynamic_ProfilerDev(ProfilerDev**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_ProfilerDev(ProfilerDev**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_ProfilerDev(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_ProfilerDev((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define profilerDevConstructState_FNPTR(pResource) pResource->__profilerDevConstructState__ #define profilerDevConstructState(pResource, pCallContext, pParams, clientPermissions) profilerDevConstructState_DISPATCH(pResource, pCallContext, pParams, clientPermissions) #define profilerDevConstructState_HAL(pResource, pCallContext, pParams, clientPermissions) profilerDevConstructState_DISPATCH(pResource, pCallContext, pParams, clientPermissions) +#define profilerDevConstructStatePrologue_FNPTR(pResource) pResource->__profilerDevConstructStatePrologue__ #define profilerDevConstructStatePrologue(pResource, pCallContext, pParams) profilerDevConstructStatePrologue_DISPATCH(pResource, pCallContext, pParams) #define profilerDevConstructStatePrologue_HAL(pResource, pCallContext, pParams) profilerDevConstructStatePrologue_DISPATCH(pResource, pCallContext, pParams) +#define profilerDevConstructStateInterlude_FNPTR(pResource) pResource->__profilerDevConstructStateInterlude__ #define profilerDevConstructStateInterlude(pResource, pCallContext, pParams, clientPermissions) profilerDevConstructStateInterlude_DISPATCH(pResource, pCallContext, pParams, clientPermissions) #define profilerDevConstructStateInterlude_HAL(pResource, pCallContext, pParams, clientPermissions) profilerDevConstructStateInterlude_DISPATCH(pResource, pCallContext, pParams, clientPermissions) +#define profilerDevConstructStateEpilogue_FNPTR(pResource) pResource->__profilerDevConstructStateEpilogue__ #define profilerDevConstructStateEpilogue(pResource, pCallContext, pParams) profilerDevConstructStateEpilogue_DISPATCH(pResource, pCallContext, pParams) #define profilerDevConstructStateEpilogue_HAL(pResource, pCallContext, pParams) profilerDevConstructStateEpilogue_DISPATCH(pResource, pCallContext, pParams) +#define profilerDevDestructState_FNPTR(pResource) pResource->__profilerDevDestructState__ #define profilerDevDestructState(pResource) profilerDevDestructState_DISPATCH(pResource) #define profilerDevDestructState_HAL(pResource) profilerDevDestructState_DISPATCH(pResource) +#define profilerDevControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__gpuresControl__ +#define profilerDevControl(pGpuResource, pCallContext, pParams) profilerDevControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define profilerDevMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__gpuresMap__ +#define profilerDevMap(pGpuResource, pCallContext, pParams, pCpuMapping) profilerDevMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define profilerDevUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__gpuresUnmap__ +#define profilerDevUnmap(pGpuResource, pCallContext, pCpuMapping) profilerDevUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define profilerDevShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__gpuresShareCallback__ #define profilerDevShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) profilerDevShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define profilerDevCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) profilerDevCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define profilerDevMapTo(pResource, pParams) profilerDevMapTo_DISPATCH(pResource, pParams) -#define profilerDevGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) profilerDevGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define profilerDevGetRefCount(pResource) profilerDevGetRefCount_DISPATCH(pResource) -#define profilerDevAddAdditionalDependants(pClient, pResource, pReference) profilerDevAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define profilerDevControl_Prologue(pResource, pCallContext, pParams) profilerDevControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define profilerDevGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define profilerDevGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) profilerDevGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define profilerDevGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define profilerDevGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) profilerDevGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define profilerDevInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define profilerDevInternalControlForward(pGpuResource, command, pParams, size) profilerDevInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define profilerDevUnmapFrom(pResource, pParams) profilerDevUnmapFrom_DISPATCH(pResource, pParams) -#define profilerDevControl_Epilogue(pResource, pCallContext, pParams) profilerDevControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define profilerDevGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define profilerDevGetInternalObjectHandle(pGpuResource) profilerDevGetInternalObjectHandle_DISPATCH(pGpuResource) -#define profilerDevControl(pGpuResource, pCallContext, pParams) profilerDevControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define profilerDevUnmap(pGpuResource, pCallContext, pCpuMapping) profilerDevUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define profilerDevAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define profilerDevAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) profilerDevAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define profilerDevGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define profilerDevGetMemInterMapParams(pRmResource, pParams) profilerDevGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define profilerDevCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define profilerDevCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) profilerDevCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define profilerDevGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define profilerDevGetMemoryMappingDescriptor(pRmResource, ppMemDesc) profilerDevGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define profilerDevControlFilter(pResource, pCallContext, pParams) profilerDevControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define profilerDevControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define profilerDevControlSerialization_Prologue(pResource, pCallContext, pParams) profilerDevControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define profilerDevControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define profilerDevControlSerialization_Epilogue(pResource, pCallContext, pParams) profilerDevControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define profilerDevControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define profilerDevControl_Prologue(pResource, pCallContext, pParams) profilerDevControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define profilerDevControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define profilerDevControl_Epilogue(pResource, pCallContext, pParams) profilerDevControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define profilerDevCanCopy_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define profilerDevCanCopy(pResource) profilerDevCanCopy_DISPATCH(pResource) -#define profilerDevIsPartialUnmapSupported(pResource) profilerDevIsPartialUnmapSupported_DISPATCH(pResource) -#define profilerDevPreDestruct(pResource) profilerDevPreDestruct_DISPATCH(pResource) +#define profilerDevIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define profilerDevIsDuplicate(pResource, hMemory, pDuplicate) profilerDevIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define profilerDevControlSerialization_Epilogue(pResource, pCallContext, pParams) profilerDevControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define profilerDevMap(pGpuResource, pCallContext, pParams, pCpuMapping) profilerDevMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define profilerDevAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) profilerDevAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool profilerDevQueryCapabilities_IMPL(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams, PROFILER_CLIENT_PERMISSIONS *pClientPermissions); - - -#ifdef __nvoc_profiler_v2_h_disabled -static inline NvBool profilerDevQueryCapabilities(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams, PROFILER_CLIENT_PERMISSIONS *pClientPermissions) { - NV_ASSERT_FAILED_PRECOMP("ProfilerDev was disabled!"); - return NV_FALSE; -} -#else //__nvoc_profiler_v2_h_disabled -#define profilerDevQueryCapabilities(pResource, pCallContext, pParams, pClientPermissions) profilerDevQueryCapabilities_IMPL(pResource, pCallContext, pParams, pClientPermissions) -#endif //__nvoc_profiler_v2_h_disabled - -#define profilerDevQueryCapabilities_HAL(pResource, pCallContext, pParams, pClientPermissions) profilerDevQueryCapabilities(pResource, pCallContext, pParams, pClientPermissions) - -NV_STATUS profilerDevConstructState_VF(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams, PROFILER_CLIENT_PERMISSIONS clientPermissions); - -NV_STATUS profilerDevConstructState_IMPL(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams, PROFILER_CLIENT_PERMISSIONS clientPermissions); +#define profilerDevPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define profilerDevPreDestruct(pResource) profilerDevPreDestruct_DISPATCH(pResource) +#define profilerDevControlFilter_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define profilerDevControlFilter(pResource, pCallContext, pParams) profilerDevControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define profilerDevIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define profilerDevIsPartialUnmapSupported(pResource) profilerDevIsPartialUnmapSupported_DISPATCH(pResource) +#define profilerDevMapTo_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define profilerDevMapTo(pResource, pParams) profilerDevMapTo_DISPATCH(pResource, pParams) +#define profilerDevUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define profilerDevUnmapFrom(pResource, pParams) profilerDevUnmapFrom_DISPATCH(pResource, pParams) +#define profilerDevGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define profilerDevGetRefCount(pResource) profilerDevGetRefCount_DISPATCH(pResource) +#define profilerDevAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define profilerDevAddAdditionalDependants(pClient, pResource, pReference) profilerDevAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS profilerDevConstructState_DISPATCH(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams, PROFILER_CLIENT_PERMISSIONS clientPermissions) { return pResource->__profilerDevConstructState__(pResource, pCallContext, pParams, clientPermissions); } -NV_STATUS profilerDevConstructStatePrologue_FWCLIENT(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); - -static inline NV_STATUS profilerDevConstructStatePrologue_92bfc3(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS profilerDevConstructStatePrologue_DISPATCH(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { return pResource->__profilerDevConstructStatePrologue__(pResource, pCallContext, pParams); } -NV_STATUS profilerDevConstructStateInterlude_IMPL(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams, PROFILER_CLIENT_PERMISSIONS clientPermissions); - -static inline NV_STATUS profilerDevConstructStateInterlude_92bfc3(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams, PROFILER_CLIENT_PERMISSIONS clientPermissions) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS profilerDevConstructStateInterlude_DISPATCH(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams, PROFILER_CLIENT_PERMISSIONS clientPermissions) { return pResource->__profilerDevConstructStateInterlude__(pResource, pCallContext, pParams, clientPermissions); } -static inline NV_STATUS profilerDevConstructStateEpilogue_56cd7a(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - return NV_OK; +static inline NV_STATUS profilerDevConstructStateEpilogue_DISPATCH(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + return pResource->__profilerDevConstructStateEpilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS profilerDevConstructStateEpilogue_92bfc3(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; +static inline void profilerDevDestructState_DISPATCH(struct ProfilerDev *pResource) { + pResource->__profilerDevDestructState__(pResource); } -static inline NV_STATUS profilerDevConstructStateEpilogue_DISPATCH(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - return pResource->__profilerDevConstructStateEpilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS profilerDevControl_DISPATCH(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__profilerDevControl__(pGpuResource, pCallContext, pParams); } -void profilerDevDestructState_FWCLIENT(struct ProfilerDev *pResource); - -static inline void profilerDevDestructState_b3696a(struct ProfilerDev *pResource) { - return; +static inline NV_STATUS profilerDevMap_DISPATCH(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__profilerDevMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void profilerDevDestructState_DISPATCH(struct ProfilerDev *pResource) { - pResource->__profilerDevDestructState__(pResource); +static inline NV_STATUS profilerDevUnmap_DISPATCH(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__profilerDevUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool profilerDevShareCallback_DISPATCH(struct ProfilerDev *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return pGpuResource->__profilerDevShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline NV_STATUS profilerDevCheckMemInterUnmap_DISPATCH(struct ProfilerDev *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__profilerDevCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); -} - -static inline NV_STATUS profilerDevMapTo_DISPATCH(struct ProfilerDev *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__profilerDevMapTo__(pResource, pParams); +static inline NV_STATUS profilerDevGetRegBaseOffsetAndSize_DISPATCH(struct ProfilerDev *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__profilerDevGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS profilerDevGetMapAddrSpace_DISPATCH(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__profilerDevGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NvU32 profilerDevGetRefCount_DISPATCH(struct ProfilerDev *pResource) { - return pResource->__profilerDevGetRefCount__(pResource); +static inline NV_STATUS profilerDevInternalControlForward_DISPATCH(struct ProfilerDev *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__profilerDevInternalControlForward__(pGpuResource, command, pParams, size); } -static inline void profilerDevAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ProfilerDev *pResource, RsResourceRef *pReference) { - pResource->__profilerDevAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvHandle profilerDevGetInternalObjectHandle_DISPATCH(struct ProfilerDev *pGpuResource) { + return pGpuResource->__profilerDevGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS profilerDevControl_Prologue_DISPATCH(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__profilerDevControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool profilerDevAccessCallback_DISPATCH(struct ProfilerDev *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__profilerDevAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS profilerDevGetRegBaseOffsetAndSize_DISPATCH(struct ProfilerDev *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__profilerDevGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS profilerDevGetMemInterMapParams_DISPATCH(struct ProfilerDev *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__profilerDevGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS profilerDevInternalControlForward_DISPATCH(struct ProfilerDev *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__profilerDevInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS profilerDevCheckMemInterUnmap_DISPATCH(struct ProfilerDev *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__profilerDevCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS profilerDevUnmapFrom_DISPATCH(struct ProfilerDev *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__profilerDevUnmapFrom__(pResource, pParams); +static inline NV_STATUS profilerDevGetMemoryMappingDescriptor_DISPATCH(struct ProfilerDev *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__profilerDevGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline void profilerDevControl_Epilogue_DISPATCH(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__profilerDevControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS profilerDevControlSerialization_Prologue_DISPATCH(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__profilerDevControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvHandle profilerDevGetInternalObjectHandle_DISPATCH(struct ProfilerDev *pGpuResource) { - return pGpuResource->__profilerDevGetInternalObjectHandle__(pGpuResource); +static inline void profilerDevControlSerialization_Epilogue_DISPATCH(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__profilerDevControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS profilerDevControl_DISPATCH(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__profilerDevControl__(pGpuResource, pCallContext, pParams); +static inline NV_STATUS profilerDevControl_Prologue_DISPATCH(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__profilerDevControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS profilerDevUnmap_DISPATCH(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__profilerDevUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline void profilerDevControl_Epilogue_DISPATCH(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__profilerDevControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS profilerDevGetMemInterMapParams_DISPATCH(struct ProfilerDev *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__profilerDevGetMemInterMapParams__(pRmResource, pParams); +static inline NvBool profilerDevCanCopy_DISPATCH(struct ProfilerDev *pResource) { + return pResource->__profilerDevCanCopy__(pResource); } -static inline NV_STATUS profilerDevGetMemoryMappingDescriptor_DISPATCH(struct ProfilerDev *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__profilerDevGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS profilerDevIsDuplicate_DISPATCH(struct ProfilerDev *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__profilerDevIsDuplicate__(pResource, hMemory, pDuplicate); +} + +static inline void profilerDevPreDestruct_DISPATCH(struct ProfilerDev *pResource) { + pResource->__profilerDevPreDestruct__(pResource); } static inline NV_STATUS profilerDevControlFilter_DISPATCH(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__profilerDevControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS profilerDevControlSerialization_Prologue_DISPATCH(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__profilerDevControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NvBool profilerDevIsPartialUnmapSupported_DISPATCH(struct ProfilerDev *pResource) { + return pResource->__profilerDevIsPartialUnmapSupported__(pResource); } -static inline NvBool profilerDevCanCopy_DISPATCH(struct ProfilerDev *pResource) { - return pResource->__profilerDevCanCopy__(pResource); +static inline NV_STATUS profilerDevMapTo_DISPATCH(struct ProfilerDev *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__profilerDevMapTo__(pResource, pParams); } -static inline NvBool profilerDevIsPartialUnmapSupported_DISPATCH(struct ProfilerDev *pResource) { - return pResource->__profilerDevIsPartialUnmapSupported__(pResource); +static inline NV_STATUS profilerDevUnmapFrom_DISPATCH(struct ProfilerDev *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__profilerDevUnmapFrom__(pResource, pParams); } -static inline void profilerDevPreDestruct_DISPATCH(struct ProfilerDev *pResource) { - pResource->__profilerDevPreDestruct__(pResource); +static inline NvU32 profilerDevGetRefCount_DISPATCH(struct ProfilerDev *pResource) { + return pResource->__profilerDevGetRefCount__(pResource); } -static inline NV_STATUS profilerDevIsDuplicate_DISPATCH(struct ProfilerDev *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__profilerDevIsDuplicate__(pResource, hMemory, pDuplicate); +static inline void profilerDevAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ProfilerDev *pResource, RsResourceRef *pReference) { + pResource->__profilerDevAddAdditionalDependants__(pClient, pResource, pReference); } -static inline void profilerDevControlSerialization_Epilogue_DISPATCH(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__profilerDevControlSerialization_Epilogue__(pResource, pCallContext, pParams); +NvBool profilerDevQueryCapabilities_IMPL(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams, PROFILER_CLIENT_PERMISSIONS *pClientPermissions); + + +#ifdef __nvoc_profiler_v2_h_disabled +static inline NvBool profilerDevQueryCapabilities(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams, PROFILER_CLIENT_PERMISSIONS *pClientPermissions) { + NV_ASSERT_FAILED_PRECOMP("ProfilerDev was disabled!"); + return NV_FALSE; } +#else //__nvoc_profiler_v2_h_disabled +#define profilerDevQueryCapabilities(pResource, pCallContext, pParams, pClientPermissions) profilerDevQueryCapabilities_IMPL(pResource, pCallContext, pParams, pClientPermissions) +#endif //__nvoc_profiler_v2_h_disabled -static inline NV_STATUS profilerDevMap_DISPATCH(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__profilerDevMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +#define profilerDevQueryCapabilities_HAL(pResource, pCallContext, pParams, pClientPermissions) profilerDevQueryCapabilities(pResource, pCallContext, pParams, pClientPermissions) + +NV_STATUS profilerDevConstructState_VF(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams, PROFILER_CLIENT_PERMISSIONS clientPermissions); + +NV_STATUS profilerDevConstructState_IMPL(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams, PROFILER_CLIENT_PERMISSIONS clientPermissions); + +NV_STATUS profilerDevConstructStatePrologue_FWCLIENT(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); + +static inline NV_STATUS profilerDevConstructStatePrologue_92bfc3(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; } -static inline NvBool profilerDevAccessCallback_DISPATCH(struct ProfilerDev *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__profilerDevAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +NV_STATUS profilerDevConstructStateInterlude_IMPL(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams, PROFILER_CLIENT_PERMISSIONS clientPermissions); + +static inline NV_STATUS profilerDevConstructStateInterlude_92bfc3(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams, PROFILER_CLIENT_PERMISSIONS clientPermissions) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS profilerDevConstructStateEpilogue_FWCLIENT(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); + +static inline NV_STATUS profilerDevConstructStateEpilogue_92bfc3(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +void profilerDevDestructState_FWCLIENT(struct ProfilerDev *pResource); + +static inline void profilerDevDestructState_b3696a(struct ProfilerDev *pResource) { + return; } NV_STATUS profilerDevConstruct_IMPL(struct ProfilerDev *arg_pResource, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_ref_count_nvoc.c b/src/nvidia/generated/g_ref_count_nvoc.c index 30cc51dd7e..8c5cd34a4f 100644 --- a/src/nvidia/generated/g_ref_count_nvoc.c +++ b/src/nvidia/generated/g_ref_count_nvoc.c @@ -93,10 +93,13 @@ NV_STATUS __nvoc_ctor_OBJREFCNT(OBJREFCNT *pThis, Dynamic * arg_pParent, NvU32 a return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJREFCNT_1(OBJREFCNT *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_OBJREFCNT_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_OBJREFCNT(OBJREFCNT *pThis) { __nvoc_init_funcTable_OBJREFCNT_1(pThis); } diff --git a/src/nvidia/generated/g_ref_count_nvoc.h b/src/nvidia/generated/g_ref_count_nvoc.h index 9129813d75..9edc32d277 100644 --- a/src/nvidia/generated/g_ref_count_nvoc.h +++ b/src/nvidia/generated/g_ref_count_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_REF_COUNT_NVOC_H_ #define _G_REF_COUNT_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_ref_count_nvoc.h" #ifndef REF_COUNT_H @@ -98,12 +106,23 @@ typedef void RefcntResetCallback(struct OBJREFCNT *, Dynamic *, NvU64); #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJREFCNT { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct OBJREFCNT *__nvoc_pbase_OBJREFCNT; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct OBJREFCNT *__nvoc_pbase_OBJREFCNT; // refcnt + + // 1 PDB property NvBool PDB_PROP_REFCNT_ALLOW_RECURSIVE_REQUESTS; + + // Data members Dynamic *pParent; NvU32 tag; REFCNT_REQUESTER_ENTRY_MAP requesterTree; @@ -122,6 +141,7 @@ typedef struct OBJREFCNT OBJREFCNT; #define __nvoc_class_id_OBJREFCNT 0xf89281 #endif /* __nvoc_class_id_OBJREFCNT */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJREFCNT; #define __staticCast_OBJREFCNT(pThis) \ @@ -134,6 +154,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJREFCNT; ((OBJREFCNT*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJREFCNT))) #endif //__nvoc_ref_count_h_disabled +// Property macros #define PDB_PROP_REFCNT_ALLOW_RECURSIVE_REQUESTS_BASE_CAST #define PDB_PROP_REFCNT_ALLOW_RECURSIVE_REQUESTS_BASE_NAME PDB_PROP_REFCNT_ALLOW_RECURSIVE_REQUESTS @@ -143,43 +164,47 @@ NV_STATUS __nvoc_objCreate_OBJREFCNT(OBJREFCNT**, Dynamic*, NvU32, Dynamic * arg #define __objCreate_OBJREFCNT(ppNewObj, pParent, createFlags, arg_pParent, arg_tag, arg_pStateChangeCallback, arg_pResetCallback) \ __nvoc_objCreate_OBJREFCNT((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pParent, arg_tag, arg_pStateChangeCallback, arg_pResetCallback) + +// Wrapper macros + +// Dispatch functions NV_STATUS refcntConstruct_IMPL(struct OBJREFCNT *arg_pRefcnt, Dynamic *arg_pParent, NvU32 arg_tag, RefcntStateChangeCallback *arg_pStateChangeCallback, RefcntResetCallback *arg_pResetCallback); #define __nvoc_refcntConstruct(arg_pRefcnt, arg_pParent, arg_tag, arg_pStateChangeCallback, arg_pResetCallback) refcntConstruct_IMPL(arg_pRefcnt, arg_pParent, arg_tag, arg_pStateChangeCallback, arg_pResetCallback) void refcntDestruct_IMPL(struct OBJREFCNT *pRefcnt); #define __nvoc_refcntDestruct(pRefcnt) refcntDestruct_IMPL(pRefcnt) -NV_STATUS refcntRequestReference_IMPL(struct OBJREFCNT *pRefcnt, NvU64 arg0, NvU32 arg1, NvBool arg2); +NV_STATUS refcntRequestReference_IMPL(struct OBJREFCNT *pRefcnt, NvU64 arg2, NvU32 arg3, NvBool arg4); #ifdef __nvoc_ref_count_h_disabled -static inline NV_STATUS refcntRequestReference(struct OBJREFCNT *pRefcnt, NvU64 arg0, NvU32 arg1, NvBool arg2) { +static inline NV_STATUS refcntRequestReference(struct OBJREFCNT *pRefcnt, NvU64 arg2, NvU32 arg3, NvBool arg4) { NV_ASSERT_FAILED_PRECOMP("OBJREFCNT was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_ref_count_h_disabled -#define refcntRequestReference(pRefcnt, arg0, arg1, arg2) refcntRequestReference_IMPL(pRefcnt, arg0, arg1, arg2) +#define refcntRequestReference(pRefcnt, arg2, arg3, arg4) refcntRequestReference_IMPL(pRefcnt, arg2, arg3, arg4) #endif //__nvoc_ref_count_h_disabled -NV_STATUS refcntReleaseReferences_IMPL(struct OBJREFCNT *pRefcnt, NvU64 arg0, NvBool arg1); +NV_STATUS refcntReleaseReferences_IMPL(struct OBJREFCNT *pRefcnt, NvU64 arg2, NvBool arg3); #ifdef __nvoc_ref_count_h_disabled -static inline NV_STATUS refcntReleaseReferences(struct OBJREFCNT *pRefcnt, NvU64 arg0, NvBool arg1) { +static inline NV_STATUS refcntReleaseReferences(struct OBJREFCNT *pRefcnt, NvU64 arg2, NvBool arg3) { NV_ASSERT_FAILED_PRECOMP("OBJREFCNT was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_ref_count_h_disabled -#define refcntReleaseReferences(pRefcnt, arg0, arg1) refcntReleaseReferences_IMPL(pRefcnt, arg0, arg1) +#define refcntReleaseReferences(pRefcnt, arg2, arg3) refcntReleaseReferences_IMPL(pRefcnt, arg2, arg3) #endif //__nvoc_ref_count_h_disabled -NV_STATUS refcntReset_IMPL(struct OBJREFCNT *pRefcnt, NvBool arg0); +NV_STATUS refcntReset_IMPL(struct OBJREFCNT *pRefcnt, NvBool arg2); #ifdef __nvoc_ref_count_h_disabled -static inline NV_STATUS refcntReset(struct OBJREFCNT *pRefcnt, NvBool arg0) { +static inline NV_STATUS refcntReset(struct OBJREFCNT *pRefcnt, NvBool arg2) { NV_ASSERT_FAILED_PRECOMP("OBJREFCNT was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_ref_count_h_disabled -#define refcntReset(pRefcnt, arg0) refcntReset_IMPL(pRefcnt, arg0) +#define refcntReset(pRefcnt, arg2) refcntReset_IMPL(pRefcnt, arg2) #endif //__nvoc_ref_count_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_reg_mem_nvoc.c b/src/nvidia/generated/g_reg_mem_nvoc.c index 0586209000..e4d91fead5 100644 --- a/src/nvidia/generated/g_reg_mem_nvoc.c +++ b/src/nvidia/generated/g_reg_mem_nvoc.c @@ -93,110 +93,142 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_RegisterMemory = /*pExportInfo=*/ &__nvoc_export_info_RegisterMemory }; -static NvBool __nvoc_thunk_RegisterMemory_resCanCopy(struct RsResource *pRegisterMemory) { - return regmemCanCopy((struct RegisterMemory *)(((unsigned char *)pRegisterMemory) - __nvoc_rtti_RegisterMemory_RsResource.offset)); +// 1 down-thunk(s) defined to bridge methods in RegisterMemory from superclasses + +// regmemCanCopy: virtual override (res) base (mem) +static NvBool __nvoc_down_thunk_RegisterMemory_resCanCopy(struct RsResource *pRegisterMemory) { + return regmemCanCopy((struct RegisterMemory *)(((unsigned char *) pRegisterMemory) - __nvoc_rtti_RegisterMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_regmemCheckMemInterUnmap(struct RegisterMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), bSubdeviceHandleProvided); + +// 25 up-thunk(s) defined to bridge methods in RegisterMemory to superclasses + +// regmemIsDuplicate: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_regmemIsDuplicate(struct RegisterMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_RmResource_regmemShareCallback(struct RegisterMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_RegisterMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// regmemGetMapAddrSpace: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_regmemGetMapAddrSpace(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_RsResource_regmemMapTo(struct RegisterMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset), pParams); +// regmemControl: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_regmemControl(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_regmemGetMapAddrSpace(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return memGetMapAddrSpace((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); +// regmemMap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_regmemMap(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } -static NvBool __nvoc_thunk_Memory_regmemIsExportAllowed(struct RegisterMemory *pMemory) { - return memIsExportAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset)); +// regmemUnmap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_regmemUnmap(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pCallContext, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_regmemGetRefCount(struct RegisterMemory *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset)); +// regmemGetMemInterMapParams: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_regmemGetMemInterMapParams(struct RegisterMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pParams); } -static void __nvoc_thunk_RsResource_regmemAddAdditionalDependants(struct RsClient *pClient, struct RegisterMemory *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset), pReference); +// regmemCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_regmemCheckMemInterUnmap(struct RegisterMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RmResource_regmemControl_Prologue(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_RegisterMemory_RmResource.offset), pCallContext, pParams); +// regmemGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_regmemGetMemoryMappingDescriptor(struct RegisterMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), ppMemDesc); } -static NvBool __nvoc_thunk_Memory_regmemIsGpuMapAllowed(struct RegisterMemory *pMemory, struct OBJGPU *pGpu) { - return memIsGpuMapAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pGpu); +// regmemCheckCopyPermissions: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_regmemCheckCopyPermissions(struct RegisterMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pDstGpu, pDstDevice); } -static NV_STATUS __nvoc_thunk_RsResource_regmemUnmapFrom(struct RegisterMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset), pParams); +// regmemIsReady: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_regmemIsReady(struct RegisterMemory *pMemory, NvBool bCopyConstructorContext) { + return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), bCopyConstructorContext); } -static void __nvoc_thunk_RmResource_regmemControl_Epilogue(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_RegisterMemory_RmResource.offset), pCallContext, pParams); +// regmemIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_regmemIsGpuMapAllowed(struct RegisterMemory *pMemory, struct OBJGPU *pGpu) { + return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pGpu); } -static NV_STATUS __nvoc_thunk_Memory_regmemControl(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memControl((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pCallContext, pParams); +// regmemIsExportAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_regmemIsExportAllowed(struct RegisterMemory *pMemory) { + return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset)); } -static NV_STATUS __nvoc_thunk_Memory_regmemUnmap(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pCallContext, pCpuMapping); +// regmemAccessCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_regmemAccessCallback(struct RegisterMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_Memory_regmemGetMemInterMapParams(struct RegisterMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pParams); +// regmemShareCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_regmemShareCallback(struct RegisterMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_Memory_regmemGetMemoryMappingDescriptor(struct RegisterMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), ppMemDesc); +// regmemControlSerialization_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_regmemControlSerialization_Prologue(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_regmemControlFilter(struct RegisterMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset), pCallContext, pParams); +// regmemControlSerialization_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_regmemControlSerialization_Epilogue(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_regmemControlSerialization_Prologue(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_RegisterMemory_RmResource.offset), pCallContext, pParams); +// regmemControl_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_regmemControl_Prologue(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_regmemIsPartialUnmapSupported(struct RegisterMemory *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset)); +// regmemControl_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_regmemControl_Epilogue(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_regmemIsReady(struct RegisterMemory *pMemory, NvBool bCopyConstructorContext) { - return memIsReady((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), bCopyConstructorContext); +// regmemPreDestruct: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_regmemPreDestruct(struct RegisterMemory *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_regmemCheckCopyPermissions(struct RegisterMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return memCheckCopyPermissions((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pDstGpu, pDstDevice); +// regmemControlFilter: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_regmemControlFilter(struct RegisterMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_regmemPreDestruct(struct RegisterMemory *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset)); +// regmemIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body +static NvBool __nvoc_up_thunk_RsResource_regmemIsPartialUnmapSupported(struct RegisterMemory *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_regmemIsDuplicate(struct RegisterMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), hMemory, pDuplicate); +// regmemMapTo: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_regmemMapTo(struct RegisterMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_regmemControlSerialization_Epilogue(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_RegisterMemory_RmResource.offset), pCallContext, pParams); +// regmemUnmapFrom: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_regmemUnmapFrom(struct RegisterMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_Memory_regmemMap(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pCallContext, pParams, pCpuMapping); +// regmemGetRefCount: virtual inherited (res) base (mem) +static NvU32 __nvoc_up_thunk_RsResource_regmemGetRefCount(struct RegisterMemory *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_regmemAccessCallback(struct RegisterMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_RegisterMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// regmemAddAdditionalDependants: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_regmemAddAdditionalDependants(struct RsClient *pClient, struct RegisterMemory *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_RegisterMemory = { /*numEntries=*/ 0, @@ -232,65 +264,95 @@ NV_STATUS __nvoc_ctor_RegisterMemory(RegisterMemory *pThis, CALL_CONTEXT * arg_p return status; } +// Vtable initialization static void __nvoc_init_funcTable_RegisterMemory_1(RegisterMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // regmemCanCopy -- virtual override (res) base (mem) pThis->__regmemCanCopy__ = ®memCanCopy_IMPL; + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_RegisterMemory_resCanCopy; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_RegisterMemory_resCanCopy; + // regmemIsDuplicate -- virtual inherited (mem) base (mem) + pThis->__regmemIsDuplicate__ = &__nvoc_up_thunk_Memory_regmemIsDuplicate; - pThis->__regmemCheckMemInterUnmap__ = &__nvoc_thunk_Memory_regmemCheckMemInterUnmap; + // regmemGetMapAddrSpace -- virtual inherited (mem) base (mem) + pThis->__regmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_regmemGetMapAddrSpace; - pThis->__regmemShareCallback__ = &__nvoc_thunk_RmResource_regmemShareCallback; + // regmemControl -- virtual inherited (mem) base (mem) + pThis->__regmemControl__ = &__nvoc_up_thunk_Memory_regmemControl; - pThis->__regmemMapTo__ = &__nvoc_thunk_RsResource_regmemMapTo; + // regmemMap -- virtual inherited (mem) base (mem) + pThis->__regmemMap__ = &__nvoc_up_thunk_Memory_regmemMap; - pThis->__regmemGetMapAddrSpace__ = &__nvoc_thunk_Memory_regmemGetMapAddrSpace; + // regmemUnmap -- virtual inherited (mem) base (mem) + pThis->__regmemUnmap__ = &__nvoc_up_thunk_Memory_regmemUnmap; - pThis->__regmemIsExportAllowed__ = &__nvoc_thunk_Memory_regmemIsExportAllowed; + // regmemGetMemInterMapParams -- virtual inherited (mem) base (mem) + pThis->__regmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_regmemGetMemInterMapParams; - pThis->__regmemGetRefCount__ = &__nvoc_thunk_RsResource_regmemGetRefCount; + // regmemCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body + pThis->__regmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_regmemCheckMemInterUnmap; - pThis->__regmemAddAdditionalDependants__ = &__nvoc_thunk_RsResource_regmemAddAdditionalDependants; + // regmemGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) + pThis->__regmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_regmemGetMemoryMappingDescriptor; - pThis->__regmemControl_Prologue__ = &__nvoc_thunk_RmResource_regmemControl_Prologue; + // regmemCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body + pThis->__regmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_regmemCheckCopyPermissions; - pThis->__regmemIsGpuMapAllowed__ = &__nvoc_thunk_Memory_regmemIsGpuMapAllowed; + // regmemIsReady -- virtual inherited (mem) base (mem) + pThis->__regmemIsReady__ = &__nvoc_up_thunk_Memory_regmemIsReady; - pThis->__regmemUnmapFrom__ = &__nvoc_thunk_RsResource_regmemUnmapFrom; + // regmemIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__regmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_regmemIsGpuMapAllowed; - pThis->__regmemControl_Epilogue__ = &__nvoc_thunk_RmResource_regmemControl_Epilogue; + // regmemIsExportAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__regmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_regmemIsExportAllowed; - pThis->__regmemControl__ = &__nvoc_thunk_Memory_regmemControl; + // regmemAccessCallback -- virtual inherited (rmres) base (mem) + pThis->__regmemAccessCallback__ = &__nvoc_up_thunk_RmResource_regmemAccessCallback; - pThis->__regmemUnmap__ = &__nvoc_thunk_Memory_regmemUnmap; + // regmemShareCallback -- virtual inherited (rmres) base (mem) + pThis->__regmemShareCallback__ = &__nvoc_up_thunk_RmResource_regmemShareCallback; - pThis->__regmemGetMemInterMapParams__ = &__nvoc_thunk_Memory_regmemGetMemInterMapParams; + // regmemControlSerialization_Prologue -- virtual inherited (rmres) base (mem) + pThis->__regmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_regmemControlSerialization_Prologue; - pThis->__regmemGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_regmemGetMemoryMappingDescriptor; + // regmemControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__regmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_regmemControlSerialization_Epilogue; - pThis->__regmemControlFilter__ = &__nvoc_thunk_RsResource_regmemControlFilter; + // regmemControl_Prologue -- virtual inherited (rmres) base (mem) + pThis->__regmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_regmemControl_Prologue; - pThis->__regmemControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_regmemControlSerialization_Prologue; + // regmemControl_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__regmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_regmemControl_Epilogue; - pThis->__regmemIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_regmemIsPartialUnmapSupported; + // regmemPreDestruct -- virtual inherited (res) base (mem) + pThis->__regmemPreDestruct__ = &__nvoc_up_thunk_RsResource_regmemPreDestruct; - pThis->__regmemIsReady__ = &__nvoc_thunk_Memory_regmemIsReady; + // regmemControlFilter -- virtual inherited (res) base (mem) + pThis->__regmemControlFilter__ = &__nvoc_up_thunk_RsResource_regmemControlFilter; - pThis->__regmemCheckCopyPermissions__ = &__nvoc_thunk_Memory_regmemCheckCopyPermissions; + // regmemIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body + pThis->__regmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_regmemIsPartialUnmapSupported; - pThis->__regmemPreDestruct__ = &__nvoc_thunk_RsResource_regmemPreDestruct; + // regmemMapTo -- virtual inherited (res) base (mem) + pThis->__regmemMapTo__ = &__nvoc_up_thunk_RsResource_regmemMapTo; - pThis->__regmemIsDuplicate__ = &__nvoc_thunk_Memory_regmemIsDuplicate; + // regmemUnmapFrom -- virtual inherited (res) base (mem) + pThis->__regmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_regmemUnmapFrom; - pThis->__regmemControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_regmemControlSerialization_Epilogue; + // regmemGetRefCount -- virtual inherited (res) base (mem) + pThis->__regmemGetRefCount__ = &__nvoc_up_thunk_RsResource_regmemGetRefCount; - pThis->__regmemMap__ = &__nvoc_thunk_Memory_regmemMap; + // regmemAddAdditionalDependants -- virtual inherited (res) base (mem) + pThis->__regmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_regmemAddAdditionalDependants; +} // End __nvoc_init_funcTable_RegisterMemory_1 with approximately 27 basic block(s). - pThis->__regmemAccessCallback__ = &__nvoc_thunk_RmResource_regmemAccessCallback; -} +// Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_RegisterMemory(RegisterMemory *pThis) { + + // Initialize vtable(s) with 26 per-object function pointer(s). __nvoc_init_funcTable_RegisterMemory_1(pThis); } diff --git a/src/nvidia/generated/g_reg_mem_nvoc.h b/src/nvidia/generated/g_reg_mem_nvoc.h index 2fe0cf0d11..fb0164059c 100644 --- a/src/nvidia/generated/g_reg_mem_nvoc.h +++ b/src/nvidia/generated/g_reg_mem_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_REG_MEM_NVOC_H_ #define _G_REG_MEM_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_reg_mem_nvoc.h" #ifndef _REGISTER_MEMORY_H_ @@ -51,41 +59,50 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct RegisterMemory { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Memory *__nvoc_pbase_Memory; - struct RegisterMemory *__nvoc_pbase_RegisterMemory; - NvBool (*__regmemCanCopy__)(struct RegisterMemory *); - NV_STATUS (*__regmemCheckMemInterUnmap__)(struct RegisterMemory *, NvBool); - NvBool (*__regmemShareCallback__)(struct RegisterMemory *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__regmemMapTo__)(struct RegisterMemory *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__regmemGetMapAddrSpace__)(struct RegisterMemory *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvBool (*__regmemIsExportAllowed__)(struct RegisterMemory *); - NvU32 (*__regmemGetRefCount__)(struct RegisterMemory *); - void (*__regmemAddAdditionalDependants__)(struct RsClient *, struct RegisterMemory *, RsResourceRef *); - NV_STATUS (*__regmemControl_Prologue__)(struct RegisterMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__regmemIsGpuMapAllowed__)(struct RegisterMemory *, struct OBJGPU *); - NV_STATUS (*__regmemUnmapFrom__)(struct RegisterMemory *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__regmemControl_Epilogue__)(struct RegisterMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__regmemControl__)(struct RegisterMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__regmemUnmap__)(struct RegisterMemory *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__regmemGetMemInterMapParams__)(struct RegisterMemory *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__regmemGetMemoryMappingDescriptor__)(struct RegisterMemory *, MEMORY_DESCRIPTOR **); - NV_STATUS (*__regmemControlFilter__)(struct RegisterMemory *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__regmemControlSerialization_Prologue__)(struct RegisterMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__regmemIsPartialUnmapSupported__)(struct RegisterMemory *); - NV_STATUS (*__regmemIsReady__)(struct RegisterMemory *, NvBool); - NV_STATUS (*__regmemCheckCopyPermissions__)(struct RegisterMemory *, struct OBJGPU *, struct Device *); - void (*__regmemPreDestruct__)(struct RegisterMemory *); - NV_STATUS (*__regmemIsDuplicate__)(struct RegisterMemory *, NvHandle, NvBool *); - void (*__regmemControlSerialization_Epilogue__)(struct RegisterMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__regmemMap__)(struct RegisterMemory *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__regmemAccessCallback__)(struct RegisterMemory *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct Memory *__nvoc_pbase_Memory; // mem super + struct RegisterMemory *__nvoc_pbase_RegisterMemory; // regmem + + // Vtable with 26 per-object function pointers + NvBool (*__regmemCanCopy__)(struct RegisterMemory * /*this*/); // virtual override (res) base (mem) + NV_STATUS (*__regmemIsDuplicate__)(struct RegisterMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) + NV_STATUS (*__regmemGetMapAddrSpace__)(struct RegisterMemory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) + NV_STATUS (*__regmemControl__)(struct RegisterMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (mem) base (mem) + NV_STATUS (*__regmemMap__)(struct RegisterMemory * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__regmemUnmap__)(struct RegisterMemory * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__regmemGetMemInterMapParams__)(struct RegisterMemory * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (mem) base (mem) + NV_STATUS (*__regmemCheckMemInterUnmap__)(struct RegisterMemory * /*this*/, NvBool); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__regmemGetMemoryMappingDescriptor__)(struct RegisterMemory * /*this*/, MEMORY_DESCRIPTOR **); // virtual inherited (mem) base (mem) + NV_STATUS (*__regmemCheckCopyPermissions__)(struct RegisterMemory * /*this*/, struct OBJGPU *, struct Device *); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__regmemIsReady__)(struct RegisterMemory * /*this*/, NvBool); // virtual inherited (mem) base (mem) + NvBool (*__regmemIsGpuMapAllowed__)(struct RegisterMemory * /*this*/, struct OBJGPU *); // inline virtual inherited (mem) base (mem) body + NvBool (*__regmemIsExportAllowed__)(struct RegisterMemory * /*this*/); // inline virtual inherited (mem) base (mem) body + NvBool (*__regmemAccessCallback__)(struct RegisterMemory * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (mem) + NvBool (*__regmemShareCallback__)(struct RegisterMemory * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__regmemControlSerialization_Prologue__)(struct RegisterMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__regmemControlSerialization_Epilogue__)(struct RegisterMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__regmemControl_Prologue__)(struct RegisterMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__regmemControl_Epilogue__)(struct RegisterMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__regmemPreDestruct__)(struct RegisterMemory * /*this*/); // virtual inherited (res) base (mem) + NV_STATUS (*__regmemControlFilter__)(struct RegisterMemory * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (mem) + NvBool (*__regmemIsPartialUnmapSupported__)(struct RegisterMemory * /*this*/); // inline virtual inherited (res) base (mem) body + NV_STATUS (*__regmemMapTo__)(struct RegisterMemory * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (mem) + NV_STATUS (*__regmemUnmapFrom__)(struct RegisterMemory * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (mem) + NvU32 (*__regmemGetRefCount__)(struct RegisterMemory * /*this*/); // virtual inherited (res) base (mem) + void (*__regmemAddAdditionalDependants__)(struct RsClient *, struct RegisterMemory * /*this*/, RsResourceRef *); // virtual inherited (res) base (mem) }; #ifndef __NVOC_CLASS_RegisterMemory_TYPEDEF__ @@ -97,6 +114,7 @@ typedef struct RegisterMemory RegisterMemory; #define __nvoc_class_id_RegisterMemory 0x40d457 #endif /* __nvoc_class_id_RegisterMemory */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_RegisterMemory; #define __staticCast_RegisterMemory(pThis) \ @@ -109,145 +127,174 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_RegisterMemory; ((RegisterMemory*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(RegisterMemory))) #endif //__nvoc_reg_mem_h_disabled - NV_STATUS __nvoc_objCreateDynamic_RegisterMemory(RegisterMemory**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_RegisterMemory(RegisterMemory**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_RegisterMemory(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_RegisterMemory((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define regmemCanCopy_FNPTR(pRegisterMemory) pRegisterMemory->__regmemCanCopy__ #define regmemCanCopy(pRegisterMemory) regmemCanCopy_DISPATCH(pRegisterMemory) -#define regmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) regmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define regmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) regmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define regmemMapTo(pResource, pParams) regmemMapTo_DISPATCH(pResource, pParams) +#define regmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define regmemIsDuplicate(pMemory, hMemory, pDuplicate) regmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) +#define regmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ #define regmemGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) regmemGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define regmemIsExportAllowed(pMemory) regmemIsExportAllowed_DISPATCH(pMemory) -#define regmemGetRefCount(pResource) regmemGetRefCount_DISPATCH(pResource) -#define regmemAddAdditionalDependants(pClient, pResource, pReference) regmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define regmemControl_Prologue(pResource, pCallContext, pParams) regmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define regmemIsGpuMapAllowed(pMemory, pGpu) regmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define regmemUnmapFrom(pResource, pParams) regmemUnmapFrom_DISPATCH(pResource, pParams) -#define regmemControl_Epilogue(pResource, pCallContext, pParams) regmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define regmemControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ #define regmemControl(pMemory, pCallContext, pParams) regmemControl_DISPATCH(pMemory, pCallContext, pParams) +#define regmemMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define regmemMap(pMemory, pCallContext, pParams, pCpuMapping) regmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define regmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ #define regmemUnmap(pMemory, pCallContext, pCpuMapping) regmemUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) +#define regmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ #define regmemGetMemInterMapParams(pMemory, pParams) regmemGetMemInterMapParams_DISPATCH(pMemory, pParams) +#define regmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define regmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) regmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) +#define regmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ #define regmemGetMemoryMappingDescriptor(pMemory, ppMemDesc) regmemGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define regmemControlFilter(pResource, pCallContext, pParams) regmemControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define regmemControlSerialization_Prologue(pResource, pCallContext, pParams) regmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define regmemIsPartialUnmapSupported(pResource) regmemIsPartialUnmapSupported_DISPATCH(pResource) -#define regmemIsReady(pMemory, bCopyConstructorContext) regmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define regmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ #define regmemCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) regmemCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define regmemPreDestruct(pResource) regmemPreDestruct_DISPATCH(pResource) -#define regmemIsDuplicate(pMemory, hMemory, pDuplicate) regmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define regmemControlSerialization_Epilogue(pResource, pCallContext, pParams) regmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define regmemMap(pMemory, pCallContext, pParams, pCpuMapping) regmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define regmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define regmemIsReady(pMemory, bCopyConstructorContext) regmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define regmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define regmemIsGpuMapAllowed(pMemory, pGpu) regmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) +#define regmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define regmemIsExportAllowed(pMemory) regmemIsExportAllowed_DISPATCH(pMemory) +#define regmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ #define regmemAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) regmemAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool regmemCanCopy_IMPL(struct RegisterMemory *pRegisterMemory); +#define regmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define regmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) regmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define regmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define regmemControlSerialization_Prologue(pResource, pCallContext, pParams) regmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define regmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define regmemControlSerialization_Epilogue(pResource, pCallContext, pParams) regmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define regmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define regmemControl_Prologue(pResource, pCallContext, pParams) regmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define regmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define regmemControl_Epilogue(pResource, pCallContext, pParams) regmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define regmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define regmemPreDestruct(pResource) regmemPreDestruct_DISPATCH(pResource) +#define regmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define regmemControlFilter(pResource, pCallContext, pParams) regmemControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define regmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define regmemIsPartialUnmapSupported(pResource) regmemIsPartialUnmapSupported_DISPATCH(pResource) +#define regmemMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define regmemMapTo(pResource, pParams) regmemMapTo_DISPATCH(pResource, pParams) +#define regmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define regmemUnmapFrom(pResource, pParams) regmemUnmapFrom_DISPATCH(pResource, pParams) +#define regmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define regmemGetRefCount(pResource) regmemGetRefCount_DISPATCH(pResource) +#define regmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define regmemAddAdditionalDependants(pClient, pResource, pReference) regmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NvBool regmemCanCopy_DISPATCH(struct RegisterMemory *pRegisterMemory) { return pRegisterMemory->__regmemCanCopy__(pRegisterMemory); } -static inline NV_STATUS regmemCheckMemInterUnmap_DISPATCH(struct RegisterMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__regmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); -} - -static inline NvBool regmemShareCallback_DISPATCH(struct RegisterMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__regmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS regmemMapTo_DISPATCH(struct RegisterMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__regmemMapTo__(pResource, pParams); +static inline NV_STATUS regmemIsDuplicate_DISPATCH(struct RegisterMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return pMemory->__regmemIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS regmemGetMapAddrSpace_DISPATCH(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pMemory->__regmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } -static inline NvBool regmemIsExportAllowed_DISPATCH(struct RegisterMemory *pMemory) { - return pMemory->__regmemIsExportAllowed__(pMemory); +static inline NV_STATUS regmemControl_DISPATCH(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pMemory->__regmemControl__(pMemory, pCallContext, pParams); } -static inline NvU32 regmemGetRefCount_DISPATCH(struct RegisterMemory *pResource) { - return pResource->__regmemGetRefCount__(pResource); +static inline NV_STATUS regmemMap_DISPATCH(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pMemory->__regmemMap__(pMemory, pCallContext, pParams, pCpuMapping); } -static inline void regmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct RegisterMemory *pResource, RsResourceRef *pReference) { - pResource->__regmemAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS regmemUnmap_DISPATCH(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pMemory->__regmemUnmap__(pMemory, pCallContext, pCpuMapping); } -static inline NV_STATUS regmemControl_Prologue_DISPATCH(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__regmemControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS regmemGetMemInterMapParams_DISPATCH(struct RegisterMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pMemory->__regmemGetMemInterMapParams__(pMemory, pParams); } -static inline NvBool regmemIsGpuMapAllowed_DISPATCH(struct RegisterMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__regmemIsGpuMapAllowed__(pMemory, pGpu); +static inline NV_STATUS regmemCheckMemInterUnmap_DISPATCH(struct RegisterMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return pMemory->__regmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } -static inline NV_STATUS regmemUnmapFrom_DISPATCH(struct RegisterMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__regmemUnmapFrom__(pResource, pParams); +static inline NV_STATUS regmemGetMemoryMappingDescriptor_DISPATCH(struct RegisterMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return pMemory->__regmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } -static inline void regmemControl_Epilogue_DISPATCH(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__regmemControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS regmemCheckCopyPermissions_DISPATCH(struct RegisterMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return pMemory->__regmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } -static inline NV_STATUS regmemControl_DISPATCH(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__regmemControl__(pMemory, pCallContext, pParams); +static inline NV_STATUS regmemIsReady_DISPATCH(struct RegisterMemory *pMemory, NvBool bCopyConstructorContext) { + return pMemory->__regmemIsReady__(pMemory, bCopyConstructorContext); } -static inline NV_STATUS regmemUnmap_DISPATCH(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__regmemUnmap__(pMemory, pCallContext, pCpuMapping); +static inline NvBool regmemIsGpuMapAllowed_DISPATCH(struct RegisterMemory *pMemory, struct OBJGPU *pGpu) { + return pMemory->__regmemIsGpuMapAllowed__(pMemory, pGpu); } -static inline NV_STATUS regmemGetMemInterMapParams_DISPATCH(struct RegisterMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__regmemGetMemInterMapParams__(pMemory, pParams); +static inline NvBool regmemIsExportAllowed_DISPATCH(struct RegisterMemory *pMemory) { + return pMemory->__regmemIsExportAllowed__(pMemory); } -static inline NV_STATUS regmemGetMemoryMappingDescriptor_DISPATCH(struct RegisterMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__regmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); +static inline NvBool regmemAccessCallback_DISPATCH(struct RegisterMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__regmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS regmemControlFilter_DISPATCH(struct RegisterMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__regmemControlFilter__(pResource, pCallContext, pParams); +static inline NvBool regmemShareCallback_DISPATCH(struct RegisterMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__regmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS regmemControlSerialization_Prologue_DISPATCH(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__regmemControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool regmemIsPartialUnmapSupported_DISPATCH(struct RegisterMemory *pResource) { - return pResource->__regmemIsPartialUnmapSupported__(pResource); +static inline void regmemControlSerialization_Epilogue_DISPATCH(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__regmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS regmemIsReady_DISPATCH(struct RegisterMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__regmemIsReady__(pMemory, bCopyConstructorContext); +static inline NV_STATUS regmemControl_Prologue_DISPATCH(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__regmemControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS regmemCheckCopyPermissions_DISPATCH(struct RegisterMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__regmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); +static inline void regmemControl_Epilogue_DISPATCH(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__regmemControl_Epilogue__(pResource, pCallContext, pParams); } static inline void regmemPreDestruct_DISPATCH(struct RegisterMemory *pResource) { pResource->__regmemPreDestruct__(pResource); } -static inline NV_STATUS regmemIsDuplicate_DISPATCH(struct RegisterMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__regmemIsDuplicate__(pMemory, hMemory, pDuplicate); +static inline NV_STATUS regmemControlFilter_DISPATCH(struct RegisterMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__regmemControlFilter__(pResource, pCallContext, pParams); } -static inline void regmemControlSerialization_Epilogue_DISPATCH(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__regmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool regmemIsPartialUnmapSupported_DISPATCH(struct RegisterMemory *pResource) { + return pResource->__regmemIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS regmemMap_DISPATCH(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__regmemMap__(pMemory, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS regmemMapTo_DISPATCH(struct RegisterMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__regmemMapTo__(pResource, pParams); } -static inline NvBool regmemAccessCallback_DISPATCH(struct RegisterMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__regmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS regmemUnmapFrom_DISPATCH(struct RegisterMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__regmemUnmapFrom__(pResource, pParams); } +static inline NvU32 regmemGetRefCount_DISPATCH(struct RegisterMemory *pResource) { + return pResource->__regmemGetRefCount__(pResource); +} + +static inline void regmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct RegisterMemory *pResource, RsResourceRef *pReference) { + pResource->__regmemAddAdditionalDependants__(pClient, pResource, pReference); +} + +NvBool regmemCanCopy_IMPL(struct RegisterMemory *pRegisterMemory); + NV_STATUS regmemConstruct_IMPL(struct RegisterMemory *arg_pRegisterMemory, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_regmemConstruct(arg_pRegisterMemory, arg_pCallContext, arg_pParams) regmemConstruct_IMPL(arg_pRegisterMemory, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_resource_fwd_decls_nvoc.h b/src/nvidia/generated/g_resource_fwd_decls_nvoc.h index 7450a2ee3b..d8504fedf1 100644 --- a/src/nvidia/generated/g_resource_fwd_decls_nvoc.h +++ b/src/nvidia/generated/g_resource_fwd_decls_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_RESOURCE_FWD_DECLS_NVOC_H_ #define _G_RESOURCE_FWD_DECLS_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_resource_fwd_decls_nvoc.h" #ifndef RESOURCE_FWD_DECLS_H @@ -40,6 +48,7 @@ extern "C" { #include "rmconfig.h" // Base classes + struct ChannelDescendant; #ifndef __NVOC_CLASS_ChannelDescendant_TYPEDEF__ @@ -52,6 +61,7 @@ typedef struct ChannelDescendant ChannelDescendant; #endif /* __nvoc_class_id_ChannelDescendant */ + struct DispChannel; #ifndef __NVOC_CLASS_DispChannel_TYPEDEF__ @@ -64,6 +74,7 @@ typedef struct DispChannel DispChannel; #endif /* __nvoc_class_id_DispChannel */ + struct GpuResource; #ifndef __NVOC_CLASS_GpuResource_TYPEDEF__ @@ -76,6 +87,7 @@ typedef struct GpuResource GpuResource; #endif /* __nvoc_class_id_GpuResource */ + struct INotifier; #ifndef __NVOC_CLASS_INotifier_TYPEDEF__ @@ -88,6 +100,7 @@ typedef struct INotifier INotifier; #endif /* __nvoc_class_id_INotifier */ + struct Memory; #ifndef __NVOC_CLASS_Memory_TYPEDEF__ @@ -100,6 +113,7 @@ typedef struct Memory Memory; #endif /* __nvoc_class_id_Memory */ + struct Notifier; #ifndef __NVOC_CLASS_Notifier_TYPEDEF__ @@ -112,6 +126,7 @@ typedef struct Notifier Notifier; #endif /* __nvoc_class_id_Notifier */ + struct NotifShare; #ifndef __NVOC_CLASS_NotifShare_TYPEDEF__ @@ -124,6 +139,7 @@ typedef struct NotifShare NotifShare; #endif /* __nvoc_class_id_NotifShare */ + struct Resource; #ifndef __NVOC_CLASS_Resource_TYPEDEF__ @@ -136,6 +152,7 @@ typedef struct Resource Resource; #endif /* __nvoc_class_id_Resource */ + struct RmResource; #ifndef __NVOC_CLASS_RmResource_TYPEDEF__ @@ -148,6 +165,7 @@ typedef struct RmResource RmResource; #endif /* __nvoc_class_id_RmResource */ + struct RmResourceCommon; #ifndef __NVOC_CLASS_RmResourceCommon_TYPEDEF__ @@ -160,6 +178,7 @@ typedef struct RmResourceCommon RmResourceCommon; #endif /* __nvoc_class_id_RmResourceCommon */ + struct RsResource; #ifndef __NVOC_CLASS_RsResource_TYPEDEF__ @@ -172,6 +191,7 @@ typedef struct RsResource RsResource; #endif /* __nvoc_class_id_RsResource */ + struct RsShared; #ifndef __NVOC_CLASS_RsShared_TYPEDEF__ @@ -186,6 +206,7 @@ typedef struct RsShared RsShared; // Classes disabled in orin but required forward declarations to build. + struct HostVgpuDeviceApi; #ifndef __NVOC_CLASS_HostVgpuDeviceApi_TYPEDEF__ @@ -198,6 +219,7 @@ typedef struct HostVgpuDeviceApi HostVgpuDeviceApi; #endif /* __nvoc_class_id_HostVgpuDeviceApi */ // also used by open rm + struct MpsApi; #ifndef __NVOC_CLASS_MpsApi_TYPEDEF__ @@ -210,6 +232,7 @@ typedef struct MpsApi MpsApi; #endif /* __nvoc_class_id_MpsApi */ + struct MIGConfigSession; #ifndef __NVOC_CLASS_MIGConfigSession_TYPEDEF__ @@ -222,6 +245,7 @@ typedef struct MIGConfigSession MIGConfigSession; #endif /* __nvoc_class_id_MIGConfigSession */ + struct FmSessionApi; #ifndef __NVOC_CLASS_FmSessionApi_TYPEDEF__ @@ -234,6 +258,7 @@ typedef struct FmSessionApi FmSessionApi; #endif /* __nvoc_class_id_FmSessionApi */ + struct MIGMonitorSession; #ifndef __NVOC_CLASS_MIGMonitorSession_TYPEDEF__ @@ -246,6 +271,7 @@ typedef struct MIGMonitorSession MIGMonitorSession; #endif /* __nvoc_class_id_MIGMonitorSession */ + struct TimerApi; #ifndef __NVOC_CLASS_TimerApi_TYPEDEF__ @@ -258,6 +284,7 @@ typedef struct TimerApi TimerApi; #endif /* __nvoc_class_id_TimerApi */ + struct KernelSMDebuggerSession; #ifndef __NVOC_CLASS_KernelSMDebuggerSession_TYPEDEF__ @@ -1206,10 +1233,28 @@ typedef struct KernelCcuApi KernelCcuApi; #define __nvoc_class_id_KernelCcuApi 0x3abed3 #endif /* __nvoc_class_id_KernelCcuApi */ +struct LockStressObject; + +#ifndef __NVOC_CLASS_LockStressObject_TYPEDEF__ +#define __NVOC_CLASS_LockStressObject_TYPEDEF__ +typedef struct LockStressObject LockStressObject; +#endif /* __NVOC_CLASS_LockStressObject_TYPEDEF__ */ + +#ifndef __nvoc_class_id_LockStressObject +#define __nvoc_class_id_LockStressObject 0xecce10 +#endif /* __nvoc_class_id_LockStressObject */ + + struct NVOCFwdDeclHack { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; - struct NVOCFwdDeclHack *__nvoc_pbase_NVOCFwdDeclHack; + + // Ancestor object pointers for `staticCast` feature + struct NVOCFwdDeclHack *__nvoc_pbase_NVOCFwdDeclHack; // nvocfwddeclhack + + // Data members struct RmClientResource *PRIVATE_FIELD(RmClientResource_NV01_ROOT); struct RmClientResource *PRIVATE_FIELD(RmClientResource_NV01_ROOT_NON_PRIV); struct RmClientResource *PRIVATE_FIELD(RmClientResource_NV01_ROOT_CLIENT); @@ -1361,6 +1406,7 @@ struct NVOCFwdDeclHack { struct Event *PRIVATE_FIELD(Event_NV01_EVENT_KERNEL_CALLBACK_EX); struct ConfidentialComputeApi *PRIVATE_FIELD(ConfidentialComputeApi_NV_CONFIDENTIAL_COMPUTE); struct KernelCcuApi *PRIVATE_FIELD(KernelCcuApi_NV_COUNTER_COLLECTION_UNIT); + struct LockStressObject *PRIVATE_FIELD(LockStressObject_LOCK_STRESS_OBJECT); }; #ifndef __NVOC_CLASS_NVOCFwdDeclHack_TYPEDEF__ @@ -1372,6 +1418,7 @@ typedef struct NVOCFwdDeclHack NVOCFwdDeclHack; #define __nvoc_class_id_NVOCFwdDeclHack 0x0d01f5 #endif /* __nvoc_class_id_NVOCFwdDeclHack */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_NVOCFwdDeclHack; #define __staticCast_NVOCFwdDeclHack(pThis) \ @@ -1384,7 +1431,6 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_NVOCFwdDeclHack; ((NVOCFwdDeclHack*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(NVOCFwdDeclHack))) #endif //__nvoc_resource_fwd_decls_h_disabled - NV_STATUS __nvoc_objCreateDynamic_NVOCFwdDeclHack(NVOCFwdDeclHack**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_NVOCFwdDeclHack(NVOCFwdDeclHack**, Dynamic*, NvU32); diff --git a/src/nvidia/generated/g_resource_nvoc.c b/src/nvidia/generated/g_resource_nvoc.c index d0c2544674..3484592741 100644 --- a/src/nvidia/generated/g_resource_nvoc.c +++ b/src/nvidia/generated/g_resource_nvoc.c @@ -77,10 +77,13 @@ NV_STATUS __nvoc_ctor_RmResourceCommon(RmResourceCommon *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_RmResourceCommon_1(RmResourceCommon *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_RmResourceCommon_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_RmResourceCommon(RmResourceCommon *pThis) { __nvoc_init_funcTable_RmResourceCommon_1(pThis); } @@ -158,78 +161,102 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_RmResource = /*pExportInfo=*/ &__nvoc_export_info_RmResource }; -static NvBool __nvoc_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) - __nvoc_rtti_RmResource_RsResource.offset), pInvokingClient, pAllocParams, accessRight); +// 6 down-thunk(s) defined to bridge methods in RmResource from superclasses + +// rmresAccessCallback: virtual override (res) base (res) +static NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) - __nvoc_rtti_RmResource_RsResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NvBool __nvoc_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) - __nvoc_rtti_RmResource_RsResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// rmresShareCallback: virtual override (res) base (res) +static NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) - __nvoc_rtti_RmResource_RsResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) - __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams); +// rmresControlSerialization_Prologue: virtual override (res) base (res) +static NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) - __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) - __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams); +// rmresControlSerialization_Epilogue: virtual override (res) base (res) +static void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) - __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) - __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams); +// rmresControl_Prologue: virtual override (res) base (res) +static NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) - __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) - __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams); +// rmresControl_Epilogue: virtual override (res) base (res) +static void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) - __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControl((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams); + +// 12 up-thunk(s) defined to bridge methods in RmResource to superclasses + +// rmresCanCopy: virtual inherited (res) base (res) +static NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pCpuMapping); +// rmresIsDuplicate: virtual inherited (res) base (res) +static NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmResource_RsResource.offset), pParams); +// rmresPreDestruct: virtual inherited (res) base (res) +static void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset)); } -static NvU32 __nvoc_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmResource_RsResource.offset)); +// rmresControl: virtual inherited (res) base (res) +static NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams); +// rmresControlFilter: virtual inherited (res) base (res) +static NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmResource_RsResource.offset), pReference); +// rmresMap: virtual inherited (res) base (res) +static NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams, pCpuMapping); } -static NvBool __nvoc_thunk_RsResource_rmresCanCopy(struct RmResource *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmResource_RsResource.offset)); +// rmresUnmap: virtual inherited (res) base (res) +static NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pCpuMapping); } -static NvBool __nvoc_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmResource_RsResource.offset)); +// rmresIsPartialUnmapSupported: inline virtual inherited (res) base (res) body +static NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset)); } -static void __nvoc_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmResource_RsResource.offset)); +// rmresMapTo: virtual inherited (res) base (res) +static NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmResource_RsResource.offset), pParams); +// rmresUnmapFrom: virtual inherited (res) base (res) +static NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmResource_RsResource.offset), hMemory, pDuplicate); +// rmresGetRefCount: virtual inherited (res) base (res) +static NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams, pCpuMapping); +// rmresAddAdditionalDependants: virtual inherited (res) base (res) +static void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_RmResource = { /*numEntries=*/ 0, @@ -272,65 +299,85 @@ NV_STATUS __nvoc_ctor_RmResource(RmResource *pThis, struct CALL_CONTEXT * arg_pC return status; } +// Vtable initialization static void __nvoc_init_funcTable_RmResource_1(RmResource *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // rmresAccessCallback -- virtual override (res) base (res) pThis->__rmresAccessCallback__ = &rmresAccessCallback_IMPL; + pThis->__nvoc_base_RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback; + // rmresShareCallback -- virtual override (res) base (res) pThis->__rmresShareCallback__ = &rmresShareCallback_IMPL; + pThis->__nvoc_base_RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback; + // rmresGetMemInterMapParams -- virtual pThis->__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL; + // rmresCheckMemInterUnmap -- virtual pThis->__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL; + // rmresGetMemoryMappingDescriptor -- virtual pThis->__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL; + // rmresControlSerialization_Prologue -- virtual override (res) base (res) pThis->__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL; + pThis->__nvoc_base_RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue; + // rmresControlSerialization_Epilogue -- virtual override (res) base (res) pThis->__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL; + pThis->__nvoc_base_RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue; + // rmresControl_Prologue -- virtual override (res) base (res) pThis->__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL; + pThis->__nvoc_base_RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue; + // rmresControl_Epilogue -- virtual override (res) base (res) pThis->__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL; + pThis->__nvoc_base_RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue; - pThis->__nvoc_base_RsResource.__resAccessCallback__ = &__nvoc_thunk_RmResource_resAccessCallback; - - pThis->__nvoc_base_RsResource.__resShareCallback__ = &__nvoc_thunk_RmResource_resShareCallback; + // rmresCanCopy -- virtual inherited (res) base (res) + pThis->__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy; - pThis->__nvoc_base_RsResource.__resControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_resControlSerialization_Prologue; + // rmresIsDuplicate -- virtual inherited (res) base (res) + pThis->__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate; - pThis->__nvoc_base_RsResource.__resControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_resControlSerialization_Epilogue; + // rmresPreDestruct -- virtual inherited (res) base (res) + pThis->__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct; - pThis->__nvoc_base_RsResource.__resControl_Prologue__ = &__nvoc_thunk_RmResource_resControl_Prologue; + // rmresControl -- virtual inherited (res) base (res) + pThis->__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl; - pThis->__nvoc_base_RsResource.__resControl_Epilogue__ = &__nvoc_thunk_RmResource_resControl_Epilogue; + // rmresControlFilter -- virtual inherited (res) base (res) + pThis->__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter; - pThis->__rmresControl__ = &__nvoc_thunk_RsResource_rmresControl; + // rmresMap -- virtual inherited (res) base (res) + pThis->__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap; - pThis->__rmresUnmap__ = &__nvoc_thunk_RsResource_rmresUnmap; + // rmresUnmap -- virtual inherited (res) base (res) + pThis->__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap; - pThis->__rmresMapTo__ = &__nvoc_thunk_RsResource_rmresMapTo; + // rmresIsPartialUnmapSupported -- inline virtual inherited (res) base (res) body + pThis->__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported; - pThis->__rmresGetRefCount__ = &__nvoc_thunk_RsResource_rmresGetRefCount; + // rmresMapTo -- virtual inherited (res) base (res) + pThis->__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo; - pThis->__rmresControlFilter__ = &__nvoc_thunk_RsResource_rmresControlFilter; + // rmresUnmapFrom -- virtual inherited (res) base (res) + pThis->__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom; - pThis->__rmresAddAdditionalDependants__ = &__nvoc_thunk_RsResource_rmresAddAdditionalDependants; + // rmresGetRefCount -- virtual inherited (res) base (res) + pThis->__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount; - pThis->__rmresCanCopy__ = &__nvoc_thunk_RsResource_rmresCanCopy; + // rmresAddAdditionalDependants -- virtual inherited (res) base (res) + pThis->__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants; +} // End __nvoc_init_funcTable_RmResource_1 with approximately 27 basic block(s). - pThis->__rmresIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_rmresIsPartialUnmapSupported; - - pThis->__rmresPreDestruct__ = &__nvoc_thunk_RsResource_rmresPreDestruct; - - pThis->__rmresUnmapFrom__ = &__nvoc_thunk_RsResource_rmresUnmapFrom; - - pThis->__rmresIsDuplicate__ = &__nvoc_thunk_RsResource_rmresIsDuplicate; - - pThis->__rmresMap__ = &__nvoc_thunk_RsResource_rmresMap; -} +// Initialize vtable(s) for 21 virtual method(s). void __nvoc_init_funcTable_RmResource(RmResource *pThis) { + + // Initialize vtable(s) with 21 per-object function pointer(s). __nvoc_init_funcTable_RmResource_1(pThis); } diff --git a/src/nvidia/generated/g_resource_nvoc.h b/src/nvidia/generated/g_resource_nvoc.h index cdd0a3c536..e48bebe7d1 100644 --- a/src/nvidia/generated/g_resource_nvoc.h +++ b/src/nvidia/generated/g_resource_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_RESOURCE_NVOC_H_ #define _G_RESOURCE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_resource_nvoc.h" #ifndef _RESOURCE_H_ @@ -135,9 +143,14 @@ typedef struct RMRES_MEM_INTER_MAP_PARAMS RMRES_MEM_INTER_MAP_PARAMS; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct RmResourceCommon { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; + + // Ancestor object pointers for `staticCast` feature + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn }; #ifndef __NVOC_CLASS_RmResourceCommon_TYPEDEF__ @@ -149,6 +162,7 @@ typedef struct RmResourceCommon RmResourceCommon; #define __nvoc_class_id_RmResourceCommon 0x8ef259 #endif /* __nvoc_class_id_RmResourceCommon */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmResourceCommon; #define __staticCast_RmResourceCommon(pThis) \ @@ -161,13 +175,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmResourceCommon; ((RmResourceCommon*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(RmResourceCommon))) #endif //__nvoc_resource_h_disabled - NV_STATUS __nvoc_objCreateDynamic_RmResourceCommon(RmResourceCommon**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_RmResourceCommon(RmResourceCommon**, Dynamic*, NvU32); #define __objCreate_RmResourceCommon(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_RmResourceCommon((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS rmrescmnConstruct_IMPL(struct RmResourceCommon *arg_pResourceCommmon); #define __nvoc_rmrescmnConstruct(arg_pResourceCommmon) rmrescmnConstruct_IMPL(arg_pResourceCommmon) @@ -188,35 +205,46 @@ NV_STATUS rmrescmnConstruct_IMPL(struct RmResourceCommon *arg_pResourceCommmon); #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct RmResource { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RsResource __nvoc_base_RsResource; struct RmResourceCommon __nvoc_base_RmResourceCommon; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - NvBool (*__rmresAccessCallback__)(struct RmResource *, struct RsClient *, void *, RsAccessRight); - NvBool (*__rmresShareCallback__)(struct RmResource *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__rmresGetMemInterMapParams__)(struct RmResource *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__rmresCheckMemInterUnmap__)(struct RmResource *, NvBool); - NV_STATUS (*__rmresGetMemoryMappingDescriptor__)(struct RmResource *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__rmresControlSerialization_Prologue__)(struct RmResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__rmresControlSerialization_Epilogue__)(struct RmResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__rmresControl_Prologue__)(struct RmResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__rmresControl_Epilogue__)(struct RmResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__rmresControl__)(struct RmResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__rmresUnmap__)(struct RmResource *, struct CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__rmresMapTo__)(struct RmResource *, RS_RES_MAP_TO_PARAMS *); - NvU32 (*__rmresGetRefCount__)(struct RmResource *); - NV_STATUS (*__rmresControlFilter__)(struct RmResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__rmresAddAdditionalDependants__)(struct RsClient *, struct RmResource *, RsResourceRef *); - NvBool (*__rmresCanCopy__)(struct RmResource *); - NvBool (*__rmresIsPartialUnmapSupported__)(struct RmResource *); - void (*__rmresPreDestruct__)(struct RmResource *); - NV_STATUS (*__rmresUnmapFrom__)(struct RmResource *, RS_RES_UNMAP_FROM_PARAMS *); - NV_STATUS (*__rmresIsDuplicate__)(struct RmResource *, NvHandle, NvBool *); - NV_STATUS (*__rmresMap__)(struct RmResource *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct RsResource *__nvoc_pbase_RsResource; // res super + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super + struct RmResource *__nvoc_pbase_RmResource; // rmres + + // Vtable with 21 per-object function pointers + NvBool (*__rmresAccessCallback__)(struct RmResource * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual override (res) base (res) + NvBool (*__rmresShareCallback__)(struct RmResource * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual override (res) base (res) + NV_STATUS (*__rmresGetMemInterMapParams__)(struct RmResource * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual + NV_STATUS (*__rmresCheckMemInterUnmap__)(struct RmResource * /*this*/, NvBool); // virtual + NV_STATUS (*__rmresGetMemoryMappingDescriptor__)(struct RmResource * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual + NV_STATUS (*__rmresControlSerialization_Prologue__)(struct RmResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (res) + void (*__rmresControlSerialization_Epilogue__)(struct RmResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (res) + NV_STATUS (*__rmresControl_Prologue__)(struct RmResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (res) + void (*__rmresControl_Epilogue__)(struct RmResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (res) + NvBool (*__rmresCanCopy__)(struct RmResource * /*this*/); // virtual inherited (res) base (res) + NV_STATUS (*__rmresIsDuplicate__)(struct RmResource * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (res) + void (*__rmresPreDestruct__)(struct RmResource * /*this*/); // virtual inherited (res) base (res) + NV_STATUS (*__rmresControl__)(struct RmResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (res) + NV_STATUS (*__rmresControlFilter__)(struct RmResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (res) + NV_STATUS (*__rmresMap__)(struct RmResource * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (res) + NV_STATUS (*__rmresUnmap__)(struct RmResource * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (res) + NvBool (*__rmresIsPartialUnmapSupported__)(struct RmResource * /*this*/); // inline virtual inherited (res) base (res) body + NV_STATUS (*__rmresMapTo__)(struct RmResource * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (res) + NV_STATUS (*__rmresUnmapFrom__)(struct RmResource * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (res) + NvU32 (*__rmresGetRefCount__)(struct RmResource * /*this*/); // virtual inherited (res) base (res) + void (*__rmresAddAdditionalDependants__)(struct RsClient *, struct RmResource * /*this*/, RsResourceRef *); // virtual inherited (res) base (res) + + // Data members NvU32 rpcGpuInstance; NvBool bRpcFree; }; @@ -230,6 +258,7 @@ typedef struct RmResource RmResource; #define __nvoc_class_id_RmResource 0x03610d #endif /* __nvoc_class_id_RmResource */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmResource; #define __staticCast_RmResource(pThis) \ @@ -242,136 +271,160 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmResource; ((RmResource*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(RmResource))) #endif //__nvoc_resource_h_disabled - NV_STATUS __nvoc_objCreateDynamic_RmResource(RmResource**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_RmResource(RmResource**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_RmResource(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_RmResource((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define rmresAccessCallback_FNPTR(pResource) pResource->__rmresAccessCallback__ #define rmresAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) rmresAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define rmresShareCallback_FNPTR(pResource) pResource->__rmresShareCallback__ #define rmresShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) rmresShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define rmresGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__rmresGetMemInterMapParams__ #define rmresGetMemInterMapParams(pRmResource, pParams) rmresGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define rmresCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__rmresCheckMemInterUnmap__ #define rmresCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) rmresCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define rmresGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__rmresGetMemoryMappingDescriptor__ #define rmresGetMemoryMappingDescriptor(pRmResource, ppMemDesc) rmresGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) +#define rmresControlSerialization_Prologue_FNPTR(pResource) pResource->__rmresControlSerialization_Prologue__ #define rmresControlSerialization_Prologue(pResource, pCallContext, pParams) rmresControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define rmresControlSerialization_Epilogue_FNPTR(pResource) pResource->__rmresControlSerialization_Epilogue__ #define rmresControlSerialization_Epilogue(pResource, pCallContext, pParams) rmresControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define rmresControl_Prologue_FNPTR(pResource) pResource->__rmresControl_Prologue__ #define rmresControl_Prologue(pResource, pCallContext, pParams) rmresControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define rmresControl_Epilogue_FNPTR(pResource) pResource->__rmresControl_Epilogue__ #define rmresControl_Epilogue(pResource, pCallContext, pParams) rmresControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define rmresCanCopy_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resCanCopy__ +#define rmresCanCopy(pResource) rmresCanCopy_DISPATCH(pResource) +#define rmresIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resIsDuplicate__ +#define rmresIsDuplicate(pResource, hMemory, pDuplicate) rmresIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define rmresPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resPreDestruct__ +#define rmresPreDestruct(pResource) rmresPreDestruct_DISPATCH(pResource) +#define rmresControl_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resControl__ #define rmresControl(pResource, pCallContext, pParams) rmresControl_DISPATCH(pResource, pCallContext, pParams) +#define rmresControlFilter_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resControlFilter__ +#define rmresControlFilter(pResource, pCallContext, pParams) rmresControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define rmresMap_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resMap__ +#define rmresMap(pResource, pCallContext, pParams, pCpuMapping) rmresMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define rmresUnmap_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resUnmap__ #define rmresUnmap(pResource, pCallContext, pCpuMapping) rmresUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define rmresIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define rmresIsPartialUnmapSupported(pResource) rmresIsPartialUnmapSupported_DISPATCH(pResource) +#define rmresMapTo_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resMapTo__ #define rmresMapTo(pResource, pParams) rmresMapTo_DISPATCH(pResource, pParams) +#define rmresUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resUnmapFrom__ +#define rmresUnmapFrom(pResource, pParams) rmresUnmapFrom_DISPATCH(pResource, pParams) +#define rmresGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resGetRefCount__ #define rmresGetRefCount(pResource) rmresGetRefCount_DISPATCH(pResource) -#define rmresControlFilter(pResource, pCallContext, pParams) rmresControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define rmresAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resAddAdditionalDependants__ #define rmresAddAdditionalDependants(pClient, pResource, pReference) rmresAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define rmresCanCopy(pResource) rmresCanCopy_DISPATCH(pResource) -#define rmresIsPartialUnmapSupported(pResource) rmresIsPartialUnmapSupported_DISPATCH(pResource) -#define rmresPreDestruct(pResource) rmresPreDestruct_DISPATCH(pResource) -#define rmresUnmapFrom(pResource, pParams) rmresUnmapFrom_DISPATCH(pResource, pParams) -#define rmresIsDuplicate(pResource, hMemory, pDuplicate) rmresIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define rmresMap(pResource, pCallContext, pParams, pCpuMapping) rmresMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -NvBool rmresAccessCallback_IMPL(struct RmResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); +// Dispatch functions static inline NvBool rmresAccessCallback_DISPATCH(struct RmResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return pResource->__rmresAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -NvBool rmresShareCallback_IMPL(struct RmResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); - static inline NvBool rmresShareCallback_DISPATCH(struct RmResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return pResource->__rmresShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } -NV_STATUS rmresGetMemInterMapParams_IMPL(struct RmResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); - static inline NV_STATUS rmresGetMemInterMapParams_DISPATCH(struct RmResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__rmresGetMemInterMapParams__(pRmResource, pParams); } -NV_STATUS rmresCheckMemInterUnmap_IMPL(struct RmResource *pRmResource, NvBool bSubdeviceHandleProvided); - static inline NV_STATUS rmresCheckMemInterUnmap_DISPATCH(struct RmResource *pRmResource, NvBool bSubdeviceHandleProvided) { return pRmResource->__rmresCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -NV_STATUS rmresGetMemoryMappingDescriptor_IMPL(struct RmResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); - static inline NV_STATUS rmresGetMemoryMappingDescriptor_DISPATCH(struct RmResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return pRmResource->__rmresGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -NV_STATUS rmresControlSerialization_Prologue_IMPL(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline NV_STATUS rmresControlSerialization_Prologue_DISPATCH(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__rmresControlSerialization_Prologue__(pResource, pCallContext, pParams); } -void rmresControlSerialization_Epilogue_IMPL(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline void rmresControlSerialization_Epilogue_DISPATCH(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { pResource->__rmresControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -NV_STATUS rmresControl_Prologue_IMPL(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline NV_STATUS rmresControl_Prologue_DISPATCH(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__rmresControl_Prologue__(pResource, pCallContext, pParams); } -void rmresControl_Epilogue_IMPL(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline void rmresControl_Epilogue_DISPATCH(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { pResource->__rmresControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS rmresControl_DISPATCH(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__rmresControl__(pResource, pCallContext, pParams); +static inline NvBool rmresCanCopy_DISPATCH(struct RmResource *pResource) { + return pResource->__rmresCanCopy__(pResource); } -static inline NV_STATUS rmresUnmap_DISPATCH(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__rmresUnmap__(pResource, pCallContext, pCpuMapping); +static inline NV_STATUS rmresIsDuplicate_DISPATCH(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__rmresIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS rmresMapTo_DISPATCH(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__rmresMapTo__(pResource, pParams); +static inline void rmresPreDestruct_DISPATCH(struct RmResource *pResource) { + pResource->__rmresPreDestruct__(pResource); } -static inline NvU32 rmresGetRefCount_DISPATCH(struct RmResource *pResource) { - return pResource->__rmresGetRefCount__(pResource); +static inline NV_STATUS rmresControl_DISPATCH(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__rmresControl__(pResource, pCallContext, pParams); } static inline NV_STATUS rmresControlFilter_DISPATCH(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__rmresControlFilter__(pResource, pCallContext, pParams); } -static inline void rmresAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference) { - pResource->__rmresAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS rmresMap_DISPATCH(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__rmresMap__(pResource, pCallContext, pParams, pCpuMapping); } -static inline NvBool rmresCanCopy_DISPATCH(struct RmResource *pResource) { - return pResource->__rmresCanCopy__(pResource); +static inline NV_STATUS rmresUnmap_DISPATCH(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pResource->__rmresUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool rmresIsPartialUnmapSupported_DISPATCH(struct RmResource *pResource) { return pResource->__rmresIsPartialUnmapSupported__(pResource); } -static inline void rmresPreDestruct_DISPATCH(struct RmResource *pResource) { - pResource->__rmresPreDestruct__(pResource); +static inline NV_STATUS rmresMapTo_DISPATCH(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__rmresMapTo__(pResource, pParams); } static inline NV_STATUS rmresUnmapFrom_DISPATCH(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return pResource->__rmresUnmapFrom__(pResource, pParams); } -static inline NV_STATUS rmresIsDuplicate_DISPATCH(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__rmresIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NvU32 rmresGetRefCount_DISPATCH(struct RmResource *pResource) { + return pResource->__rmresGetRefCount__(pResource); } -static inline NV_STATUS rmresMap_DISPATCH(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__rmresMap__(pResource, pCallContext, pParams, pCpuMapping); +static inline void rmresAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference) { + pResource->__rmresAddAdditionalDependants__(pClient, pResource, pReference); } +NvBool rmresAccessCallback_IMPL(struct RmResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); + +NvBool rmresShareCallback_IMPL(struct RmResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); + +NV_STATUS rmresGetMemInterMapParams_IMPL(struct RmResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); + +NV_STATUS rmresCheckMemInterUnmap_IMPL(struct RmResource *pRmResource, NvBool bSubdeviceHandleProvided); + +NV_STATUS rmresGetMemoryMappingDescriptor_IMPL(struct RmResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); + +NV_STATUS rmresControlSerialization_Prologue_IMPL(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +void rmresControlSerialization_Epilogue_IMPL(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +NV_STATUS rmresControl_Prologue_IMPL(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +void rmresControl_Epilogue_IMPL(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + NV_STATUS rmresConstruct_IMPL(struct RmResource *arg_pResource, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_rmresConstruct(arg_pResource, arg_pCallContext, arg_pParams) rmresConstruct_IMPL(arg_pResource, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_resserv_nvoc.h b/src/nvidia/generated/g_resserv_nvoc.h index 80c4810e05..cc2e9d3b34 100644 --- a/src/nvidia/generated/g_resserv_nvoc.h +++ b/src/nvidia/generated/g_resserv_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_RESSERV_NVOC_H_ #define _G_RESSERV_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_resserv_nvoc.h" #ifndef _RESSERV_H_ @@ -119,6 +127,7 @@ typedef struct RS_LOCK_INFO RS_LOCK_INFO; typedef struct RS_CONTROL_COOKIE RS_CONTROL_COOKIE; typedef NV_STATUS RsCtrlFunc(struct RS_RES_CONTROL_PARAMS_INTERNAL*); + struct RsClient; #ifndef __NVOC_CLASS_RsClient_TYPEDEF__ @@ -131,6 +140,7 @@ typedef struct RsClient RsClient; #endif /* __nvoc_class_id_RsClient */ + struct RsResource; #ifndef __NVOC_CLASS_RsResource_TYPEDEF__ @@ -143,6 +153,7 @@ typedef struct RsResource RsResource; #endif /* __nvoc_class_id_RsResource */ + struct RsShared; #ifndef __NVOC_CLASS_RsShared_TYPEDEF__ @@ -159,7 +170,6 @@ typedef struct RsShared RsShared; MAKE_LIST(RsResourceRefList, RsResourceRef*); MAKE_LIST(RsResourceList, RsResource*); MAKE_LIST(RsHandleList, NvHandle); -MAKE_LIST(RsClientList, CLIENT_ENTRY*); MAKE_LIST(RsShareList, RS_SHARE_POLICY); MAKE_MULTIMAP(RsIndex, RsResourceRef*); @@ -366,6 +376,12 @@ struct ACCESS_CONTROL #define RS_LOCK_VALIDATOR_INIT(lock, lockClass, inst) \ do { NV_ASSERT_OK(lockvalLockInit((lock), (lockClass), (inst))); } while(0) +#define RS_SPINLOCK_ACQUIRE(lock) do \ +{ \ + NV_ASSERT_OK(lockvalPreAcquire((validator))); \ + portSyncSpinlockAcquire((lock)) ; \ + lockvalPostAcquire((validator), LOCK_VAL_SPINLOCK); \ + #define RS_RWLOCK_ACQUIRE_READ(lock, validator) do \ { \ NV_ASSERT_OK(lockvalPreAcquire((validator))); \ @@ -380,6 +396,17 @@ struct ACCESS_CONTROL lockvalPostAcquire((validator), LOCK_VAL_WLOCK); \ } while(0) +#define RS_SPINLOCK_RELEASE_EXT(lock, validator, bOutOfOrder) do \ +{ \ + void *pLockValTlsEntry, *pReleasedLockNode; \ + if (bOutOfOrder) \ + NV_ASSERT_OK(lockvalReleaseOutOfOrder((validator), LOCK_VAL_SPINLOCK, &pLockValTlsEntry, &pReleasedLockNode)); \ + else \ + NV_ASSERT_OK(lockvalRelease((validator), LOCK_VAL_SPINLOCK, &pLockValTlsEntry, &pReleasedLockNode)); \ + portSyncSpinlockRelease((lock)); \ + lockvalMemoryRelease(pLockValTlsEntry, pReleasedLockNode); \ +} while(0) + #define RS_RWLOCK_RELEASE_READ_EXT(lock, validator, bOutOfOrder) do \ { \ void *pLockValTlsEntry, *pReleasedLockNode; \ @@ -404,12 +431,15 @@ struct ACCESS_CONTROL #else #define RS_LOCK_VALIDATOR_INIT(lock, lockClass, inst) +#define RS_SPINLOCK_ACQUIRE(lock, validator) do { portSyncSpinlockAcquire((lock)); } while(0) #define RS_RWLOCK_ACQUIRE_READ(lock, validator) do { portSyncRwLockAcquireRead((lock)); } while(0) #define RS_RWLOCK_ACQUIRE_WRITE(lock, validator) do { portSyncRwLockAcquireWrite((lock)); } while(0) +#define RS_SPINLOCK_RELEASE_EXT(lock, validator, bOutOfOrder) do { portSyncSpinlockRelease((lock)); } while(0) #define RS_RWLOCK_RELEASE_READ_EXT(lock, validator, bOutOfOrder) do { portSyncRwLockReleaseRead((lock)); } while(0) #define RS_RWLOCK_RELEASE_WRITE_EXT(lock, validator, bOutOfOrder) do { portSyncRwLockReleaseWrite((lock)); } while(0) #endif +#define RS_SPINLOCK_RELEASE(lock, validator) RS_SPINLOCK_RELEASE_EXT(lock, validator, NV_FALSE) #define RS_RWLOCK_RELEASE_READ(lock, validator) RS_RWLOCK_RELEASE_READ_EXT(lock, validator, NV_FALSE) #define RS_RWLOCK_RELEASE_WRITE(lock, validator) RS_RWLOCK_RELEASE_WRITE_EXT(lock, validator, NV_FALSE) diff --git a/src/nvidia/generated/g_rg_line_callback_nvoc.c b/src/nvidia/generated/g_rg_line_callback_nvoc.c index 7bc34f1be4..65ad2e1ab7 100644 --- a/src/nvidia/generated/g_rg_line_callback_nvoc.c +++ b/src/nvidia/generated/g_rg_line_callback_nvoc.c @@ -93,106 +93,134 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_RgLineCallback = /*pExportInfo=*/ &__nvoc_export_info_RgLineCallback }; -static NvBool __nvoc_thunk_GpuResource_rglcbShareCallback(struct RgLineCallback *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// 25 up-thunk(s) defined to bridge methods in RgLineCallback to superclasses + +// rglcbControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_rglcbControl(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_rglcbCheckMemInterUnmap(struct RgLineCallback *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), bSubdeviceHandleProvided); +// rglcbMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_rglcbMap(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_rglcbMapTo(struct RgLineCallback *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset), pParams); +// rglcbUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_rglcbUnmap(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_GpuResource_rglcbGetMapAddrSpace(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// rglcbShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_rglcbShareCallback(struct RgLineCallback *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NvU32 __nvoc_thunk_RsResource_rglcbGetRefCount(struct RgLineCallback *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset)); +// rglcbGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_rglcbGetRegBaseOffsetAndSize(struct RgLineCallback *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), pGpu, pOffset, pSize); } -static void __nvoc_thunk_RsResource_rglcbAddAdditionalDependants(struct RsClient *pClient, struct RgLineCallback *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset), pReference); +// rglcbGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_rglcbGetMapAddrSpace(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_RmResource_rglcbControl_Prologue(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), pCallContext, pParams); +// rglcbInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_rglcbInternalControlForward(struct RgLineCallback *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_GpuResource_rglcbGetRegBaseOffsetAndSize(struct RgLineCallback *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), pGpu, pOffset, pSize); +// rglcbGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_rglcbGetInternalObjectHandle(struct RgLineCallback *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_rglcbInternalControlForward(struct RgLineCallback *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), command, pParams, size); +// rglcbAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_rglcbAccessCallback(struct RgLineCallback *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RsResource_rglcbUnmapFrom(struct RgLineCallback *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset), pParams); +// rglcbGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_rglcbGetMemInterMapParams(struct RgLineCallback *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), pParams); } -static void __nvoc_thunk_RmResource_rglcbControl_Epilogue(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), pCallContext, pParams); +// rglcbCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_rglcbCheckMemInterUnmap(struct RgLineCallback *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), bSubdeviceHandleProvided); } -static NvHandle __nvoc_thunk_GpuResource_rglcbGetInternalObjectHandle(struct RgLineCallback *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset)); +// rglcbGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_rglcbGetMemoryMappingDescriptor(struct RgLineCallback *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_GpuResource_rglcbControl(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), pCallContext, pParams); +// rglcbControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_rglcbControlSerialization_Prologue(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_rglcbUnmap(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), pCallContext, pCpuMapping); +// rglcbControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_rglcbControlSerialization_Epilogue(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_rglcbGetMemInterMapParams(struct RgLineCallback *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), pParams); +// rglcbControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_rglcbControl_Prologue(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_rglcbGetMemoryMappingDescriptor(struct RgLineCallback *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), ppMemDesc); +// rglcbControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_rglcbControl_Epilogue(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_rglcbControlFilter(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset), pCallContext, pParams); +// rglcbCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_rglcbCanCopy(struct RgLineCallback *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RmResource_rglcbControlSerialization_Prologue(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), pCallContext, pParams); +// rglcbIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_rglcbIsDuplicate(struct RgLineCallback *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_RsResource_rglcbCanCopy(struct RgLineCallback *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset)); +// rglcbPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_rglcbPreDestruct(struct RgLineCallback *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_rglcbIsPartialUnmapSupported(struct RgLineCallback *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset)); +// rglcbControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_rglcbControlFilter(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_rglcbPreDestruct(struct RgLineCallback *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset)); +// rglcbIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_rglcbIsPartialUnmapSupported(struct RgLineCallback *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_rglcbIsDuplicate(struct RgLineCallback *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset), hMemory, pDuplicate); +// rglcbMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_rglcbMapTo(struct RgLineCallback *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_rglcbControlSerialization_Epilogue(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), pCallContext, pParams); +// rglcbUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_rglcbUnmapFrom(struct RgLineCallback *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_rglcbMap(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// rglcbGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_rglcbGetRefCount(struct RgLineCallback *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_rglcbAccessCallback(struct RgLineCallback *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// rglcbAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_rglcbAddAdditionalDependants(struct RsClient *pClient, struct RgLineCallback *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_RgLineCallback = { /*numEntries=*/ 0, @@ -229,61 +257,91 @@ NV_STATUS __nvoc_ctor_RgLineCallback(RgLineCallback *pThis, struct CALL_CONTEXT return status; } +// Vtable initialization static void __nvoc_init_funcTable_RgLineCallback_1(RgLineCallback *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - pThis->__rglcbShareCallback__ = &__nvoc_thunk_GpuResource_rglcbShareCallback; + // rglcbControl -- virtual inherited (gpures) base (gpures) + pThis->__rglcbControl__ = &__nvoc_up_thunk_GpuResource_rglcbControl; - pThis->__rglcbCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_rglcbCheckMemInterUnmap; + // rglcbMap -- virtual inherited (gpures) base (gpures) + pThis->__rglcbMap__ = &__nvoc_up_thunk_GpuResource_rglcbMap; - pThis->__rglcbMapTo__ = &__nvoc_thunk_RsResource_rglcbMapTo; + // rglcbUnmap -- virtual inherited (gpures) base (gpures) + pThis->__rglcbUnmap__ = &__nvoc_up_thunk_GpuResource_rglcbUnmap; - pThis->__rglcbGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_rglcbGetMapAddrSpace; + // rglcbShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__rglcbShareCallback__ = &__nvoc_up_thunk_GpuResource_rglcbShareCallback; - pThis->__rglcbGetRefCount__ = &__nvoc_thunk_RsResource_rglcbGetRefCount; + // rglcbGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__rglcbGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_rglcbGetRegBaseOffsetAndSize; - pThis->__rglcbAddAdditionalDependants__ = &__nvoc_thunk_RsResource_rglcbAddAdditionalDependants; + // rglcbGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__rglcbGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_rglcbGetMapAddrSpace; - pThis->__rglcbControl_Prologue__ = &__nvoc_thunk_RmResource_rglcbControl_Prologue; + // rglcbInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__rglcbInternalControlForward__ = &__nvoc_up_thunk_GpuResource_rglcbInternalControlForward; - pThis->__rglcbGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_rglcbGetRegBaseOffsetAndSize; + // rglcbGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__rglcbGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_rglcbGetInternalObjectHandle; - pThis->__rglcbInternalControlForward__ = &__nvoc_thunk_GpuResource_rglcbInternalControlForward; + // rglcbAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__rglcbAccessCallback__ = &__nvoc_up_thunk_RmResource_rglcbAccessCallback; - pThis->__rglcbUnmapFrom__ = &__nvoc_thunk_RsResource_rglcbUnmapFrom; + // rglcbGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__rglcbGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_rglcbGetMemInterMapParams; - pThis->__rglcbControl_Epilogue__ = &__nvoc_thunk_RmResource_rglcbControl_Epilogue; + // rglcbCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__rglcbCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_rglcbCheckMemInterUnmap; - pThis->__rglcbGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_rglcbGetInternalObjectHandle; + // rglcbGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__rglcbGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_rglcbGetMemoryMappingDescriptor; - pThis->__rglcbControl__ = &__nvoc_thunk_GpuResource_rglcbControl; + // rglcbControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__rglcbControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_rglcbControlSerialization_Prologue; - pThis->__rglcbUnmap__ = &__nvoc_thunk_GpuResource_rglcbUnmap; + // rglcbControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__rglcbControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_rglcbControlSerialization_Epilogue; - pThis->__rglcbGetMemInterMapParams__ = &__nvoc_thunk_RmResource_rglcbGetMemInterMapParams; + // rglcbControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__rglcbControl_Prologue__ = &__nvoc_up_thunk_RmResource_rglcbControl_Prologue; - pThis->__rglcbGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_rglcbGetMemoryMappingDescriptor; + // rglcbControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__rglcbControl_Epilogue__ = &__nvoc_up_thunk_RmResource_rglcbControl_Epilogue; - pThis->__rglcbControlFilter__ = &__nvoc_thunk_RsResource_rglcbControlFilter; + // rglcbCanCopy -- virtual inherited (res) base (gpures) + pThis->__rglcbCanCopy__ = &__nvoc_up_thunk_RsResource_rglcbCanCopy; - pThis->__rglcbControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_rglcbControlSerialization_Prologue; + // rglcbIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__rglcbIsDuplicate__ = &__nvoc_up_thunk_RsResource_rglcbIsDuplicate; - pThis->__rglcbCanCopy__ = &__nvoc_thunk_RsResource_rglcbCanCopy; + // rglcbPreDestruct -- virtual inherited (res) base (gpures) + pThis->__rglcbPreDestruct__ = &__nvoc_up_thunk_RsResource_rglcbPreDestruct; - pThis->__rglcbIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_rglcbIsPartialUnmapSupported; + // rglcbControlFilter -- virtual inherited (res) base (gpures) + pThis->__rglcbControlFilter__ = &__nvoc_up_thunk_RsResource_rglcbControlFilter; - pThis->__rglcbPreDestruct__ = &__nvoc_thunk_RsResource_rglcbPreDestruct; + // rglcbIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__rglcbIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rglcbIsPartialUnmapSupported; - pThis->__rglcbIsDuplicate__ = &__nvoc_thunk_RsResource_rglcbIsDuplicate; + // rglcbMapTo -- virtual inherited (res) base (gpures) + pThis->__rglcbMapTo__ = &__nvoc_up_thunk_RsResource_rglcbMapTo; - pThis->__rglcbControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_rglcbControlSerialization_Epilogue; + // rglcbUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__rglcbUnmapFrom__ = &__nvoc_up_thunk_RsResource_rglcbUnmapFrom; - pThis->__rglcbMap__ = &__nvoc_thunk_GpuResource_rglcbMap; + // rglcbGetRefCount -- virtual inherited (res) base (gpures) + pThis->__rglcbGetRefCount__ = &__nvoc_up_thunk_RsResource_rglcbGetRefCount; - pThis->__rglcbAccessCallback__ = &__nvoc_thunk_RmResource_rglcbAccessCallback; -} + // rglcbAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__rglcbAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rglcbAddAdditionalDependants; +} // End __nvoc_init_funcTable_RgLineCallback_1 with approximately 25 basic block(s). + +// Initialize vtable(s) for 25 virtual method(s). void __nvoc_init_funcTable_RgLineCallback(RgLineCallback *pThis) { + + // Initialize vtable(s) with 25 per-object function pointer(s). __nvoc_init_funcTable_RgLineCallback_1(pThis); } diff --git a/src/nvidia/generated/g_rg_line_callback_nvoc.h b/src/nvidia/generated/g_rg_line_callback_nvoc.h index ea5d613f75..3f68e93c56 100644 --- a/src/nvidia/generated/g_rg_line_callback_nvoc.h +++ b/src/nvidia/generated/g_rg_line_callback_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_RG_LINE_CALLBACK_NVOC_H_ #define _G_RG_LINE_CALLBACK_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_rg_line_callback_nvoc.h" #ifndef RG_LINE_CALLBACK_H @@ -37,6 +45,7 @@ extern "C" { #include "class/cl0092.h" #include "gpu/gpu_resource.h" + struct DispCommon; #ifndef __NVOC_CLASS_DispCommon_TYPEDEF__ @@ -63,40 +72,51 @@ typedef struct DispCommon DispCommon; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct RgLineCallback { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct RgLineCallback *__nvoc_pbase_RgLineCallback; - NvBool (*__rglcbShareCallback__)(struct RgLineCallback *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__rglcbCheckMemInterUnmap__)(struct RgLineCallback *, NvBool); - NV_STATUS (*__rglcbMapTo__)(struct RgLineCallback *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__rglcbGetMapAddrSpace__)(struct RgLineCallback *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__rglcbGetRefCount__)(struct RgLineCallback *); - void (*__rglcbAddAdditionalDependants__)(struct RsClient *, struct RgLineCallback *, RsResourceRef *); - NV_STATUS (*__rglcbControl_Prologue__)(struct RgLineCallback *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__rglcbGetRegBaseOffsetAndSize__)(struct RgLineCallback *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__rglcbInternalControlForward__)(struct RgLineCallback *, NvU32, void *, NvU32); - NV_STATUS (*__rglcbUnmapFrom__)(struct RgLineCallback *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__rglcbControl_Epilogue__)(struct RgLineCallback *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__rglcbGetInternalObjectHandle__)(struct RgLineCallback *); - NV_STATUS (*__rglcbControl__)(struct RgLineCallback *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__rglcbUnmap__)(struct RgLineCallback *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__rglcbGetMemInterMapParams__)(struct RgLineCallback *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__rglcbGetMemoryMappingDescriptor__)(struct RgLineCallback *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__rglcbControlFilter__)(struct RgLineCallback *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__rglcbControlSerialization_Prologue__)(struct RgLineCallback *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__rglcbCanCopy__)(struct RgLineCallback *); - NvBool (*__rglcbIsPartialUnmapSupported__)(struct RgLineCallback *); - void (*__rglcbPreDestruct__)(struct RgLineCallback *); - NV_STATUS (*__rglcbIsDuplicate__)(struct RgLineCallback *, NvHandle, NvBool *); - void (*__rglcbControlSerialization_Epilogue__)(struct RgLineCallback *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__rglcbMap__)(struct RgLineCallback *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__rglcbAccessCallback__)(struct RgLineCallback *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct RgLineCallback *__nvoc_pbase_RgLineCallback; // rglcb + + // Vtable with 25 per-object function pointers + NV_STATUS (*__rglcbControl__)(struct RgLineCallback * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__rglcbMap__)(struct RgLineCallback * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__rglcbUnmap__)(struct RgLineCallback * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__rglcbShareCallback__)(struct RgLineCallback * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__rglcbGetRegBaseOffsetAndSize__)(struct RgLineCallback * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__rglcbGetMapAddrSpace__)(struct RgLineCallback * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__rglcbInternalControlForward__)(struct RgLineCallback * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__rglcbGetInternalObjectHandle__)(struct RgLineCallback * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__rglcbAccessCallback__)(struct RgLineCallback * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__rglcbGetMemInterMapParams__)(struct RgLineCallback * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__rglcbCheckMemInterUnmap__)(struct RgLineCallback * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__rglcbGetMemoryMappingDescriptor__)(struct RgLineCallback * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__rglcbControlSerialization_Prologue__)(struct RgLineCallback * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__rglcbControlSerialization_Epilogue__)(struct RgLineCallback * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__rglcbControl_Prologue__)(struct RgLineCallback * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__rglcbControl_Epilogue__)(struct RgLineCallback * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__rglcbCanCopy__)(struct RgLineCallback * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__rglcbIsDuplicate__)(struct RgLineCallback * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__rglcbPreDestruct__)(struct RgLineCallback * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__rglcbControlFilter__)(struct RgLineCallback * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__rglcbIsPartialUnmapSupported__)(struct RgLineCallback * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__rglcbMapTo__)(struct RgLineCallback * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__rglcbUnmapFrom__)(struct RgLineCallback * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__rglcbGetRefCount__)(struct RgLineCallback * /*this*/); // virtual inherited (res) base (gpures) + void (*__rglcbAddAdditionalDependants__)(struct RsClient *, struct RgLineCallback * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members NvU32 subDeviceInstance; NvU32 head; NvU32 rgLineNum; @@ -115,6 +135,7 @@ typedef struct RgLineCallback RgLineCallback; #define __nvoc_class_id_RgLineCallback 0xa3ff1c #endif /* __nvoc_class_id_RgLineCallback */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_RgLineCallback; #define __staticCast_RgLineCallback(pThis) \ @@ -127,136 +148,164 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_RgLineCallback; ((RgLineCallback*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(RgLineCallback))) #endif //__nvoc_rg_line_callback_h_disabled - NV_STATUS __nvoc_objCreateDynamic_RgLineCallback(RgLineCallback**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_RgLineCallback(RgLineCallback**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_RgLineCallback(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_RgLineCallback((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define rglcbControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define rglcbControl(pGpuResource, pCallContext, pParams) rglcbControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define rglcbMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define rglcbMap(pGpuResource, pCallContext, pParams, pCpuMapping) rglcbMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define rglcbUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define rglcbUnmap(pGpuResource, pCallContext, pCpuMapping) rglcbUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define rglcbShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define rglcbShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) rglcbShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define rglcbCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) rglcbCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define rglcbMapTo(pResource, pParams) rglcbMapTo_DISPATCH(pResource, pParams) -#define rglcbGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) rglcbGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define rglcbGetRefCount(pResource) rglcbGetRefCount_DISPATCH(pResource) -#define rglcbAddAdditionalDependants(pClient, pResource, pReference) rglcbAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define rglcbControl_Prologue(pResource, pCallContext, pParams) rglcbControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define rglcbGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define rglcbGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) rglcbGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define rglcbGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define rglcbGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) rglcbGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define rglcbInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define rglcbInternalControlForward(pGpuResource, command, pParams, size) rglcbInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define rglcbUnmapFrom(pResource, pParams) rglcbUnmapFrom_DISPATCH(pResource, pParams) -#define rglcbControl_Epilogue(pResource, pCallContext, pParams) rglcbControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define rglcbGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define rglcbGetInternalObjectHandle(pGpuResource) rglcbGetInternalObjectHandle_DISPATCH(pGpuResource) -#define rglcbControl(pGpuResource, pCallContext, pParams) rglcbControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define rglcbUnmap(pGpuResource, pCallContext, pCpuMapping) rglcbUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define rglcbAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define rglcbAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) rglcbAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define rglcbGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define rglcbGetMemInterMapParams(pRmResource, pParams) rglcbGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define rglcbCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define rglcbCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) rglcbCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define rglcbGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define rglcbGetMemoryMappingDescriptor(pRmResource, ppMemDesc) rglcbGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define rglcbControlFilter(pResource, pCallContext, pParams) rglcbControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define rglcbControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define rglcbControlSerialization_Prologue(pResource, pCallContext, pParams) rglcbControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define rglcbControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define rglcbControlSerialization_Epilogue(pResource, pCallContext, pParams) rglcbControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define rglcbControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define rglcbControl_Prologue(pResource, pCallContext, pParams) rglcbControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define rglcbControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define rglcbControl_Epilogue(pResource, pCallContext, pParams) rglcbControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define rglcbCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define rglcbCanCopy(pResource) rglcbCanCopy_DISPATCH(pResource) -#define rglcbIsPartialUnmapSupported(pResource) rglcbIsPartialUnmapSupported_DISPATCH(pResource) -#define rglcbPreDestruct(pResource) rglcbPreDestruct_DISPATCH(pResource) +#define rglcbIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define rglcbIsDuplicate(pResource, hMemory, pDuplicate) rglcbIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define rglcbControlSerialization_Epilogue(pResource, pCallContext, pParams) rglcbControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define rglcbMap(pGpuResource, pCallContext, pParams, pCpuMapping) rglcbMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define rglcbAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) rglcbAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -static inline NvBool rglcbShareCallback_DISPATCH(struct RgLineCallback *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__rglcbShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS rglcbCheckMemInterUnmap_DISPATCH(struct RgLineCallback *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__rglcbCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); -} - -static inline NV_STATUS rglcbMapTo_DISPATCH(struct RgLineCallback *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__rglcbMapTo__(pResource, pParams); -} +#define rglcbPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define rglcbPreDestruct(pResource) rglcbPreDestruct_DISPATCH(pResource) +#define rglcbControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define rglcbControlFilter(pResource, pCallContext, pParams) rglcbControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define rglcbIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define rglcbIsPartialUnmapSupported(pResource) rglcbIsPartialUnmapSupported_DISPATCH(pResource) +#define rglcbMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define rglcbMapTo(pResource, pParams) rglcbMapTo_DISPATCH(pResource, pParams) +#define rglcbUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define rglcbUnmapFrom(pResource, pParams) rglcbUnmapFrom_DISPATCH(pResource, pParams) +#define rglcbGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define rglcbGetRefCount(pResource) rglcbGetRefCount_DISPATCH(pResource) +#define rglcbAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define rglcbAddAdditionalDependants(pClient, pResource, pReference) rglcbAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -static inline NV_STATUS rglcbGetMapAddrSpace_DISPATCH(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__rglcbGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +// Dispatch functions +static inline NV_STATUS rglcbControl_DISPATCH(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__rglcbControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 rglcbGetRefCount_DISPATCH(struct RgLineCallback *pResource) { - return pResource->__rglcbGetRefCount__(pResource); +static inline NV_STATUS rglcbMap_DISPATCH(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__rglcbMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void rglcbAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct RgLineCallback *pResource, RsResourceRef *pReference) { - pResource->__rglcbAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS rglcbUnmap_DISPATCH(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__rglcbUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS rglcbControl_Prologue_DISPATCH(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__rglcbControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool rglcbShareCallback_DISPATCH(struct RgLineCallback *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__rglcbShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS rglcbGetRegBaseOffsetAndSize_DISPATCH(struct RgLineCallback *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__rglcbGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS rglcbInternalControlForward_DISPATCH(struct RgLineCallback *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__rglcbInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS rglcbUnmapFrom_DISPATCH(struct RgLineCallback *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__rglcbUnmapFrom__(pResource, pParams); +static inline NV_STATUS rglcbGetMapAddrSpace_DISPATCH(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__rglcbGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void rglcbControl_Epilogue_DISPATCH(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__rglcbControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS rglcbInternalControlForward_DISPATCH(struct RgLineCallback *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__rglcbInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle rglcbGetInternalObjectHandle_DISPATCH(struct RgLineCallback *pGpuResource) { return pGpuResource->__rglcbGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS rglcbControl_DISPATCH(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__rglcbControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS rglcbUnmap_DISPATCH(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__rglcbUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool rglcbAccessCallback_DISPATCH(struct RgLineCallback *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__rglcbAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS rglcbGetMemInterMapParams_DISPATCH(struct RgLineCallback *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__rglcbGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS rglcbGetMemoryMappingDescriptor_DISPATCH(struct RgLineCallback *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__rglcbGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS rglcbCheckMemInterUnmap_DISPATCH(struct RgLineCallback *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__rglcbCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS rglcbControlFilter_DISPATCH(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__rglcbControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS rglcbGetMemoryMappingDescriptor_DISPATCH(struct RgLineCallback *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__rglcbGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS rglcbControlSerialization_Prologue_DISPATCH(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__rglcbControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void rglcbControlSerialization_Epilogue_DISPATCH(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__rglcbControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS rglcbControl_Prologue_DISPATCH(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__rglcbControl_Prologue__(pResource, pCallContext, pParams); +} + +static inline void rglcbControl_Epilogue_DISPATCH(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__rglcbControl_Epilogue__(pResource, pCallContext, pParams); +} + static inline NvBool rglcbCanCopy_DISPATCH(struct RgLineCallback *pResource) { return pResource->__rglcbCanCopy__(pResource); } -static inline NvBool rglcbIsPartialUnmapSupported_DISPATCH(struct RgLineCallback *pResource) { - return pResource->__rglcbIsPartialUnmapSupported__(pResource); +static inline NV_STATUS rglcbIsDuplicate_DISPATCH(struct RgLineCallback *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__rglcbIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void rglcbPreDestruct_DISPATCH(struct RgLineCallback *pResource) { pResource->__rglcbPreDestruct__(pResource); } -static inline NV_STATUS rglcbIsDuplicate_DISPATCH(struct RgLineCallback *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__rglcbIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS rglcbControlFilter_DISPATCH(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__rglcbControlFilter__(pResource, pCallContext, pParams); } -static inline void rglcbControlSerialization_Epilogue_DISPATCH(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__rglcbControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool rglcbIsPartialUnmapSupported_DISPATCH(struct RgLineCallback *pResource) { + return pResource->__rglcbIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS rglcbMap_DISPATCH(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__rglcbMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS rglcbMapTo_DISPATCH(struct RgLineCallback *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__rglcbMapTo__(pResource, pParams); } -static inline NvBool rglcbAccessCallback_DISPATCH(struct RgLineCallback *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__rglcbAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS rglcbUnmapFrom_DISPATCH(struct RgLineCallback *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__rglcbUnmapFrom__(pResource, pParams); +} + +static inline NvU32 rglcbGetRefCount_DISPATCH(struct RgLineCallback *pResource) { + return pResource->__rglcbGetRefCount__(pResource); +} + +static inline void rglcbAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct RgLineCallback *pResource, RsResourceRef *pReference) { + pResource->__rglcbAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS rglcbConstruct_IMPL(struct RgLineCallback *arg_pRgLineCallback, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_rmconfig_private.h b/src/nvidia/generated/g_rmconfig_private.h index df0c13401b..7c58c73086 100644 --- a/src/nvidia/generated/g_rmconfig_private.h +++ b/src/nvidia/generated/g_rmconfig_private.h @@ -402,7 +402,12 @@ // Any DISPLAYLESS chip? -#define IsDISPLAYLESS(pGpu) rmcfg_IsDISPLAYLESS(pGpu) +#define IsDISPLAYLESS(pGpu) (IsDISPLAYLESS_CLASSIC_GPUS(pGpu) || IsDISPLAYLESS_TEGRA_BIG_GPUS(pGpu)) + + +// Any DISPLAYLESS_CLASSIC_GPUS chip? +#define IsDISPLAYLESS_CLASSIC_GPUS(pGpu) rmcfg_IsDISPLAYLESS_CLASSIC_GPUS(pGpu) +#define IsDISPLAYLESS_CLASSIC_GPUSorBetter(pGpu) rmcfg_IsDISPLAYLESS_CLASSIC_GPUSorBetter(pGpu) // Any dKEPLER chip? @@ -538,8 +543,8 @@ // Any TEGRA_DISP chip? -#define IsTEGRA_DISP(pGpu) (IsTEGRA_DISP_CLASSIC_GPUS(pGpu) || IsTEGRA_DISP_TEGRA_BIG_GPUS(pGpu) || IsTEGRA_DISP_TEGRA_NVDISP_GPUS(pGpu)) -#define IsTEGRA_DISPorBetter(pGpu) (IsTEGRA_DISP_CLASSIC_GPUSorBetter(pGpu) || IsTEGRA_DISP_TEGRA_BIG_GPUSorBetter(pGpu) || IsTEGRA_DISP_TEGRA_NVDISP_GPUSorBetter(pGpu)) +#define IsTEGRA_DISP(pGpu) (IsTEGRA_DISP_CLASSIC_GPUS(pGpu) || IsTEGRA_DISP_TEGRA_NVDISP_GPUS(pGpu)) +#define IsTEGRA_DISPorBetter(pGpu) (IsTEGRA_DISP_CLASSIC_GPUSorBetter(pGpu) || IsTEGRA_DISP_TEGRA_NVDISP_GPUSorBetter(pGpu)) // Any TEGRA_BIG_GPUS chip? @@ -592,6 +597,11 @@ #define IsPASCAL_TEGRA_BIG_GPUSorBetter(pGpu) (0 && (pGpu)) +// Any DISPLAYLESS_TEGRA_BIG_GPUS chip? +#define IsDISPLAYLESS_TEGRA_BIG_GPUS(pGpu) (0 && (pGpu)) +#define IsDISPLAYLESS_TEGRA_BIG_GPUSorBetter(pGpu) (0 && (pGpu)) + + // Any tVOLTA chip? #define IstVOLTA(pGpu) (0 && (pGpu)) #define IstVOLTAorBetter(pGpu) (0 && (pGpu)) @@ -602,11 +612,6 @@ #define IsVOLTA_TEGRA_BIG_GPUSorBetter(pGpu) (0 && (pGpu)) -// Any TEGRA_DISP_TEGRA_BIG_GPUS chip? -#define IsTEGRA_DISP_TEGRA_BIG_GPUS(pGpu) (0 && (pGpu)) -#define IsTEGRA_DISP_TEGRA_BIG_GPUSorBetter(pGpu) (0 && (pGpu)) - - // Any TURING_TEGRA_BIG_GPUS chip? #define IsTURING_TEGRA_BIG_GPUS(pGpu) (0 && (pGpu)) #define IsTURING_TEGRA_BIG_GPUSorBetter(pGpu) (0 && (pGpu)) diff --git a/src/nvidia/generated/g_rmconfig_util.c b/src/nvidia/generated/g_rmconfig_util.c index d2df981380..0fced378e3 100644 --- a/src/nvidia/generated/g_rmconfig_util.c +++ b/src/nvidia/generated/g_rmconfig_util.c @@ -236,11 +236,16 @@ NvBool rmcfg_IsGH10XorBetter(POBJGPU pGpu) return IsGH100orBetter(pGpu); } -NvBool rmcfg_IsDISPLAYLESS(POBJGPU pGpu) +NvBool rmcfg_IsDISPLAYLESS_CLASSIC_GPUS(POBJGPU pGpu) { return IsGA100(pGpu) || IsGH100(pGpu); } +NvBool rmcfg_IsDISPLAYLESS_CLASSIC_GPUSorBetter(POBJGPU pGpu) +{ + return IsGF117(pGpu) || IsGK20A(pGpu) || IsGM108(pGpu) || IsGV11B(pGpu) || IsGA100(pGpu) || IsGA10B(pGpu) || IsGH100orBetter(pGpu); +} + NvBool rmcfg_IsdTURING(POBJGPU pGpu) { return IsTU102(pGpu) || IsTU104(pGpu) || IsTU106(pGpu) || IsTU116(pGpu) || IsTU117(pGpu); diff --git a/src/nvidia/generated/g_rmconfig_util.h b/src/nvidia/generated/g_rmconfig_util.h index 32bf119976..7c51ef64b6 100644 --- a/src/nvidia/generated/g_rmconfig_util.h +++ b/src/nvidia/generated/g_rmconfig_util.h @@ -61,7 +61,8 @@ NvBool rmcfg_IsGH100(POBJGPU pGpu); NvBool rmcfg_IsGH100orBetter(POBJGPU pGpu); NvBool rmcfg_IsGH10X(POBJGPU pGpu); NvBool rmcfg_IsGH10XorBetter(POBJGPU pGpu); -NvBool rmcfg_IsDISPLAYLESS(POBJGPU pGpu); +NvBool rmcfg_IsDISPLAYLESS_CLASSIC_GPUS(POBJGPU pGpu); +NvBool rmcfg_IsDISPLAYLESS_CLASSIC_GPUSorBetter(POBJGPU pGpu); NvBool rmcfg_IsdTURING(POBJGPU pGpu); NvBool rmcfg_IsTURING_CLASSIC_GPUS(POBJGPU pGpu); NvBool rmcfg_IsdAMPERE(POBJGPU pGpu); diff --git a/src/nvidia/generated/g_rpc-message-header.h b/src/nvidia/generated/g_rpc-message-header.h index 4146226289..2179151760 100644 --- a/src/nvidia/generated/g_rpc-message-header.h +++ b/src/nvidia/generated/g_rpc-message-header.h @@ -24,8 +24,8 @@ /* * WARNING: This is an autogenerated file. DO NOT EDIT. * This file is generated using below files: - * template file: kernel/inc/vgpu/gt_rpc-message.h - * definition file: kernel/inc/vgpu/rpc-message-header.def + * template file: inc/kernel/vgpu/gt_rpc-message.h + * definition file: inc/kernel/vgpu/rpc-message-header.def */ diff --git a/src/nvidia/generated/g_rpc-structures.h b/src/nvidia/generated/g_rpc-structures.h index 8bab673e48..b18e9a1d8e 100644 --- a/src/nvidia/generated/g_rpc-structures.h +++ b/src/nvidia/generated/g_rpc-structures.h @@ -23,8 +23,8 @@ /* * WARNING: This is an autogenerated file. DO NOT EDIT. * This file is generated using below files: - * template file: kernel/inc/vgpu/gt_rpc-structures.h - * definition file: kernel/inc/vgpu/rpc-structures.def + * template file: inc/kernel/vgpu/gt_rpc-structures.h + * definition file: inc/kernel/vgpu/rpc-structures.def */ @@ -115,7 +115,17 @@ typedef struct rpc_alloc_object_v25_08 alloc_object_params_v25_08 params; } rpc_alloc_object_v25_08; -typedef rpc_alloc_object_v25_08 rpc_alloc_object_v; +typedef struct rpc_alloc_object_v26_00 +{ + NvHandle hClient; + NvHandle hParent; + NvHandle hObject; + NvU32 hClass; + NvU32 param_len; + alloc_object_params_v26_00 params; +} rpc_alloc_object_v26_00; + +typedef rpc_alloc_object_v26_00 rpc_alloc_object_v; typedef struct rpc_free_v03_00 { @@ -725,15 +735,6 @@ typedef struct rpc_ctrl_get_zbc_clear_table_entry_v1A_0E typedef rpc_ctrl_get_zbc_clear_table_entry_v1A_0E rpc_ctrl_get_zbc_clear_table_entry_v; -typedef struct rpc_ctrl_get_nvlink_peer_id_mask_v1A_0E -{ - NvHandle hClient; - NvHandle hObject; - NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS_v14_00 ctrlParams; -} rpc_ctrl_get_nvlink_peer_id_mask_v1A_0E; - -typedef rpc_ctrl_get_nvlink_peer_id_mask_v1A_0E rpc_ctrl_get_nvlink_peer_id_mask_v; - typedef struct rpc_ctrl_get_nvlink_status_v23_04 { NvHandle hClient; @@ -848,7 +849,14 @@ typedef struct rpc_ctrl_fb_get_fs_info_v24_00 NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v24_00 params; } rpc_ctrl_fb_get_fs_info_v24_00; -typedef rpc_ctrl_fb_get_fs_info_v24_00 rpc_ctrl_fb_get_fs_info_v; +typedef struct rpc_ctrl_fb_get_fs_info_v26_04 +{ + NvHandle hClient; + NvHandle hObject; + NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v26_04 params; +} rpc_ctrl_fb_get_fs_info_v26_04; + +typedef rpc_ctrl_fb_get_fs_info_v26_04 rpc_ctrl_fb_get_fs_info_v; typedef struct rpc_ctrl_grmgr_get_gr_fs_info_v1A_1D { @@ -1254,9 +1262,14 @@ typedef struct rpc_rc_triggered_v17_02 { NvU32 nv2080EngineType; NvU32 chid; + NvU32 exceptLevel; NvU32 exceptType; NvU32 scope; NvU16 partitionAttributionId; + NvU32 mmuFaultAddrLo; + NvU32 mmuFaultAddrHi; + NvU32 mmuFaultType; + NvBool bCallbackNeeded; NvU32 rcJournalBufferSize; NvU8 rcJournalBuffer[]; } rpc_rc_triggered_v17_02; @@ -1315,6 +1328,7 @@ typedef rpc_vgpu_config_event_v17_00 rpc_vgpu_config_event_v; typedef struct rpc_dce_rm_init_v01_00 { NvBool bInit; + NvU32 hInternalClient; } rpc_dce_rm_init_v01_00; typedef rpc_dce_rm_init_v01_00 rpc_dce_rm_init_v; @@ -1499,7 +1513,14 @@ typedef struct rpc_ctrl_gpu_query_ecc_status_v24_06 NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v24_06 params; } rpc_ctrl_gpu_query_ecc_status_v24_06; -typedef rpc_ctrl_gpu_query_ecc_status_v24_06 rpc_ctrl_gpu_query_ecc_status_v; +typedef struct rpc_ctrl_gpu_query_ecc_status_v26_02 +{ + NvHandle hClient; + NvHandle hObject; + NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v26_02 params; +} rpc_ctrl_gpu_query_ecc_status_v26_02; + +typedef rpc_ctrl_gpu_query_ecc_status_v26_02 rpc_ctrl_gpu_query_ecc_status_v; typedef struct rpc_ctrl_dbg_get_mode_mmu_debug_v25_04 { @@ -1526,6 +1547,22 @@ typedef struct rpc_ctrl_nvlink_get_inband_received_data_v25_0C typedef rpc_ctrl_nvlink_get_inband_received_data_v25_0C rpc_ctrl_nvlink_get_inband_received_data_v; +typedef struct rpc_fecs_error_v26_02 +{ + NvU32 grIdx; + NvU8 error_type; +} rpc_fecs_error_v26_02; + +typedef rpc_fecs_error_v26_02 rpc_fecs_error_v; + +typedef struct rpc_ctrl_cmd_nvlink_inband_send_data_v26_05 +{ + NvU8 buffer[NV2080_CTRL_NVLINK_INBAND_MAX_DATA_SIZE_v26_05]; + NvU32 dataSize; +} rpc_ctrl_cmd_nvlink_inband_send_data_v26_05; + +typedef rpc_ctrl_cmd_nvlink_inband_send_data_v26_05 rpc_ctrl_cmd_nvlink_inband_send_data_v; + #endif @@ -1918,6 +1955,65 @@ static vmiopd_mdesc_t vmiopd_mdesc_t_rpc_alloc_channel_dma_v1F_04 = { }; #endif +#ifndef SKIP_PRINT_rpc_alloc_object_v26_00 +static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_alloc_object_v26_00[] = { + { + .vtype = vtype_NvHandle, + .offset = NV_OFFSETOF(rpc_alloc_object_v26_00, hClient), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "hClient" + #endif + }, + { + .vtype = vtype_NvHandle, + .offset = NV_OFFSETOF(rpc_alloc_object_v26_00, hParent), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "hParent" + #endif + }, + { + .vtype = vtype_NvHandle, + .offset = NV_OFFSETOF(rpc_alloc_object_v26_00, hObject), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "hObject" + #endif + }, + { + .vtype = vtype_NvU32, + .offset = NV_OFFSETOF(rpc_alloc_object_v26_00, hClass), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "hClass" + #endif + }, + { + .vtype = vtype_NvU32, + .offset = NV_OFFSETOF(rpc_alloc_object_v26_00, param_len), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "param_len" + #endif + }, + { + .vtype = vtype_alloc_object_params_v26_00, + .offset = NV_OFFSETOF(rpc_alloc_object_v26_00, params), + .union_member_index_fn = get_union_member_index_rpc_alloc_object_v26_00_params, + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "params" + #endif + }, + { + .vtype = vt_end + } +}; + +static vmiopd_mdesc_t vmiopd_mdesc_t_rpc_alloc_object_v26_00 = { + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "rpc_alloc_object", + #endif + .header_length = sizeof(rpc_alloc_object_v26_00), + .fdesc = vmiopd_fdesc_t_rpc_alloc_object_v26_00 +}; +#endif + #ifndef SKIP_PRINT_rpc_alloc_object_v25_08 static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_alloc_object_v25_08[] = { { @@ -4538,43 +4634,6 @@ static vmiopd_mdesc_t vmiopd_mdesc_t_rpc_ctrl_get_zbc_clear_table_entry_v1A_0E = }; #endif -#ifndef SKIP_PRINT_rpc_ctrl_get_nvlink_peer_id_mask_v1A_0E -static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_ctrl_get_nvlink_peer_id_mask_v1A_0E[] = { - { - .vtype = vtype_NvHandle, - .offset = NV_OFFSETOF(rpc_ctrl_get_nvlink_peer_id_mask_v1A_0E, hClient), - #if (defined(DEBUG) || defined(DEVELOP)) - .name = "hClient" - #endif - }, - { - .vtype = vtype_NvHandle, - .offset = NV_OFFSETOF(rpc_ctrl_get_nvlink_peer_id_mask_v1A_0E, hObject), - #if (defined(DEBUG) || defined(DEVELOP)) - .name = "hObject" - #endif - }, - { - .vtype = vtype_NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS_v14_00, - .offset = NV_OFFSETOF(rpc_ctrl_get_nvlink_peer_id_mask_v1A_0E, ctrlParams), - #if (defined(DEBUG) || defined(DEVELOP)) - .name = "ctrlParams" - #endif - }, - { - .vtype = vt_end - } -}; - -static vmiopd_mdesc_t vmiopd_mdesc_t_rpc_ctrl_get_nvlink_peer_id_mask_v1A_0E = { - #if (defined(DEBUG) || defined(DEVELOP)) - .name = "rpc_ctrl_get_nvlink_peer_id_mask", - #endif - .header_length = sizeof(rpc_ctrl_get_nvlink_peer_id_mask_v1A_0E), - .fdesc = vmiopd_fdesc_t_rpc_ctrl_get_nvlink_peer_id_mask_v1A_0E -}; -#endif - #ifndef SKIP_PRINT_rpc_ctrl_get_nvlink_status_v23_04 static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_ctrl_get_nvlink_status_v23_04[] = { { @@ -5049,6 +5108,43 @@ static vmiopd_mdesc_t vmiopd_mdesc_t_rpc_ctrl_fb_get_fs_info_v24_00 = { }; #endif +#ifndef SKIP_PRINT_rpc_ctrl_fb_get_fs_info_v26_04 +static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_ctrl_fb_get_fs_info_v26_04[] = { + { + .vtype = vtype_NvHandle, + .offset = NV_OFFSETOF(rpc_ctrl_fb_get_fs_info_v26_04, hClient), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "hClient" + #endif + }, + { + .vtype = vtype_NvHandle, + .offset = NV_OFFSETOF(rpc_ctrl_fb_get_fs_info_v26_04, hObject), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "hObject" + #endif + }, + { + .vtype = vtype_NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v26_04, + .offset = NV_OFFSETOF(rpc_ctrl_fb_get_fs_info_v26_04, params), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "params" + #endif + }, + { + .vtype = vt_end + } +}; + +static vmiopd_mdesc_t vmiopd_mdesc_t_rpc_ctrl_fb_get_fs_info_v26_04 = { + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "rpc_ctrl_fb_get_fs_info", + #endif + .header_length = sizeof(rpc_ctrl_fb_get_fs_info_v26_04), + .fdesc = vmiopd_fdesc_t_rpc_ctrl_fb_get_fs_info_v26_04 +}; +#endif + #ifndef SKIP_PRINT_rpc_ctrl_grmgr_get_gr_fs_info_v1A_1D static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_ctrl_grmgr_get_gr_fs_info_v1A_1D[] = { { @@ -6786,6 +6882,13 @@ static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_rc_triggered_v17_02[] = { .name = "chid" #endif }, + { + .vtype = vtype_NvU32, + .offset = NV_OFFSETOF(rpc_rc_triggered_v17_02, exceptLevel), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "exceptLevel" + #endif + }, { .vtype = vtype_NvU32, .offset = NV_OFFSETOF(rpc_rc_triggered_v17_02, exceptType), @@ -6807,6 +6910,34 @@ static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_rc_triggered_v17_02[] = { .name = "partitionAttributionId" #endif }, + { + .vtype = vtype_NvU32, + .offset = NV_OFFSETOF(rpc_rc_triggered_v17_02, mmuFaultAddrLo), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "mmuFaultAddrLo" + #endif + }, + { + .vtype = vtype_NvU32, + .offset = NV_OFFSETOF(rpc_rc_triggered_v17_02, mmuFaultAddrHi), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "mmuFaultAddrHi" + #endif + }, + { + .vtype = vtype_NvU32, + .offset = NV_OFFSETOF(rpc_rc_triggered_v17_02, mmuFaultType), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "mmuFaultType" + #endif + }, + { + .vtype = vtype_NvBool, + .offset = NV_OFFSETOF(rpc_rc_triggered_v17_02, bCallbackNeeded), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "bCallbackNeeded" + #endif + }, { .vtype = vtype_NvU32, .offset = NV_OFFSETOF(rpc_rc_triggered_v17_02, rcJournalBufferSize), @@ -7033,6 +7164,13 @@ static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_dce_rm_init_v01_00[] = { .name = "bInit" #endif }, + { + .vtype = vtype_NvU32, + .offset = NV_OFFSETOF(rpc_dce_rm_init_v01_00, hInternalClient), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "hInternalClient" + #endif + }, { .vtype = vt_end } @@ -7753,6 +7891,43 @@ static vmiopd_mdesc_t vmiopd_mdesc_t_rpc_ctrl_gpu_query_ecc_status_v24_06 = { }; #endif +#ifndef SKIP_PRINT_rpc_ctrl_gpu_query_ecc_status_v26_02 +static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_ctrl_gpu_query_ecc_status_v26_02[] = { + { + .vtype = vtype_NvHandle, + .offset = NV_OFFSETOF(rpc_ctrl_gpu_query_ecc_status_v26_02, hClient), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "hClient" + #endif + }, + { + .vtype = vtype_NvHandle, + .offset = NV_OFFSETOF(rpc_ctrl_gpu_query_ecc_status_v26_02, hObject), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "hObject" + #endif + }, + { + .vtype = vtype_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v26_02, + .offset = NV_OFFSETOF(rpc_ctrl_gpu_query_ecc_status_v26_02, params), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "params" + #endif + }, + { + .vtype = vt_end + } +}; + +static vmiopd_mdesc_t vmiopd_mdesc_t_rpc_ctrl_gpu_query_ecc_status_v26_02 = { + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "rpc_ctrl_gpu_query_ecc_status", + #endif + .header_length = sizeof(rpc_ctrl_gpu_query_ecc_status_v26_02), + .fdesc = vmiopd_fdesc_t_rpc_ctrl_gpu_query_ecc_status_v26_02 +}; +#endif + #ifndef SKIP_PRINT_rpc_ctrl_dbg_get_mode_mmu_debug_v25_04 static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_ctrl_dbg_get_mode_mmu_debug_v25_04[] = { { @@ -7850,6 +8025,67 @@ static vmiopd_mdesc_t vmiopd_mdesc_t_rpc_ctrl_nvlink_get_inband_received_data_v2 }; #endif +#ifndef SKIP_PRINT_rpc_fecs_error_v26_02 +static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_fecs_error_v26_02[] = { + { + .vtype = vtype_NvU32, + .offset = NV_OFFSETOF(rpc_fecs_error_v26_02, grIdx), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "grIdx" + #endif + }, + { + .vtype = vtype_NvU8, + .offset = NV_OFFSETOF(rpc_fecs_error_v26_02, error_type), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "error_type" + #endif + }, + { + .vtype = vt_end + } +}; + +static vmiopd_mdesc_t vmiopd_mdesc_t_rpc_fecs_error_v26_02 = { + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "rpc_fecs_error", + #endif + .header_length = sizeof(rpc_fecs_error_v26_02), + .fdesc = vmiopd_fdesc_t_rpc_fecs_error_v26_02 +}; +#endif + +#ifndef SKIP_PRINT_rpc_ctrl_cmd_nvlink_inband_send_data_v26_05 +static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_ctrl_cmd_nvlink_inband_send_data_v26_05[] = { + { + .vtype = vtype_NvU8_array, + .offset = NV_OFFSETOF(rpc_ctrl_cmd_nvlink_inband_send_data_v26_05, buffer), + .array_length = NV2080_CTRL_NVLINK_INBAND_MAX_DATA_SIZE_v26_05, + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "buffer" + #endif + }, + { + .vtype = vtype_NvU32, + .offset = NV_OFFSETOF(rpc_ctrl_cmd_nvlink_inband_send_data_v26_05, dataSize), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "dataSize" + #endif + }, + { + .vtype = vt_end + } +}; + +static vmiopd_mdesc_t vmiopd_mdesc_t_rpc_ctrl_cmd_nvlink_inband_send_data_v26_05 = { + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "rpc_ctrl_cmd_nvlink_inband_send_data", + #endif + .header_length = sizeof(rpc_ctrl_cmd_nvlink_inband_send_data_v26_05), + .fdesc = vmiopd_fdesc_t_rpc_ctrl_cmd_nvlink_inband_send_data_v26_05 +}; +#endif + #endif #ifdef RPC_DEBUG_PRINT_FUNCTIONS @@ -7906,6 +8142,13 @@ vmiopd_mdesc_t *rpcdebugAllocChannelDma_v1F_04(void) } #endif +#ifndef SKIP_PRINT_rpc_alloc_object_v26_00 +vmiopd_mdesc_t *rpcdebugAllocObject_v26_00(void) +{ + return &vmiopd_mdesc_t_rpc_alloc_object_v26_00; +} +#endif + #ifndef SKIP_PRINT_rpc_alloc_object_v25_08 vmiopd_mdesc_t *rpcdebugAllocObject_v25_08(void) { @@ -8417,13 +8660,6 @@ vmiopd_mdesc_t *rpcdebugCtrlGetZbcClearTableEntry_v1A_0E(void) } #endif -#ifndef SKIP_PRINT_rpc_ctrl_get_nvlink_peer_id_mask_v1A_0E -vmiopd_mdesc_t *rpcdebugCtrlGetNvlinkPeerIdMask_v1A_0E(void) -{ - return &vmiopd_mdesc_t_rpc_ctrl_get_nvlink_peer_id_mask_v1A_0E; -} -#endif - #ifndef SKIP_PRINT_rpc_ctrl_get_nvlink_status_v23_04 vmiopd_mdesc_t *rpcdebugCtrlGetNvlinkStatus_v23_04(void) { @@ -8515,6 +8751,13 @@ vmiopd_mdesc_t *rpcdebugCtrlFbGetFsInfo_v24_00(void) } #endif +#ifndef SKIP_PRINT_rpc_ctrl_fb_get_fs_info_v26_04 +vmiopd_mdesc_t *rpcdebugCtrlFbGetFsInfo_v26_04(void) +{ + return &vmiopd_mdesc_t_rpc_ctrl_fb_get_fs_info_v26_04; +} +#endif + #ifndef SKIP_PRINT_rpc_ctrl_grmgr_get_gr_fs_info_v1A_1D vmiopd_mdesc_t *rpcdebugCtrlGrmgrGetGrFsInfo_v1A_1D(void) { @@ -9040,6 +9283,13 @@ vmiopd_mdesc_t *rpcdebugCtrlGpuQueryEccStatus_v24_06(void) } #endif +#ifndef SKIP_PRINT_rpc_ctrl_gpu_query_ecc_status_v26_02 +vmiopd_mdesc_t *rpcdebugCtrlGpuQueryEccStatus_v26_02(void) +{ + return &vmiopd_mdesc_t_rpc_ctrl_gpu_query_ecc_status_v26_02; +} +#endif + #ifndef SKIP_PRINT_rpc_ctrl_dbg_get_mode_mmu_debug_v25_04 vmiopd_mdesc_t *rpcdebugCtrlDbgGetModeMmuDebug_v25_04(void) { @@ -9061,6 +9311,20 @@ vmiopd_mdesc_t *rpcdebugCtrlNvlinkGetInbandReceivedData_v25_0C(void) } #endif +#ifndef SKIP_PRINT_rpc_fecs_error_v26_02 +vmiopd_mdesc_t *rpcdebugFecsError_v26_02(void) +{ + return &vmiopd_mdesc_t_rpc_fecs_error_v26_02; +} +#endif + +#ifndef SKIP_PRINT_rpc_ctrl_cmd_nvlink_inband_send_data_v26_05 +vmiopd_mdesc_t *rpcdebugCtrlCmdNvlinkInbandSendData_v26_05(void) +{ + return &vmiopd_mdesc_t_rpc_ctrl_cmd_nvlink_inband_send_data_v26_05; +} +#endif + #endif @@ -9078,6 +9342,7 @@ typedef union rpc_generic_union { rpc_alloc_memory_v alloc_memory_v; rpc_alloc_channel_dma_v1F_04 alloc_channel_dma_v1F_04; rpc_alloc_channel_dma_v alloc_channel_dma_v; + rpc_alloc_object_v26_00 alloc_object_v26_00; rpc_alloc_object_v25_08 alloc_object_v25_08; rpc_alloc_object_v alloc_object_v; rpc_free_v03_00 free_v03_00; @@ -9213,8 +9478,6 @@ typedef union rpc_generic_union { rpc_ctrl_get_ce_pce_mask_v ctrl_get_ce_pce_mask_v; rpc_ctrl_get_zbc_clear_table_entry_v1A_0E ctrl_get_zbc_clear_table_entry_v1A_0E; rpc_ctrl_get_zbc_clear_table_entry_v ctrl_get_zbc_clear_table_entry_v; - rpc_ctrl_get_nvlink_peer_id_mask_v1A_0E ctrl_get_nvlink_peer_id_mask_v1A_0E; - rpc_ctrl_get_nvlink_peer_id_mask_v ctrl_get_nvlink_peer_id_mask_v; rpc_ctrl_get_nvlink_status_v23_04 ctrl_get_nvlink_status_v23_04; rpc_ctrl_get_nvlink_status_v ctrl_get_nvlink_status_v; rpc_ctrl_get_p2p_caps_v1F_0D ctrl_get_p2p_caps_v1F_0D; @@ -9240,6 +9503,7 @@ typedef union rpc_generic_union { rpc_ctrl_gpu_evict_ctx_v1A_1C ctrl_gpu_evict_ctx_v1A_1C; rpc_ctrl_gpu_evict_ctx_v ctrl_gpu_evict_ctx_v; rpc_ctrl_fb_get_fs_info_v24_00 ctrl_fb_get_fs_info_v24_00; + rpc_ctrl_fb_get_fs_info_v26_04 ctrl_fb_get_fs_info_v26_04; rpc_ctrl_fb_get_fs_info_v ctrl_fb_get_fs_info_v; rpc_ctrl_grmgr_get_gr_fs_info_v1A_1D ctrl_grmgr_get_gr_fs_info_v1A_1D; rpc_ctrl_grmgr_get_gr_fs_info_v ctrl_grmgr_get_gr_fs_info_v; @@ -9386,6 +9650,7 @@ typedef union rpc_generic_union { rpc_gsp_lockdown_notice_v17_00 gsp_lockdown_notice_v17_00; rpc_gsp_lockdown_notice_v gsp_lockdown_notice_v; rpc_ctrl_gpu_query_ecc_status_v24_06 ctrl_gpu_query_ecc_status_v24_06; + rpc_ctrl_gpu_query_ecc_status_v26_02 ctrl_gpu_query_ecc_status_v26_02; rpc_ctrl_gpu_query_ecc_status_v ctrl_gpu_query_ecc_status_v; rpc_ctrl_dbg_get_mode_mmu_debug_v25_04 ctrl_dbg_get_mode_mmu_debug_v25_04; rpc_ctrl_dbg_get_mode_mmu_debug_v ctrl_dbg_get_mode_mmu_debug_v; @@ -9393,6 +9658,10 @@ typedef union rpc_generic_union { rpc_ctrl_cmd_internal_gpu_start_fabric_probe_v ctrl_cmd_internal_gpu_start_fabric_probe_v; rpc_ctrl_nvlink_get_inband_received_data_v25_0C ctrl_nvlink_get_inband_received_data_v25_0C; rpc_ctrl_nvlink_get_inband_received_data_v ctrl_nvlink_get_inband_received_data_v; + rpc_fecs_error_v26_02 fecs_error_v26_02; + rpc_fecs_error_v fecs_error_v; + rpc_ctrl_cmd_nvlink_inband_send_data_v26_05 ctrl_cmd_nvlink_inband_send_data_v26_05; + rpc_ctrl_cmd_nvlink_inband_send_data_v ctrl_cmd_nvlink_inband_send_data_v; } rpc_generic_union; #endif @@ -9410,6 +9679,15 @@ static NV_STATUS get_union_member_index_rpc_alloc_object_v25_08_params(void *msg *index = _get_union_member_index_alloc_object_params_v25_08(param->hClass); return NV_OK; } +static NV_STATUS get_union_member_index_rpc_alloc_object_v26_00_params(void *msg, NvS32 bytes_remaining, uint32_t* index) +{ + rpc_alloc_object_v26_00 *param = msg; + + if ((NvS32)(NV_OFFSETOF(rpc_alloc_object_v26_00, hClass) + sizeof(param->hClass)) > bytes_remaining) + return NV_ERR_BUFFER_TOO_SMALL; + *index = _get_union_member_index_alloc_object_params_v26_00(param->hClass); + return NV_OK; +} static NV_STATUS get_union_member_index_rpc_get_engine_utilization_v1F_0E_params(void *msg, NvS32 bytes_remaining, uint32_t* index) { rpc_get_engine_utilization_v1F_0E *param = msg; diff --git a/src/nvidia/generated/g_rpc_hal.h b/src/nvidia/generated/g_rpc_hal.h index e4e8b3f379..7227a2dbd6 100644 --- a/src/nvidia/generated/g_rpc_hal.h +++ b/src/nvidia/generated/g_rpc_hal.h @@ -134,7 +134,6 @@ typedef NV_STATUS RpcSetPageDirectory(POBJGPU, POBJRPC, NvHandle, NvHandle, typedef NV_STATUS RpcCtrlGetP2pCapsV2(POBJGPU, POBJRPC, void*); typedef NV_STATUS RpcCtrlNvlinkGetInbandReceivedData(POBJGPU, POBJRPC, NV2080_CTRL_NVLINK_INBAND_RECEIVED_DATA_PARAMS*, NvU16, NvBool*); typedef NV_STATUS RpcCtrlGetCePceMask(POBJGPU, POBJRPC, NvHandle, NvHandle, void*); -typedef NV_STATUS RpcCtrlGetNvlinkPeerIdMask(POBJGPU, POBJRPC, NvHandle, NvHandle, void*); typedef NV_STATUS RpcCtrlGpuEvictCtx(POBJGPU, POBJRPC, NvHandle, NvHandle, void*); typedef NV_STATUS RpcCtrlGetMmuDebugMode(POBJGPU, POBJRPC, NvHandle, NvHandle, void*); typedef NV_STATUS RpcInvalidateTlb(POBJGPU, POBJRPC, NvU64, NvU32); @@ -170,6 +169,7 @@ typedef NV_STATUS RpcAllocObject(POBJGPU, POBJRPC, NvHandle, NvHandle, NvHa typedef NV_STATUS RpcCtrlGpuHandleVfPriFault(POBJGPU, POBJRPC, NvHandle, NvHandle, void*); typedef NV_STATUS RpcRmApiControl(POBJGPU, POBJRPC, NvHandle, NvHandle, NvU32, void*, NvU32); typedef NV_STATUS RpcCtrlFabricMemStats(POBJGPU, POBJRPC, NvHandle, NvHandle, void*); +typedef NV_STATUS RpcCtrlCmdNvlinkInbandSendData(POBJGPU, POBJRPC, NV2080_CTRL_NVLINK_INBAND_SEND_DATA_PARAMS*); typedef NV_STATUS RpcCtrlGrCtxswZcullBind(POBJGPU, POBJRPC, NvHandle, NvHandle, void*); typedef NV_STATUS RpcCtrlInternalMemsysSetZbcReferenced(POBJGPU, POBJRPC, NvHandle, NvHandle, void*); typedef NV_STATUS RpcCtrlPerfRatedTdpSetControl(POBJGPU, POBJRPC, NvHandle, NvHandle, void*); @@ -282,7 +282,6 @@ typedef struct RPC_HAL_IFACES { RpcCtrlGetP2pCapsV2 *rpcCtrlGetP2pCapsV2; /* CTRL_GET_P2P_CAPS_V2 */ RpcCtrlNvlinkGetInbandReceivedData *rpcCtrlNvlinkGetInbandReceivedData; /* CTRL_NVLINK_GET_INBAND_RECEIVED_DATA */ RpcCtrlGetCePceMask *rpcCtrlGetCePceMask; /* CTRL_GET_CE_PCE_MASK */ - RpcCtrlGetNvlinkPeerIdMask *rpcCtrlGetNvlinkPeerIdMask; /* CTRL_GET_NVLINK_PEER_ID_MASK */ RpcCtrlGpuEvictCtx *rpcCtrlGpuEvictCtx; /* CTRL_GPU_EVICT_CTX */ RpcCtrlGetMmuDebugMode *rpcCtrlGetMmuDebugMode; /* CTRL_GET_MMU_DEBUG_MODE */ RpcInvalidateTlb *rpcInvalidateTlb; /* INVALIDATE_TLB */ @@ -313,6 +312,7 @@ typedef struct RPC_HAL_IFACES { RpcCtrlGpuHandleVfPriFault *rpcCtrlGpuHandleVfPriFault; /* CTRL_GPU_HANDLE_VF_PRI_FAULT */ RpcRmApiControl *rpcRmApiControl; /* RM_API_CONTROL */ RpcCtrlFabricMemStats *rpcCtrlFabricMemStats; /* CTRL_FABRIC_MEM_STATS */ + RpcCtrlCmdNvlinkInbandSendData *rpcCtrlCmdNvlinkInbandSendData; /* CTRL_CMD_NVLINK_INBAND_SEND_DATA */ RpcCtrlGrCtxswZcullBind *rpcCtrlGrCtxswZcullBind; /* CTRL_GR_CTXSW_ZCULL_BIND */ RpcCtrlInternalMemsysSetZbcReferenced *rpcCtrlInternalMemsysSetZbcReferenced; /* CTRL_INTERNAL_MEMSYS_SET_ZBC_REFERENCED */ RpcCtrlPerfRatedTdpSetControl *rpcCtrlPerfRatedTdpSetControl; /* CTRL_PERF_RATED_TDP_SET_CONTROL */ @@ -484,8 +484,6 @@ typedef struct RPC_HAL_IFACES { (_pRpc)->_hal.rpcCtrlNvlinkGetInbandReceivedData(_pGpu, _pRpc, _pArg0, _arg1, _pArg2) #define rpcCtrlGetCePceMask_HAL(_pGpu, _pRpc, _arg0, _arg1, _pArg2) \ (_pRpc)->_hal.rpcCtrlGetCePceMask(_pGpu, _pRpc, _arg0, _arg1, _pArg2) -#define rpcCtrlGetNvlinkPeerIdMask_HAL(_pGpu, _pRpc, _arg0, _arg1, _pArg2) \ - (_pRpc)->_hal.rpcCtrlGetNvlinkPeerIdMask(_pGpu, _pRpc, _arg0, _arg1, _pArg2) #define rpcCtrlGpuEvictCtx_HAL(_pGpu, _pRpc, _arg0, _arg1, _pArg2) \ (_pRpc)->_hal.rpcCtrlGpuEvictCtx(_pGpu, _pRpc, _arg0, _arg1, _pArg2) #define rpcCtrlGetMmuDebugMode_HAL(_pGpu, _pRpc, _arg0, _arg1, _pArg2) \ @@ -546,6 +544,8 @@ typedef struct RPC_HAL_IFACES { (_pRpc)->_hal.rpcRmApiControl(_pGpu, _pRpc, _arg0, _arg1, _arg2, _pArg3, _arg4) #define rpcCtrlFabricMemStats_HAL(_pGpu, _pRpc, _arg0, _arg1, _pArg2) \ (_pRpc)->_hal.rpcCtrlFabricMemStats(_pGpu, _pRpc, _arg0, _arg1, _pArg2) +#define rpcCtrlCmdNvlinkInbandSendData_HAL(_pGpu, _pRpc, _pArg0) \ + (_pRpc)->_hal.rpcCtrlCmdNvlinkInbandSendData(_pGpu, _pRpc, _pArg0) #define rpcCtrlGrCtxswZcullBind_HAL(_pGpu, _pRpc, _arg0, _arg1, _pArg2) \ (_pRpc)->_hal.rpcCtrlGrCtxswZcullBind(_pGpu, _pRpc, _arg0, _arg1, _pArg2) #define rpcCtrlInternalMemsysSetZbcReferenced_HAL(_pGpu, _pRpc, _arg0, _arg1, _pArg2) \ diff --git a/src/nvidia/generated/g_rpc_private.h b/src/nvidia/generated/g_rpc_private.h index b896df3517..354454e9cf 100644 --- a/src/nvidia/generated/g_rpc_private.h +++ b/src/nvidia/generated/g_rpc_private.h @@ -211,6 +211,7 @@ RpcCtrlSetTimeslice rpcCtrlSetTimeslice_STUB; // TU10X, GA100, G // RPC:CTRL_GPU_QUERY_ECC_STATUS RpcCtrlGpuQueryEccStatus rpcCtrlGpuQueryEccStatus_v24_06; +RpcCtrlGpuQueryEccStatus rpcCtrlGpuQueryEccStatus_v26_02; RpcCtrlGpuQueryEccStatus rpcCtrlGpuQueryEccStatus_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X // RPC:CTRL_DBG_GET_MODE_MMU_DEBUG @@ -261,10 +262,6 @@ RpcCtrlNvlinkGetInbandReceivedData rpcCtrlNvlinkGetInbandReceivedData_STUB; / RpcCtrlGetCePceMask rpcCtrlGetCePceMask_v1A_0E; RpcCtrlGetCePceMask rpcCtrlGetCePceMask_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X - // RPC:CTRL_GET_NVLINK_PEER_ID_MASK -RpcCtrlGetNvlinkPeerIdMask rpcCtrlGetNvlinkPeerIdMask_v1A_0E; -RpcCtrlGetNvlinkPeerIdMask rpcCtrlGetNvlinkPeerIdMask_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X - // RPC:CTRL_GPU_EVICT_CTX RpcCtrlGpuEvictCtx rpcCtrlGpuEvictCtx_v1A_1C; RpcCtrlGpuEvictCtx rpcCtrlGpuEvictCtx_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X @@ -370,6 +367,7 @@ RpcPerfGetLevelInfo rpcPerfGetLevelInfo_STUB; // TU10X, GA100, G // RPC:ALLOC_OBJECT RpcAllocObject rpcAllocObject_v25_08; +RpcAllocObject rpcAllocObject_v26_00; RpcAllocObject rpcAllocObject_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X // RPC:CTRL_GPU_HANDLE_VF_PRI_FAULT @@ -393,6 +391,10 @@ RpcRmApiControl rpcRmApiControl_STUB; // TU10X, GA100, GA RpcCtrlFabricMemStats rpcCtrlFabricMemStats_v1E_0C; RpcCtrlFabricMemStats rpcCtrlFabricMemStats_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X + // RPC:CTRL_CMD_NVLINK_INBAND_SEND_DATA +RpcCtrlCmdNvlinkInbandSendData rpcCtrlCmdNvlinkInbandSendData_v26_05; +RpcCtrlCmdNvlinkInbandSendData rpcCtrlCmdNvlinkInbandSendData_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X + // RPC:CTRL_GR_CTXSW_ZCULL_BIND RpcCtrlGrCtxswZcullBind rpcCtrlGrCtxswZcullBind_v1A_0E; RpcCtrlGrCtxswZcullBind rpcCtrlGrCtxswZcullBind_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X @@ -439,6 +441,7 @@ RpcCtrlInternalSriovPromotePmaStream rpcCtrlInternalSriovPromotePmaStream_STUB // RPC:CTRL_FB_GET_FS_INFO RpcCtrlFbGetFsInfo rpcCtrlFbGetFsInfo_v24_00; +RpcCtrlFbGetFsInfo rpcCtrlFbGetFsInfo_v26_04; RpcCtrlFbGetFsInfo rpcCtrlFbGetFsInfo_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X // RPC:CTRL_SET_CHANNEL_INTERLEAVE_LEVEL @@ -2165,6 +2168,74 @@ static void rpc_iGrp_ipVersions_Install_v25_1B(IGRP_IP_VERSIONS_TABLE_INFO *pInf #endif // } +// No enabled chips use this variant provider +static void rpc_iGrp_ipVersions_Install_v26_00(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) +{ +#if 0 + + POBJGPU pGpu = pInfo->pGpu; + OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; + RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; + + // avoid possible unused warnings + pGpu += 0; + pRpcHal += 0; + + +#endif // +} + +// No enabled chips use this variant provider +static void rpc_iGrp_ipVersions_Install_v26_02(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) +{ +#if 0 + + POBJGPU pGpu = pInfo->pGpu; + OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; + RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; + + // avoid possible unused warnings + pGpu += 0; + pRpcHal += 0; + + +#endif // +} + +// No enabled chips use this variant provider +static void rpc_iGrp_ipVersions_Install_v26_04(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) +{ +#if 0 + + POBJGPU pGpu = pInfo->pGpu; + OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; + RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; + + // avoid possible unused warnings + pGpu += 0; + pRpcHal += 0; + + +#endif // +} + +// No enabled chips use this variant provider +static void rpc_iGrp_ipVersions_Install_v26_05(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) +{ +#if 0 + + POBJGPU pGpu = pInfo->pGpu; + OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; + RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; + + // avoid possible unused warnings + pGpu += 0; + pRpcHal += 0; + + +#endif // +} + @@ -2279,8 +2350,10 @@ static NV_STATUS rpc_iGrp_ipVersions_Wrapup(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) pRpcHal->rpcCleanupSurface = rpcCleanupSurface_v03_00; if (IsIPVersionInRange(pRpc, 0x1A0A0000, 0xFFFFFFFF)) pRpcHal->rpcCtrlSetTimeslice = rpcCtrlSetTimeslice_v1A_0A; - if (IsIPVersionInRange(pRpc, 0x24060000, 0xFFFFFFFF)) + if (IsIPVersionInRange(pRpc, 0x24060000, 0x2601FFFF)) pRpcHal->rpcCtrlGpuQueryEccStatus = rpcCtrlGpuQueryEccStatus_v24_06; + if (IsIPVersionInRange(pRpc, 0x26020000, 0xFFFFFFFF)) + pRpcHal->rpcCtrlGpuQueryEccStatus = rpcCtrlGpuQueryEccStatus_v26_02; if (IsIPVersionInRange(pRpc, 0x25040000, 0xFFFFFFFF)) pRpcHal->rpcCtrlDbgGetModeMmuDebug = rpcCtrlDbgGetModeMmuDebug_v25_04; if (IsIPVersionInRange(pRpc, 0x1A0C0000, 0xFFFFFFFF)) @@ -2301,8 +2374,6 @@ static NV_STATUS rpc_iGrp_ipVersions_Wrapup(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) pRpcHal->rpcCtrlNvlinkGetInbandReceivedData = rpcCtrlNvlinkGetInbandReceivedData_v25_0C; if (IsIPVersionInRange(pRpc, 0x1A0E0000, 0xFFFFFFFF)) pRpcHal->rpcCtrlGetCePceMask = rpcCtrlGetCePceMask_v1A_0E; - if (IsIPVersionInRange(pRpc, 0x1A0E0000, 0xFFFFFFFF)) - pRpcHal->rpcCtrlGetNvlinkPeerIdMask = rpcCtrlGetNvlinkPeerIdMask_v1A_0E; if (IsIPVersionInRange(pRpc, 0x1A1C0000, 0xFFFFFFFF)) pRpcHal->rpcCtrlGpuEvictCtx = rpcCtrlGpuEvictCtx_v1A_1C; if (IsIPVersionInRange(pRpc, 0x1E060000, 0xFFFFFFFF)) @@ -2353,8 +2424,10 @@ static NV_STATUS rpc_iGrp_ipVersions_Wrapup(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) pRpcHal->rpcCtrlGetP2pCaps = rpcCtrlGetP2pCaps_v1F_0D; if (IsIPVersionInRange(pRpc, 0x03000000, 0xFFFFFFFF)) pRpcHal->rpcPerfGetLevelInfo = rpcPerfGetLevelInfo_v03_00; - if (IsIPVersionInRange(pRpc, 0x25080000, 0xFFFFFFFF)) + if (IsIPVersionInRange(pRpc, 0x25080000, 0x25FFFFFF)) pRpcHal->rpcAllocObject = rpcAllocObject_v25_08; + if (IsIPVersionInRange(pRpc, 0x26000000, 0xFFFFFFFF)) + pRpcHal->rpcAllocObject = rpcAllocObject_v26_00; if (IsIPVersionInRange(pRpc, 0x1A090000, 0xFFFFFFFF)) pRpcHal->rpcCtrlGpuHandleVfPriFault = rpcCtrlGpuHandleVfPriFault_v1A_09; if (IsIPVersionInRange(pRpc, 0x250D0000, 0x250EFFFF)) @@ -2379,6 +2452,8 @@ static NV_STATUS rpc_iGrp_ipVersions_Wrapup(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) pRpcHal->rpcRmApiControl = rpcRmApiControl_v25_1A; if (IsIPVersionInRange(pRpc, 0x1E0C0000, 0xFFFFFFFF)) pRpcHal->rpcCtrlFabricMemStats = rpcCtrlFabricMemStats_v1E_0C; + if (IsIPVersionInRange(pRpc, 0x26050000, 0xFFFFFFFF)) + pRpcHal->rpcCtrlCmdNvlinkInbandSendData = rpcCtrlCmdNvlinkInbandSendData_v26_05; if (IsIPVersionInRange(pRpc, 0x1A0E0000, 0xFFFFFFFF)) pRpcHal->rpcCtrlGrCtxswZcullBind = rpcCtrlGrCtxswZcullBind_v1A_0E; if (IsIPVersionInRange(pRpc, 0x1F050000, 0xFFFFFFFF)) @@ -2401,8 +2476,10 @@ static NV_STATUS rpc_iGrp_ipVersions_Wrapup(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) pRpcHal->rpcCtrlFlaSetupInstanceMemBlock = rpcCtrlFlaSetupInstanceMemBlock_v21_05; if (IsIPVersionInRange(pRpc, 0x1C0C0000, 0xFFFFFFFF)) pRpcHal->rpcCtrlInternalSriovPromotePmaStream = rpcCtrlInternalSriovPromotePmaStream_v1C_0C; - if (IsIPVersionInRange(pRpc, 0x24000000, 0xFFFFFFFF)) + if (IsIPVersionInRange(pRpc, 0x24000000, 0x2603FFFF)) pRpcHal->rpcCtrlFbGetFsInfo = rpcCtrlFbGetFsInfo_v24_00; + if (IsIPVersionInRange(pRpc, 0x26040000, 0xFFFFFFFF)) + pRpcHal->rpcCtrlFbGetFsInfo = rpcCtrlFbGetFsInfo_v26_04; if (IsIPVersionInRange(pRpc, 0x1A0A0000, 0xFFFFFFFF)) pRpcHal->rpcCtrlSetChannelInterleaveLevel = rpcCtrlSetChannelInterleaveLevel_v1A_0A; if (IsIPVersionInRange(pRpc, 0x1A100000, 0xFFFFFFFF)) @@ -2523,7 +2600,6 @@ static NV_STATUS rpc_iGrp_ipVersions_Wrapup(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcCtrlGetP2pCapsV2); _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcCtrlNvlinkGetInbandReceivedData); _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcCtrlGetCePceMask); - _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcCtrlGetNvlinkPeerIdMask); _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcCtrlGpuEvictCtx); _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcCtrlGetMmuDebugMode); _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcInvalidateTlb); @@ -2553,6 +2629,7 @@ static NV_STATUS rpc_iGrp_ipVersions_Wrapup(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcCtrlGpuHandleVfPriFault); _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcRmApiControl); _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcCtrlFabricMemStats); + _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcCtrlCmdNvlinkInbandSendData); _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcCtrlGrCtxswZcullBind); _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcCtrlInternalMemsysSetZbcReferenced); _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcCtrlPerfRatedTdpSetControl); @@ -2882,6 +2959,18 @@ static NV_STATUS rpc_iGrp_ipVersions_getInfo(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v25_1B[] = { { 0x251B0000, 0xFFFFFFFF, }, // }; + static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v26_00[] = { + { 0x26000000, 0xFFFFFFFF, }, // + }; + static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v26_02[] = { + { 0x26020000, 0xFFFFFFFF, }, // + }; + static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v26_04[] = { + { 0x26040000, 0xFFFFFFFF, }, // + }; + static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v26_05[] = { + { 0x26050000, 0xFFFFFFFF, }, // + }; #define _RPC_HAL_IGRP_ENTRY_INIT(v) \ { RPC_IGRP_IP_VERSIONS_RANGES_##v, NV_ARRAY_ELEMENTS(RPC_IGRP_IP_VERSIONS_RANGES_##v), rpc_iGrp_ipVersions_Install_##v, } @@ -2981,6 +3070,10 @@ static NV_STATUS rpc_iGrp_ipVersions_getInfo(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) _RPC_HAL_IGRP_ENTRY_INIT(v25_19), // _RPC_HAL_IGRP_ENTRY_INIT(v25_1A), // _RPC_HAL_IGRP_ENTRY_INIT(v25_1B), // + _RPC_HAL_IGRP_ENTRY_INIT(v26_00), // + _RPC_HAL_IGRP_ENTRY_INIT(v26_02), // + _RPC_HAL_IGRP_ENTRY_INIT(v26_04), // + _RPC_HAL_IGRP_ENTRY_INIT(v26_05), // }; #undef _RPC_HAL_IGRP_ENTRY_INIT @@ -3067,7 +3160,6 @@ static void rpcHalIfacesSetup_TU102(RPC_HAL_IFACES *pRpcHal) rpcCtrlGetP2pCapsV2_STUB, // rpcCtrlGetP2pCapsV2 rpcCtrlNvlinkGetInbandReceivedData_STUB, // rpcCtrlNvlinkGetInbandReceivedData rpcCtrlGetCePceMask_STUB, // rpcCtrlGetCePceMask - rpcCtrlGetNvlinkPeerIdMask_STUB, // rpcCtrlGetNvlinkPeerIdMask rpcCtrlGpuEvictCtx_STUB, // rpcCtrlGpuEvictCtx rpcCtrlGetMmuDebugMode_STUB, // rpcCtrlGetMmuDebugMode rpcInvalidateTlb_STUB, // rpcInvalidateTlb @@ -3098,6 +3190,7 @@ static void rpcHalIfacesSetup_TU102(RPC_HAL_IFACES *pRpcHal) rpcCtrlGpuHandleVfPriFault_STUB, // rpcCtrlGpuHandleVfPriFault rpcRmApiControl_STUB, // rpcRmApiControl rpcCtrlFabricMemStats_STUB, // rpcCtrlFabricMemStats + rpcCtrlCmdNvlinkInbandSendData_STUB, // rpcCtrlCmdNvlinkInbandSendData rpcCtrlGrCtxswZcullBind_STUB, // rpcCtrlGrCtxswZcullBind rpcCtrlInternalMemsysSetZbcReferenced_STUB, // rpcCtrlInternalMemsysSetZbcReferenced rpcCtrlPerfRatedTdpSetControl_STUB, // rpcCtrlPerfRatedTdpSetControl @@ -3252,7 +3345,6 @@ static void rpcHalIfacesSetup_GA100(RPC_HAL_IFACES *pRpcHal) rpcCtrlGetP2pCapsV2_STUB, // rpcCtrlGetP2pCapsV2 rpcCtrlNvlinkGetInbandReceivedData_STUB, // rpcCtrlNvlinkGetInbandReceivedData rpcCtrlGetCePceMask_STUB, // rpcCtrlGetCePceMask - rpcCtrlGetNvlinkPeerIdMask_STUB, // rpcCtrlGetNvlinkPeerIdMask rpcCtrlGpuEvictCtx_STUB, // rpcCtrlGpuEvictCtx rpcCtrlGetMmuDebugMode_STUB, // rpcCtrlGetMmuDebugMode rpcInvalidateTlb_STUB, // rpcInvalidateTlb @@ -3283,6 +3375,7 @@ static void rpcHalIfacesSetup_GA100(RPC_HAL_IFACES *pRpcHal) rpcCtrlGpuHandleVfPriFault_STUB, // rpcCtrlGpuHandleVfPriFault rpcRmApiControl_STUB, // rpcRmApiControl rpcCtrlFabricMemStats_STUB, // rpcCtrlFabricMemStats + rpcCtrlCmdNvlinkInbandSendData_STUB, // rpcCtrlCmdNvlinkInbandSendData rpcCtrlGrCtxswZcullBind_STUB, // rpcCtrlGrCtxswZcullBind rpcCtrlInternalMemsysSetZbcReferenced_STUB, // rpcCtrlInternalMemsysSetZbcReferenced rpcCtrlPerfRatedTdpSetControl_STUB, // rpcCtrlPerfRatedTdpSetControl @@ -3449,7 +3542,6 @@ static void rpcHalIfacesSetup_AD102(RPC_HAL_IFACES *pRpcHal) rpcCtrlGetP2pCapsV2_STUB, // rpcCtrlGetP2pCapsV2 rpcCtrlNvlinkGetInbandReceivedData_STUB, // rpcCtrlNvlinkGetInbandReceivedData rpcCtrlGetCePceMask_STUB, // rpcCtrlGetCePceMask - rpcCtrlGetNvlinkPeerIdMask_STUB, // rpcCtrlGetNvlinkPeerIdMask rpcCtrlGpuEvictCtx_STUB, // rpcCtrlGpuEvictCtx rpcCtrlGetMmuDebugMode_STUB, // rpcCtrlGetMmuDebugMode rpcInvalidateTlb_STUB, // rpcInvalidateTlb @@ -3480,6 +3572,7 @@ static void rpcHalIfacesSetup_AD102(RPC_HAL_IFACES *pRpcHal) rpcCtrlGpuHandleVfPriFault_STUB, // rpcCtrlGpuHandleVfPriFault rpcRmApiControl_STUB, // rpcRmApiControl rpcCtrlFabricMemStats_STUB, // rpcCtrlFabricMemStats + rpcCtrlCmdNvlinkInbandSendData_STUB, // rpcCtrlCmdNvlinkInbandSendData rpcCtrlGrCtxswZcullBind_STUB, // rpcCtrlGrCtxswZcullBind rpcCtrlInternalMemsysSetZbcReferenced_STUB, // rpcCtrlInternalMemsysSetZbcReferenced rpcCtrlPerfRatedTdpSetControl_STUB, // rpcCtrlPerfRatedTdpSetControl @@ -3634,7 +3727,6 @@ static void rpcHalIfacesSetup_GH100(RPC_HAL_IFACES *pRpcHal) rpcCtrlGetP2pCapsV2_STUB, // rpcCtrlGetP2pCapsV2 rpcCtrlNvlinkGetInbandReceivedData_STUB, // rpcCtrlNvlinkGetInbandReceivedData rpcCtrlGetCePceMask_STUB, // rpcCtrlGetCePceMask - rpcCtrlGetNvlinkPeerIdMask_STUB, // rpcCtrlGetNvlinkPeerIdMask rpcCtrlGpuEvictCtx_STUB, // rpcCtrlGpuEvictCtx rpcCtrlGetMmuDebugMode_STUB, // rpcCtrlGetMmuDebugMode rpcInvalidateTlb_STUB, // rpcInvalidateTlb @@ -3665,6 +3757,7 @@ static void rpcHalIfacesSetup_GH100(RPC_HAL_IFACES *pRpcHal) rpcCtrlGpuHandleVfPriFault_STUB, // rpcCtrlGpuHandleVfPriFault rpcRmApiControl_STUB, // rpcRmApiControl rpcCtrlFabricMemStats_STUB, // rpcCtrlFabricMemStats + rpcCtrlCmdNvlinkInbandSendData_STUB, // rpcCtrlCmdNvlinkInbandSendData rpcCtrlGrCtxswZcullBind_STUB, // rpcCtrlGrCtxswZcullBind rpcCtrlInternalMemsysSetZbcReferenced_STUB, // rpcCtrlInternalMemsysSetZbcReferenced rpcCtrlPerfRatedTdpSetControl_STUB, // rpcCtrlPerfRatedTdpSetControl diff --git a/src/nvidia/generated/g_rpcstructurecopy_hal.h b/src/nvidia/generated/g_rpcstructurecopy_hal.h index 695d113e57..16f7a13ac5 100644 --- a/src/nvidia/generated/g_rpcstructurecopy_hal.h +++ b/src/nvidia/generated/g_rpcstructurecopy_hal.h @@ -69,6 +69,7 @@ typedef NV_STATUS Deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_FLOORSWEEP typedef NV_STATUS Deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS(NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS* data, NvU8* stream, NvU32 streamSize, NvU32 *offset); typedef NV_STATUS Deserialize_VGPU_FIFO_GET_DEVICE_INFO_TABLE(VGPU_FIFO_GET_DEVICE_INFO_TABLE* data, NvU8* stream, NvU32 streamSize, NvU32 *offset); typedef NV_STATUS Deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS(NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS* data, NvU8* stream, NvU32 streamSize, NvU32 *offset); +typedef NV_STATUS Deserialize_GPU_EXEC_SYSPIPE_INFO(GPU_EXEC_SYSPIPE_INFO* data, NvU8* stream, NvU32 streamSize, NvU32 *offset); typedef NV_STATUS Deserialize_VGPU_BSP_GET_CAPS(VGPU_BSP_GET_CAPS* data, NvU8* stream, NvU32 streamSize, NvU32 *offset); typedef NV_STATUS Deserialize_NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS(NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS* data, NvU8* stream, NvU32 streamSize, NvU32 *offset); typedef NV_STATUS Deserialize_GPU_PARTITION_INFO(GPU_PARTITION_INFO* data, NvU8* stream, NvU32 streamSize, NvU32 *offset); @@ -124,6 +125,7 @@ typedef struct RPCSTRUCTURECOPY_HAL_IFACES { Deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS *deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS; /* HAL function to deserialize NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS */ Deserialize_VGPU_FIFO_GET_DEVICE_INFO_TABLE *deserialize_VGPU_FIFO_GET_DEVICE_INFO_TABLE; /* HAL function to deserialize VGPU_FIFO_GET_DEVICE_INFO_TABLE */ Deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS *deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS; /* HAL function to deserialize NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS */ + Deserialize_GPU_EXEC_SYSPIPE_INFO *deserialize_GPU_EXEC_SYSPIPE_INFO; /* HAL function to deserialize GPU_EXEC_SYSPIPE_INFO */ Deserialize_VGPU_BSP_GET_CAPS *deserialize_VGPU_BSP_GET_CAPS; /* HAL function to deserialize VGPU_BSP_GET_CAPS */ Deserialize_NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS *deserialize_NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS; /* HAL function to deserialize NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS */ Deserialize_GPU_PARTITION_INFO *deserialize_GPU_PARTITION_INFO; /* HAL function to deserialize GPU_PARTITION_INFO */ @@ -208,6 +210,8 @@ typedef struct RPCSTRUCTURECOPY_HAL_IFACES { (_pRpcstructurecopy)->_hal.deserialize_VGPU_FIFO_GET_DEVICE_INFO_TABLE(_pData, _pStream, _streamSize, _pOffset) #define deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS_HAL(_pRpcstructurecopy, _pData, _pStream, _streamSize, _pOffset) \ (_pRpcstructurecopy)->_hal.deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS(_pData, _pStream, _streamSize, _pOffset) +#define deserialize_GPU_EXEC_SYSPIPE_INFO_HAL(_pRpcstructurecopy, _pData, _pStream, _streamSize, _pOffset) \ + (_pRpcstructurecopy)->_hal.deserialize_GPU_EXEC_SYSPIPE_INFO(_pData, _pStream, _streamSize, _pOffset) #define deserialize_VGPU_BSP_GET_CAPS_HAL(_pRpcstructurecopy, _pData, _pStream, _streamSize, _pOffset) \ (_pRpcstructurecopy)->_hal.deserialize_VGPU_BSP_GET_CAPS(_pData, _pStream, _streamSize, _pOffset) #define deserialize_NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS_HAL(_pRpcstructurecopy, _pData, _pStream, _streamSize, _pOffset) \ diff --git a/src/nvidia/generated/g_rpcstructurecopy_private.h b/src/nvidia/generated/g_rpcstructurecopy_private.h index 869273b411..b70a4f8717 100644 --- a/src/nvidia/generated/g_rpcstructurecopy_private.h +++ b/src/nvidia/generated/g_rpcstructurecopy_private.h @@ -126,6 +126,10 @@ Deserialize_VGPU_FIFO_GET_DEVICE_INFO_TABLE deserialize_VGPU_FIFO_GET_DEVICE_I Deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS_v21_0A; Deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X + // RPCSTRUCTURECOPY:GPU_EXEC_SYSPIPE_INFO +Deserialize_GPU_EXEC_SYSPIPE_INFO deserialize_GPU_EXEC_SYSPIPE_INFO_v26_01; +Deserialize_GPU_EXEC_SYSPIPE_INFO deserialize_GPU_EXEC_SYSPIPE_INFO_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X + // RPCSTRUCTURECOPY:VGPU_BSP_GET_CAPS Deserialize_VGPU_BSP_GET_CAPS deserialize_VGPU_BSP_GET_CAPS_v25_00; Deserialize_VGPU_BSP_GET_CAPS deserialize_VGPU_BSP_GET_CAPS_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X @@ -164,6 +168,7 @@ Deserialize_NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS deserialize_NV2080_C // RPCSTRUCTURECOPY:VGPU_STATIC_PROPERTIES Deserialize_VGPU_STATIC_PROPERTIES deserialize_VGPU_STATIC_PROPERTIES_v1B_01; +Deserialize_VGPU_STATIC_PROPERTIES deserialize_VGPU_STATIC_PROPERTIES_v26_03; Deserialize_VGPU_STATIC_PROPERTIES deserialize_VGPU_STATIC_PROPERTIES_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X // RPCSTRUCTURECOPY:NV2080_CTRL_BUS_GET_INFO_V2_PARAMS @@ -188,6 +193,7 @@ Deserialize_NV2080_CTRL_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS deserialize_NV208 // RPCSTRUCTURECOPY:NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS Deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v24_06; +Deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v26_02; Deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X // RPCSTRUCTURECOPY:VGPU_CE_GET_CAPS_V2 @@ -848,6 +854,57 @@ static void rpcstructurecopy_iGrp_ipVersions_Install_v25_13(IGRP_IP_VERSIONS_TAB #endif // } +// No enabled chips use this variant provider +static void rpcstructurecopy_iGrp_ipVersions_Install_v26_01(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) +{ +#if 0 + + POBJGPU pGpu = pInfo->pGpu; + OBJRPCSTRUCTURECOPY *pRpcstructurecopy = (OBJRPCSTRUCTURECOPY *) pInfo->pDynamic; + RPCSTRUCTURECOPY_HAL_IFACES *pRpcstructurecopyHal = &pRpcstructurecopy->_hal; + + // avoid possible unused warnings + pGpu += 0; + pRpcstructurecopyHal += 0; + + +#endif // +} + +// No enabled chips use this variant provider +static void rpcstructurecopy_iGrp_ipVersions_Install_v26_02(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) +{ +#if 0 + + POBJGPU pGpu = pInfo->pGpu; + OBJRPCSTRUCTURECOPY *pRpcstructurecopy = (OBJRPCSTRUCTURECOPY *) pInfo->pDynamic; + RPCSTRUCTURECOPY_HAL_IFACES *pRpcstructurecopyHal = &pRpcstructurecopy->_hal; + + // avoid possible unused warnings + pGpu += 0; + pRpcstructurecopyHal += 0; + + +#endif // +} + +// No enabled chips use this variant provider +static void rpcstructurecopy_iGrp_ipVersions_Install_v26_03(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) +{ +#if 0 + + POBJGPU pGpu = pInfo->pGpu; + OBJRPCSTRUCTURECOPY *pRpcstructurecopy = (OBJRPCSTRUCTURECOPY *) pInfo->pDynamic; + RPCSTRUCTURECOPY_HAL_IFACES *pRpcstructurecopyHal = &pRpcstructurecopy->_hal; + + // avoid possible unused warnings + pGpu += 0; + pRpcstructurecopyHal += 0; + + +#endif // +} + @@ -922,6 +979,8 @@ static NV_STATUS rpcstructurecopy_iGrp_ipVersions_Wrapup(IGRP_IP_VERSIONS_TABLE_ pRpcstructurecopyHal->deserialize_VGPU_FIFO_GET_DEVICE_INFO_TABLE = deserialize_VGPU_FIFO_GET_DEVICE_INFO_TABLE_v1A_07; if (IsIPVersionInRange(pRpcstructurecopy, 0x210A0000, 0xFFFFFFFF)) pRpcstructurecopyHal->deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS = deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS_v21_0A; + if (IsIPVersionInRange(pRpcstructurecopy, 0x26010000, 0xFFFFFFFF)) + pRpcstructurecopyHal->deserialize_GPU_EXEC_SYSPIPE_INFO = deserialize_GPU_EXEC_SYSPIPE_INFO_v26_01; if (IsIPVersionInRange(pRpcstructurecopy, 0x25000000, 0xFFFFFFFF)) pRpcstructurecopyHal->deserialize_VGPU_BSP_GET_CAPS = deserialize_VGPU_BSP_GET_CAPS_v25_00; if (IsIPVersionInRange(pRpcstructurecopy, 0x1F080000, 0xFFFFFFFF)) @@ -940,8 +999,10 @@ static NV_STATUS rpcstructurecopy_iGrp_ipVersions_Wrapup(IGRP_IP_VERSIONS_TABLE_ pRpcstructurecopyHal->deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_RECORD_SIZE_PARAMS = deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_RECORD_SIZE_PARAMS_v1B_05; if (IsIPVersionInRange(pRpcstructurecopy, 0x15020000, 0xFFFFFFFF)) pRpcstructurecopyHal->deserialize_NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS = deserialize_NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS_v15_02; - if (IsIPVersionInRange(pRpcstructurecopy, 0x1B010000, 0xFFFFFFFF)) + if (IsIPVersionInRange(pRpcstructurecopy, 0x1B010000, 0x2602FFFF)) pRpcstructurecopyHal->deserialize_VGPU_STATIC_PROPERTIES = deserialize_VGPU_STATIC_PROPERTIES_v1B_01; + if (IsIPVersionInRange(pRpcstructurecopy, 0x26030000, 0xFFFFFFFF)) + pRpcstructurecopyHal->deserialize_VGPU_STATIC_PROPERTIES = deserialize_VGPU_STATIC_PROPERTIES_v26_03; if (IsIPVersionInRange(pRpcstructurecopy, 0x1C090000, 0xFFFFFFFF)) pRpcstructurecopyHal->deserialize_NV2080_CTRL_BUS_GET_INFO_V2_PARAMS = deserialize_NV2080_CTRL_BUS_GET_INFO_V2_PARAMS_v1C_09; if (IsIPVersionInRange(pRpcstructurecopy, 0x25010000, 0xFFFFFFFF)) @@ -952,8 +1013,10 @@ static NV_STATUS rpcstructurecopy_iGrp_ipVersions_Wrapup(IGRP_IP_VERSIONS_TABLE_ pRpcstructurecopyHal->deserialize_NV2080_CTRL_FLA_GET_RANGE_PARAMS = deserialize_NV2080_CTRL_FLA_GET_RANGE_PARAMS_v1A_18; if (IsIPVersionInRange(pRpcstructurecopy, 0x1A1F0000, 0xFFFFFFFF)) pRpcstructurecopyHal->deserialize_NV2080_CTRL_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS = deserialize_NV2080_CTRL_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS_v1A_1F; - if (IsIPVersionInRange(pRpcstructurecopy, 0x24060000, 0xFFFFFFFF)) + if (IsIPVersionInRange(pRpcstructurecopy, 0x24060000, 0x2601FFFF)) pRpcstructurecopyHal->deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS = deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v24_06; + if (IsIPVersionInRange(pRpcstructurecopy, 0x26020000, 0xFFFFFFFF)) + pRpcstructurecopyHal->deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS = deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v26_02; if (IsIPVersionInRange(pRpcstructurecopy, 0x24090000, 0xFFFFFFFF)) pRpcstructurecopyHal->deserialize_VGPU_CE_GET_CAPS_V2 = deserialize_VGPU_CE_GET_CAPS_V2_v24_09; if (IsIPVersionInRange(pRpcstructurecopy, 0x1C090000, 0xFFFFFFFF)) @@ -994,6 +1057,7 @@ static NV_STATUS rpcstructurecopy_iGrp_ipVersions_Wrapup(IGRP_IP_VERSIONS_TABLE_ _RPCSTRUCTURECOPY_HAL_VERIFY_INTERFACE(pRpcstructurecopyHal->deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS); _RPCSTRUCTURECOPY_HAL_VERIFY_INTERFACE(pRpcstructurecopyHal->deserialize_VGPU_FIFO_GET_DEVICE_INFO_TABLE); _RPCSTRUCTURECOPY_HAL_VERIFY_INTERFACE(pRpcstructurecopyHal->deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS); + _RPCSTRUCTURECOPY_HAL_VERIFY_INTERFACE(pRpcstructurecopyHal->deserialize_GPU_EXEC_SYSPIPE_INFO); _RPCSTRUCTURECOPY_HAL_VERIFY_INTERFACE(pRpcstructurecopyHal->deserialize_VGPU_BSP_GET_CAPS); _RPCSTRUCTURECOPY_HAL_VERIFY_INTERFACE(pRpcstructurecopyHal->deserialize_NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS); _RPCSTRUCTURECOPY_HAL_VERIFY_INTERFACE(pRpcstructurecopyHal->deserialize_GPU_PARTITION_INFO); @@ -1133,6 +1197,15 @@ static NV_STATUS rpcstructurecopy_iGrp_ipVersions_getInfo(IGRP_IP_VERSIONS_TABLE static const IGRP_IP_VERSION_RANGE RPCSTRUCTURECOPY_IGRP_IP_VERSIONS_RANGES_v25_13[] = { { 0x25130000, 0xFFFFFFFF, }, // }; + static const IGRP_IP_VERSION_RANGE RPCSTRUCTURECOPY_IGRP_IP_VERSIONS_RANGES_v26_01[] = { + { 0x26010000, 0xFFFFFFFF, }, // + }; + static const IGRP_IP_VERSION_RANGE RPCSTRUCTURECOPY_IGRP_IP_VERSIONS_RANGES_v26_02[] = { + { 0x26020000, 0xFFFFFFFF, }, // + }; + static const IGRP_IP_VERSION_RANGE RPCSTRUCTURECOPY_IGRP_IP_VERSIONS_RANGES_v26_03[] = { + { 0x26030000, 0xFFFFFFFF, }, // + }; #define _RPCSTRUCTURECOPY_HAL_IGRP_ENTRY_INIT(v) \ { RPCSTRUCTURECOPY_IGRP_IP_VERSIONS_RANGES_##v, NV_ARRAY_ELEMENTS(RPCSTRUCTURECOPY_IGRP_IP_VERSIONS_RANGES_##v), rpcstructurecopy_iGrp_ipVersions_Install_##v, } @@ -1175,6 +1248,9 @@ static NV_STATUS rpcstructurecopy_iGrp_ipVersions_getInfo(IGRP_IP_VERSIONS_TABLE _RPCSTRUCTURECOPY_HAL_IGRP_ENTRY_INIT(v25_0B), // _RPCSTRUCTURECOPY_HAL_IGRP_ENTRY_INIT(v25_0E), // _RPCSTRUCTURECOPY_HAL_IGRP_ENTRY_INIT(v25_13), // + _RPCSTRUCTURECOPY_HAL_IGRP_ENTRY_INIT(v26_01), // + _RPCSTRUCTURECOPY_HAL_IGRP_ENTRY_INIT(v26_02), // + _RPCSTRUCTURECOPY_HAL_IGRP_ENTRY_INIT(v26_03), // }; #undef _RPCSTRUCTURECOPY_HAL_IGRP_ENTRY_INIT @@ -1227,6 +1303,7 @@ static void rpcstructurecopyHalIfacesSetup_TU102(RPCSTRUCTURECOPY_HAL_IFACES *pR deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS_STUB, // deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS deserialize_VGPU_FIFO_GET_DEVICE_INFO_TABLE_STUB, // deserialize_VGPU_FIFO_GET_DEVICE_INFO_TABLE deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS_STUB, // deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS + deserialize_GPU_EXEC_SYSPIPE_INFO_STUB, // deserialize_GPU_EXEC_SYSPIPE_INFO deserialize_VGPU_BSP_GET_CAPS_STUB, // deserialize_VGPU_BSP_GET_CAPS deserialize_NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS_STUB, // deserialize_NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS deserialize_GPU_PARTITION_INFO_STUB, // deserialize_GPU_PARTITION_INFO @@ -1328,6 +1405,7 @@ static void rpcstructurecopyHalIfacesSetup_GA100(RPCSTRUCTURECOPY_HAL_IFACES *pR deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS_STUB, // deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS deserialize_VGPU_FIFO_GET_DEVICE_INFO_TABLE_STUB, // deserialize_VGPU_FIFO_GET_DEVICE_INFO_TABLE deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS_STUB, // deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS + deserialize_GPU_EXEC_SYSPIPE_INFO_STUB, // deserialize_GPU_EXEC_SYSPIPE_INFO deserialize_VGPU_BSP_GET_CAPS_STUB, // deserialize_VGPU_BSP_GET_CAPS deserialize_NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS_STUB, // deserialize_NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS deserialize_GPU_PARTITION_INFO_STUB, // deserialize_GPU_PARTITION_INFO @@ -1438,6 +1516,7 @@ static void rpcstructurecopyHalIfacesSetup_AD102(RPCSTRUCTURECOPY_HAL_IFACES *pR deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS_STUB, // deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS deserialize_VGPU_FIFO_GET_DEVICE_INFO_TABLE_STUB, // deserialize_VGPU_FIFO_GET_DEVICE_INFO_TABLE deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS_STUB, // deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS + deserialize_GPU_EXEC_SYSPIPE_INFO_STUB, // deserialize_GPU_EXEC_SYSPIPE_INFO deserialize_VGPU_BSP_GET_CAPS_STUB, // deserialize_VGPU_BSP_GET_CAPS deserialize_NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS_STUB, // deserialize_NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS deserialize_GPU_PARTITION_INFO_STUB, // deserialize_GPU_PARTITION_INFO @@ -1539,6 +1618,7 @@ static void rpcstructurecopyHalIfacesSetup_GH100(RPCSTRUCTURECOPY_HAL_IFACES *pR deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS_STUB, // deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS deserialize_VGPU_FIFO_GET_DEVICE_INFO_TABLE_STUB, // deserialize_VGPU_FIFO_GET_DEVICE_INFO_TABLE deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS_STUB, // deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS + deserialize_GPU_EXEC_SYSPIPE_INFO_STUB, // deserialize_GPU_EXEC_SYSPIPE_INFO deserialize_VGPU_BSP_GET_CAPS_STUB, // deserialize_VGPU_BSP_GET_CAPS deserialize_NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS_STUB, // deserialize_NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS deserialize_GPU_PARTITION_INFO_STUB, // deserialize_GPU_PARTITION_INFO diff --git a/src/nvidia/generated/g_rs_client_nvoc.c b/src/nvidia/generated/g_rs_client_nvoc.c index 1b49304ea6..fc53582bdc 100644 --- a/src/nvidia/generated/g_rs_client_nvoc.c +++ b/src/nvidia/generated/g_rs_client_nvoc.c @@ -93,33 +93,52 @@ NV_STATUS __nvoc_ctor_RsClient(RsClient *pThis, struct PORT_MEM_ALLOCATOR * arg_ return status; } +// Vtable initialization static void __nvoc_init_funcTable_RsClient_1(RsClient *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // clientValidate -- virtual pThis->__clientValidate__ = &clientValidate_IMPL; + // clientValidateLocks -- virtual + pThis->__clientValidateLocks__ = &clientValidateLocks_IMPL; + + // clientGetCachedPrivilege -- virtual pThis->__clientGetCachedPrivilege__ = &clientGetCachedPrivilege_IMPL; + // clientIsAdmin -- virtual pThis->__clientIsAdmin__ = &clientIsAdmin_IMPL; + // clientFreeResource -- virtual pThis->__clientFreeResource__ = &clientFreeResource_IMPL; + // clientDestructResourceRef -- virtual pThis->__clientDestructResourceRef__ = &clientDestructResourceRef_IMPL; + // clientUnmapMemory -- virtual pThis->__clientUnmapMemory__ = &clientUnmapMemory_IMPL; + // clientInterMap -- virtual pThis->__clientInterMap__ = &clientInterMap_IMPL; + // clientInterUnmap -- virtual pThis->__clientInterUnmap__ = &clientInterUnmap_IMPL; + // clientValidateNewResourceHandle -- virtual pThis->__clientValidateNewResourceHandle__ = &clientValidateNewResourceHandle_IMPL; + // clientPostProcessPendingFreeList -- virtual pThis->__clientPostProcessPendingFreeList__ = &clientPostProcessPendingFreeList_IMPL; + // clientShareResource -- virtual pThis->__clientShareResource__ = &clientShareResource_IMPL; -} +} // End __nvoc_init_funcTable_RsClient_1 with approximately 12 basic block(s). + +// Initialize vtable(s) for 12 virtual method(s). void __nvoc_init_funcTable_RsClient(RsClient *pThis) { + + // Initialize vtable(s) with 12 per-object function pointer(s). __nvoc_init_funcTable_RsClient_1(pThis); } @@ -258,78 +277,99 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_RsClientResource = /*pExportInfo=*/ &__nvoc_export_info_RsClientResource }; -static NvBool __nvoc_thunk_RsResource_clientresShareCallback(struct RsClientResource *pResource, struct RsClient *pInvokingClient, RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return resShareCallback((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// 18 up-thunk(s) defined to bridge methods in RsClientResource to superclasses + +// clientresCanCopy: virtual inherited (res) base (res) +static NvBool __nvoc_up_thunk_RsResource_clientresCanCopy(struct RsClientResource *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_clientresControl(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControl((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams); +// clientresIsDuplicate: virtual inherited (res) base (res) +static NV_STATUS __nvoc_up_thunk_RsResource_clientresIsDuplicate(struct RsClientResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_clientresUnmap(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pCpuMapping); +// clientresPreDestruct: virtual inherited (res) base (res) +static void __nvoc_up_thunk_RsResource_clientresPreDestruct(struct RsClientResource *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_clientresMapTo(struct RsClientResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pParams); +// clientresControl: virtual inherited (res) base (res) +static NV_STATUS __nvoc_up_thunk_RsResource_clientresControl(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams); } -static NvU32 __nvoc_thunk_RsResource_clientresGetRefCount(struct RsClientResource *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RsClientResource_RsResource.offset)); +// clientresControlFilter: virtual inherited (res) base (res) +static NV_STATUS __nvoc_up_thunk_RsResource_clientresControlFilter(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_clientresControlFilter(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams); +// clientresControlSerialization_Prologue: virtual inherited (res) base (res) +static NV_STATUS __nvoc_up_thunk_RsResource_clientresControlSerialization_Prologue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlSerialization_Prologue((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_clientresAddAdditionalDependants(struct RsClient *pClient, struct RsClientResource *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pReference); +// clientresControlSerialization_Epilogue: virtual inherited (res) base (res) +static void __nvoc_up_thunk_RsResource_clientresControlSerialization_Epilogue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + resControlSerialization_Epilogue((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_clientresControlSerialization_Prologue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlSerialization_Prologue((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams); +// clientresControl_Prologue: virtual inherited (res) base (res) +static NV_STATUS __nvoc_up_thunk_RsResource_clientresControl_Prologue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControl_Prologue((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_clientresCanCopy(struct RsClientResource *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RsClientResource_RsResource.offset)); +// clientresControl_Epilogue: virtual inherited (res) base (res) +static void __nvoc_up_thunk_RsResource_clientresControl_Epilogue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + resControl_Epilogue((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_clientresControl_Prologue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControl_Prologue((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams); +// clientresMap: virtual inherited (res) base (res) +static NV_STATUS __nvoc_up_thunk_RsResource_clientresMap(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams, pCpuMapping); } -static NvBool __nvoc_thunk_RsResource_clientresIsPartialUnmapSupported(struct RsClientResource *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RsClientResource_RsResource.offset)); +// clientresUnmap: virtual inherited (res) base (res) +static NV_STATUS __nvoc_up_thunk_RsResource_clientresUnmap(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_RsResource_clientresPreDestruct(struct RsClientResource *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RsClientResource_RsResource.offset)); +// clientresIsPartialUnmapSupported: inline virtual inherited (res) base (res) body +static NvBool __nvoc_up_thunk_RsResource_clientresIsPartialUnmapSupported(struct RsClientResource *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_clientresUnmapFrom(struct RsClientResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pParams); +// clientresMapTo: virtual inherited (res) base (res) +static NV_STATUS __nvoc_up_thunk_RsResource_clientresMapTo(struct RsClientResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_clientresIsDuplicate(struct RsClientResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), hMemory, pDuplicate); +// clientresUnmapFrom: virtual inherited (res) base (res) +static NV_STATUS __nvoc_up_thunk_RsResource_clientresUnmapFrom(struct RsClientResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pParams); } -static void __nvoc_thunk_RsResource_clientresControlSerialization_Epilogue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - resControlSerialization_Epilogue((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams); +// clientresGetRefCount: virtual inherited (res) base (res) +static NvU32 __nvoc_up_thunk_RsResource_clientresGetRefCount(struct RsClientResource *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset)); } -static void __nvoc_thunk_RsResource_clientresControl_Epilogue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - resControl_Epilogue((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams); +// clientresAccessCallback: virtual inherited (res) base (res) +static NvBool __nvoc_up_thunk_RsResource_clientresAccessCallback(struct RsClientResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return resAccessCallback((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RsResource_clientresMap(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams, pCpuMapping); +// clientresShareCallback: virtual inherited (res) base (res) +static NvBool __nvoc_up_thunk_RsResource_clientresShareCallback(struct RsClientResource *pResource, struct RsClient *pInvokingClient, RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return resShareCallback((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NvBool __nvoc_thunk_RsResource_clientresAccessCallback(struct RsClientResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return resAccessCallback((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pInvokingClient, pAllocParams, accessRight); +// clientresAddAdditionalDependants: virtual inherited (res) base (res) +static void __nvoc_up_thunk_RsResource_clientresAddAdditionalDependants(struct RsClient *pClient, struct RsClientResource *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_RsClientResource = { /*numEntries=*/ 0, @@ -366,47 +406,70 @@ NV_STATUS __nvoc_ctor_RsClientResource(RsClientResource *pThis, struct CALL_CONT return status; } +// Vtable initialization static void __nvoc_init_funcTable_RsClientResource_1(RsClientResource *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - pThis->__clientresShareCallback__ = &__nvoc_thunk_RsResource_clientresShareCallback; + // clientresCanCopy -- virtual inherited (res) base (res) + pThis->__clientresCanCopy__ = &__nvoc_up_thunk_RsResource_clientresCanCopy; - pThis->__clientresControl__ = &__nvoc_thunk_RsResource_clientresControl; + // clientresIsDuplicate -- virtual inherited (res) base (res) + pThis->__clientresIsDuplicate__ = &__nvoc_up_thunk_RsResource_clientresIsDuplicate; - pThis->__clientresUnmap__ = &__nvoc_thunk_RsResource_clientresUnmap; + // clientresPreDestruct -- virtual inherited (res) base (res) + pThis->__clientresPreDestruct__ = &__nvoc_up_thunk_RsResource_clientresPreDestruct; - pThis->__clientresMapTo__ = &__nvoc_thunk_RsResource_clientresMapTo; + // clientresControl -- virtual inherited (res) base (res) + pThis->__clientresControl__ = &__nvoc_up_thunk_RsResource_clientresControl; - pThis->__clientresGetRefCount__ = &__nvoc_thunk_RsResource_clientresGetRefCount; + // clientresControlFilter -- virtual inherited (res) base (res) + pThis->__clientresControlFilter__ = &__nvoc_up_thunk_RsResource_clientresControlFilter; - pThis->__clientresControlFilter__ = &__nvoc_thunk_RsResource_clientresControlFilter; + // clientresControlSerialization_Prologue -- virtual inherited (res) base (res) + pThis->__clientresControlSerialization_Prologue__ = &__nvoc_up_thunk_RsResource_clientresControlSerialization_Prologue; - pThis->__clientresAddAdditionalDependants__ = &__nvoc_thunk_RsResource_clientresAddAdditionalDependants; + // clientresControlSerialization_Epilogue -- virtual inherited (res) base (res) + pThis->__clientresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RsResource_clientresControlSerialization_Epilogue; - pThis->__clientresControlSerialization_Prologue__ = &__nvoc_thunk_RsResource_clientresControlSerialization_Prologue; + // clientresControl_Prologue -- virtual inherited (res) base (res) + pThis->__clientresControl_Prologue__ = &__nvoc_up_thunk_RsResource_clientresControl_Prologue; - pThis->__clientresCanCopy__ = &__nvoc_thunk_RsResource_clientresCanCopy; + // clientresControl_Epilogue -- virtual inherited (res) base (res) + pThis->__clientresControl_Epilogue__ = &__nvoc_up_thunk_RsResource_clientresControl_Epilogue; - pThis->__clientresControl_Prologue__ = &__nvoc_thunk_RsResource_clientresControl_Prologue; + // clientresMap -- virtual inherited (res) base (res) + pThis->__clientresMap__ = &__nvoc_up_thunk_RsResource_clientresMap; - pThis->__clientresIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_clientresIsPartialUnmapSupported; + // clientresUnmap -- virtual inherited (res) base (res) + pThis->__clientresUnmap__ = &__nvoc_up_thunk_RsResource_clientresUnmap; - pThis->__clientresPreDestruct__ = &__nvoc_thunk_RsResource_clientresPreDestruct; + // clientresIsPartialUnmapSupported -- inline virtual inherited (res) base (res) body + pThis->__clientresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_clientresIsPartialUnmapSupported; - pThis->__clientresUnmapFrom__ = &__nvoc_thunk_RsResource_clientresUnmapFrom; + // clientresMapTo -- virtual inherited (res) base (res) + pThis->__clientresMapTo__ = &__nvoc_up_thunk_RsResource_clientresMapTo; - pThis->__clientresIsDuplicate__ = &__nvoc_thunk_RsResource_clientresIsDuplicate; + // clientresUnmapFrom -- virtual inherited (res) base (res) + pThis->__clientresUnmapFrom__ = &__nvoc_up_thunk_RsResource_clientresUnmapFrom; - pThis->__clientresControlSerialization_Epilogue__ = &__nvoc_thunk_RsResource_clientresControlSerialization_Epilogue; + // clientresGetRefCount -- virtual inherited (res) base (res) + pThis->__clientresGetRefCount__ = &__nvoc_up_thunk_RsResource_clientresGetRefCount; - pThis->__clientresControl_Epilogue__ = &__nvoc_thunk_RsResource_clientresControl_Epilogue; + // clientresAccessCallback -- virtual inherited (res) base (res) + pThis->__clientresAccessCallback__ = &__nvoc_up_thunk_RsResource_clientresAccessCallback; - pThis->__clientresMap__ = &__nvoc_thunk_RsResource_clientresMap; + // clientresShareCallback -- virtual inherited (res) base (res) + pThis->__clientresShareCallback__ = &__nvoc_up_thunk_RsResource_clientresShareCallback; - pThis->__clientresAccessCallback__ = &__nvoc_thunk_RsResource_clientresAccessCallback; -} + // clientresAddAdditionalDependants -- virtual inherited (res) base (res) + pThis->__clientresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_clientresAddAdditionalDependants; +} // End __nvoc_init_funcTable_RsClientResource_1 with approximately 18 basic block(s). + +// Initialize vtable(s) for 18 virtual method(s). void __nvoc_init_funcTable_RsClientResource(RsClientResource *pThis) { + + // Initialize vtable(s) with 18 per-object function pointer(s). __nvoc_init_funcTable_RsClientResource_1(pThis); } diff --git a/src/nvidia/generated/g_rs_client_nvoc.h b/src/nvidia/generated/g_rs_client_nvoc.h index 24e70e649c..20799d20e9 100644 --- a/src/nvidia/generated/g_rs_client_nvoc.h +++ b/src/nvidia/generated/g_rs_client_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_RS_CLIENT_NVOC_H_ #define _G_RS_CLIENT_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_rs_client_nvoc.h" #ifndef _RS_CLIENT_H_ @@ -79,22 +87,34 @@ MAKE_LIST(AccessBackRefList, AccessBackRef); #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct RsClient { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct RsClient *__nvoc_pbase_RsClient; - NV_STATUS (*__clientValidate__)(struct RsClient *, const API_SECURITY_INFO *); - RS_PRIV_LEVEL (*__clientGetCachedPrivilege__)(struct RsClient *); - NvBool (*__clientIsAdmin__)(struct RsClient *, RS_PRIV_LEVEL); - NV_STATUS (*__clientFreeResource__)(struct RsClient *, RsServer *, struct RS_RES_FREE_PARAMS_INTERNAL *); - NV_STATUS (*__clientDestructResourceRef__)(struct RsClient *, RsServer *, struct RsResourceRef *); - NV_STATUS (*__clientUnmapMemory__)(struct RsClient *, struct RsResourceRef *, struct RS_LOCK_INFO *, struct RsCpuMapping **, API_SECURITY_INFO *); - NV_STATUS (*__clientInterMap__)(struct RsClient *, struct RsResourceRef *, struct RsResourceRef *, struct RS_INTER_MAP_PARAMS *); - NV_STATUS (*__clientInterUnmap__)(struct RsClient *, struct RsResourceRef *, struct RS_INTER_UNMAP_PARAMS *); - NV_STATUS (*__clientValidateNewResourceHandle__)(struct RsClient *, NvHandle, NvBool); - NV_STATUS (*__clientPostProcessPendingFreeList__)(struct RsClient *, struct RsResourceRef **); - NV_STATUS (*__clientShareResource__)(struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *, struct CALL_CONTEXT *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct RsClient *__nvoc_pbase_RsClient; // client + + // Vtable with 12 per-object function pointers + NV_STATUS (*__clientValidate__)(struct RsClient * /*this*/, const API_SECURITY_INFO *); // virtual + NV_STATUS (*__clientValidateLocks__)(struct RsClient * /*this*/, RsServer *, const CLIENT_ENTRY *); // virtual + RS_PRIV_LEVEL (*__clientGetCachedPrivilege__)(struct RsClient * /*this*/); // virtual + NvBool (*__clientIsAdmin__)(struct RsClient * /*this*/, RS_PRIV_LEVEL); // virtual + NV_STATUS (*__clientFreeResource__)(struct RsClient * /*this*/, RsServer *, struct RS_RES_FREE_PARAMS_INTERNAL *); // virtual + NV_STATUS (*__clientDestructResourceRef__)(struct RsClient * /*this*/, RsServer *, struct RsResourceRef *); // virtual + NV_STATUS (*__clientUnmapMemory__)(struct RsClient * /*this*/, struct RsResourceRef *, struct RS_LOCK_INFO *, struct RsCpuMapping **, API_SECURITY_INFO *); // virtual + NV_STATUS (*__clientInterMap__)(struct RsClient * /*this*/, struct RsResourceRef *, struct RsResourceRef *, struct RS_INTER_MAP_PARAMS *); // virtual + NV_STATUS (*__clientInterUnmap__)(struct RsClient * /*this*/, struct RsResourceRef *, struct RS_INTER_UNMAP_PARAMS *); // virtual + NV_STATUS (*__clientValidateNewResourceHandle__)(struct RsClient * /*this*/, NvHandle, NvBool); // virtual + NV_STATUS (*__clientPostProcessPendingFreeList__)(struct RsClient * /*this*/, struct RsResourceRef **); // virtual + NV_STATUS (*__clientShareResource__)(struct RsClient * /*this*/, struct RsResourceRef *, RS_SHARE_POLICY *, struct CALL_CONTEXT *); // virtual + + // Data members NvHandle hClient; CLIENT_TYPE type; NvBool bActive; @@ -121,6 +141,7 @@ typedef struct RsClient RsClient; #define __nvoc_class_id_RsClient 0x8f87e5 #endif /* __nvoc_class_id_RsClient */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_RsClient; #define __staticCast_RsClient(pThis) \ @@ -133,90 +154,112 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_RsClient; ((RsClient*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(RsClient))) #endif //__nvoc_rs_client_h_disabled - NV_STATUS __nvoc_objCreateDynamic_RsClient(RsClient**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_RsClient(RsClient**, Dynamic*, NvU32, struct PORT_MEM_ALLOCATOR * arg_pAllocator, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_RsClient(ppNewObj, pParent, createFlags, arg_pAllocator, arg_pParams) \ __nvoc_objCreate_RsClient((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pAllocator, arg_pParams) + +// Wrapper macros +#define clientValidate_FNPTR(pClient) pClient->__clientValidate__ #define clientValidate(pClient, pSecInfo) clientValidate_DISPATCH(pClient, pSecInfo) +#define clientValidateLocks_FNPTR(pClient) pClient->__clientValidateLocks__ +#define clientValidateLocks(pClient, pServer, pClientEntry) clientValidateLocks_DISPATCH(pClient, pServer, pClientEntry) +#define clientGetCachedPrivilege_FNPTR(pClient) pClient->__clientGetCachedPrivilege__ #define clientGetCachedPrivilege(pClient) clientGetCachedPrivilege_DISPATCH(pClient) +#define clientIsAdmin_FNPTR(pClient) pClient->__clientIsAdmin__ #define clientIsAdmin(pClient, privLevel) clientIsAdmin_DISPATCH(pClient, privLevel) +#define clientFreeResource_FNPTR(pClient) pClient->__clientFreeResource__ #define clientFreeResource(pClient, pServer, pParams) clientFreeResource_DISPATCH(pClient, pServer, pParams) +#define clientDestructResourceRef_FNPTR(pClient) pClient->__clientDestructResourceRef__ #define clientDestructResourceRef(pClient, pServer, pResourceRef) clientDestructResourceRef_DISPATCH(pClient, pServer, pResourceRef) +#define clientUnmapMemory_FNPTR(pClient) pClient->__clientUnmapMemory__ #define clientUnmapMemory(pClient, pResourceRef, pLockInfo, ppCpuMapping, pSecInfo) clientUnmapMemory_DISPATCH(pClient, pResourceRef, pLockInfo, ppCpuMapping, pSecInfo) +#define clientInterMap_FNPTR(pClient) pClient->__clientInterMap__ #define clientInterMap(pClient, pMapperRef, pMappableRef, pParams) clientInterMap_DISPATCH(pClient, pMapperRef, pMappableRef, pParams) +#define clientInterUnmap_FNPTR(pClient) pClient->__clientInterUnmap__ #define clientInterUnmap(pClient, pMapperRef, pParams) clientInterUnmap_DISPATCH(pClient, pMapperRef, pParams) +#define clientValidateNewResourceHandle_FNPTR(pClient) pClient->__clientValidateNewResourceHandle__ #define clientValidateNewResourceHandle(pClient, hResource, bRestrict) clientValidateNewResourceHandle_DISPATCH(pClient, hResource, bRestrict) +#define clientPostProcessPendingFreeList_FNPTR(pClient) pClient->__clientPostProcessPendingFreeList__ #define clientPostProcessPendingFreeList(pClient, ppFirstLowPriRef) clientPostProcessPendingFreeList_DISPATCH(pClient, ppFirstLowPriRef) +#define clientShareResource_FNPTR(pClient) pClient->__clientShareResource__ #define clientShareResource(pClient, pResourceRef, pSharePolicy, pCallContext) clientShareResource_DISPATCH(pClient, pResourceRef, pSharePolicy, pCallContext) -NV_STATUS clientValidate_IMPL(struct RsClient *pClient, const API_SECURITY_INFO *pSecInfo); +// Dispatch functions static inline NV_STATUS clientValidate_DISPATCH(struct RsClient *pClient, const API_SECURITY_INFO *pSecInfo) { return pClient->__clientValidate__(pClient, pSecInfo); } -RS_PRIV_LEVEL clientGetCachedPrivilege_IMPL(struct RsClient *pClient); +static inline NV_STATUS clientValidateLocks_DISPATCH(struct RsClient *pClient, RsServer *pServer, const CLIENT_ENTRY *pClientEntry) { + return pClient->__clientValidateLocks__(pClient, pServer, pClientEntry); +} static inline RS_PRIV_LEVEL clientGetCachedPrivilege_DISPATCH(struct RsClient *pClient) { return pClient->__clientGetCachedPrivilege__(pClient); } -NvBool clientIsAdmin_IMPL(struct RsClient *pClient, RS_PRIV_LEVEL privLevel); - static inline NvBool clientIsAdmin_DISPATCH(struct RsClient *pClient, RS_PRIV_LEVEL privLevel) { return pClient->__clientIsAdmin__(pClient, privLevel); } -NV_STATUS clientFreeResource_IMPL(struct RsClient *pClient, RsServer *pServer, struct RS_RES_FREE_PARAMS_INTERNAL *pParams); - static inline NV_STATUS clientFreeResource_DISPATCH(struct RsClient *pClient, RsServer *pServer, struct RS_RES_FREE_PARAMS_INTERNAL *pParams) { return pClient->__clientFreeResource__(pClient, pServer, pParams); } -NV_STATUS clientDestructResourceRef_IMPL(struct RsClient *pClient, RsServer *pServer, struct RsResourceRef *pResourceRef); - static inline NV_STATUS clientDestructResourceRef_DISPATCH(struct RsClient *pClient, RsServer *pServer, struct RsResourceRef *pResourceRef) { return pClient->__clientDestructResourceRef__(pClient, pServer, pResourceRef); } -NV_STATUS clientUnmapMemory_IMPL(struct RsClient *pClient, struct RsResourceRef *pResourceRef, struct RS_LOCK_INFO *pLockInfo, struct RsCpuMapping **ppCpuMapping, API_SECURITY_INFO *pSecInfo); - static inline NV_STATUS clientUnmapMemory_DISPATCH(struct RsClient *pClient, struct RsResourceRef *pResourceRef, struct RS_LOCK_INFO *pLockInfo, struct RsCpuMapping **ppCpuMapping, API_SECURITY_INFO *pSecInfo) { return pClient->__clientUnmapMemory__(pClient, pResourceRef, pLockInfo, ppCpuMapping, pSecInfo); } -NV_STATUS clientInterMap_IMPL(struct RsClient *pClient, struct RsResourceRef *pMapperRef, struct RsResourceRef *pMappableRef, struct RS_INTER_MAP_PARAMS *pParams); - static inline NV_STATUS clientInterMap_DISPATCH(struct RsClient *pClient, struct RsResourceRef *pMapperRef, struct RsResourceRef *pMappableRef, struct RS_INTER_MAP_PARAMS *pParams) { return pClient->__clientInterMap__(pClient, pMapperRef, pMappableRef, pParams); } -NV_STATUS clientInterUnmap_IMPL(struct RsClient *pClient, struct RsResourceRef *pMapperRef, struct RS_INTER_UNMAP_PARAMS *pParams); - static inline NV_STATUS clientInterUnmap_DISPATCH(struct RsClient *pClient, struct RsResourceRef *pMapperRef, struct RS_INTER_UNMAP_PARAMS *pParams) { return pClient->__clientInterUnmap__(pClient, pMapperRef, pParams); } -NV_STATUS clientValidateNewResourceHandle_IMPL(struct RsClient *pClient, NvHandle hResource, NvBool bRestrict); - static inline NV_STATUS clientValidateNewResourceHandle_DISPATCH(struct RsClient *pClient, NvHandle hResource, NvBool bRestrict) { return pClient->__clientValidateNewResourceHandle__(pClient, hResource, bRestrict); } -NV_STATUS clientPostProcessPendingFreeList_IMPL(struct RsClient *pClient, struct RsResourceRef **ppFirstLowPriRef); - static inline NV_STATUS clientPostProcessPendingFreeList_DISPATCH(struct RsClient *pClient, struct RsResourceRef **ppFirstLowPriRef) { return pClient->__clientPostProcessPendingFreeList__(pClient, ppFirstLowPriRef); } -NV_STATUS clientShareResource_IMPL(struct RsClient *pClient, struct RsResourceRef *pResourceRef, RS_SHARE_POLICY *pSharePolicy, struct CALL_CONTEXT *pCallContext); - static inline NV_STATUS clientShareResource_DISPATCH(struct RsClient *pClient, struct RsResourceRef *pResourceRef, RS_SHARE_POLICY *pSharePolicy, struct CALL_CONTEXT *pCallContext) { return pClient->__clientShareResource__(pClient, pResourceRef, pSharePolicy, pCallContext); } +NV_STATUS clientValidate_IMPL(struct RsClient *pClient, const API_SECURITY_INFO *pSecInfo); + +NV_STATUS clientValidateLocks_IMPL(struct RsClient *pClient, RsServer *pServer, const CLIENT_ENTRY *pClientEntry); + +RS_PRIV_LEVEL clientGetCachedPrivilege_IMPL(struct RsClient *pClient); + +NvBool clientIsAdmin_IMPL(struct RsClient *pClient, RS_PRIV_LEVEL privLevel); + +NV_STATUS clientFreeResource_IMPL(struct RsClient *pClient, RsServer *pServer, struct RS_RES_FREE_PARAMS_INTERNAL *pParams); + +NV_STATUS clientDestructResourceRef_IMPL(struct RsClient *pClient, RsServer *pServer, struct RsResourceRef *pResourceRef); + +NV_STATUS clientUnmapMemory_IMPL(struct RsClient *pClient, struct RsResourceRef *pResourceRef, struct RS_LOCK_INFO *pLockInfo, struct RsCpuMapping **ppCpuMapping, API_SECURITY_INFO *pSecInfo); + +NV_STATUS clientInterMap_IMPL(struct RsClient *pClient, struct RsResourceRef *pMapperRef, struct RsResourceRef *pMappableRef, struct RS_INTER_MAP_PARAMS *pParams); + +NV_STATUS clientInterUnmap_IMPL(struct RsClient *pClient, struct RsResourceRef *pMapperRef, struct RS_INTER_UNMAP_PARAMS *pParams); + +NV_STATUS clientValidateNewResourceHandle_IMPL(struct RsClient *pClient, NvHandle hResource, NvBool bRestrict); + +NV_STATUS clientPostProcessPendingFreeList_IMPL(struct RsClient *pClient, struct RsResourceRef **ppFirstLowPriRef); + +NV_STATUS clientShareResource_IMPL(struct RsClient *pClient, struct RsResourceRef *pResourceRef, RS_SHARE_POLICY *pSharePolicy, struct CALL_CONTEXT *pCallContext); + NV_STATUS clientConstruct_IMPL(struct RsClient *arg_pClient, struct PORT_MEM_ALLOCATOR *arg_pAllocator, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_clientConstruct(arg_pClient, arg_pAllocator, arg_pParams) clientConstruct_IMPL(arg_pClient, arg_pAllocator, arg_pParams) @@ -476,30 +519,41 @@ NV_STATUS clientUnmapResourceRefMappings(struct RsClient *pClient, CALL_CONTEXT #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct RsClientResource { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RsResource __nvoc_base_RsResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RsClientResource *__nvoc_pbase_RsClientResource; - NvBool (*__clientresShareCallback__)(struct RsClientResource *, struct RsClient *, RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__clientresControl__)(struct RsClientResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__clientresUnmap__)(struct RsClientResource *, struct CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__clientresMapTo__)(struct RsClientResource *, RS_RES_MAP_TO_PARAMS *); - NvU32 (*__clientresGetRefCount__)(struct RsClientResource *); - NV_STATUS (*__clientresControlFilter__)(struct RsClientResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__clientresAddAdditionalDependants__)(struct RsClient *, struct RsClientResource *, RsResourceRef *); - NV_STATUS (*__clientresControlSerialization_Prologue__)(struct RsClientResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__clientresCanCopy__)(struct RsClientResource *); - NV_STATUS (*__clientresControl_Prologue__)(struct RsClientResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__clientresIsPartialUnmapSupported__)(struct RsClientResource *); - void (*__clientresPreDestruct__)(struct RsClientResource *); - NV_STATUS (*__clientresUnmapFrom__)(struct RsClientResource *, RS_RES_UNMAP_FROM_PARAMS *); - NV_STATUS (*__clientresIsDuplicate__)(struct RsClientResource *, NvHandle, NvBool *); - void (*__clientresControlSerialization_Epilogue__)(struct RsClientResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__clientresControl_Epilogue__)(struct RsClientResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__clientresMap__)(struct RsClientResource *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__clientresAccessCallback__)(struct RsClientResource *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct RsResource *__nvoc_pbase_RsResource; // res super + struct RsClientResource *__nvoc_pbase_RsClientResource; // clientres + + // Vtable with 18 per-object function pointers + NvBool (*__clientresCanCopy__)(struct RsClientResource * /*this*/); // virtual inherited (res) base (res) + NV_STATUS (*__clientresIsDuplicate__)(struct RsClientResource * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (res) + void (*__clientresPreDestruct__)(struct RsClientResource * /*this*/); // virtual inherited (res) base (res) + NV_STATUS (*__clientresControl__)(struct RsClientResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (res) + NV_STATUS (*__clientresControlFilter__)(struct RsClientResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (res) + NV_STATUS (*__clientresControlSerialization_Prologue__)(struct RsClientResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (res) + void (*__clientresControlSerialization_Epilogue__)(struct RsClientResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (res) + NV_STATUS (*__clientresControl_Prologue__)(struct RsClientResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (res) + void (*__clientresControl_Epilogue__)(struct RsClientResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (res) + NV_STATUS (*__clientresMap__)(struct RsClientResource * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (res) + NV_STATUS (*__clientresUnmap__)(struct RsClientResource * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (res) + NvBool (*__clientresIsPartialUnmapSupported__)(struct RsClientResource * /*this*/); // inline virtual inherited (res) base (res) body + NV_STATUS (*__clientresMapTo__)(struct RsClientResource * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (res) + NV_STATUS (*__clientresUnmapFrom__)(struct RsClientResource * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (res) + NvU32 (*__clientresGetRefCount__)(struct RsClientResource * /*this*/); // virtual inherited (res) base (res) + NvBool (*__clientresAccessCallback__)(struct RsClientResource * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (res) base (res) + NvBool (*__clientresShareCallback__)(struct RsClientResource * /*this*/, struct RsClient *, RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (res) base (res) + void (*__clientresAddAdditionalDependants__)(struct RsClient *, struct RsClientResource * /*this*/, RsResourceRef *); // virtual inherited (res) base (res) + + // Data members struct RsClient *pClient; }; @@ -512,6 +566,7 @@ typedef struct RsClientResource RsClientResource; #define __nvoc_class_id_RsClientResource 0x083442 #endif /* __nvoc_class_id_RsClientResource */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_RsClientResource; #define __staticCast_RsClientResource(pThis) \ @@ -524,103 +579,124 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_RsClientResource; ((RsClientResource*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(RsClientResource))) #endif //__nvoc_rs_client_h_disabled - NV_STATUS __nvoc_objCreateDynamic_RsClientResource(RsClientResource**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_RsClientResource(RsClientResource**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_RsClientResource(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_RsClientResource((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) -#define clientresShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) clientresShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) + +// Wrapper macros +#define clientresCanCopy_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resCanCopy__ +#define clientresCanCopy(pResource) clientresCanCopy_DISPATCH(pResource) +#define clientresIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resIsDuplicate__ +#define clientresIsDuplicate(pResource, hMemory, pDuplicate) clientresIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define clientresPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resPreDestruct__ +#define clientresPreDestruct(pResource) clientresPreDestruct_DISPATCH(pResource) +#define clientresControl_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resControl__ #define clientresControl(pResource, pCallContext, pParams) clientresControl_DISPATCH(pResource, pCallContext, pParams) -#define clientresUnmap(pResource, pCallContext, pCpuMapping) clientresUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define clientresMapTo(pResource, pParams) clientresMapTo_DISPATCH(pResource, pParams) -#define clientresGetRefCount(pResource) clientresGetRefCount_DISPATCH(pResource) +#define clientresControlFilter_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resControlFilter__ #define clientresControlFilter(pResource, pCallContext, pParams) clientresControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define clientresAddAdditionalDependants(pClient, pResource, pReference) clientresAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define clientresControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resControlSerialization_Prologue__ #define clientresControlSerialization_Prologue(pResource, pCallContext, pParams) clientresControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define clientresCanCopy(pResource) clientresCanCopy_DISPATCH(pResource) -#define clientresControl_Prologue(pResource, pCallContext, pParams) clientresControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define clientresIsPartialUnmapSupported(pResource) clientresIsPartialUnmapSupported_DISPATCH(pResource) -#define clientresPreDestruct(pResource) clientresPreDestruct_DISPATCH(pResource) -#define clientresUnmapFrom(pResource, pParams) clientresUnmapFrom_DISPATCH(pResource, pParams) -#define clientresIsDuplicate(pResource, hMemory, pDuplicate) clientresIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define clientresControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resControlSerialization_Epilogue__ #define clientresControlSerialization_Epilogue(pResource, pCallContext, pParams) clientresControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define clientresControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resControl_Prologue__ +#define clientresControl_Prologue(pResource, pCallContext, pParams) clientresControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define clientresControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resControl_Epilogue__ #define clientresControl_Epilogue(pResource, pCallContext, pParams) clientresControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define clientresMap_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resMap__ #define clientresMap(pResource, pCallContext, pParams, pCpuMapping) clientresMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define clientresUnmap_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resUnmap__ +#define clientresUnmap(pResource, pCallContext, pCpuMapping) clientresUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define clientresIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define clientresIsPartialUnmapSupported(pResource) clientresIsPartialUnmapSupported_DISPATCH(pResource) +#define clientresMapTo_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resMapTo__ +#define clientresMapTo(pResource, pParams) clientresMapTo_DISPATCH(pResource, pParams) +#define clientresUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resUnmapFrom__ +#define clientresUnmapFrom(pResource, pParams) clientresUnmapFrom_DISPATCH(pResource, pParams) +#define clientresGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resGetRefCount__ +#define clientresGetRefCount(pResource) clientresGetRefCount_DISPATCH(pResource) +#define clientresAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resAccessCallback__ #define clientresAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) clientresAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -static inline NvBool clientresShareCallback_DISPATCH(struct RsClientResource *pResource, struct RsClient *pInvokingClient, RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__clientresShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} +#define clientresShareCallback_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resShareCallback__ +#define clientresShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) clientresShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define clientresAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define clientresAddAdditionalDependants(pClient, pResource, pReference) clientresAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -static inline NV_STATUS clientresControl_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__clientresControl__(pResource, pCallContext, pParams); +// Dispatch functions +static inline NvBool clientresCanCopy_DISPATCH(struct RsClientResource *pResource) { + return pResource->__clientresCanCopy__(pResource); } -static inline NV_STATUS clientresUnmap_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__clientresUnmap__(pResource, pCallContext, pCpuMapping); +static inline NV_STATUS clientresIsDuplicate_DISPATCH(struct RsClientResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__clientresIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS clientresMapTo_DISPATCH(struct RsClientResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__clientresMapTo__(pResource, pParams); +static inline void clientresPreDestruct_DISPATCH(struct RsClientResource *pResource) { + pResource->__clientresPreDestruct__(pResource); } -static inline NvU32 clientresGetRefCount_DISPATCH(struct RsClientResource *pResource) { - return pResource->__clientresGetRefCount__(pResource); +static inline NV_STATUS clientresControl_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__clientresControl__(pResource, pCallContext, pParams); } static inline NV_STATUS clientresControlFilter_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__clientresControlFilter__(pResource, pCallContext, pParams); } -static inline void clientresAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct RsClientResource *pResource, RsResourceRef *pReference) { - pResource->__clientresAddAdditionalDependants__(pClient, pResource, pReference); -} - static inline NV_STATUS clientresControlSerialization_Prologue_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__clientresControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool clientresCanCopy_DISPATCH(struct RsClientResource *pResource) { - return pResource->__clientresCanCopy__(pResource); +static inline void clientresControlSerialization_Epilogue_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__clientresControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS clientresControl_Prologue_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__clientresControl_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool clientresIsPartialUnmapSupported_DISPATCH(struct RsClientResource *pResource) { - return pResource->__clientresIsPartialUnmapSupported__(pResource); +static inline void clientresControl_Epilogue_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__clientresControl_Epilogue__(pResource, pCallContext, pParams); } -static inline void clientresPreDestruct_DISPATCH(struct RsClientResource *pResource) { - pResource->__clientresPreDestruct__(pResource); +static inline NV_STATUS clientresMap_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__clientresMap__(pResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS clientresUnmapFrom_DISPATCH(struct RsClientResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__clientresUnmapFrom__(pResource, pParams); +static inline NV_STATUS clientresUnmap_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pResource->__clientresUnmap__(pResource, pCallContext, pCpuMapping); } -static inline NV_STATUS clientresIsDuplicate_DISPATCH(struct RsClientResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__clientresIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NvBool clientresIsPartialUnmapSupported_DISPATCH(struct RsClientResource *pResource) { + return pResource->__clientresIsPartialUnmapSupported__(pResource); } -static inline void clientresControlSerialization_Epilogue_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__clientresControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS clientresMapTo_DISPATCH(struct RsClientResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__clientresMapTo__(pResource, pParams); } -static inline void clientresControl_Epilogue_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__clientresControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS clientresUnmapFrom_DISPATCH(struct RsClientResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__clientresUnmapFrom__(pResource, pParams); } -static inline NV_STATUS clientresMap_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__clientresMap__(pResource, pCallContext, pParams, pCpuMapping); +static inline NvU32 clientresGetRefCount_DISPATCH(struct RsClientResource *pResource) { + return pResource->__clientresGetRefCount__(pResource); } static inline NvBool clientresAccessCallback_DISPATCH(struct RsClientResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return pResource->__clientresAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } +static inline NvBool clientresShareCallback_DISPATCH(struct RsClientResource *pResource, struct RsClient *pInvokingClient, RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__clientresShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); +} + +static inline void clientresAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct RsClientResource *pResource, RsResourceRef *pReference) { + pResource->__clientresAddAdditionalDependants__(pClient, pResource, pReference); +} + NV_STATUS clientresConstruct_IMPL(struct RsClientResource *arg_pClientRes, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_clientresConstruct(arg_pClientRes, arg_pCallContext, arg_pParams) clientresConstruct_IMPL(arg_pClientRes, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_rs_resource_nvoc.c b/src/nvidia/generated/g_rs_resource_nvoc.c index 4e39eb81ff..9c3baf9131 100644 --- a/src/nvidia/generated/g_rs_resource_nvoc.c +++ b/src/nvidia/generated/g_rs_resource_nvoc.c @@ -93,47 +93,70 @@ NV_STATUS __nvoc_ctor_RsResource(RsResource *pThis, struct CALL_CONTEXT * arg_pC return status; } +// Vtable initialization static void __nvoc_init_funcTable_RsResource_1(RsResource *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // resCanCopy -- virtual pThis->__resCanCopy__ = &resCanCopy_IMPL; + // resIsDuplicate -- virtual pThis->__resIsDuplicate__ = &resIsDuplicate_IMPL; + // resPreDestruct -- virtual pThis->__resPreDestruct__ = &resPreDestruct_IMPL; + // resControl -- virtual pThis->__resControl__ = &resControl_IMPL; + // resControlFilter -- virtual pThis->__resControlFilter__ = &resControlFilter_IMPL; + // resControlSerialization_Prologue -- virtual pThis->__resControlSerialization_Prologue__ = &resControlSerialization_Prologue_IMPL; + // resControlSerialization_Epilogue -- virtual pThis->__resControlSerialization_Epilogue__ = &resControlSerialization_Epilogue_IMPL; + // resControl_Prologue -- virtual pThis->__resControl_Prologue__ = &resControl_Prologue_IMPL; + // resControl_Epilogue -- virtual pThis->__resControl_Epilogue__ = &resControl_Epilogue_IMPL; + // resMap -- virtual pThis->__resMap__ = &resMap_IMPL; + // resUnmap -- virtual pThis->__resUnmap__ = &resUnmap_IMPL; + // resIsPartialUnmapSupported -- inline virtual body pThis->__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_bf6dfa; + // resMapTo -- virtual pThis->__resMapTo__ = &resMapTo_IMPL; + // resUnmapFrom -- virtual pThis->__resUnmapFrom__ = &resUnmapFrom_IMPL; + // resGetRefCount -- virtual pThis->__resGetRefCount__ = &resGetRefCount_IMPL; + // resAccessCallback -- virtual pThis->__resAccessCallback__ = &resAccessCallback_IMPL; + // resShareCallback -- virtual pThis->__resShareCallback__ = &resShareCallback_IMPL; + // resAddAdditionalDependants -- virtual pThis->__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL; -} +} // End __nvoc_init_funcTable_RsResource_1 with approximately 18 basic block(s). + +// Initialize vtable(s) for 18 virtual method(s). void __nvoc_init_funcTable_RsResource(RsResource *pThis) { + + // Initialize vtable(s) with 18 per-object function pointer(s). __nvoc_init_funcTable_RsResource_1(pThis); } diff --git a/src/nvidia/generated/g_rs_resource_nvoc.h b/src/nvidia/generated/g_rs_resource_nvoc.h index 19acdc00fc..4b7be6951e 100644 --- a/src/nvidia/generated/g_rs_resource_nvoc.h +++ b/src/nvidia/generated/g_rs_resource_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_RS_RESOURCE_NVOC_H_ #define _G_RS_RESOURCE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_rs_resource_nvoc.h" #ifndef _RS_RESOURCE_H_ @@ -43,6 +51,7 @@ extern "C" { extern "C" { #endif + struct RsSession; #ifndef __NVOC_CLASS_RsSession_TYPEDEF__ @@ -170,6 +179,7 @@ struct RS_RES_FREE_PARAMS_INTERNAL }; struct NVOC_EXPORTED_METHOD_DEF; + struct OBJGPU; #ifndef __NVOC_CLASS_OBJGPU_TYPEDEF__ @@ -182,6 +192,7 @@ typedef struct OBJGPU OBJGPU; #endif /* __nvoc_class_id_OBJGPU */ + struct OBJGPUGRP; #ifndef __NVOC_CLASS_OBJGPUGRP_TYPEDEF__ @@ -245,29 +256,40 @@ struct RS_RES_DTOR_PARAMS #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct RsResource { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - NvBool (*__resCanCopy__)(struct RsResource *); - NV_STATUS (*__resIsDuplicate__)(struct RsResource *, NvHandle, NvBool *); - void (*__resPreDestruct__)(struct RsResource *); - NV_STATUS (*__resControl__)(struct RsResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__resControlFilter__)(struct RsResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__resControlSerialization_Prologue__)(struct RsResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__resControlSerialization_Epilogue__)(struct RsResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__resControl_Prologue__)(struct RsResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__resControl_Epilogue__)(struct RsResource *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__resMap__)(struct RsResource *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NV_STATUS (*__resUnmap__)(struct RsResource *, struct CALL_CONTEXT *, RsCpuMapping *); - NvBool (*__resIsPartialUnmapSupported__)(struct RsResource *); - NV_STATUS (*__resMapTo__)(struct RsResource *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__resUnmapFrom__)(struct RsResource *, RS_RES_UNMAP_FROM_PARAMS *); - NvU32 (*__resGetRefCount__)(struct RsResource *); - NvBool (*__resAccessCallback__)(struct RsResource *, struct RsClient *, void *, RsAccessRight); - NvBool (*__resShareCallback__)(struct RsResource *, struct RsClient *, RsResourceRef *, RS_SHARE_POLICY *); - void (*__resAddAdditionalDependants__)(struct RsClient *, struct RsResource *, RsResourceRef *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct RsResource *__nvoc_pbase_RsResource; // res + + // Vtable with 18 per-object function pointers + NvBool (*__resCanCopy__)(struct RsResource * /*this*/); // virtual + NV_STATUS (*__resIsDuplicate__)(struct RsResource * /*this*/, NvHandle, NvBool *); // virtual + void (*__resPreDestruct__)(struct RsResource * /*this*/); // virtual + NV_STATUS (*__resControl__)(struct RsResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual + NV_STATUS (*__resControlFilter__)(struct RsResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual + NV_STATUS (*__resControlSerialization_Prologue__)(struct RsResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual + void (*__resControlSerialization_Epilogue__)(struct RsResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual + NV_STATUS (*__resControl_Prologue__)(struct RsResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual + void (*__resControl_Epilogue__)(struct RsResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual + NV_STATUS (*__resMap__)(struct RsResource * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual + NV_STATUS (*__resUnmap__)(struct RsResource * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual + NvBool (*__resIsPartialUnmapSupported__)(struct RsResource * /*this*/); // inline virtual body + NV_STATUS (*__resMapTo__)(struct RsResource * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual + NV_STATUS (*__resUnmapFrom__)(struct RsResource * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual + NvU32 (*__resGetRefCount__)(struct RsResource * /*this*/); // virtual + NvBool (*__resAccessCallback__)(struct RsResource * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual + NvBool (*__resShareCallback__)(struct RsResource * /*this*/, struct RsClient *, RsResourceRef *, RS_SHARE_POLICY *); // virtual + void (*__resAddAdditionalDependants__)(struct RsClient *, struct RsResource * /*this*/, RsResourceRef *); // virtual + + // Data members RsResourceRef *pResourceRef; struct RS_RES_DTOR_PARAMS dtorParams; NvBool bConstructed; @@ -282,6 +304,7 @@ typedef struct RsResource RsResource; #define __nvoc_class_id_RsResource 0xd551cb #endif /* __nvoc_class_id_RsResource */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_RsResource; #define __staticCast_RsResource(pThis) \ @@ -294,141 +317,162 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_RsResource; ((RsResource*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(RsResource))) #endif //__nvoc_rs_resource_h_disabled - NV_STATUS __nvoc_objCreateDynamic_RsResource(RsResource**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_RsResource(RsResource**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_RsResource(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_RsResource((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define resCanCopy_FNPTR(pResource) pResource->__resCanCopy__ #define resCanCopy(pResource) resCanCopy_DISPATCH(pResource) +#define resIsDuplicate_FNPTR(pResource) pResource->__resIsDuplicate__ #define resIsDuplicate(pResource, hMemory, pDuplicate) resIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define resPreDestruct_FNPTR(pResource) pResource->__resPreDestruct__ #define resPreDestruct(pResource) resPreDestruct_DISPATCH(pResource) +#define resControl_FNPTR(pResource) pResource->__resControl__ #define resControl(pResource, pCallContext, pParams) resControl_DISPATCH(pResource, pCallContext, pParams) +#define resControlFilter_FNPTR(pResource) pResource->__resControlFilter__ #define resControlFilter(pResource, pCallContext, pParams) resControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define resControlSerialization_Prologue_FNPTR(pResource) pResource->__resControlSerialization_Prologue__ #define resControlSerialization_Prologue(pResource, pCallContext, pParams) resControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define resControlSerialization_Epilogue_FNPTR(pResource) pResource->__resControlSerialization_Epilogue__ #define resControlSerialization_Epilogue(pResource, pCallContext, pParams) resControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define resControl_Prologue_FNPTR(pResource) pResource->__resControl_Prologue__ #define resControl_Prologue(pResource, pCallContext, pParams) resControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define resControl_Epilogue_FNPTR(pResource) pResource->__resControl_Epilogue__ #define resControl_Epilogue(pResource, pCallContext, pParams) resControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define resMap_FNPTR(pResource) pResource->__resMap__ #define resMap(pResource, pCallContext, pParams, pCpuMapping) resMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define resUnmap_FNPTR(pResource) pResource->__resUnmap__ #define resUnmap(pResource, pCallContext, pCpuMapping) resUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define resIsPartialUnmapSupported_FNPTR(pResource) pResource->__resIsPartialUnmapSupported__ #define resIsPartialUnmapSupported(pResource) resIsPartialUnmapSupported_DISPATCH(pResource) +#define resMapTo_FNPTR(pResource) pResource->__resMapTo__ #define resMapTo(pResource, pParams) resMapTo_DISPATCH(pResource, pParams) +#define resUnmapFrom_FNPTR(pResource) pResource->__resUnmapFrom__ #define resUnmapFrom(pResource, pParams) resUnmapFrom_DISPATCH(pResource, pParams) +#define resGetRefCount_FNPTR(pResource) pResource->__resGetRefCount__ #define resGetRefCount(pResource) resGetRefCount_DISPATCH(pResource) +#define resAccessCallback_FNPTR(pResource) pResource->__resAccessCallback__ #define resAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) resAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define resShareCallback_FNPTR(pResource) pResource->__resShareCallback__ #define resShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) resShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define resAddAdditionalDependants_FNPTR(pResource) pResource->__resAddAdditionalDependants__ #define resAddAdditionalDependants(pClient, pResource, pReference) resAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -NvBool resCanCopy_IMPL(struct RsResource *pResource); +// Dispatch functions static inline NvBool resCanCopy_DISPATCH(struct RsResource *pResource) { return pResource->__resCanCopy__(pResource); } -NV_STATUS resIsDuplicate_IMPL(struct RsResource *pResource, NvHandle hMemory, NvBool *pDuplicate); - static inline NV_STATUS resIsDuplicate_DISPATCH(struct RsResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { return pResource->__resIsDuplicate__(pResource, hMemory, pDuplicate); } -void resPreDestruct_IMPL(struct RsResource *pResource); - static inline void resPreDestruct_DISPATCH(struct RsResource *pResource) { pResource->__resPreDestruct__(pResource); } -NV_STATUS resControl_IMPL(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline NV_STATUS resControl_DISPATCH(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__resControl__(pResource, pCallContext, pParams); } -NV_STATUS resControlFilter_IMPL(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline NV_STATUS resControlFilter_DISPATCH(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__resControlFilter__(pResource, pCallContext, pParams); } -NV_STATUS resControlSerialization_Prologue_IMPL(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline NV_STATUS resControlSerialization_Prologue_DISPATCH(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__resControlSerialization_Prologue__(pResource, pCallContext, pParams); } -void resControlSerialization_Epilogue_IMPL(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline void resControlSerialization_Epilogue_DISPATCH(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { pResource->__resControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -NV_STATUS resControl_Prologue_IMPL(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline NV_STATUS resControl_Prologue_DISPATCH(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__resControl_Prologue__(pResource, pCallContext, pParams); } -void resControl_Epilogue_IMPL(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline void resControl_Epilogue_DISPATCH(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { pResource->__resControl_Epilogue__(pResource, pCallContext, pParams); } -NV_STATUS resMap_IMPL(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); - static inline NV_STATUS resMap_DISPATCH(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return pResource->__resMap__(pResource, pCallContext, pParams, pCpuMapping); } -NV_STATUS resUnmap_IMPL(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); - static inline NV_STATUS resUnmap_DISPATCH(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return pResource->__resUnmap__(pResource, pCallContext, pCpuMapping); } -static inline NvBool resIsPartialUnmapSupported_bf6dfa(struct RsResource *pResource) { - return ((NvBool)(0 != 0)); -} - static inline NvBool resIsPartialUnmapSupported_DISPATCH(struct RsResource *pResource) { return pResource->__resIsPartialUnmapSupported__(pResource); } -NV_STATUS resMapTo_IMPL(struct RsResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); - static inline NV_STATUS resMapTo_DISPATCH(struct RsResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return pResource->__resMapTo__(pResource, pParams); } -NV_STATUS resUnmapFrom_IMPL(struct RsResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); - static inline NV_STATUS resUnmapFrom_DISPATCH(struct RsResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return pResource->__resUnmapFrom__(pResource, pParams); } -NvU32 resGetRefCount_IMPL(struct RsResource *pResource); - static inline NvU32 resGetRefCount_DISPATCH(struct RsResource *pResource) { return pResource->__resGetRefCount__(pResource); } -NvBool resAccessCallback_IMPL(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); - static inline NvBool resAccessCallback_DISPATCH(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return pResource->__resAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -NvBool resShareCallback_IMPL(struct RsResource *pResource, struct RsClient *pInvokingClient, RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); - static inline NvBool resShareCallback_DISPATCH(struct RsResource *pResource, struct RsClient *pInvokingClient, RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return pResource->__resShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } -void resAddAdditionalDependants_IMPL(struct RsClient *pClient, struct RsResource *pResource, RsResourceRef *pReference); - static inline void resAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct RsResource *pResource, RsResourceRef *pReference) { pResource->__resAddAdditionalDependants__(pClient, pResource, pReference); } +NvBool resCanCopy_IMPL(struct RsResource *pResource); + +NV_STATUS resIsDuplicate_IMPL(struct RsResource *pResource, NvHandle hMemory, NvBool *pDuplicate); + +void resPreDestruct_IMPL(struct RsResource *pResource); + +NV_STATUS resControl_IMPL(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +NV_STATUS resControlFilter_IMPL(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +NV_STATUS resControlSerialization_Prologue_IMPL(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +void resControlSerialization_Epilogue_IMPL(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +NV_STATUS resControl_Prologue_IMPL(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +void resControl_Epilogue_IMPL(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +NV_STATUS resMap_IMPL(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); + +NV_STATUS resUnmap_IMPL(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); + +static inline NvBool resIsPartialUnmapSupported_bf6dfa(struct RsResource *pResource) { + return ((NvBool)(0 != 0)); +} + +NV_STATUS resMapTo_IMPL(struct RsResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); + +NV_STATUS resUnmapFrom_IMPL(struct RsResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); + +NvU32 resGetRefCount_IMPL(struct RsResource *pResource); + +NvBool resAccessCallback_IMPL(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); + +NvBool resShareCallback_IMPL(struct RsResource *pResource, struct RsClient *pInvokingClient, RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); + +void resAddAdditionalDependants_IMPL(struct RsClient *pClient, struct RsResource *pResource, RsResourceRef *pReference); + NV_STATUS resConstruct_IMPL(struct RsResource *arg_pResource, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_resConstruct(arg_pResource, arg_pCallContext, arg_pParams) resConstruct_IMPL(arg_pResource, arg_pCallContext, arg_pParams) @@ -473,6 +517,7 @@ static inline NV_STATUS resControlLookup(struct RsResource *pResource, struct RS /* @} */ + struct OBJGPU; #ifndef __NVOC_CLASS_OBJGPU_TYPEDEF__ diff --git a/src/nvidia/generated/g_rs_server_nvoc.c b/src/nvidia/generated/g_rs_server_nvoc.c index 8e5f578ea2..e279a428f3 100644 --- a/src/nvidia/generated/g_rs_server_nvoc.c +++ b/src/nvidia/generated/g_rs_server_nvoc.c @@ -93,10 +93,13 @@ NV_STATUS __nvoc_ctor_RsShared(RsShared *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_RsShared_1(RsShared *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_RsShared_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_RsShared(RsShared *pThis) { __nvoc_init_funcTable_RsShared_1(pThis); } @@ -270,15 +273,22 @@ NV_STATUS __nvoc_ctor_RsSession(RsSession *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_RsSession_1(RsSession *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // sessionRemoveDependant -- virtual pThis->__sessionRemoveDependant__ = &sessionRemoveDependant_IMPL; + // sessionRemoveDependency -- virtual pThis->__sessionRemoveDependency__ = &sessionRemoveDependency_IMPL; -} +} // End __nvoc_init_funcTable_RsSession_1 with approximately 2 basic block(s). + +// Initialize vtable(s) for 2 virtual method(s). void __nvoc_init_funcTable_RsSession(RsSession *pThis) { + + // Initialize vtable(s) with 2 per-object function pointer(s). __nvoc_init_funcTable_RsSession_1(pThis); } diff --git a/src/nvidia/generated/g_rs_server_nvoc.h b/src/nvidia/generated/g_rs_server_nvoc.h index bf7ad94e62..a42645cf9c 100644 --- a/src/nvidia/generated/g_rs_server_nvoc.h +++ b/src/nvidia/generated/g_rs_server_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_RS_SERVER_NVOC_H_ #define _G_RS_SERVER_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_rs_server_nvoc.h" #ifndef _RS_SERVER_H_ @@ -43,6 +51,12 @@ extern "C" { extern "C" { #endif +enum CLIENT_LOCK_TYPE +{ + CLIENT_LOCK_SPECIFIC, // For locking specific RM clients encoded in the API + CLIENT_LOCK_ALL // For locking all RM clients currently in use +}; + /** * @defgroup RsServer * @addtogroup RsServer @@ -57,12 +71,18 @@ struct CLIENT_ENTRY struct RsClient *pClient; NvHandle hClient; NvU64 lockOwnerTid; ///< Thread id of the lock owner + NvU32 refCount; + NvBool bPendingFree; + ListNode node; #if LOCK_VAL_ENABLED LOCK_VAL_LOCK lockVal; #endif }; +MAKE_INTRUSIVE_LIST(RsClientList, CLIENT_ENTRY, node); +MAKE_LIST(RsLockedClientList, CLIENT_ENTRY*); + /** * Base-class for objects that are shared among multiple * RsResources (including RsResources from other clients) @@ -77,11 +97,20 @@ struct CLIENT_ENTRY #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct RsShared { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct RsShared *__nvoc_pbase_RsShared; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct RsShared *__nvoc_pbase_RsShared; // shr + + // Data members NvS32 refCount; struct MapNode node; }; @@ -95,6 +124,7 @@ typedef struct RsShared RsShared; #define __nvoc_class_id_RsShared 0x830542 #endif /* __nvoc_class_id_RsShared */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_RsShared; #define __staticCast_RsShared(pThis) \ @@ -107,13 +137,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_RsShared; ((RsShared*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(RsShared))) #endif //__nvoc_rs_server_h_disabled - NV_STATUS __nvoc_objCreateDynamic_RsShared(RsShared**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_RsShared(RsShared**, Dynamic*, NvU32); #define __objCreate_RsShared(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_RsShared((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS shrConstruct_IMPL(struct RsShared *arg_pShared); #define __nvoc_shrConstruct(arg_pShared) shrConstruct_IMPL(arg_pShared) @@ -140,14 +173,25 @@ MAKE_INTRUSIVE_MAP(RsSharedMap, RsShared, node); #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct RsSession { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RsShared __nvoc_base_RsShared; - struct Object *__nvoc_pbase_Object; - struct RsShared *__nvoc_pbase_RsShared; - struct RsSession *__nvoc_pbase_RsSession; - void (*__sessionRemoveDependant__)(struct RsSession *, struct RsResourceRef *); - void (*__sessionRemoveDependency__)(struct RsSession *, struct RsResourceRef *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct RsShared *__nvoc_pbase_RsShared; // shr super + struct RsSession *__nvoc_pbase_RsSession; // session + + // Vtable with 2 per-object function pointers + void (*__sessionRemoveDependant__)(struct RsSession * /*this*/, struct RsResourceRef *); // virtual + void (*__sessionRemoveDependency__)(struct RsSession * /*this*/, struct RsResourceRef *); // virtual + + // Data members PORT_RWLOCK *pLock; NvBool bValid; RsResourceRefList dependencies; @@ -163,6 +207,7 @@ typedef struct RsSession RsSession; #define __nvoc_class_id_RsSession 0x830d90 #endif /* __nvoc_class_id_RsSession */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_RsSession; #define __staticCast_RsSession(pThis) \ @@ -175,27 +220,32 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_RsSession; ((RsSession*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(RsSession))) #endif //__nvoc_rs_server_h_disabled - NV_STATUS __nvoc_objCreateDynamic_RsSession(RsSession**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_RsSession(RsSession**, Dynamic*, NvU32); #define __objCreate_RsSession(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_RsSession((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define sessionRemoveDependant_FNPTR(pSession) pSession->__sessionRemoveDependant__ #define sessionRemoveDependant(pSession, pResourceRef) sessionRemoveDependant_DISPATCH(pSession, pResourceRef) +#define sessionRemoveDependency_FNPTR(pSession) pSession->__sessionRemoveDependency__ #define sessionRemoveDependency(pSession, pResourceRef) sessionRemoveDependency_DISPATCH(pSession, pResourceRef) -void sessionRemoveDependant_IMPL(struct RsSession *pSession, struct RsResourceRef *pResourceRef); +// Dispatch functions static inline void sessionRemoveDependant_DISPATCH(struct RsSession *pSession, struct RsResourceRef *pResourceRef) { pSession->__sessionRemoveDependant__(pSession, pResourceRef); } -void sessionRemoveDependency_IMPL(struct RsSession *pSession, struct RsResourceRef *pResourceRef); - static inline void sessionRemoveDependency_DISPATCH(struct RsSession *pSession, struct RsResourceRef *pResourceRef) { pSession->__sessionRemoveDependency__(pSession, pResourceRef); } +void sessionRemoveDependant_IMPL(struct RsSession *pSession, struct RsResourceRef *pResourceRef); + +void sessionRemoveDependency_IMPL(struct RsSession *pSession, struct RsResourceRef *pResourceRef); + NV_STATUS sessionConstruct_IMPL(struct RsSession *arg_pSession); #define __nvoc_sessionConstruct(arg_pSession) sessionConstruct_IMPL(arg_pSession) @@ -282,7 +332,7 @@ struct RsServer NvBool bConstructed; ///< Determines whether the server is ready to be used PORT_MEM_ALLOCATOR *pAllocator; ///< Allocator to use for all objects allocated by the server - PORT_RWLOCK *pClientListLock; ///< Lock that needs to be taken when accessing the client list + PORT_SPINLOCK *pClientListLock; ///< Lock that needs to be taken when accessing the client list PORT_SPINLOCK *pShareMapLock; ///< Lock that needs to be taken when accessing the shared resource map RsSharedMap shareMap; ///< Map of shared resources @@ -314,6 +364,11 @@ struct RsServer */ NvBool bRsAccessEnabled; + /** + * Set to thread ID of the thread that locked all clients. + */ + NvU64 allClientLockOwnerTid; + /** * Mask of interfaces (RS_API_*) that will use a read-only top lock by default */ @@ -334,6 +389,16 @@ struct RsServer RsDisabledClientList disabledClientList; struct RsClient *pNextDisabledClient; PORT_SPINLOCK *pDisabledClientListLock; + + /** + * List of client entries locked by serverLockAllClients + * This list is required for locking all clients in order to avoid races with + * other paths creating/destroying paths in parallel WITHOUT holding the API lock. + * Ideally, there shouldn't be any other such paths but the RTD3/PM path does do + * this. CORERM-6052 tracks investigating that and potentially fixing the locking + * there. + */ + RsLockedClientList lockedClientList; }; /** @@ -745,6 +810,23 @@ extern NV_STATUS serverResLock_Prologue(RsServer *pServer, LOCK_ACCESS_TYPE acce */ extern void serverResLock_Epilogue(RsServer *pServer, LOCK_ACCESS_TYPE access, RS_LOCK_INFO *pLockInfo, NvU32 *pReleaseFlags); +/** + * Acquire the client list lock. The caller is responsible for + * ensuring that lock ordering is not violated (otherwise there can be + * deadlock): the client list lock must always be released without acquiring any + * subsequent locks. + * + * @param[in] pServer This server instance + */ +void serverAcquireClientListLock(RsServer *pServer); + +/** + * Release the client list lock. + * + * @param[in] pServer This server instance + */ +void serverReleaseClientListLock(RsServer *pServer); + /** * WAR for additional tasks that must be performed after resource-level locks are released. User-implemented. * @param[inout] status Allocation status @@ -949,6 +1031,15 @@ extern NV_STATUS serverControlLookupLockFlags(RsServer *pServer, RS_CONTROL_COOKIE *pCookie, LOCK_ACCESS_TYPE *pAccess); +/** + * Lookup client locking flags for a control call + * + * @param[in] pCookie Control call cookie + * @param[out] pClientLockType Client lock type + */ +extern NV_STATUS serverControlLookupClientLockFlags(RS_CONTROL_COOKIE *pCookie, + enum CLIENT_LOCK_TYPE *pClientLockType); + /** * * Lookup locking flags for a map call @@ -1168,18 +1259,61 @@ void serverInterUnmap_Epilogue(RsServer *pServer, RS_INTER_UNMAP_PARAMS *pUnmapP * @param[in] pServer This server instance * @param[in] hClient The client to acquire * @param[in] lockAccess LOCK_ACCESS_READ or LOCK_ACCESS_WRITE - * @param[out] ppClient Pointer to the RsClient + * @param[out] ppClientEntry Pointer to the CLIENT_ENTRY */ -NV_STATUS serverAcquireClient(RsServer *pServer, NvHandle hClient, LOCK_ACCESS_TYPE lockAccess, struct RsClient **ppClient); +NV_STATUS serverAcquireClient(RsServer *pServer, NvHandle hClient, LOCK_ACCESS_TYPE lockAccess, CLIENT_ENTRY **ppClientEntry); /** * Release a client pointer * * @param[in] pServer This server instance * @param[in] lockAccess LOCK_ACCESS_READ or LOCK_ACCESS_WRITE - * @param[in] pClient Pointer to the RsClient + * @param[in] pClientEntry Pointer to the CLIENT_ENTRY + */ +void serverReleaseClient(RsServer *pServer, LOCK_ACCESS_TYPE lockAccess, CLIENT_ENTRY *pClientEntry); + +/** + * Test is a client handle is currently locked for LOCK_ACCESS_WRITE or not. + * + * @param[in] pServer This server instance + * @param[in] hClient The client to acquire */ -NV_STATUS serverReleaseClient(RsServer *pServer, LOCK_ACCESS_TYPE lockAccess, struct RsClient *pClient); +NvBool serverIsClientLocked(RsServer *pServer, NvHandle hClient); + +/** + * Test if a client handle is internal or not + * + * @param[in] hClient The client handle to test + */ +NvBool serverIsClientInternal(RsServer *pServer, NvHandle hClient); + +/** + * Lock all clients currently in use. While this function will lock the client handles + * in the correct order, the caller is responsible for ensuring that lock ordering + * is not violated (otherwise there can be a deadlock) with respect to other types + * of locks. NOTE that this CANNOT be called when already holding one or more client + * locks! + * + * @param[in] pServer This server instance + */ +NV_STATUS serverLockAllClients(RsServer *pServer); + +/** + * Release locks on all clients. + * + * @param[in] pServer This server instance + */ +NV_STATUS serverUnlockAllClients(RsServer *pServer); + +/** + * Check if we locked all clients + * + * @param[in] pServer This server instance + */ +static NV_INLINE NvBool serverAllClientsLockIsOwner(RsServer *pServer) +{ + return (pServer->allClientLockOwnerTid == portThreadGetCurrentThreadId()); +} /** * Get a client pointer from a client handle without taking any locks. diff --git a/src/nvidia/generated/g_sdk-structures.h b/src/nvidia/generated/g_sdk-structures.h index b7f9403a2e..78556e8423 100644 --- a/src/nvidia/generated/g_sdk-structures.h +++ b/src/nvidia/generated/g_sdk-structures.h @@ -23,8 +23,8 @@ /* * WARNING: This is an autogenerated file. DO NOT EDIT. * This file is generated using below files: - * template file: kernel/inc/vgpu/gt_sdk-structures.h - * definition file: kernel/inc/vgpu/sdk-structures.def + * template file: inc/kernel/vgpu/gt_sdk-structures.h + * definition file: inc/kernel/vgpu/sdk-structures.def */ @@ -457,13 +457,6 @@ typedef struct NV2080_CTRL_GPU_GET_FERMI_ZCULL_INFO_PARAMS_v03_00 typedef NV2080_CTRL_GPU_GET_FERMI_ZCULL_INFO_PARAMS_v03_00 NV2080_CTRL_GPU_GET_FERMI_ZCULL_INFO_PARAMS_v; -typedef struct NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS_v14_00 -{ - NvU32 nvlinkPeerIdMask[NV2080_CTRL_BUS_MAX_NUM_GPUS]; -} NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS_v14_00; - -typedef NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS_v14_00 NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS_v; - typedef struct NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS_v03_00 { NvU32 BoardID; @@ -783,7 +776,17 @@ typedef struct VGPU_STATIC_PROPERTIES_v1B_01 NvBool bPblObjNotPresent; } VGPU_STATIC_PROPERTIES_v1B_01; -typedef VGPU_STATIC_PROPERTIES_v1B_01 VGPU_STATIC_PROPERTIES_v; +typedef struct VGPU_STATIC_PROPERTIES_v26_03 +{ + NvU32 encSessionStatsReportingState; + NvBool bProfilingTracingEnabled; + NvBool bDebuggingEnabled; + NvU32 channelCount; + NvBool bPblObjNotPresent; + NvU64 vmmuSegmentSize NV_ALIGN_BYTES(8); +} VGPU_STATIC_PROPERTIES_v26_03; + +typedef VGPU_STATIC_PROPERTIES_v26_03 VGPU_STATIC_PROPERTIES_v; typedef struct NV2080_CTRL_GPU_COMPUTE_PROFILE_v20_04 { @@ -961,23 +964,6 @@ typedef struct alloc_object_NVC638_ALLOCATION_PARAMETERS_v18_06 typedef alloc_object_NVC638_ALLOCATION_PARAMETERS_v18_06 alloc_object_NVC638_ALLOCATION_PARAMETERS_v; -typedef struct alloc_object_NV_FLA_MEMORY_ALLOCATION_PARAMS_v17_04 -{ - NvU32 type; - NvU32 flags; - NvU32 attr; - NvU32 attr2; - NvU64 base NV_ALIGN_BYTES(8); - NvU64 align NV_ALIGN_BYTES(8); - NvU64 limit NV_ALIGN_BYTES(8); - NvU32 flagsOs02; - NvHandle hExportSubdevice; - NvHandle hExportHandle; - NvHandle hExportClient; -} alloc_object_NV_FLA_MEMORY_ALLOCATION_PARAMS_v17_04; - -typedef alloc_object_NV_FLA_MEMORY_ALLOCATION_PARAMS_v17_04 alloc_object_NV_FLA_MEMORY_ALLOCATION_PARAMS_v; - typedef struct alloc_object_NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS_v13_03 { NvU64 offset NV_ALIGN_BYTES(8); @@ -1074,7 +1060,6 @@ typedef union alloc_object_params_v25_08 alloc_object_NV_NVJPG_ALLOCATION_PARAMETERS_v20_02 param_NV_NVJPG_ALLOCATION_PARAMETERS; alloc_object_NV503B_ALLOC_PARAMETERS_v1D_02 param_NV503B_ALLOC_PARAMETERS; alloc_object_NVC637_ALLOCATION_PARAMETERS_v13_00 param_NVC637_ALLOCATION_PARAMETERS; - alloc_object_NV_FLA_MEMORY_ALLOCATION_PARAMS_v17_04 param_NV_FLA_MEMORY_ALLOCATION_PARAMS; alloc_object_NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS_v13_03 param_NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS; alloc_object_NVC638_ALLOCATION_PARAMETERS_v18_06 param_NVC638_ALLOCATION_PARAMETERS; alloc_object_NV503C_ALLOC_PARAMETERS_v18_15 param_NV503C_ALLOC_PARAMETERS; @@ -1087,7 +1072,37 @@ typedef union alloc_object_params_v25_08 alloc_object_NV2081_ALLOC_PARAMETERS_v25_08 param_NV2081_ALLOC_PARAMETERS; } alloc_object_params_v25_08; -typedef alloc_object_params_v25_08 alloc_object_params_v; +typedef union alloc_object_params_v26_00 +{ + alloc_object_NV50_TESLA_v03_00 param_NV50_TESLA; + alloc_object_GT212_DMA_COPY_v03_00 param_GT212_DMA_COPY; + alloc_object_GF100_DISP_SW_v03_00 param_GF100_DISP_SW; + alloc_object_KEPLER_CHANNEL_GROUP_A_v12_08 param_KEPLER_CHANNEL_GROUP_A; + alloc_object_FERMI_CONTEXT_SHARE_A_v04_00 param_FERMI_CONTEXT_SHARE_A; + alloc_object_NVD0B7_VIDEO_ENCODER_v03_00 param_NVD0B7_VIDEO_ENCODER; + alloc_object_FERMI_VASPACE_A_v03_00 param_FERMI_VASPACE_A; + alloc_object_NVB0B0_VIDEO_DECODER_v03_00 param_NVB0B0_VIDEO_DECODER; + alloc_object_NV83DE_ALLOC_PARAMETERS_v03_00 param_NV83DE_ALLOC_PARAMETERS; + alloc_object_NVENC_SW_SESSION_v06_01 param_NVENC_SW_SESSION; + alloc_object_NVC4B0_VIDEO_DECODER_v12_02 param_NVC4B0_VIDEO_DECODER; + alloc_object_NVFBC_SW_SESSION_v12_04 param_NVFBC_SW_SESSION; + alloc_object_NV_NVJPG_ALLOCATION_PARAMETERS_v20_02 param_NV_NVJPG_ALLOCATION_PARAMETERS; + alloc_object_NV503B_ALLOC_PARAMETERS_v1D_02 param_NV503B_ALLOC_PARAMETERS; + alloc_object_NVC637_ALLOCATION_PARAMETERS_v13_00 param_NVC637_ALLOCATION_PARAMETERS; + alloc_object_NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS_v13_03 param_NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS; + alloc_object_NVC638_ALLOCATION_PARAMETERS_v18_06 param_NVC638_ALLOCATION_PARAMETERS; + alloc_object_NV503C_ALLOC_PARAMETERS_v18_15 param_NV503C_ALLOC_PARAMETERS; + alloc_object_NVC670_ALLOCATION_PARAMETERS_v1A_01 param_NVC670_ALLOCATION_PARAMETERS; + alloc_object_NVB2CC_ALLOC_PARAMETERS_v1A_03 param_NVB2CC_ALLOC_PARAMETERS; + NV_GR_ALLOCATION_PARAMETERS_v1A_17 param_NV_GR_ALLOCATION_PARAMETERS; + alloc_object_NV_UVM_CHANNEL_RETAINER_ALLOC_PARAMS_v1A_1B param_NV_UVM_CHANNEL_RETAINER_ALLOC_PARAMS; + alloc_object_NV00F8_ALLOCATION_PARAMETERS_v1E_0C param_NV00F8_ALLOCATION_PARAMETERS; + alloc_object_NVC9FA_VIDEO_OFA_v1F_00 param_NVC9FA_VIDEO_OFA; + alloc_object_NV2081_ALLOC_PARAMETERS_v25_08 param_NV2081_ALLOC_PARAMETERS; + NvU8 param_padding[NV_ALLOC_STRUCTURE_SIZE_v26_00]; +} alloc_object_params_v26_00; + +typedef alloc_object_params_v26_00 alloc_object_params_v; typedef struct gpu_exec_reg_ops_v12_01 { @@ -1872,17 +1887,6 @@ typedef struct NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS_v1E_09 typedef NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS_v1E_09 NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS_v; -typedef struct NV2080_CTRL_GR_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS_v12_09 -{ - NV2080_CTRL_GR_ROUTE_INFO_v12_01 grRouteInfo; - NvU32 engineId; - NvU32 alignment; - NvU32 size; - NvBool bInfoPopulated; -} NV2080_CTRL_GR_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS_v12_09; - -typedef NV2080_CTRL_GR_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS_v12_09 NV2080_CTRL_GR_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS_v; - typedef struct NV2080_CTRL_FLA_SETUP_INSTANCE_MEM_BLOCK_PARAMS_v13_04 { NvU64 imbPhysAddr NV_ALIGN_BYTES(8); @@ -1928,7 +1932,14 @@ typedef struct NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v24_06 NvU32 flags; } NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v24_06; -typedef NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v24_06 NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v; +typedef struct NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v26_02 +{ + NV2080_CTRL_GPU_QUERY_ECC_UNIT_STATUS_v15_01 units[NV2080_CTRL_GPU_ECC_UNIT_COUNT_v26_02]; + NvBool bFatalPoisonError; + NvU32 flags; +} NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v26_02; + +typedef NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v26_02 NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v; typedef struct NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v24_06 { @@ -1937,7 +1948,14 @@ typedef struct NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v24_06 NvU32 flags; } NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v24_06; -typedef NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v24_06 NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v; +typedef struct NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v26_02 +{ + NV2080_CTRL_GPU_QUERY_ECC_UNIT_STATUS_v15_01 units[NV2080_CTRL_GPU_ECC_UNIT_COUNT_v26_02]; + NvBool bFatalPoisonError; + NvU32 flags; +} NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v26_02; + +typedef NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v26_02 NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v; typedef struct NV2080_CTRL_MC_SERVICE_INTERRUPTS_PARAMS_v15_01 { @@ -2790,6 +2808,39 @@ typedef struct NV2080_CTRL_FB_FS_INFO_FBP_LOGICAL_MAP_PARAMS_v1A_1D typedef NV2080_CTRL_FB_FS_INFO_FBP_LOGICAL_MAP_PARAMS_v1A_1D NV2080_CTRL_FB_FS_INFO_FBP_LOGICAL_MAP_PARAMS_v; +typedef struct NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK_PARAMS_v26_04 +{ + NvU32 sysIdx; + NvU32 sysl2LtcEnMask; +} NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK_PARAMS_v26_04; + +typedef NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK_PARAMS_v26_04 NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK_PARAMS_v; + +typedef struct NV2080_CTRL_FB_FS_INFO_PAC_MASK_PARAMS_v26_04 +{ + NvU32 fbpIndex; + NvU32 pacEnMask; +} NV2080_CTRL_FB_FS_INFO_PAC_MASK_PARAMS_v26_04; + +typedef NV2080_CTRL_FB_FS_INFO_PAC_MASK_PARAMS_v26_04 NV2080_CTRL_FB_FS_INFO_PAC_MASK_PARAMS_v; + +typedef struct NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK_PARAMS_v26_04 +{ + NvU32 fbpIndex; + NvU64 logicalLtcEnMask NV_ALIGN_BYTES(8); +} NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK_PARAMS_v26_04; + +typedef NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK_PARAMS_v26_04 NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK_PARAMS_v; + +typedef struct NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK_PARAMS_v26_04 +{ + NvU32 fbpIndex; + NvU32 swizzId; + NvU64 logicalLtcEnMask NV_ALIGN_BYTES(8); +} NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK_PARAMS_v26_04; + +typedef NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK_PARAMS_v26_04 NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK_PARAMS_v; + typedef union NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v1A_1D { NV2080_CTRL_FB_FS_INFO_INVALID_QUERY_PARAMS_v1A_1D inv; @@ -2807,7 +2858,28 @@ typedef union NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v1A_1D NV2080_CTRL_FB_FS_INFO_FBP_LOGICAL_MAP_PARAMS_v1A_1D fbpLogicalMap; } NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v1A_1D; -typedef NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v1A_1D NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v; +typedef union NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v26_04 +{ + NV2080_CTRL_FB_FS_INFO_INVALID_QUERY_PARAMS_v1A_1D inv; + NV2080_CTRL_FB_FS_INFO_FBP_MASK_PARAMS_v1A_1D fbp; + NV2080_CTRL_FB_FS_INFO_LTC_MASK_PARAMS_v1A_1D ltc; + NV2080_CTRL_FB_FS_INFO_LTS_MASK_PARAMS_v1A_1D lts; + NV2080_CTRL_FB_FS_INFO_FBPA_MASK_PARAMS_v1A_1D fbpa; + NV2080_CTRL_FB_FS_INFO_ROP_MASK_PARAMS_v1A_1D rop; + NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTC_MASK_PARAMS_v1A_1D dmLtc; + NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTS_MASK_PARAMS_v1A_1D dmLts; + NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_MASK_PARAMS_v1A_1D dmFbpa; + NV2080_CTRL_FB_FS_INFO_PROFILER_MON_ROP_MASK_PARAMS_v1A_1D dmRop; + NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_SUBP_MASK_PARAMS_v1A_1D dmFbpaSubp; + NV2080_CTRL_FB_FS_INFO_FBPA_SUBP_MASK_PARAMS_v1A_1D fbpaSubp; + NV2080_CTRL_FB_FS_INFO_FBP_LOGICAL_MAP_PARAMS_v1A_1D fbpLogicalMap; + NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK_PARAMS_v26_04 sysl2Ltc; + NV2080_CTRL_FB_FS_INFO_PAC_MASK_PARAMS_v26_04 pac; + NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK_PARAMS_v26_04 logicalLtc; + NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK_PARAMS_v26_04 dmLogicalLtc; +} NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v26_04; + +typedef NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v26_04 NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v; typedef struct NV2080_CTRL_FB_FS_INFO_QUERY_v1A_1D { @@ -2817,7 +2889,15 @@ typedef struct NV2080_CTRL_FB_FS_INFO_QUERY_v1A_1D NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v1A_1D queryParams; } NV2080_CTRL_FB_FS_INFO_QUERY_v1A_1D; -typedef NV2080_CTRL_FB_FS_INFO_QUERY_v1A_1D NV2080_CTRL_FB_FS_INFO_QUERY_v; +typedef struct NV2080_CTRL_FB_FS_INFO_QUERY_v26_04 +{ + NvU16 queryType; + NvU8 reserved[2]; + NvU32 status; + NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v26_04 queryParams; +} NV2080_CTRL_FB_FS_INFO_QUERY_v26_04; + +typedef NV2080_CTRL_FB_FS_INFO_QUERY_v26_04 NV2080_CTRL_FB_FS_INFO_QUERY_v; typedef struct NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v24_00 { @@ -2826,7 +2906,14 @@ typedef struct NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v24_00 NV2080_CTRL_FB_FS_INFO_QUERY_v1A_1D queries[NV2080_CTRL_FB_FS_INFO_MAX_QUERIES_v24_00]; } NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v24_00; -typedef NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v24_00 NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v; +typedef struct NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v26_04 +{ + NvU16 numQueries; + NvU8 reserved[6]; + NV2080_CTRL_FB_FS_INFO_QUERY_v26_04 queries[NV2080_CTRL_FB_FS_INFO_MAX_QUERIES_v24_00]; +} NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v26_04; + +typedef NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v26_04 NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v; typedef struct NV2080_CTRL_GRMGR_GR_FS_INFO_GPC_COUNT_PARAMS_v1A_1D { @@ -3375,6 +3462,15 @@ typedef struct NV2080_CTRL_NVLINK_INBAND_RECEIVED_DATA_PARAMS_v25_0C typedef NV2080_CTRL_NVLINK_INBAND_RECEIVED_DATA_PARAMS_v25_0C NV2080_CTRL_NVLINK_INBAND_RECEIVED_DATA_PARAMS_v; +typedef struct GPU_EXEC_SYSPIPE_INFO_v26_01 +{ + NvU32 execPartCount; + NvU32 execPartId[NVC637_CTRL_MAX_EXEC_PARTITIONS_v18_05]; + NvU32 syspipeId[NVC637_CTRL_MAX_EXEC_PARTITIONS_v18_05]; +} GPU_EXEC_SYSPIPE_INFO_v26_01; + +typedef GPU_EXEC_SYSPIPE_INFO_v26_01 GPU_EXEC_SYSPIPE_INFO_v; + #endif @@ -3492,6 +3588,7 @@ uint32_t _get_union_member_index_alloc_object_params_v25_08(NvU32 cmd) case NVC4B7_VIDEO_ENCODER: case NVC7B7_VIDEO_ENCODER: case NVC9B7_VIDEO_ENCODER: + case NVCFB7_VIDEO_ENCODER: return 6; // "param_NVD0B7_VIDEO_ENCODER" case FERMI_VASPACE_A: @@ -3520,6 +3617,7 @@ uint32_t _get_union_member_index_alloc_object_params_v25_08(NvU32 cmd) case NVB8B0_VIDEO_DECODER: case NVC9B0_VIDEO_DECODER: case NVCDB0_VIDEO_DECODER: + case NVCFB0_VIDEO_DECODER: return 12; // "param_NVC4B0_VIDEO_DECODER" case NVFBC_SW_SESSION: @@ -3529,6 +3627,7 @@ uint32_t _get_union_member_index_alloc_object_params_v25_08(NvU32 cmd) case NVB8D1_VIDEO_NVJPG: case NVC9D1_VIDEO_NVJPG: case NVCDD1_VIDEO_NVJPG: + case NVCFD1_VIDEO_NVJPG: return 14; // "param_NV_NVJPG_ALLOCATION_PARAMETERS" case NV50_P2P: @@ -3537,31 +3636,181 @@ uint32_t _get_union_member_index_alloc_object_params_v25_08(NvU32 cmd) case AMPERE_SMC_PARTITION_REF: return 16; // "param_NVC637_ALLOCATION_PARAMETERS" - case NV01_MEMORY_FLA: - return 17; // "param_NV_FLA_MEMORY_ALLOCATION_PARAMS" + case NV01_MEMORY_VIRTUAL: + return 17; // "param_NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS" + + case AMPERE_SMC_EXEC_PARTITION_REF: + return 18; // "param_NVC638_ALLOCATION_PARAMETERS" + + case NV50_THIRD_PARTY_P2P: + return 19; // "param_NV503C_ALLOC_PARAMETERS" + + case NVC670_DISPLAY: + return 20; // "param_NVC670_ALLOCATION_PARAMETERS" + + case NVC67B_WINDOW_IMM_CHANNEL_DMA: + case NVC67D_CORE_CHANNEL_DMA: + case NVC67E_WINDOW_CHANNEL_DMA: + return 21; // "param_NV50VAIO_CHANNELDMA_ALLOCATION_PARAMETERS" + + case MAXWELL_PROFILER_CONTEXT: + return 22; // "param_NVB1CC_ALLOC_PARAMETERS" + + case MAXWELL_PROFILER_DEVICE: + return 23; // "param_NVB2CC_ALLOC_PARAMETERS" + + case MAXWELL_COMPUTE_A: + case PASCAL_COMPUTE_A: + case VOLTA_COMPUTE_A: + case TURING_COMPUTE_A: + case AMPERE_COMPUTE_A: + case HOPPER_COMPUTE_A: + case MAXWELL_COMPUTE_B: + case PASCAL_COMPUTE_B: + case VOLTA_COMPUTE_B: + case AMPERE_COMPUTE_B: + return 24; // "param_NV_GR_ALLOCATION_PARAMETERS" + + case UVM_CHANNEL_RETAINER: + return 25; // "param_NV_UVM_CHANNEL_RETAINER_ALLOC_PARAMS" + + case NV_MEMORY_FABRIC: + return 26; // "param_NV00F8_ALLOCATION_PARAMETERS" + + case NVC9FA_VIDEO_OFA: + case NVCDFA_VIDEO_OFA: + case NVC6FA_VIDEO_OFA: + case NVC7FA_VIDEO_OFA: + case NVB8FA_VIDEO_OFA: + case NVCFFA_VIDEO_OFA: + return 27; // "param_NVC9FA_VIDEO_OFA" + + case NV2081_BINAPI: + case NV2082_BINAPI_PRIVILEGED: + return 28; // "param_NV2081_ALLOC_PARAMETERS" + + default: + return UNION_UNKNOWN_FIELD_PRINT; + } +} + +uint32_t _get_union_member_index_alloc_object_params_v26_00(NvU32 cmd) +{ + switch (cmd) + { + case G82_TESLA: + case GT200_TESLA: + case GT214_TESLA: + case NV50_TESLA: + case FERMI_A: + case KEPLER_A: + case KEPLER_B: + case MAXWELL_A: + case MAXWELL_B: + case PASCAL_A: + case PASCAL_B: + case VOLTA_A: + case TURING_A: + case AMPERE_A: + return 0; // "param_NV50_TESLA" + + case KEPLER_DMA_COPY_A: + case MAXWELL_DMA_COPY_A: + case PASCAL_DMA_COPY_A: + case VOLTA_DMA_COPY_A: + case TURING_DMA_COPY_A: + case AMPERE_DMA_COPY_A: + return 1; // "param_GT212_DMA_COPY" + + case GF100_MSPPP: + return 2; // "param_G98_MSPPP" + + case GF100_DISP_SW: + return 3; // "param_GF100_DISP_SW" + + case KEPLER_CHANNEL_GROUP_A: + return 4; // "param_KEPLER_CHANNEL_GROUP_A" + + case FERMI_CONTEXT_SHARE_A: + return 5; // "param_FERMI_CONTEXT_SHARE_A" + + case NVD0B7_VIDEO_ENCODER: + case NVC1B7_VIDEO_ENCODER: + case NVC2B7_VIDEO_ENCODER: + case NVC3B7_VIDEO_ENCODER: + case NVC4B7_VIDEO_ENCODER: + case NVC7B7_VIDEO_ENCODER: + case NVC9B7_VIDEO_ENCODER: + case NVCFB7_VIDEO_ENCODER: + return 6; // "param_NVD0B7_VIDEO_ENCODER" + + case FERMI_VASPACE_A: + return 7; // "param_FERMI_VASPACE_A" + + case NVA0B0_VIDEO_DECODER: + case NVB0B0_VIDEO_DECODER: + case NVC1B0_VIDEO_DECODER: + case NVC2B0_VIDEO_DECODER: + case NVC3B0_VIDEO_DECODER: + case NV95B1_VIDEO_MSVLD: + return 8; // "param_NVB0B0_VIDEO_DECODER" + + case NV95B2_VIDEO_MSPDEC: + return 9; // "param_NV95B2_VIDEO_MSPDEC" + + case GT200_DEBUGGER: + return 10; // "param_NV83DE_ALLOC_PARAMETERS" + + case NVENC_SW_SESSION: + return 11; // "param_NVENC_SW_SESSION" + + case NVC4B0_VIDEO_DECODER: + case NVC6B0_VIDEO_DECODER: + case NVC7B0_VIDEO_DECODER: + case NVB8B0_VIDEO_DECODER: + case NVC9B0_VIDEO_DECODER: + case NVCDB0_VIDEO_DECODER: + case NVCFB0_VIDEO_DECODER: + return 12; // "param_NVC4B0_VIDEO_DECODER" + + case NVFBC_SW_SESSION: + return 13; // "param_NVFBC_SW_SESSION" + + case NVC4D1_VIDEO_NVJPG: + case NVB8D1_VIDEO_NVJPG: + case NVC9D1_VIDEO_NVJPG: + case NVCDD1_VIDEO_NVJPG: + case NVCFD1_VIDEO_NVJPG: + return 14; // "param_NV_NVJPG_ALLOCATION_PARAMETERS" + + case NV50_P2P: + return 15; // "param_NV503B_ALLOC_PARAMETERS" + + case AMPERE_SMC_PARTITION_REF: + return 16; // "param_NVC637_ALLOCATION_PARAMETERS" case NV01_MEMORY_VIRTUAL: - return 18; // "param_NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS" + return 17; // "param_NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS" case AMPERE_SMC_EXEC_PARTITION_REF: - return 19; // "param_NVC638_ALLOCATION_PARAMETERS" + return 18; // "param_NVC638_ALLOCATION_PARAMETERS" case NV50_THIRD_PARTY_P2P: - return 20; // "param_NV503C_ALLOC_PARAMETERS" + return 19; // "param_NV503C_ALLOC_PARAMETERS" case NVC670_DISPLAY: - return 21; // "param_NVC670_ALLOCATION_PARAMETERS" + return 20; // "param_NVC670_ALLOCATION_PARAMETERS" case NVC67B_WINDOW_IMM_CHANNEL_DMA: case NVC67D_CORE_CHANNEL_DMA: case NVC67E_WINDOW_CHANNEL_DMA: - return 22; // "param_NV50VAIO_CHANNELDMA_ALLOCATION_PARAMETERS" + return 21; // "param_NV50VAIO_CHANNELDMA_ALLOCATION_PARAMETERS" case MAXWELL_PROFILER_CONTEXT: - return 23; // "param_NVB1CC_ALLOC_PARAMETERS" + return 22; // "param_NVB1CC_ALLOC_PARAMETERS" case MAXWELL_PROFILER_DEVICE: - return 24; // "param_NVB2CC_ALLOC_PARAMETERS" + return 23; // "param_NVB2CC_ALLOC_PARAMETERS" case MAXWELL_COMPUTE_A: case PASCAL_COMPUTE_A: @@ -3573,24 +3822,25 @@ uint32_t _get_union_member_index_alloc_object_params_v25_08(NvU32 cmd) case PASCAL_COMPUTE_B: case VOLTA_COMPUTE_B: case AMPERE_COMPUTE_B: - return 25; // "param_NV_GR_ALLOCATION_PARAMETERS" + return 24; // "param_NV_GR_ALLOCATION_PARAMETERS" case UVM_CHANNEL_RETAINER: - return 26; // "param_NV_UVM_CHANNEL_RETAINER_ALLOC_PARAMS" + return 25; // "param_NV_UVM_CHANNEL_RETAINER_ALLOC_PARAMS" case NV_MEMORY_FABRIC: - return 27; // "param_NV00F8_ALLOCATION_PARAMETERS" + return 26; // "param_NV00F8_ALLOCATION_PARAMETERS" case NVC9FA_VIDEO_OFA: case NVCDFA_VIDEO_OFA: case NVC6FA_VIDEO_OFA: case NVC7FA_VIDEO_OFA: case NVB8FA_VIDEO_OFA: - return 28; // "param_NVC9FA_VIDEO_OFA" + case NVCFFA_VIDEO_OFA: + return 27; // "param_NVC9FA_VIDEO_OFA" case NV2081_BINAPI: case NV2082_BINAPI_PRIVILEGED: - return 29; // "param_NV2081_ALLOC_PARAMETERS" + return 28; // "param_NV2081_ALLOC_PARAMETERS" default: return UNION_UNKNOWN_FIELD_PRINT; @@ -3649,6 +3899,66 @@ uint32_t _get_union_member_index_NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v1A_1D(NvU32 } } +uint32_t _get_union_member_index_NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v26_04(NvU32 cmd) +{ + switch (cmd) + { + case NV2080_CTRL_FB_FS_INFO_INVALID_QUERY: + return 0; // "inv" + + case NV2080_CTRL_FB_FS_INFO_FBP_MASK: + return 1; // "fbp" + + case NV2080_CTRL_FB_FS_INFO_LTC_MASK: + return 2; // "ltc" + + case NV2080_CTRL_FB_FS_INFO_LTS_MASK: + return 3; // "lts" + + case NV2080_CTRL_FB_FS_INFO_FBPA_MASK: + return 4; // "fbpa" + + case NV2080_CTRL_FB_FS_INFO_ROP_MASK: + return 5; // "rop" + + case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTC_MASK: + return 6; // "dmLtc" + + case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTS_MASK: + return 7; // "dmLts" + + case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_MASK: + return 8; // "dmFbpa" + + case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_ROP_MASK: + return 9; // "dmRop" + + case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_SUBP_MASK: + return 10; // "dmFbpaSubp" + + case NV2080_CTRL_FB_FS_INFO_FBPA_SUBP_MASK: + return 11; // "fbpaSubp" + + case NV2080_CTRL_FB_FS_INFO_FBP_LOGICAL_MAP: + return 12; // "fbpLogicalMap" + + case NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK: + return 13; // "sysl2Ltc" + + case NV2080_CTRL_FB_FS_INFO_PAC_MASK: + return 14; // "pac" + + case NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK: + return 15; // "logicalLtc" + + case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK: + return 16; // "dmLogicalLtc" + + default: + return UNION_UNKNOWN_FIELD_PRINT; + } +} + @@ -3733,6 +4043,15 @@ static NV_STATUS get_union_member_index_NV2080_CTRL_FB_FS_INFO_QUERY_v1A_1D_quer *index = _get_union_member_index_NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v1A_1D(param->queryType); return NV_OK; } +static NV_STATUS get_union_member_index_NV2080_CTRL_FB_FS_INFO_QUERY_v26_04_queryParams(void *msg, NvS32 bytes_remaining, uint32_t* index) +{ + NV2080_CTRL_FB_FS_INFO_QUERY_v26_04 *param = msg; + + if ((NvS32)(NV_OFFSETOF(NV2080_CTRL_FB_FS_INFO_QUERY_v26_04, queryType) + sizeof(param->queryType)) > bytes_remaining) + return NV_ERR_BUFFER_TOO_SMALL; + *index = _get_union_member_index_NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v26_04(param->queryType); + return NV_OK; +} static NV_STATUS get_union_member_index_NV2080_CTRL_GRMGR_GR_FS_INFO_QUERY_PARAMS_v1A_1D_queryData(void *msg, NvS32 bytes_remaining, uint32_t* index) { NV2080_CTRL_GRMGR_GR_FS_INFO_QUERY_PARAMS_v1A_1D *param = msg; diff --git a/src/nvidia/generated/g_sec2_context_nvoc.c b/src/nvidia/generated/g_sec2_context_nvoc.c index 600d4bc3f7..1aa5e2a640 100644 --- a/src/nvidia/generated/g_sec2_context_nvoc.c +++ b/src/nvidia/generated/g_sec2_context_nvoc.c @@ -120,134 +120,169 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_Sec2Context = /*pExportInfo=*/ &__nvoc_export_info_Sec2Context }; -static NV_STATUS __nvoc_thunk_ChannelDescendant_sec2ctxCheckMemInterUnmap(struct Sec2Context *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_Sec2Context_ChannelDescendant.offset), bSubdeviceHandleProvided); +// 32 up-thunk(s) defined to bridge methods in Sec2Context to superclasses + +// sec2ctxGetSwMethods: virtual inherited (chandes) base (chandes) +static NV_STATUS __nvoc_up_thunk_ChannelDescendant_sec2ctxGetSwMethods(struct Sec2Context *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { + return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_Sec2Context_ChannelDescendant.offset), ppMethods, pNumMethods); } -static NvBool __nvoc_thunk_GpuResource_sec2ctxShareCallback(struct Sec2Context *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// sec2ctxIsSwMethodStalling: virtual inherited (chandes) base (chandes) +static NvBool __nvoc_up_thunk_ChannelDescendant_sec2ctxIsSwMethodStalling(struct Sec2Context *pChannelDescendant, NvU32 hHandle) { + return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_Sec2Context_ChannelDescendant.offset), hHandle); } -static NvBool __nvoc_thunk_RmResource_sec2ctxAccessCallback(struct Sec2Context *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Sec2Context_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// sec2ctxCheckMemInterUnmap: virtual inherited (chandes) base (chandes) +static NV_STATUS __nvoc_up_thunk_ChannelDescendant_sec2ctxCheckMemInterUnmap(struct Sec2Context *pChannelDescendant, NvBool bSubdeviceHandleProvided) { + return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_Sec2Context_ChannelDescendant.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RsResource_sec2ctxMapTo(struct Sec2Context *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Sec2Context_RsResource.offset), pParams); +// sec2ctxControl: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxControl(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_sec2ctxGetMapAddrSpace(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// sec2ctxMap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxMap(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static void __nvoc_thunk_Notifier_sec2ctxSetNotificationShare(struct Sec2Context *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_Sec2Context_Notifier.offset), pNotifShare); +// sec2ctxUnmap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxUnmap(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), pCallContext, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_sec2ctxGetRefCount(struct Sec2Context *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Sec2Context_RsResource.offset)); +// sec2ctxShareCallback: virtual inherited (gpures) base (chandes) +static NvBool __nvoc_up_thunk_GpuResource_sec2ctxShareCallback(struct Sec2Context *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static void __nvoc_thunk_RsResource_sec2ctxAddAdditionalDependants(struct RsClient *pClient, struct Sec2Context *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Sec2Context_RsResource.offset), pReference); +// sec2ctxGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxGetRegBaseOffsetAndSize(struct Sec2Context *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_RmResource_sec2ctxControl_Prologue(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Sec2Context_RmResource.offset), pCallContext, pParams); +// sec2ctxGetMapAddrSpace: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxGetMapAddrSpace(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_GpuResource_sec2ctxGetRegBaseOffsetAndSize(struct Sec2Context *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), pGpu, pOffset, pSize); +// sec2ctxInternalControlForward: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxInternalControlForward(struct Sec2Context *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_GpuResource_sec2ctxInternalControlForward(struct Sec2Context *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), command, pParams, size); +// sec2ctxGetInternalObjectHandle: virtual inherited (gpures) base (chandes) +static NvHandle __nvoc_up_thunk_GpuResource_sec2ctxGetInternalObjectHandle(struct Sec2Context *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_sec2ctxUnmapFrom(struct Sec2Context *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Sec2Context_RsResource.offset), pParams); +// sec2ctxAccessCallback: virtual inherited (rmres) base (chandes) +static NvBool __nvoc_up_thunk_RmResource_sec2ctxAccessCallback(struct Sec2Context *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static void __nvoc_thunk_RmResource_sec2ctxControl_Epilogue(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Sec2Context_RmResource.offset), pCallContext, pParams); +// sec2ctxGetMemInterMapParams: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_sec2ctxGetMemInterMapParams(struct Sec2Context *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Sec2Context_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_ChannelDescendant_sec2ctxGetSwMethods(struct Sec2Context *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_Sec2Context_ChannelDescendant.offset), ppMethods, pNumMethods); +// sec2ctxGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_sec2ctxGetMemoryMappingDescriptor(struct Sec2Context *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Sec2Context_RmResource.offset), ppMemDesc); } -static NvHandle __nvoc_thunk_GpuResource_sec2ctxGetInternalObjectHandle(struct Sec2Context *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset)); +// sec2ctxControlSerialization_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_sec2ctxControlSerialization_Prologue(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_sec2ctxControl(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), pCallContext, pParams); +// sec2ctxControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_sec2ctxControlSerialization_Epilogue(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_sec2ctxUnmap(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), pCallContext, pCpuMapping); +// sec2ctxControl_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_sec2ctxControl_Prologue(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_sec2ctxGetMemInterMapParams(struct Sec2Context *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_Sec2Context_RmResource.offset), pParams); +// sec2ctxControl_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_sec2ctxControl_Epilogue(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_sec2ctxGetMemoryMappingDescriptor(struct Sec2Context *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_Sec2Context_RmResource.offset), ppMemDesc); +// sec2ctxCanCopy: virtual inherited (res) base (chandes) +static NvBool __nvoc_up_thunk_RsResource_sec2ctxCanCopy(struct Sec2Context *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RsResource.offset)); } -static NvBool __nvoc_thunk_ChannelDescendant_sec2ctxIsSwMethodStalling(struct Sec2Context *pChannelDescendant, NvU32 hHandle) { - return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_Sec2Context_ChannelDescendant.offset), hHandle); +// sec2ctxIsDuplicate: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_sec2ctxIsDuplicate(struct Sec2Context *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_sec2ctxControlFilter(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Sec2Context_RsResource.offset), pCallContext, pParams); +// sec2ctxPreDestruct: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_sec2ctxPreDestruct(struct Sec2Context *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_sec2ctxUnregisterEvent(struct Sec2Context *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_Sec2Context_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// sec2ctxControlFilter: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_sec2ctxControlFilter(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_sec2ctxControlSerialization_Prologue(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Sec2Context_RmResource.offset), pCallContext, pParams); +// sec2ctxIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body +static NvBool __nvoc_up_thunk_RsResource_sec2ctxIsPartialUnmapSupported(struct Sec2Context *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_sec2ctxCanCopy(struct Sec2Context *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Sec2Context_RsResource.offset)); +// sec2ctxMapTo: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_sec2ctxMapTo(struct Sec2Context *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RsResource_sec2ctxIsPartialUnmapSupported(struct Sec2Context *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Sec2Context_RsResource.offset)); +// sec2ctxUnmapFrom: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_sec2ctxUnmapFrom(struct Sec2Context *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RsResource.offset), pParams); } -static void __nvoc_thunk_RsResource_sec2ctxPreDestruct(struct Sec2Context *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Sec2Context_RsResource.offset)); +// sec2ctxGetRefCount: virtual inherited (res) base (chandes) +static NvU32 __nvoc_up_thunk_RsResource_sec2ctxGetRefCount(struct Sec2Context *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_sec2ctxIsDuplicate(struct Sec2Context *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Sec2Context_RsResource.offset), hMemory, pDuplicate); +// sec2ctxAddAdditionalDependants: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_sec2ctxAddAdditionalDependants(struct RsClient *pClient, struct Sec2Context *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RsResource.offset), pReference); } -static void __nvoc_thunk_RmResource_sec2ctxControlSerialization_Epilogue(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Sec2Context_RmResource.offset), pCallContext, pParams); +// sec2ctxGetNotificationListPtr: virtual inherited (notify) base (chandes) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_sec2ctxGetNotificationListPtr(struct Sec2Context *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_Sec2Context_Notifier.offset)); } -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_sec2ctxGetNotificationListPtr(struct Sec2Context *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_Sec2Context_Notifier.offset)); +// sec2ctxGetNotificationShare: virtual inherited (notify) base (chandes) +static struct NotifShare * __nvoc_up_thunk_Notifier_sec2ctxGetNotificationShare(struct Sec2Context *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_Sec2Context_Notifier.offset)); } -static struct NotifShare *__nvoc_thunk_Notifier_sec2ctxGetNotificationShare(struct Sec2Context *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_Sec2Context_Notifier.offset)); +// sec2ctxSetNotificationShare: virtual inherited (notify) base (chandes) +static void __nvoc_up_thunk_Notifier_sec2ctxSetNotificationShare(struct Sec2Context *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_Sec2Context_Notifier.offset), pNotifShare); } -static NV_STATUS __nvoc_thunk_GpuResource_sec2ctxMap(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// sec2ctxUnregisterEvent: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_sec2ctxUnregisterEvent(struct Sec2Context *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_Sec2Context_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static NV_STATUS __nvoc_thunk_Notifier_sec2ctxGetOrAllocNotifShare(struct Sec2Context *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_Sec2Context_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +// sec2ctxGetOrAllocNotifShare: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_sec2ctxGetOrAllocNotifShare(struct Sec2Context *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_Sec2Context_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_Sec2Context = { /*numEntries=*/ 0, @@ -289,6 +324,7 @@ NV_STATUS __nvoc_ctor_Sec2Context(Sec2Context *pThis, RmHalspecOwner *pRmhalspec return status; } +// Vtable initialization static void __nvoc_init_funcTable_Sec2Context_1(Sec2Context *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -297,72 +333,108 @@ static void __nvoc_init_funcTable_Sec2Context_1(Sec2Context *pThis, RmHalspecOwn PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - pThis->__sec2ctxCheckMemInterUnmap__ = &__nvoc_thunk_ChannelDescendant_sec2ctxCheckMemInterUnmap; + // sec2ctxGetSwMethods -- virtual inherited (chandes) base (chandes) + pThis->__sec2ctxGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_sec2ctxGetSwMethods; - pThis->__sec2ctxShareCallback__ = &__nvoc_thunk_GpuResource_sec2ctxShareCallback; + // sec2ctxIsSwMethodStalling -- virtual inherited (chandes) base (chandes) + pThis->__sec2ctxIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_sec2ctxIsSwMethodStalling; - pThis->__sec2ctxAccessCallback__ = &__nvoc_thunk_RmResource_sec2ctxAccessCallback; + // sec2ctxCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) + pThis->__sec2ctxCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_sec2ctxCheckMemInterUnmap; - pThis->__sec2ctxMapTo__ = &__nvoc_thunk_RsResource_sec2ctxMapTo; + // sec2ctxControl -- virtual inherited (gpures) base (chandes) + pThis->__sec2ctxControl__ = &__nvoc_up_thunk_GpuResource_sec2ctxControl; - pThis->__sec2ctxGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_sec2ctxGetMapAddrSpace; + // sec2ctxMap -- virtual inherited (gpures) base (chandes) + pThis->__sec2ctxMap__ = &__nvoc_up_thunk_GpuResource_sec2ctxMap; - pThis->__sec2ctxSetNotificationShare__ = &__nvoc_thunk_Notifier_sec2ctxSetNotificationShare; + // sec2ctxUnmap -- virtual inherited (gpures) base (chandes) + pThis->__sec2ctxUnmap__ = &__nvoc_up_thunk_GpuResource_sec2ctxUnmap; - pThis->__sec2ctxGetRefCount__ = &__nvoc_thunk_RsResource_sec2ctxGetRefCount; + // sec2ctxShareCallback -- virtual inherited (gpures) base (chandes) + pThis->__sec2ctxShareCallback__ = &__nvoc_up_thunk_GpuResource_sec2ctxShareCallback; - pThis->__sec2ctxAddAdditionalDependants__ = &__nvoc_thunk_RsResource_sec2ctxAddAdditionalDependants; + // sec2ctxGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) + pThis->__sec2ctxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_sec2ctxGetRegBaseOffsetAndSize; - pThis->__sec2ctxControl_Prologue__ = &__nvoc_thunk_RmResource_sec2ctxControl_Prologue; + // sec2ctxGetMapAddrSpace -- virtual inherited (gpures) base (chandes) + pThis->__sec2ctxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_sec2ctxGetMapAddrSpace; - pThis->__sec2ctxGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_sec2ctxGetRegBaseOffsetAndSize; + // sec2ctxInternalControlForward -- virtual inherited (gpures) base (chandes) + pThis->__sec2ctxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_sec2ctxInternalControlForward; - pThis->__sec2ctxInternalControlForward__ = &__nvoc_thunk_GpuResource_sec2ctxInternalControlForward; + // sec2ctxGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) + pThis->__sec2ctxGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_sec2ctxGetInternalObjectHandle; - pThis->__sec2ctxUnmapFrom__ = &__nvoc_thunk_RsResource_sec2ctxUnmapFrom; + // sec2ctxAccessCallback -- virtual inherited (rmres) base (chandes) + pThis->__sec2ctxAccessCallback__ = &__nvoc_up_thunk_RmResource_sec2ctxAccessCallback; - pThis->__sec2ctxControl_Epilogue__ = &__nvoc_thunk_RmResource_sec2ctxControl_Epilogue; + // sec2ctxGetMemInterMapParams -- virtual inherited (rmres) base (chandes) + pThis->__sec2ctxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_sec2ctxGetMemInterMapParams; - pThis->__sec2ctxGetSwMethods__ = &__nvoc_thunk_ChannelDescendant_sec2ctxGetSwMethods; + // sec2ctxGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) + pThis->__sec2ctxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_sec2ctxGetMemoryMappingDescriptor; - pThis->__sec2ctxGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_sec2ctxGetInternalObjectHandle; + // sec2ctxControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__sec2ctxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_sec2ctxControlSerialization_Prologue; - pThis->__sec2ctxControl__ = &__nvoc_thunk_GpuResource_sec2ctxControl; + // sec2ctxControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__sec2ctxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_sec2ctxControlSerialization_Epilogue; - pThis->__sec2ctxUnmap__ = &__nvoc_thunk_GpuResource_sec2ctxUnmap; + // sec2ctxControl_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__sec2ctxControl_Prologue__ = &__nvoc_up_thunk_RmResource_sec2ctxControl_Prologue; - pThis->__sec2ctxGetMemInterMapParams__ = &__nvoc_thunk_RmResource_sec2ctxGetMemInterMapParams; + // sec2ctxControl_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__sec2ctxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_sec2ctxControl_Epilogue; - pThis->__sec2ctxGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_sec2ctxGetMemoryMappingDescriptor; + // sec2ctxCanCopy -- virtual inherited (res) base (chandes) + pThis->__sec2ctxCanCopy__ = &__nvoc_up_thunk_RsResource_sec2ctxCanCopy; - pThis->__sec2ctxIsSwMethodStalling__ = &__nvoc_thunk_ChannelDescendant_sec2ctxIsSwMethodStalling; + // sec2ctxIsDuplicate -- virtual inherited (res) base (chandes) + pThis->__sec2ctxIsDuplicate__ = &__nvoc_up_thunk_RsResource_sec2ctxIsDuplicate; - pThis->__sec2ctxControlFilter__ = &__nvoc_thunk_RsResource_sec2ctxControlFilter; + // sec2ctxPreDestruct -- virtual inherited (res) base (chandes) + pThis->__sec2ctxPreDestruct__ = &__nvoc_up_thunk_RsResource_sec2ctxPreDestruct; - pThis->__sec2ctxUnregisterEvent__ = &__nvoc_thunk_Notifier_sec2ctxUnregisterEvent; + // sec2ctxControlFilter -- virtual inherited (res) base (chandes) + pThis->__sec2ctxControlFilter__ = &__nvoc_up_thunk_RsResource_sec2ctxControlFilter; - pThis->__sec2ctxControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_sec2ctxControlSerialization_Prologue; + // sec2ctxIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body + pThis->__sec2ctxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_sec2ctxIsPartialUnmapSupported; - pThis->__sec2ctxCanCopy__ = &__nvoc_thunk_RsResource_sec2ctxCanCopy; + // sec2ctxMapTo -- virtual inherited (res) base (chandes) + pThis->__sec2ctxMapTo__ = &__nvoc_up_thunk_RsResource_sec2ctxMapTo; - pThis->__sec2ctxIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_sec2ctxIsPartialUnmapSupported; + // sec2ctxUnmapFrom -- virtual inherited (res) base (chandes) + pThis->__sec2ctxUnmapFrom__ = &__nvoc_up_thunk_RsResource_sec2ctxUnmapFrom; - pThis->__sec2ctxPreDestruct__ = &__nvoc_thunk_RsResource_sec2ctxPreDestruct; + // sec2ctxGetRefCount -- virtual inherited (res) base (chandes) + pThis->__sec2ctxGetRefCount__ = &__nvoc_up_thunk_RsResource_sec2ctxGetRefCount; - pThis->__sec2ctxIsDuplicate__ = &__nvoc_thunk_RsResource_sec2ctxIsDuplicate; + // sec2ctxAddAdditionalDependants -- virtual inherited (res) base (chandes) + pThis->__sec2ctxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_sec2ctxAddAdditionalDependants; - pThis->__sec2ctxControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_sec2ctxControlSerialization_Epilogue; + // sec2ctxGetNotificationListPtr -- virtual inherited (notify) base (chandes) + pThis->__sec2ctxGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_sec2ctxGetNotificationListPtr; - pThis->__sec2ctxGetNotificationListPtr__ = &__nvoc_thunk_Notifier_sec2ctxGetNotificationListPtr; + // sec2ctxGetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__sec2ctxGetNotificationShare__ = &__nvoc_up_thunk_Notifier_sec2ctxGetNotificationShare; - pThis->__sec2ctxGetNotificationShare__ = &__nvoc_thunk_Notifier_sec2ctxGetNotificationShare; + // sec2ctxSetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__sec2ctxSetNotificationShare__ = &__nvoc_up_thunk_Notifier_sec2ctxSetNotificationShare; - pThis->__sec2ctxMap__ = &__nvoc_thunk_GpuResource_sec2ctxMap; + // sec2ctxUnregisterEvent -- virtual inherited (notify) base (chandes) + pThis->__sec2ctxUnregisterEvent__ = &__nvoc_up_thunk_Notifier_sec2ctxUnregisterEvent; - pThis->__sec2ctxGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_sec2ctxGetOrAllocNotifShare; -} + // sec2ctxGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) + pThis->__sec2ctxGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_sec2ctxGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_Sec2Context_1 with approximately 32 basic block(s). + +// Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_Sec2Context(Sec2Context *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 32 per-object function pointer(s). __nvoc_init_funcTable_Sec2Context_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_sec2_context_nvoc.h b/src/nvidia/generated/g_sec2_context_nvoc.h index 013f08ba62..ad4d973b8a 100644 --- a/src/nvidia/generated/g_sec2_context_nvoc.h +++ b/src/nvidia/generated/g_sec2_context_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_SEC2_CONTEXT_NVOC_H_ #define _G_SEC2_CONTEXT_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_sec2_context_nvoc.h" #ifndef SEC2_CONTEXT_H @@ -52,50 +60,59 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct Sec2Context { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; - struct Sec2Context *__nvoc_pbase_Sec2Context; - NV_STATUS (*__sec2ctxCheckMemInterUnmap__)(struct Sec2Context *, NvBool); - NvBool (*__sec2ctxShareCallback__)(struct Sec2Context *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NvBool (*__sec2ctxAccessCallback__)(struct Sec2Context *, struct RsClient *, void *, RsAccessRight); - NV_STATUS (*__sec2ctxMapTo__)(struct Sec2Context *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__sec2ctxGetMapAddrSpace__)(struct Sec2Context *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__sec2ctxSetNotificationShare__)(struct Sec2Context *, struct NotifShare *); - NvU32 (*__sec2ctxGetRefCount__)(struct Sec2Context *); - void (*__sec2ctxAddAdditionalDependants__)(struct RsClient *, struct Sec2Context *, RsResourceRef *); - NV_STATUS (*__sec2ctxControl_Prologue__)(struct Sec2Context *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__sec2ctxGetRegBaseOffsetAndSize__)(struct Sec2Context *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__sec2ctxInternalControlForward__)(struct Sec2Context *, NvU32, void *, NvU32); - NV_STATUS (*__sec2ctxUnmapFrom__)(struct Sec2Context *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__sec2ctxControl_Epilogue__)(struct Sec2Context *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__sec2ctxGetSwMethods__)(struct Sec2Context *, const METHOD **, NvU32 *); - NvHandle (*__sec2ctxGetInternalObjectHandle__)(struct Sec2Context *); - NV_STATUS (*__sec2ctxControl__)(struct Sec2Context *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__sec2ctxUnmap__)(struct Sec2Context *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__sec2ctxGetMemInterMapParams__)(struct Sec2Context *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__sec2ctxGetMemoryMappingDescriptor__)(struct Sec2Context *, struct MEMORY_DESCRIPTOR **); - NvBool (*__sec2ctxIsSwMethodStalling__)(struct Sec2Context *, NvU32); - NV_STATUS (*__sec2ctxControlFilter__)(struct Sec2Context *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__sec2ctxUnregisterEvent__)(struct Sec2Context *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__sec2ctxControlSerialization_Prologue__)(struct Sec2Context *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__sec2ctxCanCopy__)(struct Sec2Context *); - NvBool (*__sec2ctxIsPartialUnmapSupported__)(struct Sec2Context *); - void (*__sec2ctxPreDestruct__)(struct Sec2Context *); - NV_STATUS (*__sec2ctxIsDuplicate__)(struct Sec2Context *, NvHandle, NvBool *); - void (*__sec2ctxControlSerialization_Epilogue__)(struct Sec2Context *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__sec2ctxGetNotificationListPtr__)(struct Sec2Context *); - struct NotifShare *(*__sec2ctxGetNotificationShare__)(struct Sec2Context *); - NV_STATUS (*__sec2ctxMap__)(struct Sec2Context *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NV_STATUS (*__sec2ctxGetOrAllocNotifShare__)(struct Sec2Context *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super^2 + struct INotifier *__nvoc_pbase_INotifier; // inotify super^3 + struct Notifier *__nvoc_pbase_Notifier; // notify super^2 + struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super + struct Sec2Context *__nvoc_pbase_Sec2Context; // sec2ctx + + // Vtable with 32 per-object function pointers + NV_STATUS (*__sec2ctxGetSwMethods__)(struct Sec2Context * /*this*/, const METHOD **, NvU32 *); // virtual inherited (chandes) base (chandes) + NvBool (*__sec2ctxIsSwMethodStalling__)(struct Sec2Context * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__sec2ctxCheckMemInterUnmap__)(struct Sec2Context * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__sec2ctxControl__)(struct Sec2Context * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__sec2ctxMap__)(struct Sec2Context * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__sec2ctxUnmap__)(struct Sec2Context * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NvBool (*__sec2ctxShareCallback__)(struct Sec2Context * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__sec2ctxGetRegBaseOffsetAndSize__)(struct Sec2Context * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__sec2ctxGetMapAddrSpace__)(struct Sec2Context * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__sec2ctxInternalControlForward__)(struct Sec2Context * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (chandes) + NvHandle (*__sec2ctxGetInternalObjectHandle__)(struct Sec2Context * /*this*/); // virtual inherited (gpures) base (chandes) + NvBool (*__sec2ctxAccessCallback__)(struct Sec2Context * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__sec2ctxGetMemInterMapParams__)(struct Sec2Context * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__sec2ctxGetMemoryMappingDescriptor__)(struct Sec2Context * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__sec2ctxControlSerialization_Prologue__)(struct Sec2Context * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__sec2ctxControlSerialization_Epilogue__)(struct Sec2Context * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__sec2ctxControl_Prologue__)(struct Sec2Context * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__sec2ctxControl_Epilogue__)(struct Sec2Context * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NvBool (*__sec2ctxCanCopy__)(struct Sec2Context * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__sec2ctxIsDuplicate__)(struct Sec2Context * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (chandes) + void (*__sec2ctxPreDestruct__)(struct Sec2Context * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__sec2ctxControlFilter__)(struct Sec2Context * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (chandes) + NvBool (*__sec2ctxIsPartialUnmapSupported__)(struct Sec2Context * /*this*/); // inline virtual inherited (res) base (chandes) body + NV_STATUS (*__sec2ctxMapTo__)(struct Sec2Context * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (chandes) + NV_STATUS (*__sec2ctxUnmapFrom__)(struct Sec2Context * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (chandes) + NvU32 (*__sec2ctxGetRefCount__)(struct Sec2Context * /*this*/); // virtual inherited (res) base (chandes) + void (*__sec2ctxAddAdditionalDependants__)(struct RsClient *, struct Sec2Context * /*this*/, RsResourceRef *); // virtual inherited (res) base (chandes) + PEVENTNOTIFICATION * (*__sec2ctxGetNotificationListPtr__)(struct Sec2Context * /*this*/); // virtual inherited (notify) base (chandes) + struct NotifShare * (*__sec2ctxGetNotificationShare__)(struct Sec2Context * /*this*/); // virtual inherited (notify) base (chandes) + void (*__sec2ctxSetNotificationShare__)(struct Sec2Context * /*this*/, struct NotifShare *); // virtual inherited (notify) base (chandes) + NV_STATUS (*__sec2ctxUnregisterEvent__)(struct Sec2Context * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (chandes) + NV_STATUS (*__sec2ctxGetOrAllocNotifShare__)(struct Sec2Context * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (chandes) }; #ifndef __NVOC_CLASS_Sec2Context_TYPEDEF__ @@ -107,6 +124,7 @@ typedef struct Sec2Context Sec2Context; #define __nvoc_class_id_Sec2Context 0x4c3439 #endif /* __nvoc_class_id_Sec2Context */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_Sec2Context; #define __staticCast_Sec2Context(pThis) \ @@ -119,138 +137,126 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_Sec2Context; ((Sec2Context*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(Sec2Context))) #endif //__nvoc_sec2_context_h_disabled - NV_STATUS __nvoc_objCreateDynamic_Sec2Context(Sec2Context**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_Sec2Context(Sec2Context**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_Sec2Context(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_Sec2Context((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define sec2ctxGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ +#define sec2ctxGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) sec2ctxGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) +#define sec2ctxIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define sec2ctxIsSwMethodStalling(pChannelDescendant, hHandle) sec2ctxIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) +#define sec2ctxCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ #define sec2ctxCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) sec2ctxCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) +#define sec2ctxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define sec2ctxControl(pGpuResource, pCallContext, pParams) sec2ctxControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define sec2ctxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define sec2ctxMap(pGpuResource, pCallContext, pParams, pCpuMapping) sec2ctxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define sec2ctxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define sec2ctxUnmap(pGpuResource, pCallContext, pCpuMapping) sec2ctxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define sec2ctxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ #define sec2ctxShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) sec2ctxShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define sec2ctxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) sec2ctxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define sec2ctxMapTo(pResource, pParams) sec2ctxMapTo_DISPATCH(pResource, pParams) -#define sec2ctxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) sec2ctxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define sec2ctxSetNotificationShare(pNotifier, pNotifShare) sec2ctxSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define sec2ctxGetRefCount(pResource) sec2ctxGetRefCount_DISPATCH(pResource) -#define sec2ctxAddAdditionalDependants(pClient, pResource, pReference) sec2ctxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define sec2ctxControl_Prologue(pResource, pCallContext, pParams) sec2ctxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define sec2ctxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define sec2ctxGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) sec2ctxGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define sec2ctxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define sec2ctxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) sec2ctxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define sec2ctxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define sec2ctxInternalControlForward(pGpuResource, command, pParams, size) sec2ctxInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define sec2ctxUnmapFrom(pResource, pParams) sec2ctxUnmapFrom_DISPATCH(pResource, pParams) -#define sec2ctxControl_Epilogue(pResource, pCallContext, pParams) sec2ctxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define sec2ctxGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) sec2ctxGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) +#define sec2ctxGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define sec2ctxGetInternalObjectHandle(pGpuResource) sec2ctxGetInternalObjectHandle_DISPATCH(pGpuResource) -#define sec2ctxControl(pGpuResource, pCallContext, pParams) sec2ctxControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define sec2ctxUnmap(pGpuResource, pCallContext, pCpuMapping) sec2ctxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define sec2ctxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define sec2ctxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) sec2ctxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define sec2ctxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define sec2ctxGetMemInterMapParams(pRmResource, pParams) sec2ctxGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define sec2ctxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define sec2ctxGetMemoryMappingDescriptor(pRmResource, ppMemDesc) sec2ctxGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define sec2ctxIsSwMethodStalling(pChannelDescendant, hHandle) sec2ctxIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define sec2ctxControlFilter(pResource, pCallContext, pParams) sec2ctxControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define sec2ctxUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) sec2ctxUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define sec2ctxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define sec2ctxControlSerialization_Prologue(pResource, pCallContext, pParams) sec2ctxControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define sec2ctxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define sec2ctxControlSerialization_Epilogue(pResource, pCallContext, pParams) sec2ctxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define sec2ctxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define sec2ctxControl_Prologue(pResource, pCallContext, pParams) sec2ctxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define sec2ctxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define sec2ctxControl_Epilogue(pResource, pCallContext, pParams) sec2ctxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define sec2ctxCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define sec2ctxCanCopy(pResource) sec2ctxCanCopy_DISPATCH(pResource) -#define sec2ctxIsPartialUnmapSupported(pResource) sec2ctxIsPartialUnmapSupported_DISPATCH(pResource) -#define sec2ctxPreDestruct(pResource) sec2ctxPreDestruct_DISPATCH(pResource) +#define sec2ctxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define sec2ctxIsDuplicate(pResource, hMemory, pDuplicate) sec2ctxIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define sec2ctxControlSerialization_Epilogue(pResource, pCallContext, pParams) sec2ctxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define sec2ctxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define sec2ctxPreDestruct(pResource) sec2ctxPreDestruct_DISPATCH(pResource) +#define sec2ctxControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define sec2ctxControlFilter(pResource, pCallContext, pParams) sec2ctxControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define sec2ctxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define sec2ctxIsPartialUnmapSupported(pResource) sec2ctxIsPartialUnmapSupported_DISPATCH(pResource) +#define sec2ctxMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define sec2ctxMapTo(pResource, pParams) sec2ctxMapTo_DISPATCH(pResource, pParams) +#define sec2ctxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define sec2ctxUnmapFrom(pResource, pParams) sec2ctxUnmapFrom_DISPATCH(pResource, pParams) +#define sec2ctxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define sec2ctxGetRefCount(pResource) sec2ctxGetRefCount_DISPATCH(pResource) +#define sec2ctxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define sec2ctxAddAdditionalDependants(pClient, pResource, pReference) sec2ctxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define sec2ctxGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define sec2ctxGetNotificationListPtr(pNotifier) sec2ctxGetNotificationListPtr_DISPATCH(pNotifier) +#define sec2ctxGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ #define sec2ctxGetNotificationShare(pNotifier) sec2ctxGetNotificationShare_DISPATCH(pNotifier) -#define sec2ctxMap(pGpuResource, pCallContext, pParams, pCpuMapping) sec2ctxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define sec2ctxSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define sec2ctxSetNotificationShare(pNotifier, pNotifShare) sec2ctxSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define sec2ctxUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define sec2ctxUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) sec2ctxUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define sec2ctxGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ #define sec2ctxGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) sec2ctxGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -NV_STATUS sec2ctxConstructHal_KERNEL(struct Sec2Context *pSec2Context, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); - -#ifdef __nvoc_sec2_context_h_disabled -static inline NV_STATUS sec2ctxConstructHal(struct Sec2Context *pSec2Context, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - NV_ASSERT_FAILED_PRECOMP("Sec2Context was disabled!"); - return NV_ERR_NOT_SUPPORTED; +// Dispatch functions +static inline NV_STATUS sec2ctxGetSwMethods_DISPATCH(struct Sec2Context *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { + return pChannelDescendant->__sec2ctxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); } -#else //__nvoc_sec2_context_h_disabled -#define sec2ctxConstructHal(pSec2Context, pCallContext, pParams) sec2ctxConstructHal_KERNEL(pSec2Context, pCallContext, pParams) -#endif //__nvoc_sec2_context_h_disabled -#define sec2ctxConstructHal_HAL(pSec2Context, pCallContext, pParams) sec2ctxConstructHal(pSec2Context, pCallContext, pParams) - -void sec2ctxDestructHal_KERNEL(struct Sec2Context *pSec2Context); - - -#ifdef __nvoc_sec2_context_h_disabled -static inline void sec2ctxDestructHal(struct Sec2Context *pSec2Context) { - NV_ASSERT_FAILED_PRECOMP("Sec2Context was disabled!"); +static inline NvBool sec2ctxIsSwMethodStalling_DISPATCH(struct Sec2Context *pChannelDescendant, NvU32 hHandle) { + return pChannelDescendant->__sec2ctxIsSwMethodStalling__(pChannelDescendant, hHandle); } -#else //__nvoc_sec2_context_h_disabled -#define sec2ctxDestructHal(pSec2Context) sec2ctxDestructHal_KERNEL(pSec2Context) -#endif //__nvoc_sec2_context_h_disabled - -#define sec2ctxDestructHal_HAL(pSec2Context) sec2ctxDestructHal(pSec2Context) static inline NV_STATUS sec2ctxCheckMemInterUnmap_DISPATCH(struct Sec2Context *pChannelDescendant, NvBool bSubdeviceHandleProvided) { return pChannelDescendant->__sec2ctxCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } -static inline NvBool sec2ctxShareCallback_DISPATCH(struct Sec2Context *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__sec2ctxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NvBool sec2ctxAccessCallback_DISPATCH(struct Sec2Context *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__sec2ctxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} - -static inline NV_STATUS sec2ctxMapTo_DISPATCH(struct Sec2Context *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__sec2ctxMapTo__(pResource, pParams); -} - -static inline NV_STATUS sec2ctxGetMapAddrSpace_DISPATCH(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__sec2ctxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); -} - -static inline void sec2ctxSetNotificationShare_DISPATCH(struct Sec2Context *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__sec2ctxSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS sec2ctxControl_DISPATCH(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__sec2ctxControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 sec2ctxGetRefCount_DISPATCH(struct Sec2Context *pResource) { - return pResource->__sec2ctxGetRefCount__(pResource); +static inline NV_STATUS sec2ctxMap_DISPATCH(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__sec2ctxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void sec2ctxAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct Sec2Context *pResource, RsResourceRef *pReference) { - pResource->__sec2ctxAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS sec2ctxUnmap_DISPATCH(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__sec2ctxUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS sec2ctxControl_Prologue_DISPATCH(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__sec2ctxControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool sec2ctxShareCallback_DISPATCH(struct Sec2Context *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__sec2ctxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS sec2ctxGetRegBaseOffsetAndSize_DISPATCH(struct Sec2Context *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__sec2ctxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS sec2ctxInternalControlForward_DISPATCH(struct Sec2Context *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__sec2ctxInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS sec2ctxUnmapFrom_DISPATCH(struct Sec2Context *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__sec2ctxUnmapFrom__(pResource, pParams); -} - -static inline void sec2ctxControl_Epilogue_DISPATCH(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__sec2ctxControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS sec2ctxGetMapAddrSpace_DISPATCH(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__sec2ctxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NV_STATUS sec2ctxGetSwMethods_DISPATCH(struct Sec2Context *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return pChannelDescendant->__sec2ctxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); +static inline NV_STATUS sec2ctxInternalControlForward_DISPATCH(struct Sec2Context *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__sec2ctxInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle sec2ctxGetInternalObjectHandle_DISPATCH(struct Sec2Context *pGpuResource) { return pGpuResource->__sec2ctxGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS sec2ctxControl_DISPATCH(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__sec2ctxControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS sec2ctxUnmap_DISPATCH(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__sec2ctxUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool sec2ctxAccessCallback_DISPATCH(struct Sec2Context *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__sec2ctxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS sec2ctxGetMemInterMapParams_DISPATCH(struct Sec2Context *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { @@ -261,58 +267,105 @@ static inline NV_STATUS sec2ctxGetMemoryMappingDescriptor_DISPATCH(struct Sec2Co return pRmResource->__sec2ctxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NvBool sec2ctxIsSwMethodStalling_DISPATCH(struct Sec2Context *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__sec2ctxIsSwMethodStalling__(pChannelDescendant, hHandle); +static inline NV_STATUS sec2ctxControlSerialization_Prologue_DISPATCH(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__sec2ctxControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS sec2ctxControlFilter_DISPATCH(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__sec2ctxControlFilter__(pResource, pCallContext, pParams); +static inline void sec2ctxControlSerialization_Epilogue_DISPATCH(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__sec2ctxControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS sec2ctxUnregisterEvent_DISPATCH(struct Sec2Context *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__sec2ctxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline NV_STATUS sec2ctxControl_Prologue_DISPATCH(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__sec2ctxControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS sec2ctxControlSerialization_Prologue_DISPATCH(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__sec2ctxControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline void sec2ctxControl_Epilogue_DISPATCH(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__sec2ctxControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool sec2ctxCanCopy_DISPATCH(struct Sec2Context *pResource) { return pResource->__sec2ctxCanCopy__(pResource); } -static inline NvBool sec2ctxIsPartialUnmapSupported_DISPATCH(struct Sec2Context *pResource) { - return pResource->__sec2ctxIsPartialUnmapSupported__(pResource); +static inline NV_STATUS sec2ctxIsDuplicate_DISPATCH(struct Sec2Context *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__sec2ctxIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void sec2ctxPreDestruct_DISPATCH(struct Sec2Context *pResource) { pResource->__sec2ctxPreDestruct__(pResource); } -static inline NV_STATUS sec2ctxIsDuplicate_DISPATCH(struct Sec2Context *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__sec2ctxIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS sec2ctxControlFilter_DISPATCH(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__sec2ctxControlFilter__(pResource, pCallContext, pParams); } -static inline void sec2ctxControlSerialization_Epilogue_DISPATCH(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__sec2ctxControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool sec2ctxIsPartialUnmapSupported_DISPATCH(struct Sec2Context *pResource) { + return pResource->__sec2ctxIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS sec2ctxMapTo_DISPATCH(struct Sec2Context *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__sec2ctxMapTo__(pResource, pParams); +} + +static inline NV_STATUS sec2ctxUnmapFrom_DISPATCH(struct Sec2Context *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__sec2ctxUnmapFrom__(pResource, pParams); +} + +static inline NvU32 sec2ctxGetRefCount_DISPATCH(struct Sec2Context *pResource) { + return pResource->__sec2ctxGetRefCount__(pResource); } -static inline PEVENTNOTIFICATION *sec2ctxGetNotificationListPtr_DISPATCH(struct Sec2Context *pNotifier) { +static inline void sec2ctxAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct Sec2Context *pResource, RsResourceRef *pReference) { + pResource->__sec2ctxAddAdditionalDependants__(pClient, pResource, pReference); +} + +static inline PEVENTNOTIFICATION * sec2ctxGetNotificationListPtr_DISPATCH(struct Sec2Context *pNotifier) { return pNotifier->__sec2ctxGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *sec2ctxGetNotificationShare_DISPATCH(struct Sec2Context *pNotifier) { +static inline struct NotifShare * sec2ctxGetNotificationShare_DISPATCH(struct Sec2Context *pNotifier) { return pNotifier->__sec2ctxGetNotificationShare__(pNotifier); } -static inline NV_STATUS sec2ctxMap_DISPATCH(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__sec2ctxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void sec2ctxSetNotificationShare_DISPATCH(struct Sec2Context *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__sec2ctxSetNotificationShare__(pNotifier, pNotifShare); +} + +static inline NV_STATUS sec2ctxUnregisterEvent_DISPATCH(struct Sec2Context *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__sec2ctxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS sec2ctxGetOrAllocNotifShare_DISPATCH(struct Sec2Context *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return pNotifier->__sec2ctxGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } +NV_STATUS sec2ctxConstructHal_KERNEL(struct Sec2Context *pSec2Context, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); + + +#ifdef __nvoc_sec2_context_h_disabled +static inline NV_STATUS sec2ctxConstructHal(struct Sec2Context *pSec2Context, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + NV_ASSERT_FAILED_PRECOMP("Sec2Context was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_sec2_context_h_disabled +#define sec2ctxConstructHal(pSec2Context, pCallContext, pParams) sec2ctxConstructHal_KERNEL(pSec2Context, pCallContext, pParams) +#endif //__nvoc_sec2_context_h_disabled + +#define sec2ctxConstructHal_HAL(pSec2Context, pCallContext, pParams) sec2ctxConstructHal(pSec2Context, pCallContext, pParams) + +void sec2ctxDestructHal_KERNEL(struct Sec2Context *pSec2Context); + + +#ifdef __nvoc_sec2_context_h_disabled +static inline void sec2ctxDestructHal(struct Sec2Context *pSec2Context) { + NV_ASSERT_FAILED_PRECOMP("Sec2Context was disabled!"); +} +#else //__nvoc_sec2_context_h_disabled +#define sec2ctxDestructHal(pSec2Context) sec2ctxDestructHal_KERNEL(pSec2Context) +#endif //__nvoc_sec2_context_h_disabled + +#define sec2ctxDestructHal_HAL(pSec2Context) sec2ctxDestructHal(pSec2Context) + static inline NV_STATUS __nvoc_sec2ctxConstruct(struct Sec2Context *arg_pSec2Context, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams) { return sec2ctxConstructHal(arg_pSec2Context, arg_pCallContext, arg_pParams); } diff --git a/src/nvidia/generated/g_sec2_utils_nvoc.c b/src/nvidia/generated/g_sec2_utils_nvoc.c index f2cc26c1f5..733f1310da 100644 --- a/src/nvidia/generated/g_sec2_utils_nvoc.c +++ b/src/nvidia/generated/g_sec2_utils_nvoc.c @@ -93,10 +93,13 @@ NV_STATUS __nvoc_ctor_Sec2Utils(Sec2Utils *pThis, struct OBJGPU * arg_pGpu, KERN return status; } +// Vtable initialization static void __nvoc_init_funcTable_Sec2Utils_1(Sec2Utils *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_Sec2Utils_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_Sec2Utils(Sec2Utils *pThis) { __nvoc_init_funcTable_Sec2Utils_1(pThis); } diff --git a/src/nvidia/generated/g_sec2_utils_nvoc.h b/src/nvidia/generated/g_sec2_utils_nvoc.h index 85996f82b8..184985ee5c 100644 --- a/src/nvidia/generated/g_sec2_utils_nvoc.h +++ b/src/nvidia/generated/g_sec2_utils_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_SEC2_UTILS_NVOC_H_ #define _G_SEC2_UTILS_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_sec2_utils_nvoc.h" #ifndef SEC2_UTILS_H @@ -71,11 +79,20 @@ typedef struct #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct Sec2Utils { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct Sec2Utils *__nvoc_pbase_Sec2Utils; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct Sec2Utils *__nvoc_pbase_Sec2Utils; // sec2utils + + // Data members NvHandle hClient; NvHandle hDevice; NvHandle hSubdevice; @@ -100,6 +117,7 @@ typedef struct Sec2Utils Sec2Utils; #define __nvoc_class_id_Sec2Utils 0x7716b1 #endif /* __nvoc_class_id_Sec2Utils */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_Sec2Utils; #define __staticCast_Sec2Utils(pThis) \ @@ -112,13 +130,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_Sec2Utils; ((Sec2Utils*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(Sec2Utils))) #endif //__nvoc_sec2_utils_h_disabled - NV_STATUS __nvoc_objCreateDynamic_Sec2Utils(Sec2Utils**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_Sec2Utils(Sec2Utils**, Dynamic*, NvU32, struct OBJGPU * arg_pGpu, KERNEL_MIG_GPU_INSTANCE * arg_pKernelMIGGPUInstance); #define __objCreate_Sec2Utils(ppNewObj, pParent, createFlags, arg_pGpu, arg_pKernelMIGGPUInstance) \ __nvoc_objCreate_Sec2Utils((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pGpu, arg_pKernelMIGGPUInstance) + +// Wrapper macros + +// Dispatch functions NV_STATUS sec2utilsConstruct_IMPL(struct Sec2Utils *arg_psec2utils, struct OBJGPU *arg_pGpu, KERNEL_MIG_GPU_INSTANCE *arg_pKernelMIGGPUInstance); #define __nvoc_sec2utilsConstruct(arg_psec2utils, arg_pGpu, arg_pKernelMIGGPUInstance) sec2utilsConstruct_IMPL(arg_psec2utils, arg_pGpu, arg_pKernelMIGGPUInstance) diff --git a/src/nvidia/generated/g_sem_surf_nvoc.c b/src/nvidia/generated/g_sem_surf_nvoc.c index 47df115d88..4d09288a14 100644 --- a/src/nvidia/generated/g_sem_surf_nvoc.c +++ b/src/nvidia/generated/g_sem_surf_nvoc.c @@ -93,106 +93,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_SemaphoreSurface = /*pExportInfo=*/ &__nvoc_export_info_SemaphoreSurface }; -static NvBool __nvoc_thunk_SemaphoreSurface_resCanCopy(struct RsResource *pSemSurf) { - return semsurfCanCopy((struct SemaphoreSurface *)(((unsigned char *)pSemSurf) - __nvoc_rtti_SemaphoreSurface_RsResource.offset)); -} - -static NvBool __nvoc_thunk_GpuResource_semsurfShareCallback(struct SemaphoreSurface *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_semsurfCheckMemInterUnmap(struct SemaphoreSurface *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RsResource_semsurfMapTo(struct SemaphoreSurface *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_semsurfGetMapAddrSpace(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} - -static NvU32 __nvoc_thunk_RsResource_semsurfGetRefCount(struct SemaphoreSurface *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_semsurfAddAdditionalDependants(struct RsClient *pClient, struct SemaphoreSurface *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_semsurfControl_Prologue(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_semsurfGetRegBaseOffsetAndSize(struct SemaphoreSurface *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), pGpu, pOffset, pSize); -} - -static NV_STATUS __nvoc_thunk_GpuResource_semsurfInternalControlForward(struct SemaphoreSurface *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), command, pParams, size); -} - -static NV_STATUS __nvoc_thunk_RsResource_semsurfUnmapFrom(struct SemaphoreSurface *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_semsurfControl_Epilogue(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), pCallContext, pParams); -} - -static NvHandle __nvoc_thunk_GpuResource_semsurfGetInternalObjectHandle(struct SemaphoreSurface *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_semsurfControl(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_semsurfUnmap(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_semsurfGetMemInterMapParams(struct SemaphoreSurface *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_semsurfGetMemoryMappingDescriptor(struct SemaphoreSurface *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_semsurfControlFilter(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_semsurfControlSerialization_Prologue(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_semsurfIsPartialUnmapSupported(struct SemaphoreSurface *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_semsurfPreDestruct(struct SemaphoreSurface *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_semsurfIsDuplicate(struct SemaphoreSurface *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_semsurfControlSerialization_Epilogue(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_semsurfMap(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_semsurfAccessCallback(struct SemaphoreSurface *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -200,12 +100,12 @@ static NvBool __nvoc_thunk_RmResource_semsurfAccessCallback(struct SemaphoreSurf static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_SemaphoreSurface[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) semsurfCtrlCmdRefMemory_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xda0001u, /*paramSize=*/ sizeof(NV_SEMAPHORE_SURFACE_CTRL_REF_MEMORY_PARAMS), @@ -215,12 +115,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Semaphor #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) semsurfCtrlCmdBindChannel_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) - /*flags=*/ 0x810u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*flags=*/ 0x108u, /*accessRight=*/0x0u, /*methodId=*/ 0xda0002u, /*paramSize=*/ sizeof(NV_SEMAPHORE_SURFACE_CTRL_BIND_CHANNEL_PARAMS), @@ -230,12 +130,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Semaphor #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400009u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) semsurfCtrlCmdRegisterWaiter_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400009u) + /*flags=*/ 0x400009u, /*accessRight=*/0x0u, /*methodId=*/ 0xda0003u, /*paramSize=*/ sizeof(NV_SEMAPHORE_SURFACE_CTRL_REGISTER_WAITER_PARAMS), @@ -245,12 +145,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Semaphor #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) semsurfCtrlCmdSetValue_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0xda0004u, /*paramSize=*/ sizeof(NV_SEMAPHORE_SURFACE_CTRL_SET_VALUE_PARAMS), @@ -260,12 +160,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Semaphor #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) semsurfCtrlCmdUnregisterWaiter_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0xda0005u, /*paramSize=*/ sizeof(NV_SEMAPHORE_SURFACE_CTRL_UNREGISTER_WAITER_PARAMS), @@ -277,6 +177,137 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Semaphor }; +// 1 down-thunk(s) defined to bridge methods in SemaphoreSurface from superclasses + +// semsurfCanCopy: inline virtual override (res) base (gpures) body +static NvBool __nvoc_down_thunk_SemaphoreSurface_resCanCopy(struct RsResource *pSemSurf) { + return semsurfCanCopy((struct SemaphoreSurface *)(((unsigned char *) pSemSurf) - __nvoc_rtti_SemaphoreSurface_RsResource.offset)); +} + + +// 24 up-thunk(s) defined to bridge methods in SemaphoreSurface to superclasses + +// semsurfControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_semsurfControl(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), pCallContext, pParams); +} + +// semsurfMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_semsurfMap(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// semsurfUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_semsurfUnmap(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), pCallContext, pCpuMapping); +} + +// semsurfShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_semsurfShareCallback(struct SemaphoreSurface *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// semsurfGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_semsurfGetRegBaseOffsetAndSize(struct SemaphoreSurface *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), pGpu, pOffset, pSize); +} + +// semsurfGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_semsurfGetMapAddrSpace(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + +// semsurfInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_semsurfInternalControlForward(struct SemaphoreSurface *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), command, pParams, size); +} + +// semsurfGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_semsurfGetInternalObjectHandle(struct SemaphoreSurface *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset)); +} + +// semsurfAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_semsurfAccessCallback(struct SemaphoreSurface *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// semsurfGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_semsurfGetMemInterMapParams(struct SemaphoreSurface *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), pParams); +} + +// semsurfCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_semsurfCheckMemInterUnmap(struct SemaphoreSurface *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), bSubdeviceHandleProvided); +} + +// semsurfGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_semsurfGetMemoryMappingDescriptor(struct SemaphoreSurface *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), ppMemDesc); +} + +// semsurfControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_semsurfControlSerialization_Prologue(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), pCallContext, pParams); +} + +// semsurfControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_semsurfControlSerialization_Epilogue(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), pCallContext, pParams); +} + +// semsurfControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_semsurfControl_Prologue(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), pCallContext, pParams); +} + +// semsurfControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_semsurfControl_Epilogue(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), pCallContext, pParams); +} + +// semsurfIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_semsurfIsDuplicate(struct SemaphoreSurface *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset), hMemory, pDuplicate); +} + +// semsurfPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_semsurfPreDestruct(struct SemaphoreSurface *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset)); +} + +// semsurfControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_semsurfControlFilter(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset), pCallContext, pParams); +} + +// semsurfIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_semsurfIsPartialUnmapSupported(struct SemaphoreSurface *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset)); +} + +// semsurfMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_semsurfMapTo(struct SemaphoreSurface *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset), pParams); +} + +// semsurfUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_semsurfUnmapFrom(struct SemaphoreSurface *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset), pParams); +} + +// semsurfGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_semsurfGetRefCount(struct SemaphoreSurface *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset)); +} + +// semsurfAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_semsurfAddAdditionalDependants(struct RsClient *pClient, struct SemaphoreSurface *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset), pReference); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_SemaphoreSurface = { /*numEntries=*/ 5, @@ -313,83 +344,117 @@ NV_STATUS __nvoc_ctor_SemaphoreSurface(SemaphoreSurface *pThis, CALL_CONTEXT * a return status; } +// Vtable initialization static void __nvoc_init_funcTable_SemaphoreSurface_1(SemaphoreSurface *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // semsurfCanCopy -- inline virtual override (res) base (gpures) body pThis->__semsurfCanCopy__ = &semsurfCanCopy_0c883b; + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_SemaphoreSurface_resCanCopy; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // semsurfCtrlCmdRefMemory -- exported (id=0xda0001) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__semsurfCtrlCmdRefMemory__ = &semsurfCtrlCmdRefMemory_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) + // semsurfCtrlCmdBindChannel -- exported (id=0xda0002) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) pThis->__semsurfCtrlCmdBindChannel__ = &semsurfCtrlCmdBindChannel_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // semsurfCtrlCmdRegisterWaiter -- exported (id=0xda0003) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400009u) pThis->__semsurfCtrlCmdRegisterWaiter__ = &semsurfCtrlCmdRegisterWaiter_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // semsurfCtrlCmdSetValue -- exported (id=0xda0004) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__semsurfCtrlCmdSetValue__ = &semsurfCtrlCmdSetValue_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // semsurfCtrlCmdUnregisterWaiter -- exported (id=0xda0005) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__semsurfCtrlCmdUnregisterWaiter__ = &semsurfCtrlCmdUnregisterWaiter_IMPL; #endif - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_SemaphoreSurface_resCanCopy; + // semsurfControl -- virtual inherited (gpures) base (gpures) + pThis->__semsurfControl__ = &__nvoc_up_thunk_GpuResource_semsurfControl; - pThis->__semsurfShareCallback__ = &__nvoc_thunk_GpuResource_semsurfShareCallback; + // semsurfMap -- virtual inherited (gpures) base (gpures) + pThis->__semsurfMap__ = &__nvoc_up_thunk_GpuResource_semsurfMap; - pThis->__semsurfCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_semsurfCheckMemInterUnmap; + // semsurfUnmap -- virtual inherited (gpures) base (gpures) + pThis->__semsurfUnmap__ = &__nvoc_up_thunk_GpuResource_semsurfUnmap; - pThis->__semsurfMapTo__ = &__nvoc_thunk_RsResource_semsurfMapTo; + // semsurfShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__semsurfShareCallback__ = &__nvoc_up_thunk_GpuResource_semsurfShareCallback; - pThis->__semsurfGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_semsurfGetMapAddrSpace; + // semsurfGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__semsurfGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_semsurfGetRegBaseOffsetAndSize; - pThis->__semsurfGetRefCount__ = &__nvoc_thunk_RsResource_semsurfGetRefCount; + // semsurfGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__semsurfGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_semsurfGetMapAddrSpace; - pThis->__semsurfAddAdditionalDependants__ = &__nvoc_thunk_RsResource_semsurfAddAdditionalDependants; + // semsurfInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__semsurfInternalControlForward__ = &__nvoc_up_thunk_GpuResource_semsurfInternalControlForward; - pThis->__semsurfControl_Prologue__ = &__nvoc_thunk_RmResource_semsurfControl_Prologue; + // semsurfGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__semsurfGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_semsurfGetInternalObjectHandle; - pThis->__semsurfGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_semsurfGetRegBaseOffsetAndSize; + // semsurfAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__semsurfAccessCallback__ = &__nvoc_up_thunk_RmResource_semsurfAccessCallback; - pThis->__semsurfInternalControlForward__ = &__nvoc_thunk_GpuResource_semsurfInternalControlForward; + // semsurfGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__semsurfGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_semsurfGetMemInterMapParams; - pThis->__semsurfUnmapFrom__ = &__nvoc_thunk_RsResource_semsurfUnmapFrom; + // semsurfCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__semsurfCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_semsurfCheckMemInterUnmap; - pThis->__semsurfControl_Epilogue__ = &__nvoc_thunk_RmResource_semsurfControl_Epilogue; + // semsurfGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__semsurfGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_semsurfGetMemoryMappingDescriptor; - pThis->__semsurfGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_semsurfGetInternalObjectHandle; + // semsurfControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__semsurfControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_semsurfControlSerialization_Prologue; - pThis->__semsurfControl__ = &__nvoc_thunk_GpuResource_semsurfControl; + // semsurfControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__semsurfControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_semsurfControlSerialization_Epilogue; - pThis->__semsurfUnmap__ = &__nvoc_thunk_GpuResource_semsurfUnmap; + // semsurfControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__semsurfControl_Prologue__ = &__nvoc_up_thunk_RmResource_semsurfControl_Prologue; - pThis->__semsurfGetMemInterMapParams__ = &__nvoc_thunk_RmResource_semsurfGetMemInterMapParams; + // semsurfControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__semsurfControl_Epilogue__ = &__nvoc_up_thunk_RmResource_semsurfControl_Epilogue; - pThis->__semsurfGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_semsurfGetMemoryMappingDescriptor; + // semsurfIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__semsurfIsDuplicate__ = &__nvoc_up_thunk_RsResource_semsurfIsDuplicate; - pThis->__semsurfControlFilter__ = &__nvoc_thunk_RsResource_semsurfControlFilter; + // semsurfPreDestruct -- virtual inherited (res) base (gpures) + pThis->__semsurfPreDestruct__ = &__nvoc_up_thunk_RsResource_semsurfPreDestruct; - pThis->__semsurfControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_semsurfControlSerialization_Prologue; + // semsurfControlFilter -- virtual inherited (res) base (gpures) + pThis->__semsurfControlFilter__ = &__nvoc_up_thunk_RsResource_semsurfControlFilter; - pThis->__semsurfIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_semsurfIsPartialUnmapSupported; + // semsurfIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__semsurfIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_semsurfIsPartialUnmapSupported; - pThis->__semsurfPreDestruct__ = &__nvoc_thunk_RsResource_semsurfPreDestruct; + // semsurfMapTo -- virtual inherited (res) base (gpures) + pThis->__semsurfMapTo__ = &__nvoc_up_thunk_RsResource_semsurfMapTo; - pThis->__semsurfIsDuplicate__ = &__nvoc_thunk_RsResource_semsurfIsDuplicate; + // semsurfUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__semsurfUnmapFrom__ = &__nvoc_up_thunk_RsResource_semsurfUnmapFrom; - pThis->__semsurfControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_semsurfControlSerialization_Epilogue; + // semsurfGetRefCount -- virtual inherited (res) base (gpures) + pThis->__semsurfGetRefCount__ = &__nvoc_up_thunk_RsResource_semsurfGetRefCount; - pThis->__semsurfMap__ = &__nvoc_thunk_GpuResource_semsurfMap; + // semsurfAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__semsurfAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_semsurfAddAdditionalDependants; +} // End __nvoc_init_funcTable_SemaphoreSurface_1 with approximately 31 basic block(s). - pThis->__semsurfAccessCallback__ = &__nvoc_thunk_RmResource_semsurfAccessCallback; -} +// Initialize vtable(s) for 30 virtual method(s). void __nvoc_init_funcTable_SemaphoreSurface(SemaphoreSurface *pThis) { + + // Initialize vtable(s) with 30 per-object function pointer(s). __nvoc_init_funcTable_SemaphoreSurface_1(pThis); } diff --git a/src/nvidia/generated/g_sem_surf_nvoc.h b/src/nvidia/generated/g_sem_surf_nvoc.h index 66786fdf02..afd14c7af4 100644 --- a/src/nvidia/generated/g_sem_surf_nvoc.h +++ b/src/nvidia/generated/g_sem_surf_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_SEM_SURF_NVOC_H_ #define _G_SEM_SURF_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_sem_surf_nvoc.h" #ifndef SEM_SURF_H @@ -119,45 +127,56 @@ typedef struct { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct SemaphoreSurface { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct SemaphoreSurface *__nvoc_pbase_SemaphoreSurface; - NvBool (*__semsurfCanCopy__)(struct SemaphoreSurface *); - NV_STATUS (*__semsurfCtrlCmdRefMemory__)(struct SemaphoreSurface *, NV_SEMAPHORE_SURFACE_CTRL_REF_MEMORY_PARAMS *); - NV_STATUS (*__semsurfCtrlCmdBindChannel__)(struct SemaphoreSurface *, NV_SEMAPHORE_SURFACE_CTRL_BIND_CHANNEL_PARAMS *); - NV_STATUS (*__semsurfCtrlCmdRegisterWaiter__)(struct SemaphoreSurface *, NV_SEMAPHORE_SURFACE_CTRL_REGISTER_WAITER_PARAMS *); - NV_STATUS (*__semsurfCtrlCmdSetValue__)(struct SemaphoreSurface *, NV_SEMAPHORE_SURFACE_CTRL_SET_VALUE_PARAMS *); - NV_STATUS (*__semsurfCtrlCmdUnregisterWaiter__)(struct SemaphoreSurface *, NV_SEMAPHORE_SURFACE_CTRL_UNREGISTER_WAITER_PARAMS *); - NvBool (*__semsurfShareCallback__)(struct SemaphoreSurface *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__semsurfCheckMemInterUnmap__)(struct SemaphoreSurface *, NvBool); - NV_STATUS (*__semsurfMapTo__)(struct SemaphoreSurface *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__semsurfGetMapAddrSpace__)(struct SemaphoreSurface *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__semsurfGetRefCount__)(struct SemaphoreSurface *); - void (*__semsurfAddAdditionalDependants__)(struct RsClient *, struct SemaphoreSurface *, RsResourceRef *); - NV_STATUS (*__semsurfControl_Prologue__)(struct SemaphoreSurface *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__semsurfGetRegBaseOffsetAndSize__)(struct SemaphoreSurface *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__semsurfInternalControlForward__)(struct SemaphoreSurface *, NvU32, void *, NvU32); - NV_STATUS (*__semsurfUnmapFrom__)(struct SemaphoreSurface *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__semsurfControl_Epilogue__)(struct SemaphoreSurface *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__semsurfGetInternalObjectHandle__)(struct SemaphoreSurface *); - NV_STATUS (*__semsurfControl__)(struct SemaphoreSurface *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__semsurfUnmap__)(struct SemaphoreSurface *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__semsurfGetMemInterMapParams__)(struct SemaphoreSurface *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__semsurfGetMemoryMappingDescriptor__)(struct SemaphoreSurface *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__semsurfControlFilter__)(struct SemaphoreSurface *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__semsurfControlSerialization_Prologue__)(struct SemaphoreSurface *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__semsurfIsPartialUnmapSupported__)(struct SemaphoreSurface *); - void (*__semsurfPreDestruct__)(struct SemaphoreSurface *); - NV_STATUS (*__semsurfIsDuplicate__)(struct SemaphoreSurface *, NvHandle, NvBool *); - void (*__semsurfControlSerialization_Epilogue__)(struct SemaphoreSurface *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__semsurfMap__)(struct SemaphoreSurface *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__semsurfAccessCallback__)(struct SemaphoreSurface *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct SemaphoreSurface *__nvoc_pbase_SemaphoreSurface; // semsurf + + // Vtable with 30 per-object function pointers + NvBool (*__semsurfCanCopy__)(struct SemaphoreSurface * /*this*/); // inline virtual override (res) base (gpures) body + NV_STATUS (*__semsurfCtrlCmdRefMemory__)(struct SemaphoreSurface * /*this*/, NV_SEMAPHORE_SURFACE_CTRL_REF_MEMORY_PARAMS *); // exported (id=0xda0001) + NV_STATUS (*__semsurfCtrlCmdBindChannel__)(struct SemaphoreSurface * /*this*/, NV_SEMAPHORE_SURFACE_CTRL_BIND_CHANNEL_PARAMS *); // exported (id=0xda0002) + NV_STATUS (*__semsurfCtrlCmdRegisterWaiter__)(struct SemaphoreSurface * /*this*/, NV_SEMAPHORE_SURFACE_CTRL_REGISTER_WAITER_PARAMS *); // exported (id=0xda0003) + NV_STATUS (*__semsurfCtrlCmdSetValue__)(struct SemaphoreSurface * /*this*/, NV_SEMAPHORE_SURFACE_CTRL_SET_VALUE_PARAMS *); // exported (id=0xda0004) + NV_STATUS (*__semsurfCtrlCmdUnregisterWaiter__)(struct SemaphoreSurface * /*this*/, NV_SEMAPHORE_SURFACE_CTRL_UNREGISTER_WAITER_PARAMS *); // exported (id=0xda0005) + NV_STATUS (*__semsurfControl__)(struct SemaphoreSurface * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__semsurfMap__)(struct SemaphoreSurface * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__semsurfUnmap__)(struct SemaphoreSurface * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__semsurfShareCallback__)(struct SemaphoreSurface * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__semsurfGetRegBaseOffsetAndSize__)(struct SemaphoreSurface * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__semsurfGetMapAddrSpace__)(struct SemaphoreSurface * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__semsurfInternalControlForward__)(struct SemaphoreSurface * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__semsurfGetInternalObjectHandle__)(struct SemaphoreSurface * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__semsurfAccessCallback__)(struct SemaphoreSurface * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__semsurfGetMemInterMapParams__)(struct SemaphoreSurface * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__semsurfCheckMemInterUnmap__)(struct SemaphoreSurface * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__semsurfGetMemoryMappingDescriptor__)(struct SemaphoreSurface * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__semsurfControlSerialization_Prologue__)(struct SemaphoreSurface * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__semsurfControlSerialization_Epilogue__)(struct SemaphoreSurface * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__semsurfControl_Prologue__)(struct SemaphoreSurface * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__semsurfControl_Epilogue__)(struct SemaphoreSurface * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__semsurfIsDuplicate__)(struct SemaphoreSurface * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__semsurfPreDestruct__)(struct SemaphoreSurface * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__semsurfControlFilter__)(struct SemaphoreSurface * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__semsurfIsPartialUnmapSupported__)(struct SemaphoreSurface * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__semsurfMapTo__)(struct SemaphoreSurface * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__semsurfUnmapFrom__)(struct SemaphoreSurface * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__semsurfGetRefCount__)(struct SemaphoreSurface * /*this*/); // virtual inherited (res) base (gpures) + void (*__semsurfAddAdditionalDependants__)(struct RsClient *, struct SemaphoreSurface * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members SEM_SHARED_DATA *pShared; }; @@ -170,6 +189,7 @@ typedef struct SemaphoreSurface SemaphoreSurface; #define __nvoc_class_id_SemaphoreSurface 0xeabc69 #endif /* __nvoc_class_id_SemaphoreSurface */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_SemaphoreSurface; #define __staticCast_SemaphoreSurface(pThis) \ @@ -182,177 +202,210 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_SemaphoreSurface; ((SemaphoreSurface*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(SemaphoreSurface))) #endif //__nvoc_sem_surf_h_disabled - NV_STATUS __nvoc_objCreateDynamic_SemaphoreSurface(SemaphoreSurface**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_SemaphoreSurface(SemaphoreSurface**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_SemaphoreSurface(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_SemaphoreSurface((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define semsurfCanCopy_FNPTR(pSemSurf) pSemSurf->__semsurfCanCopy__ #define semsurfCanCopy(pSemSurf) semsurfCanCopy_DISPATCH(pSemSurf) +#define semsurfCtrlCmdRefMemory_FNPTR(pSemaphoreSurf) pSemaphoreSurf->__semsurfCtrlCmdRefMemory__ #define semsurfCtrlCmdRefMemory(pSemaphoreSurf, pParams) semsurfCtrlCmdRefMemory_DISPATCH(pSemaphoreSurf, pParams) +#define semsurfCtrlCmdBindChannel_FNPTR(pSemaphoreSurf) pSemaphoreSurf->__semsurfCtrlCmdBindChannel__ #define semsurfCtrlCmdBindChannel(pSemaphoreSurf, pParams) semsurfCtrlCmdBindChannel_DISPATCH(pSemaphoreSurf, pParams) +#define semsurfCtrlCmdRegisterWaiter_FNPTR(pSemaphoreSurf) pSemaphoreSurf->__semsurfCtrlCmdRegisterWaiter__ #define semsurfCtrlCmdRegisterWaiter(pSemaphoreSurf, pParams) semsurfCtrlCmdRegisterWaiter_DISPATCH(pSemaphoreSurf, pParams) +#define semsurfCtrlCmdSetValue_FNPTR(pSemaphoreSurf) pSemaphoreSurf->__semsurfCtrlCmdSetValue__ #define semsurfCtrlCmdSetValue(pSemaphoreSurf, pParams) semsurfCtrlCmdSetValue_DISPATCH(pSemaphoreSurf, pParams) +#define semsurfCtrlCmdUnregisterWaiter_FNPTR(pSemaphoreSurf) pSemaphoreSurf->__semsurfCtrlCmdUnregisterWaiter__ #define semsurfCtrlCmdUnregisterWaiter(pSemaphoreSurf, pParams) semsurfCtrlCmdUnregisterWaiter_DISPATCH(pSemaphoreSurf, pParams) +#define semsurfControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define semsurfControl(pGpuResource, pCallContext, pParams) semsurfControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define semsurfMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define semsurfMap(pGpuResource, pCallContext, pParams, pCpuMapping) semsurfMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define semsurfUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define semsurfUnmap(pGpuResource, pCallContext, pCpuMapping) semsurfUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define semsurfShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define semsurfShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) semsurfShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define semsurfCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) semsurfCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define semsurfMapTo(pResource, pParams) semsurfMapTo_DISPATCH(pResource, pParams) -#define semsurfGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) semsurfGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define semsurfGetRefCount(pResource) semsurfGetRefCount_DISPATCH(pResource) -#define semsurfAddAdditionalDependants(pClient, pResource, pReference) semsurfAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define semsurfControl_Prologue(pResource, pCallContext, pParams) semsurfControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define semsurfGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define semsurfGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) semsurfGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define semsurfGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define semsurfGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) semsurfGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define semsurfInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define semsurfInternalControlForward(pGpuResource, command, pParams, size) semsurfInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define semsurfUnmapFrom(pResource, pParams) semsurfUnmapFrom_DISPATCH(pResource, pParams) -#define semsurfControl_Epilogue(pResource, pCallContext, pParams) semsurfControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define semsurfGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define semsurfGetInternalObjectHandle(pGpuResource) semsurfGetInternalObjectHandle_DISPATCH(pGpuResource) -#define semsurfControl(pGpuResource, pCallContext, pParams) semsurfControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define semsurfUnmap(pGpuResource, pCallContext, pCpuMapping) semsurfUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define semsurfAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define semsurfAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) semsurfAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define semsurfGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define semsurfGetMemInterMapParams(pRmResource, pParams) semsurfGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define semsurfCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define semsurfCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) semsurfCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define semsurfGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define semsurfGetMemoryMappingDescriptor(pRmResource, ppMemDesc) semsurfGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define semsurfControlFilter(pResource, pCallContext, pParams) semsurfControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define semsurfControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define semsurfControlSerialization_Prologue(pResource, pCallContext, pParams) semsurfControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define semsurfIsPartialUnmapSupported(pResource) semsurfIsPartialUnmapSupported_DISPATCH(pResource) -#define semsurfPreDestruct(pResource) semsurfPreDestruct_DISPATCH(pResource) -#define semsurfIsDuplicate(pResource, hMemory, pDuplicate) semsurfIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define semsurfControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ #define semsurfControlSerialization_Epilogue(pResource, pCallContext, pParams) semsurfControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define semsurfMap(pGpuResource, pCallContext, pParams, pCpuMapping) semsurfMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define semsurfAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) semsurfAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -static inline NvBool semsurfCanCopy_0c883b(struct SemaphoreSurface *pSemSurf) { - return ((NvBool)(0 == 0)); -} +#define semsurfControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define semsurfControl_Prologue(pResource, pCallContext, pParams) semsurfControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define semsurfControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define semsurfControl_Epilogue(pResource, pCallContext, pParams) semsurfControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define semsurfIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define semsurfIsDuplicate(pResource, hMemory, pDuplicate) semsurfIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define semsurfPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define semsurfPreDestruct(pResource) semsurfPreDestruct_DISPATCH(pResource) +#define semsurfControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define semsurfControlFilter(pResource, pCallContext, pParams) semsurfControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define semsurfIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define semsurfIsPartialUnmapSupported(pResource) semsurfIsPartialUnmapSupported_DISPATCH(pResource) +#define semsurfMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define semsurfMapTo(pResource, pParams) semsurfMapTo_DISPATCH(pResource, pParams) +#define semsurfUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define semsurfUnmapFrom(pResource, pParams) semsurfUnmapFrom_DISPATCH(pResource, pParams) +#define semsurfGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define semsurfGetRefCount(pResource) semsurfGetRefCount_DISPATCH(pResource) +#define semsurfAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define semsurfAddAdditionalDependants(pClient, pResource, pReference) semsurfAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NvBool semsurfCanCopy_DISPATCH(struct SemaphoreSurface *pSemSurf) { return pSemSurf->__semsurfCanCopy__(pSemSurf); } -NV_STATUS semsurfCtrlCmdRefMemory_IMPL(struct SemaphoreSurface *pSemaphoreSurf, NV_SEMAPHORE_SURFACE_CTRL_REF_MEMORY_PARAMS *pParams); - static inline NV_STATUS semsurfCtrlCmdRefMemory_DISPATCH(struct SemaphoreSurface *pSemaphoreSurf, NV_SEMAPHORE_SURFACE_CTRL_REF_MEMORY_PARAMS *pParams) { return pSemaphoreSurf->__semsurfCtrlCmdRefMemory__(pSemaphoreSurf, pParams); } -NV_STATUS semsurfCtrlCmdBindChannel_IMPL(struct SemaphoreSurface *pSemaphoreSurf, NV_SEMAPHORE_SURFACE_CTRL_BIND_CHANNEL_PARAMS *pParams); - static inline NV_STATUS semsurfCtrlCmdBindChannel_DISPATCH(struct SemaphoreSurface *pSemaphoreSurf, NV_SEMAPHORE_SURFACE_CTRL_BIND_CHANNEL_PARAMS *pParams) { return pSemaphoreSurf->__semsurfCtrlCmdBindChannel__(pSemaphoreSurf, pParams); } -NV_STATUS semsurfCtrlCmdRegisterWaiter_IMPL(struct SemaphoreSurface *pSemaphoreSurf, NV_SEMAPHORE_SURFACE_CTRL_REGISTER_WAITER_PARAMS *pParams); - static inline NV_STATUS semsurfCtrlCmdRegisterWaiter_DISPATCH(struct SemaphoreSurface *pSemaphoreSurf, NV_SEMAPHORE_SURFACE_CTRL_REGISTER_WAITER_PARAMS *pParams) { return pSemaphoreSurf->__semsurfCtrlCmdRegisterWaiter__(pSemaphoreSurf, pParams); } -NV_STATUS semsurfCtrlCmdSetValue_IMPL(struct SemaphoreSurface *pSemaphoreSurf, NV_SEMAPHORE_SURFACE_CTRL_SET_VALUE_PARAMS *pParams); - static inline NV_STATUS semsurfCtrlCmdSetValue_DISPATCH(struct SemaphoreSurface *pSemaphoreSurf, NV_SEMAPHORE_SURFACE_CTRL_SET_VALUE_PARAMS *pParams) { return pSemaphoreSurf->__semsurfCtrlCmdSetValue__(pSemaphoreSurf, pParams); } -NV_STATUS semsurfCtrlCmdUnregisterWaiter_IMPL(struct SemaphoreSurface *pSemaphoreSurf, NV_SEMAPHORE_SURFACE_CTRL_UNREGISTER_WAITER_PARAMS *pParams); - static inline NV_STATUS semsurfCtrlCmdUnregisterWaiter_DISPATCH(struct SemaphoreSurface *pSemaphoreSurf, NV_SEMAPHORE_SURFACE_CTRL_UNREGISTER_WAITER_PARAMS *pParams) { return pSemaphoreSurf->__semsurfCtrlCmdUnregisterWaiter__(pSemaphoreSurf, pParams); } -static inline NvBool semsurfShareCallback_DISPATCH(struct SemaphoreSurface *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__semsurfShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS semsurfControl_DISPATCH(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__semsurfControl__(pGpuResource, pCallContext, pParams); } -static inline NV_STATUS semsurfCheckMemInterUnmap_DISPATCH(struct SemaphoreSurface *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__semsurfCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS semsurfMap_DISPATCH(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__semsurfMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS semsurfMapTo_DISPATCH(struct SemaphoreSurface *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__semsurfMapTo__(pResource, pParams); +static inline NV_STATUS semsurfUnmap_DISPATCH(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__semsurfUnmap__(pGpuResource, pCallContext, pCpuMapping); +} + +static inline NvBool semsurfShareCallback_DISPATCH(struct SemaphoreSurface *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__semsurfShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +} + +static inline NV_STATUS semsurfGetRegBaseOffsetAndSize_DISPATCH(struct SemaphoreSurface *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__semsurfGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS semsurfGetMapAddrSpace_DISPATCH(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__semsurfGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NvU32 semsurfGetRefCount_DISPATCH(struct SemaphoreSurface *pResource) { - return pResource->__semsurfGetRefCount__(pResource); +static inline NV_STATUS semsurfInternalControlForward_DISPATCH(struct SemaphoreSurface *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__semsurfInternalControlForward__(pGpuResource, command, pParams, size); } -static inline void semsurfAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct SemaphoreSurface *pResource, RsResourceRef *pReference) { - pResource->__semsurfAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvHandle semsurfGetInternalObjectHandle_DISPATCH(struct SemaphoreSurface *pGpuResource) { + return pGpuResource->__semsurfGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS semsurfControl_Prologue_DISPATCH(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__semsurfControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool semsurfAccessCallback_DISPATCH(struct SemaphoreSurface *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__semsurfAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS semsurfGetRegBaseOffsetAndSize_DISPATCH(struct SemaphoreSurface *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__semsurfGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS semsurfGetMemInterMapParams_DISPATCH(struct SemaphoreSurface *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__semsurfGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS semsurfInternalControlForward_DISPATCH(struct SemaphoreSurface *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__semsurfInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS semsurfCheckMemInterUnmap_DISPATCH(struct SemaphoreSurface *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__semsurfCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS semsurfUnmapFrom_DISPATCH(struct SemaphoreSurface *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__semsurfUnmapFrom__(pResource, pParams); +static inline NV_STATUS semsurfGetMemoryMappingDescriptor_DISPATCH(struct SemaphoreSurface *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__semsurfGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline void semsurfControl_Epilogue_DISPATCH(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__semsurfControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS semsurfControlSerialization_Prologue_DISPATCH(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__semsurfControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvHandle semsurfGetInternalObjectHandle_DISPATCH(struct SemaphoreSurface *pGpuResource) { - return pGpuResource->__semsurfGetInternalObjectHandle__(pGpuResource); +static inline void semsurfControlSerialization_Epilogue_DISPATCH(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__semsurfControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS semsurfControl_DISPATCH(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__semsurfControl__(pGpuResource, pCallContext, pParams); +static inline NV_STATUS semsurfControl_Prologue_DISPATCH(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__semsurfControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS semsurfUnmap_DISPATCH(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__semsurfUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline void semsurfControl_Epilogue_DISPATCH(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__semsurfControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS semsurfGetMemInterMapParams_DISPATCH(struct SemaphoreSurface *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__semsurfGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS semsurfIsDuplicate_DISPATCH(struct SemaphoreSurface *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__semsurfIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS semsurfGetMemoryMappingDescriptor_DISPATCH(struct SemaphoreSurface *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__semsurfGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void semsurfPreDestruct_DISPATCH(struct SemaphoreSurface *pResource) { + pResource->__semsurfPreDestruct__(pResource); } static inline NV_STATUS semsurfControlFilter_DISPATCH(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__semsurfControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS semsurfControlSerialization_Prologue_DISPATCH(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__semsurfControlSerialization_Prologue__(pResource, pCallContext, pParams); -} - static inline NvBool semsurfIsPartialUnmapSupported_DISPATCH(struct SemaphoreSurface *pResource) { return pResource->__semsurfIsPartialUnmapSupported__(pResource); } -static inline void semsurfPreDestruct_DISPATCH(struct SemaphoreSurface *pResource) { - pResource->__semsurfPreDestruct__(pResource); +static inline NV_STATUS semsurfMapTo_DISPATCH(struct SemaphoreSurface *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__semsurfMapTo__(pResource, pParams); } -static inline NV_STATUS semsurfIsDuplicate_DISPATCH(struct SemaphoreSurface *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__semsurfIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS semsurfUnmapFrom_DISPATCH(struct SemaphoreSurface *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__semsurfUnmapFrom__(pResource, pParams); } -static inline void semsurfControlSerialization_Epilogue_DISPATCH(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__semsurfControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 semsurfGetRefCount_DISPATCH(struct SemaphoreSurface *pResource) { + return pResource->__semsurfGetRefCount__(pResource); } -static inline NV_STATUS semsurfMap_DISPATCH(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__semsurfMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void semsurfAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct SemaphoreSurface *pResource, RsResourceRef *pReference) { + pResource->__semsurfAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NvBool semsurfAccessCallback_DISPATCH(struct SemaphoreSurface *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__semsurfAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NvBool semsurfCanCopy_0c883b(struct SemaphoreSurface *pSemSurf) { + return ((NvBool)(0 == 0)); } +NV_STATUS semsurfCtrlCmdRefMemory_IMPL(struct SemaphoreSurface *pSemaphoreSurf, NV_SEMAPHORE_SURFACE_CTRL_REF_MEMORY_PARAMS *pParams); + +NV_STATUS semsurfCtrlCmdBindChannel_IMPL(struct SemaphoreSurface *pSemaphoreSurf, NV_SEMAPHORE_SURFACE_CTRL_BIND_CHANNEL_PARAMS *pParams); + +NV_STATUS semsurfCtrlCmdRegisterWaiter_IMPL(struct SemaphoreSurface *pSemaphoreSurf, NV_SEMAPHORE_SURFACE_CTRL_REGISTER_WAITER_PARAMS *pParams); + +NV_STATUS semsurfCtrlCmdSetValue_IMPL(struct SemaphoreSurface *pSemaphoreSurf, NV_SEMAPHORE_SURFACE_CTRL_SET_VALUE_PARAMS *pParams); + +NV_STATUS semsurfCtrlCmdUnregisterWaiter_IMPL(struct SemaphoreSurface *pSemaphoreSurf, NV_SEMAPHORE_SURFACE_CTRL_UNREGISTER_WAITER_PARAMS *pParams); + NV_STATUS semsurfConstruct_IMPL(struct SemaphoreSurface *arg_semaphoreSurf, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_semsurfConstruct(arg_semaphoreSurf, arg_pCallContext, arg_pParams) semsurfConstruct_IMPL(arg_semaphoreSurf, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_spdm_nvoc.c b/src/nvidia/generated/g_spdm_nvoc.c index 1f451c91b4..44fe1edc7f 100644 --- a/src/nvidia/generated/g_spdm_nvoc.c +++ b/src/nvidia/generated/g_spdm_nvoc.c @@ -98,6 +98,7 @@ NV_STATUS __nvoc_ctor_Spdm(Spdm *pThis, RmHalspecOwner *pRmhalspecowner) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_Spdm_1(Spdm *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -106,7 +107,7 @@ static void __nvoc_init_funcTable_Spdm_1(Spdm *pThis, RmHalspecOwner *pRmhalspec PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); - // Hal function -- spdmGetCertChains + // spdmGetCertChains -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__spdmGetCertChains__ = &spdmGetCertChains_GH100; @@ -117,7 +118,7 @@ static void __nvoc_init_funcTable_Spdm_1(Spdm *pThis, RmHalspecOwner *pRmhalspec pThis->__spdmGetCertChains__ = &spdmGetCertChains_46f6a7; } - // Hal function -- spdmGetAttestationReport + // spdmGetAttestationReport -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__spdmGetAttestationReport__ = &spdmGetAttestationReport_GH100; @@ -128,7 +129,7 @@ static void __nvoc_init_funcTable_Spdm_1(Spdm *pThis, RmHalspecOwner *pRmhalspec pThis->__spdmGetAttestationReport__ = &spdmGetAttestationReport_46f6a7; } - // Hal function -- spdmCheckAndExecuteKeyUpdate + // spdmCheckAndExecuteKeyUpdate -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__spdmCheckAndExecuteKeyUpdate__ = &spdmCheckAndExecuteKeyUpdate_GH100; @@ -139,7 +140,7 @@ static void __nvoc_init_funcTable_Spdm_1(Spdm *pThis, RmHalspecOwner *pRmhalspec pThis->__spdmCheckAndExecuteKeyUpdate__ = &spdmCheckAndExecuteKeyUpdate_46f6a7; } - // Hal function -- spdmSendInitRmDataCommand + // spdmSendInitRmDataCommand -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__spdmSendInitRmDataCommand__ = &spdmSendInitRmDataCommand_GH100; @@ -150,7 +151,7 @@ static void __nvoc_init_funcTable_Spdm_1(Spdm *pThis, RmHalspecOwner *pRmhalspec pThis->__spdmSendInitRmDataCommand__ = &spdmSendInitRmDataCommand_46f6a7; } - // Hal function -- spdmRegisterForHeartbeats + // spdmRegisterForHeartbeats -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__spdmRegisterForHeartbeats__ = &spdmRegisterForHeartbeats_GH100; @@ -161,7 +162,7 @@ static void __nvoc_init_funcTable_Spdm_1(Spdm *pThis, RmHalspecOwner *pRmhalspec pThis->__spdmRegisterForHeartbeats__ = &spdmRegisterForHeartbeats_46f6a7; } - // Hal function -- spdmUnregisterFromHeartbeats + // spdmUnregisterFromHeartbeats -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__spdmUnregisterFromHeartbeats__ = &spdmUnregisterFromHeartbeats_GH100; @@ -172,7 +173,7 @@ static void __nvoc_init_funcTable_Spdm_1(Spdm *pThis, RmHalspecOwner *pRmhalspec pThis->__spdmUnregisterFromHeartbeats__ = &spdmUnregisterFromHeartbeats_46f6a7; } - // Hal function -- spdmDeviceInit + // spdmDeviceInit -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__spdmDeviceInit__ = &spdmDeviceInit_GH100; @@ -183,7 +184,7 @@ static void __nvoc_init_funcTable_Spdm_1(Spdm *pThis, RmHalspecOwner *pRmhalspec pThis->__spdmDeviceInit__ = &spdmDeviceInit_46f6a7; } - // Hal function -- spdmDeviceDeinit + // spdmDeviceDeinit -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__spdmDeviceDeinit__ = &spdmDeviceDeinit_GH100; @@ -194,7 +195,7 @@ static void __nvoc_init_funcTable_Spdm_1(Spdm *pThis, RmHalspecOwner *pRmhalspec pThis->__spdmDeviceDeinit__ = &spdmDeviceDeinit_46f6a7; } - // Hal function -- spdmDeviceSecuredSessionSupported + // spdmDeviceSecuredSessionSupported -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__spdmDeviceSecuredSessionSupported__ = &spdmDeviceSecuredSessionSupported_GH100; @@ -205,7 +206,7 @@ static void __nvoc_init_funcTable_Spdm_1(Spdm *pThis, RmHalspecOwner *pRmhalspec pThis->__spdmDeviceSecuredSessionSupported__ = &spdmDeviceSecuredSessionSupported_46f6a7; } - // Hal function -- spdmCheckConnection + // spdmCheckConnection -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__spdmCheckConnection__ = &spdmCheckConnection_GH100; @@ -216,7 +217,7 @@ static void __nvoc_init_funcTable_Spdm_1(Spdm *pThis, RmHalspecOwner *pRmhalspec pThis->__spdmCheckConnection__ = &spdmCheckConnection_46f6a7; } - // Hal function -- spdmMessageProcess + // spdmMessageProcess -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__spdmMessageProcess__ = &spdmMessageProcess_GH100; @@ -227,7 +228,7 @@ static void __nvoc_init_funcTable_Spdm_1(Spdm *pThis, RmHalspecOwner *pRmhalspec pThis->__spdmMessageProcess__ = &spdmMessageProcess_46f6a7; } - // Hal function -- spdmGetCertificates + // spdmGetCertificates -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__spdmGetCertificates__ = &spdmGetCertificates_GH100; @@ -238,7 +239,7 @@ static void __nvoc_init_funcTable_Spdm_1(Spdm *pThis, RmHalspecOwner *pRmhalspec pThis->__spdmGetCertificates__ = &spdmGetCertificates_46f6a7; } - // Hal function -- spdmGetReqEncapCertificates + // spdmGetReqEncapCertificates -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__spdmGetReqEncapCertificates__ = &spdmGetReqEncapCertificates_GH100; @@ -248,9 +249,13 @@ static void __nvoc_init_funcTable_Spdm_1(Spdm *pThis, RmHalspecOwner *pRmhalspec { pThis->__spdmGetReqEncapCertificates__ = &spdmGetReqEncapCertificates_46f6a7; } -} +} // End __nvoc_init_funcTable_Spdm_1 with approximately 26 basic block(s). + +// Initialize vtable(s) for 13 virtual method(s). void __nvoc_init_funcTable_Spdm(Spdm *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 13 per-object function pointer(s). __nvoc_init_funcTable_Spdm_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_spdm_nvoc.h b/src/nvidia/generated/g_spdm_nvoc.h index f2404ca2bf..0974365fa1 100644 --- a/src/nvidia/generated/g_spdm_nvoc.h +++ b/src/nvidia/generated/g_spdm_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_SPDM_NVOC_H_ #define _G_SPDM_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_spdm_nvoc.h" #ifndef NV_SPDM_H @@ -50,10 +58,10 @@ extern "C" { { \ default: _IMPL; \ } -#define HAL_MAPPING_ONLY_IF_SPDM_SUPPORTED_HAL \ - { \ - GH100 : _GH100; \ - default : return NV_ERR_NOT_SUPPORTED; \ +#define HAL_MAPPING_ONLY_IF_SPDM_SUPPORTED_HAL(x, y) \ + { \ + x | y : _##x; \ + default : return NV_ERR_NOT_SUPPORTED; \ } #define HAL_MAPPING_ONLY_IF_SPDM_SUPPORTED_VOID \ { \ @@ -70,24 +78,35 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct Spdm { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct Spdm *__nvoc_pbase_Spdm; - NV_STATUS (*__spdmGetCertChains__)(OBJGPU *, struct Spdm *, void *, NvU32 *, void *, NvU32 *); - NV_STATUS (*__spdmGetAttestationReport__)(OBJGPU *, struct Spdm *, NvU8 *, void *, NvU32 *, NvBool *, void *, NvU32 *); - NV_STATUS (*__spdmCheckAndExecuteKeyUpdate__)(OBJGPU *, struct Spdm *, NvU32); - NV_STATUS (*__spdmSendInitRmDataCommand__)(OBJGPU *, struct Spdm *); - NV_STATUS (*__spdmRegisterForHeartbeats__)(OBJGPU *, struct Spdm *, NvU32); - NV_STATUS (*__spdmUnregisterFromHeartbeats__)(OBJGPU *, struct Spdm *); - NV_STATUS (*__spdmDeviceInit__)(OBJGPU *, struct Spdm *); - NV_STATUS (*__spdmDeviceDeinit__)(OBJGPU *, struct Spdm *, NvBool); - NV_STATUS (*__spdmDeviceSecuredSessionSupported__)(OBJGPU *, struct Spdm *); - NV_STATUS (*__spdmCheckConnection__)(OBJGPU *, struct Spdm *); - NV_STATUS (*__spdmMessageProcess__)(OBJGPU *, struct Spdm *, NvU8 *, NvU32, NvU8 *, NvU32 *); - NV_STATUS (*__spdmGetCertificates__)(OBJGPU *, struct Spdm *); - NV_STATUS (*__spdmGetReqEncapCertificates__)(OBJGPU *, struct Spdm *, NvU8 **, NvU32 *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct Spdm *__nvoc_pbase_Spdm; // spdm + + // Vtable with 13 per-object function pointers + NV_STATUS (*__spdmGetCertChains__)(OBJGPU *, struct Spdm * /*this*/, void *, NvU32 *, void *, NvU32 *); // halified (2 hals) body + NV_STATUS (*__spdmGetAttestationReport__)(OBJGPU *, struct Spdm * /*this*/, NvU8 *, void *, NvU32 *, NvBool *, void *, NvU32 *); // halified (2 hals) body + NV_STATUS (*__spdmCheckAndExecuteKeyUpdate__)(OBJGPU *, struct Spdm * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__spdmSendInitRmDataCommand__)(OBJGPU *, struct Spdm * /*this*/); // halified (2 hals) body + NV_STATUS (*__spdmRegisterForHeartbeats__)(OBJGPU *, struct Spdm * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__spdmUnregisterFromHeartbeats__)(OBJGPU *, struct Spdm * /*this*/); // halified (2 hals) body + NV_STATUS (*__spdmDeviceInit__)(OBJGPU *, struct Spdm * /*this*/); // halified (2 hals) body + NV_STATUS (*__spdmDeviceDeinit__)(OBJGPU *, struct Spdm * /*this*/, NvBool); // halified (2 hals) body + NV_STATUS (*__spdmDeviceSecuredSessionSupported__)(OBJGPU *, struct Spdm * /*this*/); // halified (2 hals) body + NV_STATUS (*__spdmCheckConnection__)(OBJGPU *, struct Spdm * /*this*/); // halified (2 hals) body + NV_STATUS (*__spdmMessageProcess__)(OBJGPU *, struct Spdm * /*this*/, NvU8 *, NvU32, NvU8 *, NvU32 *); // halified (2 hals) body + NV_STATUS (*__spdmGetCertificates__)(OBJGPU *, struct Spdm * /*this*/); // halified (2 hals) body + NV_STATUS (*__spdmGetReqEncapCertificates__)(OBJGPU *, struct Spdm * /*this*/, NvU8 **, NvU32 *); // halified (2 hals) body + + // Data members void *pLibspdmContext; NvU32 libspdmContextSize; void *pLibspdmScratch; @@ -122,6 +141,7 @@ typedef struct Spdm Spdm; #define __nvoc_class_id_Spdm 0x261ee8 #endif /* __nvoc_class_id_Spdm */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_Spdm; #define __staticCast_Spdm(pThis) \ @@ -134,39 +154,107 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_Spdm; ((Spdm*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(Spdm))) #endif //__nvoc_spdm_h_disabled - NV_STATUS __nvoc_objCreateDynamic_Spdm(Spdm**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_Spdm(Spdm**, Dynamic*, NvU32); #define __objCreate_Spdm(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_Spdm((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define spdmGetCertChains_FNPTR(pSpdm) pSpdm->__spdmGetCertChains__ #define spdmGetCertChains(pGpu, pSpdm, pKeyExCertChain, pKeyExCertChainSize, pAttestationCertChain, pAttestationCertChainSize) spdmGetCertChains_DISPATCH(pGpu, pSpdm, pKeyExCertChain, pKeyExCertChainSize, pAttestationCertChain, pAttestationCertChainSize) #define spdmGetCertChains_HAL(pGpu, pSpdm, pKeyExCertChain, pKeyExCertChainSize, pAttestationCertChain, pAttestationCertChainSize) spdmGetCertChains_DISPATCH(pGpu, pSpdm, pKeyExCertChain, pKeyExCertChainSize, pAttestationCertChain, pAttestationCertChainSize) +#define spdmGetAttestationReport_FNPTR(pSpdm) pSpdm->__spdmGetAttestationReport__ #define spdmGetAttestationReport(pGpu, pSpdm, pNonce, pAttestationReport, pAttestationReportSize, pbIsCecAttestationReportPresent, pCecAttestationReport, pCecAttestationReportSize) spdmGetAttestationReport_DISPATCH(pGpu, pSpdm, pNonce, pAttestationReport, pAttestationReportSize, pbIsCecAttestationReportPresent, pCecAttestationReport, pCecAttestationReportSize) #define spdmGetAttestationReport_HAL(pGpu, pSpdm, pNonce, pAttestationReport, pAttestationReportSize, pbIsCecAttestationReportPresent, pCecAttestationReport, pCecAttestationReportSize) spdmGetAttestationReport_DISPATCH(pGpu, pSpdm, pNonce, pAttestationReport, pAttestationReportSize, pbIsCecAttestationReportPresent, pCecAttestationReport, pCecAttestationReportSize) +#define spdmCheckAndExecuteKeyUpdate_FNPTR(pSpdm) pSpdm->__spdmCheckAndExecuteKeyUpdate__ #define spdmCheckAndExecuteKeyUpdate(pGpu, pSpdm, keyUpdateTriggerId) spdmCheckAndExecuteKeyUpdate_DISPATCH(pGpu, pSpdm, keyUpdateTriggerId) #define spdmCheckAndExecuteKeyUpdate_HAL(pGpu, pSpdm, keyUpdateTriggerId) spdmCheckAndExecuteKeyUpdate_DISPATCH(pGpu, pSpdm, keyUpdateTriggerId) +#define spdmSendInitRmDataCommand_FNPTR(pSpdm) pSpdm->__spdmSendInitRmDataCommand__ #define spdmSendInitRmDataCommand(pGpu, pSpdm) spdmSendInitRmDataCommand_DISPATCH(pGpu, pSpdm) #define spdmSendInitRmDataCommand_HAL(pGpu, pSpdm) spdmSendInitRmDataCommand_DISPATCH(pGpu, pSpdm) +#define spdmRegisterForHeartbeats_FNPTR(pSpdm) pSpdm->__spdmRegisterForHeartbeats__ #define spdmRegisterForHeartbeats(pGpu, pSpdm, heartbeatPeriodSec) spdmRegisterForHeartbeats_DISPATCH(pGpu, pSpdm, heartbeatPeriodSec) #define spdmRegisterForHeartbeats_HAL(pGpu, pSpdm, heartbeatPeriodSec) spdmRegisterForHeartbeats_DISPATCH(pGpu, pSpdm, heartbeatPeriodSec) +#define spdmUnregisterFromHeartbeats_FNPTR(pSpdm) pSpdm->__spdmUnregisterFromHeartbeats__ #define spdmUnregisterFromHeartbeats(pGpu, pSpdm) spdmUnregisterFromHeartbeats_DISPATCH(pGpu, pSpdm) #define spdmUnregisterFromHeartbeats_HAL(pGpu, pSpdm) spdmUnregisterFromHeartbeats_DISPATCH(pGpu, pSpdm) +#define spdmDeviceInit_FNPTR(pSpdm) pSpdm->__spdmDeviceInit__ #define spdmDeviceInit(pGpu, pSpdm) spdmDeviceInit_DISPATCH(pGpu, pSpdm) #define spdmDeviceInit_HAL(pGpu, pSpdm) spdmDeviceInit_DISPATCH(pGpu, pSpdm) +#define spdmDeviceDeinit_FNPTR(pSpdm) pSpdm->__spdmDeviceDeinit__ #define spdmDeviceDeinit(pGpu, pSpdm, bForceClear) spdmDeviceDeinit_DISPATCH(pGpu, pSpdm, bForceClear) #define spdmDeviceDeinit_HAL(pGpu, pSpdm, bForceClear) spdmDeviceDeinit_DISPATCH(pGpu, pSpdm, bForceClear) +#define spdmDeviceSecuredSessionSupported_FNPTR(pSpdm) pSpdm->__spdmDeviceSecuredSessionSupported__ #define spdmDeviceSecuredSessionSupported(pGpu, pSpdm) spdmDeviceSecuredSessionSupported_DISPATCH(pGpu, pSpdm) #define spdmDeviceSecuredSessionSupported_HAL(pGpu, pSpdm) spdmDeviceSecuredSessionSupported_DISPATCH(pGpu, pSpdm) +#define spdmCheckConnection_FNPTR(pSpdm) pSpdm->__spdmCheckConnection__ #define spdmCheckConnection(pGpu, pSpdm) spdmCheckConnection_DISPATCH(pGpu, pSpdm) #define spdmCheckConnection_HAL(pGpu, pSpdm) spdmCheckConnection_DISPATCH(pGpu, pSpdm) +#define spdmMessageProcess_FNPTR(pSpdm) pSpdm->__spdmMessageProcess__ #define spdmMessageProcess(pGpu, pSpdm, pRequest, requestSize, pResponse, pResponseSize) spdmMessageProcess_DISPATCH(pGpu, pSpdm, pRequest, requestSize, pResponse, pResponseSize) #define spdmMessageProcess_HAL(pGpu, pSpdm, pRequest, requestSize, pResponse, pResponseSize) spdmMessageProcess_DISPATCH(pGpu, pSpdm, pRequest, requestSize, pResponse, pResponseSize) +#define spdmGetCertificates_FNPTR(pSpdm) pSpdm->__spdmGetCertificates__ #define spdmGetCertificates(pGpu, pSpdm) spdmGetCertificates_DISPATCH(pGpu, pSpdm) #define spdmGetCertificates_HAL(pGpu, pSpdm) spdmGetCertificates_DISPATCH(pGpu, pSpdm) +#define spdmGetReqEncapCertificates_FNPTR(pSpdm) pSpdm->__spdmGetReqEncapCertificates__ #define spdmGetReqEncapCertificates(pGpu, pSpdm, pEncapCertChain, pEncapCertChainSize) spdmGetReqEncapCertificates_DISPATCH(pGpu, pSpdm, pEncapCertChain, pEncapCertChainSize) #define spdmGetReqEncapCertificates_HAL(pGpu, pSpdm, pEncapCertChain, pEncapCertChainSize) spdmGetReqEncapCertificates_DISPATCH(pGpu, pSpdm, pEncapCertChain, pEncapCertChainSize) + +// Dispatch functions +static inline NV_STATUS spdmGetCertChains_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm, void *pKeyExCertChain, NvU32 *pKeyExCertChainSize, void *pAttestationCertChain, NvU32 *pAttestationCertChainSize) { + return pSpdm->__spdmGetCertChains__(pGpu, pSpdm, pKeyExCertChain, pKeyExCertChainSize, pAttestationCertChain, pAttestationCertChainSize); +} + +static inline NV_STATUS spdmGetAttestationReport_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm, NvU8 *pNonce, void *pAttestationReport, NvU32 *pAttestationReportSize, NvBool *pbIsCecAttestationReportPresent, void *pCecAttestationReport, NvU32 *pCecAttestationReportSize) { + return pSpdm->__spdmGetAttestationReport__(pGpu, pSpdm, pNonce, pAttestationReport, pAttestationReportSize, pbIsCecAttestationReportPresent, pCecAttestationReport, pCecAttestationReportSize); +} + +static inline NV_STATUS spdmCheckAndExecuteKeyUpdate_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm, NvU32 keyUpdateTriggerId) { + return pSpdm->__spdmCheckAndExecuteKeyUpdate__(pGpu, pSpdm, keyUpdateTriggerId); +} + +static inline NV_STATUS spdmSendInitRmDataCommand_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm) { + return pSpdm->__spdmSendInitRmDataCommand__(pGpu, pSpdm); +} + +static inline NV_STATUS spdmRegisterForHeartbeats_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm, NvU32 heartbeatPeriodSec) { + return pSpdm->__spdmRegisterForHeartbeats__(pGpu, pSpdm, heartbeatPeriodSec); +} + +static inline NV_STATUS spdmUnregisterFromHeartbeats_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm) { + return pSpdm->__spdmUnregisterFromHeartbeats__(pGpu, pSpdm); +} + +static inline NV_STATUS spdmDeviceInit_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm) { + return pSpdm->__spdmDeviceInit__(pGpu, pSpdm); +} + +static inline NV_STATUS spdmDeviceDeinit_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm, NvBool bForceClear) { + return pSpdm->__spdmDeviceDeinit__(pGpu, pSpdm, bForceClear); +} + +static inline NV_STATUS spdmDeviceSecuredSessionSupported_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm) { + return pSpdm->__spdmDeviceSecuredSessionSupported__(pGpu, pSpdm); +} + +static inline NV_STATUS spdmCheckConnection_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm) { + return pSpdm->__spdmCheckConnection__(pGpu, pSpdm); +} + +static inline NV_STATUS spdmMessageProcess_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm, NvU8 *pRequest, NvU32 requestSize, NvU8 *pResponse, NvU32 *pResponseSize) { + return pSpdm->__spdmMessageProcess__(pGpu, pSpdm, pRequest, requestSize, pResponse, pResponseSize); +} + +static inline NV_STATUS spdmGetCertificates_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm) { + return pSpdm->__spdmGetCertificates__(pGpu, pSpdm); +} + +static inline NV_STATUS spdmGetReqEncapCertificates_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm, NvU8 **pEncapCertChain, NvU32 *pEncapCertChainSize) { + return pSpdm->__spdmGetReqEncapCertificates__(pGpu, pSpdm, pEncapCertChain, pEncapCertChainSize); +} + NV_STATUS spdmConstruct_IMPL(struct Spdm *arg_pSpdm); @@ -251,130 +339,78 @@ static inline NV_STATUS spdmGetCertChains_46f6a7(OBJGPU *pGpu, struct Spdm *pSpd return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS spdmGetCertChains_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm, void *pKeyExCertChain, NvU32 *pKeyExCertChainSize, void *pAttestationCertChain, NvU32 *pAttestationCertChainSize) { - return pSpdm->__spdmGetCertChains__(pGpu, pSpdm, pKeyExCertChain, pKeyExCertChainSize, pAttestationCertChain, pAttestationCertChainSize); -} - NV_STATUS spdmGetAttestationReport_GH100(OBJGPU *pGpu, struct Spdm *pSpdm, NvU8 *pNonce, void *pAttestationReport, NvU32 *pAttestationReportSize, NvBool *pbIsCecAttestationReportPresent, void *pCecAttestationReport, NvU32 *pCecAttestationReportSize); static inline NV_STATUS spdmGetAttestationReport_46f6a7(OBJGPU *pGpu, struct Spdm *pSpdm, NvU8 *pNonce, void *pAttestationReport, NvU32 *pAttestationReportSize, NvBool *pbIsCecAttestationReportPresent, void *pCecAttestationReport, NvU32 *pCecAttestationReportSize) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS spdmGetAttestationReport_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm, NvU8 *pNonce, void *pAttestationReport, NvU32 *pAttestationReportSize, NvBool *pbIsCecAttestationReportPresent, void *pCecAttestationReport, NvU32 *pCecAttestationReportSize) { - return pSpdm->__spdmGetAttestationReport__(pGpu, pSpdm, pNonce, pAttestationReport, pAttestationReportSize, pbIsCecAttestationReportPresent, pCecAttestationReport, pCecAttestationReportSize); -} - NV_STATUS spdmCheckAndExecuteKeyUpdate_GH100(OBJGPU *pGpu, struct Spdm *pSpdm, NvU32 keyUpdateTriggerId); static inline NV_STATUS spdmCheckAndExecuteKeyUpdate_46f6a7(OBJGPU *pGpu, struct Spdm *pSpdm, NvU32 keyUpdateTriggerId) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS spdmCheckAndExecuteKeyUpdate_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm, NvU32 keyUpdateTriggerId) { - return pSpdm->__spdmCheckAndExecuteKeyUpdate__(pGpu, pSpdm, keyUpdateTriggerId); -} - NV_STATUS spdmSendInitRmDataCommand_GH100(OBJGPU *pGpu, struct Spdm *pSpdm); static inline NV_STATUS spdmSendInitRmDataCommand_46f6a7(OBJGPU *pGpu, struct Spdm *pSpdm) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS spdmSendInitRmDataCommand_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm) { - return pSpdm->__spdmSendInitRmDataCommand__(pGpu, pSpdm); -} - NV_STATUS spdmRegisterForHeartbeats_GH100(OBJGPU *pGpu, struct Spdm *pSpdm, NvU32 heartbeatPeriodSec); static inline NV_STATUS spdmRegisterForHeartbeats_46f6a7(OBJGPU *pGpu, struct Spdm *pSpdm, NvU32 heartbeatPeriodSec) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS spdmRegisterForHeartbeats_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm, NvU32 heartbeatPeriodSec) { - return pSpdm->__spdmRegisterForHeartbeats__(pGpu, pSpdm, heartbeatPeriodSec); -} - NV_STATUS spdmUnregisterFromHeartbeats_GH100(OBJGPU *pGpu, struct Spdm *pSpdm); static inline NV_STATUS spdmUnregisterFromHeartbeats_46f6a7(OBJGPU *pGpu, struct Spdm *pSpdm) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS spdmUnregisterFromHeartbeats_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm) { - return pSpdm->__spdmUnregisterFromHeartbeats__(pGpu, pSpdm); -} - NV_STATUS spdmDeviceInit_GH100(OBJGPU *pGpu, struct Spdm *pSpdm); static inline NV_STATUS spdmDeviceInit_46f6a7(OBJGPU *pGpu, struct Spdm *pSpdm) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS spdmDeviceInit_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm) { - return pSpdm->__spdmDeviceInit__(pGpu, pSpdm); -} - NV_STATUS spdmDeviceDeinit_GH100(OBJGPU *pGpu, struct Spdm *pSpdm, NvBool bForceClear); static inline NV_STATUS spdmDeviceDeinit_46f6a7(OBJGPU *pGpu, struct Spdm *pSpdm, NvBool bForceClear) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS spdmDeviceDeinit_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm, NvBool bForceClear) { - return pSpdm->__spdmDeviceDeinit__(pGpu, pSpdm, bForceClear); -} - NV_STATUS spdmDeviceSecuredSessionSupported_GH100(OBJGPU *pGpu, struct Spdm *pSpdm); static inline NV_STATUS spdmDeviceSecuredSessionSupported_46f6a7(OBJGPU *pGpu, struct Spdm *pSpdm) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS spdmDeviceSecuredSessionSupported_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm) { - return pSpdm->__spdmDeviceSecuredSessionSupported__(pGpu, pSpdm); -} - NV_STATUS spdmCheckConnection_GH100(OBJGPU *pGpu, struct Spdm *pSpdm); static inline NV_STATUS spdmCheckConnection_46f6a7(OBJGPU *pGpu, struct Spdm *pSpdm) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS spdmCheckConnection_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm) { - return pSpdm->__spdmCheckConnection__(pGpu, pSpdm); -} - NV_STATUS spdmMessageProcess_GH100(OBJGPU *pGpu, struct Spdm *pSpdm, NvU8 *pRequest, NvU32 requestSize, NvU8 *pResponse, NvU32 *pResponseSize); static inline NV_STATUS spdmMessageProcess_46f6a7(OBJGPU *pGpu, struct Spdm *pSpdm, NvU8 *pRequest, NvU32 requestSize, NvU8 *pResponse, NvU32 *pResponseSize) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS spdmMessageProcess_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm, NvU8 *pRequest, NvU32 requestSize, NvU8 *pResponse, NvU32 *pResponseSize) { - return pSpdm->__spdmMessageProcess__(pGpu, pSpdm, pRequest, requestSize, pResponse, pResponseSize); -} - NV_STATUS spdmGetCertificates_GH100(OBJGPU *pGpu, struct Spdm *pSpdm); static inline NV_STATUS spdmGetCertificates_46f6a7(OBJGPU *pGpu, struct Spdm *pSpdm) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS spdmGetCertificates_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm) { - return pSpdm->__spdmGetCertificates__(pGpu, pSpdm); -} - NV_STATUS spdmGetReqEncapCertificates_GH100(OBJGPU *pGpu, struct Spdm *pSpdm, NvU8 **pEncapCertChain, NvU32 *pEncapCertChainSize); static inline NV_STATUS spdmGetReqEncapCertificates_46f6a7(OBJGPU *pGpu, struct Spdm *pSpdm, NvU8 **pEncapCertChain, NvU32 *pEncapCertChainSize) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS spdmGetReqEncapCertificates_DISPATCH(OBJGPU *pGpu, struct Spdm *pSpdm, NvU8 **pEncapCertChain, NvU32 *pEncapCertChainSize) { - return pSpdm->__spdmGetReqEncapCertificates__(pGpu, pSpdm, pEncapCertChain, pEncapCertChainSize); -} - #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_standard_mem_nvoc.c b/src/nvidia/generated/g_standard_mem_nvoc.c index 6352d006d0..1fc6b7796b 100644 --- a/src/nvidia/generated/g_standard_mem_nvoc.c +++ b/src/nvidia/generated/g_standard_mem_nvoc.c @@ -93,110 +93,142 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_StandardMemory = /*pExportInfo=*/ &__nvoc_export_info_StandardMemory }; -static NvBool __nvoc_thunk_StandardMemory_resCanCopy(struct RsResource *pStandardMemory) { - return stdmemCanCopy((struct StandardMemory *)(((unsigned char *)pStandardMemory) - __nvoc_rtti_StandardMemory_RsResource.offset)); +// 1 down-thunk(s) defined to bridge methods in StandardMemory from superclasses + +// stdmemCanCopy: virtual override (res) base (mem) +static NvBool __nvoc_down_thunk_StandardMemory_resCanCopy(struct RsResource *pStandardMemory) { + return stdmemCanCopy((struct StandardMemory *)(((unsigned char *) pStandardMemory) - __nvoc_rtti_StandardMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_stdmemCheckMemInterUnmap(struct StandardMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), bSubdeviceHandleProvided); + +// 25 up-thunk(s) defined to bridge methods in StandardMemory to superclasses + +// stdmemIsDuplicate: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_stdmemIsDuplicate(struct StandardMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_RmResource_stdmemShareCallback(struct StandardMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_StandardMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// stdmemGetMapAddrSpace: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMapAddrSpace(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_RsResource_stdmemMapTo(struct StandardMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_StandardMemory_RsResource.offset), pParams); +// stdmemControl: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_stdmemControl(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_stdmemGetMapAddrSpace(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return memGetMapAddrSpace((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); +// stdmemMap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_stdmemMap(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } -static NvBool __nvoc_thunk_Memory_stdmemIsExportAllowed(struct StandardMemory *pMemory) { - return memIsExportAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_StandardMemory_Memory.offset)); +// stdmemUnmap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_stdmemUnmap(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pCallContext, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_stdmemGetRefCount(struct StandardMemory *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_StandardMemory_RsResource.offset)); +// stdmemGetMemInterMapParams: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMemInterMapParams(struct StandardMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pParams); } -static void __nvoc_thunk_RsResource_stdmemAddAdditionalDependants(struct RsClient *pClient, struct StandardMemory *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_StandardMemory_RsResource.offset), pReference); +// stdmemCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_stdmemCheckMemInterUnmap(struct StandardMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RmResource_stdmemControl_Prologue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_StandardMemory_RmResource.offset), pCallContext, pParams); +// stdmemGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMemoryMappingDescriptor(struct StandardMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), ppMemDesc); } -static NvBool __nvoc_thunk_Memory_stdmemIsGpuMapAllowed(struct StandardMemory *pMemory, struct OBJGPU *pGpu) { - return memIsGpuMapAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pGpu); +// stdmemCheckCopyPermissions: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_stdmemCheckCopyPermissions(struct StandardMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pDstGpu, pDstDevice); } -static NV_STATUS __nvoc_thunk_RsResource_stdmemUnmapFrom(struct StandardMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_StandardMemory_RsResource.offset), pParams); +// stdmemIsReady: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_stdmemIsReady(struct StandardMemory *pMemory, NvBool bCopyConstructorContext) { + return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), bCopyConstructorContext); } -static void __nvoc_thunk_RmResource_stdmemControl_Epilogue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_StandardMemory_RmResource.offset), pCallContext, pParams); +// stdmemIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_stdmemIsGpuMapAllowed(struct StandardMemory *pMemory, struct OBJGPU *pGpu) { + return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pGpu); } -static NV_STATUS __nvoc_thunk_Memory_stdmemControl(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memControl((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pCallContext, pParams); +// stdmemIsExportAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_stdmemIsExportAllowed(struct StandardMemory *pMemory) { + return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset)); } -static NV_STATUS __nvoc_thunk_Memory_stdmemUnmap(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pCallContext, pCpuMapping); +// stdmemAccessCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_stdmemAccessCallback(struct StandardMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_Memory_stdmemGetMemInterMapParams(struct StandardMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pParams); +// stdmemShareCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_stdmemShareCallback(struct StandardMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_Memory_stdmemGetMemoryMappingDescriptor(struct StandardMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), ppMemDesc); +// stdmemControlSerialization_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_stdmemControlSerialization_Prologue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_stdmemControlFilter(struct StandardMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_StandardMemory_RsResource.offset), pCallContext, pParams); +// stdmemControlSerialization_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_stdmemControlSerialization_Epilogue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_stdmemControlSerialization_Prologue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_StandardMemory_RmResource.offset), pCallContext, pParams); +// stdmemControl_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_stdmemControl_Prologue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_stdmemIsPartialUnmapSupported(struct StandardMemory *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_StandardMemory_RsResource.offset)); +// stdmemControl_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_stdmemControl_Epilogue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_stdmemIsReady(struct StandardMemory *pMemory, NvBool bCopyConstructorContext) { - return memIsReady((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), bCopyConstructorContext); +// stdmemPreDestruct: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_stdmemPreDestruct(struct StandardMemory *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_stdmemCheckCopyPermissions(struct StandardMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return memCheckCopyPermissions((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pDstGpu, pDstDevice); +// stdmemControlFilter: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_stdmemControlFilter(struct StandardMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_stdmemPreDestruct(struct StandardMemory *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_StandardMemory_RsResource.offset)); +// stdmemIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body +static NvBool __nvoc_up_thunk_RsResource_stdmemIsPartialUnmapSupported(struct StandardMemory *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_stdmemIsDuplicate(struct StandardMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), hMemory, pDuplicate); +// stdmemMapTo: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_stdmemMapTo(struct StandardMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_stdmemControlSerialization_Epilogue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_StandardMemory_RmResource.offset), pCallContext, pParams); +// stdmemUnmapFrom: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_stdmemUnmapFrom(struct StandardMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_Memory_stdmemMap(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pCallContext, pParams, pCpuMapping); +// stdmemGetRefCount: virtual inherited (res) base (mem) +static NvU32 __nvoc_up_thunk_RsResource_stdmemGetRefCount(struct StandardMemory *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_stdmemAccessCallback(struct StandardMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_StandardMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// stdmemAddAdditionalDependants: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_stdmemAddAdditionalDependants(struct RsClient *pClient, struct StandardMemory *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_StandardMemory = { /*numEntries=*/ 0, @@ -232,65 +264,95 @@ NV_STATUS __nvoc_ctor_StandardMemory(StandardMemory *pThis, CALL_CONTEXT * arg_p return status; } +// Vtable initialization static void __nvoc_init_funcTable_StandardMemory_1(StandardMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // stdmemCanCopy -- virtual override (res) base (mem) pThis->__stdmemCanCopy__ = &stdmemCanCopy_IMPL; + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_StandardMemory_resCanCopy; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_StandardMemory_resCanCopy; + // stdmemIsDuplicate -- virtual inherited (mem) base (mem) + pThis->__stdmemIsDuplicate__ = &__nvoc_up_thunk_Memory_stdmemIsDuplicate; - pThis->__stdmemCheckMemInterUnmap__ = &__nvoc_thunk_Memory_stdmemCheckMemInterUnmap; + // stdmemGetMapAddrSpace -- virtual inherited (mem) base (mem) + pThis->__stdmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_stdmemGetMapAddrSpace; - pThis->__stdmemShareCallback__ = &__nvoc_thunk_RmResource_stdmemShareCallback; + // stdmemControl -- virtual inherited (mem) base (mem) + pThis->__stdmemControl__ = &__nvoc_up_thunk_Memory_stdmemControl; - pThis->__stdmemMapTo__ = &__nvoc_thunk_RsResource_stdmemMapTo; + // stdmemMap -- virtual inherited (mem) base (mem) + pThis->__stdmemMap__ = &__nvoc_up_thunk_Memory_stdmemMap; - pThis->__stdmemGetMapAddrSpace__ = &__nvoc_thunk_Memory_stdmemGetMapAddrSpace; + // stdmemUnmap -- virtual inherited (mem) base (mem) + pThis->__stdmemUnmap__ = &__nvoc_up_thunk_Memory_stdmemUnmap; - pThis->__stdmemIsExportAllowed__ = &__nvoc_thunk_Memory_stdmemIsExportAllowed; + // stdmemGetMemInterMapParams -- virtual inherited (mem) base (mem) + pThis->__stdmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_stdmemGetMemInterMapParams; - pThis->__stdmemGetRefCount__ = &__nvoc_thunk_RsResource_stdmemGetRefCount; + // stdmemCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body + pThis->__stdmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_stdmemCheckMemInterUnmap; - pThis->__stdmemAddAdditionalDependants__ = &__nvoc_thunk_RsResource_stdmemAddAdditionalDependants; + // stdmemGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) + pThis->__stdmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_stdmemGetMemoryMappingDescriptor; - pThis->__stdmemControl_Prologue__ = &__nvoc_thunk_RmResource_stdmemControl_Prologue; + // stdmemCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body + pThis->__stdmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_stdmemCheckCopyPermissions; - pThis->__stdmemIsGpuMapAllowed__ = &__nvoc_thunk_Memory_stdmemIsGpuMapAllowed; + // stdmemIsReady -- virtual inherited (mem) base (mem) + pThis->__stdmemIsReady__ = &__nvoc_up_thunk_Memory_stdmemIsReady; - pThis->__stdmemUnmapFrom__ = &__nvoc_thunk_RsResource_stdmemUnmapFrom; + // stdmemIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__stdmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_stdmemIsGpuMapAllowed; - pThis->__stdmemControl_Epilogue__ = &__nvoc_thunk_RmResource_stdmemControl_Epilogue; + // stdmemIsExportAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__stdmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_stdmemIsExportAllowed; - pThis->__stdmemControl__ = &__nvoc_thunk_Memory_stdmemControl; + // stdmemAccessCallback -- virtual inherited (rmres) base (mem) + pThis->__stdmemAccessCallback__ = &__nvoc_up_thunk_RmResource_stdmemAccessCallback; - pThis->__stdmemUnmap__ = &__nvoc_thunk_Memory_stdmemUnmap; + // stdmemShareCallback -- virtual inherited (rmres) base (mem) + pThis->__stdmemShareCallback__ = &__nvoc_up_thunk_RmResource_stdmemShareCallback; - pThis->__stdmemGetMemInterMapParams__ = &__nvoc_thunk_Memory_stdmemGetMemInterMapParams; + // stdmemControlSerialization_Prologue -- virtual inherited (rmres) base (mem) + pThis->__stdmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_stdmemControlSerialization_Prologue; - pThis->__stdmemGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_stdmemGetMemoryMappingDescriptor; + // stdmemControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__stdmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_stdmemControlSerialization_Epilogue; - pThis->__stdmemControlFilter__ = &__nvoc_thunk_RsResource_stdmemControlFilter; + // stdmemControl_Prologue -- virtual inherited (rmres) base (mem) + pThis->__stdmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_stdmemControl_Prologue; - pThis->__stdmemControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_stdmemControlSerialization_Prologue; + // stdmemControl_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__stdmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_stdmemControl_Epilogue; - pThis->__stdmemIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_stdmemIsPartialUnmapSupported; + // stdmemPreDestruct -- virtual inherited (res) base (mem) + pThis->__stdmemPreDestruct__ = &__nvoc_up_thunk_RsResource_stdmemPreDestruct; - pThis->__stdmemIsReady__ = &__nvoc_thunk_Memory_stdmemIsReady; + // stdmemControlFilter -- virtual inherited (res) base (mem) + pThis->__stdmemControlFilter__ = &__nvoc_up_thunk_RsResource_stdmemControlFilter; - pThis->__stdmemCheckCopyPermissions__ = &__nvoc_thunk_Memory_stdmemCheckCopyPermissions; + // stdmemIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body + pThis->__stdmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_stdmemIsPartialUnmapSupported; - pThis->__stdmemPreDestruct__ = &__nvoc_thunk_RsResource_stdmemPreDestruct; + // stdmemMapTo -- virtual inherited (res) base (mem) + pThis->__stdmemMapTo__ = &__nvoc_up_thunk_RsResource_stdmemMapTo; - pThis->__stdmemIsDuplicate__ = &__nvoc_thunk_Memory_stdmemIsDuplicate; + // stdmemUnmapFrom -- virtual inherited (res) base (mem) + pThis->__stdmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_stdmemUnmapFrom; - pThis->__stdmemControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_stdmemControlSerialization_Epilogue; + // stdmemGetRefCount -- virtual inherited (res) base (mem) + pThis->__stdmemGetRefCount__ = &__nvoc_up_thunk_RsResource_stdmemGetRefCount; - pThis->__stdmemMap__ = &__nvoc_thunk_Memory_stdmemMap; + // stdmemAddAdditionalDependants -- virtual inherited (res) base (mem) + pThis->__stdmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_stdmemAddAdditionalDependants; +} // End __nvoc_init_funcTable_StandardMemory_1 with approximately 27 basic block(s). - pThis->__stdmemAccessCallback__ = &__nvoc_thunk_RmResource_stdmemAccessCallback; -} +// Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_StandardMemory(StandardMemory *pThis) { + + // Initialize vtable(s) with 26 per-object function pointer(s). __nvoc_init_funcTable_StandardMemory_1(pThis); } diff --git a/src/nvidia/generated/g_standard_mem_nvoc.h b/src/nvidia/generated/g_standard_mem_nvoc.h index 1802285cca..1a0d168ccb 100644 --- a/src/nvidia/generated/g_standard_mem_nvoc.h +++ b/src/nvidia/generated/g_standard_mem_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_STANDARD_MEM_NVOC_H_ #define _G_STANDARD_MEM_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_standard_mem_nvoc.h" #ifndef _STANDARD_MEMORY_H_ @@ -65,41 +73,50 @@ typedef struct MemoryManager MemoryManager; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct StandardMemory { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Memory *__nvoc_pbase_Memory; - struct StandardMemory *__nvoc_pbase_StandardMemory; - NvBool (*__stdmemCanCopy__)(struct StandardMemory *); - NV_STATUS (*__stdmemCheckMemInterUnmap__)(struct StandardMemory *, NvBool); - NvBool (*__stdmemShareCallback__)(struct StandardMemory *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__stdmemMapTo__)(struct StandardMemory *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__stdmemGetMapAddrSpace__)(struct StandardMemory *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvBool (*__stdmemIsExportAllowed__)(struct StandardMemory *); - NvU32 (*__stdmemGetRefCount__)(struct StandardMemory *); - void (*__stdmemAddAdditionalDependants__)(struct RsClient *, struct StandardMemory *, RsResourceRef *); - NV_STATUS (*__stdmemControl_Prologue__)(struct StandardMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__stdmemIsGpuMapAllowed__)(struct StandardMemory *, struct OBJGPU *); - NV_STATUS (*__stdmemUnmapFrom__)(struct StandardMemory *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__stdmemControl_Epilogue__)(struct StandardMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__stdmemControl__)(struct StandardMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__stdmemUnmap__)(struct StandardMemory *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__stdmemGetMemInterMapParams__)(struct StandardMemory *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__stdmemGetMemoryMappingDescriptor__)(struct StandardMemory *, MEMORY_DESCRIPTOR **); - NV_STATUS (*__stdmemControlFilter__)(struct StandardMemory *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__stdmemControlSerialization_Prologue__)(struct StandardMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__stdmemIsPartialUnmapSupported__)(struct StandardMemory *); - NV_STATUS (*__stdmemIsReady__)(struct StandardMemory *, NvBool); - NV_STATUS (*__stdmemCheckCopyPermissions__)(struct StandardMemory *, struct OBJGPU *, struct Device *); - void (*__stdmemPreDestruct__)(struct StandardMemory *); - NV_STATUS (*__stdmemIsDuplicate__)(struct StandardMemory *, NvHandle, NvBool *); - void (*__stdmemControlSerialization_Epilogue__)(struct StandardMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__stdmemMap__)(struct StandardMemory *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__stdmemAccessCallback__)(struct StandardMemory *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct Memory *__nvoc_pbase_Memory; // mem super + struct StandardMemory *__nvoc_pbase_StandardMemory; // stdmem + + // Vtable with 26 per-object function pointers + NvBool (*__stdmemCanCopy__)(struct StandardMemory * /*this*/); // virtual override (res) base (mem) + NV_STATUS (*__stdmemIsDuplicate__)(struct StandardMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) + NV_STATUS (*__stdmemGetMapAddrSpace__)(struct StandardMemory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) + NV_STATUS (*__stdmemControl__)(struct StandardMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (mem) base (mem) + NV_STATUS (*__stdmemMap__)(struct StandardMemory * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__stdmemUnmap__)(struct StandardMemory * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__stdmemGetMemInterMapParams__)(struct StandardMemory * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (mem) base (mem) + NV_STATUS (*__stdmemCheckMemInterUnmap__)(struct StandardMemory * /*this*/, NvBool); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__stdmemGetMemoryMappingDescriptor__)(struct StandardMemory * /*this*/, MEMORY_DESCRIPTOR **); // virtual inherited (mem) base (mem) + NV_STATUS (*__stdmemCheckCopyPermissions__)(struct StandardMemory * /*this*/, struct OBJGPU *, struct Device *); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__stdmemIsReady__)(struct StandardMemory * /*this*/, NvBool); // virtual inherited (mem) base (mem) + NvBool (*__stdmemIsGpuMapAllowed__)(struct StandardMemory * /*this*/, struct OBJGPU *); // inline virtual inherited (mem) base (mem) body + NvBool (*__stdmemIsExportAllowed__)(struct StandardMemory * /*this*/); // inline virtual inherited (mem) base (mem) body + NvBool (*__stdmemAccessCallback__)(struct StandardMemory * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (mem) + NvBool (*__stdmemShareCallback__)(struct StandardMemory * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__stdmemControlSerialization_Prologue__)(struct StandardMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__stdmemControlSerialization_Epilogue__)(struct StandardMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__stdmemControl_Prologue__)(struct StandardMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__stdmemControl_Epilogue__)(struct StandardMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__stdmemPreDestruct__)(struct StandardMemory * /*this*/); // virtual inherited (res) base (mem) + NV_STATUS (*__stdmemControlFilter__)(struct StandardMemory * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (mem) + NvBool (*__stdmemIsPartialUnmapSupported__)(struct StandardMemory * /*this*/); // inline virtual inherited (res) base (mem) body + NV_STATUS (*__stdmemMapTo__)(struct StandardMemory * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (mem) + NV_STATUS (*__stdmemUnmapFrom__)(struct StandardMemory * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (mem) + NvU32 (*__stdmemGetRefCount__)(struct StandardMemory * /*this*/); // virtual inherited (res) base (mem) + void (*__stdmemAddAdditionalDependants__)(struct RsClient *, struct StandardMemory * /*this*/, RsResourceRef *); // virtual inherited (res) base (mem) }; #ifndef __NVOC_CLASS_StandardMemory_TYPEDEF__ @@ -111,6 +128,7 @@ typedef struct StandardMemory StandardMemory; #define __nvoc_class_id_StandardMemory 0x897bf7 #endif /* __nvoc_class_id_StandardMemory */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_StandardMemory; #define __staticCast_StandardMemory(pThis) \ @@ -123,158 +141,187 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_StandardMemory; ((StandardMemory*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(StandardMemory))) #endif //__nvoc_standard_mem_h_disabled - NV_STATUS __nvoc_objCreateDynamic_StandardMemory(StandardMemory**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_StandardMemory(StandardMemory**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_StandardMemory(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_StandardMemory((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define stdmemCanCopy_FNPTR(pStandardMemory) pStandardMemory->__stdmemCanCopy__ #define stdmemCanCopy(pStandardMemory) stdmemCanCopy_DISPATCH(pStandardMemory) -#define stdmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) stdmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define stdmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) stdmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define stdmemMapTo(pResource, pParams) stdmemMapTo_DISPATCH(pResource, pParams) +#define stdmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define stdmemIsDuplicate(pMemory, hMemory, pDuplicate) stdmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) +#define stdmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ #define stdmemGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) stdmemGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define stdmemIsExportAllowed(pMemory) stdmemIsExportAllowed_DISPATCH(pMemory) -#define stdmemGetRefCount(pResource) stdmemGetRefCount_DISPATCH(pResource) -#define stdmemAddAdditionalDependants(pClient, pResource, pReference) stdmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define stdmemControl_Prologue(pResource, pCallContext, pParams) stdmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define stdmemIsGpuMapAllowed(pMemory, pGpu) stdmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define stdmemUnmapFrom(pResource, pParams) stdmemUnmapFrom_DISPATCH(pResource, pParams) -#define stdmemControl_Epilogue(pResource, pCallContext, pParams) stdmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define stdmemControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ #define stdmemControl(pMemory, pCallContext, pParams) stdmemControl_DISPATCH(pMemory, pCallContext, pParams) +#define stdmemMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define stdmemMap(pMemory, pCallContext, pParams, pCpuMapping) stdmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define stdmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ #define stdmemUnmap(pMemory, pCallContext, pCpuMapping) stdmemUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) +#define stdmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ #define stdmemGetMemInterMapParams(pMemory, pParams) stdmemGetMemInterMapParams_DISPATCH(pMemory, pParams) +#define stdmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define stdmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) stdmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) +#define stdmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ #define stdmemGetMemoryMappingDescriptor(pMemory, ppMemDesc) stdmemGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define stdmemControlFilter(pResource, pCallContext, pParams) stdmemControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define stdmemControlSerialization_Prologue(pResource, pCallContext, pParams) stdmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define stdmemIsPartialUnmapSupported(pResource) stdmemIsPartialUnmapSupported_DISPATCH(pResource) -#define stdmemIsReady(pMemory, bCopyConstructorContext) stdmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define stdmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ #define stdmemCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) stdmemCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define stdmemPreDestruct(pResource) stdmemPreDestruct_DISPATCH(pResource) -#define stdmemIsDuplicate(pMemory, hMemory, pDuplicate) stdmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define stdmemControlSerialization_Epilogue(pResource, pCallContext, pParams) stdmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define stdmemMap(pMemory, pCallContext, pParams, pCpuMapping) stdmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define stdmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define stdmemIsReady(pMemory, bCopyConstructorContext) stdmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define stdmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define stdmemIsGpuMapAllowed(pMemory, pGpu) stdmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) +#define stdmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define stdmemIsExportAllowed(pMemory) stdmemIsExportAllowed_DISPATCH(pMemory) +#define stdmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ #define stdmemAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) stdmemAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvU64 stdmemGetSysmemPageSize_IMPL(struct OBJGPU *pGpu, struct StandardMemory *pMemory); - +#define stdmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define stdmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) stdmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define stdmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define stdmemControlSerialization_Prologue(pResource, pCallContext, pParams) stdmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define stdmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define stdmemControlSerialization_Epilogue(pResource, pCallContext, pParams) stdmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define stdmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define stdmemControl_Prologue(pResource, pCallContext, pParams) stdmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define stdmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define stdmemControl_Epilogue(pResource, pCallContext, pParams) stdmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define stdmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define stdmemPreDestruct(pResource) stdmemPreDestruct_DISPATCH(pResource) +#define stdmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define stdmemControlFilter(pResource, pCallContext, pParams) stdmemControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define stdmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define stdmemIsPartialUnmapSupported(pResource) stdmemIsPartialUnmapSupported_DISPATCH(pResource) +#define stdmemMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define stdmemMapTo(pResource, pParams) stdmemMapTo_DISPATCH(pResource, pParams) +#define stdmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define stdmemUnmapFrom(pResource, pParams) stdmemUnmapFrom_DISPATCH(pResource, pParams) +#define stdmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define stdmemGetRefCount(pResource) stdmemGetRefCount_DISPATCH(pResource) +#define stdmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define stdmemAddAdditionalDependants(pClient, pResource, pReference) stdmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#ifdef __nvoc_standard_mem_h_disabled -static inline NvU64 stdmemGetSysmemPageSize(struct OBJGPU *pGpu, struct StandardMemory *pMemory) { - NV_ASSERT_FAILED_PRECOMP("StandardMemory was disabled!"); - return 0; +// Dispatch functions +static inline NvBool stdmemCanCopy_DISPATCH(struct StandardMemory *pStandardMemory) { + return pStandardMemory->__stdmemCanCopy__(pStandardMemory); } -#else //__nvoc_standard_mem_h_disabled -#define stdmemGetSysmemPageSize(pGpu, pMemory) stdmemGetSysmemPageSize_IMPL(pGpu, pMemory) -#endif //__nvoc_standard_mem_h_disabled - -#define stdmemGetSysmemPageSize_HAL(pGpu, pMemory) stdmemGetSysmemPageSize(pGpu, pMemory) -NvBool stdmemCanCopy_IMPL(struct StandardMemory *pStandardMemory); +static inline NV_STATUS stdmemIsDuplicate_DISPATCH(struct StandardMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return pMemory->__stdmemIsDuplicate__(pMemory, hMemory, pDuplicate); +} -static inline NvBool stdmemCanCopy_DISPATCH(struct StandardMemory *pStandardMemory) { - return pStandardMemory->__stdmemCanCopy__(pStandardMemory); +static inline NV_STATUS stdmemGetMapAddrSpace_DISPATCH(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pMemory->__stdmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } -static inline NV_STATUS stdmemCheckMemInterUnmap_DISPATCH(struct StandardMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__stdmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); +static inline NV_STATUS stdmemControl_DISPATCH(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pMemory->__stdmemControl__(pMemory, pCallContext, pParams); } -static inline NvBool stdmemShareCallback_DISPATCH(struct StandardMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__stdmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS stdmemMap_DISPATCH(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pMemory->__stdmemMap__(pMemory, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS stdmemMapTo_DISPATCH(struct StandardMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__stdmemMapTo__(pResource, pParams); +static inline NV_STATUS stdmemUnmap_DISPATCH(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pMemory->__stdmemUnmap__(pMemory, pCallContext, pCpuMapping); } -static inline NV_STATUS stdmemGetMapAddrSpace_DISPATCH(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemory->__stdmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); +static inline NV_STATUS stdmemGetMemInterMapParams_DISPATCH(struct StandardMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pMemory->__stdmemGetMemInterMapParams__(pMemory, pParams); } -static inline NvBool stdmemIsExportAllowed_DISPATCH(struct StandardMemory *pMemory) { - return pMemory->__stdmemIsExportAllowed__(pMemory); +static inline NV_STATUS stdmemCheckMemInterUnmap_DISPATCH(struct StandardMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return pMemory->__stdmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } -static inline NvU32 stdmemGetRefCount_DISPATCH(struct StandardMemory *pResource) { - return pResource->__stdmemGetRefCount__(pResource); +static inline NV_STATUS stdmemGetMemoryMappingDescriptor_DISPATCH(struct StandardMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return pMemory->__stdmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } -static inline void stdmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct StandardMemory *pResource, RsResourceRef *pReference) { - pResource->__stdmemAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS stdmemCheckCopyPermissions_DISPATCH(struct StandardMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return pMemory->__stdmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } -static inline NV_STATUS stdmemControl_Prologue_DISPATCH(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__stdmemControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS stdmemIsReady_DISPATCH(struct StandardMemory *pMemory, NvBool bCopyConstructorContext) { + return pMemory->__stdmemIsReady__(pMemory, bCopyConstructorContext); } static inline NvBool stdmemIsGpuMapAllowed_DISPATCH(struct StandardMemory *pMemory, struct OBJGPU *pGpu) { return pMemory->__stdmemIsGpuMapAllowed__(pMemory, pGpu); } -static inline NV_STATUS stdmemUnmapFrom_DISPATCH(struct StandardMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__stdmemUnmapFrom__(pResource, pParams); +static inline NvBool stdmemIsExportAllowed_DISPATCH(struct StandardMemory *pMemory) { + return pMemory->__stdmemIsExportAllowed__(pMemory); } -static inline void stdmemControl_Epilogue_DISPATCH(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__stdmemControl_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool stdmemAccessCallback_DISPATCH(struct StandardMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__stdmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS stdmemControl_DISPATCH(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__stdmemControl__(pMemory, pCallContext, pParams); +static inline NvBool stdmemShareCallback_DISPATCH(struct StandardMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__stdmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline NV_STATUS stdmemUnmap_DISPATCH(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__stdmemUnmap__(pMemory, pCallContext, pCpuMapping); +static inline NV_STATUS stdmemControlSerialization_Prologue_DISPATCH(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__stdmemControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS stdmemGetMemInterMapParams_DISPATCH(struct StandardMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__stdmemGetMemInterMapParams__(pMemory, pParams); +static inline void stdmemControlSerialization_Epilogue_DISPATCH(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__stdmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS stdmemGetMemoryMappingDescriptor_DISPATCH(struct StandardMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__stdmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); +static inline NV_STATUS stdmemControl_Prologue_DISPATCH(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__stdmemControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS stdmemControlFilter_DISPATCH(struct StandardMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__stdmemControlFilter__(pResource, pCallContext, pParams); +static inline void stdmemControl_Epilogue_DISPATCH(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__stdmemControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS stdmemControlSerialization_Prologue_DISPATCH(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__stdmemControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline void stdmemPreDestruct_DISPATCH(struct StandardMemory *pResource) { + pResource->__stdmemPreDestruct__(pResource); +} + +static inline NV_STATUS stdmemControlFilter_DISPATCH(struct StandardMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__stdmemControlFilter__(pResource, pCallContext, pParams); } static inline NvBool stdmemIsPartialUnmapSupported_DISPATCH(struct StandardMemory *pResource) { return pResource->__stdmemIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS stdmemIsReady_DISPATCH(struct StandardMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__stdmemIsReady__(pMemory, bCopyConstructorContext); +static inline NV_STATUS stdmemMapTo_DISPATCH(struct StandardMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__stdmemMapTo__(pResource, pParams); } -static inline NV_STATUS stdmemCheckCopyPermissions_DISPATCH(struct StandardMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__stdmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); +static inline NV_STATUS stdmemUnmapFrom_DISPATCH(struct StandardMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__stdmemUnmapFrom__(pResource, pParams); } -static inline void stdmemPreDestruct_DISPATCH(struct StandardMemory *pResource) { - pResource->__stdmemPreDestruct__(pResource); +static inline NvU32 stdmemGetRefCount_DISPATCH(struct StandardMemory *pResource) { + return pResource->__stdmemGetRefCount__(pResource); } -static inline NV_STATUS stdmemIsDuplicate_DISPATCH(struct StandardMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__stdmemIsDuplicate__(pMemory, hMemory, pDuplicate); +static inline void stdmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct StandardMemory *pResource, RsResourceRef *pReference) { + pResource->__stdmemAddAdditionalDependants__(pClient, pResource, pReference); } -static inline void stdmemControlSerialization_Epilogue_DISPATCH(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__stdmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); -} +NvU64 stdmemGetSysmemPageSize_IMPL(struct OBJGPU *pGpu, struct StandardMemory *pMemory); -static inline NV_STATUS stdmemMap_DISPATCH(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__stdmemMap__(pMemory, pCallContext, pParams, pCpuMapping); -} -static inline NvBool stdmemAccessCallback_DISPATCH(struct StandardMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__stdmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +#ifdef __nvoc_standard_mem_h_disabled +static inline NvU64 stdmemGetSysmemPageSize(struct OBJGPU *pGpu, struct StandardMemory *pMemory) { + NV_ASSERT_FAILED_PRECOMP("StandardMemory was disabled!"); + return 0; } +#else //__nvoc_standard_mem_h_disabled +#define stdmemGetSysmemPageSize(pGpu, pMemory) stdmemGetSysmemPageSize_IMPL(pGpu, pMemory) +#endif //__nvoc_standard_mem_h_disabled + +#define stdmemGetSysmemPageSize_HAL(pGpu, pMemory) stdmemGetSysmemPageSize(pGpu, pMemory) + +NvBool stdmemCanCopy_IMPL(struct StandardMemory *pStandardMemory); NV_STATUS stdmemConstruct_IMPL(struct StandardMemory *arg_pStandardMemory, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_subdevice_diag_nvoc.c b/src/nvidia/generated/g_subdevice_diag_nvoc.c index 96f89eaaf1..56901bc011 100644 --- a/src/nvidia/generated/g_subdevice_diag_nvoc.c +++ b/src/nvidia/generated/g_subdevice_diag_nvoc.c @@ -111,126 +111,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DiagApi = /*pExportInfo=*/ &__nvoc_export_info_DiagApi }; -static NV_STATUS __nvoc_thunk_DiagApi_gpuresControl(struct GpuResource *pDiagApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return diagapiControl((struct DiagApi *)(((unsigned char *)pDiagApi) - __nvoc_rtti_DiagApi_GpuResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_DiagApi_resControlFilter(struct RsResource *pDiagApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return diagapiControlFilter((struct DiagApi *)(((unsigned char *)pDiagApi) - __nvoc_rtti_DiagApi_RsResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_GpuResource_diagapiShareCallback(struct DiagApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_diagapiCheckMemInterUnmap(struct DiagApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DiagApi_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_Notifier_diagapiGetOrAllocNotifShare(struct DiagApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DiagApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); -} - -static NV_STATUS __nvoc_thunk_RsResource_diagapiMapTo(struct DiagApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DiagApi_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_diagapiGetMapAddrSpace(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} - -static void __nvoc_thunk_Notifier_diagapiSetNotificationShare(struct DiagApi *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DiagApi_Notifier.offset), pNotifShare); -} - -static NvU32 __nvoc_thunk_RsResource_diagapiGetRefCount(struct DiagApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DiagApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_diagapiAddAdditionalDependants(struct RsClient *pClient, struct DiagApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DiagApi_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_diagapiControl_Prologue(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DiagApi_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_diagapiGetRegBaseOffsetAndSize(struct DiagApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset), pGpu, pOffset, pSize); -} - -static NV_STATUS __nvoc_thunk_GpuResource_diagapiInternalControlForward(struct DiagApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset), command, pParams, size); -} - -static NV_STATUS __nvoc_thunk_RsResource_diagapiUnmapFrom(struct DiagApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DiagApi_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_diagapiControl_Epilogue(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DiagApi_RmResource.offset), pCallContext, pParams); -} - -static NvHandle __nvoc_thunk_GpuResource_diagapiGetInternalObjectHandle(struct DiagApi *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_diagapiUnmap(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_diagapiGetMemInterMapParams(struct DiagApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DiagApi_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_diagapiGetMemoryMappingDescriptor(struct DiagApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_DiagApi_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_Notifier_diagapiUnregisterEvent(struct DiagApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DiagApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static NV_STATUS __nvoc_thunk_RmResource_diagapiControlSerialization_Prologue(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DiagApi_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_diagapiCanCopy(struct DiagApi *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DiagApi_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_diagapiIsPartialUnmapSupported(struct DiagApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DiagApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_diagapiPreDestruct(struct DiagApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DiagApi_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_diagapiIsDuplicate(struct DiagApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_DiagApi_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_diagapiControlSerialization_Epilogue(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DiagApi_RmResource.offset), pCallContext, pParams); -} - -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_diagapiGetNotificationListPtr(struct DiagApi *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DiagApi_Notifier.offset)); -} - -static struct NotifShare *__nvoc_thunk_Notifier_diagapiGetNotificationShare(struct DiagApi *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_DiagApi_Notifier.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_diagapiMap(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_diagapiAccessCallback(struct DiagApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_DiagApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -238,12 +118,12 @@ static NvBool __nvoc_thunk_RmResource_diagapiAccessCallback(struct DiagApi *pRes static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DiagApi[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) diagapiCtrlCmdFifoCheckEngineContext_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x208f0401u, /*paramSize=*/ sizeof(NV208F_CTRL_FIFO_CHECK_ENGINE_CONTEXT_PARAMS), @@ -253,12 +133,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DiagApi[ #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) diagapiCtrlCmdFifoEnableVirtualContext_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x208f0402u, /*paramSize=*/ sizeof(NV208F_CTRL_FIFO_ENABLE_VIRTUAL_CONTEXT_PARAMS), @@ -268,12 +148,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DiagApi[ #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) diagapiCtrlCmdFifoGetChannelState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x208f0403u, /*paramSize=*/ sizeof(NV208F_CTRL_FIFO_GET_CHANNEL_STATE_PARAMS), @@ -283,12 +163,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DiagApi[ #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) diagapiCtrlCmdFbCtrlGpuCache_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x208f0506u, /*paramSize=*/ sizeof(NV208F_CTRL_FB_CTRL_GPU_CACHE_PARAMS), @@ -298,12 +178,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DiagApi[ #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) diagapiCtrlCmdFbEccSetKillPtr_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x208f050eu, /*paramSize=*/ sizeof(NV208F_CTRL_FB_ECC_SET_KILL_PTR_PARAMS), @@ -313,12 +193,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DiagApi[ #endif }, { /* [5] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) diagapiCtrlCmdFbClearRemappedRows_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x208f0515u, /*paramSize=*/ sizeof(NV208F_CTRL_FB_CLEAR_REMAPPED_ROWS_PARAMS), @@ -328,12 +208,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DiagApi[ #endif }, { /* [6] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) diagapiCtrlCmdBifPBIWriteCommand_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x208f0701u, /*paramSize=*/ sizeof(NV208F_CTRL_BIF_PBI_WRITE_COMMAND_PARAMS), @@ -343,12 +223,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DiagApi[ #endif }, { /* [7] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) diagapiCtrlCmdBifConfigRegRead_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x208f0702u, /*paramSize=*/ sizeof(NV208F_CTRL_BIF_CONFIG_REG_READ_PARAMS), @@ -358,12 +238,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DiagApi[ #endif }, { /* [8] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) diagapiCtrlCmdBifConfigRegWrite_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x208f0703u, /*paramSize=*/ sizeof(NV208F_CTRL_BIF_CONFIG_REG_WRITE_PARAMS), @@ -373,12 +253,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DiagApi[ #endif }, { /* [9] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) diagapiCtrlCmdBifInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x208f0704u, /*paramSize=*/ sizeof(NV208F_CTRL_BIF_INFO_PARAMS), @@ -388,12 +268,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DiagApi[ #endif }, { /* [10] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) diagapiCtrlCmdGpuGetRamSvopValues_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x208f1101u, /*paramSize=*/ sizeof(NV208F_CTRL_GPU_RAM_SVOP_VALUES_PARAMS), @@ -403,12 +283,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DiagApi[ #endif }, { /* [11] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) diagapiCtrlCmdGpuSetRamSvopValues_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x208f1102u, /*paramSize=*/ sizeof(NV208F_CTRL_GPU_RAM_SVOP_VALUES_PARAMS), @@ -418,26 +298,227 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DiagApi[ #endif }, { /* [12] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) diagapiCtrlCmdGpuVerifyInforom_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x208f1105u, /*paramSize=*/ sizeof(NV208F_CTRL_GPU_VERIFY_INFOROM_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_DiagApi.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "diagapiCtrlCmdGpuVerifyInforom" +#endif + }, + { /* [13] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) diagapiCtrlCmdUcodeCoverageGetState_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x208f1901u, + /*paramSize=*/ sizeof(NV208F_CTRL_UCODE_COVERAGE_GET_STATE_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_DiagApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "diagapiCtrlCmdUcodeCoverageGetState" +#endif + }, + { /* [14] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) diagapiCtrlCmdUcodeCoverageSetState_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x208f1902u, + /*paramSize=*/ sizeof(NV208F_CTRL_UCODE_COVERAGE_SET_STATE_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_DiagApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "diagapiCtrlCmdUcodeCoverageSetState" +#endif + }, + { /* [15] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) diagapiCtrlCmdUcodeCoverageGetData_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x208f1903u, + /*paramSize=*/ sizeof(NV208F_CTRL_UCODE_COVERAGE_GET_DATA_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_DiagApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "diagapiCtrlCmdUcodeCoverageGetData" #endif }, }; +// 2 down-thunk(s) defined to bridge methods in DiagApi from superclasses + +// diagapiControl: virtual override (res) base (gpures) +static NV_STATUS __nvoc_down_thunk_DiagApi_gpuresControl(struct GpuResource *pDiagApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return diagapiControl((struct DiagApi *)(((unsigned char *) pDiagApi) - __nvoc_rtti_DiagApi_GpuResource.offset), pCallContext, pParams); +} + +// diagapiControlFilter: virtual override (res) base (gpures) +static NV_STATUS __nvoc_down_thunk_DiagApi_resControlFilter(struct RsResource *pDiagApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return diagapiControlFilter((struct DiagApi *)(((unsigned char *) pDiagApi) - __nvoc_rtti_DiagApi_RsResource.offset), pCallContext, pParams); +} + + +// 28 up-thunk(s) defined to bridge methods in DiagApi to superclasses + +// diagapiMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_diagapiMap(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// diagapiUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_diagapiUnmap(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset), pCallContext, pCpuMapping); +} + +// diagapiShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_diagapiShareCallback(struct DiagApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// diagapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_diagapiGetRegBaseOffsetAndSize(struct DiagApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset), pGpu, pOffset, pSize); +} + +// diagapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_diagapiGetMapAddrSpace(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + +// diagapiInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_diagapiInternalControlForward(struct DiagApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset), command, pParams, size); +} + +// diagapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_diagapiGetInternalObjectHandle(struct DiagApi *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset)); +} + +// diagapiAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_diagapiAccessCallback(struct DiagApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// diagapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_diagapiGetMemInterMapParams(struct DiagApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DiagApi_RmResource.offset), pParams); +} + +// diagapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_diagapiCheckMemInterUnmap(struct DiagApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DiagApi_RmResource.offset), bSubdeviceHandleProvided); +} + +// diagapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_diagapiGetMemoryMappingDescriptor(struct DiagApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DiagApi_RmResource.offset), ppMemDesc); +} + +// diagapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_diagapiControlSerialization_Prologue(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RmResource.offset), pCallContext, pParams); +} + +// diagapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_diagapiControlSerialization_Epilogue(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RmResource.offset), pCallContext, pParams); +} + +// diagapiControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_diagapiControl_Prologue(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RmResource.offset), pCallContext, pParams); +} + +// diagapiControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_diagapiControl_Epilogue(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RmResource.offset), pCallContext, pParams); +} + +// diagapiCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_diagapiCanCopy(struct DiagApi *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RsResource.offset)); +} + +// diagapiIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_diagapiIsDuplicate(struct DiagApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RsResource.offset), hMemory, pDuplicate); +} + +// diagapiPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_diagapiPreDestruct(struct DiagApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RsResource.offset)); +} + +// diagapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_diagapiIsPartialUnmapSupported(struct DiagApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RsResource.offset)); +} + +// diagapiMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_diagapiMapTo(struct DiagApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RsResource.offset), pParams); +} + +// diagapiUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_diagapiUnmapFrom(struct DiagApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RsResource.offset), pParams); +} + +// diagapiGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_diagapiGetRefCount(struct DiagApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RsResource.offset)); +} + +// diagapiAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_diagapiAddAdditionalDependants(struct RsClient *pClient, struct DiagApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RsResource.offset), pReference); +} + +// diagapiGetNotificationListPtr: virtual inherited (notify) base (notify) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_diagapiGetNotificationListPtr(struct DiagApi *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DiagApi_Notifier.offset)); +} + +// diagapiGetNotificationShare: virtual inherited (notify) base (notify) +static struct NotifShare * __nvoc_up_thunk_Notifier_diagapiGetNotificationShare(struct DiagApi *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DiagApi_Notifier.offset)); +} + +// diagapiSetNotificationShare: virtual inherited (notify) base (notify) +static void __nvoc_up_thunk_Notifier_diagapiSetNotificationShare(struct DiagApi *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DiagApi_Notifier.offset), pNotifShare); +} + +// diagapiUnregisterEvent: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_diagapiUnregisterEvent(struct DiagApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DiagApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +} + +// diagapiGetOrAllocNotifShare: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_diagapiGetOrAllocNotifShare(struct DiagApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DiagApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_DiagApi = { - /*numEntries=*/ 13, + /*numEntries=*/ 16, /*pExportEntries=*/ __nvoc_exported_method_def_DiagApi }; @@ -477,127 +558,188 @@ NV_STATUS __nvoc_ctor_DiagApi(DiagApi *pThis, struct CALL_CONTEXT * arg_pCallCon return status; } +// Vtable initialization static void __nvoc_init_funcTable_DiagApi_1(DiagApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // diagapiControl -- virtual override (res) base (gpures) pThis->__diagapiControl__ = &diagapiControl_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresControl__ = &__nvoc_down_thunk_DiagApi_gpuresControl; + // diagapiControlFilter -- virtual override (res) base (gpures) pThis->__diagapiControlFilter__ = &diagapiControlFilter_IMPL; + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ = &__nvoc_down_thunk_DiagApi_resControlFilter; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // diagapiCtrlCmdFifoCheckEngineContext -- exported (id=0x208f0401) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__diagapiCtrlCmdFifoCheckEngineContext__ = &diagapiCtrlCmdFifoCheckEngineContext_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // diagapiCtrlCmdFifoEnableVirtualContext -- exported (id=0x208f0402) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__diagapiCtrlCmdFifoEnableVirtualContext__ = &diagapiCtrlCmdFifoEnableVirtualContext_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // diagapiCtrlCmdFifoGetChannelState -- exported (id=0x208f0403) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__diagapiCtrlCmdFifoGetChannelState__ = &diagapiCtrlCmdFifoGetChannelState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // diagapiCtrlCmdFbCtrlGpuCache -- exported (id=0x208f0506) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__diagapiCtrlCmdFbCtrlGpuCache__ = &diagapiCtrlCmdFbCtrlGpuCache_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // diagapiCtrlCmdFbEccSetKillPtr -- exported (id=0x208f050e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__diagapiCtrlCmdFbEccSetKillPtr__ = &diagapiCtrlCmdFbEccSetKillPtr_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // diagapiCtrlCmdFbClearRemappedRows -- exported (id=0x208f0515) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__diagapiCtrlCmdFbClearRemappedRows__ = &diagapiCtrlCmdFbClearRemappedRows_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // diagapiCtrlCmdGpuGetRamSvopValues -- exported (id=0x208f1101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__diagapiCtrlCmdGpuGetRamSvopValues__ = &diagapiCtrlCmdGpuGetRamSvopValues_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // diagapiCtrlCmdGpuSetRamSvopValues -- exported (id=0x208f1102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__diagapiCtrlCmdGpuSetRamSvopValues__ = &diagapiCtrlCmdGpuSetRamSvopValues_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // diagapiCtrlCmdGpuVerifyInforom -- exported (id=0x208f1105) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__diagapiCtrlCmdGpuVerifyInforom__ = &diagapiCtrlCmdGpuVerifyInforom_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // diagapiCtrlCmdBifPBIWriteCommand -- exported (id=0x208f0701) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__diagapiCtrlCmdBifPBIWriteCommand__ = &diagapiCtrlCmdBifPBIWriteCommand_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // diagapiCtrlCmdBifConfigRegRead -- exported (id=0x208f0702) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__diagapiCtrlCmdBifConfigRegRead__ = &diagapiCtrlCmdBifConfigRegRead_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // diagapiCtrlCmdBifConfigRegWrite -- exported (id=0x208f0703) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__diagapiCtrlCmdBifConfigRegWrite__ = &diagapiCtrlCmdBifConfigRegWrite_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // diagapiCtrlCmdBifInfo -- exported (id=0x208f0704) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__diagapiCtrlCmdBifInfo__ = &diagapiCtrlCmdBifInfo_IMPL; #endif - pThis->__nvoc_base_GpuResource.__gpuresControl__ = &__nvoc_thunk_DiagApi_gpuresControl; + // diagapiCtrlCmdUcodeCoverageGetState -- exported (id=0x208f1901) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + pThis->__diagapiCtrlCmdUcodeCoverageGetState__ = &diagapiCtrlCmdUcodeCoverageGetState_IMPL; +#endif - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ = &__nvoc_thunk_DiagApi_resControlFilter; + // diagapiCtrlCmdUcodeCoverageSetState -- exported (id=0x208f1902) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + pThis->__diagapiCtrlCmdUcodeCoverageSetState__ = &diagapiCtrlCmdUcodeCoverageSetState_IMPL; +#endif - pThis->__diagapiShareCallback__ = &__nvoc_thunk_GpuResource_diagapiShareCallback; + // diagapiCtrlCmdUcodeCoverageGetData -- exported (id=0x208f1903) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + pThis->__diagapiCtrlCmdUcodeCoverageGetData__ = &diagapiCtrlCmdUcodeCoverageGetData_IMPL; +#endif - pThis->__diagapiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_diagapiCheckMemInterUnmap; + // diagapiMap -- virtual inherited (gpures) base (gpures) + pThis->__diagapiMap__ = &__nvoc_up_thunk_GpuResource_diagapiMap; - pThis->__diagapiGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_diagapiGetOrAllocNotifShare; + // diagapiUnmap -- virtual inherited (gpures) base (gpures) + pThis->__diagapiUnmap__ = &__nvoc_up_thunk_GpuResource_diagapiUnmap; - pThis->__diagapiMapTo__ = &__nvoc_thunk_RsResource_diagapiMapTo; + // diagapiShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__diagapiShareCallback__ = &__nvoc_up_thunk_GpuResource_diagapiShareCallback; - pThis->__diagapiGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_diagapiGetMapAddrSpace; + // diagapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__diagapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_diagapiGetRegBaseOffsetAndSize; - pThis->__diagapiSetNotificationShare__ = &__nvoc_thunk_Notifier_diagapiSetNotificationShare; + // diagapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__diagapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_diagapiGetMapAddrSpace; - pThis->__diagapiGetRefCount__ = &__nvoc_thunk_RsResource_diagapiGetRefCount; + // diagapiInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__diagapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_diagapiInternalControlForward; - pThis->__diagapiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_diagapiAddAdditionalDependants; + // diagapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__diagapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_diagapiGetInternalObjectHandle; - pThis->__diagapiControl_Prologue__ = &__nvoc_thunk_RmResource_diagapiControl_Prologue; + // diagapiAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__diagapiAccessCallback__ = &__nvoc_up_thunk_RmResource_diagapiAccessCallback; - pThis->__diagapiGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_diagapiGetRegBaseOffsetAndSize; + // diagapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__diagapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_diagapiGetMemInterMapParams; - pThis->__diagapiInternalControlForward__ = &__nvoc_thunk_GpuResource_diagapiInternalControlForward; + // diagapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__diagapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_diagapiCheckMemInterUnmap; - pThis->__diagapiUnmapFrom__ = &__nvoc_thunk_RsResource_diagapiUnmapFrom; + // diagapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__diagapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_diagapiGetMemoryMappingDescriptor; - pThis->__diagapiControl_Epilogue__ = &__nvoc_thunk_RmResource_diagapiControl_Epilogue; + // diagapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__diagapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_diagapiControlSerialization_Prologue; - pThis->__diagapiGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_diagapiGetInternalObjectHandle; + // diagapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__diagapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_diagapiControlSerialization_Epilogue; - pThis->__diagapiUnmap__ = &__nvoc_thunk_GpuResource_diagapiUnmap; + // diagapiControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__diagapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_diagapiControl_Prologue; - pThis->__diagapiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_diagapiGetMemInterMapParams; + // diagapiControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__diagapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_diagapiControl_Epilogue; - pThis->__diagapiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_diagapiGetMemoryMappingDescriptor; + // diagapiCanCopy -- virtual inherited (res) base (gpures) + pThis->__diagapiCanCopy__ = &__nvoc_up_thunk_RsResource_diagapiCanCopy; - pThis->__diagapiUnregisterEvent__ = &__nvoc_thunk_Notifier_diagapiUnregisterEvent; + // diagapiIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__diagapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_diagapiIsDuplicate; - pThis->__diagapiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_diagapiControlSerialization_Prologue; + // diagapiPreDestruct -- virtual inherited (res) base (gpures) + pThis->__diagapiPreDestruct__ = &__nvoc_up_thunk_RsResource_diagapiPreDestruct; - pThis->__diagapiCanCopy__ = &__nvoc_thunk_RsResource_diagapiCanCopy; + // diagapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__diagapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_diagapiIsPartialUnmapSupported; - pThis->__diagapiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_diagapiIsPartialUnmapSupported; + // diagapiMapTo -- virtual inherited (res) base (gpures) + pThis->__diagapiMapTo__ = &__nvoc_up_thunk_RsResource_diagapiMapTo; - pThis->__diagapiPreDestruct__ = &__nvoc_thunk_RsResource_diagapiPreDestruct; + // diagapiUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__diagapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_diagapiUnmapFrom; - pThis->__diagapiIsDuplicate__ = &__nvoc_thunk_RsResource_diagapiIsDuplicate; + // diagapiGetRefCount -- virtual inherited (res) base (gpures) + pThis->__diagapiGetRefCount__ = &__nvoc_up_thunk_RsResource_diagapiGetRefCount; - pThis->__diagapiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_diagapiControlSerialization_Epilogue; + // diagapiAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__diagapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_diagapiAddAdditionalDependants; - pThis->__diagapiGetNotificationListPtr__ = &__nvoc_thunk_Notifier_diagapiGetNotificationListPtr; + // diagapiGetNotificationListPtr -- virtual inherited (notify) base (notify) + pThis->__diagapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_diagapiGetNotificationListPtr; - pThis->__diagapiGetNotificationShare__ = &__nvoc_thunk_Notifier_diagapiGetNotificationShare; + // diagapiGetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__diagapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_diagapiGetNotificationShare; - pThis->__diagapiMap__ = &__nvoc_thunk_GpuResource_diagapiMap; + // diagapiSetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__diagapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_diagapiSetNotificationShare; - pThis->__diagapiAccessCallback__ = &__nvoc_thunk_RmResource_diagapiAccessCallback; -} + // diagapiUnregisterEvent -- virtual inherited (notify) base (notify) + pThis->__diagapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_diagapiUnregisterEvent; + + // diagapiGetOrAllocNotifShare -- virtual inherited (notify) base (notify) + pThis->__diagapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_diagapiGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_DiagApi_1 with approximately 48 basic block(s). + +// Initialize vtable(s) for 46 virtual method(s). void __nvoc_init_funcTable_DiagApi(DiagApi *pThis) { + + // Initialize vtable(s) with 46 per-object function pointer(s). __nvoc_init_funcTable_DiagApi_1(pThis); } diff --git a/src/nvidia/generated/g_subdevice_diag_nvoc.h b/src/nvidia/generated/g_subdevice_diag_nvoc.h index 8057531c6a..b44da666cb 100644 --- a/src/nvidia/generated/g_subdevice_diag_nvoc.h +++ b/src/nvidia/generated/g_subdevice_diag_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_SUBDEVICE_DIAG_NVOC_H_ #define _G_SUBDEVICE_DIAG_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_subdevice_diag_nvoc.h" #ifndef _DIAGAPI_H_ @@ -54,61 +62,75 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct DiagApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; struct Notifier __nvoc_base_Notifier; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct DiagApi *__nvoc_pbase_DiagApi; - NV_STATUS (*__diagapiControl__)(struct DiagApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__diagapiControlFilter__)(struct DiagApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__diagapiCtrlCmdFifoCheckEngineContext__)(struct DiagApi *, NV208F_CTRL_FIFO_CHECK_ENGINE_CONTEXT_PARAMS *); - NV_STATUS (*__diagapiCtrlCmdFifoEnableVirtualContext__)(struct DiagApi *, NV208F_CTRL_FIFO_ENABLE_VIRTUAL_CONTEXT_PARAMS *); - NV_STATUS (*__diagapiCtrlCmdFifoGetChannelState__)(struct DiagApi *, NV208F_CTRL_FIFO_GET_CHANNEL_STATE_PARAMS *); - NV_STATUS (*__diagapiCtrlCmdFbCtrlGpuCache__)(struct DiagApi *, NV208F_CTRL_FB_CTRL_GPU_CACHE_PARAMS *); - NV_STATUS (*__diagapiCtrlCmdFbEccSetKillPtr__)(struct DiagApi *, NV208F_CTRL_FB_ECC_SET_KILL_PTR_PARAMS *); - NV_STATUS (*__diagapiCtrlCmdFbClearRemappedRows__)(struct DiagApi *, NV208F_CTRL_FB_CLEAR_REMAPPED_ROWS_PARAMS *); - NV_STATUS (*__diagapiCtrlCmdGpuGetRamSvopValues__)(struct DiagApi *, NV208F_CTRL_GPU_RAM_SVOP_VALUES_PARAMS *); - NV_STATUS (*__diagapiCtrlCmdGpuSetRamSvopValues__)(struct DiagApi *, NV208F_CTRL_GPU_RAM_SVOP_VALUES_PARAMS *); - NV_STATUS (*__diagapiCtrlCmdGpuVerifyInforom__)(struct DiagApi *, NV208F_CTRL_GPU_VERIFY_INFOROM_PARAMS *); - NV_STATUS (*__diagapiCtrlCmdBifPBIWriteCommand__)(struct DiagApi *, NV208F_CTRL_BIF_PBI_WRITE_COMMAND_PARAMS *); - NV_STATUS (*__diagapiCtrlCmdBifConfigRegRead__)(struct DiagApi *, NV208F_CTRL_BIF_CONFIG_REG_READ_PARAMS *); - NV_STATUS (*__diagapiCtrlCmdBifConfigRegWrite__)(struct DiagApi *, NV208F_CTRL_BIF_CONFIG_REG_WRITE_PARAMS *); - NV_STATUS (*__diagapiCtrlCmdBifInfo__)(struct DiagApi *, NV208F_CTRL_BIF_INFO_PARAMS *); - NvBool (*__diagapiShareCallback__)(struct DiagApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__diagapiCheckMemInterUnmap__)(struct DiagApi *, NvBool); - NV_STATUS (*__diagapiGetOrAllocNotifShare__)(struct DiagApi *, NvHandle, NvHandle, struct NotifShare **); - NV_STATUS (*__diagapiMapTo__)(struct DiagApi *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__diagapiGetMapAddrSpace__)(struct DiagApi *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__diagapiSetNotificationShare__)(struct DiagApi *, struct NotifShare *); - NvU32 (*__diagapiGetRefCount__)(struct DiagApi *); - void (*__diagapiAddAdditionalDependants__)(struct RsClient *, struct DiagApi *, RsResourceRef *); - NV_STATUS (*__diagapiControl_Prologue__)(struct DiagApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__diagapiGetRegBaseOffsetAndSize__)(struct DiagApi *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__diagapiInternalControlForward__)(struct DiagApi *, NvU32, void *, NvU32); - NV_STATUS (*__diagapiUnmapFrom__)(struct DiagApi *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__diagapiControl_Epilogue__)(struct DiagApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__diagapiGetInternalObjectHandle__)(struct DiagApi *); - NV_STATUS (*__diagapiUnmap__)(struct DiagApi *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__diagapiGetMemInterMapParams__)(struct DiagApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__diagapiGetMemoryMappingDescriptor__)(struct DiagApi *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__diagapiUnregisterEvent__)(struct DiagApi *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__diagapiControlSerialization_Prologue__)(struct DiagApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__diagapiCanCopy__)(struct DiagApi *); - NvBool (*__diagapiIsPartialUnmapSupported__)(struct DiagApi *); - void (*__diagapiPreDestruct__)(struct DiagApi *); - NV_STATUS (*__diagapiIsDuplicate__)(struct DiagApi *, NvHandle, NvBool *); - void (*__diagapiControlSerialization_Epilogue__)(struct DiagApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__diagapiGetNotificationListPtr__)(struct DiagApi *); - struct NotifShare *(*__diagapiGetNotificationShare__)(struct DiagApi *); - NV_STATUS (*__diagapiMap__)(struct DiagApi *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__diagapiAccessCallback__)(struct DiagApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct INotifier *__nvoc_pbase_INotifier; // inotify super^2 + struct Notifier *__nvoc_pbase_Notifier; // notify super + struct DiagApi *__nvoc_pbase_DiagApi; // diagapi + + // Vtable with 46 per-object function pointers + NV_STATUS (*__diagapiControl__)(struct DiagApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) + NV_STATUS (*__diagapiControlFilter__)(struct DiagApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) + NV_STATUS (*__diagapiCtrlCmdFifoCheckEngineContext__)(struct DiagApi * /*this*/, NV208F_CTRL_FIFO_CHECK_ENGINE_CONTEXT_PARAMS *); // exported (id=0x208f0401) + NV_STATUS (*__diagapiCtrlCmdFifoEnableVirtualContext__)(struct DiagApi * /*this*/, NV208F_CTRL_FIFO_ENABLE_VIRTUAL_CONTEXT_PARAMS *); // exported (id=0x208f0402) + NV_STATUS (*__diagapiCtrlCmdFifoGetChannelState__)(struct DiagApi * /*this*/, NV208F_CTRL_FIFO_GET_CHANNEL_STATE_PARAMS *); // exported (id=0x208f0403) + NV_STATUS (*__diagapiCtrlCmdFbCtrlGpuCache__)(struct DiagApi * /*this*/, NV208F_CTRL_FB_CTRL_GPU_CACHE_PARAMS *); // exported (id=0x208f0506) + NV_STATUS (*__diagapiCtrlCmdFbEccSetKillPtr__)(struct DiagApi * /*this*/, NV208F_CTRL_FB_ECC_SET_KILL_PTR_PARAMS *); // exported (id=0x208f050e) + NV_STATUS (*__diagapiCtrlCmdFbClearRemappedRows__)(struct DiagApi * /*this*/, NV208F_CTRL_FB_CLEAR_REMAPPED_ROWS_PARAMS *); // exported (id=0x208f0515) + NV_STATUS (*__diagapiCtrlCmdGpuGetRamSvopValues__)(struct DiagApi * /*this*/, NV208F_CTRL_GPU_RAM_SVOP_VALUES_PARAMS *); // exported (id=0x208f1101) + NV_STATUS (*__diagapiCtrlCmdGpuSetRamSvopValues__)(struct DiagApi * /*this*/, NV208F_CTRL_GPU_RAM_SVOP_VALUES_PARAMS *); // exported (id=0x208f1102) + NV_STATUS (*__diagapiCtrlCmdGpuVerifyInforom__)(struct DiagApi * /*this*/, NV208F_CTRL_GPU_VERIFY_INFOROM_PARAMS *); // exported (id=0x208f1105) + NV_STATUS (*__diagapiCtrlCmdBifPBIWriteCommand__)(struct DiagApi * /*this*/, NV208F_CTRL_BIF_PBI_WRITE_COMMAND_PARAMS *); // exported (id=0x208f0701) + NV_STATUS (*__diagapiCtrlCmdBifConfigRegRead__)(struct DiagApi * /*this*/, NV208F_CTRL_BIF_CONFIG_REG_READ_PARAMS *); // exported (id=0x208f0702) + NV_STATUS (*__diagapiCtrlCmdBifConfigRegWrite__)(struct DiagApi * /*this*/, NV208F_CTRL_BIF_CONFIG_REG_WRITE_PARAMS *); // exported (id=0x208f0703) + NV_STATUS (*__diagapiCtrlCmdBifInfo__)(struct DiagApi * /*this*/, NV208F_CTRL_BIF_INFO_PARAMS *); // exported (id=0x208f0704) + NV_STATUS (*__diagapiCtrlCmdUcodeCoverageGetState__)(struct DiagApi * /*this*/, NV208F_CTRL_UCODE_COVERAGE_GET_STATE_PARAMS *); // exported (id=0x208f1901) + NV_STATUS (*__diagapiCtrlCmdUcodeCoverageSetState__)(struct DiagApi * /*this*/, NV208F_CTRL_UCODE_COVERAGE_SET_STATE_PARAMS *); // exported (id=0x208f1902) + NV_STATUS (*__diagapiCtrlCmdUcodeCoverageGetData__)(struct DiagApi * /*this*/, NV208F_CTRL_UCODE_COVERAGE_GET_DATA_PARAMS *); // exported (id=0x208f1903) + NV_STATUS (*__diagapiMap__)(struct DiagApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__diagapiUnmap__)(struct DiagApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__diagapiShareCallback__)(struct DiagApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__diagapiGetRegBaseOffsetAndSize__)(struct DiagApi * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__diagapiGetMapAddrSpace__)(struct DiagApi * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__diagapiInternalControlForward__)(struct DiagApi * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__diagapiGetInternalObjectHandle__)(struct DiagApi * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__diagapiAccessCallback__)(struct DiagApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__diagapiGetMemInterMapParams__)(struct DiagApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__diagapiCheckMemInterUnmap__)(struct DiagApi * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__diagapiGetMemoryMappingDescriptor__)(struct DiagApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__diagapiControlSerialization_Prologue__)(struct DiagApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__diagapiControlSerialization_Epilogue__)(struct DiagApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__diagapiControl_Prologue__)(struct DiagApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__diagapiControl_Epilogue__)(struct DiagApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__diagapiCanCopy__)(struct DiagApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__diagapiIsDuplicate__)(struct DiagApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__diagapiPreDestruct__)(struct DiagApi * /*this*/); // virtual inherited (res) base (gpures) + NvBool (*__diagapiIsPartialUnmapSupported__)(struct DiagApi * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__diagapiMapTo__)(struct DiagApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__diagapiUnmapFrom__)(struct DiagApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__diagapiGetRefCount__)(struct DiagApi * /*this*/); // virtual inherited (res) base (gpures) + void (*__diagapiAddAdditionalDependants__)(struct RsClient *, struct DiagApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + PEVENTNOTIFICATION * (*__diagapiGetNotificationListPtr__)(struct DiagApi * /*this*/); // virtual inherited (notify) base (notify) + struct NotifShare * (*__diagapiGetNotificationShare__)(struct DiagApi * /*this*/); // virtual inherited (notify) base (notify) + void (*__diagapiSetNotificationShare__)(struct DiagApi * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) + NV_STATUS (*__diagapiUnregisterEvent__)(struct DiagApi * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) + NV_STATUS (*__diagapiGetOrAllocNotifShare__)(struct DiagApi * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) + + // Data members NvU32 notifyActions[1]; }; @@ -121,6 +143,7 @@ typedef struct DiagApi DiagApi; #define __nvoc_class_id_DiagApi 0xaa3066 #endif /* __nvoc_class_id_DiagApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_DiagApi; #define __staticCast_DiagApi(pThis) \ @@ -133,258 +156,328 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_DiagApi; ((DiagApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(DiagApi))) #endif //__nvoc_subdevice_diag_h_disabled - NV_STATUS __nvoc_objCreateDynamic_DiagApi(DiagApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_DiagApi(DiagApi**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_DiagApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_DiagApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define diagapiControl_FNPTR(pDiagApi) pDiagApi->__diagapiControl__ #define diagapiControl(pDiagApi, pCallContext, pParams) diagapiControl_DISPATCH(pDiagApi, pCallContext, pParams) +#define diagapiControlFilter_FNPTR(pDiagApi) pDiagApi->__diagapiControlFilter__ #define diagapiControlFilter(pDiagApi, pCallContext, pParams) diagapiControlFilter_DISPATCH(pDiagApi, pCallContext, pParams) +#define diagapiCtrlCmdFifoCheckEngineContext_FNPTR(pDiagApi) pDiagApi->__diagapiCtrlCmdFifoCheckEngineContext__ #define diagapiCtrlCmdFifoCheckEngineContext(pDiagApi, pCheckEngineContextParams) diagapiCtrlCmdFifoCheckEngineContext_DISPATCH(pDiagApi, pCheckEngineContextParams) +#define diagapiCtrlCmdFifoEnableVirtualContext_FNPTR(pDiagApi) pDiagApi->__diagapiCtrlCmdFifoEnableVirtualContext__ #define diagapiCtrlCmdFifoEnableVirtualContext(pDiagApi, pEnableVCParams) diagapiCtrlCmdFifoEnableVirtualContext_DISPATCH(pDiagApi, pEnableVCParams) +#define diagapiCtrlCmdFifoGetChannelState_FNPTR(pDiagApi) pDiagApi->__diagapiCtrlCmdFifoGetChannelState__ #define diagapiCtrlCmdFifoGetChannelState(pDiagApi, pChannelStateParams) diagapiCtrlCmdFifoGetChannelState_DISPATCH(pDiagApi, pChannelStateParams) +#define diagapiCtrlCmdFbCtrlGpuCache_FNPTR(pDiagApi) pDiagApi->__diagapiCtrlCmdFbCtrlGpuCache__ #define diagapiCtrlCmdFbCtrlGpuCache(pDiagApi, pGpuCacheParams) diagapiCtrlCmdFbCtrlGpuCache_DISPATCH(pDiagApi, pGpuCacheParams) +#define diagapiCtrlCmdFbEccSetKillPtr_FNPTR(pDiagApi) pDiagApi->__diagapiCtrlCmdFbEccSetKillPtr__ #define diagapiCtrlCmdFbEccSetKillPtr(pDiagApi, pParams) diagapiCtrlCmdFbEccSetKillPtr_DISPATCH(pDiagApi, pParams) +#define diagapiCtrlCmdFbClearRemappedRows_FNPTR(pDiagApi) pDiagApi->__diagapiCtrlCmdFbClearRemappedRows__ #define diagapiCtrlCmdFbClearRemappedRows(pDiagApi, pRemappedRowsParams) diagapiCtrlCmdFbClearRemappedRows_DISPATCH(pDiagApi, pRemappedRowsParams) +#define diagapiCtrlCmdGpuGetRamSvopValues_FNPTR(pDiagApi) pDiagApi->__diagapiCtrlCmdGpuGetRamSvopValues__ #define diagapiCtrlCmdGpuGetRamSvopValues(pDiagApi, pGetRamSvopParams) diagapiCtrlCmdGpuGetRamSvopValues_DISPATCH(pDiagApi, pGetRamSvopParams) +#define diagapiCtrlCmdGpuSetRamSvopValues_FNPTR(pDiagApi) pDiagApi->__diagapiCtrlCmdGpuSetRamSvopValues__ #define diagapiCtrlCmdGpuSetRamSvopValues(pDiagApi, pSetRamSvopParams) diagapiCtrlCmdGpuSetRamSvopValues_DISPATCH(pDiagApi, pSetRamSvopParams) +#define diagapiCtrlCmdGpuVerifyInforom_FNPTR(pDiagApi) pDiagApi->__diagapiCtrlCmdGpuVerifyInforom__ #define diagapiCtrlCmdGpuVerifyInforom(pDiagApi, pParams) diagapiCtrlCmdGpuVerifyInforom_DISPATCH(pDiagApi, pParams) +#define diagapiCtrlCmdBifPBIWriteCommand_FNPTR(pDiagApi) pDiagApi->__diagapiCtrlCmdBifPBIWriteCommand__ #define diagapiCtrlCmdBifPBIWriteCommand(pDiagApi, pWritePbiParams) diagapiCtrlCmdBifPBIWriteCommand_DISPATCH(pDiagApi, pWritePbiParams) +#define diagapiCtrlCmdBifConfigRegRead_FNPTR(pDiagApi) pDiagApi->__diagapiCtrlCmdBifConfigRegRead__ #define diagapiCtrlCmdBifConfigRegRead(pDiagApi, pReadConfigReg) diagapiCtrlCmdBifConfigRegRead_DISPATCH(pDiagApi, pReadConfigReg) +#define diagapiCtrlCmdBifConfigRegWrite_FNPTR(pDiagApi) pDiagApi->__diagapiCtrlCmdBifConfigRegWrite__ #define diagapiCtrlCmdBifConfigRegWrite(pDiagApi, pWriteConfigReg) diagapiCtrlCmdBifConfigRegWrite_DISPATCH(pDiagApi, pWriteConfigReg) +#define diagapiCtrlCmdBifInfo_FNPTR(pDiagApi) pDiagApi->__diagapiCtrlCmdBifInfo__ #define diagapiCtrlCmdBifInfo(pDiagApi, pInfo) diagapiCtrlCmdBifInfo_DISPATCH(pDiagApi, pInfo) +#define diagapiCtrlCmdUcodeCoverageGetState_FNPTR(pDiagApi) pDiagApi->__diagapiCtrlCmdUcodeCoverageGetState__ +#define diagapiCtrlCmdUcodeCoverageGetState(pDiagApi, pParams) diagapiCtrlCmdUcodeCoverageGetState_DISPATCH(pDiagApi, pParams) +#define diagapiCtrlCmdUcodeCoverageSetState_FNPTR(pDiagApi) pDiagApi->__diagapiCtrlCmdUcodeCoverageSetState__ +#define diagapiCtrlCmdUcodeCoverageSetState(pDiagApi, pParams) diagapiCtrlCmdUcodeCoverageSetState_DISPATCH(pDiagApi, pParams) +#define diagapiCtrlCmdUcodeCoverageGetData_FNPTR(pDiagApi) pDiagApi->__diagapiCtrlCmdUcodeCoverageGetData__ +#define diagapiCtrlCmdUcodeCoverageGetData(pDiagApi, pParams) diagapiCtrlCmdUcodeCoverageGetData_DISPATCH(pDiagApi, pParams) +#define diagapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define diagapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) diagapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define diagapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define diagapiUnmap(pGpuResource, pCallContext, pCpuMapping) diagapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define diagapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define diagapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) diagapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define diagapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) diagapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define diagapiGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) diagapiGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -#define diagapiMapTo(pResource, pParams) diagapiMapTo_DISPATCH(pResource, pParams) -#define diagapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) diagapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define diagapiSetNotificationShare(pNotifier, pNotifShare) diagapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define diagapiGetRefCount(pResource) diagapiGetRefCount_DISPATCH(pResource) -#define diagapiAddAdditionalDependants(pClient, pResource, pReference) diagapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define diagapiControl_Prologue(pResource, pCallContext, pParams) diagapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define diagapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define diagapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) diagapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define diagapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define diagapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) diagapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define diagapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define diagapiInternalControlForward(pGpuResource, command, pParams, size) diagapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define diagapiUnmapFrom(pResource, pParams) diagapiUnmapFrom_DISPATCH(pResource, pParams) -#define diagapiControl_Epilogue(pResource, pCallContext, pParams) diagapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define diagapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define diagapiGetInternalObjectHandle(pGpuResource) diagapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define diagapiUnmap(pGpuResource, pCallContext, pCpuMapping) diagapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define diagapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define diagapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) diagapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define diagapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define diagapiGetMemInterMapParams(pRmResource, pParams) diagapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define diagapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define diagapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) diagapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define diagapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define diagapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) diagapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define diagapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) diagapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define diagapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define diagapiControlSerialization_Prologue(pResource, pCallContext, pParams) diagapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define diagapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define diagapiControlSerialization_Epilogue(pResource, pCallContext, pParams) diagapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define diagapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define diagapiControl_Prologue(pResource, pCallContext, pParams) diagapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define diagapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define diagapiControl_Epilogue(pResource, pCallContext, pParams) diagapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define diagapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define diagapiCanCopy(pResource) diagapiCanCopy_DISPATCH(pResource) -#define diagapiIsPartialUnmapSupported(pResource) diagapiIsPartialUnmapSupported_DISPATCH(pResource) -#define diagapiPreDestruct(pResource) diagapiPreDestruct_DISPATCH(pResource) +#define diagapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define diagapiIsDuplicate(pResource, hMemory, pDuplicate) diagapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define diagapiControlSerialization_Epilogue(pResource, pCallContext, pParams) diagapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define diagapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define diagapiPreDestruct(pResource) diagapiPreDestruct_DISPATCH(pResource) +#define diagapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define diagapiIsPartialUnmapSupported(pResource) diagapiIsPartialUnmapSupported_DISPATCH(pResource) +#define diagapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define diagapiMapTo(pResource, pParams) diagapiMapTo_DISPATCH(pResource, pParams) +#define diagapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define diagapiUnmapFrom(pResource, pParams) diagapiUnmapFrom_DISPATCH(pResource, pParams) +#define diagapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define diagapiGetRefCount(pResource) diagapiGetRefCount_DISPATCH(pResource) +#define diagapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define diagapiAddAdditionalDependants(pClient, pResource, pReference) diagapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define diagapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define diagapiGetNotificationListPtr(pNotifier) diagapiGetNotificationListPtr_DISPATCH(pNotifier) +#define diagapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ #define diagapiGetNotificationShare(pNotifier) diagapiGetNotificationShare_DISPATCH(pNotifier) -#define diagapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) diagapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define diagapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) diagapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS diagapiControl_IMPL(struct DiagApi *pDiagApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); +#define diagapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define diagapiSetNotificationShare(pNotifier, pNotifShare) diagapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define diagapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define diagapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) diagapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define diagapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define diagapiGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) diagapiGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) +// Dispatch functions static inline NV_STATUS diagapiControl_DISPATCH(struct DiagApi *pDiagApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pDiagApi->__diagapiControl__(pDiagApi, pCallContext, pParams); } -NV_STATUS diagapiControlFilter_IMPL(struct DiagApi *pDiagApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline NV_STATUS diagapiControlFilter_DISPATCH(struct DiagApi *pDiagApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pDiagApi->__diagapiControlFilter__(pDiagApi, pCallContext, pParams); } -NV_STATUS diagapiCtrlCmdFifoCheckEngineContext_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_FIFO_CHECK_ENGINE_CONTEXT_PARAMS *pCheckEngineContextParams); - static inline NV_STATUS diagapiCtrlCmdFifoCheckEngineContext_DISPATCH(struct DiagApi *pDiagApi, NV208F_CTRL_FIFO_CHECK_ENGINE_CONTEXT_PARAMS *pCheckEngineContextParams) { return pDiagApi->__diagapiCtrlCmdFifoCheckEngineContext__(pDiagApi, pCheckEngineContextParams); } -NV_STATUS diagapiCtrlCmdFifoEnableVirtualContext_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_FIFO_ENABLE_VIRTUAL_CONTEXT_PARAMS *pEnableVCParams); - static inline NV_STATUS diagapiCtrlCmdFifoEnableVirtualContext_DISPATCH(struct DiagApi *pDiagApi, NV208F_CTRL_FIFO_ENABLE_VIRTUAL_CONTEXT_PARAMS *pEnableVCParams) { return pDiagApi->__diagapiCtrlCmdFifoEnableVirtualContext__(pDiagApi, pEnableVCParams); } -NV_STATUS diagapiCtrlCmdFifoGetChannelState_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_FIFO_GET_CHANNEL_STATE_PARAMS *pChannelStateParams); - static inline NV_STATUS diagapiCtrlCmdFifoGetChannelState_DISPATCH(struct DiagApi *pDiagApi, NV208F_CTRL_FIFO_GET_CHANNEL_STATE_PARAMS *pChannelStateParams) { return pDiagApi->__diagapiCtrlCmdFifoGetChannelState__(pDiagApi, pChannelStateParams); } -NV_STATUS diagapiCtrlCmdFbCtrlGpuCache_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_FB_CTRL_GPU_CACHE_PARAMS *pGpuCacheParams); - static inline NV_STATUS diagapiCtrlCmdFbCtrlGpuCache_DISPATCH(struct DiagApi *pDiagApi, NV208F_CTRL_FB_CTRL_GPU_CACHE_PARAMS *pGpuCacheParams) { return pDiagApi->__diagapiCtrlCmdFbCtrlGpuCache__(pDiagApi, pGpuCacheParams); } -NV_STATUS diagapiCtrlCmdFbEccSetKillPtr_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_FB_ECC_SET_KILL_PTR_PARAMS *pParams); - static inline NV_STATUS diagapiCtrlCmdFbEccSetKillPtr_DISPATCH(struct DiagApi *pDiagApi, NV208F_CTRL_FB_ECC_SET_KILL_PTR_PARAMS *pParams) { return pDiagApi->__diagapiCtrlCmdFbEccSetKillPtr__(pDiagApi, pParams); } -NV_STATUS diagapiCtrlCmdFbClearRemappedRows_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_FB_CLEAR_REMAPPED_ROWS_PARAMS *pRemappedRowsParams); - static inline NV_STATUS diagapiCtrlCmdFbClearRemappedRows_DISPATCH(struct DiagApi *pDiagApi, NV208F_CTRL_FB_CLEAR_REMAPPED_ROWS_PARAMS *pRemappedRowsParams) { return pDiagApi->__diagapiCtrlCmdFbClearRemappedRows__(pDiagApi, pRemappedRowsParams); } -NV_STATUS diagapiCtrlCmdGpuGetRamSvopValues_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_GPU_RAM_SVOP_VALUES_PARAMS *pGetRamSvopParams); - static inline NV_STATUS diagapiCtrlCmdGpuGetRamSvopValues_DISPATCH(struct DiagApi *pDiagApi, NV208F_CTRL_GPU_RAM_SVOP_VALUES_PARAMS *pGetRamSvopParams) { return pDiagApi->__diagapiCtrlCmdGpuGetRamSvopValues__(pDiagApi, pGetRamSvopParams); } -NV_STATUS diagapiCtrlCmdGpuSetRamSvopValues_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_GPU_RAM_SVOP_VALUES_PARAMS *pSetRamSvopParams); - static inline NV_STATUS diagapiCtrlCmdGpuSetRamSvopValues_DISPATCH(struct DiagApi *pDiagApi, NV208F_CTRL_GPU_RAM_SVOP_VALUES_PARAMS *pSetRamSvopParams) { return pDiagApi->__diagapiCtrlCmdGpuSetRamSvopValues__(pDiagApi, pSetRamSvopParams); } -NV_STATUS diagapiCtrlCmdGpuVerifyInforom_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_GPU_VERIFY_INFOROM_PARAMS *pParams); - static inline NV_STATUS diagapiCtrlCmdGpuVerifyInforom_DISPATCH(struct DiagApi *pDiagApi, NV208F_CTRL_GPU_VERIFY_INFOROM_PARAMS *pParams) { return pDiagApi->__diagapiCtrlCmdGpuVerifyInforom__(pDiagApi, pParams); } -NV_STATUS diagapiCtrlCmdBifPBIWriteCommand_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_BIF_PBI_WRITE_COMMAND_PARAMS *pWritePbiParams); - static inline NV_STATUS diagapiCtrlCmdBifPBIWriteCommand_DISPATCH(struct DiagApi *pDiagApi, NV208F_CTRL_BIF_PBI_WRITE_COMMAND_PARAMS *pWritePbiParams) { return pDiagApi->__diagapiCtrlCmdBifPBIWriteCommand__(pDiagApi, pWritePbiParams); } -NV_STATUS diagapiCtrlCmdBifConfigRegRead_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_BIF_CONFIG_REG_READ_PARAMS *pReadConfigReg); - static inline NV_STATUS diagapiCtrlCmdBifConfigRegRead_DISPATCH(struct DiagApi *pDiagApi, NV208F_CTRL_BIF_CONFIG_REG_READ_PARAMS *pReadConfigReg) { return pDiagApi->__diagapiCtrlCmdBifConfigRegRead__(pDiagApi, pReadConfigReg); } -NV_STATUS diagapiCtrlCmdBifConfigRegWrite_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_BIF_CONFIG_REG_WRITE_PARAMS *pWriteConfigReg); - static inline NV_STATUS diagapiCtrlCmdBifConfigRegWrite_DISPATCH(struct DiagApi *pDiagApi, NV208F_CTRL_BIF_CONFIG_REG_WRITE_PARAMS *pWriteConfigReg) { return pDiagApi->__diagapiCtrlCmdBifConfigRegWrite__(pDiagApi, pWriteConfigReg); } -NV_STATUS diagapiCtrlCmdBifInfo_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_BIF_INFO_PARAMS *pInfo); - static inline NV_STATUS diagapiCtrlCmdBifInfo_DISPATCH(struct DiagApi *pDiagApi, NV208F_CTRL_BIF_INFO_PARAMS *pInfo) { return pDiagApi->__diagapiCtrlCmdBifInfo__(pDiagApi, pInfo); } -static inline NvBool diagapiShareCallback_DISPATCH(struct DiagApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__diagapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS diagapiCheckMemInterUnmap_DISPATCH(struct DiagApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__diagapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); -} - -static inline NV_STATUS diagapiGetOrAllocNotifShare_DISPATCH(struct DiagApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__diagapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); +static inline NV_STATUS diagapiCtrlCmdUcodeCoverageGetState_DISPATCH(struct DiagApi *pDiagApi, NV208F_CTRL_UCODE_COVERAGE_GET_STATE_PARAMS *pParams) { + return pDiagApi->__diagapiCtrlCmdUcodeCoverageGetState__(pDiagApi, pParams); } -static inline NV_STATUS diagapiMapTo_DISPATCH(struct DiagApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__diagapiMapTo__(pResource, pParams); +static inline NV_STATUS diagapiCtrlCmdUcodeCoverageSetState_DISPATCH(struct DiagApi *pDiagApi, NV208F_CTRL_UCODE_COVERAGE_SET_STATE_PARAMS *pParams) { + return pDiagApi->__diagapiCtrlCmdUcodeCoverageSetState__(pDiagApi, pParams); } -static inline NV_STATUS diagapiGetMapAddrSpace_DISPATCH(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__diagapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); -} - -static inline void diagapiSetNotificationShare_DISPATCH(struct DiagApi *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__diagapiSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS diagapiCtrlCmdUcodeCoverageGetData_DISPATCH(struct DiagApi *pDiagApi, NV208F_CTRL_UCODE_COVERAGE_GET_DATA_PARAMS *pParams) { + return pDiagApi->__diagapiCtrlCmdUcodeCoverageGetData__(pDiagApi, pParams); } -static inline NvU32 diagapiGetRefCount_DISPATCH(struct DiagApi *pResource) { - return pResource->__diagapiGetRefCount__(pResource); +static inline NV_STATUS diagapiMap_DISPATCH(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__diagapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void diagapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DiagApi *pResource, RsResourceRef *pReference) { - pResource->__diagapiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS diagapiUnmap_DISPATCH(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__diagapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS diagapiControl_Prologue_DISPATCH(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__diagapiControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool diagapiShareCallback_DISPATCH(struct DiagApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__diagapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS diagapiGetRegBaseOffsetAndSize_DISPATCH(struct DiagApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__diagapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS diagapiInternalControlForward_DISPATCH(struct DiagApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__diagapiInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS diagapiUnmapFrom_DISPATCH(struct DiagApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__diagapiUnmapFrom__(pResource, pParams); +static inline NV_STATUS diagapiGetMapAddrSpace_DISPATCH(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__diagapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void diagapiControl_Epilogue_DISPATCH(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__diagapiControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS diagapiInternalControlForward_DISPATCH(struct DiagApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__diagapiInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle diagapiGetInternalObjectHandle_DISPATCH(struct DiagApi *pGpuResource) { return pGpuResource->__diagapiGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS diagapiUnmap_DISPATCH(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__diagapiUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool diagapiAccessCallback_DISPATCH(struct DiagApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__diagapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS diagapiGetMemInterMapParams_DISPATCH(struct DiagApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__diagapiGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS diagapiGetMemoryMappingDescriptor_DISPATCH(struct DiagApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__diagapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS diagapiCheckMemInterUnmap_DISPATCH(struct DiagApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__diagapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS diagapiUnregisterEvent_DISPATCH(struct DiagApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__diagapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline NV_STATUS diagapiGetMemoryMappingDescriptor_DISPATCH(struct DiagApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__diagapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS diagapiControlSerialization_Prologue_DISPATCH(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__diagapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void diagapiControlSerialization_Epilogue_DISPATCH(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__diagapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS diagapiControl_Prologue_DISPATCH(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__diagapiControl_Prologue__(pResource, pCallContext, pParams); +} + +static inline void diagapiControl_Epilogue_DISPATCH(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__diagapiControl_Epilogue__(pResource, pCallContext, pParams); +} + static inline NvBool diagapiCanCopy_DISPATCH(struct DiagApi *pResource) { return pResource->__diagapiCanCopy__(pResource); } -static inline NvBool diagapiIsPartialUnmapSupported_DISPATCH(struct DiagApi *pResource) { - return pResource->__diagapiIsPartialUnmapSupported__(pResource); +static inline NV_STATUS diagapiIsDuplicate_DISPATCH(struct DiagApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__diagapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void diagapiPreDestruct_DISPATCH(struct DiagApi *pResource) { pResource->__diagapiPreDestruct__(pResource); } -static inline NV_STATUS diagapiIsDuplicate_DISPATCH(struct DiagApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__diagapiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NvBool diagapiIsPartialUnmapSupported_DISPATCH(struct DiagApi *pResource) { + return pResource->__diagapiIsPartialUnmapSupported__(pResource); } -static inline void diagapiControlSerialization_Epilogue_DISPATCH(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__diagapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS diagapiMapTo_DISPATCH(struct DiagApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__diagapiMapTo__(pResource, pParams); } -static inline PEVENTNOTIFICATION *diagapiGetNotificationListPtr_DISPATCH(struct DiagApi *pNotifier) { +static inline NV_STATUS diagapiUnmapFrom_DISPATCH(struct DiagApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__diagapiUnmapFrom__(pResource, pParams); +} + +static inline NvU32 diagapiGetRefCount_DISPATCH(struct DiagApi *pResource) { + return pResource->__diagapiGetRefCount__(pResource); +} + +static inline void diagapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DiagApi *pResource, RsResourceRef *pReference) { + pResource->__diagapiAddAdditionalDependants__(pClient, pResource, pReference); +} + +static inline PEVENTNOTIFICATION * diagapiGetNotificationListPtr_DISPATCH(struct DiagApi *pNotifier) { return pNotifier->__diagapiGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *diagapiGetNotificationShare_DISPATCH(struct DiagApi *pNotifier) { +static inline struct NotifShare * diagapiGetNotificationShare_DISPATCH(struct DiagApi *pNotifier) { return pNotifier->__diagapiGetNotificationShare__(pNotifier); } -static inline NV_STATUS diagapiMap_DISPATCH(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__diagapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void diagapiSetNotificationShare_DISPATCH(struct DiagApi *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__diagapiSetNotificationShare__(pNotifier, pNotifShare); } -static inline NvBool diagapiAccessCallback_DISPATCH(struct DiagApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__diagapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS diagapiUnregisterEvent_DISPATCH(struct DiagApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__diagapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } +static inline NV_STATUS diagapiGetOrAllocNotifShare_DISPATCH(struct DiagApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return pNotifier->__diagapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); +} + +NV_STATUS diagapiControl_IMPL(struct DiagApi *pDiagApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +NV_STATUS diagapiControlFilter_IMPL(struct DiagApi *pDiagApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +NV_STATUS diagapiCtrlCmdFifoCheckEngineContext_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_FIFO_CHECK_ENGINE_CONTEXT_PARAMS *pCheckEngineContextParams); + +NV_STATUS diagapiCtrlCmdFifoEnableVirtualContext_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_FIFO_ENABLE_VIRTUAL_CONTEXT_PARAMS *pEnableVCParams); + +NV_STATUS diagapiCtrlCmdFifoGetChannelState_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_FIFO_GET_CHANNEL_STATE_PARAMS *pChannelStateParams); + +NV_STATUS diagapiCtrlCmdFbCtrlGpuCache_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_FB_CTRL_GPU_CACHE_PARAMS *pGpuCacheParams); + +NV_STATUS diagapiCtrlCmdFbEccSetKillPtr_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_FB_ECC_SET_KILL_PTR_PARAMS *pParams); + +NV_STATUS diagapiCtrlCmdFbClearRemappedRows_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_FB_CLEAR_REMAPPED_ROWS_PARAMS *pRemappedRowsParams); + +NV_STATUS diagapiCtrlCmdGpuGetRamSvopValues_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_GPU_RAM_SVOP_VALUES_PARAMS *pGetRamSvopParams); + +NV_STATUS diagapiCtrlCmdGpuSetRamSvopValues_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_GPU_RAM_SVOP_VALUES_PARAMS *pSetRamSvopParams); + +NV_STATUS diagapiCtrlCmdGpuVerifyInforom_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_GPU_VERIFY_INFOROM_PARAMS *pParams); + +NV_STATUS diagapiCtrlCmdBifPBIWriteCommand_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_BIF_PBI_WRITE_COMMAND_PARAMS *pWritePbiParams); + +NV_STATUS diagapiCtrlCmdBifConfigRegRead_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_BIF_CONFIG_REG_READ_PARAMS *pReadConfigReg); + +NV_STATUS diagapiCtrlCmdBifConfigRegWrite_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_BIF_CONFIG_REG_WRITE_PARAMS *pWriteConfigReg); + +NV_STATUS diagapiCtrlCmdBifInfo_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_BIF_INFO_PARAMS *pInfo); + +NV_STATUS diagapiCtrlCmdUcodeCoverageGetState_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_UCODE_COVERAGE_GET_STATE_PARAMS *pParams); + +NV_STATUS diagapiCtrlCmdUcodeCoverageSetState_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_UCODE_COVERAGE_SET_STATE_PARAMS *pParams); + +NV_STATUS diagapiCtrlCmdUcodeCoverageGetData_IMPL(struct DiagApi *pDiagApi, NV208F_CTRL_UCODE_COVERAGE_GET_DATA_PARAMS *pParams); + NV_STATUS diagapiConstruct_IMPL(struct DiagApi *arg_pDiagApi, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_diagapiConstruct(arg_pDiagApi, arg_pCallContext, arg_pParams) diagapiConstruct_IMPL(arg_pDiagApi, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_subdevice_nvoc.c b/src/nvidia/generated/g_subdevice_nvoc.c index 6d091e95ca..621b5cd738 100644 --- a/src/nvidia/generated/g_subdevice_nvoc.c +++ b/src/nvidia/generated/g_subdevice_nvoc.c @@ -111,126 +111,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_Subdevice = /*pExportInfo=*/ &__nvoc_export_info_Subdevice }; -static void __nvoc_thunk_Subdevice_resPreDestruct(struct RsResource *pResource) { - subdevicePreDestruct((struct Subdevice *)(((unsigned char *)pResource) - __nvoc_rtti_Subdevice_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_Subdevice_gpuresInternalControlForward(struct GpuResource *pSubdevice, NvU32 command, void *pParams, NvU32 size) { - return subdeviceInternalControlForward((struct Subdevice *)(((unsigned char *)pSubdevice) - __nvoc_rtti_Subdevice_GpuResource.offset), command, pParams, size); -} - -static NV_STATUS __nvoc_thunk_Subdevice_resControlFilter(struct RsResource *pSubdevice, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return subdeviceControlFilter((struct Subdevice *)(((unsigned char *)pSubdevice) - __nvoc_rtti_Subdevice_RsResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_GpuResource_subdeviceShareCallback(struct Subdevice *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_subdeviceCheckMemInterUnmap(struct Subdevice *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_Subdevice_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_Notifier_subdeviceGetOrAllocNotifShare(struct Subdevice *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_Subdevice_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); -} - -static NV_STATUS __nvoc_thunk_RsResource_subdeviceMapTo(struct Subdevice *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Subdevice_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_subdeviceGetMapAddrSpace(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} - -static void __nvoc_thunk_Notifier_subdeviceSetNotificationShare(struct Subdevice *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_Subdevice_Notifier.offset), pNotifShare); -} - -static NvU32 __nvoc_thunk_RsResource_subdeviceGetRefCount(struct Subdevice *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Subdevice_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_subdeviceAddAdditionalDependants(struct RsClient *pClient, struct Subdevice *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Subdevice_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_subdeviceControl_Prologue(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Subdevice_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_subdeviceGetRegBaseOffsetAndSize(struct Subdevice *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset), pGpu, pOffset, pSize); -} - -static NV_STATUS __nvoc_thunk_RsResource_subdeviceUnmapFrom(struct Subdevice *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Subdevice_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_subdeviceControl_Epilogue(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Subdevice_RmResource.offset), pCallContext, pParams); -} - -static NvHandle __nvoc_thunk_GpuResource_subdeviceGetInternalObjectHandle(struct Subdevice *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_subdeviceControl(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_subdeviceUnmap(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_subdeviceGetMemInterMapParams(struct Subdevice *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_Subdevice_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_subdeviceGetMemoryMappingDescriptor(struct Subdevice *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_Subdevice_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_Notifier_subdeviceUnregisterEvent(struct Subdevice *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_Subdevice_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static NV_STATUS __nvoc_thunk_RmResource_subdeviceControlSerialization_Prologue(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Subdevice_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_subdeviceCanCopy(struct Subdevice *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Subdevice_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_subdeviceIsPartialUnmapSupported(struct Subdevice *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Subdevice_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_subdeviceIsDuplicate(struct Subdevice *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_Subdevice_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_subdeviceControlSerialization_Epilogue(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Subdevice_RmResource.offset), pCallContext, pParams); -} - -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_subdeviceGetNotificationListPtr(struct Subdevice *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_Subdevice_Notifier.offset)); -} - -static struct NotifShare *__nvoc_thunk_Notifier_subdeviceGetNotificationShare(struct Subdevice *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_Subdevice_Notifier.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_subdeviceMap(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_subdeviceAccessCallback(struct Subdevice *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_Subdevice_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -238,12 +118,12 @@ static NvBool __nvoc_thunk_RmResource_subdeviceAccessCallback(struct Subdevice * static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevice[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x20118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetInfoV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200850u) - /*flags=*/ 0x200850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x20118u) + /*flags=*/ 0x20118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800102u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_INFO_V2_PARAMS), @@ -253,12 +133,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200812u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2010au) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetNameString_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200812u) - /*flags=*/ 0x200812u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2010au) + /*flags=*/ 0x2010au, /*accessRight=*/0x0u, /*methodId=*/ 0x20800110u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_NAME_STRING_PARAMS), @@ -268,12 +148,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4812u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50au) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetShortNameString_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4812u) - /*flags=*/ 0x4812u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50au) + /*flags=*/ 0x50au, /*accessRight=*/0x0u, /*methodId=*/ 0x20800111u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_SHORT_NAME_STRING_PARAMS), @@ -283,12 +163,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuSetPower_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800112u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_SET_POWER_PARAMS), @@ -298,12 +178,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetSdm_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800118u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_SDM_PARAMS), @@ -313,12 +193,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [5] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4813u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetSimulationInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4813u) - /*flags=*/ 0x4813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50bu) + /*flags=*/ 0x50bu, /*accessRight=*/0x0u, /*methodId=*/ 0x20800119u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_SIMULATION_INFO_PARAMS), @@ -343,12 +223,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [7] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuExecRegOps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800122u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_EXEC_REG_OPS_PARAMS), @@ -358,12 +238,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [8] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetEngines_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800123u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_ENGINES_PARAMS), @@ -373,12 +253,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [9] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetEngineClasslist_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800124u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_ENGINE_CLASSLIST_PARAMS), @@ -388,12 +268,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [10] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetEngineFaultInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800125u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_ENGINE_FAULT_INFO_PARAMS), @@ -403,12 +283,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [11] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuQueryMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800128u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_QUERY_MODE_PARAMS), @@ -418,12 +298,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [12] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x102204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10244u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuPromoteCtx_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x102204u) - /*flags=*/ 0x102204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10244u) + /*flags=*/ 0x10244u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080012bu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_PROMOTE_CTX_PARAMS), @@ -433,12 +313,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [13] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c240u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuEvictCtx_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2200u) - /*flags=*/ 0x1c2200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c240u) + /*flags=*/ 0x1c240u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080012cu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_EVICT_CTX_PARAMS), @@ -448,12 +328,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [14] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x142204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14244u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuInitializeCtx_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x142204u) - /*flags=*/ 0x142204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14244u) + /*flags=*/ 0x14244u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080012du, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_INITIALIZE_CTX_PARAMS), @@ -463,12 +343,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [15] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400a50u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40158u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuQueryEccStatus_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400a50u) - /*flags=*/ 0x400a50u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40158u) + /*flags=*/ 0x40158u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080012fu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS), @@ -478,12 +358,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [16] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x844u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x114u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuSetComputeModeRules_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x844u) - /*flags=*/ 0x844u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x114u) + /*flags=*/ 0x114u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800130u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_SET_COMPUTE_MODE_RULES_PARAMS), @@ -493,12 +373,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [17] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuQueryComputeModeRules_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800131u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_QUERY_COMPUTE_MODE_RULES_PARAMS), @@ -508,12 +388,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [18] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuQueryEccConfiguration_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800133u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_QUERY_ECC_CONFIGURATION_PARAMS), @@ -523,12 +403,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [19] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40044u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuSetEccConfiguration_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400204u) - /*flags=*/ 0x400204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40044u) + /*flags=*/ 0x40044u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800134u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_SET_ECC_CONFIGURATION_PARAMS), @@ -538,12 +418,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [20] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40044u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuResetEccErrorStatus_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400204u) - /*flags=*/ 0x400204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40044u) + /*flags=*/ 0x40044u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800136u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_RESET_ECC_ERROR_STATUS_PARAMS), @@ -553,12 +433,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [21] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetFermiGpcInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800137u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_FERMI_GPC_INFO_PARAMS), @@ -568,12 +448,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [22] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetFermiTpcInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800138u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_FERMI_TPC_INFO_PARAMS), @@ -583,12 +463,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [23] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetFermiZcullInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800139u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_FERMI_ZCULL_INFO_PARAMS), @@ -598,12 +478,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [24] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x448u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetOEMBoardInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4210u) - /*flags=*/ 0x4210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x448u) + /*flags=*/ 0x448u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080013fu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_OEM_BOARD_INFO_PARAMS), @@ -613,12 +493,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [25] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x812u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetId_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x812u) - /*flags=*/ 0x812u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) + /*flags=*/ 0x10au, /*accessRight=*/0x0u, /*methodId=*/ 0x20800142u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_ID_PARAMS), @@ -628,12 +508,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [26] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuAcquireComputeModeReservation_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800145u, /*paramSize=*/ 0, @@ -643,12 +523,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [27] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuReleaseComputeModeReservation_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800146u, /*paramSize=*/ 0, @@ -658,12 +538,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [28] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetEnginePartnerList_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800147u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_ENGINE_PARTNERLIST_PARAMS), @@ -673,12 +553,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [29] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetGidInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080014au, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_GID_INFO_PARAMS), @@ -688,12 +568,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [30] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetInforomObjectVersion_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080014bu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_INFOROM_OBJECT_VERSION_PARAMS), @@ -703,12 +583,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [31] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuSetOptimusInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080014cu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_OPTIMUS_INFO_PARAMS), @@ -718,12 +598,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [32] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetIpVersion_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080014du, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_IP_VERSION_PARAMS), @@ -733,12 +613,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [33] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuQueryIllumSupport_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800153u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_GPU_QUERY_ILLUM_SUPPORT_PARAMS), @@ -748,12 +628,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [34] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetIllum_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800154u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_GPU_ILLUM_PARAMS), @@ -763,12 +643,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [35] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuSetIllum_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800155u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_GPU_ILLUM_PARAMS), @@ -778,12 +658,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [36] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x448u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetInforomImageVersion_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4210u) - /*flags=*/ 0x4210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x448u) + /*flags=*/ 0x448u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800156u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_INFOROM_IMAGE_VERSION_PARAMS), @@ -793,12 +673,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [37] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuQueryInforomEccSupport_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800157u, /*paramSize=*/ 0, @@ -808,12 +688,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [38] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetPhysicalBridgeVersionInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080015au, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_PHYSICAL_BRIDGE_VERSION_INFO_PARAMS), @@ -823,12 +703,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [39] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetAllBridgesUpstreamOfGpu_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080015bu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_ALL_BRIDGES_UPSTREAM_OF_GPU_PARAMS), @@ -838,12 +718,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [40] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuQueryScrubberStatus_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080015fu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_QUERY_SCRUBBER_STATUS_PARAMS), @@ -853,12 +733,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [41] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetVprCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800160u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_VPR_CAPS_PARAMS), @@ -883,12 +763,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [43] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetPesInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800168u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_PES_INFO_PARAMS), @@ -898,12 +778,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [44] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x448u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetOEMInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4210u) - /*flags=*/ 0x4210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x448u) + /*flags=*/ 0x448u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800169u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_OEM_INFO_PARAMS), @@ -913,12 +793,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [45] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetVprInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080016bu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_VPR_INFO_PARAMS), @@ -928,12 +808,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [46] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetEncoderCapacity_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080016cu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_ENCODER_CAPACITY_PARAMS), @@ -943,12 +823,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [47] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetNvencSwSessionStats_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080016du, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_NVENC_SW_SESSION_STATS_PARAMS), @@ -958,12 +838,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [48] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetNvencSwSessionInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080016eu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_NVENC_SW_SESSION_INFO_PARAMS), @@ -973,12 +853,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [49] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuSetFabricAddr_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080016fu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_SET_FABRIC_BASE_ADDR_PARAMS), @@ -988,12 +868,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [50] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetEnginesV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800170u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_ENGINES_V2_PARAMS), @@ -1003,12 +883,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [51] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuQueryFunctionStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800173u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_GPU_QUERY_FUNCTION_STATUS_PARAMS), @@ -1018,12 +898,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [52] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuSetPartitions_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800174u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_SET_PARTITIONS_PARAMS), @@ -1033,12 +913,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [53] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetPartitions_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800175u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_PARTITIONS_PARAMS), @@ -1048,12 +928,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [54] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40040u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuReportNonReplayableFault_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400200u) - /*flags=*/ 0x400200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40040u) + /*flags=*/ 0x40040u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800177u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_REPORT_NON_REPLAYABLE_FAULT_PARAMS), @@ -1078,12 +958,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [56] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetHwEngineId_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080017au, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_HW_ENGINE_ID_PARAMS), @@ -1093,12 +973,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [57] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetNvfbcSwSessionStats_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080017bu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_NVFBC_SW_SESSION_STATS_PARAMS), @@ -1108,12 +988,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [58] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetNvfbcSwSessionInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080017cu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_NVFBC_SW_SESSION_INFO_PARAMS), @@ -1123,12 +1003,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [59] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x448u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetVmmuSegmentSize_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4210u) - /*flags=*/ 0x4210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x448u) + /*flags=*/ 0x448u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080017eu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_VMMU_SEGMENT_SIZE_PARAMS), @@ -1138,12 +1018,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [60] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetPartitionCapacity_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800181u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_PARTITION_CAPACITY_PARAMS), @@ -1153,12 +1033,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [61] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetCachedInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, /*accessRight=*/0x0u, /*methodId=*/ 0x20800182u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_INFO_V2_PARAMS), @@ -1183,12 +1063,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [63] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuDescribePartitions_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800185u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_DESCRIBE_PARTITIONS_PARAMS), @@ -1198,12 +1078,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [64] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetMaxSupportedPageSize_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) - /*flags=*/ 0x50u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) + /*flags=*/ 0x18u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800188u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_MAX_SUPPORTED_PAGE_SIZE_PARAMS), @@ -1213,12 +1093,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [65] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetActivePartitionIds_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080018bu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_ACTIVE_PARTITION_IDS_PARAMS), @@ -1228,12 +1108,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [66] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetPids_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080018du, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_PIDS_PARAMS), @@ -1243,12 +1123,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [67] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetPidInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080018eu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_PID_INFO_PARAMS), @@ -1258,12 +1138,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [68] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuHandleVfPriFault_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800192u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_GPU_HANDLE_VF_PRI_FAULT_PARAMS), @@ -1273,12 +1153,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [69] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x807u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x107u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuSetComputePolicyConfig_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x807u) - /*flags=*/ 0x807u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x107u) + /*flags=*/ 0x107u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800194u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_SET_COMPUTE_POLICY_CONFIG_PARAMS), @@ -1288,12 +1168,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [70] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetComputePolicyConfig_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) - /*flags=*/ 0x813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) + /*flags=*/ 0x10bu, /*accessRight=*/0x0u, /*methodId=*/ 0x20800195u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_COMPUTE_POLICY_CONFIG_PARAMS), @@ -1303,12 +1183,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [71] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetGfid_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800196u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_GFID_PARAMS), @@ -1333,12 +1213,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [73] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x840u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x110u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdValidateMemMapRequest_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x840u) - /*flags=*/ 0x840u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x110u) + /*flags=*/ 0x110u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800198u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_VALIDATE_MEM_MAP_REQUEST_PARAMS), @@ -1348,12 +1228,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [74] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuSetEgmGpaFabricAddr_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800199u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_SET_EGM_GPA_FABRIC_BASE_ADDR_PARAMS), @@ -1363,12 +1243,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [75] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x12u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xau) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetEngineLoadTimes_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x12u) - /*flags=*/ 0x12u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xau) + /*flags=*/ 0xau, /*accessRight=*/0x0u, /*methodId=*/ 0x2080019bu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_ENGINE_LOAD_TIMES_PARAMS), @@ -1378,12 +1258,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [76] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGetP2pCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x208001a0u, /*paramSize=*/ sizeof(NV2080_CTRL_GET_P2P_CAPS_PARAMS), @@ -1393,12 +1273,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [77] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetComputeProfiles_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x208001a2u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_COMPUTE_PROFILES_PARAMS), @@ -1408,12 +1288,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [78] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGetGpuFabricProbeInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x208001a3u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_GET_GPU_FABRIC_PROBE_INFO_PARAMS), @@ -1423,12 +1303,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [79] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x404210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40448u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetChipDetails_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x404210u) - /*flags=*/ 0x404210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40448u) + /*flags=*/ 0x40448u, /*accessRight=*/0x0u, /*methodId=*/ 0x208001a4u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_CHIP_DETAILS_PARAMS), @@ -1438,12 +1318,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [80] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuMigratableOps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x208001a6u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_MIGRATABLE_OPS_PARAMS), @@ -1453,12 +1333,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [81] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetResetStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x208001abu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_RESET_STATUS_PARAMS), @@ -1468,12 +1348,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [82] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetDrainAndResetStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x208001aeu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_DRAIN_AND_RESET_STATUS_PARAMS), @@ -1483,12 +1363,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [83] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetNvencSwSessionInfoV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x208001afu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_NVENC_SW_SESSION_INFO_V2_PARAMS), @@ -1498,12 +1378,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [84] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetConstructedFalconInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x208001b0u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_CONSTRUCTED_FALCON_INFO_PARAMS), @@ -1513,12 +1393,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [85] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x640u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGspStartTrace_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x640u) - /*flags=*/ 0x640u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) + /*flags=*/ 0xd0u, /*accessRight=*/0x0u, /*methodId=*/ 0x208001e3u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE_INFO_PARAMS), @@ -1528,12 +1408,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [86] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlGpuGetFipsStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x208001e4u, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_FIPS_STATUS_PARAMS), @@ -1543,12 +1423,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [87] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdEventSetNotification_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800301u, /*paramSize=*/ sizeof(NV2080_CTRL_EVENT_SET_NOTIFICATION_PARAMS), @@ -1558,12 +1438,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [88] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdEventSetTrigger_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800302u, /*paramSize=*/ 0, @@ -1573,12 +1453,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [89] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdEventSetMemoryNotifies_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800303u, /*paramSize=*/ sizeof(NV2080_CTRL_EVENT_SET_MEMORY_NOTIFIES_PARAMS), @@ -1588,12 +1468,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [90] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdEventSetSemaphoreMemory_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800304u, /*paramSize=*/ sizeof(NV2080_CTRL_EVENT_SET_SEMAPHORE_MEMORY_PARAMS), @@ -1603,12 +1483,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [91] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdEventSetSemaMemValidation_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800306u, /*paramSize=*/ sizeof(NV2080_CTRL_EVENT_SET_SEMA_MEM_VALIDATION_PARAMS), @@ -1618,12 +1498,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [92] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdEventSetTriggerFifo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800308u, /*paramSize=*/ sizeof(NV2080_CTRL_EVENT_SET_TRIGGER_FIFO_PARAMS), @@ -1633,12 +1513,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [93] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdEventVideoBindEvtbuf_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800309u, /*paramSize=*/ sizeof(NV2080_CTRL_EVENT_VIDEO_BIND_EVTBUF_PARAMS), @@ -1663,12 +1543,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [95] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdTimerSchedule_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800401u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_TIMER_SCHEDULE_PARAMS), @@ -1678,12 +1558,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [96] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdTimerCancel_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800402u, /*paramSize=*/ 0, @@ -1693,12 +1573,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [97] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdTimerGetTime_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800403u, /*paramSize=*/ sizeof(NV2080_CTRL_TIMER_GET_TIME_PARAMS), @@ -1708,12 +1588,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [98] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdTimerGetRegisterOffset_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800404u, /*paramSize=*/ sizeof(NV2080_CTRL_TIMER_GET_REGISTER_OFFSET_PARAMS), @@ -1723,12 +1603,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [99] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdTimerGetGpuCpuTimeCorrelationInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) - /*flags=*/ 0x810u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*flags=*/ 0x108u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800406u, /*paramSize=*/ sizeof(NV2080_CTRL_TIMER_GET_GPU_CPU_TIME_CORRELATION_INFO_PARAMS), @@ -1738,12 +1618,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [100] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2010u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdTimerSetGrTickFreq_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2010u) - /*flags=*/ 0x2010u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) + /*flags=*/ 0x208u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800407u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_TIMER_SET_GR_TICK_FREQ_PARAMS), @@ -1753,12 +1633,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [101] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdI2cReadBuffer_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800601u, /*paramSize=*/ sizeof(NV2080_CTRL_I2C_READ_BUFFER_PARAMS), @@ -1768,12 +1648,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [102] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdI2cWriteBuffer_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800602u, /*paramSize=*/ sizeof(NV2080_CTRL_I2C_WRITE_BUFFER_PARAMS), @@ -1783,12 +1663,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [103] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdI2cReadReg_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800603u, /*paramSize=*/ sizeof(NV2080_CTRL_I2C_RW_REG_PARAMS), @@ -1798,12 +1678,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [104] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdI2cWriteReg_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800604u, /*paramSize=*/ sizeof(NV2080_CTRL_I2C_RW_REG_PARAMS), @@ -1813,12 +1693,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [105] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400212u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4004au) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBiosGetSKUInfo_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400212u) - /*flags=*/ 0x400212u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4004au) + /*flags=*/ 0x4004au, /*accessRight=*/0x0u, /*methodId=*/ 0x20800808u, /*paramSize=*/ sizeof(NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS), @@ -1828,12 +1708,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [106] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBiosGetPostTime_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800809u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_BIOS_GET_POST_TIME_PARAMS), @@ -1843,12 +1723,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [107] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBiosGetUefiSupport_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080080bu, /*paramSize=*/ sizeof(NV2080_CTRL_BIOS_GET_UEFI_SUPPORT_PARAMS), @@ -1858,12 +1738,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [108] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBiosGetNbsiV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080080eu, /*paramSize=*/ sizeof(NV2080_CTRL_BIOS_GET_NBSI_V2_PARAMS), @@ -1873,12 +1753,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [109] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBiosGetInfoV2_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800810u, /*paramSize=*/ sizeof(NV2080_CTRL_BIOS_GET_INFO_V2_PARAMS), @@ -1888,12 +1768,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [110] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdDisplayGetStaticInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a01u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_DISPLAY_GET_STATIC_INFO_PARAMS), @@ -1903,12 +1783,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [111] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x5c0600u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x5c0c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdMemSysGetStaticConfig_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x5c0600u) - /*flags=*/ 0x5c0600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x5c0c0u) + /*flags=*/ 0x5c0c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a1cu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_MEMSYS_GET_STATIC_CONFIG_PARAMS), @@ -1918,12 +1798,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [112] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalUvmRegisterAccessCntrBuffer_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) - /*flags=*/ 0x400600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) + /*flags=*/ 0x400c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a1du, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_UVM_REGISTER_ACCESS_CNTR_BUFFER_PARAMS), @@ -1933,12 +1813,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [113] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalUvmUnregisterAccessCntrBuffer_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) - /*flags=*/ 0x400600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) + /*flags=*/ 0x400c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a1eu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_UVM_UNREGISTER_ACCESS_CNTR_BUFFER_PARAMS), @@ -1948,12 +1828,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [114] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x102600u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x102c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrInternalStaticGetCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x102600u) - /*flags=*/ 0x102600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x102c0u) + /*flags=*/ 0x102c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a1fu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_STATIC_GR_GET_CAPS_PARAMS), @@ -1963,27 +1843,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [115] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalFlcnSetVideoEventBufferFlags_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x20800a21u, - /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_FLAGS_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdInternalFlcnSetVideoEventBufferFlags" -#endif - }, - { /* [116] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrInternalStaticGetGlobalSmOrder_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) - /*flags=*/ 0x1c2600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) + /*flags=*/ 0x1c2c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a22u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_STATIC_GR_GET_GLOBAL_SM_ORDER_PARAMS), @@ -1992,28 +1857,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetGlobalSmOrder" #endif }, - { /* [117] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4600u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdMsencGetCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4600u) - /*flags=*/ 0x4600u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x20800a25u, - /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_MSENC_GET_CAPS_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdMsencGetCaps" -#endif - }, - { /* [118] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) + { /* [116] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrInternalStaticGetFloorsweepingMasks_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) - /*flags=*/ 0x1c2600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) + /*flags=*/ 0x1c2c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a26u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_STATIC_GR_GET_FLOORSWEEPING_MASKS_PARAMS), @@ -2022,13 +1872,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetFloorsweepingMasks" #endif }, - { /* [119] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80000u) + { /* [117] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetCtxBufferPtes_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80000u) - /*flags=*/ 0x80000u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) + /*flags=*/ 0x8000u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a28u, /*paramSize=*/ sizeof(NV2080_CTRL_KGR_GET_CTX_BUFFER_PTES_PARAMS), @@ -2037,28 +1887,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetCtxBufferPtes" #endif }, - { /* [120] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalFlcnSetVideoEventBufferMemory_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x20800a29u, - /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_MEMORY_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdInternalFlcnSetVideoEventBufferMemory" -#endif - }, - { /* [121] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) + { /* [118] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrInternalStaticGetInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) - /*flags=*/ 0x1c2600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) + /*flags=*/ 0x1c2c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a2au, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_STATIC_GR_GET_INFO_PARAMS), @@ -2067,13 +1902,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetInfo" #endif }, - { /* [122] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) + { /* [119] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrInternalStaticGetZcullInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) - /*flags=*/ 0x1c2600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) + /*flags=*/ 0x1c2c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a2cu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS), @@ -2082,13 +1917,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetZcullInfo" #endif }, - { /* [123] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) + { /* [120] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrInternalStaticGetRopInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) - /*flags=*/ 0x1c2600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) + /*flags=*/ 0x1c2c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a2eu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_STATIC_GR_GET_ROP_INFO_PARAMS), @@ -2097,13 +1932,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetRopInfo" #endif }, - { /* [124] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) + { /* [121] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrInternalStaticGetPpcMasks_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) - /*flags=*/ 0x1c2600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) + /*flags=*/ 0x1c2c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a30u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_STATIC_GR_GET_PPC_MASKS_PARAMS), @@ -2112,13 +1947,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetPpcMasks" #endif }, - { /* [125] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2e00u) + { /* [122] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c3c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrInternalStaticGetContextBuffersInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2e00u) - /*flags=*/ 0x1c2e00u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c3c0u) + /*flags=*/ 0x1c3c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a32u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_STATIC_GR_GET_CONTEXT_BUFFERS_INFO_PARAMS), @@ -2127,13 +1962,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetContextBuffersInfo" #endif }, - { /* [126] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) + { /* [123] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrInternalStaticGetSmIssueRateModifier_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) - /*flags=*/ 0x1c2600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) + /*flags=*/ 0x1c2c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a34u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_STATIC_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS), @@ -2142,13 +1977,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetSmIssueRateModifier" #endif }, - { /* [127] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x404600u) + { /* [124] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x404c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGetChipInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x404600u) - /*flags=*/ 0x404600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x404c0u) + /*flags=*/ 0x404c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a36u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GPU_GET_CHIP_INFO_PARAMS), @@ -2157,13 +1992,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGetChipInfo" #endif }, - { /* [128] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) + { /* [125] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGrInternalSetFecsTraceHwEnable_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) - /*flags=*/ 0x400600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) + /*flags=*/ 0x400c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a37u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GR_SET_FECS_TRACE_HW_ENABLE_PARAMS), @@ -2172,13 +2007,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGrInternalSetFecsTraceHwEnable" #endif }, - { /* [129] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) + { /* [126] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGrInternalGetFecsTraceHwEnable_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) - /*flags=*/ 0x400600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) + /*flags=*/ 0x400c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a38u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GR_GET_FECS_TRACE_HW_ENABLE_PARAMS), @@ -2187,13 +2022,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGrInternalGetFecsTraceHwEnable" #endif }, - { /* [130] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) + { /* [127] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGrInternalSetFecsTraceRdOffset_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) - /*flags=*/ 0x400600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) + /*flags=*/ 0x400c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a39u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GR_SET_FECS_TRACE_RD_OFFSET_PARAMS), @@ -2202,13 +2037,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGrInternalSetFecsTraceRdOffset" #endif }, - { /* [131] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) + { /* [128] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGrInternalSetFecsTraceWrOffset_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) - /*flags=*/ 0x400600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) + /*flags=*/ 0x400c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a3au, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GR_SET_FECS_TRACE_WR_OFFSET_PARAMS), @@ -2217,13 +2052,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGrInternalSetFecsTraceWrOffset" #endif }, - { /* [132] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) + { /* [129] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGrInternalGetFecsTraceRdOffset_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) - /*flags=*/ 0x400600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) + /*flags=*/ 0x400c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a3bu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GR_GET_FECS_TRACE_RD_OFFSET_PARAMS), @@ -2232,13 +2067,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGrInternalGetFecsTraceRdOffset" #endif }, - { /* [133] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) + { /* [130] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrInternalStaticGetFecsRecordSize_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) - /*flags=*/ 0x1c2600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) + /*flags=*/ 0x1c2c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a3du, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_RECORD_SIZE_PARAMS), @@ -2247,13 +2082,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetFecsRecordSize" #endif }, - { /* [134] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100200u) + { /* [131] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10040u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGrStaticGetFecsTraceDefines_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100200u) - /*flags=*/ 0x100200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10040u) + /*flags=*/ 0x10040u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a3eu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_TRACE_DEFINES_PARAMS), @@ -2262,13 +2097,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGrStaticGetFecsTraceDefines" #endif }, - { /* [135] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) + { /* [132] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrInternalStaticGetFecsTraceDefines_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) - /*flags=*/ 0x1c2600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) + /*flags=*/ 0x1c2c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a3fu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_TRACE_DEFINES_PARAMS), @@ -2277,13 +2112,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetFecsTraceDefines" #endif }, - { /* [136] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c4600u) + { /* [133] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c4c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGetDeviceInfoTable_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c4600u) - /*flags=*/ 0x1c4600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c4c0u) + /*flags=*/ 0x1c4c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a40u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS), @@ -2292,13 +2127,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGetDeviceInfoTable" #endif }, - { /* [137] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4600u) + { /* [134] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGetUserRegisterAccessMap_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4600u) - /*flags=*/ 0x4600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4c0u) + /*flags=*/ 0x4c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a41u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GPU_GET_USER_REGISTER_ACCESS_MAP_PARAMS), @@ -2307,13 +2142,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGetUserRegisterAccessMap" #endif }, - { /* [138] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) + { /* [135] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalKMIGmgrPromoteGpuInstanceMemRange_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) - /*flags=*/ 0x2600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) + /*flags=*/ 0x2c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a44u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_KMIGMGR_PROMOTE_GPU_INSTANCE_MEM_RANGE_PARAMS), @@ -2322,13 +2157,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalKMIGmgrPromoteGpuInstanceMemRange" #endif }, - { /* [139] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) + { /* [136] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrInternalStaticGetPdbProperties_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) - /*flags=*/ 0x1c2600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) + /*flags=*/ 0x1c2c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a48u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_STATIC_GR_GET_PDB_PROPERTIES_PARAMS), @@ -2337,13 +2172,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetPdbProperties" #endif }, - { /* [140] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [137] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdDisplayWriteInstMem_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a49u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_DISPLAY_WRITE_INST_MEM_PARAMS), @@ -2352,13 +2187,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplayWriteInstMem" #endif }, - { /* [141] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [138] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalRecoverAllComputeContexts_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a4au, /*paramSize=*/ 0, @@ -2367,13 +2202,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalRecoverAllComputeContexts" #endif }, - { /* [142] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [139] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdDisplayGetIpVersion_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a4bu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_DISPLAY_GET_IP_VERSION_PARAMS), @@ -2382,13 +2217,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplayGetIpVersion" #endif }, - { /* [143] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [140] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGetSmcMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a4cu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GPU_GET_SMC_MODE_PARAMS), @@ -2397,13 +2232,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGetSmcMode" #endif }, - { /* [144] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [141] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdDisplaySetupRgLineIntr_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a4du, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_DISPLAY_SETUP_RG_LINE_INTR_PARAMS), @@ -2412,13 +2247,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplaySetupRgLineIntr" #endif }, - { /* [145] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [142] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdMemSysSetPartitionableMem_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a51u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_MEMSYS_SET_PARTITIONABLE_MEM_PARAMS), @@ -2427,13 +2262,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMemSysSetPartitionableMem" #endif }, - { /* [146] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) + { /* [143] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalFifoPromoteRunlistBuffers_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) - /*flags=*/ 0x2600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) + /*flags=*/ 0x2c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a53u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_FIFO_PROMOTE_RUNLIST_BUFFERS_PARAMS), @@ -2442,13 +2277,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalFifoPromoteRunlistBuffers" #endif }, - { /* [147] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [144] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdDisplaySetImportedImpData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a54u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_DISPLAY_SET_IMP_INIT_INFO_PARAMS), @@ -2457,13 +2292,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplaySetImportedImpData" #endif }, - { /* [148] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [145] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdIsEgpuBridge_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a55u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GET_EGPU_BRIDGE_INFO_PARAMS), @@ -2472,13 +2307,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdIsEgpuBridge" #endif }, - { /* [149] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [146] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a57u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_VMMU_GET_SPA_FOR_GPA_ENTRIES_PARAMS), @@ -2487,13 +2322,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries" #endif }, - { /* [150] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [147] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdDisplaySetChannelPushbuffer_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a58u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_DISPLAY_CHANNEL_PUSHBUFFER_PARAMS), @@ -2502,13 +2337,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplaySetChannelPushbuffer" #endif }, - { /* [151] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) + { /* [148] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGmmuGetStaticInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) - /*flags=*/ 0x400600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) + /*flags=*/ 0x400c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a59u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GMMU_GET_STATIC_INFO_PARAMS), @@ -2517,13 +2352,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGmmuGetStaticInfo" #endif }, - { /* [152] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) + { /* [149] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetHeapReservationSize_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) - /*flags=*/ 0x2600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) + /*flags=*/ 0x2c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a5bu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_FB_GET_HEAP_RESERVATION_SIZE_PARAMS), @@ -2532,13 +2367,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbGetHeapReservationSize" #endif }, - { /* [153] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [150] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdIntrGetKernelTable_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a5cu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_INTR_GET_KERNEL_TABLE_PARAMS), @@ -2547,13 +2382,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdIntrGetKernelTable" #endif }, - { /* [154] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [151] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdDisplayGetDisplayMask_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a5du, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_DISPLAY_GET_ACTIVE_DISPLAY_DEVICES_PARAMS), @@ -2562,13 +2397,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplayGetDisplayMask" #endif }, - { /* [155] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2e50u) + { /* [152] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x3d8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalFifoGetNumChannels_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2e50u) - /*flags=*/ 0x2e50u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x3d8u) + /*flags=*/ 0x3d8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a61u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_FIFO_GET_NUM_CHANNELS_PARAMS), @@ -2577,13 +2412,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalFifoGetNumChannels" #endif }, - { /* [156] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) + { /* [153] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalStaticKMIGmgrGetProfiles_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) - /*flags=*/ 0x2600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) + /*flags=*/ 0x2c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a63u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_PROFILES_PARAMS), @@ -2592,13 +2427,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalStaticKMIGmgrGetProfiles" #endif }, - { /* [157] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) + { /* [154] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalStaticKMIGmgrGetPartitionableEngines_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) - /*flags=*/ 0x2600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) + /*flags=*/ 0x2c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a65u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_PARTITIONABLE_ENGINES_PARAMS), @@ -2607,13 +2442,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalStaticKMIGmgrGetPartitionableEngines" #endif }, - { /* [158] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) + { /* [155] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalStaticKMIGmgrGetSwizzIdFbMemPageRanges_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) - /*flags=*/ 0x2600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) + /*flags=*/ 0x2c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a66u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_SWIZZ_ID_FB_MEM_PAGE_RANGES_PARAMS), @@ -2622,13 +2457,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalStaticKMIGmgrGetSwizzIdFbMemPageRanges" #endif }, - { /* [159] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [156] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKMemSysGetMIGMemoryConfig_133e5e, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a67u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_MEMSYS_GET_MIG_MEMORY_CONFIG_PARAMS), @@ -2637,13 +2472,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKMemSysGetMIGMemoryConfig" #endif }, - { /* [160] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [157] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbSetZbcReferenced_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a69u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_MEMSYS_SET_ZBC_REFERENCED_PARAMS), @@ -2652,13 +2487,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbSetZbcReferenced" #endif }, - { /* [161] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [158] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalRcWatchdogTimeout_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a6au, /*paramSize=*/ 0, @@ -2667,13 +2502,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalRcWatchdogTimeout" #endif }, - { /* [162] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [159] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdMemSysGetMIGMemoryPartitionTable_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a6bu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_MEMSYS_GET_MIG_MEMORY_PARTITION_TABLE_PARAMS), @@ -2682,13 +2517,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMemSysGetMIGMemoryPartitionTable" #endif }, - { /* [163] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [160] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdMemSysL2InvalidateEvict_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a6cu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_MEMSYS_L2_INVALIDATE_EVICT_PARAMS), @@ -2697,13 +2532,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMemSysL2InvalidateEvict" #endif }, - { /* [164] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [161] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdMemSysFlushL2AllRamsAndCaches_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a6du, /*paramSize=*/ 0, @@ -2712,13 +2547,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMemSysFlushL2AllRamsAndCaches" #endif }, - { /* [165] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [162] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdMemSysDisableNvlinkPeers_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a6eu, /*paramSize=*/ 0, @@ -2727,13 +2562,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMemSysDisableNvlinkPeers" #endif }, - { /* [166] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [163] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdMemSysProgramRawCompressionMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a6fu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_MEMSYS_PROGRAM_RAW_COMPRESSION_MODE_PARAMS), @@ -2742,13 +2577,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMemSysProgramRawCompressionMode" #endif }, - { /* [167] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [164] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalBusFlushWithSysmembar_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a70u, /*paramSize=*/ 0, @@ -2757,13 +2592,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalBusFlushWithSysmembar" #endif }, - { /* [168] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [165] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalBusSetupP2pMailboxLocal_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a71u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_BUS_SETUP_P2P_MAILBOX_LOCAL_PARAMS), @@ -2772,13 +2607,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalBusSetupP2pMailboxLocal" #endif }, - { /* [169] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [166] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalBusSetupP2pMailboxRemote_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a72u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_BUS_SETUP_P2P_MAILBOX_REMOTE_PARAMS), @@ -2787,13 +2622,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalBusSetupP2pMailboxRemote" #endif }, - { /* [170] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [167] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalBusDestroyP2pMailbox_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a73u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_BUS_DESTROY_P2P_MAILBOX_PARAMS), @@ -2802,13 +2637,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalBusDestroyP2pMailbox" #endif }, - { /* [171] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [168] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalBusCreateC2cPeerMapping_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a74u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_BUS_CREATE_C2C_PEER_MAPPING_PARAMS), @@ -2817,13 +2652,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalBusCreateC2cPeerMapping" #endif }, - { /* [172] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [169] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a75u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_BUS_REMOVE_C2C_PEER_MAPPING_PARAMS), @@ -2832,13 +2667,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping" #endif }, - { /* [173] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [170] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdDisplayPreUnixConsole_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a76u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_DISPLAY_PRE_UNIX_CONSOLE_PARAMS), @@ -2847,13 +2682,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplayPreUnixConsole" #endif }, - { /* [174] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [171] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdDisplayPostUnixConsole_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a77u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_DISPLAY_POST_UNIX_CONSOLE_PARAMS), @@ -2862,13 +2697,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplayPostUnixConsole" #endif }, - { /* [175] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) + { /* [172] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPerfCudaLimitDisable_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) - /*flags=*/ 0x610u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) + /*flags=*/ 0xc8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a7au, /*paramSize=*/ 0, @@ -2877,13 +2712,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfCudaLimitDisable" #endif }, - { /* [176] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [173] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPmgrUnsetDynamicBoostLimit_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a7bu, /*paramSize=*/ 0, @@ -2892,13 +2727,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPmgrUnsetDynamicBoostLimit" #endif }, - { /* [177] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [174] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPerfOptpCliClear_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a7cu, /*paramSize=*/ 0, @@ -2907,13 +2742,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfOptpCliClear" #endif }, - { /* [178] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [175] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPerfGpuBoostSyncSetControl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a7eu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_PERF_GPU_BOOST_SYNC_CONTROL_PARAMS), @@ -2922,13 +2757,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfGpuBoostSyncSetControl" #endif }, - { /* [179] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [176] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPerfSyncGpuBoostSetLimits_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a7fu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_PERF_GPU_BOOST_SYNC_SET_LIMITS_PARAMS), @@ -2937,13 +2772,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfSyncGpuBoostSetLimits" #endif }, - { /* [180] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [177] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPerfGpuBoostSyncGetInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a80u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_PERF_GPU_BOOST_SYNC_GET_INFO_PARAMS), @@ -2952,13 +2787,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfGpuBoostSyncGetInfo" #endif }, - { /* [181] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [178] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPerfGetAuxPowerState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a81u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_PERF_GET_AUX_POWER_STATE_PARAMS), @@ -2967,13 +2802,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfGetAuxPowerState" #endif }, - { /* [182] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [179] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdHshubPeerConnConfig_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a88u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_HSHUB_PEER_CONN_CONFIG_PARAMS), @@ -2982,13 +2817,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdHshubPeerConnConfig" #endif }, - { /* [183] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [180] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdHshubFirstLinkPeerId_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a89u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_HSHUB_FIRST_LINK_PEER_ID_PARAMS), @@ -2997,13 +2832,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdHshubFirstLinkPeerId" #endif }, - { /* [184] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [181] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdHshubGetHshubIdForLinks_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a8au, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_HSHUB_GET_HSHUB_ID_FOR_LINKS_PARAMS), @@ -3012,13 +2847,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdHshubGetHshubIdForLinks" #endif }, - { /* [185] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [182] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdHshubGetNumUnits_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a8bu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_HSHUB_GET_NUM_UNITS_PARAMS), @@ -3027,13 +2862,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdHshubGetNumUnits" #endif }, - { /* [186] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [183] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdHshubNextHshubId_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a8cu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_HSHUB_NEXT_HSHUB_ID_PARAMS), @@ -3042,13 +2877,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdHshubNextHshubId" #endif }, - { /* [187] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [184] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdHshubEgmConfig_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a8du, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_HSHUB_EGM_CONFIG_PARAMS), @@ -3057,13 +2892,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdHshubEgmConfig" #endif }, - { /* [188] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) + { /* [185] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPerfPerfmonClientReservationCheck_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) - /*flags=*/ 0x610u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) + /*flags=*/ 0xc8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a98u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_PERF_PERFMON_CLIENT_RESERVATION_CHECK_PARAMS), @@ -3072,13 +2907,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfPerfmonClientReservationCheck" #endif }, - { /* [189] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) + { /* [186] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPerfPerfmonClientReservationSet_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) - /*flags=*/ 0x610u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) + /*flags=*/ 0xc8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a99u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_PERF_PERFMON_CLIENT_RESERVATION_SET_PARAMS), @@ -3087,13 +2922,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfPerfmonClientReservationSet" #endif }, - { /* [190] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) + { /* [187] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPerfBoostSet_2x_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) - /*flags=*/ 0x610u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) + /*flags=*/ 0xc8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a9au, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_PERF_BOOST_SET_PARAMS_2X), @@ -3102,13 +2937,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfBoostSet_2x" #endif }, - { /* [191] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) + { /* [188] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGmmuRegisterFaultBuffer_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) - /*flags=*/ 0x400600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) + /*flags=*/ 0x400c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a9bu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GMMU_REGISTER_FAULT_BUFFER_PARAMS), @@ -3117,13 +2952,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGmmuRegisterFaultBuffer" #endif }, - { /* [192] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) + { /* [189] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGmmuUnregisterFaultBuffer_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) - /*flags=*/ 0x400600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) + /*flags=*/ 0x400c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a9cu, /*paramSize=*/ 0, @@ -3132,13 +2967,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGmmuUnregisterFaultBuffer" #endif }, - { /* [193] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [190] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGmmuRegisterClientShadowFaultBuffer_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a9du, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GMMU_REGISTER_CLIENT_SHADOW_FAULT_BUFFER_PARAMS), @@ -3147,13 +2982,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGmmuRegisterClientShadowFaultBuffer" #endif }, - { /* [194] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [191] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGmmuUnregisterClientShadowFaultBuffer_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a9eu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GMMU_UNREGISTER_CLIENT_SHADOW_FAULT_BUFFER_PARAMS), @@ -3162,13 +2997,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGmmuUnregisterClientShadowFaultBuffer" #endif }, - { /* [195] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [192] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGmmuCopyReservedSplitGVASpacePdesServer_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800a9fu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GMMU_COPY_RESERVED_SPLIT_GVASPACE_PDES_TO_SERVER_PARAMS), @@ -3177,13 +3012,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGmmuCopyReservedSplitGVASpacePdesServer" #endif }, - { /* [196] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) + { /* [193] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPerfBoostSet_3x_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) - /*flags=*/ 0x610u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) + /*flags=*/ 0xc8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800aa0u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_PERF_BOOST_SET_PARAMS_3X), @@ -3192,13 +3027,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfBoostSet_3x" #endif }, - { /* [197] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) + { /* [194] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPerfBoostClear_3x_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) - /*flags=*/ 0x610u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) + /*flags=*/ 0xc8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800aa1u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_PERF_BOOST_CLEAR_PARAMS_3X), @@ -3207,13 +3042,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfBoostClear_3x" #endif }, - { /* [198] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400u) + { /* [195] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalKMIGmgrExportGPUInstance_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400u) - /*flags=*/ 0x400u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80u) + /*flags=*/ 0x80u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800aa7u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_KMIGMGR_IMPORT_EXPORT_GPU_INSTANCE_PARAMS), @@ -3222,13 +3057,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalKMIGmgrExportGPUInstance" #endif }, - { /* [199] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400u) + { /* [196] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalKMIGmgrImportGPUInstance_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400u) - /*flags=*/ 0x400u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80u) + /*flags=*/ 0x80u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800aa9u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_KMIGMGR_IMPORT_EXPORT_GPU_INSTANCE_PARAMS), @@ -3237,13 +3072,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalKMIGmgrImportGPUInstance" #endif }, - { /* [200] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) + { /* [197] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBifGetStaticInfo_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) - /*flags=*/ 0x400600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) + /*flags=*/ 0x400c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800aacu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_BIF_GET_STATIC_INFO_PARAMS), @@ -3252,13 +3087,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBifGetStaticInfo" #endif }, - { /* [201] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [198] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalNvlinkEnableComputePeerAddr_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800aadu, /*paramSize=*/ 0, @@ -3267,13 +3102,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalNvlinkEnableComputePeerAddr" #endif }, - { /* [202] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [199] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalNvlinkGetSetNvswitchFabricAddr_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800aaeu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_NVLINK_GET_SET_NVSWITCH_FABRIC_ADDR_PARAMS), @@ -3282,13 +3117,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalNvlinkGetSetNvswitchFabricAddr" #endif }, - { /* [203] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xe40u) + { /* [200] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBifGetAspmL1Flags_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xe40u) - /*flags=*/ 0xe40u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d0u) + /*flags=*/ 0x1d0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ab0u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_BIF_GET_ASPM_L1_FLAGS_PARAMS), @@ -3297,13 +3132,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBifGetAspmL1Flags" #endif }, - { /* [204] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [201] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPerfCfControllerSetMaxVGpuVMCount_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ab1u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_PERF_CF_CONTROLLERS_SET_MAX_VGPU_VM_COUNT_PARAMS), @@ -3312,13 +3147,28 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfCfControllerSetMaxVGpuVMCount" #endif }, - { /* [205] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [202] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdCcuGetSampleInfo_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20800ab2u, + /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_CCU_SAMPLE_INFO_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdCcuGetSampleInfo" +#endif + }, + { /* [203] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdCcuMap_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ab3u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_CCU_MAP_INFO_PARAMS), @@ -3327,13 +3177,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCcuMap" #endif }, - { /* [206] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [204] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdCcuUnmap_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ab4u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_CCU_UNMAP_INFO_PARAMS), @@ -3342,13 +3192,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCcuUnmap" #endif }, - { /* [207] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [205] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalSetP2pCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ab5u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_SET_P2P_CAPS_PARAMS), @@ -3357,13 +3207,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalSetP2pCaps" #endif }, - { /* [208] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [206] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalRemoveP2pCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ab6u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_REMOVE_P2P_CAPS_PARAMS), @@ -3372,13 +3222,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalRemoveP2pCaps" #endif }, - { /* [209] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [207] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGetPcieP2pCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ab8u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GET_PCIE_P2P_CAPS_PARAMS), @@ -3387,13 +3237,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGetPcieP2pCaps" #endif }, - { /* [210] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [208] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBifSetPcieRo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ab9u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_BIF_SET_PCIE_RO_PARAMS), @@ -3402,13 +3252,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBifSetPcieRo" #endif }, - { /* [211] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) + { /* [209] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalStaticKMIGmgrGetComputeInstanceProfiles_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) - /*flags=*/ 0x2600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) + /*flags=*/ 0x2c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800abau, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_COMPUTE_PROFILES_PARAMS), @@ -3417,13 +3267,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalStaticKMIGmgrGetComputeInstanceProfiles" #endif }, - { /* [212] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [210] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdCcuSetStreamState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800abdu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_CCU_STREAM_STATE_PARAMS), @@ -3432,13 +3282,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCcuSetStreamState" #endif }, - { /* [213] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [211] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalInitGpuIntr_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800abeu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GSYNC_ATTACH_AND_INIT_PARAMS), @@ -3447,13 +3297,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalInitGpuIntr" #endif }, - { /* [214] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [212] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGsyncOptimizeTiming_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800abfu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GSYNC_OPTIMIZE_TIMING_PARAMETERS_PARAMS), @@ -3462,13 +3312,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGsyncOptimizeTiming" #endif }, - { /* [215] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [213] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGsyncGetDisplayIds_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ac0u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GSYNC_GET_DISPLAY_IDS_PARAMS), @@ -3477,13 +3327,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGsyncGetDisplayIds" #endif }, - { /* [216] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [214] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGsyncSetStereoSync_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ac1u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GSYNC_SET_STREO_SYNC_PARAMS), @@ -3492,13 +3342,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGsyncSetStereoSync" #endif }, - { /* [217] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [215] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalFbsrInit_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ac2u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_FBSR_INIT_PARAMS), @@ -3507,28 +3357,28 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalFbsrInit" #endif }, - { /* [218] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [216] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalFbsrSendRegionInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalFifoToggleActiveChannelScheduling_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ac3u, - /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_FBSR_SEND_REGION_INFO_PARAMS), + /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), #if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdInternalFbsrSendRegionInfo" + /*func=*/ "subdeviceCtrlCmdInternalFifoToggleActiveChannelScheduling" #endif }, - { /* [219] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [217] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGsyncGetVactiveLines_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ac4u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GSYNC_GET_VERTICAL_ACTIVE_LINES_PARAMS), @@ -3537,13 +3387,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGsyncGetVactiveLines" #endif }, - { /* [220] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) + { /* [218] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalMemmgrGetVgpuHostRmReservedFb_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) - /*flags=*/ 0x610u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) + /*flags=*/ 0xc8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ac5u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_MEMMGR_GET_VGPU_CONFIG_HOST_RESERVED_FB_PARAMS), @@ -3552,13 +3402,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalMemmgrGetVgpuHostRmReservedFb" #endif }, - { /* [221] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [219] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPostInitBrightcStateLoad_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ac6u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_INIT_BRIGHTC_STATE_LOAD_PARAMS), @@ -3567,13 +3417,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPostInitBrightcStateLoad" #endif }, - { /* [222] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100600u) + { /* [220] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalNvlinkGetNumActiveLinksPerIoctrl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100600u) - /*flags=*/ 0x100600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100c0u) + /*flags=*/ 0x100c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ac7u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_NVLINK_GET_NUM_ACTIVE_LINK_PER_IOCTRL_PARAMS), @@ -3582,13 +3432,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalNvlinkGetNumActiveLinksPerIoctrl" #endif }, - { /* [223] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100600u) + { /* [221] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalNvlinkGetTotalNumLinksPerIoctrl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100600u) - /*flags=*/ 0x100600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100c0u) + /*flags=*/ 0x100c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ac8u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_NVLINK_GET_TOTAL_NUM_LINK_PER_IOCTRL_PARAMS), @@ -3597,13 +3447,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalNvlinkGetTotalNumLinksPerIoctrl" #endif }, - { /* [224] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [222] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGsyncIsDisplayIdValid_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ac9u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GSYNC_IS_DISPLAYID_VALID_PARAMS), @@ -3612,13 +3462,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGsyncIsDisplayIdValid" #endif }, - { /* [225] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [223] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800acau, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GSYNC_SET_OR_RESTORE_RASTER_SYNC_PARAMS), @@ -3627,13 +3477,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync" #endif }, - { /* [226] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [224] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalSmbpbiPfmReqHndlrCapUpdate_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800acbu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_SMBPBI_PFM_REQ_HNDLR_CAP_UPDATE_PARAMS), @@ -3642,13 +3492,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalSmbpbiPfmReqHndlrCapUpdate" #endif }, - { /* [227] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [225] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPmgrPfmReqHndlrStateLoadSync_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800accu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_PFM_REQ_HNDLR_STATE_SYNC_PARAMS), @@ -3657,13 +3507,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPmgrPfmReqHndlrStateLoadSync" #endif }, - { /* [228] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [226] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalThermPfmReqHndlrStateInitSync_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800acdu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_PFM_REQ_HNDLR_STATE_SYNC_PARAMS), @@ -3672,13 +3522,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalThermPfmReqHndlrStateInitSync" #endif }, - { /* [229] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [227] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPerfPfmReqHndlrGetPm1State_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800aceu, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_GET_PM1_STATE_PARAMS), @@ -3687,13 +3537,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfPfmReqHndlrGetPm1State" #endif }, - { /* [230] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [228] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPerfPfmReqHndlrSetPm1State_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800acfu, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_SET_PM1_STATE_PARAMS), @@ -3702,13 +3552,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfPfmReqHndlrSetPm1State" #endif }, - { /* [231] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [229] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPmgrPfmReqHndlrUpdateEdppLimit_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ad0u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_UPDATE_EDPP_LIMIT_PARAMS), @@ -3717,13 +3567,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPmgrPfmReqHndlrUpdateEdppLimit" #endif }, - { /* [232] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [230] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalThermPfmReqHndlrUpdateTgpuLimit_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ad1u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_THERM_PFM_REQ_HNDLR_UPDATE_TGPU_LIMIT_PARAMS), @@ -3732,13 +3582,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalThermPfmReqHndlrUpdateTgpuLimit" #endif }, - { /* [233] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [231] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTgpMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ad2u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_CONFIGURE_TGP_MODE_PARAMS), @@ -3747,13 +3597,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTgpMode" #endif }, - { /* [234] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [232] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTurboV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ad3u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_CONFIGURE_TURBO_V2_PARAMS), @@ -3762,13 +3612,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTurboV2" #endif }, - { /* [235] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [233] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ad4u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_GET_VPSTATE_INFO_PARAMS), @@ -3777,13 +3627,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateInfo" #endif }, - { /* [236] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [234] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateMapping_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ad5u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_GET_VPSTATE_MAPPING_PARAMS), @@ -3792,13 +3642,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateMapping" #endif }, - { /* [237] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [235] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPerfPfmReqHndlrSetVpstate_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ad6u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_SET_VPSTATE_PARAMS), @@ -3807,13 +3657,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfPfmReqHndlrSetVpstate" #endif }, - { /* [238] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2610u) + { /* [236] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalFifoGetNumSecureChannels_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2610u) - /*flags=*/ 0x2610u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c8u) + /*flags=*/ 0x2c8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ad8u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_FIFO_GET_NUM_SECURE_CHANNELS_PARAMS), @@ -3822,13 +3672,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalFifoGetNumSecureChannels" #endif }, - { /* [239] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [237] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdSpdmPartition_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ad9u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_SPDM_PARTITION_PARAMS), @@ -3837,28 +3687,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdSpdmPartition" #endif }, - { /* [240] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGetCoherentFbApertureSize_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x20800adau, - /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GET_COHERENT_FB_APERTURE_SIZE_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdInternalGetCoherentFbApertureSize" -#endif - }, - { /* [241] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [238] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBifDisableSystemMemoryAccess_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800adbu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_BIF_DISABLE_SYSTEM_MEMORY_ACCESS_PARAMS), @@ -3867,13 +3702,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBifDisableSystemMemoryAccess" #endif }, - { /* [242] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [239] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdDisplayPinsetsToLockpins_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800adcu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_DISP_PINSETS_TO_LOCKPINS_PARAMS), @@ -3882,13 +3717,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplayPinsetsToLockpins" #endif }, - { /* [243] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [240] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalDetectHsVideoBridge_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800addu, /*paramSize=*/ 0, @@ -3897,13 +3732,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalDetectHsVideoBridge" #endif }, - { /* [244] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [241] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdDisplaySetSliLinkGpioSwControl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800adeu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_DISP_SET_SLI_LINK_GPIO_SW_CONTROL_PARAMS), @@ -3912,13 +3747,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplaySetSliLinkGpioSwControl" #endif }, - { /* [245] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [242] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalSetStaticEdidData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800adfu, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_SET_STATIC_EDID_DATA_PARAMS), @@ -3927,13 +3762,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalSetStaticEdidData" #endif }, - { /* [246] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [243] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalConfComputeDeriveSwlKeys_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ae1u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_SWL_KEYS_PARAMS), @@ -3942,13 +3777,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalConfComputeDeriveSwlKeys" #endif }, - { /* [247] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [244] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalConfComputeDeriveLceKeys_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ae2u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS), @@ -3957,13 +3792,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalConfComputeDeriveLceKeys" #endif }, - { /* [248] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [245] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalConfComputeRotateKeys_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ae5u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_CONF_COMPUTE_ROTATE_KEYS_PARAMS), @@ -3972,13 +3807,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalConfComputeRotateKeys" #endif }, - { /* [249] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [246] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalConfComputeRCChannelsForKeyRotation_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ae6u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_CONF_COMPUTE_RC_CHANNELS_FOR_KEY_ROTATION_PARAMS), @@ -3987,13 +3822,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalConfComputeRCChannelsForKeyRotation" #endif }, - { /* [250] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [247] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalConfComputeSetGpuState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ae7u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_SET_GPU_STATE_PARAMS), @@ -4002,28 +3837,73 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalConfComputeSetGpuState" #endif }, - { /* [251] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [248] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalConfComputeSetSecurityPolicy_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800ae8u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_SET_SECURITY_POLICY_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "subdeviceCtrlCmdInternalConfComputeSetSecurityPolicy" +#endif + }, + { /* [249] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) + /*flags=*/ 0xc8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20800ae9u, + /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GPU_CLIENT_LOW_POWER_MODE_ENTER_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter" +#endif + }, + { /* [250] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGpuGetGspRmFreeHeap_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20800aebu, + /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GPU_GET_GSP_RM_FREE_HEAP_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdInternalGpuGetGspRmFreeHeap" +#endif + }, + { /* [251] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalFifoGetLogicalUprocId_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c8u) + /*flags=*/ 0x2c8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20800aefu, + /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_FIFO_GET_LOGICAL_UPROC_ID_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdInternalFifoGetLogicalUprocId" #endif }, { /* [252] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalDisplayAcpiSubsytemActivated_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800af0u, /*paramSize=*/ 0, @@ -4033,12 +3913,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [253] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalDisplayPreModeSet_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800af1u, /*paramSize=*/ 0, @@ -4048,12 +3928,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [254] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalDisplayPostModeSet_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800af2u, /*paramSize=*/ 0, @@ -4063,12 +3943,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [255] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalConfComputeGetStaticInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800af3u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_CONF_COMPUTE_GET_STATIC_INFO_PARAMS), @@ -4078,12 +3958,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [256] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800afau, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_MEMMGR_MEMORY_TRANSFER_WITH_GSP_PARAMS), @@ -4093,12 +3973,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [257] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGetLocalAtsConfig_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800afbu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_MEMSYS_GET_LOCAL_ATS_CONFIG_PARAMS), @@ -4108,12 +3988,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [258] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalSetPeerAtsConfig_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800afcu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_MEMSYS_SET_PEER_ATS_CONFIG_PARAMS), @@ -4123,12 +4003,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [259] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalPmgrPfmReqHndlrGetEdppLimitInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800afdu, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_GET_EDPP_LIMIT_INFO_PARAMS), @@ -4138,12 +4018,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [260] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalInitUserSharedData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800afeu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_INIT_USER_SHARED_DATA_PARAMS), @@ -4153,12 +4033,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [261] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalUserSharedDataSetDataPoll_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800affu, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_USER_SHARED_DATA_SET_DATA_POLL_PARAMS), @@ -4168,12 +4048,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [262] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdSetGpfifo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801102u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_SET_GPFIFO_PARAMS), @@ -4183,12 +4063,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [263] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFifoBindEngines_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801103u, /*paramSize=*/ sizeof(NV2080_CTRL_FIFO_BIND_ENGINES_PARAMS), @@ -4198,12 +4078,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [264] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdSetOperationalProperties_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2204u) - /*flags=*/ 0x2204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) + /*flags=*/ 0x244u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801104u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_SET_OPERATIONAL_PROPERTIES_PARAMS), @@ -4213,12 +4093,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [265] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGetPhysicalChannelCount_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801108u, /*paramSize=*/ sizeof(NV2080_CTRL_FIFO_GET_PHYSICAL_CHANNEL_COUNT_PARAMS), @@ -4228,12 +4108,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [266] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200010u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x20008u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFifoGetInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200010u) - /*flags=*/ 0x200010u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x20008u) + /*flags=*/ 0x20008u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801109u, /*paramSize=*/ sizeof(NV2080_CTRL_FIFO_GET_INFO_PARAMS), @@ -4243,12 +4123,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [267] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFifoDisableChannels_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) - /*flags=*/ 0x810u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*flags=*/ 0x108u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080110bu, /*paramSize=*/ sizeof(NV2080_CTRL_FIFO_DISABLE_CHANNELS_PARAMS), @@ -4273,12 +4153,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [269] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFifoGetUserdLocation_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080110du, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_FIFO_GET_USERD_LOCATION_PARAMS), @@ -4288,12 +4168,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [270] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFifoObjschedSwGetLog_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080110eu, /*paramSize=*/ sizeof(NV2080_CTRL_FIFO_OBJSCHED_SW_GET_LOG_PARAMS), @@ -4303,12 +4183,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [271] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x5c040u) /*pFunc=*/ (void (*)(void)) NULL, #else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFifoGetDeviceInfoTable_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2200u) - /*flags=*/ 0x1c2200u, + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFifoGetDeviceInfoTable_DISPATCH, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x5c040u) + /*flags=*/ 0x5c040u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801112u, /*paramSize=*/ sizeof(NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_PARAMS), @@ -4318,12 +4198,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [272] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFifoClearFaultedBit_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2204u) - /*flags=*/ 0x2204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) + /*flags=*/ 0x244u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801113u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_FIFO_CLEAR_FAULTED_BIT_PARAMS), @@ -4333,12 +4213,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [273] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2310u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x268u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFifoRunlistSetSchedPolicy_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2310u) - /*flags=*/ 0x2310u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x268u) + /*flags=*/ 0x268u, /*accessRight=*/0x2u, /*methodId=*/ 0x20801115u, /*paramSize=*/ sizeof(NV2080_CTRL_FIFO_RUNLIST_SET_SCHED_POLICY_PARAMS), @@ -4363,12 +4243,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [275] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFifoDisableUsermodeChannels_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) - /*flags=*/ 0x2200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) + /*flags=*/ 0x240u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801117u, /*paramSize=*/ sizeof(NV2080_CTRL_FIFO_DISABLE_USERMODE_CHANNELS_PARAMS), @@ -4378,12 +4258,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [276] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFifoSetupVfZombieSubctxPdb_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801118u, /*paramSize=*/ sizeof(NV2080_CTRL_FIFO_SETUP_VF_ZOMBIE_SUBCTX_PDB_PARAMS), @@ -4408,12 +4288,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [278] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFifoDisableChannelsForKeyRotation_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080111au, /*paramSize=*/ sizeof(NV2080_CTRL_FIFO_DISABLE_CHANNELS_FOR_KEY_ROTATION_PARAMS), @@ -4423,12 +4303,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [279] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFifoObjschedGetState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801120u, /*paramSize=*/ sizeof(NV2080_CTRL_FIFO_OBJSCHED_GET_STATE_PARAMS), @@ -4438,12 +4318,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [280] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFifoObjschedSetState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801121u, /*paramSize=*/ sizeof(NV2080_CTRL_FIFO_OBJSCHED_SET_STATE_PARAMS), @@ -4453,12 +4333,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [281] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFifoObjschedGetCaps_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801122u, /*paramSize=*/ sizeof(NV2080_CTRL_FIFO_OBJSCHED_GET_CAPS_PARAMS), @@ -4468,12 +4348,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [282] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801201u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_INFO_PARAMS), @@ -4483,12 +4363,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [283] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrCtxswZcullMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801205u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_CTXSW_ZCULL_MODE_PARAMS), @@ -4498,12 +4378,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [284] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetZcullInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) - /*flags=*/ 0x811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801206u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_ZCULL_INFO_PARAMS), @@ -4513,12 +4393,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [285] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x318u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrCtxswPmMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2850u) - /*flags=*/ 0x2850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x318u) + /*flags=*/ 0x318u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801207u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_CTXSW_PM_MODE_PARAMS), @@ -4528,12 +4408,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [286] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x802a10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80348u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrCtxswZcullBind_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x802a10u) - /*flags=*/ 0x802a10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80348u) + /*flags=*/ 0x80348u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801208u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_CTXSW_ZCULL_BIND_PARAMS), @@ -4543,12 +4423,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [287] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrCtxswPmBind_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801209u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_CTXSW_PM_BIND_PARAMS), @@ -4558,12 +4438,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [288] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrSetGpcTileMap_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080120au, /*paramSize=*/ sizeof(NV2080_CTRL_GR_SET_GPC_TILE_MAP_PARAMS), @@ -4573,12 +4453,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [289] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrCtxswSmpcMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080120eu, /*paramSize=*/ sizeof(NV2080_CTRL_GR_CTXSW_SMPC_MODE_PARAMS), @@ -4588,12 +4468,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [290] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetSmToGpcTpcMappings_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080120fu, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_SM_TO_GPC_TPC_MAPPINGS_PARAMS), @@ -4603,12 +4483,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [291] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2a10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x348u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrSetCtxswPreemptionMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2a10u) - /*flags=*/ 0x2a10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x348u) + /*flags=*/ 0x348u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801210u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_SET_CTXSW_PREEMPTION_MODE_PARAMS), @@ -4618,12 +4498,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [292] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrCtxswPreemptionBind_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801211u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS), @@ -4633,12 +4513,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [293] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrPcSamplingMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801212u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_PC_SAMPLING_MODE_PARAMS), @@ -4648,12 +4528,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [294] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetROPInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801213u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_ROP_INFO_PARAMS), @@ -4663,12 +4543,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [295] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetCtxswStats_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801215u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_CTXSW_STATS_PARAMS), @@ -4678,12 +4558,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [296] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetCtxBufferSize_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) - /*flags=*/ 0x50u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) + /*flags=*/ 0x18u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801218u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_CTX_BUFFER_SIZE_PARAMS), @@ -4693,12 +4573,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [297] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80000u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetCtxBufferInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80000u) - /*flags=*/ 0x80000u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) + /*flags=*/ 0x8000u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801219u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_CTX_BUFFER_INFO_PARAMS), @@ -4708,12 +4588,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [298] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetGlobalSmOrder_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080121bu, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_GLOBAL_SM_ORDER_PARAMS), @@ -4723,12 +4603,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [299] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetCurrentResidentChannel_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080121cu, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_CURRENT_RESIDENT_CHANNEL_PARAMS), @@ -4738,12 +4618,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [300] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetVatAlarmData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080121du, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_VAT_ALARM_DATA_PARAMS), @@ -4753,12 +4633,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [301] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetAttributeBufferSize_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080121eu, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_ATTRIBUTE_BUFFER_SIZE_PARAMS), @@ -4768,12 +4648,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [302] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGfxPoolQuerySize_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) - /*flags=*/ 0x2200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) + /*flags=*/ 0x240u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080121fu, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GFX_POOL_QUERY_SIZE_PARAMS), @@ -4783,12 +4663,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [303] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGfxPoolInitialize_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) - /*flags=*/ 0x2200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) + /*flags=*/ 0x240u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801220u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GFX_POOL_INITIALIZE_PARAMS), @@ -4798,12 +4678,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [304] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGfxPoolAddSlots_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) - /*flags=*/ 0x2200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) + /*flags=*/ 0x240u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801221u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GFX_POOL_ADD_SLOTS_PARAMS), @@ -4813,12 +4693,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [305] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGfxPoolRemoveSlots_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) - /*flags=*/ 0x2200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) + /*flags=*/ 0x240u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801222u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GFX_POOL_REMOVE_SLOTS_PARAMS), @@ -4828,12 +4708,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [306] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x812u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetCapsV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x812u) - /*flags=*/ 0x812u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) + /*flags=*/ 0x10au, /*accessRight=*/0x0u, /*methodId=*/ 0x20801227u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_CAPS_V2_PARAMS), @@ -4843,12 +4723,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [307] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetInfoV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801228u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_INFO_V2_PARAMS), @@ -4858,12 +4738,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [308] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetGpcMask_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080122au, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_GPC_MASK_PARAMS), @@ -4873,12 +4753,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [309] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetTpcMask_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080122bu, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_TPC_MASK_PARAMS), @@ -4888,12 +4768,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [310] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrSetTpcPartitionMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080122cu, /*paramSize=*/ sizeof(NV2080_CTRL_GR_SET_TPC_PARTITION_MODE_PARAMS), @@ -4903,12 +4783,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [311] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetEngineContextProperties_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080122du, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS), @@ -4918,12 +4798,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [312] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetSmIssueRateModifier_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801230u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS), @@ -4933,12 +4813,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [313] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrFecsBindEvtbufForUid_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801231u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_FECS_BIND_EVTBUF_FOR_UID_PARAMS), @@ -4948,12 +4828,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [314] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetPhysGpcMask_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) - /*flags=*/ 0x44u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14u) + /*flags=*/ 0x14u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801232u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_PHYS_GPC_MASK_PARAMS), @@ -4963,12 +4843,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [315] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetPpcMask_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801233u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_PPC_MASK_PARAMS), @@ -4978,12 +4858,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [316] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetNumTpcsForGpc_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801234u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_NUM_TPCS_FOR_GPC_PARAMS), @@ -4993,12 +4873,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [317] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetCtxswModes_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801235u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_CTXSW_MODES_PARAMS), @@ -5008,12 +4888,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [318] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetGpcTileMap_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801236u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_GPC_TILE_MAP_PARAMS), @@ -5023,12 +4903,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [319] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetZcullMask_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) - /*flags=*/ 0x50u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) + /*flags=*/ 0x18u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801237u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_ZCULL_MASK_PARAMS), @@ -5038,12 +4918,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [320] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x918u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrFecsBindEvtbufForUidV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8850u) - /*flags=*/ 0x8850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x918u) + /*flags=*/ 0x918u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801238u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_FECS_BIND_EVTBUF_FOR_UID_V2_PARAMS), @@ -5053,12 +4933,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [321] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrGetGfxGpcAndTpcInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801239u, /*paramSize=*/ sizeof(NV2080_CTRL_GR_GET_GFX_GPC_AND_TPC_INFO_PARAMS), @@ -5068,12 +4948,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [322] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKGrCtxswSetupBind_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080123au, /*paramSize=*/ sizeof(NV2080_CTRL_GR_CTXSW_SETUP_BIND_PARAMS), @@ -5083,12 +4963,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [323] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetInfoV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801303u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_INFO_V2_PARAMS), @@ -5098,12 +4978,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [324] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetCarveoutAddressInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080130bu, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_SYSTEM_CARVEOUT_ADDRESS_SPACE_INFO), @@ -5113,12 +4993,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [325] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetCalibrationLockFailed_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080130cu, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_CALIBRATION_LOCK_FAILED_PARAMS), @@ -5128,12 +5008,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [326] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbFlushGpuCache_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080130eu, /*paramSize=*/ sizeof(NV2080_CTRL_FB_FLUSH_GPU_CACHE_PARAMS), @@ -5143,12 +5023,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [327] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbSetGpuCacheAllocPolicy_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080130fu, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS), @@ -5158,12 +5038,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [328] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetBar1Offset_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801310u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_BAR1_OFFSET_PARAMS), @@ -5173,12 +5053,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [329] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetGpuCacheAllocPolicy_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801312u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS), @@ -5188,12 +5068,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [330] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbIsKind_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801313u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_IS_KIND_PARAMS), @@ -5203,12 +5083,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [331] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400a10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40148u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetGpuCacheInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400a10u) - /*flags=*/ 0x400a10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40148u) + /*flags=*/ 0x40148u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801315u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_GPU_CACHE_INFO_PARAMS), @@ -5218,12 +5098,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [332] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801318u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS), @@ -5233,12 +5113,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [333] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801319u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS), @@ -5248,12 +5128,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [334] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetFBRegionInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) - /*flags=*/ 0x810u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*flags=*/ 0x108u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801320u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_PARAMS), @@ -5263,12 +5143,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [335] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetOfflinedPages_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetOfflinedPages_DISPATCH, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801322u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_OFFLINED_PAGES_PARAMS), @@ -5278,12 +5158,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [336] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2a50u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40158u) /*pFunc=*/ (void (*)(void)) NULL, #else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetLTCInfoForFBP_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2a50u) - /*flags=*/ 0x2a50u, + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetLTCInfoForFBP_DISPATCH, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40158u) + /*flags=*/ 0x40158u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801328u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_LTC_INFO_FOR_FBP_PARAMS), @@ -5293,12 +5173,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [337] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbCBCOp_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801337u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_FB_CBC_OP_PARAMS), @@ -5308,12 +5188,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [338] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetCtagsForCbcEviction_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801338u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_CTAGS_FOR_CBC_EVICTION_PARAMS), @@ -5323,12 +5203,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [339] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbSetupVprRegion_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080133bu, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_FB_SETUP_VPR_REGION_PARAMS), @@ -5353,12 +5233,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [341] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetCompBitCopyConstructInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080133du, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_FB_GET_COMPBITCOPY_CONSTRUCT_INFO_PARAMS), @@ -5368,12 +5248,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [342] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbSetRrd_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080133eu, /*paramSize=*/ sizeof(NV2080_CTRL_FB_SET_RRD_PARAMS), @@ -5383,12 +5263,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [343] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbSetReadLimit_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080133fu, /*paramSize=*/ sizeof(NV2080_CTRL_FB_SET_READ_LIMIT_PARAMS), @@ -5398,12 +5278,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [344] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbSetWriteLimit_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801340u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_SET_WRITE_LIMIT_PARAMS), @@ -5413,12 +5293,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [345] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbPatchPbrForMining_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801341u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_PATCH_PBR_FOR_MINING_PARAMS), @@ -5428,12 +5308,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [346] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetMemAlignment_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) - /*flags=*/ 0x50u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) + /*flags=*/ 0x18u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801342u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_MEM_ALIGNMENT_PARAMS), @@ -5443,12 +5323,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [347] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetRemappedRows_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801344u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_REMAPPED_ROWS_PARAMS), @@ -5458,12 +5338,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [348] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetFsInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801346u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_FS_INFO_PARAMS), @@ -5473,12 +5353,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [349] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetRowRemapperHistogram_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801347u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_ROW_REMAPPER_HISTOGRAM_PARAMS), @@ -5488,12 +5368,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [350] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetDynamicOfflinedPages_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetDynamicOfflinedPages_DISPATCH, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801348u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_DYNAMIC_OFFLINED_PAGES_PARAMS), @@ -5533,12 +5413,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [353] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4811u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGbGetSemaphoreSurfaceLayout_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4811u) - /*flags=*/ 0x4811u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) + /*flags=*/ 0x509u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801352u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_SEMAPHORE_SURFACE_LAYOUT_PARAMS), @@ -5548,12 +5428,27 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [354] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4813u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100008u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGmmuCommitTlbInvalidate_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100008u) + /*flags=*/ 0x100008u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20801353u, + /*paramSize=*/ sizeof(NV2080_CTRL_GMMU_COMMIT_TLB_INVALIDATE_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdGmmuCommitTlbInvalidate" +#endif + }, + { /* [355] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50bu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdMcGetArchInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4813u) - /*flags=*/ 0x4813u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50bu) + /*flags=*/ 0x50bu, /*accessRight=*/0x0u, /*methodId=*/ 0x20801701u, /*paramSize=*/ sizeof(NV2080_CTRL_MC_GET_ARCH_INFO_PARAMS), @@ -5562,13 +5457,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcGetArchInfo" #endif }, - { /* [355] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + { /* [356] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdMcServiceInterrupts_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801702u, /*paramSize=*/ sizeof(NV2080_CTRL_MC_SERVICE_INTERRUPTS_PARAMS), @@ -5577,13 +5472,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcServiceInterrupts" #endif }, - { /* [356] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [357] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdMcGetManufacturer_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801703u, /*paramSize=*/ sizeof(NV2080_CTRL_MC_GET_MANUFACTURER_PARAMS), @@ -5592,13 +5487,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcGetManufacturer" #endif }, - { /* [357] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [358] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdMcQueryHostclkSlowdownStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801708u, /*paramSize=*/ sizeof(NV2080_CTRL_MC_QUERY_HOSTCLK_SLOWDOWN_STATUS_PARAMS), @@ -5607,13 +5502,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcQueryHostclkSlowdownStatus" #endif }, - { /* [358] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [359] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdMcSetHostclkSlowdownStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801709u, /*paramSize=*/ sizeof(NV2080_CTRL_MC_SET_HOSTCLK_SLOWDOWN_STATUS_PARAMS), @@ -5622,7 +5517,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcSetHostclkSlowdownStatus" #endif }, - { /* [359] */ + { /* [360] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5637,13 +5532,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcChangeReplayableFaultOwnership" #endif }, - { /* [360] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [361] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdMcGetEngineNotificationIntrVectors_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080170du, /*paramSize=*/ sizeof(NV2080_CTRL_MC_GET_ENGINE_NOTIFICATION_INTR_VECTORS_PARAMS), @@ -5652,13 +5547,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcGetEngineNotificationIntrVectors" #endif }, - { /* [361] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [362] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdMcGetStaticIntrTable_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080170eu, /*paramSize=*/ sizeof(NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS), @@ -5667,43 +5562,28 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcGetStaticIntrTable" #endif }, - { /* [362] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4850u) + { /* [363] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x518u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetPciInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4850u) - /*flags=*/ 0x4850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x518u) + /*flags=*/ 0x518u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801801u, /*paramSize=*/ sizeof(NV2080_CTRL_BUS_GET_PCI_INFO_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "subdeviceCtrlCmdBusGetPciInfo" -#endif - }, - { /* [363] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x20801802u, - /*paramSize=*/ sizeof(NV2080_CTRL_BUS_GET_INFO_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdBusGetInfo" #endif }, { /* [364] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4850u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x518u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetPciBarInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4850u) - /*flags=*/ 0x4850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x518u) + /*flags=*/ 0x518u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801803u, /*paramSize=*/ sizeof(NV2080_CTRL_BUS_GET_PCI_BAR_INFO_PARAMS), @@ -5713,12 +5593,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [365] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusSetPcieLinkWidth_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801804u, /*paramSize=*/ sizeof(NV2080_CTRL_BUS_SET_PCIE_LINK_WIDTH_PARAMS), @@ -5728,12 +5608,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [366] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusSetPcieSpeed_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801805u, /*paramSize=*/ sizeof(NV2080_CTRL_BUS_SET_PCIE_SPEED_PARAMS), @@ -5743,57 +5623,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [367] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusSetHwbcUpstreamPcieSpeed_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x20801806u, - /*paramSize=*/ sizeof(NV2080_CTRL_BUS_SET_HWBC_UPSTREAM_PCIE_SPEED_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdBusSetHwbcUpstreamPcieSpeed" -#endif - }, - { /* [368] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetHwbcUpstreamPcieSpeed_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x20801807u, - /*paramSize=*/ sizeof(NV2080_CTRL_BUS_GET_HWBC_UPSTREAM_PCIE_SPEED_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdBusGetHwbcUpstreamPcieSpeed" -#endif - }, - { /* [369] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusHWBCGetUpstreamBAR0_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x2080180eu, - /*paramSize=*/ sizeof(NV2080_CTRL_BUS_HWBC_GET_UPSTREAM_BAR0_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdBusHWBCGetUpstreamBAR0" -#endif - }, - { /* [370] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusServiceGpuMultifunctionState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801812u, /*paramSize=*/ sizeof(NV2080_CTRL_BUS_SERVICE_GPU_MULTIFUNC_STATE_PARAMS), @@ -5802,13 +5637,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusServiceGpuMultifunctionState" #endif }, - { /* [371] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [368] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetPexCounters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801813u, /*paramSize=*/ sizeof(NV2080_CTRL_BUS_GET_PEX_COUNTERS_PARAMS), @@ -5817,13 +5652,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPexCounters" #endif }, - { /* [372] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [369] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusClearPexCounters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801814u, /*paramSize=*/ sizeof(NV2080_CTRL_BUS_CLEAR_PEX_COUNTERS_PARAMS), @@ -5832,13 +5667,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusClearPexCounters" #endif }, - { /* [373] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [370] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusFreezePexCounters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801815u, /*paramSize=*/ sizeof(NV2080_CTRL_BUS_FREEZE_PEX_COUNTERS_PARAMS), @@ -5847,13 +5682,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusFreezePexCounters" #endif }, - { /* [374] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [371] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetPexLaneCounters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801816u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_BUS_GET_PEX_LANE_COUNTERS_PARAMS), @@ -5862,13 +5697,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPexLaneCounters" #endif }, - { /* [375] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [372] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetPcieLtrLatency_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801817u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_BUS_GET_PCIE_LTR_LATENCY_PARAMS), @@ -5877,13 +5712,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPcieLtrLatency" #endif }, - { /* [376] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [373] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusSetPcieLtrLatency_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801818u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_BUS_SET_PCIE_LTR_LATENCY_PARAMS), @@ -5892,13 +5727,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusSetPcieLtrLatency" #endif }, - { /* [377] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [374] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetPexUtilCounters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801819u, /*paramSize=*/ sizeof(NV2080_CTRL_BUS_GET_PEX_UTIL_COUNTERS_PARAMS), @@ -5907,13 +5742,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPexUtilCounters" #endif }, - { /* [378] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [375] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusClearPexUtilCounters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801820u, /*paramSize=*/ sizeof(NV2080_CTRL_BUS_CLEAR_PEX_UTIL_COUNTERS_PARAMS), @@ -5922,13 +5757,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusClearPexUtilCounters" #endif }, - { /* [379] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [376] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetBFD_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801821u, /*paramSize=*/ sizeof(NV2080_CTRL_BUS_GET_BFD_PARAMSARR), @@ -5937,13 +5772,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetBFD" #endif }, - { /* [380] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + { /* [377] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetAspmDisableFlags_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801822u, /*paramSize=*/ sizeof(NV2080_CTRL_BUS_GET_ASPM_DISABLE_FLAGS_PARAMS), @@ -5952,13 +5787,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetAspmDisableFlags" #endif }, - { /* [381] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200850u) + { /* [378] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x20118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetInfoV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200850u) - /*flags=*/ 0x200850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x20118u) + /*flags=*/ 0x20118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801823u, /*paramSize=*/ sizeof(NV2080_CTRL_BUS_GET_INFO_V2_PARAMS), @@ -5967,13 +5802,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetInfoV2" #endif }, - { /* [382] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [379] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusControlPublicAspmBits_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801824u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_BUS_CONTROL_PUBLIC_ASPM_BITS_PARAMS), @@ -5982,13 +5817,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusControlPublicAspmBits" #endif }, - { /* [383] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) + { /* [380] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetNvlinkPeerIdMask_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) - /*flags=*/ 0x810u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*flags=*/ 0x108u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801825u, /*paramSize=*/ sizeof(NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS), @@ -5997,13 +5832,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetNvlinkPeerIdMask" #endif }, - { /* [384] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [381] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusSetEomParameters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801826u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_BUS_SET_EOM_PARAMETERS_PARAMS), @@ -6012,13 +5847,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusSetEomParameters" #endif }, - { /* [385] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [382] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetUphyDlnCfgSpace_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801827u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_BUS_GET_UPHY_DLN_CFG_SPACE_PARAMS), @@ -6027,13 +5862,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetUphyDlnCfgSpace" #endif }, - { /* [386] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [383] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetEomStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801828u, /*paramSize=*/ sizeof(NV2080_CTRL_BUS_GET_EOM_STATUS_PARAMS), @@ -6042,13 +5877,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetEomStatus" #endif }, - { /* [387] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x404210u) + { /* [384] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40448u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetPcieReqAtomicsCaps_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x404210u) - /*flags=*/ 0x404210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40448u) + /*flags=*/ 0x40448u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801829u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_BUS_GET_PCIE_REQ_ATOMICS_CAPS_PARAMS), @@ -6057,13 +5892,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPcieReqAtomicsCaps" #endif }, - { /* [388] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x6210u) + { /* [385] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40448u) /*pFunc=*/ (void (*)(void)) NULL, #else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x6210u) - /*flags=*/ 0x6210u, + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics_DISPATCH, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40448u) + /*flags=*/ 0x40448u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080182au, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS), @@ -6072,13 +5907,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics" #endif }, - { /* [389] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + { /* [386] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetC2CInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetC2CInfo_DISPATCH, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080182bu, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_BUS_GET_C2C_INFO_PARAMS), @@ -6087,13 +5922,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetC2CInfo" #endif }, - { /* [390] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10000u) + { /* [387] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1000u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusSysmemAccess_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10000u) - /*flags=*/ 0x10000u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1000u) + /*flags=*/ 0x1000u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080182cu, /*paramSize=*/ sizeof(NV2080_CTRL_BUS_SYSMEM_ACCESS_PARAMS), @@ -6102,13 +5937,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusSysmemAccess" #endif }, - { /* [391] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x500200u) + { /* [388] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50040u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusSetP2pMapping_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x500200u) - /*flags=*/ 0x500200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50040u) + /*flags=*/ 0x50040u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080182eu, /*paramSize=*/ sizeof(NV2080_CTRL_BUS_SET_P2P_MAPPING_PARAMS), @@ -6117,13 +5952,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusSetP2pMapping" #endif }, - { /* [392] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x500200u) + { /* [389] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50040u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusUnsetP2pMapping_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x500200u) - /*flags=*/ 0x500200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50040u) + /*flags=*/ 0x50040u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080182fu, /*paramSize=*/ sizeof(NV2080_CTRL_BUS_UNSET_P2P_MAPPING_PARAMS), @@ -6132,13 +5967,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusUnsetP2pMapping" #endif }, - { /* [393] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2850u) + { /* [390] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x318u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdKPerfBoost_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2850u) - /*flags=*/ 0x2850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x318u) + /*flags=*/ 0x318u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080200au, /*paramSize=*/ sizeof(NV2080_CTRL_PERF_BOOST_PARAMS), @@ -6147,13 +5982,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKPerfBoost" #endif }, - { /* [394] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) + { /* [391] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdPerfGetLevelInfo_V2_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080200bu, /*paramSize=*/ sizeof(NV2080_CTRL_PERF_GET_LEVEL_INFO_V2_PARAMS), @@ -6162,13 +5997,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfGetLevelInfo_V2" #endif }, - { /* [395] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) + { /* [392] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdPerfGetPowerstate_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080205au, /*paramSize=*/ sizeof(NV2080_CTRL_PERF_GET_POWERSTATE_PARAMS), @@ -6177,13 +6012,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfGetPowerstate" #endif }, - { /* [396] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [393] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdPerfSetPowerstate_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080205bu, /*paramSize=*/ sizeof(NV2080_CTRL_PERF_SET_POWERSTATE_PARAMS), @@ -6192,13 +6027,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfSetPowerstate" #endif }, - { /* [397] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) + { /* [394] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdPerfNotifyVideoevent_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080205du, /*paramSize=*/ sizeof(NV2080_CTRL_PERF_NOTIFY_VIDEOEVENT_PARAMS), @@ -6207,13 +6042,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfNotifyVideoevent" #endif }, - { /* [398] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) + { /* [395] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdPerfGetCurrentPstate_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802068u, /*paramSize=*/ sizeof(NV2080_CTRL_PERF_GET_CURRENT_PSTATE_PARAMS), @@ -6222,13 +6057,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfGetCurrentPstate" #endif }, - { /* [399] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x212u) + { /* [396] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdPerfRatedTdpGetControl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x212u) - /*flags=*/ 0x212u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) + /*flags=*/ 0x4au, /*accessRight=*/0x0u, /*methodId=*/ 0x2080206eu, /*paramSize=*/ sizeof(NV2080_CTRL_PERF_RATED_TDP_CONTROL_PARAMS), @@ -6237,13 +6072,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfRatedTdpGetControl" #endif }, - { /* [400] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [397] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdPerfRatedTdpSetControl_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080206fu, /*paramSize=*/ sizeof(NV2080_CTRL_PERF_RATED_TDP_CONTROL_PARAMS), @@ -6252,13 +6087,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfRatedTdpSetControl" #endif }, - { /* [401] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) + { /* [398] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802087u, /*paramSize=*/ sizeof(NV2080_CTRL_PERF_GET_VID_ENG_PERFMON_SAMPLE_PARAMS), @@ -6267,13 +6102,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample" #endif }, - { /* [402] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [399] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdPerfSetAuxPowerState_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802092u, /*paramSize=*/ sizeof(NV2080_CTRL_PERF_SET_AUX_POWER_STATE_PARAMS), @@ -6282,13 +6117,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfSetAuxPowerState" #endif }, - { /* [403] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) + { /* [400] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdPerfReservePerfmonHw_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) - /*flags=*/ 0x50u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) + /*flags=*/ 0x18u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802093u, /*paramSize=*/ sizeof(NV2080_CTRL_PERF_RESERVE_PERFMON_HW_PARAMS), @@ -6297,13 +6132,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfReservePerfmonHw" #endif }, - { /* [404] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) + { /* [401] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802096u, /*paramSize=*/ sizeof(NV2080_CTRL_PERF_GET_GPUMON_PERFMON_UTIL_SAMPLES_V2_PARAMS), @@ -6312,7 +6147,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2" #endif }, - { /* [405] */ + { /* [402] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6327,13 +6162,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcReadVirtualMem" #endif }, - { /* [406] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [403] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdRcGetErrorCount_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802205u, /*paramSize=*/ sizeof(NV2080_CTRL_RC_GET_ERROR_COUNT_PARAMS), @@ -6342,13 +6177,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcGetErrorCount" #endif }, - { /* [407] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [404] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdRcSetCleanErrorHistory_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802207u, /*paramSize=*/ 0, @@ -6357,13 +6192,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcSetCleanErrorHistory" #endif }, - { /* [408] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + { /* [405] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdRcGetWatchdogInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802209u, /*paramSize=*/ sizeof(NV2080_CTRL_RC_GET_WATCHDOG_INFO_PARAMS), @@ -6372,13 +6207,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcGetWatchdogInfo" #endif }, - { /* [409] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) + { /* [406] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdRcDisableWatchdog_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) - /*flags=*/ 0x50u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) + /*flags=*/ 0x18u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080220au, /*paramSize=*/ 0, @@ -6387,13 +6222,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcDisableWatchdog" #endif }, - { /* [410] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) + { /* [407] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdRcEnableWatchdog_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) - /*flags=*/ 0x50u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) + /*flags=*/ 0x18u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080220bu, /*paramSize=*/ 0, @@ -6402,13 +6237,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcEnableWatchdog" #endif }, - { /* [411] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) + { /* [408] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdRcReleaseWatchdogRequests_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) - /*flags=*/ 0x50u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) + /*flags=*/ 0x18u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080220cu, /*paramSize=*/ 0, @@ -6417,13 +6252,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcReleaseWatchdogRequests" #endif }, - { /* [412] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [409] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdSetRcRecovery_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080220du, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_RC_RECOVERY_PARAMS), @@ -6432,13 +6267,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdSetRcRecovery" #endif }, - { /* [413] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [410] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGetRcRecovery_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080220eu, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_RC_RECOVERY_PARAMS), @@ -6447,13 +6282,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGetRcRecovery" #endif }, - { /* [414] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) + { /* [411] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdRcSoftDisableWatchdog_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) - /*flags=*/ 0x50u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) + /*flags=*/ 0x18u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802210u, /*paramSize=*/ 0, @@ -6462,13 +6297,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcSoftDisableWatchdog" #endif }, - { /* [415] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [412] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdSetRcInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802211u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_RC_INFO_PARAMS), @@ -6477,13 +6312,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdSetRcInfo" #endif }, - { /* [416] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [413] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGetRcInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802212u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_RC_INFO_PARAMS), @@ -6492,13 +6327,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGetRcInfo" #endif }, - { /* [417] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [414] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdRcGetErrorV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802213u, /*paramSize=*/ sizeof(NV2080_CTRL_RC_GET_ERROR_V2_PARAMS), @@ -6507,13 +6342,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcGetErrorV2" #endif }, - { /* [418] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [415] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGpioProgramDirection_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802300u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GPIO_PROGRAM_DIRECTION_PARAMS), @@ -6522,13 +6357,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGpioProgramDirection" #endif }, - { /* [419] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [416] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGpioProgramOutput_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802301u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GPIO_PROGRAM_OUTPUT_PARAMS), @@ -6537,13 +6372,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGpioProgramOutput" #endif }, - { /* [420] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [417] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGpioReadInput_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802302u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GPIO_READ_INPUT_PARAMS), @@ -6552,13 +6387,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGpioReadInput" #endif }, - { /* [421] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [418] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGpioActivateHwFunction_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802303u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GPIO_ACTIVATE_HW_FUNCTION_PARAMS), @@ -6567,13 +6402,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGpioActivateHwFunction" #endif }, - { /* [422] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [419] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvdGetDumpSize_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802401u, /*paramSize=*/ sizeof(NV2080_CTRL_NVD_GET_DUMP_SIZE_PARAMS), @@ -6582,7 +6417,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvdGetDumpSize" #endif }, - { /* [423] */ + { /* [420] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6597,7 +6432,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvdGetDump" #endif }, - { /* [424] */ + { /* [421] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6612,7 +6447,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvdGetNocatJournalRpt" #endif }, - { /* [425] */ + { /* [422] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6627,7 +6462,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvdSetNocatJournalData" #endif }, - { /* [426] */ + { /* [423] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6642,13 +6477,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvdInsertNocatJournalRecord" #endif }, - { /* [427] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [424] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdDmaInvalidateTLB_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802502u, /*paramSize=*/ sizeof(NV2080_CTRL_DMA_INVALIDATE_TLB_PARAMS), @@ -6657,13 +6492,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDmaInvalidateTLB" #endif }, - { /* [428] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [425] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdDmaGetInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802503u, /*paramSize=*/ sizeof(NV2080_CTRL_DMA_GET_INFO_PARAMS), @@ -6672,13 +6507,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDmaGetInfo" #endif }, - { /* [429] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xa50u) + { /* [426] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdPmgrGetModuleInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xa50u) - /*flags=*/ 0xa50u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) + /*flags=*/ 0x158u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802609u, /*paramSize=*/ sizeof(NV2080_CTRL_PMGR_MODULE_INFO_PARAMS), @@ -6687,13 +6522,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPmgrGetModuleInfo" #endif }, - { /* [430] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [427] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuProcessPostGc6ExitTasks_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080270cu, /*paramSize=*/ 0, @@ -6702,7 +6537,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuProcessPostGc6ExitTasks" #endif }, - { /* [431] */ + { /* [428] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6717,7 +6552,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGc6Entry" #endif }, - { /* [432] */ + { /* [429] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6732,13 +6567,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGc6Exit" #endif }, - { /* [433] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [430] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdLpwrDifrCtrl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802801u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_LPWR_DIFR_CTRL_PARAMS), @@ -6747,13 +6582,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdLpwrDifrCtrl" #endif }, - { /* [434] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [431] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdLpwrDifrPrefetchResponse_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802802u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_LPWR_DIFR_PREFETCH_RESPONSE_PARAMS), @@ -6762,13 +6597,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdLpwrDifrPrefetchResponse" #endif }, - { /* [435] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + { /* [432] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdCeGetCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - /*flags=*/ 0x850u, + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdCeGetCaps_DISPATCH, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802a01u, /*paramSize=*/ sizeof(NV2080_CTRL_CE_GET_CAPS_PARAMS), @@ -6777,13 +6612,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetCaps" #endif }, - { /* [436] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2a11u) + { /* [433] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x349u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdCeGetCePceMask_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2a11u) - /*flags=*/ 0x2a11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x349u) + /*flags=*/ 0x349u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802a02u, /*paramSize=*/ sizeof(NV2080_CTRL_CE_GET_CE_PCE_MASK_PARAMS), @@ -6792,13 +6627,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetCePceMask" #endif }, - { /* [437] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2850u) + { /* [434] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdCeGetCapsV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2850u) - /*flags=*/ 0x2850u, + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdCeGetCapsV2_DISPATCH, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802a03u, /*paramSize=*/ sizeof(NV2080_CTRL_CE_GET_CAPS_V2_PARAMS), @@ -6807,13 +6642,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetCapsV2" #endif }, - { /* [438] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [435] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdCeUpdatePceLceMappings_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802a05u, /*paramSize=*/ sizeof(NV2080_CTRL_CE_UPDATE_PCE_LCE_MAPPINGS_PARAMS), @@ -6822,13 +6657,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeUpdatePceLceMappings" #endif }, - { /* [439] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [436] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdCeUpdateClassDB_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802a06u, /*paramSize=*/ sizeof(NV2080_CTRL_CE_UPDATE_CLASS_DB_PARAMS), @@ -6837,13 +6672,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeUpdateClassDB" #endif }, - { /* [440] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100e40u) + { /* [437] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x101d0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdCeGetPhysicalCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100e40u) - /*flags=*/ 0x100e40u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x101d0u) + /*flags=*/ 0x101d0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802a07u, /*paramSize=*/ sizeof(NV2080_CTRL_CE_GET_CAPS_V2_PARAMS), @@ -6852,13 +6687,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetPhysicalCaps" #endif }, - { /* [441] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0200u) + { /* [438] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c040u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdCeGetFaultMethodBufferSize_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0200u) - /*flags=*/ 0x1c0200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c040u) + /*flags=*/ 0x1c040u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802a08u, /*paramSize=*/ sizeof(NV2080_CTRL_CE_GET_FAULT_METHOD_BUFFER_SIZE_PARAMS), @@ -6867,13 +6702,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetFaultMethodBufferSize" #endif }, - { /* [442] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4600u) + { /* [439] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4c0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdCeGetHubPceMask_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4600u) - /*flags=*/ 0x4600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4c0u) + /*flags=*/ 0x4c0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802a09u, /*paramSize=*/ sizeof(NV2080_CTRL_CE_GET_HUB_PCE_MASK_PARAMS), @@ -6882,13 +6717,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetHubPceMask" #endif }, - { /* [443] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2810u) + { /* [440] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdCeGetAllCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2810u) - /*flags=*/ 0x2810u, + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdCeGetAllCaps_DISPATCH, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*flags=*/ 0x108u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802a0au, /*paramSize=*/ sizeof(NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS), @@ -6897,13 +6732,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetAllCaps" #endif }, - { /* [444] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xe40u) + { /* [441] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdCeGetAllPhysicalCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xe40u) - /*flags=*/ 0xe40u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d0u) + /*flags=*/ 0x1d0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20802a0bu, /*paramSize=*/ sizeof(NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS), @@ -6912,13 +6747,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetAllPhysicalCaps" #endif }, - { /* [445] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2850u) + { /* [442] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetNvlinkCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2850u) - /*flags=*/ 0x2850u, + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetNvlinkCaps_DISPATCH, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803001u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS), @@ -6927,13 +6762,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetNvlinkCaps" #endif }, - { /* [446] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) + { /* [443] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetNvlinkStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) - /*flags=*/ 0x810u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*flags=*/ 0x108u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803002u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS_PARAMS), @@ -6942,13 +6777,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetNvlinkStatus" #endif }, - { /* [447] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [444] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBusGetNvlinkErrInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803003u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_GET_ERR_INFO_PARAMS), @@ -6957,13 +6792,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetNvlinkErrInfo" #endif }, - { /* [448] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [445] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGetNvlinkCounters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803004u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_GET_COUNTERS_PARAMS), @@ -6972,13 +6807,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGetNvlinkCounters" #endif }, - { /* [449] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [446] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdClearNvlinkCounters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803005u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_CLEAR_COUNTERS_PARAMS), @@ -6987,13 +6822,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdClearNvlinkCounters" #endif }, - { /* [450] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [447] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkGetLinkFatalErrorCounts_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803009u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_GET_LINK_FATAL_ERROR_COUNTS_PARAMS), @@ -7002,13 +6837,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetLinkFatalErrorCounts" #endif }, - { /* [451] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [448] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkSetupEom_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080300cu, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_NVLINK_SETUP_EOM_PARAMS), @@ -7017,13 +6852,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSetupEom" #endif }, - { /* [452] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [449] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkGetPowerState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080300eu, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_GET_POWER_STATE_PARAMS), @@ -7032,13 +6867,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetPowerState" #endif }, - { /* [453] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [450] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinGetLinkFomValues_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803011u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_NVLINK_GET_LINK_FOM_VALUES_PARAMS), @@ -7047,13 +6882,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinGetLinkFomValues" #endif }, - { /* [454] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [451] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkGetNvlinkEccErrors_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803014u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_GET_NVLINK_ECC_ERRORS_PARAMS), @@ -7062,13 +6897,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetNvlinkEccErrors" #endif }, - { /* [455] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [452] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkReadTpCounters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803015u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_READ_TP_COUNTERS_PARAMS), @@ -7077,13 +6912,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkReadTpCounters" #endif }, - { /* [456] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + { /* [453] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkEnableNvlinkPeer_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) - /*flags=*/ 0x201u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) + /*flags=*/ 0x41u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803017u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS), @@ -7092,13 +6927,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkEnableNvlinkPeer" #endif }, - { /* [457] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [454] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkGetLpCounters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803018u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_GET_LP_COUNTERS_PARAMS), @@ -7107,13 +6942,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetLpCounters" #endif }, - { /* [458] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + { /* [455] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkCoreCallback_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) - /*flags=*/ 0x201u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) + /*flags=*/ 0x41u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803019u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS), @@ -7122,13 +6957,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkCoreCallback" #endif }, - { /* [459] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [456] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkGetAliEnabled_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080301au, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_GET_ALI_ENABLED_PARAMS), @@ -7137,13 +6972,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetAliEnabled" #endif }, - { /* [460] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + { /* [457] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) - /*flags=*/ 0x201u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) + /*flags=*/ 0x41u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080301bu, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS), @@ -7152,13 +6987,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid" #endif }, - { /* [461] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + { /* [458] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkUpdateHshubMux_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) - /*flags=*/ 0x201u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) + /*flags=*/ 0x41u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080301cu, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_PARAMS), @@ -7167,13 +7002,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkUpdateHshubMux" #endif }, - { /* [462] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + { /* [459] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) - /*flags=*/ 0x201u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) + /*flags=*/ 0x41u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080301du, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS), @@ -7182,13 +7017,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer" #endif }, - { /* [463] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + { /* [460] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) - /*flags=*/ 0x201u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) + /*flags=*/ 0x41u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080301eu, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS), @@ -7197,13 +7032,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer" #endif }, - { /* [464] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + { /* [461] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkRemoveNvlinkMapping_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) - /*flags=*/ 0x201u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) + /*flags=*/ 0x41u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080301fu, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_REMOVE_NVLINK_MAPPING_PARAMS), @@ -7212,13 +7047,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkRemoveNvlinkMapping" #endif }, - { /* [465] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + { /* [462] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkSaveRestoreHshubState_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) - /*flags=*/ 0x201u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) + /*flags=*/ 0x41u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803020u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_SAVE_RESTORE_HSHUB_STATE_PARAMS), @@ -7227,13 +7062,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSaveRestoreHshubState" #endif }, - { /* [466] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + { /* [463] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkProgramBufferready_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) - /*flags=*/ 0x201u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) + /*flags=*/ 0x41u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803021u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_PROGRAM_BUFFERREADY_PARAMS), @@ -7242,13 +7077,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkProgramBufferready" #endif }, - { /* [467] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + { /* [464] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkUpdateCurrentConfig_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) - /*flags=*/ 0x201u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) + /*flags=*/ 0x41u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803022u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_UPDATE_CURRENT_CONFIG_PARAMS), @@ -7257,13 +7092,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkUpdateCurrentConfig" #endif }, - { /* [468] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [465] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkSetLoopbackMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803023u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_PARAMS), @@ -7272,13 +7107,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSetLoopbackMode" #endif }, - { /* [469] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + { /* [466] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkUpdatePeerLinkMask_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) - /*flags=*/ 0x201u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) + /*flags=*/ 0x41u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803024u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_UPDATE_PEER_LINK_MASK_PARAMS), @@ -7287,13 +7122,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkUpdatePeerLinkMask" #endif }, - { /* [470] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + { /* [467] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkUpdateLinkConnection_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) - /*flags=*/ 0x201u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) + /*flags=*/ 0x41u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803025u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_UPDATE_LINK_CONNECTION_PARAMS), @@ -7302,13 +7137,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkUpdateLinkConnection" #endif }, - { /* [471] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + { /* [468] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkEnableLinksPostTopology_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) - /*flags=*/ 0x201u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) + /*flags=*/ 0x41u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803026u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_ENABLE_LINKS_POST_TOPOLOGY_PARAMS), @@ -7317,13 +7152,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkEnableLinksPostTopology" #endif }, - { /* [472] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [469] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkPreLinkTrainAli_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803027u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_PRE_LINK_TRAIN_ALI_PARAMS), @@ -7332,13 +7167,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPreLinkTrainAli" #endif }, - { /* [473] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [470] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkGetRefreshCounters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803028u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_GET_REFRESH_COUNTERS_PARAMS), @@ -7347,13 +7182,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetRefreshCounters" #endif }, - { /* [474] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [471] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkClearRefreshCounters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803029u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_CLEAR_REFRESH_COUNTERS_PARAMS), @@ -7362,13 +7197,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkClearRefreshCounters" #endif }, - { /* [475] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100201u) + { /* [472] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10041u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkGetLinkMaskPostRxDet_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100201u) - /*flags=*/ 0x100201u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10041u) + /*flags=*/ 0x10041u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080302au, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_GET_LINK_MASK_POST_RX_DET_PARAMS), @@ -7377,13 +7212,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetLinkMaskPostRxDet" #endif }, - { /* [476] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [473] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkLinkTrainAli_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080302bu, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_LINK_TRAIN_ALI_PARAMS), @@ -7392,13 +7227,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkLinkTrainAli" #endif }, - { /* [477] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [474] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkGetNvlinkDeviceInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080302cu, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_GET_NVLINK_DEVICE_INFO_PARAMS), @@ -7407,13 +7242,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetNvlinkDeviceInfo" #endif }, - { /* [478] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [475] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkGetIoctrlDeviceInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080302du, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_GET_IOCTRL_DEVICE_INFO_PARAMS), @@ -7422,13 +7257,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetIoctrlDeviceInfo" #endif }, - { /* [479] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [476] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkProgramLinkSpeed_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080302eu, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_PROGRAM_LINK_SPEED_PARAMS), @@ -7437,13 +7272,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkProgramLinkSpeed" #endif }, - { /* [480] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + { /* [477] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkAreLinksTrained_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) - /*flags=*/ 0x201u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) + /*flags=*/ 0x41u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080302fu, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_ARE_LINKS_TRAINED_PARAMS), @@ -7452,13 +7287,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkAreLinksTrained" #endif }, - { /* [481] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [478] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkResetLinks_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803030u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_RESET_LINKS_PARAMS), @@ -7467,13 +7302,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkResetLinks" #endif }, - { /* [482] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [479] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkDisableDlInterrupts_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803031u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_DISABLE_DL_INTERRUPTS_PARAMS), @@ -7482,13 +7317,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkDisableDlInterrupts" #endif }, - { /* [483] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + { /* [480] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkGetLinkAndClockInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) - /*flags=*/ 0x201u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) + /*flags=*/ 0x41u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803032u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_INFO_PARAMS), @@ -7497,13 +7332,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetLinkAndClockInfo" #endif }, - { /* [484] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [481] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkSetupNvlinkSysmem_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803033u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_SETUP_NVLINK_SYSMEM_PARAMS), @@ -7512,13 +7347,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSetupNvlinkSysmem" #endif }, - { /* [485] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [482] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkProcessForcedConfigs_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803034u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_PROCESS_FORCED_CONFIGS_PARAMS), @@ -7527,13 +7362,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkProcessForcedConfigs" #endif }, - { /* [486] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [483] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkSyncLaneShutdownProps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803035u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_SYNC_NVLINK_SHUTDOWN_PROPS_PARAMS), @@ -7542,13 +7377,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSyncLaneShutdownProps" #endif }, - { /* [487] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [484] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkEnableSysmemNvlinkAts_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803036u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_ENABLE_SYSMEM_NVLINK_ATS_PARAMS), @@ -7557,13 +7392,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkEnableSysmemNvlinkAts" #endif }, - { /* [488] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + { /* [485] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkHshubGetSysmemNvlinkMask_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) - /*flags=*/ 0x201u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) + /*flags=*/ 0x41u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803037u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_HSHUB_GET_SYSMEM_NVLINK_MASK_PARAMS), @@ -7572,13 +7407,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkHshubGetSysmemNvlinkMask" #endif }, - { /* [489] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [486] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkGetSetNvswitchFlaAddr_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803038u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_GET_SET_NVSWITCH_FLA_ADDR_PARAMS), @@ -7587,13 +7422,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetSetNvswitchFlaAddr" #endif }, - { /* [490] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100201u) + { /* [487] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10041u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkSyncLinkMasksAndVbiosInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100201u) - /*flags=*/ 0x100201u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10041u) + /*flags=*/ 0x10041u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803039u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_SYNC_LINK_MASKS_AND_VBIOS_INFO_PARAMS), @@ -7602,13 +7437,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSyncLinkMasksAndVbiosInfo" #endif }, - { /* [491] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [488] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkEnableLinks_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080303au, /*paramSize=*/ 0, @@ -7617,13 +7452,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkEnableLinks" #endif }, - { /* [492] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [489] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkProcessInitDisabledLinks_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080303bu, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_PROCESS_INIT_DISABLED_LINKS_PARAMS), @@ -7632,13 +7467,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkProcessInitDisabledLinks" #endif }, - { /* [493] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [490] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkEomControl_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080303cu, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_EOM_CONTROL_PARAMS), @@ -7647,13 +7482,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkEomControl" #endif }, - { /* [494] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [491] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkSetL1Threshold_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080303eu, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_SET_L1_THRESHOLD_PARAMS), @@ -7662,13 +7497,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSetL1Threshold" #endif }, - { /* [495] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [492] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkGetL1Threshold_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080303fu, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_GET_L1_THRESHOLD_PARAMS), @@ -7677,13 +7512,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetL1Threshold" #endif }, - { /* [496] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1240u) + { /* [493] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10250u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkInbandSendData_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1240u) - /*flags=*/ 0x1240u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10250u) + /*flags=*/ 0x10250u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803040u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_INBAND_SEND_DATA_PARAMS), @@ -7692,13 +7527,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkInbandSendData" #endif }, - { /* [497] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [494] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkDirectConnectCheck_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803042u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_DIRECT_CONNECT_CHECK_PARAMS), @@ -7707,13 +7542,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkDirectConnectCheck" #endif }, - { /* [498] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [495] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkPostFaultUp_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803043u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_POST_FAULT_UP_PARAMS), @@ -7722,13 +7557,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPostFaultUp" #endif }, - { /* [499] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [496] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkGetPortEvents_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803044u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_GET_PORT_EVENTS_PARAMS), @@ -7737,13 +7572,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetPortEvents" #endif }, - { /* [500] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + { /* [497] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdIsNvlinkReducedConfig_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) - /*flags=*/ 0x200u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) + /*flags=*/ 0x40u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803046u, /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_IS_REDUCED_CONFIG_PARAMS), @@ -7752,13 +7587,43 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdIsNvlinkReducedConfig" #endif }, - { /* [501] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [498] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGetNvlinkCountersV2_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20803050u, + /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_GET_COUNTERS_V2_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdGetNvlinkCountersV2" +#endif + }, + { /* [499] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdClearNvlinkCountersV2_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20803051u, + /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_CLEAR_COUNTERS_V2_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdClearNvlinkCountersV2" +#endif + }, + { /* [500] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFlcnGetDmemUsage_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803101u, /*paramSize=*/ sizeof(NV2080_CTRL_FLCN_GET_DMEM_USAGE_PARAMS), @@ -7767,13 +7632,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnGetDmemUsage" #endif }, - { /* [502] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [501] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFlcnGetEngineArch_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803118u, /*paramSize=*/ sizeof(NV2080_CTRL_FLCN_GET_ENGINE_ARCH_PARAMS), @@ -7782,13 +7647,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnGetEngineArch" #endif }, - { /* [503] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [502] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFlcnUstreamerQueueInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803120u, /*paramSize=*/ sizeof(NV2080_CTRL_FLCN_USTREAMER_QUEUE_INFO_PARAMS), @@ -7797,13 +7662,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnUstreamerQueueInfo" #endif }, - { /* [504] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [503] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFlcnUstreamerControlGet_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803122u, /*paramSize=*/ sizeof(NV2080_CTRL_FLCN_USTREAMER_CONTROL_PARAMS), @@ -7812,13 +7677,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnUstreamerControlGet" #endif }, - { /* [505] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + { /* [504] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFlcnUstreamerControlSet_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) - /*flags=*/ 0x204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803123u, /*paramSize=*/ sizeof(NV2080_CTRL_FLCN_USTREAMER_CONTROL_PARAMS), @@ -7827,7 +7692,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnUstreamerControlSet" #endif }, - { /* [506] */ + { /* [505] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7842,13 +7707,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnGetCtxBufferInfo" #endif }, - { /* [507] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [506] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFlcnGetCtxBufferSize_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803125u, /*paramSize=*/ sizeof(NV2080_CTRL_FLCN_GET_CTX_BUFFER_SIZE_PARAMS), @@ -7857,13 +7722,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnGetCtxBufferSize" #endif }, - { /* [508] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [507] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdEccGetClientExposedCounters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803400u, /*paramSize=*/ sizeof(NV2080_CTRL_ECC_GET_CLIENT_EXPOSED_COUNTERS_PARAMS), @@ -7872,13 +7737,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdEccGetClientExposedCounters" #endif }, - { /* [509] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [508] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdEccGetEciCounters_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803401u, /*paramSize=*/ sizeof(NV2080_CTRL_ECC_GET_ECI_COUNTERS_PARAMS), @@ -7887,13 +7752,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdEccGetEciCounters" #endif }, - { /* [510] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [509] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdEccGetVolatileCounts_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803402u, /*paramSize=*/ sizeof(NV2080_CTRL_ECC_GET_VOLATILE_COUNTS_PARAMS), @@ -7902,13 +7767,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdEccGetVolatileCounts" #endif }, - { /* [511] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [510] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFlaRange_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803501u, /*paramSize=*/ sizeof(NV2080_CTRL_FLA_RANGE_PARAMS), @@ -7917,13 +7782,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlaRange" #endif }, - { /* [512] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x102204u) + { /* [511] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10244u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFlaSetupInstanceMemBlock_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x102204u) - /*flags=*/ 0x102204u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10244u) + /*flags=*/ 0x10244u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803502u, /*paramSize=*/ sizeof(NV2080_CTRL_FLA_SETUP_INSTANCE_MEM_BLOCK_PARAMS), @@ -7932,13 +7797,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlaSetupInstanceMemBlock" #endif }, - { /* [513] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100004u) + { /* [512] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10004u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFlaGetRange_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100004u) - /*flags=*/ 0x100004u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10004u) + /*flags=*/ 0x10004u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803503u, /*paramSize=*/ sizeof(NV2080_CTRL_FLA_GET_RANGE_PARAMS), @@ -7947,13 +7812,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlaGetRange" #endif }, - { /* [514] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1810u) + { /* [513] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFlaGetFabricMemStats_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1810u) - /*flags=*/ 0x1810u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*flags=*/ 0x108u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803504u, /*paramSize=*/ sizeof(NV2080_CTRL_FLA_GET_FABRIC_MEM_STATS_PARAMS), @@ -7962,13 +7827,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlaGetFabricMemStats" #endif }, - { /* [515] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x404a11u) + { /* [514] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40549u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGspGetFeatures_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x404a11u) - /*flags=*/ 0x404a11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40549u) + /*flags=*/ 0x40549u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803601u, /*paramSize=*/ sizeof(NV2080_CTRL_GSP_GET_FEATURES_PARAMS), @@ -7977,13 +7842,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGspGetFeatures" #endif }, - { /* [516] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + { /* [515] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGspGetRmHeapStats_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - /*flags=*/ 0x210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803602u, /*paramSize=*/ sizeof(NV2080_CTRL_GSP_GET_RM_HEAP_STATS_PARAMS), @@ -7992,13 +7857,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGspGetRmHeapStats" #endif }, - { /* [517] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + { /* [516] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGrmgrGetGrFsInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803801u, /*paramSize=*/ sizeof(NV2080_CTRL_GRMGR_GET_GR_FS_INFO_PARAMS), @@ -8007,7 +7872,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGrmgrGetGrFsInfo" #endif }, - { /* [518] */ + { /* [517] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x3u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8022,13 +7887,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdOsUnixGc6BlockerRefCnt" #endif }, - { /* [519] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + { /* [518] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdOsUnixAllowDisallowGcoff_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) - /*flags=*/ 0x11u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) + /*flags=*/ 0x9u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803d02u, /*paramSize=*/ sizeof(NV2080_CTRL_OS_UNIX_ALLOW_DISALLOW_GCOFF_PARAMS), @@ -8037,7 +7902,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdOsUnixAllowDisallowGcoff" #endif }, - { /* [520] */ + { /* [519] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8052,13 +7917,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdOsUnixAudioDynamicPower" #endif }, - { /* [521] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x13u) + { /* [520] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xbu) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdOsUnixVidmemPersistenceStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x13u) - /*flags=*/ 0x13u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xbu) + /*flags=*/ 0xbu, /*accessRight=*/0x0u, /*methodId=*/ 0x20803d07u, /*paramSize=*/ sizeof(NV2080_CTRL_OS_UNIX_VIDMEM_PERSISTENCE_STATUS_PARAMS), @@ -8067,7 +7932,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdOsUnixVidmemPersistenceStatus" #endif }, - { /* [522] */ + { /* [521] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8082,13 +7947,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdOsUnixUpdateTgpStatus" #endif }, - { /* [523] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [522] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdVgpuMgrInternalBootloadGspVgpuPluginTask_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20804001u, /*paramSize=*/ sizeof(NV2080_CTRL_VGPU_MGR_INTERNAL_BOOTLOAD_GSP_VGPU_PLUGIN_TASK_PARAMS), @@ -8097,13 +7962,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalBootloadGspVgpuPluginTask" #endif }, - { /* [524] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [523] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdVgpuMgrInternalShutdownGspVgpuPluginTask_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20804002u, /*paramSize=*/ sizeof(NV2080_CTRL_VGPU_MGR_INTERNAL_SHUTDOWN_GSP_VGPU_PLUGIN_TASK_PARAMS), @@ -8112,13 +7977,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalShutdownGspVgpuPluginTask" #endif }, - { /* [525] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [524] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdVgpuMgrInternalPgpuAddVgpuType_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20804003u, /*paramSize=*/ sizeof(NV2080_CTRL_VGPU_MGR_INTERNAL_PGPU_ADD_VGPU_TYPE_PARAMS), @@ -8127,13 +7992,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalPgpuAddVgpuType" #endif }, - { /* [526] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [525] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdVgpuMgrInternalEnumerateVgpuPerPgpu_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20804004u, /*paramSize=*/ sizeof(NV2080_CTRL_VGPU_MGR_INTERNAL_ENUMERATE_VGPU_PER_PGPU_PARAMS), @@ -8142,13 +8007,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalEnumerateVgpuPerPgpu" #endif }, - { /* [527] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [526] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdVgpuMgrInternalClearGuestVmInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20804005u, /*paramSize=*/ sizeof(NV2080_CTRL_VGPU_MGR_INTERNAL_CLEAR_GUEST_VM_INFO_PARAMS), @@ -8157,13 +8022,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalClearGuestVmInfo" #endif }, - { /* [528] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [527] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdVgpuMgrInternalGetVgpuFbUsage_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20804006u, /*paramSize=*/ sizeof(NV2080_CTRL_VGPU_MGR_INTERNAL_GET_VGPU_FB_USAGE_PARAMS), @@ -8172,13 +8037,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalGetVgpuFbUsage" #endif }, - { /* [529] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [528] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20804007u, /*paramSize=*/ sizeof(NV2080_CTRL_VGPU_MGR_INTERNAL_SET_VGPU_ENCODER_CAPACITY_PARAMS), @@ -8187,13 +8052,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity" #endif }, - { /* [530] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [529] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdVgpuMgrInternalCleanupGspVgpuPluginResources_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20804008u, /*paramSize=*/ sizeof(NV2080_CTRL_VGPU_MGR_INTERNAL_VGPU_PLUGIN_CLEANUP_PARAMS), @@ -8202,13 +8067,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalCleanupGspVgpuPluginResources" #endif }, - { /* [531] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [530] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdVgpuMgrInternalGetPgpuFsEncoding_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20804009u, /*paramSize=*/ sizeof(NV2080_CTRL_VGPU_MGR_INTERNAL_GET_PGPU_FS_ENCODING_PARAMS), @@ -8217,13 +8082,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalGetPgpuFsEncoding" #endif }, - { /* [532] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [531] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdVgpuMgrInternalGetPgpuMigrationSupport_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080400au, /*paramSize=*/ sizeof(NV2080_CTRL_VGPU_MGR_INTERNAL_GET_PGPU_MIGRATION_SUPPORT_PARAMS), @@ -8232,13 +8097,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalGetPgpuMigrationSupport" #endif }, - { /* [533] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [532] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080400bu, /*paramSize=*/ sizeof(NV2080_CTRL_VGPU_MGR_INTERNAL_SET_VGPU_MGR_CONFIG_PARAMS), @@ -8247,13 +8112,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig" #endif }, - { /* [534] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [533] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdVgpuMgrInternalFreeStates_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080400cu, /*paramSize=*/ sizeof(NV2080_CTRL_VGPU_MGR_INTERNAL_FREE_STATES_PARAMS), @@ -8262,13 +8127,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalFreeStates" #endif }, - { /* [535] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xa50u) + { /* [534] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGetAvailableHshubMask_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xa50u) - /*flags=*/ 0xa50u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) + /*flags=*/ 0x158u, /*accessRight=*/0x0u, /*methodId=*/ 0x20804101u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_HSHUB_GET_AVAILABLE_MASK_PARAMS), @@ -8277,13 +8142,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGetAvailableHshubMask" #endif }, - { /* [536] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xa50u) + { /* [535] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlSetEcThrottleMode_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xa50u) - /*flags=*/ 0xa50u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) + /*flags=*/ 0x158u, /*accessRight=*/0x0u, /*methodId=*/ 0x20804102u, /*paramSize=*/ sizeof(NV2080_CTRL_CMD_HSHUB_SET_EC_THROTTLE_MODE_PARAMS), @@ -8292,28 +8157,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlSetEcThrottleMode" #endif }, - { /* [537] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamples_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x2080a083u, - /*paramSize=*/ sizeof(NV2080_CTRL_PERF_GET_GPUMON_PERFMON_UTIL_SAMPLES_PARAM), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamples" -#endif - }, - { /* [538] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + { /* [536] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGcxEntryPrerequisite_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - /*flags=*/ 0x600u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, /*accessRight=*/0x0u, /*methodId=*/ 0x2080a7d7u, /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GCX_ENTRY_PREREQUISITE_PARAMS), @@ -8325,9 +8175,165 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic }; +// 3 down-thunk(s) defined to bridge methods in Subdevice from superclasses + +// subdevicePreDestruct: virtual override (res) base (gpures) +static void __nvoc_down_thunk_Subdevice_resPreDestruct(struct RsResource *pResource) { + subdevicePreDestruct((struct Subdevice *)(((unsigned char *) pResource) - __nvoc_rtti_Subdevice_RsResource.offset)); +} + +// subdeviceInternalControlForward: virtual override (gpures) base (gpures) +static NV_STATUS __nvoc_down_thunk_Subdevice_gpuresInternalControlForward(struct GpuResource *pSubdevice, NvU32 command, void *pParams, NvU32 size) { + return subdeviceInternalControlForward((struct Subdevice *)(((unsigned char *) pSubdevice) - __nvoc_rtti_Subdevice_GpuResource.offset), command, pParams, size); +} + +// subdeviceControlFilter: virtual override (res) base (gpures) +static NV_STATUS __nvoc_down_thunk_Subdevice_resControlFilter(struct RsResource *pSubdevice, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return subdeviceControlFilter((struct Subdevice *)(((unsigned char *) pSubdevice) - __nvoc_rtti_Subdevice_RsResource.offset), pCallContext, pParams); +} + + +// 27 up-thunk(s) defined to bridge methods in Subdevice to superclasses + +// subdeviceControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_subdeviceControl(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset), pCallContext, pParams); +} + +// subdeviceMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_subdeviceMap(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// subdeviceUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_subdeviceUnmap(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset), pCallContext, pCpuMapping); +} + +// subdeviceShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_subdeviceShareCallback(struct Subdevice *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// subdeviceGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_subdeviceGetRegBaseOffsetAndSize(struct Subdevice *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset), pGpu, pOffset, pSize); +} + +// subdeviceGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_subdeviceGetMapAddrSpace(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + +// subdeviceGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_subdeviceGetInternalObjectHandle(struct Subdevice *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset)); +} + +// subdeviceAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_subdeviceAccessCallback(struct Subdevice *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// subdeviceGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_subdeviceGetMemInterMapParams(struct Subdevice *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Subdevice_RmResource.offset), pParams); +} + +// subdeviceCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_subdeviceCheckMemInterUnmap(struct Subdevice *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Subdevice_RmResource.offset), bSubdeviceHandleProvided); +} + +// subdeviceGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_subdeviceGetMemoryMappingDescriptor(struct Subdevice *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Subdevice_RmResource.offset), ppMemDesc); +} + +// subdeviceControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_subdeviceControlSerialization_Prologue(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RmResource.offset), pCallContext, pParams); +} + +// subdeviceControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_subdeviceControlSerialization_Epilogue(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RmResource.offset), pCallContext, pParams); +} + +// subdeviceControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_subdeviceControl_Prologue(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RmResource.offset), pCallContext, pParams); +} + +// subdeviceControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_subdeviceControl_Epilogue(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RmResource.offset), pCallContext, pParams); +} + +// subdeviceCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_subdeviceCanCopy(struct Subdevice *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RsResource.offset)); +} + +// subdeviceIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_subdeviceIsDuplicate(struct Subdevice *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RsResource.offset), hMemory, pDuplicate); +} + +// subdeviceIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_subdeviceIsPartialUnmapSupported(struct Subdevice *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RsResource.offset)); +} + +// subdeviceMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_subdeviceMapTo(struct Subdevice *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RsResource.offset), pParams); +} + +// subdeviceUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_subdeviceUnmapFrom(struct Subdevice *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RsResource.offset), pParams); +} + +// subdeviceGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_subdeviceGetRefCount(struct Subdevice *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RsResource.offset)); +} + +// subdeviceAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_subdeviceAddAdditionalDependants(struct RsClient *pClient, struct Subdevice *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RsResource.offset), pReference); +} + +// subdeviceGetNotificationListPtr: virtual inherited (notify) base (notify) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_subdeviceGetNotificationListPtr(struct Subdevice *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_Subdevice_Notifier.offset)); +} + +// subdeviceGetNotificationShare: virtual inherited (notify) base (notify) +static struct NotifShare * __nvoc_up_thunk_Notifier_subdeviceGetNotificationShare(struct Subdevice *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_Subdevice_Notifier.offset)); +} + +// subdeviceSetNotificationShare: virtual inherited (notify) base (notify) +static void __nvoc_up_thunk_Notifier_subdeviceSetNotificationShare(struct Subdevice *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_Subdevice_Notifier.offset), pNotifShare); +} + +// subdeviceUnregisterEvent: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_subdeviceUnregisterEvent(struct Subdevice *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_Subdevice_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +} + +// subdeviceGetOrAllocNotifShare: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_subdeviceGetOrAllocNotifShare(struct Subdevice *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_Subdevice_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_Subdevice = { - /*numEntries=*/ 539, + /*numEntries=*/ 537, /*pExportEntries=*/ __nvoc_exported_method_def_Subdevice }; @@ -8373,6 +8379,7 @@ NV_STATUS __nvoc_ctor_Subdevice(Subdevice *pThis, RmHalspecOwner *pRmhalspecowne return status; } +// Vtable initialization 1/3 static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -8381,13 +8388,19 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); + // subdevicePreDestruct -- virtual override (res) base (gpures) pThis->__subdevicePreDestruct__ = &subdevicePreDestruct_IMPL; + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ = &__nvoc_down_thunk_Subdevice_resPreDestruct; + // subdeviceInternalControlForward -- virtual override (gpures) base (gpures) pThis->__subdeviceInternalControlForward__ = &subdeviceInternalControlForward_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresInternalControlForward__ = &__nvoc_down_thunk_Subdevice_gpuresInternalControlForward; + // subdeviceControlFilter -- virtual override (res) base (gpures) pThis->__subdeviceControlFilter__ = &subdeviceControlFilter_IMPL; + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ = &__nvoc_down_thunk_Subdevice_resControlFilter; - // Hal function -- subdeviceCtrlCmdBiosGetInfoV2 + // subdeviceCtrlCmdBiosGetInfoV2 -- halified (2 hals) exported (id=0x20800810) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__subdeviceCtrlCmdBiosGetInfoV2__ = &subdeviceCtrlCmdBiosGetInfoV2_ac1694; @@ -8397,11 +8410,12 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdBiosGetInfoV2__ = &subdeviceCtrlCmdBiosGetInfoV2_92bfc3; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdBiosGetNbsiV2 -- exported (id=0x2080080e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdBiosGetNbsiV2__ = &subdeviceCtrlCmdBiosGetNbsiV2_IMPL; #endif - // Hal function -- subdeviceCtrlCmdBiosGetSKUInfo + // subdeviceCtrlCmdBiosGetSKUInfo -- halified (2 hals) exported (id=0x20800808) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__subdeviceCtrlCmdBiosGetSKUInfo__ = &subdeviceCtrlCmdBiosGetSKUInfo_VF; @@ -8411,7 +8425,7 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdBiosGetSKUInfo__ = &subdeviceCtrlCmdBiosGetSKUInfo_92bfc3; } - // Hal function -- subdeviceCtrlCmdBiosGetPostTime + // subdeviceCtrlCmdBiosGetPostTime -- halified (2 hals) exported (id=0x20800809) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__subdeviceCtrlCmdBiosGetPostTime__ = &subdeviceCtrlCmdBiosGetPostTime_VF; @@ -8421,151 +8435,167 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdBiosGetPostTime__ = &subdeviceCtrlCmdBiosGetPostTime_92bfc3; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdBiosGetUefiSupport -- exported (id=0x2080080b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdBiosGetUefiSupport__ = &subdeviceCtrlCmdBiosGetUefiSupport_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4813u) + // subdeviceCtrlCmdMcGetArchInfo -- exported (id=0x20801701) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50bu) pThis->__subdeviceCtrlCmdMcGetArchInfo__ = &subdeviceCtrlCmdMcGetArchInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdMcGetManufacturer -- exported (id=0x20801703) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdMcGetManufacturer__ = &subdeviceCtrlCmdMcGetManufacturer_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdMcQueryHostclkSlowdownStatus -- exported (id=0x20801708) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdMcQueryHostclkSlowdownStatus__ = &subdeviceCtrlCmdMcQueryHostclkSlowdownStatus_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdMcSetHostclkSlowdownStatus -- exported (id=0x20801709) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdMcSetHostclkSlowdownStatus__ = &subdeviceCtrlCmdMcSetHostclkSlowdownStatus_IMPL; #endif + // subdeviceCtrlCmdMcChangeReplayableFaultOwnership -- exported (id=0x2080170c) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__subdeviceCtrlCmdMcChangeReplayableFaultOwnership__ = &subdeviceCtrlCmdMcChangeReplayableFaultOwnership_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdMcServiceInterrupts -- exported (id=0x20801702) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdMcServiceInterrupts__ = &subdeviceCtrlCmdMcServiceInterrupts_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdMcGetEngineNotificationIntrVectors -- exported (id=0x2080170d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdMcGetEngineNotificationIntrVectors__ = &subdeviceCtrlCmdMcGetEngineNotificationIntrVectors_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdMcGetStaticIntrTable -- exported (id=0x2080170e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdMcGetStaticIntrTable__ = &subdeviceCtrlCmdMcGetStaticIntrTable_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdDmaInvalidateTLB -- exported (id=0x20802502) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdDmaInvalidateTLB__ = &subdeviceCtrlCmdDmaInvalidateTLB_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdDmaGetInfo -- exported (id=0x20802503) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdDmaGetInfo__ = &subdeviceCtrlCmdDmaGetInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4850u) + // subdeviceCtrlCmdBusGetPciInfo -- exported (id=0x20801801) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x518u) pThis->__subdeviceCtrlCmdBusGetPciInfo__ = &subdeviceCtrlCmdBusGetPciInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - pThis->__subdeviceCtrlCmdBusGetInfo__ = &subdeviceCtrlCmdBusGetInfo_IMPL; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200850u) + // subdeviceCtrlCmdBusGetInfoV2 -- exported (id=0x20801823) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x20118u) pThis->__subdeviceCtrlCmdBusGetInfoV2__ = &subdeviceCtrlCmdBusGetInfoV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4850u) + // subdeviceCtrlCmdBusGetPciBarInfo -- exported (id=0x20801803) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x518u) pThis->__subdeviceCtrlCmdBusGetPciBarInfo__ = &subdeviceCtrlCmdBusGetPciBarInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdBusSetPcieSpeed -- exported (id=0x20801805) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdBusSetPcieSpeed__ = &subdeviceCtrlCmdBusSetPcieSpeed_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdBusSetPcieLinkWidth -- exported (id=0x20801804) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdBusSetPcieLinkWidth__ = &subdeviceCtrlCmdBusSetPcieLinkWidth_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__subdeviceCtrlCmdBusSetHwbcUpstreamPcieSpeed__ = &subdeviceCtrlCmdBusSetHwbcUpstreamPcieSpeed_IMPL; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__subdeviceCtrlCmdBusGetHwbcUpstreamPcieSpeed__ = &subdeviceCtrlCmdBusGetHwbcUpstreamPcieSpeed_IMPL; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__subdeviceCtrlCmdBusHWBCGetUpstreamBAR0__ = &subdeviceCtrlCmdBusHWBCGetUpstreamBAR0_IMPL; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdBusServiceGpuMultifunctionState -- exported (id=0x20801812) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdBusServiceGpuMultifunctionState__ = &subdeviceCtrlCmdBusServiceGpuMultifunctionState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdBusGetPexCounters -- exported (id=0x20801813) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdBusGetPexCounters__ = &subdeviceCtrlCmdBusGetPexCounters_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdBusGetBFD -- exported (id=0x20801821) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdBusGetBFD__ = &subdeviceCtrlCmdBusGetBFD_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdBusGetAspmDisableFlags -- exported (id=0x20801822) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdBusGetAspmDisableFlags__ = &subdeviceCtrlCmdBusGetAspmDisableFlags_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdBusControlPublicAspmBits -- exported (id=0x20801824) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdBusControlPublicAspmBits__ = &subdeviceCtrlCmdBusControlPublicAspmBits_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdBusClearPexCounters -- exported (id=0x20801814) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdBusClearPexCounters__ = &subdeviceCtrlCmdBusClearPexCounters_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdBusGetPexUtilCounters -- exported (id=0x20801819) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdBusGetPexUtilCounters__ = &subdeviceCtrlCmdBusGetPexUtilCounters_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdBusClearPexUtilCounters -- exported (id=0x20801820) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdBusClearPexUtilCounters__ = &subdeviceCtrlCmdBusClearPexUtilCounters_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdBusFreezePexCounters -- exported (id=0x20801815) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdBusFreezePexCounters__ = &subdeviceCtrlCmdBusFreezePexCounters_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdBusGetPexLaneCounters -- exported (id=0x20801816) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdBusGetPexLaneCounters__ = &subdeviceCtrlCmdBusGetPexLaneCounters_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdBusGetPcieLtrLatency -- exported (id=0x20801817) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdBusGetPcieLtrLatency__ = &subdeviceCtrlCmdBusGetPcieLtrLatency_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdBusSetPcieLtrLatency -- exported (id=0x20801818) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdBusSetPcieLtrLatency__ = &subdeviceCtrlCmdBusSetPcieLtrLatency_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) + // subdeviceCtrlCmdBusGetNvlinkPeerIdMask -- exported (id=0x20801825) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) pThis->__subdeviceCtrlCmdBusGetNvlinkPeerIdMask__ = &subdeviceCtrlCmdBusGetNvlinkPeerIdMask_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdBusSetEomParameters -- exported (id=0x20801826) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdBusSetEomParameters__ = &subdeviceCtrlCmdBusSetEomParameters_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdBusGetUphyDlnCfgSpace -- exported (id=0x20801827) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdBusGetUphyDlnCfgSpace__ = &subdeviceCtrlCmdBusGetUphyDlnCfgSpace_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdBusGetEomStatus -- exported (id=0x20801828) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdBusGetEomStatus__ = &subdeviceCtrlCmdBusGetEomStatus_IMPL; #endif - // Hal function -- subdeviceCtrlCmdBusGetPcieReqAtomicsCaps + // subdeviceCtrlCmdBusGetPcieReqAtomicsCaps -- halified (2 hals) exported (id=0x20801829) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__subdeviceCtrlCmdBusGetPcieReqAtomicsCaps__ = &subdeviceCtrlCmdBusGetPcieReqAtomicsCaps_VF; @@ -8575,289 +8605,367 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdBusGetPcieReqAtomicsCaps__ = &subdeviceCtrlCmdBusGetPcieReqAtomicsCaps_92bfc3; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x6210u) - pThis->__subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics__ = &subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics_IMPL; -#endif + // subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics -- halified (2 hals) exported (id=0x2080182a) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics__ = &subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics_VF; + } + else + { + pThis->__subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics__ = &subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics_92bfc3; + } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - pThis->__subdeviceCtrlCmdBusGetC2CInfo__ = &subdeviceCtrlCmdBusGetC2CInfo_IMPL; -#endif + // subdeviceCtrlCmdBusGetC2CInfo -- halified (2 hals) exported (id=0x2080182b) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__subdeviceCtrlCmdBusGetC2CInfo__ = &subdeviceCtrlCmdBusGetC2CInfo_VF; + } + else + { + pThis->__subdeviceCtrlCmdBusGetC2CInfo__ = &subdeviceCtrlCmdBusGetC2CInfo_92bfc3; + } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10000u) + // subdeviceCtrlCmdBusSysmemAccess -- exported (id=0x2080182c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1000u) pThis->__subdeviceCtrlCmdBusSysmemAccess__ = &subdeviceCtrlCmdBusSysmemAccess_IMPL; #endif - // Hal function -- subdeviceCtrlCmdBusSetP2pMapping + // subdeviceCtrlCmdBusSetP2pMapping -- halified (2 hals) exported (id=0x2080182e) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__subdeviceCtrlCmdBusSetP2pMapping__ = &subdeviceCtrlCmdBusSetP2pMapping_VGPUSTUB; + pThis->__subdeviceCtrlCmdBusSetP2pMapping__ = &subdeviceCtrlCmdBusSetP2pMapping_VF; } else { pThis->__subdeviceCtrlCmdBusSetP2pMapping__ = &subdeviceCtrlCmdBusSetP2pMapping_5baef9; } - // Hal function -- subdeviceCtrlCmdBusUnsetP2pMapping + // subdeviceCtrlCmdBusUnsetP2pMapping -- halified (2 hals) exported (id=0x2080182f) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__subdeviceCtrlCmdBusUnsetP2pMapping__ = &subdeviceCtrlCmdBusUnsetP2pMapping_VGPUSTUB; + pThis->__subdeviceCtrlCmdBusUnsetP2pMapping__ = &subdeviceCtrlCmdBusUnsetP2pMapping_VF; } else { pThis->__subdeviceCtrlCmdBusUnsetP2pMapping__ = &subdeviceCtrlCmdBusUnsetP2pMapping_5baef9; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdGetNvlinkCountersV2 -- exported (id=0x20803050) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + pThis->__subdeviceCtrlCmdGetNvlinkCountersV2__ = &subdeviceCtrlCmdGetNvlinkCountersV2_IMPL; +#endif + + // subdeviceCtrlCmdClearNvlinkCountersV2 -- exported (id=0x20803051) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + pThis->__subdeviceCtrlCmdClearNvlinkCountersV2__ = &subdeviceCtrlCmdClearNvlinkCountersV2_IMPL; +#endif + + // subdeviceCtrlCmdGetNvlinkCounters -- exported (id=0x20803004) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdGetNvlinkCounters__ = &subdeviceCtrlCmdGetNvlinkCounters_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdClearNvlinkCounters -- exported (id=0x20803005) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdClearNvlinkCounters__ = &subdeviceCtrlCmdClearNvlinkCounters_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2850u) - pThis->__subdeviceCtrlCmdBusGetNvlinkCaps__ = &subdeviceCtrlCmdBusGetNvlinkCaps_IMPL; -#endif + // subdeviceCtrlCmdBusGetNvlinkCaps -- halified (2 hals) exported (id=0x20803001) + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__subdeviceCtrlCmdBusGetNvlinkCaps__ = &subdeviceCtrlCmdBusGetNvlinkCaps_VF; + } + else + { + pThis->__subdeviceCtrlCmdBusGetNvlinkCaps__ = &subdeviceCtrlCmdBusGetNvlinkCaps_IMPL; + } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) + // subdeviceCtrlCmdBusGetNvlinkStatus -- exported (id=0x20803002) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) pThis->__subdeviceCtrlCmdBusGetNvlinkStatus__ = &subdeviceCtrlCmdBusGetNvlinkStatus_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdBusGetNvlinkErrInfo -- exported (id=0x20803003) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdBusGetNvlinkErrInfo__ = &subdeviceCtrlCmdBusGetNvlinkErrInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdNvlinGetLinkFomValues -- exported (id=0x20803011) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdNvlinGetLinkFomValues__ = &subdeviceCtrlCmdNvlinGetLinkFomValues_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdNvlinkGetNvlinkEccErrors -- exported (id=0x20803014) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdNvlinkGetNvlinkEccErrors__ = &subdeviceCtrlCmdNvlinkGetNvlinkEccErrors_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdNvlinkGetLinkFatalErrorCounts -- exported (id=0x20803009) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdNvlinkGetLinkFatalErrorCounts__ = &subdeviceCtrlCmdNvlinkGetLinkFatalErrorCounts_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkSetupEom -- exported (id=0x2080300c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkSetupEom__ = &subdeviceCtrlCmdNvlinkSetupEom_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdNvlinkGetPowerState -- exported (id=0x2080300e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdNvlinkGetPowerState__ = &subdeviceCtrlCmdNvlinkGetPowerState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdNvlinkReadTpCounters -- exported (id=0x20803015) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdNvlinkReadTpCounters__ = &subdeviceCtrlCmdNvlinkReadTpCounters_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdNvlinkGetLpCounters -- exported (id=0x20803018) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdNvlinkGetLpCounters__ = &subdeviceCtrlCmdNvlinkGetLpCounters_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + // subdeviceCtrlCmdNvlinkEnableNvlinkPeer -- exported (id=0x20803017) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) pThis->__subdeviceCtrlCmdNvlinkEnableNvlinkPeer__ = &subdeviceCtrlCmdNvlinkEnableNvlinkPeer_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + // subdeviceCtrlCmdNvlinkCoreCallback -- exported (id=0x20803019) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) pThis->__subdeviceCtrlCmdNvlinkCoreCallback__ = &subdeviceCtrlCmdNvlinkCoreCallback_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkGetAliEnabled -- exported (id=0x2080301a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkGetAliEnabled__ = &subdeviceCtrlCmdNvlinkGetAliEnabled_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkSetLoopbackMode -- exported (id=0x20803023) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkSetLoopbackMode__ = &subdeviceCtrlCmdNvlinkSetLoopbackMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + // subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid -- exported (id=0x2080301b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) pThis->__subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid__ = &subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + // subdeviceCtrlCmdNvlinkUpdateHshubMux -- exported (id=0x2080301c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) pThis->__subdeviceCtrlCmdNvlinkUpdateHshubMux__ = &subdeviceCtrlCmdNvlinkUpdateHshubMux_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + // subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer -- exported (id=0x2080301d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) pThis->__subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer__ = &subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + // subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer -- exported (id=0x2080301e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) pThis->__subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer__ = &subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + // subdeviceCtrlCmdNvlinkRemoveNvlinkMapping -- exported (id=0x2080301f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) pThis->__subdeviceCtrlCmdNvlinkRemoveNvlinkMapping__ = &subdeviceCtrlCmdNvlinkRemoveNvlinkMapping_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + // subdeviceCtrlCmdNvlinkSaveRestoreHshubState -- exported (id=0x20803020) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) pThis->__subdeviceCtrlCmdNvlinkSaveRestoreHshubState__ = &subdeviceCtrlCmdNvlinkSaveRestoreHshubState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + // subdeviceCtrlCmdNvlinkProgramBufferready -- exported (id=0x20803021) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) pThis->__subdeviceCtrlCmdNvlinkProgramBufferready__ = &subdeviceCtrlCmdNvlinkProgramBufferready_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + // subdeviceCtrlCmdNvlinkUpdateCurrentConfig -- exported (id=0x20803022) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) pThis->__subdeviceCtrlCmdNvlinkUpdateCurrentConfig__ = &subdeviceCtrlCmdNvlinkUpdateCurrentConfig_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + // subdeviceCtrlCmdNvlinkUpdatePeerLinkMask -- exported (id=0x20803024) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) pThis->__subdeviceCtrlCmdNvlinkUpdatePeerLinkMask__ = &subdeviceCtrlCmdNvlinkUpdatePeerLinkMask_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + // subdeviceCtrlCmdNvlinkUpdateLinkConnection -- exported (id=0x20803025) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) pThis->__subdeviceCtrlCmdNvlinkUpdateLinkConnection__ = &subdeviceCtrlCmdNvlinkUpdateLinkConnection_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + // subdeviceCtrlCmdNvlinkEnableLinksPostTopology -- exported (id=0x20803026) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) pThis->__subdeviceCtrlCmdNvlinkEnableLinksPostTopology__ = &subdeviceCtrlCmdNvlinkEnableLinksPostTopology_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkPreLinkTrainAli -- exported (id=0x20803027) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkPreLinkTrainAli__ = &subdeviceCtrlCmdNvlinkPreLinkTrainAli_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkGetRefreshCounters -- exported (id=0x20803028) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkGetRefreshCounters__ = &subdeviceCtrlCmdNvlinkGetRefreshCounters_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkClearRefreshCounters -- exported (id=0x20803029) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkClearRefreshCounters__ = &subdeviceCtrlCmdNvlinkClearRefreshCounters_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100201u) + // subdeviceCtrlCmdNvlinkGetLinkMaskPostRxDet -- exported (id=0x2080302a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10041u) pThis->__subdeviceCtrlCmdNvlinkGetLinkMaskPostRxDet__ = &subdeviceCtrlCmdNvlinkGetLinkMaskPostRxDet_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkLinkTrainAli -- exported (id=0x2080302b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkLinkTrainAli__ = &subdeviceCtrlCmdNvlinkLinkTrainAli_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkGetNvlinkDeviceInfo -- exported (id=0x2080302c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkGetNvlinkDeviceInfo__ = &subdeviceCtrlCmdNvlinkGetNvlinkDeviceInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkGetIoctrlDeviceInfo -- exported (id=0x2080302d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkGetIoctrlDeviceInfo__ = &subdeviceCtrlCmdNvlinkGetIoctrlDeviceInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkProgramLinkSpeed -- exported (id=0x2080302e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkProgramLinkSpeed__ = &subdeviceCtrlCmdNvlinkProgramLinkSpeed_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + // subdeviceCtrlCmdNvlinkAreLinksTrained -- exported (id=0x2080302f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) pThis->__subdeviceCtrlCmdNvlinkAreLinksTrained__ = &subdeviceCtrlCmdNvlinkAreLinksTrained_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkResetLinks -- exported (id=0x20803030) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkResetLinks__ = &subdeviceCtrlCmdNvlinkResetLinks_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkDisableDlInterrupts -- exported (id=0x20803031) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkDisableDlInterrupts__ = &subdeviceCtrlCmdNvlinkDisableDlInterrupts_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + // subdeviceCtrlCmdNvlinkGetLinkAndClockInfo -- exported (id=0x20803032) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) pThis->__subdeviceCtrlCmdNvlinkGetLinkAndClockInfo__ = &subdeviceCtrlCmdNvlinkGetLinkAndClockInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkSetupNvlinkSysmem -- exported (id=0x20803033) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkSetupNvlinkSysmem__ = &subdeviceCtrlCmdNvlinkSetupNvlinkSysmem_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkProcessForcedConfigs -- exported (id=0x20803034) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkProcessForcedConfigs__ = &subdeviceCtrlCmdNvlinkProcessForcedConfigs_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkSyncLaneShutdownProps -- exported (id=0x20803035) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkSyncLaneShutdownProps__ = &subdeviceCtrlCmdNvlinkSyncLaneShutdownProps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkEnableSysmemNvlinkAts -- exported (id=0x20803036) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkEnableSysmemNvlinkAts__ = &subdeviceCtrlCmdNvlinkEnableSysmemNvlinkAts_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x201u) + // subdeviceCtrlCmdNvlinkHshubGetSysmemNvlinkMask -- exported (id=0x20803037) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) pThis->__subdeviceCtrlCmdNvlinkHshubGetSysmemNvlinkMask__ = &subdeviceCtrlCmdNvlinkHshubGetSysmemNvlinkMask_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkGetSetNvswitchFlaAddr -- exported (id=0x20803038) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkGetSetNvswitchFlaAddr__ = &subdeviceCtrlCmdNvlinkGetSetNvswitchFlaAddr_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100201u) + // subdeviceCtrlCmdNvlinkSyncLinkMasksAndVbiosInfo -- exported (id=0x20803039) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10041u) pThis->__subdeviceCtrlCmdNvlinkSyncLinkMasksAndVbiosInfo__ = &subdeviceCtrlCmdNvlinkSyncLinkMasksAndVbiosInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkEnableLinks -- exported (id=0x2080303a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkEnableLinks__ = &subdeviceCtrlCmdNvlinkEnableLinks_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkProcessInitDisabledLinks -- exported (id=0x2080303b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkProcessInitDisabledLinks__ = &subdeviceCtrlCmdNvlinkProcessInitDisabledLinks_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1240u) + // subdeviceCtrlCmdNvlinkInbandSendData -- exported (id=0x20803040) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10250u) pThis->__subdeviceCtrlCmdNvlinkInbandSendData__ = &subdeviceCtrlCmdNvlinkInbandSendData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkPostFaultUp -- exported (id=0x20803043) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkPostFaultUp__ = &subdeviceCtrlCmdNvlinkPostFaultUp_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdNvlinkEomControl -- exported (id=0x2080303c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkEomControl__ = &subdeviceCtrlCmdNvlinkEomControl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdNvlinkSetL1Threshold -- exported (id=0x2080303e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdNvlinkSetL1Threshold__ = &subdeviceCtrlCmdNvlinkSetL1Threshold_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdNvlinkDirectConnectCheck -- exported (id=0x20803042) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdNvlinkDirectConnectCheck__ = &subdeviceCtrlCmdNvlinkDirectConnectCheck_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdNvlinkGetL1Threshold -- exported (id=0x2080303f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdNvlinkGetL1Threshold__ = &subdeviceCtrlCmdNvlinkGetL1Threshold_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdIsNvlinkReducedConfig -- exported (id=0x20803046) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdIsNvlinkReducedConfig__ = &subdeviceCtrlCmdIsNvlinkReducedConfig_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdNvlinkGetPortEvents -- exported (id=0x20803044) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdNvlinkGetPortEvents__ = &subdeviceCtrlCmdNvlinkGetPortEvents_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdI2cReadBuffer -- exported (id=0x20800601) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdI2cReadBuffer__ = &subdeviceCtrlCmdI2cReadBuffer_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdI2cWriteBuffer -- exported (id=0x20800602) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdI2cWriteBuffer__ = &subdeviceCtrlCmdI2cWriteBuffer_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdI2cReadReg -- exported (id=0x20800603) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdI2cReadReg__ = &subdeviceCtrlCmdI2cReadReg_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdI2cWriteReg -- exported (id=0x20800604) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdI2cWriteReg__ = &subdeviceCtrlCmdI2cWriteReg_IMPL; #endif - // Hal function -- subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamples - if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ - { - pThis->__subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamples__ = &subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamples_VF; - } - else - { - pThis->__subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamples__ = &subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamples_5baef9; - } - - // Hal function -- subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2 + // subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2 -- halified (2 hals) exported (id=0x20802096) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2__ = &subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2_VF; @@ -8867,14 +8975,15 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2__ = &subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2_5baef9; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x212u) + // subdeviceCtrlCmdPerfRatedTdpGetControl -- exported (id=0x2080206e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) pThis->__subdeviceCtrlCmdPerfRatedTdpGetControl__ = &subdeviceCtrlCmdPerfRatedTdpGetControl_IMPL; #endif - // Hal function -- subdeviceCtrlCmdPerfRatedTdpSetControl + // subdeviceCtrlCmdPerfRatedTdpSetControl -- halified (singleton optimized) exported (id=0x2080206f) pThis->__subdeviceCtrlCmdPerfRatedTdpSetControl__ = &subdeviceCtrlCmdPerfRatedTdpSetControl_KERNEL; - // Hal function -- subdeviceCtrlCmdPerfReservePerfmonHw + // subdeviceCtrlCmdPerfReservePerfmonHw -- halified (2 hals) exported (id=0x20802093) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__subdeviceCtrlCmdPerfReservePerfmonHw__ = &subdeviceCtrlCmdPerfReservePerfmonHw_46f6a7; @@ -8884,13 +8993,13 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdPerfReservePerfmonHw__ = &subdeviceCtrlCmdPerfReservePerfmonHw_KERNEL; } - // Hal function -- subdeviceCtrlCmdPerfSetAuxPowerState + // subdeviceCtrlCmdPerfSetAuxPowerState -- halified (singleton optimized) exported (id=0x20802092) pThis->__subdeviceCtrlCmdPerfSetAuxPowerState__ = &subdeviceCtrlCmdPerfSetAuxPowerState_KERNEL; - // Hal function -- subdeviceCtrlCmdPerfSetPowerstate + // subdeviceCtrlCmdPerfSetPowerstate -- halified (singleton optimized) exported (id=0x2080205b) pThis->__subdeviceCtrlCmdPerfSetPowerstate__ = &subdeviceCtrlCmdPerfSetPowerstate_KERNEL; - // Hal function -- subdeviceCtrlCmdPerfGetLevelInfo_V2 + // subdeviceCtrlCmdPerfGetLevelInfo_V2 -- halified (2 hals) exported (id=0x2080200b) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__subdeviceCtrlCmdPerfGetLevelInfo_V2__ = &subdeviceCtrlCmdPerfGetLevelInfo_V2_VF; @@ -8900,7 +9009,7 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdPerfGetLevelInfo_V2__ = &subdeviceCtrlCmdPerfGetLevelInfo_V2_92bfc3; } - // Hal function -- subdeviceCtrlCmdPerfGetCurrentPstate + // subdeviceCtrlCmdPerfGetCurrentPstate -- halified (2 hals) exported (id=0x20802068) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__subdeviceCtrlCmdPerfGetCurrentPstate__ = &subdeviceCtrlCmdPerfGetCurrentPstate_VF; @@ -8910,7 +9019,7 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdPerfGetCurrentPstate__ = &subdeviceCtrlCmdPerfGetCurrentPstate_92bfc3; } - // Hal function -- subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample + // subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample -- halified (2 hals) exported (id=0x20802087) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample__ = &subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample_VF; @@ -8920,7 +9029,7 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample__ = &subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample_92bfc3; } - // Hal function -- subdeviceCtrlCmdPerfGetPowerstate + // subdeviceCtrlCmdPerfGetPowerstate -- halified (2 hals) exported (id=0x2080205a) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__subdeviceCtrlCmdPerfGetPowerstate__ = &subdeviceCtrlCmdPerfGetPowerstate_VF; @@ -8930,7 +9039,7 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdPerfGetPowerstate__ = &subdeviceCtrlCmdPerfGetPowerstate_92bfc3; } - // Hal function -- subdeviceCtrlCmdPerfNotifyVideoevent + // subdeviceCtrlCmdPerfNotifyVideoevent -- halified (2 hals) exported (id=0x2080205d) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__subdeviceCtrlCmdPerfNotifyVideoevent__ = &subdeviceCtrlCmdPerfNotifyVideoevent_ac1694; @@ -8940,240 +9049,315 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdPerfNotifyVideoevent__ = &subdeviceCtrlCmdPerfNotifyVideoevent_92bfc3; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2850u) + // subdeviceCtrlCmdKPerfBoost -- exported (id=0x2080200a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x318u) pThis->__subdeviceCtrlCmdKPerfBoost__ = &subdeviceCtrlCmdKPerfBoost_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) + // subdeviceCtrlCmdFbGetFBRegionInfo -- exported (id=0x20801320) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) pThis->__subdeviceCtrlCmdFbGetFBRegionInfo__ = &subdeviceCtrlCmdFbGetFBRegionInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdFbGetBar1Offset -- exported (id=0x20801310) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdFbGetBar1Offset__ = &subdeviceCtrlCmdFbGetBar1Offset_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // subdeviceCtrlCmdFbIsKind -- exported (id=0x20801313) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__subdeviceCtrlCmdFbIsKind__ = &subdeviceCtrlCmdFbIsKind_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) + // subdeviceCtrlCmdFbGetMemAlignment -- exported (id=0x20801342) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) pThis->__subdeviceCtrlCmdFbGetMemAlignment__ = &subdeviceCtrlCmdFbGetMemAlignment_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) + // subdeviceCtrlCmdFbGetHeapReservationSize -- exported (id=0x20800a5b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) pThis->__subdeviceCtrlCmdFbGetHeapReservationSize__ = &subdeviceCtrlCmdFbGetHeapReservationSize_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) + // subdeviceCtrlCmdInternalMemmgrGetVgpuHostRmReservedFb -- exported (id=0x20800ac5) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) pThis->__subdeviceCtrlCmdInternalMemmgrGetVgpuHostRmReservedFb__ = &subdeviceCtrlCmdInternalMemmgrGetVgpuHostRmReservedFb_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4811u) + // subdeviceCtrlCmdGbGetSemaphoreSurfaceLayout -- exported (id=0x20801352) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) pThis->__subdeviceCtrlCmdGbGetSemaphoreSurfaceLayout__ = &subdeviceCtrlCmdGbGetSemaphoreSurfaceLayout_IMPL; #endif - // Hal function -- subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp + // subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp -- halified (singleton optimized) exported (id=0x20800afa) body pThis->__subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp__ = &subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp_46f6a7; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdFbGetInfoV2 -- exported (id=0x20801303) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdFbGetInfoV2__ = &subdeviceCtrlCmdFbGetInfoV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdFbGetCarveoutAddressInfo -- exported (id=0x2080130b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdFbGetCarveoutAddressInfo__ = &subdeviceCtrlCmdFbGetCarveoutAddressInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdFbGetCalibrationLockFailed -- exported (id=0x2080130c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdFbGetCalibrationLockFailed__ = &subdeviceCtrlCmdFbGetCalibrationLockFailed_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdFbFlushGpuCache -- exported (id=0x2080130e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdFbFlushGpuCache__ = &subdeviceCtrlCmdFbFlushGpuCache_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdFbSetGpuCacheAllocPolicy -- exported (id=0x2080130f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdFbSetGpuCacheAllocPolicy__ = &subdeviceCtrlCmdFbSetGpuCacheAllocPolicy_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdFbGetGpuCacheAllocPolicy -- exported (id=0x20801312) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdFbGetGpuCacheAllocPolicy__ = &subdeviceCtrlCmdFbGetGpuCacheAllocPolicy_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2 -- exported (id=0x20801318) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2__ = &subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2 -- exported (id=0x20801319) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2__ = &subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400a10u) + // subdeviceCtrlCmdFbGetGpuCacheInfo -- exported (id=0x20801315) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40148u) pThis->__subdeviceCtrlCmdFbGetGpuCacheInfo__ = &subdeviceCtrlCmdFbGetGpuCacheInfo_IMPL; #endif + // subdeviceCtrlCmdFbGetCliManagedOfflinedPages -- exported (id=0x2080133c) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__subdeviceCtrlCmdFbGetCliManagedOfflinedPages__ = &subdeviceCtrlCmdFbGetCliManagedOfflinedPages_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) - pThis->__subdeviceCtrlCmdFbGetOfflinedPages__ = &subdeviceCtrlCmdFbGetOfflinedPages_IMPL; -#endif + // subdeviceCtrlCmdFbGetOfflinedPages -- halified (2 hals) exported (id=0x20801322) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__subdeviceCtrlCmdFbGetOfflinedPages__ = &subdeviceCtrlCmdFbGetOfflinedPages_VF; + } + else + { + pThis->__subdeviceCtrlCmdFbGetOfflinedPages__ = &subdeviceCtrlCmdFbGetOfflinedPages_92bfc3; + } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdFbSetupVprRegion -- exported (id=0x2080133b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdFbSetupVprRegion__ = &subdeviceCtrlCmdFbSetupVprRegion_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2a50u) - pThis->__subdeviceCtrlCmdFbGetLTCInfoForFBP__ = &subdeviceCtrlCmdFbGetLTCInfoForFBP_IMPL; -#endif + // subdeviceCtrlCmdFbGetLTCInfoForFBP -- halified (2 hals) exported (id=0x20801328) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__subdeviceCtrlCmdFbGetLTCInfoForFBP__ = &subdeviceCtrlCmdFbGetLTCInfoForFBP_VF; + } + else + { + pThis->__subdeviceCtrlCmdFbGetLTCInfoForFBP__ = &subdeviceCtrlCmdFbGetLTCInfoForFBP_92bfc3; + } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdFbGetCompBitCopyConstructInfo -- exported (id=0x2080133d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdFbGetCompBitCopyConstructInfo__ = &subdeviceCtrlCmdFbGetCompBitCopyConstructInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdFbPatchPbrForMining -- exported (id=0x20801341) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdFbPatchPbrForMining__ = &subdeviceCtrlCmdFbPatchPbrForMining_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdFbGetRemappedRows -- exported (id=0x20801344) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdFbGetRemappedRows__ = &subdeviceCtrlCmdFbGetRemappedRows_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // subdeviceCtrlCmdFbGetFsInfo -- exported (id=0x20801346) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__subdeviceCtrlCmdFbGetFsInfo__ = &subdeviceCtrlCmdFbGetFsInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdFbGetRowRemapperHistogram -- exported (id=0x20801347) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdFbGetRowRemapperHistogram__ = &subdeviceCtrlCmdFbGetRowRemapperHistogram_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - pThis->__subdeviceCtrlCmdFbGetDynamicOfflinedPages__ = &subdeviceCtrlCmdFbGetDynamicOfflinedPages_IMPL; -#endif + // subdeviceCtrlCmdFbGetDynamicOfflinedPages -- halified (2 hals) exported (id=0x20801348) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__subdeviceCtrlCmdFbGetDynamicOfflinedPages__ = &subdeviceCtrlCmdFbGetDynamicOfflinedPages_VF; + } + else + { + pThis->__subdeviceCtrlCmdFbGetDynamicOfflinedPages__ = &subdeviceCtrlCmdFbGetDynamicOfflinedPages_92bfc3; + } + // subdeviceCtrlCmdFbUpdateNumaStatus -- exported (id=0x20801350) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__subdeviceCtrlCmdFbUpdateNumaStatus__ = &subdeviceCtrlCmdFbUpdateNumaStatus_IMPL; #endif + // subdeviceCtrlCmdFbGetNumaInfo -- exported (id=0x20801351) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__subdeviceCtrlCmdFbGetNumaInfo__ = &subdeviceCtrlCmdFbGetNumaInfo_IMPL; #endif - // Hal function -- subdeviceCtrlCmdMemSysGetStaticConfig + // subdeviceCtrlCmdMemSysGetStaticConfig -- halified (2 hals) exported (id=0x20800a1c) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__subdeviceCtrlCmdMemSysGetStaticConfig__ = &subdeviceCtrlCmdMemSysGetStaticConfig_VGPUSTUB; + pThis->__subdeviceCtrlCmdMemSysGetStaticConfig__ = &subdeviceCtrlCmdMemSysGetStaticConfig_VF; } else { pThis->__subdeviceCtrlCmdMemSysGetStaticConfig__ = &subdeviceCtrlCmdMemSysGetStaticConfig_92bfc3; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdMemSysSetPartitionableMem -- exported (id=0x20800a51) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdMemSysSetPartitionableMem__ = &subdeviceCtrlCmdMemSysSetPartitionableMem_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdKMemSysGetMIGMemoryConfig -- inline exported (id=0x20800a67) body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdKMemSysGetMIGMemoryConfig__ = &subdeviceCtrlCmdKMemSysGetMIGMemoryConfig_133e5e; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdFbSetZbcReferenced -- exported (id=0x20800a69) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdFbSetZbcReferenced__ = &subdeviceCtrlCmdFbSetZbcReferenced_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdMemSysL2InvalidateEvict -- exported (id=0x20800a6c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdMemSysL2InvalidateEvict__ = &subdeviceCtrlCmdMemSysL2InvalidateEvict_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdMemSysFlushL2AllRamsAndCaches -- exported (id=0x20800a6d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdMemSysFlushL2AllRamsAndCaches__ = &subdeviceCtrlCmdMemSysFlushL2AllRamsAndCaches_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdMemSysDisableNvlinkPeers -- exported (id=0x20800a6e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdMemSysDisableNvlinkPeers__ = &subdeviceCtrlCmdMemSysDisableNvlinkPeers_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdMemSysProgramRawCompressionMode -- exported (id=0x20800a6f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdMemSysProgramRawCompressionMode__ = &subdeviceCtrlCmdMemSysProgramRawCompressionMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdMemSysGetMIGMemoryPartitionTable -- exported (id=0x20800a6b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdMemSysGetMIGMemoryPartitionTable__ = &subdeviceCtrlCmdMemSysGetMIGMemoryPartitionTable_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdFbGetCtagsForCbcEviction -- exported (id=0x20801338) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdFbGetCtagsForCbcEviction__ = &subdeviceCtrlCmdFbGetCtagsForCbcEviction_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdFbCBCOp -- exported (id=0x20801337) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdFbCBCOp__ = &subdeviceCtrlCmdFbCBCOp_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdFbSetRrd -- exported (id=0x2080133e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdFbSetRrd__ = &subdeviceCtrlCmdFbSetRrd_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdFbSetReadLimit -- exported (id=0x2080133f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdFbSetReadLimit__ = &subdeviceCtrlCmdFbSetReadLimit_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdFbSetWriteLimit -- exported (id=0x20801340) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdFbSetWriteLimit__ = &subdeviceCtrlCmdFbSetWriteLimit_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // subdeviceCtrlCmdGmmuCommitTlbInvalidate -- exported (id=0x20801353) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100008u) + pThis->__subdeviceCtrlCmdGmmuCommitTlbInvalidate__ = &subdeviceCtrlCmdGmmuCommitTlbInvalidate_IMPL; +#endif + + // subdeviceCtrlCmdSetGpfifo -- exported (id=0x20801102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__subdeviceCtrlCmdSetGpfifo__ = &subdeviceCtrlCmdSetGpfifo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2204u) + // subdeviceCtrlCmdSetOperationalProperties -- exported (id=0x20801104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) pThis->__subdeviceCtrlCmdSetOperationalProperties__ = &subdeviceCtrlCmdSetOperationalProperties_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // subdeviceCtrlCmdFifoBindEngines -- exported (id=0x20801103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__subdeviceCtrlCmdFifoBindEngines__ = &subdeviceCtrlCmdFifoBindEngines_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdGetPhysicalChannelCount -- exported (id=0x20801108) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdGetPhysicalChannelCount__ = &subdeviceCtrlCmdGetPhysicalChannelCount_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200010u) + // subdeviceCtrlCmdFifoGetInfo -- exported (id=0x20801109) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x20008u) pThis->__subdeviceCtrlCmdFifoGetInfo__ = &subdeviceCtrlCmdFifoGetInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) + // subdeviceCtrlCmdFifoDisableChannels -- exported (id=0x2080110b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) pThis->__subdeviceCtrlCmdFifoDisableChannels__ = &subdeviceCtrlCmdFifoDisableChannels_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdFifoDisableChannelsForKeyRotation -- exported (id=0x2080111a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdFifoDisableChannelsForKeyRotation__ = &subdeviceCtrlCmdFifoDisableChannelsForKeyRotation_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) + // subdeviceCtrlCmdFifoDisableUsermodeChannels -- exported (id=0x20801117) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) pThis->__subdeviceCtrlCmdFifoDisableUsermodeChannels__ = &subdeviceCtrlCmdFifoDisableUsermodeChannels_IMPL; #endif + // subdeviceCtrlCmdFifoGetChannelMemInfo -- exported (id=0x2080110c) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__subdeviceCtrlCmdFifoGetChannelMemInfo__ = &subdeviceCtrlCmdFifoGetChannelMemInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdFifoGetUserdLocation -- exported (id=0x2080110d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdFifoGetUserdLocation__ = &subdeviceCtrlCmdFifoGetUserdLocation_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdFifoObjschedSwGetLog -- exported (id=0x2080110e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdFifoObjschedSwGetLog__ = &subdeviceCtrlCmdFifoObjschedSwGetLog_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdFifoObjschedGetState -- exported (id=0x20801120) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdFifoObjschedGetState__ = &subdeviceCtrlCmdFifoObjschedGetState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdFifoObjschedSetState -- exported (id=0x20801121) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdFifoObjschedSetState__ = &subdeviceCtrlCmdFifoObjschedSetState_IMPL; #endif - // Hal function -- subdeviceCtrlCmdFifoObjschedGetCaps + // subdeviceCtrlCmdFifoObjschedGetCaps -- halified (2 hals) exported (id=0x20801122) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__subdeviceCtrlCmdFifoObjschedGetCaps__ = &subdeviceCtrlCmdFifoObjschedGetCaps_ac1694; @@ -9183,428 +9367,547 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdFifoObjschedGetCaps__ = &subdeviceCtrlCmdFifoObjschedGetCaps_5baef9; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2200u) - pThis->__subdeviceCtrlCmdFifoGetDeviceInfoTable__ = &subdeviceCtrlCmdFifoGetDeviceInfoTable_IMPL; -#endif + // subdeviceCtrlCmdFifoGetDeviceInfoTable -- halified (2 hals) exported (id=0x20801112) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__subdeviceCtrlCmdFifoGetDeviceInfoTable__ = &subdeviceCtrlCmdFifoGetDeviceInfoTable_VF; + } + else + { + pThis->__subdeviceCtrlCmdFifoGetDeviceInfoTable__ = &subdeviceCtrlCmdFifoGetDeviceInfoTable_92bfc3; + } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // subdeviceCtrlCmdFifoSetupVfZombieSubctxPdb -- exported (id=0x20801118) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__subdeviceCtrlCmdFifoSetupVfZombieSubctxPdb__ = &subdeviceCtrlCmdFifoSetupVfZombieSubctxPdb_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2204u) + // subdeviceCtrlCmdFifoClearFaultedBit -- exported (id=0x20801113) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) pThis->__subdeviceCtrlCmdFifoClearFaultedBit__ = &subdeviceCtrlCmdFifoClearFaultedBit_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2310u) + // subdeviceCtrlCmdFifoRunlistSetSchedPolicy -- exported (id=0x20801115) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x268u) pThis->__subdeviceCtrlCmdFifoRunlistSetSchedPolicy__ = &subdeviceCtrlCmdFifoRunlistSetSchedPolicy_IMPL; #endif + // subdeviceCtrlCmdFifoUpdateChannelInfo -- exported (id=0x20801116) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__subdeviceCtrlCmdFifoUpdateChannelInfo__ = &subdeviceCtrlCmdFifoUpdateChannelInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) + // subdeviceCtrlCmdInternalFifoPromoteRunlistBuffers -- exported (id=0x20800a53) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) pThis->__subdeviceCtrlCmdInternalFifoPromoteRunlistBuffers__ = &subdeviceCtrlCmdInternalFifoPromoteRunlistBuffers_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2e50u) + // subdeviceCtrlCmdInternalFifoGetNumChannels -- exported (id=0x20800a61) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x3d8u) pThis->__subdeviceCtrlCmdInternalFifoGetNumChannels__ = &subdeviceCtrlCmdInternalFifoGetNumChannels_IMPL; #endif + // subdeviceCtrlCmdFifoGetAllocatedChannels -- exported (id=0x20801119) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__subdeviceCtrlCmdFifoGetAllocatedChannels__ = &subdeviceCtrlCmdFifoGetAllocatedChannels_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2610u) + // subdeviceCtrlCmdInternalFifoGetNumSecureChannels -- exported (id=0x20800ad8) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c8u) pThis->__subdeviceCtrlCmdInternalFifoGetNumSecureChannels__ = &subdeviceCtrlCmdInternalFifoGetNumSecureChannels_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdInternalFifoGetLogicalUprocId -- exported (id=0x20800aef) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c8u) + pThis->__subdeviceCtrlCmdInternalFifoGetLogicalUprocId__ = &subdeviceCtrlCmdInternalFifoGetLogicalUprocId_IMPL; +#endif + + // subdeviceCtrlCmdInternalFifoToggleActiveChannelScheduling -- exported (id=0x20800ac3) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + pThis->__subdeviceCtrlCmdInternalFifoToggleActiveChannelScheduling__ = &subdeviceCtrlCmdInternalFifoToggleActiveChannelScheduling_IMPL; +#endif + + // subdeviceCtrlCmdKGrGetInfo -- exported (id=0x20801201) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdKGrGetInfo__ = &subdeviceCtrlCmdKGrGetInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdKGrGetInfoV2 -- exported (id=0x20801228) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdKGrGetInfoV2__ = &subdeviceCtrlCmdKGrGetInfoV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x812u) + // subdeviceCtrlCmdKGrGetCapsV2 -- exported (id=0x20801227) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) pThis->__subdeviceCtrlCmdKGrGetCapsV2__ = &subdeviceCtrlCmdKGrGetCapsV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // subdeviceCtrlCmdKGrGetCtxswModes -- exported (id=0x20801235) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__subdeviceCtrlCmdKGrGetCtxswModes__ = &subdeviceCtrlCmdKGrGetCtxswModes_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // subdeviceCtrlCmdKGrCtxswZcullMode -- exported (id=0x20801205) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__subdeviceCtrlCmdKGrCtxswZcullMode__ = &subdeviceCtrlCmdKGrCtxswZcullMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x802a10u) + // subdeviceCtrlCmdKGrCtxswZcullBind -- exported (id=0x20801208) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80348u) pThis->__subdeviceCtrlCmdKGrCtxswZcullBind__ = &subdeviceCtrlCmdKGrCtxswZcullBind_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // subdeviceCtrlCmdKGrGetZcullInfo -- exported (id=0x20801206) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__subdeviceCtrlCmdKGrGetZcullInfo__ = &subdeviceCtrlCmdKGrGetZcullInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2850u) + // subdeviceCtrlCmdKGrCtxswPmMode -- exported (id=0x20801207) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x318u) pThis->__subdeviceCtrlCmdKGrCtxswPmMode__ = &subdeviceCtrlCmdKGrCtxswPmMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // subdeviceCtrlCmdKGrCtxswPmBind -- exported (id=0x20801209) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__subdeviceCtrlCmdKGrCtxswPmBind__ = &subdeviceCtrlCmdKGrCtxswPmBind_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // subdeviceCtrlCmdKGrCtxswSetupBind -- exported (id=0x2080123a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__subdeviceCtrlCmdKGrCtxswSetupBind__ = &subdeviceCtrlCmdKGrCtxswSetupBind_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // subdeviceCtrlCmdKGrSetGpcTileMap -- exported (id=0x2080120a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__subdeviceCtrlCmdKGrSetGpcTileMap__ = &subdeviceCtrlCmdKGrSetGpcTileMap_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // subdeviceCtrlCmdKGrCtxswSmpcMode -- exported (id=0x2080120e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__subdeviceCtrlCmdKGrCtxswSmpcMode__ = &subdeviceCtrlCmdKGrCtxswSmpcMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // subdeviceCtrlCmdKGrPcSamplingMode -- exported (id=0x20801212) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__subdeviceCtrlCmdKGrPcSamplingMode__ = &subdeviceCtrlCmdKGrPcSamplingMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdKGrGetSmToGpcTpcMappings -- exported (id=0x2080120f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdKGrGetSmToGpcTpcMappings__ = &subdeviceCtrlCmdKGrGetSmToGpcTpcMappings_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdKGrGetGlobalSmOrder -- exported (id=0x2080121b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdKGrGetGlobalSmOrder__ = &subdeviceCtrlCmdKGrGetGlobalSmOrder_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2a10u) + // subdeviceCtrlCmdKGrSetCtxswPreemptionMode -- exported (id=0x20801210) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x348u) pThis->__subdeviceCtrlCmdKGrSetCtxswPreemptionMode__ = &subdeviceCtrlCmdKGrSetCtxswPreemptionMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // subdeviceCtrlCmdKGrCtxswPreemptionBind -- exported (id=0x20801211) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__subdeviceCtrlCmdKGrCtxswPreemptionBind__ = &subdeviceCtrlCmdKGrCtxswPreemptionBind_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdKGrGetROPInfo -- exported (id=0x20801213) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdKGrGetROPInfo__ = &subdeviceCtrlCmdKGrGetROPInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // subdeviceCtrlCmdKGrGetCtxswStats -- exported (id=0x20801215) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__subdeviceCtrlCmdKGrGetCtxswStats__ = &subdeviceCtrlCmdKGrGetCtxswStats_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) + // subdeviceCtrlCmdKGrGetCtxBufferSize -- exported (id=0x20801218) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) pThis->__subdeviceCtrlCmdKGrGetCtxBufferSize__ = &subdeviceCtrlCmdKGrGetCtxBufferSize_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80000u) + // subdeviceCtrlCmdKGrGetCtxBufferInfo -- exported (id=0x20801219) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) pThis->__subdeviceCtrlCmdKGrGetCtxBufferInfo__ = &subdeviceCtrlCmdKGrGetCtxBufferInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80000u) + // subdeviceCtrlCmdKGrGetCtxBufferPtes -- exported (id=0x20800a28) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) pThis->__subdeviceCtrlCmdKGrGetCtxBufferPtes__ = &subdeviceCtrlCmdKGrGetCtxBufferPtes_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // subdeviceCtrlCmdKGrGetCurrentResidentChannel -- exported (id=0x2080121c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__subdeviceCtrlCmdKGrGetCurrentResidentChannel__ = &subdeviceCtrlCmdKGrGetCurrentResidentChannel_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // subdeviceCtrlCmdKGrGetVatAlarmData -- exported (id=0x2080121d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__subdeviceCtrlCmdKGrGetVatAlarmData__ = &subdeviceCtrlCmdKGrGetVatAlarmData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdKGrGetAttributeBufferSize -- exported (id=0x2080121e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdKGrGetAttributeBufferSize__ = &subdeviceCtrlCmdKGrGetAttributeBufferSize_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) + // subdeviceCtrlCmdKGrGfxPoolQuerySize -- exported (id=0x2080121f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) pThis->__subdeviceCtrlCmdKGrGfxPoolQuerySize__ = &subdeviceCtrlCmdKGrGfxPoolQuerySize_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) + // subdeviceCtrlCmdKGrGfxPoolInitialize -- exported (id=0x20801220) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) pThis->__subdeviceCtrlCmdKGrGfxPoolInitialize__ = &subdeviceCtrlCmdKGrGfxPoolInitialize_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) + // subdeviceCtrlCmdKGrGfxPoolAddSlots -- exported (id=0x20801221) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) pThis->__subdeviceCtrlCmdKGrGfxPoolAddSlots__ = &subdeviceCtrlCmdKGrGfxPoolAddSlots_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2200u) + // subdeviceCtrlCmdKGrGfxPoolRemoveSlots -- exported (id=0x20801222) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x240u) pThis->__subdeviceCtrlCmdKGrGfxPoolRemoveSlots__ = &subdeviceCtrlCmdKGrGfxPoolRemoveSlots_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdKGrGetPpcMask -- exported (id=0x20801233) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdKGrGetPpcMask__ = &subdeviceCtrlCmdKGrGetPpcMask_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // subdeviceCtrlCmdKGrSetTpcPartitionMode -- exported (id=0x2080122c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__subdeviceCtrlCmdKGrSetTpcPartitionMode__ = &subdeviceCtrlCmdKGrSetTpcPartitionMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdKGrGetSmIssueRateModifier -- exported (id=0x20801230) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdKGrGetSmIssueRateModifier__ = &subdeviceCtrlCmdKGrGetSmIssueRateModifier_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdKGrFecsBindEvtbufForUid -- exported (id=0x20801231) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdKGrFecsBindEvtbufForUid__ = &subdeviceCtrlCmdKGrFecsBindEvtbufForUid_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8850u) + // subdeviceCtrlCmdKGrFecsBindEvtbufForUidV2 -- exported (id=0x20801238) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x918u) pThis->__subdeviceCtrlCmdKGrFecsBindEvtbufForUidV2__ = &subdeviceCtrlCmdKGrFecsBindEvtbufForUidV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + // subdeviceCtrlCmdKGrGetPhysGpcMask -- exported (id=0x20801232) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14u) pThis->__subdeviceCtrlCmdKGrGetPhysGpcMask__ = &subdeviceCtrlCmdKGrGetPhysGpcMask_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdKGrGetGpcMask -- exported (id=0x2080122a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdKGrGetGpcMask__ = &subdeviceCtrlCmdKGrGetGpcMask_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdKGrGetTpcMask -- exported (id=0x2080122b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdKGrGetTpcMask__ = &subdeviceCtrlCmdKGrGetTpcMask_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdKGrGetEngineContextProperties -- exported (id=0x2080122d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdKGrGetEngineContextProperties__ = &subdeviceCtrlCmdKGrGetEngineContextProperties_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdKGrGetNumTpcsForGpc -- exported (id=0x20801234) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdKGrGetNumTpcsForGpc__ = &subdeviceCtrlCmdKGrGetNumTpcsForGpc_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // subdeviceCtrlCmdKGrGetGpcTileMap -- exported (id=0x20801236) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__subdeviceCtrlCmdKGrGetGpcTileMap__ = &subdeviceCtrlCmdKGrGetGpcTileMap_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) + // subdeviceCtrlCmdKGrGetZcullMask -- exported (id=0x20801237) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) pThis->__subdeviceCtrlCmdKGrGetZcullMask__ = &subdeviceCtrlCmdKGrGetZcullMask_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdKGrGetGfxGpcAndTpcInfo -- exported (id=0x20801239) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdKGrGetGfxGpcAndTpcInfo__ = &subdeviceCtrlCmdKGrGetGfxGpcAndTpcInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) + // subdeviceCtrlCmdKGrInternalStaticGetInfo -- exported (id=0x20800a2a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) pThis->__subdeviceCtrlCmdKGrInternalStaticGetInfo__ = &subdeviceCtrlCmdKGrInternalStaticGetInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x102600u) + // subdeviceCtrlCmdKGrInternalStaticGetCaps -- exported (id=0x20800a1f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x102c0u) pThis->__subdeviceCtrlCmdKGrInternalStaticGetCaps__ = &subdeviceCtrlCmdKGrInternalStaticGetCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) + // subdeviceCtrlCmdKGrInternalStaticGetGlobalSmOrder -- exported (id=0x20800a22) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) pThis->__subdeviceCtrlCmdKGrInternalStaticGetGlobalSmOrder__ = &subdeviceCtrlCmdKGrInternalStaticGetGlobalSmOrder_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) + // subdeviceCtrlCmdKGrInternalStaticGetFloorsweepingMasks -- exported (id=0x20800a26) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) pThis->__subdeviceCtrlCmdKGrInternalStaticGetFloorsweepingMasks__ = &subdeviceCtrlCmdKGrInternalStaticGetFloorsweepingMasks_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) + // subdeviceCtrlCmdKGrInternalStaticGetPpcMasks -- exported (id=0x20800a30) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) pThis->__subdeviceCtrlCmdKGrInternalStaticGetPpcMasks__ = &subdeviceCtrlCmdKGrInternalStaticGetPpcMasks_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) + // subdeviceCtrlCmdKGrInternalStaticGetZcullInfo -- exported (id=0x20800a2c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) pThis->__subdeviceCtrlCmdKGrInternalStaticGetZcullInfo__ = &subdeviceCtrlCmdKGrInternalStaticGetZcullInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) + // subdeviceCtrlCmdKGrInternalStaticGetRopInfo -- exported (id=0x20800a2e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) pThis->__subdeviceCtrlCmdKGrInternalStaticGetRopInfo__ = &subdeviceCtrlCmdKGrInternalStaticGetRopInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2e00u) + // subdeviceCtrlCmdKGrInternalStaticGetContextBuffersInfo -- exported (id=0x20800a32) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c3c0u) pThis->__subdeviceCtrlCmdKGrInternalStaticGetContextBuffersInfo__ = &subdeviceCtrlCmdKGrInternalStaticGetContextBuffersInfo_IMPL; #endif +} // End __nvoc_init_funcTable_Subdevice_1 with approximately 263 basic block(s). + +// Vtable initialization 2/3 +static void __nvoc_init_funcTable_Subdevice_2(Subdevice *pThis, RmHalspecOwner *pRmhalspecowner) { + RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; + const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; + PORT_UNREFERENCED_VARIABLE(pThis); + PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); + PORT_UNREFERENCED_VARIABLE(rmVariantHal); + PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) + // subdeviceCtrlCmdKGrInternalStaticGetSmIssueRateModifier -- exported (id=0x20800a34) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) pThis->__subdeviceCtrlCmdKGrInternalStaticGetSmIssueRateModifier__ = &subdeviceCtrlCmdKGrInternalStaticGetSmIssueRateModifier_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) + // subdeviceCtrlCmdKGrInternalStaticGetFecsRecordSize -- exported (id=0x20800a3d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) pThis->__subdeviceCtrlCmdKGrInternalStaticGetFecsRecordSize__ = &subdeviceCtrlCmdKGrInternalStaticGetFecsRecordSize_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) + // subdeviceCtrlCmdKGrInternalStaticGetFecsTraceDefines -- exported (id=0x20800a3f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) pThis->__subdeviceCtrlCmdKGrInternalStaticGetFecsTraceDefines__ = &subdeviceCtrlCmdKGrInternalStaticGetFecsTraceDefines_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2600u) + // subdeviceCtrlCmdKGrInternalStaticGetPdbProperties -- exported (id=0x20800a48) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2c0u) pThis->__subdeviceCtrlCmdKGrInternalStaticGetPdbProperties__ = &subdeviceCtrlCmdKGrInternalStaticGetPdbProperties_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) + // subdeviceCtrlCmdGrInternalSetFecsTraceHwEnable -- exported (id=0x20800a37) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) pThis->__subdeviceCtrlCmdGrInternalSetFecsTraceHwEnable__ = &subdeviceCtrlCmdGrInternalSetFecsTraceHwEnable_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) + // subdeviceCtrlCmdGrInternalGetFecsTraceHwEnable -- exported (id=0x20800a38) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) pThis->__subdeviceCtrlCmdGrInternalGetFecsTraceHwEnable__ = &subdeviceCtrlCmdGrInternalGetFecsTraceHwEnable_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) + // subdeviceCtrlCmdGrInternalSetFecsTraceRdOffset -- exported (id=0x20800a39) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) pThis->__subdeviceCtrlCmdGrInternalSetFecsTraceRdOffset__ = &subdeviceCtrlCmdGrInternalSetFecsTraceRdOffset_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) + // subdeviceCtrlCmdGrInternalGetFecsTraceRdOffset -- exported (id=0x20800a3b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) pThis->__subdeviceCtrlCmdGrInternalGetFecsTraceRdOffset__ = &subdeviceCtrlCmdGrInternalGetFecsTraceRdOffset_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) + // subdeviceCtrlCmdGrInternalSetFecsTraceWrOffset -- exported (id=0x20800a3a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) pThis->__subdeviceCtrlCmdGrInternalSetFecsTraceWrOffset__ = &subdeviceCtrlCmdGrInternalSetFecsTraceWrOffset_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100200u) + // subdeviceCtrlCmdGrStaticGetFecsTraceDefines -- exported (id=0x20800a3e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10040u) pThis->__subdeviceCtrlCmdGrStaticGetFecsTraceDefines__ = &subdeviceCtrlCmdGrStaticGetFecsTraceDefines_IMPL; #endif -} - -static void __nvoc_init_funcTable_Subdevice_2(Subdevice *pThis, RmHalspecOwner *pRmhalspecowner) { - RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; - const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; - PORT_UNREFERENCED_VARIABLE(pThis); - PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); - PORT_UNREFERENCED_VARIABLE(rmVariantHal); - PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // subdeviceCtrlCmdGpuGetCachedInfo -- exported (id=0x20800182) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__subdeviceCtrlCmdGpuGetCachedInfo__ = &subdeviceCtrlCmdGpuGetCachedInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200850u) + // subdeviceCtrlCmdGpuGetInfoV2 -- exported (id=0x20800102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x20118u) pThis->__subdeviceCtrlCmdGpuGetInfoV2__ = &subdeviceCtrlCmdGpuGetInfoV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdGpuGetIpVersion -- exported (id=0x2080014d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdGpuGetIpVersion__ = &subdeviceCtrlCmdGpuGetIpVersion_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdGpuGetPhysicalBridgeVersionInfo -- exported (id=0x2080015a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdGpuGetPhysicalBridgeVersionInfo__ = &subdeviceCtrlCmdGpuGetPhysicalBridgeVersionInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdGpuGetAllBridgesUpstreamOfGpu -- exported (id=0x2080015b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdGpuGetAllBridgesUpstreamOfGpu__ = &subdeviceCtrlCmdGpuGetAllBridgesUpstreamOfGpu_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdGpuSetOptimusInfo -- exported (id=0x2080014c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdGpuSetOptimusInfo__ = &subdeviceCtrlCmdGpuSetOptimusInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200812u) + // subdeviceCtrlCmdGpuGetNameString -- exported (id=0x20800110) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2010au) pThis->__subdeviceCtrlCmdGpuGetNameString__ = &subdeviceCtrlCmdGpuGetNameString_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4812u) + // subdeviceCtrlCmdGpuGetShortNameString -- exported (id=0x20800111) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50au) pThis->__subdeviceCtrlCmdGpuGetShortNameString__ = &subdeviceCtrlCmdGpuGetShortNameString_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdGpuGetEncoderCapacity -- exported (id=0x2080016c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdGpuGetEncoderCapacity__ = &subdeviceCtrlCmdGpuGetEncoderCapacity_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdGpuGetNvencSwSessionStats -- exported (id=0x2080016d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdGpuGetNvencSwSessionStats__ = &subdeviceCtrlCmdGpuGetNvencSwSessionStats_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdGpuGetNvencSwSessionInfo -- exported (id=0x2080016e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdGpuGetNvencSwSessionInfo__ = &subdeviceCtrlCmdGpuGetNvencSwSessionInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) + // subdeviceCtrlCmdGpuGetNvencSwSessionInfoV2 -- exported (id=0x208001af) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) pThis->__subdeviceCtrlCmdGpuGetNvencSwSessionInfoV2__ = &subdeviceCtrlCmdGpuGetNvencSwSessionInfoV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdGpuGetNvfbcSwSessionStats -- exported (id=0x2080017b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdGpuGetNvfbcSwSessionStats__ = &subdeviceCtrlCmdGpuGetNvfbcSwSessionStats_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdGpuGetNvfbcSwSessionInfo -- exported (id=0x2080017c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdGpuGetNvfbcSwSessionInfo__ = &subdeviceCtrlCmdGpuGetNvfbcSwSessionInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdGpuSetFabricAddr -- exported (id=0x2080016f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdGpuSetFabricAddr__ = &subdeviceCtrlCmdGpuSetFabricAddr_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdGpuSetEgmGpaFabricAddr -- exported (id=0x20800199) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdGpuSetEgmGpaFabricAddr__ = &subdeviceCtrlCmdGpuSetEgmGpaFabricAddr_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdGpuSetPower -- exported (id=0x20800112) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdGpuSetPower__ = &subdeviceCtrlCmdGpuSetPower_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // subdeviceCtrlCmdGpuGetSdm -- exported (id=0x20800118) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__subdeviceCtrlCmdGpuGetSdm__ = &subdeviceCtrlCmdGpuGetSdm_IMPL; #endif + // subdeviceCtrlCmdGpuSetSdm -- exported (id=0x20800120) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x5u) pThis->__subdeviceCtrlCmdGpuSetSdm__ = &subdeviceCtrlCmdGpuSetSdm_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4813u) + // subdeviceCtrlCmdGpuGetSimulationInfo -- exported (id=0x20800119) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50bu) pThis->__subdeviceCtrlCmdGpuGetSimulationInfo__ = &subdeviceCtrlCmdGpuGetSimulationInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // subdeviceCtrlCmdGpuGetEngines -- exported (id=0x20800123) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__subdeviceCtrlCmdGpuGetEngines__ = &subdeviceCtrlCmdGpuGetEngines_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // subdeviceCtrlCmdGpuGetEnginesV2 -- exported (id=0x20800170) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__subdeviceCtrlCmdGpuGetEnginesV2__ = &subdeviceCtrlCmdGpuGetEnginesV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // subdeviceCtrlCmdGpuGetEngineClasslist -- exported (id=0x20800124) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__subdeviceCtrlCmdGpuGetEngineClasslist__ = &subdeviceCtrlCmdGpuGetEngineClasslist_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdGpuGetEnginePartnerList -- exported (id=0x20800147) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdGpuGetEnginePartnerList__ = &subdeviceCtrlCmdGpuGetEnginePartnerList_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdGpuGetFermiGpcInfo -- exported (id=0x20800137) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdGpuGetFermiGpcInfo__ = &subdeviceCtrlCmdGpuGetFermiGpcInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdGpuGetFermiTpcInfo -- exported (id=0x20800138) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdGpuGetFermiTpcInfo__ = &subdeviceCtrlCmdGpuGetFermiTpcInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdGpuGetFermiZcullInfo -- exported (id=0x20800139) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdGpuGetFermiZcullInfo__ = &subdeviceCtrlCmdGpuGetFermiZcullInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdGpuGetPesInfo -- exported (id=0x20800168) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdGpuGetPesInfo__ = &subdeviceCtrlCmdGpuGetPesInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdGpuExecRegOps -- exported (id=0x20800122) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdGpuExecRegOps__ = &subdeviceCtrlCmdGpuExecRegOps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdGpuMigratableOps -- exported (id=0x208001a6) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdGpuMigratableOps__ = &subdeviceCtrlCmdGpuMigratableOps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdGpuQueryMode -- exported (id=0x20800128) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdGpuQueryMode__ = &subdeviceCtrlCmdGpuQueryMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4210u) + // subdeviceCtrlCmdGpuGetInforomImageVersion -- exported (id=0x20800156) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x448u) pThis->__subdeviceCtrlCmdGpuGetInforomImageVersion__ = &subdeviceCtrlCmdGpuGetInforomImageVersion_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdGpuGetInforomObjectVersion -- exported (id=0x2080014b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdGpuGetInforomObjectVersion__ = &subdeviceCtrlCmdGpuGetInforomObjectVersion_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdGpuQueryInforomEccSupport -- exported (id=0x20800157) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdGpuQueryInforomEccSupport__ = &subdeviceCtrlCmdGpuQueryInforomEccSupport_IMPL; #endif - // Hal function -- subdeviceCtrlCmdGpuQueryEccStatus + // subdeviceCtrlCmdGpuQueryEccStatus -- halified (2 hals) exported (id=0x2080012f) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__subdeviceCtrlCmdGpuQueryEccStatus__ = &subdeviceCtrlCmdGpuQueryEccStatus_VF; @@ -9614,59 +9917,72 @@ static void __nvoc_init_funcTable_Subdevice_2(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdGpuQueryEccStatus__ = &subdeviceCtrlCmdGpuQueryEccStatus_92bfc3; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x404210u) + // subdeviceCtrlCmdGpuGetChipDetails -- exported (id=0x208001a4) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40448u) pThis->__subdeviceCtrlCmdGpuGetChipDetails__ = &subdeviceCtrlCmdGpuGetChipDetails_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4210u) + // subdeviceCtrlCmdGpuGetOEMBoardInfo -- exported (id=0x2080013f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x448u) pThis->__subdeviceCtrlCmdGpuGetOEMBoardInfo__ = &subdeviceCtrlCmdGpuGetOEMBoardInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4210u) + // subdeviceCtrlCmdGpuGetOEMInfo -- exported (id=0x20800169) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x448u) pThis->__subdeviceCtrlCmdGpuGetOEMInfo__ = &subdeviceCtrlCmdGpuGetOEMInfo_IMPL; #endif + // subdeviceCtrlCmdGpuHandleGpuSR -- exported (id=0x20800167) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x3u) pThis->__subdeviceCtrlCmdGpuHandleGpuSR__ = &subdeviceCtrlCmdGpuHandleGpuSR_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x844u) + // subdeviceCtrlCmdGpuSetComputeModeRules -- exported (id=0x20800130) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x114u) pThis->__subdeviceCtrlCmdGpuSetComputeModeRules__ = &subdeviceCtrlCmdGpuSetComputeModeRules_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x811u) + // subdeviceCtrlCmdGpuQueryComputeModeRules -- exported (id=0x20800131) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__subdeviceCtrlCmdGpuQueryComputeModeRules__ = &subdeviceCtrlCmdGpuQueryComputeModeRules_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdGpuAcquireComputeModeReservation -- exported (id=0x20800145) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdGpuAcquireComputeModeReservation__ = &subdeviceCtrlCmdGpuAcquireComputeModeReservation_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdGpuReleaseComputeModeReservation -- exported (id=0x20800146) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdGpuReleaseComputeModeReservation__ = &subdeviceCtrlCmdGpuReleaseComputeModeReservation_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x142204u) + // subdeviceCtrlCmdGpuInitializeCtx -- exported (id=0x2080012d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14244u) pThis->__subdeviceCtrlCmdGpuInitializeCtx__ = &subdeviceCtrlCmdGpuInitializeCtx_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x102204u) + // subdeviceCtrlCmdGpuPromoteCtx -- exported (id=0x2080012b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10244u) pThis->__subdeviceCtrlCmdGpuPromoteCtx__ = &subdeviceCtrlCmdGpuPromoteCtx_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c2200u) + // subdeviceCtrlCmdGpuEvictCtx -- exported (id=0x2080012c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c240u) pThis->__subdeviceCtrlCmdGpuEvictCtx__ = &subdeviceCtrlCmdGpuEvictCtx_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x812u) + // subdeviceCtrlCmdGpuGetId -- exported (id=0x20800142) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) pThis->__subdeviceCtrlCmdGpuGetId__ = &subdeviceCtrlCmdGpuGetId_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdGpuGetGidInfo -- exported (id=0x2080014a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdGpuGetGidInfo__ = &subdeviceCtrlCmdGpuGetGidInfo_IMPL; #endif - // Hal function -- subdeviceCtrlCmdGpuQueryIllumSupport + // subdeviceCtrlCmdGpuQueryIllumSupport -- halified (2 hals) exported (id=0x20800153) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__subdeviceCtrlCmdGpuQueryIllumSupport__ = &subdeviceCtrlCmdGpuQueryIllumSupport_VF; @@ -9676,15 +9992,17 @@ static void __nvoc_init_funcTable_Subdevice_2(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdGpuQueryIllumSupport__ = &subdeviceCtrlCmdGpuQueryIllumSupport_5baef9; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdGpuGetIllum -- exported (id=0x20800154) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdGpuGetIllum__ = &subdeviceCtrlCmdGpuGetIllum_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdGpuSetIllum -- exported (id=0x20800155) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdGpuSetIllum__ = &subdeviceCtrlCmdGpuSetIllum_IMPL; #endif - // Hal function -- subdeviceCtrlCmdGpuQueryScrubberStatus + // subdeviceCtrlCmdGpuQueryScrubberStatus -- halified (2 hals) exported (id=0x2080015f) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__subdeviceCtrlCmdGpuQueryScrubberStatus__ = &subdeviceCtrlCmdGpuQueryScrubberStatus_VF; @@ -9694,327 +10012,412 @@ static void __nvoc_init_funcTable_Subdevice_2(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdGpuQueryScrubberStatus__ = &subdeviceCtrlCmdGpuQueryScrubberStatus_92bfc3; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdGpuGetVprCaps -- exported (id=0x20800160) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdGpuGetVprCaps__ = &subdeviceCtrlCmdGpuGetVprCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdGpuGetVprInfo -- exported (id=0x2080016b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdGpuGetVprInfo__ = &subdeviceCtrlCmdGpuGetVprInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdGpuGetPids -- exported (id=0x2080018d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdGpuGetPids__ = &subdeviceCtrlCmdGpuGetPids_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdGpuGetPidInfo -- exported (id=0x2080018e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdGpuGetPidInfo__ = &subdeviceCtrlCmdGpuGetPidInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdGpuQueryFunctionStatus -- exported (id=0x20800173) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdGpuQueryFunctionStatus__ = &subdeviceCtrlCmdGpuQueryFunctionStatus_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400200u) + // subdeviceCtrlCmdGpuReportNonReplayableFault -- exported (id=0x20800177) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40040u) pThis->__subdeviceCtrlCmdGpuReportNonReplayableFault__ = &subdeviceCtrlCmdGpuReportNonReplayableFault_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // subdeviceCtrlCmdGpuGetEngineFaultInfo -- exported (id=0x20800125) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__subdeviceCtrlCmdGpuGetEngineFaultInfo__ = &subdeviceCtrlCmdGpuGetEngineFaultInfo_IMPL; #endif + // subdeviceCtrlCmdGpuGetEngineRunlistPriBase -- exported (id=0x20800179) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__subdeviceCtrlCmdGpuGetEngineRunlistPriBase__ = &subdeviceCtrlCmdGpuGetEngineRunlistPriBase_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdGpuGetHwEngineId -- exported (id=0x2080017a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdGpuGetHwEngineId__ = &subdeviceCtrlCmdGpuGetHwEngineId_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4210u) + // subdeviceCtrlCmdGpuGetVmmuSegmentSize -- exported (id=0x2080017e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x448u) pThis->__subdeviceCtrlCmdGpuGetVmmuSegmentSize__ = &subdeviceCtrlCmdGpuGetVmmuSegmentSize_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) + // subdeviceCtrlCmdGpuGetMaxSupportedPageSize -- exported (id=0x20800188) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) pThis->__subdeviceCtrlCmdGpuGetMaxSupportedPageSize__ = &subdeviceCtrlCmdGpuGetMaxSupportedPageSize_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // subdeviceCtrlCmdGpuHandleVfPriFault -- exported (id=0x20800192) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__subdeviceCtrlCmdGpuHandleVfPriFault__ = &subdeviceCtrlCmdGpuHandleVfPriFault_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x807u) + // subdeviceCtrlCmdGpuSetComputePolicyConfig -- exported (id=0x20800194) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x107u) pThis->__subdeviceCtrlCmdGpuSetComputePolicyConfig__ = &subdeviceCtrlCmdGpuSetComputePolicyConfig_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x813u) + // subdeviceCtrlCmdGpuGetComputePolicyConfig -- exported (id=0x20800195) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__subdeviceCtrlCmdGpuGetComputePolicyConfig__ = &subdeviceCtrlCmdGpuGetComputePolicyConfig_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x840u) + // subdeviceCtrlCmdValidateMemMapRequest -- exported (id=0x20800198) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x110u) pThis->__subdeviceCtrlCmdValidateMemMapRequest__ = &subdeviceCtrlCmdValidateMemMapRequest_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdGpuGetGfid -- exported (id=0x20800196) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdGpuGetGfid__ = &subdeviceCtrlCmdGpuGetGfid_IMPL; #endif + // subdeviceCtrlCmdUpdateGfidP2pCapability -- exported (id=0x20800197) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__subdeviceCtrlCmdUpdateGfidP2pCapability__ = &subdeviceCtrlCmdUpdateGfidP2pCapability_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x12u) + // subdeviceCtrlCmdGpuGetEngineLoadTimes -- exported (id=0x2080019b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xau) pThis->__subdeviceCtrlCmdGpuGetEngineLoadTimes__ = &subdeviceCtrlCmdGpuGetEngineLoadTimes_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) + // subdeviceCtrlCmdGetP2pCaps -- exported (id=0x208001a0) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) pThis->__subdeviceCtrlCmdGetP2pCaps__ = &subdeviceCtrlCmdGetP2pCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdGetGpuFabricProbeInfo -- exported (id=0x208001a3) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdGetGpuFabricProbeInfo__ = &subdeviceCtrlCmdGetGpuFabricProbeInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdGpuGetResetStatus -- exported (id=0x208001ab) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdGpuGetResetStatus__ = &subdeviceCtrlCmdGpuGetResetStatus_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdGpuGetDrainAndResetStatus -- exported (id=0x208001ae) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdGpuGetDrainAndResetStatus__ = &subdeviceCtrlCmdGpuGetDrainAndResetStatus_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdGpuGetConstructedFalconInfo -- exported (id=0x208001b0) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdGpuGetConstructedFalconInfo__ = &subdeviceCtrlCmdGpuGetConstructedFalconInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlGpuGetFipsStatus -- exported (id=0x208001e4) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlGpuGetFipsStatus__ = &subdeviceCtrlGpuGetFipsStatus_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdEventSetTrigger -- exported (id=0x20800302) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdEventSetTrigger__ = &subdeviceCtrlCmdEventSetTrigger_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // subdeviceCtrlCmdEventSetTriggerFifo -- exported (id=0x20800308) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__subdeviceCtrlCmdEventSetTriggerFifo__ = &subdeviceCtrlCmdEventSetTriggerFifo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdEventSetNotification -- exported (id=0x20800301) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdEventSetNotification__ = &subdeviceCtrlCmdEventSetNotification_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdEventSetMemoryNotifies -- exported (id=0x20800303) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdEventSetMemoryNotifies__ = &subdeviceCtrlCmdEventSetMemoryNotifies_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdEventSetSemaphoreMemory -- exported (id=0x20800304) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdEventSetSemaphoreMemory__ = &subdeviceCtrlCmdEventSetSemaphoreMemory_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdEventSetSemaMemValidation -- exported (id=0x20800306) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdEventSetSemaMemValidation__ = &subdeviceCtrlCmdEventSetSemaMemValidation_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdEventVideoBindEvtbuf -- exported (id=0x20800309) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdEventVideoBindEvtbuf__ = &subdeviceCtrlCmdEventVideoBindEvtbuf_IMPL; #endif + // subdeviceCtrlCmdEventGspTraceRatsBindEvtbuf -- exported (id=0x2080030a) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__subdeviceCtrlCmdEventGspTraceRatsBindEvtbuf__ = &subdeviceCtrlCmdEventGspTraceRatsBindEvtbuf_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdTimerCancel -- exported (id=0x20800402) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdTimerCancel__ = &subdeviceCtrlCmdTimerCancel_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdTimerSchedule -- exported (id=0x20800401) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdTimerSchedule__ = &subdeviceCtrlCmdTimerSchedule_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdTimerGetTime -- exported (id=0x20800403) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdTimerGetTime__ = &subdeviceCtrlCmdTimerGetTime_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // subdeviceCtrlCmdTimerGetRegisterOffset -- exported (id=0x20800404) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__subdeviceCtrlCmdTimerGetRegisterOffset__ = &subdeviceCtrlCmdTimerGetRegisterOffset_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x810u) + // subdeviceCtrlCmdTimerGetGpuCpuTimeCorrelationInfo -- exported (id=0x20800406) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) pThis->__subdeviceCtrlCmdTimerGetGpuCpuTimeCorrelationInfo__ = &subdeviceCtrlCmdTimerGetGpuCpuTimeCorrelationInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2010u) + // subdeviceCtrlCmdTimerSetGrTickFreq -- exported (id=0x20800407) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) pThis->__subdeviceCtrlCmdTimerSetGrTickFreq__ = &subdeviceCtrlCmdTimerSetGrTickFreq_IMPL; #endif + // subdeviceCtrlCmdRcReadVirtualMem -- exported (id=0x20802204) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__subdeviceCtrlCmdRcReadVirtualMem__ = &subdeviceCtrlCmdRcReadVirtualMem_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdRcGetErrorCount -- exported (id=0x20802205) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdRcGetErrorCount__ = &subdeviceCtrlCmdRcGetErrorCount_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdRcGetErrorV2 -- exported (id=0x20802213) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdRcGetErrorV2__ = &subdeviceCtrlCmdRcGetErrorV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdRcSetCleanErrorHistory -- exported (id=0x20802207) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdRcSetCleanErrorHistory__ = &subdeviceCtrlCmdRcSetCleanErrorHistory_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdRcGetWatchdogInfo -- exported (id=0x20802209) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdRcGetWatchdogInfo__ = &subdeviceCtrlCmdRcGetWatchdogInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) + // subdeviceCtrlCmdRcDisableWatchdog -- exported (id=0x2080220a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) pThis->__subdeviceCtrlCmdRcDisableWatchdog__ = &subdeviceCtrlCmdRcDisableWatchdog_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) + // subdeviceCtrlCmdRcSoftDisableWatchdog -- exported (id=0x20802210) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) pThis->__subdeviceCtrlCmdRcSoftDisableWatchdog__ = &subdeviceCtrlCmdRcSoftDisableWatchdog_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) + // subdeviceCtrlCmdRcEnableWatchdog -- exported (id=0x2080220b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) pThis->__subdeviceCtrlCmdRcEnableWatchdog__ = &subdeviceCtrlCmdRcEnableWatchdog_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50u) + // subdeviceCtrlCmdRcReleaseWatchdogRequests -- exported (id=0x2080220c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) pThis->__subdeviceCtrlCmdRcReleaseWatchdogRequests__ = &subdeviceCtrlCmdRcReleaseWatchdogRequests_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalRcWatchdogTimeout -- exported (id=0x20800a6a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalRcWatchdogTimeout__ = &subdeviceCtrlCmdInternalRcWatchdogTimeout_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdSetRcRecovery -- exported (id=0x2080220d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdSetRcRecovery__ = &subdeviceCtrlCmdSetRcRecovery_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdGetRcRecovery -- exported (id=0x2080220e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdGetRcRecovery__ = &subdeviceCtrlCmdGetRcRecovery_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdGetRcInfo -- exported (id=0x20802212) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdGetRcInfo__ = &subdeviceCtrlCmdGetRcInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdSetRcInfo -- exported (id=0x20802211) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdSetRcInfo__ = &subdeviceCtrlCmdSetRcInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdNvdGetDumpSize -- exported (id=0x20802401) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdNvdGetDumpSize__ = &subdeviceCtrlCmdNvdGetDumpSize_IMPL; #endif + // subdeviceCtrlCmdNvdGetDump -- exported (id=0x20802402) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__subdeviceCtrlCmdNvdGetDump__ = &subdeviceCtrlCmdNvdGetDump_IMPL; #endif + // subdeviceCtrlCmdNvdGetNocatJournalRpt -- exported (id=0x20802409) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) pThis->__subdeviceCtrlCmdNvdGetNocatJournalRpt__ = &subdeviceCtrlCmdNvdGetNocatJournalRpt_IMPL; #endif + // subdeviceCtrlCmdNvdSetNocatJournalData -- exported (id=0x2080240b) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) pThis->__subdeviceCtrlCmdNvdSetNocatJournalData__ = &subdeviceCtrlCmdNvdSetNocatJournalData_IMPL; #endif + // subdeviceCtrlCmdNvdInsertNocatJournalRecord -- exported (id=0x2080240c) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) pThis->__subdeviceCtrlCmdNvdInsertNocatJournalRecord__ = &subdeviceCtrlCmdNvdInsertNocatJournalRecord_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xa50u) + // subdeviceCtrlCmdPmgrGetModuleInfo -- exported (id=0x20802609) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) pThis->__subdeviceCtrlCmdPmgrGetModuleInfo__ = &subdeviceCtrlCmdPmgrGetModuleInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdGpuProcessPostGc6ExitTasks -- exported (id=0x2080270c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdGpuProcessPostGc6ExitTasks__ = &subdeviceCtrlCmdGpuProcessPostGc6ExitTasks_IMPL; #endif + // subdeviceCtrlCmdGc6Entry -- exported (id=0x2080270d) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2u) pThis->__subdeviceCtrlCmdGc6Entry__ = &subdeviceCtrlCmdGc6Entry_IMPL; #endif + // subdeviceCtrlCmdGc6Exit -- exported (id=0x2080270e) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2u) pThis->__subdeviceCtrlCmdGc6Exit__ = &subdeviceCtrlCmdGc6Exit_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x200u) + // subdeviceCtrlCmdLpwrDifrPrefetchResponse -- exported (id=0x20802802) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdLpwrDifrPrefetchResponse__ = &subdeviceCtrlCmdLpwrDifrPrefetchResponse_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdLpwrDifrCtrl -- exported (id=0x20802801) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdLpwrDifrCtrl__ = &subdeviceCtrlCmdLpwrDifrCtrl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) - pThis->__subdeviceCtrlCmdCeGetCaps__ = &subdeviceCtrlCmdCeGetCaps_IMPL; -#endif + // subdeviceCtrlCmdCeGetCaps -- halified (2 hals) exported (id=0x20802a01) + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__subdeviceCtrlCmdCeGetCaps__ = &subdeviceCtrlCmdCeGetCaps_VF; + } + else + { + pThis->__subdeviceCtrlCmdCeGetCaps__ = &subdeviceCtrlCmdCeGetCaps_IMPL; + } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2a11u) + // subdeviceCtrlCmdCeGetCePceMask -- exported (id=0x20802a02) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x349u) pThis->__subdeviceCtrlCmdCeGetCePceMask__ = &subdeviceCtrlCmdCeGetCePceMask_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdCeUpdatePceLceMappings -- exported (id=0x20802a05) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdCeUpdatePceLceMappings__ = &subdeviceCtrlCmdCeUpdatePceLceMappings_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2850u) - pThis->__subdeviceCtrlCmdCeGetCapsV2__ = &subdeviceCtrlCmdCeGetCapsV2_IMPL; -#endif + // subdeviceCtrlCmdCeGetCapsV2 -- halified (2 hals) exported (id=0x20802a03) + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__subdeviceCtrlCmdCeGetCapsV2__ = &subdeviceCtrlCmdCeGetCapsV2_VF; + } + else + { + pThis->__subdeviceCtrlCmdCeGetCapsV2__ = &subdeviceCtrlCmdCeGetCapsV2_IMPL; + } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2810u) - pThis->__subdeviceCtrlCmdCeGetAllCaps__ = &subdeviceCtrlCmdCeGetAllCaps_IMPL; -#endif + // subdeviceCtrlCmdCeGetAllCaps -- halified (2 hals) exported (id=0x20802a0a) + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__subdeviceCtrlCmdCeGetAllCaps__ = &subdeviceCtrlCmdCeGetAllCaps_VF; + } + else + { + pThis->__subdeviceCtrlCmdCeGetAllCaps__ = &subdeviceCtrlCmdCeGetAllCaps_IMPL; + } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdFlcnGetDmemUsage -- exported (id=0x20803101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdFlcnGetDmemUsage__ = &subdeviceCtrlCmdFlcnGetDmemUsage_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdFlcnGetEngineArch -- exported (id=0x20803118) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdFlcnGetEngineArch__ = &subdeviceCtrlCmdFlcnGetEngineArch_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdFlcnUstreamerQueueInfo -- exported (id=0x20803120) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdFlcnUstreamerQueueInfo__ = &subdeviceCtrlCmdFlcnUstreamerQueueInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdFlcnUstreamerControlGet -- exported (id=0x20803122) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdFlcnUstreamerControlGet__ = &subdeviceCtrlCmdFlcnUstreamerControlGet_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) + // subdeviceCtrlCmdFlcnUstreamerControlSet -- exported (id=0x20803123) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdFlcnUstreamerControlSet__ = &subdeviceCtrlCmdFlcnUstreamerControlSet_IMPL; #endif + // subdeviceCtrlCmdFlcnGetCtxBufferInfo -- exported (id=0x20803124) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__subdeviceCtrlCmdFlcnGetCtxBufferInfo__ = &subdeviceCtrlCmdFlcnGetCtxBufferInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdFlcnGetCtxBufferSize -- exported (id=0x20803125) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdFlcnGetCtxBufferSize__ = &subdeviceCtrlCmdFlcnGetCtxBufferSize_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - pThis->__subdeviceCtrlCmdInternalFlcnSetVideoEventBufferFlags__ = &subdeviceCtrlCmdInternalFlcnSetVideoEventBufferFlags_IMPL; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - pThis->__subdeviceCtrlCmdInternalFlcnSetVideoEventBufferMemory__ = &subdeviceCtrlCmdInternalFlcnSetVideoEventBufferMemory_IMPL; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdEccGetClientExposedCounters -- exported (id=0x20803400) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdEccGetClientExposedCounters__ = &subdeviceCtrlCmdEccGetClientExposedCounters_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdEccGetEciCounters -- exported (id=0x20803401) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdEccGetEciCounters__ = &subdeviceCtrlCmdEccGetEciCounters_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdEccGetVolatileCounts -- exported (id=0x20803402) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdEccGetVolatileCounts__ = &subdeviceCtrlCmdEccGetVolatileCounts_IMPL; #endif - // Hal function -- subdeviceCtrlCmdGpuQueryEccConfiguration + // subdeviceCtrlCmdGpuQueryEccConfiguration -- halified (2 hals) exported (id=0x20800133) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__subdeviceCtrlCmdGpuQueryEccConfiguration__ = &subdeviceCtrlCmdGpuQueryEccConfiguration_VF; @@ -10024,7 +10427,7 @@ static void __nvoc_init_funcTable_Subdevice_2(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdGpuQueryEccConfiguration__ = &subdeviceCtrlCmdGpuQueryEccConfiguration_92bfc3; } - // Hal function -- subdeviceCtrlCmdGpuSetEccConfiguration + // subdeviceCtrlCmdGpuSetEccConfiguration -- halified (2 hals) exported (id=0x20800134) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__subdeviceCtrlCmdGpuSetEccConfiguration__ = &subdeviceCtrlCmdGpuSetEccConfiguration_VF; @@ -10034,7 +10437,7 @@ static void __nvoc_init_funcTable_Subdevice_2(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdGpuSetEccConfiguration__ = &subdeviceCtrlCmdGpuSetEccConfiguration_92bfc3; } - // Hal function -- subdeviceCtrlCmdGpuResetEccErrorStatus + // subdeviceCtrlCmdGpuResetEccErrorStatus -- halified (2 hals) exported (id=0x20800136) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__subdeviceCtrlCmdGpuResetEccErrorStatus__ = &subdeviceCtrlCmdGpuResetEccErrorStatus_VF; @@ -10044,23 +10447,27 @@ static void __nvoc_init_funcTable_Subdevice_2(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdGpuResetEccErrorStatus__ = &subdeviceCtrlCmdGpuResetEccErrorStatus_92bfc3; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdFlaRange -- exported (id=0x20803501) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdFlaRange__ = &subdeviceCtrlCmdFlaRange_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x102204u) + // subdeviceCtrlCmdFlaSetupInstanceMemBlock -- exported (id=0x20803502) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10244u) pThis->__subdeviceCtrlCmdFlaSetupInstanceMemBlock__ = &subdeviceCtrlCmdFlaSetupInstanceMemBlock_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100004u) + // subdeviceCtrlCmdFlaGetRange -- exported (id=0x20803503) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10004u) pThis->__subdeviceCtrlCmdFlaGetRange__ = &subdeviceCtrlCmdFlaGetRange_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1810u) + // subdeviceCtrlCmdFlaGetFabricMemStats -- exported (id=0x20803504) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) pThis->__subdeviceCtrlCmdFlaGetFabricMemStats__ = &subdeviceCtrlCmdFlaGetFabricMemStats_IMPL; #endif - // Hal function -- subdeviceCtrlCmdGspGetFeatures + // subdeviceCtrlCmdGspGetFeatures -- halified (2 hals) exported (id=0x20803601) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__subdeviceCtrlCmdGspGetFeatures__ = &subdeviceCtrlCmdGspGetFeatures_KERNEL; @@ -10070,699 +10477,879 @@ static void __nvoc_init_funcTable_Subdevice_2(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdGspGetFeatures__ = &subdeviceCtrlCmdGspGetFeatures_92bfc3; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x210u) + // subdeviceCtrlCmdGspGetRmHeapStats -- exported (id=0x20803602) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdGspGetRmHeapStats__ = &subdeviceCtrlCmdGspGetRmHeapStats_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdGpuGetActivePartitionIds -- exported (id=0x2080018b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdGpuGetActivePartitionIds__ = &subdeviceCtrlCmdGpuGetActivePartitionIds_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) + // subdeviceCtrlCmdGpuGetPartitionCapacity -- exported (id=0x20800181) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) pThis->__subdeviceCtrlCmdGpuGetPartitionCapacity__ = &subdeviceCtrlCmdGpuGetPartitionCapacity_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdGpuDescribePartitions -- exported (id=0x20800185) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdGpuDescribePartitions__ = &subdeviceCtrlCmdGpuDescribePartitions_IMPL; #endif + // subdeviceCtrlCmdGpuSetPartitioningMode -- exported (id=0x20800183) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__subdeviceCtrlCmdGpuSetPartitioningMode__ = &subdeviceCtrlCmdGpuSetPartitioningMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // subdeviceCtrlCmdGrmgrGetGrFsInfo -- exported (id=0x20803801) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__subdeviceCtrlCmdGrmgrGetGrFsInfo__ = &subdeviceCtrlCmdGrmgrGetGrFsInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdGpuSetPartitions -- exported (id=0x20800174) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdGpuSetPartitions__ = &subdeviceCtrlCmdGpuSetPartitions_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x850u) + // subdeviceCtrlCmdGpuGetPartitions -- exported (id=0x20800175) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__subdeviceCtrlCmdGpuGetPartitions__ = &subdeviceCtrlCmdGpuGetPartitions_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // subdeviceCtrlCmdGpuGetComputeProfiles -- exported (id=0x208001a2) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdGpuGetComputeProfiles__ = &subdeviceCtrlCmdGpuGetComputeProfiles_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) + // subdeviceCtrlCmdInternalStaticKMIGmgrGetProfiles -- exported (id=0x20800a63) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) pThis->__subdeviceCtrlCmdInternalStaticKMIGmgrGetProfiles__ = &subdeviceCtrlCmdInternalStaticKMIGmgrGetProfiles_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) + // subdeviceCtrlCmdInternalStaticKMIGmgrGetPartitionableEngines -- exported (id=0x20800a65) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) pThis->__subdeviceCtrlCmdInternalStaticKMIGmgrGetPartitionableEngines__ = &subdeviceCtrlCmdInternalStaticKMIGmgrGetPartitionableEngines_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) + // subdeviceCtrlCmdInternalStaticKMIGmgrGetSwizzIdFbMemPageRanges -- exported (id=0x20800a66) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) pThis->__subdeviceCtrlCmdInternalStaticKMIGmgrGetSwizzIdFbMemPageRanges__ = &subdeviceCtrlCmdInternalStaticKMIGmgrGetSwizzIdFbMemPageRanges_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) + // subdeviceCtrlCmdInternalStaticKMIGmgrGetComputeInstanceProfiles -- exported (id=0x20800aba) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) pThis->__subdeviceCtrlCmdInternalStaticKMIGmgrGetComputeInstanceProfiles__ = &subdeviceCtrlCmdInternalStaticKMIGmgrGetComputeInstanceProfiles_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400u) + // subdeviceCtrlCmdInternalKMIGmgrExportGPUInstance -- exported (id=0x20800aa7) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80u) pThis->__subdeviceCtrlCmdInternalKMIGmgrExportGPUInstance__ = &subdeviceCtrlCmdInternalKMIGmgrExportGPUInstance_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400u) + // subdeviceCtrlCmdInternalKMIGmgrImportGPUInstance -- exported (id=0x20800aa9) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80u) pThis->__subdeviceCtrlCmdInternalKMIGmgrImportGPUInstance__ = &subdeviceCtrlCmdInternalKMIGmgrImportGPUInstance_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2600u) + // subdeviceCtrlCmdInternalKMIGmgrPromoteGpuInstanceMemRange -- exported (id=0x20800a44) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2c0u) pThis->__subdeviceCtrlCmdInternalKMIGmgrPromoteGpuInstanceMemRange__ = &subdeviceCtrlCmdInternalKMIGmgrPromoteGpuInstanceMemRange_IMPL; #endif + // subdeviceCtrlCmdOsUnixGc6BlockerRefCnt -- exported (id=0x20803d01) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x3u) pThis->__subdeviceCtrlCmdOsUnixGc6BlockerRefCnt__ = &subdeviceCtrlCmdOsUnixGc6BlockerRefCnt_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x11u) + // subdeviceCtrlCmdOsUnixAllowDisallowGcoff -- exported (id=0x20803d02) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) pThis->__subdeviceCtrlCmdOsUnixAllowDisallowGcoff__ = &subdeviceCtrlCmdOsUnixAllowDisallowGcoff_IMPL; #endif + // subdeviceCtrlCmdOsUnixAudioDynamicPower -- exported (id=0x20803d03) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1u) pThis->__subdeviceCtrlCmdOsUnixAudioDynamicPower__ = &subdeviceCtrlCmdOsUnixAudioDynamicPower_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x13u) + // subdeviceCtrlCmdOsUnixVidmemPersistenceStatus -- exported (id=0x20803d07) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xbu) pThis->__subdeviceCtrlCmdOsUnixVidmemPersistenceStatus__ = &subdeviceCtrlCmdOsUnixVidmemPersistenceStatus_IMPL; #endif + // subdeviceCtrlCmdOsUnixUpdateTgpStatus -- exported (id=0x20803d08) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) pThis->__subdeviceCtrlCmdOsUnixUpdateTgpStatus__ = &subdeviceCtrlCmdOsUnixUpdateTgpStatus_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdDisplayGetIpVersion -- exported (id=0x20800a4b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdDisplayGetIpVersion__ = &subdeviceCtrlCmdDisplayGetIpVersion_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdDisplayGetStaticInfo -- exported (id=0x20800a01) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdDisplayGetStaticInfo__ = &subdeviceCtrlCmdDisplayGetStaticInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdDisplaySetChannelPushbuffer -- exported (id=0x20800a58) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdDisplaySetChannelPushbuffer__ = &subdeviceCtrlCmdDisplaySetChannelPushbuffer_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdDisplayWriteInstMem -- exported (id=0x20800a49) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdDisplayWriteInstMem__ = &subdeviceCtrlCmdDisplayWriteInstMem_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdDisplaySetupRgLineIntr -- exported (id=0x20800a4d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdDisplaySetupRgLineIntr__ = &subdeviceCtrlCmdDisplaySetupRgLineIntr_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdDisplaySetImportedImpData -- exported (id=0x20800a54) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdDisplaySetImportedImpData__ = &subdeviceCtrlCmdDisplaySetImportedImpData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdDisplayGetDisplayMask -- exported (id=0x20800a5d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdDisplayGetDisplayMask__ = &subdeviceCtrlCmdDisplayGetDisplayMask_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdDisplayPinsetsToLockpins -- exported (id=0x20800adc) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdDisplayPinsetsToLockpins__ = &subdeviceCtrlCmdDisplayPinsetsToLockpins_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdDisplaySetSliLinkGpioSwControl -- exported (id=0x20800ade) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdDisplaySetSliLinkGpioSwControl__ = &subdeviceCtrlCmdDisplaySetSliLinkGpioSwControl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalGpioProgramDirection -- exported (id=0x20802300) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalGpioProgramDirection__ = &subdeviceCtrlCmdInternalGpioProgramDirection_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalGpioProgramOutput -- exported (id=0x20802301) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalGpioProgramOutput__ = &subdeviceCtrlCmdInternalGpioProgramOutput_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalGpioReadInput -- exported (id=0x20802302) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalGpioReadInput__ = &subdeviceCtrlCmdInternalGpioReadInput_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalGpioActivateHwFunction -- exported (id=0x20802303) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalGpioActivateHwFunction__ = &subdeviceCtrlCmdInternalGpioActivateHwFunction_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalDisplayAcpiSubsytemActivated -- exported (id=0x20800af0) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalDisplayAcpiSubsytemActivated__ = &subdeviceCtrlCmdInternalDisplayAcpiSubsytemActivated_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalDisplayPreModeSet -- exported (id=0x20800af1) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalDisplayPreModeSet__ = &subdeviceCtrlCmdInternalDisplayPreModeSet_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalDisplayPostModeSet -- exported (id=0x20800af2) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalDisplayPostModeSet__ = &subdeviceCtrlCmdInternalDisplayPostModeSet_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdDisplayPreUnixConsole -- exported (id=0x20800a76) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdDisplayPreUnixConsole__ = &subdeviceCtrlCmdDisplayPreUnixConsole_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdDisplayPostUnixConsole -- exported (id=0x20800a77) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdDisplayPostUnixConsole__ = &subdeviceCtrlCmdDisplayPostUnixConsole_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4600u) - pThis->__subdeviceCtrlCmdMsencGetCaps__ = &subdeviceCtrlCmdMsencGetCaps_IMPL; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) + // subdeviceCtrlCmdInternalUvmRegisterAccessCntrBuffer -- exported (id=0x20800a1d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) pThis->__subdeviceCtrlCmdInternalUvmRegisterAccessCntrBuffer__ = &subdeviceCtrlCmdInternalUvmRegisterAccessCntrBuffer_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) + // subdeviceCtrlCmdInternalUvmUnregisterAccessCntrBuffer -- exported (id=0x20800a1e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) pThis->__subdeviceCtrlCmdInternalUvmUnregisterAccessCntrBuffer__ = &subdeviceCtrlCmdInternalUvmUnregisterAccessCntrBuffer_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x404600u) + // subdeviceCtrlCmdInternalGetChipInfo -- exported (id=0x20800a36) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x404c0u) pThis->__subdeviceCtrlCmdInternalGetChipInfo__ = &subdeviceCtrlCmdInternalGetChipInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4600u) + // subdeviceCtrlCmdInternalGetUserRegisterAccessMap -- exported (id=0x20800a41) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4c0u) pThis->__subdeviceCtrlCmdInternalGetUserRegisterAccessMap__ = &subdeviceCtrlCmdInternalGetUserRegisterAccessMap_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c4600u) + // subdeviceCtrlCmdInternalGetDeviceInfoTable -- exported (id=0x20800a40) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c4c0u) pThis->__subdeviceCtrlCmdInternalGetDeviceInfoTable__ = &subdeviceCtrlCmdInternalGetDeviceInfoTable_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalRecoverAllComputeContexts -- exported (id=0x20800a4a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalRecoverAllComputeContexts__ = &subdeviceCtrlCmdInternalRecoverAllComputeContexts_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalGetSmcMode -- exported (id=0x20800a4c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalGetSmcMode__ = &subdeviceCtrlCmdInternalGetSmcMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdIsEgpuBridge -- exported (id=0x20800a55) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdIsEgpuBridge__ = &subdeviceCtrlCmdIsEgpuBridge_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalGpuGetGspRmFreeHeap -- exported (id=0x20800aeb) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + pThis->__subdeviceCtrlCmdInternalGpuGetGspRmFreeHeap__ = &subdeviceCtrlCmdInternalGpuGetGspRmFreeHeap_IMPL; +#endif + + // subdeviceCtrlCmdInternalBusFlushWithSysmembar -- exported (id=0x20800a70) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalBusFlushWithSysmembar__ = &subdeviceCtrlCmdInternalBusFlushWithSysmembar_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalBusSetupP2pMailboxLocal -- exported (id=0x20800a71) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalBusSetupP2pMailboxLocal__ = &subdeviceCtrlCmdInternalBusSetupP2pMailboxLocal_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalBusSetupP2pMailboxRemote -- exported (id=0x20800a72) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalBusSetupP2pMailboxRemote__ = &subdeviceCtrlCmdInternalBusSetupP2pMailboxRemote_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalBusDestroyP2pMailbox -- exported (id=0x20800a73) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalBusDestroyP2pMailbox__ = &subdeviceCtrlCmdInternalBusDestroyP2pMailbox_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalBusCreateC2cPeerMapping -- exported (id=0x20800a74) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalBusCreateC2cPeerMapping__ = &subdeviceCtrlCmdInternalBusCreateC2cPeerMapping_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping -- exported (id=0x20800a75) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping__ = &subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries -- exported (id=0x20800a57) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries__ = &subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) + // subdeviceCtrlCmdGmmuGetStaticInfo -- exported (id=0x20800a59) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) pThis->__subdeviceCtrlCmdGmmuGetStaticInfo__ = &subdeviceCtrlCmdGmmuGetStaticInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) + // subdeviceCtrlCmdInternalGmmuRegisterFaultBuffer -- exported (id=0x20800a9b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) pThis->__subdeviceCtrlCmdInternalGmmuRegisterFaultBuffer__ = &subdeviceCtrlCmdInternalGmmuRegisterFaultBuffer_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400600u) + // subdeviceCtrlCmdInternalGmmuUnregisterFaultBuffer -- exported (id=0x20800a9c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) pThis->__subdeviceCtrlCmdInternalGmmuUnregisterFaultBuffer__ = &subdeviceCtrlCmdInternalGmmuUnregisterFaultBuffer_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalGmmuRegisterClientShadowFaultBuffer -- exported (id=0x20800a9d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalGmmuRegisterClientShadowFaultBuffer__ = &subdeviceCtrlCmdInternalGmmuRegisterClientShadowFaultBuffer_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalGmmuUnregisterClientShadowFaultBuffer -- exported (id=0x20800a9e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalGmmuUnregisterClientShadowFaultBuffer__ = &subdeviceCtrlCmdInternalGmmuUnregisterClientShadowFaultBuffer_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalGmmuCopyReservedSplitGVASpacePdesServer -- exported (id=0x20800a9f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalGmmuCopyReservedSplitGVASpacePdesServer__ = &subdeviceCtrlCmdInternalGmmuCopyReservedSplitGVASpacePdesServer_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100e40u) + // subdeviceCtrlCmdCeGetPhysicalCaps -- exported (id=0x20802a07) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x101d0u) pThis->__subdeviceCtrlCmdCeGetPhysicalCaps__ = &subdeviceCtrlCmdCeGetPhysicalCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xe40u) + // subdeviceCtrlCmdCeGetAllPhysicalCaps -- exported (id=0x20802a0b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d0u) pThis->__subdeviceCtrlCmdCeGetAllPhysicalCaps__ = &subdeviceCtrlCmdCeGetAllPhysicalCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdCeUpdateClassDB -- exported (id=0x20802a06) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdCeUpdateClassDB__ = &subdeviceCtrlCmdCeUpdateClassDB_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0200u) + // subdeviceCtrlCmdCeGetFaultMethodBufferSize -- exported (id=0x20802a08) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c040u) pThis->__subdeviceCtrlCmdCeGetFaultMethodBufferSize__ = &subdeviceCtrlCmdCeGetFaultMethodBufferSize_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4600u) + // subdeviceCtrlCmdCeGetHubPceMask -- exported (id=0x20802a09) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4c0u) pThis->__subdeviceCtrlCmdCeGetHubPceMask__ = &subdeviceCtrlCmdCeGetHubPceMask_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdIntrGetKernelTable -- exported (id=0x20800a5c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdIntrGetKernelTable__ = &subdeviceCtrlCmdIntrGetKernelTable_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) + // subdeviceCtrlCmdInternalPerfCudaLimitDisable -- exported (id=0x20800a7a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) pThis->__subdeviceCtrlCmdInternalPerfCudaLimitDisable__ = &subdeviceCtrlCmdInternalPerfCudaLimitDisable_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalPerfOptpCliClear -- exported (id=0x20800a7c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalPerfOptpCliClear__ = &subdeviceCtrlCmdInternalPerfOptpCliClear_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) + // subdeviceCtrlCmdInternalPerfBoostSet_2x -- exported (id=0x20800a9a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) pThis->__subdeviceCtrlCmdInternalPerfBoostSet_2x__ = &subdeviceCtrlCmdInternalPerfBoostSet_2x_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) + // subdeviceCtrlCmdInternalPerfBoostSet_3x -- exported (id=0x20800aa0) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) pThis->__subdeviceCtrlCmdInternalPerfBoostSet_3x__ = &subdeviceCtrlCmdInternalPerfBoostSet_3x_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) + // subdeviceCtrlCmdInternalPerfBoostClear_3x -- exported (id=0x20800aa1) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) pThis->__subdeviceCtrlCmdInternalPerfBoostClear_3x__ = &subdeviceCtrlCmdInternalPerfBoostClear_3x_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalPerfGpuBoostSyncSetControl -- exported (id=0x20800a7e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalPerfGpuBoostSyncSetControl__ = &subdeviceCtrlCmdInternalPerfGpuBoostSyncSetControl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalPerfGpuBoostSyncGetInfo -- exported (id=0x20800a80) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalPerfGpuBoostSyncGetInfo__ = &subdeviceCtrlCmdInternalPerfGpuBoostSyncGetInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalPerfSyncGpuBoostSetLimits -- exported (id=0x20800a7f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalPerfSyncGpuBoostSetLimits__ = &subdeviceCtrlCmdInternalPerfSyncGpuBoostSetLimits_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) + // subdeviceCtrlCmdInternalPerfPerfmonClientReservationCheck -- exported (id=0x20800a98) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) pThis->__subdeviceCtrlCmdInternalPerfPerfmonClientReservationCheck__ = &subdeviceCtrlCmdInternalPerfPerfmonClientReservationCheck_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x610u) + // subdeviceCtrlCmdInternalPerfPerfmonClientReservationSet -- exported (id=0x20800a99) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) pThis->__subdeviceCtrlCmdInternalPerfPerfmonClientReservationSet__ = &subdeviceCtrlCmdInternalPerfPerfmonClientReservationSet_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalPerfCfControllerSetMaxVGpuVMCount -- exported (id=0x20800ab1) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalPerfCfControllerSetMaxVGpuVMCount__ = &subdeviceCtrlCmdInternalPerfCfControllerSetMaxVGpuVMCount_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalPerfGetAuxPowerState -- exported (id=0x20800a81) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalPerfGetAuxPowerState__ = &subdeviceCtrlCmdInternalPerfGetAuxPowerState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalGcxEntryPrerequisite -- exported (id=0x2080a7d7) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalGcxEntryPrerequisite__ = &subdeviceCtrlCmdInternalGcxEntryPrerequisite_IMPL; #endif - // Hal function -- subdeviceCtrlCmdBifGetStaticInfo + // subdeviceCtrlCmdBifGetStaticInfo -- halified (2 hals) exported (id=0x20800aac) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__subdeviceCtrlCmdBifGetStaticInfo__ = &subdeviceCtrlCmdBifGetStaticInfo_VGPUSTUB; + pThis->__subdeviceCtrlCmdBifGetStaticInfo__ = &subdeviceCtrlCmdBifGetStaticInfo_VF; } else { pThis->__subdeviceCtrlCmdBifGetStaticInfo__ = &subdeviceCtrlCmdBifGetStaticInfo_92bfc3; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xe40u) + // subdeviceCtrlCmdBifGetAspmL1Flags -- exported (id=0x20800ab0) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d0u) pThis->__subdeviceCtrlCmdBifGetAspmL1Flags__ = &subdeviceCtrlCmdBifGetAspmL1Flags_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdBifSetPcieRo -- exported (id=0x20800ab9) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdBifSetPcieRo__ = &subdeviceCtrlCmdBifSetPcieRo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdBifDisableSystemMemoryAccess -- exported (id=0x20800adb) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdBifDisableSystemMemoryAccess__ = &subdeviceCtrlCmdBifDisableSystemMemoryAccess_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdHshubPeerConnConfig -- exported (id=0x20800a88) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdHshubPeerConnConfig__ = &subdeviceCtrlCmdHshubPeerConnConfig_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdHshubFirstLinkPeerId -- exported (id=0x20800a89) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdHshubFirstLinkPeerId__ = &subdeviceCtrlCmdHshubFirstLinkPeerId_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdHshubGetHshubIdForLinks -- exported (id=0x20800a8a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdHshubGetHshubIdForLinks__ = &subdeviceCtrlCmdHshubGetHshubIdForLinks_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdHshubGetNumUnits -- exported (id=0x20800a8b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdHshubGetNumUnits__ = &subdeviceCtrlCmdHshubGetNumUnits_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdHshubNextHshubId -- exported (id=0x20800a8c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdHshubNextHshubId__ = &subdeviceCtrlCmdHshubNextHshubId_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdHshubEgmConfig -- exported (id=0x20800a8d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdHshubEgmConfig__ = &subdeviceCtrlCmdHshubEgmConfig_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalNvlinkEnableComputePeerAddr -- exported (id=0x20800aad) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalNvlinkEnableComputePeerAddr__ = &subdeviceCtrlCmdInternalNvlinkEnableComputePeerAddr_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalNvlinkGetSetNvswitchFabricAddr -- exported (id=0x20800aae) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalNvlinkGetSetNvswitchFabricAddr__ = &subdeviceCtrlCmdInternalNvlinkGetSetNvswitchFabricAddr_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100600u) + // subdeviceCtrlCmdInternalNvlinkGetNumActiveLinksPerIoctrl -- exported (id=0x20800ac7) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100c0u) pThis->__subdeviceCtrlCmdInternalNvlinkGetNumActiveLinksPerIoctrl__ = &subdeviceCtrlCmdInternalNvlinkGetNumActiveLinksPerIoctrl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100600u) + // subdeviceCtrlCmdInternalNvlinkGetTotalNumLinksPerIoctrl -- exported (id=0x20800ac8) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100c0u) pThis->__subdeviceCtrlCmdInternalNvlinkGetTotalNumLinksPerIoctrl__ = &subdeviceCtrlCmdInternalNvlinkGetTotalNumLinksPerIoctrl_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalSetP2pCaps -- exported (id=0x20800ab5) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalSetP2pCaps__ = &subdeviceCtrlCmdInternalSetP2pCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalRemoveP2pCaps -- exported (id=0x20800ab6) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalRemoveP2pCaps__ = &subdeviceCtrlCmdInternalRemoveP2pCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalGetPcieP2pCaps -- exported (id=0x20800ab8) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalGetPcieP2pCaps__ = &subdeviceCtrlCmdInternalGetPcieP2pCaps_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - pThis->__subdeviceCtrlCmdInternalGetCoherentFbApertureSize__ = &subdeviceCtrlCmdInternalGetCoherentFbApertureSize_IMPL; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalGetLocalAtsConfig -- exported (id=0x20800afb) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalGetLocalAtsConfig__ = &subdeviceCtrlCmdInternalGetLocalAtsConfig_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalSetPeerAtsConfig -- exported (id=0x20800afc) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalSetPeerAtsConfig__ = &subdeviceCtrlCmdInternalSetPeerAtsConfig_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalInitGpuIntr -- exported (id=0x20800abe) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalInitGpuIntr__ = &subdeviceCtrlCmdInternalInitGpuIntr_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalGsyncOptimizeTiming -- exported (id=0x20800abf) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalGsyncOptimizeTiming__ = &subdeviceCtrlCmdInternalGsyncOptimizeTiming_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalGsyncGetDisplayIds -- exported (id=0x20800ac0) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalGsyncGetDisplayIds__ = &subdeviceCtrlCmdInternalGsyncGetDisplayIds_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalGsyncSetStereoSync -- exported (id=0x20800ac1) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalGsyncSetStereoSync__ = &subdeviceCtrlCmdInternalGsyncSetStereoSync_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalGsyncGetVactiveLines -- exported (id=0x20800ac4) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalGsyncGetVactiveLines__ = &subdeviceCtrlCmdInternalGsyncGetVactiveLines_IMPL; #endif +} // End __nvoc_init_funcTable_Subdevice_2 with approximately 263 basic block(s). + +// Vtable initialization 3/3 +static void __nvoc_init_funcTable_Subdevice_3(Subdevice *pThis, RmHalspecOwner *pRmhalspecowner) { + RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; + const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; + PORT_UNREFERENCED_VARIABLE(pThis); + PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); + PORT_UNREFERENCED_VARIABLE(rmVariantHal); + PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalGsyncIsDisplayIdValid -- exported (id=0x20800ac9) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalGsyncIsDisplayIdValid__ = &subdeviceCtrlCmdInternalGsyncIsDisplayIdValid_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync -- exported (id=0x20800aca) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync__ = &subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalFbsrInit -- exported (id=0x20800ac2) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalFbsrInit__ = &subdeviceCtrlCmdInternalFbsrInit_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - pThis->__subdeviceCtrlCmdInternalFbsrSendRegionInfo__ = &subdeviceCtrlCmdInternalFbsrSendRegionInfo_IMPL; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalPostInitBrightcStateLoad -- exported (id=0x20800ac6) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalPostInitBrightcStateLoad__ = &subdeviceCtrlCmdInternalPostInitBrightcStateLoad_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalSetStaticEdidData -- exported (id=0x20800adf) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalSetStaticEdidData__ = &subdeviceCtrlCmdInternalSetStaticEdidData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalSmbpbiPfmReqHndlrCapUpdate -- exported (id=0x20800acb) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalSmbpbiPfmReqHndlrCapUpdate__ = &subdeviceCtrlCmdInternalSmbpbiPfmReqHndlrCapUpdate_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalPmgrPfmReqHndlrStateLoadSync -- exported (id=0x20800acc) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalPmgrPfmReqHndlrStateLoadSync__ = &subdeviceCtrlCmdInternalPmgrPfmReqHndlrStateLoadSync_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalThermPfmReqHndlrStateInitSync -- exported (id=0x20800acd) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalThermPfmReqHndlrStateInitSync__ = &subdeviceCtrlCmdInternalThermPfmReqHndlrStateInitSync_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalPerfPfmReqHndlrGetPm1State -- exported (id=0x20800ace) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalPerfPfmReqHndlrGetPm1State__ = &subdeviceCtrlCmdInternalPerfPfmReqHndlrGetPm1State_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalPerfPfmReqHndlrSetPm1State -- exported (id=0x20800acf) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalPerfPfmReqHndlrSetPm1State__ = &subdeviceCtrlCmdInternalPerfPfmReqHndlrSetPm1State_IMPL; #endif -} -static void __nvoc_init_funcTable_Subdevice_3(Subdevice *pThis, RmHalspecOwner *pRmhalspecowner) { - RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; - const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; - PORT_UNREFERENCED_VARIABLE(pThis); - PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); - PORT_UNREFERENCED_VARIABLE(rmVariantHal); - PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalPmgrPfmReqHndlrUpdateEdppLimit -- exported (id=0x20800ad0) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalPmgrPfmReqHndlrUpdateEdppLimit__ = &subdeviceCtrlCmdInternalPmgrPfmReqHndlrUpdateEdppLimit_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalPmgrPfmReqHndlrGetEdppLimitInfo -- exported (id=0x20800afd) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalPmgrPfmReqHndlrGetEdppLimitInfo__ = &subdeviceCtrlCmdInternalPmgrPfmReqHndlrGetEdppLimitInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalThermPfmReqHndlrUpdateTgpuLimit -- exported (id=0x20800ad1) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalThermPfmReqHndlrUpdateTgpuLimit__ = &subdeviceCtrlCmdInternalThermPfmReqHndlrUpdateTgpuLimit_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTgpMode -- exported (id=0x20800ad2) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTgpMode__ = &subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTgpMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTurboV2 -- exported (id=0x20800ad3) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTurboV2__ = &subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTurboV2_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateInfo -- exported (id=0x20800ad4) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateInfo__ = &subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateMapping -- exported (id=0x20800ad5) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateMapping__ = &subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateMapping_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalPerfPfmReqHndlrSetVpstate -- exported (id=0x20800ad6) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalPerfPfmReqHndlrSetVpstate__ = &subdeviceCtrlCmdInternalPerfPfmReqHndlrSetVpstate_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalPmgrUnsetDynamicBoostLimit -- exported (id=0x20800a7b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalPmgrUnsetDynamicBoostLimit__ = &subdeviceCtrlCmdInternalPmgrUnsetDynamicBoostLimit_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalDetectHsVideoBridge -- exported (id=0x20800add) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalDetectHsVideoBridge__ = &subdeviceCtrlCmdInternalDetectHsVideoBridge_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalConfComputeGetStaticInfo -- exported (id=0x20800af3) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalConfComputeGetStaticInfo__ = &subdeviceCtrlCmdInternalConfComputeGetStaticInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalConfComputeDeriveSwlKeys -- exported (id=0x20800ae1) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalConfComputeDeriveSwlKeys__ = &subdeviceCtrlCmdInternalConfComputeDeriveSwlKeys_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalConfComputeDeriveLceKeys -- exported (id=0x20800ae2) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalConfComputeDeriveLceKeys__ = &subdeviceCtrlCmdInternalConfComputeDeriveLceKeys_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalConfComputeRotateKeys -- exported (id=0x20800ae5) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalConfComputeRotateKeys__ = &subdeviceCtrlCmdInternalConfComputeRotateKeys_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalConfComputeRCChannelsForKeyRotation -- exported (id=0x20800ae6) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalConfComputeRCChannelsForKeyRotation__ = &subdeviceCtrlCmdInternalConfComputeRCChannelsForKeyRotation_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalConfComputeSetGpuState -- exported (id=0x20800ae7) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalConfComputeSetGpuState__ = &subdeviceCtrlCmdInternalConfComputeSetGpuState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalConfComputeSetSecurityPolicy -- exported (id=0x20800ae8) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalConfComputeSetSecurityPolicy__ = &subdeviceCtrlCmdInternalConfComputeSetSecurityPolicy_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalInitUserSharedData -- exported (id=0x20800afe) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalInitUserSharedData__ = &subdeviceCtrlCmdInternalInitUserSharedData_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalUserSharedDataSetDataPoll -- exported (id=0x20800aff) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalUserSharedDataSetDataPoll__ = &subdeviceCtrlCmdInternalUserSharedDataSetDataPoll_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x640u) + // subdeviceCtrlCmdInternalGspStartTrace -- exported (id=0x208001e3) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) pThis->__subdeviceCtrlCmdInternalGspStartTrace__ = &subdeviceCtrlCmdInternalGspStartTrace_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter -- exported (id=0x20800ae9) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) + pThis->__subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter__ = &subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter_IMPL; +#endif + + // subdeviceCtrlCmdVgpuMgrInternalBootloadGspVgpuPluginTask -- exported (id=0x20804001) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdVgpuMgrInternalBootloadGspVgpuPluginTask__ = &subdeviceCtrlCmdVgpuMgrInternalBootloadGspVgpuPluginTask_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdVgpuMgrInternalShutdownGspVgpuPluginTask -- exported (id=0x20804002) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdVgpuMgrInternalShutdownGspVgpuPluginTask__ = &subdeviceCtrlCmdVgpuMgrInternalShutdownGspVgpuPluginTask_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdVgpuMgrInternalPgpuAddVgpuType -- exported (id=0x20804003) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdVgpuMgrInternalPgpuAddVgpuType__ = &subdeviceCtrlCmdVgpuMgrInternalPgpuAddVgpuType_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdVgpuMgrInternalEnumerateVgpuPerPgpu -- exported (id=0x20804004) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdVgpuMgrInternalEnumerateVgpuPerPgpu__ = &subdeviceCtrlCmdVgpuMgrInternalEnumerateVgpuPerPgpu_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdVgpuMgrInternalClearGuestVmInfo -- exported (id=0x20804005) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdVgpuMgrInternalClearGuestVmInfo__ = &subdeviceCtrlCmdVgpuMgrInternalClearGuestVmInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdVgpuMgrInternalGetVgpuFbUsage -- exported (id=0x20804006) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdVgpuMgrInternalGetVgpuFbUsage__ = &subdeviceCtrlCmdVgpuMgrInternalGetVgpuFbUsage_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity -- exported (id=0x20804007) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity__ = &subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdVgpuMgrInternalCleanupGspVgpuPluginResources -- exported (id=0x20804008) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdVgpuMgrInternalCleanupGspVgpuPluginResources__ = &subdeviceCtrlCmdVgpuMgrInternalCleanupGspVgpuPluginResources_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdVgpuMgrInternalGetPgpuFsEncoding -- exported (id=0x20804009) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdVgpuMgrInternalGetPgpuFsEncoding__ = &subdeviceCtrlCmdVgpuMgrInternalGetPgpuFsEncoding_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdVgpuMgrInternalGetPgpuMigrationSupport -- exported (id=0x2080400a) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdVgpuMgrInternalGetPgpuMigrationSupport__ = &subdeviceCtrlCmdVgpuMgrInternalGetPgpuMigrationSupport_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig -- exported (id=0x2080400b) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig__ = &subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdVgpuMgrInternalFreeStates -- exported (id=0x2080400c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdVgpuMgrInternalFreeStates__ = &subdeviceCtrlCmdVgpuMgrInternalFreeStates_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xa50u) + // subdeviceCtrlCmdGetAvailableHshubMask -- exported (id=0x20804101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) pThis->__subdeviceCtrlCmdGetAvailableHshubMask__ = &subdeviceCtrlCmdGetAvailableHshubMask_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xa50u) + // subdeviceCtrlSetEcThrottleMode -- exported (id=0x20804102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) pThis->__subdeviceCtrlSetEcThrottleMode__ = &subdeviceCtrlSetEcThrottleMode_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdCcuMap -- exported (id=0x20800ab3) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdCcuMap__ = &subdeviceCtrlCmdCcuMap_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdCcuUnmap -- exported (id=0x20800ab4) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdCcuUnmap__ = &subdeviceCtrlCmdCcuUnmap_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) + // subdeviceCtrlCmdCcuSetStreamState -- exported (id=0x20800abd) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdCcuSetStreamState__ = &subdeviceCtrlCmdCcuSetStreamState_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x600u) - pThis->__subdeviceCtrlCmdSpdmPartition__ = &subdeviceCtrlCmdSpdmPartition_IMPL; + // subdeviceCtrlCmdCcuGetSampleInfo -- exported (id=0x20800ab2) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + pThis->__subdeviceCtrlCmdCcuGetSampleInfo__ = &subdeviceCtrlCmdCcuGetSampleInfo_IMPL; #endif - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ = &__nvoc_thunk_Subdevice_resPreDestruct; - - pThis->__nvoc_base_GpuResource.__gpuresInternalControlForward__ = &__nvoc_thunk_Subdevice_gpuresInternalControlForward; + // subdeviceCtrlCmdSpdmPartition -- exported (id=0x20800ad9) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + pThis->__subdeviceCtrlCmdSpdmPartition__ = &subdeviceCtrlCmdSpdmPartition_IMPL; +#endif - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ = &__nvoc_thunk_Subdevice_resControlFilter; + // subdeviceControl -- virtual inherited (gpures) base (gpures) + pThis->__subdeviceControl__ = &__nvoc_up_thunk_GpuResource_subdeviceControl; - pThis->__subdeviceShareCallback__ = &__nvoc_thunk_GpuResource_subdeviceShareCallback; + // subdeviceMap -- virtual inherited (gpures) base (gpures) + pThis->__subdeviceMap__ = &__nvoc_up_thunk_GpuResource_subdeviceMap; - pThis->__subdeviceCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_subdeviceCheckMemInterUnmap; + // subdeviceUnmap -- virtual inherited (gpures) base (gpures) + pThis->__subdeviceUnmap__ = &__nvoc_up_thunk_GpuResource_subdeviceUnmap; - pThis->__subdeviceGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_subdeviceGetOrAllocNotifShare; + // subdeviceShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__subdeviceShareCallback__ = &__nvoc_up_thunk_GpuResource_subdeviceShareCallback; - pThis->__subdeviceMapTo__ = &__nvoc_thunk_RsResource_subdeviceMapTo; + // subdeviceGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__subdeviceGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_subdeviceGetRegBaseOffsetAndSize; - pThis->__subdeviceGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_subdeviceGetMapAddrSpace; + // subdeviceGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__subdeviceGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_subdeviceGetMapAddrSpace; - pThis->__subdeviceSetNotificationShare__ = &__nvoc_thunk_Notifier_subdeviceSetNotificationShare; + // subdeviceGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__subdeviceGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_subdeviceGetInternalObjectHandle; - pThis->__subdeviceGetRefCount__ = &__nvoc_thunk_RsResource_subdeviceGetRefCount; + // subdeviceAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__subdeviceAccessCallback__ = &__nvoc_up_thunk_RmResource_subdeviceAccessCallback; - pThis->__subdeviceAddAdditionalDependants__ = &__nvoc_thunk_RsResource_subdeviceAddAdditionalDependants; + // subdeviceGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__subdeviceGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_subdeviceGetMemInterMapParams; - pThis->__subdeviceControl_Prologue__ = &__nvoc_thunk_RmResource_subdeviceControl_Prologue; + // subdeviceCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__subdeviceCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_subdeviceCheckMemInterUnmap; - pThis->__subdeviceGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_subdeviceGetRegBaseOffsetAndSize; + // subdeviceGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__subdeviceGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_subdeviceGetMemoryMappingDescriptor; - pThis->__subdeviceUnmapFrom__ = &__nvoc_thunk_RsResource_subdeviceUnmapFrom; + // subdeviceControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__subdeviceControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_subdeviceControlSerialization_Prologue; - pThis->__subdeviceControl_Epilogue__ = &__nvoc_thunk_RmResource_subdeviceControl_Epilogue; + // subdeviceControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__subdeviceControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_subdeviceControlSerialization_Epilogue; - pThis->__subdeviceGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_subdeviceGetInternalObjectHandle; + // subdeviceControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__subdeviceControl_Prologue__ = &__nvoc_up_thunk_RmResource_subdeviceControl_Prologue; - pThis->__subdeviceControl__ = &__nvoc_thunk_GpuResource_subdeviceControl; + // subdeviceControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__subdeviceControl_Epilogue__ = &__nvoc_up_thunk_RmResource_subdeviceControl_Epilogue; - pThis->__subdeviceUnmap__ = &__nvoc_thunk_GpuResource_subdeviceUnmap; + // subdeviceCanCopy -- virtual inherited (res) base (gpures) + pThis->__subdeviceCanCopy__ = &__nvoc_up_thunk_RsResource_subdeviceCanCopy; - pThis->__subdeviceGetMemInterMapParams__ = &__nvoc_thunk_RmResource_subdeviceGetMemInterMapParams; + // subdeviceIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__subdeviceIsDuplicate__ = &__nvoc_up_thunk_RsResource_subdeviceIsDuplicate; - pThis->__subdeviceGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_subdeviceGetMemoryMappingDescriptor; + // subdeviceIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__subdeviceIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_subdeviceIsPartialUnmapSupported; - pThis->__subdeviceUnregisterEvent__ = &__nvoc_thunk_Notifier_subdeviceUnregisterEvent; + // subdeviceMapTo -- virtual inherited (res) base (gpures) + pThis->__subdeviceMapTo__ = &__nvoc_up_thunk_RsResource_subdeviceMapTo; - pThis->__subdeviceControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_subdeviceControlSerialization_Prologue; + // subdeviceUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__subdeviceUnmapFrom__ = &__nvoc_up_thunk_RsResource_subdeviceUnmapFrom; - pThis->__subdeviceCanCopy__ = &__nvoc_thunk_RsResource_subdeviceCanCopy; + // subdeviceGetRefCount -- virtual inherited (res) base (gpures) + pThis->__subdeviceGetRefCount__ = &__nvoc_up_thunk_RsResource_subdeviceGetRefCount; - pThis->__subdeviceIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_subdeviceIsPartialUnmapSupported; + // subdeviceAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__subdeviceAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_subdeviceAddAdditionalDependants; - pThis->__subdeviceIsDuplicate__ = &__nvoc_thunk_RsResource_subdeviceIsDuplicate; + // subdeviceGetNotificationListPtr -- virtual inherited (notify) base (notify) + pThis->__subdeviceGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_subdeviceGetNotificationListPtr; - pThis->__subdeviceControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_subdeviceControlSerialization_Epilogue; + // subdeviceGetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__subdeviceGetNotificationShare__ = &__nvoc_up_thunk_Notifier_subdeviceGetNotificationShare; - pThis->__subdeviceGetNotificationListPtr__ = &__nvoc_thunk_Notifier_subdeviceGetNotificationListPtr; + // subdeviceSetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__subdeviceSetNotificationShare__ = &__nvoc_up_thunk_Notifier_subdeviceSetNotificationShare; - pThis->__subdeviceGetNotificationShare__ = &__nvoc_thunk_Notifier_subdeviceGetNotificationShare; + // subdeviceUnregisterEvent -- virtual inherited (notify) base (notify) + pThis->__subdeviceUnregisterEvent__ = &__nvoc_up_thunk_Notifier_subdeviceUnregisterEvent; - pThis->__subdeviceMap__ = &__nvoc_thunk_GpuResource_subdeviceMap; + // subdeviceGetOrAllocNotifShare -- virtual inherited (notify) base (notify) + pThis->__subdeviceGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_subdeviceGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_Subdevice_3 with approximately 77 basic block(s). - pThis->__subdeviceAccessCallback__ = &__nvoc_thunk_RmResource_subdeviceAccessCallback; -} +// Initialize vtable(s) for 567 virtual method(s). void __nvoc_init_funcTable_Subdevice(Subdevice *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 567 per-object function pointer(s). + // To reduce stack pressure with some unoptimized builds, the logic is distributed among 3 functions. __nvoc_init_funcTable_Subdevice_1(pThis, pRmhalspecowner); __nvoc_init_funcTable_Subdevice_2(pThis, pRmhalspecowner); __nvoc_init_funcTable_Subdevice_3(pThis, pRmhalspecowner); diff --git a/src/nvidia/generated/g_subdevice_nvoc.h b/src/nvidia/generated/g_subdevice_nvoc.h index b8250ec8f9..237af4d6e0 100644 --- a/src/nvidia/generated/g_subdevice_nvoc.h +++ b/src/nvidia/generated/g_subdevice_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_SUBDEVICE_NVOC_H_ #define _G_SUBDEVICE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_subdevice_nvoc.h" #ifndef _SUBDEVICE_H_ @@ -45,6 +53,9 @@ extern "C" { #include "class/cl2080.h" #include "ctrl/ctrl2080.h" // rmcontrol parameters +typedef struct TMR_EVENT TMR_EVENT; + + struct Device; #ifndef __NVOC_CLASS_Device_TYPEDEF__ @@ -57,6 +68,7 @@ typedef struct Device Device; #endif /* __nvoc_class_id_Device */ + struct OBJGPU; #ifndef __NVOC_CLASS_OBJGPU_TYPEDEF__ @@ -69,6 +81,7 @@ typedef struct OBJGPU OBJGPU; #endif /* __nvoc_class_id_OBJGPU */ + struct Memory; #ifndef __NVOC_CLASS_Memory_TYPEDEF__ @@ -81,6 +94,7 @@ typedef struct Memory Memory; #endif /* __nvoc_class_id_Memory */ + struct P2PApi; #ifndef __NVOC_CLASS_P2PApi_TYPEDEF__ @@ -109,587 +123,596 @@ typedef struct P2PApi P2PApi; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct Subdevice { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; struct Notifier __nvoc_base_Notifier; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct Subdevice *__nvoc_pbase_Subdevice; - void (*__subdevicePreDestruct__)(struct Subdevice *); - NV_STATUS (*__subdeviceInternalControlForward__)(struct Subdevice *, NvU32, void *, NvU32); - NV_STATUS (*__subdeviceControlFilter__)(struct Subdevice *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__subdeviceCtrlCmdBiosGetInfoV2__)(struct Subdevice *, NV2080_CTRL_BIOS_GET_INFO_V2_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBiosGetNbsiV2__)(struct Subdevice *, NV2080_CTRL_BIOS_GET_NBSI_V2_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBiosGetSKUInfo__)(struct Subdevice *, NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBiosGetPostTime__)(struct Subdevice *, NV2080_CTRL_CMD_BIOS_GET_POST_TIME_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBiosGetUefiSupport__)(struct Subdevice *, NV2080_CTRL_BIOS_GET_UEFI_SUPPORT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdMcGetArchInfo__)(struct Subdevice *, NV2080_CTRL_MC_GET_ARCH_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdMcGetManufacturer__)(struct Subdevice *, NV2080_CTRL_MC_GET_MANUFACTURER_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdMcQueryHostclkSlowdownStatus__)(struct Subdevice *, NV2080_CTRL_MC_QUERY_HOSTCLK_SLOWDOWN_STATUS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdMcSetHostclkSlowdownStatus__)(struct Subdevice *, NV2080_CTRL_MC_SET_HOSTCLK_SLOWDOWN_STATUS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdMcChangeReplayableFaultOwnership__)(struct Subdevice *, NV2080_CTRL_MC_CHANGE_REPLAYABLE_FAULT_OWNERSHIP_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdMcServiceInterrupts__)(struct Subdevice *, NV2080_CTRL_MC_SERVICE_INTERRUPTS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdMcGetEngineNotificationIntrVectors__)(struct Subdevice *, NV2080_CTRL_MC_GET_ENGINE_NOTIFICATION_INTR_VECTORS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdMcGetStaticIntrTable__)(struct Subdevice *, NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdDmaInvalidateTLB__)(struct Subdevice *, NV2080_CTRL_DMA_INVALIDATE_TLB_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdDmaGetInfo__)(struct Subdevice *, NV2080_CTRL_DMA_GET_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusGetPciInfo__)(struct Subdevice *, NV2080_CTRL_BUS_GET_PCI_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusGetInfo__)(struct Subdevice *, NV2080_CTRL_BUS_GET_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusGetInfoV2__)(struct Subdevice *, NV2080_CTRL_BUS_GET_INFO_V2_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusGetPciBarInfo__)(struct Subdevice *, NV2080_CTRL_BUS_GET_PCI_BAR_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusSetPcieSpeed__)(struct Subdevice *, NV2080_CTRL_BUS_SET_PCIE_SPEED_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusSetPcieLinkWidth__)(struct Subdevice *, NV2080_CTRL_BUS_SET_PCIE_LINK_WIDTH_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusSetHwbcUpstreamPcieSpeed__)(struct Subdevice *, NV2080_CTRL_BUS_SET_HWBC_UPSTREAM_PCIE_SPEED_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusGetHwbcUpstreamPcieSpeed__)(struct Subdevice *, NV2080_CTRL_BUS_GET_HWBC_UPSTREAM_PCIE_SPEED_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusHWBCGetUpstreamBAR0__)(struct Subdevice *, NV2080_CTRL_BUS_HWBC_GET_UPSTREAM_BAR0_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusServiceGpuMultifunctionState__)(struct Subdevice *, NV2080_CTRL_BUS_SERVICE_GPU_MULTIFUNC_STATE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusGetPexCounters__)(struct Subdevice *, NV2080_CTRL_BUS_GET_PEX_COUNTERS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusGetBFD__)(struct Subdevice *, NV2080_CTRL_BUS_GET_BFD_PARAMSARR *); - NV_STATUS (*__subdeviceCtrlCmdBusGetAspmDisableFlags__)(struct Subdevice *, NV2080_CTRL_BUS_GET_ASPM_DISABLE_FLAGS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusControlPublicAspmBits__)(struct Subdevice *, NV2080_CTRL_CMD_BUS_CONTROL_PUBLIC_ASPM_BITS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusClearPexCounters__)(struct Subdevice *, NV2080_CTRL_BUS_CLEAR_PEX_COUNTERS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusGetPexUtilCounters__)(struct Subdevice *, NV2080_CTRL_BUS_GET_PEX_UTIL_COUNTERS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusClearPexUtilCounters__)(struct Subdevice *, NV2080_CTRL_BUS_CLEAR_PEX_UTIL_COUNTERS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusFreezePexCounters__)(struct Subdevice *, NV2080_CTRL_BUS_FREEZE_PEX_COUNTERS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusGetPexLaneCounters__)(struct Subdevice *, NV2080_CTRL_CMD_BUS_GET_PEX_LANE_COUNTERS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusGetPcieLtrLatency__)(struct Subdevice *, NV2080_CTRL_CMD_BUS_GET_PCIE_LTR_LATENCY_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusSetPcieLtrLatency__)(struct Subdevice *, NV2080_CTRL_CMD_BUS_SET_PCIE_LTR_LATENCY_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusGetNvlinkPeerIdMask__)(struct Subdevice *, NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusSetEomParameters__)(struct Subdevice *, NV2080_CTRL_CMD_BUS_SET_EOM_PARAMETERS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusGetUphyDlnCfgSpace__)(struct Subdevice *, NV2080_CTRL_CMD_BUS_GET_UPHY_DLN_CFG_SPACE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusGetEomStatus__)(struct Subdevice *, NV2080_CTRL_BUS_GET_EOM_STATUS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusGetPcieReqAtomicsCaps__)(struct Subdevice *, NV2080_CTRL_CMD_BUS_GET_PCIE_REQ_ATOMICS_CAPS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics__)(struct Subdevice *, NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusGetC2CInfo__)(struct Subdevice *, NV2080_CTRL_CMD_BUS_GET_C2C_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusSysmemAccess__)(struct Subdevice *, NV2080_CTRL_BUS_SYSMEM_ACCESS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusSetP2pMapping__)(struct Subdevice *, NV2080_CTRL_BUS_SET_P2P_MAPPING_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusUnsetP2pMapping__)(struct Subdevice *, NV2080_CTRL_BUS_UNSET_P2P_MAPPING_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGetNvlinkCounters__)(struct Subdevice *, NV2080_CTRL_NVLINK_GET_COUNTERS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdClearNvlinkCounters__)(struct Subdevice *, NV2080_CTRL_NVLINK_CLEAR_COUNTERS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusGetNvlinkCaps__)(struct Subdevice *, NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusGetNvlinkStatus__)(struct Subdevice *, NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBusGetNvlinkErrInfo__)(struct Subdevice *, NV2080_CTRL_NVLINK_GET_ERR_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinGetLinkFomValues__)(struct Subdevice *, NV2080_CTRL_CMD_NVLINK_GET_LINK_FOM_VALUES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkGetNvlinkEccErrors__)(struct Subdevice *, NV2080_CTRL_NVLINK_GET_NVLINK_ECC_ERRORS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkGetLinkFatalErrorCounts__)(struct Subdevice *, NV2080_CTRL_NVLINK_GET_LINK_FATAL_ERROR_COUNTS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkSetupEom__)(struct Subdevice *, NV2080_CTRL_CMD_NVLINK_SETUP_EOM_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkGetPowerState__)(struct Subdevice *, NV2080_CTRL_NVLINK_GET_POWER_STATE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkReadTpCounters__)(struct Subdevice *, NV2080_CTRL_NVLINK_READ_TP_COUNTERS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkGetLpCounters__)(struct Subdevice *, NV2080_CTRL_NVLINK_GET_LP_COUNTERS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkEnableNvlinkPeer__)(struct Subdevice *, NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkCoreCallback__)(struct Subdevice *, NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkGetAliEnabled__)(struct Subdevice *, NV2080_CTRL_NVLINK_GET_ALI_ENABLED_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkSetLoopbackMode__)(struct Subdevice *, NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid__)(struct Subdevice *, NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkUpdateHshubMux__)(struct Subdevice *, NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer__)(struct Subdevice *, NV2080_CTRL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer__)(struct Subdevice *, NV2080_CTRL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkRemoveNvlinkMapping__)(struct Subdevice *, NV2080_CTRL_NVLINK_REMOVE_NVLINK_MAPPING_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkSaveRestoreHshubState__)(struct Subdevice *, NV2080_CTRL_NVLINK_SAVE_RESTORE_HSHUB_STATE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkProgramBufferready__)(struct Subdevice *, NV2080_CTRL_NVLINK_PROGRAM_BUFFERREADY_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkUpdateCurrentConfig__)(struct Subdevice *, NV2080_CTRL_NVLINK_UPDATE_CURRENT_CONFIG_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkUpdatePeerLinkMask__)(struct Subdevice *, NV2080_CTRL_NVLINK_UPDATE_PEER_LINK_MASK_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkUpdateLinkConnection__)(struct Subdevice *, NV2080_CTRL_NVLINK_UPDATE_LINK_CONNECTION_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkEnableLinksPostTopology__)(struct Subdevice *, NV2080_CTRL_NVLINK_ENABLE_LINKS_POST_TOPOLOGY_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkPreLinkTrainAli__)(struct Subdevice *, NV2080_CTRL_NVLINK_PRE_LINK_TRAIN_ALI_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkGetRefreshCounters__)(struct Subdevice *, NV2080_CTRL_NVLINK_GET_REFRESH_COUNTERS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkClearRefreshCounters__)(struct Subdevice *, NV2080_CTRL_NVLINK_CLEAR_REFRESH_COUNTERS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkGetLinkMaskPostRxDet__)(struct Subdevice *, NV2080_CTRL_NVLINK_GET_LINK_MASK_POST_RX_DET_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkLinkTrainAli__)(struct Subdevice *, NV2080_CTRL_NVLINK_LINK_TRAIN_ALI_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkGetNvlinkDeviceInfo__)(struct Subdevice *, NV2080_CTRL_NVLINK_GET_NVLINK_DEVICE_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkGetIoctrlDeviceInfo__)(struct Subdevice *, NV2080_CTRL_NVLINK_GET_IOCTRL_DEVICE_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkProgramLinkSpeed__)(struct Subdevice *, NV2080_CTRL_NVLINK_PROGRAM_LINK_SPEED_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkAreLinksTrained__)(struct Subdevice *, NV2080_CTRL_NVLINK_ARE_LINKS_TRAINED_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkResetLinks__)(struct Subdevice *, NV2080_CTRL_NVLINK_RESET_LINKS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkDisableDlInterrupts__)(struct Subdevice *, NV2080_CTRL_NVLINK_DISABLE_DL_INTERRUPTS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkGetLinkAndClockInfo__)(struct Subdevice *, NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkSetupNvlinkSysmem__)(struct Subdevice *, NV2080_CTRL_NVLINK_SETUP_NVLINK_SYSMEM_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkProcessForcedConfigs__)(struct Subdevice *, NV2080_CTRL_NVLINK_PROCESS_FORCED_CONFIGS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkSyncLaneShutdownProps__)(struct Subdevice *, NV2080_CTRL_NVLINK_SYNC_NVLINK_SHUTDOWN_PROPS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkEnableSysmemNvlinkAts__)(struct Subdevice *, NV2080_CTRL_NVLINK_ENABLE_SYSMEM_NVLINK_ATS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkHshubGetSysmemNvlinkMask__)(struct Subdevice *, NV2080_CTRL_NVLINK_HSHUB_GET_SYSMEM_NVLINK_MASK_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkGetSetNvswitchFlaAddr__)(struct Subdevice *, NV2080_CTRL_NVLINK_GET_SET_NVSWITCH_FLA_ADDR_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkSyncLinkMasksAndVbiosInfo__)(struct Subdevice *, NV2080_CTRL_NVLINK_SYNC_LINK_MASKS_AND_VBIOS_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkEnableLinks__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkProcessInitDisabledLinks__)(struct Subdevice *, NV2080_CTRL_NVLINK_PROCESS_INIT_DISABLED_LINKS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkInbandSendData__)(struct Subdevice *, NV2080_CTRL_NVLINK_INBAND_SEND_DATA_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkPostFaultUp__)(struct Subdevice *, NV2080_CTRL_NVLINK_POST_FAULT_UP_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkEomControl__)(struct Subdevice *, NV2080_CTRL_NVLINK_EOM_CONTROL_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkSetL1Threshold__)(struct Subdevice *, NV2080_CTRL_NVLINK_SET_L1_THRESHOLD_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkDirectConnectCheck__)(struct Subdevice *, NV2080_CTRL_NVLINK_DIRECT_CONNECT_CHECK_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkGetL1Threshold__)(struct Subdevice *, NV2080_CTRL_NVLINK_GET_L1_THRESHOLD_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdIsNvlinkReducedConfig__)(struct Subdevice *, NV2080_CTRL_NVLINK_IS_REDUCED_CONFIG_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvlinkGetPortEvents__)(struct Subdevice *, NV2080_CTRL_NVLINK_GET_PORT_EVENTS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdI2cReadBuffer__)(struct Subdevice *, NV2080_CTRL_I2C_READ_BUFFER_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdI2cWriteBuffer__)(struct Subdevice *, NV2080_CTRL_I2C_WRITE_BUFFER_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdI2cReadReg__)(struct Subdevice *, NV2080_CTRL_I2C_RW_REG_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdI2cWriteReg__)(struct Subdevice *, NV2080_CTRL_I2C_RW_REG_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamples__)(struct Subdevice *, NV2080_CTRL_PERF_GET_GPUMON_PERFMON_UTIL_SAMPLES_PARAM *); - NV_STATUS (*__subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2__)(struct Subdevice *, NV2080_CTRL_PERF_GET_GPUMON_PERFMON_UTIL_SAMPLES_V2_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdPerfRatedTdpGetControl__)(struct Subdevice *, NV2080_CTRL_PERF_RATED_TDP_CONTROL_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdPerfRatedTdpSetControl__)(struct Subdevice *, NV2080_CTRL_PERF_RATED_TDP_CONTROL_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdPerfReservePerfmonHw__)(struct Subdevice *, NV2080_CTRL_PERF_RESERVE_PERFMON_HW_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdPerfSetAuxPowerState__)(struct Subdevice *, NV2080_CTRL_PERF_SET_AUX_POWER_STATE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdPerfSetPowerstate__)(struct Subdevice *, NV2080_CTRL_PERF_SET_POWERSTATE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdPerfGetLevelInfo_V2__)(struct Subdevice *, NV2080_CTRL_PERF_GET_LEVEL_INFO_V2_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdPerfGetCurrentPstate__)(struct Subdevice *, NV2080_CTRL_PERF_GET_CURRENT_PSTATE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample__)(struct Subdevice *, NV2080_CTRL_PERF_GET_VID_ENG_PERFMON_SAMPLE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdPerfGetPowerstate__)(struct Subdevice *, NV2080_CTRL_PERF_GET_POWERSTATE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdPerfNotifyVideoevent__)(struct Subdevice *, NV2080_CTRL_PERF_NOTIFY_VIDEOEVENT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKPerfBoost__)(struct Subdevice *, NV2080_CTRL_PERF_BOOST_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbGetFBRegionInfo__)(struct Subdevice *, NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbGetBar1Offset__)(struct Subdevice *, NV2080_CTRL_FB_GET_BAR1_OFFSET_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbIsKind__)(struct Subdevice *, NV2080_CTRL_FB_IS_KIND_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbGetMemAlignment__)(struct Subdevice *, NV2080_CTRL_FB_GET_MEM_ALIGNMENT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbGetHeapReservationSize__)(struct Subdevice *, NV2080_CTRL_INTERNAL_FB_GET_HEAP_RESERVATION_SIZE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalMemmgrGetVgpuHostRmReservedFb__)(struct Subdevice *, NV2080_CTRL_INTERNAL_MEMMGR_GET_VGPU_CONFIG_HOST_RESERVED_FB_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGbGetSemaphoreSurfaceLayout__)(struct Subdevice *, NV2080_CTRL_FB_GET_SEMAPHORE_SURFACE_LAYOUT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp__)(struct Subdevice *, NV2080_CTRL_INTERNAL_MEMMGR_MEMORY_TRANSFER_WITH_GSP_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbGetInfoV2__)(struct Subdevice *, NV2080_CTRL_FB_GET_INFO_V2_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbGetCarveoutAddressInfo__)(struct Subdevice *, NV2080_CTRL_FB_GET_SYSTEM_CARVEOUT_ADDRESS_SPACE_INFO *); - NV_STATUS (*__subdeviceCtrlCmdFbGetCalibrationLockFailed__)(struct Subdevice *, NV2080_CTRL_FB_GET_CALIBRATION_LOCK_FAILED_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbFlushGpuCache__)(struct Subdevice *, NV2080_CTRL_FB_FLUSH_GPU_CACHE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbSetGpuCacheAllocPolicy__)(struct Subdevice *, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbGetGpuCacheAllocPolicy__)(struct Subdevice *, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2__)(struct Subdevice *, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2__)(struct Subdevice *, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbGetGpuCacheInfo__)(struct Subdevice *, NV2080_CTRL_FB_GET_GPU_CACHE_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbGetCliManagedOfflinedPages__)(struct Subdevice *, NV2080_CTRL_FB_GET_CLI_MANAGED_OFFLINED_PAGES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbGetOfflinedPages__)(struct Subdevice *, NV2080_CTRL_FB_GET_OFFLINED_PAGES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbSetupVprRegion__)(struct Subdevice *, NV2080_CTRL_CMD_FB_SETUP_VPR_REGION_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbGetLTCInfoForFBP__)(struct Subdevice *, NV2080_CTRL_FB_GET_LTC_INFO_FOR_FBP_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbGetCompBitCopyConstructInfo__)(struct Subdevice *, NV2080_CTRL_CMD_FB_GET_COMPBITCOPY_CONSTRUCT_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbPatchPbrForMining__)(struct Subdevice *, NV2080_CTRL_FB_PATCH_PBR_FOR_MINING_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbGetRemappedRows__)(struct Subdevice *, NV2080_CTRL_FB_GET_REMAPPED_ROWS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbGetFsInfo__)(struct Subdevice *, NV2080_CTRL_FB_GET_FS_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbGetRowRemapperHistogram__)(struct Subdevice *, NV2080_CTRL_FB_GET_ROW_REMAPPER_HISTOGRAM_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbGetDynamicOfflinedPages__)(struct Subdevice *, NV2080_CTRL_FB_GET_DYNAMIC_OFFLINED_PAGES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbUpdateNumaStatus__)(struct Subdevice *, NV2080_CTRL_FB_UPDATE_NUMA_STATUS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbGetNumaInfo__)(struct Subdevice *, NV2080_CTRL_FB_GET_NUMA_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdMemSysGetStaticConfig__)(struct Subdevice *, NV2080_CTRL_INTERNAL_MEMSYS_GET_STATIC_CONFIG_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdMemSysSetPartitionableMem__)(struct Subdevice *, NV2080_CTRL_INTERNAL_MEMSYS_SET_PARTITIONABLE_MEM_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKMemSysGetMIGMemoryConfig__)(struct Subdevice *, NV2080_CTRL_INTERNAL_MEMSYS_GET_MIG_MEMORY_CONFIG_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbSetZbcReferenced__)(struct Subdevice *, NV2080_CTRL_INTERNAL_MEMSYS_SET_ZBC_REFERENCED_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdMemSysL2InvalidateEvict__)(struct Subdevice *, NV2080_CTRL_INTERNAL_MEMSYS_L2_INVALIDATE_EVICT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdMemSysFlushL2AllRamsAndCaches__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdMemSysDisableNvlinkPeers__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdMemSysProgramRawCompressionMode__)(struct Subdevice *, NV2080_CTRL_INTERNAL_MEMSYS_PROGRAM_RAW_COMPRESSION_MODE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdMemSysGetMIGMemoryPartitionTable__)(struct Subdevice *, NV2080_CTRL_INTERNAL_MEMSYS_GET_MIG_MEMORY_PARTITION_TABLE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbGetCtagsForCbcEviction__)(struct Subdevice *, NV2080_CTRL_FB_GET_CTAGS_FOR_CBC_EVICTION_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbCBCOp__)(struct Subdevice *, NV2080_CTRL_CMD_FB_CBC_OP_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbSetRrd__)(struct Subdevice *, NV2080_CTRL_FB_SET_RRD_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbSetReadLimit__)(struct Subdevice *, NV2080_CTRL_FB_SET_READ_LIMIT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFbSetWriteLimit__)(struct Subdevice *, NV2080_CTRL_FB_SET_WRITE_LIMIT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdSetGpfifo__)(struct Subdevice *, NV2080_CTRL_CMD_SET_GPFIFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdSetOperationalProperties__)(struct Subdevice *, NV2080_CTRL_CMD_SET_OPERATIONAL_PROPERTIES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFifoBindEngines__)(struct Subdevice *, NV2080_CTRL_FIFO_BIND_ENGINES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGetPhysicalChannelCount__)(struct Subdevice *, NV2080_CTRL_FIFO_GET_PHYSICAL_CHANNEL_COUNT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFifoGetInfo__)(struct Subdevice *, NV2080_CTRL_FIFO_GET_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFifoDisableChannels__)(struct Subdevice *, NV2080_CTRL_FIFO_DISABLE_CHANNELS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFifoDisableChannelsForKeyRotation__)(struct Subdevice *, NV2080_CTRL_FIFO_DISABLE_CHANNELS_FOR_KEY_ROTATION_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFifoDisableUsermodeChannels__)(struct Subdevice *, NV2080_CTRL_FIFO_DISABLE_USERMODE_CHANNELS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFifoGetChannelMemInfo__)(struct Subdevice *, NV2080_CTRL_CMD_FIFO_GET_CHANNEL_MEM_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFifoGetUserdLocation__)(struct Subdevice *, NV2080_CTRL_CMD_FIFO_GET_USERD_LOCATION_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFifoObjschedSwGetLog__)(struct Subdevice *, NV2080_CTRL_FIFO_OBJSCHED_SW_GET_LOG_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFifoObjschedGetState__)(struct Subdevice *, NV2080_CTRL_FIFO_OBJSCHED_GET_STATE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFifoObjschedSetState__)(struct Subdevice *, NV2080_CTRL_FIFO_OBJSCHED_SET_STATE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFifoObjschedGetCaps__)(struct Subdevice *, NV2080_CTRL_FIFO_OBJSCHED_GET_CAPS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFifoGetDeviceInfoTable__)(struct Subdevice *, NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFifoSetupVfZombieSubctxPdb__)(struct Subdevice *, NV2080_CTRL_FIFO_SETUP_VF_ZOMBIE_SUBCTX_PDB_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFifoClearFaultedBit__)(struct Subdevice *, NV2080_CTRL_CMD_FIFO_CLEAR_FAULTED_BIT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFifoRunlistSetSchedPolicy__)(struct Subdevice *, NV2080_CTRL_FIFO_RUNLIST_SET_SCHED_POLICY_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFifoUpdateChannelInfo__)(struct Subdevice *, NV2080_CTRL_FIFO_UPDATE_CHANNEL_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalFifoPromoteRunlistBuffers__)(struct Subdevice *, NV2080_CTRL_INTERNAL_FIFO_PROMOTE_RUNLIST_BUFFERS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalFifoGetNumChannels__)(struct Subdevice *, NV2080_CTRL_INTERNAL_FIFO_GET_NUM_CHANNELS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFifoGetAllocatedChannels__)(struct Subdevice *, NV2080_CTRL_FIFO_GET_ALLOCATED_CHANNELS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalFifoGetNumSecureChannels__)(struct Subdevice *, NV2080_CTRL_INTERNAL_FIFO_GET_NUM_SECURE_CHANNELS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetInfo__)(struct Subdevice *, NV2080_CTRL_GR_GET_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetInfoV2__)(struct Subdevice *, NV2080_CTRL_GR_GET_INFO_V2_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetCapsV2__)(struct Subdevice *, NV2080_CTRL_GR_GET_CAPS_V2_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetCtxswModes__)(struct Subdevice *, NV2080_CTRL_GR_GET_CTXSW_MODES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrCtxswZcullMode__)(struct Subdevice *, NV2080_CTRL_GR_CTXSW_ZCULL_MODE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrCtxswZcullBind__)(struct Subdevice *, NV2080_CTRL_GR_CTXSW_ZCULL_BIND_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetZcullInfo__)(struct Subdevice *, NV2080_CTRL_GR_GET_ZCULL_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrCtxswPmMode__)(struct Subdevice *, NV2080_CTRL_GR_CTXSW_PM_MODE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrCtxswPmBind__)(struct Subdevice *, NV2080_CTRL_GR_CTXSW_PM_BIND_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrCtxswSetupBind__)(struct Subdevice *, NV2080_CTRL_GR_CTXSW_SETUP_BIND_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrSetGpcTileMap__)(struct Subdevice *, NV2080_CTRL_GR_SET_GPC_TILE_MAP_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrCtxswSmpcMode__)(struct Subdevice *, NV2080_CTRL_GR_CTXSW_SMPC_MODE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrPcSamplingMode__)(struct Subdevice *, NV2080_CTRL_GR_PC_SAMPLING_MODE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetSmToGpcTpcMappings__)(struct Subdevice *, NV2080_CTRL_GR_GET_SM_TO_GPC_TPC_MAPPINGS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetGlobalSmOrder__)(struct Subdevice *, NV2080_CTRL_GR_GET_GLOBAL_SM_ORDER_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrSetCtxswPreemptionMode__)(struct Subdevice *, NV2080_CTRL_GR_SET_CTXSW_PREEMPTION_MODE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrCtxswPreemptionBind__)(struct Subdevice *, NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetROPInfo__)(struct Subdevice *, NV2080_CTRL_GR_GET_ROP_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetCtxswStats__)(struct Subdevice *, NV2080_CTRL_GR_GET_CTXSW_STATS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetCtxBufferSize__)(struct Subdevice *, NV2080_CTRL_GR_GET_CTX_BUFFER_SIZE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetCtxBufferInfo__)(struct Subdevice *, NV2080_CTRL_GR_GET_CTX_BUFFER_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetCtxBufferPtes__)(struct Subdevice *, NV2080_CTRL_KGR_GET_CTX_BUFFER_PTES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetCurrentResidentChannel__)(struct Subdevice *, NV2080_CTRL_GR_GET_CURRENT_RESIDENT_CHANNEL_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetVatAlarmData__)(struct Subdevice *, NV2080_CTRL_GR_GET_VAT_ALARM_DATA_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetAttributeBufferSize__)(struct Subdevice *, NV2080_CTRL_GR_GET_ATTRIBUTE_BUFFER_SIZE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGfxPoolQuerySize__)(struct Subdevice *, NV2080_CTRL_GR_GFX_POOL_QUERY_SIZE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGfxPoolInitialize__)(struct Subdevice *, NV2080_CTRL_GR_GFX_POOL_INITIALIZE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGfxPoolAddSlots__)(struct Subdevice *, NV2080_CTRL_GR_GFX_POOL_ADD_SLOTS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGfxPoolRemoveSlots__)(struct Subdevice *, NV2080_CTRL_GR_GFX_POOL_REMOVE_SLOTS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetPpcMask__)(struct Subdevice *, NV2080_CTRL_GR_GET_PPC_MASK_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrSetTpcPartitionMode__)(struct Subdevice *, NV2080_CTRL_GR_SET_TPC_PARTITION_MODE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetSmIssueRateModifier__)(struct Subdevice *, NV2080_CTRL_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrFecsBindEvtbufForUid__)(struct Subdevice *, NV2080_CTRL_GR_FECS_BIND_EVTBUF_FOR_UID_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrFecsBindEvtbufForUidV2__)(struct Subdevice *, NV2080_CTRL_GR_FECS_BIND_EVTBUF_FOR_UID_V2_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetPhysGpcMask__)(struct Subdevice *, NV2080_CTRL_GR_GET_PHYS_GPC_MASK_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetGpcMask__)(struct Subdevice *, NV2080_CTRL_GR_GET_GPC_MASK_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetTpcMask__)(struct Subdevice *, NV2080_CTRL_GR_GET_TPC_MASK_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetEngineContextProperties__)(struct Subdevice *, NV2080_CTRL_GR_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetNumTpcsForGpc__)(struct Subdevice *, NV2080_CTRL_GR_GET_NUM_TPCS_FOR_GPC_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetGpcTileMap__)(struct Subdevice *, NV2080_CTRL_GR_GET_GPC_TILE_MAP_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetZcullMask__)(struct Subdevice *, NV2080_CTRL_GR_GET_ZCULL_MASK_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrGetGfxGpcAndTpcInfo__)(struct Subdevice *, NV2080_CTRL_GR_GET_GFX_GPC_AND_TPC_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetInfo__)(struct Subdevice *, NV2080_CTRL_INTERNAL_STATIC_GR_GET_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetCaps__)(struct Subdevice *, NV2080_CTRL_INTERNAL_STATIC_GR_GET_CAPS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetGlobalSmOrder__)(struct Subdevice *, NV2080_CTRL_INTERNAL_STATIC_GR_GET_GLOBAL_SM_ORDER_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetFloorsweepingMasks__)(struct Subdevice *, NV2080_CTRL_INTERNAL_STATIC_GR_GET_FLOORSWEEPING_MASKS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetPpcMasks__)(struct Subdevice *, NV2080_CTRL_INTERNAL_STATIC_GR_GET_PPC_MASKS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetZcullInfo__)(struct Subdevice *, NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetRopInfo__)(struct Subdevice *, NV2080_CTRL_INTERNAL_STATIC_GR_GET_ROP_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetContextBuffersInfo__)(struct Subdevice *, NV2080_CTRL_INTERNAL_STATIC_GR_GET_CONTEXT_BUFFERS_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetSmIssueRateModifier__)(struct Subdevice *, NV2080_CTRL_INTERNAL_STATIC_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetFecsRecordSize__)(struct Subdevice *, NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_RECORD_SIZE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetFecsTraceDefines__)(struct Subdevice *, NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_TRACE_DEFINES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetPdbProperties__)(struct Subdevice *, NV2080_CTRL_INTERNAL_STATIC_GR_GET_PDB_PROPERTIES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGrInternalSetFecsTraceHwEnable__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GR_SET_FECS_TRACE_HW_ENABLE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGrInternalGetFecsTraceHwEnable__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GR_GET_FECS_TRACE_HW_ENABLE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGrInternalSetFecsTraceRdOffset__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GR_SET_FECS_TRACE_RD_OFFSET_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGrInternalGetFecsTraceRdOffset__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GR_GET_FECS_TRACE_RD_OFFSET_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGrInternalSetFecsTraceWrOffset__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GR_SET_FECS_TRACE_WR_OFFSET_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGrStaticGetFecsTraceDefines__)(struct Subdevice *, NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_TRACE_DEFINES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetCachedInfo__)(struct Subdevice *, NV2080_CTRL_GPU_GET_INFO_V2_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetInfoV2__)(struct Subdevice *, NV2080_CTRL_GPU_GET_INFO_V2_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetIpVersion__)(struct Subdevice *, NV2080_CTRL_GPU_GET_IP_VERSION_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetPhysicalBridgeVersionInfo__)(struct Subdevice *, NV2080_CTRL_GPU_GET_PHYSICAL_BRIDGE_VERSION_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetAllBridgesUpstreamOfGpu__)(struct Subdevice *, NV2080_CTRL_GPU_GET_ALL_BRIDGES_UPSTREAM_OF_GPU_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuSetOptimusInfo__)(struct Subdevice *, NV2080_CTRL_GPU_OPTIMUS_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetNameString__)(struct Subdevice *, NV2080_CTRL_GPU_GET_NAME_STRING_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetShortNameString__)(struct Subdevice *, NV2080_CTRL_GPU_GET_SHORT_NAME_STRING_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetEncoderCapacity__)(struct Subdevice *, NV2080_CTRL_GPU_GET_ENCODER_CAPACITY_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetNvencSwSessionStats__)(struct Subdevice *, NV2080_CTRL_GPU_GET_NVENC_SW_SESSION_STATS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetNvencSwSessionInfo__)(struct Subdevice *, NV2080_CTRL_GPU_GET_NVENC_SW_SESSION_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetNvencSwSessionInfoV2__)(struct Subdevice *, NV2080_CTRL_GPU_GET_NVENC_SW_SESSION_INFO_V2_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetNvfbcSwSessionStats__)(struct Subdevice *, NV2080_CTRL_GPU_GET_NVFBC_SW_SESSION_STATS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetNvfbcSwSessionInfo__)(struct Subdevice *, NV2080_CTRL_GPU_GET_NVFBC_SW_SESSION_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuSetFabricAddr__)(struct Subdevice *, NV2080_CTRL_GPU_SET_FABRIC_BASE_ADDR_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuSetEgmGpaFabricAddr__)(struct Subdevice *, NV2080_CTRL_GPU_SET_EGM_GPA_FABRIC_BASE_ADDR_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuSetPower__)(struct Subdevice *, NV2080_CTRL_GPU_SET_POWER_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetSdm__)(struct Subdevice *, NV2080_CTRL_GPU_GET_SDM_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuSetSdm__)(struct Subdevice *, NV2080_CTRL_GPU_SET_SDM_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetSimulationInfo__)(struct Subdevice *, NV2080_CTRL_GPU_GET_SIMULATION_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetEngines__)(struct Subdevice *, NV2080_CTRL_GPU_GET_ENGINES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetEnginesV2__)(struct Subdevice *, NV2080_CTRL_GPU_GET_ENGINES_V2_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetEngineClasslist__)(struct Subdevice *, NV2080_CTRL_GPU_GET_ENGINE_CLASSLIST_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetEnginePartnerList__)(struct Subdevice *, NV2080_CTRL_GPU_GET_ENGINE_PARTNERLIST_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetFermiGpcInfo__)(struct Subdevice *, NV2080_CTRL_GPU_GET_FERMI_GPC_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetFermiTpcInfo__)(struct Subdevice *, NV2080_CTRL_GPU_GET_FERMI_TPC_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetFermiZcullInfo__)(struct Subdevice *, NV2080_CTRL_GPU_GET_FERMI_ZCULL_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetPesInfo__)(struct Subdevice *, NV2080_CTRL_GPU_GET_PES_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuExecRegOps__)(struct Subdevice *, NV2080_CTRL_GPU_EXEC_REG_OPS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuMigratableOps__)(struct Subdevice *, NV2080_CTRL_GPU_MIGRATABLE_OPS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuQueryMode__)(struct Subdevice *, NV2080_CTRL_GPU_QUERY_MODE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetInforomImageVersion__)(struct Subdevice *, NV2080_CTRL_GPU_GET_INFOROM_IMAGE_VERSION_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetInforomObjectVersion__)(struct Subdevice *, NV2080_CTRL_GPU_GET_INFOROM_OBJECT_VERSION_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuQueryInforomEccSupport__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdGpuQueryEccStatus__)(struct Subdevice *, NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetChipDetails__)(struct Subdevice *, NV2080_CTRL_GPU_GET_CHIP_DETAILS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetOEMBoardInfo__)(struct Subdevice *, NV2080_CTRL_GPU_GET_OEM_BOARD_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetOEMInfo__)(struct Subdevice *, NV2080_CTRL_GPU_GET_OEM_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuHandleGpuSR__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdGpuSetComputeModeRules__)(struct Subdevice *, NV2080_CTRL_GPU_SET_COMPUTE_MODE_RULES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuQueryComputeModeRules__)(struct Subdevice *, NV2080_CTRL_GPU_QUERY_COMPUTE_MODE_RULES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuAcquireComputeModeReservation__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdGpuReleaseComputeModeReservation__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdGpuInitializeCtx__)(struct Subdevice *, NV2080_CTRL_GPU_INITIALIZE_CTX_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuPromoteCtx__)(struct Subdevice *, NV2080_CTRL_GPU_PROMOTE_CTX_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuEvictCtx__)(struct Subdevice *, NV2080_CTRL_GPU_EVICT_CTX_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetId__)(struct Subdevice *, NV2080_CTRL_GPU_GET_ID_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetGidInfo__)(struct Subdevice *, NV2080_CTRL_GPU_GET_GID_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuQueryIllumSupport__)(struct Subdevice *, NV2080_CTRL_CMD_GPU_QUERY_ILLUM_SUPPORT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetIllum__)(struct Subdevice *, NV2080_CTRL_CMD_GPU_ILLUM_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuSetIllum__)(struct Subdevice *, NV2080_CTRL_CMD_GPU_ILLUM_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuQueryScrubberStatus__)(struct Subdevice *, NV2080_CTRL_GPU_QUERY_SCRUBBER_STATUS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetVprCaps__)(struct Subdevice *, NV2080_CTRL_GPU_GET_VPR_CAPS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetVprInfo__)(struct Subdevice *, NV2080_CTRL_GPU_GET_VPR_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetPids__)(struct Subdevice *, NV2080_CTRL_GPU_GET_PIDS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetPidInfo__)(struct Subdevice *, NV2080_CTRL_GPU_GET_PID_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuQueryFunctionStatus__)(struct Subdevice *, NV2080_CTRL_CMD_GPU_QUERY_FUNCTION_STATUS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuReportNonReplayableFault__)(struct Subdevice *, NV2080_CTRL_GPU_REPORT_NON_REPLAYABLE_FAULT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetEngineFaultInfo__)(struct Subdevice *, NV2080_CTRL_GPU_GET_ENGINE_FAULT_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetEngineRunlistPriBase__)(struct Subdevice *, NV2080_CTRL_GPU_GET_ENGINE_RUNLIST_PRI_BASE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetHwEngineId__)(struct Subdevice *, NV2080_CTRL_GPU_GET_HW_ENGINE_ID_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetVmmuSegmentSize__)(struct Subdevice *, NV2080_CTRL_GPU_GET_VMMU_SEGMENT_SIZE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetMaxSupportedPageSize__)(struct Subdevice *, NV2080_CTRL_GPU_GET_MAX_SUPPORTED_PAGE_SIZE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuHandleVfPriFault__)(struct Subdevice *, NV2080_CTRL_CMD_GPU_HANDLE_VF_PRI_FAULT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuSetComputePolicyConfig__)(struct Subdevice *, NV2080_CTRL_GPU_SET_COMPUTE_POLICY_CONFIG_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetComputePolicyConfig__)(struct Subdevice *, NV2080_CTRL_GPU_GET_COMPUTE_POLICY_CONFIG_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdValidateMemMapRequest__)(struct Subdevice *, NV2080_CTRL_GPU_VALIDATE_MEM_MAP_REQUEST_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetGfid__)(struct Subdevice *, NV2080_CTRL_GPU_GET_GFID_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdUpdateGfidP2pCapability__)(struct Subdevice *, NV2080_CTRL_CMD_GPU_UPDATE_GFID_P2P_CAPABILITY_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetEngineLoadTimes__)(struct Subdevice *, NV2080_CTRL_GPU_GET_ENGINE_LOAD_TIMES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGetP2pCaps__)(struct Subdevice *, NV2080_CTRL_GET_P2P_CAPS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGetGpuFabricProbeInfo__)(struct Subdevice *, NV2080_CTRL_CMD_GET_GPU_FABRIC_PROBE_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetResetStatus__)(struct Subdevice *, NV2080_CTRL_GPU_GET_RESET_STATUS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetDrainAndResetStatus__)(struct Subdevice *, NV2080_CTRL_GPU_GET_DRAIN_AND_RESET_STATUS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetConstructedFalconInfo__)(struct Subdevice *, NV2080_CTRL_GPU_GET_CONSTRUCTED_FALCON_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlGpuGetFipsStatus__)(struct Subdevice *, NV2080_CTRL_GPU_GET_FIPS_STATUS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdEventSetTrigger__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdEventSetTriggerFifo__)(struct Subdevice *, NV2080_CTRL_EVENT_SET_TRIGGER_FIFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdEventSetNotification__)(struct Subdevice *, NV2080_CTRL_EVENT_SET_NOTIFICATION_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdEventSetMemoryNotifies__)(struct Subdevice *, NV2080_CTRL_EVENT_SET_MEMORY_NOTIFIES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdEventSetSemaphoreMemory__)(struct Subdevice *, NV2080_CTRL_EVENT_SET_SEMAPHORE_MEMORY_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdEventSetSemaMemValidation__)(struct Subdevice *, NV2080_CTRL_EVENT_SET_SEMA_MEM_VALIDATION_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdEventVideoBindEvtbuf__)(struct Subdevice *, NV2080_CTRL_EVENT_VIDEO_BIND_EVTBUF_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdEventGspTraceRatsBindEvtbuf__)(struct Subdevice *, NV2080_CTRL_EVENT_RATS_GSP_TRACE_BIND_EVTBUF_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdTimerCancel__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdTimerSchedule__)(struct Subdevice *, NV2080_CTRL_CMD_TIMER_SCHEDULE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdTimerGetTime__)(struct Subdevice *, NV2080_CTRL_TIMER_GET_TIME_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdTimerGetRegisterOffset__)(struct Subdevice *, NV2080_CTRL_TIMER_GET_REGISTER_OFFSET_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdTimerGetGpuCpuTimeCorrelationInfo__)(struct Subdevice *, NV2080_CTRL_TIMER_GET_GPU_CPU_TIME_CORRELATION_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdTimerSetGrTickFreq__)(struct Subdevice *, NV2080_CTRL_CMD_TIMER_SET_GR_TICK_FREQ_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdRcReadVirtualMem__)(struct Subdevice *, NV2080_CTRL_RC_READ_VIRTUAL_MEM_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdRcGetErrorCount__)(struct Subdevice *, NV2080_CTRL_RC_GET_ERROR_COUNT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdRcGetErrorV2__)(struct Subdevice *, NV2080_CTRL_RC_GET_ERROR_V2_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdRcSetCleanErrorHistory__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdRcGetWatchdogInfo__)(struct Subdevice *, NV2080_CTRL_RC_GET_WATCHDOG_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdRcDisableWatchdog__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdRcSoftDisableWatchdog__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdRcEnableWatchdog__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdRcReleaseWatchdogRequests__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdInternalRcWatchdogTimeout__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdSetRcRecovery__)(struct Subdevice *, NV2080_CTRL_CMD_RC_RECOVERY_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGetRcRecovery__)(struct Subdevice *, NV2080_CTRL_CMD_RC_RECOVERY_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGetRcInfo__)(struct Subdevice *, NV2080_CTRL_CMD_RC_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdSetRcInfo__)(struct Subdevice *, NV2080_CTRL_CMD_RC_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvdGetDumpSize__)(struct Subdevice *, NV2080_CTRL_NVD_GET_DUMP_SIZE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvdGetDump__)(struct Subdevice *, NV2080_CTRL_NVD_GET_DUMP_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvdGetNocatJournalRpt__)(struct Subdevice *, NV2080_CTRL_NVD_GET_NOCAT_JOURNAL_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvdSetNocatJournalData__)(struct Subdevice *, NV2080_CTRL_NVD_SET_NOCAT_JOURNAL_DATA_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdNvdInsertNocatJournalRecord__)(struct Subdevice *, NV2080_CTRL_CMD_NVD_INSERT_NOCAT_JOURNAL_RECORD_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdPmgrGetModuleInfo__)(struct Subdevice *, NV2080_CTRL_PMGR_MODULE_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuProcessPostGc6ExitTasks__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdGc6Entry__)(struct Subdevice *, NV2080_CTRL_GC6_ENTRY_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGc6Exit__)(struct Subdevice *, NV2080_CTRL_GC6_EXIT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdLpwrDifrPrefetchResponse__)(struct Subdevice *, NV2080_CTRL_CMD_LPWR_DIFR_PREFETCH_RESPONSE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdLpwrDifrCtrl__)(struct Subdevice *, NV2080_CTRL_CMD_LPWR_DIFR_CTRL_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdCeGetCaps__)(struct Subdevice *, NV2080_CTRL_CE_GET_CAPS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdCeGetCePceMask__)(struct Subdevice *, NV2080_CTRL_CE_GET_CE_PCE_MASK_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdCeUpdatePceLceMappings__)(struct Subdevice *, NV2080_CTRL_CE_UPDATE_PCE_LCE_MAPPINGS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdCeGetCapsV2__)(struct Subdevice *, NV2080_CTRL_CE_GET_CAPS_V2_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdCeGetAllCaps__)(struct Subdevice *, NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFlcnGetDmemUsage__)(struct Subdevice *, NV2080_CTRL_FLCN_GET_DMEM_USAGE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFlcnGetEngineArch__)(struct Subdevice *, NV2080_CTRL_FLCN_GET_ENGINE_ARCH_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFlcnUstreamerQueueInfo__)(struct Subdevice *, NV2080_CTRL_FLCN_USTREAMER_QUEUE_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFlcnUstreamerControlGet__)(struct Subdevice *, NV2080_CTRL_FLCN_USTREAMER_CONTROL_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFlcnUstreamerControlSet__)(struct Subdevice *, NV2080_CTRL_FLCN_USTREAMER_CONTROL_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFlcnGetCtxBufferInfo__)(struct Subdevice *, NV2080_CTRL_FLCN_GET_CTX_BUFFER_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFlcnGetCtxBufferSize__)(struct Subdevice *, NV2080_CTRL_FLCN_GET_CTX_BUFFER_SIZE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalFlcnSetVideoEventBufferFlags__)(struct Subdevice *, NV2080_CTRL_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_FLAGS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalFlcnSetVideoEventBufferMemory__)(struct Subdevice *, NV2080_CTRL_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_MEMORY_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdEccGetClientExposedCounters__)(struct Subdevice *, NV2080_CTRL_ECC_GET_CLIENT_EXPOSED_COUNTERS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdEccGetEciCounters__)(struct Subdevice *, NV2080_CTRL_ECC_GET_ECI_COUNTERS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdEccGetVolatileCounts__)(struct Subdevice *, NV2080_CTRL_ECC_GET_VOLATILE_COUNTS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuQueryEccConfiguration__)(struct Subdevice *, NV2080_CTRL_GPU_QUERY_ECC_CONFIGURATION_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuSetEccConfiguration__)(struct Subdevice *, NV2080_CTRL_GPU_SET_ECC_CONFIGURATION_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuResetEccErrorStatus__)(struct Subdevice *, NV2080_CTRL_GPU_RESET_ECC_ERROR_STATUS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFlaRange__)(struct Subdevice *, NV2080_CTRL_FLA_RANGE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFlaSetupInstanceMemBlock__)(struct Subdevice *, NV2080_CTRL_FLA_SETUP_INSTANCE_MEM_BLOCK_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFlaGetRange__)(struct Subdevice *, NV2080_CTRL_FLA_GET_RANGE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdFlaGetFabricMemStats__)(struct Subdevice *, NV2080_CTRL_FLA_GET_FABRIC_MEM_STATS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGspGetFeatures__)(struct Subdevice *, NV2080_CTRL_GSP_GET_FEATURES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGspGetRmHeapStats__)(struct Subdevice *, NV2080_CTRL_GSP_GET_RM_HEAP_STATS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetActivePartitionIds__)(struct Subdevice *, NV2080_CTRL_GPU_GET_ACTIVE_PARTITION_IDS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetPartitionCapacity__)(struct Subdevice *, NV2080_CTRL_GPU_GET_PARTITION_CAPACITY_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuDescribePartitions__)(struct Subdevice *, NV2080_CTRL_GPU_DESCRIBE_PARTITIONS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuSetPartitioningMode__)(struct Subdevice *, NV2080_CTRL_GPU_SET_PARTITIONING_MODE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGrmgrGetGrFsInfo__)(struct Subdevice *, NV2080_CTRL_GRMGR_GET_GR_FS_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuSetPartitions__)(struct Subdevice *, NV2080_CTRL_GPU_SET_PARTITIONS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetPartitions__)(struct Subdevice *, NV2080_CTRL_GPU_GET_PARTITIONS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGpuGetComputeProfiles__)(struct Subdevice *, NV2080_CTRL_GPU_GET_COMPUTE_PROFILES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalStaticKMIGmgrGetProfiles__)(struct Subdevice *, NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_PROFILES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalStaticKMIGmgrGetPartitionableEngines__)(struct Subdevice *, NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_PARTITIONABLE_ENGINES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalStaticKMIGmgrGetSwizzIdFbMemPageRanges__)(struct Subdevice *, NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_SWIZZ_ID_FB_MEM_PAGE_RANGES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalStaticKMIGmgrGetComputeInstanceProfiles__)(struct Subdevice *, NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_COMPUTE_PROFILES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalKMIGmgrExportGPUInstance__)(struct Subdevice *, NV2080_CTRL_INTERNAL_KMIGMGR_IMPORT_EXPORT_GPU_INSTANCE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalKMIGmgrImportGPUInstance__)(struct Subdevice *, NV2080_CTRL_INTERNAL_KMIGMGR_IMPORT_EXPORT_GPU_INSTANCE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalKMIGmgrPromoteGpuInstanceMemRange__)(struct Subdevice *, NV2080_CTRL_INTERNAL_KMIGMGR_PROMOTE_GPU_INSTANCE_MEM_RANGE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdOsUnixGc6BlockerRefCnt__)(struct Subdevice *, NV2080_CTRL_OS_UNIX_GC6_BLOCKER_REFCNT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdOsUnixAllowDisallowGcoff__)(struct Subdevice *, NV2080_CTRL_OS_UNIX_ALLOW_DISALLOW_GCOFF_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdOsUnixAudioDynamicPower__)(struct Subdevice *, NV2080_CTRL_OS_UNIX_AUDIO_DYNAMIC_POWER_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdOsUnixVidmemPersistenceStatus__)(struct Subdevice *, NV2080_CTRL_OS_UNIX_VIDMEM_PERSISTENCE_STATUS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdOsUnixUpdateTgpStatus__)(struct Subdevice *, NV2080_CTRL_OS_UNIX_UPDATE_TGP_STATUS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdDisplayGetIpVersion__)(struct Subdevice *, NV2080_CTRL_INTERNAL_DISPLAY_GET_IP_VERSION_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdDisplayGetStaticInfo__)(struct Subdevice *, NV2080_CTRL_INTERNAL_DISPLAY_GET_STATIC_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdDisplaySetChannelPushbuffer__)(struct Subdevice *, NV2080_CTRL_INTERNAL_DISPLAY_CHANNEL_PUSHBUFFER_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdDisplayWriteInstMem__)(struct Subdevice *, NV2080_CTRL_INTERNAL_DISPLAY_WRITE_INST_MEM_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdDisplaySetupRgLineIntr__)(struct Subdevice *, NV2080_CTRL_INTERNAL_DISPLAY_SETUP_RG_LINE_INTR_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdDisplaySetImportedImpData__)(struct Subdevice *, NV2080_CTRL_INTERNAL_DISPLAY_SET_IMP_INIT_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdDisplayGetDisplayMask__)(struct Subdevice *, NV2080_CTRL_INTERNAL_DISPLAY_GET_ACTIVE_DISPLAY_DEVICES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdDisplayPinsetsToLockpins__)(struct Subdevice *, NV2080_CTRL_INTERNAL_DISP_PINSETS_TO_LOCKPINS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdDisplaySetSliLinkGpioSwControl__)(struct Subdevice *, NV2080_CTRL_INTERNAL_DISP_SET_SLI_LINK_GPIO_SW_CONTROL_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGpioProgramDirection__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GPIO_PROGRAM_DIRECTION_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGpioProgramOutput__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GPIO_PROGRAM_OUTPUT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGpioReadInput__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GPIO_READ_INPUT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGpioActivateHwFunction__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GPIO_ACTIVATE_HW_FUNCTION_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalDisplayAcpiSubsytemActivated__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdInternalDisplayPreModeSet__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdInternalDisplayPostModeSet__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdDisplayPreUnixConsole__)(struct Subdevice *, NV2080_CTRL_CMD_INTERNAL_DISPLAY_PRE_UNIX_CONSOLE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdDisplayPostUnixConsole__)(struct Subdevice *, NV2080_CTRL_CMD_INTERNAL_DISPLAY_POST_UNIX_CONSOLE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdMsencGetCaps__)(struct Subdevice *, NV2080_CTRL_INTERNAL_MSENC_GET_CAPS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalUvmRegisterAccessCntrBuffer__)(struct Subdevice *, NV2080_CTRL_INTERNAL_UVM_REGISTER_ACCESS_CNTR_BUFFER_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalUvmUnregisterAccessCntrBuffer__)(struct Subdevice *, NV2080_CTRL_INTERNAL_UVM_UNREGISTER_ACCESS_CNTR_BUFFER_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGetChipInfo__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GPU_GET_CHIP_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGetUserRegisterAccessMap__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GPU_GET_USER_REGISTER_ACCESS_MAP_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGetDeviceInfoTable__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalRecoverAllComputeContexts__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdInternalGetSmcMode__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GPU_GET_SMC_MODE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdIsEgpuBridge__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GET_EGPU_BRIDGE_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalBusFlushWithSysmembar__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdInternalBusSetupP2pMailboxLocal__)(struct Subdevice *, NV2080_CTRL_CMD_INTERNAL_BUS_SETUP_P2P_MAILBOX_LOCAL_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalBusSetupP2pMailboxRemote__)(struct Subdevice *, NV2080_CTRL_CMD_INTERNAL_BUS_SETUP_P2P_MAILBOX_REMOTE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalBusDestroyP2pMailbox__)(struct Subdevice *, NV2080_CTRL_INTERNAL_BUS_DESTROY_P2P_MAILBOX_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalBusCreateC2cPeerMapping__)(struct Subdevice *, NV2080_CTRL_INTERNAL_BUS_CREATE_C2C_PEER_MAPPING_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping__)(struct Subdevice *, NV2080_CTRL_INTERNAL_BUS_REMOVE_C2C_PEER_MAPPING_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries__)(struct Subdevice *, NV2080_CTRL_INTERNAL_VMMU_GET_SPA_FOR_GPA_ENTRIES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGmmuGetStaticInfo__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GMMU_GET_STATIC_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGmmuRegisterFaultBuffer__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GMMU_REGISTER_FAULT_BUFFER_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGmmuUnregisterFaultBuffer__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdInternalGmmuRegisterClientShadowFaultBuffer__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GMMU_REGISTER_CLIENT_SHADOW_FAULT_BUFFER_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGmmuUnregisterClientShadowFaultBuffer__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GMMU_UNREGISTER_CLIENT_SHADOW_FAULT_BUFFER_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGmmuCopyReservedSplitGVASpacePdesServer__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GMMU_COPY_RESERVED_SPLIT_GVASPACE_PDES_TO_SERVER_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdCeGetPhysicalCaps__)(struct Subdevice *, NV2080_CTRL_CE_GET_CAPS_V2_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdCeGetAllPhysicalCaps__)(struct Subdevice *, NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdCeUpdateClassDB__)(struct Subdevice *, NV2080_CTRL_CE_UPDATE_CLASS_DB_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdCeGetFaultMethodBufferSize__)(struct Subdevice *, NV2080_CTRL_CE_GET_FAULT_METHOD_BUFFER_SIZE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdCeGetHubPceMask__)(struct Subdevice *, NV2080_CTRL_CE_GET_HUB_PCE_MASK_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdIntrGetKernelTable__)(struct Subdevice *, NV2080_CTRL_INTERNAL_INTR_GET_KERNEL_TABLE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalPerfCudaLimitDisable__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdInternalPerfOptpCliClear__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdInternalPerfBoostSet_2x__)(struct Subdevice *, NV2080_CTRL_INTERNAL_PERF_BOOST_SET_PARAMS_2X *); - NV_STATUS (*__subdeviceCtrlCmdInternalPerfBoostSet_3x__)(struct Subdevice *, NV2080_CTRL_INTERNAL_PERF_BOOST_SET_PARAMS_3X *); - NV_STATUS (*__subdeviceCtrlCmdInternalPerfBoostClear_3x__)(struct Subdevice *, NV2080_CTRL_INTERNAL_PERF_BOOST_CLEAR_PARAMS_3X *); - NV_STATUS (*__subdeviceCtrlCmdInternalPerfGpuBoostSyncSetControl__)(struct Subdevice *, NV2080_CTRL_INTERNAL_PERF_GPU_BOOST_SYNC_CONTROL_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalPerfGpuBoostSyncGetInfo__)(struct Subdevice *, NV2080_CTRL_INTERNAL_PERF_GPU_BOOST_SYNC_GET_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalPerfSyncGpuBoostSetLimits__)(struct Subdevice *, NV2080_CTRL_INTERNAL_PERF_GPU_BOOST_SYNC_SET_LIMITS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalPerfPerfmonClientReservationCheck__)(struct Subdevice *, NV2080_CTRL_INTERNAL_PERF_PERFMON_CLIENT_RESERVATION_CHECK_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalPerfPerfmonClientReservationSet__)(struct Subdevice *, NV2080_CTRL_INTERNAL_PERF_PERFMON_CLIENT_RESERVATION_SET_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalPerfCfControllerSetMaxVGpuVMCount__)(struct Subdevice *, NV2080_CTRL_INTERNAL_PERF_CF_CONTROLLERS_SET_MAX_VGPU_VM_COUNT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalPerfGetAuxPowerState__)(struct Subdevice *, NV2080_CTRL_INTERNAL_PERF_GET_AUX_POWER_STATE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGcxEntryPrerequisite__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GCX_ENTRY_PREREQUISITE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBifGetStaticInfo__)(struct Subdevice *, NV2080_CTRL_INTERNAL_BIF_GET_STATIC_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBifGetAspmL1Flags__)(struct Subdevice *, NV2080_CTRL_INTERNAL_BIF_GET_ASPM_L1_FLAGS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBifSetPcieRo__)(struct Subdevice *, NV2080_CTRL_INTERNAL_BIF_SET_PCIE_RO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdBifDisableSystemMemoryAccess__)(struct Subdevice *, NV2080_CTRL_INTERNAL_BIF_DISABLE_SYSTEM_MEMORY_ACCESS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdHshubPeerConnConfig__)(struct Subdevice *, NV2080_CTRL_INTERNAL_HSHUB_PEER_CONN_CONFIG_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdHshubFirstLinkPeerId__)(struct Subdevice *, NV2080_CTRL_INTERNAL_HSHUB_FIRST_LINK_PEER_ID_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdHshubGetHshubIdForLinks__)(struct Subdevice *, NV2080_CTRL_INTERNAL_HSHUB_GET_HSHUB_ID_FOR_LINKS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdHshubGetNumUnits__)(struct Subdevice *, NV2080_CTRL_INTERNAL_HSHUB_GET_NUM_UNITS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdHshubNextHshubId__)(struct Subdevice *, NV2080_CTRL_INTERNAL_HSHUB_NEXT_HSHUB_ID_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdHshubEgmConfig__)(struct Subdevice *, NV2080_CTRL_INTERNAL_HSHUB_EGM_CONFIG_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalNvlinkEnableComputePeerAddr__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdInternalNvlinkGetSetNvswitchFabricAddr__)(struct Subdevice *, NV2080_CTRL_INTERNAL_NVLINK_GET_SET_NVSWITCH_FABRIC_ADDR_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalNvlinkGetNumActiveLinksPerIoctrl__)(struct Subdevice *, NV2080_CTRL_INTERNAL_NVLINK_GET_NUM_ACTIVE_LINK_PER_IOCTRL_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalNvlinkGetTotalNumLinksPerIoctrl__)(struct Subdevice *, NV2080_CTRL_INTERNAL_NVLINK_GET_TOTAL_NUM_LINK_PER_IOCTRL_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalSetP2pCaps__)(struct Subdevice *, NV2080_CTRL_INTERNAL_SET_P2P_CAPS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalRemoveP2pCaps__)(struct Subdevice *, NV2080_CTRL_INTERNAL_REMOVE_P2P_CAPS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGetPcieP2pCaps__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GET_PCIE_P2P_CAPS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGetCoherentFbApertureSize__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GET_COHERENT_FB_APERTURE_SIZE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGetLocalAtsConfig__)(struct Subdevice *, NV2080_CTRL_INTERNAL_MEMSYS_GET_LOCAL_ATS_CONFIG_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalSetPeerAtsConfig__)(struct Subdevice *, NV2080_CTRL_INTERNAL_MEMSYS_SET_PEER_ATS_CONFIG_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalInitGpuIntr__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GSYNC_ATTACH_AND_INIT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGsyncOptimizeTiming__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GSYNC_OPTIMIZE_TIMING_PARAMETERS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGsyncGetDisplayIds__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GSYNC_GET_DISPLAY_IDS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGsyncSetStereoSync__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GSYNC_SET_STREO_SYNC_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGsyncGetVactiveLines__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GSYNC_GET_VERTICAL_ACTIVE_LINES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGsyncIsDisplayIdValid__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GSYNC_IS_DISPLAYID_VALID_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GSYNC_SET_OR_RESTORE_RASTER_SYNC_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalFbsrInit__)(struct Subdevice *, NV2080_CTRL_INTERNAL_FBSR_INIT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalFbsrSendRegionInfo__)(struct Subdevice *, NV2080_CTRL_INTERNAL_FBSR_SEND_REGION_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalPostInitBrightcStateLoad__)(struct Subdevice *, NV2080_CTRL_INTERNAL_INIT_BRIGHTC_STATE_LOAD_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalSetStaticEdidData__)(struct Subdevice *, NV2080_CTRL_CMD_INTERNAL_SET_STATIC_EDID_DATA_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalSmbpbiPfmReqHndlrCapUpdate__)(struct Subdevice *, NV2080_CTRL_INTERNAL_SMBPBI_PFM_REQ_HNDLR_CAP_UPDATE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalPmgrPfmReqHndlrStateLoadSync__)(struct Subdevice *, NV2080_CTRL_INTERNAL_PFM_REQ_HNDLR_STATE_SYNC_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalThermPfmReqHndlrStateInitSync__)(struct Subdevice *, NV2080_CTRL_INTERNAL_PFM_REQ_HNDLR_STATE_SYNC_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalPerfPfmReqHndlrGetPm1State__)(struct Subdevice *, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_GET_PM1_STATE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalPerfPfmReqHndlrSetPm1State__)(struct Subdevice *, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_SET_PM1_STATE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalPmgrPfmReqHndlrUpdateEdppLimit__)(struct Subdevice *, NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_UPDATE_EDPP_LIMIT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalPmgrPfmReqHndlrGetEdppLimitInfo__)(struct Subdevice *, NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_GET_EDPP_LIMIT_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalThermPfmReqHndlrUpdateTgpuLimit__)(struct Subdevice *, NV2080_CTRL_CMD_INTERNAL_THERM_PFM_REQ_HNDLR_UPDATE_TGPU_LIMIT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTgpMode__)(struct Subdevice *, NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_CONFIGURE_TGP_MODE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTurboV2__)(struct Subdevice *, NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_CONFIGURE_TURBO_V2_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateInfo__)(struct Subdevice *, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_GET_VPSTATE_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateMapping__)(struct Subdevice *, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_GET_VPSTATE_MAPPING_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalPerfPfmReqHndlrSetVpstate__)(struct Subdevice *, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_SET_VPSTATE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalPmgrUnsetDynamicBoostLimit__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdInternalDetectHsVideoBridge__)(struct Subdevice *); - NV_STATUS (*__subdeviceCtrlCmdInternalConfComputeGetStaticInfo__)(struct Subdevice *, NV2080_CTRL_INTERNAL_CONF_COMPUTE_GET_STATIC_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalConfComputeDeriveSwlKeys__)(struct Subdevice *, NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_SWL_KEYS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalConfComputeDeriveLceKeys__)(struct Subdevice *, NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalConfComputeRotateKeys__)(struct Subdevice *, NV2080_CTRL_INTERNAL_CONF_COMPUTE_ROTATE_KEYS_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalConfComputeRCChannelsForKeyRotation__)(struct Subdevice *, NV2080_CTRL_INTERNAL_CONF_COMPUTE_RC_CHANNELS_FOR_KEY_ROTATION_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalConfComputeSetGpuState__)(struct Subdevice *, NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_SET_GPU_STATE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalConfComputeSetSecurityPolicy__)(struct Subdevice *, NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_SET_SECURITY_POLICY_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalInitUserSharedData__)(struct Subdevice *, NV2080_CTRL_INTERNAL_INIT_USER_SHARED_DATA_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalUserSharedDataSetDataPoll__)(struct Subdevice *, NV2080_CTRL_INTERNAL_USER_SHARED_DATA_SET_DATA_POLL_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdInternalGspStartTrace__)(struct Subdevice *, NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalBootloadGspVgpuPluginTask__)(struct Subdevice *, NV2080_CTRL_VGPU_MGR_INTERNAL_BOOTLOAD_GSP_VGPU_PLUGIN_TASK_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalShutdownGspVgpuPluginTask__)(struct Subdevice *, NV2080_CTRL_VGPU_MGR_INTERNAL_SHUTDOWN_GSP_VGPU_PLUGIN_TASK_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalPgpuAddVgpuType__)(struct Subdevice *, NV2080_CTRL_VGPU_MGR_INTERNAL_PGPU_ADD_VGPU_TYPE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalEnumerateVgpuPerPgpu__)(struct Subdevice *, NV2080_CTRL_VGPU_MGR_INTERNAL_ENUMERATE_VGPU_PER_PGPU_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalClearGuestVmInfo__)(struct Subdevice *, NV2080_CTRL_VGPU_MGR_INTERNAL_CLEAR_GUEST_VM_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalGetVgpuFbUsage__)(struct Subdevice *, NV2080_CTRL_VGPU_MGR_INTERNAL_GET_VGPU_FB_USAGE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity__)(struct Subdevice *, NV2080_CTRL_VGPU_MGR_INTERNAL_SET_VGPU_ENCODER_CAPACITY_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalCleanupGspVgpuPluginResources__)(struct Subdevice *, NV2080_CTRL_VGPU_MGR_INTERNAL_VGPU_PLUGIN_CLEANUP_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalGetPgpuFsEncoding__)(struct Subdevice *, NV2080_CTRL_VGPU_MGR_INTERNAL_GET_PGPU_FS_ENCODING_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalGetPgpuMigrationSupport__)(struct Subdevice *, NV2080_CTRL_VGPU_MGR_INTERNAL_GET_PGPU_MIGRATION_SUPPORT_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig__)(struct Subdevice *, NV2080_CTRL_VGPU_MGR_INTERNAL_SET_VGPU_MGR_CONFIG_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalFreeStates__)(struct Subdevice *, NV2080_CTRL_VGPU_MGR_INTERNAL_FREE_STATES_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdGetAvailableHshubMask__)(struct Subdevice *, NV2080_CTRL_CMD_HSHUB_GET_AVAILABLE_MASK_PARAMS *); - NV_STATUS (*__subdeviceCtrlSetEcThrottleMode__)(struct Subdevice *, NV2080_CTRL_CMD_HSHUB_SET_EC_THROTTLE_MODE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdCcuMap__)(struct Subdevice *, NV2080_CTRL_INTERNAL_CCU_MAP_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdCcuUnmap__)(struct Subdevice *, NV2080_CTRL_INTERNAL_CCU_UNMAP_INFO_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdCcuSetStreamState__)(struct Subdevice *, NV2080_CTRL_INTERNAL_CCU_STREAM_STATE_PARAMS *); - NV_STATUS (*__subdeviceCtrlCmdSpdmPartition__)(struct Subdevice *, NV2080_CTRL_INTERNAL_SPDM_PARTITION_PARAMS *); - NvBool (*__subdeviceShareCallback__)(struct Subdevice *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__subdeviceCheckMemInterUnmap__)(struct Subdevice *, NvBool); - NV_STATUS (*__subdeviceGetOrAllocNotifShare__)(struct Subdevice *, NvHandle, NvHandle, struct NotifShare **); - NV_STATUS (*__subdeviceMapTo__)(struct Subdevice *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__subdeviceGetMapAddrSpace__)(struct Subdevice *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__subdeviceSetNotificationShare__)(struct Subdevice *, struct NotifShare *); - NvU32 (*__subdeviceGetRefCount__)(struct Subdevice *); - void (*__subdeviceAddAdditionalDependants__)(struct RsClient *, struct Subdevice *, RsResourceRef *); - NV_STATUS (*__subdeviceControl_Prologue__)(struct Subdevice *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__subdeviceGetRegBaseOffsetAndSize__)(struct Subdevice *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__subdeviceUnmapFrom__)(struct Subdevice *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__subdeviceControl_Epilogue__)(struct Subdevice *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__subdeviceGetInternalObjectHandle__)(struct Subdevice *); - NV_STATUS (*__subdeviceControl__)(struct Subdevice *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__subdeviceUnmap__)(struct Subdevice *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__subdeviceGetMemInterMapParams__)(struct Subdevice *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__subdeviceGetMemoryMappingDescriptor__)(struct Subdevice *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__subdeviceUnregisterEvent__)(struct Subdevice *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__subdeviceControlSerialization_Prologue__)(struct Subdevice *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__subdeviceCanCopy__)(struct Subdevice *); - NvBool (*__subdeviceIsPartialUnmapSupported__)(struct Subdevice *); - NV_STATUS (*__subdeviceIsDuplicate__)(struct Subdevice *, NvHandle, NvBool *); - void (*__subdeviceControlSerialization_Epilogue__)(struct Subdevice *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__subdeviceGetNotificationListPtr__)(struct Subdevice *); - struct NotifShare *(*__subdeviceGetNotificationShare__)(struct Subdevice *); - NV_STATUS (*__subdeviceMap__)(struct Subdevice *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__subdeviceAccessCallback__)(struct Subdevice *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct INotifier *__nvoc_pbase_INotifier; // inotify super^2 + struct Notifier *__nvoc_pbase_Notifier; // notify super + struct Subdevice *__nvoc_pbase_Subdevice; // subdevice + + // Vtable with 567 per-object function pointers + void (*__subdevicePreDestruct__)(struct Subdevice * /*this*/); // virtual override (res) base (gpures) + NV_STATUS (*__subdeviceInternalControlForward__)(struct Subdevice * /*this*/, NvU32, void *, NvU32); // virtual override (gpures) base (gpures) + NV_STATUS (*__subdeviceControlFilter__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) + NV_STATUS (*__subdeviceCtrlCmdBiosGetInfoV2__)(struct Subdevice * /*this*/, NV2080_CTRL_BIOS_GET_INFO_V2_PARAMS *); // halified (2 hals) exported (id=0x20800810) body + NV_STATUS (*__subdeviceCtrlCmdBiosGetNbsiV2__)(struct Subdevice * /*this*/, NV2080_CTRL_BIOS_GET_NBSI_V2_PARAMS *); // exported (id=0x2080080e) + NV_STATUS (*__subdeviceCtrlCmdBiosGetSKUInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS *); // halified (2 hals) exported (id=0x20800808) body + NV_STATUS (*__subdeviceCtrlCmdBiosGetPostTime__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_BIOS_GET_POST_TIME_PARAMS *); // halified (2 hals) exported (id=0x20800809) body + NV_STATUS (*__subdeviceCtrlCmdBiosGetUefiSupport__)(struct Subdevice * /*this*/, NV2080_CTRL_BIOS_GET_UEFI_SUPPORT_PARAMS *); // exported (id=0x2080080b) + NV_STATUS (*__subdeviceCtrlCmdMcGetArchInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_MC_GET_ARCH_INFO_PARAMS *); // exported (id=0x20801701) + NV_STATUS (*__subdeviceCtrlCmdMcGetManufacturer__)(struct Subdevice * /*this*/, NV2080_CTRL_MC_GET_MANUFACTURER_PARAMS *); // exported (id=0x20801703) + NV_STATUS (*__subdeviceCtrlCmdMcQueryHostclkSlowdownStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_MC_QUERY_HOSTCLK_SLOWDOWN_STATUS_PARAMS *); // exported (id=0x20801708) + NV_STATUS (*__subdeviceCtrlCmdMcSetHostclkSlowdownStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_MC_SET_HOSTCLK_SLOWDOWN_STATUS_PARAMS *); // exported (id=0x20801709) + NV_STATUS (*__subdeviceCtrlCmdMcChangeReplayableFaultOwnership__)(struct Subdevice * /*this*/, NV2080_CTRL_MC_CHANGE_REPLAYABLE_FAULT_OWNERSHIP_PARAMS *); // exported (id=0x2080170c) + NV_STATUS (*__subdeviceCtrlCmdMcServiceInterrupts__)(struct Subdevice * /*this*/, NV2080_CTRL_MC_SERVICE_INTERRUPTS_PARAMS *); // exported (id=0x20801702) + NV_STATUS (*__subdeviceCtrlCmdMcGetEngineNotificationIntrVectors__)(struct Subdevice * /*this*/, NV2080_CTRL_MC_GET_ENGINE_NOTIFICATION_INTR_VECTORS_PARAMS *); // exported (id=0x2080170d) + NV_STATUS (*__subdeviceCtrlCmdMcGetStaticIntrTable__)(struct Subdevice * /*this*/, NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS *); // exported (id=0x2080170e) + NV_STATUS (*__subdeviceCtrlCmdDmaInvalidateTLB__)(struct Subdevice * /*this*/, NV2080_CTRL_DMA_INVALIDATE_TLB_PARAMS *); // exported (id=0x20802502) + NV_STATUS (*__subdeviceCtrlCmdDmaGetInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_DMA_GET_INFO_PARAMS *); // exported (id=0x20802503) + NV_STATUS (*__subdeviceCtrlCmdBusGetPciInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_BUS_GET_PCI_INFO_PARAMS *); // exported (id=0x20801801) + NV_STATUS (*__subdeviceCtrlCmdBusGetInfoV2__)(struct Subdevice * /*this*/, NV2080_CTRL_BUS_GET_INFO_V2_PARAMS *); // exported (id=0x20801823) + NV_STATUS (*__subdeviceCtrlCmdBusGetPciBarInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_BUS_GET_PCI_BAR_INFO_PARAMS *); // exported (id=0x20801803) + NV_STATUS (*__subdeviceCtrlCmdBusSetPcieSpeed__)(struct Subdevice * /*this*/, NV2080_CTRL_BUS_SET_PCIE_SPEED_PARAMS *); // exported (id=0x20801805) + NV_STATUS (*__subdeviceCtrlCmdBusSetPcieLinkWidth__)(struct Subdevice * /*this*/, NV2080_CTRL_BUS_SET_PCIE_LINK_WIDTH_PARAMS *); // exported (id=0x20801804) + NV_STATUS (*__subdeviceCtrlCmdBusServiceGpuMultifunctionState__)(struct Subdevice * /*this*/, NV2080_CTRL_BUS_SERVICE_GPU_MULTIFUNC_STATE_PARAMS *); // exported (id=0x20801812) + NV_STATUS (*__subdeviceCtrlCmdBusGetPexCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_BUS_GET_PEX_COUNTERS_PARAMS *); // exported (id=0x20801813) + NV_STATUS (*__subdeviceCtrlCmdBusGetBFD__)(struct Subdevice * /*this*/, NV2080_CTRL_BUS_GET_BFD_PARAMSARR *); // exported (id=0x20801821) + NV_STATUS (*__subdeviceCtrlCmdBusGetAspmDisableFlags__)(struct Subdevice * /*this*/, NV2080_CTRL_BUS_GET_ASPM_DISABLE_FLAGS_PARAMS *); // exported (id=0x20801822) + NV_STATUS (*__subdeviceCtrlCmdBusControlPublicAspmBits__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_BUS_CONTROL_PUBLIC_ASPM_BITS_PARAMS *); // exported (id=0x20801824) + NV_STATUS (*__subdeviceCtrlCmdBusClearPexCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_BUS_CLEAR_PEX_COUNTERS_PARAMS *); // exported (id=0x20801814) + NV_STATUS (*__subdeviceCtrlCmdBusGetPexUtilCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_BUS_GET_PEX_UTIL_COUNTERS_PARAMS *); // exported (id=0x20801819) + NV_STATUS (*__subdeviceCtrlCmdBusClearPexUtilCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_BUS_CLEAR_PEX_UTIL_COUNTERS_PARAMS *); // exported (id=0x20801820) + NV_STATUS (*__subdeviceCtrlCmdBusFreezePexCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_BUS_FREEZE_PEX_COUNTERS_PARAMS *); // exported (id=0x20801815) + NV_STATUS (*__subdeviceCtrlCmdBusGetPexLaneCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_BUS_GET_PEX_LANE_COUNTERS_PARAMS *); // exported (id=0x20801816) + NV_STATUS (*__subdeviceCtrlCmdBusGetPcieLtrLatency__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_BUS_GET_PCIE_LTR_LATENCY_PARAMS *); // exported (id=0x20801817) + NV_STATUS (*__subdeviceCtrlCmdBusSetPcieLtrLatency__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_BUS_SET_PCIE_LTR_LATENCY_PARAMS *); // exported (id=0x20801818) + NV_STATUS (*__subdeviceCtrlCmdBusGetNvlinkPeerIdMask__)(struct Subdevice * /*this*/, NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS *); // exported (id=0x20801825) + NV_STATUS (*__subdeviceCtrlCmdBusSetEomParameters__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_BUS_SET_EOM_PARAMETERS_PARAMS *); // exported (id=0x20801826) + NV_STATUS (*__subdeviceCtrlCmdBusGetUphyDlnCfgSpace__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_BUS_GET_UPHY_DLN_CFG_SPACE_PARAMS *); // exported (id=0x20801827) + NV_STATUS (*__subdeviceCtrlCmdBusGetEomStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_BUS_GET_EOM_STATUS_PARAMS *); // exported (id=0x20801828) + NV_STATUS (*__subdeviceCtrlCmdBusGetPcieReqAtomicsCaps__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_BUS_GET_PCIE_REQ_ATOMICS_CAPS_PARAMS *); // halified (2 hals) exported (id=0x20801829) body + NV_STATUS (*__subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS *); // halified (2 hals) exported (id=0x2080182a) body + NV_STATUS (*__subdeviceCtrlCmdBusGetC2CInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_BUS_GET_C2C_INFO_PARAMS *); // halified (2 hals) exported (id=0x2080182b) body + NV_STATUS (*__subdeviceCtrlCmdBusSysmemAccess__)(struct Subdevice * /*this*/, NV2080_CTRL_BUS_SYSMEM_ACCESS_PARAMS *); // exported (id=0x2080182c) + NV_STATUS (*__subdeviceCtrlCmdBusSetP2pMapping__)(struct Subdevice * /*this*/, NV2080_CTRL_BUS_SET_P2P_MAPPING_PARAMS *); // halified (2 hals) exported (id=0x2080182e) body + NV_STATUS (*__subdeviceCtrlCmdBusUnsetP2pMapping__)(struct Subdevice * /*this*/, NV2080_CTRL_BUS_UNSET_P2P_MAPPING_PARAMS *); // halified (2 hals) exported (id=0x2080182f) body + NV_STATUS (*__subdeviceCtrlCmdGetNvlinkCountersV2__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_COUNTERS_V2_PARAMS *); // exported (id=0x20803050) + NV_STATUS (*__subdeviceCtrlCmdClearNvlinkCountersV2__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_CLEAR_COUNTERS_V2_PARAMS *); // exported (id=0x20803051) + NV_STATUS (*__subdeviceCtrlCmdGetNvlinkCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_COUNTERS_PARAMS *); // exported (id=0x20803004) + NV_STATUS (*__subdeviceCtrlCmdClearNvlinkCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_CLEAR_COUNTERS_PARAMS *); // exported (id=0x20803005) + NV_STATUS (*__subdeviceCtrlCmdBusGetNvlinkCaps__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS *); // halified (2 hals) exported (id=0x20803001) + NV_STATUS (*__subdeviceCtrlCmdBusGetNvlinkStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS_PARAMS *); // exported (id=0x20803002) + NV_STATUS (*__subdeviceCtrlCmdBusGetNvlinkErrInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_ERR_INFO_PARAMS *); // exported (id=0x20803003) + NV_STATUS (*__subdeviceCtrlCmdNvlinGetLinkFomValues__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_NVLINK_GET_LINK_FOM_VALUES_PARAMS *); // exported (id=0x20803011) + NV_STATUS (*__subdeviceCtrlCmdNvlinkGetNvlinkEccErrors__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_NVLINK_ECC_ERRORS_PARAMS *); // exported (id=0x20803014) + NV_STATUS (*__subdeviceCtrlCmdNvlinkGetLinkFatalErrorCounts__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_LINK_FATAL_ERROR_COUNTS_PARAMS *); // exported (id=0x20803009) + NV_STATUS (*__subdeviceCtrlCmdNvlinkSetupEom__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_NVLINK_SETUP_EOM_PARAMS *); // exported (id=0x2080300c) + NV_STATUS (*__subdeviceCtrlCmdNvlinkGetPowerState__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_POWER_STATE_PARAMS *); // exported (id=0x2080300e) + NV_STATUS (*__subdeviceCtrlCmdNvlinkReadTpCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_READ_TP_COUNTERS_PARAMS *); // exported (id=0x20803015) + NV_STATUS (*__subdeviceCtrlCmdNvlinkGetLpCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_LP_COUNTERS_PARAMS *); // exported (id=0x20803018) + NV_STATUS (*__subdeviceCtrlCmdNvlinkEnableNvlinkPeer__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS *); // exported (id=0x20803017) + NV_STATUS (*__subdeviceCtrlCmdNvlinkCoreCallback__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS *); // exported (id=0x20803019) + NV_STATUS (*__subdeviceCtrlCmdNvlinkGetAliEnabled__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_ALI_ENABLED_PARAMS *); // exported (id=0x2080301a) + NV_STATUS (*__subdeviceCtrlCmdNvlinkSetLoopbackMode__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_PARAMS *); // exported (id=0x20803023) + NV_STATUS (*__subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS *); // exported (id=0x2080301b) + NV_STATUS (*__subdeviceCtrlCmdNvlinkUpdateHshubMux__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_PARAMS *); // exported (id=0x2080301c) + NV_STATUS (*__subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS *); // exported (id=0x2080301d) + NV_STATUS (*__subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS *); // exported (id=0x2080301e) + NV_STATUS (*__subdeviceCtrlCmdNvlinkRemoveNvlinkMapping__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_REMOVE_NVLINK_MAPPING_PARAMS *); // exported (id=0x2080301f) + NV_STATUS (*__subdeviceCtrlCmdNvlinkSaveRestoreHshubState__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_SAVE_RESTORE_HSHUB_STATE_PARAMS *); // exported (id=0x20803020) + NV_STATUS (*__subdeviceCtrlCmdNvlinkProgramBufferready__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PROGRAM_BUFFERREADY_PARAMS *); // exported (id=0x20803021) + NV_STATUS (*__subdeviceCtrlCmdNvlinkUpdateCurrentConfig__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_UPDATE_CURRENT_CONFIG_PARAMS *); // exported (id=0x20803022) + NV_STATUS (*__subdeviceCtrlCmdNvlinkUpdatePeerLinkMask__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_UPDATE_PEER_LINK_MASK_PARAMS *); // exported (id=0x20803024) + NV_STATUS (*__subdeviceCtrlCmdNvlinkUpdateLinkConnection__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_UPDATE_LINK_CONNECTION_PARAMS *); // exported (id=0x20803025) + NV_STATUS (*__subdeviceCtrlCmdNvlinkEnableLinksPostTopology__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_ENABLE_LINKS_POST_TOPOLOGY_PARAMS *); // exported (id=0x20803026) + NV_STATUS (*__subdeviceCtrlCmdNvlinkPreLinkTrainAli__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRE_LINK_TRAIN_ALI_PARAMS *); // exported (id=0x20803027) + NV_STATUS (*__subdeviceCtrlCmdNvlinkGetRefreshCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_REFRESH_COUNTERS_PARAMS *); // exported (id=0x20803028) + NV_STATUS (*__subdeviceCtrlCmdNvlinkClearRefreshCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_CLEAR_REFRESH_COUNTERS_PARAMS *); // exported (id=0x20803029) + NV_STATUS (*__subdeviceCtrlCmdNvlinkGetLinkMaskPostRxDet__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_LINK_MASK_POST_RX_DET_PARAMS *); // exported (id=0x2080302a) + NV_STATUS (*__subdeviceCtrlCmdNvlinkLinkTrainAli__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_LINK_TRAIN_ALI_PARAMS *); // exported (id=0x2080302b) + NV_STATUS (*__subdeviceCtrlCmdNvlinkGetNvlinkDeviceInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_NVLINK_DEVICE_INFO_PARAMS *); // exported (id=0x2080302c) + NV_STATUS (*__subdeviceCtrlCmdNvlinkGetIoctrlDeviceInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_IOCTRL_DEVICE_INFO_PARAMS *); // exported (id=0x2080302d) + NV_STATUS (*__subdeviceCtrlCmdNvlinkProgramLinkSpeed__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PROGRAM_LINK_SPEED_PARAMS *); // exported (id=0x2080302e) + NV_STATUS (*__subdeviceCtrlCmdNvlinkAreLinksTrained__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_ARE_LINKS_TRAINED_PARAMS *); // exported (id=0x2080302f) + NV_STATUS (*__subdeviceCtrlCmdNvlinkResetLinks__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_RESET_LINKS_PARAMS *); // exported (id=0x20803030) + NV_STATUS (*__subdeviceCtrlCmdNvlinkDisableDlInterrupts__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_DISABLE_DL_INTERRUPTS_PARAMS *); // exported (id=0x20803031) + NV_STATUS (*__subdeviceCtrlCmdNvlinkGetLinkAndClockInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_INFO_PARAMS *); // exported (id=0x20803032) + NV_STATUS (*__subdeviceCtrlCmdNvlinkSetupNvlinkSysmem__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_SETUP_NVLINK_SYSMEM_PARAMS *); // exported (id=0x20803033) + NV_STATUS (*__subdeviceCtrlCmdNvlinkProcessForcedConfigs__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PROCESS_FORCED_CONFIGS_PARAMS *); // exported (id=0x20803034) + NV_STATUS (*__subdeviceCtrlCmdNvlinkSyncLaneShutdownProps__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_SYNC_NVLINK_SHUTDOWN_PROPS_PARAMS *); // exported (id=0x20803035) + NV_STATUS (*__subdeviceCtrlCmdNvlinkEnableSysmemNvlinkAts__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_ENABLE_SYSMEM_NVLINK_ATS_PARAMS *); // exported (id=0x20803036) + NV_STATUS (*__subdeviceCtrlCmdNvlinkHshubGetSysmemNvlinkMask__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_HSHUB_GET_SYSMEM_NVLINK_MASK_PARAMS *); // exported (id=0x20803037) + NV_STATUS (*__subdeviceCtrlCmdNvlinkGetSetNvswitchFlaAddr__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_SET_NVSWITCH_FLA_ADDR_PARAMS *); // exported (id=0x20803038) + NV_STATUS (*__subdeviceCtrlCmdNvlinkSyncLinkMasksAndVbiosInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_SYNC_LINK_MASKS_AND_VBIOS_INFO_PARAMS *); // exported (id=0x20803039) + NV_STATUS (*__subdeviceCtrlCmdNvlinkEnableLinks__)(struct Subdevice * /*this*/); // exported (id=0x2080303a) + NV_STATUS (*__subdeviceCtrlCmdNvlinkProcessInitDisabledLinks__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PROCESS_INIT_DISABLED_LINKS_PARAMS *); // exported (id=0x2080303b) + NV_STATUS (*__subdeviceCtrlCmdNvlinkInbandSendData__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_INBAND_SEND_DATA_PARAMS *); // exported (id=0x20803040) + NV_STATUS (*__subdeviceCtrlCmdNvlinkPostFaultUp__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_POST_FAULT_UP_PARAMS *); // exported (id=0x20803043) + NV_STATUS (*__subdeviceCtrlCmdNvlinkEomControl__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_EOM_CONTROL_PARAMS *); // exported (id=0x2080303c) + NV_STATUS (*__subdeviceCtrlCmdNvlinkSetL1Threshold__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_SET_L1_THRESHOLD_PARAMS *); // exported (id=0x2080303e) + NV_STATUS (*__subdeviceCtrlCmdNvlinkDirectConnectCheck__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_DIRECT_CONNECT_CHECK_PARAMS *); // exported (id=0x20803042) + NV_STATUS (*__subdeviceCtrlCmdNvlinkGetL1Threshold__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_L1_THRESHOLD_PARAMS *); // exported (id=0x2080303f) + NV_STATUS (*__subdeviceCtrlCmdIsNvlinkReducedConfig__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_IS_REDUCED_CONFIG_PARAMS *); // exported (id=0x20803046) + NV_STATUS (*__subdeviceCtrlCmdNvlinkGetPortEvents__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_PORT_EVENTS_PARAMS *); // exported (id=0x20803044) + NV_STATUS (*__subdeviceCtrlCmdI2cReadBuffer__)(struct Subdevice * /*this*/, NV2080_CTRL_I2C_READ_BUFFER_PARAMS *); // exported (id=0x20800601) + NV_STATUS (*__subdeviceCtrlCmdI2cWriteBuffer__)(struct Subdevice * /*this*/, NV2080_CTRL_I2C_WRITE_BUFFER_PARAMS *); // exported (id=0x20800602) + NV_STATUS (*__subdeviceCtrlCmdI2cReadReg__)(struct Subdevice * /*this*/, NV2080_CTRL_I2C_RW_REG_PARAMS *); // exported (id=0x20800603) + NV_STATUS (*__subdeviceCtrlCmdI2cWriteReg__)(struct Subdevice * /*this*/, NV2080_CTRL_I2C_RW_REG_PARAMS *); // exported (id=0x20800604) + NV_STATUS (*__subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2__)(struct Subdevice * /*this*/, NV2080_CTRL_PERF_GET_GPUMON_PERFMON_UTIL_SAMPLES_V2_PARAMS *); // halified (2 hals) exported (id=0x20802096) body + NV_STATUS (*__subdeviceCtrlCmdPerfRatedTdpGetControl__)(struct Subdevice * /*this*/, NV2080_CTRL_PERF_RATED_TDP_CONTROL_PARAMS *); // exported (id=0x2080206e) + NV_STATUS (*__subdeviceCtrlCmdPerfRatedTdpSetControl__)(struct Subdevice * /*this*/, NV2080_CTRL_PERF_RATED_TDP_CONTROL_PARAMS *); // halified (singleton optimized) exported (id=0x2080206f) + NV_STATUS (*__subdeviceCtrlCmdPerfReservePerfmonHw__)(struct Subdevice * /*this*/, NV2080_CTRL_PERF_RESERVE_PERFMON_HW_PARAMS *); // halified (2 hals) exported (id=0x20802093) body + NV_STATUS (*__subdeviceCtrlCmdPerfSetAuxPowerState__)(struct Subdevice * /*this*/, NV2080_CTRL_PERF_SET_AUX_POWER_STATE_PARAMS *); // halified (singleton optimized) exported (id=0x20802092) + NV_STATUS (*__subdeviceCtrlCmdPerfSetPowerstate__)(struct Subdevice * /*this*/, NV2080_CTRL_PERF_SET_POWERSTATE_PARAMS *); // halified (singleton optimized) exported (id=0x2080205b) + NV_STATUS (*__subdeviceCtrlCmdPerfGetLevelInfo_V2__)(struct Subdevice * /*this*/, NV2080_CTRL_PERF_GET_LEVEL_INFO_V2_PARAMS *); // halified (2 hals) exported (id=0x2080200b) body + NV_STATUS (*__subdeviceCtrlCmdPerfGetCurrentPstate__)(struct Subdevice * /*this*/, NV2080_CTRL_PERF_GET_CURRENT_PSTATE_PARAMS *); // halified (2 hals) exported (id=0x20802068) body + NV_STATUS (*__subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample__)(struct Subdevice * /*this*/, NV2080_CTRL_PERF_GET_VID_ENG_PERFMON_SAMPLE_PARAMS *); // halified (2 hals) exported (id=0x20802087) body + NV_STATUS (*__subdeviceCtrlCmdPerfGetPowerstate__)(struct Subdevice * /*this*/, NV2080_CTRL_PERF_GET_POWERSTATE_PARAMS *); // halified (2 hals) exported (id=0x2080205a) body + NV_STATUS (*__subdeviceCtrlCmdPerfNotifyVideoevent__)(struct Subdevice * /*this*/, NV2080_CTRL_PERF_NOTIFY_VIDEOEVENT_PARAMS *); // halified (2 hals) exported (id=0x2080205d) body + NV_STATUS (*__subdeviceCtrlCmdKPerfBoost__)(struct Subdevice * /*this*/, NV2080_CTRL_PERF_BOOST_PARAMS *); // exported (id=0x2080200a) + NV_STATUS (*__subdeviceCtrlCmdFbGetFBRegionInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_PARAMS *); // exported (id=0x20801320) + NV_STATUS (*__subdeviceCtrlCmdFbGetBar1Offset__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_BAR1_OFFSET_PARAMS *); // exported (id=0x20801310) + NV_STATUS (*__subdeviceCtrlCmdFbIsKind__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_IS_KIND_PARAMS *); // exported (id=0x20801313) + NV_STATUS (*__subdeviceCtrlCmdFbGetMemAlignment__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_MEM_ALIGNMENT_PARAMS *); // exported (id=0x20801342) + NV_STATUS (*__subdeviceCtrlCmdFbGetHeapReservationSize__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_FB_GET_HEAP_RESERVATION_SIZE_PARAMS *); // exported (id=0x20800a5b) + NV_STATUS (*__subdeviceCtrlCmdInternalMemmgrGetVgpuHostRmReservedFb__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_MEMMGR_GET_VGPU_CONFIG_HOST_RESERVED_FB_PARAMS *); // exported (id=0x20800ac5) + NV_STATUS (*__subdeviceCtrlCmdGbGetSemaphoreSurfaceLayout__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_SEMAPHORE_SURFACE_LAYOUT_PARAMS *); // exported (id=0x20801352) + NV_STATUS (*__subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_MEMMGR_MEMORY_TRANSFER_WITH_GSP_PARAMS *); // halified (singleton optimized) exported (id=0x20800afa) body + NV_STATUS (*__subdeviceCtrlCmdFbGetInfoV2__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_INFO_V2_PARAMS *); // exported (id=0x20801303) + NV_STATUS (*__subdeviceCtrlCmdFbGetCarveoutAddressInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_SYSTEM_CARVEOUT_ADDRESS_SPACE_INFO *); // exported (id=0x2080130b) + NV_STATUS (*__subdeviceCtrlCmdFbGetCalibrationLockFailed__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_CALIBRATION_LOCK_FAILED_PARAMS *); // exported (id=0x2080130c) + NV_STATUS (*__subdeviceCtrlCmdFbFlushGpuCache__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_FLUSH_GPU_CACHE_PARAMS *); // exported (id=0x2080130e) + NV_STATUS (*__subdeviceCtrlCmdFbSetGpuCacheAllocPolicy__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS *); // exported (id=0x2080130f) + NV_STATUS (*__subdeviceCtrlCmdFbGetGpuCacheAllocPolicy__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS *); // exported (id=0x20801312) + NV_STATUS (*__subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS *); // exported (id=0x20801318) + NV_STATUS (*__subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS *); // exported (id=0x20801319) + NV_STATUS (*__subdeviceCtrlCmdFbGetGpuCacheInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_GPU_CACHE_INFO_PARAMS *); // exported (id=0x20801315) + NV_STATUS (*__subdeviceCtrlCmdFbGetCliManagedOfflinedPages__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_CLI_MANAGED_OFFLINED_PAGES_PARAMS *); // exported (id=0x2080133c) + NV_STATUS (*__subdeviceCtrlCmdFbGetOfflinedPages__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_OFFLINED_PAGES_PARAMS *); // halified (2 hals) exported (id=0x20801322) body + NV_STATUS (*__subdeviceCtrlCmdFbSetupVprRegion__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_FB_SETUP_VPR_REGION_PARAMS *); // exported (id=0x2080133b) + NV_STATUS (*__subdeviceCtrlCmdFbGetLTCInfoForFBP__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_LTC_INFO_FOR_FBP_PARAMS *); // halified (2 hals) exported (id=0x20801328) body + NV_STATUS (*__subdeviceCtrlCmdFbGetCompBitCopyConstructInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_FB_GET_COMPBITCOPY_CONSTRUCT_INFO_PARAMS *); // exported (id=0x2080133d) + NV_STATUS (*__subdeviceCtrlCmdFbPatchPbrForMining__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_PATCH_PBR_FOR_MINING_PARAMS *); // exported (id=0x20801341) + NV_STATUS (*__subdeviceCtrlCmdFbGetRemappedRows__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_REMAPPED_ROWS_PARAMS *); // exported (id=0x20801344) + NV_STATUS (*__subdeviceCtrlCmdFbGetFsInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_FS_INFO_PARAMS *); // exported (id=0x20801346) + NV_STATUS (*__subdeviceCtrlCmdFbGetRowRemapperHistogram__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_ROW_REMAPPER_HISTOGRAM_PARAMS *); // exported (id=0x20801347) + NV_STATUS (*__subdeviceCtrlCmdFbGetDynamicOfflinedPages__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_DYNAMIC_OFFLINED_PAGES_PARAMS *); // halified (2 hals) exported (id=0x20801348) body + NV_STATUS (*__subdeviceCtrlCmdFbUpdateNumaStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_UPDATE_NUMA_STATUS_PARAMS *); // exported (id=0x20801350) + NV_STATUS (*__subdeviceCtrlCmdFbGetNumaInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_NUMA_INFO_PARAMS *); // exported (id=0x20801351) + NV_STATUS (*__subdeviceCtrlCmdMemSysGetStaticConfig__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_MEMSYS_GET_STATIC_CONFIG_PARAMS *); // halified (2 hals) exported (id=0x20800a1c) body + NV_STATUS (*__subdeviceCtrlCmdMemSysSetPartitionableMem__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_MEMSYS_SET_PARTITIONABLE_MEM_PARAMS *); // exported (id=0x20800a51) + NV_STATUS (*__subdeviceCtrlCmdKMemSysGetMIGMemoryConfig__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_MEMSYS_GET_MIG_MEMORY_CONFIG_PARAMS *); // inline exported (id=0x20800a67) body + NV_STATUS (*__subdeviceCtrlCmdFbSetZbcReferenced__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_MEMSYS_SET_ZBC_REFERENCED_PARAMS *); // exported (id=0x20800a69) + NV_STATUS (*__subdeviceCtrlCmdMemSysL2InvalidateEvict__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_MEMSYS_L2_INVALIDATE_EVICT_PARAMS *); // exported (id=0x20800a6c) + NV_STATUS (*__subdeviceCtrlCmdMemSysFlushL2AllRamsAndCaches__)(struct Subdevice * /*this*/); // exported (id=0x20800a6d) + NV_STATUS (*__subdeviceCtrlCmdMemSysDisableNvlinkPeers__)(struct Subdevice * /*this*/); // exported (id=0x20800a6e) + NV_STATUS (*__subdeviceCtrlCmdMemSysProgramRawCompressionMode__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_MEMSYS_PROGRAM_RAW_COMPRESSION_MODE_PARAMS *); // exported (id=0x20800a6f) + NV_STATUS (*__subdeviceCtrlCmdMemSysGetMIGMemoryPartitionTable__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_MEMSYS_GET_MIG_MEMORY_PARTITION_TABLE_PARAMS *); // exported (id=0x20800a6b) + NV_STATUS (*__subdeviceCtrlCmdFbGetCtagsForCbcEviction__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_CTAGS_FOR_CBC_EVICTION_PARAMS *); // exported (id=0x20801338) + NV_STATUS (*__subdeviceCtrlCmdFbCBCOp__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_FB_CBC_OP_PARAMS *); // exported (id=0x20801337) + NV_STATUS (*__subdeviceCtrlCmdFbSetRrd__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_SET_RRD_PARAMS *); // exported (id=0x2080133e) + NV_STATUS (*__subdeviceCtrlCmdFbSetReadLimit__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_SET_READ_LIMIT_PARAMS *); // exported (id=0x2080133f) + NV_STATUS (*__subdeviceCtrlCmdFbSetWriteLimit__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_SET_WRITE_LIMIT_PARAMS *); // exported (id=0x20801340) + NV_STATUS (*__subdeviceCtrlCmdGmmuCommitTlbInvalidate__)(struct Subdevice * /*this*/, NV2080_CTRL_GMMU_COMMIT_TLB_INVALIDATE_PARAMS *); // exported (id=0x20801353) + NV_STATUS (*__subdeviceCtrlCmdSetGpfifo__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_SET_GPFIFO_PARAMS *); // exported (id=0x20801102) + NV_STATUS (*__subdeviceCtrlCmdSetOperationalProperties__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_SET_OPERATIONAL_PROPERTIES_PARAMS *); // exported (id=0x20801104) + NV_STATUS (*__subdeviceCtrlCmdFifoBindEngines__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_BIND_ENGINES_PARAMS *); // exported (id=0x20801103) + NV_STATUS (*__subdeviceCtrlCmdGetPhysicalChannelCount__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_GET_PHYSICAL_CHANNEL_COUNT_PARAMS *); // exported (id=0x20801108) + NV_STATUS (*__subdeviceCtrlCmdFifoGetInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_GET_INFO_PARAMS *); // exported (id=0x20801109) + NV_STATUS (*__subdeviceCtrlCmdFifoDisableChannels__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_DISABLE_CHANNELS_PARAMS *); // exported (id=0x2080110b) + NV_STATUS (*__subdeviceCtrlCmdFifoDisableChannelsForKeyRotation__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_DISABLE_CHANNELS_FOR_KEY_ROTATION_PARAMS *); // exported (id=0x2080111a) + NV_STATUS (*__subdeviceCtrlCmdFifoDisableUsermodeChannels__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_DISABLE_USERMODE_CHANNELS_PARAMS *); // exported (id=0x20801117) + NV_STATUS (*__subdeviceCtrlCmdFifoGetChannelMemInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_FIFO_GET_CHANNEL_MEM_INFO_PARAMS *); // exported (id=0x2080110c) + NV_STATUS (*__subdeviceCtrlCmdFifoGetUserdLocation__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_FIFO_GET_USERD_LOCATION_PARAMS *); // exported (id=0x2080110d) + NV_STATUS (*__subdeviceCtrlCmdFifoObjschedSwGetLog__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_OBJSCHED_SW_GET_LOG_PARAMS *); // exported (id=0x2080110e) + NV_STATUS (*__subdeviceCtrlCmdFifoObjschedGetState__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_OBJSCHED_GET_STATE_PARAMS *); // exported (id=0x20801120) + NV_STATUS (*__subdeviceCtrlCmdFifoObjschedSetState__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_OBJSCHED_SET_STATE_PARAMS *); // exported (id=0x20801121) + NV_STATUS (*__subdeviceCtrlCmdFifoObjschedGetCaps__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_OBJSCHED_GET_CAPS_PARAMS *); // halified (2 hals) exported (id=0x20801122) body + NV_STATUS (*__subdeviceCtrlCmdFifoGetDeviceInfoTable__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_PARAMS *); // halified (2 hals) exported (id=0x20801112) body + NV_STATUS (*__subdeviceCtrlCmdFifoSetupVfZombieSubctxPdb__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_SETUP_VF_ZOMBIE_SUBCTX_PDB_PARAMS *); // exported (id=0x20801118) + NV_STATUS (*__subdeviceCtrlCmdFifoClearFaultedBit__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_FIFO_CLEAR_FAULTED_BIT_PARAMS *); // exported (id=0x20801113) + NV_STATUS (*__subdeviceCtrlCmdFifoRunlistSetSchedPolicy__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_RUNLIST_SET_SCHED_POLICY_PARAMS *); // exported (id=0x20801115) + NV_STATUS (*__subdeviceCtrlCmdFifoUpdateChannelInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_UPDATE_CHANNEL_INFO_PARAMS *); // exported (id=0x20801116) + NV_STATUS (*__subdeviceCtrlCmdInternalFifoPromoteRunlistBuffers__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_FIFO_PROMOTE_RUNLIST_BUFFERS_PARAMS *); // exported (id=0x20800a53) + NV_STATUS (*__subdeviceCtrlCmdInternalFifoGetNumChannels__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_FIFO_GET_NUM_CHANNELS_PARAMS *); // exported (id=0x20800a61) + NV_STATUS (*__subdeviceCtrlCmdFifoGetAllocatedChannels__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_GET_ALLOCATED_CHANNELS_PARAMS *); // exported (id=0x20801119) + NV_STATUS (*__subdeviceCtrlCmdInternalFifoGetNumSecureChannels__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_FIFO_GET_NUM_SECURE_CHANNELS_PARAMS *); // exported (id=0x20800ad8) + NV_STATUS (*__subdeviceCtrlCmdInternalFifoGetLogicalUprocId__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_FIFO_GET_LOGICAL_UPROC_ID_PARAMS *); // exported (id=0x20800aef) + NV_STATUS (*__subdeviceCtrlCmdInternalFifoToggleActiveChannelScheduling__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING_PARAMS *); // exported (id=0x20800ac3) + NV_STATUS (*__subdeviceCtrlCmdKGrGetInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_INFO_PARAMS *); // exported (id=0x20801201) + NV_STATUS (*__subdeviceCtrlCmdKGrGetInfoV2__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_INFO_V2_PARAMS *); // exported (id=0x20801228) + NV_STATUS (*__subdeviceCtrlCmdKGrGetCapsV2__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_CAPS_V2_PARAMS *); // exported (id=0x20801227) + NV_STATUS (*__subdeviceCtrlCmdKGrGetCtxswModes__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_CTXSW_MODES_PARAMS *); // exported (id=0x20801235) + NV_STATUS (*__subdeviceCtrlCmdKGrCtxswZcullMode__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_CTXSW_ZCULL_MODE_PARAMS *); // exported (id=0x20801205) + NV_STATUS (*__subdeviceCtrlCmdKGrCtxswZcullBind__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_CTXSW_ZCULL_BIND_PARAMS *); // exported (id=0x20801208) + NV_STATUS (*__subdeviceCtrlCmdKGrGetZcullInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_ZCULL_INFO_PARAMS *); // exported (id=0x20801206) + NV_STATUS (*__subdeviceCtrlCmdKGrCtxswPmMode__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_CTXSW_PM_MODE_PARAMS *); // exported (id=0x20801207) + NV_STATUS (*__subdeviceCtrlCmdKGrCtxswPmBind__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_CTXSW_PM_BIND_PARAMS *); // exported (id=0x20801209) + NV_STATUS (*__subdeviceCtrlCmdKGrCtxswSetupBind__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_CTXSW_SETUP_BIND_PARAMS *); // exported (id=0x2080123a) + NV_STATUS (*__subdeviceCtrlCmdKGrSetGpcTileMap__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_SET_GPC_TILE_MAP_PARAMS *); // exported (id=0x2080120a) + NV_STATUS (*__subdeviceCtrlCmdKGrCtxswSmpcMode__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_CTXSW_SMPC_MODE_PARAMS *); // exported (id=0x2080120e) + NV_STATUS (*__subdeviceCtrlCmdKGrPcSamplingMode__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_PC_SAMPLING_MODE_PARAMS *); // exported (id=0x20801212) + NV_STATUS (*__subdeviceCtrlCmdKGrGetSmToGpcTpcMappings__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_SM_TO_GPC_TPC_MAPPINGS_PARAMS *); // exported (id=0x2080120f) + NV_STATUS (*__subdeviceCtrlCmdKGrGetGlobalSmOrder__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_GLOBAL_SM_ORDER_PARAMS *); // exported (id=0x2080121b) + NV_STATUS (*__subdeviceCtrlCmdKGrSetCtxswPreemptionMode__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_SET_CTXSW_PREEMPTION_MODE_PARAMS *); // exported (id=0x20801210) + NV_STATUS (*__subdeviceCtrlCmdKGrCtxswPreemptionBind__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS *); // exported (id=0x20801211) + NV_STATUS (*__subdeviceCtrlCmdKGrGetROPInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_ROP_INFO_PARAMS *); // exported (id=0x20801213) + NV_STATUS (*__subdeviceCtrlCmdKGrGetCtxswStats__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_CTXSW_STATS_PARAMS *); // exported (id=0x20801215) + NV_STATUS (*__subdeviceCtrlCmdKGrGetCtxBufferSize__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_CTX_BUFFER_SIZE_PARAMS *); // exported (id=0x20801218) + NV_STATUS (*__subdeviceCtrlCmdKGrGetCtxBufferInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_CTX_BUFFER_INFO_PARAMS *); // exported (id=0x20801219) + NV_STATUS (*__subdeviceCtrlCmdKGrGetCtxBufferPtes__)(struct Subdevice * /*this*/, NV2080_CTRL_KGR_GET_CTX_BUFFER_PTES_PARAMS *); // exported (id=0x20800a28) + NV_STATUS (*__subdeviceCtrlCmdKGrGetCurrentResidentChannel__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_CURRENT_RESIDENT_CHANNEL_PARAMS *); // exported (id=0x2080121c) + NV_STATUS (*__subdeviceCtrlCmdKGrGetVatAlarmData__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_VAT_ALARM_DATA_PARAMS *); // exported (id=0x2080121d) + NV_STATUS (*__subdeviceCtrlCmdKGrGetAttributeBufferSize__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_ATTRIBUTE_BUFFER_SIZE_PARAMS *); // exported (id=0x2080121e) + NV_STATUS (*__subdeviceCtrlCmdKGrGfxPoolQuerySize__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GFX_POOL_QUERY_SIZE_PARAMS *); // exported (id=0x2080121f) + NV_STATUS (*__subdeviceCtrlCmdKGrGfxPoolInitialize__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GFX_POOL_INITIALIZE_PARAMS *); // exported (id=0x20801220) + NV_STATUS (*__subdeviceCtrlCmdKGrGfxPoolAddSlots__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GFX_POOL_ADD_SLOTS_PARAMS *); // exported (id=0x20801221) + NV_STATUS (*__subdeviceCtrlCmdKGrGfxPoolRemoveSlots__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GFX_POOL_REMOVE_SLOTS_PARAMS *); // exported (id=0x20801222) + NV_STATUS (*__subdeviceCtrlCmdKGrGetPpcMask__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_PPC_MASK_PARAMS *); // exported (id=0x20801233) + NV_STATUS (*__subdeviceCtrlCmdKGrSetTpcPartitionMode__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_SET_TPC_PARTITION_MODE_PARAMS *); // exported (id=0x2080122c) + NV_STATUS (*__subdeviceCtrlCmdKGrGetSmIssueRateModifier__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS *); // exported (id=0x20801230) + NV_STATUS (*__subdeviceCtrlCmdKGrFecsBindEvtbufForUid__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_FECS_BIND_EVTBUF_FOR_UID_PARAMS *); // exported (id=0x20801231) + NV_STATUS (*__subdeviceCtrlCmdKGrFecsBindEvtbufForUidV2__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_FECS_BIND_EVTBUF_FOR_UID_V2_PARAMS *); // exported (id=0x20801238) + NV_STATUS (*__subdeviceCtrlCmdKGrGetPhysGpcMask__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_PHYS_GPC_MASK_PARAMS *); // exported (id=0x20801232) + NV_STATUS (*__subdeviceCtrlCmdKGrGetGpcMask__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_GPC_MASK_PARAMS *); // exported (id=0x2080122a) + NV_STATUS (*__subdeviceCtrlCmdKGrGetTpcMask__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_TPC_MASK_PARAMS *); // exported (id=0x2080122b) + NV_STATUS (*__subdeviceCtrlCmdKGrGetEngineContextProperties__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *); // exported (id=0x2080122d) + NV_STATUS (*__subdeviceCtrlCmdKGrGetNumTpcsForGpc__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_NUM_TPCS_FOR_GPC_PARAMS *); // exported (id=0x20801234) + NV_STATUS (*__subdeviceCtrlCmdKGrGetGpcTileMap__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_GPC_TILE_MAP_PARAMS *); // exported (id=0x20801236) + NV_STATUS (*__subdeviceCtrlCmdKGrGetZcullMask__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_ZCULL_MASK_PARAMS *); // exported (id=0x20801237) + NV_STATUS (*__subdeviceCtrlCmdKGrGetGfxGpcAndTpcInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_GET_GFX_GPC_AND_TPC_INFO_PARAMS *); // exported (id=0x20801239) + NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_STATIC_GR_GET_INFO_PARAMS *); // exported (id=0x20800a2a) + NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetCaps__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_STATIC_GR_GET_CAPS_PARAMS *); // exported (id=0x20800a1f) + NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetGlobalSmOrder__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_STATIC_GR_GET_GLOBAL_SM_ORDER_PARAMS *); // exported (id=0x20800a22) + NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetFloorsweepingMasks__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_STATIC_GR_GET_FLOORSWEEPING_MASKS_PARAMS *); // exported (id=0x20800a26) + NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetPpcMasks__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_STATIC_GR_GET_PPC_MASKS_PARAMS *); // exported (id=0x20800a30) + NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetZcullInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS *); // exported (id=0x20800a2c) + NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetRopInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_STATIC_GR_GET_ROP_INFO_PARAMS *); // exported (id=0x20800a2e) + NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetContextBuffersInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_STATIC_GR_GET_CONTEXT_BUFFERS_INFO_PARAMS *); // exported (id=0x20800a32) + NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetSmIssueRateModifier__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_STATIC_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS *); // exported (id=0x20800a34) + NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetFecsRecordSize__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_RECORD_SIZE_PARAMS *); // exported (id=0x20800a3d) + NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetFecsTraceDefines__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_TRACE_DEFINES_PARAMS *); // exported (id=0x20800a3f) + NV_STATUS (*__subdeviceCtrlCmdKGrInternalStaticGetPdbProperties__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_STATIC_GR_GET_PDB_PROPERTIES_PARAMS *); // exported (id=0x20800a48) + NV_STATUS (*__subdeviceCtrlCmdGrInternalSetFecsTraceHwEnable__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GR_SET_FECS_TRACE_HW_ENABLE_PARAMS *); // exported (id=0x20800a37) + NV_STATUS (*__subdeviceCtrlCmdGrInternalGetFecsTraceHwEnable__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GR_GET_FECS_TRACE_HW_ENABLE_PARAMS *); // exported (id=0x20800a38) + NV_STATUS (*__subdeviceCtrlCmdGrInternalSetFecsTraceRdOffset__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GR_SET_FECS_TRACE_RD_OFFSET_PARAMS *); // exported (id=0x20800a39) + NV_STATUS (*__subdeviceCtrlCmdGrInternalGetFecsTraceRdOffset__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GR_GET_FECS_TRACE_RD_OFFSET_PARAMS *); // exported (id=0x20800a3b) + NV_STATUS (*__subdeviceCtrlCmdGrInternalSetFecsTraceWrOffset__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GR_SET_FECS_TRACE_WR_OFFSET_PARAMS *); // exported (id=0x20800a3a) + NV_STATUS (*__subdeviceCtrlCmdGrStaticGetFecsTraceDefines__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_TRACE_DEFINES_PARAMS *); // exported (id=0x20800a3e) + NV_STATUS (*__subdeviceCtrlCmdGpuGetCachedInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_INFO_V2_PARAMS *); // exported (id=0x20800182) + NV_STATUS (*__subdeviceCtrlCmdGpuGetInfoV2__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_INFO_V2_PARAMS *); // exported (id=0x20800102) + NV_STATUS (*__subdeviceCtrlCmdGpuGetIpVersion__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_IP_VERSION_PARAMS *); // exported (id=0x2080014d) + NV_STATUS (*__subdeviceCtrlCmdGpuGetPhysicalBridgeVersionInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_PHYSICAL_BRIDGE_VERSION_INFO_PARAMS *); // exported (id=0x2080015a) + NV_STATUS (*__subdeviceCtrlCmdGpuGetAllBridgesUpstreamOfGpu__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_ALL_BRIDGES_UPSTREAM_OF_GPU_PARAMS *); // exported (id=0x2080015b) + NV_STATUS (*__subdeviceCtrlCmdGpuSetOptimusInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_OPTIMUS_INFO_PARAMS *); // exported (id=0x2080014c) + NV_STATUS (*__subdeviceCtrlCmdGpuGetNameString__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_NAME_STRING_PARAMS *); // exported (id=0x20800110) + NV_STATUS (*__subdeviceCtrlCmdGpuGetShortNameString__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_SHORT_NAME_STRING_PARAMS *); // exported (id=0x20800111) + NV_STATUS (*__subdeviceCtrlCmdGpuGetEncoderCapacity__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_ENCODER_CAPACITY_PARAMS *); // exported (id=0x2080016c) + NV_STATUS (*__subdeviceCtrlCmdGpuGetNvencSwSessionStats__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_NVENC_SW_SESSION_STATS_PARAMS *); // exported (id=0x2080016d) + NV_STATUS (*__subdeviceCtrlCmdGpuGetNvencSwSessionInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_NVENC_SW_SESSION_INFO_PARAMS *); // exported (id=0x2080016e) + NV_STATUS (*__subdeviceCtrlCmdGpuGetNvencSwSessionInfoV2__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_NVENC_SW_SESSION_INFO_V2_PARAMS *); // exported (id=0x208001af) + NV_STATUS (*__subdeviceCtrlCmdGpuGetNvfbcSwSessionStats__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_NVFBC_SW_SESSION_STATS_PARAMS *); // exported (id=0x2080017b) + NV_STATUS (*__subdeviceCtrlCmdGpuGetNvfbcSwSessionInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_NVFBC_SW_SESSION_INFO_PARAMS *); // exported (id=0x2080017c) + NV_STATUS (*__subdeviceCtrlCmdGpuSetFabricAddr__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_SET_FABRIC_BASE_ADDR_PARAMS *); // exported (id=0x2080016f) + NV_STATUS (*__subdeviceCtrlCmdGpuSetEgmGpaFabricAddr__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_SET_EGM_GPA_FABRIC_BASE_ADDR_PARAMS *); // exported (id=0x20800199) + NV_STATUS (*__subdeviceCtrlCmdGpuSetPower__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_SET_POWER_PARAMS *); // exported (id=0x20800112) + NV_STATUS (*__subdeviceCtrlCmdGpuGetSdm__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_SDM_PARAMS *); // exported (id=0x20800118) + NV_STATUS (*__subdeviceCtrlCmdGpuSetSdm__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_SET_SDM_PARAMS *); // exported (id=0x20800120) + NV_STATUS (*__subdeviceCtrlCmdGpuGetSimulationInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_SIMULATION_INFO_PARAMS *); // exported (id=0x20800119) + NV_STATUS (*__subdeviceCtrlCmdGpuGetEngines__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_ENGINES_PARAMS *); // exported (id=0x20800123) + NV_STATUS (*__subdeviceCtrlCmdGpuGetEnginesV2__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_ENGINES_V2_PARAMS *); // exported (id=0x20800170) + NV_STATUS (*__subdeviceCtrlCmdGpuGetEngineClasslist__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_ENGINE_CLASSLIST_PARAMS *); // exported (id=0x20800124) + NV_STATUS (*__subdeviceCtrlCmdGpuGetEnginePartnerList__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_ENGINE_PARTNERLIST_PARAMS *); // exported (id=0x20800147) + NV_STATUS (*__subdeviceCtrlCmdGpuGetFermiGpcInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_FERMI_GPC_INFO_PARAMS *); // exported (id=0x20800137) + NV_STATUS (*__subdeviceCtrlCmdGpuGetFermiTpcInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_FERMI_TPC_INFO_PARAMS *); // exported (id=0x20800138) + NV_STATUS (*__subdeviceCtrlCmdGpuGetFermiZcullInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_FERMI_ZCULL_INFO_PARAMS *); // exported (id=0x20800139) + NV_STATUS (*__subdeviceCtrlCmdGpuGetPesInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_PES_INFO_PARAMS *); // exported (id=0x20800168) + NV_STATUS (*__subdeviceCtrlCmdGpuExecRegOps__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_EXEC_REG_OPS_PARAMS *); // exported (id=0x20800122) + NV_STATUS (*__subdeviceCtrlCmdGpuMigratableOps__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_MIGRATABLE_OPS_PARAMS *); // exported (id=0x208001a6) + NV_STATUS (*__subdeviceCtrlCmdGpuQueryMode__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_QUERY_MODE_PARAMS *); // exported (id=0x20800128) + NV_STATUS (*__subdeviceCtrlCmdGpuGetInforomImageVersion__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_INFOROM_IMAGE_VERSION_PARAMS *); // exported (id=0x20800156) + NV_STATUS (*__subdeviceCtrlCmdGpuGetInforomObjectVersion__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_INFOROM_OBJECT_VERSION_PARAMS *); // exported (id=0x2080014b) + NV_STATUS (*__subdeviceCtrlCmdGpuQueryInforomEccSupport__)(struct Subdevice * /*this*/); // exported (id=0x20800157) + NV_STATUS (*__subdeviceCtrlCmdGpuQueryEccStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS *); // halified (2 hals) exported (id=0x2080012f) body + NV_STATUS (*__subdeviceCtrlCmdGpuGetChipDetails__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_CHIP_DETAILS_PARAMS *); // exported (id=0x208001a4) + NV_STATUS (*__subdeviceCtrlCmdGpuGetOEMBoardInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_OEM_BOARD_INFO_PARAMS *); // exported (id=0x2080013f) + NV_STATUS (*__subdeviceCtrlCmdGpuGetOEMInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_OEM_INFO_PARAMS *); // exported (id=0x20800169) + NV_STATUS (*__subdeviceCtrlCmdGpuHandleGpuSR__)(struct Subdevice * /*this*/); // exported (id=0x20800167) + NV_STATUS (*__subdeviceCtrlCmdGpuSetComputeModeRules__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_SET_COMPUTE_MODE_RULES_PARAMS *); // exported (id=0x20800130) + NV_STATUS (*__subdeviceCtrlCmdGpuQueryComputeModeRules__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_QUERY_COMPUTE_MODE_RULES_PARAMS *); // exported (id=0x20800131) + NV_STATUS (*__subdeviceCtrlCmdGpuAcquireComputeModeReservation__)(struct Subdevice * /*this*/); // exported (id=0x20800145) + NV_STATUS (*__subdeviceCtrlCmdGpuReleaseComputeModeReservation__)(struct Subdevice * /*this*/); // exported (id=0x20800146) + NV_STATUS (*__subdeviceCtrlCmdGpuInitializeCtx__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_INITIALIZE_CTX_PARAMS *); // exported (id=0x2080012d) + NV_STATUS (*__subdeviceCtrlCmdGpuPromoteCtx__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_PROMOTE_CTX_PARAMS *); // exported (id=0x2080012b) + NV_STATUS (*__subdeviceCtrlCmdGpuEvictCtx__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_EVICT_CTX_PARAMS *); // exported (id=0x2080012c) + NV_STATUS (*__subdeviceCtrlCmdGpuGetId__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_ID_PARAMS *); // exported (id=0x20800142) + NV_STATUS (*__subdeviceCtrlCmdGpuGetGidInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_GID_INFO_PARAMS *); // exported (id=0x2080014a) + NV_STATUS (*__subdeviceCtrlCmdGpuQueryIllumSupport__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_GPU_QUERY_ILLUM_SUPPORT_PARAMS *); // halified (2 hals) exported (id=0x20800153) body + NV_STATUS (*__subdeviceCtrlCmdGpuGetIllum__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_GPU_ILLUM_PARAMS *); // exported (id=0x20800154) + NV_STATUS (*__subdeviceCtrlCmdGpuSetIllum__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_GPU_ILLUM_PARAMS *); // exported (id=0x20800155) + NV_STATUS (*__subdeviceCtrlCmdGpuQueryScrubberStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_QUERY_SCRUBBER_STATUS_PARAMS *); // halified (2 hals) exported (id=0x2080015f) body + NV_STATUS (*__subdeviceCtrlCmdGpuGetVprCaps__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_VPR_CAPS_PARAMS *); // exported (id=0x20800160) + NV_STATUS (*__subdeviceCtrlCmdGpuGetVprInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_VPR_INFO_PARAMS *); // exported (id=0x2080016b) + NV_STATUS (*__subdeviceCtrlCmdGpuGetPids__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_PIDS_PARAMS *); // exported (id=0x2080018d) + NV_STATUS (*__subdeviceCtrlCmdGpuGetPidInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_PID_INFO_PARAMS *); // exported (id=0x2080018e) + NV_STATUS (*__subdeviceCtrlCmdGpuQueryFunctionStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_GPU_QUERY_FUNCTION_STATUS_PARAMS *); // exported (id=0x20800173) + NV_STATUS (*__subdeviceCtrlCmdGpuReportNonReplayableFault__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_REPORT_NON_REPLAYABLE_FAULT_PARAMS *); // exported (id=0x20800177) + NV_STATUS (*__subdeviceCtrlCmdGpuGetEngineFaultInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_ENGINE_FAULT_INFO_PARAMS *); // exported (id=0x20800125) + NV_STATUS (*__subdeviceCtrlCmdGpuGetEngineRunlistPriBase__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_ENGINE_RUNLIST_PRI_BASE_PARAMS *); // exported (id=0x20800179) + NV_STATUS (*__subdeviceCtrlCmdGpuGetHwEngineId__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_HW_ENGINE_ID_PARAMS *); // exported (id=0x2080017a) + NV_STATUS (*__subdeviceCtrlCmdGpuGetVmmuSegmentSize__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_VMMU_SEGMENT_SIZE_PARAMS *); // exported (id=0x2080017e) + NV_STATUS (*__subdeviceCtrlCmdGpuGetMaxSupportedPageSize__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_MAX_SUPPORTED_PAGE_SIZE_PARAMS *); // exported (id=0x20800188) + NV_STATUS (*__subdeviceCtrlCmdGpuHandleVfPriFault__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_GPU_HANDLE_VF_PRI_FAULT_PARAMS *); // exported (id=0x20800192) + NV_STATUS (*__subdeviceCtrlCmdGpuSetComputePolicyConfig__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_SET_COMPUTE_POLICY_CONFIG_PARAMS *); // exported (id=0x20800194) + NV_STATUS (*__subdeviceCtrlCmdGpuGetComputePolicyConfig__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_COMPUTE_POLICY_CONFIG_PARAMS *); // exported (id=0x20800195) + NV_STATUS (*__subdeviceCtrlCmdValidateMemMapRequest__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_VALIDATE_MEM_MAP_REQUEST_PARAMS *); // exported (id=0x20800198) + NV_STATUS (*__subdeviceCtrlCmdGpuGetGfid__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_GFID_PARAMS *); // exported (id=0x20800196) + NV_STATUS (*__subdeviceCtrlCmdUpdateGfidP2pCapability__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_GPU_UPDATE_GFID_P2P_CAPABILITY_PARAMS *); // exported (id=0x20800197) + NV_STATUS (*__subdeviceCtrlCmdGpuGetEngineLoadTimes__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_ENGINE_LOAD_TIMES_PARAMS *); // exported (id=0x2080019b) + NV_STATUS (*__subdeviceCtrlCmdGetP2pCaps__)(struct Subdevice * /*this*/, NV2080_CTRL_GET_P2P_CAPS_PARAMS *); // exported (id=0x208001a0) + NV_STATUS (*__subdeviceCtrlCmdGetGpuFabricProbeInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_GET_GPU_FABRIC_PROBE_INFO_PARAMS *); // exported (id=0x208001a3) + NV_STATUS (*__subdeviceCtrlCmdGpuGetResetStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_RESET_STATUS_PARAMS *); // exported (id=0x208001ab) + NV_STATUS (*__subdeviceCtrlCmdGpuGetDrainAndResetStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_DRAIN_AND_RESET_STATUS_PARAMS *); // exported (id=0x208001ae) + NV_STATUS (*__subdeviceCtrlCmdGpuGetConstructedFalconInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_CONSTRUCTED_FALCON_INFO_PARAMS *); // exported (id=0x208001b0) + NV_STATUS (*__subdeviceCtrlGpuGetFipsStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_FIPS_STATUS_PARAMS *); // exported (id=0x208001e4) + NV_STATUS (*__subdeviceCtrlCmdEventSetTrigger__)(struct Subdevice * /*this*/); // exported (id=0x20800302) + NV_STATUS (*__subdeviceCtrlCmdEventSetTriggerFifo__)(struct Subdevice * /*this*/, NV2080_CTRL_EVENT_SET_TRIGGER_FIFO_PARAMS *); // exported (id=0x20800308) + NV_STATUS (*__subdeviceCtrlCmdEventSetNotification__)(struct Subdevice * /*this*/, NV2080_CTRL_EVENT_SET_NOTIFICATION_PARAMS *); // exported (id=0x20800301) + NV_STATUS (*__subdeviceCtrlCmdEventSetMemoryNotifies__)(struct Subdevice * /*this*/, NV2080_CTRL_EVENT_SET_MEMORY_NOTIFIES_PARAMS *); // exported (id=0x20800303) + NV_STATUS (*__subdeviceCtrlCmdEventSetSemaphoreMemory__)(struct Subdevice * /*this*/, NV2080_CTRL_EVENT_SET_SEMAPHORE_MEMORY_PARAMS *); // exported (id=0x20800304) + NV_STATUS (*__subdeviceCtrlCmdEventSetSemaMemValidation__)(struct Subdevice * /*this*/, NV2080_CTRL_EVENT_SET_SEMA_MEM_VALIDATION_PARAMS *); // exported (id=0x20800306) + NV_STATUS (*__subdeviceCtrlCmdEventVideoBindEvtbuf__)(struct Subdevice * /*this*/, NV2080_CTRL_EVENT_VIDEO_BIND_EVTBUF_PARAMS *); // exported (id=0x20800309) + NV_STATUS (*__subdeviceCtrlCmdEventGspTraceRatsBindEvtbuf__)(struct Subdevice * /*this*/, NV2080_CTRL_EVENT_RATS_GSP_TRACE_BIND_EVTBUF_PARAMS *); // exported (id=0x2080030a) + NV_STATUS (*__subdeviceCtrlCmdTimerCancel__)(struct Subdevice * /*this*/); // exported (id=0x20800402) + NV_STATUS (*__subdeviceCtrlCmdTimerSchedule__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_TIMER_SCHEDULE_PARAMS *); // exported (id=0x20800401) + NV_STATUS (*__subdeviceCtrlCmdTimerGetTime__)(struct Subdevice * /*this*/, NV2080_CTRL_TIMER_GET_TIME_PARAMS *); // exported (id=0x20800403) + NV_STATUS (*__subdeviceCtrlCmdTimerGetRegisterOffset__)(struct Subdevice * /*this*/, NV2080_CTRL_TIMER_GET_REGISTER_OFFSET_PARAMS *); // exported (id=0x20800404) + NV_STATUS (*__subdeviceCtrlCmdTimerGetGpuCpuTimeCorrelationInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_TIMER_GET_GPU_CPU_TIME_CORRELATION_INFO_PARAMS *); // exported (id=0x20800406) + NV_STATUS (*__subdeviceCtrlCmdTimerSetGrTickFreq__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_TIMER_SET_GR_TICK_FREQ_PARAMS *); // exported (id=0x20800407) + NV_STATUS (*__subdeviceCtrlCmdRcReadVirtualMem__)(struct Subdevice * /*this*/, NV2080_CTRL_RC_READ_VIRTUAL_MEM_PARAMS *); // exported (id=0x20802204) + NV_STATUS (*__subdeviceCtrlCmdRcGetErrorCount__)(struct Subdevice * /*this*/, NV2080_CTRL_RC_GET_ERROR_COUNT_PARAMS *); // exported (id=0x20802205) + NV_STATUS (*__subdeviceCtrlCmdRcGetErrorV2__)(struct Subdevice * /*this*/, NV2080_CTRL_RC_GET_ERROR_V2_PARAMS *); // exported (id=0x20802213) + NV_STATUS (*__subdeviceCtrlCmdRcSetCleanErrorHistory__)(struct Subdevice * /*this*/); // exported (id=0x20802207) + NV_STATUS (*__subdeviceCtrlCmdRcGetWatchdogInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_RC_GET_WATCHDOG_INFO_PARAMS *); // exported (id=0x20802209) + NV_STATUS (*__subdeviceCtrlCmdRcDisableWatchdog__)(struct Subdevice * /*this*/); // exported (id=0x2080220a) + NV_STATUS (*__subdeviceCtrlCmdRcSoftDisableWatchdog__)(struct Subdevice * /*this*/); // exported (id=0x20802210) + NV_STATUS (*__subdeviceCtrlCmdRcEnableWatchdog__)(struct Subdevice * /*this*/); // exported (id=0x2080220b) + NV_STATUS (*__subdeviceCtrlCmdRcReleaseWatchdogRequests__)(struct Subdevice * /*this*/); // exported (id=0x2080220c) + NV_STATUS (*__subdeviceCtrlCmdInternalRcWatchdogTimeout__)(struct Subdevice * /*this*/); // exported (id=0x20800a6a) + NV_STATUS (*__subdeviceCtrlCmdSetRcRecovery__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_RC_RECOVERY_PARAMS *); // exported (id=0x2080220d) + NV_STATUS (*__subdeviceCtrlCmdGetRcRecovery__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_RC_RECOVERY_PARAMS *); // exported (id=0x2080220e) + NV_STATUS (*__subdeviceCtrlCmdGetRcInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_RC_INFO_PARAMS *); // exported (id=0x20802212) + NV_STATUS (*__subdeviceCtrlCmdSetRcInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_RC_INFO_PARAMS *); // exported (id=0x20802211) + NV_STATUS (*__subdeviceCtrlCmdNvdGetDumpSize__)(struct Subdevice * /*this*/, NV2080_CTRL_NVD_GET_DUMP_SIZE_PARAMS *); // exported (id=0x20802401) + NV_STATUS (*__subdeviceCtrlCmdNvdGetDump__)(struct Subdevice * /*this*/, NV2080_CTRL_NVD_GET_DUMP_PARAMS *); // exported (id=0x20802402) + NV_STATUS (*__subdeviceCtrlCmdNvdGetNocatJournalRpt__)(struct Subdevice * /*this*/, NV2080_CTRL_NVD_GET_NOCAT_JOURNAL_PARAMS *); // exported (id=0x20802409) + NV_STATUS (*__subdeviceCtrlCmdNvdSetNocatJournalData__)(struct Subdevice * /*this*/, NV2080_CTRL_NVD_SET_NOCAT_JOURNAL_DATA_PARAMS *); // exported (id=0x2080240b) + NV_STATUS (*__subdeviceCtrlCmdNvdInsertNocatJournalRecord__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_NVD_INSERT_NOCAT_JOURNAL_RECORD_PARAMS *); // exported (id=0x2080240c) + NV_STATUS (*__subdeviceCtrlCmdPmgrGetModuleInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_PMGR_MODULE_INFO_PARAMS *); // exported (id=0x20802609) + NV_STATUS (*__subdeviceCtrlCmdGpuProcessPostGc6ExitTasks__)(struct Subdevice * /*this*/); // exported (id=0x2080270c) + NV_STATUS (*__subdeviceCtrlCmdGc6Entry__)(struct Subdevice * /*this*/, NV2080_CTRL_GC6_ENTRY_PARAMS *); // exported (id=0x2080270d) + NV_STATUS (*__subdeviceCtrlCmdGc6Exit__)(struct Subdevice * /*this*/, NV2080_CTRL_GC6_EXIT_PARAMS *); // exported (id=0x2080270e) + NV_STATUS (*__subdeviceCtrlCmdLpwrDifrPrefetchResponse__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_LPWR_DIFR_PREFETCH_RESPONSE_PARAMS *); // exported (id=0x20802802) + NV_STATUS (*__subdeviceCtrlCmdLpwrDifrCtrl__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_LPWR_DIFR_CTRL_PARAMS *); // exported (id=0x20802801) + NV_STATUS (*__subdeviceCtrlCmdCeGetCaps__)(struct Subdevice * /*this*/, NV2080_CTRL_CE_GET_CAPS_PARAMS *); // halified (2 hals) exported (id=0x20802a01) + NV_STATUS (*__subdeviceCtrlCmdCeGetCePceMask__)(struct Subdevice * /*this*/, NV2080_CTRL_CE_GET_CE_PCE_MASK_PARAMS *); // exported (id=0x20802a02) + NV_STATUS (*__subdeviceCtrlCmdCeUpdatePceLceMappings__)(struct Subdevice * /*this*/, NV2080_CTRL_CE_UPDATE_PCE_LCE_MAPPINGS_PARAMS *); // exported (id=0x20802a05) + NV_STATUS (*__subdeviceCtrlCmdCeGetCapsV2__)(struct Subdevice * /*this*/, NV2080_CTRL_CE_GET_CAPS_V2_PARAMS *); // halified (2 hals) exported (id=0x20802a03) + NV_STATUS (*__subdeviceCtrlCmdCeGetAllCaps__)(struct Subdevice * /*this*/, NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS *); // halified (2 hals) exported (id=0x20802a0a) + NV_STATUS (*__subdeviceCtrlCmdFlcnGetDmemUsage__)(struct Subdevice * /*this*/, NV2080_CTRL_FLCN_GET_DMEM_USAGE_PARAMS *); // exported (id=0x20803101) + NV_STATUS (*__subdeviceCtrlCmdFlcnGetEngineArch__)(struct Subdevice * /*this*/, NV2080_CTRL_FLCN_GET_ENGINE_ARCH_PARAMS *); // exported (id=0x20803118) + NV_STATUS (*__subdeviceCtrlCmdFlcnUstreamerQueueInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_FLCN_USTREAMER_QUEUE_INFO_PARAMS *); // exported (id=0x20803120) + NV_STATUS (*__subdeviceCtrlCmdFlcnUstreamerControlGet__)(struct Subdevice * /*this*/, NV2080_CTRL_FLCN_USTREAMER_CONTROL_PARAMS *); // exported (id=0x20803122) + NV_STATUS (*__subdeviceCtrlCmdFlcnUstreamerControlSet__)(struct Subdevice * /*this*/, NV2080_CTRL_FLCN_USTREAMER_CONTROL_PARAMS *); // exported (id=0x20803123) + NV_STATUS (*__subdeviceCtrlCmdFlcnGetCtxBufferInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_FLCN_GET_CTX_BUFFER_INFO_PARAMS *); // exported (id=0x20803124) + NV_STATUS (*__subdeviceCtrlCmdFlcnGetCtxBufferSize__)(struct Subdevice * /*this*/, NV2080_CTRL_FLCN_GET_CTX_BUFFER_SIZE_PARAMS *); // exported (id=0x20803125) + NV_STATUS (*__subdeviceCtrlCmdEccGetClientExposedCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_ECC_GET_CLIENT_EXPOSED_COUNTERS_PARAMS *); // exported (id=0x20803400) + NV_STATUS (*__subdeviceCtrlCmdEccGetEciCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_ECC_GET_ECI_COUNTERS_PARAMS *); // exported (id=0x20803401) + NV_STATUS (*__subdeviceCtrlCmdEccGetVolatileCounts__)(struct Subdevice * /*this*/, NV2080_CTRL_ECC_GET_VOLATILE_COUNTS_PARAMS *); // exported (id=0x20803402) + NV_STATUS (*__subdeviceCtrlCmdGpuQueryEccConfiguration__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_QUERY_ECC_CONFIGURATION_PARAMS *); // halified (2 hals) exported (id=0x20800133) body + NV_STATUS (*__subdeviceCtrlCmdGpuSetEccConfiguration__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_SET_ECC_CONFIGURATION_PARAMS *); // halified (2 hals) exported (id=0x20800134) body + NV_STATUS (*__subdeviceCtrlCmdGpuResetEccErrorStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_RESET_ECC_ERROR_STATUS_PARAMS *); // halified (2 hals) exported (id=0x20800136) body + NV_STATUS (*__subdeviceCtrlCmdFlaRange__)(struct Subdevice * /*this*/, NV2080_CTRL_FLA_RANGE_PARAMS *); // exported (id=0x20803501) + NV_STATUS (*__subdeviceCtrlCmdFlaSetupInstanceMemBlock__)(struct Subdevice * /*this*/, NV2080_CTRL_FLA_SETUP_INSTANCE_MEM_BLOCK_PARAMS *); // exported (id=0x20803502) + NV_STATUS (*__subdeviceCtrlCmdFlaGetRange__)(struct Subdevice * /*this*/, NV2080_CTRL_FLA_GET_RANGE_PARAMS *); // exported (id=0x20803503) + NV_STATUS (*__subdeviceCtrlCmdFlaGetFabricMemStats__)(struct Subdevice * /*this*/, NV2080_CTRL_FLA_GET_FABRIC_MEM_STATS_PARAMS *); // exported (id=0x20803504) + NV_STATUS (*__subdeviceCtrlCmdGspGetFeatures__)(struct Subdevice * /*this*/, NV2080_CTRL_GSP_GET_FEATURES_PARAMS *); // halified (2 hals) exported (id=0x20803601) body + NV_STATUS (*__subdeviceCtrlCmdGspGetRmHeapStats__)(struct Subdevice * /*this*/, NV2080_CTRL_GSP_GET_RM_HEAP_STATS_PARAMS *); // exported (id=0x20803602) + NV_STATUS (*__subdeviceCtrlCmdGpuGetActivePartitionIds__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_ACTIVE_PARTITION_IDS_PARAMS *); // exported (id=0x2080018b) + NV_STATUS (*__subdeviceCtrlCmdGpuGetPartitionCapacity__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_PARTITION_CAPACITY_PARAMS *); // exported (id=0x20800181) + NV_STATUS (*__subdeviceCtrlCmdGpuDescribePartitions__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_DESCRIBE_PARTITIONS_PARAMS *); // exported (id=0x20800185) + NV_STATUS (*__subdeviceCtrlCmdGpuSetPartitioningMode__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_SET_PARTITIONING_MODE_PARAMS *); // exported (id=0x20800183) + NV_STATUS (*__subdeviceCtrlCmdGrmgrGetGrFsInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GRMGR_GET_GR_FS_INFO_PARAMS *); // exported (id=0x20803801) + NV_STATUS (*__subdeviceCtrlCmdGpuSetPartitions__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_SET_PARTITIONS_PARAMS *); // exported (id=0x20800174) + NV_STATUS (*__subdeviceCtrlCmdGpuGetPartitions__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_PARTITIONS_PARAMS *); // exported (id=0x20800175) + NV_STATUS (*__subdeviceCtrlCmdGpuGetComputeProfiles__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_COMPUTE_PROFILES_PARAMS *); // exported (id=0x208001a2) + NV_STATUS (*__subdeviceCtrlCmdInternalStaticKMIGmgrGetProfiles__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_PROFILES_PARAMS *); // exported (id=0x20800a63) + NV_STATUS (*__subdeviceCtrlCmdInternalStaticKMIGmgrGetPartitionableEngines__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_PARTITIONABLE_ENGINES_PARAMS *); // exported (id=0x20800a65) + NV_STATUS (*__subdeviceCtrlCmdInternalStaticKMIGmgrGetSwizzIdFbMemPageRanges__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_SWIZZ_ID_FB_MEM_PAGE_RANGES_PARAMS *); // exported (id=0x20800a66) + NV_STATUS (*__subdeviceCtrlCmdInternalStaticKMIGmgrGetComputeInstanceProfiles__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_COMPUTE_PROFILES_PARAMS *); // exported (id=0x20800aba) + NV_STATUS (*__subdeviceCtrlCmdInternalKMIGmgrExportGPUInstance__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_KMIGMGR_IMPORT_EXPORT_GPU_INSTANCE_PARAMS *); // exported (id=0x20800aa7) + NV_STATUS (*__subdeviceCtrlCmdInternalKMIGmgrImportGPUInstance__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_KMIGMGR_IMPORT_EXPORT_GPU_INSTANCE_PARAMS *); // exported (id=0x20800aa9) + NV_STATUS (*__subdeviceCtrlCmdInternalKMIGmgrPromoteGpuInstanceMemRange__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_KMIGMGR_PROMOTE_GPU_INSTANCE_MEM_RANGE_PARAMS *); // exported (id=0x20800a44) + NV_STATUS (*__subdeviceCtrlCmdOsUnixGc6BlockerRefCnt__)(struct Subdevice * /*this*/, NV2080_CTRL_OS_UNIX_GC6_BLOCKER_REFCNT_PARAMS *); // exported (id=0x20803d01) + NV_STATUS (*__subdeviceCtrlCmdOsUnixAllowDisallowGcoff__)(struct Subdevice * /*this*/, NV2080_CTRL_OS_UNIX_ALLOW_DISALLOW_GCOFF_PARAMS *); // exported (id=0x20803d02) + NV_STATUS (*__subdeviceCtrlCmdOsUnixAudioDynamicPower__)(struct Subdevice * /*this*/, NV2080_CTRL_OS_UNIX_AUDIO_DYNAMIC_POWER_PARAMS *); // exported (id=0x20803d03) + NV_STATUS (*__subdeviceCtrlCmdOsUnixVidmemPersistenceStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_OS_UNIX_VIDMEM_PERSISTENCE_STATUS_PARAMS *); // exported (id=0x20803d07) + NV_STATUS (*__subdeviceCtrlCmdOsUnixUpdateTgpStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_OS_UNIX_UPDATE_TGP_STATUS_PARAMS *); // exported (id=0x20803d08) + NV_STATUS (*__subdeviceCtrlCmdDisplayGetIpVersion__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_DISPLAY_GET_IP_VERSION_PARAMS *); // exported (id=0x20800a4b) + NV_STATUS (*__subdeviceCtrlCmdDisplayGetStaticInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_DISPLAY_GET_STATIC_INFO_PARAMS *); // exported (id=0x20800a01) + NV_STATUS (*__subdeviceCtrlCmdDisplaySetChannelPushbuffer__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_DISPLAY_CHANNEL_PUSHBUFFER_PARAMS *); // exported (id=0x20800a58) + NV_STATUS (*__subdeviceCtrlCmdDisplayWriteInstMem__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_DISPLAY_WRITE_INST_MEM_PARAMS *); // exported (id=0x20800a49) + NV_STATUS (*__subdeviceCtrlCmdDisplaySetupRgLineIntr__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_DISPLAY_SETUP_RG_LINE_INTR_PARAMS *); // exported (id=0x20800a4d) + NV_STATUS (*__subdeviceCtrlCmdDisplaySetImportedImpData__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_DISPLAY_SET_IMP_INIT_INFO_PARAMS *); // exported (id=0x20800a54) + NV_STATUS (*__subdeviceCtrlCmdDisplayGetDisplayMask__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_DISPLAY_GET_ACTIVE_DISPLAY_DEVICES_PARAMS *); // exported (id=0x20800a5d) + NV_STATUS (*__subdeviceCtrlCmdDisplayPinsetsToLockpins__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_DISP_PINSETS_TO_LOCKPINS_PARAMS *); // exported (id=0x20800adc) + NV_STATUS (*__subdeviceCtrlCmdDisplaySetSliLinkGpioSwControl__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_DISP_SET_SLI_LINK_GPIO_SW_CONTROL_PARAMS *); // exported (id=0x20800ade) + NV_STATUS (*__subdeviceCtrlCmdInternalGpioProgramDirection__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GPIO_PROGRAM_DIRECTION_PARAMS *); // exported (id=0x20802300) + NV_STATUS (*__subdeviceCtrlCmdInternalGpioProgramOutput__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GPIO_PROGRAM_OUTPUT_PARAMS *); // exported (id=0x20802301) + NV_STATUS (*__subdeviceCtrlCmdInternalGpioReadInput__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GPIO_READ_INPUT_PARAMS *); // exported (id=0x20802302) + NV_STATUS (*__subdeviceCtrlCmdInternalGpioActivateHwFunction__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GPIO_ACTIVATE_HW_FUNCTION_PARAMS *); // exported (id=0x20802303) + NV_STATUS (*__subdeviceCtrlCmdInternalDisplayAcpiSubsytemActivated__)(struct Subdevice * /*this*/); // exported (id=0x20800af0) + NV_STATUS (*__subdeviceCtrlCmdInternalDisplayPreModeSet__)(struct Subdevice * /*this*/); // exported (id=0x20800af1) + NV_STATUS (*__subdeviceCtrlCmdInternalDisplayPostModeSet__)(struct Subdevice * /*this*/); // exported (id=0x20800af2) + NV_STATUS (*__subdeviceCtrlCmdDisplayPreUnixConsole__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_DISPLAY_PRE_UNIX_CONSOLE_PARAMS *); // exported (id=0x20800a76) + NV_STATUS (*__subdeviceCtrlCmdDisplayPostUnixConsole__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_DISPLAY_POST_UNIX_CONSOLE_PARAMS *); // exported (id=0x20800a77) + NV_STATUS (*__subdeviceCtrlCmdInternalUvmRegisterAccessCntrBuffer__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_UVM_REGISTER_ACCESS_CNTR_BUFFER_PARAMS *); // exported (id=0x20800a1d) + NV_STATUS (*__subdeviceCtrlCmdInternalUvmUnregisterAccessCntrBuffer__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_UVM_UNREGISTER_ACCESS_CNTR_BUFFER_PARAMS *); // exported (id=0x20800a1e) + NV_STATUS (*__subdeviceCtrlCmdInternalGetChipInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GPU_GET_CHIP_INFO_PARAMS *); // exported (id=0x20800a36) + NV_STATUS (*__subdeviceCtrlCmdInternalGetUserRegisterAccessMap__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GPU_GET_USER_REGISTER_ACCESS_MAP_PARAMS *); // exported (id=0x20800a41) + NV_STATUS (*__subdeviceCtrlCmdInternalGetDeviceInfoTable__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS *); // exported (id=0x20800a40) + NV_STATUS (*__subdeviceCtrlCmdInternalRecoverAllComputeContexts__)(struct Subdevice * /*this*/); // exported (id=0x20800a4a) + NV_STATUS (*__subdeviceCtrlCmdInternalGetSmcMode__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GPU_GET_SMC_MODE_PARAMS *); // exported (id=0x20800a4c) + NV_STATUS (*__subdeviceCtrlCmdIsEgpuBridge__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GET_EGPU_BRIDGE_INFO_PARAMS *); // exported (id=0x20800a55) + NV_STATUS (*__subdeviceCtrlCmdInternalGpuGetGspRmFreeHeap__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GPU_GET_GSP_RM_FREE_HEAP_PARAMS *); // exported (id=0x20800aeb) + NV_STATUS (*__subdeviceCtrlCmdInternalBusFlushWithSysmembar__)(struct Subdevice * /*this*/); // exported (id=0x20800a70) + NV_STATUS (*__subdeviceCtrlCmdInternalBusSetupP2pMailboxLocal__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_BUS_SETUP_P2P_MAILBOX_LOCAL_PARAMS *); // exported (id=0x20800a71) + NV_STATUS (*__subdeviceCtrlCmdInternalBusSetupP2pMailboxRemote__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_BUS_SETUP_P2P_MAILBOX_REMOTE_PARAMS *); // exported (id=0x20800a72) + NV_STATUS (*__subdeviceCtrlCmdInternalBusDestroyP2pMailbox__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_BUS_DESTROY_P2P_MAILBOX_PARAMS *); // exported (id=0x20800a73) + NV_STATUS (*__subdeviceCtrlCmdInternalBusCreateC2cPeerMapping__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_BUS_CREATE_C2C_PEER_MAPPING_PARAMS *); // exported (id=0x20800a74) + NV_STATUS (*__subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_BUS_REMOVE_C2C_PEER_MAPPING_PARAMS *); // exported (id=0x20800a75) + NV_STATUS (*__subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_VMMU_GET_SPA_FOR_GPA_ENTRIES_PARAMS *); // exported (id=0x20800a57) + NV_STATUS (*__subdeviceCtrlCmdGmmuGetStaticInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GMMU_GET_STATIC_INFO_PARAMS *); // exported (id=0x20800a59) + NV_STATUS (*__subdeviceCtrlCmdInternalGmmuRegisterFaultBuffer__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GMMU_REGISTER_FAULT_BUFFER_PARAMS *); // exported (id=0x20800a9b) + NV_STATUS (*__subdeviceCtrlCmdInternalGmmuUnregisterFaultBuffer__)(struct Subdevice * /*this*/); // exported (id=0x20800a9c) + NV_STATUS (*__subdeviceCtrlCmdInternalGmmuRegisterClientShadowFaultBuffer__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GMMU_REGISTER_CLIENT_SHADOW_FAULT_BUFFER_PARAMS *); // exported (id=0x20800a9d) + NV_STATUS (*__subdeviceCtrlCmdInternalGmmuUnregisterClientShadowFaultBuffer__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GMMU_UNREGISTER_CLIENT_SHADOW_FAULT_BUFFER_PARAMS *); // exported (id=0x20800a9e) + NV_STATUS (*__subdeviceCtrlCmdInternalGmmuCopyReservedSplitGVASpacePdesServer__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GMMU_COPY_RESERVED_SPLIT_GVASPACE_PDES_TO_SERVER_PARAMS *); // exported (id=0x20800a9f) + NV_STATUS (*__subdeviceCtrlCmdCeGetPhysicalCaps__)(struct Subdevice * /*this*/, NV2080_CTRL_CE_GET_CAPS_V2_PARAMS *); // exported (id=0x20802a07) + NV_STATUS (*__subdeviceCtrlCmdCeGetAllPhysicalCaps__)(struct Subdevice * /*this*/, NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS *); // exported (id=0x20802a0b) + NV_STATUS (*__subdeviceCtrlCmdCeUpdateClassDB__)(struct Subdevice * /*this*/, NV2080_CTRL_CE_UPDATE_CLASS_DB_PARAMS *); // exported (id=0x20802a06) + NV_STATUS (*__subdeviceCtrlCmdCeGetFaultMethodBufferSize__)(struct Subdevice * /*this*/, NV2080_CTRL_CE_GET_FAULT_METHOD_BUFFER_SIZE_PARAMS *); // exported (id=0x20802a08) + NV_STATUS (*__subdeviceCtrlCmdCeGetHubPceMask__)(struct Subdevice * /*this*/, NV2080_CTRL_CE_GET_HUB_PCE_MASK_PARAMS *); // exported (id=0x20802a09) + NV_STATUS (*__subdeviceCtrlCmdIntrGetKernelTable__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_INTR_GET_KERNEL_TABLE_PARAMS *); // exported (id=0x20800a5c) + NV_STATUS (*__subdeviceCtrlCmdInternalPerfCudaLimitDisable__)(struct Subdevice * /*this*/); // exported (id=0x20800a7a) + NV_STATUS (*__subdeviceCtrlCmdInternalPerfOptpCliClear__)(struct Subdevice * /*this*/); // exported (id=0x20800a7c) + NV_STATUS (*__subdeviceCtrlCmdInternalPerfBoostSet_2x__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_PERF_BOOST_SET_PARAMS_2X *); // exported (id=0x20800a9a) + NV_STATUS (*__subdeviceCtrlCmdInternalPerfBoostSet_3x__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_PERF_BOOST_SET_PARAMS_3X *); // exported (id=0x20800aa0) + NV_STATUS (*__subdeviceCtrlCmdInternalPerfBoostClear_3x__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_PERF_BOOST_CLEAR_PARAMS_3X *); // exported (id=0x20800aa1) + NV_STATUS (*__subdeviceCtrlCmdInternalPerfGpuBoostSyncSetControl__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_PERF_GPU_BOOST_SYNC_CONTROL_PARAMS *); // exported (id=0x20800a7e) + NV_STATUS (*__subdeviceCtrlCmdInternalPerfGpuBoostSyncGetInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_PERF_GPU_BOOST_SYNC_GET_INFO_PARAMS *); // exported (id=0x20800a80) + NV_STATUS (*__subdeviceCtrlCmdInternalPerfSyncGpuBoostSetLimits__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_PERF_GPU_BOOST_SYNC_SET_LIMITS_PARAMS *); // exported (id=0x20800a7f) + NV_STATUS (*__subdeviceCtrlCmdInternalPerfPerfmonClientReservationCheck__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_PERF_PERFMON_CLIENT_RESERVATION_CHECK_PARAMS *); // exported (id=0x20800a98) + NV_STATUS (*__subdeviceCtrlCmdInternalPerfPerfmonClientReservationSet__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_PERF_PERFMON_CLIENT_RESERVATION_SET_PARAMS *); // exported (id=0x20800a99) + NV_STATUS (*__subdeviceCtrlCmdInternalPerfCfControllerSetMaxVGpuVMCount__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_PERF_CF_CONTROLLERS_SET_MAX_VGPU_VM_COUNT_PARAMS *); // exported (id=0x20800ab1) + NV_STATUS (*__subdeviceCtrlCmdInternalPerfGetAuxPowerState__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_PERF_GET_AUX_POWER_STATE_PARAMS *); // exported (id=0x20800a81) + NV_STATUS (*__subdeviceCtrlCmdInternalGcxEntryPrerequisite__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GCX_ENTRY_PREREQUISITE_PARAMS *); // exported (id=0x2080a7d7) + NV_STATUS (*__subdeviceCtrlCmdBifGetStaticInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_BIF_GET_STATIC_INFO_PARAMS *); // halified (2 hals) exported (id=0x20800aac) body + NV_STATUS (*__subdeviceCtrlCmdBifGetAspmL1Flags__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_BIF_GET_ASPM_L1_FLAGS_PARAMS *); // exported (id=0x20800ab0) + NV_STATUS (*__subdeviceCtrlCmdBifSetPcieRo__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_BIF_SET_PCIE_RO_PARAMS *); // exported (id=0x20800ab9) + NV_STATUS (*__subdeviceCtrlCmdBifDisableSystemMemoryAccess__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_BIF_DISABLE_SYSTEM_MEMORY_ACCESS_PARAMS *); // exported (id=0x20800adb) + NV_STATUS (*__subdeviceCtrlCmdHshubPeerConnConfig__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_HSHUB_PEER_CONN_CONFIG_PARAMS *); // exported (id=0x20800a88) + NV_STATUS (*__subdeviceCtrlCmdHshubFirstLinkPeerId__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_HSHUB_FIRST_LINK_PEER_ID_PARAMS *); // exported (id=0x20800a89) + NV_STATUS (*__subdeviceCtrlCmdHshubGetHshubIdForLinks__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_HSHUB_GET_HSHUB_ID_FOR_LINKS_PARAMS *); // exported (id=0x20800a8a) + NV_STATUS (*__subdeviceCtrlCmdHshubGetNumUnits__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_HSHUB_GET_NUM_UNITS_PARAMS *); // exported (id=0x20800a8b) + NV_STATUS (*__subdeviceCtrlCmdHshubNextHshubId__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_HSHUB_NEXT_HSHUB_ID_PARAMS *); // exported (id=0x20800a8c) + NV_STATUS (*__subdeviceCtrlCmdHshubEgmConfig__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_HSHUB_EGM_CONFIG_PARAMS *); // exported (id=0x20800a8d) + NV_STATUS (*__subdeviceCtrlCmdInternalNvlinkEnableComputePeerAddr__)(struct Subdevice * /*this*/); // exported (id=0x20800aad) + NV_STATUS (*__subdeviceCtrlCmdInternalNvlinkGetSetNvswitchFabricAddr__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_NVLINK_GET_SET_NVSWITCH_FABRIC_ADDR_PARAMS *); // exported (id=0x20800aae) + NV_STATUS (*__subdeviceCtrlCmdInternalNvlinkGetNumActiveLinksPerIoctrl__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_NVLINK_GET_NUM_ACTIVE_LINK_PER_IOCTRL_PARAMS *); // exported (id=0x20800ac7) + NV_STATUS (*__subdeviceCtrlCmdInternalNvlinkGetTotalNumLinksPerIoctrl__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_NVLINK_GET_TOTAL_NUM_LINK_PER_IOCTRL_PARAMS *); // exported (id=0x20800ac8) + NV_STATUS (*__subdeviceCtrlCmdInternalSetP2pCaps__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_SET_P2P_CAPS_PARAMS *); // exported (id=0x20800ab5) + NV_STATUS (*__subdeviceCtrlCmdInternalRemoveP2pCaps__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_REMOVE_P2P_CAPS_PARAMS *); // exported (id=0x20800ab6) + NV_STATUS (*__subdeviceCtrlCmdInternalGetPcieP2pCaps__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GET_PCIE_P2P_CAPS_PARAMS *); // exported (id=0x20800ab8) + NV_STATUS (*__subdeviceCtrlCmdInternalGetLocalAtsConfig__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_MEMSYS_GET_LOCAL_ATS_CONFIG_PARAMS *); // exported (id=0x20800afb) + NV_STATUS (*__subdeviceCtrlCmdInternalSetPeerAtsConfig__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_MEMSYS_SET_PEER_ATS_CONFIG_PARAMS *); // exported (id=0x20800afc) + NV_STATUS (*__subdeviceCtrlCmdInternalInitGpuIntr__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GSYNC_ATTACH_AND_INIT_PARAMS *); // exported (id=0x20800abe) + NV_STATUS (*__subdeviceCtrlCmdInternalGsyncOptimizeTiming__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GSYNC_OPTIMIZE_TIMING_PARAMETERS_PARAMS *); // exported (id=0x20800abf) + NV_STATUS (*__subdeviceCtrlCmdInternalGsyncGetDisplayIds__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GSYNC_GET_DISPLAY_IDS_PARAMS *); // exported (id=0x20800ac0) + NV_STATUS (*__subdeviceCtrlCmdInternalGsyncSetStereoSync__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GSYNC_SET_STREO_SYNC_PARAMS *); // exported (id=0x20800ac1) + NV_STATUS (*__subdeviceCtrlCmdInternalGsyncGetVactiveLines__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GSYNC_GET_VERTICAL_ACTIVE_LINES_PARAMS *); // exported (id=0x20800ac4) + NV_STATUS (*__subdeviceCtrlCmdInternalGsyncIsDisplayIdValid__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GSYNC_IS_DISPLAYID_VALID_PARAMS *); // exported (id=0x20800ac9) + NV_STATUS (*__subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GSYNC_SET_OR_RESTORE_RASTER_SYNC_PARAMS *); // exported (id=0x20800aca) + NV_STATUS (*__subdeviceCtrlCmdInternalFbsrInit__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_FBSR_INIT_PARAMS *); // exported (id=0x20800ac2) + NV_STATUS (*__subdeviceCtrlCmdInternalPostInitBrightcStateLoad__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_INIT_BRIGHTC_STATE_LOAD_PARAMS *); // exported (id=0x20800ac6) + NV_STATUS (*__subdeviceCtrlCmdInternalSetStaticEdidData__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_SET_STATIC_EDID_DATA_PARAMS *); // exported (id=0x20800adf) + NV_STATUS (*__subdeviceCtrlCmdInternalSmbpbiPfmReqHndlrCapUpdate__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_SMBPBI_PFM_REQ_HNDLR_CAP_UPDATE_PARAMS *); // exported (id=0x20800acb) + NV_STATUS (*__subdeviceCtrlCmdInternalPmgrPfmReqHndlrStateLoadSync__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_PFM_REQ_HNDLR_STATE_SYNC_PARAMS *); // exported (id=0x20800acc) + NV_STATUS (*__subdeviceCtrlCmdInternalThermPfmReqHndlrStateInitSync__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_PFM_REQ_HNDLR_STATE_SYNC_PARAMS *); // exported (id=0x20800acd) + NV_STATUS (*__subdeviceCtrlCmdInternalPerfPfmReqHndlrGetPm1State__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_GET_PM1_STATE_PARAMS *); // exported (id=0x20800ace) + NV_STATUS (*__subdeviceCtrlCmdInternalPerfPfmReqHndlrSetPm1State__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_SET_PM1_STATE_PARAMS *); // exported (id=0x20800acf) + NV_STATUS (*__subdeviceCtrlCmdInternalPmgrPfmReqHndlrUpdateEdppLimit__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_UPDATE_EDPP_LIMIT_PARAMS *); // exported (id=0x20800ad0) + NV_STATUS (*__subdeviceCtrlCmdInternalPmgrPfmReqHndlrGetEdppLimitInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_GET_EDPP_LIMIT_INFO_PARAMS *); // exported (id=0x20800afd) + NV_STATUS (*__subdeviceCtrlCmdInternalThermPfmReqHndlrUpdateTgpuLimit__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_THERM_PFM_REQ_HNDLR_UPDATE_TGPU_LIMIT_PARAMS *); // exported (id=0x20800ad1) + NV_STATUS (*__subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTgpMode__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_CONFIGURE_TGP_MODE_PARAMS *); // exported (id=0x20800ad2) + NV_STATUS (*__subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTurboV2__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_CONFIGURE_TURBO_V2_PARAMS *); // exported (id=0x20800ad3) + NV_STATUS (*__subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_GET_VPSTATE_INFO_PARAMS *); // exported (id=0x20800ad4) + NV_STATUS (*__subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateMapping__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_GET_VPSTATE_MAPPING_PARAMS *); // exported (id=0x20800ad5) + NV_STATUS (*__subdeviceCtrlCmdInternalPerfPfmReqHndlrSetVpstate__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_SET_VPSTATE_PARAMS *); // exported (id=0x20800ad6) + NV_STATUS (*__subdeviceCtrlCmdInternalPmgrUnsetDynamicBoostLimit__)(struct Subdevice * /*this*/); // exported (id=0x20800a7b) + NV_STATUS (*__subdeviceCtrlCmdInternalDetectHsVideoBridge__)(struct Subdevice * /*this*/); // exported (id=0x20800add) + NV_STATUS (*__subdeviceCtrlCmdInternalConfComputeGetStaticInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_CONF_COMPUTE_GET_STATIC_INFO_PARAMS *); // exported (id=0x20800af3) + NV_STATUS (*__subdeviceCtrlCmdInternalConfComputeDeriveSwlKeys__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_SWL_KEYS_PARAMS *); // exported (id=0x20800ae1) + NV_STATUS (*__subdeviceCtrlCmdInternalConfComputeDeriveLceKeys__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS *); // exported (id=0x20800ae2) + NV_STATUS (*__subdeviceCtrlCmdInternalConfComputeRotateKeys__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_CONF_COMPUTE_ROTATE_KEYS_PARAMS *); // exported (id=0x20800ae5) + NV_STATUS (*__subdeviceCtrlCmdInternalConfComputeRCChannelsForKeyRotation__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_CONF_COMPUTE_RC_CHANNELS_FOR_KEY_ROTATION_PARAMS *); // exported (id=0x20800ae6) + NV_STATUS (*__subdeviceCtrlCmdInternalConfComputeSetGpuState__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_SET_GPU_STATE_PARAMS *); // exported (id=0x20800ae7) + NV_STATUS (*__subdeviceCtrlCmdInternalConfComputeSetSecurityPolicy__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_SET_SECURITY_POLICY_PARAMS *); // exported (id=0x20800ae8) + NV_STATUS (*__subdeviceCtrlCmdInternalInitUserSharedData__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_INIT_USER_SHARED_DATA_PARAMS *); // exported (id=0x20800afe) + NV_STATUS (*__subdeviceCtrlCmdInternalUserSharedDataSetDataPoll__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_USER_SHARED_DATA_SET_DATA_POLL_PARAMS *); // exported (id=0x20800aff) + NV_STATUS (*__subdeviceCtrlCmdInternalGspStartTrace__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE_INFO_PARAMS *); // exported (id=0x208001e3) + NV_STATUS (*__subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GPU_CLIENT_LOW_POWER_MODE_ENTER_PARAMS *); // exported (id=0x20800ae9) + NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalBootloadGspVgpuPluginTask__)(struct Subdevice * /*this*/, NV2080_CTRL_VGPU_MGR_INTERNAL_BOOTLOAD_GSP_VGPU_PLUGIN_TASK_PARAMS *); // exported (id=0x20804001) + NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalShutdownGspVgpuPluginTask__)(struct Subdevice * /*this*/, NV2080_CTRL_VGPU_MGR_INTERNAL_SHUTDOWN_GSP_VGPU_PLUGIN_TASK_PARAMS *); // exported (id=0x20804002) + NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalPgpuAddVgpuType__)(struct Subdevice * /*this*/, NV2080_CTRL_VGPU_MGR_INTERNAL_PGPU_ADD_VGPU_TYPE_PARAMS *); // exported (id=0x20804003) + NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalEnumerateVgpuPerPgpu__)(struct Subdevice * /*this*/, NV2080_CTRL_VGPU_MGR_INTERNAL_ENUMERATE_VGPU_PER_PGPU_PARAMS *); // exported (id=0x20804004) + NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalClearGuestVmInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_VGPU_MGR_INTERNAL_CLEAR_GUEST_VM_INFO_PARAMS *); // exported (id=0x20804005) + NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalGetVgpuFbUsage__)(struct Subdevice * /*this*/, NV2080_CTRL_VGPU_MGR_INTERNAL_GET_VGPU_FB_USAGE_PARAMS *); // exported (id=0x20804006) + NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity__)(struct Subdevice * /*this*/, NV2080_CTRL_VGPU_MGR_INTERNAL_SET_VGPU_ENCODER_CAPACITY_PARAMS *); // exported (id=0x20804007) + NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalCleanupGspVgpuPluginResources__)(struct Subdevice * /*this*/, NV2080_CTRL_VGPU_MGR_INTERNAL_VGPU_PLUGIN_CLEANUP_PARAMS *); // exported (id=0x20804008) + NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalGetPgpuFsEncoding__)(struct Subdevice * /*this*/, NV2080_CTRL_VGPU_MGR_INTERNAL_GET_PGPU_FS_ENCODING_PARAMS *); // exported (id=0x20804009) + NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalGetPgpuMigrationSupport__)(struct Subdevice * /*this*/, NV2080_CTRL_VGPU_MGR_INTERNAL_GET_PGPU_MIGRATION_SUPPORT_PARAMS *); // exported (id=0x2080400a) + NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig__)(struct Subdevice * /*this*/, NV2080_CTRL_VGPU_MGR_INTERNAL_SET_VGPU_MGR_CONFIG_PARAMS *); // exported (id=0x2080400b) + NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalFreeStates__)(struct Subdevice * /*this*/, NV2080_CTRL_VGPU_MGR_INTERNAL_FREE_STATES_PARAMS *); // exported (id=0x2080400c) + NV_STATUS (*__subdeviceCtrlCmdGetAvailableHshubMask__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_HSHUB_GET_AVAILABLE_MASK_PARAMS *); // exported (id=0x20804101) + NV_STATUS (*__subdeviceCtrlSetEcThrottleMode__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_HSHUB_SET_EC_THROTTLE_MODE_PARAMS *); // exported (id=0x20804102) + NV_STATUS (*__subdeviceCtrlCmdCcuMap__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_CCU_MAP_INFO_PARAMS *); // exported (id=0x20800ab3) + NV_STATUS (*__subdeviceCtrlCmdCcuUnmap__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_CCU_UNMAP_INFO_PARAMS *); // exported (id=0x20800ab4) + NV_STATUS (*__subdeviceCtrlCmdCcuSetStreamState__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_CCU_STREAM_STATE_PARAMS *); // exported (id=0x20800abd) + NV_STATUS (*__subdeviceCtrlCmdCcuGetSampleInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_CCU_SAMPLE_INFO_PARAMS *); // exported (id=0x20800ab2) + NV_STATUS (*__subdeviceCtrlCmdSpdmPartition__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_SPDM_PARTITION_PARAMS *); // exported (id=0x20800ad9) + NV_STATUS (*__subdeviceControl__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__subdeviceMap__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__subdeviceUnmap__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__subdeviceShareCallback__)(struct Subdevice * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__subdeviceGetRegBaseOffsetAndSize__)(struct Subdevice * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__subdeviceGetMapAddrSpace__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NvHandle (*__subdeviceGetInternalObjectHandle__)(struct Subdevice * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__subdeviceAccessCallback__)(struct Subdevice * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__subdeviceGetMemInterMapParams__)(struct Subdevice * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__subdeviceCheckMemInterUnmap__)(struct Subdevice * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__subdeviceGetMemoryMappingDescriptor__)(struct Subdevice * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__subdeviceControlSerialization_Prologue__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__subdeviceControlSerialization_Epilogue__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__subdeviceControl_Prologue__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__subdeviceControl_Epilogue__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__subdeviceCanCopy__)(struct Subdevice * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__subdeviceIsDuplicate__)(struct Subdevice * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + NvBool (*__subdeviceIsPartialUnmapSupported__)(struct Subdevice * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__subdeviceMapTo__)(struct Subdevice * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__subdeviceUnmapFrom__)(struct Subdevice * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__subdeviceGetRefCount__)(struct Subdevice * /*this*/); // virtual inherited (res) base (gpures) + void (*__subdeviceAddAdditionalDependants__)(struct RsClient *, struct Subdevice * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + PEVENTNOTIFICATION * (*__subdeviceGetNotificationListPtr__)(struct Subdevice * /*this*/); // virtual inherited (notify) base (notify) + struct NotifShare * (*__subdeviceGetNotificationShare__)(struct Subdevice * /*this*/); // virtual inherited (notify) base (notify) + void (*__subdeviceSetNotificationShare__)(struct Subdevice * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) + NV_STATUS (*__subdeviceUnregisterEvent__)(struct Subdevice * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) + NV_STATUS (*__subdeviceGetOrAllocNotifShare__)(struct Subdevice * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) + + // Data members NvU32 deviceInst; NvU32 subDeviceInst; struct Device *pDevice; @@ -719,6 +742,7 @@ struct Subdevice { NvBool bGcoffDisallowed; NvBool bUpdateTGP; NvBool bVFRefCntIncRequested; + TMR_EVENT *pTimerEvent; }; #ifndef __NVOC_CLASS_Subdevice_TYPEDEF__ @@ -730,6 +754,7 @@ typedef struct Subdevice Subdevice; #define __nvoc_class_id_Subdevice 0x4b01b3 #endif /* __nvoc_class_id_Subdevice */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_Subdevice; #define __staticCast_Subdevice(pThis) \ @@ -742,4093 +767,4692 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_Subdevice; ((Subdevice*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(Subdevice))) #endif //__nvoc_subdevice_h_disabled - NV_STATUS __nvoc_objCreateDynamic_Subdevice(Subdevice**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_Subdevice(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_Subdevice((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define subdevicePreDestruct_FNPTR(pResource) pResource->__subdevicePreDestruct__ #define subdevicePreDestruct(pResource) subdevicePreDestruct_DISPATCH(pResource) +#define subdeviceInternalControlForward_FNPTR(pSubdevice) pSubdevice->__subdeviceInternalControlForward__ #define subdeviceInternalControlForward(pSubdevice, command, pParams, size) subdeviceInternalControlForward_DISPATCH(pSubdevice, command, pParams, size) +#define subdeviceControlFilter_FNPTR(pSubdevice) pSubdevice->__subdeviceControlFilter__ #define subdeviceControlFilter(pSubdevice, pCallContext, pParams) subdeviceControlFilter_DISPATCH(pSubdevice, pCallContext, pParams) +#define subdeviceCtrlCmdBiosGetInfoV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBiosGetInfoV2__ #define subdeviceCtrlCmdBiosGetInfoV2(pSubdevice, pBiosInfoParams) subdeviceCtrlCmdBiosGetInfoV2_DISPATCH(pSubdevice, pBiosInfoParams) #define subdeviceCtrlCmdBiosGetInfoV2_HAL(pSubdevice, pBiosInfoParams) subdeviceCtrlCmdBiosGetInfoV2_DISPATCH(pSubdevice, pBiosInfoParams) +#define subdeviceCtrlCmdBiosGetNbsiV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBiosGetNbsiV2__ #define subdeviceCtrlCmdBiosGetNbsiV2(pSubdevice, pNbsiParams) subdeviceCtrlCmdBiosGetNbsiV2_DISPATCH(pSubdevice, pNbsiParams) +#define subdeviceCtrlCmdBiosGetSKUInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBiosGetSKUInfo__ #define subdeviceCtrlCmdBiosGetSKUInfo(pSubdevice, pBiosGetSKUInfoParams) subdeviceCtrlCmdBiosGetSKUInfo_DISPATCH(pSubdevice, pBiosGetSKUInfoParams) #define subdeviceCtrlCmdBiosGetSKUInfo_HAL(pSubdevice, pBiosGetSKUInfoParams) subdeviceCtrlCmdBiosGetSKUInfo_DISPATCH(pSubdevice, pBiosGetSKUInfoParams) +#define subdeviceCtrlCmdBiosGetPostTime_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBiosGetPostTime__ #define subdeviceCtrlCmdBiosGetPostTime(pSubdevice, pBiosPostTime) subdeviceCtrlCmdBiosGetPostTime_DISPATCH(pSubdevice, pBiosPostTime) #define subdeviceCtrlCmdBiosGetPostTime_HAL(pSubdevice, pBiosPostTime) subdeviceCtrlCmdBiosGetPostTime_DISPATCH(pSubdevice, pBiosPostTime) +#define subdeviceCtrlCmdBiosGetUefiSupport_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBiosGetUefiSupport__ #define subdeviceCtrlCmdBiosGetUefiSupport(pSubdevice, pUEFIParams) subdeviceCtrlCmdBiosGetUefiSupport_DISPATCH(pSubdevice, pUEFIParams) +#define subdeviceCtrlCmdMcGetArchInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdMcGetArchInfo__ #define subdeviceCtrlCmdMcGetArchInfo(pSubdevice, pArchInfoParams) subdeviceCtrlCmdMcGetArchInfo_DISPATCH(pSubdevice, pArchInfoParams) +#define subdeviceCtrlCmdMcGetManufacturer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdMcGetManufacturer__ #define subdeviceCtrlCmdMcGetManufacturer(pSubdevice, pManufacturerParams) subdeviceCtrlCmdMcGetManufacturer_DISPATCH(pSubdevice, pManufacturerParams) +#define subdeviceCtrlCmdMcQueryHostclkSlowdownStatus_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdMcQueryHostclkSlowdownStatus__ #define subdeviceCtrlCmdMcQueryHostclkSlowdownStatus(pSubdevice, pGetStatusParams) subdeviceCtrlCmdMcQueryHostclkSlowdownStatus_DISPATCH(pSubdevice, pGetStatusParams) +#define subdeviceCtrlCmdMcSetHostclkSlowdownStatus_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdMcSetHostclkSlowdownStatus__ #define subdeviceCtrlCmdMcSetHostclkSlowdownStatus(pSubdevice, pParams) subdeviceCtrlCmdMcSetHostclkSlowdownStatus_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdMcChangeReplayableFaultOwnership_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdMcChangeReplayableFaultOwnership__ #define subdeviceCtrlCmdMcChangeReplayableFaultOwnership(pSubdevice, pReplayableFaultOwnrshpParams) subdeviceCtrlCmdMcChangeReplayableFaultOwnership_DISPATCH(pSubdevice, pReplayableFaultOwnrshpParams) +#define subdeviceCtrlCmdMcServiceInterrupts_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdMcServiceInterrupts__ #define subdeviceCtrlCmdMcServiceInterrupts(pSubdevice, pServiceInterruptParams) subdeviceCtrlCmdMcServiceInterrupts_DISPATCH(pSubdevice, pServiceInterruptParams) +#define subdeviceCtrlCmdMcGetEngineNotificationIntrVectors_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdMcGetEngineNotificationIntrVectors__ #define subdeviceCtrlCmdMcGetEngineNotificationIntrVectors(pSubdevice, pParams) subdeviceCtrlCmdMcGetEngineNotificationIntrVectors_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdMcGetStaticIntrTable_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdMcGetStaticIntrTable__ #define subdeviceCtrlCmdMcGetStaticIntrTable(pSubdevice, pParams) subdeviceCtrlCmdMcGetStaticIntrTable_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdDmaInvalidateTLB_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdDmaInvalidateTLB__ #define subdeviceCtrlCmdDmaInvalidateTLB(pSubdevice, pParams) subdeviceCtrlCmdDmaInvalidateTLB_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdDmaGetInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdDmaGetInfo__ #define subdeviceCtrlCmdDmaGetInfo(pSubdevice, pDmaInfoParams) subdeviceCtrlCmdDmaGetInfo_DISPATCH(pSubdevice, pDmaInfoParams) +#define subdeviceCtrlCmdBusGetPciInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusGetPciInfo__ #define subdeviceCtrlCmdBusGetPciInfo(pSubdevice, pPciInfoParams) subdeviceCtrlCmdBusGetPciInfo_DISPATCH(pSubdevice, pPciInfoParams) -#define subdeviceCtrlCmdBusGetInfo(pSubdevice, pBusInfoParams) subdeviceCtrlCmdBusGetInfo_DISPATCH(pSubdevice, pBusInfoParams) +#define subdeviceCtrlCmdBusGetInfoV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusGetInfoV2__ #define subdeviceCtrlCmdBusGetInfoV2(pSubdevice, pBusInfoParams) subdeviceCtrlCmdBusGetInfoV2_DISPATCH(pSubdevice, pBusInfoParams) +#define subdeviceCtrlCmdBusGetPciBarInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusGetPciBarInfo__ #define subdeviceCtrlCmdBusGetPciBarInfo(pSubdevice, pBarInfoParams) subdeviceCtrlCmdBusGetPciBarInfo_DISPATCH(pSubdevice, pBarInfoParams) +#define subdeviceCtrlCmdBusSetPcieSpeed_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusSetPcieSpeed__ #define subdeviceCtrlCmdBusSetPcieSpeed(pSubdevice, pBusInfoParams) subdeviceCtrlCmdBusSetPcieSpeed_DISPATCH(pSubdevice, pBusInfoParams) +#define subdeviceCtrlCmdBusSetPcieLinkWidth_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusSetPcieLinkWidth__ #define subdeviceCtrlCmdBusSetPcieLinkWidth(pSubdevice, pLinkWidthParams) subdeviceCtrlCmdBusSetPcieLinkWidth_DISPATCH(pSubdevice, pLinkWidthParams) -#define subdeviceCtrlCmdBusSetHwbcUpstreamPcieSpeed(pSubdevice, pBusInfoParams) subdeviceCtrlCmdBusSetHwbcUpstreamPcieSpeed_DISPATCH(pSubdevice, pBusInfoParams) -#define subdeviceCtrlCmdBusGetHwbcUpstreamPcieSpeed(pSubdevice, pBusInfoParams) subdeviceCtrlCmdBusGetHwbcUpstreamPcieSpeed_DISPATCH(pSubdevice, pBusInfoParams) -#define subdeviceCtrlCmdBusHWBCGetUpstreamBAR0(pSubdevice, pBusInfoParams) subdeviceCtrlCmdBusHWBCGetUpstreamBAR0_DISPATCH(pSubdevice, pBusInfoParams) +#define subdeviceCtrlCmdBusServiceGpuMultifunctionState_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusServiceGpuMultifunctionState__ #define subdeviceCtrlCmdBusServiceGpuMultifunctionState(pSubdevice, pParams) subdeviceCtrlCmdBusServiceGpuMultifunctionState_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusGetPexCounters_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusGetPexCounters__ #define subdeviceCtrlCmdBusGetPexCounters(pSubdevice, pParams) subdeviceCtrlCmdBusGetPexCounters_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusGetBFD_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusGetBFD__ #define subdeviceCtrlCmdBusGetBFD(pSubdevice, pBusGetBFDParams) subdeviceCtrlCmdBusGetBFD_DISPATCH(pSubdevice, pBusGetBFDParams) +#define subdeviceCtrlCmdBusGetAspmDisableFlags_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusGetAspmDisableFlags__ #define subdeviceCtrlCmdBusGetAspmDisableFlags(pSubdevice, pParams) subdeviceCtrlCmdBusGetAspmDisableFlags_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusControlPublicAspmBits_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusControlPublicAspmBits__ #define subdeviceCtrlCmdBusControlPublicAspmBits(pSubdevice, pParams) subdeviceCtrlCmdBusControlPublicAspmBits_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusClearPexCounters_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusClearPexCounters__ #define subdeviceCtrlCmdBusClearPexCounters(pSubdevice, pParams) subdeviceCtrlCmdBusClearPexCounters_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusGetPexUtilCounters_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusGetPexUtilCounters__ #define subdeviceCtrlCmdBusGetPexUtilCounters(pSubdevice, pParams) subdeviceCtrlCmdBusGetPexUtilCounters_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusClearPexUtilCounters_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusClearPexUtilCounters__ #define subdeviceCtrlCmdBusClearPexUtilCounters(pSubdevice, pParams) subdeviceCtrlCmdBusClearPexUtilCounters_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusFreezePexCounters_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusFreezePexCounters__ #define subdeviceCtrlCmdBusFreezePexCounters(pSubdevice, pParams) subdeviceCtrlCmdBusFreezePexCounters_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusGetPexLaneCounters_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusGetPexLaneCounters__ #define subdeviceCtrlCmdBusGetPexLaneCounters(pSubdevice, pParams) subdeviceCtrlCmdBusGetPexLaneCounters_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusGetPcieLtrLatency_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusGetPcieLtrLatency__ #define subdeviceCtrlCmdBusGetPcieLtrLatency(pSubdevice, pParams) subdeviceCtrlCmdBusGetPcieLtrLatency_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusSetPcieLtrLatency_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusSetPcieLtrLatency__ #define subdeviceCtrlCmdBusSetPcieLtrLatency(pSubdevice, pParams) subdeviceCtrlCmdBusSetPcieLtrLatency_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusGetNvlinkPeerIdMask_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusGetNvlinkPeerIdMask__ #define subdeviceCtrlCmdBusGetNvlinkPeerIdMask(pSubdevice, pParams) subdeviceCtrlCmdBusGetNvlinkPeerIdMask_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusSetEomParameters_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusSetEomParameters__ #define subdeviceCtrlCmdBusSetEomParameters(pSubdevice, pParams) subdeviceCtrlCmdBusSetEomParameters_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusGetUphyDlnCfgSpace_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusGetUphyDlnCfgSpace__ #define subdeviceCtrlCmdBusGetUphyDlnCfgSpace(pSubdevice, pParams) subdeviceCtrlCmdBusGetUphyDlnCfgSpace_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusGetEomStatus_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusGetEomStatus__ #define subdeviceCtrlCmdBusGetEomStatus(pSubdevice, pParams) subdeviceCtrlCmdBusGetEomStatus_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusGetPcieReqAtomicsCaps_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusGetPcieReqAtomicsCaps__ #define subdeviceCtrlCmdBusGetPcieReqAtomicsCaps(pSubdevice, pParams) subdeviceCtrlCmdBusGetPcieReqAtomicsCaps_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdBusGetPcieReqAtomicsCaps_HAL(pSubdevice, pParams) subdeviceCtrlCmdBusGetPcieReqAtomicsCaps_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics__ #define subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics(pSubdevice, pParams) subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics_HAL(pSubdevice, pParams) subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusGetC2CInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusGetC2CInfo__ #define subdeviceCtrlCmdBusGetC2CInfo(pSubdevice, pParams) subdeviceCtrlCmdBusGetC2CInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusGetC2CInfo_HAL(pSubdevice, pParams) subdeviceCtrlCmdBusGetC2CInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusSysmemAccess_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusSysmemAccess__ #define subdeviceCtrlCmdBusSysmemAccess(pSubdevice, pParams) subdeviceCtrlCmdBusSysmemAccess_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusSetP2pMapping_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusSetP2pMapping__ #define subdeviceCtrlCmdBusSetP2pMapping(pSubdevice, pParams) subdeviceCtrlCmdBusSetP2pMapping_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdBusSetP2pMapping_HAL(pSubdevice, pParams) subdeviceCtrlCmdBusSetP2pMapping_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusUnsetP2pMapping_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusUnsetP2pMapping__ #define subdeviceCtrlCmdBusUnsetP2pMapping(pSubdevice, pParams) subdeviceCtrlCmdBusUnsetP2pMapping_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdBusUnsetP2pMapping_HAL(pSubdevice, pParams) subdeviceCtrlCmdBusUnsetP2pMapping_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGetNvlinkCountersV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGetNvlinkCountersV2__ +#define subdeviceCtrlCmdGetNvlinkCountersV2(pSubdevice, pParams) subdeviceCtrlCmdGetNvlinkCountersV2_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdClearNvlinkCountersV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdClearNvlinkCountersV2__ +#define subdeviceCtrlCmdClearNvlinkCountersV2(pSubdevice, pParams) subdeviceCtrlCmdClearNvlinkCountersV2_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGetNvlinkCounters_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGetNvlinkCounters__ #define subdeviceCtrlCmdGetNvlinkCounters(pSubdevice, pParams) subdeviceCtrlCmdGetNvlinkCounters_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdClearNvlinkCounters_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdClearNvlinkCounters__ #define subdeviceCtrlCmdClearNvlinkCounters(pSubdevice, pParams) subdeviceCtrlCmdClearNvlinkCounters_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusGetNvlinkCaps_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusGetNvlinkCaps__ #define subdeviceCtrlCmdBusGetNvlinkCaps(pSubdevice, pParams) subdeviceCtrlCmdBusGetNvlinkCaps_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusGetNvlinkCaps_HAL(pSubdevice, pParams) subdeviceCtrlCmdBusGetNvlinkCaps_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusGetNvlinkStatus_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusGetNvlinkStatus__ #define subdeviceCtrlCmdBusGetNvlinkStatus(pSubdevice, pParams) subdeviceCtrlCmdBusGetNvlinkStatus_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBusGetNvlinkErrInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBusGetNvlinkErrInfo__ #define subdeviceCtrlCmdBusGetNvlinkErrInfo(pSubdevice, pParams) subdeviceCtrlCmdBusGetNvlinkErrInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinGetLinkFomValues_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinGetLinkFomValues__ #define subdeviceCtrlCmdNvlinGetLinkFomValues(pSubdevice, pParams) subdeviceCtrlCmdNvlinGetLinkFomValues_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkGetNvlinkEccErrors_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkGetNvlinkEccErrors__ #define subdeviceCtrlCmdNvlinkGetNvlinkEccErrors(pSubdevice, pParams) subdeviceCtrlCmdNvlinkGetNvlinkEccErrors_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkGetLinkFatalErrorCounts_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkGetLinkFatalErrorCounts__ #define subdeviceCtrlCmdNvlinkGetLinkFatalErrorCounts(pSubdevice, pParams) subdeviceCtrlCmdNvlinkGetLinkFatalErrorCounts_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkSetupEom_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkSetupEom__ #define subdeviceCtrlCmdNvlinkSetupEom(pSubdevice, pParams) subdeviceCtrlCmdNvlinkSetupEom_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkGetPowerState_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkGetPowerState__ #define subdeviceCtrlCmdNvlinkGetPowerState(pSubdevice, pParams) subdeviceCtrlCmdNvlinkGetPowerState_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkReadTpCounters_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkReadTpCounters__ #define subdeviceCtrlCmdNvlinkReadTpCounters(pSubdevice, pParams) subdeviceCtrlCmdNvlinkReadTpCounters_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkGetLpCounters_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkGetLpCounters__ #define subdeviceCtrlCmdNvlinkGetLpCounters(pSubdevice, pParams) subdeviceCtrlCmdNvlinkGetLpCounters_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkEnableNvlinkPeer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkEnableNvlinkPeer__ #define subdeviceCtrlCmdNvlinkEnableNvlinkPeer(pSubdevice, pParams) subdeviceCtrlCmdNvlinkEnableNvlinkPeer_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkCoreCallback_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkCoreCallback__ #define subdeviceCtrlCmdNvlinkCoreCallback(pSubdevice, pParams) subdeviceCtrlCmdNvlinkCoreCallback_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkGetAliEnabled_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkGetAliEnabled__ #define subdeviceCtrlCmdNvlinkGetAliEnabled(pSubdevice, pParams) subdeviceCtrlCmdNvlinkGetAliEnabled_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkSetLoopbackMode_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkSetLoopbackMode__ #define subdeviceCtrlCmdNvlinkSetLoopbackMode(pSubdevice, pParams) subdeviceCtrlCmdNvlinkSetLoopbackMode_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid__ #define subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid(pSubdevice, pParams) subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkUpdateHshubMux_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkUpdateHshubMux__ #define subdeviceCtrlCmdNvlinkUpdateHshubMux(pSubdevice, pParams) subdeviceCtrlCmdNvlinkUpdateHshubMux_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer__ #define subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer(pSubdevice, pParams) subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer__ #define subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer(pSubdevice, pParams) subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkRemoveNvlinkMapping_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkRemoveNvlinkMapping__ #define subdeviceCtrlCmdNvlinkRemoveNvlinkMapping(pSubdevice, pParams) subdeviceCtrlCmdNvlinkRemoveNvlinkMapping_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkSaveRestoreHshubState_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkSaveRestoreHshubState__ #define subdeviceCtrlCmdNvlinkSaveRestoreHshubState(pSubdevice, pParams) subdeviceCtrlCmdNvlinkSaveRestoreHshubState_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkProgramBufferready_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkProgramBufferready__ #define subdeviceCtrlCmdNvlinkProgramBufferready(pSubdevice, pParams) subdeviceCtrlCmdNvlinkProgramBufferready_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkUpdateCurrentConfig_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkUpdateCurrentConfig__ #define subdeviceCtrlCmdNvlinkUpdateCurrentConfig(pSubdevice, pParams) subdeviceCtrlCmdNvlinkUpdateCurrentConfig_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkUpdatePeerLinkMask_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkUpdatePeerLinkMask__ #define subdeviceCtrlCmdNvlinkUpdatePeerLinkMask(pSubdevice, pParams) subdeviceCtrlCmdNvlinkUpdatePeerLinkMask_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkUpdateLinkConnection_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkUpdateLinkConnection__ #define subdeviceCtrlCmdNvlinkUpdateLinkConnection(pSubdevice, pParams) subdeviceCtrlCmdNvlinkUpdateLinkConnection_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkEnableLinksPostTopology_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkEnableLinksPostTopology__ #define subdeviceCtrlCmdNvlinkEnableLinksPostTopology(pSubdevice, pParams) subdeviceCtrlCmdNvlinkEnableLinksPostTopology_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkPreLinkTrainAli_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkPreLinkTrainAli__ #define subdeviceCtrlCmdNvlinkPreLinkTrainAli(pSubdevice, pParams) subdeviceCtrlCmdNvlinkPreLinkTrainAli_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkGetRefreshCounters_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkGetRefreshCounters__ #define subdeviceCtrlCmdNvlinkGetRefreshCounters(pSubdevice, pParams) subdeviceCtrlCmdNvlinkGetRefreshCounters_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkClearRefreshCounters_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkClearRefreshCounters__ #define subdeviceCtrlCmdNvlinkClearRefreshCounters(pSubdevice, pParams) subdeviceCtrlCmdNvlinkClearRefreshCounters_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkGetLinkMaskPostRxDet_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkGetLinkMaskPostRxDet__ #define subdeviceCtrlCmdNvlinkGetLinkMaskPostRxDet(pSubdevice, pParams) subdeviceCtrlCmdNvlinkGetLinkMaskPostRxDet_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkLinkTrainAli_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkLinkTrainAli__ #define subdeviceCtrlCmdNvlinkLinkTrainAli(pSubdevice, pParams) subdeviceCtrlCmdNvlinkLinkTrainAli_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkGetNvlinkDeviceInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkGetNvlinkDeviceInfo__ #define subdeviceCtrlCmdNvlinkGetNvlinkDeviceInfo(pSubdevice, pParams) subdeviceCtrlCmdNvlinkGetNvlinkDeviceInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkGetIoctrlDeviceInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkGetIoctrlDeviceInfo__ #define subdeviceCtrlCmdNvlinkGetIoctrlDeviceInfo(pSubdevice, pParams) subdeviceCtrlCmdNvlinkGetIoctrlDeviceInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkProgramLinkSpeed_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkProgramLinkSpeed__ #define subdeviceCtrlCmdNvlinkProgramLinkSpeed(pSubdevice, pParams) subdeviceCtrlCmdNvlinkProgramLinkSpeed_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkAreLinksTrained_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkAreLinksTrained__ #define subdeviceCtrlCmdNvlinkAreLinksTrained(pSubdevice, pParams) subdeviceCtrlCmdNvlinkAreLinksTrained_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkResetLinks_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkResetLinks__ #define subdeviceCtrlCmdNvlinkResetLinks(pSubdevice, pParams) subdeviceCtrlCmdNvlinkResetLinks_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkDisableDlInterrupts_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkDisableDlInterrupts__ #define subdeviceCtrlCmdNvlinkDisableDlInterrupts(pSubdevice, pParams) subdeviceCtrlCmdNvlinkDisableDlInterrupts_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkGetLinkAndClockInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkGetLinkAndClockInfo__ #define subdeviceCtrlCmdNvlinkGetLinkAndClockInfo(pSubdevice, pParams) subdeviceCtrlCmdNvlinkGetLinkAndClockInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkSetupNvlinkSysmem_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkSetupNvlinkSysmem__ #define subdeviceCtrlCmdNvlinkSetupNvlinkSysmem(pSubdevice, pParams) subdeviceCtrlCmdNvlinkSetupNvlinkSysmem_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkProcessForcedConfigs_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkProcessForcedConfigs__ #define subdeviceCtrlCmdNvlinkProcessForcedConfigs(pSubdevice, pParams) subdeviceCtrlCmdNvlinkProcessForcedConfigs_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkSyncLaneShutdownProps_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkSyncLaneShutdownProps__ #define subdeviceCtrlCmdNvlinkSyncLaneShutdownProps(pSubdevice, pParams) subdeviceCtrlCmdNvlinkSyncLaneShutdownProps_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkEnableSysmemNvlinkAts_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkEnableSysmemNvlinkAts__ #define subdeviceCtrlCmdNvlinkEnableSysmemNvlinkAts(pSubdevice, pParams) subdeviceCtrlCmdNvlinkEnableSysmemNvlinkAts_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkHshubGetSysmemNvlinkMask_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkHshubGetSysmemNvlinkMask__ #define subdeviceCtrlCmdNvlinkHshubGetSysmemNvlinkMask(pSubdevice, pParams) subdeviceCtrlCmdNvlinkHshubGetSysmemNvlinkMask_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkGetSetNvswitchFlaAddr_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkGetSetNvswitchFlaAddr__ #define subdeviceCtrlCmdNvlinkGetSetNvswitchFlaAddr(pSubdevice, pParams) subdeviceCtrlCmdNvlinkGetSetNvswitchFlaAddr_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkSyncLinkMasksAndVbiosInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkSyncLinkMasksAndVbiosInfo__ #define subdeviceCtrlCmdNvlinkSyncLinkMasksAndVbiosInfo(pSubdevice, pParams) subdeviceCtrlCmdNvlinkSyncLinkMasksAndVbiosInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkEnableLinks_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkEnableLinks__ #define subdeviceCtrlCmdNvlinkEnableLinks(pSubdevice) subdeviceCtrlCmdNvlinkEnableLinks_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdNvlinkProcessInitDisabledLinks_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkProcessInitDisabledLinks__ #define subdeviceCtrlCmdNvlinkProcessInitDisabledLinks(pSubdevice, pParams) subdeviceCtrlCmdNvlinkProcessInitDisabledLinks_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkInbandSendData_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkInbandSendData__ #define subdeviceCtrlCmdNvlinkInbandSendData(pSubdevice, pParams) subdeviceCtrlCmdNvlinkInbandSendData_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkPostFaultUp_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkPostFaultUp__ #define subdeviceCtrlCmdNvlinkPostFaultUp(pSubdevice, pParams) subdeviceCtrlCmdNvlinkPostFaultUp_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkEomControl_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkEomControl__ #define subdeviceCtrlCmdNvlinkEomControl(pSubdevice, pParams) subdeviceCtrlCmdNvlinkEomControl_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkSetL1Threshold_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkSetL1Threshold__ #define subdeviceCtrlCmdNvlinkSetL1Threshold(pSubdevice, pParams) subdeviceCtrlCmdNvlinkSetL1Threshold_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkDirectConnectCheck_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkDirectConnectCheck__ #define subdeviceCtrlCmdNvlinkDirectConnectCheck(pSubdevice, pParams) subdeviceCtrlCmdNvlinkDirectConnectCheck_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkGetL1Threshold_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkGetL1Threshold__ #define subdeviceCtrlCmdNvlinkGetL1Threshold(pSubdevice, pParams) subdeviceCtrlCmdNvlinkGetL1Threshold_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdIsNvlinkReducedConfig_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdIsNvlinkReducedConfig__ #define subdeviceCtrlCmdIsNvlinkReducedConfig(pSubdevice, pParams) subdeviceCtrlCmdIsNvlinkReducedConfig_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkGetPortEvents_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkGetPortEvents__ #define subdeviceCtrlCmdNvlinkGetPortEvents(pSubdevice, pParams) subdeviceCtrlCmdNvlinkGetPortEvents_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdI2cReadBuffer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdI2cReadBuffer__ #define subdeviceCtrlCmdI2cReadBuffer(pSubdevice, pI2cParams) subdeviceCtrlCmdI2cReadBuffer_DISPATCH(pSubdevice, pI2cParams) +#define subdeviceCtrlCmdI2cWriteBuffer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdI2cWriteBuffer__ #define subdeviceCtrlCmdI2cWriteBuffer(pSubdevice, pI2cParams) subdeviceCtrlCmdI2cWriteBuffer_DISPATCH(pSubdevice, pI2cParams) +#define subdeviceCtrlCmdI2cReadReg_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdI2cReadReg__ #define subdeviceCtrlCmdI2cReadReg(pSubdevice, pI2cParams) subdeviceCtrlCmdI2cReadReg_DISPATCH(pSubdevice, pI2cParams) +#define subdeviceCtrlCmdI2cWriteReg_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdI2cWriteReg__ #define subdeviceCtrlCmdI2cWriteReg(pSubdevice, pI2cParams) subdeviceCtrlCmdI2cWriteReg_DISPATCH(pSubdevice, pI2cParams) -#define subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamples(pSubdevice, pParams) subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamples_DISPATCH(pSubdevice, pParams) -#define subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamples_HAL(pSubdevice, pParams) subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamples_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2__ #define subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2(pSubdevice, pParams) subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2_HAL(pSubdevice, pParams) subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdPerfRatedTdpGetControl_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdPerfRatedTdpGetControl__ #define subdeviceCtrlCmdPerfRatedTdpGetControl(pSubdevice, pControlParams) subdeviceCtrlCmdPerfRatedTdpGetControl_DISPATCH(pSubdevice, pControlParams) +#define subdeviceCtrlCmdPerfRatedTdpSetControl_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdPerfRatedTdpSetControl__ #define subdeviceCtrlCmdPerfRatedTdpSetControl(pSubdevice, pControlParams) subdeviceCtrlCmdPerfRatedTdpSetControl_DISPATCH(pSubdevice, pControlParams) #define subdeviceCtrlCmdPerfRatedTdpSetControl_HAL(pSubdevice, pControlParams) subdeviceCtrlCmdPerfRatedTdpSetControl_DISPATCH(pSubdevice, pControlParams) +#define subdeviceCtrlCmdPerfReservePerfmonHw_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdPerfReservePerfmonHw__ #define subdeviceCtrlCmdPerfReservePerfmonHw(pSubdevice, pPerfmonParams) subdeviceCtrlCmdPerfReservePerfmonHw_DISPATCH(pSubdevice, pPerfmonParams) #define subdeviceCtrlCmdPerfReservePerfmonHw_HAL(pSubdevice, pPerfmonParams) subdeviceCtrlCmdPerfReservePerfmonHw_DISPATCH(pSubdevice, pPerfmonParams) +#define subdeviceCtrlCmdPerfSetAuxPowerState_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdPerfSetAuxPowerState__ #define subdeviceCtrlCmdPerfSetAuxPowerState(pSubdevice, pPowerStateParams) subdeviceCtrlCmdPerfSetAuxPowerState_DISPATCH(pSubdevice, pPowerStateParams) #define subdeviceCtrlCmdPerfSetAuxPowerState_HAL(pSubdevice, pPowerStateParams) subdeviceCtrlCmdPerfSetAuxPowerState_DISPATCH(pSubdevice, pPowerStateParams) +#define subdeviceCtrlCmdPerfSetPowerstate_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdPerfSetPowerstate__ #define subdeviceCtrlCmdPerfSetPowerstate(pSubdevice, pPowerInfoParams) subdeviceCtrlCmdPerfSetPowerstate_DISPATCH(pSubdevice, pPowerInfoParams) #define subdeviceCtrlCmdPerfSetPowerstate_HAL(pSubdevice, pPowerInfoParams) subdeviceCtrlCmdPerfSetPowerstate_DISPATCH(pSubdevice, pPowerInfoParams) +#define subdeviceCtrlCmdPerfGetLevelInfo_V2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdPerfGetLevelInfo_V2__ #define subdeviceCtrlCmdPerfGetLevelInfo_V2(pSubdevice, pLevelInfoParams) subdeviceCtrlCmdPerfGetLevelInfo_V2_DISPATCH(pSubdevice, pLevelInfoParams) #define subdeviceCtrlCmdPerfGetLevelInfo_V2_HAL(pSubdevice, pLevelInfoParams) subdeviceCtrlCmdPerfGetLevelInfo_V2_DISPATCH(pSubdevice, pLevelInfoParams) +#define subdeviceCtrlCmdPerfGetCurrentPstate_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdPerfGetCurrentPstate__ #define subdeviceCtrlCmdPerfGetCurrentPstate(pSubdevice, pInfoParams) subdeviceCtrlCmdPerfGetCurrentPstate_DISPATCH(pSubdevice, pInfoParams) #define subdeviceCtrlCmdPerfGetCurrentPstate_HAL(pSubdevice, pInfoParams) subdeviceCtrlCmdPerfGetCurrentPstate_DISPATCH(pSubdevice, pInfoParams) +#define subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample__ #define subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample(pSubdevice, pSampleParams) subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample_DISPATCH(pSubdevice, pSampleParams) #define subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample_HAL(pSubdevice, pSampleParams) subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample_DISPATCH(pSubdevice, pSampleParams) +#define subdeviceCtrlCmdPerfGetPowerstate_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdPerfGetPowerstate__ #define subdeviceCtrlCmdPerfGetPowerstate(pSubdevice, powerInfoParams) subdeviceCtrlCmdPerfGetPowerstate_DISPATCH(pSubdevice, powerInfoParams) #define subdeviceCtrlCmdPerfGetPowerstate_HAL(pSubdevice, powerInfoParams) subdeviceCtrlCmdPerfGetPowerstate_DISPATCH(pSubdevice, powerInfoParams) +#define subdeviceCtrlCmdPerfNotifyVideoevent_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdPerfNotifyVideoevent__ #define subdeviceCtrlCmdPerfNotifyVideoevent(pSubdevice, pVideoEventParams) subdeviceCtrlCmdPerfNotifyVideoevent_DISPATCH(pSubdevice, pVideoEventParams) #define subdeviceCtrlCmdPerfNotifyVideoevent_HAL(pSubdevice, pVideoEventParams) subdeviceCtrlCmdPerfNotifyVideoevent_DISPATCH(pSubdevice, pVideoEventParams) +#define subdeviceCtrlCmdKPerfBoost_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKPerfBoost__ #define subdeviceCtrlCmdKPerfBoost(pSubdevice, pBoostParams) subdeviceCtrlCmdKPerfBoost_DISPATCH(pSubdevice, pBoostParams) +#define subdeviceCtrlCmdFbGetFBRegionInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetFBRegionInfo__ #define subdeviceCtrlCmdFbGetFBRegionInfo(pSubdevice, pGFBRIParams) subdeviceCtrlCmdFbGetFBRegionInfo_DISPATCH(pSubdevice, pGFBRIParams) +#define subdeviceCtrlCmdFbGetBar1Offset_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetBar1Offset__ #define subdeviceCtrlCmdFbGetBar1Offset(pSubdevice, pFbMemParams) subdeviceCtrlCmdFbGetBar1Offset_DISPATCH(pSubdevice, pFbMemParams) +#define subdeviceCtrlCmdFbIsKind_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbIsKind__ #define subdeviceCtrlCmdFbIsKind(pSubdevice, pIsKindParams) subdeviceCtrlCmdFbIsKind_DISPATCH(pSubdevice, pIsKindParams) +#define subdeviceCtrlCmdFbGetMemAlignment_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetMemAlignment__ #define subdeviceCtrlCmdFbGetMemAlignment(pSubdevice, pParams) subdeviceCtrlCmdFbGetMemAlignment_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbGetHeapReservationSize_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetHeapReservationSize__ #define subdeviceCtrlCmdFbGetHeapReservationSize(pSubdevice, pParams) subdeviceCtrlCmdFbGetHeapReservationSize_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalMemmgrGetVgpuHostRmReservedFb_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalMemmgrGetVgpuHostRmReservedFb__ #define subdeviceCtrlCmdInternalMemmgrGetVgpuHostRmReservedFb(pSubdevice, pParams) subdeviceCtrlCmdInternalMemmgrGetVgpuHostRmReservedFb_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGbGetSemaphoreSurfaceLayout_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGbGetSemaphoreSurfaceLayout__ #define subdeviceCtrlCmdGbGetSemaphoreSurfaceLayout(pSubdevice, pParams) subdeviceCtrlCmdGbGetSemaphoreSurfaceLayout_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp__ #define subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp(pSubdevice, pParams) subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp_HAL(pSubdevice, pParams) subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbGetInfoV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetInfoV2__ #define subdeviceCtrlCmdFbGetInfoV2(pSubdevice, pFbInfoParams) subdeviceCtrlCmdFbGetInfoV2_DISPATCH(pSubdevice, pFbInfoParams) +#define subdeviceCtrlCmdFbGetCarveoutAddressInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetCarveoutAddressInfo__ #define subdeviceCtrlCmdFbGetCarveoutAddressInfo(pSubdevice, pParams) subdeviceCtrlCmdFbGetCarveoutAddressInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbGetCalibrationLockFailed_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetCalibrationLockFailed__ #define subdeviceCtrlCmdFbGetCalibrationLockFailed(pSubdevice, pGCLFParams) subdeviceCtrlCmdFbGetCalibrationLockFailed_DISPATCH(pSubdevice, pGCLFParams) +#define subdeviceCtrlCmdFbFlushGpuCache_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbFlushGpuCache__ #define subdeviceCtrlCmdFbFlushGpuCache(pSubdevice, pCacheFlushParams) subdeviceCtrlCmdFbFlushGpuCache_DISPATCH(pSubdevice, pCacheFlushParams) +#define subdeviceCtrlCmdFbSetGpuCacheAllocPolicy_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbSetGpuCacheAllocPolicy__ #define subdeviceCtrlCmdFbSetGpuCacheAllocPolicy(pSubdevice, pParams) subdeviceCtrlCmdFbSetGpuCacheAllocPolicy_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbGetGpuCacheAllocPolicy_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetGpuCacheAllocPolicy__ #define subdeviceCtrlCmdFbGetGpuCacheAllocPolicy(pSubdevice, pGpuCacheAllocPolicyParams) subdeviceCtrlCmdFbGetGpuCacheAllocPolicy_DISPATCH(pSubdevice, pGpuCacheAllocPolicyParams) +#define subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2__ #define subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2(pSubdevice, pParams) subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2__ #define subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2(pSubdevice, pParams) subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbGetGpuCacheInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetGpuCacheInfo__ #define subdeviceCtrlCmdFbGetGpuCacheInfo(pSubdevice, pGpuCacheParams) subdeviceCtrlCmdFbGetGpuCacheInfo_DISPATCH(pSubdevice, pGpuCacheParams) +#define subdeviceCtrlCmdFbGetCliManagedOfflinedPages_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetCliManagedOfflinedPages__ #define subdeviceCtrlCmdFbGetCliManagedOfflinedPages(pSubdevice, pOsOfflinedParams) subdeviceCtrlCmdFbGetCliManagedOfflinedPages_DISPATCH(pSubdevice, pOsOfflinedParams) +#define subdeviceCtrlCmdFbGetOfflinedPages_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetOfflinedPages__ #define subdeviceCtrlCmdFbGetOfflinedPages(pSubdevice, pBlackListParams) subdeviceCtrlCmdFbGetOfflinedPages_DISPATCH(pSubdevice, pBlackListParams) +#define subdeviceCtrlCmdFbGetOfflinedPages_HAL(pSubdevice, pBlackListParams) subdeviceCtrlCmdFbGetOfflinedPages_DISPATCH(pSubdevice, pBlackListParams) +#define subdeviceCtrlCmdFbSetupVprRegion_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbSetupVprRegion__ #define subdeviceCtrlCmdFbSetupVprRegion(pSubdevice, pCliReqParams) subdeviceCtrlCmdFbSetupVprRegion_DISPATCH(pSubdevice, pCliReqParams) +#define subdeviceCtrlCmdFbGetLTCInfoForFBP_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetLTCInfoForFBP__ #define subdeviceCtrlCmdFbGetLTCInfoForFBP(pSubdevice, pParams) subdeviceCtrlCmdFbGetLTCInfoForFBP_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbGetLTCInfoForFBP_HAL(pSubdevice, pParams) subdeviceCtrlCmdFbGetLTCInfoForFBP_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbGetCompBitCopyConstructInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetCompBitCopyConstructInfo__ #define subdeviceCtrlCmdFbGetCompBitCopyConstructInfo(pSubdevice, pParams) subdeviceCtrlCmdFbGetCompBitCopyConstructInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbPatchPbrForMining_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbPatchPbrForMining__ #define subdeviceCtrlCmdFbPatchPbrForMining(pSubdevice, pParams) subdeviceCtrlCmdFbPatchPbrForMining_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbGetRemappedRows_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetRemappedRows__ #define subdeviceCtrlCmdFbGetRemappedRows(pSubdevice, pRemappedRowsParams) subdeviceCtrlCmdFbGetRemappedRows_DISPATCH(pSubdevice, pRemappedRowsParams) +#define subdeviceCtrlCmdFbGetFsInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetFsInfo__ #define subdeviceCtrlCmdFbGetFsInfo(pSubdevice, pInfoParams) subdeviceCtrlCmdFbGetFsInfo_DISPATCH(pSubdevice, pInfoParams) +#define subdeviceCtrlCmdFbGetRowRemapperHistogram_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetRowRemapperHistogram__ #define subdeviceCtrlCmdFbGetRowRemapperHistogram(pSubdevice, pParams) subdeviceCtrlCmdFbGetRowRemapperHistogram_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbGetDynamicOfflinedPages_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetDynamicOfflinedPages__ #define subdeviceCtrlCmdFbGetDynamicOfflinedPages(pSubdevice, pParams) subdeviceCtrlCmdFbGetDynamicOfflinedPages_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbGetDynamicOfflinedPages_HAL(pSubdevice, pParams) subdeviceCtrlCmdFbGetDynamicOfflinedPages_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbUpdateNumaStatus_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbUpdateNumaStatus__ #define subdeviceCtrlCmdFbUpdateNumaStatus(pSubdevice, pParams) subdeviceCtrlCmdFbUpdateNumaStatus_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbGetNumaInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetNumaInfo__ #define subdeviceCtrlCmdFbGetNumaInfo(pSubdevice, pParams) subdeviceCtrlCmdFbGetNumaInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdMemSysGetStaticConfig_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdMemSysGetStaticConfig__ #define subdeviceCtrlCmdMemSysGetStaticConfig(pSubdevice, pParams) subdeviceCtrlCmdMemSysGetStaticConfig_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdMemSysGetStaticConfig_HAL(pSubdevice, pParams) subdeviceCtrlCmdMemSysGetStaticConfig_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdMemSysSetPartitionableMem_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdMemSysSetPartitionableMem__ #define subdeviceCtrlCmdMemSysSetPartitionableMem(pSubdevice, pParams) subdeviceCtrlCmdMemSysSetPartitionableMem_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKMemSysGetMIGMemoryConfig_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKMemSysGetMIGMemoryConfig__ #define subdeviceCtrlCmdKMemSysGetMIGMemoryConfig(pSubdevice, pParams) subdeviceCtrlCmdKMemSysGetMIGMemoryConfig_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbSetZbcReferenced_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbSetZbcReferenced__ #define subdeviceCtrlCmdFbSetZbcReferenced(pSubdevice, pParams) subdeviceCtrlCmdFbSetZbcReferenced_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdMemSysL2InvalidateEvict_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdMemSysL2InvalidateEvict__ #define subdeviceCtrlCmdMemSysL2InvalidateEvict(pSubdevice, pParams) subdeviceCtrlCmdMemSysL2InvalidateEvict_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdMemSysFlushL2AllRamsAndCaches_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdMemSysFlushL2AllRamsAndCaches__ #define subdeviceCtrlCmdMemSysFlushL2AllRamsAndCaches(pSubdevice) subdeviceCtrlCmdMemSysFlushL2AllRamsAndCaches_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdMemSysDisableNvlinkPeers_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdMemSysDisableNvlinkPeers__ #define subdeviceCtrlCmdMemSysDisableNvlinkPeers(pSubdevice) subdeviceCtrlCmdMemSysDisableNvlinkPeers_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdMemSysProgramRawCompressionMode_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdMemSysProgramRawCompressionMode__ #define subdeviceCtrlCmdMemSysProgramRawCompressionMode(pSubdevice, pParams) subdeviceCtrlCmdMemSysProgramRawCompressionMode_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdMemSysGetMIGMemoryPartitionTable_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdMemSysGetMIGMemoryPartitionTable__ #define subdeviceCtrlCmdMemSysGetMIGMemoryPartitionTable(pSubdevice, pParams) subdeviceCtrlCmdMemSysGetMIGMemoryPartitionTable_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbGetCtagsForCbcEviction_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetCtagsForCbcEviction__ #define subdeviceCtrlCmdFbGetCtagsForCbcEviction(pSubdevice, pParams) subdeviceCtrlCmdFbGetCtagsForCbcEviction_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbCBCOp_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbCBCOp__ #define subdeviceCtrlCmdFbCBCOp(pSubdevice, pParams) subdeviceCtrlCmdFbCBCOp_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbSetRrd_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbSetRrd__ #define subdeviceCtrlCmdFbSetRrd(pSubdevice, pParams) subdeviceCtrlCmdFbSetRrd_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbSetReadLimit_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbSetReadLimit__ #define subdeviceCtrlCmdFbSetReadLimit(pSubdevice, pParams) subdeviceCtrlCmdFbSetReadLimit_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbSetWriteLimit_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbSetWriteLimit__ #define subdeviceCtrlCmdFbSetWriteLimit(pSubdevice, pParams) subdeviceCtrlCmdFbSetWriteLimit_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGmmuCommitTlbInvalidate_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGmmuCommitTlbInvalidate__ +#define subdeviceCtrlCmdGmmuCommitTlbInvalidate(pSubdevice, pParams) subdeviceCtrlCmdGmmuCommitTlbInvalidate_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdSetGpfifo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdSetGpfifo__ #define subdeviceCtrlCmdSetGpfifo(pSubdevice, pSetGpFifoParams) subdeviceCtrlCmdSetGpfifo_DISPATCH(pSubdevice, pSetGpFifoParams) +#define subdeviceCtrlCmdSetOperationalProperties_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdSetOperationalProperties__ #define subdeviceCtrlCmdSetOperationalProperties(pSubdevice, pSetOperationalProperties) subdeviceCtrlCmdSetOperationalProperties_DISPATCH(pSubdevice, pSetOperationalProperties) +#define subdeviceCtrlCmdFifoBindEngines_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFifoBindEngines__ #define subdeviceCtrlCmdFifoBindEngines(pSubdevice, pBindParams) subdeviceCtrlCmdFifoBindEngines_DISPATCH(pSubdevice, pBindParams) +#define subdeviceCtrlCmdGetPhysicalChannelCount_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGetPhysicalChannelCount__ #define subdeviceCtrlCmdGetPhysicalChannelCount(pSubdevice, pParams) subdeviceCtrlCmdGetPhysicalChannelCount_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFifoGetInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFifoGetInfo__ #define subdeviceCtrlCmdFifoGetInfo(pSubdevice, pFifoInfoParams) subdeviceCtrlCmdFifoGetInfo_DISPATCH(pSubdevice, pFifoInfoParams) +#define subdeviceCtrlCmdFifoDisableChannels_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFifoDisableChannels__ #define subdeviceCtrlCmdFifoDisableChannels(pSubdevice, pDisableChannelParams) subdeviceCtrlCmdFifoDisableChannels_DISPATCH(pSubdevice, pDisableChannelParams) +#define subdeviceCtrlCmdFifoDisableChannelsForKeyRotation_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFifoDisableChannelsForKeyRotation__ #define subdeviceCtrlCmdFifoDisableChannelsForKeyRotation(pSubdevice, pDisableChannelParams) subdeviceCtrlCmdFifoDisableChannelsForKeyRotation_DISPATCH(pSubdevice, pDisableChannelParams) +#define subdeviceCtrlCmdFifoDisableUsermodeChannels_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFifoDisableUsermodeChannels__ #define subdeviceCtrlCmdFifoDisableUsermodeChannels(pSubdevice, pParams) subdeviceCtrlCmdFifoDisableUsermodeChannels_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFifoGetChannelMemInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFifoGetChannelMemInfo__ #define subdeviceCtrlCmdFifoGetChannelMemInfo(pSubdevice, pChannelMemParams) subdeviceCtrlCmdFifoGetChannelMemInfo_DISPATCH(pSubdevice, pChannelMemParams) +#define subdeviceCtrlCmdFifoGetUserdLocation_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFifoGetUserdLocation__ #define subdeviceCtrlCmdFifoGetUserdLocation(pSubdevice, pUserdLocationParams) subdeviceCtrlCmdFifoGetUserdLocation_DISPATCH(pSubdevice, pUserdLocationParams) +#define subdeviceCtrlCmdFifoObjschedSwGetLog_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFifoObjschedSwGetLog__ #define subdeviceCtrlCmdFifoObjschedSwGetLog(pSubdevice, pParams) subdeviceCtrlCmdFifoObjschedSwGetLog_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFifoObjschedGetState_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFifoObjschedGetState__ #define subdeviceCtrlCmdFifoObjschedGetState(pSubdevice, pParams) subdeviceCtrlCmdFifoObjschedGetState_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFifoObjschedSetState_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFifoObjschedSetState__ #define subdeviceCtrlCmdFifoObjschedSetState(pSubdevice, pParams) subdeviceCtrlCmdFifoObjschedSetState_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFifoObjschedGetCaps_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFifoObjschedGetCaps__ #define subdeviceCtrlCmdFifoObjschedGetCaps(pSubdevice, pParams) subdeviceCtrlCmdFifoObjschedGetCaps_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdFifoObjschedGetCaps_HAL(pSubdevice, pParams) subdeviceCtrlCmdFifoObjschedGetCaps_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFifoGetDeviceInfoTable_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFifoGetDeviceInfoTable__ #define subdeviceCtrlCmdFifoGetDeviceInfoTable(pSubdevice, pParams) subdeviceCtrlCmdFifoGetDeviceInfoTable_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFifoGetDeviceInfoTable_HAL(pSubdevice, pParams) subdeviceCtrlCmdFifoGetDeviceInfoTable_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFifoSetupVfZombieSubctxPdb_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFifoSetupVfZombieSubctxPdb__ #define subdeviceCtrlCmdFifoSetupVfZombieSubctxPdb(pSubdevice, pParams) subdeviceCtrlCmdFifoSetupVfZombieSubctxPdb_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFifoClearFaultedBit_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFifoClearFaultedBit__ #define subdeviceCtrlCmdFifoClearFaultedBit(pSubdevice, pParams) subdeviceCtrlCmdFifoClearFaultedBit_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFifoRunlistSetSchedPolicy_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFifoRunlistSetSchedPolicy__ #define subdeviceCtrlCmdFifoRunlistSetSchedPolicy(pSubdevice, pSchedPolicyParams) subdeviceCtrlCmdFifoRunlistSetSchedPolicy_DISPATCH(pSubdevice, pSchedPolicyParams) +#define subdeviceCtrlCmdFifoUpdateChannelInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFifoUpdateChannelInfo__ #define subdeviceCtrlCmdFifoUpdateChannelInfo(pSubdevice, pChannelInfo) subdeviceCtrlCmdFifoUpdateChannelInfo_DISPATCH(pSubdevice, pChannelInfo) +#define subdeviceCtrlCmdInternalFifoPromoteRunlistBuffers_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalFifoPromoteRunlistBuffers__ #define subdeviceCtrlCmdInternalFifoPromoteRunlistBuffers(pSubdevice, pParams) subdeviceCtrlCmdInternalFifoPromoteRunlistBuffers_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalFifoGetNumChannels_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalFifoGetNumChannels__ #define subdeviceCtrlCmdInternalFifoGetNumChannels(pSubdevice, pNumChannelsParams) subdeviceCtrlCmdInternalFifoGetNumChannels_DISPATCH(pSubdevice, pNumChannelsParams) +#define subdeviceCtrlCmdFifoGetAllocatedChannels_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFifoGetAllocatedChannels__ #define subdeviceCtrlCmdFifoGetAllocatedChannels(pSubdevice, pParams) subdeviceCtrlCmdFifoGetAllocatedChannels_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalFifoGetNumSecureChannels_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalFifoGetNumSecureChannels__ #define subdeviceCtrlCmdInternalFifoGetNumSecureChannels(pSubdevice, pNumSecureChannelsParams) subdeviceCtrlCmdInternalFifoGetNumSecureChannels_DISPATCH(pSubdevice, pNumSecureChannelsParams) +#define subdeviceCtrlCmdInternalFifoGetLogicalUprocId_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalFifoGetLogicalUprocId__ +#define subdeviceCtrlCmdInternalFifoGetLogicalUprocId(pSubdevice, pLogicalUprocIdParams) subdeviceCtrlCmdInternalFifoGetLogicalUprocId_DISPATCH(pSubdevice, pLogicalUprocIdParams) +#define subdeviceCtrlCmdInternalFifoToggleActiveChannelScheduling_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalFifoToggleActiveChannelScheduling__ +#define subdeviceCtrlCmdInternalFifoToggleActiveChannelScheduling(pSubdevice, pToggleActiveChannelSchedulingParams) subdeviceCtrlCmdInternalFifoToggleActiveChannelScheduling_DISPATCH(pSubdevice, pToggleActiveChannelSchedulingParams) +#define subdeviceCtrlCmdKGrGetInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetInfo__ #define subdeviceCtrlCmdKGrGetInfo(pSubdevice, pParams) subdeviceCtrlCmdKGrGetInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetInfoV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetInfoV2__ #define subdeviceCtrlCmdKGrGetInfoV2(pSubdevice, pParams) subdeviceCtrlCmdKGrGetInfoV2_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetCapsV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetCapsV2__ #define subdeviceCtrlCmdKGrGetCapsV2(pSubdevice, pGrCapsParams) subdeviceCtrlCmdKGrGetCapsV2_DISPATCH(pSubdevice, pGrCapsParams) +#define subdeviceCtrlCmdKGrGetCtxswModes_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetCtxswModes__ #define subdeviceCtrlCmdKGrGetCtxswModes(pSubdevice, pParams) subdeviceCtrlCmdKGrGetCtxswModes_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrCtxswZcullMode_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrCtxswZcullMode__ #define subdeviceCtrlCmdKGrCtxswZcullMode(pSubdevice, pParams) subdeviceCtrlCmdKGrCtxswZcullMode_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrCtxswZcullBind_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrCtxswZcullBind__ #define subdeviceCtrlCmdKGrCtxswZcullBind(pSubdevice, pParams) subdeviceCtrlCmdKGrCtxswZcullBind_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetZcullInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetZcullInfo__ #define subdeviceCtrlCmdKGrGetZcullInfo(pSubdevice, pZcullInfoParams) subdeviceCtrlCmdKGrGetZcullInfo_DISPATCH(pSubdevice, pZcullInfoParams) +#define subdeviceCtrlCmdKGrCtxswPmMode_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrCtxswPmMode__ #define subdeviceCtrlCmdKGrCtxswPmMode(pSubdevice, pParams) subdeviceCtrlCmdKGrCtxswPmMode_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrCtxswPmBind_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrCtxswPmBind__ #define subdeviceCtrlCmdKGrCtxswPmBind(pSubdevice, pParams) subdeviceCtrlCmdKGrCtxswPmBind_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrCtxswSetupBind_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrCtxswSetupBind__ #define subdeviceCtrlCmdKGrCtxswSetupBind(pSubdevice, pParams) subdeviceCtrlCmdKGrCtxswSetupBind_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrSetGpcTileMap_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrSetGpcTileMap__ #define subdeviceCtrlCmdKGrSetGpcTileMap(pSubdevice, pParams) subdeviceCtrlCmdKGrSetGpcTileMap_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrCtxswSmpcMode_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrCtxswSmpcMode__ #define subdeviceCtrlCmdKGrCtxswSmpcMode(pSubdevice, pParams) subdeviceCtrlCmdKGrCtxswSmpcMode_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrPcSamplingMode_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrPcSamplingMode__ #define subdeviceCtrlCmdKGrPcSamplingMode(pSubdevice, pParams) subdeviceCtrlCmdKGrPcSamplingMode_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetSmToGpcTpcMappings_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetSmToGpcTpcMappings__ #define subdeviceCtrlCmdKGrGetSmToGpcTpcMappings(pSubdevice, pParams) subdeviceCtrlCmdKGrGetSmToGpcTpcMappings_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetGlobalSmOrder_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetGlobalSmOrder__ #define subdeviceCtrlCmdKGrGetGlobalSmOrder(pSubdevice, pParams) subdeviceCtrlCmdKGrGetGlobalSmOrder_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrSetCtxswPreemptionMode_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrSetCtxswPreemptionMode__ #define subdeviceCtrlCmdKGrSetCtxswPreemptionMode(pSubdevice, pParams) subdeviceCtrlCmdKGrSetCtxswPreemptionMode_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrCtxswPreemptionBind_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrCtxswPreemptionBind__ #define subdeviceCtrlCmdKGrCtxswPreemptionBind(pSubdevice, pParams) subdeviceCtrlCmdKGrCtxswPreemptionBind_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetROPInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetROPInfo__ #define subdeviceCtrlCmdKGrGetROPInfo(pSubdevice, pParams) subdeviceCtrlCmdKGrGetROPInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetCtxswStats_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetCtxswStats__ #define subdeviceCtrlCmdKGrGetCtxswStats(pSubdevice, pParams) subdeviceCtrlCmdKGrGetCtxswStats_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetCtxBufferSize_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetCtxBufferSize__ #define subdeviceCtrlCmdKGrGetCtxBufferSize(pSubdevice, pParams) subdeviceCtrlCmdKGrGetCtxBufferSize_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetCtxBufferInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetCtxBufferInfo__ #define subdeviceCtrlCmdKGrGetCtxBufferInfo(pSubdevice, pParams) subdeviceCtrlCmdKGrGetCtxBufferInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetCtxBufferPtes_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetCtxBufferPtes__ #define subdeviceCtrlCmdKGrGetCtxBufferPtes(pSubdevice, pParams) subdeviceCtrlCmdKGrGetCtxBufferPtes_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetCurrentResidentChannel_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetCurrentResidentChannel__ #define subdeviceCtrlCmdKGrGetCurrentResidentChannel(pSubdevice, pParams) subdeviceCtrlCmdKGrGetCurrentResidentChannel_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetVatAlarmData_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetVatAlarmData__ #define subdeviceCtrlCmdKGrGetVatAlarmData(pSubdevice, pParams) subdeviceCtrlCmdKGrGetVatAlarmData_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetAttributeBufferSize_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetAttributeBufferSize__ #define subdeviceCtrlCmdKGrGetAttributeBufferSize(pSubdevice, pParams) subdeviceCtrlCmdKGrGetAttributeBufferSize_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGfxPoolQuerySize_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGfxPoolQuerySize__ #define subdeviceCtrlCmdKGrGfxPoolQuerySize(pSubdevice, pParams) subdeviceCtrlCmdKGrGfxPoolQuerySize_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGfxPoolInitialize_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGfxPoolInitialize__ #define subdeviceCtrlCmdKGrGfxPoolInitialize(pSubdevice, pParams) subdeviceCtrlCmdKGrGfxPoolInitialize_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGfxPoolAddSlots_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGfxPoolAddSlots__ #define subdeviceCtrlCmdKGrGfxPoolAddSlots(pSubdevice, pParams) subdeviceCtrlCmdKGrGfxPoolAddSlots_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGfxPoolRemoveSlots_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGfxPoolRemoveSlots__ #define subdeviceCtrlCmdKGrGfxPoolRemoveSlots(pSubdevice, pParams) subdeviceCtrlCmdKGrGfxPoolRemoveSlots_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetPpcMask_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetPpcMask__ #define subdeviceCtrlCmdKGrGetPpcMask(pSubdevice, pParams) subdeviceCtrlCmdKGrGetPpcMask_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrSetTpcPartitionMode_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrSetTpcPartitionMode__ #define subdeviceCtrlCmdKGrSetTpcPartitionMode(pSubdevice, pParams) subdeviceCtrlCmdKGrSetTpcPartitionMode_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetSmIssueRateModifier_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetSmIssueRateModifier__ #define subdeviceCtrlCmdKGrGetSmIssueRateModifier(pSubdevice, pParams) subdeviceCtrlCmdKGrGetSmIssueRateModifier_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrFecsBindEvtbufForUid_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrFecsBindEvtbufForUid__ #define subdeviceCtrlCmdKGrFecsBindEvtbufForUid(pSubdevice, pParams) subdeviceCtrlCmdKGrFecsBindEvtbufForUid_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrFecsBindEvtbufForUidV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrFecsBindEvtbufForUidV2__ #define subdeviceCtrlCmdKGrFecsBindEvtbufForUidV2(pSubdevice, pParams) subdeviceCtrlCmdKGrFecsBindEvtbufForUidV2_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetPhysGpcMask_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetPhysGpcMask__ #define subdeviceCtrlCmdKGrGetPhysGpcMask(pSubdevice, pParams) subdeviceCtrlCmdKGrGetPhysGpcMask_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetGpcMask_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetGpcMask__ #define subdeviceCtrlCmdKGrGetGpcMask(pSubdevice, pParams) subdeviceCtrlCmdKGrGetGpcMask_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetTpcMask_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetTpcMask__ #define subdeviceCtrlCmdKGrGetTpcMask(pSubdevice, pParams) subdeviceCtrlCmdKGrGetTpcMask_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetEngineContextProperties_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetEngineContextProperties__ #define subdeviceCtrlCmdKGrGetEngineContextProperties(pSubdevice, pParams) subdeviceCtrlCmdKGrGetEngineContextProperties_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetNumTpcsForGpc_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetNumTpcsForGpc__ #define subdeviceCtrlCmdKGrGetNumTpcsForGpc(pSubdevice, pParams) subdeviceCtrlCmdKGrGetNumTpcsForGpc_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetGpcTileMap_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetGpcTileMap__ #define subdeviceCtrlCmdKGrGetGpcTileMap(pSubdevice, pParams) subdeviceCtrlCmdKGrGetGpcTileMap_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetZcullMask_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetZcullMask__ #define subdeviceCtrlCmdKGrGetZcullMask(pSubdevice, pParams) subdeviceCtrlCmdKGrGetZcullMask_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrGetGfxGpcAndTpcInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrGetGfxGpcAndTpcInfo__ #define subdeviceCtrlCmdKGrGetGfxGpcAndTpcInfo(pSubdevice, pParams) subdeviceCtrlCmdKGrGetGfxGpcAndTpcInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrInternalStaticGetInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetInfo__ #define subdeviceCtrlCmdKGrInternalStaticGetInfo(pSubdevice, pParams) subdeviceCtrlCmdKGrInternalStaticGetInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrInternalStaticGetCaps_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetCaps__ #define subdeviceCtrlCmdKGrInternalStaticGetCaps(pSubdevice, pParams) subdeviceCtrlCmdKGrInternalStaticGetCaps_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrInternalStaticGetGlobalSmOrder_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetGlobalSmOrder__ #define subdeviceCtrlCmdKGrInternalStaticGetGlobalSmOrder(pSubdevice, pParams) subdeviceCtrlCmdKGrInternalStaticGetGlobalSmOrder_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrInternalStaticGetFloorsweepingMasks_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetFloorsweepingMasks__ #define subdeviceCtrlCmdKGrInternalStaticGetFloorsweepingMasks(pSubdevice, pParams) subdeviceCtrlCmdKGrInternalStaticGetFloorsweepingMasks_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrInternalStaticGetPpcMasks_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetPpcMasks__ #define subdeviceCtrlCmdKGrInternalStaticGetPpcMasks(pSubdevice, pParams) subdeviceCtrlCmdKGrInternalStaticGetPpcMasks_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrInternalStaticGetZcullInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetZcullInfo__ #define subdeviceCtrlCmdKGrInternalStaticGetZcullInfo(pSubdevice, pParams) subdeviceCtrlCmdKGrInternalStaticGetZcullInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrInternalStaticGetRopInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetRopInfo__ #define subdeviceCtrlCmdKGrInternalStaticGetRopInfo(pSubdevice, pParams) subdeviceCtrlCmdKGrInternalStaticGetRopInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrInternalStaticGetContextBuffersInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetContextBuffersInfo__ #define subdeviceCtrlCmdKGrInternalStaticGetContextBuffersInfo(pSubdevice, pParams) subdeviceCtrlCmdKGrInternalStaticGetContextBuffersInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrInternalStaticGetSmIssueRateModifier_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetSmIssueRateModifier__ #define subdeviceCtrlCmdKGrInternalStaticGetSmIssueRateModifier(pSubdevice, pParams) subdeviceCtrlCmdKGrInternalStaticGetSmIssueRateModifier_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrInternalStaticGetFecsRecordSize_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetFecsRecordSize__ #define subdeviceCtrlCmdKGrInternalStaticGetFecsRecordSize(pSubdevice, pParams) subdeviceCtrlCmdKGrInternalStaticGetFecsRecordSize_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrInternalStaticGetFecsTraceDefines_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetFecsTraceDefines__ #define subdeviceCtrlCmdKGrInternalStaticGetFecsTraceDefines(pSubdevice, pParams) subdeviceCtrlCmdKGrInternalStaticGetFecsTraceDefines_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdKGrInternalStaticGetPdbProperties_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetPdbProperties__ #define subdeviceCtrlCmdKGrInternalStaticGetPdbProperties(pSubdevice, pParams) subdeviceCtrlCmdKGrInternalStaticGetPdbProperties_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGrInternalSetFecsTraceHwEnable_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGrInternalSetFecsTraceHwEnable__ #define subdeviceCtrlCmdGrInternalSetFecsTraceHwEnable(pSubdevice, pParams) subdeviceCtrlCmdGrInternalSetFecsTraceHwEnable_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGrInternalGetFecsTraceHwEnable_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGrInternalGetFecsTraceHwEnable__ #define subdeviceCtrlCmdGrInternalGetFecsTraceHwEnable(pSubdevice, pParams) subdeviceCtrlCmdGrInternalGetFecsTraceHwEnable_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGrInternalSetFecsTraceRdOffset_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGrInternalSetFecsTraceRdOffset__ #define subdeviceCtrlCmdGrInternalSetFecsTraceRdOffset(pSubdevice, pParams) subdeviceCtrlCmdGrInternalSetFecsTraceRdOffset_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGrInternalGetFecsTraceRdOffset_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGrInternalGetFecsTraceRdOffset__ #define subdeviceCtrlCmdGrInternalGetFecsTraceRdOffset(pSubdevice, pParams) subdeviceCtrlCmdGrInternalGetFecsTraceRdOffset_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGrInternalSetFecsTraceWrOffset_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGrInternalSetFecsTraceWrOffset__ #define subdeviceCtrlCmdGrInternalSetFecsTraceWrOffset(pSubdevice, pParams) subdeviceCtrlCmdGrInternalSetFecsTraceWrOffset_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGrStaticGetFecsTraceDefines_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGrStaticGetFecsTraceDefines__ #define subdeviceCtrlCmdGrStaticGetFecsTraceDefines(pSubdevice, pParams) subdeviceCtrlCmdGrStaticGetFecsTraceDefines_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetCachedInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetCachedInfo__ #define subdeviceCtrlCmdGpuGetCachedInfo(pSubdevice, pGpuInfoParams) subdeviceCtrlCmdGpuGetCachedInfo_DISPATCH(pSubdevice, pGpuInfoParams) +#define subdeviceCtrlCmdGpuGetInfoV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetInfoV2__ #define subdeviceCtrlCmdGpuGetInfoV2(pSubdevice, pGpuInfoParams) subdeviceCtrlCmdGpuGetInfoV2_DISPATCH(pSubdevice, pGpuInfoParams) +#define subdeviceCtrlCmdGpuGetIpVersion_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetIpVersion__ #define subdeviceCtrlCmdGpuGetIpVersion(pSubdevice, pGpuIpVersionParams) subdeviceCtrlCmdGpuGetIpVersion_DISPATCH(pSubdevice, pGpuIpVersionParams) +#define subdeviceCtrlCmdGpuGetPhysicalBridgeVersionInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetPhysicalBridgeVersionInfo__ #define subdeviceCtrlCmdGpuGetPhysicalBridgeVersionInfo(pSubdevice, pBridgeInfoParams) subdeviceCtrlCmdGpuGetPhysicalBridgeVersionInfo_DISPATCH(pSubdevice, pBridgeInfoParams) +#define subdeviceCtrlCmdGpuGetAllBridgesUpstreamOfGpu_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetAllBridgesUpstreamOfGpu__ #define subdeviceCtrlCmdGpuGetAllBridgesUpstreamOfGpu(pSubdevice, pBridgeInfoParams) subdeviceCtrlCmdGpuGetAllBridgesUpstreamOfGpu_DISPATCH(pSubdevice, pBridgeInfoParams) +#define subdeviceCtrlCmdGpuSetOptimusInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuSetOptimusInfo__ #define subdeviceCtrlCmdGpuSetOptimusInfo(pSubdevice, pGpuOptimusInfoParams) subdeviceCtrlCmdGpuSetOptimusInfo_DISPATCH(pSubdevice, pGpuOptimusInfoParams) +#define subdeviceCtrlCmdGpuGetNameString_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetNameString__ #define subdeviceCtrlCmdGpuGetNameString(pSubdevice, pNameStringParams) subdeviceCtrlCmdGpuGetNameString_DISPATCH(pSubdevice, pNameStringParams) +#define subdeviceCtrlCmdGpuGetShortNameString_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetShortNameString__ #define subdeviceCtrlCmdGpuGetShortNameString(pSubdevice, pShortNameStringParams) subdeviceCtrlCmdGpuGetShortNameString_DISPATCH(pSubdevice, pShortNameStringParams) +#define subdeviceCtrlCmdGpuGetEncoderCapacity_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetEncoderCapacity__ #define subdeviceCtrlCmdGpuGetEncoderCapacity(pSubdevice, pEncoderCapacityParams) subdeviceCtrlCmdGpuGetEncoderCapacity_DISPATCH(pSubdevice, pEncoderCapacityParams) +#define subdeviceCtrlCmdGpuGetNvencSwSessionStats_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetNvencSwSessionStats__ #define subdeviceCtrlCmdGpuGetNvencSwSessionStats(pSubdevice, pParams) subdeviceCtrlCmdGpuGetNvencSwSessionStats_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetNvencSwSessionInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetNvencSwSessionInfo__ #define subdeviceCtrlCmdGpuGetNvencSwSessionInfo(pSubdevice, pParams) subdeviceCtrlCmdGpuGetNvencSwSessionInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetNvencSwSessionInfoV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetNvencSwSessionInfoV2__ #define subdeviceCtrlCmdGpuGetNvencSwSessionInfoV2(pSubdevice, pParams) subdeviceCtrlCmdGpuGetNvencSwSessionInfoV2_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetNvfbcSwSessionStats_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetNvfbcSwSessionStats__ #define subdeviceCtrlCmdGpuGetNvfbcSwSessionStats(pSubdevice, params) subdeviceCtrlCmdGpuGetNvfbcSwSessionStats_DISPATCH(pSubdevice, params) +#define subdeviceCtrlCmdGpuGetNvfbcSwSessionInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetNvfbcSwSessionInfo__ #define subdeviceCtrlCmdGpuGetNvfbcSwSessionInfo(pSubdevice, params) subdeviceCtrlCmdGpuGetNvfbcSwSessionInfo_DISPATCH(pSubdevice, params) +#define subdeviceCtrlCmdGpuSetFabricAddr_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuSetFabricAddr__ #define subdeviceCtrlCmdGpuSetFabricAddr(pSubdevice, pParams) subdeviceCtrlCmdGpuSetFabricAddr_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuSetEgmGpaFabricAddr_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuSetEgmGpaFabricAddr__ #define subdeviceCtrlCmdGpuSetEgmGpaFabricAddr(pSubdevice, pParams) subdeviceCtrlCmdGpuSetEgmGpaFabricAddr_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuSetPower_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuSetPower__ #define subdeviceCtrlCmdGpuSetPower(pSubdevice, pSetPowerParams) subdeviceCtrlCmdGpuSetPower_DISPATCH(pSubdevice, pSetPowerParams) +#define subdeviceCtrlCmdGpuGetSdm_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetSdm__ #define subdeviceCtrlCmdGpuGetSdm(pSubdevice, pSdmParams) subdeviceCtrlCmdGpuGetSdm_DISPATCH(pSubdevice, pSdmParams) +#define subdeviceCtrlCmdGpuSetSdm_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuSetSdm__ #define subdeviceCtrlCmdGpuSetSdm(pSubdevice, pSdmParams) subdeviceCtrlCmdGpuSetSdm_DISPATCH(pSubdevice, pSdmParams) +#define subdeviceCtrlCmdGpuGetSimulationInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetSimulationInfo__ #define subdeviceCtrlCmdGpuGetSimulationInfo(pSubdevice, pGpuSimulationInfoParams) subdeviceCtrlCmdGpuGetSimulationInfo_DISPATCH(pSubdevice, pGpuSimulationInfoParams) +#define subdeviceCtrlCmdGpuGetEngines_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetEngines__ #define subdeviceCtrlCmdGpuGetEngines(pSubdevice, pParams) subdeviceCtrlCmdGpuGetEngines_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetEnginesV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetEnginesV2__ #define subdeviceCtrlCmdGpuGetEnginesV2(pSubdevice, pEngineParams) subdeviceCtrlCmdGpuGetEnginesV2_DISPATCH(pSubdevice, pEngineParams) +#define subdeviceCtrlCmdGpuGetEngineClasslist_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetEngineClasslist__ #define subdeviceCtrlCmdGpuGetEngineClasslist(pSubdevice, pClassParams) subdeviceCtrlCmdGpuGetEngineClasslist_DISPATCH(pSubdevice, pClassParams) +#define subdeviceCtrlCmdGpuGetEnginePartnerList_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetEnginePartnerList__ #define subdeviceCtrlCmdGpuGetEnginePartnerList(pSubdevice, pPartnerListParams) subdeviceCtrlCmdGpuGetEnginePartnerList_DISPATCH(pSubdevice, pPartnerListParams) +#define subdeviceCtrlCmdGpuGetFermiGpcInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetFermiGpcInfo__ #define subdeviceCtrlCmdGpuGetFermiGpcInfo(pSubdevice, pParams) subdeviceCtrlCmdGpuGetFermiGpcInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetFermiTpcInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetFermiTpcInfo__ #define subdeviceCtrlCmdGpuGetFermiTpcInfo(pSubdevice, pParams) subdeviceCtrlCmdGpuGetFermiTpcInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetFermiZcullInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetFermiZcullInfo__ #define subdeviceCtrlCmdGpuGetFermiZcullInfo(pSubdevice, pGpuFermiZcullInfoParams) subdeviceCtrlCmdGpuGetFermiZcullInfo_DISPATCH(pSubdevice, pGpuFermiZcullInfoParams) +#define subdeviceCtrlCmdGpuGetPesInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetPesInfo__ #define subdeviceCtrlCmdGpuGetPesInfo(pSubdevice, pParams) subdeviceCtrlCmdGpuGetPesInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuExecRegOps_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuExecRegOps__ #define subdeviceCtrlCmdGpuExecRegOps(pSubdevice, pRegParams) subdeviceCtrlCmdGpuExecRegOps_DISPATCH(pSubdevice, pRegParams) +#define subdeviceCtrlCmdGpuMigratableOps_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuMigratableOps__ #define subdeviceCtrlCmdGpuMigratableOps(pSubdevice, pRegParams) subdeviceCtrlCmdGpuMigratableOps_DISPATCH(pSubdevice, pRegParams) +#define subdeviceCtrlCmdGpuQueryMode_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuQueryMode__ #define subdeviceCtrlCmdGpuQueryMode(pSubdevice, pQueryMode) subdeviceCtrlCmdGpuQueryMode_DISPATCH(pSubdevice, pQueryMode) +#define subdeviceCtrlCmdGpuGetInforomImageVersion_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetInforomImageVersion__ #define subdeviceCtrlCmdGpuGetInforomImageVersion(pSubdevice, pVersionInfo) subdeviceCtrlCmdGpuGetInforomImageVersion_DISPATCH(pSubdevice, pVersionInfo) +#define subdeviceCtrlCmdGpuGetInforomObjectVersion_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetInforomObjectVersion__ #define subdeviceCtrlCmdGpuGetInforomObjectVersion(pSubdevice, pVersionInfo) subdeviceCtrlCmdGpuGetInforomObjectVersion_DISPATCH(pSubdevice, pVersionInfo) +#define subdeviceCtrlCmdGpuQueryInforomEccSupport_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuQueryInforomEccSupport__ #define subdeviceCtrlCmdGpuQueryInforomEccSupport(pSubdevice) subdeviceCtrlCmdGpuQueryInforomEccSupport_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdGpuQueryEccStatus_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuQueryEccStatus__ #define subdeviceCtrlCmdGpuQueryEccStatus(pSubdevice, pParams) subdeviceCtrlCmdGpuQueryEccStatus_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdGpuQueryEccStatus_HAL(pSubdevice, pParams) subdeviceCtrlCmdGpuQueryEccStatus_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetChipDetails_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetChipDetails__ #define subdeviceCtrlCmdGpuGetChipDetails(pSubdevice, pParams) subdeviceCtrlCmdGpuGetChipDetails_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetOEMBoardInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetOEMBoardInfo__ #define subdeviceCtrlCmdGpuGetOEMBoardInfo(pSubdevice, pBoardInfo) subdeviceCtrlCmdGpuGetOEMBoardInfo_DISPATCH(pSubdevice, pBoardInfo) +#define subdeviceCtrlCmdGpuGetOEMInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetOEMInfo__ #define subdeviceCtrlCmdGpuGetOEMInfo(pSubdevice, pOemInfo) subdeviceCtrlCmdGpuGetOEMInfo_DISPATCH(pSubdevice, pOemInfo) +#define subdeviceCtrlCmdGpuHandleGpuSR_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuHandleGpuSR__ #define subdeviceCtrlCmdGpuHandleGpuSR(pSubdevice) subdeviceCtrlCmdGpuHandleGpuSR_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdGpuSetComputeModeRules_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuSetComputeModeRules__ #define subdeviceCtrlCmdGpuSetComputeModeRules(pSubdevice, pSetRulesParams) subdeviceCtrlCmdGpuSetComputeModeRules_DISPATCH(pSubdevice, pSetRulesParams) +#define subdeviceCtrlCmdGpuQueryComputeModeRules_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuQueryComputeModeRules__ #define subdeviceCtrlCmdGpuQueryComputeModeRules(pSubdevice, pQueryRulesParams) subdeviceCtrlCmdGpuQueryComputeModeRules_DISPATCH(pSubdevice, pQueryRulesParams) +#define subdeviceCtrlCmdGpuAcquireComputeModeReservation_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuAcquireComputeModeReservation__ #define subdeviceCtrlCmdGpuAcquireComputeModeReservation(pSubdevice) subdeviceCtrlCmdGpuAcquireComputeModeReservation_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdGpuReleaseComputeModeReservation_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuReleaseComputeModeReservation__ #define subdeviceCtrlCmdGpuReleaseComputeModeReservation(pSubdevice) subdeviceCtrlCmdGpuReleaseComputeModeReservation_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdGpuInitializeCtx_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuInitializeCtx__ #define subdeviceCtrlCmdGpuInitializeCtx(pSubdevice, pInitializeCtxParams) subdeviceCtrlCmdGpuInitializeCtx_DISPATCH(pSubdevice, pInitializeCtxParams) +#define subdeviceCtrlCmdGpuPromoteCtx_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuPromoteCtx__ #define subdeviceCtrlCmdGpuPromoteCtx(pSubdevice, pPromoteCtxParams) subdeviceCtrlCmdGpuPromoteCtx_DISPATCH(pSubdevice, pPromoteCtxParams) +#define subdeviceCtrlCmdGpuEvictCtx_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuEvictCtx__ #define subdeviceCtrlCmdGpuEvictCtx(pSubdevice, pEvictCtxParams) subdeviceCtrlCmdGpuEvictCtx_DISPATCH(pSubdevice, pEvictCtxParams) +#define subdeviceCtrlCmdGpuGetId_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetId__ #define subdeviceCtrlCmdGpuGetId(pSubdevice, pIdParams) subdeviceCtrlCmdGpuGetId_DISPATCH(pSubdevice, pIdParams) +#define subdeviceCtrlCmdGpuGetGidInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetGidInfo__ #define subdeviceCtrlCmdGpuGetGidInfo(pSubdevice, pGidInfoParams) subdeviceCtrlCmdGpuGetGidInfo_DISPATCH(pSubdevice, pGidInfoParams) +#define subdeviceCtrlCmdGpuQueryIllumSupport_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuQueryIllumSupport__ #define subdeviceCtrlCmdGpuQueryIllumSupport(pSubdevice, pConfigParams) subdeviceCtrlCmdGpuQueryIllumSupport_DISPATCH(pSubdevice, pConfigParams) #define subdeviceCtrlCmdGpuQueryIllumSupport_HAL(pSubdevice, pConfigParams) subdeviceCtrlCmdGpuQueryIllumSupport_DISPATCH(pSubdevice, pConfigParams) +#define subdeviceCtrlCmdGpuGetIllum_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetIllum__ #define subdeviceCtrlCmdGpuGetIllum(pSubdevice, pConfigParams) subdeviceCtrlCmdGpuGetIllum_DISPATCH(pSubdevice, pConfigParams) +#define subdeviceCtrlCmdGpuSetIllum_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuSetIllum__ #define subdeviceCtrlCmdGpuSetIllum(pSubdevice, pConfigParams) subdeviceCtrlCmdGpuSetIllum_DISPATCH(pSubdevice, pConfigParams) +#define subdeviceCtrlCmdGpuQueryScrubberStatus_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuQueryScrubberStatus__ #define subdeviceCtrlCmdGpuQueryScrubberStatus(pSubdevice, pParams) subdeviceCtrlCmdGpuQueryScrubberStatus_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdGpuQueryScrubberStatus_HAL(pSubdevice, pParams) subdeviceCtrlCmdGpuQueryScrubberStatus_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetVprCaps_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetVprCaps__ #define subdeviceCtrlCmdGpuGetVprCaps(pSubdevice, pParams) subdeviceCtrlCmdGpuGetVprCaps_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetVprInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetVprInfo__ #define subdeviceCtrlCmdGpuGetVprInfo(pSubdevice, pParams) subdeviceCtrlCmdGpuGetVprInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetPids_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetPids__ #define subdeviceCtrlCmdGpuGetPids(pSubdevice, pGetPidsParams) subdeviceCtrlCmdGpuGetPids_DISPATCH(pSubdevice, pGetPidsParams) +#define subdeviceCtrlCmdGpuGetPidInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetPidInfo__ #define subdeviceCtrlCmdGpuGetPidInfo(pSubdevice, pGetPidInfoParams) subdeviceCtrlCmdGpuGetPidInfo_DISPATCH(pSubdevice, pGetPidInfoParams) +#define subdeviceCtrlCmdGpuQueryFunctionStatus_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuQueryFunctionStatus__ #define subdeviceCtrlCmdGpuQueryFunctionStatus(pSubdevice, pParams) subdeviceCtrlCmdGpuQueryFunctionStatus_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuReportNonReplayableFault_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuReportNonReplayableFault__ #define subdeviceCtrlCmdGpuReportNonReplayableFault(pSubdevice, pParams) subdeviceCtrlCmdGpuReportNonReplayableFault_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetEngineFaultInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetEngineFaultInfo__ #define subdeviceCtrlCmdGpuGetEngineFaultInfo(pSubdevice, pParams) subdeviceCtrlCmdGpuGetEngineFaultInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetEngineRunlistPriBase_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetEngineRunlistPriBase__ #define subdeviceCtrlCmdGpuGetEngineRunlistPriBase(pSubdevice, pParams) subdeviceCtrlCmdGpuGetEngineRunlistPriBase_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetHwEngineId_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetHwEngineId__ #define subdeviceCtrlCmdGpuGetHwEngineId(pSubdevice, pParams) subdeviceCtrlCmdGpuGetHwEngineId_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetVmmuSegmentSize_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetVmmuSegmentSize__ #define subdeviceCtrlCmdGpuGetVmmuSegmentSize(pSubdevice, pParams) subdeviceCtrlCmdGpuGetVmmuSegmentSize_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetMaxSupportedPageSize_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetMaxSupportedPageSize__ #define subdeviceCtrlCmdGpuGetMaxSupportedPageSize(pSubdevice, pParams) subdeviceCtrlCmdGpuGetMaxSupportedPageSize_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuHandleVfPriFault_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuHandleVfPriFault__ #define subdeviceCtrlCmdGpuHandleVfPriFault(pSubdevice, pParams) subdeviceCtrlCmdGpuHandleVfPriFault_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuSetComputePolicyConfig_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuSetComputePolicyConfig__ #define subdeviceCtrlCmdGpuSetComputePolicyConfig(pSubdevice, pParams) subdeviceCtrlCmdGpuSetComputePolicyConfig_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetComputePolicyConfig_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetComputePolicyConfig__ #define subdeviceCtrlCmdGpuGetComputePolicyConfig(pSubdevice, pParams) subdeviceCtrlCmdGpuGetComputePolicyConfig_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdValidateMemMapRequest_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdValidateMemMapRequest__ #define subdeviceCtrlCmdValidateMemMapRequest(pSubdevice, pParams) subdeviceCtrlCmdValidateMemMapRequest_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetGfid_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetGfid__ #define subdeviceCtrlCmdGpuGetGfid(pSubdevice, pParams) subdeviceCtrlCmdGpuGetGfid_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdUpdateGfidP2pCapability_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdUpdateGfidP2pCapability__ #define subdeviceCtrlCmdUpdateGfidP2pCapability(pSubdevice, pParams) subdeviceCtrlCmdUpdateGfidP2pCapability_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetEngineLoadTimes_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetEngineLoadTimes__ #define subdeviceCtrlCmdGpuGetEngineLoadTimes(pSubdevice, pParams) subdeviceCtrlCmdGpuGetEngineLoadTimes_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGetP2pCaps_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGetP2pCaps__ #define subdeviceCtrlCmdGetP2pCaps(pSubdevice, pParams) subdeviceCtrlCmdGetP2pCaps_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGetGpuFabricProbeInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGetGpuFabricProbeInfo__ #define subdeviceCtrlCmdGetGpuFabricProbeInfo(pSubdevice, pParams) subdeviceCtrlCmdGetGpuFabricProbeInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetResetStatus_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetResetStatus__ #define subdeviceCtrlCmdGpuGetResetStatus(pSubdevice, pParams) subdeviceCtrlCmdGpuGetResetStatus_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetDrainAndResetStatus_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetDrainAndResetStatus__ #define subdeviceCtrlCmdGpuGetDrainAndResetStatus(pSubdevice, pParams) subdeviceCtrlCmdGpuGetDrainAndResetStatus_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetConstructedFalconInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetConstructedFalconInfo__ #define subdeviceCtrlCmdGpuGetConstructedFalconInfo(pSubdevice, pParams) subdeviceCtrlCmdGpuGetConstructedFalconInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlGpuGetFipsStatus_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlGpuGetFipsStatus__ #define subdeviceCtrlGpuGetFipsStatus(pSubdevice, pParams) subdeviceCtrlGpuGetFipsStatus_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdEventSetTrigger_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdEventSetTrigger__ #define subdeviceCtrlCmdEventSetTrigger(pSubdevice) subdeviceCtrlCmdEventSetTrigger_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdEventSetTriggerFifo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdEventSetTriggerFifo__ #define subdeviceCtrlCmdEventSetTriggerFifo(pSubdevice, pTriggerFifoParams) subdeviceCtrlCmdEventSetTriggerFifo_DISPATCH(pSubdevice, pTriggerFifoParams) +#define subdeviceCtrlCmdEventSetNotification_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdEventSetNotification__ #define subdeviceCtrlCmdEventSetNotification(pSubdevice, pSetEventParams) subdeviceCtrlCmdEventSetNotification_DISPATCH(pSubdevice, pSetEventParams) +#define subdeviceCtrlCmdEventSetMemoryNotifies_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdEventSetMemoryNotifies__ #define subdeviceCtrlCmdEventSetMemoryNotifies(pSubdevice, pSetMemoryNotifiesParams) subdeviceCtrlCmdEventSetMemoryNotifies_DISPATCH(pSubdevice, pSetMemoryNotifiesParams) +#define subdeviceCtrlCmdEventSetSemaphoreMemory_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdEventSetSemaphoreMemory__ #define subdeviceCtrlCmdEventSetSemaphoreMemory(pSubdevice, pSetSemMemoryParams) subdeviceCtrlCmdEventSetSemaphoreMemory_DISPATCH(pSubdevice, pSetSemMemoryParams) +#define subdeviceCtrlCmdEventSetSemaMemValidation_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdEventSetSemaMemValidation__ #define subdeviceCtrlCmdEventSetSemaMemValidation(pSubdevice, pSetSemaMemValidationParams) subdeviceCtrlCmdEventSetSemaMemValidation_DISPATCH(pSubdevice, pSetSemaMemValidationParams) +#define subdeviceCtrlCmdEventVideoBindEvtbuf_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdEventVideoBindEvtbuf__ #define subdeviceCtrlCmdEventVideoBindEvtbuf(pSubdevice, pBindParams) subdeviceCtrlCmdEventVideoBindEvtbuf_DISPATCH(pSubdevice, pBindParams) +#define subdeviceCtrlCmdEventGspTraceRatsBindEvtbuf_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdEventGspTraceRatsBindEvtbuf__ #define subdeviceCtrlCmdEventGspTraceRatsBindEvtbuf(pSubdevice, pBindParams) subdeviceCtrlCmdEventGspTraceRatsBindEvtbuf_DISPATCH(pSubdevice, pBindParams) +#define subdeviceCtrlCmdTimerCancel_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdTimerCancel__ #define subdeviceCtrlCmdTimerCancel(pSubdevice) subdeviceCtrlCmdTimerCancel_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdTimerSchedule_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdTimerSchedule__ #define subdeviceCtrlCmdTimerSchedule(pSubdevice, pParams) subdeviceCtrlCmdTimerSchedule_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdTimerGetTime_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdTimerGetTime__ #define subdeviceCtrlCmdTimerGetTime(pSubdevice, pParams) subdeviceCtrlCmdTimerGetTime_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdTimerGetRegisterOffset_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdTimerGetRegisterOffset__ #define subdeviceCtrlCmdTimerGetRegisterOffset(pSubdevice, pTimerRegOffsetParams) subdeviceCtrlCmdTimerGetRegisterOffset_DISPATCH(pSubdevice, pTimerRegOffsetParams) +#define subdeviceCtrlCmdTimerGetGpuCpuTimeCorrelationInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdTimerGetGpuCpuTimeCorrelationInfo__ #define subdeviceCtrlCmdTimerGetGpuCpuTimeCorrelationInfo(pSubdevice, pParams) subdeviceCtrlCmdTimerGetGpuCpuTimeCorrelationInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdTimerSetGrTickFreq_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdTimerSetGrTickFreq__ #define subdeviceCtrlCmdTimerSetGrTickFreq(pSubdevice, pParams) subdeviceCtrlCmdTimerSetGrTickFreq_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdRcReadVirtualMem_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdRcReadVirtualMem__ #define subdeviceCtrlCmdRcReadVirtualMem(pSubdevice, pReadVirtMemParam) subdeviceCtrlCmdRcReadVirtualMem_DISPATCH(pSubdevice, pReadVirtMemParam) +#define subdeviceCtrlCmdRcGetErrorCount_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdRcGetErrorCount__ #define subdeviceCtrlCmdRcGetErrorCount(pSubdevice, pErrorCount) subdeviceCtrlCmdRcGetErrorCount_DISPATCH(pSubdevice, pErrorCount) +#define subdeviceCtrlCmdRcGetErrorV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdRcGetErrorV2__ #define subdeviceCtrlCmdRcGetErrorV2(pSubdevice, pErrorParams) subdeviceCtrlCmdRcGetErrorV2_DISPATCH(pSubdevice, pErrorParams) +#define subdeviceCtrlCmdRcSetCleanErrorHistory_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdRcSetCleanErrorHistory__ #define subdeviceCtrlCmdRcSetCleanErrorHistory(pSubdevice) subdeviceCtrlCmdRcSetCleanErrorHistory_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdRcGetWatchdogInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdRcGetWatchdogInfo__ #define subdeviceCtrlCmdRcGetWatchdogInfo(pSubdevice, pWatchdogInfoParams) subdeviceCtrlCmdRcGetWatchdogInfo_DISPATCH(pSubdevice, pWatchdogInfoParams) +#define subdeviceCtrlCmdRcDisableWatchdog_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdRcDisableWatchdog__ #define subdeviceCtrlCmdRcDisableWatchdog(pSubdevice) subdeviceCtrlCmdRcDisableWatchdog_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdRcSoftDisableWatchdog_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdRcSoftDisableWatchdog__ #define subdeviceCtrlCmdRcSoftDisableWatchdog(pSubdevice) subdeviceCtrlCmdRcSoftDisableWatchdog_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdRcEnableWatchdog_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdRcEnableWatchdog__ #define subdeviceCtrlCmdRcEnableWatchdog(pSubdevice) subdeviceCtrlCmdRcEnableWatchdog_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdRcReleaseWatchdogRequests_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdRcReleaseWatchdogRequests__ #define subdeviceCtrlCmdRcReleaseWatchdogRequests(pSubdevice) subdeviceCtrlCmdRcReleaseWatchdogRequests_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdInternalRcWatchdogTimeout_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalRcWatchdogTimeout__ #define subdeviceCtrlCmdInternalRcWatchdogTimeout(pSubdevice) subdeviceCtrlCmdInternalRcWatchdogTimeout_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdSetRcRecovery_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdSetRcRecovery__ #define subdeviceCtrlCmdSetRcRecovery(pSubdevice, pRcRecovery) subdeviceCtrlCmdSetRcRecovery_DISPATCH(pSubdevice, pRcRecovery) +#define subdeviceCtrlCmdGetRcRecovery_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGetRcRecovery__ #define subdeviceCtrlCmdGetRcRecovery(pSubdevice, pRcRecovery) subdeviceCtrlCmdGetRcRecovery_DISPATCH(pSubdevice, pRcRecovery) +#define subdeviceCtrlCmdGetRcInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGetRcInfo__ #define subdeviceCtrlCmdGetRcInfo(pSubdevice, pParams) subdeviceCtrlCmdGetRcInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdSetRcInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdSetRcInfo__ #define subdeviceCtrlCmdSetRcInfo(pSubdevice, pParams) subdeviceCtrlCmdSetRcInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvdGetDumpSize_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvdGetDumpSize__ #define subdeviceCtrlCmdNvdGetDumpSize(pSubdevice, pDumpSizeParams) subdeviceCtrlCmdNvdGetDumpSize_DISPATCH(pSubdevice, pDumpSizeParams) +#define subdeviceCtrlCmdNvdGetDump_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvdGetDump__ #define subdeviceCtrlCmdNvdGetDump(pSubdevice, pDumpParams) subdeviceCtrlCmdNvdGetDump_DISPATCH(pSubdevice, pDumpParams) +#define subdeviceCtrlCmdNvdGetNocatJournalRpt_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvdGetNocatJournalRpt__ #define subdeviceCtrlCmdNvdGetNocatJournalRpt(pSubdevice, pReportParams) subdeviceCtrlCmdNvdGetNocatJournalRpt_DISPATCH(pSubdevice, pReportParams) +#define subdeviceCtrlCmdNvdSetNocatJournalData_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvdSetNocatJournalData__ #define subdeviceCtrlCmdNvdSetNocatJournalData(pSubdevice, pReportParams) subdeviceCtrlCmdNvdSetNocatJournalData_DISPATCH(pSubdevice, pReportParams) +#define subdeviceCtrlCmdNvdInsertNocatJournalRecord_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvdInsertNocatJournalRecord__ #define subdeviceCtrlCmdNvdInsertNocatJournalRecord(pSubdevice, pReportParams) subdeviceCtrlCmdNvdInsertNocatJournalRecord_DISPATCH(pSubdevice, pReportParams) +#define subdeviceCtrlCmdPmgrGetModuleInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdPmgrGetModuleInfo__ #define subdeviceCtrlCmdPmgrGetModuleInfo(pSubdevice, pModuleInfoParams) subdeviceCtrlCmdPmgrGetModuleInfo_DISPATCH(pSubdevice, pModuleInfoParams) +#define subdeviceCtrlCmdGpuProcessPostGc6ExitTasks_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuProcessPostGc6ExitTasks__ #define subdeviceCtrlCmdGpuProcessPostGc6ExitTasks(pSubdevice) subdeviceCtrlCmdGpuProcessPostGc6ExitTasks_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdGc6Entry_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGc6Entry__ #define subdeviceCtrlCmdGc6Entry(pSubdevice, pParams) subdeviceCtrlCmdGc6Entry_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGc6Exit_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGc6Exit__ #define subdeviceCtrlCmdGc6Exit(pSubdevice, pParams) subdeviceCtrlCmdGc6Exit_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdLpwrDifrPrefetchResponse_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdLpwrDifrPrefetchResponse__ #define subdeviceCtrlCmdLpwrDifrPrefetchResponse(pSubdevice, pParams) subdeviceCtrlCmdLpwrDifrPrefetchResponse_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdLpwrDifrCtrl_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdLpwrDifrCtrl__ #define subdeviceCtrlCmdLpwrDifrCtrl(pSubdevice, pParams) subdeviceCtrlCmdLpwrDifrCtrl_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdCeGetCaps_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdCeGetCaps__ #define subdeviceCtrlCmdCeGetCaps(pSubdevice, pCeCapsParams) subdeviceCtrlCmdCeGetCaps_DISPATCH(pSubdevice, pCeCapsParams) +#define subdeviceCtrlCmdCeGetCaps_HAL(pSubdevice, pCeCapsParams) subdeviceCtrlCmdCeGetCaps_DISPATCH(pSubdevice, pCeCapsParams) +#define subdeviceCtrlCmdCeGetCePceMask_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdCeGetCePceMask__ #define subdeviceCtrlCmdCeGetCePceMask(pSubdevice, pCePceMaskParams) subdeviceCtrlCmdCeGetCePceMask_DISPATCH(pSubdevice, pCePceMaskParams) +#define subdeviceCtrlCmdCeUpdatePceLceMappings_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdCeUpdatePceLceMappings__ #define subdeviceCtrlCmdCeUpdatePceLceMappings(pSubdevice, pCeUpdatePceLceMappingsParams) subdeviceCtrlCmdCeUpdatePceLceMappings_DISPATCH(pSubdevice, pCeUpdatePceLceMappingsParams) +#define subdeviceCtrlCmdCeGetCapsV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdCeGetCapsV2__ #define subdeviceCtrlCmdCeGetCapsV2(pSubdevice, pCeCapsParams) subdeviceCtrlCmdCeGetCapsV2_DISPATCH(pSubdevice, pCeCapsParams) +#define subdeviceCtrlCmdCeGetCapsV2_HAL(pSubdevice, pCeCapsParams) subdeviceCtrlCmdCeGetCapsV2_DISPATCH(pSubdevice, pCeCapsParams) +#define subdeviceCtrlCmdCeGetAllCaps_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdCeGetAllCaps__ #define subdeviceCtrlCmdCeGetAllCaps(pSubdevice, pCeCapsParams) subdeviceCtrlCmdCeGetAllCaps_DISPATCH(pSubdevice, pCeCapsParams) +#define subdeviceCtrlCmdCeGetAllCaps_HAL(pSubdevice, pCeCapsParams) subdeviceCtrlCmdCeGetAllCaps_DISPATCH(pSubdevice, pCeCapsParams) +#define subdeviceCtrlCmdFlcnGetDmemUsage_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFlcnGetDmemUsage__ #define subdeviceCtrlCmdFlcnGetDmemUsage(pSubdevice, pFlcnDmemUsageParams) subdeviceCtrlCmdFlcnGetDmemUsage_DISPATCH(pSubdevice, pFlcnDmemUsageParams) +#define subdeviceCtrlCmdFlcnGetEngineArch_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFlcnGetEngineArch__ #define subdeviceCtrlCmdFlcnGetEngineArch(pSubdevice, pParams) subdeviceCtrlCmdFlcnGetEngineArch_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFlcnUstreamerQueueInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFlcnUstreamerQueueInfo__ #define subdeviceCtrlCmdFlcnUstreamerQueueInfo(pSubdevice, pParams) subdeviceCtrlCmdFlcnUstreamerQueueInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFlcnUstreamerControlGet_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFlcnUstreamerControlGet__ #define subdeviceCtrlCmdFlcnUstreamerControlGet(pSubdevice, pParams) subdeviceCtrlCmdFlcnUstreamerControlGet_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFlcnUstreamerControlSet_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFlcnUstreamerControlSet__ #define subdeviceCtrlCmdFlcnUstreamerControlSet(pSubdevice, pParams) subdeviceCtrlCmdFlcnUstreamerControlSet_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFlcnGetCtxBufferInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFlcnGetCtxBufferInfo__ #define subdeviceCtrlCmdFlcnGetCtxBufferInfo(pSubdevice, pParams) subdeviceCtrlCmdFlcnGetCtxBufferInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFlcnGetCtxBufferSize_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFlcnGetCtxBufferSize__ #define subdeviceCtrlCmdFlcnGetCtxBufferSize(pSubdevice, pParams) subdeviceCtrlCmdFlcnGetCtxBufferSize_DISPATCH(pSubdevice, pParams) -#define subdeviceCtrlCmdInternalFlcnSetVideoEventBufferFlags(pSubdevice, pParams) subdeviceCtrlCmdInternalFlcnSetVideoEventBufferFlags_DISPATCH(pSubdevice, pParams) -#define subdeviceCtrlCmdInternalFlcnSetVideoEventBufferMemory(pSubdevice, pParams) subdeviceCtrlCmdInternalFlcnSetVideoEventBufferMemory_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdEccGetClientExposedCounters_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdEccGetClientExposedCounters__ #define subdeviceCtrlCmdEccGetClientExposedCounters(pSubdevice, pParams) subdeviceCtrlCmdEccGetClientExposedCounters_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdEccGetEciCounters_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdEccGetEciCounters__ #define subdeviceCtrlCmdEccGetEciCounters(pSubdevice, pParams) subdeviceCtrlCmdEccGetEciCounters_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdEccGetVolatileCounts_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdEccGetVolatileCounts__ #define subdeviceCtrlCmdEccGetVolatileCounts(pSubdevice, pParams) subdeviceCtrlCmdEccGetVolatileCounts_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuQueryEccConfiguration_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuQueryEccConfiguration__ #define subdeviceCtrlCmdGpuQueryEccConfiguration(pSubdevice, pConfig) subdeviceCtrlCmdGpuQueryEccConfiguration_DISPATCH(pSubdevice, pConfig) #define subdeviceCtrlCmdGpuQueryEccConfiguration_HAL(pSubdevice, pConfig) subdeviceCtrlCmdGpuQueryEccConfiguration_DISPATCH(pSubdevice, pConfig) +#define subdeviceCtrlCmdGpuSetEccConfiguration_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuSetEccConfiguration__ #define subdeviceCtrlCmdGpuSetEccConfiguration(pSubdevice, pConfig) subdeviceCtrlCmdGpuSetEccConfiguration_DISPATCH(pSubdevice, pConfig) #define subdeviceCtrlCmdGpuSetEccConfiguration_HAL(pSubdevice, pConfig) subdeviceCtrlCmdGpuSetEccConfiguration_DISPATCH(pSubdevice, pConfig) +#define subdeviceCtrlCmdGpuResetEccErrorStatus_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuResetEccErrorStatus__ #define subdeviceCtrlCmdGpuResetEccErrorStatus(pSubdevice, pParams) subdeviceCtrlCmdGpuResetEccErrorStatus_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdGpuResetEccErrorStatus_HAL(pSubdevice, pParams) subdeviceCtrlCmdGpuResetEccErrorStatus_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFlaRange_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFlaRange__ #define subdeviceCtrlCmdFlaRange(pSubdevice, pParams) subdeviceCtrlCmdFlaRange_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFlaSetupInstanceMemBlock_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFlaSetupInstanceMemBlock__ #define subdeviceCtrlCmdFlaSetupInstanceMemBlock(pSubdevice, pParams) subdeviceCtrlCmdFlaSetupInstanceMemBlock_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFlaGetRange_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFlaGetRange__ #define subdeviceCtrlCmdFlaGetRange(pSubdevice, pParams) subdeviceCtrlCmdFlaGetRange_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFlaGetFabricMemStats_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFlaGetFabricMemStats__ #define subdeviceCtrlCmdFlaGetFabricMemStats(pSubdevice, pParams) subdeviceCtrlCmdFlaGetFabricMemStats_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGspGetFeatures_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGspGetFeatures__ #define subdeviceCtrlCmdGspGetFeatures(pSubdevice, pGspFeaturesParams) subdeviceCtrlCmdGspGetFeatures_DISPATCH(pSubdevice, pGspFeaturesParams) #define subdeviceCtrlCmdGspGetFeatures_HAL(pSubdevice, pGspFeaturesParams) subdeviceCtrlCmdGspGetFeatures_DISPATCH(pSubdevice, pGspFeaturesParams) +#define subdeviceCtrlCmdGspGetRmHeapStats_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGspGetRmHeapStats__ #define subdeviceCtrlCmdGspGetRmHeapStats(pSubdevice, pGspRmHeapStatsParams) subdeviceCtrlCmdGspGetRmHeapStats_DISPATCH(pSubdevice, pGspRmHeapStatsParams) +#define subdeviceCtrlCmdGpuGetActivePartitionIds_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetActivePartitionIds__ #define subdeviceCtrlCmdGpuGetActivePartitionIds(pSubdevice, pParams) subdeviceCtrlCmdGpuGetActivePartitionIds_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetPartitionCapacity_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetPartitionCapacity__ #define subdeviceCtrlCmdGpuGetPartitionCapacity(pSubdevice, pParams) subdeviceCtrlCmdGpuGetPartitionCapacity_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuDescribePartitions_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuDescribePartitions__ #define subdeviceCtrlCmdGpuDescribePartitions(pSubdevice, pParams) subdeviceCtrlCmdGpuDescribePartitions_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuSetPartitioningMode_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuSetPartitioningMode__ #define subdeviceCtrlCmdGpuSetPartitioningMode(pSubdevice, pParams) subdeviceCtrlCmdGpuSetPartitioningMode_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGrmgrGetGrFsInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGrmgrGetGrFsInfo__ #define subdeviceCtrlCmdGrmgrGetGrFsInfo(pSubdevice, pParams) subdeviceCtrlCmdGrmgrGetGrFsInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuSetPartitions_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuSetPartitions__ #define subdeviceCtrlCmdGpuSetPartitions(pSubdevice, pParams) subdeviceCtrlCmdGpuSetPartitions_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetPartitions_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetPartitions__ #define subdeviceCtrlCmdGpuGetPartitions(pSubdevice, pParams) subdeviceCtrlCmdGpuGetPartitions_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetComputeProfiles_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetComputeProfiles__ #define subdeviceCtrlCmdGpuGetComputeProfiles(pSubdevice, pParams) subdeviceCtrlCmdGpuGetComputeProfiles_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalStaticKMIGmgrGetProfiles_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalStaticKMIGmgrGetProfiles__ #define subdeviceCtrlCmdInternalStaticKMIGmgrGetProfiles(pSubdevice, pParams) subdeviceCtrlCmdInternalStaticKMIGmgrGetProfiles_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalStaticKMIGmgrGetPartitionableEngines_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalStaticKMIGmgrGetPartitionableEngines__ #define subdeviceCtrlCmdInternalStaticKMIGmgrGetPartitionableEngines(pSubdevice, pParams) subdeviceCtrlCmdInternalStaticKMIGmgrGetPartitionableEngines_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalStaticKMIGmgrGetSwizzIdFbMemPageRanges_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalStaticKMIGmgrGetSwizzIdFbMemPageRanges__ #define subdeviceCtrlCmdInternalStaticKMIGmgrGetSwizzIdFbMemPageRanges(pSubdevice, pParams) subdeviceCtrlCmdInternalStaticKMIGmgrGetSwizzIdFbMemPageRanges_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalStaticKMIGmgrGetComputeInstanceProfiles_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalStaticKMIGmgrGetComputeInstanceProfiles__ #define subdeviceCtrlCmdInternalStaticKMIGmgrGetComputeInstanceProfiles(pSubdevice, pParams) subdeviceCtrlCmdInternalStaticKMIGmgrGetComputeInstanceProfiles_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalKMIGmgrExportGPUInstance_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalKMIGmgrExportGPUInstance__ #define subdeviceCtrlCmdInternalKMIGmgrExportGPUInstance(pSubdevice, pParams) subdeviceCtrlCmdInternalKMIGmgrExportGPUInstance_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalKMIGmgrImportGPUInstance_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalKMIGmgrImportGPUInstance__ #define subdeviceCtrlCmdInternalKMIGmgrImportGPUInstance(pSubdevice, pParams) subdeviceCtrlCmdInternalKMIGmgrImportGPUInstance_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalKMIGmgrPromoteGpuInstanceMemRange_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalKMIGmgrPromoteGpuInstanceMemRange__ #define subdeviceCtrlCmdInternalKMIGmgrPromoteGpuInstanceMemRange(pSubdevice, pParams) subdeviceCtrlCmdInternalKMIGmgrPromoteGpuInstanceMemRange_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdOsUnixGc6BlockerRefCnt_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdOsUnixGc6BlockerRefCnt__ #define subdeviceCtrlCmdOsUnixGc6BlockerRefCnt(pSubdevice, pParams) subdeviceCtrlCmdOsUnixGc6BlockerRefCnt_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdOsUnixAllowDisallowGcoff_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdOsUnixAllowDisallowGcoff__ #define subdeviceCtrlCmdOsUnixAllowDisallowGcoff(pSubdevice, pParams) subdeviceCtrlCmdOsUnixAllowDisallowGcoff_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdOsUnixAudioDynamicPower_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdOsUnixAudioDynamicPower__ #define subdeviceCtrlCmdOsUnixAudioDynamicPower(pSubdevice, pParams) subdeviceCtrlCmdOsUnixAudioDynamicPower_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdOsUnixVidmemPersistenceStatus_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdOsUnixVidmemPersistenceStatus__ #define subdeviceCtrlCmdOsUnixVidmemPersistenceStatus(pSubdevice, pParams) subdeviceCtrlCmdOsUnixVidmemPersistenceStatus_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdOsUnixUpdateTgpStatus_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdOsUnixUpdateTgpStatus__ #define subdeviceCtrlCmdOsUnixUpdateTgpStatus(pSubdevice, pParams) subdeviceCtrlCmdOsUnixUpdateTgpStatus_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdDisplayGetIpVersion_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdDisplayGetIpVersion__ #define subdeviceCtrlCmdDisplayGetIpVersion(pSubdevice, pParams) subdeviceCtrlCmdDisplayGetIpVersion_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdDisplayGetStaticInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdDisplayGetStaticInfo__ #define subdeviceCtrlCmdDisplayGetStaticInfo(pSubdevice, pParams) subdeviceCtrlCmdDisplayGetStaticInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdDisplaySetChannelPushbuffer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdDisplaySetChannelPushbuffer__ #define subdeviceCtrlCmdDisplaySetChannelPushbuffer(pSubdevice, pParams) subdeviceCtrlCmdDisplaySetChannelPushbuffer_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdDisplayWriteInstMem_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdDisplayWriteInstMem__ #define subdeviceCtrlCmdDisplayWriteInstMem(pSubdevice, pParams) subdeviceCtrlCmdDisplayWriteInstMem_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdDisplaySetupRgLineIntr_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdDisplaySetupRgLineIntr__ #define subdeviceCtrlCmdDisplaySetupRgLineIntr(pSubdevice, pParams) subdeviceCtrlCmdDisplaySetupRgLineIntr_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdDisplaySetImportedImpData_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdDisplaySetImportedImpData__ #define subdeviceCtrlCmdDisplaySetImportedImpData(pSubdevice, pParams) subdeviceCtrlCmdDisplaySetImportedImpData_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdDisplayGetDisplayMask_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdDisplayGetDisplayMask__ #define subdeviceCtrlCmdDisplayGetDisplayMask(pSubdevice, pParams) subdeviceCtrlCmdDisplayGetDisplayMask_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdDisplayPinsetsToLockpins_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdDisplayPinsetsToLockpins__ #define subdeviceCtrlCmdDisplayPinsetsToLockpins(pSubdevice, pParams) subdeviceCtrlCmdDisplayPinsetsToLockpins_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdDisplaySetSliLinkGpioSwControl_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdDisplaySetSliLinkGpioSwControl__ #define subdeviceCtrlCmdDisplaySetSliLinkGpioSwControl(pSubdevice, pParams) subdeviceCtrlCmdDisplaySetSliLinkGpioSwControl_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalGpioProgramDirection_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGpioProgramDirection__ #define subdeviceCtrlCmdInternalGpioProgramDirection(pSubdevice, pParams) subdeviceCtrlCmdInternalGpioProgramDirection_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalGpioProgramOutput_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGpioProgramOutput__ #define subdeviceCtrlCmdInternalGpioProgramOutput(pSubdevice, pParams) subdeviceCtrlCmdInternalGpioProgramOutput_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalGpioReadInput_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGpioReadInput__ #define subdeviceCtrlCmdInternalGpioReadInput(pSubdevice, pParams) subdeviceCtrlCmdInternalGpioReadInput_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalGpioActivateHwFunction_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGpioActivateHwFunction__ #define subdeviceCtrlCmdInternalGpioActivateHwFunction(pSubdevice, pParams) subdeviceCtrlCmdInternalGpioActivateHwFunction_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalDisplayAcpiSubsytemActivated_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalDisplayAcpiSubsytemActivated__ #define subdeviceCtrlCmdInternalDisplayAcpiSubsytemActivated(pSubdevice) subdeviceCtrlCmdInternalDisplayAcpiSubsytemActivated_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdInternalDisplayPreModeSet_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalDisplayPreModeSet__ #define subdeviceCtrlCmdInternalDisplayPreModeSet(pSubdevice) subdeviceCtrlCmdInternalDisplayPreModeSet_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdInternalDisplayPostModeSet_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalDisplayPostModeSet__ #define subdeviceCtrlCmdInternalDisplayPostModeSet(pSubdevice) subdeviceCtrlCmdInternalDisplayPostModeSet_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdDisplayPreUnixConsole_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdDisplayPreUnixConsole__ #define subdeviceCtrlCmdDisplayPreUnixConsole(pSubdevice, pParams) subdeviceCtrlCmdDisplayPreUnixConsole_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdDisplayPostUnixConsole_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdDisplayPostUnixConsole__ #define subdeviceCtrlCmdDisplayPostUnixConsole(pSubdevice, pParams) subdeviceCtrlCmdDisplayPostUnixConsole_DISPATCH(pSubdevice, pParams) -#define subdeviceCtrlCmdMsencGetCaps(pSubdevice, pParams) subdeviceCtrlCmdMsencGetCaps_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalUvmRegisterAccessCntrBuffer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalUvmRegisterAccessCntrBuffer__ #define subdeviceCtrlCmdInternalUvmRegisterAccessCntrBuffer(pSubdevice, pParams) subdeviceCtrlCmdInternalUvmRegisterAccessCntrBuffer_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalUvmUnregisterAccessCntrBuffer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalUvmUnregisterAccessCntrBuffer__ #define subdeviceCtrlCmdInternalUvmUnregisterAccessCntrBuffer(pSubdevice, pParams) subdeviceCtrlCmdInternalUvmUnregisterAccessCntrBuffer_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalGetChipInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGetChipInfo__ #define subdeviceCtrlCmdInternalGetChipInfo(pSubdevice, pParams) subdeviceCtrlCmdInternalGetChipInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalGetUserRegisterAccessMap_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGetUserRegisterAccessMap__ #define subdeviceCtrlCmdInternalGetUserRegisterAccessMap(pSubdevice, pParams) subdeviceCtrlCmdInternalGetUserRegisterAccessMap_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalGetDeviceInfoTable_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGetDeviceInfoTable__ #define subdeviceCtrlCmdInternalGetDeviceInfoTable(pSubdevice, pParams) subdeviceCtrlCmdInternalGetDeviceInfoTable_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalRecoverAllComputeContexts_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalRecoverAllComputeContexts__ #define subdeviceCtrlCmdInternalRecoverAllComputeContexts(pSubdevice) subdeviceCtrlCmdInternalRecoverAllComputeContexts_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdInternalGetSmcMode_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGetSmcMode__ #define subdeviceCtrlCmdInternalGetSmcMode(pSubdevice, pParams) subdeviceCtrlCmdInternalGetSmcMode_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdIsEgpuBridge_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdIsEgpuBridge__ #define subdeviceCtrlCmdIsEgpuBridge(pSubdevice, pParams) subdeviceCtrlCmdIsEgpuBridge_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalGpuGetGspRmFreeHeap_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGpuGetGspRmFreeHeap__ +#define subdeviceCtrlCmdInternalGpuGetGspRmFreeHeap(pSubdevice, pParams) subdeviceCtrlCmdInternalGpuGetGspRmFreeHeap_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalBusFlushWithSysmembar_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalBusFlushWithSysmembar__ #define subdeviceCtrlCmdInternalBusFlushWithSysmembar(pSubdevice) subdeviceCtrlCmdInternalBusFlushWithSysmembar_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdInternalBusSetupP2pMailboxLocal_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalBusSetupP2pMailboxLocal__ #define subdeviceCtrlCmdInternalBusSetupP2pMailboxLocal(pSubdevice, pParams) subdeviceCtrlCmdInternalBusSetupP2pMailboxLocal_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalBusSetupP2pMailboxRemote_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalBusSetupP2pMailboxRemote__ #define subdeviceCtrlCmdInternalBusSetupP2pMailboxRemote(pSubdevice, pParams) subdeviceCtrlCmdInternalBusSetupP2pMailboxRemote_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalBusDestroyP2pMailbox_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalBusDestroyP2pMailbox__ #define subdeviceCtrlCmdInternalBusDestroyP2pMailbox(pSubdevice, pParams) subdeviceCtrlCmdInternalBusDestroyP2pMailbox_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalBusCreateC2cPeerMapping_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalBusCreateC2cPeerMapping__ #define subdeviceCtrlCmdInternalBusCreateC2cPeerMapping(pSubdevice, pParams) subdeviceCtrlCmdInternalBusCreateC2cPeerMapping_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping__ #define subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping(pSubdevice, pParams) subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries__ #define subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries(pSubdevice, pParams) subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGmmuGetStaticInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGmmuGetStaticInfo__ #define subdeviceCtrlCmdGmmuGetStaticInfo(pSubdevice, pParams) subdeviceCtrlCmdGmmuGetStaticInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalGmmuRegisterFaultBuffer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGmmuRegisterFaultBuffer__ #define subdeviceCtrlCmdInternalGmmuRegisterFaultBuffer(pSubdevice, pParams) subdeviceCtrlCmdInternalGmmuRegisterFaultBuffer_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalGmmuUnregisterFaultBuffer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGmmuUnregisterFaultBuffer__ #define subdeviceCtrlCmdInternalGmmuUnregisterFaultBuffer(pSubdevice) subdeviceCtrlCmdInternalGmmuUnregisterFaultBuffer_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdInternalGmmuRegisterClientShadowFaultBuffer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGmmuRegisterClientShadowFaultBuffer__ #define subdeviceCtrlCmdInternalGmmuRegisterClientShadowFaultBuffer(pSubdevice, pParams) subdeviceCtrlCmdInternalGmmuRegisterClientShadowFaultBuffer_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalGmmuUnregisterClientShadowFaultBuffer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGmmuUnregisterClientShadowFaultBuffer__ #define subdeviceCtrlCmdInternalGmmuUnregisterClientShadowFaultBuffer(pSubdevice, pParams) subdeviceCtrlCmdInternalGmmuUnregisterClientShadowFaultBuffer_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalGmmuCopyReservedSplitGVASpacePdesServer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGmmuCopyReservedSplitGVASpacePdesServer__ #define subdeviceCtrlCmdInternalGmmuCopyReservedSplitGVASpacePdesServer(pSubdevice, pCopyServerReservedPdesParams) subdeviceCtrlCmdInternalGmmuCopyReservedSplitGVASpacePdesServer_DISPATCH(pSubdevice, pCopyServerReservedPdesParams) +#define subdeviceCtrlCmdCeGetPhysicalCaps_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdCeGetPhysicalCaps__ #define subdeviceCtrlCmdCeGetPhysicalCaps(pSubdevice, pCeCapsParams) subdeviceCtrlCmdCeGetPhysicalCaps_DISPATCH(pSubdevice, pCeCapsParams) +#define subdeviceCtrlCmdCeGetAllPhysicalCaps_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdCeGetAllPhysicalCaps__ #define subdeviceCtrlCmdCeGetAllPhysicalCaps(pSubdevice, pCeCapsParams) subdeviceCtrlCmdCeGetAllPhysicalCaps_DISPATCH(pSubdevice, pCeCapsParams) +#define subdeviceCtrlCmdCeUpdateClassDB_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdCeUpdateClassDB__ #define subdeviceCtrlCmdCeUpdateClassDB(pSubdevice, params) subdeviceCtrlCmdCeUpdateClassDB_DISPATCH(pSubdevice, params) +#define subdeviceCtrlCmdCeGetFaultMethodBufferSize_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdCeGetFaultMethodBufferSize__ #define subdeviceCtrlCmdCeGetFaultMethodBufferSize(pSubdevice, params) subdeviceCtrlCmdCeGetFaultMethodBufferSize_DISPATCH(pSubdevice, params) +#define subdeviceCtrlCmdCeGetHubPceMask_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdCeGetHubPceMask__ #define subdeviceCtrlCmdCeGetHubPceMask(pSubdevice, pParams) subdeviceCtrlCmdCeGetHubPceMask_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdIntrGetKernelTable_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdIntrGetKernelTable__ #define subdeviceCtrlCmdIntrGetKernelTable(pSubdevice, pParams) subdeviceCtrlCmdIntrGetKernelTable_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPerfCudaLimitDisable_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPerfCudaLimitDisable__ #define subdeviceCtrlCmdInternalPerfCudaLimitDisable(pSubdevice) subdeviceCtrlCmdInternalPerfCudaLimitDisable_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdInternalPerfOptpCliClear_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPerfOptpCliClear__ #define subdeviceCtrlCmdInternalPerfOptpCliClear(pSubdevice) subdeviceCtrlCmdInternalPerfOptpCliClear_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdInternalPerfBoostSet_2x_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPerfBoostSet_2x__ #define subdeviceCtrlCmdInternalPerfBoostSet_2x(pSubdevice, pParams) subdeviceCtrlCmdInternalPerfBoostSet_2x_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPerfBoostSet_3x_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPerfBoostSet_3x__ #define subdeviceCtrlCmdInternalPerfBoostSet_3x(pSubdevice, pParams) subdeviceCtrlCmdInternalPerfBoostSet_3x_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPerfBoostClear_3x_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPerfBoostClear_3x__ #define subdeviceCtrlCmdInternalPerfBoostClear_3x(pSubdevice, pParams) subdeviceCtrlCmdInternalPerfBoostClear_3x_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPerfGpuBoostSyncSetControl_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPerfGpuBoostSyncSetControl__ #define subdeviceCtrlCmdInternalPerfGpuBoostSyncSetControl(pSubdevice, pParams) subdeviceCtrlCmdInternalPerfGpuBoostSyncSetControl_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPerfGpuBoostSyncGetInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPerfGpuBoostSyncGetInfo__ #define subdeviceCtrlCmdInternalPerfGpuBoostSyncGetInfo(pSubdevice, pParams) subdeviceCtrlCmdInternalPerfGpuBoostSyncGetInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPerfSyncGpuBoostSetLimits_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPerfSyncGpuBoostSetLimits__ #define subdeviceCtrlCmdInternalPerfSyncGpuBoostSetLimits(pSubdevice, pParams) subdeviceCtrlCmdInternalPerfSyncGpuBoostSetLimits_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPerfPerfmonClientReservationCheck_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPerfPerfmonClientReservationCheck__ #define subdeviceCtrlCmdInternalPerfPerfmonClientReservationCheck(pSubdevice, pParams) subdeviceCtrlCmdInternalPerfPerfmonClientReservationCheck_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPerfPerfmonClientReservationSet_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPerfPerfmonClientReservationSet__ #define subdeviceCtrlCmdInternalPerfPerfmonClientReservationSet(pSubdevice, pParams) subdeviceCtrlCmdInternalPerfPerfmonClientReservationSet_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPerfCfControllerSetMaxVGpuVMCount_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPerfCfControllerSetMaxVGpuVMCount__ #define subdeviceCtrlCmdInternalPerfCfControllerSetMaxVGpuVMCount(pSubdevice, pParams) subdeviceCtrlCmdInternalPerfCfControllerSetMaxVGpuVMCount_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPerfGetAuxPowerState_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPerfGetAuxPowerState__ #define subdeviceCtrlCmdInternalPerfGetAuxPowerState(pSubdevice, pParams) subdeviceCtrlCmdInternalPerfGetAuxPowerState_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalGcxEntryPrerequisite_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGcxEntryPrerequisite__ #define subdeviceCtrlCmdInternalGcxEntryPrerequisite(pSubdevice, pGcxEntryPrerequisite) subdeviceCtrlCmdInternalGcxEntryPrerequisite_DISPATCH(pSubdevice, pGcxEntryPrerequisite) +#define subdeviceCtrlCmdBifGetStaticInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBifGetStaticInfo__ #define subdeviceCtrlCmdBifGetStaticInfo(pSubdevice, pParams) subdeviceCtrlCmdBifGetStaticInfo_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdBifGetStaticInfo_HAL(pSubdevice, pParams) subdeviceCtrlCmdBifGetStaticInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBifGetAspmL1Flags_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBifGetAspmL1Flags__ #define subdeviceCtrlCmdBifGetAspmL1Flags(pSubdevice, pParams) subdeviceCtrlCmdBifGetAspmL1Flags_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBifSetPcieRo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBifSetPcieRo__ #define subdeviceCtrlCmdBifSetPcieRo(pSubdevice, pParams) subdeviceCtrlCmdBifSetPcieRo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdBifDisableSystemMemoryAccess_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBifDisableSystemMemoryAccess__ #define subdeviceCtrlCmdBifDisableSystemMemoryAccess(pSubdevice, pParams) subdeviceCtrlCmdBifDisableSystemMemoryAccess_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdHshubPeerConnConfig_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdHshubPeerConnConfig__ #define subdeviceCtrlCmdHshubPeerConnConfig(pSubdevice, pParams) subdeviceCtrlCmdHshubPeerConnConfig_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdHshubFirstLinkPeerId_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdHshubFirstLinkPeerId__ #define subdeviceCtrlCmdHshubFirstLinkPeerId(pSubdevice, pParams) subdeviceCtrlCmdHshubFirstLinkPeerId_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdHshubGetHshubIdForLinks_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdHshubGetHshubIdForLinks__ #define subdeviceCtrlCmdHshubGetHshubIdForLinks(pSubdevice, pParams) subdeviceCtrlCmdHshubGetHshubIdForLinks_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdHshubGetNumUnits_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdHshubGetNumUnits__ #define subdeviceCtrlCmdHshubGetNumUnits(pSubdevice, pParams) subdeviceCtrlCmdHshubGetNumUnits_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdHshubNextHshubId_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdHshubNextHshubId__ #define subdeviceCtrlCmdHshubNextHshubId(pSubdevice, pParams) subdeviceCtrlCmdHshubNextHshubId_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdHshubEgmConfig_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdHshubEgmConfig__ #define subdeviceCtrlCmdHshubEgmConfig(pSubdevice, pParams) subdeviceCtrlCmdHshubEgmConfig_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalNvlinkEnableComputePeerAddr_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalNvlinkEnableComputePeerAddr__ #define subdeviceCtrlCmdInternalNvlinkEnableComputePeerAddr(pSubdevice) subdeviceCtrlCmdInternalNvlinkEnableComputePeerAddr_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdInternalNvlinkGetSetNvswitchFabricAddr_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalNvlinkGetSetNvswitchFabricAddr__ #define subdeviceCtrlCmdInternalNvlinkGetSetNvswitchFabricAddr(pSubdevice, pParams) subdeviceCtrlCmdInternalNvlinkGetSetNvswitchFabricAddr_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalNvlinkGetNumActiveLinksPerIoctrl_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalNvlinkGetNumActiveLinksPerIoctrl__ #define subdeviceCtrlCmdInternalNvlinkGetNumActiveLinksPerIoctrl(pSubdevice, pParams) subdeviceCtrlCmdInternalNvlinkGetNumActiveLinksPerIoctrl_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalNvlinkGetTotalNumLinksPerIoctrl_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalNvlinkGetTotalNumLinksPerIoctrl__ #define subdeviceCtrlCmdInternalNvlinkGetTotalNumLinksPerIoctrl(pSubdevice, pParams) subdeviceCtrlCmdInternalNvlinkGetTotalNumLinksPerIoctrl_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalSetP2pCaps_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalSetP2pCaps__ #define subdeviceCtrlCmdInternalSetP2pCaps(pSubdevice, pParams) subdeviceCtrlCmdInternalSetP2pCaps_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalRemoveP2pCaps_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalRemoveP2pCaps__ #define subdeviceCtrlCmdInternalRemoveP2pCaps(pSubdevice, pParams) subdeviceCtrlCmdInternalRemoveP2pCaps_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalGetPcieP2pCaps_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGetPcieP2pCaps__ #define subdeviceCtrlCmdInternalGetPcieP2pCaps(pSubdevice, pParams) subdeviceCtrlCmdInternalGetPcieP2pCaps_DISPATCH(pSubdevice, pParams) -#define subdeviceCtrlCmdInternalGetCoherentFbApertureSize(pSubdevice, pParams) subdeviceCtrlCmdInternalGetCoherentFbApertureSize_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalGetLocalAtsConfig_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGetLocalAtsConfig__ #define subdeviceCtrlCmdInternalGetLocalAtsConfig(pSubdevice, pParams) subdeviceCtrlCmdInternalGetLocalAtsConfig_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalSetPeerAtsConfig_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalSetPeerAtsConfig__ #define subdeviceCtrlCmdInternalSetPeerAtsConfig(pSubdevice, pParams) subdeviceCtrlCmdInternalSetPeerAtsConfig_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalInitGpuIntr_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalInitGpuIntr__ #define subdeviceCtrlCmdInternalInitGpuIntr(pSubdevice, pAttachParams) subdeviceCtrlCmdInternalInitGpuIntr_DISPATCH(pSubdevice, pAttachParams) +#define subdeviceCtrlCmdInternalGsyncOptimizeTiming_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGsyncOptimizeTiming__ #define subdeviceCtrlCmdInternalGsyncOptimizeTiming(pSubdevice, pAttachParams) subdeviceCtrlCmdInternalGsyncOptimizeTiming_DISPATCH(pSubdevice, pAttachParams) +#define subdeviceCtrlCmdInternalGsyncGetDisplayIds_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGsyncGetDisplayIds__ #define subdeviceCtrlCmdInternalGsyncGetDisplayIds(pSubdevice, pAttachParams) subdeviceCtrlCmdInternalGsyncGetDisplayIds_DISPATCH(pSubdevice, pAttachParams) +#define subdeviceCtrlCmdInternalGsyncSetStereoSync_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGsyncSetStereoSync__ #define subdeviceCtrlCmdInternalGsyncSetStereoSync(pSubdevice, pAttachParams) subdeviceCtrlCmdInternalGsyncSetStereoSync_DISPATCH(pSubdevice, pAttachParams) +#define subdeviceCtrlCmdInternalGsyncGetVactiveLines_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGsyncGetVactiveLines__ #define subdeviceCtrlCmdInternalGsyncGetVactiveLines(pSubdevice, pAttachParams) subdeviceCtrlCmdInternalGsyncGetVactiveLines_DISPATCH(pSubdevice, pAttachParams) +#define subdeviceCtrlCmdInternalGsyncIsDisplayIdValid_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGsyncIsDisplayIdValid__ #define subdeviceCtrlCmdInternalGsyncIsDisplayIdValid(pSubdevice, pAttachParams) subdeviceCtrlCmdInternalGsyncIsDisplayIdValid_DISPATCH(pSubdevice, pAttachParams) +#define subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync__ #define subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync(pSubdevice, pAttachParams) subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync_DISPATCH(pSubdevice, pAttachParams) +#define subdeviceCtrlCmdInternalFbsrInit_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalFbsrInit__ #define subdeviceCtrlCmdInternalFbsrInit(pSubdevice, pParams) subdeviceCtrlCmdInternalFbsrInit_DISPATCH(pSubdevice, pParams) -#define subdeviceCtrlCmdInternalFbsrSendRegionInfo(pSubdevice, pParams) subdeviceCtrlCmdInternalFbsrSendRegionInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPostInitBrightcStateLoad_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPostInitBrightcStateLoad__ #define subdeviceCtrlCmdInternalPostInitBrightcStateLoad(pSubdevice, pParams) subdeviceCtrlCmdInternalPostInitBrightcStateLoad_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalSetStaticEdidData_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalSetStaticEdidData__ #define subdeviceCtrlCmdInternalSetStaticEdidData(pSubdevice, pParams) subdeviceCtrlCmdInternalSetStaticEdidData_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalSmbpbiPfmReqHndlrCapUpdate_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalSmbpbiPfmReqHndlrCapUpdate__ #define subdeviceCtrlCmdInternalSmbpbiPfmReqHndlrCapUpdate(pSubdevice, pParams) subdeviceCtrlCmdInternalSmbpbiPfmReqHndlrCapUpdate_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPmgrPfmReqHndlrStateLoadSync_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPmgrPfmReqHndlrStateLoadSync__ #define subdeviceCtrlCmdInternalPmgrPfmReqHndlrStateLoadSync(pSubdevice, pParams) subdeviceCtrlCmdInternalPmgrPfmReqHndlrStateLoadSync_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalThermPfmReqHndlrStateInitSync_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalThermPfmReqHndlrStateInitSync__ #define subdeviceCtrlCmdInternalThermPfmReqHndlrStateInitSync(pSubdevice, pParams) subdeviceCtrlCmdInternalThermPfmReqHndlrStateInitSync_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPerfPfmReqHndlrGetPm1State_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPerfPfmReqHndlrGetPm1State__ #define subdeviceCtrlCmdInternalPerfPfmReqHndlrGetPm1State(pSubdevice, pParams) subdeviceCtrlCmdInternalPerfPfmReqHndlrGetPm1State_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPerfPfmReqHndlrSetPm1State_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPerfPfmReqHndlrSetPm1State__ #define subdeviceCtrlCmdInternalPerfPfmReqHndlrSetPm1State(pSubdevice, pParams) subdeviceCtrlCmdInternalPerfPfmReqHndlrSetPm1State_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPmgrPfmReqHndlrUpdateEdppLimit_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPmgrPfmReqHndlrUpdateEdppLimit__ #define subdeviceCtrlCmdInternalPmgrPfmReqHndlrUpdateEdppLimit(pSubdevice, pParams) subdeviceCtrlCmdInternalPmgrPfmReqHndlrUpdateEdppLimit_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPmgrPfmReqHndlrGetEdppLimitInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPmgrPfmReqHndlrGetEdppLimitInfo__ #define subdeviceCtrlCmdInternalPmgrPfmReqHndlrGetEdppLimitInfo(pSubdevice, pParams) subdeviceCtrlCmdInternalPmgrPfmReqHndlrGetEdppLimitInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalThermPfmReqHndlrUpdateTgpuLimit_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalThermPfmReqHndlrUpdateTgpuLimit__ #define subdeviceCtrlCmdInternalThermPfmReqHndlrUpdateTgpuLimit(pSubdevice, pParams) subdeviceCtrlCmdInternalThermPfmReqHndlrUpdateTgpuLimit_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTgpMode_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTgpMode__ #define subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTgpMode(pSubdevice, pParams) subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTgpMode_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTurboV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTurboV2__ #define subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTurboV2(pSubdevice, pParams) subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTurboV2_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateInfo__ #define subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateInfo(pSubdevice, pParams) subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateMapping_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateMapping__ #define subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateMapping(pSubdevice, pParams) subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateMapping_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPerfPfmReqHndlrSetVpstate_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPerfPfmReqHndlrSetVpstate__ #define subdeviceCtrlCmdInternalPerfPfmReqHndlrSetVpstate(pSubdevice, pParams) subdeviceCtrlCmdInternalPerfPfmReqHndlrSetVpstate_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalPmgrUnsetDynamicBoostLimit_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPmgrUnsetDynamicBoostLimit__ #define subdeviceCtrlCmdInternalPmgrUnsetDynamicBoostLimit(pSubdevice) subdeviceCtrlCmdInternalPmgrUnsetDynamicBoostLimit_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdInternalDetectHsVideoBridge_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalDetectHsVideoBridge__ #define subdeviceCtrlCmdInternalDetectHsVideoBridge(pSubdevice) subdeviceCtrlCmdInternalDetectHsVideoBridge_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdInternalConfComputeGetStaticInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalConfComputeGetStaticInfo__ #define subdeviceCtrlCmdInternalConfComputeGetStaticInfo(pSubdevice, pParams) subdeviceCtrlCmdInternalConfComputeGetStaticInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalConfComputeDeriveSwlKeys_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalConfComputeDeriveSwlKeys__ #define subdeviceCtrlCmdInternalConfComputeDeriveSwlKeys(pSubdevice, pParams) subdeviceCtrlCmdInternalConfComputeDeriveSwlKeys_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalConfComputeDeriveLceKeys_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalConfComputeDeriveLceKeys__ #define subdeviceCtrlCmdInternalConfComputeDeriveLceKeys(pSubdevice, pParams) subdeviceCtrlCmdInternalConfComputeDeriveLceKeys_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalConfComputeRotateKeys_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalConfComputeRotateKeys__ #define subdeviceCtrlCmdInternalConfComputeRotateKeys(pSubdevice, pParams) subdeviceCtrlCmdInternalConfComputeRotateKeys_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalConfComputeRCChannelsForKeyRotation_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalConfComputeRCChannelsForKeyRotation__ #define subdeviceCtrlCmdInternalConfComputeRCChannelsForKeyRotation(pSubdevice, pParams) subdeviceCtrlCmdInternalConfComputeRCChannelsForKeyRotation_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalConfComputeSetGpuState_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalConfComputeSetGpuState__ #define subdeviceCtrlCmdInternalConfComputeSetGpuState(pSubdevice, pParams) subdeviceCtrlCmdInternalConfComputeSetGpuState_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalConfComputeSetSecurityPolicy_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalConfComputeSetSecurityPolicy__ #define subdeviceCtrlCmdInternalConfComputeSetSecurityPolicy(pSubdevice, pParams) subdeviceCtrlCmdInternalConfComputeSetSecurityPolicy_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalInitUserSharedData_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalInitUserSharedData__ #define subdeviceCtrlCmdInternalInitUserSharedData(pSubdevice, pParams) subdeviceCtrlCmdInternalInitUserSharedData_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalUserSharedDataSetDataPoll_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalUserSharedDataSetDataPoll__ #define subdeviceCtrlCmdInternalUserSharedDataSetDataPoll(pSubdevice, pParams) subdeviceCtrlCmdInternalUserSharedDataSetDataPoll_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalGspStartTrace_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGspStartTrace__ #define subdeviceCtrlCmdInternalGspStartTrace(pSubdevice, pParams) subdeviceCtrlCmdInternalGspStartTrace_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter__ +#define subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter(pSubdevice, pParams) subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdVgpuMgrInternalBootloadGspVgpuPluginTask_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalBootloadGspVgpuPluginTask__ #define subdeviceCtrlCmdVgpuMgrInternalBootloadGspVgpuPluginTask(pSubdevice, pParams) subdeviceCtrlCmdVgpuMgrInternalBootloadGspVgpuPluginTask_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdVgpuMgrInternalShutdownGspVgpuPluginTask_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalShutdownGspVgpuPluginTask__ #define subdeviceCtrlCmdVgpuMgrInternalShutdownGspVgpuPluginTask(pSubdevice, pParams) subdeviceCtrlCmdVgpuMgrInternalShutdownGspVgpuPluginTask_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdVgpuMgrInternalPgpuAddVgpuType_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalPgpuAddVgpuType__ #define subdeviceCtrlCmdVgpuMgrInternalPgpuAddVgpuType(pSubdevice, pParams) subdeviceCtrlCmdVgpuMgrInternalPgpuAddVgpuType_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdVgpuMgrInternalEnumerateVgpuPerPgpu_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalEnumerateVgpuPerPgpu__ #define subdeviceCtrlCmdVgpuMgrInternalEnumerateVgpuPerPgpu(pSubdevice, pParams) subdeviceCtrlCmdVgpuMgrInternalEnumerateVgpuPerPgpu_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdVgpuMgrInternalClearGuestVmInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalClearGuestVmInfo__ #define subdeviceCtrlCmdVgpuMgrInternalClearGuestVmInfo(pSubdevice, pParams) subdeviceCtrlCmdVgpuMgrInternalClearGuestVmInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdVgpuMgrInternalGetVgpuFbUsage_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalGetVgpuFbUsage__ #define subdeviceCtrlCmdVgpuMgrInternalGetVgpuFbUsage(pSubdevice, pParams) subdeviceCtrlCmdVgpuMgrInternalGetVgpuFbUsage_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity__ #define subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity(pSubdevice, pParams) subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdVgpuMgrInternalCleanupGspVgpuPluginResources_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalCleanupGspVgpuPluginResources__ #define subdeviceCtrlCmdVgpuMgrInternalCleanupGspVgpuPluginResources(pSubdevice, pParams) subdeviceCtrlCmdVgpuMgrInternalCleanupGspVgpuPluginResources_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdVgpuMgrInternalGetPgpuFsEncoding_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalGetPgpuFsEncoding__ #define subdeviceCtrlCmdVgpuMgrInternalGetPgpuFsEncoding(pSubdevice, pParams) subdeviceCtrlCmdVgpuMgrInternalGetPgpuFsEncoding_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdVgpuMgrInternalGetPgpuMigrationSupport_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalGetPgpuMigrationSupport__ #define subdeviceCtrlCmdVgpuMgrInternalGetPgpuMigrationSupport(pSubdevice, pParams) subdeviceCtrlCmdVgpuMgrInternalGetPgpuMigrationSupport_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig__ #define subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig(pSubdevice, pParams) subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdVgpuMgrInternalFreeStates_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalFreeStates__ #define subdeviceCtrlCmdVgpuMgrInternalFreeStates(pSubdevice, pParams) subdeviceCtrlCmdVgpuMgrInternalFreeStates_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGetAvailableHshubMask_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGetAvailableHshubMask__ #define subdeviceCtrlCmdGetAvailableHshubMask(pSubdevice, pParams) subdeviceCtrlCmdGetAvailableHshubMask_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlSetEcThrottleMode_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlSetEcThrottleMode__ #define subdeviceCtrlSetEcThrottleMode(pSubdevice, pParams) subdeviceCtrlSetEcThrottleMode_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdCcuMap_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdCcuMap__ #define subdeviceCtrlCmdCcuMap(pSubdevice, pParams) subdeviceCtrlCmdCcuMap_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdCcuUnmap_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdCcuUnmap__ #define subdeviceCtrlCmdCcuUnmap(pSubdevice, pParams) subdeviceCtrlCmdCcuUnmap_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdCcuSetStreamState_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdCcuSetStreamState__ #define subdeviceCtrlCmdCcuSetStreamState(pSubdevice, pParams) subdeviceCtrlCmdCcuSetStreamState_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdCcuGetSampleInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdCcuGetSampleInfo__ +#define subdeviceCtrlCmdCcuGetSampleInfo(pSubdevice, pParams) subdeviceCtrlCmdCcuGetSampleInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdSpdmPartition_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdSpdmPartition__ #define subdeviceCtrlCmdSpdmPartition(pSubdevice, pSpdmPartitionParams) subdeviceCtrlCmdSpdmPartition_DISPATCH(pSubdevice, pSpdmPartitionParams) +#define subdeviceControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define subdeviceControl(pGpuResource, pCallContext, pParams) subdeviceControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define subdeviceMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define subdeviceMap(pGpuResource, pCallContext, pParams, pCpuMapping) subdeviceMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define subdeviceUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define subdeviceUnmap(pGpuResource, pCallContext, pCpuMapping) subdeviceUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define subdeviceShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define subdeviceShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) subdeviceShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define subdeviceCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) subdeviceCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define subdeviceGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) subdeviceGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -#define subdeviceMapTo(pResource, pParams) subdeviceMapTo_DISPATCH(pResource, pParams) -#define subdeviceGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) subdeviceGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define subdeviceSetNotificationShare(pNotifier, pNotifShare) subdeviceSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define subdeviceGetRefCount(pResource) subdeviceGetRefCount_DISPATCH(pResource) -#define subdeviceAddAdditionalDependants(pClient, pResource, pReference) subdeviceAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define subdeviceControl_Prologue(pResource, pCallContext, pParams) subdeviceControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define subdeviceGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define subdeviceGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) subdeviceGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define subdeviceUnmapFrom(pResource, pParams) subdeviceUnmapFrom_DISPATCH(pResource, pParams) -#define subdeviceControl_Epilogue(pResource, pCallContext, pParams) subdeviceControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define subdeviceGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define subdeviceGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) subdeviceGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define subdeviceGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define subdeviceGetInternalObjectHandle(pGpuResource) subdeviceGetInternalObjectHandle_DISPATCH(pGpuResource) -#define subdeviceControl(pGpuResource, pCallContext, pParams) subdeviceControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define subdeviceUnmap(pGpuResource, pCallContext, pCpuMapping) subdeviceUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define subdeviceAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define subdeviceAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) subdeviceAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define subdeviceGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define subdeviceGetMemInterMapParams(pRmResource, pParams) subdeviceGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define subdeviceCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define subdeviceCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) subdeviceCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define subdeviceGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define subdeviceGetMemoryMappingDescriptor(pRmResource, ppMemDesc) subdeviceGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define subdeviceUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) subdeviceUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define subdeviceControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define subdeviceControlSerialization_Prologue(pResource, pCallContext, pParams) subdeviceControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define subdeviceControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define subdeviceControlSerialization_Epilogue(pResource, pCallContext, pParams) subdeviceControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define subdeviceControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define subdeviceControl_Prologue(pResource, pCallContext, pParams) subdeviceControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define subdeviceControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define subdeviceControl_Epilogue(pResource, pCallContext, pParams) subdeviceControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define subdeviceCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define subdeviceCanCopy(pResource) subdeviceCanCopy_DISPATCH(pResource) -#define subdeviceIsPartialUnmapSupported(pResource) subdeviceIsPartialUnmapSupported_DISPATCH(pResource) +#define subdeviceIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define subdeviceIsDuplicate(pResource, hMemory, pDuplicate) subdeviceIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define subdeviceControlSerialization_Epilogue(pResource, pCallContext, pParams) subdeviceControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define subdeviceIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define subdeviceIsPartialUnmapSupported(pResource) subdeviceIsPartialUnmapSupported_DISPATCH(pResource) +#define subdeviceMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define subdeviceMapTo(pResource, pParams) subdeviceMapTo_DISPATCH(pResource, pParams) +#define subdeviceUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define subdeviceUnmapFrom(pResource, pParams) subdeviceUnmapFrom_DISPATCH(pResource, pParams) +#define subdeviceGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define subdeviceGetRefCount(pResource) subdeviceGetRefCount_DISPATCH(pResource) +#define subdeviceAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define subdeviceAddAdditionalDependants(pClient, pResource, pReference) subdeviceAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define subdeviceGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define subdeviceGetNotificationListPtr(pNotifier) subdeviceGetNotificationListPtr_DISPATCH(pNotifier) +#define subdeviceGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ #define subdeviceGetNotificationShare(pNotifier) subdeviceGetNotificationShare_DISPATCH(pNotifier) -#define subdeviceMap(pGpuResource, pCallContext, pParams, pCpuMapping) subdeviceMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define subdeviceAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) subdeviceAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -void subdevicePreDestruct_IMPL(struct Subdevice *pResource); +#define subdeviceSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define subdeviceSetNotificationShare(pNotifier, pNotifShare) subdeviceSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define subdeviceUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define subdeviceUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) subdeviceUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define subdeviceGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define subdeviceGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) subdeviceGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) +// Dispatch functions static inline void subdevicePreDestruct_DISPATCH(struct Subdevice *pResource) { pResource->__subdevicePreDestruct__(pResource); } -NV_STATUS subdeviceInternalControlForward_IMPL(struct Subdevice *pSubdevice, NvU32 command, void *pParams, NvU32 size); - static inline NV_STATUS subdeviceInternalControlForward_DISPATCH(struct Subdevice *pSubdevice, NvU32 command, void *pParams, NvU32 size) { return pSubdevice->__subdeviceInternalControlForward__(pSubdevice, command, pParams, size); } -NV_STATUS subdeviceControlFilter_IMPL(struct Subdevice *pSubdevice, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); - static inline NV_STATUS subdeviceControlFilter_DISPATCH(struct Subdevice *pSubdevice, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pSubdevice->__subdeviceControlFilter__(pSubdevice, pCallContext, pParams); } -static inline NV_STATUS subdeviceCtrlCmdBiosGetInfoV2_ac1694(struct Subdevice *pSubdevice, NV2080_CTRL_BIOS_GET_INFO_V2_PARAMS *pBiosInfoParams) { - return NV_OK; -} - -static inline NV_STATUS subdeviceCtrlCmdBiosGetInfoV2_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_BIOS_GET_INFO_V2_PARAMS *pBiosInfoParams) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS subdeviceCtrlCmdBiosGetInfoV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BIOS_GET_INFO_V2_PARAMS *pBiosInfoParams) { return pSubdevice->__subdeviceCtrlCmdBiosGetInfoV2__(pSubdevice, pBiosInfoParams); } -NV_STATUS subdeviceCtrlCmdBiosGetNbsiV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BIOS_GET_NBSI_V2_PARAMS *pNbsiParams); - static inline NV_STATUS subdeviceCtrlCmdBiosGetNbsiV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BIOS_GET_NBSI_V2_PARAMS *pNbsiParams) { return pSubdevice->__subdeviceCtrlCmdBiosGetNbsiV2__(pSubdevice, pNbsiParams); } -NV_STATUS subdeviceCtrlCmdBiosGetSKUInfo_VF(struct Subdevice *pSubdevice, NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS *pBiosGetSKUInfoParams); - -static inline NV_STATUS subdeviceCtrlCmdBiosGetSKUInfo_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS *pBiosGetSKUInfoParams) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS subdeviceCtrlCmdBiosGetSKUInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS *pBiosGetSKUInfoParams) { return pSubdevice->__subdeviceCtrlCmdBiosGetSKUInfo__(pSubdevice, pBiosGetSKUInfoParams); } -NV_STATUS subdeviceCtrlCmdBiosGetPostTime_VF(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BIOS_GET_POST_TIME_PARAMS *pBiosPostTime); - -static inline NV_STATUS subdeviceCtrlCmdBiosGetPostTime_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BIOS_GET_POST_TIME_PARAMS *pBiosPostTime) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS subdeviceCtrlCmdBiosGetPostTime_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BIOS_GET_POST_TIME_PARAMS *pBiosPostTime) { return pSubdevice->__subdeviceCtrlCmdBiosGetPostTime__(pSubdevice, pBiosPostTime); } -NV_STATUS subdeviceCtrlCmdBiosGetUefiSupport_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BIOS_GET_UEFI_SUPPORT_PARAMS *pUEFIParams); - static inline NV_STATUS subdeviceCtrlCmdBiosGetUefiSupport_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BIOS_GET_UEFI_SUPPORT_PARAMS *pUEFIParams) { return pSubdevice->__subdeviceCtrlCmdBiosGetUefiSupport__(pSubdevice, pUEFIParams); } -NV_STATUS subdeviceCtrlCmdMcGetArchInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_GET_ARCH_INFO_PARAMS *pArchInfoParams); - static inline NV_STATUS subdeviceCtrlCmdMcGetArchInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_MC_GET_ARCH_INFO_PARAMS *pArchInfoParams) { return pSubdevice->__subdeviceCtrlCmdMcGetArchInfo__(pSubdevice, pArchInfoParams); } -NV_STATUS subdeviceCtrlCmdMcGetManufacturer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_GET_MANUFACTURER_PARAMS *pManufacturerParams); - static inline NV_STATUS subdeviceCtrlCmdMcGetManufacturer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_MC_GET_MANUFACTURER_PARAMS *pManufacturerParams) { return pSubdevice->__subdeviceCtrlCmdMcGetManufacturer__(pSubdevice, pManufacturerParams); } -NV_STATUS subdeviceCtrlCmdMcQueryHostclkSlowdownStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_QUERY_HOSTCLK_SLOWDOWN_STATUS_PARAMS *pGetStatusParams); - static inline NV_STATUS subdeviceCtrlCmdMcQueryHostclkSlowdownStatus_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_MC_QUERY_HOSTCLK_SLOWDOWN_STATUS_PARAMS *pGetStatusParams) { return pSubdevice->__subdeviceCtrlCmdMcQueryHostclkSlowdownStatus__(pSubdevice, pGetStatusParams); } -NV_STATUS subdeviceCtrlCmdMcSetHostclkSlowdownStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_SET_HOSTCLK_SLOWDOWN_STATUS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdMcSetHostclkSlowdownStatus_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_MC_SET_HOSTCLK_SLOWDOWN_STATUS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdMcSetHostclkSlowdownStatus__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdMcChangeReplayableFaultOwnership_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_CHANGE_REPLAYABLE_FAULT_OWNERSHIP_PARAMS *pReplayableFaultOwnrshpParams); - static inline NV_STATUS subdeviceCtrlCmdMcChangeReplayableFaultOwnership_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_MC_CHANGE_REPLAYABLE_FAULT_OWNERSHIP_PARAMS *pReplayableFaultOwnrshpParams) { return pSubdevice->__subdeviceCtrlCmdMcChangeReplayableFaultOwnership__(pSubdevice, pReplayableFaultOwnrshpParams); } -NV_STATUS subdeviceCtrlCmdMcServiceInterrupts_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_SERVICE_INTERRUPTS_PARAMS *pServiceInterruptParams); - static inline NV_STATUS subdeviceCtrlCmdMcServiceInterrupts_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_MC_SERVICE_INTERRUPTS_PARAMS *pServiceInterruptParams) { return pSubdevice->__subdeviceCtrlCmdMcServiceInterrupts__(pSubdevice, pServiceInterruptParams); } -NV_STATUS subdeviceCtrlCmdMcGetEngineNotificationIntrVectors_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_GET_ENGINE_NOTIFICATION_INTR_VECTORS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdMcGetEngineNotificationIntrVectors_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_MC_GET_ENGINE_NOTIFICATION_INTR_VECTORS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdMcGetEngineNotificationIntrVectors__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdMcGetStaticIntrTable_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdMcGetStaticIntrTable_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdMcGetStaticIntrTable__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdDmaInvalidateTLB_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_DMA_INVALIDATE_TLB_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdDmaInvalidateTLB_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_DMA_INVALIDATE_TLB_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdDmaInvalidateTLB__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdDmaGetInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_DMA_GET_INFO_PARAMS *pDmaInfoParams); - static inline NV_STATUS subdeviceCtrlCmdDmaGetInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_DMA_GET_INFO_PARAMS *pDmaInfoParams) { return pSubdevice->__subdeviceCtrlCmdDmaGetInfo__(pSubdevice, pDmaInfoParams); } -NV_STATUS subdeviceCtrlCmdBusGetPciInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_PCI_INFO_PARAMS *pPciInfoParams); - static inline NV_STATUS subdeviceCtrlCmdBusGetPciInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_PCI_INFO_PARAMS *pPciInfoParams) { return pSubdevice->__subdeviceCtrlCmdBusGetPciInfo__(pSubdevice, pPciInfoParams); } -NV_STATUS subdeviceCtrlCmdBusGetInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_INFO_PARAMS *pBusInfoParams); - -static inline NV_STATUS subdeviceCtrlCmdBusGetInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_INFO_PARAMS *pBusInfoParams) { - return pSubdevice->__subdeviceCtrlCmdBusGetInfo__(pSubdevice, pBusInfoParams); -} - -NV_STATUS subdeviceCtrlCmdBusGetInfoV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_INFO_V2_PARAMS *pBusInfoParams); - static inline NV_STATUS subdeviceCtrlCmdBusGetInfoV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_INFO_V2_PARAMS *pBusInfoParams) { return pSubdevice->__subdeviceCtrlCmdBusGetInfoV2__(pSubdevice, pBusInfoParams); } -NV_STATUS subdeviceCtrlCmdBusGetPciBarInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_PCI_BAR_INFO_PARAMS *pBarInfoParams); - static inline NV_STATUS subdeviceCtrlCmdBusGetPciBarInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_PCI_BAR_INFO_PARAMS *pBarInfoParams) { return pSubdevice->__subdeviceCtrlCmdBusGetPciBarInfo__(pSubdevice, pBarInfoParams); } -NV_STATUS subdeviceCtrlCmdBusSetPcieSpeed_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_SET_PCIE_SPEED_PARAMS *pBusInfoParams); - static inline NV_STATUS subdeviceCtrlCmdBusSetPcieSpeed_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_SET_PCIE_SPEED_PARAMS *pBusInfoParams) { return pSubdevice->__subdeviceCtrlCmdBusSetPcieSpeed__(pSubdevice, pBusInfoParams); } -NV_STATUS subdeviceCtrlCmdBusSetPcieLinkWidth_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_SET_PCIE_LINK_WIDTH_PARAMS *pLinkWidthParams); - static inline NV_STATUS subdeviceCtrlCmdBusSetPcieLinkWidth_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_SET_PCIE_LINK_WIDTH_PARAMS *pLinkWidthParams) { return pSubdevice->__subdeviceCtrlCmdBusSetPcieLinkWidth__(pSubdevice, pLinkWidthParams); } -NV_STATUS subdeviceCtrlCmdBusSetHwbcUpstreamPcieSpeed_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_SET_HWBC_UPSTREAM_PCIE_SPEED_PARAMS *pBusInfoParams); - -static inline NV_STATUS subdeviceCtrlCmdBusSetHwbcUpstreamPcieSpeed_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_SET_HWBC_UPSTREAM_PCIE_SPEED_PARAMS *pBusInfoParams) { - return pSubdevice->__subdeviceCtrlCmdBusSetHwbcUpstreamPcieSpeed__(pSubdevice, pBusInfoParams); -} - -NV_STATUS subdeviceCtrlCmdBusGetHwbcUpstreamPcieSpeed_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_HWBC_UPSTREAM_PCIE_SPEED_PARAMS *pBusInfoParams); - -static inline NV_STATUS subdeviceCtrlCmdBusGetHwbcUpstreamPcieSpeed_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_HWBC_UPSTREAM_PCIE_SPEED_PARAMS *pBusInfoParams) { - return pSubdevice->__subdeviceCtrlCmdBusGetHwbcUpstreamPcieSpeed__(pSubdevice, pBusInfoParams); -} - -NV_STATUS subdeviceCtrlCmdBusHWBCGetUpstreamBAR0_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_HWBC_GET_UPSTREAM_BAR0_PARAMS *pBusInfoParams); - -static inline NV_STATUS subdeviceCtrlCmdBusHWBCGetUpstreamBAR0_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_HWBC_GET_UPSTREAM_BAR0_PARAMS *pBusInfoParams) { - return pSubdevice->__subdeviceCtrlCmdBusHWBCGetUpstreamBAR0__(pSubdevice, pBusInfoParams); -} - -NV_STATUS subdeviceCtrlCmdBusServiceGpuMultifunctionState_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_SERVICE_GPU_MULTIFUNC_STATE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusServiceGpuMultifunctionState_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_SERVICE_GPU_MULTIFUNC_STATE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusServiceGpuMultifunctionState__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusGetPexCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_PEX_COUNTERS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusGetPexCounters_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_PEX_COUNTERS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusGetPexCounters__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusGetBFD_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_BFD_PARAMSARR *pBusGetBFDParams); - static inline NV_STATUS subdeviceCtrlCmdBusGetBFD_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_BFD_PARAMSARR *pBusGetBFDParams) { return pSubdevice->__subdeviceCtrlCmdBusGetBFD__(pSubdevice, pBusGetBFDParams); } -NV_STATUS subdeviceCtrlCmdBusGetAspmDisableFlags_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_ASPM_DISABLE_FLAGS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusGetAspmDisableFlags_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_ASPM_DISABLE_FLAGS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusGetAspmDisableFlags__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusControlPublicAspmBits_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_CONTROL_PUBLIC_ASPM_BITS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusControlPublicAspmBits_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_CONTROL_PUBLIC_ASPM_BITS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusControlPublicAspmBits__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusClearPexCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_CLEAR_PEX_COUNTERS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusClearPexCounters_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_CLEAR_PEX_COUNTERS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusClearPexCounters__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusGetPexUtilCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_PEX_UTIL_COUNTERS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusGetPexUtilCounters_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_PEX_UTIL_COUNTERS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusGetPexUtilCounters__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusClearPexUtilCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_CLEAR_PEX_UTIL_COUNTERS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusClearPexUtilCounters_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_CLEAR_PEX_UTIL_COUNTERS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusClearPexUtilCounters__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusFreezePexCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_FREEZE_PEX_COUNTERS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusFreezePexCounters_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_FREEZE_PEX_COUNTERS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusFreezePexCounters__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusGetPexLaneCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_PEX_LANE_COUNTERS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusGetPexLaneCounters_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_PEX_LANE_COUNTERS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusGetPexLaneCounters__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusGetPcieLtrLatency_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_PCIE_LTR_LATENCY_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusGetPcieLtrLatency_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_PCIE_LTR_LATENCY_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusGetPcieLtrLatency__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusSetPcieLtrLatency_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_SET_PCIE_LTR_LATENCY_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusSetPcieLtrLatency_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_SET_PCIE_LTR_LATENCY_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusSetPcieLtrLatency__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusGetNvlinkPeerIdMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusGetNvlinkPeerIdMask_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusGetNvlinkPeerIdMask__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusSetEomParameters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_SET_EOM_PARAMETERS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusSetEomParameters_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_SET_EOM_PARAMETERS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusSetEomParameters__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusGetUphyDlnCfgSpace_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_UPHY_DLN_CFG_SPACE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusGetUphyDlnCfgSpace_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_UPHY_DLN_CFG_SPACE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusGetUphyDlnCfgSpace__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusGetEomStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_EOM_STATUS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusGetEomStatus_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_EOM_STATUS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusGetEomStatus__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusGetPcieReqAtomicsCaps_VF(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_PCIE_REQ_ATOMICS_CAPS_PARAMS *pParams); - -static inline NV_STATUS subdeviceCtrlCmdBusGetPcieReqAtomicsCaps_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_PCIE_REQ_ATOMICS_CAPS_PARAMS *pParams) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS subdeviceCtrlCmdBusGetPcieReqAtomicsCaps_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_PCIE_REQ_ATOMICS_CAPS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusGetPcieReqAtomicsCaps__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusGetC2CInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_C2C_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusGetC2CInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_C2C_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusGetC2CInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusSysmemAccess_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_SYSMEM_ACCESS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusSysmemAccess_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_SYSMEM_ACCESS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusSysmemAccess__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusSetP2pMapping_VGPUSTUB(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_SET_P2P_MAPPING_PARAMS *pParams); - -static inline NV_STATUS subdeviceCtrlCmdBusSetP2pMapping_5baef9(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_SET_P2P_MAPPING_PARAMS *pParams) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - static inline NV_STATUS subdeviceCtrlCmdBusSetP2pMapping_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_SET_P2P_MAPPING_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusSetP2pMapping__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusUnsetP2pMapping_VGPUSTUB(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_UNSET_P2P_MAPPING_PARAMS *pParams); - -static inline NV_STATUS subdeviceCtrlCmdBusUnsetP2pMapping_5baef9(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_UNSET_P2P_MAPPING_PARAMS *pParams) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - static inline NV_STATUS subdeviceCtrlCmdBusUnsetP2pMapping_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_UNSET_P2P_MAPPING_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusUnsetP2pMapping__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGetNvlinkCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_COUNTERS_PARAMS *pParams); +static inline NV_STATUS subdeviceCtrlCmdGetNvlinkCountersV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_COUNTERS_V2_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdGetNvlinkCountersV2__(pSubdevice, pParams); +} + +static inline NV_STATUS subdeviceCtrlCmdClearNvlinkCountersV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_CLEAR_COUNTERS_V2_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdClearNvlinkCountersV2__(pSubdevice, pParams); +} static inline NV_STATUS subdeviceCtrlCmdGetNvlinkCounters_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_COUNTERS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGetNvlinkCounters__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdClearNvlinkCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_CLEAR_COUNTERS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdClearNvlinkCounters_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_CLEAR_COUNTERS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdClearNvlinkCounters__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusGetNvlinkCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusGetNvlinkCaps_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusGetNvlinkCaps__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusGetNvlinkStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusGetNvlinkStatus_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusGetNvlinkStatus__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBusGetNvlinkErrInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_ERR_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBusGetNvlinkErrInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_ERR_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBusGetNvlinkErrInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinGetLinkFomValues_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_NVLINK_GET_LINK_FOM_VALUES_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinGetLinkFomValues_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_NVLINK_GET_LINK_FOM_VALUES_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinGetLinkFomValues__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkGetNvlinkEccErrors_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_NVLINK_ECC_ERRORS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkGetNvlinkEccErrors_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_NVLINK_ECC_ERRORS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkGetNvlinkEccErrors__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkGetLinkFatalErrorCounts_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_LINK_FATAL_ERROR_COUNTS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkGetLinkFatalErrorCounts_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_LINK_FATAL_ERROR_COUNTS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkGetLinkFatalErrorCounts__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkSetupEom_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_NVLINK_SETUP_EOM_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkSetupEom_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_NVLINK_SETUP_EOM_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkSetupEom__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkGetPowerState_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_POWER_STATE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkGetPowerState_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_POWER_STATE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkGetPowerState__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkReadTpCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_READ_TP_COUNTERS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkReadTpCounters_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_READ_TP_COUNTERS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkReadTpCounters__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkGetLpCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_LP_COUNTERS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkGetLpCounters_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_LP_COUNTERS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkGetLpCounters__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkEnableNvlinkPeer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkEnableNvlinkPeer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkEnableNvlinkPeer__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkCoreCallback_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkCoreCallback_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkCoreCallback__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkGetAliEnabled_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_ALI_ENABLED_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkGetAliEnabled_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_ALI_ENABLED_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkGetAliEnabled__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkSetLoopbackMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkSetLoopbackMode_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkSetLoopbackMode__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkUpdateHshubMux_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkUpdateHshubMux_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkUpdateHshubMux__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkRemoveNvlinkMapping_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_REMOVE_NVLINK_MAPPING_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkRemoveNvlinkMapping_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_REMOVE_NVLINK_MAPPING_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkRemoveNvlinkMapping__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkSaveRestoreHshubState_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SAVE_RESTORE_HSHUB_STATE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkSaveRestoreHshubState_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SAVE_RESTORE_HSHUB_STATE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkSaveRestoreHshubState__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkProgramBufferready_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_PROGRAM_BUFFERREADY_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkProgramBufferready_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_PROGRAM_BUFFERREADY_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkProgramBufferready__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkUpdateCurrentConfig_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_UPDATE_CURRENT_CONFIG_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkUpdateCurrentConfig_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_UPDATE_CURRENT_CONFIG_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkUpdateCurrentConfig__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkUpdatePeerLinkMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_UPDATE_PEER_LINK_MASK_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkUpdatePeerLinkMask_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_UPDATE_PEER_LINK_MASK_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkUpdatePeerLinkMask__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkUpdateLinkConnection_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_UPDATE_LINK_CONNECTION_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkUpdateLinkConnection_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_UPDATE_LINK_CONNECTION_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkUpdateLinkConnection__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkEnableLinksPostTopology_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_ENABLE_LINKS_POST_TOPOLOGY_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkEnableLinksPostTopology_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_ENABLE_LINKS_POST_TOPOLOGY_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkEnableLinksPostTopology__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkPreLinkTrainAli_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_PRE_LINK_TRAIN_ALI_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkPreLinkTrainAli_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_PRE_LINK_TRAIN_ALI_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkPreLinkTrainAli__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkGetRefreshCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_REFRESH_COUNTERS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkGetRefreshCounters_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_REFRESH_COUNTERS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkGetRefreshCounters__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkClearRefreshCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_CLEAR_REFRESH_COUNTERS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkClearRefreshCounters_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_CLEAR_REFRESH_COUNTERS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkClearRefreshCounters__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkGetLinkMaskPostRxDet_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_LINK_MASK_POST_RX_DET_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkGetLinkMaskPostRxDet_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_LINK_MASK_POST_RX_DET_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkGetLinkMaskPostRxDet__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkLinkTrainAli_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_LINK_TRAIN_ALI_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkLinkTrainAli_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_LINK_TRAIN_ALI_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkLinkTrainAli__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkGetNvlinkDeviceInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_NVLINK_DEVICE_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkGetNvlinkDeviceInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_NVLINK_DEVICE_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkGetNvlinkDeviceInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkGetIoctrlDeviceInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_IOCTRL_DEVICE_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkGetIoctrlDeviceInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_IOCTRL_DEVICE_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkGetIoctrlDeviceInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkProgramLinkSpeed_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_PROGRAM_LINK_SPEED_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkProgramLinkSpeed_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_PROGRAM_LINK_SPEED_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkProgramLinkSpeed__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkAreLinksTrained_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_ARE_LINKS_TRAINED_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkAreLinksTrained_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_ARE_LINKS_TRAINED_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkAreLinksTrained__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkResetLinks_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_RESET_LINKS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkResetLinks_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_RESET_LINKS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkResetLinks__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkDisableDlInterrupts_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_DISABLE_DL_INTERRUPTS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkDisableDlInterrupts_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_DISABLE_DL_INTERRUPTS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkDisableDlInterrupts__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkGetLinkAndClockInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkGetLinkAndClockInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkGetLinkAndClockInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkSetupNvlinkSysmem_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SETUP_NVLINK_SYSMEM_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkSetupNvlinkSysmem_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SETUP_NVLINK_SYSMEM_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkSetupNvlinkSysmem__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkProcessForcedConfigs_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_PROCESS_FORCED_CONFIGS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkProcessForcedConfigs_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_PROCESS_FORCED_CONFIGS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkProcessForcedConfigs__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkSyncLaneShutdownProps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SYNC_NVLINK_SHUTDOWN_PROPS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkSyncLaneShutdownProps_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SYNC_NVLINK_SHUTDOWN_PROPS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkSyncLaneShutdownProps__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkEnableSysmemNvlinkAts_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_ENABLE_SYSMEM_NVLINK_ATS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkEnableSysmemNvlinkAts_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_ENABLE_SYSMEM_NVLINK_ATS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkEnableSysmemNvlinkAts__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkHshubGetSysmemNvlinkMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_HSHUB_GET_SYSMEM_NVLINK_MASK_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkHshubGetSysmemNvlinkMask_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_HSHUB_GET_SYSMEM_NVLINK_MASK_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkHshubGetSysmemNvlinkMask__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkGetSetNvswitchFlaAddr_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_SET_NVSWITCH_FLA_ADDR_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkGetSetNvswitchFlaAddr_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_SET_NVSWITCH_FLA_ADDR_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkGetSetNvswitchFlaAddr__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkSyncLinkMasksAndVbiosInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SYNC_LINK_MASKS_AND_VBIOS_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkSyncLinkMasksAndVbiosInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SYNC_LINK_MASKS_AND_VBIOS_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkSyncLinkMasksAndVbiosInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkEnableLinks_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdNvlinkEnableLinks_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdNvlinkEnableLinks__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdNvlinkProcessInitDisabledLinks_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_PROCESS_INIT_DISABLED_LINKS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkProcessInitDisabledLinks_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_PROCESS_INIT_DISABLED_LINKS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkProcessInitDisabledLinks__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkInbandSendData_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_INBAND_SEND_DATA_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkInbandSendData_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_INBAND_SEND_DATA_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkInbandSendData__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkPostFaultUp_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_POST_FAULT_UP_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkPostFaultUp_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_POST_FAULT_UP_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkPostFaultUp__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkEomControl_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_EOM_CONTROL_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkEomControl_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_EOM_CONTROL_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkEomControl__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkSetL1Threshold_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SET_L1_THRESHOLD_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkSetL1Threshold_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SET_L1_THRESHOLD_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkSetL1Threshold__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkDirectConnectCheck_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_DIRECT_CONNECT_CHECK_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkDirectConnectCheck_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_DIRECT_CONNECT_CHECK_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkDirectConnectCheck__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkGetL1Threshold_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_L1_THRESHOLD_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkGetL1Threshold_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_L1_THRESHOLD_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkGetL1Threshold__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdIsNvlinkReducedConfig_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_IS_REDUCED_CONFIG_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdIsNvlinkReducedConfig_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_IS_REDUCED_CONFIG_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdIsNvlinkReducedConfig__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvlinkGetPortEvents_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_PORT_EVENTS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdNvlinkGetPortEvents_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_PORT_EVENTS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkGetPortEvents__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdI2cReadBuffer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_I2C_READ_BUFFER_PARAMS *pI2cParams); - static inline NV_STATUS subdeviceCtrlCmdI2cReadBuffer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_I2C_READ_BUFFER_PARAMS *pI2cParams) { return pSubdevice->__subdeviceCtrlCmdI2cReadBuffer__(pSubdevice, pI2cParams); } -NV_STATUS subdeviceCtrlCmdI2cWriteBuffer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_I2C_WRITE_BUFFER_PARAMS *pI2cParams); - static inline NV_STATUS subdeviceCtrlCmdI2cWriteBuffer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_I2C_WRITE_BUFFER_PARAMS *pI2cParams) { return pSubdevice->__subdeviceCtrlCmdI2cWriteBuffer__(pSubdevice, pI2cParams); } -NV_STATUS subdeviceCtrlCmdI2cReadReg_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_I2C_RW_REG_PARAMS *pI2cParams); - static inline NV_STATUS subdeviceCtrlCmdI2cReadReg_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_I2C_RW_REG_PARAMS *pI2cParams) { return pSubdevice->__subdeviceCtrlCmdI2cReadReg__(pSubdevice, pI2cParams); } -NV_STATUS subdeviceCtrlCmdI2cWriteReg_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_I2C_RW_REG_PARAMS *pI2cParams); - static inline NV_STATUS subdeviceCtrlCmdI2cWriteReg_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_I2C_RW_REG_PARAMS *pI2cParams) { return pSubdevice->__subdeviceCtrlCmdI2cWriteReg__(pSubdevice, pI2cParams); } -NV_STATUS subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamples_VF(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_GPUMON_PERFMON_UTIL_SAMPLES_PARAM *pParams); - -static inline NV_STATUS subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamples_5baef9(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_GPUMON_PERFMON_UTIL_SAMPLES_PARAM *pParams) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - -static inline NV_STATUS subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamples_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_GPUMON_PERFMON_UTIL_SAMPLES_PARAM *pParams) { - return pSubdevice->__subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamples__(pSubdevice, pParams); -} - -NV_STATUS subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2_VF(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_GPUMON_PERFMON_UTIL_SAMPLES_V2_PARAMS *pParams); - -static inline NV_STATUS subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2_5baef9(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_GPUMON_PERFMON_UTIL_SAMPLES_V2_PARAMS *pParams) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - static inline NV_STATUS subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_GPUMON_PERFMON_UTIL_SAMPLES_V2_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdPerfRatedTdpGetControl_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_RATED_TDP_CONTROL_PARAMS *pControlParams); - static inline NV_STATUS subdeviceCtrlCmdPerfRatedTdpGetControl_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_RATED_TDP_CONTROL_PARAMS *pControlParams) { return pSubdevice->__subdeviceCtrlCmdPerfRatedTdpGetControl__(pSubdevice, pControlParams); } -NV_STATUS subdeviceCtrlCmdPerfRatedTdpSetControl_KERNEL(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_RATED_TDP_CONTROL_PARAMS *pControlParams); - static inline NV_STATUS subdeviceCtrlCmdPerfRatedTdpSetControl_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_RATED_TDP_CONTROL_PARAMS *pControlParams) { return pSubdevice->__subdeviceCtrlCmdPerfRatedTdpSetControl__(pSubdevice, pControlParams); } -NV_STATUS subdeviceCtrlCmdPerfReservePerfmonHw_KERNEL(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_RESERVE_PERFMON_HW_PARAMS *pPerfmonParams); - -static inline NV_STATUS subdeviceCtrlCmdPerfReservePerfmonHw_46f6a7(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_RESERVE_PERFMON_HW_PARAMS *pPerfmonParams) { - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS subdeviceCtrlCmdPerfReservePerfmonHw_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_RESERVE_PERFMON_HW_PARAMS *pPerfmonParams) { return pSubdevice->__subdeviceCtrlCmdPerfReservePerfmonHw__(pSubdevice, pPerfmonParams); } -NV_STATUS subdeviceCtrlCmdPerfSetAuxPowerState_KERNEL(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_SET_AUX_POWER_STATE_PARAMS *pPowerStateParams); - static inline NV_STATUS subdeviceCtrlCmdPerfSetAuxPowerState_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_SET_AUX_POWER_STATE_PARAMS *pPowerStateParams) { return pSubdevice->__subdeviceCtrlCmdPerfSetAuxPowerState__(pSubdevice, pPowerStateParams); } -NV_STATUS subdeviceCtrlCmdPerfSetPowerstate_KERNEL(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_SET_POWERSTATE_PARAMS *pPowerInfoParams); - static inline NV_STATUS subdeviceCtrlCmdPerfSetPowerstate_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_SET_POWERSTATE_PARAMS *pPowerInfoParams) { return pSubdevice->__subdeviceCtrlCmdPerfSetPowerstate__(pSubdevice, pPowerInfoParams); } -NV_STATUS subdeviceCtrlCmdPerfGetLevelInfo_V2_VF(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_LEVEL_INFO_V2_PARAMS *pLevelInfoParams); - -static inline NV_STATUS subdeviceCtrlCmdPerfGetLevelInfo_V2_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_LEVEL_INFO_V2_PARAMS *pLevelInfoParams) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS subdeviceCtrlCmdPerfGetLevelInfo_V2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_LEVEL_INFO_V2_PARAMS *pLevelInfoParams) { return pSubdevice->__subdeviceCtrlCmdPerfGetLevelInfo_V2__(pSubdevice, pLevelInfoParams); } -NV_STATUS subdeviceCtrlCmdPerfGetCurrentPstate_VF(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_CURRENT_PSTATE_PARAMS *pInfoParams); - -static inline NV_STATUS subdeviceCtrlCmdPerfGetCurrentPstate_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_CURRENT_PSTATE_PARAMS *pInfoParams) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS subdeviceCtrlCmdPerfGetCurrentPstate_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_CURRENT_PSTATE_PARAMS *pInfoParams) { return pSubdevice->__subdeviceCtrlCmdPerfGetCurrentPstate__(pSubdevice, pInfoParams); } -NV_STATUS subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample_VF(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_VID_ENG_PERFMON_SAMPLE_PARAMS *pSampleParams); - -static inline NV_STATUS subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_VID_ENG_PERFMON_SAMPLE_PARAMS *pSampleParams) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_VID_ENG_PERFMON_SAMPLE_PARAMS *pSampleParams) { return pSubdevice->__subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample__(pSubdevice, pSampleParams); } -NV_STATUS subdeviceCtrlCmdPerfGetPowerstate_VF(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_POWERSTATE_PARAMS *powerInfoParams); - -static inline NV_STATUS subdeviceCtrlCmdPerfGetPowerstate_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_POWERSTATE_PARAMS *powerInfoParams) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS subdeviceCtrlCmdPerfGetPowerstate_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_POWERSTATE_PARAMS *powerInfoParams) { return pSubdevice->__subdeviceCtrlCmdPerfGetPowerstate__(pSubdevice, powerInfoParams); } -static inline NV_STATUS subdeviceCtrlCmdPerfNotifyVideoevent_ac1694(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_NOTIFY_VIDEOEVENT_PARAMS *pVideoEventParams) { - return NV_OK; -} - -static inline NV_STATUS subdeviceCtrlCmdPerfNotifyVideoevent_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_NOTIFY_VIDEOEVENT_PARAMS *pVideoEventParams) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS subdeviceCtrlCmdPerfNotifyVideoevent_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_NOTIFY_VIDEOEVENT_PARAMS *pVideoEventParams) { return pSubdevice->__subdeviceCtrlCmdPerfNotifyVideoevent__(pSubdevice, pVideoEventParams); } -NV_STATUS subdeviceCtrlCmdKPerfBoost_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_BOOST_PARAMS *pBoostParams); - static inline NV_STATUS subdeviceCtrlCmdKPerfBoost_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_BOOST_PARAMS *pBoostParams) { return pSubdevice->__subdeviceCtrlCmdKPerfBoost__(pSubdevice, pBoostParams); } -NV_STATUS subdeviceCtrlCmdFbGetFBRegionInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_PARAMS *pGFBRIParams); - static inline NV_STATUS subdeviceCtrlCmdFbGetFBRegionInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_PARAMS *pGFBRIParams) { return pSubdevice->__subdeviceCtrlCmdFbGetFBRegionInfo__(pSubdevice, pGFBRIParams); } -NV_STATUS subdeviceCtrlCmdFbGetBar1Offset_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_BAR1_OFFSET_PARAMS *pFbMemParams); - static inline NV_STATUS subdeviceCtrlCmdFbGetBar1Offset_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_BAR1_OFFSET_PARAMS *pFbMemParams) { return pSubdevice->__subdeviceCtrlCmdFbGetBar1Offset__(pSubdevice, pFbMemParams); } -NV_STATUS subdeviceCtrlCmdFbIsKind_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_IS_KIND_PARAMS *pIsKindParams); - static inline NV_STATUS subdeviceCtrlCmdFbIsKind_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_IS_KIND_PARAMS *pIsKindParams) { return pSubdevice->__subdeviceCtrlCmdFbIsKind__(pSubdevice, pIsKindParams); } -NV_STATUS subdeviceCtrlCmdFbGetMemAlignment_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_MEM_ALIGNMENT_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFbGetMemAlignment_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_MEM_ALIGNMENT_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFbGetMemAlignment__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFbGetHeapReservationSize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FB_GET_HEAP_RESERVATION_SIZE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFbGetHeapReservationSize_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FB_GET_HEAP_RESERVATION_SIZE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFbGetHeapReservationSize__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalMemmgrGetVgpuHostRmReservedFb_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMMGR_GET_VGPU_CONFIG_HOST_RESERVED_FB_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalMemmgrGetVgpuHostRmReservedFb_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMMGR_GET_VGPU_CONFIG_HOST_RESERVED_FB_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalMemmgrGetVgpuHostRmReservedFb__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGbGetSemaphoreSurfaceLayout_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_SEMAPHORE_SURFACE_LAYOUT_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGbGetSemaphoreSurfaceLayout_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_SEMAPHORE_SURFACE_LAYOUT_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGbGetSemaphoreSurfaceLayout__(pSubdevice, pParams); } -static inline NV_STATUS subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp_46f6a7(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMMGR_MEMORY_TRANSFER_WITH_GSP_PARAMS *pParams) { - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMMGR_MEMORY_TRANSFER_WITH_GSP_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFbGetInfoV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_INFO_V2_PARAMS *pFbInfoParams); - static inline NV_STATUS subdeviceCtrlCmdFbGetInfoV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_INFO_V2_PARAMS *pFbInfoParams) { return pSubdevice->__subdeviceCtrlCmdFbGetInfoV2__(pSubdevice, pFbInfoParams); } -NV_STATUS subdeviceCtrlCmdFbGetCarveoutAddressInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_SYSTEM_CARVEOUT_ADDRESS_SPACE_INFO *pParams); - static inline NV_STATUS subdeviceCtrlCmdFbGetCarveoutAddressInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_SYSTEM_CARVEOUT_ADDRESS_SPACE_INFO *pParams) { return pSubdevice->__subdeviceCtrlCmdFbGetCarveoutAddressInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFbGetCalibrationLockFailed_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_CALIBRATION_LOCK_FAILED_PARAMS *pGCLFParams); - static inline NV_STATUS subdeviceCtrlCmdFbGetCalibrationLockFailed_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_CALIBRATION_LOCK_FAILED_PARAMS *pGCLFParams) { return pSubdevice->__subdeviceCtrlCmdFbGetCalibrationLockFailed__(pSubdevice, pGCLFParams); } -NV_STATUS subdeviceCtrlCmdFbFlushGpuCache_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_FLUSH_GPU_CACHE_PARAMS *pCacheFlushParams); - static inline NV_STATUS subdeviceCtrlCmdFbFlushGpuCache_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_FLUSH_GPU_CACHE_PARAMS *pCacheFlushParams) { return pSubdevice->__subdeviceCtrlCmdFbFlushGpuCache__(pSubdevice, pCacheFlushParams); } -NV_STATUS subdeviceCtrlCmdFbSetGpuCacheAllocPolicy_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFbSetGpuCacheAllocPolicy_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFbSetGpuCacheAllocPolicy__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFbGetGpuCacheAllocPolicy_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS *pGpuCacheAllocPolicyParams); - static inline NV_STATUS subdeviceCtrlCmdFbGetGpuCacheAllocPolicy_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS *pGpuCacheAllocPolicyParams) { return pSubdevice->__subdeviceCtrlCmdFbGetGpuCacheAllocPolicy__(pSubdevice, pGpuCacheAllocPolicyParams); } -NV_STATUS subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFbGetGpuCacheInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_GPU_CACHE_INFO_PARAMS *pGpuCacheParams); - static inline NV_STATUS subdeviceCtrlCmdFbGetGpuCacheInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_GPU_CACHE_INFO_PARAMS *pGpuCacheParams) { return pSubdevice->__subdeviceCtrlCmdFbGetGpuCacheInfo__(pSubdevice, pGpuCacheParams); } -NV_STATUS subdeviceCtrlCmdFbGetCliManagedOfflinedPages_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_CLI_MANAGED_OFFLINED_PAGES_PARAMS *pOsOfflinedParams); - static inline NV_STATUS subdeviceCtrlCmdFbGetCliManagedOfflinedPages_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_CLI_MANAGED_OFFLINED_PAGES_PARAMS *pOsOfflinedParams) { return pSubdevice->__subdeviceCtrlCmdFbGetCliManagedOfflinedPages__(pSubdevice, pOsOfflinedParams); } -NV_STATUS subdeviceCtrlCmdFbGetOfflinedPages_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_OFFLINED_PAGES_PARAMS *pBlackListParams); - static inline NV_STATUS subdeviceCtrlCmdFbGetOfflinedPages_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_OFFLINED_PAGES_PARAMS *pBlackListParams) { return pSubdevice->__subdeviceCtrlCmdFbGetOfflinedPages__(pSubdevice, pBlackListParams); } -NV_STATUS subdeviceCtrlCmdFbSetupVprRegion_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FB_SETUP_VPR_REGION_PARAMS *pCliReqParams); - static inline NV_STATUS subdeviceCtrlCmdFbSetupVprRegion_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FB_SETUP_VPR_REGION_PARAMS *pCliReqParams) { return pSubdevice->__subdeviceCtrlCmdFbSetupVprRegion__(pSubdevice, pCliReqParams); } -NV_STATUS subdeviceCtrlCmdFbGetLTCInfoForFBP_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_LTC_INFO_FOR_FBP_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFbGetLTCInfoForFBP_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_LTC_INFO_FOR_FBP_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFbGetLTCInfoForFBP__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFbGetCompBitCopyConstructInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FB_GET_COMPBITCOPY_CONSTRUCT_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFbGetCompBitCopyConstructInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FB_GET_COMPBITCOPY_CONSTRUCT_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFbGetCompBitCopyConstructInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFbPatchPbrForMining_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_PATCH_PBR_FOR_MINING_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFbPatchPbrForMining_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_PATCH_PBR_FOR_MINING_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFbPatchPbrForMining__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFbGetRemappedRows_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_REMAPPED_ROWS_PARAMS *pRemappedRowsParams); - static inline NV_STATUS subdeviceCtrlCmdFbGetRemappedRows_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_REMAPPED_ROWS_PARAMS *pRemappedRowsParams) { return pSubdevice->__subdeviceCtrlCmdFbGetRemappedRows__(pSubdevice, pRemappedRowsParams); } -NV_STATUS subdeviceCtrlCmdFbGetFsInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_FS_INFO_PARAMS *pInfoParams); - static inline NV_STATUS subdeviceCtrlCmdFbGetFsInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_FS_INFO_PARAMS *pInfoParams) { return pSubdevice->__subdeviceCtrlCmdFbGetFsInfo__(pSubdevice, pInfoParams); } -NV_STATUS subdeviceCtrlCmdFbGetRowRemapperHistogram_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_ROW_REMAPPER_HISTOGRAM_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFbGetRowRemapperHistogram_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_ROW_REMAPPER_HISTOGRAM_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFbGetRowRemapperHistogram__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFbGetDynamicOfflinedPages_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_DYNAMIC_OFFLINED_PAGES_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFbGetDynamicOfflinedPages_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_DYNAMIC_OFFLINED_PAGES_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFbGetDynamicOfflinedPages__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFbUpdateNumaStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_UPDATE_NUMA_STATUS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFbUpdateNumaStatus_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_UPDATE_NUMA_STATUS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFbUpdateNumaStatus__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFbGetNumaInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_NUMA_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFbGetNumaInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_NUMA_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFbGetNumaInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdMemSysGetStaticConfig_VGPUSTUB(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_GET_STATIC_CONFIG_PARAMS *pParams); - -static inline NV_STATUS subdeviceCtrlCmdMemSysGetStaticConfig_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_GET_STATIC_CONFIG_PARAMS *pParams) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS subdeviceCtrlCmdMemSysGetStaticConfig_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_GET_STATIC_CONFIG_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdMemSysGetStaticConfig__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdMemSysSetPartitionableMem_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_SET_PARTITIONABLE_MEM_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdMemSysSetPartitionableMem_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_SET_PARTITIONABLE_MEM_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdMemSysSetPartitionableMem__(pSubdevice, pParams); } -static inline NV_STATUS subdeviceCtrlCmdKMemSysGetMIGMemoryConfig_133e5e(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_GET_MIG_MEMORY_CONFIG_PARAMS *pParams) { - return subdeviceInternalControlForward(pSubdevice, (545262184), pParams, sizeof (*pParams)); -} - static inline NV_STATUS subdeviceCtrlCmdKMemSysGetMIGMemoryConfig_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_GET_MIG_MEMORY_CONFIG_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKMemSysGetMIGMemoryConfig__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFbSetZbcReferenced_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_SET_ZBC_REFERENCED_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFbSetZbcReferenced_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_SET_ZBC_REFERENCED_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFbSetZbcReferenced__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdMemSysL2InvalidateEvict_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_L2_INVALIDATE_EVICT_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdMemSysL2InvalidateEvict_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_L2_INVALIDATE_EVICT_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdMemSysL2InvalidateEvict__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdMemSysFlushL2AllRamsAndCaches_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdMemSysFlushL2AllRamsAndCaches_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdMemSysFlushL2AllRamsAndCaches__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdMemSysDisableNvlinkPeers_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdMemSysDisableNvlinkPeers_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdMemSysDisableNvlinkPeers__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdMemSysProgramRawCompressionMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_PROGRAM_RAW_COMPRESSION_MODE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdMemSysProgramRawCompressionMode_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_PROGRAM_RAW_COMPRESSION_MODE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdMemSysProgramRawCompressionMode__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdMemSysGetMIGMemoryPartitionTable_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_GET_MIG_MEMORY_PARTITION_TABLE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdMemSysGetMIGMemoryPartitionTable_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_GET_MIG_MEMORY_PARTITION_TABLE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdMemSysGetMIGMemoryPartitionTable__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFbGetCtagsForCbcEviction_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_CTAGS_FOR_CBC_EVICTION_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFbGetCtagsForCbcEviction_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_CTAGS_FOR_CBC_EVICTION_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFbGetCtagsForCbcEviction__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFbCBCOp_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FB_CBC_OP_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFbCBCOp_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FB_CBC_OP_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFbCBCOp__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFbSetRrd_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_SET_RRD_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFbSetRrd_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_SET_RRD_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFbSetRrd__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFbSetReadLimit_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_SET_READ_LIMIT_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFbSetReadLimit_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_SET_READ_LIMIT_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFbSetReadLimit__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFbSetWriteLimit_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_SET_WRITE_LIMIT_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFbSetWriteLimit_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_SET_WRITE_LIMIT_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFbSetWriteLimit__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdSetGpfifo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_SET_GPFIFO_PARAMS *pSetGpFifoParams); +static inline NV_STATUS subdeviceCtrlCmdGmmuCommitTlbInvalidate_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GMMU_COMMIT_TLB_INVALIDATE_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdGmmuCommitTlbInvalidate__(pSubdevice, pParams); +} static inline NV_STATUS subdeviceCtrlCmdSetGpfifo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_SET_GPFIFO_PARAMS *pSetGpFifoParams) { return pSubdevice->__subdeviceCtrlCmdSetGpfifo__(pSubdevice, pSetGpFifoParams); } -NV_STATUS subdeviceCtrlCmdSetOperationalProperties_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_SET_OPERATIONAL_PROPERTIES_PARAMS *pSetOperationalProperties); - static inline NV_STATUS subdeviceCtrlCmdSetOperationalProperties_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_SET_OPERATIONAL_PROPERTIES_PARAMS *pSetOperationalProperties) { return pSubdevice->__subdeviceCtrlCmdSetOperationalProperties__(pSubdevice, pSetOperationalProperties); } -NV_STATUS subdeviceCtrlCmdFifoBindEngines_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_BIND_ENGINES_PARAMS *pBindParams); - static inline NV_STATUS subdeviceCtrlCmdFifoBindEngines_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_BIND_ENGINES_PARAMS *pBindParams) { return pSubdevice->__subdeviceCtrlCmdFifoBindEngines__(pSubdevice, pBindParams); } -NV_STATUS subdeviceCtrlCmdGetPhysicalChannelCount_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_GET_PHYSICAL_CHANNEL_COUNT_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGetPhysicalChannelCount_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_GET_PHYSICAL_CHANNEL_COUNT_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGetPhysicalChannelCount__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFifoGetInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_GET_INFO_PARAMS *pFifoInfoParams); - static inline NV_STATUS subdeviceCtrlCmdFifoGetInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_GET_INFO_PARAMS *pFifoInfoParams) { return pSubdevice->__subdeviceCtrlCmdFifoGetInfo__(pSubdevice, pFifoInfoParams); } -NV_STATUS subdeviceCtrlCmdFifoDisableChannels_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_DISABLE_CHANNELS_PARAMS *pDisableChannelParams); - static inline NV_STATUS subdeviceCtrlCmdFifoDisableChannels_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_DISABLE_CHANNELS_PARAMS *pDisableChannelParams) { return pSubdevice->__subdeviceCtrlCmdFifoDisableChannels__(pSubdevice, pDisableChannelParams); } -NV_STATUS subdeviceCtrlCmdFifoDisableChannelsForKeyRotation_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_DISABLE_CHANNELS_FOR_KEY_ROTATION_PARAMS *pDisableChannelParams); - static inline NV_STATUS subdeviceCtrlCmdFifoDisableChannelsForKeyRotation_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_DISABLE_CHANNELS_FOR_KEY_ROTATION_PARAMS *pDisableChannelParams) { return pSubdevice->__subdeviceCtrlCmdFifoDisableChannelsForKeyRotation__(pSubdevice, pDisableChannelParams); } -NV_STATUS subdeviceCtrlCmdFifoDisableUsermodeChannels_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_DISABLE_USERMODE_CHANNELS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFifoDisableUsermodeChannels_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_DISABLE_USERMODE_CHANNELS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFifoDisableUsermodeChannels__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFifoGetChannelMemInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FIFO_GET_CHANNEL_MEM_INFO_PARAMS *pChannelMemParams); - static inline NV_STATUS subdeviceCtrlCmdFifoGetChannelMemInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FIFO_GET_CHANNEL_MEM_INFO_PARAMS *pChannelMemParams) { return pSubdevice->__subdeviceCtrlCmdFifoGetChannelMemInfo__(pSubdevice, pChannelMemParams); } -NV_STATUS subdeviceCtrlCmdFifoGetUserdLocation_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FIFO_GET_USERD_LOCATION_PARAMS *pUserdLocationParams); - static inline NV_STATUS subdeviceCtrlCmdFifoGetUserdLocation_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FIFO_GET_USERD_LOCATION_PARAMS *pUserdLocationParams) { return pSubdevice->__subdeviceCtrlCmdFifoGetUserdLocation__(pSubdevice, pUserdLocationParams); } -NV_STATUS subdeviceCtrlCmdFifoObjschedSwGetLog_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_OBJSCHED_SW_GET_LOG_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFifoObjschedSwGetLog_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_OBJSCHED_SW_GET_LOG_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFifoObjschedSwGetLog__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFifoObjschedGetState_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_OBJSCHED_GET_STATE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFifoObjschedGetState_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_OBJSCHED_GET_STATE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFifoObjschedGetState__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFifoObjschedSetState_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_OBJSCHED_SET_STATE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFifoObjschedSetState_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_OBJSCHED_SET_STATE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFifoObjschedSetState__(pSubdevice, pParams); } -static inline NV_STATUS subdeviceCtrlCmdFifoObjschedGetCaps_ac1694(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_OBJSCHED_GET_CAPS_PARAMS *pParams) { - return NV_OK; -} - -static inline NV_STATUS subdeviceCtrlCmdFifoObjschedGetCaps_5baef9(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_OBJSCHED_GET_CAPS_PARAMS *pParams) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - static inline NV_STATUS subdeviceCtrlCmdFifoObjschedGetCaps_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_OBJSCHED_GET_CAPS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFifoObjschedGetCaps__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFifoGetDeviceInfoTable_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFifoGetDeviceInfoTable_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFifoGetDeviceInfoTable__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFifoSetupVfZombieSubctxPdb_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_SETUP_VF_ZOMBIE_SUBCTX_PDB_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFifoSetupVfZombieSubctxPdb_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_SETUP_VF_ZOMBIE_SUBCTX_PDB_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFifoSetupVfZombieSubctxPdb__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFifoClearFaultedBit_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FIFO_CLEAR_FAULTED_BIT_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFifoClearFaultedBit_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FIFO_CLEAR_FAULTED_BIT_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFifoClearFaultedBit__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFifoRunlistSetSchedPolicy_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_RUNLIST_SET_SCHED_POLICY_PARAMS *pSchedPolicyParams); - static inline NV_STATUS subdeviceCtrlCmdFifoRunlistSetSchedPolicy_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_RUNLIST_SET_SCHED_POLICY_PARAMS *pSchedPolicyParams) { return pSubdevice->__subdeviceCtrlCmdFifoRunlistSetSchedPolicy__(pSubdevice, pSchedPolicyParams); } -NV_STATUS subdeviceCtrlCmdFifoUpdateChannelInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_UPDATE_CHANNEL_INFO_PARAMS *pChannelInfo); - static inline NV_STATUS subdeviceCtrlCmdFifoUpdateChannelInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_UPDATE_CHANNEL_INFO_PARAMS *pChannelInfo) { return pSubdevice->__subdeviceCtrlCmdFifoUpdateChannelInfo__(pSubdevice, pChannelInfo); } -NV_STATUS subdeviceCtrlCmdInternalFifoPromoteRunlistBuffers_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FIFO_PROMOTE_RUNLIST_BUFFERS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalFifoPromoteRunlistBuffers_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FIFO_PROMOTE_RUNLIST_BUFFERS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalFifoPromoteRunlistBuffers__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalFifoGetNumChannels_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FIFO_GET_NUM_CHANNELS_PARAMS *pNumChannelsParams); - static inline NV_STATUS subdeviceCtrlCmdInternalFifoGetNumChannels_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FIFO_GET_NUM_CHANNELS_PARAMS *pNumChannelsParams) { return pSubdevice->__subdeviceCtrlCmdInternalFifoGetNumChannels__(pSubdevice, pNumChannelsParams); } -NV_STATUS subdeviceCtrlCmdFifoGetAllocatedChannels_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_GET_ALLOCATED_CHANNELS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFifoGetAllocatedChannels_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_GET_ALLOCATED_CHANNELS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFifoGetAllocatedChannels__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalFifoGetNumSecureChannels_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FIFO_GET_NUM_SECURE_CHANNELS_PARAMS *pNumSecureChannelsParams); - static inline NV_STATUS subdeviceCtrlCmdInternalFifoGetNumSecureChannels_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FIFO_GET_NUM_SECURE_CHANNELS_PARAMS *pNumSecureChannelsParams) { return pSubdevice->__subdeviceCtrlCmdInternalFifoGetNumSecureChannels__(pSubdevice, pNumSecureChannelsParams); } -NV_STATUS subdeviceCtrlCmdKGrGetInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_INFO_PARAMS *pParams); +static inline NV_STATUS subdeviceCtrlCmdInternalFifoGetLogicalUprocId_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FIFO_GET_LOGICAL_UPROC_ID_PARAMS *pLogicalUprocIdParams) { + return pSubdevice->__subdeviceCtrlCmdInternalFifoGetLogicalUprocId__(pSubdevice, pLogicalUprocIdParams); +} + +static inline NV_STATUS subdeviceCtrlCmdInternalFifoToggleActiveChannelScheduling_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING_PARAMS *pToggleActiveChannelSchedulingParams) { + return pSubdevice->__subdeviceCtrlCmdInternalFifoToggleActiveChannelScheduling__(pSubdevice, pToggleActiveChannelSchedulingParams); +} static inline NV_STATUS subdeviceCtrlCmdKGrGetInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetInfoV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_INFO_V2_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetInfoV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_INFO_V2_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetInfoV2__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetCapsV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_CAPS_V2_PARAMS *pGrCapsParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetCapsV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_CAPS_V2_PARAMS *pGrCapsParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetCapsV2__(pSubdevice, pGrCapsParams); } -NV_STATUS subdeviceCtrlCmdKGrGetCtxswModes_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_CTXSW_MODES_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetCtxswModes_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_CTXSW_MODES_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetCtxswModes__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrCtxswZcullMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_ZCULL_MODE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrCtxswZcullMode_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_ZCULL_MODE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrCtxswZcullMode__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrCtxswZcullBind_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_ZCULL_BIND_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrCtxswZcullBind_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_ZCULL_BIND_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrCtxswZcullBind__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetZcullInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_ZCULL_INFO_PARAMS *pZcullInfoParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetZcullInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_ZCULL_INFO_PARAMS *pZcullInfoParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetZcullInfo__(pSubdevice, pZcullInfoParams); } -NV_STATUS subdeviceCtrlCmdKGrCtxswPmMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_PM_MODE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrCtxswPmMode_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_PM_MODE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrCtxswPmMode__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrCtxswPmBind_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_PM_BIND_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrCtxswPmBind_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_PM_BIND_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrCtxswPmBind__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrCtxswSetupBind_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_SETUP_BIND_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrCtxswSetupBind_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_SETUP_BIND_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrCtxswSetupBind__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrSetGpcTileMap_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_SET_GPC_TILE_MAP_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrSetGpcTileMap_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_SET_GPC_TILE_MAP_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrSetGpcTileMap__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrCtxswSmpcMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_SMPC_MODE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrCtxswSmpcMode_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_SMPC_MODE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrCtxswSmpcMode__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrPcSamplingMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_PC_SAMPLING_MODE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrPcSamplingMode_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_PC_SAMPLING_MODE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrPcSamplingMode__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetSmToGpcTpcMappings_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_SM_TO_GPC_TPC_MAPPINGS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetSmToGpcTpcMappings_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_SM_TO_GPC_TPC_MAPPINGS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetSmToGpcTpcMappings__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetGlobalSmOrder_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_GLOBAL_SM_ORDER_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetGlobalSmOrder_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_GLOBAL_SM_ORDER_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetGlobalSmOrder__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrSetCtxswPreemptionMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_SET_CTXSW_PREEMPTION_MODE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrSetCtxswPreemptionMode_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_SET_CTXSW_PREEMPTION_MODE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrSetCtxswPreemptionMode__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrCtxswPreemptionBind_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrCtxswPreemptionBind_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrCtxswPreemptionBind__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetROPInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_ROP_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetROPInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_ROP_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetROPInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetCtxswStats_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_CTXSW_STATS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetCtxswStats_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_CTXSW_STATS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetCtxswStats__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetCtxBufferSize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_CTX_BUFFER_SIZE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetCtxBufferSize_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_CTX_BUFFER_SIZE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetCtxBufferSize__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetCtxBufferInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_CTX_BUFFER_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetCtxBufferInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_CTX_BUFFER_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetCtxBufferInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetCtxBufferPtes_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_KGR_GET_CTX_BUFFER_PTES_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetCtxBufferPtes_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_KGR_GET_CTX_BUFFER_PTES_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetCtxBufferPtes__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetCurrentResidentChannel_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_CURRENT_RESIDENT_CHANNEL_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetCurrentResidentChannel_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_CURRENT_RESIDENT_CHANNEL_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetCurrentResidentChannel__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetVatAlarmData_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_VAT_ALARM_DATA_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetVatAlarmData_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_VAT_ALARM_DATA_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetVatAlarmData__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetAttributeBufferSize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_ATTRIBUTE_BUFFER_SIZE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetAttributeBufferSize_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_ATTRIBUTE_BUFFER_SIZE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetAttributeBufferSize__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGfxPoolQuerySize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GFX_POOL_QUERY_SIZE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGfxPoolQuerySize_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GFX_POOL_QUERY_SIZE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGfxPoolQuerySize__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGfxPoolInitialize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GFX_POOL_INITIALIZE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGfxPoolInitialize_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GFX_POOL_INITIALIZE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGfxPoolInitialize__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGfxPoolAddSlots_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GFX_POOL_ADD_SLOTS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGfxPoolAddSlots_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GFX_POOL_ADD_SLOTS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGfxPoolAddSlots__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGfxPoolRemoveSlots_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GFX_POOL_REMOVE_SLOTS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGfxPoolRemoveSlots_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GFX_POOL_REMOVE_SLOTS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGfxPoolRemoveSlots__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetPpcMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_PPC_MASK_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetPpcMask_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_PPC_MASK_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetPpcMask__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrSetTpcPartitionMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_SET_TPC_PARTITION_MODE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrSetTpcPartitionMode_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_SET_TPC_PARTITION_MODE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrSetTpcPartitionMode__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetSmIssueRateModifier_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetSmIssueRateModifier_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetSmIssueRateModifier__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrFecsBindEvtbufForUid_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_FECS_BIND_EVTBUF_FOR_UID_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrFecsBindEvtbufForUid_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_FECS_BIND_EVTBUF_FOR_UID_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrFecsBindEvtbufForUid__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrFecsBindEvtbufForUidV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_FECS_BIND_EVTBUF_FOR_UID_V2_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrFecsBindEvtbufForUidV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_FECS_BIND_EVTBUF_FOR_UID_V2_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrFecsBindEvtbufForUidV2__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetPhysGpcMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_PHYS_GPC_MASK_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetPhysGpcMask_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_PHYS_GPC_MASK_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetPhysGpcMask__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetGpcMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_GPC_MASK_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetGpcMask_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_GPC_MASK_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetGpcMask__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetTpcMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_TPC_MASK_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetTpcMask_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_TPC_MASK_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetTpcMask__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetEngineContextProperties_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetEngineContextProperties_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetEngineContextProperties__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetNumTpcsForGpc_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_NUM_TPCS_FOR_GPC_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetNumTpcsForGpc_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_NUM_TPCS_FOR_GPC_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetNumTpcsForGpc__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetGpcTileMap_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_GPC_TILE_MAP_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetGpcTileMap_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_GPC_TILE_MAP_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetGpcTileMap__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetZcullMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_ZCULL_MASK_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetZcullMask_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_ZCULL_MASK_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetZcullMask__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrGetGfxGpcAndTpcInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_GFX_GPC_AND_TPC_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrGetGfxGpcAndTpcInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_GFX_GPC_AND_TPC_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrGetGfxGpcAndTpcInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_CAPS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetCaps_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_CAPS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetCaps__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetGlobalSmOrder_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_GLOBAL_SM_ORDER_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetGlobalSmOrder_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_GLOBAL_SM_ORDER_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetGlobalSmOrder__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetFloorsweepingMasks_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_FLOORSWEEPING_MASKS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetFloorsweepingMasks_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_FLOORSWEEPING_MASKS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetFloorsweepingMasks__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetPpcMasks_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_PPC_MASKS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetPpcMasks_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_PPC_MASKS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetPpcMasks__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetZcullInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetZcullInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetZcullInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetRopInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_ROP_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetRopInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_ROP_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetRopInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetContextBuffersInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_CONTEXT_BUFFERS_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetContextBuffersInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_CONTEXT_BUFFERS_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetContextBuffersInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetSmIssueRateModifier_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetSmIssueRateModifier_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetSmIssueRateModifier__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetFecsRecordSize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_RECORD_SIZE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetFecsRecordSize_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_RECORD_SIZE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetFecsRecordSize__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetFecsTraceDefines_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_TRACE_DEFINES_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetFecsTraceDefines_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_TRACE_DEFINES_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetFecsTraceDefines__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetPdbProperties_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_PDB_PROPERTIES_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetPdbProperties_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_PDB_PROPERTIES_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdKGrInternalStaticGetPdbProperties__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGrInternalSetFecsTraceHwEnable_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GR_SET_FECS_TRACE_HW_ENABLE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGrInternalSetFecsTraceHwEnable_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GR_SET_FECS_TRACE_HW_ENABLE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGrInternalSetFecsTraceHwEnable__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGrInternalGetFecsTraceHwEnable_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GR_GET_FECS_TRACE_HW_ENABLE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGrInternalGetFecsTraceHwEnable_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GR_GET_FECS_TRACE_HW_ENABLE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGrInternalGetFecsTraceHwEnable__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGrInternalSetFecsTraceRdOffset_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GR_SET_FECS_TRACE_RD_OFFSET_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGrInternalSetFecsTraceRdOffset_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GR_SET_FECS_TRACE_RD_OFFSET_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGrInternalSetFecsTraceRdOffset__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGrInternalGetFecsTraceRdOffset_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GR_GET_FECS_TRACE_RD_OFFSET_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGrInternalGetFecsTraceRdOffset_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GR_GET_FECS_TRACE_RD_OFFSET_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGrInternalGetFecsTraceRdOffset__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGrInternalSetFecsTraceWrOffset_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GR_SET_FECS_TRACE_WR_OFFSET_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGrInternalSetFecsTraceWrOffset_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GR_SET_FECS_TRACE_WR_OFFSET_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGrInternalSetFecsTraceWrOffset__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGrStaticGetFecsTraceDefines_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_TRACE_DEFINES_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGrStaticGetFecsTraceDefines_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_TRACE_DEFINES_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGrStaticGetFecsTraceDefines__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetCachedInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_INFO_V2_PARAMS *pGpuInfoParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetCachedInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_INFO_V2_PARAMS *pGpuInfoParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetCachedInfo__(pSubdevice, pGpuInfoParams); } -NV_STATUS subdeviceCtrlCmdGpuGetInfoV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_INFO_V2_PARAMS *pGpuInfoParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetInfoV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_INFO_V2_PARAMS *pGpuInfoParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetInfoV2__(pSubdevice, pGpuInfoParams); } -NV_STATUS subdeviceCtrlCmdGpuGetIpVersion_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_IP_VERSION_PARAMS *pGpuIpVersionParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetIpVersion_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_IP_VERSION_PARAMS *pGpuIpVersionParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetIpVersion__(pSubdevice, pGpuIpVersionParams); } -NV_STATUS subdeviceCtrlCmdGpuGetPhysicalBridgeVersionInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_PHYSICAL_BRIDGE_VERSION_INFO_PARAMS *pBridgeInfoParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetPhysicalBridgeVersionInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_PHYSICAL_BRIDGE_VERSION_INFO_PARAMS *pBridgeInfoParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetPhysicalBridgeVersionInfo__(pSubdevice, pBridgeInfoParams); } -NV_STATUS subdeviceCtrlCmdGpuGetAllBridgesUpstreamOfGpu_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ALL_BRIDGES_UPSTREAM_OF_GPU_PARAMS *pBridgeInfoParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetAllBridgesUpstreamOfGpu_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ALL_BRIDGES_UPSTREAM_OF_GPU_PARAMS *pBridgeInfoParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetAllBridgesUpstreamOfGpu__(pSubdevice, pBridgeInfoParams); } -NV_STATUS subdeviceCtrlCmdGpuSetOptimusInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_OPTIMUS_INFO_PARAMS *pGpuOptimusInfoParams); - static inline NV_STATUS subdeviceCtrlCmdGpuSetOptimusInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_OPTIMUS_INFO_PARAMS *pGpuOptimusInfoParams) { return pSubdevice->__subdeviceCtrlCmdGpuSetOptimusInfo__(pSubdevice, pGpuOptimusInfoParams); } -NV_STATUS subdeviceCtrlCmdGpuGetNameString_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_NAME_STRING_PARAMS *pNameStringParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetNameString_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_NAME_STRING_PARAMS *pNameStringParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetNameString__(pSubdevice, pNameStringParams); } -NV_STATUS subdeviceCtrlCmdGpuGetShortNameString_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_SHORT_NAME_STRING_PARAMS *pShortNameStringParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetShortNameString_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_SHORT_NAME_STRING_PARAMS *pShortNameStringParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetShortNameString__(pSubdevice, pShortNameStringParams); } -NV_STATUS subdeviceCtrlCmdGpuGetEncoderCapacity_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENCODER_CAPACITY_PARAMS *pEncoderCapacityParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetEncoderCapacity_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENCODER_CAPACITY_PARAMS *pEncoderCapacityParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetEncoderCapacity__(pSubdevice, pEncoderCapacityParams); } -NV_STATUS subdeviceCtrlCmdGpuGetNvencSwSessionStats_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_NVENC_SW_SESSION_STATS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetNvencSwSessionStats_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_NVENC_SW_SESSION_STATS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetNvencSwSessionStats__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetNvencSwSessionInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_NVENC_SW_SESSION_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetNvencSwSessionInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_NVENC_SW_SESSION_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetNvencSwSessionInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetNvencSwSessionInfoV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_NVENC_SW_SESSION_INFO_V2_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetNvencSwSessionInfoV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_NVENC_SW_SESSION_INFO_V2_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetNvencSwSessionInfoV2__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetNvfbcSwSessionStats_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_NVFBC_SW_SESSION_STATS_PARAMS *params); - static inline NV_STATUS subdeviceCtrlCmdGpuGetNvfbcSwSessionStats_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_NVFBC_SW_SESSION_STATS_PARAMS *params) { return pSubdevice->__subdeviceCtrlCmdGpuGetNvfbcSwSessionStats__(pSubdevice, params); } -NV_STATUS subdeviceCtrlCmdGpuGetNvfbcSwSessionInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_NVFBC_SW_SESSION_INFO_PARAMS *params); - static inline NV_STATUS subdeviceCtrlCmdGpuGetNvfbcSwSessionInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_NVFBC_SW_SESSION_INFO_PARAMS *params) { return pSubdevice->__subdeviceCtrlCmdGpuGetNvfbcSwSessionInfo__(pSubdevice, params); } -NV_STATUS subdeviceCtrlCmdGpuSetFabricAddr_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_FABRIC_BASE_ADDR_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuSetFabricAddr_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_FABRIC_BASE_ADDR_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuSetFabricAddr__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuSetEgmGpaFabricAddr_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_EGM_GPA_FABRIC_BASE_ADDR_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuSetEgmGpaFabricAddr_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_EGM_GPA_FABRIC_BASE_ADDR_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuSetEgmGpaFabricAddr__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuSetPower_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_POWER_PARAMS *pSetPowerParams); - static inline NV_STATUS subdeviceCtrlCmdGpuSetPower_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_POWER_PARAMS *pSetPowerParams) { return pSubdevice->__subdeviceCtrlCmdGpuSetPower__(pSubdevice, pSetPowerParams); } -NV_STATUS subdeviceCtrlCmdGpuGetSdm_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_SDM_PARAMS *pSdmParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetSdm_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_SDM_PARAMS *pSdmParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetSdm__(pSubdevice, pSdmParams); } -NV_STATUS subdeviceCtrlCmdGpuSetSdm_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_SDM_PARAMS *pSdmParams); - static inline NV_STATUS subdeviceCtrlCmdGpuSetSdm_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_SDM_PARAMS *pSdmParams) { return pSubdevice->__subdeviceCtrlCmdGpuSetSdm__(pSubdevice, pSdmParams); } -NV_STATUS subdeviceCtrlCmdGpuGetSimulationInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_SIMULATION_INFO_PARAMS *pGpuSimulationInfoParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetSimulationInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_SIMULATION_INFO_PARAMS *pGpuSimulationInfoParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetSimulationInfo__(pSubdevice, pGpuSimulationInfoParams); } -NV_STATUS subdeviceCtrlCmdGpuGetEngines_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINES_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetEngines_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINES_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetEngines__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetEnginesV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINES_V2_PARAMS *pEngineParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetEnginesV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINES_V2_PARAMS *pEngineParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetEnginesV2__(pSubdevice, pEngineParams); } -NV_STATUS subdeviceCtrlCmdGpuGetEngineClasslist_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINE_CLASSLIST_PARAMS *pClassParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetEngineClasslist_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINE_CLASSLIST_PARAMS *pClassParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetEngineClasslist__(pSubdevice, pClassParams); } -NV_STATUS subdeviceCtrlCmdGpuGetEnginePartnerList_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINE_PARTNERLIST_PARAMS *pPartnerListParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetEnginePartnerList_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINE_PARTNERLIST_PARAMS *pPartnerListParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetEnginePartnerList__(pSubdevice, pPartnerListParams); } -NV_STATUS subdeviceCtrlCmdGpuGetFermiGpcInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_FERMI_GPC_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetFermiGpcInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_FERMI_GPC_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetFermiGpcInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetFermiTpcInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_FERMI_TPC_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetFermiTpcInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_FERMI_TPC_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetFermiTpcInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetFermiZcullInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_FERMI_ZCULL_INFO_PARAMS *pGpuFermiZcullInfoParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetFermiZcullInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_FERMI_ZCULL_INFO_PARAMS *pGpuFermiZcullInfoParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetFermiZcullInfo__(pSubdevice, pGpuFermiZcullInfoParams); } -NV_STATUS subdeviceCtrlCmdGpuGetPesInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_PES_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetPesInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_PES_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetPesInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuExecRegOps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_EXEC_REG_OPS_PARAMS *pRegParams); - static inline NV_STATUS subdeviceCtrlCmdGpuExecRegOps_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_EXEC_REG_OPS_PARAMS *pRegParams) { return pSubdevice->__subdeviceCtrlCmdGpuExecRegOps__(pSubdevice, pRegParams); } -NV_STATUS subdeviceCtrlCmdGpuMigratableOps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_MIGRATABLE_OPS_PARAMS *pRegParams); - static inline NV_STATUS subdeviceCtrlCmdGpuMigratableOps_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_MIGRATABLE_OPS_PARAMS *pRegParams) { return pSubdevice->__subdeviceCtrlCmdGpuMigratableOps__(pSubdevice, pRegParams); } -NV_STATUS subdeviceCtrlCmdGpuQueryMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_MODE_PARAMS *pQueryMode); - static inline NV_STATUS subdeviceCtrlCmdGpuQueryMode_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_MODE_PARAMS *pQueryMode) { return pSubdevice->__subdeviceCtrlCmdGpuQueryMode__(pSubdevice, pQueryMode); } -NV_STATUS subdeviceCtrlCmdGpuGetInforomImageVersion_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_INFOROM_IMAGE_VERSION_PARAMS *pVersionInfo); - static inline NV_STATUS subdeviceCtrlCmdGpuGetInforomImageVersion_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_INFOROM_IMAGE_VERSION_PARAMS *pVersionInfo) { return pSubdevice->__subdeviceCtrlCmdGpuGetInforomImageVersion__(pSubdevice, pVersionInfo); } -NV_STATUS subdeviceCtrlCmdGpuGetInforomObjectVersion_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_INFOROM_OBJECT_VERSION_PARAMS *pVersionInfo); - static inline NV_STATUS subdeviceCtrlCmdGpuGetInforomObjectVersion_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_INFOROM_OBJECT_VERSION_PARAMS *pVersionInfo) { return pSubdevice->__subdeviceCtrlCmdGpuGetInforomObjectVersion__(pSubdevice, pVersionInfo); } -NV_STATUS subdeviceCtrlCmdGpuQueryInforomEccSupport_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdGpuQueryInforomEccSupport_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdGpuQueryInforomEccSupport__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdGpuQueryEccStatus_VF(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS *pParams); - -static inline NV_STATUS subdeviceCtrlCmdGpuQueryEccStatus_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS *pParams) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS subdeviceCtrlCmdGpuQueryEccStatus_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuQueryEccStatus__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetChipDetails_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_CHIP_DETAILS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetChipDetails_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_CHIP_DETAILS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetChipDetails__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetOEMBoardInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_OEM_BOARD_INFO_PARAMS *pBoardInfo); - static inline NV_STATUS subdeviceCtrlCmdGpuGetOEMBoardInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_OEM_BOARD_INFO_PARAMS *pBoardInfo) { return pSubdevice->__subdeviceCtrlCmdGpuGetOEMBoardInfo__(pSubdevice, pBoardInfo); } -NV_STATUS subdeviceCtrlCmdGpuGetOEMInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_OEM_INFO_PARAMS *pOemInfo); - static inline NV_STATUS subdeviceCtrlCmdGpuGetOEMInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_OEM_INFO_PARAMS *pOemInfo) { return pSubdevice->__subdeviceCtrlCmdGpuGetOEMInfo__(pSubdevice, pOemInfo); } -NV_STATUS subdeviceCtrlCmdGpuHandleGpuSR_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdGpuHandleGpuSR_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdGpuHandleGpuSR__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdGpuSetComputeModeRules_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_COMPUTE_MODE_RULES_PARAMS *pSetRulesParams); - static inline NV_STATUS subdeviceCtrlCmdGpuSetComputeModeRules_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_COMPUTE_MODE_RULES_PARAMS *pSetRulesParams) { return pSubdevice->__subdeviceCtrlCmdGpuSetComputeModeRules__(pSubdevice, pSetRulesParams); } -NV_STATUS subdeviceCtrlCmdGpuQueryComputeModeRules_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_COMPUTE_MODE_RULES_PARAMS *pQueryRulesParams); - static inline NV_STATUS subdeviceCtrlCmdGpuQueryComputeModeRules_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_COMPUTE_MODE_RULES_PARAMS *pQueryRulesParams) { return pSubdevice->__subdeviceCtrlCmdGpuQueryComputeModeRules__(pSubdevice, pQueryRulesParams); } -NV_STATUS subdeviceCtrlCmdGpuAcquireComputeModeReservation_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdGpuAcquireComputeModeReservation_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdGpuAcquireComputeModeReservation__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdGpuReleaseComputeModeReservation_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdGpuReleaseComputeModeReservation_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdGpuReleaseComputeModeReservation__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdGpuInitializeCtx_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_INITIALIZE_CTX_PARAMS *pInitializeCtxParams); - static inline NV_STATUS subdeviceCtrlCmdGpuInitializeCtx_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_INITIALIZE_CTX_PARAMS *pInitializeCtxParams) { return pSubdevice->__subdeviceCtrlCmdGpuInitializeCtx__(pSubdevice, pInitializeCtxParams); } -NV_STATUS subdeviceCtrlCmdGpuPromoteCtx_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_PROMOTE_CTX_PARAMS *pPromoteCtxParams); - static inline NV_STATUS subdeviceCtrlCmdGpuPromoteCtx_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_PROMOTE_CTX_PARAMS *pPromoteCtxParams) { return pSubdevice->__subdeviceCtrlCmdGpuPromoteCtx__(pSubdevice, pPromoteCtxParams); } -NV_STATUS subdeviceCtrlCmdGpuEvictCtx_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_EVICT_CTX_PARAMS *pEvictCtxParams); - static inline NV_STATUS subdeviceCtrlCmdGpuEvictCtx_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_EVICT_CTX_PARAMS *pEvictCtxParams) { return pSubdevice->__subdeviceCtrlCmdGpuEvictCtx__(pSubdevice, pEvictCtxParams); } -NV_STATUS subdeviceCtrlCmdGpuGetId_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ID_PARAMS *pIdParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetId_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ID_PARAMS *pIdParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetId__(pSubdevice, pIdParams); } -NV_STATUS subdeviceCtrlCmdGpuGetGidInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_GID_INFO_PARAMS *pGidInfoParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetGidInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_GID_INFO_PARAMS *pGidInfoParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetGidInfo__(pSubdevice, pGidInfoParams); } -NV_STATUS subdeviceCtrlCmdGpuQueryIllumSupport_VF(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GPU_QUERY_ILLUM_SUPPORT_PARAMS *pConfigParams); - -static inline NV_STATUS subdeviceCtrlCmdGpuQueryIllumSupport_5baef9(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GPU_QUERY_ILLUM_SUPPORT_PARAMS *pConfigParams) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - static inline NV_STATUS subdeviceCtrlCmdGpuQueryIllumSupport_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GPU_QUERY_ILLUM_SUPPORT_PARAMS *pConfigParams) { return pSubdevice->__subdeviceCtrlCmdGpuQueryIllumSupport__(pSubdevice, pConfigParams); } -NV_STATUS subdeviceCtrlCmdGpuGetIllum_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GPU_ILLUM_PARAMS *pConfigParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetIllum_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GPU_ILLUM_PARAMS *pConfigParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetIllum__(pSubdevice, pConfigParams); } -NV_STATUS subdeviceCtrlCmdGpuSetIllum_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GPU_ILLUM_PARAMS *pConfigParams); - static inline NV_STATUS subdeviceCtrlCmdGpuSetIllum_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GPU_ILLUM_PARAMS *pConfigParams) { return pSubdevice->__subdeviceCtrlCmdGpuSetIllum__(pSubdevice, pConfigParams); } -NV_STATUS subdeviceCtrlCmdGpuQueryScrubberStatus_VF(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_SCRUBBER_STATUS_PARAMS *pParams); - -static inline NV_STATUS subdeviceCtrlCmdGpuQueryScrubberStatus_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_SCRUBBER_STATUS_PARAMS *pParams) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS subdeviceCtrlCmdGpuQueryScrubberStatus_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_SCRUBBER_STATUS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuQueryScrubberStatus__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetVprCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_VPR_CAPS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetVprCaps_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_VPR_CAPS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetVprCaps__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetVprInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_VPR_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetVprInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_VPR_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetVprInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetPids_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_PIDS_PARAMS *pGetPidsParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetPids_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_PIDS_PARAMS *pGetPidsParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetPids__(pSubdevice, pGetPidsParams); } -NV_STATUS subdeviceCtrlCmdGpuGetPidInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_PID_INFO_PARAMS *pGetPidInfoParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetPidInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_PID_INFO_PARAMS *pGetPidInfoParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetPidInfo__(pSubdevice, pGetPidInfoParams); } -NV_STATUS subdeviceCtrlCmdGpuQueryFunctionStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GPU_QUERY_FUNCTION_STATUS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuQueryFunctionStatus_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GPU_QUERY_FUNCTION_STATUS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuQueryFunctionStatus__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuReportNonReplayableFault_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_REPORT_NON_REPLAYABLE_FAULT_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuReportNonReplayableFault_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_REPORT_NON_REPLAYABLE_FAULT_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuReportNonReplayableFault__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetEngineFaultInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINE_FAULT_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetEngineFaultInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINE_FAULT_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetEngineFaultInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetEngineRunlistPriBase_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINE_RUNLIST_PRI_BASE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetEngineRunlistPriBase_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINE_RUNLIST_PRI_BASE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetEngineRunlistPriBase__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetHwEngineId_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_HW_ENGINE_ID_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetHwEngineId_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_HW_ENGINE_ID_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetHwEngineId__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetVmmuSegmentSize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_VMMU_SEGMENT_SIZE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetVmmuSegmentSize_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_VMMU_SEGMENT_SIZE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetVmmuSegmentSize__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetMaxSupportedPageSize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_MAX_SUPPORTED_PAGE_SIZE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetMaxSupportedPageSize_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_MAX_SUPPORTED_PAGE_SIZE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetMaxSupportedPageSize__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuHandleVfPriFault_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GPU_HANDLE_VF_PRI_FAULT_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuHandleVfPriFault_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GPU_HANDLE_VF_PRI_FAULT_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuHandleVfPriFault__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuSetComputePolicyConfig_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_COMPUTE_POLICY_CONFIG_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuSetComputePolicyConfig_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_COMPUTE_POLICY_CONFIG_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuSetComputePolicyConfig__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetComputePolicyConfig_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_COMPUTE_POLICY_CONFIG_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetComputePolicyConfig_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_COMPUTE_POLICY_CONFIG_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetComputePolicyConfig__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdValidateMemMapRequest_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_VALIDATE_MEM_MAP_REQUEST_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdValidateMemMapRequest_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_VALIDATE_MEM_MAP_REQUEST_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdValidateMemMapRequest__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetGfid_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_GFID_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetGfid_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_GFID_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetGfid__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdUpdateGfidP2pCapability_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GPU_UPDATE_GFID_P2P_CAPABILITY_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdUpdateGfidP2pCapability_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GPU_UPDATE_GFID_P2P_CAPABILITY_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdUpdateGfidP2pCapability__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetEngineLoadTimes_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINE_LOAD_TIMES_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetEngineLoadTimes_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINE_LOAD_TIMES_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetEngineLoadTimes__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGetP2pCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GET_P2P_CAPS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGetP2pCaps_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GET_P2P_CAPS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGetP2pCaps__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGetGpuFabricProbeInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GET_GPU_FABRIC_PROBE_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGetGpuFabricProbeInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GET_GPU_FABRIC_PROBE_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGetGpuFabricProbeInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetResetStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_RESET_STATUS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetResetStatus_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_RESET_STATUS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetResetStatus__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetDrainAndResetStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_DRAIN_AND_RESET_STATUS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetDrainAndResetStatus_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_DRAIN_AND_RESET_STATUS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetDrainAndResetStatus__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetConstructedFalconInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_CONSTRUCTED_FALCON_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetConstructedFalconInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_CONSTRUCTED_FALCON_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetConstructedFalconInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlGpuGetFipsStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_FIPS_STATUS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlGpuGetFipsStatus_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_FIPS_STATUS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlGpuGetFipsStatus__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdEventSetTrigger_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdEventSetTrigger_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdEventSetTrigger__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdEventSetTriggerFifo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_SET_TRIGGER_FIFO_PARAMS *pTriggerFifoParams); - static inline NV_STATUS subdeviceCtrlCmdEventSetTriggerFifo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_SET_TRIGGER_FIFO_PARAMS *pTriggerFifoParams) { return pSubdevice->__subdeviceCtrlCmdEventSetTriggerFifo__(pSubdevice, pTriggerFifoParams); } -NV_STATUS subdeviceCtrlCmdEventSetNotification_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_SET_NOTIFICATION_PARAMS *pSetEventParams); - static inline NV_STATUS subdeviceCtrlCmdEventSetNotification_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_SET_NOTIFICATION_PARAMS *pSetEventParams) { return pSubdevice->__subdeviceCtrlCmdEventSetNotification__(pSubdevice, pSetEventParams); } -NV_STATUS subdeviceCtrlCmdEventSetMemoryNotifies_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_SET_MEMORY_NOTIFIES_PARAMS *pSetMemoryNotifiesParams); - static inline NV_STATUS subdeviceCtrlCmdEventSetMemoryNotifies_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_SET_MEMORY_NOTIFIES_PARAMS *pSetMemoryNotifiesParams) { return pSubdevice->__subdeviceCtrlCmdEventSetMemoryNotifies__(pSubdevice, pSetMemoryNotifiesParams); } -NV_STATUS subdeviceCtrlCmdEventSetSemaphoreMemory_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_SET_SEMAPHORE_MEMORY_PARAMS *pSetSemMemoryParams); - static inline NV_STATUS subdeviceCtrlCmdEventSetSemaphoreMemory_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_SET_SEMAPHORE_MEMORY_PARAMS *pSetSemMemoryParams) { return pSubdevice->__subdeviceCtrlCmdEventSetSemaphoreMemory__(pSubdevice, pSetSemMemoryParams); } -NV_STATUS subdeviceCtrlCmdEventSetSemaMemValidation_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_SET_SEMA_MEM_VALIDATION_PARAMS *pSetSemaMemValidationParams); - static inline NV_STATUS subdeviceCtrlCmdEventSetSemaMemValidation_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_SET_SEMA_MEM_VALIDATION_PARAMS *pSetSemaMemValidationParams) { return pSubdevice->__subdeviceCtrlCmdEventSetSemaMemValidation__(pSubdevice, pSetSemaMemValidationParams); } -NV_STATUS subdeviceCtrlCmdEventVideoBindEvtbuf_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_VIDEO_BIND_EVTBUF_PARAMS *pBindParams); - static inline NV_STATUS subdeviceCtrlCmdEventVideoBindEvtbuf_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_VIDEO_BIND_EVTBUF_PARAMS *pBindParams) { return pSubdevice->__subdeviceCtrlCmdEventVideoBindEvtbuf__(pSubdevice, pBindParams); } -NV_STATUS subdeviceCtrlCmdEventGspTraceRatsBindEvtbuf_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_RATS_GSP_TRACE_BIND_EVTBUF_PARAMS *pBindParams); - static inline NV_STATUS subdeviceCtrlCmdEventGspTraceRatsBindEvtbuf_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_RATS_GSP_TRACE_BIND_EVTBUF_PARAMS *pBindParams) { return pSubdevice->__subdeviceCtrlCmdEventGspTraceRatsBindEvtbuf__(pSubdevice, pBindParams); } -NV_STATUS subdeviceCtrlCmdTimerCancel_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdTimerCancel_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdTimerCancel__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdTimerSchedule_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_TIMER_SCHEDULE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdTimerSchedule_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_TIMER_SCHEDULE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdTimerSchedule__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdTimerGetTime_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_TIMER_GET_TIME_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdTimerGetTime_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_TIMER_GET_TIME_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdTimerGetTime__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdTimerGetRegisterOffset_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_TIMER_GET_REGISTER_OFFSET_PARAMS *pTimerRegOffsetParams); - static inline NV_STATUS subdeviceCtrlCmdTimerGetRegisterOffset_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_TIMER_GET_REGISTER_OFFSET_PARAMS *pTimerRegOffsetParams) { return pSubdevice->__subdeviceCtrlCmdTimerGetRegisterOffset__(pSubdevice, pTimerRegOffsetParams); } -NV_STATUS subdeviceCtrlCmdTimerGetGpuCpuTimeCorrelationInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_TIMER_GET_GPU_CPU_TIME_CORRELATION_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdTimerGetGpuCpuTimeCorrelationInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_TIMER_GET_GPU_CPU_TIME_CORRELATION_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdTimerGetGpuCpuTimeCorrelationInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdTimerSetGrTickFreq_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_TIMER_SET_GR_TICK_FREQ_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdTimerSetGrTickFreq_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_TIMER_SET_GR_TICK_FREQ_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdTimerSetGrTickFreq__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdRcReadVirtualMem_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_RC_READ_VIRTUAL_MEM_PARAMS *pReadVirtMemParam); - static inline NV_STATUS subdeviceCtrlCmdRcReadVirtualMem_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_RC_READ_VIRTUAL_MEM_PARAMS *pReadVirtMemParam) { return pSubdevice->__subdeviceCtrlCmdRcReadVirtualMem__(pSubdevice, pReadVirtMemParam); } -NV_STATUS subdeviceCtrlCmdRcGetErrorCount_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_RC_GET_ERROR_COUNT_PARAMS *pErrorCount); - static inline NV_STATUS subdeviceCtrlCmdRcGetErrorCount_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_RC_GET_ERROR_COUNT_PARAMS *pErrorCount) { return pSubdevice->__subdeviceCtrlCmdRcGetErrorCount__(pSubdevice, pErrorCount); } -NV_STATUS subdeviceCtrlCmdRcGetErrorV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_RC_GET_ERROR_V2_PARAMS *pErrorParams); - static inline NV_STATUS subdeviceCtrlCmdRcGetErrorV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_RC_GET_ERROR_V2_PARAMS *pErrorParams) { return pSubdevice->__subdeviceCtrlCmdRcGetErrorV2__(pSubdevice, pErrorParams); } -NV_STATUS subdeviceCtrlCmdRcSetCleanErrorHistory_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdRcSetCleanErrorHistory_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdRcSetCleanErrorHistory__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdRcGetWatchdogInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_RC_GET_WATCHDOG_INFO_PARAMS *pWatchdogInfoParams); - static inline NV_STATUS subdeviceCtrlCmdRcGetWatchdogInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_RC_GET_WATCHDOG_INFO_PARAMS *pWatchdogInfoParams) { return pSubdevice->__subdeviceCtrlCmdRcGetWatchdogInfo__(pSubdevice, pWatchdogInfoParams); } -NV_STATUS subdeviceCtrlCmdRcDisableWatchdog_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdRcDisableWatchdog_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdRcDisableWatchdog__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdRcSoftDisableWatchdog_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdRcSoftDisableWatchdog_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdRcSoftDisableWatchdog__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdRcEnableWatchdog_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdRcEnableWatchdog_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdRcEnableWatchdog__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdRcReleaseWatchdogRequests_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdRcReleaseWatchdogRequests_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdRcReleaseWatchdogRequests__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdInternalRcWatchdogTimeout_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdInternalRcWatchdogTimeout_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdInternalRcWatchdogTimeout__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdSetRcRecovery_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_RC_RECOVERY_PARAMS *pRcRecovery); - static inline NV_STATUS subdeviceCtrlCmdSetRcRecovery_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_RC_RECOVERY_PARAMS *pRcRecovery) { return pSubdevice->__subdeviceCtrlCmdSetRcRecovery__(pSubdevice, pRcRecovery); } -NV_STATUS subdeviceCtrlCmdGetRcRecovery_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_RC_RECOVERY_PARAMS *pRcRecovery); - static inline NV_STATUS subdeviceCtrlCmdGetRcRecovery_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_RC_RECOVERY_PARAMS *pRcRecovery) { return pSubdevice->__subdeviceCtrlCmdGetRcRecovery__(pSubdevice, pRcRecovery); } -NV_STATUS subdeviceCtrlCmdGetRcInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_RC_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGetRcInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_RC_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGetRcInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdSetRcInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_RC_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdSetRcInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_RC_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdSetRcInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdNvdGetDumpSize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVD_GET_DUMP_SIZE_PARAMS *pDumpSizeParams); - static inline NV_STATUS subdeviceCtrlCmdNvdGetDumpSize_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVD_GET_DUMP_SIZE_PARAMS *pDumpSizeParams) { return pSubdevice->__subdeviceCtrlCmdNvdGetDumpSize__(pSubdevice, pDumpSizeParams); } -NV_STATUS subdeviceCtrlCmdNvdGetDump_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVD_GET_DUMP_PARAMS *pDumpParams); - static inline NV_STATUS subdeviceCtrlCmdNvdGetDump_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVD_GET_DUMP_PARAMS *pDumpParams) { return pSubdevice->__subdeviceCtrlCmdNvdGetDump__(pSubdevice, pDumpParams); } -NV_STATUS subdeviceCtrlCmdNvdGetNocatJournalRpt_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVD_GET_NOCAT_JOURNAL_PARAMS *pReportParams); - static inline NV_STATUS subdeviceCtrlCmdNvdGetNocatJournalRpt_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVD_GET_NOCAT_JOURNAL_PARAMS *pReportParams) { return pSubdevice->__subdeviceCtrlCmdNvdGetNocatJournalRpt__(pSubdevice, pReportParams); } -NV_STATUS subdeviceCtrlCmdNvdSetNocatJournalData_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVD_SET_NOCAT_JOURNAL_DATA_PARAMS *pReportParams); - static inline NV_STATUS subdeviceCtrlCmdNvdSetNocatJournalData_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVD_SET_NOCAT_JOURNAL_DATA_PARAMS *pReportParams) { return pSubdevice->__subdeviceCtrlCmdNvdSetNocatJournalData__(pSubdevice, pReportParams); } -NV_STATUS subdeviceCtrlCmdNvdInsertNocatJournalRecord_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_NVD_INSERT_NOCAT_JOURNAL_RECORD_PARAMS *pReportParams); - static inline NV_STATUS subdeviceCtrlCmdNvdInsertNocatJournalRecord_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_NVD_INSERT_NOCAT_JOURNAL_RECORD_PARAMS *pReportParams) { return pSubdevice->__subdeviceCtrlCmdNvdInsertNocatJournalRecord__(pSubdevice, pReportParams); } -NV_STATUS subdeviceCtrlCmdPmgrGetModuleInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_PMGR_MODULE_INFO_PARAMS *pModuleInfoParams); - static inline NV_STATUS subdeviceCtrlCmdPmgrGetModuleInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_PMGR_MODULE_INFO_PARAMS *pModuleInfoParams) { return pSubdevice->__subdeviceCtrlCmdPmgrGetModuleInfo__(pSubdevice, pModuleInfoParams); } -NV_STATUS subdeviceCtrlCmdGpuProcessPostGc6ExitTasks_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdGpuProcessPostGc6ExitTasks_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdGpuProcessPostGc6ExitTasks__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdGc6Entry_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GC6_ENTRY_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGc6Entry_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GC6_ENTRY_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGc6Entry__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGc6Exit_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GC6_EXIT_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGc6Exit_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GC6_EXIT_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGc6Exit__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdLpwrDifrPrefetchResponse_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_LPWR_DIFR_PREFETCH_RESPONSE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdLpwrDifrPrefetchResponse_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_LPWR_DIFR_PREFETCH_RESPONSE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdLpwrDifrPrefetchResponse__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdLpwrDifrCtrl_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_LPWR_DIFR_CTRL_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdLpwrDifrCtrl_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_LPWR_DIFR_CTRL_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdLpwrDifrCtrl__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdCeGetCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_CAPS_PARAMS *pCeCapsParams); - static inline NV_STATUS subdeviceCtrlCmdCeGetCaps_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_CAPS_PARAMS *pCeCapsParams) { return pSubdevice->__subdeviceCtrlCmdCeGetCaps__(pSubdevice, pCeCapsParams); } -NV_STATUS subdeviceCtrlCmdCeGetCePceMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_CE_PCE_MASK_PARAMS *pCePceMaskParams); - static inline NV_STATUS subdeviceCtrlCmdCeGetCePceMask_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_CE_PCE_MASK_PARAMS *pCePceMaskParams) { return pSubdevice->__subdeviceCtrlCmdCeGetCePceMask__(pSubdevice, pCePceMaskParams); } -NV_STATUS subdeviceCtrlCmdCeUpdatePceLceMappings_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_UPDATE_PCE_LCE_MAPPINGS_PARAMS *pCeUpdatePceLceMappingsParams); - static inline NV_STATUS subdeviceCtrlCmdCeUpdatePceLceMappings_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CE_UPDATE_PCE_LCE_MAPPINGS_PARAMS *pCeUpdatePceLceMappingsParams) { return pSubdevice->__subdeviceCtrlCmdCeUpdatePceLceMappings__(pSubdevice, pCeUpdatePceLceMappingsParams); } -NV_STATUS subdeviceCtrlCmdCeGetCapsV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_CAPS_V2_PARAMS *pCeCapsParams); - static inline NV_STATUS subdeviceCtrlCmdCeGetCapsV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_CAPS_V2_PARAMS *pCeCapsParams) { return pSubdevice->__subdeviceCtrlCmdCeGetCapsV2__(pSubdevice, pCeCapsParams); } -NV_STATUS subdeviceCtrlCmdCeGetAllCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS *pCeCapsParams); - static inline NV_STATUS subdeviceCtrlCmdCeGetAllCaps_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS *pCeCapsParams) { return pSubdevice->__subdeviceCtrlCmdCeGetAllCaps__(pSubdevice, pCeCapsParams); } -NV_STATUS subdeviceCtrlCmdFlcnGetDmemUsage_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_GET_DMEM_USAGE_PARAMS *pFlcnDmemUsageParams); - static inline NV_STATUS subdeviceCtrlCmdFlcnGetDmemUsage_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_GET_DMEM_USAGE_PARAMS *pFlcnDmemUsageParams) { return pSubdevice->__subdeviceCtrlCmdFlcnGetDmemUsage__(pSubdevice, pFlcnDmemUsageParams); } -NV_STATUS subdeviceCtrlCmdFlcnGetEngineArch_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_GET_ENGINE_ARCH_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFlcnGetEngineArch_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_GET_ENGINE_ARCH_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFlcnGetEngineArch__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFlcnUstreamerQueueInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_USTREAMER_QUEUE_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFlcnUstreamerQueueInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_USTREAMER_QUEUE_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFlcnUstreamerQueueInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFlcnUstreamerControlGet_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_USTREAMER_CONTROL_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFlcnUstreamerControlGet_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_USTREAMER_CONTROL_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFlcnUstreamerControlGet__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFlcnUstreamerControlSet_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_USTREAMER_CONTROL_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFlcnUstreamerControlSet_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_USTREAMER_CONTROL_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFlcnUstreamerControlSet__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFlcnGetCtxBufferInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_GET_CTX_BUFFER_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFlcnGetCtxBufferInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_GET_CTX_BUFFER_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFlcnGetCtxBufferInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFlcnGetCtxBufferSize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_GET_CTX_BUFFER_SIZE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFlcnGetCtxBufferSize_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_GET_CTX_BUFFER_SIZE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFlcnGetCtxBufferSize__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalFlcnSetVideoEventBufferFlags_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_FLAGS_PARAMS *pParams); - -static inline NV_STATUS subdeviceCtrlCmdInternalFlcnSetVideoEventBufferFlags_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_FLAGS_PARAMS *pParams) { - return pSubdevice->__subdeviceCtrlCmdInternalFlcnSetVideoEventBufferFlags__(pSubdevice, pParams); -} - -NV_STATUS subdeviceCtrlCmdInternalFlcnSetVideoEventBufferMemory_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_MEMORY_PARAMS *pParams); - -static inline NV_STATUS subdeviceCtrlCmdInternalFlcnSetVideoEventBufferMemory_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_MEMORY_PARAMS *pParams) { - return pSubdevice->__subdeviceCtrlCmdInternalFlcnSetVideoEventBufferMemory__(pSubdevice, pParams); -} - -NV_STATUS subdeviceCtrlCmdEccGetClientExposedCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_ECC_GET_CLIENT_EXPOSED_COUNTERS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdEccGetClientExposedCounters_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_ECC_GET_CLIENT_EXPOSED_COUNTERS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdEccGetClientExposedCounters__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdEccGetEciCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_ECC_GET_ECI_COUNTERS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdEccGetEciCounters_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_ECC_GET_ECI_COUNTERS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdEccGetEciCounters__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdEccGetVolatileCounts_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_ECC_GET_VOLATILE_COUNTS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdEccGetVolatileCounts_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_ECC_GET_VOLATILE_COUNTS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdEccGetVolatileCounts__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuQueryEccConfiguration_VF(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_ECC_CONFIGURATION_PARAMS *pConfig); - -static inline NV_STATUS subdeviceCtrlCmdGpuQueryEccConfiguration_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_ECC_CONFIGURATION_PARAMS *pConfig) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS subdeviceCtrlCmdGpuQueryEccConfiguration_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_ECC_CONFIGURATION_PARAMS *pConfig) { return pSubdevice->__subdeviceCtrlCmdGpuQueryEccConfiguration__(pSubdevice, pConfig); } -NV_STATUS subdeviceCtrlCmdGpuSetEccConfiguration_VF(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_ECC_CONFIGURATION_PARAMS *pConfig); - -static inline NV_STATUS subdeviceCtrlCmdGpuSetEccConfiguration_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_ECC_CONFIGURATION_PARAMS *pConfig) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS subdeviceCtrlCmdGpuSetEccConfiguration_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_ECC_CONFIGURATION_PARAMS *pConfig) { return pSubdevice->__subdeviceCtrlCmdGpuSetEccConfiguration__(pSubdevice, pConfig); } -NV_STATUS subdeviceCtrlCmdGpuResetEccErrorStatus_VF(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_RESET_ECC_ERROR_STATUS_PARAMS *pParams); - -static inline NV_STATUS subdeviceCtrlCmdGpuResetEccErrorStatus_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_RESET_ECC_ERROR_STATUS_PARAMS *pParams) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS subdeviceCtrlCmdGpuResetEccErrorStatus_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_RESET_ECC_ERROR_STATUS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuResetEccErrorStatus__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFlaRange_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLA_RANGE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFlaRange_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FLA_RANGE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFlaRange__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFlaSetupInstanceMemBlock_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLA_SETUP_INSTANCE_MEM_BLOCK_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFlaSetupInstanceMemBlock_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FLA_SETUP_INSTANCE_MEM_BLOCK_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFlaSetupInstanceMemBlock__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFlaGetRange_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLA_GET_RANGE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFlaGetRange_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FLA_GET_RANGE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFlaGetRange__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdFlaGetFabricMemStats_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLA_GET_FABRIC_MEM_STATS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdFlaGetFabricMemStats_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FLA_GET_FABRIC_MEM_STATS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdFlaGetFabricMemStats__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGspGetFeatures_KERNEL(struct Subdevice *pSubdevice, NV2080_CTRL_GSP_GET_FEATURES_PARAMS *pGspFeaturesParams); - -static inline NV_STATUS subdeviceCtrlCmdGspGetFeatures_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_GSP_GET_FEATURES_PARAMS *pGspFeaturesParams) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS subdeviceCtrlCmdGspGetFeatures_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GSP_GET_FEATURES_PARAMS *pGspFeaturesParams) { return pSubdevice->__subdeviceCtrlCmdGspGetFeatures__(pSubdevice, pGspFeaturesParams); } -NV_STATUS subdeviceCtrlCmdGspGetRmHeapStats_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GSP_GET_RM_HEAP_STATS_PARAMS *pGspRmHeapStatsParams); - static inline NV_STATUS subdeviceCtrlCmdGspGetRmHeapStats_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GSP_GET_RM_HEAP_STATS_PARAMS *pGspRmHeapStatsParams) { return pSubdevice->__subdeviceCtrlCmdGspGetRmHeapStats__(pSubdevice, pGspRmHeapStatsParams); } -NV_STATUS subdeviceCtrlCmdGpuGetActivePartitionIds_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ACTIVE_PARTITION_IDS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetActivePartitionIds_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ACTIVE_PARTITION_IDS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetActivePartitionIds__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetPartitionCapacity_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_PARTITION_CAPACITY_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetPartitionCapacity_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_PARTITION_CAPACITY_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetPartitionCapacity__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuDescribePartitions_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_DESCRIBE_PARTITIONS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuDescribePartitions_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_DESCRIBE_PARTITIONS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuDescribePartitions__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuSetPartitioningMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_PARTITIONING_MODE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuSetPartitioningMode_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_PARTITIONING_MODE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuSetPartitioningMode__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGrmgrGetGrFsInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GRMGR_GET_GR_FS_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGrmgrGetGrFsInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GRMGR_GET_GR_FS_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGrmgrGetGrFsInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuSetPartitions_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_PARTITIONS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuSetPartitions_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_PARTITIONS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuSetPartitions__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetPartitions_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_PARTITIONS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetPartitions_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_PARTITIONS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetPartitions__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGpuGetComputeProfiles_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_COMPUTE_PROFILES_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGpuGetComputeProfiles_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_COMPUTE_PROFILES_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetComputeProfiles__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalStaticKMIGmgrGetProfiles_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_PROFILES_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalStaticKMIGmgrGetProfiles_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_PROFILES_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalStaticKMIGmgrGetProfiles__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalStaticKMIGmgrGetPartitionableEngines_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_PARTITIONABLE_ENGINES_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalStaticKMIGmgrGetPartitionableEngines_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_PARTITIONABLE_ENGINES_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalStaticKMIGmgrGetPartitionableEngines__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalStaticKMIGmgrGetSwizzIdFbMemPageRanges_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_SWIZZ_ID_FB_MEM_PAGE_RANGES_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalStaticKMIGmgrGetSwizzIdFbMemPageRanges_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_SWIZZ_ID_FB_MEM_PAGE_RANGES_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalStaticKMIGmgrGetSwizzIdFbMemPageRanges__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalStaticKMIGmgrGetComputeInstanceProfiles_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_COMPUTE_PROFILES_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalStaticKMIGmgrGetComputeInstanceProfiles_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_COMPUTE_PROFILES_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalStaticKMIGmgrGetComputeInstanceProfiles__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalKMIGmgrExportGPUInstance_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_KMIGMGR_IMPORT_EXPORT_GPU_INSTANCE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalKMIGmgrExportGPUInstance_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_KMIGMGR_IMPORT_EXPORT_GPU_INSTANCE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalKMIGmgrExportGPUInstance__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalKMIGmgrImportGPUInstance_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_KMIGMGR_IMPORT_EXPORT_GPU_INSTANCE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalKMIGmgrImportGPUInstance_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_KMIGMGR_IMPORT_EXPORT_GPU_INSTANCE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalKMIGmgrImportGPUInstance__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalKMIGmgrPromoteGpuInstanceMemRange_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_KMIGMGR_PROMOTE_GPU_INSTANCE_MEM_RANGE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalKMIGmgrPromoteGpuInstanceMemRange_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_KMIGMGR_PROMOTE_GPU_INSTANCE_MEM_RANGE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalKMIGmgrPromoteGpuInstanceMemRange__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdOsUnixGc6BlockerRefCnt_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_OS_UNIX_GC6_BLOCKER_REFCNT_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdOsUnixGc6BlockerRefCnt_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_OS_UNIX_GC6_BLOCKER_REFCNT_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdOsUnixGc6BlockerRefCnt__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdOsUnixAllowDisallowGcoff_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_OS_UNIX_ALLOW_DISALLOW_GCOFF_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdOsUnixAllowDisallowGcoff_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_OS_UNIX_ALLOW_DISALLOW_GCOFF_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdOsUnixAllowDisallowGcoff__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdOsUnixAudioDynamicPower_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_OS_UNIX_AUDIO_DYNAMIC_POWER_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdOsUnixAudioDynamicPower_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_OS_UNIX_AUDIO_DYNAMIC_POWER_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdOsUnixAudioDynamicPower__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdOsUnixVidmemPersistenceStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_OS_UNIX_VIDMEM_PERSISTENCE_STATUS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdOsUnixVidmemPersistenceStatus_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_OS_UNIX_VIDMEM_PERSISTENCE_STATUS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdOsUnixVidmemPersistenceStatus__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdOsUnixUpdateTgpStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_OS_UNIX_UPDATE_TGP_STATUS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdOsUnixUpdateTgpStatus_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_OS_UNIX_UPDATE_TGP_STATUS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdOsUnixUpdateTgpStatus__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdDisplayGetIpVersion_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_GET_IP_VERSION_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdDisplayGetIpVersion_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_GET_IP_VERSION_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdDisplayGetIpVersion__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdDisplayGetStaticInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_GET_STATIC_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdDisplayGetStaticInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_GET_STATIC_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdDisplayGetStaticInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdDisplaySetChannelPushbuffer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_CHANNEL_PUSHBUFFER_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdDisplaySetChannelPushbuffer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_CHANNEL_PUSHBUFFER_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdDisplaySetChannelPushbuffer__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdDisplayWriteInstMem_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_WRITE_INST_MEM_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdDisplayWriteInstMem_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_WRITE_INST_MEM_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdDisplayWriteInstMem__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdDisplaySetupRgLineIntr_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_SETUP_RG_LINE_INTR_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdDisplaySetupRgLineIntr_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_SETUP_RG_LINE_INTR_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdDisplaySetupRgLineIntr__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdDisplaySetImportedImpData_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_SET_IMP_INIT_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdDisplaySetImportedImpData_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_SET_IMP_INIT_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdDisplaySetImportedImpData__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdDisplayGetDisplayMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_GET_ACTIVE_DISPLAY_DEVICES_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdDisplayGetDisplayMask_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_GET_ACTIVE_DISPLAY_DEVICES_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdDisplayGetDisplayMask__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdDisplayPinsetsToLockpins_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISP_PINSETS_TO_LOCKPINS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdDisplayPinsetsToLockpins_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISP_PINSETS_TO_LOCKPINS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdDisplayPinsetsToLockpins__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdDisplaySetSliLinkGpioSwControl_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISP_SET_SLI_LINK_GPIO_SW_CONTROL_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdDisplaySetSliLinkGpioSwControl_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISP_SET_SLI_LINK_GPIO_SW_CONTROL_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdDisplaySetSliLinkGpioSwControl__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalGpioProgramDirection_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPIO_PROGRAM_DIRECTION_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGpioProgramDirection_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPIO_PROGRAM_DIRECTION_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalGpioProgramDirection__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalGpioProgramOutput_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPIO_PROGRAM_OUTPUT_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGpioProgramOutput_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPIO_PROGRAM_OUTPUT_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalGpioProgramOutput__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalGpioReadInput_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPIO_READ_INPUT_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGpioReadInput_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPIO_READ_INPUT_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalGpioReadInput__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalGpioActivateHwFunction_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPIO_ACTIVATE_HW_FUNCTION_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGpioActivateHwFunction_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPIO_ACTIVATE_HW_FUNCTION_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalGpioActivateHwFunction__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalDisplayAcpiSubsytemActivated_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdInternalDisplayAcpiSubsytemActivated_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdInternalDisplayAcpiSubsytemActivated__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdInternalDisplayPreModeSet_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdInternalDisplayPreModeSet_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdInternalDisplayPreModeSet__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdInternalDisplayPostModeSet_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdInternalDisplayPostModeSet_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdInternalDisplayPostModeSet__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdDisplayPreUnixConsole_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_DISPLAY_PRE_UNIX_CONSOLE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdDisplayPreUnixConsole_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_DISPLAY_PRE_UNIX_CONSOLE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdDisplayPreUnixConsole__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdDisplayPostUnixConsole_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_DISPLAY_POST_UNIX_CONSOLE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdDisplayPostUnixConsole_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_DISPLAY_POST_UNIX_CONSOLE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdDisplayPostUnixConsole__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdMsencGetCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MSENC_GET_CAPS_PARAMS *pParams); - -static inline NV_STATUS subdeviceCtrlCmdMsencGetCaps_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MSENC_GET_CAPS_PARAMS *pParams) { - return pSubdevice->__subdeviceCtrlCmdMsencGetCaps__(pSubdevice, pParams); +static inline NV_STATUS subdeviceCtrlCmdInternalUvmRegisterAccessCntrBuffer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_UVM_REGISTER_ACCESS_CNTR_BUFFER_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdInternalUvmRegisterAccessCntrBuffer__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalUvmRegisterAccessCntrBuffer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_UVM_REGISTER_ACCESS_CNTR_BUFFER_PARAMS *pParams); - -static inline NV_STATUS subdeviceCtrlCmdInternalUvmRegisterAccessCntrBuffer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_UVM_REGISTER_ACCESS_CNTR_BUFFER_PARAMS *pParams) { - return pSubdevice->__subdeviceCtrlCmdInternalUvmRegisterAccessCntrBuffer__(pSubdevice, pParams); -} - -NV_STATUS subdeviceCtrlCmdInternalUvmUnregisterAccessCntrBuffer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_UVM_UNREGISTER_ACCESS_CNTR_BUFFER_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalUvmUnregisterAccessCntrBuffer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_UVM_UNREGISTER_ACCESS_CNTR_BUFFER_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalUvmUnregisterAccessCntrBuffer__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalGetChipInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPU_GET_CHIP_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGetChipInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPU_GET_CHIP_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalGetChipInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalGetUserRegisterAccessMap_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPU_GET_USER_REGISTER_ACCESS_MAP_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGetUserRegisterAccessMap_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPU_GET_USER_REGISTER_ACCESS_MAP_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalGetUserRegisterAccessMap__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalGetDeviceInfoTable_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGetDeviceInfoTable_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalGetDeviceInfoTable__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalRecoverAllComputeContexts_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdInternalRecoverAllComputeContexts_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdInternalRecoverAllComputeContexts__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdInternalGetSmcMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPU_GET_SMC_MODE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGetSmcMode_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPU_GET_SMC_MODE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalGetSmcMode__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdIsEgpuBridge_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GET_EGPU_BRIDGE_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdIsEgpuBridge_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GET_EGPU_BRIDGE_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdIsEgpuBridge__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalBusFlushWithSysmembar_IMPL(struct Subdevice *pSubdevice); +static inline NV_STATUS subdeviceCtrlCmdInternalGpuGetGspRmFreeHeap_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPU_GET_GSP_RM_FREE_HEAP_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdInternalGpuGetGspRmFreeHeap__(pSubdevice, pParams); +} static inline NV_STATUS subdeviceCtrlCmdInternalBusFlushWithSysmembar_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdInternalBusFlushWithSysmembar__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdInternalBusSetupP2pMailboxLocal_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_BUS_SETUP_P2P_MAILBOX_LOCAL_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalBusSetupP2pMailboxLocal_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_BUS_SETUP_P2P_MAILBOX_LOCAL_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalBusSetupP2pMailboxLocal__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalBusSetupP2pMailboxRemote_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_BUS_SETUP_P2P_MAILBOX_REMOTE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalBusSetupP2pMailboxRemote_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_BUS_SETUP_P2P_MAILBOX_REMOTE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalBusSetupP2pMailboxRemote__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalBusDestroyP2pMailbox_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BUS_DESTROY_P2P_MAILBOX_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalBusDestroyP2pMailbox_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BUS_DESTROY_P2P_MAILBOX_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalBusDestroyP2pMailbox__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalBusCreateC2cPeerMapping_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BUS_CREATE_C2C_PEER_MAPPING_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalBusCreateC2cPeerMapping_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BUS_CREATE_C2C_PEER_MAPPING_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalBusCreateC2cPeerMapping__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BUS_REMOVE_C2C_PEER_MAPPING_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BUS_REMOVE_C2C_PEER_MAPPING_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_VMMU_GET_SPA_FOR_GPA_ENTRIES_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_VMMU_GET_SPA_FOR_GPA_ENTRIES_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGmmuGetStaticInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GMMU_GET_STATIC_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGmmuGetStaticInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GMMU_GET_STATIC_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGmmuGetStaticInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalGmmuRegisterFaultBuffer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GMMU_REGISTER_FAULT_BUFFER_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGmmuRegisterFaultBuffer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GMMU_REGISTER_FAULT_BUFFER_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalGmmuRegisterFaultBuffer__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalGmmuUnregisterFaultBuffer_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdInternalGmmuUnregisterFaultBuffer_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdInternalGmmuUnregisterFaultBuffer__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdInternalGmmuRegisterClientShadowFaultBuffer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GMMU_REGISTER_CLIENT_SHADOW_FAULT_BUFFER_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGmmuRegisterClientShadowFaultBuffer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GMMU_REGISTER_CLIENT_SHADOW_FAULT_BUFFER_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalGmmuRegisterClientShadowFaultBuffer__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalGmmuUnregisterClientShadowFaultBuffer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GMMU_UNREGISTER_CLIENT_SHADOW_FAULT_BUFFER_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGmmuUnregisterClientShadowFaultBuffer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GMMU_UNREGISTER_CLIENT_SHADOW_FAULT_BUFFER_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalGmmuUnregisterClientShadowFaultBuffer__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalGmmuCopyReservedSplitGVASpacePdesServer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GMMU_COPY_RESERVED_SPLIT_GVASPACE_PDES_TO_SERVER_PARAMS *pCopyServerReservedPdesParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGmmuCopyReservedSplitGVASpacePdesServer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GMMU_COPY_RESERVED_SPLIT_GVASPACE_PDES_TO_SERVER_PARAMS *pCopyServerReservedPdesParams) { return pSubdevice->__subdeviceCtrlCmdInternalGmmuCopyReservedSplitGVASpacePdesServer__(pSubdevice, pCopyServerReservedPdesParams); } -NV_STATUS subdeviceCtrlCmdCeGetPhysicalCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_CAPS_V2_PARAMS *pCeCapsParams); - static inline NV_STATUS subdeviceCtrlCmdCeGetPhysicalCaps_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_CAPS_V2_PARAMS *pCeCapsParams) { return pSubdevice->__subdeviceCtrlCmdCeGetPhysicalCaps__(pSubdevice, pCeCapsParams); } -NV_STATUS subdeviceCtrlCmdCeGetAllPhysicalCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS *pCeCapsParams); - static inline NV_STATUS subdeviceCtrlCmdCeGetAllPhysicalCaps_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS *pCeCapsParams) { return pSubdevice->__subdeviceCtrlCmdCeGetAllPhysicalCaps__(pSubdevice, pCeCapsParams); } -NV_STATUS subdeviceCtrlCmdCeUpdateClassDB_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_UPDATE_CLASS_DB_PARAMS *params); - static inline NV_STATUS subdeviceCtrlCmdCeUpdateClassDB_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CE_UPDATE_CLASS_DB_PARAMS *params) { return pSubdevice->__subdeviceCtrlCmdCeUpdateClassDB__(pSubdevice, params); } -NV_STATUS subdeviceCtrlCmdCeGetFaultMethodBufferSize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_FAULT_METHOD_BUFFER_SIZE_PARAMS *params); - static inline NV_STATUS subdeviceCtrlCmdCeGetFaultMethodBufferSize_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_FAULT_METHOD_BUFFER_SIZE_PARAMS *params) { return pSubdevice->__subdeviceCtrlCmdCeGetFaultMethodBufferSize__(pSubdevice, params); } -NV_STATUS subdeviceCtrlCmdCeGetHubPceMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_HUB_PCE_MASK_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdCeGetHubPceMask_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_HUB_PCE_MASK_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdCeGetHubPceMask__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdIntrGetKernelTable_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_INTR_GET_KERNEL_TABLE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdIntrGetKernelTable_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_INTR_GET_KERNEL_TABLE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdIntrGetKernelTable__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPerfCudaLimitDisable_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdInternalPerfCudaLimitDisable_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdInternalPerfCudaLimitDisable__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdInternalPerfOptpCliClear_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdInternalPerfOptpCliClear_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdInternalPerfOptpCliClear__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdInternalPerfBoostSet_2x_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_BOOST_SET_PARAMS_2X *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPerfBoostSet_2x_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_BOOST_SET_PARAMS_2X *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPerfBoostSet_2x__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPerfBoostSet_3x_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_BOOST_SET_PARAMS_3X *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPerfBoostSet_3x_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_BOOST_SET_PARAMS_3X *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPerfBoostSet_3x__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPerfBoostClear_3x_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_BOOST_CLEAR_PARAMS_3X *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPerfBoostClear_3x_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_BOOST_CLEAR_PARAMS_3X *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPerfBoostClear_3x__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPerfGpuBoostSyncSetControl_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_GPU_BOOST_SYNC_CONTROL_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPerfGpuBoostSyncSetControl_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_GPU_BOOST_SYNC_CONTROL_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPerfGpuBoostSyncSetControl__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPerfGpuBoostSyncGetInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_GPU_BOOST_SYNC_GET_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPerfGpuBoostSyncGetInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_GPU_BOOST_SYNC_GET_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPerfGpuBoostSyncGetInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPerfSyncGpuBoostSetLimits_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_GPU_BOOST_SYNC_SET_LIMITS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPerfSyncGpuBoostSetLimits_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_GPU_BOOST_SYNC_SET_LIMITS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPerfSyncGpuBoostSetLimits__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPerfPerfmonClientReservationCheck_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_PERFMON_CLIENT_RESERVATION_CHECK_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPerfPerfmonClientReservationCheck_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_PERFMON_CLIENT_RESERVATION_CHECK_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPerfPerfmonClientReservationCheck__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPerfPerfmonClientReservationSet_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_PERFMON_CLIENT_RESERVATION_SET_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPerfPerfmonClientReservationSet_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_PERFMON_CLIENT_RESERVATION_SET_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPerfPerfmonClientReservationSet__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPerfCfControllerSetMaxVGpuVMCount_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_CF_CONTROLLERS_SET_MAX_VGPU_VM_COUNT_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPerfCfControllerSetMaxVGpuVMCount_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_CF_CONTROLLERS_SET_MAX_VGPU_VM_COUNT_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPerfCfControllerSetMaxVGpuVMCount__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPerfGetAuxPowerState_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_GET_AUX_POWER_STATE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPerfGetAuxPowerState_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_GET_AUX_POWER_STATE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPerfGetAuxPowerState__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalGcxEntryPrerequisite_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GCX_ENTRY_PREREQUISITE_PARAMS *pGcxEntryPrerequisite); - static inline NV_STATUS subdeviceCtrlCmdInternalGcxEntryPrerequisite_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GCX_ENTRY_PREREQUISITE_PARAMS *pGcxEntryPrerequisite) { return pSubdevice->__subdeviceCtrlCmdInternalGcxEntryPrerequisite__(pSubdevice, pGcxEntryPrerequisite); } -NV_STATUS subdeviceCtrlCmdBifGetStaticInfo_VGPUSTUB(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BIF_GET_STATIC_INFO_PARAMS *pParams); - -static inline NV_STATUS subdeviceCtrlCmdBifGetStaticInfo_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BIF_GET_STATIC_INFO_PARAMS *pParams) { - NV_ASSERT_PRECOMP(0); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS subdeviceCtrlCmdBifGetStaticInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BIF_GET_STATIC_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBifGetStaticInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBifGetAspmL1Flags_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BIF_GET_ASPM_L1_FLAGS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBifGetAspmL1Flags_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BIF_GET_ASPM_L1_FLAGS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBifGetAspmL1Flags__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBifSetPcieRo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BIF_SET_PCIE_RO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBifSetPcieRo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BIF_SET_PCIE_RO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBifSetPcieRo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdBifDisableSystemMemoryAccess_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BIF_DISABLE_SYSTEM_MEMORY_ACCESS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdBifDisableSystemMemoryAccess_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BIF_DISABLE_SYSTEM_MEMORY_ACCESS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdBifDisableSystemMemoryAccess__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdHshubPeerConnConfig_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_HSHUB_PEER_CONN_CONFIG_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdHshubPeerConnConfig_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_HSHUB_PEER_CONN_CONFIG_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdHshubPeerConnConfig__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdHshubFirstLinkPeerId_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_HSHUB_FIRST_LINK_PEER_ID_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdHshubFirstLinkPeerId_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_HSHUB_FIRST_LINK_PEER_ID_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdHshubFirstLinkPeerId__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdHshubGetHshubIdForLinks_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_HSHUB_GET_HSHUB_ID_FOR_LINKS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdHshubGetHshubIdForLinks_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_HSHUB_GET_HSHUB_ID_FOR_LINKS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdHshubGetHshubIdForLinks__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdHshubGetNumUnits_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_HSHUB_GET_NUM_UNITS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdHshubGetNumUnits_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_HSHUB_GET_NUM_UNITS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdHshubGetNumUnits__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdHshubNextHshubId_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_HSHUB_NEXT_HSHUB_ID_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdHshubNextHshubId_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_HSHUB_NEXT_HSHUB_ID_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdHshubNextHshubId__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdHshubEgmConfig_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_HSHUB_EGM_CONFIG_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdHshubEgmConfig_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_HSHUB_EGM_CONFIG_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdHshubEgmConfig__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalNvlinkEnableComputePeerAddr_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdInternalNvlinkEnableComputePeerAddr_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdInternalNvlinkEnableComputePeerAddr__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdInternalNvlinkGetSetNvswitchFabricAddr_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_GET_SET_NVSWITCH_FABRIC_ADDR_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalNvlinkGetSetNvswitchFabricAddr_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_GET_SET_NVSWITCH_FABRIC_ADDR_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalNvlinkGetSetNvswitchFabricAddr__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalNvlinkGetNumActiveLinksPerIoctrl_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_GET_NUM_ACTIVE_LINK_PER_IOCTRL_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalNvlinkGetNumActiveLinksPerIoctrl_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_GET_NUM_ACTIVE_LINK_PER_IOCTRL_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalNvlinkGetNumActiveLinksPerIoctrl__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalNvlinkGetTotalNumLinksPerIoctrl_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_GET_TOTAL_NUM_LINK_PER_IOCTRL_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalNvlinkGetTotalNumLinksPerIoctrl_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_GET_TOTAL_NUM_LINK_PER_IOCTRL_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalNvlinkGetTotalNumLinksPerIoctrl__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalSetP2pCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_SET_P2P_CAPS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalSetP2pCaps_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_SET_P2P_CAPS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalSetP2pCaps__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalRemoveP2pCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_REMOVE_P2P_CAPS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalRemoveP2pCaps_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_REMOVE_P2P_CAPS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalRemoveP2pCaps__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalGetPcieP2pCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GET_PCIE_P2P_CAPS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGetPcieP2pCaps_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GET_PCIE_P2P_CAPS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalGetPcieP2pCaps__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalGetCoherentFbApertureSize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GET_COHERENT_FB_APERTURE_SIZE_PARAMS *pParams); - -static inline NV_STATUS subdeviceCtrlCmdInternalGetCoherentFbApertureSize_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GET_COHERENT_FB_APERTURE_SIZE_PARAMS *pParams) { - return pSubdevice->__subdeviceCtrlCmdInternalGetCoherentFbApertureSize__(pSubdevice, pParams); -} - -NV_STATUS subdeviceCtrlCmdInternalGetLocalAtsConfig_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_GET_LOCAL_ATS_CONFIG_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGetLocalAtsConfig_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_GET_LOCAL_ATS_CONFIG_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalGetLocalAtsConfig__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalSetPeerAtsConfig_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_SET_PEER_ATS_CONFIG_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalSetPeerAtsConfig_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_SET_PEER_ATS_CONFIG_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalSetPeerAtsConfig__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalInitGpuIntr_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_ATTACH_AND_INIT_PARAMS *pAttachParams); - static inline NV_STATUS subdeviceCtrlCmdInternalInitGpuIntr_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_ATTACH_AND_INIT_PARAMS *pAttachParams) { return pSubdevice->__subdeviceCtrlCmdInternalInitGpuIntr__(pSubdevice, pAttachParams); } -NV_STATUS subdeviceCtrlCmdInternalGsyncOptimizeTiming_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_OPTIMIZE_TIMING_PARAMETERS_PARAMS *pAttachParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGsyncOptimizeTiming_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_OPTIMIZE_TIMING_PARAMETERS_PARAMS *pAttachParams) { return pSubdevice->__subdeviceCtrlCmdInternalGsyncOptimizeTiming__(pSubdevice, pAttachParams); } -NV_STATUS subdeviceCtrlCmdInternalGsyncGetDisplayIds_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_GET_DISPLAY_IDS_PARAMS *pAttachParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGsyncGetDisplayIds_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_GET_DISPLAY_IDS_PARAMS *pAttachParams) { return pSubdevice->__subdeviceCtrlCmdInternalGsyncGetDisplayIds__(pSubdevice, pAttachParams); } -NV_STATUS subdeviceCtrlCmdInternalGsyncSetStereoSync_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_SET_STREO_SYNC_PARAMS *pAttachParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGsyncSetStereoSync_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_SET_STREO_SYNC_PARAMS *pAttachParams) { return pSubdevice->__subdeviceCtrlCmdInternalGsyncSetStereoSync__(pSubdevice, pAttachParams); } -NV_STATUS subdeviceCtrlCmdInternalGsyncGetVactiveLines_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_GET_VERTICAL_ACTIVE_LINES_PARAMS *pAttachParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGsyncGetVactiveLines_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_GET_VERTICAL_ACTIVE_LINES_PARAMS *pAttachParams) { return pSubdevice->__subdeviceCtrlCmdInternalGsyncGetVactiveLines__(pSubdevice, pAttachParams); } -NV_STATUS subdeviceCtrlCmdInternalGsyncIsDisplayIdValid_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_IS_DISPLAYID_VALID_PARAMS *pAttachParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGsyncIsDisplayIdValid_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_IS_DISPLAYID_VALID_PARAMS *pAttachParams) { return pSubdevice->__subdeviceCtrlCmdInternalGsyncIsDisplayIdValid__(pSubdevice, pAttachParams); } -NV_STATUS subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_SET_OR_RESTORE_RASTER_SYNC_PARAMS *pAttachParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_SET_OR_RESTORE_RASTER_SYNC_PARAMS *pAttachParams) { return pSubdevice->__subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync__(pSubdevice, pAttachParams); } -NV_STATUS subdeviceCtrlCmdInternalFbsrInit_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FBSR_INIT_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalFbsrInit_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FBSR_INIT_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalFbsrInit__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalFbsrSendRegionInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FBSR_SEND_REGION_INFO_PARAMS *pParams); - -static inline NV_STATUS subdeviceCtrlCmdInternalFbsrSendRegionInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FBSR_SEND_REGION_INFO_PARAMS *pParams) { - return pSubdevice->__subdeviceCtrlCmdInternalFbsrSendRegionInfo__(pSubdevice, pParams); -} - -NV_STATUS subdeviceCtrlCmdInternalPostInitBrightcStateLoad_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_INIT_BRIGHTC_STATE_LOAD_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPostInitBrightcStateLoad_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_INIT_BRIGHTC_STATE_LOAD_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPostInitBrightcStateLoad__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalSetStaticEdidData_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_SET_STATIC_EDID_DATA_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalSetStaticEdidData_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_SET_STATIC_EDID_DATA_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalSetStaticEdidData__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalSmbpbiPfmReqHndlrCapUpdate_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_SMBPBI_PFM_REQ_HNDLR_CAP_UPDATE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalSmbpbiPfmReqHndlrCapUpdate_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_SMBPBI_PFM_REQ_HNDLR_CAP_UPDATE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalSmbpbiPfmReqHndlrCapUpdate__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPmgrPfmReqHndlrStateLoadSync_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PFM_REQ_HNDLR_STATE_SYNC_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPmgrPfmReqHndlrStateLoadSync_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PFM_REQ_HNDLR_STATE_SYNC_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPmgrPfmReqHndlrStateLoadSync__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalThermPfmReqHndlrStateInitSync_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PFM_REQ_HNDLR_STATE_SYNC_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalThermPfmReqHndlrStateInitSync_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PFM_REQ_HNDLR_STATE_SYNC_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalThermPfmReqHndlrStateInitSync__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPerfPfmReqHndlrGetPm1State_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_GET_PM1_STATE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPerfPfmReqHndlrGetPm1State_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_GET_PM1_STATE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPerfPfmReqHndlrGetPm1State__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPerfPfmReqHndlrSetPm1State_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_SET_PM1_STATE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPerfPfmReqHndlrSetPm1State_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_SET_PM1_STATE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPerfPfmReqHndlrSetPm1State__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPmgrPfmReqHndlrUpdateEdppLimit_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_UPDATE_EDPP_LIMIT_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPmgrPfmReqHndlrUpdateEdppLimit_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_UPDATE_EDPP_LIMIT_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPmgrPfmReqHndlrUpdateEdppLimit__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPmgrPfmReqHndlrGetEdppLimitInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_GET_EDPP_LIMIT_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPmgrPfmReqHndlrGetEdppLimitInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_GET_EDPP_LIMIT_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPmgrPfmReqHndlrGetEdppLimitInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalThermPfmReqHndlrUpdateTgpuLimit_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_THERM_PFM_REQ_HNDLR_UPDATE_TGPU_LIMIT_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalThermPfmReqHndlrUpdateTgpuLimit_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_THERM_PFM_REQ_HNDLR_UPDATE_TGPU_LIMIT_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalThermPfmReqHndlrUpdateTgpuLimit__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTgpMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_CONFIGURE_TGP_MODE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTgpMode_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_CONFIGURE_TGP_MODE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTgpMode__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTurboV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_CONFIGURE_TURBO_V2_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTurboV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_CONFIGURE_TURBO_V2_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTurboV2__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_GET_VPSTATE_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_GET_VPSTATE_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateMapping_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_GET_VPSTATE_MAPPING_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateMapping_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_GET_VPSTATE_MAPPING_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateMapping__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPerfPfmReqHndlrSetVpstate_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_SET_VPSTATE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalPerfPfmReqHndlrSetVpstate_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_SET_VPSTATE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalPerfPfmReqHndlrSetVpstate__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalPmgrUnsetDynamicBoostLimit_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdInternalPmgrUnsetDynamicBoostLimit_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdInternalPmgrUnsetDynamicBoostLimit__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdInternalDetectHsVideoBridge_IMPL(struct Subdevice *pSubdevice); - static inline NV_STATUS subdeviceCtrlCmdInternalDetectHsVideoBridge_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdInternalDetectHsVideoBridge__(pSubdevice); } -NV_STATUS subdeviceCtrlCmdInternalConfComputeGetStaticInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CONF_COMPUTE_GET_STATIC_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalConfComputeGetStaticInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CONF_COMPUTE_GET_STATIC_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalConfComputeGetStaticInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalConfComputeDeriveSwlKeys_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_SWL_KEYS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalConfComputeDeriveSwlKeys_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_SWL_KEYS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalConfComputeDeriveSwlKeys__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalConfComputeDeriveLceKeys_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalConfComputeDeriveLceKeys_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalConfComputeDeriveLceKeys__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalConfComputeRotateKeys_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CONF_COMPUTE_ROTATE_KEYS_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalConfComputeRotateKeys_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CONF_COMPUTE_ROTATE_KEYS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalConfComputeRotateKeys__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalConfComputeRCChannelsForKeyRotation_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CONF_COMPUTE_RC_CHANNELS_FOR_KEY_ROTATION_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalConfComputeRCChannelsForKeyRotation_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CONF_COMPUTE_RC_CHANNELS_FOR_KEY_ROTATION_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalConfComputeRCChannelsForKeyRotation__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalConfComputeSetGpuState_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_SET_GPU_STATE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalConfComputeSetGpuState_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_SET_GPU_STATE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalConfComputeSetGpuState__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalConfComputeSetSecurityPolicy_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_SET_SECURITY_POLICY_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalConfComputeSetSecurityPolicy_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_SET_SECURITY_POLICY_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalConfComputeSetSecurityPolicy__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalInitUserSharedData_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_INIT_USER_SHARED_DATA_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalInitUserSharedData_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_INIT_USER_SHARED_DATA_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalInitUserSharedData__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalUserSharedDataSetDataPoll_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_USER_SHARED_DATA_SET_DATA_POLL_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalUserSharedDataSetDataPoll_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_USER_SHARED_DATA_SET_DATA_POLL_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalUserSharedDataSetDataPoll__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdInternalGspStartTrace_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdInternalGspStartTrace_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalGspStartTrace__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdVgpuMgrInternalBootloadGspVgpuPluginTask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_BOOTLOAD_GSP_VGPU_PLUGIN_TASK_PARAMS *pParams); +static inline NV_STATUS subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPU_CLIENT_LOW_POWER_MODE_ENTER_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter__(pSubdevice, pParams); +} static inline NV_STATUS subdeviceCtrlCmdVgpuMgrInternalBootloadGspVgpuPluginTask_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_BOOTLOAD_GSP_VGPU_PLUGIN_TASK_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalBootloadGspVgpuPluginTask__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdVgpuMgrInternalShutdownGspVgpuPluginTask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_SHUTDOWN_GSP_VGPU_PLUGIN_TASK_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdVgpuMgrInternalShutdownGspVgpuPluginTask_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_SHUTDOWN_GSP_VGPU_PLUGIN_TASK_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalShutdownGspVgpuPluginTask__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdVgpuMgrInternalPgpuAddVgpuType_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_PGPU_ADD_VGPU_TYPE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdVgpuMgrInternalPgpuAddVgpuType_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_PGPU_ADD_VGPU_TYPE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalPgpuAddVgpuType__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdVgpuMgrInternalEnumerateVgpuPerPgpu_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_ENUMERATE_VGPU_PER_PGPU_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdVgpuMgrInternalEnumerateVgpuPerPgpu_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_ENUMERATE_VGPU_PER_PGPU_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalEnumerateVgpuPerPgpu__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdVgpuMgrInternalClearGuestVmInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_CLEAR_GUEST_VM_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdVgpuMgrInternalClearGuestVmInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_CLEAR_GUEST_VM_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalClearGuestVmInfo__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdVgpuMgrInternalGetVgpuFbUsage_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_GET_VGPU_FB_USAGE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdVgpuMgrInternalGetVgpuFbUsage_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_GET_VGPU_FB_USAGE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalGetVgpuFbUsage__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_SET_VGPU_ENCODER_CAPACITY_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_SET_VGPU_ENCODER_CAPACITY_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdVgpuMgrInternalCleanupGspVgpuPluginResources_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_VGPU_PLUGIN_CLEANUP_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdVgpuMgrInternalCleanupGspVgpuPluginResources_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_VGPU_PLUGIN_CLEANUP_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalCleanupGspVgpuPluginResources__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdVgpuMgrInternalGetPgpuFsEncoding_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_GET_PGPU_FS_ENCODING_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdVgpuMgrInternalGetPgpuFsEncoding_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_GET_PGPU_FS_ENCODING_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalGetPgpuFsEncoding__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdVgpuMgrInternalGetPgpuMigrationSupport_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_GET_PGPU_MIGRATION_SUPPORT_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdVgpuMgrInternalGetPgpuMigrationSupport_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_GET_PGPU_MIGRATION_SUPPORT_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalGetPgpuMigrationSupport__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_SET_VGPU_MGR_CONFIG_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_SET_VGPU_MGR_CONFIG_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdVgpuMgrInternalFreeStates_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_FREE_STATES_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdVgpuMgrInternalFreeStates_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_FREE_STATES_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalFreeStates__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdGetAvailableHshubMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_HSHUB_GET_AVAILABLE_MASK_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdGetAvailableHshubMask_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_HSHUB_GET_AVAILABLE_MASK_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGetAvailableHshubMask__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlSetEcThrottleMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_HSHUB_SET_EC_THROTTLE_MODE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlSetEcThrottleMode_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_HSHUB_SET_EC_THROTTLE_MODE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlSetEcThrottleMode__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdCcuMap_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CCU_MAP_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdCcuMap_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CCU_MAP_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdCcuMap__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdCcuUnmap_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CCU_UNMAP_INFO_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdCcuUnmap_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CCU_UNMAP_INFO_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdCcuUnmap__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdCcuSetStreamState_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CCU_STREAM_STATE_PARAMS *pParams); - static inline NV_STATUS subdeviceCtrlCmdCcuSetStreamState_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CCU_STREAM_STATE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdCcuSetStreamState__(pSubdevice, pParams); } -NV_STATUS subdeviceCtrlCmdSpdmPartition_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_SPDM_PARTITION_PARAMS *pSpdmPartitionParams); +static inline NV_STATUS subdeviceCtrlCmdCcuGetSampleInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CCU_SAMPLE_INFO_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdCcuGetSampleInfo__(pSubdevice, pParams); +} static inline NV_STATUS subdeviceCtrlCmdSpdmPartition_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_SPDM_PARTITION_PARAMS *pSpdmPartitionParams) { return pSubdevice->__subdeviceCtrlCmdSpdmPartition__(pSubdevice, pSpdmPartitionParams); } -static inline NvBool subdeviceShareCallback_DISPATCH(struct Subdevice *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__subdeviceShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS subdeviceControl_DISPATCH(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__subdeviceControl__(pGpuResource, pCallContext, pParams); } -static inline NV_STATUS subdeviceCheckMemInterUnmap_DISPATCH(struct Subdevice *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__subdeviceCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS subdeviceMap_DISPATCH(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__subdeviceMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS subdeviceGetOrAllocNotifShare_DISPATCH(struct Subdevice *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__subdeviceGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); +static inline NV_STATUS subdeviceUnmap_DISPATCH(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__subdeviceUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS subdeviceMapTo_DISPATCH(struct Subdevice *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__subdeviceMapTo__(pResource, pParams); +static inline NvBool subdeviceShareCallback_DISPATCH(struct Subdevice *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__subdeviceShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline NV_STATUS subdeviceGetMapAddrSpace_DISPATCH(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__subdeviceGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); -} +static inline NV_STATUS subdeviceGetRegBaseOffsetAndSize_DISPATCH(struct Subdevice *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__subdeviceGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +} -static inline void subdeviceSetNotificationShare_DISPATCH(struct Subdevice *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__subdeviceSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS subdeviceGetMapAddrSpace_DISPATCH(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__subdeviceGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NvU32 subdeviceGetRefCount_DISPATCH(struct Subdevice *pResource) { - return pResource->__subdeviceGetRefCount__(pResource); +static inline NvHandle subdeviceGetInternalObjectHandle_DISPATCH(struct Subdevice *pGpuResource) { + return pGpuResource->__subdeviceGetInternalObjectHandle__(pGpuResource); } -static inline void subdeviceAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct Subdevice *pResource, RsResourceRef *pReference) { - pResource->__subdeviceAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvBool subdeviceAccessCallback_DISPATCH(struct Subdevice *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__subdeviceAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS subdeviceControl_Prologue_DISPATCH(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__subdeviceControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS subdeviceGetMemInterMapParams_DISPATCH(struct Subdevice *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__subdeviceGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS subdeviceGetRegBaseOffsetAndSize_DISPATCH(struct Subdevice *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__subdeviceGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS subdeviceCheckMemInterUnmap_DISPATCH(struct Subdevice *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__subdeviceCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS subdeviceUnmapFrom_DISPATCH(struct Subdevice *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__subdeviceUnmapFrom__(pResource, pParams); +static inline NV_STATUS subdeviceGetMemoryMappingDescriptor_DISPATCH(struct Subdevice *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__subdeviceGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +} + +static inline NV_STATUS subdeviceControlSerialization_Prologue_DISPATCH(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__subdeviceControlSerialization_Prologue__(pResource, pCallContext, pParams); +} + +static inline void subdeviceControlSerialization_Epilogue_DISPATCH(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__subdeviceControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS subdeviceControl_Prologue_DISPATCH(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__subdeviceControl_Prologue__(pResource, pCallContext, pParams); } static inline void subdeviceControl_Epilogue_DISPATCH(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { pResource->__subdeviceControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NvHandle subdeviceGetInternalObjectHandle_DISPATCH(struct Subdevice *pGpuResource) { - return pGpuResource->__subdeviceGetInternalObjectHandle__(pGpuResource); +static inline NvBool subdeviceCanCopy_DISPATCH(struct Subdevice *pResource) { + return pResource->__subdeviceCanCopy__(pResource); } -static inline NV_STATUS subdeviceControl_DISPATCH(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__subdeviceControl__(pGpuResource, pCallContext, pParams); +static inline NV_STATUS subdeviceIsDuplicate_DISPATCH(struct Subdevice *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__subdeviceIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS subdeviceUnmap_DISPATCH(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__subdeviceUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool subdeviceIsPartialUnmapSupported_DISPATCH(struct Subdevice *pResource) { + return pResource->__subdeviceIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS subdeviceGetMemInterMapParams_DISPATCH(struct Subdevice *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__subdeviceGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS subdeviceMapTo_DISPATCH(struct Subdevice *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__subdeviceMapTo__(pResource, pParams); } -static inline NV_STATUS subdeviceGetMemoryMappingDescriptor_DISPATCH(struct Subdevice *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__subdeviceGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS subdeviceUnmapFrom_DISPATCH(struct Subdevice *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__subdeviceUnmapFrom__(pResource, pParams); +} + +static inline NvU32 subdeviceGetRefCount_DISPATCH(struct Subdevice *pResource) { + return pResource->__subdeviceGetRefCount__(pResource); +} + +static inline void subdeviceAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct Subdevice *pResource, RsResourceRef *pReference) { + pResource->__subdeviceAddAdditionalDependants__(pClient, pResource, pReference); +} + +static inline PEVENTNOTIFICATION * subdeviceGetNotificationListPtr_DISPATCH(struct Subdevice *pNotifier) { + return pNotifier->__subdeviceGetNotificationListPtr__(pNotifier); +} + +static inline struct NotifShare * subdeviceGetNotificationShare_DISPATCH(struct Subdevice *pNotifier) { + return pNotifier->__subdeviceGetNotificationShare__(pNotifier); +} + +static inline void subdeviceSetNotificationShare_DISPATCH(struct Subdevice *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__subdeviceSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS subdeviceUnregisterEvent_DISPATCH(struct Subdevice *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return pNotifier->__subdeviceUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static inline NV_STATUS subdeviceControlSerialization_Prologue_DISPATCH(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__subdeviceControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS subdeviceGetOrAllocNotifShare_DISPATCH(struct Subdevice *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return pNotifier->__subdeviceGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } -static inline NvBool subdeviceCanCopy_DISPATCH(struct Subdevice *pResource) { - return pResource->__subdeviceCanCopy__(pResource); +void subdevicePreDestruct_IMPL(struct Subdevice *pResource); + +NV_STATUS subdeviceInternalControlForward_IMPL(struct Subdevice *pSubdevice, NvU32 command, void *pParams, NvU32 size); + +NV_STATUS subdeviceControlFilter_IMPL(struct Subdevice *pSubdevice, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); + +static inline NV_STATUS subdeviceCtrlCmdBiosGetInfoV2_ac1694(struct Subdevice *pSubdevice, NV2080_CTRL_BIOS_GET_INFO_V2_PARAMS *pBiosInfoParams) { + return NV_OK; } -static inline NvBool subdeviceIsPartialUnmapSupported_DISPATCH(struct Subdevice *pResource) { - return pResource->__subdeviceIsPartialUnmapSupported__(pResource); +static inline NV_STATUS subdeviceCtrlCmdBiosGetInfoV2_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_BIOS_GET_INFO_V2_PARAMS *pBiosInfoParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS subdeviceIsDuplicate_DISPATCH(struct Subdevice *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__subdeviceIsDuplicate__(pResource, hMemory, pDuplicate); +NV_STATUS subdeviceCtrlCmdBiosGetNbsiV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BIOS_GET_NBSI_V2_PARAMS *pNbsiParams); + +NV_STATUS subdeviceCtrlCmdBiosGetSKUInfo_VF(struct Subdevice *pSubdevice, NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS *pBiosGetSKUInfoParams); + +static inline NV_STATUS subdeviceCtrlCmdBiosGetSKUInfo_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS *pBiosGetSKUInfoParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; } -static inline void subdeviceControlSerialization_Epilogue_DISPATCH(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__subdeviceControlSerialization_Epilogue__(pResource, pCallContext, pParams); +NV_STATUS subdeviceCtrlCmdBiosGetPostTime_VF(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BIOS_GET_POST_TIME_PARAMS *pBiosPostTime); + +static inline NV_STATUS subdeviceCtrlCmdBiosGetPostTime_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BIOS_GET_POST_TIME_PARAMS *pBiosPostTime) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; } -static inline PEVENTNOTIFICATION *subdeviceGetNotificationListPtr_DISPATCH(struct Subdevice *pNotifier) { - return pNotifier->__subdeviceGetNotificationListPtr__(pNotifier); +NV_STATUS subdeviceCtrlCmdBiosGetUefiSupport_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BIOS_GET_UEFI_SUPPORT_PARAMS *pUEFIParams); + +NV_STATUS subdeviceCtrlCmdMcGetArchInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_GET_ARCH_INFO_PARAMS *pArchInfoParams); + +NV_STATUS subdeviceCtrlCmdMcGetManufacturer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_GET_MANUFACTURER_PARAMS *pManufacturerParams); + +NV_STATUS subdeviceCtrlCmdMcQueryHostclkSlowdownStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_QUERY_HOSTCLK_SLOWDOWN_STATUS_PARAMS *pGetStatusParams); + +NV_STATUS subdeviceCtrlCmdMcSetHostclkSlowdownStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_SET_HOSTCLK_SLOWDOWN_STATUS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdMcChangeReplayableFaultOwnership_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_CHANGE_REPLAYABLE_FAULT_OWNERSHIP_PARAMS *pReplayableFaultOwnrshpParams); + +NV_STATUS subdeviceCtrlCmdMcServiceInterrupts_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_SERVICE_INTERRUPTS_PARAMS *pServiceInterruptParams); + +NV_STATUS subdeviceCtrlCmdMcGetEngineNotificationIntrVectors_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_GET_ENGINE_NOTIFICATION_INTR_VECTORS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdMcGetStaticIntrTable_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdDmaInvalidateTLB_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_DMA_INVALIDATE_TLB_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdDmaGetInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_DMA_GET_INFO_PARAMS *pDmaInfoParams); + +NV_STATUS subdeviceCtrlCmdBusGetPciInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_PCI_INFO_PARAMS *pPciInfoParams); + +NV_STATUS subdeviceCtrlCmdBusGetInfoV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_INFO_V2_PARAMS *pBusInfoParams); + +NV_STATUS subdeviceCtrlCmdBusGetPciBarInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_PCI_BAR_INFO_PARAMS *pBarInfoParams); + +NV_STATUS subdeviceCtrlCmdBusSetPcieSpeed_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_SET_PCIE_SPEED_PARAMS *pBusInfoParams); + +NV_STATUS subdeviceCtrlCmdBusSetPcieLinkWidth_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_SET_PCIE_LINK_WIDTH_PARAMS *pLinkWidthParams); + +NV_STATUS subdeviceCtrlCmdBusServiceGpuMultifunctionState_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_SERVICE_GPU_MULTIFUNC_STATE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBusGetPexCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_PEX_COUNTERS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBusGetBFD_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_BFD_PARAMSARR *pBusGetBFDParams); + +NV_STATUS subdeviceCtrlCmdBusGetAspmDisableFlags_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_ASPM_DISABLE_FLAGS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBusControlPublicAspmBits_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_CONTROL_PUBLIC_ASPM_BITS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBusClearPexCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_CLEAR_PEX_COUNTERS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBusGetPexUtilCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_PEX_UTIL_COUNTERS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBusClearPexUtilCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_CLEAR_PEX_UTIL_COUNTERS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBusFreezePexCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_FREEZE_PEX_COUNTERS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBusGetPexLaneCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_PEX_LANE_COUNTERS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBusGetPcieLtrLatency_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_PCIE_LTR_LATENCY_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBusSetPcieLtrLatency_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_SET_PCIE_LTR_LATENCY_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBusGetNvlinkPeerIdMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBusSetEomParameters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_SET_EOM_PARAMETERS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBusGetUphyDlnCfgSpace_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_UPHY_DLN_CFG_SPACE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBusGetEomStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_GET_EOM_STATUS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBusGetPcieReqAtomicsCaps_VF(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_PCIE_REQ_ATOMICS_CAPS_PARAMS *pParams); + +static inline NV_STATUS subdeviceCtrlCmdBusGetPcieReqAtomicsCaps_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_PCIE_REQ_ATOMICS_CAPS_PARAMS *pParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; } -static inline struct NotifShare *subdeviceGetNotificationShare_DISPATCH(struct Subdevice *pNotifier) { - return pNotifier->__subdeviceGetNotificationShare__(pNotifier); +NV_STATUS subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics_VF(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS *pParams); + +static inline NV_STATUS subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS *pParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS subdeviceMap_DISPATCH(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__subdeviceMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +NV_STATUS subdeviceCtrlCmdBusGetC2CInfo_VF(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_C2C_INFO_PARAMS *pParams); + +static inline NV_STATUS subdeviceCtrlCmdBusGetC2CInfo_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_BUS_GET_C2C_INFO_PARAMS *pParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; } -static inline NvBool subdeviceAccessCallback_DISPATCH(struct Subdevice *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__subdeviceAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +NV_STATUS subdeviceCtrlCmdBusSysmemAccess_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_SYSMEM_ACCESS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBusSetP2pMapping_VF(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_SET_P2P_MAPPING_PARAMS *pParams); + +static inline NV_STATUS subdeviceCtrlCmdBusSetP2pMapping_5baef9(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_SET_P2P_MAPPING_PARAMS *pParams) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +} + +NV_STATUS subdeviceCtrlCmdBusUnsetP2pMapping_VF(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_UNSET_P2P_MAPPING_PARAMS *pParams); + +static inline NV_STATUS subdeviceCtrlCmdBusUnsetP2pMapping_5baef9(struct Subdevice *pSubdevice, NV2080_CTRL_BUS_UNSET_P2P_MAPPING_PARAMS *pParams) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } +NV_STATUS subdeviceCtrlCmdGetNvlinkCountersV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_COUNTERS_V2_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdClearNvlinkCountersV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_CLEAR_COUNTERS_V2_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGetNvlinkCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_COUNTERS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdClearNvlinkCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_CLEAR_COUNTERS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBusGetNvlinkCaps_VF(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBusGetNvlinkCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBusGetNvlinkStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBusGetNvlinkErrInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_ERR_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinGetLinkFomValues_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_NVLINK_GET_LINK_FOM_VALUES_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkGetNvlinkEccErrors_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_NVLINK_ECC_ERRORS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkGetLinkFatalErrorCounts_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_LINK_FATAL_ERROR_COUNTS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkSetupEom_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_NVLINK_SETUP_EOM_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkGetPowerState_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_POWER_STATE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkReadTpCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_READ_TP_COUNTERS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkGetLpCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_LP_COUNTERS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkEnableNvlinkPeer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkCoreCallback_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkGetAliEnabled_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_ALI_ENABLED_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkSetLoopbackMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkUpdateHshubMux_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkRemoveNvlinkMapping_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_REMOVE_NVLINK_MAPPING_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkSaveRestoreHshubState_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SAVE_RESTORE_HSHUB_STATE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkProgramBufferready_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_PROGRAM_BUFFERREADY_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkUpdateCurrentConfig_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_UPDATE_CURRENT_CONFIG_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkUpdatePeerLinkMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_UPDATE_PEER_LINK_MASK_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkUpdateLinkConnection_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_UPDATE_LINK_CONNECTION_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkEnableLinksPostTopology_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_ENABLE_LINKS_POST_TOPOLOGY_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkPreLinkTrainAli_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_PRE_LINK_TRAIN_ALI_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkGetRefreshCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_REFRESH_COUNTERS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkClearRefreshCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_CLEAR_REFRESH_COUNTERS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkGetLinkMaskPostRxDet_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_LINK_MASK_POST_RX_DET_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkLinkTrainAli_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_LINK_TRAIN_ALI_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkGetNvlinkDeviceInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_NVLINK_DEVICE_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkGetIoctrlDeviceInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_IOCTRL_DEVICE_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkProgramLinkSpeed_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_PROGRAM_LINK_SPEED_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkAreLinksTrained_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_ARE_LINKS_TRAINED_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkResetLinks_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_RESET_LINKS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkDisableDlInterrupts_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_DISABLE_DL_INTERRUPTS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkGetLinkAndClockInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkSetupNvlinkSysmem_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SETUP_NVLINK_SYSMEM_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkProcessForcedConfigs_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_PROCESS_FORCED_CONFIGS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkSyncLaneShutdownProps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SYNC_NVLINK_SHUTDOWN_PROPS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkEnableSysmemNvlinkAts_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_ENABLE_SYSMEM_NVLINK_ATS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkHshubGetSysmemNvlinkMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_HSHUB_GET_SYSMEM_NVLINK_MASK_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkGetSetNvswitchFlaAddr_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_SET_NVSWITCH_FLA_ADDR_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkSyncLinkMasksAndVbiosInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SYNC_LINK_MASKS_AND_VBIOS_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkEnableLinks_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdNvlinkProcessInitDisabledLinks_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_PROCESS_INIT_DISABLED_LINKS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkInbandSendData_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_INBAND_SEND_DATA_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkPostFaultUp_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_POST_FAULT_UP_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkEomControl_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_EOM_CONTROL_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkSetL1Threshold_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SET_L1_THRESHOLD_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkDirectConnectCheck_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_DIRECT_CONNECT_CHECK_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkGetL1Threshold_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_L1_THRESHOLD_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdIsNvlinkReducedConfig_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_IS_REDUCED_CONFIG_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvlinkGetPortEvents_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_PORT_EVENTS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdI2cReadBuffer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_I2C_READ_BUFFER_PARAMS *pI2cParams); + +NV_STATUS subdeviceCtrlCmdI2cWriteBuffer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_I2C_WRITE_BUFFER_PARAMS *pI2cParams); + +NV_STATUS subdeviceCtrlCmdI2cReadReg_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_I2C_RW_REG_PARAMS *pI2cParams); + +NV_STATUS subdeviceCtrlCmdI2cWriteReg_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_I2C_RW_REG_PARAMS *pI2cParams); + +NV_STATUS subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2_VF(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_GPUMON_PERFMON_UTIL_SAMPLES_V2_PARAMS *pParams); + +static inline NV_STATUS subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2_5baef9(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_GPUMON_PERFMON_UTIL_SAMPLES_V2_PARAMS *pParams) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +} + +NV_STATUS subdeviceCtrlCmdPerfRatedTdpGetControl_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_RATED_TDP_CONTROL_PARAMS *pControlParams); + +NV_STATUS subdeviceCtrlCmdPerfRatedTdpSetControl_KERNEL(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_RATED_TDP_CONTROL_PARAMS *pControlParams); + +NV_STATUS subdeviceCtrlCmdPerfReservePerfmonHw_KERNEL(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_RESERVE_PERFMON_HW_PARAMS *pPerfmonParams); + +static inline NV_STATUS subdeviceCtrlCmdPerfReservePerfmonHw_46f6a7(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_RESERVE_PERFMON_HW_PARAMS *pPerfmonParams) { + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS subdeviceCtrlCmdPerfSetAuxPowerState_KERNEL(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_SET_AUX_POWER_STATE_PARAMS *pPowerStateParams); + +NV_STATUS subdeviceCtrlCmdPerfSetPowerstate_KERNEL(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_SET_POWERSTATE_PARAMS *pPowerInfoParams); + +NV_STATUS subdeviceCtrlCmdPerfGetLevelInfo_V2_VF(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_LEVEL_INFO_V2_PARAMS *pLevelInfoParams); + +static inline NV_STATUS subdeviceCtrlCmdPerfGetLevelInfo_V2_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_LEVEL_INFO_V2_PARAMS *pLevelInfoParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS subdeviceCtrlCmdPerfGetCurrentPstate_VF(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_CURRENT_PSTATE_PARAMS *pInfoParams); + +static inline NV_STATUS subdeviceCtrlCmdPerfGetCurrentPstate_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_CURRENT_PSTATE_PARAMS *pInfoParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample_VF(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_VID_ENG_PERFMON_SAMPLE_PARAMS *pSampleParams); + +static inline NV_STATUS subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_VID_ENG_PERFMON_SAMPLE_PARAMS *pSampleParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS subdeviceCtrlCmdPerfGetPowerstate_VF(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_POWERSTATE_PARAMS *powerInfoParams); + +static inline NV_STATUS subdeviceCtrlCmdPerfGetPowerstate_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_GET_POWERSTATE_PARAMS *powerInfoParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +static inline NV_STATUS subdeviceCtrlCmdPerfNotifyVideoevent_ac1694(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_NOTIFY_VIDEOEVENT_PARAMS *pVideoEventParams) { + return NV_OK; +} + +static inline NV_STATUS subdeviceCtrlCmdPerfNotifyVideoevent_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_NOTIFY_VIDEOEVENT_PARAMS *pVideoEventParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS subdeviceCtrlCmdKPerfBoost_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_PERF_BOOST_PARAMS *pBoostParams); + +NV_STATUS subdeviceCtrlCmdFbGetFBRegionInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_PARAMS *pGFBRIParams); + +NV_STATUS subdeviceCtrlCmdFbGetBar1Offset_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_BAR1_OFFSET_PARAMS *pFbMemParams); + +NV_STATUS subdeviceCtrlCmdFbIsKind_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_IS_KIND_PARAMS *pIsKindParams); + +NV_STATUS subdeviceCtrlCmdFbGetMemAlignment_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_MEM_ALIGNMENT_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFbGetHeapReservationSize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FB_GET_HEAP_RESERVATION_SIZE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalMemmgrGetVgpuHostRmReservedFb_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMMGR_GET_VGPU_CONFIG_HOST_RESERVED_FB_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGbGetSemaphoreSurfaceLayout_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_SEMAPHORE_SURFACE_LAYOUT_PARAMS *pParams); + +static inline NV_STATUS subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp_46f6a7(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMMGR_MEMORY_TRANSFER_WITH_GSP_PARAMS *pParams) { + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS subdeviceCtrlCmdFbGetInfoV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_INFO_V2_PARAMS *pFbInfoParams); + +NV_STATUS subdeviceCtrlCmdFbGetCarveoutAddressInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_SYSTEM_CARVEOUT_ADDRESS_SPACE_INFO *pParams); + +NV_STATUS subdeviceCtrlCmdFbGetCalibrationLockFailed_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_CALIBRATION_LOCK_FAILED_PARAMS *pGCLFParams); + +NV_STATUS subdeviceCtrlCmdFbFlushGpuCache_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_FLUSH_GPU_CACHE_PARAMS *pCacheFlushParams); + +NV_STATUS subdeviceCtrlCmdFbSetGpuCacheAllocPolicy_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFbGetGpuCacheAllocPolicy_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS *pGpuCacheAllocPolicyParams); + +NV_STATUS subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFbGetGpuCacheInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_GPU_CACHE_INFO_PARAMS *pGpuCacheParams); + +NV_STATUS subdeviceCtrlCmdFbGetCliManagedOfflinedPages_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_CLI_MANAGED_OFFLINED_PAGES_PARAMS *pOsOfflinedParams); + +NV_STATUS subdeviceCtrlCmdFbGetOfflinedPages_VF(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_OFFLINED_PAGES_PARAMS *pBlackListParams); + +static inline NV_STATUS subdeviceCtrlCmdFbGetOfflinedPages_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_OFFLINED_PAGES_PARAMS *pBlackListParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS subdeviceCtrlCmdFbSetupVprRegion_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FB_SETUP_VPR_REGION_PARAMS *pCliReqParams); + +NV_STATUS subdeviceCtrlCmdFbGetLTCInfoForFBP_VF(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_LTC_INFO_FOR_FBP_PARAMS *pParams); + +static inline NV_STATUS subdeviceCtrlCmdFbGetLTCInfoForFBP_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_LTC_INFO_FOR_FBP_PARAMS *pParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS subdeviceCtrlCmdFbGetCompBitCopyConstructInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FB_GET_COMPBITCOPY_CONSTRUCT_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFbPatchPbrForMining_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_PATCH_PBR_FOR_MINING_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFbGetRemappedRows_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_REMAPPED_ROWS_PARAMS *pRemappedRowsParams); + +NV_STATUS subdeviceCtrlCmdFbGetFsInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_FS_INFO_PARAMS *pInfoParams); + +NV_STATUS subdeviceCtrlCmdFbGetRowRemapperHistogram_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_ROW_REMAPPER_HISTOGRAM_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFbGetDynamicOfflinedPages_VF(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_DYNAMIC_OFFLINED_PAGES_PARAMS *pParams); + +static inline NV_STATUS subdeviceCtrlCmdFbGetDynamicOfflinedPages_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_DYNAMIC_OFFLINED_PAGES_PARAMS *pParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS subdeviceCtrlCmdFbUpdateNumaStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_UPDATE_NUMA_STATUS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFbGetNumaInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_NUMA_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdMemSysGetStaticConfig_VF(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_GET_STATIC_CONFIG_PARAMS *pParams); + +static inline NV_STATUS subdeviceCtrlCmdMemSysGetStaticConfig_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_GET_STATIC_CONFIG_PARAMS *pParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS subdeviceCtrlCmdMemSysSetPartitionableMem_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_SET_PARTITIONABLE_MEM_PARAMS *pParams); + +static inline NV_STATUS subdeviceCtrlCmdKMemSysGetMIGMemoryConfig_133e5e(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_GET_MIG_MEMORY_CONFIG_PARAMS *pParams) { + return subdeviceInternalControlForward(pSubdevice, (545262184), pParams, sizeof (*pParams)); +} + +NV_STATUS subdeviceCtrlCmdFbSetZbcReferenced_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_SET_ZBC_REFERENCED_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdMemSysL2InvalidateEvict_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_L2_INVALIDATE_EVICT_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdMemSysFlushL2AllRamsAndCaches_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdMemSysDisableNvlinkPeers_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdMemSysProgramRawCompressionMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_PROGRAM_RAW_COMPRESSION_MODE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdMemSysGetMIGMemoryPartitionTable_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_GET_MIG_MEMORY_PARTITION_TABLE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFbGetCtagsForCbcEviction_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_CTAGS_FOR_CBC_EVICTION_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFbCBCOp_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FB_CBC_OP_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFbSetRrd_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_SET_RRD_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFbSetReadLimit_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_SET_READ_LIMIT_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFbSetWriteLimit_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_SET_WRITE_LIMIT_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGmmuCommitTlbInvalidate_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GMMU_COMMIT_TLB_INVALIDATE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdSetGpfifo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_SET_GPFIFO_PARAMS *pSetGpFifoParams); + +NV_STATUS subdeviceCtrlCmdSetOperationalProperties_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_SET_OPERATIONAL_PROPERTIES_PARAMS *pSetOperationalProperties); + +NV_STATUS subdeviceCtrlCmdFifoBindEngines_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_BIND_ENGINES_PARAMS *pBindParams); + +NV_STATUS subdeviceCtrlCmdGetPhysicalChannelCount_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_GET_PHYSICAL_CHANNEL_COUNT_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFifoGetInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_GET_INFO_PARAMS *pFifoInfoParams); + +NV_STATUS subdeviceCtrlCmdFifoDisableChannels_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_DISABLE_CHANNELS_PARAMS *pDisableChannelParams); + +NV_STATUS subdeviceCtrlCmdFifoDisableChannelsForKeyRotation_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_DISABLE_CHANNELS_FOR_KEY_ROTATION_PARAMS *pDisableChannelParams); + +NV_STATUS subdeviceCtrlCmdFifoDisableUsermodeChannels_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_DISABLE_USERMODE_CHANNELS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFifoGetChannelMemInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FIFO_GET_CHANNEL_MEM_INFO_PARAMS *pChannelMemParams); + +NV_STATUS subdeviceCtrlCmdFifoGetUserdLocation_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FIFO_GET_USERD_LOCATION_PARAMS *pUserdLocationParams); + +NV_STATUS subdeviceCtrlCmdFifoObjschedSwGetLog_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_OBJSCHED_SW_GET_LOG_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFifoObjschedGetState_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_OBJSCHED_GET_STATE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFifoObjschedSetState_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_OBJSCHED_SET_STATE_PARAMS *pParams); + +static inline NV_STATUS subdeviceCtrlCmdFifoObjschedGetCaps_ac1694(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_OBJSCHED_GET_CAPS_PARAMS *pParams) { + return NV_OK; +} + +static inline NV_STATUS subdeviceCtrlCmdFifoObjschedGetCaps_5baef9(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_OBJSCHED_GET_CAPS_PARAMS *pParams) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +} + +NV_STATUS subdeviceCtrlCmdFifoGetDeviceInfoTable_VF(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_PARAMS *pParams); + +static inline NV_STATUS subdeviceCtrlCmdFifoGetDeviceInfoTable_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_PARAMS *pParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS subdeviceCtrlCmdFifoSetupVfZombieSubctxPdb_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_SETUP_VF_ZOMBIE_SUBCTX_PDB_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFifoClearFaultedBit_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_FIFO_CLEAR_FAULTED_BIT_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFifoRunlistSetSchedPolicy_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_RUNLIST_SET_SCHED_POLICY_PARAMS *pSchedPolicyParams); + +NV_STATUS subdeviceCtrlCmdFifoUpdateChannelInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_UPDATE_CHANNEL_INFO_PARAMS *pChannelInfo); + +NV_STATUS subdeviceCtrlCmdInternalFifoPromoteRunlistBuffers_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FIFO_PROMOTE_RUNLIST_BUFFERS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalFifoGetNumChannels_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FIFO_GET_NUM_CHANNELS_PARAMS *pNumChannelsParams); + +NV_STATUS subdeviceCtrlCmdFifoGetAllocatedChannels_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_GET_ALLOCATED_CHANNELS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalFifoGetNumSecureChannels_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FIFO_GET_NUM_SECURE_CHANNELS_PARAMS *pNumSecureChannelsParams); + +NV_STATUS subdeviceCtrlCmdInternalFifoGetLogicalUprocId_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FIFO_GET_LOGICAL_UPROC_ID_PARAMS *pLogicalUprocIdParams); + +NV_STATUS subdeviceCtrlCmdInternalFifoToggleActiveChannelScheduling_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING_PARAMS *pToggleActiveChannelSchedulingParams); + +NV_STATUS subdeviceCtrlCmdKGrGetInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetInfoV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_INFO_V2_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetCapsV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_CAPS_V2_PARAMS *pGrCapsParams); + +NV_STATUS subdeviceCtrlCmdKGrGetCtxswModes_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_CTXSW_MODES_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrCtxswZcullMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_ZCULL_MODE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrCtxswZcullBind_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_ZCULL_BIND_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetZcullInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_ZCULL_INFO_PARAMS *pZcullInfoParams); + +NV_STATUS subdeviceCtrlCmdKGrCtxswPmMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_PM_MODE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrCtxswPmBind_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_PM_BIND_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrCtxswSetupBind_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_SETUP_BIND_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrSetGpcTileMap_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_SET_GPC_TILE_MAP_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrCtxswSmpcMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_SMPC_MODE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrPcSamplingMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_PC_SAMPLING_MODE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetSmToGpcTpcMappings_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_SM_TO_GPC_TPC_MAPPINGS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetGlobalSmOrder_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_GLOBAL_SM_ORDER_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrSetCtxswPreemptionMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_SET_CTXSW_PREEMPTION_MODE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrCtxswPreemptionBind_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetROPInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_ROP_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetCtxswStats_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_CTXSW_STATS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetCtxBufferSize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_CTX_BUFFER_SIZE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetCtxBufferInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_CTX_BUFFER_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetCtxBufferPtes_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_KGR_GET_CTX_BUFFER_PTES_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetCurrentResidentChannel_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_CURRENT_RESIDENT_CHANNEL_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetVatAlarmData_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_VAT_ALARM_DATA_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetAttributeBufferSize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_ATTRIBUTE_BUFFER_SIZE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGfxPoolQuerySize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GFX_POOL_QUERY_SIZE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGfxPoolInitialize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GFX_POOL_INITIALIZE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGfxPoolAddSlots_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GFX_POOL_ADD_SLOTS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGfxPoolRemoveSlots_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GFX_POOL_REMOVE_SLOTS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetPpcMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_PPC_MASK_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrSetTpcPartitionMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_SET_TPC_PARTITION_MODE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetSmIssueRateModifier_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrFecsBindEvtbufForUid_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_FECS_BIND_EVTBUF_FOR_UID_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrFecsBindEvtbufForUidV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_FECS_BIND_EVTBUF_FOR_UID_V2_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetPhysGpcMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_PHYS_GPC_MASK_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetGpcMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_GPC_MASK_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetTpcMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_TPC_MASK_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetEngineContextProperties_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetNumTpcsForGpc_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_NUM_TPCS_FOR_GPC_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetGpcTileMap_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_GPC_TILE_MAP_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetZcullMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_ZCULL_MASK_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrGetGfxGpcAndTpcInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GR_GET_GFX_GPC_AND_TPC_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_CAPS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetGlobalSmOrder_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_GLOBAL_SM_ORDER_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetFloorsweepingMasks_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_FLOORSWEEPING_MASKS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetPpcMasks_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_PPC_MASKS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetZcullInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetRopInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_ROP_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetContextBuffersInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_CONTEXT_BUFFERS_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetSmIssueRateModifier_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetFecsRecordSize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_RECORD_SIZE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetFecsTraceDefines_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_TRACE_DEFINES_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdKGrInternalStaticGetPdbProperties_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_PDB_PROPERTIES_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGrInternalSetFecsTraceHwEnable_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GR_SET_FECS_TRACE_HW_ENABLE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGrInternalGetFecsTraceHwEnable_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GR_GET_FECS_TRACE_HW_ENABLE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGrInternalSetFecsTraceRdOffset_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GR_SET_FECS_TRACE_RD_OFFSET_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGrInternalGetFecsTraceRdOffset_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GR_GET_FECS_TRACE_RD_OFFSET_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGrInternalSetFecsTraceWrOffset_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GR_SET_FECS_TRACE_WR_OFFSET_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGrStaticGetFecsTraceDefines_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_TRACE_DEFINES_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetCachedInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_INFO_V2_PARAMS *pGpuInfoParams); + +NV_STATUS subdeviceCtrlCmdGpuGetInfoV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_INFO_V2_PARAMS *pGpuInfoParams); + +NV_STATUS subdeviceCtrlCmdGpuGetIpVersion_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_IP_VERSION_PARAMS *pGpuIpVersionParams); + +NV_STATUS subdeviceCtrlCmdGpuGetPhysicalBridgeVersionInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_PHYSICAL_BRIDGE_VERSION_INFO_PARAMS *pBridgeInfoParams); + +NV_STATUS subdeviceCtrlCmdGpuGetAllBridgesUpstreamOfGpu_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ALL_BRIDGES_UPSTREAM_OF_GPU_PARAMS *pBridgeInfoParams); + +NV_STATUS subdeviceCtrlCmdGpuSetOptimusInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_OPTIMUS_INFO_PARAMS *pGpuOptimusInfoParams); + +NV_STATUS subdeviceCtrlCmdGpuGetNameString_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_NAME_STRING_PARAMS *pNameStringParams); + +NV_STATUS subdeviceCtrlCmdGpuGetShortNameString_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_SHORT_NAME_STRING_PARAMS *pShortNameStringParams); + +NV_STATUS subdeviceCtrlCmdGpuGetEncoderCapacity_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENCODER_CAPACITY_PARAMS *pEncoderCapacityParams); + +NV_STATUS subdeviceCtrlCmdGpuGetNvencSwSessionStats_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_NVENC_SW_SESSION_STATS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetNvencSwSessionInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_NVENC_SW_SESSION_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetNvencSwSessionInfoV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_NVENC_SW_SESSION_INFO_V2_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetNvfbcSwSessionStats_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_NVFBC_SW_SESSION_STATS_PARAMS *params); + +NV_STATUS subdeviceCtrlCmdGpuGetNvfbcSwSessionInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_NVFBC_SW_SESSION_INFO_PARAMS *params); + +NV_STATUS subdeviceCtrlCmdGpuSetFabricAddr_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_FABRIC_BASE_ADDR_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuSetEgmGpaFabricAddr_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_EGM_GPA_FABRIC_BASE_ADDR_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuSetPower_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_POWER_PARAMS *pSetPowerParams); + +NV_STATUS subdeviceCtrlCmdGpuGetSdm_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_SDM_PARAMS *pSdmParams); + +NV_STATUS subdeviceCtrlCmdGpuSetSdm_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_SDM_PARAMS *pSdmParams); + +NV_STATUS subdeviceCtrlCmdGpuGetSimulationInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_SIMULATION_INFO_PARAMS *pGpuSimulationInfoParams); + +NV_STATUS subdeviceCtrlCmdGpuGetEngines_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINES_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetEnginesV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINES_V2_PARAMS *pEngineParams); + +NV_STATUS subdeviceCtrlCmdGpuGetEngineClasslist_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINE_CLASSLIST_PARAMS *pClassParams); + +NV_STATUS subdeviceCtrlCmdGpuGetEnginePartnerList_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINE_PARTNERLIST_PARAMS *pPartnerListParams); + +NV_STATUS subdeviceCtrlCmdGpuGetFermiGpcInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_FERMI_GPC_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetFermiTpcInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_FERMI_TPC_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetFermiZcullInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_FERMI_ZCULL_INFO_PARAMS *pGpuFermiZcullInfoParams); + +NV_STATUS subdeviceCtrlCmdGpuGetPesInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_PES_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuExecRegOps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_EXEC_REG_OPS_PARAMS *pRegParams); + +NV_STATUS subdeviceCtrlCmdGpuMigratableOps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_MIGRATABLE_OPS_PARAMS *pRegParams); + +NV_STATUS subdeviceCtrlCmdGpuQueryMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_MODE_PARAMS *pQueryMode); + +NV_STATUS subdeviceCtrlCmdGpuGetInforomImageVersion_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_INFOROM_IMAGE_VERSION_PARAMS *pVersionInfo); + +NV_STATUS subdeviceCtrlCmdGpuGetInforomObjectVersion_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_INFOROM_OBJECT_VERSION_PARAMS *pVersionInfo); + +NV_STATUS subdeviceCtrlCmdGpuQueryInforomEccSupport_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdGpuQueryEccStatus_VF(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS *pParams); + +static inline NV_STATUS subdeviceCtrlCmdGpuQueryEccStatus_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS *pParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS subdeviceCtrlCmdGpuGetChipDetails_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_CHIP_DETAILS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetOEMBoardInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_OEM_BOARD_INFO_PARAMS *pBoardInfo); + +NV_STATUS subdeviceCtrlCmdGpuGetOEMInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_OEM_INFO_PARAMS *pOemInfo); + +NV_STATUS subdeviceCtrlCmdGpuHandleGpuSR_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdGpuSetComputeModeRules_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_COMPUTE_MODE_RULES_PARAMS *pSetRulesParams); + +NV_STATUS subdeviceCtrlCmdGpuQueryComputeModeRules_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_COMPUTE_MODE_RULES_PARAMS *pQueryRulesParams); + +NV_STATUS subdeviceCtrlCmdGpuAcquireComputeModeReservation_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdGpuReleaseComputeModeReservation_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdGpuInitializeCtx_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_INITIALIZE_CTX_PARAMS *pInitializeCtxParams); + +NV_STATUS subdeviceCtrlCmdGpuPromoteCtx_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_PROMOTE_CTX_PARAMS *pPromoteCtxParams); + +NV_STATUS subdeviceCtrlCmdGpuEvictCtx_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_EVICT_CTX_PARAMS *pEvictCtxParams); + +NV_STATUS subdeviceCtrlCmdGpuGetId_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ID_PARAMS *pIdParams); + +NV_STATUS subdeviceCtrlCmdGpuGetGidInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_GID_INFO_PARAMS *pGidInfoParams); + +NV_STATUS subdeviceCtrlCmdGpuQueryIllumSupport_VF(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GPU_QUERY_ILLUM_SUPPORT_PARAMS *pConfigParams); + +static inline NV_STATUS subdeviceCtrlCmdGpuQueryIllumSupport_5baef9(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GPU_QUERY_ILLUM_SUPPORT_PARAMS *pConfigParams) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +} + +NV_STATUS subdeviceCtrlCmdGpuGetIllum_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GPU_ILLUM_PARAMS *pConfigParams); + +NV_STATUS subdeviceCtrlCmdGpuSetIllum_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GPU_ILLUM_PARAMS *pConfigParams); + +NV_STATUS subdeviceCtrlCmdGpuQueryScrubberStatus_VF(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_SCRUBBER_STATUS_PARAMS *pParams); + +static inline NV_STATUS subdeviceCtrlCmdGpuQueryScrubberStatus_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_SCRUBBER_STATUS_PARAMS *pParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS subdeviceCtrlCmdGpuGetVprCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_VPR_CAPS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetVprInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_VPR_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetPids_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_PIDS_PARAMS *pGetPidsParams); + +NV_STATUS subdeviceCtrlCmdGpuGetPidInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_PID_INFO_PARAMS *pGetPidInfoParams); + +NV_STATUS subdeviceCtrlCmdGpuQueryFunctionStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GPU_QUERY_FUNCTION_STATUS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuReportNonReplayableFault_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_REPORT_NON_REPLAYABLE_FAULT_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetEngineFaultInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINE_FAULT_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetEngineRunlistPriBase_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINE_RUNLIST_PRI_BASE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetHwEngineId_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_HW_ENGINE_ID_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetVmmuSegmentSize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_VMMU_SEGMENT_SIZE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetMaxSupportedPageSize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_MAX_SUPPORTED_PAGE_SIZE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuHandleVfPriFault_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GPU_HANDLE_VF_PRI_FAULT_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuSetComputePolicyConfig_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_COMPUTE_POLICY_CONFIG_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetComputePolicyConfig_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_COMPUTE_POLICY_CONFIG_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdValidateMemMapRequest_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_VALIDATE_MEM_MAP_REQUEST_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetGfid_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_GFID_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdUpdateGfidP2pCapability_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GPU_UPDATE_GFID_P2P_CAPABILITY_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetEngineLoadTimes_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINE_LOAD_TIMES_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGetP2pCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GET_P2P_CAPS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGetGpuFabricProbeInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GET_GPU_FABRIC_PROBE_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetResetStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_RESET_STATUS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetDrainAndResetStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_DRAIN_AND_RESET_STATUS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetConstructedFalconInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_CONSTRUCTED_FALCON_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlGpuGetFipsStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_FIPS_STATUS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdEventSetTrigger_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdEventSetTriggerFifo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_SET_TRIGGER_FIFO_PARAMS *pTriggerFifoParams); + +NV_STATUS subdeviceCtrlCmdEventSetNotification_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_SET_NOTIFICATION_PARAMS *pSetEventParams); + +NV_STATUS subdeviceCtrlCmdEventSetMemoryNotifies_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_SET_MEMORY_NOTIFIES_PARAMS *pSetMemoryNotifiesParams); + +NV_STATUS subdeviceCtrlCmdEventSetSemaphoreMemory_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_SET_SEMAPHORE_MEMORY_PARAMS *pSetSemMemoryParams); + +NV_STATUS subdeviceCtrlCmdEventSetSemaMemValidation_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_SET_SEMA_MEM_VALIDATION_PARAMS *pSetSemaMemValidationParams); + +NV_STATUS subdeviceCtrlCmdEventVideoBindEvtbuf_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_VIDEO_BIND_EVTBUF_PARAMS *pBindParams); + +NV_STATUS subdeviceCtrlCmdEventGspTraceRatsBindEvtbuf_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_RATS_GSP_TRACE_BIND_EVTBUF_PARAMS *pBindParams); + +NV_STATUS subdeviceCtrlCmdTimerCancel_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdTimerSchedule_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_TIMER_SCHEDULE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdTimerGetTime_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_TIMER_GET_TIME_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdTimerGetRegisterOffset_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_TIMER_GET_REGISTER_OFFSET_PARAMS *pTimerRegOffsetParams); + +NV_STATUS subdeviceCtrlCmdTimerGetGpuCpuTimeCorrelationInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_TIMER_GET_GPU_CPU_TIME_CORRELATION_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdTimerSetGrTickFreq_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_TIMER_SET_GR_TICK_FREQ_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdRcReadVirtualMem_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_RC_READ_VIRTUAL_MEM_PARAMS *pReadVirtMemParam); + +NV_STATUS subdeviceCtrlCmdRcGetErrorCount_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_RC_GET_ERROR_COUNT_PARAMS *pErrorCount); + +NV_STATUS subdeviceCtrlCmdRcGetErrorV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_RC_GET_ERROR_V2_PARAMS *pErrorParams); + +NV_STATUS subdeviceCtrlCmdRcSetCleanErrorHistory_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdRcGetWatchdogInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_RC_GET_WATCHDOG_INFO_PARAMS *pWatchdogInfoParams); + +NV_STATUS subdeviceCtrlCmdRcDisableWatchdog_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdRcSoftDisableWatchdog_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdRcEnableWatchdog_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdRcReleaseWatchdogRequests_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdInternalRcWatchdogTimeout_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdSetRcRecovery_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_RC_RECOVERY_PARAMS *pRcRecovery); + +NV_STATUS subdeviceCtrlCmdGetRcRecovery_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_RC_RECOVERY_PARAMS *pRcRecovery); + +NV_STATUS subdeviceCtrlCmdGetRcInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_RC_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdSetRcInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_RC_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdNvdGetDumpSize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVD_GET_DUMP_SIZE_PARAMS *pDumpSizeParams); + +NV_STATUS subdeviceCtrlCmdNvdGetDump_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVD_GET_DUMP_PARAMS *pDumpParams); + +NV_STATUS subdeviceCtrlCmdNvdGetNocatJournalRpt_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVD_GET_NOCAT_JOURNAL_PARAMS *pReportParams); + +NV_STATUS subdeviceCtrlCmdNvdSetNocatJournalData_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVD_SET_NOCAT_JOURNAL_DATA_PARAMS *pReportParams); + +NV_STATUS subdeviceCtrlCmdNvdInsertNocatJournalRecord_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_NVD_INSERT_NOCAT_JOURNAL_RECORD_PARAMS *pReportParams); + +NV_STATUS subdeviceCtrlCmdPmgrGetModuleInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_PMGR_MODULE_INFO_PARAMS *pModuleInfoParams); + +NV_STATUS subdeviceCtrlCmdGpuProcessPostGc6ExitTasks_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdGc6Entry_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GC6_ENTRY_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGc6Exit_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GC6_EXIT_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdLpwrDifrPrefetchResponse_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_LPWR_DIFR_PREFETCH_RESPONSE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdLpwrDifrCtrl_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_LPWR_DIFR_CTRL_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdCeGetCaps_VF(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_CAPS_PARAMS *pCeCapsParams); + +NV_STATUS subdeviceCtrlCmdCeGetCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_CAPS_PARAMS *pCeCapsParams); + +NV_STATUS subdeviceCtrlCmdCeGetCePceMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_CE_PCE_MASK_PARAMS *pCePceMaskParams); + +NV_STATUS subdeviceCtrlCmdCeUpdatePceLceMappings_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_UPDATE_PCE_LCE_MAPPINGS_PARAMS *pCeUpdatePceLceMappingsParams); + +NV_STATUS subdeviceCtrlCmdCeGetCapsV2_VF(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_CAPS_V2_PARAMS *pCeCapsParams); + +NV_STATUS subdeviceCtrlCmdCeGetCapsV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_CAPS_V2_PARAMS *pCeCapsParams); + +NV_STATUS subdeviceCtrlCmdCeGetAllCaps_VF(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS *pCeCapsParams); + +NV_STATUS subdeviceCtrlCmdCeGetAllCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS *pCeCapsParams); + +NV_STATUS subdeviceCtrlCmdFlcnGetDmemUsage_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_GET_DMEM_USAGE_PARAMS *pFlcnDmemUsageParams); + +NV_STATUS subdeviceCtrlCmdFlcnGetEngineArch_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_GET_ENGINE_ARCH_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFlcnUstreamerQueueInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_USTREAMER_QUEUE_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFlcnUstreamerControlGet_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_USTREAMER_CONTROL_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFlcnUstreamerControlSet_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_USTREAMER_CONTROL_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFlcnGetCtxBufferInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_GET_CTX_BUFFER_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFlcnGetCtxBufferSize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_GET_CTX_BUFFER_SIZE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdEccGetClientExposedCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_ECC_GET_CLIENT_EXPOSED_COUNTERS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdEccGetEciCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_ECC_GET_ECI_COUNTERS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdEccGetVolatileCounts_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_ECC_GET_VOLATILE_COUNTS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuQueryEccConfiguration_VF(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_ECC_CONFIGURATION_PARAMS *pConfig); + +static inline NV_STATUS subdeviceCtrlCmdGpuQueryEccConfiguration_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_ECC_CONFIGURATION_PARAMS *pConfig) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS subdeviceCtrlCmdGpuSetEccConfiguration_VF(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_ECC_CONFIGURATION_PARAMS *pConfig); + +static inline NV_STATUS subdeviceCtrlCmdGpuSetEccConfiguration_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_ECC_CONFIGURATION_PARAMS *pConfig) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS subdeviceCtrlCmdGpuResetEccErrorStatus_VF(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_RESET_ECC_ERROR_STATUS_PARAMS *pParams); + +static inline NV_STATUS subdeviceCtrlCmdGpuResetEccErrorStatus_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_RESET_ECC_ERROR_STATUS_PARAMS *pParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS subdeviceCtrlCmdFlaRange_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLA_RANGE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFlaSetupInstanceMemBlock_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLA_SETUP_INSTANCE_MEM_BLOCK_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFlaGetRange_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLA_GET_RANGE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFlaGetFabricMemStats_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLA_GET_FABRIC_MEM_STATS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGspGetFeatures_KERNEL(struct Subdevice *pSubdevice, NV2080_CTRL_GSP_GET_FEATURES_PARAMS *pGspFeaturesParams); + +static inline NV_STATUS subdeviceCtrlCmdGspGetFeatures_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_GSP_GET_FEATURES_PARAMS *pGspFeaturesParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS subdeviceCtrlCmdGspGetRmHeapStats_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GSP_GET_RM_HEAP_STATS_PARAMS *pGspRmHeapStatsParams); + +NV_STATUS subdeviceCtrlCmdGpuGetActivePartitionIds_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ACTIVE_PARTITION_IDS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetPartitionCapacity_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_PARTITION_CAPACITY_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuDescribePartitions_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_DESCRIBE_PARTITIONS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuSetPartitioningMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_PARTITIONING_MODE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGrmgrGetGrFsInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GRMGR_GET_GR_FS_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuSetPartitions_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_PARTITIONS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetPartitions_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_PARTITIONS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGpuGetComputeProfiles_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_COMPUTE_PROFILES_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalStaticKMIGmgrGetProfiles_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_PROFILES_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalStaticKMIGmgrGetPartitionableEngines_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_PARTITIONABLE_ENGINES_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalStaticKMIGmgrGetSwizzIdFbMemPageRanges_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_SWIZZ_ID_FB_MEM_PAGE_RANGES_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalStaticKMIGmgrGetComputeInstanceProfiles_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_STATIC_MIGMGR_GET_COMPUTE_PROFILES_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalKMIGmgrExportGPUInstance_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_KMIGMGR_IMPORT_EXPORT_GPU_INSTANCE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalKMIGmgrImportGPUInstance_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_KMIGMGR_IMPORT_EXPORT_GPU_INSTANCE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalKMIGmgrPromoteGpuInstanceMemRange_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_KMIGMGR_PROMOTE_GPU_INSTANCE_MEM_RANGE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdOsUnixGc6BlockerRefCnt_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_OS_UNIX_GC6_BLOCKER_REFCNT_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdOsUnixAllowDisallowGcoff_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_OS_UNIX_ALLOW_DISALLOW_GCOFF_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdOsUnixAudioDynamicPower_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_OS_UNIX_AUDIO_DYNAMIC_POWER_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdOsUnixVidmemPersistenceStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_OS_UNIX_VIDMEM_PERSISTENCE_STATUS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdOsUnixUpdateTgpStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_OS_UNIX_UPDATE_TGP_STATUS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdDisplayGetIpVersion_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_GET_IP_VERSION_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdDisplayGetStaticInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_GET_STATIC_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdDisplaySetChannelPushbuffer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_CHANNEL_PUSHBUFFER_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdDisplayWriteInstMem_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_WRITE_INST_MEM_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdDisplaySetupRgLineIntr_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_SETUP_RG_LINE_INTR_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdDisplaySetImportedImpData_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_SET_IMP_INIT_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdDisplayGetDisplayMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISPLAY_GET_ACTIVE_DISPLAY_DEVICES_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdDisplayPinsetsToLockpins_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISP_PINSETS_TO_LOCKPINS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdDisplaySetSliLinkGpioSwControl_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_DISP_SET_SLI_LINK_GPIO_SW_CONTROL_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalGpioProgramDirection_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPIO_PROGRAM_DIRECTION_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalGpioProgramOutput_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPIO_PROGRAM_OUTPUT_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalGpioReadInput_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPIO_READ_INPUT_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalGpioActivateHwFunction_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPIO_ACTIVATE_HW_FUNCTION_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalDisplayAcpiSubsytemActivated_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdInternalDisplayPreModeSet_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdInternalDisplayPostModeSet_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdDisplayPreUnixConsole_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_DISPLAY_PRE_UNIX_CONSOLE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdDisplayPostUnixConsole_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_DISPLAY_POST_UNIX_CONSOLE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalUvmRegisterAccessCntrBuffer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_UVM_REGISTER_ACCESS_CNTR_BUFFER_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalUvmUnregisterAccessCntrBuffer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_UVM_UNREGISTER_ACCESS_CNTR_BUFFER_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalGetChipInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPU_GET_CHIP_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalGetUserRegisterAccessMap_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPU_GET_USER_REGISTER_ACCESS_MAP_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalGetDeviceInfoTable_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalRecoverAllComputeContexts_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdInternalGetSmcMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPU_GET_SMC_MODE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdIsEgpuBridge_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GET_EGPU_BRIDGE_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalGpuGetGspRmFreeHeap_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPU_GET_GSP_RM_FREE_HEAP_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalBusFlushWithSysmembar_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdInternalBusSetupP2pMailboxLocal_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_BUS_SETUP_P2P_MAILBOX_LOCAL_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalBusSetupP2pMailboxRemote_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_BUS_SETUP_P2P_MAILBOX_REMOTE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalBusDestroyP2pMailbox_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BUS_DESTROY_P2P_MAILBOX_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalBusCreateC2cPeerMapping_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BUS_CREATE_C2C_PEER_MAPPING_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BUS_REMOVE_C2C_PEER_MAPPING_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_VMMU_GET_SPA_FOR_GPA_ENTRIES_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGmmuGetStaticInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GMMU_GET_STATIC_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalGmmuRegisterFaultBuffer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GMMU_REGISTER_FAULT_BUFFER_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalGmmuUnregisterFaultBuffer_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdInternalGmmuRegisterClientShadowFaultBuffer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GMMU_REGISTER_CLIENT_SHADOW_FAULT_BUFFER_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalGmmuUnregisterClientShadowFaultBuffer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GMMU_UNREGISTER_CLIENT_SHADOW_FAULT_BUFFER_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalGmmuCopyReservedSplitGVASpacePdesServer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GMMU_COPY_RESERVED_SPLIT_GVASPACE_PDES_TO_SERVER_PARAMS *pCopyServerReservedPdesParams); + +NV_STATUS subdeviceCtrlCmdCeGetPhysicalCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_CAPS_V2_PARAMS *pCeCapsParams); + +NV_STATUS subdeviceCtrlCmdCeGetAllPhysicalCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS *pCeCapsParams); + +NV_STATUS subdeviceCtrlCmdCeUpdateClassDB_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_UPDATE_CLASS_DB_PARAMS *params); + +NV_STATUS subdeviceCtrlCmdCeGetFaultMethodBufferSize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_FAULT_METHOD_BUFFER_SIZE_PARAMS *params); + +NV_STATUS subdeviceCtrlCmdCeGetHubPceMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_HUB_PCE_MASK_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdIntrGetKernelTable_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_INTR_GET_KERNEL_TABLE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPerfCudaLimitDisable_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdInternalPerfOptpCliClear_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdInternalPerfBoostSet_2x_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_BOOST_SET_PARAMS_2X *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPerfBoostSet_3x_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_BOOST_SET_PARAMS_3X *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPerfBoostClear_3x_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_BOOST_CLEAR_PARAMS_3X *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPerfGpuBoostSyncSetControl_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_GPU_BOOST_SYNC_CONTROL_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPerfGpuBoostSyncGetInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_GPU_BOOST_SYNC_GET_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPerfSyncGpuBoostSetLimits_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_GPU_BOOST_SYNC_SET_LIMITS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPerfPerfmonClientReservationCheck_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_PERFMON_CLIENT_RESERVATION_CHECK_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPerfPerfmonClientReservationSet_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_PERFMON_CLIENT_RESERVATION_SET_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPerfCfControllerSetMaxVGpuVMCount_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_CF_CONTROLLERS_SET_MAX_VGPU_VM_COUNT_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPerfGetAuxPowerState_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PERF_GET_AUX_POWER_STATE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalGcxEntryPrerequisite_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GCX_ENTRY_PREREQUISITE_PARAMS *pGcxEntryPrerequisite); + +NV_STATUS subdeviceCtrlCmdBifGetStaticInfo_VF(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BIF_GET_STATIC_INFO_PARAMS *pParams); + +static inline NV_STATUS subdeviceCtrlCmdBifGetStaticInfo_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BIF_GET_STATIC_INFO_PARAMS *pParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS subdeviceCtrlCmdBifGetAspmL1Flags_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BIF_GET_ASPM_L1_FLAGS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBifSetPcieRo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BIF_SET_PCIE_RO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdBifDisableSystemMemoryAccess_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BIF_DISABLE_SYSTEM_MEMORY_ACCESS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdHshubPeerConnConfig_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_HSHUB_PEER_CONN_CONFIG_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdHshubFirstLinkPeerId_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_HSHUB_FIRST_LINK_PEER_ID_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdHshubGetHshubIdForLinks_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_HSHUB_GET_HSHUB_ID_FOR_LINKS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdHshubGetNumUnits_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_HSHUB_GET_NUM_UNITS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdHshubNextHshubId_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_HSHUB_NEXT_HSHUB_ID_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdHshubEgmConfig_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_HSHUB_EGM_CONFIG_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalNvlinkEnableComputePeerAddr_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdInternalNvlinkGetSetNvswitchFabricAddr_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_GET_SET_NVSWITCH_FABRIC_ADDR_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalNvlinkGetNumActiveLinksPerIoctrl_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_GET_NUM_ACTIVE_LINK_PER_IOCTRL_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalNvlinkGetTotalNumLinksPerIoctrl_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_GET_TOTAL_NUM_LINK_PER_IOCTRL_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalSetP2pCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_SET_P2P_CAPS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalRemoveP2pCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_REMOVE_P2P_CAPS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalGetPcieP2pCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GET_PCIE_P2P_CAPS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalGetLocalAtsConfig_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_GET_LOCAL_ATS_CONFIG_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalSetPeerAtsConfig_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_SET_PEER_ATS_CONFIG_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalInitGpuIntr_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_ATTACH_AND_INIT_PARAMS *pAttachParams); + +NV_STATUS subdeviceCtrlCmdInternalGsyncOptimizeTiming_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_OPTIMIZE_TIMING_PARAMETERS_PARAMS *pAttachParams); + +NV_STATUS subdeviceCtrlCmdInternalGsyncGetDisplayIds_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_GET_DISPLAY_IDS_PARAMS *pAttachParams); + +NV_STATUS subdeviceCtrlCmdInternalGsyncSetStereoSync_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_SET_STREO_SYNC_PARAMS *pAttachParams); + +NV_STATUS subdeviceCtrlCmdInternalGsyncGetVactiveLines_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_GET_VERTICAL_ACTIVE_LINES_PARAMS *pAttachParams); + +NV_STATUS subdeviceCtrlCmdInternalGsyncIsDisplayIdValid_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_IS_DISPLAYID_VALID_PARAMS *pAttachParams); + +NV_STATUS subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_SET_OR_RESTORE_RASTER_SYNC_PARAMS *pAttachParams); + +NV_STATUS subdeviceCtrlCmdInternalFbsrInit_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FBSR_INIT_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPostInitBrightcStateLoad_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_INIT_BRIGHTC_STATE_LOAD_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalSetStaticEdidData_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_SET_STATIC_EDID_DATA_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalSmbpbiPfmReqHndlrCapUpdate_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_SMBPBI_PFM_REQ_HNDLR_CAP_UPDATE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPmgrPfmReqHndlrStateLoadSync_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PFM_REQ_HNDLR_STATE_SYNC_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalThermPfmReqHndlrStateInitSync_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_PFM_REQ_HNDLR_STATE_SYNC_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPerfPfmReqHndlrGetPm1State_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_GET_PM1_STATE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPerfPfmReqHndlrSetPm1State_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_SET_PM1_STATE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPmgrPfmReqHndlrUpdateEdppLimit_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_UPDATE_EDPP_LIMIT_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPmgrPfmReqHndlrGetEdppLimitInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_GET_EDPP_LIMIT_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalThermPfmReqHndlrUpdateTgpuLimit_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_THERM_PFM_REQ_HNDLR_UPDATE_TGPU_LIMIT_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTgpMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_CONFIGURE_TGP_MODE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTurboV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PMGR_PFM_REQ_HNDLR_CONFIGURE_TURBO_V2_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_GET_VPSTATE_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateMapping_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_GET_VPSTATE_MAPPING_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPerfPfmReqHndlrSetVpstate_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_PERF_PFM_REQ_HNDLR_SET_VPSTATE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalPmgrUnsetDynamicBoostLimit_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdInternalDetectHsVideoBridge_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdInternalConfComputeGetStaticInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CONF_COMPUTE_GET_STATIC_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalConfComputeDeriveSwlKeys_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_SWL_KEYS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalConfComputeDeriveLceKeys_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalConfComputeRotateKeys_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CONF_COMPUTE_ROTATE_KEYS_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalConfComputeRCChannelsForKeyRotation_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CONF_COMPUTE_RC_CHANNELS_FOR_KEY_ROTATION_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalConfComputeSetGpuState_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_SET_GPU_STATE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalConfComputeSetSecurityPolicy_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_SET_SECURITY_POLICY_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalInitUserSharedData_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_INIT_USER_SHARED_DATA_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalUserSharedDataSetDataPoll_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_USER_SHARED_DATA_SET_DATA_POLL_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalGspStartTrace_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPU_CLIENT_LOW_POWER_MODE_ENTER_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdVgpuMgrInternalBootloadGspVgpuPluginTask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_BOOTLOAD_GSP_VGPU_PLUGIN_TASK_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdVgpuMgrInternalShutdownGspVgpuPluginTask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_SHUTDOWN_GSP_VGPU_PLUGIN_TASK_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdVgpuMgrInternalPgpuAddVgpuType_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_PGPU_ADD_VGPU_TYPE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdVgpuMgrInternalEnumerateVgpuPerPgpu_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_ENUMERATE_VGPU_PER_PGPU_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdVgpuMgrInternalClearGuestVmInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_CLEAR_GUEST_VM_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdVgpuMgrInternalGetVgpuFbUsage_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_GET_VGPU_FB_USAGE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_SET_VGPU_ENCODER_CAPACITY_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdVgpuMgrInternalCleanupGspVgpuPluginResources_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_VGPU_PLUGIN_CLEANUP_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdVgpuMgrInternalGetPgpuFsEncoding_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_GET_PGPU_FS_ENCODING_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdVgpuMgrInternalGetPgpuMigrationSupport_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_GET_PGPU_MIGRATION_SUPPORT_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_SET_VGPU_MGR_CONFIG_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdVgpuMgrInternalFreeStates_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_FREE_STATES_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdGetAvailableHshubMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_HSHUB_GET_AVAILABLE_MASK_PARAMS *pParams); + +NV_STATUS subdeviceCtrlSetEcThrottleMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_HSHUB_SET_EC_THROTTLE_MODE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdCcuMap_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CCU_MAP_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdCcuUnmap_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CCU_UNMAP_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdCcuSetStreamState_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CCU_STREAM_STATE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdCcuGetSampleInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CCU_SAMPLE_INFO_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdSpdmPartition_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_SPDM_PARTITION_PARAMS *pSpdmPartitionParams); + static inline NV_STATUS subdeviceSetPerfmonReservation(struct Subdevice *pSubdevice, NvBool bReservation, NvBool bClientHandlesGrGating, NvBool bRmHandlesIdleSlow) { return NV_OK; } diff --git a/src/nvidia/generated/g_sw_test_nvoc.c b/src/nvidia/generated/g_sw_test_nvoc.c index 4229aa51c4..31b292d109 100644 --- a/src/nvidia/generated/g_sw_test_nvoc.c +++ b/src/nvidia/generated/g_sw_test_nvoc.c @@ -120,134 +120,172 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_SoftwareMethodTest = /*pExportInfo=*/ &__nvoc_export_info_SoftwareMethodTest }; -static NV_STATUS __nvoc_thunk_SoftwareMethodTest_chandesGetSwMethods(struct ChannelDescendant *pSwTest, const METHOD **ppMethods, NvU32 *pNumMethods) { - return swtestGetSwMethods((struct SoftwareMethodTest *)(((unsigned char *)pSwTest) - __nvoc_rtti_SoftwareMethodTest_ChannelDescendant.offset), ppMethods, pNumMethods); +// 1 down-thunk(s) defined to bridge methods in SoftwareMethodTest from superclasses + +// swtestGetSwMethods: virtual override (chandes) base (chandes) +static NV_STATUS __nvoc_down_thunk_SoftwareMethodTest_chandesGetSwMethods(struct ChannelDescendant *pSwTest, const METHOD **ppMethods, NvU32 *pNumMethods) { + return swtestGetSwMethods((struct SoftwareMethodTest *)(((unsigned char *) pSwTest) - __nvoc_rtti_SoftwareMethodTest_ChannelDescendant.offset), ppMethods, pNumMethods); } -static NV_STATUS __nvoc_thunk_ChannelDescendant_swtestCheckMemInterUnmap(struct SoftwareMethodTest *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_SoftwareMethodTest_ChannelDescendant.offset), bSubdeviceHandleProvided); + +// 31 up-thunk(s) defined to bridge methods in SoftwareMethodTest to superclasses + +// swtestIsSwMethodStalling: virtual inherited (chandes) base (chandes) +static NvBool __nvoc_up_thunk_ChannelDescendant_swtestIsSwMethodStalling(struct SoftwareMethodTest *pChannelDescendant, NvU32 hHandle) { + return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_SoftwareMethodTest_ChannelDescendant.offset), hHandle); } -static NvBool __nvoc_thunk_GpuResource_swtestShareCallback(struct SoftwareMethodTest *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// swtestCheckMemInterUnmap: virtual inherited (chandes) base (chandes) +static NV_STATUS __nvoc_up_thunk_ChannelDescendant_swtestCheckMemInterUnmap(struct SoftwareMethodTest *pChannelDescendant, NvBool bSubdeviceHandleProvided) { + return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_SoftwareMethodTest_ChannelDescendant.offset), bSubdeviceHandleProvided); } -static NvBool __nvoc_thunk_RmResource_swtestAccessCallback(struct SoftwareMethodTest *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// swtestControl: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_swtestControl(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_swtestMapTo(struct SoftwareMethodTest *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset), pParams); +// swtestMap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_swtestMap(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_GpuResource_swtestGetMapAddrSpace(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// swtestUnmap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_swtestUnmap(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_Notifier_swtestSetNotificationShare(struct SoftwareMethodTest *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_SoftwareMethodTest_Notifier.offset), pNotifShare); +// swtestShareCallback: virtual inherited (gpures) base (chandes) +static NvBool __nvoc_up_thunk_GpuResource_swtestShareCallback(struct SoftwareMethodTest *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NvU32 __nvoc_thunk_RsResource_swtestGetRefCount(struct SoftwareMethodTest *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset)); +// swtestGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_swtestGetRegBaseOffsetAndSize(struct SoftwareMethodTest *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), pGpu, pOffset, pSize); } -static void __nvoc_thunk_RsResource_swtestAddAdditionalDependants(struct RsClient *pClient, struct SoftwareMethodTest *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset), pReference); +// swtestGetMapAddrSpace: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_swtestGetMapAddrSpace(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_RmResource_swtestControl_Prologue(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), pCallContext, pParams); +// swtestInternalControlForward: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_swtestInternalControlForward(struct SoftwareMethodTest *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_GpuResource_swtestGetRegBaseOffsetAndSize(struct SoftwareMethodTest *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), pGpu, pOffset, pSize); +// swtestGetInternalObjectHandle: virtual inherited (gpures) base (chandes) +static NvHandle __nvoc_up_thunk_GpuResource_swtestGetInternalObjectHandle(struct SoftwareMethodTest *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_swtestInternalControlForward(struct SoftwareMethodTest *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), command, pParams, size); +// swtestAccessCallback: virtual inherited (rmres) base (chandes) +static NvBool __nvoc_up_thunk_RmResource_swtestAccessCallback(struct SoftwareMethodTest *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RsResource_swtestUnmapFrom(struct SoftwareMethodTest *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset), pParams); +// swtestGetMemInterMapParams: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_swtestGetMemInterMapParams(struct SoftwareMethodTest *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), pParams); } -static void __nvoc_thunk_RmResource_swtestControl_Epilogue(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), pCallContext, pParams); +// swtestGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_swtestGetMemoryMappingDescriptor(struct SoftwareMethodTest *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), ppMemDesc); } -static NvHandle __nvoc_thunk_GpuResource_swtestGetInternalObjectHandle(struct SoftwareMethodTest *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset)); +// swtestControlSerialization_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_swtestControlSerialization_Prologue(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_swtestControl(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), pCallContext, pParams); +// swtestControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_swtestControlSerialization_Epilogue(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_swtestUnmap(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), pCallContext, pCpuMapping); +// swtestControl_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_swtestControl_Prologue(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_swtestGetMemInterMapParams(struct SoftwareMethodTest *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), pParams); +// swtestControl_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_swtestControl_Epilogue(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_swtestGetMemoryMappingDescriptor(struct SoftwareMethodTest *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), ppMemDesc); +// swtestCanCopy: virtual inherited (res) base (chandes) +static NvBool __nvoc_up_thunk_RsResource_swtestCanCopy(struct SoftwareMethodTest *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset)); } -static NvBool __nvoc_thunk_ChannelDescendant_swtestIsSwMethodStalling(struct SoftwareMethodTest *pChannelDescendant, NvU32 hHandle) { - return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_SoftwareMethodTest_ChannelDescendant.offset), hHandle); +// swtestIsDuplicate: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_swtestIsDuplicate(struct SoftwareMethodTest *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_swtestControlFilter(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset), pCallContext, pParams); +// swtestPreDestruct: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_swtestPreDestruct(struct SoftwareMethodTest *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_swtestUnregisterEvent(struct SoftwareMethodTest *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_SoftwareMethodTest_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// swtestControlFilter: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_swtestControlFilter(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_swtestControlSerialization_Prologue(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), pCallContext, pParams); +// swtestIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body +static NvBool __nvoc_up_thunk_RsResource_swtestIsPartialUnmapSupported(struct SoftwareMethodTest *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_swtestCanCopy(struct SoftwareMethodTest *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset)); +// swtestMapTo: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_swtestMapTo(struct SoftwareMethodTest *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RsResource_swtestIsPartialUnmapSupported(struct SoftwareMethodTest *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset)); +// swtestUnmapFrom: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_swtestUnmapFrom(struct SoftwareMethodTest *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset), pParams); } -static void __nvoc_thunk_RsResource_swtestPreDestruct(struct SoftwareMethodTest *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset)); +// swtestGetRefCount: virtual inherited (res) base (chandes) +static NvU32 __nvoc_up_thunk_RsResource_swtestGetRefCount(struct SoftwareMethodTest *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_swtestIsDuplicate(struct SoftwareMethodTest *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset), hMemory, pDuplicate); +// swtestAddAdditionalDependants: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_swtestAddAdditionalDependants(struct RsClient *pClient, struct SoftwareMethodTest *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset), pReference); } -static void __nvoc_thunk_RmResource_swtestControlSerialization_Epilogue(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), pCallContext, pParams); +// swtestGetNotificationListPtr: virtual inherited (notify) base (chandes) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_swtestGetNotificationListPtr(struct SoftwareMethodTest *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_SoftwareMethodTest_Notifier.offset)); } -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_swtestGetNotificationListPtr(struct SoftwareMethodTest *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_SoftwareMethodTest_Notifier.offset)); +// swtestGetNotificationShare: virtual inherited (notify) base (chandes) +static struct NotifShare * __nvoc_up_thunk_Notifier_swtestGetNotificationShare(struct SoftwareMethodTest *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_SoftwareMethodTest_Notifier.offset)); } -static struct NotifShare *__nvoc_thunk_Notifier_swtestGetNotificationShare(struct SoftwareMethodTest *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_SoftwareMethodTest_Notifier.offset)); +// swtestSetNotificationShare: virtual inherited (notify) base (chandes) +static void __nvoc_up_thunk_Notifier_swtestSetNotificationShare(struct SoftwareMethodTest *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_SoftwareMethodTest_Notifier.offset), pNotifShare); } -static NV_STATUS __nvoc_thunk_GpuResource_swtestMap(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// swtestUnregisterEvent: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_swtestUnregisterEvent(struct SoftwareMethodTest *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_SoftwareMethodTest_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static NV_STATUS __nvoc_thunk_Notifier_swtestGetOrAllocNotifShare(struct SoftwareMethodTest *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_SoftwareMethodTest_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +// swtestGetOrAllocNotifShare: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_swtestGetOrAllocNotifShare(struct SoftwareMethodTest *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_SoftwareMethodTest_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_SoftwareMethodTest = { /*numEntries=*/ 0, @@ -284,77 +322,113 @@ NV_STATUS __nvoc_ctor_SoftwareMethodTest(SoftwareMethodTest *pThis, RmHalspecOwn return status; } +// Vtable initialization static void __nvoc_init_funcTable_SoftwareMethodTest_1(SoftwareMethodTest *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // swtestGetSwMethods -- virtual override (chandes) base (chandes) pThis->__swtestGetSwMethods__ = &swtestGetSwMethods_IMPL; + pThis->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ = &__nvoc_down_thunk_SoftwareMethodTest_chandesGetSwMethods; - pThis->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ = &__nvoc_thunk_SoftwareMethodTest_chandesGetSwMethods; + // swtestIsSwMethodStalling -- virtual inherited (chandes) base (chandes) + pThis->__swtestIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_swtestIsSwMethodStalling; - pThis->__swtestCheckMemInterUnmap__ = &__nvoc_thunk_ChannelDescendant_swtestCheckMemInterUnmap; + // swtestCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) + pThis->__swtestCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_swtestCheckMemInterUnmap; - pThis->__swtestShareCallback__ = &__nvoc_thunk_GpuResource_swtestShareCallback; + // swtestControl -- virtual inherited (gpures) base (chandes) + pThis->__swtestControl__ = &__nvoc_up_thunk_GpuResource_swtestControl; - pThis->__swtestAccessCallback__ = &__nvoc_thunk_RmResource_swtestAccessCallback; + // swtestMap -- virtual inherited (gpures) base (chandes) + pThis->__swtestMap__ = &__nvoc_up_thunk_GpuResource_swtestMap; - pThis->__swtestMapTo__ = &__nvoc_thunk_RsResource_swtestMapTo; + // swtestUnmap -- virtual inherited (gpures) base (chandes) + pThis->__swtestUnmap__ = &__nvoc_up_thunk_GpuResource_swtestUnmap; - pThis->__swtestGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_swtestGetMapAddrSpace; + // swtestShareCallback -- virtual inherited (gpures) base (chandes) + pThis->__swtestShareCallback__ = &__nvoc_up_thunk_GpuResource_swtestShareCallback; - pThis->__swtestSetNotificationShare__ = &__nvoc_thunk_Notifier_swtestSetNotificationShare; + // swtestGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) + pThis->__swtestGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_swtestGetRegBaseOffsetAndSize; - pThis->__swtestGetRefCount__ = &__nvoc_thunk_RsResource_swtestGetRefCount; + // swtestGetMapAddrSpace -- virtual inherited (gpures) base (chandes) + pThis->__swtestGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_swtestGetMapAddrSpace; - pThis->__swtestAddAdditionalDependants__ = &__nvoc_thunk_RsResource_swtestAddAdditionalDependants; + // swtestInternalControlForward -- virtual inherited (gpures) base (chandes) + pThis->__swtestInternalControlForward__ = &__nvoc_up_thunk_GpuResource_swtestInternalControlForward; - pThis->__swtestControl_Prologue__ = &__nvoc_thunk_RmResource_swtestControl_Prologue; + // swtestGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) + pThis->__swtestGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_swtestGetInternalObjectHandle; - pThis->__swtestGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_swtestGetRegBaseOffsetAndSize; + // swtestAccessCallback -- virtual inherited (rmres) base (chandes) + pThis->__swtestAccessCallback__ = &__nvoc_up_thunk_RmResource_swtestAccessCallback; - pThis->__swtestInternalControlForward__ = &__nvoc_thunk_GpuResource_swtestInternalControlForward; + // swtestGetMemInterMapParams -- virtual inherited (rmres) base (chandes) + pThis->__swtestGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_swtestGetMemInterMapParams; - pThis->__swtestUnmapFrom__ = &__nvoc_thunk_RsResource_swtestUnmapFrom; + // swtestGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) + pThis->__swtestGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_swtestGetMemoryMappingDescriptor; - pThis->__swtestControl_Epilogue__ = &__nvoc_thunk_RmResource_swtestControl_Epilogue; + // swtestControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__swtestControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_swtestControlSerialization_Prologue; - pThis->__swtestGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_swtestGetInternalObjectHandle; + // swtestControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__swtestControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_swtestControlSerialization_Epilogue; - pThis->__swtestControl__ = &__nvoc_thunk_GpuResource_swtestControl; + // swtestControl_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__swtestControl_Prologue__ = &__nvoc_up_thunk_RmResource_swtestControl_Prologue; - pThis->__swtestUnmap__ = &__nvoc_thunk_GpuResource_swtestUnmap; + // swtestControl_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__swtestControl_Epilogue__ = &__nvoc_up_thunk_RmResource_swtestControl_Epilogue; - pThis->__swtestGetMemInterMapParams__ = &__nvoc_thunk_RmResource_swtestGetMemInterMapParams; + // swtestCanCopy -- virtual inherited (res) base (chandes) + pThis->__swtestCanCopy__ = &__nvoc_up_thunk_RsResource_swtestCanCopy; - pThis->__swtestGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_swtestGetMemoryMappingDescriptor; + // swtestIsDuplicate -- virtual inherited (res) base (chandes) + pThis->__swtestIsDuplicate__ = &__nvoc_up_thunk_RsResource_swtestIsDuplicate; - pThis->__swtestIsSwMethodStalling__ = &__nvoc_thunk_ChannelDescendant_swtestIsSwMethodStalling; + // swtestPreDestruct -- virtual inherited (res) base (chandes) + pThis->__swtestPreDestruct__ = &__nvoc_up_thunk_RsResource_swtestPreDestruct; - pThis->__swtestControlFilter__ = &__nvoc_thunk_RsResource_swtestControlFilter; + // swtestControlFilter -- virtual inherited (res) base (chandes) + pThis->__swtestControlFilter__ = &__nvoc_up_thunk_RsResource_swtestControlFilter; - pThis->__swtestUnregisterEvent__ = &__nvoc_thunk_Notifier_swtestUnregisterEvent; + // swtestIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body + pThis->__swtestIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_swtestIsPartialUnmapSupported; - pThis->__swtestControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_swtestControlSerialization_Prologue; + // swtestMapTo -- virtual inherited (res) base (chandes) + pThis->__swtestMapTo__ = &__nvoc_up_thunk_RsResource_swtestMapTo; - pThis->__swtestCanCopy__ = &__nvoc_thunk_RsResource_swtestCanCopy; + // swtestUnmapFrom -- virtual inherited (res) base (chandes) + pThis->__swtestUnmapFrom__ = &__nvoc_up_thunk_RsResource_swtestUnmapFrom; - pThis->__swtestIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_swtestIsPartialUnmapSupported; + // swtestGetRefCount -- virtual inherited (res) base (chandes) + pThis->__swtestGetRefCount__ = &__nvoc_up_thunk_RsResource_swtestGetRefCount; - pThis->__swtestPreDestruct__ = &__nvoc_thunk_RsResource_swtestPreDestruct; + // swtestAddAdditionalDependants -- virtual inherited (res) base (chandes) + pThis->__swtestAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_swtestAddAdditionalDependants; - pThis->__swtestIsDuplicate__ = &__nvoc_thunk_RsResource_swtestIsDuplicate; + // swtestGetNotificationListPtr -- virtual inherited (notify) base (chandes) + pThis->__swtestGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_swtestGetNotificationListPtr; - pThis->__swtestControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_swtestControlSerialization_Epilogue; + // swtestGetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__swtestGetNotificationShare__ = &__nvoc_up_thunk_Notifier_swtestGetNotificationShare; - pThis->__swtestGetNotificationListPtr__ = &__nvoc_thunk_Notifier_swtestGetNotificationListPtr; + // swtestSetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__swtestSetNotificationShare__ = &__nvoc_up_thunk_Notifier_swtestSetNotificationShare; - pThis->__swtestGetNotificationShare__ = &__nvoc_thunk_Notifier_swtestGetNotificationShare; + // swtestUnregisterEvent -- virtual inherited (notify) base (chandes) + pThis->__swtestUnregisterEvent__ = &__nvoc_up_thunk_Notifier_swtestUnregisterEvent; - pThis->__swtestMap__ = &__nvoc_thunk_GpuResource_swtestMap; + // swtestGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) + pThis->__swtestGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_swtestGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_SoftwareMethodTest_1 with approximately 33 basic block(s). - pThis->__swtestGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_swtestGetOrAllocNotifShare; -} +// Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_SoftwareMethodTest(SoftwareMethodTest *pThis) { + + // Initialize vtable(s) with 32 per-object function pointer(s). __nvoc_init_funcTable_SoftwareMethodTest_1(pThis); } diff --git a/src/nvidia/generated/g_sw_test_nvoc.h b/src/nvidia/generated/g_sw_test_nvoc.h index d5272562b7..edcfd95e58 100644 --- a/src/nvidia/generated/g_sw_test_nvoc.h +++ b/src/nvidia/generated/g_sw_test_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_SW_TEST_NVOC_H_ #define _G_SW_TEST_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_sw_test_nvoc.h" #ifndef _SW_TEST_H_ @@ -50,50 +58,59 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct SoftwareMethodTest { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; - struct SoftwareMethodTest *__nvoc_pbase_SoftwareMethodTest; - NV_STATUS (*__swtestGetSwMethods__)(struct SoftwareMethodTest *, const METHOD **, NvU32 *); - NV_STATUS (*__swtestCheckMemInterUnmap__)(struct SoftwareMethodTest *, NvBool); - NvBool (*__swtestShareCallback__)(struct SoftwareMethodTest *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NvBool (*__swtestAccessCallback__)(struct SoftwareMethodTest *, struct RsClient *, void *, RsAccessRight); - NV_STATUS (*__swtestMapTo__)(struct SoftwareMethodTest *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__swtestGetMapAddrSpace__)(struct SoftwareMethodTest *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__swtestSetNotificationShare__)(struct SoftwareMethodTest *, struct NotifShare *); - NvU32 (*__swtestGetRefCount__)(struct SoftwareMethodTest *); - void (*__swtestAddAdditionalDependants__)(struct RsClient *, struct SoftwareMethodTest *, RsResourceRef *); - NV_STATUS (*__swtestControl_Prologue__)(struct SoftwareMethodTest *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__swtestGetRegBaseOffsetAndSize__)(struct SoftwareMethodTest *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__swtestInternalControlForward__)(struct SoftwareMethodTest *, NvU32, void *, NvU32); - NV_STATUS (*__swtestUnmapFrom__)(struct SoftwareMethodTest *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__swtestControl_Epilogue__)(struct SoftwareMethodTest *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__swtestGetInternalObjectHandle__)(struct SoftwareMethodTest *); - NV_STATUS (*__swtestControl__)(struct SoftwareMethodTest *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__swtestUnmap__)(struct SoftwareMethodTest *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__swtestGetMemInterMapParams__)(struct SoftwareMethodTest *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__swtestGetMemoryMappingDescriptor__)(struct SoftwareMethodTest *, struct MEMORY_DESCRIPTOR **); - NvBool (*__swtestIsSwMethodStalling__)(struct SoftwareMethodTest *, NvU32); - NV_STATUS (*__swtestControlFilter__)(struct SoftwareMethodTest *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__swtestUnregisterEvent__)(struct SoftwareMethodTest *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__swtestControlSerialization_Prologue__)(struct SoftwareMethodTest *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__swtestCanCopy__)(struct SoftwareMethodTest *); - NvBool (*__swtestIsPartialUnmapSupported__)(struct SoftwareMethodTest *); - void (*__swtestPreDestruct__)(struct SoftwareMethodTest *); - NV_STATUS (*__swtestIsDuplicate__)(struct SoftwareMethodTest *, NvHandle, NvBool *); - void (*__swtestControlSerialization_Epilogue__)(struct SoftwareMethodTest *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__swtestGetNotificationListPtr__)(struct SoftwareMethodTest *); - struct NotifShare *(*__swtestGetNotificationShare__)(struct SoftwareMethodTest *); - NV_STATUS (*__swtestMap__)(struct SoftwareMethodTest *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NV_STATUS (*__swtestGetOrAllocNotifShare__)(struct SoftwareMethodTest *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super^2 + struct INotifier *__nvoc_pbase_INotifier; // inotify super^3 + struct Notifier *__nvoc_pbase_Notifier; // notify super^2 + struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super + struct SoftwareMethodTest *__nvoc_pbase_SoftwareMethodTest; // swtest + + // Vtable with 32 per-object function pointers + NV_STATUS (*__swtestGetSwMethods__)(struct SoftwareMethodTest * /*this*/, const METHOD **, NvU32 *); // virtual override (chandes) base (chandes) + NvBool (*__swtestIsSwMethodStalling__)(struct SoftwareMethodTest * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__swtestCheckMemInterUnmap__)(struct SoftwareMethodTest * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__swtestControl__)(struct SoftwareMethodTest * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__swtestMap__)(struct SoftwareMethodTest * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__swtestUnmap__)(struct SoftwareMethodTest * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NvBool (*__swtestShareCallback__)(struct SoftwareMethodTest * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__swtestGetRegBaseOffsetAndSize__)(struct SoftwareMethodTest * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__swtestGetMapAddrSpace__)(struct SoftwareMethodTest * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__swtestInternalControlForward__)(struct SoftwareMethodTest * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (chandes) + NvHandle (*__swtestGetInternalObjectHandle__)(struct SoftwareMethodTest * /*this*/); // virtual inherited (gpures) base (chandes) + NvBool (*__swtestAccessCallback__)(struct SoftwareMethodTest * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__swtestGetMemInterMapParams__)(struct SoftwareMethodTest * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__swtestGetMemoryMappingDescriptor__)(struct SoftwareMethodTest * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__swtestControlSerialization_Prologue__)(struct SoftwareMethodTest * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__swtestControlSerialization_Epilogue__)(struct SoftwareMethodTest * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__swtestControl_Prologue__)(struct SoftwareMethodTest * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__swtestControl_Epilogue__)(struct SoftwareMethodTest * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NvBool (*__swtestCanCopy__)(struct SoftwareMethodTest * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__swtestIsDuplicate__)(struct SoftwareMethodTest * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (chandes) + void (*__swtestPreDestruct__)(struct SoftwareMethodTest * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__swtestControlFilter__)(struct SoftwareMethodTest * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (chandes) + NvBool (*__swtestIsPartialUnmapSupported__)(struct SoftwareMethodTest * /*this*/); // inline virtual inherited (res) base (chandes) body + NV_STATUS (*__swtestMapTo__)(struct SoftwareMethodTest * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (chandes) + NV_STATUS (*__swtestUnmapFrom__)(struct SoftwareMethodTest * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (chandes) + NvU32 (*__swtestGetRefCount__)(struct SoftwareMethodTest * /*this*/); // virtual inherited (res) base (chandes) + void (*__swtestAddAdditionalDependants__)(struct RsClient *, struct SoftwareMethodTest * /*this*/, RsResourceRef *); // virtual inherited (res) base (chandes) + PEVENTNOTIFICATION * (*__swtestGetNotificationListPtr__)(struct SoftwareMethodTest * /*this*/); // virtual inherited (notify) base (chandes) + struct NotifShare * (*__swtestGetNotificationShare__)(struct SoftwareMethodTest * /*this*/); // virtual inherited (notify) base (chandes) + void (*__swtestSetNotificationShare__)(struct SoftwareMethodTest * /*this*/, struct NotifShare *); // virtual inherited (notify) base (chandes) + NV_STATUS (*__swtestUnregisterEvent__)(struct SoftwareMethodTest * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (chandes) + NV_STATUS (*__swtestGetOrAllocNotifShare__)(struct SoftwareMethodTest * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (chandes) }; #ifndef __NVOC_CLASS_SoftwareMethodTest_TYPEDEF__ @@ -105,6 +122,7 @@ typedef struct SoftwareMethodTest SoftwareMethodTest; #define __nvoc_class_id_SoftwareMethodTest 0xdea092 #endif /* __nvoc_class_id_SoftwareMethodTest */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_SoftwareMethodTest; #define __staticCast_SoftwareMethodTest(pThis) \ @@ -117,113 +135,126 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_SoftwareMethodTest; ((SoftwareMethodTest*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(SoftwareMethodTest))) #endif //__nvoc_sw_test_h_disabled - NV_STATUS __nvoc_objCreateDynamic_SoftwareMethodTest(SoftwareMethodTest**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_SoftwareMethodTest(SoftwareMethodTest**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_SoftwareMethodTest(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_SoftwareMethodTest((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define swtestGetSwMethods_FNPTR(pSwTest) pSwTest->__swtestGetSwMethods__ #define swtestGetSwMethods(pSwTest, ppMethods, pNumMethods) swtestGetSwMethods_DISPATCH(pSwTest, ppMethods, pNumMethods) +#define swtestIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define swtestIsSwMethodStalling(pChannelDescendant, hHandle) swtestIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) +#define swtestCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ #define swtestCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) swtestCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) +#define swtestControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define swtestControl(pGpuResource, pCallContext, pParams) swtestControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define swtestMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define swtestMap(pGpuResource, pCallContext, pParams, pCpuMapping) swtestMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define swtestUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define swtestUnmap(pGpuResource, pCallContext, pCpuMapping) swtestUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define swtestShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ #define swtestShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) swtestShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define swtestAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) swtestAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define swtestMapTo(pResource, pParams) swtestMapTo_DISPATCH(pResource, pParams) -#define swtestGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) swtestGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define swtestSetNotificationShare(pNotifier, pNotifShare) swtestSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define swtestGetRefCount(pResource) swtestGetRefCount_DISPATCH(pResource) -#define swtestAddAdditionalDependants(pClient, pResource, pReference) swtestAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define swtestControl_Prologue(pResource, pCallContext, pParams) swtestControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define swtestGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define swtestGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) swtestGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define swtestGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define swtestGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) swtestGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define swtestInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define swtestInternalControlForward(pGpuResource, command, pParams, size) swtestInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define swtestUnmapFrom(pResource, pParams) swtestUnmapFrom_DISPATCH(pResource, pParams) -#define swtestControl_Epilogue(pResource, pCallContext, pParams) swtestControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define swtestGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define swtestGetInternalObjectHandle(pGpuResource) swtestGetInternalObjectHandle_DISPATCH(pGpuResource) -#define swtestControl(pGpuResource, pCallContext, pParams) swtestControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define swtestUnmap(pGpuResource, pCallContext, pCpuMapping) swtestUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define swtestAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define swtestAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) swtestAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define swtestGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define swtestGetMemInterMapParams(pRmResource, pParams) swtestGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define swtestGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define swtestGetMemoryMappingDescriptor(pRmResource, ppMemDesc) swtestGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define swtestIsSwMethodStalling(pChannelDescendant, hHandle) swtestIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define swtestControlFilter(pResource, pCallContext, pParams) swtestControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define swtestUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) swtestUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define swtestControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define swtestControlSerialization_Prologue(pResource, pCallContext, pParams) swtestControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define swtestControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define swtestControlSerialization_Epilogue(pResource, pCallContext, pParams) swtestControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define swtestControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define swtestControl_Prologue(pResource, pCallContext, pParams) swtestControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define swtestControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define swtestControl_Epilogue(pResource, pCallContext, pParams) swtestControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define swtestCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define swtestCanCopy(pResource) swtestCanCopy_DISPATCH(pResource) -#define swtestIsPartialUnmapSupported(pResource) swtestIsPartialUnmapSupported_DISPATCH(pResource) -#define swtestPreDestruct(pResource) swtestPreDestruct_DISPATCH(pResource) +#define swtestIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define swtestIsDuplicate(pResource, hMemory, pDuplicate) swtestIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define swtestControlSerialization_Epilogue(pResource, pCallContext, pParams) swtestControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define swtestPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define swtestPreDestruct(pResource) swtestPreDestruct_DISPATCH(pResource) +#define swtestControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define swtestControlFilter(pResource, pCallContext, pParams) swtestControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define swtestIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define swtestIsPartialUnmapSupported(pResource) swtestIsPartialUnmapSupported_DISPATCH(pResource) +#define swtestMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define swtestMapTo(pResource, pParams) swtestMapTo_DISPATCH(pResource, pParams) +#define swtestUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define swtestUnmapFrom(pResource, pParams) swtestUnmapFrom_DISPATCH(pResource, pParams) +#define swtestGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define swtestGetRefCount(pResource) swtestGetRefCount_DISPATCH(pResource) +#define swtestAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define swtestAddAdditionalDependants(pClient, pResource, pReference) swtestAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define swtestGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define swtestGetNotificationListPtr(pNotifier) swtestGetNotificationListPtr_DISPATCH(pNotifier) +#define swtestGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ #define swtestGetNotificationShare(pNotifier) swtestGetNotificationShare_DISPATCH(pNotifier) -#define swtestMap(pGpuResource, pCallContext, pParams, pCpuMapping) swtestMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define swtestSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define swtestSetNotificationShare(pNotifier, pNotifShare) swtestSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define swtestUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define swtestUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) swtestUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define swtestGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ #define swtestGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) swtestGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -NV_STATUS swtestGetSwMethods_IMPL(struct SoftwareMethodTest *pSwTest, const METHOD **ppMethods, NvU32 *pNumMethods); +// Dispatch functions static inline NV_STATUS swtestGetSwMethods_DISPATCH(struct SoftwareMethodTest *pSwTest, const METHOD **ppMethods, NvU32 *pNumMethods) { return pSwTest->__swtestGetSwMethods__(pSwTest, ppMethods, pNumMethods); } -static inline NV_STATUS swtestCheckMemInterUnmap_DISPATCH(struct SoftwareMethodTest *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return pChannelDescendant->__swtestCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); -} - -static inline NvBool swtestShareCallback_DISPATCH(struct SoftwareMethodTest *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__swtestShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NvBool swtestAccessCallback_DISPATCH(struct SoftwareMethodTest *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__swtestAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} - -static inline NV_STATUS swtestMapTo_DISPATCH(struct SoftwareMethodTest *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__swtestMapTo__(pResource, pParams); +static inline NvBool swtestIsSwMethodStalling_DISPATCH(struct SoftwareMethodTest *pChannelDescendant, NvU32 hHandle) { + return pChannelDescendant->__swtestIsSwMethodStalling__(pChannelDescendant, hHandle); } -static inline NV_STATUS swtestGetMapAddrSpace_DISPATCH(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__swtestGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +static inline NV_STATUS swtestCheckMemInterUnmap_DISPATCH(struct SoftwareMethodTest *pChannelDescendant, NvBool bSubdeviceHandleProvided) { + return pChannelDescendant->__swtestCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } -static inline void swtestSetNotificationShare_DISPATCH(struct SoftwareMethodTest *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__swtestSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS swtestControl_DISPATCH(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__swtestControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 swtestGetRefCount_DISPATCH(struct SoftwareMethodTest *pResource) { - return pResource->__swtestGetRefCount__(pResource); +static inline NV_STATUS swtestMap_DISPATCH(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__swtestMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void swtestAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct SoftwareMethodTest *pResource, RsResourceRef *pReference) { - pResource->__swtestAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS swtestUnmap_DISPATCH(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__swtestUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS swtestControl_Prologue_DISPATCH(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__swtestControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool swtestShareCallback_DISPATCH(struct SoftwareMethodTest *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__swtestShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS swtestGetRegBaseOffsetAndSize_DISPATCH(struct SoftwareMethodTest *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__swtestGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS swtestInternalControlForward_DISPATCH(struct SoftwareMethodTest *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__swtestInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS swtestUnmapFrom_DISPATCH(struct SoftwareMethodTest *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__swtestUnmapFrom__(pResource, pParams); +static inline NV_STATUS swtestGetMapAddrSpace_DISPATCH(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__swtestGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void swtestControl_Epilogue_DISPATCH(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__swtestControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS swtestInternalControlForward_DISPATCH(struct SoftwareMethodTest *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__swtestInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle swtestGetInternalObjectHandle_DISPATCH(struct SoftwareMethodTest *pGpuResource) { return pGpuResource->__swtestGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS swtestControl_DISPATCH(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__swtestControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS swtestUnmap_DISPATCH(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__swtestUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool swtestAccessCallback_DISPATCH(struct SoftwareMethodTest *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__swtestAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS swtestGetMemInterMapParams_DISPATCH(struct SoftwareMethodTest *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { @@ -234,58 +265,80 @@ static inline NV_STATUS swtestGetMemoryMappingDescriptor_DISPATCH(struct Softwar return pRmResource->__swtestGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NvBool swtestIsSwMethodStalling_DISPATCH(struct SoftwareMethodTest *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__swtestIsSwMethodStalling__(pChannelDescendant, hHandle); +static inline NV_STATUS swtestControlSerialization_Prologue_DISPATCH(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__swtestControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS swtestControlFilter_DISPATCH(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__swtestControlFilter__(pResource, pCallContext, pParams); +static inline void swtestControlSerialization_Epilogue_DISPATCH(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__swtestControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS swtestUnregisterEvent_DISPATCH(struct SoftwareMethodTest *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__swtestUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline NV_STATUS swtestControl_Prologue_DISPATCH(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__swtestControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS swtestControlSerialization_Prologue_DISPATCH(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__swtestControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline void swtestControl_Epilogue_DISPATCH(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__swtestControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool swtestCanCopy_DISPATCH(struct SoftwareMethodTest *pResource) { return pResource->__swtestCanCopy__(pResource); } -static inline NvBool swtestIsPartialUnmapSupported_DISPATCH(struct SoftwareMethodTest *pResource) { - return pResource->__swtestIsPartialUnmapSupported__(pResource); +static inline NV_STATUS swtestIsDuplicate_DISPATCH(struct SoftwareMethodTest *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__swtestIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void swtestPreDestruct_DISPATCH(struct SoftwareMethodTest *pResource) { pResource->__swtestPreDestruct__(pResource); } -static inline NV_STATUS swtestIsDuplicate_DISPATCH(struct SoftwareMethodTest *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__swtestIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS swtestControlFilter_DISPATCH(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__swtestControlFilter__(pResource, pCallContext, pParams); } -static inline void swtestControlSerialization_Epilogue_DISPATCH(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__swtestControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool swtestIsPartialUnmapSupported_DISPATCH(struct SoftwareMethodTest *pResource) { + return pResource->__swtestIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS swtestMapTo_DISPATCH(struct SoftwareMethodTest *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__swtestMapTo__(pResource, pParams); } -static inline PEVENTNOTIFICATION *swtestGetNotificationListPtr_DISPATCH(struct SoftwareMethodTest *pNotifier) { +static inline NV_STATUS swtestUnmapFrom_DISPATCH(struct SoftwareMethodTest *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__swtestUnmapFrom__(pResource, pParams); +} + +static inline NvU32 swtestGetRefCount_DISPATCH(struct SoftwareMethodTest *pResource) { + return pResource->__swtestGetRefCount__(pResource); +} + +static inline void swtestAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct SoftwareMethodTest *pResource, RsResourceRef *pReference) { + pResource->__swtestAddAdditionalDependants__(pClient, pResource, pReference); +} + +static inline PEVENTNOTIFICATION * swtestGetNotificationListPtr_DISPATCH(struct SoftwareMethodTest *pNotifier) { return pNotifier->__swtestGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *swtestGetNotificationShare_DISPATCH(struct SoftwareMethodTest *pNotifier) { +static inline struct NotifShare * swtestGetNotificationShare_DISPATCH(struct SoftwareMethodTest *pNotifier) { return pNotifier->__swtestGetNotificationShare__(pNotifier); } -static inline NV_STATUS swtestMap_DISPATCH(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__swtestMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void swtestSetNotificationShare_DISPATCH(struct SoftwareMethodTest *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__swtestSetNotificationShare__(pNotifier, pNotifShare); +} + +static inline NV_STATUS swtestUnregisterEvent_DISPATCH(struct SoftwareMethodTest *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__swtestUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS swtestGetOrAllocNotifShare_DISPATCH(struct SoftwareMethodTest *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return pNotifier->__swtestGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } +NV_STATUS swtestGetSwMethods_IMPL(struct SoftwareMethodTest *pSwTest, const METHOD **ppMethods, NvU32 *pNumMethods); + NV_STATUS swtestConstruct_IMPL(struct SoftwareMethodTest *arg_pSwTest, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_swtestConstruct(arg_pSwTest, arg_pCallContext, arg_pParams) swtestConstruct_IMPL(arg_pSwTest, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_swintr_nvoc.c b/src/nvidia/generated/g_swintr_nvoc.c index 3428b8b5db..40f76d8b27 100644 --- a/src/nvidia/generated/g_swintr_nvoc.c +++ b/src/nvidia/generated/g_swintr_nvoc.c @@ -75,78 +75,102 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_SwIntr = /*pExportInfo=*/ &__nvoc_export_info_SwIntr }; -static void __nvoc_thunk_SwIntr_intrservRegisterIntrService(OBJGPU *pGpu, struct IntrService *pSwIntr, IntrServiceRecord pRecords[171]) { - swintrRegisterIntrService(pGpu, (struct SwIntr *)(((unsigned char *)pSwIntr) - __nvoc_rtti_SwIntr_IntrService.offset), pRecords); +// 2 down-thunk(s) defined to bridge methods in SwIntr from superclasses + +// swintrRegisterIntrService: virtual override (intrserv) base (intrserv) +static void __nvoc_down_thunk_SwIntr_intrservRegisterIntrService(OBJGPU *pGpu, struct IntrService *pSwIntr, IntrServiceRecord pRecords[175]) { + swintrRegisterIntrService(pGpu, (struct SwIntr *)(((unsigned char *) pSwIntr) - __nvoc_rtti_SwIntr_IntrService.offset), pRecords); } -static NvU32 __nvoc_thunk_SwIntr_intrservServiceInterrupt(OBJGPU *pGpu, struct IntrService *pSwIntr, IntrServiceServiceInterruptArguments *pParams) { - return swintrServiceInterrupt(pGpu, (struct SwIntr *)(((unsigned char *)pSwIntr) - __nvoc_rtti_SwIntr_IntrService.offset), pParams); +// swintrServiceInterrupt: virtual override (intrserv) base (intrserv) +static NvU32 __nvoc_down_thunk_SwIntr_intrservServiceInterrupt(OBJGPU *pGpu, struct IntrService *pSwIntr, IntrServiceServiceInterruptArguments *pParams) { + return swintrServiceInterrupt(pGpu, (struct SwIntr *)(((unsigned char *) pSwIntr) - __nvoc_rtti_SwIntr_IntrService.offset), pParams); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swintrStateLoad(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg0) { - return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg0); + +// 16 up-thunk(s) defined to bridge methods in SwIntr to superclasses + +// swintrConstructEngine: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrConstructEngine(POBJGPU pGpu, struct SwIntr *pEngstate, ENGDESCRIPTOR arg3) { + return engstateConstructEngine(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swintrStateUnload(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg0) { - return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg0); +// swintrInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_swintrInitMissing(POBJGPU pGpu, struct SwIntr *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_IntrService_swintrServiceNotificationInterrupt(OBJGPU *pGpu, struct SwIntr *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { - return intrservServiceNotificationInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_SwIntr_IntrService.offset), pParams); +// swintrStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePreInitLocked(POBJGPU pGpu, struct SwIntr *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swintrStateInitLocked(POBJGPU pGpu, struct SwIntr *pEngstate) { - return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); +// swintrStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePreInitUnlocked(POBJGPU pGpu, struct SwIntr *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swintrStatePreLoad(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg0); +// swintrStateInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStateInitLocked(POBJGPU pGpu, struct SwIntr *pEngstate) { + return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swintrStatePostUnload(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg0); +// swintrStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStateInitUnlocked(POBJGPU pGpu, struct SwIntr *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_swintrStateDestroy(POBJGPU pGpu, struct SwIntr *pEngstate) { - engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); +// swintrStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePreLoad(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swintrStatePreUnload(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg0); +// swintrStateLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStateLoad(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg3) { + return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swintrStateInitUnlocked(POBJGPU pGpu, struct SwIntr *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); +// swintrStatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePostLoad(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_swintrInitMissing(POBJGPU pGpu, struct SwIntr *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); +// swintrStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePreUnload(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swintrStatePreInitLocked(POBJGPU pGpu, struct SwIntr *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); +// swintrStateUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStateUnload(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg3) { + return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swintrStatePreInitUnlocked(POBJGPU pGpu, struct SwIntr *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); +// swintrStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePostUnload(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg3); } -static NvBool __nvoc_thunk_IntrService_swintrClearInterrupt(OBJGPU *pGpu, struct SwIntr *pIntrService, IntrServiceClearInterruptArguments *pParams) { - return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_SwIntr_IntrService.offset), pParams); +// swintrStateDestroy: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_swintrStateDestroy(POBJGPU pGpu, struct SwIntr *pEngstate) { + engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swintrStatePostLoad(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg0); +// swintrIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_swintrIsPresent(POBJGPU pGpu, struct SwIntr *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_swintrConstructEngine(POBJGPU pGpu, struct SwIntr *pEngstate, ENGDESCRIPTOR arg0) { - return engstateConstructEngine(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg0); +// swintrClearInterrupt: virtual inherited (intrserv) base (intrserv) +static NvBool __nvoc_up_thunk_IntrService_swintrClearInterrupt(OBJGPU *pGpu, struct SwIntr *pIntrService, IntrServiceClearInterruptArguments *pParams) { + return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_SwIntr_IntrService.offset), pParams); } -static NvBool __nvoc_thunk_OBJENGSTATE_swintrIsPresent(POBJGPU pGpu, struct SwIntr *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); +// swintrServiceNotificationInterrupt: virtual inherited (intrserv) base (intrserv) +static NV_STATUS __nvoc_up_thunk_IntrService_swintrServiceNotificationInterrupt(OBJGPU *pGpu, struct SwIntr *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { + return intrservServiceNotificationInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_SwIntr_IntrService.offset), pParams); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_SwIntr = { /*numEntries=*/ 0, @@ -184,51 +208,72 @@ NV_STATUS __nvoc_ctor_SwIntr(SwIntr *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_SwIntr_1(SwIntr *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // swintrRegisterIntrService -- virtual override (intrserv) base (intrserv) pThis->__swintrRegisterIntrService__ = &swintrRegisterIntrService_IMPL; + pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_SwIntr_intrservRegisterIntrService; + // swintrServiceInterrupt -- virtual override (intrserv) base (intrserv) pThis->__swintrServiceInterrupt__ = &swintrServiceInterrupt_IMPL; + pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_SwIntr_intrservServiceInterrupt; - pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_thunk_SwIntr_intrservRegisterIntrService; + // swintrConstructEngine -- virtual inherited (engstate) base (engstate) + pThis->__swintrConstructEngine__ = &__nvoc_up_thunk_OBJENGSTATE_swintrConstructEngine; - pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_thunk_SwIntr_intrservServiceInterrupt; + // swintrInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__swintrInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_swintrInitMissing; - pThis->__swintrStateLoad__ = &__nvoc_thunk_OBJENGSTATE_swintrStateLoad; + // swintrStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__swintrStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStatePreInitLocked; - pThis->__swintrStateUnload__ = &__nvoc_thunk_OBJENGSTATE_swintrStateUnload; + // swintrStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__swintrStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStatePreInitUnlocked; - pThis->__swintrServiceNotificationInterrupt__ = &__nvoc_thunk_IntrService_swintrServiceNotificationInterrupt; + // swintrStateInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__swintrStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStateInitLocked; - pThis->__swintrStateInitLocked__ = &__nvoc_thunk_OBJENGSTATE_swintrStateInitLocked; + // swintrStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__swintrStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStateInitUnlocked; - pThis->__swintrStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_swintrStatePreLoad; + // swintrStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__swintrStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStatePreLoad; - pThis->__swintrStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_swintrStatePostUnload; + // swintrStateLoad -- virtual inherited (engstate) base (engstate) + pThis->__swintrStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStateLoad; - pThis->__swintrStateDestroy__ = &__nvoc_thunk_OBJENGSTATE_swintrStateDestroy; + // swintrStatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__swintrStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStatePostLoad; - pThis->__swintrStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_swintrStatePreUnload; + // swintrStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__swintrStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStatePreUnload; - pThis->__swintrStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_swintrStateInitUnlocked; + // swintrStateUnload -- virtual inherited (engstate) base (engstate) + pThis->__swintrStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStateUnload; - pThis->__swintrInitMissing__ = &__nvoc_thunk_OBJENGSTATE_swintrInitMissing; + // swintrStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__swintrStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStatePostUnload; - pThis->__swintrStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_swintrStatePreInitLocked; + // swintrStateDestroy -- virtual inherited (engstate) base (engstate) + pThis->__swintrStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStateDestroy; - pThis->__swintrStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_swintrStatePreInitUnlocked; + // swintrIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__swintrIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_swintrIsPresent; - pThis->__swintrClearInterrupt__ = &__nvoc_thunk_IntrService_swintrClearInterrupt; + // swintrClearInterrupt -- virtual inherited (intrserv) base (intrserv) + pThis->__swintrClearInterrupt__ = &__nvoc_up_thunk_IntrService_swintrClearInterrupt; - pThis->__swintrStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_swintrStatePostLoad; + // swintrServiceNotificationInterrupt -- virtual inherited (intrserv) base (intrserv) + pThis->__swintrServiceNotificationInterrupt__ = &__nvoc_up_thunk_IntrService_swintrServiceNotificationInterrupt; +} // End __nvoc_init_funcTable_SwIntr_1 with approximately 20 basic block(s). - pThis->__swintrConstructEngine__ = &__nvoc_thunk_OBJENGSTATE_swintrConstructEngine; - - pThis->__swintrIsPresent__ = &__nvoc_thunk_OBJENGSTATE_swintrIsPresent; -} +// Initialize vtable(s) for 18 virtual method(s). void __nvoc_init_funcTable_SwIntr(SwIntr *pThis) { + + // Initialize vtable(s) with 18 per-object function pointer(s). __nvoc_init_funcTable_SwIntr_1(pThis); } diff --git a/src/nvidia/generated/g_swintr_nvoc.h b/src/nvidia/generated/g_swintr_nvoc.h index 3b5dcc2587..612d075c96 100644 --- a/src/nvidia/generated/g_swintr_nvoc.h +++ b/src/nvidia/generated/g_swintr_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_SWINTR_NVOC_H_ #define _G_SWINTR_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_swintr_nvoc.h" #ifndef SWINTR_H @@ -54,32 +62,41 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct SwIntr { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; struct IntrService __nvoc_base_IntrService; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct IntrService *__nvoc_pbase_IntrService; - struct SwIntr *__nvoc_pbase_SwIntr; - void (*__swintrRegisterIntrService__)(OBJGPU *, struct SwIntr *, IntrServiceRecord *); - NvU32 (*__swintrServiceInterrupt__)(OBJGPU *, struct SwIntr *, IntrServiceServiceInterruptArguments *); - NV_STATUS (*__swintrStateLoad__)(POBJGPU, struct SwIntr *, NvU32); - NV_STATUS (*__swintrStateUnload__)(POBJGPU, struct SwIntr *, NvU32); - NV_STATUS (*__swintrServiceNotificationInterrupt__)(OBJGPU *, struct SwIntr *, IntrServiceServiceNotificationInterruptArguments *); - NV_STATUS (*__swintrStateInitLocked__)(POBJGPU, struct SwIntr *); - NV_STATUS (*__swintrStatePreLoad__)(POBJGPU, struct SwIntr *, NvU32); - NV_STATUS (*__swintrStatePostUnload__)(POBJGPU, struct SwIntr *, NvU32); - void (*__swintrStateDestroy__)(POBJGPU, struct SwIntr *); - NV_STATUS (*__swintrStatePreUnload__)(POBJGPU, struct SwIntr *, NvU32); - NV_STATUS (*__swintrStateInitUnlocked__)(POBJGPU, struct SwIntr *); - void (*__swintrInitMissing__)(POBJGPU, struct SwIntr *); - NV_STATUS (*__swintrStatePreInitLocked__)(POBJGPU, struct SwIntr *); - NV_STATUS (*__swintrStatePreInitUnlocked__)(POBJGPU, struct SwIntr *); - NvBool (*__swintrClearInterrupt__)(OBJGPU *, struct SwIntr *, IntrServiceClearInterruptArguments *); - NV_STATUS (*__swintrStatePostLoad__)(POBJGPU, struct SwIntr *, NvU32); - NV_STATUS (*__swintrConstructEngine__)(POBJGPU, struct SwIntr *, ENGDESCRIPTOR); - NvBool (*__swintrIsPresent__)(POBJGPU, struct SwIntr *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct IntrService *__nvoc_pbase_IntrService; // intrserv super + struct SwIntr *__nvoc_pbase_SwIntr; // swintr + + // Vtable with 18 per-object function pointers + void (*__swintrRegisterIntrService__)(OBJGPU *, struct SwIntr * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) + NvU32 (*__swintrServiceInterrupt__)(OBJGPU *, struct SwIntr * /*this*/, IntrServiceServiceInterruptArguments *); // virtual override (intrserv) base (intrserv) + NV_STATUS (*__swintrConstructEngine__)(POBJGPU, struct SwIntr * /*this*/, ENGDESCRIPTOR); // virtual inherited (engstate) base (engstate) + void (*__swintrInitMissing__)(POBJGPU, struct SwIntr * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__swintrStatePreInitLocked__)(POBJGPU, struct SwIntr * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__swintrStatePreInitUnlocked__)(POBJGPU, struct SwIntr * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__swintrStateInitLocked__)(POBJGPU, struct SwIntr * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__swintrStateInitUnlocked__)(POBJGPU, struct SwIntr * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__swintrStatePreLoad__)(POBJGPU, struct SwIntr * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__swintrStateLoad__)(POBJGPU, struct SwIntr * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__swintrStatePostLoad__)(POBJGPU, struct SwIntr * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__swintrStatePreUnload__)(POBJGPU, struct SwIntr * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__swintrStateUnload__)(POBJGPU, struct SwIntr * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__swintrStatePostUnload__)(POBJGPU, struct SwIntr * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__swintrStateDestroy__)(POBJGPU, struct SwIntr * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__swintrIsPresent__)(POBJGPU, struct SwIntr * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__swintrClearInterrupt__)(OBJGPU *, struct SwIntr * /*this*/, IntrServiceClearInterruptArguments *); // virtual inherited (intrserv) base (intrserv) + NV_STATUS (*__swintrServiceNotificationInterrupt__)(OBJGPU *, struct SwIntr * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual inherited (intrserv) base (intrserv) }; #ifndef __NVOC_CLASS_SwIntr_TYPEDEF__ @@ -91,6 +108,7 @@ typedef struct SwIntr SwIntr; #define __nvoc_class_id_SwIntr 0x5ca633 #endif /* __nvoc_class_id_SwIntr */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_SwIntr; #define __staticCast_SwIntr(pThis) \ @@ -103,6 +121,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_SwIntr; ((SwIntr*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(SwIntr))) #endif //__nvoc_swintr_h_disabled +// Property macros #define PDB_PROP_SWINTR_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_SWINTR_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -112,99 +131,121 @@ NV_STATUS __nvoc_objCreate_SwIntr(SwIntr**, Dynamic*, NvU32); #define __objCreate_SwIntr(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_SwIntr((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define swintrRegisterIntrService_FNPTR(pSwIntr) pSwIntr->__swintrRegisterIntrService__ #define swintrRegisterIntrService(pGpu, pSwIntr, pRecords) swintrRegisterIntrService_DISPATCH(pGpu, pSwIntr, pRecords) +#define swintrServiceInterrupt_FNPTR(pSwIntr) pSwIntr->__swintrServiceInterrupt__ #define swintrServiceInterrupt(pGpu, pSwIntr, pParams) swintrServiceInterrupt_DISPATCH(pGpu, pSwIntr, pParams) -#define swintrStateLoad(pGpu, pEngstate, arg0) swintrStateLoad_DISPATCH(pGpu, pEngstate, arg0) -#define swintrStateUnload(pGpu, pEngstate, arg0) swintrStateUnload_DISPATCH(pGpu, pEngstate, arg0) -#define swintrServiceNotificationInterrupt(pGpu, pIntrService, pParams) swintrServiceNotificationInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define swintrStateInitLocked(pGpu, pEngstate) swintrStateInitLocked_DISPATCH(pGpu, pEngstate) -#define swintrStatePreLoad(pGpu, pEngstate, arg0) swintrStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define swintrStatePostUnload(pGpu, pEngstate, arg0) swintrStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define swintrStateDestroy(pGpu, pEngstate) swintrStateDestroy_DISPATCH(pGpu, pEngstate) -#define swintrStatePreUnload(pGpu, pEngstate, arg0) swintrStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define swintrStateInitUnlocked(pGpu, pEngstate) swintrStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define swintrConstructEngine_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ +#define swintrConstructEngine(pGpu, pEngstate, arg3) swintrConstructEngine_DISPATCH(pGpu, pEngstate, arg3) +#define swintrInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define swintrInitMissing(pGpu, pEngstate) swintrInitMissing_DISPATCH(pGpu, pEngstate) +#define swintrStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define swintrStatePreInitLocked(pGpu, pEngstate) swintrStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define swintrStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define swintrStatePreInitUnlocked(pGpu, pEngstate) swintrStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define swintrClearInterrupt(pGpu, pIntrService, pParams) swintrClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define swintrStatePostLoad(pGpu, pEngstate, arg0) swintrStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) -#define swintrConstructEngine(pGpu, pEngstate, arg0) swintrConstructEngine_DISPATCH(pGpu, pEngstate, arg0) +#define swintrStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define swintrStateInitLocked(pGpu, pEngstate) swintrStateInitLocked_DISPATCH(pGpu, pEngstate) +#define swintrStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define swintrStateInitUnlocked(pGpu, pEngstate) swintrStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define swintrStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define swintrStatePreLoad(pGpu, pEngstate, arg3) swintrStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define swintrStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define swintrStateLoad(pGpu, pEngstate, arg3) swintrStateLoad_DISPATCH(pGpu, pEngstate, arg3) +#define swintrStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define swintrStatePostLoad(pGpu, pEngstate, arg3) swintrStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define swintrStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define swintrStatePreUnload(pGpu, pEngstate, arg3) swintrStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define swintrStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define swintrStateUnload(pGpu, pEngstate, arg3) swintrStateUnload_DISPATCH(pGpu, pEngstate, arg3) +#define swintrStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define swintrStatePostUnload(pGpu, pEngstate, arg3) swintrStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define swintrStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define swintrStateDestroy(pGpu, pEngstate) swintrStateDestroy_DISPATCH(pGpu, pEngstate) +#define swintrIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define swintrIsPresent(pGpu, pEngstate) swintrIsPresent_DISPATCH(pGpu, pEngstate) -void swintrRegisterIntrService_IMPL(OBJGPU *pGpu, struct SwIntr *pSwIntr, IntrServiceRecord pRecords[171]); +#define swintrClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservClearInterrupt__ +#define swintrClearInterrupt(pGpu, pIntrService, pParams) swintrClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) +#define swintrServiceNotificationInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ +#define swintrServiceNotificationInterrupt(pGpu, pIntrService, pParams) swintrServiceNotificationInterrupt_DISPATCH(pGpu, pIntrService, pParams) -static inline void swintrRegisterIntrService_DISPATCH(OBJGPU *pGpu, struct SwIntr *pSwIntr, IntrServiceRecord pRecords[171]) { +// Dispatch functions +static inline void swintrRegisterIntrService_DISPATCH(OBJGPU *pGpu, struct SwIntr *pSwIntr, IntrServiceRecord pRecords[175]) { pSwIntr->__swintrRegisterIntrService__(pGpu, pSwIntr, pRecords); } -NvU32 swintrServiceInterrupt_IMPL(OBJGPU *pGpu, struct SwIntr *pSwIntr, IntrServiceServiceInterruptArguments *pParams); - static inline NvU32 swintrServiceInterrupt_DISPATCH(OBJGPU *pGpu, struct SwIntr *pSwIntr, IntrServiceServiceInterruptArguments *pParams) { return pSwIntr->__swintrServiceInterrupt__(pGpu, pSwIntr, pParams); } -static inline NV_STATUS swintrStateLoad_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg0) { - return pEngstate->__swintrStateLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS swintrConstructEngine_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate, ENGDESCRIPTOR arg3) { + return pEngstate->__swintrConstructEngine__(pGpu, pEngstate, arg3); } -static inline NV_STATUS swintrStateUnload_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg0) { - return pEngstate->__swintrStateUnload__(pGpu, pEngstate, arg0); +static inline void swintrInitMissing_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate) { + pEngstate->__swintrInitMissing__(pGpu, pEngstate); } -static inline NV_STATUS swintrServiceNotificationInterrupt_DISPATCH(OBJGPU *pGpu, struct SwIntr *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { - return pIntrService->__swintrServiceNotificationInterrupt__(pGpu, pIntrService, pParams); +static inline NV_STATUS swintrStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate) { + return pEngstate->__swintrStatePreInitLocked__(pGpu, pEngstate); +} + +static inline NV_STATUS swintrStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate) { + return pEngstate->__swintrStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS swintrStateInitLocked_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate) { return pEngstate->__swintrStateInitLocked__(pGpu, pEngstate); } -static inline NV_STATUS swintrStatePreLoad_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg0) { - return pEngstate->__swintrStatePreLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS swintrStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate) { + return pEngstate->__swintrStateInitUnlocked__(pGpu, pEngstate); } -static inline NV_STATUS swintrStatePostUnload_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg0) { - return pEngstate->__swintrStatePostUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS swintrStatePreLoad_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg3) { + return pEngstate->__swintrStatePreLoad__(pGpu, pEngstate, arg3); } -static inline void swintrStateDestroy_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate) { - pEngstate->__swintrStateDestroy__(pGpu, pEngstate); +static inline NV_STATUS swintrStateLoad_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg3) { + return pEngstate->__swintrStateLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS swintrStatePreUnload_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg0) { - return pEngstate->__swintrStatePreUnload__(pGpu, pEngstate, arg0); +static inline NV_STATUS swintrStatePostLoad_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg3) { + return pEngstate->__swintrStatePostLoad__(pGpu, pEngstate, arg3); } -static inline NV_STATUS swintrStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate) { - return pEngstate->__swintrStateInitUnlocked__(pGpu, pEngstate); +static inline NV_STATUS swintrStatePreUnload_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg3) { + return pEngstate->__swintrStatePreUnload__(pGpu, pEngstate, arg3); } -static inline void swintrInitMissing_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate) { - pEngstate->__swintrInitMissing__(pGpu, pEngstate); +static inline NV_STATUS swintrStateUnload_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg3) { + return pEngstate->__swintrStateUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS swintrStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate) { - return pEngstate->__swintrStatePreInitLocked__(pGpu, pEngstate); +static inline NV_STATUS swintrStatePostUnload_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg3) { + return pEngstate->__swintrStatePostUnload__(pGpu, pEngstate, arg3); } -static inline NV_STATUS swintrStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate) { - return pEngstate->__swintrStatePreInitUnlocked__(pGpu, pEngstate); +static inline void swintrStateDestroy_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate) { + pEngstate->__swintrStateDestroy__(pGpu, pEngstate); +} + +static inline NvBool swintrIsPresent_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate) { + return pEngstate->__swintrIsPresent__(pGpu, pEngstate); } static inline NvBool swintrClearInterrupt_DISPATCH(OBJGPU *pGpu, struct SwIntr *pIntrService, IntrServiceClearInterruptArguments *pParams) { return pIntrService->__swintrClearInterrupt__(pGpu, pIntrService, pParams); } -static inline NV_STATUS swintrStatePostLoad_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate, NvU32 arg0) { - return pEngstate->__swintrStatePostLoad__(pGpu, pEngstate, arg0); +static inline NV_STATUS swintrServiceNotificationInterrupt_DISPATCH(OBJGPU *pGpu, struct SwIntr *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { + return pIntrService->__swintrServiceNotificationInterrupt__(pGpu, pIntrService, pParams); } -static inline NV_STATUS swintrConstructEngine_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate, ENGDESCRIPTOR arg0) { - return pEngstate->__swintrConstructEngine__(pGpu, pEngstate, arg0); -} +void swintrRegisterIntrService_IMPL(OBJGPU *pGpu, struct SwIntr *pSwIntr, IntrServiceRecord pRecords[175]); -static inline NvBool swintrIsPresent_DISPATCH(POBJGPU pGpu, struct SwIntr *pEngstate) { - return pEngstate->__swintrIsPresent__(pGpu, pEngstate); -} +NvU32 swintrServiceInterrupt_IMPL(OBJGPU *pGpu, struct SwIntr *pSwIntr, IntrServiceServiceInterruptArguments *pParams); #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_syncgpuboost_nvoc.c b/src/nvidia/generated/g_syncgpuboost_nvoc.c index 79295a18ea..f388532068 100644 --- a/src/nvidia/generated/g_syncgpuboost_nvoc.c +++ b/src/nvidia/generated/g_syncgpuboost_nvoc.c @@ -84,90 +84,114 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_SyncGpuBoost = /*pExportInfo=*/ &__nvoc_export_info_SyncGpuBoost }; -static NvBool __nvoc_thunk_RmResource_syncgpuboostShareCallback(struct SyncGpuBoost *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// 21 up-thunk(s) defined to bridge methods in SyncGpuBoost to superclasses + +// syncgpuboostAccessCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_syncgpuboostAccessCallback(struct SyncGpuBoost *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RmResource_syncgpuboostCheckMemInterUnmap(struct SyncGpuBoost *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), bSubdeviceHandleProvided); +// syncgpuboostShareCallback: virtual inherited (rmres) base (rmres) +static NvBool __nvoc_up_thunk_RmResource_syncgpuboostShareCallback(struct SyncGpuBoost *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RsResource_syncgpuboostControl(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControl((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pCallContext, pParams); +// syncgpuboostGetMemInterMapParams: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_syncgpuboostGetMemInterMapParams(struct SyncGpuBoost *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RmResource_syncgpuboostGetMemInterMapParams(struct SyncGpuBoost *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pParams); +// syncgpuboostCheckMemInterUnmap: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_syncgpuboostCheckMemInterUnmap(struct SyncGpuBoost *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_RmResource_syncgpuboostGetMemoryMappingDescriptor(struct SyncGpuBoost *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), ppMemDesc); +// syncgpuboostGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_syncgpuboostGetMemoryMappingDescriptor(struct SyncGpuBoost *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), ppMemDesc); } -static NvU32 __nvoc_thunk_RsResource_syncgpuboostGetRefCount(struct SyncGpuBoost *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset)); +// syncgpuboostControlSerialization_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_syncgpuboostControlSerialization_Prologue(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_syncgpuboostControlFilter(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pCallContext, pParams); +// syncgpuboostControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_syncgpuboostControlSerialization_Epilogue(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_syncgpuboostAddAdditionalDependants(struct RsClient *pClient, struct SyncGpuBoost *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pReference); +// syncgpuboostControl_Prologue: virtual inherited (rmres) base (rmres) +static NV_STATUS __nvoc_up_thunk_RmResource_syncgpuboostControl_Prologue(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_syncgpuboostControlSerialization_Prologue(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pCallContext, pParams); +// syncgpuboostControl_Epilogue: virtual inherited (rmres) base (rmres) +static void __nvoc_up_thunk_RmResource_syncgpuboostControl_Epilogue(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_syncgpuboostControl_Prologue(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pCallContext, pParams); +// syncgpuboostCanCopy: virtual inherited (res) base (rmres) +static NvBool __nvoc_up_thunk_RsResource_syncgpuboostCanCopy(struct SyncGpuBoost *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_syncgpuboostCanCopy(struct SyncGpuBoost *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset)); +// syncgpuboostIsDuplicate: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostIsDuplicate(struct SyncGpuBoost *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_syncgpuboostUnmap(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return resUnmap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pCallContext, pCpuMapping); +// syncgpuboostPreDestruct: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_syncgpuboostPreDestruct(struct SyncGpuBoost *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_syncgpuboostIsPartialUnmapSupported(struct SyncGpuBoost *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset)); +// syncgpuboostControl: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostControl(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_syncgpuboostPreDestruct(struct SyncGpuBoost *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset)); +// syncgpuboostControlFilter: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostControlFilter(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_syncgpuboostMapTo(struct SyncGpuBoost *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pParams); +// syncgpuboostMap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostMap(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_syncgpuboostIsDuplicate(struct SyncGpuBoost *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), hMemory, pDuplicate); +// syncgpuboostUnmap: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostUnmap(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_RmResource_syncgpuboostControlSerialization_Epilogue(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pCallContext, pParams); +// syncgpuboostIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body +static NvBool __nvoc_up_thunk_RsResource_syncgpuboostIsPartialUnmapSupported(struct SyncGpuBoost *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset)); } -static void __nvoc_thunk_RmResource_syncgpuboostControl_Epilogue(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pCallContext, pParams); +// syncgpuboostMapTo: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostMapTo(struct SyncGpuBoost *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_syncgpuboostUnmapFrom(struct SyncGpuBoost *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pParams); +// syncgpuboostUnmapFrom: virtual inherited (res) base (rmres) +static NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostUnmapFrom(struct SyncGpuBoost *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_syncgpuboostMap(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return resMap((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pCallContext, pParams, pCpuMapping); +// syncgpuboostGetRefCount: virtual inherited (res) base (rmres) +static NvU32 __nvoc_up_thunk_RsResource_syncgpuboostGetRefCount(struct SyncGpuBoost *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_syncgpuboostAccessCallback(struct SyncGpuBoost *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// syncgpuboostAddAdditionalDependants: virtual inherited (res) base (rmres) +static void __nvoc_up_thunk_RsResource_syncgpuboostAddAdditionalDependants(struct RsClient *pClient, struct SyncGpuBoost *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_SyncGpuBoost = { /*numEntries=*/ 0, @@ -204,53 +228,79 @@ NV_STATUS __nvoc_ctor_SyncGpuBoost(SyncGpuBoost *pThis, struct CALL_CONTEXT * ar return status; } +// Vtable initialization static void __nvoc_init_funcTable_SyncGpuBoost_1(SyncGpuBoost *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - pThis->__syncgpuboostShareCallback__ = &__nvoc_thunk_RmResource_syncgpuboostShareCallback; + // syncgpuboostAccessCallback -- virtual inherited (rmres) base (rmres) + pThis->__syncgpuboostAccessCallback__ = &__nvoc_up_thunk_RmResource_syncgpuboostAccessCallback; - pThis->__syncgpuboostCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_syncgpuboostCheckMemInterUnmap; + // syncgpuboostShareCallback -- virtual inherited (rmres) base (rmres) + pThis->__syncgpuboostShareCallback__ = &__nvoc_up_thunk_RmResource_syncgpuboostShareCallback; - pThis->__syncgpuboostControl__ = &__nvoc_thunk_RsResource_syncgpuboostControl; + // syncgpuboostGetMemInterMapParams -- virtual inherited (rmres) base (rmres) + pThis->__syncgpuboostGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_syncgpuboostGetMemInterMapParams; - pThis->__syncgpuboostGetMemInterMapParams__ = &__nvoc_thunk_RmResource_syncgpuboostGetMemInterMapParams; + // syncgpuboostCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) + pThis->__syncgpuboostCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_syncgpuboostCheckMemInterUnmap; - pThis->__syncgpuboostGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_syncgpuboostGetMemoryMappingDescriptor; + // syncgpuboostGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) + pThis->__syncgpuboostGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_syncgpuboostGetMemoryMappingDescriptor; - pThis->__syncgpuboostGetRefCount__ = &__nvoc_thunk_RsResource_syncgpuboostGetRefCount; + // syncgpuboostControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__syncgpuboostControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_syncgpuboostControlSerialization_Prologue; - pThis->__syncgpuboostControlFilter__ = &__nvoc_thunk_RsResource_syncgpuboostControlFilter; + // syncgpuboostControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__syncgpuboostControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_syncgpuboostControlSerialization_Epilogue; - pThis->__syncgpuboostAddAdditionalDependants__ = &__nvoc_thunk_RsResource_syncgpuboostAddAdditionalDependants; + // syncgpuboostControl_Prologue -- virtual inherited (rmres) base (rmres) + pThis->__syncgpuboostControl_Prologue__ = &__nvoc_up_thunk_RmResource_syncgpuboostControl_Prologue; - pThis->__syncgpuboostControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_syncgpuboostControlSerialization_Prologue; + // syncgpuboostControl_Epilogue -- virtual inherited (rmres) base (rmres) + pThis->__syncgpuboostControl_Epilogue__ = &__nvoc_up_thunk_RmResource_syncgpuboostControl_Epilogue; - pThis->__syncgpuboostControl_Prologue__ = &__nvoc_thunk_RmResource_syncgpuboostControl_Prologue; + // syncgpuboostCanCopy -- virtual inherited (res) base (rmres) + pThis->__syncgpuboostCanCopy__ = &__nvoc_up_thunk_RsResource_syncgpuboostCanCopy; - pThis->__syncgpuboostCanCopy__ = &__nvoc_thunk_RsResource_syncgpuboostCanCopy; + // syncgpuboostIsDuplicate -- virtual inherited (res) base (rmres) + pThis->__syncgpuboostIsDuplicate__ = &__nvoc_up_thunk_RsResource_syncgpuboostIsDuplicate; - pThis->__syncgpuboostUnmap__ = &__nvoc_thunk_RsResource_syncgpuboostUnmap; + // syncgpuboostPreDestruct -- virtual inherited (res) base (rmres) + pThis->__syncgpuboostPreDestruct__ = &__nvoc_up_thunk_RsResource_syncgpuboostPreDestruct; - pThis->__syncgpuboostIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_syncgpuboostIsPartialUnmapSupported; + // syncgpuboostControl -- virtual inherited (res) base (rmres) + pThis->__syncgpuboostControl__ = &__nvoc_up_thunk_RsResource_syncgpuboostControl; - pThis->__syncgpuboostPreDestruct__ = &__nvoc_thunk_RsResource_syncgpuboostPreDestruct; + // syncgpuboostControlFilter -- virtual inherited (res) base (rmres) + pThis->__syncgpuboostControlFilter__ = &__nvoc_up_thunk_RsResource_syncgpuboostControlFilter; - pThis->__syncgpuboostMapTo__ = &__nvoc_thunk_RsResource_syncgpuboostMapTo; + // syncgpuboostMap -- virtual inherited (res) base (rmres) + pThis->__syncgpuboostMap__ = &__nvoc_up_thunk_RsResource_syncgpuboostMap; - pThis->__syncgpuboostIsDuplicate__ = &__nvoc_thunk_RsResource_syncgpuboostIsDuplicate; + // syncgpuboostUnmap -- virtual inherited (res) base (rmres) + pThis->__syncgpuboostUnmap__ = &__nvoc_up_thunk_RsResource_syncgpuboostUnmap; - pThis->__syncgpuboostControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_syncgpuboostControlSerialization_Epilogue; + // syncgpuboostIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body + pThis->__syncgpuboostIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_syncgpuboostIsPartialUnmapSupported; - pThis->__syncgpuboostControl_Epilogue__ = &__nvoc_thunk_RmResource_syncgpuboostControl_Epilogue; + // syncgpuboostMapTo -- virtual inherited (res) base (rmres) + pThis->__syncgpuboostMapTo__ = &__nvoc_up_thunk_RsResource_syncgpuboostMapTo; - pThis->__syncgpuboostUnmapFrom__ = &__nvoc_thunk_RsResource_syncgpuboostUnmapFrom; + // syncgpuboostUnmapFrom -- virtual inherited (res) base (rmres) + pThis->__syncgpuboostUnmapFrom__ = &__nvoc_up_thunk_RsResource_syncgpuboostUnmapFrom; - pThis->__syncgpuboostMap__ = &__nvoc_thunk_RsResource_syncgpuboostMap; + // syncgpuboostGetRefCount -- virtual inherited (res) base (rmres) + pThis->__syncgpuboostGetRefCount__ = &__nvoc_up_thunk_RsResource_syncgpuboostGetRefCount; - pThis->__syncgpuboostAccessCallback__ = &__nvoc_thunk_RmResource_syncgpuboostAccessCallback; -} + // syncgpuboostAddAdditionalDependants -- virtual inherited (res) base (rmres) + pThis->__syncgpuboostAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_syncgpuboostAddAdditionalDependants; +} // End __nvoc_init_funcTable_SyncGpuBoost_1 with approximately 21 basic block(s). + +// Initialize vtable(s) for 21 virtual method(s). void __nvoc_init_funcTable_SyncGpuBoost(SyncGpuBoost *pThis) { + + // Initialize vtable(s) with 21 per-object function pointer(s). __nvoc_init_funcTable_SyncGpuBoost_1(pThis); } diff --git a/src/nvidia/generated/g_syncgpuboost_nvoc.h b/src/nvidia/generated/g_syncgpuboost_nvoc.h index e8e8207ae4..4694f93b5e 100644 --- a/src/nvidia/generated/g_syncgpuboost_nvoc.h +++ b/src/nvidia/generated/g_syncgpuboost_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_SYNCGPUBOOST_NVOC_H_ #define _G_SYNCGPUBOOST_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_syncgpuboost_nvoc.h" #ifndef _SYNCGPUBOOST_H_ @@ -49,35 +57,46 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct SyncGpuBoost { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct SyncGpuBoost *__nvoc_pbase_SyncGpuBoost; - NvBool (*__syncgpuboostShareCallback__)(struct SyncGpuBoost *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__syncgpuboostCheckMemInterUnmap__)(struct SyncGpuBoost *, NvBool); - NV_STATUS (*__syncgpuboostControl__)(struct SyncGpuBoost *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__syncgpuboostGetMemInterMapParams__)(struct SyncGpuBoost *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__syncgpuboostGetMemoryMappingDescriptor__)(struct SyncGpuBoost *, struct MEMORY_DESCRIPTOR **); - NvU32 (*__syncgpuboostGetRefCount__)(struct SyncGpuBoost *); - NV_STATUS (*__syncgpuboostControlFilter__)(struct SyncGpuBoost *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__syncgpuboostAddAdditionalDependants__)(struct RsClient *, struct SyncGpuBoost *, RsResourceRef *); - NV_STATUS (*__syncgpuboostControlSerialization_Prologue__)(struct SyncGpuBoost *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__syncgpuboostControl_Prologue__)(struct SyncGpuBoost *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__syncgpuboostCanCopy__)(struct SyncGpuBoost *); - NV_STATUS (*__syncgpuboostUnmap__)(struct SyncGpuBoost *, struct CALL_CONTEXT *, RsCpuMapping *); - NvBool (*__syncgpuboostIsPartialUnmapSupported__)(struct SyncGpuBoost *); - void (*__syncgpuboostPreDestruct__)(struct SyncGpuBoost *); - NV_STATUS (*__syncgpuboostMapTo__)(struct SyncGpuBoost *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__syncgpuboostIsDuplicate__)(struct SyncGpuBoost *, NvHandle, NvBool *); - void (*__syncgpuboostControlSerialization_Epilogue__)(struct SyncGpuBoost *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - void (*__syncgpuboostControl_Epilogue__)(struct SyncGpuBoost *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__syncgpuboostUnmapFrom__)(struct SyncGpuBoost *, RS_RES_UNMAP_FROM_PARAMS *); - NV_STATUS (*__syncgpuboostMap__)(struct SyncGpuBoost *, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__syncgpuboostAccessCallback__)(struct SyncGpuBoost *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^3 + struct RsResource *__nvoc_pbase_RsResource; // res super^2 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^2 + struct RmResource *__nvoc_pbase_RmResource; // rmres super + struct SyncGpuBoost *__nvoc_pbase_SyncGpuBoost; // syncgpuboost + + // Vtable with 21 per-object function pointers + NvBool (*__syncgpuboostAccessCallback__)(struct SyncGpuBoost * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) + NvBool (*__syncgpuboostShareCallback__)(struct SyncGpuBoost * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__syncgpuboostGetMemInterMapParams__)(struct SyncGpuBoost * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__syncgpuboostCheckMemInterUnmap__)(struct SyncGpuBoost * /*this*/, NvBool); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__syncgpuboostGetMemoryMappingDescriptor__)(struct SyncGpuBoost * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__syncgpuboostControlSerialization_Prologue__)(struct SyncGpuBoost * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__syncgpuboostControlSerialization_Epilogue__)(struct SyncGpuBoost * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__syncgpuboostControl_Prologue__)(struct SyncGpuBoost * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__syncgpuboostControl_Epilogue__)(struct SyncGpuBoost * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NvBool (*__syncgpuboostCanCopy__)(struct SyncGpuBoost * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__syncgpuboostIsDuplicate__)(struct SyncGpuBoost * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (rmres) + void (*__syncgpuboostPreDestruct__)(struct SyncGpuBoost * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__syncgpuboostControl__)(struct SyncGpuBoost * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__syncgpuboostControlFilter__)(struct SyncGpuBoost * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__syncgpuboostMap__)(struct SyncGpuBoost * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NV_STATUS (*__syncgpuboostUnmap__)(struct SyncGpuBoost * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NvBool (*__syncgpuboostIsPartialUnmapSupported__)(struct SyncGpuBoost * /*this*/); // inline virtual inherited (res) base (rmres) body + NV_STATUS (*__syncgpuboostMapTo__)(struct SyncGpuBoost * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) + NV_STATUS (*__syncgpuboostUnmapFrom__)(struct SyncGpuBoost * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) + NvU32 (*__syncgpuboostGetRefCount__)(struct SyncGpuBoost * /*this*/); // virtual inherited (res) base (rmres) + void (*__syncgpuboostAddAdditionalDependants__)(struct RsClient *, struct SyncGpuBoost * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) + + // Data members NvU32 gpuBoostGroupId; }; @@ -90,6 +109,7 @@ typedef struct SyncGpuBoost SyncGpuBoost; #define __nvoc_class_id_SyncGpuBoost 0xc7e30b #endif /* __nvoc_class_id_SyncGpuBoost */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_SyncGpuBoost; #define __staticCast_SyncGpuBoost(pThis) \ @@ -102,116 +122,140 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_SyncGpuBoost; ((SyncGpuBoost*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(SyncGpuBoost))) #endif //__nvoc_syncgpuboost_h_disabled - NV_STATUS __nvoc_objCreateDynamic_SyncGpuBoost(SyncGpuBoost**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_SyncGpuBoost(SyncGpuBoost**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_SyncGpuBoost(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_SyncGpuBoost((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define syncgpuboostAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define syncgpuboostAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) syncgpuboostAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define syncgpuboostShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ #define syncgpuboostShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) syncgpuboostShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define syncgpuboostCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) syncgpuboostCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define syncgpuboostControl(pResource, pCallContext, pParams) syncgpuboostControl_DISPATCH(pResource, pCallContext, pParams) +#define syncgpuboostGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define syncgpuboostGetMemInterMapParams(pRmResource, pParams) syncgpuboostGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define syncgpuboostCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define syncgpuboostCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) syncgpuboostCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define syncgpuboostGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define syncgpuboostGetMemoryMappingDescriptor(pRmResource, ppMemDesc) syncgpuboostGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define syncgpuboostGetRefCount(pResource) syncgpuboostGetRefCount_DISPATCH(pResource) -#define syncgpuboostControlFilter(pResource, pCallContext, pParams) syncgpuboostControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define syncgpuboostAddAdditionalDependants(pClient, pResource, pReference) syncgpuboostAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define syncgpuboostControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define syncgpuboostControlSerialization_Prologue(pResource, pCallContext, pParams) syncgpuboostControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define syncgpuboostControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define syncgpuboostControlSerialization_Epilogue(pResource, pCallContext, pParams) syncgpuboostControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define syncgpuboostControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ #define syncgpuboostControl_Prologue(pResource, pCallContext, pParams) syncgpuboostControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define syncgpuboostControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define syncgpuboostControl_Epilogue(pResource, pCallContext, pParams) syncgpuboostControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define syncgpuboostCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define syncgpuboostCanCopy(pResource) syncgpuboostCanCopy_DISPATCH(pResource) +#define syncgpuboostIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define syncgpuboostIsDuplicate(pResource, hMemory, pDuplicate) syncgpuboostIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define syncgpuboostPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define syncgpuboostPreDestruct(pResource) syncgpuboostPreDestruct_DISPATCH(pResource) +#define syncgpuboostControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define syncgpuboostControl(pResource, pCallContext, pParams) syncgpuboostControl_DISPATCH(pResource, pCallContext, pParams) +#define syncgpuboostControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define syncgpuboostControlFilter(pResource, pCallContext, pParams) syncgpuboostControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define syncgpuboostMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define syncgpuboostMap(pResource, pCallContext, pParams, pCpuMapping) syncgpuboostMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) +#define syncgpuboostUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ #define syncgpuboostUnmap(pResource, pCallContext, pCpuMapping) syncgpuboostUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) +#define syncgpuboostIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ #define syncgpuboostIsPartialUnmapSupported(pResource) syncgpuboostIsPartialUnmapSupported_DISPATCH(pResource) -#define syncgpuboostPreDestruct(pResource) syncgpuboostPreDestruct_DISPATCH(pResource) +#define syncgpuboostMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ #define syncgpuboostMapTo(pResource, pParams) syncgpuboostMapTo_DISPATCH(pResource, pParams) -#define syncgpuboostIsDuplicate(pResource, hMemory, pDuplicate) syncgpuboostIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define syncgpuboostControlSerialization_Epilogue(pResource, pCallContext, pParams) syncgpuboostControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define syncgpuboostControl_Epilogue(pResource, pCallContext, pParams) syncgpuboostControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define syncgpuboostUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ #define syncgpuboostUnmapFrom(pResource, pParams) syncgpuboostUnmapFrom_DISPATCH(pResource, pParams) -#define syncgpuboostMap(pResource, pCallContext, pParams, pCpuMapping) syncgpuboostMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define syncgpuboostAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) syncgpuboostAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -static inline NvBool syncgpuboostShareCallback_DISPATCH(struct SyncGpuBoost *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__syncgpuboostShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} +#define syncgpuboostGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define syncgpuboostGetRefCount(pResource) syncgpuboostGetRefCount_DISPATCH(pResource) +#define syncgpuboostAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define syncgpuboostAddAdditionalDependants(pClient, pResource, pReference) syncgpuboostAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -static inline NV_STATUS syncgpuboostCheckMemInterUnmap_DISPATCH(struct SyncGpuBoost *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__syncgpuboostCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +// Dispatch functions +static inline NvBool syncgpuboostAccessCallback_DISPATCH(struct SyncGpuBoost *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__syncgpuboostAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS syncgpuboostControl_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__syncgpuboostControl__(pResource, pCallContext, pParams); +static inline NvBool syncgpuboostShareCallback_DISPATCH(struct SyncGpuBoost *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__syncgpuboostShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS syncgpuboostGetMemInterMapParams_DISPATCH(struct SyncGpuBoost *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__syncgpuboostGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS syncgpuboostGetMemoryMappingDescriptor_DISPATCH(struct SyncGpuBoost *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__syncgpuboostGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); -} - -static inline NvU32 syncgpuboostGetRefCount_DISPATCH(struct SyncGpuBoost *pResource) { - return pResource->__syncgpuboostGetRefCount__(pResource); -} - -static inline NV_STATUS syncgpuboostControlFilter_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__syncgpuboostControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS syncgpuboostCheckMemInterUnmap_DISPATCH(struct SyncGpuBoost *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__syncgpuboostCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline void syncgpuboostAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct SyncGpuBoost *pResource, RsResourceRef *pReference) { - pResource->__syncgpuboostAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS syncgpuboostGetMemoryMappingDescriptor_DISPATCH(struct SyncGpuBoost *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__syncgpuboostGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS syncgpuboostControlSerialization_Prologue_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__syncgpuboostControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void syncgpuboostControlSerialization_Epilogue_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__syncgpuboostControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + static inline NV_STATUS syncgpuboostControl_Prologue_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__syncgpuboostControl_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool syncgpuboostCanCopy_DISPATCH(struct SyncGpuBoost *pResource) { - return pResource->__syncgpuboostCanCopy__(pResource); +static inline void syncgpuboostControl_Epilogue_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__syncgpuboostControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS syncgpuboostUnmap_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__syncgpuboostUnmap__(pResource, pCallContext, pCpuMapping); +static inline NvBool syncgpuboostCanCopy_DISPATCH(struct SyncGpuBoost *pResource) { + return pResource->__syncgpuboostCanCopy__(pResource); } -static inline NvBool syncgpuboostIsPartialUnmapSupported_DISPATCH(struct SyncGpuBoost *pResource) { - return pResource->__syncgpuboostIsPartialUnmapSupported__(pResource); +static inline NV_STATUS syncgpuboostIsDuplicate_DISPATCH(struct SyncGpuBoost *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__syncgpuboostIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void syncgpuboostPreDestruct_DISPATCH(struct SyncGpuBoost *pResource) { pResource->__syncgpuboostPreDestruct__(pResource); } -static inline NV_STATUS syncgpuboostMapTo_DISPATCH(struct SyncGpuBoost *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__syncgpuboostMapTo__(pResource, pParams); +static inline NV_STATUS syncgpuboostControl_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__syncgpuboostControl__(pResource, pCallContext, pParams); } -static inline NV_STATUS syncgpuboostIsDuplicate_DISPATCH(struct SyncGpuBoost *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__syncgpuboostIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS syncgpuboostControlFilter_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__syncgpuboostControlFilter__(pResource, pCallContext, pParams); } -static inline void syncgpuboostControlSerialization_Epilogue_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__syncgpuboostControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS syncgpuboostMap_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pResource->__syncgpuboostMap__(pResource, pCallContext, pParams, pCpuMapping); } -static inline void syncgpuboostControl_Epilogue_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__syncgpuboostControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS syncgpuboostUnmap_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pResource->__syncgpuboostUnmap__(pResource, pCallContext, pCpuMapping); +} + +static inline NvBool syncgpuboostIsPartialUnmapSupported_DISPATCH(struct SyncGpuBoost *pResource) { + return pResource->__syncgpuboostIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS syncgpuboostMapTo_DISPATCH(struct SyncGpuBoost *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__syncgpuboostMapTo__(pResource, pParams); } static inline NV_STATUS syncgpuboostUnmapFrom_DISPATCH(struct SyncGpuBoost *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return pResource->__syncgpuboostUnmapFrom__(pResource, pParams); } -static inline NV_STATUS syncgpuboostMap_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__syncgpuboostMap__(pResource, pCallContext, pParams, pCpuMapping); +static inline NvU32 syncgpuboostGetRefCount_DISPATCH(struct SyncGpuBoost *pResource) { + return pResource->__syncgpuboostGetRefCount__(pResource); } -static inline NvBool syncgpuboostAccessCallback_DISPATCH(struct SyncGpuBoost *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__syncgpuboostAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline void syncgpuboostAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct SyncGpuBoost *pResource, RsResourceRef *pReference) { + pResource->__syncgpuboostAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS syncgpuboostConstruct_IMPL(struct SyncGpuBoost *arg_pResource, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_system_mem_nvoc.c b/src/nvidia/generated/g_system_mem_nvoc.c index 1e9e56a3c0..ad155bb391 100644 --- a/src/nvidia/generated/g_system_mem_nvoc.c +++ b/src/nvidia/generated/g_system_mem_nvoc.c @@ -102,148 +102,177 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_SystemMemory = /*pExportInfo=*/ &__nvoc_export_info_SystemMemory }; -static NV_STATUS __nvoc_thunk_Memory_sysmemCheckMemInterUnmap(struct SystemMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), bSubdeviceHandleProvided); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NvBool __nvoc_thunk_RmResource_sysmemShareCallback(struct SystemMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SystemMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_SystemMemory[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x101u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) sysmemCtrlCmdGetSurfaceNumPhysPages_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x101u) + /*flags=*/ 0x101u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x3e0102u, + /*paramSize=*/ sizeof(NV003E_CTRL_GET_SURFACE_NUM_PHYS_PAGES_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_SystemMemory.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "sysmemCtrlCmdGetSurfaceNumPhysPages" +#endif + }, + { /* [1] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x101u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) sysmemCtrlCmdGetSurfacePhysPages_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x101u) + /*flags=*/ 0x101u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x3e0103u, + /*paramSize=*/ sizeof(NV003E_CTRL_GET_SURFACE_PHYS_PAGES_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_SystemMemory.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "sysmemCtrlCmdGetSurfacePhysPages" +#endif + }, -static NV_STATUS __nvoc_thunk_RsResource_sysmemMapTo(struct SystemMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SystemMemory_RsResource.offset), pParams); +}; + +// 26 up-thunk(s) defined to bridge methods in SystemMemory to superclasses + +// sysmemCanCopy: virtual inherited (stdmem) base (stdmem) +static NvBool __nvoc_up_thunk_StandardMemory_sysmemCanCopy(struct SystemMemory *pStandardMemory) { + return stdmemCanCopy((struct StandardMemory *)(((unsigned char *) pStandardMemory) + __nvoc_rtti_SystemMemory_StandardMemory.offset)); } -static NV_STATUS __nvoc_thunk_Memory_sysmemGetMapAddrSpace(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return memGetMapAddrSpace((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); +// sysmemIsDuplicate: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_sysmemIsDuplicate(struct SystemMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_Memory_sysmemIsExportAllowed(struct SystemMemory *pMemory) { - return memIsExportAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_SystemMemory_Memory.offset)); +// sysmemGetMapAddrSpace: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_sysmemGetMapAddrSpace(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } -static NvU32 __nvoc_thunk_RsResource_sysmemGetRefCount(struct SystemMemory *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SystemMemory_RsResource.offset)); +// sysmemControl: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_sysmemControl(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_sysmemAddAdditionalDependants(struct RsClient *pClient, struct SystemMemory *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SystemMemory_RsResource.offset), pReference); +// sysmemMap: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_sysmemMap(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RmResource_sysmemControl_Prologue(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SystemMemory_RmResource.offset), pCallContext, pParams); +// sysmemUnmap: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_sysmemUnmap(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pCallContext, pCpuMapping); } -static NvBool __nvoc_thunk_Memory_sysmemIsGpuMapAllowed(struct SystemMemory *pMemory, struct OBJGPU *pGpu) { - return memIsGpuMapAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pGpu); +// sysmemGetMemInterMapParams: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_sysmemGetMemInterMapParams(struct SystemMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_sysmemUnmapFrom(struct SystemMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SystemMemory_RsResource.offset), pParams); +// sysmemCheckMemInterUnmap: inline virtual inherited (mem) base (stdmem) body +static NV_STATUS __nvoc_up_thunk_Memory_sysmemCheckMemInterUnmap(struct SystemMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), bSubdeviceHandleProvided); } -static void __nvoc_thunk_RmResource_sysmemControl_Epilogue(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SystemMemory_RmResource.offset), pCallContext, pParams); +// sysmemGetMemoryMappingDescriptor: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_sysmemGetMemoryMappingDescriptor(struct SystemMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_Memory_sysmemControl(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memControl((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pCallContext, pParams); +// sysmemCheckCopyPermissions: inline virtual inherited (mem) base (stdmem) body +static NV_STATUS __nvoc_up_thunk_Memory_sysmemCheckCopyPermissions(struct SystemMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pDstGpu, pDstDevice); } -static NV_STATUS __nvoc_thunk_Memory_sysmemUnmap(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pCallContext, pCpuMapping); +// sysmemIsReady: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_sysmemIsReady(struct SystemMemory *pMemory, NvBool bCopyConstructorContext) { + return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), bCopyConstructorContext); } -static NV_STATUS __nvoc_thunk_Memory_sysmemGetMemInterMapParams(struct SystemMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pParams); +// sysmemIsGpuMapAllowed: inline virtual inherited (mem) base (stdmem) body +static NvBool __nvoc_up_thunk_Memory_sysmemIsGpuMapAllowed(struct SystemMemory *pMemory, struct OBJGPU *pGpu) { + return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pGpu); } -static NV_STATUS __nvoc_thunk_Memory_sysmemGetMemoryMappingDescriptor(struct SystemMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), ppMemDesc); +// sysmemIsExportAllowed: inline virtual inherited (mem) base (stdmem) body +static NvBool __nvoc_up_thunk_Memory_sysmemIsExportAllowed(struct SystemMemory *pMemory) { + return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_sysmemControlFilter(struct SystemMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SystemMemory_RsResource.offset), pCallContext, pParams); +// sysmemAccessCallback: virtual inherited (rmres) base (stdmem) +static NvBool __nvoc_up_thunk_RmResource_sysmemAccessCallback(struct SystemMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RmResource_sysmemControlSerialization_Prologue(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SystemMemory_RmResource.offset), pCallContext, pParams); +// sysmemShareCallback: virtual inherited (rmres) base (stdmem) +static NvBool __nvoc_up_thunk_RmResource_sysmemShareCallback(struct SystemMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NvBool __nvoc_thunk_StandardMemory_sysmemCanCopy(struct SystemMemory *pStandardMemory) { - return stdmemCanCopy((struct StandardMemory *)(((unsigned char *)pStandardMemory) + __nvoc_rtti_SystemMemory_StandardMemory.offset)); +// sysmemControlSerialization_Prologue: virtual inherited (rmres) base (stdmem) +static NV_STATUS __nvoc_up_thunk_RmResource_sysmemControlSerialization_Prologue(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_sysmemIsPartialUnmapSupported(struct SystemMemory *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SystemMemory_RsResource.offset)); +// sysmemControlSerialization_Epilogue: virtual inherited (rmres) base (stdmem) +static void __nvoc_up_thunk_RmResource_sysmemControlSerialization_Epilogue(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_sysmemIsReady(struct SystemMemory *pMemory, NvBool bCopyConstructorContext) { - return memIsReady((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), bCopyConstructorContext); +// sysmemControl_Prologue: virtual inherited (rmres) base (stdmem) +static NV_STATUS __nvoc_up_thunk_RmResource_sysmemControl_Prologue(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_sysmemCheckCopyPermissions(struct SystemMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return memCheckCopyPermissions((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pDstGpu, pDstDevice); +// sysmemControl_Epilogue: virtual inherited (rmres) base (stdmem) +static void __nvoc_up_thunk_RmResource_sysmemControl_Epilogue(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RmResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_sysmemPreDestruct(struct SystemMemory *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_SystemMemory_RsResource.offset)); +// sysmemPreDestruct: virtual inherited (res) base (stdmem) +static void __nvoc_up_thunk_RsResource_sysmemPreDestruct(struct SystemMemory *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_sysmemIsDuplicate(struct SystemMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), hMemory, pDuplicate); +// sysmemControlFilter: virtual inherited (res) base (stdmem) +static NV_STATUS __nvoc_up_thunk_RsResource_sysmemControlFilter(struct SystemMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RmResource_sysmemControlSerialization_Epilogue(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SystemMemory_RmResource.offset), pCallContext, pParams); +// sysmemIsPartialUnmapSupported: inline virtual inherited (res) base (stdmem) body +static NvBool __nvoc_up_thunk_RsResource_sysmemIsPartialUnmapSupported(struct SystemMemory *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_sysmemMap(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pCallContext, pParams, pCpuMapping); +// sysmemMapTo: virtual inherited (res) base (stdmem) +static NV_STATUS __nvoc_up_thunk_RsResource_sysmemMapTo(struct SystemMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RmResource_sysmemAccessCallback(struct SystemMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_SystemMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// sysmemUnmapFrom: virtual inherited (res) base (stdmem) +static NV_STATUS __nvoc_up_thunk_RsResource_sysmemUnmapFrom(struct SystemMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RsResource.offset), pParams); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// sysmemGetRefCount: virtual inherited (res) base (stdmem) +static NvU32 __nvoc_up_thunk_RsResource_sysmemGetRefCount(struct SystemMemory *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RsResource.offset)); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_SystemMemory[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x801u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) sysmemCtrlCmdGetSurfaceNumPhysPages_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x801u) - /*flags=*/ 0x801u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x3e0102u, - /*paramSize=*/ sizeof(NV003E_CTRL_GET_SURFACE_NUM_PHYS_PAGES_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_SystemMemory.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "sysmemCtrlCmdGetSurfaceNumPhysPages" -#endif - }, - { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x801u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) sysmemCtrlCmdGetSurfacePhysPages_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x801u) - /*flags=*/ 0x801u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x3e0103u, - /*paramSize=*/ sizeof(NV003E_CTRL_GET_SURFACE_PHYS_PAGES_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_SystemMemory.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "sysmemCtrlCmdGetSurfacePhysPages" -#endif - }, +// sysmemAddAdditionalDependants: virtual inherited (res) base (stdmem) +static void __nvoc_up_thunk_RsResource_sysmemAddAdditionalDependants(struct RsClient *pClient, struct SystemMemory *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RsResource.offset), pReference); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_SystemMemory = { @@ -280,71 +309,104 @@ NV_STATUS __nvoc_ctor_SystemMemory(SystemMemory *pThis, CALL_CONTEXT * arg_pCall return status; } +// Vtable initialization static void __nvoc_init_funcTable_SystemMemory_1(SystemMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x801u) + // sysmemCtrlCmdGetSurfaceNumPhysPages -- exported (id=0x3e0102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x101u) pThis->__sysmemCtrlCmdGetSurfaceNumPhysPages__ = &sysmemCtrlCmdGetSurfaceNumPhysPages_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x801u) + // sysmemCtrlCmdGetSurfacePhysPages -- exported (id=0x3e0103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x101u) pThis->__sysmemCtrlCmdGetSurfacePhysPages__ = &sysmemCtrlCmdGetSurfacePhysPages_IMPL; #endif - pThis->__sysmemCheckMemInterUnmap__ = &__nvoc_thunk_Memory_sysmemCheckMemInterUnmap; + // sysmemCanCopy -- virtual inherited (stdmem) base (stdmem) + pThis->__sysmemCanCopy__ = &__nvoc_up_thunk_StandardMemory_sysmemCanCopy; - pThis->__sysmemShareCallback__ = &__nvoc_thunk_RmResource_sysmemShareCallback; + // sysmemIsDuplicate -- virtual inherited (mem) base (stdmem) + pThis->__sysmemIsDuplicate__ = &__nvoc_up_thunk_Memory_sysmemIsDuplicate; - pThis->__sysmemMapTo__ = &__nvoc_thunk_RsResource_sysmemMapTo; + // sysmemGetMapAddrSpace -- virtual inherited (mem) base (stdmem) + pThis->__sysmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_sysmemGetMapAddrSpace; - pThis->__sysmemGetMapAddrSpace__ = &__nvoc_thunk_Memory_sysmemGetMapAddrSpace; + // sysmemControl -- virtual inherited (mem) base (stdmem) + pThis->__sysmemControl__ = &__nvoc_up_thunk_Memory_sysmemControl; - pThis->__sysmemIsExportAllowed__ = &__nvoc_thunk_Memory_sysmemIsExportAllowed; + // sysmemMap -- virtual inherited (mem) base (stdmem) + pThis->__sysmemMap__ = &__nvoc_up_thunk_Memory_sysmemMap; - pThis->__sysmemGetRefCount__ = &__nvoc_thunk_RsResource_sysmemGetRefCount; + // sysmemUnmap -- virtual inherited (mem) base (stdmem) + pThis->__sysmemUnmap__ = &__nvoc_up_thunk_Memory_sysmemUnmap; - pThis->__sysmemAddAdditionalDependants__ = &__nvoc_thunk_RsResource_sysmemAddAdditionalDependants; + // sysmemGetMemInterMapParams -- virtual inherited (mem) base (stdmem) + pThis->__sysmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_sysmemGetMemInterMapParams; - pThis->__sysmemControl_Prologue__ = &__nvoc_thunk_RmResource_sysmemControl_Prologue; + // sysmemCheckMemInterUnmap -- inline virtual inherited (mem) base (stdmem) body + pThis->__sysmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_sysmemCheckMemInterUnmap; - pThis->__sysmemIsGpuMapAllowed__ = &__nvoc_thunk_Memory_sysmemIsGpuMapAllowed; + // sysmemGetMemoryMappingDescriptor -- virtual inherited (mem) base (stdmem) + pThis->__sysmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_sysmemGetMemoryMappingDescriptor; - pThis->__sysmemUnmapFrom__ = &__nvoc_thunk_RsResource_sysmemUnmapFrom; + // sysmemCheckCopyPermissions -- inline virtual inherited (mem) base (stdmem) body + pThis->__sysmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_sysmemCheckCopyPermissions; - pThis->__sysmemControl_Epilogue__ = &__nvoc_thunk_RmResource_sysmemControl_Epilogue; + // sysmemIsReady -- virtual inherited (mem) base (stdmem) + pThis->__sysmemIsReady__ = &__nvoc_up_thunk_Memory_sysmemIsReady; - pThis->__sysmemControl__ = &__nvoc_thunk_Memory_sysmemControl; + // sysmemIsGpuMapAllowed -- inline virtual inherited (mem) base (stdmem) body + pThis->__sysmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_sysmemIsGpuMapAllowed; - pThis->__sysmemUnmap__ = &__nvoc_thunk_Memory_sysmemUnmap; + // sysmemIsExportAllowed -- inline virtual inherited (mem) base (stdmem) body + pThis->__sysmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_sysmemIsExportAllowed; - pThis->__sysmemGetMemInterMapParams__ = &__nvoc_thunk_Memory_sysmemGetMemInterMapParams; + // sysmemAccessCallback -- virtual inherited (rmres) base (stdmem) + pThis->__sysmemAccessCallback__ = &__nvoc_up_thunk_RmResource_sysmemAccessCallback; - pThis->__sysmemGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_sysmemGetMemoryMappingDescriptor; + // sysmemShareCallback -- virtual inherited (rmres) base (stdmem) + pThis->__sysmemShareCallback__ = &__nvoc_up_thunk_RmResource_sysmemShareCallback; - pThis->__sysmemControlFilter__ = &__nvoc_thunk_RsResource_sysmemControlFilter; + // sysmemControlSerialization_Prologue -- virtual inherited (rmres) base (stdmem) + pThis->__sysmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_sysmemControlSerialization_Prologue; - pThis->__sysmemControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_sysmemControlSerialization_Prologue; + // sysmemControlSerialization_Epilogue -- virtual inherited (rmres) base (stdmem) + pThis->__sysmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_sysmemControlSerialization_Epilogue; - pThis->__sysmemCanCopy__ = &__nvoc_thunk_StandardMemory_sysmemCanCopy; + // sysmemControl_Prologue -- virtual inherited (rmres) base (stdmem) + pThis->__sysmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_sysmemControl_Prologue; - pThis->__sysmemIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_sysmemIsPartialUnmapSupported; + // sysmemControl_Epilogue -- virtual inherited (rmres) base (stdmem) + pThis->__sysmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_sysmemControl_Epilogue; - pThis->__sysmemIsReady__ = &__nvoc_thunk_Memory_sysmemIsReady; + // sysmemPreDestruct -- virtual inherited (res) base (stdmem) + pThis->__sysmemPreDestruct__ = &__nvoc_up_thunk_RsResource_sysmemPreDestruct; - pThis->__sysmemCheckCopyPermissions__ = &__nvoc_thunk_Memory_sysmemCheckCopyPermissions; + // sysmemControlFilter -- virtual inherited (res) base (stdmem) + pThis->__sysmemControlFilter__ = &__nvoc_up_thunk_RsResource_sysmemControlFilter; - pThis->__sysmemPreDestruct__ = &__nvoc_thunk_RsResource_sysmemPreDestruct; + // sysmemIsPartialUnmapSupported -- inline virtual inherited (res) base (stdmem) body + pThis->__sysmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_sysmemIsPartialUnmapSupported; - pThis->__sysmemIsDuplicate__ = &__nvoc_thunk_Memory_sysmemIsDuplicate; + // sysmemMapTo -- virtual inherited (res) base (stdmem) + pThis->__sysmemMapTo__ = &__nvoc_up_thunk_RsResource_sysmemMapTo; - pThis->__sysmemControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_sysmemControlSerialization_Epilogue; + // sysmemUnmapFrom -- virtual inherited (res) base (stdmem) + pThis->__sysmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_sysmemUnmapFrom; - pThis->__sysmemMap__ = &__nvoc_thunk_Memory_sysmemMap; + // sysmemGetRefCount -- virtual inherited (res) base (stdmem) + pThis->__sysmemGetRefCount__ = &__nvoc_up_thunk_RsResource_sysmemGetRefCount; - pThis->__sysmemAccessCallback__ = &__nvoc_thunk_RmResource_sysmemAccessCallback; -} + // sysmemAddAdditionalDependants -- virtual inherited (res) base (stdmem) + pThis->__sysmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_sysmemAddAdditionalDependants; +} // End __nvoc_init_funcTable_SystemMemory_1 with approximately 28 basic block(s). + +// Initialize vtable(s) for 28 virtual method(s). void __nvoc_init_funcTable_SystemMemory(SystemMemory *pThis) { + + // Initialize vtable(s) with 28 per-object function pointer(s). __nvoc_init_funcTable_SystemMemory_1(pThis); } diff --git a/src/nvidia/generated/g_system_mem_nvoc.h b/src/nvidia/generated/g_system_mem_nvoc.h index fdf2f5e479..1eba5c264a 100644 --- a/src/nvidia/generated/g_system_mem_nvoc.h +++ b/src/nvidia/generated/g_system_mem_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_SYSTEM_MEM_NVOC_H_ #define _G_SYSTEM_MEM_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_system_mem_nvoc.h" #ifndef _SYSTEM_MEMORY_H_ @@ -47,44 +55,53 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct SystemMemory { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct StandardMemory __nvoc_base_StandardMemory; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Memory *__nvoc_pbase_Memory; - struct StandardMemory *__nvoc_pbase_StandardMemory; - struct SystemMemory *__nvoc_pbase_SystemMemory; - NV_STATUS (*__sysmemCtrlCmdGetSurfaceNumPhysPages__)(struct SystemMemory *, NV003E_CTRL_GET_SURFACE_NUM_PHYS_PAGES_PARAMS *); - NV_STATUS (*__sysmemCtrlCmdGetSurfacePhysPages__)(struct SystemMemory *, NV003E_CTRL_GET_SURFACE_PHYS_PAGES_PARAMS *); - NV_STATUS (*__sysmemCheckMemInterUnmap__)(struct SystemMemory *, NvBool); - NvBool (*__sysmemShareCallback__)(struct SystemMemory *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__sysmemMapTo__)(struct SystemMemory *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__sysmemGetMapAddrSpace__)(struct SystemMemory *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvBool (*__sysmemIsExportAllowed__)(struct SystemMemory *); - NvU32 (*__sysmemGetRefCount__)(struct SystemMemory *); - void (*__sysmemAddAdditionalDependants__)(struct RsClient *, struct SystemMemory *, RsResourceRef *); - NV_STATUS (*__sysmemControl_Prologue__)(struct SystemMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__sysmemIsGpuMapAllowed__)(struct SystemMemory *, struct OBJGPU *); - NV_STATUS (*__sysmemUnmapFrom__)(struct SystemMemory *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__sysmemControl_Epilogue__)(struct SystemMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__sysmemControl__)(struct SystemMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__sysmemUnmap__)(struct SystemMemory *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__sysmemGetMemInterMapParams__)(struct SystemMemory *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__sysmemGetMemoryMappingDescriptor__)(struct SystemMemory *, MEMORY_DESCRIPTOR **); - NV_STATUS (*__sysmemControlFilter__)(struct SystemMemory *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__sysmemControlSerialization_Prologue__)(struct SystemMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__sysmemCanCopy__)(struct SystemMemory *); - NvBool (*__sysmemIsPartialUnmapSupported__)(struct SystemMemory *); - NV_STATUS (*__sysmemIsReady__)(struct SystemMemory *, NvBool); - NV_STATUS (*__sysmemCheckCopyPermissions__)(struct SystemMemory *, struct OBJGPU *, struct Device *); - void (*__sysmemPreDestruct__)(struct SystemMemory *); - NV_STATUS (*__sysmemIsDuplicate__)(struct SystemMemory *, NvHandle, NvBool *); - void (*__sysmemControlSerialization_Epilogue__)(struct SystemMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__sysmemMap__)(struct SystemMemory *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__sysmemAccessCallback__)(struct SystemMemory *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct Memory *__nvoc_pbase_Memory; // mem super^2 + struct StandardMemory *__nvoc_pbase_StandardMemory; // stdmem super + struct SystemMemory *__nvoc_pbase_SystemMemory; // sysmem + + // Vtable with 28 per-object function pointers + NV_STATUS (*__sysmemCtrlCmdGetSurfaceNumPhysPages__)(struct SystemMemory * /*this*/, NV003E_CTRL_GET_SURFACE_NUM_PHYS_PAGES_PARAMS *); // exported (id=0x3e0102) + NV_STATUS (*__sysmemCtrlCmdGetSurfacePhysPages__)(struct SystemMemory * /*this*/, NV003E_CTRL_GET_SURFACE_PHYS_PAGES_PARAMS *); // exported (id=0x3e0103) + NvBool (*__sysmemCanCopy__)(struct SystemMemory * /*this*/); // virtual inherited (stdmem) base (stdmem) + NV_STATUS (*__sysmemIsDuplicate__)(struct SystemMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__sysmemGetMapAddrSpace__)(struct SystemMemory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__sysmemControl__)(struct SystemMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__sysmemMap__)(struct SystemMemory * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__sysmemUnmap__)(struct SystemMemory * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__sysmemGetMemInterMapParams__)(struct SystemMemory * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__sysmemCheckMemInterUnmap__)(struct SystemMemory * /*this*/, NvBool); // inline virtual inherited (mem) base (stdmem) body + NV_STATUS (*__sysmemGetMemoryMappingDescriptor__)(struct SystemMemory * /*this*/, MEMORY_DESCRIPTOR **); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__sysmemCheckCopyPermissions__)(struct SystemMemory * /*this*/, struct OBJGPU *, struct Device *); // inline virtual inherited (mem) base (stdmem) body + NV_STATUS (*__sysmemIsReady__)(struct SystemMemory * /*this*/, NvBool); // virtual inherited (mem) base (stdmem) + NvBool (*__sysmemIsGpuMapAllowed__)(struct SystemMemory * /*this*/, struct OBJGPU *); // inline virtual inherited (mem) base (stdmem) body + NvBool (*__sysmemIsExportAllowed__)(struct SystemMemory * /*this*/); // inline virtual inherited (mem) base (stdmem) body + NvBool (*__sysmemAccessCallback__)(struct SystemMemory * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (stdmem) + NvBool (*__sysmemShareCallback__)(struct SystemMemory * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (stdmem) + NV_STATUS (*__sysmemControlSerialization_Prologue__)(struct SystemMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (stdmem) + void (*__sysmemControlSerialization_Epilogue__)(struct SystemMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (stdmem) + NV_STATUS (*__sysmemControl_Prologue__)(struct SystemMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (stdmem) + void (*__sysmemControl_Epilogue__)(struct SystemMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (stdmem) + void (*__sysmemPreDestruct__)(struct SystemMemory * /*this*/); // virtual inherited (res) base (stdmem) + NV_STATUS (*__sysmemControlFilter__)(struct SystemMemory * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (stdmem) + NvBool (*__sysmemIsPartialUnmapSupported__)(struct SystemMemory * /*this*/); // inline virtual inherited (res) base (stdmem) body + NV_STATUS (*__sysmemMapTo__)(struct SystemMemory * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (stdmem) + NV_STATUS (*__sysmemUnmapFrom__)(struct SystemMemory * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (stdmem) + NvU32 (*__sysmemGetRefCount__)(struct SystemMemory * /*this*/); // virtual inherited (res) base (stdmem) + void (*__sysmemAddAdditionalDependants__)(struct RsClient *, struct SystemMemory * /*this*/, RsResourceRef *); // virtual inherited (res) base (stdmem) }; #ifndef __NVOC_CLASS_SystemMemory_TYPEDEF__ @@ -96,6 +113,7 @@ typedef struct SystemMemory SystemMemory; #define __nvoc_class_id_SystemMemory 0x007a98 #endif /* __nvoc_class_id_SystemMemory */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_SystemMemory; #define __staticCast_SystemMemory(pThis) \ @@ -108,171 +126,202 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_SystemMemory; ((SystemMemory*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(SystemMemory))) #endif //__nvoc_system_mem_h_disabled - NV_STATUS __nvoc_objCreateDynamic_SystemMemory(SystemMemory**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_SystemMemory(SystemMemory**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_SystemMemory(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_SystemMemory((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define sysmemCtrlCmdGetSurfaceNumPhysPages_FNPTR(pStandardMemory) pStandardMemory->__sysmemCtrlCmdGetSurfaceNumPhysPages__ #define sysmemCtrlCmdGetSurfaceNumPhysPages(pStandardMemory, pParams) sysmemCtrlCmdGetSurfaceNumPhysPages_DISPATCH(pStandardMemory, pParams) +#define sysmemCtrlCmdGetSurfacePhysPages_FNPTR(pStandardMemory) pStandardMemory->__sysmemCtrlCmdGetSurfacePhysPages__ #define sysmemCtrlCmdGetSurfacePhysPages(pStandardMemory, pParams) sysmemCtrlCmdGetSurfacePhysPages_DISPATCH(pStandardMemory, pParams) -#define sysmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) sysmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define sysmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) sysmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define sysmemMapTo(pResource, pParams) sysmemMapTo_DISPATCH(pResource, pParams) +#define sysmemCanCopy_FNPTR(pStandardMemory) pStandardMemory->__nvoc_base_StandardMemory.__stdmemCanCopy__ +#define sysmemCanCopy(pStandardMemory) sysmemCanCopy_DISPATCH(pStandardMemory) +#define sysmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsDuplicate__ +#define sysmemIsDuplicate(pMemory, hMemory, pDuplicate) sysmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) +#define sysmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMapAddrSpace__ #define sysmemGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) sysmemGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define sysmemIsExportAllowed(pMemory) sysmemIsExportAllowed_DISPATCH(pMemory) -#define sysmemGetRefCount(pResource) sysmemGetRefCount_DISPATCH(pResource) -#define sysmemAddAdditionalDependants(pClient, pResource, pReference) sysmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define sysmemControl_Prologue(pResource, pCallContext, pParams) sysmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define sysmemIsGpuMapAllowed(pMemory, pGpu) sysmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define sysmemUnmapFrom(pResource, pParams) sysmemUnmapFrom_DISPATCH(pResource, pParams) -#define sysmemControl_Epilogue(pResource, pCallContext, pParams) sysmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define sysmemControl_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memControl__ #define sysmemControl(pMemory, pCallContext, pParams) sysmemControl_DISPATCH(pMemory, pCallContext, pParams) +#define sysmemMap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memMap__ +#define sysmemMap(pMemory, pCallContext, pParams, pCpuMapping) sysmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define sysmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memUnmap__ #define sysmemUnmap(pMemory, pCallContext, pCpuMapping) sysmemUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) +#define sysmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMemInterMapParams__ #define sysmemGetMemInterMapParams(pMemory, pParams) sysmemGetMemInterMapParams_DISPATCH(pMemory, pParams) +#define sysmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define sysmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) sysmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) +#define sysmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ #define sysmemGetMemoryMappingDescriptor(pMemory, ppMemDesc) sysmemGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define sysmemControlFilter(pResource, pCallContext, pParams) sysmemControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define sysmemControlSerialization_Prologue(pResource, pCallContext, pParams) sysmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define sysmemCanCopy(pStandardMemory) sysmemCanCopy_DISPATCH(pStandardMemory) -#define sysmemIsPartialUnmapSupported(pResource) sysmemIsPartialUnmapSupported_DISPATCH(pResource) -#define sysmemIsReady(pMemory, bCopyConstructorContext) sysmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define sysmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckCopyPermissions__ #define sysmemCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) sysmemCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define sysmemPreDestruct(pResource) sysmemPreDestruct_DISPATCH(pResource) -#define sysmemIsDuplicate(pMemory, hMemory, pDuplicate) sysmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define sysmemControlSerialization_Epilogue(pResource, pCallContext, pParams) sysmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define sysmemMap(pMemory, pCallContext, pParams, pCpuMapping) sysmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define sysmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsReady__ +#define sysmemIsReady(pMemory, bCopyConstructorContext) sysmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define sysmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define sysmemIsGpuMapAllowed(pMemory, pGpu) sysmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) +#define sysmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsExportAllowed__ +#define sysmemIsExportAllowed(pMemory) sysmemIsExportAllowed_DISPATCH(pMemory) +#define sysmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ #define sysmemAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) sysmemAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS sysmemInitAllocRequest_HMM(struct OBJGPU *pGpu, struct SystemMemory *pSystemMemory, MEMORY_ALLOCATION_REQUEST *pAllocRequest); - - -#ifdef __nvoc_system_mem_h_disabled -static inline NV_STATUS sysmemInitAllocRequest(struct OBJGPU *pGpu, struct SystemMemory *pSystemMemory, MEMORY_ALLOCATION_REQUEST *pAllocRequest) { - NV_ASSERT_FAILED_PRECOMP("SystemMemory was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_system_mem_h_disabled -#define sysmemInitAllocRequest(pGpu, pSystemMemory, pAllocRequest) sysmemInitAllocRequest_HMM(pGpu, pSystemMemory, pAllocRequest) -#endif //__nvoc_system_mem_h_disabled - -#define sysmemInitAllocRequest_HAL(pGpu, pSystemMemory, pAllocRequest) sysmemInitAllocRequest(pGpu, pSystemMemory, pAllocRequest) - -NV_STATUS sysmemCtrlCmdGetSurfaceNumPhysPages_IMPL(struct SystemMemory *pStandardMemory, NV003E_CTRL_GET_SURFACE_NUM_PHYS_PAGES_PARAMS *pParams); +#define sysmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define sysmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) sysmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define sysmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define sysmemControlSerialization_Prologue(pResource, pCallContext, pParams) sysmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define sysmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define sysmemControlSerialization_Epilogue(pResource, pCallContext, pParams) sysmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define sysmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define sysmemControl_Prologue(pResource, pCallContext, pParams) sysmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define sysmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define sysmemControl_Epilogue(pResource, pCallContext, pParams) sysmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define sysmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define sysmemPreDestruct(pResource) sysmemPreDestruct_DISPATCH(pResource) +#define sysmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define sysmemControlFilter(pResource, pCallContext, pParams) sysmemControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define sysmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define sysmemIsPartialUnmapSupported(pResource) sysmemIsPartialUnmapSupported_DISPATCH(pResource) +#define sysmemMapTo_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define sysmemMapTo(pResource, pParams) sysmemMapTo_DISPATCH(pResource, pParams) +#define sysmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define sysmemUnmapFrom(pResource, pParams) sysmemUnmapFrom_DISPATCH(pResource, pParams) +#define sysmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define sysmemGetRefCount(pResource) sysmemGetRefCount_DISPATCH(pResource) +#define sysmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define sysmemAddAdditionalDependants(pClient, pResource, pReference) sysmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS sysmemCtrlCmdGetSurfaceNumPhysPages_DISPATCH(struct SystemMemory *pStandardMemory, NV003E_CTRL_GET_SURFACE_NUM_PHYS_PAGES_PARAMS *pParams) { return pStandardMemory->__sysmemCtrlCmdGetSurfaceNumPhysPages__(pStandardMemory, pParams); } -NV_STATUS sysmemCtrlCmdGetSurfacePhysPages_IMPL(struct SystemMemory *pStandardMemory, NV003E_CTRL_GET_SURFACE_PHYS_PAGES_PARAMS *pParams); - static inline NV_STATUS sysmemCtrlCmdGetSurfacePhysPages_DISPATCH(struct SystemMemory *pStandardMemory, NV003E_CTRL_GET_SURFACE_PHYS_PAGES_PARAMS *pParams) { return pStandardMemory->__sysmemCtrlCmdGetSurfacePhysPages__(pStandardMemory, pParams); } -static inline NV_STATUS sysmemCheckMemInterUnmap_DISPATCH(struct SystemMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__sysmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); -} - -static inline NvBool sysmemShareCallback_DISPATCH(struct SystemMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__sysmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NvBool sysmemCanCopy_DISPATCH(struct SystemMemory *pStandardMemory) { + return pStandardMemory->__sysmemCanCopy__(pStandardMemory); } -static inline NV_STATUS sysmemMapTo_DISPATCH(struct SystemMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__sysmemMapTo__(pResource, pParams); +static inline NV_STATUS sysmemIsDuplicate_DISPATCH(struct SystemMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return pMemory->__sysmemIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS sysmemGetMapAddrSpace_DISPATCH(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pMemory->__sysmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } -static inline NvBool sysmemIsExportAllowed_DISPATCH(struct SystemMemory *pMemory) { - return pMemory->__sysmemIsExportAllowed__(pMemory); +static inline NV_STATUS sysmemControl_DISPATCH(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pMemory->__sysmemControl__(pMemory, pCallContext, pParams); } -static inline NvU32 sysmemGetRefCount_DISPATCH(struct SystemMemory *pResource) { - return pResource->__sysmemGetRefCount__(pResource); +static inline NV_STATUS sysmemMap_DISPATCH(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pMemory->__sysmemMap__(pMemory, pCallContext, pParams, pCpuMapping); } -static inline void sysmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct SystemMemory *pResource, RsResourceRef *pReference) { - pResource->__sysmemAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS sysmemUnmap_DISPATCH(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pMemory->__sysmemUnmap__(pMemory, pCallContext, pCpuMapping); } -static inline NV_STATUS sysmemControl_Prologue_DISPATCH(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__sysmemControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS sysmemGetMemInterMapParams_DISPATCH(struct SystemMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pMemory->__sysmemGetMemInterMapParams__(pMemory, pParams); } -static inline NvBool sysmemIsGpuMapAllowed_DISPATCH(struct SystemMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__sysmemIsGpuMapAllowed__(pMemory, pGpu); +static inline NV_STATUS sysmemCheckMemInterUnmap_DISPATCH(struct SystemMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return pMemory->__sysmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } -static inline NV_STATUS sysmemUnmapFrom_DISPATCH(struct SystemMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__sysmemUnmapFrom__(pResource, pParams); +static inline NV_STATUS sysmemGetMemoryMappingDescriptor_DISPATCH(struct SystemMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return pMemory->__sysmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } -static inline void sysmemControl_Epilogue_DISPATCH(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__sysmemControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS sysmemCheckCopyPermissions_DISPATCH(struct SystemMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return pMemory->__sysmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } -static inline NV_STATUS sysmemControl_DISPATCH(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__sysmemControl__(pMemory, pCallContext, pParams); +static inline NV_STATUS sysmemIsReady_DISPATCH(struct SystemMemory *pMemory, NvBool bCopyConstructorContext) { + return pMemory->__sysmemIsReady__(pMemory, bCopyConstructorContext); } -static inline NV_STATUS sysmemUnmap_DISPATCH(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__sysmemUnmap__(pMemory, pCallContext, pCpuMapping); +static inline NvBool sysmemIsGpuMapAllowed_DISPATCH(struct SystemMemory *pMemory, struct OBJGPU *pGpu) { + return pMemory->__sysmemIsGpuMapAllowed__(pMemory, pGpu); } -static inline NV_STATUS sysmemGetMemInterMapParams_DISPATCH(struct SystemMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__sysmemGetMemInterMapParams__(pMemory, pParams); +static inline NvBool sysmemIsExportAllowed_DISPATCH(struct SystemMemory *pMemory) { + return pMemory->__sysmemIsExportAllowed__(pMemory); } -static inline NV_STATUS sysmemGetMemoryMappingDescriptor_DISPATCH(struct SystemMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__sysmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); +static inline NvBool sysmemAccessCallback_DISPATCH(struct SystemMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__sysmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS sysmemControlFilter_DISPATCH(struct SystemMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__sysmemControlFilter__(pResource, pCallContext, pParams); +static inline NvBool sysmemShareCallback_DISPATCH(struct SystemMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__sysmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS sysmemControlSerialization_Prologue_DISPATCH(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__sysmemControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool sysmemCanCopy_DISPATCH(struct SystemMemory *pStandardMemory) { - return pStandardMemory->__sysmemCanCopy__(pStandardMemory); -} - -static inline NvBool sysmemIsPartialUnmapSupported_DISPATCH(struct SystemMemory *pResource) { - return pResource->__sysmemIsPartialUnmapSupported__(pResource); +static inline void sysmemControlSerialization_Epilogue_DISPATCH(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__sysmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS sysmemIsReady_DISPATCH(struct SystemMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__sysmemIsReady__(pMemory, bCopyConstructorContext); +static inline NV_STATUS sysmemControl_Prologue_DISPATCH(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__sysmemControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS sysmemCheckCopyPermissions_DISPATCH(struct SystemMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__sysmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); +static inline void sysmemControl_Epilogue_DISPATCH(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__sysmemControl_Epilogue__(pResource, pCallContext, pParams); } static inline void sysmemPreDestruct_DISPATCH(struct SystemMemory *pResource) { pResource->__sysmemPreDestruct__(pResource); } -static inline NV_STATUS sysmemIsDuplicate_DISPATCH(struct SystemMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__sysmemIsDuplicate__(pMemory, hMemory, pDuplicate); +static inline NV_STATUS sysmemControlFilter_DISPATCH(struct SystemMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__sysmemControlFilter__(pResource, pCallContext, pParams); } -static inline void sysmemControlSerialization_Epilogue_DISPATCH(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__sysmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool sysmemIsPartialUnmapSupported_DISPATCH(struct SystemMemory *pResource) { + return pResource->__sysmemIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS sysmemMap_DISPATCH(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__sysmemMap__(pMemory, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS sysmemMapTo_DISPATCH(struct SystemMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__sysmemMapTo__(pResource, pParams); } -static inline NvBool sysmemAccessCallback_DISPATCH(struct SystemMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__sysmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS sysmemUnmapFrom_DISPATCH(struct SystemMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__sysmemUnmapFrom__(pResource, pParams); +} + +static inline NvU32 sysmemGetRefCount_DISPATCH(struct SystemMemory *pResource) { + return pResource->__sysmemGetRefCount__(pResource); } +static inline void sysmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct SystemMemory *pResource, RsResourceRef *pReference) { + pResource->__sysmemAddAdditionalDependants__(pClient, pResource, pReference); +} + +NV_STATUS sysmemInitAllocRequest_HMM(struct OBJGPU *pGpu, struct SystemMemory *pSystemMemory, MEMORY_ALLOCATION_REQUEST *pAllocRequest); + + +#ifdef __nvoc_system_mem_h_disabled +static inline NV_STATUS sysmemInitAllocRequest(struct OBJGPU *pGpu, struct SystemMemory *pSystemMemory, MEMORY_ALLOCATION_REQUEST *pAllocRequest) { + NV_ASSERT_FAILED_PRECOMP("SystemMemory was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_system_mem_h_disabled +#define sysmemInitAllocRequest(pGpu, pSystemMemory, pAllocRequest) sysmemInitAllocRequest_HMM(pGpu, pSystemMemory, pAllocRequest) +#endif //__nvoc_system_mem_h_disabled + +#define sysmemInitAllocRequest_HAL(pGpu, pSystemMemory, pAllocRequest) sysmemInitAllocRequest(pGpu, pSystemMemory, pAllocRequest) + +NV_STATUS sysmemCtrlCmdGetSurfaceNumPhysPages_IMPL(struct SystemMemory *pStandardMemory, NV003E_CTRL_GET_SURFACE_NUM_PHYS_PAGES_PARAMS *pParams); + +NV_STATUS sysmemCtrlCmdGetSurfacePhysPages_IMPL(struct SystemMemory *pStandardMemory, NV003E_CTRL_GET_SURFACE_PHYS_PAGES_PARAMS *pParams); + NV_STATUS sysmemConstruct_IMPL(struct SystemMemory *arg_pStandardMemory, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_sysmemConstruct(arg_pStandardMemory, arg_pCallContext, arg_pParams) sysmemConstruct_IMPL(arg_pStandardMemory, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_system_nvoc.c b/src/nvidia/generated/g_system_nvoc.c index 085d007a0d..18cc66f8b9 100644 --- a/src/nvidia/generated/g_system_nvoc.c +++ b/src/nvidia/generated/g_system_nvoc.c @@ -92,6 +92,7 @@ void __nvoc_init_dataField_OBJSYS(OBJSYS *pThis) { pThis->setProperty(pThis, PDB_PROP_SYS_PRIORITY_THROTTLE_DELAY_US, 16 * 1000); pThis->setProperty(pThis, PDB_PROP_SYS_CLIENT_HANDLE_LOOKUP, ((NvBool)(0 == 0))); pThis->setProperty(pThis, PDB_PROP_SYS_RM_LOCK_TIME_COLLECT, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_SYS_ENABLE_RM_TEST_ONLY_CODE, ((NvBool)(0 != 0))); pThis->setProperty(pThis, PDB_PROP_SYS_ROUTE_TO_PHYSICAL_LOCK_BYPASS, ((NvBool)(0 == 0))); pThis->bUseDeferredClientListFree = ((NvBool)(0 != 0)); @@ -123,13 +124,19 @@ NV_STATUS __nvoc_ctor_OBJSYS(OBJSYS *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJSYS_1(OBJSYS *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // sysCaptureState -- virtual pThis->__sysCaptureState__ = &sysCaptureState_IMPL; -} +} // End __nvoc_init_funcTable_OBJSYS_1 with approximately 1 basic block(s). + +// Initialize vtable(s) for 1 virtual method(s). void __nvoc_init_funcTable_OBJSYS(OBJSYS *pThis) { + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_OBJSYS_1(pThis); } diff --git a/src/nvidia/generated/g_system_nvoc.h b/src/nvidia/generated/g_system_nvoc.h index b8e34c2bde..df72b0e55c 100644 --- a/src/nvidia/generated/g_system_nvoc.h +++ b/src/nvidia/generated/g_system_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_SYSTEM_NVOC_H_ #define _G_SYSTEM_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_system_nvoc.h" #ifndef SYSTEM_H @@ -82,6 +90,7 @@ extern "C" { #define OS_TYPE_VMWARE 0x4 // Child class forward declarations. + struct OBJPFM; #ifndef __NVOC_CLASS_OBJPFM_TYPEDEF__ @@ -94,6 +103,7 @@ typedef struct OBJPFM OBJPFM; #endif /* __nvoc_class_id_OBJPFM */ + struct OBJVMM; #ifndef __NVOC_CLASS_OBJVMM_TYPEDEF__ @@ -106,6 +116,7 @@ typedef struct OBJVMM OBJVMM; #endif /* __nvoc_class_id_OBJVMM */ + struct OBJHYPERVISOR; #ifndef __NVOC_CLASS_OBJHYPERVISOR_TYPEDEF__ @@ -118,6 +129,7 @@ typedef struct OBJHYPERVISOR OBJHYPERVISOR; #endif /* __nvoc_class_id_OBJHYPERVISOR */ + struct OBJGPUMGR; #ifndef __NVOC_CLASS_OBJGPUMGR_TYPEDEF__ @@ -130,6 +142,7 @@ typedef struct OBJGPUMGR OBJGPUMGR; #endif /* __nvoc_class_id_OBJGPUMGR */ + struct OBJDISPMGR; #ifndef __NVOC_CLASS_OBJDISPMGR_TYPEDEF__ @@ -142,6 +155,7 @@ typedef struct OBJDISPMGR OBJDISPMGR; #endif /* __nvoc_class_id_OBJDISPMGR */ + struct PlatformRequestHandler; #ifndef __NVOC_CLASS_PlatformRequestHandler_TYPEDEF__ @@ -154,6 +168,7 @@ typedef struct PlatformRequestHandler PlatformRequestHandler; #endif /* __nvoc_class_id_PlatformRequestHandler */ + struct GpuAccounting; #ifndef __NVOC_CLASS_GpuAccounting_TYPEDEF__ @@ -166,6 +181,7 @@ typedef struct GpuAccounting GpuAccounting; #endif /* __nvoc_class_id_GpuAccounting */ + struct OBJHALMGR; #ifndef __NVOC_CLASS_OBJHALMGR_TYPEDEF__ @@ -178,6 +194,7 @@ typedef struct OBJHALMGR OBJHALMGR; #endif /* __nvoc_class_id_OBJHALMGR */ + struct Fabric; #ifndef __NVOC_CLASS_Fabric_TYPEDEF__ @@ -190,6 +207,7 @@ typedef struct Fabric Fabric; #endif /* __nvoc_class_id_Fabric */ + struct GpuDb; #ifndef __NVOC_CLASS_GpuDb_TYPEDEF__ @@ -202,6 +220,7 @@ typedef struct GpuDb GpuDb; #endif /* __nvoc_class_id_GpuDb */ + struct OBJCL; #ifndef __NVOC_CLASS_OBJCL_TYPEDEF__ @@ -214,6 +233,7 @@ typedef struct OBJCL OBJCL; #endif /* __nvoc_class_id_OBJCL */ + struct KernelVgpuMgr; #ifndef __NVOC_CLASS_KernelVgpuMgr_TYPEDEF__ @@ -226,6 +246,7 @@ typedef struct KernelVgpuMgr KernelVgpuMgr; #endif /* __nvoc_class_id_KernelVgpuMgr */ + struct OBJVRRMGR; #ifndef __NVOC_CLASS_OBJVRRMGR_TYPEDEF__ @@ -238,6 +259,7 @@ typedef struct OBJVRRMGR OBJVRRMGR; #endif /* __nvoc_class_id_OBJVRRMGR */ + struct OBJGPUBOOSTMGR; #ifndef __NVOC_CLASS_OBJGPUBOOSTMGR_TYPEDEF__ @@ -250,6 +272,7 @@ typedef struct OBJGPUBOOSTMGR OBJGPUBOOSTMGR; #endif /* __nvoc_class_id_OBJGPUBOOSTMGR */ + struct OBJGSYNCMGR; #ifndef __NVOC_CLASS_OBJGSYNCMGR_TYPEDEF__ @@ -262,6 +285,7 @@ typedef struct OBJGSYNCMGR OBJGSYNCMGR; #endif /* __nvoc_class_id_OBJGSYNCMGR */ + struct OBJVGPUMGR; #ifndef __NVOC_CLASS_OBJVGPUMGR_TYPEDEF__ @@ -274,6 +298,7 @@ typedef struct OBJVGPUMGR OBJVGPUMGR; #endif /* __nvoc_class_id_OBJVGPUMGR */ + struct OBJOS; #ifndef __NVOC_CLASS_OBJOS_TYPEDEF__ @@ -361,14 +386,25 @@ MAKE_MULTIMAP(SYS_MEM_EXPORT_CACHE, SysMemExportCacheEntry); #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJSYS { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; struct OBJTRACEABLE __nvoc_base_OBJTRACEABLE; - struct Object *__nvoc_pbase_Object; - struct OBJTRACEABLE *__nvoc_pbase_OBJTRACEABLE; - struct OBJSYS *__nvoc_pbase_OBJSYS; - NV_STATUS (*__sysCaptureState__)(struct OBJSYS *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct OBJTRACEABLE *__nvoc_pbase_OBJTRACEABLE; // traceable super + struct OBJSYS *__nvoc_pbase_OBJSYS; // sys + + // Vtable with 1 per-object function pointer + NV_STATUS (*__sysCaptureState__)(struct OBJSYS * /*this*/); // virtual + + // 34 PDB properties NvBool PDB_PROP_SYS_SBIOS_NVIF_POWERMIZER_LIMIT; NvBool PDB_PROP_SYS_MXM_THERMAL_CONTROL_PRESENT; NvBool PDB_PROP_SYS_POWER_BATTERY; @@ -398,10 +434,16 @@ struct OBJSYS { NvBool PDB_PROP_SYS_BUGCHECK_ON_TIMEOUT; NvBool PDB_PROP_SYS_CLIENT_HANDLE_LOOKUP; NvBool PDB_PROP_SYS_RM_LOCK_TIME_COLLECT; + NvBool PDB_PROP_SYS_ENABLE_RM_TEST_ONLY_CODE; + NvBool PDB_PROP_SYS_ROUTE_TO_PHYSICAL_LOCK_BYPASS; + NvBool PDB_PROP_SYS_IS_QSYNC_FW_REVISION_CHECK_DISABLED; + NvBool PDB_PROP_SYS_GPU_LOCK_MIDPATH_ENABLED; + NvBool PDB_PROP_SYS_DESTRUCTING; + + // Data members NvU32 apiLockMask; NvU32 apiLockModuleMask; NvU32 gpuLockModuleMask; - NvBool PDB_PROP_SYS_ROUTE_TO_PHYSICAL_LOCK_BYPASS; NvU32 pwrTransitionTimeoutOverride; SYS_STATIC_CONFIG staticConfig; NvU32 debugFlags; @@ -413,9 +455,6 @@ struct OBJSYS { void *pSema; NvU32 binMask; PNODE pMemFilterList; - NvBool PDB_PROP_SYS_IS_QSYNC_FW_REVISION_CHECK_DISABLED; - NvBool PDB_PROP_SYS_GPU_LOCK_MIDPATH_ENABLED; - NvBool PDB_PROP_SYS_DESTRUCTING; NvU64 rmInstanceId; NvU32 currentCid; NvBool bUseDeferredClientListFree; @@ -454,6 +493,7 @@ typedef struct OBJSYS OBJSYS; #define __nvoc_class_id_OBJSYS 0x40e2c8 #endif /* __nvoc_class_id_OBJSYS */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJSYS; #define __staticCast_OBJSYS(pThis) \ @@ -466,6 +506,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJSYS; ((OBJSYS*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJSYS))) #endif //__nvoc_system_h_disabled +// Property macros #define PDB_PROP_SYS_REGISTRY_OVERRIDES_INITIALIZED_BASE_CAST #define PDB_PROP_SYS_REGISTRY_OVERRIDES_INITIALIZED_BASE_NAME PDB_PROP_SYS_REGISTRY_OVERRIDES_INITIALIZED #define PDB_PROP_SYS_IS_EFI_INIT_BASE_CAST @@ -492,6 +533,8 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJSYS; #define PDB_PROP_SYS_PRIMARY_VBIOS_STATE_SAVED_BASE_NAME PDB_PROP_SYS_PRIMARY_VBIOS_STATE_SAVED #define PDB_PROP_SYS_BUGCHECK_ON_TIMEOUT_BASE_CAST #define PDB_PROP_SYS_BUGCHECK_ON_TIMEOUT_BASE_NAME PDB_PROP_SYS_BUGCHECK_ON_TIMEOUT +#define PDB_PROP_SYS_ENABLE_RM_TEST_ONLY_CODE_BASE_CAST +#define PDB_PROP_SYS_ENABLE_RM_TEST_ONLY_CODE_BASE_NAME PDB_PROP_SYS_ENABLE_RM_TEST_ONLY_CODE #define PDB_PROP_SYS_ENABLE_STREAM_MEMOPS_BASE_CAST #define PDB_PROP_SYS_ENABLE_STREAM_MEMOPS_BASE_NAME PDB_PROP_SYS_ENABLE_STREAM_MEMOPS #define PDB_PROP_SYS_SBIOS_NVIF_POWERMIZER_LIMIT_BASE_CAST @@ -539,13 +582,18 @@ NV_STATUS __nvoc_objCreate_OBJSYS(OBJSYS**, Dynamic*, NvU32); #define __objCreate_OBJSYS(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJSYS((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define sysCaptureState(arg0) sysCaptureState_DISPATCH(arg0) -NV_STATUS sysCaptureState_IMPL(struct OBJSYS *arg0); -static inline NV_STATUS sysCaptureState_DISPATCH(struct OBJSYS *arg0) { - return arg0->__sysCaptureState__(arg0); +// Wrapper macros +#define sysCaptureState_FNPTR(arg_this) arg_this->__sysCaptureState__ +#define sysCaptureState(arg_this) sysCaptureState_DISPATCH(arg_this) + +// Dispatch functions +static inline NV_STATUS sysCaptureState_DISPATCH(struct OBJSYS *arg_this) { + return arg_this->__sysCaptureState__(arg_this); } +NV_STATUS sysCaptureState_IMPL(struct OBJSYS *arg1); + static inline NvU32 sysGetPwrTransitionTimeout(struct OBJSYS *pSys) { return pSys->pwrTransitionTimeoutOverride; } @@ -557,69 +605,69 @@ static inline const SYS_STATIC_CONFIG *sysGetStaticConfig(struct OBJSYS *pSys) { NV_STATUS sysConstruct_IMPL(struct OBJSYS *arg_); #define __nvoc_sysConstruct(arg_) sysConstruct_IMPL(arg_) -void sysDestruct_IMPL(struct OBJSYS *arg0); +void sysDestruct_IMPL(struct OBJSYS *arg1); -#define __nvoc_sysDestruct(arg0) sysDestruct_IMPL(arg0) -void sysInitRegistryOverrides_IMPL(struct OBJSYS *arg0); +#define __nvoc_sysDestruct(arg1) sysDestruct_IMPL(arg1) +void sysInitRegistryOverrides_IMPL(struct OBJSYS *arg1); #ifdef __nvoc_system_h_disabled -static inline void sysInitRegistryOverrides(struct OBJSYS *arg0) { +static inline void sysInitRegistryOverrides(struct OBJSYS *arg1) { NV_ASSERT_FAILED_PRECOMP("OBJSYS was disabled!"); } #else //__nvoc_system_h_disabled -#define sysInitRegistryOverrides(arg0) sysInitRegistryOverrides_IMPL(arg0) +#define sysInitRegistryOverrides(arg1) sysInitRegistryOverrides_IMPL(arg1) #endif //__nvoc_system_h_disabled -void sysApplyLockingPolicy_IMPL(struct OBJSYS *arg0); +void sysApplyLockingPolicy_IMPL(struct OBJSYS *arg1); #ifdef __nvoc_system_h_disabled -static inline void sysApplyLockingPolicy(struct OBJSYS *arg0) { +static inline void sysApplyLockingPolicy(struct OBJSYS *arg1) { NV_ASSERT_FAILED_PRECOMP("OBJSYS was disabled!"); } #else //__nvoc_system_h_disabled -#define sysApplyLockingPolicy(arg0) sysApplyLockingPolicy_IMPL(arg0) +#define sysApplyLockingPolicy(arg1) sysApplyLockingPolicy_IMPL(arg1) #endif //__nvoc_system_h_disabled -struct OBJOS *sysGetOs_IMPL(struct OBJSYS *arg0); +struct OBJOS *sysGetOs_IMPL(struct OBJSYS *arg1); #ifdef __nvoc_system_h_disabled -static inline struct OBJOS *sysGetOs(struct OBJSYS *arg0) { +static inline struct OBJOS *sysGetOs(struct OBJSYS *arg1) { NV_ASSERT_FAILED_PRECOMP("OBJSYS was disabled!"); return NULL; } #else //__nvoc_system_h_disabled -#define sysGetOs(arg0) sysGetOs_IMPL(arg0) +#define sysGetOs(arg1) sysGetOs_IMPL(arg1) #endif //__nvoc_system_h_disabled -void sysEnableExternalFabricMgmt_IMPL(struct OBJSYS *arg0); +void sysEnableExternalFabricMgmt_IMPL(struct OBJSYS *arg1); #ifdef __nvoc_system_h_disabled -static inline void sysEnableExternalFabricMgmt(struct OBJSYS *arg0) { +static inline void sysEnableExternalFabricMgmt(struct OBJSYS *arg1) { NV_ASSERT_FAILED_PRECOMP("OBJSYS was disabled!"); } #else //__nvoc_system_h_disabled -#define sysEnableExternalFabricMgmt(arg0) sysEnableExternalFabricMgmt_IMPL(arg0) +#define sysEnableExternalFabricMgmt(arg1) sysEnableExternalFabricMgmt_IMPL(arg1) #endif //__nvoc_system_h_disabled -void sysForceInitFabricManagerState_IMPL(struct OBJSYS *arg0); +void sysForceInitFabricManagerState_IMPL(struct OBJSYS *arg1); #ifdef __nvoc_system_h_disabled -static inline void sysForceInitFabricManagerState(struct OBJSYS *arg0) { +static inline void sysForceInitFabricManagerState(struct OBJSYS *arg1) { NV_ASSERT_FAILED_PRECOMP("OBJSYS was disabled!"); } #else //__nvoc_system_h_disabled -#define sysForceInitFabricManagerState(arg0) sysForceInitFabricManagerState_IMPL(arg0) +#define sysForceInitFabricManagerState(arg1) sysForceInitFabricManagerState_IMPL(arg1) #endif //__nvoc_system_h_disabled -NV_STATUS sysSyncExternalFabricMgmtWAR_IMPL(struct OBJSYS *arg0, OBJGPU *arg1); +NV_STATUS sysSyncExternalFabricMgmtWAR_IMPL(struct OBJSYS *arg1, OBJGPU *arg2); #ifdef __nvoc_system_h_disabled -static inline NV_STATUS sysSyncExternalFabricMgmtWAR(struct OBJSYS *arg0, OBJGPU *arg1) { +static inline NV_STATUS sysSyncExternalFabricMgmtWAR(struct OBJSYS *arg1, OBJGPU *arg2) { NV_ASSERT_FAILED_PRECOMP("OBJSYS was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_system_h_disabled -#define sysSyncExternalFabricMgmtWAR(arg0, arg1) sysSyncExternalFabricMgmtWAR_IMPL(arg0, arg1) +#define sysSyncExternalFabricMgmtWAR(arg1, arg2) sysSyncExternalFabricMgmtWAR_IMPL(arg1, arg2) #endif //__nvoc_system_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_third_party_p2p_nvoc.c b/src/nvidia/generated/g_third_party_p2p_nvoc.c index 2b61586127..659ab761aa 100644 --- a/src/nvidia/generated/g_third_party_p2p_nvoc.c +++ b/src/nvidia/generated/g_third_party_p2p_nvoc.c @@ -102,10 +102,13 @@ NV_STATUS __nvoc_ctor_P2PTokenShare(P2PTokenShare *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_P2PTokenShare_1(P2PTokenShare *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_P2PTokenShare_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_P2PTokenShare(P2PTokenShare *pThis) { __nvoc_init_funcTable_P2PTokenShare_1(pThis); } @@ -271,106 +274,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_ThirdPartyP2P = /*pExportInfo=*/ &__nvoc_export_info_ThirdPartyP2P }; -static NvBool __nvoc_thunk_GpuResource_thirdpartyp2pShareCallback(struct ThirdPartyP2P *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_thirdpartyp2pCheckMemInterUnmap(struct ThirdPartyP2P *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RsResource_thirdpartyp2pMapTo(struct ThirdPartyP2P *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_thirdpartyp2pGetMapAddrSpace(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} - -static NvU32 __nvoc_thunk_RsResource_thirdpartyp2pGetRefCount(struct ThirdPartyP2P *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_thirdpartyp2pAddAdditionalDependants(struct RsClient *pClient, struct ThirdPartyP2P *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_thirdpartyp2pControl_Prologue(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_thirdpartyp2pGetRegBaseOffsetAndSize(struct ThirdPartyP2P *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), pGpu, pOffset, pSize); -} - -static NV_STATUS __nvoc_thunk_GpuResource_thirdpartyp2pInternalControlForward(struct ThirdPartyP2P *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), command, pParams, size); -} - -static NV_STATUS __nvoc_thunk_RsResource_thirdpartyp2pUnmapFrom(struct ThirdPartyP2P *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_thirdpartyp2pControl_Epilogue(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), pCallContext, pParams); -} - -static NvHandle __nvoc_thunk_GpuResource_thirdpartyp2pGetInternalObjectHandle(struct ThirdPartyP2P *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_thirdpartyp2pControl(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_thirdpartyp2pUnmap(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_thirdpartyp2pGetMemInterMapParams(struct ThirdPartyP2P *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_thirdpartyp2pGetMemoryMappingDescriptor(struct ThirdPartyP2P *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_thirdpartyp2pControlFilter(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_thirdpartyp2pControlSerialization_Prologue(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_thirdpartyp2pCanCopy(struct ThirdPartyP2P *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_thirdpartyp2pIsPartialUnmapSupported(struct ThirdPartyP2P *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_thirdpartyp2pPreDestruct(struct ThirdPartyP2P *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_thirdpartyp2pIsDuplicate(struct ThirdPartyP2P *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_thirdpartyp2pControlSerialization_Epilogue(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_thirdpartyp2pMap(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_thirdpartyp2pAccessCallback(struct ThirdPartyP2P *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -378,12 +281,12 @@ static NvBool __nvoc_thunk_RmResource_thirdpartyp2pAccessCallback(struct ThirdPa static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ThirdPartyP2P[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) thirdpartyp2pCtrlCmdRegisterVaSpace_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x503c0102u, /*paramSize=*/ sizeof(NV503C_CTRL_REGISTER_VA_SPACE_PARAMS), @@ -393,12 +296,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ThirdPar #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) thirdpartyp2pCtrlCmdUnregisterVaSpace_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x503c0103u, /*paramSize=*/ sizeof(NV503C_CTRL_UNREGISTER_VA_SPACE_PARAMS), @@ -408,12 +311,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ThirdPar #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) thirdpartyp2pCtrlCmdRegisterVidmem_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x503c0104u, /*paramSize=*/ sizeof(NV503C_CTRL_REGISTER_VIDMEM_PARAMS), @@ -423,12 +326,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ThirdPar #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) thirdpartyp2pCtrlCmdUnregisterVidmem_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x503c0105u, /*paramSize=*/ sizeof(NV503C_CTRL_UNREGISTER_VIDMEM_PARAMS), @@ -438,12 +341,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ThirdPar #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) thirdpartyp2pCtrlCmdRegisterPid_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x503c0106u, /*paramSize=*/ sizeof(NV503C_CTRL_REGISTER_PID_PARAMS), @@ -455,6 +358,134 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ThirdPar }; +// 25 up-thunk(s) defined to bridge methods in ThirdPartyP2P to superclasses + +// thirdpartyp2pControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pControl(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), pCallContext, pParams); +} + +// thirdpartyp2pMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pMap(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// thirdpartyp2pUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pUnmap(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), pCallContext, pCpuMapping); +} + +// thirdpartyp2pShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_thirdpartyp2pShareCallback(struct ThirdPartyP2P *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// thirdpartyp2pGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pGetRegBaseOffsetAndSize(struct ThirdPartyP2P *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), pGpu, pOffset, pSize); +} + +// thirdpartyp2pGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pGetMapAddrSpace(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + +// thirdpartyp2pInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pInternalControlForward(struct ThirdPartyP2P *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), command, pParams, size); +} + +// thirdpartyp2pGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_thirdpartyp2pGetInternalObjectHandle(struct ThirdPartyP2P *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset)); +} + +// thirdpartyp2pAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_thirdpartyp2pAccessCallback(struct ThirdPartyP2P *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// thirdpartyp2pGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_thirdpartyp2pGetMemInterMapParams(struct ThirdPartyP2P *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), pParams); +} + +// thirdpartyp2pCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_thirdpartyp2pCheckMemInterUnmap(struct ThirdPartyP2P *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), bSubdeviceHandleProvided); +} + +// thirdpartyp2pGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_thirdpartyp2pGetMemoryMappingDescriptor(struct ThirdPartyP2P *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), ppMemDesc); +} + +// thirdpartyp2pControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_thirdpartyp2pControlSerialization_Prologue(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), pCallContext, pParams); +} + +// thirdpartyp2pControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_thirdpartyp2pControlSerialization_Epilogue(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), pCallContext, pParams); +} + +// thirdpartyp2pControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_thirdpartyp2pControl_Prologue(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), pCallContext, pParams); +} + +// thirdpartyp2pControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_thirdpartyp2pControl_Epilogue(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), pCallContext, pParams); +} + +// thirdpartyp2pCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_thirdpartyp2pCanCopy(struct ThirdPartyP2P *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset)); +} + +// thirdpartyp2pIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_thirdpartyp2pIsDuplicate(struct ThirdPartyP2P *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset), hMemory, pDuplicate); +} + +// thirdpartyp2pPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_thirdpartyp2pPreDestruct(struct ThirdPartyP2P *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset)); +} + +// thirdpartyp2pControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_thirdpartyp2pControlFilter(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset), pCallContext, pParams); +} + +// thirdpartyp2pIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_thirdpartyp2pIsPartialUnmapSupported(struct ThirdPartyP2P *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset)); +} + +// thirdpartyp2pMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_thirdpartyp2pMapTo(struct ThirdPartyP2P *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset), pParams); +} + +// thirdpartyp2pUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_thirdpartyp2pUnmapFrom(struct ThirdPartyP2P *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset), pParams); +} + +// thirdpartyp2pGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_thirdpartyp2pGetRefCount(struct ThirdPartyP2P *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset)); +} + +// thirdpartyp2pAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_thirdpartyp2pAddAdditionalDependants(struct RsClient *pClient, struct ThirdPartyP2P *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset), pReference); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_ThirdPartyP2P = { /*numEntries=*/ 5, @@ -491,81 +522,116 @@ NV_STATUS __nvoc_ctor_ThirdPartyP2P(ThirdPartyP2P *pThis, struct CALL_CONTEXT * return status; } +// Vtable initialization static void __nvoc_init_funcTable_ThirdPartyP2P_1(ThirdPartyP2P *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // thirdpartyp2pCtrlCmdRegisterVaSpace -- exported (id=0x503c0102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__thirdpartyp2pCtrlCmdRegisterVaSpace__ = &thirdpartyp2pCtrlCmdRegisterVaSpace_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // thirdpartyp2pCtrlCmdUnregisterVaSpace -- exported (id=0x503c0103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__thirdpartyp2pCtrlCmdUnregisterVaSpace__ = &thirdpartyp2pCtrlCmdUnregisterVaSpace_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // thirdpartyp2pCtrlCmdRegisterVidmem -- exported (id=0x503c0104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__thirdpartyp2pCtrlCmdRegisterVidmem__ = &thirdpartyp2pCtrlCmdRegisterVidmem_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // thirdpartyp2pCtrlCmdUnregisterVidmem -- exported (id=0x503c0105) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__thirdpartyp2pCtrlCmdUnregisterVidmem__ = &thirdpartyp2pCtrlCmdUnregisterVidmem_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // thirdpartyp2pCtrlCmdRegisterPid -- exported (id=0x503c0106) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__thirdpartyp2pCtrlCmdRegisterPid__ = &thirdpartyp2pCtrlCmdRegisterPid_IMPL; #endif - pThis->__thirdpartyp2pShareCallback__ = &__nvoc_thunk_GpuResource_thirdpartyp2pShareCallback; + // thirdpartyp2pControl -- virtual inherited (gpures) base (gpures) + pThis->__thirdpartyp2pControl__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pControl; - pThis->__thirdpartyp2pCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_thirdpartyp2pCheckMemInterUnmap; + // thirdpartyp2pMap -- virtual inherited (gpures) base (gpures) + pThis->__thirdpartyp2pMap__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pMap; - pThis->__thirdpartyp2pMapTo__ = &__nvoc_thunk_RsResource_thirdpartyp2pMapTo; + // thirdpartyp2pUnmap -- virtual inherited (gpures) base (gpures) + pThis->__thirdpartyp2pUnmap__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pUnmap; - pThis->__thirdpartyp2pGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_thirdpartyp2pGetMapAddrSpace; + // thirdpartyp2pShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__thirdpartyp2pShareCallback__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pShareCallback; - pThis->__thirdpartyp2pGetRefCount__ = &__nvoc_thunk_RsResource_thirdpartyp2pGetRefCount; + // thirdpartyp2pGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__thirdpartyp2pGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pGetRegBaseOffsetAndSize; - pThis->__thirdpartyp2pAddAdditionalDependants__ = &__nvoc_thunk_RsResource_thirdpartyp2pAddAdditionalDependants; + // thirdpartyp2pGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__thirdpartyp2pGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pGetMapAddrSpace; - pThis->__thirdpartyp2pControl_Prologue__ = &__nvoc_thunk_RmResource_thirdpartyp2pControl_Prologue; + // thirdpartyp2pInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__thirdpartyp2pInternalControlForward__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pInternalControlForward; - pThis->__thirdpartyp2pGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_thirdpartyp2pGetRegBaseOffsetAndSize; + // thirdpartyp2pGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__thirdpartyp2pGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pGetInternalObjectHandle; - pThis->__thirdpartyp2pInternalControlForward__ = &__nvoc_thunk_GpuResource_thirdpartyp2pInternalControlForward; + // thirdpartyp2pAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__thirdpartyp2pAccessCallback__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pAccessCallback; - pThis->__thirdpartyp2pUnmapFrom__ = &__nvoc_thunk_RsResource_thirdpartyp2pUnmapFrom; + // thirdpartyp2pGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__thirdpartyp2pGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pGetMemInterMapParams; - pThis->__thirdpartyp2pControl_Epilogue__ = &__nvoc_thunk_RmResource_thirdpartyp2pControl_Epilogue; + // thirdpartyp2pCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__thirdpartyp2pCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pCheckMemInterUnmap; - pThis->__thirdpartyp2pGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_thirdpartyp2pGetInternalObjectHandle; + // thirdpartyp2pGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__thirdpartyp2pGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pGetMemoryMappingDescriptor; - pThis->__thirdpartyp2pControl__ = &__nvoc_thunk_GpuResource_thirdpartyp2pControl; + // thirdpartyp2pControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__thirdpartyp2pControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pControlSerialization_Prologue; - pThis->__thirdpartyp2pUnmap__ = &__nvoc_thunk_GpuResource_thirdpartyp2pUnmap; + // thirdpartyp2pControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__thirdpartyp2pControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pControlSerialization_Epilogue; - pThis->__thirdpartyp2pGetMemInterMapParams__ = &__nvoc_thunk_RmResource_thirdpartyp2pGetMemInterMapParams; + // thirdpartyp2pControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__thirdpartyp2pControl_Prologue__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pControl_Prologue; - pThis->__thirdpartyp2pGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_thirdpartyp2pGetMemoryMappingDescriptor; + // thirdpartyp2pControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__thirdpartyp2pControl_Epilogue__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pControl_Epilogue; - pThis->__thirdpartyp2pControlFilter__ = &__nvoc_thunk_RsResource_thirdpartyp2pControlFilter; + // thirdpartyp2pCanCopy -- virtual inherited (res) base (gpures) + pThis->__thirdpartyp2pCanCopy__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pCanCopy; - pThis->__thirdpartyp2pControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_thirdpartyp2pControlSerialization_Prologue; + // thirdpartyp2pIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__thirdpartyp2pIsDuplicate__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pIsDuplicate; - pThis->__thirdpartyp2pCanCopy__ = &__nvoc_thunk_RsResource_thirdpartyp2pCanCopy; + // thirdpartyp2pPreDestruct -- virtual inherited (res) base (gpures) + pThis->__thirdpartyp2pPreDestruct__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pPreDestruct; - pThis->__thirdpartyp2pIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_thirdpartyp2pIsPartialUnmapSupported; + // thirdpartyp2pControlFilter -- virtual inherited (res) base (gpures) + pThis->__thirdpartyp2pControlFilter__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pControlFilter; - pThis->__thirdpartyp2pPreDestruct__ = &__nvoc_thunk_RsResource_thirdpartyp2pPreDestruct; + // thirdpartyp2pIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__thirdpartyp2pIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pIsPartialUnmapSupported; - pThis->__thirdpartyp2pIsDuplicate__ = &__nvoc_thunk_RsResource_thirdpartyp2pIsDuplicate; + // thirdpartyp2pMapTo -- virtual inherited (res) base (gpures) + pThis->__thirdpartyp2pMapTo__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pMapTo; - pThis->__thirdpartyp2pControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_thirdpartyp2pControlSerialization_Epilogue; + // thirdpartyp2pUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__thirdpartyp2pUnmapFrom__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pUnmapFrom; - pThis->__thirdpartyp2pMap__ = &__nvoc_thunk_GpuResource_thirdpartyp2pMap; + // thirdpartyp2pGetRefCount -- virtual inherited (res) base (gpures) + pThis->__thirdpartyp2pGetRefCount__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pGetRefCount; + + // thirdpartyp2pAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__thirdpartyp2pAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pAddAdditionalDependants; +} // End __nvoc_init_funcTable_ThirdPartyP2P_1 with approximately 30 basic block(s). - pThis->__thirdpartyp2pAccessCallback__ = &__nvoc_thunk_RmResource_thirdpartyp2pAccessCallback; -} +// Initialize vtable(s) for 30 virtual method(s). void __nvoc_init_funcTable_ThirdPartyP2P(ThirdPartyP2P *pThis) { + + // Initialize vtable(s) with 30 per-object function pointer(s). __nvoc_init_funcTable_ThirdPartyP2P_1(pThis); } diff --git a/src/nvidia/generated/g_third_party_p2p_nvoc.h b/src/nvidia/generated/g_third_party_p2p_nvoc.h index b81d3d9f72..be7c92d689 100644 --- a/src/nvidia/generated/g_third_party_p2p_nvoc.h +++ b/src/nvidia/generated/g_third_party_p2p_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_THIRD_PARTY_P2P_NVOC_H_ #define _G_THIRD_PARTY_P2P_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_third_party_p2p_nvoc.h" #ifndef _THIRD_PARTY_P2P_H_ @@ -40,6 +48,7 @@ extern "C" { #include + struct Subdevice; #ifndef __NVOC_CLASS_Subdevice_TYPEDEF__ @@ -52,6 +61,7 @@ typedef struct Subdevice Subdevice; #endif /* __nvoc_class_id_Subdevice */ + struct Memory; #ifndef __NVOC_CLASS_Memory_TYPEDEF__ @@ -185,6 +195,7 @@ struct _def_client_third_party_p2p_pid_client_mapping_info }; typedef struct _def_client_third_party_p2p_pid_client_mapping_info CLI_THIRD_PARTY_P2P_PID_CLIENT_INFO, *PCLI_THIRD_PARTY_P2P_PID_CLIENT_INFO; + struct ThirdPartyP2P; #ifndef __NVOC_CLASS_ThirdPartyP2P_TYPEDEF__ @@ -207,12 +218,21 @@ typedef struct ThirdPartyP2P ThirdPartyP2P; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct P2PTokenShare { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct RsShared __nvoc_base_RsShared; - struct Object *__nvoc_pbase_Object; - struct RsShared *__nvoc_pbase_RsShared; - struct P2PTokenShare *__nvoc_pbase_P2PTokenShare; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct RsShared *__nvoc_pbase_RsShared; // shr super + struct P2PTokenShare *__nvoc_pbase_P2PTokenShare; // shrp2p + + // Data members struct ThirdPartyP2P *pThirdPartyP2P; }; @@ -225,6 +245,7 @@ typedef struct P2PTokenShare P2PTokenShare; #define __nvoc_class_id_P2PTokenShare 0x3e3a6a #endif /* __nvoc_class_id_P2PTokenShare */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_P2PTokenShare; #define __staticCast_P2PTokenShare(pThis) \ @@ -237,13 +258,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_P2PTokenShare; ((P2PTokenShare*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(P2PTokenShare))) #endif //__nvoc_third_party_p2p_h_disabled - NV_STATUS __nvoc_objCreateDynamic_P2PTokenShare(P2PTokenShare**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_P2PTokenShare(P2PTokenShare**, Dynamic*, NvU32); #define __objCreate_P2PTokenShare(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_P2PTokenShare((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS shrp2pConstruct_IMPL(struct P2PTokenShare *arg_pP2PTokenShare); #define __nvoc_shrp2pConstruct(arg_pP2PTokenShare) shrp2pConstruct_IMPL(arg_pP2PTokenShare) @@ -263,45 +287,56 @@ void shrp2pDestruct_IMPL(struct P2PTokenShare *pP2PTokenShare); #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct ThirdPartyP2P { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct ThirdPartyP2P *__nvoc_pbase_ThirdPartyP2P; - NV_STATUS (*__thirdpartyp2pCtrlCmdRegisterVaSpace__)(struct ThirdPartyP2P *, NV503C_CTRL_REGISTER_VA_SPACE_PARAMS *); - NV_STATUS (*__thirdpartyp2pCtrlCmdUnregisterVaSpace__)(struct ThirdPartyP2P *, NV503C_CTRL_UNREGISTER_VA_SPACE_PARAMS *); - NV_STATUS (*__thirdpartyp2pCtrlCmdRegisterVidmem__)(struct ThirdPartyP2P *, NV503C_CTRL_REGISTER_VIDMEM_PARAMS *); - NV_STATUS (*__thirdpartyp2pCtrlCmdUnregisterVidmem__)(struct ThirdPartyP2P *, NV503C_CTRL_UNREGISTER_VIDMEM_PARAMS *); - NV_STATUS (*__thirdpartyp2pCtrlCmdRegisterPid__)(struct ThirdPartyP2P *, NV503C_CTRL_REGISTER_PID_PARAMS *); - NvBool (*__thirdpartyp2pShareCallback__)(struct ThirdPartyP2P *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__thirdpartyp2pCheckMemInterUnmap__)(struct ThirdPartyP2P *, NvBool); - NV_STATUS (*__thirdpartyp2pMapTo__)(struct ThirdPartyP2P *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__thirdpartyp2pGetMapAddrSpace__)(struct ThirdPartyP2P *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__thirdpartyp2pGetRefCount__)(struct ThirdPartyP2P *); - void (*__thirdpartyp2pAddAdditionalDependants__)(struct RsClient *, struct ThirdPartyP2P *, RsResourceRef *); - NV_STATUS (*__thirdpartyp2pControl_Prologue__)(struct ThirdPartyP2P *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__thirdpartyp2pGetRegBaseOffsetAndSize__)(struct ThirdPartyP2P *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__thirdpartyp2pInternalControlForward__)(struct ThirdPartyP2P *, NvU32, void *, NvU32); - NV_STATUS (*__thirdpartyp2pUnmapFrom__)(struct ThirdPartyP2P *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__thirdpartyp2pControl_Epilogue__)(struct ThirdPartyP2P *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__thirdpartyp2pGetInternalObjectHandle__)(struct ThirdPartyP2P *); - NV_STATUS (*__thirdpartyp2pControl__)(struct ThirdPartyP2P *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__thirdpartyp2pUnmap__)(struct ThirdPartyP2P *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__thirdpartyp2pGetMemInterMapParams__)(struct ThirdPartyP2P *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__thirdpartyp2pGetMemoryMappingDescriptor__)(struct ThirdPartyP2P *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__thirdpartyp2pControlFilter__)(struct ThirdPartyP2P *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__thirdpartyp2pControlSerialization_Prologue__)(struct ThirdPartyP2P *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__thirdpartyp2pCanCopy__)(struct ThirdPartyP2P *); - NvBool (*__thirdpartyp2pIsPartialUnmapSupported__)(struct ThirdPartyP2P *); - void (*__thirdpartyp2pPreDestruct__)(struct ThirdPartyP2P *); - NV_STATUS (*__thirdpartyp2pIsDuplicate__)(struct ThirdPartyP2P *, NvHandle, NvBool *); - void (*__thirdpartyp2pControlSerialization_Epilogue__)(struct ThirdPartyP2P *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__thirdpartyp2pMap__)(struct ThirdPartyP2P *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__thirdpartyp2pAccessCallback__)(struct ThirdPartyP2P *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct ThirdPartyP2P *__nvoc_pbase_ThirdPartyP2P; // thirdpartyp2p + + // Vtable with 30 per-object function pointers + NV_STATUS (*__thirdpartyp2pCtrlCmdRegisterVaSpace__)(struct ThirdPartyP2P * /*this*/, NV503C_CTRL_REGISTER_VA_SPACE_PARAMS *); // exported (id=0x503c0102) + NV_STATUS (*__thirdpartyp2pCtrlCmdUnregisterVaSpace__)(struct ThirdPartyP2P * /*this*/, NV503C_CTRL_UNREGISTER_VA_SPACE_PARAMS *); // exported (id=0x503c0103) + NV_STATUS (*__thirdpartyp2pCtrlCmdRegisterVidmem__)(struct ThirdPartyP2P * /*this*/, NV503C_CTRL_REGISTER_VIDMEM_PARAMS *); // exported (id=0x503c0104) + NV_STATUS (*__thirdpartyp2pCtrlCmdUnregisterVidmem__)(struct ThirdPartyP2P * /*this*/, NV503C_CTRL_UNREGISTER_VIDMEM_PARAMS *); // exported (id=0x503c0105) + NV_STATUS (*__thirdpartyp2pCtrlCmdRegisterPid__)(struct ThirdPartyP2P * /*this*/, NV503C_CTRL_REGISTER_PID_PARAMS *); // exported (id=0x503c0106) + NV_STATUS (*__thirdpartyp2pControl__)(struct ThirdPartyP2P * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__thirdpartyp2pMap__)(struct ThirdPartyP2P * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__thirdpartyp2pUnmap__)(struct ThirdPartyP2P * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__thirdpartyp2pShareCallback__)(struct ThirdPartyP2P * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__thirdpartyp2pGetRegBaseOffsetAndSize__)(struct ThirdPartyP2P * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__thirdpartyp2pGetMapAddrSpace__)(struct ThirdPartyP2P * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__thirdpartyp2pInternalControlForward__)(struct ThirdPartyP2P * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__thirdpartyp2pGetInternalObjectHandle__)(struct ThirdPartyP2P * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__thirdpartyp2pAccessCallback__)(struct ThirdPartyP2P * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__thirdpartyp2pGetMemInterMapParams__)(struct ThirdPartyP2P * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__thirdpartyp2pCheckMemInterUnmap__)(struct ThirdPartyP2P * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__thirdpartyp2pGetMemoryMappingDescriptor__)(struct ThirdPartyP2P * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__thirdpartyp2pControlSerialization_Prologue__)(struct ThirdPartyP2P * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__thirdpartyp2pControlSerialization_Epilogue__)(struct ThirdPartyP2P * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__thirdpartyp2pControl_Prologue__)(struct ThirdPartyP2P * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__thirdpartyp2pControl_Epilogue__)(struct ThirdPartyP2P * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__thirdpartyp2pCanCopy__)(struct ThirdPartyP2P * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__thirdpartyp2pIsDuplicate__)(struct ThirdPartyP2P * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__thirdpartyp2pPreDestruct__)(struct ThirdPartyP2P * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__thirdpartyp2pControlFilter__)(struct ThirdPartyP2P * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__thirdpartyp2pIsPartialUnmapSupported__)(struct ThirdPartyP2P * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__thirdpartyp2pMapTo__)(struct ThirdPartyP2P * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__thirdpartyp2pUnmapFrom__)(struct ThirdPartyP2P * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__thirdpartyp2pGetRefCount__)(struct ThirdPartyP2P * /*this*/); // virtual inherited (res) base (gpures) + void (*__thirdpartyp2pAddAdditionalDependants__)(struct RsClient *, struct ThirdPartyP2P * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members NODE Node; NvHandle hClient; NvHandle hThirdPartyP2P; @@ -328,6 +363,7 @@ typedef struct ThirdPartyP2P ThirdPartyP2P; #define __nvoc_class_id_ThirdPartyP2P 0x34d08b #endif /* __nvoc_class_id_ThirdPartyP2P */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_ThirdPartyP2P; #define __staticCast_ThirdPartyP2P(pThis) \ @@ -340,173 +376,206 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_ThirdPartyP2P; ((ThirdPartyP2P*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(ThirdPartyP2P))) #endif //__nvoc_third_party_p2p_h_disabled - NV_STATUS __nvoc_objCreateDynamic_ThirdPartyP2P(ThirdPartyP2P**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_ThirdPartyP2P(ThirdPartyP2P**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_ThirdPartyP2P(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_ThirdPartyP2P((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define thirdpartyp2pCtrlCmdRegisterVaSpace_FNPTR(pThirdPartyP2P) pThirdPartyP2P->__thirdpartyp2pCtrlCmdRegisterVaSpace__ #define thirdpartyp2pCtrlCmdRegisterVaSpace(pThirdPartyP2P, pRegisterVaSpaceParams) thirdpartyp2pCtrlCmdRegisterVaSpace_DISPATCH(pThirdPartyP2P, pRegisterVaSpaceParams) +#define thirdpartyp2pCtrlCmdUnregisterVaSpace_FNPTR(pThirdPartyP2P) pThirdPartyP2P->__thirdpartyp2pCtrlCmdUnregisterVaSpace__ #define thirdpartyp2pCtrlCmdUnregisterVaSpace(pThirdPartyP2P, pUnregisterVaSpaceParams) thirdpartyp2pCtrlCmdUnregisterVaSpace_DISPATCH(pThirdPartyP2P, pUnregisterVaSpaceParams) +#define thirdpartyp2pCtrlCmdRegisterVidmem_FNPTR(pThirdPartyP2P) pThirdPartyP2P->__thirdpartyp2pCtrlCmdRegisterVidmem__ #define thirdpartyp2pCtrlCmdRegisterVidmem(pThirdPartyP2P, pRegisterVidmemParams) thirdpartyp2pCtrlCmdRegisterVidmem_DISPATCH(pThirdPartyP2P, pRegisterVidmemParams) +#define thirdpartyp2pCtrlCmdUnregisterVidmem_FNPTR(pThirdPartyP2P) pThirdPartyP2P->__thirdpartyp2pCtrlCmdUnregisterVidmem__ #define thirdpartyp2pCtrlCmdUnregisterVidmem(pThirdPartyP2P, pUnregisterVidmemParams) thirdpartyp2pCtrlCmdUnregisterVidmem_DISPATCH(pThirdPartyP2P, pUnregisterVidmemParams) +#define thirdpartyp2pCtrlCmdRegisterPid_FNPTR(pThirdPartyP2P) pThirdPartyP2P->__thirdpartyp2pCtrlCmdRegisterPid__ #define thirdpartyp2pCtrlCmdRegisterPid(pThirdPartyP2P, pParams) thirdpartyp2pCtrlCmdRegisterPid_DISPATCH(pThirdPartyP2P, pParams) +#define thirdpartyp2pControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define thirdpartyp2pControl(pGpuResource, pCallContext, pParams) thirdpartyp2pControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define thirdpartyp2pMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define thirdpartyp2pMap(pGpuResource, pCallContext, pParams, pCpuMapping) thirdpartyp2pMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define thirdpartyp2pUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define thirdpartyp2pUnmap(pGpuResource, pCallContext, pCpuMapping) thirdpartyp2pUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define thirdpartyp2pShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define thirdpartyp2pShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) thirdpartyp2pShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define thirdpartyp2pCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) thirdpartyp2pCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define thirdpartyp2pMapTo(pResource, pParams) thirdpartyp2pMapTo_DISPATCH(pResource, pParams) -#define thirdpartyp2pGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) thirdpartyp2pGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define thirdpartyp2pGetRefCount(pResource) thirdpartyp2pGetRefCount_DISPATCH(pResource) -#define thirdpartyp2pAddAdditionalDependants(pClient, pResource, pReference) thirdpartyp2pAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define thirdpartyp2pControl_Prologue(pResource, pCallContext, pParams) thirdpartyp2pControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define thirdpartyp2pGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define thirdpartyp2pGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) thirdpartyp2pGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define thirdpartyp2pGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define thirdpartyp2pGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) thirdpartyp2pGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define thirdpartyp2pInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define thirdpartyp2pInternalControlForward(pGpuResource, command, pParams, size) thirdpartyp2pInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define thirdpartyp2pUnmapFrom(pResource, pParams) thirdpartyp2pUnmapFrom_DISPATCH(pResource, pParams) -#define thirdpartyp2pControl_Epilogue(pResource, pCallContext, pParams) thirdpartyp2pControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define thirdpartyp2pGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define thirdpartyp2pGetInternalObjectHandle(pGpuResource) thirdpartyp2pGetInternalObjectHandle_DISPATCH(pGpuResource) -#define thirdpartyp2pControl(pGpuResource, pCallContext, pParams) thirdpartyp2pControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define thirdpartyp2pUnmap(pGpuResource, pCallContext, pCpuMapping) thirdpartyp2pUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define thirdpartyp2pAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define thirdpartyp2pAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) thirdpartyp2pAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define thirdpartyp2pGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define thirdpartyp2pGetMemInterMapParams(pRmResource, pParams) thirdpartyp2pGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define thirdpartyp2pCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define thirdpartyp2pCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) thirdpartyp2pCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define thirdpartyp2pGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define thirdpartyp2pGetMemoryMappingDescriptor(pRmResource, ppMemDesc) thirdpartyp2pGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define thirdpartyp2pControlFilter(pResource, pCallContext, pParams) thirdpartyp2pControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define thirdpartyp2pControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define thirdpartyp2pControlSerialization_Prologue(pResource, pCallContext, pParams) thirdpartyp2pControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define thirdpartyp2pControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define thirdpartyp2pControlSerialization_Epilogue(pResource, pCallContext, pParams) thirdpartyp2pControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define thirdpartyp2pControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define thirdpartyp2pControl_Prologue(pResource, pCallContext, pParams) thirdpartyp2pControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define thirdpartyp2pControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define thirdpartyp2pControl_Epilogue(pResource, pCallContext, pParams) thirdpartyp2pControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define thirdpartyp2pCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define thirdpartyp2pCanCopy(pResource) thirdpartyp2pCanCopy_DISPATCH(pResource) -#define thirdpartyp2pIsPartialUnmapSupported(pResource) thirdpartyp2pIsPartialUnmapSupported_DISPATCH(pResource) -#define thirdpartyp2pPreDestruct(pResource) thirdpartyp2pPreDestruct_DISPATCH(pResource) +#define thirdpartyp2pIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define thirdpartyp2pIsDuplicate(pResource, hMemory, pDuplicate) thirdpartyp2pIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define thirdpartyp2pControlSerialization_Epilogue(pResource, pCallContext, pParams) thirdpartyp2pControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define thirdpartyp2pMap(pGpuResource, pCallContext, pParams, pCpuMapping) thirdpartyp2pMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define thirdpartyp2pAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) thirdpartyp2pAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS thirdpartyp2pCtrlCmdRegisterVaSpace_IMPL(struct ThirdPartyP2P *pThirdPartyP2P, NV503C_CTRL_REGISTER_VA_SPACE_PARAMS *pRegisterVaSpaceParams); +#define thirdpartyp2pPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define thirdpartyp2pPreDestruct(pResource) thirdpartyp2pPreDestruct_DISPATCH(pResource) +#define thirdpartyp2pControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define thirdpartyp2pControlFilter(pResource, pCallContext, pParams) thirdpartyp2pControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define thirdpartyp2pIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define thirdpartyp2pIsPartialUnmapSupported(pResource) thirdpartyp2pIsPartialUnmapSupported_DISPATCH(pResource) +#define thirdpartyp2pMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define thirdpartyp2pMapTo(pResource, pParams) thirdpartyp2pMapTo_DISPATCH(pResource, pParams) +#define thirdpartyp2pUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define thirdpartyp2pUnmapFrom(pResource, pParams) thirdpartyp2pUnmapFrom_DISPATCH(pResource, pParams) +#define thirdpartyp2pGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define thirdpartyp2pGetRefCount(pResource) thirdpartyp2pGetRefCount_DISPATCH(pResource) +#define thirdpartyp2pAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define thirdpartyp2pAddAdditionalDependants(pClient, pResource, pReference) thirdpartyp2pAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS thirdpartyp2pCtrlCmdRegisterVaSpace_DISPATCH(struct ThirdPartyP2P *pThirdPartyP2P, NV503C_CTRL_REGISTER_VA_SPACE_PARAMS *pRegisterVaSpaceParams) { return pThirdPartyP2P->__thirdpartyp2pCtrlCmdRegisterVaSpace__(pThirdPartyP2P, pRegisterVaSpaceParams); } -NV_STATUS thirdpartyp2pCtrlCmdUnregisterVaSpace_IMPL(struct ThirdPartyP2P *pThirdPartyP2P, NV503C_CTRL_UNREGISTER_VA_SPACE_PARAMS *pUnregisterVaSpaceParams); - static inline NV_STATUS thirdpartyp2pCtrlCmdUnregisterVaSpace_DISPATCH(struct ThirdPartyP2P *pThirdPartyP2P, NV503C_CTRL_UNREGISTER_VA_SPACE_PARAMS *pUnregisterVaSpaceParams) { return pThirdPartyP2P->__thirdpartyp2pCtrlCmdUnregisterVaSpace__(pThirdPartyP2P, pUnregisterVaSpaceParams); } -NV_STATUS thirdpartyp2pCtrlCmdRegisterVidmem_IMPL(struct ThirdPartyP2P *pThirdPartyP2P, NV503C_CTRL_REGISTER_VIDMEM_PARAMS *pRegisterVidmemParams); - static inline NV_STATUS thirdpartyp2pCtrlCmdRegisterVidmem_DISPATCH(struct ThirdPartyP2P *pThirdPartyP2P, NV503C_CTRL_REGISTER_VIDMEM_PARAMS *pRegisterVidmemParams) { return pThirdPartyP2P->__thirdpartyp2pCtrlCmdRegisterVidmem__(pThirdPartyP2P, pRegisterVidmemParams); } -NV_STATUS thirdpartyp2pCtrlCmdUnregisterVidmem_IMPL(struct ThirdPartyP2P *pThirdPartyP2P, NV503C_CTRL_UNREGISTER_VIDMEM_PARAMS *pUnregisterVidmemParams); - static inline NV_STATUS thirdpartyp2pCtrlCmdUnregisterVidmem_DISPATCH(struct ThirdPartyP2P *pThirdPartyP2P, NV503C_CTRL_UNREGISTER_VIDMEM_PARAMS *pUnregisterVidmemParams) { return pThirdPartyP2P->__thirdpartyp2pCtrlCmdUnregisterVidmem__(pThirdPartyP2P, pUnregisterVidmemParams); } -NV_STATUS thirdpartyp2pCtrlCmdRegisterPid_IMPL(struct ThirdPartyP2P *pThirdPartyP2P, NV503C_CTRL_REGISTER_PID_PARAMS *pParams); - static inline NV_STATUS thirdpartyp2pCtrlCmdRegisterPid_DISPATCH(struct ThirdPartyP2P *pThirdPartyP2P, NV503C_CTRL_REGISTER_PID_PARAMS *pParams) { return pThirdPartyP2P->__thirdpartyp2pCtrlCmdRegisterPid__(pThirdPartyP2P, pParams); } -static inline NvBool thirdpartyp2pShareCallback_DISPATCH(struct ThirdPartyP2P *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__thirdpartyp2pShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS thirdpartyp2pCheckMemInterUnmap_DISPATCH(struct ThirdPartyP2P *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__thirdpartyp2pCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); -} - -static inline NV_STATUS thirdpartyp2pMapTo_DISPATCH(struct ThirdPartyP2P *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__thirdpartyp2pMapTo__(pResource, pParams); -} - -static inline NV_STATUS thirdpartyp2pGetMapAddrSpace_DISPATCH(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__thirdpartyp2pGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +static inline NV_STATUS thirdpartyp2pControl_DISPATCH(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__thirdpartyp2pControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 thirdpartyp2pGetRefCount_DISPATCH(struct ThirdPartyP2P *pResource) { - return pResource->__thirdpartyp2pGetRefCount__(pResource); +static inline NV_STATUS thirdpartyp2pMap_DISPATCH(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__thirdpartyp2pMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void thirdpartyp2pAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ThirdPartyP2P *pResource, RsResourceRef *pReference) { - pResource->__thirdpartyp2pAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS thirdpartyp2pUnmap_DISPATCH(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__thirdpartyp2pUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS thirdpartyp2pControl_Prologue_DISPATCH(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__thirdpartyp2pControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool thirdpartyp2pShareCallback_DISPATCH(struct ThirdPartyP2P *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__thirdpartyp2pShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS thirdpartyp2pGetRegBaseOffsetAndSize_DISPATCH(struct ThirdPartyP2P *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__thirdpartyp2pGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS thirdpartyp2pInternalControlForward_DISPATCH(struct ThirdPartyP2P *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__thirdpartyp2pInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS thirdpartyp2pUnmapFrom_DISPATCH(struct ThirdPartyP2P *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__thirdpartyp2pUnmapFrom__(pResource, pParams); +static inline NV_STATUS thirdpartyp2pGetMapAddrSpace_DISPATCH(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__thirdpartyp2pGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void thirdpartyp2pControl_Epilogue_DISPATCH(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__thirdpartyp2pControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS thirdpartyp2pInternalControlForward_DISPATCH(struct ThirdPartyP2P *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__thirdpartyp2pInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle thirdpartyp2pGetInternalObjectHandle_DISPATCH(struct ThirdPartyP2P *pGpuResource) { return pGpuResource->__thirdpartyp2pGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS thirdpartyp2pControl_DISPATCH(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__thirdpartyp2pControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS thirdpartyp2pUnmap_DISPATCH(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__thirdpartyp2pUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool thirdpartyp2pAccessCallback_DISPATCH(struct ThirdPartyP2P *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__thirdpartyp2pAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS thirdpartyp2pGetMemInterMapParams_DISPATCH(struct ThirdPartyP2P *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__thirdpartyp2pGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS thirdpartyp2pGetMemoryMappingDescriptor_DISPATCH(struct ThirdPartyP2P *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__thirdpartyp2pGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS thirdpartyp2pCheckMemInterUnmap_DISPATCH(struct ThirdPartyP2P *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__thirdpartyp2pCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS thirdpartyp2pControlFilter_DISPATCH(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__thirdpartyp2pControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS thirdpartyp2pGetMemoryMappingDescriptor_DISPATCH(struct ThirdPartyP2P *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__thirdpartyp2pGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS thirdpartyp2pControlSerialization_Prologue_DISPATCH(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__thirdpartyp2pControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void thirdpartyp2pControlSerialization_Epilogue_DISPATCH(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__thirdpartyp2pControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS thirdpartyp2pControl_Prologue_DISPATCH(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__thirdpartyp2pControl_Prologue__(pResource, pCallContext, pParams); +} + +static inline void thirdpartyp2pControl_Epilogue_DISPATCH(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__thirdpartyp2pControl_Epilogue__(pResource, pCallContext, pParams); +} + static inline NvBool thirdpartyp2pCanCopy_DISPATCH(struct ThirdPartyP2P *pResource) { return pResource->__thirdpartyp2pCanCopy__(pResource); } -static inline NvBool thirdpartyp2pIsPartialUnmapSupported_DISPATCH(struct ThirdPartyP2P *pResource) { - return pResource->__thirdpartyp2pIsPartialUnmapSupported__(pResource); +static inline NV_STATUS thirdpartyp2pIsDuplicate_DISPATCH(struct ThirdPartyP2P *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__thirdpartyp2pIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void thirdpartyp2pPreDestruct_DISPATCH(struct ThirdPartyP2P *pResource) { pResource->__thirdpartyp2pPreDestruct__(pResource); } -static inline NV_STATUS thirdpartyp2pIsDuplicate_DISPATCH(struct ThirdPartyP2P *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__thirdpartyp2pIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS thirdpartyp2pControlFilter_DISPATCH(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__thirdpartyp2pControlFilter__(pResource, pCallContext, pParams); } -static inline void thirdpartyp2pControlSerialization_Epilogue_DISPATCH(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__thirdpartyp2pControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool thirdpartyp2pIsPartialUnmapSupported_DISPATCH(struct ThirdPartyP2P *pResource) { + return pResource->__thirdpartyp2pIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS thirdpartyp2pMap_DISPATCH(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__thirdpartyp2pMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS thirdpartyp2pMapTo_DISPATCH(struct ThirdPartyP2P *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__thirdpartyp2pMapTo__(pResource, pParams); } -static inline NvBool thirdpartyp2pAccessCallback_DISPATCH(struct ThirdPartyP2P *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__thirdpartyp2pAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS thirdpartyp2pUnmapFrom_DISPATCH(struct ThirdPartyP2P *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__thirdpartyp2pUnmapFrom__(pResource, pParams); +} + +static inline NvU32 thirdpartyp2pGetRefCount_DISPATCH(struct ThirdPartyP2P *pResource) { + return pResource->__thirdpartyp2pGetRefCount__(pResource); +} + +static inline void thirdpartyp2pAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ThirdPartyP2P *pResource, RsResourceRef *pReference) { + pResource->__thirdpartyp2pAddAdditionalDependants__(pClient, pResource, pReference); } +NV_STATUS thirdpartyp2pCtrlCmdRegisterVaSpace_IMPL(struct ThirdPartyP2P *pThirdPartyP2P, NV503C_CTRL_REGISTER_VA_SPACE_PARAMS *pRegisterVaSpaceParams); + +NV_STATUS thirdpartyp2pCtrlCmdUnregisterVaSpace_IMPL(struct ThirdPartyP2P *pThirdPartyP2P, NV503C_CTRL_UNREGISTER_VA_SPACE_PARAMS *pUnregisterVaSpaceParams); + +NV_STATUS thirdpartyp2pCtrlCmdRegisterVidmem_IMPL(struct ThirdPartyP2P *pThirdPartyP2P, NV503C_CTRL_REGISTER_VIDMEM_PARAMS *pRegisterVidmemParams); + +NV_STATUS thirdpartyp2pCtrlCmdUnregisterVidmem_IMPL(struct ThirdPartyP2P *pThirdPartyP2P, NV503C_CTRL_UNREGISTER_VIDMEM_PARAMS *pUnregisterVidmemParams); + +NV_STATUS thirdpartyp2pCtrlCmdRegisterPid_IMPL(struct ThirdPartyP2P *pThirdPartyP2P, NV503C_CTRL_REGISTER_PID_PARAMS *pParams); + NV_STATUS thirdpartyp2pConstruct_IMPL(struct ThirdPartyP2P *arg_pResource, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_thirdpartyp2pConstruct(arg_pResource, arg_pCallContext, arg_pParams) thirdpartyp2pConstruct_IMPL(arg_pResource, arg_pCallContext, arg_pParams) @@ -557,15 +626,15 @@ static inline NV_STATUS thirdpartyp2pGetVASpaceInfoFromToken(struct ThirdPartyP2 #define thirdpartyp2pGetVASpaceInfoFromToken(pThirdPartyP2P, vaSpaceToken, ppVASpaceInfo) thirdpartyp2pGetVASpaceInfoFromToken_IMPL(pThirdPartyP2P, vaSpaceToken, ppVASpaceInfo) #endif //__nvoc_third_party_p2p_h_disabled -NV_STATUS thirdpartyp2pGetNextVASpaceInfo_IMPL(struct ThirdPartyP2P *pThirdPartyP2P, PCLI_THIRD_PARTY_P2P_VASPACE_INFO *arg0); +NV_STATUS thirdpartyp2pGetNextVASpaceInfo_IMPL(struct ThirdPartyP2P *pThirdPartyP2P, PCLI_THIRD_PARTY_P2P_VASPACE_INFO *arg2); #ifdef __nvoc_third_party_p2p_h_disabled -static inline NV_STATUS thirdpartyp2pGetNextVASpaceInfo(struct ThirdPartyP2P *pThirdPartyP2P, PCLI_THIRD_PARTY_P2P_VASPACE_INFO *arg0) { +static inline NV_STATUS thirdpartyp2pGetNextVASpaceInfo(struct ThirdPartyP2P *pThirdPartyP2P, PCLI_THIRD_PARTY_P2P_VASPACE_INFO *arg2) { NV_ASSERT_FAILED_PRECOMP("ThirdPartyP2P was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_third_party_p2p_h_disabled -#define thirdpartyp2pGetNextVASpaceInfo(pThirdPartyP2P, arg0) thirdpartyp2pGetNextVASpaceInfo_IMPL(pThirdPartyP2P, arg0) +#define thirdpartyp2pGetNextVASpaceInfo(pThirdPartyP2P, arg2) thirdpartyp2pGetNextVASpaceInfo_IMPL(pThirdPartyP2P, arg2) #endif //__nvoc_third_party_p2p_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_timed_sema_nvoc.c b/src/nvidia/generated/g_timed_sema_nvoc.c index 167554140b..2505c6c9a3 100644 --- a/src/nvidia/generated/g_timed_sema_nvoc.c +++ b/src/nvidia/generated/g_timed_sema_nvoc.c @@ -31,7 +31,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_ChannelDescendant; void __nvoc_init_TimedSemaSwObject(TimedSemaSwObject*, RmHalspecOwner* ); void __nvoc_init_funcTable_TimedSemaSwObject(TimedSemaSwObject*); -NV_STATUS __nvoc_ctor_TimedSemaSwObject(TimedSemaSwObject*, RmHalspecOwner* , struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); +NV_STATUS __nvoc_ctor_TimedSemaSwObject(TimedSemaSwObject*, RmHalspecOwner* , CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); void __nvoc_init_dataField_TimedSemaSwObject(TimedSemaSwObject*); void __nvoc_dtor_TimedSemaSwObject(TimedSemaSwObject*); extern const struct NVOC_EXPORT_INFO __nvoc_export_info_TimedSemaSwObject; @@ -120,187 +120,225 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_TimedSemaSwObject = /*pExportInfo=*/ &__nvoc_export_info_TimedSemaSwObject }; -static NV_STATUS __nvoc_thunk_TimedSemaSwObject_chandesGetSwMethods(struct ChannelDescendant *pTimedSemSw, const METHOD **ppMethods, NvU32 *pNumMethods) { - return tsemaGetSwMethods((struct TimedSemaSwObject *)(((unsigned char *)pTimedSemSw) - __nvoc_rtti_TimedSemaSwObject_ChannelDescendant.offset), ppMethods, pNumMethods); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NV_STATUS __nvoc_thunk_ChannelDescendant_tsemaCheckMemInterUnmap(struct TimedSemaSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_TimedSemaSwObject_ChannelDescendant.offset), bSubdeviceHandleProvided); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_TimedSemaSwObject[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) tsemaCtrlCmdFlush_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x90740101u, + /*paramSize=*/ sizeof(NV9074_CTRL_CMD_FLUSH_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_TimedSemaSwObject.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "tsemaCtrlCmdFlush" +#endif + }, + { /* [1] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) tsemaCtrlCmdGetTime_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x90740102u, + /*paramSize=*/ sizeof(NV9074_CTRL_CMD_GET_TIME_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_TimedSemaSwObject.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "tsemaCtrlCmdGetTime" +#endif + }, + { /* [2] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) tsemaCtrlCmdRelease_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x90740103u, + /*paramSize=*/ sizeof(NV9074_CTRL_CMD_RELEASE_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_TimedSemaSwObject.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "tsemaCtrlCmdRelease" +#endif + }, + +}; -static NvBool __nvoc_thunk_GpuResource_tsemaShareCallback(struct TimedSemaSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// 1 down-thunk(s) defined to bridge methods in TimedSemaSwObject from superclasses + +// tsemaGetSwMethods: virtual override (chandes) base (chandes) +static NV_STATUS __nvoc_down_thunk_TimedSemaSwObject_chandesGetSwMethods(struct ChannelDescendant *pTimedSemSw, const METHOD **ppMethods, NvU32 *pNumMethods) { + return tsemaGetSwMethods((struct TimedSemaSwObject *)(((unsigned char *) pTimedSemSw) - __nvoc_rtti_TimedSemaSwObject_ChannelDescendant.offset), ppMethods, pNumMethods); } -static NvBool __nvoc_thunk_RmResource_tsemaAccessCallback(struct TimedSemaSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), pInvokingClient, pAllocParams, accessRight); + +// 31 up-thunk(s) defined to bridge methods in TimedSemaSwObject to superclasses + +// tsemaIsSwMethodStalling: virtual inherited (chandes) base (chandes) +static NvBool __nvoc_up_thunk_ChannelDescendant_tsemaIsSwMethodStalling(struct TimedSemaSwObject *pChannelDescendant, NvU32 hHandle) { + return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_TimedSemaSwObject_ChannelDescendant.offset), hHandle); } -static NV_STATUS __nvoc_thunk_RsResource_tsemaMapTo(struct TimedSemaSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset), pParams); +// tsemaCheckMemInterUnmap: virtual inherited (chandes) base (chandes) +static NV_STATUS __nvoc_up_thunk_ChannelDescendant_tsemaCheckMemInterUnmap(struct TimedSemaSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { + return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_TimedSemaSwObject_ChannelDescendant.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_GpuResource_tsemaGetMapAddrSpace(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// tsemaControl: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_tsemaControl(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_Notifier_tsemaSetNotificationShare(struct TimedSemaSwObject *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_TimedSemaSwObject_Notifier.offset), pNotifShare); +// tsemaMap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_tsemaMap(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_tsemaGetRefCount(struct TimedSemaSwObject *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset)); +// tsemaUnmap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_tsemaUnmap(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_RsResource_tsemaAddAdditionalDependants(struct RsClient *pClient, struct TimedSemaSwObject *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset), pReference); +// tsemaShareCallback: virtual inherited (gpures) base (chandes) +static NvBool __nvoc_up_thunk_GpuResource_tsemaShareCallback(struct TimedSemaSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RmResource_tsemaControl_Prologue(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), pCallContext, pParams); +// tsemaGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_tsemaGetRegBaseOffsetAndSize(struct TimedSemaSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_GpuResource_tsemaGetRegBaseOffsetAndSize(struct TimedSemaSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), pGpu, pOffset, pSize); +// tsemaGetMapAddrSpace: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_tsemaGetMapAddrSpace(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_GpuResource_tsemaInternalControlForward(struct TimedSemaSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), command, pParams, size); +// tsemaInternalControlForward: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_tsemaInternalControlForward(struct TimedSemaSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_RsResource_tsemaUnmapFrom(struct TimedSemaSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset), pParams); +// tsemaGetInternalObjectHandle: virtual inherited (gpures) base (chandes) +static NvHandle __nvoc_up_thunk_GpuResource_tsemaGetInternalObjectHandle(struct TimedSemaSwObject *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset)); } -static void __nvoc_thunk_RmResource_tsemaControl_Epilogue(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), pCallContext, pParams); +// tsemaAccessCallback: virtual inherited (rmres) base (chandes) +static NvBool __nvoc_up_thunk_RmResource_tsemaAccessCallback(struct TimedSemaSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NvHandle __nvoc_thunk_GpuResource_tsemaGetInternalObjectHandle(struct TimedSemaSwObject *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset)); +// tsemaGetMemInterMapParams: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_tsemaGetMemInterMapParams(struct TimedSemaSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_tsemaControl(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), pCallContext, pParams); +// tsemaGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_tsemaGetMemoryMappingDescriptor(struct TimedSemaSwObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_GpuResource_tsemaUnmap(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), pCallContext, pCpuMapping); +// tsemaControlSerialization_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_tsemaControlSerialization_Prologue(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_tsemaGetMemInterMapParams(struct TimedSemaSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), pParams); +// tsemaControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_tsemaControlSerialization_Epilogue(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_tsemaGetMemoryMappingDescriptor(struct TimedSemaSwObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), ppMemDesc); +// tsemaControl_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_tsemaControl_Prologue(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_ChannelDescendant_tsemaIsSwMethodStalling(struct TimedSemaSwObject *pChannelDescendant, NvU32 hHandle) { - return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_TimedSemaSwObject_ChannelDescendant.offset), hHandle); +// tsemaControl_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_tsemaControl_Epilogue(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_tsemaControlFilter(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset), pCallContext, pParams); +// tsemaCanCopy: virtual inherited (res) base (chandes) +static NvBool __nvoc_up_thunk_RsResource_tsemaCanCopy(struct TimedSemaSwObject *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_tsemaUnregisterEvent(struct TimedSemaSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_TimedSemaSwObject_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// tsemaIsDuplicate: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_tsemaIsDuplicate(struct TimedSemaSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RmResource_tsemaControlSerialization_Prologue(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), pCallContext, pParams); +// tsemaPreDestruct: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_tsemaPreDestruct(struct TimedSemaSwObject *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_tsemaCanCopy(struct TimedSemaSwObject *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset)); +// tsemaControlFilter: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_tsemaControlFilter(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_tsemaIsPartialUnmapSupported(struct TimedSemaSwObject *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset)); +// tsemaIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body +static NvBool __nvoc_up_thunk_RsResource_tsemaIsPartialUnmapSupported(struct TimedSemaSwObject *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset)); } -static void __nvoc_thunk_RsResource_tsemaPreDestruct(struct TimedSemaSwObject *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset)); +// tsemaMapTo: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_tsemaMapTo(struct TimedSemaSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_tsemaIsDuplicate(struct TimedSemaSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset), hMemory, pDuplicate); +// tsemaUnmapFrom: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_tsemaUnmapFrom(struct TimedSemaSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_tsemaControlSerialization_Epilogue(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), pCallContext, pParams); +// tsemaGetRefCount: virtual inherited (res) base (chandes) +static NvU32 __nvoc_up_thunk_RsResource_tsemaGetRefCount(struct TimedSemaSwObject *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset)); } -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_tsemaGetNotificationListPtr(struct TimedSemaSwObject *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_TimedSemaSwObject_Notifier.offset)); +// tsemaAddAdditionalDependants: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_tsemaAddAdditionalDependants(struct RsClient *pClient, struct TimedSemaSwObject *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset), pReference); } -static struct NotifShare *__nvoc_thunk_Notifier_tsemaGetNotificationShare(struct TimedSemaSwObject *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_TimedSemaSwObject_Notifier.offset)); +// tsemaGetNotificationListPtr: virtual inherited (notify) base (chandes) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_tsemaGetNotificationListPtr(struct TimedSemaSwObject *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_TimedSemaSwObject_Notifier.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_tsemaMap(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// tsemaGetNotificationShare: virtual inherited (notify) base (chandes) +static struct NotifShare * __nvoc_up_thunk_Notifier_tsemaGetNotificationShare(struct TimedSemaSwObject *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_TimedSemaSwObject_Notifier.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_tsemaGetOrAllocNotifShare(struct TimedSemaSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_TimedSemaSwObject_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +// tsemaSetNotificationShare: virtual inherited (notify) base (chandes) +static void __nvoc_up_thunk_Notifier_tsemaSetNotificationShare(struct TimedSemaSwObject *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_TimedSemaSwObject_Notifier.offset), pNotifShare); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// tsemaUnregisterEvent: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_tsemaUnregisterEvent(struct TimedSemaSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_TimedSemaSwObject_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_TimedSemaSwObject[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) tsemaCtrlCmdFlush_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x90740101u, - /*paramSize=*/ sizeof(NV9074_CTRL_CMD_FLUSH_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_TimedSemaSwObject.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "tsemaCtrlCmdFlush" -#endif - }, - { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) tsemaCtrlCmdGetTime_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x90740102u, - /*paramSize=*/ sizeof(NV9074_CTRL_CMD_GET_TIME_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_TimedSemaSwObject.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "tsemaCtrlCmdGetTime" -#endif - }, - { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) tsemaCtrlCmdRelease_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x90740103u, - /*paramSize=*/ sizeof(NV9074_CTRL_CMD_RELEASE_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_TimedSemaSwObject.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "tsemaCtrlCmdRelease" -#endif - }, +// tsemaGetOrAllocNotifShare: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_tsemaGetOrAllocNotifShare(struct TimedSemaSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_TimedSemaSwObject_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_TimedSemaSwObject = { @@ -319,8 +357,8 @@ void __nvoc_init_dataField_TimedSemaSwObject(TimedSemaSwObject *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); } -NV_STATUS __nvoc_ctor_ChannelDescendant(ChannelDescendant* , RmHalspecOwner* , struct CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *, PARAM_TO_ENGDESC_FUNCTION *); -NV_STATUS __nvoc_ctor_TimedSemaSwObject(TimedSemaSwObject *pThis, RmHalspecOwner *pRmhalspecowner, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams) { +NV_STATUS __nvoc_ctor_ChannelDescendant(ChannelDescendant* , RmHalspecOwner* , CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *, PARAM_TO_ENGDESC_FUNCTION *); +NV_STATUS __nvoc_ctor_TimedSemaSwObject(TimedSemaSwObject *pThis, RmHalspecOwner *pRmhalspecowner, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams) { NV_STATUS status = NV_OK; status = __nvoc_ctor_ChannelDescendant(&pThis->__nvoc_base_ChannelDescendant, pRmhalspecowner, arg_pCallContext, arg_pParams, ((void *)0)); if (status != NV_OK) goto __nvoc_ctor_TimedSemaSwObject_fail_ChannelDescendant; @@ -338,89 +376,128 @@ NV_STATUS __nvoc_ctor_TimedSemaSwObject(TimedSemaSwObject *pThis, RmHalspecOwner return status; } +// Vtable initialization static void __nvoc_init_funcTable_TimedSemaSwObject_1(TimedSemaSwObject *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // tsemaGetSwMethods -- virtual override (chandes) base (chandes) pThis->__tsemaGetSwMethods__ = &tsemaGetSwMethods_IMPL; + pThis->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ = &__nvoc_down_thunk_TimedSemaSwObject_chandesGetSwMethods; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // tsemaCtrlCmdFlush -- exported (id=0x90740101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__tsemaCtrlCmdFlush__ = &tsemaCtrlCmdFlush_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // tsemaCtrlCmdGetTime -- exported (id=0x90740102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__tsemaCtrlCmdGetTime__ = &tsemaCtrlCmdGetTime_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // tsemaCtrlCmdRelease -- exported (id=0x90740103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__tsemaCtrlCmdRelease__ = &tsemaCtrlCmdRelease_IMPL; #endif - pThis->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ = &__nvoc_thunk_TimedSemaSwObject_chandesGetSwMethods; + // tsemaIsSwMethodStalling -- virtual inherited (chandes) base (chandes) + pThis->__tsemaIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_tsemaIsSwMethodStalling; - pThis->__tsemaCheckMemInterUnmap__ = &__nvoc_thunk_ChannelDescendant_tsemaCheckMemInterUnmap; + // tsemaCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) + pThis->__tsemaCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_tsemaCheckMemInterUnmap; - pThis->__tsemaShareCallback__ = &__nvoc_thunk_GpuResource_tsemaShareCallback; + // tsemaControl -- virtual inherited (gpures) base (chandes) + pThis->__tsemaControl__ = &__nvoc_up_thunk_GpuResource_tsemaControl; - pThis->__tsemaAccessCallback__ = &__nvoc_thunk_RmResource_tsemaAccessCallback; + // tsemaMap -- virtual inherited (gpures) base (chandes) + pThis->__tsemaMap__ = &__nvoc_up_thunk_GpuResource_tsemaMap; - pThis->__tsemaMapTo__ = &__nvoc_thunk_RsResource_tsemaMapTo; + // tsemaUnmap -- virtual inherited (gpures) base (chandes) + pThis->__tsemaUnmap__ = &__nvoc_up_thunk_GpuResource_tsemaUnmap; - pThis->__tsemaGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_tsemaGetMapAddrSpace; + // tsemaShareCallback -- virtual inherited (gpures) base (chandes) + pThis->__tsemaShareCallback__ = &__nvoc_up_thunk_GpuResource_tsemaShareCallback; - pThis->__tsemaSetNotificationShare__ = &__nvoc_thunk_Notifier_tsemaSetNotificationShare; + // tsemaGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) + pThis->__tsemaGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_tsemaGetRegBaseOffsetAndSize; - pThis->__tsemaGetRefCount__ = &__nvoc_thunk_RsResource_tsemaGetRefCount; + // tsemaGetMapAddrSpace -- virtual inherited (gpures) base (chandes) + pThis->__tsemaGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_tsemaGetMapAddrSpace; - pThis->__tsemaAddAdditionalDependants__ = &__nvoc_thunk_RsResource_tsemaAddAdditionalDependants; + // tsemaInternalControlForward -- virtual inherited (gpures) base (chandes) + pThis->__tsemaInternalControlForward__ = &__nvoc_up_thunk_GpuResource_tsemaInternalControlForward; - pThis->__tsemaControl_Prologue__ = &__nvoc_thunk_RmResource_tsemaControl_Prologue; + // tsemaGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) + pThis->__tsemaGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_tsemaGetInternalObjectHandle; - pThis->__tsemaGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_tsemaGetRegBaseOffsetAndSize; + // tsemaAccessCallback -- virtual inherited (rmres) base (chandes) + pThis->__tsemaAccessCallback__ = &__nvoc_up_thunk_RmResource_tsemaAccessCallback; - pThis->__tsemaInternalControlForward__ = &__nvoc_thunk_GpuResource_tsemaInternalControlForward; + // tsemaGetMemInterMapParams -- virtual inherited (rmres) base (chandes) + pThis->__tsemaGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_tsemaGetMemInterMapParams; - pThis->__tsemaUnmapFrom__ = &__nvoc_thunk_RsResource_tsemaUnmapFrom; + // tsemaGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) + pThis->__tsemaGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_tsemaGetMemoryMappingDescriptor; - pThis->__tsemaControl_Epilogue__ = &__nvoc_thunk_RmResource_tsemaControl_Epilogue; + // tsemaControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__tsemaControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_tsemaControlSerialization_Prologue; - pThis->__tsemaGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_tsemaGetInternalObjectHandle; + // tsemaControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__tsemaControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_tsemaControlSerialization_Epilogue; - pThis->__tsemaControl__ = &__nvoc_thunk_GpuResource_tsemaControl; + // tsemaControl_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__tsemaControl_Prologue__ = &__nvoc_up_thunk_RmResource_tsemaControl_Prologue; - pThis->__tsemaUnmap__ = &__nvoc_thunk_GpuResource_tsemaUnmap; + // tsemaControl_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__tsemaControl_Epilogue__ = &__nvoc_up_thunk_RmResource_tsemaControl_Epilogue; - pThis->__tsemaGetMemInterMapParams__ = &__nvoc_thunk_RmResource_tsemaGetMemInterMapParams; + // tsemaCanCopy -- virtual inherited (res) base (chandes) + pThis->__tsemaCanCopy__ = &__nvoc_up_thunk_RsResource_tsemaCanCopy; - pThis->__tsemaGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_tsemaGetMemoryMappingDescriptor; + // tsemaIsDuplicate -- virtual inherited (res) base (chandes) + pThis->__tsemaIsDuplicate__ = &__nvoc_up_thunk_RsResource_tsemaIsDuplicate; - pThis->__tsemaIsSwMethodStalling__ = &__nvoc_thunk_ChannelDescendant_tsemaIsSwMethodStalling; + // tsemaPreDestruct -- virtual inherited (res) base (chandes) + pThis->__tsemaPreDestruct__ = &__nvoc_up_thunk_RsResource_tsemaPreDestruct; - pThis->__tsemaControlFilter__ = &__nvoc_thunk_RsResource_tsemaControlFilter; + // tsemaControlFilter -- virtual inherited (res) base (chandes) + pThis->__tsemaControlFilter__ = &__nvoc_up_thunk_RsResource_tsemaControlFilter; - pThis->__tsemaUnregisterEvent__ = &__nvoc_thunk_Notifier_tsemaUnregisterEvent; + // tsemaIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body + pThis->__tsemaIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_tsemaIsPartialUnmapSupported; - pThis->__tsemaControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_tsemaControlSerialization_Prologue; + // tsemaMapTo -- virtual inherited (res) base (chandes) + pThis->__tsemaMapTo__ = &__nvoc_up_thunk_RsResource_tsemaMapTo; - pThis->__tsemaCanCopy__ = &__nvoc_thunk_RsResource_tsemaCanCopy; + // tsemaUnmapFrom -- virtual inherited (res) base (chandes) + pThis->__tsemaUnmapFrom__ = &__nvoc_up_thunk_RsResource_tsemaUnmapFrom; - pThis->__tsemaIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_tsemaIsPartialUnmapSupported; + // tsemaGetRefCount -- virtual inherited (res) base (chandes) + pThis->__tsemaGetRefCount__ = &__nvoc_up_thunk_RsResource_tsemaGetRefCount; - pThis->__tsemaPreDestruct__ = &__nvoc_thunk_RsResource_tsemaPreDestruct; + // tsemaAddAdditionalDependants -- virtual inherited (res) base (chandes) + pThis->__tsemaAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_tsemaAddAdditionalDependants; - pThis->__tsemaIsDuplicate__ = &__nvoc_thunk_RsResource_tsemaIsDuplicate; + // tsemaGetNotificationListPtr -- virtual inherited (notify) base (chandes) + pThis->__tsemaGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_tsemaGetNotificationListPtr; - pThis->__tsemaControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_tsemaControlSerialization_Epilogue; + // tsemaGetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__tsemaGetNotificationShare__ = &__nvoc_up_thunk_Notifier_tsemaGetNotificationShare; - pThis->__tsemaGetNotificationListPtr__ = &__nvoc_thunk_Notifier_tsemaGetNotificationListPtr; + // tsemaSetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__tsemaSetNotificationShare__ = &__nvoc_up_thunk_Notifier_tsemaSetNotificationShare; - pThis->__tsemaGetNotificationShare__ = &__nvoc_thunk_Notifier_tsemaGetNotificationShare; + // tsemaUnregisterEvent -- virtual inherited (notify) base (chandes) + pThis->__tsemaUnregisterEvent__ = &__nvoc_up_thunk_Notifier_tsemaUnregisterEvent; - pThis->__tsemaMap__ = &__nvoc_thunk_GpuResource_tsemaMap; + // tsemaGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) + pThis->__tsemaGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_tsemaGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_TimedSemaSwObject_1 with approximately 36 basic block(s). - pThis->__tsemaGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_tsemaGetOrAllocNotifShare; -} +// Initialize vtable(s) for 35 virtual method(s). void __nvoc_init_funcTable_TimedSemaSwObject(TimedSemaSwObject *pThis) { + + // Initialize vtable(s) with 35 per-object function pointer(s). __nvoc_init_funcTable_TimedSemaSwObject_1(pThis); } @@ -439,7 +516,7 @@ void __nvoc_init_TimedSemaSwObject(TimedSemaSwObject *pThis, RmHalspecOwner *pRm __nvoc_init_funcTable_TimedSemaSwObject(pThis); } -NV_STATUS __nvoc_objCreate_TimedSemaSwObject(TimedSemaSwObject **ppThis, Dynamic *pParent, NvU32 createFlags, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams) +NV_STATUS __nvoc_objCreate_TimedSemaSwObject(TimedSemaSwObject **ppThis, Dynamic *pParent, NvU32 createFlags, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams) { NV_STATUS status; Object *pParentObj = NULL; @@ -507,7 +584,7 @@ NV_STATUS __nvoc_objCreate_TimedSemaSwObject(TimedSemaSwObject **ppThis, Dynamic NV_STATUS __nvoc_objCreateDynamic_TimedSemaSwObject(TimedSemaSwObject **ppThis, Dynamic *pParent, NvU32 createFlags, va_list args) { NV_STATUS status; - struct CALL_CONTEXT * arg_pCallContext = va_arg(args, struct CALL_CONTEXT *); + CALL_CONTEXT * arg_pCallContext = va_arg(args, CALL_CONTEXT *); struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams = va_arg(args, struct RS_RES_ALLOC_PARAMS_INTERNAL *); status = __nvoc_objCreate_TimedSemaSwObject(ppThis, pParent, createFlags, arg_pCallContext, arg_pParams); diff --git a/src/nvidia/generated/g_timed_sema_nvoc.h b/src/nvidia/generated/g_timed_sema_nvoc.h index 898f8128c6..a8f3bbad59 100644 --- a/src/nvidia/generated/g_timed_sema_nvoc.h +++ b/src/nvidia/generated/g_timed_sema_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_TIMED_SEMA_NVOC_H_ #define _G_TIMED_SEMA_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_timed_sema_nvoc.h" #ifndef _TIMED_SEMA_H_ @@ -37,6 +45,7 @@ extern "C" { #include "core/core.h" #include "kernel/gpu/fifo/channel_descendant.h" #include "ctrl/ctrl9074.h" +#include "objtmr.h" typedef struct { @@ -62,53 +71,64 @@ MAKE_LIST(GF100_TIMED_SEM_ENTRY_LIST, GF100_TIMED_SEM_ENTRY); #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct TimedSemaSwObject { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; - struct TimedSemaSwObject *__nvoc_pbase_TimedSemaSwObject; - NV_STATUS (*__tsemaGetSwMethods__)(struct TimedSemaSwObject *, const METHOD **, NvU32 *); - NV_STATUS (*__tsemaCtrlCmdFlush__)(struct TimedSemaSwObject *, NV9074_CTRL_CMD_FLUSH_PARAMS *); - NV_STATUS (*__tsemaCtrlCmdGetTime__)(struct TimedSemaSwObject *, NV9074_CTRL_CMD_GET_TIME_PARAMS *); - NV_STATUS (*__tsemaCtrlCmdRelease__)(struct TimedSemaSwObject *, NV9074_CTRL_CMD_RELEASE_PARAMS *); - NV_STATUS (*__tsemaCheckMemInterUnmap__)(struct TimedSemaSwObject *, NvBool); - NvBool (*__tsemaShareCallback__)(struct TimedSemaSwObject *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NvBool (*__tsemaAccessCallback__)(struct TimedSemaSwObject *, struct RsClient *, void *, RsAccessRight); - NV_STATUS (*__tsemaMapTo__)(struct TimedSemaSwObject *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__tsemaGetMapAddrSpace__)(struct TimedSemaSwObject *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__tsemaSetNotificationShare__)(struct TimedSemaSwObject *, struct NotifShare *); - NvU32 (*__tsemaGetRefCount__)(struct TimedSemaSwObject *); - void (*__tsemaAddAdditionalDependants__)(struct RsClient *, struct TimedSemaSwObject *, RsResourceRef *); - NV_STATUS (*__tsemaControl_Prologue__)(struct TimedSemaSwObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__tsemaGetRegBaseOffsetAndSize__)(struct TimedSemaSwObject *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__tsemaInternalControlForward__)(struct TimedSemaSwObject *, NvU32, void *, NvU32); - NV_STATUS (*__tsemaUnmapFrom__)(struct TimedSemaSwObject *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__tsemaControl_Epilogue__)(struct TimedSemaSwObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__tsemaGetInternalObjectHandle__)(struct TimedSemaSwObject *); - NV_STATUS (*__tsemaControl__)(struct TimedSemaSwObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__tsemaUnmap__)(struct TimedSemaSwObject *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__tsemaGetMemInterMapParams__)(struct TimedSemaSwObject *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__tsemaGetMemoryMappingDescriptor__)(struct TimedSemaSwObject *, struct MEMORY_DESCRIPTOR **); - NvBool (*__tsemaIsSwMethodStalling__)(struct TimedSemaSwObject *, NvU32); - NV_STATUS (*__tsemaControlFilter__)(struct TimedSemaSwObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__tsemaUnregisterEvent__)(struct TimedSemaSwObject *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__tsemaControlSerialization_Prologue__)(struct TimedSemaSwObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__tsemaCanCopy__)(struct TimedSemaSwObject *); - NvBool (*__tsemaIsPartialUnmapSupported__)(struct TimedSemaSwObject *); - void (*__tsemaPreDestruct__)(struct TimedSemaSwObject *); - NV_STATUS (*__tsemaIsDuplicate__)(struct TimedSemaSwObject *, NvHandle, NvBool *); - void (*__tsemaControlSerialization_Epilogue__)(struct TimedSemaSwObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__tsemaGetNotificationListPtr__)(struct TimedSemaSwObject *); - struct NotifShare *(*__tsemaGetNotificationShare__)(struct TimedSemaSwObject *); - NV_STATUS (*__tsemaMap__)(struct TimedSemaSwObject *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NV_STATUS (*__tsemaGetOrAllocNotifShare__)(struct TimedSemaSwObject *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super^2 + struct INotifier *__nvoc_pbase_INotifier; // inotify super^3 + struct Notifier *__nvoc_pbase_Notifier; // notify super^2 + struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super + struct TimedSemaSwObject *__nvoc_pbase_TimedSemaSwObject; // tsema + + // Vtable with 35 per-object function pointers + NV_STATUS (*__tsemaGetSwMethods__)(struct TimedSemaSwObject * /*this*/, const METHOD **, NvU32 *); // virtual override (chandes) base (chandes) + NV_STATUS (*__tsemaCtrlCmdFlush__)(struct TimedSemaSwObject * /*this*/, NV9074_CTRL_CMD_FLUSH_PARAMS *); // exported (id=0x90740101) + NV_STATUS (*__tsemaCtrlCmdGetTime__)(struct TimedSemaSwObject * /*this*/, NV9074_CTRL_CMD_GET_TIME_PARAMS *); // exported (id=0x90740102) + NV_STATUS (*__tsemaCtrlCmdRelease__)(struct TimedSemaSwObject * /*this*/, NV9074_CTRL_CMD_RELEASE_PARAMS *); // exported (id=0x90740103) + NvBool (*__tsemaIsSwMethodStalling__)(struct TimedSemaSwObject * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__tsemaCheckMemInterUnmap__)(struct TimedSemaSwObject * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__tsemaControl__)(struct TimedSemaSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__tsemaMap__)(struct TimedSemaSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__tsemaUnmap__)(struct TimedSemaSwObject * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NvBool (*__tsemaShareCallback__)(struct TimedSemaSwObject * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__tsemaGetRegBaseOffsetAndSize__)(struct TimedSemaSwObject * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__tsemaGetMapAddrSpace__)(struct TimedSemaSwObject * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__tsemaInternalControlForward__)(struct TimedSemaSwObject * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (chandes) + NvHandle (*__tsemaGetInternalObjectHandle__)(struct TimedSemaSwObject * /*this*/); // virtual inherited (gpures) base (chandes) + NvBool (*__tsemaAccessCallback__)(struct TimedSemaSwObject * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__tsemaGetMemInterMapParams__)(struct TimedSemaSwObject * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__tsemaGetMemoryMappingDescriptor__)(struct TimedSemaSwObject * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__tsemaControlSerialization_Prologue__)(struct TimedSemaSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__tsemaControlSerialization_Epilogue__)(struct TimedSemaSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__tsemaControl_Prologue__)(struct TimedSemaSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__tsemaControl_Epilogue__)(struct TimedSemaSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NvBool (*__tsemaCanCopy__)(struct TimedSemaSwObject * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__tsemaIsDuplicate__)(struct TimedSemaSwObject * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (chandes) + void (*__tsemaPreDestruct__)(struct TimedSemaSwObject * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__tsemaControlFilter__)(struct TimedSemaSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (chandes) + NvBool (*__tsemaIsPartialUnmapSupported__)(struct TimedSemaSwObject * /*this*/); // inline virtual inherited (res) base (chandes) body + NV_STATUS (*__tsemaMapTo__)(struct TimedSemaSwObject * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (chandes) + NV_STATUS (*__tsemaUnmapFrom__)(struct TimedSemaSwObject * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (chandes) + NvU32 (*__tsemaGetRefCount__)(struct TimedSemaSwObject * /*this*/); // virtual inherited (res) base (chandes) + void (*__tsemaAddAdditionalDependants__)(struct RsClient *, struct TimedSemaSwObject * /*this*/, RsResourceRef *); // virtual inherited (res) base (chandes) + PEVENTNOTIFICATION * (*__tsemaGetNotificationListPtr__)(struct TimedSemaSwObject * /*this*/); // virtual inherited (notify) base (chandes) + struct NotifShare * (*__tsemaGetNotificationShare__)(struct TimedSemaSwObject * /*this*/); // virtual inherited (notify) base (chandes) + void (*__tsemaSetNotificationShare__)(struct TimedSemaSwObject * /*this*/, struct NotifShare *); // virtual inherited (notify) base (chandes) + NV_STATUS (*__tsemaUnregisterEvent__)(struct TimedSemaSwObject * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (chandes) + NV_STATUS (*__tsemaGetOrAllocNotifShare__)(struct TimedSemaSwObject * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (chandes) + + // Data members NvU32 NotifierHi; NvU32 NotifierLo; NvU32 SemaphoreHi; @@ -121,6 +141,7 @@ struct TimedSemaSwObject { NvU64 SemaphoreGPUVA; NvU64 WaitTimestamp; NvU64 FlushLimitTimestamp; + struct TMR_EVENT *pTmrEvent; GF100_TIMED_SEM_ENTRY_LIST entryList; }; @@ -133,6 +154,7 @@ typedef struct TimedSemaSwObject TimedSemaSwObject; #define __nvoc_class_id_TimedSemaSwObject 0x335775 #endif /* __nvoc_class_id_TimedSemaSwObject */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_TimedSemaSwObject; #define __staticCast_TimedSemaSwObject(pThis) \ @@ -145,140 +167,144 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_TimedSemaSwObject; ((TimedSemaSwObject*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(TimedSemaSwObject))) #endif //__nvoc_timed_sema_h_disabled - NV_STATUS __nvoc_objCreateDynamic_TimedSemaSwObject(TimedSemaSwObject**, Dynamic*, NvU32, va_list); -NV_STATUS __nvoc_objCreate_TimedSemaSwObject(TimedSemaSwObject**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); +NV_STATUS __nvoc_objCreate_TimedSemaSwObject(TimedSemaSwObject**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_TimedSemaSwObject(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_TimedSemaSwObject((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define tsemaGetSwMethods_FNPTR(pTimedSemSw) pTimedSemSw->__tsemaGetSwMethods__ #define tsemaGetSwMethods(pTimedSemSw, ppMethods, pNumMethods) tsemaGetSwMethods_DISPATCH(pTimedSemSw, ppMethods, pNumMethods) +#define tsemaCtrlCmdFlush_FNPTR(pTimedSemaSwObject) pTimedSemaSwObject->__tsemaCtrlCmdFlush__ #define tsemaCtrlCmdFlush(pTimedSemaSwObject, pFlushParams) tsemaCtrlCmdFlush_DISPATCH(pTimedSemaSwObject, pFlushParams) +#define tsemaCtrlCmdGetTime_FNPTR(pTimedSemaSwObject) pTimedSemaSwObject->__tsemaCtrlCmdGetTime__ #define tsemaCtrlCmdGetTime(pTimedSemaSwObject, pGetTimeParams) tsemaCtrlCmdGetTime_DISPATCH(pTimedSemaSwObject, pGetTimeParams) +#define tsemaCtrlCmdRelease_FNPTR(pTimedSemaSwObject) pTimedSemaSwObject->__tsemaCtrlCmdRelease__ #define tsemaCtrlCmdRelease(pTimedSemaSwObject, pReleaseParams) tsemaCtrlCmdRelease_DISPATCH(pTimedSemaSwObject, pReleaseParams) +#define tsemaIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define tsemaIsSwMethodStalling(pChannelDescendant, hHandle) tsemaIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) +#define tsemaCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ #define tsemaCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) tsemaCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) +#define tsemaControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define tsemaControl(pGpuResource, pCallContext, pParams) tsemaControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define tsemaMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define tsemaMap(pGpuResource, pCallContext, pParams, pCpuMapping) tsemaMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define tsemaUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define tsemaUnmap(pGpuResource, pCallContext, pCpuMapping) tsemaUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define tsemaShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ #define tsemaShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) tsemaShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define tsemaAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) tsemaAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define tsemaMapTo(pResource, pParams) tsemaMapTo_DISPATCH(pResource, pParams) -#define tsemaGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) tsemaGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define tsemaSetNotificationShare(pNotifier, pNotifShare) tsemaSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define tsemaGetRefCount(pResource) tsemaGetRefCount_DISPATCH(pResource) -#define tsemaAddAdditionalDependants(pClient, pResource, pReference) tsemaAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define tsemaControl_Prologue(pResource, pCallContext, pParams) tsemaControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define tsemaGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define tsemaGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) tsemaGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define tsemaGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define tsemaGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) tsemaGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define tsemaInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define tsemaInternalControlForward(pGpuResource, command, pParams, size) tsemaInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define tsemaUnmapFrom(pResource, pParams) tsemaUnmapFrom_DISPATCH(pResource, pParams) -#define tsemaControl_Epilogue(pResource, pCallContext, pParams) tsemaControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define tsemaGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define tsemaGetInternalObjectHandle(pGpuResource) tsemaGetInternalObjectHandle_DISPATCH(pGpuResource) -#define tsemaControl(pGpuResource, pCallContext, pParams) tsemaControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define tsemaUnmap(pGpuResource, pCallContext, pCpuMapping) tsemaUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define tsemaAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define tsemaAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) tsemaAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define tsemaGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define tsemaGetMemInterMapParams(pRmResource, pParams) tsemaGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define tsemaGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define tsemaGetMemoryMappingDescriptor(pRmResource, ppMemDesc) tsemaGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define tsemaIsSwMethodStalling(pChannelDescendant, hHandle) tsemaIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define tsemaControlFilter(pResource, pCallContext, pParams) tsemaControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define tsemaUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) tsemaUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define tsemaControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define tsemaControlSerialization_Prologue(pResource, pCallContext, pParams) tsemaControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define tsemaControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define tsemaControlSerialization_Epilogue(pResource, pCallContext, pParams) tsemaControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define tsemaControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define tsemaControl_Prologue(pResource, pCallContext, pParams) tsemaControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define tsemaControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define tsemaControl_Epilogue(pResource, pCallContext, pParams) tsemaControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define tsemaCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define tsemaCanCopy(pResource) tsemaCanCopy_DISPATCH(pResource) -#define tsemaIsPartialUnmapSupported(pResource) tsemaIsPartialUnmapSupported_DISPATCH(pResource) -#define tsemaPreDestruct(pResource) tsemaPreDestruct_DISPATCH(pResource) +#define tsemaIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define tsemaIsDuplicate(pResource, hMemory, pDuplicate) tsemaIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define tsemaControlSerialization_Epilogue(pResource, pCallContext, pParams) tsemaControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define tsemaPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define tsemaPreDestruct(pResource) tsemaPreDestruct_DISPATCH(pResource) +#define tsemaControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define tsemaControlFilter(pResource, pCallContext, pParams) tsemaControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define tsemaIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define tsemaIsPartialUnmapSupported(pResource) tsemaIsPartialUnmapSupported_DISPATCH(pResource) +#define tsemaMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define tsemaMapTo(pResource, pParams) tsemaMapTo_DISPATCH(pResource, pParams) +#define tsemaUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define tsemaUnmapFrom(pResource, pParams) tsemaUnmapFrom_DISPATCH(pResource, pParams) +#define tsemaGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define tsemaGetRefCount(pResource) tsemaGetRefCount_DISPATCH(pResource) +#define tsemaAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define tsemaAddAdditionalDependants(pClient, pResource, pReference) tsemaAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define tsemaGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define tsemaGetNotificationListPtr(pNotifier) tsemaGetNotificationListPtr_DISPATCH(pNotifier) +#define tsemaGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ #define tsemaGetNotificationShare(pNotifier) tsemaGetNotificationShare_DISPATCH(pNotifier) -#define tsemaMap(pGpuResource, pCallContext, pParams, pCpuMapping) tsemaMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define tsemaSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define tsemaSetNotificationShare(pNotifier, pNotifShare) tsemaSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define tsemaUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define tsemaUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) tsemaUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define tsemaGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ #define tsemaGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) tsemaGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -NV_STATUS tsemaRelease_KERNEL(struct OBJGPU *pGpu, NvU64 semaphoreVA, NvU64 notifierVA, NvU32 hVASpace, NvU32 releasevalue, NvU32 completionStatus, struct Device *pDevice); - - -#define tsemaRelease(pGpu, semaphoreVA, notifierVA, hVASpace, releasevalue, completionStatus, pDevice) tsemaRelease_KERNEL(pGpu, semaphoreVA, notifierVA, hVASpace, releasevalue, completionStatus, pDevice) -#define tsemaRelease_HAL(pGpu, semaphoreVA, notifierVA, hVASpace, releasevalue, completionStatus, pDevice) tsemaRelease(pGpu, semaphoreVA, notifierVA, hVASpace, releasevalue, completionStatus, pDevice) - -NV_STATUS tsemaGetSwMethods_IMPL(struct TimedSemaSwObject *pTimedSemSw, const METHOD **ppMethods, NvU32 *pNumMethods); +// Dispatch functions static inline NV_STATUS tsemaGetSwMethods_DISPATCH(struct TimedSemaSwObject *pTimedSemSw, const METHOD **ppMethods, NvU32 *pNumMethods) { return pTimedSemSw->__tsemaGetSwMethods__(pTimedSemSw, ppMethods, pNumMethods); } -NV_STATUS tsemaCtrlCmdFlush_IMPL(struct TimedSemaSwObject *pTimedSemaSwObject, NV9074_CTRL_CMD_FLUSH_PARAMS *pFlushParams); - static inline NV_STATUS tsemaCtrlCmdFlush_DISPATCH(struct TimedSemaSwObject *pTimedSemaSwObject, NV9074_CTRL_CMD_FLUSH_PARAMS *pFlushParams) { return pTimedSemaSwObject->__tsemaCtrlCmdFlush__(pTimedSemaSwObject, pFlushParams); } -NV_STATUS tsemaCtrlCmdGetTime_IMPL(struct TimedSemaSwObject *pTimedSemaSwObject, NV9074_CTRL_CMD_GET_TIME_PARAMS *pGetTimeParams); - static inline NV_STATUS tsemaCtrlCmdGetTime_DISPATCH(struct TimedSemaSwObject *pTimedSemaSwObject, NV9074_CTRL_CMD_GET_TIME_PARAMS *pGetTimeParams) { return pTimedSemaSwObject->__tsemaCtrlCmdGetTime__(pTimedSemaSwObject, pGetTimeParams); } -NV_STATUS tsemaCtrlCmdRelease_IMPL(struct TimedSemaSwObject *pTimedSemaSwObject, NV9074_CTRL_CMD_RELEASE_PARAMS *pReleaseParams); - static inline NV_STATUS tsemaCtrlCmdRelease_DISPATCH(struct TimedSemaSwObject *pTimedSemaSwObject, NV9074_CTRL_CMD_RELEASE_PARAMS *pReleaseParams) { return pTimedSemaSwObject->__tsemaCtrlCmdRelease__(pTimedSemaSwObject, pReleaseParams); } -static inline NV_STATUS tsemaCheckMemInterUnmap_DISPATCH(struct TimedSemaSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return pChannelDescendant->__tsemaCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); -} - -static inline NvBool tsemaShareCallback_DISPATCH(struct TimedSemaSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__tsemaShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NvBool tsemaAccessCallback_DISPATCH(struct TimedSemaSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__tsemaAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} - -static inline NV_STATUS tsemaMapTo_DISPATCH(struct TimedSemaSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__tsemaMapTo__(pResource, pParams); +static inline NvBool tsemaIsSwMethodStalling_DISPATCH(struct TimedSemaSwObject *pChannelDescendant, NvU32 hHandle) { + return pChannelDescendant->__tsemaIsSwMethodStalling__(pChannelDescendant, hHandle); } -static inline NV_STATUS tsemaGetMapAddrSpace_DISPATCH(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__tsemaGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +static inline NV_STATUS tsemaCheckMemInterUnmap_DISPATCH(struct TimedSemaSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { + return pChannelDescendant->__tsemaCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } -static inline void tsemaSetNotificationShare_DISPATCH(struct TimedSemaSwObject *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__tsemaSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS tsemaControl_DISPATCH(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__tsemaControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 tsemaGetRefCount_DISPATCH(struct TimedSemaSwObject *pResource) { - return pResource->__tsemaGetRefCount__(pResource); +static inline NV_STATUS tsemaMap_DISPATCH(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__tsemaMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void tsemaAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct TimedSemaSwObject *pResource, RsResourceRef *pReference) { - pResource->__tsemaAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS tsemaUnmap_DISPATCH(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__tsemaUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS tsemaControl_Prologue_DISPATCH(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__tsemaControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool tsemaShareCallback_DISPATCH(struct TimedSemaSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__tsemaShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS tsemaGetRegBaseOffsetAndSize_DISPATCH(struct TimedSemaSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__tsemaGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS tsemaInternalControlForward_DISPATCH(struct TimedSemaSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__tsemaInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS tsemaUnmapFrom_DISPATCH(struct TimedSemaSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__tsemaUnmapFrom__(pResource, pParams); +static inline NV_STATUS tsemaGetMapAddrSpace_DISPATCH(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__tsemaGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void tsemaControl_Epilogue_DISPATCH(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__tsemaControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS tsemaInternalControlForward_DISPATCH(struct TimedSemaSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__tsemaInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle tsemaGetInternalObjectHandle_DISPATCH(struct TimedSemaSwObject *pGpuResource) { return pGpuResource->__tsemaGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS tsemaControl_DISPATCH(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__tsemaControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS tsemaUnmap_DISPATCH(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__tsemaUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool tsemaAccessCallback_DISPATCH(struct TimedSemaSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__tsemaAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS tsemaGetMemInterMapParams_DISPATCH(struct TimedSemaSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { @@ -289,64 +315,109 @@ static inline NV_STATUS tsemaGetMemoryMappingDescriptor_DISPATCH(struct TimedSem return pRmResource->__tsemaGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NvBool tsemaIsSwMethodStalling_DISPATCH(struct TimedSemaSwObject *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__tsemaIsSwMethodStalling__(pChannelDescendant, hHandle); +static inline NV_STATUS tsemaControlSerialization_Prologue_DISPATCH(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__tsemaControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS tsemaControlFilter_DISPATCH(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__tsemaControlFilter__(pResource, pCallContext, pParams); +static inline void tsemaControlSerialization_Epilogue_DISPATCH(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__tsemaControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS tsemaUnregisterEvent_DISPATCH(struct TimedSemaSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__tsemaUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline NV_STATUS tsemaControl_Prologue_DISPATCH(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__tsemaControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS tsemaControlSerialization_Prologue_DISPATCH(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__tsemaControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline void tsemaControl_Epilogue_DISPATCH(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__tsemaControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool tsemaCanCopy_DISPATCH(struct TimedSemaSwObject *pResource) { return pResource->__tsemaCanCopy__(pResource); } -static inline NvBool tsemaIsPartialUnmapSupported_DISPATCH(struct TimedSemaSwObject *pResource) { - return pResource->__tsemaIsPartialUnmapSupported__(pResource); +static inline NV_STATUS tsemaIsDuplicate_DISPATCH(struct TimedSemaSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__tsemaIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void tsemaPreDestruct_DISPATCH(struct TimedSemaSwObject *pResource) { pResource->__tsemaPreDestruct__(pResource); } -static inline NV_STATUS tsemaIsDuplicate_DISPATCH(struct TimedSemaSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__tsemaIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS tsemaControlFilter_DISPATCH(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__tsemaControlFilter__(pResource, pCallContext, pParams); } -static inline void tsemaControlSerialization_Epilogue_DISPATCH(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__tsemaControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool tsemaIsPartialUnmapSupported_DISPATCH(struct TimedSemaSwObject *pResource) { + return pResource->__tsemaIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS tsemaMapTo_DISPATCH(struct TimedSemaSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__tsemaMapTo__(pResource, pParams); +} + +static inline NV_STATUS tsemaUnmapFrom_DISPATCH(struct TimedSemaSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__tsemaUnmapFrom__(pResource, pParams); } -static inline PEVENTNOTIFICATION *tsemaGetNotificationListPtr_DISPATCH(struct TimedSemaSwObject *pNotifier) { +static inline NvU32 tsemaGetRefCount_DISPATCH(struct TimedSemaSwObject *pResource) { + return pResource->__tsemaGetRefCount__(pResource); +} + +static inline void tsemaAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct TimedSemaSwObject *pResource, RsResourceRef *pReference) { + pResource->__tsemaAddAdditionalDependants__(pClient, pResource, pReference); +} + +static inline PEVENTNOTIFICATION * tsemaGetNotificationListPtr_DISPATCH(struct TimedSemaSwObject *pNotifier) { return pNotifier->__tsemaGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *tsemaGetNotificationShare_DISPATCH(struct TimedSemaSwObject *pNotifier) { +static inline struct NotifShare * tsemaGetNotificationShare_DISPATCH(struct TimedSemaSwObject *pNotifier) { return pNotifier->__tsemaGetNotificationShare__(pNotifier); } -static inline NV_STATUS tsemaMap_DISPATCH(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__tsemaMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void tsemaSetNotificationShare_DISPATCH(struct TimedSemaSwObject *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__tsemaSetNotificationShare__(pNotifier, pNotifShare); +} + +static inline NV_STATUS tsemaUnregisterEvent_DISPATCH(struct TimedSemaSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__tsemaUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS tsemaGetOrAllocNotifShare_DISPATCH(struct TimedSemaSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return pNotifier->__tsemaGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } -NV_STATUS tsemaConstruct_IMPL(struct TimedSemaSwObject *arg_pTimedSemSw, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); +NV_STATUS tsemaRelease_KERNEL(OBJGPU *pGpu, NvU64 semaphoreVA, NvU64 notifierVA, NvU32 hVASpace, NvU32 releasevalue, NvU32 completionStatus, struct Device *pDevice); + + +#define tsemaRelease(pGpu, semaphoreVA, notifierVA, hVASpace, releasevalue, completionStatus, pDevice) tsemaRelease_KERNEL(pGpu, semaphoreVA, notifierVA, hVASpace, releasevalue, completionStatus, pDevice) +#define tsemaRelease_HAL(pGpu, semaphoreVA, notifierVA, hVASpace, releasevalue, completionStatus, pDevice) tsemaRelease(pGpu, semaphoreVA, notifierVA, hVASpace, releasevalue, completionStatus, pDevice) + +NV_STATUS tsemaGetSwMethods_IMPL(struct TimedSemaSwObject *pTimedSemSw, const METHOD **ppMethods, NvU32 *pNumMethods); + +NV_STATUS tsemaCtrlCmdFlush_IMPL(struct TimedSemaSwObject *pTimedSemaSwObject, NV9074_CTRL_CMD_FLUSH_PARAMS *pFlushParams); + +NV_STATUS tsemaCtrlCmdGetTime_IMPL(struct TimedSemaSwObject *pTimedSemaSwObject, NV9074_CTRL_CMD_GET_TIME_PARAMS *pGetTimeParams); + +NV_STATUS tsemaCtrlCmdRelease_IMPL(struct TimedSemaSwObject *pTimedSemaSwObject, NV9074_CTRL_CMD_RELEASE_PARAMS *pReleaseParams); + +NV_STATUS tsemaConstruct_IMPL(struct TimedSemaSwObject *arg_pTimedSemSw, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_tsemaConstruct(arg_pTimedSemSw, arg_pCallContext, arg_pParams) tsemaConstruct_IMPL(arg_pTimedSemSw, arg_pCallContext, arg_pParams) void tsemaDestruct_IMPL(struct TimedSemaSwObject *pTimedSemSw); #define __nvoc_tsemaDestruct(pTimedSemSw) tsemaDestruct_IMPL(pTimedSemSw) +NvBool tsemaCheckCallbackReleaseSem_IMPL(struct TimedSemaSwObject *pTimedSemSw); + +#ifdef __nvoc_timed_sema_h_disabled +static inline NvBool tsemaCheckCallbackReleaseSem(struct TimedSemaSwObject *pTimedSemSw) { + NV_ASSERT_FAILED_PRECOMP("TimedSemaSwObject was disabled!"); + return NV_FALSE; +} +#else //__nvoc_timed_sema_h_disabled +#define tsemaCheckCallbackReleaseSem(pTimedSemSw) tsemaCheckCallbackReleaseSem_IMPL(pTimedSemSw) +#endif //__nvoc_timed_sema_h_disabled + #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_tmr_nvoc.c b/src/nvidia/generated/g_tmr_nvoc.c index b79c8ae837..f286916782 100644 --- a/src/nvidia/generated/g_tmr_nvoc.c +++ b/src/nvidia/generated/g_tmr_nvoc.c @@ -111,149 +111,185 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_TimerApi = /*pExportInfo=*/ &__nvoc_export_info_TimerApi }; -static NV_STATUS __nvoc_thunk_TimerApi_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pTimerApi, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return tmrapiGetRegBaseOffsetAndSize((struct TimerApi *)(((unsigned char *)pTimerApi) - __nvoc_rtti_TimerApi_GpuResource.offset), pGpu, pOffset, pSize); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NvBool __nvoc_thunk_GpuResource_tmrapiShareCallback(struct TimerApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_TimerApi[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) tmrapiCtrlCmdTmrSetAlarmNotify_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x40110u, + /*paramSize=*/ sizeof(NV0004_CTRL_TMR_SET_ALARM_NOTIFY_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_TimerApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "tmrapiCtrlCmdTmrSetAlarmNotify" +#endif + }, + +}; -static NV_STATUS __nvoc_thunk_RmResource_tmrapiCheckMemInterUnmap(struct TimerApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_TimerApi_RmResource.offset), bSubdeviceHandleProvided); +// 1 down-thunk(s) defined to bridge methods in TimerApi from superclasses + +// tmrapiGetRegBaseOffsetAndSize: virtual override (gpures) base (gpures) +static NV_STATUS __nvoc_down_thunk_TimerApi_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pTimerApi, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return tmrapiGetRegBaseOffsetAndSize((struct TimerApi *)(((unsigned char *) pTimerApi) - __nvoc_rtti_TimerApi_GpuResource.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_Notifier_tmrapiGetOrAllocNotifShare(struct TimerApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_TimerApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); + +// 29 up-thunk(s) defined to bridge methods in TimerApi to superclasses + +// tmrapiControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_tmrapiControl(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_tmrapiMapTo(struct TimerApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimerApi_RsResource.offset), pParams); +// tmrapiMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_tmrapiMap(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_GpuResource_tmrapiGetMapAddrSpace(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// tmrapiUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_tmrapiUnmap(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_Notifier_tmrapiSetNotificationShare(struct TimerApi *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_TimerApi_Notifier.offset), pNotifShare); +// tmrapiShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_tmrapiShareCallback(struct TimerApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NvU32 __nvoc_thunk_RsResource_tmrapiGetRefCount(struct TimerApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimerApi_RsResource.offset)); +// tmrapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_tmrapiGetMapAddrSpace(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static void __nvoc_thunk_RsResource_tmrapiAddAdditionalDependants(struct RsClient *pClient, struct TimerApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimerApi_RsResource.offset), pReference); +// tmrapiInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_tmrapiInternalControlForward(struct TimerApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_RmResource_tmrapiControl_Prologue(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimerApi_RmResource.offset), pCallContext, pParams); +// tmrapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_tmrapiGetInternalObjectHandle(struct TimerApi *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_tmrapiInternalControlForward(struct TimerApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset), command, pParams, size); +// tmrapiAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_tmrapiAccessCallback(struct TimerApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RsResource_tmrapiUnmapFrom(struct TimerApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimerApi_RsResource.offset), pParams); +// tmrapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_tmrapiGetMemInterMapParams(struct TimerApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_TimerApi_RmResource.offset), pParams); } -static void __nvoc_thunk_RmResource_tmrapiControl_Epilogue(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimerApi_RmResource.offset), pCallContext, pParams); +// tmrapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_tmrapiCheckMemInterUnmap(struct TimerApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_TimerApi_RmResource.offset), bSubdeviceHandleProvided); } -static NvHandle __nvoc_thunk_GpuResource_tmrapiGetInternalObjectHandle(struct TimerApi *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset)); +// tmrapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_tmrapiGetMemoryMappingDescriptor(struct TimerApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_TimerApi_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_GpuResource_tmrapiControl(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset), pCallContext, pParams); +// tmrapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_tmrapiControlSerialization_Prologue(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_tmrapiUnmap(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset), pCallContext, pCpuMapping); +// tmrapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_tmrapiControlSerialization_Epilogue(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_tmrapiGetMemInterMapParams(struct TimerApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_TimerApi_RmResource.offset), pParams); +// tmrapiControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_tmrapiControl_Prologue(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_tmrapiGetMemoryMappingDescriptor(struct TimerApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_TimerApi_RmResource.offset), ppMemDesc); +// tmrapiControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_tmrapiControl_Epilogue(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_tmrapiControlFilter(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimerApi_RsResource.offset), pCallContext, pParams); +// tmrapiCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_tmrapiCanCopy(struct TimerApi *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_tmrapiUnregisterEvent(struct TimerApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_TimerApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// tmrapiIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_tmrapiIsDuplicate(struct TimerApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RmResource_tmrapiControlSerialization_Prologue(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimerApi_RmResource.offset), pCallContext, pParams); +// tmrapiPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_tmrapiPreDestruct(struct TimerApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_tmrapiCanCopy(struct TimerApi *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimerApi_RsResource.offset)); +// tmrapiControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_tmrapiControlFilter(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RsResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_tmrapiIsPartialUnmapSupported(struct TimerApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimerApi_RsResource.offset)); +// tmrapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_tmrapiIsPartialUnmapSupported(struct TimerApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RsResource.offset)); } -static void __nvoc_thunk_RsResource_tmrapiPreDestruct(struct TimerApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimerApi_RsResource.offset)); +// tmrapiMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_tmrapiMapTo(struct TimerApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_tmrapiIsDuplicate(struct TimerApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimerApi_RsResource.offset), hMemory, pDuplicate); +// tmrapiUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_tmrapiUnmapFrom(struct TimerApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_tmrapiControlSerialization_Epilogue(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimerApi_RmResource.offset), pCallContext, pParams); +// tmrapiGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_tmrapiGetRefCount(struct TimerApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RsResource.offset)); } -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_tmrapiGetNotificationListPtr(struct TimerApi *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_TimerApi_Notifier.offset)); +// tmrapiAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_tmrapiAddAdditionalDependants(struct RsClient *pClient, struct TimerApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RsResource.offset), pReference); } -static struct NotifShare *__nvoc_thunk_Notifier_tmrapiGetNotificationShare(struct TimerApi *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_TimerApi_Notifier.offset)); +// tmrapiGetNotificationListPtr: virtual inherited (notify) base (notify) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_tmrapiGetNotificationListPtr(struct TimerApi *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_TimerApi_Notifier.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_tmrapiMap(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// tmrapiGetNotificationShare: virtual inherited (notify) base (notify) +static struct NotifShare * __nvoc_up_thunk_Notifier_tmrapiGetNotificationShare(struct TimerApi *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_TimerApi_Notifier.offset)); } -static NvBool __nvoc_thunk_RmResource_tmrapiAccessCallback(struct TimerApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_TimerApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// tmrapiSetNotificationShare: virtual inherited (notify) base (notify) +static void __nvoc_up_thunk_Notifier_tmrapiSetNotificationShare(struct TimerApi *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_TimerApi_Notifier.offset), pNotifShare); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// tmrapiUnregisterEvent: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_tmrapiUnregisterEvent(struct TimerApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_TimerApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_TimerApi[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) tmrapiCtrlCmdTmrSetAlarmNotify_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x40110u, - /*paramSize=*/ sizeof(NV0004_CTRL_TMR_SET_ALARM_NOTIFY_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_TimerApi.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "tmrapiCtrlCmdTmrSetAlarmNotify" -#endif - }, +// tmrapiGetOrAllocNotifShare: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_tmrapiGetOrAllocNotifShare(struct TimerApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_TimerApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_TimerApi = { @@ -298,77 +334,112 @@ NV_STATUS __nvoc_ctor_TimerApi(TimerApi *pThis, struct CALL_CONTEXT * arg_pCallC return status; } +// Vtable initialization static void __nvoc_init_funcTable_TimerApi_1(TimerApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // tmrapiGetRegBaseOffsetAndSize -- virtual override (gpures) base (gpures) pThis->__tmrapiGetRegBaseOffsetAndSize__ = &tmrapiGetRegBaseOffsetAndSize_IMPL; + pThis->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &__nvoc_down_thunk_TimerApi_gpuresGetRegBaseOffsetAndSize; -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // tmrapiCtrlCmdTmrSetAlarmNotify -- exported (id=0x40110) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__tmrapiCtrlCmdTmrSetAlarmNotify__ = &tmrapiCtrlCmdTmrSetAlarmNotify_IMPL; #endif - pThis->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &__nvoc_thunk_TimerApi_gpuresGetRegBaseOffsetAndSize; + // tmrapiControl -- virtual inherited (gpures) base (gpures) + pThis->__tmrapiControl__ = &__nvoc_up_thunk_GpuResource_tmrapiControl; - pThis->__tmrapiShareCallback__ = &__nvoc_thunk_GpuResource_tmrapiShareCallback; + // tmrapiMap -- virtual inherited (gpures) base (gpures) + pThis->__tmrapiMap__ = &__nvoc_up_thunk_GpuResource_tmrapiMap; - pThis->__tmrapiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_tmrapiCheckMemInterUnmap; + // tmrapiUnmap -- virtual inherited (gpures) base (gpures) + pThis->__tmrapiUnmap__ = &__nvoc_up_thunk_GpuResource_tmrapiUnmap; - pThis->__tmrapiGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_tmrapiGetOrAllocNotifShare; + // tmrapiShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__tmrapiShareCallback__ = &__nvoc_up_thunk_GpuResource_tmrapiShareCallback; - pThis->__tmrapiMapTo__ = &__nvoc_thunk_RsResource_tmrapiMapTo; + // tmrapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__tmrapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_tmrapiGetMapAddrSpace; - pThis->__tmrapiGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_tmrapiGetMapAddrSpace; + // tmrapiInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__tmrapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_tmrapiInternalControlForward; - pThis->__tmrapiSetNotificationShare__ = &__nvoc_thunk_Notifier_tmrapiSetNotificationShare; + // tmrapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__tmrapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_tmrapiGetInternalObjectHandle; - pThis->__tmrapiGetRefCount__ = &__nvoc_thunk_RsResource_tmrapiGetRefCount; + // tmrapiAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__tmrapiAccessCallback__ = &__nvoc_up_thunk_RmResource_tmrapiAccessCallback; - pThis->__tmrapiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_tmrapiAddAdditionalDependants; + // tmrapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__tmrapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_tmrapiGetMemInterMapParams; - pThis->__tmrapiControl_Prologue__ = &__nvoc_thunk_RmResource_tmrapiControl_Prologue; + // tmrapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__tmrapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_tmrapiCheckMemInterUnmap; - pThis->__tmrapiInternalControlForward__ = &__nvoc_thunk_GpuResource_tmrapiInternalControlForward; + // tmrapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__tmrapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_tmrapiGetMemoryMappingDescriptor; - pThis->__tmrapiUnmapFrom__ = &__nvoc_thunk_RsResource_tmrapiUnmapFrom; + // tmrapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__tmrapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_tmrapiControlSerialization_Prologue; - pThis->__tmrapiControl_Epilogue__ = &__nvoc_thunk_RmResource_tmrapiControl_Epilogue; + // tmrapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__tmrapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_tmrapiControlSerialization_Epilogue; - pThis->__tmrapiGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_tmrapiGetInternalObjectHandle; + // tmrapiControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__tmrapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_tmrapiControl_Prologue; - pThis->__tmrapiControl__ = &__nvoc_thunk_GpuResource_tmrapiControl; + // tmrapiControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__tmrapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_tmrapiControl_Epilogue; - pThis->__tmrapiUnmap__ = &__nvoc_thunk_GpuResource_tmrapiUnmap; + // tmrapiCanCopy -- virtual inherited (res) base (gpures) + pThis->__tmrapiCanCopy__ = &__nvoc_up_thunk_RsResource_tmrapiCanCopy; - pThis->__tmrapiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_tmrapiGetMemInterMapParams; + // tmrapiIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__tmrapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_tmrapiIsDuplicate; - pThis->__tmrapiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_tmrapiGetMemoryMappingDescriptor; + // tmrapiPreDestruct -- virtual inherited (res) base (gpures) + pThis->__tmrapiPreDestruct__ = &__nvoc_up_thunk_RsResource_tmrapiPreDestruct; - pThis->__tmrapiControlFilter__ = &__nvoc_thunk_RsResource_tmrapiControlFilter; + // tmrapiControlFilter -- virtual inherited (res) base (gpures) + pThis->__tmrapiControlFilter__ = &__nvoc_up_thunk_RsResource_tmrapiControlFilter; - pThis->__tmrapiUnregisterEvent__ = &__nvoc_thunk_Notifier_tmrapiUnregisterEvent; + // tmrapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__tmrapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_tmrapiIsPartialUnmapSupported; - pThis->__tmrapiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_tmrapiControlSerialization_Prologue; + // tmrapiMapTo -- virtual inherited (res) base (gpures) + pThis->__tmrapiMapTo__ = &__nvoc_up_thunk_RsResource_tmrapiMapTo; - pThis->__tmrapiCanCopy__ = &__nvoc_thunk_RsResource_tmrapiCanCopy; + // tmrapiUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__tmrapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_tmrapiUnmapFrom; - pThis->__tmrapiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_tmrapiIsPartialUnmapSupported; + // tmrapiGetRefCount -- virtual inherited (res) base (gpures) + pThis->__tmrapiGetRefCount__ = &__nvoc_up_thunk_RsResource_tmrapiGetRefCount; - pThis->__tmrapiPreDestruct__ = &__nvoc_thunk_RsResource_tmrapiPreDestruct; + // tmrapiAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__tmrapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_tmrapiAddAdditionalDependants; - pThis->__tmrapiIsDuplicate__ = &__nvoc_thunk_RsResource_tmrapiIsDuplicate; + // tmrapiGetNotificationListPtr -- virtual inherited (notify) base (notify) + pThis->__tmrapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_tmrapiGetNotificationListPtr; - pThis->__tmrapiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_tmrapiControlSerialization_Epilogue; + // tmrapiGetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__tmrapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_tmrapiGetNotificationShare; - pThis->__tmrapiGetNotificationListPtr__ = &__nvoc_thunk_Notifier_tmrapiGetNotificationListPtr; + // tmrapiSetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__tmrapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_tmrapiSetNotificationShare; - pThis->__tmrapiGetNotificationShare__ = &__nvoc_thunk_Notifier_tmrapiGetNotificationShare; + // tmrapiUnregisterEvent -- virtual inherited (notify) base (notify) + pThis->__tmrapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_tmrapiUnregisterEvent; - pThis->__tmrapiMap__ = &__nvoc_thunk_GpuResource_tmrapiMap; + // tmrapiGetOrAllocNotifShare -- virtual inherited (notify) base (notify) + pThis->__tmrapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_tmrapiGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_TimerApi_1 with approximately 32 basic block(s). - pThis->__tmrapiAccessCallback__ = &__nvoc_thunk_RmResource_tmrapiAccessCallback; -} +// Initialize vtable(s) for 31 virtual method(s). void __nvoc_init_funcTable_TimerApi(TimerApi *pThis) { + + // Initialize vtable(s) with 31 per-object function pointer(s). __nvoc_init_funcTable_TimerApi_1(pThis); } diff --git a/src/nvidia/generated/g_tmr_nvoc.h b/src/nvidia/generated/g_tmr_nvoc.h index a599b1b8a3..12629a906d 100644 --- a/src/nvidia/generated/g_tmr_nvoc.h +++ b/src/nvidia/generated/g_tmr_nvoc.h @@ -1,13 +1,20 @@ + #ifndef _G_TMR_NVOC_H_ #define _G_TMR_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_tmr_nvoc.h" #ifndef _TMR_H_ @@ -69,10 +77,6 @@ typedef struct OBJTMR OBJTMR; #define TIMER_STATE_IDLE 0 #define TIMER_STATE_BUSY 1 -// Opaque callback memory type for interfacing the scheduling API -typedef struct TMR_EVENT *PTMR_EVENT; -typedef struct TMR_EVENT TMR_EVENT; - typedef NV_STATUS (*TIMEPROC)(OBJGPU *, struct OBJTMR *, PTMR_EVENT); typedef NV_STATUS (*TIMEPROC_OBSOLETE)(OBJGPU *, struct OBJTMR *, void *); typedef NV_STATUS (*TIMEPROC_COUNTDOWN)(OBJGPU *, THREAD_STATE_NODE *); @@ -90,49 +94,58 @@ typedef NV_STATUS (*TIMEPROC_COUNTDOWN)(OBJGPU *, THREAD_STATE_NODE *); #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct TimerApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; struct Notifier __nvoc_base_Notifier; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct TimerApi *__nvoc_pbase_TimerApi; - NV_STATUS (*__tmrapiGetRegBaseOffsetAndSize__)(struct TimerApi *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__tmrapiCtrlCmdTmrSetAlarmNotify__)(struct TimerApi *, NV0004_CTRL_TMR_SET_ALARM_NOTIFY_PARAMS *); - NvBool (*__tmrapiShareCallback__)(struct TimerApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__tmrapiCheckMemInterUnmap__)(struct TimerApi *, NvBool); - NV_STATUS (*__tmrapiGetOrAllocNotifShare__)(struct TimerApi *, NvHandle, NvHandle, struct NotifShare **); - NV_STATUS (*__tmrapiMapTo__)(struct TimerApi *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__tmrapiGetMapAddrSpace__)(struct TimerApi *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__tmrapiSetNotificationShare__)(struct TimerApi *, struct NotifShare *); - NvU32 (*__tmrapiGetRefCount__)(struct TimerApi *); - void (*__tmrapiAddAdditionalDependants__)(struct RsClient *, struct TimerApi *, RsResourceRef *); - NV_STATUS (*__tmrapiControl_Prologue__)(struct TimerApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__tmrapiInternalControlForward__)(struct TimerApi *, NvU32, void *, NvU32); - NV_STATUS (*__tmrapiUnmapFrom__)(struct TimerApi *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__tmrapiControl_Epilogue__)(struct TimerApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__tmrapiGetInternalObjectHandle__)(struct TimerApi *); - NV_STATUS (*__tmrapiControl__)(struct TimerApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__tmrapiUnmap__)(struct TimerApi *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__tmrapiGetMemInterMapParams__)(struct TimerApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__tmrapiGetMemoryMappingDescriptor__)(struct TimerApi *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__tmrapiControlFilter__)(struct TimerApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__tmrapiUnregisterEvent__)(struct TimerApi *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__tmrapiControlSerialization_Prologue__)(struct TimerApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__tmrapiCanCopy__)(struct TimerApi *); - NvBool (*__tmrapiIsPartialUnmapSupported__)(struct TimerApi *); - void (*__tmrapiPreDestruct__)(struct TimerApi *); - NV_STATUS (*__tmrapiIsDuplicate__)(struct TimerApi *, NvHandle, NvBool *); - void (*__tmrapiControlSerialization_Epilogue__)(struct TimerApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__tmrapiGetNotificationListPtr__)(struct TimerApi *); - struct NotifShare *(*__tmrapiGetNotificationShare__)(struct TimerApi *); - NV_STATUS (*__tmrapiMap__)(struct TimerApi *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__tmrapiAccessCallback__)(struct TimerApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct INotifier *__nvoc_pbase_INotifier; // inotify super^2 + struct Notifier *__nvoc_pbase_Notifier; // notify super + struct TimerApi *__nvoc_pbase_TimerApi; // tmrapi + + // Vtable with 31 per-object function pointers + NV_STATUS (*__tmrapiGetRegBaseOffsetAndSize__)(struct TimerApi * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual override (gpures) base (gpures) + NV_STATUS (*__tmrapiCtrlCmdTmrSetAlarmNotify__)(struct TimerApi * /*this*/, NV0004_CTRL_TMR_SET_ALARM_NOTIFY_PARAMS *); // exported (id=0x40110) + NV_STATUS (*__tmrapiControl__)(struct TimerApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__tmrapiMap__)(struct TimerApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__tmrapiUnmap__)(struct TimerApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__tmrapiShareCallback__)(struct TimerApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__tmrapiGetMapAddrSpace__)(struct TimerApi * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__tmrapiInternalControlForward__)(struct TimerApi * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__tmrapiGetInternalObjectHandle__)(struct TimerApi * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__tmrapiAccessCallback__)(struct TimerApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__tmrapiGetMemInterMapParams__)(struct TimerApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__tmrapiCheckMemInterUnmap__)(struct TimerApi * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__tmrapiGetMemoryMappingDescriptor__)(struct TimerApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__tmrapiControlSerialization_Prologue__)(struct TimerApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__tmrapiControlSerialization_Epilogue__)(struct TimerApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__tmrapiControl_Prologue__)(struct TimerApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__tmrapiControl_Epilogue__)(struct TimerApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__tmrapiCanCopy__)(struct TimerApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__tmrapiIsDuplicate__)(struct TimerApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__tmrapiPreDestruct__)(struct TimerApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__tmrapiControlFilter__)(struct TimerApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__tmrapiIsPartialUnmapSupported__)(struct TimerApi * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__tmrapiMapTo__)(struct TimerApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__tmrapiUnmapFrom__)(struct TimerApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__tmrapiGetRefCount__)(struct TimerApi * /*this*/); // virtual inherited (res) base (gpures) + void (*__tmrapiAddAdditionalDependants__)(struct RsClient *, struct TimerApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + PEVENTNOTIFICATION * (*__tmrapiGetNotificationListPtr__)(struct TimerApi * /*this*/); // virtual inherited (notify) base (notify) + struct NotifShare * (*__tmrapiGetNotificationShare__)(struct TimerApi * /*this*/); // virtual inherited (notify) base (notify) + void (*__tmrapiSetNotificationShare__)(struct TimerApi * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) + NV_STATUS (*__tmrapiUnregisterEvent__)(struct TimerApi * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) + NV_STATUS (*__tmrapiGetOrAllocNotifShare__)(struct TimerApi * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) }; #ifndef __NVOC_CLASS_TimerApi_TYPEDEF__ @@ -144,6 +157,7 @@ typedef struct TimerApi TimerApi; #define __nvoc_class_id_TimerApi 0xb13ac4 #endif /* __nvoc_class_id_TimerApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_TimerApi; #define __staticCast_TimerApi(pThis) \ @@ -156,171 +170,205 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_TimerApi; ((TimerApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(TimerApi))) #endif //__nvoc_tmr_h_disabled - NV_STATUS __nvoc_objCreateDynamic_TimerApi(TimerApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_TimerApi(TimerApi**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_TimerApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_TimerApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define tmrapiGetRegBaseOffsetAndSize_FNPTR(pTimerApi) pTimerApi->__tmrapiGetRegBaseOffsetAndSize__ #define tmrapiGetRegBaseOffsetAndSize(pTimerApi, pGpu, pOffset, pSize) tmrapiGetRegBaseOffsetAndSize_DISPATCH(pTimerApi, pGpu, pOffset, pSize) +#define tmrapiCtrlCmdTmrSetAlarmNotify_FNPTR(pTimerApi) pTimerApi->__tmrapiCtrlCmdTmrSetAlarmNotify__ #define tmrapiCtrlCmdTmrSetAlarmNotify(pTimerApi, pParams) tmrapiCtrlCmdTmrSetAlarmNotify_DISPATCH(pTimerApi, pParams) +#define tmrapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define tmrapiControl(pGpuResource, pCallContext, pParams) tmrapiControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define tmrapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define tmrapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) tmrapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define tmrapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define tmrapiUnmap(pGpuResource, pCallContext, pCpuMapping) tmrapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define tmrapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define tmrapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) tmrapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define tmrapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) tmrapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define tmrapiGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) tmrapiGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -#define tmrapiMapTo(pResource, pParams) tmrapiMapTo_DISPATCH(pResource, pParams) +#define tmrapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ #define tmrapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) tmrapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define tmrapiSetNotificationShare(pNotifier, pNotifShare) tmrapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define tmrapiGetRefCount(pResource) tmrapiGetRefCount_DISPATCH(pResource) -#define tmrapiAddAdditionalDependants(pClient, pResource, pReference) tmrapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define tmrapiControl_Prologue(pResource, pCallContext, pParams) tmrapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define tmrapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define tmrapiInternalControlForward(pGpuResource, command, pParams, size) tmrapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define tmrapiUnmapFrom(pResource, pParams) tmrapiUnmapFrom_DISPATCH(pResource, pParams) -#define tmrapiControl_Epilogue(pResource, pCallContext, pParams) tmrapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define tmrapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define tmrapiGetInternalObjectHandle(pGpuResource) tmrapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define tmrapiControl(pGpuResource, pCallContext, pParams) tmrapiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define tmrapiUnmap(pGpuResource, pCallContext, pCpuMapping) tmrapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define tmrapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define tmrapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) tmrapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define tmrapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define tmrapiGetMemInterMapParams(pRmResource, pParams) tmrapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define tmrapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define tmrapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) tmrapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define tmrapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define tmrapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) tmrapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define tmrapiControlFilter(pResource, pCallContext, pParams) tmrapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define tmrapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) tmrapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define tmrapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define tmrapiControlSerialization_Prologue(pResource, pCallContext, pParams) tmrapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define tmrapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define tmrapiControlSerialization_Epilogue(pResource, pCallContext, pParams) tmrapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define tmrapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define tmrapiControl_Prologue(pResource, pCallContext, pParams) tmrapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define tmrapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define tmrapiControl_Epilogue(pResource, pCallContext, pParams) tmrapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define tmrapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define tmrapiCanCopy(pResource) tmrapiCanCopy_DISPATCH(pResource) -#define tmrapiIsPartialUnmapSupported(pResource) tmrapiIsPartialUnmapSupported_DISPATCH(pResource) -#define tmrapiPreDestruct(pResource) tmrapiPreDestruct_DISPATCH(pResource) +#define tmrapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define tmrapiIsDuplicate(pResource, hMemory, pDuplicate) tmrapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define tmrapiControlSerialization_Epilogue(pResource, pCallContext, pParams) tmrapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define tmrapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define tmrapiPreDestruct(pResource) tmrapiPreDestruct_DISPATCH(pResource) +#define tmrapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define tmrapiControlFilter(pResource, pCallContext, pParams) tmrapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define tmrapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define tmrapiIsPartialUnmapSupported(pResource) tmrapiIsPartialUnmapSupported_DISPATCH(pResource) +#define tmrapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define tmrapiMapTo(pResource, pParams) tmrapiMapTo_DISPATCH(pResource, pParams) +#define tmrapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define tmrapiUnmapFrom(pResource, pParams) tmrapiUnmapFrom_DISPATCH(pResource, pParams) +#define tmrapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define tmrapiGetRefCount(pResource) tmrapiGetRefCount_DISPATCH(pResource) +#define tmrapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define tmrapiAddAdditionalDependants(pClient, pResource, pReference) tmrapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define tmrapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define tmrapiGetNotificationListPtr(pNotifier) tmrapiGetNotificationListPtr_DISPATCH(pNotifier) +#define tmrapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ #define tmrapiGetNotificationShare(pNotifier) tmrapiGetNotificationShare_DISPATCH(pNotifier) -#define tmrapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) tmrapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define tmrapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) tmrapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS tmrapiGetRegBaseOffsetAndSize_IMPL(struct TimerApi *pTimerApi, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); +#define tmrapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define tmrapiSetNotificationShare(pNotifier, pNotifShare) tmrapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define tmrapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define tmrapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) tmrapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define tmrapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define tmrapiGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) tmrapiGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) +// Dispatch functions static inline NV_STATUS tmrapiGetRegBaseOffsetAndSize_DISPATCH(struct TimerApi *pTimerApi, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pTimerApi->__tmrapiGetRegBaseOffsetAndSize__(pTimerApi, pGpu, pOffset, pSize); } -NV_STATUS tmrapiCtrlCmdTmrSetAlarmNotify_IMPL(struct TimerApi *pTimerApi, NV0004_CTRL_TMR_SET_ALARM_NOTIFY_PARAMS *pParams); - static inline NV_STATUS tmrapiCtrlCmdTmrSetAlarmNotify_DISPATCH(struct TimerApi *pTimerApi, NV0004_CTRL_TMR_SET_ALARM_NOTIFY_PARAMS *pParams) { return pTimerApi->__tmrapiCtrlCmdTmrSetAlarmNotify__(pTimerApi, pParams); } -static inline NvBool tmrapiShareCallback_DISPATCH(struct TimerApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__tmrapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS tmrapiControl_DISPATCH(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__tmrapiControl__(pGpuResource, pCallContext, pParams); } -static inline NV_STATUS tmrapiCheckMemInterUnmap_DISPATCH(struct TimerApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__tmrapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS tmrapiMap_DISPATCH(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__tmrapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS tmrapiGetOrAllocNotifShare_DISPATCH(struct TimerApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__tmrapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); +static inline NV_STATUS tmrapiUnmap_DISPATCH(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__tmrapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS tmrapiMapTo_DISPATCH(struct TimerApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__tmrapiMapTo__(pResource, pParams); +static inline NvBool tmrapiShareCallback_DISPATCH(struct TimerApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__tmrapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS tmrapiGetMapAddrSpace_DISPATCH(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__tmrapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void tmrapiSetNotificationShare_DISPATCH(struct TimerApi *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__tmrapiSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS tmrapiInternalControlForward_DISPATCH(struct TimerApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__tmrapiInternalControlForward__(pGpuResource, command, pParams, size); } -static inline NvU32 tmrapiGetRefCount_DISPATCH(struct TimerApi *pResource) { - return pResource->__tmrapiGetRefCount__(pResource); +static inline NvHandle tmrapiGetInternalObjectHandle_DISPATCH(struct TimerApi *pGpuResource) { + return pGpuResource->__tmrapiGetInternalObjectHandle__(pGpuResource); } -static inline void tmrapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct TimerApi *pResource, RsResourceRef *pReference) { - pResource->__tmrapiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvBool tmrapiAccessCallback_DISPATCH(struct TimerApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__tmrapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS tmrapiControl_Prologue_DISPATCH(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__tmrapiControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS tmrapiGetMemInterMapParams_DISPATCH(struct TimerApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__tmrapiGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS tmrapiInternalControlForward_DISPATCH(struct TimerApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__tmrapiInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS tmrapiCheckMemInterUnmap_DISPATCH(struct TimerApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__tmrapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS tmrapiUnmapFrom_DISPATCH(struct TimerApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__tmrapiUnmapFrom__(pResource, pParams); +static inline NV_STATUS tmrapiGetMemoryMappingDescriptor_DISPATCH(struct TimerApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__tmrapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline void tmrapiControl_Epilogue_DISPATCH(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__tmrapiControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS tmrapiControlSerialization_Prologue_DISPATCH(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__tmrapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvHandle tmrapiGetInternalObjectHandle_DISPATCH(struct TimerApi *pGpuResource) { - return pGpuResource->__tmrapiGetInternalObjectHandle__(pGpuResource); +static inline void tmrapiControlSerialization_Epilogue_DISPATCH(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__tmrapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS tmrapiControl_DISPATCH(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__tmrapiControl__(pGpuResource, pCallContext, pParams); +static inline NV_STATUS tmrapiControl_Prologue_DISPATCH(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__tmrapiControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS tmrapiUnmap_DISPATCH(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__tmrapiUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline void tmrapiControl_Epilogue_DISPATCH(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__tmrapiControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS tmrapiGetMemInterMapParams_DISPATCH(struct TimerApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__tmrapiGetMemInterMapParams__(pRmResource, pParams); +static inline NvBool tmrapiCanCopy_DISPATCH(struct TimerApi *pResource) { + return pResource->__tmrapiCanCopy__(pResource); } -static inline NV_STATUS tmrapiGetMemoryMappingDescriptor_DISPATCH(struct TimerApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__tmrapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS tmrapiIsDuplicate_DISPATCH(struct TimerApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__tmrapiIsDuplicate__(pResource, hMemory, pDuplicate); +} + +static inline void tmrapiPreDestruct_DISPATCH(struct TimerApi *pResource) { + pResource->__tmrapiPreDestruct__(pResource); } static inline NV_STATUS tmrapiControlFilter_DISPATCH(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__tmrapiControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS tmrapiUnregisterEvent_DISPATCH(struct TimerApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__tmrapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline NvBool tmrapiIsPartialUnmapSupported_DISPATCH(struct TimerApi *pResource) { + return pResource->__tmrapiIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS tmrapiControlSerialization_Prologue_DISPATCH(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__tmrapiControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS tmrapiMapTo_DISPATCH(struct TimerApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__tmrapiMapTo__(pResource, pParams); } -static inline NvBool tmrapiCanCopy_DISPATCH(struct TimerApi *pResource) { - return pResource->__tmrapiCanCopy__(pResource); +static inline NV_STATUS tmrapiUnmapFrom_DISPATCH(struct TimerApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__tmrapiUnmapFrom__(pResource, pParams); } -static inline NvBool tmrapiIsPartialUnmapSupported_DISPATCH(struct TimerApi *pResource) { - return pResource->__tmrapiIsPartialUnmapSupported__(pResource); +static inline NvU32 tmrapiGetRefCount_DISPATCH(struct TimerApi *pResource) { + return pResource->__tmrapiGetRefCount__(pResource); } -static inline void tmrapiPreDestruct_DISPATCH(struct TimerApi *pResource) { - pResource->__tmrapiPreDestruct__(pResource); +static inline void tmrapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct TimerApi *pResource, RsResourceRef *pReference) { + pResource->__tmrapiAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NV_STATUS tmrapiIsDuplicate_DISPATCH(struct TimerApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__tmrapiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline PEVENTNOTIFICATION * tmrapiGetNotificationListPtr_DISPATCH(struct TimerApi *pNotifier) { + return pNotifier->__tmrapiGetNotificationListPtr__(pNotifier); } -static inline void tmrapiControlSerialization_Epilogue_DISPATCH(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__tmrapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline struct NotifShare * tmrapiGetNotificationShare_DISPATCH(struct TimerApi *pNotifier) { + return pNotifier->__tmrapiGetNotificationShare__(pNotifier); } -static inline PEVENTNOTIFICATION *tmrapiGetNotificationListPtr_DISPATCH(struct TimerApi *pNotifier) { - return pNotifier->__tmrapiGetNotificationListPtr__(pNotifier); +static inline void tmrapiSetNotificationShare_DISPATCH(struct TimerApi *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__tmrapiSetNotificationShare__(pNotifier, pNotifShare); } -static inline struct NotifShare *tmrapiGetNotificationShare_DISPATCH(struct TimerApi *pNotifier) { - return pNotifier->__tmrapiGetNotificationShare__(pNotifier); +static inline NV_STATUS tmrapiUnregisterEvent_DISPATCH(struct TimerApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__tmrapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static inline NV_STATUS tmrapiMap_DISPATCH(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__tmrapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS tmrapiGetOrAllocNotifShare_DISPATCH(struct TimerApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return pNotifier->__tmrapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } -static inline NvBool tmrapiAccessCallback_DISPATCH(struct TimerApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__tmrapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} +NV_STATUS tmrapiGetRegBaseOffsetAndSize_IMPL(struct TimerApi *pTimerApi, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); + +NV_STATUS tmrapiCtrlCmdTmrSetAlarmNotify_IMPL(struct TimerApi *pTimerApi, NV0004_CTRL_TMR_SET_ALARM_NOTIFY_PARAMS *pParams); NV_STATUS tmrapiConstruct_IMPL(struct TimerApi *arg_pTimerApi, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_traceable_nvoc.c b/src/nvidia/generated/g_traceable_nvoc.c index 5d4d94ae69..3029cc6ea9 100644 --- a/src/nvidia/generated/g_traceable_nvoc.c +++ b/src/nvidia/generated/g_traceable_nvoc.c @@ -73,10 +73,13 @@ NV_STATUS __nvoc_ctor_OBJTRACEABLE(OBJTRACEABLE *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJTRACEABLE_1(OBJTRACEABLE *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_OBJTRACEABLE_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_OBJTRACEABLE(OBJTRACEABLE *pThis) { __nvoc_init_funcTable_OBJTRACEABLE_1(pThis); } diff --git a/src/nvidia/generated/g_traceable_nvoc.h b/src/nvidia/generated/g_traceable_nvoc.h index fd31119f2f..86ca72dd3c 100644 --- a/src/nvidia/generated/g_traceable_nvoc.h +++ b/src/nvidia/generated/g_traceable_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_TRACEABLE_NVOC_H_ #define _G_TRACEABLE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_traceable_nvoc.h" #ifndef __ANCI_TRACEABLE_H__ @@ -45,9 +53,14 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJTRACEABLE { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; - struct OBJTRACEABLE *__nvoc_pbase_OBJTRACEABLE; + + // Ancestor object pointers for `staticCast` feature + struct OBJTRACEABLE *__nvoc_pbase_OBJTRACEABLE; // traceable }; #ifndef __NVOC_CLASS_OBJTRACEABLE_TYPEDEF__ @@ -59,6 +72,7 @@ typedef struct OBJTRACEABLE OBJTRACEABLE; #define __nvoc_class_id_OBJTRACEABLE 0x6305d2 #endif /* __nvoc_class_id_OBJTRACEABLE */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJTRACEABLE; #define __staticCast_OBJTRACEABLE(pThis) \ @@ -71,7 +85,6 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJTRACEABLE; ((OBJTRACEABLE*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJTRACEABLE))) #endif //__nvoc_traceable_h_disabled - NV_STATUS __nvoc_objCreateDynamic_OBJTRACEABLE(OBJTRACEABLE**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_OBJTRACEABLE(OBJTRACEABLE**, Dynamic*, NvU32); diff --git a/src/nvidia/generated/g_usermode_api_nvoc.c b/src/nvidia/generated/g_usermode_api_nvoc.c index 3a46659254..659a4496ea 100644 --- a/src/nvidia/generated/g_usermode_api_nvoc.c +++ b/src/nvidia/generated/g_usermode_api_nvoc.c @@ -93,110 +93,142 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_UserModeApi = /*pExportInfo=*/ &__nvoc_export_info_UserModeApi }; -static NvBool __nvoc_thunk_UserModeApi_resCanCopy(struct RsResource *pUserModeApi) { - return usrmodeCanCopy((struct UserModeApi *)(((unsigned char *)pUserModeApi) - __nvoc_rtti_UserModeApi_RsResource.offset)); +// 2 down-thunk(s) defined to bridge methods in UserModeApi from superclasses + +// usrmodeCanCopy: virtual override (res) base (mem) +static NvBool __nvoc_down_thunk_UserModeApi_resCanCopy(struct RsResource *pUserModeApi) { + return usrmodeCanCopy((struct UserModeApi *)(((unsigned char *) pUserModeApi) - __nvoc_rtti_UserModeApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_UserModeApi_memGetMemInterMapParams(struct Memory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return usrmodeGetMemInterMapParams((struct UserModeApi *)(((unsigned char *)pMemory) - __nvoc_rtti_UserModeApi_Memory.offset), pParams); +// usrmodeGetMemInterMapParams: virtual override (rmres) base (mem) +static NV_STATUS __nvoc_down_thunk_UserModeApi_memGetMemInterMapParams(struct Memory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return usrmodeGetMemInterMapParams((struct UserModeApi *)(((unsigned char *) pMemory) - __nvoc_rtti_UserModeApi_Memory.offset), pParams); } -static NV_STATUS __nvoc_thunk_Memory_usrmodeCheckMemInterUnmap(struct UserModeApi *pMemory, NvBool bSubdeviceHandleProvided) { - return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), bSubdeviceHandleProvided); + +// 24 up-thunk(s) defined to bridge methods in UserModeApi to superclasses + +// usrmodeIsDuplicate: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_usrmodeIsDuplicate(struct UserModeApi *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_RmResource_usrmodeShareCallback(struct UserModeApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_UserModeApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// usrmodeGetMapAddrSpace: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_usrmodeGetMapAddrSpace(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_RsResource_usrmodeMapTo(struct UserModeApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UserModeApi_RsResource.offset), pParams); +// usrmodeControl: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_usrmodeControl(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_usrmodeGetMapAddrSpace(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return memGetMapAddrSpace((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), pCallContext, mapFlags, pAddrSpace); +// usrmodeMap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_usrmodeMap(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), pCallContext, pParams, pCpuMapping); } -static NvBool __nvoc_thunk_Memory_usrmodeIsExportAllowed(struct UserModeApi *pMemory) { - return memIsExportAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_UserModeApi_Memory.offset)); +// usrmodeUnmap: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_usrmodeUnmap(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), pCallContext, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_usrmodeGetRefCount(struct UserModeApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UserModeApi_RsResource.offset)); +// usrmodeCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_usrmodeCheckMemInterUnmap(struct UserModeApi *pMemory, NvBool bSubdeviceHandleProvided) { + return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), bSubdeviceHandleProvided); } -static void __nvoc_thunk_RsResource_usrmodeAddAdditionalDependants(struct RsClient *pClient, struct UserModeApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UserModeApi_RsResource.offset), pReference); +// usrmodeGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_usrmodeGetMemoryMappingDescriptor(struct UserModeApi *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_RmResource_usrmodeControl_Prologue(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_UserModeApi_RmResource.offset), pCallContext, pParams); +// usrmodeCheckCopyPermissions: inline virtual inherited (mem) base (mem) body +static NV_STATUS __nvoc_up_thunk_Memory_usrmodeCheckCopyPermissions(struct UserModeApi *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), pDstGpu, pDstDevice); } -static NvBool __nvoc_thunk_Memory_usrmodeIsGpuMapAllowed(struct UserModeApi *pMemory, struct OBJGPU *pGpu) { - return memIsGpuMapAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), pGpu); +// usrmodeIsReady: virtual inherited (mem) base (mem) +static NV_STATUS __nvoc_up_thunk_Memory_usrmodeIsReady(struct UserModeApi *pMemory, NvBool bCopyConstructorContext) { + return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), bCopyConstructorContext); } -static NV_STATUS __nvoc_thunk_RsResource_usrmodeUnmapFrom(struct UserModeApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UserModeApi_RsResource.offset), pParams); +// usrmodeIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_usrmodeIsGpuMapAllowed(struct UserModeApi *pMemory, struct OBJGPU *pGpu) { + return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), pGpu); } -static void __nvoc_thunk_RmResource_usrmodeControl_Epilogue(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_UserModeApi_RmResource.offset), pCallContext, pParams); +// usrmodeIsExportAllowed: inline virtual inherited (mem) base (mem) body +static NvBool __nvoc_up_thunk_Memory_usrmodeIsExportAllowed(struct UserModeApi *pMemory) { + return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset)); } -static NV_STATUS __nvoc_thunk_Memory_usrmodeControl(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memControl((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), pCallContext, pParams); +// usrmodeAccessCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_usrmodeAccessCallback(struct UserModeApi *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_Memory_usrmodeUnmap(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), pCallContext, pCpuMapping); +// usrmodeShareCallback: virtual inherited (rmres) base (mem) +static NvBool __nvoc_up_thunk_RmResource_usrmodeShareCallback(struct UserModeApi *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_Memory_usrmodeGetMemoryMappingDescriptor(struct UserModeApi *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), ppMemDesc); +// usrmodeControlSerialization_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_usrmodeControlSerialization_Prologue(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_usrmodeControlFilter(struct UserModeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UserModeApi_RsResource.offset), pCallContext, pParams); +// usrmodeControlSerialization_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_usrmodeControlSerialization_Epilogue(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_usrmodeControlSerialization_Prologue(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_UserModeApi_RmResource.offset), pCallContext, pParams); +// usrmodeControl_Prologue: virtual inherited (rmres) base (mem) +static NV_STATUS __nvoc_up_thunk_RmResource_usrmodeControl_Prologue(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_usrmodeIsPartialUnmapSupported(struct UserModeApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UserModeApi_RsResource.offset)); +// usrmodeControl_Epilogue: virtual inherited (rmres) base (mem) +static void __nvoc_up_thunk_RmResource_usrmodeControl_Epilogue(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_usrmodeIsReady(struct UserModeApi *pMemory, NvBool bCopyConstructorContext) { - return memIsReady((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), bCopyConstructorContext); +// usrmodePreDestruct: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_usrmodePreDestruct(struct UserModeApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_usrmodeCheckCopyPermissions(struct UserModeApi *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return memCheckCopyPermissions((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), pDstGpu, pDstDevice); +// usrmodeControlFilter: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_usrmodeControlFilter(struct UserModeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_usrmodePreDestruct(struct UserModeApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UserModeApi_RsResource.offset)); +// usrmodeIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body +static NvBool __nvoc_up_thunk_RsResource_usrmodeIsPartialUnmapSupported(struct UserModeApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_usrmodeIsDuplicate(struct UserModeApi *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), hMemory, pDuplicate); +// usrmodeMapTo: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_usrmodeMapTo(struct UserModeApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_usrmodeControlSerialization_Epilogue(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_UserModeApi_RmResource.offset), pCallContext, pParams); +// usrmodeUnmapFrom: virtual inherited (res) base (mem) +static NV_STATUS __nvoc_up_thunk_RsResource_usrmodeUnmapFrom(struct UserModeApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_Memory_usrmodeMap(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), pCallContext, pParams, pCpuMapping); +// usrmodeGetRefCount: virtual inherited (res) base (mem) +static NvU32 __nvoc_up_thunk_RsResource_usrmodeGetRefCount(struct UserModeApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_usrmodeAccessCallback(struct UserModeApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_UserModeApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// usrmodeAddAdditionalDependants: virtual inherited (res) base (mem) +static void __nvoc_up_thunk_RsResource_usrmodeAddAdditionalDependants(struct RsClient *pClient, struct UserModeApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_UserModeApi = { /*numEntries=*/ 0, @@ -232,67 +264,96 @@ NV_STATUS __nvoc_ctor_UserModeApi(UserModeApi *pThis, CALL_CONTEXT * arg_pCallCo return status; } +// Vtable initialization static void __nvoc_init_funcTable_UserModeApi_1(UserModeApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // usrmodeCanCopy -- virtual override (res) base (mem) pThis->__usrmodeCanCopy__ = &usrmodeCanCopy_IMPL; + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_UserModeApi_resCanCopy; + // usrmodeGetMemInterMapParams -- virtual override (rmres) base (mem) pThis->__usrmodeGetMemInterMapParams__ = &usrmodeGetMemInterMapParams_IMPL; + pThis->__nvoc_base_Memory.__memGetMemInterMapParams__ = &__nvoc_down_thunk_UserModeApi_memGetMemInterMapParams; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_UserModeApi_resCanCopy; + // usrmodeIsDuplicate -- virtual inherited (mem) base (mem) + pThis->__usrmodeIsDuplicate__ = &__nvoc_up_thunk_Memory_usrmodeIsDuplicate; - pThis->__nvoc_base_Memory.__memGetMemInterMapParams__ = &__nvoc_thunk_UserModeApi_memGetMemInterMapParams; + // usrmodeGetMapAddrSpace -- virtual inherited (mem) base (mem) + pThis->__usrmodeGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_usrmodeGetMapAddrSpace; - pThis->__usrmodeCheckMemInterUnmap__ = &__nvoc_thunk_Memory_usrmodeCheckMemInterUnmap; + // usrmodeControl -- virtual inherited (mem) base (mem) + pThis->__usrmodeControl__ = &__nvoc_up_thunk_Memory_usrmodeControl; - pThis->__usrmodeShareCallback__ = &__nvoc_thunk_RmResource_usrmodeShareCallback; + // usrmodeMap -- virtual inherited (mem) base (mem) + pThis->__usrmodeMap__ = &__nvoc_up_thunk_Memory_usrmodeMap; - pThis->__usrmodeMapTo__ = &__nvoc_thunk_RsResource_usrmodeMapTo; + // usrmodeUnmap -- virtual inherited (mem) base (mem) + pThis->__usrmodeUnmap__ = &__nvoc_up_thunk_Memory_usrmodeUnmap; - pThis->__usrmodeGetMapAddrSpace__ = &__nvoc_thunk_Memory_usrmodeGetMapAddrSpace; + // usrmodeCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body + pThis->__usrmodeCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_usrmodeCheckMemInterUnmap; - pThis->__usrmodeIsExportAllowed__ = &__nvoc_thunk_Memory_usrmodeIsExportAllowed; + // usrmodeGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) + pThis->__usrmodeGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_usrmodeGetMemoryMappingDescriptor; - pThis->__usrmodeGetRefCount__ = &__nvoc_thunk_RsResource_usrmodeGetRefCount; + // usrmodeCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body + pThis->__usrmodeCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_usrmodeCheckCopyPermissions; - pThis->__usrmodeAddAdditionalDependants__ = &__nvoc_thunk_RsResource_usrmodeAddAdditionalDependants; + // usrmodeIsReady -- virtual inherited (mem) base (mem) + pThis->__usrmodeIsReady__ = &__nvoc_up_thunk_Memory_usrmodeIsReady; - pThis->__usrmodeControl_Prologue__ = &__nvoc_thunk_RmResource_usrmodeControl_Prologue; + // usrmodeIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__usrmodeIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_usrmodeIsGpuMapAllowed; - pThis->__usrmodeIsGpuMapAllowed__ = &__nvoc_thunk_Memory_usrmodeIsGpuMapAllowed; + // usrmodeIsExportAllowed -- inline virtual inherited (mem) base (mem) body + pThis->__usrmodeIsExportAllowed__ = &__nvoc_up_thunk_Memory_usrmodeIsExportAllowed; - pThis->__usrmodeUnmapFrom__ = &__nvoc_thunk_RsResource_usrmodeUnmapFrom; + // usrmodeAccessCallback -- virtual inherited (rmres) base (mem) + pThis->__usrmodeAccessCallback__ = &__nvoc_up_thunk_RmResource_usrmodeAccessCallback; - pThis->__usrmodeControl_Epilogue__ = &__nvoc_thunk_RmResource_usrmodeControl_Epilogue; + // usrmodeShareCallback -- virtual inherited (rmres) base (mem) + pThis->__usrmodeShareCallback__ = &__nvoc_up_thunk_RmResource_usrmodeShareCallback; - pThis->__usrmodeControl__ = &__nvoc_thunk_Memory_usrmodeControl; + // usrmodeControlSerialization_Prologue -- virtual inherited (rmres) base (mem) + pThis->__usrmodeControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_usrmodeControlSerialization_Prologue; - pThis->__usrmodeUnmap__ = &__nvoc_thunk_Memory_usrmodeUnmap; + // usrmodeControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__usrmodeControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_usrmodeControlSerialization_Epilogue; - pThis->__usrmodeGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_usrmodeGetMemoryMappingDescriptor; + // usrmodeControl_Prologue -- virtual inherited (rmres) base (mem) + pThis->__usrmodeControl_Prologue__ = &__nvoc_up_thunk_RmResource_usrmodeControl_Prologue; - pThis->__usrmodeControlFilter__ = &__nvoc_thunk_RsResource_usrmodeControlFilter; + // usrmodeControl_Epilogue -- virtual inherited (rmres) base (mem) + pThis->__usrmodeControl_Epilogue__ = &__nvoc_up_thunk_RmResource_usrmodeControl_Epilogue; - pThis->__usrmodeControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_usrmodeControlSerialization_Prologue; + // usrmodePreDestruct -- virtual inherited (res) base (mem) + pThis->__usrmodePreDestruct__ = &__nvoc_up_thunk_RsResource_usrmodePreDestruct; - pThis->__usrmodeIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_usrmodeIsPartialUnmapSupported; + // usrmodeControlFilter -- virtual inherited (res) base (mem) + pThis->__usrmodeControlFilter__ = &__nvoc_up_thunk_RsResource_usrmodeControlFilter; - pThis->__usrmodeIsReady__ = &__nvoc_thunk_Memory_usrmodeIsReady; + // usrmodeIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body + pThis->__usrmodeIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_usrmodeIsPartialUnmapSupported; - pThis->__usrmodeCheckCopyPermissions__ = &__nvoc_thunk_Memory_usrmodeCheckCopyPermissions; + // usrmodeMapTo -- virtual inherited (res) base (mem) + pThis->__usrmodeMapTo__ = &__nvoc_up_thunk_RsResource_usrmodeMapTo; - pThis->__usrmodePreDestruct__ = &__nvoc_thunk_RsResource_usrmodePreDestruct; + // usrmodeUnmapFrom -- virtual inherited (res) base (mem) + pThis->__usrmodeUnmapFrom__ = &__nvoc_up_thunk_RsResource_usrmodeUnmapFrom; - pThis->__usrmodeIsDuplicate__ = &__nvoc_thunk_Memory_usrmodeIsDuplicate; + // usrmodeGetRefCount -- virtual inherited (res) base (mem) + pThis->__usrmodeGetRefCount__ = &__nvoc_up_thunk_RsResource_usrmodeGetRefCount; - pThis->__usrmodeControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_usrmodeControlSerialization_Epilogue; + // usrmodeAddAdditionalDependants -- virtual inherited (res) base (mem) + pThis->__usrmodeAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_usrmodeAddAdditionalDependants; +} // End __nvoc_init_funcTable_UserModeApi_1 with approximately 28 basic block(s). - pThis->__usrmodeMap__ = &__nvoc_thunk_Memory_usrmodeMap; - - pThis->__usrmodeAccessCallback__ = &__nvoc_thunk_RmResource_usrmodeAccessCallback; -} +// Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_UserModeApi(UserModeApi *pThis) { + + // Initialize vtable(s) with 26 per-object function pointer(s). __nvoc_init_funcTable_UserModeApi_1(pThis); } diff --git a/src/nvidia/generated/g_usermode_api_nvoc.h b/src/nvidia/generated/g_usermode_api_nvoc.h index c046d5d4e6..3ed72b63c2 100644 --- a/src/nvidia/generated/g_usermode_api_nvoc.h +++ b/src/nvidia/generated/g_usermode_api_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_USERMODE_API_NVOC_H_ #define _G_USERMODE_API_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_usermode_api_nvoc.h" #ifndef _USERMODE_API_H_ @@ -54,41 +62,52 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct UserModeApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Memory *__nvoc_pbase_Memory; - struct UserModeApi *__nvoc_pbase_UserModeApi; - NvBool (*__usrmodeCanCopy__)(struct UserModeApi *); - NV_STATUS (*__usrmodeGetMemInterMapParams__)(struct UserModeApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__usrmodeCheckMemInterUnmap__)(struct UserModeApi *, NvBool); - NvBool (*__usrmodeShareCallback__)(struct UserModeApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__usrmodeMapTo__)(struct UserModeApi *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__usrmodeGetMapAddrSpace__)(struct UserModeApi *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvBool (*__usrmodeIsExportAllowed__)(struct UserModeApi *); - NvU32 (*__usrmodeGetRefCount__)(struct UserModeApi *); - void (*__usrmodeAddAdditionalDependants__)(struct RsClient *, struct UserModeApi *, RsResourceRef *); - NV_STATUS (*__usrmodeControl_Prologue__)(struct UserModeApi *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__usrmodeIsGpuMapAllowed__)(struct UserModeApi *, struct OBJGPU *); - NV_STATUS (*__usrmodeUnmapFrom__)(struct UserModeApi *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__usrmodeControl_Epilogue__)(struct UserModeApi *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__usrmodeControl__)(struct UserModeApi *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__usrmodeUnmap__)(struct UserModeApi *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__usrmodeGetMemoryMappingDescriptor__)(struct UserModeApi *, MEMORY_DESCRIPTOR **); - NV_STATUS (*__usrmodeControlFilter__)(struct UserModeApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__usrmodeControlSerialization_Prologue__)(struct UserModeApi *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__usrmodeIsPartialUnmapSupported__)(struct UserModeApi *); - NV_STATUS (*__usrmodeIsReady__)(struct UserModeApi *, NvBool); - NV_STATUS (*__usrmodeCheckCopyPermissions__)(struct UserModeApi *, struct OBJGPU *, struct Device *); - void (*__usrmodePreDestruct__)(struct UserModeApi *); - NV_STATUS (*__usrmodeIsDuplicate__)(struct UserModeApi *, NvHandle, NvBool *); - void (*__usrmodeControlSerialization_Epilogue__)(struct UserModeApi *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__usrmodeMap__)(struct UserModeApi *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__usrmodeAccessCallback__)(struct UserModeApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct Memory *__nvoc_pbase_Memory; // mem super + struct UserModeApi *__nvoc_pbase_UserModeApi; // usrmode + + // Vtable with 26 per-object function pointers + NvBool (*__usrmodeCanCopy__)(struct UserModeApi * /*this*/); // virtual override (res) base (mem) + NV_STATUS (*__usrmodeGetMemInterMapParams__)(struct UserModeApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual override (rmres) base (mem) + NV_STATUS (*__usrmodeIsDuplicate__)(struct UserModeApi * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) + NV_STATUS (*__usrmodeGetMapAddrSpace__)(struct UserModeApi * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) + NV_STATUS (*__usrmodeControl__)(struct UserModeApi * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (mem) base (mem) + NV_STATUS (*__usrmodeMap__)(struct UserModeApi * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__usrmodeUnmap__)(struct UserModeApi * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (mem) base (mem) + NV_STATUS (*__usrmodeCheckMemInterUnmap__)(struct UserModeApi * /*this*/, NvBool); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__usrmodeGetMemoryMappingDescriptor__)(struct UserModeApi * /*this*/, MEMORY_DESCRIPTOR **); // virtual inherited (mem) base (mem) + NV_STATUS (*__usrmodeCheckCopyPermissions__)(struct UserModeApi * /*this*/, struct OBJGPU *, struct Device *); // inline virtual inherited (mem) base (mem) body + NV_STATUS (*__usrmodeIsReady__)(struct UserModeApi * /*this*/, NvBool); // virtual inherited (mem) base (mem) + NvBool (*__usrmodeIsGpuMapAllowed__)(struct UserModeApi * /*this*/, struct OBJGPU *); // inline virtual inherited (mem) base (mem) body + NvBool (*__usrmodeIsExportAllowed__)(struct UserModeApi * /*this*/); // inline virtual inherited (mem) base (mem) body + NvBool (*__usrmodeAccessCallback__)(struct UserModeApi * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (mem) + NvBool (*__usrmodeShareCallback__)(struct UserModeApi * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__usrmodeControlSerialization_Prologue__)(struct UserModeApi * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__usrmodeControlSerialization_Epilogue__)(struct UserModeApi * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + NV_STATUS (*__usrmodeControl_Prologue__)(struct UserModeApi * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__usrmodeControl_Epilogue__)(struct UserModeApi * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (mem) + void (*__usrmodePreDestruct__)(struct UserModeApi * /*this*/); // virtual inherited (res) base (mem) + NV_STATUS (*__usrmodeControlFilter__)(struct UserModeApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (mem) + NvBool (*__usrmodeIsPartialUnmapSupported__)(struct UserModeApi * /*this*/); // inline virtual inherited (res) base (mem) body + NV_STATUS (*__usrmodeMapTo__)(struct UserModeApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (mem) + NV_STATUS (*__usrmodeUnmapFrom__)(struct UserModeApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (mem) + NvU32 (*__usrmodeGetRefCount__)(struct UserModeApi * /*this*/); // virtual inherited (res) base (mem) + void (*__usrmodeAddAdditionalDependants__)(struct RsClient *, struct UserModeApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (mem) + + // Data members NvBool bPrivMapping; NvBool bInternalMmio; }; @@ -102,6 +121,7 @@ typedef struct UserModeApi UserModeApi; #define __nvoc_class_id_UserModeApi 0x6f57ec #endif /* __nvoc_class_id_UserModeApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_UserModeApi; #define __staticCast_UserModeApi(pThis) \ @@ -114,147 +134,176 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_UserModeApi; ((UserModeApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(UserModeApi))) #endif //__nvoc_usermode_api_h_disabled - NV_STATUS __nvoc_objCreateDynamic_UserModeApi(UserModeApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_UserModeApi(UserModeApi**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_UserModeApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_UserModeApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define usrmodeCanCopy_FNPTR(pUserModeApi) pUserModeApi->__usrmodeCanCopy__ #define usrmodeCanCopy(pUserModeApi) usrmodeCanCopy_DISPATCH(pUserModeApi) +#define usrmodeGetMemInterMapParams_FNPTR(pMemory) pMemory->__usrmodeGetMemInterMapParams__ #define usrmodeGetMemInterMapParams(pMemory, pParams) usrmodeGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define usrmodeCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) usrmodeCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define usrmodeShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) usrmodeShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define usrmodeMapTo(pResource, pParams) usrmodeMapTo_DISPATCH(pResource, pParams) +#define usrmodeIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define usrmodeIsDuplicate(pMemory, hMemory, pDuplicate) usrmodeIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) +#define usrmodeGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ #define usrmodeGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) usrmodeGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define usrmodeIsExportAllowed(pMemory) usrmodeIsExportAllowed_DISPATCH(pMemory) -#define usrmodeGetRefCount(pResource) usrmodeGetRefCount_DISPATCH(pResource) -#define usrmodeAddAdditionalDependants(pClient, pResource, pReference) usrmodeAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define usrmodeControl_Prologue(pResource, pCallContext, pParams) usrmodeControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define usrmodeIsGpuMapAllowed(pMemory, pGpu) usrmodeIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define usrmodeUnmapFrom(pResource, pParams) usrmodeUnmapFrom_DISPATCH(pResource, pParams) -#define usrmodeControl_Epilogue(pResource, pCallContext, pParams) usrmodeControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define usrmodeControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ #define usrmodeControl(pMemory, pCallContext, pParams) usrmodeControl_DISPATCH(pMemory, pCallContext, pParams) +#define usrmodeMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define usrmodeMap(pMemory, pCallContext, pParams, pCpuMapping) usrmodeMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define usrmodeUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ #define usrmodeUnmap(pMemory, pCallContext, pCpuMapping) usrmodeUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) +#define usrmodeCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define usrmodeCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) usrmodeCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) +#define usrmodeGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ #define usrmodeGetMemoryMappingDescriptor(pMemory, ppMemDesc) usrmodeGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define usrmodeControlFilter(pResource, pCallContext, pParams) usrmodeControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define usrmodeControlSerialization_Prologue(pResource, pCallContext, pParams) usrmodeControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define usrmodeIsPartialUnmapSupported(pResource) usrmodeIsPartialUnmapSupported_DISPATCH(pResource) -#define usrmodeIsReady(pMemory, bCopyConstructorContext) usrmodeIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define usrmodeCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ #define usrmodeCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) usrmodeCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define usrmodePreDestruct(pResource) usrmodePreDestruct_DISPATCH(pResource) -#define usrmodeIsDuplicate(pMemory, hMemory, pDuplicate) usrmodeIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define usrmodeControlSerialization_Epilogue(pResource, pCallContext, pParams) usrmodeControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define usrmodeMap(pMemory, pCallContext, pParams, pCpuMapping) usrmodeMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define usrmodeIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define usrmodeIsReady(pMemory, bCopyConstructorContext) usrmodeIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define usrmodeIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define usrmodeIsGpuMapAllowed(pMemory, pGpu) usrmodeIsGpuMapAllowed_DISPATCH(pMemory, pGpu) +#define usrmodeIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define usrmodeIsExportAllowed(pMemory) usrmodeIsExportAllowed_DISPATCH(pMemory) +#define usrmodeAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ #define usrmodeAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) usrmodeAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool usrmodeCanCopy_IMPL(struct UserModeApi *pUserModeApi); +#define usrmodeShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define usrmodeShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) usrmodeShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define usrmodeControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define usrmodeControlSerialization_Prologue(pResource, pCallContext, pParams) usrmodeControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define usrmodeControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define usrmodeControlSerialization_Epilogue(pResource, pCallContext, pParams) usrmodeControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define usrmodeControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define usrmodeControl_Prologue(pResource, pCallContext, pParams) usrmodeControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define usrmodeControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define usrmodeControl_Epilogue(pResource, pCallContext, pParams) usrmodeControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define usrmodePreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define usrmodePreDestruct(pResource) usrmodePreDestruct_DISPATCH(pResource) +#define usrmodeControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define usrmodeControlFilter(pResource, pCallContext, pParams) usrmodeControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define usrmodeIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define usrmodeIsPartialUnmapSupported(pResource) usrmodeIsPartialUnmapSupported_DISPATCH(pResource) +#define usrmodeMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define usrmodeMapTo(pResource, pParams) usrmodeMapTo_DISPATCH(pResource, pParams) +#define usrmodeUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define usrmodeUnmapFrom(pResource, pParams) usrmodeUnmapFrom_DISPATCH(pResource, pParams) +#define usrmodeGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define usrmodeGetRefCount(pResource) usrmodeGetRefCount_DISPATCH(pResource) +#define usrmodeAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define usrmodeAddAdditionalDependants(pClient, pResource, pReference) usrmodeAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NvBool usrmodeCanCopy_DISPATCH(struct UserModeApi *pUserModeApi) { return pUserModeApi->__usrmodeCanCopy__(pUserModeApi); } -NV_STATUS usrmodeGetMemInterMapParams_IMPL(struct UserModeApi *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); - static inline NV_STATUS usrmodeGetMemInterMapParams_DISPATCH(struct UserModeApi *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pMemory->__usrmodeGetMemInterMapParams__(pMemory, pParams); } -static inline NV_STATUS usrmodeCheckMemInterUnmap_DISPATCH(struct UserModeApi *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__usrmodeCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); -} - -static inline NvBool usrmodeShareCallback_DISPATCH(struct UserModeApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__usrmodeShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS usrmodeMapTo_DISPATCH(struct UserModeApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__usrmodeMapTo__(pResource, pParams); +static inline NV_STATUS usrmodeIsDuplicate_DISPATCH(struct UserModeApi *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return pMemory->__usrmodeIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS usrmodeGetMapAddrSpace_DISPATCH(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pMemory->__usrmodeGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } -static inline NvBool usrmodeIsExportAllowed_DISPATCH(struct UserModeApi *pMemory) { - return pMemory->__usrmodeIsExportAllowed__(pMemory); +static inline NV_STATUS usrmodeControl_DISPATCH(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pMemory->__usrmodeControl__(pMemory, pCallContext, pParams); } -static inline NvU32 usrmodeGetRefCount_DISPATCH(struct UserModeApi *pResource) { - return pResource->__usrmodeGetRefCount__(pResource); +static inline NV_STATUS usrmodeMap_DISPATCH(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pMemory->__usrmodeMap__(pMemory, pCallContext, pParams, pCpuMapping); } -static inline void usrmodeAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct UserModeApi *pResource, RsResourceRef *pReference) { - pResource->__usrmodeAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS usrmodeUnmap_DISPATCH(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pMemory->__usrmodeUnmap__(pMemory, pCallContext, pCpuMapping); } -static inline NV_STATUS usrmodeControl_Prologue_DISPATCH(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__usrmodeControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS usrmodeCheckMemInterUnmap_DISPATCH(struct UserModeApi *pMemory, NvBool bSubdeviceHandleProvided) { + return pMemory->__usrmodeCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } -static inline NvBool usrmodeIsGpuMapAllowed_DISPATCH(struct UserModeApi *pMemory, struct OBJGPU *pGpu) { - return pMemory->__usrmodeIsGpuMapAllowed__(pMemory, pGpu); +static inline NV_STATUS usrmodeGetMemoryMappingDescriptor_DISPATCH(struct UserModeApi *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return pMemory->__usrmodeGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } -static inline NV_STATUS usrmodeUnmapFrom_DISPATCH(struct UserModeApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__usrmodeUnmapFrom__(pResource, pParams); +static inline NV_STATUS usrmodeCheckCopyPermissions_DISPATCH(struct UserModeApi *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return pMemory->__usrmodeCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } -static inline void usrmodeControl_Epilogue_DISPATCH(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__usrmodeControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS usrmodeIsReady_DISPATCH(struct UserModeApi *pMemory, NvBool bCopyConstructorContext) { + return pMemory->__usrmodeIsReady__(pMemory, bCopyConstructorContext); } -static inline NV_STATUS usrmodeControl_DISPATCH(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__usrmodeControl__(pMemory, pCallContext, pParams); +static inline NvBool usrmodeIsGpuMapAllowed_DISPATCH(struct UserModeApi *pMemory, struct OBJGPU *pGpu) { + return pMemory->__usrmodeIsGpuMapAllowed__(pMemory, pGpu); } -static inline NV_STATUS usrmodeUnmap_DISPATCH(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__usrmodeUnmap__(pMemory, pCallContext, pCpuMapping); +static inline NvBool usrmodeIsExportAllowed_DISPATCH(struct UserModeApi *pMemory) { + return pMemory->__usrmodeIsExportAllowed__(pMemory); } -static inline NV_STATUS usrmodeGetMemoryMappingDescriptor_DISPATCH(struct UserModeApi *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__usrmodeGetMemoryMappingDescriptor__(pMemory, ppMemDesc); +static inline NvBool usrmodeAccessCallback_DISPATCH(struct UserModeApi *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__usrmodeAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS usrmodeControlFilter_DISPATCH(struct UserModeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__usrmodeControlFilter__(pResource, pCallContext, pParams); +static inline NvBool usrmodeShareCallback_DISPATCH(struct UserModeApi *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__usrmodeShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS usrmodeControlSerialization_Prologue_DISPATCH(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__usrmodeControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool usrmodeIsPartialUnmapSupported_DISPATCH(struct UserModeApi *pResource) { - return pResource->__usrmodeIsPartialUnmapSupported__(pResource); +static inline void usrmodeControlSerialization_Epilogue_DISPATCH(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__usrmodeControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS usrmodeIsReady_DISPATCH(struct UserModeApi *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__usrmodeIsReady__(pMemory, bCopyConstructorContext); +static inline NV_STATUS usrmodeControl_Prologue_DISPATCH(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__usrmodeControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS usrmodeCheckCopyPermissions_DISPATCH(struct UserModeApi *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__usrmodeCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); +static inline void usrmodeControl_Epilogue_DISPATCH(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__usrmodeControl_Epilogue__(pResource, pCallContext, pParams); } static inline void usrmodePreDestruct_DISPATCH(struct UserModeApi *pResource) { pResource->__usrmodePreDestruct__(pResource); } -static inline NV_STATUS usrmodeIsDuplicate_DISPATCH(struct UserModeApi *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__usrmodeIsDuplicate__(pMemory, hMemory, pDuplicate); +static inline NV_STATUS usrmodeControlFilter_DISPATCH(struct UserModeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__usrmodeControlFilter__(pResource, pCallContext, pParams); } -static inline void usrmodeControlSerialization_Epilogue_DISPATCH(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__usrmodeControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool usrmodeIsPartialUnmapSupported_DISPATCH(struct UserModeApi *pResource) { + return pResource->__usrmodeIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS usrmodeMap_DISPATCH(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__usrmodeMap__(pMemory, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS usrmodeMapTo_DISPATCH(struct UserModeApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__usrmodeMapTo__(pResource, pParams); } -static inline NvBool usrmodeAccessCallback_DISPATCH(struct UserModeApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__usrmodeAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS usrmodeUnmapFrom_DISPATCH(struct UserModeApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__usrmodeUnmapFrom__(pResource, pParams); +} + +static inline NvU32 usrmodeGetRefCount_DISPATCH(struct UserModeApi *pResource) { + return pResource->__usrmodeGetRefCount__(pResource); } +static inline void usrmodeAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct UserModeApi *pResource, RsResourceRef *pReference) { + pResource->__usrmodeAddAdditionalDependants__(pClient, pResource, pReference); +} + +NvBool usrmodeCanCopy_IMPL(struct UserModeApi *pUserModeApi); + +NV_STATUS usrmodeGetMemInterMapParams_IMPL(struct UserModeApi *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); + NV_STATUS usrmodeConstruct_IMPL(struct UserModeApi *arg_pUserModeApi, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_usrmodeConstruct(arg_pUserModeApi, arg_pCallContext, arg_pParams) usrmodeConstruct_IMPL(arg_pUserModeApi, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_uvm_channel_retainer_nvoc.c b/src/nvidia/generated/g_uvm_channel_retainer_nvoc.c index 5cb7e3c56d..9cae1b6522 100644 --- a/src/nvidia/generated/g_uvm_channel_retainer_nvoc.c +++ b/src/nvidia/generated/g_uvm_channel_retainer_nvoc.c @@ -93,106 +93,134 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_UvmChannelRetainer = /*pExportInfo=*/ &__nvoc_export_info_UvmChannelRetainer }; -static NvBool __nvoc_thunk_GpuResource_uvmchanrtnrShareCallback(struct UvmChannelRetainer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// 25 up-thunk(s) defined to bridge methods in UvmChannelRetainer to superclasses + +// uvmchanrtnrControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrControl(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_uvmchanrtnrCheckMemInterUnmap(struct UvmChannelRetainer *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), bSubdeviceHandleProvided); +// uvmchanrtnrMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrMap(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RsResource_uvmchanrtnrMapTo(struct UvmChannelRetainer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset), pParams); +// uvmchanrtnrUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrUnmap(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_GpuResource_uvmchanrtnrGetMapAddrSpace(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// uvmchanrtnrShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_uvmchanrtnrShareCallback(struct UvmChannelRetainer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NvU32 __nvoc_thunk_RsResource_uvmchanrtnrGetRefCount(struct UvmChannelRetainer *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset)); +// uvmchanrtnrGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrGetRegBaseOffsetAndSize(struct UvmChannelRetainer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), pGpu, pOffset, pSize); } -static void __nvoc_thunk_RsResource_uvmchanrtnrAddAdditionalDependants(struct RsClient *pClient, struct UvmChannelRetainer *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset), pReference); +// uvmchanrtnrGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrGetMapAddrSpace(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_RmResource_uvmchanrtnrControl_Prologue(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), pCallContext, pParams); +// uvmchanrtnrInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrInternalControlForward(struct UvmChannelRetainer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_GpuResource_uvmchanrtnrGetRegBaseOffsetAndSize(struct UvmChannelRetainer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), pGpu, pOffset, pSize); +// uvmchanrtnrGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_uvmchanrtnrGetInternalObjectHandle(struct UvmChannelRetainer *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_uvmchanrtnrInternalControlForward(struct UvmChannelRetainer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), command, pParams, size); +// uvmchanrtnrAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_uvmchanrtnrAccessCallback(struct UvmChannelRetainer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RsResource_uvmchanrtnrUnmapFrom(struct UvmChannelRetainer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset), pParams); +// uvmchanrtnrGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_uvmchanrtnrGetMemInterMapParams(struct UvmChannelRetainer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), pParams); } -static void __nvoc_thunk_RmResource_uvmchanrtnrControl_Epilogue(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), pCallContext, pParams); +// uvmchanrtnrCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_uvmchanrtnrCheckMemInterUnmap(struct UvmChannelRetainer *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), bSubdeviceHandleProvided); } -static NvHandle __nvoc_thunk_GpuResource_uvmchanrtnrGetInternalObjectHandle(struct UvmChannelRetainer *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset)); +// uvmchanrtnrGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_uvmchanrtnrGetMemoryMappingDescriptor(struct UvmChannelRetainer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_GpuResource_uvmchanrtnrControl(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), pCallContext, pParams); +// uvmchanrtnrControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_uvmchanrtnrControlSerialization_Prologue(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_uvmchanrtnrUnmap(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), pCallContext, pCpuMapping); +// uvmchanrtnrControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_uvmchanrtnrControlSerialization_Epilogue(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_uvmchanrtnrGetMemInterMapParams(struct UvmChannelRetainer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), pParams); +// uvmchanrtnrControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_uvmchanrtnrControl_Prologue(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_uvmchanrtnrGetMemoryMappingDescriptor(struct UvmChannelRetainer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), ppMemDesc); +// uvmchanrtnrControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_uvmchanrtnrControl_Epilogue(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_uvmchanrtnrControlFilter(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset), pCallContext, pParams); +// uvmchanrtnrCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_uvmchanrtnrCanCopy(struct UvmChannelRetainer *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RmResource_uvmchanrtnrControlSerialization_Prologue(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), pCallContext, pParams); +// uvmchanrtnrIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_uvmchanrtnrIsDuplicate(struct UvmChannelRetainer *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset), hMemory, pDuplicate); } -static NvBool __nvoc_thunk_RsResource_uvmchanrtnrCanCopy(struct UvmChannelRetainer *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset)); +// uvmchanrtnrPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_uvmchanrtnrPreDestruct(struct UvmChannelRetainer *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_uvmchanrtnrIsPartialUnmapSupported(struct UvmChannelRetainer *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset)); +// uvmchanrtnrControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_uvmchanrtnrControlFilter(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_uvmchanrtnrPreDestruct(struct UvmChannelRetainer *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset)); +// uvmchanrtnrIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_uvmchanrtnrIsPartialUnmapSupported(struct UvmChannelRetainer *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_uvmchanrtnrIsDuplicate(struct UvmChannelRetainer *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset), hMemory, pDuplicate); +// uvmchanrtnrMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_uvmchanrtnrMapTo(struct UvmChannelRetainer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_uvmchanrtnrControlSerialization_Epilogue(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), pCallContext, pParams); +// uvmchanrtnrUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_uvmchanrtnrUnmapFrom(struct UvmChannelRetainer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_uvmchanrtnrMap(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// uvmchanrtnrGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_uvmchanrtnrGetRefCount(struct UvmChannelRetainer *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_uvmchanrtnrAccessCallback(struct UvmChannelRetainer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// uvmchanrtnrAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_uvmchanrtnrAddAdditionalDependants(struct RsClient *pClient, struct UvmChannelRetainer *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_UvmChannelRetainer = { /*numEntries=*/ 0, @@ -234,6 +262,7 @@ NV_STATUS __nvoc_ctor_UvmChannelRetainer(UvmChannelRetainer *pThis, RmHalspecOwn return status; } +// Vtable initialization static void __nvoc_init_funcTable_UvmChannelRetainer_1(UvmChannelRetainer *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -242,58 +271,87 @@ static void __nvoc_init_funcTable_UvmChannelRetainer_1(UvmChannelRetainer *pThis PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - pThis->__uvmchanrtnrShareCallback__ = &__nvoc_thunk_GpuResource_uvmchanrtnrShareCallback; + // uvmchanrtnrControl -- virtual inherited (gpures) base (gpures) + pThis->__uvmchanrtnrControl__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrControl; - pThis->__uvmchanrtnrCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_uvmchanrtnrCheckMemInterUnmap; + // uvmchanrtnrMap -- virtual inherited (gpures) base (gpures) + pThis->__uvmchanrtnrMap__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrMap; - pThis->__uvmchanrtnrMapTo__ = &__nvoc_thunk_RsResource_uvmchanrtnrMapTo; + // uvmchanrtnrUnmap -- virtual inherited (gpures) base (gpures) + pThis->__uvmchanrtnrUnmap__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrUnmap; - pThis->__uvmchanrtnrGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_uvmchanrtnrGetMapAddrSpace; + // uvmchanrtnrShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__uvmchanrtnrShareCallback__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrShareCallback; - pThis->__uvmchanrtnrGetRefCount__ = &__nvoc_thunk_RsResource_uvmchanrtnrGetRefCount; + // uvmchanrtnrGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__uvmchanrtnrGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrGetRegBaseOffsetAndSize; - pThis->__uvmchanrtnrAddAdditionalDependants__ = &__nvoc_thunk_RsResource_uvmchanrtnrAddAdditionalDependants; + // uvmchanrtnrGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__uvmchanrtnrGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrGetMapAddrSpace; - pThis->__uvmchanrtnrControl_Prologue__ = &__nvoc_thunk_RmResource_uvmchanrtnrControl_Prologue; + // uvmchanrtnrInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__uvmchanrtnrInternalControlForward__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrInternalControlForward; - pThis->__uvmchanrtnrGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_uvmchanrtnrGetRegBaseOffsetAndSize; + // uvmchanrtnrGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__uvmchanrtnrGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrGetInternalObjectHandle; - pThis->__uvmchanrtnrInternalControlForward__ = &__nvoc_thunk_GpuResource_uvmchanrtnrInternalControlForward; + // uvmchanrtnrAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__uvmchanrtnrAccessCallback__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrAccessCallback; - pThis->__uvmchanrtnrUnmapFrom__ = &__nvoc_thunk_RsResource_uvmchanrtnrUnmapFrom; + // uvmchanrtnrGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__uvmchanrtnrGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrGetMemInterMapParams; - pThis->__uvmchanrtnrControl_Epilogue__ = &__nvoc_thunk_RmResource_uvmchanrtnrControl_Epilogue; + // uvmchanrtnrCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__uvmchanrtnrCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrCheckMemInterUnmap; - pThis->__uvmchanrtnrGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_uvmchanrtnrGetInternalObjectHandle; + // uvmchanrtnrGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__uvmchanrtnrGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrGetMemoryMappingDescriptor; - pThis->__uvmchanrtnrControl__ = &__nvoc_thunk_GpuResource_uvmchanrtnrControl; + // uvmchanrtnrControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__uvmchanrtnrControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrControlSerialization_Prologue; - pThis->__uvmchanrtnrUnmap__ = &__nvoc_thunk_GpuResource_uvmchanrtnrUnmap; + // uvmchanrtnrControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__uvmchanrtnrControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrControlSerialization_Epilogue; - pThis->__uvmchanrtnrGetMemInterMapParams__ = &__nvoc_thunk_RmResource_uvmchanrtnrGetMemInterMapParams; + // uvmchanrtnrControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__uvmchanrtnrControl_Prologue__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrControl_Prologue; - pThis->__uvmchanrtnrGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_uvmchanrtnrGetMemoryMappingDescriptor; + // uvmchanrtnrControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__uvmchanrtnrControl_Epilogue__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrControl_Epilogue; - pThis->__uvmchanrtnrControlFilter__ = &__nvoc_thunk_RsResource_uvmchanrtnrControlFilter; + // uvmchanrtnrCanCopy -- virtual inherited (res) base (gpures) + pThis->__uvmchanrtnrCanCopy__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrCanCopy; - pThis->__uvmchanrtnrControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_uvmchanrtnrControlSerialization_Prologue; + // uvmchanrtnrIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__uvmchanrtnrIsDuplicate__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrIsDuplicate; - pThis->__uvmchanrtnrCanCopy__ = &__nvoc_thunk_RsResource_uvmchanrtnrCanCopy; + // uvmchanrtnrPreDestruct -- virtual inherited (res) base (gpures) + pThis->__uvmchanrtnrPreDestruct__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrPreDestruct; - pThis->__uvmchanrtnrIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_uvmchanrtnrIsPartialUnmapSupported; + // uvmchanrtnrControlFilter -- virtual inherited (res) base (gpures) + pThis->__uvmchanrtnrControlFilter__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrControlFilter; - pThis->__uvmchanrtnrPreDestruct__ = &__nvoc_thunk_RsResource_uvmchanrtnrPreDestruct; + // uvmchanrtnrIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__uvmchanrtnrIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrIsPartialUnmapSupported; - pThis->__uvmchanrtnrIsDuplicate__ = &__nvoc_thunk_RsResource_uvmchanrtnrIsDuplicate; + // uvmchanrtnrMapTo -- virtual inherited (res) base (gpures) + pThis->__uvmchanrtnrMapTo__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrMapTo; - pThis->__uvmchanrtnrControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_uvmchanrtnrControlSerialization_Epilogue; + // uvmchanrtnrUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__uvmchanrtnrUnmapFrom__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrUnmapFrom; - pThis->__uvmchanrtnrMap__ = &__nvoc_thunk_GpuResource_uvmchanrtnrMap; + // uvmchanrtnrGetRefCount -- virtual inherited (res) base (gpures) + pThis->__uvmchanrtnrGetRefCount__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrGetRefCount; - pThis->__uvmchanrtnrAccessCallback__ = &__nvoc_thunk_RmResource_uvmchanrtnrAccessCallback; -} + // uvmchanrtnrAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__uvmchanrtnrAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrAddAdditionalDependants; +} // End __nvoc_init_funcTable_UvmChannelRetainer_1 with approximately 25 basic block(s). + +// Initialize vtable(s) for 25 virtual method(s). void __nvoc_init_funcTable_UvmChannelRetainer(UvmChannelRetainer *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 25 per-object function pointer(s). __nvoc_init_funcTable_UvmChannelRetainer_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_uvm_channel_retainer_nvoc.h b/src/nvidia/generated/g_uvm_channel_retainer_nvoc.h index f4f3edd5b2..b97129af68 100644 --- a/src/nvidia/generated/g_uvm_channel_retainer_nvoc.h +++ b/src/nvidia/generated/g_uvm_channel_retainer_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_UVM_CHANNEL_RETAINER_NVOC_H_ #define _G_UVM_CHANNEL_RETAINER_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_uvm_channel_retainer_nvoc.h" #ifndef UVM_CHANNEL_RETAINER_H @@ -41,6 +49,7 @@ extern "C" { #include "nvos.h" #include "kernel/gpu/fifo/kernel_channel.h" + struct OBJGPU; #ifndef __NVOC_CLASS_OBJGPU_TYPEDEF__ @@ -64,40 +73,51 @@ typedef struct OBJGPU OBJGPU; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct UvmChannelRetainer { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct UvmChannelRetainer *__nvoc_pbase_UvmChannelRetainer; - NvBool (*__uvmchanrtnrShareCallback__)(struct UvmChannelRetainer *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__uvmchanrtnrCheckMemInterUnmap__)(struct UvmChannelRetainer *, NvBool); - NV_STATUS (*__uvmchanrtnrMapTo__)(struct UvmChannelRetainer *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__uvmchanrtnrGetMapAddrSpace__)(struct UvmChannelRetainer *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__uvmchanrtnrGetRefCount__)(struct UvmChannelRetainer *); - void (*__uvmchanrtnrAddAdditionalDependants__)(struct RsClient *, struct UvmChannelRetainer *, RsResourceRef *); - NV_STATUS (*__uvmchanrtnrControl_Prologue__)(struct UvmChannelRetainer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__uvmchanrtnrGetRegBaseOffsetAndSize__)(struct UvmChannelRetainer *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__uvmchanrtnrInternalControlForward__)(struct UvmChannelRetainer *, NvU32, void *, NvU32); - NV_STATUS (*__uvmchanrtnrUnmapFrom__)(struct UvmChannelRetainer *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__uvmchanrtnrControl_Epilogue__)(struct UvmChannelRetainer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__uvmchanrtnrGetInternalObjectHandle__)(struct UvmChannelRetainer *); - NV_STATUS (*__uvmchanrtnrControl__)(struct UvmChannelRetainer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__uvmchanrtnrUnmap__)(struct UvmChannelRetainer *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__uvmchanrtnrGetMemInterMapParams__)(struct UvmChannelRetainer *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__uvmchanrtnrGetMemoryMappingDescriptor__)(struct UvmChannelRetainer *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__uvmchanrtnrControlFilter__)(struct UvmChannelRetainer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__uvmchanrtnrControlSerialization_Prologue__)(struct UvmChannelRetainer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__uvmchanrtnrCanCopy__)(struct UvmChannelRetainer *); - NvBool (*__uvmchanrtnrIsPartialUnmapSupported__)(struct UvmChannelRetainer *); - void (*__uvmchanrtnrPreDestruct__)(struct UvmChannelRetainer *); - NV_STATUS (*__uvmchanrtnrIsDuplicate__)(struct UvmChannelRetainer *, NvHandle, NvBool *); - void (*__uvmchanrtnrControlSerialization_Epilogue__)(struct UvmChannelRetainer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__uvmchanrtnrMap__)(struct UvmChannelRetainer *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__uvmchanrtnrAccessCallback__)(struct UvmChannelRetainer *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct UvmChannelRetainer *__nvoc_pbase_UvmChannelRetainer; // uvmchanrtnr + + // Vtable with 25 per-object function pointers + NV_STATUS (*__uvmchanrtnrControl__)(struct UvmChannelRetainer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__uvmchanrtnrMap__)(struct UvmChannelRetainer * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__uvmchanrtnrUnmap__)(struct UvmChannelRetainer * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__uvmchanrtnrShareCallback__)(struct UvmChannelRetainer * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__uvmchanrtnrGetRegBaseOffsetAndSize__)(struct UvmChannelRetainer * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__uvmchanrtnrGetMapAddrSpace__)(struct UvmChannelRetainer * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__uvmchanrtnrInternalControlForward__)(struct UvmChannelRetainer * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__uvmchanrtnrGetInternalObjectHandle__)(struct UvmChannelRetainer * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__uvmchanrtnrAccessCallback__)(struct UvmChannelRetainer * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__uvmchanrtnrGetMemInterMapParams__)(struct UvmChannelRetainer * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__uvmchanrtnrCheckMemInterUnmap__)(struct UvmChannelRetainer * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__uvmchanrtnrGetMemoryMappingDescriptor__)(struct UvmChannelRetainer * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__uvmchanrtnrControlSerialization_Prologue__)(struct UvmChannelRetainer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__uvmchanrtnrControlSerialization_Epilogue__)(struct UvmChannelRetainer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__uvmchanrtnrControl_Prologue__)(struct UvmChannelRetainer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__uvmchanrtnrControl_Epilogue__)(struct UvmChannelRetainer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__uvmchanrtnrCanCopy__)(struct UvmChannelRetainer * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__uvmchanrtnrIsDuplicate__)(struct UvmChannelRetainer * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__uvmchanrtnrPreDestruct__)(struct UvmChannelRetainer * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__uvmchanrtnrControlFilter__)(struct UvmChannelRetainer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__uvmchanrtnrIsPartialUnmapSupported__)(struct UvmChannelRetainer * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__uvmchanrtnrMapTo__)(struct UvmChannelRetainer * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__uvmchanrtnrUnmapFrom__)(struct UvmChannelRetainer * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__uvmchanrtnrGetRefCount__)(struct UvmChannelRetainer * /*this*/); // virtual inherited (res) base (gpures) + void (*__uvmchanrtnrAddAdditionalDependants__)(struct RsClient *, struct UvmChannelRetainer * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members MEMORY_DESCRIPTOR *pInstMemDesc; NvU32 chId; NvU32 runlistId; @@ -112,6 +132,7 @@ typedef struct UvmChannelRetainer UvmChannelRetainer; #define __nvoc_class_id_UvmChannelRetainer 0xa3f03a #endif /* __nvoc_class_id_UvmChannelRetainer */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_UvmChannelRetainer; #define __staticCast_UvmChannelRetainer(pThis) \ @@ -124,151 +145,179 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_UvmChannelRetainer; ((UvmChannelRetainer*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(UvmChannelRetainer))) #endif //__nvoc_uvm_channel_retainer_h_disabled - NV_STATUS __nvoc_objCreateDynamic_UvmChannelRetainer(UvmChannelRetainer**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_UvmChannelRetainer(UvmChannelRetainer**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_UvmChannelRetainer(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_UvmChannelRetainer((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define uvmchanrtnrControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define uvmchanrtnrControl(pGpuResource, pCallContext, pParams) uvmchanrtnrControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define uvmchanrtnrMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define uvmchanrtnrMap(pGpuResource, pCallContext, pParams, pCpuMapping) uvmchanrtnrMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define uvmchanrtnrUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define uvmchanrtnrUnmap(pGpuResource, pCallContext, pCpuMapping) uvmchanrtnrUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define uvmchanrtnrShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define uvmchanrtnrShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) uvmchanrtnrShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define uvmchanrtnrCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) uvmchanrtnrCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define uvmchanrtnrMapTo(pResource, pParams) uvmchanrtnrMapTo_DISPATCH(pResource, pParams) -#define uvmchanrtnrGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) uvmchanrtnrGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define uvmchanrtnrGetRefCount(pResource) uvmchanrtnrGetRefCount_DISPATCH(pResource) -#define uvmchanrtnrAddAdditionalDependants(pClient, pResource, pReference) uvmchanrtnrAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define uvmchanrtnrControl_Prologue(pResource, pCallContext, pParams) uvmchanrtnrControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define uvmchanrtnrGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define uvmchanrtnrGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) uvmchanrtnrGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define uvmchanrtnrGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define uvmchanrtnrGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) uvmchanrtnrGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define uvmchanrtnrInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define uvmchanrtnrInternalControlForward(pGpuResource, command, pParams, size) uvmchanrtnrInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define uvmchanrtnrUnmapFrom(pResource, pParams) uvmchanrtnrUnmapFrom_DISPATCH(pResource, pParams) -#define uvmchanrtnrControl_Epilogue(pResource, pCallContext, pParams) uvmchanrtnrControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define uvmchanrtnrGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define uvmchanrtnrGetInternalObjectHandle(pGpuResource) uvmchanrtnrGetInternalObjectHandle_DISPATCH(pGpuResource) -#define uvmchanrtnrControl(pGpuResource, pCallContext, pParams) uvmchanrtnrControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define uvmchanrtnrUnmap(pGpuResource, pCallContext, pCpuMapping) uvmchanrtnrUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define uvmchanrtnrAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define uvmchanrtnrAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) uvmchanrtnrAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define uvmchanrtnrGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define uvmchanrtnrGetMemInterMapParams(pRmResource, pParams) uvmchanrtnrGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define uvmchanrtnrCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define uvmchanrtnrCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) uvmchanrtnrCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define uvmchanrtnrGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define uvmchanrtnrGetMemoryMappingDescriptor(pRmResource, ppMemDesc) uvmchanrtnrGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define uvmchanrtnrControlFilter(pResource, pCallContext, pParams) uvmchanrtnrControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define uvmchanrtnrControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define uvmchanrtnrControlSerialization_Prologue(pResource, pCallContext, pParams) uvmchanrtnrControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define uvmchanrtnrControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define uvmchanrtnrControlSerialization_Epilogue(pResource, pCallContext, pParams) uvmchanrtnrControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define uvmchanrtnrControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define uvmchanrtnrControl_Prologue(pResource, pCallContext, pParams) uvmchanrtnrControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define uvmchanrtnrControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define uvmchanrtnrControl_Epilogue(pResource, pCallContext, pParams) uvmchanrtnrControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define uvmchanrtnrCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define uvmchanrtnrCanCopy(pResource) uvmchanrtnrCanCopy_DISPATCH(pResource) -#define uvmchanrtnrIsPartialUnmapSupported(pResource) uvmchanrtnrIsPartialUnmapSupported_DISPATCH(pResource) -#define uvmchanrtnrPreDestruct(pResource) uvmchanrtnrPreDestruct_DISPATCH(pResource) +#define uvmchanrtnrIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define uvmchanrtnrIsDuplicate(pResource, hMemory, pDuplicate) uvmchanrtnrIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define uvmchanrtnrControlSerialization_Epilogue(pResource, pCallContext, pParams) uvmchanrtnrControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define uvmchanrtnrMap(pGpuResource, pCallContext, pParams, pCpuMapping) uvmchanrtnrMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define uvmchanrtnrAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) uvmchanrtnrAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool uvmchanrtnrIsAllocationAllowed_IMPL(struct UvmChannelRetainer *pUvmChannelRetainer, CALL_CONTEXT *pCallContext, struct KernelChannel *pKernelChannel); +#define uvmchanrtnrPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define uvmchanrtnrPreDestruct(pResource) uvmchanrtnrPreDestruct_DISPATCH(pResource) +#define uvmchanrtnrControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define uvmchanrtnrControlFilter(pResource, pCallContext, pParams) uvmchanrtnrControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define uvmchanrtnrIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define uvmchanrtnrIsPartialUnmapSupported(pResource) uvmchanrtnrIsPartialUnmapSupported_DISPATCH(pResource) +#define uvmchanrtnrMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define uvmchanrtnrMapTo(pResource, pParams) uvmchanrtnrMapTo_DISPATCH(pResource, pParams) +#define uvmchanrtnrUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define uvmchanrtnrUnmapFrom(pResource, pParams) uvmchanrtnrUnmapFrom_DISPATCH(pResource, pParams) +#define uvmchanrtnrGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define uvmchanrtnrGetRefCount(pResource) uvmchanrtnrGetRefCount_DISPATCH(pResource) +#define uvmchanrtnrAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define uvmchanrtnrAddAdditionalDependants(pClient, pResource, pReference) uvmchanrtnrAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions +static inline NV_STATUS uvmchanrtnrControl_DISPATCH(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__uvmchanrtnrControl__(pGpuResource, pCallContext, pParams); +} -#ifdef __nvoc_uvm_channel_retainer_h_disabled -static inline NvBool uvmchanrtnrIsAllocationAllowed(struct UvmChannelRetainer *pUvmChannelRetainer, CALL_CONTEXT *pCallContext, struct KernelChannel *pKernelChannel) { - NV_ASSERT_FAILED_PRECOMP("UvmChannelRetainer was disabled!"); - return NV_FALSE; +static inline NV_STATUS uvmchanrtnrMap_DISPATCH(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__uvmchanrtnrMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -#else //__nvoc_uvm_channel_retainer_h_disabled -#define uvmchanrtnrIsAllocationAllowed(pUvmChannelRetainer, pCallContext, pKernelChannel) uvmchanrtnrIsAllocationAllowed_IMPL(pUvmChannelRetainer, pCallContext, pKernelChannel) -#endif //__nvoc_uvm_channel_retainer_h_disabled -#define uvmchanrtnrIsAllocationAllowed_HAL(pUvmChannelRetainer, pCallContext, pKernelChannel) uvmchanrtnrIsAllocationAllowed(pUvmChannelRetainer, pCallContext, pKernelChannel) +static inline NV_STATUS uvmchanrtnrUnmap_DISPATCH(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__uvmchanrtnrUnmap__(pGpuResource, pCallContext, pCpuMapping); +} static inline NvBool uvmchanrtnrShareCallback_DISPATCH(struct UvmChannelRetainer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return pGpuResource->__uvmchanrtnrShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline NV_STATUS uvmchanrtnrCheckMemInterUnmap_DISPATCH(struct UvmChannelRetainer *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__uvmchanrtnrCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); -} - -static inline NV_STATUS uvmchanrtnrMapTo_DISPATCH(struct UvmChannelRetainer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__uvmchanrtnrMapTo__(pResource, pParams); +static inline NV_STATUS uvmchanrtnrGetRegBaseOffsetAndSize_DISPATCH(struct UvmChannelRetainer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__uvmchanrtnrGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS uvmchanrtnrGetMapAddrSpace_DISPATCH(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__uvmchanrtnrGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NvU32 uvmchanrtnrGetRefCount_DISPATCH(struct UvmChannelRetainer *pResource) { - return pResource->__uvmchanrtnrGetRefCount__(pResource); -} - -static inline void uvmchanrtnrAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct UvmChannelRetainer *pResource, RsResourceRef *pReference) { - pResource->__uvmchanrtnrAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS uvmchanrtnrInternalControlForward_DISPATCH(struct UvmChannelRetainer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__uvmchanrtnrInternalControlForward__(pGpuResource, command, pParams, size); } -static inline NV_STATUS uvmchanrtnrControl_Prologue_DISPATCH(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__uvmchanrtnrControl_Prologue__(pResource, pCallContext, pParams); +static inline NvHandle uvmchanrtnrGetInternalObjectHandle_DISPATCH(struct UvmChannelRetainer *pGpuResource) { + return pGpuResource->__uvmchanrtnrGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS uvmchanrtnrGetRegBaseOffsetAndSize_DISPATCH(struct UvmChannelRetainer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__uvmchanrtnrGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NvBool uvmchanrtnrAccessCallback_DISPATCH(struct UvmChannelRetainer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__uvmchanrtnrAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS uvmchanrtnrInternalControlForward_DISPATCH(struct UvmChannelRetainer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__uvmchanrtnrInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS uvmchanrtnrGetMemInterMapParams_DISPATCH(struct UvmChannelRetainer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__uvmchanrtnrGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS uvmchanrtnrUnmapFrom_DISPATCH(struct UvmChannelRetainer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__uvmchanrtnrUnmapFrom__(pResource, pParams); +static inline NV_STATUS uvmchanrtnrCheckMemInterUnmap_DISPATCH(struct UvmChannelRetainer *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__uvmchanrtnrCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline void uvmchanrtnrControl_Epilogue_DISPATCH(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__uvmchanrtnrControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS uvmchanrtnrGetMemoryMappingDescriptor_DISPATCH(struct UvmChannelRetainer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__uvmchanrtnrGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NvHandle uvmchanrtnrGetInternalObjectHandle_DISPATCH(struct UvmChannelRetainer *pGpuResource) { - return pGpuResource->__uvmchanrtnrGetInternalObjectHandle__(pGpuResource); +static inline NV_STATUS uvmchanrtnrControlSerialization_Prologue_DISPATCH(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__uvmchanrtnrControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS uvmchanrtnrControl_DISPATCH(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__uvmchanrtnrControl__(pGpuResource, pCallContext, pParams); +static inline void uvmchanrtnrControlSerialization_Epilogue_DISPATCH(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__uvmchanrtnrControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS uvmchanrtnrUnmap_DISPATCH(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__uvmchanrtnrUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NV_STATUS uvmchanrtnrControl_Prologue_DISPATCH(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__uvmchanrtnrControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS uvmchanrtnrGetMemInterMapParams_DISPATCH(struct UvmChannelRetainer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__uvmchanrtnrGetMemInterMapParams__(pRmResource, pParams); +static inline void uvmchanrtnrControl_Epilogue_DISPATCH(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__uvmchanrtnrControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS uvmchanrtnrGetMemoryMappingDescriptor_DISPATCH(struct UvmChannelRetainer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__uvmchanrtnrGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NvBool uvmchanrtnrCanCopy_DISPATCH(struct UvmChannelRetainer *pResource) { + return pResource->__uvmchanrtnrCanCopy__(pResource); } -static inline NV_STATUS uvmchanrtnrControlFilter_DISPATCH(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__uvmchanrtnrControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS uvmchanrtnrIsDuplicate_DISPATCH(struct UvmChannelRetainer *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__uvmchanrtnrIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS uvmchanrtnrControlSerialization_Prologue_DISPATCH(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__uvmchanrtnrControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline void uvmchanrtnrPreDestruct_DISPATCH(struct UvmChannelRetainer *pResource) { + pResource->__uvmchanrtnrPreDestruct__(pResource); } -static inline NvBool uvmchanrtnrCanCopy_DISPATCH(struct UvmChannelRetainer *pResource) { - return pResource->__uvmchanrtnrCanCopy__(pResource); +static inline NV_STATUS uvmchanrtnrControlFilter_DISPATCH(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__uvmchanrtnrControlFilter__(pResource, pCallContext, pParams); } static inline NvBool uvmchanrtnrIsPartialUnmapSupported_DISPATCH(struct UvmChannelRetainer *pResource) { return pResource->__uvmchanrtnrIsPartialUnmapSupported__(pResource); } -static inline void uvmchanrtnrPreDestruct_DISPATCH(struct UvmChannelRetainer *pResource) { - pResource->__uvmchanrtnrPreDestruct__(pResource); +static inline NV_STATUS uvmchanrtnrMapTo_DISPATCH(struct UvmChannelRetainer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__uvmchanrtnrMapTo__(pResource, pParams); } -static inline NV_STATUS uvmchanrtnrIsDuplicate_DISPATCH(struct UvmChannelRetainer *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__uvmchanrtnrIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS uvmchanrtnrUnmapFrom_DISPATCH(struct UvmChannelRetainer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__uvmchanrtnrUnmapFrom__(pResource, pParams); } -static inline void uvmchanrtnrControlSerialization_Epilogue_DISPATCH(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__uvmchanrtnrControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 uvmchanrtnrGetRefCount_DISPATCH(struct UvmChannelRetainer *pResource) { + return pResource->__uvmchanrtnrGetRefCount__(pResource); } -static inline NV_STATUS uvmchanrtnrMap_DISPATCH(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__uvmchanrtnrMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void uvmchanrtnrAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct UvmChannelRetainer *pResource, RsResourceRef *pReference) { + pResource->__uvmchanrtnrAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NvBool uvmchanrtnrAccessCallback_DISPATCH(struct UvmChannelRetainer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__uvmchanrtnrAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +NvBool uvmchanrtnrIsAllocationAllowed_IMPL(struct UvmChannelRetainer *pUvmChannelRetainer, CALL_CONTEXT *pCallContext, struct KernelChannel *pKernelChannel); + + +#ifdef __nvoc_uvm_channel_retainer_h_disabled +static inline NvBool uvmchanrtnrIsAllocationAllowed(struct UvmChannelRetainer *pUvmChannelRetainer, CALL_CONTEXT *pCallContext, struct KernelChannel *pKernelChannel) { + NV_ASSERT_FAILED_PRECOMP("UvmChannelRetainer was disabled!"); + return NV_FALSE; } +#else //__nvoc_uvm_channel_retainer_h_disabled +#define uvmchanrtnrIsAllocationAllowed(pUvmChannelRetainer, pCallContext, pKernelChannel) uvmchanrtnrIsAllocationAllowed_IMPL(pUvmChannelRetainer, pCallContext, pKernelChannel) +#endif //__nvoc_uvm_channel_retainer_h_disabled + +#define uvmchanrtnrIsAllocationAllowed_HAL(pUvmChannelRetainer, pCallContext, pKernelChannel) uvmchanrtnrIsAllocationAllowed(pUvmChannelRetainer, pCallContext, pKernelChannel) NV_STATUS uvmchanrtnrConstruct_IMPL(struct UvmChannelRetainer *arg_pUvmChannelRetainer, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_uvm_nvoc.c b/src/nvidia/generated/g_uvm_nvoc.c index 1d22e29c5b..0409c40479 100644 --- a/src/nvidia/generated/g_uvm_nvoc.c +++ b/src/nvidia/generated/g_uvm_nvoc.c @@ -75,78 +75,102 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJUVM = /*pExportInfo=*/ &__nvoc_export_info_OBJUVM }; -static void __nvoc_thunk_OBJUVM_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pUvm) { - uvmStateDestroy(pGpu, (struct OBJUVM *)(((unsigned char *)pUvm) - __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); +// 4 down-thunk(s) defined to bridge methods in OBJUVM from superclasses + +// uvmStateDestroy: virtual override (engstate) base (engstate) +static void __nvoc_down_thunk_OBJUVM_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pUvm) { + uvmStateDestroy(pGpu, (struct OBJUVM *)(((unsigned char *) pUvm) - __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJUVM_engstateStateInitUnlocked(OBJGPU *pGpu, struct OBJENGSTATE *pUvm) { - return uvmStateInitUnlocked(pGpu, (struct OBJUVM *)(((unsigned char *)pUvm) - __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); +// uvmStateInitUnlocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_OBJUVM_engstateStateInitUnlocked(OBJGPU *pGpu, struct OBJENGSTATE *pUvm) { + return uvmStateInitUnlocked(pGpu, (struct OBJUVM *)(((unsigned char *) pUvm) - __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJUVM_intrservRegisterIntrService(OBJGPU *arg0, struct IntrService *pUvm, IntrServiceRecord arg1[171]) { - uvmRegisterIntrService(arg0, (struct OBJUVM *)(((unsigned char *)pUvm) - __nvoc_rtti_OBJUVM_IntrService.offset), arg1); +// uvmRegisterIntrService: virtual override (intrserv) base (intrserv) +static void __nvoc_down_thunk_OBJUVM_intrservRegisterIntrService(OBJGPU *arg1, struct IntrService *pUvm, IntrServiceRecord arg3[175]) { + uvmRegisterIntrService(arg1, (struct OBJUVM *)(((unsigned char *) pUvm) - __nvoc_rtti_OBJUVM_IntrService.offset), arg3); } -static NvU32 __nvoc_thunk_OBJUVM_intrservServiceInterrupt(OBJGPU *arg0, struct IntrService *pUvm, IntrServiceServiceInterruptArguments *arg1) { - return uvmServiceInterrupt(arg0, (struct OBJUVM *)(((unsigned char *)pUvm) - __nvoc_rtti_OBJUVM_IntrService.offset), arg1); +// uvmServiceInterrupt: virtual override (intrserv) base (intrserv) +static NvU32 __nvoc_down_thunk_OBJUVM_intrservServiceInterrupt(OBJGPU *arg1, struct IntrService *pUvm, IntrServiceServiceInterruptArguments *arg3) { + return uvmServiceInterrupt(arg1, (struct OBJUVM *)(((unsigned char *) pUvm) - __nvoc_rtti_OBJUVM_IntrService.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_uvmStateLoad(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg0) { - return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg0); + +// 14 up-thunk(s) defined to bridge methods in OBJUVM to superclasses + +// uvmConstructEngine: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmConstructEngine(POBJGPU pGpu, struct OBJUVM *pEngstate, ENGDESCRIPTOR arg3) { + return engstateConstructEngine(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_uvmStateUnload(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg0) { - return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg0); +// uvmInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_uvmInitMissing(POBJGPU pGpu, struct OBJUVM *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_IntrService_uvmServiceNotificationInterrupt(OBJGPU *pGpu, struct OBJUVM *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { - return intrservServiceNotificationInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_OBJUVM_IntrService.offset), pParams); +// uvmStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePreInitLocked(POBJGPU pGpu, struct OBJUVM *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_uvmStateInitLocked(POBJGPU pGpu, struct OBJUVM *pEngstate) { - return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); +// uvmStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePreInitUnlocked(POBJGPU pGpu, struct OBJUVM *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_uvmStatePreLoad(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg0); +// uvmStateInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStateInitLocked(POBJGPU pGpu, struct OBJUVM *pEngstate) { + return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_uvmStatePostUnload(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg0); +// uvmStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePreLoad(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_uvmStatePreUnload(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg0); +// uvmStateLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStateLoad(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { + return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_uvmInitMissing(POBJGPU pGpu, struct OBJUVM *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); +// uvmStatePostLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePostLoad(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { + return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_uvmStatePreInitLocked(POBJGPU pGpu, struct OBJUVM *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); +// uvmStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePreUnload(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_uvmStatePreInitUnlocked(POBJGPU pGpu, struct OBJUVM *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); +// uvmStateUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStateUnload(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { + return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg3); } -static NvBool __nvoc_thunk_IntrService_uvmClearInterrupt(OBJGPU *pGpu, struct OBJUVM *pIntrService, IntrServiceClearInterruptArguments *pParams) { - return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_OBJUVM_IntrService.offset), pParams); +// uvmStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePostUnload(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_uvmStatePostLoad(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg0) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg0); +// uvmIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_uvmIsPresent(POBJGPU pGpu, struct OBJUVM *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_uvmConstructEngine(POBJGPU pGpu, struct OBJUVM *pEngstate, ENGDESCRIPTOR arg0) { - return engstateConstructEngine(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg0); +// uvmClearInterrupt: virtual inherited (intrserv) base (intrserv) +static NvBool __nvoc_up_thunk_IntrService_uvmClearInterrupt(OBJGPU *pGpu, struct OBJUVM *pIntrService, IntrServiceClearInterruptArguments *pParams) { + return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_OBJUVM_IntrService.offset), pParams); } -static NvBool __nvoc_thunk_OBJENGSTATE_uvmIsPresent(POBJGPU pGpu, struct OBJUVM *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); +// uvmServiceNotificationInterrupt: virtual inherited (intrserv) base (intrserv) +static NV_STATUS __nvoc_up_thunk_IntrService_uvmServiceNotificationInterrupt(OBJGPU *pGpu, struct OBJUVM *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { + return intrservServiceNotificationInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_OBJUVM_IntrService.offset), pParams); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJUVM = { /*numEntries=*/ 0, @@ -172,6 +196,9 @@ void __nvoc_init_dataField_OBJUVM(OBJUVM *pThis, RmHalspecOwner *pRmhalspecowner PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); + + // Hal field -- accessCounterBufferCount + pThis->accessCounterBufferCount = 1; } NV_STATUS __nvoc_ctor_OBJENGSTATE(OBJENGSTATE* ); @@ -193,6 +220,7 @@ NV_STATUS __nvoc_ctor_OBJUVM(OBJUVM *pThis, RmHalspecOwner *pRmhalspecowner) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJUVM_1(OBJUVM *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -205,11 +233,15 @@ static void __nvoc_init_funcTable_OBJUVM_1(OBJUVM *pThis, RmHalspecOwner *pRmhal PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); + // uvmStateDestroy -- virtual override (engstate) base (engstate) pThis->__uvmStateDestroy__ = &uvmStateDestroy_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_OBJUVM_engstateStateDestroy; + // uvmStateInitUnlocked -- virtual override (engstate) base (engstate) pThis->__uvmStateInitUnlocked__ = &uvmStateInitUnlocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ = &__nvoc_down_thunk_OBJUVM_engstateStateInitUnlocked; - // Hal function -- uvmAccessCntrBufferUnregister + // uvmAccessCntrBufferUnregister -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__uvmAccessCntrBufferUnregister__ = &uvmAccessCntrBufferUnregister_IMPL; @@ -219,7 +251,7 @@ static void __nvoc_init_funcTable_OBJUVM_1(OBJUVM *pThis, RmHalspecOwner *pRmhal pThis->__uvmAccessCntrBufferUnregister__ = &uvmAccessCntrBufferUnregister_ac1694; } - // Hal function -- uvmAccessCntrBufferRegister + // uvmAccessCntrBufferRegister -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__uvmAccessCntrBufferRegister__ = &uvmAccessCntrBufferRegister_IMPL; @@ -229,48 +261,62 @@ static void __nvoc_init_funcTable_OBJUVM_1(OBJUVM *pThis, RmHalspecOwner *pRmhal pThis->__uvmAccessCntrBufferRegister__ = &uvmAccessCntrBufferRegister_ac1694; } + // uvmRegisterIntrService -- virtual override (intrserv) base (intrserv) pThis->__uvmRegisterIntrService__ = &uvmRegisterIntrService_IMPL; + pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_OBJUVM_intrservRegisterIntrService; + // uvmServiceInterrupt -- virtual override (intrserv) base (intrserv) pThis->__uvmServiceInterrupt__ = &uvmServiceInterrupt_IMPL; + pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_OBJUVM_intrservServiceInterrupt; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_thunk_OBJUVM_engstateStateDestroy; + // uvmConstructEngine -- virtual inherited (engstate) base (engstate) + pThis->__uvmConstructEngine__ = &__nvoc_up_thunk_OBJENGSTATE_uvmConstructEngine; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ = &__nvoc_thunk_OBJUVM_engstateStateInitUnlocked; + // uvmInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__uvmInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_uvmInitMissing; - pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_thunk_OBJUVM_intrservRegisterIntrService; + // uvmStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__uvmStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStatePreInitLocked; - pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_thunk_OBJUVM_intrservServiceInterrupt; + // uvmStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__uvmStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStatePreInitUnlocked; - pThis->__uvmStateLoad__ = &__nvoc_thunk_OBJENGSTATE_uvmStateLoad; + // uvmStateInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__uvmStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStateInitLocked; - pThis->__uvmStateUnload__ = &__nvoc_thunk_OBJENGSTATE_uvmStateUnload; + // uvmStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__uvmStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStatePreLoad; - pThis->__uvmServiceNotificationInterrupt__ = &__nvoc_thunk_IntrService_uvmServiceNotificationInterrupt; + // uvmStateLoad -- virtual inherited (engstate) base (engstate) + pThis->__uvmStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStateLoad; - pThis->__uvmStateInitLocked__ = &__nvoc_thunk_OBJENGSTATE_uvmStateInitLocked; + // uvmStatePostLoad -- virtual inherited (engstate) base (engstate) + pThis->__uvmStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStatePostLoad; - pThis->__uvmStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_uvmStatePreLoad; + // uvmStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__uvmStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStatePreUnload; - pThis->__uvmStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_uvmStatePostUnload; + // uvmStateUnload -- virtual inherited (engstate) base (engstate) + pThis->__uvmStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStateUnload; - pThis->__uvmStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_uvmStatePreUnload; + // uvmStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__uvmStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStatePostUnload; - pThis->__uvmInitMissing__ = &__nvoc_thunk_OBJENGSTATE_uvmInitMissing; + // uvmIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__uvmIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_uvmIsPresent; - pThis->__uvmStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_uvmStatePreInitLocked; + // uvmClearInterrupt -- virtual inherited (intrserv) base (intrserv) + pThis->__uvmClearInterrupt__ = &__nvoc_up_thunk_IntrService_uvmClearInterrupt; - pThis->__uvmStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_uvmStatePreInitUnlocked; + // uvmServiceNotificationInterrupt -- virtual inherited (intrserv) base (intrserv) + pThis->__uvmServiceNotificationInterrupt__ = &__nvoc_up_thunk_IntrService_uvmServiceNotificationInterrupt; +} // End __nvoc_init_funcTable_OBJUVM_1 with approximately 26 basic block(s). - pThis->__uvmClearInterrupt__ = &__nvoc_thunk_IntrService_uvmClearInterrupt; - - pThis->__uvmStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_uvmStatePostLoad; - - pThis->__uvmConstructEngine__ = &__nvoc_thunk_OBJENGSTATE_uvmConstructEngine; - - pThis->__uvmIsPresent__ = &__nvoc_thunk_OBJENGSTATE_uvmIsPresent; -} +// Initialize vtable(s) for 20 virtual method(s). void __nvoc_init_funcTable_OBJUVM(OBJUVM *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 20 per-object function pointer(s). __nvoc_init_funcTable_OBJUVM_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_uvm_nvoc.h b/src/nvidia/generated/g_uvm_nvoc.h index f25a182747..35a69236b1 100644 --- a/src/nvidia/generated/g_uvm_nvoc.h +++ b/src/nvidia/generated/g_uvm_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_UVM_NVOC_H_ #define _G_UVM_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_uvm_nvoc.h" #ifndef UVM_H @@ -61,6 +69,7 @@ typedef enum * Contains the Unified Virtual Memory (UVM) feature related data. */ + struct AccessCounterBuffer; #ifndef __NVOC_CLASS_AccessCounterBuffer_TYPEDEF__ @@ -108,34 +117,45 @@ typedef struct OBJUVM *POBJUVM; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJUVM { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; struct IntrService __nvoc_base_IntrService; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct IntrService *__nvoc_pbase_IntrService; - struct OBJUVM *__nvoc_pbase_OBJUVM; - void (*__uvmStateDestroy__)(OBJGPU *, struct OBJUVM *); - NV_STATUS (*__uvmStateInitUnlocked__)(OBJGPU *, struct OBJUVM *); - NV_STATUS (*__uvmAccessCntrBufferUnregister__)(OBJGPU *, struct OBJUVM *, NvU32); - NV_STATUS (*__uvmAccessCntrBufferRegister__)(OBJGPU *, struct OBJUVM *, NvU32, NvU32, RmPhysAddr *); - void (*__uvmRegisterIntrService__)(OBJGPU *, struct OBJUVM *, IntrServiceRecord *); - NvU32 (*__uvmServiceInterrupt__)(OBJGPU *, struct OBJUVM *, IntrServiceServiceInterruptArguments *); - NV_STATUS (*__uvmStateLoad__)(POBJGPU, struct OBJUVM *, NvU32); - NV_STATUS (*__uvmStateUnload__)(POBJGPU, struct OBJUVM *, NvU32); - NV_STATUS (*__uvmServiceNotificationInterrupt__)(OBJGPU *, struct OBJUVM *, IntrServiceServiceNotificationInterruptArguments *); - NV_STATUS (*__uvmStateInitLocked__)(POBJGPU, struct OBJUVM *); - NV_STATUS (*__uvmStatePreLoad__)(POBJGPU, struct OBJUVM *, NvU32); - NV_STATUS (*__uvmStatePostUnload__)(POBJGPU, struct OBJUVM *, NvU32); - NV_STATUS (*__uvmStatePreUnload__)(POBJGPU, struct OBJUVM *, NvU32); - void (*__uvmInitMissing__)(POBJGPU, struct OBJUVM *); - NV_STATUS (*__uvmStatePreInitLocked__)(POBJGPU, struct OBJUVM *); - NV_STATUS (*__uvmStatePreInitUnlocked__)(POBJGPU, struct OBJUVM *); - NvBool (*__uvmClearInterrupt__)(OBJGPU *, struct OBJUVM *, IntrServiceClearInterruptArguments *); - NV_STATUS (*__uvmStatePostLoad__)(POBJGPU, struct OBJUVM *, NvU32); - NV_STATUS (*__uvmConstructEngine__)(POBJGPU, struct OBJUVM *, ENGDESCRIPTOR); - NvBool (*__uvmIsPresent__)(POBJGPU, struct OBJUVM *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct IntrService *__nvoc_pbase_IntrService; // intrserv super + struct OBJUVM *__nvoc_pbase_OBJUVM; // uvm + + // Vtable with 20 per-object function pointers + void (*__uvmStateDestroy__)(OBJGPU *, struct OBJUVM * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__uvmStateInitUnlocked__)(OBJGPU *, struct OBJUVM * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__uvmAccessCntrBufferUnregister__)(OBJGPU *, struct OBJUVM * /*this*/, NvU32); // halified (2 hals) + NV_STATUS (*__uvmAccessCntrBufferRegister__)(OBJGPU *, struct OBJUVM * /*this*/, NvU32, NvU32, RmPhysAddr *); // halified (2 hals) + void (*__uvmRegisterIntrService__)(OBJGPU *, struct OBJUVM * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) + NvU32 (*__uvmServiceInterrupt__)(OBJGPU *, struct OBJUVM * /*this*/, IntrServiceServiceInterruptArguments *); // virtual override (intrserv) base (intrserv) + NV_STATUS (*__uvmConstructEngine__)(POBJGPU, struct OBJUVM * /*this*/, ENGDESCRIPTOR); // virtual inherited (engstate) base (engstate) + void (*__uvmInitMissing__)(POBJGPU, struct OBJUVM * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__uvmStatePreInitLocked__)(POBJGPU, struct OBJUVM * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__uvmStatePreInitUnlocked__)(POBJGPU, struct OBJUVM * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__uvmStateInitLocked__)(POBJGPU, struct OBJUVM * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__uvmStatePreLoad__)(POBJGPU, struct OBJUVM * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__uvmStateLoad__)(POBJGPU, struct OBJUVM * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__uvmStatePostLoad__)(POBJGPU, struct OBJUVM * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__uvmStatePreUnload__)(POBJGPU, struct OBJUVM * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__uvmStateUnload__)(POBJGPU, struct OBJUVM * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__uvmStatePostUnload__)(POBJGPU, struct OBJUVM * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__uvmIsPresent__)(POBJGPU, struct OBJUVM * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__uvmClearInterrupt__)(OBJGPU *, struct OBJUVM * /*this*/, IntrServiceClearInterruptArguments *); // virtual inherited (intrserv) base (intrserv) + NV_STATUS (*__uvmServiceNotificationInterrupt__)(OBJGPU *, struct OBJUVM * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual inherited (intrserv) base (intrserv) + + // Data members ACCESS_CNTR_BUFFER *pAccessCounterBuffers; NvU32 accessCounterBufferCount; NvHandle hClient; @@ -152,6 +172,7 @@ typedef struct OBJUVM OBJUVM; #define __nvoc_class_id_OBJUVM 0xf9a17d #endif /* __nvoc_class_id_OBJUVM */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJUVM; #define __staticCast_OBJUVM(pThis) \ @@ -164,6 +185,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJUVM; ((OBJUVM*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJUVM))) #endif //__nvoc_uvm_h_disabled +// Property macros #define PDB_PROP_UVM_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_UVM_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING @@ -173,28 +195,132 @@ NV_STATUS __nvoc_objCreate_OBJUVM(OBJUVM**, Dynamic*, NvU32); #define __objCreate_OBJUVM(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJUVM((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define uvmStateDestroy_FNPTR(pUvm) pUvm->__uvmStateDestroy__ #define uvmStateDestroy(pGpu, pUvm) uvmStateDestroy_DISPATCH(pGpu, pUvm) +#define uvmStateInitUnlocked_FNPTR(pUvm) pUvm->__uvmStateInitUnlocked__ #define uvmStateInitUnlocked(pGpu, pUvm) uvmStateInitUnlocked_DISPATCH(pGpu, pUvm) -#define uvmAccessCntrBufferUnregister(arg0, arg1, accessCounterIndex) uvmAccessCntrBufferUnregister_DISPATCH(arg0, arg1, accessCounterIndex) -#define uvmAccessCntrBufferUnregister_HAL(arg0, arg1, accessCounterIndex) uvmAccessCntrBufferUnregister_DISPATCH(arg0, arg1, accessCounterIndex) -#define uvmAccessCntrBufferRegister(arg0, arg1, accessCounterIndex, arg2, arg3) uvmAccessCntrBufferRegister_DISPATCH(arg0, arg1, accessCounterIndex, arg2, arg3) -#define uvmAccessCntrBufferRegister_HAL(arg0, arg1, accessCounterIndex, arg2, arg3) uvmAccessCntrBufferRegister_DISPATCH(arg0, arg1, accessCounterIndex, arg2, arg3) -#define uvmRegisterIntrService(arg0, pUvm, arg1) uvmRegisterIntrService_DISPATCH(arg0, pUvm, arg1) -#define uvmServiceInterrupt(arg0, pUvm, arg1) uvmServiceInterrupt_DISPATCH(arg0, pUvm, arg1) -#define uvmStateLoad(pGpu, pEngstate, arg0) uvmStateLoad_DISPATCH(pGpu, pEngstate, arg0) -#define uvmStateUnload(pGpu, pEngstate, arg0) uvmStateUnload_DISPATCH(pGpu, pEngstate, arg0) -#define uvmServiceNotificationInterrupt(pGpu, pIntrService, pParams) uvmServiceNotificationInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define uvmStateInitLocked(pGpu, pEngstate) uvmStateInitLocked_DISPATCH(pGpu, pEngstate) -#define uvmStatePreLoad(pGpu, pEngstate, arg0) uvmStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define uvmStatePostUnload(pGpu, pEngstate, arg0) uvmStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define uvmStatePreUnload(pGpu, pEngstate, arg0) uvmStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) +#define uvmAccessCntrBufferUnregister_FNPTR(arg_this) arg_this->__uvmAccessCntrBufferUnregister__ +#define uvmAccessCntrBufferUnregister(arg1, arg_this, accessCounterIndex) uvmAccessCntrBufferUnregister_DISPATCH(arg1, arg_this, accessCounterIndex) +#define uvmAccessCntrBufferUnregister_HAL(arg1, arg_this, accessCounterIndex) uvmAccessCntrBufferUnregister_DISPATCH(arg1, arg_this, accessCounterIndex) +#define uvmAccessCntrBufferRegister_FNPTR(arg_this) arg_this->__uvmAccessCntrBufferRegister__ +#define uvmAccessCntrBufferRegister(arg1, arg_this, accessCounterIndex, arg4, arg5) uvmAccessCntrBufferRegister_DISPATCH(arg1, arg_this, accessCounterIndex, arg4, arg5) +#define uvmAccessCntrBufferRegister_HAL(arg1, arg_this, accessCounterIndex, arg4, arg5) uvmAccessCntrBufferRegister_DISPATCH(arg1, arg_this, accessCounterIndex, arg4, arg5) +#define uvmRegisterIntrService_FNPTR(pUvm) pUvm->__uvmRegisterIntrService__ +#define uvmRegisterIntrService(arg1, pUvm, arg3) uvmRegisterIntrService_DISPATCH(arg1, pUvm, arg3) +#define uvmServiceInterrupt_FNPTR(pUvm) pUvm->__uvmServiceInterrupt__ +#define uvmServiceInterrupt(arg1, pUvm, arg3) uvmServiceInterrupt_DISPATCH(arg1, pUvm, arg3) +#define uvmConstructEngine_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ +#define uvmConstructEngine(pGpu, pEngstate, arg3) uvmConstructEngine_DISPATCH(pGpu, pEngstate, arg3) +#define uvmInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define uvmInitMissing(pGpu, pEngstate) uvmInitMissing_DISPATCH(pGpu, pEngstate) +#define uvmStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define uvmStatePreInitLocked(pGpu, pEngstate) uvmStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define uvmStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define uvmStatePreInitUnlocked(pGpu, pEngstate) uvmStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define uvmClearInterrupt(pGpu, pIntrService, pParams) uvmClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define uvmStatePostLoad(pGpu, pEngstate, arg0) uvmStatePostLoad_DISPATCH(pGpu, pEngstate, arg0) -#define uvmConstructEngine(pGpu, pEngstate, arg0) uvmConstructEngine_DISPATCH(pGpu, pEngstate, arg0) +#define uvmStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define uvmStateInitLocked(pGpu, pEngstate) uvmStateInitLocked_DISPATCH(pGpu, pEngstate) +#define uvmStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define uvmStatePreLoad(pGpu, pEngstate, arg3) uvmStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define uvmStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define uvmStateLoad(pGpu, pEngstate, arg3) uvmStateLoad_DISPATCH(pGpu, pEngstate, arg3) +#define uvmStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define uvmStatePostLoad(pGpu, pEngstate, arg3) uvmStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) +#define uvmStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define uvmStatePreUnload(pGpu, pEngstate, arg3) uvmStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define uvmStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define uvmStateUnload(pGpu, pEngstate, arg3) uvmStateUnload_DISPATCH(pGpu, pEngstate, arg3) +#define uvmStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define uvmStatePostUnload(pGpu, pEngstate, arg3) uvmStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define uvmIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define uvmIsPresent(pGpu, pEngstate) uvmIsPresent_DISPATCH(pGpu, pEngstate) +#define uvmClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservClearInterrupt__ +#define uvmClearInterrupt(pGpu, pIntrService, pParams) uvmClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) +#define uvmServiceNotificationInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ +#define uvmServiceNotificationInterrupt(pGpu, pIntrService, pParams) uvmServiceNotificationInterrupt_DISPATCH(pGpu, pIntrService, pParams) + +// Dispatch functions +static inline void uvmStateDestroy_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pUvm) { + pUvm->__uvmStateDestroy__(pGpu, pUvm); +} + +static inline NV_STATUS uvmStateInitUnlocked_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pUvm) { + return pUvm->__uvmStateInitUnlocked__(pGpu, pUvm); +} + +static inline NV_STATUS uvmAccessCntrBufferUnregister_DISPATCH(OBJGPU *arg1, struct OBJUVM *arg_this, NvU32 accessCounterIndex) { + return arg_this->__uvmAccessCntrBufferUnregister__(arg1, arg_this, accessCounterIndex); +} + +static inline NV_STATUS uvmAccessCntrBufferRegister_DISPATCH(OBJGPU *arg1, struct OBJUVM *arg_this, NvU32 accessCounterIndex, NvU32 arg4, RmPhysAddr *arg5) { + return arg_this->__uvmAccessCntrBufferRegister__(arg1, arg_this, accessCounterIndex, arg4, arg5); +} + +static inline void uvmRegisterIntrService_DISPATCH(OBJGPU *arg1, struct OBJUVM *pUvm, IntrServiceRecord arg3[175]) { + pUvm->__uvmRegisterIntrService__(arg1, pUvm, arg3); +} + +static inline NvU32 uvmServiceInterrupt_DISPATCH(OBJGPU *arg1, struct OBJUVM *pUvm, IntrServiceServiceInterruptArguments *arg3) { + return pUvm->__uvmServiceInterrupt__(arg1, pUvm, arg3); +} + +static inline NV_STATUS uvmConstructEngine_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, ENGDESCRIPTOR arg3) { + return pEngstate->__uvmConstructEngine__(pGpu, pEngstate, arg3); +} + +static inline void uvmInitMissing_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate) { + pEngstate->__uvmInitMissing__(pGpu, pEngstate); +} + +static inline NV_STATUS uvmStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate) { + return pEngstate->__uvmStatePreInitLocked__(pGpu, pEngstate); +} + +static inline NV_STATUS uvmStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate) { + return pEngstate->__uvmStatePreInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS uvmStateInitLocked_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate) { + return pEngstate->__uvmStateInitLocked__(pGpu, pEngstate); +} + +static inline NV_STATUS uvmStatePreLoad_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { + return pEngstate->__uvmStatePreLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS uvmStateLoad_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { + return pEngstate->__uvmStateLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS uvmStatePostLoad_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { + return pEngstate->__uvmStatePostLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS uvmStatePreUnload_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { + return pEngstate->__uvmStatePreUnload__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS uvmStateUnload_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { + return pEngstate->__uvmStateUnload__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS uvmStatePostUnload_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { + return pEngstate->__uvmStatePostUnload__(pGpu, pEngstate, arg3); +} + +static inline NvBool uvmIsPresent_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate) { + return pEngstate->__uvmIsPresent__(pGpu, pEngstate); +} + +static inline NvBool uvmClearInterrupt_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pIntrService, IntrServiceClearInterruptArguments *pParams) { + return pIntrService->__uvmClearInterrupt__(pGpu, pIntrService, pParams); +} + +static inline NV_STATUS uvmServiceNotificationInterrupt_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { + return pIntrService->__uvmServiceNotificationInterrupt__(pGpu, pIntrService, pParams); +} + NV_STATUS uvmInitializeAccessCntrBuffer_IMPL(OBJGPU *pGpu, struct OBJUVM *pUvm, struct AccessCounterBuffer *pAccessCounterBuffer); @@ -279,159 +405,164 @@ static inline NV_STATUS uvmSetupAccessCntrBuffer(OBJGPU *pGpu, struct OBJUVM *pU #define uvmSetupAccessCntrBuffer_HAL(pGpu, pUvm, accessCounterIndex) uvmSetupAccessCntrBuffer(pGpu, pUvm, accessCounterIndex) -NV_STATUS uvmReadAccessCntrBufferPutPtr_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 *arg0); +NV_STATUS uvmReadAccessCntrBufferPutPtr_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 *arg4); #ifdef __nvoc_uvm_h_disabled -static inline NV_STATUS uvmReadAccessCntrBufferPutPtr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 *arg0) { +static inline NV_STATUS uvmReadAccessCntrBufferPutPtr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 *arg4) { NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_uvm_h_disabled -#define uvmReadAccessCntrBufferPutPtr(pGpu, pUvm, accessCounterIndex, arg0) uvmReadAccessCntrBufferPutPtr_TU102(pGpu, pUvm, accessCounterIndex, arg0) +#define uvmReadAccessCntrBufferPutPtr(pGpu, pUvm, accessCounterIndex, arg4) uvmReadAccessCntrBufferPutPtr_TU102(pGpu, pUvm, accessCounterIndex, arg4) #endif //__nvoc_uvm_h_disabled -#define uvmReadAccessCntrBufferPutPtr_HAL(pGpu, pUvm, accessCounterIndex, arg0) uvmReadAccessCntrBufferPutPtr(pGpu, pUvm, accessCounterIndex, arg0) +#define uvmReadAccessCntrBufferPutPtr_HAL(pGpu, pUvm, accessCounterIndex, arg4) uvmReadAccessCntrBufferPutPtr(pGpu, pUvm, accessCounterIndex, arg4) -NV_STATUS uvmReadAccessCntrBufferGetPtr_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 *arg0); +NV_STATUS uvmReadAccessCntrBufferGetPtr_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 *arg4); #ifdef __nvoc_uvm_h_disabled -static inline NV_STATUS uvmReadAccessCntrBufferGetPtr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 *arg0) { +static inline NV_STATUS uvmReadAccessCntrBufferGetPtr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 *arg4) { NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_uvm_h_disabled -#define uvmReadAccessCntrBufferGetPtr(pGpu, pUvm, accessCounterIndex, arg0) uvmReadAccessCntrBufferGetPtr_TU102(pGpu, pUvm, accessCounterIndex, arg0) +#define uvmReadAccessCntrBufferGetPtr(pGpu, pUvm, accessCounterIndex, arg4) uvmReadAccessCntrBufferGetPtr_TU102(pGpu, pUvm, accessCounterIndex, arg4) #endif //__nvoc_uvm_h_disabled -#define uvmReadAccessCntrBufferGetPtr_HAL(pGpu, pUvm, accessCounterIndex, arg0) uvmReadAccessCntrBufferGetPtr(pGpu, pUvm, accessCounterIndex, arg0) +#define uvmReadAccessCntrBufferGetPtr_HAL(pGpu, pUvm, accessCounterIndex, arg4) uvmReadAccessCntrBufferGetPtr(pGpu, pUvm, accessCounterIndex, arg4) -NV_STATUS uvmReadAccessCntrBufferFullPtr_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvBool *arg0); +NV_STATUS uvmReadAccessCntrBufferFullPtr_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvBool *arg4); #ifdef __nvoc_uvm_h_disabled -static inline NV_STATUS uvmReadAccessCntrBufferFullPtr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvBool *arg0) { +static inline NV_STATUS uvmReadAccessCntrBufferFullPtr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvBool *arg4) { NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_uvm_h_disabled -#define uvmReadAccessCntrBufferFullPtr(pGpu, pUvm, accessCounterIndex, arg0) uvmReadAccessCntrBufferFullPtr_TU102(pGpu, pUvm, accessCounterIndex, arg0) +#define uvmReadAccessCntrBufferFullPtr(pGpu, pUvm, accessCounterIndex, arg4) uvmReadAccessCntrBufferFullPtr_TU102(pGpu, pUvm, accessCounterIndex, arg4) #endif //__nvoc_uvm_h_disabled -#define uvmReadAccessCntrBufferFullPtr_HAL(pGpu, pUvm, accessCounterIndex, arg0) uvmReadAccessCntrBufferFullPtr(pGpu, pUvm, accessCounterIndex, arg0) +#define uvmReadAccessCntrBufferFullPtr_HAL(pGpu, pUvm, accessCounterIndex, arg4) uvmReadAccessCntrBufferFullPtr(pGpu, pUvm, accessCounterIndex, arg4) + +static inline NV_STATUS uvmResetAccessCntrBuffer_92bfc3(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 arg4) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} -NV_STATUS uvmResetAccessCntrBuffer_GV100(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 arg0); +NV_STATUS uvmResetAccessCntrBuffer_GV100(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 arg4); #ifdef __nvoc_uvm_h_disabled -static inline NV_STATUS uvmResetAccessCntrBuffer(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 arg0) { +static inline NV_STATUS uvmResetAccessCntrBuffer(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_uvm_h_disabled -#define uvmResetAccessCntrBuffer(pGpu, pUvm, accessCounterIndex, arg0) uvmResetAccessCntrBuffer_GV100(pGpu, pUvm, accessCounterIndex, arg0) +#define uvmResetAccessCntrBuffer(pGpu, pUvm, accessCounterIndex, arg4) uvmResetAccessCntrBuffer_92bfc3(pGpu, pUvm, accessCounterIndex, arg4) #endif //__nvoc_uvm_h_disabled -#define uvmResetAccessCntrBuffer_HAL(pGpu, pUvm, accessCounterIndex, arg0) uvmResetAccessCntrBuffer(pGpu, pUvm, accessCounterIndex, arg0) +#define uvmResetAccessCntrBuffer_HAL(pGpu, pUvm, accessCounterIndex, arg4) uvmResetAccessCntrBuffer(pGpu, pUvm, accessCounterIndex, arg4) -NV_STATUS uvmAccessCntrSetGranularity_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, ACCESS_CNTR_TYPE arg0, NvU32 arg1); +NV_STATUS uvmAccessCntrSetGranularity_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, ACCESS_CNTR_TYPE arg4, NvU32 arg5); #ifdef __nvoc_uvm_h_disabled -static inline NV_STATUS uvmAccessCntrSetGranularity(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, ACCESS_CNTR_TYPE arg0, NvU32 arg1) { +static inline NV_STATUS uvmAccessCntrSetGranularity(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, ACCESS_CNTR_TYPE arg4, NvU32 arg5) { NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_uvm_h_disabled -#define uvmAccessCntrSetGranularity(pGpu, pUvm, accessCounterIndex, arg0, arg1) uvmAccessCntrSetGranularity_TU102(pGpu, pUvm, accessCounterIndex, arg0, arg1) +#define uvmAccessCntrSetGranularity(pGpu, pUvm, accessCounterIndex, arg4, arg5) uvmAccessCntrSetGranularity_TU102(pGpu, pUvm, accessCounterIndex, arg4, arg5) #endif //__nvoc_uvm_h_disabled -#define uvmAccessCntrSetGranularity_HAL(pGpu, pUvm, accessCounterIndex, arg0, arg1) uvmAccessCntrSetGranularity(pGpu, pUvm, accessCounterIndex, arg0, arg1) +#define uvmAccessCntrSetGranularity_HAL(pGpu, pUvm, accessCounterIndex, arg4, arg5) uvmAccessCntrSetGranularity(pGpu, pUvm, accessCounterIndex, arg4, arg5) -NV_STATUS uvmAccessCntrSetThreshold_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 arg0); +NV_STATUS uvmAccessCntrSetThreshold_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 arg4); #ifdef __nvoc_uvm_h_disabled -static inline NV_STATUS uvmAccessCntrSetThreshold(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 arg0) { +static inline NV_STATUS uvmAccessCntrSetThreshold(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_uvm_h_disabled -#define uvmAccessCntrSetThreshold(pGpu, pUvm, accessCounterIndex, arg0) uvmAccessCntrSetThreshold_TU102(pGpu, pUvm, accessCounterIndex, arg0) +#define uvmAccessCntrSetThreshold(pGpu, pUvm, accessCounterIndex, arg4) uvmAccessCntrSetThreshold_TU102(pGpu, pUvm, accessCounterIndex, arg4) #endif //__nvoc_uvm_h_disabled -#define uvmAccessCntrSetThreshold_HAL(pGpu, pUvm, accessCounterIndex, arg0) uvmAccessCntrSetThreshold(pGpu, pUvm, accessCounterIndex, arg0) +#define uvmAccessCntrSetThreshold_HAL(pGpu, pUvm, accessCounterIndex, arg4) uvmAccessCntrSetThreshold(pGpu, pUvm, accessCounterIndex, arg4) -NV_STATUS uvmAccessCntrSetCounterLimit_GV100(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 arg0, NvU32 arg1); +NV_STATUS uvmAccessCntrSetCounterLimit_GV100(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 arg4, NvU32 arg5); #ifdef __nvoc_uvm_h_disabled -static inline NV_STATUS uvmAccessCntrSetCounterLimit(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 arg0, NvU32 arg1) { +static inline NV_STATUS uvmAccessCntrSetCounterLimit(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 arg4, NvU32 arg5) { NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_uvm_h_disabled -#define uvmAccessCntrSetCounterLimit(pGpu, pUvm, accessCounterIndex, arg0, arg1) uvmAccessCntrSetCounterLimit_GV100(pGpu, pUvm, accessCounterIndex, arg0, arg1) +#define uvmAccessCntrSetCounterLimit(pGpu, pUvm, accessCounterIndex, arg4, arg5) uvmAccessCntrSetCounterLimit_GV100(pGpu, pUvm, accessCounterIndex, arg4, arg5) #endif //__nvoc_uvm_h_disabled -#define uvmAccessCntrSetCounterLimit_HAL(pGpu, pUvm, accessCounterIndex, arg0, arg1) uvmAccessCntrSetCounterLimit(pGpu, pUvm, accessCounterIndex, arg0, arg1) +#define uvmAccessCntrSetCounterLimit_HAL(pGpu, pUvm, accessCounterIndex, arg4, arg5) uvmAccessCntrSetCounterLimit(pGpu, pUvm, accessCounterIndex, arg4, arg5) -NV_STATUS uvmWriteAccessCntrBufferGetPtr_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 arg0); +NV_STATUS uvmWriteAccessCntrBufferGetPtr_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 arg4); #ifdef __nvoc_uvm_h_disabled -static inline NV_STATUS uvmWriteAccessCntrBufferGetPtr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 arg0) { +static inline NV_STATUS uvmWriteAccessCntrBufferGetPtr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvU32 arg4) { NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_uvm_h_disabled -#define uvmWriteAccessCntrBufferGetPtr(pGpu, pUvm, accessCounterIndex, arg0) uvmWriteAccessCntrBufferGetPtr_TU102(pGpu, pUvm, accessCounterIndex, arg0) +#define uvmWriteAccessCntrBufferGetPtr(pGpu, pUvm, accessCounterIndex, arg4) uvmWriteAccessCntrBufferGetPtr_TU102(pGpu, pUvm, accessCounterIndex, arg4) #endif //__nvoc_uvm_h_disabled -#define uvmWriteAccessCntrBufferGetPtr_HAL(pGpu, pUvm, accessCounterIndex, arg0) uvmWriteAccessCntrBufferGetPtr(pGpu, pUvm, accessCounterIndex, arg0) +#define uvmWriteAccessCntrBufferGetPtr_HAL(pGpu, pUvm, accessCounterIndex, arg4) uvmWriteAccessCntrBufferGetPtr(pGpu, pUvm, accessCounterIndex, arg4) -NV_STATUS uvmEnableAccessCntr_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvBool arg0); +NV_STATUS uvmEnableAccessCntr_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvBool arg4); #ifdef __nvoc_uvm_h_disabled -static inline NV_STATUS uvmEnableAccessCntr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvBool arg0) { +static inline NV_STATUS uvmEnableAccessCntr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvBool arg4) { NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_uvm_h_disabled -#define uvmEnableAccessCntr(pGpu, pUvm, accessCounterIndex, arg0) uvmEnableAccessCntr_TU102(pGpu, pUvm, accessCounterIndex, arg0) +#define uvmEnableAccessCntr(pGpu, pUvm, accessCounterIndex, arg4) uvmEnableAccessCntr_TU102(pGpu, pUvm, accessCounterIndex, arg4) #endif //__nvoc_uvm_h_disabled -#define uvmEnableAccessCntr_HAL(pGpu, pUvm, accessCounterIndex, arg0) uvmEnableAccessCntr(pGpu, pUvm, accessCounterIndex, arg0) +#define uvmEnableAccessCntr_HAL(pGpu, pUvm, accessCounterIndex, arg4) uvmEnableAccessCntr(pGpu, pUvm, accessCounterIndex, arg4) -NV_STATUS uvmDisableAccessCntr_GV100(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvBool arg0); +NV_STATUS uvmDisableAccessCntr_GV100(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvBool arg4); #ifdef __nvoc_uvm_h_disabled -static inline NV_STATUS uvmDisableAccessCntr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvBool arg0) { +static inline NV_STATUS uvmDisableAccessCntr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvBool arg4) { NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_uvm_h_disabled -#define uvmDisableAccessCntr(pGpu, pUvm, accessCounterIndex, arg0) uvmDisableAccessCntr_GV100(pGpu, pUvm, accessCounterIndex, arg0) +#define uvmDisableAccessCntr(pGpu, pUvm, accessCounterIndex, arg4) uvmDisableAccessCntr_GV100(pGpu, pUvm, accessCounterIndex, arg4) #endif //__nvoc_uvm_h_disabled -#define uvmDisableAccessCntr_HAL(pGpu, pUvm, accessCounterIndex, arg0) uvmDisableAccessCntr(pGpu, pUvm, accessCounterIndex, arg0) +#define uvmDisableAccessCntr_HAL(pGpu, pUvm, accessCounterIndex, arg4) uvmDisableAccessCntr(pGpu, pUvm, accessCounterIndex, arg4) -NV_STATUS uvmEnableAccessCntrIntr_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 arg0); +NV_STATUS uvmEnableAccessCntrIntr_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 arg3); #ifdef __nvoc_uvm_h_disabled -static inline NV_STATUS uvmEnableAccessCntrIntr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 arg0) { +static inline NV_STATUS uvmEnableAccessCntrIntr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 arg3) { NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_uvm_h_disabled -#define uvmEnableAccessCntrIntr(pGpu, pUvm, arg0) uvmEnableAccessCntrIntr_TU102(pGpu, pUvm, arg0) +#define uvmEnableAccessCntrIntr(pGpu, pUvm, arg3) uvmEnableAccessCntrIntr_TU102(pGpu, pUvm, arg3) #endif //__nvoc_uvm_h_disabled -#define uvmEnableAccessCntrIntr_HAL(pGpu, pUvm, arg0) uvmEnableAccessCntrIntr(pGpu, pUvm, arg0) +#define uvmEnableAccessCntrIntr_HAL(pGpu, pUvm, arg3) uvmEnableAccessCntrIntr(pGpu, pUvm, arg3) NV_STATUS uvmDisableAccessCntrIntr_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm); @@ -447,19 +578,19 @@ static inline NV_STATUS uvmDisableAccessCntrIntr(OBJGPU *pGpu, struct OBJUVM *pU #define uvmDisableAccessCntrIntr_HAL(pGpu, pUvm) uvmDisableAccessCntrIntr(pGpu, pUvm) -NV_STATUS uvmGetAccessCntrRegisterMappings_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvP64 *arg0, NvP64 *arg1, NvP64 *arg2, NvP64 *arg3, NvP64 *arg4, NvP64 *arg5, NvU32 *arg6); +NV_STATUS uvmGetAccessCntrRegisterMappings_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvP64 *arg4, NvP64 *arg5, NvP64 *arg6, NvP64 *arg7, NvP64 *arg8, NvP64 *arg9, NvU32 *arg10); #ifdef __nvoc_uvm_h_disabled -static inline NV_STATUS uvmGetAccessCntrRegisterMappings(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvP64 *arg0, NvP64 *arg1, NvP64 *arg2, NvP64 *arg3, NvP64 *arg4, NvP64 *arg5, NvU32 *arg6) { +static inline NV_STATUS uvmGetAccessCntrRegisterMappings(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 accessCounterIndex, NvP64 *arg4, NvP64 *arg5, NvP64 *arg6, NvP64 *arg7, NvP64 *arg8, NvP64 *arg9, NvU32 *arg10) { NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_uvm_h_disabled -#define uvmGetAccessCntrRegisterMappings(pGpu, pUvm, accessCounterIndex, arg0, arg1, arg2, arg3, arg4, arg5, arg6) uvmGetAccessCntrRegisterMappings_TU102(pGpu, pUvm, accessCounterIndex, arg0, arg1, arg2, arg3, arg4, arg5, arg6) +#define uvmGetAccessCntrRegisterMappings(pGpu, pUvm, accessCounterIndex, arg4, arg5, arg6, arg7, arg8, arg9, arg10) uvmGetAccessCntrRegisterMappings_TU102(pGpu, pUvm, accessCounterIndex, arg4, arg5, arg6, arg7, arg8, arg9, arg10) #endif //__nvoc_uvm_h_disabled -#define uvmGetAccessCntrRegisterMappings_HAL(pGpu, pUvm, accessCounterIndex, arg0, arg1, arg2, arg3, arg4, arg5, arg6) uvmGetAccessCntrRegisterMappings(pGpu, pUvm, accessCounterIndex, arg0, arg1, arg2, arg3, arg4, arg5, arg6) +#define uvmGetAccessCntrRegisterMappings_HAL(pGpu, pUvm, accessCounterIndex, arg4, arg5, arg6, arg7, arg8, arg9, arg10) uvmGetAccessCntrRegisterMappings(pGpu, pUvm, accessCounterIndex, arg4, arg5, arg6, arg7, arg8, arg9, arg10) NV_STATUS uvmAccessCntrService_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm); @@ -643,103 +774,23 @@ static inline NvU32 uvmGetRegOffsetAccessCntrBufferSize(struct OBJUVM *pUvm, NvU void uvmStateDestroy_IMPL(OBJGPU *pGpu, struct OBJUVM *pUvm); -static inline void uvmStateDestroy_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pUvm) { - pUvm->__uvmStateDestroy__(pGpu, pUvm); -} - NV_STATUS uvmStateInitUnlocked_IMPL(OBJGPU *pGpu, struct OBJUVM *pUvm); -static inline NV_STATUS uvmStateInitUnlocked_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pUvm) { - return pUvm->__uvmStateInitUnlocked__(pGpu, pUvm); -} - -NV_STATUS uvmAccessCntrBufferUnregister_IMPL(OBJGPU *arg0, struct OBJUVM *arg1, NvU32 accessCounterIndex); +NV_STATUS uvmAccessCntrBufferUnregister_IMPL(OBJGPU *arg1, struct OBJUVM *arg2, NvU32 accessCounterIndex); -static inline NV_STATUS uvmAccessCntrBufferUnregister_ac1694(OBJGPU *arg0, struct OBJUVM *arg1, NvU32 accessCounterIndex) { +static inline NV_STATUS uvmAccessCntrBufferUnregister_ac1694(OBJGPU *arg1, struct OBJUVM *arg2, NvU32 accessCounterIndex) { return NV_OK; } -static inline NV_STATUS uvmAccessCntrBufferUnregister_DISPATCH(OBJGPU *arg0, struct OBJUVM *arg1, NvU32 accessCounterIndex) { - return arg1->__uvmAccessCntrBufferUnregister__(arg0, arg1, accessCounterIndex); -} - -NV_STATUS uvmAccessCntrBufferRegister_IMPL(OBJGPU *arg0, struct OBJUVM *arg1, NvU32 accessCounterIndex, NvU32 arg2, RmPhysAddr *arg3); +NV_STATUS uvmAccessCntrBufferRegister_IMPL(OBJGPU *arg1, struct OBJUVM *arg2, NvU32 accessCounterIndex, NvU32 arg4, RmPhysAddr *arg5); -static inline NV_STATUS uvmAccessCntrBufferRegister_ac1694(OBJGPU *arg0, struct OBJUVM *arg1, NvU32 accessCounterIndex, NvU32 arg2, RmPhysAddr *arg3) { +static inline NV_STATUS uvmAccessCntrBufferRegister_ac1694(OBJGPU *arg1, struct OBJUVM *arg2, NvU32 accessCounterIndex, NvU32 arg4, RmPhysAddr *arg5) { return NV_OK; } -static inline NV_STATUS uvmAccessCntrBufferRegister_DISPATCH(OBJGPU *arg0, struct OBJUVM *arg1, NvU32 accessCounterIndex, NvU32 arg2, RmPhysAddr *arg3) { - return arg1->__uvmAccessCntrBufferRegister__(arg0, arg1, accessCounterIndex, arg2, arg3); -} - -void uvmRegisterIntrService_IMPL(OBJGPU *arg0, struct OBJUVM *pUvm, IntrServiceRecord arg1[171]); - -static inline void uvmRegisterIntrService_DISPATCH(OBJGPU *arg0, struct OBJUVM *pUvm, IntrServiceRecord arg1[171]) { - pUvm->__uvmRegisterIntrService__(arg0, pUvm, arg1); -} - -NvU32 uvmServiceInterrupt_IMPL(OBJGPU *arg0, struct OBJUVM *pUvm, IntrServiceServiceInterruptArguments *arg1); - -static inline NvU32 uvmServiceInterrupt_DISPATCH(OBJGPU *arg0, struct OBJUVM *pUvm, IntrServiceServiceInterruptArguments *arg1) { - return pUvm->__uvmServiceInterrupt__(arg0, pUvm, arg1); -} - -static inline NV_STATUS uvmStateLoad_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg0) { - return pEngstate->__uvmStateLoad__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS uvmStateUnload_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg0) { - return pEngstate->__uvmStateUnload__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS uvmServiceNotificationInterrupt_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { - return pIntrService->__uvmServiceNotificationInterrupt__(pGpu, pIntrService, pParams); -} +void uvmRegisterIntrService_IMPL(OBJGPU *arg1, struct OBJUVM *pUvm, IntrServiceRecord arg3[175]); -static inline NV_STATUS uvmStateInitLocked_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate) { - return pEngstate->__uvmStateInitLocked__(pGpu, pEngstate); -} - -static inline NV_STATUS uvmStatePreLoad_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg0) { - return pEngstate->__uvmStatePreLoad__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS uvmStatePostUnload_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg0) { - return pEngstate->__uvmStatePostUnload__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS uvmStatePreUnload_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg0) { - return pEngstate->__uvmStatePreUnload__(pGpu, pEngstate, arg0); -} - -static inline void uvmInitMissing_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate) { - pEngstate->__uvmInitMissing__(pGpu, pEngstate); -} - -static inline NV_STATUS uvmStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate) { - return pEngstate->__uvmStatePreInitLocked__(pGpu, pEngstate); -} - -static inline NV_STATUS uvmStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate) { - return pEngstate->__uvmStatePreInitUnlocked__(pGpu, pEngstate); -} - -static inline NvBool uvmClearInterrupt_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pIntrService, IntrServiceClearInterruptArguments *pParams) { - return pIntrService->__uvmClearInterrupt__(pGpu, pIntrService, pParams); -} - -static inline NV_STATUS uvmStatePostLoad_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg0) { - return pEngstate->__uvmStatePostLoad__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS uvmConstructEngine_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, ENGDESCRIPTOR arg0) { - return pEngstate->__uvmConstructEngine__(pGpu, pEngstate, arg0); -} - -static inline NvBool uvmIsPresent_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate) { - return pEngstate->__uvmIsPresent__(pGpu, pEngstate); -} +NvU32 uvmServiceInterrupt_IMPL(OBJGPU *arg1, struct OBJUVM *pUvm, IntrServiceServiceInterruptArguments *arg3); #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_uvm_sw_nvoc.c b/src/nvidia/generated/g_uvm_sw_nvoc.c index 281f605c13..fa06b7f712 100644 --- a/src/nvidia/generated/g_uvm_sw_nvoc.c +++ b/src/nvidia/generated/g_uvm_sw_nvoc.c @@ -120,134 +120,172 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_UvmSwObject = /*pExportInfo=*/ &__nvoc_export_info_UvmSwObject }; -static NV_STATUS __nvoc_thunk_UvmSwObject_chandesGetSwMethods(struct ChannelDescendant *pUvmSw, const METHOD **ppMethods, NvU32 *pNumMethods) { - return uvmswGetSwMethods((struct UvmSwObject *)(((unsigned char *)pUvmSw) - __nvoc_rtti_UvmSwObject_ChannelDescendant.offset), ppMethods, pNumMethods); +// 1 down-thunk(s) defined to bridge methods in UvmSwObject from superclasses + +// uvmswGetSwMethods: virtual halified (singleton optimized) override (chandes) base (chandes) body +static NV_STATUS __nvoc_down_thunk_UvmSwObject_chandesGetSwMethods(struct ChannelDescendant *pUvmSw, const METHOD **ppMethods, NvU32 *pNumMethods) { + return uvmswGetSwMethods((struct UvmSwObject *)(((unsigned char *) pUvmSw) - __nvoc_rtti_UvmSwObject_ChannelDescendant.offset), ppMethods, pNumMethods); } -static NV_STATUS __nvoc_thunk_ChannelDescendant_uvmswCheckMemInterUnmap(struct UvmSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_UvmSwObject_ChannelDescendant.offset), bSubdeviceHandleProvided); + +// 31 up-thunk(s) defined to bridge methods in UvmSwObject to superclasses + +// uvmswIsSwMethodStalling: virtual inherited (chandes) base (chandes) +static NvBool __nvoc_up_thunk_ChannelDescendant_uvmswIsSwMethodStalling(struct UvmSwObject *pChannelDescendant, NvU32 hHandle) { + return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_UvmSwObject_ChannelDescendant.offset), hHandle); } -static NvBool __nvoc_thunk_GpuResource_uvmswShareCallback(struct UvmSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// uvmswCheckMemInterUnmap: virtual inherited (chandes) base (chandes) +static NV_STATUS __nvoc_up_thunk_ChannelDescendant_uvmswCheckMemInterUnmap(struct UvmSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { + return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_UvmSwObject_ChannelDescendant.offset), bSubdeviceHandleProvided); } -static NvBool __nvoc_thunk_RmResource_uvmswAccessCallback(struct UvmSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// uvmswControl: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_uvmswControl(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_uvmswMapTo(struct UvmSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset), pParams); +// uvmswMap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_uvmswMap(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_GpuResource_uvmswGetMapAddrSpace(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// uvmswUnmap: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_uvmswUnmap(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_Notifier_uvmswSetNotificationShare(struct UvmSwObject *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_UvmSwObject_Notifier.offset), pNotifShare); +// uvmswShareCallback: virtual inherited (gpures) base (chandes) +static NvBool __nvoc_up_thunk_GpuResource_uvmswShareCallback(struct UvmSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NvU32 __nvoc_thunk_RsResource_uvmswGetRefCount(struct UvmSwObject *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset)); +// uvmswGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_uvmswGetRegBaseOffsetAndSize(struct UvmSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), pGpu, pOffset, pSize); } -static void __nvoc_thunk_RsResource_uvmswAddAdditionalDependants(struct RsClient *pClient, struct UvmSwObject *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset), pReference); +// uvmswGetMapAddrSpace: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_uvmswGetMapAddrSpace(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_RmResource_uvmswControl_Prologue(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), pCallContext, pParams); +// uvmswInternalControlForward: virtual inherited (gpures) base (chandes) +static NV_STATUS __nvoc_up_thunk_GpuResource_uvmswInternalControlForward(struct UvmSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_GpuResource_uvmswGetRegBaseOffsetAndSize(struct UvmSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), pGpu, pOffset, pSize); +// uvmswGetInternalObjectHandle: virtual inherited (gpures) base (chandes) +static NvHandle __nvoc_up_thunk_GpuResource_uvmswGetInternalObjectHandle(struct UvmSwObject *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_uvmswInternalControlForward(struct UvmSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), command, pParams, size); +// uvmswAccessCallback: virtual inherited (rmres) base (chandes) +static NvBool __nvoc_up_thunk_RmResource_uvmswAccessCallback(struct UvmSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RsResource_uvmswUnmapFrom(struct UvmSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset), pParams); +// uvmswGetMemInterMapParams: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_uvmswGetMemInterMapParams(struct UvmSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), pParams); } -static void __nvoc_thunk_RmResource_uvmswControl_Epilogue(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), pCallContext, pParams); +// uvmswGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_uvmswGetMemoryMappingDescriptor(struct UvmSwObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), ppMemDesc); } -static NvHandle __nvoc_thunk_GpuResource_uvmswGetInternalObjectHandle(struct UvmSwObject *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset)); +// uvmswControlSerialization_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_uvmswControlSerialization_Prologue(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_uvmswControl(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), pCallContext, pParams); +// uvmswControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_uvmswControlSerialization_Epilogue(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_uvmswUnmap(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), pCallContext, pCpuMapping); +// uvmswControl_Prologue: virtual inherited (rmres) base (chandes) +static NV_STATUS __nvoc_up_thunk_RmResource_uvmswControl_Prologue(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_uvmswGetMemInterMapParams(struct UvmSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), pParams); +// uvmswControl_Epilogue: virtual inherited (rmres) base (chandes) +static void __nvoc_up_thunk_RmResource_uvmswControl_Epilogue(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_uvmswGetMemoryMappingDescriptor(struct UvmSwObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), ppMemDesc); +// uvmswCanCopy: virtual inherited (res) base (chandes) +static NvBool __nvoc_up_thunk_RsResource_uvmswCanCopy(struct UvmSwObject *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset)); } -static NvBool __nvoc_thunk_ChannelDescendant_uvmswIsSwMethodStalling(struct UvmSwObject *pChannelDescendant, NvU32 hHandle) { - return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_UvmSwObject_ChannelDescendant.offset), hHandle); +// uvmswIsDuplicate: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_uvmswIsDuplicate(struct UvmSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_uvmswControlFilter(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset), pCallContext, pParams); +// uvmswPreDestruct: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_uvmswPreDestruct(struct UvmSwObject *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_uvmswUnregisterEvent(struct UvmSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_UvmSwObject_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// uvmswControlFilter: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_uvmswControlFilter(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_uvmswControlSerialization_Prologue(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), pCallContext, pParams); +// uvmswIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body +static NvBool __nvoc_up_thunk_RsResource_uvmswIsPartialUnmapSupported(struct UvmSwObject *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_uvmswCanCopy(struct UvmSwObject *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset)); +// uvmswMapTo: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_uvmswMapTo(struct UvmSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RsResource_uvmswIsPartialUnmapSupported(struct UvmSwObject *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset)); +// uvmswUnmapFrom: virtual inherited (res) base (chandes) +static NV_STATUS __nvoc_up_thunk_RsResource_uvmswUnmapFrom(struct UvmSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset), pParams); } -static void __nvoc_thunk_RsResource_uvmswPreDestruct(struct UvmSwObject *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset)); +// uvmswGetRefCount: virtual inherited (res) base (chandes) +static NvU32 __nvoc_up_thunk_RsResource_uvmswGetRefCount(struct UvmSwObject *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_uvmswIsDuplicate(struct UvmSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset), hMemory, pDuplicate); +// uvmswAddAdditionalDependants: virtual inherited (res) base (chandes) +static void __nvoc_up_thunk_RsResource_uvmswAddAdditionalDependants(struct RsClient *pClient, struct UvmSwObject *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset), pReference); } -static void __nvoc_thunk_RmResource_uvmswControlSerialization_Epilogue(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), pCallContext, pParams); +// uvmswGetNotificationListPtr: virtual inherited (notify) base (chandes) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_uvmswGetNotificationListPtr(struct UvmSwObject *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_UvmSwObject_Notifier.offset)); } -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_uvmswGetNotificationListPtr(struct UvmSwObject *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_UvmSwObject_Notifier.offset)); +// uvmswGetNotificationShare: virtual inherited (notify) base (chandes) +static struct NotifShare * __nvoc_up_thunk_Notifier_uvmswGetNotificationShare(struct UvmSwObject *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_UvmSwObject_Notifier.offset)); } -static struct NotifShare *__nvoc_thunk_Notifier_uvmswGetNotificationShare(struct UvmSwObject *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_UvmSwObject_Notifier.offset)); +// uvmswSetNotificationShare: virtual inherited (notify) base (chandes) +static void __nvoc_up_thunk_Notifier_uvmswSetNotificationShare(struct UvmSwObject *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_UvmSwObject_Notifier.offset), pNotifShare); } -static NV_STATUS __nvoc_thunk_GpuResource_uvmswMap(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// uvmswUnregisterEvent: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_uvmswUnregisterEvent(struct UvmSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_UvmSwObject_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static NV_STATUS __nvoc_thunk_Notifier_uvmswGetOrAllocNotifShare(struct UvmSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_UvmSwObject_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +// uvmswGetOrAllocNotifShare: virtual inherited (notify) base (chandes) +static NV_STATUS __nvoc_up_thunk_Notifier_uvmswGetOrAllocNotifShare(struct UvmSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_UvmSwObject_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_UvmSwObject = { /*numEntries=*/ 0, @@ -289,6 +327,7 @@ NV_STATUS __nvoc_ctor_UvmSwObject(UvmSwObject *pThis, RmHalspecOwner *pRmhalspec return status; } +// Vtable initialization static void __nvoc_init_funcTable_UvmSwObject_1(UvmSwObject *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -297,75 +336,109 @@ static void __nvoc_init_funcTable_UvmSwObject_1(UvmSwObject *pThis, RmHalspecOwn PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // Hal function -- uvmswGetSwMethods + // uvmswGetSwMethods -- virtual halified (singleton optimized) override (chandes) base (chandes) body pThis->__uvmswGetSwMethods__ = &uvmswGetSwMethods_56cd7a; + pThis->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ = &__nvoc_down_thunk_UvmSwObject_chandesGetSwMethods; - pThis->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ = &__nvoc_thunk_UvmSwObject_chandesGetSwMethods; + // uvmswIsSwMethodStalling -- virtual inherited (chandes) base (chandes) + pThis->__uvmswIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_uvmswIsSwMethodStalling; - pThis->__uvmswCheckMemInterUnmap__ = &__nvoc_thunk_ChannelDescendant_uvmswCheckMemInterUnmap; + // uvmswCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) + pThis->__uvmswCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_uvmswCheckMemInterUnmap; - pThis->__uvmswShareCallback__ = &__nvoc_thunk_GpuResource_uvmswShareCallback; + // uvmswControl -- virtual inherited (gpures) base (chandes) + pThis->__uvmswControl__ = &__nvoc_up_thunk_GpuResource_uvmswControl; - pThis->__uvmswAccessCallback__ = &__nvoc_thunk_RmResource_uvmswAccessCallback; + // uvmswMap -- virtual inherited (gpures) base (chandes) + pThis->__uvmswMap__ = &__nvoc_up_thunk_GpuResource_uvmswMap; - pThis->__uvmswMapTo__ = &__nvoc_thunk_RsResource_uvmswMapTo; + // uvmswUnmap -- virtual inherited (gpures) base (chandes) + pThis->__uvmswUnmap__ = &__nvoc_up_thunk_GpuResource_uvmswUnmap; - pThis->__uvmswGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_uvmswGetMapAddrSpace; + // uvmswShareCallback -- virtual inherited (gpures) base (chandes) + pThis->__uvmswShareCallback__ = &__nvoc_up_thunk_GpuResource_uvmswShareCallback; - pThis->__uvmswSetNotificationShare__ = &__nvoc_thunk_Notifier_uvmswSetNotificationShare; + // uvmswGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) + pThis->__uvmswGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_uvmswGetRegBaseOffsetAndSize; - pThis->__uvmswGetRefCount__ = &__nvoc_thunk_RsResource_uvmswGetRefCount; + // uvmswGetMapAddrSpace -- virtual inherited (gpures) base (chandes) + pThis->__uvmswGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_uvmswGetMapAddrSpace; - pThis->__uvmswAddAdditionalDependants__ = &__nvoc_thunk_RsResource_uvmswAddAdditionalDependants; + // uvmswInternalControlForward -- virtual inherited (gpures) base (chandes) + pThis->__uvmswInternalControlForward__ = &__nvoc_up_thunk_GpuResource_uvmswInternalControlForward; - pThis->__uvmswControl_Prologue__ = &__nvoc_thunk_RmResource_uvmswControl_Prologue; + // uvmswGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) + pThis->__uvmswGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_uvmswGetInternalObjectHandle; - pThis->__uvmswGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_uvmswGetRegBaseOffsetAndSize; + // uvmswAccessCallback -- virtual inherited (rmres) base (chandes) + pThis->__uvmswAccessCallback__ = &__nvoc_up_thunk_RmResource_uvmswAccessCallback; - pThis->__uvmswInternalControlForward__ = &__nvoc_thunk_GpuResource_uvmswInternalControlForward; + // uvmswGetMemInterMapParams -- virtual inherited (rmres) base (chandes) + pThis->__uvmswGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_uvmswGetMemInterMapParams; - pThis->__uvmswUnmapFrom__ = &__nvoc_thunk_RsResource_uvmswUnmapFrom; + // uvmswGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) + pThis->__uvmswGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_uvmswGetMemoryMappingDescriptor; - pThis->__uvmswControl_Epilogue__ = &__nvoc_thunk_RmResource_uvmswControl_Epilogue; + // uvmswControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__uvmswControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_uvmswControlSerialization_Prologue; - pThis->__uvmswGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_uvmswGetInternalObjectHandle; + // uvmswControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__uvmswControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_uvmswControlSerialization_Epilogue; - pThis->__uvmswControl__ = &__nvoc_thunk_GpuResource_uvmswControl; + // uvmswControl_Prologue -- virtual inherited (rmres) base (chandes) + pThis->__uvmswControl_Prologue__ = &__nvoc_up_thunk_RmResource_uvmswControl_Prologue; - pThis->__uvmswUnmap__ = &__nvoc_thunk_GpuResource_uvmswUnmap; + // uvmswControl_Epilogue -- virtual inherited (rmres) base (chandes) + pThis->__uvmswControl_Epilogue__ = &__nvoc_up_thunk_RmResource_uvmswControl_Epilogue; - pThis->__uvmswGetMemInterMapParams__ = &__nvoc_thunk_RmResource_uvmswGetMemInterMapParams; + // uvmswCanCopy -- virtual inherited (res) base (chandes) + pThis->__uvmswCanCopy__ = &__nvoc_up_thunk_RsResource_uvmswCanCopy; - pThis->__uvmswGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_uvmswGetMemoryMappingDescriptor; + // uvmswIsDuplicate -- virtual inherited (res) base (chandes) + pThis->__uvmswIsDuplicate__ = &__nvoc_up_thunk_RsResource_uvmswIsDuplicate; - pThis->__uvmswIsSwMethodStalling__ = &__nvoc_thunk_ChannelDescendant_uvmswIsSwMethodStalling; + // uvmswPreDestruct -- virtual inherited (res) base (chandes) + pThis->__uvmswPreDestruct__ = &__nvoc_up_thunk_RsResource_uvmswPreDestruct; - pThis->__uvmswControlFilter__ = &__nvoc_thunk_RsResource_uvmswControlFilter; + // uvmswControlFilter -- virtual inherited (res) base (chandes) + pThis->__uvmswControlFilter__ = &__nvoc_up_thunk_RsResource_uvmswControlFilter; - pThis->__uvmswUnregisterEvent__ = &__nvoc_thunk_Notifier_uvmswUnregisterEvent; + // uvmswIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body + pThis->__uvmswIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_uvmswIsPartialUnmapSupported; - pThis->__uvmswControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_uvmswControlSerialization_Prologue; + // uvmswMapTo -- virtual inherited (res) base (chandes) + pThis->__uvmswMapTo__ = &__nvoc_up_thunk_RsResource_uvmswMapTo; - pThis->__uvmswCanCopy__ = &__nvoc_thunk_RsResource_uvmswCanCopy; + // uvmswUnmapFrom -- virtual inherited (res) base (chandes) + pThis->__uvmswUnmapFrom__ = &__nvoc_up_thunk_RsResource_uvmswUnmapFrom; - pThis->__uvmswIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_uvmswIsPartialUnmapSupported; + // uvmswGetRefCount -- virtual inherited (res) base (chandes) + pThis->__uvmswGetRefCount__ = &__nvoc_up_thunk_RsResource_uvmswGetRefCount; - pThis->__uvmswPreDestruct__ = &__nvoc_thunk_RsResource_uvmswPreDestruct; + // uvmswAddAdditionalDependants -- virtual inherited (res) base (chandes) + pThis->__uvmswAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_uvmswAddAdditionalDependants; - pThis->__uvmswIsDuplicate__ = &__nvoc_thunk_RsResource_uvmswIsDuplicate; + // uvmswGetNotificationListPtr -- virtual inherited (notify) base (chandes) + pThis->__uvmswGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_uvmswGetNotificationListPtr; - pThis->__uvmswControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_uvmswControlSerialization_Epilogue; + // uvmswGetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__uvmswGetNotificationShare__ = &__nvoc_up_thunk_Notifier_uvmswGetNotificationShare; - pThis->__uvmswGetNotificationListPtr__ = &__nvoc_thunk_Notifier_uvmswGetNotificationListPtr; + // uvmswSetNotificationShare -- virtual inherited (notify) base (chandes) + pThis->__uvmswSetNotificationShare__ = &__nvoc_up_thunk_Notifier_uvmswSetNotificationShare; - pThis->__uvmswGetNotificationShare__ = &__nvoc_thunk_Notifier_uvmswGetNotificationShare; + // uvmswUnregisterEvent -- virtual inherited (notify) base (chandes) + pThis->__uvmswUnregisterEvent__ = &__nvoc_up_thunk_Notifier_uvmswUnregisterEvent; - pThis->__uvmswMap__ = &__nvoc_thunk_GpuResource_uvmswMap; + // uvmswGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) + pThis->__uvmswGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_uvmswGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_UvmSwObject_1 with approximately 33 basic block(s). - pThis->__uvmswGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_uvmswGetOrAllocNotifShare; -} +// Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_UvmSwObject(UvmSwObject *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 32 per-object function pointer(s). __nvoc_init_funcTable_UvmSwObject_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_uvm_sw_nvoc.h b/src/nvidia/generated/g_uvm_sw_nvoc.h index 2a23ec3e19..e606749637 100644 --- a/src/nvidia/generated/g_uvm_sw_nvoc.h +++ b/src/nvidia/generated/g_uvm_sw_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_UVM_SW_NVOC_H_ #define _G_UVM_SW_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_uvm_sw_nvoc.h" #ifndef UVM_SW_H @@ -50,50 +58,61 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct UvmSwObject { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; - struct UvmSwObject *__nvoc_pbase_UvmSwObject; - NV_STATUS (*__uvmswGetSwMethods__)(struct UvmSwObject *, const METHOD **, NvU32 *); - NV_STATUS (*__uvmswCheckMemInterUnmap__)(struct UvmSwObject *, NvBool); - NvBool (*__uvmswShareCallback__)(struct UvmSwObject *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NvBool (*__uvmswAccessCallback__)(struct UvmSwObject *, struct RsClient *, void *, RsAccessRight); - NV_STATUS (*__uvmswMapTo__)(struct UvmSwObject *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__uvmswGetMapAddrSpace__)(struct UvmSwObject *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__uvmswSetNotificationShare__)(struct UvmSwObject *, struct NotifShare *); - NvU32 (*__uvmswGetRefCount__)(struct UvmSwObject *); - void (*__uvmswAddAdditionalDependants__)(struct RsClient *, struct UvmSwObject *, RsResourceRef *); - NV_STATUS (*__uvmswControl_Prologue__)(struct UvmSwObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__uvmswGetRegBaseOffsetAndSize__)(struct UvmSwObject *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__uvmswInternalControlForward__)(struct UvmSwObject *, NvU32, void *, NvU32); - NV_STATUS (*__uvmswUnmapFrom__)(struct UvmSwObject *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__uvmswControl_Epilogue__)(struct UvmSwObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__uvmswGetInternalObjectHandle__)(struct UvmSwObject *); - NV_STATUS (*__uvmswControl__)(struct UvmSwObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__uvmswUnmap__)(struct UvmSwObject *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__uvmswGetMemInterMapParams__)(struct UvmSwObject *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__uvmswGetMemoryMappingDescriptor__)(struct UvmSwObject *, struct MEMORY_DESCRIPTOR **); - NvBool (*__uvmswIsSwMethodStalling__)(struct UvmSwObject *, NvU32); - NV_STATUS (*__uvmswControlFilter__)(struct UvmSwObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__uvmswUnregisterEvent__)(struct UvmSwObject *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__uvmswControlSerialization_Prologue__)(struct UvmSwObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__uvmswCanCopy__)(struct UvmSwObject *); - NvBool (*__uvmswIsPartialUnmapSupported__)(struct UvmSwObject *); - void (*__uvmswPreDestruct__)(struct UvmSwObject *); - NV_STATUS (*__uvmswIsDuplicate__)(struct UvmSwObject *, NvHandle, NvBool *); - void (*__uvmswControlSerialization_Epilogue__)(struct UvmSwObject *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__uvmswGetNotificationListPtr__)(struct UvmSwObject *); - struct NotifShare *(*__uvmswGetNotificationShare__)(struct UvmSwObject *); - NV_STATUS (*__uvmswMap__)(struct UvmSwObject *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NV_STATUS (*__uvmswGetOrAllocNotifShare__)(struct UvmSwObject *, NvHandle, NvHandle, struct NotifShare **); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super^2 + struct INotifier *__nvoc_pbase_INotifier; // inotify super^3 + struct Notifier *__nvoc_pbase_Notifier; // notify super^2 + struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super + struct UvmSwObject *__nvoc_pbase_UvmSwObject; // uvmsw + + // Vtable with 32 per-object function pointers + NV_STATUS (*__uvmswGetSwMethods__)(struct UvmSwObject * /*this*/, const METHOD **, NvU32 *); // virtual halified (singleton optimized) override (chandes) base (chandes) body + NvBool (*__uvmswIsSwMethodStalling__)(struct UvmSwObject * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__uvmswCheckMemInterUnmap__)(struct UvmSwObject * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) + NV_STATUS (*__uvmswControl__)(struct UvmSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__uvmswMap__)(struct UvmSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__uvmswUnmap__)(struct UvmSwObject * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) + NvBool (*__uvmswShareCallback__)(struct UvmSwObject * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__uvmswGetRegBaseOffsetAndSize__)(struct UvmSwObject * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__uvmswGetMapAddrSpace__)(struct UvmSwObject * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (chandes) + NV_STATUS (*__uvmswInternalControlForward__)(struct UvmSwObject * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (chandes) + NvHandle (*__uvmswGetInternalObjectHandle__)(struct UvmSwObject * /*this*/); // virtual inherited (gpures) base (chandes) + NvBool (*__uvmswAccessCallback__)(struct UvmSwObject * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__uvmswGetMemInterMapParams__)(struct UvmSwObject * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__uvmswGetMemoryMappingDescriptor__)(struct UvmSwObject * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__uvmswControlSerialization_Prologue__)(struct UvmSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__uvmswControlSerialization_Epilogue__)(struct UvmSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NV_STATUS (*__uvmswControl_Prologue__)(struct UvmSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + void (*__uvmswControl_Epilogue__)(struct UvmSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) + NvBool (*__uvmswCanCopy__)(struct UvmSwObject * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__uvmswIsDuplicate__)(struct UvmSwObject * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (chandes) + void (*__uvmswPreDestruct__)(struct UvmSwObject * /*this*/); // virtual inherited (res) base (chandes) + NV_STATUS (*__uvmswControlFilter__)(struct UvmSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (chandes) + NvBool (*__uvmswIsPartialUnmapSupported__)(struct UvmSwObject * /*this*/); // inline virtual inherited (res) base (chandes) body + NV_STATUS (*__uvmswMapTo__)(struct UvmSwObject * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (chandes) + NV_STATUS (*__uvmswUnmapFrom__)(struct UvmSwObject * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (chandes) + NvU32 (*__uvmswGetRefCount__)(struct UvmSwObject * /*this*/); // virtual inherited (res) base (chandes) + void (*__uvmswAddAdditionalDependants__)(struct RsClient *, struct UvmSwObject * /*this*/, RsResourceRef *); // virtual inherited (res) base (chandes) + PEVENTNOTIFICATION * (*__uvmswGetNotificationListPtr__)(struct UvmSwObject * /*this*/); // virtual inherited (notify) base (chandes) + struct NotifShare * (*__uvmswGetNotificationShare__)(struct UvmSwObject * /*this*/); // virtual inherited (notify) base (chandes) + void (*__uvmswSetNotificationShare__)(struct UvmSwObject * /*this*/, struct NotifShare *); // virtual inherited (notify) base (chandes) + NV_STATUS (*__uvmswUnregisterEvent__)(struct UvmSwObject * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (chandes) + NV_STATUS (*__uvmswGetOrAllocNotifShare__)(struct UvmSwObject * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (chandes) + + // Data members NvU32 methodA; NvU32 methodB; NvBool bCancelMethodASet; @@ -110,6 +129,7 @@ typedef struct UvmSwObject UvmSwObject; #define __nvoc_class_id_UvmSwObject 0xc35503 #endif /* __nvoc_class_id_UvmSwObject */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_UvmSwObject; #define __staticCast_UvmSwObject(pThis) \ @@ -122,116 +142,127 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_UvmSwObject; ((UvmSwObject*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(UvmSwObject))) #endif //__nvoc_uvm_sw_h_disabled - NV_STATUS __nvoc_objCreateDynamic_UvmSwObject(UvmSwObject**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_UvmSwObject(UvmSwObject**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_UvmSwObject(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_UvmSwObject((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define uvmswGetSwMethods_FNPTR(pUvmSw) pUvmSw->__uvmswGetSwMethods__ #define uvmswGetSwMethods(pUvmSw, ppMethods, pNumMethods) uvmswGetSwMethods_DISPATCH(pUvmSw, ppMethods, pNumMethods) #define uvmswGetSwMethods_HAL(pUvmSw, ppMethods, pNumMethods) uvmswGetSwMethods_DISPATCH(pUvmSw, ppMethods, pNumMethods) +#define uvmswIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define uvmswIsSwMethodStalling(pChannelDescendant, hHandle) uvmswIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) +#define uvmswCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ #define uvmswCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) uvmswCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) +#define uvmswControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define uvmswControl(pGpuResource, pCallContext, pParams) uvmswControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define uvmswMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define uvmswMap(pGpuResource, pCallContext, pParams, pCpuMapping) uvmswMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define uvmswUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define uvmswUnmap(pGpuResource, pCallContext, pCpuMapping) uvmswUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define uvmswShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ #define uvmswShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) uvmswShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define uvmswAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) uvmswAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define uvmswMapTo(pResource, pParams) uvmswMapTo_DISPATCH(pResource, pParams) -#define uvmswGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) uvmswGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define uvmswSetNotificationShare(pNotifier, pNotifShare) uvmswSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define uvmswGetRefCount(pResource) uvmswGetRefCount_DISPATCH(pResource) -#define uvmswAddAdditionalDependants(pClient, pResource, pReference) uvmswAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define uvmswControl_Prologue(pResource, pCallContext, pParams) uvmswControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define uvmswGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define uvmswGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) uvmswGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define uvmswGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define uvmswGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) uvmswGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define uvmswInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define uvmswInternalControlForward(pGpuResource, command, pParams, size) uvmswInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define uvmswUnmapFrom(pResource, pParams) uvmswUnmapFrom_DISPATCH(pResource, pParams) -#define uvmswControl_Epilogue(pResource, pCallContext, pParams) uvmswControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define uvmswGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define uvmswGetInternalObjectHandle(pGpuResource) uvmswGetInternalObjectHandle_DISPATCH(pGpuResource) -#define uvmswControl(pGpuResource, pCallContext, pParams) uvmswControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define uvmswUnmap(pGpuResource, pCallContext, pCpuMapping) uvmswUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define uvmswAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define uvmswAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) uvmswAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define uvmswGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define uvmswGetMemInterMapParams(pRmResource, pParams) uvmswGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define uvmswGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define uvmswGetMemoryMappingDescriptor(pRmResource, ppMemDesc) uvmswGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define uvmswIsSwMethodStalling(pChannelDescendant, hHandle) uvmswIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define uvmswControlFilter(pResource, pCallContext, pParams) uvmswControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define uvmswUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) uvmswUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define uvmswControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define uvmswControlSerialization_Prologue(pResource, pCallContext, pParams) uvmswControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define uvmswControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define uvmswControlSerialization_Epilogue(pResource, pCallContext, pParams) uvmswControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define uvmswControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define uvmswControl_Prologue(pResource, pCallContext, pParams) uvmswControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define uvmswControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define uvmswControl_Epilogue(pResource, pCallContext, pParams) uvmswControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define uvmswCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define uvmswCanCopy(pResource) uvmswCanCopy_DISPATCH(pResource) -#define uvmswIsPartialUnmapSupported(pResource) uvmswIsPartialUnmapSupported_DISPATCH(pResource) -#define uvmswPreDestruct(pResource) uvmswPreDestruct_DISPATCH(pResource) +#define uvmswIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define uvmswIsDuplicate(pResource, hMemory, pDuplicate) uvmswIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define uvmswControlSerialization_Epilogue(pResource, pCallContext, pParams) uvmswControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define uvmswPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define uvmswPreDestruct(pResource) uvmswPreDestruct_DISPATCH(pResource) +#define uvmswControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define uvmswControlFilter(pResource, pCallContext, pParams) uvmswControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define uvmswIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define uvmswIsPartialUnmapSupported(pResource) uvmswIsPartialUnmapSupported_DISPATCH(pResource) +#define uvmswMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define uvmswMapTo(pResource, pParams) uvmswMapTo_DISPATCH(pResource, pParams) +#define uvmswUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define uvmswUnmapFrom(pResource, pParams) uvmswUnmapFrom_DISPATCH(pResource, pParams) +#define uvmswGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define uvmswGetRefCount(pResource) uvmswGetRefCount_DISPATCH(pResource) +#define uvmswAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define uvmswAddAdditionalDependants(pClient, pResource, pReference) uvmswAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define uvmswGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define uvmswGetNotificationListPtr(pNotifier) uvmswGetNotificationListPtr_DISPATCH(pNotifier) +#define uvmswGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ #define uvmswGetNotificationShare(pNotifier) uvmswGetNotificationShare_DISPATCH(pNotifier) -#define uvmswMap(pGpuResource, pCallContext, pParams, pCpuMapping) uvmswMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define uvmswSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define uvmswSetNotificationShare(pNotifier, pNotifShare) uvmswSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define uvmswUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define uvmswUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) uvmswUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define uvmswGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ #define uvmswGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) uvmswGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -static inline NV_STATUS uvmswGetSwMethods_56cd7a(struct UvmSwObject *pUvmSw, const METHOD **ppMethods, NvU32 *pNumMethods) { - return NV_OK; -} +// Dispatch functions static inline NV_STATUS uvmswGetSwMethods_DISPATCH(struct UvmSwObject *pUvmSw, const METHOD **ppMethods, NvU32 *pNumMethods) { return pUvmSw->__uvmswGetSwMethods__(pUvmSw, ppMethods, pNumMethods); } -static inline NV_STATUS uvmswCheckMemInterUnmap_DISPATCH(struct UvmSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return pChannelDescendant->__uvmswCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); -} - -static inline NvBool uvmswShareCallback_DISPATCH(struct UvmSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__uvmswShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NvBool uvmswAccessCallback_DISPATCH(struct UvmSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__uvmswAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} - -static inline NV_STATUS uvmswMapTo_DISPATCH(struct UvmSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__uvmswMapTo__(pResource, pParams); +static inline NvBool uvmswIsSwMethodStalling_DISPATCH(struct UvmSwObject *pChannelDescendant, NvU32 hHandle) { + return pChannelDescendant->__uvmswIsSwMethodStalling__(pChannelDescendant, hHandle); } -static inline NV_STATUS uvmswGetMapAddrSpace_DISPATCH(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__uvmswGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +static inline NV_STATUS uvmswCheckMemInterUnmap_DISPATCH(struct UvmSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { + return pChannelDescendant->__uvmswCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } -static inline void uvmswSetNotificationShare_DISPATCH(struct UvmSwObject *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__uvmswSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS uvmswControl_DISPATCH(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__uvmswControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 uvmswGetRefCount_DISPATCH(struct UvmSwObject *pResource) { - return pResource->__uvmswGetRefCount__(pResource); +static inline NV_STATUS uvmswMap_DISPATCH(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__uvmswMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void uvmswAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct UvmSwObject *pResource, RsResourceRef *pReference) { - pResource->__uvmswAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS uvmswUnmap_DISPATCH(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__uvmswUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS uvmswControl_Prologue_DISPATCH(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__uvmswControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool uvmswShareCallback_DISPATCH(struct UvmSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__uvmswShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS uvmswGetRegBaseOffsetAndSize_DISPATCH(struct UvmSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__uvmswGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS uvmswInternalControlForward_DISPATCH(struct UvmSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__uvmswInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS uvmswUnmapFrom_DISPATCH(struct UvmSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__uvmswUnmapFrom__(pResource, pParams); +static inline NV_STATUS uvmswGetMapAddrSpace_DISPATCH(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__uvmswGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void uvmswControl_Epilogue_DISPATCH(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__uvmswControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS uvmswInternalControlForward_DISPATCH(struct UvmSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__uvmswInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle uvmswGetInternalObjectHandle_DISPATCH(struct UvmSwObject *pGpuResource) { return pGpuResource->__uvmswGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS uvmswControl_DISPATCH(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__uvmswControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS uvmswUnmap_DISPATCH(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__uvmswUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool uvmswAccessCallback_DISPATCH(struct UvmSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__uvmswAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS uvmswGetMemInterMapParams_DISPATCH(struct UvmSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { @@ -242,58 +273,82 @@ static inline NV_STATUS uvmswGetMemoryMappingDescriptor_DISPATCH(struct UvmSwObj return pRmResource->__uvmswGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NvBool uvmswIsSwMethodStalling_DISPATCH(struct UvmSwObject *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__uvmswIsSwMethodStalling__(pChannelDescendant, hHandle); +static inline NV_STATUS uvmswControlSerialization_Prologue_DISPATCH(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__uvmswControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS uvmswControlFilter_DISPATCH(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__uvmswControlFilter__(pResource, pCallContext, pParams); +static inline void uvmswControlSerialization_Epilogue_DISPATCH(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__uvmswControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS uvmswUnregisterEvent_DISPATCH(struct UvmSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__uvmswUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline NV_STATUS uvmswControl_Prologue_DISPATCH(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__uvmswControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS uvmswControlSerialization_Prologue_DISPATCH(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__uvmswControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline void uvmswControl_Epilogue_DISPATCH(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__uvmswControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool uvmswCanCopy_DISPATCH(struct UvmSwObject *pResource) { return pResource->__uvmswCanCopy__(pResource); } -static inline NvBool uvmswIsPartialUnmapSupported_DISPATCH(struct UvmSwObject *pResource) { - return pResource->__uvmswIsPartialUnmapSupported__(pResource); +static inline NV_STATUS uvmswIsDuplicate_DISPATCH(struct UvmSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__uvmswIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void uvmswPreDestruct_DISPATCH(struct UvmSwObject *pResource) { pResource->__uvmswPreDestruct__(pResource); } -static inline NV_STATUS uvmswIsDuplicate_DISPATCH(struct UvmSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__uvmswIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS uvmswControlFilter_DISPATCH(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__uvmswControlFilter__(pResource, pCallContext, pParams); } -static inline void uvmswControlSerialization_Epilogue_DISPATCH(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__uvmswControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool uvmswIsPartialUnmapSupported_DISPATCH(struct UvmSwObject *pResource) { + return pResource->__uvmswIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS uvmswMapTo_DISPATCH(struct UvmSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__uvmswMapTo__(pResource, pParams); +} + +static inline NV_STATUS uvmswUnmapFrom_DISPATCH(struct UvmSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__uvmswUnmapFrom__(pResource, pParams); } -static inline PEVENTNOTIFICATION *uvmswGetNotificationListPtr_DISPATCH(struct UvmSwObject *pNotifier) { +static inline NvU32 uvmswGetRefCount_DISPATCH(struct UvmSwObject *pResource) { + return pResource->__uvmswGetRefCount__(pResource); +} + +static inline void uvmswAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct UvmSwObject *pResource, RsResourceRef *pReference) { + pResource->__uvmswAddAdditionalDependants__(pClient, pResource, pReference); +} + +static inline PEVENTNOTIFICATION * uvmswGetNotificationListPtr_DISPATCH(struct UvmSwObject *pNotifier) { return pNotifier->__uvmswGetNotificationListPtr__(pNotifier); } -static inline struct NotifShare *uvmswGetNotificationShare_DISPATCH(struct UvmSwObject *pNotifier) { +static inline struct NotifShare * uvmswGetNotificationShare_DISPATCH(struct UvmSwObject *pNotifier) { return pNotifier->__uvmswGetNotificationShare__(pNotifier); } -static inline NV_STATUS uvmswMap_DISPATCH(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__uvmswMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void uvmswSetNotificationShare_DISPATCH(struct UvmSwObject *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__uvmswSetNotificationShare__(pNotifier, pNotifShare); +} + +static inline NV_STATUS uvmswUnregisterEvent_DISPATCH(struct UvmSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__uvmswUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS uvmswGetOrAllocNotifShare_DISPATCH(struct UvmSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return pNotifier->__uvmswGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } +static inline NV_STATUS uvmswGetSwMethods_56cd7a(struct UvmSwObject *pUvmSw, const METHOD **ppMethods, NvU32 *pNumMethods) { + return NV_OK; +} + NV_STATUS uvmswConstruct_IMPL(struct UvmSwObject *arg_pUvmSw, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_uvmswConstruct(arg_pUvmSw, arg_pCallContext, arg_pParams) uvmswConstruct_IMPL(arg_pUvmSw, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_vaspace_api_nvoc.c b/src/nvidia/generated/g_vaspace_api_nvoc.c index cf80206eec..3f2c2e6613 100644 --- a/src/nvidia/generated/g_vaspace_api_nvoc.c +++ b/src/nvidia/generated/g_vaspace_api_nvoc.c @@ -93,106 +93,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_VaSpaceApi = /*pExportInfo=*/ &__nvoc_export_info_VaSpaceApi }; -static NvBool __nvoc_thunk_VaSpaceApi_resCanCopy(struct RsResource *pResource) { - return vaspaceapiCanCopy((struct VaSpaceApi *)(((unsigned char *)pResource) - __nvoc_rtti_VaSpaceApi_RsResource.offset)); -} - -static NvBool __nvoc_thunk_GpuResource_vaspaceapiShareCallback(struct VaSpaceApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_vaspaceapiCheckMemInterUnmap(struct VaSpaceApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RsResource_vaspaceapiMapTo(struct VaSpaceApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_vaspaceapiGetMapAddrSpace(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} - -static NvU32 __nvoc_thunk_RsResource_vaspaceapiGetRefCount(struct VaSpaceApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_vaspaceapiAddAdditionalDependants(struct RsClient *pClient, struct VaSpaceApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_vaspaceapiControl_Prologue(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_vaspaceapiGetRegBaseOffsetAndSize(struct VaSpaceApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), pGpu, pOffset, pSize); -} - -static NV_STATUS __nvoc_thunk_GpuResource_vaspaceapiInternalControlForward(struct VaSpaceApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), command, pParams, size); -} - -static NV_STATUS __nvoc_thunk_RsResource_vaspaceapiUnmapFrom(struct VaSpaceApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_vaspaceapiControl_Epilogue(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), pCallContext, pParams); -} - -static NvHandle __nvoc_thunk_GpuResource_vaspaceapiGetInternalObjectHandle(struct VaSpaceApi *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_vaspaceapiControl(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_vaspaceapiUnmap(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_vaspaceapiGetMemInterMapParams(struct VaSpaceApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_vaspaceapiGetMemoryMappingDescriptor(struct VaSpaceApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_vaspaceapiControlFilter(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_vaspaceapiControlSerialization_Prologue(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_vaspaceapiIsPartialUnmapSupported(struct VaSpaceApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_vaspaceapiPreDestruct(struct VaSpaceApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_vaspaceapiIsDuplicate(struct VaSpaceApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_vaspaceapiControlSerialization_Epilogue(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_vaspaceapiMap(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_vaspaceapiAccessCallback(struct VaSpaceApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -215,12 +115,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VaSpaceA #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80000u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vaspaceapiCtrlCmdVaspaceGetPageLevelInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80000u) - /*flags=*/ 0x80000u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) + /*flags=*/ 0x8000u, /*accessRight=*/0x0u, /*methodId=*/ 0x90f10102u, /*paramSize=*/ sizeof(NV90F1_CTRL_VASPACE_GET_PAGE_LEVEL_INFO_PARAMS), @@ -230,12 +130,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VaSpaceA #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80000u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vaspaceapiCtrlCmdVaspaceReserveEntries_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80000u) - /*flags=*/ 0x80000u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) + /*flags=*/ 0x8000u, /*accessRight=*/0x0u, /*methodId=*/ 0x90f10103u, /*paramSize=*/ sizeof(NV90F1_CTRL_VASPACE_RESERVE_ENTRIES_PARAMS), @@ -245,12 +145,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VaSpaceA #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80000u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vaspaceapiCtrlCmdVaspaceReleaseEntries_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80000u) - /*flags=*/ 0x80000u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) + /*flags=*/ 0x8000u, /*accessRight=*/0x0u, /*methodId=*/ 0x90f10104u, /*paramSize=*/ sizeof(NV90F1_CTRL_VASPACE_RELEASE_ENTRIES_PARAMS), @@ -260,12 +160,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VaSpaceA #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x140004u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vaspaceapiCtrlCmdVaspaceCopyServerReservedPdes_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x140004u) - /*flags=*/ 0x140004u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) + /*flags=*/ 0x14004u, /*accessRight=*/0x0u, /*methodId=*/ 0x90f10106u, /*paramSize=*/ sizeof(NV90F1_CTRL_VASPACE_COPY_SERVER_RESERVED_PDES_PARAMS), @@ -292,6 +192,137 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VaSpaceA }; +// 1 down-thunk(s) defined to bridge methods in VaSpaceApi from superclasses + +// vaspaceapiCanCopy: virtual override (res) base (gpures) +static NvBool __nvoc_down_thunk_VaSpaceApi_resCanCopy(struct RsResource *pResource) { + return vaspaceapiCanCopy((struct VaSpaceApi *)(((unsigned char *) pResource) - __nvoc_rtti_VaSpaceApi_RsResource.offset)); +} + + +// 24 up-thunk(s) defined to bridge methods in VaSpaceApi to superclasses + +// vaspaceapiControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiControl(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), pCallContext, pParams); +} + +// vaspaceapiMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiMap(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// vaspaceapiUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiUnmap(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), pCallContext, pCpuMapping); +} + +// vaspaceapiShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_vaspaceapiShareCallback(struct VaSpaceApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// vaspaceapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiGetRegBaseOffsetAndSize(struct VaSpaceApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), pGpu, pOffset, pSize); +} + +// vaspaceapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiGetMapAddrSpace(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + +// vaspaceapiInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiInternalControlForward(struct VaSpaceApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), command, pParams, size); +} + +// vaspaceapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_vaspaceapiGetInternalObjectHandle(struct VaSpaceApi *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset)); +} + +// vaspaceapiAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_vaspaceapiAccessCallback(struct VaSpaceApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// vaspaceapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vaspaceapiGetMemInterMapParams(struct VaSpaceApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), pParams); +} + +// vaspaceapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vaspaceapiCheckMemInterUnmap(struct VaSpaceApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), bSubdeviceHandleProvided); +} + +// vaspaceapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vaspaceapiGetMemoryMappingDescriptor(struct VaSpaceApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), ppMemDesc); +} + +// vaspaceapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vaspaceapiControlSerialization_Prologue(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), pCallContext, pParams); +} + +// vaspaceapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_vaspaceapiControlSerialization_Epilogue(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), pCallContext, pParams); +} + +// vaspaceapiControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vaspaceapiControl_Prologue(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), pCallContext, pParams); +} + +// vaspaceapiControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_vaspaceapiControl_Epilogue(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), pCallContext, pParams); +} + +// vaspaceapiIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_vaspaceapiIsDuplicate(struct VaSpaceApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset), hMemory, pDuplicate); +} + +// vaspaceapiPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_vaspaceapiPreDestruct(struct VaSpaceApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset)); +} + +// vaspaceapiControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_vaspaceapiControlFilter(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset), pCallContext, pParams); +} + +// vaspaceapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_vaspaceapiIsPartialUnmapSupported(struct VaSpaceApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset)); +} + +// vaspaceapiMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_vaspaceapiMapTo(struct VaSpaceApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset), pParams); +} + +// vaspaceapiUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_vaspaceapiUnmapFrom(struct VaSpaceApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset), pParams); +} + +// vaspaceapiGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_vaspaceapiGetRefCount(struct VaSpaceApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset)); +} + +// vaspaceapiAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_vaspaceapiAddAdditionalDependants(struct RsClient *pClient, struct VaSpaceApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset), pReference); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_VaSpaceApi = { /*numEntries=*/ 6, @@ -328,87 +359,122 @@ NV_STATUS __nvoc_ctor_VaSpaceApi(VaSpaceApi *pThis, struct CALL_CONTEXT * arg_pC return status; } +// Vtable initialization static void __nvoc_init_funcTable_VaSpaceApi_1(VaSpaceApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // vaspaceapiCanCopy -- virtual override (res) base (gpures) pThis->__vaspaceapiCanCopy__ = &vaspaceapiCanCopy_IMPL; + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_VaSpaceApi_resCanCopy; + // vaspaceapiCtrlCmdVaspaceGetGmmuFormat -- exported (id=0x90f10101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__vaspaceapiCtrlCmdVaspaceGetGmmuFormat__ = &vaspaceapiCtrlCmdVaspaceGetGmmuFormat_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80000u) + // vaspaceapiCtrlCmdVaspaceGetPageLevelInfo -- exported (id=0x90f10102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) pThis->__vaspaceapiCtrlCmdVaspaceGetPageLevelInfo__ = &vaspaceapiCtrlCmdVaspaceGetPageLevelInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80000u) + // vaspaceapiCtrlCmdVaspaceReserveEntries -- exported (id=0x90f10103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) pThis->__vaspaceapiCtrlCmdVaspaceReserveEntries__ = &vaspaceapiCtrlCmdVaspaceReserveEntries_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80000u) + // vaspaceapiCtrlCmdVaspaceReleaseEntries -- exported (id=0x90f10104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) pThis->__vaspaceapiCtrlCmdVaspaceReleaseEntries__ = &vaspaceapiCtrlCmdVaspaceReleaseEntries_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x140004u) + // vaspaceapiCtrlCmdVaspaceCopyServerReservedPdes -- exported (id=0x90f10106) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) pThis->__vaspaceapiCtrlCmdVaspaceCopyServerReservedPdes__ = &vaspaceapiCtrlCmdVaspaceCopyServerReservedPdes_IMPL; #endif + // vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize -- exported (id=0x90f10107) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize__ = &vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize_IMPL; #endif - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_VaSpaceApi_resCanCopy; + // vaspaceapiControl -- virtual inherited (gpures) base (gpures) + pThis->__vaspaceapiControl__ = &__nvoc_up_thunk_GpuResource_vaspaceapiControl; - pThis->__vaspaceapiShareCallback__ = &__nvoc_thunk_GpuResource_vaspaceapiShareCallback; + // vaspaceapiMap -- virtual inherited (gpures) base (gpures) + pThis->__vaspaceapiMap__ = &__nvoc_up_thunk_GpuResource_vaspaceapiMap; - pThis->__vaspaceapiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_vaspaceapiCheckMemInterUnmap; + // vaspaceapiUnmap -- virtual inherited (gpures) base (gpures) + pThis->__vaspaceapiUnmap__ = &__nvoc_up_thunk_GpuResource_vaspaceapiUnmap; - pThis->__vaspaceapiMapTo__ = &__nvoc_thunk_RsResource_vaspaceapiMapTo; + // vaspaceapiShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__vaspaceapiShareCallback__ = &__nvoc_up_thunk_GpuResource_vaspaceapiShareCallback; - pThis->__vaspaceapiGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_vaspaceapiGetMapAddrSpace; + // vaspaceapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__vaspaceapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_vaspaceapiGetRegBaseOffsetAndSize; - pThis->__vaspaceapiGetRefCount__ = &__nvoc_thunk_RsResource_vaspaceapiGetRefCount; + // vaspaceapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__vaspaceapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_vaspaceapiGetMapAddrSpace; - pThis->__vaspaceapiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_vaspaceapiAddAdditionalDependants; + // vaspaceapiInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__vaspaceapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_vaspaceapiInternalControlForward; - pThis->__vaspaceapiControl_Prologue__ = &__nvoc_thunk_RmResource_vaspaceapiControl_Prologue; + // vaspaceapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__vaspaceapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_vaspaceapiGetInternalObjectHandle; - pThis->__vaspaceapiGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_vaspaceapiGetRegBaseOffsetAndSize; + // vaspaceapiAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__vaspaceapiAccessCallback__ = &__nvoc_up_thunk_RmResource_vaspaceapiAccessCallback; - pThis->__vaspaceapiInternalControlForward__ = &__nvoc_thunk_GpuResource_vaspaceapiInternalControlForward; + // vaspaceapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__vaspaceapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_vaspaceapiGetMemInterMapParams; - pThis->__vaspaceapiUnmapFrom__ = &__nvoc_thunk_RsResource_vaspaceapiUnmapFrom; + // vaspaceapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__vaspaceapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_vaspaceapiCheckMemInterUnmap; - pThis->__vaspaceapiControl_Epilogue__ = &__nvoc_thunk_RmResource_vaspaceapiControl_Epilogue; + // vaspaceapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__vaspaceapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_vaspaceapiGetMemoryMappingDescriptor; - pThis->__vaspaceapiGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_vaspaceapiGetInternalObjectHandle; + // vaspaceapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__vaspaceapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vaspaceapiControlSerialization_Prologue; - pThis->__vaspaceapiControl__ = &__nvoc_thunk_GpuResource_vaspaceapiControl; + // vaspaceapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__vaspaceapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vaspaceapiControlSerialization_Epilogue; - pThis->__vaspaceapiUnmap__ = &__nvoc_thunk_GpuResource_vaspaceapiUnmap; + // vaspaceapiControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__vaspaceapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_vaspaceapiControl_Prologue; - pThis->__vaspaceapiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_vaspaceapiGetMemInterMapParams; + // vaspaceapiControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__vaspaceapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vaspaceapiControl_Epilogue; - pThis->__vaspaceapiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_vaspaceapiGetMemoryMappingDescriptor; + // vaspaceapiIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__vaspaceapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_vaspaceapiIsDuplicate; - pThis->__vaspaceapiControlFilter__ = &__nvoc_thunk_RsResource_vaspaceapiControlFilter; + // vaspaceapiPreDestruct -- virtual inherited (res) base (gpures) + pThis->__vaspaceapiPreDestruct__ = &__nvoc_up_thunk_RsResource_vaspaceapiPreDestruct; - pThis->__vaspaceapiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_vaspaceapiControlSerialization_Prologue; + // vaspaceapiControlFilter -- virtual inherited (res) base (gpures) + pThis->__vaspaceapiControlFilter__ = &__nvoc_up_thunk_RsResource_vaspaceapiControlFilter; - pThis->__vaspaceapiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_vaspaceapiIsPartialUnmapSupported; + // vaspaceapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__vaspaceapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_vaspaceapiIsPartialUnmapSupported; - pThis->__vaspaceapiPreDestruct__ = &__nvoc_thunk_RsResource_vaspaceapiPreDestruct; + // vaspaceapiMapTo -- virtual inherited (res) base (gpures) + pThis->__vaspaceapiMapTo__ = &__nvoc_up_thunk_RsResource_vaspaceapiMapTo; - pThis->__vaspaceapiIsDuplicate__ = &__nvoc_thunk_RsResource_vaspaceapiIsDuplicate; + // vaspaceapiUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__vaspaceapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_vaspaceapiUnmapFrom; - pThis->__vaspaceapiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_vaspaceapiControlSerialization_Epilogue; + // vaspaceapiGetRefCount -- virtual inherited (res) base (gpures) + pThis->__vaspaceapiGetRefCount__ = &__nvoc_up_thunk_RsResource_vaspaceapiGetRefCount; - pThis->__vaspaceapiMap__ = &__nvoc_thunk_GpuResource_vaspaceapiMap; + // vaspaceapiAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__vaspaceapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vaspaceapiAddAdditionalDependants; +} // End __nvoc_init_funcTable_VaSpaceApi_1 with approximately 32 basic block(s). - pThis->__vaspaceapiAccessCallback__ = &__nvoc_thunk_RmResource_vaspaceapiAccessCallback; -} +// Initialize vtable(s) for 31 virtual method(s). void __nvoc_init_funcTable_VaSpaceApi(VaSpaceApi *pThis) { + + // Initialize vtable(s) with 31 per-object function pointer(s). __nvoc_init_funcTable_VaSpaceApi_1(pThis); } diff --git a/src/nvidia/generated/g_vaspace_api_nvoc.h b/src/nvidia/generated/g_vaspace_api_nvoc.h index 9d5357c32a..5f06d680b3 100644 --- a/src/nvidia/generated/g_vaspace_api_nvoc.h +++ b/src/nvidia/generated/g_vaspace_api_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_VASPACE_API_NVOC_H_ #define _G_VASPACE_API_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_vaspace_api_nvoc.h" #ifndef VASPACE_API_H @@ -63,46 +71,57 @@ typedef enum #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct VaSpaceApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct VaSpaceApi *__nvoc_pbase_VaSpaceApi; - NvBool (*__vaspaceapiCanCopy__)(struct VaSpaceApi *); - NV_STATUS (*__vaspaceapiCtrlCmdVaspaceGetGmmuFormat__)(struct VaSpaceApi *, NV90F1_CTRL_VASPACE_GET_GMMU_FORMAT_PARAMS *); - NV_STATUS (*__vaspaceapiCtrlCmdVaspaceGetPageLevelInfo__)(struct VaSpaceApi *, NV90F1_CTRL_VASPACE_GET_PAGE_LEVEL_INFO_PARAMS *); - NV_STATUS (*__vaspaceapiCtrlCmdVaspaceReserveEntries__)(struct VaSpaceApi *, NV90F1_CTRL_VASPACE_RESERVE_ENTRIES_PARAMS *); - NV_STATUS (*__vaspaceapiCtrlCmdVaspaceReleaseEntries__)(struct VaSpaceApi *, NV90F1_CTRL_VASPACE_RELEASE_ENTRIES_PARAMS *); - NV_STATUS (*__vaspaceapiCtrlCmdVaspaceCopyServerReservedPdes__)(struct VaSpaceApi *, NV90F1_CTRL_VASPACE_COPY_SERVER_RESERVED_PDES_PARAMS *); - NV_STATUS (*__vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize__)(struct VaSpaceApi *, NV90F1_CTRL_VASPACE_GET_HOST_RM_MANAGED_SIZE_PARAMS *); - NvBool (*__vaspaceapiShareCallback__)(struct VaSpaceApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__vaspaceapiCheckMemInterUnmap__)(struct VaSpaceApi *, NvBool); - NV_STATUS (*__vaspaceapiMapTo__)(struct VaSpaceApi *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__vaspaceapiGetMapAddrSpace__)(struct VaSpaceApi *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__vaspaceapiGetRefCount__)(struct VaSpaceApi *); - void (*__vaspaceapiAddAdditionalDependants__)(struct RsClient *, struct VaSpaceApi *, RsResourceRef *); - NV_STATUS (*__vaspaceapiControl_Prologue__)(struct VaSpaceApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vaspaceapiGetRegBaseOffsetAndSize__)(struct VaSpaceApi *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__vaspaceapiInternalControlForward__)(struct VaSpaceApi *, NvU32, void *, NvU32); - NV_STATUS (*__vaspaceapiUnmapFrom__)(struct VaSpaceApi *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__vaspaceapiControl_Epilogue__)(struct VaSpaceApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__vaspaceapiGetInternalObjectHandle__)(struct VaSpaceApi *); - NV_STATUS (*__vaspaceapiControl__)(struct VaSpaceApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vaspaceapiUnmap__)(struct VaSpaceApi *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__vaspaceapiGetMemInterMapParams__)(struct VaSpaceApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__vaspaceapiGetMemoryMappingDescriptor__)(struct VaSpaceApi *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__vaspaceapiControlFilter__)(struct VaSpaceApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vaspaceapiControlSerialization_Prologue__)(struct VaSpaceApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__vaspaceapiIsPartialUnmapSupported__)(struct VaSpaceApi *); - void (*__vaspaceapiPreDestruct__)(struct VaSpaceApi *); - NV_STATUS (*__vaspaceapiIsDuplicate__)(struct VaSpaceApi *, NvHandle, NvBool *); - void (*__vaspaceapiControlSerialization_Epilogue__)(struct VaSpaceApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vaspaceapiMap__)(struct VaSpaceApi *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__vaspaceapiAccessCallback__)(struct VaSpaceApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct VaSpaceApi *__nvoc_pbase_VaSpaceApi; // vaspaceapi + + // Vtable with 31 per-object function pointers + NvBool (*__vaspaceapiCanCopy__)(struct VaSpaceApi * /*this*/); // virtual override (res) base (gpures) + NV_STATUS (*__vaspaceapiCtrlCmdVaspaceGetGmmuFormat__)(struct VaSpaceApi * /*this*/, NV90F1_CTRL_VASPACE_GET_GMMU_FORMAT_PARAMS *); // exported (id=0x90f10101) + NV_STATUS (*__vaspaceapiCtrlCmdVaspaceGetPageLevelInfo__)(struct VaSpaceApi * /*this*/, NV90F1_CTRL_VASPACE_GET_PAGE_LEVEL_INFO_PARAMS *); // exported (id=0x90f10102) + NV_STATUS (*__vaspaceapiCtrlCmdVaspaceReserveEntries__)(struct VaSpaceApi * /*this*/, NV90F1_CTRL_VASPACE_RESERVE_ENTRIES_PARAMS *); // exported (id=0x90f10103) + NV_STATUS (*__vaspaceapiCtrlCmdVaspaceReleaseEntries__)(struct VaSpaceApi * /*this*/, NV90F1_CTRL_VASPACE_RELEASE_ENTRIES_PARAMS *); // exported (id=0x90f10104) + NV_STATUS (*__vaspaceapiCtrlCmdVaspaceCopyServerReservedPdes__)(struct VaSpaceApi * /*this*/, NV90F1_CTRL_VASPACE_COPY_SERVER_RESERVED_PDES_PARAMS *); // exported (id=0x90f10106) + NV_STATUS (*__vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize__)(struct VaSpaceApi * /*this*/, NV90F1_CTRL_VASPACE_GET_HOST_RM_MANAGED_SIZE_PARAMS *); // exported (id=0x90f10107) + NV_STATUS (*__vaspaceapiControl__)(struct VaSpaceApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vaspaceapiMap__)(struct VaSpaceApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vaspaceapiUnmap__)(struct VaSpaceApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__vaspaceapiShareCallback__)(struct VaSpaceApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vaspaceapiGetRegBaseOffsetAndSize__)(struct VaSpaceApi * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vaspaceapiGetMapAddrSpace__)(struct VaSpaceApi * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vaspaceapiInternalControlForward__)(struct VaSpaceApi * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__vaspaceapiGetInternalObjectHandle__)(struct VaSpaceApi * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__vaspaceapiAccessCallback__)(struct VaSpaceApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vaspaceapiGetMemInterMapParams__)(struct VaSpaceApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vaspaceapiCheckMemInterUnmap__)(struct VaSpaceApi * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vaspaceapiGetMemoryMappingDescriptor__)(struct VaSpaceApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vaspaceapiControlSerialization_Prologue__)(struct VaSpaceApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__vaspaceapiControlSerialization_Epilogue__)(struct VaSpaceApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vaspaceapiControl_Prologue__)(struct VaSpaceApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__vaspaceapiControl_Epilogue__)(struct VaSpaceApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vaspaceapiIsDuplicate__)(struct VaSpaceApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__vaspaceapiPreDestruct__)(struct VaSpaceApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__vaspaceapiControlFilter__)(struct VaSpaceApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__vaspaceapiIsPartialUnmapSupported__)(struct VaSpaceApi * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__vaspaceapiMapTo__)(struct VaSpaceApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__vaspaceapiUnmapFrom__)(struct VaSpaceApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__vaspaceapiGetRefCount__)(struct VaSpaceApi * /*this*/); // virtual inherited (res) base (gpures) + void (*__vaspaceapiAddAdditionalDependants__)(struct RsClient *, struct VaSpaceApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members struct OBJVASPACE *pVASpace; NvBool bDuped; }; @@ -116,6 +135,7 @@ typedef struct VaSpaceApi VaSpaceApi; #define __nvoc_class_id_VaSpaceApi 0xcd048b #endif /* __nvoc_class_id_VaSpaceApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_VaSpaceApi; #define __staticCast_VaSpaceApi(pThis) \ @@ -128,181 +148,215 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_VaSpaceApi; ((VaSpaceApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(VaSpaceApi))) #endif //__nvoc_vaspace_api_h_disabled - NV_STATUS __nvoc_objCreateDynamic_VaSpaceApi(VaSpaceApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_VaSpaceApi(VaSpaceApi**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_VaSpaceApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_VaSpaceApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define vaspaceapiCanCopy_FNPTR(pResource) pResource->__vaspaceapiCanCopy__ #define vaspaceapiCanCopy(pResource) vaspaceapiCanCopy_DISPATCH(pResource) +#define vaspaceapiCtrlCmdVaspaceGetGmmuFormat_FNPTR(pVaspaceApi) pVaspaceApi->__vaspaceapiCtrlCmdVaspaceGetGmmuFormat__ #define vaspaceapiCtrlCmdVaspaceGetGmmuFormat(pVaspaceApi, pGmmuFormatParams) vaspaceapiCtrlCmdVaspaceGetGmmuFormat_DISPATCH(pVaspaceApi, pGmmuFormatParams) +#define vaspaceapiCtrlCmdVaspaceGetPageLevelInfo_FNPTR(pVaspaceApi) pVaspaceApi->__vaspaceapiCtrlCmdVaspaceGetPageLevelInfo__ #define vaspaceapiCtrlCmdVaspaceGetPageLevelInfo(pVaspaceApi, pPageLevelInfoParams) vaspaceapiCtrlCmdVaspaceGetPageLevelInfo_DISPATCH(pVaspaceApi, pPageLevelInfoParams) +#define vaspaceapiCtrlCmdVaspaceReserveEntries_FNPTR(pVaspaceApi) pVaspaceApi->__vaspaceapiCtrlCmdVaspaceReserveEntries__ #define vaspaceapiCtrlCmdVaspaceReserveEntries(pVaspaceApi, pReserveEntriesParams) vaspaceapiCtrlCmdVaspaceReserveEntries_DISPATCH(pVaspaceApi, pReserveEntriesParams) +#define vaspaceapiCtrlCmdVaspaceReleaseEntries_FNPTR(pVaspaceApi) pVaspaceApi->__vaspaceapiCtrlCmdVaspaceReleaseEntries__ #define vaspaceapiCtrlCmdVaspaceReleaseEntries(pVaspaceApi, pReleaseEntriesParams) vaspaceapiCtrlCmdVaspaceReleaseEntries_DISPATCH(pVaspaceApi, pReleaseEntriesParams) +#define vaspaceapiCtrlCmdVaspaceCopyServerReservedPdes_FNPTR(pVaspaceApi) pVaspaceApi->__vaspaceapiCtrlCmdVaspaceCopyServerReservedPdes__ #define vaspaceapiCtrlCmdVaspaceCopyServerReservedPdes(pVaspaceApi, pCopyServerReservedPdesParams) vaspaceapiCtrlCmdVaspaceCopyServerReservedPdes_DISPATCH(pVaspaceApi, pCopyServerReservedPdesParams) +#define vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize_FNPTR(pVaspaceApi) pVaspaceApi->__vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize__ #define vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize(pVaspaceApi, pVaspaceGetHostRmManagedSizeParams) vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize_DISPATCH(pVaspaceApi, pVaspaceGetHostRmManagedSizeParams) +#define vaspaceapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define vaspaceapiControl(pGpuResource, pCallContext, pParams) vaspaceapiControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define vaspaceapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define vaspaceapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) vaspaceapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define vaspaceapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define vaspaceapiUnmap(pGpuResource, pCallContext, pCpuMapping) vaspaceapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define vaspaceapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define vaspaceapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) vaspaceapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define vaspaceapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) vaspaceapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define vaspaceapiMapTo(pResource, pParams) vaspaceapiMapTo_DISPATCH(pResource, pParams) -#define vaspaceapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) vaspaceapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define vaspaceapiGetRefCount(pResource) vaspaceapiGetRefCount_DISPATCH(pResource) -#define vaspaceapiAddAdditionalDependants(pClient, pResource, pReference) vaspaceapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define vaspaceapiControl_Prologue(pResource, pCallContext, pParams) vaspaceapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define vaspaceapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define vaspaceapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) vaspaceapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define vaspaceapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define vaspaceapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) vaspaceapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define vaspaceapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define vaspaceapiInternalControlForward(pGpuResource, command, pParams, size) vaspaceapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define vaspaceapiUnmapFrom(pResource, pParams) vaspaceapiUnmapFrom_DISPATCH(pResource, pParams) -#define vaspaceapiControl_Epilogue(pResource, pCallContext, pParams) vaspaceapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vaspaceapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define vaspaceapiGetInternalObjectHandle(pGpuResource) vaspaceapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define vaspaceapiControl(pGpuResource, pCallContext, pParams) vaspaceapiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define vaspaceapiUnmap(pGpuResource, pCallContext, pCpuMapping) vaspaceapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define vaspaceapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define vaspaceapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) vaspaceapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define vaspaceapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define vaspaceapiGetMemInterMapParams(pRmResource, pParams) vaspaceapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define vaspaceapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define vaspaceapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) vaspaceapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define vaspaceapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define vaspaceapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) vaspaceapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define vaspaceapiControlFilter(pResource, pCallContext, pParams) vaspaceapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define vaspaceapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define vaspaceapiControlSerialization_Prologue(pResource, pCallContext, pParams) vaspaceapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define vaspaceapiIsPartialUnmapSupported(pResource) vaspaceapiIsPartialUnmapSupported_DISPATCH(pResource) -#define vaspaceapiPreDestruct(pResource) vaspaceapiPreDestruct_DISPATCH(pResource) -#define vaspaceapiIsDuplicate(pResource, hMemory, pDuplicate) vaspaceapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define vaspaceapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ #define vaspaceapiControlSerialization_Epilogue(pResource, pCallContext, pParams) vaspaceapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define vaspaceapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) vaspaceapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define vaspaceapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) vaspaceapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NvBool vaspaceapiCanCopy_IMPL(struct VaSpaceApi *pResource); +#define vaspaceapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define vaspaceapiControl_Prologue(pResource, pCallContext, pParams) vaspaceapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define vaspaceapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define vaspaceapiControl_Epilogue(pResource, pCallContext, pParams) vaspaceapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vaspaceapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define vaspaceapiIsDuplicate(pResource, hMemory, pDuplicate) vaspaceapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define vaspaceapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define vaspaceapiPreDestruct(pResource) vaspaceapiPreDestruct_DISPATCH(pResource) +#define vaspaceapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define vaspaceapiControlFilter(pResource, pCallContext, pParams) vaspaceapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define vaspaceapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define vaspaceapiIsPartialUnmapSupported(pResource) vaspaceapiIsPartialUnmapSupported_DISPATCH(pResource) +#define vaspaceapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define vaspaceapiMapTo(pResource, pParams) vaspaceapiMapTo_DISPATCH(pResource, pParams) +#define vaspaceapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define vaspaceapiUnmapFrom(pResource, pParams) vaspaceapiUnmapFrom_DISPATCH(pResource, pParams) +#define vaspaceapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define vaspaceapiGetRefCount(pResource) vaspaceapiGetRefCount_DISPATCH(pResource) +#define vaspaceapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define vaspaceapiAddAdditionalDependants(pClient, pResource, pReference) vaspaceapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NvBool vaspaceapiCanCopy_DISPATCH(struct VaSpaceApi *pResource) { return pResource->__vaspaceapiCanCopy__(pResource); } -NV_STATUS vaspaceapiCtrlCmdVaspaceGetGmmuFormat_IMPL(struct VaSpaceApi *pVaspaceApi, NV90F1_CTRL_VASPACE_GET_GMMU_FORMAT_PARAMS *pGmmuFormatParams); - static inline NV_STATUS vaspaceapiCtrlCmdVaspaceGetGmmuFormat_DISPATCH(struct VaSpaceApi *pVaspaceApi, NV90F1_CTRL_VASPACE_GET_GMMU_FORMAT_PARAMS *pGmmuFormatParams) { return pVaspaceApi->__vaspaceapiCtrlCmdVaspaceGetGmmuFormat__(pVaspaceApi, pGmmuFormatParams); } -NV_STATUS vaspaceapiCtrlCmdVaspaceGetPageLevelInfo_IMPL(struct VaSpaceApi *pVaspaceApi, NV90F1_CTRL_VASPACE_GET_PAGE_LEVEL_INFO_PARAMS *pPageLevelInfoParams); - static inline NV_STATUS vaspaceapiCtrlCmdVaspaceGetPageLevelInfo_DISPATCH(struct VaSpaceApi *pVaspaceApi, NV90F1_CTRL_VASPACE_GET_PAGE_LEVEL_INFO_PARAMS *pPageLevelInfoParams) { return pVaspaceApi->__vaspaceapiCtrlCmdVaspaceGetPageLevelInfo__(pVaspaceApi, pPageLevelInfoParams); } -NV_STATUS vaspaceapiCtrlCmdVaspaceReserveEntries_IMPL(struct VaSpaceApi *pVaspaceApi, NV90F1_CTRL_VASPACE_RESERVE_ENTRIES_PARAMS *pReserveEntriesParams); - static inline NV_STATUS vaspaceapiCtrlCmdVaspaceReserveEntries_DISPATCH(struct VaSpaceApi *pVaspaceApi, NV90F1_CTRL_VASPACE_RESERVE_ENTRIES_PARAMS *pReserveEntriesParams) { return pVaspaceApi->__vaspaceapiCtrlCmdVaspaceReserveEntries__(pVaspaceApi, pReserveEntriesParams); } -NV_STATUS vaspaceapiCtrlCmdVaspaceReleaseEntries_IMPL(struct VaSpaceApi *pVaspaceApi, NV90F1_CTRL_VASPACE_RELEASE_ENTRIES_PARAMS *pReleaseEntriesParams); - static inline NV_STATUS vaspaceapiCtrlCmdVaspaceReleaseEntries_DISPATCH(struct VaSpaceApi *pVaspaceApi, NV90F1_CTRL_VASPACE_RELEASE_ENTRIES_PARAMS *pReleaseEntriesParams) { return pVaspaceApi->__vaspaceapiCtrlCmdVaspaceReleaseEntries__(pVaspaceApi, pReleaseEntriesParams); } -NV_STATUS vaspaceapiCtrlCmdVaspaceCopyServerReservedPdes_IMPL(struct VaSpaceApi *pVaspaceApi, NV90F1_CTRL_VASPACE_COPY_SERVER_RESERVED_PDES_PARAMS *pCopyServerReservedPdesParams); - static inline NV_STATUS vaspaceapiCtrlCmdVaspaceCopyServerReservedPdes_DISPATCH(struct VaSpaceApi *pVaspaceApi, NV90F1_CTRL_VASPACE_COPY_SERVER_RESERVED_PDES_PARAMS *pCopyServerReservedPdesParams) { return pVaspaceApi->__vaspaceapiCtrlCmdVaspaceCopyServerReservedPdes__(pVaspaceApi, pCopyServerReservedPdesParams); } -NV_STATUS vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize_IMPL(struct VaSpaceApi *pVaspaceApi, NV90F1_CTRL_VASPACE_GET_HOST_RM_MANAGED_SIZE_PARAMS *pVaspaceGetHostRmManagedSizeParams); - static inline NV_STATUS vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize_DISPATCH(struct VaSpaceApi *pVaspaceApi, NV90F1_CTRL_VASPACE_GET_HOST_RM_MANAGED_SIZE_PARAMS *pVaspaceGetHostRmManagedSizeParams) { return pVaspaceApi->__vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize__(pVaspaceApi, pVaspaceGetHostRmManagedSizeParams); } -static inline NvBool vaspaceapiShareCallback_DISPATCH(struct VaSpaceApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__vaspaceapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS vaspaceapiControl_DISPATCH(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__vaspaceapiControl__(pGpuResource, pCallContext, pParams); } -static inline NV_STATUS vaspaceapiCheckMemInterUnmap_DISPATCH(struct VaSpaceApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__vaspaceapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS vaspaceapiMap_DISPATCH(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__vaspaceapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS vaspaceapiMapTo_DISPATCH(struct VaSpaceApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__vaspaceapiMapTo__(pResource, pParams); +static inline NV_STATUS vaspaceapiUnmap_DISPATCH(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__vaspaceapiUnmap__(pGpuResource, pCallContext, pCpuMapping); +} + +static inline NvBool vaspaceapiShareCallback_DISPATCH(struct VaSpaceApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__vaspaceapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +} + +static inline NV_STATUS vaspaceapiGetRegBaseOffsetAndSize_DISPATCH(struct VaSpaceApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__vaspaceapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS vaspaceapiGetMapAddrSpace_DISPATCH(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__vaspaceapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NvU32 vaspaceapiGetRefCount_DISPATCH(struct VaSpaceApi *pResource) { - return pResource->__vaspaceapiGetRefCount__(pResource); +static inline NV_STATUS vaspaceapiInternalControlForward_DISPATCH(struct VaSpaceApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__vaspaceapiInternalControlForward__(pGpuResource, command, pParams, size); } -static inline void vaspaceapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VaSpaceApi *pResource, RsResourceRef *pReference) { - pResource->__vaspaceapiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvHandle vaspaceapiGetInternalObjectHandle_DISPATCH(struct VaSpaceApi *pGpuResource) { + return pGpuResource->__vaspaceapiGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS vaspaceapiControl_Prologue_DISPATCH(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vaspaceapiControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool vaspaceapiAccessCallback_DISPATCH(struct VaSpaceApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__vaspaceapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS vaspaceapiGetRegBaseOffsetAndSize_DISPATCH(struct VaSpaceApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__vaspaceapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS vaspaceapiGetMemInterMapParams_DISPATCH(struct VaSpaceApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__vaspaceapiGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS vaspaceapiInternalControlForward_DISPATCH(struct VaSpaceApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__vaspaceapiInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS vaspaceapiCheckMemInterUnmap_DISPATCH(struct VaSpaceApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__vaspaceapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS vaspaceapiUnmapFrom_DISPATCH(struct VaSpaceApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__vaspaceapiUnmapFrom__(pResource, pParams); +static inline NV_STATUS vaspaceapiGetMemoryMappingDescriptor_DISPATCH(struct VaSpaceApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__vaspaceapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline void vaspaceapiControl_Epilogue_DISPATCH(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vaspaceapiControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS vaspaceapiControlSerialization_Prologue_DISPATCH(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__vaspaceapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvHandle vaspaceapiGetInternalObjectHandle_DISPATCH(struct VaSpaceApi *pGpuResource) { - return pGpuResource->__vaspaceapiGetInternalObjectHandle__(pGpuResource); +static inline void vaspaceapiControlSerialization_Epilogue_DISPATCH(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__vaspaceapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS vaspaceapiControl_DISPATCH(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__vaspaceapiControl__(pGpuResource, pCallContext, pParams); +static inline NV_STATUS vaspaceapiControl_Prologue_DISPATCH(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__vaspaceapiControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS vaspaceapiUnmap_DISPATCH(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__vaspaceapiUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline void vaspaceapiControl_Epilogue_DISPATCH(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__vaspaceapiControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS vaspaceapiGetMemInterMapParams_DISPATCH(struct VaSpaceApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__vaspaceapiGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS vaspaceapiIsDuplicate_DISPATCH(struct VaSpaceApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__vaspaceapiIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS vaspaceapiGetMemoryMappingDescriptor_DISPATCH(struct VaSpaceApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__vaspaceapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void vaspaceapiPreDestruct_DISPATCH(struct VaSpaceApi *pResource) { + pResource->__vaspaceapiPreDestruct__(pResource); } static inline NV_STATUS vaspaceapiControlFilter_DISPATCH(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__vaspaceapiControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS vaspaceapiControlSerialization_Prologue_DISPATCH(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vaspaceapiControlSerialization_Prologue__(pResource, pCallContext, pParams); -} - static inline NvBool vaspaceapiIsPartialUnmapSupported_DISPATCH(struct VaSpaceApi *pResource) { return pResource->__vaspaceapiIsPartialUnmapSupported__(pResource); } -static inline void vaspaceapiPreDestruct_DISPATCH(struct VaSpaceApi *pResource) { - pResource->__vaspaceapiPreDestruct__(pResource); +static inline NV_STATUS vaspaceapiMapTo_DISPATCH(struct VaSpaceApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__vaspaceapiMapTo__(pResource, pParams); } -static inline NV_STATUS vaspaceapiIsDuplicate_DISPATCH(struct VaSpaceApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__vaspaceapiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS vaspaceapiUnmapFrom_DISPATCH(struct VaSpaceApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__vaspaceapiUnmapFrom__(pResource, pParams); } -static inline void vaspaceapiControlSerialization_Epilogue_DISPATCH(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vaspaceapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 vaspaceapiGetRefCount_DISPATCH(struct VaSpaceApi *pResource) { + return pResource->__vaspaceapiGetRefCount__(pResource); } -static inline NV_STATUS vaspaceapiMap_DISPATCH(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__vaspaceapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline void vaspaceapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VaSpaceApi *pResource, RsResourceRef *pReference) { + pResource->__vaspaceapiAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NvBool vaspaceapiAccessCallback_DISPATCH(struct VaSpaceApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__vaspaceapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} +NvBool vaspaceapiCanCopy_IMPL(struct VaSpaceApi *pResource); + +NV_STATUS vaspaceapiCtrlCmdVaspaceGetGmmuFormat_IMPL(struct VaSpaceApi *pVaspaceApi, NV90F1_CTRL_VASPACE_GET_GMMU_FORMAT_PARAMS *pGmmuFormatParams); + +NV_STATUS vaspaceapiCtrlCmdVaspaceGetPageLevelInfo_IMPL(struct VaSpaceApi *pVaspaceApi, NV90F1_CTRL_VASPACE_GET_PAGE_LEVEL_INFO_PARAMS *pPageLevelInfoParams); + +NV_STATUS vaspaceapiCtrlCmdVaspaceReserveEntries_IMPL(struct VaSpaceApi *pVaspaceApi, NV90F1_CTRL_VASPACE_RESERVE_ENTRIES_PARAMS *pReserveEntriesParams); + +NV_STATUS vaspaceapiCtrlCmdVaspaceReleaseEntries_IMPL(struct VaSpaceApi *pVaspaceApi, NV90F1_CTRL_VASPACE_RELEASE_ENTRIES_PARAMS *pReleaseEntriesParams); + +NV_STATUS vaspaceapiCtrlCmdVaspaceCopyServerReservedPdes_IMPL(struct VaSpaceApi *pVaspaceApi, NV90F1_CTRL_VASPACE_COPY_SERVER_RESERVED_PDES_PARAMS *pCopyServerReservedPdesParams); + +NV_STATUS vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize_IMPL(struct VaSpaceApi *pVaspaceApi, NV90F1_CTRL_VASPACE_GET_HOST_RM_MANAGED_SIZE_PARAMS *pVaspaceGetHostRmManagedSizeParams); NV_STATUS vaspaceapiConstruct_IMPL(struct VaSpaceApi *arg_pResource, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_vaspace_nvoc.c b/src/nvidia/generated/g_vaspace_nvoc.c index 71a3c87782..f864bd5d50 100644 --- a/src/nvidia/generated/g_vaspace_nvoc.c +++ b/src/nvidia/generated/g_vaspace_nvoc.c @@ -93,69 +93,103 @@ NV_STATUS __nvoc_ctor_OBJVASPACE(OBJVASPACE *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJVASPACE_1(OBJVASPACE *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // vaspaceConstruct_ -- pure virtual pThis->__vaspaceConstruct___ = NULL; + // vaspaceAlloc -- pure virtual pThis->__vaspaceAlloc__ = NULL; + // vaspaceFree -- pure virtual pThis->__vaspaceFree__ = NULL; + // vaspaceApplyDefaultAlignment -- pure virtual pThis->__vaspaceApplyDefaultAlignment__ = NULL; + // vaspaceIncAllocRefCnt -- inline virtual body pThis->__vaspaceIncAllocRefCnt__ = &vaspaceIncAllocRefCnt_b7902c; + // vaspaceGetVaStart -- virtual pThis->__vaspaceGetVaStart__ = &vaspaceGetVaStart_IMPL; + // vaspaceGetVaLimit -- virtual pThis->__vaspaceGetVaLimit__ = &vaspaceGetVaLimit_IMPL; + // vaspaceGetVasInfo -- pure virtual pThis->__vaspaceGetVasInfo__ = NULL; + // vaspaceGetFlags -- inline virtual body pThis->__vaspaceGetFlags__ = &vaspaceGetFlags_edd98b; + // vaspaceMap -- inline virtual body pThis->__vaspaceMap__ = &vaspaceMap_b7902c; + // vaspaceUnmap -- inline virtual body pThis->__vaspaceUnmap__ = &vaspaceUnmap_8b86a5; + // vaspaceReserveMempool -- inline virtual body pThis->__vaspaceReserveMempool__ = &vaspaceReserveMempool_ac1694; + // vaspaceGetHeap -- inline virtual body pThis->__vaspaceGetHeap__ = &vaspaceGetHeap_128d6d; + // vaspaceGetMapPageSize -- inline virtual body pThis->__vaspaceGetMapPageSize__ = &vaspaceGetMapPageSize_07238a; + // vaspaceGetBigPageSize -- inline virtual body pThis->__vaspaceGetBigPageSize__ = &vaspaceGetBigPageSize_07238a; + // vaspaceIsMirrored -- inline virtual body pThis->__vaspaceIsMirrored__ = &vaspaceIsMirrored_814c13; + // vaspaceIsFaultCapable -- inline virtual body pThis->__vaspaceIsFaultCapable__ = &vaspaceIsFaultCapable_814c13; + // vaspaceIsExternallyOwned -- inline virtual body pThis->__vaspaceIsExternallyOwned__ = &vaspaceIsExternallyOwned_814c13; + // vaspaceIsAtsEnabled -- inline virtual body pThis->__vaspaceIsAtsEnabled__ = &vaspaceIsAtsEnabled_814c13; + // vaspaceGetPasid -- inline virtual body pThis->__vaspaceGetPasid__ = &vaspaceGetPasid_b7902c; + // vaspaceGetPageDirBase -- inline virtual body pThis->__vaspaceGetPageDirBase__ = &vaspaceGetPageDirBase_128d6d; + // vaspaceGetKernelPageDirBase -- inline virtual body pThis->__vaspaceGetKernelPageDirBase__ = &vaspaceGetKernelPageDirBase_128d6d; + // vaspacePinRootPageDir -- inline virtual body pThis->__vaspacePinRootPageDir__ = &vaspacePinRootPageDir_b7902c; + // vaspaceUnpinRootPageDir -- inline virtual body pThis->__vaspaceUnpinRootPageDir__ = &vaspaceUnpinRootPageDir_8b86a5; + // vaspaceInvalidateTlb -- virtual pThis->__vaspaceInvalidateTlb__ = &vaspaceInvalidateTlb_IMPL; + // vaspaceGetPageTableInfo -- inline virtual body pThis->__vaspaceGetPageTableInfo__ = &vaspaceGetPageTableInfo_b7902c; + // vaspaceGetPteInfo -- inline virtual body pThis->__vaspaceGetPteInfo__ = &vaspaceGetPteInfo_b7902c; + // vaspaceSetPteInfo -- inline virtual body pThis->__vaspaceSetPteInfo__ = &vaspaceSetPteInfo_b7902c; + // vaspaceFreeV2 -- inline virtual body pThis->__vaspaceFreeV2__ = &vaspaceFreeV2_b7902c; -} +} // End __nvoc_init_funcTable_OBJVASPACE_1 with approximately 29 basic block(s). + +// Initialize vtable(s) for 29 virtual method(s). void __nvoc_init_funcTable_OBJVASPACE(OBJVASPACE *pThis) { + + // Initialize vtable(s) with 29 per-object function pointer(s). __nvoc_init_funcTable_OBJVASPACE_1(pThis); } diff --git a/src/nvidia/generated/g_vaspace_nvoc.h b/src/nvidia/generated/g_vaspace_nvoc.h index de61b41a60..3a6984c98d 100644 --- a/src/nvidia/generated/g_vaspace_nvoc.h +++ b/src/nvidia/generated/g_vaspace_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_VASPACE_NVOC_H_ #define _G_VASPACE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_vaspace_nvoc.h" #ifndef _VASPACE_H_ @@ -50,6 +58,7 @@ extern "C" { typedef struct OBJVASPACE *POBJVASPACE; typedef struct VASPACE VASPACE, *PVASPACE; + struct VirtMemAllocator; #ifndef __NVOC_CLASS_VirtMemAllocator_TYPEDEF__ @@ -64,6 +73,7 @@ typedef struct VirtMemAllocator VirtMemAllocator; typedef struct MMU_MAP_TARGET MMU_MAP_TARGET; typedef struct NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS; + struct Device; #ifndef __NVOC_CLASS_Device_TYPEDEF__ @@ -250,40 +260,51 @@ typedef enum #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJVASPACE { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct OBJVASPACE *__nvoc_pbase_OBJVASPACE; - NV_STATUS (*__vaspaceConstruct___)(struct OBJVASPACE *, NvU32, NvU32, NvU64, NvU64, NvU64, NvU64, NvU32); - NV_STATUS (*__vaspaceAlloc__)(struct OBJVASPACE *, NvU64, NvU64, NvU64, NvU64, NvU64, VAS_ALLOC_FLAGS, NvU64 *); - NV_STATUS (*__vaspaceFree__)(struct OBJVASPACE *, NvU64); - NV_STATUS (*__vaspaceApplyDefaultAlignment__)(struct OBJVASPACE *, const FB_ALLOC_INFO *, NvU64 *, NvU64 *, NvU64 *); - NV_STATUS (*__vaspaceIncAllocRefCnt__)(struct OBJVASPACE *, NvU64); - NvU64 (*__vaspaceGetVaStart__)(struct OBJVASPACE *); - NvU64 (*__vaspaceGetVaLimit__)(struct OBJVASPACE *); - NV_STATUS (*__vaspaceGetVasInfo__)(struct OBJVASPACE *, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *); - NvU32 (*__vaspaceGetFlags__)(struct OBJVASPACE *); - NV_STATUS (*__vaspaceMap__)(struct OBJVASPACE *, struct OBJGPU *, const NvU64, const NvU64, const MMU_MAP_TARGET *, const VAS_MAP_FLAGS); - void (*__vaspaceUnmap__)(struct OBJVASPACE *, struct OBJGPU *, const NvU64, const NvU64); - NV_STATUS (*__vaspaceReserveMempool__)(struct OBJVASPACE *, struct OBJGPU *, struct Device *, NvU64, NvU64, NvU32); - struct OBJEHEAP *(*__vaspaceGetHeap__)(struct OBJVASPACE *); - NvU64 (*__vaspaceGetMapPageSize__)(struct OBJVASPACE *, struct OBJGPU *, struct EMEMBLOCK *); - NvU64 (*__vaspaceGetBigPageSize__)(struct OBJVASPACE *); - NvBool (*__vaspaceIsMirrored__)(struct OBJVASPACE *); - NvBool (*__vaspaceIsFaultCapable__)(struct OBJVASPACE *); - NvBool (*__vaspaceIsExternallyOwned__)(struct OBJVASPACE *); - NvBool (*__vaspaceIsAtsEnabled__)(struct OBJVASPACE *); - NV_STATUS (*__vaspaceGetPasid__)(struct OBJVASPACE *, NvU32 *); - PMEMORY_DESCRIPTOR (*__vaspaceGetPageDirBase__)(struct OBJVASPACE *, struct OBJGPU *); - PMEMORY_DESCRIPTOR (*__vaspaceGetKernelPageDirBase__)(struct OBJVASPACE *, struct OBJGPU *); - NV_STATUS (*__vaspacePinRootPageDir__)(struct OBJVASPACE *, struct OBJGPU *); - void (*__vaspaceUnpinRootPageDir__)(struct OBJVASPACE *, struct OBJGPU *); - void (*__vaspaceInvalidateTlb__)(struct OBJVASPACE *, struct OBJGPU *, VAS_PTE_UPDATE_TYPE); - NV_STATUS (*__vaspaceGetPageTableInfo__)(struct OBJVASPACE *, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *); - NV_STATUS (*__vaspaceGetPteInfo__)(struct OBJVASPACE *, struct OBJGPU *, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *, RmPhysAddr *); - NV_STATUS (*__vaspaceSetPteInfo__)(struct OBJVASPACE *, struct OBJGPU *, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *); - NV_STATUS (*__vaspaceFreeV2__)(struct OBJVASPACE *, NvU64, NvU64 *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct OBJVASPACE *__nvoc_pbase_OBJVASPACE; // vaspace + + // Vtable with 29 per-object function pointers + NV_STATUS (*__vaspaceConstruct___)(struct OBJVASPACE * /*this*/, NvU32, NvU32, NvU64, NvU64, NvU64, NvU64, NvU32); // pure virtual + NV_STATUS (*__vaspaceAlloc__)(struct OBJVASPACE * /*this*/, NvU64, NvU64, NvU64, NvU64, NvU64, VAS_ALLOC_FLAGS, NvU64 *); // pure virtual + NV_STATUS (*__vaspaceFree__)(struct OBJVASPACE * /*this*/, NvU64); // pure virtual + NV_STATUS (*__vaspaceApplyDefaultAlignment__)(struct OBJVASPACE * /*this*/, const FB_ALLOC_INFO *, NvU64 *, NvU64 *, NvU64 *); // pure virtual + NV_STATUS (*__vaspaceIncAllocRefCnt__)(struct OBJVASPACE * /*this*/, NvU64); // inline virtual body + NvU64 (*__vaspaceGetVaStart__)(struct OBJVASPACE * /*this*/); // virtual + NvU64 (*__vaspaceGetVaLimit__)(struct OBJVASPACE * /*this*/); // virtual + NV_STATUS (*__vaspaceGetVasInfo__)(struct OBJVASPACE * /*this*/, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *); // pure virtual + NvU32 (*__vaspaceGetFlags__)(struct OBJVASPACE * /*this*/); // inline virtual body + NV_STATUS (*__vaspaceMap__)(struct OBJVASPACE * /*this*/, struct OBJGPU *, const NvU64, const NvU64, const MMU_MAP_TARGET *, const VAS_MAP_FLAGS); // inline virtual body + void (*__vaspaceUnmap__)(struct OBJVASPACE * /*this*/, struct OBJGPU *, const NvU64, const NvU64); // inline virtual body + NV_STATUS (*__vaspaceReserveMempool__)(struct OBJVASPACE * /*this*/, struct OBJGPU *, struct Device *, NvU64, NvU64, NvU32); // inline virtual body + struct OBJEHEAP * (*__vaspaceGetHeap__)(struct OBJVASPACE * /*this*/); // inline virtual body + NvU64 (*__vaspaceGetMapPageSize__)(struct OBJVASPACE * /*this*/, struct OBJGPU *, struct EMEMBLOCK *); // inline virtual body + NvU64 (*__vaspaceGetBigPageSize__)(struct OBJVASPACE * /*this*/); // inline virtual body + NvBool (*__vaspaceIsMirrored__)(struct OBJVASPACE * /*this*/); // inline virtual body + NvBool (*__vaspaceIsFaultCapable__)(struct OBJVASPACE * /*this*/); // inline virtual body + NvBool (*__vaspaceIsExternallyOwned__)(struct OBJVASPACE * /*this*/); // inline virtual body + NvBool (*__vaspaceIsAtsEnabled__)(struct OBJVASPACE * /*this*/); // inline virtual body + NV_STATUS (*__vaspaceGetPasid__)(struct OBJVASPACE * /*this*/, NvU32 *); // inline virtual body + PMEMORY_DESCRIPTOR (*__vaspaceGetPageDirBase__)(struct OBJVASPACE * /*this*/, struct OBJGPU *); // inline virtual body + PMEMORY_DESCRIPTOR (*__vaspaceGetKernelPageDirBase__)(struct OBJVASPACE * /*this*/, struct OBJGPU *); // inline virtual body + NV_STATUS (*__vaspacePinRootPageDir__)(struct OBJVASPACE * /*this*/, struct OBJGPU *); // inline virtual body + void (*__vaspaceUnpinRootPageDir__)(struct OBJVASPACE * /*this*/, struct OBJGPU *); // inline virtual body + void (*__vaspaceInvalidateTlb__)(struct OBJVASPACE * /*this*/, struct OBJGPU *, VAS_PTE_UPDATE_TYPE); // virtual + NV_STATUS (*__vaspaceGetPageTableInfo__)(struct OBJVASPACE * /*this*/, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *); // inline virtual body + NV_STATUS (*__vaspaceGetPteInfo__)(struct OBJVASPACE * /*this*/, struct OBJGPU *, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *, RmPhysAddr *); // inline virtual body + NV_STATUS (*__vaspaceSetPteInfo__)(struct OBJVASPACE * /*this*/, struct OBJGPU *, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *); // inline virtual body + NV_STATUS (*__vaspaceFreeV2__)(struct OBJVASPACE * /*this*/, NvU64, NvU64 *); // inline virtual body + + // Data members NvU32 gpuMask; ADDRESS_TRANSLATION addressTranslation; NvU32 refCnt; @@ -301,6 +322,7 @@ typedef struct OBJVASPACE OBJVASPACE; #define __nvoc_class_id_OBJVASPACE 0x6c347f #endif /* __nvoc_class_id_OBJVASPACE */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJVASPACE; #define __staticCast_OBJVASPACE(pThis) \ @@ -313,42 +335,74 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJVASPACE; ((OBJVASPACE*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJVASPACE))) #endif //__nvoc_vaspace_h_disabled - NV_STATUS __nvoc_objCreateDynamic_OBJVASPACE(OBJVASPACE**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_OBJVASPACE(OBJVASPACE**, Dynamic*, NvU32); #define __objCreate_OBJVASPACE(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJVASPACE((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros +#define vaspaceConstruct__FNPTR(pVAS) pVAS->__vaspaceConstruct___ #define vaspaceConstruct_(pVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags) vaspaceConstruct__DISPATCH(pVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags) +#define vaspaceAlloc_FNPTR(pVAS) pVAS->__vaspaceAlloc__ #define vaspaceAlloc(pVAS, size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr) vaspaceAlloc_DISPATCH(pVAS, size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr) +#define vaspaceFree_FNPTR(pVAS) pVAS->__vaspaceFree__ #define vaspaceFree(pVAS, vAddr) vaspaceFree_DISPATCH(pVAS, vAddr) +#define vaspaceApplyDefaultAlignment_FNPTR(pVAS) pVAS->__vaspaceApplyDefaultAlignment__ #define vaspaceApplyDefaultAlignment(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask) vaspaceApplyDefaultAlignment_DISPATCH(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask) +#define vaspaceIncAllocRefCnt_FNPTR(pVAS) pVAS->__vaspaceIncAllocRefCnt__ #define vaspaceIncAllocRefCnt(pVAS, vAddr) vaspaceIncAllocRefCnt_DISPATCH(pVAS, vAddr) +#define vaspaceGetVaStart_FNPTR(pVAS) pVAS->__vaspaceGetVaStart__ #define vaspaceGetVaStart(pVAS) vaspaceGetVaStart_DISPATCH(pVAS) +#define vaspaceGetVaLimit_FNPTR(pVAS) pVAS->__vaspaceGetVaLimit__ #define vaspaceGetVaLimit(pVAS) vaspaceGetVaLimit_DISPATCH(pVAS) +#define vaspaceGetVasInfo_FNPTR(pVAS) pVAS->__vaspaceGetVasInfo__ #define vaspaceGetVasInfo(pVAS, pParams) vaspaceGetVasInfo_DISPATCH(pVAS, pParams) +#define vaspaceGetFlags_FNPTR(pVAS) pVAS->__vaspaceGetFlags__ #define vaspaceGetFlags(pVAS) vaspaceGetFlags_DISPATCH(pVAS) +#define vaspaceMap_FNPTR(pVAS) pVAS->__vaspaceMap__ #define vaspaceMap(pVAS, pGpu, vaLo, vaHi, pTarget, flags) vaspaceMap_DISPATCH(pVAS, pGpu, vaLo, vaHi, pTarget, flags) +#define vaspaceUnmap_FNPTR(pVAS) pVAS->__vaspaceUnmap__ #define vaspaceUnmap(pVAS, pGpu, vaLo, vaHi) vaspaceUnmap_DISPATCH(pVAS, pGpu, vaLo, vaHi) +#define vaspaceReserveMempool_FNPTR(pVAS) pVAS->__vaspaceReserveMempool__ #define vaspaceReserveMempool(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags) vaspaceReserveMempool_DISPATCH(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags) +#define vaspaceGetHeap_FNPTR(pVAS) pVAS->__vaspaceGetHeap__ #define vaspaceGetHeap(pVAS) vaspaceGetHeap_DISPATCH(pVAS) +#define vaspaceGetMapPageSize_FNPTR(pVAS) pVAS->__vaspaceGetMapPageSize__ #define vaspaceGetMapPageSize(pVAS, pGpu, pMemBlock) vaspaceGetMapPageSize_DISPATCH(pVAS, pGpu, pMemBlock) +#define vaspaceGetBigPageSize_FNPTR(pVAS) pVAS->__vaspaceGetBigPageSize__ #define vaspaceGetBigPageSize(pVAS) vaspaceGetBigPageSize_DISPATCH(pVAS) +#define vaspaceIsMirrored_FNPTR(pVAS) pVAS->__vaspaceIsMirrored__ #define vaspaceIsMirrored(pVAS) vaspaceIsMirrored_DISPATCH(pVAS) +#define vaspaceIsFaultCapable_FNPTR(pVAS) pVAS->__vaspaceIsFaultCapable__ #define vaspaceIsFaultCapable(pVAS) vaspaceIsFaultCapable_DISPATCH(pVAS) +#define vaspaceIsExternallyOwned_FNPTR(pVAS) pVAS->__vaspaceIsExternallyOwned__ #define vaspaceIsExternallyOwned(pVAS) vaspaceIsExternallyOwned_DISPATCH(pVAS) +#define vaspaceIsAtsEnabled_FNPTR(pVAS) pVAS->__vaspaceIsAtsEnabled__ #define vaspaceIsAtsEnabled(pVAS) vaspaceIsAtsEnabled_DISPATCH(pVAS) +#define vaspaceGetPasid_FNPTR(pVAS) pVAS->__vaspaceGetPasid__ #define vaspaceGetPasid(pVAS, pPasid) vaspaceGetPasid_DISPATCH(pVAS, pPasid) +#define vaspaceGetPageDirBase_FNPTR(pVAS) pVAS->__vaspaceGetPageDirBase__ #define vaspaceGetPageDirBase(pVAS, pGpu) vaspaceGetPageDirBase_DISPATCH(pVAS, pGpu) +#define vaspaceGetKernelPageDirBase_FNPTR(pVAS) pVAS->__vaspaceGetKernelPageDirBase__ #define vaspaceGetKernelPageDirBase(pVAS, pGpu) vaspaceGetKernelPageDirBase_DISPATCH(pVAS, pGpu) +#define vaspacePinRootPageDir_FNPTR(pVAS) pVAS->__vaspacePinRootPageDir__ #define vaspacePinRootPageDir(pVAS, pGpu) vaspacePinRootPageDir_DISPATCH(pVAS, pGpu) +#define vaspaceUnpinRootPageDir_FNPTR(pVAS) pVAS->__vaspaceUnpinRootPageDir__ #define vaspaceUnpinRootPageDir(pVAS, pGpu) vaspaceUnpinRootPageDir_DISPATCH(pVAS, pGpu) +#define vaspaceInvalidateTlb_FNPTR(pVAS) pVAS->__vaspaceInvalidateTlb__ #define vaspaceInvalidateTlb(pVAS, pGpu, type) vaspaceInvalidateTlb_DISPATCH(pVAS, pGpu, type) +#define vaspaceGetPageTableInfo_FNPTR(pVAS) pVAS->__vaspaceGetPageTableInfo__ #define vaspaceGetPageTableInfo(pVAS, pParams) vaspaceGetPageTableInfo_DISPATCH(pVAS, pParams) +#define vaspaceGetPteInfo_FNPTR(pVAS) pVAS->__vaspaceGetPteInfo__ #define vaspaceGetPteInfo(pVAS, pGpu, pParams, pPhysAddr) vaspaceGetPteInfo_DISPATCH(pVAS, pGpu, pParams, pPhysAddr) +#define vaspaceSetPteInfo_FNPTR(pVAS) pVAS->__vaspaceSetPteInfo__ #define vaspaceSetPteInfo(pVAS, pGpu, pParams) vaspaceSetPteInfo_DISPATCH(pVAS, pGpu, pParams) +#define vaspaceFreeV2_FNPTR(pVAS) pVAS->__vaspaceFreeV2__ #define vaspaceFreeV2(pVAS, vAddr, pSize) vaspaceFreeV2_DISPATCH(pVAS, vAddr, pSize) + +// Dispatch functions static inline NV_STATUS vaspaceConstruct__DISPATCH(struct OBJVASPACE *pVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags) { return pVAS->__vaspaceConstruct___(pVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); } @@ -365,23 +419,14 @@ static inline NV_STATUS vaspaceApplyDefaultAlignment_DISPATCH(struct OBJVASPACE return pVAS->__vaspaceApplyDefaultAlignment__(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask); } -static inline NV_STATUS vaspaceIncAllocRefCnt_b7902c(struct OBJVASPACE *pVAS, NvU64 vAddr) { - NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); - return NV_ERR_NOT_SUPPORTED; -} - static inline NV_STATUS vaspaceIncAllocRefCnt_DISPATCH(struct OBJVASPACE *pVAS, NvU64 vAddr) { return pVAS->__vaspaceIncAllocRefCnt__(pVAS, vAddr); } -NvU64 vaspaceGetVaStart_IMPL(struct OBJVASPACE *pVAS); - static inline NvU64 vaspaceGetVaStart_DISPATCH(struct OBJVASPACE *pVAS) { return pVAS->__vaspaceGetVaStart__(pVAS); } -NvU64 vaspaceGetVaLimit_IMPL(struct OBJVASPACE *pVAS); - static inline NvU64 vaspaceGetVaLimit_DISPATCH(struct OBJVASPACE *pVAS) { return pVAS->__vaspaceGetVaLimit__(pVAS); } @@ -390,188 +435,197 @@ static inline NV_STATUS vaspaceGetVasInfo_DISPATCH(struct OBJVASPACE *pVAS, NV00 return pVAS->__vaspaceGetVasInfo__(pVAS, pParams); } -static inline NvU32 vaspaceGetFlags_edd98b(struct OBJVASPACE *pVAS) { - return 0U; -} - static inline NvU32 vaspaceGetFlags_DISPATCH(struct OBJVASPACE *pVAS) { return pVAS->__vaspaceGetFlags__(pVAS); } -static inline NV_STATUS vaspaceMap_b7902c(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { +static inline NV_STATUS vaspaceMap_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { + return pVAS->__vaspaceMap__(pVAS, pGpu, vaLo, vaHi, pTarget, flags); +} + +static inline void vaspaceUnmap_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { + pVAS->__vaspaceUnmap__(pVAS, pGpu, vaLo, vaHi); +} + +static inline NV_STATUS vaspaceReserveMempool_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { + return pVAS->__vaspaceReserveMempool__(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags); +} + +static inline struct OBJEHEAP * vaspaceGetHeap_DISPATCH(struct OBJVASPACE *pVAS) { + return pVAS->__vaspaceGetHeap__(pVAS); +} + +static inline NvU64 vaspaceGetMapPageSize_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, struct EMEMBLOCK *pMemBlock) { + return pVAS->__vaspaceGetMapPageSize__(pVAS, pGpu, pMemBlock); +} + +static inline NvU64 vaspaceGetBigPageSize_DISPATCH(struct OBJVASPACE *pVAS) { + return pVAS->__vaspaceGetBigPageSize__(pVAS); +} + +static inline NvBool vaspaceIsMirrored_DISPATCH(struct OBJVASPACE *pVAS) { + return pVAS->__vaspaceIsMirrored__(pVAS); +} + +static inline NvBool vaspaceIsFaultCapable_DISPATCH(struct OBJVASPACE *pVAS) { + return pVAS->__vaspaceIsFaultCapable__(pVAS); +} + +static inline NvBool vaspaceIsExternallyOwned_DISPATCH(struct OBJVASPACE *pVAS) { + return pVAS->__vaspaceIsExternallyOwned__(pVAS); +} + +static inline NvBool vaspaceIsAtsEnabled_DISPATCH(struct OBJVASPACE *pVAS) { + return pVAS->__vaspaceIsAtsEnabled__(pVAS); +} + +static inline NV_STATUS vaspaceGetPasid_DISPATCH(struct OBJVASPACE *pVAS, NvU32 *pPasid) { + return pVAS->__vaspaceGetPasid__(pVAS, pPasid); +} + +static inline PMEMORY_DESCRIPTOR vaspaceGetPageDirBase_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { + return pVAS->__vaspaceGetPageDirBase__(pVAS, pGpu); +} + +static inline PMEMORY_DESCRIPTOR vaspaceGetKernelPageDirBase_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { + return pVAS->__vaspaceGetKernelPageDirBase__(pVAS, pGpu); +} + +static inline NV_STATUS vaspacePinRootPageDir_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { + return pVAS->__vaspacePinRootPageDir__(pVAS, pGpu); +} + +static inline void vaspaceUnpinRootPageDir_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { + pVAS->__vaspaceUnpinRootPageDir__(pVAS, pGpu); +} + +static inline void vaspaceInvalidateTlb_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { + pVAS->__vaspaceInvalidateTlb__(pVAS, pGpu, type); +} + +static inline NV_STATUS vaspaceGetPageTableInfo_DISPATCH(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { + return pVAS->__vaspaceGetPageTableInfo__(pVAS, pParams); +} + +static inline NV_STATUS vaspaceGetPteInfo_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { + return pVAS->__vaspaceGetPteInfo__(pVAS, pGpu, pParams, pPhysAddr); +} + +static inline NV_STATUS vaspaceSetPteInfo_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { + return pVAS->__vaspaceSetPteInfo__(pVAS, pGpu, pParams); +} + +static inline NV_STATUS vaspaceFreeV2_DISPATCH(struct OBJVASPACE *pVAS, NvU64 vAddr, NvU64 *pSize) { + return pVAS->__vaspaceFreeV2__(pVAS, vAddr, pSize); +} + +static inline NV_STATUS vaspaceIncAllocRefCnt_b7902c(struct OBJVASPACE *pVAS, NvU64 vAddr) { NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS vaspaceMap_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { - return pVAS->__vaspaceMap__(pVAS, pGpu, vaLo, vaHi, pTarget, flags); +NvU64 vaspaceGetVaStart_IMPL(struct OBJVASPACE *pVAS); + +NvU64 vaspaceGetVaLimit_IMPL(struct OBJVASPACE *pVAS); + +static inline NvU32 vaspaceGetFlags_edd98b(struct OBJVASPACE *pVAS) { + return 0U; } -static inline void vaspaceUnmap_8b86a5(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { +static inline NV_STATUS vaspaceMap_b7902c(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); + return NV_ERR_NOT_SUPPORTED; } -static inline void vaspaceUnmap_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { - pVAS->__vaspaceUnmap__(pVAS, pGpu, vaLo, vaHi); +static inline void vaspaceUnmap_8b86a5(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { + NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); } static inline NV_STATUS vaspaceReserveMempool_ac1694(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { return NV_OK; } -static inline NV_STATUS vaspaceReserveMempool_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { - return pVAS->__vaspaceReserveMempool__(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags); -} - static inline struct OBJEHEAP *vaspaceGetHeap_128d6d(struct OBJVASPACE *pVAS) { NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); return ((void *)0); } -static inline struct OBJEHEAP *vaspaceGetHeap_DISPATCH(struct OBJVASPACE *pVAS) { - return pVAS->__vaspaceGetHeap__(pVAS); -} - static inline NvU64 vaspaceGetMapPageSize_07238a(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, struct EMEMBLOCK *pMemBlock) { NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); return 0U; } -static inline NvU64 vaspaceGetMapPageSize_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, struct EMEMBLOCK *pMemBlock) { - return pVAS->__vaspaceGetMapPageSize__(pVAS, pGpu, pMemBlock); -} - static inline NvU64 vaspaceGetBigPageSize_07238a(struct OBJVASPACE *pVAS) { NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); return 0U; } -static inline NvU64 vaspaceGetBigPageSize_DISPATCH(struct OBJVASPACE *pVAS) { - return pVAS->__vaspaceGetBigPageSize__(pVAS); -} - static inline NvBool vaspaceIsMirrored_814c13(struct OBJVASPACE *pVAS) { NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); return ((NvBool)(0 != 0)); } -static inline NvBool vaspaceIsMirrored_DISPATCH(struct OBJVASPACE *pVAS) { - return pVAS->__vaspaceIsMirrored__(pVAS); -} - static inline NvBool vaspaceIsFaultCapable_814c13(struct OBJVASPACE *pVAS) { NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); return ((NvBool)(0 != 0)); } -static inline NvBool vaspaceIsFaultCapable_DISPATCH(struct OBJVASPACE *pVAS) { - return pVAS->__vaspaceIsFaultCapable__(pVAS); -} - static inline NvBool vaspaceIsExternallyOwned_814c13(struct OBJVASPACE *pVAS) { NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); return ((NvBool)(0 != 0)); } -static inline NvBool vaspaceIsExternallyOwned_DISPATCH(struct OBJVASPACE *pVAS) { - return pVAS->__vaspaceIsExternallyOwned__(pVAS); -} - static inline NvBool vaspaceIsAtsEnabled_814c13(struct OBJVASPACE *pVAS) { NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); return ((NvBool)(0 != 0)); } -static inline NvBool vaspaceIsAtsEnabled_DISPATCH(struct OBJVASPACE *pVAS) { - return pVAS->__vaspaceIsAtsEnabled__(pVAS); -} - static inline NV_STATUS vaspaceGetPasid_b7902c(struct OBJVASPACE *pVAS, NvU32 *pPasid) { NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS vaspaceGetPasid_DISPATCH(struct OBJVASPACE *pVAS, NvU32 *pPasid) { - return pVAS->__vaspaceGetPasid__(pVAS, pPasid); -} - static inline PMEMORY_DESCRIPTOR vaspaceGetPageDirBase_128d6d(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); return ((void *)0); } -static inline PMEMORY_DESCRIPTOR vaspaceGetPageDirBase_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { - return pVAS->__vaspaceGetPageDirBase__(pVAS, pGpu); -} - static inline PMEMORY_DESCRIPTOR vaspaceGetKernelPageDirBase_128d6d(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); return ((void *)0); } -static inline PMEMORY_DESCRIPTOR vaspaceGetKernelPageDirBase_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { - return pVAS->__vaspaceGetKernelPageDirBase__(pVAS, pGpu); -} - static inline NV_STATUS vaspacePinRootPageDir_b7902c(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS vaspacePinRootPageDir_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { - return pVAS->__vaspacePinRootPageDir__(pVAS, pGpu); -} - static inline void vaspaceUnpinRootPageDir_8b86a5(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); } -static inline void vaspaceUnpinRootPageDir_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { - pVAS->__vaspaceUnpinRootPageDir__(pVAS, pGpu); -} - void vaspaceInvalidateTlb_IMPL(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type); -static inline void vaspaceInvalidateTlb_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { - pVAS->__vaspaceInvalidateTlb__(pVAS, pGpu, type); -} - static inline NV_STATUS vaspaceGetPageTableInfo_b7902c(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS vaspaceGetPageTableInfo_DISPATCH(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { - return pVAS->__vaspaceGetPageTableInfo__(pVAS, pParams); -} - static inline NV_STATUS vaspaceGetPteInfo_b7902c(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS vaspaceGetPteInfo_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { - return pVAS->__vaspaceGetPteInfo__(pVAS, pGpu, pParams, pPhysAddr); -} - static inline NV_STATUS vaspaceSetPteInfo_b7902c(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS vaspaceSetPteInfo_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { - return pVAS->__vaspaceSetPteInfo__(pVAS, pGpu, pParams); -} - static inline NV_STATUS vaspaceFreeV2_b7902c(struct OBJVASPACE *pVAS, NvU64 vAddr, NvU64 *pSize) { NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS vaspaceFreeV2_DISPATCH(struct OBJVASPACE *pVAS, NvU64 vAddr, NvU64 *pSize) { - return pVAS->__vaspaceFreeV2__(pVAS, vAddr, pSize); -} - void vaspaceIncRefCnt_IMPL(struct OBJVASPACE *pVAS); #ifdef __nvoc_vaspace_h_disabled diff --git a/src/nvidia/generated/g_vblank_callback_nvoc.c b/src/nvidia/generated/g_vblank_callback_nvoc.c index 1150e3bc1d..5ec09ec98c 100644 --- a/src/nvidia/generated/g_vblank_callback_nvoc.c +++ b/src/nvidia/generated/g_vblank_callback_nvoc.c @@ -93,129 +93,157 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_VblankCallback = /*pExportInfo=*/ &__nvoc_export_info_VblankCallback }; -static NvBool __nvoc_thunk_GpuResource_vblcbShareCallback(struct VblankCallback *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NV_STATUS __nvoc_thunk_RmResource_vblcbCheckMemInterUnmap(struct VblankCallback *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_VblankCallback_RmResource.offset), bSubdeviceHandleProvided); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VblankCallback[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) vblcbCtrlSetVBlankNotification_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) + /*flags=*/ 0x0u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x90100101u, + /*paramSize=*/ sizeof(NV9010_CTRL_CMD_SET_VBLANK_NOTIFICATION_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_VblankCallback.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "vblcbCtrlSetVBlankNotification" +#endif + }, + +}; + +// 25 up-thunk(s) defined to bridge methods in VblankCallback to superclasses -static NV_STATUS __nvoc_thunk_RsResource_vblcbMapTo(struct VblankCallback *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VblankCallback_RsResource.offset), pParams); +// vblcbControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vblcbControl(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_vblcbGetMapAddrSpace(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// vblcbMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vblcbMap(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_vblcbGetRefCount(struct VblankCallback *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VblankCallback_RsResource.offset)); +// vblcbUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vblcbUnmap(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_RsResource_vblcbAddAdditionalDependants(struct RsClient *pClient, struct VblankCallback *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VblankCallback_RsResource.offset), pReference); +// vblcbShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_vblcbShareCallback(struct VblankCallback *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RmResource_vblcbControl_Prologue(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VblankCallback_RmResource.offset), pCallContext, pParams); +// vblcbGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vblcbGetRegBaseOffsetAndSize(struct VblankCallback *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_GpuResource_vblcbGetRegBaseOffsetAndSize(struct VblankCallback *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), pGpu, pOffset, pSize); +// vblcbGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vblcbGetMapAddrSpace(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_GpuResource_vblcbInternalControlForward(struct VblankCallback *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), command, pParams, size); +// vblcbInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vblcbInternalControlForward(struct VblankCallback *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_RsResource_vblcbUnmapFrom(struct VblankCallback *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VblankCallback_RsResource.offset), pParams); +// vblcbGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_vblcbGetInternalObjectHandle(struct VblankCallback *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset)); } -static void __nvoc_thunk_RmResource_vblcbControl_Epilogue(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VblankCallback_RmResource.offset), pCallContext, pParams); +// vblcbAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_vblcbAccessCallback(struct VblankCallback *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NvHandle __nvoc_thunk_GpuResource_vblcbGetInternalObjectHandle(struct VblankCallback *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset)); +// vblcbGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vblcbGetMemInterMapParams(struct VblankCallback *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VblankCallback_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_vblcbControl(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), pCallContext, pParams); +// vblcbCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vblcbCheckMemInterUnmap(struct VblankCallback *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VblankCallback_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_GpuResource_vblcbUnmap(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), pCallContext, pCpuMapping); +// vblcbGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vblcbGetMemoryMappingDescriptor(struct VblankCallback *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VblankCallback_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_RmResource_vblcbGetMemInterMapParams(struct VblankCallback *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_VblankCallback_RmResource.offset), pParams); +// vblcbControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vblcbControlSerialization_Prologue(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_vblcbGetMemoryMappingDescriptor(struct VblankCallback *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_VblankCallback_RmResource.offset), ppMemDesc); +// vblcbControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_vblcbControlSerialization_Epilogue(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_vblcbControlFilter(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VblankCallback_RsResource.offset), pCallContext, pParams); +// vblcbControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vblcbControl_Prologue(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_vblcbControlSerialization_Prologue(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VblankCallback_RmResource.offset), pCallContext, pParams); +// vblcbControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_vblcbControl_Epilogue(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_vblcbCanCopy(struct VblankCallback *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VblankCallback_RsResource.offset)); +// vblcbCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_vblcbCanCopy(struct VblankCallback *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_vblcbIsPartialUnmapSupported(struct VblankCallback *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VblankCallback_RsResource.offset)); +// vblcbIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_vblcbIsDuplicate(struct VblankCallback *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RsResource.offset), hMemory, pDuplicate); } -static void __nvoc_thunk_RsResource_vblcbPreDestruct(struct VblankCallback *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VblankCallback_RsResource.offset)); +// vblcbPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_vblcbPreDestruct(struct VblankCallback *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_vblcbIsDuplicate(struct VblankCallback *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VblankCallback_RsResource.offset), hMemory, pDuplicate); +// vblcbControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_vblcbControlFilter(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RmResource_vblcbControlSerialization_Epilogue(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VblankCallback_RmResource.offset), pCallContext, pParams); +// vblcbIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_vblcbIsPartialUnmapSupported(struct VblankCallback *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_vblcbMap(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// vblcbMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_vblcbMapTo(struct VblankCallback *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RmResource_vblcbAccessCallback(struct VblankCallback *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VblankCallback_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// vblcbUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_vblcbUnmapFrom(struct VblankCallback *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RsResource.offset), pParams); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// vblcbGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_vblcbGetRefCount(struct VblankCallback *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RsResource.offset)); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VblankCallback[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) vblcbCtrlSetVBlankNotification_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) - /*flags=*/ 0x0u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x90100101u, - /*paramSize=*/ sizeof(NV9010_CTRL_CMD_SET_VBLANK_NOTIFICATION_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_VblankCallback.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "vblcbCtrlSetVBlankNotification" -#endif - }, +// vblcbAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_vblcbAddAdditionalDependants(struct RsClient *pClient, struct VblankCallback *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RsResource.offset), pReference); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_VblankCallback = { @@ -253,65 +281,96 @@ NV_STATUS __nvoc_ctor_VblankCallback(VblankCallback *pThis, CALL_CONTEXT * arg_p return status; } +// Vtable initialization static void __nvoc_init_funcTable_VblankCallback_1(VblankCallback *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // vblcbCtrlSetVBlankNotification -- exported (id=0x90100101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__vblcbCtrlSetVBlankNotification__ = &vblcbCtrlSetVBlankNotification_IMPL; #endif - pThis->__vblcbShareCallback__ = &__nvoc_thunk_GpuResource_vblcbShareCallback; + // vblcbControl -- virtual inherited (gpures) base (gpures) + pThis->__vblcbControl__ = &__nvoc_up_thunk_GpuResource_vblcbControl; - pThis->__vblcbCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_vblcbCheckMemInterUnmap; + // vblcbMap -- virtual inherited (gpures) base (gpures) + pThis->__vblcbMap__ = &__nvoc_up_thunk_GpuResource_vblcbMap; - pThis->__vblcbMapTo__ = &__nvoc_thunk_RsResource_vblcbMapTo; + // vblcbUnmap -- virtual inherited (gpures) base (gpures) + pThis->__vblcbUnmap__ = &__nvoc_up_thunk_GpuResource_vblcbUnmap; - pThis->__vblcbGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_vblcbGetMapAddrSpace; + // vblcbShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__vblcbShareCallback__ = &__nvoc_up_thunk_GpuResource_vblcbShareCallback; - pThis->__vblcbGetRefCount__ = &__nvoc_thunk_RsResource_vblcbGetRefCount; + // vblcbGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__vblcbGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_vblcbGetRegBaseOffsetAndSize; - pThis->__vblcbAddAdditionalDependants__ = &__nvoc_thunk_RsResource_vblcbAddAdditionalDependants; + // vblcbGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__vblcbGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_vblcbGetMapAddrSpace; - pThis->__vblcbControl_Prologue__ = &__nvoc_thunk_RmResource_vblcbControl_Prologue; + // vblcbInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__vblcbInternalControlForward__ = &__nvoc_up_thunk_GpuResource_vblcbInternalControlForward; - pThis->__vblcbGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_vblcbGetRegBaseOffsetAndSize; + // vblcbGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__vblcbGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_vblcbGetInternalObjectHandle; - pThis->__vblcbInternalControlForward__ = &__nvoc_thunk_GpuResource_vblcbInternalControlForward; + // vblcbAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__vblcbAccessCallback__ = &__nvoc_up_thunk_RmResource_vblcbAccessCallback; - pThis->__vblcbUnmapFrom__ = &__nvoc_thunk_RsResource_vblcbUnmapFrom; + // vblcbGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__vblcbGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_vblcbGetMemInterMapParams; - pThis->__vblcbControl_Epilogue__ = &__nvoc_thunk_RmResource_vblcbControl_Epilogue; + // vblcbCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__vblcbCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_vblcbCheckMemInterUnmap; - pThis->__vblcbGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_vblcbGetInternalObjectHandle; + // vblcbGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__vblcbGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_vblcbGetMemoryMappingDescriptor; - pThis->__vblcbControl__ = &__nvoc_thunk_GpuResource_vblcbControl; + // vblcbControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__vblcbControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vblcbControlSerialization_Prologue; - pThis->__vblcbUnmap__ = &__nvoc_thunk_GpuResource_vblcbUnmap; + // vblcbControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__vblcbControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vblcbControlSerialization_Epilogue; - pThis->__vblcbGetMemInterMapParams__ = &__nvoc_thunk_RmResource_vblcbGetMemInterMapParams; + // vblcbControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__vblcbControl_Prologue__ = &__nvoc_up_thunk_RmResource_vblcbControl_Prologue; - pThis->__vblcbGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_vblcbGetMemoryMappingDescriptor; + // vblcbControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__vblcbControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vblcbControl_Epilogue; - pThis->__vblcbControlFilter__ = &__nvoc_thunk_RsResource_vblcbControlFilter; + // vblcbCanCopy -- virtual inherited (res) base (gpures) + pThis->__vblcbCanCopy__ = &__nvoc_up_thunk_RsResource_vblcbCanCopy; - pThis->__vblcbControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_vblcbControlSerialization_Prologue; + // vblcbIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__vblcbIsDuplicate__ = &__nvoc_up_thunk_RsResource_vblcbIsDuplicate; - pThis->__vblcbCanCopy__ = &__nvoc_thunk_RsResource_vblcbCanCopy; + // vblcbPreDestruct -- virtual inherited (res) base (gpures) + pThis->__vblcbPreDestruct__ = &__nvoc_up_thunk_RsResource_vblcbPreDestruct; - pThis->__vblcbIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_vblcbIsPartialUnmapSupported; + // vblcbControlFilter -- virtual inherited (res) base (gpures) + pThis->__vblcbControlFilter__ = &__nvoc_up_thunk_RsResource_vblcbControlFilter; - pThis->__vblcbPreDestruct__ = &__nvoc_thunk_RsResource_vblcbPreDestruct; + // vblcbIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__vblcbIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_vblcbIsPartialUnmapSupported; - pThis->__vblcbIsDuplicate__ = &__nvoc_thunk_RsResource_vblcbIsDuplicate; + // vblcbMapTo -- virtual inherited (res) base (gpures) + pThis->__vblcbMapTo__ = &__nvoc_up_thunk_RsResource_vblcbMapTo; - pThis->__vblcbControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_vblcbControlSerialization_Epilogue; + // vblcbUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__vblcbUnmapFrom__ = &__nvoc_up_thunk_RsResource_vblcbUnmapFrom; - pThis->__vblcbMap__ = &__nvoc_thunk_GpuResource_vblcbMap; + // vblcbGetRefCount -- virtual inherited (res) base (gpures) + pThis->__vblcbGetRefCount__ = &__nvoc_up_thunk_RsResource_vblcbGetRefCount; + + // vblcbAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__vblcbAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vblcbAddAdditionalDependants; +} // End __nvoc_init_funcTable_VblankCallback_1 with approximately 26 basic block(s). - pThis->__vblcbAccessCallback__ = &__nvoc_thunk_RmResource_vblcbAccessCallback; -} +// Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_VblankCallback(VblankCallback *pThis) { + + // Initialize vtable(s) with 26 per-object function pointer(s). __nvoc_init_funcTable_VblankCallback_1(pThis); } diff --git a/src/nvidia/generated/g_vblank_callback_nvoc.h b/src/nvidia/generated/g_vblank_callback_nvoc.h index fb7290c072..597c116e4f 100644 --- a/src/nvidia/generated/g_vblank_callback_nvoc.h +++ b/src/nvidia/generated/g_vblank_callback_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_VBLANK_CALLBACK_NVOC_H_ #define _G_VBLANK_CALLBACK_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -36,6 +43,7 @@ extern "C" { * ******************************************************************************/ +#pragma once #include "g_vblank_callback_nvoc.h" #ifndef VBLANK_CALLBACK_H @@ -58,41 +66,52 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct VblankCallback { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct VblankCallback *__nvoc_pbase_VblankCallback; - NV_STATUS (*__vblcbCtrlSetVBlankNotification__)(struct VblankCallback *, NV9010_CTRL_CMD_SET_VBLANK_NOTIFICATION_PARAMS *); - NvBool (*__vblcbShareCallback__)(struct VblankCallback *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__vblcbCheckMemInterUnmap__)(struct VblankCallback *, NvBool); - NV_STATUS (*__vblcbMapTo__)(struct VblankCallback *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__vblcbGetMapAddrSpace__)(struct VblankCallback *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__vblcbGetRefCount__)(struct VblankCallback *); - void (*__vblcbAddAdditionalDependants__)(struct RsClient *, struct VblankCallback *, RsResourceRef *); - NV_STATUS (*__vblcbControl_Prologue__)(struct VblankCallback *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vblcbGetRegBaseOffsetAndSize__)(struct VblankCallback *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__vblcbInternalControlForward__)(struct VblankCallback *, NvU32, void *, NvU32); - NV_STATUS (*__vblcbUnmapFrom__)(struct VblankCallback *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__vblcbControl_Epilogue__)(struct VblankCallback *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__vblcbGetInternalObjectHandle__)(struct VblankCallback *); - NV_STATUS (*__vblcbControl__)(struct VblankCallback *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vblcbUnmap__)(struct VblankCallback *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__vblcbGetMemInterMapParams__)(struct VblankCallback *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__vblcbGetMemoryMappingDescriptor__)(struct VblankCallback *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__vblcbControlFilter__)(struct VblankCallback *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vblcbControlSerialization_Prologue__)(struct VblankCallback *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__vblcbCanCopy__)(struct VblankCallback *); - NvBool (*__vblcbIsPartialUnmapSupported__)(struct VblankCallback *); - void (*__vblcbPreDestruct__)(struct VblankCallback *); - NV_STATUS (*__vblcbIsDuplicate__)(struct VblankCallback *, NvHandle, NvBool *); - void (*__vblcbControlSerialization_Epilogue__)(struct VblankCallback *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vblcbMap__)(struct VblankCallback *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__vblcbAccessCallback__)(struct VblankCallback *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct VblankCallback *__nvoc_pbase_VblankCallback; // vblcb + + // Vtable with 26 per-object function pointers + NV_STATUS (*__vblcbCtrlSetVBlankNotification__)(struct VblankCallback * /*this*/, NV9010_CTRL_CMD_SET_VBLANK_NOTIFICATION_PARAMS *); // exported (id=0x90100101) + NV_STATUS (*__vblcbControl__)(struct VblankCallback * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vblcbMap__)(struct VblankCallback * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vblcbUnmap__)(struct VblankCallback * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__vblcbShareCallback__)(struct VblankCallback * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vblcbGetRegBaseOffsetAndSize__)(struct VblankCallback * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vblcbGetMapAddrSpace__)(struct VblankCallback * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vblcbInternalControlForward__)(struct VblankCallback * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__vblcbGetInternalObjectHandle__)(struct VblankCallback * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__vblcbAccessCallback__)(struct VblankCallback * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vblcbGetMemInterMapParams__)(struct VblankCallback * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vblcbCheckMemInterUnmap__)(struct VblankCallback * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vblcbGetMemoryMappingDescriptor__)(struct VblankCallback * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vblcbControlSerialization_Prologue__)(struct VblankCallback * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__vblcbControlSerialization_Epilogue__)(struct VblankCallback * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vblcbControl_Prologue__)(struct VblankCallback * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__vblcbControl_Epilogue__)(struct VblankCallback * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__vblcbCanCopy__)(struct VblankCallback * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__vblcbIsDuplicate__)(struct VblankCallback * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__vblcbPreDestruct__)(struct VblankCallback * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__vblcbControlFilter__)(struct VblankCallback * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__vblcbIsPartialUnmapSupported__)(struct VblankCallback * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__vblcbMapTo__)(struct VblankCallback * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__vblcbUnmapFrom__)(struct VblankCallback * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__vblcbGetRefCount__)(struct VblankCallback * /*this*/); // virtual inherited (res) base (gpures) + void (*__vblcbAddAdditionalDependants__)(struct RsClient *, struct VblankCallback * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members VBLANKCALLBACK CallBack; OSVBLANKCALLBACKPROC pProc; NvP64 pParm1; @@ -109,6 +128,7 @@ typedef struct VblankCallback VblankCallback; #define __nvoc_class_id_VblankCallback 0x4c1997 #endif /* __nvoc_class_id_VblankCallback */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_VblankCallback; #define __staticCast_VblankCallback(pThis) \ @@ -121,145 +141,174 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_VblankCallback; ((VblankCallback*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(VblankCallback))) #endif //__nvoc_vblank_callback_h_disabled - NV_STATUS __nvoc_objCreateDynamic_VblankCallback(VblankCallback**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_VblankCallback(VblankCallback**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_VblankCallback(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_VblankCallback((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define vblcbCtrlSetVBlankNotification_FNPTR(pVblankCallback) pVblankCallback->__vblcbCtrlSetVBlankNotification__ #define vblcbCtrlSetVBlankNotification(pVblankCallback, pParams) vblcbCtrlSetVBlankNotification_DISPATCH(pVblankCallback, pParams) +#define vblcbControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define vblcbControl(pGpuResource, pCallContext, pParams) vblcbControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define vblcbMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define vblcbMap(pGpuResource, pCallContext, pParams, pCpuMapping) vblcbMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define vblcbUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define vblcbUnmap(pGpuResource, pCallContext, pCpuMapping) vblcbUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define vblcbShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define vblcbShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) vblcbShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define vblcbCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) vblcbCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define vblcbMapTo(pResource, pParams) vblcbMapTo_DISPATCH(pResource, pParams) -#define vblcbGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) vblcbGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define vblcbGetRefCount(pResource) vblcbGetRefCount_DISPATCH(pResource) -#define vblcbAddAdditionalDependants(pClient, pResource, pReference) vblcbAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define vblcbControl_Prologue(pResource, pCallContext, pParams) vblcbControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define vblcbGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define vblcbGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) vblcbGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define vblcbGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define vblcbGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) vblcbGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define vblcbInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define vblcbInternalControlForward(pGpuResource, command, pParams, size) vblcbInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define vblcbUnmapFrom(pResource, pParams) vblcbUnmapFrom_DISPATCH(pResource, pParams) -#define vblcbControl_Epilogue(pResource, pCallContext, pParams) vblcbControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vblcbGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define vblcbGetInternalObjectHandle(pGpuResource) vblcbGetInternalObjectHandle_DISPATCH(pGpuResource) -#define vblcbControl(pGpuResource, pCallContext, pParams) vblcbControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define vblcbUnmap(pGpuResource, pCallContext, pCpuMapping) vblcbUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define vblcbAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define vblcbAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) vblcbAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define vblcbGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define vblcbGetMemInterMapParams(pRmResource, pParams) vblcbGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define vblcbCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define vblcbCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) vblcbCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define vblcbGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define vblcbGetMemoryMappingDescriptor(pRmResource, ppMemDesc) vblcbGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define vblcbControlFilter(pResource, pCallContext, pParams) vblcbControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define vblcbControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define vblcbControlSerialization_Prologue(pResource, pCallContext, pParams) vblcbControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define vblcbControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define vblcbControlSerialization_Epilogue(pResource, pCallContext, pParams) vblcbControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vblcbControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define vblcbControl_Prologue(pResource, pCallContext, pParams) vblcbControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define vblcbControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define vblcbControl_Epilogue(pResource, pCallContext, pParams) vblcbControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vblcbCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define vblcbCanCopy(pResource) vblcbCanCopy_DISPATCH(pResource) -#define vblcbIsPartialUnmapSupported(pResource) vblcbIsPartialUnmapSupported_DISPATCH(pResource) -#define vblcbPreDestruct(pResource) vblcbPreDestruct_DISPATCH(pResource) +#define vblcbIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define vblcbIsDuplicate(pResource, hMemory, pDuplicate) vblcbIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define vblcbControlSerialization_Epilogue(pResource, pCallContext, pParams) vblcbControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define vblcbMap(pGpuResource, pCallContext, pParams, pCpuMapping) vblcbMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define vblcbAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) vblcbAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS vblcbCtrlSetVBlankNotification_IMPL(struct VblankCallback *pVblankCallback, NV9010_CTRL_CMD_SET_VBLANK_NOTIFICATION_PARAMS *pParams); +#define vblcbPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define vblcbPreDestruct(pResource) vblcbPreDestruct_DISPATCH(pResource) +#define vblcbControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define vblcbControlFilter(pResource, pCallContext, pParams) vblcbControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define vblcbIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define vblcbIsPartialUnmapSupported(pResource) vblcbIsPartialUnmapSupported_DISPATCH(pResource) +#define vblcbMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define vblcbMapTo(pResource, pParams) vblcbMapTo_DISPATCH(pResource, pParams) +#define vblcbUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define vblcbUnmapFrom(pResource, pParams) vblcbUnmapFrom_DISPATCH(pResource, pParams) +#define vblcbGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define vblcbGetRefCount(pResource) vblcbGetRefCount_DISPATCH(pResource) +#define vblcbAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define vblcbAddAdditionalDependants(pClient, pResource, pReference) vblcbAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS vblcbCtrlSetVBlankNotification_DISPATCH(struct VblankCallback *pVblankCallback, NV9010_CTRL_CMD_SET_VBLANK_NOTIFICATION_PARAMS *pParams) { return pVblankCallback->__vblcbCtrlSetVBlankNotification__(pVblankCallback, pParams); } -static inline NvBool vblcbShareCallback_DISPATCH(struct VblankCallback *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__vblcbShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS vblcbCheckMemInterUnmap_DISPATCH(struct VblankCallback *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__vblcbCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); -} - -static inline NV_STATUS vblcbMapTo_DISPATCH(struct VblankCallback *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__vblcbMapTo__(pResource, pParams); -} - -static inline NV_STATUS vblcbGetMapAddrSpace_DISPATCH(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__vblcbGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +static inline NV_STATUS vblcbControl_DISPATCH(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__vblcbControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 vblcbGetRefCount_DISPATCH(struct VblankCallback *pResource) { - return pResource->__vblcbGetRefCount__(pResource); +static inline NV_STATUS vblcbMap_DISPATCH(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__vblcbMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void vblcbAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VblankCallback *pResource, RsResourceRef *pReference) { - pResource->__vblcbAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS vblcbUnmap_DISPATCH(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__vblcbUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS vblcbControl_Prologue_DISPATCH(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vblcbControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool vblcbShareCallback_DISPATCH(struct VblankCallback *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__vblcbShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS vblcbGetRegBaseOffsetAndSize_DISPATCH(struct VblankCallback *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__vblcbGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS vblcbInternalControlForward_DISPATCH(struct VblankCallback *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__vblcbInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS vblcbUnmapFrom_DISPATCH(struct VblankCallback *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__vblcbUnmapFrom__(pResource, pParams); +static inline NV_STATUS vblcbGetMapAddrSpace_DISPATCH(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__vblcbGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void vblcbControl_Epilogue_DISPATCH(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vblcbControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS vblcbInternalControlForward_DISPATCH(struct VblankCallback *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__vblcbInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle vblcbGetInternalObjectHandle_DISPATCH(struct VblankCallback *pGpuResource) { return pGpuResource->__vblcbGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS vblcbControl_DISPATCH(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__vblcbControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS vblcbUnmap_DISPATCH(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__vblcbUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool vblcbAccessCallback_DISPATCH(struct VblankCallback *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__vblcbAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS vblcbGetMemInterMapParams_DISPATCH(struct VblankCallback *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__vblcbGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS vblcbGetMemoryMappingDescriptor_DISPATCH(struct VblankCallback *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__vblcbGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS vblcbCheckMemInterUnmap_DISPATCH(struct VblankCallback *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__vblcbCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS vblcbControlFilter_DISPATCH(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vblcbControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS vblcbGetMemoryMappingDescriptor_DISPATCH(struct VblankCallback *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__vblcbGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS vblcbControlSerialization_Prologue_DISPATCH(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__vblcbControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void vblcbControlSerialization_Epilogue_DISPATCH(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__vblcbControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS vblcbControl_Prologue_DISPATCH(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__vblcbControl_Prologue__(pResource, pCallContext, pParams); +} + +static inline void vblcbControl_Epilogue_DISPATCH(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__vblcbControl_Epilogue__(pResource, pCallContext, pParams); +} + static inline NvBool vblcbCanCopy_DISPATCH(struct VblankCallback *pResource) { return pResource->__vblcbCanCopy__(pResource); } -static inline NvBool vblcbIsPartialUnmapSupported_DISPATCH(struct VblankCallback *pResource) { - return pResource->__vblcbIsPartialUnmapSupported__(pResource); +static inline NV_STATUS vblcbIsDuplicate_DISPATCH(struct VblankCallback *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__vblcbIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void vblcbPreDestruct_DISPATCH(struct VblankCallback *pResource) { pResource->__vblcbPreDestruct__(pResource); } -static inline NV_STATUS vblcbIsDuplicate_DISPATCH(struct VblankCallback *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__vblcbIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS vblcbControlFilter_DISPATCH(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__vblcbControlFilter__(pResource, pCallContext, pParams); } -static inline void vblcbControlSerialization_Epilogue_DISPATCH(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vblcbControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool vblcbIsPartialUnmapSupported_DISPATCH(struct VblankCallback *pResource) { + return pResource->__vblcbIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS vblcbMap_DISPATCH(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__vblcbMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS vblcbMapTo_DISPATCH(struct VblankCallback *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__vblcbMapTo__(pResource, pParams); } -static inline NvBool vblcbAccessCallback_DISPATCH(struct VblankCallback *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__vblcbAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS vblcbUnmapFrom_DISPATCH(struct VblankCallback *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__vblcbUnmapFrom__(pResource, pParams); } +static inline NvU32 vblcbGetRefCount_DISPATCH(struct VblankCallback *pResource) { + return pResource->__vblcbGetRefCount__(pResource); +} + +static inline void vblcbAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VblankCallback *pResource, RsResourceRef *pReference) { + pResource->__vblcbAddAdditionalDependants__(pClient, pResource, pReference); +} + +NV_STATUS vblcbCtrlSetVBlankNotification_IMPL(struct VblankCallback *pVblankCallback, NV9010_CTRL_CMD_SET_VBLANK_NOTIFICATION_PARAMS *pParams); + NV_STATUS vblcbConstruct_IMPL(struct VblankCallback *arg_pVblankCallback, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_vblcbConstruct(arg_pVblankCallback, arg_pCallContext, arg_pParams) vblcbConstruct_IMPL(arg_pVblankCallback, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_vgpuapi_nvoc.c b/src/nvidia/generated/g_vgpuapi_nvoc.c index 499e944d6e..c2e22e3b91 100644 --- a/src/nvidia/generated/g_vgpuapi_nvoc.c +++ b/src/nvidia/generated/g_vgpuapi_nvoc.c @@ -93,159 +93,187 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_VgpuApi = /*pExportInfo=*/ &__nvoc_export_info_VgpuApi }; -static NvBool __nvoc_thunk_GpuResource_vgpuapiShareCallback(struct VgpuApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NV_STATUS __nvoc_thunk_RmResource_vgpuapiCheckMemInterUnmap(struct VgpuApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_VgpuApi_RmResource.offset), bSubdeviceHandleProvided); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuApi[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0xa0800103u, + /*paramSize=*/ sizeof(NVA080_CTRL_VGPU_DISPLAY_SET_SURFACE_PROPERTIES), + /*pClassInfo=*/ &(__nvoc_class_def_VgpuApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties" +#endif + }, + { /* [1] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) vgpuapiCtrlCmdVgpuDisplayCleanupSurface_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0xa0800104u, + /*paramSize=*/ sizeof(NVA080_CTRL_VGPU_DISPLAY_CLEANUP_SURFACE_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_VgpuApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "vgpuapiCtrlCmdVgpuDisplayCleanupSurface" +#endif + }, + { /* [2] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) vgpuapiCtrlCmdVGpuGetConfig_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0xa0800301u, + /*paramSize=*/ sizeof(NVA080_CTRL_VGPU_GET_CONFIG_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_VgpuApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "vgpuapiCtrlCmdVGpuGetConfig" +#endif + }, + +}; -static NV_STATUS __nvoc_thunk_RsResource_vgpuapiMapTo(struct VgpuApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuApi_RsResource.offset), pParams); +// 25 up-thunk(s) defined to bridge methods in VgpuApi to superclasses + +// vgpuapiControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiControl(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_vgpuapiGetMapAddrSpace(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// vgpuapiMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiMap(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_vgpuapiGetRefCount(struct VgpuApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuApi_RsResource.offset)); +// vgpuapiUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiUnmap(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_RsResource_vgpuapiAddAdditionalDependants(struct RsClient *pClient, struct VgpuApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuApi_RsResource.offset), pReference); +// vgpuapiShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_vgpuapiShareCallback(struct VgpuApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_RmResource_vgpuapiControl_Prologue(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuApi_RmResource.offset), pCallContext, pParams); +// vgpuapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiGetRegBaseOffsetAndSize(struct VgpuApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), pGpu, pOffset, pSize); } -static NV_STATUS __nvoc_thunk_GpuResource_vgpuapiGetRegBaseOffsetAndSize(struct VgpuApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), pGpu, pOffset, pSize); +// vgpuapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiGetMapAddrSpace(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_GpuResource_vgpuapiInternalControlForward(struct VgpuApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), command, pParams, size); +// vgpuapiInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiInternalControlForward(struct VgpuApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_RsResource_vgpuapiUnmapFrom(struct VgpuApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuApi_RsResource.offset), pParams); +// vgpuapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_vgpuapiGetInternalObjectHandle(struct VgpuApi *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset)); } -static void __nvoc_thunk_RmResource_vgpuapiControl_Epilogue(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuApi_RmResource.offset), pCallContext, pParams); +// vgpuapiAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_vgpuapiAccessCallback(struct VgpuApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NvHandle __nvoc_thunk_GpuResource_vgpuapiGetInternalObjectHandle(struct VgpuApi *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset)); +// vgpuapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vgpuapiGetMemInterMapParams(struct VgpuApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VgpuApi_RmResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_vgpuapiControl(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), pCallContext, pParams); +// vgpuapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vgpuapiCheckMemInterUnmap(struct VgpuApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VgpuApi_RmResource.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_GpuResource_vgpuapiUnmap(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), pCallContext, pCpuMapping); +// vgpuapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vgpuapiGetMemoryMappingDescriptor(struct VgpuApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VgpuApi_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_RmResource_vgpuapiGetMemInterMapParams(struct VgpuApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_VgpuApi_RmResource.offset), pParams); +// vgpuapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vgpuapiControlSerialization_Prologue(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_vgpuapiGetMemoryMappingDescriptor(struct VgpuApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_VgpuApi_RmResource.offset), ppMemDesc); +// vgpuapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_vgpuapiControlSerialization_Epilogue(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_vgpuapiControlFilter(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuApi_RsResource.offset), pCallContext, pParams); +// vgpuapiControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vgpuapiControl_Prologue(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_vgpuapiControlSerialization_Prologue(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuApi_RmResource.offset), pCallContext, pParams); +// vgpuapiControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_vgpuapiControl_Epilogue(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_vgpuapiCanCopy(struct VgpuApi *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuApi_RsResource.offset)); +// vgpuapiCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_vgpuapiCanCopy(struct VgpuApi *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_vgpuapiIsPartialUnmapSupported(struct VgpuApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuApi_RsResource.offset)); +// vgpuapiIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_vgpuapiIsDuplicate(struct VgpuApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RsResource.offset), hMemory, pDuplicate); } -static void __nvoc_thunk_RsResource_vgpuapiPreDestruct(struct VgpuApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuApi_RsResource.offset)); +// vgpuapiPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_vgpuapiPreDestruct(struct VgpuApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_vgpuapiIsDuplicate(struct VgpuApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuApi_RsResource.offset), hMemory, pDuplicate); +// vgpuapiControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_vgpuapiControlFilter(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RmResource_vgpuapiControlSerialization_Epilogue(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuApi_RmResource.offset), pCallContext, pParams); +// vgpuapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_vgpuapiIsPartialUnmapSupported(struct VgpuApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_vgpuapiMap(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// vgpuapiMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_vgpuapiMapTo(struct VgpuApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_RmResource_vgpuapiAccessCallback(struct VgpuApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// vgpuapiUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_vgpuapiUnmapFrom(struct VgpuApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RsResource.offset), pParams); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// vgpuapiGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_vgpuapiGetRefCount(struct VgpuApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RsResource.offset)); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuApi[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xa0800103u, - /*paramSize=*/ sizeof(NVA080_CTRL_VGPU_DISPLAY_SET_SURFACE_PROPERTIES), - /*pClassInfo=*/ &(__nvoc_class_def_VgpuApi.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties" -#endif - }, - { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) vgpuapiCtrlCmdVgpuDisplayCleanupSurface_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xa0800104u, - /*paramSize=*/ sizeof(NVA080_CTRL_VGPU_DISPLAY_CLEANUP_SURFACE_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_VgpuApi.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "vgpuapiCtrlCmdVgpuDisplayCleanupSurface" -#endif - }, - { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) vgpuapiCtrlCmdVGpuGetConfig_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xa0800301u, - /*paramSize=*/ sizeof(NVA080_CTRL_VGPU_GET_CONFIG_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_VgpuApi.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "vgpuapiCtrlCmdVGpuGetConfig" -#endif - }, +// vgpuapiAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_vgpuapiAddAdditionalDependants(struct RsClient *pClient, struct VgpuApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RsResource.offset), pReference); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_VgpuApi = { @@ -283,73 +311,106 @@ NV_STATUS __nvoc_ctor_VgpuApi(VgpuApi *pThis, struct CALL_CONTEXT * arg_pCallCon return status; } +// Vtable initialization static void __nvoc_init_funcTable_VgpuApi_1(VgpuApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties -- exported (id=0xa0800103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties__ = &vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuapiCtrlCmdVgpuDisplayCleanupSurface -- exported (id=0xa0800104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuapiCtrlCmdVgpuDisplayCleanupSurface__ = &vgpuapiCtrlCmdVgpuDisplayCleanupSurface_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuapiCtrlCmdVGpuGetConfig -- exported (id=0xa0800301) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuapiCtrlCmdVGpuGetConfig__ = &vgpuapiCtrlCmdVGpuGetConfig_IMPL; #endif - pThis->__vgpuapiShareCallback__ = &__nvoc_thunk_GpuResource_vgpuapiShareCallback; + // vgpuapiControl -- virtual inherited (gpures) base (gpures) + pThis->__vgpuapiControl__ = &__nvoc_up_thunk_GpuResource_vgpuapiControl; - pThis->__vgpuapiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_vgpuapiCheckMemInterUnmap; + // vgpuapiMap -- virtual inherited (gpures) base (gpures) + pThis->__vgpuapiMap__ = &__nvoc_up_thunk_GpuResource_vgpuapiMap; - pThis->__vgpuapiMapTo__ = &__nvoc_thunk_RsResource_vgpuapiMapTo; + // vgpuapiUnmap -- virtual inherited (gpures) base (gpures) + pThis->__vgpuapiUnmap__ = &__nvoc_up_thunk_GpuResource_vgpuapiUnmap; - pThis->__vgpuapiGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_vgpuapiGetMapAddrSpace; + // vgpuapiShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__vgpuapiShareCallback__ = &__nvoc_up_thunk_GpuResource_vgpuapiShareCallback; - pThis->__vgpuapiGetRefCount__ = &__nvoc_thunk_RsResource_vgpuapiGetRefCount; + // vgpuapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__vgpuapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_vgpuapiGetRegBaseOffsetAndSize; - pThis->__vgpuapiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_vgpuapiAddAdditionalDependants; + // vgpuapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__vgpuapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_vgpuapiGetMapAddrSpace; - pThis->__vgpuapiControl_Prologue__ = &__nvoc_thunk_RmResource_vgpuapiControl_Prologue; + // vgpuapiInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__vgpuapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_vgpuapiInternalControlForward; - pThis->__vgpuapiGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_vgpuapiGetRegBaseOffsetAndSize; + // vgpuapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__vgpuapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_vgpuapiGetInternalObjectHandle; - pThis->__vgpuapiInternalControlForward__ = &__nvoc_thunk_GpuResource_vgpuapiInternalControlForward; + // vgpuapiAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__vgpuapiAccessCallback__ = &__nvoc_up_thunk_RmResource_vgpuapiAccessCallback; - pThis->__vgpuapiUnmapFrom__ = &__nvoc_thunk_RsResource_vgpuapiUnmapFrom; + // vgpuapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__vgpuapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_vgpuapiGetMemInterMapParams; - pThis->__vgpuapiControl_Epilogue__ = &__nvoc_thunk_RmResource_vgpuapiControl_Epilogue; + // vgpuapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__vgpuapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_vgpuapiCheckMemInterUnmap; - pThis->__vgpuapiGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_vgpuapiGetInternalObjectHandle; + // vgpuapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__vgpuapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_vgpuapiGetMemoryMappingDescriptor; - pThis->__vgpuapiControl__ = &__nvoc_thunk_GpuResource_vgpuapiControl; + // vgpuapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__vgpuapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vgpuapiControlSerialization_Prologue; - pThis->__vgpuapiUnmap__ = &__nvoc_thunk_GpuResource_vgpuapiUnmap; + // vgpuapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__vgpuapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vgpuapiControlSerialization_Epilogue; - pThis->__vgpuapiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_vgpuapiGetMemInterMapParams; + // vgpuapiControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__vgpuapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_vgpuapiControl_Prologue; - pThis->__vgpuapiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_vgpuapiGetMemoryMappingDescriptor; + // vgpuapiControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__vgpuapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vgpuapiControl_Epilogue; - pThis->__vgpuapiControlFilter__ = &__nvoc_thunk_RsResource_vgpuapiControlFilter; + // vgpuapiCanCopy -- virtual inherited (res) base (gpures) + pThis->__vgpuapiCanCopy__ = &__nvoc_up_thunk_RsResource_vgpuapiCanCopy; - pThis->__vgpuapiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_vgpuapiControlSerialization_Prologue; + // vgpuapiIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__vgpuapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_vgpuapiIsDuplicate; - pThis->__vgpuapiCanCopy__ = &__nvoc_thunk_RsResource_vgpuapiCanCopy; + // vgpuapiPreDestruct -- virtual inherited (res) base (gpures) + pThis->__vgpuapiPreDestruct__ = &__nvoc_up_thunk_RsResource_vgpuapiPreDestruct; - pThis->__vgpuapiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_vgpuapiIsPartialUnmapSupported; + // vgpuapiControlFilter -- virtual inherited (res) base (gpures) + pThis->__vgpuapiControlFilter__ = &__nvoc_up_thunk_RsResource_vgpuapiControlFilter; - pThis->__vgpuapiPreDestruct__ = &__nvoc_thunk_RsResource_vgpuapiPreDestruct; + // vgpuapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__vgpuapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_vgpuapiIsPartialUnmapSupported; - pThis->__vgpuapiIsDuplicate__ = &__nvoc_thunk_RsResource_vgpuapiIsDuplicate; + // vgpuapiMapTo -- virtual inherited (res) base (gpures) + pThis->__vgpuapiMapTo__ = &__nvoc_up_thunk_RsResource_vgpuapiMapTo; - pThis->__vgpuapiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_vgpuapiControlSerialization_Epilogue; + // vgpuapiUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__vgpuapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_vgpuapiUnmapFrom; - pThis->__vgpuapiMap__ = &__nvoc_thunk_GpuResource_vgpuapiMap; + // vgpuapiGetRefCount -- virtual inherited (res) base (gpures) + pThis->__vgpuapiGetRefCount__ = &__nvoc_up_thunk_RsResource_vgpuapiGetRefCount; - pThis->__vgpuapiAccessCallback__ = &__nvoc_thunk_RmResource_vgpuapiAccessCallback; -} + // vgpuapiAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__vgpuapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vgpuapiAddAdditionalDependants; +} // End __nvoc_init_funcTable_VgpuApi_1 with approximately 28 basic block(s). + +// Initialize vtable(s) for 28 virtual method(s). void __nvoc_init_funcTable_VgpuApi(VgpuApi *pThis) { + + // Initialize vtable(s) with 28 per-object function pointer(s). __nvoc_init_funcTable_VgpuApi_1(pThis); } diff --git a/src/nvidia/generated/g_vgpuapi_nvoc.h b/src/nvidia/generated/g_vgpuapi_nvoc.h index 97bc3e8b56..99fb8b7901 100644 --- a/src/nvidia/generated/g_vgpuapi_nvoc.h +++ b/src/nvidia/generated/g_vgpuapi_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_VGPUAPI_NVOC_H_ #define _G_VGPUAPI_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_vgpuapi_nvoc.h" #ifndef _VGPUAPI_H_ @@ -50,43 +58,54 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct VgpuApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct VgpuApi *__nvoc_pbase_VgpuApi; - NV_STATUS (*__vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties__)(struct VgpuApi *, NVA080_CTRL_VGPU_DISPLAY_SET_SURFACE_PROPERTIES *); - NV_STATUS (*__vgpuapiCtrlCmdVgpuDisplayCleanupSurface__)(struct VgpuApi *, NVA080_CTRL_VGPU_DISPLAY_CLEANUP_SURFACE_PARAMS *); - NV_STATUS (*__vgpuapiCtrlCmdVGpuGetConfig__)(struct VgpuApi *, NVA080_CTRL_VGPU_GET_CONFIG_PARAMS *); - NvBool (*__vgpuapiShareCallback__)(struct VgpuApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__vgpuapiCheckMemInterUnmap__)(struct VgpuApi *, NvBool); - NV_STATUS (*__vgpuapiMapTo__)(struct VgpuApi *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__vgpuapiGetMapAddrSpace__)(struct VgpuApi *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__vgpuapiGetRefCount__)(struct VgpuApi *); - void (*__vgpuapiAddAdditionalDependants__)(struct RsClient *, struct VgpuApi *, RsResourceRef *); - NV_STATUS (*__vgpuapiControl_Prologue__)(struct VgpuApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vgpuapiGetRegBaseOffsetAndSize__)(struct VgpuApi *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__vgpuapiInternalControlForward__)(struct VgpuApi *, NvU32, void *, NvU32); - NV_STATUS (*__vgpuapiUnmapFrom__)(struct VgpuApi *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__vgpuapiControl_Epilogue__)(struct VgpuApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__vgpuapiGetInternalObjectHandle__)(struct VgpuApi *); - NV_STATUS (*__vgpuapiControl__)(struct VgpuApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vgpuapiUnmap__)(struct VgpuApi *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__vgpuapiGetMemInterMapParams__)(struct VgpuApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__vgpuapiGetMemoryMappingDescriptor__)(struct VgpuApi *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__vgpuapiControlFilter__)(struct VgpuApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vgpuapiControlSerialization_Prologue__)(struct VgpuApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__vgpuapiCanCopy__)(struct VgpuApi *); - NvBool (*__vgpuapiIsPartialUnmapSupported__)(struct VgpuApi *); - void (*__vgpuapiPreDestruct__)(struct VgpuApi *); - NV_STATUS (*__vgpuapiIsDuplicate__)(struct VgpuApi *, NvHandle, NvBool *); - void (*__vgpuapiControlSerialization_Epilogue__)(struct VgpuApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vgpuapiMap__)(struct VgpuApi *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__vgpuapiAccessCallback__)(struct VgpuApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct VgpuApi *__nvoc_pbase_VgpuApi; // vgpuapi + + // Vtable with 28 per-object function pointers + NV_STATUS (*__vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties__)(struct VgpuApi * /*this*/, NVA080_CTRL_VGPU_DISPLAY_SET_SURFACE_PROPERTIES *); // exported (id=0xa0800103) + NV_STATUS (*__vgpuapiCtrlCmdVgpuDisplayCleanupSurface__)(struct VgpuApi * /*this*/, NVA080_CTRL_VGPU_DISPLAY_CLEANUP_SURFACE_PARAMS *); // exported (id=0xa0800104) + NV_STATUS (*__vgpuapiCtrlCmdVGpuGetConfig__)(struct VgpuApi * /*this*/, NVA080_CTRL_VGPU_GET_CONFIG_PARAMS *); // exported (id=0xa0800301) + NV_STATUS (*__vgpuapiControl__)(struct VgpuApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vgpuapiMap__)(struct VgpuApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vgpuapiUnmap__)(struct VgpuApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__vgpuapiShareCallback__)(struct VgpuApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vgpuapiGetRegBaseOffsetAndSize__)(struct VgpuApi * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vgpuapiGetMapAddrSpace__)(struct VgpuApi * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vgpuapiInternalControlForward__)(struct VgpuApi * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__vgpuapiGetInternalObjectHandle__)(struct VgpuApi * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__vgpuapiAccessCallback__)(struct VgpuApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vgpuapiGetMemInterMapParams__)(struct VgpuApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vgpuapiCheckMemInterUnmap__)(struct VgpuApi * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vgpuapiGetMemoryMappingDescriptor__)(struct VgpuApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vgpuapiControlSerialization_Prologue__)(struct VgpuApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__vgpuapiControlSerialization_Epilogue__)(struct VgpuApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vgpuapiControl_Prologue__)(struct VgpuApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__vgpuapiControl_Epilogue__)(struct VgpuApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__vgpuapiCanCopy__)(struct VgpuApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__vgpuapiIsDuplicate__)(struct VgpuApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__vgpuapiPreDestruct__)(struct VgpuApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__vgpuapiControlFilter__)(struct VgpuApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__vgpuapiIsPartialUnmapSupported__)(struct VgpuApi * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__vgpuapiMapTo__)(struct VgpuApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__vgpuapiUnmapFrom__)(struct VgpuApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__vgpuapiGetRefCount__)(struct VgpuApi * /*this*/); // virtual inherited (res) base (gpures) + void (*__vgpuapiAddAdditionalDependants__)(struct RsClient *, struct VgpuApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members NODE node; NvHandle handle; NvHandle hDevice; @@ -101,6 +120,7 @@ typedef struct VgpuApi VgpuApi; #define __nvoc_class_id_VgpuApi 0x7774f5 #endif /* __nvoc_class_id_VgpuApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_VgpuApi; #define __staticCast_VgpuApi(pThis) \ @@ -113,159 +133,190 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_VgpuApi; ((VgpuApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(VgpuApi))) #endif //__nvoc_vgpuapi_h_disabled - NV_STATUS __nvoc_objCreateDynamic_VgpuApi(VgpuApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_VgpuApi(VgpuApi**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_VgpuApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_VgpuApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties_FNPTR(pVgpuApi) pVgpuApi->__vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties__ #define vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties(pVgpuApi, pParams) vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties_DISPATCH(pVgpuApi, pParams) +#define vgpuapiCtrlCmdVgpuDisplayCleanupSurface_FNPTR(pVgpuApi) pVgpuApi->__vgpuapiCtrlCmdVgpuDisplayCleanupSurface__ #define vgpuapiCtrlCmdVgpuDisplayCleanupSurface(pVgpuApi, pParams) vgpuapiCtrlCmdVgpuDisplayCleanupSurface_DISPATCH(pVgpuApi, pParams) +#define vgpuapiCtrlCmdVGpuGetConfig_FNPTR(pVgpuApi) pVgpuApi->__vgpuapiCtrlCmdVGpuGetConfig__ #define vgpuapiCtrlCmdVGpuGetConfig(pVgpuApi, pParams) vgpuapiCtrlCmdVGpuGetConfig_DISPATCH(pVgpuApi, pParams) +#define vgpuapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define vgpuapiControl(pGpuResource, pCallContext, pParams) vgpuapiControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define vgpuapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define vgpuapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) vgpuapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define vgpuapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define vgpuapiUnmap(pGpuResource, pCallContext, pCpuMapping) vgpuapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define vgpuapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define vgpuapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) vgpuapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define vgpuapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) vgpuapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define vgpuapiMapTo(pResource, pParams) vgpuapiMapTo_DISPATCH(pResource, pParams) -#define vgpuapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) vgpuapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define vgpuapiGetRefCount(pResource) vgpuapiGetRefCount_DISPATCH(pResource) -#define vgpuapiAddAdditionalDependants(pClient, pResource, pReference) vgpuapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define vgpuapiControl_Prologue(pResource, pCallContext, pParams) vgpuapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define vgpuapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define vgpuapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) vgpuapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define vgpuapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define vgpuapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) vgpuapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define vgpuapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define vgpuapiInternalControlForward(pGpuResource, command, pParams, size) vgpuapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define vgpuapiUnmapFrom(pResource, pParams) vgpuapiUnmapFrom_DISPATCH(pResource, pParams) -#define vgpuapiControl_Epilogue(pResource, pCallContext, pParams) vgpuapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vgpuapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define vgpuapiGetInternalObjectHandle(pGpuResource) vgpuapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define vgpuapiControl(pGpuResource, pCallContext, pParams) vgpuapiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define vgpuapiUnmap(pGpuResource, pCallContext, pCpuMapping) vgpuapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define vgpuapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define vgpuapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) vgpuapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define vgpuapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define vgpuapiGetMemInterMapParams(pRmResource, pParams) vgpuapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define vgpuapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define vgpuapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) vgpuapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define vgpuapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define vgpuapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) vgpuapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define vgpuapiControlFilter(pResource, pCallContext, pParams) vgpuapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define vgpuapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define vgpuapiControlSerialization_Prologue(pResource, pCallContext, pParams) vgpuapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define vgpuapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define vgpuapiControlSerialization_Epilogue(pResource, pCallContext, pParams) vgpuapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vgpuapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define vgpuapiControl_Prologue(pResource, pCallContext, pParams) vgpuapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define vgpuapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define vgpuapiControl_Epilogue(pResource, pCallContext, pParams) vgpuapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vgpuapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define vgpuapiCanCopy(pResource) vgpuapiCanCopy_DISPATCH(pResource) -#define vgpuapiIsPartialUnmapSupported(pResource) vgpuapiIsPartialUnmapSupported_DISPATCH(pResource) -#define vgpuapiPreDestruct(pResource) vgpuapiPreDestruct_DISPATCH(pResource) +#define vgpuapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define vgpuapiIsDuplicate(pResource, hMemory, pDuplicate) vgpuapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define vgpuapiControlSerialization_Epilogue(pResource, pCallContext, pParams) vgpuapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define vgpuapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) vgpuapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define vgpuapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) vgpuapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties_IMPL(struct VgpuApi *pVgpuApi, NVA080_CTRL_VGPU_DISPLAY_SET_SURFACE_PROPERTIES *pParams); +#define vgpuapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define vgpuapiPreDestruct(pResource) vgpuapiPreDestruct_DISPATCH(pResource) +#define vgpuapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define vgpuapiControlFilter(pResource, pCallContext, pParams) vgpuapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define vgpuapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define vgpuapiIsPartialUnmapSupported(pResource) vgpuapiIsPartialUnmapSupported_DISPATCH(pResource) +#define vgpuapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define vgpuapiMapTo(pResource, pParams) vgpuapiMapTo_DISPATCH(pResource, pParams) +#define vgpuapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define vgpuapiUnmapFrom(pResource, pParams) vgpuapiUnmapFrom_DISPATCH(pResource, pParams) +#define vgpuapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define vgpuapiGetRefCount(pResource) vgpuapiGetRefCount_DISPATCH(pResource) +#define vgpuapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define vgpuapiAddAdditionalDependants(pClient, pResource, pReference) vgpuapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties_DISPATCH(struct VgpuApi *pVgpuApi, NVA080_CTRL_VGPU_DISPLAY_SET_SURFACE_PROPERTIES *pParams) { return pVgpuApi->__vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties__(pVgpuApi, pParams); } -NV_STATUS vgpuapiCtrlCmdVgpuDisplayCleanupSurface_IMPL(struct VgpuApi *pVgpuApi, NVA080_CTRL_VGPU_DISPLAY_CLEANUP_SURFACE_PARAMS *pParams); - static inline NV_STATUS vgpuapiCtrlCmdVgpuDisplayCleanupSurface_DISPATCH(struct VgpuApi *pVgpuApi, NVA080_CTRL_VGPU_DISPLAY_CLEANUP_SURFACE_PARAMS *pParams) { return pVgpuApi->__vgpuapiCtrlCmdVgpuDisplayCleanupSurface__(pVgpuApi, pParams); } -NV_STATUS vgpuapiCtrlCmdVGpuGetConfig_IMPL(struct VgpuApi *pVgpuApi, NVA080_CTRL_VGPU_GET_CONFIG_PARAMS *pParams); - static inline NV_STATUS vgpuapiCtrlCmdVGpuGetConfig_DISPATCH(struct VgpuApi *pVgpuApi, NVA080_CTRL_VGPU_GET_CONFIG_PARAMS *pParams) { return pVgpuApi->__vgpuapiCtrlCmdVGpuGetConfig__(pVgpuApi, pParams); } -static inline NvBool vgpuapiShareCallback_DISPATCH(struct VgpuApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__vgpuapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); -} - -static inline NV_STATUS vgpuapiCheckMemInterUnmap_DISPATCH(struct VgpuApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__vgpuapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); -} - -static inline NV_STATUS vgpuapiMapTo_DISPATCH(struct VgpuApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__vgpuapiMapTo__(pResource, pParams); -} - -static inline NV_STATUS vgpuapiGetMapAddrSpace_DISPATCH(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__vgpuapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +static inline NV_STATUS vgpuapiControl_DISPATCH(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__vgpuapiControl__(pGpuResource, pCallContext, pParams); } -static inline NvU32 vgpuapiGetRefCount_DISPATCH(struct VgpuApi *pResource) { - return pResource->__vgpuapiGetRefCount__(pResource); +static inline NV_STATUS vgpuapiMap_DISPATCH(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__vgpuapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline void vgpuapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VgpuApi *pResource, RsResourceRef *pReference) { - pResource->__vgpuapiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS vgpuapiUnmap_DISPATCH(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__vgpuapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } -static inline NV_STATUS vgpuapiControl_Prologue_DISPATCH(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vgpuapiControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool vgpuapiShareCallback_DISPATCH(struct VgpuApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__vgpuapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS vgpuapiGetRegBaseOffsetAndSize_DISPATCH(struct VgpuApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return pGpuResource->__vgpuapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS vgpuapiInternalControlForward_DISPATCH(struct VgpuApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__vgpuapiInternalControlForward__(pGpuResource, command, pParams, size); -} - -static inline NV_STATUS vgpuapiUnmapFrom_DISPATCH(struct VgpuApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__vgpuapiUnmapFrom__(pResource, pParams); +static inline NV_STATUS vgpuapiGetMapAddrSpace_DISPATCH(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__vgpuapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void vgpuapiControl_Epilogue_DISPATCH(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vgpuapiControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS vgpuapiInternalControlForward_DISPATCH(struct VgpuApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__vgpuapiInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle vgpuapiGetInternalObjectHandle_DISPATCH(struct VgpuApi *pGpuResource) { return pGpuResource->__vgpuapiGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS vgpuapiControl_DISPATCH(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__vgpuapiControl__(pGpuResource, pCallContext, pParams); -} - -static inline NV_STATUS vgpuapiUnmap_DISPATCH(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__vgpuapiUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool vgpuapiAccessCallback_DISPATCH(struct VgpuApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__vgpuapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS vgpuapiGetMemInterMapParams_DISPATCH(struct VgpuApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return pRmResource->__vgpuapiGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS vgpuapiGetMemoryMappingDescriptor_DISPATCH(struct VgpuApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__vgpuapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS vgpuapiCheckMemInterUnmap_DISPATCH(struct VgpuApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__vgpuapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS vgpuapiControlFilter_DISPATCH(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vgpuapiControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS vgpuapiGetMemoryMappingDescriptor_DISPATCH(struct VgpuApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__vgpuapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS vgpuapiControlSerialization_Prologue_DISPATCH(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__vgpuapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } +static inline void vgpuapiControlSerialization_Epilogue_DISPATCH(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__vgpuapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS vgpuapiControl_Prologue_DISPATCH(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__vgpuapiControl_Prologue__(pResource, pCallContext, pParams); +} + +static inline void vgpuapiControl_Epilogue_DISPATCH(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__vgpuapiControl_Epilogue__(pResource, pCallContext, pParams); +} + static inline NvBool vgpuapiCanCopy_DISPATCH(struct VgpuApi *pResource) { return pResource->__vgpuapiCanCopy__(pResource); } -static inline NvBool vgpuapiIsPartialUnmapSupported_DISPATCH(struct VgpuApi *pResource) { - return pResource->__vgpuapiIsPartialUnmapSupported__(pResource); +static inline NV_STATUS vgpuapiIsDuplicate_DISPATCH(struct VgpuApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__vgpuapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void vgpuapiPreDestruct_DISPATCH(struct VgpuApi *pResource) { pResource->__vgpuapiPreDestruct__(pResource); } -static inline NV_STATUS vgpuapiIsDuplicate_DISPATCH(struct VgpuApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__vgpuapiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline NV_STATUS vgpuapiControlFilter_DISPATCH(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__vgpuapiControlFilter__(pResource, pCallContext, pParams); } -static inline void vgpuapiControlSerialization_Epilogue_DISPATCH(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vgpuapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool vgpuapiIsPartialUnmapSupported_DISPATCH(struct VgpuApi *pResource) { + return pResource->__vgpuapiIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS vgpuapiMap_DISPATCH(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__vgpuapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS vgpuapiMapTo_DISPATCH(struct VgpuApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__vgpuapiMapTo__(pResource, pParams); } -static inline NvBool vgpuapiAccessCallback_DISPATCH(struct VgpuApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__vgpuapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS vgpuapiUnmapFrom_DISPATCH(struct VgpuApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__vgpuapiUnmapFrom__(pResource, pParams); +} + +static inline NvU32 vgpuapiGetRefCount_DISPATCH(struct VgpuApi *pResource) { + return pResource->__vgpuapiGetRefCount__(pResource); +} + +static inline void vgpuapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VgpuApi *pResource, RsResourceRef *pReference) { + pResource->__vgpuapiAddAdditionalDependants__(pClient, pResource, pReference); } +NV_STATUS vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties_IMPL(struct VgpuApi *pVgpuApi, NVA080_CTRL_VGPU_DISPLAY_SET_SURFACE_PROPERTIES *pParams); + +NV_STATUS vgpuapiCtrlCmdVgpuDisplayCleanupSurface_IMPL(struct VgpuApi *pVgpuApi, NVA080_CTRL_VGPU_DISPLAY_CLEANUP_SURFACE_PARAMS *pParams); + +NV_STATUS vgpuapiCtrlCmdVGpuGetConfig_IMPL(struct VgpuApi *pVgpuApi, NVA080_CTRL_VGPU_GET_CONFIG_PARAMS *pParams); + NV_STATUS vgpuapiConstruct_IMPL(struct VgpuApi *arg_pVgpuApi, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_vgpuapiConstruct(arg_pVgpuApi, arg_pCallContext, arg_pParams) vgpuapiConstruct_IMPL(arg_pVgpuApi, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_vgpuconfigapi_nvoc.c b/src/nvidia/generated/g_vgpuconfigapi_nvoc.c index 2a89bb2dd2..c0649f8b88 100644 --- a/src/nvidia/generated/g_vgpuconfigapi_nvoc.c +++ b/src/nvidia/generated/g_vgpuconfigapi_nvoc.c @@ -111,126 +111,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_VgpuConfigApi = /*pExportInfo=*/ &__nvoc_export_info_VgpuConfigApi }; -static NvBool __nvoc_thunk_GpuResource_vgpuconfigapiShareCallback(struct VgpuConfigApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_vgpuconfigapiCheckMemInterUnmap(struct VgpuConfigApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_Notifier_vgpuconfigapiGetOrAllocNotifShare(struct VgpuConfigApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_VgpuConfigApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); -} - -static NV_STATUS __nvoc_thunk_RsResource_vgpuconfigapiMapTo(struct VgpuConfigApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_vgpuconfigapiGetMapAddrSpace(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} - -static void __nvoc_thunk_Notifier_vgpuconfigapiSetNotificationShare(struct VgpuConfigApi *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_VgpuConfigApi_Notifier.offset), pNotifShare); -} - -static NvU32 __nvoc_thunk_RsResource_vgpuconfigapiGetRefCount(struct VgpuConfigApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_vgpuconfigapiAddAdditionalDependants(struct RsClient *pClient, struct VgpuConfigApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_vgpuconfigapiControl_Prologue(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_vgpuconfigapiGetRegBaseOffsetAndSize(struct VgpuConfigApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), pGpu, pOffset, pSize); -} - -static NV_STATUS __nvoc_thunk_GpuResource_vgpuconfigapiInternalControlForward(struct VgpuConfigApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), command, pParams, size); -} - -static NV_STATUS __nvoc_thunk_RsResource_vgpuconfigapiUnmapFrom(struct VgpuConfigApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_vgpuconfigapiControl_Epilogue(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), pCallContext, pParams); -} - -static NvHandle __nvoc_thunk_GpuResource_vgpuconfigapiGetInternalObjectHandle(struct VgpuConfigApi *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_vgpuconfigapiControl(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_vgpuconfigapiUnmap(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_vgpuconfigapiGetMemInterMapParams(struct VgpuConfigApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_vgpuconfigapiGetMemoryMappingDescriptor(struct VgpuConfigApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_vgpuconfigapiControlFilter(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_Notifier_vgpuconfigapiUnregisterEvent(struct VgpuConfigApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_VgpuConfigApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); -} - -static NV_STATUS __nvoc_thunk_RmResource_vgpuconfigapiControlSerialization_Prologue(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_vgpuconfigapiCanCopy(struct VgpuConfigApi *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_vgpuconfigapiIsPartialUnmapSupported(struct VgpuConfigApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_vgpuconfigapiPreDestruct(struct VgpuConfigApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_vgpuconfigapiIsDuplicate(struct VgpuConfigApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_vgpuconfigapiControlSerialization_Epilogue(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), pCallContext, pParams); -} - -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_vgpuconfigapiGetNotificationListPtr(struct VgpuConfigApi *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_VgpuConfigApi_Notifier.offset)); -} - -static struct NotifShare *__nvoc_thunk_Notifier_vgpuconfigapiGetNotificationShare(struct VgpuConfigApi *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_VgpuConfigApi_Notifier.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_vgpuconfigapiMap(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_vgpuconfigapiAccessCallback(struct VgpuConfigApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -238,12 +118,12 @@ static NvBool __nvoc_thunk_RmResource_vgpuconfigapiAccessCallback(struct VgpuCon static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConfigApi[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdVgpuConfigSetInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0810101u, /*paramSize=*/ sizeof(NVA081_CTRL_VGPU_CONFIG_INFO_PARAMS), @@ -253,12 +133,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdVgpuConfigEnumerateVgpuPerPgpu_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0810102u, /*paramSize=*/ sizeof(NVA081_CTRL_VGPU_CONFIG_ENUMERATE_VGPU_PER_PGPU_PARAMS), @@ -268,12 +148,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdVgpuConfigGetVgpuTypeInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0810103u, /*paramSize=*/ sizeof(NVA081_CTRL_VGPU_CONFIG_GET_VGPU_TYPE_INFO_PARAMS), @@ -283,12 +163,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdVgpuConfigGetSupportedVgpuTypes_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0810104u, /*paramSize=*/ sizeof(NVA081_CTRL_VGPU_CONFIG_GET_VGPU_TYPES_PARAMS), @@ -298,12 +178,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdVgpuConfigGetCreatableVgpuTypes_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0810105u, /*paramSize=*/ sizeof(NVA081_CTRL_VGPU_CONFIG_GET_VGPU_TYPES_PARAMS), @@ -313,12 +193,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf #endif }, { /* [5] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdVgpuConfigEventSetNotification_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0810106u, /*paramSize=*/ sizeof(NVA081_CTRL_VGPU_CONFIG_EVENT_SET_NOTIFICATION_PARAMS), @@ -328,27 +208,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf #endif }, { /* [6] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdVgpuConfigNotifyStart_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xa0810107u, - /*paramSize=*/ sizeof(NVA081_CTRL_VGPU_CONFIG_NOTIFY_START_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_VgpuConfigApi.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "vgpuconfigapiCtrlCmdVgpuConfigNotifyStart" -#endif - }, - { /* [7] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdVgpuConfigUpdatePgpuInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0810109u, /*paramSize=*/ 0, @@ -357,13 +222,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf /*func=*/ "vgpuconfigapiCtrlCmdVgpuConfigUpdatePgpuInfo" #endif }, - { /* [8] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [7] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdVgpuConfigSetVgpuInstanceEncoderCapacity_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0810110u, /*paramSize=*/ sizeof(NVA081_CTRL_VGPU_CONFIG_VGPU_INSTANCE_ENCODER_CAPACITY_PARAMS), @@ -372,13 +237,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf /*func=*/ "vgpuconfigapiCtrlCmdVgpuConfigSetVgpuInstanceEncoderCapacity" #endif }, - { /* [9] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [8] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdVgpuConfigGetVgpuFbUsage_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0810111u, /*paramSize=*/ sizeof(NVA081_CTRL_VGPU_CONFIG_GET_VGPU_FB_USAGE_PARAMS), @@ -387,13 +252,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf /*func=*/ "vgpuconfigapiCtrlCmdVgpuConfigGetVgpuFbUsage" #endif }, - { /* [10] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [9] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdVgpuConfigGetMigrationCap_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0810112u, /*paramSize=*/ sizeof(NVA081_CTRL_CMD_VGPU_CONFIG_GET_MIGRATION_CAP_PARAMS), @@ -402,13 +267,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf /*func=*/ "vgpuconfigapiCtrlCmdVgpuConfigGetMigrationCap" #endif }, - { /* [11] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [10] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdVgpuConfigGetHostFbReservation_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0810113u, /*paramSize=*/ sizeof(NVA081_CTRL_VGPU_CONFIG_GET_HOST_FB_RESERVATION_PARAMS), @@ -417,13 +282,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf /*func=*/ "vgpuconfigapiCtrlCmdVgpuConfigGetHostFbReservation" #endif }, - { /* [12] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [11] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdVgpuConfigGetPgpuMetadataString_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0810114u, /*paramSize=*/ sizeof(NVA081_CTRL_VGPU_CONFIG_GET_PGPU_METADATA_STRING_PARAMS), @@ -432,13 +297,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf /*func=*/ "vgpuconfigapiCtrlCmdVgpuConfigGetPgpuMetadataString" #endif }, - { /* [13] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [12] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdVgpuConfigGetDoorbellEmulationSupport_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0810115u, /*paramSize=*/ sizeof(NVA081_CTRL_VGPU_CONFIG_GET_DOORBELL_EMULATION_SUPPORT_PARAMS), @@ -447,7 +312,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf /*func=*/ "vgpuconfigapiCtrlCmdVgpuConfigGetDoorbellEmulationSupport" #endif }, - { /* [14] */ + { /* [13] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -462,13 +327,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf /*func=*/ "vgpuconfigapiCtrlCmdVgpuConfigGetFreeSwizzId" #endif }, - { /* [15] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [14] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdPgpuGetMultiVgpuSupportInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0810117u, /*paramSize=*/ sizeof(NVA081_CTRL_PGPU_GET_MULTI_VGPU_SUPPORT_INFO_PARAMS), @@ -477,13 +342,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf /*func=*/ "vgpuconfigapiCtrlCmdPgpuGetMultiVgpuSupportInfo" #endif }, - { /* [16] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [15] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdGetVgpuDriversCaps_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0810118u, /*paramSize=*/ sizeof(NVA081_CTRL_GET_VGPU_DRIVER_CAPS_PARAMS), @@ -492,7 +357,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf /*func=*/ "vgpuconfigapiCtrlCmdGetVgpuDriversCaps" #endif }, - { /* [17] */ + { /* [16] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -507,7 +372,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf /*func=*/ "vgpuconfigapiCtrlCmdVgpuConfigSetPgpuInfo" #endif }, - { /* [18] */ + { /* [17] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -522,7 +387,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf /*func=*/ "vgpuconfigapiCtrlCmdVgpuConfigValidateSwizzId" #endif }, - { /* [19] */ + { /* [18] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -537,13 +402,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf /*func=*/ "vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo" #endif }, - { /* [20] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [19] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdVgpuConfigGetCreatablePlacements_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa081011cu, /*paramSize=*/ sizeof(NVA081_CTRL_VGPU_CONFIG_GET_CREATABLE_PLACEMENTS_PARAMS), @@ -552,13 +417,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf /*func=*/ "vgpuconfigapiCtrlCmdVgpuConfigGetCreatablePlacements" #endif }, - { /* [21] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [20] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdPgpuGetVgpuStreamingCapability_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa081011du, /*paramSize=*/ sizeof(NVA081_CTRL_PGPU_GET_VGPU_STREAMING_CAPABILITY_PARAMS), @@ -567,13 +432,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf /*func=*/ "vgpuconfigapiCtrlCmdPgpuGetVgpuStreamingCapability" #endif }, - { /* [22] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [21] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdVgpuConfigSetCapability_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa081011eu, /*paramSize=*/ sizeof(NVA081_CTRL_VGPU_SET_CAPABILITY_PARAMS), @@ -582,24 +447,192 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf /*func=*/ "vgpuconfigapiCtrlCmdVgpuConfigSetCapability" #endif }, - { /* [23] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + { /* [22] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdVgpuConfigGetCapability_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - /*flags=*/ 0x10u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa081011fu, /*paramSize=*/ sizeof(NVA081_CTRL_VGPU_GET_CAPABILITY_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_VgpuConfigApi.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "vgpuconfigapiCtrlCmdVgpuConfigGetCapability" +#endif + }, + { /* [23] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdVgpuSetVmName_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0xa0810120u, + /*paramSize=*/ sizeof(NVA081_CTRL_VGPU_SET_VM_NAME_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_VgpuConfigApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "vgpuconfigapiCtrlCmdVgpuSetVmName" #endif }, }; +// 30 up-thunk(s) defined to bridge methods in VgpuConfigApi to superclasses + +// vgpuconfigapiControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiControl(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), pCallContext, pParams); +} + +// vgpuconfigapiMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiMap(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// vgpuconfigapiUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiUnmap(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), pCallContext, pCpuMapping); +} + +// vgpuconfigapiShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_vgpuconfigapiShareCallback(struct VgpuConfigApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// vgpuconfigapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiGetRegBaseOffsetAndSize(struct VgpuConfigApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), pGpu, pOffset, pSize); +} + +// vgpuconfigapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiGetMapAddrSpace(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + +// vgpuconfigapiInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiInternalControlForward(struct VgpuConfigApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), command, pParams, size); +} + +// vgpuconfigapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_vgpuconfigapiGetInternalObjectHandle(struct VgpuConfigApi *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset)); +} + +// vgpuconfigapiAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_vgpuconfigapiAccessCallback(struct VgpuConfigApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// vgpuconfigapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vgpuconfigapiGetMemInterMapParams(struct VgpuConfigApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), pParams); +} + +// vgpuconfigapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vgpuconfigapiCheckMemInterUnmap(struct VgpuConfigApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), bSubdeviceHandleProvided); +} + +// vgpuconfigapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vgpuconfigapiGetMemoryMappingDescriptor(struct VgpuConfigApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), ppMemDesc); +} + +// vgpuconfigapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vgpuconfigapiControlSerialization_Prologue(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), pCallContext, pParams); +} + +// vgpuconfigapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_vgpuconfigapiControlSerialization_Epilogue(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), pCallContext, pParams); +} + +// vgpuconfigapiControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vgpuconfigapiControl_Prologue(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), pCallContext, pParams); +} + +// vgpuconfigapiControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_vgpuconfigapiControl_Epilogue(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), pCallContext, pParams); +} + +// vgpuconfigapiCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_vgpuconfigapiCanCopy(struct VgpuConfigApi *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset)); +} + +// vgpuconfigapiIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_vgpuconfigapiIsDuplicate(struct VgpuConfigApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset), hMemory, pDuplicate); +} + +// vgpuconfigapiPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_vgpuconfigapiPreDestruct(struct VgpuConfigApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset)); +} + +// vgpuconfigapiControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_vgpuconfigapiControlFilter(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset), pCallContext, pParams); +} + +// vgpuconfigapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_vgpuconfigapiIsPartialUnmapSupported(struct VgpuConfigApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset)); +} + +// vgpuconfigapiMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_vgpuconfigapiMapTo(struct VgpuConfigApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset), pParams); +} + +// vgpuconfigapiUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_vgpuconfigapiUnmapFrom(struct VgpuConfigApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset), pParams); +} + +// vgpuconfigapiGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_vgpuconfigapiGetRefCount(struct VgpuConfigApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset)); +} + +// vgpuconfigapiAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_vgpuconfigapiAddAdditionalDependants(struct RsClient *pClient, struct VgpuConfigApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset), pReference); +} + +// vgpuconfigapiGetNotificationListPtr: virtual inherited (notify) base (notify) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_vgpuconfigapiGetNotificationListPtr(struct VgpuConfigApi *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_VgpuConfigApi_Notifier.offset)); +} + +// vgpuconfigapiGetNotificationShare: virtual inherited (notify) base (notify) +static struct NotifShare * __nvoc_up_thunk_Notifier_vgpuconfigapiGetNotificationShare(struct VgpuConfigApi *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_VgpuConfigApi_Notifier.offset)); +} + +// vgpuconfigapiSetNotificationShare: virtual inherited (notify) base (notify) +static void __nvoc_up_thunk_Notifier_vgpuconfigapiSetNotificationShare(struct VgpuConfigApi *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_VgpuConfigApi_Notifier.offset), pNotifShare); +} + +// vgpuconfigapiUnregisterEvent: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_vgpuconfigapiUnregisterEvent(struct VgpuConfigApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_VgpuConfigApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +} + +// vgpuconfigapiGetOrAllocNotifShare: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_vgpuconfigapiGetOrAllocNotifShare(struct VgpuConfigApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_VgpuConfigApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_VgpuConfigApi = { /*numEntries=*/ 24, @@ -643,167 +676,226 @@ NV_STATUS __nvoc_ctor_VgpuConfigApi(VgpuConfigApi *pThis, struct CALL_CONTEXT * return status; } +// Vtable initialization static void __nvoc_init_funcTable_VgpuConfigApi_1(VgpuConfigApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuconfigapiCtrlCmdVgpuConfigSetInfo -- exported (id=0xa0810101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigSetInfo__ = &vgpuconfigapiCtrlCmdVgpuConfigSetInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuconfigapiCtrlCmdVgpuConfigEnumerateVgpuPerPgpu -- exported (id=0xa0810102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigEnumerateVgpuPerPgpu__ = &vgpuconfigapiCtrlCmdVgpuConfigEnumerateVgpuPerPgpu_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuconfigapiCtrlCmdVgpuConfigGetVgpuTypeInfo -- exported (id=0xa0810103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigGetVgpuTypeInfo__ = &vgpuconfigapiCtrlCmdVgpuConfigGetVgpuTypeInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuconfigapiCtrlCmdVgpuConfigGetSupportedVgpuTypes -- exported (id=0xa0810104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigGetSupportedVgpuTypes__ = &vgpuconfigapiCtrlCmdVgpuConfigGetSupportedVgpuTypes_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuconfigapiCtrlCmdVgpuConfigGetCreatableVgpuTypes -- exported (id=0xa0810105) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigGetCreatableVgpuTypes__ = &vgpuconfigapiCtrlCmdVgpuConfigGetCreatableVgpuTypes_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuconfigapiCtrlCmdVgpuConfigEventSetNotification -- exported (id=0xa0810106) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigEventSetNotification__ = &vgpuconfigapiCtrlCmdVgpuConfigEventSetNotification_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuconfigapiCtrlCmdVgpuConfigSetCapability -- exported (id=0xa081011e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigSetCapability__ = &vgpuconfigapiCtrlCmdVgpuConfigSetCapability_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuconfigapiCtrlCmdVgpuConfigGetCapability -- exported (id=0xa081011f) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigGetCapability__ = &vgpuconfigapiCtrlCmdVgpuConfigGetCapability_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) - pThis->__vgpuconfigapiCtrlCmdVgpuConfigNotifyStart__ = &vgpuconfigapiCtrlCmdVgpuConfigNotifyStart_IMPL; -#endif - -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuconfigapiCtrlCmdVgpuConfigGetCreatablePlacements -- exported (id=0xa081011c) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigGetCreatablePlacements__ = &vgpuconfigapiCtrlCmdVgpuConfigGetCreatablePlacements_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuconfigapiCtrlCmdVgpuConfigUpdatePgpuInfo -- exported (id=0xa0810109) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigUpdatePgpuInfo__ = &vgpuconfigapiCtrlCmdVgpuConfigUpdatePgpuInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuconfigapiCtrlCmdVgpuConfigSetVgpuInstanceEncoderCapacity -- exported (id=0xa0810110) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigSetVgpuInstanceEncoderCapacity__ = &vgpuconfigapiCtrlCmdVgpuConfigSetVgpuInstanceEncoderCapacity_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuconfigapiCtrlCmdVgpuConfigGetVgpuFbUsage -- exported (id=0xa0810111) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigGetVgpuFbUsage__ = &vgpuconfigapiCtrlCmdVgpuConfigGetVgpuFbUsage_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuconfigapiCtrlCmdVgpuConfigGetMigrationCap -- exported (id=0xa0810112) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigGetMigrationCap__ = &vgpuconfigapiCtrlCmdVgpuConfigGetMigrationCap_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuconfigapiCtrlCmdVgpuConfigGetHostFbReservation -- exported (id=0xa0810113) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigGetHostFbReservation__ = &vgpuconfigapiCtrlCmdVgpuConfigGetHostFbReservation_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuconfigapiCtrlCmdVgpuConfigGetPgpuMetadataString -- exported (id=0xa0810114) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigGetPgpuMetadataString__ = &vgpuconfigapiCtrlCmdVgpuConfigGetPgpuMetadataString_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuconfigapiCtrlCmdVgpuConfigGetDoorbellEmulationSupport -- exported (id=0xa0810115) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigGetDoorbellEmulationSupport__ = &vgpuconfigapiCtrlCmdVgpuConfigGetDoorbellEmulationSupport_IMPL; #endif + // vgpuconfigapiCtrlCmdVgpuConfigGetFreeSwizzId -- exported (id=0xa0810116) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigGetFreeSwizzId__ = &vgpuconfigapiCtrlCmdVgpuConfigGetFreeSwizzId_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuconfigapiCtrlCmdPgpuGetMultiVgpuSupportInfo -- exported (id=0xa0810117) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuconfigapiCtrlCmdPgpuGetMultiVgpuSupportInfo__ = &vgpuconfigapiCtrlCmdPgpuGetMultiVgpuSupportInfo_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuconfigapiCtrlCmdPgpuGetVgpuStreamingCapability -- exported (id=0xa081011d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuconfigapiCtrlCmdPgpuGetVgpuStreamingCapability__ = &vgpuconfigapiCtrlCmdPgpuGetVgpuStreamingCapability_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10u) + // vgpuconfigapiCtrlCmdGetVgpuDriversCaps -- exported (id=0xa0810118) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuconfigapiCtrlCmdGetVgpuDriversCaps__ = &vgpuconfigapiCtrlCmdGetVgpuDriversCaps_IMPL; #endif + // vgpuconfigapiCtrlCmdVgpuConfigSetPgpuInfo -- exported (id=0xa0810119) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigSetPgpuInfo__ = &vgpuconfigapiCtrlCmdVgpuConfigSetPgpuInfo_IMPL; #endif + // vgpuconfigapiCtrlCmdVgpuConfigValidateSwizzId -- exported (id=0xa081011a) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigValidateSwizzId__ = &vgpuconfigapiCtrlCmdVgpuConfigValidateSwizzId_IMPL; #endif + // vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo -- exported (id=0xa081011b) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo__ = &vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo_IMPL; #endif - pThis->__vgpuconfigapiShareCallback__ = &__nvoc_thunk_GpuResource_vgpuconfigapiShareCallback; + // vgpuconfigapiCtrlCmdVgpuSetVmName -- exported (id=0xa0810120) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + pThis->__vgpuconfigapiCtrlCmdVgpuSetVmName__ = &vgpuconfigapiCtrlCmdVgpuSetVmName_IMPL; +#endif - pThis->__vgpuconfigapiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_vgpuconfigapiCheckMemInterUnmap; + // vgpuconfigapiControl -- virtual inherited (gpures) base (gpures) + pThis->__vgpuconfigapiControl__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiControl; - pThis->__vgpuconfigapiGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_vgpuconfigapiGetOrAllocNotifShare; + // vgpuconfigapiMap -- virtual inherited (gpures) base (gpures) + pThis->__vgpuconfigapiMap__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiMap; - pThis->__vgpuconfigapiMapTo__ = &__nvoc_thunk_RsResource_vgpuconfigapiMapTo; + // vgpuconfigapiUnmap -- virtual inherited (gpures) base (gpures) + pThis->__vgpuconfigapiUnmap__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiUnmap; - pThis->__vgpuconfigapiGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_vgpuconfigapiGetMapAddrSpace; + // vgpuconfigapiShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__vgpuconfigapiShareCallback__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiShareCallback; - pThis->__vgpuconfigapiSetNotificationShare__ = &__nvoc_thunk_Notifier_vgpuconfigapiSetNotificationShare; + // vgpuconfigapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__vgpuconfigapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiGetRegBaseOffsetAndSize; - pThis->__vgpuconfigapiGetRefCount__ = &__nvoc_thunk_RsResource_vgpuconfigapiGetRefCount; + // vgpuconfigapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__vgpuconfigapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiGetMapAddrSpace; - pThis->__vgpuconfigapiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_vgpuconfigapiAddAdditionalDependants; + // vgpuconfigapiInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__vgpuconfigapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiInternalControlForward; - pThis->__vgpuconfigapiControl_Prologue__ = &__nvoc_thunk_RmResource_vgpuconfigapiControl_Prologue; + // vgpuconfigapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__vgpuconfigapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiGetInternalObjectHandle; - pThis->__vgpuconfigapiGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_vgpuconfigapiGetRegBaseOffsetAndSize; + // vgpuconfigapiAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__vgpuconfigapiAccessCallback__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiAccessCallback; - pThis->__vgpuconfigapiInternalControlForward__ = &__nvoc_thunk_GpuResource_vgpuconfigapiInternalControlForward; + // vgpuconfigapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__vgpuconfigapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiGetMemInterMapParams; - pThis->__vgpuconfigapiUnmapFrom__ = &__nvoc_thunk_RsResource_vgpuconfigapiUnmapFrom; + // vgpuconfigapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__vgpuconfigapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiCheckMemInterUnmap; - pThis->__vgpuconfigapiControl_Epilogue__ = &__nvoc_thunk_RmResource_vgpuconfigapiControl_Epilogue; + // vgpuconfigapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__vgpuconfigapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiGetMemoryMappingDescriptor; - pThis->__vgpuconfigapiGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_vgpuconfigapiGetInternalObjectHandle; + // vgpuconfigapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__vgpuconfigapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiControlSerialization_Prologue; - pThis->__vgpuconfigapiControl__ = &__nvoc_thunk_GpuResource_vgpuconfigapiControl; + // vgpuconfigapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__vgpuconfigapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiControlSerialization_Epilogue; - pThis->__vgpuconfigapiUnmap__ = &__nvoc_thunk_GpuResource_vgpuconfigapiUnmap; + // vgpuconfigapiControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__vgpuconfigapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiControl_Prologue; - pThis->__vgpuconfigapiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_vgpuconfigapiGetMemInterMapParams; + // vgpuconfigapiControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__vgpuconfigapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiControl_Epilogue; - pThis->__vgpuconfigapiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_vgpuconfigapiGetMemoryMappingDescriptor; + // vgpuconfigapiCanCopy -- virtual inherited (res) base (gpures) + pThis->__vgpuconfigapiCanCopy__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiCanCopy; - pThis->__vgpuconfigapiControlFilter__ = &__nvoc_thunk_RsResource_vgpuconfigapiControlFilter; + // vgpuconfigapiIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__vgpuconfigapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiIsDuplicate; - pThis->__vgpuconfigapiUnregisterEvent__ = &__nvoc_thunk_Notifier_vgpuconfigapiUnregisterEvent; + // vgpuconfigapiPreDestruct -- virtual inherited (res) base (gpures) + pThis->__vgpuconfigapiPreDestruct__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiPreDestruct; - pThis->__vgpuconfigapiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_vgpuconfigapiControlSerialization_Prologue; + // vgpuconfigapiControlFilter -- virtual inherited (res) base (gpures) + pThis->__vgpuconfigapiControlFilter__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiControlFilter; - pThis->__vgpuconfigapiCanCopy__ = &__nvoc_thunk_RsResource_vgpuconfigapiCanCopy; + // vgpuconfigapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__vgpuconfigapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiIsPartialUnmapSupported; - pThis->__vgpuconfigapiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_vgpuconfigapiIsPartialUnmapSupported; + // vgpuconfigapiMapTo -- virtual inherited (res) base (gpures) + pThis->__vgpuconfigapiMapTo__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiMapTo; - pThis->__vgpuconfigapiPreDestruct__ = &__nvoc_thunk_RsResource_vgpuconfigapiPreDestruct; + // vgpuconfigapiUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__vgpuconfigapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiUnmapFrom; - pThis->__vgpuconfigapiIsDuplicate__ = &__nvoc_thunk_RsResource_vgpuconfigapiIsDuplicate; + // vgpuconfigapiGetRefCount -- virtual inherited (res) base (gpures) + pThis->__vgpuconfigapiGetRefCount__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiGetRefCount; - pThis->__vgpuconfigapiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_vgpuconfigapiControlSerialization_Epilogue; + // vgpuconfigapiAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__vgpuconfigapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiAddAdditionalDependants; - pThis->__vgpuconfigapiGetNotificationListPtr__ = &__nvoc_thunk_Notifier_vgpuconfigapiGetNotificationListPtr; + // vgpuconfigapiGetNotificationListPtr -- virtual inherited (notify) base (notify) + pThis->__vgpuconfigapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_vgpuconfigapiGetNotificationListPtr; - pThis->__vgpuconfigapiGetNotificationShare__ = &__nvoc_thunk_Notifier_vgpuconfigapiGetNotificationShare; + // vgpuconfigapiGetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__vgpuconfigapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_vgpuconfigapiGetNotificationShare; - pThis->__vgpuconfigapiMap__ = &__nvoc_thunk_GpuResource_vgpuconfigapiMap; + // vgpuconfigapiSetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__vgpuconfigapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_vgpuconfigapiSetNotificationShare; - pThis->__vgpuconfigapiAccessCallback__ = &__nvoc_thunk_RmResource_vgpuconfigapiAccessCallback; -} + // vgpuconfigapiUnregisterEvent -- virtual inherited (notify) base (notify) + pThis->__vgpuconfigapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_vgpuconfigapiUnregisterEvent; + + // vgpuconfigapiGetOrAllocNotifShare -- virtual inherited (notify) base (notify) + pThis->__vgpuconfigapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_vgpuconfigapiGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_VgpuConfigApi_1 with approximately 54 basic block(s). + +// Initialize vtable(s) for 54 virtual method(s). void __nvoc_init_funcTable_VgpuConfigApi(VgpuConfigApi *pThis) { + + // Initialize vtable(s) with 54 per-object function pointer(s). __nvoc_init_funcTable_VgpuConfigApi_1(pThis); } diff --git a/src/nvidia/generated/g_vgpuconfigapi_nvoc.h b/src/nvidia/generated/g_vgpuconfigapi_nvoc.h index e90cc278f7..7994419c2f 100644 --- a/src/nvidia/generated/g_vgpuconfigapi_nvoc.h +++ b/src/nvidia/generated/g_vgpuconfigapi_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_VGPUCONFIGAPI_NVOC_H_ #define _G_VGPUCONFIGAPI_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -28,6 +35,7 @@ extern "C" { * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_vgpuconfigapi_nvoc.h" #ifndef _VGPUCONFIGAPI_H_ @@ -55,72 +63,83 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct VgpuConfigApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; struct Notifier __nvoc_base_Notifier; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct VgpuConfigApi *__nvoc_pbase_VgpuConfigApi; - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigSetInfo__)(struct VgpuConfigApi *, NVA081_CTRL_VGPU_CONFIG_INFO_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigEnumerateVgpuPerPgpu__)(struct VgpuConfigApi *, NVA081_CTRL_VGPU_CONFIG_ENUMERATE_VGPU_PER_PGPU_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetVgpuTypeInfo__)(struct VgpuConfigApi *, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_TYPE_INFO_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetSupportedVgpuTypes__)(struct VgpuConfigApi *, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_TYPES_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetCreatableVgpuTypes__)(struct VgpuConfigApi *, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_TYPES_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigEventSetNotification__)(struct VgpuConfigApi *, NVA081_CTRL_VGPU_CONFIG_EVENT_SET_NOTIFICATION_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigSetCapability__)(struct VgpuConfigApi *, NVA081_CTRL_VGPU_SET_CAPABILITY_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetCapability__)(struct VgpuConfigApi *, NVA081_CTRL_VGPU_GET_CAPABILITY_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigNotifyStart__)(struct VgpuConfigApi *, NVA081_CTRL_VGPU_CONFIG_NOTIFY_START_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetCreatablePlacements__)(struct VgpuConfigApi *, NVA081_CTRL_VGPU_CONFIG_GET_CREATABLE_PLACEMENTS_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigUpdatePgpuInfo__)(struct VgpuConfigApi *); - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigSetVgpuInstanceEncoderCapacity__)(struct VgpuConfigApi *, NVA081_CTRL_VGPU_CONFIG_VGPU_INSTANCE_ENCODER_CAPACITY_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetVgpuFbUsage__)(struct VgpuConfigApi *, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_FB_USAGE_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetMigrationCap__)(struct VgpuConfigApi *, NVA081_CTRL_CMD_VGPU_CONFIG_GET_MIGRATION_CAP_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetHostFbReservation__)(struct VgpuConfigApi *, NVA081_CTRL_VGPU_CONFIG_GET_HOST_FB_RESERVATION_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetPgpuMetadataString__)(struct VgpuConfigApi *, NVA081_CTRL_VGPU_CONFIG_GET_PGPU_METADATA_STRING_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetDoorbellEmulationSupport__)(struct VgpuConfigApi *, NVA081_CTRL_VGPU_CONFIG_GET_DOORBELL_EMULATION_SUPPORT_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetFreeSwizzId__)(struct VgpuConfigApi *, NVA081_CTRL_VGPU_CONFIG_GET_FREE_SWIZZID_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdPgpuGetMultiVgpuSupportInfo__)(struct VgpuConfigApi *, NVA081_CTRL_PGPU_GET_MULTI_VGPU_SUPPORT_INFO_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdPgpuGetVgpuStreamingCapability__)(struct VgpuConfigApi *, NVA081_CTRL_PGPU_GET_VGPU_STREAMING_CAPABILITY_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdGetVgpuDriversCaps__)(struct VgpuConfigApi *, NVA081_CTRL_GET_VGPU_DRIVER_CAPS_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigSetPgpuInfo__)(struct VgpuConfigApi *, NVA081_CTRL_VGPU_CONFIG_SET_PGPU_INFO_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigValidateSwizzId__)(struct VgpuConfigApi *, NVA081_CTRL_VGPU_CONFIG_VALIDATE_SWIZZID_PARAMS *); - NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo__)(struct VgpuConfigApi *, NVA081_CTRL_VGPU_CONFIG_UPDATE_HETEROGENEOUS_INFO_PARAMS *); - NvBool (*__vgpuconfigapiShareCallback__)(struct VgpuConfigApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__vgpuconfigapiCheckMemInterUnmap__)(struct VgpuConfigApi *, NvBool); - NV_STATUS (*__vgpuconfigapiGetOrAllocNotifShare__)(struct VgpuConfigApi *, NvHandle, NvHandle, struct NotifShare **); - NV_STATUS (*__vgpuconfigapiMapTo__)(struct VgpuConfigApi *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__vgpuconfigapiGetMapAddrSpace__)(struct VgpuConfigApi *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__vgpuconfigapiSetNotificationShare__)(struct VgpuConfigApi *, struct NotifShare *); - NvU32 (*__vgpuconfigapiGetRefCount__)(struct VgpuConfigApi *); - void (*__vgpuconfigapiAddAdditionalDependants__)(struct RsClient *, struct VgpuConfigApi *, RsResourceRef *); - NV_STATUS (*__vgpuconfigapiControl_Prologue__)(struct VgpuConfigApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vgpuconfigapiGetRegBaseOffsetAndSize__)(struct VgpuConfigApi *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__vgpuconfigapiInternalControlForward__)(struct VgpuConfigApi *, NvU32, void *, NvU32); - NV_STATUS (*__vgpuconfigapiUnmapFrom__)(struct VgpuConfigApi *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__vgpuconfigapiControl_Epilogue__)(struct VgpuConfigApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__vgpuconfigapiGetInternalObjectHandle__)(struct VgpuConfigApi *); - NV_STATUS (*__vgpuconfigapiControl__)(struct VgpuConfigApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vgpuconfigapiUnmap__)(struct VgpuConfigApi *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__vgpuconfigapiGetMemInterMapParams__)(struct VgpuConfigApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__vgpuconfigapiGetMemoryMappingDescriptor__)(struct VgpuConfigApi *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__vgpuconfigapiControlFilter__)(struct VgpuConfigApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vgpuconfigapiUnregisterEvent__)(struct VgpuConfigApi *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__vgpuconfigapiControlSerialization_Prologue__)(struct VgpuConfigApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__vgpuconfigapiCanCopy__)(struct VgpuConfigApi *); - NvBool (*__vgpuconfigapiIsPartialUnmapSupported__)(struct VgpuConfigApi *); - void (*__vgpuconfigapiPreDestruct__)(struct VgpuConfigApi *); - NV_STATUS (*__vgpuconfigapiIsDuplicate__)(struct VgpuConfigApi *, NvHandle, NvBool *); - void (*__vgpuconfigapiControlSerialization_Epilogue__)(struct VgpuConfigApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__vgpuconfigapiGetNotificationListPtr__)(struct VgpuConfigApi *); - struct NotifShare *(*__vgpuconfigapiGetNotificationShare__)(struct VgpuConfigApi *); - NV_STATUS (*__vgpuconfigapiMap__)(struct VgpuConfigApi *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__vgpuconfigapiAccessCallback__)(struct VgpuConfigApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct INotifier *__nvoc_pbase_INotifier; // inotify super^2 + struct Notifier *__nvoc_pbase_Notifier; // notify super + struct VgpuConfigApi *__nvoc_pbase_VgpuConfigApi; // vgpuconfigapi + + // Vtable with 54 per-object function pointers + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigSetInfo__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_INFO_PARAMS *); // exported (id=0xa0810101) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigEnumerateVgpuPerPgpu__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_ENUMERATE_VGPU_PER_PGPU_PARAMS *); // exported (id=0xa0810102) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetVgpuTypeInfo__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_TYPE_INFO_PARAMS *); // exported (id=0xa0810103) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetSupportedVgpuTypes__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_TYPES_PARAMS *); // exported (id=0xa0810104) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetCreatableVgpuTypes__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_TYPES_PARAMS *); // exported (id=0xa0810105) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigEventSetNotification__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_EVENT_SET_NOTIFICATION_PARAMS *); // exported (id=0xa0810106) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigSetCapability__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_SET_CAPABILITY_PARAMS *); // exported (id=0xa081011e) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetCapability__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_GET_CAPABILITY_PARAMS *); // exported (id=0xa081011f) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetCreatablePlacements__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_GET_CREATABLE_PLACEMENTS_PARAMS *); // exported (id=0xa081011c) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigUpdatePgpuInfo__)(struct VgpuConfigApi * /*this*/); // exported (id=0xa0810109) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigSetVgpuInstanceEncoderCapacity__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_VGPU_INSTANCE_ENCODER_CAPACITY_PARAMS *); // exported (id=0xa0810110) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetVgpuFbUsage__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_FB_USAGE_PARAMS *); // exported (id=0xa0810111) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetMigrationCap__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_CMD_VGPU_CONFIG_GET_MIGRATION_CAP_PARAMS *); // exported (id=0xa0810112) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetHostFbReservation__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_GET_HOST_FB_RESERVATION_PARAMS *); // exported (id=0xa0810113) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetPgpuMetadataString__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_GET_PGPU_METADATA_STRING_PARAMS *); // exported (id=0xa0810114) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetDoorbellEmulationSupport__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_GET_DOORBELL_EMULATION_SUPPORT_PARAMS *); // exported (id=0xa0810115) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetFreeSwizzId__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_GET_FREE_SWIZZID_PARAMS *); // exported (id=0xa0810116) + NV_STATUS (*__vgpuconfigapiCtrlCmdPgpuGetMultiVgpuSupportInfo__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_PGPU_GET_MULTI_VGPU_SUPPORT_INFO_PARAMS *); // exported (id=0xa0810117) + NV_STATUS (*__vgpuconfigapiCtrlCmdPgpuGetVgpuStreamingCapability__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_PGPU_GET_VGPU_STREAMING_CAPABILITY_PARAMS *); // exported (id=0xa081011d) + NV_STATUS (*__vgpuconfigapiCtrlCmdGetVgpuDriversCaps__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_GET_VGPU_DRIVER_CAPS_PARAMS *); // exported (id=0xa0810118) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigSetPgpuInfo__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_SET_PGPU_INFO_PARAMS *); // exported (id=0xa0810119) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigValidateSwizzId__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_VALIDATE_SWIZZID_PARAMS *); // exported (id=0xa081011a) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_UPDATE_HETEROGENEOUS_INFO_PARAMS *); // exported (id=0xa081011b) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuSetVmName__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_SET_VM_NAME_PARAMS *); // exported (id=0xa0810120) + NV_STATUS (*__vgpuconfigapiControl__)(struct VgpuConfigApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vgpuconfigapiMap__)(struct VgpuConfigApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vgpuconfigapiUnmap__)(struct VgpuConfigApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__vgpuconfigapiShareCallback__)(struct VgpuConfigApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vgpuconfigapiGetRegBaseOffsetAndSize__)(struct VgpuConfigApi * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vgpuconfigapiGetMapAddrSpace__)(struct VgpuConfigApi * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vgpuconfigapiInternalControlForward__)(struct VgpuConfigApi * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__vgpuconfigapiGetInternalObjectHandle__)(struct VgpuConfigApi * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__vgpuconfigapiAccessCallback__)(struct VgpuConfigApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vgpuconfigapiGetMemInterMapParams__)(struct VgpuConfigApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vgpuconfigapiCheckMemInterUnmap__)(struct VgpuConfigApi * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vgpuconfigapiGetMemoryMappingDescriptor__)(struct VgpuConfigApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vgpuconfigapiControlSerialization_Prologue__)(struct VgpuConfigApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__vgpuconfigapiControlSerialization_Epilogue__)(struct VgpuConfigApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vgpuconfigapiControl_Prologue__)(struct VgpuConfigApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__vgpuconfigapiControl_Epilogue__)(struct VgpuConfigApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__vgpuconfigapiCanCopy__)(struct VgpuConfigApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__vgpuconfigapiIsDuplicate__)(struct VgpuConfigApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__vgpuconfigapiPreDestruct__)(struct VgpuConfigApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__vgpuconfigapiControlFilter__)(struct VgpuConfigApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__vgpuconfigapiIsPartialUnmapSupported__)(struct VgpuConfigApi * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__vgpuconfigapiMapTo__)(struct VgpuConfigApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__vgpuconfigapiUnmapFrom__)(struct VgpuConfigApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__vgpuconfigapiGetRefCount__)(struct VgpuConfigApi * /*this*/); // virtual inherited (res) base (gpures) + void (*__vgpuconfigapiAddAdditionalDependants__)(struct RsClient *, struct VgpuConfigApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + PEVENTNOTIFICATION * (*__vgpuconfigapiGetNotificationListPtr__)(struct VgpuConfigApi * /*this*/); // virtual inherited (notify) base (notify) + struct NotifShare * (*__vgpuconfigapiGetNotificationShare__)(struct VgpuConfigApi * /*this*/); // virtual inherited (notify) base (notify) + void (*__vgpuconfigapiSetNotificationShare__)(struct VgpuConfigApi * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) + NV_STATUS (*__vgpuconfigapiUnregisterEvent__)(struct VgpuConfigApi * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) + NV_STATUS (*__vgpuconfigapiGetOrAllocNotifShare__)(struct VgpuConfigApi * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) + + // Data members NvU32 notifyActions[5]; }; @@ -133,6 +152,7 @@ typedef struct VgpuConfigApi VgpuConfigApi; #define __nvoc_class_id_VgpuConfigApi 0x4d560a #endif /* __nvoc_class_id_VgpuConfigApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_VgpuConfigApi; #define __staticCast_VgpuConfigApi(pThis) \ @@ -145,330 +165,387 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_VgpuConfigApi; ((VgpuConfigApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(VgpuConfigApi))) #endif //__nvoc_vgpuconfigapi_h_disabled - NV_STATUS __nvoc_objCreateDynamic_VgpuConfigApi(VgpuConfigApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_VgpuConfigApi(VgpuConfigApi**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_VgpuConfigApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_VgpuConfigApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define vgpuconfigapiCtrlCmdVgpuConfigSetInfo_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigSetInfo__ #define vgpuconfigapiCtrlCmdVgpuConfigSetInfo(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdVgpuConfigSetInfo_DISPATCH(pVgpuConfigApi, pParams) +#define vgpuconfigapiCtrlCmdVgpuConfigEnumerateVgpuPerPgpu_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigEnumerateVgpuPerPgpu__ #define vgpuconfigapiCtrlCmdVgpuConfigEnumerateVgpuPerPgpu(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdVgpuConfigEnumerateVgpuPerPgpu_DISPATCH(pVgpuConfigApi, pParams) +#define vgpuconfigapiCtrlCmdVgpuConfigGetVgpuTypeInfo_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetVgpuTypeInfo__ #define vgpuconfigapiCtrlCmdVgpuConfigGetVgpuTypeInfo(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdVgpuConfigGetVgpuTypeInfo_DISPATCH(pVgpuConfigApi, pParams) +#define vgpuconfigapiCtrlCmdVgpuConfigGetSupportedVgpuTypes_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetSupportedVgpuTypes__ #define vgpuconfigapiCtrlCmdVgpuConfigGetSupportedVgpuTypes(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdVgpuConfigGetSupportedVgpuTypes_DISPATCH(pVgpuConfigApi, pParams) +#define vgpuconfigapiCtrlCmdVgpuConfigGetCreatableVgpuTypes_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetCreatableVgpuTypes__ #define vgpuconfigapiCtrlCmdVgpuConfigGetCreatableVgpuTypes(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdVgpuConfigGetCreatableVgpuTypes_DISPATCH(pVgpuConfigApi, pParams) +#define vgpuconfigapiCtrlCmdVgpuConfigEventSetNotification_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigEventSetNotification__ #define vgpuconfigapiCtrlCmdVgpuConfigEventSetNotification(pVgpuConfigApi, pSetEventParams) vgpuconfigapiCtrlCmdVgpuConfigEventSetNotification_DISPATCH(pVgpuConfigApi, pSetEventParams) +#define vgpuconfigapiCtrlCmdVgpuConfigSetCapability_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigSetCapability__ #define vgpuconfigapiCtrlCmdVgpuConfigSetCapability(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdVgpuConfigSetCapability_DISPATCH(pVgpuConfigApi, pParams) +#define vgpuconfigapiCtrlCmdVgpuConfigGetCapability_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetCapability__ #define vgpuconfigapiCtrlCmdVgpuConfigGetCapability(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdVgpuConfigGetCapability_DISPATCH(pVgpuConfigApi, pParams) -#define vgpuconfigapiCtrlCmdVgpuConfigNotifyStart(pVgpuConfigApi, pNotifyParams) vgpuconfigapiCtrlCmdVgpuConfigNotifyStart_DISPATCH(pVgpuConfigApi, pNotifyParams) +#define vgpuconfigapiCtrlCmdVgpuConfigGetCreatablePlacements_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetCreatablePlacements__ #define vgpuconfigapiCtrlCmdVgpuConfigGetCreatablePlacements(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdVgpuConfigGetCreatablePlacements_DISPATCH(pVgpuConfigApi, pParams) +#define vgpuconfigapiCtrlCmdVgpuConfigUpdatePgpuInfo_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigUpdatePgpuInfo__ #define vgpuconfigapiCtrlCmdVgpuConfigUpdatePgpuInfo(pVgpuConfigApi) vgpuconfigapiCtrlCmdVgpuConfigUpdatePgpuInfo_DISPATCH(pVgpuConfigApi) +#define vgpuconfigapiCtrlCmdVgpuConfigSetVgpuInstanceEncoderCapacity_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigSetVgpuInstanceEncoderCapacity__ #define vgpuconfigapiCtrlCmdVgpuConfigSetVgpuInstanceEncoderCapacity(pVgpuConfigApi, pEncoderParams) vgpuconfigapiCtrlCmdVgpuConfigSetVgpuInstanceEncoderCapacity_DISPATCH(pVgpuConfigApi, pEncoderParams) +#define vgpuconfigapiCtrlCmdVgpuConfigGetVgpuFbUsage_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetVgpuFbUsage__ #define vgpuconfigapiCtrlCmdVgpuConfigGetVgpuFbUsage(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdVgpuConfigGetVgpuFbUsage_DISPATCH(pVgpuConfigApi, pParams) +#define vgpuconfigapiCtrlCmdVgpuConfigGetMigrationCap_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetMigrationCap__ #define vgpuconfigapiCtrlCmdVgpuConfigGetMigrationCap(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdVgpuConfigGetMigrationCap_DISPATCH(pVgpuConfigApi, pParams) +#define vgpuconfigapiCtrlCmdVgpuConfigGetHostFbReservation_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetHostFbReservation__ #define vgpuconfigapiCtrlCmdVgpuConfigGetHostFbReservation(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdVgpuConfigGetHostFbReservation_DISPATCH(pVgpuConfigApi, pParams) +#define vgpuconfigapiCtrlCmdVgpuConfigGetPgpuMetadataString_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetPgpuMetadataString__ #define vgpuconfigapiCtrlCmdVgpuConfigGetPgpuMetadataString(pVgpuConfigApi, pGpuMetadataStringParams) vgpuconfigapiCtrlCmdVgpuConfigGetPgpuMetadataString_DISPATCH(pVgpuConfigApi, pGpuMetadataStringParams) +#define vgpuconfigapiCtrlCmdVgpuConfigGetDoorbellEmulationSupport_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetDoorbellEmulationSupport__ #define vgpuconfigapiCtrlCmdVgpuConfigGetDoorbellEmulationSupport(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdVgpuConfigGetDoorbellEmulationSupport_DISPATCH(pVgpuConfigApi, pParams) +#define vgpuconfigapiCtrlCmdVgpuConfigGetFreeSwizzId_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetFreeSwizzId__ #define vgpuconfigapiCtrlCmdVgpuConfigGetFreeSwizzId(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdVgpuConfigGetFreeSwizzId_DISPATCH(pVgpuConfigApi, pParams) +#define vgpuconfigapiCtrlCmdPgpuGetMultiVgpuSupportInfo_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdPgpuGetMultiVgpuSupportInfo__ #define vgpuconfigapiCtrlCmdPgpuGetMultiVgpuSupportInfo(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdPgpuGetMultiVgpuSupportInfo_DISPATCH(pVgpuConfigApi, pParams) +#define vgpuconfigapiCtrlCmdPgpuGetVgpuStreamingCapability_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdPgpuGetVgpuStreamingCapability__ #define vgpuconfigapiCtrlCmdPgpuGetVgpuStreamingCapability(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdPgpuGetVgpuStreamingCapability_DISPATCH(pVgpuConfigApi, pParams) +#define vgpuconfigapiCtrlCmdGetVgpuDriversCaps_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdGetVgpuDriversCaps__ #define vgpuconfigapiCtrlCmdGetVgpuDriversCaps(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdGetVgpuDriversCaps_DISPATCH(pVgpuConfigApi, pParams) +#define vgpuconfigapiCtrlCmdVgpuConfigSetPgpuInfo_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigSetPgpuInfo__ #define vgpuconfigapiCtrlCmdVgpuConfigSetPgpuInfo(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdVgpuConfigSetPgpuInfo_DISPATCH(pVgpuConfigApi, pParams) +#define vgpuconfigapiCtrlCmdVgpuConfigValidateSwizzId_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigValidateSwizzId__ #define vgpuconfigapiCtrlCmdVgpuConfigValidateSwizzId(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdVgpuConfigValidateSwizzId_DISPATCH(pVgpuConfigApi, pParams) +#define vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo__ #define vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo_DISPATCH(pVgpuConfigApi, pParams) +#define vgpuconfigapiCtrlCmdVgpuSetVmName_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuSetVmName__ +#define vgpuconfigapiCtrlCmdVgpuSetVmName(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdVgpuSetVmName_DISPATCH(pVgpuConfigApi, pParams) +#define vgpuconfigapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define vgpuconfigapiControl(pGpuResource, pCallContext, pParams) vgpuconfigapiControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define vgpuconfigapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define vgpuconfigapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) vgpuconfigapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define vgpuconfigapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define vgpuconfigapiUnmap(pGpuResource, pCallContext, pCpuMapping) vgpuconfigapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define vgpuconfigapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define vgpuconfigapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) vgpuconfigapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define vgpuconfigapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) vgpuconfigapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define vgpuconfigapiGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) vgpuconfigapiGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -#define vgpuconfigapiMapTo(pResource, pParams) vgpuconfigapiMapTo_DISPATCH(pResource, pParams) -#define vgpuconfigapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) vgpuconfigapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define vgpuconfigapiSetNotificationShare(pNotifier, pNotifShare) vgpuconfigapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define vgpuconfigapiGetRefCount(pResource) vgpuconfigapiGetRefCount_DISPATCH(pResource) -#define vgpuconfigapiAddAdditionalDependants(pClient, pResource, pReference) vgpuconfigapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define vgpuconfigapiControl_Prologue(pResource, pCallContext, pParams) vgpuconfigapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define vgpuconfigapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define vgpuconfigapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) vgpuconfigapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define vgpuconfigapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define vgpuconfigapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) vgpuconfigapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define vgpuconfigapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define vgpuconfigapiInternalControlForward(pGpuResource, command, pParams, size) vgpuconfigapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define vgpuconfigapiUnmapFrom(pResource, pParams) vgpuconfigapiUnmapFrom_DISPATCH(pResource, pParams) -#define vgpuconfigapiControl_Epilogue(pResource, pCallContext, pParams) vgpuconfigapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vgpuconfigapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define vgpuconfigapiGetInternalObjectHandle(pGpuResource) vgpuconfigapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define vgpuconfigapiControl(pGpuResource, pCallContext, pParams) vgpuconfigapiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define vgpuconfigapiUnmap(pGpuResource, pCallContext, pCpuMapping) vgpuconfigapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define vgpuconfigapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define vgpuconfigapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) vgpuconfigapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define vgpuconfigapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define vgpuconfigapiGetMemInterMapParams(pRmResource, pParams) vgpuconfigapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define vgpuconfigapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define vgpuconfigapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) vgpuconfigapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define vgpuconfigapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define vgpuconfigapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) vgpuconfigapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define vgpuconfigapiControlFilter(pResource, pCallContext, pParams) vgpuconfigapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define vgpuconfigapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) vgpuconfigapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define vgpuconfigapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define vgpuconfigapiControlSerialization_Prologue(pResource, pCallContext, pParams) vgpuconfigapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define vgpuconfigapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define vgpuconfigapiControlSerialization_Epilogue(pResource, pCallContext, pParams) vgpuconfigapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vgpuconfigapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define vgpuconfigapiControl_Prologue(pResource, pCallContext, pParams) vgpuconfigapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define vgpuconfigapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define vgpuconfigapiControl_Epilogue(pResource, pCallContext, pParams) vgpuconfigapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vgpuconfigapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define vgpuconfigapiCanCopy(pResource) vgpuconfigapiCanCopy_DISPATCH(pResource) -#define vgpuconfigapiIsPartialUnmapSupported(pResource) vgpuconfigapiIsPartialUnmapSupported_DISPATCH(pResource) -#define vgpuconfigapiPreDestruct(pResource) vgpuconfigapiPreDestruct_DISPATCH(pResource) +#define vgpuconfigapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define vgpuconfigapiIsDuplicate(pResource, hMemory, pDuplicate) vgpuconfigapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define vgpuconfigapiControlSerialization_Epilogue(pResource, pCallContext, pParams) vgpuconfigapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vgpuconfigapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define vgpuconfigapiPreDestruct(pResource) vgpuconfigapiPreDestruct_DISPATCH(pResource) +#define vgpuconfigapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define vgpuconfigapiControlFilter(pResource, pCallContext, pParams) vgpuconfigapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define vgpuconfigapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define vgpuconfigapiIsPartialUnmapSupported(pResource) vgpuconfigapiIsPartialUnmapSupported_DISPATCH(pResource) +#define vgpuconfigapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define vgpuconfigapiMapTo(pResource, pParams) vgpuconfigapiMapTo_DISPATCH(pResource, pParams) +#define vgpuconfigapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define vgpuconfigapiUnmapFrom(pResource, pParams) vgpuconfigapiUnmapFrom_DISPATCH(pResource, pParams) +#define vgpuconfigapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define vgpuconfigapiGetRefCount(pResource) vgpuconfigapiGetRefCount_DISPATCH(pResource) +#define vgpuconfigapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define vgpuconfigapiAddAdditionalDependants(pClient, pResource, pReference) vgpuconfigapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define vgpuconfigapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define vgpuconfigapiGetNotificationListPtr(pNotifier) vgpuconfigapiGetNotificationListPtr_DISPATCH(pNotifier) +#define vgpuconfigapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ #define vgpuconfigapiGetNotificationShare(pNotifier) vgpuconfigapiGetNotificationShare_DISPATCH(pNotifier) -#define vgpuconfigapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) vgpuconfigapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define vgpuconfigapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) vgpuconfigapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigSetInfo_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_INFO_PARAMS *pParams); +#define vgpuconfigapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define vgpuconfigapiSetNotificationShare(pNotifier, pNotifShare) vgpuconfigapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define vgpuconfigapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define vgpuconfigapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) vgpuconfigapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define vgpuconfigapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define vgpuconfigapiGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) vgpuconfigapiGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) +// Dispatch functions static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigSetInfo_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_INFO_PARAMS *pParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigSetInfo__(pVgpuConfigApi, pParams); } -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigEnumerateVgpuPerPgpu_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_ENUMERATE_VGPU_PER_PGPU_PARAMS *pParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigEnumerateVgpuPerPgpu_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_ENUMERATE_VGPU_PER_PGPU_PARAMS *pParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigEnumerateVgpuPerPgpu__(pVgpuConfigApi, pParams); } -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetVgpuTypeInfo_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_TYPE_INFO_PARAMS *pParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetVgpuTypeInfo_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_TYPE_INFO_PARAMS *pParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetVgpuTypeInfo__(pVgpuConfigApi, pParams); } -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetSupportedVgpuTypes_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_TYPES_PARAMS *pParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetSupportedVgpuTypes_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_TYPES_PARAMS *pParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetSupportedVgpuTypes__(pVgpuConfigApi, pParams); } -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetCreatableVgpuTypes_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_TYPES_PARAMS *pParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetCreatableVgpuTypes_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_TYPES_PARAMS *pParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetCreatableVgpuTypes__(pVgpuConfigApi, pParams); } -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigEventSetNotification_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_EVENT_SET_NOTIFICATION_PARAMS *pSetEventParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigEventSetNotification_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_EVENT_SET_NOTIFICATION_PARAMS *pSetEventParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigEventSetNotification__(pVgpuConfigApi, pSetEventParams); } -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigSetCapability_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_SET_CAPABILITY_PARAMS *pParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigSetCapability_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_SET_CAPABILITY_PARAMS *pParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigSetCapability__(pVgpuConfigApi, pParams); } -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetCapability_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_GET_CAPABILITY_PARAMS *pParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetCapability_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_GET_CAPABILITY_PARAMS *pParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetCapability__(pVgpuConfigApi, pParams); } -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigNotifyStart_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_NOTIFY_START_PARAMS *pNotifyParams); - -static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigNotifyStart_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_NOTIFY_START_PARAMS *pNotifyParams) { - return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigNotifyStart__(pVgpuConfigApi, pNotifyParams); -} - -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetCreatablePlacements_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_CREATABLE_PLACEMENTS_PARAMS *pParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetCreatablePlacements_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_CREATABLE_PLACEMENTS_PARAMS *pParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetCreatablePlacements__(pVgpuConfigApi, pParams); } -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigUpdatePgpuInfo_IMPL(struct VgpuConfigApi *pVgpuConfigApi); - static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigUpdatePgpuInfo_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigUpdatePgpuInfo__(pVgpuConfigApi); } -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigSetVgpuInstanceEncoderCapacity_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_VGPU_INSTANCE_ENCODER_CAPACITY_PARAMS *pEncoderParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigSetVgpuInstanceEncoderCapacity_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_VGPU_INSTANCE_ENCODER_CAPACITY_PARAMS *pEncoderParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigSetVgpuInstanceEncoderCapacity__(pVgpuConfigApi, pEncoderParams); } -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetVgpuFbUsage_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_FB_USAGE_PARAMS *pParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetVgpuFbUsage_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_FB_USAGE_PARAMS *pParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetVgpuFbUsage__(pVgpuConfigApi, pParams); } -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetMigrationCap_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_CMD_VGPU_CONFIG_GET_MIGRATION_CAP_PARAMS *pParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetMigrationCap_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_CMD_VGPU_CONFIG_GET_MIGRATION_CAP_PARAMS *pParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetMigrationCap__(pVgpuConfigApi, pParams); } -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetHostFbReservation_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_HOST_FB_RESERVATION_PARAMS *pParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetHostFbReservation_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_HOST_FB_RESERVATION_PARAMS *pParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetHostFbReservation__(pVgpuConfigApi, pParams); } -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetPgpuMetadataString_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_PGPU_METADATA_STRING_PARAMS *pGpuMetadataStringParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetPgpuMetadataString_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_PGPU_METADATA_STRING_PARAMS *pGpuMetadataStringParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetPgpuMetadataString__(pVgpuConfigApi, pGpuMetadataStringParams); } -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetDoorbellEmulationSupport_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_DOORBELL_EMULATION_SUPPORT_PARAMS *pParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetDoorbellEmulationSupport_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_DOORBELL_EMULATION_SUPPORT_PARAMS *pParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetDoorbellEmulationSupport__(pVgpuConfigApi, pParams); } -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetFreeSwizzId_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_FREE_SWIZZID_PARAMS *pParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetFreeSwizzId_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_FREE_SWIZZID_PARAMS *pParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetFreeSwizzId__(pVgpuConfigApi, pParams); } -NV_STATUS vgpuconfigapiCtrlCmdPgpuGetMultiVgpuSupportInfo_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_PGPU_GET_MULTI_VGPU_SUPPORT_INFO_PARAMS *pParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdPgpuGetMultiVgpuSupportInfo_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_PGPU_GET_MULTI_VGPU_SUPPORT_INFO_PARAMS *pParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdPgpuGetMultiVgpuSupportInfo__(pVgpuConfigApi, pParams); } -NV_STATUS vgpuconfigapiCtrlCmdPgpuGetVgpuStreamingCapability_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_PGPU_GET_VGPU_STREAMING_CAPABILITY_PARAMS *pParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdPgpuGetVgpuStreamingCapability_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_PGPU_GET_VGPU_STREAMING_CAPABILITY_PARAMS *pParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdPgpuGetVgpuStreamingCapability__(pVgpuConfigApi, pParams); } -NV_STATUS vgpuconfigapiCtrlCmdGetVgpuDriversCaps_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_GET_VGPU_DRIVER_CAPS_PARAMS *pParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdGetVgpuDriversCaps_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_GET_VGPU_DRIVER_CAPS_PARAMS *pParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdGetVgpuDriversCaps__(pVgpuConfigApi, pParams); } -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigSetPgpuInfo_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_SET_PGPU_INFO_PARAMS *pParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigSetPgpuInfo_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_SET_PGPU_INFO_PARAMS *pParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigSetPgpuInfo__(pVgpuConfigApi, pParams); } -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigValidateSwizzId_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_VALIDATE_SWIZZID_PARAMS *pParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigValidateSwizzId_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_VALIDATE_SWIZZID_PARAMS *pParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigValidateSwizzId__(pVgpuConfigApi, pParams); } -NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_UPDATE_HETEROGENEOUS_INFO_PARAMS *pParams); - static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_UPDATE_HETEROGENEOUS_INFO_PARAMS *pParams) { return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo__(pVgpuConfigApi, pParams); } -static inline NvBool vgpuconfigapiShareCallback_DISPATCH(struct VgpuConfigApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__vgpuconfigapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuSetVmName_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_SET_VM_NAME_PARAMS *pParams) { + return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuSetVmName__(pVgpuConfigApi, pParams); } -static inline NV_STATUS vgpuconfigapiCheckMemInterUnmap_DISPATCH(struct VgpuConfigApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__vgpuconfigapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS vgpuconfigapiControl_DISPATCH(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__vgpuconfigapiControl__(pGpuResource, pCallContext, pParams); } -static inline NV_STATUS vgpuconfigapiGetOrAllocNotifShare_DISPATCH(struct VgpuConfigApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__vgpuconfigapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); +static inline NV_STATUS vgpuconfigapiMap_DISPATCH(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__vgpuconfigapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS vgpuconfigapiMapTo_DISPATCH(struct VgpuConfigApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__vgpuconfigapiMapTo__(pResource, pParams); +static inline NV_STATUS vgpuconfigapiUnmap_DISPATCH(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__vgpuconfigapiUnmap__(pGpuResource, pCallContext, pCpuMapping); +} + +static inline NvBool vgpuconfigapiShareCallback_DISPATCH(struct VgpuConfigApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__vgpuconfigapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +} + +static inline NV_STATUS vgpuconfigapiGetRegBaseOffsetAndSize_DISPATCH(struct VgpuConfigApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__vgpuconfigapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS vgpuconfigapiGetMapAddrSpace_DISPATCH(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__vgpuconfigapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline void vgpuconfigapiSetNotificationShare_DISPATCH(struct VgpuConfigApi *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__vgpuconfigapiSetNotificationShare__(pNotifier, pNotifShare); +static inline NV_STATUS vgpuconfigapiInternalControlForward_DISPATCH(struct VgpuConfigApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__vgpuconfigapiInternalControlForward__(pGpuResource, command, pParams, size); } -static inline NvU32 vgpuconfigapiGetRefCount_DISPATCH(struct VgpuConfigApi *pResource) { - return pResource->__vgpuconfigapiGetRefCount__(pResource); +static inline NvHandle vgpuconfigapiGetInternalObjectHandle_DISPATCH(struct VgpuConfigApi *pGpuResource) { + return pGpuResource->__vgpuconfigapiGetInternalObjectHandle__(pGpuResource); } -static inline void vgpuconfigapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VgpuConfigApi *pResource, RsResourceRef *pReference) { - pResource->__vgpuconfigapiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvBool vgpuconfigapiAccessCallback_DISPATCH(struct VgpuConfigApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__vgpuconfigapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS vgpuconfigapiControl_Prologue_DISPATCH(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vgpuconfigapiControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS vgpuconfigapiGetMemInterMapParams_DISPATCH(struct VgpuConfigApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__vgpuconfigapiGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS vgpuconfigapiGetRegBaseOffsetAndSize_DISPATCH(struct VgpuConfigApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__vgpuconfigapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS vgpuconfigapiCheckMemInterUnmap_DISPATCH(struct VgpuConfigApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__vgpuconfigapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS vgpuconfigapiInternalControlForward_DISPATCH(struct VgpuConfigApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__vgpuconfigapiInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS vgpuconfigapiGetMemoryMappingDescriptor_DISPATCH(struct VgpuConfigApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__vgpuconfigapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NV_STATUS vgpuconfigapiUnmapFrom_DISPATCH(struct VgpuConfigApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__vgpuconfigapiUnmapFrom__(pResource, pParams); +static inline NV_STATUS vgpuconfigapiControlSerialization_Prologue_DISPATCH(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__vgpuconfigapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline void vgpuconfigapiControl_Epilogue_DISPATCH(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vgpuconfigapiControl_Epilogue__(pResource, pCallContext, pParams); +static inline void vgpuconfigapiControlSerialization_Epilogue_DISPATCH(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__vgpuconfigapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NvHandle vgpuconfigapiGetInternalObjectHandle_DISPATCH(struct VgpuConfigApi *pGpuResource) { - return pGpuResource->__vgpuconfigapiGetInternalObjectHandle__(pGpuResource); +static inline NV_STATUS vgpuconfigapiControl_Prologue_DISPATCH(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__vgpuconfigapiControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS vgpuconfigapiControl_DISPATCH(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__vgpuconfigapiControl__(pGpuResource, pCallContext, pParams); +static inline void vgpuconfigapiControl_Epilogue_DISPATCH(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__vgpuconfigapiControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS vgpuconfigapiUnmap_DISPATCH(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__vgpuconfigapiUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline NvBool vgpuconfigapiCanCopy_DISPATCH(struct VgpuConfigApi *pResource) { + return pResource->__vgpuconfigapiCanCopy__(pResource); } -static inline NV_STATUS vgpuconfigapiGetMemInterMapParams_DISPATCH(struct VgpuConfigApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__vgpuconfigapiGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS vgpuconfigapiIsDuplicate_DISPATCH(struct VgpuConfigApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__vgpuconfigapiIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS vgpuconfigapiGetMemoryMappingDescriptor_DISPATCH(struct VgpuConfigApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__vgpuconfigapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline void vgpuconfigapiPreDestruct_DISPATCH(struct VgpuConfigApi *pResource) { + pResource->__vgpuconfigapiPreDestruct__(pResource); } static inline NV_STATUS vgpuconfigapiControlFilter_DISPATCH(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__vgpuconfigapiControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS vgpuconfigapiUnregisterEvent_DISPATCH(struct VgpuConfigApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__vgpuconfigapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline NvBool vgpuconfigapiIsPartialUnmapSupported_DISPATCH(struct VgpuConfigApi *pResource) { + return pResource->__vgpuconfigapiIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS vgpuconfigapiControlSerialization_Prologue_DISPATCH(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vgpuconfigapiControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS vgpuconfigapiMapTo_DISPATCH(struct VgpuConfigApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__vgpuconfigapiMapTo__(pResource, pParams); } -static inline NvBool vgpuconfigapiCanCopy_DISPATCH(struct VgpuConfigApi *pResource) { - return pResource->__vgpuconfigapiCanCopy__(pResource); +static inline NV_STATUS vgpuconfigapiUnmapFrom_DISPATCH(struct VgpuConfigApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__vgpuconfigapiUnmapFrom__(pResource, pParams); } -static inline NvBool vgpuconfigapiIsPartialUnmapSupported_DISPATCH(struct VgpuConfigApi *pResource) { - return pResource->__vgpuconfigapiIsPartialUnmapSupported__(pResource); +static inline NvU32 vgpuconfigapiGetRefCount_DISPATCH(struct VgpuConfigApi *pResource) { + return pResource->__vgpuconfigapiGetRefCount__(pResource); } -static inline void vgpuconfigapiPreDestruct_DISPATCH(struct VgpuConfigApi *pResource) { - pResource->__vgpuconfigapiPreDestruct__(pResource); +static inline void vgpuconfigapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VgpuConfigApi *pResource, RsResourceRef *pReference) { + pResource->__vgpuconfigapiAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NV_STATUS vgpuconfigapiIsDuplicate_DISPATCH(struct VgpuConfigApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__vgpuconfigapiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline PEVENTNOTIFICATION * vgpuconfigapiGetNotificationListPtr_DISPATCH(struct VgpuConfigApi *pNotifier) { + return pNotifier->__vgpuconfigapiGetNotificationListPtr__(pNotifier); } -static inline void vgpuconfigapiControlSerialization_Epilogue_DISPATCH(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vgpuconfigapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline struct NotifShare * vgpuconfigapiGetNotificationShare_DISPATCH(struct VgpuConfigApi *pNotifier) { + return pNotifier->__vgpuconfigapiGetNotificationShare__(pNotifier); } -static inline PEVENTNOTIFICATION *vgpuconfigapiGetNotificationListPtr_DISPATCH(struct VgpuConfigApi *pNotifier) { - return pNotifier->__vgpuconfigapiGetNotificationListPtr__(pNotifier); +static inline void vgpuconfigapiSetNotificationShare_DISPATCH(struct VgpuConfigApi *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__vgpuconfigapiSetNotificationShare__(pNotifier, pNotifShare); } -static inline struct NotifShare *vgpuconfigapiGetNotificationShare_DISPATCH(struct VgpuConfigApi *pNotifier) { - return pNotifier->__vgpuconfigapiGetNotificationShare__(pNotifier); +static inline NV_STATUS vgpuconfigapiUnregisterEvent_DISPATCH(struct VgpuConfigApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__vgpuconfigapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static inline NV_STATUS vgpuconfigapiMap_DISPATCH(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__vgpuconfigapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS vgpuconfigapiGetOrAllocNotifShare_DISPATCH(struct VgpuConfigApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return pNotifier->__vgpuconfigapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } -static inline NvBool vgpuconfigapiAccessCallback_DISPATCH(struct VgpuConfigApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__vgpuconfigapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); -} +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigSetInfo_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_INFO_PARAMS *pParams); + +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigEnumerateVgpuPerPgpu_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_ENUMERATE_VGPU_PER_PGPU_PARAMS *pParams); + +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetVgpuTypeInfo_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_TYPE_INFO_PARAMS *pParams); + +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetSupportedVgpuTypes_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_TYPES_PARAMS *pParams); + +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetCreatableVgpuTypes_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_TYPES_PARAMS *pParams); + +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigEventSetNotification_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_EVENT_SET_NOTIFICATION_PARAMS *pSetEventParams); + +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigSetCapability_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_SET_CAPABILITY_PARAMS *pParams); + +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetCapability_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_GET_CAPABILITY_PARAMS *pParams); + +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetCreatablePlacements_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_CREATABLE_PLACEMENTS_PARAMS *pParams); + +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigUpdatePgpuInfo_IMPL(struct VgpuConfigApi *pVgpuConfigApi); + +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigSetVgpuInstanceEncoderCapacity_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_VGPU_INSTANCE_ENCODER_CAPACITY_PARAMS *pEncoderParams); + +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetVgpuFbUsage_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_FB_USAGE_PARAMS *pParams); + +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetMigrationCap_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_CMD_VGPU_CONFIG_GET_MIGRATION_CAP_PARAMS *pParams); + +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetHostFbReservation_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_HOST_FB_RESERVATION_PARAMS *pParams); + +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetPgpuMetadataString_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_PGPU_METADATA_STRING_PARAMS *pGpuMetadataStringParams); + +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetDoorbellEmulationSupport_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_DOORBELL_EMULATION_SUPPORT_PARAMS *pParams); + +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetFreeSwizzId_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_FREE_SWIZZID_PARAMS *pParams); + +NV_STATUS vgpuconfigapiCtrlCmdPgpuGetMultiVgpuSupportInfo_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_PGPU_GET_MULTI_VGPU_SUPPORT_INFO_PARAMS *pParams); + +NV_STATUS vgpuconfigapiCtrlCmdPgpuGetVgpuStreamingCapability_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_PGPU_GET_VGPU_STREAMING_CAPABILITY_PARAMS *pParams); + +NV_STATUS vgpuconfigapiCtrlCmdGetVgpuDriversCaps_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_GET_VGPU_DRIVER_CAPS_PARAMS *pParams); + +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigSetPgpuInfo_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_SET_PGPU_INFO_PARAMS *pParams); + +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigValidateSwizzId_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_VALIDATE_SWIZZID_PARAMS *pParams); + +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_UPDATE_HETEROGENEOUS_INFO_PARAMS *pParams); + +NV_STATUS vgpuconfigapiCtrlCmdVgpuSetVmName_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_SET_VM_NAME_PARAMS *pParams); NV_STATUS vgpuconfigapiConstruct_IMPL(struct VgpuConfigApi *arg_pResource, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_video_mem_nvoc.c b/src/nvidia/generated/g_video_mem_nvoc.c index e65fc0f45c..60336abc88 100644 --- a/src/nvidia/generated/g_video_mem_nvoc.c +++ b/src/nvidia/generated/g_video_mem_nvoc.c @@ -102,110 +102,142 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_VideoMemory = /*pExportInfo=*/ &__nvoc_export_info_VideoMemory }; -static NV_STATUS __nvoc_thunk_VideoMemory_memCheckCopyPermissions(struct Memory *pVideoMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return vidmemCheckCopyPermissions((struct VideoMemory *)(((unsigned char *)pVideoMemory) - __nvoc_rtti_VideoMemory_Memory.offset), pDstGpu, pDstDevice); +// 1 down-thunk(s) defined to bridge methods in VideoMemory from superclasses + +// vidmemCheckCopyPermissions: virtual override (mem) base (stdmem) +static NV_STATUS __nvoc_down_thunk_VideoMemory_memCheckCopyPermissions(struct Memory *pVideoMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return vidmemCheckCopyPermissions((struct VideoMemory *)(((unsigned char *) pVideoMemory) - __nvoc_rtti_VideoMemory_Memory.offset), pDstGpu, pDstDevice); } -static NV_STATUS __nvoc_thunk_Memory_vidmemCheckMemInterUnmap(struct VideoMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), bSubdeviceHandleProvided); + +// 25 up-thunk(s) defined to bridge methods in VideoMemory to superclasses + +// vidmemCanCopy: virtual inherited (stdmem) base (stdmem) +static NvBool __nvoc_up_thunk_StandardMemory_vidmemCanCopy(struct VideoMemory *pStandardMemory) { + return stdmemCanCopy((struct StandardMemory *)(((unsigned char *) pStandardMemory) + __nvoc_rtti_VideoMemory_StandardMemory.offset)); } -static NvBool __nvoc_thunk_RmResource_vidmemShareCallback(struct VideoMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VideoMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// vidmemIsDuplicate: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_vidmemIsDuplicate(struct VideoMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RsResource_vidmemMapTo(struct VideoMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VideoMemory_RsResource.offset), pParams); +// vidmemGetMapAddrSpace: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_vidmemGetMapAddrSpace(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_Memory_vidmemGetMapAddrSpace(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return memGetMapAddrSpace((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); +// vidmemControl: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_vidmemControl(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_Memory_vidmemIsExportAllowed(struct VideoMemory *pMemory) { - return memIsExportAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VideoMemory_Memory.offset)); +// vidmemMap: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_vidmemMap(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } -static NvU32 __nvoc_thunk_RsResource_vidmemGetRefCount(struct VideoMemory *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VideoMemory_RsResource.offset)); +// vidmemUnmap: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_vidmemUnmap(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_RsResource_vidmemAddAdditionalDependants(struct RsClient *pClient, struct VideoMemory *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VideoMemory_RsResource.offset), pReference); +// vidmemGetMemInterMapParams: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_vidmemGetMemInterMapParams(struct VideoMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), pParams); } -static NV_STATUS __nvoc_thunk_RmResource_vidmemControl_Prologue(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VideoMemory_RmResource.offset), pCallContext, pParams); +// vidmemCheckMemInterUnmap: inline virtual inherited (mem) base (stdmem) body +static NV_STATUS __nvoc_up_thunk_Memory_vidmemCheckMemInterUnmap(struct VideoMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), bSubdeviceHandleProvided); } -static NvBool __nvoc_thunk_Memory_vidmemIsGpuMapAllowed(struct VideoMemory *pMemory, struct OBJGPU *pGpu) { - return memIsGpuMapAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), pGpu); +// vidmemGetMemoryMappingDescriptor: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_vidmemGetMemoryMappingDescriptor(struct VideoMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_RsResource_vidmemUnmapFrom(struct VideoMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VideoMemory_RsResource.offset), pParams); +// vidmemIsReady: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_vidmemIsReady(struct VideoMemory *pMemory, NvBool bCopyConstructorContext) { + return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), bCopyConstructorContext); } -static void __nvoc_thunk_RmResource_vidmemControl_Epilogue(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VideoMemory_RmResource.offset), pCallContext, pParams); +// vidmemIsGpuMapAllowed: inline virtual inherited (mem) base (stdmem) body +static NvBool __nvoc_up_thunk_Memory_vidmemIsGpuMapAllowed(struct VideoMemory *pMemory, struct OBJGPU *pGpu) { + return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), pGpu); } -static NV_STATUS __nvoc_thunk_Memory_vidmemControl(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memControl((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), pCallContext, pParams); +// vidmemIsExportAllowed: inline virtual inherited (mem) base (stdmem) body +static NvBool __nvoc_up_thunk_Memory_vidmemIsExportAllowed(struct VideoMemory *pMemory) { + return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset)); } -static NV_STATUS __nvoc_thunk_Memory_vidmemUnmap(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), pCallContext, pCpuMapping); +// vidmemAccessCallback: virtual inherited (rmres) base (stdmem) +static NvBool __nvoc_up_thunk_RmResource_vidmemAccessCallback(struct VideoMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_Memory_vidmemGetMemInterMapParams(struct VideoMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), pParams); +// vidmemShareCallback: virtual inherited (rmres) base (stdmem) +static NvBool __nvoc_up_thunk_RmResource_vidmemShareCallback(struct VideoMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NV_STATUS __nvoc_thunk_Memory_vidmemGetMemoryMappingDescriptor(struct VideoMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), ppMemDesc); +// vidmemControlSerialization_Prologue: virtual inherited (rmres) base (stdmem) +static NV_STATUS __nvoc_up_thunk_RmResource_vidmemControlSerialization_Prologue(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_vidmemControlFilter(struct VideoMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VideoMemory_RsResource.offset), pCallContext, pParams); +// vidmemControlSerialization_Epilogue: virtual inherited (rmres) base (stdmem) +static void __nvoc_up_thunk_RmResource_vidmemControlSerialization_Epilogue(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_vidmemControlSerialization_Prologue(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VideoMemory_RmResource.offset), pCallContext, pParams); +// vidmemControl_Prologue: virtual inherited (rmres) base (stdmem) +static NV_STATUS __nvoc_up_thunk_RmResource_vidmemControl_Prologue(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_StandardMemory_vidmemCanCopy(struct VideoMemory *pStandardMemory) { - return stdmemCanCopy((struct StandardMemory *)(((unsigned char *)pStandardMemory) + __nvoc_rtti_VideoMemory_StandardMemory.offset)); +// vidmemControl_Epilogue: virtual inherited (rmres) base (stdmem) +static void __nvoc_up_thunk_RmResource_vidmemControl_Epilogue(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RmResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_vidmemIsPartialUnmapSupported(struct VideoMemory *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VideoMemory_RsResource.offset)); +// vidmemPreDestruct: virtual inherited (res) base (stdmem) +static void __nvoc_up_thunk_RsResource_vidmemPreDestruct(struct VideoMemory *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_vidmemIsReady(struct VideoMemory *pMemory, NvBool bCopyConstructorContext) { - return memIsReady((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), bCopyConstructorContext); +// vidmemControlFilter: virtual inherited (res) base (stdmem) +static NV_STATUS __nvoc_up_thunk_RsResource_vidmemControlFilter(struct VideoMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RsResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_vidmemPreDestruct(struct VideoMemory *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VideoMemory_RsResource.offset)); +// vidmemIsPartialUnmapSupported: inline virtual inherited (res) base (stdmem) body +static NvBool __nvoc_up_thunk_RsResource_vidmemIsPartialUnmapSupported(struct VideoMemory *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_vidmemIsDuplicate(struct VideoMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), hMemory, pDuplicate); +// vidmemMapTo: virtual inherited (res) base (stdmem) +static NV_STATUS __nvoc_up_thunk_RsResource_vidmemMapTo(struct VideoMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_vidmemControlSerialization_Epilogue(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VideoMemory_RmResource.offset), pCallContext, pParams); +// vidmemUnmapFrom: virtual inherited (res) base (stdmem) +static NV_STATUS __nvoc_up_thunk_RsResource_vidmemUnmapFrom(struct VideoMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_Memory_vidmemMap(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), pCallContext, pParams, pCpuMapping); +// vidmemGetRefCount: virtual inherited (res) base (stdmem) +static NvU32 __nvoc_up_thunk_RsResource_vidmemGetRefCount(struct VideoMemory *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_vidmemAccessCallback(struct VideoMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VideoMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// vidmemAddAdditionalDependants: virtual inherited (res) base (stdmem) +static void __nvoc_up_thunk_RsResource_vidmemAddAdditionalDependants(struct RsClient *pClient, struct VideoMemory *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_VideoMemory = { /*numEntries=*/ 0, @@ -242,65 +274,95 @@ NV_STATUS __nvoc_ctor_VideoMemory(VideoMemory *pThis, CALL_CONTEXT * arg_pCallCo return status; } +// Vtable initialization static void __nvoc_init_funcTable_VideoMemory_1(VideoMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // vidmemCheckCopyPermissions -- virtual override (mem) base (stdmem) pThis->__vidmemCheckCopyPermissions__ = &vidmemCheckCopyPermissions_IMPL; + pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckCopyPermissions__ = &__nvoc_down_thunk_VideoMemory_memCheckCopyPermissions; - pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckCopyPermissions__ = &__nvoc_thunk_VideoMemory_memCheckCopyPermissions; + // vidmemCanCopy -- virtual inherited (stdmem) base (stdmem) + pThis->__vidmemCanCopy__ = &__nvoc_up_thunk_StandardMemory_vidmemCanCopy; - pThis->__vidmemCheckMemInterUnmap__ = &__nvoc_thunk_Memory_vidmemCheckMemInterUnmap; + // vidmemIsDuplicate -- virtual inherited (mem) base (stdmem) + pThis->__vidmemIsDuplicate__ = &__nvoc_up_thunk_Memory_vidmemIsDuplicate; - pThis->__vidmemShareCallback__ = &__nvoc_thunk_RmResource_vidmemShareCallback; + // vidmemGetMapAddrSpace -- virtual inherited (mem) base (stdmem) + pThis->__vidmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_vidmemGetMapAddrSpace; - pThis->__vidmemMapTo__ = &__nvoc_thunk_RsResource_vidmemMapTo; + // vidmemControl -- virtual inherited (mem) base (stdmem) + pThis->__vidmemControl__ = &__nvoc_up_thunk_Memory_vidmemControl; - pThis->__vidmemGetMapAddrSpace__ = &__nvoc_thunk_Memory_vidmemGetMapAddrSpace; + // vidmemMap -- virtual inherited (mem) base (stdmem) + pThis->__vidmemMap__ = &__nvoc_up_thunk_Memory_vidmemMap; - pThis->__vidmemIsExportAllowed__ = &__nvoc_thunk_Memory_vidmemIsExportAllowed; + // vidmemUnmap -- virtual inherited (mem) base (stdmem) + pThis->__vidmemUnmap__ = &__nvoc_up_thunk_Memory_vidmemUnmap; - pThis->__vidmemGetRefCount__ = &__nvoc_thunk_RsResource_vidmemGetRefCount; + // vidmemGetMemInterMapParams -- virtual inherited (mem) base (stdmem) + pThis->__vidmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_vidmemGetMemInterMapParams; - pThis->__vidmemAddAdditionalDependants__ = &__nvoc_thunk_RsResource_vidmemAddAdditionalDependants; + // vidmemCheckMemInterUnmap -- inline virtual inherited (mem) base (stdmem) body + pThis->__vidmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_vidmemCheckMemInterUnmap; - pThis->__vidmemControl_Prologue__ = &__nvoc_thunk_RmResource_vidmemControl_Prologue; + // vidmemGetMemoryMappingDescriptor -- virtual inherited (mem) base (stdmem) + pThis->__vidmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_vidmemGetMemoryMappingDescriptor; - pThis->__vidmemIsGpuMapAllowed__ = &__nvoc_thunk_Memory_vidmemIsGpuMapAllowed; + // vidmemIsReady -- virtual inherited (mem) base (stdmem) + pThis->__vidmemIsReady__ = &__nvoc_up_thunk_Memory_vidmemIsReady; - pThis->__vidmemUnmapFrom__ = &__nvoc_thunk_RsResource_vidmemUnmapFrom; + // vidmemIsGpuMapAllowed -- inline virtual inherited (mem) base (stdmem) body + pThis->__vidmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_vidmemIsGpuMapAllowed; - pThis->__vidmemControl_Epilogue__ = &__nvoc_thunk_RmResource_vidmemControl_Epilogue; + // vidmemIsExportAllowed -- inline virtual inherited (mem) base (stdmem) body + pThis->__vidmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_vidmemIsExportAllowed; - pThis->__vidmemControl__ = &__nvoc_thunk_Memory_vidmemControl; + // vidmemAccessCallback -- virtual inherited (rmres) base (stdmem) + pThis->__vidmemAccessCallback__ = &__nvoc_up_thunk_RmResource_vidmemAccessCallback; - pThis->__vidmemUnmap__ = &__nvoc_thunk_Memory_vidmemUnmap; + // vidmemShareCallback -- virtual inherited (rmres) base (stdmem) + pThis->__vidmemShareCallback__ = &__nvoc_up_thunk_RmResource_vidmemShareCallback; - pThis->__vidmemGetMemInterMapParams__ = &__nvoc_thunk_Memory_vidmemGetMemInterMapParams; + // vidmemControlSerialization_Prologue -- virtual inherited (rmres) base (stdmem) + pThis->__vidmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vidmemControlSerialization_Prologue; - pThis->__vidmemGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_vidmemGetMemoryMappingDescriptor; + // vidmemControlSerialization_Epilogue -- virtual inherited (rmres) base (stdmem) + pThis->__vidmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vidmemControlSerialization_Epilogue; - pThis->__vidmemControlFilter__ = &__nvoc_thunk_RsResource_vidmemControlFilter; + // vidmemControl_Prologue -- virtual inherited (rmres) base (stdmem) + pThis->__vidmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_vidmemControl_Prologue; - pThis->__vidmemControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_vidmemControlSerialization_Prologue; + // vidmemControl_Epilogue -- virtual inherited (rmres) base (stdmem) + pThis->__vidmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vidmemControl_Epilogue; - pThis->__vidmemCanCopy__ = &__nvoc_thunk_StandardMemory_vidmemCanCopy; + // vidmemPreDestruct -- virtual inherited (res) base (stdmem) + pThis->__vidmemPreDestruct__ = &__nvoc_up_thunk_RsResource_vidmemPreDestruct; - pThis->__vidmemIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_vidmemIsPartialUnmapSupported; + // vidmemControlFilter -- virtual inherited (res) base (stdmem) + pThis->__vidmemControlFilter__ = &__nvoc_up_thunk_RsResource_vidmemControlFilter; - pThis->__vidmemIsReady__ = &__nvoc_thunk_Memory_vidmemIsReady; + // vidmemIsPartialUnmapSupported -- inline virtual inherited (res) base (stdmem) body + pThis->__vidmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_vidmemIsPartialUnmapSupported; - pThis->__vidmemPreDestruct__ = &__nvoc_thunk_RsResource_vidmemPreDestruct; + // vidmemMapTo -- virtual inherited (res) base (stdmem) + pThis->__vidmemMapTo__ = &__nvoc_up_thunk_RsResource_vidmemMapTo; - pThis->__vidmemIsDuplicate__ = &__nvoc_thunk_Memory_vidmemIsDuplicate; + // vidmemUnmapFrom -- virtual inherited (res) base (stdmem) + pThis->__vidmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_vidmemUnmapFrom; - pThis->__vidmemControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_vidmemControlSerialization_Epilogue; + // vidmemGetRefCount -- virtual inherited (res) base (stdmem) + pThis->__vidmemGetRefCount__ = &__nvoc_up_thunk_RsResource_vidmemGetRefCount; - pThis->__vidmemMap__ = &__nvoc_thunk_Memory_vidmemMap; + // vidmemAddAdditionalDependants -- virtual inherited (res) base (stdmem) + pThis->__vidmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vidmemAddAdditionalDependants; +} // End __nvoc_init_funcTable_VideoMemory_1 with approximately 27 basic block(s). - pThis->__vidmemAccessCallback__ = &__nvoc_thunk_RmResource_vidmemAccessCallback; -} +// Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_VideoMemory(VideoMemory *pThis) { + + // Initialize vtable(s) with 26 per-object function pointer(s). __nvoc_init_funcTable_VideoMemory_1(pThis); } diff --git a/src/nvidia/generated/g_video_mem_nvoc.h b/src/nvidia/generated/g_video_mem_nvoc.h index baf46af861..02f63ec7fe 100644 --- a/src/nvidia/generated/g_video_mem_nvoc.h +++ b/src/nvidia/generated/g_video_mem_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_VIDEO_MEM_NVOC_H_ #define _G_VIDEO_MEM_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_video_mem_nvoc.h" #ifndef _VIDEO_MEMORY_H_ @@ -38,6 +46,7 @@ extern "C" { #include "gpu/mem_mgr/heap_base.h" typedef struct PMA_ALLOC_INFO PMA_ALLOC_INFO; + struct Device; #ifndef __NVOC_CLASS_Device_TYPEDEF__ @@ -61,42 +70,51 @@ typedef struct Device Device; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct VideoMemory { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct StandardMemory __nvoc_base_StandardMemory; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Memory *__nvoc_pbase_Memory; - struct StandardMemory *__nvoc_pbase_StandardMemory; - struct VideoMemory *__nvoc_pbase_VideoMemory; - NV_STATUS (*__vidmemCheckCopyPermissions__)(struct VideoMemory *, struct OBJGPU *, struct Device *); - NV_STATUS (*__vidmemCheckMemInterUnmap__)(struct VideoMemory *, NvBool); - NvBool (*__vidmemShareCallback__)(struct VideoMemory *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__vidmemMapTo__)(struct VideoMemory *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__vidmemGetMapAddrSpace__)(struct VideoMemory *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvBool (*__vidmemIsExportAllowed__)(struct VideoMemory *); - NvU32 (*__vidmemGetRefCount__)(struct VideoMemory *); - void (*__vidmemAddAdditionalDependants__)(struct RsClient *, struct VideoMemory *, RsResourceRef *); - NV_STATUS (*__vidmemControl_Prologue__)(struct VideoMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__vidmemIsGpuMapAllowed__)(struct VideoMemory *, struct OBJGPU *); - NV_STATUS (*__vidmemUnmapFrom__)(struct VideoMemory *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__vidmemControl_Epilogue__)(struct VideoMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vidmemControl__)(struct VideoMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vidmemUnmap__)(struct VideoMemory *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__vidmemGetMemInterMapParams__)(struct VideoMemory *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__vidmemGetMemoryMappingDescriptor__)(struct VideoMemory *, MEMORY_DESCRIPTOR **); - NV_STATUS (*__vidmemControlFilter__)(struct VideoMemory *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vidmemControlSerialization_Prologue__)(struct VideoMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__vidmemCanCopy__)(struct VideoMemory *); - NvBool (*__vidmemIsPartialUnmapSupported__)(struct VideoMemory *); - NV_STATUS (*__vidmemIsReady__)(struct VideoMemory *, NvBool); - void (*__vidmemPreDestruct__)(struct VideoMemory *); - NV_STATUS (*__vidmemIsDuplicate__)(struct VideoMemory *, NvHandle, NvBool *); - void (*__vidmemControlSerialization_Epilogue__)(struct VideoMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vidmemMap__)(struct VideoMemory *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__vidmemAccessCallback__)(struct VideoMemory *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct Memory *__nvoc_pbase_Memory; // mem super^2 + struct StandardMemory *__nvoc_pbase_StandardMemory; // stdmem super + struct VideoMemory *__nvoc_pbase_VideoMemory; // vidmem + + // Vtable with 26 per-object function pointers + NV_STATUS (*__vidmemCheckCopyPermissions__)(struct VideoMemory * /*this*/, struct OBJGPU *, struct Device *); // virtual override (mem) base (stdmem) + NvBool (*__vidmemCanCopy__)(struct VideoMemory * /*this*/); // virtual inherited (stdmem) base (stdmem) + NV_STATUS (*__vidmemIsDuplicate__)(struct VideoMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__vidmemGetMapAddrSpace__)(struct VideoMemory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__vidmemControl__)(struct VideoMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__vidmemMap__)(struct VideoMemory * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__vidmemUnmap__)(struct VideoMemory * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__vidmemGetMemInterMapParams__)(struct VideoMemory * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__vidmemCheckMemInterUnmap__)(struct VideoMemory * /*this*/, NvBool); // inline virtual inherited (mem) base (stdmem) body + NV_STATUS (*__vidmemGetMemoryMappingDescriptor__)(struct VideoMemory * /*this*/, MEMORY_DESCRIPTOR **); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__vidmemIsReady__)(struct VideoMemory * /*this*/, NvBool); // virtual inherited (mem) base (stdmem) + NvBool (*__vidmemIsGpuMapAllowed__)(struct VideoMemory * /*this*/, struct OBJGPU *); // inline virtual inherited (mem) base (stdmem) body + NvBool (*__vidmemIsExportAllowed__)(struct VideoMemory * /*this*/); // inline virtual inherited (mem) base (stdmem) body + NvBool (*__vidmemAccessCallback__)(struct VideoMemory * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (stdmem) + NvBool (*__vidmemShareCallback__)(struct VideoMemory * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (stdmem) + NV_STATUS (*__vidmemControlSerialization_Prologue__)(struct VideoMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (stdmem) + void (*__vidmemControlSerialization_Epilogue__)(struct VideoMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (stdmem) + NV_STATUS (*__vidmemControl_Prologue__)(struct VideoMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (stdmem) + void (*__vidmemControl_Epilogue__)(struct VideoMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (stdmem) + void (*__vidmemPreDestruct__)(struct VideoMemory * /*this*/); // virtual inherited (res) base (stdmem) + NV_STATUS (*__vidmemControlFilter__)(struct VideoMemory * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (stdmem) + NvBool (*__vidmemIsPartialUnmapSupported__)(struct VideoMemory * /*this*/); // inline virtual inherited (res) base (stdmem) body + NV_STATUS (*__vidmemMapTo__)(struct VideoMemory * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (stdmem) + NV_STATUS (*__vidmemUnmapFrom__)(struct VideoMemory * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (stdmem) + NvU32 (*__vidmemGetRefCount__)(struct VideoMemory * /*this*/); // virtual inherited (res) base (stdmem) + void (*__vidmemAddAdditionalDependants__)(struct RsClient *, struct VideoMemory * /*this*/, RsResourceRef *); // virtual inherited (res) base (stdmem) }; #ifndef __NVOC_CLASS_VideoMemory_TYPEDEF__ @@ -108,6 +126,7 @@ typedef struct VideoMemory VideoMemory; #define __nvoc_class_id_VideoMemory 0xed948f #endif /* __nvoc_class_id_VideoMemory */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_VideoMemory; #define __staticCast_VideoMemory(pThis) \ @@ -120,145 +139,174 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_VideoMemory; ((VideoMemory*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(VideoMemory))) #endif //__nvoc_video_mem_h_disabled - NV_STATUS __nvoc_objCreateDynamic_VideoMemory(VideoMemory**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_VideoMemory(VideoMemory**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_VideoMemory(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_VideoMemory((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define vidmemCheckCopyPermissions_FNPTR(pVideoMemory) pVideoMemory->__vidmemCheckCopyPermissions__ #define vidmemCheckCopyPermissions(pVideoMemory, pDstGpu, pDstDevice) vidmemCheckCopyPermissions_DISPATCH(pVideoMemory, pDstGpu, pDstDevice) -#define vidmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) vidmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define vidmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) vidmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define vidmemMapTo(pResource, pParams) vidmemMapTo_DISPATCH(pResource, pParams) +#define vidmemCanCopy_FNPTR(pStandardMemory) pStandardMemory->__nvoc_base_StandardMemory.__stdmemCanCopy__ +#define vidmemCanCopy(pStandardMemory) vidmemCanCopy_DISPATCH(pStandardMemory) +#define vidmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsDuplicate__ +#define vidmemIsDuplicate(pMemory, hMemory, pDuplicate) vidmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) +#define vidmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMapAddrSpace__ #define vidmemGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) vidmemGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define vidmemIsExportAllowed(pMemory) vidmemIsExportAllowed_DISPATCH(pMemory) -#define vidmemGetRefCount(pResource) vidmemGetRefCount_DISPATCH(pResource) -#define vidmemAddAdditionalDependants(pClient, pResource, pReference) vidmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define vidmemControl_Prologue(pResource, pCallContext, pParams) vidmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define vidmemIsGpuMapAllowed(pMemory, pGpu) vidmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define vidmemUnmapFrom(pResource, pParams) vidmemUnmapFrom_DISPATCH(pResource, pParams) -#define vidmemControl_Epilogue(pResource, pCallContext, pParams) vidmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vidmemControl_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memControl__ #define vidmemControl(pMemory, pCallContext, pParams) vidmemControl_DISPATCH(pMemory, pCallContext, pParams) +#define vidmemMap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memMap__ +#define vidmemMap(pMemory, pCallContext, pParams, pCpuMapping) vidmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define vidmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memUnmap__ #define vidmemUnmap(pMemory, pCallContext, pCpuMapping) vidmemUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) +#define vidmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMemInterMapParams__ #define vidmemGetMemInterMapParams(pMemory, pParams) vidmemGetMemInterMapParams_DISPATCH(pMemory, pParams) +#define vidmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define vidmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) vidmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) +#define vidmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ #define vidmemGetMemoryMappingDescriptor(pMemory, ppMemDesc) vidmemGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define vidmemControlFilter(pResource, pCallContext, pParams) vidmemControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define vidmemControlSerialization_Prologue(pResource, pCallContext, pParams) vidmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define vidmemCanCopy(pStandardMemory) vidmemCanCopy_DISPATCH(pStandardMemory) -#define vidmemIsPartialUnmapSupported(pResource) vidmemIsPartialUnmapSupported_DISPATCH(pResource) +#define vidmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsReady__ #define vidmemIsReady(pMemory, bCopyConstructorContext) vidmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define vidmemPreDestruct(pResource) vidmemPreDestruct_DISPATCH(pResource) -#define vidmemIsDuplicate(pMemory, hMemory, pDuplicate) vidmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define vidmemControlSerialization_Epilogue(pResource, pCallContext, pParams) vidmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define vidmemMap(pMemory, pCallContext, pParams, pCpuMapping) vidmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define vidmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define vidmemIsGpuMapAllowed(pMemory, pGpu) vidmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) +#define vidmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsExportAllowed__ +#define vidmemIsExportAllowed(pMemory) vidmemIsExportAllowed_DISPATCH(pMemory) +#define vidmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ #define vidmemAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) vidmemAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS vidmemCheckCopyPermissions_IMPL(struct VideoMemory *pVideoMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); +#define vidmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define vidmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) vidmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define vidmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define vidmemControlSerialization_Prologue(pResource, pCallContext, pParams) vidmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define vidmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define vidmemControlSerialization_Epilogue(pResource, pCallContext, pParams) vidmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vidmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define vidmemControl_Prologue(pResource, pCallContext, pParams) vidmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define vidmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define vidmemControl_Epilogue(pResource, pCallContext, pParams) vidmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vidmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define vidmemPreDestruct(pResource) vidmemPreDestruct_DISPATCH(pResource) +#define vidmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define vidmemControlFilter(pResource, pCallContext, pParams) vidmemControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define vidmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define vidmemIsPartialUnmapSupported(pResource) vidmemIsPartialUnmapSupported_DISPATCH(pResource) +#define vidmemMapTo_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define vidmemMapTo(pResource, pParams) vidmemMapTo_DISPATCH(pResource, pParams) +#define vidmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define vidmemUnmapFrom(pResource, pParams) vidmemUnmapFrom_DISPATCH(pResource, pParams) +#define vidmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define vidmemGetRefCount(pResource) vidmemGetRefCount_DISPATCH(pResource) +#define vidmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define vidmemAddAdditionalDependants(pClient, pResource, pReference) vidmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS vidmemCheckCopyPermissions_DISPATCH(struct VideoMemory *pVideoMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return pVideoMemory->__vidmemCheckCopyPermissions__(pVideoMemory, pDstGpu, pDstDevice); } -static inline NV_STATUS vidmemCheckMemInterUnmap_DISPATCH(struct VideoMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__vidmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); -} - -static inline NvBool vidmemShareCallback_DISPATCH(struct VideoMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__vidmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NvBool vidmemCanCopy_DISPATCH(struct VideoMemory *pStandardMemory) { + return pStandardMemory->__vidmemCanCopy__(pStandardMemory); } -static inline NV_STATUS vidmemMapTo_DISPATCH(struct VideoMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__vidmemMapTo__(pResource, pParams); +static inline NV_STATUS vidmemIsDuplicate_DISPATCH(struct VideoMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return pMemory->__vidmemIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS vidmemGetMapAddrSpace_DISPATCH(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pMemory->__vidmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } -static inline NvBool vidmemIsExportAllowed_DISPATCH(struct VideoMemory *pMemory) { - return pMemory->__vidmemIsExportAllowed__(pMemory); -} - -static inline NvU32 vidmemGetRefCount_DISPATCH(struct VideoMemory *pResource) { - return pResource->__vidmemGetRefCount__(pResource); +static inline NV_STATUS vidmemControl_DISPATCH(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pMemory->__vidmemControl__(pMemory, pCallContext, pParams); } -static inline void vidmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VideoMemory *pResource, RsResourceRef *pReference) { - pResource->__vidmemAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS vidmemMap_DISPATCH(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pMemory->__vidmemMap__(pMemory, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS vidmemControl_Prologue_DISPATCH(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vidmemControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS vidmemUnmap_DISPATCH(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pMemory->__vidmemUnmap__(pMemory, pCallContext, pCpuMapping); } -static inline NvBool vidmemIsGpuMapAllowed_DISPATCH(struct VideoMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__vidmemIsGpuMapAllowed__(pMemory, pGpu); +static inline NV_STATUS vidmemGetMemInterMapParams_DISPATCH(struct VideoMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pMemory->__vidmemGetMemInterMapParams__(pMemory, pParams); } -static inline NV_STATUS vidmemUnmapFrom_DISPATCH(struct VideoMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__vidmemUnmapFrom__(pResource, pParams); +static inline NV_STATUS vidmemCheckMemInterUnmap_DISPATCH(struct VideoMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return pMemory->__vidmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } -static inline void vidmemControl_Epilogue_DISPATCH(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vidmemControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS vidmemGetMemoryMappingDescriptor_DISPATCH(struct VideoMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return pMemory->__vidmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } -static inline NV_STATUS vidmemControl_DISPATCH(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__vidmemControl__(pMemory, pCallContext, pParams); +static inline NV_STATUS vidmemIsReady_DISPATCH(struct VideoMemory *pMemory, NvBool bCopyConstructorContext) { + return pMemory->__vidmemIsReady__(pMemory, bCopyConstructorContext); } -static inline NV_STATUS vidmemUnmap_DISPATCH(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__vidmemUnmap__(pMemory, pCallContext, pCpuMapping); +static inline NvBool vidmemIsGpuMapAllowed_DISPATCH(struct VideoMemory *pMemory, struct OBJGPU *pGpu) { + return pMemory->__vidmemIsGpuMapAllowed__(pMemory, pGpu); } -static inline NV_STATUS vidmemGetMemInterMapParams_DISPATCH(struct VideoMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__vidmemGetMemInterMapParams__(pMemory, pParams); +static inline NvBool vidmemIsExportAllowed_DISPATCH(struct VideoMemory *pMemory) { + return pMemory->__vidmemIsExportAllowed__(pMemory); } -static inline NV_STATUS vidmemGetMemoryMappingDescriptor_DISPATCH(struct VideoMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__vidmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); +static inline NvBool vidmemAccessCallback_DISPATCH(struct VideoMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__vidmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS vidmemControlFilter_DISPATCH(struct VideoMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vidmemControlFilter__(pResource, pCallContext, pParams); +static inline NvBool vidmemShareCallback_DISPATCH(struct VideoMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__vidmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS vidmemControlSerialization_Prologue_DISPATCH(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__vidmemControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool vidmemCanCopy_DISPATCH(struct VideoMemory *pStandardMemory) { - return pStandardMemory->__vidmemCanCopy__(pStandardMemory); +static inline void vidmemControlSerialization_Epilogue_DISPATCH(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__vidmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NvBool vidmemIsPartialUnmapSupported_DISPATCH(struct VideoMemory *pResource) { - return pResource->__vidmemIsPartialUnmapSupported__(pResource); +static inline NV_STATUS vidmemControl_Prologue_DISPATCH(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__vidmemControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS vidmemIsReady_DISPATCH(struct VideoMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__vidmemIsReady__(pMemory, bCopyConstructorContext); +static inline void vidmemControl_Epilogue_DISPATCH(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__vidmemControl_Epilogue__(pResource, pCallContext, pParams); } static inline void vidmemPreDestruct_DISPATCH(struct VideoMemory *pResource) { pResource->__vidmemPreDestruct__(pResource); } -static inline NV_STATUS vidmemIsDuplicate_DISPATCH(struct VideoMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__vidmemIsDuplicate__(pMemory, hMemory, pDuplicate); +static inline NV_STATUS vidmemControlFilter_DISPATCH(struct VideoMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__vidmemControlFilter__(pResource, pCallContext, pParams); } -static inline void vidmemControlSerialization_Epilogue_DISPATCH(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vidmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvBool vidmemIsPartialUnmapSupported_DISPATCH(struct VideoMemory *pResource) { + return pResource->__vidmemIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS vidmemMap_DISPATCH(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__vidmemMap__(pMemory, pCallContext, pParams, pCpuMapping); +static inline NV_STATUS vidmemMapTo_DISPATCH(struct VideoMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__vidmemMapTo__(pResource, pParams); } -static inline NvBool vidmemAccessCallback_DISPATCH(struct VideoMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__vidmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline NV_STATUS vidmemUnmapFrom_DISPATCH(struct VideoMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__vidmemUnmapFrom__(pResource, pParams); } +static inline NvU32 vidmemGetRefCount_DISPATCH(struct VideoMemory *pResource) { + return pResource->__vidmemGetRefCount__(pResource); +} + +static inline void vidmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VideoMemory *pResource, RsResourceRef *pReference) { + pResource->__vidmemAddAdditionalDependants__(pClient, pResource, pReference); +} + +NV_STATUS vidmemCheckCopyPermissions_IMPL(struct VideoMemory *pVideoMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); + NV_STATUS vidmemConstruct_IMPL(struct VideoMemory *arg_pVideoMemory, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_vidmemConstruct(arg_pVideoMemory, arg_pCallContext, arg_pParams) vidmemConstruct_IMPL(arg_pVideoMemory, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_videoeventlist_nvoc.h b/src/nvidia/generated/g_videoeventlist_nvoc.h index 61fdd4adc1..d52223a7d6 100644 --- a/src/nvidia/generated/g_videoeventlist_nvoc.h +++ b/src/nvidia/generated/g_videoeventlist_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_VIDEOEVENTLIST_NVOC_H_ #define _G_VIDEOEVENTLIST_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_videoeventlist_nvoc.h" #ifndef VIDEO_EVENT_LIST_H @@ -47,6 +55,7 @@ extern "C" { #include "class/cl90cdvideo.h" #include "ctrl/ctrl2080/ctrl2080event.h" + struct EventBuffer; #ifndef __NVOC_CLASS_EventBuffer_TYPEDEF__ @@ -59,6 +68,7 @@ typedef struct EventBuffer EventBuffer; #endif /* __nvoc_class_id_EventBuffer */ + struct KernelChannel; #ifndef __NVOC_CLASS_KernelChannel_TYPEDEF__ diff --git a/src/nvidia/generated/g_vidmem_access_bit_buffer_nvoc.c b/src/nvidia/generated/g_vidmem_access_bit_buffer_nvoc.c index 009576fbf4..43f007ceca 100644 --- a/src/nvidia/generated/g_vidmem_access_bit_buffer_nvoc.c +++ b/src/nvidia/generated/g_vidmem_access_bit_buffer_nvoc.c @@ -111,149 +111,182 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_VidmemAccessBitBuffer = /*pExportInfo=*/ &__nvoc_export_info_VidmemAccessBitBuffer }; -static NvBool __nvoc_thunk_GpuResource_vidmemAccessBitBufShareCallback(struct VidmemAccessBitBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif -static NV_STATUS __nvoc_thunk_RmResource_vidmemAccessBitBufCheckMemInterUnmap(struct VidmemAccessBitBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), bSubdeviceHandleProvided); -} +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VidmemAccessBitBuffer[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x16040u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) vidmemAccessBitBufCtrlCmdVidmemAccessBitDump_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x16040u) + /*flags=*/ 0x16040u, + /*accessRight=*/0x0u, + /*methodId=*/ 0xc7630103u, + /*paramSize=*/ sizeof(NVC763_CTRL_VIDMEM_ACCESS_BIT_BUFFER_DUMP_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_VidmemAccessBitBuffer.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "vidmemAccessBitBufCtrlCmdVidmemAccessBitDump" +#endif + }, + +}; -static NV_STATUS __nvoc_thunk_Notifier_vidmemAccessBitBufGetOrAllocNotifShare(struct VidmemAccessBitBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_VidmemAccessBitBuffer_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +// 30 up-thunk(s) defined to bridge methods in VidmemAccessBitBuffer to superclasses + +// vidmemAccessBitBufControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufControl(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_vidmemAccessBitBufMapTo(struct VidmemAccessBitBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset), pParams); +// vidmemAccessBitBufMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufMap(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), pCallContext, pParams, pCpuMapping); } -static NV_STATUS __nvoc_thunk_GpuResource_vidmemAccessBitBufGetMapAddrSpace(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +// vidmemAccessBitBufUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufUnmap(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), pCallContext, pCpuMapping); } -static void __nvoc_thunk_Notifier_vidmemAccessBitBufSetNotificationShare(struct VidmemAccessBitBuffer *pNotifier, struct NotifShare *pNotifShare) { - notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_VidmemAccessBitBuffer_Notifier.offset), pNotifShare); +// vidmemAccessBitBufShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_vidmemAccessBitBufShareCallback(struct VidmemAccessBitBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NvU32 __nvoc_thunk_RsResource_vidmemAccessBitBufGetRefCount(struct VidmemAccessBitBuffer *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset)); +// vidmemAccessBitBufGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetRegBaseOffsetAndSize(struct VidmemAccessBitBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), pGpu, pOffset, pSize); } -static void __nvoc_thunk_RsResource_vidmemAccessBitBufAddAdditionalDependants(struct RsClient *pClient, struct VidmemAccessBitBuffer *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset), pReference); +// vidmemAccessBitBufGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetMapAddrSpace(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } -static NV_STATUS __nvoc_thunk_RmResource_vidmemAccessBitBufControl_Prologue(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), pCallContext, pParams); +// vidmemAccessBitBufInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufInternalControlForward(struct VidmemAccessBitBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), command, pParams, size); } -static NV_STATUS __nvoc_thunk_GpuResource_vidmemAccessBitBufGetRegBaseOffsetAndSize(struct VidmemAccessBitBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), pGpu, pOffset, pSize); +// vidmemAccessBitBufGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetInternalObjectHandle(struct VidmemAccessBitBuffer *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_vidmemAccessBitBufInternalControlForward(struct VidmemAccessBitBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), command, pParams, size); +// vidmemAccessBitBufAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_vidmemAccessBitBufAccessCallback(struct VidmemAccessBitBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RsResource_vidmemAccessBitBufUnmapFrom(struct VidmemAccessBitBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset), pParams); +// vidmemAccessBitBufGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vidmemAccessBitBufGetMemInterMapParams(struct VidmemAccessBitBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), pParams); } -static void __nvoc_thunk_RmResource_vidmemAccessBitBufControl_Epilogue(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), pCallContext, pParams); +// vidmemAccessBitBufCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vidmemAccessBitBufCheckMemInterUnmap(struct VidmemAccessBitBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), bSubdeviceHandleProvided); } -static NvHandle __nvoc_thunk_GpuResource_vidmemAccessBitBufGetInternalObjectHandle(struct VidmemAccessBitBuffer *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset)); +// vidmemAccessBitBufGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vidmemAccessBitBufGetMemoryMappingDescriptor(struct VidmemAccessBitBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_GpuResource_vidmemAccessBitBufControl(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), pCallContext, pParams); +// vidmemAccessBitBufControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vidmemAccessBitBufControlSerialization_Prologue(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_GpuResource_vidmemAccessBitBufUnmap(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), pCallContext, pCpuMapping); +// vidmemAccessBitBufControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_vidmemAccessBitBufControlSerialization_Epilogue(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_vidmemAccessBitBufGetMemInterMapParams(struct VidmemAccessBitBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), pParams); +// vidmemAccessBitBufControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_vidmemAccessBitBufControl_Prologue(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_vidmemAccessBitBufGetMemoryMappingDescriptor(struct VidmemAccessBitBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), ppMemDesc); +// vidmemAccessBitBufControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_vidmemAccessBitBufControl_Epilogue(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RsResource_vidmemAccessBitBufControlFilter(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset), pCallContext, pParams); +// vidmemAccessBitBufCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_vidmemAccessBitBufCanCopy(struct VidmemAccessBitBuffer *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Notifier_vidmemAccessBitBufUnregisterEvent(struct VidmemAccessBitBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_VidmemAccessBitBuffer_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +// vidmemAccessBitBufIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_vidmemAccessBitBufIsDuplicate(struct VidmemAccessBitBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_RmResource_vidmemAccessBitBufControlSerialization_Prologue(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), pCallContext, pParams); +// vidmemAccessBitBufPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_vidmemAccessBitBufPreDestruct(struct VidmemAccessBitBuffer *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset)); } -static NvBool __nvoc_thunk_RsResource_vidmemAccessBitBufCanCopy(struct VidmemAccessBitBuffer *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset)); +// vidmemAccessBitBufControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_vidmemAccessBitBufControlFilter(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset), pCallContext, pParams); } -static NvBool __nvoc_thunk_RsResource_vidmemAccessBitBufIsPartialUnmapSupported(struct VidmemAccessBitBuffer *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset)); +// vidmemAccessBitBufIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_vidmemAccessBitBufIsPartialUnmapSupported(struct VidmemAccessBitBuffer *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset)); } -static void __nvoc_thunk_RsResource_vidmemAccessBitBufPreDestruct(struct VidmemAccessBitBuffer *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset)); +// vidmemAccessBitBufMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_vidmemAccessBitBufMapTo(struct VidmemAccessBitBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_RsResource_vidmemAccessBitBufIsDuplicate(struct VidmemAccessBitBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset), hMemory, pDuplicate); +// vidmemAccessBitBufUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_vidmemAccessBitBufUnmapFrom(struct VidmemAccessBitBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset), pParams); } -static void __nvoc_thunk_RmResource_vidmemAccessBitBufControlSerialization_Epilogue(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), pCallContext, pParams); +// vidmemAccessBitBufGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_vidmemAccessBitBufGetRefCount(struct VidmemAccessBitBuffer *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset)); } -static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_vidmemAccessBitBufGetNotificationListPtr(struct VidmemAccessBitBuffer *pNotifier) { - return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_VidmemAccessBitBuffer_Notifier.offset)); +// vidmemAccessBitBufAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_vidmemAccessBitBufAddAdditionalDependants(struct RsClient *pClient, struct VidmemAccessBitBuffer *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset), pReference); } -static struct NotifShare *__nvoc_thunk_Notifier_vidmemAccessBitBufGetNotificationShare(struct VidmemAccessBitBuffer *pNotifier) { - return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_VidmemAccessBitBuffer_Notifier.offset)); +// vidmemAccessBitBufGetNotificationListPtr: virtual inherited (notify) base (notify) +static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_vidmemAccessBitBufGetNotificationListPtr(struct VidmemAccessBitBuffer *pNotifier) { + return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_VidmemAccessBitBuffer_Notifier.offset)); } -static NV_STATUS __nvoc_thunk_GpuResource_vidmemAccessBitBufMap(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), pCallContext, pParams, pCpuMapping); +// vidmemAccessBitBufGetNotificationShare: virtual inherited (notify) base (notify) +static struct NotifShare * __nvoc_up_thunk_Notifier_vidmemAccessBitBufGetNotificationShare(struct VidmemAccessBitBuffer *pNotifier) { + return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_VidmemAccessBitBuffer_Notifier.offset)); } -static NvBool __nvoc_thunk_RmResource_vidmemAccessBitBufAccessCallback(struct VidmemAccessBitBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// vidmemAccessBitBufSetNotificationShare: virtual inherited (notify) base (notify) +static void __nvoc_up_thunk_Notifier_vidmemAccessBitBufSetNotificationShare(struct VidmemAccessBitBuffer *pNotifier, struct NotifShare *pNotifShare) { + notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_VidmemAccessBitBuffer_Notifier.offset), pNotifShare); } -#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) -#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) -#endif +// vidmemAccessBitBufUnregisterEvent: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_vidmemAccessBitBufUnregisterEvent(struct VidmemAccessBitBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_VidmemAccessBitBuffer_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); +} -static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VidmemAccessBitBuffer[] = -{ - { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x160200u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) vidmemAccessBitBufCtrlCmdVidmemAccessBitDump_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x160200u) - /*flags=*/ 0x160200u, - /*accessRight=*/0x0u, - /*methodId=*/ 0xc7630103u, - /*paramSize=*/ sizeof(NVC763_CTRL_VIDMEM_ACCESS_BIT_BUFFER_DUMP_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_VidmemAccessBitBuffer.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "vidmemAccessBitBufCtrlCmdVidmemAccessBitDump" -#endif - }, +// vidmemAccessBitBufGetOrAllocNotifShare: virtual inherited (notify) base (notify) +static NV_STATUS __nvoc_up_thunk_Notifier_vidmemAccessBitBufGetOrAllocNotifShare(struct VidmemAccessBitBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_VidmemAccessBitBuffer_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); +} -}; const struct NVOC_EXPORT_INFO __nvoc_export_info_VidmemAccessBitBuffer = { @@ -303,6 +336,7 @@ NV_STATUS __nvoc_ctor_VidmemAccessBitBuffer(VidmemAccessBitBuffer *pThis, RmHals return status; } +// Vtable initialization static void __nvoc_init_funcTable_VidmemAccessBitBuffer_1(VidmemAccessBitBuffer *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -311,72 +345,107 @@ static void __nvoc_init_funcTable_VidmemAccessBitBuffer_1(VidmemAccessBitBuffer PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x160200u) + // vidmemAccessBitBufCtrlCmdVidmemAccessBitDump -- exported (id=0xc7630103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x16040u) pThis->__vidmemAccessBitBufCtrlCmdVidmemAccessBitDump__ = &vidmemAccessBitBufCtrlCmdVidmemAccessBitDump_IMPL; #endif - pThis->__vidmemAccessBitBufShareCallback__ = &__nvoc_thunk_GpuResource_vidmemAccessBitBufShareCallback; + // vidmemAccessBitBufControl -- virtual inherited (gpures) base (gpures) + pThis->__vidmemAccessBitBufControl__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufControl; - pThis->__vidmemAccessBitBufCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_vidmemAccessBitBufCheckMemInterUnmap; + // vidmemAccessBitBufMap -- virtual inherited (gpures) base (gpures) + pThis->__vidmemAccessBitBufMap__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufMap; - pThis->__vidmemAccessBitBufGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_vidmemAccessBitBufGetOrAllocNotifShare; + // vidmemAccessBitBufUnmap -- virtual inherited (gpures) base (gpures) + pThis->__vidmemAccessBitBufUnmap__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufUnmap; - pThis->__vidmemAccessBitBufMapTo__ = &__nvoc_thunk_RsResource_vidmemAccessBitBufMapTo; + // vidmemAccessBitBufShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__vidmemAccessBitBufShareCallback__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufShareCallback; - pThis->__vidmemAccessBitBufGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_vidmemAccessBitBufGetMapAddrSpace; + // vidmemAccessBitBufGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__vidmemAccessBitBufGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetRegBaseOffsetAndSize; - pThis->__vidmemAccessBitBufSetNotificationShare__ = &__nvoc_thunk_Notifier_vidmemAccessBitBufSetNotificationShare; + // vidmemAccessBitBufGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__vidmemAccessBitBufGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetMapAddrSpace; - pThis->__vidmemAccessBitBufGetRefCount__ = &__nvoc_thunk_RsResource_vidmemAccessBitBufGetRefCount; + // vidmemAccessBitBufInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__vidmemAccessBitBufInternalControlForward__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufInternalControlForward; - pThis->__vidmemAccessBitBufAddAdditionalDependants__ = &__nvoc_thunk_RsResource_vidmemAccessBitBufAddAdditionalDependants; + // vidmemAccessBitBufGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__vidmemAccessBitBufGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetInternalObjectHandle; - pThis->__vidmemAccessBitBufControl_Prologue__ = &__nvoc_thunk_RmResource_vidmemAccessBitBufControl_Prologue; + // vidmemAccessBitBufAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__vidmemAccessBitBufAccessCallback__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufAccessCallback; - pThis->__vidmemAccessBitBufGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_vidmemAccessBitBufGetRegBaseOffsetAndSize; + // vidmemAccessBitBufGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__vidmemAccessBitBufGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufGetMemInterMapParams; - pThis->__vidmemAccessBitBufInternalControlForward__ = &__nvoc_thunk_GpuResource_vidmemAccessBitBufInternalControlForward; + // vidmemAccessBitBufCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__vidmemAccessBitBufCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufCheckMemInterUnmap; - pThis->__vidmemAccessBitBufUnmapFrom__ = &__nvoc_thunk_RsResource_vidmemAccessBitBufUnmapFrom; + // vidmemAccessBitBufGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__vidmemAccessBitBufGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufGetMemoryMappingDescriptor; - pThis->__vidmemAccessBitBufControl_Epilogue__ = &__nvoc_thunk_RmResource_vidmemAccessBitBufControl_Epilogue; + // vidmemAccessBitBufControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__vidmemAccessBitBufControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufControlSerialization_Prologue; - pThis->__vidmemAccessBitBufGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_vidmemAccessBitBufGetInternalObjectHandle; + // vidmemAccessBitBufControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__vidmemAccessBitBufControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufControlSerialization_Epilogue; - pThis->__vidmemAccessBitBufControl__ = &__nvoc_thunk_GpuResource_vidmemAccessBitBufControl; + // vidmemAccessBitBufControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__vidmemAccessBitBufControl_Prologue__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufControl_Prologue; - pThis->__vidmemAccessBitBufUnmap__ = &__nvoc_thunk_GpuResource_vidmemAccessBitBufUnmap; + // vidmemAccessBitBufControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__vidmemAccessBitBufControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufControl_Epilogue; - pThis->__vidmemAccessBitBufGetMemInterMapParams__ = &__nvoc_thunk_RmResource_vidmemAccessBitBufGetMemInterMapParams; + // vidmemAccessBitBufCanCopy -- virtual inherited (res) base (gpures) + pThis->__vidmemAccessBitBufCanCopy__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufCanCopy; - pThis->__vidmemAccessBitBufGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_vidmemAccessBitBufGetMemoryMappingDescriptor; + // vidmemAccessBitBufIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__vidmemAccessBitBufIsDuplicate__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufIsDuplicate; - pThis->__vidmemAccessBitBufControlFilter__ = &__nvoc_thunk_RsResource_vidmemAccessBitBufControlFilter; + // vidmemAccessBitBufPreDestruct -- virtual inherited (res) base (gpures) + pThis->__vidmemAccessBitBufPreDestruct__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufPreDestruct; - pThis->__vidmemAccessBitBufUnregisterEvent__ = &__nvoc_thunk_Notifier_vidmemAccessBitBufUnregisterEvent; + // vidmemAccessBitBufControlFilter -- virtual inherited (res) base (gpures) + pThis->__vidmemAccessBitBufControlFilter__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufControlFilter; - pThis->__vidmemAccessBitBufControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_vidmemAccessBitBufControlSerialization_Prologue; + // vidmemAccessBitBufIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__vidmemAccessBitBufIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufIsPartialUnmapSupported; - pThis->__vidmemAccessBitBufCanCopy__ = &__nvoc_thunk_RsResource_vidmemAccessBitBufCanCopy; + // vidmemAccessBitBufMapTo -- virtual inherited (res) base (gpures) + pThis->__vidmemAccessBitBufMapTo__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufMapTo; - pThis->__vidmemAccessBitBufIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_vidmemAccessBitBufIsPartialUnmapSupported; + // vidmemAccessBitBufUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__vidmemAccessBitBufUnmapFrom__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufUnmapFrom; - pThis->__vidmemAccessBitBufPreDestruct__ = &__nvoc_thunk_RsResource_vidmemAccessBitBufPreDestruct; + // vidmemAccessBitBufGetRefCount -- virtual inherited (res) base (gpures) + pThis->__vidmemAccessBitBufGetRefCount__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufGetRefCount; - pThis->__vidmemAccessBitBufIsDuplicate__ = &__nvoc_thunk_RsResource_vidmemAccessBitBufIsDuplicate; + // vidmemAccessBitBufAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__vidmemAccessBitBufAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufAddAdditionalDependants; - pThis->__vidmemAccessBitBufControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_vidmemAccessBitBufControlSerialization_Epilogue; + // vidmemAccessBitBufGetNotificationListPtr -- virtual inherited (notify) base (notify) + pThis->__vidmemAccessBitBufGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_vidmemAccessBitBufGetNotificationListPtr; - pThis->__vidmemAccessBitBufGetNotificationListPtr__ = &__nvoc_thunk_Notifier_vidmemAccessBitBufGetNotificationListPtr; + // vidmemAccessBitBufGetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__vidmemAccessBitBufGetNotificationShare__ = &__nvoc_up_thunk_Notifier_vidmemAccessBitBufGetNotificationShare; - pThis->__vidmemAccessBitBufGetNotificationShare__ = &__nvoc_thunk_Notifier_vidmemAccessBitBufGetNotificationShare; + // vidmemAccessBitBufSetNotificationShare -- virtual inherited (notify) base (notify) + pThis->__vidmemAccessBitBufSetNotificationShare__ = &__nvoc_up_thunk_Notifier_vidmemAccessBitBufSetNotificationShare; - pThis->__vidmemAccessBitBufMap__ = &__nvoc_thunk_GpuResource_vidmemAccessBitBufMap; + // vidmemAccessBitBufUnregisterEvent -- virtual inherited (notify) base (notify) + pThis->__vidmemAccessBitBufUnregisterEvent__ = &__nvoc_up_thunk_Notifier_vidmemAccessBitBufUnregisterEvent; - pThis->__vidmemAccessBitBufAccessCallback__ = &__nvoc_thunk_RmResource_vidmemAccessBitBufAccessCallback; -} + // vidmemAccessBitBufGetOrAllocNotifShare -- virtual inherited (notify) base (notify) + pThis->__vidmemAccessBitBufGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_vidmemAccessBitBufGetOrAllocNotifShare; +} // End __nvoc_init_funcTable_VidmemAccessBitBuffer_1 with approximately 31 basic block(s). + +// Initialize vtable(s) for 31 virtual method(s). void __nvoc_init_funcTable_VidmemAccessBitBuffer(VidmemAccessBitBuffer *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 31 per-object function pointer(s). __nvoc_init_funcTable_VidmemAccessBitBuffer_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_vidmem_access_bit_buffer_nvoc.h b/src/nvidia/generated/g_vidmem_access_bit_buffer_nvoc.h index fdf3eba593..575c7b2177 100644 --- a/src/nvidia/generated/g_vidmem_access_bit_buffer_nvoc.h +++ b/src/nvidia/generated/g_vidmem_access_bit_buffer_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_VIDMEM_ACCESS_BIT_BUFFER_NVOC_H_ #define _G_VIDMEM_ACCESS_BIT_BUFFER_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_vidmem_access_bit_buffer_nvoc.h" #ifndef VIDMEM_ACCESS_BIT_BUFFER_H @@ -86,49 +94,58 @@ typedef struct #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct VidmemAccessBitBuffer { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; struct Notifier __nvoc_base_Notifier; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct INotifier *__nvoc_pbase_INotifier; - struct Notifier *__nvoc_pbase_Notifier; - struct VidmemAccessBitBuffer *__nvoc_pbase_VidmemAccessBitBuffer; - NV_STATUS (*__vidmemAccessBitBufCtrlCmdVidmemAccessBitDump__)(struct VidmemAccessBitBuffer *, NVC763_CTRL_VIDMEM_ACCESS_BIT_BUFFER_DUMP_PARAMS *); - NvBool (*__vidmemAccessBitBufShareCallback__)(struct VidmemAccessBitBuffer *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__vidmemAccessBitBufCheckMemInterUnmap__)(struct VidmemAccessBitBuffer *, NvBool); - NV_STATUS (*__vidmemAccessBitBufGetOrAllocNotifShare__)(struct VidmemAccessBitBuffer *, NvHandle, NvHandle, struct NotifShare **); - NV_STATUS (*__vidmemAccessBitBufMapTo__)(struct VidmemAccessBitBuffer *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__vidmemAccessBitBufGetMapAddrSpace__)(struct VidmemAccessBitBuffer *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - void (*__vidmemAccessBitBufSetNotificationShare__)(struct VidmemAccessBitBuffer *, struct NotifShare *); - NvU32 (*__vidmemAccessBitBufGetRefCount__)(struct VidmemAccessBitBuffer *); - void (*__vidmemAccessBitBufAddAdditionalDependants__)(struct RsClient *, struct VidmemAccessBitBuffer *, RsResourceRef *); - NV_STATUS (*__vidmemAccessBitBufControl_Prologue__)(struct VidmemAccessBitBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vidmemAccessBitBufGetRegBaseOffsetAndSize__)(struct VidmemAccessBitBuffer *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__vidmemAccessBitBufInternalControlForward__)(struct VidmemAccessBitBuffer *, NvU32, void *, NvU32); - NV_STATUS (*__vidmemAccessBitBufUnmapFrom__)(struct VidmemAccessBitBuffer *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__vidmemAccessBitBufControl_Epilogue__)(struct VidmemAccessBitBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__vidmemAccessBitBufGetInternalObjectHandle__)(struct VidmemAccessBitBuffer *); - NV_STATUS (*__vidmemAccessBitBufControl__)(struct VidmemAccessBitBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vidmemAccessBitBufUnmap__)(struct VidmemAccessBitBuffer *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__vidmemAccessBitBufGetMemInterMapParams__)(struct VidmemAccessBitBuffer *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__vidmemAccessBitBufGetMemoryMappingDescriptor__)(struct VidmemAccessBitBuffer *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__vidmemAccessBitBufControlFilter__)(struct VidmemAccessBitBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vidmemAccessBitBufUnregisterEvent__)(struct VidmemAccessBitBuffer *, NvHandle, NvHandle, NvHandle, NvHandle); - NV_STATUS (*__vidmemAccessBitBufControlSerialization_Prologue__)(struct VidmemAccessBitBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__vidmemAccessBitBufCanCopy__)(struct VidmemAccessBitBuffer *); - NvBool (*__vidmemAccessBitBufIsPartialUnmapSupported__)(struct VidmemAccessBitBuffer *); - void (*__vidmemAccessBitBufPreDestruct__)(struct VidmemAccessBitBuffer *); - NV_STATUS (*__vidmemAccessBitBufIsDuplicate__)(struct VidmemAccessBitBuffer *, NvHandle, NvBool *); - void (*__vidmemAccessBitBufControlSerialization_Epilogue__)(struct VidmemAccessBitBuffer *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - PEVENTNOTIFICATION *(*__vidmemAccessBitBufGetNotificationListPtr__)(struct VidmemAccessBitBuffer *); - struct NotifShare *(*__vidmemAccessBitBufGetNotificationShare__)(struct VidmemAccessBitBuffer *); - NV_STATUS (*__vidmemAccessBitBufMap__)(struct VidmemAccessBitBuffer *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__vidmemAccessBitBufAccessCallback__)(struct VidmemAccessBitBuffer *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct INotifier *__nvoc_pbase_INotifier; // inotify super^2 + struct Notifier *__nvoc_pbase_Notifier; // notify super + struct VidmemAccessBitBuffer *__nvoc_pbase_VidmemAccessBitBuffer; // vidmemAccessBitBuf + + // Vtable with 31 per-object function pointers + NV_STATUS (*__vidmemAccessBitBufCtrlCmdVidmemAccessBitDump__)(struct VidmemAccessBitBuffer * /*this*/, NVC763_CTRL_VIDMEM_ACCESS_BIT_BUFFER_DUMP_PARAMS *); // exported (id=0xc7630103) + NV_STATUS (*__vidmemAccessBitBufControl__)(struct VidmemAccessBitBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vidmemAccessBitBufMap__)(struct VidmemAccessBitBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vidmemAccessBitBufUnmap__)(struct VidmemAccessBitBuffer * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__vidmemAccessBitBufShareCallback__)(struct VidmemAccessBitBuffer * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vidmemAccessBitBufGetRegBaseOffsetAndSize__)(struct VidmemAccessBitBuffer * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vidmemAccessBitBufGetMapAddrSpace__)(struct VidmemAccessBitBuffer * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__vidmemAccessBitBufInternalControlForward__)(struct VidmemAccessBitBuffer * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__vidmemAccessBitBufGetInternalObjectHandle__)(struct VidmemAccessBitBuffer * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__vidmemAccessBitBufAccessCallback__)(struct VidmemAccessBitBuffer * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vidmemAccessBitBufGetMemInterMapParams__)(struct VidmemAccessBitBuffer * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vidmemAccessBitBufCheckMemInterUnmap__)(struct VidmemAccessBitBuffer * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vidmemAccessBitBufGetMemoryMappingDescriptor__)(struct VidmemAccessBitBuffer * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vidmemAccessBitBufControlSerialization_Prologue__)(struct VidmemAccessBitBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__vidmemAccessBitBufControlSerialization_Epilogue__)(struct VidmemAccessBitBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__vidmemAccessBitBufControl_Prologue__)(struct VidmemAccessBitBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__vidmemAccessBitBufControl_Epilogue__)(struct VidmemAccessBitBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__vidmemAccessBitBufCanCopy__)(struct VidmemAccessBitBuffer * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__vidmemAccessBitBufIsDuplicate__)(struct VidmemAccessBitBuffer * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__vidmemAccessBitBufPreDestruct__)(struct VidmemAccessBitBuffer * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__vidmemAccessBitBufControlFilter__)(struct VidmemAccessBitBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__vidmemAccessBitBufIsPartialUnmapSupported__)(struct VidmemAccessBitBuffer * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__vidmemAccessBitBufMapTo__)(struct VidmemAccessBitBuffer * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__vidmemAccessBitBufUnmapFrom__)(struct VidmemAccessBitBuffer * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__vidmemAccessBitBufGetRefCount__)(struct VidmemAccessBitBuffer * /*this*/); // virtual inherited (res) base (gpures) + void (*__vidmemAccessBitBufAddAdditionalDependants__)(struct RsClient *, struct VidmemAccessBitBuffer * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + PEVENTNOTIFICATION * (*__vidmemAccessBitBufGetNotificationListPtr__)(struct VidmemAccessBitBuffer * /*this*/); // virtual inherited (notify) base (notify) + struct NotifShare * (*__vidmemAccessBitBufGetNotificationShare__)(struct VidmemAccessBitBuffer * /*this*/); // virtual inherited (notify) base (notify) + void (*__vidmemAccessBitBufSetNotificationShare__)(struct VidmemAccessBitBuffer * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) + NV_STATUS (*__vidmemAccessBitBufUnregisterEvent__)(struct VidmemAccessBitBuffer * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) + NV_STATUS (*__vidmemAccessBitBufGetOrAllocNotifShare__)(struct VidmemAccessBitBuffer * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) }; #ifndef __NVOC_CLASS_VidmemAccessBitBuffer_TYPEDEF__ @@ -140,6 +157,7 @@ typedef struct VidmemAccessBitBuffer VidmemAccessBitBuffer; #define __nvoc_class_id_VidmemAccessBitBuffer 0xebb6da #endif /* __nvoc_class_id_VidmemAccessBitBuffer */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_VidmemAccessBitBuffer; #define __staticCast_VidmemAccessBitBuffer(pThis) \ @@ -152,190 +170,224 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_VidmemAccessBitBuffer; ((VidmemAccessBitBuffer*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(VidmemAccessBitBuffer))) #endif //__nvoc_vidmem_access_bit_buffer_h_disabled - NV_STATUS __nvoc_objCreateDynamic_VidmemAccessBitBuffer(VidmemAccessBitBuffer**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_VidmemAccessBitBuffer(VidmemAccessBitBuffer**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_VidmemAccessBitBuffer(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_VidmemAccessBitBuffer((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define vidmemAccessBitBufCtrlCmdVidmemAccessBitDump_FNPTR(pVidmemAccessBitBuffer) pVidmemAccessBitBuffer->__vidmemAccessBitBufCtrlCmdVidmemAccessBitDump__ #define vidmemAccessBitBufCtrlCmdVidmemAccessBitDump(pVidmemAccessBitBuffer, pParams) vidmemAccessBitBufCtrlCmdVidmemAccessBitDump_DISPATCH(pVidmemAccessBitBuffer, pParams) +#define vidmemAccessBitBufControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define vidmemAccessBitBufControl(pGpuResource, pCallContext, pParams) vidmemAccessBitBufControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define vidmemAccessBitBufMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define vidmemAccessBitBufMap(pGpuResource, pCallContext, pParams, pCpuMapping) vidmemAccessBitBufMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define vidmemAccessBitBufUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define vidmemAccessBitBufUnmap(pGpuResource, pCallContext, pCpuMapping) vidmemAccessBitBufUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define vidmemAccessBitBufShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define vidmemAccessBitBufShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) vidmemAccessBitBufShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define vidmemAccessBitBufCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) vidmemAccessBitBufCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define vidmemAccessBitBufGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) vidmemAccessBitBufGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -#define vidmemAccessBitBufMapTo(pResource, pParams) vidmemAccessBitBufMapTo_DISPATCH(pResource, pParams) -#define vidmemAccessBitBufGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) vidmemAccessBitBufGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define vidmemAccessBitBufSetNotificationShare(pNotifier, pNotifShare) vidmemAccessBitBufSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define vidmemAccessBitBufGetRefCount(pResource) vidmemAccessBitBufGetRefCount_DISPATCH(pResource) -#define vidmemAccessBitBufAddAdditionalDependants(pClient, pResource, pReference) vidmemAccessBitBufAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define vidmemAccessBitBufControl_Prologue(pResource, pCallContext, pParams) vidmemAccessBitBufControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define vidmemAccessBitBufGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define vidmemAccessBitBufGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) vidmemAccessBitBufGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define vidmemAccessBitBufGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define vidmemAccessBitBufGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) vidmemAccessBitBufGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define vidmemAccessBitBufInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define vidmemAccessBitBufInternalControlForward(pGpuResource, command, pParams, size) vidmemAccessBitBufInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define vidmemAccessBitBufUnmapFrom(pResource, pParams) vidmemAccessBitBufUnmapFrom_DISPATCH(pResource, pParams) -#define vidmemAccessBitBufControl_Epilogue(pResource, pCallContext, pParams) vidmemAccessBitBufControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vidmemAccessBitBufGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define vidmemAccessBitBufGetInternalObjectHandle(pGpuResource) vidmemAccessBitBufGetInternalObjectHandle_DISPATCH(pGpuResource) -#define vidmemAccessBitBufControl(pGpuResource, pCallContext, pParams) vidmemAccessBitBufControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define vidmemAccessBitBufUnmap(pGpuResource, pCallContext, pCpuMapping) vidmemAccessBitBufUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define vidmemAccessBitBufAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define vidmemAccessBitBufAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) vidmemAccessBitBufAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define vidmemAccessBitBufGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define vidmemAccessBitBufGetMemInterMapParams(pRmResource, pParams) vidmemAccessBitBufGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define vidmemAccessBitBufCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define vidmemAccessBitBufCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) vidmemAccessBitBufCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define vidmemAccessBitBufGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define vidmemAccessBitBufGetMemoryMappingDescriptor(pRmResource, ppMemDesc) vidmemAccessBitBufGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define vidmemAccessBitBufControlFilter(pResource, pCallContext, pParams) vidmemAccessBitBufControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define vidmemAccessBitBufUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) vidmemAccessBitBufUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define vidmemAccessBitBufControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define vidmemAccessBitBufControlSerialization_Prologue(pResource, pCallContext, pParams) vidmemAccessBitBufControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define vidmemAccessBitBufControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define vidmemAccessBitBufControlSerialization_Epilogue(pResource, pCallContext, pParams) vidmemAccessBitBufControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vidmemAccessBitBufControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define vidmemAccessBitBufControl_Prologue(pResource, pCallContext, pParams) vidmemAccessBitBufControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define vidmemAccessBitBufControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define vidmemAccessBitBufControl_Epilogue(pResource, pCallContext, pParams) vidmemAccessBitBufControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vidmemAccessBitBufCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define vidmemAccessBitBufCanCopy(pResource) vidmemAccessBitBufCanCopy_DISPATCH(pResource) -#define vidmemAccessBitBufIsPartialUnmapSupported(pResource) vidmemAccessBitBufIsPartialUnmapSupported_DISPATCH(pResource) -#define vidmemAccessBitBufPreDestruct(pResource) vidmemAccessBitBufPreDestruct_DISPATCH(pResource) +#define vidmemAccessBitBufIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define vidmemAccessBitBufIsDuplicate(pResource, hMemory, pDuplicate) vidmemAccessBitBufIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define vidmemAccessBitBufControlSerialization_Epilogue(pResource, pCallContext, pParams) vidmemAccessBitBufControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vidmemAccessBitBufPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define vidmemAccessBitBufPreDestruct(pResource) vidmemAccessBitBufPreDestruct_DISPATCH(pResource) +#define vidmemAccessBitBufControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define vidmemAccessBitBufControlFilter(pResource, pCallContext, pParams) vidmemAccessBitBufControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define vidmemAccessBitBufIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define vidmemAccessBitBufIsPartialUnmapSupported(pResource) vidmemAccessBitBufIsPartialUnmapSupported_DISPATCH(pResource) +#define vidmemAccessBitBufMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define vidmemAccessBitBufMapTo(pResource, pParams) vidmemAccessBitBufMapTo_DISPATCH(pResource, pParams) +#define vidmemAccessBitBufUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define vidmemAccessBitBufUnmapFrom(pResource, pParams) vidmemAccessBitBufUnmapFrom_DISPATCH(pResource, pParams) +#define vidmemAccessBitBufGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define vidmemAccessBitBufGetRefCount(pResource) vidmemAccessBitBufGetRefCount_DISPATCH(pResource) +#define vidmemAccessBitBufAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define vidmemAccessBitBufAddAdditionalDependants(pClient, pResource, pReference) vidmemAccessBitBufAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +#define vidmemAccessBitBufGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ #define vidmemAccessBitBufGetNotificationListPtr(pNotifier) vidmemAccessBitBufGetNotificationListPtr_DISPATCH(pNotifier) +#define vidmemAccessBitBufGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ #define vidmemAccessBitBufGetNotificationShare(pNotifier) vidmemAccessBitBufGetNotificationShare_DISPATCH(pNotifier) -#define vidmemAccessBitBufMap(pGpuResource, pCallContext, pParams, pCpuMapping) vidmemAccessBitBufMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define vidmemAccessBitBufAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) vidmemAccessBitBufAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS vidmemAccessBitBufConstructHelper_KERNEL(struct VidmemAccessBitBuffer *pVidmem, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); - +#define vidmemAccessBitBufSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define vidmemAccessBitBufSetNotificationShare(pNotifier, pNotifShare) vidmemAccessBitBufSetNotificationShare_DISPATCH(pNotifier, pNotifShare) +#define vidmemAccessBitBufUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define vidmemAccessBitBufUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) vidmemAccessBitBufUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) +#define vidmemAccessBitBufGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define vidmemAccessBitBufGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) vidmemAccessBitBufGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) -#ifdef __nvoc_vidmem_access_bit_buffer_h_disabled -static inline NV_STATUS vidmemAccessBitBufConstructHelper(struct VidmemAccessBitBuffer *pVidmem, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - NV_ASSERT_FAILED_PRECOMP("VidmemAccessBitBuffer was disabled!"); - return NV_ERR_NOT_SUPPORTED; +// Dispatch functions +static inline NV_STATUS vidmemAccessBitBufCtrlCmdVidmemAccessBitDump_DISPATCH(struct VidmemAccessBitBuffer *pVidmemAccessBitBuffer, NVC763_CTRL_VIDMEM_ACCESS_BIT_BUFFER_DUMP_PARAMS *pParams) { + return pVidmemAccessBitBuffer->__vidmemAccessBitBufCtrlCmdVidmemAccessBitDump__(pVidmemAccessBitBuffer, pParams); } -#else //__nvoc_vidmem_access_bit_buffer_h_disabled -#define vidmemAccessBitBufConstructHelper(pVidmem, pCallContext, pParams) vidmemAccessBitBufConstructHelper_KERNEL(pVidmem, pCallContext, pParams) -#endif //__nvoc_vidmem_access_bit_buffer_h_disabled -#define vidmemAccessBitBufConstructHelper_HAL(pVidmem, pCallContext, pParams) vidmemAccessBitBufConstructHelper(pVidmem, pCallContext, pParams) - -static inline void vidmemAccessBitBufDestruct_b3696a(struct VidmemAccessBitBuffer *pVidmemAccessBitBuffer) { - return; +static inline NV_STATUS vidmemAccessBitBufControl_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__vidmemAccessBitBufControl__(pGpuResource, pCallContext, pParams); } +static inline NV_STATUS vidmemAccessBitBufMap_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__vidmemAccessBitBufMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +} -#define __nvoc_vidmemAccessBitBufDestruct(pVidmemAccessBitBuffer) vidmemAccessBitBufDestruct_b3696a(pVidmemAccessBitBuffer) -NV_STATUS vidmemAccessBitBufCtrlCmdVidmemAccessBitDump_IMPL(struct VidmemAccessBitBuffer *pVidmemAccessBitBuffer, NVC763_CTRL_VIDMEM_ACCESS_BIT_BUFFER_DUMP_PARAMS *pParams); - -static inline NV_STATUS vidmemAccessBitBufCtrlCmdVidmemAccessBitDump_DISPATCH(struct VidmemAccessBitBuffer *pVidmemAccessBitBuffer, NVC763_CTRL_VIDMEM_ACCESS_BIT_BUFFER_DUMP_PARAMS *pParams) { - return pVidmemAccessBitBuffer->__vidmemAccessBitBufCtrlCmdVidmemAccessBitDump__(pVidmemAccessBitBuffer, pParams); +static inline NV_STATUS vidmemAccessBitBufUnmap_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__vidmemAccessBitBufUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool vidmemAccessBitBufShareCallback_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return pGpuResource->__vidmemAccessBitBufShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } -static inline NV_STATUS vidmemAccessBitBufCheckMemInterUnmap_DISPATCH(struct VidmemAccessBitBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__vidmemAccessBitBufCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS vidmemAccessBitBufGetRegBaseOffsetAndSize_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__vidmemAccessBitBufGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } -static inline NV_STATUS vidmemAccessBitBufGetOrAllocNotifShare_DISPATCH(struct VidmemAccessBitBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__vidmemAccessBitBufGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); +static inline NV_STATUS vidmemAccessBitBufGetMapAddrSpace_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__vidmemAccessBitBufGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NV_STATUS vidmemAccessBitBufMapTo_DISPATCH(struct VidmemAccessBitBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__vidmemAccessBitBufMapTo__(pResource, pParams); +static inline NV_STATUS vidmemAccessBitBufInternalControlForward_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__vidmemAccessBitBufInternalControlForward__(pGpuResource, command, pParams, size); } -static inline NV_STATUS vidmemAccessBitBufGetMapAddrSpace_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__vidmemAccessBitBufGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +static inline NvHandle vidmemAccessBitBufGetInternalObjectHandle_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource) { + return pGpuResource->__vidmemAccessBitBufGetInternalObjectHandle__(pGpuResource); } -static inline void vidmemAccessBitBufSetNotificationShare_DISPATCH(struct VidmemAccessBitBuffer *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__vidmemAccessBitBufSetNotificationShare__(pNotifier, pNotifShare); +static inline NvBool vidmemAccessBitBufAccessCallback_DISPATCH(struct VidmemAccessBitBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__vidmemAccessBitBufAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NvU32 vidmemAccessBitBufGetRefCount_DISPATCH(struct VidmemAccessBitBuffer *pResource) { - return pResource->__vidmemAccessBitBufGetRefCount__(pResource); +static inline NV_STATUS vidmemAccessBitBufGetMemInterMapParams_DISPATCH(struct VidmemAccessBitBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__vidmemAccessBitBufGetMemInterMapParams__(pRmResource, pParams); } -static inline void vidmemAccessBitBufAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VidmemAccessBitBuffer *pResource, RsResourceRef *pReference) { - pResource->__vidmemAccessBitBufAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS vidmemAccessBitBufCheckMemInterUnmap_DISPATCH(struct VidmemAccessBitBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__vidmemAccessBitBufCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS vidmemAccessBitBufControl_Prologue_DISPATCH(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vidmemAccessBitBufControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS vidmemAccessBitBufGetMemoryMappingDescriptor_DISPATCH(struct VidmemAccessBitBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__vidmemAccessBitBufGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline NV_STATUS vidmemAccessBitBufGetRegBaseOffsetAndSize_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__vidmemAccessBitBufGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS vidmemAccessBitBufControlSerialization_Prologue_DISPATCH(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__vidmemAccessBitBufControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS vidmemAccessBitBufInternalControlForward_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__vidmemAccessBitBufInternalControlForward__(pGpuResource, command, pParams, size); +static inline void vidmemAccessBitBufControlSerialization_Epilogue_DISPATCH(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__vidmemAccessBitBufControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS vidmemAccessBitBufUnmapFrom_DISPATCH(struct VidmemAccessBitBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__vidmemAccessBitBufUnmapFrom__(pResource, pParams); +static inline NV_STATUS vidmemAccessBitBufControl_Prologue_DISPATCH(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__vidmemAccessBitBufControl_Prologue__(pResource, pCallContext, pParams); } static inline void vidmemAccessBitBufControl_Epilogue_DISPATCH(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { pResource->__vidmemAccessBitBufControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NvHandle vidmemAccessBitBufGetInternalObjectHandle_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource) { - return pGpuResource->__vidmemAccessBitBufGetInternalObjectHandle__(pGpuResource); +static inline NvBool vidmemAccessBitBufCanCopy_DISPATCH(struct VidmemAccessBitBuffer *pResource) { + return pResource->__vidmemAccessBitBufCanCopy__(pResource); } -static inline NV_STATUS vidmemAccessBitBufControl_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__vidmemAccessBitBufControl__(pGpuResource, pCallContext, pParams); +static inline NV_STATUS vidmemAccessBitBufIsDuplicate_DISPATCH(struct VidmemAccessBitBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__vidmemAccessBitBufIsDuplicate__(pResource, hMemory, pDuplicate); } -static inline NV_STATUS vidmemAccessBitBufUnmap_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__vidmemAccessBitBufUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline void vidmemAccessBitBufPreDestruct_DISPATCH(struct VidmemAccessBitBuffer *pResource) { + pResource->__vidmemAccessBitBufPreDestruct__(pResource); } -static inline NV_STATUS vidmemAccessBitBufGetMemInterMapParams_DISPATCH(struct VidmemAccessBitBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__vidmemAccessBitBufGetMemInterMapParams__(pRmResource, pParams); +static inline NV_STATUS vidmemAccessBitBufControlFilter_DISPATCH(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__vidmemAccessBitBufControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS vidmemAccessBitBufGetMemoryMappingDescriptor_DISPATCH(struct VidmemAccessBitBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__vidmemAccessBitBufGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NvBool vidmemAccessBitBufIsPartialUnmapSupported_DISPATCH(struct VidmemAccessBitBuffer *pResource) { + return pResource->__vidmemAccessBitBufIsPartialUnmapSupported__(pResource); } -static inline NV_STATUS vidmemAccessBitBufControlFilter_DISPATCH(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vidmemAccessBitBufControlFilter__(pResource, pCallContext, pParams); +static inline NV_STATUS vidmemAccessBitBufMapTo_DISPATCH(struct VidmemAccessBitBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__vidmemAccessBitBufMapTo__(pResource, pParams); } -static inline NV_STATUS vidmemAccessBitBufUnregisterEvent_DISPATCH(struct VidmemAccessBitBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__vidmemAccessBitBufUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); +static inline NV_STATUS vidmemAccessBitBufUnmapFrom_DISPATCH(struct VidmemAccessBitBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__vidmemAccessBitBufUnmapFrom__(pResource, pParams); } -static inline NV_STATUS vidmemAccessBitBufControlSerialization_Prologue_DISPATCH(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vidmemAccessBitBufControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NvU32 vidmemAccessBitBufGetRefCount_DISPATCH(struct VidmemAccessBitBuffer *pResource) { + return pResource->__vidmemAccessBitBufGetRefCount__(pResource); } -static inline NvBool vidmemAccessBitBufCanCopy_DISPATCH(struct VidmemAccessBitBuffer *pResource) { - return pResource->__vidmemAccessBitBufCanCopy__(pResource); +static inline void vidmemAccessBitBufAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VidmemAccessBitBuffer *pResource, RsResourceRef *pReference) { + pResource->__vidmemAccessBitBufAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NvBool vidmemAccessBitBufIsPartialUnmapSupported_DISPATCH(struct VidmemAccessBitBuffer *pResource) { - return pResource->__vidmemAccessBitBufIsPartialUnmapSupported__(pResource); +static inline PEVENTNOTIFICATION * vidmemAccessBitBufGetNotificationListPtr_DISPATCH(struct VidmemAccessBitBuffer *pNotifier) { + return pNotifier->__vidmemAccessBitBufGetNotificationListPtr__(pNotifier); } -static inline void vidmemAccessBitBufPreDestruct_DISPATCH(struct VidmemAccessBitBuffer *pResource) { - pResource->__vidmemAccessBitBufPreDestruct__(pResource); +static inline struct NotifShare * vidmemAccessBitBufGetNotificationShare_DISPATCH(struct VidmemAccessBitBuffer *pNotifier) { + return pNotifier->__vidmemAccessBitBufGetNotificationShare__(pNotifier); } -static inline NV_STATUS vidmemAccessBitBufIsDuplicate_DISPATCH(struct VidmemAccessBitBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__vidmemAccessBitBufIsDuplicate__(pResource, hMemory, pDuplicate); +static inline void vidmemAccessBitBufSetNotificationShare_DISPATCH(struct VidmemAccessBitBuffer *pNotifier, struct NotifShare *pNotifShare) { + pNotifier->__vidmemAccessBitBufSetNotificationShare__(pNotifier, pNotifShare); } -static inline void vidmemAccessBitBufControlSerialization_Epilogue_DISPATCH(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vidmemAccessBitBufControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS vidmemAccessBitBufUnregisterEvent_DISPATCH(struct VidmemAccessBitBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { + return pNotifier->__vidmemAccessBitBufUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } -static inline PEVENTNOTIFICATION *vidmemAccessBitBufGetNotificationListPtr_DISPATCH(struct VidmemAccessBitBuffer *pNotifier) { - return pNotifier->__vidmemAccessBitBufGetNotificationListPtr__(pNotifier); +static inline NV_STATUS vidmemAccessBitBufGetOrAllocNotifShare_DISPATCH(struct VidmemAccessBitBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { + return pNotifier->__vidmemAccessBitBufGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } -static inline struct NotifShare *vidmemAccessBitBufGetNotificationShare_DISPATCH(struct VidmemAccessBitBuffer *pNotifier) { - return pNotifier->__vidmemAccessBitBufGetNotificationShare__(pNotifier); -} +NV_STATUS vidmemAccessBitBufConstructHelper_KERNEL(struct VidmemAccessBitBuffer *pVidmem, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); -static inline NV_STATUS vidmemAccessBitBufMap_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__vidmemAccessBitBufMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + +#ifdef __nvoc_vidmem_access_bit_buffer_h_disabled +static inline NV_STATUS vidmemAccessBitBufConstructHelper(struct VidmemAccessBitBuffer *pVidmem, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + NV_ASSERT_FAILED_PRECOMP("VidmemAccessBitBuffer was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_vidmem_access_bit_buffer_h_disabled +#define vidmemAccessBitBufConstructHelper(pVidmem, pCallContext, pParams) vidmemAccessBitBufConstructHelper_KERNEL(pVidmem, pCallContext, pParams) +#endif //__nvoc_vidmem_access_bit_buffer_h_disabled -static inline NvBool vidmemAccessBitBufAccessCallback_DISPATCH(struct VidmemAccessBitBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__vidmemAccessBitBufAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +#define vidmemAccessBitBufConstructHelper_HAL(pVidmem, pCallContext, pParams) vidmemAccessBitBufConstructHelper(pVidmem, pCallContext, pParams) + +static inline void vidmemAccessBitBufDestruct_b3696a(struct VidmemAccessBitBuffer *pVidmemAccessBitBuffer) { + return; } + +#define __nvoc_vidmemAccessBitBufDestruct(pVidmemAccessBitBuffer) vidmemAccessBitBufDestruct_b3696a(pVidmemAccessBitBuffer) +NV_STATUS vidmemAccessBitBufCtrlCmdVidmemAccessBitDump_IMPL(struct VidmemAccessBitBuffer *pVidmemAccessBitBuffer, NVC763_CTRL_VIDMEM_ACCESS_BIT_BUFFER_DUMP_PARAMS *pParams); + static inline NV_STATUS __nvoc_vidmemAccessBitBufConstruct(struct VidmemAccessBitBuffer *arg_pVidmemAccessBitBuffer, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams) { return vidmemAccessBitBufConstructHelper(arg_pVidmemAccessBitBuffer, arg_pCallContext, arg_pParams); } diff --git a/src/nvidia/generated/g_virt_mem_allocator_nvoc.c b/src/nvidia/generated/g_virt_mem_allocator_nvoc.c index 52e5562175..2386607a4f 100644 --- a/src/nvidia/generated/g_virt_mem_allocator_nvoc.c +++ b/src/nvidia/generated/g_virt_mem_allocator_nvoc.c @@ -66,62 +66,82 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_VirtMemAllocator = /*pExportInfo=*/ &__nvoc_export_info_VirtMemAllocator }; -static NV_STATUS __nvoc_thunk_VirtMemAllocator_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pDma, ENGDESCRIPTOR arg0) { - return dmaConstructEngine(pGpu, (struct VirtMemAllocator *)(((unsigned char *)pDma) - __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg0); +// 3 down-thunk(s) defined to bridge methods in VirtMemAllocator from superclasses + +// dmaConstructEngine: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_VirtMemAllocator_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pDma, ENGDESCRIPTOR arg3) { + return dmaConstructEngine(pGpu, (struct VirtMemAllocator *)(((unsigned char *) pDma) - __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_VirtMemAllocator_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pDma) { - return dmaStateInitLocked(pGpu, (struct VirtMemAllocator *)(((unsigned char *)pDma) - __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); +// dmaStateInitLocked: virtual override (engstate) base (engstate) +static NV_STATUS __nvoc_down_thunk_VirtMemAllocator_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pDma) { + return dmaStateInitLocked(pGpu, (struct VirtMemAllocator *)(((unsigned char *) pDma) - __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_VirtMemAllocator_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pDma, NvU32 arg0) { - return dmaStatePostLoad(pGpu, (struct VirtMemAllocator *)(((unsigned char *)pDma) - __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg0); +// dmaStatePostLoad: virtual halified (singleton optimized) override (engstate) base (engstate) body +static NV_STATUS __nvoc_down_thunk_VirtMemAllocator_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pDma, NvU32 arg3) { + return dmaStatePostLoad(pGpu, (struct VirtMemAllocator *)(((unsigned char *) pDma) - __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_dmaStateLoad(POBJGPU pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg0) { - return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg0); + +// 11 up-thunk(s) defined to bridge methods in VirtMemAllocator to superclasses + +// dmaInitMissing: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_dmaInitMissing(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { + engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_dmaStateUnload(POBJGPU pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg0) { - return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg0); +// dmaStatePreInitLocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStatePreInitLocked(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { + return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_dmaStatePreLoad(POBJGPU pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg0) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg0); +// dmaStatePreInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStatePreInitUnlocked(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { + return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_dmaStatePostUnload(POBJGPU pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg0) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg0); +// dmaStateInitUnlocked: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStateInitUnlocked(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { + return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); } -static void __nvoc_thunk_OBJENGSTATE_dmaStateDestroy(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { - engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); +// dmaStatePreLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStatePreLoad(POBJGPU pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { + return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_dmaStatePreUnload(POBJGPU pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg0) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg0); +// dmaStateLoad: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStateLoad(POBJGPU pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { + return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_dmaStateInitUnlocked(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); +// dmaStatePreUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStatePreUnload(POBJGPU pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { + return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg3); } -static void __nvoc_thunk_OBJENGSTATE_dmaInitMissing(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); +// dmaStateUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStateUnload(POBJGPU pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { + return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_dmaStatePreInitLocked(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); +// dmaStatePostUnload: virtual inherited (engstate) base (engstate) +static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStatePostUnload(POBJGPU pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { + return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg3); } -static NV_STATUS __nvoc_thunk_OBJENGSTATE_dmaStatePreInitUnlocked(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); +// dmaStateDestroy: virtual inherited (engstate) base (engstate) +static void __nvoc_up_thunk_OBJENGSTATE_dmaStateDestroy(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { + engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); } -static NvBool __nvoc_thunk_OBJENGSTATE_dmaIsPresent(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); +// dmaIsPresent: virtual inherited (engstate) base (engstate) +static NvBool __nvoc_up_thunk_OBJENGSTATE_dmaIsPresent(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { + return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_VirtMemAllocator = { /*numEntries=*/ 0, @@ -192,6 +212,7 @@ NV_STATUS __nvoc_ctor_VirtMemAllocator(VirtMemAllocator *pThis, RmHalspecOwner * return status; } +// Vtable initialization static void __nvoc_init_funcTable_VirtMemAllocator_1(VirtMemAllocator *pThis, RmHalspecOwner *pRmhalspecowner) { ChipHal *chipHal = &pRmhalspecowner->chipHal; const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; @@ -204,11 +225,15 @@ static void __nvoc_init_funcTable_VirtMemAllocator_1(VirtMemAllocator *pThis, Rm PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); + // dmaConstructEngine -- virtual override (engstate) base (engstate) pThis->__dmaConstructEngine__ = &dmaConstructEngine_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_VirtMemAllocator_engstateConstructEngine; + // dmaStateInitLocked -- virtual override (engstate) base (engstate) pThis->__dmaStateInitLocked__ = &dmaStateInitLocked_IMPL; + pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_VirtMemAllocator_engstateStateInitLocked; - // Hal function -- dmaAllocBar1P2PMapping + // dmaAllocBar1P2PMapping -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__dmaAllocBar1P2PMapping__ = &dmaAllocBar1P2PMapping_GH100; @@ -219,7 +244,7 @@ static void __nvoc_init_funcTable_VirtMemAllocator_1(VirtMemAllocator *pThis, Rm pThis->__dmaAllocBar1P2PMapping__ = &dmaAllocBar1P2PMapping_46f6a7; } - // Hal function -- dmaFreeBar1P2PMapping + // dmaFreeBar1P2PMapping -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__dmaFreeBar1P2PMapping__ = &dmaFreeBar1P2PMapping_GH100; @@ -230,39 +255,49 @@ static void __nvoc_init_funcTable_VirtMemAllocator_1(VirtMemAllocator *pThis, Rm pThis->__dmaFreeBar1P2PMapping__ = &dmaFreeBar1P2PMapping_b3696a; } - // Hal function -- dmaStatePostLoad + // dmaStatePostLoad -- virtual halified (singleton optimized) override (engstate) base (engstate) body pThis->__dmaStatePostLoad__ = &dmaStatePostLoad_GM107; + pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_VirtMemAllocator_engstateStatePostLoad; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_VirtMemAllocator_engstateConstructEngine; + // dmaInitMissing -- virtual inherited (engstate) base (engstate) + pThis->__dmaInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_dmaInitMissing; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_thunk_VirtMemAllocator_engstateStateInitLocked; + // dmaStatePreInitLocked -- virtual inherited (engstate) base (engstate) + pThis->__dmaStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStatePreInitLocked; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_thunk_VirtMemAllocator_engstateStatePostLoad; + // dmaStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__dmaStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStatePreInitUnlocked; - pThis->__dmaStateLoad__ = &__nvoc_thunk_OBJENGSTATE_dmaStateLoad; + // dmaStateInitUnlocked -- virtual inherited (engstate) base (engstate) + pThis->__dmaStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStateInitUnlocked; - pThis->__dmaStateUnload__ = &__nvoc_thunk_OBJENGSTATE_dmaStateUnload; + // dmaStatePreLoad -- virtual inherited (engstate) base (engstate) + pThis->__dmaStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStatePreLoad; - pThis->__dmaStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_dmaStatePreLoad; + // dmaStateLoad -- virtual inherited (engstate) base (engstate) + pThis->__dmaStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStateLoad; - pThis->__dmaStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_dmaStatePostUnload; + // dmaStatePreUnload -- virtual inherited (engstate) base (engstate) + pThis->__dmaStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStatePreUnload; - pThis->__dmaStateDestroy__ = &__nvoc_thunk_OBJENGSTATE_dmaStateDestroy; + // dmaStateUnload -- virtual inherited (engstate) base (engstate) + pThis->__dmaStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStateUnload; - pThis->__dmaStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_dmaStatePreUnload; + // dmaStatePostUnload -- virtual inherited (engstate) base (engstate) + pThis->__dmaStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStatePostUnload; - pThis->__dmaStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_dmaStateInitUnlocked; + // dmaStateDestroy -- virtual inherited (engstate) base (engstate) + pThis->__dmaStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStateDestroy; - pThis->__dmaInitMissing__ = &__nvoc_thunk_OBJENGSTATE_dmaInitMissing; + // dmaIsPresent -- virtual inherited (engstate) base (engstate) + pThis->__dmaIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_dmaIsPresent; +} // End __nvoc_init_funcTable_VirtMemAllocator_1 with approximately 21 basic block(s). - pThis->__dmaStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_dmaStatePreInitLocked; - - pThis->__dmaStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_dmaStatePreInitUnlocked; - - pThis->__dmaIsPresent__ = &__nvoc_thunk_OBJENGSTATE_dmaIsPresent; -} +// Initialize vtable(s) for 16 virtual method(s). void __nvoc_init_funcTable_VirtMemAllocator(VirtMemAllocator *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 16 per-object function pointer(s). __nvoc_init_funcTable_VirtMemAllocator_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_virt_mem_allocator_nvoc.h b/src/nvidia/generated/g_virt_mem_allocator_nvoc.h index 882c3be376..48ec7a2b0d 100644 --- a/src/nvidia/generated/g_virt_mem_allocator_nvoc.h +++ b/src/nvidia/generated/g_virt_mem_allocator_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_VIRT_MEM_ALLOCATOR_NVOC_H_ #define _G_VIRT_MEM_ALLOCATOR_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_virt_mem_allocator_nvoc.h" #ifndef VIRT_MEM_ALLOCATOR_H @@ -98,28 +106,39 @@ typedef struct _def_dma_bar1p2p_mapping_params #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct VirtMemAllocator { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - struct Object *__nvoc_pbase_Object; - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; - struct VirtMemAllocator *__nvoc_pbase_VirtMemAllocator; - NV_STATUS (*__dmaConstructEngine__)(struct OBJGPU *, struct VirtMemAllocator *, ENGDESCRIPTOR); - NV_STATUS (*__dmaStateInitLocked__)(struct OBJGPU *, struct VirtMemAllocator *); - NV_STATUS (*__dmaAllocBar1P2PMapping__)(struct OBJGPU *, struct VirtMemAllocator *, DMA_BAR1P2P_MAPPING_PRARAMS *); - void (*__dmaFreeBar1P2PMapping__)(struct VirtMemAllocator *, CLI_DMA_MAPPING_INFO *); - NV_STATUS (*__dmaStatePostLoad__)(struct OBJGPU *, struct VirtMemAllocator *, NvU32); - NV_STATUS (*__dmaStateLoad__)(POBJGPU, struct VirtMemAllocator *, NvU32); - NV_STATUS (*__dmaStateUnload__)(POBJGPU, struct VirtMemAllocator *, NvU32); - NV_STATUS (*__dmaStatePreLoad__)(POBJGPU, struct VirtMemAllocator *, NvU32); - NV_STATUS (*__dmaStatePostUnload__)(POBJGPU, struct VirtMemAllocator *, NvU32); - void (*__dmaStateDestroy__)(POBJGPU, struct VirtMemAllocator *); - NV_STATUS (*__dmaStatePreUnload__)(POBJGPU, struct VirtMemAllocator *, NvU32); - NV_STATUS (*__dmaStateInitUnlocked__)(POBJGPU, struct VirtMemAllocator *); - void (*__dmaInitMissing__)(POBJGPU, struct VirtMemAllocator *); - NV_STATUS (*__dmaStatePreInitLocked__)(POBJGPU, struct VirtMemAllocator *); - NV_STATUS (*__dmaStatePreInitUnlocked__)(POBJGPU, struct VirtMemAllocator *); - NvBool (*__dmaIsPresent__)(POBJGPU, struct VirtMemAllocator *); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^2 + struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super + struct VirtMemAllocator *__nvoc_pbase_VirtMemAllocator; // dma + + // Vtable with 16 per-object function pointers + NV_STATUS (*__dmaConstructEngine__)(struct OBJGPU *, struct VirtMemAllocator * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__dmaStateInitLocked__)(struct OBJGPU *, struct VirtMemAllocator * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__dmaAllocBar1P2PMapping__)(struct OBJGPU *, struct VirtMemAllocator * /*this*/, DMA_BAR1P2P_MAPPING_PRARAMS *); // halified (2 hals) body + void (*__dmaFreeBar1P2PMapping__)(struct VirtMemAllocator * /*this*/, CLI_DMA_MAPPING_INFO *); // halified (2 hals) body + NV_STATUS (*__dmaStatePostLoad__)(struct OBJGPU *, struct VirtMemAllocator * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + void (*__dmaInitMissing__)(POBJGPU, struct VirtMemAllocator * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__dmaStatePreInitLocked__)(POBJGPU, struct VirtMemAllocator * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__dmaStatePreInitUnlocked__)(POBJGPU, struct VirtMemAllocator * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__dmaStateInitUnlocked__)(POBJGPU, struct VirtMemAllocator * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__dmaStatePreLoad__)(POBJGPU, struct VirtMemAllocator * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__dmaStateLoad__)(POBJGPU, struct VirtMemAllocator * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__dmaStatePreUnload__)(POBJGPU, struct VirtMemAllocator * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__dmaStateUnload__)(POBJGPU, struct VirtMemAllocator * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__dmaStatePostUnload__)(POBJGPU, struct VirtMemAllocator * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__dmaStateDestroy__)(POBJGPU, struct VirtMemAllocator * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__dmaIsPresent__)(POBJGPU, struct VirtMemAllocator * /*this*/); // virtual inherited (engstate) base (engstate) + + // 8 PDB properties NvBool PDB_PROP_DMA_MMU_INVALIDATE_DISABLE; NvBool PDB_PROP_DMA_ENFORCE_32BIT_POINTER; NvBool PDB_PROP_DMA_MEMORY_MAP_OVERRIDE; @@ -128,6 +147,8 @@ struct VirtMemAllocator { NvBool PDB_PROP_DMA_ENABLE_FULL_COMP_TAG_LINE; NvBool PDB_PROP_DMA_RESTRICT_VA_RANGE; NvBool PDB_PROP_DMA_MULTIPLE_VASPACES_SUPPORTED; + + // Data members NvBool bMemoryMapperApiEnabled; NvU32 gpuGartCaps; NvU32 increaseRsvdPages; @@ -143,6 +164,7 @@ typedef struct VirtMemAllocator VirtMemAllocator; #define __nvoc_class_id_VirtMemAllocator 0x899e48 #endif /* __nvoc_class_id_VirtMemAllocator */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_VirtMemAllocator; #define __staticCast_VirtMemAllocator(pThis) \ @@ -155,6 +177,7 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_VirtMemAllocator; ((VirtMemAllocator*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(VirtMemAllocator))) #endif //__nvoc_virt_mem_allocator_h_disabled +// Property macros #define PDB_PROP_DMA_MMU_INVALIDATE_DISABLE_BASE_CAST #define PDB_PROP_DMA_MMU_INVALIDATE_DISABLE_BASE_NAME PDB_PROP_DMA_MMU_INVALIDATE_DISABLE #define PDB_PROP_DMA_RESTRICT_VA_RANGE_BASE_CAST @@ -180,25 +203,109 @@ NV_STATUS __nvoc_objCreate_VirtMemAllocator(VirtMemAllocator**, Dynamic*, NvU32) #define __objCreate_VirtMemAllocator(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_VirtMemAllocator((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) -#define dmaConstructEngine(pGpu, pDma, arg0) dmaConstructEngine_DISPATCH(pGpu, pDma, arg0) + +// Wrapper macros +#define dmaConstructEngine_FNPTR(pDma) pDma->__dmaConstructEngine__ +#define dmaConstructEngine(pGpu, pDma, arg3) dmaConstructEngine_DISPATCH(pGpu, pDma, arg3) +#define dmaStateInitLocked_FNPTR(pDma) pDma->__dmaStateInitLocked__ #define dmaStateInitLocked(pGpu, pDma) dmaStateInitLocked_DISPATCH(pGpu, pDma) +#define dmaAllocBar1P2PMapping_FNPTR(pDma) pDma->__dmaAllocBar1P2PMapping__ #define dmaAllocBar1P2PMapping(pGpu, pDma, params) dmaAllocBar1P2PMapping_DISPATCH(pGpu, pDma, params) #define dmaAllocBar1P2PMapping_HAL(pGpu, pDma, params) dmaAllocBar1P2PMapping_DISPATCH(pGpu, pDma, params) -#define dmaFreeBar1P2PMapping(pDma, arg0) dmaFreeBar1P2PMapping_DISPATCH(pDma, arg0) -#define dmaFreeBar1P2PMapping_HAL(pDma, arg0) dmaFreeBar1P2PMapping_DISPATCH(pDma, arg0) -#define dmaStatePostLoad(pGpu, pDma, arg0) dmaStatePostLoad_DISPATCH(pGpu, pDma, arg0) -#define dmaStatePostLoad_HAL(pGpu, pDma, arg0) dmaStatePostLoad_DISPATCH(pGpu, pDma, arg0) -#define dmaStateLoad(pGpu, pEngstate, arg0) dmaStateLoad_DISPATCH(pGpu, pEngstate, arg0) -#define dmaStateUnload(pGpu, pEngstate, arg0) dmaStateUnload_DISPATCH(pGpu, pEngstate, arg0) -#define dmaStatePreLoad(pGpu, pEngstate, arg0) dmaStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) -#define dmaStatePostUnload(pGpu, pEngstate, arg0) dmaStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) -#define dmaStateDestroy(pGpu, pEngstate) dmaStateDestroy_DISPATCH(pGpu, pEngstate) -#define dmaStatePreUnload(pGpu, pEngstate, arg0) dmaStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) -#define dmaStateInitUnlocked(pGpu, pEngstate) dmaStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define dmaFreeBar1P2PMapping_FNPTR(pDma) pDma->__dmaFreeBar1P2PMapping__ +#define dmaFreeBar1P2PMapping(pDma, arg2) dmaFreeBar1P2PMapping_DISPATCH(pDma, arg2) +#define dmaFreeBar1P2PMapping_HAL(pDma, arg2) dmaFreeBar1P2PMapping_DISPATCH(pDma, arg2) +#define dmaStatePostLoad_FNPTR(pDma) pDma->__dmaStatePostLoad__ +#define dmaStatePostLoad(pGpu, pDma, arg3) dmaStatePostLoad_DISPATCH(pGpu, pDma, arg3) +#define dmaStatePostLoad_HAL(pGpu, pDma, arg3) dmaStatePostLoad_DISPATCH(pGpu, pDma, arg3) +#define dmaInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ #define dmaInitMissing(pGpu, pEngstate) dmaInitMissing_DISPATCH(pGpu, pEngstate) +#define dmaStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ #define dmaStatePreInitLocked(pGpu, pEngstate) dmaStatePreInitLocked_DISPATCH(pGpu, pEngstate) +#define dmaStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ #define dmaStatePreInitUnlocked(pGpu, pEngstate) dmaStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) +#define dmaStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define dmaStateInitUnlocked(pGpu, pEngstate) dmaStateInitUnlocked_DISPATCH(pGpu, pEngstate) +#define dmaStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define dmaStatePreLoad(pGpu, pEngstate, arg3) dmaStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) +#define dmaStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define dmaStateLoad(pGpu, pEngstate, arg3) dmaStateLoad_DISPATCH(pGpu, pEngstate, arg3) +#define dmaStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define dmaStatePreUnload(pGpu, pEngstate, arg3) dmaStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) +#define dmaStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define dmaStateUnload(pGpu, pEngstate, arg3) dmaStateUnload_DISPATCH(pGpu, pEngstate, arg3) +#define dmaStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define dmaStatePostUnload(pGpu, pEngstate, arg3) dmaStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) +#define dmaStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define dmaStateDestroy(pGpu, pEngstate) dmaStateDestroy_DISPATCH(pGpu, pEngstate) +#define dmaIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ #define dmaIsPresent(pGpu, pEngstate) dmaIsPresent_DISPATCH(pGpu, pEngstate) + +// Dispatch functions +static inline NV_STATUS dmaConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, ENGDESCRIPTOR arg3) { + return pDma->__dmaConstructEngine__(pGpu, pDma, arg3); +} + +static inline NV_STATUS dmaStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma) { + return pDma->__dmaStateInitLocked__(pGpu, pDma); +} + +static inline NV_STATUS dmaAllocBar1P2PMapping_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, DMA_BAR1P2P_MAPPING_PRARAMS *params) { + return pDma->__dmaAllocBar1P2PMapping__(pGpu, pDma, params); +} + +static inline void dmaFreeBar1P2PMapping_DISPATCH(struct VirtMemAllocator *pDma, CLI_DMA_MAPPING_INFO *arg2) { + pDma->__dmaFreeBar1P2PMapping__(pDma, arg2); +} + +static inline NV_STATUS dmaStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, NvU32 arg3) { + return pDma->__dmaStatePostLoad__(pGpu, pDma, arg3); +} + +static inline void dmaInitMissing_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { + pEngstate->__dmaInitMissing__(pGpu, pEngstate); +} + +static inline NV_STATUS dmaStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { + return pEngstate->__dmaStatePreInitLocked__(pGpu, pEngstate); +} + +static inline NV_STATUS dmaStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { + return pEngstate->__dmaStatePreInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS dmaStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { + return pEngstate->__dmaStateInitUnlocked__(pGpu, pEngstate); +} + +static inline NV_STATUS dmaStatePreLoad_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { + return pEngstate->__dmaStatePreLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS dmaStateLoad_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { + return pEngstate->__dmaStateLoad__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS dmaStatePreUnload_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { + return pEngstate->__dmaStatePreUnload__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS dmaStateUnload_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { + return pEngstate->__dmaStateUnload__(pGpu, pEngstate, arg3); +} + +static inline NV_STATUS dmaStatePostUnload_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { + return pEngstate->__dmaStatePostUnload__(pGpu, pEngstate, arg3); +} + +static inline void dmaStateDestroy_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { + pEngstate->__dmaStateDestroy__(pGpu, pEngstate); +} + +static inline NvBool dmaIsPresent_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { + return pEngstate->__dmaIsPresent__(pGpu, pEngstate); +} + NV_STATUS dmaInit_GM107(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma); @@ -213,7 +320,7 @@ static inline NV_STATUS dmaInit(struct OBJGPU *pGpu, struct VirtMemAllocator *pD #define dmaInit_HAL(pGpu, pDma) dmaInit(pGpu, pDma) -NV_STATUS dmaConstructHal_VGPUSTUB(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma); +NV_STATUS dmaConstructHal_VF(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma); static inline NV_STATUS dmaConstructHal_56cd7a(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma) { return NV_OK; @@ -226,7 +333,7 @@ static inline NV_STATUS dmaConstructHal(struct OBJGPU *pGpu, struct VirtMemAlloc return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_virt_mem_allocator_h_disabled -#define dmaConstructHal(pGpu, pDma) dmaConstructHal_VGPUSTUB(pGpu, pDma) +#define dmaConstructHal(pGpu, pDma) dmaConstructHal_VF(pGpu, pDma) #endif //__nvoc_virt_mem_allocator_h_disabled #define dmaConstructHal_HAL(pGpu, pDma) dmaConstructHal(pGpu, pDma) @@ -249,33 +356,33 @@ static inline NV_STATUS dmaInitGart(struct OBJGPU *pGpu, struct VirtMemAllocator #define dmaInitGart_HAL(pGpu, pDma) dmaInitGart(pGpu, pDma) -NV_STATUS dmaAllocMapping_GM107(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, struct OBJVASPACE *arg0, MEMORY_DESCRIPTOR *arg1, NvU64 *arg2, NvU32 arg3, CLI_DMA_ALLOC_MAP_INFO *arg4, NvU32 arg5); +NV_STATUS dmaAllocMapping_GM107(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, struct OBJVASPACE *arg3, MEMORY_DESCRIPTOR *arg4, NvU64 *arg5, NvU32 arg6, CLI_DMA_ALLOC_MAP_INFO *arg7, NvU32 arg8); #ifdef __nvoc_virt_mem_allocator_h_disabled -static inline NV_STATUS dmaAllocMapping(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, struct OBJVASPACE *arg0, MEMORY_DESCRIPTOR *arg1, NvU64 *arg2, NvU32 arg3, CLI_DMA_ALLOC_MAP_INFO *arg4, NvU32 arg5) { +static inline NV_STATUS dmaAllocMapping(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, struct OBJVASPACE *arg3, MEMORY_DESCRIPTOR *arg4, NvU64 *arg5, NvU32 arg6, CLI_DMA_ALLOC_MAP_INFO *arg7, NvU32 arg8) { NV_ASSERT_FAILED_PRECOMP("VirtMemAllocator was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_virt_mem_allocator_h_disabled -#define dmaAllocMapping(pGpu, pDma, arg0, arg1, arg2, arg3, arg4, arg5) dmaAllocMapping_GM107(pGpu, pDma, arg0, arg1, arg2, arg3, arg4, arg5) +#define dmaAllocMapping(pGpu, pDma, arg3, arg4, arg5, arg6, arg7, arg8) dmaAllocMapping_GM107(pGpu, pDma, arg3, arg4, arg5, arg6, arg7, arg8) #endif //__nvoc_virt_mem_allocator_h_disabled -#define dmaAllocMapping_HAL(pGpu, pDma, arg0, arg1, arg2, arg3, arg4, arg5) dmaAllocMapping(pGpu, pDma, arg0, arg1, arg2, arg3, arg4, arg5) +#define dmaAllocMapping_HAL(pGpu, pDma, arg3, arg4, arg5, arg6, arg7, arg8) dmaAllocMapping(pGpu, pDma, arg3, arg4, arg5, arg6, arg7, arg8) -NV_STATUS dmaFreeMapping_GM107(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, struct OBJVASPACE *arg0, NvU64 arg1, MEMORY_DESCRIPTOR *arg2, NvU32 arg3, CLI_DMA_ALLOC_MAP_INFO *arg4); +NV_STATUS dmaFreeMapping_GM107(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, struct OBJVASPACE *arg3, NvU64 arg4, MEMORY_DESCRIPTOR *arg5, NvU32 arg6, CLI_DMA_ALLOC_MAP_INFO *arg7); #ifdef __nvoc_virt_mem_allocator_h_disabled -static inline NV_STATUS dmaFreeMapping(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, struct OBJVASPACE *arg0, NvU64 arg1, MEMORY_DESCRIPTOR *arg2, NvU32 arg3, CLI_DMA_ALLOC_MAP_INFO *arg4) { +static inline NV_STATUS dmaFreeMapping(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, struct OBJVASPACE *arg3, NvU64 arg4, MEMORY_DESCRIPTOR *arg5, NvU32 arg6, CLI_DMA_ALLOC_MAP_INFO *arg7) { NV_ASSERT_FAILED_PRECOMP("VirtMemAllocator was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_virt_mem_allocator_h_disabled -#define dmaFreeMapping(pGpu, pDma, arg0, arg1, arg2, arg3, arg4) dmaFreeMapping_GM107(pGpu, pDma, arg0, arg1, arg2, arg3, arg4) +#define dmaFreeMapping(pGpu, pDma, arg3, arg4, arg5, arg6, arg7) dmaFreeMapping_GM107(pGpu, pDma, arg3, arg4, arg5, arg6, arg7) #endif //__nvoc_virt_mem_allocator_h_disabled -#define dmaFreeMapping_HAL(pGpu, pDma, arg0, arg1, arg2, arg3, arg4) dmaFreeMapping(pGpu, pDma, arg0, arg1, arg2, arg3, arg4) +#define dmaFreeMapping_HAL(pGpu, pDma, arg3, arg4, arg5, arg6, arg7) dmaFreeMapping(pGpu, pDma, arg3, arg4, arg5, arg6, arg7) NV_STATUS dmaUpdateVASpace_GF100(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, struct OBJVASPACE *pVAS, MEMORY_DESCRIPTOR *pMemDesc, NvU8 *tgtPteMem, NvU64 vAddr, NvU64 vAddrLimit, NvU32 flags, DMA_PAGE_ARRAY *pPageArray, NvU32 overmapPteMod, COMPR_INFO *pComprInfo, NvU64 surfaceOffset, NvU32 valid, NvU32 aperture, NvU32 peer, NvU64 fabricAddr, NvU32 deferInvalidate, NvBool bSparse, NvU64 pageSize); @@ -362,108 +469,44 @@ static inline struct OBJVASPACE *dmaGetPrivateVAS(struct VirtMemAllocator *pDma) #define dmaGetPrivateVAS_HAL(pDma) dmaGetPrivateVAS(pDma) -NV_STATUS dmaConstructEngine_IMPL(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, ENGDESCRIPTOR arg0); - -static inline NV_STATUS dmaConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, ENGDESCRIPTOR arg0) { - return pDma->__dmaConstructEngine__(pGpu, pDma, arg0); -} +NV_STATUS dmaConstructEngine_IMPL(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, ENGDESCRIPTOR arg3); NV_STATUS dmaStateInitLocked_IMPL(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma); -static inline NV_STATUS dmaStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma) { - return pDma->__dmaStateInitLocked__(pGpu, pDma); -} - NV_STATUS dmaAllocBar1P2PMapping_GH100(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, DMA_BAR1P2P_MAPPING_PRARAMS *params); static inline NV_STATUS dmaAllocBar1P2PMapping_46f6a7(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, DMA_BAR1P2P_MAPPING_PRARAMS *params) { return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS dmaAllocBar1P2PMapping_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, DMA_BAR1P2P_MAPPING_PRARAMS *params) { - return pDma->__dmaAllocBar1P2PMapping__(pGpu, pDma, params); -} - -void dmaFreeBar1P2PMapping_GH100(struct VirtMemAllocator *pDma, CLI_DMA_MAPPING_INFO *arg0); +void dmaFreeBar1P2PMapping_GH100(struct VirtMemAllocator *pDma, CLI_DMA_MAPPING_INFO *arg2); -static inline void dmaFreeBar1P2PMapping_b3696a(struct VirtMemAllocator *pDma, CLI_DMA_MAPPING_INFO *arg0) { +static inline void dmaFreeBar1P2PMapping_b3696a(struct VirtMemAllocator *pDma, CLI_DMA_MAPPING_INFO *arg2) { return; } -static inline void dmaFreeBar1P2PMapping_DISPATCH(struct VirtMemAllocator *pDma, CLI_DMA_MAPPING_INFO *arg0) { - pDma->__dmaFreeBar1P2PMapping__(pDma, arg0); -} - -NV_STATUS dmaStatePostLoad_GM107(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, NvU32 arg0); - -static inline NV_STATUS dmaStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, NvU32 arg0) { - return pDma->__dmaStatePostLoad__(pGpu, pDma, arg0); -} - -static inline NV_STATUS dmaStateLoad_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg0) { - return pEngstate->__dmaStateLoad__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS dmaStateUnload_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg0) { - return pEngstate->__dmaStateUnload__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS dmaStatePreLoad_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg0) { - return pEngstate->__dmaStatePreLoad__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS dmaStatePostUnload_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg0) { - return pEngstate->__dmaStatePostUnload__(pGpu, pEngstate, arg0); -} - -static inline void dmaStateDestroy_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { - pEngstate->__dmaStateDestroy__(pGpu, pEngstate); -} - -static inline NV_STATUS dmaStatePreUnload_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg0) { - return pEngstate->__dmaStatePreUnload__(pGpu, pEngstate, arg0); -} - -static inline NV_STATUS dmaStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { - return pEngstate->__dmaStateInitUnlocked__(pGpu, pEngstate); -} - -static inline void dmaInitMissing_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { - pEngstate->__dmaInitMissing__(pGpu, pEngstate); -} - -static inline NV_STATUS dmaStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { - return pEngstate->__dmaStatePreInitLocked__(pGpu, pEngstate); -} - -static inline NV_STATUS dmaStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { - return pEngstate->__dmaStatePreInitUnlocked__(pGpu, pEngstate); -} - -static inline NvBool dmaIsPresent_DISPATCH(POBJGPU pGpu, struct VirtMemAllocator *pEngstate) { - return pEngstate->__dmaIsPresent__(pGpu, pEngstate); -} +NV_STATUS dmaStatePostLoad_GM107(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, NvU32 arg3); -NV_STATUS dmaAllocMap_IMPL(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, struct OBJVASPACE *arg0, VirtualMemory *arg1, Memory *arg2, CLI_DMA_MAPPING_INFO *arg3); +NV_STATUS dmaAllocMap_IMPL(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, struct OBJVASPACE *arg3, VirtualMemory *arg4, Memory *arg5, CLI_DMA_MAPPING_INFO *arg6); #ifdef __nvoc_virt_mem_allocator_h_disabled -static inline NV_STATUS dmaAllocMap(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, struct OBJVASPACE *arg0, VirtualMemory *arg1, Memory *arg2, CLI_DMA_MAPPING_INFO *arg3) { +static inline NV_STATUS dmaAllocMap(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, struct OBJVASPACE *arg3, VirtualMemory *arg4, Memory *arg5, CLI_DMA_MAPPING_INFO *arg6) { NV_ASSERT_FAILED_PRECOMP("VirtMemAllocator was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_virt_mem_allocator_h_disabled -#define dmaAllocMap(pGpu, pDma, arg0, arg1, arg2, arg3) dmaAllocMap_IMPL(pGpu, pDma, arg0, arg1, arg2, arg3) +#define dmaAllocMap(pGpu, pDma, arg3, arg4, arg5, arg6) dmaAllocMap_IMPL(pGpu, pDma, arg3, arg4, arg5, arg6) #endif //__nvoc_virt_mem_allocator_h_disabled -NV_STATUS dmaFreeMap_IMPL(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, struct OBJVASPACE *arg0, VirtualMemory *arg1, CLI_DMA_MAPPING_INFO *arg2, NvU32 flags); +NV_STATUS dmaFreeMap_IMPL(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, struct OBJVASPACE *arg3, VirtualMemory *arg4, CLI_DMA_MAPPING_INFO *arg5, NvU32 flags); #ifdef __nvoc_virt_mem_allocator_h_disabled -static inline NV_STATUS dmaFreeMap(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, struct OBJVASPACE *arg0, VirtualMemory *arg1, CLI_DMA_MAPPING_INFO *arg2, NvU32 flags) { +static inline NV_STATUS dmaFreeMap(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, struct OBJVASPACE *arg3, VirtualMemory *arg4, CLI_DMA_MAPPING_INFO *arg5, NvU32 flags) { NV_ASSERT_FAILED_PRECOMP("VirtMemAllocator was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_virt_mem_allocator_h_disabled -#define dmaFreeMap(pGpu, pDma, arg0, arg1, arg2, flags) dmaFreeMap_IMPL(pGpu, pDma, arg0, arg1, arg2, flags) +#define dmaFreeMap(pGpu, pDma, arg3, arg4, arg5, flags) dmaFreeMap_IMPL(pGpu, pDma, arg3, arg4, arg5, flags) #endif //__nvoc_virt_mem_allocator_h_disabled #undef PRIVATE_FIELD @@ -508,7 +551,6 @@ typedef enum struct DMA_PAGE_ARRAY { void *pData; //!< Array of PTE addresses or opaque OS-specific data. - RmPhysAddr orMask; //!< Mask to be bitwise-ORed onto each page address. NvU32 startIndex; //!< Base index into the pData array. NvU32 count; //!< Number of pages represented by this array. NvBool bOsFormat; //!< Indicates if pData is an opaque OS-specific data. diff --git a/src/nvidia/generated/g_virt_mem_mgr_nvoc.c b/src/nvidia/generated/g_virt_mem_mgr_nvoc.c index c5ae70fab9..f68f60aa06 100644 --- a/src/nvidia/generated/g_virt_mem_mgr_nvoc.c +++ b/src/nvidia/generated/g_virt_mem_mgr_nvoc.c @@ -87,10 +87,13 @@ NV_STATUS __nvoc_ctor_OBJVMM(OBJVMM *pThis) { return status; } +// Vtable initialization static void __nvoc_init_funcTable_OBJVMM_1(OBJVMM *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); -} +} // End __nvoc_init_funcTable_OBJVMM_1 + +// Initialize vtable(s): Nothing to do for empty vtables void __nvoc_init_funcTable_OBJVMM(OBJVMM *pThis) { __nvoc_init_funcTable_OBJVMM_1(pThis); } diff --git a/src/nvidia/generated/g_virt_mem_mgr_nvoc.h b/src/nvidia/generated/g_virt_mem_mgr_nvoc.h index 726e590ebc..cab3a4d86b 100644 --- a/src/nvidia/generated/g_virt_mem_mgr_nvoc.h +++ b/src/nvidia/generated/g_virt_mem_mgr_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_VIRT_MEM_MGR_NVOC_H_ #define _G_VIRT_MEM_MGR_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_virt_mem_mgr_nvoc.h" #ifndef VIRT_MEM_MGR_H @@ -63,11 +71,18 @@ typedef struct OBJVMM OBJVMM; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct OBJVMM { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; - struct Object *__nvoc_pbase_Object; - struct OBJVMM *__nvoc_pbase_OBJVMM; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super + struct OBJVMM *__nvoc_pbase_OBJVMM; // vmm }; #ifndef __NVOC_CLASS_OBJVMM_TYPEDEF__ @@ -79,6 +94,7 @@ typedef struct OBJVMM OBJVMM; #define __nvoc_class_id_OBJVMM 0xa030ab #endif /* __nvoc_class_id_OBJVMM */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJVMM; #define __staticCast_OBJVMM(pThis) \ @@ -91,13 +107,16 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJVMM; ((OBJVMM*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJVMM))) #endif //__nvoc_virt_mem_mgr_h_disabled - NV_STATUS __nvoc_objCreateDynamic_OBJVMM(OBJVMM**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_OBJVMM(OBJVMM**, Dynamic*, NvU32); #define __objCreate_OBJVMM(ppNewObj, pParent, createFlags) \ __nvoc_objCreate_OBJVMM((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) + +// Wrapper macros + +// Dispatch functions NV_STATUS vmmCreateVaspace_IMPL(struct OBJVMM *pVmm, NvU32 _class, NvU32 vaspaceId, NvU32 gpuMask, NvU64 vaStart, NvU64 vaLimit, NvU64 vaInternalStart, NvU64 vaInternalEnd, struct OBJVASPACE *pPteSpaceMap, NvU32 flags, struct OBJVASPACE **ppVAS); #ifdef __nvoc_virt_mem_mgr_h_disabled diff --git a/src/nvidia/generated/g_virt_mem_range_nvoc.c b/src/nvidia/generated/g_virt_mem_range_nvoc.c index 4e42884cbf..49623512ed 100644 --- a/src/nvidia/generated/g_virt_mem_range_nvoc.c +++ b/src/nvidia/generated/g_virt_mem_range_nvoc.c @@ -111,110 +111,139 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_VirtualMemoryRange = /*pExportInfo=*/ &__nvoc_export_info_VirtualMemoryRange }; -static NV_STATUS __nvoc_thunk_Memory_vmrangeCheckMemInterUnmap(struct VirtualMemoryRange *pMemory, NvBool bSubdeviceHandleProvided) { - return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), bSubdeviceHandleProvided); +// 26 up-thunk(s) defined to bridge methods in VirtualMemoryRange to superclasses + +// vmrangeMapTo: virtual inherited (virtmem) base (virtmem) +static NV_STATUS __nvoc_up_thunk_VirtualMemory_vmrangeMapTo(struct VirtualMemoryRange *pVirtualMemory, struct RS_RES_MAP_TO_PARAMS *pParams) { + return virtmemMapTo((struct VirtualMemory *)(((unsigned char *) pVirtualMemory) + __nvoc_rtti_VirtualMemoryRange_VirtualMemory.offset), pParams); } -static NV_STATUS __nvoc_thunk_VirtualMemory_vmrangeMapTo(struct VirtualMemoryRange *pVirtualMemory, struct RS_RES_MAP_TO_PARAMS *pParams) { - return virtmemMapTo((struct VirtualMemory *)(((unsigned char *)pVirtualMemory) + __nvoc_rtti_VirtualMemoryRange_VirtualMemory.offset), pParams); +// vmrangeUnmapFrom: virtual inherited (virtmem) base (virtmem) +static NV_STATUS __nvoc_up_thunk_VirtualMemory_vmrangeUnmapFrom(struct VirtualMemoryRange *pVirtualMemory, struct RS_RES_UNMAP_FROM_PARAMS *pParams) { + return virtmemUnmapFrom((struct VirtualMemory *)(((unsigned char *) pVirtualMemory) + __nvoc_rtti_VirtualMemoryRange_VirtualMemory.offset), pParams); } -static NvBool __nvoc_thunk_RmResource_vmrangeShareCallback(struct VirtualMemoryRange *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VirtualMemoryRange_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// vmrangeIsPartialUnmapSupported: inline virtual inherited (virtmem) base (virtmem) body +static NvBool __nvoc_up_thunk_VirtualMemory_vmrangeIsPartialUnmapSupported(struct VirtualMemoryRange *pVirtualMemory) { + return virtmemIsPartialUnmapSupported((struct VirtualMemory *)(((unsigned char *) pVirtualMemory) + __nvoc_rtti_VirtualMemoryRange_VirtualMemory.offset)); } -static NV_STATUS __nvoc_thunk_Memory_vmrangeGetMapAddrSpace(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return memGetMapAddrSpace((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pCallContext, mapFlags, pAddrSpace); +// vmrangeCanCopy: virtual inherited (stdmem) base (virtmem) +static NvBool __nvoc_up_thunk_StandardMemory_vmrangeCanCopy(struct VirtualMemoryRange *pStandardMemory) { + return stdmemCanCopy((struct StandardMemory *)(((unsigned char *) pStandardMemory) + __nvoc_rtti_VirtualMemoryRange_StandardMemory.offset)); } -static NvBool __nvoc_thunk_Memory_vmrangeIsExportAllowed(struct VirtualMemoryRange *pMemory) { - return memIsExportAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset)); +// vmrangeIsDuplicate: virtual inherited (mem) base (virtmem) +static NV_STATUS __nvoc_up_thunk_Memory_vmrangeIsDuplicate(struct VirtualMemoryRange *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), hMemory, pDuplicate); } -static NvU32 __nvoc_thunk_RsResource_vmrangeGetRefCount(struct VirtualMemoryRange *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VirtualMemoryRange_RsResource.offset)); +// vmrangeGetMapAddrSpace: virtual inherited (mem) base (virtmem) +static NV_STATUS __nvoc_up_thunk_Memory_vmrangeGetMapAddrSpace(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pCallContext, mapFlags, pAddrSpace); } -static void __nvoc_thunk_RsResource_vmrangeAddAdditionalDependants(struct RsClient *pClient, struct VirtualMemoryRange *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VirtualMemoryRange_RsResource.offset), pReference); +// vmrangeControl: virtual inherited (mem) base (virtmem) +static NV_STATUS __nvoc_up_thunk_Memory_vmrangeControl(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_RmResource_vmrangeControl_Prologue(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VirtualMemoryRange_RmResource.offset), pCallContext, pParams); +// vmrangeMap: virtual inherited (mem) base (virtmem) +static NV_STATUS __nvoc_up_thunk_Memory_vmrangeMap(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pCallContext, pParams, pCpuMapping); } -static NvBool __nvoc_thunk_Memory_vmrangeIsGpuMapAllowed(struct VirtualMemoryRange *pMemory, struct OBJGPU *pGpu) { - return memIsGpuMapAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pGpu); +// vmrangeUnmap: virtual inherited (mem) base (virtmem) +static NV_STATUS __nvoc_up_thunk_Memory_vmrangeUnmap(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_VirtualMemory_vmrangeUnmapFrom(struct VirtualMemoryRange *pVirtualMemory, struct RS_RES_UNMAP_FROM_PARAMS *pParams) { - return virtmemUnmapFrom((struct VirtualMemory *)(((unsigned char *)pVirtualMemory) + __nvoc_rtti_VirtualMemoryRange_VirtualMemory.offset), pParams); +// vmrangeGetMemInterMapParams: virtual inherited (mem) base (virtmem) +static NV_STATUS __nvoc_up_thunk_Memory_vmrangeGetMemInterMapParams(struct VirtualMemoryRange *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pParams); } -static void __nvoc_thunk_RmResource_vmrangeControl_Epilogue(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VirtualMemoryRange_RmResource.offset), pCallContext, pParams); +// vmrangeCheckMemInterUnmap: inline virtual inherited (mem) base (virtmem) body +static NV_STATUS __nvoc_up_thunk_Memory_vmrangeCheckMemInterUnmap(struct VirtualMemoryRange *pMemory, NvBool bSubdeviceHandleProvided) { + return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), bSubdeviceHandleProvided); } -static NV_STATUS __nvoc_thunk_Memory_vmrangeControl(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memControl((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pCallContext, pParams); +// vmrangeGetMemoryMappingDescriptor: virtual inherited (mem) base (virtmem) +static NV_STATUS __nvoc_up_thunk_Memory_vmrangeGetMemoryMappingDescriptor(struct VirtualMemoryRange *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_Memory_vmrangeUnmap(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pCallContext, pCpuMapping); +// vmrangeCheckCopyPermissions: inline virtual inherited (mem) base (virtmem) body +static NV_STATUS __nvoc_up_thunk_Memory_vmrangeCheckCopyPermissions(struct VirtualMemoryRange *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pDstGpu, pDstDevice); } -static NV_STATUS __nvoc_thunk_Memory_vmrangeGetMemInterMapParams(struct VirtualMemoryRange *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pParams); +// vmrangeIsReady: virtual inherited (mem) base (virtmem) +static NV_STATUS __nvoc_up_thunk_Memory_vmrangeIsReady(struct VirtualMemoryRange *pMemory, NvBool bCopyConstructorContext) { + return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), bCopyConstructorContext); } -static NV_STATUS __nvoc_thunk_Memory_vmrangeGetMemoryMappingDescriptor(struct VirtualMemoryRange *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), ppMemDesc); +// vmrangeIsGpuMapAllowed: inline virtual inherited (mem) base (virtmem) body +static NvBool __nvoc_up_thunk_Memory_vmrangeIsGpuMapAllowed(struct VirtualMemoryRange *pMemory, struct OBJGPU *pGpu) { + return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pGpu); } -static NV_STATUS __nvoc_thunk_RsResource_vmrangeControlFilter(struct VirtualMemoryRange *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VirtualMemoryRange_RsResource.offset), pCallContext, pParams); +// vmrangeIsExportAllowed: inline virtual inherited (mem) base (virtmem) body +static NvBool __nvoc_up_thunk_Memory_vmrangeIsExportAllowed(struct VirtualMemoryRange *pMemory) { + return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset)); } -static NV_STATUS __nvoc_thunk_RmResource_vmrangeControlSerialization_Prologue(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VirtualMemoryRange_RmResource.offset), pCallContext, pParams); +// vmrangeAccessCallback: virtual inherited (rmres) base (virtmem) +static NvBool __nvoc_up_thunk_RmResource_vmrangeAccessCallback(struct VirtualMemoryRange *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemoryRange_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NvBool __nvoc_thunk_StandardMemory_vmrangeCanCopy(struct VirtualMemoryRange *pStandardMemory) { - return stdmemCanCopy((struct StandardMemory *)(((unsigned char *)pStandardMemory) + __nvoc_rtti_VirtualMemoryRange_StandardMemory.offset)); +// vmrangeShareCallback: virtual inherited (rmres) base (virtmem) +static NvBool __nvoc_up_thunk_RmResource_vmrangeShareCallback(struct VirtualMemoryRange *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemoryRange_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NvBool __nvoc_thunk_VirtualMemory_vmrangeIsPartialUnmapSupported(struct VirtualMemoryRange *pVirtualMemory) { - return virtmemIsPartialUnmapSupported((struct VirtualMemory *)(((unsigned char *)pVirtualMemory) + __nvoc_rtti_VirtualMemoryRange_VirtualMemory.offset)); +// vmrangeControlSerialization_Prologue: virtual inherited (rmres) base (virtmem) +static NV_STATUS __nvoc_up_thunk_RmResource_vmrangeControlSerialization_Prologue(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemoryRange_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_vmrangeIsReady(struct VirtualMemoryRange *pMemory, NvBool bCopyConstructorContext) { - return memIsReady((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), bCopyConstructorContext); +// vmrangeControlSerialization_Epilogue: virtual inherited (rmres) base (virtmem) +static void __nvoc_up_thunk_RmResource_vmrangeControlSerialization_Epilogue(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemoryRange_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_vmrangeCheckCopyPermissions(struct VirtualMemoryRange *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return memCheckCopyPermissions((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pDstGpu, pDstDevice); +// vmrangeControl_Prologue: virtual inherited (rmres) base (virtmem) +static NV_STATUS __nvoc_up_thunk_RmResource_vmrangeControl_Prologue(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemoryRange_RmResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_vmrangePreDestruct(struct VirtualMemoryRange *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VirtualMemoryRange_RsResource.offset)); +// vmrangeControl_Epilogue: virtual inherited (rmres) base (virtmem) +static void __nvoc_up_thunk_RmResource_vmrangeControl_Epilogue(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemoryRange_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_vmrangeIsDuplicate(struct VirtualMemoryRange *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), hMemory, pDuplicate); +// vmrangePreDestruct: virtual inherited (res) base (virtmem) +static void __nvoc_up_thunk_RsResource_vmrangePreDestruct(struct VirtualMemoryRange *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemoryRange_RsResource.offset)); } -static void __nvoc_thunk_RmResource_vmrangeControlSerialization_Epilogue(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VirtualMemoryRange_RmResource.offset), pCallContext, pParams); +// vmrangeControlFilter: virtual inherited (res) base (virtmem) +static NV_STATUS __nvoc_up_thunk_RsResource_vmrangeControlFilter(struct VirtualMemoryRange *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemoryRange_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_vmrangeMap(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pCallContext, pParams, pCpuMapping); +// vmrangeGetRefCount: virtual inherited (res) base (virtmem) +static NvU32 __nvoc_up_thunk_RsResource_vmrangeGetRefCount(struct VirtualMemoryRange *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemoryRange_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_vmrangeAccessCallback(struct VirtualMemoryRange *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VirtualMemoryRange_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// vmrangeAddAdditionalDependants: virtual inherited (res) base (virtmem) +static void __nvoc_up_thunk_RsResource_vmrangeAddAdditionalDependants(struct RsClient *pClient, struct VirtualMemoryRange *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemoryRange_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_VirtualMemoryRange = { /*numEntries=*/ 0, @@ -250,63 +279,94 @@ NV_STATUS __nvoc_ctor_VirtualMemoryRange(VirtualMemoryRange *pThis, CALL_CONTEXT return status; } +// Vtable initialization static void __nvoc_init_funcTable_VirtualMemoryRange_1(VirtualMemoryRange *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - pThis->__vmrangeCheckMemInterUnmap__ = &__nvoc_thunk_Memory_vmrangeCheckMemInterUnmap; + // vmrangeMapTo -- virtual inherited (virtmem) base (virtmem) + pThis->__vmrangeMapTo__ = &__nvoc_up_thunk_VirtualMemory_vmrangeMapTo; - pThis->__vmrangeMapTo__ = &__nvoc_thunk_VirtualMemory_vmrangeMapTo; + // vmrangeUnmapFrom -- virtual inherited (virtmem) base (virtmem) + pThis->__vmrangeUnmapFrom__ = &__nvoc_up_thunk_VirtualMemory_vmrangeUnmapFrom; - pThis->__vmrangeShareCallback__ = &__nvoc_thunk_RmResource_vmrangeShareCallback; + // vmrangeIsPartialUnmapSupported -- inline virtual inherited (virtmem) base (virtmem) body + pThis->__vmrangeIsPartialUnmapSupported__ = &__nvoc_up_thunk_VirtualMemory_vmrangeIsPartialUnmapSupported; - pThis->__vmrangeGetMapAddrSpace__ = &__nvoc_thunk_Memory_vmrangeGetMapAddrSpace; + // vmrangeCanCopy -- virtual inherited (stdmem) base (virtmem) + pThis->__vmrangeCanCopy__ = &__nvoc_up_thunk_StandardMemory_vmrangeCanCopy; - pThis->__vmrangeIsExportAllowed__ = &__nvoc_thunk_Memory_vmrangeIsExportAllowed; + // vmrangeIsDuplicate -- virtual inherited (mem) base (virtmem) + pThis->__vmrangeIsDuplicate__ = &__nvoc_up_thunk_Memory_vmrangeIsDuplicate; - pThis->__vmrangeGetRefCount__ = &__nvoc_thunk_RsResource_vmrangeGetRefCount; + // vmrangeGetMapAddrSpace -- virtual inherited (mem) base (virtmem) + pThis->__vmrangeGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_vmrangeGetMapAddrSpace; - pThis->__vmrangeAddAdditionalDependants__ = &__nvoc_thunk_RsResource_vmrangeAddAdditionalDependants; + // vmrangeControl -- virtual inherited (mem) base (virtmem) + pThis->__vmrangeControl__ = &__nvoc_up_thunk_Memory_vmrangeControl; - pThis->__vmrangeControl_Prologue__ = &__nvoc_thunk_RmResource_vmrangeControl_Prologue; + // vmrangeMap -- virtual inherited (mem) base (virtmem) + pThis->__vmrangeMap__ = &__nvoc_up_thunk_Memory_vmrangeMap; - pThis->__vmrangeIsGpuMapAllowed__ = &__nvoc_thunk_Memory_vmrangeIsGpuMapAllowed; + // vmrangeUnmap -- virtual inherited (mem) base (virtmem) + pThis->__vmrangeUnmap__ = &__nvoc_up_thunk_Memory_vmrangeUnmap; - pThis->__vmrangeUnmapFrom__ = &__nvoc_thunk_VirtualMemory_vmrangeUnmapFrom; + // vmrangeGetMemInterMapParams -- virtual inherited (mem) base (virtmem) + pThis->__vmrangeGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_vmrangeGetMemInterMapParams; - pThis->__vmrangeControl_Epilogue__ = &__nvoc_thunk_RmResource_vmrangeControl_Epilogue; + // vmrangeCheckMemInterUnmap -- inline virtual inherited (mem) base (virtmem) body + pThis->__vmrangeCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_vmrangeCheckMemInterUnmap; - pThis->__vmrangeControl__ = &__nvoc_thunk_Memory_vmrangeControl; + // vmrangeGetMemoryMappingDescriptor -- virtual inherited (mem) base (virtmem) + pThis->__vmrangeGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_vmrangeGetMemoryMappingDescriptor; - pThis->__vmrangeUnmap__ = &__nvoc_thunk_Memory_vmrangeUnmap; + // vmrangeCheckCopyPermissions -- inline virtual inherited (mem) base (virtmem) body + pThis->__vmrangeCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_vmrangeCheckCopyPermissions; - pThis->__vmrangeGetMemInterMapParams__ = &__nvoc_thunk_Memory_vmrangeGetMemInterMapParams; + // vmrangeIsReady -- virtual inherited (mem) base (virtmem) + pThis->__vmrangeIsReady__ = &__nvoc_up_thunk_Memory_vmrangeIsReady; - pThis->__vmrangeGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_vmrangeGetMemoryMappingDescriptor; + // vmrangeIsGpuMapAllowed -- inline virtual inherited (mem) base (virtmem) body + pThis->__vmrangeIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_vmrangeIsGpuMapAllowed; - pThis->__vmrangeControlFilter__ = &__nvoc_thunk_RsResource_vmrangeControlFilter; + // vmrangeIsExportAllowed -- inline virtual inherited (mem) base (virtmem) body + pThis->__vmrangeIsExportAllowed__ = &__nvoc_up_thunk_Memory_vmrangeIsExportAllowed; - pThis->__vmrangeControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_vmrangeControlSerialization_Prologue; + // vmrangeAccessCallback -- virtual inherited (rmres) base (virtmem) + pThis->__vmrangeAccessCallback__ = &__nvoc_up_thunk_RmResource_vmrangeAccessCallback; - pThis->__vmrangeCanCopy__ = &__nvoc_thunk_StandardMemory_vmrangeCanCopy; + // vmrangeShareCallback -- virtual inherited (rmres) base (virtmem) + pThis->__vmrangeShareCallback__ = &__nvoc_up_thunk_RmResource_vmrangeShareCallback; - pThis->__vmrangeIsPartialUnmapSupported__ = &__nvoc_thunk_VirtualMemory_vmrangeIsPartialUnmapSupported; + // vmrangeControlSerialization_Prologue -- virtual inherited (rmres) base (virtmem) + pThis->__vmrangeControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vmrangeControlSerialization_Prologue; - pThis->__vmrangeIsReady__ = &__nvoc_thunk_Memory_vmrangeIsReady; + // vmrangeControlSerialization_Epilogue -- virtual inherited (rmres) base (virtmem) + pThis->__vmrangeControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vmrangeControlSerialization_Epilogue; - pThis->__vmrangeCheckCopyPermissions__ = &__nvoc_thunk_Memory_vmrangeCheckCopyPermissions; + // vmrangeControl_Prologue -- virtual inherited (rmres) base (virtmem) + pThis->__vmrangeControl_Prologue__ = &__nvoc_up_thunk_RmResource_vmrangeControl_Prologue; - pThis->__vmrangePreDestruct__ = &__nvoc_thunk_RsResource_vmrangePreDestruct; + // vmrangeControl_Epilogue -- virtual inherited (rmres) base (virtmem) + pThis->__vmrangeControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vmrangeControl_Epilogue; - pThis->__vmrangeIsDuplicate__ = &__nvoc_thunk_Memory_vmrangeIsDuplicate; + // vmrangePreDestruct -- virtual inherited (res) base (virtmem) + pThis->__vmrangePreDestruct__ = &__nvoc_up_thunk_RsResource_vmrangePreDestruct; - pThis->__vmrangeControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_vmrangeControlSerialization_Epilogue; + // vmrangeControlFilter -- virtual inherited (res) base (virtmem) + pThis->__vmrangeControlFilter__ = &__nvoc_up_thunk_RsResource_vmrangeControlFilter; - pThis->__vmrangeMap__ = &__nvoc_thunk_Memory_vmrangeMap; + // vmrangeGetRefCount -- virtual inherited (res) base (virtmem) + pThis->__vmrangeGetRefCount__ = &__nvoc_up_thunk_RsResource_vmrangeGetRefCount; - pThis->__vmrangeAccessCallback__ = &__nvoc_thunk_RmResource_vmrangeAccessCallback; -} + // vmrangeAddAdditionalDependants -- virtual inherited (res) base (virtmem) + pThis->__vmrangeAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vmrangeAddAdditionalDependants; +} // End __nvoc_init_funcTable_VirtualMemoryRange_1 with approximately 26 basic block(s). + +// Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_VirtualMemoryRange(VirtualMemoryRange *pThis) { + + // Initialize vtable(s) with 26 per-object function pointer(s). __nvoc_init_funcTable_VirtualMemoryRange_1(pThis); } diff --git a/src/nvidia/generated/g_virt_mem_range_nvoc.h b/src/nvidia/generated/g_virt_mem_range_nvoc.h index ce83d95f84..1826297362 100644 --- a/src/nvidia/generated/g_virt_mem_range_nvoc.h +++ b/src/nvidia/generated/g_virt_mem_range_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_VIRT_MEM_RANGE_NVOC_H_ #define _G_VIRT_MEM_RANGE_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_virt_mem_range_nvoc.h" #ifndef _VIRT_MEM_RANGE_H_ @@ -52,43 +60,52 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct VirtualMemoryRange { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct VirtualMemory __nvoc_base_VirtualMemory; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Memory *__nvoc_pbase_Memory; - struct StandardMemory *__nvoc_pbase_StandardMemory; - struct VirtualMemory *__nvoc_pbase_VirtualMemory; - struct VirtualMemoryRange *__nvoc_pbase_VirtualMemoryRange; - NV_STATUS (*__vmrangeCheckMemInterUnmap__)(struct VirtualMemoryRange *, NvBool); - NV_STATUS (*__vmrangeMapTo__)(struct VirtualMemoryRange *, struct RS_RES_MAP_TO_PARAMS *); - NvBool (*__vmrangeShareCallback__)(struct VirtualMemoryRange *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__vmrangeGetMapAddrSpace__)(struct VirtualMemoryRange *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvBool (*__vmrangeIsExportAllowed__)(struct VirtualMemoryRange *); - NvU32 (*__vmrangeGetRefCount__)(struct VirtualMemoryRange *); - void (*__vmrangeAddAdditionalDependants__)(struct RsClient *, struct VirtualMemoryRange *, RsResourceRef *); - NV_STATUS (*__vmrangeControl_Prologue__)(struct VirtualMemoryRange *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__vmrangeIsGpuMapAllowed__)(struct VirtualMemoryRange *, struct OBJGPU *); - NV_STATUS (*__vmrangeUnmapFrom__)(struct VirtualMemoryRange *, struct RS_RES_UNMAP_FROM_PARAMS *); - void (*__vmrangeControl_Epilogue__)(struct VirtualMemoryRange *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vmrangeControl__)(struct VirtualMemoryRange *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vmrangeUnmap__)(struct VirtualMemoryRange *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__vmrangeGetMemInterMapParams__)(struct VirtualMemoryRange *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__vmrangeGetMemoryMappingDescriptor__)(struct VirtualMemoryRange *, MEMORY_DESCRIPTOR **); - NV_STATUS (*__vmrangeControlFilter__)(struct VirtualMemoryRange *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vmrangeControlSerialization_Prologue__)(struct VirtualMemoryRange *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__vmrangeCanCopy__)(struct VirtualMemoryRange *); - NvBool (*__vmrangeIsPartialUnmapSupported__)(struct VirtualMemoryRange *); - NV_STATUS (*__vmrangeIsReady__)(struct VirtualMemoryRange *, NvBool); - NV_STATUS (*__vmrangeCheckCopyPermissions__)(struct VirtualMemoryRange *, struct OBJGPU *, struct Device *); - void (*__vmrangePreDestruct__)(struct VirtualMemoryRange *); - NV_STATUS (*__vmrangeIsDuplicate__)(struct VirtualMemoryRange *, NvHandle, NvBool *); - void (*__vmrangeControlSerialization_Epilogue__)(struct VirtualMemoryRange *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__vmrangeMap__)(struct VirtualMemoryRange *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__vmrangeAccessCallback__)(struct VirtualMemoryRange *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^6 + struct RsResource *__nvoc_pbase_RsResource; // res super^5 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^5 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^4 + struct Memory *__nvoc_pbase_Memory; // mem super^3 + struct StandardMemory *__nvoc_pbase_StandardMemory; // stdmem super^2 + struct VirtualMemory *__nvoc_pbase_VirtualMemory; // virtmem super + struct VirtualMemoryRange *__nvoc_pbase_VirtualMemoryRange; // vmrange + + // Vtable with 26 per-object function pointers + NV_STATUS (*__vmrangeMapTo__)(struct VirtualMemoryRange * /*this*/, struct RS_RES_MAP_TO_PARAMS *); // virtual inherited (virtmem) base (virtmem) + NV_STATUS (*__vmrangeUnmapFrom__)(struct VirtualMemoryRange * /*this*/, struct RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (virtmem) base (virtmem) + NvBool (*__vmrangeIsPartialUnmapSupported__)(struct VirtualMemoryRange * /*this*/); // inline virtual inherited (virtmem) base (virtmem) body + NvBool (*__vmrangeCanCopy__)(struct VirtualMemoryRange * /*this*/); // virtual inherited (stdmem) base (virtmem) + NV_STATUS (*__vmrangeIsDuplicate__)(struct VirtualMemoryRange * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (virtmem) + NV_STATUS (*__vmrangeGetMapAddrSpace__)(struct VirtualMemoryRange * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (virtmem) + NV_STATUS (*__vmrangeControl__)(struct VirtualMemoryRange * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (mem) base (virtmem) + NV_STATUS (*__vmrangeMap__)(struct VirtualMemoryRange * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (virtmem) + NV_STATUS (*__vmrangeUnmap__)(struct VirtualMemoryRange * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (mem) base (virtmem) + NV_STATUS (*__vmrangeGetMemInterMapParams__)(struct VirtualMemoryRange * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (mem) base (virtmem) + NV_STATUS (*__vmrangeCheckMemInterUnmap__)(struct VirtualMemoryRange * /*this*/, NvBool); // inline virtual inherited (mem) base (virtmem) body + NV_STATUS (*__vmrangeGetMemoryMappingDescriptor__)(struct VirtualMemoryRange * /*this*/, MEMORY_DESCRIPTOR **); // virtual inherited (mem) base (virtmem) + NV_STATUS (*__vmrangeCheckCopyPermissions__)(struct VirtualMemoryRange * /*this*/, struct OBJGPU *, struct Device *); // inline virtual inherited (mem) base (virtmem) body + NV_STATUS (*__vmrangeIsReady__)(struct VirtualMemoryRange * /*this*/, NvBool); // virtual inherited (mem) base (virtmem) + NvBool (*__vmrangeIsGpuMapAllowed__)(struct VirtualMemoryRange * /*this*/, struct OBJGPU *); // inline virtual inherited (mem) base (virtmem) body + NvBool (*__vmrangeIsExportAllowed__)(struct VirtualMemoryRange * /*this*/); // inline virtual inherited (mem) base (virtmem) body + NvBool (*__vmrangeAccessCallback__)(struct VirtualMemoryRange * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (virtmem) + NvBool (*__vmrangeShareCallback__)(struct VirtualMemoryRange * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (virtmem) + NV_STATUS (*__vmrangeControlSerialization_Prologue__)(struct VirtualMemoryRange * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (virtmem) + void (*__vmrangeControlSerialization_Epilogue__)(struct VirtualMemoryRange * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (virtmem) + NV_STATUS (*__vmrangeControl_Prologue__)(struct VirtualMemoryRange * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (virtmem) + void (*__vmrangeControl_Epilogue__)(struct VirtualMemoryRange * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (virtmem) + void (*__vmrangePreDestruct__)(struct VirtualMemoryRange * /*this*/); // virtual inherited (res) base (virtmem) + NV_STATUS (*__vmrangeControlFilter__)(struct VirtualMemoryRange * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (virtmem) + NvU32 (*__vmrangeGetRefCount__)(struct VirtualMemoryRange * /*this*/); // virtual inherited (res) base (virtmem) + void (*__vmrangeAddAdditionalDependants__)(struct RsClient *, struct VirtualMemoryRange * /*this*/, RsResourceRef *); // virtual inherited (res) base (virtmem) }; #ifndef __NVOC_CLASS_VirtualMemoryRange_TYPEDEF__ @@ -100,6 +117,7 @@ typedef struct VirtualMemoryRange VirtualMemoryRange; #define __nvoc_class_id_VirtualMemoryRange 0x7032c6 #endif /* __nvoc_class_id_VirtualMemoryRange */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_VirtualMemoryRange; #define __staticCast_VirtualMemoryRange(pThis) \ @@ -112,141 +130,170 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_VirtualMemoryRange; ((VirtualMemoryRange*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(VirtualMemoryRange))) #endif //__nvoc_virt_mem_range_h_disabled - NV_STATUS __nvoc_objCreateDynamic_VirtualMemoryRange(VirtualMemoryRange**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_VirtualMemoryRange(VirtualMemoryRange**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_VirtualMemoryRange(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_VirtualMemoryRange((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) -#define vmrangeCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) vmrangeCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) + +// Wrapper macros +#define vmrangeMapTo_FNPTR(pVirtualMemory) pVirtualMemory->__nvoc_base_VirtualMemory.__virtmemMapTo__ #define vmrangeMapTo(pVirtualMemory, pParams) vmrangeMapTo_DISPATCH(pVirtualMemory, pParams) -#define vmrangeShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) vmrangeShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define vmrangeGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) vmrangeGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define vmrangeIsExportAllowed(pMemory) vmrangeIsExportAllowed_DISPATCH(pMemory) -#define vmrangeGetRefCount(pResource) vmrangeGetRefCount_DISPATCH(pResource) -#define vmrangeAddAdditionalDependants(pClient, pResource, pReference) vmrangeAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define vmrangeControl_Prologue(pResource, pCallContext, pParams) vmrangeControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define vmrangeIsGpuMapAllowed(pMemory, pGpu) vmrangeIsGpuMapAllowed_DISPATCH(pMemory, pGpu) +#define vmrangeUnmapFrom_FNPTR(pVirtualMemory) pVirtualMemory->__nvoc_base_VirtualMemory.__virtmemUnmapFrom__ #define vmrangeUnmapFrom(pVirtualMemory, pParams) vmrangeUnmapFrom_DISPATCH(pVirtualMemory, pParams) -#define vmrangeControl_Epilogue(pResource, pCallContext, pParams) vmrangeControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vmrangeIsPartialUnmapSupported_FNPTR(pVirtualMemory) pVirtualMemory->__nvoc_base_VirtualMemory.__virtmemIsPartialUnmapSupported__ +#define vmrangeIsPartialUnmapSupported(pVirtualMemory) vmrangeIsPartialUnmapSupported_DISPATCH(pVirtualMemory) +#define vmrangeCanCopy_FNPTR(pStandardMemory) pStandardMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__stdmemCanCopy__ +#define vmrangeCanCopy(pStandardMemory) vmrangeCanCopy_DISPATCH(pStandardMemory) +#define vmrangeIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsDuplicate__ +#define vmrangeIsDuplicate(pMemory, hMemory, pDuplicate) vmrangeIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) +#define vmrangeGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMapAddrSpace__ +#define vmrangeGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) vmrangeGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) +#define vmrangeControl_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memControl__ #define vmrangeControl(pMemory, pCallContext, pParams) vmrangeControl_DISPATCH(pMemory, pCallContext, pParams) +#define vmrangeMap_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memMap__ +#define vmrangeMap(pMemory, pCallContext, pParams, pCpuMapping) vmrangeMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define vmrangeUnmap_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memUnmap__ #define vmrangeUnmap(pMemory, pCallContext, pCpuMapping) vmrangeUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) +#define vmrangeGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMemInterMapParams__ #define vmrangeGetMemInterMapParams(pMemory, pParams) vmrangeGetMemInterMapParams_DISPATCH(pMemory, pParams) +#define vmrangeCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define vmrangeCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) vmrangeCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) +#define vmrangeGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ #define vmrangeGetMemoryMappingDescriptor(pMemory, ppMemDesc) vmrangeGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define vmrangeControlFilter(pResource, pCallContext, pParams) vmrangeControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define vmrangeControlSerialization_Prologue(pResource, pCallContext, pParams) vmrangeControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define vmrangeCanCopy(pStandardMemory) vmrangeCanCopy_DISPATCH(pStandardMemory) -#define vmrangeIsPartialUnmapSupported(pVirtualMemory) vmrangeIsPartialUnmapSupported_DISPATCH(pVirtualMemory) -#define vmrangeIsReady(pMemory, bCopyConstructorContext) vmrangeIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define vmrangeCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckCopyPermissions__ #define vmrangeCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) vmrangeCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define vmrangePreDestruct(pResource) vmrangePreDestruct_DISPATCH(pResource) -#define vmrangeIsDuplicate(pMemory, hMemory, pDuplicate) vmrangeIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define vmrangeControlSerialization_Epilogue(pResource, pCallContext, pParams) vmrangeControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define vmrangeMap(pMemory, pCallContext, pParams, pCpuMapping) vmrangeMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define vmrangeIsReady_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsReady__ +#define vmrangeIsReady(pMemory, bCopyConstructorContext) vmrangeIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define vmrangeIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define vmrangeIsGpuMapAllowed(pMemory, pGpu) vmrangeIsGpuMapAllowed_DISPATCH(pMemory, pGpu) +#define vmrangeIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsExportAllowed__ +#define vmrangeIsExportAllowed(pMemory) vmrangeIsExportAllowed_DISPATCH(pMemory) +#define vmrangeAccessCallback_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ #define vmrangeAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) vmrangeAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -static inline NV_STATUS vmrangeCheckMemInterUnmap_DISPATCH(struct VirtualMemoryRange *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__vmrangeCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); -} +#define vmrangeShareCallback_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define vmrangeShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) vmrangeShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define vmrangeControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define vmrangeControlSerialization_Prologue(pResource, pCallContext, pParams) vmrangeControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define vmrangeControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define vmrangeControlSerialization_Epilogue(pResource, pCallContext, pParams) vmrangeControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vmrangeControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define vmrangeControl_Prologue(pResource, pCallContext, pParams) vmrangeControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define vmrangeControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define vmrangeControl_Epilogue(pResource, pCallContext, pParams) vmrangeControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define vmrangePreDestruct_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define vmrangePreDestruct(pResource) vmrangePreDestruct_DISPATCH(pResource) +#define vmrangeControlFilter_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define vmrangeControlFilter(pResource, pCallContext, pParams) vmrangeControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define vmrangeGetRefCount_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define vmrangeGetRefCount(pResource) vmrangeGetRefCount_DISPATCH(pResource) +#define vmrangeAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define vmrangeAddAdditionalDependants(pClient, pResource, pReference) vmrangeAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS vmrangeMapTo_DISPATCH(struct VirtualMemoryRange *pVirtualMemory, struct RS_RES_MAP_TO_PARAMS *pParams) { return pVirtualMemory->__vmrangeMapTo__(pVirtualMemory, pParams); } -static inline NvBool vmrangeShareCallback_DISPATCH(struct VirtualMemoryRange *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__vmrangeShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS vmrangeUnmapFrom_DISPATCH(struct VirtualMemoryRange *pVirtualMemory, struct RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pVirtualMemory->__vmrangeUnmapFrom__(pVirtualMemory, pParams); +} + +static inline NvBool vmrangeIsPartialUnmapSupported_DISPATCH(struct VirtualMemoryRange *pVirtualMemory) { + return pVirtualMemory->__vmrangeIsPartialUnmapSupported__(pVirtualMemory); +} + +static inline NvBool vmrangeCanCopy_DISPATCH(struct VirtualMemoryRange *pStandardMemory) { + return pStandardMemory->__vmrangeCanCopy__(pStandardMemory); +} + +static inline NV_STATUS vmrangeIsDuplicate_DISPATCH(struct VirtualMemoryRange *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return pMemory->__vmrangeIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS vmrangeGetMapAddrSpace_DISPATCH(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pMemory->__vmrangeGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } -static inline NvBool vmrangeIsExportAllowed_DISPATCH(struct VirtualMemoryRange *pMemory) { - return pMemory->__vmrangeIsExportAllowed__(pMemory); +static inline NV_STATUS vmrangeControl_DISPATCH(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pMemory->__vmrangeControl__(pMemory, pCallContext, pParams); } -static inline NvU32 vmrangeGetRefCount_DISPATCH(struct VirtualMemoryRange *pResource) { - return pResource->__vmrangeGetRefCount__(pResource); +static inline NV_STATUS vmrangeMap_DISPATCH(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pMemory->__vmrangeMap__(pMemory, pCallContext, pParams, pCpuMapping); } -static inline void vmrangeAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VirtualMemoryRange *pResource, RsResourceRef *pReference) { - pResource->__vmrangeAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS vmrangeUnmap_DISPATCH(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pMemory->__vmrangeUnmap__(pMemory, pCallContext, pCpuMapping); } -static inline NV_STATUS vmrangeControl_Prologue_DISPATCH(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vmrangeControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS vmrangeGetMemInterMapParams_DISPATCH(struct VirtualMemoryRange *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pMemory->__vmrangeGetMemInterMapParams__(pMemory, pParams); } -static inline NvBool vmrangeIsGpuMapAllowed_DISPATCH(struct VirtualMemoryRange *pMemory, struct OBJGPU *pGpu) { - return pMemory->__vmrangeIsGpuMapAllowed__(pMemory, pGpu); +static inline NV_STATUS vmrangeCheckMemInterUnmap_DISPATCH(struct VirtualMemoryRange *pMemory, NvBool bSubdeviceHandleProvided) { + return pMemory->__vmrangeCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } -static inline NV_STATUS vmrangeUnmapFrom_DISPATCH(struct VirtualMemoryRange *pVirtualMemory, struct RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pVirtualMemory->__vmrangeUnmapFrom__(pVirtualMemory, pParams); +static inline NV_STATUS vmrangeGetMemoryMappingDescriptor_DISPATCH(struct VirtualMemoryRange *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return pMemory->__vmrangeGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } -static inline void vmrangeControl_Epilogue_DISPATCH(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vmrangeControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS vmrangeCheckCopyPermissions_DISPATCH(struct VirtualMemoryRange *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return pMemory->__vmrangeCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } -static inline NV_STATUS vmrangeControl_DISPATCH(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__vmrangeControl__(pMemory, pCallContext, pParams); +static inline NV_STATUS vmrangeIsReady_DISPATCH(struct VirtualMemoryRange *pMemory, NvBool bCopyConstructorContext) { + return pMemory->__vmrangeIsReady__(pMemory, bCopyConstructorContext); } -static inline NV_STATUS vmrangeUnmap_DISPATCH(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__vmrangeUnmap__(pMemory, pCallContext, pCpuMapping); +static inline NvBool vmrangeIsGpuMapAllowed_DISPATCH(struct VirtualMemoryRange *pMemory, struct OBJGPU *pGpu) { + return pMemory->__vmrangeIsGpuMapAllowed__(pMemory, pGpu); } -static inline NV_STATUS vmrangeGetMemInterMapParams_DISPATCH(struct VirtualMemoryRange *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__vmrangeGetMemInterMapParams__(pMemory, pParams); +static inline NvBool vmrangeIsExportAllowed_DISPATCH(struct VirtualMemoryRange *pMemory) { + return pMemory->__vmrangeIsExportAllowed__(pMemory); } -static inline NV_STATUS vmrangeGetMemoryMappingDescriptor_DISPATCH(struct VirtualMemoryRange *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__vmrangeGetMemoryMappingDescriptor__(pMemory, ppMemDesc); +static inline NvBool vmrangeAccessCallback_DISPATCH(struct VirtualMemoryRange *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__vmrangeAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS vmrangeControlFilter_DISPATCH(struct VirtualMemoryRange *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vmrangeControlFilter__(pResource, pCallContext, pParams); +static inline NvBool vmrangeShareCallback_DISPATCH(struct VirtualMemoryRange *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__vmrangeShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS vmrangeControlSerialization_Prologue_DISPATCH(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__vmrangeControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool vmrangeCanCopy_DISPATCH(struct VirtualMemoryRange *pStandardMemory) { - return pStandardMemory->__vmrangeCanCopy__(pStandardMemory); -} - -static inline NvBool vmrangeIsPartialUnmapSupported_DISPATCH(struct VirtualMemoryRange *pVirtualMemory) { - return pVirtualMemory->__vmrangeIsPartialUnmapSupported__(pVirtualMemory); +static inline void vmrangeControlSerialization_Epilogue_DISPATCH(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__vmrangeControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS vmrangeIsReady_DISPATCH(struct VirtualMemoryRange *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__vmrangeIsReady__(pMemory, bCopyConstructorContext); +static inline NV_STATUS vmrangeControl_Prologue_DISPATCH(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__vmrangeControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS vmrangeCheckCopyPermissions_DISPATCH(struct VirtualMemoryRange *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__vmrangeCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); +static inline void vmrangeControl_Epilogue_DISPATCH(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__vmrangeControl_Epilogue__(pResource, pCallContext, pParams); } static inline void vmrangePreDestruct_DISPATCH(struct VirtualMemoryRange *pResource) { pResource->__vmrangePreDestruct__(pResource); } -static inline NV_STATUS vmrangeIsDuplicate_DISPATCH(struct VirtualMemoryRange *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__vmrangeIsDuplicate__(pMemory, hMemory, pDuplicate); -} - -static inline void vmrangeControlSerialization_Epilogue_DISPATCH(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vmrangeControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS vmrangeControlFilter_DISPATCH(struct VirtualMemoryRange *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__vmrangeControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS vmrangeMap_DISPATCH(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__vmrangeMap__(pMemory, pCallContext, pParams, pCpuMapping); +static inline NvU32 vmrangeGetRefCount_DISPATCH(struct VirtualMemoryRange *pResource) { + return pResource->__vmrangeGetRefCount__(pResource); } -static inline NvBool vmrangeAccessCallback_DISPATCH(struct VirtualMemoryRange *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__vmrangeAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +static inline void vmrangeAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VirtualMemoryRange *pResource, RsResourceRef *pReference) { + pResource->__vmrangeAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS vmrangeConstruct_IMPL(struct VirtualMemoryRange *arg_pVmRange, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_virtual_mem_nvoc.c b/src/nvidia/generated/g_virtual_mem_nvoc.c index c9ef183f99..b1324324da 100644 --- a/src/nvidia/generated/g_virtual_mem_nvoc.c +++ b/src/nvidia/generated/g_virtual_mem_nvoc.c @@ -102,110 +102,142 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_VirtualMemory = /*pExportInfo=*/ &__nvoc_export_info_VirtualMemory }; -static NV_STATUS __nvoc_thunk_VirtualMemory_resMapTo(struct RsResource *pVirtualMemory, struct RS_RES_MAP_TO_PARAMS *pParams) { - return virtmemMapTo((struct VirtualMemory *)(((unsigned char *)pVirtualMemory) - __nvoc_rtti_VirtualMemory_RsResource.offset), pParams); +// 3 down-thunk(s) defined to bridge methods in VirtualMemory from superclasses + +// virtmemMapTo: virtual override (res) base (stdmem) +static NV_STATUS __nvoc_down_thunk_VirtualMemory_resMapTo(struct RsResource *pVirtualMemory, struct RS_RES_MAP_TO_PARAMS *pParams) { + return virtmemMapTo((struct VirtualMemory *)(((unsigned char *) pVirtualMemory) - __nvoc_rtti_VirtualMemory_RsResource.offset), pParams); } -static NV_STATUS __nvoc_thunk_VirtualMemory_resUnmapFrom(struct RsResource *pVirtualMemory, struct RS_RES_UNMAP_FROM_PARAMS *pParams) { - return virtmemUnmapFrom((struct VirtualMemory *)(((unsigned char *)pVirtualMemory) - __nvoc_rtti_VirtualMemory_RsResource.offset), pParams); +// virtmemUnmapFrom: virtual override (res) base (stdmem) +static NV_STATUS __nvoc_down_thunk_VirtualMemory_resUnmapFrom(struct RsResource *pVirtualMemory, struct RS_RES_UNMAP_FROM_PARAMS *pParams) { + return virtmemUnmapFrom((struct VirtualMemory *)(((unsigned char *) pVirtualMemory) - __nvoc_rtti_VirtualMemory_RsResource.offset), pParams); } -static NvBool __nvoc_thunk_VirtualMemory_resIsPartialUnmapSupported(struct RsResource *pVirtualMemory) { - return virtmemIsPartialUnmapSupported((struct VirtualMemory *)(((unsigned char *)pVirtualMemory) - __nvoc_rtti_VirtualMemory_RsResource.offset)); +// virtmemIsPartialUnmapSupported: inline virtual override (res) base (stdmem) body +static NvBool __nvoc_down_thunk_VirtualMemory_resIsPartialUnmapSupported(struct RsResource *pVirtualMemory) { + return virtmemIsPartialUnmapSupported((struct VirtualMemory *)(((unsigned char *) pVirtualMemory) - __nvoc_rtti_VirtualMemory_RsResource.offset)); } -static NV_STATUS __nvoc_thunk_Memory_virtmemCheckMemInterUnmap(struct VirtualMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), bSubdeviceHandleProvided); + +// 23 up-thunk(s) defined to bridge methods in VirtualMemory to superclasses + +// virtmemCanCopy: virtual inherited (stdmem) base (stdmem) +static NvBool __nvoc_up_thunk_StandardMemory_virtmemCanCopy(struct VirtualMemory *pStandardMemory) { + return stdmemCanCopy((struct StandardMemory *)(((unsigned char *) pStandardMemory) + __nvoc_rtti_VirtualMemory_StandardMemory.offset)); } -static NvBool __nvoc_thunk_RmResource_virtmemShareCallback(struct VirtualMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VirtualMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); +// virtmemIsDuplicate: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_virtmemIsDuplicate(struct VirtualMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), hMemory, pDuplicate); } -static NV_STATUS __nvoc_thunk_Memory_virtmemGetMapAddrSpace(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return memGetMapAddrSpace((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); +// virtmemGetMapAddrSpace: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_virtmemGetMapAddrSpace(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } -static NvBool __nvoc_thunk_Memory_virtmemIsExportAllowed(struct VirtualMemory *pMemory) { - return memIsExportAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset)); +// virtmemControl: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_virtmemControl(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pCallContext, pParams); } -static NvU32 __nvoc_thunk_RsResource_virtmemGetRefCount(struct VirtualMemory *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VirtualMemory_RsResource.offset)); +// virtmemMap: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_virtmemMap(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } -static void __nvoc_thunk_RsResource_virtmemAddAdditionalDependants(struct RsClient *pClient, struct VirtualMemory *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VirtualMemory_RsResource.offset), pReference); +// virtmemUnmap: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_virtmemUnmap(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pCallContext, pCpuMapping); } -static NV_STATUS __nvoc_thunk_RmResource_virtmemControl_Prologue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VirtualMemory_RmResource.offset), pCallContext, pParams); +// virtmemGetMemInterMapParams: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_virtmemGetMemInterMapParams(struct VirtualMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pParams); } -static NvBool __nvoc_thunk_Memory_virtmemIsGpuMapAllowed(struct VirtualMemory *pMemory, struct OBJGPU *pGpu) { - return memIsGpuMapAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pGpu); +// virtmemCheckMemInterUnmap: inline virtual inherited (mem) base (stdmem) body +static NV_STATUS __nvoc_up_thunk_Memory_virtmemCheckMemInterUnmap(struct VirtualMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), bSubdeviceHandleProvided); } -static void __nvoc_thunk_RmResource_virtmemControl_Epilogue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VirtualMemory_RmResource.offset), pCallContext, pParams); +// virtmemGetMemoryMappingDescriptor: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_virtmemGetMemoryMappingDescriptor(struct VirtualMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), ppMemDesc); } -static NV_STATUS __nvoc_thunk_Memory_virtmemControl(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return memControl((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pCallContext, pParams); +// virtmemCheckCopyPermissions: inline virtual inherited (mem) base (stdmem) body +static NV_STATUS __nvoc_up_thunk_Memory_virtmemCheckCopyPermissions(struct VirtualMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pDstGpu, pDstDevice); } -static NV_STATUS __nvoc_thunk_Memory_virtmemUnmap(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pCallContext, pCpuMapping); +// virtmemIsReady: virtual inherited (mem) base (stdmem) +static NV_STATUS __nvoc_up_thunk_Memory_virtmemIsReady(struct VirtualMemory *pMemory, NvBool bCopyConstructorContext) { + return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), bCopyConstructorContext); } -static NV_STATUS __nvoc_thunk_Memory_virtmemGetMemInterMapParams(struct VirtualMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pParams); +// virtmemIsGpuMapAllowed: inline virtual inherited (mem) base (stdmem) body +static NvBool __nvoc_up_thunk_Memory_virtmemIsGpuMapAllowed(struct VirtualMemory *pMemory, struct OBJGPU *pGpu) { + return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pGpu); } -static NV_STATUS __nvoc_thunk_Memory_virtmemGetMemoryMappingDescriptor(struct VirtualMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), ppMemDesc); +// virtmemIsExportAllowed: inline virtual inherited (mem) base (stdmem) body +static NvBool __nvoc_up_thunk_Memory_virtmemIsExportAllowed(struct VirtualMemory *pMemory) { + return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset)); } -static NV_STATUS __nvoc_thunk_RsResource_virtmemControlFilter(struct VirtualMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VirtualMemory_RsResource.offset), pCallContext, pParams); +// virtmemAccessCallback: virtual inherited (rmres) base (stdmem) +static NvBool __nvoc_up_thunk_RmResource_virtmemAccessCallback(struct VirtualMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } -static NV_STATUS __nvoc_thunk_RmResource_virtmemControlSerialization_Prologue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VirtualMemory_RmResource.offset), pCallContext, pParams); +// virtmemShareCallback: virtual inherited (rmres) base (stdmem) +static NvBool __nvoc_up_thunk_RmResource_virtmemShareCallback(struct VirtualMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } -static NvBool __nvoc_thunk_StandardMemory_virtmemCanCopy(struct VirtualMemory *pStandardMemory) { - return stdmemCanCopy((struct StandardMemory *)(((unsigned char *)pStandardMemory) + __nvoc_rtti_VirtualMemory_StandardMemory.offset)); +// virtmemControlSerialization_Prologue: virtual inherited (rmres) base (stdmem) +static NV_STATUS __nvoc_up_thunk_RmResource_virtmemControlSerialization_Prologue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_virtmemIsReady(struct VirtualMemory *pMemory, NvBool bCopyConstructorContext) { - return memIsReady((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), bCopyConstructorContext); +// virtmemControlSerialization_Epilogue: virtual inherited (rmres) base (stdmem) +static void __nvoc_up_thunk_RmResource_virtmemControlSerialization_Epilogue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_virtmemCheckCopyPermissions(struct VirtualMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return memCheckCopyPermissions((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pDstGpu, pDstDevice); +// virtmemControl_Prologue: virtual inherited (rmres) base (stdmem) +static NV_STATUS __nvoc_up_thunk_RmResource_virtmemControl_Prologue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemory_RmResource.offset), pCallContext, pParams); } -static void __nvoc_thunk_RsResource_virtmemPreDestruct(struct VirtualMemory *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_VirtualMemory_RsResource.offset)); +// virtmemControl_Epilogue: virtual inherited (rmres) base (stdmem) +static void __nvoc_up_thunk_RmResource_virtmemControl_Epilogue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemory_RmResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_virtmemIsDuplicate(struct VirtualMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), hMemory, pDuplicate); +// virtmemPreDestruct: virtual inherited (res) base (stdmem) +static void __nvoc_up_thunk_RsResource_virtmemPreDestruct(struct VirtualMemory *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemory_RsResource.offset)); } -static void __nvoc_thunk_RmResource_virtmemControlSerialization_Epilogue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VirtualMemory_RmResource.offset), pCallContext, pParams); +// virtmemControlFilter: virtual inherited (res) base (stdmem) +static NV_STATUS __nvoc_up_thunk_RsResource_virtmemControlFilter(struct VirtualMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemory_RsResource.offset), pCallContext, pParams); } -static NV_STATUS __nvoc_thunk_Memory_virtmemMap(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pCallContext, pParams, pCpuMapping); +// virtmemGetRefCount: virtual inherited (res) base (stdmem) +static NvU32 __nvoc_up_thunk_RsResource_virtmemGetRefCount(struct VirtualMemory *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemory_RsResource.offset)); } -static NvBool __nvoc_thunk_RmResource_virtmemAccessCallback(struct VirtualMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_VirtualMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +// virtmemAddAdditionalDependants: virtual inherited (res) base (stdmem) +static void __nvoc_up_thunk_RsResource_virtmemAddAdditionalDependants(struct RsClient *pClient, struct VirtualMemory *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemory_RsResource.offset), pReference); } + const struct NVOC_EXPORT_INFO __nvoc_export_info_VirtualMemory = { /*numEntries=*/ 0, @@ -242,69 +274,97 @@ NV_STATUS __nvoc_ctor_VirtualMemory(VirtualMemory *pThis, CALL_CONTEXT * arg_pCa return status; } +// Vtable initialization static void __nvoc_init_funcTable_VirtualMemory_1(VirtualMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); + // virtmemMapTo -- virtual override (res) base (stdmem) pThis->__virtmemMapTo__ = &virtmemMapTo_IMPL; + pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ = &__nvoc_down_thunk_VirtualMemory_resMapTo; + // virtmemUnmapFrom -- virtual override (res) base (stdmem) pThis->__virtmemUnmapFrom__ = &virtmemUnmapFrom_IMPL; + pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ = &__nvoc_down_thunk_VirtualMemory_resUnmapFrom; + // virtmemIsPartialUnmapSupported -- inline virtual override (res) base (stdmem) body pThis->__virtmemIsPartialUnmapSupported__ = &virtmemIsPartialUnmapSupported_0c883b; + pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ = &__nvoc_down_thunk_VirtualMemory_resIsPartialUnmapSupported; - pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ = &__nvoc_thunk_VirtualMemory_resMapTo; + // virtmemCanCopy -- virtual inherited (stdmem) base (stdmem) + pThis->__virtmemCanCopy__ = &__nvoc_up_thunk_StandardMemory_virtmemCanCopy; - pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ = &__nvoc_thunk_VirtualMemory_resUnmapFrom; + // virtmemIsDuplicate -- virtual inherited (mem) base (stdmem) + pThis->__virtmemIsDuplicate__ = &__nvoc_up_thunk_Memory_virtmemIsDuplicate; - pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ = &__nvoc_thunk_VirtualMemory_resIsPartialUnmapSupported; + // virtmemGetMapAddrSpace -- virtual inherited (mem) base (stdmem) + pThis->__virtmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_virtmemGetMapAddrSpace; - pThis->__virtmemCheckMemInterUnmap__ = &__nvoc_thunk_Memory_virtmemCheckMemInterUnmap; + // virtmemControl -- virtual inherited (mem) base (stdmem) + pThis->__virtmemControl__ = &__nvoc_up_thunk_Memory_virtmemControl; - pThis->__virtmemShareCallback__ = &__nvoc_thunk_RmResource_virtmemShareCallback; + // virtmemMap -- virtual inherited (mem) base (stdmem) + pThis->__virtmemMap__ = &__nvoc_up_thunk_Memory_virtmemMap; - pThis->__virtmemGetMapAddrSpace__ = &__nvoc_thunk_Memory_virtmemGetMapAddrSpace; + // virtmemUnmap -- virtual inherited (mem) base (stdmem) + pThis->__virtmemUnmap__ = &__nvoc_up_thunk_Memory_virtmemUnmap; - pThis->__virtmemIsExportAllowed__ = &__nvoc_thunk_Memory_virtmemIsExportAllowed; + // virtmemGetMemInterMapParams -- virtual inherited (mem) base (stdmem) + pThis->__virtmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_virtmemGetMemInterMapParams; - pThis->__virtmemGetRefCount__ = &__nvoc_thunk_RsResource_virtmemGetRefCount; + // virtmemCheckMemInterUnmap -- inline virtual inherited (mem) base (stdmem) body + pThis->__virtmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_virtmemCheckMemInterUnmap; - pThis->__virtmemAddAdditionalDependants__ = &__nvoc_thunk_RsResource_virtmemAddAdditionalDependants; + // virtmemGetMemoryMappingDescriptor -- virtual inherited (mem) base (stdmem) + pThis->__virtmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_virtmemGetMemoryMappingDescriptor; - pThis->__virtmemControl_Prologue__ = &__nvoc_thunk_RmResource_virtmemControl_Prologue; + // virtmemCheckCopyPermissions -- inline virtual inherited (mem) base (stdmem) body + pThis->__virtmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_virtmemCheckCopyPermissions; - pThis->__virtmemIsGpuMapAllowed__ = &__nvoc_thunk_Memory_virtmemIsGpuMapAllowed; + // virtmemIsReady -- virtual inherited (mem) base (stdmem) + pThis->__virtmemIsReady__ = &__nvoc_up_thunk_Memory_virtmemIsReady; - pThis->__virtmemControl_Epilogue__ = &__nvoc_thunk_RmResource_virtmemControl_Epilogue; + // virtmemIsGpuMapAllowed -- inline virtual inherited (mem) base (stdmem) body + pThis->__virtmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_virtmemIsGpuMapAllowed; - pThis->__virtmemControl__ = &__nvoc_thunk_Memory_virtmemControl; + // virtmemIsExportAllowed -- inline virtual inherited (mem) base (stdmem) body + pThis->__virtmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_virtmemIsExportAllowed; - pThis->__virtmemUnmap__ = &__nvoc_thunk_Memory_virtmemUnmap; + // virtmemAccessCallback -- virtual inherited (rmres) base (stdmem) + pThis->__virtmemAccessCallback__ = &__nvoc_up_thunk_RmResource_virtmemAccessCallback; - pThis->__virtmemGetMemInterMapParams__ = &__nvoc_thunk_Memory_virtmemGetMemInterMapParams; + // virtmemShareCallback -- virtual inherited (rmres) base (stdmem) + pThis->__virtmemShareCallback__ = &__nvoc_up_thunk_RmResource_virtmemShareCallback; - pThis->__virtmemGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_virtmemGetMemoryMappingDescriptor; + // virtmemControlSerialization_Prologue -- virtual inherited (rmres) base (stdmem) + pThis->__virtmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_virtmemControlSerialization_Prologue; - pThis->__virtmemControlFilter__ = &__nvoc_thunk_RsResource_virtmemControlFilter; + // virtmemControlSerialization_Epilogue -- virtual inherited (rmres) base (stdmem) + pThis->__virtmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_virtmemControlSerialization_Epilogue; - pThis->__virtmemControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_virtmemControlSerialization_Prologue; + // virtmemControl_Prologue -- virtual inherited (rmres) base (stdmem) + pThis->__virtmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_virtmemControl_Prologue; - pThis->__virtmemCanCopy__ = &__nvoc_thunk_StandardMemory_virtmemCanCopy; + // virtmemControl_Epilogue -- virtual inherited (rmres) base (stdmem) + pThis->__virtmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_virtmemControl_Epilogue; - pThis->__virtmemIsReady__ = &__nvoc_thunk_Memory_virtmemIsReady; + // virtmemPreDestruct -- virtual inherited (res) base (stdmem) + pThis->__virtmemPreDestruct__ = &__nvoc_up_thunk_RsResource_virtmemPreDestruct; - pThis->__virtmemCheckCopyPermissions__ = &__nvoc_thunk_Memory_virtmemCheckCopyPermissions; + // virtmemControlFilter -- virtual inherited (res) base (stdmem) + pThis->__virtmemControlFilter__ = &__nvoc_up_thunk_RsResource_virtmemControlFilter; - pThis->__virtmemPreDestruct__ = &__nvoc_thunk_RsResource_virtmemPreDestruct; + // virtmemGetRefCount -- virtual inherited (res) base (stdmem) + pThis->__virtmemGetRefCount__ = &__nvoc_up_thunk_RsResource_virtmemGetRefCount; - pThis->__virtmemIsDuplicate__ = &__nvoc_thunk_Memory_virtmemIsDuplicate; + // virtmemAddAdditionalDependants -- virtual inherited (res) base (stdmem) + pThis->__virtmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_virtmemAddAdditionalDependants; +} // End __nvoc_init_funcTable_VirtualMemory_1 with approximately 29 basic block(s). - pThis->__virtmemControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_virtmemControlSerialization_Epilogue; - - pThis->__virtmemMap__ = &__nvoc_thunk_Memory_virtmemMap; - - pThis->__virtmemAccessCallback__ = &__nvoc_thunk_RmResource_virtmemAccessCallback; -} +// Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_VirtualMemory(VirtualMemory *pThis) { + + // Initialize vtable(s) with 26 per-object function pointer(s). __nvoc_init_funcTable_VirtualMemory_1(pThis); } diff --git a/src/nvidia/generated/g_virtual_mem_nvoc.h b/src/nvidia/generated/g_virtual_mem_nvoc.h index c988263c9f..f4f058c8e3 100644 --- a/src/nvidia/generated/g_virtual_mem_nvoc.h +++ b/src/nvidia/generated/g_virtual_mem_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_VIRTUAL_MEM_NVOC_H_ #define _G_VIRTUAL_MEM_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_virtual_mem_nvoc.h" #ifndef _VIRTUAL_MEMORY_H_ @@ -55,42 +63,53 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct VirtualMemory { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct StandardMemory __nvoc_base_StandardMemory; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct Memory *__nvoc_pbase_Memory; - struct StandardMemory *__nvoc_pbase_StandardMemory; - struct VirtualMemory *__nvoc_pbase_VirtualMemory; - NV_STATUS (*__virtmemMapTo__)(struct VirtualMemory *, struct RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__virtmemUnmapFrom__)(struct VirtualMemory *, struct RS_RES_UNMAP_FROM_PARAMS *); - NvBool (*__virtmemIsPartialUnmapSupported__)(struct VirtualMemory *); - NV_STATUS (*__virtmemCheckMemInterUnmap__)(struct VirtualMemory *, NvBool); - NvBool (*__virtmemShareCallback__)(struct VirtualMemory *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__virtmemGetMapAddrSpace__)(struct VirtualMemory *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvBool (*__virtmemIsExportAllowed__)(struct VirtualMemory *); - NvU32 (*__virtmemGetRefCount__)(struct VirtualMemory *); - void (*__virtmemAddAdditionalDependants__)(struct RsClient *, struct VirtualMemory *, RsResourceRef *); - NV_STATUS (*__virtmemControl_Prologue__)(struct VirtualMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__virtmemIsGpuMapAllowed__)(struct VirtualMemory *, struct OBJGPU *); - void (*__virtmemControl_Epilogue__)(struct VirtualMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__virtmemControl__)(struct VirtualMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__virtmemUnmap__)(struct VirtualMemory *, CALL_CONTEXT *, RsCpuMapping *); - NV_STATUS (*__virtmemGetMemInterMapParams__)(struct VirtualMemory *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__virtmemGetMemoryMappingDescriptor__)(struct VirtualMemory *, MEMORY_DESCRIPTOR **); - NV_STATUS (*__virtmemControlFilter__)(struct VirtualMemory *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__virtmemControlSerialization_Prologue__)(struct VirtualMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__virtmemCanCopy__)(struct VirtualMemory *); - NV_STATUS (*__virtmemIsReady__)(struct VirtualMemory *, NvBool); - NV_STATUS (*__virtmemCheckCopyPermissions__)(struct VirtualMemory *, struct OBJGPU *, struct Device *); - void (*__virtmemPreDestruct__)(struct VirtualMemory *); - NV_STATUS (*__virtmemIsDuplicate__)(struct VirtualMemory *, NvHandle, NvBool *); - void (*__virtmemControlSerialization_Epilogue__)(struct VirtualMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__virtmemMap__)(struct VirtualMemory *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); - NvBool (*__virtmemAccessCallback__)(struct VirtualMemory *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct Memory *__nvoc_pbase_Memory; // mem super^2 + struct StandardMemory *__nvoc_pbase_StandardMemory; // stdmem super + struct VirtualMemory *__nvoc_pbase_VirtualMemory; // virtmem + + // Vtable with 26 per-object function pointers + NV_STATUS (*__virtmemMapTo__)(struct VirtualMemory * /*this*/, struct RS_RES_MAP_TO_PARAMS *); // virtual override (res) base (stdmem) + NV_STATUS (*__virtmemUnmapFrom__)(struct VirtualMemory * /*this*/, struct RS_RES_UNMAP_FROM_PARAMS *); // virtual override (res) base (stdmem) + NvBool (*__virtmemIsPartialUnmapSupported__)(struct VirtualMemory * /*this*/); // inline virtual override (res) base (stdmem) body + NvBool (*__virtmemCanCopy__)(struct VirtualMemory * /*this*/); // virtual inherited (stdmem) base (stdmem) + NV_STATUS (*__virtmemIsDuplicate__)(struct VirtualMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__virtmemGetMapAddrSpace__)(struct VirtualMemory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__virtmemControl__)(struct VirtualMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__virtmemMap__)(struct VirtualMemory * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__virtmemUnmap__)(struct VirtualMemory * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__virtmemGetMemInterMapParams__)(struct VirtualMemory * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__virtmemCheckMemInterUnmap__)(struct VirtualMemory * /*this*/, NvBool); // inline virtual inherited (mem) base (stdmem) body + NV_STATUS (*__virtmemGetMemoryMappingDescriptor__)(struct VirtualMemory * /*this*/, MEMORY_DESCRIPTOR **); // virtual inherited (mem) base (stdmem) + NV_STATUS (*__virtmemCheckCopyPermissions__)(struct VirtualMemory * /*this*/, struct OBJGPU *, struct Device *); // inline virtual inherited (mem) base (stdmem) body + NV_STATUS (*__virtmemIsReady__)(struct VirtualMemory * /*this*/, NvBool); // virtual inherited (mem) base (stdmem) + NvBool (*__virtmemIsGpuMapAllowed__)(struct VirtualMemory * /*this*/, struct OBJGPU *); // inline virtual inherited (mem) base (stdmem) body + NvBool (*__virtmemIsExportAllowed__)(struct VirtualMemory * /*this*/); // inline virtual inherited (mem) base (stdmem) body + NvBool (*__virtmemAccessCallback__)(struct VirtualMemory * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (stdmem) + NvBool (*__virtmemShareCallback__)(struct VirtualMemory * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (stdmem) + NV_STATUS (*__virtmemControlSerialization_Prologue__)(struct VirtualMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (stdmem) + void (*__virtmemControlSerialization_Epilogue__)(struct VirtualMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (stdmem) + NV_STATUS (*__virtmemControl_Prologue__)(struct VirtualMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (stdmem) + void (*__virtmemControl_Epilogue__)(struct VirtualMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (stdmem) + void (*__virtmemPreDestruct__)(struct VirtualMemory * /*this*/); // virtual inherited (res) base (stdmem) + NV_STATUS (*__virtmemControlFilter__)(struct VirtualMemory * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (stdmem) + NvU32 (*__virtmemGetRefCount__)(struct VirtualMemory * /*this*/); // virtual inherited (res) base (stdmem) + void (*__virtmemAddAdditionalDependants__)(struct RsClient *, struct VirtualMemory * /*this*/, RsResourceRef *); // virtual inherited (res) base (stdmem) + + // Data members NvHandle hVASpace; NvBool bAllowUnicastMapping; NvBool bReserveVaOnAlloc; @@ -109,6 +128,7 @@ typedef struct VirtualMemory VirtualMemory; #define __nvoc_class_id_VirtualMemory 0x2aea5c #endif /* __nvoc_class_id_VirtualMemory */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_VirtualMemory; #define __staticCast_VirtualMemory(pThis) \ @@ -121,149 +141,178 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_VirtualMemory; ((VirtualMemory*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(VirtualMemory))) #endif //__nvoc_virtual_mem_h_disabled - NV_STATUS __nvoc_objCreateDynamic_VirtualMemory(VirtualMemory**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_VirtualMemory(VirtualMemory**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_VirtualMemory(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_VirtualMemory((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define virtmemMapTo_FNPTR(pVirtualMemory) pVirtualMemory->__virtmemMapTo__ #define virtmemMapTo(pVirtualMemory, pParams) virtmemMapTo_DISPATCH(pVirtualMemory, pParams) +#define virtmemUnmapFrom_FNPTR(pVirtualMemory) pVirtualMemory->__virtmemUnmapFrom__ #define virtmemUnmapFrom(pVirtualMemory, pParams) virtmemUnmapFrom_DISPATCH(pVirtualMemory, pParams) +#define virtmemIsPartialUnmapSupported_FNPTR(pVirtualMemory) pVirtualMemory->__virtmemIsPartialUnmapSupported__ #define virtmemIsPartialUnmapSupported(pVirtualMemory) virtmemIsPartialUnmapSupported_DISPATCH(pVirtualMemory) -#define virtmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) virtmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define virtmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) virtmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define virtmemCanCopy_FNPTR(pStandardMemory) pStandardMemory->__nvoc_base_StandardMemory.__stdmemCanCopy__ +#define virtmemCanCopy(pStandardMemory) virtmemCanCopy_DISPATCH(pStandardMemory) +#define virtmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsDuplicate__ +#define virtmemIsDuplicate(pMemory, hMemory, pDuplicate) virtmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) +#define virtmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMapAddrSpace__ #define virtmemGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) virtmemGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define virtmemIsExportAllowed(pMemory) virtmemIsExportAllowed_DISPATCH(pMemory) -#define virtmemGetRefCount(pResource) virtmemGetRefCount_DISPATCH(pResource) -#define virtmemAddAdditionalDependants(pClient, pResource, pReference) virtmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define virtmemControl_Prologue(pResource, pCallContext, pParams) virtmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define virtmemIsGpuMapAllowed(pMemory, pGpu) virtmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define virtmemControl_Epilogue(pResource, pCallContext, pParams) virtmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define virtmemControl_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memControl__ #define virtmemControl(pMemory, pCallContext, pParams) virtmemControl_DISPATCH(pMemory, pCallContext, pParams) +#define virtmemMap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memMap__ +#define virtmemMap(pMemory, pCallContext, pParams, pCpuMapping) virtmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define virtmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memUnmap__ #define virtmemUnmap(pMemory, pCallContext, pCpuMapping) virtmemUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) +#define virtmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMemInterMapParams__ #define virtmemGetMemInterMapParams(pMemory, pParams) virtmemGetMemInterMapParams_DISPATCH(pMemory, pParams) +#define virtmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define virtmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) virtmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) +#define virtmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ #define virtmemGetMemoryMappingDescriptor(pMemory, ppMemDesc) virtmemGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define virtmemControlFilter(pResource, pCallContext, pParams) virtmemControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define virtmemControlSerialization_Prologue(pResource, pCallContext, pParams) virtmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define virtmemCanCopy(pStandardMemory) virtmemCanCopy_DISPATCH(pStandardMemory) -#define virtmemIsReady(pMemory, bCopyConstructorContext) virtmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define virtmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckCopyPermissions__ #define virtmemCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) virtmemCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define virtmemPreDestruct(pResource) virtmemPreDestruct_DISPATCH(pResource) -#define virtmemIsDuplicate(pMemory, hMemory, pDuplicate) virtmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define virtmemControlSerialization_Epilogue(pResource, pCallContext, pParams) virtmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define virtmemMap(pMemory, pCallContext, pParams, pCpuMapping) virtmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) +#define virtmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsReady__ +#define virtmemIsReady(pMemory, bCopyConstructorContext) virtmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) +#define virtmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define virtmemIsGpuMapAllowed(pMemory, pGpu) virtmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) +#define virtmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsExportAllowed__ +#define virtmemIsExportAllowed(pMemory) virtmemIsExportAllowed_DISPATCH(pMemory) +#define virtmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ #define virtmemAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) virtmemAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -NV_STATUS virtmemMapTo_IMPL(struct VirtualMemory *pVirtualMemory, struct RS_RES_MAP_TO_PARAMS *pParams); +#define virtmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define virtmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) virtmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) +#define virtmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define virtmemControlSerialization_Prologue(pResource, pCallContext, pParams) virtmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define virtmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define virtmemControlSerialization_Epilogue(pResource, pCallContext, pParams) virtmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define virtmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define virtmemControl_Prologue(pResource, pCallContext, pParams) virtmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define virtmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define virtmemControl_Epilogue(pResource, pCallContext, pParams) virtmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define virtmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define virtmemPreDestruct(pResource) virtmemPreDestruct_DISPATCH(pResource) +#define virtmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define virtmemControlFilter(pResource, pCallContext, pParams) virtmemControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define virtmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define virtmemGetRefCount(pResource) virtmemGetRefCount_DISPATCH(pResource) +#define virtmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define virtmemAddAdditionalDependants(pClient, pResource, pReference) virtmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS virtmemMapTo_DISPATCH(struct VirtualMemory *pVirtualMemory, struct RS_RES_MAP_TO_PARAMS *pParams) { return pVirtualMemory->__virtmemMapTo__(pVirtualMemory, pParams); } -NV_STATUS virtmemUnmapFrom_IMPL(struct VirtualMemory *pVirtualMemory, struct RS_RES_UNMAP_FROM_PARAMS *pParams); - static inline NV_STATUS virtmemUnmapFrom_DISPATCH(struct VirtualMemory *pVirtualMemory, struct RS_RES_UNMAP_FROM_PARAMS *pParams) { return pVirtualMemory->__virtmemUnmapFrom__(pVirtualMemory, pParams); } -static inline NvBool virtmemIsPartialUnmapSupported_0c883b(struct VirtualMemory *pVirtualMemory) { - return ((NvBool)(0 == 0)); -} - static inline NvBool virtmemIsPartialUnmapSupported_DISPATCH(struct VirtualMemory *pVirtualMemory) { return pVirtualMemory->__virtmemIsPartialUnmapSupported__(pVirtualMemory); } -static inline NV_STATUS virtmemCheckMemInterUnmap_DISPATCH(struct VirtualMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__virtmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); +static inline NvBool virtmemCanCopy_DISPATCH(struct VirtualMemory *pStandardMemory) { + return pStandardMemory->__virtmemCanCopy__(pStandardMemory); } -static inline NvBool virtmemShareCallback_DISPATCH(struct VirtualMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__virtmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS virtmemIsDuplicate_DISPATCH(struct VirtualMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { + return pMemory->__virtmemIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS virtmemGetMapAddrSpace_DISPATCH(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pMemory->__virtmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } -static inline NvBool virtmemIsExportAllowed_DISPATCH(struct VirtualMemory *pMemory) { - return pMemory->__virtmemIsExportAllowed__(pMemory); +static inline NV_STATUS virtmemControl_DISPATCH(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pMemory->__virtmemControl__(pMemory, pCallContext, pParams); } -static inline NvU32 virtmemGetRefCount_DISPATCH(struct VirtualMemory *pResource) { - return pResource->__virtmemGetRefCount__(pResource); +static inline NV_STATUS virtmemMap_DISPATCH(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { + return pMemory->__virtmemMap__(pMemory, pCallContext, pParams, pCpuMapping); } -static inline void virtmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VirtualMemory *pResource, RsResourceRef *pReference) { - pResource->__virtmemAddAdditionalDependants__(pClient, pResource, pReference); +static inline NV_STATUS virtmemUnmap_DISPATCH(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { + return pMemory->__virtmemUnmap__(pMemory, pCallContext, pCpuMapping); } -static inline NV_STATUS virtmemControl_Prologue_DISPATCH(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__virtmemControl_Prologue__(pResource, pCallContext, pParams); +static inline NV_STATUS virtmemGetMemInterMapParams_DISPATCH(struct VirtualMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pMemory->__virtmemGetMemInterMapParams__(pMemory, pParams); } -static inline NvBool virtmemIsGpuMapAllowed_DISPATCH(struct VirtualMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__virtmemIsGpuMapAllowed__(pMemory, pGpu); +static inline NV_STATUS virtmemCheckMemInterUnmap_DISPATCH(struct VirtualMemory *pMemory, NvBool bSubdeviceHandleProvided) { + return pMemory->__virtmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } -static inline void virtmemControl_Epilogue_DISPATCH(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__virtmemControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS virtmemGetMemoryMappingDescriptor_DISPATCH(struct VirtualMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { + return pMemory->__virtmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } -static inline NV_STATUS virtmemControl_DISPATCH(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__virtmemControl__(pMemory, pCallContext, pParams); +static inline NV_STATUS virtmemCheckCopyPermissions_DISPATCH(struct VirtualMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { + return pMemory->__virtmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } -static inline NV_STATUS virtmemUnmap_DISPATCH(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__virtmemUnmap__(pMemory, pCallContext, pCpuMapping); +static inline NV_STATUS virtmemIsReady_DISPATCH(struct VirtualMemory *pMemory, NvBool bCopyConstructorContext) { + return pMemory->__virtmemIsReady__(pMemory, bCopyConstructorContext); } -static inline NV_STATUS virtmemGetMemInterMapParams_DISPATCH(struct VirtualMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__virtmemGetMemInterMapParams__(pMemory, pParams); +static inline NvBool virtmemIsGpuMapAllowed_DISPATCH(struct VirtualMemory *pMemory, struct OBJGPU *pGpu) { + return pMemory->__virtmemIsGpuMapAllowed__(pMemory, pGpu); } -static inline NV_STATUS virtmemGetMemoryMappingDescriptor_DISPATCH(struct VirtualMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__virtmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); +static inline NvBool virtmemIsExportAllowed_DISPATCH(struct VirtualMemory *pMemory) { + return pMemory->__virtmemIsExportAllowed__(pMemory); } -static inline NV_STATUS virtmemControlFilter_DISPATCH(struct VirtualMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__virtmemControlFilter__(pResource, pCallContext, pParams); +static inline NvBool virtmemAccessCallback_DISPATCH(struct VirtualMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__virtmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +} + +static inline NvBool virtmemShareCallback_DISPATCH(struct VirtualMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pResource->__virtmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS virtmemControlSerialization_Prologue_DISPATCH(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__virtmemControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvBool virtmemCanCopy_DISPATCH(struct VirtualMemory *pStandardMemory) { - return pStandardMemory->__virtmemCanCopy__(pStandardMemory); +static inline void virtmemControlSerialization_Epilogue_DISPATCH(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__virtmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS virtmemIsReady_DISPATCH(struct VirtualMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__virtmemIsReady__(pMemory, bCopyConstructorContext); +static inline NV_STATUS virtmemControl_Prologue_DISPATCH(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__virtmemControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS virtmemCheckCopyPermissions_DISPATCH(struct VirtualMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__virtmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); +static inline void virtmemControl_Epilogue_DISPATCH(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__virtmemControl_Epilogue__(pResource, pCallContext, pParams); } static inline void virtmemPreDestruct_DISPATCH(struct VirtualMemory *pResource) { pResource->__virtmemPreDestruct__(pResource); } -static inline NV_STATUS virtmemIsDuplicate_DISPATCH(struct VirtualMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__virtmemIsDuplicate__(pMemory, hMemory, pDuplicate); +static inline NV_STATUS virtmemControlFilter_DISPATCH(struct VirtualMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__virtmemControlFilter__(pResource, pCallContext, pParams); } -static inline void virtmemControlSerialization_Epilogue_DISPATCH(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__virtmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NvU32 virtmemGetRefCount_DISPATCH(struct VirtualMemory *pResource) { + return pResource->__virtmemGetRefCount__(pResource); } -static inline NV_STATUS virtmemMap_DISPATCH(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__virtmemMap__(pMemory, pCallContext, pParams, pCpuMapping); +static inline void virtmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VirtualMemory *pResource, RsResourceRef *pReference) { + pResource->__virtmemAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NvBool virtmemAccessCallback_DISPATCH(struct VirtualMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__virtmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +NV_STATUS virtmemMapTo_IMPL(struct VirtualMemory *pVirtualMemory, struct RS_RES_MAP_TO_PARAMS *pParams); + +NV_STATUS virtmemUnmapFrom_IMPL(struct VirtualMemory *pVirtualMemory, struct RS_RES_UNMAP_FROM_PARAMS *pParams); + +static inline NvBool virtmemIsPartialUnmapSupported_0c883b(struct VirtualMemory *pVirtualMemory) { + return ((NvBool)(0 == 0)); } NV_STATUS virtmemConstruct_IMPL(struct VirtualMemory *arg_pVirtualMemory, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); @@ -272,15 +321,15 @@ NV_STATUS virtmemConstruct_IMPL(struct VirtualMemory *arg_pVirtualMemory, CALL_C void virtmemDestruct_IMPL(struct VirtualMemory *pVirtualMemory); #define __nvoc_virtmemDestruct(pVirtualMemory) virtmemDestruct_IMPL(pVirtualMemory) -NV_STATUS virtmemReserveMempool_IMPL(struct VirtualMemory *pVirtualMemory, struct OBJGPU *arg0, struct Device *pDevice, NvU64 size, NvU64 pageSizeMask); +NV_STATUS virtmemReserveMempool_IMPL(struct VirtualMemory *pVirtualMemory, struct OBJGPU *arg2, struct Device *pDevice, NvU64 size, NvU64 pageSizeMask); #ifdef __nvoc_virtual_mem_h_disabled -static inline NV_STATUS virtmemReserveMempool(struct VirtualMemory *pVirtualMemory, struct OBJGPU *arg0, struct Device *pDevice, NvU64 size, NvU64 pageSizeMask) { +static inline NV_STATUS virtmemReserveMempool(struct VirtualMemory *pVirtualMemory, struct OBJGPU *arg2, struct Device *pDevice, NvU64 size, NvU64 pageSizeMask) { NV_ASSERT_FAILED_PRECOMP("VirtualMemory was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_virtual_mem_h_disabled -#define virtmemReserveMempool(pVirtualMemory, arg0, pDevice, size, pageSizeMask) virtmemReserveMempool_IMPL(pVirtualMemory, arg0, pDevice, size, pageSizeMask) +#define virtmemReserveMempool(pVirtualMemory, arg2, pDevice, size, pageSizeMask) virtmemReserveMempool_IMPL(pVirtualMemory, arg2, pDevice, size, pageSizeMask) #endif //__nvoc_virtual_mem_h_disabled NvBool virtmemMatchesVASpace_IMPL(struct VirtualMemory *pVirtualMemory, NvHandle hClient, NvHandle hVASpace); @@ -297,9 +346,9 @@ static inline NvBool virtmemMatchesVASpace(struct VirtualMemory *pVirtualMemory, NV_STATUS virtmemGetByHandleAndDevice_IMPL(struct RsClient *pClient, NvHandle hMemory, NvHandle hDevice, struct VirtualMemory **ppVirtualMemory); #define virtmemGetByHandleAndDevice(pClient, hMemory, hDevice, ppVirtualMemory) virtmemGetByHandleAndDevice_IMPL(pClient, hMemory, hDevice, ppVirtualMemory) -void virtmemGetAddressAndSize_IMPL(struct VirtualMemory *arg0, NvU64 *pVAddr, NvU64 *pSize); +void virtmemGetAddressAndSize_IMPL(struct VirtualMemory *arg1, NvU64 *pVAddr, NvU64 *pSize); -#define virtmemGetAddressAndSize(arg0, pVAddr, pSize) virtmemGetAddressAndSize_IMPL(arg0, pVAddr, pSize) +#define virtmemGetAddressAndSize(arg1, pVAddr, pSize) virtmemGetAddressAndSize_IMPL(arg1, pVAddr, pSize) #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_zbc_api_nvoc.c b/src/nvidia/generated/g_zbc_api_nvoc.c index a48f87cdf8..8f9e18bb6a 100644 --- a/src/nvidia/generated/g_zbc_api_nvoc.c +++ b/src/nvidia/generated/g_zbc_api_nvoc.c @@ -93,106 +93,6 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_ZbcApi = /*pExportInfo=*/ &__nvoc_export_info_ZbcApi }; -static NvBool __nvoc_thunk_GpuResource_zbcapiShareCallback(struct ZbcApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); -} - -static NV_STATUS __nvoc_thunk_RmResource_zbcapiCheckMemInterUnmap(struct ZbcApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ZbcApi_RmResource.offset), bSubdeviceHandleProvided); -} - -static NV_STATUS __nvoc_thunk_RsResource_zbcapiMapTo(struct ZbcApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ZbcApi_RsResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_zbcapiGetMapAddrSpace(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); -} - -static NvU32 __nvoc_thunk_RsResource_zbcapiGetRefCount(struct ZbcApi *pResource) { - return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ZbcApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_zbcapiAddAdditionalDependants(struct RsClient *pClient, struct ZbcApi *pResource, RsResourceRef *pReference) { - resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ZbcApi_RsResource.offset), pReference); -} - -static NV_STATUS __nvoc_thunk_RmResource_zbcapiControl_Prologue(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ZbcApi_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_zbcapiGetRegBaseOffsetAndSize(struct ZbcApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), pGpu, pOffset, pSize); -} - -static NV_STATUS __nvoc_thunk_GpuResource_zbcapiInternalControlForward(struct ZbcApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), command, pParams, size); -} - -static NV_STATUS __nvoc_thunk_RsResource_zbcapiUnmapFrom(struct ZbcApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ZbcApi_RsResource.offset), pParams); -} - -static void __nvoc_thunk_RmResource_zbcapiControl_Epilogue(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ZbcApi_RmResource.offset), pCallContext, pParams); -} - -static NvHandle __nvoc_thunk_GpuResource_zbcapiGetInternalObjectHandle(struct ZbcApi *pGpuResource) { - return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset)); -} - -static NV_STATUS __nvoc_thunk_GpuResource_zbcapiControl(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_zbcapiUnmap(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), pCallContext, pCpuMapping); -} - -static NV_STATUS __nvoc_thunk_RmResource_zbcapiGetMemInterMapParams(struct ZbcApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ZbcApi_RmResource.offset), pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_zbcapiGetMemoryMappingDescriptor(struct ZbcApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_ZbcApi_RmResource.offset), ppMemDesc); -} - -static NV_STATUS __nvoc_thunk_RsResource_zbcapiControlFilter(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ZbcApi_RsResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_RmResource_zbcapiControlSerialization_Prologue(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ZbcApi_RmResource.offset), pCallContext, pParams); -} - -static NvBool __nvoc_thunk_RsResource_zbcapiCanCopy(struct ZbcApi *pResource) { - return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ZbcApi_RsResource.offset)); -} - -static NvBool __nvoc_thunk_RsResource_zbcapiIsPartialUnmapSupported(struct ZbcApi *pResource) { - return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ZbcApi_RsResource.offset)); -} - -static void __nvoc_thunk_RsResource_zbcapiPreDestruct(struct ZbcApi *pResource) { - resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ZbcApi_RsResource.offset)); -} - -static NV_STATUS __nvoc_thunk_RsResource_zbcapiIsDuplicate(struct ZbcApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ZbcApi_RsResource.offset), hMemory, pDuplicate); -} - -static void __nvoc_thunk_RmResource_zbcapiControlSerialization_Epilogue(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ZbcApi_RmResource.offset), pCallContext, pParams); -} - -static NV_STATUS __nvoc_thunk_GpuResource_zbcapiMap(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); -} - -static NvBool __nvoc_thunk_RmResource_zbcapiAccessCallback(struct ZbcApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ZbcApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); -} - #if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) #define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) #endif @@ -200,12 +100,12 @@ static NvBool __nvoc_thunk_RmResource_zbcapiAccessCallback(struct ZbcApi *pResou static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ZbcApi[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) zbcapiCtrlCmdSetZbcColorClear_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x90960101u, /*paramSize=*/ sizeof(NV9096_CTRL_SET_ZBC_COLOR_CLEAR_PARAMS), @@ -215,12 +115,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ZbcApi[] #endif }, { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) zbcapiCtrlCmdSetZbcDepthClear_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x90960102u, /*paramSize=*/ sizeof(NV9096_CTRL_SET_ZBC_DEPTH_CLEAR_PARAMS), @@ -230,12 +130,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ZbcApi[] #endif }, { /* [2] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) zbcapiCtrlCmdGetZbcClearTable_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x90960103u, /*paramSize=*/ sizeof(NV9096_CTRL_GET_ZBC_CLEAR_TABLE_PARAMS), @@ -245,12 +145,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ZbcApi[] #endif }, { /* [3] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) zbcapiCtrlCmdSetZbcClearTable_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x90960104u, /*paramSize=*/ sizeof(NV9096_CTRL_SET_ZBC_CLEAR_TABLE_PARAMS), @@ -260,12 +160,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ZbcApi[] #endif }, { /* [4] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) zbcapiCtrlCmdSetZbcStencilClear_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x90960105u, /*paramSize=*/ sizeof(NV9096_CTRL_SET_ZBC_STENCIL_CLEAR_PARAMS), @@ -275,12 +175,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ZbcApi[] #endif }, { /* [5] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) zbcapiCtrlCmdGetZbcClearTableSize_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400210u) - /*flags=*/ 0x400210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + /*flags=*/ 0x40048u, /*accessRight=*/0x0u, /*methodId=*/ 0x90960106u, /*paramSize=*/ sizeof(NV9096_CTRL_GET_ZBC_CLEAR_TABLE_SIZE_PARAMS), @@ -290,12 +190,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ZbcApi[] #endif }, { /* [6] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) zbcapiCtrlCmdGetZbcClearTableEntry_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) - /*flags=*/ 0x2210u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) + /*flags=*/ 0x248u, /*accessRight=*/0x0u, /*methodId=*/ 0x90960107u, /*paramSize=*/ sizeof(NV9096_CTRL_GET_ZBC_CLEAR_TABLE_ENTRY_PARAMS), @@ -307,6 +207,134 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ZbcApi[] }; +// 25 up-thunk(s) defined to bridge methods in ZbcApi to superclasses + +// zbcapiControl: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiControl(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), pCallContext, pParams); +} + +// zbcapiMap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiMap(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// zbcapiUnmap: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiUnmap(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), pCallContext, pCpuMapping); +} + +// zbcapiShareCallback: virtual inherited (gpures) base (gpures) +static NvBool __nvoc_up_thunk_GpuResource_zbcapiShareCallback(struct ZbcApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// zbcapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiGetRegBaseOffsetAndSize(struct ZbcApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), pGpu, pOffset, pSize); +} + +// zbcapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiGetMapAddrSpace(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + +// zbcapiInternalControlForward: virtual inherited (gpures) base (gpures) +static NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiInternalControlForward(struct ZbcApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), command, pParams, size); +} + +// zbcapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) +static NvHandle __nvoc_up_thunk_GpuResource_zbcapiGetInternalObjectHandle(struct ZbcApi *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset)); +} + +// zbcapiAccessCallback: virtual inherited (rmres) base (gpures) +static NvBool __nvoc_up_thunk_RmResource_zbcapiAccessCallback(struct ZbcApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// zbcapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_zbcapiGetMemInterMapParams(struct ZbcApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ZbcApi_RmResource.offset), pParams); +} + +// zbcapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_zbcapiCheckMemInterUnmap(struct ZbcApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ZbcApi_RmResource.offset), bSubdeviceHandleProvided); +} + +// zbcapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_zbcapiGetMemoryMappingDescriptor(struct ZbcApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ZbcApi_RmResource.offset), ppMemDesc); +} + +// zbcapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_zbcapiControlSerialization_Prologue(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RmResource.offset), pCallContext, pParams); +} + +// zbcapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_zbcapiControlSerialization_Epilogue(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RmResource.offset), pCallContext, pParams); +} + +// zbcapiControl_Prologue: virtual inherited (rmres) base (gpures) +static NV_STATUS __nvoc_up_thunk_RmResource_zbcapiControl_Prologue(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RmResource.offset), pCallContext, pParams); +} + +// zbcapiControl_Epilogue: virtual inherited (rmres) base (gpures) +static void __nvoc_up_thunk_RmResource_zbcapiControl_Epilogue(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RmResource.offset), pCallContext, pParams); +} + +// zbcapiCanCopy: virtual inherited (res) base (gpures) +static NvBool __nvoc_up_thunk_RsResource_zbcapiCanCopy(struct ZbcApi *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RsResource.offset)); +} + +// zbcapiIsDuplicate: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_zbcapiIsDuplicate(struct ZbcApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RsResource.offset), hMemory, pDuplicate); +} + +// zbcapiPreDestruct: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_zbcapiPreDestruct(struct ZbcApi *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RsResource.offset)); +} + +// zbcapiControlFilter: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_zbcapiControlFilter(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RsResource.offset), pCallContext, pParams); +} + +// zbcapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body +static NvBool __nvoc_up_thunk_RsResource_zbcapiIsPartialUnmapSupported(struct ZbcApi *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RsResource.offset)); +} + +// zbcapiMapTo: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_zbcapiMapTo(struct ZbcApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RsResource.offset), pParams); +} + +// zbcapiUnmapFrom: virtual inherited (res) base (gpures) +static NV_STATUS __nvoc_up_thunk_RsResource_zbcapiUnmapFrom(struct ZbcApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RsResource.offset), pParams); +} + +// zbcapiGetRefCount: virtual inherited (res) base (gpures) +static NvU32 __nvoc_up_thunk_RsResource_zbcapiGetRefCount(struct ZbcApi *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RsResource.offset)); +} + +// zbcapiAddAdditionalDependants: virtual inherited (res) base (gpures) +static void __nvoc_up_thunk_RsResource_zbcapiAddAdditionalDependants(struct RsClient *pClient, struct ZbcApi *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RsResource.offset), pReference); +} + + const struct NVOC_EXPORT_INFO __nvoc_export_info_ZbcApi = { /*numEntries=*/ 7, @@ -348,6 +376,7 @@ NV_STATUS __nvoc_ctor_ZbcApi(ZbcApi *pThis, RmHalspecOwner *pRmhalspecowner, str return status; } +// Vtable initialization static void __nvoc_init_funcTable_ZbcApi_1(ZbcApi *pThis, RmHalspecOwner *pRmhalspecowner) { RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; @@ -356,27 +385,32 @@ static void __nvoc_init_funcTable_ZbcApi_1(ZbcApi *pThis, RmHalspecOwner *pRmhal PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // zbcapiCtrlCmdSetZbcColorClear -- exported (id=0x90960101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__zbcapiCtrlCmdSetZbcColorClear__ = &zbcapiCtrlCmdSetZbcColorClear_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // zbcapiCtrlCmdSetZbcDepthClear -- exported (id=0x90960102) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__zbcapiCtrlCmdSetZbcDepthClear__ = &zbcapiCtrlCmdSetZbcDepthClear_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // zbcapiCtrlCmdGetZbcClearTable -- exported (id=0x90960103) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__zbcapiCtrlCmdGetZbcClearTable__ = &zbcapiCtrlCmdGetZbcClearTable_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // zbcapiCtrlCmdSetZbcClearTable -- exported (id=0x90960104) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__zbcapiCtrlCmdSetZbcClearTable__ = &zbcapiCtrlCmdSetZbcClearTable_IMPL; #endif -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // zbcapiCtrlCmdSetZbcStencilClear -- exported (id=0x90960105) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__zbcapiCtrlCmdSetZbcStencilClear__ = &zbcapiCtrlCmdSetZbcStencilClear_IMPL; #endif - // Hal function -- zbcapiCtrlCmdGetZbcClearTableSize + // zbcapiCtrlCmdGetZbcClearTableSize -- halified (2 hals) exported (id=0x90960106) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__zbcapiCtrlCmdGetZbcClearTableSize__ = &zbcapiCtrlCmdGetZbcClearTableSize_VF; @@ -386,62 +420,92 @@ static void __nvoc_init_funcTable_ZbcApi_1(ZbcApi *pThis, RmHalspecOwner *pRmhal pThis->__zbcapiCtrlCmdGetZbcClearTableSize__ = &zbcapiCtrlCmdGetZbcClearTableSize_5baef9; } -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2210u) + // zbcapiCtrlCmdGetZbcClearTableEntry -- exported (id=0x90960107) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__zbcapiCtrlCmdGetZbcClearTableEntry__ = &zbcapiCtrlCmdGetZbcClearTableEntry_IMPL; #endif - pThis->__zbcapiShareCallback__ = &__nvoc_thunk_GpuResource_zbcapiShareCallback; + // zbcapiControl -- virtual inherited (gpures) base (gpures) + pThis->__zbcapiControl__ = &__nvoc_up_thunk_GpuResource_zbcapiControl; - pThis->__zbcapiCheckMemInterUnmap__ = &__nvoc_thunk_RmResource_zbcapiCheckMemInterUnmap; + // zbcapiMap -- virtual inherited (gpures) base (gpures) + pThis->__zbcapiMap__ = &__nvoc_up_thunk_GpuResource_zbcapiMap; - pThis->__zbcapiMapTo__ = &__nvoc_thunk_RsResource_zbcapiMapTo; + // zbcapiUnmap -- virtual inherited (gpures) base (gpures) + pThis->__zbcapiUnmap__ = &__nvoc_up_thunk_GpuResource_zbcapiUnmap; - pThis->__zbcapiGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_zbcapiGetMapAddrSpace; + // zbcapiShareCallback -- virtual inherited (gpures) base (gpures) + pThis->__zbcapiShareCallback__ = &__nvoc_up_thunk_GpuResource_zbcapiShareCallback; - pThis->__zbcapiGetRefCount__ = &__nvoc_thunk_RsResource_zbcapiGetRefCount; + // zbcapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) + pThis->__zbcapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_zbcapiGetRegBaseOffsetAndSize; - pThis->__zbcapiAddAdditionalDependants__ = &__nvoc_thunk_RsResource_zbcapiAddAdditionalDependants; + // zbcapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) + pThis->__zbcapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_zbcapiGetMapAddrSpace; - pThis->__zbcapiControl_Prologue__ = &__nvoc_thunk_RmResource_zbcapiControl_Prologue; + // zbcapiInternalControlForward -- virtual inherited (gpures) base (gpures) + pThis->__zbcapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_zbcapiInternalControlForward; - pThis->__zbcapiGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_zbcapiGetRegBaseOffsetAndSize; + // zbcapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) + pThis->__zbcapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_zbcapiGetInternalObjectHandle; - pThis->__zbcapiInternalControlForward__ = &__nvoc_thunk_GpuResource_zbcapiInternalControlForward; + // zbcapiAccessCallback -- virtual inherited (rmres) base (gpures) + pThis->__zbcapiAccessCallback__ = &__nvoc_up_thunk_RmResource_zbcapiAccessCallback; - pThis->__zbcapiUnmapFrom__ = &__nvoc_thunk_RsResource_zbcapiUnmapFrom; + // zbcapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) + pThis->__zbcapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_zbcapiGetMemInterMapParams; - pThis->__zbcapiControl_Epilogue__ = &__nvoc_thunk_RmResource_zbcapiControl_Epilogue; + // zbcapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) + pThis->__zbcapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_zbcapiCheckMemInterUnmap; - pThis->__zbcapiGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_zbcapiGetInternalObjectHandle; + // zbcapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) + pThis->__zbcapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_zbcapiGetMemoryMappingDescriptor; - pThis->__zbcapiControl__ = &__nvoc_thunk_GpuResource_zbcapiControl; + // zbcapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__zbcapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_zbcapiControlSerialization_Prologue; - pThis->__zbcapiUnmap__ = &__nvoc_thunk_GpuResource_zbcapiUnmap; + // zbcapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__zbcapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_zbcapiControlSerialization_Epilogue; - pThis->__zbcapiGetMemInterMapParams__ = &__nvoc_thunk_RmResource_zbcapiGetMemInterMapParams; + // zbcapiControl_Prologue -- virtual inherited (rmres) base (gpures) + pThis->__zbcapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_zbcapiControl_Prologue; - pThis->__zbcapiGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_zbcapiGetMemoryMappingDescriptor; + // zbcapiControl_Epilogue -- virtual inherited (rmres) base (gpures) + pThis->__zbcapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_zbcapiControl_Epilogue; - pThis->__zbcapiControlFilter__ = &__nvoc_thunk_RsResource_zbcapiControlFilter; + // zbcapiCanCopy -- virtual inherited (res) base (gpures) + pThis->__zbcapiCanCopy__ = &__nvoc_up_thunk_RsResource_zbcapiCanCopy; - pThis->__zbcapiControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_zbcapiControlSerialization_Prologue; + // zbcapiIsDuplicate -- virtual inherited (res) base (gpures) + pThis->__zbcapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_zbcapiIsDuplicate; - pThis->__zbcapiCanCopy__ = &__nvoc_thunk_RsResource_zbcapiCanCopy; + // zbcapiPreDestruct -- virtual inherited (res) base (gpures) + pThis->__zbcapiPreDestruct__ = &__nvoc_up_thunk_RsResource_zbcapiPreDestruct; - pThis->__zbcapiIsPartialUnmapSupported__ = &__nvoc_thunk_RsResource_zbcapiIsPartialUnmapSupported; + // zbcapiControlFilter -- virtual inherited (res) base (gpures) + pThis->__zbcapiControlFilter__ = &__nvoc_up_thunk_RsResource_zbcapiControlFilter; - pThis->__zbcapiPreDestruct__ = &__nvoc_thunk_RsResource_zbcapiPreDestruct; + // zbcapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body + pThis->__zbcapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_zbcapiIsPartialUnmapSupported; - pThis->__zbcapiIsDuplicate__ = &__nvoc_thunk_RsResource_zbcapiIsDuplicate; + // zbcapiMapTo -- virtual inherited (res) base (gpures) + pThis->__zbcapiMapTo__ = &__nvoc_up_thunk_RsResource_zbcapiMapTo; - pThis->__zbcapiControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_zbcapiControlSerialization_Epilogue; + // zbcapiUnmapFrom -- virtual inherited (res) base (gpures) + pThis->__zbcapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_zbcapiUnmapFrom; - pThis->__zbcapiMap__ = &__nvoc_thunk_GpuResource_zbcapiMap; + // zbcapiGetRefCount -- virtual inherited (res) base (gpures) + pThis->__zbcapiGetRefCount__ = &__nvoc_up_thunk_RsResource_zbcapiGetRefCount; + + // zbcapiAddAdditionalDependants -- virtual inherited (res) base (gpures) + pThis->__zbcapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_zbcapiAddAdditionalDependants; +} // End __nvoc_init_funcTable_ZbcApi_1 with approximately 33 basic block(s). - pThis->__zbcapiAccessCallback__ = &__nvoc_thunk_RmResource_zbcapiAccessCallback; -} +// Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_ZbcApi(ZbcApi *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Initialize vtable(s) with 32 per-object function pointer(s). __nvoc_init_funcTable_ZbcApi_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_zbc_api_nvoc.h b/src/nvidia/generated/g_zbc_api_nvoc.h index 7421cc2b93..b15a6015bc 100644 --- a/src/nvidia/generated/g_zbc_api_nvoc.h +++ b/src/nvidia/generated/g_zbc_api_nvoc.h @@ -1,7 +1,14 @@ + #ifndef _G_ZBC_API_NVOC_H_ #define _G_ZBC_API_NVOC_H_ #include "nvoc/runtime.h" +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 0 + #ifdef __cplusplus extern "C" { #endif @@ -29,6 +36,7 @@ extern "C" { * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_zbc_api_nvoc.h" #ifndef _ZBCAPI_H_ @@ -52,47 +60,58 @@ extern "C" { #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + struct ZbcApi { + + // Metadata const struct NVOC_RTTI *__nvoc_rtti; + + // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; - struct Object *__nvoc_pbase_Object; - struct RsResource *__nvoc_pbase_RsResource; - struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; - struct RmResource *__nvoc_pbase_RmResource; - struct GpuResource *__nvoc_pbase_GpuResource; - struct ZbcApi *__nvoc_pbase_ZbcApi; - NV_STATUS (*__zbcapiCtrlCmdSetZbcColorClear__)(struct ZbcApi *, NV9096_CTRL_SET_ZBC_COLOR_CLEAR_PARAMS *); - NV_STATUS (*__zbcapiCtrlCmdSetZbcDepthClear__)(struct ZbcApi *, NV9096_CTRL_SET_ZBC_DEPTH_CLEAR_PARAMS *); - NV_STATUS (*__zbcapiCtrlCmdGetZbcClearTable__)(struct ZbcApi *, NV9096_CTRL_GET_ZBC_CLEAR_TABLE_PARAMS *); - NV_STATUS (*__zbcapiCtrlCmdSetZbcClearTable__)(struct ZbcApi *, NV9096_CTRL_SET_ZBC_CLEAR_TABLE_PARAMS *); - NV_STATUS (*__zbcapiCtrlCmdSetZbcStencilClear__)(struct ZbcApi *, NV9096_CTRL_SET_ZBC_STENCIL_CLEAR_PARAMS *); - NV_STATUS (*__zbcapiCtrlCmdGetZbcClearTableSize__)(struct ZbcApi *, NV9096_CTRL_GET_ZBC_CLEAR_TABLE_SIZE_PARAMS *); - NV_STATUS (*__zbcapiCtrlCmdGetZbcClearTableEntry__)(struct ZbcApi *, NV9096_CTRL_GET_ZBC_CLEAR_TABLE_ENTRY_PARAMS *); - NvBool (*__zbcapiShareCallback__)(struct ZbcApi *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); - NV_STATUS (*__zbcapiCheckMemInterUnmap__)(struct ZbcApi *, NvBool); - NV_STATUS (*__zbcapiMapTo__)(struct ZbcApi *, RS_RES_MAP_TO_PARAMS *); - NV_STATUS (*__zbcapiGetMapAddrSpace__)(struct ZbcApi *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); - NvU32 (*__zbcapiGetRefCount__)(struct ZbcApi *); - void (*__zbcapiAddAdditionalDependants__)(struct RsClient *, struct ZbcApi *, RsResourceRef *); - NV_STATUS (*__zbcapiControl_Prologue__)(struct ZbcApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__zbcapiGetRegBaseOffsetAndSize__)(struct ZbcApi *, struct OBJGPU *, NvU32 *, NvU32 *); - NV_STATUS (*__zbcapiInternalControlForward__)(struct ZbcApi *, NvU32, void *, NvU32); - NV_STATUS (*__zbcapiUnmapFrom__)(struct ZbcApi *, RS_RES_UNMAP_FROM_PARAMS *); - void (*__zbcapiControl_Epilogue__)(struct ZbcApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvHandle (*__zbcapiGetInternalObjectHandle__)(struct ZbcApi *); - NV_STATUS (*__zbcapiControl__)(struct ZbcApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__zbcapiUnmap__)(struct ZbcApi *, struct CALL_CONTEXT *, struct RsCpuMapping *); - NV_STATUS (*__zbcapiGetMemInterMapParams__)(struct ZbcApi *, RMRES_MEM_INTER_MAP_PARAMS *); - NV_STATUS (*__zbcapiGetMemoryMappingDescriptor__)(struct ZbcApi *, struct MEMORY_DESCRIPTOR **); - NV_STATUS (*__zbcapiControlFilter__)(struct ZbcApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__zbcapiControlSerialization_Prologue__)(struct ZbcApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NvBool (*__zbcapiCanCopy__)(struct ZbcApi *); - NvBool (*__zbcapiIsPartialUnmapSupported__)(struct ZbcApi *); - void (*__zbcapiPreDestruct__)(struct ZbcApi *); - NV_STATUS (*__zbcapiIsDuplicate__)(struct ZbcApi *, NvHandle, NvBool *); - void (*__zbcapiControlSerialization_Epilogue__)(struct ZbcApi *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); - NV_STATUS (*__zbcapiMap__)(struct ZbcApi *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); - NvBool (*__zbcapiAccessCallback__)(struct ZbcApi *, struct RsClient *, void *, RsAccessRight); + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^4 + struct RsResource *__nvoc_pbase_RsResource; // res super^3 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^3 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super + struct ZbcApi *__nvoc_pbase_ZbcApi; // zbcapi + + // Vtable with 32 per-object function pointers + NV_STATUS (*__zbcapiCtrlCmdSetZbcColorClear__)(struct ZbcApi * /*this*/, NV9096_CTRL_SET_ZBC_COLOR_CLEAR_PARAMS *); // exported (id=0x90960101) + NV_STATUS (*__zbcapiCtrlCmdSetZbcDepthClear__)(struct ZbcApi * /*this*/, NV9096_CTRL_SET_ZBC_DEPTH_CLEAR_PARAMS *); // exported (id=0x90960102) + NV_STATUS (*__zbcapiCtrlCmdGetZbcClearTable__)(struct ZbcApi * /*this*/, NV9096_CTRL_GET_ZBC_CLEAR_TABLE_PARAMS *); // exported (id=0x90960103) + NV_STATUS (*__zbcapiCtrlCmdSetZbcClearTable__)(struct ZbcApi * /*this*/, NV9096_CTRL_SET_ZBC_CLEAR_TABLE_PARAMS *); // exported (id=0x90960104) + NV_STATUS (*__zbcapiCtrlCmdSetZbcStencilClear__)(struct ZbcApi * /*this*/, NV9096_CTRL_SET_ZBC_STENCIL_CLEAR_PARAMS *); // exported (id=0x90960105) + NV_STATUS (*__zbcapiCtrlCmdGetZbcClearTableSize__)(struct ZbcApi * /*this*/, NV9096_CTRL_GET_ZBC_CLEAR_TABLE_SIZE_PARAMS *); // halified (2 hals) exported (id=0x90960106) body + NV_STATUS (*__zbcapiCtrlCmdGetZbcClearTableEntry__)(struct ZbcApi * /*this*/, NV9096_CTRL_GET_ZBC_CLEAR_TABLE_ENTRY_PARAMS *); // exported (id=0x90960107) + NV_STATUS (*__zbcapiControl__)(struct ZbcApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__zbcapiMap__)(struct ZbcApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__zbcapiUnmap__)(struct ZbcApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__zbcapiShareCallback__)(struct ZbcApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__zbcapiGetRegBaseOffsetAndSize__)(struct ZbcApi * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__zbcapiGetMapAddrSpace__)(struct ZbcApi * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__zbcapiInternalControlForward__)(struct ZbcApi * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__zbcapiGetInternalObjectHandle__)(struct ZbcApi * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__zbcapiAccessCallback__)(struct ZbcApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__zbcapiGetMemInterMapParams__)(struct ZbcApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__zbcapiCheckMemInterUnmap__)(struct ZbcApi * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__zbcapiGetMemoryMappingDescriptor__)(struct ZbcApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__zbcapiControlSerialization_Prologue__)(struct ZbcApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__zbcapiControlSerialization_Epilogue__)(struct ZbcApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__zbcapiControl_Prologue__)(struct ZbcApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__zbcapiControl_Epilogue__)(struct ZbcApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__zbcapiCanCopy__)(struct ZbcApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__zbcapiIsDuplicate__)(struct ZbcApi * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__zbcapiPreDestruct__)(struct ZbcApi * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__zbcapiControlFilter__)(struct ZbcApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__zbcapiIsPartialUnmapSupported__)(struct ZbcApi * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__zbcapiMapTo__)(struct ZbcApi * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__zbcapiUnmapFrom__)(struct ZbcApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__zbcapiGetRefCount__)(struct ZbcApi * /*this*/); // virtual inherited (res) base (gpures) + void (*__zbcapiAddAdditionalDependants__)(struct RsClient *, struct ZbcApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + + // Data members NvBool bZbcUsed; }; @@ -105,6 +124,7 @@ typedef struct ZbcApi ZbcApi; #define __nvoc_class_id_ZbcApi 0x397ee3 #endif /* __nvoc_class_id_ZbcApi */ +// Casting support extern const struct NVOC_CLASS_DEF __nvoc_class_def_ZbcApi; #define __staticCast_ZbcApi(pThis) \ @@ -117,214 +137,249 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_ZbcApi; ((ZbcApi*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(ZbcApi))) #endif //__nvoc_zbc_api_h_disabled - NV_STATUS __nvoc_objCreateDynamic_ZbcApi(ZbcApi**, Dynamic*, NvU32, va_list); NV_STATUS __nvoc_objCreate_ZbcApi(ZbcApi**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); #define __objCreate_ZbcApi(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ __nvoc_objCreate_ZbcApi((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + +// Wrapper macros +#define zbcapiCtrlCmdSetZbcColorClear_FNPTR(pZbcApi) pZbcApi->__zbcapiCtrlCmdSetZbcColorClear__ #define zbcapiCtrlCmdSetZbcColorClear(pZbcApi, pSetZBCClearParams) zbcapiCtrlCmdSetZbcColorClear_DISPATCH(pZbcApi, pSetZBCClearParams) +#define zbcapiCtrlCmdSetZbcDepthClear_FNPTR(pZbcApi) pZbcApi->__zbcapiCtrlCmdSetZbcDepthClear__ #define zbcapiCtrlCmdSetZbcDepthClear(pZbcApi, pSetZBCClearParams) zbcapiCtrlCmdSetZbcDepthClear_DISPATCH(pZbcApi, pSetZBCClearParams) +#define zbcapiCtrlCmdGetZbcClearTable_FNPTR(pZbcApi) pZbcApi->__zbcapiCtrlCmdGetZbcClearTable__ #define zbcapiCtrlCmdGetZbcClearTable(pZbcApi, pGetZBCClearTableParams) zbcapiCtrlCmdGetZbcClearTable_DISPATCH(pZbcApi, pGetZBCClearTableParams) +#define zbcapiCtrlCmdSetZbcClearTable_FNPTR(pZbcApi) pZbcApi->__zbcapiCtrlCmdSetZbcClearTable__ #define zbcapiCtrlCmdSetZbcClearTable(pZbcApi, pSetZBCClearTableParams) zbcapiCtrlCmdSetZbcClearTable_DISPATCH(pZbcApi, pSetZBCClearTableParams) +#define zbcapiCtrlCmdSetZbcStencilClear_FNPTR(pZbcApi) pZbcApi->__zbcapiCtrlCmdSetZbcStencilClear__ #define zbcapiCtrlCmdSetZbcStencilClear(pZbcApi, pSetZBCClearParams) zbcapiCtrlCmdSetZbcStencilClear_DISPATCH(pZbcApi, pSetZBCClearParams) +#define zbcapiCtrlCmdGetZbcClearTableSize_FNPTR(pZbcApi) pZbcApi->__zbcapiCtrlCmdGetZbcClearTableSize__ #define zbcapiCtrlCmdGetZbcClearTableSize(pZbcApi, pGetZBCClearTableSizeParams) zbcapiCtrlCmdGetZbcClearTableSize_DISPATCH(pZbcApi, pGetZBCClearTableSizeParams) #define zbcapiCtrlCmdGetZbcClearTableSize_HAL(pZbcApi, pGetZBCClearTableSizeParams) zbcapiCtrlCmdGetZbcClearTableSize_DISPATCH(pZbcApi, pGetZBCClearTableSizeParams) +#define zbcapiCtrlCmdGetZbcClearTableEntry_FNPTR(pZbcApi) pZbcApi->__zbcapiCtrlCmdGetZbcClearTableEntry__ #define zbcapiCtrlCmdGetZbcClearTableEntry(pZbcApi, pGetZBCClearTableEntryParams) zbcapiCtrlCmdGetZbcClearTableEntry_DISPATCH(pZbcApi, pGetZBCClearTableEntryParams) +#define zbcapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define zbcapiControl(pGpuResource, pCallContext, pParams) zbcapiControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define zbcapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define zbcapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) zbcapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define zbcapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define zbcapiUnmap(pGpuResource, pCallContext, pCpuMapping) zbcapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define zbcapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ #define zbcapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) zbcapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define zbcapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) zbcapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define zbcapiMapTo(pResource, pParams) zbcapiMapTo_DISPATCH(pResource, pParams) -#define zbcapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) zbcapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define zbcapiGetRefCount(pResource) zbcapiGetRefCount_DISPATCH(pResource) -#define zbcapiAddAdditionalDependants(pClient, pResource, pReference) zbcapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define zbcapiControl_Prologue(pResource, pCallContext, pParams) zbcapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define zbcapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ #define zbcapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) zbcapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define zbcapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define zbcapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) zbcapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define zbcapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ #define zbcapiInternalControlForward(pGpuResource, command, pParams, size) zbcapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define zbcapiUnmapFrom(pResource, pParams) zbcapiUnmapFrom_DISPATCH(pResource, pParams) -#define zbcapiControl_Epilogue(pResource, pCallContext, pParams) zbcapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define zbcapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ #define zbcapiGetInternalObjectHandle(pGpuResource) zbcapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define zbcapiControl(pGpuResource, pCallContext, pParams) zbcapiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define zbcapiUnmap(pGpuResource, pCallContext, pCpuMapping) zbcapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define zbcapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define zbcapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) zbcapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define zbcapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ #define zbcapiGetMemInterMapParams(pRmResource, pParams) zbcapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define zbcapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define zbcapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) zbcapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define zbcapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ #define zbcapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) zbcapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define zbcapiControlFilter(pResource, pCallContext, pParams) zbcapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define zbcapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ #define zbcapiControlSerialization_Prologue(pResource, pCallContext, pParams) zbcapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define zbcapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define zbcapiControlSerialization_Epilogue(pResource, pCallContext, pParams) zbcapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define zbcapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define zbcapiControl_Prologue(pResource, pCallContext, pParams) zbcapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define zbcapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define zbcapiControl_Epilogue(pResource, pCallContext, pParams) zbcapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define zbcapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ #define zbcapiCanCopy(pResource) zbcapiCanCopy_DISPATCH(pResource) -#define zbcapiIsPartialUnmapSupported(pResource) zbcapiIsPartialUnmapSupported_DISPATCH(pResource) -#define zbcapiPreDestruct(pResource) zbcapiPreDestruct_DISPATCH(pResource) +#define zbcapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ #define zbcapiIsDuplicate(pResource, hMemory, pDuplicate) zbcapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define zbcapiControlSerialization_Epilogue(pResource, pCallContext, pParams) zbcapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define zbcapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) zbcapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define zbcapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) zbcapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -static inline NV_STATUS zbcapiConstructHal_56cd7a(struct ZbcApi *pZbcApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - return NV_OK; -} - - -#ifdef __nvoc_zbc_api_h_disabled -static inline NV_STATUS zbcapiConstructHal(struct ZbcApi *pZbcApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - NV_ASSERT_FAILED_PRECOMP("ZbcApi was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_zbc_api_h_disabled -#define zbcapiConstructHal(pZbcApi, pCallContext, pParams) zbcapiConstructHal_56cd7a(pZbcApi, pCallContext, pParams) -#endif //__nvoc_zbc_api_h_disabled - -#define zbcapiConstructHal_HAL(pZbcApi, pCallContext, pParams) zbcapiConstructHal(pZbcApi, pCallContext, pParams) - -static inline void zbcapiDestruct_b3696a(struct ZbcApi *pZbcApi) { - return; -} - - -#define __nvoc_zbcapiDestruct(pZbcApi) zbcapiDestruct_b3696a(pZbcApi) -NV_STATUS zbcapiCtrlCmdSetZbcColorClear_IMPL(struct ZbcApi *pZbcApi, NV9096_CTRL_SET_ZBC_COLOR_CLEAR_PARAMS *pSetZBCClearParams); +#define zbcapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define zbcapiPreDestruct(pResource) zbcapiPreDestruct_DISPATCH(pResource) +#define zbcapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define zbcapiControlFilter(pResource, pCallContext, pParams) zbcapiControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define zbcapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define zbcapiIsPartialUnmapSupported(pResource) zbcapiIsPartialUnmapSupported_DISPATCH(pResource) +#define zbcapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define zbcapiMapTo(pResource, pParams) zbcapiMapTo_DISPATCH(pResource, pParams) +#define zbcapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define zbcapiUnmapFrom(pResource, pParams) zbcapiUnmapFrom_DISPATCH(pResource, pParams) +#define zbcapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define zbcapiGetRefCount(pResource) zbcapiGetRefCount_DISPATCH(pResource) +#define zbcapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define zbcapiAddAdditionalDependants(pClient, pResource, pReference) zbcapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) +// Dispatch functions static inline NV_STATUS zbcapiCtrlCmdSetZbcColorClear_DISPATCH(struct ZbcApi *pZbcApi, NV9096_CTRL_SET_ZBC_COLOR_CLEAR_PARAMS *pSetZBCClearParams) { return pZbcApi->__zbcapiCtrlCmdSetZbcColorClear__(pZbcApi, pSetZBCClearParams); } -NV_STATUS zbcapiCtrlCmdSetZbcDepthClear_IMPL(struct ZbcApi *pZbcApi, NV9096_CTRL_SET_ZBC_DEPTH_CLEAR_PARAMS *pSetZBCClearParams); - static inline NV_STATUS zbcapiCtrlCmdSetZbcDepthClear_DISPATCH(struct ZbcApi *pZbcApi, NV9096_CTRL_SET_ZBC_DEPTH_CLEAR_PARAMS *pSetZBCClearParams) { return pZbcApi->__zbcapiCtrlCmdSetZbcDepthClear__(pZbcApi, pSetZBCClearParams); } -NV_STATUS zbcapiCtrlCmdGetZbcClearTable_IMPL(struct ZbcApi *pZbcApi, NV9096_CTRL_GET_ZBC_CLEAR_TABLE_PARAMS *pGetZBCClearTableParams); - static inline NV_STATUS zbcapiCtrlCmdGetZbcClearTable_DISPATCH(struct ZbcApi *pZbcApi, NV9096_CTRL_GET_ZBC_CLEAR_TABLE_PARAMS *pGetZBCClearTableParams) { return pZbcApi->__zbcapiCtrlCmdGetZbcClearTable__(pZbcApi, pGetZBCClearTableParams); } -NV_STATUS zbcapiCtrlCmdSetZbcClearTable_IMPL(struct ZbcApi *pZbcApi, NV9096_CTRL_SET_ZBC_CLEAR_TABLE_PARAMS *pSetZBCClearTableParams); - static inline NV_STATUS zbcapiCtrlCmdSetZbcClearTable_DISPATCH(struct ZbcApi *pZbcApi, NV9096_CTRL_SET_ZBC_CLEAR_TABLE_PARAMS *pSetZBCClearTableParams) { return pZbcApi->__zbcapiCtrlCmdSetZbcClearTable__(pZbcApi, pSetZBCClearTableParams); } -NV_STATUS zbcapiCtrlCmdSetZbcStencilClear_IMPL(struct ZbcApi *pZbcApi, NV9096_CTRL_SET_ZBC_STENCIL_CLEAR_PARAMS *pSetZBCClearParams); - static inline NV_STATUS zbcapiCtrlCmdSetZbcStencilClear_DISPATCH(struct ZbcApi *pZbcApi, NV9096_CTRL_SET_ZBC_STENCIL_CLEAR_PARAMS *pSetZBCClearParams) { return pZbcApi->__zbcapiCtrlCmdSetZbcStencilClear__(pZbcApi, pSetZBCClearParams); } -NV_STATUS zbcapiCtrlCmdGetZbcClearTableSize_VF(struct ZbcApi *pZbcApi, NV9096_CTRL_GET_ZBC_CLEAR_TABLE_SIZE_PARAMS *pGetZBCClearTableSizeParams); - -static inline NV_STATUS zbcapiCtrlCmdGetZbcClearTableSize_5baef9(struct ZbcApi *pZbcApi, NV9096_CTRL_GET_ZBC_CLEAR_TABLE_SIZE_PARAMS *pGetZBCClearTableSizeParams) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - static inline NV_STATUS zbcapiCtrlCmdGetZbcClearTableSize_DISPATCH(struct ZbcApi *pZbcApi, NV9096_CTRL_GET_ZBC_CLEAR_TABLE_SIZE_PARAMS *pGetZBCClearTableSizeParams) { return pZbcApi->__zbcapiCtrlCmdGetZbcClearTableSize__(pZbcApi, pGetZBCClearTableSizeParams); } -NV_STATUS zbcapiCtrlCmdGetZbcClearTableEntry_IMPL(struct ZbcApi *pZbcApi, NV9096_CTRL_GET_ZBC_CLEAR_TABLE_ENTRY_PARAMS *pGetZBCClearTableEntryParams); - static inline NV_STATUS zbcapiCtrlCmdGetZbcClearTableEntry_DISPATCH(struct ZbcApi *pZbcApi, NV9096_CTRL_GET_ZBC_CLEAR_TABLE_ENTRY_PARAMS *pGetZBCClearTableEntryParams) { return pZbcApi->__zbcapiCtrlCmdGetZbcClearTableEntry__(pZbcApi, pGetZBCClearTableEntryParams); } -static inline NvBool zbcapiShareCallback_DISPATCH(struct ZbcApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__zbcapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +static inline NV_STATUS zbcapiControl_DISPATCH(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__zbcapiControl__(pGpuResource, pCallContext, pParams); } -static inline NV_STATUS zbcapiCheckMemInterUnmap_DISPATCH(struct ZbcApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__zbcapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +static inline NV_STATUS zbcapiMap_DISPATCH(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__zbcapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } -static inline NV_STATUS zbcapiMapTo_DISPATCH(struct ZbcApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__zbcapiMapTo__(pResource, pParams); +static inline NV_STATUS zbcapiUnmap_DISPATCH(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__zbcapiUnmap__(pGpuResource, pCallContext, pCpuMapping); +} + +static inline NvBool zbcapiShareCallback_DISPATCH(struct ZbcApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__zbcapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +} + +static inline NV_STATUS zbcapiGetRegBaseOffsetAndSize_DISPATCH(struct ZbcApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__zbcapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS zbcapiGetMapAddrSpace_DISPATCH(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return pGpuResource->__zbcapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } -static inline NvU32 zbcapiGetRefCount_DISPATCH(struct ZbcApi *pResource) { - return pResource->__zbcapiGetRefCount__(pResource); +static inline NV_STATUS zbcapiInternalControlForward_DISPATCH(struct ZbcApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__zbcapiInternalControlForward__(pGpuResource, command, pParams, size); } -static inline void zbcapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ZbcApi *pResource, RsResourceRef *pReference) { - pResource->__zbcapiAddAdditionalDependants__(pClient, pResource, pReference); +static inline NvHandle zbcapiGetInternalObjectHandle_DISPATCH(struct ZbcApi *pGpuResource) { + return pGpuResource->__zbcapiGetInternalObjectHandle__(pGpuResource); } -static inline NV_STATUS zbcapiControl_Prologue_DISPATCH(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__zbcapiControl_Prologue__(pResource, pCallContext, pParams); +static inline NvBool zbcapiAccessCallback_DISPATCH(struct ZbcApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__zbcapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } -static inline NV_STATUS zbcapiGetRegBaseOffsetAndSize_DISPATCH(struct ZbcApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__zbcapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +static inline NV_STATUS zbcapiGetMemInterMapParams_DISPATCH(struct ZbcApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__zbcapiGetMemInterMapParams__(pRmResource, pParams); } -static inline NV_STATUS zbcapiInternalControlForward_DISPATCH(struct ZbcApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__zbcapiInternalControlForward__(pGpuResource, command, pParams, size); +static inline NV_STATUS zbcapiCheckMemInterUnmap_DISPATCH(struct ZbcApi *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__zbcapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } -static inline NV_STATUS zbcapiUnmapFrom_DISPATCH(struct ZbcApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__zbcapiUnmapFrom__(pResource, pParams); +static inline NV_STATUS zbcapiGetMemoryMappingDescriptor_DISPATCH(struct ZbcApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__zbcapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } -static inline void zbcapiControl_Epilogue_DISPATCH(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__zbcapiControl_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS zbcapiControlSerialization_Prologue_DISPATCH(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__zbcapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } -static inline NvHandle zbcapiGetInternalObjectHandle_DISPATCH(struct ZbcApi *pGpuResource) { - return pGpuResource->__zbcapiGetInternalObjectHandle__(pGpuResource); +static inline void zbcapiControlSerialization_Epilogue_DISPATCH(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__zbcapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS zbcapiControl_DISPATCH(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__zbcapiControl__(pGpuResource, pCallContext, pParams); +static inline NV_STATUS zbcapiControl_Prologue_DISPATCH(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__zbcapiControl_Prologue__(pResource, pCallContext, pParams); } -static inline NV_STATUS zbcapiUnmap_DISPATCH(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__zbcapiUnmap__(pGpuResource, pCallContext, pCpuMapping); +static inline void zbcapiControl_Epilogue_DISPATCH(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__zbcapiControl_Epilogue__(pResource, pCallContext, pParams); } -static inline NV_STATUS zbcapiGetMemInterMapParams_DISPATCH(struct ZbcApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__zbcapiGetMemInterMapParams__(pRmResource, pParams); +static inline NvBool zbcapiCanCopy_DISPATCH(struct ZbcApi *pResource) { + return pResource->__zbcapiCanCopy__(pResource); } -static inline NV_STATUS zbcapiGetMemoryMappingDescriptor_DISPATCH(struct ZbcApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__zbcapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +static inline NV_STATUS zbcapiIsDuplicate_DISPATCH(struct ZbcApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__zbcapiIsDuplicate__(pResource, hMemory, pDuplicate); +} + +static inline void zbcapiPreDestruct_DISPATCH(struct ZbcApi *pResource) { + pResource->__zbcapiPreDestruct__(pResource); } static inline NV_STATUS zbcapiControlFilter_DISPATCH(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return pResource->__zbcapiControlFilter__(pResource, pCallContext, pParams); } -static inline NV_STATUS zbcapiControlSerialization_Prologue_DISPATCH(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__zbcapiControlSerialization_Prologue__(pResource, pCallContext, pParams); +static inline NvBool zbcapiIsPartialUnmapSupported_DISPATCH(struct ZbcApi *pResource) { + return pResource->__zbcapiIsPartialUnmapSupported__(pResource); } -static inline NvBool zbcapiCanCopy_DISPATCH(struct ZbcApi *pResource) { - return pResource->__zbcapiCanCopy__(pResource); +static inline NV_STATUS zbcapiMapTo_DISPATCH(struct ZbcApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__zbcapiMapTo__(pResource, pParams); } -static inline NvBool zbcapiIsPartialUnmapSupported_DISPATCH(struct ZbcApi *pResource) { - return pResource->__zbcapiIsPartialUnmapSupported__(pResource); +static inline NV_STATUS zbcapiUnmapFrom_DISPATCH(struct ZbcApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__zbcapiUnmapFrom__(pResource, pParams); } -static inline void zbcapiPreDestruct_DISPATCH(struct ZbcApi *pResource) { - pResource->__zbcapiPreDestruct__(pResource); +static inline NvU32 zbcapiGetRefCount_DISPATCH(struct ZbcApi *pResource) { + return pResource->__zbcapiGetRefCount__(pResource); } -static inline NV_STATUS zbcapiIsDuplicate_DISPATCH(struct ZbcApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__zbcapiIsDuplicate__(pResource, hMemory, pDuplicate); +static inline void zbcapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ZbcApi *pResource, RsResourceRef *pReference) { + pResource->__zbcapiAddAdditionalDependants__(pClient, pResource, pReference); } -static inline void zbcapiControlSerialization_Epilogue_DISPATCH(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__zbcapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); +static inline NV_STATUS zbcapiConstructHal_56cd7a(struct ZbcApi *pZbcApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + return NV_OK; } -static inline NV_STATUS zbcapiMap_DISPATCH(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__zbcapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + +#ifdef __nvoc_zbc_api_h_disabled +static inline NV_STATUS zbcapiConstructHal(struct ZbcApi *pZbcApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + NV_ASSERT_FAILED_PRECOMP("ZbcApi was disabled!"); + return NV_ERR_NOT_SUPPORTED; } +#else //__nvoc_zbc_api_h_disabled +#define zbcapiConstructHal(pZbcApi, pCallContext, pParams) zbcapiConstructHal_56cd7a(pZbcApi, pCallContext, pParams) +#endif //__nvoc_zbc_api_h_disabled -static inline NvBool zbcapiAccessCallback_DISPATCH(struct ZbcApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__zbcapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +#define zbcapiConstructHal_HAL(pZbcApi, pCallContext, pParams) zbcapiConstructHal(pZbcApi, pCallContext, pParams) + +static inline void zbcapiDestruct_b3696a(struct ZbcApi *pZbcApi) { + return; +} + + +#define __nvoc_zbcapiDestruct(pZbcApi) zbcapiDestruct_b3696a(pZbcApi) +NV_STATUS zbcapiCtrlCmdSetZbcColorClear_IMPL(struct ZbcApi *pZbcApi, NV9096_CTRL_SET_ZBC_COLOR_CLEAR_PARAMS *pSetZBCClearParams); + +NV_STATUS zbcapiCtrlCmdSetZbcDepthClear_IMPL(struct ZbcApi *pZbcApi, NV9096_CTRL_SET_ZBC_DEPTH_CLEAR_PARAMS *pSetZBCClearParams); + +NV_STATUS zbcapiCtrlCmdGetZbcClearTable_IMPL(struct ZbcApi *pZbcApi, NV9096_CTRL_GET_ZBC_CLEAR_TABLE_PARAMS *pGetZBCClearTableParams); + +NV_STATUS zbcapiCtrlCmdSetZbcClearTable_IMPL(struct ZbcApi *pZbcApi, NV9096_CTRL_SET_ZBC_CLEAR_TABLE_PARAMS *pSetZBCClearTableParams); + +NV_STATUS zbcapiCtrlCmdSetZbcStencilClear_IMPL(struct ZbcApi *pZbcApi, NV9096_CTRL_SET_ZBC_STENCIL_CLEAR_PARAMS *pSetZBCClearParams); + +NV_STATUS zbcapiCtrlCmdGetZbcClearTableSize_VF(struct ZbcApi *pZbcApi, NV9096_CTRL_GET_ZBC_CLEAR_TABLE_SIZE_PARAMS *pGetZBCClearTableSizeParams); + +static inline NV_STATUS zbcapiCtrlCmdGetZbcClearTableSize_5baef9(struct ZbcApi *pZbcApi, NV9096_CTRL_GET_ZBC_CLEAR_TABLE_SIZE_PARAMS *pGetZBCClearTableSizeParams) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } +NV_STATUS zbcapiCtrlCmdGetZbcClearTableEntry_IMPL(struct ZbcApi *pZbcApi, NV9096_CTRL_GET_ZBC_CLEAR_TABLE_ENTRY_PARAMS *pGetZBCClearTableEntryParams); + static inline NV_STATUS __nvoc_zbcapiConstruct(struct ZbcApi *arg_pZbcApi, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams) { return zbcapiConstructHal(arg_pZbcApi, arg_pCallContext, arg_pParams); } diff --git a/src/nvidia/generated/rmconfig.h b/src/nvidia/generated/rmconfig.h index 6543de04c3..f0b7aa51e7 100644 --- a/src/nvidia/generated/rmconfig.h +++ b/src/nvidia/generated/rmconfig.h @@ -146,6 +146,7 @@ #define RMCFG_CHIP_ALL_CHIPS 1 #define RMCFG_CHIP_ALL_CHIPS_CLASSIC_GPUS 1 #define RMCFG_CHIP_DISPLAYLESS 1 +#define RMCFG_CHIP_DISPLAYLESS_CLASSIC_GPUS 1 #define RMCFG_CHIP_dKEPLER 0 #define RMCFG_CHIP_DKEPLER 0 #define RMCFG_CHIP_KEPLER 0 @@ -197,10 +198,10 @@ #define RMCFG_CHIP_tPASCAL 0 #define RMCFG_CHIP_TPASCAL 0 #define RMCFG_CHIP_PASCAL_TEGRA_BIG_GPUS 0 +#define RMCFG_CHIP_DISPLAYLESS_TEGRA_BIG_GPUS 0 #define RMCFG_CHIP_tVOLTA 0 #define RMCFG_CHIP_TVOLTA 0 #define RMCFG_CHIP_VOLTA_TEGRA_BIG_GPUS 0 -#define RMCFG_CHIP_TEGRA_DISP_TEGRA_BIG_GPUS 0 #define RMCFG_CHIP_TURING_TEGRA_BIG_GPUS 0 #define RMCFG_CHIP_T23X 0 #define RMCFG_CHIP_T23X_TEGRA_BIG_GPUS 0 @@ -246,7 +247,7 @@ #define RMCFG_FEATURE_RMCORE_BASE 1 // RMCORE Base #define RMCFG_FEATURE_KERNEL_RM 1 // Kernel layer of RM #define RMCFG_FEATURE_ORIN_PHYSICAL_RM 1 // Physical layer of RM, disabled only on Orin -#define RMCFG_FEATURE_VGPU_GSP_PLUGIN_OFFLOAD 1 // vGPU GSP plugin offload +#define RMCFG_FEATURE_GSP_MNOC_STOPGAP 1 // Stopgap for MNOC support using the baremetal driver #define RMCFG_FEATURE_SLINEXT 1 #define RMCFG_FEATURE_NOTEBOOK 1 // Notebook support #define RMCFG_FEATURE_EXTDEV 1 // Daughter boards connected to Quadro GPUs @@ -261,8 +262,7 @@ #define RMCFG_FEATURE_HOTPLUG_POLLING 0 // HotPlug polling #define RMCFG_FEATURE_MULTI_GPU 1 // Multiple GPUs managed by same RM instance #define RMCFG_FEATURE_RM_BASIC_LOCK_MODEL 1 // Support for Basic Lock Model in RM -#define RMCFG_FEATURE_VIRTUALIZATION 0 // Detection and Guest RM Implementation within a Virtualization environment -#define RMCFG_FEATURE_VIRTUALIZATION_LEGACY 0 // aka VIRTUALIZATION +#define RMCFG_FEATURE_VIRTUALIZATION_LEGACY 0 // Virtualization legacy feature (pre-vGPU-GSP) #define RMCFG_FEATURE_PRESILICON 0 // For builds that can run on simulated or emulated GPU #define RMCFG_FEATURE_GSP_CLIENT_RM 1 // GSP client RM #define RMCFG_FEATURE_DCE_CLIENT_RM 0 // DCE client RM @@ -284,7 +284,6 @@ #define RMCFG_FEATURE_HWBC 1 // Enables support bridge chip devices #define RMCFG_FEATURE_SPARSE_TEXTURE 1 // Enables optimization and defaults for sparse texture #define RMCFG_FEATURE_CFGEX_PERF_MODE 1 // legacy support for performance modes -#define RMCFG_FEATURE_TILED_RESOURCE_COMPR 1 #define RMCFG_FEATURE_SYNC_GPU_BOOST 1 // Synchronized GPU Boost #define RMCFG_FEATURE_NVSR_ON_NVDISPLAY 1 // NVSR on Nvdisplay #define RMCFG_FEATURE_MODS_FEATURES 0 // Flag for enabling MODS required features in RM @@ -300,6 +299,8 @@ #define RMCFG_FEATURE_NVLINK_ERROR_THRESHOLD 1 // Support for NVLINK_ERROR_THRESHOLD #define RMCFG_FEATURE_GSP_SEC2_ENC_CHNLMGMT_RC_WAR 1 // WAR required for RC handling. See comment #36 of bug 4406277 #define RMCFG_FEATURE_FABRIC_LINEAR_ADDRESSING 1 // Unicast fabric memory management +#define RMCFG_FEATURE_GSP_RM_TRACE_RATS 1 +#define RMCFG_FEATURE_TEGRA_BPMP 0 // Tegra BPMP integration @@ -371,6 +372,7 @@ #define RMCFG_CLASS_NV01_TIMER 1 #define RMCFG_CLASS_NV1_TIMER 1 // aka NV01_TIMER #define RMCFG_CLASS_KERNEL_GRAPHICS_CONTEXT 1 // Graphics Context in Kernel side +#define RMCFG_CLASS_LOCK_STRESS_OBJECT 1 // Lock Stress Testing Object #define RMCFG_CLASS_NV50_CHANNEL_GPFIFO 1 #define RMCFG_CLASS_GF100_CHANNEL_GPFIFO 1 #define RMCFG_CLASS_KEPLER_CHANNEL_GPFIFO_A 1 @@ -661,7 +663,6 @@ #define RMCFG_MODULE_GPUMGR 1 // GPU Manager object #define RMCFG_MODULE_HEAP 1 // Heap Engine Object #define RMCFG_MODULE_BRIGHTC 1 // Backlight brightness control module -#define RMCFG_MODULE_GSYNCMGR 0 // GSYNC Manager #define RMCFG_MODULE_OD 0 // Display component: Output Device #define RMCFG_MODULE_DFP 0 // Display component: Display Flat Panel #define RMCFG_MODULE_CRT 0 // Display component: Cathode ray tube diff --git a/src/nvidia/inc/kernel/core/locks.h b/src/nvidia/inc/kernel/core/locks.h index 2f84bf13d6..e49ff15b01 100644 --- a/src/nvidia/inc/kernel/core/locks.h +++ b/src/nvidia/inc/kernel/core/locks.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -106,14 +106,12 @@ typedef struct #define GPUS_LOCK_FLAGS_NONE (0x00000000) // conditional acquire; if lock is already held then return error #define GPU_LOCK_FLAGS_COND_ACQUIRE NVBIT(0) -// acquire the lock in read (shared) mode, if applicable -#define GPU_LOCK_FLAGS_READ NVBIT(1) // Attempt acquire even if it potentially violates the locking order // But do not block in a way that could cause a deadlock -#define GPU_LOCK_FLAGS_SAFE_LOCK_UPGRADE NVBIT(2) +#define GPU_LOCK_FLAGS_SAFE_LOCK_UPGRADE NVBIT(1) // Additionally acquire the GPU alloc lock (implied if locking all GPUs) // to prevent the set of lockable GPUs from changing -#define GPU_LOCK_FLAGS_LOCK_ALLOC NVBIT(3) +#define GPU_LOCK_FLAGS_LOCK_ALLOC NVBIT(2) // // RM Lock Related Functions diff --git a/src/nvidia/inc/kernel/core/prelude.h b/src/nvidia/inc/kernel/core/prelude.h index 02c746a69d..fa6d9efca8 100644 --- a/src/nvidia/inc/kernel/core/prelude.h +++ b/src/nvidia/inc/kernel/core/prelude.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -81,7 +81,6 @@ typedef struct THREAD_STATE_NODE THREAD_STATE_NODE; // FW declare thread state #define NV_ROUNDUP(a,b) ((NV_CEIL(a,b))*(b)) #define NV_ROUND_TO_QUANTA(a, quanta) (((quanta) == 0) ? (a): ((((a) + ((quanta) >> 1)) / (quanta)) * (quanta))) #define NV_FLOOR_TO_QUANTA(a, quanta) (((a) / (quanta)) * (quanta)) -#define NV_ARRAY_ELEMENTS(x) ((sizeof(x)/sizeof((x)[0]))) #define NV_BYTESWAP16(a) ((((a) & 0xff00)>>8) | \ (((a) & 0x00ff)<<8)) #define NV_BYTESWAP32(a) ((((a) & 0xff000000)>>24) | \ diff --git a/src/nvidia/inc/kernel/gpu/conf_compute/ccsl_context.h b/src/nvidia/inc/kernel/gpu/conf_compute/ccsl_context.h index 67c9070abe..5b8cc7f175 100644 --- a/src/nvidia/inc/kernel/gpu/conf_compute/ccsl_context.h +++ b/src/nvidia/inc/kernel/gpu/conf_compute/ccsl_context.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -53,6 +53,9 @@ struct ccslContext_t NvU64 keyHandleOut; void *openrmCtx; + + MEMORY_DESCRIPTOR *pMemDesc; + volatile CC_CRYPTOBUNDLE_STATS *pEncStatsBuffer; }; typedef struct ccslContext_t *pCcslContext; diff --git a/src/nvidia/inc/kernel/gpu/gpu_child_list.h b/src/nvidia/inc/kernel/gpu/gpu_child_list.h index c4d7feb2f2..0bd4b6fefb 100644 --- a/src/nvidia/inc/kernel/gpu/gpu_child_list.h +++ b/src/nvidia/inc/kernel/gpu/gpu_child_list.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2004-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2004-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/inc/kernel/gpu/gpu_fabric_probe.h b/src/nvidia/inc/kernel/gpu/gpu_fabric_probe.h index f55bdcdb30..990f12f217 100644 --- a/src/nvidia/inc/kernel/gpu/gpu_fabric_probe.h +++ b/src/nvidia/inc/kernel/gpu/gpu_fabric_probe.h @@ -35,10 +35,13 @@ #define GPU_FABRIC_PROBE_DEFAULT_PROBE_SLOWDOWN_THRESHOLD 10 typedef struct GPU_FABRIC_PROBE_INFO_KERNEL GPU_FABRIC_PROBE_INFO_KERNEL; +typedef struct GPU_FABRIC_PROBE_INFO_PHYSICAL GPU_FABRIC_PROBE_INFO_PHYSICAL; NV_STATUS gpuFabricProbeStart(OBJGPU *pGpu, GPU_FABRIC_PROBE_INFO_KERNEL **ppGpuFabricProbeInfoKernel); void gpuFabricProbeStop(GPU_FABRIC_PROBE_INFO_KERNEL *pGpuFabricProbeInfoKernel); +void gpuFabricProbeStopPhysical(GPU_FABRIC_PROBE_INFO_PHYSICAL *pGpuFabricProbeInfoPhysical, + NvU32 gfId); void gpuFabricProbeSuspend(GPU_FABRIC_PROBE_INFO_KERNEL *pGpuFabricProbeInfoKernel); NV_STATUS gpuFabricProbeResume(GPU_FABRIC_PROBE_INFO_KERNEL *pGpuFabricProbeInfoKernel); @@ -52,7 +55,6 @@ NV_STATUS gpuFabricProbeGetGpaAddress(GPU_FABRIC_PROBE_INFO_KERNEL *pInfo, NvU64 NV_STATUS gpuFabricProbeGetGpaAddressRange(GPU_FABRIC_PROBE_INFO_KERNEL *pInfo, NvU64 *pGpaAddressRange); NV_STATUS gpuFabricProbeGetFlaAddress(GPU_FABRIC_PROBE_INFO_KERNEL *pInfo, NvU64 *pFlaAddress); NV_STATUS gpuFabricProbeGetFlaAddressRange(GPU_FABRIC_PROBE_INFO_KERNEL *pInfo, NvU64 *pFlaAddressRange); -NV_STATUS gpuFabricProbeGetEgmGpaAddress(GPU_FABRIC_PROBE_INFO_KERNEL *pInfo, NvU64 *pEgmGpaAddress); NV_STATUS gpuFabricProbeGetNumProbeReqs(GPU_FABRIC_PROBE_INFO_KERNEL *pInfo, NvU64 *numProbes); NV_STATUS gpuFabricProbeGetFabricCliqueId(GPU_FABRIC_PROBE_INFO_KERNEL *pInfo, NvU32 *pFabricCliqueId); NV_STATUS gpuFabricProbeGetFabricHealthStatus(GPU_FABRIC_PROBE_INFO_KERNEL *pInfo, NvU32 *pFabricHealthStatusMask); @@ -72,6 +74,6 @@ NV_STATUS gpuFabricProbeReceivePhysicalCallback(NvU32 gpuInstance, NvU64 *pNotif NV2080_CTRL_NVLINK_INBAND_RECEIVED_DATA_PARAMS *pInbandRcvParams); NV_STATUS gpuFabricProbeReceiveUpdatePhysicalCallback(NvU32 gpuInstance, NvU64 *pNotifyGfIdMask, NV2080_CTRL_NVLINK_INBAND_RECEIVED_DATA_PARAMS *pInbandRcvParams); - +NV_STATUS gpuFabricProbeGetGfid(OBJGPU *pGpu, NvU32 *pGfid); #endif // GPU_FABRIC_PROBE_H diff --git a/src/nvidia/inc/kernel/gpu/gpu_shared_data_map.h b/src/nvidia/inc/kernel/gpu/gpu_shared_data_map.h index 4727574451..ef8bb7b3c2 100644 --- a/src/nvidia/inc/kernel/gpu/gpu_shared_data_map.h +++ b/src/nvidia/inc/kernel/gpu/gpu_shared_data_map.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/inc/kernel/gpu/gpu_timeout.h b/src/nvidia/inc/kernel/gpu/gpu_timeout.h index 315d8802ca..fe3a6aa9ee 100644 --- a/src/nvidia/inc/kernel/gpu/gpu_timeout.h +++ b/src/nvidia/inc/kernel/gpu/gpu_timeout.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2004-2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2004-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/inc/kernel/gpu/gsp/gsp_init_args.h b/src/nvidia/inc/kernel/gpu/gsp/gsp_init_args.h index 7f22383d95..20130d4b57 100644 --- a/src/nvidia/inc/kernel/gpu/gsp/gsp_init_args.h +++ b/src/nvidia/inc/kernel/gpu/gsp/gsp_init_args.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -26,17 +26,11 @@ #include "core/core.h" -typedef struct { - RmPhysAddr cmdQueuePhysAddr; -} GSP_RMFS_INIT_ARGUMENTS; - typedef struct { RmPhysAddr sharedMemPhysAddr; NvU32 pageTableEntryCount; NvLength cmdQueueOffset; NvLength statQueueOffset; - NvLength locklessCmdQueueOffset; - NvLength locklessStatQueueOffset; } MESSAGE_QUEUE_INIT_ARGUMENTS; typedef struct { diff --git a/src/nvidia/inc/kernel/gpu/gsp/gsp_static_config.h b/src/nvidia/inc/kernel/gpu/gsp/gsp_static_config.h index b0ca40280d..fb0ecf5934 100644 --- a/src/nvidia/inc/kernel/gpu/gsp/gsp_static_config.h +++ b/src/nvidia/inc/kernel/gpu/gsp/gsp_static_config.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -67,6 +67,13 @@ typedef struct GspSMInfo_t NvU32 rtCoreCount; } GspSMInfo; +typedef struct +{ + NvU32 ecidLow; + NvU32 ecidHigh; + NvU32 ecidExtended; +} EcidManufacturingInfo; + // Fetched from GSP-RM into CPU-RM typedef struct GspStaticConfigInfo_t { @@ -88,10 +95,10 @@ typedef struct GspStaticConfigInfo_t NvBool poisonFuseEnabled; NvU64 fb_length; - NvU32 fbio_mask; + NvU64 fbio_mask; NvU32 fb_bus_width; NvU32 fb_ram_type; - NvU32 fbp_mask; + NvU64 fbp_mask; NvU32 l2_cache_size; NvU32 gfxpBufferSize[NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_CONTEXT_POOL]; @@ -110,9 +117,24 @@ typedef struct GspStaticConfigInfo_t NvBool bIsTesla; NvBool bIsMobile; NvBool bIsGc6Rtd3Allowed; + NvBool bIsGc8Rtd3Allowed; NvBool bIsGcOffRtd3Allowed; NvBool bIsGcoffLegacyAllowed; + /* "Total Board Power" refers to power requirement of GPU, + * while in GC6 state. Majority of this power will be used + * to keep V-RAM active to preserve its content.
 * Some energy maybe consumed by Always-on components on GPU chip. + * This power will be provided by 3.3v voltage rail. + */ + NvU16 RTD3GC6TotalBoardPower; + + /* PERST# (i.e. PCI Express Reset) is a sideband signal + * generated by the PCIe Host to indicate the PCIe devices, + * that the power-rails and the reference-clock are stable. + * The endpoint device typically uses this signal as a global reset. + */ + NvU16 RTD3GC6PerstDelay; + NvU64 bar1PdeBase; NvU64 bar2PdeBase; @@ -143,6 +165,8 @@ typedef struct GspStaticConfigInfo_t NvBool bAtsSupported; NvBool bIsGpuUefi; + + EcidManufacturingInfo ecidInfo; } GspStaticConfigInfo; // Pushed from CPU-RM to GSP-RM @@ -151,6 +175,7 @@ typedef struct GspSystemInfo NvU64 gpuPhysAddr; NvU64 gpuPhysFbAddr; NvU64 gpuPhysInstAddr; + NvU64 gpuPhysIoAddr; NvU64 nvDomainBusDeviceFunc; NvU64 simAccessBufPhysAddr; NvU64 notifyOpSharedSurfacePhysAddr; @@ -159,6 +184,9 @@ typedef struct GspSystemInfo NvU64 maxUserVa; NvU32 pciConfigMirrorBase; NvU32 pciConfigMirrorSize; + NvU32 PCIDeviceID; + NvU32 PCISubDeviceID; + NvU32 PCIRevisionID; NvU8 oorArch; NvU64 clPdbProperties; NvU32 Chipset; @@ -179,8 +207,10 @@ typedef struct GspSystemInfo NvBool bIsPassthru; NvU64 sysTimerOffsetNs; GSP_VF_INFO gspVFInfo; + NvBool bIsPrimary; NvBool isGridBuild; NvU32 gridBuildCsp; + NvBool bPreserveVideoMemoryAllocations; } GspSystemInfo; diff --git a/src/nvidia/inc/kernel/gpu/gsp/gsp_trace_rats_macro.h b/src/nvidia/inc/kernel/gpu/gsp/gsp_trace_rats_macro.h index 3f415c379a..3d704c8272 100644 --- a/src/nvidia/inc/kernel/gpu/gsp/gsp_trace_rats_macro.h +++ b/src/nvidia/inc/kernel/gpu/gsp/gsp_trace_rats_macro.h @@ -35,7 +35,10 @@ #define GSP_TRACING_RATS_ENABLED 0 #define GSP_TRACE_RATS_ADD_RECORD(recordIdentifier, pGpu, info) (void) 0 -#define KERNEL_GSP_TRACING_RATS_ENABLED 0 +#include "kernel/gpu/gsp/kernel_gsp_trace_rats.h" +#include "class/cl90cdtrace.h" + +#define KERNEL_GSP_TRACING_RATS_ENABLED 1 #ifndef GET_RATS_TIMESTAMP_NS #define GET_RATS_TIMESTAMP_NS() NV_ASSERT(0) diff --git a/src/nvidia/inc/kernel/gpu/gsp/kernel_gsp_trace_rats.h b/src/nvidia/inc/kernel/gpu/gsp/kernel_gsp_trace_rats.h new file mode 100644 index 0000000000..1726d22f1c --- /dev/null +++ b/src/nvidia/inc/kernel/gpu/gsp/kernel_gsp_trace_rats.h @@ -0,0 +1,59 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef KERNEL_RATS_GSP_TRACE_H +#define KERNEL_RATS_GSP_TRACE_H + +#include "core/core.h" +#include "containers/multimap.h" +#include "class/cl90cdtrace.h" +#include "rmapi/event_buffer.h" + +typedef struct +{ + EventBuffer *pEventBuffer; + NvHandle hClient; + NvHandle hNotifier; + NvHandle hEventBuffer; + NvU64 pUserInfo; +} NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE; + +MAKE_MULTIMAP(GspTraceEventBufferBindMultiMap, NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE); + +void gspTraceNotifyAllConsumers(OBJGPU *pGpu, void *pArgs); + +void gspTraceEventBufferLogRecord(OBJGPU *pGpu, NV_RATS_GSP_TRACE_RECORD *intrTraceRecord); + +NV_STATUS gspTraceAddBindpoint(OBJGPU *pGpu, + RsClient *pClient, + RsResourceRef *pEventBufferRef, + NvHandle hNotifier, + NvU64 tracepointMask, + NvU32 gspLoggingBufferSize, + NvU32 gspLoggingBufferWatermark); + +void gspTraceRemoveBindpoint(OBJGPU *pGpu, NvU64 uid, NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE* pBind); + +void gspTraceRemoveAllBindpoints(EventBuffer *pEventBuffer); + +#endif diff --git a/src/nvidia/inc/kernel/gpu/gsp/message_queue.h b/src/nvidia/inc/kernel/gpu/gsp/message_queue.h index e3128e2930..91193dd43b 100644 --- a/src/nvidia/inc/kernel/gpu/gsp/message_queue.h +++ b/src/nvidia/inc/kernel/gpu/gsp/message_queue.h @@ -29,8 +29,7 @@ // Used for indexing into the MESSAGE_QUEUE_COLLECTION array. #define RPC_TASK_RM_QUEUE_IDX 0 -#define RPC_TASK_ISR_QUEUE_IDX 1 -#define RPC_QUEUE_COUNT 2 +#define RPC_QUEUE_COUNT 1 typedef struct _message_queue_info MESSAGE_QUEUE_INFO; typedef struct MESSAGE_QUEUE_COLLECTION MESSAGE_QUEUE_COLLECTION; diff --git a/src/nvidia/inc/kernel/gpu/intr/engine_idx.h b/src/nvidia/inc/kernel/gpu/intr/engine_idx.h index 7e119fa042..c0c7db2f92 100644 --- a/src/nvidia/inc/kernel/gpu/intr/engine_idx.h +++ b/src/nvidia/inc/kernel/gpu/intr/engine_idx.h @@ -152,8 +152,12 @@ #define MC_ENGINE_IDX_PXUC 168 #define MC_ENGINE_IDX_SYSLTC 169 #define MC_ENGINE_IDX_LRCC 170 +#define MC_ENGINE_IDX_RESERVED171 171 +#define MC_ENGINE_IDX_RESERVED172 172 +#define MC_ENGINE_IDX_RESERVED173 173 +#define MC_ENGINE_IDX_RESERVED174 174 // This must be kept as the max bit if we need to add more engines -#define MC_ENGINE_IDX_MAX 171 +#define MC_ENGINE_IDX_MAX 175 // Index GR reference #define MC_ENGINE_IDX_GRn(x) (MC_ENGINE_IDX_GR0 + (x)) @@ -178,7 +182,7 @@ ((MC_ENGINE_IDX_CE(0) <= (x)) && ((x) <= MC_ENGINE_IDX_CE_MAX)) // Index OFA reference -#define MC_ENGINE_IDX_OFA(x) (MC_ENGINE_IDX_OFA0 + (x)) +#define MC_ENGINE_IDX_OFA(x) (MC_ENGINE_IDX_OFA0 + (x)) MAKE_BITVECTOR(MC_ENGINE_BITVECTOR, MC_ENGINE_IDX_MAX); typedef MC_ENGINE_BITVECTOR *PMC_ENGINE_BITVECTOR; diff --git a/src/nvidia/inc/kernel/gpu/kern_gpu_power.h b/src/nvidia/inc/kernel/gpu/kern_gpu_power.h index 1cf504fb8f..138ec7d210 100644 --- a/src/nvidia/inc/kernel/gpu/kern_gpu_power.h +++ b/src/nvidia/inc/kernel/gpu/kern_gpu_power.h @@ -42,35 +42,15 @@ typedef enum typedef struct { NvU32 refCount; + NvU16 GC6PerstDelay; // waiting time for Upstream Port of GPU, + // before asserting perst# signal, + // during RTD3/GC6 Entry. + NvU16 GC6TotalBoardPower; // Power required by GPU to sustain RTD3/GC6. GPU_GC6_STATE currentState; NvU32 executedStepMask; // step mask executed during entry sequence NvU32 stepMask[NV2080_CTRL_GC6_FLAVOR_ID_MAX]; // step mask cache } _GPU_GC6_STATE; -// GPU event mask operation -#define GC6_REFCOUNT_MASK_SET(pGpu, refCountBit) \ - do \ - { \ - if (pGpu != NULL) \ - { \ - ((pGpu->gc6State.refCountMask) |= (NVBIT(refCountBit))); \ - } \ - } while(0) - -#define GC6_REFCOUNT_MASK_CLEAR(pGpu, refCountBit) \ - do \ - { \ - if (pGpu != NULL) \ - { \ - ((pGpu->gc6State.refCountMask) &= ~(NVBIT(refCountBit))); \ - } \ - } while(0) - -#define GC6_REFCOUNT_MASK_GET_FROM_EVENT(event) ((event / 2)) - -// GC6 related defines -#define GC6_FB_CLAMP_TIMEOUT_MS 10 - // Macros for GPU_GC6_STATE #define IS_GPU_GC6_STATE_POWERED_ON(obj) (obj->gc6State.currentState == GPU_GC6_STATE_POWERED_ON) #define IS_GPU_GC6_STATE_EXITED(obj) (obj->gc6State.currentState == GPU_GC6_STATE_EXITED) diff --git a/src/nvidia/inc/kernel/gpu/mem_mgr/ce_utils_sizes.h b/src/nvidia/inc/kernel/gpu/mem_mgr/ce_utils_sizes.h index 5c13801f82..a6ce5d5359 100644 --- a/src/nvidia/inc/kernel/gpu/mem_mgr/ce_utils_sizes.h +++ b/src/nvidia/inc/kernel/gpu/mem_mgr/ce_utils_sizes.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -33,7 +33,7 @@ #define CE_MAX_BYTES_PER_LINE 0xffffffffULL #define CE_METHOD_SIZE_PER_BLOCK 0x64 -#define FAST_SCRUBBER_METHOD_SIZE_PER_BLOCK 0x94 +#define FAST_SCRUBBER_METHOD_SIZE_PER_BLOCK 0x78 // number of bytes per sec2 method-stream (including host methods) #define SEC2_METHOD_SIZE_PER_BLOCK 0x94 diff --git a/src/nvidia/inc/kernel/gpu/mem_mgr/channel_utils.h b/src/nvidia/inc/kernel/gpu/mem_mgr/channel_utils.h index 539cd3c820..3d657a18f5 100644 --- a/src/nvidia/inc/kernel/gpu/mem_mgr/channel_utils.h +++ b/src/nvidia/inc/kernel/gpu/mem_mgr/channel_utils.h @@ -130,12 +130,6 @@ typedef struct NV_ADDRESS_SPACE srcAddressSpace; NvU32 dstCpuCacheAttrib; NvU32 srcCpuCacheAttrib; - - NvBool bSecureCopy; // The copy encrypts/decrypts protected memory - NvBool bEncrypt; // encrypt/decrypt - NvU64 authTagAddr; - NvU64 encryptIvAddr; - } CHANNEL_PB_INFO; NV_STATUS channelSetupIDs(OBJCHANNEL *pChannel, OBJGPU *pGpu, NvBool bUseVasForCeCopy, NvBool bMIGInUse); diff --git a/src/nvidia/inc/kernel/gpu/mem_mgr/phys_mem_allocator/map_defines.h b/src/nvidia/inc/kernel/gpu/mem_mgr/phys_mem_allocator/map_defines.h index 239e74cf10..ce7ecaf6e9 100644 --- a/src/nvidia/inc/kernel/gpu/mem_mgr/phys_mem_allocator/map_defines.h +++ b/src/nvidia/inc/kernel/gpu/mem_mgr/phys_mem_allocator/map_defines.h @@ -35,11 +35,17 @@ #endif +#if defined(SRT_BUILD) +#define RMCFG_MODULE_x 1 +#define RMCFG_FEATURE_x 1 +#else +#include "rmconfig.h" +#endif + #ifdef __cplusplus extern "C" { #endif - // Default page size 64KB #define PMA_GRANULARITY 0x10000 #define PMA_PAGE_SHIFT 16 @@ -71,6 +77,7 @@ typedef NvU32 PMA_PAGESTATUS; #define ATTRIB_PERSISTENT NVBIT(MAP_IDX_PERSISTENT) #define ATTRIB_NUMA_REUSE NVBIT(MAP_IDX_NUMA_REUSE) #define ATTRIB_BLACKLIST NVBIT(MAP_IDX_BLACKLIST) + #define ATTRIB_MASK (ATTRIB_EVICTING | ATTRIB_SCRUBBING \ | ATTRIB_PERSISTENT | ATTRIB_NUMA_REUSE \ | ATTRIB_BLACKLIST) @@ -79,6 +86,7 @@ typedef NvU32 PMA_PAGESTATUS; #define PMA_STATE_BITS_PER_PAGE 2 // Alloc & pinned state #define PMA_ATTRIB_BITS_PER_PAGE 5 // Persistence, Scrubbing, Evicting, Reuse & Blacklisting attributes + #define PMA_BITS_PER_PAGE (PMA_STATE_BITS_PER_PAGE + PMA_ATTRIB_BITS_PER_PAGE) // diff --git a/src/nvidia/inc/kernel/gpu/mem_mgr/phys_mem_allocator/phys_mem_allocator.h b/src/nvidia/inc/kernel/gpu/mem_mgr/phys_mem_allocator/phys_mem_allocator.h index ef1b338ec2..7898f0bea2 100644 --- a/src/nvidia/inc/kernel/gpu/mem_mgr/phys_mem_allocator/phys_mem_allocator.h +++ b/src/nvidia/inc/kernel/gpu/mem_mgr/phys_mem_allocator/phys_mem_allocator.h @@ -46,6 +46,7 @@ #if defined(SRT_BUILD) #define RMCFG_MODULE_x 1 +#define RMCFG_FEATURE_x 1 #else #include "rmconfig.h" #endif diff --git a/src/nvidia/inc/kernel/gpu/subdevice/subdevice_ctrl_ccu_internal.h b/src/nvidia/inc/kernel/gpu/subdevice/subdevice_ctrl_ccu_internal.h index 69cc9e8ee1..36293f87df 100644 --- a/src/nvidia/inc/kernel/gpu/subdevice/subdevice_ctrl_ccu_internal.h +++ b/src/nvidia/inc/kernel/gpu/subdevice/subdevice_ctrl_ccu_internal.h @@ -33,3 +33,7 @@ RMCTRL_FLAGS(KERNEL_PRIVILEGED, ROUTE_TO_PHYSICAL, INTERNAL)) NV_STATUS subdeviceCtrlCmdCcuSetStreamState(Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CCU_STREAM_STATE_PARAMS *pParams); + RMCTRL_EXPORT(NV2080_CTRL_CMD_INTERNAL_CCU_GET_SAMPLE_INFO, + RMCTRL_FLAGS(KERNEL_PRIVILEGED, ROUTE_TO_PHYSICAL, INTERNAL)) + NV_STATUS subdeviceCtrlCmdCcuGetSampleInfo(Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_CCU_SAMPLE_INFO_PARAMS *pParams); + diff --git a/src/nvidia/inc/kernel/gpu/subdevice/subdevice_ctrl_rc.h b/src/nvidia/inc/kernel/gpu/subdevice/subdevice_ctrl_rc.h index ee8ce71e9f..36d4525743 100644 --- a/src/nvidia/inc/kernel/gpu/subdevice/subdevice_ctrl_rc.h +++ b/src/nvidia/inc/kernel/gpu/subdevice/subdevice_ctrl_rc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2019-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/inc/kernel/gpuvideo/video_event.h b/src/nvidia/inc/kernel/gpuvideo/video_event.h index 9c8cbb89b9..a419e36e1e 100644 --- a/src/nvidia/inc/kernel/gpuvideo/video_event.h +++ b/src/nvidia/inc/kernel/gpuvideo/video_event.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -200,6 +200,9 @@ typedef struct #define VIDEO_ENGINE_EVENT__LOG_DATA_SIZE(s) (sizeof(VIDEO_ENGINE_EVENT__RECORD) + s.event_log_data.size) +#define VIDEO_ENGINE_EVENT__TRACE_ADDR__OFFSET_LO (0xF90UL) +#define VIDEO_ENGINE_EVENT__TRACE_ADDR__OFFSET_HI (0xF94UL) + /*! * Client information passing down by RM and saved at offset VIDEO_ENGINE_EVENT__LOG_INFO__OFFSET * with the size of VIDEO_ENGINE_EVENT__LOG_INFO__SIZE in context allocation. diff --git a/src/nvidia/inc/kernel/gpuvideo/videoeventlist.h b/src/nvidia/inc/kernel/gpuvideo/videoeventlist.h index 12d1ed21d2..8da248dc60 100644 --- a/src/nvidia/inc/kernel/gpuvideo/videoeventlist.h +++ b/src/nvidia/inc/kernel/gpuvideo/videoeventlist.h @@ -21,6 +21,7 @@ * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_videoeventlist_nvoc.h" #ifndef VIDEO_EVENT_LIST_H diff --git a/src/nvidia/inc/kernel/mem_mgr/p2p.h b/src/nvidia/inc/kernel/mem_mgr/p2p.h index cc2d1b17e2..7f1df5a6a2 100644 --- a/src/nvidia/inc/kernel/mem_mgr/p2p.h +++ b/src/nvidia/inc/kernel/mem_mgr/p2p.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -28,10 +28,10 @@ NV_STATUS RmP2PGetPages (NvU64, NvU32, NvU64, NvU64, NvU64 *, NvU32 *, NvU32 *, NvU32 *, OBJGPU **, void *, void (*)(void *), void *); NV_STATUS RmP2PGetPagesWithoutCallbackRegistration (NvU64, NvU32, NvU64, NvU64, NvU64 *, NvU32 *, NvU32 *, NvU32 *, OBJGPU **, void *); -NV_STATUS RmP2PGetPagesPersistent (NvU64, NvU64, void **, NvU64 *, NvU32 *, void *, void *); +NV_STATUS RmP2PGetPagesPersistent (NvU64, NvU64, void **, NvU64 *, NvU32 *, void *, void *, void **); NV_STATUS RmP2PRegisterCallback (NvU64, NvU64, NvU64, void *, void (*)(void *), void *); NV_STATUS RmP2PPutPages (NvU64, NvU32, NvU64, void *); NV_STATUS RmP2PGetGpuByAddress (NvU64, NvU64, OBJGPU **); -NV_STATUS RmP2PPutPagesPersistent (void *, void *); +NV_STATUS RmP2PPutPagesPersistent (void *, void *, void *); #endif diff --git a/src/nvidia/inc/kernel/os/os_stub.h b/src/nvidia/inc/kernel/os/os_stub.h index 37ad642411..ca35e50d70 100644 --- a/src/nvidia/inc/kernel/os/os_stub.h +++ b/src/nvidia/inc/kernel/os/os_stub.h @@ -39,14 +39,9 @@ OSnv_rdcr4 stubOsnv_rdcr4; OSnv_rdxcr0 stubOsnv_rdxcr0; OSnv_cpuid stubOsnv_cpuid; -OSnv_rdmsr stubOsnv_rdmsr; -OSnv_wrmsr stubOsnv_wrmsr; OSSpinLoop stubOsSpinLoop; OSSetSurfaceName stubOsSetSurfaceName; OSObjectEventNotification stubOsObjectEventNotification; -OSPageArrayGetPhysAddr stubOsPageArrayGetPhysAddr; -OSInternalReserveFreeCallback stubOsInternalReserveFreeCallback; -OSInternalReserveAllocCallback stubOsInternalReserveAllocCallback; #endif // OS_STUB_H diff --git a/src/nvidia/inc/kernel/platform/hwbc.h b/src/nvidia/inc/kernel/platform/hwbc.h index c99f81e90e..a426ff8576 100644 --- a/src/nvidia/inc/kernel/platform/hwbc.h +++ b/src/nvidia/inc/kernel/platform/hwbc.h @@ -26,11 +26,6 @@ #include "gpu/gpu.h" // NBADDR, POBJGPU -// HWBC_UPSTREAM_BUS_SPEED commands -#define HWBC_UPSTREAM_BUS_SPEED_GEN1PCIE 1 -#define HWBC_UPSTREAM_BUS_SPEED_GEN2PCIE 2 -#define HWBC_UPSTREAM_BUS_SPEED_GEN3PCIE 3 - /**************** Resource Manager Defines and Structures ******************\ * * * Module: HWBC.H * @@ -40,36 +35,11 @@ struct OBJCL; typedef struct OBJHWBC *POBJHWBC; typedef struct OBJHWBC OBJHWBC; -typedef struct HWBC_APERTURE *PHWBC_APERTURE; -typedef struct HWBC_APERTURE HWBC_APERTURE; - -// These values define maximum number of targets/apertures to be supported in -// the OBJHWBC object. -#define NUM_HWBC_TARGETS 4 -#define NUM_HWBC_APERTURES 3 - -#define PCI_P2P_PRE_BL 0x00000024 /* RW-4R */ -#define PCI_P2P_PRE_BL_B64BIT 3:0 /* C--VF */ -#define PCI_P2P_PRE_BL_B64BIT_YES 0x00000001 /* C---V */ -#define PCI_P2P_PRE_BL_PREFETCH_MEM_BASE 15:4 /* RWIUF */ -#define PCI_P2P_PRE_BL_L64BIT 19:16 /* C--VF */ -#define PCI_P2P_PRE_BL_L64BIT_YES 0x00000001 /* C---V */ -#define PCI_P2P_PRE_BL_PREFETCH_MEM_LIMIT 31:20 /* RWIUF */ -#define PCI_P2P_PRE_BU32 0x00000028 /* RW-4R */ -#define PCI_P2P_PRE_BU32_BASE_UPPER_BITS 31:0 /* RWIUF */ -#define PCI_P2P_PRE_LU32 0x0000002C /* RW-4R */ -#define PCI_P2P_PRE_LU32_LIMIT_UPPER_BITS 31:0 /* RWIUF */ - -#define BR03_REG(p, i) (p[NV_PES_XVU_ ## i / sizeof(*p)]) - -#define BR03_BAR0_SIZE (16*1024) -#define BR03_GPU_REGISTER_ALIAS_OFFSET 0x4FC000 -NvBool objClSetPcieHWBC(OBJGPU *, OBJCL*); // Find all Broadcast resource in the higher hierarchy of the GPU -// Disables ASPM on downstream ports of any BR04 A03 (or later) that is parent of device at 'bus'. -NV_STATUS Nvidia_BR04_disableDownstreamASPM(NvU8); +#define BR03_GPU_REGISTER_ALIAS_OFFSET 0x4FC000 +NvBool objClSetPcieHWBC(OBJGPU *, OBJCL*); // Find all Broadcast resource in the higher hierarchy of the GPU // // Bridge resource type @@ -104,20 +74,6 @@ struct OBJHWBC RmPhysAddr gpuPhysAddr; - // - // BR04: This array is indexed by GPU instance number. If the GPU referred - // to by that instance is not behind this BR04 -1 is stored at that index; - // if it is behind this BR04 the downstream port it's behind is stored - // there. The information is necessary to determine which BR04s must be - // involved to broadcast between some set of GPUs, and also to determine - // how to program redirection windows for unicast access. - // - NvS8 dpForGpuInstance[NV_MAX_DEVICES]; - - // For mapping state - NvS8 mappingTarget; - NvU32 mappingCount; - // Private data NvBool hasPlxFirmwareInfo; NvU32 fwVersion; diff --git a/src/nvidia/inc/kernel/platform/sli/sli.h b/src/nvidia/inc/kernel/platform/sli/sli.h index cdce96851d..01c2338a00 100644 --- a/src/nvidia/inc/kernel/platform/sli/sli.h +++ b/src/nvidia/inc/kernel/platform/sli/sli.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2000-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2000-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -31,6 +31,7 @@ #include "core/core.h" #include "nvlimits.h" +#include "nvmisc.h" #define IsDeviceDestroyed(p) (gpuGetDeviceInstance(p) == NV_MAX_DEVICES) @@ -58,7 +59,7 @@ void RmInitScalability(OBJGPU *pGpu); do { \ if (sizeof(arr) > sizeof(void *)) \ { \ - NV_ASSERT(SLI_LOOP_ARRAY_SIZE == (sizeof(arr) / sizeof(arr[0]))); \ + NV_ASSERT(SLI_LOOP_ARRAY_SIZE == NV_ARRAY_ELEMENTS(arr)); \ } \ } while (0) diff --git a/src/nvidia/inc/kernel/rmapi/control.h b/src/nvidia/inc/kernel/rmapi/control.h index 54f040f134..1a9e979d05 100644 --- a/src/nvidia/inc/kernel/rmapi/control.h +++ b/src/nvidia/inc/kernel/rmapi/control.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2004-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2004-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -198,7 +198,7 @@ NV_STATUS embeddedParamCopyOut(RMAPI_PARAM_COPY *pParamCopy, RmCtrlParams *pRmC // If the NON_PRIVILEGED flag is specified, the call will be allowed from any // client. // -#define RMCTRL_FLAGS_NON_PRIVILEGED 0x000000010 +#define RMCTRL_FLAGS_NON_PRIVILEGED 0x000000008 // // The resman rmcontrol handler will grab the per-device lock instead @@ -206,7 +206,7 @@ NV_STATUS embeddedParamCopyOut(RMAPI_PARAM_COPY *pParamCopy, RmCtrlParams *pRmC // // Please be sure you know what you're doing before using this! // -#define RMCTRL_FLAGS_GPU_LOCK_DEVICE_ONLY 0x000000040 +#define RMCTRL_FLAGS_GPU_LOCK_DEVICE_ONLY 0x000000010 // // This flag is equivalent to PRIVILEGED when the RM access rights @@ -217,19 +217,19 @@ NV_STATUS embeddedParamCopyOut(RMAPI_PARAM_COPY *pParamCopy, RmCtrlParams *pRmC // previously PRIVILEGED. Once access rights are enabled, this flag will no // longer be necessary. // -#define RMCTRL_FLAGS_PRIVILEGED_IF_RS_ACCESS_DISABLED 0x000000100 // for Resserv Access Rights migration +#define RMCTRL_FLAGS_PRIVILEGED_IF_RS_ACCESS_DISABLED 0x000000020 // for Resserv Access Rights migration // // This flag specifies that the control shall be directly forwarded to the // physical object if called on the CPU-RM kernel. // -#define RMCTRL_FLAGS_ROUTE_TO_PHYSICAL 0x000000200 +#define RMCTRL_FLAGS_ROUTE_TO_PHYSICAL 0x000000040 // // If the INTERNAL flag is specified, the call will only be allowed // to be issued from RM itself. Otherwise, NV_ERR_NOT_SUPPORTED is returned. // -#define RMCTRL_FLAGS_INTERNAL 0x000000400 +#define RMCTRL_FLAGS_INTERNAL 0x000000080 // // If the API_LOCK_READONLY flag is specified, the call will acquire the @@ -237,65 +237,57 @@ NV_STATUS embeddedParamCopyOut(RMAPI_PARAM_COPY *pParamCopy, RmCtrlParams *pRmC // also taken the read-only API lock. This flag is ignored if read-only API // locking is disabled in RM. // -#define RMCTRL_FLAGS_API_LOCK_READONLY 0x000000800 - -// -// If the :GPU_LOCK_READONLY flag is specified, the call will acquire a -// read-only GPU lock and may run concurrently with other operations that have -// also taken a read-only GPU lock. This flag is ignored if read-only GPU -// locking is disabled in RM. -// -#define RMCTRL_FLAGS_GPU_LOCK_READONLY 0x000001000 +#define RMCTRL_FLAGS_API_LOCK_READONLY 0x000000100 // // This flag specifies that the control shall be directly forwarded to the // the VGPU host if called from a guest (where IS_VIRTUAL() is true) // -#define RMCTRL_FLAGS_ROUTE_TO_VGPU_HOST 0x000002000 +#define RMCTRL_FLAGS_ROUTE_TO_VGPU_HOST 0x000000200 // // This flag specifies that the control output does not depend on the input // parameters and can be cached on the receiving end. // The cache is transparent and may not exist on all platforms. // -#define RMCTRL_FLAGS_CACHEABLE 0x000004000 +#define RMCTRL_FLAGS_CACHEABLE 0x000000400 // // This flag specifies that the control parameters will be // copied out back to the caller even if the control call fails. // -#define RMCTRL_FLAGS_COPYOUT_ON_ERROR 0x000008000 +#define RMCTRL_FLAGS_COPYOUT_ON_ERROR 0x000000800 // ?? -#define RMCTRL_FLAGS_ALLOW_WITHOUT_SYSMEM_ACCESS 0x000010000 +#define RMCTRL_FLAGS_ALLOW_WITHOUT_SYSMEM_ACCESS 0x000001000 // // This flag specifies that the control can be run by an admin privileged // client running in a full SRIOV, vGPU-GSP-ENABLED hypervisor environment. // Overrides regular privilege level flags. // -#define RMCTRL_FLAGS_CPU_PLUGIN_FOR_VGPU_GSP 0x000020000 +#define RMCTRL_FLAGS_CPU_PLUGIN_FOR_VGPU_GSP 0x000002000 // // This flag specifies that the control can be run by an admin privileged // client running in a full SRIOV, vGPU-GSP-DISABLED hypervisor environment. // Overrides regular privilege level flags. // -#define RMCTRL_FLAGS_CPU_PLUGIN_FOR_SRIOV 0x000040000 +#define RMCTRL_FLAGS_CPU_PLUGIN_FOR_SRIOV 0x000004000 // // This flag specifies that the control can be run by an admin privileged // client running in a non-SRIOV or SRIOV-Heavy hypervisor environment. // Overrides regular privilege level flags. // -#define RMCTRL_FLAGS_CPU_PLUGIN_FOR_LEGACY 0x000080000 +#define RMCTRL_FLAGS_CPU_PLUGIN_FOR_LEGACY 0x000008000 // // This flag specifies that the control can be run by an unprivileged // client running in GSP-RM when SRIOV and vGPU-GSP are ENABLED. // Overrides regular privilege level flags. // -#define RMCTRL_FLAGS_GSP_PLUGIN_FOR_VGPU_GSP 0x000100000 +#define RMCTRL_FLAGS_GSP_PLUGIN_FOR_VGPU_GSP 0x000010000 // // This flag specifies that the control output depends on the input @@ -303,16 +295,17 @@ NV_STATUS embeddedParamCopyOut(RMAPI_PARAM_COPY *pParamCopy, RmCtrlParams *pRmC // result depends on the input and the input varifies with controls, // the cache should be handled in a per-control bases. // -#define RMCTRL_FLAGS_CACHEABLE_BY_INPUT 0x000200000 +#define RMCTRL_FLAGS_CACHEABLE_BY_INPUT 0x000020000 +// // This flag specifies that ROUTE_TO_PHYSICAL control is implemented on vGPU Guest RM. // If a ROUTE_TO_PHYSICAL control is supported within vGPU Guest RM, // it should either have this flag set (indicating the implementation in the vGPU Guest RM) or // the ROUTE_TO_VGPU_HOST flag set (indicating the implementation in vGPU Host RM). // Without either of these flags set, the control will return NV_ERR_NOT_SUPPORTED. // -#define RMCTRL_FLAGS_PHYSICAL_IMPLEMENTED_ON_VGPU_GUEST 0x000400000 +#define RMCTRL_FLAGS_PHYSICAL_IMPLEMENTED_ON_VGPU_GUEST 0x000040000 // The combination of cacheable flags #define RMCTRL_FLAGS_CACHEABLE_ANY (RMCTRL_FLAGS_CACHEABLE | RMCTRL_FLAGS_CACHEABLE_BY_INPUT) @@ -322,7 +315,29 @@ NV_STATUS embeddedParamCopyOut(RMAPI_PARAM_COPY *pParamCopy, RmCtrlParams *pRmC // An entry is required for any control calls that set this in // serverControlLookupSecondClient or Resource Server will NV_ASSERT(0). // -#define RMCTRL_FLAGS_DUAL_CLIENT_LOCK 0x000800000 +#define RMCTRL_FLAGS_DUAL_CLIENT_LOCK 0x000080000 + +// +// This flag specifies that the control call is for RM test only code. +// +#define RMCTRL_FLAGS_RM_TEST_ONLY_CODE 0x000100000 + +// +// This flag specifies that all client handles in RM need to be locked. +// This flag should almost never be used, the only cases where it is required +// are cases where an RM API loops accessed several/arbitrary clients in RM using +// something like serverutilGetFirstClientUnderLock. The RW API lock is required +// to use this flag +// +#define RMCTRL_FLAGS_ALL_CLIENT_LOCK 0x000200000 + +// +// This flag specifies that the API lock should not be acquired for this +// RM Control. DO NOT use this flag without consulting Locking/Resource Server +// experts first and please consider other alternatives as much as possible +// before resorting to using this flag! +// +#define RMCTRL_FLAGS_NO_API_LOCK 0x000400000 // // 'ACCESS_RIGHTS' Attribute diff --git a/src/nvidia/inc/kernel/rmapi/lock_stress.h b/src/nvidia/inc/kernel/rmapi/lock_stress.h new file mode 100644 index 0000000000..c2bf0cef39 --- /dev/null +++ b/src/nvidia/inc/kernel/rmapi/lock_stress.h @@ -0,0 +1,108 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once +#include "g_lock_stress_nvoc.h" + +#ifndef LOCK_STRESS_H +#define LOCK_STRESS_H + +#include "gpu/gpu_resource.h" +#include "nvoc/prelude.h" +#include "nvstatus.h" +#include "resserv/resserv.h" + +#include "ctrl/ctrl0100.h" + +NVOC_PREFIX(lockStressObj) class LockStressObject : GpuResource +{ +public: + NV_STATUS lockStressObjConstruct(LockStressObject *pResource, + CALL_CONTEXT *pCallContext, + RS_RES_ALLOC_PARAMS_INTERNAL *pParams) : + GpuResource(pCallContext, pParams); + + void lockStressObjDestruct(LockStressObject *pResource); + + // + // RMCTRL Exported methods -- Category: LOCK_STRESS + // + RMCTRL_EXPORT(NV0100_CTRL_CMD_RESET_LOCK_STRESS_STATE, + RMCTRL_FLAGS(NON_PRIVILEGED)) + NV_STATUS lockStressObjCtrlCmdResetLockStressState(LockStressObject *pResource); + + RMCTRL_EXPORT(NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_ALL_RM_LOCKS, + RMCTRL_FLAGS(NON_PRIVILEGED)) + NV_STATUS lockStressObjCtrlCmdPerformLockStressAllRmLocks(LockStressObject *pResource, + NV0100_CTRL_PERFORM_LOCK_STRESS_ALL_RM_LOCKS_PARAMS *pParams); + + RMCTRL_EXPORT(NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_NO_GPUS_LOCK, + RMCTRL_FLAGS(NON_PRIVILEGED, NO_GPUS_LOCK)) + NV_STATUS lockStressObjCtrlCmdPerformLockStressNoGpusLock(LockStressObject *pResource, + NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_PARAMS *pParams); + + RMCTRL_EXPORT(NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE, + RMCTRL_FLAGS(NON_PRIVILEGED, API_LOCK_READONLY)) + NV_STATUS lockStressObjCtrlCmdPerformLockStressApiLockReadMode(LockStressObject *pResource, + NV0100_CTRL_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE_PARAMS *pParams); + + RMCTRL_EXPORT(NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE, + RMCTRL_FLAGS(NON_PRIVILEGED, NO_GPUS_LOCK, API_LOCK_READONLY)) + NV_STATUS lockStressObjCtrlCmdPerformLockStressNoGpusLockApiLockReadMode(LockStressObject *pResource, + NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS *pParams); + + RMCTRL_EXPORT(NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_INTERNAL_ALL_RM_LOCKS, + RMCTRL_FLAGS(NON_PRIVILEGED)) + NV_STATUS lockStressObjCtrlCmdPerformLockStressInternalAllRmLocks(LockStressObject *pResource, + NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_ALL_RM_LOCKS_PARAMS *pParams); + + RMCTRL_EXPORT(NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK, + RMCTRL_FLAGS(NON_PRIVILEGED, NO_GPUS_LOCK)) + NV_STATUS lockStressObjCtrlCmdPerformLockStressInternalNoGpusLock(LockStressObject *pResource, + NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_PARAMS *pParams); + + RMCTRL_EXPORT(NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_INTERNAL_API_LOCK_READ_MODE, + RMCTRL_FLAGS(NON_PRIVILEGED, API_LOCK_READONLY)) + NV_STATUS lockStressObjCtrlCmdPerformLockStressInternalApiLockReadMode(LockStressObject *pResource, + NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_API_LOCK_READ_MODE_PARAMS *pParams); + + RMCTRL_EXPORT(NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_API_LOCK_READ_MODE, + RMCTRL_FLAGS(NON_PRIVILEGED, NO_GPUS_LOCK, API_LOCK_READONLY)) + NV_STATUS lockStressObjCtrlCmdPerformLockStressInternalNoGpusLockApiLockReadMode(LockStressObject *pResource, + NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS *pParams); + + RMCTRL_EXPORT(NV0100_CTRL_CMD_GET_LOCK_STRESS_COUNTERS, + RMCTRL_FLAGS(NON_PRIVILEGED)) + NV_STATUS lockStressObjCtrlCmdGetLockStressCounters(LockStressObject *pResource, + NV0100_CTRL_GET_LOCK_STRESS_COUNTERS_PARAMS *pParams); + +private: + + // Internal RM objects for internal RM API invocation + NvHandle hInternalClient; + NvHandle hInternalDevice; + NvHandle hInternalSubdevice; + NvHandle hInternalLockStressObject; +}; + +#endif // LOCK_STRESS_H diff --git a/src/nvidia/inc/kernel/rmapi/nv_gpu_ops.h b/src/nvidia/inc/kernel/rmapi/nv_gpu_ops.h index a8952f109d..2d74684b0a 100644 --- a/src/nvidia/inc/kernel/rmapi/nv_gpu_ops.h +++ b/src/nvidia/inc/kernel/rmapi/nv_gpu_ops.h @@ -279,12 +279,15 @@ NV_STATUS nvGpuOpsFlushReplayableFaultBuffer(gpuFaultInfo *pFaultInfo, NV_STATUS nvGpuOpsTogglePrefetchFaults(gpuFaultInfo *pFaultInfo, NvBool bEnable); -// Interface used for CCSL +NV_STATUS nvGpuOpsKeyRotationChannelDisable(struct gpuChannel *channelList[], + NvU32 channelListCount); +// Interface used for CCSL NV_STATUS nvGpuOpsCcslContextInit(struct ccslContext_t **ctx, gpuChannelHandle channel); NV_STATUS nvGpuOpsCcslContextClear(struct ccslContext_t *ctx); -NV_STATUS nvGpuOpsCcslContextUpdate(struct ccslContext_t *ctx); +NV_STATUS nvGpuOpsCcslContextUpdate(UvmCslContext *contextList[], + NvU32 contextListCount); NV_STATUS nvGpuOpsCcslRotateIv(struct ccslContext_t *ctx, NvU8 direction); NV_STATUS nvGpuOpsCcslEncrypt(struct ccslContext_t *ctx, diff --git a/src/nvidia/inc/kernel/rmapi/rmapi.h b/src/nvidia/inc/kernel/rmapi/rmapi.h index f1b530950b..e3f08cdd71 100644 --- a/src/nvidia/inc/kernel/rmapi/rmapi.h +++ b/src/nvidia/inc/kernel/rmapi/rmapi.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -32,6 +32,7 @@ typedef struct _RM_API RM_API; typedef struct RsServer RsServer; typedef struct OBJGPU OBJGPU; +typedef struct RsClient RsClient; typedef struct RsResource RsResource; typedef struct RsCpuMapping RsCpuMapping; typedef struct CALL_CONTEXT CALL_CONTEXT; @@ -101,6 +102,24 @@ NvBool rmapiLockIsWriteOwner(void); */ void rmapiLockGetTimes(NV0000_CTRL_SYSTEM_GET_LOCK_TIMES_PARAMS *); +/** + * Indicates current thread is in the RTD3 PM path (rm_transition_dynamic_power) which + * means that certain locking asserts/checks must be skipped due to inability to acquire + * the API lock in this path. + */ +void rmapiEnterRtd3PmPath(void); + +/** + * Signifies that current thread is leaving the RTD3 PM path, restoring lock + * asserting/checking behavior to normal. + */ +void rmapiLeaveRtd3PmPath(void); + +/** + * Checks if current thread is currently running in the RTD3 PM path. + */ +NvBool rmapiInRtd3PmPath(void); + /** * Type of RM API client interface */ @@ -287,7 +306,7 @@ NV_STATUS rmapiControlCacheGet(NvHandle hClient, NvHandle hObject, NvU32 cmd, void* params, NvU32 paramsSize); NV_STATUS rmapiControlCacheSet(NvHandle hClient, NvHandle hObject, NvU32 cmd, void* params, NvU32 paramsSize); -NV_STATUS rmapiControlCacheSetGpuInstForObject(NvHandle hClient, NvHandle hObject, NvU32 gpuInst); +NV_STATUS rmapiControlCacheSetGpuAttrForObject(NvHandle hClient, NvHandle hObject, OBJGPU *pGpu); void rmapiControlCacheFreeAllCacheForGpu(NvU32 gpuInst); void rmapiControlCacheSetMode(NvU32 mode); NvU32 rmapiControlCacheGetMode(void); diff --git a/src/nvidia/inc/kernel/rmapi/rmapi_utils.h b/src/nvidia/inc/kernel/rmapi/rmapi_utils.h index 42ad794534..808170a045 100644 --- a/src/nvidia/inc/kernel/rmapi/rmapi_utils.h +++ b/src/nvidia/inc/kernel/rmapi/rmapi_utils.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/inc/kernel/rmapi/rs_utils.h b/src/nvidia/inc/kernel/rmapi/rs_utils.h index ab1a580ca8..542046ae34 100644 --- a/src/nvidia/inc/kernel/rmapi/rs_utils.h +++ b/src/nvidia/inc/kernel/rmapi/rs_utils.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2018-2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -127,17 +127,18 @@ RmClient *serverutilGetClientUnderLock(NvHandle hClient); * * @param[in] hClient The client to acquire * @param[in] access LOCK_ACCESS_* + * @param[out] ppClientEntry Pointer to the CLIENT_ENTRY * @param[out] ppClient Pointer to the RmClient */ -NV_STATUS serverutilAcquireClient(NvHandle hClient, LOCK_ACCESS_TYPE access, RmClient **ppClient); +NV_STATUS serverutilAcquireClient(NvHandle hClient, LOCK_ACCESS_TYPE access, CLIENT_ENTRY **ppClientEntry, RmClient **ppClient); /** * Unlock a client * * @param[in] access LOCK_ACCESS_* - * @param[in] pClient Pointer to the RmClient + * @param[in] pClientEntry Pointer to the CLIENT_ENTRY */ -void serverutilReleaseClient(LOCK_ACCESS_TYPE access, RmClient *pClient); +void serverutilReleaseClient(LOCK_ACCESS_TYPE access, CLIENT_ENTRY *pClientEntry); /** * Get the first valid client pointer in resource server without taking any locks. diff --git a/src/nvidia/kernel/inc/vgpu/dev_vgpu.h b/src/nvidia/inc/kernel/vgpu/dev_vgpu.h similarity index 100% rename from src/nvidia/kernel/inc/vgpu/dev_vgpu.h rename to src/nvidia/inc/kernel/vgpu/dev_vgpu.h diff --git a/src/nvidia/kernel/inc/vgpu/rm_plugin_shared_code.h b/src/nvidia/inc/kernel/vgpu/rm_plugin_shared_code.h similarity index 87% rename from src/nvidia/kernel/inc/vgpu/rm_plugin_shared_code.h rename to src/nvidia/inc/kernel/vgpu/rm_plugin_shared_code.h index f014b89837..caf7941c92 100644 --- a/src/nvidia/kernel/inc/vgpu/rm_plugin_shared_code.h +++ b/src/nvidia/inc/kernel/vgpu/rm_plugin_shared_code.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -46,7 +46,7 @@ */ #include "ctrl/ctrl208f/ctrl208fdma.h" // NV208F_CTRL_DMA_GET_VAS_BLOCK_DETAILS_PARAMS -#include "ctrl/ctrla16f.h" // NVA16F_CTRL_GET_CLASS_ENGINEID +#include "ctrl/ctrla16f.h" // NVA06F_CTRL_GET_CLASS_ENGINEID #include "ctrl/ctrl90e6.h" // NV90E6_CTRL_CMD_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK #include "ctrl/ctrl90f1.h" #include "ctrl/ctrl90cd.h" @@ -54,34 +54,13 @@ #include "nvctassert.h" // Copy elements from RPC structures to SDK structures (Step 2 or step 4 listed above) -#ifdef VMIOP_BUILD -typedef vmiop_error_t return_t; -#define serialize_deserialize(u) serialize_##u##_HAL -#define getIpVersion() pObjRpcStructureCopy->ipVersion -#define SUCCESS_T vmiop_success -#define FAILURE_T vmiop_error_inval -#define COPY_INPUT_PARAMETERS -#if VMIOPLUGINCFG_FEATURE_ENABLED(PLATFORM_LDDM) -#define UMED_BUILD -#endif -#endif -#ifdef RESMAN_BUILD typedef NV_STATUS return_t; #define serialize_deserialize(u) deserialize_##u##_HAL #define getIpVersion() pObjRpcStructureCopy->__nvoc_pbase_Object->ipVersion #define SUCCESS_T NV_OK #define FAILURE_T NV_ERR_INVALID_ARGUMENT #define COPY_OUTPUT_PARAMETERS -#endif - -#ifdef GSP_FW_BUILD -typedef NV_STATUS return_t; -#define SUCCESS_T NV_OK -#define FAILURE_T NV_ERR_INVALID_ARGUMENT -#define COPY_INPUT_PARAMETERS -#define vmiop_assert NV_ASSERT -#endif #define NV_ADDR_UNKNOWN 0 // Address space is unknown #define NV_ADDR_SYSMEM 1 // System memory (PCI) @@ -99,7 +78,6 @@ typedef NV_STATUS return_t; } \ } -#ifndef GSP_FW_BUILD #ifdef BUILD_COMMON_RPCS static @@ -156,11 +134,7 @@ return_t deserialize_NV906F_CTRL_CMD_RESET_CHANNEL_PARAMS_v10_01(NV906F_CTRL_CMD NV906F_CTRL_CMD_RESET_CHANNEL_PARAMS *dest = pParams; if (src && dest) { -#ifdef VMIOP_BUILD - dest->engineID = deserialize_engineType(src->engineID); -#else dest->engineID = src->engineID; -#endif dest->subdeviceInstance = src->subdeviceInstance; dest->resetReason = src->resetReason; } @@ -181,11 +155,7 @@ return_t deserialize_NV506F_CTRL_CMD_RESET_ISOLATED_CHANNEL_PARAMS_v03_00(NV506F if (src && dest) { dest->exceptType = src->exceptType; -#ifdef VMIOP_BUILD - dest->engineID = deserialize_engineType(src->engineID); -#else dest->engineID = src->engineID; -#endif } else return FAILURE_T; @@ -515,11 +485,7 @@ return_t deserialize_NV2080_CTRL_GPU_INITIALIZE_CTX_PARAMS_v03_00(NV2080_CTRL_GP NV2080_CTRL_GPU_INITIALIZE_CTX_PARAMS *dest = pParams; if (src && dest) { -#ifdef VMIOP_BUILD - dest->engineType = deserialize_engineType(src->engineType); -#else dest->engineType = src->engineType; -#endif dest->hClient = src->hClient; dest->ChID = src->ChID; dest->hChanClient = src->hChanClient; @@ -576,9 +542,6 @@ return_t deserialize_NV90F1_CTRL_VASPACE_COPY_SERVER_RESERVED_PDES_PARAMS_v1E_04 } #endif -#ifdef BUILD_LEGACY_RPCS -#endif - #ifdef BUILD_COMMON_RPCS #ifndef UMED_BUILD @@ -722,11 +685,7 @@ return_t deserialize_NV2080_CTRL_GPU_PROMOTE_CTX_PARAMS_v1A_20(NV2080_CTRL_GPU_P if (src && dest) { -#ifdef VMIOP_BUILD - dest->engineType = deserialize_engineType(src->engineType); -#else dest->engineType = src->engineType; -#endif dest->hClient = src->hClient; dest->ChID = src->ChID; dest->hChanClient = src->hChanClient; @@ -1016,30 +975,6 @@ return_t deserialize_NV9096_CTRL_GET_ZBC_CLEAR_TABLE_ENTRY_PARAMS_v1A_07(NV9096_ return SUCCESS_T; } -static -return_t deserialize_NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS_v14_00(NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS *pParams, - NvU8 *buffer, - NvU32 bufferSize, - NvU32 *offset) -{ - NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS_v14_00 *src = (void*)(buffer); - NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS *dest = pParams; - - if (src && dest) { -#ifdef COPY_OUTPUT_PARAMETERS - NvU32 i; - - for (i = 0; i < NV2080_CTRL_BUS_MAX_NUM_GPUS; i++) { - dest->nvlinkPeerIdMask[i] = src->nvlinkPeerIdMask[i]; - } -#endif - } - else - return FAILURE_T; - - return SUCCESS_T; -} - static return_t deserialize_NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS_PARAMS_v23_04(NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS_PARAMS *pParams, NvU8 *buffer, @@ -1470,10 +1405,6 @@ return_t deserialize_NV2080_CTRL_GPU_MIGRATABLE_OPS_PARAMS_v21_07(NV2080_CTRL_GP } #endif -#ifdef BUILD_LEGACY_RPCS - -#endif - #ifdef BUILD_COMMON_RPCS static return_t deserialize_NV0080_CTRL_FIFO_SET_CHANNEL_PROPERTIES_PARAMS_v03_00(NV0080_CTRL_FIFO_SET_CHANNEL_PROPERTIES_PARAMS *pParams, @@ -1497,9 +1428,6 @@ return_t deserialize_NV0080_CTRL_FIFO_SET_CHANNEL_PROPERTIES_PARAMS_v03_00(NV008 } #endif -#ifdef BUILD_LEGACY_RPCS -#endif - #ifdef BUILD_COMMON_RPCS static return_t deserialize_NV2080_CTRL_GPU_EVICT_CTX_PARAMS_v1A_1C( @@ -1514,11 +1442,7 @@ return_t deserialize_NV2080_CTRL_GPU_EVICT_CTX_PARAMS_v1A_1C( if (src && dest) { #ifdef COPY_INPUT_PARAMETERS -#ifdef VMIOP_BUILD - dest->engineType = deserialize_engineType(src->engineType); -#else dest->engineType = src->engineType; -#endif dest->hClient = src->hClient; dest->ChID = src->ChID; dest->hChanClient = src->hChanClient; @@ -1827,42 +1751,201 @@ return_t deserialize_NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v24_00(NV2080_CTRL_FB_GET return SUCCESS_T; } -#ifdef VMIOP_BUILD -#ifndef UMED_BUILD - static -return_t deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v24_06(NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS *pParams, - NvU8 *buffer, - NvU32 bufferSize, - NvU32 *offset) +return_t deserialize_NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v26_04(NV2080_CTRL_FB_GET_FS_INFO_PARAMS *pParams, + NvU8 *buffer, + NvU32 bufferSize, + NvU32 *offset) { - NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v24_06 *src = (void*)(buffer); - NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS *dest = pParams; + NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v26_04 *src = (void*)(buffer); + NV2080_CTRL_FB_GET_FS_INFO_PARAMS *dest = pParams; + NvU32 idx = 0; if (src && dest) { + if (src->numQueries > NV2080_CTRL_FB_FS_INFO_MAX_QUERIES_v24_00) { + return FAILURE_T; + } + +#ifdef COPY_INPUT_PARAMETERS + dest->numQueries = src->numQueries; +#endif + for (idx = 0; idx < dest->numQueries; idx++) { #ifdef COPY_INPUT_PARAMETERS - dest->flags = src->flags; + dest->queries[idx].queryType = src->queries[idx].queryType; #endif - #ifdef COPY_OUTPUT_PARAMETERS - { - NvU32 i; - - dest->bFatalPoisonError = src->bFatalPoisonError; - - for (i = 0; i < NV2080_CTRL_GPU_ECC_UNIT_COUNT_v24_06; i++) + dest->queries[idx].status = src->queries[idx].status; +#endif + switch(dest->queries[idx].queryType) { - dest->units[i].enabled = src->units[i].enabled; - dest->units[i].scrubComplete = src->units[i].scrubComplete; - dest->units[i].supported = src->units[i].supported; - dest->units[i].dbe.count = src->units[i].dbe.count; - dest->units[i].dbeNonResettable.count = src->units[i].dbeNonResettable.count; - dest->units[i].sbe.count = src->units[i].sbe.count; - dest->units[i].sbeNonResettable.count = src->units[i].sbeNonResettable.count; + case NV2080_CTRL_FB_FS_INFO_INVALID_QUERY: { +#ifdef COPY_OUTPUT_PARAMETERS + NvU32 i = 0; + for (i = 0; i < NV2080_CTRL_FB_FS_INFO_MAX_QUERY_SIZE_v1A_1D; i++) { + dest->queries[idx].queryParams.inv.data[i] = src->queries[idx].queryParams.inv.data[i]; + } +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_FBP_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.fbp.swizzId = src->queries[idx].queryParams.fbp.swizzId; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.fbp.fbpEnMask = src->queries[idx].queryParams.fbp.fbpEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_LTC_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.ltc.fbpIndex = src->queries[idx].queryParams.ltc.fbpIndex; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.ltc.ltcEnMask = src->queries[idx].queryParams.ltc.ltcEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_LTS_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.lts.fbpIndex = src->queries[idx].queryParams.lts.fbpIndex; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.lts.ltsEnMask = src->queries[idx].queryParams.lts.ltsEnMask; +#endif + + break; + } + case NV2080_CTRL_FB_FS_INFO_FBPA_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.fbpa.fbpIndex = src->queries[idx].queryParams.fbpa.fbpIndex; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.fbpa.fbpaEnMask = src->queries[idx].queryParams.fbpa.fbpaEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_ROP_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.rop.fbpIndex = src->queries[idx].queryParams.rop.fbpIndex; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.rop.ropEnMask = src->queries[idx].queryParams.rop.ropEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTC_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.dmLtc.fbpIndex = src->queries[idx].queryParams.dmLtc.fbpIndex; + dest->queries[idx].queryParams.dmLtc.swizzId = src->queries[idx].queryParams.dmLtc.swizzId; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.dmLtc.ltcEnMask = src->queries[idx].queryParams.dmLtc.ltcEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTS_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.dmLts.fbpIndex = src->queries[idx].queryParams.dmLts.fbpIndex; + dest->queries[idx].queryParams.dmLts.swizzId = src->queries[idx].queryParams.dmLts.swizzId; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.dmLts.ltsEnMask = src->queries[idx].queryParams.dmLts.ltsEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.dmFbpa.fbpIndex = src->queries[idx].queryParams.dmFbpa.fbpIndex; + dest->queries[idx].queryParams.dmFbpa.swizzId = src->queries[idx].queryParams.dmFbpa.swizzId; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.dmFbpa.fbpaEnMask = src->queries[idx].queryParams.dmFbpa.fbpaEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_ROP_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.dmRop.fbpIndex = src->queries[idx].queryParams.dmRop.fbpIndex; + dest->queries[idx].queryParams.dmRop.swizzId = src->queries[idx].queryParams.dmRop.swizzId; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.dmRop.ropEnMask = src->queries[idx].queryParams.dmRop.ropEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_SUBP_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.dmFbpaSubp.fbpIndex = src->queries[idx].queryParams.dmFbpaSubp.fbpIndex; + dest->queries[idx].queryParams.dmFbpaSubp.swizzId = src->queries[idx].queryParams.dmFbpaSubp.swizzId; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.dmFbpaSubp.fbpaSubpEnMask = src->queries[idx].queryParams.dmFbpaSubp.fbpaSubpEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_FBPA_SUBP_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.fbpaSubp.fbpIndex = src->queries[idx].queryParams.fbpaSubp.fbpIndex; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.fbpaSubp.fbpaSubpEnMask = src->queries[idx].queryParams.fbpaSubp.fbpaSubpEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_FBP_LOGICAL_MAP: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.fbpLogicalMap.fbpIndex = src->queries[idx].queryParams.fbpLogicalMap.fbpIndex; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.fbpLogicalMap.fbpLogicalIndex = src->queries[idx].queryParams.fbpLogicalMap.fbpLogicalIndex; +#endif + break; + } + case NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.sysl2Ltc.sysIdx = src->queries[idx].queryParams.sysl2Ltc.sysIdx; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.sysl2Ltc.sysl2LtcEnMask = src->queries[idx].queryParams.sysl2Ltc.sysl2LtcEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_PAC_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.pac.fbpIndex = src->queries[idx].queryParams.pac.fbpIndex; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.pac.pacEnMask = src->queries[idx].queryParams.pac.pacEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.logicalLtc.fbpIndex = src->queries[idx].queryParams.logicalLtc.fbpIndex; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.logicalLtc.logicalLtcEnMask = src->queries[idx].queryParams.logicalLtc.logicalLtcEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.dmLogicalLtc.fbpIndex = src->queries[idx].queryParams.dmLogicalLtc.fbpIndex; + dest->queries[idx].queryParams.dmLogicalLtc.swizzId = src->queries[idx].queryParams.dmLogicalLtc.swizzId; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.dmLogicalLtc.logicalLtcEnMask = src->queries[idx].queryParams.dmLogicalLtc.logicalLtcEnMask; +#endif + break; + } + default: + { + // Unknown query + return FAILURE_T; + } } } -#endif } else return FAILURE_T; @@ -1870,9 +1953,6 @@ return_t deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v24_ return SUCCESS_T; } -#endif // !UMED_BUILD -#endif // VMIOP_BUILD - return_t deserialize_NVA06F_CTRL_STOP_CHANNEL_PARAMS_v1A_1E( NVA06F_CTRL_STOP_CHANNEL_PARAMS *pParams, NvU8 *buffer, @@ -2169,111 +2249,47 @@ return_t deserialize_NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS_v1E_06(NV0090_CTRL_GE } #endif -#ifdef BUILD_LEGACY_RPCS -return_t deserialize_NV2080_CTRL_FLCN_GET_CTX_BUFFER_SIZE_PARAMS_v1E_0A( - NV2080_CTRL_FLCN_GET_CTX_BUFFER_SIZE_PARAMS *pParams, +#ifdef BUILD_COMMON_RPCS +return_t deserialize_NV2080_CTRL_INTERNAL_MEMSYS_SET_ZBC_REFERENCED_PARAMS_v1F_05( + NV2080_CTRL_INTERNAL_MEMSYS_SET_ZBC_REFERENCED_PARAMS *pParams, NvU8 *buffer, NvU32 bufferSize, NvU32 *offset) { - NV2080_CTRL_FLCN_GET_CTX_BUFFER_SIZE_PARAMS_v1E_0A *src = (void*)(buffer); - NV2080_CTRL_FLCN_GET_CTX_BUFFER_SIZE_PARAMS *dest = pParams; +#ifdef COPY_INPUT_PARAMETERS + NV2080_CTRL_CMD_INTERNAL_MEMSYS_SET_ZBC_REFERENCED_v1F_05 *src = (void*)(buffer); + NV2080_CTRL_INTERNAL_MEMSYS_SET_ZBC_REFERENCED_PARAMS *dest = pParams; if (src && dest) { -#ifdef COPY_INPUT_PARAMETERS - dest->hChannel = src->hChannel; -#endif -#ifdef COPY_OUTPUT_PARAMETERS - dest->totalBufferSize = src->totalBufferSize; -#endif + dest->bZbcSurfacesExist = src->bZbcSurfacesExist; } else return FAILURE_T; +#endif return SUCCESS_T; } #endif -#ifdef BUILD_LEGACY_RPCS -return_t deserialize_NV2080_CTRL_FLCN_GET_CTX_BUFFER_INFO_PARAMS_v1E_0A( - NV2080_CTRL_FLCN_GET_CTX_BUFFER_INFO_PARAMS *pParams, - NvU8 *buffer, - NvU32 bufferSize, - NvU32 *offset) +#ifdef BUILD_COMMON_RPCS +static +return_t deserialize_NV00F8_CTRL_DESCRIBE_PARAMS_v1E_0C( + NV00F8_CTRL_DESCRIBE_PARAMS *pParams, + NvU8 *buffer, + NvU32 bufferSize, + NvU32 *offset) { - NV2080_CTRL_FLCN_GET_CTX_BUFFER_INFO_PARAMS_v1E_0A *src = (void*)(buffer); - NV2080_CTRL_FLCN_GET_CTX_BUFFER_INFO_PARAMS *dest = pParams; + NV00F8_CTRL_DESCRIBE_PARAMS_v1E_0C *src = (void*)(buffer); + NV00F8_CTRL_DESCRIBE_PARAMS *dest = pParams; if (src && dest) { #ifdef COPY_INPUT_PARAMETERS - dest->hUserClient = src->hUserClient; - dest->hChannel = src->hChannel; + dest->offset = src->offset; #endif #ifdef COPY_OUTPUT_PARAMETERS - dest->alignment = src->alignment; - dest->size = src->size; - dest->bufferHandle = src->bufferHandle; - dest->pageCount = src->pageCount; - dest->physAddr = src->physAddr; - dest->aperture = src->aperture; - dest->kind = src->kind; - dest->pageSize = src->pageSize; - dest->bIsContigous = src->bIsContigous; - dest->bDeviceDescendant = src->bDeviceDescendant; - portMemCopy(dest->uuid, sizeof(dest->uuid), - src->uuid, sizeof(src->uuid)); -#endif - } - else - return FAILURE_T; - - return SUCCESS_T; -} -#endif - -#ifdef BUILD_COMMON_RPCS -return_t deserialize_NV2080_CTRL_INTERNAL_MEMSYS_SET_ZBC_REFERENCED_PARAMS_v1F_05( - NV2080_CTRL_INTERNAL_MEMSYS_SET_ZBC_REFERENCED_PARAMS *pParams, - NvU8 *buffer, - NvU32 bufferSize, - NvU32 *offset) -{ -#ifdef COPY_INPUT_PARAMETERS - NV2080_CTRL_CMD_INTERNAL_MEMSYS_SET_ZBC_REFERENCED_v1F_05 *src = (void*)(buffer); - NV2080_CTRL_INTERNAL_MEMSYS_SET_ZBC_REFERENCED_PARAMS *dest = pParams; - - if (src && dest) - { - dest->bZbcSurfacesExist = src->bZbcSurfacesExist; - } - else - return FAILURE_T; -#endif - - return SUCCESS_T; -} -#endif - -#ifdef BUILD_COMMON_RPCS -static -return_t deserialize_NV00F8_CTRL_DESCRIBE_PARAMS_v1E_0C( - NV00F8_CTRL_DESCRIBE_PARAMS *pParams, - NvU8 *buffer, - NvU32 bufferSize, - NvU32 *offset) -{ - NV00F8_CTRL_DESCRIBE_PARAMS_v1E_0C *src = (void*)(buffer); - NV00F8_CTRL_DESCRIBE_PARAMS *dest = pParams; - - if (src && dest) - { -#ifdef COPY_INPUT_PARAMETERS - dest->offset = src->offset; -#endif -#ifdef COPY_OUTPUT_PARAMETERS - NvU32 i; + NvU32 i; portMemSet(dest, 0, sizeof(*dest)); @@ -2700,25 +2716,14 @@ return_t deserialize_NV83DE_CTRL_DEBUG_GET_MODE_MMU_DEBUG_PARAMS_v25_04(NV83DE_C #endif #endif -#endif //GSP_FW_BUILD #undef COPY_INPUT_PARAMETERS #undef COPY_OUTPUT_PARAMETERS // Copy elements from SDK structures to RPC structures (Step 1 or step 3 listed above) -#ifdef VMIOP_BUILD -#define COPY_OUTPUT_PARAMETERS -#endif -#ifdef RESMAN_BUILD #define COPY_INPUT_PARAMETERS -#endif - -#ifdef GSP_FW_BUILD -#define COPY_OUTPUT_PARAMETERS -#endif -#ifndef GSP_FW_BUILD #ifdef BUILD_COMMON_RPCS static @@ -2775,11 +2780,7 @@ return_t serialize_NV906F_CTRL_CMD_RESET_CHANNEL_PARAMS_v10_01(NV906F_CTRL_CMD_R NV906F_CTRL_CMD_RESET_CHANNEL_PARAMS_v10_01 *dest = (void*)(buffer); if (src && dest) { -#ifdef VMIOP_BUILD - dest->engineID = serialize_engineType(src->engineID); -#else dest->engineID = src->engineID; -#endif dest->subdeviceInstance = src->subdeviceInstance; dest->resetReason = src->resetReason; } @@ -2800,11 +2801,7 @@ return_t serialize_NV506F_CTRL_CMD_RESET_ISOLATED_CHANNEL_PARAMS_v03_00(NV506F_C if (src && dest) { dest->exceptType = src->exceptType; -#ifdef VMIOP_BUILD - dest->engineID = serialize_engineType(src->engineID); -#else dest->engineID = src->engineID; -#endif } else return FAILURE_T; @@ -3132,11 +3129,7 @@ return_t serialize_NV2080_CTRL_GPU_INITIALIZE_CTX_PARAMS_v03_00(NV2080_CTRL_GPU_ NV2080_CTRL_GPU_INITIALIZE_CTX_PARAMS_v03_00 *dest = (void*)(buffer); if (src && dest) { -#ifdef VMIOP_BUILD - dest->engineType = serialize_engineType(src->engineType); -#else dest->engineType = src->engineType; -#endif dest->hClient = src->hClient; dest->ChID = src->ChID; dest->hChanClient = src->hChanClient; @@ -3193,9 +3186,6 @@ return_t serialize_NV90F1_CTRL_VASPACE_COPY_SERVER_RESERVED_PDES_PARAMS_v1E_04(N } #endif -#ifdef BUILD_LEGACY_RPCS -#endif - #ifdef BUILD_COMMON_RPCS #ifndef UMED_BUILD @@ -3335,11 +3325,7 @@ return_t serialize_NV2080_CTRL_GPU_PROMOTE_CTX_PARAMS_v1A_20(NV2080_CTRL_GPU_PRO if (src && dest) { -#ifdef VMIOP_BUILD - dest->engineType = serialize_engineType(src->engineType); -#else dest->engineType = src->engineType; -#endif dest->hClient = src->hClient; dest->ChID = src->ChID; dest->hChanClient = src->hChanClient; @@ -3629,30 +3615,6 @@ return_t serialize_NV9096_CTRL_GET_ZBC_CLEAR_TABLE_ENTRY_PARAMS_v1A_07(NV9096_CT return SUCCESS_T; } -static -return_t serialize_NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS_v14_00(NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS *pParams, - NvU8 *buffer, - NvU32 bufferSize, - NvU32 *offset) -{ - NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS *src = pParams; - NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS_v14_00 *dest = (void*)(buffer); - - if (src && dest) { -#ifdef COPY_OUTPUT_PARAMETERS - NvU32 i; - - for (i = 0; i < NV2080_CTRL_BUS_MAX_NUM_GPUS; i++) { - dest->nvlinkPeerIdMask[i] = src->nvlinkPeerIdMask[i]; - } -#endif - } - else - return FAILURE_T; - - return SUCCESS_T; -} - static return_t serialize_NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS_PARAMS_v23_04(NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS_PARAMS *pParams, NvU8 *buffer, @@ -4082,10 +4044,6 @@ return_t serialize_NV2080_CTRL_GPU_MIGRATABLE_OPS_PARAMS_v21_07(NV2080_CTRL_GPU_ } #endif -#ifdef BUILD_LEGACY_RPCS - -#endif - #ifdef BUILD_COMMON_RPCS static return_t serialize_NV0080_CTRL_FIFO_SET_CHANNEL_PROPERTIES_PARAMS_v03_00(NV0080_CTRL_FIFO_SET_CHANNEL_PROPERTIES_PARAMS *pParams, @@ -4109,56 +4067,6 @@ return_t serialize_NV0080_CTRL_FIFO_SET_CHANNEL_PROPERTIES_PARAMS_v03_00(NV0080_ } #endif -#ifdef BUILD_LEGACY_RPCS -return_t serialize_NV2080_CTRL_GR_GET_CTX_BUFFER_INFO_PARAMS_v1A_1A(NV2080_CTRL_GR_GET_CTX_BUFFER_INFO_PARAMS *pParams, - NvU8 *buffer, - NvU32 bufferSize, - NvU32 *offset) -{ - NV2080_CTRL_GR_GET_CTX_BUFFER_INFO_PARAMS_v1A_1A *dest = (void*)(buffer); - NV2080_CTRL_GR_GET_CTX_BUFFER_INFO_PARAMS *src = pParams; - - if (src && dest) - { -#ifdef COPY_INPUT_PARAMETERS - dest->hUserClient = src->hUserClient; - dest->hChannel = src->hChannel; -#endif -#ifdef COPY_OUTPUT_PARAMETERS - NvU32 i; - - if ((src->bufferCount == 0) || (src->bufferCount > GR_MAX_RPC_CTX_BUFFER_COUNT)) - return FAILURE_T; - - for (i = 0; i < src->bufferCount; i++) { - dest->ctxBufferInfo[i].alignment = src->ctxBufferInfo[i].alignment; - dest->ctxBufferInfo[i].size = src->ctxBufferInfo[i].size; - dest->ctxBufferInfo[i].bufferHandle = src->ctxBufferInfo[i].bufferHandle; - dest->ctxBufferInfo[i].pageCount = src->ctxBufferInfo[i].pageCount; - dest->ctxBufferInfo[i].physAddr = src->ctxBufferInfo[i].physAddr; - dest->ctxBufferInfo[i].bufferType = src->ctxBufferInfo[i].bufferType; - dest->ctxBufferInfo[i].aperture = src->ctxBufferInfo[i].aperture; - dest->ctxBufferInfo[i].kind = src->ctxBufferInfo[i].kind; - dest->ctxBufferInfo[i].pageSize = src->ctxBufferInfo[i].pageSize; - dest->ctxBufferInfo[i].bIsContigous = src->ctxBufferInfo[i].bIsContigous; - dest->ctxBufferInfo[i].bGlobalBuffer = src->ctxBufferInfo[i].bGlobalBuffer; - dest->ctxBufferInfo[i].bLocalBuffer = src->ctxBufferInfo[i].bLocalBuffer; - dest->ctxBufferInfo[i].bDeviceDescendant = src->ctxBufferInfo[i].bDeviceDescendant; - portMemCopy(dest->ctxBufferInfo[i].uuid, sizeof(dest->ctxBufferInfo[i].uuid), - src->ctxBufferInfo[i].uuid, sizeof(src->ctxBufferInfo[i].uuid)); - } - - dest->bufferCount = src->bufferCount; -#endif - } - else - return FAILURE_T; - - return SUCCESS_T; -} - -#endif - #ifdef BUILD_COMMON_RPCS static return_t serialize_NV2080_CTRL_GPU_EVICT_CTX_PARAMS_v1A_1C( @@ -4173,11 +4081,7 @@ return_t serialize_NV2080_CTRL_GPU_EVICT_CTX_PARAMS_v1A_1C( if (src && dest) { #ifdef COPY_INPUT_PARAMETERS -#ifdef VMIOP_BUILD - dest->engineType = serialize_engineType(src->engineType); -#else dest->engineType = src->engineType; -#endif dest->hClient = src->hClient; dest->ChID = src->ChID; dest->hChanClient = src->hChanClient; @@ -4486,144 +4390,300 @@ return_t serialize_NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v24_00(NV2080_CTRL_FB_GET_F return SUCCESS_T; } -#ifdef VMIOP_BUILD -#ifndef UMED_BUILD - static -return_t serialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v24_06(NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS *pParams, - NvU8 *buffer, - NvU32 bufferSize, - NvU32 *offset) +return_t serialize_NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v26_04(NV2080_CTRL_FB_GET_FS_INFO_PARAMS *pParams, + NvU8 *buffer, + NvU32 bufferSize, + NvU32 *offset) { - NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v24_06 *dest = (void*)(buffer); - NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS *src = pParams; + NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v26_04 *dest = (void*)(buffer); + NV2080_CTRL_FB_GET_FS_INFO_PARAMS *src = pParams; + NvU32 idx = 0; if (src && dest) { + if (src->numQueries > NV2080_CTRL_FB_FS_INFO_MAX_QUERIES_v24_00) { + return FAILURE_T; + } + +#ifdef COPY_INPUT_PARAMETERS + dest->numQueries = src->numQueries; +#endif + for (idx = 0; idx < dest->numQueries; idx++) { #ifdef COPY_INPUT_PARAMETERS - dest->flags = src->flags; + dest->queries[idx].queryType = src->queries[idx].queryType; #endif - #ifdef COPY_OUTPUT_PARAMETERS - { - NvU32 i; - - dest->bFatalPoisonError = src->bFatalPoisonError; - - for (i = 0; i < NV2080_CTRL_GPU_ECC_UNIT_COUNT_v24_06; i++) + dest->queries[idx].status = src->queries[idx].status; +#endif + switch(dest->queries[idx].queryType) { - dest->units[i].enabled = src->units[i].enabled; - dest->units[i].scrubComplete = src->units[i].scrubComplete; - dest->units[i].supported = src->units[i].supported; - dest->units[i].dbe.count = src->units[i].dbe.count; - dest->units[i].dbeNonResettable.count = src->units[i].dbeNonResettable.count; - dest->units[i].sbe.count = src->units[i].sbe.count; - dest->units[i].sbeNonResettable.count = src->units[i].sbeNonResettable.count; - } - } + case NV2080_CTRL_FB_FS_INFO_INVALID_QUERY: { +#ifdef COPY_OUTPUT_PARAMETERS + NvU32 i = 0; + for (i = 0; i < NV2080_CTRL_FB_FS_INFO_MAX_QUERY_SIZE_v1A_1D; i++) { + dest->queries[idx].queryParams.inv.data[i] = src->queries[idx].queryParams.inv.data[i]; + } #endif - } - else - return FAILURE_T; - - return SUCCESS_T; -} - -#endif // !UMED_BUILD -#endif // VMIOP_BUILD - -return_t serialize_NVA06F_CTRL_STOP_CHANNEL_PARAMS_v1A_1E( - NVA06F_CTRL_STOP_CHANNEL_PARAMS *pParams, - NvU8 *buffer, - NvU32 bufferSize, - NvU32 *offset) -{ - NVA06F_CTRL_STOP_CHANNEL_PARAMS *src = pParams; - NVA06F_CTRL_STOP_CHANNEL_PARAMS_v1A_1E *dest = (void*)(buffer); - - if (src && dest) - { + break; + } + case NV2080_CTRL_FB_FS_INFO_FBP_MASK: { #ifdef COPY_INPUT_PARAMETERS - dest->bImmediate = src->bImmediate; + dest->queries[idx].queryParams.fbp.swizzId = src->queries[idx].queryParams.fbp.swizzId; #endif - } - else - return FAILURE_T; - - return SUCCESS_T; -} - -return_t serialize_NVB0CC_CTRL_FREE_PMA_STREAM_PARAMS_v1A_1F(NVB0CC_CTRL_FREE_PMA_STREAM_PARAMS *pParams, - NvU8 *buffer, - NvU32 bufferSize, - NvU32 *offset) -{ +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.fbp.fbpEnMask = src->queries[idx].queryParams.fbp.fbpEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_LTC_MASK: { #ifdef COPY_INPUT_PARAMETERS - NVB0CC_CTRL_FREE_PMA_STREAM_PARAMS_v1A_1F *dest = (void*)(buffer); - NVB0CC_CTRL_FREE_PMA_STREAM_PARAMS *src = pParams; - - if (src && dest) - { - dest->pmaChannelIdx = src->pmaChannelIdx; - } - else - return FAILURE_T; - + dest->queries[idx].queryParams.ltc.fbpIndex = src->queries[idx].queryParams.ltc.fbpIndex; #endif - return SUCCESS_T; -} - -static -return_t serialize_NV2080_CTRL_GR_PC_SAMPLING_MODE_PARAMS_v1A_1F(NV2080_CTRL_GR_PC_SAMPLING_MODE_PARAMS *pParams, - NvU8 *buffer, - NvU32 bufferSize, - NvU32 *offset) -{ +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.ltc.ltcEnMask = src->queries[idx].queryParams.ltc.ltcEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_LTS_MASK: { #ifdef COPY_INPUT_PARAMETERS - NV2080_CTRL_GR_PC_SAMPLING_MODE_PARAMS_v1A_1F *dest = (void*)(buffer); - NV2080_CTRL_GR_PC_SAMPLING_MODE_PARAMS *src = pParams; - - if (src && dest) - { - dest->hChannel = src->hChannel; - dest->samplingMode = src->samplingMode; - dest->grRouteInfo.flags = src->grRouteInfo.flags; - dest->grRouteInfo.route = src->grRouteInfo.route; - } - else - return FAILURE_T; - + dest->queries[idx].queryParams.lts.fbpIndex = src->queries[idx].queryParams.lts.fbpIndex; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.lts.ltsEnMask = src->queries[idx].queryParams.lts.ltsEnMask; #endif - return SUCCESS_T; -} -static -return_t serialize_NV2080_CTRL_CMD_TIMER_SET_GR_TICK_FREQ_PARAMS_v1A_1F(NV2080_CTRL_CMD_TIMER_SET_GR_TICK_FREQ_PARAMS *pParams, - NvU8 *buffer, - NvU32 bufferSize, - NvU32 *offset) -{ + break; + } + case NV2080_CTRL_FB_FS_INFO_FBPA_MASK: { #ifdef COPY_INPUT_PARAMETERS - NV2080_CTRL_CMD_TIMER_SET_GR_TICK_FREQ_PARAMS_v1A_1F *dest = (void*)(buffer); - NV2080_CTRL_CMD_TIMER_SET_GR_TICK_FREQ_PARAMS *src = pParams; - - if (src && dest) - { - dest->bSetMaxFreq = src->bSetMaxFreq; - } - else - return FAILURE_T; - + dest->queries[idx].queryParams.fbpa.fbpIndex = src->queries[idx].queryParams.fbpa.fbpIndex; #endif - return SUCCESS_T; -} - -static -return_t serialize_NV2080_CTRL_PERF_RATED_TDP_STATUS_PARAMS_v1A_1F(NV2080_CTRL_PERF_RATED_TDP_STATUS_PARAMS *pParams, - NvU8 *buffer, - NvU32 bufferSize, - NvU32 *offset) -{ +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.fbpa.fbpaEnMask = src->queries[idx].queryParams.fbpa.fbpaEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_ROP_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.rop.fbpIndex = src->queries[idx].queryParams.rop.fbpIndex; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.rop.ropEnMask = src->queries[idx].queryParams.rop.ropEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTC_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.dmLtc.fbpIndex = src->queries[idx].queryParams.dmLtc.fbpIndex; + dest->queries[idx].queryParams.dmLtc.swizzId = src->queries[idx].queryParams.dmLtc.swizzId; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.dmLtc.ltcEnMask = src->queries[idx].queryParams.dmLtc.ltcEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTS_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.dmLts.fbpIndex = src->queries[idx].queryParams.dmLts.fbpIndex; + dest->queries[idx].queryParams.dmLts.swizzId = src->queries[idx].queryParams.dmLts.swizzId; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.dmLts.ltsEnMask = src->queries[idx].queryParams.dmLts.ltsEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.dmFbpa.fbpIndex = src->queries[idx].queryParams.dmFbpa.fbpIndex; + dest->queries[idx].queryParams.dmFbpa.swizzId = src->queries[idx].queryParams.dmFbpa.swizzId; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.dmFbpa.fbpaEnMask = src->queries[idx].queryParams.dmFbpa.fbpaEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_ROP_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.dmRop.fbpIndex = src->queries[idx].queryParams.dmRop.fbpIndex; + dest->queries[idx].queryParams.dmRop.swizzId = src->queries[idx].queryParams.dmRop.swizzId; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.dmRop.ropEnMask = src->queries[idx].queryParams.dmRop.ropEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_SUBP_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.dmFbpaSubp.fbpIndex = src->queries[idx].queryParams.dmFbpaSubp.fbpIndex; + dest->queries[idx].queryParams.dmFbpaSubp.swizzId = src->queries[idx].queryParams.dmFbpaSubp.swizzId; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.dmFbpaSubp.fbpaSubpEnMask = src->queries[idx].queryParams.dmFbpaSubp.fbpaSubpEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_FBPA_SUBP_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.fbpaSubp.fbpIndex = src->queries[idx].queryParams.fbpaSubp.fbpIndex; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.fbpaSubp.fbpaSubpEnMask = src->queries[idx].queryParams.fbpaSubp.fbpaSubpEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_FBP_LOGICAL_MAP: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.fbpLogicalMap.fbpIndex = src->queries[idx].queryParams.fbpLogicalMap.fbpIndex; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.fbpLogicalMap.fbpLogicalIndex = src->queries[idx].queryParams.fbpLogicalMap.fbpLogicalIndex; +#endif + break; + } + case NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.sysl2Ltc.sysIdx = src->queries[idx].queryParams.sysl2Ltc.sysIdx; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.sysl2Ltc.sysl2LtcEnMask = src->queries[idx].queryParams.sysl2Ltc.sysl2LtcEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_PAC_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.pac.fbpIndex = src->queries[idx].queryParams.pac.fbpIndex; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.pac.pacEnMask = src->queries[idx].queryParams.pac.pacEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.logicalLtc.fbpIndex = src->queries[idx].queryParams.logicalLtc.fbpIndex; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.logicalLtc.logicalLtcEnMask = src->queries[idx].queryParams.logicalLtc.logicalLtcEnMask; +#endif + break; + } + case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK: { +#ifdef COPY_INPUT_PARAMETERS + dest->queries[idx].queryParams.dmLogicalLtc.fbpIndex = src->queries[idx].queryParams.dmLogicalLtc.fbpIndex; + dest->queries[idx].queryParams.dmLogicalLtc.swizzId = src->queries[idx].queryParams.dmLogicalLtc.swizzId; +#endif +#ifdef COPY_OUTPUT_PARAMETERS + dest->queries[idx].queryParams.dmLogicalLtc.logicalLtcEnMask = src->queries[idx].queryParams.dmLogicalLtc.logicalLtcEnMask; +#endif + break; + } + default: + { + // Unknown query + return FAILURE_T; + } + } + } + } + else + return FAILURE_T; + + return SUCCESS_T; +} + +return_t serialize_NVA06F_CTRL_STOP_CHANNEL_PARAMS_v1A_1E( + NVA06F_CTRL_STOP_CHANNEL_PARAMS *pParams, + NvU8 *buffer, + NvU32 bufferSize, + NvU32 *offset) +{ + NVA06F_CTRL_STOP_CHANNEL_PARAMS *src = pParams; + NVA06F_CTRL_STOP_CHANNEL_PARAMS_v1A_1E *dest = (void*)(buffer); + + if (src && dest) + { +#ifdef COPY_INPUT_PARAMETERS + dest->bImmediate = src->bImmediate; +#endif + } + else + return FAILURE_T; + + return SUCCESS_T; +} + +return_t serialize_NVB0CC_CTRL_FREE_PMA_STREAM_PARAMS_v1A_1F(NVB0CC_CTRL_FREE_PMA_STREAM_PARAMS *pParams, + NvU8 *buffer, + NvU32 bufferSize, + NvU32 *offset) +{ +#ifdef COPY_INPUT_PARAMETERS + NVB0CC_CTRL_FREE_PMA_STREAM_PARAMS_v1A_1F *dest = (void*)(buffer); + NVB0CC_CTRL_FREE_PMA_STREAM_PARAMS *src = pParams; + + if (src && dest) + { + dest->pmaChannelIdx = src->pmaChannelIdx; + } + else + return FAILURE_T; + +#endif + return SUCCESS_T; +} + +static +return_t serialize_NV2080_CTRL_GR_PC_SAMPLING_MODE_PARAMS_v1A_1F(NV2080_CTRL_GR_PC_SAMPLING_MODE_PARAMS *pParams, + NvU8 *buffer, + NvU32 bufferSize, + NvU32 *offset) +{ +#ifdef COPY_INPUT_PARAMETERS + NV2080_CTRL_GR_PC_SAMPLING_MODE_PARAMS_v1A_1F *dest = (void*)(buffer); + NV2080_CTRL_GR_PC_SAMPLING_MODE_PARAMS *src = pParams; + + if (src && dest) + { + dest->hChannel = src->hChannel; + dest->samplingMode = src->samplingMode; + dest->grRouteInfo.flags = src->grRouteInfo.flags; + dest->grRouteInfo.route = src->grRouteInfo.route; + } + else + return FAILURE_T; + +#endif + return SUCCESS_T; +} + +static +return_t serialize_NV2080_CTRL_CMD_TIMER_SET_GR_TICK_FREQ_PARAMS_v1A_1F(NV2080_CTRL_CMD_TIMER_SET_GR_TICK_FREQ_PARAMS *pParams, + NvU8 *buffer, + NvU32 bufferSize, + NvU32 *offset) +{ +#ifdef COPY_INPUT_PARAMETERS + NV2080_CTRL_CMD_TIMER_SET_GR_TICK_FREQ_PARAMS_v1A_1F *dest = (void*)(buffer); + NV2080_CTRL_CMD_TIMER_SET_GR_TICK_FREQ_PARAMS *src = pParams; + + if (src && dest) + { + dest->bSetMaxFreq = src->bSetMaxFreq; + } + else + return FAILURE_T; + +#endif + return SUCCESS_T; +} + +static +return_t serialize_NV2080_CTRL_PERF_RATED_TDP_STATUS_PARAMS_v1A_1F(NV2080_CTRL_PERF_RATED_TDP_STATUS_PARAMS *pParams, + NvU8 *buffer, + NvU32 bufferSize, + NvU32 *offset) +{ #ifdef COPY_OUTPUT_PARAMETERS NV2080_CTRL_PERF_RATED_TDP_STATUS_PARAMS_v1A_1F *dest = (void*)(buffer); NV2080_CTRL_PERF_RATED_TDP_STATUS_PARAMS *src = pParams; @@ -4826,70 +4886,6 @@ return_t serialize_NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS_v1E_06(NV0090_CTRL_GET_ } #endif -#ifdef BUILD_LEGACY_RPCS -return_t serialize_NV2080_CTRL_FLCN_GET_CTX_BUFFER_SIZE_PARAMS_v1E_0A( - NV2080_CTRL_FLCN_GET_CTX_BUFFER_SIZE_PARAMS *pParams, - NvU8 *buffer, - NvU32 bufferSize, - NvU32 *offset) -{ - NV2080_CTRL_FLCN_GET_CTX_BUFFER_SIZE_PARAMS_v1E_0A *dest = (void*)(buffer); - NV2080_CTRL_FLCN_GET_CTX_BUFFER_SIZE_PARAMS *src = pParams; - - if (src && dest) - { -#ifdef COPY_INPUT_PARAMETERS - dest->hChannel = src->hChannel; -#endif -#ifdef COPY_OUTPUT_PARAMETERS - dest->totalBufferSize = src->totalBufferSize; -#endif - } - else - return FAILURE_T; - - return SUCCESS_T; -} -#endif - -#ifdef BUILD_LEGACY_RPCS -return_t serialize_NV2080_CTRL_FLCN_GET_CTX_BUFFER_INFO_PARAMS_v1E_0A( - NV2080_CTRL_FLCN_GET_CTX_BUFFER_INFO_PARAMS *pParams, - NvU8 *buffer, - NvU32 bufferSize, - NvU32 *offset) -{ - NV2080_CTRL_FLCN_GET_CTX_BUFFER_INFO_PARAMS_v1E_0A *dest = (void*)(buffer); - NV2080_CTRL_FLCN_GET_CTX_BUFFER_INFO_PARAMS *src = pParams; - - if (src && dest) - { -#ifdef COPY_INPUT_PARAMETERS - dest->hUserClient = src->hUserClient; - dest->hChannel = src->hChannel; -#endif -#ifdef COPY_OUTPUT_PARAMETERS - dest->alignment = src->alignment; - dest->size = src->size; - dest->bufferHandle = src->bufferHandle; - dest->pageCount = src->pageCount; - dest->physAddr = src->physAddr; - dest->aperture = src->aperture; - dest->kind = src->kind; - dest->pageSize = src->pageSize; - dest->bIsContigous = src->bIsContigous; - dest->bDeviceDescendant = src->bDeviceDescendant; - portMemCopy(dest->uuid, sizeof(dest->uuid), - src->uuid, sizeof(src->uuid)); -#endif - } - else - return FAILURE_T; - - return SUCCESS_T; -} -#endif - #ifdef BUILD_COMMON_RPCS static return_t serialize_NV00F8_CTRL_DESCRIBE_PARAMS_v1E_0C( @@ -5357,7 +5353,6 @@ return_t serialize_NV83DE_CTRL_DEBUG_GET_MODE_MMU_DEBUG_PARAMS_v25_04(NV83DE_CTR #endif #endif -#endif //GSP_FW_BUILD #if defined(BUILD_COMMON_RPCS) static @@ -5423,443 +5418,7 @@ return_t deserialize_NV2080_CTRL_FB_GET_INFO_V2_PARAMS_v25_0A(NV2080_CTRL_FB_GET } #endif // defined(BUILD_COMMON_RPCS) -#ifndef GSP_FW_BUILD #ifdef BUILD_COMMON_RPCS -#ifndef RESMAN_BUILD -/** - * Copy static info from `buffer` to local VGPU_STATIC_INFO `pVSI` or vice versa. - * This routine is built into host (VMIOP) and guest (RM). - * VGPU host populates its local VGPU_STATIC_INFO struct and uses this function to serialize - * struct members into `buffer`. - * VGPU guest calls GET_CONSOLIDATED_STATIC_INFO RPC to receive `buffer`, and calls this routine - * to deserialize struct members from `buffer` into guest's VGPU_STATIC_INFO. - * - * Serialization and deserialization happens according to negotiated RPC protocol version. - * Struct members in VGPU_STATIC_INFO must not be reordered. Any additions to - * VGPU_STATIC_INFO should be done at the end of the struct, and handled in this function by - * checking for protocol version. - */ -static NV_STATUS consolidated_static_info_copy(OBJRPCSTRUCTURECOPY *pObjRpcStructureCopy, - VGPU_STATIC_INFO *pVSI, - NvU8 *buffer, NvU32 bufferSize, NvU32 *offset, - NvBool bAlignOffset) -{ - NV_STATUS status = NVOS_STATUS_SUCCESS; - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_CLK_GET_DOMAINS_PARAMS)(pObjRpcStructureCopy, - &pVSI->clkDomains, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_CLK_GET_PUBLIC_DOMAINS_PARAMS)(pObjRpcStructureCopy, - &pVSI->clkPublicDomains, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_FB_GET_LTC_INFO_FOR_FBP_PARAMS)(pObjRpcStructureCopy, - NULL, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_PERF_GET_TABLE_INFO_PARAMS)(pObjRpcStructureCopy, - &pVSI->perfTableInfo, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(vgpuPstateInfo)(pObjRpcStructureCopy, - &pVSI->pstateInfo, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(VGPU_DISPLAYLESS_INFO)(pObjRpcStructureCopy, - pVSI, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(VGPU_STATIC_INFO)(pObjRpcStructureCopy, - pVSI, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_MC_GET_ENGINE_NOTIFICATION_INTR_VECTORS_PARAMS)(pObjRpcStructureCopy, - &pVSI->mcEngineNotificationIntrVectors, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(VGPU_STATIC_INFO2)(pObjRpcStructureCopy, - pVSI, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_CLK_GET_PUBLIC_DOMAIN_INFO_V2_PARAMS)(pObjRpcStructureCopy, - &pVSI->clkPublicDomainInfo, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_GR_GET_ZCULL_INFO_PARAMS)(pObjRpcStructureCopy, - &pVSI->grZcullInfo, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(VGPU_STATIC_PROPERTIES)(pObjRpcStructureCopy, - &pVSI->vgpuStaticProperties, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(VGPU_FIFO_GET_DEVICE_INFO_TABLE)(pObjRpcStructureCopy, - &pVSI->fifoDeviceInfoTable, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(VGPU_FB_GET_DYNAMIC_BLACKLISTED_PAGES)(pObjRpcStructureCopy, - &pVSI->fbDynamicBlacklistedPages, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(VGPU_BSP_GET_CAPS)(pObjRpcStructureCopy, - &pVSI->vgpuBspCaps, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_PERF_VPSTATES_INFO)(pObjRpcStructureCopy, - &pVSI->perfVpstatesInfo, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - if (getIpVersion() < 0x1A0D0000) { - goto end; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(VGPU_GET_LATENCY_BUFFER_SIZE)(pObjRpcStructureCopy, - &pVSI->fifoLatencyBufferSize, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(VGPU_CE_GET_CAPS_V2)(pObjRpcStructureCopy, - &pVSI->ceCaps, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS)(pObjRpcStructureCopy, - &pVSI->nvlinkCaps, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(VGPU_FB_GET_LTC_INFO_FOR_FBP)(pObjRpcStructureCopy, - &pVSI->fbLtcInfoForFbp, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - if (getIpVersion() < 0x1A0F0000) { - goto end; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_BUS_GET_INFO_V2_PARAMS)(pObjRpcStructureCopy, - &pVSI->busGetInfoV2, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_FLA_GET_RANGE_PARAMS)(pObjRpcStructureCopy, - &pVSI->flaInfo, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - if (getIpVersion() < 0x1A190000) { - goto end; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NVA080_CTRL_VGPU_GET_CONFIG_PARAMS)(pObjRpcStructureCopy, - &pVSI->vgpuConfig, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - if (getIpVersion() < 0x1A1F0000) { - goto end; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS)(pObjRpcStructureCopy, - &pVSI->grSmIssueRateModifier, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - if (getIpVersion() < 0x1E090000) { - goto end; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS)(pObjRpcStructureCopy, - &pVSI->mcStaticIntrTable, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - if (getIpVersion() < 0x1F080000) { - goto end; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS)(pObjRpcStructureCopy, - &pVSI->pcieSupportedGpuAtomics, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - if (getIpVersion() < 0x210A0000) { - goto end; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS)(pObjRpcStructureCopy, - &pVSI->ceGetAllCaps, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - if (getIpVersion() < 0x22010000) { - goto end; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_CMD_BUS_GET_C2C_INFO_PARAMS)(pObjRpcStructureCopy, - &pVSI->c2cInfo, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - if (getIpVersion() < 0x23020000) { - goto end; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_PERF_PSTATES_INFO)(pObjRpcStructureCopy, - &pVSI->perfpstatesInfo, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - if (getIpVersion() < 0x25000000) { - goto end; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV0080_CTRL_MSENC_GET_CAPS_V2_PARAMS)(pObjRpcStructureCopy, - &pVSI->nvencCaps, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - if (getIpVersion() < 0x25010000) { - goto end; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_GPU_GET_CONSTRUCTED_FALCON_INFO_PARAMS)(pObjRpcStructureCopy, - &pVSI->constructedFalconInfo, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - if (getIpVersion() < 0x25030000) { - goto end; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(VGPU_P2P_CAPABILITY_PARAMS)(pObjRpcStructureCopy, - &pVSI->p2pCaps, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - if (getIpVersion() < 0x25050000) { - goto end; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS)(pObjRpcStructureCopy, - &pVSI->deviceInfoTable, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - if (getIpVersion() < 0x25060000) { - goto end; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_INTERNAL_MEMSYS_GET_STATIC_CONFIG_PARAMS)(pObjRpcStructureCopy, - &pVSI->memsysStaticConfig, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - - if (getIpVersion() < 0x250B0000) { - goto end; - } - - NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) - status = serialize_deserialize(NV2080_CTRL_CMD_BUS_GET_PCIE_REQ_ATOMICS_CAPS_PARAMS)(pObjRpcStructureCopy, - &pVSI->busGetPcieReqAtomicsCaps, - buffer, - bufferSize, - offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } - -end: - return status; -} -#endif // RESMAN_BUILD static NV_STATUS static_data_copy(OBJRPCSTRUCTURECOPY *pObjRpcStructureCopy, VGPU_STATIC_INFO *pVSI, @@ -5978,6 +5537,7 @@ static NV_STATUS static_data_copy(OBJRPCSTRUCTURECOPY *pObjRpcStructureCopy, return status; } + // Unused NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) status = serialize_deserialize(NV2080_CTRL_GR_GET_ZCULL_INFO_PARAMS)(pObjRpcStructureCopy, &pVSI->grZcullInfo, @@ -6098,6 +5658,7 @@ static NV_STATUS static_data_copy(OBJRPCSTRUCTURECOPY *pObjRpcStructureCopy, return status; } + // Unused NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) status = serialize_deserialize(NV2080_CTRL_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS)(pObjRpcStructureCopy, &pVSI->grSmIssueRateModifier, @@ -6228,9 +5789,24 @@ static NV_STATUS static_data_copy(OBJRPCSTRUCTURECOPY *pObjRpcStructureCopy, buffer, bufferSize, offset); - if (status != NVOS_STATUS_SUCCESS) { - return status; - } + if (status != NVOS_STATUS_SUCCESS) { + return status; + } + + if (getIpVersion() < 0x26010000) { + goto end; + } + + NV_CHECK_AND_ALIGN_OFFSET(*offset, bAlignOffset) + status = serialize_deserialize(GPU_EXEC_SYSPIPE_INFO)(pObjRpcStructureCopy, + &pVSI->execSyspipeInfo, + buffer, + bufferSize, + offset); + if (status != NVOS_STATUS_SUCCESS) { + return status; + } + end: return status; } @@ -6356,7 +5932,6 @@ static NV_STATUS consolidated_gr_static_info_copy(OBJRPCSTRUCTURECOPY *pObjRpcSt return status; } #endif -#endif #if defined(CROSS_BRANCH_CONVERT) diff --git a/src/nvidia/kernel/inc/vgpu/rpc.h b/src/nvidia/inc/kernel/vgpu/rpc.h similarity index 92% rename from src/nvidia/kernel/inc/vgpu/rpc.h rename to src/nvidia/inc/kernel/vgpu/rpc.h index 57c0546b0f..b540c9e344 100644 --- a/src/nvidia/kernel/inc/vgpu/rpc.h +++ b/src/nvidia/inc/kernel/vgpu/rpc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2008-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2008-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -46,66 +46,67 @@ typedef struct ContextDma ContextDma; #define NV_RM_RPC_ALLOC_SHARE_DEVICE_FWCLIENT(pGpu, hclient, hdevice, hclientshare, htargetclient, htargetdevice, hclass, \ - allocflags, vasize, vamode, bFirstDevice, status) \ - do \ - { \ - RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); \ - NV0000_ALLOC_PARAMETERS root_alloc_params = {0}; \ - \ - root_alloc_params.hClient = hclient; \ - \ - if (!IsT234DorBetter(pGpu)) \ - { \ - RmClient *pClient = serverutilGetClientUnderLock(hclient); \ - \ - /* Get process ID from the client database */ \ - if (pClient != NULL) \ - { \ - CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); \ - NV_ASSERT_OR_RETURN(pCallContext != NULL, NV_ERR_INVALID_STATE); \ - \ - if (pCallContext->secInfo.privLevel >= RS_PRIV_LEVEL_KERNEL) \ - { \ - root_alloc_params.processID = KERNEL_PID; \ - } \ - else \ - { \ - root_alloc_params.processID = pClient->ProcID; \ - NV_ASSERT(root_alloc_params.processID == osGetCurrentProcess()); \ - } \ - } \ - else \ - NV_ASSERT(0); \ - } \ - \ - if (bFirstDevice) \ - { \ - status = pRmApi->AllocWithHandle(pRmApi, hclient, NV01_NULL_OBJECT, \ - NV01_NULL_OBJECT, NV01_ROOT, \ - &root_alloc_params, sizeof(root_alloc_params)); \ - } \ - else \ - { \ - status = NV_OK; \ - } \ - \ - if (status == NV_OK) \ - { \ - NV0080_ALLOC_PARAMETERS device_alloc_params = {0}; \ - \ - device_alloc_params.hClientShare = hclientshare; \ - device_alloc_params.hTargetClient = htargetclient; \ - device_alloc_params.hTargetDevice = htargetdevice; \ - device_alloc_params.flags = allocflags; \ - device_alloc_params.vaSpaceSize = vasize; \ - \ - status = pRmApi->AllocWithHandle(pRmApi, hclient, hclient, hdevice, \ - hclass, &device_alloc_params, \ - sizeof(device_alloc_params)); \ - } \ - else \ - NV_ASSERT(0); \ - } \ + allocflags, vasize, vamode, bFirstDevice, status) \ + do \ + { \ + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); \ + NV0000_ALLOC_PARAMETERS root_alloc_params = {0}; \ + \ + root_alloc_params.hClient = hclient; \ + \ + if (!IsT234DorBetter(pGpu)) \ + { \ + RmClient *pClient = serverutilGetClientUnderLock(hclient); \ + \ + /* Get process ID from the client database */ \ + if (pClient != NULL) \ + { \ + CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); \ + NV_ASSERT_OR_RETURN(pCallContext != NULL, NV_ERR_INVALID_STATE); \ + \ + if (RMCFG_FEATURE_PLATFORM_UNIX && \ + (pCallContext->secInfo.privLevel >= RS_PRIV_LEVEL_KERNEL)) \ + { \ + root_alloc_params.processID = KERNEL_PID; \ + } \ + else \ + { \ + root_alloc_params.processID = pClient->ProcID; \ + NV_ASSERT(root_alloc_params.processID == osGetCurrentProcess()); \ + } \ + } \ + else \ + NV_ASSERT(0); \ + } \ + \ + if (bFirstDevice) \ + { \ + status = pRmApi->AllocWithHandle(pRmApi, hclient, NV01_NULL_OBJECT, \ + NV01_NULL_OBJECT, NV01_ROOT, \ + &root_alloc_params, sizeof(root_alloc_params)); \ + } \ + else \ + { \ + status = NV_OK; \ + } \ + \ + if (status == NV_OK) \ + { \ + NV0080_ALLOC_PARAMETERS device_alloc_params = {0}; \ + \ + device_alloc_params.hClientShare = hclientshare; \ + device_alloc_params.hTargetClient = htargetclient; \ + device_alloc_params.hTargetDevice = htargetdevice; \ + device_alloc_params.flags = allocflags; \ + device_alloc_params.vaSpaceSize = vasize; \ + \ + status = pRmApi->AllocWithHandle(pRmApi, hclient, hclient, hdevice, \ + hclass, &device_alloc_params, \ + sizeof(device_alloc_params)); \ + } \ + else \ + NV_ASSERT(0); \ + } \ while (0) #define NV_RM_RPC_ALLOC_MEMORY(pGpu, hclient, hdevice, hmemory, hclass, \ @@ -240,19 +241,6 @@ typedef struct ContextDma ContextDma; status = NV_ERR_INSUFFICIENT_RESOURCES; \ } while (0) -#define NV_RM_RPC_API_CONTROL(pGpu, hClient, hObject, cmd, pParams, paramSize, status) \ - do \ - { \ - OBJRPC *pRpc = GPU_GET_RPC(pGpu); \ - NV_ASSERT(pRpc != NULL); \ - if ((status == NV_OK) && (pRpc != NULL)) \ - { \ - status = rpcRmApiControl_HAL(pGpu, pRpc, hClient, hObject, \ - cmd, pParams, paramSize); \ - } else if (pRpc == NULL) \ - status = NV_ERR_INSUFFICIENT_RESOURCES; \ - } while (0) - #define NV_RM_RPC_ALLOC_CHANNEL(pGpu, hclient, hparent, hchannel, hclass, \ pGpfifoAllocParams, pchid, status) \ do \ @@ -607,15 +595,6 @@ static inline void NV_RM_RPC_PMA_SCRUBBER_SHARED_BUFFER_GUEST_PAGES_OPERATION(OB status = NV_ERR_INSUFFICIENT_RESOURCES; \ } while (0) -#define NV_RM_RPC_RMFS_INIT(pGpu, statusQueueMemDesc, status) do {} while(0) - -#define NV_RM_RPC_RMFS_CLOSE_QUEUE(pGpu, status) do {} while(0) - -#define NV_RM_RPC_RMFS_CLEANUP(pGpu, status) do {} while(0) - -#define NV_RM_RPC_RMFS_TEST(pGpu, numReps, testData1, testData2, \ - testData3, status) do {} while(0) - void teardownSysmemPfnBitMap(OBJGPU *pGpu, OBJVGPU *pVGpu); NV_STATUS RmRpcPerfGetCurrentPstate(OBJGPU *pGpu, NV2080_CTRL_PERF_GET_CURRENT_PSTATE_PARAMS *pParamStructPtr); diff --git a/src/nvidia/kernel/inc/vgpu/rpc_global_enums.h b/src/nvidia/inc/kernel/vgpu/rpc_global_enums.h similarity index 98% rename from src/nvidia/kernel/inc/vgpu/rpc_global_enums.h rename to src/nvidia/inc/kernel/vgpu/rpc_global_enums.h index 0cb029e616..77785ff246 100644 --- a/src/nvidia/kernel/inc/vgpu/rpc_global_enums.h +++ b/src/nvidia/inc/kernel/vgpu/rpc_global_enums.h @@ -1,6 +1,7 @@ #ifndef _RPC_GLOBAL_ENUMS_H_ #define _RPC_GLOBAL_ENUMS_H_ +// Deprecated RPC's numbers cannot be reused in order to not break compatibility #ifndef X # define X(UNIT, RPC, VAL) NV_VGPU_MSG_FUNCTION_##RPC = VAL, # define DEFINING_X_IN_RPC_GLOBAL_ENUMS_H @@ -22,7 +23,7 @@ enum { X(RM, UNMAP_MEMORY, 13) X(RM, MAP_MEMORY_DMA, 14) X(RM, UNMAP_MEMORY_DMA, 15) - X(RM, GET_EDID, 16) + X(RM, GET_EDID, 16) // deprecated X(RM, ALLOC_DISP_CHANNEL, 17) X(RM, ALLOC_DISP_OBJECT, 18) X(RM, ALLOC_SUBDEVICE, 19) @@ -45,7 +46,7 @@ enum { X(RM, SIM_ESCAPE_WRITE, 36) X(RM, SIM_MANAGE_DISPLAY_CONTEXT_DMA, 37) X(RM, FREE_VIDMEM_VIRT, 38) - X(RM, PERF_GET_PSTATE_INFO, 39) // deprecated for vGPU, used by GSP + X(RM, PERF_GET_PSTATE_INFO, 39) // deprecated X(RM, PERF_GET_PERFMON_SAMPLE, 40) X(RM, PERF_GET_VIRTUAL_PSTATE_INFO, 41) // deprecated X(RM, PERF_GET_LEVEL_INFO, 42) @@ -72,10 +73,10 @@ enum { X(RM, VGPU_PF_REG_READ32, 63) // deprecated X(RM, SET_GUEST_SYSTEM_INFO_EXT, 64) X(GSP, GET_GSP_STATIC_INFO, 65) - X(RM, RMFS_INIT, 66) - X(RM, RMFS_CLOSE_QUEUE, 67) - X(RM, RMFS_CLEANUP, 68) - X(RM, RMFS_TEST, 69) + X(RM, RMFS_INIT, 66) // deprecated + X(RM, RMFS_CLOSE_QUEUE, 67) // deprecated + X(RM, RMFS_CLEANUP, 68) // deprecated + X(RM, RMFS_TEST, 69) // deprecated X(RM, UPDATE_BAR_PDE, 70) X(RM, CONTINUATION_RECORD, 71) X(RM, GSP_SET_SYSTEM_INFO, 72) @@ -129,7 +130,7 @@ enum { X(RM, CTRL_DMA_SET_DEFAULT_VASPACE, 120) X(RM, CTRL_GET_CE_PCE_MASK, 121) X(RM, CTRL_GET_ZBC_CLEAR_TABLE_ENTRY, 122) - X(RM, CTRL_GET_NVLINK_PEER_ID_MASK, 123) + X(RM, CTRL_GET_NVLINK_PEER_ID_MASK, 123) // deprecated X(RM, CTRL_GET_NVLINK_STATUS, 124) X(RM, CTRL_GET_P2P_CAPS, 125) X(RM, CTRL_GET_P2P_CAPS_MATRIX, 126) @@ -217,7 +218,8 @@ enum { X(RM, RESERVED_208, 208) X(RM, CTRL_GPU_GET_INFO_V2, 209) X(RM, GET_BRAND_CAPS, 210) - X(RM, NUM_FUNCTIONS, 211) + X(RM, CTRL_CMD_NVLINK_INBAND_SEND_DATA, 211) + X(RM, NUM_FUNCTIONS, 212) #ifdef DEFINING_X_IN_RPC_GLOBAL_ENUMS_H }; # undef X @@ -263,7 +265,8 @@ enum { E(UPDATE_GSP_TRACE, 0x101e) E(NVLINK_FATAL_ERROR_RECOVERY, 0x101f) E(GSP_POST_NOCAT_RECORD, 0x1020) - E(NUM_EVENTS, 0x1021) + E(FECS_ERROR, 0x1021) + E(NUM_EVENTS, 0x1022) #ifdef DEFINING_E_IN_RPC_GLOBAL_ENUMS_H }; # undef E diff --git a/src/nvidia/kernel/inc/vgpu/rpc_headers.h b/src/nvidia/inc/kernel/vgpu/rpc_headers.h similarity index 97% rename from src/nvidia/kernel/inc/vgpu/rpc_headers.h rename to src/nvidia/inc/kernel/vgpu/rpc_headers.h index eff711963b..0e622f0471 100644 --- a/src/nvidia/kernel/inc/vgpu/rpc_headers.h +++ b/src/nvidia/inc/kernel/vgpu/rpc_headers.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2017-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -195,6 +195,14 @@ typedef enum RPC_GR_BUFFER_TYPE_GRAPHICS_MAX = 13, } RPC_GR_BUFFER_TYPE; +typedef enum +{ + FECS_ERROR_EVENT_TYPE_NONE = 0, + FECS_ERROR_EVENT_TYPE_BUFFER_RESET_REQUIRED = 1, + FECS_ERROR_EVENT_TYPE_BUFFER_FULL = 2, + FECS_ERROR_EVENT_TYPE_MAX = 3, +} FECS_ERROR_EVENT_TYPE; + /* * Maximum entries that can be sent in a single pass of RPC. */ diff --git a/src/nvidia/kernel/inc/vgpu/rpc_vgpu.h b/src/nvidia/inc/kernel/vgpu/rpc_vgpu.h similarity index 91% rename from src/nvidia/kernel/inc/vgpu/rpc_vgpu.h rename to src/nvidia/inc/kernel/vgpu/rpc_vgpu.h index 76090de057..841e9f0a90 100644 --- a/src/nvidia/kernel/inc/vgpu/rpc_vgpu.h +++ b/src/nvidia/inc/kernel/vgpu/rpc_vgpu.h @@ -39,7 +39,6 @@ static NV_INLINE void NV_RM_RPC_ALLOC_VIDMEM(OBJGPU *pGpu, ...) { } static NV_INLINE void NV_RM_RPC_ALLOC_VIRTMEM(OBJGPU *pGpu, ...) { } static NV_INLINE void NV_RM_RPC_MAP_MEMORY(OBJGPU *pGpu, ...) { } static NV_INLINE void NV_RM_RPC_UNMAP_MEMORY(OBJGPU *pGpu, ...) { } -static NV_INLINE void NV_RM_RPC_READ_EDID(OBJGPU *pGpu, ...) { } static NV_INLINE void NV_RM_RPC_DMA_FILL_PTE_MEM(OBJGPU *pGpu, ...) { } static NV_INLINE void NV_RM_RPC_CREATE_FB_SEGMENT(OBJGPU *pGpu, ...) { } static NV_INLINE void NV_RM_RPC_DESTROY_FB_SEGMENT(OBJGPU *pGpu, ...) { } @@ -48,9 +47,7 @@ static NV_INLINE void NV_RM_RPC_REMOVE_DEFERRED_API(OBJGPU *pGpu, ...) { } static NV_INLINE void NV_RM_RPC_FREE_VIDMEM_VIRT(OBJGPU *pGpu, ...) { } static NV_INLINE void NV_RM_RPC_MAP_SEMA_MEMORY(OBJGPU *pGpu, ...) { } static NV_INLINE void NV_RM_RPC_UNMAP_SEMA_MEMORY(OBJGPU *pGpu, ...) { } -static NV_INLINE void NV_RM_RPC_TDR_SET_TIMEOUT_STATE(OBJGPU *pGpu, ...) { } static NV_INLINE void NV_RM_RPC_GET_CONSOLIDATED_STATIC_INFO(OBJGPU *pGpu, ...) { } -static NV_INLINE void NV_RM_RPC_GET_STATIC_PSTATE_INFO(OBJGPU *pGpu, ...) { } static NV_INLINE void NV_RM_RPC_UPDATE_PDE_2(OBJGPU *pGpu, ...) { } static NV_INLINE void NV_RM_RPC_TRANSLATE_GUEST_GPU_PTES(OBJGPU *pGpu, ...) { } static NV_INLINE void NV_RM_RPC_SET_SEMA_MEM_VALIDATION_STATE(OBJGPU *pGpu, ...) { } @@ -171,4 +168,17 @@ static NV_INLINE void NV_RM_RPC_UPDATE_GPU_PDES(OBJGPU *pGpu, ...) { } pParamStructPtr, paramSize); \ } while(0) \ +#define NV_RM_RPC_API_CONTROL(pGpu, hClient, hObject, cmd, pParams, paramSize, status) \ + do \ + { \ + OBJRPC *pRpc = GPU_GET_RPC(pGpu); \ + NV_ASSERT(pRpc != NULL); \ + if ((status == NV_OK) && (pRpc != NULL)) \ + { \ + status = rpcRmApiControl_HAL(pGpu, pRpc, hClient, hObject, \ + cmd, pParams, paramSize); \ + } else if (pRpc == NULL) \ + status = NV_ERR_INSUFFICIENT_RESOURCES; \ + } while (0) + #endif // __vgpu_dev_nv_rpc_vgpu_h__ diff --git a/src/nvidia/kernel/inc/vgpu/sdk-structures.h b/src/nvidia/inc/kernel/vgpu/sdk-structures.h similarity index 97% rename from src/nvidia/kernel/inc/vgpu/sdk-structures.h rename to src/nvidia/inc/kernel/vgpu/sdk-structures.h index e4af860063..1c2833de53 100644 --- a/src/nvidia/kernel/inc/vgpu/sdk-structures.h +++ b/src/nvidia/inc/kernel/vgpu/sdk-structures.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -146,6 +146,7 @@ typedef struct vmiopd_SM_info { #define NV2080_CTRL_MIGRATABLE_OPS_ARRAY_MAX_v21_07 50 #define NV2080_CTRL_MAX_PCES_v21_0A 32 #define NV2080_CTRL_CE_CAPS_TBL_SIZE_v21_0A 2 +#define NV2080_CTRL_NVLINK_INBAND_MAX_DATA_SIZE_v26_05 1024 // Host USM type #define NV_VGPU_CONFIG_USM_TYPE_DEFAULT 0x00000000 /* R-XVF */ @@ -154,6 +155,8 @@ typedef struct vmiopd_SM_info { #define NV_VGPU_CONFIG_USM_TYPE_GEFORCE 0x00000003 /* R-XVF */ #define NV_VGPU_CONFIG_USM_TYPE_COMPUTE 0x00000004 /* R-XVF */ +#define NV_ALLOC_STRUCTURE_SIZE_v26_00 56 + // Defined this intermediate RM-RPC structure for making RPC call from Guest as // we have the restriction of passing max 4kb of data to plugin and the // NV0000_CTRL_GPUACCT_GET_ACCOUNTING_PIDS_PARAMS is way more than that. @@ -196,6 +199,7 @@ typedef struct VGPU_BSP_CAPS #define NV2080_CTRL_GPU_ECC_UNIT_COUNT_v1C_09 (0x00000016) #define NV2080_CTRL_GPU_ECC_UNIT_COUNT_v20_03 (0x00000018) #define NV2080_CTRL_GPU_ECC_UNIT_COUNT_v24_06 (0x00000019) +#define NV2080_CTRL_GPU_ECC_UNIT_COUNT_v26_02 (0x0000001E) #define NV2080_ENGINE_TYPE_LAST_v18_01 (0x0000002a) #define NV2080_ENGINE_TYPE_LAST_v1C_09 (0x00000034) @@ -261,6 +265,8 @@ typedef struct VGPU_BSP_CAPS #define NV2080_CTRL_GPU_INFO_MAX_LIST_SIZE_v25_11 0x00000041 +#define NV2080_CTRL_BOARDOBJGRP_E255_MAX_OBJECTS_v06_01 (255U) + typedef struct _GPU_PARTITION_INFO { NvU32 swizzId; @@ -311,6 +317,7 @@ typedef struct _VGPU_STATIC_PROPERTIES NvBool bDebuggingEnabled; NvU32 channelCount; NvBool bPblObjNotPresent; //Valid only in case of GA100 SRIOV Heavy + NvU64 vmmuSegmentSize; } VGPU_STATIC_PROPERTIES; struct _vgpu_static_info @@ -340,7 +347,7 @@ struct _vgpu_static_info NvBool bPerRunlistChannelRamEnabled; NvU32 subProcessIsolation; VGPU_STATIC_PROPERTIES vgpuStaticProperties; - NvU64 maxSupportedPageSize; + NvU64 maxSupportedPageSize; // Only used pre-SRIOV/SRIOV-heavy GPU_PARTITION_INFO gpuPartitionInfo; // Default (Admin created) EXEC-I PARTITION INFO NvBool bC2CLinkUp; NvBool bSelfHostedMode; @@ -392,6 +399,7 @@ struct _vgpu_static_info NV9096_CTRL_GET_ZBC_CLEAR_TABLE_SIZE_PARAMS zbcTableSizes[NV9096_CTRL_ZBC_CLEAR_TABLE_TYPE_COUNT]; NV2080_CTRL_CMD_BUS_GET_PCIE_REQ_ATOMICS_CAPS_PARAMS busGetPcieReqAtomicsCaps; NV90E6_CTRL_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK_PARAMS masterGetVfErrCntIntMsk; + GPU_EXEC_SYSPIPE_INFO execSyspipeInfo; }; typedef struct _vgpu_static_info VGPU_STATIC_INFO, VGPU_STATIC_INFO2; @@ -406,7 +414,7 @@ typedef NV2080_CTRL_CE_GET_CAPS_V2_PARAMS VGPU_CE_GET_CAPS_V2[NV2080_ENGINE_TYPE typedef struct GSP_FIRMWARE GSP_FIRMWARE; -ct_assert(NV2080_CTRL_GPU_ECC_UNIT_COUNT == NV2080_CTRL_GPU_ECC_UNIT_COUNT_v24_06); +ct_assert(NV2080_CTRL_GPU_ECC_UNIT_COUNT == NV2080_CTRL_GPU_ECC_UNIT_COUNT_v26_02); ct_assert(NV2080_ENGINE_TYPE_LAST == 0x40); ct_assert(NV2080_CTRL_BUS_INFO_MAX_LIST_SIZE == NV2080_CTRL_BUS_INFO_MAX_LIST_SIZE_v1C_09); ct_assert(NV2080_CTRL_FB_FS_INFO_MAX_QUERIES == NV2080_CTRL_FB_FS_INFO_MAX_QUERIES_v24_00); @@ -457,7 +465,7 @@ ct_assert(NV0080_CTRL_GR_CAPS_TBL_SIZE_v25_0E == NV0080_CTRL_GR_CAPS_TBL_SIZE); ct_assert(NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_CONTEXT_POOL_v25_0E == NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_CONTEXT_POOL); ct_assert(RPC_GR_BUFFER_TYPE_GRAPHICS_MAX_v25_0E == RPC_GR_BUFFER_TYPE_GRAPHICS_MAX); ct_assert(NV9096_CTRL_ZBC_CLEAR_TABLE_TYPE_COUNT_v1A_07 == NV9096_CTRL_ZBC_CLEAR_TABLE_TYPE_COUNT); +ct_assert(NVC637_CTRL_MAX_EXEC_PARTITIONS_v18_05 == NVC637_CTRL_MAX_EXEC_PARTITIONS); ct_assert(NV2080_CTRL_GPU_INFO_MAX_LIST_SIZE_v25_11 == NV2080_CTRL_GPU_INFO_MAX_LIST_SIZE); #endif /*_RPC_SDK_STRUCTURES_H_*/ - diff --git a/src/nvidia/kernel/inc/vgpu/vgpu_events.h b/src/nvidia/inc/kernel/vgpu/vgpu_events.h similarity index 100% rename from src/nvidia/kernel/inc/vgpu/vgpu_events.h rename to src/nvidia/inc/kernel/vgpu/vgpu_events.h diff --git a/src/nvidia/kernel/inc/vgpu/vgpu_guest_pma_scrubber.h b/src/nvidia/inc/kernel/vgpu/vgpu_guest_pma_scrubber.h similarity index 100% rename from src/nvidia/kernel/inc/vgpu/vgpu_guest_pma_scrubber.h rename to src/nvidia/inc/kernel/vgpu/vgpu_guest_pma_scrubber.h diff --git a/src/nvidia/kernel/inc/vgpu/vgpu_util.h b/src/nvidia/inc/kernel/vgpu/vgpu_util.h similarity index 97% rename from src/nvidia/kernel/inc/vgpu/vgpu_util.h rename to src/nvidia/inc/kernel/vgpu/vgpu_util.h index 4bf085983b..c9982ab55b 100644 --- a/src/nvidia/kernel/inc/vgpu/vgpu_util.h +++ b/src/nvidia/inc/kernel/vgpu/vgpu_util.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/kernel/inc/vgpu/vgpu_version.h b/src/nvidia/inc/kernel/vgpu/vgpu_version.h similarity index 95% rename from src/nvidia/kernel/inc/vgpu/vgpu_version.h rename to src/nvidia/inc/kernel/vgpu/vgpu_version.h index 95f43596ed..10eb93de0d 100644 --- a/src/nvidia/kernel/inc/vgpu/vgpu_version.h +++ b/src/nvidia/inc/kernel/vgpu/vgpu_version.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2008-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2008-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -30,8 +30,8 @@ #define RPC_VERSION_FROM_VGX_VERSION(major, minor) ( DRF_NUM(_RPC, _VERSION_NUMBER, _MAJOR, major) | \ DRF_NUM(_RPC, _VERSION_NUMBER, _MINOR, minor)) -#define VGX_MAJOR_VERSION_NUMBER 0x25 -#define VGX_MINOR_VERSION_NUMBER 0x1B +#define VGX_MAJOR_VERSION_NUMBER 0x26 +#define VGX_MINOR_VERSION_NUMBER 0x05 #define VGX_MAJOR_VERSION_NUMBER_VGPU_12_0 0x1A #define VGX_MINOR_VERSION_NUMBER_VGPU_12_0 0x18 @@ -51,6 +51,7 @@ * 2. This is the first break in migration compatibility after a release. */ #define NV_VGPU_GRIDSW_INTERNAL_TO_EXTERNAL_VERSION_MAPPING \ + {{0x26, 0x0}, {0x26, 0x05}, {0x15, 0x1}}, \ {{0x25, 0x0}, {0x25, 0x1B}, {0x14, 0x1}}, \ {{0x24, 0x0}, {0x24, 0x0A}, {0x13, 0x1}}, \ {{0x23, 0x0}, {0x23, 0x05}, {0x12, 0x1}}, \ @@ -99,7 +100,7 @@ /* WARNING: Should be updated with each vGPU release, if there is a break in * migration compatibility during the development of that release. */ -#define NV_VGPU_MAX_SUPPORTED_GRIDSW_VERSION_EXTERNAL_MAJOR 0x14 +#define NV_VGPU_MAX_SUPPORTED_GRIDSW_VERSION_EXTERNAL_MAJOR 0x15 #define NV_VGPU_MAX_SUPPORTED_GRIDSW_VERSION_EXTERNAL_MINOR 0x1 /* WARNING: Should be updated with each vGPU release, if minimum supported diff --git a/src/nvidia/kernel/inc/vgpuapi.h b/src/nvidia/inc/kernel/vgpu/vgpuapi.h similarity index 99% rename from src/nvidia/kernel/inc/vgpuapi.h rename to src/nvidia/inc/kernel/vgpu/vgpuapi.h index 661560a643..ae35d1eab3 100644 --- a/src/nvidia/kernel/inc/vgpuapi.h +++ b/src/nvidia/inc/kernel/vgpu/vgpuapi.h @@ -21,6 +21,7 @@ * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_vgpuapi_nvoc.h" #ifndef _VGPUAPI_H_ diff --git a/src/nvidia/inc/libraries/ioaccess/ioaccess.h b/src/nvidia/inc/libraries/ioaccess/ioaccess.h index 6ca33d5ecf..0a2ca718ef 100644 --- a/src/nvidia/inc/libraries/ioaccess/ioaccess.h +++ b/src/nvidia/inc/libraries/ioaccess/ioaccess.h @@ -21,6 +21,7 @@ * DEALINGS IN THE SOFTWARE. */ #if (defined(NVRM) || defined(RMCFG_FEATURE_PLATFORM_GSP)) && !defined(NVWATCH) +#pragma once #include "g_ioaccess_nvoc.h" #endif diff --git a/src/nvidia/inc/libraries/mmu/mmu_walk.h b/src/nvidia/inc/libraries/mmu/mmu_walk.h index 0f72e0a2e2..30bf049d0a 100644 --- a/src/nvidia/inc/libraries/mmu/mmu_walk.h +++ b/src/nvidia/inc/libraries/mmu/mmu_walk.h @@ -513,7 +513,7 @@ struct MMU_MAP_TARGET /*! * Page array granularity of the physical target memory */ - NvU32 pageArrayGranularity; + NvU64 pageArrayGranularity; }; /*----------------------------Public Interface--------------------------------*/ diff --git a/src/nvidia/inc/libraries/nvlog/internal/nvlog_printf_internal.h b/src/nvidia/inc/libraries/nvlog/internal/nvlog_printf_internal.h index 28e5d0902e..2c16be831e 100644 --- a/src/nvidia/inc/libraries/nvlog/internal/nvlog_printf_internal.h +++ b/src/nvidia/inc/libraries/nvlog/internal/nvlog_printf_internal.h @@ -85,6 +85,8 @@ // // One for every debug level, needed for compile time filtering. // +#include "nvstatus.h" + typedef NV_STATUS NVLOG_PRINTF_PROTO(NvU32, NvU32, ...); NVLOG_PRINTF_PROTO nvlogPrint_printf0; NVLOG_PRINTF_PROTO nvlogPrint_printf1; diff --git a/src/nvidia/inc/libraries/nvoc/object.h b/src/nvidia/inc/libraries/nvoc/object.h index 8a45254b6b..65ccdfc534 100644 --- a/src/nvidia/inc/libraries/nvoc/object.h +++ b/src/nvidia/inc/libraries/nvoc/object.h @@ -25,6 +25,7 @@ * This file is part of the NVOC runtime. */ +#pragma once #include "g_object_nvoc.h" #ifndef _NVOC_OBJECT_H_ diff --git a/src/nvidia/inc/libraries/nvport/memory.h b/src/nvidia/inc/libraries/nvport/memory.h index b757b64c9e..af79ad777a 100644 --- a/src/nvidia/inc/libraries/nvport/memory.h +++ b/src/nvidia/inc/libraries/nvport/memory.h @@ -110,7 +110,7 @@ void portMemShutdown(NvBool bForceSilent); * @pre Unix: Non-interrupt context * @note Will not put the thread to sleep. */ -void *portMemAllocPaged(NvLength lengthBytes); +NV_FORCERESULTCHECK void *portMemAllocPaged(NvLength lengthBytes); /** * @brief Allocates non-paged (i.e. pinned) memory. @@ -127,7 +127,7 @@ void *portMemAllocPaged(NvLength lengthBytes); * @pre Unix: Non-interrupt context * @note Will not put the thread to sleep. */ -void *portMemAllocNonPaged(NvLength lengthBytes); +NV_FORCERESULTCHECK void *portMemAllocNonPaged(NvLength lengthBytes); /** * @brief Allocates non-paged (i.e. pinned) memory on the stack or the heap @@ -402,7 +402,7 @@ struct PORT_MEM_ALLOCATOR { * @pre Unix: Non-interrupt context * @note Will not put the thread to sleep. */ -PORT_MEM_ALLOCATOR *portMemAllocatorCreatePaged(void); +NV_FORCERESULTCHECK PORT_MEM_ALLOCATOR *portMemAllocatorCreatePaged(void); /** * @brief Creates an allocator for non-paged memory. @@ -417,7 +417,7 @@ PORT_MEM_ALLOCATOR *portMemAllocatorCreatePaged(void); * @pre Unix: Non-interrupt context * @note Will not put the thread to sleep. */ -PORT_MEM_ALLOCATOR *portMemAllocatorCreateNonPaged(void); +NV_FORCERESULTCHECK PORT_MEM_ALLOCATOR *portMemAllocatorCreateNonPaged(void); /** * @brief Creates an allocator over an existing block of memory. @@ -447,7 +447,7 @@ PORT_MEM_ALLOCATOR *portMemAllocatorCreateNonPaged(void); * @note Will not put the thread to sleep. * @note This allocator is not thread safe. */ -PORT_MEM_ALLOCATOR *portMemAllocatorCreateOnExistingBlock(void *pPreallocatedBlock, NvLength blockSizeBytes); +NV_FORCERESULTCHECK PORT_MEM_ALLOCATOR *portMemAllocatorCreateOnExistingBlock(void *pPreallocatedBlock, NvLength blockSizeBytes); /** * @brief Extends the given size to fit the required bookkeeping information diff --git a/src/nvidia/inc/libraries/resserv/resserv.h b/src/nvidia/inc/libraries/resserv/resserv.h index 9b61445b8e..5e061b188b 100644 --- a/src/nvidia/inc/libraries/resserv/resserv.h +++ b/src/nvidia/inc/libraries/resserv/resserv.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -21,6 +21,7 @@ * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_resserv_nvoc.h" #ifndef _RESSERV_H_ @@ -118,7 +119,6 @@ class RsShared; MAKE_LIST(RsResourceRefList, RsResourceRef*); MAKE_LIST(RsResourceList, RsResource*); MAKE_LIST(RsHandleList, NvHandle); -MAKE_LIST(RsClientList, CLIENT_ENTRY*); MAKE_LIST(RsShareList, RS_SHARE_POLICY); MAKE_MULTIMAP(RsIndex, RsResourceRef*); @@ -325,6 +325,12 @@ struct ACCESS_CONTROL #define RS_LOCK_VALIDATOR_INIT(lock, lockClass, inst) \ do { NV_ASSERT_OK(lockvalLockInit((lock), (lockClass), (inst))); } while(0) +#define RS_SPINLOCK_ACQUIRE(lock) do \ +{ \ + NV_ASSERT_OK(lockvalPreAcquire((validator))); \ + portSyncSpinlockAcquire((lock)) ; \ + lockvalPostAcquire((validator), LOCK_VAL_SPINLOCK); \ + #define RS_RWLOCK_ACQUIRE_READ(lock, validator) do \ { \ NV_ASSERT_OK(lockvalPreAcquire((validator))); \ @@ -339,6 +345,17 @@ struct ACCESS_CONTROL lockvalPostAcquire((validator), LOCK_VAL_WLOCK); \ } while(0) +#define RS_SPINLOCK_RELEASE_EXT(lock, validator, bOutOfOrder) do \ +{ \ + void *pLockValTlsEntry, *pReleasedLockNode; \ + if (bOutOfOrder) \ + NV_ASSERT_OK(lockvalReleaseOutOfOrder((validator), LOCK_VAL_SPINLOCK, &pLockValTlsEntry, &pReleasedLockNode)); \ + else \ + NV_ASSERT_OK(lockvalRelease((validator), LOCK_VAL_SPINLOCK, &pLockValTlsEntry, &pReleasedLockNode)); \ + portSyncSpinlockRelease((lock)); \ + lockvalMemoryRelease(pLockValTlsEntry, pReleasedLockNode); \ +} while(0) + #define RS_RWLOCK_RELEASE_READ_EXT(lock, validator, bOutOfOrder) do \ { \ void *pLockValTlsEntry, *pReleasedLockNode; \ @@ -363,12 +380,15 @@ struct ACCESS_CONTROL #else #define RS_LOCK_VALIDATOR_INIT(lock, lockClass, inst) +#define RS_SPINLOCK_ACQUIRE(lock, validator) do { portSyncSpinlockAcquire((lock)); } while(0) #define RS_RWLOCK_ACQUIRE_READ(lock, validator) do { portSyncRwLockAcquireRead((lock)); } while(0) #define RS_RWLOCK_ACQUIRE_WRITE(lock, validator) do { portSyncRwLockAcquireWrite((lock)); } while(0) +#define RS_SPINLOCK_RELEASE_EXT(lock, validator, bOutOfOrder) do { portSyncSpinlockRelease((lock)); } while(0) #define RS_RWLOCK_RELEASE_READ_EXT(lock, validator, bOutOfOrder) do { portSyncRwLockReleaseRead((lock)); } while(0) #define RS_RWLOCK_RELEASE_WRITE_EXT(lock, validator, bOutOfOrder) do { portSyncRwLockReleaseWrite((lock)); } while(0) #endif +#define RS_SPINLOCK_RELEASE(lock, validator) RS_SPINLOCK_RELEASE_EXT(lock, validator, NV_FALSE) #define RS_RWLOCK_RELEASE_READ(lock, validator) RS_RWLOCK_RELEASE_READ_EXT(lock, validator, NV_FALSE) #define RS_RWLOCK_RELEASE_WRITE(lock, validator) RS_RWLOCK_RELEASE_WRITE_EXT(lock, validator, NV_FALSE) diff --git a/src/nvidia/inc/libraries/resserv/rs_client.h b/src/nvidia/inc/libraries/resserv/rs_client.h index a0836bc1b5..e895916da9 100644 --- a/src/nvidia/inc/libraries/resserv/rs_client.h +++ b/src/nvidia/inc/libraries/resserv/rs_client.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -21,6 +21,7 @@ * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_rs_client_nvoc.h" #ifndef _RS_CLIENT_H_ @@ -221,6 +222,14 @@ NVOC_PREFIX(client) class RsClient : Object */ virtual NV_STATUS clientValidate(RsClient *pClient, const API_SECURITY_INFO * pSecInfo); + /** + * Validate that current process has the required locks to use this client + * @param[in] pClient This client + * @param[in] pServer Resource Server instance + * @param[in] pClientEntry Client entry of the client + */ + virtual NV_STATUS clientValidateLocks(RsClient *pClient, RsServer *pServer, const CLIENT_ENTRY *pClientEntry); + /** * Stub virtual function * @param[in] NvHandle hClient diff --git a/src/nvidia/inc/libraries/resserv/rs_resource.h b/src/nvidia/inc/libraries/resserv/rs_resource.h index 7b0368c734..afb0a9b98f 100644 --- a/src/nvidia/inc/libraries/resserv/rs_resource.h +++ b/src/nvidia/inc/libraries/resserv/rs_resource.h @@ -21,6 +21,7 @@ * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_rs_resource_nvoc.h" #ifndef _RS_RESOURCE_H_ diff --git a/src/nvidia/inc/libraries/resserv/rs_server.h b/src/nvidia/inc/libraries/resserv/rs_server.h index fe63a0b45f..9b6b4b84c0 100644 --- a/src/nvidia/inc/libraries/resserv/rs_server.h +++ b/src/nvidia/inc/libraries/resserv/rs_server.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -21,6 +21,7 @@ * DEALINGS IN THE SOFTWARE. */ +#pragma once #include "g_rs_server_nvoc.h" #ifndef _RS_SERVER_H_ @@ -35,6 +36,12 @@ extern "C" { #endif +enum CLIENT_LOCK_TYPE +{ + CLIENT_LOCK_SPECIFIC, // For locking specific RM clients encoded in the API + CLIENT_LOCK_ALL // For locking all RM clients currently in use +}; + /** * @defgroup RsServer * @addtogroup RsServer @@ -49,12 +56,18 @@ struct CLIENT_ENTRY RsClient *pClient; NvHandle hClient; NvU64 lockOwnerTid; ///< Thread id of the lock owner + NvU32 refCount; + NvBool bPendingFree; + ListNode node; #if LOCK_VAL_ENABLED LOCK_VAL_LOCK lockVal; #endif }; +MAKE_INTRUSIVE_LIST(RsClientList, CLIENT_ENTRY, node); +MAKE_LIST(RsLockedClientList, CLIENT_ENTRY*); + /** * Base-class for objects that are shared among multiple * RsResources (including RsResources from other clients) @@ -135,7 +148,7 @@ struct RsServer NvBool bConstructed; ///< Determines whether the server is ready to be used PORT_MEM_ALLOCATOR *pAllocator; ///< Allocator to use for all objects allocated by the server - PORT_RWLOCK *pClientListLock; ///< Lock that needs to be taken when accessing the client list + PORT_SPINLOCK *pClientListLock; ///< Lock that needs to be taken when accessing the client list PORT_SPINLOCK *pShareMapLock; ///< Lock that needs to be taken when accessing the shared resource map RsSharedMap shareMap; ///< Map of shared resources @@ -167,6 +180,11 @@ struct RsServer */ NvBool bRsAccessEnabled; + /** + * Set to thread ID of the thread that locked all clients. + */ + NvU64 allClientLockOwnerTid; + /** * Mask of interfaces (RS_API_*) that will use a read-only top lock by default */ @@ -187,6 +205,16 @@ struct RsServer RsDisabledClientList disabledClientList; RsClient *pNextDisabledClient; PORT_SPINLOCK *pDisabledClientListLock; + + /** + * List of client entries locked by serverLockAllClients + * This list is required for locking all clients in order to avoid races with + * other paths creating/destroying paths in parallel WITHOUT holding the API lock. + * Ideally, there shouldn't be any other such paths but the RTD3/PM path does do + * this. CORERM-6052 tracks investigating that and potentially fixing the locking + * there. + */ + RsLockedClientList lockedClientList; }; /** @@ -598,6 +626,23 @@ extern NV_STATUS serverResLock_Prologue(RsServer *pServer, LOCK_ACCESS_TYPE acce */ extern void serverResLock_Epilogue(RsServer *pServer, LOCK_ACCESS_TYPE access, RS_LOCK_INFO *pLockInfo, NvU32 *pReleaseFlags); +/** + * Acquire the client list lock. The caller is responsible for + * ensuring that lock ordering is not violated (otherwise there can be + * deadlock): the client list lock must always be released without acquiring any + * subsequent locks. + * + * @param[in] pServer This server instance + */ +void serverAcquireClientListLock(RsServer *pServer); + +/** + * Release the client list lock. + * + * @param[in] pServer This server instance + */ +void serverReleaseClientListLock(RsServer *pServer); + /** * WAR for additional tasks that must be performed after resource-level locks are released. User-implemented. * @param[inout] status Allocation status @@ -802,6 +847,15 @@ extern NV_STATUS serverControlLookupLockFlags(RsServer *pServer, RS_CONTROL_COOKIE *pCookie, LOCK_ACCESS_TYPE *pAccess); +/** + * Lookup client locking flags for a control call + * + * @param[in] pCookie Control call cookie + * @param[out] pClientLockType Client lock type + */ +extern NV_STATUS serverControlLookupClientLockFlags(RS_CONTROL_COOKIE *pCookie, + enum CLIENT_LOCK_TYPE *pClientLockType); + /** * * Lookup locking flags for a map call @@ -1021,18 +1075,61 @@ void serverInterUnmap_Epilogue(RsServer *pServer, RS_INTER_UNMAP_PARAMS *pUnmapP * @param[in] pServer This server instance * @param[in] hClient The client to acquire * @param[in] lockAccess LOCK_ACCESS_READ or LOCK_ACCESS_WRITE - * @param[out] ppClient Pointer to the RsClient + * @param[out] ppClientEntry Pointer to the CLIENT_ENTRY */ -NV_STATUS serverAcquireClient(RsServer *pServer, NvHandle hClient, LOCK_ACCESS_TYPE lockAccess, RsClient **ppClient); +NV_STATUS serverAcquireClient(RsServer *pServer, NvHandle hClient, LOCK_ACCESS_TYPE lockAccess, CLIENT_ENTRY **ppClientEntry); /** * Release a client pointer * * @param[in] pServer This server instance * @param[in] lockAccess LOCK_ACCESS_READ or LOCK_ACCESS_WRITE - * @param[in] pClient Pointer to the RsClient + * @param[in] pClientEntry Pointer to the CLIENT_ENTRY */ -NV_STATUS serverReleaseClient(RsServer *pServer, LOCK_ACCESS_TYPE lockAccess, RsClient *pClient); +void serverReleaseClient(RsServer *pServer, LOCK_ACCESS_TYPE lockAccess, CLIENT_ENTRY *pClientEntry); + +/** + * Test is a client handle is currently locked for LOCK_ACCESS_WRITE or not. + * + * @param[in] pServer This server instance + * @param[in] hClient The client to acquire + */ +NvBool serverIsClientLocked(RsServer *pServer, NvHandle hClient); + +/** + * Test if a client handle is internal or not + * + * @param[in] hClient The client handle to test + */ +NvBool serverIsClientInternal(RsServer *pServer, NvHandle hClient); + +/** + * Lock all clients currently in use. While this function will lock the client handles + * in the correct order, the caller is responsible for ensuring that lock ordering + * is not violated (otherwise there can be a deadlock) with respect to other types + * of locks. NOTE that this CANNOT be called when already holding one or more client + * locks! + * + * @param[in] pServer This server instance + */ +NV_STATUS serverLockAllClients(RsServer *pServer); + +/** + * Release locks on all clients. + * + * @param[in] pServer This server instance + */ +NV_STATUS serverUnlockAllClients(RsServer *pServer); + +/** + * Check if we locked all clients + * + * @param[in] pServer This server instance + */ +static NV_INLINE NvBool serverAllClientsLockIsOwner(RsServer *pServer) +{ + return (pServer->allClientLockOwnerTid == portThreadGetCurrentThreadId()); +} /** * Get a client pointer from a client handle without taking any locks. diff --git a/src/nvidia/interface/deprecated/rmapi_deprecated_allocmemory.c b/src/nvidia/interface/deprecated/rmapi_deprecated_allocmemory.c index f7a530b129..32dcab58c8 100644 --- a/src/nvidia/interface/deprecated/rmapi_deprecated_allocmemory.c +++ b/src/nvidia/interface/deprecated/rmapi_deprecated_allocmemory.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -23,6 +23,8 @@ #include "deprecated/rmapi_deprecated.h" +#include "nvmisc.h" + #include "class/cl003e.h" // NV01_MEMORY_SYSTEM #include "class/cl0071.h" // NV01_MEMORY_SYSTEM_OS_DESCRIPTOR @@ -88,7 +90,7 @@ static const RmAllocMemoryEntry rmAllocMemoryTable[] = { NV01_MEMORY_FLA, _rmAllocMemoryFromFlaObject }, }; -static NvU32 rmAllocMemoryTableSize = sizeof(rmAllocMemoryTable) / sizeof(rmAllocMemoryTable[0]); +static NvU32 rmAllocMemoryTableSize = NV_ARRAY_ELEMENTS(rmAllocMemoryTable); void RmDeprecatedAllocMemory diff --git a/src/nvidia/interface/deprecated/rmapi_deprecated_control.c b/src/nvidia/interface/deprecated/rmapi_deprecated_control.c index 3ef4b0c5a6..af48f85a8f 100644 --- a/src/nvidia/interface/deprecated/rmapi_deprecated_control.c +++ b/src/nvidia/interface/deprecated/rmapi_deprecated_control.c @@ -73,21 +73,20 @@ typedef struct { NvU32 cmd; // NVXXXX_CTRL_CMD_* value RmDeprecatedControlHandler func; // pointer to handler - NvBool bSkipVGPU;// Do not apply to vGPU - GSP-TODO for better solution. } RmDeprecatedControlEntry; static const RmDeprecatedControlEntry rmDeprecatedControlTable[] = { - { NV0000_CTRL_CMD_SYSTEM_GET_BUILD_VERSION, V2_CONVERTER(_NV0000_CTRL_CMD_SYSTEM_GET_BUILD_VERSION), NV_FALSE}, - { NV2080_CTRL_CMD_BIOS_GET_INFO, V2_CONVERTER(_NV2080_CTRL_CMD_BIOS_GET_INFO), NV_FALSE}, - { NV2080_CTRL_CMD_BUS_GET_INFO, V2_CONVERTER(_NV2080_CTRL_CMD_BUS_GET_INFO), NV_FALSE}, - { NV0080_CTRL_CMD_BSP_GET_CAPS, V2_CONVERTER(_NV0080_CTRL_CMD_BSP_GET_CAPS), NV_FALSE}, - { NV2080_CTRL_CMD_GPU_GET_INFO, V2_CONVERTER(_NV2080_CTRL_CMD_GPU_GET_INFO), NV_FALSE}, - { NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES, V2_CONVERTER(_NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES), NV_FALSE}, - { NV0080_CTRL_CMD_MSENC_GET_CAPS, V2_CONVERTER(_NV0080_CTRL_CMD_MSENC_GET_CAPS), NV_FALSE}, - { NV2080_CTRL_CMD_FB_GET_INFO, V2_CONVERTER(_NV2080_CTRL_CMD_FB_GET_INFO), NV_FALSE}, - { 0, NULL, NV_FALSE } + { NV0000_CTRL_CMD_SYSTEM_GET_BUILD_VERSION, V2_CONVERTER(_NV0000_CTRL_CMD_SYSTEM_GET_BUILD_VERSION) }, + { NV2080_CTRL_CMD_BIOS_GET_INFO, V2_CONVERTER(_NV2080_CTRL_CMD_BIOS_GET_INFO) }, + { NV2080_CTRL_CMD_BUS_GET_INFO, V2_CONVERTER(_NV2080_CTRL_CMD_BUS_GET_INFO) }, + { NV0080_CTRL_CMD_BSP_GET_CAPS, V2_CONVERTER(_NV0080_CTRL_CMD_BSP_GET_CAPS) }, + { NV2080_CTRL_CMD_GPU_GET_INFO, V2_CONVERTER(_NV2080_CTRL_CMD_GPU_GET_INFO) }, + { NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES, V2_CONVERTER(_NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES) }, + { NV0080_CTRL_CMD_MSENC_GET_CAPS, V2_CONVERTER(_NV0080_CTRL_CMD_MSENC_GET_CAPS) }, + { NV2080_CTRL_CMD_FB_GET_INFO, V2_CONVERTER(_NV2080_CTRL_CMD_FB_GET_INFO) }, + { 0, NULL } }; /*! @@ -125,16 +124,6 @@ RmDeprecatedControlHandler RmDeprecatedGetControlHandler(NVOS54_PARAMETERS *pArg NV_ASSERT_OR_ELSE_STR(pArgs->flags == 0, "IRQL and BYPASS_LOCK control calls currently unsupported for deprecated control calls", return NULL); - // - // Do not deprecate for vGPU - // GSP-TODO: short-term only; we need to find a better way than this exclusion or - // updating the ugly file resman/kernel/inc/vgpu/rm_plugin_shared_code.h - // - if (pGpu && IS_VIRTUAL(pGpu) && rmDeprecatedControlTable[i].bSkipVGPU) - { - return NULL; - } - return rmDeprecatedControlHandler; } } diff --git a/src/nvidia/interface/deprecated/rmapi_deprecated_utils.c b/src/nvidia/interface/deprecated/rmapi_deprecated_utils.c index a7d6fb073e..3014b28515 100644 --- a/src/nvidia/interface/deprecated/rmapi_deprecated_utils.c +++ b/src/nvidia/interface/deprecated/rmapi_deprecated_utils.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2018-2018 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -291,6 +291,25 @@ RmDeprecatedConvertOs32ToOs02Flags } } + switch (DRF_VAL(OS32, _ATTR2, _REGISTER_MEMDESC_TO_PHYS_RM, attr2)) + { + case NVOS32_ATTR2_REGISTER_MEMDESC_TO_PHYS_RM_TRUE: + { + os02Flags = FLD_SET_DRF(OS02, _FLAGS, _REGISTER_MEMDESC_TO_PHYS_RM, _TRUE, os02Flags); + break; + } + case NVOS32_ATTR2_REGISTER_MEMDESC_TO_PHYS_RM_FALSE: + { + os02Flags = FLD_SET_DRF(OS02, _FLAGS, _REGISTER_MEMDESC_TO_PHYS_RM, _FALSE, os02Flags); + break; + } + default: + { + rmStatus = NV_ERR_INVALID_FLAGS; + break; + } + } + // VidHeapControl never creates a mapping os02Flags = FLD_SET_DRF(OS02, _FLAGS, _MAPPING, _NO_MAP, os02Flags); if (os32Flags & NVOS32_ALLOC_FLAGS_KERNEL_MAPPING_MAP) @@ -414,6 +433,11 @@ RmDeprecatedConvertOs02ToOs32Flags if (FLD_TEST_DRF(OS02, _FLAGS, _ALLOC_DEVICE_READ_ONLY, _YES, os02Flags)) attr2 |= DRF_DEF(OS32, _ATTR2, _PROTECTION_DEVICE, _READ_ONLY); + if (FLD_TEST_DRF(OS02, _FLAGS, _REGISTER_MEMDESC_TO_PHYS_RM, _TRUE, os02Flags)) + attr2 |= DRF_DEF(OS32, _ATTR2, _REGISTER_MEMDESC_TO_PHYS_RM, _TRUE); + else + attr2 |= DRF_DEF(OS32, _ATTR2, _REGISTER_MEMDESC_TO_PHYS_RM, _FALSE); + if (rmStatus == NV_OK) { *pOs32Flags = os32Flags; diff --git a/src/nvidia/interface/deprecated/rmapi_deprecated_vidheapctrl.c b/src/nvidia/interface/deprecated/rmapi_deprecated_vidheapctrl.c index a9f3c50f20..1faf411b46 100644 --- a/src/nvidia/interface/deprecated/rmapi_deprecated_vidheapctrl.c +++ b/src/nvidia/interface/deprecated/rmapi_deprecated_vidheapctrl.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -34,6 +34,8 @@ #include "ctrl/ctrl0041.h" // NV04_MEMORY #include "ctrl/ctrl2080/ctrl2080fb.h" // NV2080_CTRL_FB_INFO +#include "nvmisc.h" + typedef NV_STATUS RmVidHeapControlFunc(DEPRECATED_CONTEXT *, NVOS32_PARAMETERS *); typedef struct { @@ -70,7 +72,7 @@ static const RmVidHeapControlEntry rmVidHeapControlTable[] = { { NVOS32_FUNCTION_ALLOC_OS_DESCRIPTOR, _nvos32FunctionAllocOsDesc }, }; -static NvU32 rmVidHeapControlTableSize = sizeof(rmVidHeapControlTable) / sizeof(rmVidHeapControlTable[0]); +static NvU32 rmVidHeapControlTableSize = NV_ARRAY_ELEMENTS(rmVidHeapControlTable); void RmDeprecatedVidHeapControl diff --git a/src/nvidia/interface/deprecated/rmapi_gss_legacy_control.c b/src/nvidia/interface/deprecated/rmapi_gss_legacy_control.c index c213be0ff8..1e1d3d4242 100644 --- a/src/nvidia/interface/deprecated/rmapi_gss_legacy_control.c +++ b/src/nvidia/interface/deprecated/rmapi_gss_legacy_control.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -28,6 +28,7 @@ #include "rmapi/rmapi_utils.h" #include "g_finn_rm_api.h" +#include "core/thread_state.h" /*! * Some clients are still making these legacy GSS controls. We no longer support these in RM, @@ -47,6 +48,7 @@ NV_STATUS RmGssLegacyRpcCmd GPU_MASK gpuMaskRelease = 0; void *pKernelParams = NULL; NvBool bApiLockTaken = NV_FALSE; + THREAD_STATE_NODE threadState; NV_ASSERT_OR_RETURN((pArgs->cmd & RM_GSS_LEGACY_MASK), NV_ERR_INVALID_STATE); @@ -57,6 +59,8 @@ NV_STATUS RmGssLegacyRpcCmd return NV_ERR_INSUFFICIENT_PERMISSIONS; } + threadStateInit(&threadState, THREAD_STATE_FLAGS_NONE); + if (pSecInfo->paramLocation == PARAM_LOCATION_USER) { pKernelParams = portMemAllocNonPaged(pArgs->paramsSize); @@ -147,5 +151,7 @@ NV_STATUS RmGssLegacyRpcCmd portMemFree(pKernelParams); } + threadStateFree(&threadState, THREAD_STATE_FLAGS_NONE); + return status; } diff --git a/src/nvidia/interface/nv_uvm_types.h b/src/nvidia/interface/nv_uvm_types.h index c25269e354..a94a36704f 100644 --- a/src/nvidia/interface/nv_uvm_types.h +++ b/src/nvidia/interface/nv_uvm_types.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2014-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2014-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -39,12 +39,12 @@ // are multiple BIG page sizes in RM. These defines are used as flags to "0" // should be OK when user is not sure which pagesize allocation it wants // -#define UVM_PAGE_SIZE_DEFAULT 0x0 -#define UVM_PAGE_SIZE_4K 0x1000 -#define UVM_PAGE_SIZE_64K 0x10000 -#define UVM_PAGE_SIZE_128K 0x20000 -#define UVM_PAGE_SIZE_2M 0x200000 -#define UVM_PAGE_SIZE_512M 0x20000000 +#define UVM_PAGE_SIZE_DEFAULT 0x0ULL +#define UVM_PAGE_SIZE_4K 0x1000ULL +#define UVM_PAGE_SIZE_64K 0x10000ULL +#define UVM_PAGE_SIZE_128K 0x20000ULL +#define UVM_PAGE_SIZE_2M 0x200000ULL +#define UVM_PAGE_SIZE_512M 0x20000000ULL // // When modifying flags, make sure they are compatible with the mirrored @@ -267,6 +267,7 @@ typedef struct UvmGpuChannelInfo_tag // The errorNotifier is filled out when the channel hits an RC error. NvNotification *errorNotifier; + NvNotification *keyRotationNotifier; NvU32 hwRunlistId; NvU32 hwChannelId; @@ -292,13 +293,13 @@ typedef struct UvmGpuChannelInfo_tag // GPU VAs of both GPFIFO and GPPUT are needed in Confidential Computing // so a channel can be controlled via another channel (SEC2 or WLC/LCIC) - NvU64 gpFifoGpuVa; - NvU64 gpPutGpuVa; - NvU64 gpGetGpuVa; + NvU64 gpFifoGpuVa; + NvU64 gpPutGpuVa; + NvU64 gpGetGpuVa; // GPU VA of work submission offset is needed in Confidential Computing // so CE channels can ring doorbell of other channels as required for // WLC/LCIC work submission - NvU64 workSubmissionOffsetGpuVa; + NvU64 workSubmissionOffsetGpuVa; } UvmGpuChannelInfo; typedef enum @@ -1057,4 +1058,21 @@ typedef enum UvmCslOperation UVM_CSL_OPERATION_DECRYPT } UvmCslOperation; +typedef enum UVM_KEY_ROTATION_STATUS { + // Key rotation complete/not in progress + UVM_KEY_ROTATION_STATUS_IDLE = 0, + // RM is waiting for clients to report their channels are idle for key rotation + UVM_KEY_ROTATION_STATUS_PENDING = 1, + // Key rotation is in progress + UVM_KEY_ROTATION_STATUS_IN_PROGRESS = 2, + // Key rotation timeout failure, RM will RC non-idle channels. + // UVM should never see this status value. + UVM_KEY_ROTATION_STATUS_FAILED_TIMEOUT = 3, + // Key rotation failed because upper threshold was crossed, RM will RC non-idle channels + UVM_KEY_ROTATION_STATUS_FAILED_THRESHOLD = 4, + // Internal RM failure while rotating keys for a certain channel, RM will RC the channel. + UVM_KEY_ROTATION_STATUS_FAILED_ROTATION = 5, + UVM_KEY_ROTATION_STATUS_MAX_COUNT = 6, +} UVM_KEY_ROTATION_STATUS; + #endif // _NV_UVM_TYPES_H_ diff --git a/src/nvidia/interface/nvrm_registry.h b/src/nvidia/interface/nvrm_registry.h index eae3230e6d..9d1687ae6e 100644 --- a/src/nvidia/interface/nvrm_registry.h +++ b/src/nvidia/interface/nvrm_registry.h @@ -1507,6 +1507,15 @@ #define NV_REG_STR_RM_NVLINK_LINK_PM_CONTROL_L2_MODE_DISABLE (0x00000002) #define NV_REG_STR_RM_NVLINK_LINK_PM_CONTROL_RESERVED 31:8 +// +// Type DWORD +// Boolean to enable NVLink clock gating. WAR for JIRA BR-421. +// +#define NV_REG_STR_RM_NVLINK_ENABLE_CLOCK_GATING "RMNvLinkEnableClockGating" +#define NV_REG_STR_RM_NVLINK_ENABLE_CLOCK_GATING_FALSE (0x00000000) +#define NV_REG_STR_RM_NVLINK_ENABLE_CLOCK_GATING_TRUE (0x00000001) +#define NV_REG_STR_RM_NVLINK_ENABLE_CLOCK_GATING_DEFAULT (NV_REG_STR_RM_NVLINK_ENABLE_CLOCK_GATING_FALSE) + // // Type DWORD // Knob to force lane disable and shutdown during driver unload @@ -1922,10 +1931,6 @@ #define NV_REG_STR_RM_CONFIDENTIAL_COMPUTE_GPUS_READY_CHECK_DISABLED 0x00000000 #define NV_REG_STR_RM_CONFIDENTIAL_COMPUTE_GPUS_READY_CHECK_ENABLED 0x00000001 -#define NV_REG_STR_RM_CONF_COMPUTE_EARLY_INIT "RmConfComputeEarlyInit" -#define NV_REG_STR_RM_CONF_COMPUTE_EARLY_INIT_DISABLED 0x00000000 -#define NV_REG_STR_RM_CONF_COMPUTE_EARLY_INIT_ENABLED 0x00000001 - // // Enable/disable SPDM feature in Confidential Compute. SPDM-capable profiles // may not be loaded by default. This regkey allows us to override the default @@ -1940,7 +1945,56 @@ #define NV_REG_STR_RM_CONF_COMPUTE_SPDM_POLICY_ENABLED_YES 0x00000001 // -// Enable/disable dummy key rotation in Confidential Compute. +// Enable/disable key rotation in Confidential Compute. +// If this is defined then NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION is ignored. +// +// 0 - Feature disabled +// 1 - Feature enabled +// +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION "RmConfComputeKeyRotation" +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_ENABLED 0:0 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_ENABLED_NO 0x00000000 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_ENABLED_YES 0x00000001 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_SEC2_KEYS 1:1 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_SEC2_KEYS_NO 0x00000000 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_SEC2_KEYS_YES 0x00000001 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE2_KEYS 2:2 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE2_KEYS_NO 0x00000000 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE2_KEYS_YES 0x00000001 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE3_KEYS 3:3 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE3_KEYS_NO 0x00000000 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE3_KEYS_YES 0x00000001 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE4_KEYS 4:4 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE4_KEYS_NO 0x00000000 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE4_KEYS_YES 0x00000001 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE5_KEYS 5:5 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE5_KEYS_NO 0x00000000 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE5_KEYS_YES 0x00000001 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE6_KEYS 6:6 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE6_KEYS_NO 0x00000000 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE6_KEYS_YES 0x00000001 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE7_KEYS 7:7 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE7_KEYS_NO 0x00000000 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE7_KEYS_YES 0x00000001 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE8_KEYS 8:8 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE8_KEYS_NO 0x00000000 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE8_KEYS_YES 0x00000001 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE9_KEYS 9:9 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE9_KEYS_NO 0x00000000 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LCE9_KEYS_YES 0x00000001 + +// if all kernel keys should be considered for key rotation +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_KERNEL_KEYS 10:10 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_KERNEL_KEYS_NO 0x00000000 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_KERNEL_KEYS_YES 0x00000001 + +// if all user keys should be considered for key rotation +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_USER_KEYS 11:11 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_USER_KEYS_NO 0x00000000 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_USER_KEYS_YES 0x00000001 + +// +// Enable/disable dummy key rotation in Confidential Compute. // This is a temp reg key that will be removed once all RM clients // support key rotation by default. // @@ -2005,7 +2059,42 @@ #define NV_REG_STR_RM_CONF_COMPUTE_HEARTBEAT_PERIOD_SECONDS_MAX 0x000000FF // -// Set lower threshold for dummy key rotation. +// Set the key rotation timeout value for user-mode clients. +// This is the amount of time in seconds, after the threshold has been crossed, that user-mode clients +// have to idle their channels before RM RCs the channels for key rotation. +// This value must be greater than or equal to 2. +// +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_TIMEOUT_IN_SEC "RmKeyRotationTimeout" + +// +// Set the difference between the lower and upper thresholds. +// Value is in units of (amount of data encrypted in units of 16 bytes + number of encryption invocations) +// If this is set then NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LOWER_THRESHOLD and +// NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_UPPER_THRESHOLD are ignored. +// This value must be greater than 0. +// +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_THRESHOLD_DELTA "RmKeyRotationThresholdDelta" + +// +// Set lower threshold for key rotation. +// Value is in units of (amount of data encrypted in units of 16 bytes + number of encryption invocations) +// If this is set then RmKeyRotationUpperThreshold must also be set. +// This value must be less than RmKeyRotationUpperThreshold. +// Note that setting the attacker advantage via SMI/NVML will overwrite this value. +// +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LOWER_THRESHOLD "RmKeyRotationLowerThreshold" + +// +// Set upper threshold for key rotation. +// Value is in units of (amount of data encrypted in units of 16 bytes + number of encryption invocations) +// If this is set then RmKeyRotationLowerThreshold must also be set. +// This value must be greater than RmKeyRotationLowerThreshold. +// Note that setting the attacker advantage via SMI/NVML will overwrite this value. +// +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_UPPER_THRESHOLD "RmKeyRotationUpperThreshold" + +// +// Set lower threshold for dummy key rotation. // This is a temp reg key that will be removed once all RM clients // support prod key rotation. // Value is in seconds. @@ -2013,7 +2102,7 @@ #define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LOWER_THRESHOLD "RmDummyKeyRotationLowerThreshold" // -// Set upper threshold for dummy key rotation. +// Set upper threshold for dummy key rotation. // This is a temp reg key that will be removed once all RM clients // support prod key rotation. // Value is in seconds. @@ -2270,6 +2359,16 @@ #define NV_REG_STR_RM_GUEST_ECC_STATE_ENABLED 0x00000001 #define NV_REG_STR_RM_GUEST_ECC_STATE_DEFAULT 0x00000001 +// +// TYPE DWORD +// This regkey allows to enable RM test only code paths +// 0 - Disable RM test only code +// 1 - Enable RM test only code +// +#define NV_REG_STR_RM_ENABLE_RM_TEST_ONLY_CODE "EnableRmTestOnlyCode" +#define NV_REG_STR_RM_ENABLE_RM_TEST_ONLY_CODE_DISABLED 0x00000000 +#define NV_REG_STR_RM_ENABLE_RM_TEST_ONLY_CODE_ENABLED 0x00000001 + // // Type DWORD // This regkey force-disables write-combine iomap allocations, used for chipsets where @@ -2280,45 +2379,6 @@ #define NV_REG_STR_RM_FORCE_DISABLE_IOMAP_WC_NO 0x00000000 #define NV_REG_STR_RM_FORCE_DISABLE_IOMAP_WC_DEFAULT NV_REG_STR_RM_FORCE_DISABLE_IOMAP_WC_NO -// -// Regkey to configure Per VM RunList. -// Type Dword -// BIT 0:0 - Overall PVMRL enable/disable. -// 0 - Disable / Default - 1 HW runlist per engine. -// 1 - Enable - 1 SW runlist per VM for some engines. -// BIT 1:1 - Adaptive Round Robin Scheduler -// 0 - Enable / Default - Use Adaptive Round Robin Scheduler -// 1 - Disable - Use Legacy PVMRL -// BIT 7:4 - PVMRL scheduler to run. -// 0 - equal share / Default - equal share amongst running vGPUs. -// 1 - fixed share - fixed share of the physical GPU. -// BIT 21:12 - PVMRL Scheduling frequency. -// 0 - Default timeslice. -// F - Timeslice = 1000 / F. -// BIT 23:16 - PVMRL timeslice in ms (Milli-seconds). -// 0 - Default timeslice. -// T - Timeslice of T ms. -// BIT 31:24 - ARR Average Factor -// 0 - Default Average Factor -// F - Average Factor = F -// -#define NV_REG_STR_RM_PVMRL "RmPVMRL" -#define NV_REG_STR_RM_PVMRL_ENABLE 0:0 -#define NV_REG_STR_RM_PVMRL_ENABLE_DEFAULT 0x00000000 -#define NV_REG_STR_RM_PVMRL_ENABLE_NO 0x00000000 -#define NV_REG_STR_RM_PVMRL_ENABLE_YES 0x00000001 -#define NV_REG_STR_RM_PVMRL_ARR_DISABLE 1:1 -#define NV_REG_STR_RM_PVMRL_ARR_DISABLE_DEFAULT 0x00000000 -#define NV_REG_STR_RM_PVMRL_ARR_DISABLE_NO 0x00000000 -#define NV_REG_STR_RM_PVMRL_ARR_DISABLE_YES 0x00000001 -#define NV_REG_STR_RM_PVMRL_SCHED_POLICY 7:4 -#define NV_REG_STR_RM_PVMRL_SCHED_POLICY_DEFAULT 0x00000000 -#define NV_REG_STR_RM_PVMRL_SCHED_POLICY_VGPU_EQUAL_SHARE 0x00000000 -#define NV_REG_STR_RM_PVMRL_SCHED_POLICY_VGPU_FIXED_SHARE 0x00000001 -#define NV_REG_STR_RM_PVMRL_FREQUENCY 21:12 -#define NV_REG_STR_RM_PVMRL_TIMESLICE 23:16 -#define NV_REG_STR_RM_PVMRL_AVERAGE_FACTOR 31:24 - // // TYPE DWORD // This regkey will increase the margin after the end of WPR2 when booting GSP-RM. @@ -2359,6 +2419,45 @@ #define NV_REG_STR_RM_RELAXED_GSP_INIT_LOCKING_ENABLE 0x00000001 #define NV_REG_STR_RM_RELAXED_GSP_INIT_LOCKING_DEFAULT 0x00000002 +// +// Regkey to configure Per VM RunList. +// Type Dword +// BIT 0:0 - Overall PVMRL enable/disable. +// 0 - Disable / Default - 1 HW runlist per engine. +// 1 - Enable - 1 SW runlist per VM for some engines. +// BIT 1:1 - Adaptive Round Robin Scheduler +// 0 - Enable / Default - Use Adaptive Round Robin Scheduler +// 1 - Disable - Use Legacy PVMRL +// BIT 7:4 - PVMRL scheduler to run. +// 0 - equal share / Default - equal share amongst running vGPUs. +// 1 - fixed share - fixed share of the physical GPU. +// BIT 21:12 - PVMRL Scheduling frequency. +// 0 - Default timeslice. +// F - Timeslice = 1000 / F. +// BIT 23:16 - PVMRL timeslice in ms (Milli-seconds). +// 0 - Default timeslice. +// T - Timeslice of T ms. +// BIT 31:24 - ARR Average Factor +// 0 - Default Average Factor +// F - Average Factor = F +// +#define NV_REG_STR_RM_PVMRL "RmPVMRL" +#define NV_REG_STR_RM_PVMRL_ENABLE 0:0 +#define NV_REG_STR_RM_PVMRL_ENABLE_DEFAULT 0x00000000 +#define NV_REG_STR_RM_PVMRL_ENABLE_NO 0x00000000 +#define NV_REG_STR_RM_PVMRL_ENABLE_YES 0x00000001 +#define NV_REG_STR_RM_PVMRL_ARR_DISABLE 1:1 +#define NV_REG_STR_RM_PVMRL_ARR_DISABLE_DEFAULT 0x00000000 +#define NV_REG_STR_RM_PVMRL_ARR_DISABLE_NO 0x00000000 +#define NV_REG_STR_RM_PVMRL_ARR_DISABLE_YES 0x00000001 +#define NV_REG_STR_RM_PVMRL_SCHED_POLICY 7:4 +#define NV_REG_STR_RM_PVMRL_SCHED_POLICY_DEFAULT 0x00000000 +#define NV_REG_STR_RM_PVMRL_SCHED_POLICY_VGPU_EQUAL_SHARE 0x00000000 +#define NV_REG_STR_RM_PVMRL_SCHED_POLICY_VGPU_FIXED_SHARE 0x00000001 +#define NV_REG_STR_RM_PVMRL_FREQUENCY 21:12 +#define NV_REG_STR_RM_PVMRL_TIMESLICE 23:16 +#define NV_REG_STR_RM_PVMRL_AVERAGE_FACTOR 31:24 + // // Type: Dword // This regkey overrides the state of the GR scrubber channel and determines diff --git a/src/nvidia/interface/rmapi/src/g_finn_rm_api.c b/src/nvidia/interface/rmapi/src/g_finn_rm_api.c index 835910cd45..0407d8643d 100644 --- a/src/nvidia/interface/rmapi/src/g_finn_rm_api.c +++ b/src/nvidia/interface/rmapi/src/g_finn_rm_api.c @@ -117,13 +117,12 @@ extern void rmapi_import_free(void *ptr); #endif - // // The purpose of the bit pump is to ensure 64-bit aligned access to the // buffer while enabling arbitrary bits to be read/written. // -typedef struct finn_bit_pump_for_read finn_bit_pump_for_read; +typedef struct finn_bit_pump_for_read finn_bit_pump_for_read; struct finn_bit_pump_for_read { uint64_t accumulator; // Bits not yet read from the data buffer @@ -241,6 +240,7 @@ static uint64_t finn_read_buffer(finn_bit_pump_for_read *bp, uint8_t bit_size) } + typedef struct finn_bit_pump_for_write finn_bit_pump_for_write; struct finn_bit_pump_for_write { @@ -385,8 +385,6 @@ static inline void finn_close_buffer_for_write(finn_bit_pump_for_write *bp) - - static NV_STATUS finnSerializeRoot_FINN_RM_API(NvU64 interface, NvU64 message, const char *api, finn_bit_pump_for_write *bp, NvBool seri_up); static NV_STATUS finnDeserializeRoot_FINN_RM_API(NvU64 interface, NvU64 message, finn_bit_pump_for_read *bp, char *api, NvLength dst_size, NvBool deser_up); #if (defined(NVRM)) @@ -475,6 +473,9 @@ static NV_STATUS finnSerializeMessage_NV0080_CTRL_HOST_GET_CAPS_PARAMS(const NV0 static NV_STATUS finnDeserializeMessage_NV0080_CTRL_HOST_GET_CAPS_PARAMS(finn_bit_pump_for_read *bp, NV0080_CTRL_HOST_GET_CAPS_PARAMS *api, NvLength api_size, NvBool deser_up); static NV_STATUS finnSerializeMessage_NV0080_CTRL_MSENC_GET_CAPS_PARAMS(const NV0080_CTRL_MSENC_GET_CAPS_PARAMS *api, finn_bit_pump_for_write *bp, NvBool seri_up); static NV_STATUS finnDeserializeMessage_NV0080_CTRL_MSENC_GET_CAPS_PARAMS(finn_bit_pump_for_read *bp, NV0080_CTRL_MSENC_GET_CAPS_PARAMS *api, NvLength api_size, NvBool deser_up); +#endif // (defined(NVRM)) + +#if (defined(NVRM)) static NV_STATUS finnSerializeMessage_NV2080_CTRL_BIOS_GET_NBSI_OBJ_PARAMS(const NV2080_CTRL_BIOS_GET_NBSI_OBJ_PARAMS *api, finn_bit_pump_for_write *bp, NvBool seri_up); static NV_STATUS finnDeserializeMessage_NV2080_CTRL_BIOS_GET_NBSI_OBJ_PARAMS(finn_bit_pump_for_read *bp, NV2080_CTRL_BIOS_GET_NBSI_OBJ_PARAMS *api, NvLength api_size, NvBool deser_up); static NV_STATUS finnSerializeMessage_NV2080_CTRL_CE_GET_CAPS_PARAMS(const NV2080_CTRL_CE_GET_CAPS_PARAMS *api, finn_bit_pump_for_write *bp, NvBool seri_up); @@ -707,12 +708,11 @@ NV_STATUS finnDeserializeInternal_FINN_RM_API(const char *src, NvLength src_size return NV_ERR_BUFFER_TOO_SMALL; } - // Open the bit punp, skipping past the header. + // Open the bit pump, skipping past the header. finn_open_buffer_for_read(&bp, (const uint64_t *) (src + sizeof(FINN_RM_API)), (const uint64_t *) (src_max)); // Dispatch to interface-specific routine status = finnDeserializeRoot_FINN_RM_API(header->interface, header->message, &bp, api, api_size, deser_up); - // Nothing more to do if there was an error. if (status != NV_OK) return status; @@ -907,7 +907,7 @@ static NV_STATUS finnSerializeInterface_FINN_GT200_DEBUGGER_DEBUG(NvU64 message, } -// Deerialize this interface. +// Deserialize this interface. static NV_STATUS finnDeserializeInterface_FINN_GT200_DEBUGGER_DEBUG(NvU64 message, finn_bit_pump_for_read *bp, FINN_GT200_DEBUGGER_DEBUG *api_intf, NvLength api_size, NvBool deser_up) { // Deerialize one of 2 messages in this interface. @@ -977,7 +977,7 @@ static NV_STATUS finnSerializeInterface_FINN_MAXWELL_CHANNEL_GPFIFO_A_GPFIFO(NvU } -// Deerialize this interface. +// Deserialize this interface. static NV_STATUS finnDeserializeInterface_FINN_MAXWELL_CHANNEL_GPFIFO_A_GPFIFO(NvU64 message, finn_bit_pump_for_read *bp, FINN_MAXWELL_CHANNEL_GPFIFO_A_GPFIFO *api_intf, NvLength api_size, NvBool deser_up) { // Deerialize one of 3 messages in this interface. @@ -1047,7 +1047,7 @@ static NV_STATUS finnSerializeInterface_FINN_NV01_DEVICE_0_DMA(NvU64 message, co } -// Deerialize this interface. +// Deserialize this interface. static NV_STATUS finnDeserializeInterface_FINN_NV01_DEVICE_0_DMA(NvU64 message, finn_bit_pump_for_read *bp, FINN_NV01_DEVICE_0_DMA *api_intf, NvLength api_size, NvBool deser_up) { // Deerialize one of 1 messages in this interface. @@ -1109,7 +1109,7 @@ static NV_STATUS finnSerializeInterface_FINN_NV01_DEVICE_0_FB(NvU64 message, con } -// Deerialize this interface. +// Deserialize this interface. static NV_STATUS finnDeserializeInterface_FINN_NV01_DEVICE_0_FB(NvU64 message, finn_bit_pump_for_read *bp, FINN_NV01_DEVICE_0_FB *api_intf, NvLength api_size, NvBool deser_up) { // Deerialize one of 1 messages in this interface. @@ -1178,7 +1178,7 @@ static NV_STATUS finnSerializeInterface_FINN_NV01_DEVICE_0_FIFO(NvU64 message, c } -// Deerialize this interface. +// Deserialize this interface. static NV_STATUS finnDeserializeInterface_FINN_NV01_DEVICE_0_FIFO(NvU64 message, finn_bit_pump_for_read *bp, FINN_NV01_DEVICE_0_FIFO *api_intf, NvLength api_size, NvBool deser_up) { // Deerialize one of 3 messages in this interface. @@ -1254,7 +1254,7 @@ static NV_STATUS finnSerializeInterface_FINN_NV01_DEVICE_0_GPU(NvU64 message, co } -// Deerialize this interface. +// Deserialize this interface. static NV_STATUS finnDeserializeInterface_FINN_NV01_DEVICE_0_GPU(NvU64 message, finn_bit_pump_for_read *bp, FINN_NV01_DEVICE_0_GPU *api_intf, NvLength api_size, NvBool deser_up) { // Deerialize one of 1 messages in this interface. @@ -1316,7 +1316,7 @@ static NV_STATUS finnSerializeInterface_FINN_NV01_DEVICE_0_GR(NvU64 message, con } -// Deerialize this interface. +// Deserialize this interface. static NV_STATUS finnDeserializeInterface_FINN_NV01_DEVICE_0_GR(NvU64 message, finn_bit_pump_for_read *bp, FINN_NV01_DEVICE_0_GR *api_intf, NvLength api_size, NvBool deser_up) { // Deerialize one of 1 messages in this interface. @@ -1378,7 +1378,7 @@ static NV_STATUS finnSerializeInterface_FINN_NV01_DEVICE_0_HOST(NvU64 message, c } -// Deerialize this interface. +// Deserialize this interface. static NV_STATUS finnDeserializeInterface_FINN_NV01_DEVICE_0_HOST(NvU64 message, finn_bit_pump_for_read *bp, FINN_NV01_DEVICE_0_HOST *api_intf, NvLength api_size, NvBool deser_up) { // Deerialize one of 1 messages in this interface. @@ -1440,7 +1440,7 @@ static NV_STATUS finnSerializeInterface_FINN_NV01_DEVICE_0_MSENC(NvU64 message, } -// Deerialize this interface. +// Deserialize this interface. static NV_STATUS finnDeserializeInterface_FINN_NV01_DEVICE_0_MSENC(NvU64 message, finn_bit_pump_for_read *bp, FINN_NV01_DEVICE_0_MSENC *api_intf, NvLength api_size, NvBool deser_up) { // Deerialize one of 1 messages in this interface. @@ -1502,7 +1502,7 @@ static NV_STATUS finnSerializeInterface_FINN_NV01_ROOT_NVD(NvU64 message, const } -// Deerialize this interface. +// Deserialize this interface. static NV_STATUS finnDeserializeInterface_FINN_NV01_ROOT_NVD(NvU64 message, finn_bit_pump_for_read *bp, FINN_NV01_ROOT_NVD *api_intf, NvLength api_size, NvBool deser_up) { // Deerialize one of 1 messages in this interface. @@ -1545,9 +1545,10 @@ static NvU64 finnUnserializedInterfaceSize_FINN_NV01_ROOT_NVD(NvU64 message) // Serialize this interface. static NV_STATUS finnSerializeInterface_FINN_NV20_SUBDEVICE_0_BIOS(NvU64 message, const char *api_intf, finn_bit_pump_for_write *bp, NvBool seri_up) { - // Serialize one of 1 messages in this interface. + // Serialize one of 2 messages in this interface. switch (message) { + #if (defined(NVRM)) case FINN_MESSAGE_ID(NV2080_CTRL_BIOS_GET_NBSI_OBJ_PARAMS): return finnSerializeMessage_NV2080_CTRL_BIOS_GET_NBSI_OBJ_PARAMS((const NV2080_CTRL_BIOS_GET_NBSI_OBJ_PARAMS *) api_intf, bp, seri_up); @@ -1564,12 +1565,13 @@ static NV_STATUS finnSerializeInterface_FINN_NV20_SUBDEVICE_0_BIOS(NvU64 message } -// Deerialize this interface. +// Deserialize this interface. static NV_STATUS finnDeserializeInterface_FINN_NV20_SUBDEVICE_0_BIOS(NvU64 message, finn_bit_pump_for_read *bp, FINN_NV20_SUBDEVICE_0_BIOS *api_intf, NvLength api_size, NvBool deser_up) { - // Deerialize one of 1 messages in this interface. + // Deerialize one of 2 messages in this interface. switch (message) { + #if (defined(NVRM)) case FINN_MESSAGE_ID(NV2080_CTRL_BIOS_GET_NBSI_OBJ_PARAMS): return finnDeserializeMessage_NV2080_CTRL_BIOS_GET_NBSI_OBJ_PARAMS(bp, (NV2080_CTRL_BIOS_GET_NBSI_OBJ_PARAMS *) api_intf, api_size, deser_up); @@ -1592,6 +1594,7 @@ static NvU64 finnUnserializedInterfaceSize_FINN_NV20_SUBDEVICE_0_BIOS(NvU64 mess // Forward to message-specific routine. switch (message) { + #if (defined(NVRM)) case FINN_MESSAGE_ID(NV2080_CTRL_BIOS_GET_NBSI_OBJ_PARAMS): return sizeof(NV2080_CTRL_BIOS_GET_NBSI_OBJ_PARAMS); @@ -1626,7 +1629,7 @@ static NV_STATUS finnSerializeInterface_FINN_NV20_SUBDEVICE_0_CE(NvU64 message, } -// Deerialize this interface. +// Deserialize this interface. static NV_STATUS finnDeserializeInterface_FINN_NV20_SUBDEVICE_0_CE(NvU64 message, finn_bit_pump_for_read *bp, FINN_NV20_SUBDEVICE_0_CE *api_intf, NvLength api_size, NvBool deser_up) { // Deerialize one of 1 messages in this interface. @@ -1690,7 +1693,7 @@ static NV_STATUS finnSerializeInterface_FINN_NV20_SUBDEVICE_0_GPU(NvU64 message, } -// Deerialize this interface. +// Deserialize this interface. static NV_STATUS finnDeserializeInterface_FINN_NV20_SUBDEVICE_0_GPU(NvU64 message, finn_bit_pump_for_read *bp, FINN_NV20_SUBDEVICE_0_GPU *api_intf, NvLength api_size, NvBool deser_up) { // Deerialize one of 2 messages in this interface. @@ -1756,7 +1759,7 @@ static NV_STATUS finnSerializeInterface_FINN_NV20_SUBDEVICE_0_I2C(NvU64 message, } -// Deerialize this interface. +// Deserialize this interface. static NV_STATUS finnDeserializeInterface_FINN_NV20_SUBDEVICE_0_I2C(NvU64 message, finn_bit_pump_for_read *bp, FINN_NV20_SUBDEVICE_0_I2C *api_intf, NvLength api_size, NvBool deser_up) { // Deerialize one of 1 messages in this interface. @@ -1818,7 +1821,7 @@ static NV_STATUS finnSerializeInterface_FINN_NV20_SUBDEVICE_0_NVD(NvU64 message, } -// Deerialize this interface. +// Deserialize this interface. static NV_STATUS finnDeserializeInterface_FINN_NV20_SUBDEVICE_0_NVD(NvU64 message, finn_bit_pump_for_read *bp, FINN_NV20_SUBDEVICE_0_NVD *api_intf, NvLength api_size, NvBool deser_up) { // Deerialize one of 1 messages in this interface. @@ -1880,7 +1883,7 @@ static NV_STATUS finnSerializeInterface_FINN_NV20_SUBDEVICE_0_PERF(NvU64 message } -// Deerialize this interface. +// Deserialize this interface. static NV_STATUS finnDeserializeInterface_FINN_NV20_SUBDEVICE_0_PERF(NvU64 message, finn_bit_pump_for_read *bp, FINN_NV20_SUBDEVICE_0_PERF *api_intf, NvLength api_size, NvBool deser_up) { // Deerialize one of 1 messages in this interface. @@ -1942,7 +1945,7 @@ static NV_STATUS finnSerializeInterface_FINN_NV20_SUBDEVICE_0_RC(NvU64 message, } -// Deerialize this interface. +// Deserialize this interface. static NV_STATUS finnDeserializeInterface_FINN_NV20_SUBDEVICE_0_RC(NvU64 message, finn_bit_pump_for_read *bp, FINN_NV20_SUBDEVICE_0_RC *api_intf, NvLength api_size, NvBool deser_up) { // Deerialize one of 1 messages in this interface. @@ -2000,7 +2003,7 @@ static NV_STATUS finnSerializeInterface_FINN_NV20_SUBDEVICE_DIAG_GPU(NvU64 messa } -// Deerialize this interface. +// Deserialize this interface. static NV_STATUS finnDeserializeInterface_FINN_NV20_SUBDEVICE_DIAG_GPU(NvU64 message, finn_bit_pump_for_read *bp, FINN_NV20_SUBDEVICE_DIAG_GPU *api_intf, NvLength api_size, NvBool deser_up) { // Deerialize one of 2 messages in this interface. @@ -2056,7 +2059,7 @@ static NV_STATUS finnSerializeInterface_FINN_NV40_I2C_I2C(NvU64 message, const c } -// Deerialize this interface. +// Deserialize this interface. static NV_STATUS finnDeserializeInterface_FINN_NV40_I2C_I2C(NvU64 message, finn_bit_pump_for_read *bp, FINN_NV40_I2C_I2C *api_intf, NvLength api_size, NvBool deser_up) { // Deerialize one of 2 messages in this interface. @@ -3898,6 +3901,9 @@ static NV_STATUS finnDeserializeMessage_NV0080_CTRL_MSENC_GET_CAPS_PARAMS(finn_b return NV_OK; } +#endif // (defined(NVRM)) + +#if (defined(NVRM)) // Serialize each of the 8 field(s). // 3 out of 7 independent field(s) are reordered to be before 1 dependent field(s). diff --git a/src/nvidia/kernel/inc/objrpc.h b/src/nvidia/kernel/inc/objrpc.h index 95c11c300e..6e46b123da 100644 --- a/src/nvidia/kernel/inc/objrpc.h +++ b/src/nvidia/kernel/inc/objrpc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2004-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2004-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -21,6 +21,7 @@ * DEALINGS IN THE SOFTWARE. */ +#pragma once // #ifndef NVOC // #include "g_objrpc_nvoc.h" // #endif diff --git a/src/nvidia/src/kernel/core/bin_data.c b/src/nvidia/src/kernel/core/bin_data.c index f56acfee42..a01a3c04dc 100644 --- a/src/nvidia/src/kernel/core/bin_data.c +++ b/src/nvidia/src/kernel/core/bin_data.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -408,11 +408,11 @@ void bindataMarkReferenced(const BINDATA_STORAGE *pBinStorage) void* bindataGetNextUnreferencedStorage(const BINDATA_STORAGE **iter, NvU32 *pDataSize) { - extern BINDATA_STORAGE_PVT g_bindata_pvt; + extern struct BINDATA_STORAGE_PVT_ALL g_bindata_pvt; extern const NvU32 g_bindata_pvt_count; const BINDATA_STORAGE_PVT *iterPvt = *(const BINDATA_STORAGE_PVT **)iter; - const BINDATA_STORAGE_PVT *firstPvt = &g_bindata_pvt; + const BINDATA_STORAGE_PVT *firstPvt = (BINDATA_STORAGE_PVT*)&g_bindata_pvt; const BINDATA_STORAGE_PVT *lastPvt = firstPvt + g_bindata_pvt_count - 1; // This API makes no sense if the data is const, so just bail out early. diff --git a/src/nvidia/src/kernel/core/locks.c b/src/nvidia/src/kernel/core/locks.c index 113aa2b173..7d341e5f32 100644 --- a/src/nvidia/src/kernel/core/locks.c +++ b/src/nvidia/src/kernel/core/locks.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -680,21 +680,14 @@ static void _gpuLocksAcquireDisableInterrupts(NvU32 gpuInst, NvBool bInIsr) intrMaskFlags &= ~INTR_MASK_FLAGS_ISR_SKIP_MASK_UPDATE; intrSetIntrMaskFlags(pIntr, intrMaskFlags); - if (pIntr->getProperty(pIntr, PDB_PROP_INTR_USE_INTR_MASK_FOR_LOCKING)) + // During non-cond RM code, allow some intrs to come in. + if (pIntr->getProperty(pIntr, PDB_PROP_INTR_SIMPLIFIED_VBLANK_HANDLING_FOR_CTRL_TREE)) { - // During non-cond RM code, allow some intrs to come in. - if (pIntr->getProperty(pIntr, PDB_PROP_INTR_SIMPLIFIED_VBLANK_HANDLING_FOR_CTRL_TREE)) - { - intrSetDisplayInterruptEnable_HAL(pGpu, pIntr, NV_TRUE, NULL /* threadstate */); - } - else - { - intrSetIntrMask_HAL(pGpu, pIntr, &pIntr->intrMask.engMaskUnblocked, NULL /* threadstate */); - } + intrSetDisplayInterruptEnable_HAL(pGpu, pIntr, NV_TRUE, NULL /* threadstate */); } else { - // Lazy case - we will lazily disable Intrs via the ISR as seen + intrSetIntrMask_HAL(pGpu, pIntr, &pIntr->intrMask.engMaskUnblocked, NULL /* threadstate */); } intrSetIntrEnInHw_HAL(pGpu, pIntr, intrGetIntrEn(pIntr), NULL /* threadstate */); @@ -775,18 +768,6 @@ _rmGpuLocksAcquire(NvU32 gpuMask, NvU32 flags, NvU32 module, void *ra, NvU32 *pG goto done; } - // - // If a read-only lock was requested, check to see if the module is allowed - // to take read-only locks - // - if ((flags & GPU_LOCK_FLAGS_READ) && (module != RM_LOCK_MODULES_NONE)) - { - if ((pSys->gpuLockModuleMask & NVBIT(module)) == 0) - { - flags &= ~RMAPI_LOCK_FLAGS_READ; - } - } - if ((gpuMask & rmGpuLockInfo.gpusLockableMask) != gpuMask) { NV_PRINTF(LEVEL_WARNING, @@ -1489,17 +1470,9 @@ static void _gpuLocksReleaseEnableInterrupts(NvU32 gpuInst, NvU32 flags) intrMaskFlags |= INTR_MASK_FLAGS_ISR_SKIP_MASK_UPDATE; intrSetIntrMaskFlags(pIntr, intrMaskFlags); - if (pIntr->getProperty(pIntr, PDB_PROP_INTR_USE_INTR_MASK_FOR_LOCKING)) - { - // Allow all intrs to be reflected and come in. - bitVectorSetAll(&engines); - intrSetIntrMask_HAL(pGpu, pIntr, &engines, NULL /* threadstate */); - } - else - { - // Lazy case - Enable all engine intrs that may have been disabled via the ISR - bitVectorClrAll(&pIntr->intrMask.engMaskIntrsDisabled); - } + // Allow all intrs to be reflected and come in. + bitVectorSetAll(&engines); + intrSetIntrMask_HAL(pGpu, pIntr, &engines, NULL /* threadstate */); rmIntrMaskLockRelease(pGpu, oldIrql); } diff --git a/src/nvidia/src/kernel/core/locks_common.c b/src/nvidia/src/kernel/core/locks_common.c index 584075b39c..a00fd1d2fa 100644 --- a/src/nvidia/src/kernel/core/locks_common.c +++ b/src/nvidia/src/kernel/core/locks_common.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -162,26 +162,15 @@ workItemLocksAcquire(NvU32 gpuInstance, NvU32 flags, NvU32 *pReleaseLocks, NvU32 *pReleaseLocks |= releaseFlags; } - if ((flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS_RW) || - (flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS_RO) || + if ((flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS) || (flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_DEVICE_RW) || (flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_DEVICE_RO) || (flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_SUBDEVICE_RW) || (flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_SUBDEVICE_RO)) { NvU32 gpuLockFlags = GPUS_LOCK_FLAGS_NONE; - NvU32 releaseFlags = OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS_RW; - if (((flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS_RO) || - (flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_DEVICE_RO) || - (flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_SUBDEVICE_RO)) && - (pSys->gpuLockModuleMask & RM_LOCK_MODULE_GRP(RM_LOCK_MODULES_WORKITEM))) - { - gpuLockFlags = GPU_LOCK_FLAGS_READ; - releaseFlags = OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS_RO; - } - - if (flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS_RW) + if (flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS) grp = GPU_LOCK_GRP_ALL; else if (flags & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_DEVICE_RW) grp = GPU_LOCK_GRP_DEVICE; @@ -194,7 +183,7 @@ workItemLocksAcquire(NvU32 gpuInstance, NvU32 flags, NvU32 *pReleaseLocks, NvU32 goto done; // All of these call into the same function, just share the flag - *pReleaseLocks |= releaseFlags; + *pReleaseLocks |= OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS; pGpu = gpumgrGetGpu(gpuInstance); if (pGpu == NULL) @@ -243,16 +232,11 @@ workItemLocksRelease(NvU32 releaseLocks, NvU32 gpuMask) { OBJSYS *pSys = SYS_GET_INSTANCE(); - if (releaseLocks & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS_RW) + if (releaseLocks & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS) { rmGpuGroupLockRelease(gpuMask, GPUS_LOCK_FLAGS_NONE); } - if (releaseLocks & OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS_RO) - { - rmGpuGroupLockRelease(gpuMask, GPU_LOCK_FLAGS_READ); - } - if ((releaseLocks & OS_QUEUE_WORKITEM_FLAGS_LOCK_API_RW) || (releaseLocks & OS_QUEUE_WORKITEM_FLAGS_LOCK_API_RO)) { diff --git a/src/nvidia/src/kernel/core/system.c b/src/nvidia/src/kernel/core/system.c index ff4d1effb0..9d59be3e9a 100644 --- a/src/nvidia/src/kernel/core/system.c +++ b/src/nvidia/src/kernel/core/system.c @@ -173,7 +173,6 @@ NV_STATUS sysConstruct_IMPL(OBJSYS *pSys) { NV_STATUS status; - OBJOS *pOS; NvU32 sec = 0; NvU32 uSec = 0; @@ -191,22 +190,20 @@ sysConstruct_IMPL(OBJSYS *pSys) } // Use the monotonic system clock for a unique value - pOS = SYS_GET_OS(pSys); osGetCurrentTime(&sec, &uSec); pSys->rmInstanceId = (NvU64)sec * 1000000 + (NvU64)uSec; { // Using Hypervisor native interface to detect + OBJOS *pOS = SYS_GET_OS(pSys); OBJHYPERVISOR *pHypervisor = SYS_GET_HYPERVISOR(pSys); if (pHypervisor) hypervisorDetection(pHypervisor, pOS); } - if (!pOS->osRmInitRm(pOS)) - { - status = NV_ERR_GENERIC; + status = osRmInitRm(); + if (status != NV_OK) goto failed; - } _sysNvSwitchDetection(pSys); @@ -791,6 +788,12 @@ sysInitRegistryOverrides_IMPL pSys->setProperty(pSys, PDB_PROP_SYS_GPU_LOCK_MIDPATH_ENABLED, !!data32); } + if (osReadRegistryDword(pGpu, NV_REG_STR_RM_ENABLE_RM_TEST_ONLY_CODE, + &data32) == NV_OK) + { + pSys->setProperty(pSys, PDB_PROP_SYS_ENABLE_RM_TEST_ONLY_CODE, !!data32); + } + gpumgrSetGpuNvlinkBwModeFromRegistry(pGpu); } diff --git a/src/nvidia/src/kernel/diagnostics/journal.c b/src/nvidia/src/kernel/diagnostics/journal.c index 530060276c..373fa61d76 100644 --- a/src/nvidia/src/kernel/diagnostics/journal.c +++ b/src/nvidia/src/kernel/diagnostics/journal.c @@ -4188,6 +4188,8 @@ _rcdbNocatReportAssert RM_NOCAT_JOURNAL_ENTRY *pNocatEntry = NULL; NvU32 gpuCnt= 0; OBJGPU *pTmpGpu = gpumgrGetGpu(0); + NvBool recordPosted = NV_FALSE; + // validate inputs. if ((pRcdb == NULL) || (pAssertRec == NULL)) @@ -4257,18 +4259,14 @@ _rcdbNocatReportAssert // increment the count pDiagData = (RM_NOCAT_ASSERT_DIAG_BUFFER*)&pNocatEntry->nocatJournalEntry.diagBuffer; pDiagData->count++; + recordPosted = NV_TRUE; } _rcdbReleaseNocatJournalRecord(pNocatEntry); - } } - else - { - pRcdb->nocatJournalDescriptor.nocatEventCounters[NV2080_NOCAT_JOURNAL_REPORT_ACTIVITY_BUSY_IDX]++; - } portAtomicDecrementS32(&concurrentRingBufferAccess); } - else + if (!recordPosted) { // we are logging this assert, save off the stack so we can use it to // compare against future asserts. diff --git a/src/nvidia/src/kernel/diagnostics/nvlog_printf.c b/src/nvidia/src/kernel/diagnostics/nvlog_printf.c index d031c8bfe2..bb8eafc914 100644 --- a/src/nvidia/src/kernel/diagnostics/nvlog_printf.c +++ b/src/nvidia/src/kernel/diagnostics/nvlog_printf.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2002-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2002-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -223,7 +223,8 @@ _nvDbgPrepareString // Temporary helper to map LEVEL_xxx constants to a platform specific level. // #if PORT_IS_FUNC_SUPPORTED(portDbgExPrintfLevel) -static NvU32 _nvDbgLevelToPlatformLevel(NvBool bForce, NvU32 level) + +static NvU32 _nvDbgForceLevel(NvBool bForce, NvU32 level) { return bForce ? LEVEL_FATAL : level; } @@ -249,12 +250,12 @@ void nvDbg_vPrintf if (nvDbg_PrintMsg(filename, linenumber, function, debuglevel, printf_format, &force, &prefix)) { portSyncSpinlockAcquire(_nv_dbg_lock); - _nvDbgPrepareString(filename, linenumber, function, printf_format, prefix, arglist); + _nvDbgPrepareString(filename, linenumber, function, printf_format, prefix, arglist); #if PORT_IS_FUNC_SUPPORTED(portDbgExPrintfLevel) - portDbgExPrintfLevel(_nvDbgLevelToPlatformLevel(force, debuglevel), - "%.*s", MAX_ERROR_STRING, _nv_dbg_string); + portDbgExPrintfLevel(_nvDbgForceLevel(force, debuglevel), + "%.*s", MAX_ERROR_STRING, _nv_dbg_string); #else - portDbgPrintString(_nv_dbg_string, MAX_ERROR_STRING); + portDbgPrintString(_nv_dbg_string, MAX_ERROR_STRING); #endif portSyncSpinlockRelease(_nv_dbg_lock); } diff --git a/src/nvidia/src/kernel/gpu/arch/hopper/kern_gpu_gh100.c b/src/nvidia/src/kernel/gpu/arch/hopper/kern_gpu_gh100.c index 8bde43da65..0fb85fafe3 100644 --- a/src/nvidia/src/kernel/gpu/arch/hopper/kern_gpu_gh100.c +++ b/src/nvidia/src/kernel/gpu/arch/hopper/kern_gpu_gh100.c @@ -204,7 +204,8 @@ gpuHandleSecFault_GH100 OBJGPU *pGpu ) { - NvU32 secDebug = 0; + NvU32 secDebug = 0; + NvU32 iffPos; // // Read SEC_FAULT config space to determine what went wrong. @@ -243,10 +244,20 @@ gpuHandleSecFault_GH100 LOG_SEC_FAULT(_FAULT_PRI); LOG_SEC_FAULT(_FAULT_WDG); LOG_SEC_FAULT(_FAULT_BOOTFSM); - LOG_SEC_FAULT(_IFF_POS); #undef LOG_SEC_FAULT + // IFF_POS has a multi-bit value + (void)REF_NUM(NV_EP_PCFG_GPU_VSEC_DEBUG_SEC_IFF_POS, 0); + iffPos = DRF_VAL(_EP_PCFG_GPU, _VSEC_DEBUG_SEC, _IFF_POS, secDebug); + if (iffPos != 0) + { + MODS_ARCH_ERROR_PRINTF("NV_EP_PCFG_GPU_VSEC_DEBUG_SEC_IFF_POS value: 0x%x\n", iffPos); + NV_PRINTF(LEVEL_FATAL, "SEC_FAULT type: _IFF_POS value: 0x%x\n", iffPos); + nvErrorLog_va((void *)(pGpu), SEC_FAULT_ERROR, + "SEC_FAULT: _IFF_POS value: 0x%x", iffPos); + } + // // After SEC_FAULT occurs, the GPU will only return SCPM dummy values until properly reset. // Only cold reset will clear SEC_FAULT, not hot reset. This GPU is as good as lost. diff --git a/src/nvidia/src/kernel/gpu/arch/maxwell/kern_gpu_gm107.c b/src/nvidia/src/kernel/gpu/arch/maxwell/kern_gpu_gm107.c index 24076c46be..82ccab9edd 100644 --- a/src/nvidia/src/kernel/gpu/arch/maxwell/kern_gpu_gm107.c +++ b/src/nvidia/src/kernel/gpu/arch/maxwell/kern_gpu_gm107.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/src/kernel/gpu/bif/arch/ampere/kernel_bif_ga100.c b/src/nvidia/src/kernel/gpu/bif/arch/ampere/kernel_bif_ga100.c index fa5310bf2e..d62b9bf265 100644 --- a/src/nvidia/src/kernel/gpu/bif/arch/ampere/kernel_bif_ga100.c +++ b/src/nvidia/src/kernel/gpu/bif/arch/ampere/kernel_bif_ga100.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -23,11 +23,15 @@ /* ------------------------ Includes ---------------------------------------- */ +#include "gpu_mgr/gpu_mgr.h" #include "gpu/bif/kernel_bif.h" #include "gpu/fifo/kernel_fifo.h" -#include "published/ampere/ga100/dev_nv_xve_addendum.h" -#include "published/ampere/ga100/dev_nv_xve.h" +#include "gpu/nvlink/kernel_nvlink.h" #include "published/ampere/ga100/dev_boot.h" +#include "kernel/gpu/mc/kernel_mc.h" +#include "platform/chipset/chipset.h" +#include "published/ampere/ga100/dev_nv_xve.h" +#include "published/ampere/ga100/dev_nv_xve_addendum.h" /* ------------------------ Public Functions -------------------------------- */ @@ -333,6 +337,151 @@ kbifStoreBarRegOffsets_GA100 } +/*! + * @brief Do any work necessary to be able to do a full chip reset. + * + * This code needs to accomplish these objectives: + * + * - Perform any operations needed to make sure that the HW will not glitch or + * otherwise fail after the reset. This includes all potential WARs. + * - Perform any operations needed to make sure the devinit scripts can be + * executed properly after the reset. + * - Modify any SW state that could potentially cause errors during/after the reset. + * + * @param[in] pGpu GPU object pointer + * @param[in] pKernelBif KernelBif object pointer + * + * @return None + */ +void +kbifPrepareForFullChipReset_GA100 +( + OBJGPU *pGpu, + KernelBif *pKernelBif +) +{ + KernelBus *pKernelBus = GPU_GET_KERNEL_BUS(pGpu); + KernelMc *pKernelMc = GPU_GET_KERNEL_MC(pGpu); + KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); + OBJSYS *pSys = SYS_GET_INSTANCE(); + OBJCL *pCl = SYS_GET_CL(pSys); + + NvBool bIsFLRSupportedAndEnabled; + NvU32 oldPmc, oldPmcDevice; + + bIsFLRSupportedAndEnabled = (pKernelBif->getProperty(pKernelBif, PDB_PROP_KBIF_FLR_SUPPORTED)) && + !(pKernelBif->bForceDisableFLR); + + // If FLR is supported, we must always shut down any NVLinks connected to this GPU + if (bIsFLRSupportedAndEnabled && pKernelNvlink && + pKernelNvlink->getProperty(pKernelNvlink, PDB_PROP_KNVLINK_ENABLED)) + { + if (knvlinkPrepareForXVEReset(pGpu, pKernelNvlink, NV_FALSE) != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, + "NVLINK prepare for fullchip reset failed.\n"); + + DBG_BREAKPOINT(); + } + } + + // + // FLR/SW_RESET pre-conditioning is required for Turing and earlier chips. + // For Ampere+ chips, it is only required if p2p mailbox support is enabled + // Note that for SW_RESET, we use pre-conditioning in all cases + // + if ((gpumgrGetGpuLinkCount(pGpu->gpuInstance) > 0) && (kbusIsP2pInitialized(pKernelBus))) + { + pKernelBif->setProperty(pKernelBif, PDB_PROP_KBIF_FLR_PRE_CONDITIONING_REQUIRED, NV_TRUE); + } + + // + // For GA100+ chips we don't need any pre-conditioning WARs for PF-FLR besides NVLink if + // p2p mailbox support is not enabled. We still use this pre-conditioning for + // SW RESET + // + if (bIsFLRSupportedAndEnabled && + (!(pKernelBif->getProperty(pKernelBif, PDB_PROP_KBIF_FLR_PRE_CONDITIONING_REQUIRED)))) + { + goto _bifPrepareForFullChipReset_GA100_exit; + } + + pGpu->setProperty(pGpu, PDB_PROP_GPU_PREPARING_FULLCHIP_RESET, NV_TRUE); + + // Disable P2P on all GPUs before RESET, + if (kbusPrepareForXVEReset_HAL(pGpu, pKernelBus) != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "BUS prepare for devinit failed.\n"); + + DBG_BREAKPOINT(); + } + + if (kbifPrepareForXveReset_HAL(pGpu, pKernelBif) != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "BIF prepare for devinit failed.\n"); + + DBG_BREAKPOINT(); + } + + // + // This code was added to solve a problem that we are seeing with the Microsoft new Win8 Tdr Tests + // The GPU is not hung but given more work then it can consume in 2 seconds. As a result we have some + // outstanding IO operations that will cause us issues in the future + // + oldPmc = kmcReadPmcEnableReg_HAL(pGpu, pKernelMc, NV_FALSE); + oldPmcDevice = kmcReadPmcEnableReg_HAL(pGpu, pKernelMc, NV_TRUE); + kbifResetHostEngines_HAL(pGpu, pKernelBif, pKernelMc); + + if (!pCl->getProperty(pCl, PDB_PROP_CL_PCIE_CONFIG_ACCESSIBLE) + ) + { + // + // We can not issue SW_RESET or Function Level Reset(FLR) as we are not able to access PCI + // config space. Now we have disabled engines, please re-enable them before + // tearing down RM. To be safe, do it right here. + // + GPU_REG_WR32(pGpu, NV_PMC_ENABLE, oldPmc); + GPU_REG_WR32(pGpu, NV_PMC_DEVICE_ENABLE(0), oldPmcDevice); + } + +_bifPrepareForFullChipReset_GA100_exit: + pGpu->setProperty(pGpu, PDB_PROP_GPU_PREPARING_FULLCHIP_RESET, NV_FALSE); +} + +/*! + * @brief Reset host engines in PMC_ENABLE and PMC_DEVICE_ENABLE. + * + * @param[in] pGpu The GPU object + * @param[in] pKernelBif KernelBif object pointer + */ +void +kbifResetHostEngines_GA100 +( + OBJGPU *pGpu, + KernelBif *pKernelBif, + KernelMc *pKernelMc +) +{ + NvU32 engineMask; + + // First Reset engines in NV_PMC_ENABLE + engineMask = kbifGetValidEnginesToReset_HAL(pGpu, pKernelBif); + NV_ASSERT(kmcWritePmcEnableReg_HAL(pGpu, pKernelMc, engineMask, NV_FALSE, NV_FALSE) == NV_OK); + + // + // Reset engines in NV_PMC_DEVICE_ENABLE. For Ampere and later chips, + // host engines have moved from NV_PMC_ENABLE to NV_PMC_DEVICE_ENABLE, + // hence we need to ensure that engines in the NV_PMC_DEVICE_ENABLE are + // reset too. + // + engineMask = kbifGetValidDeviceEnginesToReset_HAL(pGpu, pKernelBif); + if (engineMask) + { + NV_ASSERT_OK(kmcWritePmcEnableReg_HAL(pGpu, pKernelMc, engineMask, NV_FALSE, + gpuIsUsePmcDeviceEnableForHostEngineEnabled(pGpu))); + } +} + /*! * @brief Get the NV_PMC_ENABLE bit of the valid Engines to reset. * @@ -379,11 +528,9 @@ kbifGetValidDeviceEnginesToReset_GA100 // // If hardware increases the size of this register in future chips, we would // need to catch this and fork another HAL. + // Already obsoleted by GH100, but keeping the check // - if ((sizeof(NvU32) * NV_PMC_DEVICE_ENABLE__SIZE_1) > sizeof(NvU32)) - { - NV_ASSERT_FAILED("Assert for Mcheck to catch increase in register size. Fork this HAL"); - } + ct_assert(NV_PMC_DEVICE_ENABLE__SIZE_1 <= 1); for (engineID = 0; engineID < numEngines; engineID++) { @@ -405,3 +552,101 @@ kbifGetValidDeviceEnginesToReset_GA100 } +/*! + * @brief Reset the chip. + * + * Use Function Level Reset(FLR) to reset as much of the chip as possible. + * If FLR is not supported use the XVE sw reset logic . + * + * @param[in] pGpu GPU object pointer + * @param[in] pKernelBif KernelBif object pointer + * + * @return NV_STATUS + */ +NV_STATUS +kbifDoFullChipReset_GA100 +( + OBJGPU *pGpu, + KernelBif *pKernelBif +) +{ + NV_STATUS status = NV_OK; + NvBool bIsFLRSupportedAndEnabled; + + // + // We support FLR for SKUs which are FLR capable. + // Also check if we want to enforce legacy reset behavior by disabling FLR + // + bIsFLRSupportedAndEnabled = (pKernelBif->getProperty(pKernelBif, PDB_PROP_KBIF_FLR_SUPPORTED)) && + !(pKernelBif->bForceDisableFLR); + + // + // If FLR is supported, issue FLR otherwise issue SW_RESET + // There is no point in issuing SW_RESET if FLR fails because both of them reset Fn0 + // except that FLR resets XVE unit as well + // + if (bIsFLRSupportedAndEnabled) + { + NV_ASSERT_OK(status = kbifDoFunctionLevelReset_HAL(pGpu, pKernelBif)); + } + else + { + NV_PRINTF(LEVEL_ERROR, "FLR is either not supported or is disabled.\n"); + } + pGpu->setProperty(pGpu, PDB_PROP_GPU_IN_FULLCHIP_RESET, NV_TRUE); + + // execute rest of the sequence for SW_RESET only if we have not issued FLR above + + return status; +} + + +/*! + * @brief For function 0, clear 'outstanding downstream host reads' counter + * using config cycles + * + * @param[in] pGpu GPU object pointer + * @param[in] pKernelBif KernelBif object pointer + */ +void +kbifClearDownstreamReadCounter_GA100 +( + OBJGPU *pGpu, + KernelBif *pKernelBif +) +{ + void *handle; + NvU32 tempRegVal; + NvU16 vendorId; + NvU16 deviceId; + OBJSYS *pSys = SYS_GET_INSTANCE(); + OBJCL *pCl = SYS_GET_CL(pSys); + NvU32 domain = gpuGetDomain(pGpu); + NvU8 bus = gpuGetBus(pGpu); + NvU8 device = gpuGetDevice(pGpu); + + // + // Use config cycles(and not BAR0 transactions) to reset the counter. + // Currently, this function is called after FLR and before rmInit sequence. + // After FLR or in fact after most resets we don't use the standard macro + // to read/write a register(until rmInit sequence is complete).The macro + // will not allow access when PDB_PROP_GPU_IS_LOST is true. This PDB is + // required to keep other accesses from touching the GPU. + // + handle = osPciInitHandle(domain, bus, device, 0, &vendorId, &deviceId); + + tempRegVal = osPciReadDword(handle, NV_XVE_DBG0); + tempRegVal = FLD_SET_DRF(_XVE, _DBG0, + _OUTSTANDING_DOWNSTREAM_READ_CNTR_RESET, _TRIGGER, + tempRegVal); + + // + // After triggering the RESET bit, this does not wait for RESET to be + // complete. It is upto the caller to decide if it really wants to wait + // for the completion. For example, for FLR case, we do not want to waste + // cycles on this - it's okay to assume that this write will go through. + // + clPcieWriteDword(pCl, gpuGetDomain(pGpu), gpuGetBus(pGpu), + gpuGetDevice(pGpu), 0, NV_XVE_DBG0, tempRegVal); +} + diff --git a/src/nvidia/src/kernel/gpu/bif/arch/ampere/kernel_bif_ga102.c b/src/nvidia/src/kernel/gpu/bif/arch/ampere/kernel_bif_ga102.c index fee7be7640..9ebd95464b 100644 --- a/src/nvidia/src/kernel/gpu/bif/arch/ampere/kernel_bif_ga102.c +++ b/src/nvidia/src/kernel/gpu/bif/arch/ampere/kernel_bif_ga102.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -26,6 +26,8 @@ #include "gpu/bif/kernel_bif.h" #include "published/ampere/ga102/dev_nv_pcfg_xve_regmap.h" +#include "nvmisc.h" + // XVE register map for PCIe config space static const NvU32 xveRegMapValid[] = NV_PCFG_XVE_REGISTER_VALID_MAP; static const NvU32 xveRegMapWrite[] = NV_PCFG_XVE_REGISTER_WR_MAP; @@ -58,8 +60,8 @@ kbifInitXveRegMap_GA102 pKernelBif->xveRegmapRef[0].nFunc = 0; pKernelBif->xveRegmapRef[0].xveRegMapValid = xveRegMapValid; pKernelBif->xveRegmapRef[0].xveRegMapWrite = xveRegMapWrite; - pKernelBif->xveRegmapRef[0].numXveRegMapValid = sizeof(xveRegMapValid)/sizeof(xveRegMapValid[0]); - pKernelBif->xveRegmapRef[0].numXveRegMapWrite = sizeof(xveRegMapWrite)/sizeof(xveRegMapWrite[0]); + pKernelBif->xveRegmapRef[0].numXveRegMapValid = NV_ARRAY_ELEMENTS(xveRegMapValid); + pKernelBif->xveRegmapRef[0].numXveRegMapWrite = NV_ARRAY_ELEMENTS(xveRegMapWrite); pKernelBif->xveRegmapRef[0].bufBootConfigSpace = pKernelBif->cacheData.gpuBootConfigSpace; // Each MSIX table entry is 4 NvU32s controlSize = kbifGetMSIXTableVectorControlSize_HAL(pGpu, pKernelBif); diff --git a/src/nvidia/src/kernel/gpu/bif/arch/hopper/kernel_bif_gh100.c b/src/nvidia/src/kernel/gpu/bif/arch/hopper/kernel_bif_gh100.c index 0175e9086e..699c2a23a5 100644 --- a/src/nvidia/src/kernel/gpu/bif/arch/hopper/kernel_bif_gh100.c +++ b/src/nvidia/src/kernel/gpu/bif/arch/hopper/kernel_bif_gh100.c @@ -29,6 +29,7 @@ #include "gpu/fsp/kern_fsp.h" #include "platform/chipset/chipset.h" #include "ctrl/ctrl2080/ctrl2080bus.h" +#include "kernel/gpu/nvlink/kernel_nvlink.h" #include "published/hopper/gh100/dev_xtl_ep_pcfg_gpu.h" @@ -50,7 +51,6 @@ static NV_STATUS _kbifRestorePcieConfigRegisters_GH100(OBJGPU *pGpu, KernelBi // Devinit completion timeout after FLR #define BIF_FLR_DEVINIT_COMPLETION_TIMEOUT_DEFAULT 900000 - /*! * @brief Check if MSI is enabled in HW * @@ -645,10 +645,8 @@ kbifProbePcieReqAtomicCaps_GH100 ) { NvU32 osAtomicsMask = 0; - OBJSYS *pSys = SYS_GET_INSTANCE(); - OBJCL *pCl = SYS_GET_CL(pSys); - if (!pCl->getProperty(pCl, PDB_PROP_CL_BUG_3562968_WAR_ALLOW_PCIE_ATOMICS)) + if (!kbifAllowGpuOutboundPcieAtomics_HAL(pGpu, pKernelBif)) { NV_PRINTF(LEVEL_INFO, "PCIe atomics not supported in this platform!\n"); return; @@ -1561,6 +1559,61 @@ kbifRestoreBarsAndCommand_GH100 return NV_OK; } +/*! + * @brief Do any work necessary to be able to do a full chip reset. + * + * @param[in] pGpu GPU object pointer + * @param[in] pKernelBif KernelBif object pointer + * + * @return None + */ +void +kbifPrepareForFullChipReset_GH100 +( + OBJGPU *pGpu, + KernelBif *pKernelBif +) +{ + KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); + NvBool bFLRSupportedAndEnabled; + + bFLRSupportedAndEnabled = (pKernelBif->getProperty(pKernelBif, PDB_PROP_KBIF_FLR_SUPPORTED)) && + !(pKernelBif->bForceDisableFLR); + + if (!bFLRSupportedAndEnabled) + { + if (!(pKernelBif->getProperty(pKernelBif, PDB_PROP_KBIF_FLR_SUPPORTED))) + { + NV_PRINTF(LEVEL_ERROR, + "FLR is NOT supported! Failing early in fullchip reset sequence\n"); + } + else + { + NV_PRINTF(LEVEL_ERROR, + "FLR is force disabled using regkey/similar mechanism. Failing early.\n"); + } + DBG_BREAKPOINT(); + goto _bifPrepareForFullChipReset_GH100_exit; + } + + pGpu->setProperty(pGpu, PDB_PROP_GPU_PREPARING_FULLCHIP_RESET, NV_TRUE); + + if (pKernelNvlink && pKernelNvlink->getProperty(pKernelNvlink, PDB_PROP_KNVLINK_ENABLED)) + { + if (knvlinkPrepareForXVEReset(pGpu, pKernelNvlink, NV_FALSE) != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, + "NVLink prepare for fullchip reset failed.\n"); + DBG_BREAKPOINT(); + goto _bifPrepareForFullChipReset_GH100_exit; + } + } + +_bifPrepareForFullChipReset_GH100_exit: + pGpu->setProperty(pGpu, PDB_PROP_GPU_PREPARING_FULLCHIP_RESET, NV_FALSE); +} + + /*! * @brief HAL specific BIF software state initialization * @@ -1617,3 +1670,69 @@ kbifGetEccCounts_GH100 return count; } +/*! + * @brief Use Full Chip Reset to reset the chip. + * + * @param[in] pGpu GPU object pointer + * @param[in] pKernelBif KernelBif object pointer + * + * @return NV_STATUS + */ +NV_STATUS +kbifDoFullChipReset_GH100 +( + OBJGPU *pGpu, + KernelBif *pKernelBif +) +{ + NV_STATUS status = NV_OK; + NvBool bIsFLRSupportedAndEnabled; + + // We support FLR for SKUs which are FLR capable. + bIsFLRSupportedAndEnabled = (pKernelBif->getProperty(pKernelBif, PDB_PROP_KBIF_FLR_SUPPORTED)) && + !(pKernelBif->bForceDisableFLR); + + if (bIsFLRSupportedAndEnabled) + { + NV_ASSERT_OK(status = kbifDoFunctionLevelReset_HAL(pGpu, pKernelBif)); + pGpu->setProperty(pGpu, PDB_PROP_GPU_IN_FULLCHIP_RESET, NV_TRUE); + } + else + { + NV_PRINTF(LEVEL_ERROR, "FLR is either not supported or is disabled.\n"); + } + + return status; +} + + +NvBool kbifAllowGpuOutboundPcieAtomics_GH100 +( + OBJGPU *pGpu, + KernelBif *pKernelBif +) +{ + OBJSYS *pSys = SYS_GET_INSTANCE(); + OBJCL *pCl = SYS_GET_CL(pSys); + + return pCl->getProperty(pCl, PDB_PROP_CL_BUG_3562968_WAR_ALLOW_PCIE_ATOMICS); +} + +/*! + * @brief Secondary Bus Reset implementation + * + * @param[in] pGpu GPU object pointer + * @param[in] pKernelBif KernelBif object pointer + * + * @return 'NV_OK' if successful, an RM error code otherwise. + */ +NV_STATUS +kbifDoSecondaryBusHotReset_GH100 +( + OBJGPU *pGpu, + KernelBif *pKernelBif +) +{ + return kbifDoSecondaryBusHotReset_GM107(pGpu, pKernelBif); +} + diff --git a/src/nvidia/src/kernel/gpu/bif/arch/maxwell/kernel_bif_gm107.c b/src/nvidia/src/kernel/gpu/bif/arch/maxwell/kernel_bif_gm107.c index 097417ad07..8764f936b1 100644 --- a/src/nvidia/src/kernel/gpu/bif/arch/maxwell/kernel_bif_gm107.c +++ b/src/nvidia/src/kernel/gpu/bif/arch/maxwell/kernel_bif_gm107.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2013-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2013-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -25,16 +25,24 @@ /* ------------------------- System Includes -------------------------------- */ #include "gpu/gpu.h" #include "gpu/bif/kernel_bif.h" +#include "gpu/bus/kern_bus.h" #include "platform/chipset/chipset.h" #include "nvdevid.h" +#include "nvmisc.h" +#include "kernel/gpu/mc/kernel_mc.h" +#include "kernel/gpu/nvlink/kernel_nvlink.h" +#include "gpu/mem_sys/kern_mem_sys.h" #include "published/maxwell/gm107/dev_boot.h" +#include "published/maxwell/gm107/dev_nv_xp.h" #include "published/maxwell/gm107/dev_nv_xve.h" +#include "published/maxwell/gm107/dev_nv_xve_addendum.h" #include "published/maxwell/gm107/dev_nv_xve1.h" - #include "published/maxwell/gm107/dev_nv_pcfg_xve_addendum.h" #include "published/maxwell/gm107/dev_nv_pcfg_xve1_addendum.h" +#include "nvpcie.h" + // Defines for C73 chipset registers #ifndef NV_XVR_VEND_XP1 #define NV_XVR_VEND_XP1 0x00000F04 /* RW-4R */ @@ -94,14 +102,14 @@ kbifVerifyPcieConfigAccessTestRegisters_GM107 { NvU32 data; - GPU_BUS_CFG_RD32(pGpu, NV_XVE_ID, &data); + NV_ASSERT_OK_OR_RETURN(GPU_BUS_CFG_RD32(pGpu, NV_XVE_ID, &data)); if (FLD_TEST_DRF(_XVE, _ID, _VENDOR, _NVIDIA, data)) { if (data != nvXveId) return NV_ERR_NOT_SUPPORTED; - GPU_BUS_CFG_RD32(pGpu, NV_XVE_VCCAP_HDR, &data); + NV_ASSERT_OK_OR_RETURN(GPU_BUS_CFG_RD32(pGpu, NV_XVE_VCCAP_HDR, &data)); if (FLD_TEST_DRF(_XVE, _VCCAP_HDR, _ID, _VC, data) && FLD_TEST_DRF(_XVE, _VCCAP_HDR, _VER, _1, data)) @@ -264,7 +272,7 @@ kbifPcieConfigEnableRelaxedOrdering_GM107 { NvU32 xveDevCtrlStatus; - if(NV_ERR_GENERIC == GPU_BUS_CFG_RD32(pGpu, NV_XVE_DEVICE_CONTROL_STATUS, &xveDevCtrlStatus)) + if (NV_OK != GPU_BUS_CFG_RD32(pGpu, NV_XVE_DEVICE_CONTROL_STATUS, &xveDevCtrlStatus)) { NV_PRINTF(LEVEL_ERROR, "Unable to read NV_XVE_DEVICE_CONTROL_STATUS!\n"); @@ -292,7 +300,7 @@ kbifPcieConfigDisableRelaxedOrdering_GM107 { NvU32 xveDevCtrlStatus; - if(NV_ERR_GENERIC == GPU_BUS_CFG_RD32(pGpu, NV_XVE_DEVICE_CONTROL_STATUS, &xveDevCtrlStatus)) + if (NV_OK != GPU_BUS_CFG_RD32(pGpu, NV_XVE_DEVICE_CONTROL_STATUS, &xveDevCtrlStatus)) { NV_PRINTF(LEVEL_ERROR, "Unable to read NV_XVE_DEVICE_CONTROL_STATUS!\n"); @@ -456,7 +464,9 @@ _kbifRestorePcieConfigRegisters_GM107 RMTIMEOUT timeout; NvBool bGcxPmuCfgRestore; - bGcxPmuCfgRestore = pKernelBif->getProperty(pKernelBif, PDB_PROP_KBIF_GCX_PMU_CFG_SPACE_RESTORE); + { + bGcxPmuCfgRestore = pKernelBif->getProperty(pKernelBif, PDB_PROP_KBIF_GCX_PMU_CFG_SPACE_RESTORE); + } handle = osPciInitHandle(domain, bus, device, pRegmapRef->nFunc, &vendorId, &deviceId); @@ -1061,8 +1071,8 @@ kbifInitXveRegMap_GM107 pKernelBif->xveRegmapRef[0].nFunc = 0; pKernelBif->xveRegmapRef[0].xveRegMapValid = xveRegMapValid; pKernelBif->xveRegmapRef[0].xveRegMapWrite = xveRegMapWrite; - pKernelBif->xveRegmapRef[0].numXveRegMapValid = sizeof(xveRegMapValid)/sizeof(xveRegMapValid[0]); - pKernelBif->xveRegmapRef[0].numXveRegMapWrite = sizeof(xveRegMapWrite)/sizeof(xveRegMapWrite[0]); + pKernelBif->xveRegmapRef[0].numXveRegMapValid = NV_ARRAY_ELEMENTS(xveRegMapValid); + pKernelBif->xveRegmapRef[0].numXveRegMapWrite = NV_ARRAY_ELEMENTS(xveRegMapWrite); pKernelBif->xveRegmapRef[0].bufBootConfigSpace = pKernelBif->cacheData.gpuBootConfigSpace; // No MSIX for this GPU pKernelBif->xveRegmapRef[0].bufMsixTable = NULL; @@ -1072,8 +1082,8 @@ kbifInitXveRegMap_GM107 pKernelBif->xveRegmapRef[1].nFunc = 1; pKernelBif->xveRegmapRef[1].xveRegMapValid = xve1RegMapValid; pKernelBif->xveRegmapRef[1].xveRegMapWrite = xve1RegMapWrite; - pKernelBif->xveRegmapRef[1].numXveRegMapValid = sizeof(xve1RegMapValid)/sizeof(xve1RegMapValid[0]); - pKernelBif->xveRegmapRef[1].numXveRegMapWrite = sizeof(xve1RegMapWrite)/sizeof(xve1RegMapWrite[0]); + pKernelBif->xveRegmapRef[1].numXveRegMapValid = NV_ARRAY_ELEMENTS(xve1RegMapValid); + pKernelBif->xveRegmapRef[1].numXveRegMapWrite = NV_ARRAY_ELEMENTS(xve1RegMapWrite); pKernelBif->xveRegmapRef[1].bufBootConfigSpace = pKernelBif->cacheData.azaliaBootConfigSpace; // No MSIX for this func pKernelBif->xveRegmapRef[1].bufMsixTable = NULL; @@ -1231,6 +1241,109 @@ kbifRestoreBarsAndCommand_GM107 return NV_OK; } +/* +*! + * @brief Do any operations to get ready for a XVE sw reset. + * + * @param[in] pGpu GPU object pointer + * @param[in] pBif BIF object pointer + * + * @return NV_STATUS + */ +NV_STATUS +kbifPrepareForXveReset_GM107 +( + OBJGPU * pGpu, + KernelBif *pKernelBif +) +{ + NV_STATUS status; + + return status = NV_OK; +} + + +/*! + * @brief Do any work necessary to be able to do a full chip reset. + * + * This code needs to accomplish these objectives: + * + * - Perform any operations needed to make sure that the HW will not glitch or + * otherwise fail after the reset. This includes all potential WARs. + * - Perform any operations needed to make sure the devinit scripts can be + * executed properly after the reset. + * - Modify any SW state that could potentially cause errors during/after the reset. + * + * @param[in] pGpu GPU object pointer + * @param[in] pKernelBif KernelBif object pointer + * + * @return None + */ +void +kbifPrepareForFullChipReset_GM107 +( + OBJGPU *pGpu, + KernelBif *pKernelBif +) +{ + KernelBus *pKernelBus = GPU_GET_KERNEL_BUS(pGpu); + KernelMc *pKernelMc = GPU_GET_KERNEL_MC(pGpu); + KernelMemorySystem *pKernelMemorySystem = GPU_GET_KERNEL_MEMORY_SYSTEM(pGpu); + KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); + + pGpu->setProperty(pGpu, PDB_PROP_GPU_PREPARING_FULLCHIP_RESET, NV_TRUE); + + // + // This function must be called before the pmu detach since engines need to + // be powered-up before we detach the PMU, and power-up sequence requires PMU + // + if (kmcPrepareForXVEReset_HAL(pGpu, pKernelMc) != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "MC prepare for XVE reset failed.\n"); + + DBG_BREAKPOINT(); + } + + // Set FB_IFACE to disable + if (kmemsysPrepareForXVEReset_HAL(pGpu, pKernelMemorySystem) != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, + "FB_IFACE disable for fullchip reset failed.\n"); + + DBG_BREAKPOINT(); + } + + // Disable P2P on all GPUs before RESET, + if (kbusPrepareForXVEReset_HAL(pGpu, pKernelBus) != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "BUS prepare for devinit failed.\n"); + + DBG_BREAKPOINT(); + } + + // Disable any NVLinks connected to this GPU + if ((pKernelNvlink!= NULL) && pKernelNvlink->getProperty(pKernelNvlink, PDB_PROP_KNVLINK_ENABLED)) + { + if (knvlinkPrepareForXVEReset(pGpu, pKernelNvlink, NV_FALSE) != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, + "NVLINK prepare for fullchip reset failed.\n"); + + DBG_BREAKPOINT(); + } + } + + if (kbifPrepareForXveReset_HAL(pGpu, pKernelBif) != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "BIF prepare for devinit failed.\n"); + + DBG_BREAKPOINT(); + } + + pGpu->setProperty(pGpu, PDB_PROP_GPU_PREPARING_FULLCHIP_RESET, NV_FALSE); +} + + /*! * @brief HAL specific BIF software state initialization * @@ -1272,3 +1385,204 @@ kbifDestruct_GM107 +/*! + * @brief Reset the chip. + * + * Use the XVE sw reset logic to reset as much of the chip as possible. + * + * @param[in] pGpu GPU object pointer + * @param[in] pKernelBif KernelBif object pointer + * + * @return NV_STATUS + */ +NV_STATUS +kbifDoFullChipReset_GM107 +( + OBJGPU *pGpu, + KernelBif *pKernelBif +) +{ + OBJSYS *pSys = SYS_GET_INSTANCE(); + OBJCL *pCl = SYS_GET_CL(pSys); + NvU32 tempRegVal; + NvU32 oldPmc, newPmc; + NV_STATUS status; + + // First Reset PMC + // This code was added to solve a problem that we are seeing with the Microsoft new Win8 Tdr Tests + // The GPU is not hung but given more work then it can consume in 2 seconds. As a result we have some + // outstanding IO operations that will cause us issues in the future + oldPmc = GPU_REG_RD32(pGpu, NV_PMC_ENABLE); + newPmc = oldPmc; + + newPmc &= ~(DRF_DEF(_PMC, _ENABLE, _MSPPP, _ENABLE) | + DRF_DEF(_PMC, _ENABLE, _PMEDIA, _ENABLED) | + DRF_DEF(_PMC, _ENABLE, _CE0, _ENABLED) | + DRF_DEF(_PMC, _ENABLE, _CE1, _ENABLED) | + DRF_DEF(_PMC, _ENABLE, _PFIFO, _ENABLED) | + DRF_DEF(_PMC, _ENABLE, _PGRAPH, _ENABLED) | + DRF_DEF(_PMC, _ENABLE, _PWR, _ENABLED) | + DRF_DEF(_PMC, _ENABLE, _MSVLD, _ENABLED) | + DRF_DEF(_PMC, _ENABLE, _MSPDEC, _ENABLED) | + DRF_DEF(_PMC, _ENABLE, _PDISP, _ENABLED)); + + GPU_REG_WR32(pGpu, NV_PMC_ENABLE, newPmc); + GPU_REG_RD32(pGpu, NV_PMC_ENABLE); + GPU_REG_RD32(pGpu, NV_PMC_ENABLE); + + // + // Before doing SW_RESET, init NV_XP_PL_CYA_1_BLOCK_HOST2XP_HOLD_LTSSM to 1. + // else when NV_XVE_SW_RESET to 0, host will try to do rom init and will assert + // HOST2XP_HOLD_LTSSM to 0 which will cause ltssm to goto detect. + // + tempRegVal = GPU_REG_RD32(pGpu, NV_XP_PL_CYA_1(0)); + do + { + tempRegVal |= DRF_NUM(_XP, _PL_CYA_1, _BLOCK_HOST2XP_HOLD_LTSSM, 1); + GPU_REG_WR32(pGpu, NV_XP_PL_CYA_1(0), tempRegVal); + tempRegVal = GPU_REG_RD32(pGpu, NV_XP_PL_CYA_1(0)); + } while ((tempRegVal & DRF_NUM(_XP, _PL_CYA_1, _BLOCK_HOST2XP_HOLD_LTSSM, 1)) == 0); + + NV_ASSERT_OK_OR_RETURN(GPU_BUS_CFG_RD32(pGpu, NV_XVE_SW_RESET, &tempRegVal)); + tempRegVal = FLD_SET_DRF(_XVE, _SW_RESET, _RESET, _ENABLE, tempRegVal); + clPcieWriteDword(pCl, gpuGetDomain(pGpu), gpuGetBus(pGpu), + gpuGetDevice(pGpu), 0, NV_XVE_SW_RESET, tempRegVal); + + pGpu->setProperty(pGpu, PDB_PROP_GPU_IN_FULLCHIP_RESET, NV_TRUE); + + // wait a bit to make sure GPU is reset + osDelay(1); + + // + // Come out of reset. Note that when SW/full-chip reset is triggered by the + // above write to NV_XVE_SW_RESET, BAR0 priv writes do not work and thus + // this write must be a PCI config bus write. + // + tempRegVal = FLD_SET_DRF(_XVE, _SW_RESET, _RESET, _DISABLE, tempRegVal); + clPcieWriteDword(pCl, gpuGetDomain(pGpu), gpuGetBus(pGpu), + gpuGetDevice(pGpu), 0, NV_XVE_SW_RESET, tempRegVal); + + + // + // When bug 1511451 is present, SW_RESET will clear BAR3, and IO accesses + // will fail when legacy VBIOS is called. Apply the related SW WAR now. + // + status = kbifApplyWarForBug1511451_HAL(pGpu, pKernelBif); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "Failed while applying WAR for Bug 1511451\n"); + NV_ASSERT(0); + } + + return status; +} + +NV_STATUS +kbifApplyWarForBug1511451_GM107 +( + OBJGPU *pGpu, + KernelBif *pKernelBif +) +{ + NvU32 domain = gpuGetDomain(pGpu); + NvU8 bus = gpuGetBus(pGpu); + NvU8 device = gpuGetDevice(pGpu); + NvU16 vendorId; + NvU16 deviceId; + void *handle; + + // If SBR is not supported, BAR3 will have not been saved and we are at risk. + if (!pKernelBif->getProperty(pKernelBif, PDB_PROP_KBIF_SECONDARY_BUS_RESET_SUPPORTED)) + { + NV_PRINTF(LEVEL_ERROR, + "SBR not supported so saved BAR3 is not valid, skipping restore!!!\n"); + return NV_ERR_INVALID_STATE; + } + + handle = osPciInitHandle(domain, bus, device, 0, &vendorId, &deviceId); + + osPciWriteDword(handle, NV_XVE_BAR3, pKernelBif->cacheData.gpuBootConfigSpace[NV_XVE_BAR3/sizeof(NvU32)]); + + return NV_OK; +} + +/** + * + * @brief : This HAL always issues SBR + * + */ +NV_STATUS +kbifDoSecondaryBusResetOrFunctionLevelReset_GM107 +( + OBJGPU *pGpu, + KernelBif *pKernelBif +) +{ + // Since FLR is only supported for Turing and later, we simply issue SBR here + pGpu->setProperty(pGpu, PDB_PROP_GPU_IN_SECONDARY_BUS_RESET, NV_TRUE); + return kbifDoSecondaryBusHotReset_HAL(pGpu, pKernelBif); +} + + +NV_STATUS +kbifDoSecondaryBusHotReset_GM107 +( + OBJGPU *pGpu, + KernelBif *pKernelBif +) +{ + { + OBJCL *pCl = SYS_GET_CL(SYS_GET_INSTANCE()); + NBADDR *pUpstreamPort = &pGpu->gpuClData.upstreamPort.addr; + void *pUpstreamPortHandle = NULL; + NvU16 portVendorId; + NvU16 portDeviceId; + NvU16 data; + + pUpstreamPortHandle = osPciInitHandle(pUpstreamPort->domain, + pUpstreamPort->bus, + pUpstreamPort->device, + 0, + &portVendorId, + &portDeviceId); + + // + // Set secondary bus reset bit, triggering a hot reset on the port the + // GPU is plugged into. + // + data = osPciReadWord(pUpstreamPortHandle, PCI_HEADER_TYPE1_BRIDGE_CONTROL); + clPcieWriteWord(pCl, + pGpu->gpuClData.upstreamPort.addr.domain, + pGpu->gpuClData.upstreamPort.addr.bus, + pGpu->gpuClData.upstreamPort.addr.device, + pGpu->gpuClData.upstreamPort.addr.func, + PCI_HEADER_TYPE1_BRIDGE_CONTROL, + (data | 0x40)); + + // + // We must must ensure a minimum reset duration (Trst) of 1ms, as defined + // in the PCI Local Bus Specification, Revision 3.0 + // + osDelayUs(1000); + + // Clear secondary bus reset bit, bringing the port out of hot reset. + data &= 0xFFBF; + clPcieWriteWord(pCl, + pGpu->gpuClData.upstreamPort.addr.domain, + pGpu->gpuClData.upstreamPort.addr.bus, + pGpu->gpuClData.upstreamPort.addr.device, + pGpu->gpuClData.upstreamPort.addr.func, + PCI_HEADER_TYPE1_BRIDGE_CONTROL, + data); + // + // We must wait at least 100 ms from the end of the reset before it is + // permitted to issue Configuration Requests to the GPU. + // + osDelayUs(100000); + } + + return kbifWaitForConfigAccessAfterReset(pGpu, pKernelBif); +} + + + diff --git a/src/nvidia/src/kernel/gpu/bif/arch/maxwell/kernel_bif_gm200.c b/src/nvidia/src/kernel/gpu/bif/arch/maxwell/kernel_bif_gm200.c index 42bac9a8ad..bbcfdba175 100644 --- a/src/nvidia/src/kernel/gpu/bif/arch/maxwell/kernel_bif_gm200.c +++ b/src/nvidia/src/kernel/gpu/bif/arch/maxwell/kernel_bif_gm200.c @@ -31,6 +31,9 @@ #include "nvdevid.h" #include "published/maxwell/gm200/dev_boot.h" +#include "published/maxwell/gm200/dev_nv_xp.h" +#include "published/maxwell/gm200/dev_nv_xve.h" +#include "published/maxwell/gm200/dev_nv_xve_addendum.h" /*! * @brief Get the PMC bit of the valid Engines to reset. @@ -57,3 +60,98 @@ kbifGetValidEnginesToReset_GM200 DRF_DEF(_PMC, _ENABLE, _NVENC1, _ENABLED) | DRF_DEF(_PMC, _ENABLE, _SEC, _ENABLED)); } + + +/*! + * @brief Reset the chip. + * + * Use the XVE sw reset logic to reset as much of the chip as possible. + * + * @param[in] pGpu GPU object pointer + * @param[in] pKernelBif KernelBif object pointer + * + * @return NV_STATUS + */ +NV_STATUS +kbifDoFullChipReset_GM200 +( + OBJGPU *pGpu, + KernelBif *pKernelBif +) +{ + OBJSYS *pSys = SYS_GET_INSTANCE(); + OBJCL *pCl = SYS_GET_CL(pSys); + NvU32 tempRegVal; + NvU32 oldPmc, newPmc; + NV_STATUS status; + + // First Reset PMC + // This code was added to solve a problem that we are seeing with the Microsoft new Win8 Tdr Tests + // The GPU is not hung but given more work then it can consume in 2 seconds. As a result we have some + // outstanding IO operations that will cause us issues in the future + oldPmc = GPU_REG_RD32(pGpu, NV_PMC_ENABLE); + newPmc = oldPmc; + + newPmc &= ~(kbifGetValidEnginesToReset_HAL(pGpu, GPU_GET_KERNEL_BIF(pGpu))); + + GPU_REG_WR32(pGpu, NV_PMC_ENABLE, newPmc); + GPU_REG_RD32(pGpu, NV_PMC_ENABLE); + GPU_REG_RD32(pGpu, NV_PMC_ENABLE); + + // + // Before doing SW_RESET, init NV_XP_PL_CYA_1_BLOCK_HOST2XP_HOLD_LTSSM to 1. + // else when NV_XVE_SW_RESET to 0, host will try to do rom init and will assert + // HOST2XP_HOLD_LTSSM to 0 which will cause ltssm to goto detect. + // + tempRegVal = GPU_REG_RD32(pGpu, NV_XP_PL_CYA_1(0)); + do + { + tempRegVal |= DRF_NUM(_XP, _PL_CYA_1, _BLOCK_HOST2XP_HOLD_LTSSM, 1); + GPU_REG_WR32(pGpu, NV_XP_PL_CYA_1(0), tempRegVal); + tempRegVal = GPU_REG_RD32(pGpu, NV_XP_PL_CYA_1(0)); + } while ((tempRegVal & DRF_NUM(_XP, _PL_CYA_1, _BLOCK_HOST2XP_HOLD_LTSSM, 1)) == 0); + + NV_ASSERT_OK_OR_RETURN(GPU_BUS_CFG_RD32(pGpu, NV_XVE_SW_RESET, &tempRegVal)); + tempRegVal = FLD_SET_DRF(_XVE, _SW_RESET, _RESET, _ENABLE, tempRegVal); + clPcieWriteDword(pCl, gpuGetDomain(pGpu), gpuGetBus(pGpu), + gpuGetDevice(pGpu), 0, NV_XVE_SW_RESET, tempRegVal); + + pGpu->setProperty(pGpu, PDB_PROP_GPU_IN_FULLCHIP_RESET, NV_TRUE); + + // wait a bit to make sure GPU is reset + osDelay(1); + + // + // Come out of reset. Note that when SW/full-chip reset is triggered by the + // above write to NV_XVE_SW_RESET, BAR0 priv writes do not work and thus + // this write must be a PCI config bus write. + // + // Undefined bit fields ( bit 3, 31:28 ) are set after reset enable, therefore, + // only retrieve defined bit fields and set NV_XVE_SW_RESET_RESET_DISABLE to + // come out of reset. + // + NV_ASSERT_OK_OR_RETURN(GPU_BUS_CFG_RD32(pGpu, NV_XVE_SW_RESET, &tempRegVal)); + tempRegVal &= DRF_SHIFTMASK(NV_XVE_SW_RESET_RESET) | + DRF_SHIFTMASK(NV_XVE_SW_RESET_GPU_ON_SW_RESET) | + DRF_SHIFTMASK(NV_XVE_SW_RESET_COUNTER_EN) | + DRF_SHIFTMASK(NV_XVE_SW_RESET_COUNTER_VAL) | + DRF_SHIFTMASK(NV_XVE_SW_RESET_CLOCK_ON_SW_RESET) | + DRF_SHIFTMASK(NV_XVE_SW_RESET_CLOCK_COUNTER_EN) | + DRF_SHIFTMASK(NV_XVE_SW_RESET_CLOCK_COUNTER_VAL); + tempRegVal = FLD_SET_DRF(_XVE, _SW_RESET, _RESET, _DISABLE, tempRegVal); + clPcieWriteDword(pCl, gpuGetDomain(pGpu), gpuGetBus(pGpu), + gpuGetDevice(pGpu), 0, NV_XVE_SW_RESET, tempRegVal); + + // + // When bug 1511451 is present, SW_RESET will clear BAR3, and IO accesses + // will fail when legacy VBIOS is called. Apply the related SW WAR now. + // + status = kbifApplyWarForBug1511451_HAL(pGpu, pKernelBif); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "Failed while applying WAR for Bug 1511451\n"); + NV_ASSERT(0); + } + + return status; +} diff --git a/src/nvidia/src/kernel/gpu/bif/arch/pascal/kernel_bif_gp100.c b/src/nvidia/src/kernel/gpu/bif/arch/pascal/kernel_bif_gp100.c index 670aec9d55..a2a7b0e3c8 100644 --- a/src/nvidia/src/kernel/gpu/bif/arch/pascal/kernel_bif_gp100.c +++ b/src/nvidia/src/kernel/gpu/bif/arch/pascal/kernel_bif_gp100.c @@ -29,6 +29,25 @@ /* ------------------------ Public Functions -------------------------------- */ +/*! + * @brief Do any operations to get ready for a XVE sw reset. + * + * @param[in] pGpu GPU object pointer + * @param[in] pKernelBif KernelBif object pointer + * + * @return NV_OK + */ +NV_STATUS +kbifPrepareForXveReset_GP100 +( + OBJGPU *pGpu, + KernelBif *pKernelBif +) +{ + + return NV_OK; +} + /*! * @brief Get the PMC bit of the valid Engines to reset. * diff --git a/src/nvidia/src/kernel/gpu/bif/arch/pascal/kernel_bif_gp10X.c b/src/nvidia/src/kernel/gpu/bif/arch/pascal/kernel_bif_gp10X.c index 14fd88e6d7..d62dfc4c69 100644 --- a/src/nvidia/src/kernel/gpu/bif/arch/pascal/kernel_bif_gp10X.c +++ b/src/nvidia/src/kernel/gpu/bif/arch/pascal/kernel_bif_gp10X.c @@ -25,7 +25,12 @@ /* ------------------------- System Includes -------------------------------- */ #include "gpu/gpu.h" #include "gpu/bif/kernel_bif.h" +#include "platform/chipset/chipset.h" + #include "published/pascal/gp102/dev_boot.h" +#include "published/pascal/gp102/dev_nv_xp.h" +#include "published/pascal/gp102/dev_nv_xve.h" +#include "published/pascal/gp102/dev_nv_xve_addendum.h" /* ------------------------ Public Functions -------------------------------- */ @@ -54,3 +59,135 @@ kbifGetValidEnginesToReset_GP10X DRF_DEF(_PMC, _ENABLE, _NVENC1, _ENABLED) | DRF_DEF(_PMC, _ENABLE, _SEC, _ENABLED)); } + + +/*! + * @brief Reset the chip. + * + * Use Function Level Reset(FLR) to reset as much of the chip as possible. + * If FLR is not supported use the XVE sw reset logic . + * + * @param[in] pGpu GPU object pointer + * @param[in] pKernelBif KernelBif object pointer + * + * @return NV_STATUS + */ +NV_STATUS +kbifDoFullChipReset_GP10X +( + OBJGPU *pGpu, + KernelBif *pKernelBif +) +{ + OBJSYS *pSys = SYS_GET_INSTANCE(); + OBJCL *pCl = SYS_GET_CL(pSys); + NV_STATUS status = NV_OK; + NvU32 tempRegVal; + NvU32 oldPmc; + NvU32 newPmc; + NvBool bIsFLRSupportedAndEnabled; + + // + // We support FLR for SKUs which are FLR capable. + // Also check if we want to enforce legacy reset behavior by disabling FLR + // + bIsFLRSupportedAndEnabled = + pKernelBif->getProperty(pKernelBif, PDB_PROP_KBIF_FLR_SUPPORTED) && + !pKernelBif->bForceDisableFLR; + + // First Reset PMC + // This code was added to solve a problem that we are seeing with the Microsoft new Win8 Tdr Tests + // The GPU is not hung but given more work then it can consume in 2 seconds. As a result we have some + // outstanding IO operations that will cause us issues in the future + oldPmc = GPU_REG_RD32(pGpu, NV_PMC_ENABLE); + newPmc = oldPmc; + + newPmc &= ~(kbifGetValidEnginesToReset_HAL(pGpu, pKernelBif)); + + GPU_REG_WR32(pGpu, NV_PMC_ENABLE, newPmc); + GPU_REG_RD32(pGpu, NV_PMC_ENABLE); + GPU_REG_RD32(pGpu, NV_PMC_ENABLE); + + if (pCl && !pCl->getProperty(pCl, PDB_PROP_CL_PCIE_CONFIG_ACCESSIBLE) + ) + { + // + // We can not issue SW_RESET or Function Level Reset(FLR) as we are not able to access PCI + // config space. Now we have disabled engines, please re-enable them before + // tearing down RM. To be safe, do it right here. + // + GPU_REG_WR32(pGpu, NV_PMC_ENABLE, oldPmc); + } + else + { + // + // If FLR is supported, issue FLR otherwise issue SW_RESET + // There is no point in issuing SW_RESET if FLR fails because both of them reset Fn0 + // except that FLR resets XVE unit as well + // + if (bIsFLRSupportedAndEnabled) + { + NV_ASSERT_OK(status = kbifDoFunctionLevelReset_HAL(pGpu, pKernelBif)); + } + else + { + // + // NV_XP_CYA_1_BLOCK_HOST2XP_HOLD_LTSSM to be set to 1 before enabling + // NV_XVE_SW_RESET (set to 3). If not, when NV_XVE_SW_RESET change back to 0, host will + // try to do rom init and will assert HOST2XP_HOLD_LTSSM to 0 which will cause ltssm to + // goto detect which will cause all kinds of other issues. + // + do + { + GPU_FLD_IDX_WR_DRF_DEF(pGpu, _XP, _PL_CYA_1, 0, _BLOCK_HOST2XP_HOLD_LTSSM, _ENABLE); + tempRegVal = GPU_REG_RD32(pGpu, NV_XP_PL_CYA_1(0)); + } while (!FLD_TEST_DRF(_XP, _PL_CYA_1, _BLOCK_HOST2XP_HOLD_LTSSM, _ENABLE, tempRegVal)); + + NV_ASSERT_OK_OR_RETURN(GPU_BUS_CFG_RD32(pGpu, NV_XVE_SW_RESET, &tempRegVal)); + tempRegVal = FLD_SET_DRF(_XVE, _SW_RESET, _RESET, _ENABLE, tempRegVal); + clPcieWriteDword(pCl, gpuGetDomain(pGpu), gpuGetBus(pGpu), + gpuGetDevice(pGpu), 0, NV_XVE_SW_RESET, tempRegVal); + } + pGpu->setProperty(pGpu, PDB_PROP_GPU_IN_FULLCHIP_RESET, NV_TRUE); + } + + // execute rest of the sequence for SW_RESET only if we have not issued FLR above + if (!bIsFLRSupportedAndEnabled) + { + { + osDelay(4); + } + + if (pCl && !pCl->getProperty(pCl, PDB_PROP_CL_PCIE_CONFIG_ACCESSIBLE) + ) + { + // We have not enabled NV_XVE_SW_RESET. So early return. + return status; + } + else + { + // + // Come out of reset. Note that when SW/full-chip reset is triggered by the + // above write to NV_XVE_SW_RESET, BAR0 priv writes do not work and thus + // this write must be a PCI config bus write. + // + // Undefined bit fields ( bit 3, 31:28 ) are set after reset enable, therefore, + // only retrieve defined bit fields and set NV_XVE_SW_RESET_RESET_DISABLE to + // come out of reset. + // + NV_ASSERT_OK_OR_RETURN(GPU_BUS_CFG_RD32(pGpu, NV_XVE_SW_RESET, &tempRegVal)); + tempRegVal &= DRF_SHIFTMASK(NV_XVE_SW_RESET_RESET) | + DRF_SHIFTMASK(NV_XVE_SW_RESET_GPU_ON_SW_RESET) | + DRF_SHIFTMASK(NV_XVE_SW_RESET_COUNTER_EN) | + DRF_SHIFTMASK(NV_XVE_SW_RESET_COUNTER_VAL) | + DRF_SHIFTMASK(NV_XVE_SW_RESET_CLOCK_ON_SW_RESET) | + DRF_SHIFTMASK(NV_XVE_SW_RESET_CLOCK_COUNTER_EN) | + DRF_SHIFTMASK(NV_XVE_SW_RESET_CLOCK_COUNTER_VAL); + tempRegVal = FLD_SET_DRF(_XVE, _SW_RESET, _RESET, _DISABLE, tempRegVal); + clPcieWriteDword(pCl, gpuGetDomain(pGpu), gpuGetBus(pGpu), + gpuGetDevice(pGpu), 0, NV_XVE_SW_RESET, tempRegVal); + } + } // if (!bIsFLRSupportedAndEnabled) + + return status; +} diff --git a/src/nvidia/src/kernel/gpu/bif/arch/turing/kernel_bif_tu102.c b/src/nvidia/src/kernel/gpu/bif/arch/turing/kernel_bif_tu102.c index 7faa4edc31..7f41e93559 100644 --- a/src/nvidia/src/kernel/gpu/bif/arch/turing/kernel_bif_tu102.c +++ b/src/nvidia/src/kernel/gpu/bif/arch/turing/kernel_bif_tu102.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2017-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -24,10 +24,13 @@ /* ------------------------- System Includes -------------------------------- */ #include "gpu/bif/kernel_bif.h" +#include "kernel/gpu/mc/kernel_mc.h" #include "gpu/bus/kern_bus.h" #include "gpu/gpu.h" #include "platform/chipset/chipset.h" +#include "nvmisc.h" + #include "virtualization/kernel_vgpu_mgr.h" #include "virtualization/hypervisor/hypervisor.h" @@ -143,7 +146,7 @@ kbifGetVFSparseMmapRegions_TU102 offsetStart = NV_VIRTUAL_FUNCTION_PRIV_MMU_FAULT_BUFFER_LO(0) + osPageSize; } - // Trap MSI-X table page + // Trap MSI-X table page for non-Hyperv and Hyperv non-GSP cases if (!hypervisorIsType(OS_HYPERVISOR_HYPERV)) { @@ -239,12 +242,14 @@ kbifCacheVFInfo_TU102 NvU32 saveHi = 0; // Get total VF count - GPU_BUS_CFG_RD32(pGpu, NV_XVE_SRIOV_CAP_HDR3, ®Val); + status = GPU_BUS_CFG_RD32(pGpu, NV_XVE_SRIOV_CAP_HDR3, ®Val); + NV_ASSERT(status == NV_OK); pGpu->sriovState.totalVFs = GPU_DRF_VAL(_XVE, _SRIOV_CAP_HDR3, _TOTAL_VFS, regVal); // Get first VF offset - GPU_BUS_CFG_RD32(pGpu, NV_XVE_SRIOV_CAP_HDR5, ®Val); + status = GPU_BUS_CFG_RD32(pGpu, NV_XVE_SRIOV_CAP_HDR5, ®Val); + NV_ASSERT(status == NV_OK); pGpu->sriovState.firstVFOffset = GPU_DRF_VAL(_XVE, _SRIOV_CAP_HDR5, _FIRST_VF_OFFSET, regVal); @@ -379,8 +384,8 @@ kbifInitXveRegMap_TU102 pKernelBif->xveRegmapRef[0].nFunc = 0; pKernelBif->xveRegmapRef[0].xveRegMapValid = xveRegMapValid; pKernelBif->xveRegmapRef[0].xveRegMapWrite = xveRegMapWrite; - pKernelBif->xveRegmapRef[0].numXveRegMapValid = sizeof(xveRegMapValid)/sizeof(xveRegMapValid[0]); - pKernelBif->xveRegmapRef[0].numXveRegMapWrite = sizeof(xveRegMapWrite)/sizeof(xveRegMapWrite[0]); + pKernelBif->xveRegmapRef[0].numXveRegMapValid = NV_ARRAY_ELEMENTS(xveRegMapValid); + pKernelBif->xveRegmapRef[0].numXveRegMapWrite = NV_ARRAY_ELEMENTS(xveRegMapWrite); pKernelBif->xveRegmapRef[0].bufBootConfigSpace = pKernelBif->cacheData.gpuBootConfigSpace; // MSIX table buf not used in Turing, but it could be pKernelBif->xveRegmapRef[0].bufMsixTable = NULL; @@ -542,17 +547,14 @@ kbifDoFunctionLevelReset_TU102 NvU32 domain = gpuGetDomain(pGpu); NvU8 bus = gpuGetBus(pGpu); NvU8 device = gpuGetDevice(pGpu); - void *handle = NULL; + void *handle = NULL; NV_STATUS status = NV_OK; - NvU32 i; NvU32 tempRegVal; NvU16 vendorId; NvU16 deviceId; // 'i'th bit set to 1 indicates NV_MSIX_TABLE_VECTOR_CONTROL(i) is masked NvU32 msixVectorMask; NvBool bMSIXEnabled; - // volatile is required to prevent any compiler optimizations - volatile NvU32 tempRegValSwReset; // // From the experimental data: We need to get the handle before asserting FLR @@ -590,7 +592,7 @@ kbifDoFunctionLevelReset_TU102 // Clear Bus Master Enable bit in command register so that no more requests to sysmem are made by Fn0 // Executing these WARs after save config space so that restore config space does not restore- // incorrect command register - // For other WARs which are executed in bifPrepareForFullChipReset_HAL, gpu re-init sequence after FLR makes + // For other WARs which are executed in kbifPrepareForFullChipReset_HAL, gpu re-init sequence after FLR makes // sure to revert these WARs // if (kbifStopSysMemRequests_HAL(pGpu, pKernelBif, NV_TRUE) != NV_OK) @@ -612,26 +614,6 @@ kbifDoFunctionLevelReset_TU102 pKernelBif->bInFunctionLevelReset = NV_TRUE; - // wait a bit to make sure reset is propagated properly - if (IS_RTLSIM(pGpu)) - { - // - // On RTL sims the OS delay functions don't scale well. - // Instead we use reg reads as approximate delays - // - NV_PRINTF(LEVEL_ERROR, - "Do config reads of NV_XVE_SW_RESET to add delay\n"); - // Set 1ms/1000us delay - this would be acceptable delay for RTL sim - for( i = 0; i < (1000 * RTLSIM_DELAY_SCALE_US) ; i++) - { - // Only config reads and that too of sticky registers are supposed to work while Fn0 is under reset - tempRegValSwReset = osPciReadDword(handle, NV_XVE_SW_RESET); - } - // Printing tempRegValSwReset in order to use it and suppress compiler warnings(of variable set but not used) - NV_PRINTF(LEVEL_ERROR, "NV_XVE_SW_RESET read returned %x\n", - tempRegValSwReset); - } - else { // Wait for 100 ms before attempting to read PCI config space osDelayUs(100000); @@ -653,7 +635,15 @@ kbifDoFunctionLevelReset_TU102 { NV_PRINTF(LEVEL_ERROR, "Entering secure boot completion wait.\n"); } - status = NV_ERR_NOT_SUPPORTED; + + if (IS_GSP_CLIENT(pGpu)) + { + status = gpuWaitForGfwBootComplete_HAL(pGpu); + } + else + { + status = NV_ERR_NOT_SUPPORTED; + } if (status != NV_OK) { DBG_BREAKPOINT(); @@ -679,6 +669,15 @@ kbifDoFunctionLevelReset_TU102 } } + // + // After FLR 'outstanding downstream read counter' does not reflect the + // correct value until cleared. We clear this counter without checking if + // FLR succeeded or not. This is considering that we will attempt SBR after + // FLR fails and if we don't clear this counter here, it will not reflect + // the correct value after SBR (SBR does not clear it). + // + kbifClearDownstreamReadCounter_HAL(pGpu, pKernelBif); + // Re-init handle as well since gpu is reset handle = osPciInitHandle(domain, bus, device, 0, &vendorId, &deviceId); tempRegVal = osPciReadDword(handle, NV_XVE_ID); @@ -728,4 +727,81 @@ kbifGetValidEnginesToReset_TU102 DRF_DEF(_PMC, _ENABLE, _SEC, _ENABLED) | DRF_DEF(_PMC, _ENABLE, _PERFMON, _ENABLED) | DRF_DEF(_PMC, _ENABLE, _NVJPG0, _ENABLED)); +} + + +/** + * + * Execute SBR if FLR is not supported, else do pre-FLR sequence followed by FLR + * + */ +NV_STATUS +kbifDoSecondaryBusResetOrFunctionLevelReset_TU102 +( + OBJGPU *pGpu, + KernelBif *pKernelBif +) +{ + KernelMc *pKernelMc = GPU_GET_KERNEL_MC(pGpu); + NV_STATUS rmStatus = NV_OK; + NvU32 engineMask; + NvBool bIsFLRSupportedAndEnabled; + + // Issue FLR if capable and not force disabled + bIsFLRSupportedAndEnabled = (pKernelBif->getProperty(pKernelBif, PDB_PROP_KBIF_FLR_SUPPORTED)) && + !(pKernelBif->bForceDisableFLR); + + if (!bIsFLRSupportedAndEnabled) + { + // Issue SBR + pGpu->setProperty(pGpu, PDB_PROP_GPU_IN_SECONDARY_BUS_RESET, NV_TRUE); + rmStatus = kbifDoSecondaryBusHotReset_HAL(pGpu, pKernelBif); + } + else + { + // + // Execute any workarounds or changes needed to make sure we can reset + // properly. + // + kbifPrepareForFullChipReset_HAL(pGpu, pKernelBif); + + // + // First Reset engines in NV_PMC_ENABLE + // This code was added to solve a problem that we are seeing with the Microsoft new Win8 Tdr Tests + // The GPU is not hung but given more work then it can consume in 2 seconds. As a result we have some + // outstanding IO operations that will cause us issues in the future + // + engineMask = kbifGetValidEnginesToReset_HAL(pGpu, pKernelBif); + NV_ASSERT(kmcWritePmcEnableReg_HAL(pGpu, pKernelMc, engineMask, NV_FALSE, NV_FALSE) == NV_OK); + + // + // Reset engines in NV_PMC_DEVICE_ENABLE. For Ampere and later chips, + // host engines has moved from NV_PMC_ENABLE to NV_PMC_DEVICE_ENABLE, + // hence we need to ensure that engines in the NV_PMC_DEVICE_ENABLE are + // reset too. + // + engineMask = kbifGetValidDeviceEnginesToReset_HAL(pGpu, pKernelBif); + if (engineMask) + { + NV_ASSERT_OK(kmcWritePmcEnableReg_HAL(pGpu, pKernelMc, engineMask, NV_FALSE, + gpuIsUsePmcDeviceEnableForHostEngineEnabled(pGpu))); + } + + // Issue FLR + rmStatus = kbifDoFunctionLevelReset_HAL(pGpu, pKernelBif); + + // If FLR did not work, fall back to SBR + if (NV_OK != rmStatus) + { + pGpu->setProperty(pGpu, PDB_PROP_GPU_IN_SECONDARY_BUS_RESET, NV_TRUE); + rmStatus = kbifDoSecondaryBusHotReset_HAL(pGpu, pKernelBif); + } + else + { + // RM init code is dependent on this flag. If FLR or SW_RESET is used for reset, we set this flag + pGpu->setProperty(pGpu, PDB_PROP_GPU_IN_FULLCHIP_RESET, NV_TRUE); + } + } + + return rmStatus; } \ No newline at end of file diff --git a/src/nvidia/src/kernel/gpu/bif/kernel_bif.c b/src/nvidia/src/kernel/gpu/bif/kernel_bif.c index 39cc8812da..fae77ef139 100644 --- a/src/nvidia/src/kernel/gpu/bif/kernel_bif.c +++ b/src/nvidia/src/kernel/gpu/bif/kernel_bif.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2013-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2013-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -1351,3 +1351,101 @@ kbifPollDeviceOnBus_IMPL return NV_OK; } +NV_STATUS +kbifResetFromTimeoutFullChip_IMPL +( + OBJGPU *pGpu, + KernelBif *pKernelBif +) +{ + + OBJSYS *pSys = SYS_GET_INSTANCE(); + OBJCL *pCl = SYS_GET_CL(pSys); + NV_STATUS status; + + if (pCl == NULL || + (!pCl->getProperty(pCl, PDB_PROP_CL_PCIE_CONFIG_ACCESSIBLE) + )) + { + // + // We can not issue SW_RESET as we are not able to access PCI config + // space. + return NV_ERR_NOT_SUPPORTED; + } + + // + // Execute any workarounds or changes needed to make sure we can reset + // properly. + // + kbifPrepareForFullChipReset_HAL(pGpu, pKernelBif); + + // Reset the gpu. + NV_ASSERT_OK(status = kbifDoFullChipReset_HAL(pGpu, pKernelBif)); + + // + // This 100ms wait is only required for legacy FLR where RM itself + // triggers FLR and it also does save/restore of config space. + // For hopper and later, HW will keep sending CRS status to OS + // until FWSEC boot sequence is not complete + // + if (!(pKernelBif->getProperty(pKernelBif, PDB_PROP_KBIF_FLR_HANDLED_BY_OS))) + { + // Wait 100ms after GPU is reset to ensure Pre-OS completion. + osDelay(100); + } + + return status; +} + +NV_STATUS +kbifWaitForConfigAccessAfterReset_IMPL +( + OBJGPU *pGpu, + KernelBif *pKernelBif +) +{ + + + NvU32 domain = gpuGetDomain(pGpu); + NvU8 bus = gpuGetBus(pGpu); + NvU8 device = gpuGetDevice(pGpu); + + NvU32 waitCount = 20; // iterations of the osDelayUs statements + while (NV_TRUE) + { + NvU16 vendorId; + NvU16 deviceId; + void *pGpuHandle = osPciInitHandle(domain, + bus, + device, + 0 /* Function */, + &vendorId, + &deviceId); + + NvU32 id = osPciReadDword(pGpuHandle, 0 /* Offset */); + if (id == pGpu->idInfo.PCIDeviceID) + { + // Found it. Config space is accessible. Break out. + return NV_OK; + } + + if (waitCount == 0) + { + break; + } + waitCount--; + + // + // Keep trying for at least 1 second. Note that completion timeouts + // here can extend the amount of time we are in this loop. But they are + // not fatal. + // + { + // Wait 50ms + osDelayUs(50000); + } + } + + return NV_ERR_GENERIC; +} + diff --git a/src/nvidia/src/kernel/gpu/bif/kernel_bif_vgpu.c b/src/nvidia/src/kernel/gpu/bif/kernel_bif_vgpu.c index d828baefe7..aaa5ecf786 100644 --- a/src/nvidia/src/kernel/gpu/bif/kernel_bif_vgpu.c +++ b/src/nvidia/src/kernel/gpu/bif/kernel_bif_vgpu.c @@ -34,7 +34,7 @@ * @param[in] pKernelBif Kernel BIF object pointer */ void -kbifInitDmaCaps_VGPUSTUB +kbifInitDmaCaps_VF ( OBJGPU *pGpu, KernelBif *pKernelBif @@ -60,7 +60,7 @@ kbifInitDmaCaps_VGPUSTUB * @return NV_OK */ NV_STATUS -subdeviceCtrlCmdBifGetStaticInfo_VGPUSTUB +subdeviceCtrlCmdBifGetStaticInfo_VF ( Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BIF_GET_STATIC_INFO_PARAMS *pParams diff --git a/src/nvidia/src/kernel/gpu/bus/arch/ampere/kern_bus_ga100.c b/src/nvidia/src/kernel/gpu/bus/arch/ampere/kern_bus_ga100.c index 6b168270da..46abdced22 100644 --- a/src/nvidia/src/kernel/gpu/bus/arch/ampere/kern_bus_ga100.c +++ b/src/nvidia/src/kernel/gpu/bus/arch/ampere/kern_bus_ga100.c @@ -1264,12 +1264,17 @@ kbusGetNvSwitchPeerId_GA100 NvU32 peerId = BUS_INVALID_PEER; NvU32 i; + if (IS_VIRTUAL(pGpu) && GPU_IS_NVSWITCH_DETECTED(pGpu)) + goto nvswitch_detected; + if (pKernelNvlink == NULL) return BUS_INVALID_PEER; if (!knvlinkIsGpuConnectedToNvswitch(pGpu, pKernelNvlink)) return BUS_INVALID_PEER; +nvswitch_detected: + for (i = 0; i < NV_MAX_DEVICES; i++) { peerId = pKernelBus->p2p.busNvlinkPeerNumberMask[i]; diff --git a/src/nvidia/src/kernel/gpu/bus/arch/hopper/kern_bus_gh100.c b/src/nvidia/src/kernel/gpu/bus/arch/hopper/kern_bus_gh100.c index dcac5b9ecf..b47f1d3c02 100644 --- a/src/nvidia/src/kernel/gpu/bus/arch/hopper/kern_bus_gh100.c +++ b/src/nvidia/src/kernel/gpu/bus/arch/hopper/kern_bus_gh100.c @@ -59,7 +59,8 @@ HOPPER_WRITE_MAILBOX_SIZE) // RM reserved memory region is mapped separately as it is not added to the kernel -#define COHERENT_CPU_MAPPING_RM_RESV_REGION COHERENT_CPU_MAPPING_REGION_1 +#define COHERENT_CPU_MAPPING_RM_RESV_REGION COHERENT_CPU_MAPPING_REGION_1 +#define COHERENT_CPU_MAPPING_RM_KERNEL_ONLINED_REGION COHERENT_CPU_MAPPING_REGION_0 /*! * @brief Tear Down BAR1 Mailbox @@ -1106,6 +1107,129 @@ kbusVerifyCoherentLink_GH100 } +/** + * Determine if memory described in memdesc is within a specific fb region + * + * @param[in] pKernelBus Kernel bus pointer + * @param[in] pMemDesc Pointer to memdesc describing memory range + * @param[in] offset Offset from base address to check + * @param[in] region Fb region to test against + * + * @return Whether or not described memory range is within fb region. + */ +static NvBool +_kbusMemoryIsInFbRegion +( + KernelBus *pKernelBus, + MEMORY_DESCRIPTOR *pMemDesc, + NvU64 offset, + NvU8 region +) +{ + RmPhysAddr startAddr = memdescGetPhysAddr(pMemDesc, FORCE_VMMU_TRANSLATION(pMemDesc, AT_GPU), offset); + RmPhysAddr rangeStart; + RmPhysAddr rangeEnd; + + NV_ASSERT_OR_RETURN(region < pKernelBus->coherentCpuMapping.nrMapping, NV_FALSE); + + rangeStart = pKernelBus->coherentCpuMapping.physAddr[region]; + rangeEnd = pKernelBus->coherentCpuMapping.physAddr[region] + + pKernelBus->coherentCpuMapping.size[region] - 1; + + return (rangeStart <= startAddr) && (startAddr <= rangeEnd); +} + +/** + * Helper function to map coherent cpu mapping. + * + * @param[in] pGpu Pointer to GPU + * @param[in] pKernelBus Kernel bus pointer + * @param[in] pMemDesc Pointer to memdesc that is to be mapped + * @param[in] offset Offset from base address given in memdesc + * @param[in] length Length of memory to map + * @param[in] protect Protection flags + * @param[out] ppAddress Virtual address of mapping + * @param[out] ppPriv Private data to be retained for unmapping + * + * @return NV_OK or errors if failed to map + */ +NV_STATUS +kbusMapCoherentCpuMapping_GH100 +( + OBJGPU *pGpu, + KernelBus *pKernelBus, + MEMORY_DESCRIPTOR *pMemDesc, + NvU64 offset, + NvU64 length, + NvU32 protect, + NvP64 *ppAddress, + NvP64 *ppPriv +) +{ + const NvU8 regionIndex = COHERENT_CPU_MAPPING_RM_RESV_REGION; + RmPhysAddr regionOffset = 0; + RmPhysAddr startAddr = memdescGetPhysAddr(pMemDesc, FORCE_VMMU_TRANSLATION(pMemDesc, AT_GPU), offset); + + if (_kbusMemoryIsInFbRegion(pKernelBus, pMemDesc, offset, COHERENT_CPU_MAPPING_RM_KERNEL_ONLINED_REGION)) + { + return osMapSystemMemory(pMemDesc, offset, length, NV_TRUE, protect, ppAddress, ppPriv); + } + + NV_ASSERT_OR_RETURN(memdescGetContiguity(pMemDesc, AT_CPU), NV_ERR_NOT_SUPPORTED); + NV_ASSERT_OR_RETURN(pKernelBus->coherentCpuMapping.pCpuMapping[regionIndex] != NvP64_NULL, NV_ERR_NO_MEMORY); + + // Get the offset of the region + regionOffset = startAddr - pKernelBus->coherentCpuMapping.physAddr[regionIndex]; + pKernelBus->coherentCpuMapping.refcnt[regionIndex]++; + + *ppAddress = (NvU8 *)NvP64_VALUE(((NvUPtr)pKernelBus->coherentCpuMapping.pCpuMapping[regionIndex] + + (NvUPtr)regionOffset)); + + return NV_OK; +} + +/** + * Helper function to unmap coherent cpu mapping + * + * @param[in] pGpu Pointer to GPU + * @param[in] pKernelBus Kernel bus pointer + * @param[in] pMemDesc Pointer to memdesc + * @param[in] pAddress Virtual address to unmap + * @param[in] pPriv Private data to be passed for unmapping + * + * @return void + */ +void +kbusUnmapCoherentCpuMapping_GH100 +( + OBJGPU *pGpu, + KernelBus *pKernelBus, + PMEMORY_DESCRIPTOR pMemDesc, + NvP64 pAddress, + NvP64 pPriv +) +{ + NvU8 regionIndex = COHERENT_CPU_MAPPING_RM_RESV_REGION; + + if (_kbusMemoryIsInFbRegion(pKernelBus, pMemDesc, 0, COHERENT_CPU_MAPPING_RM_KERNEL_ONLINED_REGION)) + { + kbusFlush_HAL(pGpu, GPU_GET_KERNEL_BUS(pGpu), BUS_FLUSH_VIDEO_MEMORY); + osUnmapSystemMemory(pMemDesc, NV_TRUE, 0, pAddress, pPriv); + kbusFlush_HAL(pGpu, GPU_GET_KERNEL_BUS(pGpu), BUS_FLUSH_VIDEO_MEMORY); + return; + } + + NV_ASSERT_OR_RETURN_VOID(memdescGetContiguity(pMemDesc, AT_CPU)); + NV_ASSERT_OR_RETURN_VOID(pKernelBus->coherentCpuMapping.refcnt[regionIndex] != 0); + + pKernelBus->coherentCpuMapping.refcnt[regionIndex]--; + + // Flush the memory since caller writes to the FB + kbusFlush_HAL(pGpu, GPU_GET_KERNEL_BUS(pGpu), BUS_FLUSH_VIDEO_MEMORY); + + return; +} + /** * @brief Check BAR1 P2P capability * @@ -2501,17 +2625,6 @@ kbusGetEgmPeerId_GH100 return BUS_INVALID_PEER; } - // - // For Nvswitch connected systems, AAS (Alternate Address Space) is set by Nvswitch itself - // based on the EGM fabric address range and so there is no need for a separate peer id - // in the Nvswitch case. - // - if (GPU_IS_NVSWITCH_DETECTED(pLocalGpu)) - { - LOWESTBITIDX_32(peerMask); - return peerMask; - } - FOR_EACH_INDEX_IN_MASK(32, peerId, peerMask) { if (pLocalKernelBus->p2p.bEgmPeer[peerId]) diff --git a/src/nvidia/src/kernel/gpu/bus/arch/maxwell/kern_bus_gm107.c b/src/nvidia/src/kernel/gpu/bus/arch/maxwell/kern_bus_gm107.c index 7565bf411b..f6e5a4561d 100644 --- a/src/nvidia/src/kernel/gpu/bus/arch/maxwell/kern_bus_gm107.c +++ b/src/nvidia/src/kernel/gpu/bus/arch/maxwell/kern_bus_gm107.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2004-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2004-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -1605,7 +1605,7 @@ kbusSetupBar2GpuVaSpace_GM107 NV_ASSERT_OR_RETURN(status == NV_OK, status); } - memdescTagAlloc(status, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_63, + memdescTagAlloc(status, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_63, pKernelBus->bar2[gfid].pInstBlkMemDesc); NV_ASSERT_OR_RETURN(status == NV_OK, status); @@ -1687,7 +1687,7 @@ kbusSetupBar2GpuVaSpace_GM107 if (IS_GFID_VF(gfid)) { - memdescTagAlloc(status, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_64, + memdescTagAlloc(status, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_64, pPageLevelsMemDesc); NV_ASSERT_OR_GOTO(status == NV_OK, cleanup); @@ -2347,16 +2347,27 @@ _kbusWalkCBMapNextEntries_RmAperture { // Use BAR0 or nvlink if available NvU64 entryStart = memdescGetPhysAddr(pMemDesc, FORCE_VMMU_TRANSLATION(pMemDesc, AT_GPU), entryOffset); - NvU8 *pMapping = NULL; if (KBUS_BAR0_PRAMIN_DISABLED(pGpu)) { - pMapping = kbusMapCoherentCpuMapping_HAL(pGpu, pKernelBus, pMemDesc); + NvU8 *pMapping = NULL; + NvP64 pPriv = NULL; + + status = kbusMapCoherentCpuMapping_HAL(pGpu, + pKernelBus, + pMemDesc, + entryOffset, + pLevelFmt->entrySize, + NV_PROTECT_READ_WRITE, + (NvP64 *)&pMapping, + &pPriv); + + NV_ASSERT_OR_RETURN_VOID(status == NV_OK); NV_ASSERT_OR_RETURN_VOID(pMapping != NULL); - portMemCopy(pMapping + entryStart, + portMemCopy(pMapping, pLevelFmt->entrySize, entryValue.v8, pLevelFmt->entrySize); - kbusUnmapCoherentCpuMapping_HAL(pGpu, pKernelBus, pMemDesc); + kbusUnmapCoherentCpuMapping_HAL(pGpu, pKernelBus, pMemDesc, pMapping, pPriv); } else { @@ -3749,7 +3760,7 @@ kbusVerifyBar2_GM107 { memdescCreateExisting(&memDesc, pGpu, size, ADDR_FBMEM, NV_MEMORY_UNCACHED, MEMDESC_FLAGS_NONE); } - memdescTagAlloc(status, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_65, + memdescTagAlloc(status, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_65, (&memDesc)); if (status != NV_OK) { @@ -4805,7 +4816,7 @@ kbusBar1InstBlkVasUpdate_GM107 NV_ASSERT_OR_RETURN(status == NV_OK, status); } - memdescTagAlloc(status, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_66, + memdescTagAlloc(status, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_66, pKernelBus->bar1[gfid].pInstBlkMemDesc); NV_ASSERT_OR_RETURN(status == NV_OK, status); @@ -5814,18 +5825,18 @@ kbusMemoryCopy_GM107 { if (memdescGetAddressSpace(pSrcMemDesc) == ADDR_FBMEM) { - source += offset; - bar0Offset = (source & 0xffff); + NvU64 sourcePA = source + offset; + bar0Offset = (sourcePA & 0xffff); kbusSetBAR0WindowVidOffset_HAL(pGpu, pKernelBus, - (source & ~0xffff)); + (sourcePA & ~0xffff)); } if (memdescGetAddressSpace(pDstMemDesc) == ADDR_FBMEM) { - dest += offset; - bar0Offset = (dest & 0xffff); + NvU64 destPA = dest + offset; + bar0Offset = (destPA & 0xffff); kbusSetBAR0WindowVidOffset_HAL(pGpu, pKernelBus, - (dest & ~0xffff)); + (destPA & ~0xffff)); } bytes = NV_MIN(size, (0x10000 - bar0Offset)); @@ -5870,6 +5881,107 @@ kbusMemoryCopy_GM107 return NV_OK; } +/*! + * Performs a physically addressed memory copy between system memory and video + * memory via BAR0 window + * + * Regions must be contiguous chunks. + * + * @param[in] pGpu OBJGPU pointer + * @param[in] pKernelBus KernelBus pointer + * @param[in] pDstMemDesc Destination memory descriptor + * @param[in] dstOffset Offset into destination + * @param[in] pSrc Source VA + * @param[in] size Number of bytes to copy + * + * @returns None + */ +NV_STATUS +kbusMemoryCopyFromPtr_GM107 +( + OBJGPU *pGpu, + KernelBus *pKernelBus, + MEMORY_DESCRIPTOR *pDstMemDesc, + NvU64 dstOffset, + NvU8 *pSrcMem, + NvU64 size +) +{ + NV_STATUS status = NV_OK; + NvU8 *pDstMem = NULL; + void *pDstPriv = NULL; + NvU64 bytes; + NvU64 offset = 0; + NvU64 bar0Window; + NvU64 bar0Offset = 0; + NvU32 data; + NvU32 i; + NvU64 dest; + + dest = memdescGetPhysAddr(pDstMemDesc, FORCE_VMMU_TRANSLATION(pDstMemDesc, AT_GPU), dstOffset); + + if (memdescGetAddressSpace(pDstMemDesc) == ADDR_SYSMEM) + { + status = memdescMapOld(pDstMemDesc, dstOffset, size, NV_TRUE /* kernel */, + NV_PROTECT_READ_WRITE, + (void **)&pDstMem, &pDstPriv); + if (status != NV_OK) + { + DBG_BREAKPOINT(); + return status; + } + } + + if (memdescGetAddressSpace(pDstMemDesc) == ADDR_SYSMEM) + { + portMemCopy(pDstMem, (NvU32)size, pSrcMem, (NvU32)size); + } + else + { + bar0Window = kbusGetBAR0WindowVidOffset_HAL(pGpu, pKernelBus); + + while (size != 0) + { + if (memdescGetAddressSpace(pDstMemDesc) == ADDR_FBMEM) + { + NvU64 destPA = dest + offset; + bar0Offset = (destPA & 0xffff); + kbusSetBAR0WindowVidOffset_HAL(pGpu, pKernelBus, + (destPA & ~0xffff)); + } + + bytes = NV_MIN(size, (0x10000 - bar0Offset)); + + for (i = 0; i < bytes; i += 4) + { + data = MEM_RD32(pSrcMem + offset + i); + + if (memdescGetAddressSpace(pDstMemDesc) == ADDR_SYSMEM) + { + MEM_WR32((pDstMem + offset + i), data); + } + else + { + GPU_REG_WR32(pGpu, + (DRF_BASE(NV_PRAMIN) + (NvU32)bar0Offset + i), + data); + } + } + + offset += bytes; + size -= bytes; + } + + kbusSetBAR0WindowVidOffset_HAL(pGpu, pKernelBus, bar0Window); + kbusFlush_HAL(pGpu, pKernelBus, 0); + } + + if (pDstMem != NULL) + memdescUnmapOld(pDstMemDesc, 1 /* kernel */, 0, pDstMem, pDstPriv); + + return NV_OK; +} + /*! * @brief Disable P2P operations to get ready for a XVE sw reset. * diff --git a/src/nvidia/src/kernel/gpu/bus/arch/pascal/kern_bus_gp100.c b/src/nvidia/src/kernel/gpu/bus/arch/pascal/kern_bus_gp100.c index d9a0406857..e28ab08da5 100644 --- a/src/nvidia/src/kernel/gpu/bus/arch/pascal/kern_bus_gp100.c +++ b/src/nvidia/src/kernel/gpu/bus/arch/pascal/kern_bus_gp100.c @@ -270,11 +270,11 @@ kbusCreateP2PMappingForNvlink_GP100 NV_PRINTF(LEVEL_INFO, "- P2P: Using Default RM mapping for P2P.\n"); } + if (bEgmPeer) + { + NV_PRINTF(LEVEL_INFO, "EGM peer\n"); + } - if (bEgmPeer) - { - NV_PRINTF(LEVEL_INFO, "EGM peer\n"); - } // // Does the mapping already exist between the given pair of GPUs using the peerIDs // *peer0 and *peer1 respectively ? @@ -482,6 +482,7 @@ _kbusRemoveNvlinkPeerMapping // P2P between all the peers is destroyed. // busNvlinkMappingRefcountPerGpu == 0 check is done in this case to remove // the peer id from busNvlinkPeerNumberMask[peerGpuInst] + // // Two peer ids are used to reach the same GPU, one for HBM and one for // EGM. In that case busNvlinkMappingRefcountPerGpu isn't going to // reach 0 until both the peer ids are removed. In this case, diff --git a/src/nvidia/src/kernel/gpu/bus/arch/volta/kern_bus_gv100.c b/src/nvidia/src/kernel/gpu/bus/arch/volta/kern_bus_gv100.c index 682ccc0a78..71c4746c87 100644 --- a/src/nvidia/src/kernel/gpu/bus/arch/volta/kern_bus_gv100.c +++ b/src/nvidia/src/kernel/gpu/bus/arch/volta/kern_bus_gv100.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -127,52 +127,64 @@ kbusDestroyCpuPointerForBusFlush_GV100 /** * Helper function to map coherent cpu mapping. * - * @param[in] pGpu Pointer to GPU - * @param[in] pKernelBus Kernel bus pointer - * @param[in] pMemDesc Pointer to memdesc that is to be mapped. + * @param[in] pGpu Pointer to GPU + * @param[in] pKernelBus Kernel bus pointer + * @param[in] pMemDesc Pointer to memdesc that is to be mapped. + * @param[in] offset Offset from base address given in memdesc + * @param[in] length Length of memory to map + * @param[in] protect Protection flags + * @param[out] ppAddress Virtual address of mapping + * @param[out] ppPriv Private data to be retained for unmapping * - * @return cpu pointer if success - * NULL on other errors + * @return NV_OK or errors if failed to map */ -NvU8* +NV_STATUS kbusMapCoherentCpuMapping_GV100 ( OBJGPU *pGpu, KernelBus *pKernelBus, - PMEMORY_DESCRIPTOR pMemDesc + MEMORY_DESCRIPTOR *pMemDesc, + NvU64 offset, + NvU64 length, + NvU32 protect, + NvP64 *ppAddress, + NvP64 *ppPriv ) { - RmPhysAddr startAddr = memdescGetPhysAddr(pMemDesc, FORCE_VMMU_TRANSLATION(pMemDesc, AT_GPU), 0); + RmPhysAddr startAddr = memdescGetPhysAddr(pMemDesc, FORCE_VMMU_TRANSLATION(pMemDesc, AT_GPU), offset); NvU64 size = memdescGetSize(pMemDesc); RmPhysAddr endAddr = startAddr + size - 1; RmPhysAddr rangeStart = 0; RmPhysAddr rangeEnd = 0; - RmPhysAddr offset = 0; + RmPhysAddr regionOffset = 0; NvU32 i = 0; + NV_ASSERT_OR_RETURN(memdescGetContiguity(pMemDesc, AT_GPU), NV_ERR_NOT_SUPPORTED); + for (i = COHERENT_CPU_MAPPING_REGION_0; i < pKernelBus->coherentCpuMapping.nrMapping; ++i) { // Check if requested mem in the mappings. rangeStart = pKernelBus->coherentCpuMapping.physAddr[i]; - rangeEnd = pKernelBus->coherentCpuMapping.physAddr[i] + pKernelBus->coherentCpuMapping.size[i] - 1; - offset = 0; + rangeEnd = pKernelBus->coherentCpuMapping.physAddr[i] + pKernelBus->coherentCpuMapping.size[i] - 1 ; + regionOffset = 0; if (rangeStart <= startAddr && endAddr <= rangeEnd) { NV_ASSERT_OR_RETURN( - pKernelBus->coherentCpuMapping.pCpuMapping[i] != NvP64_NULL, NvP64_NULL); + pKernelBus->coherentCpuMapping.pCpuMapping[i] != NvP64_NULL, NV_ERR_INVALID_STATE); // Get the offset of the region - offset = startAddr - pKernelBus->coherentCpuMapping.physAddr[i]; + regionOffset = startAddr - pKernelBus->coherentCpuMapping.physAddr[i]; pKernelBus->coherentCpuMapping.refcnt[i]++; - return (NvU8 *)NvP64_VALUE( + *ppAddress = (NvU8 *)NvP64_VALUE( ((NvUPtr)pKernelBus->coherentCpuMapping.pCpuMapping[i] + - (NvUPtr)offset)); + (NvUPtr)regionOffset)); + return NV_OK; } } NV_ASSERT_FAILED("No mappings found"); - return NvP64_NULL; + return NV_ERR_INVALID_ARGUMENT; } /** @@ -181,6 +193,8 @@ kbusMapCoherentCpuMapping_GV100 * @param[in] pGpu Pointer to GPU * @param[in] pKernelBus Kernel bus pointer * @param[in] pMemDesc Pointer to memdesc + * @param[in] pAddress Virtual address to unmap + * @param[in] pPriv Private data to be passed for unmapping * * @return void */ @@ -189,7 +203,9 @@ kbusUnmapCoherentCpuMapping_GV100 ( OBJGPU *pGpu, KernelBus *pKernelBus, - PMEMORY_DESCRIPTOR pMemDesc + MEMORY_DESCRIPTOR *pMemDesc, + NvP64 pAddress, + NvP64 pPriv ) { RmPhysAddr startAddr = memdescGetPhysAddr(pMemDesc, FORCE_VMMU_TRANSLATION(pMemDesc, AT_GPU), 0); diff --git a/src/nvidia/src/kernel/gpu/bus/kern_bus.c b/src/nvidia/src/kernel/gpu/bus/kern_bus.c index 82daa358d0..c51bd39959 100644 --- a/src/nvidia/src/kernel/gpu/bus/kern_bus.c +++ b/src/nvidia/src/kernel/gpu/bus/kern_bus.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -742,7 +742,9 @@ kbusPatchBar1Pdb_GSPCLIENT memdescDescribe(pMemDesc, ADDR_FBMEM, pGSCI->bar1PdeBase, rootSize); memdescSetPageSize(pMemDesc, VAS_ADDRESS_TRANSLATION(pKernelBus->bar1[GPU_GFID_PF].pVAS), RM_PAGE_SIZE); - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx); + NV_ASSERT_OK_OR_GOTO(status, + gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx), + done); // // Modify the CPU-RM's walker state with the new backing memory. @@ -757,13 +759,17 @@ kbusPatchBar1Pdb_GSPCLIENT NV_TRUE, NV_FALSE); gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); - if (NV_OK != status) + +done: + if (status != NV_OK) { NV_PRINTF(LEVEL_ERROR, "Failed to modify CPU-RM's BAR1 PDB to GSP-RM's BAR1 PDB.\n"); - return status; + memdescDestroy(pMemDesc); + } + else + { + gvaspaceInvalidateTlb(pGVAS, pGpu, PTE_DOWNGRADE); } - - gvaspaceInvalidateTlb(pGVAS, pGpu, PTE_DOWNGRADE); return status; } @@ -991,7 +997,7 @@ kbusCheckEngineWithOrderList_KERNEL case ENG_OFA(0): return !!NVGPU_GET_ENGINE_CAPS_MASK(rmEngineCaps, RM_ENGINE_TYPE_OFA(GET_OFA_IDX(engDesc))); - + case ENG_NVJPEG(0): case ENG_NVJPEG(1): case ENG_NVJPEG(2): @@ -1283,20 +1289,33 @@ kbusSendBusInfo_IMPL ) { NV_STATUS status = NV_OK; - NV2080_CTRL_BUS_GET_INFO_V2_PARAMS busGetInfoParams = {0}; - busGetInfoParams.busInfoList[0] = *pBusInfo; - busGetInfoParams.busInfoListSize = 1; + if (IS_VIRTUAL(pGpu)) + { + VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); + + NV_ASSERT_OR_RETURN(pVSI != NULL, NV_ERR_INVALID_STATE); - NV_RM_RPC_CONTROL(pGpu, - pGpu->hInternalClient, - pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_BUS_GET_INFO_V2, - &busGetInfoParams, - sizeof(busGetInfoParams), - status); + pBusInfo->data = pVSI->busGetInfoV2.busInfoList[pBusInfo->index].data; + } + else + { + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + NV2080_CTRL_BUS_GET_INFO_V2_PARAMS busGetInfoParams = {0}; + + busGetInfoParams.busInfoList[0] = *pBusInfo; + busGetInfoParams.busInfoListSize = 1; + + status = pRmApi->Control(pRmApi, + pGpu->hInternalClient, + pGpu->hInternalSubdevice, + NV2080_CTRL_CMD_BUS_GET_INFO_V2, + &busGetInfoParams, + sizeof(busGetInfoParams)); + + pBusInfo->data = busGetInfoParams.busInfoList[0].data; + } - pBusInfo->data = busGetInfoParams.busInfoList[0].data; return status; } diff --git a/src/nvidia/src/kernel/gpu/bus/kern_bus_ctrl.c b/src/nvidia/src/kernel/gpu/bus/kern_bus_ctrl.c index 865a279c68..f5f9aabc09 100644 --- a/src/nvidia/src/kernel/gpu/bus/kern_bus_ctrl.c +++ b/src/nvidia/src/kernel/gpu/bus/kern_bus_ctrl.c @@ -677,3 +677,45 @@ subdeviceCtrlCmdBusSysmemAccess_IMPL return kbifDisableSysmemAccess_HAL(pGpu, pKernelBif, pParams->bDisable); } + +NV_STATUS +subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics_VF +( + Subdevice *pSubdevice, + NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS *pParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); + VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); + + NV_ASSERT_OR_RETURN(pVSI != NULL, NV_ERR_INVALID_STATE); + + for (NvU32 i = 0; i < NV2080_CTRL_PCIE_SUPPORTED_GPU_ATOMICS_OP_TYPE_COUNT; i++) + { + pParams->atomicOp[i].bSupported = pVSI->pcieSupportedGpuAtomics.atomicOp[i].bSupported; + pParams->atomicOp[i].attributes = pVSI->pcieSupportedGpuAtomics.atomicOp[i].attributes; + } + + return NV_OK; +} + +NV_STATUS +subdeviceCtrlCmdBusGetC2CInfo_VF +( + Subdevice *pSubdevice, + NV2080_CTRL_CMD_BUS_GET_C2C_INFO_PARAMS *pParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); + VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); + + NV_ASSERT_OR_RETURN(pVSI != NULL, NV_ERR_INVALID_STATE); + + pParams->bIsLinkUp = pVSI->c2cInfo.bIsLinkUp; + pParams->nrLinks = pVSI->c2cInfo.nrLinks; + pParams->linkMask = pVSI->c2cInfo.linkMask; + pParams->perLinkBwMBps = pVSI->c2cInfo.perLinkBwMBps; + pParams->remoteType = pVSI->c2cInfo.remoteType; + + return NV_OK; +} \ No newline at end of file diff --git a/src/nvidia/src/kernel/gpu/bus/kern_bus_vbar2.c b/src/nvidia/src/kernel/gpu/bus/kern_bus_vbar2.c index 9f7ee1cc10..251c4d6816 100644 --- a/src/nvidia/src/kernel/gpu/bus/kern_bus_vbar2.c +++ b/src/nvidia/src/kernel/gpu/bus/kern_bus_vbar2.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2004-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2004-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -666,7 +666,6 @@ kbusMapBar2ApertureCached_VBAR2 NV_PRINTF(LEVEL_ERROR, "Not enough contiguous BAR2 VA space left allocSize %llx!\n", allocSize); - DBG_BREAKPOINT(); return NULL; } } @@ -850,6 +849,17 @@ kbusValidateBar2ApertureMapping_VBAR2_SRIOV return kbusValidateBar2ApertureMapping_VBAR2(pGpu, pKernelBus, pMemDesc, pCpu); } +NvBool +kbusBar2IsReady_SCRATCH +( + OBJGPU *pGpu, + KernelBus *pKernelBus +) +{ + // The scratch implementation is just an allocation, so it's always ready + return NV_TRUE; +} + /*! * @brief Fake BAR2 map API to a scratch buffer. * @@ -872,6 +882,20 @@ kbusMapBar2Aperture_SCRATCH return portMemAllocNonPaged(pMemDesc->Size); } +NvBool +kbusBar2IsReady_VBAR2 +( + OBJGPU *pGpu, + KernelBus *pKernelBus +) +{ + // + // The CPU mapping is the last part of BAR2 to be initialized, so we can + // check it here to see if BAR2 is ready + // + return (pKernelBus->virtualBar2[GPU_GFID_PF].pCpuMapping != NULL); +} + /*! * Dynamically map memory either a virtual BAR2 or with a directly CPU * mapping. This is the HAL entry point. @@ -954,6 +978,19 @@ kbusMapBar2Aperture_VBAR2 return kbusMapBar2ApertureCached_VBAR2(pGpu, pKernelBus, pMemDesc, flags); } +NvBool +kbusBar2IsReady_VBAR2_SRIOV +( + OBJGPU *pGpu, + KernelBus *pKernelBus +) +{ + if (IS_VIRTUAL_WITHOUT_SRIOV(pGpu) || gpuIsWarBug200577889SriovHeavyEnabled(pGpu)) + return kbusBar2IsReady_SCRATCH(pGpu, pKernelBus); + + return kbusBar2IsReady_VBAR2(pGpu, pKernelBus); +} + /*! * @brief SRIOV BAR2 map filter to decide between SRIOV and classic VGPU behavior * diff --git a/src/nvidia/src/kernel/gpu/bus/kern_bus_vgpu.c b/src/nvidia/src/kernel/gpu/bus/kern_bus_vgpu.c index 1afd4623bb..ac59a6b919 100644 --- a/src/nvidia/src/kernel/gpu/bus/kern_bus_vgpu.c +++ b/src/nvidia/src/kernel/gpu/bus/kern_bus_vgpu.c @@ -39,7 +39,7 @@ * @returns NV_OK on success. */ NV_STATUS -kbusBar2BootStrapInPhysicalMode_VGPUSTUB +kbusBar2BootStrapInPhysicalMode_VF ( OBJGPU *pGpu, KernelBus *pKernelBus @@ -94,7 +94,7 @@ kbusBar2BootStrapInPhysicalMode_VGPUSTUB * @returns void */ NV_STATUS -kbusInitBarsSize_VGPUSTUB(OBJGPU *pGpu, KernelBus *pKernelBus) +kbusInitBarsSize_VF(OBJGPU *pGpu, KernelBus *pKernelBus) { if (!pKernelBus->bPciBarSizesValid) { @@ -108,7 +108,7 @@ kbusInitBarsSize_VGPUSTUB(OBJGPU *pGpu, KernelBus *pKernelBus) } NV_STATUS -subdeviceCtrlCmdBusSetP2pMapping_VGPUSTUB +subdeviceCtrlCmdBusSetP2pMapping_VF ( Subdevice *pSubdevice, NV2080_CTRL_BUS_SET_P2P_MAPPING_PARAMS *pParams @@ -147,7 +147,7 @@ subdeviceCtrlCmdBusSetP2pMapping_VGPUSTUB } NV_STATUS -subdeviceCtrlCmdBusUnsetP2pMapping_VGPUSTUB +subdeviceCtrlCmdBusUnsetP2pMapping_VF ( Subdevice *pSubdevice, NV2080_CTRL_BUS_UNSET_P2P_MAPPING_PARAMS *pParams diff --git a/src/nvidia/src/kernel/gpu/bus/p2p.c b/src/nvidia/src/kernel/gpu/bus/p2p.c index b192e45cd3..4a13b88327 100644 --- a/src/nvidia/src/kernel/gpu/bus/p2p.c +++ b/src/nvidia/src/kernel/gpu/bus/p2p.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2011-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2011-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -650,9 +650,12 @@ NV_STATUS RmThirdPartyP2PNVLinkGetPages return NV_ERR_INVALID_STATE; } - NV_ASSERT(!(address & (NVRM_P2P_PAGESIZE_BIG_64K - 1))); - NV_ASSERT(!(length & (NVRM_P2P_PAGESIZE_BIG_64K - 1))); - NV_ASSERT(!(offset & (NVRM_P2P_PAGESIZE_BIG_64K - 1))); + NV_ASSERT_OR_RETURN(NV_IS_ALIGNED64(address, NVRM_P2P_PAGESIZE_BIG_64K), + NV_ERR_INVALID_ARGUMENT); + NV_ASSERT_OR_RETURN(NV_IS_ALIGNED64(length, NVRM_P2P_PAGESIZE_BIG_64K), + NV_ERR_INVALID_ARGUMENT); + NV_ASSERT_OR_RETURN(NV_IS_ALIGNED64(offset, NVRM_P2P_PAGESIZE_BIG_64K), + NV_ERR_INVALID_ARGUMENT); lastAddress = (address + length - 1); while (address < lastAddress) @@ -1006,13 +1009,10 @@ static NV_STATUS _rmP2PGetPages( Subdevice *pSubdevice; PCLI_THIRD_PARTY_P2P_VASPACE_INFO pVASpaceInfo = NULL; - if (address & (NVRM_P2P_PAGESIZE_BIG_64K - 1)) - { - NV_PRINTF(LEVEL_ERROR, - "invalid argument in RmP2PGetPages, address=%llx is not aligned\n", - address); - return NV_ERR_INVALID_ARGUMENT; - } + NV_ASSERT_OR_RETURN(NV_IS_ALIGNED64(address, NVRM_P2P_PAGESIZE_BIG_64K), + NV_ERR_INVALID_ARGUMENT); + NV_ASSERT_OR_RETURN(NV_IS_ALIGNED64(length, NVRM_P2P_PAGESIZE_BIG_64K), + NV_ERR_INVALID_ARGUMENT); if (0 != p2pToken) { @@ -1093,6 +1093,7 @@ CLI_THIRD_PARTY_P2P_VIDMEM_INFO* _createOrReuseVidmemInfoPersistent NvU64 address, NvU64 length, NvU64 *pOffset, + NvHandle hClientInternal, ThirdPartyP2P *pThirdPartyP2P, ThirdPartyP2P *pThirdPartyP2PInternal ) @@ -1100,10 +1101,10 @@ CLI_THIRD_PARTY_P2P_VIDMEM_INFO* _createOrReuseVidmemInfoPersistent RM_API *pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); CLI_THIRD_PARTY_P2P_VIDMEM_INFO *pVidmemInfo = NULL; CLI_THIRD_PARTY_P2P_VIDMEM_INFO *pVidmemInfoInternal = NULL; - MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); Memory *pMemoryInternal; RsClient *pClientInternal; Device *pDevice; + Subdevice *pSubdevice; NvU64 offset = 0; NvHandle hMemoryDuped = 0; NV_STATUS status; @@ -1154,15 +1155,27 @@ CLI_THIRD_PARTY_P2P_VIDMEM_INFO* _createOrReuseVidmemInfoPersistent pClientInternal = RES_GET_CLIENT(pThirdPartyP2PInternal); pDevice = GPU_RES_GET_DEVICE(pThirdPartyP2PInternal); + pSubdevice = GPU_RES_GET_SUBDEVICE(pThirdPartyP2PInternal); // Dupe user client's hMemory status = pRmApi->DupObject(pRmApi, - pMemoryManager->hClient, + hClientInternal, RES_GET_HANDLE(pDevice), &hMemoryDuped, pThirdPartyP2P->hClient, pVidmemInfo->hMemory, 0); + if (status == NV_ERR_INVALID_OBJECT_PARENT) + { + // If duping under Device fails, try duping under Subdevice + status = pRmApi->DupObject(pRmApi, + hClientInternal, + RES_GET_HANDLE(pSubdevice), + &hMemoryDuped, + pThirdPartyP2P->hClient, + pVidmemInfo->hMemory, + 0); + } if (status != NV_OK) { goto failed; @@ -1209,12 +1222,71 @@ CLI_THIRD_PARTY_P2P_VIDMEM_INFO* _createOrReuseVidmemInfoPersistent failed: if (bMemDuped) { - pRmApi->Free(pRmApi, pMemoryManager->hClient, hMemoryDuped); + pRmApi->Free(pRmApi, hClientInternal, hMemoryDuped); } return NULL; } +static NV_STATUS RmP2PGetMigInfo( + OBJGPU *pGpu, + NvU64 address, + NvU64 length, + ThirdPartyP2P *pThirdPartyP2P, + KERNEL_MIG_GPU_INSTANCE **ppGpuInstanceInfo +) +{ + NvHandle hClient, hMemory; + MIG_INSTANCE_REF ref; + KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); + CLI_THIRD_PARTY_P2P_VIDMEM_INFO *pVidmemInfo = NULL; + Memory *pMemory; + RsClient *pClient; + NvU64 offset; + + // Get hClient and hMemory + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + CliGetThirdPartyP2PVidmemInfoFromAddress(pThirdPartyP2P, + address, length, &offset, &pVidmemInfo)); + hClient = pVidmemInfo->hClient; + hMemory = pVidmemInfo->hMemory; + + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + serverGetClientUnderLock(&g_resServ, hClient, &pClient)); + + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + memGetByHandle(pClient, hMemory, &pMemory)); + + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + kmigmgrGetInstanceRefFromDevice(pGpu, pKernelMIGManager, + pMemory->pDevice, &ref)); + + // Refcount++ MIG instance + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + kmigmgrIncRefCount(ref.pKernelMIGGpuInstance->pShare)); + + *ppGpuInstanceInfo = (void *) ref.pKernelMIGGpuInstance; + + return NV_OK; +} + +static void RmP2PPutMigInfo( + void *pGpuInstanceInfo +) +{ + KERNEL_MIG_GPU_INSTANCE *pKernelMIGGpuInstance; + + if (pGpuInstanceInfo == NULL) + { + return; + } + + pKernelMIGGpuInstance = (KERNEL_MIG_GPU_INSTANCE *) pGpuInstanceInfo; + + // Refcount-- MIG instance + NV_ASSERT_OK(kmigmgrDecRefCount(pKernelMIGGpuInstance->pShare)); +} + NV_STATUS RmP2PGetPagesPersistent( NvU64 address, NvU64 length, @@ -1222,7 +1294,8 @@ NV_STATUS RmP2PGetPagesPersistent( NvU64 *pPhysicalAddresses, NvU32 *pEntries, void *pPlatformData, - void *pGpuInfo + void *pGpuInfo, + void **ppGpuInstanceInfo ) { RsResourceRef *pResourceRef; @@ -1231,10 +1304,22 @@ NV_STATUS RmP2PGetPagesPersistent( ThirdPartyP2P *pThirdPartyP2PInternal = NULL; CLI_THIRD_PARTY_P2P_VASPACE_INFO *pVASpaceInfo = NULL; CLI_THIRD_PARTY_P2P_VIDMEM_INFO *pVidmemInfo = NULL; - MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); + KERNEL_MIG_GPU_INSTANCE *pKernelMIGGpuInstance = NULL; NvU64 offset = 0; + NvHandle hClientInternal; + NvHandle hThirdPartyP2PInternal; NV_STATUS status; + NV_ASSERT_OR_RETURN(NV_IS_ALIGNED64(address, NVRM_P2P_PAGESIZE_BIG_64K), + NV_ERR_INVALID_ARGUMENT); + NV_ASSERT_OR_RETURN(NV_IS_ALIGNED64(length, NVRM_P2P_PAGESIZE_BIG_64K), + NV_ERR_INVALID_ARGUMENT); + + if(gpuIsApmFeatureEnabled(pGpu)) + { + return NV_ERR_NOT_SUPPORTED; + } + status = RmP2PGetInfoWithoutToken(address, length, NULL, &pThirdPartyP2P, &pVASpaceInfo, pGpu); if (status != NV_OK) @@ -1242,22 +1327,59 @@ NV_STATUS RmP2PGetPagesPersistent( return status; } - status = serverutilGetResourceRef(pMemoryManager->hClient, - pMemoryManager->hThirdPartyP2P, + if (IS_MIG_ENABLED(pGpu)) + { + status = RmP2PGetMigInfo(pGpu, address, length, pThirdPartyP2P, + &pKernelMIGGpuInstance); + if (status != NV_OK) + { + return status; + } + *ppGpuInstanceInfo = (void *) pKernelMIGGpuInstance; + + if (pKernelMIGGpuInstance->instanceHandles.hThirdPartyP2P == NV01_NULL_OBJECT) + { + status = NV_ERR_NOT_SUPPORTED; + + goto failed; + } + + hClientInternal = pKernelMIGGpuInstance->instanceHandles.hClient; + hThirdPartyP2PInternal = pKernelMIGGpuInstance->instanceHandles.hThirdPartyP2P; + } + else + { + MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); + + if (pMemoryManager->hThirdPartyP2P == NV01_NULL_OBJECT) + { + return NV_ERR_NOT_SUPPORTED; + } + + hClientInternal = pMemoryManager->hClient; + hThirdPartyP2PInternal = pMemoryManager->hThirdPartyP2P; + *ppGpuInstanceInfo = NULL; + } + + status = serverutilGetResourceRef(hClientInternal, + hThirdPartyP2PInternal, &pResourceRef); if (status != NV_OK) { - return status; + goto failed; } pThirdPartyP2PInternal = dynamicCast(pResourceRef->pResource, ThirdPartyP2P); pVidmemInfo = _createOrReuseVidmemInfoPersistent(pGpu, address, length, &offset, + hClientInternal, pThirdPartyP2P, pThirdPartyP2PInternal); if (pVidmemInfo == NULL) { - return NV_ERR_INVALID_STATE; + status = NV_ERR_INVALID_STATE; + + goto failed; } status = RmP2PGetPagesUsingVidmemInfo(address, length, offset, @@ -1280,7 +1402,7 @@ NV_STATUS RmP2PGetPagesPersistent( // CliDelThirdPartyP2PVidmemInfoPersistent(pThirdPartyP2PInternal, pVidmemInfo); - return status; + goto failed; } // @@ -1290,6 +1412,11 @@ NV_STATUS RmP2PGetPagesPersistent( *p2pObject = (void *) pThirdPartyP2PInternal; return NV_OK; + +failed: + RmP2PPutMigInfo(pKernelMIGGpuInstance); + + return status; } NV_STATUS RmP2PGetPages( @@ -1349,7 +1476,6 @@ NV_STATUS RmP2PGetGpuByAddress( ThirdPartyP2P *pThirdPartyP2P = NULL; CLI_THIRD_PARTY_P2P_VASPACE_INFO *pVASpaceInfo = NULL; OBJGPU *pGpu = NULL; - MemoryManager *pMemoryManager = NULL; NV_STATUS status = NV_OK; status = RmP2PGetInfoWithoutToken(address, length, NULL, @@ -1365,18 +1491,6 @@ NV_STATUS RmP2PGetGpuByAddress( return status; } - pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - - // Unsupported configs/platforms for persistent mappings - if (IS_MIG_ENABLED(pGpu) || - gpuIsApmFeatureEnabled(pGpu) || - IS_VIRTUAL(pGpu) || - NVCPU_IS_PPC64LE || - pMemoryManager->hThirdPartyP2P == 0) - { - return NV_ERR_NOT_SUPPORTED; - } - *ppGpu = pGpu; return status; @@ -1431,7 +1545,8 @@ NV_STATUS RmP2PRegisterCallback( NV_STATUS RmP2PPutPagesPersistent( void *p2pObject, - void *pPlatformData + void *pPlatformData, + void *pMigInfo ) { NV_STATUS status; @@ -1449,6 +1564,8 @@ NV_STATUS RmP2PPutPagesPersistent( NV_ASSERT(status == NV_OK); + RmP2PPutMigInfo(pMigInfo); + return status; } diff --git a/src/nvidia/src/kernel/gpu/bus/p2p_api.c b/src/nvidia/src/kernel/gpu/bus/p2p_api.c index 3d6e1bed18..a89cfc55e8 100644 --- a/src/nvidia/src/kernel/gpu/bus/p2p_api.c +++ b/src/nvidia/src/kernel/gpu/bus/p2p_api.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2009-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2009-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -62,8 +62,7 @@ _p2papiReservePeerID NvU32 gpu1Instance = gpuGetInstance(pRemoteGpu); // loopback request - if ( - !bEgmPeer && + if (!bEgmPeer && (pNv503bAllocParams->hSubDevice == pNv503bAllocParams->hPeerSubDevice)) { *peer1 = *peer2 = 0; @@ -145,10 +144,11 @@ _p2papiReservePeerID } update_mask: - if (bEgmPeer) - { - NV_PRINTF(LEVEL_INFO, "EGM peer\n"); - } + if (bEgmPeer) + { + NV_PRINTF(LEVEL_INFO, "EGM peer\n"); + } + // // Does the mapping already exist between the given pair of GPUs using the peerIDs // peer1 and peer2 respectively ? @@ -281,6 +281,7 @@ p2papiConstruct_IMPL subDevicePeerIdMask = pNv503bAllocParams->subDevicePeerIdMask; peerSubDevicePeerIdMask = pNv503bAllocParams->peerSubDevicePeerIdMask; + NvU32 egmPeer1; NvU32 egmPeer2; NvU32 subDeviceEgmPeerIdMask; @@ -343,6 +344,7 @@ p2papiConstruct_IMPL { return NV_ERR_INVALID_ARGUMENT; } + if (pNv503bAllocParams->subDeviceEgmPeerIdMask != pNv503bAllocParams->peerSubDeviceEgmPeerIdMask) { return NV_ERR_INVALID_ARGUMENT; @@ -546,17 +548,9 @@ p2papiConstruct_IMPL pP2PApi->attributes = DRF_NUM(_P2PAPI, _ATTRIBUTES, _CONNECTION_TYPE, p2pConnectionType); pP2PApi->attributes |= bSpaAccessOnly ? DRF_DEF(_P2PAPI, _ATTRIBUTES, _LINK_TYPE, _SPA) : DRF_DEF(_P2PAPI, _ATTRIBUTES, _LINK_TYPE, _GPA); - - // - // For Nvswitch connected systems, AAS(Alternate Address Space) is set by Nvswitch itself - // based on the EGM fabric address range and so there is no need for a separate peer id - // in the Nvswitch case. - // bEgmPeer = (!bSpaAccessOnly && memmgrIsLocalEgmEnabled(GPU_GET_MEMORY_MANAGER(pLocalGpu)) && - memmgrIsLocalEgmEnabled(GPU_GET_MEMORY_MANAGER(pRemoteGpu)) && - !GPU_IS_NVSWITCH_DETECTED(pLocalGpu)); - + memmgrIsLocalEgmEnabled(GPU_GET_MEMORY_MANAGER(pRemoteGpu))); if (bSpaAccessOnly && memmgrIsLocalEgmEnabled(GPU_GET_MEMORY_MANAGER(pLocalGpu)) && memmgrIsLocalEgmEnabled(GPU_GET_MEMORY_MANAGER(pRemoteGpu))) @@ -744,10 +738,10 @@ p2papiDestruct_IMPL pRemoteGpu, pRemoteKernelBus, pP2PApi->peerId1, pP2PApi->peerId2, pP2PApi->attributes), end); + if (!FLD_TEST_DRF(_P2PAPI, _ATTRIBUTES, _LINK_TYPE, _SPA, pP2PApi->attributes) && memmgrIsLocalEgmEnabled(GPU_GET_MEMORY_MANAGER(pLocalGpu)) && - memmgrIsLocalEgmEnabled(GPU_GET_MEMORY_MANAGER(pRemoteGpu)) && - !GPU_IS_NVSWITCH_DETECTED(pLocalGpu)) + memmgrIsLocalEgmEnabled(GPU_GET_MEMORY_MANAGER(pRemoteGpu))) { status = kbusRemoveP2PMapping_HAL(pLocalGpu, pLocalKernelBus, pRemoteGpu, pRemoteKernelBus, diff --git a/src/nvidia/src/kernel/gpu/ccu/arch/hopper/kernel_ccu_gh100.c b/src/nvidia/src/kernel/gpu/ccu/arch/hopper/kernel_ccu_gh100.c index 284aab4a13..00176872f0 100644 --- a/src/nvidia/src/kernel/gpu/ccu/arch/hopper/kernel_ccu_gh100.c +++ b/src/nvidia/src/kernel/gpu/ccu/arch/hopper/kernel_ccu_gh100.c @@ -102,3 +102,26 @@ kccuMigShrBufHandler_GH100 return status; } + +/*! + * Get CCU shared buffer informtion + * + * @param[in] pGpu GPU object pointer + * @param[in/out] pKernelCcu KernelCcu object pointer + * + * @return NV_OK + */ +NV_STATUS +kccuGetBufSize_GH100 +( + OBJGPU *pGpu, + KernelCcu *pKernelCcu +) +{ + pKernelCcu->devBufSize = CCU_DEV_BUF_SIZE_16KB; + pKernelCcu->devSharedBufSize = CCU_DEV_SHARED_BUF_SIZE; + pKernelCcu->migBufSize = CCU_MIG_BUF_SIZE_2KB; + pKernelCcu->migSharedBufSize = CCU_MIG_SHARED_BUF_SIZE; + + return NV_OK; +} diff --git a/src/nvidia/src/kernel/gpu/ccu/kernel_ccu.c b/src/nvidia/src/kernel/gpu/ccu/kernel_ccu.c index 3d6dbd2835..332c8624d3 100644 --- a/src/nvidia/src/kernel/gpu/ccu/kernel_ccu.c +++ b/src/nvidia/src/kernel/gpu/ccu/kernel_ccu.c @@ -60,7 +60,7 @@ _kccuAllocMemory KernelCcu *pKernelCcu, NvU32 idx, NvU32 shrBufSize, - NvU64 counterBlockSize + NvU32 counterBlockSize ) { NV_STATUS status = NV_OK; @@ -256,7 +256,18 @@ kccuShrBufInfoToCcu_IMPL { if (pKernelCcu->pMemDesc[idx] != NULL) { - inParams.phyAddr[idx] = memdescGetPhysAddr(pKernelCcu->pMemDesc[idx], AT_GPU, 0); + inParams.mapInfo[idx].phyAddr = memdescGetPhysAddr(pKernelCcu->pMemDesc[idx], AT_GPU, 0); + + if (idx == CCU_DEV_SHRBUF_ID) + { + inParams.mapInfo[idx].shrBufSize = pKernelCcu->devSharedBufSize; + inParams.mapInfo[idx].cntBlkSize = pKernelCcu->devBufSize; + } + else + { + inParams.mapInfo[idx].shrBufSize = pKernelCcu->migSharedBufSize; + inParams.mapInfo[idx].cntBlkSize = pKernelCcu->migBufSize; + } } } @@ -297,8 +308,7 @@ _kccuInitDevSharedBuffer NV_PRINTF(LEVEL_INFO, "Init shared buffer for device counters.\n"); // Allocate shared buffer for device counters - status = _kccuAllocMemory(pGpu, pKernelCcu, CCU_DEV_SHRBUF_ID, CCU_GPU_SHARED_BUFFER_SIZE_MAX, - CCU_PER_GPU_COUNTER_Q_SIZE); + status = _kccuAllocMemory(pGpu, pKernelCcu, CCU_DEV_SHRBUF_ID, pKernelCcu->devSharedBufSize, pKernelCcu->devBufSize); if (status != NV_OK) { NV_PRINTF(LEVEL_ERROR, "CCU memory allocation failed with status: 0x%x\n", status); @@ -330,8 +340,7 @@ kccuInitMigSharedBuffer_IMPL // Allocate shared buffer for each mig gpu instance for (idx = CCU_MIG_SHRBUF_ID_START; idx < CCU_SHRBUF_COUNT_MAX; idx++) { - status = _kccuAllocMemory(pGpu, pKernelCcu, idx, CCU_MIG_INST_SHARED_BUFFER_SIZE_MAX, - CCU_MIG_INST_COUNTER_Q_SIZE); + status = _kccuAllocMemory(pGpu, pKernelCcu, idx, pKernelCcu->migSharedBufSize, pKernelCcu->migBufSize); if (status != NV_OK) { NV_PRINTF(LEVEL_ERROR, "CCU memory allocation failed for idx(%u) with status: 0x%x\n", @@ -368,6 +377,14 @@ NV_STATUS kccuStateLoad_IMPL NV_PRINTF(LEVEL_INFO, "KernelCcu: State load \n"); + // Get the buffer size information + status = kccuGetBufSize_HAL(pGpu, pKernelCcu); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "Failed to get the buffer size info(status: %u) \n", status); + return status; + } + // Create device shared buffer status = _kccuInitDevSharedBuffer(pGpu, pKernelCcu); if (status != NV_OK) @@ -457,47 +474,6 @@ NV_STATUS kccuMemDescGetForShrBufId_IMPL return NV_OK; } -/*! - * Get the shared buffer memory descriptor for swizz id - * - * @param[in] pGpu GPU object pointer - * @param[in] pKernelCcu KernelCcu object pointer - * @param[in] swizzId Mig inst swizz-id - * @param[out] MEMORY_DESCRIPTOR Location of pMemDesc - * - * @return NV_OK - * @return NV_ERR_INVALID_ARGUMENT - */ -NV_STATUS kccuMemDescGetForSwizzId_IMPL -( - OBJGPU *pGpu, - KernelCcu *pKernelCcu, - NvU8 swizzId, - MEMORY_DESCRIPTOR **ppMemDesc -) -{ - NvU32 idx = 0; - - for (idx = CCU_MIG_SHRBUF_ID_START; idx < CCU_SHRBUF_COUNT_MAX; idx++) - { - if (*pKernelCcu->shrBuf[idx].pCounterDstInfo->pSwizzId == swizzId) - { - *ppMemDesc = pKernelCcu->pMemDesc[idx]; - break; - } - } - - if (idx >= CCU_SHRBUF_COUNT_MAX) - { - NV_PRINTF(LEVEL_ERROR, "KernelCcu: memdesc get failed for input swizzId(%u)\n", - swizzId); - - return NV_ERR_INVALID_ARGUMENT; - } - - return NV_OK; -} - /*! * Get counter block size * @@ -518,10 +494,10 @@ NvU32 kccuCounterBlockSizeGet_IMPL // For device counter block if (bDevCounter) { - return CCU_PER_GPU_COUNTER_Q_SIZE; + return pKernelCcu->devBufSize; } - return CCU_MIG_INST_COUNTER_Q_SIZE; + return pKernelCcu->migBufSize; } /*! diff --git a/src/nvidia/src/kernel/gpu/ccu/kernel_ccu_api.c b/src/nvidia/src/kernel/gpu/ccu/kernel_ccu_api.c index 1aa88d44c4..0dd70543c0 100644 --- a/src/nvidia/src/kernel/gpu/ccu/kernel_ccu_api.c +++ b/src/nvidia/src/kernel/gpu/ccu/kernel_ccu_api.c @@ -317,9 +317,15 @@ kccuapiCtrlCmdSubscribe_IMPL } else { + if ((ref.pKernelMIGGpuInstance == NULL) || (ref.pMIGComputeInstance == NULL)) + { + return NV_ERR_INVALID_POINTER; + } + // Get counter block size for mig gpu inst NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, - kccuMemDescGetForSwizzId(pGpu, pKernelCcu, ref.pKernelMIGGpuInstance->swizzId, &pMemDesc)); + kccuMemDescGetForComputeInst(pGpu, pKernelCcu, ref.pKernelMIGGpuInstance->swizzId, + ref.pMIGComputeInstance->id, &pMemDesc)); pParams->counterBlockSize = kccuCounterBlockSizeGet(pGpu, pKernelCcu, NV_FALSE); } diff --git a/src/nvidia/src/kernel/gpu/ce/kernel_ce.c b/src/nvidia/src/kernel/gpu/ce/kernel_ce.c index 66ed68d5d5..05ec23ab05 100644 --- a/src/nvidia/src/kernel/gpu/ce/kernel_ce.c +++ b/src/nvidia/src/kernel/gpu/ce/kernel_ce.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -25,7 +25,6 @@ #include "gpu/ce/kernel_ce.h" #include "gpu/ce/kernel_ce_private.h" #include "gpu/eng_desc.h" -#include "gpu/mem_mgr/ce_utils.h" #include "gpu_mgr/gpu_mgr.h" #include "kernel/gpu/intr/intr_service.h" #include "kernel/gpu/nvlink/kernel_nvlink.h" @@ -33,8 +32,6 @@ #include "vgpu/sdk-structures.h" #include "nvRmReg.h" -#include "gpu/conf_compute/ccsl.h" - NV_STATUS kceConstructEngine_IMPL(OBJGPU *pGpu, KernelCE *pKCe, ENGDESCRIPTOR engDesc) { NV_ASSERT_OR_RETURN(!RMCFG_FEATURE_PLATFORM_GSP, NV_ERR_NOT_SUPPORTED); @@ -93,195 +90,6 @@ NvBool kceIsNewMissingEngineRemovalSequenceEnabled_IMPL(OBJGPU *pGpu, KernelCE * return NV_TRUE; } -#define CE_FIPS_SELF_TEST_DATA_SIZE 16 -#define CE_FIPS_SELF_TEST_AUTH_TAG_SIZE 16 -#define CE_FIPS_SELF_TEST_IV_SIZE 12 - -NV_STATUS -kceRunFipsSelfTest -( - OBJGPU *pGpu, - void *pArg -) -{ - KernelCE *pKCe = pArg; - MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); - MEMORY_DESCRIPTOR *pSrcMemDesc = NULL; - MEMORY_DESCRIPTOR *pDstMemDesc = NULL; - MEMORY_DESCRIPTOR *pAuthMemDesc = NULL; - MEMORY_DESCRIPTOR *pIvMemDesc = NULL; - CeUtils *pCeUtils = NULL; - pCcslContext pCcslCtx = NULL; - NV_STATUS status; - NV0050_ALLOCATION_PARAMETERS ceUtilsParams = {0}; - CEUTILS_MEMCOPY_PARAMS params = {0}; - - NvU8 ceTestPlaintext[CE_FIPS_SELF_TEST_DATA_SIZE] = { - 0x2d, 0x71, 0xbc, 0xfa, 0x91, 0x4e, 0x4a, 0xc0, - 0x45, 0xb2, 0xaa, 0x60, 0x95, 0x5f, 0xad, 0x24 - }; - NvU8 decryptedData[CE_FIPS_SELF_TEST_DATA_SIZE] = { 0 }; - NvU8 encryptedData[CE_FIPS_SELF_TEST_DATA_SIZE] = { 0 }; - NvU8 dataAuth[CE_FIPS_SELF_TEST_AUTH_TAG_SIZE] = { 0 }; - - NV_ASSERT_OR_RETURN(gpuIsCCFeatureEnabled(pGpu), NV_ERR_NOT_SUPPORTED); - - if (!gpuCheckEngineTable(pGpu, RM_ENGINE_TYPE_COPY(pKCe->publicID)) || - ceIsCeGrce(pGpu, RM_ENGINE_TYPE_COPY(pKCe->publicID))) - { - // CE doesn't support encryption - return NV_OK; - } - - if (kmigmgrIsMIGSupported(pGpu, pKernelMIGManager) && - kmigmgrGetStaticInfo(pGpu, pKernelMIGManager) == NULL) - { - // Wait for KernelMigManager, as it might remap CEs - return NV_WARN_MORE_PROCESSING_REQUIRED; - } - - NV_PRINTF(LEVEL_INFO, "Running FIPS test for CE%u\n", pKCe->publicID); - - ceUtilsParams.flags |= DRF_DEF(0050_CEUTILS, _FLAGS, _FORCE_CE_ID, _TRUE); - ceUtilsParams.flags |= DRF_DEF(0050_CEUTILS, _FLAGS, _CC_SECURE, _TRUE); - ceUtilsParams.forceCeId = pKCe->publicID; - - NV_ASSERT_OK_OR_GOTO(status, - objCreate(&pCeUtils, pMemoryManager, CeUtils, ENG_GET_GPU(pMemoryManager), NULL, &ceUtilsParams), failed); - - NV_ASSERT_OK_OR_GOTO(status, - ccslContextInitViaChannel_HAL(&pCcslCtx, pCeUtils->pChannel->hClient, - pCeUtils->pChannel->channelId), - failed); - - NV_ASSERT_OK_OR_GOTO(status, memdescCreate(&pSrcMemDesc, pGpu, sizeof ceTestPlaintext, 0, NV_TRUE, ADDR_FBMEM, - NV_MEMORY_UNCACHED, MEMDESC_ALLOC_FLAGS_PROTECTED), failed); - NV_ASSERT_OK_OR_GOTO(status, memdescAlloc(pSrcMemDesc), failed); - - NV_ASSERT_OK_OR_GOTO(status, memdescCreate(&pDstMemDesc, pGpu, sizeof encryptedData, 0, NV_TRUE, ADDR_SYSMEM, - NV_MEMORY_UNCACHED, MEMDESC_FLAGS_ALLOC_IN_UNPROTECTED_MEMORY), failed); - NV_ASSERT_OK_OR_GOTO(status, memdescAlloc(pDstMemDesc), failed); - - NV_ASSERT_OK_OR_GOTO(status, memdescCreate(&pAuthMemDesc, pGpu, sizeof dataAuth, 0, NV_TRUE, ADDR_SYSMEM, - NV_MEMORY_UNCACHED, MEMDESC_FLAGS_ALLOC_IN_UNPROTECTED_MEMORY), failed); - NV_ASSERT_OK_OR_GOTO(status, memdescAlloc(pAuthMemDesc), failed); - - NV_ASSERT_OK_OR_GOTO(status, memdescCreate(&pIvMemDesc, pGpu, CE_FIPS_SELF_TEST_IV_SIZE, 0, NV_TRUE, ADDR_SYSMEM, - NV_MEMORY_UNCACHED, MEMDESC_FLAGS_ALLOC_IN_UNPROTECTED_MEMORY), failed); - NV_ASSERT_OK_OR_GOTO(status, memdescAlloc(pIvMemDesc), failed); - - TRANSFER_SURFACE srcSurface = { .pMemDesc = pSrcMemDesc, .offset = 0 }; - TRANSFER_SURFACE dstSurface = { .pMemDesc = pDstMemDesc, .offset = 0 }; - TRANSFER_SURFACE authSurface = { .pMemDesc = pAuthMemDesc, .offset = 0 }; - - // Write data to allocations, encrypt using CE, and read back the results - NV_ASSERT_OK_OR_GOTO(status, memmgrMemDescMemSet(pMemoryManager, pDstMemDesc, 0, 0), failed); - NV_ASSERT_OK_OR_GOTO(status, memmgrMemDescMemSet(pMemoryManager, pAuthMemDesc, 0, 0), failed); - NV_ASSERT_OK_OR_GOTO(status, - memmgrMemWrite(pMemoryManager, &srcSurface, ceTestPlaintext, sizeof ceTestPlaintext, TRANSFER_FLAGS_NONE), - failed); - - params.bSecureCopy = NV_TRUE; - params.authTagAddr = memdescGetPhysAddr(pAuthMemDesc, AT_GPU, 0); - params.encryptIvAddr = memdescGetPhysAddr(pIvMemDesc, AT_GPU, 0); - params.pDstMemDesc = pDstMemDesc; - params.dstOffset = 0; - params.pSrcMemDesc = pSrcMemDesc; - params.srcOffset = 0; - params.length = sizeof ceTestPlaintext; - params.bEncrypt = NV_TRUE; - NV_ASSERT_OK_OR_GOTO(status, ceutilsMemcopy(pCeUtils, ¶ms), failed); - - NV_ASSERT_OK_OR_GOTO(status, - memmgrMemRead(pMemoryManager, &dstSurface, encryptedData, sizeof encryptedData, TRANSFER_FLAGS_NONE), failed); - NV_ASSERT_OK_OR_GOTO(status, - memmgrMemRead(pMemoryManager, &authSurface, dataAuth, sizeof dataAuth, TRANSFER_FLAGS_NONE), failed); - - // Decrypt using CPU and validate - NV_ASSERT_OK_OR_GOTO(status, - ccslDecrypt_HAL(pCcslCtx, sizeof decryptedData, encryptedData, NULL, NULL, 0, decryptedData, dataAuth), - failed); - - NV_ASSERT_TRUE_OR_GOTO(status, portMemCmp(decryptedData, ceTestPlaintext, sizeof ceTestPlaintext) == 0, - NV_ERR_INVALID_STATE, failed); - - // Encrypt using CPU - NV_ASSERT_OK_OR_GOTO(status, - ccslEncrypt_HAL(pCcslCtx, sizeof ceTestPlaintext, ceTestPlaintext, NULL, 0, encryptedData, dataAuth), failed); - - // Write data to allocations, decrypt using CE, read back, and validate - NV_ASSERT_OK_OR_GOTO(status, - memmgrMemWrite(pMemoryManager, &dstSurface, encryptedData, sizeof encryptedData, TRANSFER_FLAGS_NONE), failed); - NV_ASSERT_OK_OR_GOTO(status, - memmgrMemWrite(pMemoryManager, &authSurface, dataAuth, sizeof dataAuth, TRANSFER_FLAGS_NONE), failed); - NV_ASSERT_OK_OR_GOTO(status, memmgrMemDescMemSet(pMemoryManager, pSrcMemDesc, 0, 0), failed); - - params.pDstMemDesc = pSrcMemDesc; - params.dstOffset = 0; - params.pSrcMemDesc = pDstMemDesc; - params.srcOffset = 0; - params.length = sizeof ceTestPlaintext; - params.bEncrypt = NV_FALSE; - NV_ASSERT_OK_OR_GOTO(status, ceutilsMemcopy(pCeUtils, ¶ms), failed); - - NV_ASSERT_OK_OR_GOTO(status, - memmgrMemRead(pMemoryManager, &srcSurface, decryptedData, sizeof decryptedData, TRANSFER_FLAGS_NONE), failed); - - NV_ASSERT_TRUE_OR_GOTO(status, portMemCmp(decryptedData, ceTestPlaintext, sizeof ceTestPlaintext) == 0, - NV_ERR_INVALID_STATE, failed); - -failed: - ccslContextClear(pCcslCtx); - objDelete(pCeUtils); - memdescFree(pSrcMemDesc); - memdescDestroy(pSrcMemDesc); - memdescFree(pDstMemDesc); - memdescDestroy(pDstMemDesc); - memdescFree(pAuthMemDesc); - memdescDestroy(pAuthMemDesc); - memdescFree(pIvMemDesc); - memdescDestroy(pIvMemDesc); - - NV_PRINTF(LEVEL_INFO, "Test finished with status 0x%x\n", status); - - return status; -} - -NV_STATUS -kceStateInitLocked_IMPL -( - OBJGPU *pGpu, - KernelCE *pKCe -) -{ - if (!gpuIsCCFeatureEnabled(pGpu) || !IS_SILICON(pGpu)) - { - pKCe->bCcFipsSelfTestRequired = NV_FALSE; - } - - if (pKCe->bCcFipsSelfTestRequired) - { - NV_ASSERT_OK_OR_RETURN( - kfifoAddSchedulingHandler(pGpu, GPU_GET_KERNEL_FIFO(pGpu), kceRunFipsSelfTest, pKCe, NULL, NULL)); - } - - return NV_OK; -} - -void -kceStateDestroy_IMPL -( - OBJGPU *pGpu, - KernelCE *pKCe -) -{ - if (pKCe->bCcFipsSelfTestRequired) - { - kfifoRemoveSchedulingHandler(pGpu, GPU_GET_KERNEL_FIFO(pGpu), kceRunFipsSelfTest, pKCe, NULL, NULL); - } -} - static void printCaps(OBJGPU *pGpu, KernelCE *pKCe, RM_ENGINE_TYPE rmEngineType, const NvU8 *capsTbl) { NV_PRINTF(LEVEL_INFO, "LCE%d caps (engineType = %d (%d))\n", pKCe->publicID, diff --git a/src/nvidia/src/kernel/gpu/ce/kernel_ce_ctrl.c b/src/nvidia/src/kernel/gpu/ce/kernel_ce_ctrl.c index f3b4976555..2a7b436fd7 100644 --- a/src/nvidia/src/kernel/gpu/ce/kernel_ce_ctrl.c +++ b/src/nvidia/src/kernel/gpu/ce/kernel_ce_ctrl.c @@ -48,10 +48,9 @@ subdeviceCtrlCmdCeGetCaps_IMPL NV2080_CTRL_CE_GET_CAPS_PARAMS *pCeCapsParams ) { - OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); - KernelCE *pKCe; - NvU32 ceNumber; - NV_STATUS status = NV_OK; + OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); + KernelCE *pKCe; + NvU32 ceNumber; RM_ENGINE_TYPE rmEngineType; LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); @@ -71,38 +70,6 @@ subdeviceCtrlCmdCeGetCaps_IMPL return NV_ERR_NOT_SUPPORTED; } - // - // vGPU: - // - // Since vGPU does all real hardware management in the - // host, if we are in guest OS (where IS_VIRTUAL(pGpu) is true), - // do an RPC to the host to get blacklist information from host RM - // - if (IS_VIRTUAL(pGpu)) - { - CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); - RmCtrlParams *pRmCtrlParams = pCallContext->pControlParams; - NV2080_CTRL_CE_GET_CAPS_V2_PARAMS ceCapsv2Params = { 0 }; - - ceCapsv2Params.ceEngineType = pCeCapsParams->ceEngineType; - - NV_RM_RPC_CONTROL(pGpu, pRmCtrlParams->hClient, - pRmCtrlParams->hObject, - NV2080_CTRL_CMD_CE_GET_CAPS_V2, - &ceCapsv2Params, - sizeof(ceCapsv2Params), - status); - - if (status == NV_OK) - { - portMemCopy(NvP64_VALUE(pCeCapsParams->capsTbl), - (sizeof(NvU8) * NV2080_CTRL_CE_CAPS_TBL_SIZE), - ceCapsv2Params.capsTbl, - (sizeof(NvU8) * NV2080_CTRL_CE_CAPS_TBL_SIZE)); - } - return status; - } - NV_ASSERT_OK_OR_RETURN(ceIndexFromType(pGpu, GPU_RES_GET_DEVICE(pSubdevice), rmEngineType, &ceNumber)); @@ -118,3 +85,92 @@ subdeviceCtrlCmdCeGetCaps_IMPL // now fill in caps for this CE return kceGetDeviceCaps(pGpu, pKCe, rmEngineType, NvP64_VALUE(pCeCapsParams->capsTbl)); } +NV_STATUS +subdeviceCtrlCmdCeGetCaps_VF +( + Subdevice *pSubdevice, + NV2080_CTRL_CE_GET_CAPS_PARAMS *pCeCapsParams +) +{ + NV2080_CTRL_CE_GET_CAPS_V2_PARAMS ceCapsv2Params = { 0 }; + NV_STATUS status; + + ceCapsv2Params.ceEngineType = pCeCapsParams->ceEngineType; + + status = subdeviceCtrlCmdCeGetCapsV2_VF(pSubdevice, &ceCapsv2Params); + + if (status == NV_OK) + { + portMemCopy(NvP64_VALUE(pCeCapsParams->capsTbl), + (sizeof(NvU8) * NV2080_CTRL_CE_CAPS_TBL_SIZE), + ceCapsv2Params.capsTbl, + (sizeof(NvU8) * NV2080_CTRL_CE_CAPS_TBL_SIZE)); + } + + return status; +} + +NV_STATUS +subdeviceCtrlCmdCeGetCapsV2_VF +( + Subdevice *pSubdevice, + NV2080_CTRL_CE_GET_CAPS_V2_PARAMS *pParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); + VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); + NvU32 i; + NvU32 ceNumber; + + NV_ASSERT_OR_RETURN(pVSI != NULL, NV_ERR_INVALID_STATE); + + // If engine disabled, return error and not empty caps. + if ((pVSI->engineList & NVBIT64(pParams->ceEngineType)) == 0) + { + portMemSet(&pParams->capsTbl, 0, NV2080_CTRL_CE_CAPS_TBL_SIZE); + return NV_ERR_NOT_SUPPORTED; + } + + ceNumber = NV2080_ENGINE_TYPE_COPY_IDX(pParams->ceEngineType); + + if (ceNumber >= NV2080_ENGINE_TYPE_COPY_SIZE) + { + return NV_ERR_INVALID_ARGUMENT; + } + + for (i = 0; i < NV2080_ENGINE_TYPE_COPY_SIZE; i++) + { + if (pParams->ceEngineType == pVSI->ceCaps[i].ceEngineType) + { + portMemCopy(&pParams->capsTbl, NV2080_CTRL_CE_CAPS_TBL_SIZE, + &pVSI->ceCaps[i].capsTbl, NV2080_CTRL_CE_CAPS_TBL_SIZE); + + return NV_OK; + } + } + + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS +subdeviceCtrlCmdCeGetAllCaps_VF +( + Subdevice *pSubdevice, + NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS *pParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); + VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); + + NV_ASSERT_OR_RETURN(pVSI != NULL, NV_ERR_INVALID_STATE); + + pParams->present = pVSI->ceGetAllCaps.present; + + for (NvU32 i = 0; i < NV2080_CTRL_MAX_PCES; i++) + { + portMemCopy(pParams->capsTbl[i], (sizeof(NvU8) * NV2080_CTRL_CE_CAPS_TBL_SIZE_v21_0A), + pVSI->ceGetAllCaps.capsTbl[i], (sizeof(NvU8) * NV2080_CTRL_CE_CAPS_TBL_SIZE_v21_0A)); + } + + return NV_OK; +} diff --git a/src/nvidia/src/kernel/gpu/ce/kernel_ce_shared.c b/src/nvidia/src/kernel/gpu/ce/kernel_ce_shared.c index 4601f13e3d..f55fbe7958 100644 --- a/src/nvidia/src/kernel/gpu/ce/kernel_ce_shared.c +++ b/src/nvidia/src/kernel/gpu/ce/kernel_ce_shared.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -32,6 +32,7 @@ #include "gpu/bus/kern_bus.h" #include "gpu/ce/kernel_ce.h" #include "gpu/ce/kernel_ce_private.h" +#include "nvmisc.h" NvBool ceIsCeGrce(OBJGPU *pGpu, RM_ENGINE_TYPE rmCeEngineType) { @@ -181,7 +182,7 @@ subdeviceCtrlCmdCeGetAllCaps_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); Device *pDevice = GPU_RES_GET_DEVICE(pSubdevice); - ct_assert(NV2080_CTRL_MAX_CES <= sizeof(pCeCapsParams->capsTbl) / sizeof(pCeCapsParams->capsTbl[0])); + ct_assert(NV2080_CTRL_MAX_CES <= NV_ARRAY_ELEMENTS(pCeCapsParams->capsTbl)); if (!RMCFG_FEATURE_PLATFORM_GSP) { diff --git a/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_gh100.c b/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_gh100.c index b69c305cf7..489e3feaaa 100644 --- a/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_gh100.c +++ b/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_gh100.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -71,8 +71,8 @@ confComputeIsGpuCcCapable_GH100 if (confComputeIsDebugModeEnabled_HAL(pGpu, pConfCompute)) { - NV_PRINTF(LEVEL_ERROR, "Cannot boot Confidential Compute as debug board is not supported!\n"); - return NV_FALSE; + NV_PRINTF(LEVEL_ERROR, "Not checking if GPU is capable of accepting conf compute workloads\n"); + return NV_TRUE; } reg = GPU_REG_RD32(pGpu, NV_FUSE_SPARE_BIT_0); @@ -560,11 +560,10 @@ NV_STATUS confComputeUpdateSecrets_GH100(ConfidentialCompute *pConfCompute, { OBJGPU *pGpu = ENG_GET_GPU(pConfCompute); RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); - NvU32 h2dKey, d2hKey; NV2080_CTRL_INTERNAL_CONF_COMPUTE_ROTATE_KEYS_PARAMS params = {0}; - // GSP keys are currently not supported. + // GSP keys are not supported. They are updated without an RPC to GSP-RM. NV_ASSERT(CC_GKEYID_GET_KEYSPACE(globalKeyId) != CC_KEYSPACE_GSP); confComputeGetKeyPairByKey(pConfCompute, globalKeyId, &h2dKey, &d2hKey); @@ -578,12 +577,25 @@ NV_STATUS confComputeUpdateSecrets_GH100(ConfidentialCompute *pConfCompute, ¶ms, sizeof(NV2080_CTRL_INTERNAL_CONF_COMPUTE_ROTATE_KEYS_PARAMS))); + NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreUpdateKey_HAL(pConfCompute, h2dKey)); + NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreUpdateKey_HAL(pConfCompute, d2hKey)); + + // Both SEC2 and LCEs have an encrypt IV mask. + confComputeKeyStoreDepositIvMask_HAL(pConfCompute, h2dKey, ¶ms.updatedEncryptIVMask); + + // Only LCEs have a decrypt IV mask. + if ((CC_GKEYID_GET_KEYSPACE(d2hKey) >= CC_KEYSPACE_LCE0) && + (CC_GKEYID_GET_KEYSPACE(d2hKey) <= CC_KEYSPACE_LCE7)) + { + confComputeKeyStoreDepositIvMask_HAL(pConfCompute, d2hKey, ¶ms.updatedDecryptIVMask); + } + CHANNEL_ITERATOR iterator; KernelChannel *pKernelChannel; - NV_ASSERT_OK_OR_RETURN(confComputeInitChannelIterForKey(pGpu, pConfCompute, globalKeyId, &iterator)); + NV_ASSERT_OK_OR_RETURN(confComputeInitChannelIterForKey(pGpu, pConfCompute, h2dKey, &iterator)); - while (confComputeGetNextChannelForKey(pGpu, pConfCompute, &iterator, globalKeyId, &pKernelChannel) == NV_OK) + while (confComputeGetNextChannelForKey(pGpu, pConfCompute, &iterator, h2dKey, &pKernelChannel) == NV_OK) { NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreRetrieveViaChannel( pConfCompute, pKernelChannel, ROTATE_IV_ALL_VALID, NV_FALSE, &pKernelChannel->clientKmb)); @@ -591,8 +603,8 @@ NV_STATUS confComputeUpdateSecrets_GH100(ConfidentialCompute *pConfCompute, // After key rotation channel counter stays the same but message counter is cleared. pKernelChannel->clientKmb.encryptBundle.iv[0] = 0x00000000; - if ((CC_GKEYID_GET_KEYSPACE(globalKeyId) >= CC_KEYSPACE_LCE0) && - (CC_GKEYID_GET_KEYSPACE(globalKeyId) <= CC_KEYSPACE_LCE7)) + if ((CC_GKEYID_GET_KEYSPACE(d2hKey) >= CC_KEYSPACE_LCE0) && + (CC_GKEYID_GET_KEYSPACE(d2hKey) <= CC_KEYSPACE_LCE7)) { pKernelChannel->clientKmb.decryptBundle.iv[0] = 0x00000000; } diff --git a/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_key_rotation_gh100.c b/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_key_rotation_gh100.c index 3870e5c1b3..fb52703ac0 100644 --- a/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_key_rotation_gh100.c +++ b/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_key_rotation_gh100.c @@ -36,10 +36,8 @@ static void getKeyPairForKeySpace(NvU32 keySpace, NvBool bKernel, NvU32 *pGlobal static NV_STATUS triggerKeyRotationByKeyPair(OBJGPU *pGpu, ConfidentialCompute *pConfCompute, NvU32 h2dKey, NvU32 d2hKey); static NV_STATUS calculateEncryptionStatsByKeyPair(OBJGPU *pGpu, ConfidentialCompute *pConfCompute, NvU32 h2dKey, NvU32 d2hKey); static NV_STATUS notifyKeyRotationByKeyPair(OBJGPU *pGpu, ConfidentialCompute *pConfCompute, NvU32 h2dKey); -static NvBool isLowerThresholdCrossed(ConfidentialCompute *pConfCompute, KEY_ROTATION_STATS_INFO *pH2DInfo, - KEY_ROTATION_STATS_INFO *pD2HInfo); -static NvBool isUpperThresholdCrossed(ConfidentialCompute *pConfCompute, KEY_ROTATION_STATS_INFO *pH2DInfo, - KEY_ROTATION_STATS_INFO *pD2HInfo); +static NvBool isLowerThresholdCrossed(ConfidentialCompute *pConfCompute, NvU32 h2dKey, NvU32 d2hKey); +static NvBool isUpperThresholdCrossed(ConfidentialCompute *pConfCompute, NvU32 h2dKey, NvU32 d2hKey); static NV_STATUS keyRotationTimeoutCallback(OBJGPU *pGpu, OBJTMR *pTmr, TMR_EVENT *pTmrEvent); /*! @@ -60,15 +58,6 @@ confComputeEnableKeyRotationSupport_GH100 pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_CC_FEATURE_ENABLED)) { pConfCompute->setProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED, NV_TRUE); - - // - // TODO: sbellock default values need to be defined and set separately - // for prod flow based on attacker advantage table. - // - pConfCompute->lowerThreshold.totalBytesEncrypted = NV_U64_MAX; - pConfCompute->lowerThreshold.totalEncryptOps = 500; - pConfCompute->upperThreshold.totalBytesEncrypted = NV_U64_MAX; - pConfCompute->upperThreshold.totalEncryptOps = 1000; initKeyRotationRegistryOverrides(pGpu, pConfCompute); } return NV_OK; @@ -122,27 +111,19 @@ confComputeTriggerKeyRotation_GH100 NV_STATUS tempStatus, status = NV_OK; NvU32 globalD2HKey, globalH2DKey, keySpace; - if ((pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_DUMMY_KEY_ROTATION_ENABLED)) && - (pConfCompute->keyRotationChannelRefCount > 0)) - { - pConfCompute->keyRotationCallbackCount++; - NV_PRINTF(LEVEL_ERROR, "DUMMY KR: COUNT = %d\n", pConfCompute->keyRotationCallbackCount); - } for (keySpace = 0; keySpace < CC_KEYSPACE_SIZE; keySpace++) { if (keySpace == CC_KEYSPACE_GSP) continue; - if ((pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_DUMMY_KEY_ROTATION_ENABLED)) && - !(pConfCompute->keyRotationEnableMask & NVBIT(keySpace))) + if (!(pConfCompute->keyRotationEnableMask & NVBIT(keySpace))) { NV_PRINTF(LEVEL_INFO, "Skipping keyspace = %d since mask = 0x%x\n", keySpace, pConfCompute->keyRotationEnableMask); continue; } // calculate kernel channels stats for keyspace - if ((!pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_DUMMY_KEY_ROTATION_ENABLED)) || - (FLD_TEST_DRF(_REG_STR, _RM_CONF_COMPUTE_DUMMY_KEY_ROTATION, _KERNEL_KEYS, _YES, pConfCompute->keyRotationEnableMask))) + if (FLD_TEST_DRF(_REG_STR, _RM_CONF_COMPUTE_DUMMY_KEY_ROTATION, _KERNEL_KEYS, _YES, pConfCompute->keyRotationEnableMask)) { getKeyPairForKeySpace(keySpace, NV_TRUE, &globalH2DKey, &globalD2HKey); tempStatus = triggerKeyRotationByKeyPair(pGpu, pConfCompute, globalH2DKey, globalD2HKey); @@ -155,8 +136,7 @@ confComputeTriggerKeyRotation_GH100 } // calculate user channels stats for keyspace - if ((!pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_DUMMY_KEY_ROTATION_ENABLED)) || - (FLD_TEST_DRF(_REG_STR, _RM_CONF_COMPUTE_DUMMY_KEY_ROTATION, _USER_KEYS, _YES, pConfCompute->keyRotationEnableMask))) + if (FLD_TEST_DRF(_REG_STR, _RM_CONF_COMPUTE_DUMMY_KEY_ROTATION, _USER_KEYS, _YES, pConfCompute->keyRotationEnableMask)) { getKeyPairForKeySpace(keySpace, NV_FALSE, &globalH2DKey, &globalD2HKey); tempStatus = triggerKeyRotationByKeyPair(pGpu, pConfCompute, globalH2DKey, globalD2HKey); @@ -182,27 +162,33 @@ triggerKeyRotationByKeyPair { KEY_ROTATION_STATUS state; NV_ASSERT_OK_OR_RETURN(confComputeGetKeyRotationStatus(pConfCompute, h2dKey, &state)); - CHANNEL_ITERATOR iter = {0}; - KernelChannel *pKernelChannel = NULL; NvU32 h2dIndex, d2hIndex; + NV_ASSERT_OK_OR_RETURN(confComputeGetKeySlotFromGlobalKeyId(pConfCompute, h2dKey, &h2dIndex)); + NV_ASSERT_OK_OR_RETURN(confComputeGetKeySlotFromGlobalKeyId(pConfCompute, d2hKey, &d2hIndex)); + // we won't need this once we have encryption statistics since unused keys will have stats = 0 if (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_DUMMY_KEY_ROTATION_ENABLED)) { + CHANNEL_ITERATOR iter = {0}; + KernelChannel *pKernelChannel = NULL; NV_ASSERT_OK_OR_RETURN(confComputeInitChannelIterForKey(pGpu, pConfCompute, h2dKey, &iter)); + // + // If there are no channels alive on a key then reset its dummy KR counter and bail out. + // Else increment its dummy KR counter and continue. + // if (confComputeGetNextChannelForKey(pGpu, pConfCompute, &iter, h2dKey, &pKernelChannel) != NV_OK) { - // - // If this is the last key and we haven't done KR yet even after crossing upper threshold then - // it means there are no channels alive and we need to manually reset our counter - // - if ((h2dKey == CC_GKEYID_GEN(CC_KEYSPACE_LCE7, CC_LKEYID_LCE_H2D_USER)) && - (pConfCompute->keyRotationCallbackCount > pConfCompute->upperThreshold.totalEncryptOps)) - { - pConfCompute->keyRotationCallbackCount = 1; - } + pConfCompute->keyRotationCallbackCount[h2dIndex] = 1; + pConfCompute->keyRotationCallbackCount[d2hIndex] = 1; return NV_OK; } + else + { + pConfCompute->keyRotationCallbackCount[h2dIndex]++; + pConfCompute->keyRotationCallbackCount[d2hIndex]++; + NV_PRINTF(LEVEL_ERROR, "DUMMY KR: COUNT = %d for key 0x%x\n", pConfCompute->keyRotationCallbackCount[h2dIndex], h2dKey); + } } // @@ -224,18 +210,13 @@ triggerKeyRotationByKeyPair NV_ASSERT_OK_OR_RETURN(calculateEncryptionStatsByKeyPair(pGpu, pConfCompute, h2dKey, d2hKey)); - NV_ASSERT_OK_OR_RETURN(confComputeGetKeySlotFromGlobalKeyId(pConfCompute, h2dKey, &h2dIndex)); - NV_ASSERT_OK_OR_RETURN(confComputeGetKeySlotFromGlobalKeyId(pConfCompute, d2hKey, &d2hIndex)); - - if (isUpperThresholdCrossed(pConfCompute, &pConfCompute->aggregateStats[h2dIndex], - &pConfCompute->aggregateStats[d2hIndex])) + if (isUpperThresholdCrossed(pConfCompute, h2dKey, d2hKey)) { NV_PRINTF(LEVEL_ERROR, "Crossed UPPER threshold for key = 0x%x\n", h2dKey); NV_ASSERT_OK_OR_RETURN(confComputeSetKeyRotationStatus(pConfCompute, h2dKey, KEY_ROTATION_STATUS_FAILED_THRESHOLD)); - NV_ASSERT_OK_OR_RETURN(confComputeScheduleKeyRotationWorkItem(pGpu, pConfCompute, h2dKey, d2hKey)); + NV_ASSERT_OK_OR_RETURN(confComputePerformKeyRotation(pGpu, pConfCompute, h2dKey, d2hKey, NV_TRUE)); } - else if (isLowerThresholdCrossed(pConfCompute, &pConfCompute->aggregateStats[h2dIndex], - &pConfCompute->aggregateStats[d2hIndex])) + else if (isLowerThresholdCrossed(pConfCompute, h2dKey, d2hKey)) { NV_PRINTF(LEVEL_INFO, "Crossed LOWER threshold for key = 0x%x\n", h2dKey); if (state == KEY_ROTATION_STATUS_IDLE) @@ -258,11 +239,13 @@ triggerKeyRotationByKeyPair keyRotationTimeoutCallback, (void*)pH2DKey, TMR_FLAGS_NONE)); } - // - // Schedule first callback. - // TODO sbellock: don't use hardcoded 12.5 sec vaule - // - NV_ASSERT_OK_OR_RETURN(tmrEventScheduleRelSec(pTmr, pConfCompute->ppKeyRotationTimer[h2dIndex], 12.5)); + // Schedule first callback. Timeouts are not enforced on kernel channels (UVM). + if (!confComputeGlobalKeyIsKernelPriv_HAL(pConfCompute, h2dKey)) + { + NV_ASSERT_OK_OR_RETURN(tmrEventScheduleRelSec(pTmr, + pConfCompute->ppKeyRotationTimer[h2dIndex], + pConfCompute->keyRotationTimeout)); + } // // Notify clients of pending KR @@ -271,6 +254,19 @@ triggerKeyRotationByKeyPair // NV_ASSERT_OK_OR_RETURN(notifyKeyRotationByKeyPair(pGpu, pConfCompute, h2dKey)); } + + // + // There can be a scenario where last channel on key gets freed without lower threshold being + // crossed but when encrypt stats are computed in the next callback lower threshold is crossed here. + // In this case, schedule key rotation. + // + CHANNEL_ITERATOR iter = {0}; + KernelChannel *pKernelChannel = NULL; + NV_ASSERT_OK_OR_RETURN(confComputeInitChannelIterForKey(pGpu, pConfCompute, h2dKey, &iter)); + if (confComputeGetNextChannelForKey(pGpu, pConfCompute, &iter, h2dKey, &pKernelChannel) != NV_OK) + { + NV_ASSERT_OK_OR_RETURN(confComputePerformKeyRotation(pGpu, pConfCompute, h2dKey, d2hKey, NV_TRUE)); + } } return NV_OK; } @@ -288,7 +284,7 @@ keyRotationTimeoutCallback NvU32 key = *(NvU32*)pEvent->pUserData; confComputeGetKeyPairByKey(pConfCompute, key, &h2dKey, &d2hKey); NV_ASSERT_OK_OR_RETURN(confComputeSetKeyRotationStatus(pConfCompute, h2dKey, KEY_ROTATION_STATUS_FAILED_TIMEOUT)); - return confComputeScheduleKeyRotationWorkItem(pGpu, pConfCompute, h2dKey, d2hKey); + return confComputePerformKeyRotation(pGpu, pConfCompute, h2dKey, d2hKey, NV_TRUE); } static NV_STATUS @@ -355,8 +351,8 @@ calculateEncryptionStatsByKeyPair { NV_PRINTF(LEVEL_INFO, "Aggregate stats for h2dKey 0x%x and d2hKey 0x%x\n", h2dKey, d2hKey); NV_PRINTF(LEVEL_INFO, "Total h2d bytes encrypted = 0x%llx\n", pConfCompute->aggregateStats[h2dIndex].totalBytesEncrypted); - NV_PRINTF(LEVEL_INFO, "Total d2h bytes encrypted = 0x%llx\n", pConfCompute->aggregateStats[h2dIndex].totalEncryptOps); - NV_PRINTF(LEVEL_INFO, "Total h2d encrypt ops = 0x%llx\n", pConfCompute->aggregateStats[d2hIndex].totalBytesEncrypted); + NV_PRINTF(LEVEL_INFO, "Total d2h bytes encrypted = 0x%llx\n", pConfCompute->aggregateStats[d2hIndex].totalBytesEncrypted); + NV_PRINTF(LEVEL_INFO, "Total h2d encrypt ops = 0x%llx\n", pConfCompute->aggregateStats[h2dIndex].totalEncryptOps); NV_PRINTF(LEVEL_INFO, "Total d2h encrypt ops = 0x%llx\n", pConfCompute->aggregateStats[d2hIndex].totalEncryptOps); } return NV_OK; @@ -366,18 +362,21 @@ static NvBool isUpperThresholdCrossed ( ConfidentialCompute *pConfCompute, - KEY_ROTATION_STATS_INFO *pH2DInfo, - KEY_ROTATION_STATS_INFO *pD2HInfo + NvU32 h2dKey, + NvU32 d2hKey ) { + NvU32 h2dIndex, d2hIndex; + NV_ASSERT_OK_OR_RETURN(confComputeGetKeySlotFromGlobalKeyId(pConfCompute, h2dKey, &h2dIndex)); + NV_ASSERT_OK_OR_RETURN(confComputeGetKeySlotFromGlobalKeyId(pConfCompute, d2hKey, &d2hIndex)); if (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_DUMMY_KEY_ROTATION_ENABLED)) { - return (pConfCompute->keyRotationCallbackCount > pConfCompute->upperThreshold.totalEncryptOps); + return (pConfCompute->keyRotationCallbackCount[h2dIndex] > pConfCompute->upperThreshold.totalEncryptOps); } else { - return (confComputeIsUpperThresholdCrossed(pConfCompute, pH2DInfo) || - confComputeIsUpperThresholdCrossed(pConfCompute, pD2HInfo)); + return (confComputeIsUpperThresholdCrossed(pConfCompute, &pConfCompute->aggregateStats[h2dIndex]) || + confComputeIsUpperThresholdCrossed(pConfCompute, &pConfCompute->aggregateStats[d2hIndex])); } } @@ -385,18 +384,21 @@ static NvBool isLowerThresholdCrossed ( ConfidentialCompute *pConfCompute, - KEY_ROTATION_STATS_INFO *pH2DInfo, - KEY_ROTATION_STATS_INFO *pD2HInfo + NvU32 h2dKey, + NvU32 d2hKey ) { + NvU32 h2dIndex, d2hIndex; + NV_ASSERT_OK_OR_RETURN(confComputeGetKeySlotFromGlobalKeyId(pConfCompute, h2dKey, &h2dIndex)); + NV_ASSERT_OK_OR_RETURN(confComputeGetKeySlotFromGlobalKeyId(pConfCompute, d2hKey, &d2hIndex)); if (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_DUMMY_KEY_ROTATION_ENABLED)) { - return (pConfCompute->keyRotationCallbackCount > pConfCompute->lowerThreshold.totalEncryptOps); + return (pConfCompute->keyRotationCallbackCount[h2dIndex] > pConfCompute->lowerThreshold.totalEncryptOps); } else { - return (confComputeIsLowerThresholdCrossed(pConfCompute, pH2DInfo) || - confComputeIsLowerThresholdCrossed(pConfCompute, pD2HInfo)); + return (confComputeIsLowerThresholdCrossed(pConfCompute, &pConfCompute->aggregateStats[h2dIndex]) || + confComputeIsLowerThresholdCrossed(pConfCompute, &pConfCompute->aggregateStats[d2hIndex])); } } @@ -445,7 +447,6 @@ notifyKeyRotationByKeyPair KEY_ROTATION_STATUS status; CHANNEL_ITERATOR iter = {0}; KernelChannel *pKernelChannel = NULL; - NvU32 notifyStatus = 0; NV_ASSERT_OK_OR_RETURN(confComputeGetKeyRotationStatus(pConfCompute, h2dKey, &status)); // // We expect this work item to be called soon after RM detects lower threshold is @@ -457,16 +458,10 @@ notifyKeyRotationByKeyPair NV_ASSERT_OK_OR_RETURN(confComputeInitChannelIterForKey(pGpu, pConfCompute, h2dKey, &iter)); while(confComputeGetNextChannelForKey(pGpu, pConfCompute, &iter, h2dKey, &pKernelChannel) == NV_OK) { - // update notifier memory - notifyStatus = - FLD_SET_DRF(_CHANNELGPFIFO, _NOTIFICATION_STATUS, _IN_PROGRESS, _TRUE, notifyStatus); - - notifyStatus = - FLD_SET_DRF_NUM(_CHANNELGPFIFO, _NOTIFICATION_STATUS, _VALUE, status, notifyStatus); - NV_ASSERT_OK_OR_RETURN(kchannelUpdateNotifierMem(pKernelChannel, NV_CHANNELGPFIFO_NOTIFICATION_TYPE_KEY_ROTATION_STATUS, - 0, 0, notifyStatus)); - NV_PRINTF(LEVEL_INFO, "chid 0x%x has pending key rotation, writing notifier with val 0x%x\n", kchannelGetDebugTag(pKernelChannel), (NvU32)notifyStatus); + 0, 0, (NvU32)status)); + NV_PRINTF(LEVEL_INFO, "chid 0x%x has pending key rotation, writing notifier with val 0x%x\n", + kchannelGetDebugTag(pKernelChannel), (NvU32)status); // send events to clients if registered kchannelNotifyEvent(pKernelChannel, NVC86F_NOTIFIERS_KEY_ROTATION, 0, status, NULL, 0); @@ -481,33 +476,91 @@ initKeyRotationRegistryOverrides ConfidentialCompute *pConfCompute ) { - // - // Temp CONFCOMP-984: This will be removed once all RM clients support - // key rotation by default. - // if (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED)) { NvU32 data; - if (osReadRegistryDword(pGpu, NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION, &data) == NV_OK) + + if (osReadRegistryDword(pGpu, NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_THRESHOLD_DELTA, &data) == NV_OK) { - if (FLD_TEST_DRF(_REG_STR, _RM_CONF_COMPUTE_DUMMY_KEY_ROTATION, _ENABLED, _YES, data)) + if (data == 0) { - NV_PRINTF(LEVEL_INFO, "Confidential Compute dummy key rotation enabled via regkey override.\n"); - pConfCompute->setProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_DUMMY_KEY_ROTATION_ENABLED, NV_TRUE); + NV_PRINTF(LEVEL_ERROR, "Illegal value for RmKeyRotationThresholdDelta.\n"); + NV_PRINTF(LEVEL_ERROR, "Cancelling override of threshold delta.\n"); } - else if (FLD_TEST_DRF(_REG_STR, _RM_CONF_COMPUTE_DUMMY_KEY_ROTATION, _ENABLED, _NO, data)) + else { - NV_PRINTF(LEVEL_INFO, "Confidential Compute dummy key rotation disabled via regkey override.\n"); - pConfCompute->setProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_DUMMY_KEY_ROTATION_ENABLED, NV_FALSE); + NV_PRINTF(LEVEL_INFO, "Setting key rotation threshold delta to %u.\n", data); + pConfCompute->keyRotationLimitDelta = data; + NV_ASSERT_OK(confComputeSetKeyRotationThreshold(pConfCompute, pConfCompute->attackerAdvantage)); + } + } + else if (osReadRegistryDword(pGpu, NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_LOWER_THRESHOLD, &data) == NV_OK) + { + const NvU32 lowerThreshold = data; + + if (osReadRegistryDword(pGpu, NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_UPPER_THRESHOLD, &data) == NV_OK) + { + const NvU32 upperThreshold = data; + + if (upperThreshold > lowerThreshold) + { + NV_PRINTF(LEVEL_INFO, "Setting key rotation lower threshold to %u and upper threshold to %u.\n", + lowerThreshold, upperThreshold); + pConfCompute->keyRotationUpperLimit = upperThreshold; + pConfCompute->keyRotationLowerLimit = lowerThreshold; + } + else + { + NV_PRINTF(LEVEL_ERROR, "RmKeyRotationUpperThreshold must be greater than RmKeyRotationLowerThreshold.\n"); + NV_PRINTF(LEVEL_ERROR, "Cancelling override of upper and lower key rotation thresholds.\n"); + } + } + else + { + NV_PRINTF(LEVEL_ERROR, "RmKeyRotationUpperThreshold must be set if RmKeyRotationLowerThreshold is set.\n"); + NV_PRINTF(LEVEL_ERROR, "Cancelling override of upper and lower key rotation thresholds.\n"); + } + } + + if (osReadRegistryDword(pGpu, NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_TIMEOUT_IN_SEC, &data) == NV_OK) + { + const NvU32 minTimeout = 2; + + if (data >= minTimeout) + { + NV_PRINTF(LEVEL_INFO, "Setting key rotation user-mode timeout to %u seconds.\n", data); + pConfCompute->keyRotationTimeout = data; + } + else + { + NV_PRINTF(LEVEL_ERROR, "Key rotation user-mode timeout must be greater than or equal to %u.\n", minTimeout); + NV_PRINTF(LEVEL_ERROR, "Cancelling override of user-mode timeout.\n"); } - if (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_DUMMY_KEY_ROTATION_ENABLED)) + } + + if (osReadRegistryDword(pGpu, NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION, &data) == NV_OK) + { + if (FLD_TEST_DRF(_REG_STR, _RM_CONF_COMPUTE_KEY_ROTATION, _ENABLED, _YES, data)) { + NV_PRINTF(LEVEL_INFO, "Confidential Compute key rotation enabled via regkey override.\n"); + pConfCompute->setProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_ENABLED, NV_TRUE); + pConfCompute->keyRotationEnableMask = data; + } + else + { + NV_PRINTF(LEVEL_INFO, "Confidential Compute key rotation disabled via regkey override.\n"); + pConfCompute->setProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_ENABLED, NV_FALSE); + pConfCompute->setProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED, NV_FALSE); + } + } + else if (osReadRegistryDword(pGpu, NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION, &data) == NV_OK) + { + if (FLD_TEST_DRF(_REG_STR, _RM_CONF_COMPUTE_DUMMY_KEY_ROTATION, _ENABLED, _YES, data)) + { + NV_PRINTF(LEVEL_INFO, "Confidential Compute dummy key rotation enabled via regkey override.\n"); + pConfCompute->setProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_DUMMY_KEY_ROTATION_ENABLED, NV_TRUE); pConfCompute->keyRotationEnableMask = data; - // - // Set lower and upper thresholds to default values - // this will go away once we stop supporting dummy KR - // pConfCompute->lowerThreshold.totalBytesEncrypted = NV_U64_MAX; pConfCompute->lowerThreshold.totalEncryptOps = KEY_ROTATION_LOWER_THRESHOLD; pConfCompute->upperThreshold.totalBytesEncrypted = NV_U64_MAX; @@ -523,6 +576,19 @@ initKeyRotationRegistryOverrides pConfCompute->upperThreshold.totalEncryptOps = data; } } + else + { + NV_PRINTF(LEVEL_INFO, "Confidential Compute dummy key rotation disabled via regkey override.\n"); + pConfCompute->setProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_DUMMY_KEY_ROTATION_ENABLED, NV_FALSE); + pConfCompute->setProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED, NV_FALSE); + } + } + else + { + NV_PRINTF(LEVEL_INFO, "Confidential Compute key rotation (dummy and production) are disabled.\n"); + pConfCompute->setProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_ENABLED, NV_FALSE); + pConfCompute->setProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_DUMMY_KEY_ROTATION_ENABLED, NV_FALSE); + pConfCompute->setProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED, NV_FALSE); } } } \ No newline at end of file diff --git a/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_keystore_gh100.c b/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_keystore_gh100.c index 8eb46260c9..42109c89f8 100644 --- a/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_keystore_gh100.c +++ b/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_keystore_gh100.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -353,12 +353,12 @@ confComputeKeyStoreRetrieveViaKeyId_GH100 } else { - portMemCopy(keyMaterialBundle->encryptBundle.key, - sizeof(keyMaterialBundle->encryptBundle.key), + portMemCopy(keyMaterialBundle->decryptBundle.key, + sizeof(keyMaterialBundle->decryptBundle.key), (*pKeyStore)[slotNumber + 1].cryptBundle.key, sizeof((*pKeyStore)[slotNumber + 1].cryptBundle.key)); - portMemCopy(keyMaterialBundle->encryptBundle.ivMask, - sizeof(keyMaterialBundle->encryptBundle.ivMask), + portMemCopy(keyMaterialBundle->decryptBundle.ivMask, + sizeof(keyMaterialBundle->decryptBundle.ivMask), (*pKeyStore)[slotNumber + 1].cryptBundle.ivMask, sizeof((*pKeyStore)[slotNumber + 1].cryptBundle.ivMask)); } @@ -420,7 +420,7 @@ confComputeKeyStoreUpdateKey_GH100(ConfidentialCompute *pConfCompute, NvU32 glob (const uint8_t *)(CC_GKEYID_GET_STR(globalKeyId)), (size_t)portStringLength(CC_GKEYID_GET_STR(globalKeyId)), pKey, - keySize)); + keySize)) { return NV_ERR_FATAL_ERROR; } diff --git a/src/nvidia/src/kernel/gpu/conf_compute/ccsl.c b/src/nvidia/src/kernel/gpu/conf_compute/ccsl.c index 9a4c4a4118..1d2f73fb87 100644 --- a/src/nvidia/src/kernel/gpu/conf_compute/ccsl.c +++ b/src/nvidia/src/kernel/gpu/conf_compute/ccsl.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -185,6 +185,32 @@ static OBJGPU *getGpuViaChannelHandle(NvHandle hClient, NvHandle hChannel) return GPU_RES_GET_GPU(pKernelChannel); } +static KernelChannel *getKernelChannelViaChannelHandle(NvHandle hClient, NvHandle hChannel) +{ + RsClient *pChannelClient; + KernelChannel *pKernelChannel; + + if (serverGetClientUnderLock(&g_resServ, hClient, &pChannelClient) != NV_OK) + { + return NULL; + } + + if (CliGetKernelChannel(pChannelClient, hChannel, &pKernelChannel) != NV_OK) + { + return NULL; + } + + return pKernelChannel; +} + +static void openrmCtxFree(void *openrmCtx) +{ + if (openrmCtx != NULL) + { + libspdm_aead_free(openrmCtx); + } +} + NV_STATUS ccslContextInitViaChannel_IMPL ( @@ -193,12 +219,13 @@ ccslContextInitViaChannel_IMPL NvHandle hChannel ) { - CC_KMB *kmb; - OBJSYS *pSys = SYS_GET_INSTANCE(); - OBJGPUMGR *pGpuMgr = SYS_GET_GPUMGR(pSys); - OBJGPU *pGpu; - RM_API *pRmApi = NULL; - NV_STATUS status; + OBJSYS *pSys = SYS_GET_INSTANCE(); + OBJGPUMGR *pGpuMgr = SYS_GET_GPUMGR(pSys); + OBJGPU *pGpu; + RM_API *pRmApi = NULL; + KernelChannel *pKernelChannel; + NV_STATUS status; + MEMORY_DESCRIPTOR *pMemDesc = NULL; NVC56F_CTRL_CMD_GET_KMB_PARAMS getKmbParams; @@ -208,7 +235,6 @@ ccslContextInitViaChannel_IMPL { return NV_ERR_NOT_SUPPORTED; } - if (ppCtx == NULL) { return NV_ERR_INVALID_ARGUMENT; @@ -220,17 +246,25 @@ ccslContextInitViaChannel_IMPL return NV_ERR_INVALID_CHANNEL; } + pKernelChannel = getKernelChannelViaChannelHandle(hClient, hChannel); + if (pKernelChannel == NULL) + { + return NV_ERR_INVALID_CHANNEL; + } + pCcslContext pCtx = portMemAllocNonPaged(sizeof(*pCtx)); if (pCtx == NULL) { - return NV_ERR_NO_MEMORY; + status = NV_ERR_NO_MEMORY; + goto ccslContextInitViaChannelCleanup; } *ppCtx = pCtx; + pCtx->openrmCtx = NULL; if (!libspdm_aead_gcm_prealloc(&pCtx->openrmCtx)) { - portMemFree(pCtx); - return NV_ERR_NO_MEMORY; + status = NV_ERR_NO_MEMORY; + goto ccslContextInitViaChannelCleanup; } pCtx->hClient = hClient; @@ -256,20 +290,36 @@ ccslContextInitViaChannel_IMPL status = pRmApi->Control(pRmApi, hClient, hChannel, NVC56F_CTRL_CMD_GET_KMB, &getKmbParams, sizeof(getKmbParams)); - if (status != NV_OK) - { - libspdm_aead_free(pCtx->openrmCtx); - portMemFree(pCtx); - return status; - } + NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, status, ccslContextInitViaChannelCleanup); + writeKmbToContext(pCtx, &getKmbParams.kmb); - pCtx->msgCounterSize = CSL_MSG_CTR_32; + status = memdescCreate(&pMemDesc, pGpu, sizeof(CC_CRYPTOBUNDLE_STATS), sizeof(NvU64), NV_TRUE, + ADDR_SYSMEM, NV_MEMORY_UNCACHED, MEMDESC_FLAGS_NONE); + NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, status, ccslContextInitViaChannelCleanup); + + status = memdescAlloc(pMemDesc); + NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, status, ccslContextInitViaChannelmemdescDestroy); - kmb = &getKmbParams.kmb; + status = kchannelSetEncryptionStatsBuffer(pGpu, pKernelChannel, pMemDesc, NV_TRUE); + NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, status, ccslContextInitViaChannelmemdescFree); - writeKmbToContext(pCtx, kmb); + pCtx->pEncStatsBuffer = pKernelChannel->pEncStatsBuf; + pCtx->pMemDesc = pMemDesc; + pCtx->msgCounterSize = CSL_MSG_CTR_32; return NV_OK; + +ccslContextInitViaChannelmemdescFree: + memdescFree(pMemDesc); + +ccslContextInitViaChannelmemdescDestroy: + memdescDestroy(pMemDesc); + +ccslContextInitViaChannelCleanup: + openrmCtxFree(pCtx->openrmCtx); + portMemFree(pCtx); + + return status; } NV_STATUS @@ -285,7 +335,7 @@ ccslContextInitViaKeyId_KERNEL OBJSYS *pSys = SYS_GET_INSTANCE(); OBJGPUMGR *pGpuMgr = SYS_GET_GPUMGR(pSys); - NV_PRINTF(LEVEL_INFO, "Initializing CCSL context via globak key ID.\n"); + NV_PRINTF(LEVEL_INFO, "Initializing CCSL context via global key ID.\n"); // This function must be redesigned for multi-gpu if(!pGpuMgr->ccCaps.bHccFeatureCapable) @@ -317,13 +367,15 @@ ccslContextInitViaKeyId_KERNEL &kmb); if (status != NV_OK) { - libspdm_aead_free(pCtx->openrmCtx); + openrmCtxFree(pCtx->openrmCtx); portMemFree(pCtx); return status; } // For now assume any call to this function uses a 64-bit message counter. pCtx->msgCounterSize = CSL_MSG_CTR_64; + pCtx->pEncStatsBuffer = NULL; + pCtx->pMemDesc = NULL; writeKmbToContext(pCtx, &kmb); return NV_OK; @@ -342,14 +394,71 @@ ccslContextClear_IMPL return; } - libspdm_aead_free(pCtx->openrmCtx); + openrmCtxFree(pCtx->openrmCtx); + memdescFree(pCtx->pMemDesc); + memdescDestroy(pCtx->pMemDesc); portMemFree(pCtx); } NV_STATUS ccslContextUpdate_KERNEL(pCcslContext pCtx) { - return NV_ERR_NOT_SUPPORTED; + OBJGPU *pGpu; + RM_API *pRmApi = NULL; + NV_STATUS status = NV_OK; + + NVC56F_CTRL_CMD_GET_KMB_PARAMS getKmbParams; + + NV_PRINTF(LEVEL_INFO, "Updating the CCSL context.\n"); + + if (pCtx == NULL) + { + return NV_ERR_INVALID_ARGUMENT; + } + + if (!isChannel(pCtx)) + { + return NV_ERR_INVALID_ARGUMENT; + } + + pGpu = getGpuViaChannelHandle(pCtx->hClient, pCtx->hChannel); + + if (pGpu == NULL) + { + return NV_ERR_INVALID_CHANNEL; + } + + if (IS_GSP_CLIENT(pGpu)) + { + if (rmGpuLockIsOwner()) + { + pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); + } + else + { + pRmApi = rmapiGetInterface(RMAPI_EXTERNAL_KERNEL); + } + } + else + { + pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + } + + portMemSet(&getKmbParams, 0, sizeof(getKmbParams)); + status = pRmApi->Control(pRmApi, pCtx->hClient, pCtx->hChannel, + NVC56F_CTRL_CMD_GET_KMB, &getKmbParams, + sizeof(getKmbParams)); + if (status != NV_OK) + { + portMemSet(&getKmbParams, 0, sizeof(getKmbParams)); + + return status; + } + + writeKmbToContext(pCtx, &getKmbParams.kmb); + portMemSet(&getKmbParams, 0, sizeof(getKmbParams)); + + return NV_OK; } NV_STATUS @@ -525,6 +634,12 @@ ccslEncryptWithIv_IMPL return NV_ERR_GENERIC; } + if (isChannel(pCtx)) + { + pCtx->pEncStatsBuffer->numEncryptionsH2D++; + pCtx->pEncStatsBuffer->bytesEncryptedH2D += bufferSize; + } + return NV_OK; } @@ -572,6 +687,12 @@ ccslEncrypt_KERNEL return NV_ERR_GENERIC; } + if (isChannel(pCtx)) + { + pCtx->pEncStatsBuffer->numEncryptionsH2D++; + pCtx->pEncStatsBuffer->bytesEncryptedH2D += bufferSize; + } + return NV_OK; } @@ -841,5 +962,24 @@ ccslLogDeviceEncryption_IMPL NvU32 bufferSize ) { - return NV_ERR_NOT_SUPPORTED; + NV_STATUS status; + NvU64 messageNum; + + status = ccslQueryMessagePool(pCtx, CCSL_DIR_DEVICE_TO_HOST, &messageNum); + if (status != NV_OK) + { + return status; + } + else if (messageNum == 0) + { + return NV_ERR_INSUFFICIENT_RESOURCES; + } + + if (isChannel(pCtx)) + { + pCtx->pEncStatsBuffer->numEncryptionsD2H++; + pCtx->pEncStatsBuffer->bytesEncryptedD2H += bufferSize; + } + + return NV_OK; } diff --git a/src/nvidia/src/kernel/gpu/conf_compute/conf_compute.c b/src/nvidia/src/kernel/gpu/conf_compute/conf_compute.c index 40c7a07b2a..aa3304b67a 100644 --- a/src/nvidia/src/kernel/gpu/conf_compute/conf_compute.c +++ b/src/nvidia/src/kernel/gpu/conf_compute/conf_compute.c @@ -43,6 +43,7 @@ #include "kernel/gpu/fifo/kernel_channel.h" #include "gpu/conf_compute/conf_compute_api.h" #include "class/clcb33.h" +#include "spdm/rmspdmvendordef.h" /*! * Local object related functions @@ -51,6 +52,7 @@ static NV_STATUS _confComputeInitRegistryOverrides(OBJGPU *, ConfidentialCompute static NvU32 _confComputeGetKeyspaceSize(NvU16 keyspace); #define KEY_ROTATION_THRESHOLD_DELTA 20000000ull +#define KEY_ROTATION_TIMEOUT 10 NV_STATUS confComputeConstructEngine_IMPL(OBJGPU *pGpu, @@ -64,7 +66,6 @@ confComputeConstructEngine_IMPL(OBJGPU *pGpu, pConfCompute->pSpdm = NULL; pConfCompute->pGspHeartbeatTimer = NULL; - pConfCompute->heartbeatPeriodSec = 0; portMemSet(&pConfCompute->ccStaticInfo, 0, sizeof(pConfCompute->ccStaticInfo)); pConfCompute->gspProxyRegkeys = 0; @@ -148,6 +149,12 @@ confComputeConstructEngine_IMPL(OBJGPU *pGpu, if ((osReadRegistryDword(pGpu, NV_REG_STR_RM_CC_MULTI_GPU_MODE, &data) == NV_OK) && (data == NV_REG_STR_RM_CC_MULTI_GPU_MODE_PROTECTED_PCIE)) { + if (!pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_DEVTOOLS_MODE_ENABLED)) + { + NV_PRINTF(LEVEL_ERROR, "Protected PCIe mode needs devtools mode to be enabled!\n"); + NV_ASSERT(0); + return NV_ERR_INVALID_STATE; + } NV_PRINTF(LEVEL_INFO, "Enabling protected PCIe\n"); pConfCompute->setProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_MULTI_GPU_PROTECTED_PCIE_MODE_ENABLED, NV_TRUE); @@ -158,6 +165,7 @@ confComputeConstructEngine_IMPL(OBJGPU *pGpu, // init key rotation state pConfCompute->attackerAdvantage = SECURITY_POLICY_ATTACKER_ADVANTAGE_DEFAULT; pConfCompute->keyRotationLimitDelta = KEY_ROTATION_THRESHOLD_DELTA; + pConfCompute->keyRotationTimeout = KEY_ROTATION_TIMEOUT; NV_ASSERT_OK_OR_RETURN(confComputeSetKeyRotationThreshold(pConfCompute, pConfCompute->attackerAdvantage)); @@ -165,11 +173,10 @@ confComputeConstructEngine_IMPL(OBJGPU *pGpu, { pConfCompute->keyRotationState[i] = KEY_ROTATION_STATUS_IDLE; pConfCompute->ppKeyRotationTimer[i] = NULL; + pConfCompute->keyRotationCallbackCount[i] = 0; } portMemSet(pConfCompute->aggregateStats, 0, sizeof(pConfCompute->aggregateStats)); portMemSet(pConfCompute->freedChannelAggregateStats, 0, sizeof(pConfCompute->freedChannelAggregateStats)); - pConfCompute->keyRotationCallbackCount = 0; - pConfCompute->keyRotationChannelRefCount = 0; pConfCompute->keyRotationEnableMask = 0; NV_ASSERT_OK_OR_RETURN(confComputeEnableKeyRotationSupport_HAL(pGpu, pConfCompute)); @@ -203,14 +210,6 @@ _confComputeInitRegistryOverrides pConfCompute->setProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_GPUS_READY_CHECK_ENABLED, NV_FALSE); } - if ((osReadRegistryDword(pGpu, NV_REG_STR_RM_CONF_COMPUTE_EARLY_INIT, &data) - == NV_OK) && (data == NV_REG_STR_RM_CONF_COMPUTE_EARLY_INIT_ENABLED)) - { - NV_PRINTF(LEVEL_INFO, "Confidential Compute early init enabled via regkey override.\n"); - pConfCompute->setProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_ENABLE_EARLY_INIT, NV_TRUE); - pConfCompute->gspProxyRegkeys |= DRF_DEF(GSP, _PROXY_REG, _CONF_COMPUTE_EARLY_INIT, _ENABLE); - } - if (FLD_TEST_DRF(_REG_STR, _RM_CONFIDENTIAL_COMPUTE, _DEV_MODE_ENABLED, _YES, data)) { NV_PRINTF(LEVEL_INFO, "Confidential Compute dev mode enabled via regkey override.\n"); @@ -258,6 +257,32 @@ _confComputeInitRegistryOverrides NV_PRINTF(LEVEL_ERROR, "SPDM child object creation failed! Status:0x%x\n", status); return status; } + if (osReadRegistryDword(pGpu, NV_REG_STR_RM_CONF_COMPUTE_HEARTBEAT, &data) == NV_OK) + { + pConfCompute->heartbeatPeriodSec = + DRF_VAL(_REG_STR, _RM_CONF_COMPUTE_HEARTBEAT_PERIOD, _SECONDS, data); + if (FLD_TEST_DRF(_REG_STR, _RM_CONF_COMPUTE_HEARTBEAT_PERIOD, _SECONDS, _DISABLE, data)) + { + NV_PRINTF(LEVEL_ERROR, "SPDM heartbeat disabled via regkey!\n"); + } + else if (pConfCompute->heartbeatPeriodSec < NV_REG_STR_RM_CONF_COMPUTE_HEARTBEAT_PERIOD_SECONDS_MIN || + pConfCompute->heartbeatPeriodSec > NV_REG_STR_RM_CONF_COMPUTE_HEARTBEAT_PERIOD_SECONDS_MAX) + { + // Check for overflow or underflow. + NV_PRINTF(LEVEL_ERROR, "Suggested heartbeat period is invalid. Falling back to default 4 sec.\n"); + pConfCompute->heartbeatPeriodSec = SPDM_DEFAULT_HEARTBEAT_PERIOD_IN_SEC; + } + else + { + NV_PRINTF(LEVEL_ERROR, "Overriding default heartbeat period to 0x%x sec\n", + pConfCompute->heartbeatPeriodSec); + } + } + else + { + // Heartbeat is disabled by default. + pConfCompute->heartbeatPeriodSec = 0; + } } } @@ -476,7 +501,9 @@ confComputeStatePostLoad_IMPL } } - if (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED)) + if (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED) && + (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_ENABLED) || + pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_DUMMY_KEY_ROTATION_ENABLED))) { status = confComputeEnableKeyRotationCallback_HAL(pGpu, pConfCompute, NV_TRUE); if (status != NV_OK) @@ -506,7 +533,9 @@ confComputeStatePreUnload_KERNEL { NV_STATUS status = NV_OK; NV_STATUS tempStatus = NV_OK; - if (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED)) + if (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED) && + (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_ENABLED) || + pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_DUMMY_KEY_ROTATION_ENABLED))) { OBJTMR *pTmr = GPU_GET_TIMER(pGpu); for (NvU32 i = 0; i < CC_KEYSPACE_TOTAL_SIZE; i++) @@ -525,6 +554,7 @@ confComputeStatePreUnload_KERNEL status = tempStatus; } } + if (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_SPDM_ENABLED)) { if (IS_GSP_CLIENT(pGpu) && (pConfCompute->heartbeatPeriodSec != 0)) @@ -588,53 +618,6 @@ confComputeStateInitLocked_IMPL return NV_OK; } -/*! - * Sets fatal error state in ConfCompute session by setting GPU ready - * state to false and invalidating the SPDM session. - * - * @param[in] pGpu : OBJGPU Pointer - * @param[in] pConfCompute : ConfidentialCompute pointer - */ -void -confComputeSetErrorState_KERNEL -( - OBJGPU *pGpu, - ConfidentialCompute *pConfCompute -) -{ - OBJSYS *pSys = SYS_GET_INSTANCE(); - OBJGPUMGR *pGpuMgr = SYS_GET_GPUMGR(pSys); - NV_STATUS status = NV_OK; - RM_API *pRmApi = NULL; - NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_SET_GPU_STATE_PARAMS params = {0}; - - NV_PRINTF(LEVEL_ERROR, "ConfCompute: Fatal error hit!\n"); - - // Set ready state to false - pConfCompute->bAcceptClientRequest = NV_FALSE; - pGpuMgr->ccCaps.bAcceptClientRequest = NV_FALSE; - pGpuMgr->ccCaps.bFatalFailure = NV_TRUE; - pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); - status = pRmApi->Control(pRmApi, - pGpu->hInternalClient, - pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_SET_GPU_STATE, - ¶ms, - sizeof(params)); - - if (status != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, "ConfCompute: Failed setting GPU state to not ready!\n"); - } - - // Invalidate SPDM session and all keys - status = _confComputeDeinitSpdmSessionAndKeys(pGpu, pConfCompute); - if (status != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, "ConfCompute: Failed tearing down SPDM!: 0x%x!\n", status); - } -} - /*! * Init channel iterator for a given global key * @@ -704,6 +687,53 @@ confComputeGetNextChannelForKey_IMPL return NV_ERR_OBJECT_NOT_FOUND; } +/*! + * Sets fatal error state in ConfCompute session by setting GPU ready + * state to false and invalidating the SPDM session. + * + * @param[in] pGpu : OBJGPU Pointer + * @param[in] pConfCompute : ConfidentialCompute pointer + */ +void +confComputeSetErrorState_KERNEL +( + OBJGPU *pGpu, + ConfidentialCompute *pConfCompute +) +{ + OBJSYS *pSys = SYS_GET_INSTANCE(); + OBJGPUMGR *pGpuMgr = SYS_GET_GPUMGR(pSys); + NV_STATUS status = NV_OK; + RM_API *pRmApi = NULL; + NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_SET_GPU_STATE_PARAMS params = {0}; + + NV_PRINTF(LEVEL_ERROR, "ConfCompute: Fatal error hit!\n"); + + // Set ready state to false + pConfCompute->bAcceptClientRequest = NV_FALSE; + pGpuMgr->ccCaps.bAcceptClientRequest = NV_FALSE; + pGpuMgr->ccCaps.bFatalFailure = NV_TRUE; + pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + status = pRmApi->Control(pRmApi, + pGpu->hInternalClient, + pGpu->hInternalSubdevice, + NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_SET_GPU_STATE, + ¶ms, + sizeof(params)); + + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "ConfCompute: Failed setting GPU state to not ready!\n"); + } + + // Invalidate SPDM session and all keys + status = _confComputeDeinitSpdmSessionAndKeys(pGpu, pConfCompute); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "ConfCompute: Failed tearing down SPDM!: 0x%x!\n", status); + } +} + /*! * Deinitialize all keys required for the Confidential Compute session. * @@ -733,7 +763,7 @@ confComputeDestruct_KERNEL } /*! - * Get key slot from global key + * Get key slot from global key * * @param[in] pConfCompute : ConfidentialCompute pointer * @param[in] globalKeyId : globalKeyId diff --git a/src/nvidia/src/kernel/gpu/conf_compute/conf_compute_key_rotation.c b/src/nvidia/src/kernel/gpu/conf_compute/conf_compute_key_rotation.c index e3bb0cad91..68d9bf7228 100644 --- a/src/nvidia/src/kernel/gpu/conf_compute/conf_compute_key_rotation.c +++ b/src/nvidia/src/kernel/gpu/conf_compute/conf_compute_key_rotation.c @@ -62,7 +62,6 @@ performKeyRotation_WORKITEM NvU32 h2dKey = pWorkItemInfo->h2dKey; NvU32 d2hKey = pWorkItemInfo->d2hKey; KernelChannel *pKernelChannel = NULL; - NvU16 notifyStatus = 0x0; CHANNEL_ITERATOR iter = {0}; RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); NV2080_CTRL_INTERNAL_CONF_COMPUTE_RC_CHANNELS_FOR_KEY_ROTATION_PARAMS params = {0}; @@ -88,17 +87,11 @@ performKeyRotation_WORKITEM { if (!kchannelIsDisabledForKeyRotation(pGpu, pKernelChannel)) { - // update notifier memory - notifyStatus = - FLD_SET_DRF(_CHANNELGPFIFO, _NOTIFICATION_STATUS, _IN_PROGRESS, _FALSE, notifyStatus); - - notifyStatus = - FLD_SET_DRF_NUM(_CHANNELGPFIFO, _NOTIFICATION_STATUS, _VALUE, pWorkItemInfo->status, notifyStatus); - NV_ASSERT_OK(kchannelUpdateNotifierMem(pKernelChannel, NV_CHANNELGPFIFO_NOTIFICATION_TYPE_KEY_ROTATION_STATUS, - 0, 0, notifyStatus)); + 0, 0, (NvU32)pWorkItemInfo->status)); - NV_PRINTF(LEVEL_INFO, "chid 0x%x was NOT disabled for key rotation, writing notifier with val 0x%x\n", kchannelGetDebugTag(pKernelChannel), (NvU32)notifyStatus); + NV_PRINTF(LEVEL_INFO, "chid 0x%x was NOT disabled for key rotation, writing notifier with val 0x%x\n", + kchannelGetDebugTag(pKernelChannel), (NvU32)pWorkItemInfo->status); // send events to clients if registered kchannelNotifyEvent(pKernelChannel, NVC86F_NOTIFIERS_KEY_ROTATION, 0, pWorkItemInfo->status, NULL, 0); } @@ -150,7 +143,6 @@ performKeyRotationByKeyPair ) { KernelChannel *pKernelChannel = NULL; - NvU16 notifyStatus = 0x0; CHANNEL_ITERATOR iter = {0}; NvU32 h2dIndex, d2hIndex; @@ -162,19 +154,13 @@ performKeyRotationByKeyPair { if (kchannelIsDisabledForKeyRotation(pGpu, pKernelChannel)) { - // update notifier memory - notifyStatus = - FLD_SET_DRF(_CHANNELGPFIFO, _NOTIFICATION_STATUS, _IN_PROGRESS, _FALSE, notifyStatus); - - notifyStatus = - FLD_SET_DRF_NUM(_CHANNELGPFIFO, _NOTIFICATION_STATUS, _VALUE, (NvU16)KEY_ROTATION_STATUS_IDLE, notifyStatus); - NV_ASSERT_OK(kchannelUpdateNotifierMem(pKernelChannel, NV_CHANNELGPFIFO_NOTIFICATION_TYPE_KEY_ROTATION_STATUS, - 0, 0, notifyStatus)); + 0, 0, (NvU32)KEY_ROTATION_STATUS_IDLE)); // send events to clients if registered kchannelNotifyEvent(pKernelChannel, NVC86F_NOTIFIERS_KEY_ROTATION, 0, (NvU16)KEY_ROTATION_STATUS_IDLE, NULL, 0); - NV_PRINTF(LEVEL_INFO, "chid 0x%x was disabled for key rotation, writing notifier with val 0x%x\n", kchannelGetDebugTag(pKernelChannel), (NvU32)notifyStatus); + NV_PRINTF(LEVEL_INFO, "chid 0x%x was disabled for key rotation, writing notifier with KEY_ROTATION_STATUS_IDLE\n", + kchannelGetDebugTag(pKernelChannel)); // also reset channel sw state kchannelDisableForKeyRotation(pGpu, pKernelChannel, NV_FALSE); @@ -186,13 +172,14 @@ performKeyRotationByKeyPair portMemSet(pKernelChannel->pEncStatsBuf, 0, sizeof(CC_CRYPTOBUNDLE_STATS)); } - // reset KR state - pConfCompute->keyRotationCallbackCount = 1; - - // clear aggregate and freed channel stats NV_ASSERT_OK_OR_RETURN(confComputeGetKeySlotFromGlobalKeyId(pConfCompute, h2dKey, &h2dIndex)); NV_ASSERT_OK_OR_RETURN(confComputeGetKeySlotFromGlobalKeyId(pConfCompute, d2hKey, &d2hIndex)); + // reset KR state + pConfCompute->keyRotationCallbackCount[h2dIndex] = 1; + pConfCompute->keyRotationCallbackCount[d2hIndex] = 1; + + // clear aggregate and freed channel stats pConfCompute->aggregateStats[h2dIndex].totalBytesEncrypted = 0; pConfCompute->aggregateStats[h2dIndex].totalEncryptOps = 0; pConfCompute->aggregateStats[d2hIndex].totalBytesEncrypted = 0; @@ -209,7 +196,7 @@ performKeyRotationByKeyPair /*! * Checks if all channels corresponding to key pair - * are disabled and schedules key rotation. + * are disabled and performs key rotation. * * @param[in] pGpu : OBJGPU pointer * @param[in] pConfCompute : conf comp pointer @@ -217,7 +204,7 @@ performKeyRotationByKeyPair * @param[out] d2hKey : d2h key */ NV_STATUS -confComputeCheckAndScheduleKeyRotation_IMPL +confComputeCheckAndPerformKeyRotation_IMPL ( OBJGPU *pGpu, ConfidentialCompute *pConfCompute, @@ -248,33 +235,36 @@ confComputeCheckAndScheduleKeyRotation_IMPL if (bIdle) { NV_PRINTF(LEVEL_INFO, "scheduling KR for h2d key = 0x%x\n", h2dKey); - NV_ASSERT_OK_OR_RETURN(confComputeScheduleKeyRotationWorkItem(pGpu, pConfCompute, h2dKey, d2hKey)); + NV_ASSERT_OK_OR_RETURN(confComputePerformKeyRotation(pGpu, pConfCompute, h2dKey, d2hKey, NV_FALSE)); } return NV_OK; } /*! - * schedules key rotation workitem + * Schedules key rotation workitem/performs key rotation * - * @param[in] pGpu : OBJGPU pointer - * @param[in] pConfCompute : conf comp pointer - * @param[out] h2dKey : h2d key - * @param[out] d2hKey : d2h key + * @param[in] pGpu : OBJGPU pointer + * @param[in] pConfCompute : conf comp pointer + * @param[in] h2dKey : h2d key + * @param[in] d2hKey : d2h key + * @param[in] bWorkItem : schedule work item if called from top half (1 sec callback) */ NV_STATUS -confComputeScheduleKeyRotationWorkItem_IMPL +confComputePerformKeyRotation_IMPL ( OBJGPU *pGpu, ConfidentialCompute *pConfCompute, NvU32 h2dKey, - NvU32 d2hKey + NvU32 d2hKey, + NvBool bWorkItem ) { - KEY_ROTATION_STATUS status; - NV_ASSERT_OK_OR_RETURN(confComputeGetKeyRotationStatus(pConfCompute, h2dKey, &status)); - if (status == KEY_ROTATION_STATUS_IN_PROGRESS) + KEY_ROTATION_STATUS krStatus; + NV_STATUS status = NV_OK; + NV_ASSERT_OK_OR_RETURN(confComputeGetKeyRotationStatus(pConfCompute, h2dKey, &krStatus)); + if (krStatus == KEY_ROTATION_STATUS_IN_PROGRESS) { - NV_PRINTF(LEVEL_INFO, "Key rotation is already scheduled for key 0x%x\n", h2dKey); + NV_PRINTF(LEVEL_ERROR, "Key rotation is already scheduled for key 0x%x\n", h2dKey); return NV_OK; } @@ -283,24 +273,41 @@ confComputeScheduleKeyRotationWorkItem_IMPL NV_ASSERT_OR_RETURN(pWorkItemInfo != NULL, NV_ERR_NO_MEMORY); pWorkItemInfo->h2dKey = h2dKey; pWorkItemInfo->d2hKey = d2hKey; - pWorkItemInfo->status = status; - NV_ASSERT_OK_OR_RETURN(confComputeSetKeyRotationStatus(pConfCompute, h2dKey, KEY_ROTATION_STATUS_IN_PROGRESS)); + pWorkItemInfo->status = krStatus; + NV_ASSERT_OK_OR_GOTO(status, confComputeSetKeyRotationStatus(pConfCompute, h2dKey, KEY_ROTATION_STATUS_IN_PROGRESS), cleanup); // cancel timeout event in case it was scheduled - OBJTMR *pTmr = GPU_GET_TIMER(pGpu); - NvU32 h2dIndex; - NV_ASSERT_OK_OR_RETURN(confComputeGetKeySlotFromGlobalKeyId(pConfCompute, h2dKey, &h2dIndex)); - if (pConfCompute->ppKeyRotationTimer[h2dIndex] != NULL) + if (krStatus != KEY_ROTATION_STATUS_FAILED_TIMEOUT) { - tmrEventCancel(pTmr, pConfCompute->ppKeyRotationTimer[h2dIndex]); + OBJTMR *pTmr = GPU_GET_TIMER(pGpu); + NvU32 h2dIndex; + NV_ASSERT_OK_OR_GOTO(status, confComputeGetKeySlotFromGlobalKeyId(pConfCompute, h2dKey, &h2dIndex), cleanup); + if (pConfCompute->ppKeyRotationTimer[h2dIndex] != NULL) + { + tmrEventCancel(pTmr, pConfCompute->ppKeyRotationTimer[h2dIndex]); + } } - // Queue workitem to perform key rotation - NV_ASSERT_OK_OR_RETURN(osQueueWorkItemWithFlags(pGpu, performKeyRotation_WORKITEM, (void*)pWorkItemInfo, - (OS_QUEUE_WORKITEM_FLAGS_LOCK_SEMA | - OS_QUEUE_WORKITEM_FLAGS_LOCK_API_RW | - OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS_RW))); - return NV_OK; + if (bWorkItem) + { + // Queue workitem to perform key rotation + NV_ASSERT_OK_OR_GOTO(status, osQueueWorkItemWithFlags(pGpu, performKeyRotation_WORKITEM, (void*)pWorkItemInfo, + (OS_QUEUE_WORKITEM_FLAGS_LOCK_SEMA | + OS_QUEUE_WORKITEM_FLAGS_LOCK_API_RW | + OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS)), cleanup); + } + else + { + performKeyRotation_WORKITEM(gpuGetInstance(pGpu), (void*)pWorkItemInfo); + portMemFree(pWorkItemInfo); + } + +cleanup: + if ((status != NV_OK) && (pWorkItemInfo != NULL)) + { + portMemFree(pWorkItemInfo); + } + return status; } /*! @@ -501,4 +508,4 @@ NvBool confComputeIsLowerThresholdCrossed_IMPL(ConfidentialCompute *pC const NvU64 totalEncryptWork = (pStatsInfo->totalBytesEncrypted / 16) + pStatsInfo->totalEncryptOps; return (totalEncryptWork > pConfCompute->keyRotationLowerLimit); -} \ No newline at end of file +} diff --git a/src/nvidia/src/kernel/gpu/deferred_api.c b/src/nvidia/src/kernel/gpu/deferred_api.c index 7ad206a827..f285669553 100644 --- a/src/nvidia/src/kernel/gpu/deferred_api.c +++ b/src/nvidia/src/kernel/gpu/deferred_api.c @@ -56,79 +56,13 @@ _Class5080GetDeferredApiInfo(DeferredApiObject *pDeferredApiObject, NvHandle hDeferredApi, DEFERRED_API_INFO **ppCliDeferredApi); -static NV_STATUS -_Class5080AddDeferredApi(DeferredApiObject *pDeferredApiObject, - NvHandle hDeferredApi, - NV5080_CTRL_DEFERRED_API_PARAMS *pDeferredApi, - NvU32 size, - NvBool bUserModeArgs); - -static NV_STATUS -_Class5080AddDeferredApiV2(DeferredApiObject *pDeferredApiObject, - NvHandle hDeferredApi, - NV5080_CTRL_DEFERRED_API_V2_PARAMS *pDeferredApi, - NvU32 size); - - static NV_STATUS _Class5080AddDeferredApi ( - DeferredApiObject *pDeferredApiObject, - NvHandle hDeferredApi, - NV5080_CTRL_DEFERRED_API_PARAMS *pDeferredApi, - NvU32 size, - NvBool bUserModeArgs -) -{ - NV_STATUS rmStatus = NV_OK; - DEFERRED_API_INFO *pCliDeferredApi; - CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); - NvHandle hClient = RES_GET_CLIENT_HANDLE(pDeferredApiObject); - - NV_ASSERT_OR_RETURN(pCallContext != NULL, NV_ERR_INVALID_STATE); - - // validate handle - if (!serverutilValidateNewResourceHandle(hClient, hDeferredApi)) - { - return NV_ERR_INVALID_OBJECT_HANDLE; - } - - // allocate a new Deferred Api and add to the client - pCliDeferredApi = portMemAllocNonPaged(sizeof(DEFERRED_API_INFO) + size); - if (NULL != pCliDeferredApi) - { - // initialize the entry - pCliDeferredApi->Handle = hDeferredApi; - pCliDeferredApi->pDeferredApiInfo = (NvU8 *)pCliDeferredApi + sizeof(DEFERRED_API_INFO); - pCliDeferredApi->Node.keyStart = pCliDeferredApi->Handle; - pCliDeferredApi->Node.keyEnd = pCliDeferredApi->Handle; - pCliDeferredApi->Node.Data = pCliDeferredApi; - pCliDeferredApi->privLevel = pCallContext->secInfo.privLevel; - pCliDeferredApi->Flags = 0; - portMemCopy(pCliDeferredApi->pDeferredApiInfo, size, pDeferredApi, size); - - // link in the new entry - rmStatus = btreeInsert(&pCliDeferredApi->Node, &pDeferredApiObject->DeferredApiList); - if (rmStatus != NV_OK) - { - portMemFree(pCliDeferredApi); - pCliDeferredApi = NULL; - } - } - else - return NV_ERR_NO_MEMORY; - - return rmStatus; -} - - -static NV_STATUS -_Class5080AddDeferredApiV2 -( - DeferredApiObject *pDeferredApiObject, - NvHandle hDeferredApi, - NV5080_CTRL_DEFERRED_API_V2_PARAMS *pDeferredApi, - NvU32 size + DeferredApiObject *pDeferredApiObject, + NvHandle hDeferredApi, + void *pDeferredApi, + NvU32 size ) { NV_STATUS rmStatus = NV_OK; @@ -227,11 +161,6 @@ static NV_STATUS _Class5080DelDeferredApi NV5080_CTRL_DEFERRED_API_PARAMS *pDeferredApiParams; pDeferredApiParams = (NV5080_CTRL_DEFERRED_API_PARAMS *)pDeferredApi->pDeferredApiInfo; - if (pDeferredApi->Flags & DEFERRED_API_INFO_FLAGS_HAS_PRIVATE_DATA_ALLOC) - { - portMemFree((void *)NvP64_VALUE(pDeferredApi->pDeferredPrivateData)); - } - if (DRF_VAL(5080_CTRL, _CMD_DEFERRED_API, _FLAGS_WAIT_FOR_TLB_FLUSH, pDeferredApiParams->flags) == NV5080_CTRL_CMD_DEFERRED_API_FLAGS_WAIT_FOR_TLB_FLUSH_TRUE) { @@ -355,7 +284,6 @@ defapiCtrlCmdDeferredApi_IMPL NV5080_CTRL_DEFERRED_API_PARAMS *pDeferredApi ) { - CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); OBJGPU *pGpu = GPU_RES_GET_GPU(pDeferredApiObj); NV_STATUS status = NV_OK; @@ -372,8 +300,8 @@ defapiCtrlCmdDeferredApi_IMPL RES_GET_CLIENT_HANDLE(pDeferredApiObj), RES_GET_PARENT_HANDLE(pDeferredApiObj), RES_GET_HANDLE(pDeferredApiObj), - (void *)pDeferredApi, - sizeof(NV5080_CTRL_DEFERRED_API_PARAMS), + pDeferredApi, + sizeof(*pDeferredApi), status); return status; } @@ -381,8 +309,7 @@ defapiCtrlCmdDeferredApi_IMPL return _Class5080AddDeferredApi(pDeferredApiObj, pDeferredApi->hApiHandle, pDeferredApi, - sizeof(NV5080_CTRL_DEFERRED_API_PARAMS), - (pCallContext->secInfo.paramLocation != PARAM_LOCATION_KERNEL)); + sizeof(*pDeferredApi)); } NV_STATUS @@ -394,6 +321,7 @@ defapiCtrlCmdDeferredApiV2_IMPL { NV_STATUS status = NV_OK; OBJGPU *pGpu = GPU_RES_GET_GPU(pDeferredApiObj); + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); // // vGPU: @@ -408,16 +336,77 @@ defapiCtrlCmdDeferredApiV2_IMPL RES_GET_CLIENT_HANDLE(pDeferredApiObj), RES_GET_PARENT_HANDLE(pDeferredApiObj), RES_GET_HANDLE(pDeferredApiObj), - (void *)pDeferredApi, - sizeof(NV5080_CTRL_DEFERRED_API_V2_PARAMS), + pDeferredApi, + sizeof(*pDeferredApi), status); return status; } - return _Class5080AddDeferredApiV2(pDeferredApiObj, - pDeferredApi->hApiHandle, - pDeferredApi, - sizeof(NV5080_CTRL_DEFERRED_API_V2_PARAMS)); + if (IS_GSP_CLIENT(pGpu)) + { + switch (pDeferredApi->cmd) + { + case NV2080_CTRL_CMD_FIFO_UPDATE_CHANNEL_INFO: + { + RsClient *pClient = NULL; + RsResourceRef *pResourceRef = NULL; + NV2080_CTRL_FIFO_UPDATE_CHANNEL_INFO_PARAMS *pParams = + &pDeferredApi->api_bundle.ChannelInfoUpdate; + + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + serverGetClientUnderLock(&g_resServ, pParams->hClient, &pClient)); + + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + clientGetResourceRef(pClient, pParams->hUserdMemory, &pResourceRef)); + + NV_CHECK_OR_RETURN(LEVEL_ERROR, + pResourceRef->pParentRef != NULL, + NV_ERR_INVALID_OBJECT_PARENT); + + // + // Register the client-specified USERD hMemory with GSP-RM before + // calling physical RM. + // + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + memRegisterWithGsp(pGpu, pClient, + pResourceRef->pParentRef->hResource, + pResourceRef->hResource)); + + break; + } + default: + // Nothing to do in kernel RM; just forward to physical RM. + break; + } + } + + // + // NV5080_CTRL_DEFERRED_API_V2_PARAMS and + // NV5080_CTRL_DEFERRED_API_INTERNAL_PARAMS are equivalent, so just pass + // pDeferredApi through. + // + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + pRmApi->Control(pRmApi, + RES_GET_CLIENT_HANDLE(pDeferredApiObj), + RES_GET_HANDLE(pDeferredApiObj), + NV5080_CTRL_CMD_DEFERRED_API_INTERNAL, + pDeferredApi, + sizeof(*pDeferredApi))); + + return NV_OK; +} + +NV_STATUS +defapiCtrlCmdDeferredApiInternal_IMPL +( + DeferredApiObject *pDeferredApiObj, + NV5080_CTRL_DEFERRED_API_INTERNAL_PARAMS *pDeferredApi +) +{ + return _Class5080AddDeferredApi(pDeferredApiObj, + pDeferredApi->hApiHandle, + pDeferredApi, + sizeof(*pDeferredApi)); } NV_STATUS diff --git a/src/nvidia/src/kernel/gpu/device_ctrl.c b/src/nvidia/src/kernel/gpu/device_ctrl.c index 5622dbeb36..a0d7ff176a 100644 --- a/src/nvidia/src/kernel/gpu/device_ctrl.c +++ b/src/nvidia/src/kernel/gpu/device_ctrl.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2004-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2004-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -40,6 +40,9 @@ #include "kernel/virtualization/kernel_vgpu_mgr.h" #include "vgpu/rpc.h" +#if defined(NV_UNIX) +#include "os-interface.h" +#endif // @@ -204,6 +207,10 @@ deviceCtrlCmdGpuGetVirtualizationMode_IMPL return NV_ERR_INVALID_ARGUMENT; } +#if defined(NV_UNIX) + pParams->isGridBuild = os_is_grid_supported(); +#endif + if (IS_VIRTUAL(pGpu)) { pParams->virtualizationMode = @@ -508,25 +515,47 @@ deviceCtrlCmdGpuGetVgxCaps_IMPL return NV_OK; } -/* - * @brief Request per-VF BAR1 resizing and, subsequently, the number - * of VFs that can be created. The request will take a per-VF - * BAR1 size in MB and calculate the number of possible VFs +/*! + * @brief Get the GPU's branding information. * - * @param[in] pParams NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS - * pointer detailing the per-VF BAR1 size and - * number of VFs + * @returns NV_STATUS + * NV_OK Success */ - NV_STATUS -deviceCtrlCmdGpuSetVgpuVfBar1Size_IMPL +deviceCtrlCmdGpuGetBrandCaps_VF ( Device *pDevice, - NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS *pParams + NV0080_CTRL_GPU_GET_BRAND_CAPS_PARAMS *pParams ) { OBJGPU *pGpu = GPU_RES_GET_GPU(pDevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); - return gpuSetVFBarSizes_HAL(pGpu, pParams); + if (IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu)) + { + NV_STATUS status = NV_OK; + CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); + RmCtrlParams *pRmCtrlParams = pCallContext->pControlParams; + NvU32 gpuMask = 0; + + NV_ASSERT_OK_OR_RETURN( + rmGpuGroupLockAcquire(pGpu->gpuInstance, + GPU_LOCK_GRP_DEVICE, + GPU_LOCK_FLAGS_SAFE_LOCK_UPGRADE, + RM_LOCK_MODULES_GPU, + &gpuMask)); + + NV_RM_RPC_CONTROL(pGpu, + pRmCtrlParams->hClient, + pRmCtrlParams->hObject, + pRmCtrlParams->cmd, + pRmCtrlParams->pParams, + pRmCtrlParams->paramsSize, + status); + + rmGpuGroupLockRelease(gpuMask, GPUS_LOCK_FLAGS_NONE); + + return status; + } + + return NV_ERR_NOT_SUPPORTED; } diff --git a/src/nvidia/src/kernel/gpu/disp/disp_common_kern_ctrl_minimal.c b/src/nvidia/src/kernel/gpu/disp/disp_common_kern_ctrl_minimal.c index a219006102..f8c7e934f5 100644 --- a/src/nvidia/src/kernel/gpu/disp/disp_common_kern_ctrl_minimal.c +++ b/src/nvidia/src/kernel/gpu/disp/disp_common_kern_ctrl_minimal.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -38,6 +38,8 @@ #include "rmapi/rs_utils.h" #include "rmapi/rmapi.h" #include "gpu/disp/head/kernel_head.h" +#include "mem_mgr/mem.h" +#include "platform/sli/sli.h" NV_STATUS dispcmnCtrlCmdSystemGetHotplugUnplugState_IMPL @@ -219,7 +221,7 @@ NV_STATUS dispcmnCtrlCmdVRRSetRgLineActive_IMPL ) { OBJGPU *pGpu = DISPAPI_GET_GPU(pDispCommon); - NvHandle hClient = RES_GET_CLIENT_HANDLE(pDispCommon); + RsClient *pClient = RES_GET_CLIENT(pDispCommon); NvHandle hParent = RES_GET_PARENT_HANDLE(pDispCommon); RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(DISPAPI_GET_GPU(pDispCommon)); NV_STATUS status = NV_OK; @@ -239,31 +241,27 @@ NV_STATUS dispcmnCtrlCmdVRRSetRgLineActive_IMPL if (pParams->bEnable) { - status = memdescRegisterToGSP(pGpu, hClient, hParent, pParams->hMemory); - if (status != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, "memdescRegisterToGSP failed %d\n", status); - return status; - } - } - - status = pRmApi->Control(pRmApi, - hClient, - RES_GET_HANDLE(pDispCommon), - NV0073_CTRL_CMD_INTERNAL_VRR_SET_RGLINE_ACTIVE, - pParams, - sizeof(*pParams)); - - if (!pParams->bEnable) - { - status = memdescDeregisterFromGSP(pGpu, hClient, hParent, pParams->hMemory); - if (status != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, "memdescDeRegisterFromGSP failed %d\n", status); - } + // + // Note: memRegisterWithGsp() is a noop when either (a) we're not + // operating as a GSP client, or (b) the hMemory is already registered + // with GSP. + // + // Also, note that we don't explicitly unregister here in the + // !pParams->bEnable case: that could unregister the memory out from + // under other uses of this hMemory on GSP. + // Instead, we rely on the hMemory getting unregistered when the + // 'struct Memory' is freed. + // + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + memRegisterWithGsp(pGpu, pClient, hParent, pParams->hMemory)); } - return status; + return pRmApi->Control(pRmApi, + pClient->hClient, + RES_GET_HANDLE(pDispCommon), + NV0073_CTRL_CMD_INTERNAL_VRR_SET_RGLINE_ACTIVE, + pParams, + sizeof(*pParams)); } static NV_STATUS _kheadCheckVblankCountCallback @@ -341,13 +339,13 @@ dispcmnCtrlCmdSystemGetVblankCounter_IMPL return NV_OK; } -NV_STATUS dispcmnCtrlCmdVblankSemControl_IMPL( +NV_STATUS dispcmnCtrlCmdVblankSemControlEnable_IMPL( DispCommon *pDispCommon, - NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_PARAMS *pParams + NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE_PARAMS *pParams ) { OBJGPU *pGpu = DISPAPI_GET_GPU(pDispCommon); - NvHandle hClient = RES_GET_CLIENT_HANDLE(pDispCommon); + RsClient *pClient = RES_GET_CLIENT(pDispCommon); NvHandle hParent = RES_GET_PARENT_HANDLE(pDispCommon); RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(DISPAPI_GET_GPU(pDispCommon)); NV_STATUS status = NV_OK; @@ -365,32 +363,130 @@ NV_STATUS dispcmnCtrlCmdVblankSemControl_IMPL( return status; } - if (pParams->bEnable) + // + // Note: memRegisterWithGsp() is a noop when either (a) we're not + // operating as a GSP client, or (b) the hMemory is already registered + // with GSP. + // + // Also, note that we don't explicitly unregister here in the + // !pParams->bEnable case: that could unregister the memory out from + // under other uses of this hMemory on GSP (e.g., other vblank semaphore + // controls). Instead, we rely on the hMemory getting unregistered when + // the 'struct Memory' is freed. + // + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + memRegisterWithGsp(pGpu, pClient, hParent, pParams->hMemory)); + + // + // NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE_PARAMS and + // NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_ENABLE_PARAMS are + // equivalent, so just pass pParams through. + // + return pRmApi->Control(pRmApi, + pClient->hClient, + RES_GET_HANDLE(pDispCommon), + NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_ENABLE, + pParams, + sizeof(*pParams)); +} + +NV_STATUS dispcmnCtrlCmdVblankSemControlDisable_IMPL( + DispCommon *pDispCommon, + NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE_PARAMS *pParams +) +{ + OBJGPU *pGpu = DISPAPI_GET_GPU(pDispCommon); + RsClient *pClient = RES_GET_CLIENT(pDispCommon); + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(DISPAPI_GET_GPU(pDispCommon)); + NV_STATUS status = NV_OK; + + // Get the right pGpu from subdevice instance given by client + status = dispapiSetUnicastAndSynchronize_HAL( + staticCast(pDispCommon, DisplayApi), + DISPAPI_GET_GPUGRP(pDispCommon), + &pGpu, + NULL, + pParams->subDeviceInstance); + + if (status != NV_OK) { - // Note: memdescRegisterToGSP() is a noop when either (a) we're not - // operating as a GSP client, or (b) the hMemory is already registered - // with GSP. - // - // Also, note that we don't explicitly unregister here in the - // !pParams->bEnable case: that could unregister the memory out from - // under other uses of this hMemory on GSP (e.g., other vblank semaphore - // controls). Instead, we rely on the hMemory getting unregistered when - // the memdesc is freed. - status = memdescRegisterToGSP(pGpu, hClient, hParent, pParams->hMemory); - if (status != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, "memdescRegisterToGSP failed %d\n", status); - return status; - } + return status; } - // NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_PARAMS and - // NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_PARAMS are + // + // Note that we don't explicitly unregister here to complement the + // memRegisterWithGsp() done in dispcmnCtrlCmdVblankSemControlEnable_IMPL(): + // that could unregister the memory out from under other uses of this + // hMemory on GSP (e.g., other vblank semaphore controls). Instead, we rely + // on the hMemory getting unregistered when the 'struct Memory' is freed. + // + + // + // NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE_PARAMS and + // NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_DISABLE_PARAMS are // equivalent, so just pass pParams through. + // return pRmApi->Control(pRmApi, - hClient, + pClient->hClient, RES_GET_HANDLE(pDispCommon), - NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL, + NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_DISABLE, pParams, sizeof(*pParams)); } + +/* + * @brief This call engages the WAR for VR where the Pstate + * switching can cause delay in serving Vblank interrupts + * by servicing disp interrupts inline. + * + * @return + * NV_OK + * The request successfully completed. + * NV_ERR_INVALID_ARGUMENT + * Invalid argument is passed. + */ +NV_STATUS +dispcmnCtrlCmdInlineDispIntrServiceWarForVr_IMPL +( + DispCommon *pDispCommon, + NV0073_CTRL_SYSTEM_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR_PARAMS *pParams +) +{ + POBJGPU pGpu = NULL; + RM_API *pRmApi; + NV_STATUS status; + KernelDisplay *pKernelDisplay = NULL; + + // Get the right pGpu from subdevice instance given by client + status = dispapiSetUnicastAndSynchronize_HAL( + staticCast(pDispCommon, DisplayApi), + DISPAPI_GET_GPUGRP(pDispCommon), + &pGpu, + NULL, + pParams->subDeviceInstance); + + if (status != NV_OK) + { + return status; + } + + SLI_LOOP_START(SLI_LOOP_FLAGS_BC_ONLY) + + pKernelDisplay = GPU_GET_KERNEL_DISPLAY(pGpu); + if (pKernelDisplay == NULL) + SLI_LOOP_RETURN(NV_ERR_INVALID_STATE); + + pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + + status = pRmApi->Control(pRmApi, + RES_GET_CLIENT_HANDLE(pDispCommon), + RES_GET_HANDLE(pDispCommon), + NV0073_CTRL_CMD_INTERNAL_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR, + pParams, + sizeof(*pParams)); + + SLI_LOOP_END + + return NV_OK; +} + diff --git a/src/nvidia/src/kernel/gpu/disp/head/kernel_head.c b/src/nvidia/src/kernel/gpu/disp/head/kernel_head.c index 50e14fad90..5da4a43edc 100644 --- a/src/nvidia/src/kernel/gpu/disp/head/kernel_head.c +++ b/src/nvidia/src/kernel/gpu/disp/head/kernel_head.c @@ -235,7 +235,8 @@ kheadReadVblankIntrState_IMPL ) { // Check to make sure that our SW state grooves with the HW state - if (kheadReadVblankIntrEnable_HAL(pGpu, pKernelHead)) + if (kheadReadVblankIntrEnable_HAL(pGpu, pKernelHead) && + kheadGetDisplayInitialized_HAL(pGpu, pKernelHead)) { // HW is enabled, check if SW state is not enabled if (pKernelHead->Vblank.IntrState != NV_HEAD_VBLANK_INTR_ENABLED) diff --git a/src/nvidia/src/kernel/gpu/eng_state.c b/src/nvidia/src/kernel/gpu/eng_state.c index 82967db519..74f847115d 100644 --- a/src/nvidia/src/kernel/gpu/eng_state.c +++ b/src/nvidia/src/kernel/gpu/eng_state.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2013-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2013-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -28,9 +28,6 @@ #include "gpu/bus/kern_bus.h" -// Function pointer wrapper -#define engstateStatePreInitUnlocked_Fnptr(pEngstate) pEngstate->__engstateStatePreInitUnlocked__ -#define engstateStateInitUnlocked_Fnptr(pEngstate) pEngstate->__engstateStateInitUnlocked__ NV_STATUS engstateConstructBase_IMPL @@ -157,24 +154,6 @@ engstateGetName_IMPL #endif } -void -engstateLogStateStatus_IMPL -( - OBJENGSTATE *pEngstate, - ENGSTATE_STATE targetState, - NV_STATUS targetStatus -) -{ - ENGSTATE_STATUS *status = &pEngstate->status[targetState]; - NV_ASSERT_OR_RETURN_VOID(targetState < ENGSTATE_STATE_COUNT); - - status->engStatus = targetStatus; - -#if NV_PRINTF_STRINGS_ALLOWED - portStringCopy(status->name, sizeof(status->name), engstateGetName(pEngstate), portStringLength(engstateGetName(pEngstate)) + 1); -#endif -} - /*! * @brief generic constructor */ @@ -222,7 +201,7 @@ engstateStatePreInit_IMPL(OBJGPU *pGpu, OBJENGSTATE *pEngstate) LOCK_ASSERT_AND_RETURN(rmGpuLockIsOwner()); /* Check if we overrode the unlocked variant */ - if ((engstateStatePreInitUnlocked_Fnptr(pEngstate) != + if ((engstateStatePreInitUnlocked_FNPTR(pEngstate) != engstateStatePreInitUnlocked_IMPL)) { NV_STATUS status, lockStatus; @@ -270,7 +249,7 @@ engstateStateInit_IMPL(OBJGPU *pGpu, OBJENGSTATE *pEngstate) LOCK_ASSERT_AND_RETURN(rmGpuLockIsOwner()); /* Check if we overrode the unlocked variant */ - if (engstateStateInitUnlocked_Fnptr(pEngstate) != engstateStateInitUnlocked_IMPL) + if (engstateStateInitUnlocked_FNPTR(pEngstate) != engstateStateInitUnlocked_IMPL) { NV_STATUS status, lockStatus; diff --git a/src/nvidia/src/kernel/gpu/external_device/arch/kepler/kern_gsync_p2060.c b/src/nvidia/src/kernel/gpu/external_device/arch/kepler/kern_gsync_p2060.c index d10a1b8803..4eba6510c4 100644 --- a/src/nvidia/src/kernel/gpu/external_device/arch/kepler/kern_gsync_p2060.c +++ b/src/nvidia/src/kernel/gpu/external_device/arch/kepler/kern_gsync_p2060.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -32,6 +32,7 @@ #include "class/cl402c.h" // NV40_I2C #include "kernel/gpu/i2c/i2c_api.h" #include "platform/sli/sli.h" +#include "nvmisc.h" /* * statics */ @@ -5420,7 +5421,7 @@ isBoardWithNvlinkQsyncContention NvU16 thisDevId = (NvU16)(((pGpu->idInfo.PCIDeviceID) >> 16) & 0x0000FFFF); NvU32 i; - for (i=0; i < (sizeof(devIds)/sizeof(devIds[0])); i++) + for (i=0; i < (NV_ARRAY_ELEMENTS(devIds)); i++) { if (thisDevId == devIds[i]) { diff --git a/src/nvidia/src/kernel/gpu/fifo/arch/ampere/kernel_fifo_ga100.c b/src/nvidia/src/kernel/gpu/fifo/arch/ampere/kernel_fifo_ga100.c index c4af0ef9db..bd5a427372 100644 --- a/src/nvidia/src/kernel/gpu/fifo/arch/ampere/kernel_fifo_ga100.c +++ b/src/nvidia/src/kernel/gpu/fifo/arch/ampere/kernel_fifo_ga100.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -34,7 +34,6 @@ #include "published/ampere/ga100/dev_ram.h" #include "published/ampere/ga100/dev_ctrl.h" - NV_STATUS kfifoEngineInfoXlate_GA100 ( @@ -211,7 +210,6 @@ kfifoGenerateWorkSubmitToken_GA100 if (!RMCFG_FEATURE_PLATFORM_GSP || (IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu) && IS_GFID_VF(gfId))) { - // TODO: Remove check on Ampere. Bug 200606706. if (!bUsedForHost && IS_GFID_VF(gfId)) { @@ -245,7 +243,7 @@ kfifoGenerateWorkSubmitToken_GA100 } else // RMCFG_FEATURE_PLATFORM_GSP { - NV_ASSERT_OK_OR_RETURN(kfifoGenerateInternalWorkSubmitToken_HAL(pGpu, pKernelFifo, pKernelChannel)); + NV_ASSERT_OK_OR_RETURN(kfifoGenerateInternalWorkSubmitToken_HAL(pGpu, pKernelFifo, pKernelChannel, &val)); } *pGeneratedToken = val; diff --git a/src/nvidia/src/kernel/gpu/fifo/arch/maxwell/kernel_fifo_gm107.c b/src/nvidia/src/kernel/gpu/fifo/arch/maxwell/kernel_fifo_gm107.c index fa3b713772..6758eecf7f 100644 --- a/src/nvidia/src/kernel/gpu/fifo/arch/maxwell/kernel_fifo_gm107.c +++ b/src/nvidia/src/kernel/gpu/fifo/arch/maxwell/kernel_fifo_gm107.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -1329,9 +1329,13 @@ kfifoPreAllocUserD_GM107 if (bCoherentCpuMapping && (memdescGetAddressSpace(pUserdInfo->userdPhysDesc[currentGpuInst]) == ADDR_FBMEM)) { - pUserdInfo->userdBar1CpuPtr = kbusMapCoherentCpuMapping_HAL(pGpu, pKernelBus, - pUserdInfo->userdPhysDesc[currentGpuInst]); - status = pUserdInfo->userdBar1CpuPtr == NULL ? NV_ERR_GENERIC : NV_OK; + status = kbusMapCoherentCpuMapping_HAL(pGpu, pKernelBus, + pUserdInfo->userdPhysDesc[currentGpuInst], + 0, + pUserdInfo->userdBar1MapSize, + NV_PROTECT_READ_WRITE, + (void**)&pUserdInfo->userdBar1CpuPtr, + (void**)&pUserdInfo->userdBar1Priv); } else if ((bCoherentCpuMapping && memdescGetAddressSpace(pUserdInfo->userdPhysDesc[currentGpuInst]) == ADDR_SYSMEM && @@ -1343,7 +1347,7 @@ kfifoPreAllocUserD_GM107 pUserdInfo->userdBar1MapSize, NV_PROTECT_READ_WRITE, (void**)&pUserdInfo->userdBar1CpuPtr, - NV_MEMORY_UNCACHED); + NV_MEMORY_CACHED); } else { @@ -1423,7 +1427,9 @@ kfifoFreePreAllocUserD_GM107 if (bCoherentCpuMapping) { kbusUnmapCoherentCpuMapping_HAL(pGpu, pKernelBus, - pUserdInfo->userdPhysDesc[currentGpuInst]); + pUserdInfo->userdPhysDesc[currentGpuInst], + pUserdInfo->userdBar1CpuPtr, + pUserdInfo->userdBar1Priv); } else { diff --git a/src/nvidia/src/kernel/gpu/fifo/channel_descendant.c b/src/nvidia/src/kernel/gpu/fifo/channel_descendant.c index 23db4fc2e8..3008c04f4a 100644 --- a/src/nvidia/src/kernel/gpu/fifo/channel_descendant.c +++ b/src/nvidia/src/kernel/gpu/fifo/channel_descendant.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2016-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -61,9 +61,9 @@ chandesConstruct_IMPL NV_ASSERT_OR_RETURN(pKernelChannel != NULL, NV_ERR_INVALID_OBJECT_PARENT); // Bad class creation can happen when GPU is in low power because class DB is invalid - NV_ASSERT(IS_VIRTUAL(pGpu) || gpuIsGpuFullPower(pGpu)); + NV_ASSERT(IS_VIRTUAL(pGpu) || gpuIsGpuFullPowerForPmResume(pGpu)); - NV_ASSERT(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT(rmapiLockIsOwner() || rmapiInRtd3PmPath()); // // If debug mode is enabled on this GPU, check if the GPU is occupied by a @@ -271,7 +271,7 @@ chandesDestruct_IMPL NV_STATUS status; // scrub event references for this object - CliDelObjectEvents(RES_GET_CLIENT_HANDLE(pChannelDescendant), RES_GET_HANDLE(pChannelDescendant)); + CliDelObjectEvents(RES_GET_REF(pChannelDescendant)); status = kchannelDeregisterChild(pChannelDescendant->pKernelChannel, pChannelDescendant); NV_ASSERT(status == NV_OK); diff --git a/src/nvidia/src/kernel/gpu/fifo/kernel_channel.c b/src/nvidia/src/kernel/gpu/fifo/kernel_channel.c index 90136be057..aa8c64e69f 100644 --- a/src/nvidia/src/kernel/gpu/fifo/kernel_channel.c +++ b/src/nvidia/src/kernel/gpu/fifo/kernel_channel.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -143,7 +143,7 @@ kchannelConstruct_IMPL RsResourceRef *pResourceRef = pCallContext->pResourceRef; RsResourceRef *pKernelCtxShareRef = NULL; NV_STATUS status; - RM_API *pRmApi = rmapiGetInterface(RMAPI_API_LOCK_INTERNAL); + RM_API *pRmApi = NULL; NvHandle hClient = pRsClient->hClient; NvHandle hParent = pResourceRef->pParentRef->hResource; NV_CHANNEL_ALLOC_PARAMS *pChannelGpfifoParams = pParams->pAllocParams; @@ -172,6 +172,20 @@ kchannelConstruct_IMPL NvU32 callingContextGfid; Device *pDevice; + if (rmapiLockIsOwner()) + { + pRmApi = rmapiGetInterface(RMAPI_API_LOCK_INTERNAL); + } + else if (rmapiInRtd3PmPath()) + { + pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); + } + else + { + NV_PRINTF(LEVEL_ERROR, "Caller missing proper locks\n"); + return NV_ERR_INVALID_LOCK_STATE; + } + // We only support physical channels. NV_ASSERT_OR_RETURN(FLD_TEST_DRF(OS04, _FLAGS, _CHANNEL_TYPE, _PHYSICAL, flags), NV_ERR_NOT_SUPPORTED); @@ -212,6 +226,10 @@ kchannelConstruct_IMPL } pKernelChannel->pUserInfo = pRmClient->pUserInfo; + pKernelChannel->bGspOwned = + FLD_TEST_DRF(_KERNELCHANNEL, _ALLOC_INTERNALFLAGS, _GSP_OWNED, _YES, pChannelGpfifoParams->internalFlags); + NV_ASSERT_OR_RETURN(!pKernelChannel->bGspOwned || RMCFG_FEATURE_PLATFORM_GSP, NV_ERR_INVALID_ARGUMENT); + // // GSP-RM needs privilegeLevel passed in as an alloc param because it cannot // check pRmClient for kernel/admin. @@ -484,7 +502,7 @@ kchannelConstruct_IMPL { pKernelChannel->errorContextType = ERROR_NOTIFIER_TYPE_NONE; } - else if (!RMCFG_FEATURE_PLATFORM_GSP) + else if (!(RMCFG_FEATURE_PLATFORM_GSP && !pKernelChannel->bGspOwned)) { NV_ASSERT_OK(kchannelGetNotifierInfo(pGpu, pDevice, pKernelChannel->hErrorContext, @@ -498,7 +516,7 @@ kchannelConstruct_IMPL { pKernelChannel->eccErrorContextType = ERROR_NOTIFIER_TYPE_NONE; } - else if (!RMCFG_FEATURE_PLATFORM_GSP) + else if (!(RMCFG_FEATURE_PLATFORM_GSP && !pKernelChannel->bGspOwned)) { NV_ASSERT_OK(kchannelGetNotifierInfo(pGpu, pDevice, pKernelChannel->hEccErrorContext, @@ -710,20 +728,20 @@ kchannelConstruct_IMPL ConfidentialCompute* pConfCompute = GPU_GET_CONF_COMPUTE(pGpu); // return early if gpu is not ready to accept work - if (pConfCompute && kchannelCheckIsUserMode(pKernelChannel) + if ((pConfCompute != NULL) && kchannelCheckIsUserMode(pKernelChannel) && !confComputeAcceptClientRequest(pGpu, pConfCompute)) { return NV_ERR_NOT_READY; } - if (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED)) + if ((pConfCompute != NULL) && pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED)) { KEY_ROTATION_STATUS state; NvU32 h2dKey; NV_ASSERT_OK_OR_GOTO(status, confComputeGetKeyPairByChannel(pGpu, pConfCompute, pKernelChannel, &h2dKey, NULL), cleanup); - NV_ASSERT_OK_OR_GOTO(status, + NV_ASSERT_OK_OR_GOTO(status, confComputeGetKeyRotationStatus(pConfCompute, h2dKey, &state), cleanup); if (state != KEY_ROTATION_STATUS_IDLE) @@ -981,19 +999,6 @@ kchannelConstruct_IMPL (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED)) && (pKernelChannel->bCCSecureChannel)) { - if (!FLD_TEST_DRF(OS04, _FLAGS, _CHANNEL_SKIP_SCRUBBER, _TRUE, pChannelGpfifoParams->flags) && - pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_DUMMY_KEY_ROTATION_ENABLED)) - { - // - // If conf compute feature is enabled AND - // If key rotation is supported AND - // If key rotation callbacks are not enabled yet AND - // If this is a secure channel being created AND - // If its not the scrubber channel then increment refcount - // - pConfCompute->keyRotationChannelRefCount++; - } - // Create persistent mapping to key rotation notifier NV_ASSERT_OK_OR_GOTO( status, @@ -1049,7 +1054,7 @@ kchannelConstruct_IMPL kchangrpRemoveChannel(pGpu, pKernelChannelGroup, pKernelChannel); } - if (RMCFG_FEATURE_PLATFORM_GSP) + if (RMCFG_FEATURE_PLATFORM_GSP && !pKernelChannel->bGspOwned) { // Free memdescs created during construct on GSP path. memdescFree(pKernelChannel->pErrContextMemDesc); @@ -1095,7 +1100,7 @@ kchannelDestruct_IMPL CALL_CONTEXT *pCallContext; RS_RES_FREE_PARAMS_INTERNAL *pParams; NvHandle hClient; - RM_API *pRmApi = rmapiGetInterface(RMAPI_API_LOCK_INTERNAL); + RM_API *pRmApi = NULL; OBJGPU *pGpu = GPU_RES_GET_GPU(pKernelChannel); NV_STATUS status = NV_OK; KernelChannelGroup *pKernelChannelGroup = NULL; @@ -1107,29 +1112,44 @@ kchannelDestruct_IMPL resGetFreeParams(staticCast(pKernelChannel, RsResource), &pCallContext, &pParams); hClient = pCallContext->pClient->hClient; + if (rmapiLockIsOwner()) + { + pRmApi = rmapiGetInterface(RMAPI_API_LOCK_INTERNAL); + } + else if (rmapiInRtd3PmPath()) + { + pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); + } + else + { + NV_PRINTF(LEVEL_ERROR, "Caller missing proper locks\n"); + return; + } + ConfidentialCompute *pConfCompute = GPU_GET_CONF_COMPUTE(pGpu); + NvBool bCheckKeyRotation = NV_FALSE; + NvU32 h2dKey, d2hKey; if ((pConfCompute != NULL) && (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_CC_FEATURE_ENABLED)) && (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED)) && (pKernelChannel->bCCSecureChannel)) { - if (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_DUMMY_KEY_ROTATION_ENABLED)) + NV_ASSERT_OK(confComputeUpdateFreedChannelStats(pGpu, pConfCompute, pKernelChannel)); + + // check if we need to trigger key rotation after freeing this channel + KEY_ROTATION_STATUS state; + NV_ASSERT_OK(confComputeGetKeyPairByChannel(pGpu, pConfCompute, pKernelChannel, &h2dKey, &d2hKey)); + NV_ASSERT_OK(confComputeGetKeyRotationStatus(pConfCompute, h2dKey, &state)); + if (state == KEY_ROTATION_STATUS_PENDING) { - if (pConfCompute->keyRotationChannelRefCount > 0) - { - pConfCompute->keyRotationChannelRefCount--; - } - if (pConfCompute->keyRotationChannelRefCount == 0) - { - pConfCompute->keyRotationCallbackCount = 0; - } + bCheckKeyRotation = NV_TRUE; } - NV_ASSERT_OK(confComputeUpdateFreedChannelStats(pGpu, pConfCompute, pKernelChannel)); - NV_ASSERT_OK(kchannelSetEncryptionStatsBuffer_HAL(pGpu, pKernelChannel, NV_FALSE)); + + NV_ASSERT_OK(kchannelSetEncryptionStatsBuffer_HAL(pGpu, pKernelChannel, NULL, NV_FALSE)); NV_ASSERT_OK(kchannelSetKeyRotationNotifier_HAL(pGpu, pKernelChannel, NV_FALSE)); } - if (RMCFG_FEATURE_PLATFORM_GSP) + if (RMCFG_FEATURE_PLATFORM_GSP && !pKernelChannel->bGspOwned) { // Free memdescs created during construct on GSP path. memdescFree(pKernelChannel->pErrContextMemDesc); @@ -1203,6 +1223,16 @@ kchannelDestruct_IMPL kchannelFreeMmuExceptionInfo(pKernelChannel); NV_ASSERT(pKernelChannel->refCount == 1); + + if (bCheckKeyRotation) + { + // + // If key rotation is pending on this key because the channel being freed hasn't reported idle yet then, + // we wait until this channel's SW state is cleared out before triggerring key rotation + // so that the key rotation code doesn't try to notify this channel or check its idle state. + // + NV_ASSERT_OK(confComputeCheckAndPerformKeyRotation(pGpu, pConfCompute, h2dKey, d2hKey)); + } } NV_STATUS @@ -1491,9 +1521,9 @@ CliGetChannelClassInfo case KEPLER_CHANNEL_GPFIFO_B: { pClassInfo->notifiersMaxCount = NVA16F_NOTIFIERS_MAXCOUNT; - pClassInfo->eventActionDisable = NVA16F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE; - pClassInfo->eventActionSingle = NVA16F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE; - pClassInfo->eventActionRepeat = NVA16F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT; + pClassInfo->eventActionDisable = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE; + pClassInfo->eventActionSingle = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE; + pClassInfo->eventActionRepeat = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT; pClassInfo->rcNotifierIndex = NVA16F_NOTIFIERS_RC; pClassInfo->classType = CHANNEL_CLASS_TYPE_GPFIFO; break; @@ -1501,9 +1531,9 @@ CliGetChannelClassInfo case MAXWELL_CHANNEL_GPFIFO_A: { pClassInfo->notifiersMaxCount = NVB06F_NOTIFIERS_MAXCOUNT; - pClassInfo->eventActionDisable = NVB06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE; - pClassInfo->eventActionSingle = NVB06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE; - pClassInfo->eventActionRepeat = NVB06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT; + pClassInfo->eventActionDisable = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE; + pClassInfo->eventActionSingle = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE; + pClassInfo->eventActionRepeat = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT; pClassInfo->rcNotifierIndex = NVB06F_NOTIFIERS_RC; pClassInfo->classType = CHANNEL_CLASS_TYPE_GPFIFO; break; @@ -1511,9 +1541,9 @@ CliGetChannelClassInfo case PASCAL_CHANNEL_GPFIFO_A: { pClassInfo->notifiersMaxCount = NVC06F_NOTIFIERS_MAXCOUNT; - pClassInfo->eventActionDisable = NVC06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE; - pClassInfo->eventActionSingle = NVC06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE; - pClassInfo->eventActionRepeat = NVC06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT; + pClassInfo->eventActionDisable = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE; + pClassInfo->eventActionSingle = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE; + pClassInfo->eventActionRepeat = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT; pClassInfo->rcNotifierIndex = NVC06F_NOTIFIERS_RC; pClassInfo->classType = CHANNEL_CLASS_TYPE_GPFIFO; break; @@ -1521,9 +1551,9 @@ CliGetChannelClassInfo case VOLTA_CHANNEL_GPFIFO_A: { pClassInfo->notifiersMaxCount = NVC36F_NOTIFIERS_MAXCOUNT; - pClassInfo->eventActionDisable = NVC36F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE; - pClassInfo->eventActionSingle = NVC36F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE; - pClassInfo->eventActionRepeat = NVC36F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT; + pClassInfo->eventActionDisable = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE; + pClassInfo->eventActionSingle = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE; + pClassInfo->eventActionRepeat = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT; pClassInfo->rcNotifierIndex = NVC36F_NOTIFIERS_RC; pClassInfo->classType = CHANNEL_CLASS_TYPE_GPFIFO; break; @@ -1531,9 +1561,9 @@ CliGetChannelClassInfo case TURING_CHANNEL_GPFIFO_A: { pClassInfo->notifiersMaxCount = NVC46F_NOTIFIERS_MAXCOUNT; - pClassInfo->eventActionDisable = NVC46F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE; - pClassInfo->eventActionSingle = NVC46F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE; - pClassInfo->eventActionRepeat = NVC46F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT; + pClassInfo->eventActionDisable = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE; + pClassInfo->eventActionSingle = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE; + pClassInfo->eventActionRepeat = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT; pClassInfo->rcNotifierIndex = NVC46F_NOTIFIERS_RC; pClassInfo->classType = CHANNEL_CLASS_TYPE_GPFIFO; break; @@ -1541,9 +1571,9 @@ CliGetChannelClassInfo case AMPERE_CHANNEL_GPFIFO_A: { pClassInfo->notifiersMaxCount = NVC56F_NOTIFIERS_MAXCOUNT; - pClassInfo->eventActionDisable = NVC56F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE; - pClassInfo->eventActionSingle = NVC56F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE; - pClassInfo->eventActionRepeat = NVC56F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT; + pClassInfo->eventActionDisable = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE; + pClassInfo->eventActionSingle = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE; + pClassInfo->eventActionRepeat = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT; pClassInfo->rcNotifierIndex = NVC56F_NOTIFIERS_RC; pClassInfo->classType = CHANNEL_CLASS_TYPE_GPFIFO; break; @@ -1551,9 +1581,9 @@ CliGetChannelClassInfo case HOPPER_CHANNEL_GPFIFO_A: { pClassInfo->notifiersMaxCount = NVC86F_NOTIFIERS_MAXCOUNT; - pClassInfo->eventActionDisable = NVC86F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE; - pClassInfo->eventActionSingle = NVC86F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE; - pClassInfo->eventActionRepeat = NVC86F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT; + pClassInfo->eventActionDisable = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE; + pClassInfo->eventActionSingle = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE; + pClassInfo->eventActionRepeat = NVA06F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT; pClassInfo->rcNotifierIndex = NVC86F_NOTIFIERS_RC; pClassInfo->classType = CHANNEL_CLASS_TYPE_GPFIFO; break; @@ -1853,7 +1883,7 @@ NV_STATUS kchannelUpdateNotifierMem_IMPL // ConfidentialCompute *pConfCompute = GPU_GET_CONF_COMPUTE(pGpu); if ((pConfCompute != NULL) && - (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED)) && + (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED)) && (notifyIndex == NV_CHANNELGPFIFO_NOTIFICATION_TYPE_KEY_ROTATION_STATUS)) { pNotifier = _kchannelGetKeyRotationNotifier(pKernelChannel); @@ -2260,7 +2290,7 @@ _kchannelAllocOrDescribeInstMem // However it is still client allocated userd from GSP RM or host RM on full SRIOV setup // perspective so set the flag accordingly. // - if (!RMCFG_FEATURE_PLATFORM_GSP && + if (!(RMCFG_FEATURE_PLATFORM_GSP && !pKernelChannel->bGspOwned) && !(IS_GFID_VF(gfid) && !gpuIsWarBug200577889SriovHeavyEnabled(pGpu))) { pKernelChannel->bClientAllocatedUserD = NV_FALSE; @@ -2283,7 +2313,7 @@ _kchannelAllocOrDescribeInstMem _kchannelDescribeMemDescsHeavySriov(pGpu, pKernelChannel), failed); } - else if (RMCFG_FEATURE_PLATFORM_GSP || + else if ((RMCFG_FEATURE_PLATFORM_GSP && !pKernelChannel->bGspOwned) || (IS_GFID_VF(gfid) && !gpuIsWarBug200577889SriovHeavyEnabled(pGpu))) { // On GSPFW or non-heavy SRIOV, describe memdescs from params @@ -2352,7 +2382,7 @@ _kchannelDescribeMemDescsFromParams NV_ASSERT_OR_RETURN((pKernelChannelGroupApi != NULL), NV_ERR_INVALID_STATE); gfid = pKernelChannelGroupApi->pKernelChannelGroup->gfid; - NV_ASSERT_OR_RETURN(RMCFG_FEATURE_PLATFORM_GSP || + NV_ASSERT_OR_RETURN((RMCFG_FEATURE_PLATFORM_GSP && !pKernelChannel->bGspOwned) || (IS_GFID_VF(gfid) && !gpuIsWarBug200577889SriovHeavyEnabled(pGpu)), NV_ERR_INVALID_STATE); @@ -2809,11 +2839,13 @@ NV_STATUS kchannelBindToRunlist_IMPL ENGDESCRIPTOR engineDesc ) { - OBJGPU *pGpu; - NV_STATUS status = NV_OK; + OBJGPU *pGpu; + KernelFifo *pKernelFifo; + NV_STATUS status = NV_OK; NV_ASSERT_OR_RETURN(pKernelChannel != NULL, NV_ERR_INVALID_ARGUMENT); pGpu = GPU_RES_GET_GPU(pKernelChannel); + pKernelFifo = GPU_GET_KERNEL_FIFO(pGpu); // copied from setRunlistIdByEngineType if ((engineDesc == ENG_SW) || (engineDesc == ENG_BUS)) @@ -2821,14 +2853,10 @@ NV_STATUS kchannelBindToRunlist_IMPL return NV_OK; } - // - // vGPU: - // - // Since vGPU does all real hardware management in the - // host, if we are in guest OS (where IS_VIRTUAL(pGpu) is true), - // do an RPC to the host to do the hardware update. - // - if (IS_VIRTUAL(pGpu) || IS_GSP_CLIENT(pGpu)) + if (IS_GSP_CLIENT(pGpu) || + (IS_VIRTUAL(pGpu) && + !(IS_VIRTUAL_WITH_FULL_SRIOV(pGpu) && + kfifoIsPerRunlistChramEnabled(pKernelFifo)))) { NVA06F_CTRL_BIND_PARAMS params; @@ -2842,13 +2870,12 @@ NV_STATUS kchannelBindToRunlist_IMPL sizeof(params), status); - NV_ASSERT_OR_RETURN(status == NV_OK, status); + NV_ASSERT_OK_OR_RETURN(status); } SLI_LOOP_START(SLI_LOOP_FLAGS_BC_ONLY) - status = kfifoRunlistSetIdByEngine_HAL(pGpu, GPU_GET_KERNEL_FIFO(pGpu), - pKernelChannel, engineDesc); + status = kfifoRunlistSetIdByEngine_HAL(pGpu, pKernelFifo, pKernelChannel, engineDesc); if (status != NV_OK) { @@ -2928,6 +2955,21 @@ kchannelCtrlCmdEventSetNotification_IMPL return NV_OK; } +/*! + * @brief Returns the context ID of a channel + * + */ +NV_STATUS +kchannelCtrlCmdGetContextId_IMPL +( + KernelChannel *pKernelChannel, + NVA06F_CTRL_GET_CONTEXT_ID_PARAMS *pParams +) +{ + pParams->contextId = kchannelGetCid(pKernelChannel); + return NV_OK; +} + NV_STATUS kchannelCtrlCmdGetClassEngineid_IMPL ( @@ -3085,7 +3127,7 @@ kchannelCtrlCmdResetChannel_IMPL // return kchannelFwdToInternalCtrl_HAL(pGpu, pKernelChannel, - NVA06F_CTRL_CMD_INTERNAL_RESET_CHANNEL, + NV906F_CTRL_CMD_RESET_CHANNEL, pRmCtrlParams); } @@ -3170,16 +3212,6 @@ kchannelCtrlCmdGpFifoSchedule_IMPL pRmCtrlParams); } -NV_STATUS -kchannelCtrlCmdGetEngineCtxSize_IMPL -( - KernelChannel *pKernelChannel, - NVB06F_CTRL_GET_ENGINE_CTX_SIZE_PARAMS *pCtxSizeParams -) -{ - return NV_ERR_NOT_SUPPORTED; -} - NV_STATUS kchannelCtrlCmdSetErrorNotifier_IMPL ( @@ -4573,6 +4605,7 @@ kchannelCtrlCmdGetKmb_KERNEL NVC56F_CTRL_CMD_GET_KMB_PARAMS *pGetKmbParams ) { + if (!pKernelChannel->bCCSecureChannel) { return NV_ERR_NOT_SUPPORTED; @@ -4580,7 +4613,7 @@ kchannelCtrlCmdGetKmb_KERNEL OBJGPU *pGpu = GPU_RES_GET_GPU(pKernelChannel); ConfidentialCompute *pConfCompute = GPU_GET_CONF_COMPUTE(pGpu); - if (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED)) + if ((pConfCompute != NULL) && pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED)) { KEY_ROTATION_STATUS state; NvU32 h2dKey; @@ -4596,7 +4629,7 @@ kchannelCtrlCmdGetKmb_KERNEL portMemCopy((void*)(&pGetKmbParams->kmb), sizeof(CC_KMB), (const void*)(&pKernelChannel->clientKmb), sizeof(CC_KMB)); - if (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED)) + if ((pConfCompute != NULL) && pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED)) { // // If this is the first time GET_KMB is called on a context @@ -4619,8 +4652,7 @@ kchannelCtrlCmdGetKmb_KERNEL pMemory = dynamicCast(pResourceRef->pResource, Memory); pMemDesc = pMemory->pMemDesc; NV_ASSERT_OR_RETURN(pMemDesc != NULL, NV_ERR_INVALID_ARGUMENT); - pKernelChannel->pEncStatsBufMemDesc = pMemDesc; - NV_ASSERT_OK_OR_RETURN(kchannelSetEncryptionStatsBuffer_HAL(pGpu, pKernelChannel, NV_TRUE)); + NV_ASSERT_OK_OR_RETURN(kchannelSetEncryptionStatsBuffer_HAL(pGpu, pKernelChannel, pMemDesc, NV_TRUE)); } // @@ -4661,19 +4693,6 @@ kchannelCtrlRotateSecureChannelIv_KERNEL return NV_ERR_NOT_SUPPORTED; } - if (pCC->getProperty(pCC, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED)) - { - KEY_ROTATION_STATUS state; - NvU32 h2dKey; - NV_ASSERT_OK_OR_RETURN(confComputeGetKeyPairByChannel(pGpu, pCC, pKernelChannel, &h2dKey, NULL)); - NV_ASSERT_OK_OR_RETURN(confComputeGetKeyRotationStatus(pCC, h2dKey, &state)); - if ((state != KEY_ROTATION_STATUS_IDLE) || - (kchannelIsDisabledForKeyRotation(pGpu, pKernelChannel))) - { - return NV_ERR_KEY_ROTATION_IN_PROGRESS; - } - } - NV_PRINTF(LEVEL_INFO, "Rotating IV in CPU-RM.\n"); status = confComputeKeyStoreRetrieveViaChannel_HAL( @@ -4739,7 +4758,7 @@ kchannelCtrlRotateSecureChannelIv_PHYSICAL ) { NV_STATUS status; - + NV_PRINTF(LEVEL_INFO, "Rotating IV in GSP-RM.\n"); // CPU-side encrypt IV corresponds to GPU-side decrypt IV. @@ -4876,7 +4895,7 @@ void kchannelEnableAfterKeyRotation } } -/*! +/*! * Creates/destroys persistent mappings for key rotation notifier */ NV_STATUS @@ -4946,7 +4965,7 @@ kchannelSetKeyRotationNotifier_KERNEL return status; } -/*! +/*! * Creates/destroys persistent mappings for encryption stats buffer */ NV_STATUS @@ -4954,6 +4973,7 @@ kchannelSetEncryptionStatsBuffer_KERNEL ( OBJGPU *pGpu, KernelChannel *pKernelChannel, + MEMORY_DESCRIPTOR *pMemDesc, NvBool bSet ) { @@ -4961,7 +4981,10 @@ kchannelSetEncryptionStatsBuffer_KERNEL TRANSFER_SURFACE surf = {0}; if (bSet) { + NV_ASSERT_OR_RETURN(pMemDesc != NULL, NV_ERR_INVALID_ARGUMENT); NV_ASSERT_OR_RETURN(pKernelChannel->pEncStatsBuf == NULL, NV_ERR_INVALID_STATE); + NV_ASSERT_OK_OR_RETURN(memdescCreateSubMem(&pKernelChannel->pEncStatsBufMemDesc, pMemDesc, pGpu, + 0, memdescGetSize(pMemDesc))); // // we rely on persistent mapping for encryption statistics buffer // since these will be used in top half and mappings are not allowed @@ -4972,8 +4995,12 @@ kchannelSetEncryptionStatsBuffer_KERNEL pKernelChannel->pEncStatsBuf = (CC_CRYPTOBUNDLE_STATS*)memmgrMemBeginTransfer(pMemoryManager, &surf, sizeof(CC_CRYPTOBUNDLE_STATS), TRANSFER_FLAGS_SHADOW_ALLOC); - - NV_ASSERT_OR_RETURN(pKernelChannel->pEncStatsBuf != NULL, NV_ERR_INVALID_STATE); + if (pKernelChannel->pEncStatsBuf == NULL) + { + memdescDestroy(pKernelChannel->pEncStatsBufMemDesc); + pKernelChannel->pEncStatsBufMemDesc = NULL; + return NV_ERR_INVALID_STATE; + } portMemSet(pKernelChannel->pEncStatsBuf, 0, sizeof(CC_CRYPTOBUNDLE_STATS)); } else @@ -4987,6 +5014,7 @@ kchannelSetEncryptionStatsBuffer_KERNEL surf.pMemDesc = pKernelChannel->pEncStatsBufMemDesc; surf.offset = 0; memmgrMemEndTransfer(pMemoryManager, &surf, sizeof(CC_CRYPTOBUNDLE_STATS), 0); + memdescDestroy(pKernelChannel->pEncStatsBufMemDesc); } } return NV_OK; @@ -4997,3 +5025,4 @@ _kchannelGetKeyRotationNotifier(KernelChannel *pKernelChannel) { return pKernelChannel->pKeyRotationNotifier; } + diff --git a/src/nvidia/src/kernel/gpu/fifo/kernel_channel_group.c b/src/nvidia/src/kernel/gpu/fifo/kernel_channel_group.c index 9f91cbcbab..b111e017e4 100644 --- a/src/nvidia/src/kernel/gpu/fifo/kernel_channel_group.c +++ b/src/nvidia/src/kernel/gpu/fifo/kernel_channel_group.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/src/kernel/gpu/fifo/kernel_channel_group_api.c b/src/nvidia/src/kernel/gpu/fifo/kernel_channel_group_api.c index 37f275b466..165a12f0e0 100644 --- a/src/nvidia/src/kernel/gpu/fifo/kernel_channel_group_api.c +++ b/src/nvidia/src/kernel/gpu/fifo/kernel_channel_group_api.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -1431,20 +1431,3 @@ kchangrpapiCtrlCmdGetInterleaveLevel_IMPL return NV_OK; } - -/*! - * @brief Handler for NVA06C_CTRL_CMD_INTERNAL_PROMOTE_FAULT_METHOD_BUFFERS - * - * This is currently un-implemented as split change for bug 200691429 - */ -NV_STATUS -kchangrpapiCtrlCmdInternalPromoteFaultMethodBuffers_IMPL -( - KernelChannelGroupApi *pKernelChannelGroupApi, - NVA06C_CTRL_INTERNAL_PROMOTE_FAULT_METHOD_BUFFERS_PARAMS *pParams -) -{ - NV_PRINTF(LEVEL_INFO, - "bug 200691429: kchangrpapiCtrlCmdInternalPromoteFaultMethodBuffers_IMPL received\n"); - return NV_OK; -} diff --git a/src/nvidia/src/kernel/gpu/fifo/kernel_fifo.c b/src/nvidia/src/kernel/gpu/fifo/kernel_fifo.c index 15e2498ded..363fa59266 100644 --- a/src/nvidia/src/kernel/gpu/fifo/kernel_fifo.c +++ b/src/nvidia/src/kernel/gpu/fifo/kernel_fifo.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -40,6 +40,8 @@ #include "vgpu/vgpu_events.h" #include "nvRmReg.h" +#include "nvmisc.h" + #include "class/cl0080.h" #include "class/cl2080.h" #include "class/cl208f.h" @@ -49,6 +51,12 @@ #define KFIFO_EHEAP_OWNER NvU32_BUILD('f','i','f','o') +// +// Reserve some channels to be used by GSP +// Currently used by CeUtils only +// +#define KFIFO_NUM_GSP_RESERVED_CHANNELS 1 + static EHeapOwnershipComparator _kfifoUserdOwnerComparator; static NV_STATUS _kfifoChidMgrAllocChidHeaps(OBJGPU *pGpu, @@ -709,6 +717,8 @@ kfifoChidMgrAllocChid_IMPL } else { + NvU64 rangeLo, rangeHi, base, size; + // // Legacy / SRIOV vGPU Host, SRIOV guest, baremetal CPU RM, GSP FW, GSP // client allocate from global heap @@ -783,6 +793,27 @@ kfifoChidMgrAllocChid_IMPL offsetAlign = internalIdx; } + pChidMgr->pGlobalChIDHeap->eheapGetBase(pChidMgr->pGlobalChIDHeap, &base); + pChidMgr->pGlobalChIDHeap->eheapGetSize(pChidMgr->pGlobalChIDHeap, &size); + + rangeLo = base; + rangeHi = base + size - 1; + if (!IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu)) + { + // Reserve channels for GSP unless it's VGPU host + if (pKernelChannel->bGspOwned) + { + rangeHi = rangeLo + KFIFO_NUM_GSP_RESERVED_CHANNELS - 1; + } + else if (RMCFG_FEATURE_PLATFORM_GSP || IS_GSP_CLIENT(pGpu)) + { + rangeLo += KFIFO_NUM_GSP_RESERVED_CHANNELS; + } + } + + NV_ASSERT_OK_OR_RETURN( + pChidMgr->pGlobalChIDHeap->eheapSetAllocRange(pChidMgr->pGlobalChIDHeap, rangeLo, rangeHi)); + status = pChidMgr->pGlobalChIDHeap->eheapAlloc( pChidMgr->pGlobalChIDHeap, // This Heap KFIFO_EHEAP_OWNER, // owner @@ -1946,6 +1977,7 @@ kfifoGetHostDeviceInfoTable_KERNEL ) { NV_STATUS status = NV_OK; + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); NvHandle hClient = NV01_NULL_OBJECT; NvHandle hObject = NV01_NULL_OBJECT; NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_PARAMS *pParams; @@ -1962,31 +1994,23 @@ kfifoGetHostDeviceInfoTable_KERNEL NV2080_CTRL_FIFO_DEVICE_ENTRY entries[NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_MAX_DEVICES]; } *pLocals; - - NV_ASSERT_OR_RETURN(IS_VIRTUAL(pGpu) || IS_GSP_CLIENT(pGpu), - NV_ERR_NOT_SUPPORTED); - - // RPC call for GSP will throw INVALID_CLIENT error with NULL handles - if (IS_GSP_CLIENT(pGpu)) + if (!IS_MIG_IN_USE(pGpu)) { - if (!IS_MIG_IN_USE(pGpu)) - { - hClient = pGpu->hInternalClient; - hObject = pGpu->hInternalSubdevice; - } - else - { - RsClient *pClient = RES_GET_CLIENT(pMigDevice); - Subdevice *pSubdevice; + hClient = pGpu->hInternalClient; + hObject = pGpu->hInternalSubdevice; + } + else + { + RsClient *pClient = RES_GET_CLIENT(pMigDevice); + Subdevice *pSubdevice; - NV_ASSERT_OK_OR_RETURN( - subdeviceGetByInstance(pClient, RES_GET_HANDLE(pMigDevice), 0, &pSubdevice)); + NV_ASSERT_OK_OR_RETURN( + subdeviceGetByInstance(pClient, RES_GET_HANDLE(pMigDevice), 0, &pSubdevice)); - GPU_RES_SET_THREAD_BC_STATE(pSubdevice); + GPU_RES_SET_THREAD_BC_STATE(pSubdevice); - hClient = pClient->hClient; - hObject = RES_GET_HANDLE(pSubdevice); - } + hClient = pClient->hClient; + hObject = RES_GET_HANDLE(pSubdevice); } // Allocate pFetchedTable and params on the heap to avoid stack overflow @@ -2008,13 +2032,12 @@ kfifoGetHostDeviceInfoTable_KERNEL portMemSet(pParams, 0x0, sizeof(*pParams)); pParams->baseIndex = device; - NV_RM_RPC_CONTROL(pGpu, - hClient, - hObject, - NV2080_CTRL_CMD_FIFO_GET_DEVICE_INFO_TABLE, - pParams, - sizeof(*pParams), - status); + status = pRmApi->Control(pRmApi, + hClient, + hObject, + NV2080_CTRL_CMD_FIFO_GET_DEVICE_INFO_TABLE, + pParams, + sizeof(*pParams)); if (status != NV_OK) goto cleanup; @@ -3021,64 +3044,57 @@ kfifoTriggerPostSchedulingEnableCallback_IMPL { NV_STATUS status = NV_OK; FifoSchedulingHandlerEntry *pEntry; - NvBool bFirstPass = NV_TRUE; - NvBool bRetry; + NvBool bRetry = NV_FALSE; - do + for (pEntry = listHead(&pKernelFifo->postSchedulingEnableHandlerList); + pEntry != NULL; + pEntry = listNext(&pKernelFifo->postSchedulingEnableHandlerList, pEntry)) { - NvBool bMadeProgress = NV_FALSE; + NV_ASSERT_OR_ELSE(pEntry->pCallback != NULL, + status = NV_ERR_INVALID_STATE; break;); - bRetry = NV_FALSE; + pEntry->bHandled = NV_FALSE; + status = pEntry->pCallback(pGpu, pEntry->pCallbackParam); - for (pEntry = listHead(&pKernelFifo->postSchedulingEnableHandlerList); - pEntry != NULL; - pEntry = listNext(&pKernelFifo->postSchedulingEnableHandlerList, pEntry)) - { - NV_ASSERT_OR_ELSE(pEntry->pCallback != NULL, - status = NV_ERR_INVALID_STATE; break;); + // Retry mechanism: Some callbacks depend on other callbacks in this list. + bRetry = bRetry || (status == NV_WARN_MORE_PROCESSING_REQUIRED); - if (bFirstPass) - { - // Reset bHandled set by previous call (fore example, for dor suspend-resume) - pEntry->bHandled = NV_FALSE; - } - else if (pEntry->bHandled) - { - continue; - } + if (status == NV_WARN_MORE_PROCESSING_REQUIRED) + // Quash retry status + status = NV_OK; + else if (status == NV_OK) + // Successfully handled, no need to retry + pEntry->bHandled = NV_TRUE; + else + // Actual error, abort + break; + } - status = pEntry->pCallback(pGpu, pEntry->pCallbackParam); + // If we hit an actual error or completed everything successfully, return early. + if ((status != NV_OK) || !bRetry) + return status; - if (status == NV_WARN_MORE_PROCESSING_REQUIRED) - { - // Retry mechanism: Some callbacks depend on other callbacks in this list. - bRetry = NV_TRUE; - // Quash retry status - status = NV_OK; - } - else if (status == NV_OK) - { - // Successfully handled, no need to retry - pEntry->bHandled = NV_TRUE; - bMadeProgress = NV_TRUE; - } - else - { - // Actual error, abort - NV_ASSERT(0); - break; - } - } + // Second pass, retry anything that asked nicely to be deferred + for (pEntry = listHead(&pKernelFifo->postSchedulingEnableHandlerList); + pEntry != NULL; + pEntry = listNext(&pKernelFifo->postSchedulingEnableHandlerList, pEntry)) + { + NV_ASSERT_OR_ELSE(pEntry->pCallback != NULL, + status = NV_ERR_INVALID_STATE; break;); - // We are stuck in a loop, and all remaining callbacks are returning NV_WARN_MORE_PROCESSING_REQUIRED - NV_ASSERT_OR_RETURN(bMadeProgress || status != NV_OK, NV_ERR_INVALID_STATE); + // Skip anything that was completed successfully + if (pEntry->bHandled) + continue; - bFirstPass = NV_FALSE; - } while (bRetry && status == NV_OK); + NV_CHECK_OK_OR_ELSE(status, LEVEL_ERROR, + pEntry->pCallback(pGpu, pEntry->pCallbackParam), + break; ); + } return status; } + /*! * @brief Notify handlers that scheduling will soon be disabled. * @@ -3096,60 +3112,53 @@ kfifoTriggerPreSchedulingDisableCallback_IMPL { NV_STATUS status = NV_OK; FifoSchedulingHandlerEntry *pEntry; - NvBool bFirstPass = NV_TRUE; - NvBool bRetry; + NvBool bRetry = NV_FALSE; - do + // First pass + for (pEntry = listHead(&pKernelFifo->preSchedulingDisableHandlerList); + pEntry != NULL; + pEntry = listNext(&pKernelFifo->preSchedulingDisableHandlerList, pEntry)) { - NvBool bMadeProgress = NV_FALSE; + NV_ASSERT_OR_ELSE(pEntry->pCallback != NULL, + status = NV_ERR_INVALID_STATE; break;); - bRetry = NV_FALSE; + pEntry->bHandled = NV_FALSE; + status = pEntry->pCallback(pGpu, pEntry->pCallbackParam); - for (pEntry = listHead(&pKernelFifo->preSchedulingDisableHandlerList); - pEntry != NULL; - pEntry = listNext(&pKernelFifo->preSchedulingDisableHandlerList, pEntry)) - { - NV_ASSERT_OR_ELSE(pEntry->pCallback != NULL, - status = NV_ERR_INVALID_STATE; break;); + // Retry mechanism: Some callbacks depend on other callbacks in this list. + bRetry = bRetry || (status == NV_WARN_MORE_PROCESSING_REQUIRED); - if (bFirstPass) - { - // Reset bHandled set by previous call (fore example, for dor suspend-resume) - pEntry->bHandled = NV_FALSE; - } - else if (pEntry->bHandled) - { - continue; - } + if (status == NV_WARN_MORE_PROCESSING_REQUIRED) + // Quash retry status + status = NV_OK; + else if (status == NV_OK) + // Successfully handled, no need to retry + pEntry->bHandled = NV_TRUE; + else + // Actual error, abort + break; + } - status = pEntry->pCallback(pGpu, pEntry->pCallbackParam); + // If we hit an actual error or completed everything successfully, return early. + if ((status != NV_OK) || !bRetry) + return status; - if (status == NV_WARN_MORE_PROCESSING_REQUIRED) - { - // Retry mechanism: Some callbacks depend on other callbacks in this list. - bRetry = NV_TRUE; - // Quash retry status - status = NV_OK; - } - else if (status == NV_OK) - { - // Successfully handled, no need to retry - pEntry->bHandled = NV_TRUE; - bMadeProgress = NV_TRUE; - } - else - { - // Actual error, abort - NV_ASSERT(0); - break; - } - } + // Second pass, retry anything that asked nicely to be deferred + for (pEntry = listHead(&pKernelFifo->preSchedulingDisableHandlerList); + pEntry != NULL; + pEntry = listNext(&pKernelFifo->preSchedulingDisableHandlerList, pEntry)) + { + NV_ASSERT_OR_ELSE(pEntry->pCallback != NULL, + status = NV_ERR_INVALID_STATE; break;); - // We are stuck in a loop, and all remaining callbacks are returning NV_WARN_MORE_PROCESSING_REQUIRED - NV_ASSERT_OR_RETURN(bMadeProgress || status != NV_OK, NV_ERR_INVALID_STATE); + // Skip anything that was completed successfully + if (pEntry->bHandled) + continue; - bFirstPass = NV_FALSE; - } while (bRetry && status == NV_OK); + NV_CHECK_OK_OR_ELSE(status, LEVEL_ERROR, + pEntry->pCallback(pGpu, pEntry->pCallbackParam), + break; ); + } return status; } @@ -3176,7 +3185,7 @@ kfifoGetVChIdForSChId_FWCLIENT NV_CHECK_OR_RETURN(LEVEL_INFO, IS_GFID_VF(gfid), NV_OK); NV_ASSERT_OK_OR_RETURN(vgpuGetCallingContextKernelHostVgpuDevice(pGpu, &pKernelHostVgpuDevice)); NV_ASSERT_OR_RETURN(pKernelHostVgpuDevice->gfid == gfid, NV_ERR_INVALID_ARGUMENT); - NV_ASSERT_OR_RETURN(engineId < (sizeof(pKernelHostVgpuDevice->chidOffset) / sizeof(pKernelHostVgpuDevice->chidOffset[0])), + NV_ASSERT_OR_RETURN(engineId < (NV_ARRAY_ELEMENTS(pKernelHostVgpuDevice->chidOffset)), NV_ERR_INVALID_STATE); NV_ASSERT_OR_RETURN(pKernelHostVgpuDevice->chidOffset[engineId] != 0, NV_ERR_INVALID_STATE); @@ -3624,3 +3633,4 @@ kfifoGetEngineTypeFromPbdmaFaultId_IMPL *pRmEngineType = RM_ENGINE_TYPE_NULL; return NV_ERR_OBJECT_NOT_FOUND; } + diff --git a/src/nvidia/src/kernel/gpu/fifo/kernel_fifo_ctrl.c b/src/nvidia/src/kernel/gpu/fifo/kernel_fifo_ctrl.c index e021cb83c6..91a53d43fc 100644 --- a/src/nvidia/src/kernel/gpu/fifo/kernel_fifo_ctrl.c +++ b/src/nvidia/src/kernel/gpu/fifo/kernel_fifo_ctrl.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -109,6 +109,9 @@ deviceCtrlCmdFifoIdleChannels_IMPL CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); RmCtrlParams *pRmCtrlParams = pCallContext->pControlParams->pLegacyParams; + if (IS_VIRTUAL(pGpu)) + return NV_ERR_NOT_SUPPORTED; + // Check buffer size against maximum if (pParams->numChannels > NV0080_CTRL_CMD_FIFO_IDLE_CHANNELS_MAX_CHANNELS) return NV_ERR_INVALID_ARGUMENT; @@ -128,10 +131,10 @@ deviceCtrlCmdFifoIdleChannels_IMPL } // - // Send RPC if running in Guest/CPU-RM. Do this manually instead of ROUTE_TO_PHYSICAL + // Send RPC if running in CPU-RM. Do this manually instead of ROUTE_TO_PHYSICAL // so that we can acquire the GPU lock in CPU-RM first. // - if (IS_VIRTUAL(pGpu) || IS_GSP_CLIENT(pGpu)) + if (IS_GSP_CLIENT(pGpu)) { NV_RM_RPC_CONTROL(pGpu, pRmCtrlParams->hClient, @@ -790,7 +793,7 @@ subdeviceCtrlCmdFifoDisableChannelsForKeyRotation_IMPL NV_CHECK_OR_RETURN(LEVEL_INFO, pDisableChannelParams->numChannels <= NV_ARRAY_ELEMENTS(pDisableChannelParams->hChannelList), NV_ERR_INVALID_ARGUMENT); - ct_assert(NV_ARRAY_ELEMENTS(pDisableChannelParams->hClientList) == \ + ct_assert(NV_ARRAY_ELEMENTS(pDisableChannelParams->hClientList) == NV_ARRAY_ELEMENTS(pDisableChannelParams->hChannelList)); // Send RPC to handle message on Host-RM @@ -834,20 +837,129 @@ subdeviceCtrlCmdFifoDisableChannelsForKeyRotation_IMPL } kchannelDisableForKeyRotation(pGpu, pKernelChannel, NV_TRUE); kchannelEnableAfterKeyRotation(pGpu, pKernelChannel, pDisableChannelParams->bEnableAfterKeyRotation); + if (IS_VIRTUAL(pGpu) || IS_GSP_CLIENT(pGpu)) + { + NvU32 h2dKey, d2hKey; + ConfidentialCompute *pConfCompute = GPU_GET_CONF_COMPUTE(pGpu); + NV_ASSERT_OK_OR_RETURN(confComputeGetKeyPairByChannel_HAL(pGpu, pConfCompute, pKernelChannel, + &h2dKey, &d2hKey)); + KEY_ROTATION_STATUS state; + NV_ASSERT_OK_OR_RETURN(confComputeGetKeyRotationStatus(pConfCompute, h2dKey, &state)); + if (state == KEY_ROTATION_STATUS_PENDING) + { + NV_ASSERT_OK_OR_RETURN(confComputeCheckAndPerformKeyRotation(pGpu, pConfCompute, h2dKey, d2hKey)); + } + } + } + return status; +} + +NV_STATUS +subdeviceCtrlCmdFifoGetDeviceInfoTable_VF +( + Subdevice *pSubdevice, + NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_PARAMS *pParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); + VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); + NvU32 i = pParams->baseIndex / NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_MAX_ENTRIES; + + NV_ASSERT_OR_RETURN(pVSI != NULL, NV_ERR_INVALID_STATE); + + if (i >= MAX_ITERATIONS_DEVICE_INFO_TABLE) + { + return NV_ERR_INVALID_ARGUMENT; + } + + pParams->numEntries = pVSI->fifoDeviceInfoTable[i].numEntries; + if (pParams->numEntries > NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_MAX_ENTRIES) + { + return NV_ERR_INVALID_ARGUMENT; + } + + pParams->bMore = pVSI->fifoDeviceInfoTable[i].bMore; + + portMemCopy(&pParams->entries, + pParams->numEntries * sizeof(NV2080_CTRL_FIFO_DEVICE_ENTRY), + pVSI->fifoDeviceInfoTable[i].entries, + pParams->numEntries * sizeof(NV2080_CTRL_FIFO_DEVICE_ENTRY)); + + return NV_OK; +} + +NV_STATUS +deviceCtrlCmdFifoGetLatencyBufferSize_VF +( + Device *pDevice, + NV0080_CTRL_FIFO_GET_LATENCY_BUFFER_SIZE_PARAMS *pParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pDevice); + VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); + NvU32 i; + + NV_ASSERT_OR_RETURN(pVSI != NULL, NV_ERR_INVALID_STATE); + + for (i = 0; i < NV2080_ENGINE_TYPE_LAST_v1C_09; i++) + { + if (pParams->engineID == pVSI->fifoLatencyBufferSize[i].engineID) + { + pParams->gpEntries = pVSI->fifoLatencyBufferSize[i].gpEntries; + pParams->pbEntries = pVSI->fifoLatencyBufferSize[i].pbEntries; + break; + } } - if ((IS_VIRTUAL(pGpu) || IS_GSP_CLIENT(pGpu)) && - (pKernelChannel != NULL)) + NV_ASSERT_OR_RETURN(i < NV2080_ENGINE_TYPE_LAST_v1C_09, NV_ERR_INVALID_ARGUMENT); + + return NV_OK; +} + +NV_STATUS +deviceCtrlCmdFifoGetEngineContextProperties_VF +( + Device *pDevice, + NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *pParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pDevice); + VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); + NV_STATUS status = NV_OK; + + NV_ASSERT_OR_RETURN(pVSI != NULL, NV_ERR_INVALID_STATE); + + if (gpuIsClientRmAllocatedCtxBufferEnabled(pGpu)) { - NvU32 h2dKey, d2hKey; - ConfidentialCompute *pConfCompute = GPU_GET_CONF_COMPUTE(pGpu); - NV_ASSERT_OK_OR_RETURN(confComputeGetKeyPairByChannel_HAL(pGpu, pConfCompute, pKernelChannel, &h2dKey, &d2hKey)); - KEY_ROTATION_STATUS state; - NV_ASSERT_OK_OR_RETURN(confComputeGetKeyRotationStatus(pConfCompute, h2dKey, &state)); - if (state == KEY_ROTATION_STATUS_PENDING) + NvU32 size = 0; + NvU32 alignment = RM_PAGE_SIZE; + NvU32 engine; + + pParams->size = 0; + pParams->alignment = 0; + + engine = DRF_VAL(0080_CTRL_FIFO, _GET_ENGINE_CONTEXT_PROPERTIES, _ENGINE_ID, + pParams->engineId); + + switch (engine) { - NV_ASSERT_OK_OR_RETURN(confComputeCheckAndScheduleKeyRotation(pGpu, pConfCompute, h2dKey, d2hKey)); + case NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID_GRAPHICS: + case NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID_GRAPHICS_ZCULL: + case NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID_GRAPHICS_PREEMPT: + case NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID_GRAPHICS_SPILL: + case NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID_GRAPHICS_PAGEPOOL: + case NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID_GRAPHICS_BETACB: + case NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID_GRAPHICS_RTV: + pParams->size = NV_MAX(pVSI->ctxBuffInfo.engineContextBuffersInfo[0].engine[engine].size, size); + pParams->alignment = NV_MAX(pVSI->ctxBuffInfo.engineContextBuffersInfo[0].engine[engine].alignment, alignment); + status = NV_OK; + break; + + default: + status = NV_ERR_NOT_SUPPORTED; } + return status; } - return status; + + return NV_ERR_NOT_SUPPORTED; } diff --git a/src/nvidia/src/kernel/gpu/fifo/kernel_fifo_init.c b/src/nvidia/src/kernel/gpu/fifo/kernel_fifo_init.c index b9c7f515dc..641a173dc8 100644 --- a/src/nvidia/src/kernel/gpu/fifo/kernel_fifo_init.c +++ b/src/nvidia/src/kernel/gpu/fifo/kernel_fifo_init.c @@ -91,6 +91,22 @@ kfifoStateLoad_IMPL } } + // Send RPC to GSP-RM to resume scheduling + if (IS_GSP_CLIENT(pGpu) && (flags & GPU_STATE_FLAGS_PM_TRANSITION)) + { + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING_PARAMS fifoToggleActiveChannelSchedulingParam; + fifoToggleActiveChannelSchedulingParam.bDisableActiveChannels = NV_FALSE; + + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + pRmApi->Control(pRmApi, + pGpu->hInternalClient, + pGpu->hInternalSubdevice, + NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING, + &fifoToggleActiveChannelSchedulingParam, + sizeof(fifoToggleActiveChannelSchedulingParam))); + } + return NV_OK; } @@ -116,6 +132,22 @@ kfifoStateUnload_IMPL } } + // Send RPC to GSP-RM to disable active channels + if (IS_GSP_CLIENT(pGpu) && (flags & GPU_STATE_FLAGS_PM_TRANSITION)) + { + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING_PARAMS fifoToggleActiveChannelSchedulingParam; + fifoToggleActiveChannelSchedulingParam.bDisableActiveChannels = NV_TRUE; + + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + pRmApi->Control(pRmApi, + pGpu->hInternalClient, + pGpu->hInternalSubdevice, + NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING, + &fifoToggleActiveChannelSchedulingParam, + sizeof(fifoToggleActiveChannelSchedulingParam))); + } + return NV_OK; } diff --git a/src/nvidia/src/kernel/gpu/fsp/arch/hopper/kern_fsp_gh100.c b/src/nvidia/src/kernel/gpu/fsp/arch/hopper/kern_fsp_gh100.c index 050280de13..92958c6c17 100644 --- a/src/nvidia/src/kernel/gpu/fsp/arch/hopper/kern_fsp_gh100.c +++ b/src/nvidia/src/kernel/gpu/fsp/arch/hopper/kern_fsp_gh100.c @@ -32,6 +32,7 @@ #include "gpu/gsp/kernel_gsp.h" #include "gpu/mem_mgr/mem_mgr.h" #include "gpu/pmu/kern_pmu.h" +#include "fsp/nvdm_payload_cmd_response.h" #include "published/hopper/gh100/dev_fsp_pri.h" #include "published/hopper/gh100/dev_fsp_addendum.h" diff --git a/src/nvidia/src/kernel/gpu/fsp/kern_fsp.c b/src/nvidia/src/kernel/gpu/fsp/kern_fsp.c index 408fc27cb4..ae40db9e78 100644 --- a/src/nvidia/src/kernel/gpu/fsp/kern_fsp.c +++ b/src/nvidia/src/kernel/gpu/fsp/kern_fsp.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,23 +29,39 @@ */ #include "gpu/gpu.h" #include "gpu/fsp/kern_fsp.h" +#include "os/os.h" #include "nvrm_registry.h" +#include "gpu_mgr/gpu_mgr.h" #if RMCFG_MODULE_ENABLED (GSP) #include "gpu/gsp/gsp.h" #include "objflcnable.h" #endif +#define ASYNC_FSP_POLL_PERIOD_MS 50 + /*! * Local object related functions */ static void kfspInitRegistryOverrides(OBJGPU *, KernelFsp *); - +static NV_STATUS kfspWaitForResponse(OBJGPU *pGpu, KernelFsp *pKernelFsp); +static NV_INLINE void kfspSetResponseTimeout(OBJGPU *pGpu, KernelFsp *pKernelFsp); +static NV_INLINE NV_STATUS kfspCheckResponseTimeout(OBJGPU *pGpu, KernelFsp *pKernelFsp); +static NV_STATUS kfspSendMessage(OBJGPU *pGpu, KernelFsp *pKernelFsp, NvU8 *pPayload, NvU32 size, NvU32 nvdmType); static NV_STATUS kfspReadMessage(OBJGPU *pGpu, KernelFsp *pKernelFsp, NvU8 *pPayloadBuffer, NvU32 payloadBufferSize); +static NV_STATUS kfspPollForAsyncResponse(OBJGPU *pGpu, OBJTMR *pTmr, TMR_EVENT *pEvent); +static void kfspProcessAsyncResponseCallback(NvU32 gpuInstance, void *pCallbackArgs); +static void kfspProcessAsyncResponse(OBJGPU *pGpu,KernelFsp *pKernelFsp); +static void kfspExecuteAsyncRpcCallback(KernelFsp *pKernelFsp, NV_STATUS status); +static NV_STATUS kfspScheduleAsyncResponseCheck(OBJGPU *pGpu, KernelFsp *pKernelFsp, + AsyncRpcCallback callback, void *pCallbackArgs, + NvU8 *pBuffer, NvU32 bufferSize); +static void kfspClearAsyncResponseState(KernelFsp *pKernelFsp); NV_STATUS kfspConstructEngine_IMPL(OBJGPU *pGpu, KernelFsp *pKernelFsp, ENGDESCRIPTOR engDesc) { + NV_STATUS status; // Initialize based on registry keys kfspInitRegistryOverrides(pGpu, pKernelFsp); @@ -54,7 +70,15 @@ kfspConstructEngine_IMPL(OBJGPU *pGpu, KernelFsp *pKernelFsp, ENGDESCRIPTOR engD NV_PRINTF(LEVEL_WARNING, "KernelFsp is disabled\n"); return NV_ERR_OBJECT_NOT_FOUND; } - return NV_OK; + + kfspClearAsyncResponseState(pKernelFsp); + + OBJTMR *pTmr = GPU_GET_TIMER(pGpu); + status = tmrEventCreate(pTmr, &(pKernelFsp->pPollEvent), + kfspPollForAsyncResponse, NULL, + TMR_FLAGS_NONE); + + return status; } /*! @@ -113,28 +137,6 @@ kfspInitRegistryOverrides } -/*! - * @brief FSP State Initialization. - * - * Initializes all software states including allocating the dbg memory surface - * and the initialization of FSP HAL layer. - * - * @param[in] pGpu GPU object pointer - * @param[in] pKernelFsp FSP object pointer - * - * @return 'NV_OK' if state-initialization was successful. - * @return other bubbles up errors from @ref kfspStateInitHal_HAL on failure - */ -NV_STATUS -kfspStateInitUnlocked_IMPL -( - OBJGPU *pGpu, - KernelFsp *pKernelFsp -) -{ - return NV_OK; -} - /*! * @brief Clean up objects used when sending GSP-FMC and FRTS info to FSP * @@ -148,6 +150,9 @@ kfspCleanupBootState_IMPL KernelFsp *pKernelFsp ) { + OBJTMR *pTmr = GPU_GET_TIMER(pGpu); + tmrEventDestroy(pTmr, pKernelFsp->pPollEvent); + portMemFree(pKernelFsp->pCotPayload); pKernelFsp->pCotPayload = NULL; @@ -201,26 +206,6 @@ kfspStateDestroy_IMPL } } -/*! - * @brief Override default behaviour of reset - * - * @param[in] pGpu GPU object pointer - * @param[in] pKernelFsp FSP object pointer - */ -void -kfspSecureReset_IMPL -( - OBJGPU *pGpu, - KernelFsp *pKernelFsp -) -{ - // Should not reset FSP - NV_PRINTF(LEVEL_ERROR, "FSP cannot be reset by CPU.\n"); - NV_ASSERT(0); - return; -} - - /*! * @brief Check if FSP RM command queue is empty * @@ -341,22 +326,184 @@ kfspPollForResponse_IMPL KernelFsp *pKernelFsp ) { - RMTIMEOUT timeout; + kfspSetResponseTimeout(pGpu, pKernelFsp); + return kfspWaitForResponse(pGpu, pKernelFsp); +} + +/*! + * @brief Wait for response from FSP via RM message queue + * + * @param[in] pGpu OBJGPU pointer + * @param[in] pKernelFsp KernelFsp pointer + * + * @return NV_OK, or NV_ERR_TIMEOUT + */ +static NV_STATUS +kfspWaitForResponse +( + OBJGPU *pGpu, + KernelFsp *pKernelFsp +) +{ NV_STATUS status = NV_OK; // Poll for message queue to wait for FSP's reply - gpuSetTimeout(pGpu, GPU_TIMEOUT_DEFAULT, &timeout, GPU_TIMEOUT_FLAGS_OSTIMER | GPU_TIMEOUT_FLAGS_BYPASS_THREAD_STATE); while (kfspIsMsgQueueEmpty(pGpu, pKernelFsp)) { - if (gpuCheckTimeout(pGpu, &timeout) == NV_ERR_TIMEOUT) + osSpinLoop(); + + status = kfspCheckResponseTimeout(pGpu, pKernelFsp); + if (status != NV_OK) { - NV_PRINTF(LEVEL_ERROR, "FSP command timed out\n"); - return NV_ERR_TIMEOUT; + if ((status == NV_ERR_TIMEOUT) && + !kfspIsMsgQueueEmpty(pGpu, pKernelFsp)) + { + status = NV_OK; + } + else + { + NV_PRINTF(LEVEL_ERROR, "FSP command timed out\n"); + } + break; + } + } + + return status; +} + +/*! + * @brief Set a timeout for response from FSP + * + * @param[in] pGpu OBJGPU pointer + * @param[in] pKernelFsp KernelFsp pointer + */ +static NV_INLINE void +kfspSetResponseTimeout +( + OBJGPU *pGpu, + KernelFsp *pKernelFsp +) +{ + gpuSetTimeout(pGpu, GPU_TIMEOUT_DEFAULT, &(pKernelFsp->rpcTimeout), + GPU_TIMEOUT_FLAGS_OSTIMER | GPU_TIMEOUT_FLAGS_BYPASS_THREAD_STATE); +} + +/*! + * @brief Check for timeout for response from FSP + * + * @param[in] pGpu OBJGPU pointer + * @param[in] pKernelFsp KernelFsp pointer + * + * @return NV_OK, or NV_ERR_TIMEOUT + */ +static NV_INLINE NV_STATUS +kfspCheckResponseTimeout +( + OBJGPU *pGpu, + KernelFsp *pKernelFsp +) +{ + return gpuCheckTimeout(pGpu, &(pKernelFsp->rpcTimeout)); +} + +/*! + * @brief Send a MCTP message to FSP via EMEM + * + * @param[in] pGpu OBJGPU pointer + * @param[in] pKernelFsp KernelFsp pointer + * @param[in] pPayload Pointer to message payload + * @param[in] size Message payload size + * @param[in] nvdmType NVDM type of message being sent + * + * @return NV_OK, or NV_ERR_* + */ +static NV_STATUS +kfspSendMessage +( + OBJGPU *pGpu, + KernelFsp *pKernelFsp, + NvU8 *pPayload, + NvU32 size, + NvU32 nvdmType +) +{ + NvU32 dataSent, dataRemaining; + NvU32 packetPayloadCapacity; + NvU32 curPayloadSize; + NvU32 headerSize; + NvU32 fspEmemRmChannelSize; + NvBool bSinglePacket; + NV_STATUS status; + NvU8 *pBuffer = NULL; + NvU8 seq = 0; + NvU8 seid = 0; + + // Allocate buffer of same size as channel + fspEmemRmChannelSize = kfspGetRmChannelSize_HAL(pGpu, pKernelFsp); + pBuffer = portMemAllocNonPaged(fspEmemRmChannelSize); + NV_CHECK_OR_RETURN(LEVEL_ERROR, pBuffer != NULL, NV_ERR_NO_MEMORY); + portMemSet(pBuffer, 0, fspEmemRmChannelSize); + + // + // Check if message will fit in single packet + // We lose 2 DWORDS to MCTP and NVDM headers + // + headerSize = 2 * sizeof(NvU32); + packetPayloadCapacity = fspEmemRmChannelSize - headerSize; + bSinglePacket = (size <= packetPayloadCapacity); + + // First packet + seid = kfspNvdmToSeid_HAL(pGpu, pKernelFsp, nvdmType); + // SOM=1,EOM=?,SEID,SEQ=0 + ((NvU32 *)pBuffer)[0] = kfspCreateMctpHeader_HAL(pGpu, pKernelFsp, 1, + (NvU8)bSinglePacket, seid, seq); + ((NvU32 *)pBuffer)[1] = kfspCreateNvdmHeader_HAL(pGpu, pKernelFsp, nvdmType); + + curPayloadSize = NV_MIN(size, packetPayloadCapacity); + portMemCopy(pBuffer + headerSize, packetPayloadCapacity, pPayload, curPayloadSize); + + status = kfspSendPacket(pGpu, pKernelFsp, pBuffer, curPayloadSize + headerSize); + if (status != NV_OK) + { + goto failed; + } + + if (!bSinglePacket) + { + // Multi packet case + dataSent = curPayloadSize; + dataRemaining = size - dataSent; + headerSize = sizeof(NvU32); // No longer need NVDM header + packetPayloadCapacity = fspEmemRmChannelSize - headerSize; + + while (dataRemaining > 0) + { + NvBool bLastPacket = (dataRemaining <= packetPayloadCapacity); + curPayloadSize = (bLastPacket) ? dataRemaining : packetPayloadCapacity; + + portMemSet(pBuffer, 0, fspEmemRmChannelSize); + ((NvU32 *)pBuffer)[0] = kfspCreateMctpHeader_HAL(pGpu, pKernelFsp, 0, + (NvU8)bLastPacket, seid, + (++seq) % 4); + + portMemCopy(pBuffer + headerSize, packetPayloadCapacity, + pPayload + dataSent, curPayloadSize); + + status = kfspSendPacket(pGpu, pKernelFsp, pBuffer, curPayloadSize + headerSize); + if (status != NV_OK) + { + goto failed; + } + + dataSent += curPayloadSize; + dataRemaining -= curPayloadSize; } - osSpinLoop(); } +failed: + portMemFree(pBuffer); + return status; } @@ -558,85 +705,280 @@ kfspSendAndReadMessage_IMPL NvU32 responseBufferSize ) { - NvU32 dataSent, dataRemaining; - NvU32 packetPayloadCapacity; - NvU32 curPayloadSize; - NvU32 headerSize; - NvU32 fspEmemRmChannelSize; - NvBool bSinglePacket; NV_STATUS status; - NvU8 *pBuffer = NULL; - NvU8 seq = 0; - NvU8 seid = 0; - // Allocate buffer of same size as channel - fspEmemRmChannelSize = kfspGetRmChannelSize_HAL(pGpu, pKernelFsp); - pBuffer = portMemAllocNonPaged(fspEmemRmChannelSize); - NV_CHECK_OR_RETURN(LEVEL_ERROR, pBuffer != NULL, NV_ERR_NO_MEMORY); - portMemSet(pBuffer, 0, fspEmemRmChannelSize); + // If we are waiting for an async response, handle that first. + if (pKernelFsp->bBusy) + { + status = kfspWaitForResponse(pGpu, pKernelFsp); + if (status != NV_OK) + { + kfspExecuteAsyncRpcCallback(pKernelFsp, status); + } + else + { + kfspProcessAsyncResponse(pGpu, pKernelFsp); + } + } - // - // Check if message will fit in single packet - // We lose 2 DWORDS to MCTP and NVDM headers - // - headerSize = 2 * sizeof(NvU32); - packetPayloadCapacity = fspEmemRmChannelSize - headerSize; - bSinglePacket = (size <= packetPayloadCapacity); + status = kfspSendMessage(pGpu, pKernelFsp, pPayload, size, nvdmType); + if (status != NV_OK) + { + return status; + } - // First packet - seid = kfspNvdmToSeid_HAL(pGpu, pKernelFsp, nvdmType); - ((NvU32 *)pBuffer)[0] = kfspCreateMctpHeader_HAL(pGpu, pKernelFsp, 1, (NvU8)bSinglePacket, seid, seq); // SOM=1,EOM=?,SEID,SEQ=0 - ((NvU32 *)pBuffer)[1] = kfspCreateNvdmHeader_HAL(pGpu, pKernelFsp, nvdmType); + status = kfspPollForResponse(pGpu, pKernelFsp); + if (status != NV_OK) + { + return status; + } - curPayloadSize = NV_MIN(size, packetPayloadCapacity); - portMemCopy(pBuffer + headerSize, packetPayloadCapacity, pPayload, curPayloadSize); + return kfspReadMessage(pGpu, pKernelFsp, pResponsePayload, responseBufferSize);; +} - status = kfspSendPacket(pGpu, pKernelFsp, pBuffer, curPayloadSize + headerSize); +/*! + * @brief Send a MCTP message to FSP via EMEM, and read response asynchronously + * afterwards + * + * + * Response payload buffer is optional if response fits in a single packet. + * + * @param[in] pGpu OBJGPU pointer + * @param[in] pKernelFsp KernelFsp pointer + * @param[in] pPayload Pointer to message payload + * @param[in] size Message payload size + * @param[in] nvdmType NVDM type of message being sent + * @param[in] pResponsePayload Buffer in which to return response payload + * @param[in] responseBufferSize Response payload buffer size + * @param[in] callback Callback to call for this response + * @param[in] pCallbackArgs Args to be passed to the callback + * + * @return NV_OK, or NV_ERR_* + */ +NV_STATUS +kfspSendAndReadMessageAsync_IMPL +( + OBJGPU *pGpu, + KernelFsp *pKernelFsp, + NvU8 *pPayload, + NvU32 size, + NvU32 nvdmType, + NvU8 *pResponsePayload, + NvU32 responseBufferSize, + AsyncRpcCallback callback, + void *pCallbackArgs +) +{ + NV_STATUS status; + + if (pKernelFsp->bBusy) + { + return NV_ERR_BUSY_RETRY; + } + + status = kfspSendMessage(pGpu, pKernelFsp, pPayload, size, nvdmType); if (status != NV_OK) { - goto failed; + return status; } - if (!bSinglePacket) + status = kfspScheduleAsyncResponseCheck(pGpu, pKernelFsp, callback, pCallbackArgs, + pResponsePayload, responseBufferSize); + if (status != NV_OK) { - // Multi packet case - dataSent = curPayloadSize; - dataRemaining = size - dataSent; - headerSize = sizeof(NvU32); // No longer need NVDM header - packetPayloadCapacity = fspEmemRmChannelSize - headerSize; + NV_PRINTF(LEVEL_ERROR, "FSP queuing failed, status=%x\n", status); + } - while (dataRemaining > 0) - { - NvBool bLastPacket = (dataRemaining <= packetPayloadCapacity); - curPayloadSize = (bLastPacket) ? dataRemaining : packetPayloadCapacity; + return status; +} - portMemSet(pBuffer, 0, fspEmemRmChannelSize); - ((NvU32 *)pBuffer)[0] = kfspCreateMctpHeader_HAL(pGpu, pKernelFsp, 0, (NvU8)bLastPacket, seid, (++seq) % 4); +/*! + * @brief Polls for a response from the FSP and takes the appropriate + * action. This is called repeatedly by a timer when we are + * expecting an async response from the FSP. + * + * @param[in] pGpu OBJGPU pointer + * @param[in] pTmr Timer object pointer + * @param[in] pEvent Timer event pointer + * + * @return NV_OK, or NV_ERR_* + */ +static NV_STATUS +kfspPollForAsyncResponse +( + OBJGPU *pGpu, + OBJTMR *pTmr, + TMR_EVENT *pEvent +) +{ + NV_STATUS status = NV_OK; + KernelFsp *pKernelFsp = GPU_GET_KERNEL_FSP(pGpu); - portMemCopy(pBuffer + headerSize, packetPayloadCapacity, - pPayload + dataSent, curPayloadSize); + if (!pKernelFsp->bBusy) + { + return status; + } - status = kfspSendPacket(pGpu, pKernelFsp, pBuffer, curPayloadSize + headerSize); - if (status != NV_OK) - { - goto failed; - } + status = kfspCheckResponseTimeout(pGpu, pKernelFsp); - dataSent += curPayloadSize; - dataRemaining -= curPayloadSize; + if (!kfspIsMsgQueueEmpty(pGpu, pKernelFsp)) + { + status = osQueueWorkItemWithFlags(pGpu, kfspProcessAsyncResponseCallback, NULL, + OS_QUEUE_WORKITEM_FLAGS_LOCK_SEMA | + OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_DEVICE_RW); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "Failed to schedule work item, status=%x\n", status); + kfspExecuteAsyncRpcCallback(pKernelFsp, status); + return status; } + return NV_OK; } - status = kfspPollForResponse(pGpu, pKernelFsp); if (status != NV_OK) { - goto failed; + NV_PRINTF(LEVEL_ERROR, "FSP async command timed out\n"); + kfspExecuteAsyncRpcCallback(pKernelFsp, status); + return status; } - status = kfspReadMessage(pGpu, pKernelFsp, pResponsePayload, responseBufferSize); -failed: - portMemFree(pBuffer); + status = tmrEventScheduleRel(pTmr, pEvent, ASYNC_FSP_POLL_PERIOD_MS * 1000 * 1000); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "Failed to reschedule callback, status=%x\n", status); + kfspExecuteAsyncRpcCallback(pKernelFsp, status); + } return status; } + +/*! + * @brief Deferred work item callback that processes an asyc + * response from the FSP + * + * @param[in] gpuInstance GPU instance number + * @param[in] pCallbackArgs Unused + */ +static void +kfspProcessAsyncResponseCallback +( + NvU32 gpuInstance, + void *pCallbackArgs +) +{ + OBJGPU *pGpu = gpumgrGetGpu(gpuInstance); + KernelFsp *pKernelFsp = GPU_GET_KERNEL_FSP(pGpu); + kfspProcessAsyncResponse(pGpu, pKernelFsp); +} + +/*! + * @brief Handle the async response from the FSP + * + * @param[in] pGpu OBJGPU pointer + * @param[in] pKernelFsp KernelFsp pointer + */ +static void +kfspProcessAsyncResponse +( + OBJGPU *pGpu, + KernelFsp *pKernelFsp +) +{ + NV_STATUS status = kfspReadMessage(pGpu, pKernelFsp, pKernelFsp->rpcState.pResponseBuffer, + pKernelFsp->rpcState.responseBufferSize); + kfspExecuteAsyncRpcCallback(pKernelFsp, status); +} + +/*! + * @brief Execute the callback for the async FSP response. + * + * @param[in] pKernelFsp KernelFsp pointer + * @param[in] status Status of the FSP RPC + */ +static void +kfspExecuteAsyncRpcCallback +( + KernelFsp *pKernelFsp, + NV_STATUS status +) +{ + if (!pKernelFsp->bBusy) + { + return; + } + + if (pKernelFsp->rpcState.callback) + { + pKernelFsp->rpcState.callback(status, pKernelFsp->rpcState.pCallbackArgs); + } + + kfspClearAsyncResponseState(pKernelFsp); +} + +/*! + * @brief Set the state to service an FSP response and schedule + * a timer event to periodically poll the FSP. + * + * @param[in] pGpu OBJGPU pointer + * @param[in] pKernelFsp KernelFsp pointer + * @param[in] callback Callback to call for this response + * @param[in] pCallbackArgs Args to be passed to the callback + * @param[in] pBuffer Buffer in which to return response payload + * @param[in] bufferSize Response payload buffer size + * + * @return NV_OK, or NV_ERR_* + */ +static NV_STATUS +kfspScheduleAsyncResponseCheck +( + OBJGPU *pGpu, + KernelFsp *pKernelFsp, + AsyncRpcCallback callback, + void *pCallbackArgs, + NvU8 *pBuffer, + NvU32 bufferSize +) +{ + if (pKernelFsp->bBusy) + { + return NV_ERR_IN_USE; + } + + OBJTMR *pTmr = GPU_GET_TIMER(pGpu); + NV_STATUS status = tmrEventScheduleRel(pTmr, pKernelFsp->pPollEvent, + ASYNC_FSP_POLL_PERIOD_MS * 1000 * 1000); + if (status != NV_OK) + { + return status; + } + + pKernelFsp->rpcState.callback = callback; + pKernelFsp->rpcState.pCallbackArgs = pCallbackArgs; + pKernelFsp->rpcState.pResponseBuffer = pBuffer; + pKernelFsp->rpcState.responseBufferSize = bufferSize; + + kfspSetResponseTimeout(pGpu, pKernelFsp); + pKernelFsp->bBusy = NV_TRUE; + + return NV_OK; +} + +/*! + * @brief Clear the state associated with async FSP response + * + * @param[in] pKernelFsp KernelFsp pointer + */ +static void +kfspClearAsyncResponseState +( + KernelFsp *pKernelFsp +) +{ + pKernelFsp->bBusy = NV_FALSE; + + pKernelFsp->rpcState.callback = NULL; + pKernelFsp->rpcState.pCallbackArgs = NULL; + pKernelFsp->rpcState.pResponseBuffer = NULL; + pKernelFsp->rpcState.responseBufferSize = 0; +} diff --git a/src/nvidia/src/kernel/gpu/gpu.c b/src/nvidia/src/kernel/gpu/gpu.c index 5dd8458b06..08021e1357 100644 --- a/src/nvidia/src/kernel/gpu/gpu.c +++ b/src/nvidia/src/kernel/gpu/gpu.c @@ -49,6 +49,8 @@ #include "vgpu/rpc.h" #include "jt.h" +#include "nvmisc.h" + #include "ctrl/ctrl402c.h" // NV402C_CTRL_NUM_I2C_PORTS #include "ctrl/ctrl5070/ctrl5070chnc.h" // NV5070_CTRL_CMD_GET_PINSET_PEER_PEER_PINSET_NONE @@ -87,12 +89,6 @@ static NV_STATUS gpuDetermineVirtualMode(OBJGPU *); #include "g_odb.h" -typedef struct GPUCHILDINFO *PGPUCHILDINFO; -typedef struct GPUCHILDINFO GPUCHILDINFO; - -typedef struct GPUCHILDTYPE *PGPUCHILDTYPE; -typedef struct GPUCHILDTYPE GPUCHILDTYPE; - #define RMTRACE_ENGINE_PROFILE_EVENT(EventName, EngineId, ReadCount, WriteCount) \ { \ RMTRACE_PROBE4(generic, marker, \ @@ -107,6 +103,7 @@ static NV_STATUS gpuRemoveMissingEngines(OBJGPU *); // local static function static NV_STATUS _gpuChildrenPresentInit(OBJGPU *pGpu); static NV_STATUS gpuCreateChildObjects(OBJGPU *, NvBool); +static NV_STATUS gpuCreateObject(OBJGPU *pGpu, NVOC_CLASS_ID, NvU64, Dynamic **); static NV_STATUS gpuStatePreLoad(OBJGPU *, NvU32); static NV_STATUS gpuStatePostLoad(OBJGPU *, NvU32); static NV_STATUS gpuStatePreUnload(OBJGPU *, NvU32); @@ -114,7 +111,7 @@ static NV_STATUS gpuStatePostUnload(OBJGPU *, NvU32); static void gpuXlateHalImplToArchImpl(OBJGPU *, HAL_IMPLEMENTATION, NvU32 *, NvU32 *); static NvBool gpuSatisfiesTemporalOrder(OBJGPU *, HAL_IMPLEMENTATION); static NvBool gpuSatisfiesTemporalOrderMaskRev(OBJGPU *, HAL_IMPLEMENTATION, NvU32, NvU32, NvU32); -static NvBool gpuShouldCreateObject(OBJGPU *pGpu, GPUCHILDINFO *pChildInfo); +static NvBool gpuShouldCreateObject(OBJGPU *pGpu, NvU32 classId, NvU32 instance); static void gpuDestroyMissingEngine(OBJGPU *, OBJENGSTATE *); static void gpuRemoveMissingEngineClasses(OBJGPU *, NvU32); @@ -145,42 +142,7 @@ static inline void _setPlatformNoHostbridgeDetect(NvBool bValue) pPfm->setProperty(pPfm, PDB_PROP_PFM_NO_HOSTBRIDGE_DETECT, bValue); } -// Describes a child type (e.g.: classId(OBJCE)) -struct GPUCHILDTYPE -{ - NvBool bConstructEarly; // bConstructEarly objects are created in a separate step. FUSE must be created - // before BIF since we need to know the OPSB fuse value for enabling/disabling - // certain features in bifInitRegistryOverrides - NvU32 instances; - NvU32 gpuChildPtrOffset; - NVOC_CLASS_ID classId; -}; - -// List of all possible GPU offspring -static GPUCHILDTYPE gpuChildTypeList[] = -{ - #define GPU_CHILD(className, accessorName, numInstances, bConstructEarly, gpuField) \ - { bConstructEarly, numInstances, NV_OFFSETOF(OBJGPU, gpuField), classId(className) }, - - #include "gpu/gpu_child_list.h" -}; - -// Describes a child instance (e.g.: classId(OBJCE) instanceID #1) -struct GPUCHILDINFO -{ - NvBool bConstructEarly; - ENGDESCRIPTOR engDesc; - NvU32 gpuChildPtrOffset; - GPUCHILDTYPE *pChildType; -}; - -static PGPUCHILDTYPE gpuGetChildType(NVOC_CLASS_ID classId); -static NV_STATUS gpuGetChildInfo(NVOC_CLASS_ID classId, NvU32 instanceID, PGPUCHILDINFO pChildInfoOut); static NV_STATUS _gpuChildNvocClassInfoGet(OBJGPU *pGpu, NVOC_CLASS_ID classId, const NVOC_CLASS_INFO **ppClassInfo); -static Dynamic **gpuGetChildPtr(OBJGPU *pGpu, NvU32 gpuChildPtrOffset); - -#define GPU_NUM_CHILD_TYPES \ - ((sizeof(gpuChildTypeList) / sizeof(GPUCHILDTYPE))) void _gpuDetectNvswitchSupport @@ -838,48 +800,59 @@ gpuInitVmmuInfo OBJGPU *pGpu ) { - NV_STATUS status; - RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + pGpu->vmmuSegmentSize = 0; - NV2080_CTRL_GPU_GET_VMMU_SEGMENT_SIZE_PARAMS params; + if (!IS_VIRTUAL(pGpu)) + { + NV_STATUS status; + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + NV2080_CTRL_GPU_GET_VMMU_SEGMENT_SIZE_PARAMS params; - pGpu->vmmuSegmentSize = 0; + status = pRmApi->Control(pRmApi, pGpu->hInternalClient, pGpu->hInternalSubdevice, + NV2080_CTRL_CMD_GPU_GET_VMMU_SEGMENT_SIZE, + ¶ms, sizeof(params)); - status = pRmApi->Control(pRmApi, pGpu->hInternalClient, pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_GPU_GET_VMMU_SEGMENT_SIZE, - ¶ms, sizeof(params)); + if (status == NV_ERR_NOT_SUPPORTED) + { + // Leave segment size initialized to zero to signal no VMMU present on physical + return NV_OK; + } + else if (status != NV_OK) + { + return status; + } - if (status == NV_ERR_NOT_SUPPORTED) - { - // Leave segment size initialized to zero to signal no VMMU present on physical - return NV_OK; + pGpu->vmmuSegmentSize = params.vmmuSegmentSize; } - else if (status != NV_OK) + + else if (IS_VIRTUAL_WITH_SRIOV(pGpu)) { - return status; - } + VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); - pGpu->vmmuSegmentSize = params.vmmuSegmentSize; + pGpu->vmmuSegmentSize = pVSI->vgpuStaticProperties.vmmuSegmentSize; + } - return status; + return NV_OK; } +static NvU32 gpuGetDceClientInternalClientHandle(OBJGPU *pGpu) +{ + NvU32 hClient = RS_CLIENT_INTERNAL_HANDLE_BASE; + return hClient; +} static NV_STATUS _gpuAllocateInternalObjects ( OBJGPU *pGpu ) { + OBJSYS *pSys = SYS_GET_INSTANCE(); NV_STATUS status = NV_OK; if (IS_GSP_CLIENT(pGpu)) { if (IS_DCE_CLIENT(pGpu)) { - // - // NOTE: We add +1 to the client base because DCE-RM will also - // allocate internal objects, taking the !IS_GSP_CLIENT path below. - // - pGpu->hInternalClient = RS_CLIENT_INTERNAL_HANDLE_BASE + 1; + pGpu->hInternalClient = gpuGetDceClientInternalClientHandle(pGpu); pGpu->hInternalDevice = NV_GPU_INTERNAL_DEVICE_HANDLE; pGpu->hInternalSubdevice = NV_GPU_INTERNAL_SUBDEVICE_HANDLE; } @@ -893,13 +866,13 @@ static NV_STATUS _gpuAllocateInternalObjects pGpu->hInternalSubdevice = pGSCI->hInternalSubdevice; } - rmapiControlCacheSetGpuInstForObject(pGpu->hInternalClient, + rmapiControlCacheSetGpuAttrForObject(pGpu->hInternalClient, pGpu->hInternalSubdevice, - pGpu->gpuInstance); + pGpu); - rmapiControlCacheSetGpuInstForObject(pGpu->hInternalClient, + rmapiControlCacheSetGpuAttrForObject(pGpu->hInternalClient, pGpu->hInternalDevice, - pGpu->gpuInstance); + pGpu); } else { @@ -915,6 +888,28 @@ static NV_STATUS _gpuAllocateInternalObjects NV_PRINTF(LEVEL_INFO, "GPU-%d allocated hInternalClient=0x%08x\n", pGpu->gpuInstance, pGpu->hInternalClient); + // + // Allocate the internal client for lock stress testing if lock stress testing is + // enabled through the registry. + // + if (pSys->getProperty(pSys, PDB_PROP_SYS_ENABLE_RM_TEST_ONLY_CODE)) + { + RM_API *pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); + + NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, + pRmApi->AllocWithHandle(pRmApi, + NV01_NULL_OBJECT, + NV01_NULL_OBJECT, + NV01_NULL_OBJECT, + NV01_ROOT, + &pGpu->hInternalLockStressClient, + sizeof(pGpu->hInternalLockStressClient)), + done); + } + else + pGpu->hInternalLockStressClient = NV01_NULL_OBJECT; + + done: if (status != NV_OK) { @@ -929,6 +924,15 @@ static void _gpuFreeInternalObjects OBJGPU *pGpu ) { + // Free internal lock stress client if it was allocated + if (pGpu->hInternalLockStressClient != NV01_NULL_OBJECT) + { + RM_API *pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); + + pRmApi->Free(pRmApi, pGpu->hInternalLockStressClient, + pGpu->hInternalLockStressClient); + } + if (IS_GSP_CLIENT(pGpu)) { rmapiControlCacheFreeObjectEntry(pGpu->hInternalClient, pGpu->hInternalSubdevice); @@ -1084,45 +1088,6 @@ _gpuFreeEngineOrderList pEngineOrder->pClassDescriptors = NULL; } -/*! - * @brief Returns a pointer to the GPU's pointer to a child specified by its childInfo - * - * @param[in] pGpu OBJPGU pointer - * @param[in] pChildInfo Pointer to table entry - */ -static Dynamic** -gpuGetChildPtr(OBJGPU *pGpu, NvU32 gpuChildPtrOffset) -{ - return (Dynamic**)((NvU8*)pGpu + gpuChildPtrOffset); -} - -/*! - * @brief Looks up for an instance of engine - * - * @param[in] classId - * @param[in] instanceID - * @param[out] pChildInfoOut - */ -static NV_STATUS -gpuGetChildInfo(NVOC_CLASS_ID classId, NvU32 instanceID, PGPUCHILDINFO pChildInfoOut) -{ - PGPUCHILDTYPE pChildType; - - NV_ASSERT_OR_RETURN(pChildInfoOut, NV_ERR_INVALID_STATE); - - pChildType = gpuGetChildType(classId); - - NV_ASSERT_OR_RETURN(pChildType && (instanceID < pChildType->instances), NV_ERR_INVALID_OBJECT); - - pChildInfoOut->engDesc = MKENGDESC(classId, instanceID); - pChildInfoOut->bConstructEarly = pChildType->bConstructEarly; - pChildInfoOut->pChildType = pChildType; - - pChildInfoOut->gpuChildPtrOffset = pChildType->gpuChildPtrOffset + sizeof(void *) * instanceID; - - return NV_OK; -} - /*! * @brief For a given @ref OBJGPU, given the @ref NVOC_CLASS_ID for an object * that is a @ref OBJGPU child, this function will return the @@ -1172,82 +1137,6 @@ _gpuChildNvocClassInfoGet return NV_ERR_INVALID_STATE; } -/*! - * @brief Looks up for a class in the table based on class id - * - * All classes are uniquely identified by their classId. - * - * @param[in] classId NVOC_CLASS_ID - */ -static PGPUCHILDTYPE -gpuGetChildType(NVOC_CLASS_ID classId) -{ - NvU32 i; - - for (i = 0; i < GPU_NUM_CHILD_TYPES; i++) - { - if (gpuChildTypeList[i].classId == classId) - { - return &gpuChildTypeList[i]; - } - } - - return NULL; -} - -/** - * @brief Initializes iterator for all possible ENGDESCRIPTORs that could be GPU - * children. - * - * @return GPU_CHILD_ITER - */ -GPU_CHILD_ITER -gpuGetPossibleEngDescriptorIter(void) -{ - GPU_CHILD_ITER it = {0}; - return it; -} - -/** - * @brief Iterator over all possible ENGDESCRIPTORs that could be GPU children. - * - * @param[in,out] pIt Iterator - * @param[out] pEngDesc The next engine descriptor - * - * @return NV_TRUE if *pEngDesc is valid, NV_FALSE if there are no more engines - */ -NvBool -gpuGetNextPossibleEngDescriptor(GPU_CHILD_ITER *pIt, ENGDESCRIPTOR *pEngDesc) -{ - PGPUCHILDTYPE pChildType; - GPUCHILDINFO childInfo; - - if (pIt->childTypeIdx >= GPU_NUM_CHILD_TYPES) - return NV_FALSE; - - pChildType = &gpuChildTypeList[pIt->childTypeIdx]; - - // Advance instance # - if (pIt->childInst < pChildType->instances) - { - NV_STATUS status = gpuGetChildInfo(pChildType->classId, pIt->childInst, &childInfo); - - NV_ASSERT(status == NV_OK); - - pIt->gpuChildPtrOffset = childInfo.gpuChildPtrOffset; - pIt->childInst++; - - *pEngDesc = childInfo.engDesc; - return NV_TRUE; - } - - pIt->childTypeIdx++; - pIt->childInst = 0; - - // Recurse (max depth is 1) - return gpuGetNextPossibleEngDescriptor(pIt, pEngDesc); -} - /*! * @brief Returns the unshared engstate for the child object with the given engine * descriptor (i.e.: the ENGSTATE without any of the SLI sharing hacks). @@ -1260,15 +1149,16 @@ gpuGetNextPossibleEngDescriptor(GPU_CHILD_ITER *pIt, ENGDESCRIPTOR *pEngDesc) POBJENGSTATE gpuGetEngstateNoShare_IMPL(OBJGPU *pGpu, ENGDESCRIPTOR engDesc) { - ENGSTATE_ITER it = gpuGetEngstateIter(pGpu); - OBJENGSTATE *pEngstate; - - while (gpuGetNextEngstate(pGpu, &it, &pEngstate)) + switch (ENGDESC_FIELD(engDesc, _CLASS)) { - if (engstateGetDescriptor(pEngstate) == engDesc) - { - return pEngstate; - } +#define GPU_CHILD_SINGLE_INST(className, accessorName, c, d, e) \ + case classId(className): \ + return dynamicCast((Dynamic*)accessorName(pGpu), OBJENGSTATE); +#define GPU_CHILD_MULTI_INST(className, accessorName, c, d, e) \ + case classId(className): \ + return dynamicCast((Dynamic*)accessorName(pGpu, ENGDESC_FIELD(engDesc, _INST)), OBJENGSTATE); + + #include "gpu/gpu_child_list.h" } return NULL; @@ -1311,41 +1201,41 @@ gpuGetKernelFifoShared_IMPL(OBJGPU *pGpu) !pGpu->getProperty(pGpu, PDB_PROP_GPU_SLI_LINK_ACTIVE)) ? gpumgrGetParentGPU(pGpu) : pGpu; - return pGpu->pKernelFifo; + return GPU_GET_KERNEL_FIFO_UC(pGpu); } /*! - * @brief Iterates over pGpu's child engstates. Returns NV_FALSE when there are - * no more. + * @brief Iterates over pGpu's children, returning those that inherit given classId * - * @param[in] pGpu OBJGPU pointer - * @param[in,out] pIt Iterator - * @param[out] ppEngState The next engstate + * @param[in] pGpu OBJGPU pointer + * @param[in,out] pIt Iterator + * @param[in] classId classId of class the given child has to inherit * - * @return NV_TRUE if ppEngstate is valid, NV_FALSE if no more found + * @return The next matching child, already cast to given type or NULL */ -NvBool -gpuGetNextEngstate_IMPL(OBJGPU *pGpu, ENGSTATE_ITER *pIt, OBJENGSTATE **ppEngstate) +void * +gpuGetNextChildOfTypeUnsafe_IMPL +( + OBJGPU *pGpu, + GPU_CHILD_ITER *pIt, + NvU32 classId +) { - ENGDESCRIPTOR engDesc; - OBJENGSTATE *pEngstate; - Dynamic **ppChild; + void *pDerivedChild; + const NvU32 numChildren = gpuGetNumChildren(pGpu); - while (gpuGetNextPossibleEngDescriptor(pIt, &engDesc)) + while (pIt->childIndex < numChildren) { - ppChild = gpuGetChildPtr(pGpu, pIt->gpuChildPtrOffset); - if (*ppChild != NULL) - { - pEngstate = dynamicCast(*ppChild, OBJENGSTATE); - if (pEngstate != NULL) - { - *ppEngstate = pEngstate; - return NV_TRUE; - } - } + Dynamic *pDynamicChild = gpuGetChild(pGpu, pIt->childIndex++); + if (pDynamicChild == NULL) + continue; + + pDerivedChild = objDynamicCastById(pDynamicChild, classId); + if (pDerivedChild != NULL) + return pDerivedChild; } - return NV_FALSE; + return NULL; } /*! @@ -1375,33 +1265,25 @@ gpuGetHosteng_IMPL(OBJGPU *pGpu, ENGDESCRIPTOR engDesc) /*! * @brief The generic object constructor - * - * @param[in] pGpu POBJGPU - * @param[in] classId NVOC_CLASS_ID - * @param[in] instanceID NvU32 - * */ -NV_STATUS -gpuCreateObject_IMPL +static NV_STATUS +gpuCreateObject ( OBJGPU *pGpu, NVOC_CLASS_ID classId, - NvU32 instanceID + NvU64 instanceID, + Dynamic **ppChildPtr ) { NV_STATUS status; OBJENGSTATE *pEngstate; - GPUCHILDINFO childInfo; - Dynamic **ppChildPtr; + ENGDESCRIPTOR engDesc = MKENGDESC(classId, instanceID); const NVOC_CLASS_INFO *pClassInfo; Dynamic *pConcreteChild = NULL; ENGSTATE_TRANSITION_DATA engTransitionData; - status = gpuGetChildInfo(classId, instanceID, &childInfo); - - NV_ASSERT_OR_RETURN(status == NV_OK, status); - - ppChildPtr = gpuGetChildPtr(pGpu, childInfo.gpuChildPtrOffset); + if (!gpuShouldCreateObject(pGpu, classId, instanceID)) + return NV_OK; NV_ASSERT_OK_OR_RETURN( _gpuChildNvocClassInfoGet(pGpu, classId, &pClassInfo)); @@ -1433,11 +1315,11 @@ gpuCreateObject_IMPL goto gpuCreateObject_exit; } - status = engstateConstructBase(pEngstate, pGpu, childInfo.engDesc); + status = engstateConstructBase(pEngstate, pGpu, engDesc); NV_CHECK_OR_GOTO(LEVEL_INFO, status == NV_OK, gpuCreateObject_exit); engstateLogStateTransitionPre(pEngstate, ENGSTATE_STATE_CONSTRUCT, &engTransitionData); - status = engstateConstructEngine(pGpu, pEngstate, childInfo.engDesc); + status = engstateConstructEngine(pGpu, pEngstate, engDesc); engstateLogStateTransitionPost(pEngstate, ENGSTATE_STATE_CONSTRUCT, &engTransitionData); // If engine is missing, free it immediately @@ -1453,6 +1335,14 @@ gpuCreateObject_IMPL *ppChildPtr = NULL; } + // + // It's not an error if the engine is simply unsupported. + // We correct the status here instead of propagating it to the caller, + // to minimize the generated code size since it directly impacts GSP-RM perf + // + if (status == NV_ERR_NOT_SUPPORTED) + status = NV_OK; + return status; } @@ -1464,11 +1354,7 @@ gpuDestruct_IMPL ) { HWBC_LIST *pGpuHWBCList = NULL; - int typeNum; - int instNum; - GPUCHILDTYPE *pChildTypeCur; - GPUCHILDINFO childInfoCur; - Dynamic **pChildPtr; + NvS32 i; // Call gpuacctDisableAccounting if accounting is enabled since it does some memory deallocation if (hypervisorIsVgxHyper() || @@ -1511,22 +1397,13 @@ gpuDestruct_IMPL } // Free children in reverse order from construction - for (typeNum = GPU_NUM_CHILD_TYPES - 1; typeNum >= 0; typeNum--) + for (i = (NvS32)gpuGetNumChildren(pGpu) - 1; i >= 0; i--) { - pChildTypeCur = &gpuChildTypeList[typeNum]; - - for (instNum = pChildTypeCur->instances - 1; instNum >= 0; instNum--) + Dynamic *pChild = gpuGetChild(pGpu, i); + if (pChild) { - NV_STATUS status; - - status = gpuGetChildInfo(pChildTypeCur->classId, instNum, &childInfoCur); - - NV_ASSERT(status == NV_OK); - - pChildPtr = gpuGetChildPtr(pGpu, childInfoCur.gpuChildPtrOffset); - - objDelete(*pChildPtr); - *pChildPtr = NULL; + objDelete(pChild); + pGpu->children.pChild[i] = NULL; } } @@ -1609,76 +1486,55 @@ gpuCreateChildObjects NvBool bConstructEarly ) { - PGPUCHILDTYPE pChildTypeCur; - GPUCHILDINFO childInfoCur; - NvU32 t, i; - NV_STATUS rmStatus = NV_OK; - - - for (t = 0; t < GPU_NUM_CHILD_TYPES; t++) - { - pChildTypeCur = &gpuChildTypeList[t]; - - for (i = 0; i < pChildTypeCur->instances; i++) - { - NVOC_CLASS_ID classId = pChildTypeCur->classId; - - rmStatus = gpuGetChildInfo(classId, i, &childInfoCur); - - NV_ASSERT(rmStatus == NV_OK); - - if ((bConstructEarly == childInfoCur.bConstructEarly) && - gpuShouldCreateObject(pGpu, - &childInfoCur)) - { - rmStatus = gpuCreateObject(pGpu, classId, i); + NV_STATUS status; - // RMCONFIG: Bail on errors unless the feature/object/engine/class - // is simply unsupported - if (rmStatus == NV_ERR_NOT_SUPPORTED) - { - rmStatus = NV_OK; - } - else if (rmStatus != NV_OK) - { - return rmStatus; - } - } - } +#define GPU_CHILD_SINGLE_INST(className, accessorName, numInstances, bEarly, gpuField) \ + if (bEarly == bConstructEarly) \ + { \ + status = gpuCreateObject(pGpu, classId(className), 0, \ + (Dynamic**)&pGpu->children.named.gpuField); \ + if (status != NV_OK) \ + return status; \ + } - // Bail out of both loops. - if (rmStatus != NV_OK) - { - break; - } +#define GPU_CHILD_MULTI_INST(className, accessorName, numInstances, bEarly, gpuField) \ + if (bEarly == bConstructEarly) \ + { \ + NvU64 i; \ + for (i = 0; i < numInstances; i++) \ + { \ + status = gpuCreateObject(pGpu, classId(className), i, \ + (Dynamic**)&pGpu->children.named.gpuField[i]); \ + if (status != NV_OK) \ + return status; \ + } \ } - return rmStatus; + #include "gpu/gpu_child_list.h" + + return NV_OK; } static NvBool gpuShouldCreateObject ( OBJGPU *pGpu, - GPUCHILDINFO *pChildInfo + NvU32 classId, + NvU32 instance ) { - NvBool retVal = NV_FALSE; NvU32 childIdx; // Let the HAL confirm that we should create an object for this engine. for (childIdx = 0; childIdx < pGpu->numChildrenPresent; childIdx++) { - if ((ENGDESC_FIELD(pChildInfo->engDesc, _CLASS) == - pGpu->pChildrenPresent[childIdx].classId)) + if ((classId == pGpu->pChildrenPresent[childIdx].classId)) { - retVal = (ENGDESC_FIELD(pChildInfo->engDesc, _INST) < - pGpu->pChildrenPresent[childIdx].instances); - break; + return (instance < pGpu->pChildrenPresent[childIdx].instances); } } - return retVal; + return NV_FALSE; } NvU32 @@ -1857,23 +1713,20 @@ gpuDestroyMissingEngine OBJENGSTATE *pEngstate ) { - GPUCHILDINFO childInfo; - Dynamic **pChildPtr; - NV_STATUS status; - ENGDESCRIPTOR engDesc; + Dynamic *pDynamic = objFullyDerive(pEngstate); + NvU32 i; engstateInitMissing(pGpu, pEngstate); + objDelete(pDynamic); - engDesc = engstateGetDescriptor(pEngstate); - - status = gpuGetChildInfo(ENGDESC_FIELD(engDesc, _CLASS), ENGDESC_FIELD(engDesc, _INST), &childInfo); - - NV_ASSERT_OR_RETURN_VOID(status == NV_OK); - - pChildPtr = gpuGetChildPtr(pGpu, childInfo.gpuChildPtrOffset); - - objDelete(*pChildPtr); - *pChildPtr = NULL; + for (i = 0; i < gpuGetNumChildren(pGpu); i++) + { + if (pGpu->children.pChild[i] == pDynamic) + { + pGpu->children.pChild[i] = NULL; + return; + } + } } /* @@ -2090,12 +1943,24 @@ gpuStatePreInit_IMPL NvU32 curEngDescIdx; NV_STATUS rmStatus = NV_OK; + // + // The prereq tracker must be kept track of in stateInit/Destroy because + // it accumulates dependencies throughout stateInit, stateInit may happen + // multiple times in SLI linking, and it and does not destroy the prereq list + // until the entire object is destroyed + // + NV_ASSERT_OK_OR_RETURN( + objCreate(&pGpu->pPrereqTracker, pGpu, PrereqTracker, pGpu)); + // Quadro, Geforce SMB, Tesla, VGX, Titan GPU detection NV_ASSERT_OK_OR_RETURN(gpuInitBranding(pGpu)); // Set PDB properties as per data from GSP. gpuInitProperties(pGpu); + // Set GC6 specific values in OBJGPU, as per static data from GSP. + gpuGetRtd3GC6Data(pGpu); + // // gpuDetermineSelfHostedMode must be called after gpuDetermineVirtualMode/kgspInitRm // where VGPU/GSP static info is populated as the self hosted detection mechanism @@ -2232,8 +2097,9 @@ gpuStateInit_IMPL LOCK_ASSERT_AND_RETURN(rmGpuLockIsOwner()); - // Do this before calling stateInit() of child engines. - objCreate(&pGpu->pPrereqTracker, pGpu, PrereqTracker, pGpu); + NV_ASSERT_OK_OR_GOTO(rmStatus, + gpuStateInitStartedSatisfy_HAL(pGpu, pGpu->pPrereqTracker), + gpuStateInit_exit); //!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! // TODO: Move the above code into appropriate ENGSTATE objects. @@ -2519,14 +2385,11 @@ gpuStateLoad_IMPL // Video logging is not a required feature, don't override existing status NV_CHECK(LEVEL_ERROR, gpuInitVideoLogging(pGpu) == NV_OK); - if (!IS_VIRTUAL(pGpu)) + rmStatus = gpuInitVmmuInfo(pGpu); + if (rmStatus != NV_OK) { - rmStatus = gpuInitVmmuInfo(pGpu); - if (rmStatus != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, "Error initializing VMMU info: 0x%0x\n", status); - goto gpuStateLoad_exit; - } + NV_PRINTF(LEVEL_ERROR, "Error initializing VMMU info: 0x%0x\n", status); + goto gpuStateLoad_exit; } { @@ -2767,7 +2630,7 @@ _gpuPropagateP2PCapsToAllGpus &pPeerInfo->p2pOptimalWriteCEs, pPeerInfo->p2pCapsStatus, &pPeerInfo->busPeerId, - NULL), + &pPeerInfo->busEgmPeerId), fail); } @@ -3373,9 +3236,7 @@ gpuStateDestroy_IMPL // DO NOT ADD MORE SPECIAL CASES HERE! //!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - // Do this after calling stateDestroy() of child engines. - objDelete(pGpu->pPrereqTracker); - pGpu->pPrereqTracker = NULL; + gpuStateInitStartedRetract_HAL(pGpu, pGpu->pPrereqTracker); // Clear the property indicating that the state initialization has been done if (rmStatus == NV_OK) @@ -3399,6 +3260,9 @@ gpuStateDestroy_IMPL gpuDestroyKernelVideoEngineList(pGpu); + objDelete(pGpu->pPrereqTracker); + pGpu->pPrereqTracker = NULL; + portMemFree(pGpu->pChipInfo); pGpu->pChipInfo = NULL; @@ -4757,6 +4621,7 @@ NV_STATUS gpuBuildKernelVideoEngineList_IMPL(OBJGPU *pGpu) RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); NV_STATUS status = NV_OK; NvU32 numKernelVideoEngines = 0; + VGPU_STATIC_INFO *pVSI = gpuGetStaticInfo(pGpu); NV2080_CTRL_GPU_GET_CONSTRUCTED_FALCON_INFO_PARAMS *pParams; NvU32 i; NvU32 data; @@ -4766,17 +4631,25 @@ NV_STATUS gpuBuildKernelVideoEngineList_IMPL(OBJGPU *pGpu) osReadRegistryDword(pGpu, NV_REG_STR_RM_VIDEO_EVENT_TRACE, &data); - pParams = portMemAllocNonPaged(sizeof(*pParams)); - NV_ASSERT_OR_RETURN(pParams != NULL, NV_ERR_NO_MEMORY); + if (IS_VIRTUAL(pGpu)) + { + NV_ASSERT_OR_RETURN(pVSI != NULL, NV_ERR_INVALID_STATE); + pParams = &pVSI->constructedFalconInfo; + } + else + { + pParams = portMemAllocNonPaged(sizeof(*pParams)); + NV_ASSERT_OR_RETURN(pParams != NULL, NV_ERR_NO_MEMORY); - portMemSet(pParams, 0, sizeof(*pParams)); + portMemSet(pParams, 0, sizeof(*pParams)); - NV_ASSERT_OK_OR_GOTO( - status, - pRmApi->Control(pRmApi, pGpu->hInternalClient, pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_GPU_GET_CONSTRUCTED_FALCON_INFO, - pParams, sizeof(*pParams)), - done); + NV_ASSERT_OK_OR_GOTO( + status, + pRmApi->Control(pRmApi, pGpu->hInternalClient, pGpu->hInternalSubdevice, + NV2080_CTRL_CMD_GPU_GET_CONSTRUCTED_FALCON_INFO, + pParams, sizeof(*pParams)), + done); + } for (i = 0; i < pParams->numConstructedFalcons; i++) { @@ -4802,7 +4675,10 @@ NV_STATUS gpuBuildKernelVideoEngineList_IMPL(OBJGPU *pGpu) pGpu->numKernelVideoEngines = numKernelVideoEngines; done: - portMemFree(pParams); + if (!IS_VIRTUAL(pGpu)) + { + portMemFree(pParams); + } if (status != NV_OK) { gpuDestroyKernelVideoEngineList(pGpu); diff --git a/src/nvidia/src/kernel/gpu/gpu_fabric_probe.c b/src/nvidia/src/kernel/gpu/gpu_fabric_probe.c index 2ca19f63bb..b17ad23275 100644 --- a/src/nvidia/src/kernel/gpu/gpu_fabric_probe.c +++ b/src/nvidia/src/kernel/gpu/gpu_fabric_probe.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -245,28 +245,6 @@ gpuFabricProbeGetFlaAddressRange return status; } -/* - * This function is used to get the peer GPU EGM address from FM to RM. - * FM passes only the upper 32 bits of the address. - */ -NV_STATUS -gpuFabricProbeGetEgmGpaAddress -( - GPU_FABRIC_PROBE_INFO_KERNEL *pGpuFabricProbeInfoKernel, - NvU64 *pEgmGpaAddress -) -{ - NV_STATUS status; - - status = _gpuFabricProbeFullSanityCheck(pGpuFabricProbeInfoKernel); - - NV_CHECK_OR_RETURN(LEVEL_SILENT, status == NV_OK, status); - - *pEgmGpaAddress = (NvU64)pGpuFabricProbeInfoKernel->probeResponseMsg.probeRsp.gpaAddressEGMHi << 32ULL; - - return status; -} - NV_STATUS gpuFabricProbeGetNumProbeReqs ( @@ -289,6 +267,11 @@ gpuFabricProbeGetNumProbeReqs LOCK_ASSERT_AND_RETURN(rmDeviceGpuLockIsOwner( gpuGetInstance(pGpuFabricProbeInfoKernel->pGpu))); + // + // This function gets called from CUDA stack to check the probe state (NV2080_CTRL_CMD_GET_GPU_FABRIC_PROBE_INFO). + // The value returned by this function determines if probe is started or not. + // We just return a non-zero value here for vgpu, because we don't track fabric probe stats in the guests yet. + // if (IS_VIRTUAL(pGpu)) { *numProbes = 1; @@ -407,7 +390,6 @@ _gpuFabricProbeSetupGpaRange { NvU64 gpaAddress; NvU64 gpaAddressSize; - NvU64 egmGpaAddress; NV_CHECK_OR_RETURN_VOID(LEVEL_ERROR, gpuFabricProbeGetGpaAddress(pGpuFabricProbeInfoKernel, @@ -420,14 +402,6 @@ _gpuFabricProbeSetupGpaRange NV_CHECK_OR_RETURN_VOID(LEVEL_ERROR, knvlinkSetUniqueFabricBaseAddress_HAL(pGpu, pKernelNvlink, gpaAddress) == NV_OK); - - NV_CHECK_OR_RETURN_VOID(LEVEL_ERROR, - gpuFabricProbeGetEgmGpaAddress(pGpuFabricProbeInfoKernel, - &egmGpaAddress) == NV_OK); - - NV_CHECK_OR_RETURN_VOID(LEVEL_ERROR, - knvlinkSetUniqueFabricEgmBaseAddress_HAL(pGpu, pKernelNvlink, - egmGpaAddress) == NV_OK); } } @@ -671,7 +645,6 @@ gpuFabricProbeStart GPU_FABRIC_PROBE_INFO_KERNEL *pGpuFabricProbeInfoKernel; RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); NV2080_CTRL_CMD_INTERNAL_START_GPU_FABRIC_PROBE_INFO_PARAMS params = { 0 }; - MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); LOCK_ASSERT_AND_RETURN(rmDeviceGpuLockIsOwner(gpuGetInstance(pGpu))); @@ -692,7 +665,7 @@ gpuFabricProbeStart pGpuFabricProbeInfoKernel->pGpu = pGpu; pGpuFabricProbeInfoKernel->bwMode = gpumgrGetGpuNvlinkBwMode(); params.bwMode = pGpuFabricProbeInfoKernel->bwMode; - params.bLocalEgmEnabled = pMemoryManager->bLocalEgmEnabled; + if (IS_VIRTUAL(pGpu)) { @@ -801,10 +774,7 @@ _gpuFabricProbeInvalidate portAtomicSetU32(&pGpuFabricProbeInfoKernel->probeRespRcvd, 0); if (pKernelNvlink != NULL) - { knvlinkClearUniqueFabricBaseAddress_HAL(pGpu, pKernelNvlink); - knvlinkClearUniqueFabricEgmBaseAddress_HAL(pGpu, pKernelNvlink); - } if (pFabricVAS != NULL) fabricvaspaceClearUCRange(pFabricVAS); diff --git a/src/nvidia/src/kernel/gpu/gpu_gspclient.c b/src/nvidia/src/kernel/gpu/gpu_gspclient.c index d3e1fa171d..4343ce9ef9 100644 --- a/src/nvidia/src/kernel/gpu/gpu_gspclient.c +++ b/src/nvidia/src/kernel/gpu/gpu_gspclient.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -164,7 +164,7 @@ gpuGenGidData_FWCLIENT return NV_ERR_NOT_SUPPORTED; } -NvU32 gpuGetActiveFBIOs_FWCLIENT(OBJGPU *pGpu) +NvU64 gpuGetActiveFBIOs_FWCLIENT(OBJGPU *pGpu) { GspStaticConfigInfo *pGSCI = GPU_GET_GSP_STATIC_INFO(pGpu); return pGSCI->fbio_mask; @@ -182,11 +182,20 @@ void gpuInitProperties_FWCLIENT(OBJGPU *pGpu) pGpu->setProperty(pGpu, PDB_PROP_GPU_IS_MOBILE, pGSCI->bIsMobile); pGpu->setProperty(pGpu, PDB_PROP_GPU_RTD3_GC6_SUPPORTED, pGSCI->bIsGc6Rtd3Allowed); + pGpu->setProperty(pGpu, PDB_PROP_GPU_RTD3_GC8_SUPPORTED, pGSCI->bIsGc8Rtd3Allowed); pGpu->setProperty(pGpu, PDB_PROP_GPU_RTD3_GCOFF_SUPPORTED, pGSCI->bIsGcOffRtd3Allowed); pGpu->setProperty(pGpu, PDB_PROP_GPU_IS_UEFI, pGSCI->bIsGpuUefi); pGpu->setProperty(pGpu, PDB_PROP_GPU_LEGACY_GCOFF_SUPPORTED, pGSCI->bIsGcoffLegacyAllowed); } +void gpuGetRtd3GC6Data_FWCLIENT(OBJGPU *pGpu) +{ + GspStaticConfigInfo *pGSCI = GPU_GET_GSP_STATIC_INFO(pGpu); + + pGpu->gc6State.GC6PerstDelay = pGSCI->RTD3GC6PerstDelay; + pGpu->gc6State.GC6TotalBoardPower = pGSCI->RTD3GC6TotalBoardPower; +} + NvU32 gpuGetEmulationRev1_FWCLIENT ( @@ -249,6 +258,45 @@ gpuConstructDeviceInfoTable_FWCLIENT return status; } +NV_STATUS +gpuGetNameString_FWCLIENT +( + OBJGPU *pGpu, + NvU32 type, + void *nameStringBuffer +) +{ + GspStaticConfigInfo *pGSCI = GPU_GET_GSP_STATIC_INFO(pGpu); + + if (type == NV2080_CTRL_GPU_GET_NAME_STRING_FLAGS_TYPE_ASCII) + { + portMemCopy(nameStringBuffer, sizeof(pGSCI->gpuNameString), + pGSCI->gpuNameString, sizeof(pGSCI->gpuNameString)); + } + else + { + portMemCopy(nameStringBuffer, sizeof(pGSCI->gpuNameString_Unicode), + pGSCI->gpuNameString_Unicode, sizeof(pGSCI->gpuNameString_Unicode)); + } + + return NV_OK; +} + +NV_STATUS +gpuGetShortNameString_FWCLIENT +( + OBJGPU *pGpu, + NvU8 *nameStringBuffer +) +{ + GspStaticConfigInfo *pGSCI = GPU_GET_GSP_STATIC_INFO(pGpu); + + portMemCopy(nameStringBuffer, sizeof(pGSCI->gpuShortNameString), + pGSCI->gpuShortNameString, sizeof(pGSCI->gpuShortNameString)); + + return NV_OK; +} + NV_STATUS gpuGetRegBaseOffset_FWCLIENT ( @@ -290,4 +338,4 @@ gpuGetChipSubRev_FWCLIENT NV_ASSERT_OR_RETURN(pChipInfo != NULL, 0); return pChipInfo->chipSubRev; -} \ No newline at end of file +} diff --git a/src/nvidia/src/kernel/gpu/gpu_name_kernel.c b/src/nvidia/src/kernel/gpu/gpu_name_kernel.c deleted file mode 100644 index 7fb21052a0..0000000000 --- a/src/nvidia/src/kernel/gpu/gpu_name_kernel.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. - * SPDX-License-Identifier: MIT - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include "core/core.h" -#include "gpu/gpu.h" - -NV_STATUS -gpuGetNameString_KERNEL -( - OBJGPU *pGpu, - NvU32 type, - void *nameStringBuffer -) -{ - RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); - NV2080_CTRL_GPU_GET_NAME_STRING_PARAMS params; - - portMemSet(¶ms, 0, sizeof(params)); - - NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, pGpu->hInternalClient, pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_GPU_GET_NAME_STRING, ¶ms, sizeof(params))); - - if (type == NV2080_CTRL_GPU_GET_NAME_STRING_FLAGS_TYPE_ASCII) - { - portMemCopy(nameStringBuffer, sizeof(params.gpuNameString.ascii), - params.gpuNameString.ascii, sizeof(params.gpuNameString.ascii)); - } - else - { - portMemCopy(nameStringBuffer, sizeof(params.gpuNameString.unicode), - params.gpuNameString.unicode, sizeof(params.gpuNameString.unicode)); - } - - return NV_OK; -} - -NV_STATUS -gpuGetShortNameString_KERNEL -( - OBJGPU *pGpu, - NvU8 *nameStringBuffer -) -{ - RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); - NV2080_CTRL_GPU_GET_SHORT_NAME_STRING_PARAMS params; - - portMemSet(¶ms, 0, sizeof(params)); - - NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, pGpu->hInternalClient, pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_GPU_GET_SHORT_NAME_STRING, ¶ms, sizeof(params))); - - portMemCopy(nameStringBuffer, sizeof(params.gpuShortNameString), - params.gpuShortNameString, sizeof(params.gpuShortNameString)); - - return NV_OK; -} diff --git a/src/nvidia/src/kernel/gpu/gpu_resource_desc.c b/src/nvidia/src/kernel/gpu/gpu_resource_desc.c index 959bd89656..a4b5b968d9 100644 --- a/src/nvidia/src/kernel/gpu/gpu_resource_desc.c +++ b/src/nvidia/src/kernel/gpu/gpu_resource_desc.c @@ -267,6 +267,7 @@ gpuGetClassList_IMPL(OBJGPU *pGpu, NvU32 *pNumClasses, NvU32 *pClassList, NvU32 NvU32 i, k; NvBool bCount; PCLASSDESCRIPTOR classDB = pGpu->classDB.pClasses; + NvU32 lastClassId = 0; // Read the registry one time to get the list if (NV_FALSE == pGpu->classDB.bSuppressRead) @@ -300,15 +301,27 @@ gpuGetClassList_IMPL(OBJGPU *pGpu, NvU32 *pNumClasses, NvU32 *pClassList, NvU32 if (bCount) { - // save the class in caller's buffer, if provided - if (pClassList) + const NvU32 classId = classDB[i].externalClassId; + + // + // Skip duplicate classes. These exist in the classDB for + // multi-instance engines (e.g., CE0, CE1, etc), but we only want + // one entry in the class list. The classDB maintains ordering + // such that all classes with the same ID are contiguous. + // + if (classId != lastClassId) { - if (numClasses < *pNumClasses) - pClassList[numClasses] = classDB[i].externalClassId; - else - status = NV_ERR_INVALID_PARAM_STRUCT; + // save the class in caller's buffer, if provided + if (pClassList) + { + if (numClasses < *pNumClasses) + pClassList[numClasses] = classId; + else + status = NV_ERR_INVALID_PARAM_STRUCT; + } + numClasses++; + lastClassId = classId; } - numClasses++; } } @@ -322,6 +335,11 @@ gpuGetClassList_IMPL(OBJGPU *pGpu, NvU32 *pNumClasses, NvU32 *pClassList, NvU32 /*! * @brief Add a class to class DB with given Engine Tag and Class Id. * + * Note that a matching class/engine must already exist in the read-only + * "static" class list populated from gpuGetClassDescriptorList_HAL(). This + * means that only classes/engines which have previously been removed from the + * class DB can be added here. + * * @side Sets engineDB.bValid to NV_FALSE. * * @param[in] pGpu OBJGPU pointer @@ -338,14 +356,18 @@ _gpuAddClassToClassDBByEngTagClassId(OBJGPU *pGpu, ENGDESCRIPTOR *pEngDesc, NvU3 { PGPU_ENGINE_ORDER pEngineOrder = &pGpu->engineOrder; const CLASSDESCRIPTOR *pClassDesc = &pEngineOrder->pClassDescriptors[0]; + const CLASSDESCRIPTOR *pClassDescToCopy = NULL; PGPUCLASSDB pClassDB = &pGpu->classDB; NvU32 numClasses = pClassDB->numClasses; + NvBool bMatchingClassIdFound = NV_FALSE; + NvU32 matchingClassIdIndex; + NvU32 newClassDBIndex; NvU32 i; NV_CHECK_OR_RETURN(LEVEL_INFO, (NULL != pEngDesc) || (NULL != pExternalClassId), NV_ERR_INVALID_ARGUMENT); - // Return early if requested class/engine is already in classdb - for (i = 0; i < pClassDB->numClasses; i++) + // Return early if requested class/engine is already in the dynamic classdb + for (i = 0; i < numClasses; i++) { if (((NULL == pEngDesc) || (pClassDB->pClasses[i].engDesc == *pEngDesc)) && ((NULL == pExternalClassId) || (pClassDB->pClasses[i].externalClassId == *pExternalClassId))) @@ -354,7 +376,7 @@ _gpuAddClassToClassDBByEngTagClassId(OBJGPU *pGpu, ENGDESCRIPTOR *pEngDesc, NvU3 } } - // Populate the ClassDB with information from PMODULEDESCRIPTOR (R/O classhal.h data) + // Populate the ClassDB with information from the static class list (g_gpu_class_list.c) for (i = 0; i < pEngineOrder->numClassDescriptors; i++) { // RMCONFIG: skip over any that are not supported @@ -364,13 +386,61 @@ _gpuAddClassToClassDBByEngTagClassId(OBJGPU *pGpu, ENGDESCRIPTOR *pEngDesc, NvU3 if (((NULL == pEngDesc) || (pClassDesc[i].engDesc == *pEngDesc)) && ((NULL == pExternalClassId) || (pClassDesc[i].externalClassId == *pExternalClassId))) { - // store info for class in class DB entry - pClassDB->pClasses[numClasses] = pClassDesc[i]; - pClassDB->numClasses++; + pClassDescToCopy = &pClassDesc[i]; break; } } + if (pClassDescToCopy == NULL) { + // This should probably be an error, but that causes existing tests to fail... + return NV_OK; + } + + // + // Find the last entry with a matching externalClassId, if any. We keep + // all entries of the same externalClassId contiguous so that + // gpuGetClassList_IMPL() can easily filter them out. + // + for (i = 0; i < numClasses; i++) + { + if (pClassDB->pClasses[i].externalClassId == pClassDescToCopy->externalClassId) + { + bMatchingClassIdFound = NV_TRUE; + matchingClassIdIndex = i; + } + } + + if (bMatchingClassIdFound) + { + NvLength bytesToMove; + + // Add an entry next to the existing block of this class ID. + newClassDBIndex = matchingClassIdIndex + 1; + + // Move the rest of the entries to make space. + bytesToMove = (numClasses - newClassDBIndex) * sizeof(pClassDB->pClasses[0]); + portMemMove(&pClassDB->pClasses[newClassDBIndex + 1], bytesToMove, + &pClassDB->pClasses[newClassDBIndex], bytesToMove); + + } + else + { + // Add new entry at the end. + newClassDBIndex = numClasses; + } + + // + // Store info for class in class DB entry. + // + // It is assumed that because there is a matching entry in the static class + // list, but not the dynamic class list, the classDB array already has + // enough space allocated (because gpuBuildClassDB_IMPL duplicated the + // static class list, and this entry must have been removed since then). + // + + pClassDB->pClasses[newClassDBIndex] = *pClassDescToCopy; + pClassDB->numClasses++; + pGpu->engineDB.bValid = NV_FALSE; return NV_OK; diff --git a/src/nvidia/src/kernel/gpu/gpu_suspend.c b/src/nvidia/src/kernel/gpu/gpu_suspend.c index 967c7b06f5..756b555a80 100644 --- a/src/nvidia/src/kernel/gpu/gpu_suspend.c +++ b/src/nvidia/src/kernel/gpu/gpu_suspend.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2000-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2000-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -57,9 +57,6 @@ gpuPowerManagementEnter(OBJGPU *pGpu, NvU32 newLevel, NvU32 flags) NV_STATUS status = NV_OK; MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - NV_ASSERT_OR_RETURN(!IS_VIRTUAL(pGpu) || !IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu), - NV_ERR_NOT_SUPPORTED); - // This is a no-op in CPU-RM NV_ASSERT_OK_OR_GOTO(status, gpuPowerManagementEnterPreUnloadPhysical(pGpu), done); @@ -75,12 +72,6 @@ gpuPowerManagementEnter(OBJGPU *pGpu, NvU32 newLevel, NvU32 flags) if (IS_GSP_CLIENT(pGpu)) { - // FB remains alive for GC6 cycle - if (!IS_GPU_GC6_STATE_ENTERING(pGpu)) - { - NV_ASSERT_OK_OR_GOTO(status, memmgrSavePowerMgmtState(pGpu, pMemoryManager), done); - } - KernelGsp *pKernelGsp = GPU_GET_KERNEL_GSP(pGpu); KernelGspPreparedFwsecCmd preparedCmd; diff --git a/src/nvidia/src/kernel/gpu/gpu_timeout.c b/src/nvidia/src/kernel/gpu/gpu_timeout.c index 3fda17f28c..0070d5e3e4 100644 --- a/src/nvidia/src/kernel/gpu/gpu_timeout.c +++ b/src/nvidia/src/kernel/gpu/gpu_timeout.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/src/kernel/gpu/gpu_vgpu.c b/src/nvidia/src/kernel/gpu/gpu_vgpu.c index be88f067ac..cf19e8e637 100644 --- a/src/nvidia/src/kernel/gpu/gpu_vgpu.c +++ b/src/nvidia/src/kernel/gpu/gpu_vgpu.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -41,7 +41,7 @@ * @return NV_OK if the GID if SHA1 GID is requested */ NV_STATUS -gpuGenGidData_VGPUSTUB +gpuGenGidData_VF ( OBJGPU *pGpu, NvU8 *pGidData, @@ -66,7 +66,7 @@ gpuGenGidData_VGPUSTUB * @returns FBIO Floorsweeping Mask - On is enabled * */ -NvU32 gpuGetActiveFBIOs_VGPUSTUB +NvU64 gpuGetActiveFBIOs_VF ( OBJGPU *pGpu ) @@ -83,7 +83,7 @@ NvU32 gpuGetActiveFBIOs_VGPUSTUB } NV_STATUS -gpuCreateDefaultClientShare_VGPUSTUB +gpuCreateDefaultClientShare_VF ( OBJGPU *pGpu ) @@ -148,7 +148,7 @@ gpuCreateDefaultClientShare_VGPUSTUB } void -gpuDestroyDefaultClientShare_VGPUSTUB +gpuDestroyDefaultClientShare_VF ( OBJGPU *pGpu ) @@ -177,7 +177,7 @@ gpuDestroyDefaultClientShare_VGPUSTUB */ NvBool -gpuCheckPageRetirementSupport_VGPUSTUB +gpuCheckPageRetirementSupport_VF ( OBJGPU *pGpu ) @@ -189,7 +189,7 @@ gpuCheckPageRetirementSupport_VGPUSTUB } NV_STATUS -gpuInitSriov_VGPUSTUB +gpuInitSriov_VF ( OBJGPU *pGpu ) @@ -204,7 +204,7 @@ gpuInitSriov_VGPUSTUB } NV_STATUS -gpuGetNameString_VGPUSTUB +gpuGetNameString_VF ( OBJGPU *pGpu, NvU32 type, @@ -230,7 +230,7 @@ gpuGetNameString_VGPUSTUB } NV_STATUS -gpuGetShortNameString_VGPUSTUB +gpuGetShortNameString_VF ( OBJGPU *pGpu, NvU8 *nameStringBuffer @@ -247,7 +247,7 @@ gpuGetShortNameString_VGPUSTUB } NvBool -gpuIsGlobalPoisonFuseEnabled_VGPUSTUB +gpuIsGlobalPoisonFuseEnabled_VF ( OBJGPU *pGpu ) @@ -257,7 +257,7 @@ gpuIsGlobalPoisonFuseEnabled_VGPUSTUB } NV_STATUS -gpuConstructDeviceInfoTable_VGPUSTUB +gpuConstructDeviceInfoTable_VF ( OBJGPU *pGpu ) @@ -292,7 +292,7 @@ gpuConstructDeviceInfoTable_VGPUSTUB /*! * @brief Initialize GPU branding properties */ -NV_STATUS gpuInitBranding_VGPUSTUB(OBJGPU *pGpu) +NV_STATUS gpuInitBranding_VF(OBJGPU *pGpu) { OBJVGPU *pVGpu = GPU_GET_VGPU(pGpu); @@ -311,7 +311,7 @@ NV_STATUS gpuInitBranding_VGPUSTUB(OBJGPU *pGpu) } NV_STATUS -gpuGetSkuInfo_VGPUSTUB +gpuGetSkuInfo_VF ( OBJGPU *pGpu, NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS *pParams @@ -327,4 +327,4 @@ gpuGetSkuInfo_VGPUSTUB sizeof(NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS)); return NV_OK; -} \ No newline at end of file +} diff --git a/src/nvidia/src/kernel/gpu/gpuvideo/videoeventlist.c b/src/nvidia/src/kernel/gpu/gpuvideo/videoeventlist.c index 83acb9084e..2b449237ec 100644 --- a/src/nvidia/src/kernel/gpu/gpuvideo/videoeventlist.c +++ b/src/nvidia/src/kernel/gpu/gpuvideo/videoeventlist.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -67,12 +67,13 @@ videoEventTraceCtxInit MEMORY_DESCRIPTOR *pCtxMemDesc; VIDEO_ENGINE_EVENT__LOG_INFO logInfo; - if (RMCFG_FEATURE_PLATFORM_GSP || !IS_VIDEO_ENGINE(engDesc) || !kvidengIsVideoTraceLogSupported(pGpu)) + if (RMCFG_FEATURE_PLATFORM_GSP || !IS_VIDEO_ENGINE(engDesc)) return NV_OK; pKernelVideoEngine = kvidengFromEngDesc(pGpu, engDesc); NV_CHECK_OR_RETURN(LEVEL_ERROR, pKernelVideoEngine != NULL, NV_OK); NV_CHECK_OR_RETURN(LEVEL_SILENT, pKernelVideoEngine->bVideoTraceEnabled, NV_OK); + NV_CHECK_OR_RETURN(LEVEL_SILENT, pKernelVideoEngine->videoTraceInfo.pTraceBufferEngineMemDesc != NULL, NV_OK); // Fill some channel specific information for event logging logInfo.userInfo = (NvU64)(NvUPtr)pKernelChannel->pUserInfo; @@ -105,6 +106,11 @@ videoEventTraceCtxInit MEM_WR32(pInstMem + VIDEO_ENGINE_EVENT__LOG_INFO__OFFSET + i, pLogInfo[i / sizeof(NvU32)]); } + // write kernel event buffer address + NvU64 dmaAddr = memdescGetPhysAddr(pKernelVideoEngine->videoTraceInfo.pTraceBufferEngineMemDesc, AT_GPU, 0); + MEM_WR32(pInstMem + VIDEO_ENGINE_EVENT__TRACE_ADDR__OFFSET_LO, NvU64_LO32(dmaAddr)); + MEM_WR32(pInstMem + VIDEO_ENGINE_EVENT__TRACE_ADDR__OFFSET_HI, NvU64_HI32(dmaAddr)); + kbusUnmapRmAperture_HAL(pGpu, pCtxMemDesc, &pInstMem, NV_TRUE); } @@ -143,7 +149,6 @@ _videoEventBufferAdd NV_EVENT_BUFFER_VIDEO_RECORD_V1 videoRecord; portMemSet(&videoRecord, 0, sizeof(videoRecord)); videoRecord.event_id = pRecord->event_id; - videoRecord.vmid = pRecord->gfid; videoRecord.timestamp = pRecord->ts; videoRecord.seqno = pRecord->seq_no; videoRecord.context_id = pRecord->context_id; @@ -339,17 +344,20 @@ static void _videoGetTraceEvents static NV_STATUS _videoEventBufferSetFlag(OBJGPU *pGpu, NvU32 flag) { - RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); - NV2080_CTRL_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_FLAGS_PARAMS params = {0}; - - params.flags = flag; - NV_ASSERT_OK_OR_RETURN( - pRmApi->Control(pRmApi, - pGpu->hInternalClient, - pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_FLAGS, - ¶ms, - sizeof(params))); + NvU32 i; + for (i = 0; i < pGpu->numKernelVideoEngines; i++) + { + KernelVideoEngine *pKernelVideoEngine = pGpu->kernelVideoEngines[i]; + if (pKernelVideoEngine != NULL) + { + VIDEO_TRACE_RING_BUFFER *pRingbuffer = pKernelVideoEngine->videoTraceInfo.pTraceBufferEngine; + NvBool bAlwaysLogging = pKernelVideoEngine->videoTraceInfo.bAlwaysLogging; + if (pRingbuffer != NULL && !bAlwaysLogging) + { + pRingbuffer->flags = flag; + } + } + } return NV_OK; } @@ -415,7 +423,6 @@ _videoTimerDestroy { OBJTMR *pTmr = GPU_GET_TIMER(pGpu); - tmrEventCancel(pTmr, pGpu->pVideoTimerEvent); tmrEventDestroy(pTmr, pGpu->pVideoTimerEvent); pGpu->pVideoTimerEvent = NULL; } diff --git a/src/nvidia/src/kernel/gpu/gr/arch/ampere/kgraphics_ga100.c b/src/nvidia/src/kernel/gpu/gr/arch/ampere/kgraphics_ga100.c index 3f78cd4414..848f508348 100644 --- a/src/nvidia/src/kernel/gpu/gr/arch/ampere/kgraphics_ga100.c +++ b/src/nvidia/src/kernel/gpu/gr/arch/ampere/kgraphics_ga100.c @@ -23,6 +23,9 @@ #define NVOC_KERNEL_GRAPHICS_H_PRIVATE_ACCESS_ALLOWED +#include "core/prelude.h" +#include "kernel/gpu/gpu.h" + #include "kernel/gpu/gr/kernel_graphics.h" #include "nv_sriov_defines.h" diff --git a/src/nvidia/src/kernel/gpu/gr/arch/turing/kgraphics_tu102.c b/src/nvidia/src/kernel/gpu/gr/arch/turing/kgraphics_tu102.c index 2832042587..bc9e10fbc1 100644 --- a/src/nvidia/src/kernel/gpu/gr/arch/turing/kgraphics_tu102.c +++ b/src/nvidia/src/kernel/gpu/gr/arch/turing/kgraphics_tu102.c @@ -54,6 +54,9 @@ #include "class/clc36f.h" // VOLTA_CHANNEL_GPFIFO_A #include "class/clc46f.h" // TURING_CHANNEL_GPFIFO_A + +#include "ctrl/ctrl0080/ctrl0080fifo.h" + /*! * @brief Allocate common local/global buffers that are required by the graphics context * diff --git a/src/nvidia/src/kernel/gpu/gr/fecs_event_list.c b/src/nvidia/src/kernel/gpu/gr/fecs_event_list.c index 0f8f17e9a4..944ebb4629 100644 --- a/src/nvidia/src/kernel/gpu/gr/fecs_event_list.c +++ b/src/nvidia/src/kernel/gpu/gr/fecs_event_list.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -906,12 +906,46 @@ _fecsTimerDestroy { OBJTMR *pTmr = GPU_GET_TIMER(pGpu); - tmrEventCancel(pTmr, pFecsGlobalTraceInfo->pFecsTimerEvent); tmrEventDestroy(pTmr, pFecsGlobalTraceInfo->pFecsTimerEvent); pFecsGlobalTraceInfo->pFecsTimerEvent = NULL; } } +NV_STATUS +fecsHandleFecsLoggingError +( + OBJGPU *pGpu, + NvU32 grIdx, + FECS_ERROR_EVENT_TYPE errorType +) +{ + KernelGraphics *pKernelGraphics = GPU_GET_KERNEL_GRAPHICS(pGpu, grIdx); + NV_STATUS status = NV_OK; + + switch (errorType) + { + case FECS_ERROR_EVENT_TYPE_BUFFER_RESET_REQUIRED: + { + fecsBufferDisableHw(pGpu, pKernelGraphics); + kgraphicsSetCtxswLoggingEnabled(pGpu, pKernelGraphics, NV_FALSE); + fecsBufferReset(pGpu, pKernelGraphics); + break; + } + case FECS_ERROR_EVENT_TYPE_BUFFER_FULL: + { + nvEventBufferFecsCallback(pGpu, pKernelGraphics); + break; + } + default: + { + status = NV_ERR_INVALID_ARGUMENT; + break; + } + } + + return status; +} + /** * @brief The callback function that transfers FECS Buffer entries to an EventBuffer */ @@ -1387,6 +1421,33 @@ fecsRemoveBindpoint } } +void +fecsRemoveAllBindpointsForGpu +( + OBJGPU *pGpu +) +{ + KernelGraphicsManager *pKernelGraphicsManager = GPU_GET_KERNEL_GRAPHICS_MANAGER(pGpu); + KGRMGR_FECS_GLOBAL_TRACE_INFO *pFecsGlobalTraceInfo = kgrmgrGetFecsGlobalTraceInfo(pGpu, pKernelGraphicsManager); + FecsEventBufferBindMultiMapSupermapIter iter; + + NV_CHECK_OR_RETURN_VOID(LEVEL_SILENT, pFecsGlobalTraceInfo != NULL); + + iter = multimapSubmapIterAll(&pFecsGlobalTraceInfo->fecsEventBufferBindingsUid); + while (multimapSubmapIterNext(&iter)) + { + FecsEventBufferBindMultiMapSubmap *pSubmap = iter.pValue; + FecsEventBufferBindMultiMapIter subIter = multimapSubmapIterItems(&pFecsGlobalTraceInfo->fecsEventBufferBindingsUid, pSubmap); + NvU64 uid = mapKey_IMPL(iter.iter.pMap, pSubmap); + + while (multimapItemIterNext(&subIter)) + { + NV_EVENT_BUFFER_BIND_POINT_FECS *pBind = subIter.pValue; + fecsRemoveBindpoint(pGpu, uid, pBind); + } + } +} + void fecsRemoveAllBindpoints ( diff --git a/src/nvidia/src/kernel/gpu/gr/kernel_graphics.c b/src/nvidia/src/kernel/gpu/gr/kernel_graphics.c index 22b8a2836d..b7a29e7a9d 100644 --- a/src/nvidia/src/kernel/gpu/gr/kernel_graphics.c +++ b/src/nvidia/src/kernel/gpu/gr/kernel_graphics.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -49,20 +49,7 @@ #include "vgpu/vgpu_events.h" #include "vgpu/rpc.h" -#include "class/clb0c0.h" -#include "class/clb1c0.h" -#include "class/clc0c0.h" -#include "class/clc1c0.h" -#include "class/clc3c0.h" -#include "class/clc5c0.h" -#include "class/clc6c0.h" -#include "class/clc7c0.h" -#include "class/clcbc0.h" - -#include "class/cl0080.h" -#include "class/cl2080.h" #include "class/cla06f.h" -#include "class/cla06fsubch.h" #include "class/cl90f1.h" // FERMI_VASPACE_A #include "class/cl003e.h" // NV01_MEMORY_SYSTEM #include "class/cl50a0.h" // NV50_MEMORY_VIRTUAL @@ -445,7 +432,6 @@ _kgraphicsPostSchedulingEnableHandler KernelGraphics *pKernelGraphics = GPU_GET_KERNEL_GRAPHICS(pGpu, ((NvU32)(NvUPtr)pGrIndex)); const KGRAPHICS_STATIC_INFO *pKernelGraphicsStaticInfo = kgraphicsGetStaticInfo(pGpu, pKernelGraphics); - // Nothing to do for non-GSPCLIENT if (!IS_GSP_CLIENT(pGpu)) return NV_OK; diff --git a/src/nvidia/src/kernel/gpu/gr/kernel_graphics_context.c b/src/nvidia/src/kernel/gpu/gr/kernel_graphics_context.c index b4caf4767e..aee6184d84 100644 --- a/src/nvidia/src/kernel/gpu/gr/kernel_graphics_context.c +++ b/src/nvidia/src/kernel/gpu/gr/kernel_graphics_context.c @@ -2301,6 +2301,21 @@ kgrctxUnmapCtxZcullBuffer_IMPL } } +/** + * @brief unmap the memory for the setup context buffer + */ +void +kgrctxUnmapCtxSetupBuffer_IMPL +( + OBJGPU *pGpu, + KernelGraphicsContext *pKernelGraphicsContext, + KernelGraphics *pKernelGraphics, + OBJVASPACE *pVAS +) +{ + // TODO Bug 4153224: fill in function +} + /** * @brief unmap the memory for the preemption context buffers */ @@ -2806,6 +2821,20 @@ kgrctxFreeZcullBuffer_IMPL pKernelGraphicsContextUnicast->zcullCtxswBuffer.pMemDesc = NULL; } +/** + * @brief free the memory for the setup context buffer + */ +void +kgrctxFreeSetupBuffer_IMPL +( + OBJGPU *pGpu, + KernelGraphicsContext *pKernelGraphicsContext +) +{ + // TODO Bug 4153224: fill in function +} + + /** * @brief free the memory for the preemption context buffers */ diff --git a/src/nvidia/src/kernel/gpu/gr/kernel_graphics_manager.c b/src/nvidia/src/kernel/gpu/gr/kernel_graphics_manager.c index 8420974b70..120baf2afa 100644 --- a/src/nvidia/src/kernel/gpu/gr/kernel_graphics_manager.c +++ b/src/nvidia/src/kernel/gpu/gr/kernel_graphics_manager.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -338,6 +338,16 @@ kgrmgrDestruct_IMPL pKernelGraphicsManager->legacyKgraphicsStaticInfo.bInitialized = NV_FALSE; } +void +kgrmgrStateDestroy_IMPL +( + OBJGPU *pGpu, + KernelGraphicsManager *pKernelGraphicsManager +) +{ + fecsRemoveAllBindpointsForGpu(pGpu); +} + /*! * @brief Set legacy Kgraphics Static Info (i.e. state of GR0) */ @@ -675,7 +685,7 @@ kgrmgrAllocVeidsForGrIdx_IMPL KERNEL_MIG_GPU_INSTANCE *pKernelMIGGPUInstance ) { - NvU32 veidStepSize; + NvU32 veidSizePerSpan; NvU32 veidStart = 0; NvU32 veidEnd = 0; NvU32 GPUInstanceVeidEnd; @@ -687,18 +697,18 @@ kgrmgrAllocVeidsForGrIdx_IMPL NV_ASSERT_OR_RETURN(pKernelGraphicsManager->grIdxVeidMask[grIdx] == 0, NV_ERR_INVALID_STATE); NV_ASSERT_OK_OR_RETURN( - kgrmgrGetVeidStepSize(pGpu, pKernelGraphicsManager, &veidStepSize)); + kgrmgrGetVeidSizePerSpan(pGpu, pKernelGraphicsManager, &veidSizePerSpan)); // We statically assign VEIDs to a GR based on the number of GPCs connected to it - if (veidCount % veidStepSize != 0) + if (veidCount % veidSizePerSpan != 0) { - NV_PRINTF(LEVEL_ERROR, "veidCount %d is not aligned to veidStepSize=%d\n", veidCount, veidStepSize); + NV_PRINTF(LEVEL_ERROR, "veidCount %d is not aligned to veidSizePerSpan=%d\n", veidCount, veidSizePerSpan); return NV_ERR_INVALID_ARGUMENT; } NV_ASSERT_OR_RETURN(veidSpanOffset != KMIGMGR_SPAN_OFFSET_INVALID, NV_ERR_INVALID_ARGUMENT); - veidStart = (veidSpanOffset * veidStepSize) + pKernelMIGGPUInstance->resourceAllocation.veidOffset; + veidStart = (veidSpanOffset * veidSizePerSpan) + pKernelMIGGPUInstance->resourceAllocation.veidOffset; veidEnd = veidStart + veidCount - 1; NV_ASSERT_OR_RETURN(veidStart < veidEnd, NV_ERR_INVALID_STATE); @@ -774,6 +784,26 @@ kgrmgrGetVeidStepSize_IMPL return NV_OK; } +/*! + * @brief Get VEID size for each span + */ +NV_STATUS +kgrmgrGetVeidSizePerSpan_IMPL +( + OBJGPU *pGpu, + KernelGraphicsManager *pKernelGraphicsManager, + NvU32 *pVeidSizePerSpan +) +{ + NV_ASSERT_OR_RETURN(pVeidSizePerSpan != NULL, NV_ERR_INVALID_ARGUMENT); + + // VEIDs for each span should be the VEID size we assign to the smallest GPC count + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + kgrmgrGetVeidsFromGpcCount_HAL(pGpu, pKernelGraphicsManager, 1, pVeidSizePerSpan)); + + return NV_OK; +} + /*! * @brief Function to get starting VEID for a Gr Engine */ @@ -1015,7 +1045,7 @@ kgrmgrCheckVeidsRequest_IMPL KERNEL_MIG_GPU_INSTANCE *pKernelMIGGPUInstance ) { - NvU32 veidStepSize; + NvU32 veidSizePerSpan; NvU32 veidStart = 0; NvU32 veidEnd = 0; NvU32 GPUInstanceVeidEnd; @@ -1024,15 +1054,15 @@ kgrmgrCheckVeidsRequest_IMPL NvU64 veidMask; NV_ASSERT_OK_OR_RETURN( - kgrmgrGetVeidStepSize(pGpu, pKernelGraphicsManager, &veidStepSize)); + kgrmgrGetVeidSizePerSpan(pGpu, pKernelGraphicsManager, &veidSizePerSpan)); NV_ASSERT_OR_RETURN(pSpanStart != NULL, NV_ERR_INVALID_ARGUMENT); NV_ASSERT_OR_RETURN(pInUseMask != NULL, NV_ERR_INVALID_ARGUMENT); // We statically assign VEIDs to a GR based on the number of GPCs connected to it - if (veidCount % veidStepSize != 0) + if (veidCount % veidSizePerSpan != 0) { - NV_PRINTF(LEVEL_ERROR, "veidCount %d is not aligned to veidStepSize=%d\n", veidCount, veidStepSize); + NV_PRINTF(LEVEL_ERROR, "veidCount %d is not aligned to veidSizePerSpan=%d\n", veidCount, veidSizePerSpan); return NV_ERR_INVALID_ARGUMENT; } @@ -1046,7 +1076,7 @@ kgrmgrCheckVeidsRequest_IMPL if (*pSpanStart != KMIGMGR_SPAN_OFFSET_INVALID) { - veidStart = (*pSpanStart * veidStepSize) + pKernelMIGGPUInstance->resourceAllocation.veidOffset; + veidStart = (*pSpanStart * veidSizePerSpan) + pKernelMIGGPUInstance->resourceAllocation.veidOffset; veidEnd = veidStart + veidCount - 1; NV_ASSERT_OR_RETURN(veidStart < veidEnd, NV_ERR_INVALID_STATE); @@ -1058,7 +1088,7 @@ kgrmgrCheckVeidsRequest_IMPL NvU64 reqVeidMask = DRF_SHIFTMASK64(veidCount - 1:0); NvU32 i; - for (i = pKernelMIGGPUInstance->resourceAllocation.veidOffset; i <= GPUInstanceVeidEnd; i += veidStepSize) + for (i = pKernelMIGGPUInstance->resourceAllocation.veidOffset; i <= GPUInstanceVeidEnd; i += veidSizePerSpan) { // See if requested slots are available within this range if (((GPUInstanceFreeVeidMask >> i) & reqVeidMask) == reqVeidMask) @@ -1090,7 +1120,8 @@ kgrmgrCheckVeidsRequest_IMPL NV_ASSERT(veidStart >= pKernelMIGGPUInstance->resourceAllocation.veidOffset); - *pSpanStart = (veidStart - pKernelMIGGPUInstance->resourceAllocation.veidOffset) / veidStepSize; + *pSpanStart = (veidStart - pKernelMIGGPUInstance->resourceAllocation.veidOffset) / veidSizePerSpan; *pInUseMask |= veidMask; return NV_OK; } + diff --git a/src/nvidia/src/kernel/gpu/gr/kernel_sm_debugger_session_ctrl.c b/src/nvidia/src/kernel/gpu/gr/kernel_sm_debugger_session_ctrl.c index 08bb00ac7a..6b7cb576f8 100644 --- a/src/nvidia/src/kernel/gpu/gr/kernel_sm_debugger_session_ctrl.c +++ b/src/nvidia/src/kernel/gpu/gr/kernel_sm_debugger_session_ctrl.c @@ -51,6 +51,7 @@ #include "class/cl83de.h" #include "class/clc637.h" +#include "class/cl0071.h" // NV01_MEMORY_SYSTEM_OS_DESCRIPTOR #include "ctrl/ctrl83de.h" // @@ -505,9 +506,9 @@ _nv83deCtrlCmdDebugAccessMemory ) { RsResourceRef *pResourceRef; + Memory *pMemory; MEMORY_DESCRIPTOR *pMemDesc; NvU64 totalLength; - NvP64 pCpuVirtAddr = NvP64_NULL; NV_STATUS rmStatus = NV_OK; NV_STATUS rmUnmapStatus = NV_OK; NvU32 flags = 0; @@ -521,8 +522,8 @@ _nv83deCtrlCmdDebugAccessMemory if (serverutilGetResourceRef(hClient, hMemory, &pResourceRef) != NV_OK) return NV_ERR_INSUFFICIENT_PERMISSIONS; - // Get a memdesc for this object to determine its attributes - if (!dynamicCast(pResourceRef->pResource, Memory)) + pMemory = dynamicCast(pResourceRef->pResource, Memory); + if (pMemory == NULL) { rmStatus = NV_ERR_INVALID_ARGUMENT; NV_PRINTF(LEVEL_WARNING, @@ -537,7 +538,8 @@ _nv83deCtrlCmdDebugAccessMemory return rmStatus; } - pMemDesc = dynamicCast(pResourceRef->pResource, Memory)->pMemDesc; + // Get a memdesc for this object to determine its attributes + pMemDesc = pMemory->pMemDesc; if (pMemDesc == NULL) return NV_ERR_INVALID_STATE; @@ -547,116 +549,132 @@ _nv83deCtrlCmdDebugAccessMemory if (totalLength > pMemDesc->Size) return NV_ERR_INVALID_ARGUMENT; - // Setup mapping flags based on the kind of memory, access type etc. - if (accessType == GRDBG_MEM_ACCESS_TYPE_READ) - { - flags = FLD_SET_DRF(OS33, _FLAGS, _ACCESS, _READ_ONLY, flags); - } - else - { - flags = FLD_SET_DRF(OS33, _FLAGS, _ACCESS, _WRITE_ONLY, flags); - } - bCpuMemory = (memdescGetAddressSpace(pMemDesc) == ADDR_SYSMEM); bGpuCached = (memdescGetGpuCacheAttrib(pMemDesc) == NV_MEMORY_CACHED); - // - // Ask for a direct mapping to this memory, to avoid getting a reflected - // mapping. We'll do explicit cache management to ensure coherence. - // - if (bCpuMemory) + // Ensure previous in-flight accesses are complete + osFlushCpuWriteCombineBuffer(); + + if (bCpuMemory && bGpuCached) { - flags = FLD_SET_DRF(OS33, _FLAGS, _MAPPING, _DIRECT, flags); + // + // Flush and invalidate SYSMEM lines from L2s of all GPUs. + // Some GPUs have write-back caches, so this must be done both for + // accessType == READ and accessType == WRITE. + // + NV_ASSERT_OK_OR_RETURN(_nv83deFlushAllGpusL2Cache(pMemDesc)); } - // Allow the mapping to happen successfully on HCC devtools mode - if (kbusIsBarAccessBlocked(GPU_GET_KERNEL_BUS(pTargetGpu)) && - gpuIsCCDevToolsModeEnabled(pTargetGpu)) + if (pMemory->categoryClassId == NV01_MEMORY_SYSTEM_OS_DESCRIPTOR) { - flags = FLD_SET_DRF(OS33, _FLAGS, _ALLOW_MAPPING_ON_HCC, _YES, flags); + // WAR: cudaHostRegister debugger test fails, temporary keep legacy behavior + return NV_ERR_NOT_SUPPORTED; } - // Map memory into the internal smdbg client - rmStatus = _nv83deMapMemoryIntoGrdbgClient(pTargetGpu, - pKernelSMDebuggerSession, - hClient, - hMemory, - offset, - length, - &pCpuVirtAddr, - flags); - if (NV_OK != rmStatus) + if (IS_VIRTUAL_WITHOUT_SRIOV(pTargetGpu) || IS_VIRTUAL_WITH_HEAVY_SRIOV(pTargetGpu) + || (!bCpuMemory && kbusIsBarAccessBlocked(GPU_GET_KERNEL_BUS(pTargetGpu)) && + gpuIsCCDevToolsModeEnabled(pTargetGpu)) + ) { - NV_PRINTF(LEVEL_WARNING, - "Failed to map memory into internal smdbg client (GPU 0x%llx, hClient 0x%x, hMemory %x, offset 0x%llx, length 0x%x, flags 0x%x): (rmStatus = %x)\n", - pTargetGpu->busInfo.gpuPhysAddr, - hClient, - hMemory, - offset, - length, - flags, - rmStatus); - return rmStatus; - } + NvP64 pCpuVirtAddr = NvP64_NULL; - // Fence to ensure previous in-flight accesses are complete - osFlushCpuWriteCombineBuffer(); + // Setup mapping flags based on the kind of memory, access type etc. + if (accessType == GRDBG_MEM_ACCESS_TYPE_READ) + { + flags = FLD_SET_DRF(OS33, _FLAGS, _ACCESS, _READ_ONLY, flags); + } + else + { + flags = FLD_SET_DRF(OS33, _FLAGS, _ACCESS, _WRITE_ONLY, flags); + } - // - // Flush and invalidate SYSMEM lines from L2s of all GPUs. - // Some GPUs have write-back caches, so this must be done both for - // accessType == READ and accessType == WRITE. - // - if (bCpuMemory && bGpuCached) - { - rmStatus = _nv83deFlushAllGpusL2Cache(pMemDesc); + if (!bCpuMemory && + kbusIsBarAccessBlocked(GPU_GET_KERNEL_BUS(pTargetGpu)) && + gpuIsCCDevToolsModeEnabled(pTargetGpu)) + { + // Allow the mapping to happen successfully on HCC devtools mode + flags = FLD_SET_DRF(OS33, _FLAGS, _ALLOW_MAPPING_ON_HCC, _YES, flags); + } + + // Map memory into the internal smdbg client + rmStatus = _nv83deMapMemoryIntoGrdbgClient(pTargetGpu, + pKernelSMDebuggerSession, + hClient, + hMemory, + offset, + length, + &pCpuVirtAddr, + flags); if (NV_OK != rmStatus) { NV_PRINTF(LEVEL_WARNING, - "Failed to flush GPU L2 (GPU 0x%llx): (rmStatus = %x)\n", - pTargetGpu->busInfo.gpuPhysAddr, rmStatus); - goto cleanup_mapping; + "Failed to map memory into internal smdbg client (GPU 0x%llx, hClient 0x%x, hMemory %x, offset 0x%llx, length 0x%x, flags 0x%x): (rmStatus = %x)\n", + pTargetGpu->busInfo.gpuPhysAddr, + hClient, + hMemory, + offset, + length, + flags, + rmStatus); + return rmStatus; } - } - // Perform the requested accessType operation - if (accessType == GRDBG_MEM_ACCESS_TYPE_READ) - { - if (!portMemCopy(NvP64_VALUE(buffer), length, NvP64_VALUE(pCpuVirtAddr), length)) + // Perform the requested accessType operation + if (accessType == GRDBG_MEM_ACCESS_TYPE_READ) { - rmStatus = NV_ERR_INVALID_ARGUMENT; - NV_PRINTF(LEVEL_WARNING, - "portMemCopy failed (from VA 0x" NvP64_fmt " to 0x" NvP64_fmt ", length 0x%x)\n", - pCpuVirtAddr, buffer, length); - goto cleanup_mapping; + if (!portMemCopy(NvP64_VALUE(buffer), length, NvP64_VALUE(pCpuVirtAddr), length)) + { + rmStatus = NV_ERR_INVALID_ARGUMENT; + NV_PRINTF(LEVEL_WARNING, + "portMemCopy failed (from VA 0x" NvP64_fmt " to 0x" NvP64_fmt ", length 0x%x)\n", + pCpuVirtAddr, buffer, length); + goto cleanup_mapping; + } + NV_PRINTF(LEVEL_INFO, "Reading %d bytes of memory from 0x%x\n", + length, hMemory); } - NV_PRINTF(LEVEL_INFO, "Reading %d bytes of memory from 0x%x\n", - length, hMemory); + else + { + if (!portMemCopy(NvP64_VALUE(pCpuVirtAddr), length, NvP64_VALUE(buffer), length)) + { + rmStatus = NV_ERR_INVALID_ARGUMENT; + NV_PRINTF(LEVEL_WARNING, + "portMemCopy failed (from VA 0x" NvP64_fmt " to 0x" NvP64_fmt ", length 0x%x)\n", + buffer, pCpuVirtAddr, length); + goto cleanup_mapping; + } + + NV_PRINTF(LEVEL_INFO, "Writing %d bytes of memory to 0x%x\n", length, + hMemory); + } + +cleanup_mapping: + // Unmap memory. + rmUnmapStatus = _nv83deUnmapMemoryFromGrdbgClient(pTargetGpu, + pKernelSMDebuggerSession, + pCpuVirtAddr, + flags); } else { - if (!portMemCopy(NvP64_VALUE(pCpuVirtAddr), length, NvP64_VALUE(buffer), length)) + MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pTargetGpu); + TRANSFER_SURFACE surf = { .pMemDesc = pMemDesc, .offset = offset }; + // Prefer CE, but use BAR1 if not available; disable for maxwell due to undebugged issues in specific tests + NvU32 transferFlags = (IsMAXWELL(pTargetGpu) ? 0 : TRANSFER_FLAGS_PREFER_CE) | + TRANSFER_FLAGS_USE_BAR1; + + if (accessType == GRDBG_MEM_ACCESS_TYPE_READ) { - rmStatus = NV_ERR_INVALID_ARGUMENT; - NV_PRINTF(LEVEL_WARNING, - "portMemCopy failed (from VA 0x" NvP64_fmt " to 0x" NvP64_fmt ", length 0x%x)\n", - buffer, pCpuVirtAddr, length); - goto cleanup_mapping; + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + memmgrMemRead(pMemoryManager, &surf, NvP64_VALUE(buffer), length, transferFlags)); + } + else + { + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + memmgrMemWrite(pMemoryManager, &surf, NvP64_VALUE(buffer), length, transferFlags)); } - - NV_PRINTF(LEVEL_INFO, "Writing %d bytes of memory to 0x%x\n", length, - hMemory); } - // Another fence to ensure our own new accesses are complete - osFlushCpuWriteCombineBuffer(); - -cleanup_mapping: - // Unmap memory. - rmUnmapStatus = _nv83deUnmapMemoryFromGrdbgClient(pTargetGpu, - pKernelSMDebuggerSession, - pCpuVirtAddr, - flags); // Return the first failure return (rmStatus != NV_OK ? rmStatus: rmUnmapStatus); } diff --git a/src/nvidia/src/kernel/gpu/gsp/arch/hopper/kernel_gsp_gh100.c b/src/nvidia/src/kernel/gpu/gsp/arch/hopper/kernel_gsp_gh100.c index 469b9853fc..52b2ca19e1 100644 --- a/src/nvidia/src/kernel/gpu/gsp/arch/hopper/kernel_gsp_gh100.c +++ b/src/nvidia/src/kernel/gpu/gsp/arch/hopper/kernel_gsp_gh100.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -30,6 +30,7 @@ #include "spdm/rmspdmtransport.h" #include "gpu/fsp/kern_fsp.h" #include "gpu/gsp/kernel_gsp.h" +#include "gpu/pmu/kern_pmu.h" #include "gpu/mem_sys/kern_mem_sys.h" #include "gsp/gspifpub.h" #include "vgpu/rpc.h" @@ -263,7 +264,9 @@ kgspWaitForGfwBootOk_GH100 * | VGA WORKSPACE | * ---------------------------- <- vbiosReservedOffset (64K? aligned) * | (potential align. gap) | - * ---------------------------- <- gspFwWprEnd (128K aligned) + * ---------------------------- <- gspFwWprEnd + frtsSize + pmuReservedSize + * | PMU mem reservation | + * ---------------------------- <- gspFwWprEnd (128K aligned) + frtsSize * | FRTS data | * | ------------------------ | <- frtsOffset * | BOOT BIN (e.g. GSP-FMC) | @@ -303,10 +306,11 @@ kgspCalculateFbLayout_GH100 NV_ASSERT_OR_RETURN(pRiscvDesc != NULL, NV_ERR_INVALID_STATE); // - // We send this to FSP as the size to reserve above FRTS. - // The actual offset gets filled in by ACR ucode when it sets up WPR2. + // We send these to FSP as the size to reserve above FRTS. + // The actual offsets get filled in by ACR ucode when it sets up WPR2. // pWprMeta->vgaWorkspaceSize = 128 * 1024; + pWprMeta->pmuReservedSize = kpmuReservedMemorySizeGet(GPU_GET_KERNEL_PMU(pGpu)); // Physical address and size of GSP-FMC ucode in system memory pWprMeta->sizeOfBootloader = pKernelGsp->gspRmBootUcodeSize; @@ -459,9 +463,32 @@ _kgspLockdownReleasedOrFmcError // // If lockdown has not been released, check NV_PGSP_FALCON_MAILBOX0, where the GSP-FMC // (namely ACR) logs error codes during boot. GSP-FMC reported errors are always fatal, - // so there's no reason to continue polling for lockdown release. + // so there's no reason to continue polling for lockdown release. This register can be + // accessed when GSP PRIV is locked down, but not when the GSP PRIV target mask is locked + // to FSP - so this shouldn't be called until the latter has been lifted. + // + // Generally, this mailbox check could fail if the PRIV target mask is *never* locked to FSP, + // e.g., this isn't a Chain-of-Trust (COT) boot, because we'd be able to read the original + // boot args addresses stuffed in the mailboxes (before the GSP-FMC has read and cleared + // them during bootstrap, while the PRIV target mask is typically locked in COT). To avoid + // premature failure in this case, if NV_PGSP_FALCON_MAILBOX0 is non-zero, check whether the + // boot args address is still in the mailboxes, and continue to wait, if so. // mailbox0 = kflcnRegRead_HAL(pGpu, pKernelFalcon, NV_PFALCON_FALCON_MAILBOX0); + if (mailbox0 != 0) + { + // + // Collision of a real error code with the boot args address should never happen: + // - the boot args phys address is page-allocated, so at least 4K-aligned, if not more + // - the GSP-FMC error codes stashed in NV_PGSP_FALCON_MAILBOX0 are effectively 8-bit + // and value 0 means "no error" + // + NvU64 physAddr = memdescGetPhysAddr(pKernelGsp->pGspFmcArgumentsDescriptor, AT_GPU, 0); + if ((NvU64_LO32(physAddr) == mailbox0) && + (NvU64_HI32(physAddr) == kflcnRegRead_HAL(pGpu, pKernelFalcon, NV_PFALCON_FALCON_MAILBOX1))) + return NV_FALSE; + } + hwcfg2 = kflcnRegRead_HAL(pGpu, pKernelFalcon, NV_PFALCON_FALCON_HWCFG2); return (FLD_TEST_DRF(_PFALCON, _FALCON_HWCFG2, _RISCV_BR_PRIV_LOCKDOWN, _UNLOCK, hwcfg2) || diff --git a/src/nvidia/src/kernel/gpu/gsp/arch/turing/kernel_gsp_tu102.c b/src/nvidia/src/kernel/gpu/gsp/arch/turing/kernel_gsp_tu102.c index d708e532cf..000ecccc2f 100644 --- a/src/nvidia/src/kernel/gpu/gsp/arch/turing/kernel_gsp_tu102.c +++ b/src/nvidia/src/kernel/gpu/gsp/arch/turing/kernel_gsp_tu102.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2017-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -942,6 +942,10 @@ kgspService_TU102 kgspDumpGspLogs(pKernelGsp, NV_FALSE); (void)kgspHealthCheck_HAL(pGpu, pKernelGsp); +#if defined(DEBUG) + NV_PRINTF(LEVEL_ERROR, "GSP-RM entered into ICD\n"); + DBG_BREAKPOINT(); +#endif } if (intrStatus & DRF_DEF(_PFALCON, _FALCON_IRQSTAT, _SWGEN0, _TRUE)) { diff --git a/src/nvidia/src/kernel/gpu/gsp/kernel_gsp.c b/src/nvidia/src/kernel/gpu/gsp/kernel_gsp.c index f3adbba731..9fed776bf6 100644 --- a/src/nvidia/src/kernel/gpu/gsp/kernel_gsp.c +++ b/src/nvidia/src/kernel/gpu/gsp/kernel_gsp.c @@ -65,6 +65,7 @@ #include "gpu/perf/kern_perf.h" #include "core/locks.h" #include "kernel/gpu/intr/intr.h" +#include "kernel/gpu/gr/fecs_event_list.h" #define RPC_STRUCTURES #define RPC_GENERIC_UNION @@ -92,6 +93,12 @@ struct MIG_CI_UPDATE_CALLBACK_PARAMS NvBool bDelete; }; +typedef struct +{ + NvU32 grIdx; + FECS_ERROR_EVENT_TYPE errorType; +} FECS_ERROR_REPORT; + // // RPC_PARAMS defines the rpc_params pointer and initializes it to the correct // sub-structure. @@ -145,6 +152,9 @@ static NV_STATUS _kgspGetSectionNameForPrefix(OBJGPU *pGpu, KernelGsp *pKernelGs char *pSectionNameBuf, NvLength sectionNameBufSize, const char *pSectionPrefix); +static NV_STATUS _kgspRpcGspEventFecsError(OBJGPU *, OBJRPC *); +static void _kgspRpcGspEventHandleFecsBufferError(NvU32, void *); + static void _kgspGetActiveRpcDebugData ( @@ -596,10 +606,13 @@ _kgspRpcRCTriggered return krcErrorSendEventNotifications_HAL(pGpu, pKernelRc, pKernelChannel, - rmEngineType, // unused on kernel side + rmEngineType, // unused on kernel side + rpc_params->exceptLevel, // unused on kernel side rpc_params->exceptType, rpc_params->scope, - rpc_params->partitionAttributionId); + rpc_params->partitionAttributionId, + NV_FALSE // unused on kernel side + ); } /*! @@ -846,14 +859,6 @@ _kgspRpcEventIsGpuDegradedCallback OBJRPC *pRpc ) { - RPC_PARAMS(nvlink_is_gpu_degraded, _v17_00); - KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); - NV2080_CTRL_NVLINK_IS_GPU_DEGRADED_PARAMS_v17_00 *dest = &rpc_params->params; - - if(dest->bIsGpuDegraded) - { - knvlinkSetDegradedMode(pGpu, pKernelNvlink, dest->linkId); - } } static void @@ -1116,7 +1121,7 @@ _kgspRpcMigCiConfigUpdate status = osQueueWorkItemWithFlags(pGpu, _kgspRpcMigCiConfigUpdateCallback, (void *)pParams, - OS_QUEUE_WORKITEM_FLAGS_LOCK_API_RW | OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS_RW); + OS_QUEUE_WORKITEM_FLAGS_LOCK_API_RW | OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS); if (status != NV_OK) { portMemFree(pParams); @@ -1449,6 +1454,10 @@ _kgspProcessRpcEvent _kgspRpcGspPostNocatRecord(pGpu, pRpc); break; + case NV_VGPU_MSG_EVENT_FECS_ERROR: + nvStatus = _kgspRpcGspEventFecsError(pGpu, pRpc); + break; + case NV_VGPU_MSG_EVENT_GSP_INIT_DONE: // Handled by _kgspRpcRecvPoll. default: // @@ -1478,6 +1487,71 @@ _kgspProcessRpcEvent _kgspCompleteRpcHistoryEntry(pRpc->rpcEventHistory, pRpc->rpcEventHistoryCurrent); } +/*! + * Receive FECS error notification from GSP + * + * FECS error interrupt goes to GSP, but Kernel needs + * to take action + */ +static NV_STATUS +_kgspRpcGspEventFecsError +( + OBJGPU *pGpu, + OBJRPC *pRpc +) +{ + NV_STATUS status; + RPC_PARAMS(fecs_error, _v26_02); + + switch (rpc_params->error_type) + { + case FECS_ERROR_EVENT_TYPE_BUFFER_RESET_REQUIRED: + case FECS_ERROR_EVENT_TYPE_BUFFER_FULL: + { + FECS_ERROR_REPORT *pErrorReport = portMemAllocNonPaged(sizeof(*pErrorReport)); + NV_ASSERT_OR_RETURN(pErrorReport != NULL, NV_ERR_NO_MEMORY); + + pErrorReport->grIdx = rpc_params->grIdx; + pErrorReport->errorType = rpc_params->error_type; + status = osQueueWorkItemWithFlags(pGpu, + _kgspRpcGspEventHandleFecsBufferError, + pErrorReport, + OS_QUEUE_WORKITEM_FLAGS_LOCK_API_RO | + OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_SUBDEVICE_RW); + + if (status != NV_OK) + portMemFree(pErrorReport); + + break; + } + default: + { + status = NV_ERR_INVALID_PARAMETER; + break; + } + } + + return status; +} + +/*! + * Processes the callback for the FECS buffer error notifications + * + * The callback RPCs to GSP, so it must be done with osQueueWorkItem + */ +static void +_kgspRpcGspEventHandleFecsBufferError +( + NvU32 gpuInstance, + void *pArgs +) +{ + OBJGPU *pGpu = gpumgrGetGpu(gpuInstance); + FECS_ERROR_REPORT *pErrorReport = (FECS_ERROR_REPORT *)pArgs; + + fecsHandleFecsLoggingError(pGpu, pErrorReport->grIdx, pErrorReport->errorType); +} + /*! * Handle a single RPC event from GSP unless the event is [an RPC return for] expectedFunc, * or there are no events available in the buffer. @@ -1983,19 +2057,6 @@ _kgspInitRpcInfrastructure goto done; } - // Init task_isr RPC object - if (pKernelGsp->bIsTaskIsrQueueRequired) - { - nvStatus = _kgspConstructRpcObject(pGpu, pKernelGsp, - &pMQCollection->rpcQueues[RPC_TASK_ISR_QUEUE_IDX], - &pKernelGsp->pLocklessRpc); - if (nvStatus != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, "init task ISR RPC infrastructure failed\n"); - goto done; - } - } - done: if (nvStatus != NV_OK) { @@ -2060,12 +2121,6 @@ _kgspFreeRpcInfrastructure portMemFree(pKernelGsp->pRpc); pKernelGsp->pRpc = NULL; } - if (pKernelGsp->pLocklessRpc != NULL) - { - rpcDestroy(pGpu, pKernelGsp->pLocklessRpc); - portMemFree(pKernelGsp->pLocklessRpc); - pKernelGsp->pLocklessRpc = NULL; - } GspMsgQueuesCleanup(&pKernelGsp->pMQCollection); } @@ -2789,33 +2844,12 @@ _kgspShouldRelaxGspInitLocking relaxGspInitLockingReg = NV_REG_STR_RM_RELAXED_GSP_INIT_LOCKING_DEFAULT; } - // Due to bug 4399629, restrict which platforms have parallel init enabled by default - if (relaxGspInitLockingReg == NV_REG_STR_RM_RELAXED_GSP_INIT_LOCKING_DEFAULT) + if ((relaxGspInitLockingReg == NV_REG_STR_RM_RELAXED_GSP_INIT_LOCKING_DEFAULT) || + (relaxGspInitLockingReg == NV_REG_STR_RM_RELAXED_GSP_INIT_LOCKING_ENABLE)) { - NvU16 devId = (NvU16)(((pGpu->idInfo.PCIDeviceID) >> 16) & 0x0000FFFF); - NvU32 i; - - static const NvU16 defaultRelaxGspInitLockingGpus[] = { - 0x1EB8, // T4 - 0x1EB9, // T4 - }; - - if (IsHOPPER(pGpu) || IsADA(pGpu)) - { - return NV_TRUE; - } - - for (i = 0; i < NV_ARRAY_ELEMENTS(defaultRelaxGspInitLockingGpus); i++) - { - if (devId == defaultRelaxGspInitLockingGpus[i]) - { - return NV_TRUE; - } - } - return NV_FALSE; + return NV_TRUE; } - return (relaxGspInitLockingReg == NV_REG_STR_RM_RELAXED_GSP_INIT_LOCKING_ENABLE); return NV_FALSE; } @@ -3098,7 +3132,7 @@ kgspInitRm_IMPL // Subsequent attempts will shift the GSP region of FB in an attempt to avoid the // unstable memory. // - const NvU8 MAX_GSP_BOOT_ATTEMPTS = 4; + const NvU8 MAX_GSP_BOOT_ATTEMPTS = 1; do { // Reset the thread state timeout after failed attempts to prevent premature timeouts. @@ -3399,16 +3433,6 @@ kgspPopulateGspRmInitArgs_IMPL pMQInitArgs->pageTableEntryCount = pMQCollection->pageTableEntryCount; pMQInitArgs->cmdQueueOffset = pMQCollection->pageTableSize; pMQInitArgs->statQueueOffset = pMQInitArgs->cmdQueueOffset + pMQCollection->rpcQueues[RPC_TASK_RM_QUEUE_IDX].commandQueueSize; - if (pKernelGsp->bIsTaskIsrQueueRequired) - { - pMQInitArgs->locklessCmdQueueOffset = pMQInitArgs->statQueueOffset + pMQCollection->rpcQueues[RPC_TASK_RM_QUEUE_IDX].statusQueueSize; - pMQInitArgs->locklessStatQueueOffset = pMQInitArgs->locklessCmdQueueOffset + pMQCollection->rpcQueues[RPC_TASK_ISR_QUEUE_IDX].commandQueueSize; - } - else - { - pMQInitArgs->locklessCmdQueueOffset = 0; - pMQInitArgs->locklessStatQueueOffset = 0; - } if (pGspInitArgs == NULL) { diff --git a/src/nvidia/src/kernel/gpu/gsp/kernel_gsp_fwsec.c b/src/nvidia/src/kernel/gpu/gsp/kernel_gsp_fwsec.c index e3788498b1..984d9b9d40 100644 --- a/src/nvidia/src/kernel/gpu/gsp/kernel_gsp_fwsec.c +++ b/src/nvidia/src/kernel/gpu/gsp/kernel_gsp_fwsec.c @@ -62,9 +62,14 @@ struct BIT_TOKEN_V1_00 bios_U008 TokenId; bios_U008 DataVersion; bios_U016 DataSize; - bios_U016 DataPtr; + bios_U032 DataPtr; }; -#define BIT_TOKEN_V1_00_FMT "2b2w" + +#define BIT_TOKEN_V1_00_SIZE_6 6U +#define BIT_TOKEN_V1_00_SIZE_8 8U + +#define BIT_TOKEN_V1_00_FMT_SIZE_6 "2b2w" +#define BIT_TOKEN_V1_00_FMT_SIZE_8 "2b1w1d" typedef struct BIT_TOKEN_V1_00 BIT_TOKEN_V1_00; #define BIT_TOKEN_BIOSDATA 0x42 @@ -76,6 +81,9 @@ typedef struct bios_U008 OemVersion; // OEM Version Number Ex. 5.40.00.01.12 = 0x12 } BIT_DATA_BIOSDATA_BINVER; +#define BIT_DATA_BIOSDATA_VERSION_1 0x1 +#define BIT_DATA_BIOSDATA_VERSION_2 0x2 + #define BIT_DATA_BIOSDATA_BINVER_FMT "1d1b" #define BIT_DATA_BIOSDATA_BINVER_SIZE_5 5 @@ -469,6 +477,7 @@ s_vbiosParseFwsecUcodeDescFromBit NV_STATUS status; BIT_HEADER_V1_00 bitHeader; NvU32 tokIdx; + const char *bitTokenSzFmt; NV_ASSERT_OR_RETURN(pVbiosImg != NULL, NV_ERR_INVALID_ARGUMENT); NV_ASSERT_OR_RETURN(pVbiosImg->pImage != NULL, NV_ERR_INVALID_ARGUMENT); @@ -483,10 +492,26 @@ s_vbiosParseFwsecUcodeDescFromBit return status; } + if (bitHeader.TokenSize >= BIT_TOKEN_V1_00_SIZE_8) + { + bitTokenSzFmt = BIT_TOKEN_V1_00_FMT_SIZE_8; + } + else if (bitHeader.TokenSize >= BIT_TOKEN_V1_00_SIZE_6) + { + bitTokenSzFmt = BIT_TOKEN_V1_00_FMT_SIZE_6; + } + else + { + NV_PRINTF(LEVEL_ERROR, + "Invalid BIT token size: %u\n", bitHeader.TokenSize); + DBG_BREAKPOINT(); + return NV_ERR_INVALID_STATE; + } + // loop through all BIT tokens for (tokIdx = 0; tokIdx < bitHeader.TokenEntries; tokIdx++) { - BIT_TOKEN_V1_00 bitToken; + BIT_TOKEN_V1_00 bitToken = {0}; BIT_DATA_FALCON_DATA_V2 falconData; FALCON_UCODE_TABLE_HDR_V1 ucodeHeader; @@ -496,7 +521,7 @@ s_vbiosParseFwsecUcodeDescFromBit status = s_vbiosReadStructure(pVbiosImg, &bitToken, bitAddr + bitHeader.HeaderSize + tokIdx * bitHeader.TokenSize, - BIT_TOKEN_V1_00_FMT); + bitTokenSzFmt); if (status != NV_OK) { NV_PRINTF(LEVEL_ERROR, @@ -508,7 +533,8 @@ s_vbiosParseFwsecUcodeDescFromBit // catch BIOSDATA token (for capturing VBIOS version) if (pVbiosVersionCombined != NULL && bitToken.TokenId == BIT_TOKEN_BIOSDATA && - ((bitToken.DataVersion == 1) || (bitToken.DataVersion == 2)) && + ((bitToken.DataVersion == BIT_DATA_BIOSDATA_VERSION_1) || + (bitToken.DataVersion == BIT_DATA_BIOSDATA_VERSION_2)) && bitToken.DataSize > BIT_DATA_BIOSDATA_BINVER_SIZE_5) { BIT_DATA_BIOSDATA_BINVER binver; diff --git a/src/nvidia/src/kernel/gpu/gsp/kernel_gsp_trace_rats.c b/src/nvidia/src/kernel/gpu/gsp/kernel_gsp_trace_rats.c new file mode 100644 index 0000000000..7a1e778c60 --- /dev/null +++ b/src/nvidia/src/kernel/gpu/gsp/kernel_gsp_trace_rats.c @@ -0,0 +1,296 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/*! + * @file + * @brief Kernel Side GSP Tracing Functions + */ + +#include "gpu/gsp/kernel_gsp_trace_rats.h" + +#include "rmapi/client.h" +#include "rmapi/event.h" +#include "rmapi/event_buffer.h" +#include "core/locks.h" +#include "class/cl90cdtypes.h" +#include "os/os.h" +#include "gpu/gpu.h" +#include "gpu_mgr/gpu_mgr.h" + +static +NV_STATUS +_gspTraceEventBufferAdd +( + OBJGPU *pGpu, + NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE *pBind, + NV_RATS_GSP_TRACE_RECORD *pRecord +) +{ + NV_STATUS status; + NvBool bNotify; + NvP64 notificationHandle; + EVENT_BUFFER_PRODUCER_DATA notifyEvent; + NvU32 notifyIndex = NV_EVENT_BUFFER_RECORD_TYPE_RATS_GSP_TRACE; + + pRecord->seqNo = pBind->pEventBuffer->seqNo++; + + portMemSet(¬ifyEvent, 0, sizeof(notifyEvent)); + notifyEvent.pVardata = NV_PTR_TO_NvP64(NULL); + notifyEvent.vardataSize = 0; + notifyEvent.pPayload = NV_PTR_TO_NvP64(pRecord); + notifyEvent.payloadSize = sizeof(*pRecord); + + status = eventBufferAdd(pBind->pEventBuffer, ¬ifyEvent, notifyIndex, &bNotify, ¬ificationHandle); + + if ((status == NV_OK) && bNotify && notificationHandle) + { + osEventNotification(pGpu, + pBind->pEventBuffer->pListeners, + notifyIndex, + ¬ifyEvent, + 0); // Do not copy structure -- embedded pointers. + pBind->pEventBuffer->bNotifyPending = NV_TRUE; + } + + return status; +} + +void gspTraceNotifyAllConsumers +( + OBJGPU *pGpu, + void *pArgs +) +{ + GspTraceEventBufferBindMultiMapSubmap *pSubmap = multimapFindSubmap(&pGpu->gspTraceEventBufferBindingsUid, 0); + if (pSubmap != NULL) + { + GspTraceEventBufferBindMultiMapIter iter = multimapSubmapIterItems(&pGpu->gspTraceEventBufferBindingsUid, pSubmap); + while (multimapItemIterNext(&iter)) + { + NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE* pBind = iter.pValue; + osEventNotification(pGpu, + pBind->pEventBuffer->pListeners, + NV_EVENT_BUFFER_RECORD_TYPE_RATS_GSP_TRACE, + NULL, + 0); // Do not copy structure -- embedded pointers. + } + } +} + +void +gspTraceEventBufferLogRecord +( + OBJGPU *pGpu, + NV_RATS_GSP_TRACE_RECORD *pRecord +) +{ + GspTraceEventBufferBindMultiMapSubmap *pSubmap = multimapFindSubmap(&pGpu->gspTraceEventBufferBindingsUid, 0); + if (pSubmap != NULL) + { + GspTraceEventBufferBindMultiMapIter iter = multimapSubmapIterItems(&pGpu->gspTraceEventBufferBindingsUid, pSubmap); + while (multimapItemIterNext(&iter)) + { + NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE* pBind = iter.pValue; + _gspTraceEventBufferAdd(pGpu, pBind, pRecord); + } + } +} + +NV_STATUS +gspTraceAddBindpoint +( + OBJGPU *pGpu, + RsClient *pClient, + RsResourceRef *pEventBufferRef, + NvHandle hNotifier, + NvU64 tracepointMask, + NvU32 gspLoggingBufferSize, + NvU32 gspLoggingBufferWatermark +) +{ + + NvHandle hClient = pClient->hClient; + NvU32 hInternalClient = pGpu->hInternalClient; + NvU32 hInternalSubdevice = pGpu->hInternalSubdevice; + NvHandle hEventBuffer = pEventBufferRef->hResource; + RmClient *pRmClient = dynamicCast(pClient, RmClient); + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + NvU64 targetUser = 0; // one root user app, for now... + NvBool bBindingActive = pGpu->gspTraceConsumerCount > 0; + NvBool bScheduled = NV_FALSE; + + NV_STATUS status; + EventBuffer *pEventBuffer; + + LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + + if (bBindingActive) + return NV_ERR_INSUFFICIENT_RESOURCES; + + pEventBuffer = dynamicCast(pEventBufferRef->pResource, EventBuffer); + if (pEventBuffer == NULL) + return NV_ERR_INVALID_ARGUMENT; + + if (NULL == multimapFindSubmap(&pGpu->gspTraceEventBufferBindingsUid, targetUser)) + { + if (NULL == multimapInsertSubmap(&pGpu->gspTraceEventBufferBindingsUid, targetUser)) + { + return NV_ERR_NO_MEMORY; + } + } + + NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE* pBind = multimapInsertItemNew(&pGpu->gspTraceEventBufferBindingsUid, 0, (NvU64)(NvUPtr)pEventBuffer); + if (pBind == NULL) + return NV_ERR_INVALID_ARGUMENT; + + pBind->hClient = hClient; + pBind->hNotifier = hNotifier; + pBind->hEventBuffer = hEventBuffer; + pBind->pEventBuffer = pEventBuffer; + pBind->pUserInfo = (NvU64)(NvUPtr)pRmClient->pUserInfo; + + ++pGpu->gspTraceConsumerCount; + status = registerEventNotification(&pEventBuffer->pListeners, + pClient, + hNotifier, + hEventBuffer, + NV_EVENT_BUFFER_RECORD_TYPE_RATS_GSP_TRACE | NV01_EVENT_WITHOUT_EVENT_DATA, + NV_EVENT_BUFFER_BIND, + pEventBuffer->producerInfo.notificationHandle, + NV_FALSE); + + if (status != NV_OK) + goto done; + + NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE_INFO_PARAMS ctrlParams = {0}; + ctrlParams.tracepointMask = tracepointMask; + ctrlParams.bufferSize = gspLoggingBufferSize; + ctrlParams.bufferWatermark = gspLoggingBufferWatermark; + ctrlParams.bStart = NV_TRUE; + + status = pRmApi->Control(pRmApi, hInternalClient, hInternalSubdevice, + NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE, + &ctrlParams, sizeof(ctrlParams)); + + if (status != NV_OK) + goto done; + + pGpu->gspTraceLoggingBufferActive = NV_TRUE; + + status = osSchedule1HzCallback(pGpu, + gspTraceNotifyAllConsumers, + NULL, + NV_OS_1HZ_REPEAT); + + if (status != NV_OK) + status = NV_ERR_INSUFFICIENT_RESOURCES; + + bScheduled = NV_TRUE; + +done: + if (status != NV_OK) + { + gspTraceRemoveBindpoint(pGpu, 0, pBind); + if (bScheduled) + { + osRemove1HzCallback(pGpu, gspTraceNotifyAllConsumers, NULL); + } + } + return status; +} + +void +gspTraceRemoveBindpoint +( + OBJGPU *pGpu, + NvU64 uid, + NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE* pBind +) +{ + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + EventBuffer *pEventBuffer = pBind->pEventBuffer; + NvU32 hInternalClient = pGpu->hInternalClient; + NvU32 hInternalSubdevice = pGpu->hInternalSubdevice; + + if (pGpu->gspTraceConsumerCount == 0) + return; + + --pGpu->gspTraceConsumerCount; + + unregisterEventNotificationWithData(&pEventBuffer->pListeners, + pBind->hClient, + pBind->hNotifier, + pBind->hEventBuffer, + NV_TRUE, + pEventBuffer->producerInfo.notificationHandle); + + multimapRemoveItemByKey(&pGpu->gspTraceEventBufferBindingsUid, + uid, + (NvU64)(NvUPtr)pEventBuffer); + + if (pGpu->gspTraceConsumerCount == 0) + { + osRemove1HzCallback(pGpu, gspTraceNotifyAllConsumers, NULL); + + if (pGpu->gspTraceLoggingBufferActive) + { + NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE_INFO_PARAMS params = {0}; + params.bStart = NV_FALSE; + pRmApi->Control(pRmApi, hInternalClient, hInternalSubdevice, + NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE, + ¶ms, sizeof(params)); + pGpu->gspTraceLoggingBufferActive = NV_FALSE; + } + } +} + +void +gspTraceRemoveAllBindpoints +( + EventBuffer *pEventBuffer +) +{ + OBJGPU *pGpu = NULL; + NvU32 gpuMask = 0; + NvU32 gpuIndex = 0; + GspTraceEventBufferBindMultiMapSupermapIter iter; + + gpumgrGetGpuAttachInfo(NULL, &gpuMask); + while ((pGpu = gpumgrGetNextGpu(gpuMask, &gpuIndex)) != NULL) + { + iter = multimapSubmapIterAll(&pGpu->gspTraceEventBufferBindingsUid); + while (multimapSubmapIterNext(&iter)) + { + GspTraceEventBufferBindMultiMapSubmap *pSubmap = iter.pValue; + NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE* pBind = NULL; + NvU64 uid = mapKey_IMPL(iter.iter.pMap, pSubmap); + + while ((pBind = multimapFindItem(&pGpu->gspTraceEventBufferBindingsUid, + uid, + (NvU64)(NvUPtr)pEventBuffer)) != NULL) + { + gspTraceRemoveBindpoint(pGpu, uid, pBind); + } + } + } +} diff --git a/src/nvidia/src/kernel/gpu/gsp/message_queue_cpu.c b/src/nvidia/src/kernel/gpu/gsp/message_queue_cpu.c index 0eb247a329..1cace10bda 100644 --- a/src/nvidia/src/kernel/gpu/gsp/message_queue_cpu.c +++ b/src/nvidia/src/kernel/gpu/gsp/message_queue_cpu.c @@ -65,10 +65,8 @@ _getMsgQueueParams MESSAGE_QUEUE_COLLECTION *pMQCollection ) { - KernelGsp *pKernelGsp = GPU_GET_KERNEL_GSP(pGpu); NvLength queueSize; MESSAGE_QUEUE_INFO *pRmQueueInfo = &pMQCollection->rpcQueues[RPC_TASK_RM_QUEUE_IDX]; - MESSAGE_QUEUE_INFO *pTaskIsrQueueInfo = &pMQCollection->rpcQueues[RPC_TASK_ISR_QUEUE_IDX]; NvU32 numPtes; const NvLength defaultCommandQueueSize = 0x40000; // 256 KB const NvLength defaultStatusQueueSize = 0x40000; // 256 KB @@ -101,24 +99,11 @@ _getMsgQueueParams pRmQueueInfo->statusQueueSize = defaultStatusQueueSize; } - // TaskIsrQueue sizes - if (pKernelGsp->bIsTaskIsrQueueRequired) - { - pTaskIsrQueueInfo->commandQueueSize = defaultCommandQueueSize; - pTaskIsrQueueInfo->statusQueueSize = defaultStatusQueueSize; - } - else - { - pTaskIsrQueueInfo->commandQueueSize = 0; - pTaskIsrQueueInfo->statusQueueSize = 0; - } - // // Calculate the number of entries required to map both queues in addition // to the page table itself. // - queueSize = pRmQueueInfo->commandQueueSize + pRmQueueInfo->statusQueueSize + - pTaskIsrQueueInfo->commandQueueSize + pTaskIsrQueueInfo->statusQueueSize; + queueSize = pRmQueueInfo->commandQueueSize + pRmQueueInfo->statusQueueSize; NV_ASSERT((queueSize & RM_PAGE_MASK) == 0); numPtes = (queueSize >> RM_PAGE_SHIFT); @@ -204,10 +189,8 @@ GspMsgQueuesInit MESSAGE_QUEUE_COLLECTION **ppMQCollection ) { - KernelGsp *pKernelGsp = GPU_GET_KERNEL_GSP(pGpu); MESSAGE_QUEUE_COLLECTION *pMQCollection = NULL; MESSAGE_QUEUE_INFO *pRmQueueInfo = NULL; - MESSAGE_QUEUE_INFO *pTaskIsrQueueInfo = NULL; RmPhysAddr *pPageTbl; NvP64 pVaKernel; NvP64 pPrivKernel; @@ -235,13 +218,10 @@ GspMsgQueuesInit _getMsgQueueParams(pGpu, pMQCollection); pRmQueueInfo = &pMQCollection->rpcQueues[RPC_TASK_RM_QUEUE_IDX]; - pTaskIsrQueueInfo = &pMQCollection->rpcQueues[RPC_TASK_ISR_QUEUE_IDX]; sharedBufSize = pMQCollection->pageTableSize + pRmQueueInfo->commandQueueSize + - pRmQueueInfo->statusQueueSize + - pTaskIsrQueueInfo->commandQueueSize + - pTaskIsrQueueInfo->statusQueueSize; + pRmQueueInfo->statusQueueSize; flags |= MEMDESC_FLAGS_ALLOC_IN_UNPROTECTED_MEMORY; @@ -289,10 +269,6 @@ GspMsgQueuesInit // RM Command queue entries // RM Status queue header // RM Status queue entries - // TASKISR Command queue header - // TASKISR Command queue entries - // TASKISR Status queue header - // TASKISR Status queue entries memdescGetPhysAddrs(pMQCollection->pSharedMemDesc, AT_GPU, // addressTranslation 0, // offset @@ -309,18 +285,6 @@ GspMsgQueuesInit lastQueueVa = NV_PTR_TO_NvP64(pRmQueueInfo->pStatusQueue); lastQueueSize = pRmQueueInfo->statusQueueSize; - if (pKernelGsp->bIsTaskIsrQueueRequired) - { - pTaskIsrQueueInfo->pCommandQueue = NvP64_VALUE( - NvP64_PLUS_OFFSET(NV_PTR_TO_NvP64(pRmQueueInfo->pStatusQueue), pRmQueueInfo->statusQueueSize)); - - pTaskIsrQueueInfo->pStatusQueue = NvP64_VALUE( - NvP64_PLUS_OFFSET(NV_PTR_TO_NvP64(pTaskIsrQueueInfo->pCommandQueue), pTaskIsrQueueInfo->commandQueueSize)); - - lastQueueVa = NV_PTR_TO_NvP64(pTaskIsrQueueInfo->pStatusQueue); - lastQueueSize = pTaskIsrQueueInfo->statusQueueSize; - } - // Assert that the last queue offset + size fits into the shared memory. NV_ASSERT(NvP64_PLUS_OFFSET(pVaKernel, sharedBufSize) == NvP64_PLUS_OFFSET(lastQueueVa, lastQueueSize)); @@ -328,12 +292,6 @@ GspMsgQueuesInit NV_ASSERT_OK_OR_GOTO(nvStatus, _gspMsgQueueInit(pRmQueueInfo), error_ret); pRmQueueInfo->queueIdx = RPC_TASK_RM_QUEUE_IDX; - if (pKernelGsp->bIsTaskIsrQueueRequired) - { - NV_ASSERT_OK_OR_GOTO(nvStatus, _gspMsgQueueInit(pTaskIsrQueueInfo), error_ret); - pTaskIsrQueueInfo->queueIdx = RPC_TASK_ISR_QUEUE_IDX; - } - *ppMQCollection = pMQCollection; pMQCollection->sharedMemPA = pPageTbl[0]; @@ -442,17 +400,14 @@ void GspMsgQueuesCleanup(MESSAGE_QUEUE_COLLECTION **ppMQCollection) { MESSAGE_QUEUE_COLLECTION *pMQCollection = NULL; MESSAGE_QUEUE_INFO *pRmQueueInfo = NULL; - MESSAGE_QUEUE_INFO *pTaskIsrQueueInfo = NULL; if ((ppMQCollection == NULL) || (*ppMQCollection == NULL)) return; pMQCollection = *ppMQCollection; pRmQueueInfo = &pMQCollection->rpcQueues[RPC_TASK_RM_QUEUE_IDX]; - pTaskIsrQueueInfo = &pMQCollection->rpcQueues[RPC_TASK_ISR_QUEUE_IDX]; _gspMsgQueueCleanup(pRmQueueInfo); - _gspMsgQueueCleanup(pTaskIsrQueueInfo); if (pMQCollection->pSharedMemDesc != NULL) { @@ -496,24 +451,24 @@ NV_STATUS GspMsgQueueSendCommand(MESSAGE_QUEUE_INFO *pMQI, OBJGPU *pGpu) NvU32 i; RMTIMEOUT timeout; NV_STATUS nvStatus = NV_OK; - NvU32 uElementSize = GSP_MSG_QUEUE_ELEMENT_HDR_SIZE + + NvU32 msgLen = GSP_MSG_QUEUE_ELEMENT_HDR_SIZE + pMQI->pCmdQueueElement->rpc.length; - if ((uElementSize < sizeof(GSP_MSG_QUEUE_ELEMENT)) || - (uElementSize > GSP_MSG_QUEUE_ELEMENT_SIZE_MAX)) + if ((msgLen < sizeof(GSP_MSG_QUEUE_ELEMENT)) || + (msgLen > GSP_MSG_QUEUE_ELEMENT_SIZE_MAX)) { - NV_PRINTF(LEVEL_ERROR, "Incorrect length %u\n", + NV_PRINTF(LEVEL_ERROR, "Incorrect message length %u\n", pMQI->pCmdQueueElement->rpc.length); nvStatus = NV_ERR_INVALID_PARAM_STRUCT; goto done; } // Make sure the queue element in our working space is zero padded for checksum. - if ((uElementSize & 7) != 0) - portMemSet(pSrc + uElementSize, 0, 8 - (uElementSize & 7)); + if ((msgLen & 7) != 0) + portMemSet(pSrc + msgLen, 0, 8 - (msgLen & 7)); pCQE->seqNum = pMQI->txSeqNum; - pCQE->elemCount = GSP_MSG_QUEUE_BYTES_TO_ELEMENTS(uElementSize); + pCQE->elemCount = GSP_MSG_QUEUE_BYTES_TO_ELEMENTS(msgLen); pCQE->checkSum = 0; // The checkSum field is included in the checksum calculation, so zero it. if (gpuIsCCFeatureEnabled(pGpu)) @@ -550,7 +505,7 @@ NV_STATUS GspMsgQueueSendCommand(MESSAGE_QUEUE_INFO *pMQI, OBJGPU *pGpu) } else { - pCQE->checkSum = _checkSum32(pSrc, uElementSize); + pCQE->checkSum = _checkSum32(pSrc, msgLen); } for (i = 0; i < pCQE->elemCount; i++) @@ -648,7 +603,7 @@ NV_STATUS GspMsgQueueReceiveStatus(MESSAGE_QUEUE_INFO *pMQI, OBJGPU *pGpu) NvU32 nRetries; NvU32 nMaxRetries = 3; NvU32 nElements = 1; // Assume record fits in one queue element for now. - NvU32 uElementSize; + NvU32 msgLen; NvU32 checkSum; NvU32 seqMismatchDiff = NV_U32_MAX; NV_STATUS nvStatus = NV_OK; @@ -791,14 +746,14 @@ NV_STATUS GspMsgQueueReceiveStatus(MESSAGE_QUEUE_INFO *pMQI, OBJGPU *pGpu) } // Sanity check for the given RPC length - uElementSize = GSP_MSG_QUEUE_ELEMENT_HDR_SIZE + pMQI->pCmdQueueElement->rpc.length; + msgLen = GSP_MSG_QUEUE_ELEMENT_HDR_SIZE + pMQI->pCmdQueueElement->rpc.length; - if ((uElementSize < sizeof(GSP_MSG_QUEUE_ELEMENT)) || - (uElementSize > GSP_MSG_QUEUE_ELEMENT_SIZE_MAX)) + if ((msgLen < sizeof(GSP_MSG_QUEUE_ELEMENT)) || + (msgLen > GSP_MSG_QUEUE_ELEMENT_SIZE_MAX)) { // The length is not valid. If we are running without a fence, // this could mean that the data is still in flight from the CPU. - NV_PRINTF(LEVEL_ERROR, "Incorrect length %u\n", + NV_PRINTF(LEVEL_ERROR, "Incorrect message length %u\n", pMQI->pCmdQueueElement->rpc.length); nvStatus = NV_ERR_INVALID_PARAM_STRUCT; } diff --git a/src/nvidia/src/kernel/gpu/hwpm/profiler_v2/kern_profiler_v2.c b/src/nvidia/src/kernel/gpu/hwpm/profiler_v2/kern_profiler_v2.c index dfb13b61d8..c11d87b4dd 100644 --- a/src/nvidia/src/kernel/gpu/hwpm/profiler_v2/kern_profiler_v2.c +++ b/src/nvidia/src/kernel/gpu/hwpm/profiler_v2/kern_profiler_v2.c @@ -336,22 +336,22 @@ _profilerDevConstructVgpuGuest NvBool *pBindPointAllocated = NULL; // Allocate the pPmaStreamList to store info about memaddr buffer CPU mapping - pPmaStreamList = portMemAllocNonPaged(sizeof(HWPM_PMA_STREAM) * pGpu->pKernelHwpm->maxPmaChannels); + pPmaStreamList = portMemAllocNonPaged(sizeof(HWPM_PMA_STREAM) * GPU_GET_KERNEL_HWPM(pGpu)->maxPmaChannels); if (pPmaStreamList == NULL) { return NV_ERR_NO_MEMORY; } - portMemSet(pPmaStreamList, 0, sizeof(HWPM_PMA_STREAM) * pGpu->pKernelHwpm->maxPmaChannels); + portMemSet(pPmaStreamList, 0, sizeof(HWPM_PMA_STREAM) * GPU_GET_KERNEL_HWPM(pGpu)->maxPmaChannels); - pBindPointAllocated = portMemAllocNonPaged(sizeof(NvBool) * pGpu->pKernelHwpm->maxPmaChannels); + pBindPointAllocated = portMemAllocNonPaged(sizeof(NvBool) * GPU_GET_KERNEL_HWPM(pGpu)->maxPmaChannels); if (pBindPointAllocated == NULL) { portMemFree(pPmaStreamList); return NV_ERR_NO_MEMORY; } - portMemSet(pBindPointAllocated, NV_FALSE, sizeof(NvBool) * pGpu->pKernelHwpm->maxPmaChannels); + portMemSet(pBindPointAllocated, NV_FALSE, sizeof(NvBool) * GPU_GET_KERNEL_HWPM(pGpu)->maxPmaChannels); pProfBase->pPmaStreamList = pPmaStreamList; pProfBase->pBindPointAllocated = pBindPointAllocated; @@ -459,6 +459,24 @@ profilerDevConstructStateInterlude_IMPL ¶ms, sizeof(params)); } +NV_STATUS +profilerDevConstructStateEpilogue_FWCLIENT +( + ProfilerDev *pProfDev, + CALL_CONTEXT *pCallContext, + RS_RES_ALLOC_PARAMS_INTERNAL *pParams +) +{ + ProfilerBase *pProfBase = staticCast(pProfDev, ProfilerBase); + RsResourceRef *pParentRef = pCallContext->pResourceRef->pParentRef; + + NV_ASSERT_OR_RETURN((pParentRef->internalClassId == classId(Subdevice)), NV_ERR_INVALID_OBJECT_PARENT); + + pProfBase->hSubDevice = pParentRef->hResource; + + return NV_OK; +} + void profilerDevDestruct_IMPL ( diff --git a/src/nvidia/src/kernel/gpu/hwpm/profiler_v2/kern_profiler_v2_ctrl.c b/src/nvidia/src/kernel/gpu/hwpm/profiler_v2/kern_profiler_v2_ctrl.c index a226065c60..32e1ee240d 100644 --- a/src/nvidia/src/kernel/gpu/hwpm/profiler_v2/kern_profiler_v2_ctrl.c +++ b/src/nvidia/src/kernel/gpu/hwpm/profiler_v2/kern_profiler_v2_ctrl.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -257,29 +257,22 @@ profilerBaseCtrlCmdAllocPmaStream_IMPL NVB0CC_CTRL_ALLOC_PMA_STREAM_PARAMS *pParams ) { - NV_STATUS status = NV_OK; OBJGPU *pGpu = GPU_RES_GET_GPU(pProfiler); RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); - NvHandle hClient = RES_GET_CLIENT_HANDLE(pProfiler); + RsClient *pClient = RES_GET_CLIENT(pProfiler); NvHandle hParent = RES_GET_PARENT_HANDLE(pProfiler); NvHandle hObject = RES_GET_HANDLE(pProfiler); - NvBool bMemPmaBufferRegistered = NV_FALSE; - NvBool bMemPmaBytesAvailableRegistered = NV_FALSE; NVB0CC_CTRL_INTERNAL_ALLOC_PMA_STREAM_PARAMS internalParams; RsResourceRef *pMemoryRef = NULL; // // REGISTER MEMDESCs TO GSP // These are no-op with BareMetal/No GSP // - NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, - memdescRegisterToGSP(pGpu, hClient, hParent, pParams->hMemPmaBuffer), - fail); - bMemPmaBufferRegistered = NV_TRUE; + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + memRegisterWithGsp(pGpu, pClient, hParent, pParams->hMemPmaBuffer)); - NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, - memdescRegisterToGSP(pGpu, hClient, hParent, pParams->hMemPmaBytesAvailable), - fail); - bMemPmaBytesAvailableRegistered = NV_TRUE; + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + memRegisterWithGsp(pGpu, pClient, hParent, pParams->hMemPmaBytesAvailable)); portMemSet(&internalParams, 0, sizeof(NVB0CC_CTRL_INTERNAL_ALLOC_PMA_STREAM_PARAMS)); internalParams.hMemPmaBuffer = pParams->hMemPmaBuffer; @@ -292,39 +285,39 @@ profilerBaseCtrlCmdAllocPmaStream_IMPL internalParams.pmaBufferVA = pParams->pmaBufferVA; internalParams.bInputPmaChIdx = NV_FALSE; - NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, pRmApi->Control(pRmApi, - hClient, + pClient->hClient, hObject, NVB0CC_CTRL_CMD_INTERNAL_ALLOC_PMA_STREAM, - &internalParams, sizeof(internalParams)), fail); + &internalParams, sizeof(internalParams))); pParams->pmaChannelIdx = internalParams.pmaChannelIdx; - if (serverutilGetResourceRef(hClient, pParams->hMemPmaBytesAvailable, &pMemoryRef) == NV_OK && - serverutilGetResourceRef(hClient, pParams->hMemPmaBuffer, &pMemoryRef) == NV_OK) + if (clientGetResourceRef(pClient, pParams->hMemPmaBytesAvailable, &pMemoryRef) == NV_OK && + clientGetResourceRef(pClient, pParams->hMemPmaBuffer, &pMemoryRef) == NV_OK) { if (pProfiler->ppBytesAvailable == NULL) { NVB0CC_CTRL_INTERNAL_GET_MAX_PMAS_PARAMS maxPmaParams; portMemSet(&maxPmaParams, 0, sizeof(NVB0CC_CTRL_INTERNAL_GET_MAX_PMAS_PARAMS)); - NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, - pRmApi->Control(pRmApi, hClient, hObject, + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + pRmApi->Control(pRmApi, pClient->hClient, hObject, NVB0CC_CTRL_CMD_INTERNAL_GET_MAX_PMAS, - &maxPmaParams, sizeof(maxPmaParams)), fail); + &maxPmaParams, sizeof(maxPmaParams))); pProfiler->maxPmaChannels = maxPmaParams.maxPmaChannels; pProfiler->ppBytesAvailable = (RsResourceRef**)portMemAllocNonPaged(maxPmaParams.maxPmaChannels * sizeof(RsResourceRef*)); pProfiler->ppStreamBuffers = (RsResourceRef**)portMemAllocNonPaged(maxPmaParams.maxPmaChannels * sizeof(RsResourceRef*)); } - NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, - serverutilGetResourceRef(hClient, pParams->hMemPmaBytesAvailable, &pMemoryRef), fail); + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + clientGetResourceRef(pClient, pParams->hMemPmaBytesAvailable, &pMemoryRef)); pProfiler->ppBytesAvailable[pParams->pmaChannelIdx] = pMemoryRef; refAddDependant(pMemoryRef, RES_GET_REF(pProfiler)); - NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, - serverutilGetResourceRef(hClient, pParams->hMemPmaBuffer, &pMemoryRef), fail); + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + clientGetResourceRef(pClient, pParams->hMemPmaBuffer, &pMemoryRef)); pProfiler->ppStreamBuffers[pParams->pmaChannelIdx] = pMemoryRef; refAddDependant(pMemoryRef, RES_GET_REF(pProfiler)); @@ -336,22 +329,7 @@ profilerBaseCtrlCmdAllocPmaStream_IMPL // Copy output params to external struct. pParams->pmaBufferVA = internalParams.pmaBufferVA; - return status; - -fail: - if (bMemPmaBufferRegistered) - { - // These are no-op with BareMetal/No GSP - NV_ASSERT_OK(memdescDeregisterFromGSP(pGpu, hClient, hParent, pParams->hMemPmaBuffer)); - } - - if (bMemPmaBytesAvailableRegistered) - { - // These are no-op with BareMetal/No GSP - NV_ASSERT_OK(memdescDeregisterFromGSP(pGpu, hClient, hParent, pParams->hMemPmaBytesAvailable)); - } - - return status; + return NV_OK; } /* diff --git a/src/nvidia/src/kernel/gpu/intr/arch/ampere/intr_ga100.c b/src/nvidia/src/kernel/gpu/intr/arch/ampere/intr_ga100.c index 5c71db686c..4e72d577d3 100644 --- a/src/nvidia/src/kernel/gpu/intr/arch/ampere/intr_ga100.c +++ b/src/nvidia/src/kernel/gpu/intr/arch/ampere/intr_ga100.c @@ -34,95 +34,44 @@ // intrga100.c - HAL routines for Ampere interrupt object // -/*! - * @brief Returns a 64 bit mask, where all the bits set to 0 are the ones we - * intend to leave enabled in the client shared subtree even when we disable - * interrupts (for example, when we take the GPU lock). - * - * The non-replayable fault interrupt is shared with the client, and in the - * top half of the interrupt handler, as such, we only copy fault packets from - * the HW buffer to the appropriate SW buffers. - * - * The timer interrupt also does not need to be blocked by the GPU lock - * since SWRL granular locking requires the timer interrupt to be serviced - * outside the GPU lock. - * Note - While we keep the timer interrupt enabled during the GPU lock, - * we don't enable it in the PTIMER level when SWRL granular locking is disabled. - */ -NvU64 -intrGetUvmSharedLeafEnDisableMask_GA100 + +void +intrGetLocklessVectorsInRmSubtree_GA100 ( - OBJGPU *pGpu, - Intr *pIntr + OBJGPU *pGpu, + Intr *pIntr, + NvU32 (*pInterruptVectors)[2] ) { - NvU32 intrVectorNonReplayableFault; - NvU32 intrVectorTimerSwrl; - NvU64 mask = 0; - NV2080_INTR_CATEGORY_SUBTREE_MAP uvmShared; - - // GSP RM services both MMU non-replayable fault and FIFO interrupts with - // vgpu plugin offload enabled. Otherwise, GSP RM only services FIFO interrupts - if (IS_GSP_CLIENT(pGpu)) - { - return ~mask; - } - - intrVectorNonReplayableFault = intrGetVectorFromEngineId(pGpu, pIntr, MC_ENGINE_IDX_NON_REPLAYABLE_FAULT, NV_FALSE); - intrVectorTimerSwrl = NV_INTR_VECTOR_INVALID; - - if ((intrVectorNonReplayableFault != NV_INTR_VECTOR_INVALID) && (intrVectorTimerSwrl != NV_INTR_VECTOR_INVALID)) + NvU32 i; + for (i = 0; i < NV_ARRAY_ELEMENTS((*pInterruptVectors)); i++) { - // Ascertain that they're in the same subtree and same leaf - NV_ASSERT(NV_CTRL_INTR_GPU_VECTOR_TO_SUBTREE(intrVectorNonReplayableFault) == - NV_CTRL_INTR_GPU_VECTOR_TO_SUBTREE(intrVectorTimerSwrl)); - NV_ASSERT(NV_CTRL_INTR_GPU_VECTOR_TO_LEAF_REG(intrVectorNonReplayableFault) == - NV_CTRL_INTR_GPU_VECTOR_TO_LEAF_REG(intrVectorTimerSwrl)); + (*pInterruptVectors)[i] = NV_INTR_VECTOR_INVALID; } + i = 0; - NV_ASSERT_OK(intrGetSubtreeRange(pIntr, - NV2080_INTR_CATEGORY_UVM_SHARED, - &uvmShared)); // - // Ascertain that we only have 1 client subtree (we assume this since we - // cache only 64 bits). + // The non-replayable fault interrupt is shared with the client, and in the + // top half of the interrupt handler, as such, we only copy fault packets + // from the HW buffer to the appropriate SW buffers. // - NV_ASSERT(uvmShared.subtreeStart == uvmShared.subtreeEnd); - // - // Ascertain that we only have 2 subtrees as this is what we currently - // support by only caching 64 bits + // On GSP we service non replayable faults in the bottom half, so we + // shouldn't mask them // - NV_ASSERT( - (NV_CTRL_INTR_SUBTREE_TO_LEAF_IDX_END(uvmShared.subtreeEnd) - 1) == - NV_CTRL_INTR_SUBTREE_TO_LEAF_IDX_START(uvmShared.subtreeStart)); - - // On GSP we service non replayable faults in the bottom half, so we shouldn't mask them - if (intrVectorNonReplayableFault != NV_INTR_VECTOR_INVALID) - { - // Ascertain that it's in the first leaf - NV_ASSERT( - NV_CTRL_INTR_GPU_VECTOR_TO_LEAF_REG(intrVectorNonReplayableFault) == - NV_CTRL_INTR_SUBTREE_TO_LEAF_IDX_START(uvmShared.subtreeStart)); + NV_ASSERT(i < NV_ARRAY_ELEMENTS((*pInterruptVectors))); - mask |= NVBIT32(NV_CTRL_INTR_GPU_VECTOR_TO_LEAF_BIT(intrVectorNonReplayableFault)); - } - - if (intrVectorTimerSwrl != NV_INTR_VECTOR_INVALID) + if (!IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu)) { - // Ascertain that it's in the first leaf - NV_ASSERT( - NV_CTRL_INTR_GPU_VECTOR_TO_LEAF_REG(intrVectorTimerSwrl) == - NV_CTRL_INTR_SUBTREE_TO_LEAF_IDX_START(uvmShared.subtreeStart)); - - mask |= NVBIT32(NV_CTRL_INTR_GPU_VECTOR_TO_LEAF_BIT(intrVectorTimerSwrl)); + (*pInterruptVectors)[i] = intrGetVectorFromEngineId(pGpu, pIntr, + MC_ENGINE_IDX_NON_REPLAYABLE_FAULT, + NV_FALSE); + i++; } - mask <<= 32; - - return ~mask; } + /*! * @brief Sanity check that the given stall engine interrupt vector is in the right tree * diff --git a/src/nvidia/src/kernel/gpu/intr/arch/maxwell/intr_gm107.c b/src/nvidia/src/kernel/gpu/intr/arch/maxwell/intr_gm107.c index 34d327125b..f9f4cee252 100644 --- a/src/nvidia/src/kernel/gpu/intr/arch/maxwell/intr_gm107.c +++ b/src/nvidia/src/kernel/gpu/intr/arch/maxwell/intr_gm107.c @@ -93,7 +93,7 @@ intrGetPendingStall_GM107 // for (i = 0; i < GPU_MAX_GRS; i++) { - KernelGraphics *pKernelGraphics = pGpu->pKernelGraphics[i]; + KernelGraphics *pKernelGraphics = GPU_GET_KERNEL_GRAPHICS(pGpu, i); if ((pKernelGraphics != NULL) && kgraphicsIsIntrDrivenCtxswLoggingEnabled(pGpu, pKernelGraphics) && fecsIsIntrPending(pGpu, pKernelGraphics)) @@ -105,3 +105,39 @@ intrGetPendingStall_GM107 return NV_OK; } + +/*! + * @brief Returns a bitfield with only MC_ENGINE_IDX_DISP set if it's pending + * Pre-Turing, there's only one stall interrupt register, so intrGetPendingStall_HAL + * will only read one register, and there's no perf concern in calling it + * + * @param[in] pGpu + * @param[in] pMc + * @param[out] pEngines List of engines that have pending stall interrupts + * @param[in] pThreadState + * + * @return NV_OK if the list of engines that have pending stall interrupts was retrieved + */ +NV_STATUS +intrGetPendingDisplayIntr_GM107 +( + OBJGPU *pGpu, + Intr *pIntr, + PMC_ENGINE_BITVECTOR pEngines, + THREAD_STATE_NODE *pThreadState +) +{ + MC_ENGINE_BITVECTOR intr0Pending; + + bitVectorClrAll(pEngines); + bitVectorClrAll(&intr0Pending); + + intrGetPendingStall_HAL(pGpu, pIntr, &intr0Pending, pThreadState); + + if (bitVectorTest(&intr0Pending, MC_ENGINE_IDX_DISP)) + { + bitVectorSet(pEngines, MC_ENGINE_IDX_DISP); + } + + return NV_OK; +} diff --git a/src/nvidia/src/kernel/gpu/intr/arch/turing/intr_tu102.c b/src/nvidia/src/kernel/gpu/intr/arch/turing/intr_tu102.c index ee04f8b43f..ee537cec23 100644 --- a/src/nvidia/src/kernel/gpu/intr/arch/turing/intr_tu102.c +++ b/src/nvidia/src/kernel/gpu/intr/arch/turing/intr_tu102.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2017-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -80,9 +80,9 @@ ct_assert(NV_VIRTUAL_FUNCTION_PRIV_CPU_INTR_LEAF__SIZE_1 == NV_VIRTUAL_FUNCTION_ NV_STATUS intrStateLoad_TU102 ( - OBJGPU *pGpu, - Intr *pIntr, - NvU32 flags + OBJGPU *pGpu, + Intr *pIntr, + NvU32 flags ) { NV_STATUS status = NV_OK; @@ -276,7 +276,7 @@ intrCacheIntrFields_TU102 pIntr->uvmSharedCpuLeafEn = ((NvU64)(leafEnHi) << 32) | leafEnLo; pIntr->uvmSharedCpuLeafEnDisableMask = - intrGetUvmSharedLeafEnDisableMask_HAL(pGpu, pIntr); + intrGetUvmSharedLeafEnDisableMask(pGpu, pIntr); } exit: @@ -707,87 +707,49 @@ _intrGetUvmLeafMask_TU102 return val; } -/*! -* @brief Returns a 64 bit mask, where all the bits set to 0 are the ones we -* intend to leave enabled in the client shared subtree even when we disable -* interrupts (for example, when we take the GPU lock). -* -* The non-replayable fault interrupt is shared with the client, and in the -* top half of the interrupt handler, as such, we only copy fault packets from -* the HW buffer to the appropriate SW buffers. -* The fifo non-stall interrupt is used for runlist events, which also does not -* need to be blocked by the GPU lock (existing codepaths already ascertain that -* this is safe, so we're maintaining that behavior in NV_CTRL). -*/ -NvU64 -intrGetUvmSharedLeafEnDisableMask_TU102 +void +intrGetLocklessVectorsInRmSubtree_TU102 ( OBJGPU *pGpu, - Intr *pIntr + Intr *pIntr, + NvU32 (*pInterruptVectors)[2] ) { - NvU32 intrVectorNonReplayableFault; - NvU32 intrVectorFifoNonstall = NV_INTR_VECTOR_INVALID; - NvU64 mask = 0; - NV2080_INTR_CATEGORY_SUBTREE_MAP uvmShared; - - // GSP RM services both MMU non-replayable fault and FIFO interrupts - if (IS_GSP_CLIENT(pGpu)) - { - return ~mask; - } - - intrVectorNonReplayableFault = intrGetVectorFromEngineId(pGpu, pIntr, MC_ENGINE_IDX_NON_REPLAYABLE_FAULT, NV_FALSE); - - if (!IS_VIRTUAL(pGpu)) - { - intrVectorFifoNonstall = intrGetVectorFromEngineId(pGpu, pIntr, MC_ENGINE_IDX_FIFO, NV_TRUE); - } - - if (intrVectorFifoNonstall != NV_INTR_VECTOR_INVALID) + NvU32 i; + for (i = 0; i < NV_ARRAY_ELEMENTS((*pInterruptVectors)); i++) { - // Ascertain that they're in the same subtree and same leaf - NV_ASSERT(NV_CTRL_INTR_GPU_VECTOR_TO_SUBTREE(intrVectorNonReplayableFault) == - NV_CTRL_INTR_GPU_VECTOR_TO_SUBTREE(intrVectorFifoNonstall)); - NV_ASSERT(NV_CTRL_INTR_GPU_VECTOR_TO_LEAF_REG(intrVectorNonReplayableFault) == - NV_CTRL_INTR_GPU_VECTOR_TO_LEAF_REG(intrVectorFifoNonstall)); + (*pInterruptVectors)[i] = NV_INTR_VECTOR_INVALID; } + i = 0; - NV_ASSERT_OK(intrGetSubtreeRange(pIntr, - NV2080_INTR_CATEGORY_UVM_SHARED, - &uvmShared)); + NV_ASSERT(i < NV_ARRAY_ELEMENTS((*pInterruptVectors))); // - // Ascertain that we only have 1 client subtree (we assume - // this since we cache only 64 bits). + // The non-replayable fault interrupt is shared with the client, and in the + // top half of the interrupt handler, as such, we only copy fault packets + // from the HW buffer to the appropriate SW buffers. // - NV_ASSERT(uvmShared.subtreeStart == uvmShared.subtreeEnd); - - // - // Ascertain that we only have 2 subtrees as this is what we currently - // support by only caching 64 bits - // - NV_ASSERT( - (NV_CTRL_INTR_SUBTREE_TO_LEAF_IDX_END(uvmShared.subtreeEnd) - 1) == - NV_CTRL_INTR_SUBTREE_TO_LEAF_IDX_START(uvmShared.subtreeStart)); - + (*pInterruptVectors)[i] = intrGetVectorFromEngineId(pGpu, pIntr, + MC_ENGINE_IDX_NON_REPLAYABLE_FAULT, + NV_FALSE); + i++; - // Ascertain that they're in the first leaf - NV_ASSERT( - NV_CTRL_INTR_GPU_VECTOR_TO_LEAF_REG(intrVectorNonReplayableFault) == - NV_CTRL_INTR_SUBTREE_TO_LEAF_IDX_START(uvmShared.subtreeStart)); - - mask |= NVBIT64(NV_CTRL_INTR_GPU_VECTOR_TO_LEAF_BIT(intrVectorNonReplayableFault)); - - if (intrVectorFifoNonstall != NV_INTR_VECTOR_INVALID) + if (!IS_VIRTUAL(pGpu)) { - mask |= NVBIT64(NV_CTRL_INTR_GPU_VECTOR_TO_LEAF_BIT(intrVectorFifoNonstall)); + NV_ASSERT(i < NV_ARRAY_ELEMENTS((*pInterruptVectors))); + // + // The fifo non-stall interrupt is used for runlist events, which also + // does not need to be blocked by the GPU lock (existing codepaths + // already ascertain that this is safe, so we're maintaining that + // behavior in NV_CTRL). + // + (*pInterruptVectors)[i] = intrGetVectorFromEngineId(pGpu, pIntr, + MC_ENGINE_IDX_FIFO, + NV_TRUE); + i++; } - - mask <<= 32; - - return ~mask; } + /*! * @brief Gets list of engines with pending stalling interrupts as per the interrupt trees * diff --git a/src/nvidia/src/kernel/gpu/intr/intr.c b/src/nvidia/src/kernel/gpu/intr/intr.c index 2f778a0f01..c54c92efa9 100644 --- a/src/nvidia/src/kernel/gpu/intr/intr.c +++ b/src/nvidia/src/kernel/gpu/intr/intr.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -170,7 +170,7 @@ subdeviceCtrlCmdMcServiceInterrupts_IMPL // // Force kernel-RM to service interrupts from GSP-RM. This will allow - // kernel-RM to write notifiers and send an ack back to GSP. + // kernel-RM to write notifiers and send an ack back to GSP. // GSP waits for this ack before clearing fast path POSSIBLE_ERR interrupt. // if (pGpu->getProperty(pGpu, PDB_PROP_GPU_FASTPATH_SEQ_ENABLED)) @@ -592,13 +592,24 @@ intrGetVectorFromEngineId_IMPL NvBool bNonStall ) { + NvU32 intrVector; INTR_TABLE_ENTRY *pEntry = intrGetInterruptTableEntryFromEngineId(pGpu, pIntr, mcEngineId, bNonStall); NV_ASSERT_OR_RETURN(pEntry != NULL, NV_INTR_VECTOR_INVALID); - return bNonStall ? pEntry->intrVectorNonStall : pEntry->intrVector; + intrVector = bNonStall ? pEntry->intrVectorNonStall : pEntry->intrVector; + + if (intrVector == NV_INTR_VECTOR_INVALID) + { + NV_PRINTF(LEVEL_ERROR, "mcEngineIdx %d with bNonStall = %d has invalid vector\n", + mcEngineId, bNonStall); + + NV_ASSERT_OR_RETURN(intrVector != NV_INTR_VECTOR_INVALID, NV_INTR_VECTOR_INVALID); + } + + return intrVector; } @@ -789,6 +800,29 @@ intrDestruct_IMPL } +NV_STATUS +intrStatePreInitLocked_IMPL +( + OBJGPU *pGpu, + Intr *pIntr +) +{ + NV_STATUS status = NV_OK; + + for (NvU32 i = 0; i < NV_ARRAY_ELEMENTS(pIntr->subtreeMap); i++) + { + pIntr->subtreeMap[i].subtreeStart = NV2080_INTR_INVALID_SUBTREE; + pIntr->subtreeMap[i].subtreeEnd = NV2080_INTR_INVALID_SUBTREE; + } + + NV_ASSERT_OK_OR_GOTO(status, intrInitInterruptTable_HAL(pGpu, pIntr), exit); + _intrInitServiceTable(pGpu, pIntr); + +exit: + + return status; +} + NV_STATUS intrStateInitUnlocked_IMPL ( @@ -797,7 +831,6 @@ intrStateInitUnlocked_IMPL ) { NvU32 data = 0; - NvU32 i; if (osReadRegistryDword(pGpu, NV_REG_STR_RM_INTR_DETAILED_LOGS, &data) == NV_OK) @@ -812,12 +845,6 @@ intrStateInitUnlocked_IMPL _intrInitRegistryOverrides(pGpu, pIntr); - for (i = 0; i < NV_ARRAY_ELEMENTS(pIntr->subtreeMap); ++i) - { - pIntr->subtreeMap[i].subtreeStart = NV2080_INTR_INVALID_SUBTREE; - pIntr->subtreeMap[i].subtreeEnd = NV2080_INTR_INVALID_SUBTREE; - } - return NV_OK; } @@ -829,7 +856,6 @@ intrStateInitLocked_IMPL Intr *pIntr ) { - NV_STATUS status = NV_OK; // Enable interrupts in the HAL pIntr->halIntrEnabled = NV_TRUE; @@ -847,12 +873,8 @@ intrStateInitLocked_IMPL pKernelGmmu->uvmSharedIntrRmOwnsMask = RM_UVM_SHARED_INTR_MASK_ALL; } - NV_ASSERT_OK_OR_GOTO(status, intrInitInterruptTable_HAL(pGpu, pIntr), exit); - _intrInitServiceTable(pGpu, pIntr); - if (pIntr->getProperty(pIntr, PDB_PROP_INTR_USE_INTR_MASK_FOR_LOCKING)) { - intrGetIntrMask_HAL(pGpu, pIntr, &pIntr->intrMask.engMaskOrig, NULL /* threadstate */); if (RMCFG_FEATURE_PLATFORM_WINDOWS) { MC_ENGINE_BITVECTOR engines; @@ -866,9 +888,7 @@ intrStateInitLocked_IMPL // Hypervisor will set the intr unblocked mask later at the time of SWRL init. } -exit: - - return status; + return NV_OK; } void @@ -954,8 +974,7 @@ _intrInitRegistryOverrides if (RMCFG_FEATURE_PLATFORM_WINDOWS || hypervisorIsVgxHyper()) { // Enable IntrMask Locking by default if supported - if (pIntr->getProperty(pIntr, PDB_PROP_INTR_MASK_SUPPORTED) && - (!IS_VIRTUAL(pGpu) && !IS_GSP_CLIENT(pGpu))) + if (pIntr->getProperty(pIntr, PDB_PROP_INTR_MASK_SUPPORTED) && !IS_VIRTUAL(pGpu)) { pIntr->setProperty(pIntr, PDB_PROP_INTR_USE_INTR_MASK_FOR_LOCKING, NV_TRUE); } @@ -1072,18 +1091,14 @@ _intrInitServiceTable Intr *pIntr ) { - ENGSTATE_ITER iter = gpuGetEngstateIter(pGpu); - OBJENGSTATE *pEngstate; + GPU_CHILD_ITER iter = {0}; + IntrService *pIntrService; portMemSet(pIntr->intrServiceTable, 0, sizeof(pIntr->intrServiceTable)); - while (gpuGetNextEngstate(pGpu, &iter, &pEngstate)) + while ((pIntrService = GPU_GET_NEXT_CHILD_OF_TYPE(pGpu, &iter, IntrService))) { - IntrService *pIntrService = dynamicCast(pEngstate, IntrService); - if (pIntrService != NULL) - { - intrservRegisterIntrService(pGpu, pIntrService, pIntr->intrServiceTable); - } + intrservRegisterIntrService(pGpu, pIntrService, pIntr->intrServiceTable); } gpuRegisterGenericKernelFalconIntrService(pGpu, pIntr->intrServiceTable); @@ -1121,10 +1136,9 @@ NvU32 intrServiceInterruptRecords_IMPL if (bShouldService) { - GSP_TRACE_RATS_ADD_RECORD(NV_RATS_GSP_TRACE_TYPE_INTR_INFO, pGpu, (NvU32) engineIdx); GSP_TRACE_RATS_ADD_RECORD(NV_RATS_GSP_TRACE_TYPE_INTR_START, pGpu, 0); ret = intrservServiceInterrupt(pGpu, pIntrService, &serviceParams); - GSP_TRACE_RATS_ADD_RECORD(NV_RATS_GSP_TRACE_TYPE_INTR_END, pGpu, 0); + GSP_TRACE_RATS_ADD_RECORD(NV_RATS_GSP_TRACE_TYPE_INTR_END, pGpu, (NvU32) engineIdx); } return ret; } @@ -1777,3 +1791,78 @@ NV_STATUS intrSetInterruptEntry_IMPL pIntr->vectorToMcIdx[tree][vector] = *pEntry; return NV_OK; } + + +NvU64 +intrGetUvmSharedLeafEnDisableMask_IMPL +( + OBJGPU *pGpu, + Intr *pIntr +) +{ + NvU64 mask = 0; + NV2080_INTR_CATEGORY_SUBTREE_MAP uvmShared; + + // GSP RM services both MMU non-replayable fault and FIFO interrupts + if (IS_GSP_CLIENT(pGpu)) + { + return ~mask; + } + + NvU32 locklessRmVectors[2]; + intrGetLocklessVectorsInRmSubtree_HAL(pGpu, pIntr, &locklessRmVectors); + + NV_ASSERT_OK(intrGetSubtreeRange(pIntr, + NV2080_INTR_CATEGORY_UVM_SHARED, + &uvmShared)); + // + // Ascertain that we only have 1 client subtree (we assume + // this since we cache only 64 bits). + // + NV_ASSERT(uvmShared.subtreeStart == uvmShared.subtreeEnd); + + // + // Ascertain that we only have 2 subtrees as this is what we currently + // support by only caching 64 bits + // + NV_ASSERT( + (NV_CTRL_INTR_SUBTREE_TO_LEAF_IDX_END(uvmShared.subtreeEnd) - 1) == + NV_CTRL_INTR_SUBTREE_TO_LEAF_IDX_START(uvmShared.subtreeStart)); + + NvU32 i; + for (i = 0; i < NV_ARRAY_ELEMENTS(locklessRmVectors); ++i) + { + NvU32 vector = locklessRmVectors[i]; + if (vector == NV_INTR_VECTOR_INVALID) + { + continue; + } + + // Ascertain that they're in the first leaf + NV_ASSERT( + NV_CTRL_INTR_GPU_VECTOR_TO_LEAF_REG(vector) == + NV_CTRL_INTR_SUBTREE_TO_LEAF_IDX_START(uvmShared.subtreeStart)); + + mask |= NVBIT64(NV_CTRL_INTR_GPU_VECTOR_TO_LEAF_BIT(vector)); + } + + mask <<= 32; + + return ~mask; +} + +NV_STATUS +intrRefetchInterruptTable_IMPL +( + OBJGPU *pGpu, + Intr *pIntr +) +{ + NV_ASSERT_OK_OR_RETURN(intrStateUnload_HAL(pGpu, pIntr, GPU_STATE_FLAGS_PRESERVING)); + + NV_ASSERT_OK_OR_RETURN(intrInitInterruptTable_HAL(pGpu, pIntr)); + + NV_ASSERT_OK_OR_RETURN(intrStateLoad_HAL(pGpu, pIntr, GPU_STATE_FLAGS_PRESERVING)); + + return NV_OK; +} diff --git a/src/nvidia/src/kernel/gpu/intr/intr_vgpu.c b/src/nvidia/src/kernel/gpu/intr/intr_vgpu.c index 5d6353e4ab..370cfe0df6 100644 --- a/src/nvidia/src/kernel/gpu/intr/intr_vgpu.c +++ b/src/nvidia/src/kernel/gpu/intr/intr_vgpu.c @@ -205,72 +205,41 @@ _intrCopyVfDynamicInterruptTable } NV_STATUS -intrInitInterruptTable_VIRTUAL +intrInitInterruptTable_VF ( OBJGPU *pGpu, Intr *pIntr ) { - NV_STATUS status = NV_OK; - NvHandle hClient = NV01_NULL_OBJECT; - NvHandle hObject = NV01_NULL_OBJECT; NvU32 numEngines = kfifoGetNumEngines_HAL(pGpu, GPU_GET_KERNEL_FIFO(pGpu)); VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); - - NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS *pStaticParams = NULL; + NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS *pStaticParams = &pVSI->mcStaticIntrTable; NV_ASSERT_OR_RETURN(vectIsEmpty(&pIntr->intrTable), NV_ERR_INVALID_STATE); - // Allocate params on the heap to avoid stack overflow - pStaticParams = portMemAllocNonPaged(sizeof *pStaticParams); - NV_ASSERT_TRUE_OR_GOTO(status, - pStaticParams != NULL, - NV_ERR_NO_MEMORY, - cleanup); - - NV_RM_RPC_CONTROL(pGpu, - hClient, - hObject, - NV2080_CTRL_CMD_MC_GET_STATIC_INTR_TABLE, - pStaticParams, - sizeof(*pStaticParams), - status); - NV_ASSERT_OR_GOTO(status == NV_OK, cleanup); - NV_ASSERT_TRUE_OR_GOTO(status, - pStaticParams->numEntries <= - NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_MAX, - NV_ERR_OUT_OF_RANGE, - cleanup); + NV_ASSERT_OR_RETURN(pStaticParams->numEntries <= + NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_MAX, + NV_ERR_OUT_OF_RANGE); - NV_ASSERT_TRUE_OR_GOTO(status, + NV_ASSERT_OR_RETURN( pVSI->mcEngineNotificationIntrVectors.numEntries <= NV2080_CTRL_MC_GET_ENGINE_NOTIFICATION_INTR_VECTORS_MAX_ENGINES, - NV_ERR_OUT_OF_RANGE, - cleanup); + NV_ERR_OUT_OF_RANGE); - NV_ASSERT_OK_OR_GOTO(status, + NV_ASSERT_OK_OR_RETURN( vectReserve(&pIntr->intrTable, - pStaticParams->numEntries + pVSI->mcEngineNotificationIntrVectors.numEntries), - cleanup); - NV_ASSERT_OK_OR_GOTO(status, - _intrCopyVfStaticInterruptTable(pGpu, pIntr, - &pIntr->intrTable, - pStaticParams), - cleanup); - NV_ASSERT_OK_OR_GOTO(status, - _intrCopyVfDynamicInterruptTable(pGpu, pIntr, - numEngines, - &pIntr->intrTable, - &pVSI->mcEngineNotificationIntrVectors), - cleanup); + pStaticParams->numEntries + pVSI->mcEngineNotificationIntrVectors.numEntries)); + NV_ASSERT_OK_OR_RETURN(_intrCopyVfStaticInterruptTable(pGpu, pIntr, + &pIntr->intrTable, + pStaticParams)); + NV_ASSERT_OK_OR_RETURN(_intrCopyVfDynamicInterruptTable(pGpu, pIntr, + numEngines, + &pIntr->intrTable, + &pVSI->mcEngineNotificationIntrVectors)); vectTrim(&pIntr->intrTable, 0); - status = NV_OK; - // Bug 3823562 TODO: Fetch this from Host RM intrInitSubtreeMap_HAL(pGpu, pIntr); -cleanup: - portMemFree(pStaticParams); - return status; + return NV_OK; } diff --git a/src/nvidia/src/kernel/gpu/mc/arch/ampere/kernel_mc_ga100.c b/src/nvidia/src/kernel/gpu/mc/arch/ampere/kernel_mc_ga100.c index 40112a590c..07950f7d1f 100644 --- a/src/nvidia/src/kernel/gpu/mc/arch/ampere/kernel_mc_ga100.c +++ b/src/nvidia/src/kernel/gpu/mc/arch/ampere/kernel_mc_ga100.c @@ -24,6 +24,7 @@ #include "core/core.h" #include "kernel/gpu/mc/kernel_mc.h" #include "gpu/gpu.h" +#include "os/os.h" #include "published/ampere/ga100/dev_boot.h" @@ -56,11 +57,9 @@ kmcWritePmcEnableReg_GA100 // // If hardware increases the size of this register in future chips, we would // need to catch this and fork another HAL. + // Already obsoleted by GH100, but keeping the check // - if ((sizeof(NvU32) * NV_PMC_DEVICE_ENABLE__SIZE_1) > sizeof(NvU32)) - { - NV_ASSERT_FAILED("Assert for Mcheck to catch increase in register size. Fork this HAL"); - } + ct_assert(NV_PMC_DEVICE_ENABLE__SIZE_1 <= 1); if (bIsPmcDeviceEngine) { @@ -85,12 +84,8 @@ kmcWritePmcEnableReg_GA100 GPU_REG_WR32(pGpu, regAddr, newPmc); - // - // Read from NV_PMC_ENABLE to create enough delay for engines reset to complete. - // - newPmc = GPU_REG_RD32(pGpu, regAddr); - newPmc = GPU_REG_RD32(pGpu, regAddr); - newPmc = GPU_REG_RD32(pGpu, regAddr); + // Delay for engines reset to complete. + osDelayUs(NV_PMC_RESET_DELAY_US); return NV_OK; } diff --git a/src/nvidia/src/kernel/gpu/mc/arch/hopper/kernel_mc_gh100.c b/src/nvidia/src/kernel/gpu/mc/arch/hopper/kernel_mc_gh100.c index 05f4927108..ca2e34df31 100644 --- a/src/nvidia/src/kernel/gpu/mc/arch/hopper/kernel_mc_gh100.c +++ b/src/nvidia/src/kernel/gpu/mc/arch/hopper/kernel_mc_gh100.c @@ -55,8 +55,8 @@ kmcWritePmcEnableReg_GH100 return NV_ERR_INVALID_ARGUMENT; } - // No need for bIsPmcDeviceEngine, so just call GK104 - return kmcWritePmcEnableReg_GK104(pGpu, pKernelMc, pmcEnableMask, bEnable, NV_FALSE); + // No need for bIsPmcDeviceEngine, so just call GM107 + return kmcWritePmcEnableReg_GM107(pGpu, pKernelMc, pmcEnableMask, bEnable, NV_FALSE); } /*! @@ -84,6 +84,6 @@ kmcReadPmcEnableReg_GH100 return 0; } - // No need for bIsPmcDeviceEngine, so just call GK104 - return kmcReadPmcEnableReg_GK104(pGpu, pKernelMc, NV_FALSE); + // No need for bIsPmcDeviceEngine, so just call GM107 + return kmcReadPmcEnableReg_GM107(pGpu, pKernelMc, NV_FALSE); } diff --git a/src/nvidia/src/kernel/gpu/mc/arch/maxwell/kernel_mc_gm107.c b/src/nvidia/src/kernel/gpu/mc/arch/maxwell/kernel_mc_gm107.c index 7e11e3f85d..9f0df65946 100644 --- a/src/nvidia/src/kernel/gpu/mc/arch/maxwell/kernel_mc_gm107.c +++ b/src/nvidia/src/kernel/gpu/mc/arch/maxwell/kernel_mc_gm107.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -24,6 +24,7 @@ #include "core/core.h" #include "kernel/gpu/mc/kernel_mc.h" #include "gpu/gpu.h" +#include "os/os.h" #include "published/maxwell/gm107/dev_boot.h" @@ -38,7 +39,7 @@ * @return NV_STATUS */ NV_STATUS -kmcGetMcBar0MapInfo_GK104 +kmcGetMcBar0MapInfo_GM107 ( OBJGPU *pGpu, KernelMc *pKernelMc, @@ -56,7 +57,7 @@ kmcGetMcBar0MapInfo_GK104 // reset. // NV_STATUS -kmcPrepareForXVEReset_GK104 +kmcPrepareForXVEReset_GM107 ( OBJGPU *pGpu, KernelMc *pKernelMc @@ -81,7 +82,7 @@ kmcPrepareForXVEReset_GK104 * @return NV_OK */ NV_STATUS -kmcWritePmcEnableReg_GK104 +kmcWritePmcEnableReg_GM107 ( OBJGPU *pGpu, KernelMc *pKernelMc, @@ -107,12 +108,8 @@ kmcWritePmcEnableReg_GK104 GPU_REG_WR32(pGpu, NV_PMC_ENABLE, newPmc); - // - // Read from NV_PMC_ENABLE to create enough delay for engines reset to complete. - // - GPU_REG_RD32(pGpu, NV_PMC_ENABLE); - GPU_REG_RD32(pGpu, NV_PMC_ENABLE); - GPU_REG_RD32(pGpu, NV_PMC_ENABLE); + // Delay for engines reset to complete. + osDelayUs(NV_PMC_RESET_DELAY_US); return NV_OK; } @@ -130,7 +127,7 @@ kmcWritePmcEnableReg_GK104 * @return NvU32 containing register data */ NvU32 -kmcReadPmcEnableReg_GK104 +kmcReadPmcEnableReg_GM107 ( OBJGPU *pGpu, KernelMc *pKernelMc, diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/arch/ampere/mem_mgr_ga100.c b/src/nvidia/src/kernel/gpu/mem_mgr/arch/ampere/mem_mgr_ga100.c index 7b7ce86cbb..3764922c18 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/arch/ampere/mem_mgr_ga100.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/arch/ampere/mem_mgr_ga100.c @@ -508,9 +508,7 @@ memmgrIsMemDescSupportedByFla_GA100 MEMORY_DESCRIPTOR *pMemDesc ) { - if ((memdescGetAddressSpace(pMemDesc) == ADDR_FBMEM) - || memdescIsEgm(pMemDesc) - ) + if ((memdescGetAddressSpace(pMemDesc) == ADDR_FBMEM) || memdescIsEgm(pMemDesc)) { return NV_TRUE; } diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/fbsr_gm107.c b/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/fbsr_gm107.c index feb4d609c6..45e69613d9 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/fbsr_gm107.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/fbsr_gm107.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2009-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2009-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -106,19 +106,19 @@ static NV_STATUS _fbsrInitGsp OBJFBSR *pFbsr ) { - MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - NvHandle hSysMem = NV01_NULL_OBJECT; - RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); + NvHandle hSysMem = NV01_NULL_OBJECT; + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + MEMORY_DESCRIPTOR *pGspSysMemDesc = pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_HEAP]; NV2080_CTRL_INTERNAL_FBSR_INIT_PARAMS params; + NV_ASSERT_OR_RETURN(pGspSysMemDesc != NULL, NV_ERR_INVALID_STATE); + // Register sysmem memdesc with GSP. This creates memlist object - NV_ASSERT_OK_OR_RETURN(memdescSendMemDescToGSP(pGpu, pFbsr->pSysMemDesc, &hSysMem)); + NV_ASSERT_OK_OR_RETURN(memdescSendMemDescToGSP(pGpu, pGspSysMemDesc, &hSysMem)); - params.fbsrType = pFbsr->type; - params.numRegions = pFbsr->numRegions; params.hClient = pMemoryManager->hClient; params.hSysMem = hSysMem; - params.gspFbAllocsSysOffset = pFbsr->gspFbAllocsSysOffset; params.bEnteringGcoffState = pGpu->getProperty(pGpu, PDB_PROP_GPU_GCOFF_STATE_ENTERING); // Send S/R init information to GSP @@ -132,54 +132,6 @@ static NV_STATUS _fbsrInitGsp // Free memlist object pRmApi->Free(pRmApi, pMemoryManager->hClient, hSysMem); - // - // Clear numRegions for next S/R sequence - // Needed only to tell GSP how many regions - // - pFbsr->numRegions = 0; - - return NV_OK; -} - -static NV_STATUS _fbsrMemoryCopy -( - OBJGPU *pGpu, - OBJFBSR *pFbsr, - MEMORY_DESCRIPTOR *pDstMemDesc, - NvU64 dstOffset, - MEMORY_DESCRIPTOR *pSrcMemDesc, - NvU64 srcOffset, - NvU64 size -) -{ - MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - NvHandle hVidMem = NV01_NULL_OBJECT; - RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); - NV2080_CTRL_INTERNAL_FBSR_SEND_REGION_INFO_PARAMS params; - - // Register vidmem memdesc with GSP. This creates memlist object - NV_ASSERT_OK_OR_RETURN(memdescSendMemDescToGSP(pGpu, pSrcMemDesc, &hVidMem)); - - portMemSet(¶ms, 0, sizeof(params)); - - params.fbsrType = pFbsr->type; - params.hClient = pMemoryManager->hClient; - params.hVidMem = hVidMem; - params.vidOffset = srcOffset; - params.sysOffset = dstOffset; - params.size = size; - - // Send region information to GSP - NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, - pGpu->hInternalClient, - pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_INTERNAL_FBSR_SEND_REGION_INFO, - ¶ms, - sizeof(params))); - - // Free memlist object - pRmApi->Free(pRmApi, pMemoryManager->hClient, hVidMem); - return NV_OK; } @@ -347,34 +299,13 @@ fbsrBegin_GM107(OBJGPU *pGpu, OBJFBSR *pFbsr, FBSR_OP_TYPE op) pFbsr->op = op; pFbsr->bOperationFailed = NV_FALSE; + if (op != FBSR_OP_SIZE_BUF && op != FBSR_OP_DESTROY) { if (IS_GSP_CLIENT(pGpu) || IS_VIRTUAL(pGpu)) { pFbsr->pCe = NULL; - } - - // - // On guest, force re-initialize CeUtils with inst-in-sys. - // See bug 4414361 for details. - // - if (IS_VIRTUAL(pGpu)) - { - NvU32 instLocOverrides = pGpu->instLocOverrides; - NvU32 instLocOverrides4 = pGpu->instLocOverrides4; - - if (pMemoryManager->pCeUtils != NULL) - { - memmgrDestroyCeUtils(pMemoryManager, NV_FALSE); - } - - pGpu->instLocOverrides = FLD_SET_DRF(_REG_STR, _RM_INST_LOC, _USERD, _NCOH, pGpu->instLocOverrides); - pGpu->instLocOverrides4 = FLD_SET_DRF(_REG_STR_RM, _INST_LOC_4, _CHANNEL_PUSHBUFFER, _NCOH, pGpu->instLocOverrides4); - NV_ASSERT_OK_OR_RETURN(memmgrInitCeUtils(pMemoryManager, NV_FALSE)); - - pGpu->instLocOverrides = instLocOverrides; - pGpu->instLocOverrides4 = instLocOverrides4; } NV_PRINTF(LEVEL_INFO, "%s %lld bytes of data\n", @@ -690,9 +621,9 @@ fbsrEnd_GM107(OBJGPU *pGpu, OBJFBSR *pFbsr) if (pFbsr->op != FBSR_OP_SIZE_BUF && pFbsr->op != FBSR_OP_DESTROY) { - if (IS_VIRTUAL(pGpu) && pMemoryManager->pCeUtils != NULL) + if ((IS_VIRTUAL(pGpu) || IS_GSP_CLIENT(pGpu)) && (pMemoryManager->pCeUtils != NULL)) { - memmgrDestroyCeUtils(pMemoryManager, NV_FALSE); + memmgrDestroyCeUtils(pMemoryManager); } } @@ -855,8 +786,6 @@ fbsrCopyMemoryMemDesc_GM107(OBJGPU *pGpu, OBJFBSR *pFbsr, MEMORY_DESCRIPTOR *pVi if (pFbsr->op == FBSR_OP_SIZE_BUF) { - pFbsr->numRegions++; - switch (pFbsr->type) { case FBSR_TYPE_CPU: @@ -951,17 +880,8 @@ fbsrCopyMemoryMemDesc_GM107(OBJGPU *pGpu, OBJFBSR *pFbsr, MEMORY_DESCRIPTOR *pVi } else { - if (IS_GSP_CLIENT(pGpu)) - { - _fbsrMemoryCopy(pGpu, pFbsr, pFbsr->pSysMemDesc, - pFbsr->sysOffset, pVidMemDesc, 0, - pVidMemDesc->Size); - } - else - { - NV_ASSERT_OK(memmgrMemCopy(pMemoryManager, &sysSurface, &vidSurface, pVidMemDesc->Size, + NV_ASSERT_OK(memmgrMemCopy(pMemoryManager, &sysSurface, &vidSurface, pVidMemDesc->Size, TRANSFER_FLAGS_PREFER_CE | TRANSFER_FLAGS_CE_PRI_DEFER_FLUSH)); - } } break; } diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/mem_mgr_gm107.c b/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/mem_mgr_gm107.c index 1e9c90205b..4cfc4fa010 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/mem_mgr_gm107.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/mem_mgr_gm107.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2006-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2006-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/mem_utils_gm107.c b/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/mem_utils_gm107.c index 918c0af440..f6afb99dee 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/mem_utils_gm107.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/mem_utils_gm107.c @@ -227,6 +227,7 @@ _memUtilsChannelAllocatePB_GM107 DRF_DEF(OS32, _ATTR, _COHERENCY, _UNCACHED); flags = NVOS32_ALLOC_FLAGS_PERSISTENT_VIDMEM; + if (!IS_MIG_IN_USE(pGpu)) { attr |= DRF_DEF(OS32, _ATTR, _ALLOCATE_FROM_RESERVED_HEAP, _YES); @@ -383,6 +384,114 @@ _memUtilsChannelAllocatePB_GM107 return rmStatus; } +static NV_STATUS +memmgrMemUtilsMapFbAlias +( + MemoryManager *pMemoryManager, + OBJCHANNEL *pChannel +) +{ + RM_API *pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); + + NV2080_CTRL_GPU_GET_MAX_SUPPORTED_PAGE_SIZE_PARAMS maxPageSizeParams = {0}; + NV_ASSERT_OK_OR_RETURN( + pRmApi->Control(pRmApi, pChannel->hClient, pChannel->subdeviceId, + NV2080_CTRL_CMD_GPU_GET_MAX_SUPPORTED_PAGE_SIZE, + &maxPageSizeParams, sizeof(maxPageSizeParams))); + NV_ASSERT_OR_RETURN(maxPageSizeParams.maxSupportedPageSize != 0, NV_ERR_INVALID_STATE); + + NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS vasCapsParams = {0}; + vasCapsParams.hVASpace = pChannel->hVASpaceId; + NV_ASSERT_OK_OR_RETURN( + pRmApi->Control(pRmApi, pChannel->hClient, pChannel->deviceId, + NV0080_CTRL_CMD_DMA_ADV_SCHED_GET_VA_CAPS, + &vasCapsParams, sizeof(vasCapsParams))); + NV_ASSERT_OR_RETURN(vasCapsParams.supportedPageSizeMask != 0, NV_ERR_INVALID_STATE); + + NvU64 currentFbOffset = 0; + NvU64 remainingMapSize = pChannel->fbSize; + NvU64 currentVaddr = pChannel->vaStartOffset; + + NvU64 pageSizeMask = vasCapsParams.supportedPageSizeMask; + + // Vidmem allocation page size is limited by VMMU segment size + pageSizeMask &= (maxPageSizeParams.maxSupportedPageSize << 1) - 1; + + // Pick only page sizes to which currentVaddr is aligned + NV_ASSERT_OR_RETURN(NV_IS_ALIGNED64(pChannel->startFbOffset, RM_PAGE_SIZE_512M), NV_ERR_INVALID_STATE); + pageSizeMask &= (LOWESTBIT(pChannel->startFbOffset) << 1) - 1; + + NV_ASSERT_OR_RETURN(NV_IS_ALIGNED64(pChannel->vaStartOffset, RM_PAGE_SIZE_512M), NV_ERR_INVALID_STATE); + pageSizeMask &= (LOWESTBIT(pChannel->vaStartOffset) << 1) - 1; + + NV_PRINTF(LEVEL_INFO, "fb start 0x%llx size 0x%llx supported page sizes 0x%llx (0x%llx) va start 0x%llx\n", + pChannel->startFbOffset, pChannel->fbSize, pageSizeMask, + vasCapsParams.supportedPageSizeMask, pChannel->vaStartOffset); + + while ((currentFbOffset < pChannel->fbSize) && (pageSizeMask != 0)) + { + NvU32 pageSizeMap; + + // Biggest page size from the mask + NvU64 pageSize = nvPrevPow2_U64(pageSizeMask); + pageSizeMask &= ~pageSize; + + NV_ASSERT_OR_RETURN(NV_IS_ALIGNED64(currentFbOffset, pageSize), NV_ERR_INVALID_STATE); + NV_ASSERT_OR_RETURN(NV_IS_ALIGNED64(currentVaddr, pageSize), NV_ERR_INVALID_STATE); + + if (pageSize > remainingMapSize) + { + continue; + } + + switch (pageSize) + { + case RM_PAGE_SIZE: + pageSizeMap = NVOS46_FLAGS_PAGE_SIZE_4KB; + break; + case RM_PAGE_SIZE_64K: + case RM_PAGE_SIZE_128K: + NV_ASSERT_OR_RETURN(pageSize == vasCapsParams.bigPageSize, NV_ERR_INVALID_STATE); + pageSizeMap = NVOS46_FLAGS_PAGE_SIZE_BIG; + break; + case RM_PAGE_SIZE_HUGE: + pageSizeMap = NVOS46_FLAGS_PAGE_SIZE_HUGE; + break; + case RM_PAGE_SIZE_512M: + pageSizeMap = NVOS46_FLAGS_PAGE_SIZE_512M; + break; + default: + NV_PRINTF(LEVEL_INFO, "page size not supported: 0x%llx\n", pageSize); + continue; + } + + NvU64 mapSize = NV_ALIGN_DOWN(remainingMapSize, pageSize); + + NV_ASSERT_OK_OR_RETURN( + pRmApi->Map(pRmApi, + pChannel->hClient, + pChannel->deviceId, + pChannel->hFbAliasVA, + pChannel->hFbAlias, + currentFbOffset, + mapSize, + DRF_NUM(OS46, _FLAGS, _PAGE_SIZE, pageSizeMap) | + DRF_DEF(OS46, _FLAGS, _DMA_OFFSET_FIXED, _TRUE), + ¤tVaddr)); + + NV_PRINTF(LEVEL_INFO, + "CeUtils VAS : FB (addr: %llx, size: %llx) identity mapped to VAS at addr: %llx, page size: 0x%llx\n", + currentFbOffset, mapSize, currentVaddr, pageSize); + + remainingMapSize -= mapSize; + currentFbOffset += mapSize; + currentVaddr += mapSize; + } + NV_ASSERT_OR_RETURN(currentFbOffset == pChannel->fbSize, NV_ERR_INVALID_STATE); + pChannel->fbAliasVA = pChannel->vaStartOffset; + return NV_OK; +} + NV_STATUS memmgrMemUtilsChannelInitialize_GM107 ( @@ -412,6 +521,10 @@ memmgrMemUtilsChannelInitialize_GM107 OBJCL *pCl = SYS_GET_CL(pSys); NvU32 cacheSnoopFlag = 0 ; NvBool bUseRmApiForBar1 = NV_FALSE; + NvU32 transferFlags = pChannel->bUseBar1 ? TRANSFER_FLAGS_USE_BAR1 : TRANSFER_FLAGS_NONE; + + // Legacy SLI support is not implemented + NV_ASSERT_OR_RETURN(!IsSLIEnabled(pGpu) , NV_ERR_NOT_SUPPORTED); // // Heap alloc one chunk of memory to hold all of our alloc parameters to @@ -566,7 +679,8 @@ memmgrMemUtilsChannelInitialize_GM107 if (gpuIsSplitVasManagementServerClientRmEnabled(pGpu)) { OBJGVASPACE *pGVAS = dynamicCast(pChannel->pVAS, OBJGVASPACE); - vaStartOffset += pGVAS->vaLimitServerRMOwned + 1; + // Align to 512M in order to use it as page size for identity mapping + vaStartOffset += NV_ALIGN_UP64(pGVAS->vaLimitServerRMOwned + 1, RM_PAGE_SIZE_512M); pChannel->vaStartOffset = vaStartOffset; } @@ -621,24 +735,8 @@ memmgrMemUtilsChannelInitialize_GM107 // set up mapping of VA -> PA if (pChannel->bUseVasForCeCopy) { - NV_CHECK_OK_OR_GOTO( - rmStatus, - LEVEL_ERROR, - pRmApi->Map(pRmApi, - hClient, - pChannel->deviceId, - pChannel->hFbAliasVA, - pChannel->hFbAlias, - 0, - pChannel->fbSize, - DRF_DEF(OS46, _FLAGS, _ACCESS, _READ_WRITE) | - DRF_DEF(OS46, _FLAGS, _PAGE_SIZE, _BIG) | - DRF_DEF(OS46, _FLAGS, _CACHE_SNOOP, _ENABLE), - &pChannel->fbAliasVA), - exit_free_client); - - NV_PRINTF(LEVEL_INFO, "Scrubber VAS :%x identity mapped with start addr: %llx, size: %llx\n", - pChannel->hFbAliasVA, pChannel->fbAliasVA, pChannel->fbSize); + NV_CHECK_OK_OR_GOTO(rmStatus, LEVEL_ERROR, + memmgrMemUtilsMapFbAlias(pMemoryManager, pChannel), exit_free_client); } } @@ -781,12 +879,12 @@ memmgrMemUtilsChannelInitialize_GM107 // Most use cases can migrate to the internal memdescMap path for BAR1 // And it is preferred because external path will not work with CC // - pChannel->pbCpuVA = memmgrMemDescBeginTransfer(pMemoryManager, - pChannel->pChannelBufferMemdesc, TRANSFER_FLAGS_USE_BAR1); + pChannel->pbCpuVA = memmgrMemDescBeginTransfer(pMemoryManager, + pChannel->pChannelBufferMemdesc, transferFlags); NV_ASSERT_OR_GOTO(pChannel->pbCpuVA != NULL, exit_free_client); pErrNotifierCpuVA = memmgrMemDescBeginTransfer(pMemoryManager, - pChannel->pErrNotifierMemdesc, TRANSFER_FLAGS_USE_BAR1); + pChannel->pErrNotifierMemdesc, transferFlags); NV_ASSERT_OR_GOTO(pErrNotifierCpuVA != NULL, exit_free_client); } @@ -978,7 +1076,7 @@ _memUtilsMapUserd_GM107 { pChannel->pControlGPFifo = (void *)memmgrMemDescBeginTransfer(pMemoryManager, pChannel->pUserdMemdesc, - TRANSFER_FLAGS_USE_BAR1); + pChannel->bUseBar1 ? TRANSFER_FLAGS_USE_BAR1 : TRANSFER_FLAGS_NONE); NV_ASSERT_OR_RETURN(pChannel->pControlGPFifo != NULL, NV_ERR_GENERIC); } } @@ -1084,15 +1182,18 @@ _memUtilsAllocateChannel NvU32 hClass; RM_API *pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); NvBool bMIGInUse = IS_MIG_IN_USE(pGpu); + RM_ENGINE_TYPE engineType; NvU32 flags = DRF_DEF(OS04, _FLAGS, _CHANNEL_SKIP_SCRUBBER, _TRUE); - RM_ENGINE_TYPE engineType = (pChannel->type == SWL_SCRUBBER_CHANNEL) ? - RM_ENGINE_TYPE_SEC2 : RM_ENGINE_TYPE_COPY(pChannel->ceId); - if (pChannel->bSecure) + if (pChannel->type == SWL_SCRUBBER_CHANNEL) { + engineType = RM_ENGINE_TYPE_SEC2; flags |= DRF_DEF(OS04, _FLAGS, _CC_SECURE, _TRUE); } - + else + { + engineType = RM_ENGINE_TYPE_COPY(pChannel->ceId); + } portMemSet(&channelGPFIFOAllocParams, 0, sizeof(NV_CHANNEL_ALLOC_PARAMS)); channelGPFIFOAllocParams.hObjectError = hObjectError; channelGPFIFOAllocParams.hObjectBuffer = hObjectBuffer; @@ -1155,10 +1256,14 @@ _memUtilsAllocateChannel pChannel), cleanup); - SLI_LOOP_START(SLI_LOOP_FLAGS_BC_ONLY) - channelGPFIFOAllocParams.hUserdMemory[gpumgrGetSubDeviceInstanceFromGpu(pGpu)] = pChannel->hUserD; - channelGPFIFOAllocParams.userdOffset[gpumgrGetSubDeviceInstanceFromGpu(pGpu)] = 0; - SLI_LOOP_END + channelGPFIFOAllocParams.hUserdMemory[0] = pChannel->hUserD; + channelGPFIFOAllocParams.userdOffset[0] = 0; + } + + if (RMCFG_FEATURE_PLATFORM_GSP) + { + channelGPFIFOAllocParams.internalFlags = DRF_DEF(_KERNELCHANNEL, _ALLOC_INTERNALFLAGS, _PRIVILEGE, _KERNEL) | + DRF_DEF(_KERNELCHANNEL, _ALLOC_INTERNALFLAGS, _GSP_OWNED, _YES); } NV_ASSERT_OK_OR_CAPTURE_FIRST_ERROR( diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/virt_mem_allocator_gm107.c b/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/virt_mem_allocator_gm107.c index 0f158b6cf0..94c26d72f1 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/virt_mem_allocator_gm107.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/virt_mem_allocator_gm107.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2005-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2005-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -148,10 +148,7 @@ // no trace output #define _MMUXLATEVADDR_FLAG_XLATE_ONLY _MMUXLATEVADDR_FLAG_VALIDATE_TERSELY -static NV_STATUS _dmaGetFabricAddress(OBJGPU *pGpu, NvU32 aperture, NvU32 kind, - NvU64 *fabricAddr); -static NV_STATUS _dmaGetFabricEgmAddress(OBJGPU *pGpu, NvU32 aperture, NvU32 kind, - NvU64 *fabricEgmAddr); +static NV_STATUS _dmaGetFabricAddress(OBJGPU *pGpu, NvU32 aperture, NvU32 kind, NvU64 *fabricAddr); static NV_STATUS _dmaApplyWarForBug2720120 @@ -268,7 +265,7 @@ dmaAllocMapping_GM107 MEMORY_DESCRIPTOR *pRootMemDesc; MEMORY_DESCRIPTOR *pTempMemDesc; Memory *pMemory; - NvU32 pageArrayGranularity; + NvU64 pageArrayGranularity; NvU8 pageShift; NvU64 physPageSize; NvU64 pageArrayFlags; @@ -348,6 +345,7 @@ dmaAllocMapping_GM107 // Get physical allocation granularity and page size. pLocals->pageArrayGranularity = pLocals->pTempMemDesc->pageArrayGranularity; pLocals->physPageSize = memdescGetPageSize(pLocals->pTempMemDesc, addressTranslation); + pLocals->bIsMemContiguous = memdescGetContiguity(pLocals->pTempMemDesc, addressTranslation); // retrieve mapping page size from flags switch(DRF_VAL(OS46, _FLAGS, _PAGE_SIZE, flags)) @@ -366,6 +364,9 @@ dmaAllocMapping_GM107 case NVOS46_FLAGS_PAGE_SIZE_HUGE: pLocals->pageSize = RM_PAGE_SIZE_HUGE; break; + case NVOS46_FLAGS_PAGE_SIZE_512M: + pLocals->pageSize = RM_PAGE_SIZE_512M; + break; default: NV_PRINTF(LEVEL_ERROR, "Unknown page size flag encountered during mapping\n"); status = NV_ERR_INVALID_ARGUMENT; @@ -377,10 +378,21 @@ dmaAllocMapping_GM107 if (pLocals->physPageSize < pLocals->pageSize) { - NV_PRINTF(LEVEL_WARNING, "Requested mapping at larger page size than the physical granularity " - "PhysPageSize = 0x%llx MapPageSize = 0x%llx. Overriding to physical page granularity...\n", - pLocals->physPageSize, pLocals->pageSize); - pLocals->pageSize = pLocals->physPageSize; + if (!pLocals->bIsMemContiguous || + !NV_IS_ALIGNED64(memdescGetPhysAddr(pLocals->pTempMemDesc, addressTranslation, 0), pLocals->pageSize) || + !NV_IS_ALIGNED64(pLocals->pTempMemDesc->Size, pLocals->pageSize)) + { + // + // Allow contig allocation to be mapped at page size bigger then physical, + // but only when offset and size are aligned + // + NV_PRINTF(LEVEL_WARNING, "Requested mapping at larger page size than the physical granularity " + "PhysPageSize = 0x%llx MapPageSize = 0x%llx. " + "Overriding to physical page granularity...\n", + pLocals->physPageSize, pLocals->pageSize); + + pLocals->pageSize = pLocals->physPageSize; + } } if (memdescGetFlag(pLocals->pTempMemDesc, MEMDESC_FLAGS_DEVICE_READ_ONLY)) @@ -416,7 +428,6 @@ dmaAllocMapping_GM107 pLocals->pageOffset = memdescGetPhysAddr(pLocals->pTempMemDesc, addressTranslation, 0) & (pLocals->pageSize - 1); pLocals->mapLength = RM_ALIGN_UP(pLocals->pageOffset + pLocals->pTempMemDesc->Size, pLocals->pageSize); pLocals->pageCount = NvU64_LO32(pLocals->mapLength >> pLocals->pageShift); - pLocals->bIsMemContiguous = memdescGetContiguity(pLocals->pTempMemDesc, addressTranslation); pLocals->kind = NV_MMU_PTE_KIND_PITCH; @@ -1047,6 +1058,15 @@ dmaAllocMapping_GM107 SLI_LOOP_BREAK; } + if ((gpuIsSriovEnabled(pGpu) || IS_VIRTUAL_WITH_SRIOV(pGpu)) && + (pLocals->aperture == NV_MMU_PTE_APERTURE_VIDEO_MEMORY) && + (pLocals->pageSize > gpuGetVmmuSegmentSize(pGpu))) + { + NV_CHECK_FAILED(LEVEL_ERROR, "Vidmem page size is limited by VMMU segment size when GPU is in SRIOV mode"); + status = NV_ERR_INVALID_ARGUMENT; + SLI_LOOP_BREAK; + } + // // Fabric memory descriptors are pre-encoded with the fabric base address // use NVLINK_INVALID_FABRIC_ADDR to avoid encoding twice @@ -1063,18 +1083,7 @@ dmaAllocMapping_GM107 } else { - // Get EGM fabric address for Remote EGM - if (memdescIsEgm(pLocals->pTempMemDesc)) - { - status = _dmaGetFabricEgmAddress(pLocals->pSrcGpu, pLocals->aperture, - pLocals->kind, &pLocals->fabricAddr); - } - else - { - status = _dmaGetFabricAddress(pLocals->pSrcGpu, pLocals->aperture, - pLocals->kind, &pLocals->fabricAddr); - } - + status = _dmaGetFabricAddress(pLocals->pSrcGpu, pLocals->aperture, pLocals->kind, &pLocals->fabricAddr); if (status != NV_OK) { DBG_BREAKPOINT(); @@ -1680,7 +1689,7 @@ static NV_STATUS _dmaGetFabricAddress // Fabric address should be available for NVSwitch connected GPUs, // otherwise it is a NOP. // - *fabricAddr = knvlinkGetUniqueFabricBaseAddress(pGpu, pKernelNvlink); + *fabricAddr = knvlinkGetUniqueFabricBaseAddress(pGpu, pKernelNvlink); if (*fabricAddr == NVLINK_INVALID_FABRIC_ADDR) { return NV_OK; @@ -1696,49 +1705,6 @@ static NV_STATUS _dmaGetFabricAddress return NV_OK; } -static NV_STATUS _dmaGetFabricEgmAddress -( - OBJGPU *pGpu, - NvU32 aperture, - NvU32 kind, - NvU64 *fabricEgmAddr -) -{ - MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); - - *fabricEgmAddr = NVLINK_INVALID_FABRIC_ADDR; - - if (pKernelNvlink == NULL) - { - return NV_OK; - } - - if (aperture != NV_MMU_PTE_APERTURE_PEER_MEMORY) - { - return NV_OK; - } - - // - // Fabric address should be available for NVSwitch connected GPUs, - // otherwise it is a NOP. - // - *fabricEgmAddr = knvlinkGetUniqueFabricEgmBaseAddress(pGpu, pKernelNvlink); - if (*fabricEgmAddr == NVLINK_INVALID_FABRIC_ADDR) - { - return NV_OK; - } - - if (memmgrIsKind_HAL(pMemoryManager, FB_IS_KIND_COMPRESSIBLE, kind)) - { - NV_PRINTF(LEVEL_ERROR, - "Nvswitch systems don't support compression.\n"); - return NV_ERR_NOT_SUPPORTED; - } - - return NV_OK; -} - // VMM-TODO: PL(N) mmuPageLevelUpdate - but major splits NV_STATUS dmaUpdateVASpace_GF100 @@ -2164,7 +2130,10 @@ dmaUpdateVASpace_GF100 NV_ASSERT_OR_RETURN(NULL != pMemBlock, NV_ERR_INVALID_ARGUMENT); pVASBlock = pMemBlock->pData; - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, pVASBlock, &userCtx); + NV_ASSERT_OK_OR_GOTO(status, + gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, pVASBlock, &userCtx), + done); + status = mmuWalkMap(userCtx.pGpuState->pWalk, vaLo, vaHi, &mapTarget); NV_ASSERT(NV_OK == status); gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); @@ -2176,10 +2145,11 @@ dmaUpdateVASpace_GF100 mapFlags.bRemap = readPte || (flags & DMA_UPDATE_VASPACE_FLAGS_ALLOW_REMAP); status = gvaspaceMap(pGVAS, pGpu, vaLo, vaHi, &mapTarget, mapFlags); - NV_ASSERT(NV_OK == status); + NV_CHECK(LEVEL_ERROR, NV_OK == status); } } +done: // Invalidate VAS TLB entries. if ((NULL == pTgtPteMem) && DMA_TLB_INVALIDATE == deferInvalidate) { @@ -2600,6 +2570,8 @@ _dmaApplyWarForBug2720120 MMU_MAP_TARGET mapTarget = {0}; MMU_MAP_ITERATOR mapIter = {0}; + NV_ASSERT_OK_OR_RETURN(kgmmuSetupWarForBug2720120_HAL(pKernelGmmu)); + // MMU_MAP_CTX mapTarget.pLevelFmt = mmuFmtFindLevelWithPageShift(pFmt->pRoot, 29); mapTarget.pIter = &mapIter; @@ -2618,7 +2590,7 @@ _dmaApplyWarForBug2720120 NV_ASSERT_OR_RETURN(pMemBlock != NULL, NV_ERR_INVALID_ARGUMENT); pVASBlock = pMemBlock->pData; - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, pVASBlock, &userCtx); + NV_ASSERT_OK_OR_RETURN(gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, pVASBlock, &userCtx)); NV_ASSERT_OK_OR_RETURN(mmuWalkMap(userCtx.pGpuState->pWalk, vaLo, vaHi, &mapTarget)); gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/arch/volta/mem_mgr_gv100.c b/src/nvidia/src/kernel/gpu/mem_mgr/arch/volta/mem_mgr_gv100.c index 3041a6f37c..a6d7a6c972 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/arch/volta/mem_mgr_gv100.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/arch/volta/mem_mgr_gv100.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -24,6 +24,7 @@ #include "core/core.h" #include "gpu/gpu.h" #include "gpu/mem_mgr/mem_mgr.h" +#include "mem_mgr/ctx_buf_pool.h" #include "published/volta/gv100/dev_mmu.h" @@ -116,8 +117,7 @@ memmgrGetMaxContextSize_GV100 } else { - if (memmgrIsPmaEnabled(pMemoryManager) && - memmgrIsPmaSupportedOnPlatform(pMemoryManager)) + if (!ctxBufPoolIsSupported(pGpu)) { // // Increase the context size by 120 MB. diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/ce_utils.c b/src/nvidia/src/kernel/gpu/mem_mgr/ce_utils.c index 44936a6aa0..8f2b279dd6 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/ce_utils.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/ce_utils.c @@ -108,7 +108,6 @@ ceutilsConstruct_IMPL NvBool bMIGInUse = IS_MIG_IN_USE(pGpu); MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - pCeUtils->pGpu = pGpu; if (FLD_TEST_DRF(0050_CEUTILS, _FLAGS, _FIFO_LITE, _TRUE, allocFlags)) @@ -168,7 +167,8 @@ ceutilsConstruct_IMPL pChannel->hVASpaceId = NV01_NULL_OBJECT; pChannel->bUseVasForCeCopy = FLD_TEST_DRF(0050_CEUTILS, _FLAGS, _VIRTUAL_MODE, _TRUE, allocFlags); - pChannel->bSecure = FLD_TEST_DRF(0050_CEUTILS, _FLAGS, _CC_SECURE, _TRUE, allocFlags); + // Variable to indicate usage of either BAR1 or BAR2 + pChannel->bUseBar1 = FLD_TEST_DRF(0050_CEUTILS, _FLAGS, _NO_BAR1_USE, _FALSE, allocFlags); // Detect if we can enable fast scrub on this channel status = memmgrMemUtilsGetCopyEngineClass_HAL(pGpu, pMemoryManager, &pCeUtils->hTdCopyClass); @@ -256,6 +256,7 @@ ceutilsDestruct_IMPL OBJGPU *pGpu = pCeUtils->pGpu; MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); RM_API *pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); + NvU32 transferFlags = pChannel->bUseBar1 ? TRANSFER_FLAGS_USE_BAR1 : TRANSFER_FLAGS_NONE; if ((pChannel->bClientUserd) && (pChannel->pControlGPFifo != NULL)) { @@ -269,7 +270,7 @@ ceutilsDestruct_IMPL } else { - memmgrMemDescEndTransfer(pMemoryManager, pChannel->pUserdMemdesc, TRANSFER_FLAGS_USE_BAR1); + memmgrMemDescEndTransfer(pMemoryManager, pChannel->pUserdMemdesc, transferFlags); pChannel->pControlGPFifo = NULL; } } @@ -282,7 +283,7 @@ ceutilsDestruct_IMPL } else { - memmgrMemDescEndTransfer(pMemoryManager, pChannel->pChannelBufferMemdesc, TRANSFER_FLAGS_USE_BAR1); + memmgrMemDescEndTransfer(pMemoryManager, pChannel->pChannelBufferMemdesc, transferFlags); pChannel->pbCpuVA = NULL; } } @@ -295,7 +296,7 @@ ceutilsDestruct_IMPL } else { - memmgrMemDescEndTransfer(pMemoryManager, pChannel->pErrNotifierMemdesc, TRANSFER_FLAGS_USE_BAR1); + memmgrMemDescEndTransfer(pMemoryManager, pChannel->pErrNotifierMemdesc, transferFlags); pChannel->pTokenFromNotifier = NULL; } } @@ -388,9 +389,9 @@ _ceutilsSubmitPushBuffer // Use BAR1 if CPU access is allowed, otherwise allocate and init shadow // buffer for DMA access // - NvU32 transferFlags = (TRANSFER_FLAGS_USE_BAR1 | + NvU32 transferFlags = (pChannel->bUseBar1 ? TRANSFER_FLAGS_USE_BAR1 : TRANSFER_FLAGS_NONE) | TRANSFER_FLAGS_SHADOW_ALLOC | - TRANSFER_FLAGS_SHADOW_INIT_MEM); + TRANSFER_FLAGS_SHADOW_INIT_MEM; NV_PRINTF(LEVEL_INFO, "Actual size of copying to be pushed: %x\n", pChannelPbInfo->size); status = channelWaitForFreeEntry(pChannel, &putIndex); @@ -620,11 +621,6 @@ ceutilsMemcopy_IMPL channelPbInfo.srcCpuCacheAttrib = pSrcMemDesc->_cpuCacheAttrib; channelPbInfo.dstCpuCacheAttrib = pDstMemDesc->_cpuCacheAttrib; - channelPbInfo.bSecureCopy = pParams->bSecureCopy; - channelPbInfo.bEncrypt = pParams->bEncrypt; - channelPbInfo.authTagAddr = pParams->authTagAddr; - channelPbInfo.encryptIvAddr = pParams->encryptIvAddr; - srcPageGranularity = pSrcMemDesc->pageArrayGranularity; dstPageGranularity = pDstMemDesc->pageArrayGranularity; bSrcContig = memdescGetContiguity(pSrcMemDesc, AT_GPU); diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/channel_utils.c b/src/nvidia/src/kernel/gpu/mem_mgr/channel_utils.c index 1b3e83efdc..2418a6e848 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/channel_utils.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/channel_utils.c @@ -44,7 +44,7 @@ static NvU32 channelPushMemoryProperties(OBJCHANNEL *pChannel, CHANNEL_PB_INFO *pChannelPbInfo, NvU32 **ppPtr); static void channelPushMethod(OBJCHANNEL *pChannel, CHANNEL_PB_INFO *pChannelPbInfo, NvBool bPipelined, NvBool bInsertFinishPayload, - NvU32 launchType, NvU32 semaValue, NvU32 copyType, NvU32 **ppPtr); + NvU32 launchType, NvU32 semaValue, NvU32 **ppPtr); /* Public APIs */ NV_STATUS @@ -269,9 +269,9 @@ channelReadChannelMemdesc // Use BAR1 if CPU access is allowed, otherwise allocate and init shadow // buffer for DMA access // - NvU32 transferFlags = (TRANSFER_FLAGS_USE_BAR1 | + NvU32 transferFlags = (pChannel->bUseBar1 ? TRANSFER_FLAGS_USE_BAR1 : TRANSFER_FLAGS_NONE) | TRANSFER_FLAGS_SHADOW_ALLOC | - TRANSFER_FLAGS_SHADOW_INIT_MEM); + TRANSFER_FLAGS_SHADOW_INIT_MEM; if (pChannel->pbCpuVA == NULL) { @@ -471,9 +471,9 @@ channelFillGpFifo // Use BAR1 if CPU access is allowed, otherwise allocate and init shadow // buffer for DMA access // - NvU32 transferFlags = (TRANSFER_FLAGS_USE_BAR1 | + NvU32 transferFlags = (pChannel->bUseBar1 ? TRANSFER_FLAGS_USE_BAR1 : TRANSFER_FLAGS_NONE) | TRANSFER_FLAGS_SHADOW_ALLOC | - TRANSFER_FLAGS_SHADOW_INIT_MEM); + TRANSFER_FLAGS_SHADOW_INIT_MEM; NV_ASSERT_OR_RETURN(putIndex < pChannel->channelNumGpFifioEntries, NV_ERR_INVALID_STATE); @@ -529,7 +529,7 @@ channelFillGpFifo } osFlushCpuWriteCombineBuffer(); - + // // On some architectures, if doorbell is mapped via bar0, we need to send // an extra flush @@ -727,53 +727,6 @@ channelAddHostSema *ppPtr = pPtr; } -static NvU32 -channelPushSecureCopyProperties -( - OBJCHANNEL *pChannel, - CHANNEL_PB_INFO *pChannelPbInfo, - NvU32 *pCopyType, - NvU32 **ppPtr -) -{ - NvU32 *pPtr = *ppPtr; - - if (!pChannelPbInfo->bSecureCopy) - { - *pCopyType = FLD_SET_DRF(C8B5, _LAUNCH_DMA, _COPY_TYPE, _DEFAULT, *pCopyType); - return NV_OK; - } - - NV_ASSERT_OR_RETURN(gpuIsCCFeatureEnabled(pChannel->pGpu), NV_ERR_NOT_SUPPORTED); - NV_ASSERT_OR_RETURN(pChannel->bSecure, NV_ERR_NOT_SUPPORTED); - NV_ASSERT_OR_RETURN(pChannel->hTdCopyClass >= HOPPER_DMA_COPY_A, NV_ERR_NOT_SUPPORTED); - - if (pChannelPbInfo->bEncrypt) - { - NV_PUSH_INC_1U(RM_SUBCHANNEL, - NVC8B5_SET_SECURE_COPY_MODE, DRF_DEF(C8B5, _SET_SECURE_COPY_MODE, _MODE, _ENCRYPT)); - - NV_PUSH_INC_4U(RM_SUBCHANNEL, - NVC8B5_SET_ENCRYPT_AUTH_TAG_ADDR_UPPER, NvU64_HI32(pChannelPbInfo->authTagAddr), - NVC8B5_SET_ENCRYPT_AUTH_TAG_ADDR_LOWER, NvU64_LO32(pChannelPbInfo->authTagAddr), - NVC8B5_SET_ENCRYPT_IV_ADDR_UPPER, NvU64_HI32(pChannelPbInfo->encryptIvAddr), - NVC8B5_SET_ENCRYPT_IV_ADDR_LOWER, NvU64_LO32(pChannelPbInfo->encryptIvAddr)); - } - else - { - NV_PUSH_INC_1U(RM_SUBCHANNEL, - NVC8B5_SET_SECURE_COPY_MODE, DRF_DEF(C8B5, _SET_SECURE_COPY_MODE, _MODE, _DECRYPT)); - - NV_PUSH_INC_2U(RM_SUBCHANNEL, - NVC8B5_SET_DECRYPT_AUTH_TAG_COMPARE_ADDR_UPPER, NvU64_HI32(pChannelPbInfo->authTagAddr), - NVC8B5_SET_DECRYPT_AUTH_TAG_COMPARE_ADDR_LOWER, NvU64_LO32(pChannelPbInfo->authTagAddr)); - } - - *ppPtr = pPtr; - *pCopyType = FLD_SET_DRF(C8B5, _LAUNCH_DMA, _COPY_TYPE, _SECURE, *pCopyType); - return NV_OK; -} - /** single helper function to fill the push buffer with the methods needed for * memsetting using CE. This function is much more efficient in the sense it * decouples the mem(set/copy) operation from managing channel resources. @@ -789,7 +742,6 @@ channelFillCePb CHANNEL_PB_INFO *pChannelPbInfo ) { - NvU32 copyType = 0; NvU32 launchType = 0; NvU32 *pPtr = (NvU32 *)((NvU8 *)pChannel->pbCpuVA + (putIndex * pChannel->methodSizePerBlock)); NvU32 *pStartPtr = pPtr; @@ -799,9 +751,6 @@ channelFillCePb NV_PUSH_INC_1U(RM_SUBCHANNEL, NV906F_SET_OBJECT, pChannel->classEngineID); - if (channelPushSecureCopyProperties(pChannel, pChannelPbInfo, ©Type, &pPtr) != NV_OK) - return 0; - // Side effect - pushed target addresses, aperture and REMAP method for memset launchType = channelPushMemoryProperties(pChannel, pChannelPbInfo, &pPtr); @@ -821,10 +770,7 @@ channelFillCePb } // Side effect - pushed LAUNCH_DMA methods - channelPushMethod(pChannel, pChannelPbInfo, bPipelined, bInsertFinishPayload, - launchType, semaValue, - copyType, - &pPtr); + channelPushMethod(pChannel, pChannelPbInfo, bPipelined, bInsertFinishPayload, launchType, semaValue, &pPtr); channelAddHostSema(pChannel, putIndex, &pPtr); @@ -1088,7 +1034,6 @@ channelPushMethod NvBool bInsertFinishPayload, NvU32 launchType, NvU32 semaValue, - NvU32 copyType, NvU32 **ppPtr ) { @@ -1142,7 +1087,6 @@ channelPushMethod launchType | pipelinedValue | flushValue | - semaValue | - copyType); + semaValue); *ppPtr = pPtr; } diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/context_dma.c b/src/nvidia/src/kernel/gpu/mem_mgr/context_dma.c index 89c86d88a8..856551f8b3 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/context_dma.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/context_dma.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -88,7 +88,9 @@ _ctxdmaDestroyFBMappings if(pGpu->getProperty(pGpu, PDB_PROP_GPU_COHERENT_CPU_MAPPING)) { - kbusUnmapCoherentCpuMapping_HAL(pGpu, pKernelBus, pContextDma->pMemDesc); + kbusUnmapCoherentCpuMapping_HAL(pGpu, pKernelBus, pContextDma->pMemDesc, + pContextDma->KernelVAddr[gpuSubDevInst], + pContextDma->KernelPriv); } else { @@ -599,17 +601,23 @@ _ctxdmaConstruct } else if (pGpu->getProperty(pGpu, PDB_PROP_GPU_COHERENT_CPU_MAPPING)) { - NvP64 pMap = kbusMapCoherentCpuMapping_HAL(pGpu, pKernelBus, pMemDesc); - if (pMap == NULL) + // + // Don't add the offset again, as the base address of pContextDma->pMemDesc + // already has the offset applied. + // + rmStatus = kbusMapCoherentCpuMapping_HAL(pGpu, + pKernelBus, + pContextDma->pMemDesc, + 0, // Offset already applied. + pContextDma->Limit + 1, + NV_PROTECT_READ_WRITE, + &pContextDma->KernelVAddr[gpuSubDevInst], + &pContextDma->KernelPriv); + + if (rmStatus != NV_OK) { - rmStatus = NV_ERR_GENERIC; + SLI_LOOP_GOTO(done); } - else - { - rmStatus = NV_OK; - pMap = NvP64_PLUS_OFFSET(pMap, offset); - } - pContextDma->KernelVAddr[gpuSubDevInst] = pMap; } else { @@ -618,26 +626,27 @@ _ctxdmaConstruct &pContextDma->FbAperture[gpuSubDevInst], &pContextDma->FbApertureLen[gpuSubDevInst], BUS_MAP_FB_FLAGS_MAP_UNICAST, pDevice); - } - if (rmStatus != NV_OK) - { - pContextDma->FbApertureLen[gpuSubDevInst] = 0; - SLI_LOOP_GOTO(done); - } - memdescSetPageSize(pContextDma->pMemDesc, AT_GPU, - memdescGetPageSize(pMemDesc, AT_GPU)); + if (rmStatus != NV_OK) + { + pContextDma->FbApertureLen[gpuSubDevInst] = 0; + SLI_LOOP_GOTO(done); + } - rmStatus = osMapPciMemoryKernelOld(pGpu, - gpumgrGetGpuPhysFbAddr(pGpu) + pContextDma->FbAperture[gpuSubDevInst], - pContextDma->Limit+1, - NV_PROTECT_READ_WRITE, - &pContextDma->KernelVAddr[gpuSubDevInst], - NV_MEMORY_WRITECOMBINED); - if (rmStatus != NV_OK) - { - // Force out of the SLI loop - SLI_LOOP_BREAK; + memdescSetPageSize(pContextDma->pMemDesc, AT_GPU, + memdescGetPageSize(pMemDesc, AT_GPU)); + + rmStatus = osMapPciMemoryKernelOld(pGpu, + gpumgrGetGpuPhysFbAddr(pGpu) + pContextDma->FbAperture[gpuSubDevInst], + pContextDma->Limit+1, + NV_PROTECT_READ_WRITE, + &pContextDma->KernelVAddr[gpuSubDevInst], + NV_MEMORY_WRITECOMBINED); + if (rmStatus != NV_OK) + { + // Force out of the SLI loop + SLI_LOOP_BREAK; + } } { diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/dma.c b/src/nvidia/src/kernel/gpu/mem_mgr/dma.c index 1496f37623..457b1a3f64 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/dma.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/dma.c @@ -1194,9 +1194,7 @@ dmaPageArrayGetPhysAddr if (pPageArray->bOsFormat) { - OBJSYS *pSys = SYS_GET_INSTANCE(); - OBJOS *pOS = SYS_GET_OS(pSys); - addr = pOS->osPageArrayGetPhysAddr(pPageArray->pOsGpuInfo, + addr = osPageArrayGetPhysAddr(pPageArray->pOsGpuInfo, pPageArray->pData, pPageArray->startIndex + pageIndex); } else @@ -1207,7 +1205,5 @@ dmaPageArrayGetPhysAddr } } - addr |= pPageArray->orMask; - return addr; } diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/fbsr.c b/src/nvidia/src/kernel/gpu/mem_mgr/fbsr.c index 57655a9587..84782a2e58 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/fbsr.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/fbsr.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2009-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2009-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -41,7 +41,6 @@ fbsrObjectInit_IMPL(OBJFBSR *pFbsr, NvU32 type) pFbsr->bInitialized = NV_FALSE; pFbsr->pRegionRecords = NULL; pFbsr->numRegions = 0; - pFbsr->regionRecordIndex = 0; return NV_OK; } diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/heap.c b/src/nvidia/src/kernel/gpu/mem_mgr/heap.c index a5b4fe4499..7c68f96d7e 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/heap.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/heap.c @@ -539,7 +539,6 @@ NV_STATUS heapInitInternal_IMPL // if ((pMemoryManager->Ram.numFBRegions > 0) && (pHeap->bHasFbRegions)) { - NvBool bConsoleFbRegionContentPreserved; FB_REGION_DESCRIPTOR consoleFbRegion; portMemSet(&consoleFbRegion, 0, sizeof(consoleFbRegion)); @@ -571,8 +570,6 @@ NV_STATUS heapInitInternal_IMPL memmgrRegionSetupForPma(pGpu, pMemoryManager); } - bConsoleFbRegionContentPreserved = NV_FALSE; - if (heapType != HEAP_TYPE_PARTITION_LOCAL) { // For GSP RM, all PMA candidate regions are given to CPU RM for its use @@ -628,23 +625,17 @@ NV_STATUS heapInitInternal_IMPL return status; } - if ((pMemoryManager->Ram.ReservedConsoleDispMemSize > 0) && - (pFbRegion->base == consoleFbRegion.base) && (pFbRegion->limit == consoleFbRegion.limit)) + if (pFbRegion->bLostOnSuspend) { - memdescSetFlag(pMemDesc, MEMDESC_FLAGS_LOST_ON_SUSPEND, NV_FALSE); - memdescSetFlag(pMemDesc, MEMDESC_FLAGS_PRESERVE_CONTENT_ON_SUSPEND, NV_TRUE); + memdescSetFlag(pMemDesc, MEMDESC_FLAGS_LOST_ON_SUSPEND, NV_TRUE); + } - bConsoleFbRegionContentPreserved = NV_TRUE; + if (pFbRegion->bPreserveOnSuspend) + { + memdescSetFlag(pMemDesc, MEMDESC_FLAGS_PRESERVE_CONTENT_ON_SUSPEND, NV_TRUE); } } } - - if ((pMemoryManager->Ram.ReservedConsoleDispMemSize > 0) && - !bConsoleFbRegionContentPreserved) - { - NV_PRINTF(LEVEL_ERROR, - "failed to preserve content of console display memory\n"); - } } #ifdef DEBUG @@ -1942,7 +1933,6 @@ static NV_STATUS _heapBlockFree { MEM_BLOCK *pBlockTmp; NvU32 i; - OBJOS *pOS = GPU_GET_OS(pGpu); MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); NvBool bBlocksMerged = NV_FALSE; @@ -2011,7 +2001,7 @@ static NV_STATUS _heapBlockFree if (FLD_TEST_DRF(OS32, _ATTR2, _INTERNAL, _YES, pFbAllocInfo->pageFormat->attr2)) { - pOS->osInternalReserveFreeCallback(pFbAllocInfo->offset, pGpu->gpuId); + osInternalReserveFreeCallback(pFbAllocInfo->offset, pGpu->gpuId); } // Clear the HW resource associations since this block can be reused or merged. @@ -3336,7 +3326,6 @@ _heapProcessFreeBlock { NV_MEMORY_ALLOCATION_PARAMS *pVidHeapAlloc = pAllocRequest->pUserParams; MEM_BLOCK *pBlockNew = NULL, *pBlockSplit = NULL; - OBJOS *pOS = GPU_GET_OS(pGpu); NV_STATUS status = NV_OK; if ((pAllocData->allocLo == pBlockFree->begin) && @@ -3627,7 +3616,7 @@ _heapProcessFreeBlock if (FLD_TEST_DRF(OS32, _ATTR2, _INTERNAL, _YES, pFbAllocInfo->pageFormat->attr2)) { - pOS->osInternalReserveAllocCallback(*offset, pFbAllocInfo->size, pGpu->gpuId); + osInternalReserveAllocCallback(*offset, pFbAllocInfo->size, pGpu->gpuId); } return NV_OK; diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/mem_desc.c b/src/nvidia/src/kernel/gpu/mem_mgr/mem_desc.c index 22ee0a8f18..7c15a1ab85 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/mem_desc.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/mem_desc.c @@ -39,6 +39,7 @@ #include "core/system.h" #include "vgpu/vgpu_util.h" #include "platform/sli/sli.h" +#include "resserv/rs_client.h" #include "gpu/mem_mgr/virt_mem_allocator.h" @@ -58,7 +59,6 @@ #include "nvrm_registry.h" // For memdescOverrideInstLoc*() -#include "deprecated/rmapi_deprecated.h" #include "rmapi/rmapi.h" #include "rmapi/rs_utils.h" #include "class/cl0071.h" // NV01_MEMORY_SYSTEM_OS_DESCRIPTOR @@ -805,6 +805,7 @@ _memdescAllocInternal { goto done; } + if (memdescIsEgm(pMemDesc)) { NV_ASSERT_OK_OR_GOTO(status, @@ -1621,8 +1622,8 @@ memdescFree } if (pMemDesc->_addressSpace != ADDR_FBMEM && - pMemDesc->_addressSpace != ADDR_EGM && - pMemDesc->_addressSpace != ADDR_SYSMEM) + pMemDesc->_addressSpace != ADDR_SYSMEM && + pMemDesc->_addressSpace != ADDR_EGM) { return; } @@ -1895,21 +1896,16 @@ memdescMap if (bCoherentCpuMapping) { - NV_ASSERT(pMemDesc->_flags & MEMDESC_FLAGS_PHYSICALLY_CONTIGUOUS); - if (Kernel) { - NvP64 tempCpuPtr = kbusMapCoherentCpuMapping_HAL(pGpu, pKernelBus, pMemDesc); - if (tempCpuPtr == NULL) - { - status = NV_ERR_GENERIC; - } - else - { - status = NV_OK; - tempCpuPtr = NvP64_PLUS_OFFSET(tempCpuPtr, Offset); - } - *pAddress = tempCpuPtr; + status = kbusMapCoherentCpuMapping_HAL(pGpu, + pKernelBus, + pMemDesc, + Offset, + Size, + Protect, + pAddress, + &pMapping->pPriv); } else { @@ -2070,7 +2066,7 @@ memdescUnmap { if (Kernel) { - kbusUnmapCoherentCpuMapping_HAL(pGpu, pKernelBus, pMemDesc); + kbusUnmapCoherentCpuMapping_HAL(pGpu, pKernelBus, pMemDesc, Address, pMapping->pPriv); } else { @@ -2251,13 +2247,20 @@ memdescMapInternal case MEMDESC_MAP_INTERNAL_TYPE_COHERENT_FBMEM: { NV_ASSERT(pGpu->getProperty(pGpu, PDB_PROP_GPU_ATS_SUPPORTED)); - pMemDesc->_pInternalMapping = kbusMapCoherentCpuMapping_HAL(pGpu, GPU_GET_KERNEL_BUS(pGpu), pMemDesc); - NV_CHECK_OR_RETURN(LEVEL_ERROR, pMemDesc->_pInternalMapping != NULL, NULL); + status = kbusMapCoherentCpuMapping_HAL(pGpu, + GPU_GET_KERNEL_BUS(pGpu), + pMemDesc, + 0, + memdescGetSize(pMemDesc), + NV_PROTECT_READ_WRITE, + &pMemDesc->_pInternalMapping, + &pMemDesc->_pInternalMappingPriv); + NV_CHECK_OR_RETURN(LEVEL_ERROR, status == NV_OK, NULL); break; } case MEMDESC_MAP_INTERNAL_TYPE_BAR2: pMemDesc->_pInternalMapping = kbusMapBar2Aperture_HAL(pGpu, GPU_GET_KERNEL_BUS(pGpu), pMemDesc, flags); - NV_CHECK_OR_RETURN(LEVEL_ERROR, pMemDesc->_pInternalMapping != NULL, NULL); + NV_CHECK_OR_RETURN(LEVEL_INFO, pMemDesc->_pInternalMapping != NULL, NULL); break; default: @@ -2305,7 +2308,8 @@ void memdescUnmapInternal case MEMDESC_MAP_INTERNAL_TYPE_COHERENT_FBMEM: { - kbusUnmapCoherentCpuMapping_HAL(pGpu, GPU_GET_KERNEL_BUS(pGpu), pMemDesc); + kbusUnmapCoherentCpuMapping_HAL(pGpu, GPU_GET_KERNEL_BUS(pGpu), pMemDesc, + pMemDesc->_pInternalMapping, pMemDesc->_pInternalMappingPriv); break; } case MEMDESC_MAP_INTERNAL_TYPE_BAR2: @@ -2715,6 +2719,7 @@ memdescCreateSubMem RmPhysAddr Base = pMemDesc->_pteArray[0] + pMemDesc->PteAdjust + Offset; pMemDescNew->_pteArray[0] = Base & ~pageArrayGranularityMask; pMemDescNew->PteAdjust = NvU64_LO32(Base) & pageArrayGranularityMask; + if (memdescIsEgm(pMemDesc)) { NV_ASSERT_OK_OR_GOTO(status, @@ -2762,6 +2767,7 @@ memdescCreateSubMem pMemDescNew->_pteArray[i] = pMemDescNew->_pteArray[i - 1] + pMemDescNew->pageArrayGranularity; } } + if (memdescIsEgm(pMemDesc)) { NV_ASSERT_OK_OR_GOTO(status, @@ -3221,13 +3227,12 @@ memdescGetPteArrayForGpu { return pMemDesc->pPteEgmMappings; } + + PIOVAMAPPING pIovaMap = memdescGetIommuMap(pMemDesc, + pGpu->busInfo.iovaspaceId); + if (pIovaMap != NULL) { - PIOVAMAPPING pIovaMap = memdescGetIommuMap(pMemDesc, - pGpu->busInfo.iovaspaceId); - if (pIovaMap != NULL) - { - return pIovaMap->iovaArray; - } + return pIovaMap->iovaArray; } } @@ -4559,7 +4564,14 @@ NV_STATUS memdescGetNvLinkGpa // For each page, do the GPU PA to GPA conversion for (pageIndex = 0; pageIndex < pageCount; pageIndex++) { - pGpa[pageIndex] += pKernelMemorySystem->coherentCpuFbBase; + RmPhysAddr gpa; + gpa = pGpa[pageIndex] + pKernelMemorySystem->coherentCpuFbBase; + + NV_ASSERT_OR_RETURN((gpa >= pKernelMemorySystem->coherentCpuFbBase) && + (gpa <= pKernelMemorySystem->coherentCpuFbEnd), + NV_ERR_INVALID_ARGUMENT); + + pGpa[pageIndex] = gpa; } return NV_OK; @@ -4674,154 +4686,6 @@ memdescOverridePhysicalAddressWidthWindowsWAR } } -/*! -* @brief Register MEMDESC to GSP -* Life of the registration: until memdescDeregisterFromGSP is called, -* always occurs when the memory is freed. -* Have argument as pMemory*; Move to NVOC -* -* @param[in] pGpu -* @param[in] hClient NvHandle -* @param[in] hDevice NvHandle -* @param[in] hMemory NvHandle -* -* @returns NV_STATUS -*/ -NV_STATUS -memdescRegisterToGSP -( - OBJGPU *pGpu, - NvHandle hClient, - NvHandle hParent, - NvHandle hMemory -) -{ - NV_STATUS status = NV_OK; - Memory *pMemory = NULL; - RsResourceRef *pMemoryRef = NULL; - MEMORY_DESCRIPTOR *pMemDesc = NULL; - NvU32 hClass; - - // Nothing to do without GSP - if (!IS_GSP_CLIENT(pGpu)) - { - return NV_OK; - } - - NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, serverutilGetResourceRef(hClient, hMemory, &pMemoryRef)); - - pMemory = dynamicCast(pMemoryRef->pResource, Memory); - NV_CHECK_OR_RETURN(LEVEL_ERROR, pMemory != NULL, NV_ERR_INVALID_OBJECT); - - pMemDesc = pMemory->pMemDesc; - - // Check: memory already registered - if ((pMemDesc->_flags & MEMDESC_FLAGS_REGISTERED_TO_GSP) != 0) - { - return NV_OK; - } - - // Check: no subdevice memDescs - NV_CHECK_OR_RETURN(LEVEL_ERROR, - !memdescHasSubDeviceMemDescs(pMemDesc), - NV_ERR_INVALID_STATE); - - // Check: SYSMEM or FBMEM only - if (memdescGetAddressSpace(pMemDesc) == ADDR_FBMEM) - hClass = NV01_MEMORY_LIST_FBMEM; - else if (memdescGetAddressSpace(pMemDesc) == ADDR_SYSMEM) - hClass = NV01_MEMORY_LIST_SYSTEM; - else - return NV_ERR_INVALID_STATE; - - NvU32 os02Flags = 0; - - NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, - RmDeprecatedConvertOs32ToOs02Flags(pMemory->Attr, - pMemory->Attr2, - pMemory->Flags, - &os02Flags)); - NV_RM_RPC_ALLOC_MEMORY(pGpu, - hClient, - hParent, - hMemory, - hClass, - os02Flags, - pMemDesc, - status); - - if (status == NV_OK) - { - // Mark memory as registered in GSP - pMemDesc->_flags |= MEMDESC_FLAGS_REGISTERED_TO_GSP; - } - - return status; -} - - -/*! -* @brief Deregister MEMDESC from GSP -* Is always called when the memory is freed. -* Have argument as pMemory*; Move to NVOC -* -* @param[in] pGpu -* @param[in] hClient NvHandle -* @param[in] hParent NvHandle -* @param[in] hMemory NvHandle -* -* @returns NV_STATUS -*/ -NV_STATUS -memdescDeregisterFromGSP -( - OBJGPU *pGpu, - NvHandle hClient, - NvHandle hParent, - NvHandle hMemory -) -{ - NV_STATUS status = NV_OK; - Memory *pMemory = NULL; - RsResourceRef *pMemoryRef = NULL; - MEMORY_DESCRIPTOR *pMemDesc = NULL; - - // Nothing to do without GSP - if ((pGpu == NULL) || - !IS_GSP_CLIENT(pGpu)) - { - return NV_OK; - } - - NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, serverutilGetResourceRef(hClient, hMemory, &pMemoryRef)); - - pMemory = dynamicCast(pMemoryRef->pResource, Memory); - NV_CHECK_OR_RETURN(LEVEL_ERROR, pMemory != NULL, NV_ERR_INVALID_OBJECT); - - pMemDesc = pMemory->pMemDesc; - - // Nothing to do if memory is not registered to GSP - if ((pMemDesc == NULL) || - (pMemDesc->_flags & MEMDESC_FLAGS_REGISTERED_TO_GSP) == 0) - { - return NV_OK; - } - - NV_RM_RPC_FREE(pGpu, - hClient, - hParent, - hMemory, - status); - - if (status == NV_OK) - { - // Mark memory as not registered in GSP - pMemDesc->_flags &= ~MEMDESC_FLAGS_REGISTERED_TO_GSP; - } - - return status; -} - void memdescSetName(OBJGPU *pGpu, MEMORY_DESCRIPTOR *pMemDesc, const char *name, const char* suffix) { @@ -4832,6 +4696,7 @@ NV_STATUS memdescSendMemDescToGSP(OBJGPU *pGpu, MEMORY_DESCRIPTOR *pMemDesc, NvHandle *pHandle) { NV_STATUS status = NV_OK; + RsClient *pClient; MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); NvU32 flags = 0; NvU32 index = 0; @@ -4901,12 +4766,16 @@ memdescSendMemDescToGSP(OBJGPU *pGpu, MEMORY_DESCRIPTOR *pMemDesc, NvHandle *pHa sizeof(listAllocParams)), end); + NV_ASSERT_OK_OR_GOTO(status, + serverGetClientUnderLock(&g_resServ, pMemoryManager->hClient, &pClient), + end); + // Register MemoryList object to GSP NV_ASSERT_OK_OR_GOTO(status, - memdescRegisterToGSP(pGpu, - pMemoryManager->hClient, - pMemoryManager->hSubdevice, - *pHandle), + memRegisterWithGsp(pGpu, + pClient, + pMemoryManager->hSubdevice, + *pHandle), end); end: @@ -5070,4 +4939,3 @@ memdescIsEgm return NV_FALSE; } - diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mapper.c b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mapper.c index db27d85e87..90331beb34 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mapper.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mapper.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -147,10 +147,33 @@ memmapperExecuteSemaphoreSignal pMemoryMapper->hInternalSemaphoreSurface, NV_SEMAPHORE_SURFACE_CTRL_CMD_SET_VALUE, ¶ms, - sizeof params)); + sizeof(params))); return NV_OK; } +static void +memmapperSetError +( + MemoryMapper *pMemoryMapper, + NV_STATUS errorStatus +) +{ + MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(GPU_RES_GET_GPU(pMemoryMapper)); + + NV_ASSERT_OR_RETURN_VOID(errorStatus != NV_OK); + + NV_PRINTF(LEVEL_ERROR, "MemoryMapper encountered an error, not processing more commands.\n"); + + pMemoryMapper->bError = NV_TRUE; + + NV_MEMORY_MAPPER_NOTIFICATION notification = {0}; + notification.status = errorStatus; + TRANSFER_SURFACE dstSurf = {0}; + dstSurf.pMemDesc = pMemoryMapper->pNotificationMemory->pMemDesc; + dstSurf.offset = pMemoryMapper->notificationOffset; + NV_CHECK(LEVEL_ERROR, memmgrMemWrite(pMemoryManager, &dstSurf, ¬ification, sizeof(notification), 0) == NV_OK); +} + static void memmapperProcessWork ( @@ -197,7 +220,9 @@ memmapperProcessWork if (status != NV_OK) { if (status != NV_ERR_BUSY_RETRY) - pMemoryMapper->bError = NV_TRUE; + { + memmapperSetError(pMemoryMapper, status); + } break; } @@ -243,7 +268,7 @@ memoryMapperQueueWork OS_QUEUE_WORKITEM_FLAGS_DONT_FREE_PARAMS | OS_QUEUE_WORKITEM_FLAGS_FALLBACK_TO_DPC | OS_QUEUE_WORKITEM_FLAGS_LOCK_API_RW - | OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS_RW)); + | OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS)); } static void @@ -281,6 +306,15 @@ memmapperConstruct_IMPL pMemoryMapper->pSubdevice = dynamicCast(pParentRef->pResource, Subdevice); NV_ASSERT_OR_RETURN(pMemoryMapper->pSubdevice != NULL, NV_ERR_INVALID_ARGUMENT); + RsResourceRef *pNotificationMemoryRef; + NV_ASSERT_OK_OR_GOTO(status, + clientGetResourceRef(pCallContext->pClient, pAllocParams->hNotificationMemory, &pNotificationMemoryRef), + failed); + pMemoryMapper->pNotificationMemory = dynamicCast(pNotificationMemoryRef->pResource, Memory); + NV_CHECK_TRUE_OR_GOTO(status, LEVEL_ERROR, + pMemoryMapper->pNotificationMemory != NULL, NV_ERR_INVALID_ARGUMENT, failed); + pMemoryMapper->notificationOffset = pAllocParams->notificationOffset; + NV_ASSERT_OR_RETURN(pAllocParams->maxQueueSize != 0, NV_ERR_INVALID_ARGUMENT); pMemoryMapper->operationQueueLen = pAllocParams->maxQueueSize; pMemoryMapper->pOperationQueue = @@ -315,6 +349,8 @@ memmapperConstruct_IMPL pMemoryMapper->semaphoreCallback.func = memmapperSemaphoreEventCallback; pMemoryMapper->semaphoreCallback.arg = pMemoryMapper; + NV_ASSERT_OK_OR_GOTO(status, refAddDependant(pNotificationMemoryRef, RES_GET_REF(pMemoryMapper)), failed); + failed: if (status != NV_OK) { @@ -339,6 +375,7 @@ memmapperDestruct_IMPL MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(GPU_RES_GET_GPU(pMemoryMapper)); RM_API *pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); + refRemoveDependant(RES_GET_REF(pMemoryMapper->pNotificationMemory), RES_GET_REF(pMemoryMapper)); pRmApi->Free(pRmApi, pMemoryManager->hClient, pMemoryMapper->hInternalSemaphoreSurface); portMemFree(pMemoryMapper->pOperationQueue); @@ -365,15 +402,15 @@ memmapperSubmitSemaphoreWait params.waitValue = pSemaphoreWait->value; params.notificationHandle = (NvU64)&pMemoryMapper->semaphoreCallback; - NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, - pRmApi->Control(pRmApi, - pMemoryManager->hClient, - pMemoryMapper->hInternalSemaphoreSurface, - NV_SEMAPHORE_SURFACE_CTRL_CMD_REGISTER_WAITER, - ¶ms, - sizeof params)); + NV_STATUS status = pRmApi->Control(pRmApi, + pMemoryManager->hClient, + pMemoryMapper->hInternalSemaphoreSurface, + NV_SEMAPHORE_SURFACE_CTRL_CMD_REGISTER_WAITER, + ¶ms, + sizeof params); - return NV_OK; + NV_CHECK(LEVEL_ERROR, status == NV_OK || status == NV_ERR_ALREADY_SIGNALLED); + return status; } NV_STATUS @@ -386,6 +423,8 @@ memmapperCtrlCmdSubmitOperations_IMPL NV00FE_CTRL_OPERATION *pOperataionsParams = pParams->pOperations; NV_STATUS status = NV_OK; NvU32 i; + // If the queue is not empty, worker from previous commands will do the job + NvBool bQueueWorker = (pMemoryMapper->operationQueuePut == pMemoryMapper->operationQueueGet); for (i = 0; i < pParams->operationsCount; i++) { @@ -410,9 +449,19 @@ memmapperCtrlCmdSubmitOperations_IMPL NV_CHECK_TRUE_OR_GOTO(status, LEVEL_ERROR, semsurfValidateIndex(pMemoryMapper->pSemSurf, pOperation->data.semaphore.index), NV_ERR_INVALID_ARGUMENT, op_failed); - NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, - memmapperSubmitSemaphoreWait(pMemoryMapper, &pOperation->data.semaphore), - op_failed); + status = memmapperSubmitSemaphoreWait(pMemoryMapper, &pOperation->data.semaphore); + if (status == NV_ERR_ALREADY_SIGNALLED) + { + status = NV_OK; + // semaphore is already signalled, so skip the operation completely + continue; + } + else if (status == NV_OK && pMemoryMapper->operationQueuePut == pMemoryMapper->operationQueueGet) + { + // worker will be called by semaphore surface callback + bQueueWorker = NV_FALSE; + } + NV_CHECK_OR_GOTO(LEVEL_ERROR, status == NV_OK, op_failed); break; case NV00FE_CTRL_OPERATION_TYPE_SEMAPHORE_SIGNAL: NV_CHECK_TRUE_OR_GOTO(status, LEVEL_ERROR, @@ -431,8 +480,7 @@ memmapperCtrlCmdSubmitOperations_IMPL op_failed: if (status != NV_OK) { - NV_PRINTF(LEVEL_ERROR, "MemoryMapper encountered an error, not processing more commands.\n"); - pMemoryMapper->bError = NV_TRUE; + memmapperSetError(pMemoryMapper, status); break; } @@ -441,7 +489,49 @@ memmapperCtrlCmdSubmitOperations_IMPL pParams->operationsProcessedCount = i; - memoryMapperQueueWork(pMemoryMapper); + if (bQueueWorker && pMemoryMapper->operationQueuePut != pMemoryMapper->operationQueueGet) + { + // only queue worker when the queue is not empty + memoryMapperQueueWork(pMemoryMapper); + } return status; } + +NV_STATUS +memmapperCtrlCmdResizeQueue_IMPL +( + MemoryMapper *pMemoryMapper, + NV00FE_CTRL_RESIZE_QUEUE_PARAMS *pParams +) +{ + if ((pMemoryMapper->operationQueuePut - pMemoryMapper->operationQueueGet + pMemoryMapper->operationQueueLen) + % pMemoryMapper->operationQueueLen + 1 > pParams->maxQueueSize) + { + // All queued operations need to fit in the queue + NV_CHECK_FAILED(LEVEL_ERROR, "Queue size too small"); + return NV_ERR_INVALID_ARGUMENT; + } + + NV00FE_CTRL_OPERATION *pNewOperationQueue = + portMemAllocNonPaged(pParams->maxQueueSize * sizeof(*pMemoryMapper->pOperationQueue)); + NV_CHECK_OR_RETURN(LEVEL_ERROR, pNewOperationQueue != NULL, NV_ERR_NO_MEMORY); + + NvU32 newQueuePut = 0; + while (pMemoryMapper->operationQueueGet != pMemoryMapper->operationQueuePut) + { + pNewOperationQueue[newQueuePut] = pMemoryMapper->pOperationQueue[pMemoryMapper->operationQueueGet]; + pMemoryMapper->operationQueueGet = (pMemoryMapper->operationQueueGet + 1) % pMemoryMapper->operationQueueLen; + newQueuePut++; + NV_ASSERT_OR_RETURN(newQueuePut < pParams->maxQueueSize, NV_ERR_INVALID_STATE); + } + + portMemFree(pMemoryMapper->pOperationQueue); + + pMemoryMapper->pOperationQueue = pNewOperationQueue; + pMemoryMapper->operationQueueLen = pParams->maxQueueSize; + pMemoryMapper->operationQueuePut = newQueuePut; + pMemoryMapper->operationQueueGet = 0; + + return NV_OK; +} diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr.c b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr.c index 6b88b0fb3c..cbc31395b1 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr.c @@ -52,11 +52,13 @@ #include "gpu/gsp/kernel_gsp.h" #include "gpu/conf_compute/conf_compute.h" #include "platform/sli/sli.h" +#include "virtualization/hypervisor/hypervisor.h" #include "class/cl0050.h" static NV_STATUS _memmgrCreateFBSR(MemoryManager *pMemoryManager, NvU32); static NV_STATUS _memmgrCreateChildObjects(MemoryManager *pMemoryManager); +static void _memmgrInitRegistryOverridesAtConstruct(OBJGPU *pGpu, MemoryManager *pMemoryManager); static void _memmgrInitRegistryOverrides(OBJGPU *pGpu, MemoryManager *pMemoryManager); static NV_STATUS _memmgrInitMIGMemoryPartitionHeap(OBJGPU *pGpu, MemoryManager *pMemoryManager, NvU32 swizzId, NV_RANGE *pAddrRange, @@ -92,6 +94,8 @@ memmgrConstructEngine_IMPL pMemoryManager->MIGMemoryPartitioningInfo.hSubdevice = NV01_NULL_OBJECT; pMemoryManager->MIGMemoryPartitioningInfo.partitionableMemoryRange = NV_RANGE_EMPTY; + _memmgrInitRegistryOverridesAtConstruct(pGpu, pMemoryManager); + return NV_OK; } @@ -115,6 +119,22 @@ memmgrDestruct_IMPL pMemoryManager->MIGMemoryPartitioningInfo.partitionableMemoryRange = NV_RANGE_EMPTY; } +/*! + * @brief Initializes registry overrides in @ref MemoryManager that need to be + * ready by the end of @ref memmgrConstructEngine_IMPL. + * + * @param[in] pGpu + * @param[in,out] pMemoryManager + */ +static void +_memmgrInitRegistryOverridesAtConstruct +( + OBJGPU *pGpu, + MemoryManager *pMemoryManager +) +{ +} + static void _memmgrInitRegistryOverrides(OBJGPU *pGpu, MemoryManager *pMemoryManager) { @@ -323,16 +343,17 @@ memmgrTestCeUtils memdescCreate(&pVidMemDesc, pGpu, sizeof vidmemData, RM_PAGE_SIZE, NV_TRUE, ADDR_FBMEM, NV_MEMORY_UNCACHED, MEMDESC_FLAGS_NONE), failed); - memdescTagAlloc(status, + memdescTagAlloc(status, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_19, pVidMemDesc); NV_ASSERT_OK_OR_GOTO(status, status, failed); vidSurface.pMemDesc = pVidMemDesc; NV_ASSERT_OK_OR_GOTO(status, - memdescCreate(&pSysMemDesc, pGpu, sizeof sysmemData, 0, NV_TRUE, ADDR_SYSMEM, + memdescCreate(&pSysMemDesc, pGpu, sizeof sysmemData, 0, NV_TRUE, + RMCFG_FEATURE_PLATFORM_GSP ? ADDR_FBMEM : ADDR_SYSMEM, NV_MEMORY_UNCACHED, MEMDESC_FLAGS_NONE), failed); - memdescTagAlloc(status, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_138, + memdescTagAlloc(status, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_138, pSysMemDesc); NV_ASSERT_OK_OR_GOTO(status, status, failed); sysSurface.pMemDesc = pSysMemDesc; @@ -375,13 +396,10 @@ memmgrInitInternalChannels_IMPL return NV_OK; } - if (pGpu->getProperty(pGpu, PDB_PROP_GPU_IS_VIRTUALIZATION_MODE_HOST_VGPU) || - !memmgrIsPmaInitialized(pMemoryManager) || - RMCFG_FEATURE_PLATFORM_GSP || + if (hypervisorIsVgxHyper() || (IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu) && !IS_VIRTUAL(pGpu)) || IS_MIG_ENABLED(pGpu) || gpuIsCCorApmFeatureEnabled(pGpu) || IsSLIEnabled(pGpu) || - IsUnlinkedSLIEnabled(pGpu) || gpuIsSelfHosted(pGpu) || NVCPU_IS_PPC64LE) { @@ -407,7 +425,7 @@ memmgrDestroyInternalChannels_IMPL { NV_PRINTF(LEVEL_INFO, "Destroying global CeUtils instance\n"); - memmgrDestroyCeUtils(pMemoryManager, NV_FALSE); + memmgrDestroyCeUtils(pMemoryManager); NV_ASSERT_OK_OR_RETURN(memmgrScrubHandlePreSchedulingDisable_HAL(pGpu, pMemoryManager)); @@ -508,6 +526,15 @@ memmgrStateInitLocked_IMPL pMemoryManager->fbsrStartMode = FBSR_TYPE_PERSISTENT; } + // TODO: Remove this once BUG 4401261 is fixed + // FBSR_TYPE_WDDM_FAST_DMA_DEFERRED_NONPAGED and FBSR_TYPE_WDDM_SLOW_CPU_PAGED are broken + // on Windows with GSP enabled. FBSR_TYPE_DMA mostly works, but may fail if the requested + // non paged memory is unavailable + if (RMCFG_FEATURE_PLATFORM_WINDOWS && IS_GSP_CLIENT(pGpu)) + { + pMemoryManager->fbsrStartMode = FBSR_TYPE_DMA; + } + for (i = pMemoryManager->fbsrStartMode; i < NUM_FBSR_TYPES; i++) { if (!pMemoryManager->bPersistentStandbyBuffer && @@ -594,7 +621,7 @@ memmgrVerifyGspDmaOps_IMPL NV_TRUE, ADDR_FBMEM, NV_MEMORY_UNCACHED, 0); NV_ASSERT_OR_RETURN(status == NV_OK, status); - memdescTagAlloc(status, + memdescTagAlloc(status, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_20, pMemDesc); NV_ASSERT_OR_GOTO(status == NV_OK, failed); @@ -671,7 +698,6 @@ memmgrStatePreUnload_IMPL ) { KernelMemorySystem *pKernelMemorySystem = GPU_GET_KERNEL_MEMORY_SYSTEM(pGpu); - NV_ASSERT((flags & GPU_STATE_FLAGS_PRESERVING) || pMemoryManager->zbcSurfaces == 0); if ((flags & GPU_STATE_FLAGS_PRESERVING)) @@ -680,7 +706,7 @@ memmgrStatePreUnload_IMPL // fifo won't send a PreSchedulingDisable callback on StateUnload // destroy the channel manually, so that a CeUtils lite instance can be created for FBSR // - memmgrDestroyCeUtils(pMemoryManager, !IS_VIRTUAL(pGpu)); + memmgrDestroyCeUtils(pMemoryManager); } if (memmgrIsPmaEnabled(pMemoryManager) && @@ -745,7 +771,10 @@ memmgrStateDestroy_IMPL // RMCONFIG: only if FBSR engine is enabled if (RMCFG_MODULE_FBSR) { + // // Cleanup fbsrReservedRanges + // GSP_HEAP range is allocated, every other range is described + // if (pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_BEFORE_BAR2PTE] != NULL) memdescDestroy(pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_BEFORE_BAR2PTE]); @@ -753,14 +782,14 @@ memmgrStateDestroy_IMPL memdescDestroy(pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_AFTER_BAR2PTE]); if (pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_HEAP] != NULL) + { + memdescFree(pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_HEAP]); memdescDestroy(pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_HEAP]); + } if (pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_NON_WPR] != NULL) memdescDestroy(pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_NON_WPR]); - if (pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_WPR] != NULL) - memdescDestroy(pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_WPR]); - if (pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_VGA_WORKSPACE] != NULL) memdescDestroy(pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_VGA_WORKSPACE]); @@ -768,7 +797,6 @@ memmgrStateDestroy_IMPL pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_AFTER_BAR2PTE] = NULL; pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_HEAP] = NULL; pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_NON_WPR] = NULL; - pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_WPR] = NULL; pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_VGA_WORKSPACE] = NULL; for (i = 0; i < NUM_FBSR_TYPES; i++) @@ -776,6 +804,7 @@ memmgrStateDestroy_IMPL fbsrDestroy_HAL(pGpu, pMemoryManager->pFbsr[i]); } } + if (memmgrIsLocalEgmEnabled(pMemoryManager)) { if (!IS_VIRTUAL_WITH_SRIOV(pGpu)) @@ -894,6 +923,8 @@ memmgrCreateHeap_IMPL NV_ASSERT_OK_OR_RETURN(memmgrValidateFBEndReservation_HAL(pGpu, pMemoryManager)); + NV_ASSERT_OK_OR_RETURN(memmgrReserveMemoryForFakeWPR_HAL(pGpu, pMemoryManager)); + NV_ASSERT_OK_OR_RETURN(memmgrReserveMemoryForPmu_HAL(pGpu, pMemoryManager)); // Reserve vidmem for FSP usage, including FRTS, WPR2 @@ -1107,6 +1138,26 @@ memmgrGetUsedRamSize_IMPL NvU64 gspWprRegionSize = pKernelGsp->pWprMeta->gspFwWprEnd - pKernelGsp->pWprMeta->gspFwWprStart; *pFbUsedSize = *pFbUsedSize - gspWprRegionSize; + + NV2080_CTRL_INTERNAL_GPU_GET_GSP_RM_FREE_HEAP_PARAMS params = {0}; + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + NV_STATUS status; + + status = pRmApi->Control(pRmApi, + pGpu->hInternalClient, + pGpu->hInternalSubdevice, + NV2080_CTRL_CMD_INTERNAL_GPU_GET_GSP_RM_FREE_HEAP, + ¶ms, + sizeof(params)); + + if (status == NV_OK) + { + *pFbUsedSize = *pFbUsedSize - params.freeHeapSize; + } + else + { + NV_PRINTF(LEVEL_ERROR,"Failed to get free heap size of GSP-RM\n"); + } } return NV_OK; @@ -1668,6 +1719,9 @@ memmgrAllocateConsoleRegion_IMPL if (pMemoryManager->Ram.ReservedConsoleDispMemSize > 0) { + pMemoryManager->Ram.fbRegion[consoleRegionId].bLostOnSuspend = NV_FALSE; + pMemoryManager->Ram.fbRegion[consoleRegionId].bPreserveOnSuspend = NV_TRUE; + pConsoleFbRegion->base = pMemoryManager->Ram.fbRegion[consoleRegionId].base; pConsoleFbRegion->limit = pMemoryManager->Ram.fbRegion[consoleRegionId].limit; @@ -1803,17 +1857,17 @@ memmgrCalcReservedFbSpace_IMPL // If we have regions defined, fill in the per-segment reserved memory requirement if (pMemoryManager->Ram.numFBRegions > 0) { - FB_REGION_DESCRIPTOR *pFbRegion = NULL; - NvU64 regionSize = 0; + NvBool bFastAssigned = NV_FALSE; + NvBool bSlowAssigned = NV_FALSE; + NvBool bIsoAssigned = NV_FALSE; // - // Find the fastest and ISO regions. This search makes a soft assumption that - // region #0 is not reserved, fastest, and supports ISO -- that would be stupid + // Find the fastest, slowest, and ISO regions. // for (i = 0; i < pMemoryManager->Ram.numFBRegions; i++) { - pFbRegion = &pMemoryManager->Ram.fbRegion[i]; - regionSize = (pFbRegion->limit - pFbRegion->base +1); + FB_REGION_DESCRIPTOR *pFbRegion = &pMemoryManager->Ram.fbRegion[i]; + NvU64 regionSize = (pFbRegion->limit - pFbRegion->base +1); // Check only non-reserved regions (which are typically unpopulated blackholes in address space) if ((!pFbRegion->bRsvdRegion) && @@ -1821,32 +1875,40 @@ memmgrCalcReservedFbSpace_IMPL (regionSize >= (rsvdFastSize + rsvdSlowSize + rsvdISOSize))) { // Find the fastest region - if ((pFbRegion->performance > pMemoryManager->Ram.fbRegion[idxFastRegion].performance) + if (!bFastAssigned + || (pFbRegion->performance > pMemoryManager->Ram.fbRegion[idxFastRegion].performance) || pMemoryManager->Ram.fbRegion[idxFastRegion].bRsvdRegion || (!bAllocProtected && pMemoryManager->Ram.fbRegion[idxFastRegion].bProtected)) { idxFastRegion = i; + bFastAssigned = NV_TRUE; } // Find the slowest region - if ((pFbRegion->performance < pMemoryManager->Ram.fbRegion[idxSlowRegion].performance) + if (!bSlowAssigned + || (pFbRegion->performance < pMemoryManager->Ram.fbRegion[idxSlowRegion].performance) || pMemoryManager->Ram.fbRegion[idxSlowRegion].bRsvdRegion || (!bAllocProtected && pMemoryManager->Ram.fbRegion[idxSlowRegion].bProtected)) { idxSlowRegion = i; + bSlowAssigned = NV_TRUE; } // Find the fastest ISO region if (pFbRegion->bSupportISO) { - if ((!pMemoryManager->Ram.fbRegion[idxISORegion].bSupportISO) || + if (!bIsoAssigned || + (!pMemoryManager->Ram.fbRegion[idxISORegion].bSupportISO) || (pFbRegion->performance > pMemoryManager->Ram.fbRegion[idxISORegion].performance) || (!bAllocProtected && pMemoryManager->Ram.fbRegion[idxISORegion].bProtected)) { idxISORegion = i; + bIsoAssigned = NV_TRUE; } } } } + NV_ASSERT(bFastAssigned && bSlowAssigned && bIsoAssigned); + // There should *ALWAYS* be a region that supports ISO, even if we have no display NV_ASSERT(pMemoryManager->Ram.fbRegion[idxISORegion].bSupportISO); @@ -3022,7 +3084,6 @@ memmgrPmaInitialize_IMPL if (bNumaEnabled) { KernelMemorySystem *pKernelMemorySystem = GPU_GET_KERNEL_MEMORY_SYSTEM(pGpu); - NvU32 numaSkipReclaimVal = NV_REG_STR_RM_NUMA_ALLOC_SKIP_RECLAIM_PERCENTAGE_DEFAULT; if (osReadRegistryDword(pGpu, NV_REG_STR_RM_NUMA_ALLOC_SKIP_RECLAIM_PERCENTAGE, &numaSkipReclaimVal) == NV_OK) @@ -3041,7 +3102,6 @@ memmgrPmaInitialize_IMPL pKernelMemorySystem->coherentCpuFbBase, pKernelMemorySystem->numaOnlineSize)); } - } return NV_OK; @@ -3537,45 +3597,41 @@ memmgrDiscoverMIGPartitionableMemoryRange_VF } NV_STATUS -memmgrValidateFBEndReservation_PF +memmgrAllocReservedFBRegionMemdesc_IMPL ( - OBJGPU *pGpu, - MemoryManager *pMemoryManager + OBJGPU *pGpu, + MemoryManager *pMemoryManager, + MEMORY_DESCRIPTOR **ppMemdesc, + NvU64 rangeStart, + NvU64 allocSize, + NvU64 memdescFlags, + NV_FB_ALLOC_RM_INTERNAL_OWNER allocTag ) { - NV_STATUS status; + NV_STATUS status = NV_OK; - NV_ASSERT_TRUE_OR_GOTO(status, - (pGpu != NULL) && - (pMemoryManager != NULL), - NV_ERR_INVALID_ARGUMENT, - memmgrValidateFBEndReservation_PF_exit); + NV_ASSERT_OR_RETURN(ppMemdesc != NULL, NV_ERR_INVALID_ARGUMENT); - // If we reserved more memory from RM than we previously estimated - if (pMemoryManager->rsvdMemorySize > memmgrGetFBEndReserveSizeEstimate_HAL(pGpu, pMemoryManager)) - { - NV_PRINTF(LEVEL_ERROR, - "End of FB reservation was not enough (%u vs %u). Failing to boot.\n", - memmgrGetFBEndReserveSizeEstimate_HAL(pGpu, pMemoryManager), - pMemoryManager->rsvdMemorySize); + NV_ASSERT_OK_OR_GOTO(status, + memdescCreate(ppMemdesc, pGpu, allocSize, + RM_PAGE_SIZE, NV_TRUE, ADDR_FBMEM, + NV_MEMORY_UNCACHED, memdescFlags), + memmgrAllocReservedFBRegionMemdesc_IMPL_exit); - NV_ASSERT_OK_OR_GOTO(status, - NV_ERR_INSUFFICIENT_RESOURCES, - memmgrValidateFBEndReservation_PF_exit); - } + memdescSetPageSize(*ppMemdesc, AT_GPU, RM_PAGE_SIZE); + memdescDescribe(*ppMemdesc, ADDR_FBMEM, rangeStart, allocSize); + memdescSetHeapOffset(*ppMemdesc, rangeStart); -memmgrValidateFBEndReservation_PF_exit: - return status; -} + memdescTagAlloc(status, allocTag, *ppMemdesc); + NV_ASSERT_OK_OR_GOTO(status, status, memmgrAllocReservedFBRegionMemdesc_IMPL_exit); -NV_STATUS -memmgrReserveMemoryForPmu_MONOLITHIC -( - OBJGPU *pGpu, - MemoryManager *pMemoryManager -) -{ - NV_STATUS status = NV_OK; +memmgrAllocReservedFBRegionMemdesc_IMPL_exit: + if ((status != NV_OK) && (*ppMemdesc != NULL)) + { + NV_PRINTF(LEVEL_ERROR, "Cannot allocate the memory with range allocation\n"); + memdescDestroy(*ppMemdesc); + *ppMemdesc = NULL; + } return status; } @@ -3748,15 +3804,10 @@ memmgrInitCeUtils_IMPL NV_ASSERT_OR_RETURN(pMemoryManager->pCeUtils == NULL, NV_ERR_INVALID_STATE); - if (!bFifoLite && pMemoryManager->pCeUtilsSuspended != NULL) - { - pMemoryManager->pCeUtils = pMemoryManager->pCeUtilsSuspended; - pMemoryManager->pCeUtilsSuspended = NULL; - return NV_OK; - } - if (bFifoLite) ceUtilsParams.flags |= DRF_DEF(0050_CEUTILS, _FLAGS, _FIFO_LITE, _TRUE); + else if(IsTURINGorBetter(pGpu)) + ceUtilsParams.flags |= DRF_DEF(0050_CEUTILS, _FLAGS, _NO_BAR1_USE, _TRUE); if (pMemoryManager->bCePhysicalVidmemAccessNotSupported) ceUtilsParams.flags |= DRF_DEF(0050_CEUTILS, _FLAGS, _VIRTUAL_MODE, _TRUE); @@ -3767,7 +3818,7 @@ memmgrInitCeUtils_IMPL NV_ASSERT_OK(status); if (status != NV_OK) { - memmgrDestroyCeUtils(pMemoryManager, NV_FALSE); + memmgrDestroyCeUtils(pMemoryManager); } return status; @@ -3776,18 +3827,9 @@ memmgrInitCeUtils_IMPL void memmgrDestroyCeUtils_IMPL ( - MemoryManager *pMemoryManager, - NvBool bSuspendCeUtils + MemoryManager *pMemoryManager ) { - if (bSuspendCeUtils) - { - NV_ASSERT_OR_RETURN_VOID(pMemoryManager->pCeUtilsSuspended == NULL); - pMemoryManager->pCeUtilsSuspended = pMemoryManager->pCeUtils; - } - else - { - objDelete(pMemoryManager->pCeUtils); - } + objDelete(pMemoryManager->pCeUtils); pMemoryManager->pCeUtils = NULL; } diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_ctrl.c b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_ctrl.c index 5ebacabdd0..a4ef21528a 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_ctrl.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_ctrl.c @@ -647,19 +647,6 @@ subdeviceCtrlCmdFbGetClientAllocationInfo_IMPL(Subdevice *pSubdevice, } #endif // defined(DEBUG) || defined(DEVELOP) || defined(NV_VERIF_FEATURES) || defined(NV_MODS) -/*! - * @brief Get heap reservation size needed by different module - */ -NV_STATUS -subdeviceCtrlCmdFbGetHeapReservationSize_IMPL -( - Subdevice *pSubdevice, - NV2080_CTRL_INTERNAL_FB_GET_HEAP_RESERVATION_SIZE_PARAMS *pParams -) -{ - NV_ASSERT_OR_RETURN(0, NV_ERR_NOT_SUPPORTED); -} - // // subdeviceCtrlCmdFbGetFBRegionInfo // @@ -762,77 +749,6 @@ subdeviceCtrlCmdFbGetFBRegionInfo_IMPL return status; } -NV_STATUS -subdeviceCtrlCmdInternalMemmgrGetVgpuHostRmReservedFb_IMPL -( - Subdevice *pSubdevice, - NV2080_CTRL_INTERNAL_MEMMGR_GET_VGPU_CONFIG_HOST_RESERVED_FB_PARAMS *pParams -) -{ - OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); - MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - - pParams->hostReservedFb = memmgrGetVgpuHostRmReservedFb_HAL(pGpu, pMemoryManager, pParams->vgpuTypeId); - - return NV_OK; -} - -/*! - * @brief This command gets the offset into FB that ECC asynchronous scrubber - * has completed up to. As well as if the scrubber has finished its job. - * - * @param[in] pDiagApi - * @param[in,out] pParams - * attribute: The attribute whose support is to be determined. - * value: The new value of the specified attribute to be applied. - * @return Returns NV_STATUS - * NV_OK Success - * - */ -NV_STATUS -diagapiCtrlCmdFbEccScrubDiag_IMPL -( - DiagApi *pDiagApi, - NV208F_CTRL_CMD_FB_ECC_SCRUB_DIAG_PARAMS *pConfig -) -{ - OBJGPU *pGpu = GPU_RES_GET_GPU(pDiagApi); - MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - - memmgrGetScrubState_HAL(pGpu, pMemoryManager, &(pConfig->fbOffsetCompleted), - &(pConfig->fbEndOffset), &(pConfig->bAsyncScrubDisabled)); - - return NV_OK; -} - -/*! - * @brief This command launches the asynchronous scrubber on the region specified - * by beginBlock and endBlock. beginBlock is the lesser block index - * of the region to be scrubbed. - * - * @param[in] pDiagApi - * @param[in,out] pParams - * attribute: The attribute whose support is to be determined. - * value: The new value of the specified attribute to be applied. - * @return Returns NV_STATUS - * NV_OK Success - * - */ -NV_STATUS -diagapiCtrlCmdFbEccAsyncScrubRegion_IMPL -( - DiagApi *pDiagApi, - NV208F_CTRL_CMD_FB_ECC_ASYNC_SCRUB_REGION_PARAMS *pConfig -) -{ - OBJGPU *pGpu = GPU_RES_GET_GPU(pDiagApi); - MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - - memmgrAsyncScrubRegion_HAL(pGpu, pMemoryManager, pConfig->startBlock, pConfig->endBlock); - - return NV_OK; -} - NV_STATUS subdeviceCtrlCmdGbGetSemaphoreSurfaceLayout_IMPL ( diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_gsp_client.c b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_gsp_client.c index a565726df1..6560c9fd20 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_gsp_client.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_gsp_client.c @@ -90,6 +90,8 @@ memmgrInitBaseFbRegions_FWCLIENT pMemoryManager->Ram.fbRegion[i].bSupportCompressed = pFbRegionInfo->supportCompressed; pMemoryManager->Ram.fbRegion[i].bSupportISO = pFbRegionInfo->supportISO; pMemoryManager->Ram.fbRegion[i].rsvdSize = pFbRegionInfo->reserved; + // CPU-RM is not responsible for saving GSP-RM allocations + pMemoryManager->Ram.fbRegion[i].bLostOnSuspend = NV_TRUE; if (pFbRegionInfo->reserved) { diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_pwr_mgmt.c b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_pwr_mgmt.c index fd1f84e129..abb4deb890 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_pwr_mgmt.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_pwr_mgmt.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -24,6 +24,7 @@ #include "gpu/mem_mgr/mem_mgr.h" #include "gpu/mem_mgr/heap.h" #include "gpu/mem_mgr/fbsr.h" +#include "gpu/mem_sys/kern_mem_sys.h" #include "gpu/bus/kern_bus.h" #include "vgpu/rpc.h" #include "os/nv_memory_type.h" @@ -255,31 +256,6 @@ memmgrRestorePowerMgmtState_KERNEL return status; } -/* - * FB regions with LostOnSuspend set to NV_TRUE are expected to be grouped together towards the end of FB - * First region to have this property set would be the end of save area for Suspend. - * TODO: Handle LostOnSuspend for non-consequetive regions - */ -static NvU64 -_memmgrGetFbEndExcludingLostOnSuspendRegions -( - OBJGPU *pGpu, - MemoryManager *pMemoryManager -) -{ - NvU32 i = 0; - - for (i = 0; i < pMemoryManager->Ram.numFBRegions; i++) - { - if (pMemoryManager->Ram.fbRegion[i].bLostOnSuspend == NV_TRUE) - { - return pMemoryManager->Ram.fbRegion[i].base; - } - } - - return (pMemoryManager->Ram.fbAddrSpaceSizeMb << 20); -} - static NV_STATUS _memmgrAllocFbsrReservedRanges ( @@ -321,65 +297,85 @@ _memmgrAllocFbsrReservedRanges NvU64 afterBar2PteRegionSize = 0; /* - * Allocate Mem descriptors for AFTER_BAR2PTE, GSP HEAP, WPR, NON WPR and VGA Workspace regions. + * Allocate memdesc for AFTER_BAR2PTE and GSP WPR regions. + * Allocate sysmem to save GSP allocations */ if (IS_GSP_CLIENT(pGpu)) { KernelGsp *pKernelGsp = GPU_GET_KERNEL_GSP(pGpu); NvU64 afterBar2PteRegionEnd = 0; + afterBar2PteRegionStart = memdescGetPhysAddr(pKernelBus->virtualBar2[GPU_GFID_PF].pPTEMemDesc, AT_GPU, 0) + pKernelBus->virtualBar2[GPU_GFID_PF].pPTEMemDesc->Size; afterBar2PteRegionEnd = pMemoryManager->rsvdMemoryBase + pMemoryManager->rsvdMemorySize; afterBar2PteRegionSize = afterBar2PteRegionEnd - afterBar2PteRegionStart; - NvU64 gspHeapRegionStart = afterBar2PteRegionEnd; - NvU64 gspHeapRegionSize = pKernelGsp->pWprMeta->gspFwRsvdStart - gspHeapRegionStart; - NvU64 gspNonWprRegionSize = pKernelGsp->pWprMeta->gspFwWprStart - pKernelGsp->pWprMeta->gspFwRsvdStart; - // Create memdesc of AFTER BAR2PTE, GSP HEAP, GSP NON WPR and VGA Workspace regions + // Create memdesc of AFTER BAR2PTE region NV_ASSERT_OK_OR_GOTO(status, memdescCreate(&pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_AFTER_BAR2PTE], pGpu, afterBar2PteRegionSize, 0, NV_TRUE, ADDR_FBMEM, NV_MEMORY_UNCACHED, MEMDESC_FLAGS_NONE), fail); - NV_ASSERT_OK_OR_GOTO(status, - memdescCreate(&pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_HEAP], - pGpu, gspHeapRegionSize, 0, NV_TRUE, - ADDR_FBMEM, NV_MEMORY_UNCACHED, MEMDESC_FLAGS_NONE), - fail); - NV_ASSERT_OK_OR_GOTO(status, - memdescCreate(&pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_NON_WPR], - pGpu, gspNonWprRegionSize, 0, NV_TRUE, - ADDR_FBMEM, NV_MEMORY_UNCACHED, MEMDESC_FLAGS_NONE), - fail); - NV_ASSERT_OK_OR_GOTO(status, - memdescCreate(&pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_VGA_WORKSPACE], - pGpu, pKernelGsp->pWprMeta->vgaWorkspaceSize, 0, NV_TRUE, - ADDR_FBMEM, NV_MEMORY_UNCACHED, MEMDESC_FLAGS_NONE), - fail); - // Describe memdesc of AFTER BAR2PTE, GSP HEAP, GSP NON WPR and VGA Workspace regions + // Describe memdesc of AFTER BAR2PTE region memdescDescribe(pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_AFTER_BAR2PTE], ADDR_FBMEM, afterBar2PteRegionStart, afterBar2PteRegionSize); - memdescDescribe(pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_HEAP], - ADDR_FBMEM, - gspHeapRegionStart, - gspHeapRegionSize); - memdescDescribe(pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_NON_WPR], - ADDR_FBMEM, - pKernelGsp->pWprMeta->gspFwRsvdStart, - gspNonWprRegionSize); - memdescDescribe(pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_VGA_WORKSPACE], - ADDR_FBMEM, - pKernelGsp->pWprMeta->vgaWorkspaceOffset, - pKernelGsp->pWprMeta->vgaWorkspaceSize); + + /* + * Calculate sysmem required to save all GSP allocations + * This is sum of GSP Heap, GSP non WPR and VGA workspace regions + * This will also include CBC region if the corresponding flag is set + * + * SYSMEM required for GSP allocations will be created and allocated + * into fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_HEAP] + * + * TODO: Query GSP for size of its allocation instead of this calculation + */ + size = (pKernelGsp->pWprMeta->gspFwWprStart - afterBar2PteRegionEnd) + // GSP Heap start to end of NON WPR region + pKernelGsp->pWprMeta->vgaWorkspaceSize; // VGA Workspace + + // Check if CBC region needs to be saved + if (GPU_GET_KERNEL_MEMORY_SYSTEM(pGpu)->bPreserveComptagBackingStoreOnSuspend) + { + NV0080_CTRL_FB_GET_COMPBIT_STORE_INFO_PARAMS compbitStoreInfoParams; + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + + // GET CBC region info from GSP + NV_ASSERT_OK_OR_GOTO(status, + pRmApi->Control(pRmApi, + pGpu->hInternalClient, + pGpu->hInternalDevice, + NV0080_CTRL_CMD_FB_GET_COMPBIT_STORE_INFO, + &compbitStoreInfoParams, + sizeof(compbitStoreInfoParams)), + fail); + + size += compbitStoreInfoParams.Size; + } + + // Create memdesc to save GSP allocations + NV_ASSERT_OK_OR_GOTO(status, + memdescCreate(&pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_HEAP], + pGpu, size, 0, NV_FALSE, + ADDR_SYSMEM, NV_MEMORY_UNCACHED, MEMDESC_FLAGS_NONE), + fail); + + // Allocate sysmem + status = memdescAlloc(pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_HEAP]); + if (status != NV_OK) + { + NV_ASSERT(status == NV_OK); + memdescDestroy(pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_HEAP]); + pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_HEAP] = NULL; + goto fail; + } + } // Allocate Vid Mem descriptor for RM INSTANCE memory, specific to VGA i.e. after BAR2PTE to end. else { - NvU64 fbAddrSpaceSize = _memmgrGetFbEndExcludingLostOnSuspendRegions(pGpu, pMemoryManager); - if (IS_VIRTUAL_WITH_SRIOV(pGpu)) { /* @@ -396,7 +392,7 @@ _memmgrAllocFbsrReservedRanges pKernelBus->virtualBar2[GPU_GFID_PF].pPTEMemDesc->Size; } - afterBar2PteRegionSize = fbAddrSpaceSize - afterBar2PteRegionStart; + afterBar2PteRegionSize = pMemoryManager->rsvdMemoryBase + pMemoryManager->rsvdMemorySize - afterBar2PteRegionStart; NV_ASSERT_OK_OR_GOTO(status, memdescCreate(&pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_AFTER_BAR2PTE], @@ -424,21 +420,9 @@ _memmgrAllocFbsrReservedRanges if (pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_HEAP] != NULL) memdescDestroy(pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_HEAP]); - if (pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_NON_WPR] != NULL) - memdescDestroy(pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_NON_WPR]); - - if (pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_WPR] != NULL) - memdescDestroy(pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_WPR]); - - if (pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_VGA_WORKSPACE] != NULL) - memdescDestroy(pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_VGA_WORKSPACE]); - pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_BEFORE_BAR2PTE] = NULL; pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_AFTER_BAR2PTE] = NULL; pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_HEAP] = NULL; - pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_NON_WPR] = NULL; - pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_WPR] = NULL; - pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_VGA_WORKSPACE] = NULL; return status; } @@ -480,45 +464,6 @@ _memmgrWalkHeap(OBJGPU *pGpu, MemoryManager *pMemoryManager, OBJFBSR *pFbsr) pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_BEFORE_BAR2PTE]); fbsrCopyMemoryMemDesc_HAL(pGpu, pFbsr, pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_AFTER_BAR2PTE]); - - if (IS_GSP_CLIENT(pGpu)) - { - // - // FBSR_OP_SIZE_BUF increments pFbsr->numRegions and updates pFbsr->Length to add sysmem for allocations - // FBSR_OP_SAVE sends memdesc info to GSP for CE save - // - // Handle both FBSR_OP_SIZE_BUF and FBSR_OP_SAVE for GSP NON WPR regions - // to allocate sysmem for the regions and to use CE to save/restore the region - // - fbsrCopyMemoryMemDesc_HAL(pGpu, pFbsr, - pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_NON_WPR]); - - // - // Handle only FBSR_OP_SIZE_BUF for GSP HEAP, GSP WPR and VGA workspace regions - // to allocate sysmem for these regions - // Use Bus copy to save/restore the GSP WPR region if allocated - // - if (pFbsr->op == FBSR_OP_SIZE_BUF) - { - // SysOffset for GSP memory allocations is the AFTER BAR2PTE region's sysoffset - pFbsr->gspFbAllocsSysOffset = pFbsr->length; - - fbsrCopyMemoryMemDesc_HAL(pGpu, pFbsr, - pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_HEAP]); - fbsrCopyMemoryMemDesc_HAL(pGpu, pFbsr, - pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_VGA_WORKSPACE]); - pFbsr->numRegions -= 2; - - // GSP WPR memdesc is not NULL when using unauthenticated GSP boot and bus copy - if (pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_WPR] != NULL) - { - fbsrCopyMemoryMemDesc_HAL(pGpu, pFbsr, - pMemoryManager->fbsrReservedRanges[FBSR_RESERVED_INST_MEMORY_GSP_WPR]); - pFbsr->numRegions--; - } - } - - } } else { @@ -603,40 +548,6 @@ memmgrAddMemNode_IMPL return rmStatus; } -NvBool -memmgrIsGspOwnedMemory_KERNEL -( - OBJGPU *pGpu, - MemoryManager *pMemoryManager, - MEMORY_DESCRIPTOR *pMemDesc -) -{ - - GspStaticConfigInfo *pGSCI = GPU_GET_GSP_STATIC_INFO(pGpu); - RmPhysAddr physAddr = memdescGetPhysAddr(pMemDesc, AT_GPU, 0); - NvU64 fbRegionSize = 0; - - NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_PARAMS *pFbRegionInfoParams = &pGSCI->fbRegionInfoParams; - NV2080_CTRL_CMD_FB_GET_FB_REGION_FB_REGION_INFO *pFbRegionInfo = NULL; - - // Return NV_TRUE if input MEMORY_DESCRIPTOR corresponds to any GSP managed regions - for (NvU32 i = 0; i < pFbRegionInfoParams->numFBRegions; i++) - { - pFbRegionInfo = &pFbRegionInfoParams->fbRegion[i]; - fbRegionSize = pFbRegionInfo->limit - pFbRegionInfo->base + 1; - - if ((pFbRegionInfo->base == physAddr) && (fbRegionSize == pMemDesc->Size)) - { - NV_PRINTF(LEVEL_INFO, - "Skipping GSP FB Region with addr 0x%llx and size 0x%llx\n", - physAddr, pMemDesc->Size); - return NV_TRUE; - } - } - - return NV_FALSE; -} - NV_STATUS memmgrAddMemNodes_IMPL ( @@ -665,18 +576,24 @@ memmgrAddMemNodes_IMPL // if (block->owner != NVOS32_BLOCK_TYPE_FREE && pAllocMemDesc != NULL) { + NV_PRINTF(LEVEL_INFO, + "pAllocMemDesc base 0x%llx (size 0x%llx) block owner 0x%X memdesc flags 0x%llx\n", + memdescGetPhysAddr(pAllocMemDesc, AT_GPU, 0), + pAllocMemDesc->Size, + block->owner, + pAllocMemDesc->_flags); + if (memdescGetFlag(pAllocMemDesc, MEMDESC_FLAGS_PRESERVE_CONTENT_ON_SUSPEND)) { bSaveNode = NV_TRUE; } - // TODO: Use LOST_ON_SUSPEND flag to skip GSP managed FB regions - else if ((block->owner == HEAP_OWNER_RM_RESERVED_REGION) && - !memmgrIsGspOwnedMemory_HAL(pGpu, pMemoryManager, pAllocMemDesc)) + else if (block->owner == HEAP_OWNER_RM_RESERVED_REGION) { - if (bSaveAllRmAllocations) + if (bSaveAllRmAllocations && (!memdescGetFlag(pAllocMemDesc, MEMDESC_FLAGS_LOST_ON_SUSPEND))) bSaveNode = NV_TRUE; } - else if ((block->owner == HEAP_OWNER_RM_CHANNEL_CTX_BUFFER) || (block->owner == HEAP_OWNER_RM_KERNEL_CLIENT)) + else if ((block->owner == HEAP_OWNER_RM_CHANNEL_CTX_BUFFER) || + (block->owner == HEAP_OWNER_RM_KERNEL_CLIENT)) { if (bSaveAllRmAllocations || (!memdescGetFlag(pAllocMemDesc, MEMDESC_FLAGS_LOST_ON_SUSPEND))) bSaveNode = NV_TRUE; @@ -686,6 +603,7 @@ memmgrAddMemNodes_IMPL ((memdescGetAddressSpace(pAllocMemDesc) == ADDR_FBMEM) || (memdescGetAddressSpace(pAllocMemDesc) == ADDR_SYSMEM))) { + NV_PRINTF(LEVEL_INFO, "pAllocMemDesc being saved\n"); NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, memmgrAddMemNode(pGpu, pMemoryManager, pAllocMemDesc, NV_FALSE), diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_regions.c b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_regions.c index f1520f214d..e06045e6fb 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_regions.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_regions.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -138,40 +138,6 @@ _memmgrShiftFbRegions pMemoryManager->Ram.numFBRegions++; } -/* - * Check if LostOnSuspend FB Regions are grouped together at the end of FB. - */ -static void -_memmgrCheckForLostOnSuspendContiguity -( - OBJGPU *pGpu, - MemoryManager *pMemoryManager, - NvU32 newRegionId -) -{ - NvU32 i = 0; - NvBool bLostOnSuspend = NV_FALSE; - - // - // Check to make sure all the regions after this new one has bLostOnSuspend set to NV_TRUE - // - for (i = 0; i < pMemoryManager->Ram.numFBRegions; i++) - { - if ((bLostOnSuspend == NV_FALSE) && (pMemoryManager->Ram.fbRegion[i].bLostOnSuspend == NV_TRUE)) - { - bLostOnSuspend = NV_TRUE; - continue; - } - - if ((bLostOnSuspend == NV_TRUE) && (pMemoryManager->Ram.fbRegion[i].bLostOnSuspend == NV_FALSE)) - { - NV_ASSERT(0); - break; - } - } - return; -} - /*! * @brief: Insert a region into FbRegions[] * @@ -301,8 +267,6 @@ memmgrInsertFbRegion_IMPL pMemoryManager->Ram.fbRegion[insertRegion-1].limit = pInsertRegion->base - 1; } - _memmgrCheckForLostOnSuspendContiguity(pGpu, pMemoryManager, insertRegion); - // Invalidate allocation priority list and regenerate it memmgrRegenerateFbRegionPriority(pGpu, pMemoryManager); @@ -408,6 +372,8 @@ memmgrRegionSetupCommon_IMPL for (i = 0; i < pMemoryManager->Ram.numFBRegions; i++) { + KernelMemorySystem *pKernelMemorySystem = GPU_GET_KERNEL_MEMORY_SYSTEM(pGpu); + // // In NUMA systems unreserved FB memory Block is onlined to the // kernel after aligning to memblock size. If we have leftover @@ -417,18 +383,36 @@ memmgrRegionSetupCommon_IMPL // NUMA size and the PMA size same. // if (osNumaOnliningEnabled(pGpu->pOsGpuInfo) && - (pMemoryManager->Ram.fbRegion[i].bRsvdRegion == NV_FALSE) && - (pMemoryManager->Ram.fbRegion[i].bInternalHeap == NV_FALSE)) + (pMemoryManager->Ram.fbRegion[i].base == KMEMSYS_FB_NUMA_ONLINE_BASE)) { NvU64 unusedBlockSize = 0; NvU64 memblockSize = 0; NvU64 regionSize = pMemoryManager->Ram.fbRegion[i].limit - pMemoryManager->Ram.fbRegion[i].base + 1; NvU64 usableBlockSize = regionSize - pMemoryManager->Ram.fbRegion[i].rsvdSize; - NV_ASSERT_OR_RETURN_VOID(osNumaMemblockSize(&memblockSize) == NV_OK); - unusedBlockSize = usableBlockSize - NV_ALIGN_DOWN64(usableBlockSize, memblockSize); + // + // If numaOnlineSize is 0, this indicates that the memory is not onlined yet and hence align + // the memoryblock with memblock size. (Currently this case gets executed in P9+GV100 config). + // + if (pKernelMemorySystem->numaOnlineSize == 0) + { + NV_ASSERT_OR_RETURN_VOID(osNumaMemblockSize(&memblockSize) == NV_OK); + unusedBlockSize = usableBlockSize - KMEMSYS_FB_NUMA_ONLINE_SIZE(usableBlockSize, memblockSize); + } + else + { + // + // If usableBlockSize is less than numaOnlineSize this indicates that a part + // of RM reserved memory is onlined to the kernel. In this case skip creating + // internal heap region. + // + NV_ASSERT_OR_RETURN_VOID(usableBlockSize >= pKernelMemorySystem->numaOnlineSize); + + unusedBlockSize = usableBlockSize - pKernelMemorySystem->numaOnlineSize; + } pMemoryManager->Ram.fbRegion[i].rsvdSize += unusedBlockSize; } + // // if the region has an RM reserved block and is not already reserved, subdivide it. // @@ -543,14 +527,17 @@ memmgrDumpFbRegions_IMPL pMemoryManager->Ram.fbRegion[i].base, pMemoryManager->Ram.fbRegion[i].limit, pMemoryManager->Ram.fbRegion[i].rsvdSize); - NV_PRINTF(LEVEL_INFO, "FB region %u - Reserved=%d, InternalHeap=%d, Compressed=%d, ISO=%d, Protected=%d, Performance=%u\n", + NV_PRINTF(LEVEL_INFO, "FB region %u - Reserved=%d, InternalHeap=%d, Compressed=%d, ISO=%d, Protected=%d, " + "Performance=%u, LostOnSuspend=%d, PreserveOnSuspend=%d\n", i, pMemoryManager->Ram.fbRegion[i].bRsvdRegion, pMemoryManager->Ram.fbRegion[i].bInternalHeap, pMemoryManager->Ram.fbRegion[i].bSupportCompressed, pMemoryManager->Ram.fbRegion[i].bSupportISO, pMemoryManager->Ram.fbRegion[i].bProtected, - pMemoryManager->Ram.fbRegion[i].performance); + pMemoryManager->Ram.fbRegion[i].performance, + pMemoryManager->Ram.fbRegion[i].bLostOnSuspend, + pMemoryManager->Ram.fbRegion[i].bPreserveOnSuspend); } } diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_vgpu.c b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_vgpu.c index 8d68ac22e8..c4adf2194f 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_vgpu.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_vgpu.c @@ -32,7 +32,7 @@ * @returns fb tax size */ NvU64 -memmgrGetFbTaxSize_VGPUSTUB +memmgrGetFbTaxSize_VF ( OBJGPU *pGpu, MemoryManager *pMemoryManager @@ -51,7 +51,7 @@ memmgrGetFbTaxSize_VGPUSTUB * @brief Fill in FB region information. */ NV_STATUS -memmgrInitBaseFbRegions_VGPUSTUB +memmgrInitBaseFbRegions_VF ( OBJGPU *pGpu, MemoryManager *pMemoryManager @@ -122,7 +122,7 @@ memmgrInitBaseFbRegions_VGPUSTUB * @brief Get the required heap space for GR module */ NvU32 -memmgrGetGrHeapReservationSize_VGPUSTUB +memmgrGetGrHeapReservationSize_VF ( OBJGPU *pGpu, MemoryManager *pMemoryManager diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/mem_utils.c b/src/nvidia/src/kernel/gpu/mem_mgr/mem_utils.c index 243895df4f..a1e00a97fb 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/mem_utils.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/mem_utils.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -66,7 +66,15 @@ memmgrGetMemTransferType OBJGPU *pGpu = ENG_GET_GPU(pMemoryManager); KernelBus *pKernelBus = GPU_GET_KERNEL_BUS(pGpu); - if (flags & TRANSFER_FLAGS_PREFER_CE) + if ((pDst == NULL || memdescGetAddressSpace(pDst->pMemDesc) == ADDR_SYSMEM) && + (pSrc == NULL || memdescGetAddressSpace(pSrc->pMemDesc) == ADDR_SYSMEM)) + { + // + // If the operation only touches sysmem, use processor copy + // + transferType = TRANSFER_TYPE_PROCESSOR; + } + else if (flags & TRANSFER_FLAGS_PREFER_CE) { if (IS_SIMULATION(pGpu) && pSrc != NULL) { @@ -78,21 +86,25 @@ memmgrGetMemTransferType return TRANSFER_TYPE_BAR0; } - if (pMemoryManager->pCeUtils != NULL) + CeUtils *pCeUtils = pMemoryManager->pCeUtils; + + if (pCeUtils != NULL) { - return TRANSFER_TYPE_CE; + NvBool bDstCompr = pDst != NULL && memmgrIsKind_HAL(pMemoryManager, FB_IS_KIND_COMPRESSIBLE, + memdescGetPteKind(pDst->pMemDesc)); + NvBool bSrcCompr = pSrc != NULL && memmgrIsKind_HAL(pMemoryManager, FB_IS_KIND_COMPRESSIBLE, + memdescGetPteKind(pSrc->pMemDesc)); + if (!(bSrcCompr || bDstCompr) || pCeUtils->bUseVasForCeCopy) + { + return TRANSFER_TYPE_CE; + } } - NV_PRINTF(LEVEL_WARNING, "Can't copy using CE, falling back to other methods\n"); - } - - if ((pDst == NULL || memdescGetAddressSpace(pDst->pMemDesc) == ADDR_SYSMEM) && - (pSrc == NULL || memdescGetAddressSpace(pSrc->pMemDesc) == ADDR_SYSMEM)) - { - // - // If the operation only touches sysmem, use processor copy - // - transferType = TRANSFER_TYPE_PROCESSOR; + // On Emulation we may lack CE support so preventing excessive debug spew. + if (!IS_EMULATION(pGpu)) + { + NV_PRINTF(LEVEL_WARNING, "Can't copy using CE, falling back to other methods\n"); + } } else if (kbusIsBarAccessBlocked(pKernelBus) && (!gpuIsCCDevToolsModeEnabled(pGpu) || !(flags & TRANSFER_FLAGS_PREFER_PROCESSOR))) @@ -140,11 +152,11 @@ _memmgrAllocAndMapSurface NV_ASSERT_OK_OR_RETURN( memdescCreate(ppMemDesc, pGpu, size, RM_PAGE_SIZE, NV_TRUE, - ADDR_SYSMEM, NV_MEMORY_UNCACHED, flags)); + ADDR_SYSMEM, NV_MEMORY_CACHED, flags)); - memdescTagAlloc(status, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_77, + memdescTagAlloc(status, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_77, (*ppMemDesc)); - NV_ASSERT_OK_OR_GOTO(status, status, failed); + NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, status, failed); NV_ASSERT_OK_OR_GOTO(status, memdescMapOld(*ppMemDesc, 0, size, NV_TRUE, NV_PROTECT_READ_WRITE, @@ -212,7 +224,7 @@ _memmgrMemReadOrWriteWithGsp return NV_ERR_NOT_SUPPORTED; // Allocate and map the staging buffer - NV_ASSERT_OK_OR_RETURN( + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, _memmgrAllocAndMapSurface(pGpu, size, &pStagingBuf, &pStagingBufMap, &pStagingBufPriv)); @@ -355,7 +367,7 @@ _memmgrMemcpyWithGsp } // Allocate and map the bounce buffer - NV_ASSERT_OK_OR_RETURN( + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, _memmgrAllocAndMapSurface(pGpu, size, &pStagingBuf, &pStagingBufMap, &pStagingBufPriv)); @@ -549,8 +561,6 @@ memmgrMemCopyWithTransferType ) { OBJGPU *pGpu = ENG_GET_GPU(pMemoryManager); - NvU8 *pSrc; - NvU8 *pDst; // Sanitize the input NV_ASSERT_OK_OR_RETURN(memmgrCheckSurfaceBounds(pDstInfo, size)); @@ -561,19 +571,20 @@ memmgrMemCopyWithTransferType switch (transferType) { case TRANSFER_TYPE_PROCESSOR: - pDst = memdescMapInternal(pGpu, pDstInfo->pMemDesc, TRANSFER_FLAGS_NONE); - NV_ASSERT_OR_RETURN(pDst != NULL, NV_ERR_INSUFFICIENT_RESOURCES); - pSrc = memdescMapInternal(pGpu, pSrcInfo->pMemDesc, TRANSFER_FLAGS_NONE); - if (pSrc == NULL) { - memdescUnmapInternal(pGpu, pDstInfo->pMemDesc, 0); - NV_ASSERT_OR_RETURN(0, NV_ERR_INSUFFICIENT_RESOURCES); - } + NvU8 *pDst = memmgrMemBeginTransfer(pMemoryManager, pDstInfo, size, flags); + NvU8 *pSrc = memmgrMemBeginTransfer(pMemoryManager, pSrcInfo, size, flags); - portMemCopy(pDst + pDstInfo->offset, size, pSrc + pSrcInfo->offset, size); + if (pDst != NULL && pSrc != NULL) + { + portMemCopy(pDst, size, pSrc, size); + } + + memmgrMemEndTransfer(pMemoryManager, pSrcInfo, size, flags); + memmgrMemEndTransfer(pMemoryManager, pDstInfo, size, flags); - memdescUnmapInternal(pGpu, pSrcInfo->pMemDesc, TRANSFER_FLAGS_NONE); - memdescUnmapInternal(pGpu, pDstInfo->pMemDesc, flags); + NV_CHECK_OR_RETURN(LEVEL_ERROR, pDst != NULL && pSrc != NULL, NV_ERR_INSUFFICIENT_RESOURCES); + } break; case TRANSFER_TYPE_GSP_DMA: if (IS_GSP_CLIENT(pGpu)) @@ -631,8 +642,7 @@ _memmgrMemReadOrWriteUsingStagingBuffer TRANSFER_SURFACE *pDst = bRead ? &staging : pAlloc; NV_STATUS status = NV_OK; - - NV_ASSERT_OK_OR_RETURN( + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, _memmgrAllocAndMapSurface(ENG_GET_GPU(pMemoryManager), size, &pStagingBuf, &pStagingBufMap, &pStagingBufPriv)); staging.pMemDesc = pStagingBuf; @@ -677,7 +687,6 @@ memmgrMemSetWithTransferType ) { OBJGPU *pGpu = ENG_GET_GPU(pMemoryManager); - NvU8 *pDst; // Sanitize the input NV_ASSERT_OK_OR_RETURN(memmgrCheckSurfaceBounds(pDstInfo, size)); @@ -685,12 +694,12 @@ memmgrMemSetWithTransferType switch (transferType) { case TRANSFER_TYPE_PROCESSOR: - pDst = memdescMapInternal(pGpu, pDstInfo->pMemDesc, TRANSFER_FLAGS_NONE); - NV_ASSERT_OR_RETURN(pDst != NULL, NV_ERR_INSUFFICIENT_RESOURCES); - - portMemSet(pDst + pDstInfo->offset, value, size); - - memdescUnmapInternal(pGpu, pDstInfo->pMemDesc, flags); + { + NvU8 *pDst = memmgrMemBeginTransfer(pMemoryManager, pDstInfo, size, flags); + NV_CHECK_OR_RETURN(LEVEL_ERROR, pDst != NULL, NV_ERR_INSUFFICIENT_RESOURCES); + portMemSet(pDst, value, size); + memmgrMemEndTransfer(pMemoryManager, pDstInfo, size, flags); + } break; case TRANSFER_TYPE_GSP_DMA: if (IS_GSP_CLIENT(pGpu)) @@ -730,89 +739,6 @@ memmgrMemSetWithTransferType return NV_OK; } -/*! - * @brief This function is used to map the appropriate memory descriptor, - * copy the memory from the given buffer, and then unmap. - * - * @param[in] pMemDesc Memory descriptor of buffer to write - * @param[in] pBuf Buffer allocated by caller - * @param[in] offset Offset of buffer to write - * @param[in] size Size in bytes of the buffer - * @param[in] flags Flags - */ -static NV_STATUS -memmgrMemWriteMapAndCopy -( - MemoryManager *pMemoryManager, - MEMORY_DESCRIPTOR *pMemDesc, - void *pBuf, - NvU64 offset, - NvU64 size, - NvU32 flags -) -{ - NvU8 *pDst = NULL; - OBJGPU *pGpu = ENG_GET_GPU(pMemoryManager); - - pDst = memdescMapInternal(pGpu, pMemDesc, TRANSFER_FLAGS_NONE); - NV_CHECK_OR_RETURN(LEVEL_SILENT, pDst != NULL, NV_ERR_INSUFFICIENT_RESOURCES); - - portMemCopy(pDst + offset, size, pBuf, size); - memdescUnmapInternal(pGpu, pMemDesc, flags); - - return NV_OK; -} - -/*! - * @brief This function is used for writing data placed in a caller passed buffer - * to a given memory region while only mapping regions as large as the given - * block size. - * - * @param[in] pMemDesc Memory descriptor of buffer to write - * @param[in] pBuf Buffer allocated by caller - * @param[in] baseOffset Offset of entire buffer to write - * @param[in] size Size in bytes of the buffer - * @param[in] flags Flags - * @param[in] blockSize Maximum size of a mapping to use - */ -static NV_STATUS -memmgrMemWriteInBlocks -( - MemoryManager *pMemoryManager, - MEMORY_DESCRIPTOR *pMemDesc, - void *pBuf, - NvU64 baseOffset, - NvU64 size, - NvU32 flags, - NvU32 blockSize -) -{ - NV_STATUS status = NV_OK; - OBJGPU *pGpu = ENG_GET_GPU(pMemoryManager); - NvU64 remaining = size; - NvU64 offset = 0; - - while ((remaining > 0) && (status == NV_OK)) - { - MEMORY_DESCRIPTOR *pSubMemDesc = NULL; - NvU32 mapSize = NV_MIN(blockSize, remaining); - - NV_CHECK_OK_OR_RETURN(LEVEL_SILENT, memdescCreateSubMem(&pSubMemDesc, pMemDesc, pGpu, offset + baseOffset, mapSize)); - - // Set the offset to 0, as the sub descriptor already starts at the offset - status = memmgrMemWriteMapAndCopy(pMemoryManager, pSubMemDesc, (NvU8 *)pBuf + offset, - 0, mapSize, flags); - - memdescFree(pSubMemDesc); - memdescDestroy(pSubMemDesc); - - offset += mapSize; - remaining -= mapSize; - } - - return status; -} - /*! * @brief This function is used for writing data placed in a caller passed buffer * to a given memory region using the specified memory transfer technique @@ -850,18 +776,18 @@ memmgrMemWriteWithTransferType switch (transferType) { case TRANSFER_TYPE_PROCESSOR: - if (memmgrMemWriteMapAndCopy(pMemoryManager, pDstInfo->pMemDesc, pBuf, pDstInfo->offset, size, flags) != NV_OK) { - // If we fail to map a block large enough for the entire transfer, split up the mapping. - NV_ASSERT_OK_OR_RETURN(memmgrMemWriteInBlocks(pMemoryManager, pDstInfo->pMemDesc, pBuf, - pDstInfo->offset, size, flags, MEMORY_COPY_BLOCK_SIZE)); + NvU8 *pDst = memmgrMemBeginTransfer(pMemoryManager, pDstInfo, size, flags); + NV_CHECK_OR_RETURN(LEVEL_ERROR, pDst != NULL, NV_ERR_INSUFFICIENT_RESOURCES); + portMemCopy(pDst, size, pBuf, size); + memmgrMemEndTransfer(pMemoryManager, pDstInfo, size, flags); } break; case TRANSFER_TYPE_GSP_DMA: if (IS_GSP_CLIENT(pGpu)) { NV_PRINTF(LEVEL_INFO, "Calling GSP DMA task\n"); - NV_ASSERT_OK_OR_RETURN( + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, _memmgrMemReadOrWriteWithGsp(pGpu, pDstInfo, pBuf, size, NV_FALSE /* bRead */)); } @@ -873,7 +799,7 @@ memmgrMemWriteWithTransferType case TRANSFER_TYPE_CE: case TRANSFER_TYPE_CE_PRI: case TRANSFER_TYPE_BAR0: - NV_ASSERT_OK_OR_RETURN( + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, _memmgrMemReadOrWriteUsingStagingBuffer(pMemoryManager, pDstInfo, pBuf, size, transferType, NV_FALSE /* bRead */)); break; @@ -905,10 +831,8 @@ memmgrMemReadWithTransferType ) { OBJGPU *pGpu = ENG_GET_GPU(pMemoryManager); - NvU8 *pSrc; NvU8 *pMapping = memdescGetKernelMapping(pSrcInfo->pMemDesc); - // Sanitize the input NV_ASSERT_OK_OR_RETURN(memmgrCheckSurfaceBounds(pSrcInfo, size)); NV_ASSERT_OR_RETURN(pBuf != NULL, NV_ERR_INVALID_ARGUMENT); @@ -922,17 +846,17 @@ memmgrMemReadWithTransferType switch (transferType) { case TRANSFER_TYPE_PROCESSOR: - pSrc = memdescMapInternal(pGpu, pSrcInfo->pMemDesc, TRANSFER_FLAGS_NONE); - NV_ASSERT_OR_RETURN(pSrc != NULL, NV_ERR_INSUFFICIENT_RESOURCES); - - portMemCopy(pBuf, size, pSrc + pSrcInfo->offset, size); - - memdescUnmapInternal(pGpu, pSrcInfo->pMemDesc, 0); + { + NvU8 *pSrc = memmgrMemBeginTransfer(pMemoryManager, pSrcInfo, size, flags); + NV_CHECK_OR_RETURN(LEVEL_INFO, pSrc != NULL, NV_ERR_INSUFFICIENT_RESOURCES); + portMemCopy(pBuf, size, pSrc, size); + memmgrMemEndTransfer(pMemoryManager, pSrcInfo, size, flags); + } break; case TRANSFER_TYPE_GSP_DMA: if (IS_GSP_CLIENT(pGpu)) { - NV_ASSERT_OK_OR_RETURN( + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, _memmgrMemReadOrWriteWithGsp(pGpu, pSrcInfo, pBuf, size, NV_TRUE /* bRead */)); } @@ -944,9 +868,9 @@ memmgrMemReadWithTransferType case TRANSFER_TYPE_CE: case TRANSFER_TYPE_CE_PRI: case TRANSFER_TYPE_BAR0: - NV_ASSERT_OK_OR_RETURN( - _memmgrMemReadOrWriteUsingStagingBuffer(pMemoryManager, pSrcInfo, pBuf, size, - transferType, NV_TRUE /* bRead */)); + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + _memmgrMemReadOrWriteUsingStagingBuffer(pMemoryManager, pSrcInfo, pBuf, size, + transferType, NV_TRUE /* bRead */)); break; } @@ -1076,6 +1000,66 @@ memmgrMemUtilsGetMemDescFromHandle_IMPL return pMemory->pMemDesc; } +/*! + * @brief This function is used for write a value placed in a caller passed buffer + * to a given memory region while only mapping regions as large as the given + * block size. + * + * @param[in] pMemDesc Memory descriptor of buffer to write + * @param[in] value Value to be written + * @param[in] baseOffset Offset of entire buffer to write + * @param[in] size Size in bytes of the buffer + * @param[in] flags Flags + * @param[in] blockSize Maximum size of a mapping to use + */ +NV_STATUS +memmgrMemsetInBlocks_IMPL +( + MemoryManager *pMemoryManager, + MEMORY_DESCRIPTOR *pMemDesc, + NvU32 value, + NvU64 baseOffset, + NvU64 size, + NvU32 flags, + NvU32 blockSize +) +{ + NV_STATUS status = NV_OK; + OBJGPU *pGpu = ENG_GET_GPU(pMemoryManager); + NvU64 remaining = size; + NvU64 offset = 0; + + if (blockSize == 0) + { + blockSize = MEMORY_COPY_BLOCK_SIZE; + } + + while ((remaining > 0) && (status == NV_OK)) + { + MEMORY_DESCRIPTOR *pSubMemDesc = NULL; + NvU32 mapSize = NV_MIN(blockSize, remaining); + TRANSFER_SURFACE surf = {0}; + + NV_CHECK_OK_OR_RETURN(LEVEL_SILENT, memdescCreateSubMem(&pSubMemDesc, pMemDesc, pGpu, offset + baseOffset, mapSize)); + + surf.pMemDesc = pSubMemDesc; + surf.offset = 0; + + NV_ASSERT_OK_OR_RETURN( + memmgrMemSet(pMemoryManager, &surf, value, + pSubMemDesc->Size, + flags)); + + memdescFree(pSubMemDesc); + memdescDestroy(pSubMemDesc); + + offset += mapSize; + remaining -= mapSize; + } + + return status; +} + /*! * @brief This function is used for copying data b/w two memory regions * Both memory regions can be in the same aperture of different apertures @@ -1152,6 +1136,68 @@ memmgrMemDescMemSet_IMPL transferType, flags); } +static NV_STATUS +memmgrMemReadOrWriteInBlocks +( + MemoryManager *pMemoryManager, + TRANSFER_SURFACE *pDstInfo, + void *pBuf, + NvU64 size, + TRANSFER_TYPE transferType, + NvU32 flags, + NvBool bRead +) +{ + NvBool bCreateSubMemDesc = (transferType == TRANSFER_TYPE_PROCESSOR) && + !(flags & TRANSFER_FLAGS_USE_BAR1); + NvU64 remainingSize = size; + NvU64 baseOffset = pDstInfo->offset; + MEMORY_DESCRIPTOR *pMemDesc = pDstInfo->pMemDesc; + NvU64 offset = 0; + NV_STATUS status = NV_OK; + + while ((remainingSize > 0) && (status == NV_OK)) + { + MEMORY_DESCRIPTOR *pSubMemDesc = NULL; + NvU64 copySize = NV_MIN(MEMORY_COPY_BLOCK_SIZE, remainingSize); + + if (bCreateSubMemDesc) + { + NV_ASSERT_OK_OR_RETURN( + memdescCreateSubMem(&pSubMemDesc, pMemDesc, pMemDesc->pGpu, offset + baseOffset, copySize)); + pDstInfo->pMemDesc = pSubMemDesc; + pDstInfo->offset = 0; + } + else + { + pDstInfo->offset = offset + baseOffset; + } + + if (bRead) + { + status = memmgrMemReadWithTransferType(pMemoryManager, pDstInfo, (NvU8 *)pBuf + offset, + copySize, transferType, flags); + } + else + { + status = memmgrMemWriteWithTransferType(pMemoryManager, pDstInfo, (NvU8 *)pBuf + offset, + copySize, transferType, flags); + } + NV_ASSERT_OK(status); + + if (bCreateSubMemDesc) + { + memdescFree(pSubMemDesc); + memdescDestroy(pSubMemDesc); + } + + offset += copySize; + remainingSize -= copySize; + } + + return status; +} + /*! * @brief This function is used for writing data placed in a user buffer * to a given memory region @@ -1174,8 +1220,13 @@ memmgrMemWrite_IMPL TRANSFER_TYPE transferType = memmgrGetMemTransferType(pMemoryManager, pDstInfo, NULL, flags); - return memmgrMemWriteWithTransferType(pMemoryManager, pDstInfo, pBuf, - size, transferType, flags); + NV_STATUS status = memmgrMemWriteWithTransferType(pMemoryManager, pDstInfo, pBuf, + size, transferType, flags); + if (status == NV_OK) + return NV_OK; + + return memmgrMemReadOrWriteInBlocks(pMemoryManager, pDstInfo, pBuf, + size, transferType, flags, NV_FALSE); } /*! @@ -1200,8 +1251,13 @@ memmgrMemRead_IMPL TRANSFER_TYPE transferType = memmgrGetMemTransferType(pMemoryManager, NULL, pSrcInfo, flags); - return memmgrMemReadWithTransferType(pMemoryManager, pSrcInfo, pBuf, - size, transferType, flags); + NV_STATUS status = memmgrMemReadWithTransferType(pMemoryManager, pSrcInfo, pBuf, + size, transferType, flags); + if (status == NV_OK) + return NV_OK; + + return memmgrMemReadOrWriteInBlocks(pMemoryManager, pSrcInfo, pBuf, + size, transferType, flags, NV_TRUE); } /*! @@ -1248,12 +1304,12 @@ memmgrMemBeginTransfer_IMPL protect = NV_PROTECT_WRITEABLE; } - NV_ASSERT_OR_RETURN(memdescMap(pMemDesc, offset, memSz, NV_TRUE, protect, + NV_CHECK_OR_RETURN(LEVEL_ERROR, memdescMap(pMemDesc, offset, memSz, NV_TRUE, protect, (NvP64*) &pPtr, &pPriv) == NV_OK, NULL); memdescSetKernelMappingPriv(pMemDesc, pPriv); break; } - NV_ASSERT_OR_RETURN((pPtr = memdescMapInternal(pGpu, pMemDesc, flags)) != NULL, NULL); + NV_CHECK_OR_RETURN(LEVEL_INFO, (pPtr = memdescMapInternal(pGpu, pMemDesc, flags)) != NULL, NULL); pPtr = &pPtr[offset]; break; diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/phys_mem_allocator/phys_mem_allocator.c b/src/nvidia/src/kernel/gpu/mem_mgr/phys_mem_allocator/phys_mem_allocator.c index c7bc69b577..62dab26939 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/phys_mem_allocator/phys_mem_allocator.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/phys_mem_allocator/phys_mem_allocator.c @@ -40,7 +40,10 @@ #if !defined(SRT_BUILD) // These files are not found on SRT builds #include "os/os.h" +#define PMA_DEBUG 1 #else +// disable PMA debug prints on SRTs to not bloat the logs +#define PMA_DEBUG 0 NV_STATUS pmaNumaAllocate ( PMA *pPma, @@ -561,6 +564,7 @@ pmaAllocatePages NvS32 regionList[PMA_REGION_SIZE]; NV_STATUS status, prediction; NvU32 flags, evictFlag, contigFlag, persistFlag, alignFlag, pinFlag, rangeFlag, blacklistOffFlag, partialFlag, skipScrubFlag, reverseFlag; + NvU32 regId, regionIdx; NvU64 numPagesAllocatedThisTime, numPagesLeftToAllocate, numPagesAllocatedSoFar; NvU64 addrBase, addrLimit; @@ -574,7 +578,8 @@ pmaAllocatePages scanFunc useFunc; PMA_PAGESTATUS pinOption; NvU64 alignment = pageSize; - NvU32 framesPerPage = (NvU32)(pageSize >> PMA_PAGE_SHIFT); + NvU32 framesPerPage; + NvU64 numFramesToAllocateTotal; // // A boolean indicating if we should try to evict. We at most try eviction once per call @@ -583,8 +588,6 @@ pmaAllocatePages NvBool tryEvict = NV_TRUE; NvBool tryAlloc = NV_TRUE; - const NvU64 numFramesToAllocateTotal = framesPerPage * allocationCount; - if (pPma == NULL || pPages == NULL || allocationCount == 0 || (pageSize != _PMA_64KB && pageSize != _PMA_128KB && pageSize != _PMA_2MB && pageSize != _PMA_512MB) || allocationOptions == NULL) @@ -622,6 +625,7 @@ pmaAllocatePages NV_PRINTF(LEVEL_ERROR, "Reverse allocation not supported on NUMA.\n"); return NV_ERR_INVALID_ARGUMENT; } + return pmaNumaAllocate(pPma, allocationCount, pageSize, allocationOptions, pPages); } @@ -688,6 +692,9 @@ pmaAllocatePages } } + framesPerPage = (NvU32)(pageSize >> PMA_PAGE_SHIFT); + numFramesToAllocateTotal = framesPerPage * allocationCount; + pinOption = pinFlag ? STATE_PIN : STATE_UNPIN; pinOption |= persistFlag ? ATTRIB_PERSISTENT : 0; @@ -723,10 +730,12 @@ pmaAllocatePages // after checking the scrubber so any pages allocated so far are not guaranteed // to be there any more. Restart from scratch. // +#if PMA_DEBUG NV_PRINTF(LEVEL_INFO, "Attempt %s allocation of 0x%llx pages of size 0x%llx " "(0x%x frames per page)\n", contigFlag ? "contiguous" : "discontiguous", (NvU64)allocationCount, pageSize, framesPerPage); +#endif // Check if scrubbing is done before allocating each time before we retry if (bScrubOnFree) @@ -1067,9 +1076,12 @@ pmaAllocatePages addrBase = pPma->pRegDescriptors[regId]->base; frameBase = PMA_ADDR2FRAME(pPages[0], addrBase); +#if PMA_DEBUG + NV_PRINTF(LEVEL_INFO, "Successfully allocated frames 0x%llx through 0x%llx\n", frameBase, frameBase + numFramesAllocated - 1); +#endif pPma->pMapInfo->pmaMapChangeBlockStateAttrib(pMap, frameBase, numPagesAllocatedSoFar * framesPerPage, pinOption, MAP_MASK); @@ -1085,9 +1097,11 @@ pmaAllocatePages if (allocatedRegionEnd < blacklistOffAddrEnd) _pmaReallocBlacklistPages(pPma, regId, allocatedRegionEnd, (blacklistOffAddrEnd - allocatedRegionEnd)); } + } else { +#if PMA_DEBUG NvU64 frameRangeStart = 0; NvU64 nextExpectedFrame = 0; NvU32 frameRangeRegId = 0; @@ -1098,12 +1112,15 @@ pmaAllocatePages (void)frameRangeRegId; NV_PRINTF(LEVEL_INFO, "Successfully allocated frames:\n"); +#endif for (i = 0; i < numPagesAllocatedSoFar; i++) { regId = findRegionID(pPma, pPages[i]); pMap = pPma->pRegions[regId]; addrBase = pPma->pRegDescriptors[regId]->base; + +#if PMA_DEBUG frameBase = PMA_ADDR2FRAME(pPages[i], addrBase); // Print out contiguous frames in the same NV_PRINTF @@ -1124,6 +1141,7 @@ pmaAllocatePages frameRangeRegId = regId; } nextExpectedFrame = reverseFlag ? frameBase - framesPerPage : frameBase + framesPerPage; +#endif pPma->pMapInfo->pmaMapChangePageStateAttrib(pMap, PMA_ADDR2FRAME(pPages[i], addrBase), pageSize, pinOption, MAP_MASK); @@ -1132,11 +1150,13 @@ pmaAllocatePages pPma->pStatsUpdateCb(pPma->pStatsUpdateCtx, pPma->pmaStats.numFreeFrames); - // Break in frame range detected - NV_PRINTF(LEVEL_INFO, "0x%llx through 0x%llx region %d \n", +#if PMA_DEBUG + // Break in frame range detected + NV_PRINTF(LEVEL_INFO, "0x%llx through 0x%llx region %d \n", reverseFlag ? nextExpectedFrame + framesPerPage : frameRangeStart, reverseFlag ? frameRangeStart + framesPerPage - 1 : nextExpectedFrame - 1, frameRangeRegId); +#endif } } @@ -1312,8 +1332,6 @@ pmaFreePages return; } - framesPerPage = size >> PMA_PAGE_SHIFT; - // Check if any scrubbing is done before we actually free if (bNeedScrub) { @@ -1340,6 +1358,8 @@ pmaFreePages portSyncSpinlockAcquire(pPma->pPmaLock); + framesPerPage = size >> PMA_PAGE_SHIFT; + for (i = 0; i < pageCount; i++) { regId = findRegionID(pPma, pPages[i]); @@ -1369,17 +1389,18 @@ pmaFreePages PSCRUB_NODE pPmaScrubList = NULL; NvU64 count; if (scrubSubmitPages(pPma->pScrubObj, size, pPages, pageCount, - &pPmaScrubList, &count) != NV_OK) + &pPmaScrubList, &count) == NV_OK) { - portAtomicSetSize(&pPma->scrubberValid, PMA_SCRUBBER_INVALID); - goto exit; + if (count > 0) + { + _pmaClearScrubBit(pPma, pPmaScrubList, count); + } } - - if (count > 0) + else { - _pmaClearScrubBit(pPma, pPmaScrubList, count); + portAtomicSetSize(&pPma->scrubberValid, PMA_SCRUBBER_INVALID); } -exit: + // Free the actual list, although allocated by objscrub portMemFree(pPmaScrubList); diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/sec2_utils.c b/src/nvidia/src/kernel/gpu/mem_mgr/sec2_utils.c index 61fcf1545c..21db85727d 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/sec2_utils.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/sec2_utils.c @@ -221,8 +221,6 @@ sec2utilsConstruct_IMPL pChannel->type = SWL_SCRUBBER_CHANNEL; pChannel->engineType = RM_ENGINE_TYPE_SEC2; - pChannel->bSecure = NV_TRUE; - // Detect if we can enable fast scrub on this channel NV_ASSERT_OK_OR_GOTO(status, _sec2GetClass(pGpu, &pSec2Utils->sec2Class), free_client); pChannel->sec2Class = pSec2Utils->sec2Class; diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/vaspace_api.c b/src/nvidia/src/kernel/gpu/mem_mgr/vaspace_api.c index c41c5bb690..0661117770 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/vaspace_api.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/vaspace_api.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2012-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2012-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -99,7 +99,7 @@ vaspaceapiConstruct_IMPL } if (gpuIsSriovEnabled(pGpu)) - NV_ASSERT_OK_OR_RETURN(vgpuGetCallingContextGfid(pGpu, &gfid)); + NV_ASSERT_OK_OR_RETURN(vgpuGetCallingContextGfid(pGpu, &gfid)); pNvVASpaceAllocParams = pParams->pAllocParams; allocFlags = pNvVASpaceAllocParams->flags; @@ -365,7 +365,7 @@ vaspaceapiConstruct_IMPL NV_PRINTF(LEVEL_ERROR, "Could not construct VA space. Status %x\n", status); pVAS = NULL; - NV_ASSERT_OR_GOTO(0, done); + goto done; } } diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/virt_mem_allocator_vgpu.c b/src/nvidia/src/kernel/gpu/mem_mgr/virt_mem_allocator_vgpu.c index c5f7c9ab81..c61ff7cfa7 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/virt_mem_allocator_vgpu.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/virt_mem_allocator_vgpu.c @@ -34,7 +34,7 @@ #include "gpu/device/device.h" NV_STATUS -dmaConstructHal_VGPUSTUB(OBJGPU *pGpu, VirtMemAllocator *pDma) +dmaConstructHal_VF(OBJGPU *pGpu, VirtMemAllocator *pDma) { return NV_OK; } diff --git a/src/nvidia/src/kernel/gpu/mem_sys/arch/turing/kern_mem_sys_tu102.c b/src/nvidia/src/kernel/gpu/mem_sys/arch/turing/kern_mem_sys_tu102.c index e08a04d6cd..9dd36abfea 100644 --- a/src/nvidia/src/kernel/gpu/mem_sys/arch/turing/kern_mem_sys_tu102.c +++ b/src/nvidia/src/kernel/gpu/mem_sys/arch/turing/kern_mem_sys_tu102.c @@ -129,6 +129,19 @@ _kmemsysReadRegAndMaskPriError return regVal; } +NvU32 +kmemsysGetL2EccDedCountRegAddr_TU102 +( + OBJGPU *pGpu, + KernelMemorySystem *pKernelMemorySystem, + NvU32 fbpa, + NvU32 subp +) +{ + return (NV_PLTCG_LTC0_LTS0_L2_CACHE_ECC_UNCORRECTED_ERR_COUNT + + (fbpa * NV_LTC_PRI_STRIDE) + (subp * NV_LTS_PRI_STRIDE)); +} + void kmemsysGetEccCounts_TU102 ( @@ -141,6 +154,7 @@ kmemsysGetEccCounts_TU102 NvU32 maxFbpas = kmemsysGetMaxFbpas_HAL(pGpu, pKernelMemorySystem); NvU32 dedCountSize = kmemsysGetEccDedCountSize_HAL(pGpu, pKernelMemorySystem); NvU32 fbpaDedCountRegAddr = 0; + NvU32 ltcDedCountRegAddr = 0; NvU32 regVal; if (dramCount == NULL || ltcCount == NULL) @@ -160,8 +174,9 @@ kmemsysGetEccCounts_TU102 *dramCount += _kmemsysReadRegAndMaskPriError(pGpu, fbpaDedCountRegAddr); // LTC count read - regVal = _kmemsysReadRegAndMaskPriError(pGpu, NV_PLTCG_LTC0_LTS0_L2_CACHE_ECC_UNCORRECTED_ERR_COUNT + - (i * NV_LTC_PRI_STRIDE) + (j * NV_LTS_PRI_STRIDE)); + + ltcDedCountRegAddr = kmemsysGetL2EccDedCountRegAddr_HAL(pGpu, pKernelMemorySystem, i, j); + regVal = _kmemsysReadRegAndMaskPriError(pGpu, ltcDedCountRegAddr); *ltcCount += DRF_VAL(_PLTCG_LTC0_LTS0, _L2_CACHE_ECC, _UNCORRECTED_ERR_COUNT_UNIQUE, regVal); } } diff --git a/src/nvidia/src/kernel/gpu/mem_sys/kern_mem_sys.c b/src/nvidia/src/kernel/gpu/mem_sys/kern_mem_sys.c index 18e155ffbc..2f5a8c747a 100644 --- a/src/nvidia/src/kernel/gpu/mem_sys/kern_mem_sys.c +++ b/src/nvidia/src/kernel/gpu/mem_sys/kern_mem_sys.c @@ -85,6 +85,44 @@ kmemsysConstructEngine_IMPL return NV_OK; } +NV_STATUS +kmemsysStatePreInitLocked_IMPL +( + OBJGPU *pGpu, + KernelMemorySystem *pKernelMemorySystem +) +{ + NV_STATUS status = NV_OK; + MEMORY_SYSTEM_STATIC_CONFIG *pStaticConfig; + + pStaticConfig = + portMemAllocNonPaged(sizeof(*pStaticConfig)); + NV_ASSERT_TRUE_OR_GOTO(status, + (pStaticConfig != NULL), + NV_ERR_INSUFFICIENT_RESOURCES, + exit); + portMemSet(pStaticConfig, 0, sizeof(*pStaticConfig)); + // + // Assign the pointer immediately after allocating to make sure it will + // always be freed + // + pKernelMemorySystem->pStaticConfig = pStaticConfig; + + NV_ASSERT_OK_OR_GOTO(status, + kmemsysInitStaticConfig_HAL( + pGpu, pKernelMemorySystem, pStaticConfig), + exit); + +exit: + if (status != NV_OK) + { + portMemFree((void *)pKernelMemorySystem->pStaticConfig); + pKernelMemorySystem->pStaticConfig = NULL; + } + + return status; +} + /* * Initialize the Kernel Memory System state. * @@ -99,21 +137,10 @@ NV_STATUS kmemsysStateInitLocked_IMPL KernelMemorySystem *pKernelMemorySystem ) { - MEMORY_SYSTEM_STATIC_CONFIG *pStaticConfig; NV_STATUS status = NV_OK; NV_ASSERT_OK_OR_GOTO(status, kmemsysEnsureSysmemFlushBufferInitialized(pGpu, pKernelMemorySystem), fail); - pStaticConfig = portMemAllocNonPaged(sizeof(*pStaticConfig)); - NV_CHECK_OR_RETURN(LEVEL_ERROR, pStaticConfig != NULL, NV_ERR_INSUFFICIENT_RESOURCES); - portMemSet(pStaticConfig, 0, sizeof(*pStaticConfig)); - - NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, - kmemsysInitStaticConfig_HAL(pGpu, pKernelMemorySystem, pStaticConfig), - fail); - - pKernelMemorySystem->pStaticConfig = pStaticConfig; - KernelBif *pKernelBif = GPU_GET_KERNEL_BIF(pGpu); pKernelMemorySystem->memPartitionNumaInfo = portMemAllocNonPaged(sizeof(MEM_PARTITION_NUMA_INFO) * KMIGMGR_MAX_GPU_SWIZZID); @@ -180,11 +207,6 @@ NV_STATUS kmemsysStateInitLocked_IMPL } fail: - if (status != NV_OK) - { - portMemFree((void *)pKernelMemorySystem->pStaticConfig); - } - return status; } @@ -229,6 +251,13 @@ kmemsysStatePostLoad_IMPL NvU32 flags ) { + if (IS_SILICON(pGpu) && + osNumaOnliningEnabled(pGpu->pOsGpuInfo)) + { + NV_ASSERT_OR_RETURN(pGpu->getProperty(pGpu, PDB_PROP_GPU_ATS_SUPPORTED), + NV_ERR_INVALID_STATE); + } + if (IS_SILICON(pGpu) && pGpu->getProperty(pGpu, PDB_PROP_GPU_ATS_SUPPORTED)) { @@ -333,7 +362,6 @@ kmemsysDestruct_IMPL pKernelMemorySystem->pSysmemFlushBufferMemDesc = NULL; portMemSet(pKernelMemorySystem->gpuInstanceMemConfig, 0, sizeof(pKernelMemorySystem->gpuInstanceMemConfig)); - } NV_STATUS @@ -835,7 +863,6 @@ kmemsysSetupCoherentCpuLink_IMPL NvBool bCpuMapping = NV_TRUE; // Default enable NvS32 numaNodeId = NV0000_CTRL_NO_NUMA_NODE; NvU64 memblockSize = 0; - NvU64 numaOnlineBase = 0; NvU64 rsvdFastSize = 0; NvU64 rsvdSlowSize = 0; NvU64 rsvdISOSize = 0; @@ -848,33 +875,7 @@ kmemsysSetupCoherentCpuLink_IMPL &numaNodeId)); if (pKernelMemorySystem->coherentCpuFbBase != 0) { - if (gpuIsSelfHosted(pGpu)) - { - // - // For self-hosted, coherentCpuFbEnd is only till the FB size - // end and NOT till the FB AMAP end since self-hosted doesn't - // support indirect peer and requires GPU nvlink for peer. - // - pKernelMemorySystem->coherentCpuFbEnd = pKernelMemorySystem->coherentCpuFbBase + fbSize; - } - else - { - RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); - NV2080_CTRL_INTERNAL_GET_COHERENT_FB_APERTURE_SIZE_PARAMS params = {0}; - - NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, - pGpu->hInternalClient, - pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_INTERNAL_GET_COHERENT_FB_APERTURE_SIZE, - ¶ms, - sizeof(NV2080_CTRL_INTERNAL_GET_COHERENT_FB_APERTURE_SIZE_PARAMS))); - // - // Indirect peer(uses P9 to reach other GV100) in P9+GV100 requires coherentCpuFbEnd to - // also include the entire FB AMAP range even when FB size is less than the FB AMAP size. - // - pKernelMemorySystem->coherentCpuFbEnd = pKernelMemorySystem->coherentCpuFbBase + - params.coherentFbApertureSize; - } + pKernelMemorySystem->coherentCpuFbEnd = pKernelMemorySystem->coherentCpuFbBase + fbSize; } } @@ -928,7 +929,7 @@ kmemsysSetupCoherentCpuLink_IMPL // one can access it. If FB size itself is memblock size unaligned(because // of CBC and row remapper deductions), then the memory wastage is unavoidable. // - numaOnlineSize = NV_ALIGN_DOWN64(fbSize - totalRsvdBytes, memblockSize); + numaOnlineSize = KMEMSYS_FB_NUMA_ONLINE_SIZE(fbSize - totalRsvdBytes, memblockSize); if (IS_PASSTHRU(pGpu) && pKernelMemorySystem->bBug3656943WAR) { @@ -944,16 +945,16 @@ kmemsysSetupCoherentCpuLink_IMPL // wasted being part of non onlined region which can't be avoided // per the design. // - numaOnlineSize = NV_ALIGN_DOWN64(fbSize - totalRsvdBytes, 512 * 1024 * 1024); + numaOnlineSize = KMEMSYS_FB_NUMA_ONLINE_SIZE(fbSize - totalRsvdBytes, 512 * 1024 * 1024); } - NV_PRINTF(LEVEL_INFO, "fbSize: 0x%llx NUMA reserved memory size: 0x%llx online memory size: 0x%llx\n", fbSize, totalRsvdBytes, numaOnlineSize); + if (osNumaOnliningEnabled(pGpu->pOsGpuInfo)) { - pKernelMemorySystem->numaOnlineBase = numaOnlineBase; + pKernelMemorySystem->numaOnlineBase = KMEMSYS_FB_NUMA_ONLINE_BASE; pKernelMemorySystem->numaOnlineSize = numaOnlineSize; // // TODO: Bug 1945658: Soldier through on GPU memory add @@ -1046,42 +1047,44 @@ kmemsysGetUsableFbSize_KERNEL } NV_STATUS -kmemsysStateLoad_VF(OBJGPU *pGpu, KernelMemorySystem *pKernelMemorySystem, NvU32 flags) +kmemsysStateLoad_IMPL(OBJGPU *pGpu, KernelMemorySystem *pKernelMemorySystem, NvU32 flags) { NV_STATUS status = NV_OK; - if (flags & GPU_STATE_FLAGS_PRESERVING) + if (IS_GSP_CLIENT(pGpu) || IS_VIRTUAL(pGpu)) { - MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - - NV_ASSERT(!(flags & GPU_STATE_FLAGS_GC6_TRANSITION)); - - status = memmgrRestorePowerMgmtState(pGpu, pMemoryManager); - if (status != NV_OK) - memmgrFreeFbsrMemory(pGpu, pMemoryManager); + if ((flags & GPU_STATE_FLAGS_PRESERVING) && + (flags & GPU_STATE_FLAGS_PM_TRANSITION) && + !(flags & GPU_STATE_FLAGS_GC6_TRANSITION)) + { + MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - NV_ASSERT_OK(status); + NV_ASSERT_OK_OR_ELSE(status, + memmgrRestorePowerMgmtState(pGpu, pMemoryManager), + memmgrFreeFbsrMemory(pGpu, pMemoryManager)); + } } return status; } NV_STATUS -kmemsysStateUnload_VF(OBJGPU *pGpu, KernelMemorySystem *pKernelMemorySystem, NvU32 flags) +kmemsysStateUnload_IMPL(OBJGPU *pGpu, KernelMemorySystem *pKernelMemorySystem, NvU32 flags) { NV_STATUS status = NV_OK; - if (flags & GPU_STATE_FLAGS_PRESERVING) + if (IS_GSP_CLIENT(pGpu) || IS_VIRTUAL(pGpu)) { - MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - - NV_ASSERT(!(flags & GPU_STATE_FLAGS_GC6_TRANSITION)); - - status = memmgrSavePowerMgmtState(pGpu, pMemoryManager); - if (status != NV_OK) - memmgrFreeFbsrMemory(pGpu, pMemoryManager); + if ((flags & GPU_STATE_FLAGS_PRESERVING) && + (flags & GPU_STATE_FLAGS_PM_TRANSITION) && + !(flags & GPU_STATE_FLAGS_GC6_TRANSITION)) + { + MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - NV_ASSERT_OK(status); + NV_ASSERT_OK_OR_ELSE(status, + memmgrSavePowerMgmtState(pGpu, pMemoryManager), + memmgrFreeFbsrMemory(pGpu, pMemoryManager)); + } } return status; diff --git a/src/nvidia/src/kernel/gpu/mem_sys/kern_mem_sys_ctrl.c b/src/nvidia/src/kernel/gpu/mem_sys/kern_mem_sys_ctrl.c index 970fa04805..7fccbc28ac 100644 --- a/src/nvidia/src/kernel/gpu/mem_sys/kern_mem_sys_ctrl.c +++ b/src/nvidia/src/kernel/gpu/mem_sys/kern_mem_sys_ctrl.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -475,14 +475,11 @@ _kmemsysGetFbInfos // It will be zero unless VGA display memory is reserved if (pKernelMemorySystem->fbOverrideStartKb != 0) { - status = NV_OK; data = NvU64_LO32(pKernelMemorySystem->fbOverrideStartKb); - NV_ASSERT_OR_ELSE((NvU64) data == pKernelMemorySystem->fbOverrideStartKb, - status = NV_ERR_INVALID_DATA); - + NV_ASSERT(((NvU64) data << 10ULL) == pKernelMemorySystem->fbOverrideStartKb); } - else - { + else + { // // Returns start of heap in kbytes. This is zero unless // VGA display memory is reserved. @@ -1522,35 +1519,85 @@ subdeviceCtrlCmdFbGetGpuCacheInfo_IMPL return status; } -NV_STATUS subdeviceCtrlCmdMemSysGetStaticConfig_IMPL +NV_STATUS subdeviceCtrlCmdMemSysGetStaticConfig_VF ( Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_MEMSYS_GET_STATIC_CONFIG_PARAMS *pParams ) { - OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); - const MEMORY_SYSTEM_STATIC_CONFIG *pConfig = - kmemsysGetStaticConfig(pGpu, GPU_GET_KERNEL_MEMORY_SYSTEM(pGpu)); + OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); + VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); + + NV_ASSERT_OR_RETURN(pVSI != NULL, NV_ERR_INVALID_STATE); - NV_CHECK_OR_RETURN(LEVEL_ERROR, pConfig != NULL, NV_ERR_INVALID_STATE); - portMemCopy(pParams, sizeof(*pParams), pConfig, sizeof(*pConfig)); + portMemCopy(pParams, sizeof(*pParams), + &pVSI->memsysStaticConfig, sizeof(pVSI->memsysStaticConfig)); return NV_OK; } -NV_STATUS subdeviceCtrlCmdMemSysGetStaticConfig_VGPUSTUB +NV_STATUS +subdeviceCtrlCmdFbGetDynamicOfflinedPages_VF ( Subdevice *pSubdevice, - NV2080_CTRL_INTERNAL_MEMSYS_GET_STATIC_CONFIG_PARAMS *pParams + NV2080_CTRL_FB_GET_DYNAMIC_OFFLINED_PAGES_PARAMS *pParams ) { OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); + NvU32 i = pParams->baseIndex / NV2080_CTRL_FB_DYNAMIC_BLACKLIST_MAX_ENTRIES; NV_ASSERT_OR_RETURN(pVSI != NULL, NV_ERR_INVALID_STATE); - portMemCopy(pParams, sizeof(*pParams), - &pVSI->memsysStaticConfig, sizeof(pVSI->memsysStaticConfig)); + if (i >= MAX_ITERATIONS_DYNAMIC_BLACKLIST) + { + return NV_ERR_INVALID_ARGUMENT; + } + + pParams->validEntries = pVSI->fbDynamicBlacklistedPages[i].validEntries; + if (pParams->validEntries > NV2080_CTRL_FB_DYNAMIC_BLACKLIST_MAX_ENTRIES) + { + return NV_ERR_INVALID_ARGUMENT; + } + + portMemCopy(&pParams->offlined, + pParams->validEntries * sizeof(NV2080_CTRL_FB_DYNAMIC_OFFLINED_ADDRESS_INFO), + &pVSI->fbDynamicBlacklistedPages[i].offlined, + pParams->validEntries * sizeof(NV2080_CTRL_FB_DYNAMIC_OFFLINED_ADDRESS_INFO)); + pParams->bMore = pVSI->fbDynamicBlacklistedPages[i].bMore; return NV_OK; } + +NV_STATUS +subdeviceCtrlCmdFbGetLTCInfoForFBP_VF +( + Subdevice *pSubdevice, + NV2080_CTRL_FB_GET_LTC_INFO_FOR_FBP_PARAMS *pParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); + VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); + + NV_ASSERT_OR_RETURN(pVSI != NULL, NV_ERR_INVALID_STATE); + + if (pParams->fbpIndex >= MAX_FBPS) + { + return NV_ERR_INVALID_ARGUMENT; + } + + pParams->ltcCount = pVSI->fbLtcInfoForFbp[pParams->fbpIndex].ltcCount; + pParams->ltcMask = pVSI->fbLtcInfoForFbp[pParams->fbpIndex].ltcMask; + + return NV_OK; +} + +NV_STATUS +subdeviceCtrlCmdFbGetOfflinedPages_VF +( + Subdevice *pSubdevice, + NV2080_CTRL_FB_GET_OFFLINED_PAGES_PARAMS *pOfflinedParams +) +{ + return NV_ERR_NOT_SUPPORTED; +} diff --git a/src/nvidia/src/kernel/gpu/mig_mgr/arch/ampere/kmigmgr_ga100.c b/src/nvidia/src/kernel/gpu/mig_mgr/arch/ampere/kmigmgr_ga100.c index 98d5938dd8..6a2ac68e60 100644 --- a/src/nvidia/src/kernel/gpu/mig_mgr/arch/ampere/kmigmgr_ga100.c +++ b/src/nvidia/src/kernel/gpu/mig_mgr/arch/ampere/kmigmgr_ga100.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/src/kernel/gpu/mig_mgr/arch/hopper/kmigmgr_gh100.c b/src/nvidia/src/kernel/gpu/mig_mgr/arch/hopper/kmigmgr_gh100.c index 00a36cad11..fd764265a4 100644 --- a/src/nvidia/src/kernel/gpu/mig_mgr/arch/hopper/kmigmgr_gh100.c +++ b/src/nvidia/src/kernel/gpu/mig_mgr/arch/hopper/kmigmgr_gh100.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/src/kernel/gpu/mig_mgr/gpu_instance_subscription.c b/src/nvidia/src/kernel/gpu/mig_mgr/gpu_instance_subscription.c index 2080c24d01..d7fdbe24cb 100644 --- a/src/nvidia/src/kernel/gpu/mig_mgr/gpu_instance_subscription.c +++ b/src/nvidia/src/kernel/gpu/mig_mgr/gpu_instance_subscription.c @@ -1152,7 +1152,7 @@ gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity_IMPL NvU64 GPUInstancePseudoMask; NvU32 availableSpanCount; NvU32 totalSpanCount; - NvU32 veidStepSize; + NvU32 veidSizePerSpan; NvU32 veidSlotCount; NvU32 count; NvU32 i; @@ -1160,7 +1160,7 @@ gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity_IMPL NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, kmigmgrGetComputeProfileFromSize(pGpu, pKernelMIGManager, pParams->computeSize, &profile)); NV_ASSERT_OK_OR_RETURN( - kgrmgrGetVeidStepSize(pGpu, pKernelGraphicsManager, &veidStepSize)); + kgrmgrGetVeidSizePerSpan(pGpu, pKernelGraphicsManager, &veidSizePerSpan)); // Create a mask for VEIDs associated with this GPU instance veidMask = DRF_SHIFTMASK64(profile.veidCount - 1:0); @@ -1172,13 +1172,13 @@ gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity_IMPL availableSpanCount = 0; totalSpanCount = 0; count = 0; - for (i = pKernelMIGGpuInstance->resourceAllocation.veidOffset; i < GPUInstanceVeidEnd; i += veidStepSize) + for (i = pKernelMIGGpuInstance->resourceAllocation.veidOffset; i < GPUInstanceVeidEnd; i += veidSizePerSpan) { // Determine max correctly sized VEID segments if (((GPUInstanceFreeVeidMask >> i) & veidMask) == veidMask) { pParams->availableSpans[availableSpanCount].lo = count; - pParams->availableSpans[availableSpanCount].hi = count + (profile.veidCount / veidStepSize) - 1; + pParams->availableSpans[availableSpanCount].hi = count + (profile.veidCount / veidSizePerSpan) - 1; availableSpanCount++; } @@ -1186,7 +1186,7 @@ gisubscriptionCtrlCmdExecPartitionsGetProfileCapacity_IMPL if (((GPUInstanceVeidMask >> i) & veidMask) == veidMask) { pParams->totalSpans[totalSpanCount].lo = count; - pParams->totalSpans[totalSpanCount].hi = count + (profile.veidCount / veidStepSize) - 1; + pParams->totalSpans[totalSpanCount].hi = count + (profile.veidCount / veidSizePerSpan) - 1; totalSpanCount++; } diff --git a/src/nvidia/src/kernel/gpu/mig_mgr/kernel_mig_manager.c b/src/nvidia/src/kernel/gpu/mig_mgr/kernel_mig_manager.c index d8a9721946..42d8d34939 100644 --- a/src/nvidia/src/kernel/gpu/mig_mgr/kernel_mig_manager.c +++ b/src/nvidia/src/kernel/gpu/mig_mgr/kernel_mig_manager.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -58,6 +58,8 @@ #include "kernel/gpu/ccu/kernel_ccu.h" +#include "class/cl503c.h" + struct KERNEL_MIG_MANAGER_PRIVATE_DATA { NvBool bInitialized; @@ -519,6 +521,47 @@ kmigmgrGetLocalEngineMask_IMPL } } +NV_STATUS +_kmigmgrAllocThirdPartyP2PObject +( + OBJGPU *pGpu, + KERNEL_MIG_GPU_INSTANCE *pKernelMIGGpuInstance +) +{ + NV_STATUS status; + RM_API *pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); + NV503C_ALLOC_PARAMETERS params; + NvHandle hThirdPartyP2P = NV01_NULL_OBJECT; + + portMemSet(¶ms, 0, sizeof(params)); + if (pGpu->getProperty(pGpu, PDB_PROP_GPU_COHERENT_CPU_MAPPING)) + { + params.flags = NV503C_ALLOC_PARAMETERS_FLAGS_TYPE_NVLINK; + } + else + { + params.flags = NV503C_ALLOC_PARAMETERS_FLAGS_TYPE_BAR1; + } + + status = pRmApi->Alloc(pRmApi, + pKernelMIGGpuInstance->instanceHandles.hClient, + pKernelMIGGpuInstance->instanceHandles.hSubdevice, + &hThirdPartyP2P, + NV50_THIRD_PARTY_P2P, + ¶ms, + sizeof(params)); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_WARNING, "Error creating internal ThirdPartyP2P object: 0x%x\n", + status); + hThirdPartyP2P = NV01_NULL_OBJECT; + } + + pKernelMIGGpuInstance->instanceHandles.hThirdPartyP2P = hThirdPartyP2P; + + return NV_OK; +} + /*! * @brief Create client and subdevice handles to make calls into this gpu instance */ @@ -536,21 +579,36 @@ kmigmgrAllocGPUInstanceHandles_IMPL NvHandle hDevice; NvHandle hSubdevice; NVC637_ALLOCATION_PARAMETERS params; + NV_STATUS status; NV_ASSERT_OK_OR_RETURN( rmapiutilAllocClientAndDeviceHandles(pRmApi, pGpu, &hClient, &hDevice, &hSubdevice)); - portMemSet(¶ms, 0, sizeof(params)); - params.swizzId = swizzId; - NV_ASSERT_OK_OR_RETURN( - pRmApi->Alloc(pRmApi, hClient, hSubdevice, &hSubscription, AMPERE_SMC_PARTITION_REF, ¶ms, sizeof(params))); - pKernelMIGGpuInstance->instanceHandles.hClient = hClient; pKernelMIGGpuInstance->instanceHandles.hDevice = hDevice; pKernelMIGGpuInstance->instanceHandles.hSubdevice = hSubdevice; + + portMemSet(¶ms, 0, sizeof(params)); + params.swizzId = swizzId; + NV_ASSERT_OK_OR_GOTO(status, + pRmApi->Alloc(pRmApi, hClient, hSubdevice, &hSubscription, + AMPERE_SMC_PARTITION_REF, ¶ms, sizeof(params)), + failed); + pKernelMIGGpuInstance->instanceHandles.hSubscription = hSubscription; + { + NV_ASSERT_OK_OR_GOTO(status, + _kmigmgrAllocThirdPartyP2PObject(pGpu, pKernelMIGGpuInstance), + failed); + } + return NV_OK; + +failed: + kmigmgrFreeGPUInstanceHandles(pKernelMIGGpuInstance); + + return status; } /*! @@ -571,6 +629,7 @@ kmigmgrFreeGPUInstanceHandles_IMPL pKernelMIGGpuInstance->instanceHandles.hDevice = NV01_NULL_OBJECT; pKernelMIGGpuInstance->instanceHandles.hSubdevice = NV01_NULL_OBJECT; pKernelMIGGpuInstance->instanceHandles.hSubscription = NV01_NULL_OBJECT; + pKernelMIGGpuInstance->instanceHandles.hThirdPartyP2P = NV01_NULL_OBJECT; } } @@ -765,7 +824,7 @@ _kmigmgrHandlePostSchedulingEnableCallback if ((pKernelMIGManager == NULL) || !kmigmgrIsMIGSupported(pGpu, pKernelMIGManager)) { NV_PRINTF(LEVEL_INFO, "MIG not supported on this GPU.\n"); - return NV_OK; + return NV_ERR_NOT_SUPPORTED; } if (!IS_MIG_ENABLED(pGpu) && !IS_VIRTUAL(pGpu) && @@ -1031,6 +1090,7 @@ kmigmgrInitRegistryOverrides_IMPL pKernelMIGManager->bBootConfigSupported = FLD_TEST_DRF(_REG_STR_RM, _MIG_BOOT_CONFIGURATION_FEATURE_FLAGS, _SUPPORTED, _TRUE, data32); pKernelMIGManager->bAutoUpdateBootConfig = FLD_TEST_DRF(_REG_STR_RM, _MIG_BOOT_CONFIGURATION_FEATURE_FLAGS, _SUPPORTED, _TRUE, data32); + } /** @@ -1580,7 +1640,7 @@ kmigmgrSaveToPersistenceFromVgpuStaticInfo_VF { GPUMGR_SAVE_COMPUTE_INSTANCE *pComputeInstanceSave = &pGPUInstanceSave->saveCI[savedCIIdx]; NVC637_CTRL_EXEC_PARTITIONS_INFO *pExecPartInfo = &pVSI->execPartitionInfo.execPartInfo[CIIdx]; - NvU32 grIdx = portUtilCountTrailingZeros32(assignableGrMask); + NvU32 grIdx = pVSI->execSyspipeInfo.syspipeId[CIIdx]; ENGTYPE_BIT_VECTOR engines; NV_CHECK_OR_RETURN(LEVEL_ERROR, grIdx < RM_ENGINE_TYPE_GR_SIZE, NV_ERR_INVALID_STATE); @@ -1601,7 +1661,6 @@ kmigmgrSaveToPersistenceFromVgpuStaticInfo_VF bitVectorSetRange(&engines, rangeMake(RM_ENGINE_TYPE_GR(grIdx), RM_ENGINE_TYPE_GR(grIdx))); - assignableGrMask &= ~(NVBIT32(grIdx)); if (pExecPartInfo->ceCount > 0) bitVectorSetRange(&engines, @@ -1644,6 +1703,8 @@ kmigmgrSaveToPersistenceFromVgpuStaticInfo_VF osRmCapRegisterSmcExecutionPartition(pGPUInstanceSave->pOsRmCaps, &(pComputeInstanceSave->pOsRmCaps), pComputeInstanceSave->id)); + gpumgrCacheCreateComputeInstance(pGpu, pGPUInstanceSave->swizzId, + pComputeInstanceSave->id); ++savedCIIdx; } @@ -1672,10 +1733,13 @@ kmigmgrSetStaticInfo_VF KERNEL_MIG_GPU_INSTANCE *pKernelMIGGpuInstance; MIG_RESOURCE_ALLOCATION *pResourceAllocation; NvU32 veidOffset = 0; - NvU32 grIdx; NV_RANGE memoryRange; MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); KernelGraphicsManager *pKernelGraphicsManager = GPU_GET_KERNEL_GRAPHICS_MANAGER(pGpu); + RM_ENGINE_TYPE globalEngineType; + RM_ENGINE_TYPE localEngineType; + ENGTYPE_BIT_VECTOR *pGlobalMask; + ENGTYPE_BIT_VECTOR *pLocalMask; pVSI = GPU_GET_STATIC_INFO(pGpu); NV_ASSERT_OR_RETURN(pVSI != NULL, NV_ERR_OBJECT_NOT_FOUND); @@ -1733,7 +1797,6 @@ kmigmgrSetStaticInfo_VF .type = KMIGMGR_CREATE_GPU_INSTANCE_PARAMS_TYPE_RESTORE, .inst.restore.pGPUInstanceSave = &save }; - NvU32 grCount; NvUuid uuid; save.bValid = NV_TRUE; @@ -1761,21 +1824,37 @@ kmigmgrSetStaticInfo_VF pResourceAllocation->virtualGpcCount = pVSI->gpuPartitionInfo.virtualGpcCount; pResourceAllocation->gfxGpcCount = pVSI->gpuPartitionInfo.gfxGpcCount; - grCount = kmigmgrCountEnginesOfType(&pResourceAllocation->engines, RM_ENGINE_TYPE_GR(0)); - for (grIdx = 0; grIdx < grCount; ++grIdx) + pGlobalMask = &pResourceAllocation->engines; + pLocalMask = &pResourceAllocation->localEngines; + + // Iterate over both global/local masks at the same time + FOR_EACH_IN_BITVECTOR_PAIR(pGlobalMask, globalEngineType, pLocalMask, localEngineType) { - // set VEID mask for grIdx - kgrmgrSetGrIdxVeidMask(pGpu, pKernelGraphicsManager, grIdx, DRF_MASK64(pVSI->gpuPartitionInfo.veidsPerGr[grIdx] - 1:0) << veidOffset); - veidOffset += pVSI->gpuPartitionInfo.veidsPerGr[grIdx]; + NvU32 globalGrIdx; + NvU32 localGrIdx; + + if (!RM_ENGINE_TYPE_IS_GR(globalEngineType)) + continue; + + globalGrIdx = RM_ENGINE_TYPE_GR_IDX(globalEngineType); + localGrIdx = RM_ENGINE_TYPE_GR_IDX(localEngineType); + + if (pVSI->gpuPartitionInfo.veidsPerGr[localGrIdx] != 0) + { + // set VEID mask for grIdx + kgrmgrSetGrIdxVeidMask(pGpu, pKernelGraphicsManager, globalGrIdx, DRF_MASK64(pVSI->gpuPartitionInfo.veidsPerGr[localGrIdx] - 1:0) << veidOffset); + veidOffset += pVSI->gpuPartitionInfo.veidsPerGr[localGrIdx]; + } - if (pVSI->gpuPartitionInfo.gpcsPerGr[grIdx] != 0) + if (pVSI->gpuPartitionInfo.gpcsPerGr[localGrIdx] != 0) { - KernelGraphics *pKernelGraphics = GPU_GET_KERNEL_GRAPHICS(pGpu, grIdx); + KernelGraphics *pKernelGraphics = GPU_GET_KERNEL_GRAPHICS(pGpu, globalGrIdx); kgraphicsInvalidateStaticInfo(pGpu, pKernelGraphics); NV_ASSERT_OK(kgraphicsLoadStaticInfo_HAL(pGpu, pKernelGraphics, 0)); } } + FOR_EACH_IN_BITVECTOR_PAIR_END(); } return NV_OK; @@ -2771,9 +2850,13 @@ kmigmgrEnableAllLCEs_IMPL NV_ASSERT_OK_OR_RETURN(kceFindFirstInstance(pGpu, &pKCe)); if (bEnableAllLCEs) + { NV_ASSERT_OK_OR_RETURN(kceUpdateClassDB_HAL(pGpu, pKCe)); + } else + { NV_ASSERT_OK_OR_RETURN(kceTopLevelPceLceMappingsUpdate(pGpu, pKCe)); + } return NV_OK; } @@ -3420,7 +3503,7 @@ kmigmgrFilterEnginePartnerList_IMPL for (i = 0; i < pPartnerListParams->numPartners; ++i) { - RM_ENGINE_TYPE rmEngineType = pPartnerListParams->partnerList[i]; + RM_ENGINE_TYPE rmEngineType = gpuGetRmEngineType(pPartnerListParams->partnerList[i]); if (!kmigmgrIsEngineInInstance(pGpu, pKernelMIGManager, rmEngineType, ref)) { @@ -3440,6 +3523,18 @@ kmigmgrFilterEnginePartnerList_IMPL i--; } + else + { + // Convert rmEngineId to MIG local Ids and then to NV2080 Engine type + RM_ENGINE_TYPE localRmEngineType; + NV_ASSERT_OK_OR_RETURN( + kmigmgrGetGlobalToLocalEngineType(pGpu, pKernelMIGManager, ref, + rmEngineType, + &localRmEngineType)); + NV_PRINTF(LEVEL_INFO, "Overriding global engine type 0x%x to local engine type 0x%x (0x%x) due to MIG\n", + rmEngineType, localRmEngineType, localRmEngineType); + pPartnerListParams->partnerList[i] = gpuGetNv2080EngineType(localRmEngineType); + } } return NV_OK; @@ -3691,7 +3786,7 @@ kmigmgrDetectReducedConfig_KERNEL * @param[IN] pGpu * @param[IN] pKernelMIGManager * @param[IN] pDevice Device subscribed to GI - * @param[OUT] ppCe Scrubber CE + * @param[OUT] pCeInst Scrubber CE */ NV_STATUS kmigmgrGetGPUInstanceScrubberCe_IMPL @@ -3699,11 +3794,13 @@ kmigmgrGetGPUInstanceScrubberCe_IMPL OBJGPU *pGpu, KernelMIGManager *pKernelMIGManager, Device *pDevice, - NvU32 *ceInst + NvU32 *pCeInst ) { MIG_INSTANCE_REF ref; ENGTYPE_BIT_VECTOR ces; + RM_ENGINE_TYPE rmEngineType; + *pCeInst = RM_ENGINE_TYPE_NULL; NV_ASSERT_OK_OR_RETURN( kmigmgrGetInstanceRefFromDevice(pGpu, pKernelMIGManager, pDevice, &ref)); @@ -3714,8 +3811,22 @@ kmigmgrGetGPUInstanceScrubberCe_IMPL NV_ASSERT_OR_RETURN(!bitVectorTestAllCleared(&ces), NV_ERR_INSUFFICIENT_RESOURCES); - // Pick the first CE in the instance - *ceInst = RM_ENGINE_TYPE_COPY_IDX(bitVectorCountTrailingZeros(&ces)); + // Pick the first non-GRCE in the instance + FOR_EACH_IN_BITVECTOR(&ces, rmEngineType) + { + if (!ceIsCeGrce(pGpu, rmEngineType)) + { + *pCeInst = RM_ENGINE_TYPE_COPY_IDX(rmEngineType); + break; + } + } + FOR_EACH_IN_BITVECTOR_END(); + + // If can't find any non-GRCE, then just pick the first CE + if (*pCeInst == RM_ENGINE_TYPE_NULL) + { + *pCeInst = RM_ENGINE_TYPE_COPY_IDX(bitVectorCountTrailingZeros(&ces)); + } return NV_OK; } @@ -4120,10 +4231,12 @@ kmigmgrCreateComputeInstances_VF if (pMIGComputeInstance->bValid) { NvU32 smCount = pMIGComputeInstance->resourceAllocation.smCount; + NvU32 gpcCount = pMIGComputeInstance->resourceAllocation.gpcCount; + NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE ciProfile; NV_CHECK_OK_OR_ELSE(status, LEVEL_ERROR, - kmigmgrGetComputeProfileFromSmCount(pGpu, pKernelMIGManager, smCount, &ciProfile), + kmigmgrGetComputeProfileForRequest(pGpu, pKernelMIGManager, pKernelMIGGpuInstance, smCount, gpcCount, &ciProfile), goto done; ); inUseGpcCount += ciProfile.gpcCount; @@ -4179,10 +4292,10 @@ kmigmgrCreateComputeInstances_VF spanStart = KMIGMGR_SPAN_OFFSET_INVALID; if (FLD_TEST_REF(NVC637_CTRL_DMA_EXEC_PARTITIONS_CREATE_REQUEST_AT_SPAN, _TRUE, params.inst.request.requestFlags)) { - NvU32 veidStepSize; + NvU32 veidSizePerSpan; NV_ASSERT_OK_OR_GOTO(status, - kgrmgrGetVeidStepSize(pGpu, pKernelGraphicsManager, &veidStepSize), + kgrmgrGetVeidSizePerSpan(pGpu, pKernelGraphicsManager, &veidSizePerSpan), done); // @@ -4191,7 +4304,7 @@ kmigmgrCreateComputeInstances_VF // spanStart = (params.inst.request.pReqComputeInstanceInfo[CIIdx].spanStart != 0) ? params.inst.request.pReqComputeInstanceInfo[CIIdx].spanStart - : params.inst.request.pReqComputeInstanceInfo[CIIdx].veidStartOffset / veidStepSize; + : params.inst.request.pReqComputeInstanceInfo[CIIdx].veidStartOffset / veidSizePerSpan; } } else @@ -5742,20 +5855,12 @@ kmigmgrInvalidateGPUInstance_IMPL // if (IS_GSP_CLIENT(pGpu) && gpuIsSriovEnabled(pGpu)) { - Intr *pIntr = GPU_GET_INTR(pGpu); - // // When running in GSP offload mode, KernelRM must re-fetch the // interrupt table on every change to the MIG partitioning layout. // NV_ASSERT_OK_OR_CAPTURE_FIRST_ERROR(rmStatus, - intrStateUnload_HAL(pGpu, pIntr, GPU_STATE_FLAGS_PRESERVING)); - - NV_ASSERT_OK_OR_CAPTURE_FIRST_ERROR(rmStatus, - intrInitInterruptTable_HAL(pGpu, pIntr)); - - NV_ASSERT_OK_OR_CAPTURE_FIRST_ERROR(rmStatus, - intrStateLoad_HAL(pGpu, pIntr, GPU_STATE_FLAGS_PRESERVING)); + intrRefetchInterruptTable_HAL(pGpu, GPU_GET_INTR(pGpu))); } return rmStatus; @@ -6114,10 +6219,7 @@ kmigmgrSetMIGState_FWCLIENT } // Enable ctx buf pool before allocating any resources that uses it. - if (bMemoryPartitioningNeeded) - { - pGpu->setProperty(pGpu, PDB_PROP_GPU_MOVE_CTX_BUFFERS_TO_PMA, NV_TRUE); - } + pGpu->setProperty(pGpu, PDB_PROP_GPU_MOVE_CTX_BUFFERS_TO_PMA, bMemoryPartitioningNeeded); // Add the MIG-specific classes NV_ASSERT_OK_OR_CAPTURE_FIRST_ERROR(rmStatus, @@ -6387,8 +6489,6 @@ kmigmgrCreateGPUInstance_IMPL // if (IS_GSP_CLIENT(pGpu) && gpuIsSriovEnabled(pGpu)) { - Intr *pIntr = GPU_GET_INTR(pGpu); - // // Making changes to MIG partition structure reassigns engine interrupts // of the engines assigned to a partition. This is done so that a guest @@ -6406,15 +6506,7 @@ kmigmgrCreateGPUInstance_IMPL // NV2080_CTRL_CMD_VGPU_MGR_INTERNAL_BOOTLOAD_GSP_VGPU_PLUGIN_TASK. // NV_CHECK_OK_OR_GOTO(rmStatus, LEVEL_ERROR, - intrStateUnload_HAL(pGpu, pIntr, GPU_STATE_FLAGS_PRESERVING), - invalidate); - - NV_CHECK_OK_OR_GOTO(rmStatus, LEVEL_ERROR, - intrInitInterruptTable_HAL(pGpu, pIntr), - invalidate); - - NV_CHECK_OK_OR_GOTO(rmStatus, LEVEL_ERROR, - intrStateLoad_HAL(pGpu, pIntr, GPU_STATE_FLAGS_PRESERVING), + intrRefetchInterruptTable_HAL(pGpu, GPU_GET_INTR(pGpu)), invalidate); } @@ -7693,6 +7785,7 @@ subdeviceCtrlCmdGpuGetComputeProfiles_IMPL const KERNEL_MIG_MANAGER_STATIC_INFO *pStaticInfo = kmigmgrGetStaticInfo(pGpu, pKernelMIGManager); Device *pDevice = GPU_RES_GET_DEVICE(pSubdevice); NvU32 maxSmCount = NV_U32_MAX; + NvU32 maxPhysicalSlotCount = NV_U32_MAX; MIG_INSTANCE_REF ref; NvU32 entryCount; NvU32 i; @@ -7709,6 +7802,7 @@ subdeviceCtrlCmdGpuGetComputeProfiles_IMPL if (kmigmgrGetInstanceRefFromDevice(pGpu, pKernelMIGManager, pDevice, &ref) == NV_OK) { maxSmCount = ref.pKernelMIGGpuInstance->pProfile->smCount; + maxPhysicalSlotCount = ref.pKernelMIGGpuInstance->pProfile->virtualGpcCount; } NV_CHECK_OR_RETURN(LEVEL_ERROR, pStaticInfo != NULL, NV_ERR_INVALID_STATE); @@ -7718,8 +7812,11 @@ subdeviceCtrlCmdGpuGetComputeProfiles_IMPL entryCount = 0; for (i = 0; i < pStaticInfo->pCIProfiles->profileCount; i++) { - if (pStaticInfo->pCIProfiles->profiles[i].smCount > maxSmCount) + if ((pStaticInfo->pCIProfiles->profiles[i].smCount > maxSmCount) || + (pStaticInfo->pCIProfiles->profiles[i].physicalSlots > maxPhysicalSlotCount)) + { continue; + } // If there are any duplicate compute profiles (i.e. same GPC and SM counts), skip broadcasting the // profile out. @@ -7887,22 +7984,56 @@ kmigmgrGetComputeProfileFromSmCount_IMPL ) { const KERNEL_MIG_MANAGER_STATIC_INFO *pStaticInfo = kmigmgrGetStaticInfo(pGpu, pKernelMIGManager); + NvU32 indexMask; + NvU32 index; NvU32 i; + NV_CHECK_OR_RETURN(LEVEL_WARNING, smCount != 0, NV_ERR_OBJECT_NOT_FOUND); NV_ASSERT_OR_RETURN(pProfile != NULL, NV_ERR_INVALID_ARGUMENT); NV_CHECK_OR_RETURN(LEVEL_ERROR, pStaticInfo != NULL, NV_ERR_OBJECT_NOT_FOUND); NV_CHECK_OR_RETURN(LEVEL_WARNING, pStaticInfo->pCIProfiles != NULL, NV_ERR_OBJECT_NOT_FOUND); + // Assertion for catching overflow of bitmask early + NV_ASSERT_OR_RETURN(pStaticInfo->pCIProfiles->profileCount < 32, NV_ERR_INVALID_STATE); + + indexMask = 0x0; for (i = 0; i < pStaticInfo->pCIProfiles->profileCount; i++) { if (pStaticInfo->pCIProfiles->profiles[i].smCount == smCount) { - portMemCopy(pProfile, sizeof(*pProfile), &pStaticInfo->pCIProfiles->profiles[i], sizeof(pStaticInfo->pCIProfiles->profiles[i])); - return NV_OK; + indexMask |= NVBIT32(i); } } - NV_PRINTF(LEVEL_ERROR, "Found no Compute Profile for smCount=%d\n", smCount); - return NV_ERR_OBJECT_NOT_FOUND; + + index = portUtilCountTrailingZeros32(indexMask); + if (indexMask == 0x0) + { + NV_PRINTF(LEVEL_ERROR, "Found no Compute Profile for smCount=%d\n", smCount); + return NV_ERR_OBJECT_NOT_FOUND; + } + else if (nvPopCount32(indexMask) > 1) + { + NvU32 prevSlots = pStaticInfo->pCIProfiles->profiles[index].physicalSlots; + + // + // In the event there are multiple profiles with the same SM count, check to see if + // the profiles have matching physical slots. If they don't, then just return and + // let caller handle it. + // + FOR_EACH_INDEX_IN_MASK(32, i, indexMask) + { + if (prevSlots != pStaticInfo->pCIProfiles->profiles[i].physicalSlots) + { + NV_PRINTF(LEVEL_WARNING, "Profiles aliased. Falling back to GPC look-up\n"); + return NV_ERR_OBJECT_NOT_FOUND; + } + } + FOR_EACH_INDEX_IN_MASK_END + } + + // If all the aliased profiles share physical slots, take the first index (i.e. the smallest) profile. + portMemCopy(pProfile, sizeof(*pProfile), &pStaticInfo->pCIProfiles->profiles[index], sizeof(pStaticInfo->pCIProfiles->profiles[index])); + return NV_OK; } diff --git a/src/nvidia/src/kernel/gpu/mmu/arch/ampere/kern_gmmu_ga100.c b/src/nvidia/src/kernel/gpu/mmu/arch/ampere/kern_gmmu_ga100.c index a13c31d540..8c676e255b 100644 --- a/src/nvidia/src/kernel/gpu/mmu/arch/ampere/kern_gmmu_ga100.c +++ b/src/nvidia/src/kernel/gpu/mmu/arch/ampere/kern_gmmu_ga100.c @@ -128,8 +128,8 @@ kgmmuValidateFabricBaseAddress_GA100 return NV_OK; } -NV_STATUS -kgmmuSetupWarForBug2720120_GA100 +static NV_STATUS +kgmmuSetupWarForBug2720120FmtFamily_GA100 ( KernelGmmu *pKernelGmmu, GMMU_FMT_FAMILY *pFam @@ -138,22 +138,15 @@ kgmmuSetupWarForBug2720120_GA100 NV_STATUS status = NV_OK; OBJGPU *pGpu = ENG_GET_GPU(pKernelGmmu); KernelBus *pKernelBus = GPU_GET_KERNEL_BUS(pGpu); + MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); const GMMU_FMT *pFmt = kgmmuFmtGet(pKernelGmmu, GMMU_FMT_VERSION_DEFAULT, 0); const MMU_FMT_LEVEL *pPageDir1 = mmuFmtFindLevelWithPageShift(pFmt->pRoot, 29); const MMU_FMT_LEVEL *pPageDir0 = mmuFmtFindLevelWithPageShift(pFmt->pRoot, 21); const MMU_FMT_LEVEL *pSmallPT = mmuFmtFindLevelWithPageShift(pFmt->pRoot, 12); const GMMU_FMT_PDE *pPde0Fmt = gmmuFmtGetPde(pFmt, pPageDir0, 1); const GMMU_FMT_PDE *pPde1Fmt = gmmuFmtGetPde(pFmt, pPageDir1, 0); - NvU8 *pMap = NULL; - void *pPriv = NULL; - NvU32 sizeOfDWord = sizeof(NvU32); - RmPhysAddr physAddr; - RmPhysAddr physAddrOrig; - NvU64 sizeInDWord; - NvU32 bar0Addr; NvU32 entryIndex; NvU32 entryIndexHi; - NvU32 entryOffset; // // BAR2 is not yet initialized. Thus use either the BAR0 window or @@ -176,32 +169,9 @@ kgmmuSetupWarForBug2720120_GA100 pKernelGmmu->pWarSmallPageTable); NV_ASSERT_OK_OR_GOTO(status, status, failed); - switch (memdescGetAddressSpace(pKernelGmmu->pWarSmallPageTable)) - { - case ADDR_FBMEM: - memUtilsMemSetNoBAR2(pGpu, pKernelGmmu->pWarSmallPageTable, 0); - break; - - case ADDR_SYSMEM: - // Plain old memmap. - NV_ASSERT_OK_OR_GOTO(status, memdescMapOld(pKernelGmmu->pWarSmallPageTable, 0, - pKernelGmmu->pWarSmallPageTable->Size, - NV_TRUE, // kernel, - NV_PROTECT_READ_WRITE, - (void **)&pMap, - &pPriv), failed); - - portMemSet(pMap, 0, pKernelGmmu->pWarSmallPageTable->Size); - - memdescUnmapOld(pKernelGmmu->pWarSmallPageTable, 1, 0, pMap, pPriv); - break; - - default: - // Should not happen. - status = NV_ERR_INVALID_ARGUMENT; - NV_ASSERT_OR_GOTO(status == NV_OK, failed); - break; - } + NV_ASSERT_OK_OR_GOTO(status, + memmgrMemDescMemSet(pMemoryManager, pKernelGmmu->pWarSmallPageTable, 0, TRANSFER_FLAGS_NONE), + failed); // The WAR PDE0 points to the small page table allocated above { @@ -235,80 +205,14 @@ kgmmuSetupWarForBug2720120_GA100 NV_ASSERT_OK_OR_GOTO(status, status, failed); entryIndexHi = mmuFmtLevelEntryCount(pPageDir0) - 1; - switch (memdescGetAddressSpace(pKernelGmmu->pWarPageDirectory0)) + for (entryIndex = 0; entryIndex <= entryIndexHi; entryIndex++) { - case ADDR_FBMEM: - // - // Set the BAR0 window to encompass the given surface while - // saving off the location to where the BAR0 window was - // previously pointing. - // - physAddr = memdescGetPhysAddr(pKernelGmmu->pWarPageDirectory0, AT_GPU, 0); - NV_ASSERT_OR_GOTO(NV_IS_ALIGNED64(physAddr, sizeOfDWord), failed); - - physAddrOrig = kbusGetBAR0WindowVidOffset_HAL(pGpu, pKernelBus); - NV_ASSERT_OK_OR_GOTO(status, - kbusSetBAR0WindowVidOffset_HAL(pGpu, - pKernelBus, - physAddr & ~0xffffULL), - failed); - - bar0Addr = NvU64_LO32(kbusGetBAR0WindowAddress_HAL(pKernelBus) + - (physAddr - kbusGetBAR0WindowVidOffset_HAL(pGpu, pKernelBus))); - - // - // Iterate and initialize the given surface with BAR0 - // writes. - // - sizeInDWord = (NvU32)NV_DIV_AND_CEIL(pPageDir0->entrySize, sizeOfDWord); - for (entryIndex = 0; entryIndex <= entryIndexHi; entryIndex++) - { - entryOffset = entryIndex * pPageDir0->entrySize; - NvU32 i; - for (i = 0; i < sizeInDWord; i++) - { - GPU_REG_WR32(pGpu, - bar0Addr + entryOffset + (sizeOfDWord * i), - pFam->bug2720120WarPde0.v32[i]); - } - } - - // Restore where the BAR0 window was previously pointing to - NV_ASSERT_OK_OR_GOTO(status, - kbusSetBAR0WindowVidOffset_HAL(pGpu, pKernelBus, - physAddrOrig), - failed); - - break; - - case ADDR_SYSMEM: - // Plain old memmap. - NV_ASSERT_OK_OR_GOTO(status, memdescMapOld(pKernelGmmu->pWarPageDirectory0, 0, - pKernelGmmu->pWarPageDirectory0->Size, - NV_TRUE, // kernel, - NV_PROTECT_READ_WRITE, - (void **)&pMap, - &pPriv), failed); - - for (entryIndex = 0; entryIndex <= entryIndexHi; entryIndex++) - { - entryOffset = entryIndex * pPageDir0->entrySize; - - // Memory-mapped write. - portMemCopy(pMap + entryOffset, - pPageDir0->entrySize, - pFam->bug2720120WarPde0.v8, - pPageDir0->entrySize); - } + TRANSFER_SURFACE pageDirEntry = + { .pMemDesc = pKernelGmmu->pWarPageDirectory0, .offset = entryIndex * pPageDir0->entrySize }; - memdescUnmapOld(pKernelGmmu->pWarPageDirectory0, 1, 0, pMap, pPriv); - break; - - default: - // Should not happen. - status = NV_ERR_INVALID_ARGUMENT; - NV_ASSERT_OR_GOTO(status == NV_OK, failed); - break; + NV_ASSERT_OK_OR_GOTO(status, memmgrMemWrite(pMemoryManager, &pageDirEntry, pFam->bug2720120WarPde0.v8, + pPageDir0->entrySize, TRANSFER_FLAGS_NONE), + failed); } // The WAR PDE1 points to the PD0 instance allocated above @@ -347,6 +251,33 @@ kgmmuSetupWarForBug2720120_GA100 return status; } +NV_STATUS +kgmmuSetupWarForBug2720120_GA100 +( + KernelGmmu *pKernelGmmu +) +{ + NvU32 v; + GMMU_FMT_FAMILY *pFam; + + if (pKernelGmmu->pWarPageDirectory0 != NULL) + return NV_OK; + + for (v = 0; v < GMMU_FMT_MAX_VERSION_COUNT; ++v) + { + pFam = pKernelGmmu->pFmtFamilies[v]; + if (NULL != pFam) + { + if (kgmmuIsBug2720120WarEnabled(pKernelGmmu)) + { + NV_ASSERT_OK_OR_RETURN(kgmmuSetupWarForBug2720120FmtFamily_GA100(pKernelGmmu, pFam)); + } + } + } + + return NV_OK; +} + /*! * @brief Get the engine ID associated with the max CE * diff --git a/src/nvidia/src/kernel/gpu/mmu/arch/maxwell/kern_gmmu_gm107.c b/src/nvidia/src/kernel/gpu/mmu/arch/maxwell/kern_gmmu_gm107.c index 9bf53b3755..02c82d0229 100644 --- a/src/nvidia/src/kernel/gpu/mmu/arch/maxwell/kern_gmmu_gm107.c +++ b/src/nvidia/src/kernel/gpu/mmu/arch/maxwell/kern_gmmu_gm107.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -43,6 +43,42 @@ kgmmuGetBigPageSize_GM107(KernelGmmu *pKernelGmmu) return pKernelGmmu->defaultBigPageSize; } +NV_STATUS +kgmmuCommitInvalidateTlbTest_GM107 +( + OBJGPU *pGpu, + KernelGmmu *pKernelGmmu, + COMMIT_TLB_INVALIDATE_TEST_PARAMS *pTestParams +) +{ + TLB_INVALIDATE_PARAMS params; + NvU32 regVal = 0; + + if (pTestParams->invalidateAll != NV_TRUE) + { + return NV_ERR_NOT_SUPPORTED; + } + + portMemSet(¶ms, 0, sizeof(TLB_INVALIDATE_PARAMS)); + params.gfid = pTestParams->gfid; + gpuSetTimeout(pGpu, GPU_TIMEOUT_DEFAULT, ¶ms.timeout, + GPU_TIMEOUT_FLAGS_BYPASS_THREAD_STATE | + GPU_TIMEOUT_FLAGS_DEFAULT | GPU_TIMEOUT_FLAGS_BYPASS_CPU_YIELD); + + NV_ASSERT_OK_OR_RETURN(kgmmuCheckPendingInvalidates_HAL(pGpu, pKernelGmmu, + ¶ms.timeout, + params.gfid)); + + // Invalidate all VA and PDB + regVal = DRF_DEF(_PFB_PRI, _MMU_INVALIDATE, _ALL_VA, _TRUE) | + DRF_DEF(_PFB_PRI, _MMU_INVALIDATE, _ALL_PDB, _TRUE) | + DRF_DEF(_PFB_PRI, _MMU_INVALIDATE, _TRIGGER, _TRUE); + + params.regVal = regVal; + + return kgmmuCommitTlbInvalidate_HAL(pGpu, pKernelGmmu, ¶ms); +} + /*! * @brief Unicast GMMU TLB invalidate. * diff --git a/src/nvidia/src/kernel/gpu/mmu/arch/turing/kern_gmmu_tu102.c b/src/nvidia/src/kernel/gpu/mmu/arch/turing/kern_gmmu_tu102.c index 103286ac7c..d77e8a7c8c 100644 --- a/src/nvidia/src/kernel/gpu/mmu/arch/turing/kern_gmmu_tu102.c +++ b/src/nvidia/src/kernel/gpu/mmu/arch/turing/kern_gmmu_tu102.c @@ -159,40 +159,6 @@ kgmmuSetPdbToInvalidate_TU102 } } -/** - * @brief Initialize the GMMU format families. - * @details Turing supports PA based comptagline allocation policy - * - * @param[in] pGpu - * @param[in] pKernelGmmu - */ -NV_STATUS -kgmmuFmtFamiliesInit_TU102(OBJGPU *pGpu, KernelGmmu *pKernelGmmu) -{ - extern NV_STATUS kgmmuFmtFamiliesInit_GV100(OBJGPU *pGpu, KernelGmmu *pKernelGmmu); - - NvU32 v; - NV_STATUS result; - GMMU_FMT_FAMILY *pFam; - - for (v = 0; v < GMMU_FMT_MAX_VERSION_COUNT; ++v) - { - pFam = pKernelGmmu->pFmtFamilies[v]; - if (NULL != pFam) - { - if (kgmmuIsBug2720120WarEnabled(pKernelGmmu)) - { - NV_ASSERT_OK_OR_RETURN(kgmmuSetupWarForBug2720120_HAL(pKernelGmmu, pFam)); - } - } - } - - // inherit former FmtFamilies setup procedure - result = kgmmuFmtFamiliesInit_GV100(pGpu, pKernelGmmu); - - return result; -} - /*! * @brief Set membar parameters for tlb invalidation and return * any additional sysmembar flushes that is required after tlb invalidation diff --git a/src/nvidia/src/kernel/gpu/mmu/arch/volta/kern_gmmu_gv100.c b/src/nvidia/src/kernel/gpu/mmu/arch/volta/kern_gmmu_gv100.c index 53454a3e7f..75f9b9c063 100644 --- a/src/nvidia/src/kernel/gpu/mmu/arch/volta/kern_gmmu_gv100.c +++ b/src/nvidia/src/kernel/gpu/mmu/arch/volta/kern_gmmu_gv100.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -834,11 +834,13 @@ _kgmmuCopyFaultPktInShadowBuf_GV100 // Non-Replayable copies always need to succeed. // NV_ASSERT_OR_RETURN(type == REPLAYABLE_FAULT_BUFFER, NV_ERR_INVALID_STATE); + if (shadowBufPutIndex != origShadowBufPutIndex) { goto update_client_put; } + // Signal the caller that no copies have taken place. return NV_WARN_NOTHING_TO_DO; } diff --git a/src/nvidia/src/kernel/gpu/mmu/kern_gmmu.c b/src/nvidia/src/kernel/gpu/mmu/kern_gmmu.c index f4d3c94244..8c78a53d61 100644 --- a/src/nvidia/src/kernel/gpu/mmu/kern_gmmu.c +++ b/src/nvidia/src/kernel/gpu/mmu/kern_gmmu.c @@ -105,6 +105,17 @@ kgmmuConstructEngine_IMPL(OBJGPU *pGpu, KernelGmmu *pKernelGmmu, ENGDESCRIPTOR e NV_ASSERT_OK_OR_RETURN(kgmmuFmtInit(pKernelGmmu)); + // + // On vGPU, all hardware management is done by the host except for full SR-IOV. + // Thus, only do any further HW initialization on the host. + // + if (!(IS_VIRTUAL_WITHOUT_SRIOV(pGpu) || + (IS_VIRTUAL_WITH_SRIOV(pGpu) && gpuIsWarBug200577889SriovHeavyEnabled(pGpu)))) + { + // Init HAL specific features. + NV_ASSERT_OK_OR_RETURN(kgmmuFmtFamiliesInit_HAL(pGpu, pKernelGmmu)); + } + portMemSet(&pKernelGmmu->mmuFaultBuffer, 0, sizeof(pKernelGmmu->mmuFaultBuffer)); // Default placement for PDEs is in vidmem. @@ -134,17 +145,6 @@ _kgmmuInitStaticInfo RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); NV_STATUS status; - // - // On vGPU, all hardware management is done by the host except for full SR-IOV. - // Thus, only do any further HW initialization on the host. - // - if (!(IS_VIRTUAL_WITHOUT_SRIOV(pGpu) || - (IS_VIRTUAL_WITH_SRIOV(pGpu) && gpuIsWarBug200577889SriovHeavyEnabled(pGpu)))) - { - // Init HAL specific features. - NV_ASSERT_OK_OR_RETURN(kgmmuFmtFamiliesInit_HAL(pGpu, pKernelGmmu)); - } - pKernelGmmu->pStaticInfo = portMemAllocNonPaged(sizeof(*pKernelGmmu->pStaticInfo)); NV_CHECK_OR_RETURN(LEVEL_ERROR, pKernelGmmu->pStaticInfo != NULL, NV_ERR_INSUFFICIENT_RESOURCES); portMemSet(pKernelGmmu->pStaticInfo, 0, sizeof(*pKernelGmmu->pStaticInfo)); @@ -3157,3 +3157,21 @@ subdeviceCtrlCmdInternalGmmuUnregisterFaultBuffer_IMPL } return status; } + +NV_STATUS +subdeviceCtrlCmdGmmuCommitTlbInvalidate_IMPL +( + Subdevice *pSubdevice, + NV2080_CTRL_GMMU_COMMIT_TLB_INVALIDATE_PARAMS *pTlbInvalidateParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); + KernelGmmu *pKernelGmmu = GPU_GET_KERNEL_GMMU(pGpu); + COMMIT_TLB_INVALIDATE_TEST_PARAMS params; + + params.gfid = pTlbInvalidateParams->gfid; + params.invalidateAll = pTlbInvalidateParams->invalidateAll; + + return kgmmuCommitInvalidateTlbTest_HAL(pGpu, pKernelGmmu, ¶ms); + +} diff --git a/src/nvidia/src/kernel/gpu/nvjpg/kernel_nvjpg_engdesc.c b/src/nvidia/src/kernel/gpu/nvjpg/kernel_nvjpg_engdesc.c index d35c34e9bc..c51abacff6 100644 --- a/src/nvidia/src/kernel/gpu/nvjpg/kernel_nvjpg_engdesc.c +++ b/src/nvidia/src/kernel/gpu/nvjpg/kernel_nvjpg_engdesc.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2017-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2017-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/src/kernel/gpu/nvlink/arch/hopper/kernel_nvlink_gh100.c b/src/nvidia/src/kernel/gpu/nvlink/arch/hopper/kernel_nvlink_gh100.c index 968ca28251..60d03beb18 100644 --- a/src/nvidia/src/kernel/gpu/nvlink/arch/hopper/kernel_nvlink_gh100.c +++ b/src/nvidia/src/kernel/gpu/nvlink/arch/hopper/kernel_nvlink_gh100.c @@ -111,39 +111,6 @@ knvlinkValidateFabricBaseAddress_GH100 return NV_OK; } -/*! - * @brief Validates fabric EGM base address. - * - * @param[in] pGpu OBJGPU pointer - * @param[in] pKernelNvlink KernelNvlink pointer - * @param[in] fabricEgmBaseAddr Address to be validated - * - * @returns On success, NV_OK. - * On failure, returns NV_ERR_XXX. - */ -NV_STATUS -knvlinkValidateFabricEgmBaseAddress_GH100 -( - OBJGPU *pGpu, - KernelNvlink *pKernelNvlink, - NvU64 fabricEgmBaseAddr -) -{ - // - // Hopper SKUs will be paired with NVSwitches supporting 2K - // mapslots that can cover 512GB each. Make sure that the EGM fabric base - // address being used is valid to cover whole frame buffer. - // - - // Check if fabric EGM address is aligned to mapslot size. - if (fabricEgmBaseAddr & (NVBIT64(39) - 1)) - { - return NV_ERR_INVALID_ARGUMENT; - } - - return NV_OK; -} - /*! * @brief Do post setup on nvlink peers * @@ -354,15 +321,23 @@ NV_STATUS knvlinkLogAliDebugMessages_GH100 ( OBJGPU *pGpu, - KernelNvlink *pKernelNvlink + KernelNvlink *pKernelNvlink, + NvBool bFinal ) { - NV2080_CTRL_NVLINK_GET_ERR_INFO_PARAMS *nvlinkErrInfoParams = portMemAllocNonPaged(sizeof(NV2080_CTRL_NVLINK_GET_ERR_INFO_PARAMS)); - portMemSet(nvlinkErrInfoParams, 0, sizeof(NV2080_CTRL_NVLINK_GET_ERR_INFO_PARAMS)); - nvlinkErrInfoParams->ErrInfoFlags |= NV2080_CTRL_NVLINK_ERR_INFO_FLAGS_ALI_STATUS; + NV2080_CTRL_NVLINK_GET_ERR_INFO_PARAMS *nvlinkErrInfoParams; NvU32 i; // This is a Physical, Hopper specific HAL for debug purposes. - NV_STATUS status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, + NV_STATUS status; + + if (bFinal) + return NV_OK; + + nvlinkErrInfoParams = portMemAllocNonPaged(sizeof(NV2080_CTRL_NVLINK_GET_ERR_INFO_PARAMS)); + portMemSet(nvlinkErrInfoParams, 0, sizeof(NV2080_CTRL_NVLINK_GET_ERR_INFO_PARAMS)); + nvlinkErrInfoParams->ErrInfoFlags |= NV2080_CTRL_NVLINK_ERR_INFO_FLAGS_ALI_STATUS; + + status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, NV2080_CTRL_CMD_NVLINK_GET_ERR_INFO, (void *)nvlinkErrInfoParams, sizeof(NV2080_CTRL_NVLINK_GET_ERR_INFO_PARAMS)); @@ -679,82 +654,6 @@ knvlinkClearUniqueFabricBaseAddress_GH100 pKernelNvlink->fabricBaseAddr = NVLINK_INVALID_FABRIC_ADDR; } -/*! - * @brief Set unique EGM fabric base address for NVSwitch enabled systems. - * - * @param[in] pGpu OBJGPU pointer - * @param[in] pKernelNvlink KernelNvlink pointer - * @param[in] fabricEgmBaseAddr EGM Fabric Address to set - * - * @returns On success, sets unique EGM fabric address and returns NV_OK. - * On failure, returns NV_ERR_XXX. - */ -NV_STATUS -knvlinkSetUniqueFabricEgmBaseAddress_GH100 -( - OBJGPU *pGpu, - KernelNvlink *pKernelNvlink, - NvU64 fabricEgmBaseAddr -) -{ - NV_STATUS status = NV_OK; - - status = knvlinkValidateFabricEgmBaseAddress_HAL(pGpu, pKernelNvlink, - fabricEgmBaseAddr); - if (status != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, "EGM Fabric base addr validation failed for GPU %x\n", - pGpu->gpuInstance); - return status; - } - - if (IsSLIEnabled(pGpu)) - { - NV_PRINTF(LEVEL_ERROR, - "Operation is unsupported on SLI enabled GPU %x\n", - pGpu->gpuInstance); - return NV_ERR_NOT_SUPPORTED; - } - - if (pKernelNvlink->fabricEgmBaseAddr == fabricEgmBaseAddr) - { - NV_PRINTF(LEVEL_INFO, - "The same EGM fabric base addr is being re-assigned to GPU %x\n", - pGpu->gpuInstance); - return NV_OK; - } - - if (pKernelNvlink->fabricEgmBaseAddr != NVLINK_INVALID_FABRIC_ADDR) - { - NV_PRINTF(LEVEL_ERROR, "EGM Fabric base addr is already assigned to GPU %x\n", - pGpu->gpuInstance); - return NV_ERR_STATE_IN_USE; - } - - pKernelNvlink->fabricEgmBaseAddr = fabricEgmBaseAddr; - - NV_PRINTF(LEVEL_INFO, "EGM Fabric base addr %llx is assigned to GPU %x\n", - pKernelNvlink->fabricEgmBaseAddr, pGpu->gpuInstance); - - return NV_OK; -} - -/*! - * @brief Clear unique EGM fabric base address for NVSwitch enabled systems. - * - * @param[in] pGpu OBJGPU pointer - * @param[in] pKernelNvlink KernelNvlink pointer - */ -void -knvlinkClearUniqueFabricEgmBaseAddress_GH100 -( - OBJGPU *pGpu, - KernelNvlink *pKernelNvlink -) -{ - pKernelNvlink->fabricEgmBaseAddr = NVLINK_INVALID_FABRIC_ADDR; -} - /*! * @brief Check if system has enough active NVLinks and * enough NVLink bridges diff --git a/src/nvidia/src/kernel/gpu/nvlink/common_nvlinkapi.c b/src/nvidia/src/kernel/gpu/nvlink/common_nvlinkapi.c index a317c7bd0d..4edb88a907 100644 --- a/src/nvidia/src/kernel/gpu/nvlink/common_nvlinkapi.c +++ b/src/nvidia/src/kernel/gpu/nvlink/common_nvlinkapi.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -62,6 +62,24 @@ subdeviceCtrlCmdBusGetNvlinkCaps_IMPL return nvlinkCtrlCmdBusGetNvlinkCaps(pGpu, pParams); } +NV_STATUS +subdeviceCtrlCmdBusGetNvlinkCaps_VF +( + Subdevice *pSubdevice, + NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS *pParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); + VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); + + NV_ASSERT_OR_RETURN(pVSI != NULL, NV_ERR_INVALID_STATE); + + portMemCopy(pParams, sizeof(*pParams), + &pVSI->nvlinkCaps, sizeof(pVSI->nvlinkCaps)); + + return NV_OK; +} + static void _calculateNvlinkCaps ( OBJGPU *pGpu, @@ -325,7 +343,6 @@ static _getNvlinkStatus case NV2080_CTRL_NVLINK_CAPS_NVLINK_VERSION_2_0: RMCTRL_SET_CAP(tempCaps, NV2080_CTRL_NVLINK_CAPS, _POWER_STATE_L0); break; - case NV2080_CTRL_NVLINK_CAPS_NVLINK_VERSION_4_0: case NV2080_CTRL_NVLINK_CAPS_NVLINK_VERSION_3_1: case NV2080_CTRL_NVLINK_CAPS_NVLINK_VERSION_3_0: @@ -422,6 +439,10 @@ static _getNvlinkStatus pParams->linkInfo[i].nvlinkRefClkType = pLinkAndClockValues->nvlinkRefClkType; pParams->linkInfo[i].nvlinkRefClkSpeedMhz = pLinkAndClockValues->nvlinkReqLinkClockMhz; + pParams->linkInfo[i].nvlinkMinL1Threshold = pLinkAndClockValues->nvlinkMinL1Threshold; + pParams->linkInfo[i].nvlinkMaxL1Threshold = pLinkAndClockValues->nvlinkMaxL1Threshold; + pParams->linkInfo[i].nvlinkL1ThresholdUnits = pLinkAndClockValues->nvlinkL1ThresholdUnits; + if (nvlinkLinks[i].bConnected) { pParams->linkInfo[i].connected = NV2080_CTRL_NVLINK_STATUS_CONNECTED_TRUE; diff --git a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlink.c b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlink.c index 126722ecf5..bbfbce642a 100644 --- a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlink.c +++ b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlink.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -269,68 +269,6 @@ _knvlinkCheckFabricCliqueId return NV_TRUE; } -/*! - * @brief Checks whether EGM addresses are valid for P2P - * when GPU is connected to NVSwitch - * - * @param[in] pGpu OBJGPU pointer for local GPU - * @param[in] pKernelNvlink KernelNvlink pointer - * @param[in] pPeerGpu OBJGPU pointer for remote GPU - * - * @return NV_TRUE if EGM addresses are valid - */ -static NvBool -_knvlinkCheckNvswitchEgmAddressSanity -( - OBJGPU *pGpu, - KernelNvlink *pKernelNvlink, - OBJGPU *pPeerGpu -) -{ - NvU64 egmRangeStart = knvlinkGetUniqueFabricEgmBaseAddress(pGpu, pKernelNvlink); - - if (knvlinkIsGpuConnectedToNvswitch(pGpu, pKernelNvlink)) - { - if (gpuIsSriovEnabled(pGpu)) - { - // currently vgpu + switch doesn't support GPA addressing. - return NV_TRUE; - } - - if (gpuFabricProbeIsSupported(pGpu) && gpuFabricProbeIsSupported(pPeerGpu)) - { - if (!_knvlinkCheckFabricCliqueId(pGpu, pPeerGpu)) - { - return NV_FALSE; - } - } - - // Sanity checks for EGM address - if (egmRangeStart == NVLINK_INVALID_FABRIC_ADDR) - { - NV_PRINTF(LEVEL_ERROR, "GPU %d doesn't have a EGM fabric address\n", - gpuGetInstance(pGpu)); - - return NV_FALSE; - } - } - else - { - // Sanity check for EGM address - if (egmRangeStart != NVLINK_INVALID_FABRIC_ADDR) - { - NV_PRINTF(LEVEL_ERROR, - "non-NVSwitch GPU %d has a valid EGM fabric address\n", - gpuGetInstance(pGpu)); - - return NV_FALSE; - } - - } - - return NV_TRUE; -} - /*! * @brief Checks whether necessary the config setup is done to * support P2P over NVSwitch @@ -350,10 +288,10 @@ knvlinkCheckNvswitchP2pConfig_IMPL ) { MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - NvU64 hbmRangeStart = knvlinkGetUniqueFabricBaseAddress(pGpu, pKernelNvlink); - NvU64 hbmRangeEnd = hbmRangeStart + (pMemoryManager->Ram.fbTotalMemSizeMb << 20); - NvU64 hbmPeerRangeStart = knvlinkGetUniqueFabricBaseAddress(pPeerGpu, - GPU_GET_KERNEL_NVLINK(pPeerGpu)); + NvU64 rangeStart = knvlinkGetUniqueFabricBaseAddress(pGpu, pKernelNvlink); + NvU64 rangeEnd = rangeStart + (pMemoryManager->Ram.fbTotalMemSizeMb << 20); + NvU64 peerRangeStart = knvlinkGetUniqueFabricBaseAddress(pPeerGpu, + GPU_GET_KERNEL_NVLINK(pPeerGpu)); if (knvlinkIsGpuConnectedToNvswitch(pGpu, pKernelNvlink)) { @@ -371,8 +309,8 @@ knvlinkCheckNvswitchP2pConfig_IMPL } } - // Sanity checks for HBM addresses - if (hbmRangeStart == NVLINK_INVALID_FABRIC_ADDR) + if (knvlinkGetUniqueFabricBaseAddress(pGpu, pKernelNvlink) == + NVLINK_INVALID_FABRIC_ADDR) { NV_PRINTF(LEVEL_ERROR, "GPU %d doesn't have a fabric address\n", gpuGetInstance(pGpu)); @@ -381,7 +319,7 @@ knvlinkCheckNvswitchP2pConfig_IMPL } if ((pGpu != pPeerGpu) && - ((hbmPeerRangeStart >= hbmRangeStart) && (hbmPeerRangeStart < hbmRangeEnd))) + ((peerRangeStart >= rangeStart) && (peerRangeStart < rangeEnd))) { NV_PRINTF(LEVEL_ERROR, "GPU %d doesn't have a unique fabric address\n", @@ -392,8 +330,8 @@ knvlinkCheckNvswitchP2pConfig_IMPL } else { - // Sanity check for HBM address - if (hbmRangeStart != NVLINK_INVALID_FABRIC_ADDR) + if (knvlinkGetUniqueFabricBaseAddress(pGpu, pKernelNvlink) != + NVLINK_INVALID_FABRIC_ADDR) { NV_PRINTF(LEVEL_ERROR, "non-NVSwitch GPU %d has a valid fabric address\n", @@ -403,11 +341,6 @@ knvlinkCheckNvswitchP2pConfig_IMPL } } - if (memmgrIsLocalEgmEnabled(pMemoryManager)) - { - return _knvlinkCheckNvswitchEgmAddressSanity(pGpu, pKernelNvlink, pPeerGpu); - } - return NV_TRUE; } @@ -693,7 +626,7 @@ const static NVLINK_INBAND_MSG_CALLBACK nvlink_inband_callbacks[] = .messageType = NVLINK_INBAND_MSG_TYPE_MC_TEAM_SETUP_RSP, .pCallback = memorymulticastfabricTeamSetupResponseCallback, .wqItemFlags = OS_QUEUE_WORKITEM_FLAGS_LOCK_SEMA | - OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS_RW + OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS }, { @@ -1040,25 +973,33 @@ knvlinkGetPeersNvlinkMaskFromHshub_IMPL NvU32 peerLinkMask = 0; NvU32 i; - NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_INFO_PARAMS params; + NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_INFO_PARAMS *pParams; - portMemSet(¶ms, 0, sizeof(params)); - params.linkMask = pKernelNvlink->enabledLinks; + pParams = portMemAllocStackOrHeap(sizeof(*pParams)); + if (pParams == NULL) + { + return 0; + } + + portMemSet(pParams, 0, sizeof(*pParams)); + pParams->linkMask = pKernelNvlink->enabledLinks; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, NV2080_CTRL_CMD_NVLINK_GET_LINK_AND_CLOCK_INFO, - (void *)¶ms, sizeof(params)); + pParams, sizeof(*pParams)); if (status != NV_OK) - return 0; + goto cleanup; // Scan enabled links for peer connections FOR_EACH_INDEX_IN_MASK(32, i, pKernelNvlink->enabledLinks) { - if (params.linkInfo[i].bLinkConnectedToPeer) + if (pParams->linkInfo[i].bLinkConnectedToPeer) peerLinkMask |= NVBIT(i); } FOR_EACH_INDEX_IN_MASK_END; +cleanup: + portMemFreeStackOrHeap(pParams); return peerLinkMask; } @@ -1733,6 +1674,7 @@ knvlinkUpdatePostRxDetectLinkMask_IMPL ) { NV_STATUS status = NV_OK; + NvU32 i; NV2080_CTRL_NVLINK_GET_LINK_MASK_POST_RX_DET_PARAMS params; @@ -1749,6 +1691,12 @@ knvlinkUpdatePostRxDetectLinkMask_IMPL pKernelNvlink->postRxDetLinkMask = params.postRxDetLinkMask; + FOR_EACH_INDEX_IN_MASK(32, i, pKernelNvlink->enabledLinks) + { + pKernelNvlink->nvlinkLinks[i].laneRxdetStatusMask = params.laneRxdetStatusMask[i]; + } + FOR_EACH_INDEX_IN_MASK_END; + return NV_OK; } @@ -1778,7 +1726,7 @@ knvlinkCopyNvlinkDeviceInfo_IMPL if (status == NV_ERR_NOT_SUPPORTED) { - NV_PRINTF(LEVEL_WARNING, "NVLink is unavailable\n"); + NV_PRINTF(LEVEL_INFO, "NVLink is unavailable\n"); return status; } else if (status != NV_OK) @@ -1986,8 +1934,6 @@ knvlinkSyncLaneShutdownProps_IMPL portMemSet(¶ms, 0, sizeof(params)); - params.bLaneShutdownEnabled = - pKernelNvlink->getProperty(pKernelNvlink, PDB_PROP_KNVLINK_LANE_SHUTDOWN_ENABLED); params.bLaneShutdownOnUnload = pKernelNvlink->getProperty(pKernelNvlink, PDB_PROP_KNVLINK_LANE_SHUTDOWN_ON_UNLOAD); diff --git a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkapi.c b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkapi.c index 57b574a17e..aa44b4b776 100644 --- a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkapi.c +++ b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkapi.c @@ -238,3 +238,4 @@ subdeviceCtrlCmdNvlinkSetNvlinkPeer_IMPL return status; } + diff --git a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelib.c b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelib.c index 5606fc31fa..3a54fb4324 100644 --- a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelib.c +++ b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelib.c @@ -208,8 +208,8 @@ knvlinkCoreAddDevice_IMPL dev->pciInfo.device = gpuGetDevice(pGpu); dev->pciInfo.function = 0; dev->pciInfo.pciDeviceId = pGpu->idInfo.PCIDeviceID; - dev->pciInfo.bars[0].baseAddr = pGpu->pKernelBus->pciBars[0]; - dev->pciInfo.bars[0].barSize = pGpu->pKernelBus->pciBarSizes[0]; + dev->pciInfo.bars[0].baseAddr = GPU_GET_KERNEL_BUS(pGpu)->pciBars[0]; + dev->pciInfo.bars[0].barSize = GPU_GET_KERNEL_BUS(pGpu)->pciBarSizes[0]; dev->initialized = 1; dev->enableALI = pKernelNvlink->bEnableAli; dev->numIoctrls = nvPopCount32(pKernelNvlink->ioctrlMask); diff --git a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelibcallback.c b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelibcallback.c index 3a6d5683a4..4a9018f8ef 100644 --- a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelibcallback.c +++ b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelibcallback.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -556,7 +556,7 @@ knvlinkCoreSetDlLinkModeCallback pSetDlLinkModeParams->linkMode = NV2080_NVLINK_CORE_LINK_STATE_INITPHASE1; - if (pKernelIoctrl->getProperty(pKernelIoctrl, PDB_PROP_KIOCTRL_MINION_CACHE_SEEDS)) + if ((pKernelIoctrl != NULL) && pKernelIoctrl->getProperty(pKernelIoctrl, PDB_PROP_KIOCTRL_MINION_CACHE_SEEDS)) { NvU32 *seedDataSrc = pKernelNvlink->nvlinkLinks[linkIndex].core_link->seedData; NvU32 *seedDataDest = @@ -689,7 +689,7 @@ knvlinkCoreSetDlLinkModeCallback } case NVLINK_LINKSTATE_OFF: { - if (pKernelIoctrl->getProperty(pKernelIoctrl, PDB_PROP_KIOCTRL_MINION_CACHE_SEEDS)) + if ((pKernelIoctrl != NULL) && pKernelIoctrl->getProperty(pKernelIoctrl, PDB_PROP_KIOCTRL_MINION_CACHE_SEEDS)) { NvU32 *seedDataSrc = pSetDlLinkModeParams->linkModeParams.linkModeOffParams.seedData; NvU32 *seedDataDest = pKernelNvlink->nvlinkLinks[linkIndex].core_link->seedData; diff --git a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelibtrain.c b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelibtrain.c index 43df2eba4d..83f59cadda 100644 --- a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelibtrain.c +++ b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelibtrain.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -175,7 +175,8 @@ knvlinkCoreGetRemoteDeviceInfo_IMPL // if (!conn_info.bConnected && (bNvswitchProxyPresent || - GPU_IS_NVSWITCH_DETECTED(pGpu))) + (!pSys->getProperty(pSys, PDB_PROP_SYS_NVSWITCH_IS_PRESENT) && + GPU_IS_NVSWITCH_DETECTED(pGpu)))) { conn_info.bConnected = NV_TRUE; conn_info.deviceType = NVLINK_DEVICE_TYPE_NVSWITCH; @@ -460,7 +461,7 @@ knvlinkCheckTrainingIsComplete_IMPL if (nvlink_lib_check_training_complete(pLinks, count) != 0) { NV_PRINTF(LEVEL_INFO, "Links aren't fully trained yet!\n"); - knvlinkLogAliDebugMessages(pGpu0, pKernelNvlink0); + knvlinkLogAliDebugMessages(pGpu0, pKernelNvlink0, NV_FALSE); return NV_ERR_GENERIC; } @@ -515,7 +516,7 @@ knvlinkCheckTrainingIsComplete_IMPL if (nvlink_lib_check_training_complete(pLinks, count) != 0) { NV_PRINTF(LEVEL_INFO, "Links aren't fully trained yet!\n"); - knvlinkLogAliDebugMessages(pGpu1, pKernelNvlink1); + knvlinkLogAliDebugMessages(pGpu1, pKernelNvlink1, NV_FALSE); return NV_ERR_GENERIC; } @@ -1034,7 +1035,6 @@ knvlinkCoreShutdownDeviceLinks_IMPL OBJSYS *pSys = SYS_GET_INSTANCE(); NvU32 count = 0; NvU32 linkId; - NvlStatus status = NV_OK; // Skip link shutdown where fabric manager is present, for nvlink version bellow 4.0 if ((pKernelNvlink->ipVerNvlink < NVLINK_VERSION_40 && @@ -1097,23 +1097,13 @@ knvlinkCoreShutdownDeviceLinks_IMPL // Trigger laneshutdown through core lib if shutdown is supported if (pKernelNvlink->getProperty(pKernelNvlink, PDB_PROP_KNVLINK_LANE_SHUTDOWN_ENABLED) && (count > 0)) { - status = nvlink_lib_powerdown_links_from_active_to_off( - pLinks, count, NVLINK_STATE_CHANGE_SYNC); - if (status != NVL_SUCCESS) + if (nvlink_lib_powerdown_links_from_active_to_off( + pLinks, count, NVLINK_STATE_CHANGE_SYNC)) { - if (status == NVL_NOT_FOUND) - { - // Bug 4419022 - NV_PRINTF(LEVEL_ERROR, "Need to shutdown all links unilaterally for GPU%d\n", - pGpu->gpuInstance); - } - else - { - NV_PRINTF(LEVEL_ERROR, "Unable to turn off links for the GPU%d\n", + NV_PRINTF(LEVEL_ERROR, "Unable to turn off links for the GPU%d\n", pGpu->gpuInstance); - return NV_ERR_INVALID_STATE; - } + return NV_ERR_INVALID_STATE; } } diff --git a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkstate.c b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkstate.c index f3c0437d45..8d6c72e7ca 100644 --- a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkstate.c +++ b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkstate.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -987,10 +987,6 @@ _knvlinkPurgeState { if ((pKernelNvlink->nvlinkLinks[linkId].pTmrEvent != NULL) && (pTmr != NULL)) { - if (tmrEventOnList(pTmr, pKernelNvlink->nvlinkLinks[linkId].pTmrEvent)) - { - tmrEventCancel(pTmr, pKernelNvlink->nvlinkLinks[linkId].pTmrEvent); - } tmrEventDestroy(pTmr, pKernelNvlink->nvlinkLinks[linkId].pTmrEvent); pKernelNvlink->nvlinkLinks[linkId].pTmrEvent = NULL; } diff --git a/src/nvidia/src/kernel/gpu/perf/kern_perf_ctrl.c b/src/nvidia/src/kernel/gpu/perf/kern_perf_ctrl.c index 52bb4f984e..fdc4a3eb89 100644 --- a/src/nvidia/src/kernel/gpu/perf/kern_perf_ctrl.c +++ b/src/nvidia/src/kernel/gpu/perf/kern_perf_ctrl.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -35,49 +35,6 @@ /* ------------------------ Static Function Prototypes --------------------- */ /* ------------------------ Macros ----------------------------------------- */ /* ------------------------ Public Functions ------------------------------- */ -/*! - * @copydoc NV2080_CTRL_CMD_PERF_GET_GPUMON_PERFMON_UTIL_SAMPLES - * - * @params[in] pSubdevice - * @params[in/out] pParams - * - * @return NV_OK - * - * @return Other error - * Encountered un-expected error. - */ -NV_STATUS -subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamples_VF -( - Subdevice *pSubdevice, - NV2080_CTRL_PERF_GET_GPUMON_PERFMON_UTIL_SAMPLES_PARAM *pParams -) -{ - NV2080_CTRL_PERF_GPUMON_PERFMON_UTIL_SAMPLE *pSamples = NvP64_VALUE(pParams->pSamples); - CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); - RmCtrlParams *pRmCtrlParams = pCallContext->pControlParams; - OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); - NvU32 bufSize = pParams->bufSize; - NV_STATUS status = NV_OK; - - if (IS_MIG_ENABLED(pGpu)) - { - NV_PRINTF(LEVEL_ERROR, "Call not supported with SMC Enabled\n"); - return NV_ERR_NOT_SUPPORTED; - } - - NV_ASSERT_OR_RETURN(pSamples != NULL, NV_ERR_INVALID_ARGUMENT); - - NV_RM_RPC_GET_ENGINE_UTILIZATION(pGpu, - pRmCtrlParams->hClient, - pRmCtrlParams->hObject, - pRmCtrlParams->cmd, - pSamples, - bufSize, - status); - - return status; -} /*! * @copydoc NV2080_CTRL_CMD_PERF_GET_GPUMON_PERFMON_UTIL_SAMPLES_V2 diff --git a/src/nvidia/src/kernel/gpu/pmu/kern_pmu.c b/src/nvidia/src/kernel/gpu/pmu/kern_pmu.c index 1f538a4bcd..acbe5d63ec 100644 --- a/src/nvidia/src/kernel/gpu/pmu/kern_pmu.c +++ b/src/nvidia/src/kernel/gpu/pmu/kern_pmu.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +29,7 @@ ****************************************************************************/ #include "gpu/pmu/kern_pmu.h" +#include "gpu/fsp/kern_fsp.h" #include "gpu/mem_mgr/mem_mgr.h" NV_STATUS @@ -45,12 +46,6 @@ kpmuStateDestroy_IMPL KernelPmu *pKernelPmu ) { - if (pKernelPmu->pPmuRsvdMemdesc != NULL) - { - memdescFree(pKernelPmu->pPmuRsvdMemdesc); - memdescDestroy(pKernelPmu->pPmuRsvdMemdesc); - pKernelPmu->pPmuRsvdMemdesc = NULL; - } } void @@ -61,11 +56,46 @@ kpmuDestruct_IMPL(KernelPmu *pKernelPmu) kpmuFreeLibosLoggingStructures(pGpu, pKernelPmu); } -NvU32 kpmuReservedMemorySizeGet_IMPL +NvU32 +kpmuReservedMemorySizeGet_IMPL ( KernelPmu *pKernelPmu ) { + return NV_ALIGN_UP64( + kpmuReservedMemoryBackingStoreSizeGet(pKernelPmu) + + kpmuReservedMemorySurfacesSizeGet(pKernelPmu) + + kpmuReservedMemoryMiscSizeGet(pKernelPmu), + KPMU_RESERVED_MEMORY_ALIGNMENT); +} + +NvU32 +kpmuReservedMemoryBackingStoreSizeGet_IMPL +( + KernelPmu *pKernelPmu +) +{ + + return 0U; +} + +NvU32 +kpmuReservedMemorySurfacesSizeGet_IMPL +( + KernelPmu *pKernelPmu +) +{ + + return 0U; +} + +NvU32 +kpmuReservedMemoryMiscSizeGet_IMPL +( + KernelPmu *pKernelPmu +) +{ + return 0U; } diff --git a/src/nvidia/src/kernel/gpu/rc/kernel_rc_callback.c b/src/nvidia/src/kernel/gpu/rc/kernel_rc_callback.c index 8e75dd15b1..0b1664d99e 100644 --- a/src/nvidia/src/kernel/gpu/rc/kernel_rc_callback.c +++ b/src/nvidia/src/kernel/gpu/rc/kernel_rc_callback.c @@ -239,6 +239,7 @@ krcErrorInvokeCallback_IMPL NvU32 rcDiagRecOwner = RCDB_RCDIAG_DEFAULT_OWNER; NV_STATUS status; NvBool bReturn = NV_TRUE; + NvBool bCheckCallback; NV_ASSERT_OR_RETURN(!gpumgrGetBcEnabledStatus(pGpu), bReturn); NV_CHECK_OR_RETURN(LEVEL_ERROR, pKernelChannel != NULL, bReturn); @@ -280,7 +281,10 @@ krcErrorInvokeCallback_IMPL return bReturn; } - if (osCheckCallback(pGpu)) + bCheckCallback = + IS_GSP_CLIENT(pGpu) ? osCheckCallback_v2(pGpu) : osCheckCallback(pGpu); + + if (bCheckCallback) { RC_ERROR_CONTEXT *pRcErrorContext = NULL; Device *pDevice = GPU_RES_GET_DEVICE(pKernelChannel); @@ -319,17 +323,37 @@ krcErrorInvokeCallback_IMPL GPU_GET_KERNEL_GMMU(pGpu), pMmuExceptionData->faultType); } + else + { + // TODO: Set some default values + } } - clientAction = osRCCallback(pGpu, - RES_GET_CLIENT_HANDLE(pKernelChannel), - hDevice, - hFifo, - RES_GET_HANDLE(pKernelChannel), - exceptLevel, - exceptType, - (NvU32 *)pRcErrorContext, - &krcResetCallback); + if (IS_GSP_CLIENT(pGpu)) + { + clientAction = osRCCallback_v2(pGpu, + RES_GET_CLIENT_HANDLE(pKernelChannel), + hDevice, + hFifo, + RES_GET_HANDLE(pKernelChannel), + exceptLevel, + exceptType, + NV_FALSE, + (NvU32 *)pRcErrorContext, + &krcResetCallback); + } + else + { + clientAction = osRCCallback(pGpu, + RES_GET_CLIENT_HANDLE(pKernelChannel), + hDevice, + hFifo, + RES_GET_HANDLE(pKernelChannel), + exceptLevel, + exceptType, + (NvU32 *)pRcErrorContext, + &krcResetCallback); + } if (clientAction == RC_CALLBACK_IGNORE || clientAction == RC_CALLBACK_ISOLATE_NO_RESET) @@ -346,6 +370,20 @@ krcErrorInvokeCallback_IMPL // portMemFree(pRcErrorContext); } + else if (IS_GSP_CLIENT(pGpu) && clientAction == RC_CALLBACK_ISOLATE) + { + NV506F_CTRL_CMD_RESET_ISOLATED_CHANNEL_PARAMS params = {0}; + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pRcErrorContext->pGpu); + + // Client lock is already obtained above. + status = pRmApi->Control(pRmApi, + RES_GET_CLIENT_HANDLE(pKernelChannel), + RES_GET_HANDLE(pKernelChannel), + NV506F_CTRL_CMD_RESET_ISOLATED_CHANNEL, + ¶ms, + sizeof params); + } + bReturn = (clientAction != RC_CALLBACK_IGNORE); } else diff --git a/src/nvidia/src/kernel/gpu/rc/kernel_rc_ctrl.c b/src/nvidia/src/kernel/gpu/rc/kernel_rc_ctrl.c index 3ba2e34add..279170ba45 100644 --- a/src/nvidia/src/kernel/gpu/rc/kernel_rc_ctrl.c +++ b/src/nvidia/src/kernel/gpu/rc/kernel_rc_ctrl.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -69,56 +69,6 @@ subdeviceCtrlCmdRcReadVirtualMem_IMPL } -NV_STATUS -subdeviceCtrlCmdSetRcInfo_IMPL -( - Subdevice *pSubdevice, - NV2080_CTRL_CMD_RC_INFO_PARAMS *pParams -) -{ - OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); - KernelRc *pKernelRc = GPU_GET_KERNEL_RC(pGpu); - - if (!((pParams->rcBreak == NV2080_CTRL_CMD_RC_INFO_BREAK_DISABLE || - pParams->rcBreak == NV2080_CTRL_CMD_RC_INFO_BREAK_ENABLE) && - (pParams->rcMode == NV2080_CTRL_CMD_RC_INFO_MODE_DISABLE || - pParams->rcMode == NV2080_CTRL_CMD_RC_INFO_MODE_ENABLE))) - { - return NV_ERR_INVALID_ARGUMENT; - } - - pKernelRc->bBreakOnRc = (pParams->rcBreak == - NV2080_CTRL_CMD_RC_INFO_BREAK_ENABLE); - - pKernelRc->bRobustChannelsEnabled = (pParams->rcMode == - NV2080_CTRL_CMD_RC_INFO_MODE_ENABLE); - - return NV_OK; -} - - -NV_STATUS -subdeviceCtrlCmdGetRcInfo_IMPL -( - Subdevice *pSubdevice, - NV2080_CTRL_CMD_RC_INFO_PARAMS *pParams -) -{ - OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); - KernelRc *pKernelRc = GPU_GET_KERNEL_RC(pGpu); - - pParams->rcBreak = pKernelRc->bBreakOnRc ? - NV2080_CTRL_CMD_RC_INFO_BREAK_ENABLE : - NV2080_CTRL_CMD_RC_INFO_BREAK_DISABLE; - - pParams->rcMode = pKernelRc->bRobustChannelsEnabled ? - NV2080_CTRL_CMD_RC_INFO_MODE_ENABLE : - NV2080_CTRL_CMD_RC_INFO_MODE_DISABLE; - - return NV_OK; -} - - NV_STATUS krcSubdeviceCtrlGetErrorInfoCheckPermissions_KERNEL ( diff --git a/src/nvidia/src/kernel/gpu/rc/kernel_rc_notification.c b/src/nvidia/src/kernel/gpu/rc/kernel_rc_notification.c index 1e5790cf15..82a96aa1aa 100644 --- a/src/nvidia/src/kernel/gpu/rc/kernel_rc_notification.c +++ b/src/nvidia/src/kernel/gpu/rc/kernel_rc_notification.c @@ -431,9 +431,11 @@ krcErrorSendEventNotifications_KERNEL KernelRc *pKernelRc, KernelChannel *pKernelChannel, RM_ENGINE_TYPE rmEngineType, // unused + NvU32 exceptLevel, // unused NvU32 exceptType, RC_NOTIFIER_SCOPE scope, - NvU16 partitionAttributionId + NvU16 partitionAttributionId, + NvBool bOsRcCallbackNeeded // unused ) { NV_ASSERT_OR_RETURN(!gpumgrGetBcEnabledStatus(pGpu), NV_ERR_INVALID_STATE); diff --git a/src/nvidia/src/kernel/gpu/rc/kernel_rc_watchdog_ctrl.c b/src/nvidia/src/kernel/gpu/rc/kernel_rc_watchdog_ctrl.c index 76035ab472..83cec6067f 100644 --- a/src/nvidia/src/kernel/gpu/rc/kernel_rc_watchdog_ctrl.c +++ b/src/nvidia/src/kernel/gpu/rc/kernel_rc_watchdog_ctrl.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -120,14 +120,3 @@ subdeviceCtrlCmdRcReleaseWatchdogRequests_IMPL pSubdevice, RMAPI_RELEASE_ALL_REQUESTS); } - - -NV_STATUS subdeviceCtrlCmdInternalRcWatchdogTimeout_IMPL -( - Subdevice *pSubdevice -) -{ - OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); - krcWatchdogRecovery_HAL(pGpu, GPU_GET_KERNEL_RC(pGpu)); - return NV_OK; -} diff --git a/src/nvidia/src/kernel/gpu/spdm/arch/hopper/spdm_gh100.c b/src/nvidia/src/kernel/gpu/spdm/arch/hopper/spdm_gh100.c index 2e5b6a3105..c7a4f506c7 100644 --- a/src/nvidia/src/kernel/gpu/spdm/arch/hopper/spdm_gh100.c +++ b/src/nvidia/src/kernel/gpu/spdm/arch/hopper/spdm_gh100.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -43,6 +43,7 @@ #include "platform/sli/sli.h" #include "nvspdm_rmconfig.h" #include "published/hopper/gh100/dev_falcon_v4.h" +#include "nvmisc.h" #include "gpu/conf_compute/conf_compute.h" /* ------------------------ Macros ----------------------------------------- */ @@ -235,7 +236,7 @@ _spdmTriggerHeartbeat status = osQueueWorkItemWithFlags(pGpu, _spdmSendHeartbeat, pTmrEvent->pUserData, OS_QUEUE_WORKITEM_FLAGS_DONT_FREE_PARAMS | OS_QUEUE_WORKITEM_FLAGS_LOCK_API_RW | - OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS_RW); + OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS); ErrorExit: if (status != NV_OK && pGpu != NULL) @@ -1029,7 +1030,7 @@ spdmCheckConnection_GH100 } // Check all crypto algorithms match expected. - algoCheckCount = sizeof(g_SpdmAlgoCheckTable_GH100)/sizeof(SPDM_ALGO_CHECK_ENTRY); + algoCheckCount = NV_ARRAY_ELEMENTS(g_SpdmAlgoCheckTable_GH100); for (i = 0; i < algoCheckCount; i++) { @@ -1368,7 +1369,6 @@ spdmUnregisterFromHeartbeats_GH100 ErrorExit: // In any case, cancel any further heartbeats that might occur. Handles NULL gracefully. - tmrEventCancel(pTmr, pSpdm->pHeartbeatEvent); tmrEventDestroy(pTmr, pSpdm->pHeartbeatEvent); pSpdm->pHeartbeatEvent = NULL; pSpdm->heartbeatPeriodSec = 0; diff --git a/src/nvidia/src/kernel/gpu/spdm/arch/hopper/spdm_module.c b/src/nvidia/src/kernel/gpu/spdm/arch/hopper/spdm_module.c index 803f2b7fc6..c8aa49fa93 100644 --- a/src/nvidia/src/kernel/gpu/spdm/arch/hopper/spdm_module.c +++ b/src/nvidia/src/kernel/gpu/spdm/arch/hopper/spdm_module.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/src/kernel/gpu/subdevice/subdevice.c b/src/nvidia/src/kernel/gpu/subdevice/subdevice.c index d8b6305f88..60276969d9 100644 --- a/src/nvidia/src/kernel/gpu/subdevice/subdevice.c +++ b/src/nvidia/src/kernel/gpu/subdevice/subdevice.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -187,10 +187,12 @@ subdeviceDestruct_IMPL resGetFreeParams(staticCast(pSubdevice, RsResource), &pCallContext, NULL); // check for any pending client's timer notification for this subdevice - if (pSubdevice->notifyActions[NV2080_NOTIFIERS_TIMER] != NV2080_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE) + if ((pSubdevice->notifyActions[NV2080_NOTIFIERS_TIMER] != NV2080_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE) || + (pSubdevice->pTimerEvent != NULL)) { OBJTMR *pTmr = GPU_GET_TIMER(pGpu); - tmrCancelCallback(pTmr, pSubdevice); + tmrEventDestroy(pTmr, pSubdevice->pTimerEvent); + pSubdevice->pTimerEvent = NULL; pSubdevice->notifyActions[NV2080_NOTIFIERS_TIMER] = NV2080_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE; } @@ -272,6 +274,7 @@ subdeviceControlFilter_IMPL(Subdevice *pSubdevice, { case NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS: case NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS: + case NV2080_CTRL_CMD_NVLINK_INBAND_SEND_DATA: break; default: @@ -285,7 +288,6 @@ subdeviceControlFilter_IMPL(Subdevice *pSubdevice, case NV2080_CTRL_CMD_PERF_BOOST: case NV2080_CTRL_CMD_PERF_NOTIFY_VIDEOEVENT: case NV2080_CTRL_CMD_PERF_GET_CURRENT_PSTATE: - case NV2080_CTRL_CMD_PERF_GET_LEVEL_INFO: case NV2080_CTRL_CMD_PERF_GET_VID_ENG_PERFMON_SAMPLE: case NV2080_CTRL_CMD_PERF_GET_GPUMON_PERFMON_UTIL_SAMPLES_V2: case NV2080_CTRL_CMD_PERF_GET_POWERSTATE: diff --git a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_kernel.c b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_kernel.c index bee1d52a77..dae4e7aeed 100644 --- a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_kernel.c +++ b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_kernel.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2004-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2004-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -38,6 +38,7 @@ #include "nvVer.h" #include "gpu/bif/kernel_bif.h" #include "gpu/bus/kern_bus.h" +#include "gpu/gsp/gsp_static_config.h" #include "gpu/disp/kern_disp.h" #include "disp/nvfbc_session.h" #include "gpu/mmu/kern_gmmu.h" @@ -66,6 +67,7 @@ // bit to set when telling physical to fill in an info entry #define INDEX_FORWARD_TO_PHYSICAL 0x80000000 +ct_assert(INDEX_FORWARD_TO_PHYSICAL == DRF_NUM(2080, _CTRL_GPU_INFO_INDEX, _RESERVED, 1)); static NV_STATUS getGpuInfos(Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_INFO_V2_PARAMS *pParams, NvBool bCanAccessHw) @@ -84,13 +86,54 @@ getGpuInfos(Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_INFO_V2_PARAMS *pParams, for (i = 0; i < pParams->gpuInfoListSize; i++) { - if (pParams->gpuInfoList[i].index >= NV2080_CTRL_GPU_INFO_MAX_LIST_SIZE) + + const NvU32 index = DRF_VAL(2080, _CTRL_GPU_INFO_INDEX, _INDEX, pParams->gpuInfoList[i].index); + + if (index >= NV2080_CTRL_GPU_INFO_MAX_LIST_SIZE) { return NV_ERR_INVALID_ARGUMENT; } - switch (pParams->gpuInfoList[i].index) + data = 0; + + switch (index) { + case NV2080_CTRL_GPU_INFO_INDEX_ECID_LO32: + { + if (IS_GSP_CLIENT(pGpu)) + { + GspStaticConfigInfo *pGSCI = GPU_GET_GSP_STATIC_INFO(pGpu); + data = pGSCI->ecidInfo.ecidLow; + break; + } + data = 0; + status = NV_ERR_NOT_SUPPORTED; + break; + } + case NV2080_CTRL_GPU_INFO_INDEX_ECID_HI32: + { + if (IS_GSP_CLIENT(pGpu)) + { + GspStaticConfigInfo *pGSCI = GPU_GET_GSP_STATIC_INFO(pGpu); + data = pGSCI->ecidInfo.ecidHigh; + break; + } + data = 0; + status = NV_ERR_NOT_SUPPORTED; + break; + } + case NV2080_CTRL_GPU_INFO_INDEX_ECID_EXTENDED: + { + if (IS_GSP_CLIENT(pGpu)) + { + GspStaticConfigInfo *pGSCI = GPU_GET_GSP_STATIC_INFO(pGpu); + data = pGSCI->ecidInfo.ecidExtended; + break; + } + data = 0; + status = NV_ERR_NOT_SUPPORTED; + break; + } case NV2080_CTRL_GPU_INFO_INDEX_GPU_FLA_CAPABILITY: { KernelBus *pKernelBus = GPU_GET_KERNEL_BUS(pGpu); @@ -1430,7 +1473,7 @@ subdeviceCtrlCmdGpuGetEnginePartnerList_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); ENGDESCRIPTOR engDesc; - NvU32 localNv2080EngineType; + NvU32 nv2080EngineType; RM_ENGINE_TYPE rmEngineType; NvU32 i; PCLASSDESCRIPTOR pClass; @@ -1466,7 +1509,7 @@ subdeviceCtrlCmdGpuGetEnginePartnerList_IMPL return NV_ERR_NOT_SUPPORTED; } - localNv2080EngineType = pPartnerListParams->engineType; + nv2080EngineType = pPartnerListParams->engineType; // Translate the instance-local engine type to the global engine type in MIG mode if (IS_MIG_IN_USE(pGpu)) @@ -1492,7 +1535,7 @@ subdeviceCtrlCmdGpuGetEnginePartnerList_IMPL status = kfifoGetEnginePartnerList_HAL(pGpu, pKernelFifo, pPartnerListParams); // Restore the client's passed engineType - pPartnerListParams->engineType = localNv2080EngineType; + pPartnerListParams->engineType = nv2080EngineType; if (NV_OK == status) { @@ -1519,22 +1562,28 @@ subdeviceCtrlCmdGpuGetEnginePartnerList_IMPL // Copy over all of the engines except the target for (i = 0; i < pGpu->engineDB.size; i++) { - localNv2080EngineType = gpuGetNv2080EngineType(pGpu->engineDB.pType[i]); + nv2080EngineType = gpuGetNv2080EngineType(pGpu->engineDB.pType[i]); // Skip the engine handed in - if (localNv2080EngineType != pPartnerListParams->engineType ) + if (nv2080EngineType != pPartnerListParams->engineType ) { - pPartnerListParams->partnerList[pPartnerListParams->numPartners++] = localNv2080EngineType; + pPartnerListParams->partnerList[pPartnerListParams->numPartners++] = nv2080EngineType; } } subdeviceCtrlCmdGpuGetEnginePartnerList_filter: if (IS_MIG_IN_USE(pGpu)) { + Device *pDevice = GPU_RES_GET_DEVICE(pSubdevice); + MIG_INSTANCE_REF ref; + + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + kmigmgrGetInstanceRefFromDevice(pGpu, pKernelMIGManager, pDevice, &ref)); // Remove entries which don't exist in this client's GPU instance status = kmigmgrFilterEnginePartnerList(pGpu, pKernelMIGManager, pSubdevice, pPartnerListParams); + } return status; @@ -2387,7 +2436,7 @@ subdeviceCtrlCmdGpuGetMaxSupportedPageSize_IMPL // Default to minimal page size (4k) pParams->maxSupportedPageSize = RM_PAGE_SIZE; - if (IS_VIRTUAL(pGpu)) + if (IS_VIRTUAL_WITHOUT_SRIOV(pGpu) || IS_VIRTUAL_WITH_HEAVY_SRIOV(pGpu)) { VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); @@ -2411,9 +2460,9 @@ subdeviceCtrlCmdGpuGetMaxSupportedPageSize_IMPL pParams->maxSupportedPageSize = (NvU32)kgmmuGetMaxBigPageSize_HAL(pKernelGmmu); } - if (gpuIsSriovEnabled(pGpu) + if (gpuIsSriovEnabled(pGpu) || IS_VIRTUAL_WITH_SRIOV(pGpu) || gpuIsCCFeatureEnabled(pGpu) - ) + ) { NvU64 vmmuSegmentSize = gpuGetVmmuSegmentSize(pGpu); if (vmmuSegmentSize > 0 && @@ -2900,6 +2949,7 @@ subdeviceCtrlCmdUpdateGfidP2pCapability_IMPL { return gpuUpdateGfidP2pCapability(GPU_RES_GET_GPU(pSubdevice), pParams); } + /* * Set the EGM fabric base address */ diff --git a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_regops.c b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_regops.c index 1d5735212e..6b3bd30ab0 100644 --- a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_regops.c +++ b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_regops.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2004-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2004-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_timer_kernel.c b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_timer_kernel.c index c6e42b0dc2..af21a9c5f3 100644 --- a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_timer_kernel.c +++ b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_timer_kernel.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2004-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2004-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -66,16 +66,17 @@ subdeviceCtrlCmdTimerCancel_IMPL if (pSubdevice->notifyActions[NV2080_NOTIFIERS_TIMER] != NV2080_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE) { - tmrCancelCallback(pTmr, pSubdevice); + tmrEventCancel(pTmr, pSubdevice->pTimerEvent); + pSubdevice->notifyActions[NV2080_NOTIFIERS_TIMER] = NV2080_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE; } return NV_OK; } static NV_STATUS -gpuControlTimerCallback(OBJGPU *pGpu, OBJTMR *pTmr, void * pData) +gpuControlTimerCallback(OBJGPU *pGpu, OBJTMR *pTmr, TMR_EVENT *pTmrEvent) { - Subdevice *pSubDevice = (Subdevice *) pData; + Subdevice *pSubDevice = reinterpretCast(pTmrEvent->pUserData, Subdevice *); PEVENTNOTIFICATION pNotifyEvent = inotifyGetNotificationList(staticCast(pSubDevice, INotifier)); if (pSubDevice->notifyActions[NV2080_NOTIFIERS_TIMER] == NV2080_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE) @@ -167,14 +168,29 @@ timerSchedule // since callback may be called right away. pSubdevice->notifyActions[NV2080_NOTIFIERS_TIMER] = NV2080_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE; - // schedule the timer + if (pSubdevice->pTimerEvent != NULL) + { + if (tmrEventOnList(pTmr, pSubdevice->pTimerEvent)) + { + tmrEventCancel(pTmr, pSubdevice->pTimerEvent); + } + } + else + { + NV_ASSERT_OK_OR_RETURN(tmrEventCreate(pTmr, + &pSubdevice->pTimerEvent, + gpuControlTimerCallback, + pSubdevice, + TMR_FLAGS_NONE)); + } + if (DRF_VAL(2080, _CTRL_TIMER_SCHEDULE_FLAGS, _TIME, pTimerScheduleParams->flags) == NV2080_CTRL_TIMER_SCHEDULE_FLAGS_TIME_ABS) { - tmrScheduleCallbackAbs(pTmr, gpuControlTimerCallback, pSubdevice, pTimerScheduleParams->time_nsec, 0, 0); + tmrEventScheduleAbs(pTmr, pSubdevice->pTimerEvent, pTimerScheduleParams->time_nsec); } else { - tmrScheduleCallbackRel(pTmr, gpuControlTimerCallback, pSubdevice, pTimerScheduleParams->time_nsec, 0, 0); + tmrEventScheduleRel(pTmr, pSubdevice->pTimerEvent, pTimerScheduleParams->time_nsec); } return NV_OK; diff --git a/src/nvidia/src/kernel/gpu/timed_semaphore.c b/src/nvidia/src/kernel/gpu/timed_semaphore.c index d088675c54..3f015f4e26 100644 --- a/src/nvidia/src/kernel/gpu/timed_semaphore.c +++ b/src/nvidia/src/kernel/gpu/timed_semaphore.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -67,7 +67,7 @@ static NV_STATUS _class9074TimerCallback ( OBJGPU *pGpu, OBJTMR *pTmr, - void *pContext + TMR_EVENT *pTmrEvent ); //--------------------------------------------------------------------------- @@ -212,9 +212,9 @@ _9074TimedSemRequest // Schedule the callback when entry was added to an empty list. if (listCount(&pTimedSemSw->entryList) == 1) { - tmrScheduleCallbackAbs(pTmr, _class9074TimerCallback, pObject, - pTimedSemEntry->WaitTimestamp, TMR_FLAG_RELEASE_SEMAPHORE, - staticCast(pTimedSemSw, ChannelDescendant)->pKernelChannel->ChID); + tmrEventScheduleAbs(pTmr, + pTimedSemSw->pTmrEvent, + pTimedSemEntry->WaitTimestamp); } return status; @@ -234,6 +234,11 @@ tsemaConstruct_IMPL RS_RES_ALLOC_PARAMS_INTERNAL *pParams ) { + ChannelDescendant *pChannelDescendant = staticCast(pTimedSemSw, ChannelDescendant); + OBJTMR *pTmr = GPU_GET_TIMER(GPU_RES_GET_GPU(pChannelDescendant)); + + tmrEventCreate(pTmr, &pTimedSemSw->pTmrEvent, _class9074TimerCallback, pChannelDescendant, TMR_FLAG_RECUR); + listInit(&pTimedSemSw->entryList, portMemAllocatorGetGlobalNonPaged()); return NV_OK; @@ -248,7 +253,8 @@ tsemaDestruct_IMPL ChannelDescendant *pChannelDescendant = staticCast(pTimedSemSw, ChannelDescendant); OBJTMR *pTmr = GPU_GET_TIMER(GPU_RES_GET_GPU(pChannelDescendant)); - tmrCancelCallback(pTmr, pChannelDescendant); + tmrEventDestroy(pTmr, pTimedSemSw->pTmrEvent); + pTimedSemSw->pTmrEvent = NULL; chandesIsolateOnDestruct(pChannelDescendant); @@ -270,7 +276,6 @@ tsemaCtrlCmdFlush_IMPL ) { OBJGPU *pGpu = GPU_RES_GET_GPU(pTimedSemaSwObject); - ChannelDescendant *pObject = staticCast(pTimedSemaSwObject, ChannelDescendant); if (pFlushParams->isFlushing) { pTimedSemaSwObject->Flags |= F_FLUSHING; @@ -286,8 +291,8 @@ tsemaCtrlCmdFlush_IMPL tmrGetCurrentTime(pTmr, &pTimedSemaSwObject->FlushLimitTimestamp); pTimedSemaSwObject->FlushLimitTimestamp += pFlushParams->maxFlushTime; - tmrCancelCallback(pTmr, pObject); - _class9074TimerCallback(pGpu, pTmr, pObject); + tmrEventCancel(pTmr, pTimedSemaSwObject->pTmrEvent); + _class9074TimerCallback(pGpu, pTmr, pTimedSemaSwObject->pTmrEvent); } return NV_OK; @@ -538,10 +543,10 @@ static NV_STATUS _class9074TimerCallback ( OBJGPU *pGpu, OBJTMR *pTmr, - void *pContext + TMR_EVENT *pTmrEvent ) { - ChannelDescendant *pObject = pContext; + ChannelDescendant *pObject = pTmrEvent->pUserData; PGF100_TIMED_SEM_SW_OBJECT pTimedSemSw = dynamicCast(pObject, TimedSemaSwObject); PGF100_TIMED_SEM_ENTRY pTimedSemEntry = NULL; PGF100_TIMED_SEM_ENTRY pTimedSemEntryNext = NULL; @@ -582,9 +587,9 @@ static NV_STATUS _class9074TimerCallback // Schedule the callback for entry at the head of the queue. if (pTimedSemEntry != NULL) { - tmrScheduleCallbackAbs(pTmr, _class9074TimerCallback, pObject, - pTimedSemEntry->WaitTimestamp, TMR_FLAG_RELEASE_SEMAPHORE, - staticCast(pTimedSemSw, ChannelDescendant)->pKernelChannel->ChID); + tmrEventScheduleAbs(pTmr, + pTimedSemSw->pTmrEvent, + pTimedSemEntry->WaitTimestamp); } return status; @@ -616,6 +621,16 @@ NV_STATUS tsemaGetSwMethods_IMPL return NV_OK; } +NvBool +tsemaCheckCallbackReleaseSem_IMPL +( + TimedSemaSwObject *pTimedSemSw +) +{ + OBJTMR *pTmr = GPU_GET_TIMER(GPU_RES_GET_GPU(pTimedSemSw)); + return tmrEventOnList(pTmr, pTimedSemSw->pTmrEvent); +} + NV_STATUS tsemaRelease_KERNEL ( diff --git a/src/nvidia/src/kernel/gpu/timer/timer.c b/src/nvidia/src/kernel/gpu/timer/timer.c index ea4901a00b..77d45cb0be 100644 --- a/src/nvidia/src/kernel/gpu/timer/timer.c +++ b/src/nvidia/src/kernel/gpu/timer/timer.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -421,12 +421,12 @@ void tmrEventDestroy_IMPL } /*! - * TODO: document + * Callback invoked by NV0004_CTRL_CMD_TMR_SET_ALARM_NOTIFY */ static NV_STATUS -_nv0004CtrlCmdTmrSetAlarmNotifyCallback(OBJGPU *pGpu, OBJTMR *pTmr, void *pData) +_nv0004CtrlCmdTmrSetAlarmNotifyCallback(OBJGPU *pGpu, OBJTMR *pTmr, TMR_EVENT *pTmrEvent) { - PEVENTNOTIFICATION pNotifyEvent = pData; + PEVENTNOTIFICATION pNotifyEvent = pTmrEvent->pUserData; NV_STATUS status = NV_OK; // perform a direct callback to the client @@ -434,15 +434,16 @@ _nv0004CtrlCmdTmrSetAlarmNotifyCallback(OBJGPU *pGpu, OBJTMR *pTmr, void *pData) { //one shot signal status = osNotifyEvent(pGpu, pNotifyEvent, NV004_NOTIFIERS_SET_ALARM_NOTIFY, 0, NV_OK); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "failed to notify event in callback, status: 0x%08x\n", status); + return status; + } } return status; } -/*! - * TODO: document - * TODO: Migrate this to match current API (probably) - */ NV_STATUS tmrapiCtrlCmdTmrSetAlarmNotify_IMPL ( @@ -450,8 +451,10 @@ tmrapiCtrlCmdTmrSetAlarmNotify_IMPL NV0004_CTRL_TMR_SET_ALARM_NOTIFY_PARAMS *pParams ) { + NV_STATUS status; OBJGPU *pGpu = GPU_RES_GET_GPU(pTimerApi); OBJTMR *pTmr = GPU_GET_TIMER(pGpu); + TMR_EVENT *pTmrEvent = NULL; PEVENTNOTIFICATION pNotifyEvent = inotifyGetNotificationList(staticCast(pTimerApi, INotifier)); // Validate the timer event @@ -466,11 +469,29 @@ tmrapiCtrlCmdTmrSetAlarmNotify_IMPL return NV_ERR_INVALID_ARGUMENT; } - // schedule the timer - tmrScheduleCallbackRel(pTmr, - _nv0004CtrlCmdTmrSetAlarmNotifyCallback, - pNotifyEvent, - pParams->alarmTimeNsecs, 0, 0); + // Create an OS timer if not already created + if (pNotifyEvent->pTmrEvent == NULL) + { + status = tmrEventCreate(pTmr, + &pTmrEvent, + _nv0004CtrlCmdTmrSetAlarmNotifyCallback, + (void*)pNotifyEvent, + 0); + if (status != NV_OK) + return status; + + pNotifyEvent->pGpu = pGpu; + pNotifyEvent->pTmrEvent = pTmrEvent; + } + else + { + pTmrEvent = pNotifyEvent->pTmrEvent; + } + + // Schedule the timer + status = tmrEventScheduleRel(pTmr, pTmrEvent, pParams->alarmTimeNsecs); + if (status != NV_OK) + return status; return NV_OK; } @@ -866,13 +887,19 @@ NV_STATUS tmrEventScheduleAbs_IMPL if ((pEvent != NULL) && tmrIsOSTimer(pTmr, pEventPublic)) { + NvU64 timeRelNs, currentTime; + + rmStatus = tmrGetCurrentTime(pTmr, ¤tTime); + if (rmStatus != NV_OK) + return rmStatus; + // - // OS-Timer is supported only in Relative mode. This assert is to trap - // if someone trying to call tmrEventScheduleAbs for OSTimer + // If absolute time is less than current time, then timer has already + // expired. For this case, schedule timer with zero delay to trigger + // immediate callback. // - NV_ASSERT_FAILED("Attempting to schedule OS-Timer callback with Abs time."); - rmStatus = NV_ERR_INVALID_ARGUMENT; - return rmStatus; + timeRelNs = (timeAbsNs > currentTime) ? (timeAbsNs - currentTime) : 0; + return tmrEventScheduleRel(pTmr, pEventPublic, timeRelNs); } if ((pEvent == NULL) || (pEventPublic->pTimeProc == NULL && @@ -1517,11 +1544,8 @@ tmrDiffExceedsTime_IMPL return bRetVal; } -/*! - * TODO: document - */ NV_STATUS -tmrStateInitLocked_IMPL +tmrStatePreInitLocked_IMPL ( OBJGPU *pGpu, OBJTMR *pTmr @@ -1660,7 +1684,17 @@ tmrapiDeregisterEvents_IMPL(TimerApi *pTimerApi) // Validate the timer event while (pNotifyEvent != NULL) { - tmrCancelCallback(pTmr, pNotifyEvent); + // + // TimerApi events are only set through NV0004_CTRL_CMD_TMR_SET_ALARM_NOTIFY + // which only schedules TMR_EVENT type callbacks. So only call the new API. + // + TMR_EVENT *pTmrEvent = pNotifyEvent->pTmrEvent; + if (pTmrEvent != NULL) + { + tmrEventDestroy(pTmr, pTmrEvent); + pNotifyEvent->pGpu = NULL; + pNotifyEvent->pTmrEvent = NULL; + } pNotifyEvent = pNotifyEvent->Next; } @@ -1760,7 +1794,6 @@ tmrCtrlCmdEventCreate /*! * Schedules an existing event. Takes in time arguments and a flag to * determine if it should be interpreted as absolute or relative time. - * While using OSTimer, use this api only with relative time. * * @returns NV_STATUS */ @@ -1777,15 +1810,6 @@ tmrCtrlCmdEventSchedule if (pParams->bUseTimeAbs) { - // - // FIXME: This function is called only from dynamic_power.c file, - // using OSTimer. And OSTimer is always scheduled in relative mode - // - if ((pEvent != NULL) && tmrIsOSTimer(pTmr, pEvent)) - { - NV_ASSERT_FAILED("Attempting to schedule OSTimer with Abs time."); - return NV_ERR_INVALID_ARGUMENT; - } rc = tmrEventScheduleAbs(pTmr, pEvent, pParams->timeNs); } else diff --git a/src/nvidia/src/kernel/gpu/timer/timer_ostimer.c b/src/nvidia/src/kernel/gpu/timer/timer_ostimer.c index 86b847b48a..17bdeea235 100644 --- a/src/nvidia/src/kernel/gpu/timer/timer_ostimer.c +++ b/src/nvidia/src/kernel/gpu/timer/timer_ostimer.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +29,9 @@ #include "objtmr.h" +// Minimum delay for OS timer +#define OSTIMER_MIN_DELAY_NS 1 // 1 nanosecond + // // This function returns current time from OS timer // @@ -114,6 +117,7 @@ NV_STATUS tmrEventScheduleRelOSTimer_OSTIMER return NV_ERR_INVALID_REQUEST; } + timeRelNs = NV_MAX(timeRelNs, OSTIMER_MIN_DELAY_NS); status = osStartNanoTimer(pGpu->pOsGpuInfo, pEvent->super.pOSTmrCBdata, timeRelNs); if (status != NV_OK) diff --git a/src/nvidia/src/kernel/gpu/uvm/arch/volta/uvm_gv100.c b/src/nvidia/src/kernel/gpu/uvm/arch/volta/uvm_gv100.c index 5b3d24f4d4..43312c0566 100644 --- a/src/nvidia/src/kernel/gpu/uvm/arch/volta/uvm_gv100.c +++ b/src/nvidia/src/kernel/gpu/uvm/arch/volta/uvm_gv100.c @@ -343,32 +343,6 @@ uvmInitAccessCntrBuffer_GV100 return status; } -NV_STATUS -uvmResetAccessCntrBuffer_GV100 -( - OBJGPU *pGpu, - OBJUVM *pUvm, - NvU32 accessCounterIndex, - NvU32 counterType -) -{ - switch(counterType) - { - case NVC365_CTRL_ACCESS_COUNTER_TYPE_ALL: - GPU_FLD_WR_DRF_DEF(pGpu, _PFB_NISO, _ACCESS_COUNTER_NOTIFY_BUFFER_CLR, _ALL_COUNTERS, _CLR); - break; - case NVC365_CTRL_ACCESS_COUNTER_TYPE_MIMC: - GPU_FLD_WR_DRF_DEF(pGpu, _PFB_NISO, _ACCESS_COUNTER_NOTIFY_BUFFER_CLR, _MIMC, _CLR); - break; - case NVC365_CTRL_ACCESS_COUNTER_TYPE_MOMC: - GPU_FLD_WR_DRF_DEF(pGpu, _PFB_NISO, _ACCESS_COUNTER_NOTIFY_BUFFER_CLR, _MOMC, _CLR); - break; - default: - return NV_ERR_INVALID_ARGUMENT; - } - return NV_OK; -} - NV_STATUS uvmAccessCntrSetCounterLimit_GV100 ( diff --git a/src/nvidia/src/kernel/gpu/uvm/uvm.c b/src/nvidia/src/kernel/gpu/uvm/uvm.c index 74ca3b3c3c..c27d8092f1 100644 --- a/src/nvidia/src/kernel/gpu/uvm/uvm.c +++ b/src/nvidia/src/kernel/gpu/uvm/uvm.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2012-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2012-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -129,8 +129,6 @@ uvmStateInitUnlocked_IMPL(OBJGPU *pGpu, OBJUVM *pUvm) status = rmapiutilAllocClientAndDeviceHandles(pUvm->pRmApi, pGpu, &pUvm->hClient, NULL, &pUvm->hSubdevice); - pUvm->accessCounterBufferCount = 1; - pUvm->pAccessCounterBuffers = portMemAllocNonPaged(sizeof (*pUvm->pAccessCounterBuffers) * pUvm->accessCounterBufferCount); NV_ASSERT_OR_RETURN(pUvm->pAccessCounterBuffers != NULL, NV_ERR_NO_MEMORY); portMemSet(pUvm->pAccessCounterBuffers, 0, sizeof (*pUvm->pAccessCounterBuffers) * pUvm->accessCounterBufferCount); diff --git a/src/nvidia/src/kernel/gpu/video/kernel_video_engine.c b/src/nvidia/src/kernel/gpu/video/kernel_video_engine.c index 69e39fa4eb..b26ffa572e 100644 --- a/src/nvidia/src/kernel/gpu/video/kernel_video_engine.c +++ b/src/nvidia/src/kernel/gpu/video/kernel_video_engine.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -26,7 +26,9 @@ #include "kernel/gpu/mem_mgr/mem_desc.h" #include "kernel/gpu/bus/kern_bus.h" #include "kernel/os/os.h" +#include "kernel/virtualization/hypervisor/hypervisor.h" #include "nvrm_registry.h" +#include "vgpu/sdk-structures.h" KernelVideoEngine * kvidengFromEngDesc @@ -51,11 +53,31 @@ kvidengIsVideoTraceLogSupported_IMPL OBJGPU *pGpu ) { - NvBool bSupported = !IS_VIRTUAL(pGpu) && !RMCFG_FEATURE_PLATFORM_MODS && + NvBool bSupported = !hypervisorIsVgxHyper() && + !gpuIsSriovEnabled(pGpu) && + !RMCFG_FEATURE_MODS_FEATURES && !IS_SIMULATION(pGpu); bSupported &= !gpuIsCCFeatureEnabled(pGpu); + if (IS_VIRTUAL(pGpu)) + { + // ensure profiling capability is enabled + // only full SRIOV platforms is supported + VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); + bSupported &= (pVSI != NULL) && + pVSI->vgpuStaticProperties.bProfilingTracingEnabled && + IS_VIRTUAL_WITH_FULL_SRIOV(pGpu); + } + + if (pGpu->kernelVideoEngines[0] != NULL) + { + NvU32 data = pGpu->kernelVideoEngines[0]->videoTraceInfo.eventTraceRegkeyData; + bSupported &= (data != NV_REG_STR_RM_VIDEO_EVENT_TRACE_DISABLED); + } + + NV_PRINTF(LEVEL_INFO, "video engine event tracing is %s.\n", bSupported ? "supported" : "unsupported"); + return bSupported; } @@ -90,8 +112,6 @@ NV_STATUS kvidengInitLogging_KERNEL data = pKernelVideoEngine->videoTraceInfo.eventTraceRegkeyData; - NV_CHECK_OR_RETURN(LEVEL_INFO, (data != NV_REG_STR_RM_VIDEO_EVENT_TRACE_DISABLED), NV_OK); - bAlwaysLogging = DRF_VAL(_REG_STR, _RM_VIDEO_EVENT_TRACE, _ALWAYS_LOG, (data)) == NV_REG_STR_RM_VIDEO_EVENT_TRACE_ALWAYS_LOG_ENABLED; @@ -136,38 +156,7 @@ NV_STATUS kvidengInitLogging_KERNEL pTraceBuf->flags = bAlwaysLogging ? VIDEO_TRACE_FLAG__LOGGING_ENABLED : 0; pKernelVideoEngine->videoTraceInfo.pTraceBufferEngine = pTraceBuf; - - if (IS_GSP_CLIENT(pGpu)) - { - RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); - NV2080_CTRL_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_MEMORY_PARAMS params = {0}; - - params.memDescInfo.base = memdescGetPhysAddr(pKernelVideoEngine->videoTraceInfo.pTraceBufferEngineMemDesc, - AT_GPU, - 0); - params.memDescInfo.size = pKernelVideoEngine->videoTraceInfo.pTraceBufferEngineMemDesc->ActualSize; - params.memDescInfo.alignment = pKernelVideoEngine->videoTraceInfo.pTraceBufferEngineMemDesc->Alignment; - params.memDescInfo.addressSpace = addressSpace; - params.memDescInfo.cpuCacheAttrib = NV_MEMORY_UNCACHED; - - params.engDesc = pKernelVideoEngine->physEngDesc; - - NV_ASSERT_OK_OR_GOTO( - status, - pRmApi->Control(pRmApi, - pGpu->hInternalClient, - pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_INTERNAL_FLCN_SET_VIDEO_EVENT_BUFFER_MEMORY, - ¶ms, - sizeof(params)), - exit); - - if (!params.bEngineFound) - { - kvidengFreeLogging(pGpu, pKernelVideoEngine); - goto exit; - } - } + pKernelVideoEngine->videoTraceInfo.bAlwaysLogging = bAlwaysLogging; // Allocate allocate scratch pad for variable data pKernelVideoEngine->videoTraceInfo.pTraceBufferVariableData = diff --git a/src/nvidia/src/kernel/gpu_mgr/gpu_mgr.c b/src/nvidia/src/kernel/gpu_mgr/gpu_mgr.c index dd036954d5..d8d8306e36 100644 --- a/src/nvidia/src/kernel/gpu_mgr/gpu_mgr.c +++ b/src/nvidia/src/kernel/gpu_mgr/gpu_mgr.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -962,12 +962,12 @@ NvBool gpumgrGetRmFirmwareLogsEnabled void gpumgrGetRmFirmwarePolicy ( - NvU32 chipId, NvU32 pmcBoot42, NvBool bIsSoc, NvU32 enableFirmwareRegVal, NvBool *pbRequestFirmware, - NvBool *pbAllowFallbackToMonolithicRm + NvBool *pbAllowFallbackToMonolithicRm, + NvBool bIsMcdm ) { NvBool bFirmwareCapable = NV_FALSE; @@ -979,9 +979,10 @@ void gpumgrGetRmFirmwarePolicy *pbAllowFallbackToMonolithicRm = !!(enableFirmwareRegVal & NV_REG_ENABLE_GPU_FIRMWARE_POLICY_ALLOW_FALLBACK); - bFirmwareCapable = gpumgrIsDeviceRmFirmwareCapable(chipId, pmcBoot42, + bFirmwareCapable = gpumgrIsDeviceRmFirmwareCapable(pmcBoot42, bIsSoc, - &bEnableByDefault); + &bEnableByDefault, + bIsMcdm); *pbRequestFirmware = (bFirmwareCapable && @@ -1005,9 +1006,14 @@ NvBool gpumgrIsVgxRmFirmwareCapableChip(NvU32 pmcBoot42) return NV_FALSE; } -static NvBool _gpumgrIsRmFirmwareDefaultChip(NvU32 pmcBoot42) +static NvBool _gpumgrIsMcdmRmFirmwareDefaultChip(NvU32 pmcBoot42) { - return FLD_TEST_DRF(_PMC, _BOOT_42, _ARCHITECTURE, _GH100, pmcBoot42); + if (FLD_TEST_DRF(_PMC, _BOOT_42, _ARCHITECTURE, _GH100, pmcBoot42)) + { + return NV_TRUE; + } + + return NV_FALSE; } static NvBool _gpumgrIsVgxRmFirmwareDefaultChip(NvU32 pmcBoot42) @@ -1017,10 +1023,10 @@ static NvBool _gpumgrIsVgxRmFirmwareDefaultChip(NvU32 pmcBoot42) NvBool gpumgrIsDeviceRmFirmwareCapable ( - NvU16 devId, NvU32 pmcBoot42, NvBool bIsSoc, - NvBool *pbEnabledByDefault + NvBool *pbEnabledByDefault, + NvBool bIsMcdm ) { NvBool bEnabledByDefault = NV_FALSE; @@ -1046,74 +1052,28 @@ NvBool gpumgrIsDeviceRmFirmwareCapable bEnabledByDefault = NV_FALSE; goto finish; #else + if (hypervisorIsVgxHyper()) { - static const NvU16 defaultGspRmGpus[] = { - 0x1E37, // GFN - 0x1E38, // TU102 - 0x1EB4, // T4G - 0x1EB8, // T4 - 0x1EB9, // T4 - - 0x20B0, // A100 - 0x20B1, // A100 - 0x20B2, // A100 - 0x20B3, // A200 - 0x20B5, // A100 80GB - 0x20B6, // A100 - 0x20B7, // A30 - 0x20B8, // A100X SKU230/231 Roy-100 - 0x20B9, // A30X SKU205/206 Roy-30 - 0x20F0, // A100 - 0x20F1, // A100 - 0x20F2, // A100 - 0x2235, // A40 - 0x2236, // A10 SKU215 Pris-24 - 0x2237, // A10G SKU215 Pris-24 - 0x25B6, // A16 - 0x20F5, // A800-80 - 0x20F6, // A800-40 - 0x20FD, // A100T RoyB - - 0x26B5, // L40 - 0x26B8, // L40G - 0x26F5, // L40-CNX - 0x27B7, // L16 - 0x27B8, // L4 (both SKUs) - }; - - if (hypervisorIsVgxHyper() && _gpumgrIsVgxRmFirmwareDefaultChip(pmcBoot42)) + if (_gpumgrIsVgxRmFirmwareDefaultChip(pmcBoot42)) { bEnabledByDefault = NV_TRUE; } - else if (!hypervisorIsVgxHyper() && _gpumgrIsRmFirmwareDefaultChip(pmcBoot42)) - { - bEnabledByDefault = NV_TRUE; - } - else if (!hypervisorIsVgxHyper() || RMCFG_FEATURE_PLATFORM_GSP) - { - for (NvU32 i = 0; i < NV_ARRAY_ELEMENTS(defaultGspRmGpus); i++) - { - if (defaultGspRmGpus[i] == devId) - { - bEnabledByDefault = NV_TRUE; - break; - } - } - } + } + else + { + bEnabledByDefault = NV_TRUE; } #endif + // enable GSP-RM by default on Hopper+ chips in MCDM mode + if (bIsMcdm && _gpumgrIsMcdmRmFirmwareDefaultChip(pmcBoot42)) + { + bEnabledByDefault = NV_TRUE; + } finish: if (pbEnabledByDefault != NULL) { *pbEnabledByDefault = bEnabledByDefault; - - if (bEnabledByDefault) - { - NV_PRINTF(LEVEL_INFO, - "DevId 0x%x is GSP-RM enabled by default\n", - devId); - } } return bFirmwareCapable; diff --git a/src/nvidia/src/kernel/mem_mgr/ctx_buf_pool.c b/src/nvidia/src/kernel/mem_mgr/ctx_buf_pool.c index 9dab575bfa..e795184280 100644 --- a/src/nvidia/src/kernel/mem_mgr/ctx_buf_pool.c +++ b/src/nvidia/src/kernel/mem_mgr/ctx_buf_pool.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -65,7 +65,7 @@ ctxBufPoolIsSupported return NV_FALSE; } - if (!memmgrIsPmaInitialized(pMemoryManager)) + if (!memmgrIsPmaEnabled(pMemoryManager) || !memmgrIsPmaSupportedOnPlatform(pMemoryManager)) { NV_PRINTF(LEVEL_INFO, "PMA is disabled. Ctx buffers will be allocated in RM reserved heap\n"); return NV_FALSE; @@ -504,15 +504,9 @@ ctxBufPoolFree { OBJGPU *pGpu = pMemDesc->pGpu; MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - TRANSFER_SURFACE surf = {0}; - surf.pMemDesc = pMemDesc; - surf.offset = 0; - - NV_ASSERT_OK_OR_RETURN( - memmgrMemSet(pMemoryManager, &surf, 0, - pMemDesc->Size, - TRANSFER_FLAGS_NONE)); + memmgrMemsetInBlocks(pMemoryManager, pMemDesc, 0, 0, pMemDesc->Size, + TRANSFER_FLAGS_NONE, 0 /* Default Block Size */); } rmMemPoolFree(pPool, (RM_POOL_ALLOC_MEMDESC*)pMemDesc, 0); diff --git a/src/nvidia/src/kernel/mem_mgr/egm_mem.c b/src/nvidia/src/kernel/mem_mgr/egm_mem.c index a1abbd530c..36a4bc3091 100644 --- a/src/nvidia/src/kernel/mem_mgr/egm_mem.c +++ b/src/nvidia/src/kernel/mem_mgr/egm_mem.c @@ -22,7 +22,6 @@ */ #include "mem_mgr/egm_mem.h" - #include "gpu/mem_mgr/mem_mgr.h" #include "gpu/mem_mgr/mem_utils.h" #include "os/os.h" diff --git a/src/nvidia/src/kernel/mem_mgr/gpu_vaspace.c b/src/nvidia/src/kernel/mem_mgr/gpu_vaspace.c index 790604f085..998398826e 100644 --- a/src/nvidia/src/kernel/mem_mgr/gpu_vaspace.c +++ b/src/nvidia/src/kernel/mem_mgr/gpu_vaspace.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2013-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2013-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -56,6 +56,8 @@ #include "gpu/mem_mgr/vaspace_api.h" #include "platform/sli/sli.h" +#include "nvmisc.h" + #define GMMU_PD1_VADDR_BIT_LO 29 @@ -67,7 +69,7 @@ static const NvU64 pageSizes[] = { RM_PAGE_SIZE_512M }; -static const NvU32 pageSizeCount = sizeof (pageSizes) / sizeof (*pageSizes); +static const NvU32 pageSizeCount = NV_ARRAY_ELEMENTS(pageSizes); static NV_STATUS _gvaspaceGpuStateConstruct @@ -250,9 +252,7 @@ _gvaspaceBar1VaSpaceConstructClient if (!RMCFG_FEATURE_PLATFORM_GSP) { - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx); - NV_ASSERT_OR_RETURN(NULL != userCtx.pGpuState, NV_ERR_INVALID_STATE); - + NV_ASSERT_OK_OR_RETURN(gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx)); status = mmuWalkSparsify(userCtx.pGpuState->pWalk, vaspaceGetVaStart(pVAS), vaspaceGetVaLimit(pVAS), NV_FALSE); @@ -365,11 +365,9 @@ _gvaspaceReserveVaForClientRm FOR_EACH_GPU_IN_MASK_UC(32, pSys, pGpu, pVAS->gpuMask) { MMU_WALK_USER_CTX userCtx = {0}; - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx); - - if (NULL == userCtx.pGpuState) + status = gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx); + if (status != NV_OK) { - status = NV_ERR_INVALID_STATE; break; } else @@ -843,8 +841,7 @@ _gvaspaceBar1VaSpaceDestructClient if (!RMCFG_FEATURE_PLATFORM_GSP) { - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx); - NV_ASSERT_OR_RETURN(NULL != userCtx.pGpuState, NV_ERR_INVALID_STATE); + NV_ASSERT_OK_OR_RETURN(gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx)); status = mmuWalkUnmap(userCtx.pGpuState->pWalk, vaspaceGetVaStart(pVAS), vaspaceGetVaLimit(pVAS)); @@ -885,13 +882,16 @@ _gvaspaceFlaVaspaceDestruct gvaspaceUnpinRootPageDir(pGVAS, pGpu); - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx); - NV_ASSERT_OR_RETURN(NULL != userCtx.pGpuState, NV_OK); - - status = mmuWalkUnmap(userCtx.pGpuState->pWalk, vaspaceGetVaStart(pVAS), vaspaceGetVaLimit(pVAS)); - NV_ASSERT_OR_RETURN(NV_OK == status, status); - - gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); + if (gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx) == NV_OK) + { + NV_ASSERT_OK_OR_RETURN(mmuWalkUnmap(userCtx.pGpuState->pWalk, vaspaceGetVaStart(pVAS), vaspaceGetVaLimit(pVAS))); + gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); + } + else + { + NV_PRINTF(LEVEL_WARNING, + "Failed to acquire walk user context\n"); + } NV_PRINTF(LEVEL_INFO, "Releasing legacy FLA VASPACE, gpu: %x \n", pGpu->gpuInstance); @@ -911,22 +911,15 @@ _gvaspaceReleaseVaForServerRm { NV_STATUS status = NV_OK; MMU_WALK_USER_CTX userCtx = {0}; - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx); + NV_ASSERT_OK_OR_RETURN(gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx)); + + const MMU_FMT_LEVEL *pLevelFmt = + mmuFmtFindLevelWithPageShift(userCtx.pGpuState->pFmt->pRoot, GMMU_PD1_VADDR_BIT_LO); + status = mmuWalkReleaseEntries(userCtx.pGpuState->pWalk, + pLevelFmt, + pGVAS->vaStartServerRMOwned, + pGVAS->vaLimitServerRMOwned); - if (NULL == userCtx.pGpuState) - { - status = NV_ERR_INVALID_STATE; - NV_ASSERT(0); - } - else - { - const MMU_FMT_LEVEL *pLevelFmt = - mmuFmtFindLevelWithPageShift(userCtx.pGpuState->pFmt->pRoot, GMMU_PD1_VADDR_BIT_LO); - status = mmuWalkReleaseEntries(userCtx.pGpuState->pWalk, - pLevelFmt, - pGVAS->vaStartServerRMOwned, - pGVAS->vaLimitServerRMOwned); - } gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); return status; @@ -1142,7 +1135,7 @@ _gvaspaceGpuStateConstruct else { // Otherwise ensure requested limit does not exeed max HW limit. - NV_ASSERT_OR_RETURN(vaLimit <= vaLimitMax, NV_ERR_INVALID_ARGUMENT); + NV_CHECK_OR_RETURN(LEVEL_INFO, vaLimit <= vaLimitMax, NV_ERR_INVALID_ARGUMENT); vaLimitExt = vaLimit; } @@ -1593,19 +1586,15 @@ gvaspaceAlloc_IMPL MMU_WALK_USER_CTX userCtx = {0}; // Sparsify the VA range. - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, pVASBlock, &userCtx); + status = gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, pVASBlock, &userCtx); + NV_ASSERT(status == NV_OK); - if (NULL == userCtx.pGpuState) - { - status = NV_ERR_INVALID_STATE; - NV_ASSERT(0); - } - else + if (status == NV_OK) { status = mmuWalkSparsify(userCtx.pGpuState->pWalk, *pAddr, *pAddr + size - 1, NV_FALSE); + gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); } - gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); if (NV_OK != status) { DBG_BREAKPOINT(); @@ -1626,19 +1615,16 @@ gvaspaceAlloc_IMPL MMU_WALK_USER_CTX userCtx = {0}; // Unsparsify the VA range. - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, pVASBlock, &userCtx); - if (NULL == userCtx.pGpuState) - { - // Intentionally not clobbering status - NV_ASSERT(0); - } - else + NV_STATUS acquireStatus = gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, pVASBlock, &userCtx); + NV_ASSERT(acquireStatus == NV_OK); + if (acquireStatus == NV_OK) { // Not checking the returns status mmuWalkUnmap(userCtx.pGpuState->pWalk, pMemBlock->begin, pMemBlock->end); + gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); } - gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); + // Invalidate TLB to apply new sparse state. kbusFlush_HAL(pGpu, pKernelBus, BUS_FLUSH_VIDEO_MEMORY | BUS_FLUSH_SYSTEM_MEMORY); @@ -1659,39 +1645,34 @@ gvaspaceAlloc_IMPL NvU32 pageShift; MMU_WALK_USER_CTX userCtx = {0}; - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, pVASBlock, &userCtx); + status = gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, pVASBlock, &userCtx); + NV_ASSERT_OR_ELSE(status == NV_OK, break); + - if (NULL == userCtx.pGpuState) + if (pGVAS->flags & VASPACE_FLAGS_FLA) { - status = NV_ERR_INVALID_STATE; - NV_ASSERT(0); + // currently FLA VASpace is associated with only GPU. + NV_ASSERT(ONEBITSET(pVAS->gpuMask)); + status = _gvaspaceAllocateFlaDummyPagesForFlaRange(pGVAS, pGpu, userCtx.pGpuState); } - else + // Loop over each page size requested by client. + FOR_EACH_INDEX_IN_MASK(64, pageShift, pVASBlock->pageSizeLockMask) { - if (pGVAS->flags & VASPACE_FLAGS_FLA) - { - // currently FLA VASpace is associated with only GPU. - NV_ASSERT(ONEBITSET(pVAS->gpuMask)); - status = _gvaspaceAllocateFlaDummyPagesForFlaRange(pGVAS, pGpu, userCtx.pGpuState); - } - // Loop over each page size requested by client. - FOR_EACH_INDEX_IN_MASK(64, pageShift, pVASBlock->pageSizeLockMask) + // Pre-reserve page level instances in the VA range. + const MMU_FMT_LEVEL *pLevelFmt = + mmuFmtFindLevelWithPageShift(userCtx.pGpuState->pFmt->pRoot, pageShift); + status = mmuWalkReserveEntries(userCtx.pGpuState->pWalk, pLevelFmt, + *pAddr, *pAddr + size - 1, NV_TRUE); + if (NV_OK != status) { - // Pre-reserve page level instances in the VA range. - const MMU_FMT_LEVEL *pLevelFmt = - mmuFmtFindLevelWithPageShift(userCtx.pGpuState->pFmt->pRoot, pageShift); - status = mmuWalkReserveEntries(userCtx.pGpuState->pWalk, pLevelFmt, - *pAddr, *pAddr + size - 1, NV_TRUE); - if (NV_OK != status) - { - DBG_BREAKPOINT(); - break; - } + DBG_BREAKPOINT(); + break; } - FOR_EACH_INDEX_IN_MASK_END } - + FOR_EACH_INDEX_IN_MASK_END gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); + + if (NV_OK != status) { break; @@ -1705,33 +1686,24 @@ gvaspaceAlloc_IMPL { NvU32 pageShift; MMU_WALK_USER_CTX userCtx = {0}; + NV_STATUS acquireStatus = gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, pVASBlock, &userCtx); + NV_ASSERT_OR_ELSE(acquireStatus == NV_OK, continue); - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, pVASBlock, &userCtx); - - if (NULL == userCtx.pGpuState) + if (pGVAS->flags & VASPACE_FLAGS_FLA) { - // Intentionally not clobbering status - NV_ASSERT(0); + _gvaspaceCleanupFlaDummyPagesForFlaRange(pGVAS, pGpu, userCtx.pGpuState); } - else + // Loop over each page size requested by client during VA reservation. + FOR_EACH_INDEX_IN_MASK(64, pageShift, pVASBlock->pageSizeLockMask) { - if (pGVAS->flags & VASPACE_FLAGS_FLA) - { - _gvaspaceCleanupFlaDummyPagesForFlaRange(pGVAS, pGpu, userCtx.pGpuState); - } - // Loop over each page size requested by client during VA reservation. - FOR_EACH_INDEX_IN_MASK(64, pageShift, pVASBlock->pageSizeLockMask) - { - // Release page level instances in the VA range. - const MMU_FMT_LEVEL *pLevelFmt = - mmuFmtFindLevelWithPageShift(userCtx.pGpuState->pFmt->pRoot, pageShift); - // Not checking the returns status - mmuWalkReleaseEntries(userCtx.pGpuState->pWalk, pLevelFmt, - pMemBlock->begin, pMemBlock->end); - } - FOR_EACH_INDEX_IN_MASK_END + // Release page level instances in the VA range. + const MMU_FMT_LEVEL *pLevelFmt = + mmuFmtFindLevelWithPageShift(userCtx.pGpuState->pFmt->pRoot, pageShift); + // Not checking the returns status + mmuWalkReleaseEntries(userCtx.pGpuState->pWalk, pLevelFmt, + pMemBlock->begin, pMemBlock->end); } - + FOR_EACH_INDEX_IN_MASK_END gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); } FOR_EACH_GPU_IN_MASK_UC_END @@ -2153,13 +2125,7 @@ gvaspacePinRootPageDir_IMPL(OBJGVASPACE *pGVAS, OBJGPU *pGpu) return NV_ERR_NOT_SUPPORTED; } - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx); - - if (NULL == userCtx.pGpuState) - { - status = NV_ERR_INVALID_STATE; - NV_ASSERT_OR_GOTO(0, done); - } + NV_ASSERT_OK_OR_RETURN(gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx)); // Determine aligned range to pin. pLevelFmt = userCtx.pGpuState->pFmt->pRoot; @@ -2170,9 +2136,8 @@ gvaspacePinRootPageDir_IMPL(OBJGVASPACE *pGVAS, OBJGPU *pGpu) // Alloc and bind root level instance. status = mmuWalkReserveEntries(userCtx.pGpuState->pWalk, pLevelFmt, vaLo, vaHi, NV_TRUE); - NV_ASSERT_OR_GOTO(NV_OK == status, done); + NV_ASSERT(NV_OK == status); -done: gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); return status; } @@ -2193,11 +2158,11 @@ gvaspaceUnpinRootPageDir_IMPL(OBJGVASPACE *pGVAS, OBJGPU *pGpu) return; } - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx); - - if (NULL == userCtx.pGpuState) + if (gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx) != NV_OK) { - NV_ASSERT_OR_GOTO(0, done); + NV_PRINTF(LEVEL_WARNING, + "Failed to acquire walk user context\n"); + return; } // Determine aligned range to unpin. @@ -2209,9 +2174,7 @@ gvaspaceUnpinRootPageDir_IMPL(OBJGVASPACE *pGVAS, OBJGPU *pGpu) // Unreserve root level instance (won't free it if there are still mappings). status = mmuWalkReleaseEntries(userCtx.pGpuState->pWalk, pLevelFmt, vaLo, vaHi); - NV_ASSERT_OR_GOTO(NV_OK == status, done); - -done: + NV_ASSERT_OK(status); gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); } @@ -2256,18 +2219,14 @@ gvaspaceMap_IMPL NV_ASSERT_OR_RETURN(vaHi <= pMemBlock->end, NV_ERR_INVALID_ARGUMENT); // Insert range into VAS block mapping tree. - status = _gvaspaceMappingInsert(pGVAS, pGpu, pVASBlock, vaLo, vaHi, flags); - NV_ASSERT_OR_RETURN(NV_OK == status, status); + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, _gvaspaceMappingInsert(pGVAS, + pGpu, pVASBlock, vaLo, vaHi, flags)); } // Call MMU walker to map. - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, pVASBlock, &userCtx); - - if (NULL == userCtx.pGpuState) - { - status = NV_ERR_INVALID_STATE; - NV_ASSERT_OR_GOTO(0, catch); - } + NV_ASSERT_OK_OR_GOTO(status, + gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, pVASBlock, &userCtx), + catch); status = mmuWalkMap(userCtx.pGpuState->pWalk, vaLo, vaHi, pTarget); gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); @@ -2307,30 +2266,20 @@ gvaspaceUnmap_IMPL status = _gvaspaceMappingRemove(pGVAS, pGpu, pVASBlock, vaLo, vaHi); NV_ASSERT_OR_RETURN_VOID(NV_OK == status); - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, pVASBlock, &userCtx); + NV_ASSERT_OR_RETURN_VOID(gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, pVASBlock, &userCtx) == NV_OK); - if (NULL == userCtx.pGpuState) + if (pVASBlock->flags.bSparse || (pGVAS->flags & VASPACE_FLAGS_BAR_BAR1) + ||((pMemBlock->refCount >1) && (pGVAS->flags & VASPACE_FLAGS_FLA)) + ) { - NV_ASSERT(0); + // Return back to Sparse if that was the original state of this allocation. + NV_ASSERT_OK(mmuWalkSparsify(userCtx.pGpuState->pWalk, vaLo, vaHi, NV_FALSE)); } else { - if (pVASBlock->flags.bSparse || (pGVAS->flags & VASPACE_FLAGS_BAR_BAR1) - ||((pMemBlock->refCount >1) && (pGVAS->flags & VASPACE_FLAGS_FLA)) - ) - { - // Return back to Sparse if that was the original state of this allocation. - status = mmuWalkSparsify(userCtx.pGpuState->pWalk, vaLo, vaHi, NV_FALSE); - NV_ASSERT(NV_OK == status); - } - else - { - // Plain old unmap - status = mmuWalkUnmap(userCtx.pGpuState->pWalk, vaLo, vaHi); - NV_ASSERT(NV_OK == status); - } + // Plain old unmap + NV_ASSERT_OK(mmuWalkUnmap(userCtx.pGpuState->pWalk, vaLo, vaHi)); } - gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); } @@ -3202,7 +3151,9 @@ gvaspaceExternalRootDirCommit_IMPL } // Acquire MMU walker user context (always released below in catch label). - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx); + NV_ASSERT_OK_OR_GOTO(status, + gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx), + catch); if (!bAllChannels) { // Specify single channel ID for which to update PDB if required by caller. @@ -3291,8 +3242,11 @@ gvaspaceExternalRootDirCommit_IMPL memdescDestroy(pRootMemNew); pRootMemNew = NULL; } - // Release MMU walker user context. - gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); + if (userCtx.pGpuState != NULL) + { + // Release MMU walker user context. + gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); + } return status; } @@ -3343,7 +3297,7 @@ gvaspaceExternalRootDirRevoke_IMPL gvaspaceInvalidateTlb(pGVAS, pGpu, PTE_DOWNGRADE); // Acquire walker user context. - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx); + NV_ASSERT_OK_OR_RETURN(gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx)); // // Override callbacks for migration. @@ -3453,7 +3407,9 @@ gvaspaceResize_IMPL } // Acquire walker context. - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx); + NV_ASSERT_OK_OR_GOTO(status, + gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx), + doneGpu); status = mmuWalkGetPageLevelInfo(pGpuState->pWalk, pRootFmt, 0, (const MMU_WALK_MEMDESC**)&pRootMem, &rootSize); @@ -3553,7 +3509,7 @@ _gmmuWalkCBMapSingleEntry surf.pMemDesc = pMemDesc; surf.offset = entryIndexLo * pTarget->pLevelFmt->entrySize; - + NV_ASSERT_OR_RETURN_VOID(memmgrMemWrite(pMemoryManager, &surf, pIter->entry.v8, pTarget->pLevelFmt->entrySize, @@ -3744,18 +3700,11 @@ gvaspaceUpdatePde2_IMPL NV_ASSERT_OR_RETURN(vaHi <= pGVAS->vaLimitInternal, NV_ERR_INVALID_ARGUMENT); // Call walker to map the PDE. - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx); + NV_ASSERT_OK_OR_RETURN(gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx)); - if (NULL == userCtx.pGpuState) - { - status = NV_ERR_INVALID_STATE; - NV_ASSERT(0); - } - else - { - status = mmuWalkMap(userCtx.pGpuState->pWalk, vaLo, vaHi, &mapTarget); - } + status = mmuWalkMap(userCtx.pGpuState->pWalk, vaLo, vaHi, &mapTarget); gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); + NV_ASSERT_OR_RETURN(NV_OK == status, status); // Flush TLB if requested. @@ -3769,7 +3718,7 @@ gvaspaceUpdatePde2_IMPL return NV_OK; } -void +NV_STATUS gvaspaceWalkUserCtxAcquire_IMPL ( OBJGVASPACE *pGVAS, @@ -3778,21 +3727,26 @@ gvaspaceWalkUserCtxAcquire_IMPL MMU_WALK_USER_CTX *pUserCtx ) { + GVAS_GPU_STATE *pGpuState = gvaspaceGetGpuState(pGVAS, pGpu); + + if(pGpuState == NULL || pGpuState->pWalk == NULL) + { + return NV_ERR_INVALID_STATE; + } + // Must be UC. NV_ASSERT(!gpumgrGetBcEnabledStatus(pGpu)); + // If current context is non-NULL, a previous release was missed. + NV_ASSERT_OR_RETURN(NULL == mmuWalkGetUserCtx(pGpuState->pWalk), NV_ERR_INVALID_STATE); + pUserCtx->pGVAS = pGVAS; pUserCtx->pGpu = pGpu; - pUserCtx->pGpuState = gvaspaceGetGpuState(pGVAS, pGpu); + pUserCtx->pGpuState = pGpuState; pUserCtx->pBlock = pVASBlock; - // The following two asserts were added for a rare issue hit during eGPU surprise disconnect on Mac - NV_ASSERT_OR_RETURN_VOID(pUserCtx->pGpuState != NULL); - NV_ASSERT_OR_RETURN_VOID(pUserCtx->pGpuState->pWalk != NULL); - - // If current context is non-NULL, a previous release was missed. - NV_ASSERT(NULL == mmuWalkGetUserCtx(pUserCtx->pGpuState->pWalk)); - NV_ASSERT_OK(mmuWalkSetUserCtx(pUserCtx->pGpuState->pWalk, pUserCtx)); + NV_ASSERT_OK_OR_RETURN(mmuWalkSetUserCtx(pUserCtx->pGpuState->pWalk, pUserCtx)); + return NV_OK; } void @@ -4475,7 +4429,7 @@ gvaspaceCopyServerReservedPdes_IMPL gvaspaceInvalidateTlb(pGVAS, pGpu, PTE_DOWNGRADE); // Acquire walker context. - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx); + NV_ASSERT_OK_OR_RETURN(gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx)); for (i = pCopyServerReservedPdesParams->numLevelsToCopy - 1; i >= 0; i--) { @@ -4656,31 +4610,23 @@ _gvaspacePinLazyPageTables vaLo = NV_MAX(vaLo, pMemBlock->begin); vaHi = NV_MIN(vaHi, pMemBlock->end); - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, pVASBlock, &userCtx); + NV_ASSERT_OK_OR_RETURN(gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, pVASBlock, &userCtx)); - if (NULL == userCtx.pGpuState) + // Loop over each page size requested by client. + FOR_EACH_INDEX_IN_MASK(64, pageShift, pVASBlock->pageSizeLockMask) { - status = NV_ERR_INVALID_STATE; - NV_ASSERT(0); - } - else - { - // Loop over each page size requested by client. - FOR_EACH_INDEX_IN_MASK(64, pageShift, pVASBlock->pageSizeLockMask) + // Pre-reserve page level instances in the VA range. + const MMU_FMT_LEVEL *pLevelFmt = + mmuFmtFindLevelWithPageShift(userCtx.pGpuState->pFmt->pRoot, pageShift); + status = mmuWalkReserveEntries(userCtx.pGpuState->pWalk, pLevelFmt, + vaLo, vaHi, NV_TRUE); + if (NV_OK != status) { - // Pre-reserve page level instances in the VA range. - const MMU_FMT_LEVEL *pLevelFmt = - mmuFmtFindLevelWithPageShift(userCtx.pGpuState->pFmt->pRoot, pageShift); - status = mmuWalkReserveEntries(userCtx.pGpuState->pWalk, pLevelFmt, - vaLo, vaHi, NV_TRUE); - if (NV_OK != status) - { - DBG_BREAKPOINT(); - break; - } + DBG_BREAKPOINT(); + break; } - FOR_EACH_INDEX_IN_MASK_END } + FOR_EACH_INDEX_IN_MASK_END gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); } @@ -4754,8 +4700,8 @@ _gvaspaceMappingInsert if (NV_OK == status) { // If it already exists, check for consistency. - NV_ASSERT_OR_RETURN(0 == (pMapNode->gpuMask & gpuMask), - NV_ERR_INVALID_ARGUMENT); + NV_CHECK_OR_RETURN(LEVEL_ERROR, 0 == (pMapNode->gpuMask & gpuMask), + NV_ERR_INVALID_ARGUMENT); NV_ASSERT_OR_RETURN(pMapNode->node.keyStart == vaLo, NV_ERR_INVALID_ARGUMENT); NV_ASSERT_OR_RETURN(pMapNode->node.keyEnd == vaHi, NV_ERR_INVALID_ARGUMENT); @@ -5009,7 +4955,7 @@ _gvaspaceReservePageTableEntries NvU32 pageShift; MMU_WALK_USER_CTX userCtx = {0}; - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx); + NV_ASSERT_OK_OR_RETURN(gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx)); // Loop over each page size requested by client. FOR_EACH_INDEX_IN_MASK(64, pageShift, pageSizeMask) @@ -5097,9 +5043,7 @@ _gvaspaceReleaseUnreservedPTEs NV_ASSERT_OR_RETURN(NULL != pGpuState, NV_ERR_GENERIC); pIter = listHead(&pGpuState->reservedPageTableEntries); - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx); - - NV_ASSERT(NULL != userCtx.pGpuState); + NV_ASSERT_OK_OR_RETURN(gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx)); piecewiseStart = vaLo; while (piecewiseStart <= vaHi) @@ -5207,9 +5151,11 @@ _gvaspaceForceFreePageLevelInstances pIter = pNext; } - gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx); - mmuWalkLevelInstancesForceFree(pGpuState->pWalk); - gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); + if (gvaspaceWalkUserCtxAcquire(pGVAS, pGpu, NULL, &userCtx) == NV_OK) + { + mmuWalkLevelInstancesForceFree(pGpuState->pWalk); + gvaspaceWalkUserCtxRelease(pGVAS, &userCtx); + } } static NV_STATUS diff --git a/src/nvidia/src/kernel/mem_mgr/mem.c b/src/nvidia/src/kernel/mem_mgr/mem.c index 78fef97d90..8e13590b94 100644 --- a/src/nvidia/src/kernel/mem_mgr/mem.c +++ b/src/nvidia/src/kernel/mem_mgr/mem.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -36,6 +36,7 @@ #include "gpu/subdevice/subdevice.h" #include "vgpu/rpc.h" #include "platform/sli/sli.h" +#include "deprecated/rmapi_deprecated.h" #include "class/cl0041.h" // NV04_MEMORY #include "class/cl003e.h" // NV01_MEMORY_SYSTEM @@ -339,7 +340,6 @@ memConstructCommon_IMPL { OBJGPU *pGpu = NULL; NV_STATUS status = NV_OK; - NvHandle hClient = RES_GET_CLIENT_HANDLE(pMemory); NvHandle hParent = RES_GET_PARENT_HANDLE(pMemory); NvHandle hMemory = RES_GET_HANDLE(pMemory); @@ -480,7 +480,7 @@ memConstructCommon_IMPL // Make GSP-RM aware of the memory descriptor so it can be used there if (FLD_TEST_DRF(OS32, _ATTR2, _REGISTER_MEMDESC_TO_PHYS_RM, _TRUE, attr2)) { - status = memdescRegisterToGSP(pGpu, hClient, hParent, hMemory); + status = memRegisterWithGsp(pGpu, RES_GET_CLIENT(pMemory), hParent, hMemory); if (status != NV_OK) goto done; } @@ -504,6 +504,121 @@ memConstructCommon_IMPL return status; } +NV_STATUS +memRegisterWithGsp_IMPL +( + OBJGPU *pGpu, + RsClient *pClient, + NvHandle hParent, + NvHandle hMemory +) +{ + NV_STATUS status = NV_OK; + Memory *pMemory = NULL; + RsResourceRef *pMemoryRef = NULL; + MEMORY_DESCRIPTOR *pMemDesc = NULL; + NvU32 hClass; + + // Nothing to do without GSP + if (!IS_GSP_CLIENT(pGpu)) + { + return NV_OK; + } + + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, clientGetResourceRef(pClient, hMemory, &pMemoryRef)); + + pMemory = dynamicCast(pMemoryRef->pResource, Memory); + NV_CHECK_OR_RETURN(LEVEL_ERROR, pMemory != NULL, NV_ERR_INVALID_OBJECT); + + pMemDesc = pMemory->pMemDesc; + + // Check: memory already registered + if (pMemory->bRegisteredWithGsp) + { + return NV_OK; + } + + // Check: no subdevice memDescs + NV_CHECK_OR_RETURN(LEVEL_ERROR, + !memdescHasSubDeviceMemDescs(pMemDesc), + NV_ERR_INVALID_STATE); + + // Check: SYSMEM or FBMEM only + if (memdescGetAddressSpace(pMemDesc) == ADDR_FBMEM) + hClass = NV01_MEMORY_LIST_FBMEM; + else if (memdescGetAddressSpace(pMemDesc) == ADDR_SYSMEM) + hClass = NV01_MEMORY_LIST_SYSTEM; + else + return NV_ERR_INVALID_STATE; + + NvU32 os02Flags = 0; + + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, + RmDeprecatedConvertOs32ToOs02Flags(pMemory->Attr, + pMemory->Attr2, + pMemory->Flags, + &os02Flags)); + NV_RM_RPC_ALLOC_MEMORY(pGpu, + pClient->hClient, + hParent, + hMemory, + hClass, + os02Flags, + pMemDesc, + status); + + if (status == NV_OK) + { + // Mark memory as registered in GSP + pMemory->bRegisteredWithGsp = NV_TRUE; + } + + return status; +} + +static void +_memUnregisterFromGsp +( + Memory *pMemory, + RsClient *pClient, + NvHandle hParent, + NvHandle hMemory +) +{ + NV_STATUS status = NV_OK; + + // Nothing to do without GSP + if ((pMemory->pGpu == NULL) || + !IS_GSP_CLIENT(pMemory->pGpu)) + { + return; + } + + // Nothing to do if memory is not registered to GSP + if (!pMemory->bRegisteredWithGsp) + { + return; + } + + NV_RM_RPC_FREE(pMemory->pGpu, + pClient->hClient, + hParent, + hMemory, + status); + + if (status == NV_OK) + { + // Mark memory as not registered in GSP + pMemory->bRegisteredWithGsp = NV_FALSE; + } + else + { + NV_PRINTF(LEVEL_ERROR, + "Failed to unregister hMemory 0x%08x from GSP, status 0x%08x\n", + hMemory, status); + } +} + static NvBool _memCheckHostVgpuDeviceExists ( @@ -647,18 +762,16 @@ memDestructCommon_IMPL Memory *pMemory ) { - OBJGPU *pGpu = pMemory->pGpu; RsResourceRef *pResourceRef = RES_GET_REF(pMemory); RsResourceRef *pParentRef = pResourceRef->pParentRef; RsClient *pClient = RES_GET_CLIENT(pMemory); - NvHandle hClient = pClient->hClient; NvHandle hParent = pParentRef->hResource; NvHandle hMemory = RES_GET_HANDLE(pMemory); if (!pMemory->bConstructed) return; - NV_ASSERT_OK(memdescDeregisterFromGSP(pGpu, hClient, hParent, hMemory)); + _memUnregisterFromGsp(pMemory, pClient, hParent, hMemory); // Do device specific teardown if we have a device if (pMemory->pDevice != NULL) diff --git a/src/nvidia/src/kernel/mem_mgr/mem_list.c b/src/nvidia/src/kernel/mem_mgr/mem_list.c index d95c6aadcf..48f7832fa3 100644 --- a/src/nvidia/src/kernel/mem_mgr/mem_list.c +++ b/src/nvidia/src/kernel/mem_mgr/mem_list.c @@ -384,6 +384,24 @@ memlistConstruct_IMPL { memdescDestroy(pMemDesc); } + // Memory has to be mapped on GSP since it came from CPU-RM + else if (RMCFG_FEATURE_PLATFORM_GSP) + { + // + // TODO - Once Bug 4429199 is resolved, this call should probably be + // changed to memdescMapInternal(). + // + status = memdescMap(pMemory->pMemDesc, 0, pMemory->Length, NV_TRUE, + NV_PROTECT_READ_WRITE, &pMemory->KernelVAddr, &pMemory->KernelMapPriv); + + if (status != NV_OK) + { + pMemory->KernelVAddr = NvP64_NULL; + pMemory->KernelMapPriv = NvP64_NULL; + NV_PRINTF(LEVEL_ERROR, "memDescMap failed with: %d\n", status); + } + } + } else if (addressSpace == ADDR_FBMEM) { diff --git a/src/nvidia/src/kernel/mem_mgr/mem_multicast_fabric.c b/src/nvidia/src/kernel/mem_mgr/mem_multicast_fabric.c index 2adc2d4f91..1cb9853a65 100644 --- a/src/nvidia/src/kernel/mem_mgr/mem_multicast_fabric.c +++ b/src/nvidia/src/kernel/mem_mgr/mem_multicast_fabric.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -1768,12 +1768,12 @@ _memorymulticastfabricCtrlAttachGpu return NV_ERR_STATE_IN_USE; } - if (RMCFG_FEATURE_PLATFORM_WINDOWS || - gpuIsCCFeatureEnabled(pGpu) || - IS_VIRTUAL(pGpu)) + if (RMCFG_FEATURE_PLATFORM_WINDOWS + || gpuIsCCFeatureEnabled(pGpu) + ) { NV_PRINTF(LEVEL_ERROR, - "Multicast attach not supported on Windows/CC/vGPU modes\n"); + "Multicast attach not supported on Windows/CC modes\n"); return NV_ERR_NOT_SUPPORTED; } diff --git a/src/nvidia/src/kernel/mem_mgr/pool_alloc.c b/src/nvidia/src/kernel/mem_mgr/pool_alloc.c index 321037d20b..485b1b94cd 100644 --- a/src/nvidia/src/kernel/mem_mgr/pool_alloc.c +++ b/src/nvidia/src/kernel/mem_mgr/pool_alloc.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2016-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -481,14 +481,11 @@ rmMemPoolSetup // The topmost pool is fed pages directly by PMA. // // Calling into PMA with GPU lock acquired may cause deadlocks in case RM - // is operating along side UVM. Currently, we don't support UVM on Windows. - // So, allow the topmost pool to call into PMA on Windows. This is not + // is operating along side UVM. Currently, we don't support UVM on Windows/MODS. + // So, allow the topmost pool to call into PMA on Windows/MODS. This is not // permissible on platforms that support UVM like Linux. - // TODO: Remove this special handling for Windows once we have taken care - // of reserving memory for page tables required for mapping GR context buffers - // in the channel vaspace. See bug 200590870 and 200614517. // - if (RMCFG_FEATURE_PLATFORM_WINDOWS) + if (RMCFG_FEATURE_PLATFORM_WINDOWS || RMCFG_FEATURE_PLATFORM_MODS) { flags = FLD_SET_DRF(_RMPOOL, _FLAGS, _AUTO_POPULATE, _ENABLE, flags); } diff --git a/src/nvidia/src/kernel/mem_mgr/standard_mem.c b/src/nvidia/src/kernel/mem_mgr/standard_mem.c index 9ec50bb564..dd5391a1d0 100644 --- a/src/nvidia/src/kernel/mem_mgr/standard_mem.c +++ b/src/nvidia/src/kernel/mem_mgr/standard_mem.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -42,7 +42,7 @@ NV_STATUS stdmemValidateParams RS_PRIV_LEVEL privLevel; CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); - NV_ASSERT_OR_RETURN(RMCFG_FEATURE_KERNEL_RM, NV_ERR_NOT_SUPPORTED); + NV_ASSERT_OR_RETURN(RMCFG_FEATURE_KERNEL_RM || RMCFG_FEATURE_PLATFORM_GSP, NV_ERR_NOT_SUPPORTED); NV_ASSERT_OR_RETURN(pCallContext != NULL, NV_ERR_INVALID_STATE); privLevel = pCallContext->secInfo.privLevel; @@ -155,6 +155,18 @@ NV_STATUS stdmemValidateParams return NV_ERR_INVALID_ARGUMENT; } + // + // When a sparsified VA range is requested by the client, RM constructs + // the page tables during the VirtMem construct call causing the lazy + // flag to skip memory reservation. This can cause RM to OOM if the + // memPool reserved memory is exhausted. + // + if ((pAllocData->flags & NVOS32_ALLOC_FLAGS_SPARSE) && + (pAllocData->flags & NVOS32_ALLOC_FLAGS_VIRTUAL)) + { + pAllocData->flags = pAllocData->flags &~ NVOS32_ALLOC_FLAGS_LAZY; + } + return NV_OK; } diff --git a/src/nvidia/src/kernel/mem_mgr/system_mem.c b/src/nvidia/src/kernel/mem_mgr/system_mem.c index a9009f0e84..d143673897 100644 --- a/src/nvidia/src/kernel/mem_mgr/system_mem.c +++ b/src/nvidia/src/kernel/mem_mgr/system_mem.c @@ -533,7 +533,7 @@ sysmemAllocResources // than the capture OS so if we're running a replay where the requested page size is larger, // assume this is a contiguous piece of memory, if contiguity is not specified. // - if (FLD_TEST_DRF(OS32, _ATTR, _PHYSICALITY, _DEFAULT, pVidHeapAlloc->attr)) + if (RMCFG_FEATURE_PLATFORM_MODS && FLD_TEST_DRF(OS32, _ATTR, _PHYSICALITY, _DEFAULT, pVidHeapAlloc->attr)) { if ((FLD_TEST_DRF(OS32, _ATTR, _PAGE_SIZE, _BIG, pVidHeapAlloc->attr) || FLD_TEST_DRF(OS32, _ATTR, _PAGE_SIZE, _HUGE, pVidHeapAlloc->attr)) && diff --git a/src/nvidia/src/kernel/mem_mgr/video_mem.c b/src/nvidia/src/kernel/mem_mgr/video_mem.c index d4fe2d6986..59d08dcfc0 100644 --- a/src/nvidia/src/kernel/mem_mgr/video_mem.c +++ b/src/nvidia/src/kernel/mem_mgr/video_mem.c @@ -127,7 +127,7 @@ _vidmemPmaAllocate MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); PMA *pPma = &pHeap->pmaObject; NvU64 size = 0; - NvU32 pageCount; + NvU32 pageCount; NvU32 pmaInfoSize; NvU64 pageSize; NV_STATUS status; @@ -265,7 +265,6 @@ _vidmemPmaAllocate allocOptions.flags |= PMA_ALLOCATE_FORCE_ALIGNMENT; allocOptions.alignment = NV_MAX(sizeAlign, pageSize); - // Get the number of pages to be allocated by PMA pageCount = (NvU32) NV_DIV_AND_CEIL(size, pageSize); @@ -1426,12 +1425,16 @@ vidmemCheckCopyPermissions_IMPL { Memory *pMemory = staticCast(pVideoMemory, Memory); OBJGPU *pSrcGpu = pMemory->pGpu; - NvHandle hSrcClient = RES_GET_CLIENT_HANDLE(pVideoMemory); - NvHandle hDstClient = RES_GET_CLIENT_HANDLE(pDstDevice); + RsClient *pSrcClient = RES_GET_CLIENT(pVideoMemory); + RsClient *pDstClient = RES_GET_CLIENT(pDstDevice); KernelMIGManager *pSrcKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pSrcGpu); KernelMIGManager *pDstKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pDstGpu); - NvBool bSrcClientKernel = (rmclientGetCachedPrivilegeByHandle(hSrcClient) >= RS_PRIV_LEVEL_KERNEL); - NvBool bDstClientKernel = (rmclientGetCachedPrivilegeByHandle(hDstClient) >= RS_PRIV_LEVEL_KERNEL); + NvBool bSrcClientKernel = + (rmclientGetCachedPrivilege(dynamicCast(pSrcClient, RmClient)) >= + RS_PRIV_LEVEL_KERNEL); + NvBool bDstClientKernel = + (rmclientGetCachedPrivilege(dynamicCast(pDstClient, RmClient)) >= + RS_PRIV_LEVEL_KERNEL); // // XXX: In case of MIG memory, duping across GPU instances is not allowed diff --git a/src/nvidia/src/kernel/mem_mgr/virtual_mem.c b/src/nvidia/src/kernel/mem_mgr/virtual_mem.c index ca178c9ce1..9929cac754 100644 --- a/src/nvidia/src/kernel/mem_mgr/virtual_mem.c +++ b/src/nvidia/src/kernel/mem_mgr/virtual_mem.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -1026,7 +1026,6 @@ _virtmemAllocKernelMapping if (bCoherentCpuMapping) { // Use a temp pointer to prevent overwriting the previous pointer by accident - NvP64 tempCpuPtr = NvP64_NULL; MEMORY_DESCRIPTOR *pMemDesc = memdescGetMemDescFromGpu(pDmaMappingInfo->pMemDesc, pGpu); KernelBus *pKernelBus = GPU_GET_KERNEL_BUS(pGpu); @@ -1035,20 +1034,11 @@ _virtmemAllocKernelMapping size, pDmaMappingInfo->pMemDesc->Size); NV_ASSERT(pGpu->getProperty(pGpu, PDB_PROP_GPU_ATS_SUPPORTED)); - NV_ASSERT(pDmaMappingInfo->pMemDesc->_flags & MEMDESC_FLAGS_PHYSICALLY_CONTIGUOUS); - tempCpuPtr = kbusMapCoherentCpuMapping_HAL(pGpu, pKernelBus, pMemDesc); - if (tempCpuPtr == NULL) - { - status = NV_ERR_GENERIC; - } - else - { - status = NV_OK; - tempCpuPtr = NvP64_PLUS_OFFSET(tempCpuPtr, offset); - } - - pDmaMappingInfo->KernelVAddr[gpuSubDevInst] = NvP64_VALUE(tempCpuPtr); + status = kbusMapCoherentCpuMapping_HAL(pGpu, pKernelBus, pMemDesc, offset, size, + NV_PROTECT_READ_WRITE, + &pDmaMappingInfo->KernelVAddr[gpuSubDevInst], + &pDmaMappingInfo->KernelPriv); } else { @@ -1152,7 +1142,8 @@ _virtmemFreeKernelMapping { KernelBus *pKernelBus = GPU_GET_KERNEL_BUS(pGpu); MEMORY_DESCRIPTOR *pMemDesc = memdescGetMemDescFromGpu(pDmaMappingInfo->pMemDesc, pGpu); - kbusUnmapCoherentCpuMapping_HAL(pGpu, pKernelBus, pMemDesc); + kbusUnmapCoherentCpuMapping_HAL(pGpu, pKernelBus, pMemDesc, pDmaMappingInfo->KernelVAddr[gpuSubDevInst], + pDmaMappingInfo->KernelPriv); } else { @@ -1304,8 +1295,7 @@ virtmemMapTo_IMPL } // Different cases for vidmem & system memory/fabric memory. - bIsSysmem = (tgtAddressSpace == ADDR_SYSMEM); - bIsSysmem = bIsSysmem || (tgtAddressSpace == ADDR_EGM); + bIsSysmem = (tgtAddressSpace == ADDR_SYSMEM) || (tgtAddressSpace == ADDR_EGM); // // Create a MEMORY_DESCRIPTOR describing this region of the memory diff --git a/src/nvidia/src/kernel/os/os_init.c b/src/nvidia/src/kernel/os/os_init.c index d58a6f4210..2e359dd552 100644 --- a/src/nvidia/src/kernel/os/os_init.c +++ b/src/nvidia/src/kernel/os/os_init.c @@ -99,17 +99,11 @@ initMiscOSFunctionPointers(OBJOS *pOS) static void initCommonMiscOSFunctionPointers(OBJOS *pOS) { - // Common OS function pointers. } static void initStubMiscOSFunctionPointers(OBJOS *pOS) { - // Stubbed OS function pointers. - pOS->osPageArrayGetPhysAddr = stubOsPageArrayGetPhysAddr; - - pOS->osInternalReserveAllocCallback = stubOsInternalReserveAllocCallback; - pOS->osInternalReserveFreeCallback = stubOsInternalReserveFreeCallback; } static void @@ -123,14 +117,11 @@ initMacOSCoreOSFunctionPointers(OBJOS *pOS) pOS->osNv_rdcr4 = stubOsnv_rdcr4; pOS->osNv_rdxcr0 = stubOsnv_rdxcr0; pOS->osNv_cpuid = stubOsnv_cpuid; - pOS->osNv_rdmsr = stubOsnv_rdmsr; - pOS->osNv_wrmsr = stubOsnv_wrmsr; } static void initAPIOSFunctionPointers(OBJOS *pOS) { - pOS->osRmInitRm = osRmInitRm; } // diff --git a/src/nvidia/src/kernel/os/os_sanity.c b/src/nvidia/src/kernel/os/os_sanity.c index f5ef3f170a..c19063c7b8 100644 --- a/src/nvidia/src/kernel/os/os_sanity.c +++ b/src/nvidia/src/kernel/os/os_sanity.c @@ -34,7 +34,6 @@ #include #include "kernel/gpu/intr/intr.h" #include -#include /*! * @brief Wait for interrupt @@ -235,14 +234,9 @@ static NV_STATUS _osVerifyInterrupts( while (!interrupt_triggered) { -#if defined(NV_UNIX) && !defined(NV_MODS) - osDelayNs(5 * 1000); + osDelayUs(5); Bailout += 5; -#else - OBJTMR *pTmr = GPU_GET_TIMER(pGpu); - tmrDelay(pTmr, 5 * 1000); - Bailout += 5; -#endif + if (Bailout > pGpu->timeoutData.defaultus) break; } diff --git a/src/nvidia/src/kernel/os/os_stubs.c b/src/nvidia/src/kernel/os/os_stubs.c index 2ce3fc7731..915bc0ae9d 100644 --- a/src/nvidia/src/kernel/os/os_stubs.c +++ b/src/nvidia/src/kernel/os/os_stubs.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -80,18 +80,6 @@ int stubOsnv_cpuid(OBJOS *pOS, int arg1, int arg2, NvU32 *arg3, return 0; } -NvU32 stubOsnv_rdmsr(OBJOS *pOS, NvU32 arg1, NvU32 *arg2, NvU32 *arg3) -{ - STUB_CHECK(122); - return 0; -} - -NvU32 stubOsnv_wrmsr(OBJOS *pOS, NvU32 arg1, NvU32 arg2, NvU32 arg3) -{ - STUB_CHECK(123); - return 0; -} - NV_STATUS osSimEscapeWrite(OBJGPU *pGpu, const char *path, NvU32 Index, NvU32 Size, NvU32 Value) { return NV_ERR_GENERIC; @@ -230,20 +218,18 @@ NV_STATUS stubOsObjectEventNotification(NvHandle hClient, NvHandle hObject, NvU3 } RmPhysAddr -stubOsPageArrayGetPhysAddr(OS_GPU_INFO *pOsGpuInfo, void* pPageData, NvU32 pageIndex) +osPageArrayGetPhysAddr(OS_GPU_INFO *pOsGpuInfo, void* pPageData, NvU32 pageIndex) { NV_ASSERT(0); return 0; } -void stubOsInternalReserveAllocCallback(NvU64 offset, NvU64 size, NvU32 gpuId) +void osInternalReserveAllocCallback(NvU64 offset, NvU64 size, NvU32 gpuId) { - return; } -void stubOsInternalReserveFreeCallback(NvU64 offset, NvU32 gpuId) +void osInternalReserveFreeCallback(NvU64 offset, NvU32 gpuId) { - return; } NV_STATUS osGetCurrentProcessGfid(NvU32 *pGfid) @@ -420,15 +406,6 @@ osTegraSocGetHdcpEnabled(OS_GPU_INFO *pOsGpuInfo) return NV_TRUE; } -NvBool -osTegraSocIsSimNetlistNet07 -( - OS_GPU_INFO *pOsGpuInfo -) -{ - return NV_FALSE; -} - void osTegraGetDispSMMUStreamIds ( @@ -455,6 +432,17 @@ osTegraSocParseFixedModeTimings return NV_OK; } +NV_STATUS +osTegraSocPowerManagement +( + OS_GPU_INFO *pOsGpuInfo, + NvBool bInPMTransition, + NvU32 newPMLevel +) +{ + return NV_OK; +} + NV_STATUS osLockPageableDataSection(RM_PAGEABLE_SECTION *pSection) { return NV_OK; @@ -634,6 +622,21 @@ NvBool osDbgBreakpointEnabled(void) return NV_TRUE; } +NV_STATUS +osGetSysmemInfo +( + OBJGPU *pGpu, + NvU64 *pSysmemBaseAddr, + NvU64 *pSysmemTotalSize +) +{ + // Bug 4377373 - TODO: Need to add proper implementation for non MODS platform. + *pSysmemBaseAddr = 0; + *pSysmemTotalSize = (1ULL << 32); + + return NV_OK; +} + NV_STATUS osNvifMethod( OBJGPU *pGpu, NvU32 func, @@ -776,6 +779,8 @@ osTegraSocDeviceReset return NV_ERR_NOT_SUPPORTED; } +#if (RMCFG_FEATURE_PLATFORM_WINDOWS && !RMCFG_FEATURE_TEGRA_BPMP) || \ + (!RMCFG_FEATURE_PLATFORM_WINDOWS && !RMCFG_FEATURE_TEGRA_SOC_NVDISPLAY) NV_STATUS osTegraSocPmPowergate ( @@ -793,6 +798,7 @@ osTegraSocPmUnpowergate { return NV_ERR_NOT_SUPPORTED; } +#endif NvU32 osTegraSocFuseRegRead(NvU32 addr) diff --git a/src/nvidia/src/kernel/os/os_timer.c b/src/nvidia/src/kernel/os/os_timer.c index bfb3ff7499..c0625f3883 100644 --- a/src/nvidia/src/kernel/os/os_timer.c +++ b/src/nvidia/src/kernel/os/os_timer.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2002-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2002-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -85,7 +85,6 @@ osDestroy1HzCallbacks { if (pTmr->pOs1HzEvent != NULL) { - tmrEventCancel(pTmr, pTmr->pOs1HzEvent); tmrEventDestroy(pTmr, pTmr->pOs1HzEvent); pTmr->pOs1HzEvent = NULL; } diff --git a/src/nvidia/src/kernel/platform/acpi_common.c b/src/nvidia/src/kernel/platform/acpi_common.c index 0c8c311042..ec15f9a422 100644 --- a/src/nvidia/src/kernel/platform/acpi_common.c +++ b/src/nvidia/src/kernel/platform/acpi_common.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2000-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2000-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -34,6 +34,7 @@ #include "gps.h" #include "nvop.h" #include "nvhybridacpi.h" +#include "nvmisc.h" #include "jt.h" #include "pex.h" #include "mxm_spec.h" @@ -475,7 +476,7 @@ remapDsmFunctionAndSubFunction // Loop through (in precendence order) to find the GUID/subfunction until we find one that supports the call. testDSMfuncIndex = 0; - while(testDSMfuncIndex < sizeof(dsmOrderOfPrecedenceList)/sizeof(dsmOrderOfPrecedenceList[0])) + while(testDSMfuncIndex < NV_ARRAY_ELEMENTS(dsmOrderOfPrecedenceList)) { // remap the generic subfunction number of the one that matches this function. if ((_getRemappedDsmSubfunction(dsmOrderOfPrecedenceList[testDSMfuncIndex], *pRemappedDsmSubFunction, &remappedDSMSubFunction)) == NV_OK) @@ -554,7 +555,7 @@ getDsmGetObjectSubfunction if (remapDsmFunctionAndSubFunction(pGpu, &curFuncForGetAllObjects, &dummySubFunc) == NV_OK) { testDSMfuncIndex = 0; - while(testDSMfuncIndex < sizeof(dsmOrderOfPrecedenceList)/sizeof(dsmOrderOfPrecedenceList[0])) + while(testDSMfuncIndex < NV_ARRAY_ELEMENTS(dsmOrderOfPrecedenceList)) { if (dsmOrderOfPrecedenceList[testDSMfuncIndex] == curFuncForGetObjByType) { @@ -888,7 +889,7 @@ _acpiDsmCallbackInit // Loop through the list of GUIDs that support callbacks in priority order for (testDSMfuncIndex = 0; - testDSMfuncIndex < (sizeof(callbackOrderOfPrecedenceList)/sizeof(callbackOrderOfPrecedenceList[0])); + testDSMfuncIndex < (NV_ARRAY_ELEMENTS(callbackOrderOfPrecedenceList)); testDSMfuncIndex++) { func = callbackOrderOfPrecedenceList[testDSMfuncIndex]; diff --git a/src/nvidia/src/kernel/platform/chipset/chipset_pcie.c b/src/nvidia/src/kernel/platform/chipset/chipset_pcie.c index 2fc50d5fa1..861a1b00e1 100644 --- a/src/nvidia/src/kernel/platform/chipset/chipset_pcie.c +++ b/src/nvidia/src/kernel/platform/chipset/chipset_pcie.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2000-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2000-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -47,6 +47,7 @@ #include "core/thread_state.h" #include "Nvcm.h" #include "nvdevid.h" +#include "nvmisc.h" #include "published/maxwell/gm107/dev_nv_xve.h" // NV_XVE_VCCAP_CTRL0* #include "published/pcie_switch/pcie_switch_ref.h" @@ -871,7 +872,7 @@ gpuDevIdIsMultiGpuBoard NvU32 i, j; NvBool bFound = NV_FALSE, bInvalidSubIds = NV_FALSE; - for (i = 0; i < sizeof(multiGpuBoards) / sizeof(NV_MULTI_GPU_BOARD_CONFIGS); + for (i = 0; i < NV_ARRAY_ELEMENTS(multiGpuBoards); i++) { bInvalidSubIds = NV_FALSE; diff --git a/src/nvidia/src/kernel/platform/hwbc.c b/src/nvidia/src/kernel/platform/hwbc.c index 0967f08a99..95900912fc 100644 --- a/src/nvidia/src/kernel/platform/hwbc.c +++ b/src/nvidia/src/kernel/platform/hwbc.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2000-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2000-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -154,9 +154,12 @@ #define NV_PLX_EEPROM_DATA_ADDR_ZERO_SIGNATURE 7:0 #define NV_PLX_EEPROM_DATA_ADDR_ZERO_CONFIGBYTE_COUNT 31:16 +#define HWBC_UPSTREAM_BUS_SPEED_GEN1PCIE 1 +#define HWBC_UPSTREAM_BUS_SPEED_GEN2PCIE 2 +#define HWBC_UPSTREAM_BUS_SPEED_GEN3PCIE 3 + static NV_STATUS Plx_Pex8747_setupFunc(OBJHWBC *pPlx, OBJCL *pCl); static NV_STATUS Plx_Pex8747_ChangeUpstreamBusSpeed(OBJHWBC *pPlx, OBJCL *pCl, NvU32 cmd); -static NV_STATUS Plx_Pex8747_GetUpstreamBusSpeed(OBJHWBC *pPlx, OBJCL *pCl, NvU32 *speed); static RmPhysAddr Plx_Pex8747_GetBar0(OBJCL *pCl, OBJHWBC *pPlx); // @@ -173,9 +176,6 @@ static NV_STATUS objClResumeBridgeHWBC(OBJCL *, OBJHWBC *); static NV_STATUS Nvidia_BR04_ShiftAliasingRegisters(RmPhysAddr); static RmPhysAddr Nvidia_BR04_GetBar0(OBJCL *, OBJHWBC *, NvS32); static NV_STATUS Nvidia_BR04_setupFunc(OBJHWBC *, OBJCL *); -static NV_STATUS Nvidia_BR04_FindDpInfo(OBJCL *, OBJHWBC *, OBJGPU *); -static NV_STATUS Nvidia_BR04_ChangeUpstreamBusSpeed(OBJHWBC *pBR04, OBJCL *pCl, NvU32 cmd); -static NV_STATUS Nvidia_BR04_GetUpstreamBusSpeed(OBJHWBC *pBR04, OBJCL *pCl, NvU32 *speed); // // This function examines a PLX firmware ROM to retrieve firmware details. @@ -230,10 +230,6 @@ objClFindUpperHWBC } portMemSet((void *)pHWBC, 0, sizeof(OBJHWBC)); - // dpForGpuInstance array must be initialized to -1s. - portMemSet((void *)pHWBC->dpForGpuInstance, 0xff, - NV_MAX_DEVICES * sizeof(NvS8)); - pHWBC->bcRes = HWBC_PLX_PEX8747; // Find upstream port @@ -323,10 +319,6 @@ objClFindUpperHWBC } portMemSet((void *)pHWBC, 0, sizeof(OBJHWBC)); - // dpForGpuInstance array must be initialized to -1s. - portMemSet((void *)pHWBC->dpForGpuInstance, 0xff, - NV_MAX_DEVICES * sizeof(NvS8)); - pHWBC->bcRes = HWBC_NVIDIA_BR04; // Find upstream port @@ -434,9 +426,6 @@ objClSetPcieHWBC else if (father->bcRes == HWBC_NVIDIA_BR04) { pGpu->setProperty(pGpu, PDB_PROP_GPU_BEHIND_BR04, NV_TRUE); - // Determine which downstream port of the BR04 the GPU is - // behind. - Nvidia_BR04_FindDpInfo(pCl, father, pGpu); } root = &(*root)->pFirstChild; } @@ -478,7 +467,6 @@ objClSetPcieHWBC else if (now->bcRes == HWBC_NVIDIA_BR04) { pGpu->setProperty(pGpu, PDB_PROP_GPU_BEHIND_BR04, NV_TRUE); - Nvidia_BR04_FindDpInfo(pCl, now, pGpu); } port.domain = now->ctrlDev.domain; @@ -946,170 +934,6 @@ objClResumeBridgeHWBC } -NV_STATUS -clChangeUpstreamBusSpeed_IMPL -( - NvU8 primaryBus, - OBJCL *pCl, - NvU32 cmd -) -{ - OBJHWBC *target = pCl->pHWBC; - - while (target) - { - if (target->ctrlDev.bus == primaryBus && !target->ctrlDev.device && !target->ctrlDev.func) - { - // We found it - break; - } - - if (target->minBus <= primaryBus && target->maxBus >= primaryBus) // bus in range - { - target = target->pFirstChild; - } - else - { - target = target->pSibling; - } - } - - if (!target) - { - NV_PRINTF(LEVEL_ERROR, - "Cannot find HWBC with given primaryBus.\n"); - return NV_ERR_INVALID_ARGUMENT; - } - - // father should point to the desired HWBC device - switch(target->bcRes) - { - case HWBC_NVIDIA_BR04: - return Nvidia_BR04_ChangeUpstreamBusSpeed(target, pCl, cmd); - case HWBC_PLX_PEX8747: - return Plx_Pex8747_ChangeUpstreamBusSpeed(target, pCl, cmd); - default: - DBG_BREAKPOINT(); // Unsupported device for this functionality - - } - - return NV_ERR_INVALID_ARGUMENT; -} - -NV_STATUS -clGetUpstreamBusSpeed_IMPL -( - NvU8 primaryBus, - OBJCL *pCl, - NvU32 *speed -) -{ - OBJHWBC *target = pCl->pHWBC; - - while (target) - { - if (target->ctrlDev.bus == primaryBus && !target->ctrlDev.device && !target->ctrlDev.func) - { - // We found it - break; - } - - if (target->minBus <= primaryBus && target->maxBus >= primaryBus) // bus in range - { - target = target->pFirstChild; - } - else - { - target = target->pSibling; - } - } - - if (!target) - { - NV_PRINTF(LEVEL_ERROR, - "Cannot find HWBC with given primaryBus.\n"); - return NV_ERR_INVALID_ARGUMENT; - } - - // father should point to the desired HWBC device - switch(target->bcRes) - { - case HWBC_NVIDIA_BR04: - return Nvidia_BR04_GetUpstreamBusSpeed(target, pCl, speed); - case HWBC_PLX_PEX8747: - return Plx_Pex8747_GetUpstreamBusSpeed(target, pCl, speed); - default: - DBG_BREAKPOINT(); // Unsupported device for this functionality - - } - - return NV_ERR_GENERIC; -} - -NV_STATUS -clHWBCGetUpstreamBAR0_IMPL -( - NvU8 primaryBus, - OBJCL *pCl, - RmPhysAddr *pBAR0 -) -{ - OBJHWBC *target = pCl->pHWBC; - - while (target) - { - if (target->ctrlDev.bus == primaryBus && !target->ctrlDev.device && !target->ctrlDev.func) - { - // We found it - break; - } - - if (target->minBus <= primaryBus && target->maxBus >= primaryBus) // bus in range - { - target = target->pFirstChild; - } - else - { - target = target->pSibling; - } - } - - if (!target) - { - NV_PRINTF(LEVEL_ERROR, "Cannot find HWBC with given primaryBus.\n"); - return NV_ERR_INVALID_ARGUMENT; - } - - // target should point to the desired HWBC device - switch(target->bcRes) - { - case HWBC_NVIDIA_BR04: - *pBAR0 = Nvidia_BR04_GetBar0(pCl, target, -1); - if (0 == *pBAR0) - { - return NV_ERR_GENERIC; - } - - return NV_OK; - - case HWBC_PLX_PEX8747: - *pBAR0 = Plx_Pex8747_GetBar0(pCl, target); - if (0 == *pBAR0) - { - return NV_ERR_GENERIC; - } - - return NV_OK; - - default: - DBG_BREAKPOINT(); // Unsupported device for this functionality - - } - - return NV_ERR_GENERIC; -} - - // // Determine whether a set of GPUs are connected under a conjoint BR04 heirarchy // @@ -1537,423 +1361,6 @@ Nvidia_BR04_GetBar0 -static NV_STATUS -Nvidia_BR04_ChangeUpstreamBusSpeed -( - OBJHWBC *pBR04, - OBJCL *pCl, - NvU32 cmd -) -{ - volatile NvU32 *pData = NULL; // Register access for upstream port - volatile NvU32 *pDpData[4] = { NULL, NULL, NULL, NULL}; // Register access for each downstream port - RmPhysAddr bar0; - NvU32 regValue; - NvU32 regValue2; - NvS32 i; - NvBool enableCorrErrors = NV_FALSE; - NV_STATUS RetVal = NV_OK; - - // Check if HWBC resource is BR04 - if (!pBR04 || pBR04->bcRes != HWBC_NVIDIA_BR04) - return NV_ERR_INVALID_ARGUMENT; - - if (!pBR04->ctrlDev.handle) - return NV_ERR_INVALID_ARGUMENT; - - // Set up config access - if (0 == (bar0 = Nvidia_BR04_GetBar0(pCl, pBR04, -1))) - { - return NV_ERR_GENERIC; - } - - pData = osMapKernelSpace(bar0, - NV_BR04_XVU_CONFIG_SIZE, - NV_MEMORY_UNCACHED, - NV_PROTECT_READ_WRITE); - if (!pData) - { - return NV_ERR_GENERIC; - } - - for (i = 0; i < 4; i++) - { - pDpData[i] = NULL; - if (!(bar0 = Nvidia_BR04_GetBar0(pCl, pBR04, i)) || - !(pDpData[i] = osMapKernelSpace(bar0, - NV_BR04_XVD_CONFIG_SIZE, - NV_MEMORY_UNCACHED, - NV_PROTECT_READ_WRITE))) - { - // If we've failed here we have to roll back any successful - // mappings, then return error. - for (i--; i >= 0; i--) - { - if (pDpData[i] != NULL) - { - osUnmapKernelSpace((void*)(pDpData[i]), - NV_BR04_XVD_CONFIG_SIZE); - } - } - osUnmapKernelSpace((void*)pData, NV_BR04_XVU_CONFIG_SIZE); - - return NV_ERR_GENERIC; - } - } - - switch (cmd) - { - case HWBC_UPSTREAM_BUS_SPEED_GEN1PCIE: - // Get the current pcie speed info - regValue = pData[NV_BR04_XVU_LINK_CTRLSTAT / sizeof(*pData)]; - regValue = REF_VAL(NV_BR04_XVU_LINK_CTRLSTAT_LINK_SPEED, regValue); - - // if already at target speed then return success - if (regValue == NV_BR04_XVU_LINK_CTRLSTAT_LINK_SPEED_2P5G) - { - NV_PRINTF(LEVEL_INFO, - "Already in Gen1 speed. No need to transition.\n"); - } - else - { - // - // Set the UP to Gen1. - // - - regValue = pData[NV_BR04_XVU_LINK_CTRLSTAT2 / sizeof(*pData)]; - regValue = FLD_SET_DRF(_BR04, _XVU_LINK_CTRLSTAT2, _TARGET_LINK_SPEED, _2P5G, regValue); - pData[NV_BR04_XVU_LINK_CTRLSTAT2 / sizeof(*pData)] = regValue; - - // These values needed for bug 361633. -# ifndef NV_BR04_XVU_DEV_CTRLSTAT_CORR_ERR_RPT_EN_ENABLED -# define NV_BR04_XVU_DEV_CTRLSTAT_CORR_ERR_RPT_EN_DISABLED 0 -# define NV_BR04_XVU_DEV_CTRLSTAT_CORR_ERR_RPT_EN_ENABLED 1 -# endif - - // Disable CEs during training per bug 361633 - regValue = pData[NV_BR04_XVU_DEV_CTRLSTAT / sizeof(*pData)]; - if (REF_VAL(NV_BR04_XVU_DEV_CTRLSTAT_CORR_ERR_RPT_EN, regValue) - != NV_BR04_XVU_DEV_CTRLSTAT_CORR_ERR_RPT_EN_DISABLED) - { - regValue = FLD_SET_DRF(_BR04, _XVU_DEV_CTRLSTAT, _CORR_ERR_RPT_EN, _DISABLED, regValue); - pData[NV_BR04_XVU_DEV_CTRLSTAT / sizeof(*pData)] = regValue; - enableCorrErrors = NV_TRUE; - } - - // - // Trigger speed change on UP - // - - // This #define should be removed when this is available in the hardware ref headers. - // See NVBug 332731 for more details. -# ifndef NV_BR04_XVU_G2_PRIV_XP_LCTRL_2_SPEED_CHANGE_ONE -# define NV_BR04_XVU_G2_PRIV_XP_LCTRL_2_SPEED_CHANGE_ONE 0x00000001 -# endif - - regValue = pData[NV_BR04_XVU_G2_PRIV_XP_LCTRL_2 / sizeof(*pData)]; - regValue = FLD_SET_DRF(_BR04, _XVU_G2_PRIV_XP_LCTRL_2, _SPEED_CHANGE, _ONE, regValue); - regValue = FLD_SET_DRF(_BR04, _XVU_G2_PRIV_XP_LCTRL_2, _TARGET_LINK_SPEED, _2P5, regValue); - pData[NV_BR04_XVU_G2_PRIV_XP_LCTRL_2 / sizeof(*pData)] = regValue; - - // Per bug 340793, we need to delay at least 5us for the training to complete. - osDelay(1); - - // Get the current pcie speed info - regValue = pData[NV_BR04_XVU_LINK_CTRLSTAT / sizeof(*pData)]; - regValue = REF_VAL(NV_BR04_XVU_LINK_CTRLSTAT_LINK_SPEED, regValue); - - // if already at target speed then quit - if (regValue == NV_BR04_XVU_LINK_CTRLSTAT_LINK_SPEED_2P5G) - { - NV_PRINTF(LEVEL_INFO, "Verified we are at Gen1 speed.\n"); - } - else - { - NV_PRINTF(LEVEL_ERROR, "Failed to train to Gen1 speed.\n"); - RetVal = NV_ERR_GENERIC; - } - - if (enableCorrErrors == NV_TRUE) - { - regValue = pData[NV_BR04_XVU_DEV_CTRLSTAT / sizeof(*pData)]; - regValue = FLD_SET_DRF(_BR04, _XVU_DEV_CTRLSTAT, _CORR_ERR_RPT_EN, _ENABLED, regValue); - pData[NV_BR04_XVU_DEV_CTRLSTAT / sizeof(*pData)] = regValue; - } - } - break; - - case HWBC_UPSTREAM_BUS_SPEED_GEN2PCIE: - // First check to make sure the other end of the link supports Gen2. - regValue = pData[NV_BR04_XVU_G2_PRIV_XP_LCTRL_2 / sizeof(*pData)]; - if (REF_VAL(NV_BR04_XVU_G2_PRIV_XP_LCTRL_2_DATA_RATE_SUPPORTED_REMOTE, regValue) != NV_BR04_XVU_G2_PRIV_XP_LCTRL_2_DATA_RATE_SUPPORTED_REMOTE_5P0_2P5) - { - NV_PRINTF(LEVEL_INFO, - "*** Gen2 not supported by other side of link.\n"); - RetVal = NV_ERR_GENERIC; - } - else - { - // Get the current pcie speed info - regValue = pData[NV_BR04_XVU_LINK_CTRLSTAT / sizeof(*pData)]; - regValue = REF_VAL(NV_BR04_XVU_LINK_CTRLSTAT_LINK_SPEED, regValue); - - // if already at target speed then return success - if (regValue == NV_BR04_XVU_LINK_CTRLSTAT_LINK_SPEED_5P0G) - { - NV_PRINTF(LEVEL_INFO, - "Already in Gen2 speed. No need to transition.\n"); - } - else - { - // - // Allow Gen2 on upstream and downstream ports, if supported. - // - - NV_PRINTF(LEVEL_INFO, - "*** Enabling BR04 Gen2 features.\n"); - - // Enable Gen2 support globally on BR04 links. - regValue = pData[NV_BR04_XVU_BOOT_1 / sizeof(*pData)]; - regValue2 = FLD_SET_DRF(_BR04, _XVU_BOOT_1, _LINK_SPEED, _5000, regValue); - if (regValue2 != regValue) - { - pData[NV_BR04_XVU_BOOT_1 / sizeof(*pData)] = regValue2; - } - - // Set supported data rates to include Gen2 on upstream link. - regValue = pData[NV_BR04_XVU_G2_PRIV_XP_LCTRL_2 / sizeof(*pData)]; - regValue2 = FLD_SET_DRF(_BR04, _XVU_G2_PRIV_XP_LCTRL_2, _DATA_RATE_SUPPORTED, _5P0_2P5, regValue); - if (regValue2 != regValue) - { - pData[NV_BR04_XVU_G2_PRIV_XP_LCTRL_2 / sizeof(*pData)] = regValue2; - } - - // Set supported data rates to include Gen2 on downstream links. - for (i = 0; i < 4; ++i) - { - regValue = pDpData[i][NV_BR04_XVD_LINK_CTRLSTAT2 / sizeof(*pDpData[i])]; - regValue2 = FLD_SET_DRF(_BR04, _XVD_LINK_CTRLSTAT2, _TARGET_LINK_SPEED, _5P0G, regValue); - if (regValue2 != regValue) - { - pDpData[i][NV_BR04_XVD_LINK_CTRLSTAT2 / sizeof(*pDpData[i])] = regValue2; - } - } - - // - // Set the UP to Gen2. - // - - regValue = pData[NV_BR04_XVU_LINK_CTRLSTAT2 / sizeof(*pData)]; - regValue = FLD_SET_DRF(_BR04, _XVU_LINK_CTRLSTAT2, _TARGET_LINK_SPEED, _5P0G, regValue); - pData[NV_BR04_XVU_LINK_CTRLSTAT2 / sizeof(*pData)] = regValue; - - // These values needed for bug 361633. -# ifndef NV_BR04_XVU_DEV_CTRLSTAT_CORR_ERR_RPT_EN_ENABLED -# define NV_BR04_XVU_DEV_CTRLSTAT_CORR_ERR_RPT_EN_DISABLED 0 -# define NV_BR04_XVU_DEV_CTRLSTAT_CORR_ERR_RPT_EN_ENABLED 1 -# endif - - // Disable CEs during training per bug 361633 - regValue = pData[NV_BR04_XVU_DEV_CTRLSTAT / sizeof(*pData)]; - if (REF_VAL(NV_BR04_XVU_DEV_CTRLSTAT_CORR_ERR_RPT_EN, regValue) - != NV_BR04_XVU_DEV_CTRLSTAT_CORR_ERR_RPT_EN_DISABLED) - { - regValue = FLD_SET_DRF(_BR04, _XVU_DEV_CTRLSTAT, _CORR_ERR_RPT_EN, _DISABLED, regValue); - pData[NV_BR04_XVU_DEV_CTRLSTAT / sizeof(*pData)] = regValue; - enableCorrErrors = NV_TRUE; - } - - // - // Trigger speed change on UP - // - - // This #define should be removed when this is available in the hardware ref headers. - // See NVBug 332731 for more details. - # ifndef NV_BR04_XVU_G2_PRIV_XP_LCTRL_2_SPEED_CHANGE_ONE - # define NV_BR04_XVU_G2_PRIV_XP_LCTRL_2_SPEED_CHANGE_ONE 0x00000001 - # endif - - regValue = pData[NV_BR04_XVU_G2_PRIV_XP_LCTRL_2 / sizeof(*pData)]; - regValue = FLD_SET_DRF(_BR04, _XVU_G2_PRIV_XP_LCTRL_2, _SPEED_CHANGE, _ONE, regValue); - regValue = FLD_SET_DRF(_BR04, _XVU_G2_PRIV_XP_LCTRL_2, _TARGET_LINK_SPEED, _5P0, regValue); - regValue = FLD_SET_DRF(_BR04, _XVU_G2_PRIV_XP_LCTRL_2, _DATA_RATE_SUPPORTED, _5P0_2P5, regValue); - pData[NV_BR04_XVU_G2_PRIV_XP_LCTRL_2 / sizeof(*pData)] = regValue; - - // Per bug 340793, we need to delay at least 5us for the training to complete. - osDelay(1); - - // Get the current pcie speed info - regValue = pData[NV_BR04_XVU_LINK_CTRLSTAT / sizeof(*pData)]; - regValue = REF_VAL(NV_BR04_XVU_LINK_CTRLSTAT_LINK_SPEED, regValue); - - // if already at target speed then quit - if (regValue == NV_BR04_XVU_LINK_CTRLSTAT_LINK_SPEED_5P0G) - { - NV_PRINTF(LEVEL_INFO, - "Verified we are at Gen2 speed.\n"); - } - else - { - NV_PRINTF(LEVEL_ERROR, - "Failed to train to Gen2 speed.\n"); - RetVal = NV_ERR_GENERIC; - } - - if (enableCorrErrors == NV_TRUE) - { - regValue = pData[NV_BR04_XVU_DEV_CTRLSTAT / sizeof(*pData)]; - regValue = FLD_SET_DRF(_BR04, _XVU_DEV_CTRLSTAT, _CORR_ERR_RPT_EN, _ENABLED, regValue); - pData[NV_BR04_XVU_DEV_CTRLSTAT / sizeof(*pData)] = regValue; - } - } - } - break; - } - - for (i = 3; i >= 0; --i) - { - osUnmapKernelSpace((void*)(pDpData[i]), NV_BR04_XVD_CONFIG_SIZE); - } - osUnmapKernelSpace((void*) pData, NV_BR04_XVU_CONFIG_SIZE); - return RetVal; -} - -static NV_STATUS -Nvidia_BR04_GetUpstreamBusSpeed -( - OBJHWBC *pBR04, - OBJCL *pCl, - NvU32 *speed -) -{ - volatile NvU32 *pData = NULL; // Register access for upstream port - RmPhysAddr bar0; - NvU32 regValue; - - // Check if HWBC resource is BR04 - if (!pBR04 || pBR04->bcRes != HWBC_NVIDIA_BR04) - return NV_ERR_INVALID_ARGUMENT; - - if (!pBR04->ctrlDev.handle) - return NV_ERR_INVALID_ARGUMENT; - - // Set up config access - if (0 == (bar0 = Nvidia_BR04_GetBar0(pCl, pBR04, -1))) - { - return NV_ERR_GENERIC; - } - - pData = osMapKernelSpace(bar0, - NV_BR04_XVU_CONFIG_SIZE, - NV_MEMORY_UNCACHED, - NV_PROTECT_READ_WRITE); - if (!pData) - { - return NV_ERR_GENERIC; - } - - // Get the current pcie speed info - regValue = pData[NV_BR04_XVU_LINK_CTRLSTAT / sizeof(*pData)]; - regValue = REF_VAL(NV_BR04_XVU_LINK_CTRLSTAT_LINK_SPEED, regValue); - - osUnmapKernelSpace((void*) pData, NV_BR04_XVU_CONFIG_SIZE); - - if (regValue == NV_BR04_XVU_LINK_CTRLSTAT_LINK_SPEED_2P5G) - { - *speed = HWBC_UPSTREAM_BUS_SPEED_GEN1PCIE; - } - else if (regValue == NV_BR04_XVU_LINK_CTRLSTAT_LINK_SPEED_5P0G) - { - *speed = HWBC_UPSTREAM_BUS_SPEED_GEN2PCIE; - } - else - { - NV_PRINTF(LEVEL_ERROR, " BR04 Upstream Port at unknown bus speed.\n"); - return NV_ERR_GENERIC; - } - - return NV_OK; -} - - -NV_STATUS -Nvidia_BR04_disableDownstreamASPM -( - NvU8 bus -) -{ - OBJSYS *pSys = SYS_GET_INSTANCE(); - OBJCL *pCl = SYS_GET_CL(pSys); - OBJHWBC *target = pCl->pHWBC; - OBJHWBC *parent = NULL; - NvU32 regValue; - NvU32 regValue2; - volatile NvU32 *pData = NULL; // Register access for BR04 upstream port - RmPhysAddr bar0; - - while (target) - { - if (target->ctrlDev.bus == bus && target->ctrlDev.device == 0 && target->ctrlDev.func == 0) - { - // We found ourselves and our parent - break; - } - - if (target->minBus <= bus && target->maxBus >= bus) // bus in range - { - parent = target; - target = target->pFirstChild; - } - else - { - target = target->pSibling; - } - } - - if (parent == NULL || parent->bcRes != HWBC_NVIDIA_BR04) - { - // We're plugged into the root port or a non-BR04 bridge. Do nothing. - return NV_OK; - } - - // - // There is a BR04 above us. Disable its downstream ASPM. - // - - if (0 == (bar0 = Nvidia_BR04_GetBar0(pCl, parent, -1))) - { - return NV_ERR_GENERIC; - } - - pData = osMapKernelSpace(bar0, - NV_BR04_XVU_CONFIG_SIZE, - NV_MEMORY_UNCACHED, - NV_PROTECT_READ_WRITE); - if (pData == NULL) - { - return NV_ERR_GENERIC; - } - - regValue = pData[NV_BR04_XVU_REV_CC / sizeof(*pData)]; - if (DRF_VAL(_BR04_XVU, _REV_CC, _MAJOR_REVISION_ID, regValue) == 0xa && - DRF_VAL(_BR04_XVU, _REV_CC, _MINOR_REVISION_ID, regValue) >= 3) - { - // - // Turn off ASPM on BR04 A03. - // - - regValue = pData[NV_BR04_XVU_CYA_NIBBLE0 / sizeof(*pData)]; - regValue2 = FLD_SET_DRF(_BR04, _XVU_CYA_NIBBLE0, _RSVD_4, _DPX_ASPM_DISABLE, regValue); - if (regValue2 != regValue) - { - pData[NV_BR04_XVU_CYA_NIBBLE0 / sizeof(*pData)] = regValue2; - } - } - - osUnmapKernelSpace((void*) pData, NV_BR04_XVU_CONFIG_SIZE); - return NV_OK; -} - // // Set up registers for BR04 // @@ -2623,107 +2030,6 @@ Nvidia_BR04_setupFunc } - -// -// Determines which downstream port of a BR04, if any, the specified GPU is -// behind. -// -static NV_STATUS -Nvidia_BR04_FindDpInfo -( - OBJCL *pCl, - OBJHWBC *pHWBC, - OBJGPU *pGpu -) -{ - RmPhysAddr bar0; - volatile NvU32 *pData = NULL; // Register access for upstream port - volatile NvU32 *pDpData[4] = { NULL, NULL, NULL, NULL}; // Register access for each downstream port - NvU32 gpuBusNum, secNum, subNum; - NvS32 i; // Must be signed to count for a backwards loop - NV_STATUS status = NV_ERR_GENERIC; - - // Check that the HWBC object is correctly initialized and is BR04 - if (!pHWBC || pHWBC->bcRes != HWBC_NVIDIA_BR04 || !pHWBC->ctrlDev.valid) - { - return NV_ERR_INVALID_ARGUMENT; - } - - // Setup BR04 config access - if (0 == (bar0 = Nvidia_BR04_GetBar0(pCl, pHWBC, -1))) - { - return NV_ERR_GENERIC; - } - - pData = osMapKernelSpace(bar0, - NV_BR04_XVU_CONFIG_SIZE, - NV_MEMORY_UNCACHED, - NV_PROTECT_READ_WRITE); - if (pData == NULL) - { - return NV_ERR_GENERIC; - } - - for (i = 0; i < 4; i++) - { - pDpData[i] = NULL; - if (!(bar0 = Nvidia_BR04_GetBar0(pCl, pHWBC, i)) || - !(pDpData[i] = osMapKernelSpace(bar0, - NV_BR04_XVD_CONFIG_SIZE, - NV_MEMORY_UNCACHED, - NV_PROTECT_READ_WRITE))) - { - // If we've failed here we have to roll back any successful - // mappings, then return error. - for (i--; i >= 0; i--) - { - if (pDpData[i] != NULL) - { - osUnmapKernelSpace((void*)(pDpData[i]), - NV_BR04_XVD_CONFIG_SIZE); - } - } - osUnmapKernelSpace((void*)pData, NV_BR04_XVU_CONFIG_SIZE); - - return NV_ERR_GENERIC; - } - } - - gpuBusNum = gpuGetBus(pGpu); - - // Check if GPU is behind each of the four downstream ports, based on sec, - // sub bus numbers. - for (i = 0; i < 4; i++) - { - secNum = DRF_VAL(_BR04_XVD, _BUS, _SEC_NUMBER, - pDpData[i][NV_BR04_XVD_BUS/sizeof(*pData)]); - subNum = DRF_VAL(_BR04_XVD, _BUS, _SUB_NUMBER, - pDpData[i][NV_BR04_XVD_BUS/sizeof(*pData)]); - - if (gpuBusNum >= secNum && gpuBusNum <= subNum) - { - // This is the correct downstream port - pHWBC->dpForGpuInstance[pGpu->gpuInstance] = (NvS8)i; - status = NV_OK; - goto Nvidia_BR04_FindDpInfo_Exit; - } - } - - // If we fall through to here the GPU is not in range of any BR04 downstream - // ports. Return error. - status = NV_ERR_GENERIC; - -Nvidia_BR04_FindDpInfo_Exit: - osUnmapKernelSpace((void*)pData, NV_BR04_XVU_CONFIG_SIZE); - for (i = 0; i < 4; i++) - { - osUnmapKernelSpace((void*)(pDpData[i]), NV_BR04_XVD_CONFIG_SIZE); - } - - return status; -} - - // // Plx_Pex8747_GetBar0 : Returns physical address of chip's BAR0 address. // Returns NULL on error. @@ -2870,45 +2176,6 @@ Plx_Pex8747_ChangeUpstreamBusSpeed return NV_OK; } -static NV_STATUS -Plx_Pex8747_GetUpstreamBusSpeed -( - OBJHWBC *pPlx, - OBJCL *pCl, - NvU32 *speed -) -{ - volatile NvU32 *pData = NULL; // Register access for upstream port - RmPhysAddr bar0; - NvU32 regValue; - - // Sanity checks - if ((!pPlx) || (pPlx->bcRes != HWBC_PLX_PEX8747) || (!pPlx->ctrlDev.valid)) - { - NV_PRINTF(LEVEL_ERROR, "Not a PLX PEX8747!\n"); - return NV_ERR_INVALID_ARGUMENT; - } - - bar0 = Plx_Pex8747_GetBar0(pCl, pPlx); - if (0 == bar0) - { - return NV_ERR_GENERIC; - } - - pData = osMapKernelSpace(bar0, RM_PAGE_SIZE, NV_MEMORY_UNCACHED, NV_PROTECT_READ_WRITE); - if (!pData) - { - return NV_ERR_GENERIC; - } - - // Get the current pcie speed info - regValue = pData[0x78 / sizeof(*pData)]; - *speed = (regValue >> 16) & 0xF; - - osUnmapKernelSpace((void*) pData, RM_PAGE_SIZE); - return NV_OK; -} - // // Set up registers for PLX PEX8747 // @@ -3020,65 +2287,3 @@ Plx_Pex8747_setupFunc return NV_OK; } -NV_STATUS -subdeviceCtrlCmdBusHWBCGetUpstreamBAR0_IMPL -( - Subdevice *pSubdevice, - NV2080_CTRL_BUS_HWBC_GET_UPSTREAM_BAR0_PARAMS *pBusInfoParams -) -{ - OBJSYS *pSys = SYS_GET_INSTANCE(); - OBJCL *pCl = SYS_GET_CL(pSys); - - return clHWBCGetUpstreamBAR0(pBusInfoParams->primaryBus, pCl, &pBusInfoParams->physBAR0); -} - -NV_STATUS -subdeviceCtrlCmdBusSetHwbcUpstreamPcieSpeed_IMPL -( - Subdevice *pSubdevice, - NV2080_CTRL_BUS_SET_HWBC_UPSTREAM_PCIE_SPEED_PARAMS *pBusInfoParams -) -{ - OBJSYS *pSys = SYS_GET_INSTANCE(); - OBJCL *pCl = SYS_GET_CL(pSys); - NV_STATUS status = NV_OK; - - switch (pBusInfoParams->busSpeed) - { - case NV2080_CTRL_BUS_SET_PCIE_SPEED_2500MBPS: - { - status = clChangeUpstreamBusSpeed(pBusInfoParams->primaryBus, - pCl, HWBC_UPSTREAM_BUS_SPEED_GEN1PCIE); - break; - } - case NV2080_CTRL_BUS_SET_PCIE_SPEED_5000MBPS: - { - status = clChangeUpstreamBusSpeed(pBusInfoParams->primaryBus, - pCl, HWBC_UPSTREAM_BUS_SPEED_GEN2PCIE); - break; - } - default: - { - status = NV_ERR_INVALID_ARGUMENT; - break; - } - } - - return status; -} - -NV_STATUS -subdeviceCtrlCmdBusGetHwbcUpstreamPcieSpeed_IMPL -( - Subdevice *pSubdevice, - NV2080_CTRL_BUS_GET_HWBC_UPSTREAM_PCIE_SPEED_PARAMS *pBusInfoParams -) -{ - OBJSYS *pSys = SYS_GET_INSTANCE(); - OBJCL *pCl = SYS_GET_CL(pSys); - - return clGetUpstreamBusSpeed(pBusInfoParams->primaryBus, pCl, - &pBusInfoParams->busSpeed); -} - diff --git a/src/nvidia/src/kernel/platform/p2p/p2p_caps.c b/src/nvidia/src/kernel/platform/p2p/p2p_caps.c index 763f5a8ddb..0084df956d 100644 --- a/src/nvidia/src/kernel/platform/p2p/p2p_caps.c +++ b/src/nvidia/src/kernel/platform/p2p/p2p_caps.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -226,6 +226,7 @@ _gpumgrGetP2PCapsStatusOverNvLink { NV_PRINTF(LEVEL_ERROR, "Links failed to train for the given gpu pairs!\n"); + knvlinkLogAliDebugMessages(pFirstGpu, pKernelNvlink, NV_TRUE); return status; } } @@ -789,132 +790,6 @@ p2pGetCapsStatus return NV_OK; } -static NV_STATUS -_removeP2PPeerGpuCapsByGpuId -( - OBJGPU *pGpu, - NvU32 peerGpuId -) -{ - GPU_P2P_PEER_GPU_CAPS *pLocalPeerCaps = NULL; - - pLocalPeerCaps = gpuFindP2PPeerGpuCapsByGpuId(pGpu, peerGpuId); - NV_CHECK_OR_RETURN(LEVEL_WARNING, pLocalPeerCaps != NULL, NV_ERR_OBJECT_NOT_FOUND); - - // Swap the target element with the last element and remove the last. - // pLocalPeerCaps points to an item in the pGpu->P2PPeerGpuCaps array. - NV_ASSERT(pGpu->P2PPeerGpuCount != 0); - pGpu->P2PPeerGpuCount--; - - portMemMove(pLocalPeerCaps, - sizeof(GPU_P2P_PEER_GPU_CAPS), - &pGpu->P2PPeerGpuCaps[pGpu->P2PPeerGpuCount], - sizeof(GPU_P2P_PEER_GPU_CAPS)); - - return NV_OK; -} - -NV_STATUS -subdeviceCtrlCmdInternalSetP2pCaps_IMPL -( - Subdevice *pSubdevice, - NV2080_CTRL_INTERNAL_SET_P2P_CAPS_PARAMS *pParams -) -{ - NV_STATUS status = NV_OK; - NvU32 i; - NvU32 failingIndex; - OBJGPU *pGpu = gpumgrGetGpuFromSubDeviceInst(pSubdevice->deviceInst, - pSubdevice->subDeviceInst); - - // TODO: GPUSWSEC-1433 remove this check to enable this control for baremetal - if (!IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu)) - return NV_ERR_NOT_SUPPORTED; - - NV_CHECK_OR_RETURN(LEVEL_ERROR, - pParams->peerGpuCount <= NV_ARRAY_ELEMENTS(pGpu->P2PPeerGpuCaps), - NV_ERR_INVALID_ARGUMENT); - - for (i = 0; i < pParams->peerGpuCount; i++) - { - NV2080_CTRL_INTERNAL_SET_P2P_CAPS_PEER_INFO *pParamsPeerInfo = &pParams->peerGpuInfos[i]; - GPU_P2P_PEER_GPU_CAPS *pLocalPeerCaps = NULL; - - // Try to find the existing entry - pLocalPeerCaps = gpuFindP2PPeerGpuCapsByGpuId(pGpu, pParamsPeerInfo->gpuId); - - // If no entry has been found, add a new one instead - if (pLocalPeerCaps == NULL) - { - NV_CHECK_OR_ELSE(LEVEL_ERROR, - pGpu->P2PPeerGpuCount < NV_ARRAY_ELEMENTS(pGpu->P2PPeerGpuCaps), - status = NV_ERR_INSUFFICIENT_RESOURCES; goto fail); - - pLocalPeerCaps = &pGpu->P2PPeerGpuCaps[pGpu->P2PPeerGpuCount]; - pLocalPeerCaps->peerGpuId = pParamsPeerInfo->gpuId; - - pGpu->P2PPeerGpuCount++; - } - - pLocalPeerCaps->peerGpuInstance = pParamsPeerInfo->gpuInstance; - pLocalPeerCaps->p2pCaps = pParamsPeerInfo->p2pCaps; - pLocalPeerCaps->p2pOptimalReadCEs = pParamsPeerInfo->p2pOptimalReadCEs; - pLocalPeerCaps->p2pOptimalWriteCEs = pParamsPeerInfo->p2pOptimalWriteCEs; - pLocalPeerCaps->busPeerId = pParamsPeerInfo->busPeerId; - - portMemCopy(pLocalPeerCaps->p2pCapsStatus, - sizeof(pLocalPeerCaps->p2pCapsStatus), - pParamsPeerInfo->p2pCapsStatus, - sizeof(pParamsPeerInfo->p2pCapsStatus)); - } - - goto done; - -fail: - // Remove the successfully set caps - failingIndex = i; - for (i = 0; i < failingIndex; i++) - { - NV_STATUS ignoredStatus; - NV_CHECK_OK(ignoredStatus, LEVEL_ERROR, - _removeP2PPeerGpuCapsByGpuId(pGpu, pParams->peerGpuInfos[i].gpuId)); - } - -done: - return status; -} - -NV_STATUS -subdeviceCtrlCmdInternalRemoveP2pCaps_IMPL -( - Subdevice *pSubdevice, - NV2080_CTRL_INTERNAL_REMOVE_P2P_CAPS_PARAMS *pParams -) -{ - NV_STATUS status = NV_OK; - NvU32 i; - OBJGPU *pGpu = gpumgrGetGpuFromSubDeviceInst(pSubdevice->deviceInst, - pSubdevice->subDeviceInst); - - // TODO: GPUSWSEC-1433 remove this check to enable this control for baremetal - if (!IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu)) - return NV_ERR_NOT_SUPPORTED; - - NV_CHECK_OR_RETURN(LEVEL_ERROR, - pParams->peerGpuIdCount <= NV_ARRAY_ELEMENTS(pGpu->P2PPeerGpuCaps), - NV_ERR_INVALID_ARGUMENT); - - for (i = 0; i < pParams->peerGpuIdCount; i++) - { - // Capture only the first error here, as trying to remove all caps - // is the best effort here. - NV_CHECK_OK_OR_CAPTURE_FIRST_ERROR(status, LEVEL_ERROR, - _removeP2PPeerGpuCapsByGpuId(pGpu, pParams->peerGpuIds[i])); - } - - return status; -} - static NV_STATUS subdeviceGetP2pCaps_VIRTUAL ( @@ -1065,6 +940,7 @@ subdeviceCtrlCmdGetP2pCaps_IMPL pParamsPeerInfo->p2pOptimalReadCEs = 0; pParamsPeerInfo->p2pOptimalWriteCEs = 0; pParamsPeerInfo->busPeerId = NV0000_CTRL_SYSTEM_GET_P2P_CAPS_INVALID_PEER; + pParamsPeerInfo->busEgmPeerId = NV0000_CTRL_SYSTEM_GET_P2P_CAPS_INVALID_PEER; portMemSet(pParamsPeerInfo->p2pCapsStatus, NV0000_P2P_CAPS_STATUS_NOT_SUPPORTED, @@ -1076,6 +952,7 @@ subdeviceCtrlCmdGetP2pCaps_IMPL pParamsPeerInfo->p2pOptimalReadCEs = pLocalPeerCaps->p2pOptimalReadCEs; pParamsPeerInfo->p2pOptimalWriteCEs = pLocalPeerCaps->p2pOptimalWriteCEs; pParamsPeerInfo->busPeerId = pLocalPeerCaps->busPeerId; + pParamsPeerInfo->busEgmPeerId = pLocalPeerCaps->busEgmPeerId; portMemCopy(pParamsPeerInfo->p2pCapsStatus, sizeof(pParamsPeerInfo->p2pCapsStatus), diff --git a/src/nvidia/src/kernel/rmapi/alloc_free.c b/src/nvidia/src/kernel/rmapi/alloc_free.c index 7d30414496..921727a3be 100644 --- a/src/nvidia/src/kernel/rmapi/alloc_free.c +++ b/src/nvidia/src/kernel/rmapi/alloc_free.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -1116,7 +1116,7 @@ rmapiFreeResourcePrologue tmrapiDeregisterEvents(pTimerApi); } - CliDelObjectEvents(pRmFreeParams->hClient, pRmFreeParams->hResource); + CliDelObjectEvents(pResourceRef); return NV_OK; } @@ -1208,11 +1208,19 @@ rmapiAllocWithSecInfo // RS-TODO: Fix calls that use RMAPI_GPU_LOCK_INTERNAL without holding the API lock if (pRmApi->bGpuLockInternal && !rmapiLockIsOwner()) { - NV_PRINTF(LEVEL_ERROR, "RMAPI_GPU_LOCK_INTERNAL alloc requested without holding the RMAPI lock\n"); + // CORERM-6052 targets fixing the API lockless path for RTD3. + if (!rmapiInRtd3PmPath()) + { + NV_PRINTF(LEVEL_ERROR, + "NVRM: %s: RMAPI_GPU_LOCK_INTERNAL alloc requested without holding the RMAPI lock: client:0x%x parent:0x%x object:0x%x class:0x%x\n", + __FUNCTION__, hClient, hParent, *phObject, hClass); + } + pLockInfo->flags |= RM_LOCK_FLAGS_NO_API_LOCK; pLockInfo->state &= ~RM_LOCK_STATES_API_LOCK_ACQUIRED; } + // This flag applies to both VGPU and GSP cases if (flags & RMAPI_ALLOC_FLAGS_SKIP_RPC) allocInitStates |= RM_ALLOC_STATES_SKIP_RPC; @@ -1335,7 +1343,7 @@ resservResourceFactory if (pResDesc->internalClassId == classId(Device)) { - if (pParams == NULL || pParams->pAllocParams == NULL) + if (pParams->pAllocParams == NULL) return NV_ERR_INVALID_ARGUMENT; NV0080_ALLOC_PARAMETERS *pNv0080AllocParams = pParams->pAllocParams; @@ -1372,7 +1380,7 @@ resservResourceFactory if (pGpu && !IS_MIG_IN_USE(pGpu)) { - rmapiControlCacheSetGpuInstForObject(pParams->hClient, pParams->hResource, pGpu->gpuInstance); + rmapiControlCacheSetGpuAttrForObject(pParams->hClient, pParams->hResource, pGpu); } } @@ -1459,7 +1467,12 @@ rmapiFreeWithSecInfo // RS-TODO: Fix calls that use RMAPI_GPU_LOCK_INTERNAL without holding the API lock if (pRmApi->bGpuLockInternal && !rmapiLockIsOwner()) { - NV_PRINTF(LEVEL_ERROR, "RMAPI_GPU_LOCK_INTERNAL free requested without holding the RMAPI lock\n"); + // CORERM-6052 targets fixing the API lockless path for RTD3. + if (!rmapiInRtd3PmPath()) + { + NV_PRINTF(LEVEL_ERROR, "RMAPI_GPU_LOCK_INTERNAL free requested without holding the RMAPI lock\n"); + } + lockInfo.flags |= RM_LOCK_FLAGS_NO_API_LOCK; lockInfo.state &= ~RM_LOCK_STATES_API_LOCK_ACQUIRED; } diff --git a/src/nvidia/src/kernel/rmapi/client.c b/src/nvidia/src/kernel/rmapi/client.c index 352ae62e82..1eac42f8d8 100644 --- a/src/nvidia/src/kernel/rmapi/client.c +++ b/src/nvidia/src/kernel/rmapi/client.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -65,8 +65,13 @@ rmclientConstruct_IMPL API_SECURITY_INFO *pSecInfo = pParams->pSecInfo; OBJGPU *pGpu = NULL; + // // RM client objects can only be created/destroyed with the RW API lock. - LOCK_ASSERT_AND_RETURN(rmapiLockIsWriteOwner()); + // Bug 4193761 - allow internal clients to be created with the GPU lock, + // GR-2409 will remove the possible race condition with the client list. + // + LOCK_ASSERT_AND_RETURN(rmapiLockIsWriteOwner() || + (serverIsClientInternal(&g_resServ, pRsClient->hClient) && rmGpuLockIsOwner())); if (RMCFG_FEATURE_PLATFORM_GSP) { @@ -232,8 +237,15 @@ rmclientDestruct_IMPL NV_STATUS status = NV_OK; NvBool bReleaseLock = NV_FALSE; + // // RM client objects can only be created/destroyed with the RW API lock. - NV_ASSERT(rmapiLockIsWriteOwner()); + // Bug 4193761 - allow internal clients to be created with the GPU lock, + // GR-2409 will remove the possible race condition with the client list. + // + NV_ASSERT_OR_ELSE(rmapiLockIsWriteOwner() || + (serverIsClientInternal(&g_resServ, staticCast(pClient, RsClient)->hClient) && + rmGpuLockIsOwner()), + return); NV_PRINTF(LEVEL_INFO, " type: client\n"); @@ -560,10 +572,15 @@ NvBool rmclientIsAdminByHandle(NvHandle hClient, RS_PRIV_LEVEL privLevel) return pClient ? rmclientIsAdmin(pClient, privLevel) : NV_FALSE; } +static inline NvBool rmclientIsKernelOnly(RmClient *pClient) +{ + return (pClient->pSecurityToken == NULL); +} + NvBool rmclientIsKernelOnlyByHandle(NvHandle hClient) { RmClient *pClient = serverutilGetClientUnderLock(hClient); - return pClient ? (pClient->pSecurityToken == NULL) : NV_FALSE; + return (pClient ? rmclientIsKernelOnly(pClient) : NV_FALSE); } NvBool rmclientSetClientFlagsByHandle(NvHandle hClient, NvU32 clientFlags) @@ -749,6 +766,43 @@ rmclientValidate_IMPL return status; } +NV_STATUS +rmclientValidateLocks_IMPL +( + RmClient *pClient, + RsServer *pServer, + const CLIENT_ENTRY *pClientEntry +) +{ + // Possessing the client lock means it's always safe to use this client object + if (pClientEntry->lockOwnerTid == portThreadGetCurrentThreadId()) + return NV_OK; + + // + // Without the client lock, the API lock in write mode guarantees safety for the + // client object since nothing else can execute in parallel when holding it. + // + if (rmapiLockIsWriteOwner()) + return NV_OK; + + // + // Without the client lock, the API lock in read mode guarantees safety for the + // client object IF it's a client that cannot be used directly by user space (i.e. + // kernel privileged client and/or internal client). + // + if (rmapiLockIsOwner() && + (rmclientIsKernelOnly(pClient) || + serverIsClientInternal(pServer, pClientEntry->hClient))) + { + return NV_OK; + } + + + NV_ASSERT(0); + // Otherwise we don't have the required locks to use this RM client + return NV_ERR_INVALID_LOCK_STATE; +} + NV_STATUS rmclientFreeResource_IMPL ( @@ -761,6 +815,7 @@ rmclientFreeResource_IMPL OBJGPU *pGpu; NvBool bBcState; NvBool bRestoreBcState = NV_FALSE; + RsClient *pRsClient = staticCast(pClient, RsClient); if (gpuGetByRef(pRmFreeParams->pResourceRef, NULL, &pGpu) == NV_OK) { @@ -770,7 +825,17 @@ rmclientFreeResource_IMPL rmapiFreeResourcePrologue(pRmFreeParams); - status = clientFreeResource_IMPL(staticCast(pClient, RsClient), pServer, pRmFreeParams); + // + // In the RTD3 case, the API lock isn't taken since it can be initiated + // from another thread that holds the API lock and because we now hold + // the GPU lock. + // + if (rmapiInRtd3PmPath()) + { + pRmFreeParams->pLockInfo->flags |= RM_LOCK_FLAGS_NO_API_LOCK; + } + + status = clientFreeResource_IMPL(pRsClient, pServer, pRmFreeParams); if (bRestoreBcState) { diff --git a/src/nvidia/src/kernel/rmapi/client_resource.c b/src/nvidia/src/kernel/rmapi/client_resource.c index 1373688617..dab322b86a 100644 --- a/src/nvidia/src/kernel/rmapi/client_resource.c +++ b/src/nvidia/src/kernel/rmapi/client_resource.c @@ -101,7 +101,8 @@ CliGetSystemP2pCaps_GSPCLIENT NvU32 *p2pOptimalReadCEs, NvU32 *p2pOptimalWriteCEs, NvU8 *p2pCapsStatus, - NvU32 *busPeerIds + NvU32 *busPeerIds, + NvU32 *busEgmPeerIds ); static @@ -434,6 +435,7 @@ CliGetSystemP2pCaps pBusPeerIds[(localGpuIndex * gpuCount) + peerGpuIndex] = kbusGetPeerId_HAL(pGpuLocalLoop, GPU_GET_KERNEL_BUS(pGpuLocalLoop), pGpuPeer); } + if (pBusEgmPeerIds != NULL) { pBusEgmPeerIds[(localGpuIndex * gpuCount) + peerGpuIndex] = @@ -799,12 +801,6 @@ cliresCtrlCmdSystemGetFeatures_IMPL LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); - if (pSys->getProperty(pSys, PDB_PROP_SYS_IS_UEFI)) - { - featuresMask = FLD_SET_DRF(0000, _CTRL_SYSTEM_GET_FEATURES, - _UEFI, _TRUE, featuresMask); - } - // Don't update EFI init on non Display system if (pSys->getProperty(pSys, PDB_PROP_SYS_IS_EFI_INIT)) { @@ -3364,7 +3360,8 @@ CliGetSystemP2pCaps_GSPCLIENT NvU32 *p2pOptimalReadCEs, NvU32 *p2pOptimalWriteCEs, NvU8 *p2pCapsStatus, - NvU32 *busPeerIds + NvU32 *busPeerIds, + NvU32 *pBusEgmPeerIds ) { NV_STATUS status = NV_OK; @@ -3407,6 +3404,14 @@ CliGetSystemP2pCaps_GSPCLIENT } } + if (pBusEgmPeerIds != NULL) + { + for (i = 0; i < (gpuCount * gpuCount); i++) + { + pBusEgmPeerIds[i] = NV0000_CTRL_SYSTEM_GET_P2P_CAPS_INVALID_PEER; + } + } + // Initialize internal call params pGetParams->bAllCaps = NV_FALSE; pGetParams->bUseUuid = NV_TRUE; @@ -3505,6 +3510,13 @@ CliGetSystemP2pCaps_GSPCLIENT for (j = 0; j < gpuCount; ++j) busPeerIds[i * gpuCount + j] = pGetParams->peerGpuCaps[j].busPeerId; } + + // Fill out gpu EGM peerId matrix + if (pBusEgmPeerIds != NULL) + { + for (j = 0; j < gpuCount; ++j) + pBusEgmPeerIds[i * gpuCount + j] = pGetParams->peerGpuCaps[j].busEgmPeerId; + } } done: @@ -3801,7 +3813,8 @@ cliresCtrlCmdSystemGetP2pCaps_IMPL &pP2PParams->p2pOptimalReadCEs, &pP2PParams->p2pOptimalWriteCEs, pP2PParams->p2pCapsStatus, - pP2PParams->busPeerIds); + pP2PParams->busPeerIds, + pP2PParams->busEgmPeerIds); } } @@ -3864,7 +3877,8 @@ cliresCtrlCmdSystemGetP2pCapsV2_IMPL &pP2PParams->p2pOptimalReadCEs, &pP2PParams->p2pOptimalWriteCEs, pP2PParams->p2pCapsStatus, - pP2PParams->busPeerIds); + pP2PParams->busPeerIds, + pP2PParams->busEgmPeerIds); } } @@ -4477,46 +4491,6 @@ cliresCtrlCmdSyncGpuBoostGroupInfo_IMPL return status; } -NV_STATUS -cliresCtrlCmdVgpuGetStartData_IMPL -( - RmClientResource *pRmCliRes, - NV0000_CTRL_VGPU_GET_START_DATA_PARAMS *pVgpuStartParams -) -{ - NV_STATUS status = NV_OK; - NvHandle hClient = RES_GET_CLIENT_HANDLE(pRmCliRes); - NvU32 event, eventStatus; - OBJSYS *pSys = SYS_GET_INSTANCE(); - KernelVgpuMgr *pKernelVgpuMgr = SYS_GET_KERNEL_VGPUMGR(pSys); - REQUEST_VGPU_INFO_NODE *pRequestVgpu = NULL; - - status = CliGetSystemEventStatus(hClient, &event, &eventStatus); - if (status != NV_OK) - return status; - - if (event != NV0000_NOTIFIERS_VM_START) - return NV_ERR_INVALID_EVENT; - - for (pRequestVgpu = listHead(&pKernelVgpuMgr->listRequestVgpuHead); - pRequestVgpu != NULL; - pRequestVgpu = listNext(&pKernelVgpuMgr->listRequestVgpuHead, pRequestVgpu)) - { - if (pRequestVgpu->deviceState == NV_VGPU_DEV_OPENED) - { - portMemCopy(pVgpuStartParams->mdevUuid, VGPU_UUID_SIZE, pRequestVgpu->mdevUuid, VGPU_UUID_SIZE); - portMemCopy(pVgpuStartParams->configParams, VGPU_CONFIG_PARAMS_MAX_LENGTH, pRequestVgpu->configParams, VGPU_CONFIG_PARAMS_MAX_LENGTH); - pVgpuStartParams->gpuPciId = pRequestVgpu->gpuPciId; - pVgpuStartParams->qemuPid = pRequestVgpu->qemuPid; - pVgpuStartParams->vgpuId = pRequestVgpu->vgpuId; - pVgpuStartParams->gpuPciBdf = pRequestVgpu->gpuPciBdf; - return NV_OK; - } - } - - return NV_ERR_OBJECT_NOT_FOUND; -} - NV_STATUS cliresCtrlCmdVgpuGetVgpuVersion_IMPL ( diff --git a/src/nvidia/src/kernel/rmapi/client_resource_sli.c b/src/nvidia/src/kernel/rmapi/client_resource_sli.c index bec666ab8f..b831be2a80 100644 --- a/src/nvidia/src/kernel/rmapi/client_resource_sli.c +++ b/src/nvidia/src/kernel/rmapi/client_resource_sli.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/src/kernel/rmapi/control.c b/src/nvidia/src/kernel/rmapi/control.c index 0ed2e1e707..ece89ba46d 100644 --- a/src/nvidia/src/kernel/rmapi/control.c +++ b/src/nvidia/src/kernel/rmapi/control.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2004-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2004-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -841,6 +841,15 @@ NV_STATUS serverControl_ValidateCookie return NV_ERR_INVALID_PARAMETER; } + if (pRmCtrlExecuteCookie->ctrlFlags & RMCTRL_FLAGS_RM_TEST_ONLY_CODE) + { + OBJSYS *pSys = SYS_GET_INSTANCE(); + if (!pSys->getProperty(pSys, PDB_PROP_SYS_ENABLE_RM_TEST_ONLY_CODE)) + { + return NV_ERR_TEST_ONLY_CODE_NOT_ENABLED; + } + } + return NV_OK; } @@ -893,6 +902,22 @@ serverControlLookupLockFlags if (lock == RS_LOCK_TOP) { + if (controlFlags & RMCTRL_FLAGS_NO_API_LOCK) + { + // NO_API_LOCK requires no access to GPU lock protected data + NV_ASSERT_OR_RETURN(((controlFlags & RMCTRL_FLAGS_NO_GPUS_LOCK) != 0), + NV_ERR_INVALID_LOCK_STATE); + + // NO_API_LOCK used in combination with API_LOCK_READONLY does not make sense + NV_ASSERT_OR_RETURN(((controlFlags & RMCTRL_FLAGS_API_LOCK_READONLY) == 0), + NV_ERR_INVALID_LOCK_STATE); + + RS_LOCK_INFO *pLockInfo = pRmCtrlParams->pLockInfo; + + pLockInfo->flags |= RM_LOCK_FLAGS_NO_API_LOCK; + return NV_OK; + } + if (!serverSupportsReadOnlyLock(&g_resServ, RS_LOCK_TOP, RS_API_CTRL)) { *pAccess = LOCK_ACCESS_WRITE; @@ -946,9 +971,6 @@ serverControlLookupLockFlags pLockInfo->flags &= ~RM_LOCK_FLAGS_NO_GPUS_LOCK; pLockInfo->flags &= ~RM_LOCK_FLAGS_GPU_GROUP_LOCK; } - - if (controlFlags & RMCTRL_FLAGS_GPU_LOCK_READONLY) - *pAccess = LOCK_ACCESS_READ; } return NV_OK; @@ -957,6 +979,28 @@ serverControlLookupLockFlags return NV_ERR_NOT_SUPPORTED; } +NV_STATUS +serverControlLookupClientLockFlags +( + RmCtrlExecuteCookie *pRmCtrlExecuteCookie, + enum CLIENT_LOCK_TYPE *pClientLockType +) +{ + NvU32 controlFlags = pRmCtrlExecuteCookie->ctrlFlags; + + if ((controlFlags & RMCTRL_FLAGS_ALL_CLIENT_LOCK) != 0) + { + *pClientLockType = CLIENT_LOCK_ALL; + + // Locking all clients requires the RW API lock + NV_ASSERT_OR_RETURN(rmapiLockIsWriteOwner(), NV_ERR_INVALID_LOCK_STATE); + } + else + *pClientLockType = CLIENT_LOCK_SPECIFIC; + + return NV_OK; +} + NV_STATUS rmapiControl ( diff --git a/src/nvidia/src/kernel/rmapi/embedded_param_copy.c b/src/nvidia/src/kernel/rmapi/embedded_param_copy.c index 6c3ace71fc..c30a3a9077 100644 --- a/src/nvidia/src/kernel/rmapi/embedded_param_copy.c +++ b/src/nvidia/src/kernel/rmapi/embedded_param_copy.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -249,28 +249,6 @@ NV_STATUS embeddedParamCopyIn(RMAPI_PARAM_COPY *paramCopies, RmCtrlParams *pRmCt ((NV2080_CTRL_GPU_GET_ENGINES_PARAMS*)pParams)->engineCount, sizeof(NvU32)); break; } - case NV2080_CTRL_CMD_BUS_GET_INFO: - { - CHECK_PARAMS_OR_RETURN(pRmCtrlParams, NV2080_CTRL_BUS_GET_INFO_PARAMS); - - RMAPI_PARAM_COPY_INIT(paramCopies[0], - ((NV2080_CTRL_BUS_GET_INFO_PARAMS*)pParams)->busInfoList, - ((NV2080_CTRL_BUS_GET_INFO_PARAMS*)pParams)->busInfoList, - ((NV2080_CTRL_BUS_GET_INFO_PARAMS*)pParams)->busInfoListSize, - sizeof(NV2080_CTRL_BUS_INFO)); - break; - } - case NV2080_CTRL_CMD_FB_GET_INFO: - { - CHECK_PARAMS_OR_RETURN(pRmCtrlParams, NV2080_CTRL_FB_GET_INFO_PARAMS); - - RMAPI_PARAM_COPY_INIT(paramCopies[0], - ((NV2080_CTRL_FB_GET_INFO_PARAMS*)pParams)->fbInfoList, - ((NV2080_CTRL_FB_GET_INFO_PARAMS*)pParams)->fbInfoList, - ((NV2080_CTRL_FB_GET_INFO_PARAMS*)pParams)->fbInfoListSize, - sizeof(NV2080_CTRL_FB_INFO)); - break; - } #ifdef USE_AMAPLIB case NV2080_CTRL_CMD_FB_GET_AMAP_CONF: { @@ -382,19 +360,6 @@ NV_STATUS embeddedParamCopyIn(RMAPI_PARAM_COPY *paramCopies, RmCtrlParams *pRmCt break; } - case NV0080_CTRL_CMD_MSENC_GET_CAPS: - { - CHECK_PARAMS_OR_RETURN(pRmCtrlParams, NV0080_CTRL_MSENC_GET_CAPS_PARAMS); - - RMAPI_PARAM_COPY_INIT(paramCopies[0], - ((NV0080_CTRL_MSENC_GET_CAPS_PARAMS*)pParams)->capsTbl, - ((NV0080_CTRL_MSENC_GET_CAPS_PARAMS*)pParams)->capsTbl, - ((NV0080_CTRL_MSENC_GET_CAPS_PARAMS*)pParams)->capsTblSize, 1); - paramCopies[0].flags |= RMAPI_PARAM_COPY_FLAGS_SKIP_COPYIN; - paramCopies[0].flags |= RMAPI_PARAM_COPY_FLAGS_ZERO_BUFFER; - - break; - } case NV2080_CTRL_CMD_BIOS_GET_INFO: { CHECK_PARAMS_OR_RETURN(pRmCtrlParams, NV2080_CTRL_BIOS_GET_INFO_PARAMS); @@ -813,22 +778,6 @@ NV_STATUS embeddedParamCopyOut(RMAPI_PARAM_COPY *paramCopies, RmCtrlParams *pRmC ((NV2080_CTRL_GPU_GET_ENGINES_PARAMS*)pParams)->engineList = paramCopies[0].pUserParams; break; } - case NV2080_CTRL_CMD_BUS_GET_INFO: - { - CHECK_PARAMS_OR_RETURN(pRmCtrlParams, NV2080_CTRL_BUS_GET_INFO_PARAMS); - - status = rmapiParamsRelease(¶mCopies[0]); - ((NV2080_CTRL_BUS_GET_INFO_PARAMS*)pParams)->busInfoList = paramCopies[0].pUserParams; - break; - } - case NV2080_CTRL_CMD_FB_GET_INFO: - { - CHECK_PARAMS_OR_RETURN(pRmCtrlParams, NV2080_CTRL_FB_GET_INFO_PARAMS); - - status = rmapiParamsRelease(¶mCopies[0]); - ((NV2080_CTRL_FB_GET_INFO_PARAMS*)pParams)->fbInfoList = paramCopies[0].pUserParams; - break; - } #ifdef USE_AMAPLIB case NV2080_CTRL_CMD_FB_GET_AMAP_CONF: { @@ -940,14 +889,6 @@ NV_STATUS embeddedParamCopyOut(RMAPI_PARAM_COPY *paramCopies, RmCtrlParams *pRmC ((NV0080_CTRL_HOST_GET_CAPS_PARAMS*)pParams)->capsTbl = paramCopies[0].pUserParams; break; } - case NV0080_CTRL_CMD_MSENC_GET_CAPS: - { - CHECK_PARAMS_OR_RETURN(pRmCtrlParams, NV0080_CTRL_MSENC_GET_CAPS_PARAMS); - - status = rmapiParamsRelease(¶mCopies[0]); - ((NV0080_CTRL_MSENC_GET_CAPS_PARAMS*)pParams)->capsTbl = paramCopies[0].pUserParams; - break; - } case NV2080_CTRL_CMD_BIOS_GET_INFO: { CHECK_PARAMS_OR_RETURN(pRmCtrlParams, NV2080_CTRL_BIOS_GET_INFO_PARAMS); diff --git a/src/nvidia/src/kernel/rmapi/event.c b/src/nvidia/src/kernel/rmapi/event.c index f4b0254a1c..18e6012424 100644 --- a/src/nvidia/src/kernel/rmapi/event.c +++ b/src/nvidia/src/kernel/rmapi/event.c @@ -511,32 +511,23 @@ CliGetEventInfo } -NvBool +void CliDelObjectEvents ( - NvHandle hClient, - NvHandle hResource + RsResourceRef *pResourceRef ) { NotifShare *pNotifierShare; INotifier *pNotifier; - RsClient *pRsClient; - NV_STATUS status = NV_OK; - RsResourceRef *pResourceRef; - status = serverGetClientUnderLock(&g_resServ, hClient, &pRsClient); - if (status != NV_OK) - return NV_FALSE; - - status = clientGetResourceRef(pRsClient, hResource, &pResourceRef); - if (status != NV_OK) - return NV_FALSE; + if (pResourceRef == NULL) + return; // If not a notifier object, there aren't any events to free pNotifier = dynamicCast(pResourceRef->pResource, INotifier); if (pNotifier == NULL) - return NV_TRUE; + return; pNotifierShare = inotifyGetNotificationShare(pNotifier); if (pNotifierShare != NULL) @@ -544,7 +535,7 @@ CliDelObjectEvents while(pNotifierShare->pEventList != NULL) { PEVENTNOTIFICATION pEventNotif = pNotifierShare->pEventList; - status = inotifyUnregisterEvent(pNotifier, + inotifyUnregisterEvent(pNotifier, pNotifierShare->hNotifierClient, pNotifierShare->hNotifierResource, pEventNotif->hEventClient, @@ -552,9 +543,6 @@ CliDelObjectEvents } pNotifierShare->pNotifier = NULL; } - - return NV_TRUE; - } // end of CliDelObjectEvents() // **************************************************************************** @@ -563,7 +551,8 @@ CliDelObjectEvents void CliAddSystemEvent( NvU32 event, - NvU32 status + NvU32 status, + NvBool *isEventNotified ) { NvU32 temp; @@ -575,6 +564,9 @@ void CliAddSystemEvent( NV_STATUS rmStatus = NV_OK; Notifier *pNotifier; + if (isEventNotified != NULL) + *isEventNotified = NV_FALSE; + for (ppClient = serverutilGetFirstClientUnderLock(); ppClient; ppClient = serverutilGetNextClientUnderLock(ppClient)) @@ -623,6 +615,8 @@ void CliAddSystemEvent( NV_PRINTF(LEVEL_ERROR, "failed to deliver event 0x%x", event); } + if (isEventNotified != NULL) + *isEventNotified = NV_TRUE; } pEventNotification = pEventNotification->Next; } @@ -709,4 +703,4 @@ eventGetByHandle_IMPL *pNotifyIndex = pEventNotification->NotifyIndex; return status; -} \ No newline at end of file +} diff --git a/src/nvidia/src/kernel/rmapi/event_notification.c b/src/nvidia/src/kernel/rmapi/event_notification.c index 9081228746..e74e27797d 100644 --- a/src/nvidia/src/kernel/rmapi/event_notification.c +++ b/src/nvidia/src/kernel/rmapi/event_notification.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -40,6 +40,7 @@ #include "mem_mgr/mem.h" #include "kernel/gpu/gpu_engine_type.h" #include "platform/sli/sli.h" +#include "objtmr.h" #include "kernel/gpu/mig_mgr/kernel_mig_manager.h" @@ -743,6 +744,10 @@ static NV_STATUS _insertEventNotification EventNotify->NotifyTriggerCount = 0; EventNotify->bUserOsEventHandle = bUserOsEventHandle; + // These fields are set by NV0004_CTRL_CMD_TMR_SET_ALARM_NOTIFY for graceful TMR_EVENT teardown + EventNotify->pGpu = NULL; + EventNotify->pTmrEvent = NULL; + // // Now insert the event into the event chain of this object. // Order doesn't really matter. @@ -904,6 +909,15 @@ static NV_STATUS _removeEventNotification // delete the event if it was found if (found) { + if (nextEvent->pTmrEvent != NULL) + { + NV_ASSERT_OR_RETURN((nextEvent->pGpu != NULL), NV_ERR_INVALID_STATE); + + tmrEventDestroy(GPU_GET_TIMER(nextEvent->pGpu), nextEvent->pTmrEvent); + nextEvent->pGpu = NULL; + nextEvent->pTmrEvent = NULL; + } + if (nextEvent->bUserOsEventHandle) osDereferenceObjectCount(NvP64_VALUE(nextEvent->Data)); diff --git a/src/nvidia/src/kernel/rmapi/lock_stress.c b/src/nvidia/src/kernel/rmapi/lock_stress.c new file mode 100644 index 0000000000..5c592c7221 --- /dev/null +++ b/src/nvidia/src/kernel/rmapi/lock_stress.c @@ -0,0 +1,598 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#define NVOC_LOCK_STRESS_H_PRIVATE_ACCESS_ALLOWED + +#include "core/locks.h" +#include "core/system.h" +#include "rmapi/client.h" +#include "rmapi/lock_stress.h" +#include "rmapi/rs_utils.h" + +#include "gpu/gpu.h" +#include "gpu_mgr/gpu_mgr.h" +#include "os/os.h" + +#include "class/cl0080.h" +#include "class/cl0100.h" + +#include "g_finn_rm_api.h" + +static NvS32 g_LockStressCounter = 0; + +NV_STATUS +lockStressObjConstruct_IMPL +( + LockStressObject *pResource, + CALL_CONTEXT *pCallContext, + RS_RES_ALLOC_PARAMS_INTERNAL *pParams +) +{ + OBJSYS *pSys = SYS_GET_INSTANCE(); + NvHandle hClient; + + // + // This is an off-by-default object since its only use is with testing. Return + // an error unless the RM test code registry key is turned on by the user. + // + if (!pSys->getProperty(pSys, PDB_PROP_SYS_ENABLE_RM_TEST_ONLY_CODE)) + return NV_ERR_TEST_ONLY_CODE_NOT_ENABLED; + + // + // Allocate internal client handle for stressing locks in the internal RM API + // path if this LockStressObject was externally allocated. + // + hClient = RES_GET_CLIENT_HANDLE(pResource); + + if (!serverIsClientInternal(&g_resServ, hClient)) + { + NV_STATUS status; + RM_API *pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); + OBJGPU *pGpu = GPU_RES_GET_GPU(pResource); + NV0080_ALLOC_PARAMETERS nv0080AllocParams; + NV2080_ALLOC_PARAMETERS nv2080AllocParams; + + pResource->hInternalClient = NV01_NULL_OBJECT; + + // Allocate internal client + NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, + pRmApi->AllocWithHandle(pRmApi, + NV01_NULL_OBJECT, + NV01_NULL_OBJECT, + NV01_NULL_OBJECT, + NV01_ROOT, + &pResource->hInternalClient, + sizeof(pResource->hInternalClient)), + failed); + + // Allocate a device + portMemSet(&nv0080AllocParams, 0, sizeof(nv0080AllocParams)); + nv0080AllocParams.deviceId = gpuGetDeviceInstance(pGpu); + nv0080AllocParams.hClientShare = pResource->hInternalClient; + NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, + pRmApi->Alloc(pRmApi, + pResource->hInternalClient, + pResource->hInternalClient, + &pResource->hInternalDevice, + NV01_DEVICE_0, + &nv0080AllocParams, + sizeof(nv0080AllocParams)), + failed); + + // Allocate a subdevice + portMemSet(&nv2080AllocParams, 0, sizeof(nv2080AllocParams)); + nv2080AllocParams.subDeviceId = gpumgrGetSubDeviceInstanceFromGpu(pGpu); + NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, + pRmApi->Alloc(pRmApi, + pResource->hInternalClient, + pResource->hInternalDevice, + &pResource->hInternalSubdevice, + NV20_SUBDEVICE_0, + &nv2080AllocParams, + sizeof(nv2080AllocParams)), + failed); + + // Allocate the internal lock stress object + NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, + pRmApi->Alloc(pRmApi, + pResource->hInternalClient, + pResource->hInternalSubdevice, + &pResource->hInternalLockStressObject, + LOCK_STRESS_OBJECT, + NULL, 0), + failed); + + return NV_OK; +failed: + // + // Free internal client on error, Resource Server will free all other internal + // objects allocated with it. + // + if (pResource->hInternalClient != NV01_NULL_OBJECT) + pRmApi->Free(pRmApi, pResource->hInternalClient, pResource->hInternalClient); + + return status; + } + + return NV_OK; +} + +void +lockStressObjDestruct_IMPL +( + LockStressObject *pResource +) +{ + if (!serverIsClientInternal(&g_resServ, RES_GET_CLIENT_HANDLE(pResource))) + { + RM_API *pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); + + // + // Free internal client, Resource Server will free all other internal + // objects allocated with it. + // + pRmApi->Free(pRmApi, pResource->hInternalClient, pResource->hInternalClient); + } +} + +NV_STATUS +lockStressObjCtrlCmdResetLockStressState_IMPL +( + LockStressObject *pResource +) +{ + RsClient *pClient = RES_GET_CLIENT(pResource); + RmClient *pRmClient = dynamicCast(pClient, RmClient); + RmClient *pRmInternalClient; + OBJGPU *pGpu = GPU_RES_GET_GPU(pResource); + + if (pRmClient == NULL) + return NV_ERR_INVALID_STATE; + + pRmInternalClient = serverutilGetClientUnderLock(pGpu->hInternalLockStressClient); + if (pRmInternalClient == NULL) + return NV_ERR_INVALID_STATE; + + // Reset all lock stress counters to 0 + g_LockStressCounter = 0; + + pGpu->lockStressCounter = 0; + pRmClient->lockStressCounter = 0; + pRmInternalClient->lockStressCounter = 0; + + return NV_OK; +} + +static NV_STATUS +updateLockStressCounters +( + LockStressObject *pResource, + NvU8 action +) +{ + // Perform increments/decrements as the "action" bitmask dictates + if (DRF_VAL(0100_CTRL, _GLOBAL_RMAPI, _LOCK_STRESS_COUNTER_ACTION, action) != 0) + { + // Assert that we hold the RW API lock here + LOCK_ASSERT_AND_RETURN(rmapiLockIsWriteOwner()); + + if (DRF_VAL(0100_CTRL, _GLOBAL_RMAPI, _LOCK_STRESS_COUNTER_INCREMENT, action) != 0) + g_LockStressCounter++; + else + g_LockStressCounter--; + } + + if (DRF_VAL(0100_CTRL, _GPU, _LOCK_STRESS_COUNTER_ACTION, action) != 0) + { + OBJGPU *pGpu; + + LOCK_ASSERT_AND_RETURN(rmGpuLockIsOwner()); + + pGpu = GPU_RES_GET_GPU(pResource); + + if (DRF_VAL(0100_CTRL, _GPU, _LOCK_STRESS_COUNTER_INCREMENT, action) != 0) + pGpu->lockStressCounter++; + else + pGpu->lockStressCounter--; + } + + if (DRF_VAL(0100_CTRL, _CLIENT, _LOCK_STRESS_COUNTER_ACTION, action) != 0) + { + RsClient *pClient = RES_GET_CLIENT(pResource); + RmClient *pRmClient; + + // + // Resource Server currently doesn't attempt to lock the internal client on the + // internal RM API path if we already hold a client lock to avoid risking lock + // ordering issues so only assert if we aren't on the internal RM API path. + // + if (!serverIsClientInternal(&g_resServ, pClient->hClient)) + LOCK_ASSERT_AND_RETURN(serverIsClientLocked(&g_resServ, pClient->hClient)); + + pRmClient = dynamicCast(pClient, RmClient); + + if (pRmClient == NULL) + return NV_ERR_INVALID_STATE; + + if (DRF_VAL(0100_CTRL, _CLIENT, _LOCK_STRESS_COUNTER_INCREMENT, action) != 0) + pRmClient->lockStressCounter++; + else + pRmClient->lockStressCounter--; + } + + if (DRF_VAL(0100_CTRL, _INTERNAL_CLIENT, _LOCK_STRESS_COUNTER_ACTION, action) != 0) + { + OBJGPU *pGpu; + RmClient *pRmInternalClient; + + LOCK_ASSERT_AND_RETURN(rmGpuLockIsOwner()); + + pGpu = GPU_RES_GET_GPU(pResource); + pRmInternalClient = serverutilGetClientUnderLock(pGpu->hInternalLockStressClient); + + if (pRmInternalClient == NULL) + return NV_ERR_INVALID_STATE; + + if (DRF_VAL(0100_CTRL, _INTERNAL_CLIENT, _LOCK_STRESS_COUNTER_INCREMENT, action) + != 0) + { + pRmInternalClient->lockStressCounter++; + } + else + pRmInternalClient->lockStressCounter--; + } + + return NV_OK; +} + +NV_STATUS +lockStressObjCtrlCmdPerformLockStressAllRmLocks_IMPL +( + LockStressObject *pResource, + NV0100_CTRL_PERFORM_LOCK_STRESS_ALL_RM_LOCKS_PARAMS *pParams +) +{ + NvU8 rand; + + // Perform random increments/decrements but report what we did back to caller + NV_CHECK_OK_OR_RETURN(LEVEL_SILENT, osGetRandomBytes(&rand, 1)); + + // This API has all locks so we can increment/decrement all counters + pParams->action = + (rand & DRF_SHIFTMASK(NV0100_CTRL_ALL_LOCK_STRESS_COUNTER_INCREMENT)) | + DRF_SHIFTMASK(NV0100_CTRL_GLOBAL_RMAPI_LOCK_STRESS_COUNTER_ACTION) | + DRF_SHIFTMASK(NV0100_CTRL_GPU_LOCK_STRESS_COUNTER_ACTION) | + DRF_SHIFTMASK(NV0100_CTRL_CLIENT_LOCK_STRESS_COUNTER_ACTION) | + DRF_SHIFTMASK(NV0100_CTRL_INTERNAL_CLIENT_LOCK_STRESS_COUNTER_ACTION); + + return updateLockStressCounters(pResource, pParams->action); +} + +NV_STATUS +lockStressObjCtrlCmdPerformLockStressNoGpusLock_IMPL +( + LockStressObject *pResource, + NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_PARAMS *pParams +) +{ + NvU8 rand; + + // Perform random increments/decrements but report what we did back to caller + NV_CHECK_OK_OR_RETURN(LEVEL_SILENT, osGetRandomBytes(&rand, 1)); + + // + // This API has all locks except the GPU lock so we can increment/decrement just + // the global counter and the per client counter. + // + // Internal clients can't be accessed without either the GPU lock or acquiring the + // internal client's lock (requires dual client locking). Until then, just assume + // we can only modify the global counter and the per client counter. + // + pParams->action = + (rand & DRF_SHIFTMASK(NV0100_CTRL_ALL_LOCK_STRESS_COUNTER_INCREMENT)) | + DRF_SHIFTMASK(NV0100_CTRL_GLOBAL_RMAPI_LOCK_STRESS_COUNTER_ACTION) | + DRF_SHIFTMASK(NV0100_CTRL_CLIENT_LOCK_STRESS_COUNTER_ACTION); + + return updateLockStressCounters(pResource, pParams->action); +} + +NV_STATUS +lockStressObjCtrlCmdPerformLockStressApiLockReadMode_IMPL +( + LockStressObject *pResource, + NV0100_CTRL_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE_PARAMS *pParams +) +{ + NvU8 rand; + + // Perform random increments/decrements but report what we did back to caller + NV_CHECK_OK_OR_RETURN(LEVEL_SILENT, osGetRandomBytes(&rand, 1)); + + // + // This API takes the API lock in read mode so we can increment/decrement just the + // per GPU counter and the per client counter. + // + pParams->action = + (rand & DRF_SHIFTMASK(NV0100_CTRL_ALL_LOCK_STRESS_COUNTER_INCREMENT)) | + DRF_SHIFTMASK(NV0100_CTRL_GPU_LOCK_STRESS_COUNTER_ACTION) | + DRF_SHIFTMASK(NV0100_CTRL_CLIENT_LOCK_STRESS_COUNTER_ACTION) | + DRF_SHIFTMASK(NV0100_CTRL_INTERNAL_CLIENT_LOCK_STRESS_COUNTER_ACTION); + + return updateLockStressCounters(pResource, pParams->action); +} + +NV_STATUS +lockStressObjCtrlCmdPerformLockStressNoGpusLockApiLockReadMode_IMPL +( + LockStressObject *pResource, + NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS *pParams +) +{ + NvU8 rand; + + // Perform random increments/decrements but report what we did back to caller + NV_CHECK_OK_OR_RETURN(LEVEL_SILENT, osGetRandomBytes(&rand, 1)); + + // + // This API takes the API lock in read mode and no GPU lock so we can only + // increment/decrement the per client counter. + // + pParams->action = + (rand & DRF_SHIFTMASK(NV0100_CTRL_ALL_LOCK_STRESS_COUNTER_INCREMENT)) | + DRF_SHIFTMASK(NV0100_CTRL_CLIENT_LOCK_STRESS_COUNTER_ACTION); + + return updateLockStressCounters(pResource, pParams->action); +} + +static NV_STATUS +updateLockStressCountersInternal +( + LockStressObject *pResource, + RM_API *pRmApi, + NvU32 internalCmd, + NvU8 *pAction +) +{ + NV0100_CTRL_LOCK_STRESS_OUTPUT internalParams; + + // Handle the external client updates here before making the internal RM API call + if (DRF_VAL(0100_CTRL, _CLIENT, _LOCK_STRESS_COUNTER_ACTION, *pAction) != 0) + { + RsClient *pClient = RES_GET_CLIENT(pResource); + RmClient *pRmClient = dynamicCast(pClient, RmClient); + + // + // Resource Server currently doesn't attempt to lock the internal client on the + // internal RM API path if we already hold a client lock to avoid risking lock + // ordering issues so only assert if we aren't on the internal RM API path. + // + if (!serverIsClientInternal(&g_resServ, pClient->hClient)) + LOCK_ASSERT_AND_RETURN(serverIsClientLocked(&g_resServ, pClient->hClient)); + + if (pRmClient == NULL) + return NV_ERR_INVALID_STATE; + + if (DRF_VAL(0100_CTRL, _CLIENT, _LOCK_STRESS_COUNTER_INCREMENT, *pAction) != 0) + pRmClient->lockStressCounter++; + else + pRmClient->lockStressCounter--; + } + + // Make internal control + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, pRmApi->Control(pRmApi, pResource->hInternalClient, + pResource->hInternalLockStressObject, internalCmd, + &internalParams, sizeof(internalParams))); + + // + // Capture how the internal control updated the counters. Don't capture the per + // client counter since the internal client isn't visible to the caller anyway. + // + *pAction |= + (DRF_SHIFTMASK(NV0100_CTRL_GLOBAL_RMAPI_LOCK_STRESS_COUNTER_ACTION) | + DRF_SHIFTMASK(NV0100_CTRL_GPU_LOCK_STRESS_COUNTER_ACTION) | + DRF_SHIFTMASK(NV0100_CTRL_INTERNAL_CLIENT_LOCK_STRESS_COUNTER_ACTION) | + DRF_SHIFTMASK(NV0100_CTRL_GLOBAL_RMAPI_LOCK_STRESS_COUNTER_INCREMENT) | + DRF_SHIFTMASK(NV0100_CTRL_GPU_LOCK_STRESS_COUNTER_INCREMENT) | + DRF_SHIFTMASK(NV0100_CTRL_INTERNAL_CLIENT_LOCK_STRESS_COUNTER_INCREMENT)) + & internalParams.action; + + return NV_OK; +} + +NV_STATUS +lockStressObjCtrlCmdPerformLockStressInternalAllRmLocks_IMPL +( + LockStressObject *pResource, + NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_ALL_RM_LOCKS_PARAMS *pParams +) +{ + NvU8 rand; + NvU32 internalCmd = (FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8); + + // Perform random increments/decrements but report what we did back to caller + NV_CHECK_OK_OR_RETURN(LEVEL_SILENT, osGetRandomBytes(&rand, 1)); + + // + // Let the randomly selected internal API update the counters other than the per + // client counter. + // + pParams->action = + ((rand & + (DRF_SHIFTMASK(NV0100_CTRL_CLIENT_LOCK_STRESS_COUNTER_INCREMENT))) | + (DRF_SHIFTMASK(NV0100_CTRL_CLIENT_LOCK_STRESS_COUNTER_ACTION))); + + // + // Pick a random control call to call internally between the following: + // * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_ALL_RM_LOCKS + // * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_NO_GPUS_LOCK + // * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE + // * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE + // + internalCmd |= ((rand & 3) + + NV0100_CTRL_PERFORM_LOCK_STRESS_ALL_RM_LOCKS_PARAMS_MESSAGE_ID); + + return updateLockStressCountersInternal(pResource, + rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL), + internalCmd, &pParams->action); +} + +NV_STATUS +lockStressObjCtrlCmdPerformLockStressInternalNoGpusLock_IMPL +( + LockStressObject *pResource, + NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_PARAMS *pParams +) +{ + NvU8 rand; + NvU32 internalCmd = (FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8); + + // Perform random increments/decrements but report what we did back to caller + NV_CHECK_OK_OR_RETURN(LEVEL_SILENT, osGetRandomBytes(&rand, 1)); + + // + // Let the randomly selected internal API update the counters other than the per + // client counter. + // + pParams->action = + ((rand & + (DRF_SHIFTMASK(NV0100_CTRL_CLIENT_LOCK_STRESS_COUNTER_INCREMENT))) | + (DRF_SHIFTMASK(NV0100_CTRL_CLIENT_LOCK_STRESS_COUNTER_ACTION))); + + // + // Pick a random control call to call internally between the following: + // * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_ALL_RM_LOCKS + // * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_NO_GPUS_LOCK + // * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE + // * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE + // + internalCmd |= ((rand & (NVBIT(2)- 1)) + + NV0100_CTRL_PERFORM_LOCK_STRESS_ALL_RM_LOCKS_PARAMS_MESSAGE_ID); + + return updateLockStressCountersInternal(pResource, + rmapiGetInterface(RMAPI_API_LOCK_INTERNAL), + internalCmd, &pParams->action); +} + +NV_STATUS +lockStressObjCtrlCmdPerformLockStressInternalApiLockReadMode_IMPL +( + LockStressObject *pResource, + NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_API_LOCK_READ_MODE_PARAMS *pParams +) +{ + NvU8 rand; + NvU32 internalCmd = (FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8); + + // Perform random increments/decrements but report what we did back to caller + NV_CHECK_OK_OR_RETURN(LEVEL_SILENT, osGetRandomBytes(&rand, 1)); + + // + // Let the randomly selected internal API update the counters other than the per + // client counter. + // + pParams->action = + ((rand & + (DRF_SHIFTMASK(NV0100_CTRL_CLIENT_LOCK_STRESS_COUNTER_INCREMENT))) | + (DRF_SHIFTMASK(NV0100_CTRL_CLIENT_LOCK_STRESS_COUNTER_ACTION))); + + // + // Pick a random control call to call internally between the following: + // * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE + // * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE + // We only have the RO API lock so we can't call: + // * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_ALL_RM_LOCKS + // * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_NO_GPUS_LOCK + // + internalCmd |= ((rand & NVBIT(0)) + + NV0100_CTRL_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE_PARAMS_MESSAGE_ID); + + return updateLockStressCountersInternal(pResource, + rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL), + internalCmd, &pParams->action); +} + +NV_STATUS +lockStressObjCtrlCmdPerformLockStressInternalNoGpusLockApiLockReadMode_IMPL +( + LockStressObject *pResource, + NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS *pParams +) +{ + NvU8 rand; + NvU32 internalCmd = (FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8); + + // Perform random increments/decrements but report what we did back to caller + NV_CHECK_OK_OR_RETURN(LEVEL_SILENT, osGetRandomBytes(&rand, 1)); + + // + // Let the randomly selected internal API update the counters other than the per + // client counter. + // + pParams->action = + ((rand & + (DRF_SHIFTMASK(NV0100_CTRL_CLIENT_LOCK_STRESS_COUNTER_INCREMENT))) | + (DRF_SHIFTMASK(NV0100_CTRL_CLIENT_LOCK_STRESS_COUNTER_ACTION))); + // + // Pick a random control call to call internally between the following: + // * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE + // * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE + // We only have the RO API lock so we can't call: + // * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_ALL_RM_LOCKS + // * NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_NO_GPUS_LOCK + // + internalCmd |= ((rand & NVBIT(0)) + + NV0100_CTRL_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE_PARAMS_MESSAGE_ID); + + return updateLockStressCountersInternal(pResource, + rmapiGetInterface(RMAPI_API_LOCK_INTERNAL), + internalCmd, &pParams->action); +} + +NV_STATUS +lockStressObjCtrlCmdGetLockStressCounters_IMPL +( + LockStressObject *pResource, + NV0100_CTRL_GET_LOCK_STRESS_COUNTERS_PARAMS *pParams +) +{ + RsClient *pClient = RES_GET_CLIENT(pResource); + RmClient *pRmClient = dynamicCast(pClient, RmClient); + RmClient *pRmInternalClient; + OBJGPU *pGpu = GPU_RES_GET_GPU(pResource); + + if (pRmClient == NULL) + return NV_ERR_INVALID_STATE; + + pRmInternalClient = serverutilGetClientUnderLock(pGpu->hInternalLockStressClient); + if (pRmInternalClient == NULL) + return NV_ERR_INVALID_STATE; + + // Fetch all lock stress counter values for user space caller + pParams->globalLockStressCounter = g_LockStressCounter; + + pParams->gpuLockStressCounter = pGpu->lockStressCounter; + pParams->clientLockStressCounter = pRmClient->lockStressCounter; + pParams->internalClientLockStressCounter = pRmInternalClient->lockStressCounter; + + return NV_OK; +} diff --git a/src/nvidia/src/kernel/rmapi/mapping.c b/src/nvidia/src/kernel/rmapi/mapping.c index a4564051a6..d61caa7305 100644 --- a/src/nvidia/src/kernel/rmapi/mapping.c +++ b/src/nvidia/src/kernel/rmapi/mapping.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -381,6 +381,17 @@ rmapiMapWithSecInfo lockInfo.flags |= RM_LOCK_FLAGS_GPU_GROUP_LOCK | RM_LOCK_FLAGS_NO_GPUS_LOCK; + // + // In the RTD3 case, the API lock isn't taken since it can be initiated + // from another thread that holds the API lock and because we now hold + // the GPU lock. + // + if (rmapiInRtd3PmPath()) + { + lockInfo.flags |= RM_LOCK_FLAGS_NO_API_LOCK; + lockInfo.state &= ~RM_LOCK_STATES_API_LOCK_ACQUIRED; + } + LOCK_METER_DATA(MAPMEM_DMA, flags, 0, 0); diff --git a/src/nvidia/src/kernel/rmapi/mapping_cpu.c b/src/nvidia/src/kernel/rmapi/mapping_cpu.c index aa776dc82c..c56a206ad2 100644 --- a/src/nvidia/src/kernel/rmapi/mapping_cpu.c +++ b/src/nvidia/src/kernel/rmapi/mapping_cpu.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -310,8 +310,7 @@ memMap_IMPL effectiveAddrSpace = ADDR_SYSMEM; } - bIsSysmem = (effectiveAddrSpace == ADDR_SYSMEM); - bIsSysmem = bIsSysmem || (effectiveAddrSpace == ADDR_EGM); + bIsSysmem = (effectiveAddrSpace == ADDR_SYSMEM) || (effectiveAddrSpace == ADDR_EGM); if (dynamicCast(pMemoryInfo, FlaMemory) != NULL) { @@ -333,35 +332,16 @@ memMap_IMPL { if (pMapParams->bKernel) { - if (pMemDesc->_flags & MEMDESC_FLAGS_PHYSICALLY_CONTIGUOUS) - { - NvP64 tempCpuPtr = kbusMapCoherentCpuMapping_HAL(pGpu, pKernelBus, pMemDesc); - if (tempCpuPtr == NULL) - { - rmStatus = NV_ERR_GENERIC; - } - else - { - rmStatus = NV_OK; - tempCpuPtr = NvP64_PLUS_OFFSET(tempCpuPtr, pMapParams->offset); - } - *pMapParams->ppCpuVirtAddr = tempCpuPtr; - - if (rmStatus != NV_OK) - return rmStatus; - } - else - { - rmStatus = osMapSystemMemory(pMemDesc, - pMapParams->offset, - pMapParams->length, - pMapParams->bKernel, - pMapParams->protect, - pMapParams->ppCpuVirtAddr, - &priv); - if (rmStatus != NV_OK) - return rmStatus; - } + rmStatus = kbusMapCoherentCpuMapping_HAL(pGpu, + pKernelBus, + pMemDesc, + pMapParams->offset, + pMapParams->length, + pMapParams->protect, + pMapParams->ppCpuVirtAddr, + &priv); + if (rmStatus != NV_OK) + return rmStatus; } else { @@ -717,19 +697,9 @@ memUnmap_IMPL if (pCpuMapping->pPrivate->bKernel) { - if(pMemDesc->_flags & MEMDESC_FLAGS_PHYSICALLY_CONTIGUOUS) - { - NV_ASSERT(pMemDesc->_flags & MEMDESC_FLAGS_PHYSICALLY_CONTIGUOUS); - kbusUnmapCoherentCpuMapping_HAL(pGpu, pKernelBus, pMemDesc); - } - else - { - osUnmapSystemMemory(pMemDesc, - pCpuMapping->pPrivate->bKernel, - pCpuMapping->processId, - pCpuMapping->pLinearAddress, - pCpuMapping->pPrivate->pPriv); - } + kbusUnmapCoherentCpuMapping_HAL(pGpu, pKernelBus, pMemDesc, + pCpuMapping->pLinearAddress, + pCpuMapping->pPrivate->pPriv); } NV_PRINTF(LEVEL_INFO, @@ -743,9 +713,9 @@ memUnmap_IMPL // } // System Memory case - else if ((pGpu == NULL) || (((memdescGetAddressSpace(pMemDesc) == ADDR_SYSMEM) - || (memdescGetAddressSpace(pMemDesc) == ADDR_EGM) - ) && FLD_TEST_DRF(OS33, _FLAGS, _MAPPING, _DIRECT, pCpuMapping->flags))) + else if ((pGpu == NULL) || (((memdescGetAddressSpace(pMemDesc) == ADDR_SYSMEM) || + (memdescGetAddressSpace(pMemDesc) == ADDR_EGM)) && + FLD_TEST_DRF(OS33, _FLAGS, _MAPPING, _DIRECT, pCpuMapping->flags))) { if (FLD_TEST_DRF(OS33, _FLAGS, _MAPPING, _DIRECT, pCpuMapping->flags)) { @@ -1156,6 +1126,17 @@ rmapiMapToCpuWithSecInfoV2 return status; } + // + // In the RTD3 case, the API lock isn't taken since it can be initiated + // from another thread that holds the API lock and because we now hold + // the GPU lock. + // + if (rmapiInRtd3PmPath()) + { + lockInfo.flags |= RM_LOCK_FLAGS_NO_API_LOCK; + lockInfo.state &= ~RM_LOCK_STATES_API_LOCK_ACQUIRED; + } + LOCK_METER_DATA(MAPMEM, flags, 0, 0); // clear params for good measure diff --git a/src/nvidia/src/kernel/rmapi/nv_gpu_ops.c b/src/nvidia/src/kernel/rmapi/nv_gpu_ops.c index a7d5c13481..31a41390d5 100644 --- a/src/nvidia/src/kernel/rmapi/nv_gpu_ops.c +++ b/src/nvidia/src/kernel/rmapi/nv_gpu_ops.c @@ -246,7 +246,6 @@ struct gpuDevice NvBool isTccMode; NvBool isWddmMode; struct gpuSession *session; - NvU8 gpuUUID[NV_GPU_UUID_LEN]; gpuFbInfo fbInfo; gpuInfo info; @@ -466,7 +465,7 @@ typedef struct nvGpuOpsLockSet NvBool isRmLockAcquired; NvBool isRmSemaAcquired; GPU_MASK gpuMask; - RsClient *pClientLocked; + CLIENT_ENTRY *pClientEntryLocked; } nvGpuOpsLockSet; static void _nvGpuOpsLocksRelease(nvGpuOpsLockSet *acquiredLocks) @@ -480,10 +479,11 @@ static void _nvGpuOpsLocksRelease(nvGpuOpsLockSet *acquiredLocks) acquiredLocks->gpuMask = 0; } - if (acquiredLocks->pClientLocked != NULL) + if (acquiredLocks->pClientEntryLocked != NULL) { - serverReleaseClient(&g_resServ, LOCK_ACCESS_WRITE, acquiredLocks->pClientLocked); - acquiredLocks->pClientLocked = NULL; + serverReleaseClient(&g_resServ, LOCK_ACCESS_WRITE, + acquiredLocks->pClientEntryLocked); + acquiredLocks->pClientEntryLocked = NULL; } if (acquiredLocks->isRmLockAcquired == NV_TRUE) @@ -515,7 +515,7 @@ static NV_STATUS _nvGpuOpsLocksAcquire(NvU32 rmApiLockFlags, acquiredLocks->isRmSemaAcquired = NV_FALSE; acquiredLocks->isRmLockAcquired = NV_FALSE; acquiredLocks->gpuMask = 0; - acquiredLocks->pClientLocked = NULL; + acquiredLocks->pClientEntryLocked = NULL; pSys = SYS_GET_INSTANCE(); if (pSys == NULL) @@ -540,7 +540,7 @@ static NV_STATUS _nvGpuOpsLocksAcquire(NvU32 rmApiLockFlags, if (hClient != NV01_NULL_OBJECT) { - status = serverAcquireClient(&g_resServ, hClient, LOCK_ACCESS_WRITE, &acquiredLocks->pClientLocked); + status = serverAcquireClient(&g_resServ, hClient, LOCK_ACCESS_WRITE, &acquiredLocks->pClientEntryLocked); if (status != NV_OK) { @@ -549,7 +549,7 @@ static NV_STATUS _nvGpuOpsLocksAcquire(NvU32 rmApiLockFlags, } if (ppClient != NULL) - *ppClient = acquiredLocks->pClientLocked; + *ppClient = acquiredLocks->pClientEntryLocked->pClient; } // @@ -1559,7 +1559,6 @@ static UVM_LINK_TYPE rmControlToUvmNvlinkVersion(NvU32 nvlinkVersion) return UVM_LINK_TYPE_NVLINK_3; else if (nvlinkVersion == NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_4_0) return UVM_LINK_TYPE_NVLINK_4; - NV_ASSERT(0); return (NvU32)-1; } @@ -1652,21 +1651,19 @@ static NV_STATUS getPCIELinkRateMBps(NvHandle hClient, NvHandle hSubDevice, NvU3 const NvU32 PCIE_6_ENCODING_RATIO_EFFECTIVE = 242; RM_API *pRmApi = rmapiGetInterface(RMAPI_EXTERNAL_KERNEL); - NV2080_CTRL_BUS_INFO busInfo = {0}; - NV2080_CTRL_BUS_GET_INFO_PARAMS busInfoParams = {0}; + NV2080_CTRL_BUS_GET_INFO_V2_PARAMS busInfoV2Params = {0}; NvU32 linkRate = 0; NvU32 lanes; - busInfo.index = NV2080_CTRL_BUS_INFO_INDEX_PCIE_GPU_LINK_CAPS; - busInfoParams.busInfoListSize = 1; - busInfoParams.busInfoList = NV_PTR_TO_NvP64(&busInfo); + busInfoV2Params.busInfoList[0].index = NV2080_CTRL_BUS_INFO_INDEX_PCIE_GPU_LINK_CAPS; + busInfoV2Params.busInfoListSize = 1; NV_STATUS status = pRmApi->Control(pRmApi, hClient, hSubDevice, - NV2080_CTRL_CMD_BUS_GET_INFO, - &busInfoParams, - sizeof(busInfoParams)); + NV2080_CTRL_CMD_BUS_GET_INFO_V2, + &busInfoV2Params, + sizeof(busInfoV2Params)); if (status != NV_OK) { NV_PRINTF(LEVEL_ERROR, "%s:%d: %s\n", __FUNCTION__, @@ -1674,10 +1671,10 @@ static NV_STATUS getPCIELinkRateMBps(NvHandle hClient, NvHandle hSubDevice, NvU3 return status; } - lanes = DRF_VAL(2080, _CTRL_BUS_INFO, _PCIE_LINK_CAP_MAX_WIDTH, busInfo.data); + lanes = DRF_VAL(2080, _CTRL_BUS_INFO, _PCIE_LINK_CAP_MAX_WIDTH, busInfoV2Params.busInfoList[0].data); // Bug 2606540: RM reports PCIe transfer rate in GT/s but labels it as Gbps - switch (DRF_VAL(2080, _CTRL_BUS_INFO, _PCIE_LINK_CAP_MAX_SPEED, busInfo.data)) + switch (DRF_VAL(2080, _CTRL_BUS_INFO, _PCIE_LINK_CAP_MAX_SPEED, busInfoV2Params.busInfoList[0].data)) { case NV2080_CTRL_BUS_INFO_PCIE_LINK_CAP_MAX_SPEED_2500MBPS: linkRate = ((2500 * lanes * PCIE_1_ENCODING_RATIO_EFFECTIVE) @@ -2639,13 +2636,11 @@ static NV_STATUS getNvlinkP2PCaps(struct gpuDevice *device1, return NV_OK; } - // NVLink1 devices cannot be mixed with other versions. NVLink3 supports - // mixing NVLink2 and NVLink3 devices. NVLink4 devices cannot be mixed with - // prior NVLink versions. if (nvlinkVersion1 == NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_1_0 || nvlinkVersion2 == NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_1_0 || nvlinkVersion1 == NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_4_0 || - nvlinkVersion2 == NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_4_0) + nvlinkVersion2 == NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_4_0 + ) { NV_ASSERT(nvlinkVersion1 == nvlinkVersion2); NV_ASSERT(linkBandwidthMBps1 == linkBandwidthMBps2); @@ -3293,14 +3288,7 @@ nvGpuOpsBuildExternalAllocPtes } else { - if (memdescIsEgm(pMemDesc)) - { - fabricBaseAddress = knvlinkGetUniqueFabricEgmBaseAddress(pMemDesc->pGpu, pKernelNvlink); - } - else - { - fabricBaseAddress = knvlinkGetUniqueFabricBaseAddress(pMemDesc->pGpu, pKernelNvlink); - } + fabricBaseAddress = knvlinkGetUniqueFabricBaseAddress(pMemDesc->pGpu, pKernelNvlink); } } } @@ -3325,9 +3313,9 @@ nvGpuOpsBuildExternalAllocPtes // memdescGetPhysAddrsForGpu(pMemDesc, pMappingGpu, AT_GPU, offset, mappingPageSize, pteCount, physicalAddresses); - kgmmuEncodePhysAddrs(pKernelGmmu, aperture, physicalAddresses, fabricBaseAddress, pteCount); + // // Get information whether given physical address needs PLCable kind // @@ -5095,6 +5083,8 @@ static NV_STATUS engineAllocate(struct gpuChannel *channel, gpuChannelInfo *chan channelInfo->workSubmissionOffsetGpuVa = channel->clientRegionGpuAddr + NVC361_NOTIFY_CHANNEL_PENDING; } + channelInfo->keyRotationNotifier = channelInfo->errorNotifier + + NV_CHANNELGPFIFO_NOTIFICATION_TYPE_KEY_ROTATION_STATUS; } // Schedule the channel @@ -10048,6 +10038,79 @@ static NV_STATUS nvGpuOpsGetMemoryByHandle(NvHandle hClient, NvHandle hMemory, M ppMemory); } +// Enure that's UVM's enum values match RM's. +ct_assert((NvU32)KEY_ROTATION_STATUS_IDLE == (NvU32)UVM_KEY_ROTATION_STATUS_IDLE); +ct_assert((NvU32)KEY_ROTATION_STATUS_PENDING == (NvU32)UVM_KEY_ROTATION_STATUS_PENDING); +ct_assert((NvU32)KEY_ROTATION_STATUS_IN_PROGRESS == (NvU32)UVM_KEY_ROTATION_STATUS_IN_PROGRESS); +ct_assert((NvU32)KEY_ROTATION_STATUS_FAILED_TIMEOUT == (NvU32)UVM_KEY_ROTATION_STATUS_FAILED_TIMEOUT); +ct_assert((NvU32)KEY_ROTATION_STATUS_FAILED_THRESHOLD == (NvU32)KEY_ROTATION_STATUS_FAILED_THRESHOLD); +ct_assert((NvU32)KEY_ROTATION_STATUS_FAILED_ROTATION == (NvU32)KEY_ROTATION_STATUS_FAILED_ROTATION); +ct_assert((NvU32)KEY_ROTATION_STATUS_MAX_COUNT == (NvU32)KEY_ROTATION_STATUS_MAX_COUNT); + +NV_STATUS nvGpuOpsKeyRotationChannelDisable(struct gpuChannel *channelList[], + NvU32 channelListCount) +{ + NV2080_CTRL_FIFO_DISABLE_CHANNELS_FOR_KEY_ROTATION_PARAMS *pParams; + NvU32 startIndex; + const NvU32 maxCtrlCallChannels = NV2080_CTRL_FIFO_DISABLE_CHANNELS_FOR_KEY_ROTATION_MAX_ENTRIES; + + if ((channelList == NULL) || (channelListCount == 0) ) + { + return NV_ERR_INVALID_ARGUMENT; + } + + // CC_TODO: Pre-allocate control call buffers. + pParams = portMemAllocNonPaged(sizeof(*pParams)); + + if (pParams == NULL) + { + return NV_ERR_NO_MEMORY; + } + + // + // Break into multiple control calls if number of channels is larger than + // NV2080_CTRL_FIFO_DISABLE_CHANNELS_FOR_KEY_ROTATION_MAX_ENTRIES + // + for (startIndex = 0; startIndex < channelListCount; startIndex += maxCtrlCallChannels) + { + NV_STATUS status; + RM_API *pRmApi = rmapiGetInterface(RMAPI_EXTERNAL_KERNEL); + + const NvU32 numChannels = (channelListCount - startIndex) > maxCtrlCallChannels ? + maxCtrlCallChannels : (channelListCount - startIndex); + NvU32 index; + + portMemSet(pParams, 0, sizeof(*pParams)); + + pParams->numChannels = numChannels; + pParams->bEnableAfterKeyRotation = NV_TRUE; + + for (index = startIndex; index < startIndex + numChannels; index++) + { + pParams->hClientList[index] = channelList[index]->tsg->vaSpace->device->session->handle; + pParams->hChannelList[index] = channelList[index]->channelHandle; + } + + // While there is a list of channels they all share the same Client. + status = pRmApi->Control(pRmApi, + channelList[0]->tsg->vaSpace->device->session->handle, + channelList[0]->tsg->vaSpace->device->subhandle, + NV2080_CTRL_CMD_FIFO_DISABLE_CHANNELS_FOR_KEY_ROTATION, + pParams, + sizeof(*pParams)); + if (status != NV_OK) + { + portMemFree(pParams); + + return status; + } + } + + portMemFree(pParams); + + return NV_OK; +} + NV_STATUS nvGpuOpsCcslContextInit(struct ccslContext_t **ctx, struct gpuChannel *channel) { @@ -10070,14 +10133,28 @@ NV_STATUS nvGpuOpsCcslContextClear(struct ccslContext_t *ctx) return NV_OK; } -NV_STATUS nvGpuOpsCcslContextUpdate(struct ccslContext_t *ctx) +NV_STATUS nvGpuOpsCcslContextUpdate(UvmCslContext *contextList[], NvU32 contextListCount) { - if (ctx == NULL) + NvU32 index; + + if ((contextList == NULL) || (contextListCount == 0)) { return NV_ERR_INVALID_ARGUMENT; } - return ccslContextUpdate(ctx); + for (index = 0; index < contextListCount; index++) + { + NV_STATUS status; + + status = ccslContextUpdate(contextList[index]->ctx); + + if (status != NV_OK) + { + return status; + } + } + + return NV_OK; } NV_STATUS nvGpuOpsCcslRotateIv(struct ccslContext_t *ctx, NvU8 direction) diff --git a/src/nvidia/src/kernel/rmapi/resource.c b/src/nvidia/src/kernel/rmapi/resource.c index 06bd25e19b..4e9b990095 100644 --- a/src/nvidia/src/kernel/rmapi/resource.c +++ b/src/nvidia/src/kernel/rmapi/resource.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -216,8 +216,8 @@ rmresControlSerialization_Prologue_IMPL OBJGPU *pGpu = gpumgrGetGpu(pResource->rpcGpuInstance); if (pGpu != NULL && - ((IS_VIRTUAL(pGpu) && (pParams->pCookie->ctrlFlags & RMCTRL_FLAGS_ROUTE_TO_VGPU_HOST)) || - (IS_GSP_CLIENT(pGpu) && (pParams->pCookie->ctrlFlags & RMCTRL_FLAGS_ROUTE_TO_PHYSICAL)))) + ((IS_VIRTUAL(pGpu) && (pParams->pCookie->ctrlFlags & RMCTRL_FLAGS_ROUTE_TO_VGPU_HOST) + ) || (IS_GSP_CLIENT(pGpu) && (pParams->pCookie->ctrlFlags & RMCTRL_FLAGS_ROUTE_TO_PHYSICAL)))) { return serverSerializeCtrlDown(pCallContext, pParams->cmd, &pParams->pParams, &pParams->paramsSize, &pParams->flags); } @@ -240,8 +240,8 @@ rmresControlSerialization_Epilogue_IMPL OBJGPU *pGpu = gpumgrGetGpu(pResource->rpcGpuInstance); if (pGpu != NULL && - ((IS_VIRTUAL(pGpu) && (pParams->pCookie->ctrlFlags & RMCTRL_FLAGS_ROUTE_TO_VGPU_HOST)) || - (IS_GSP_CLIENT(pGpu) && (pParams->pCookie->ctrlFlags & RMCTRL_FLAGS_ROUTE_TO_PHYSICAL)))) + ((IS_VIRTUAL(pGpu) && (pParams->pCookie->ctrlFlags & RMCTRL_FLAGS_ROUTE_TO_VGPU_HOST) + ) || (IS_GSP_CLIENT(pGpu) && (pParams->pCookie->ctrlFlags & RMCTRL_FLAGS_ROUTE_TO_PHYSICAL)))) { NV_ASSERT_OK(serverDeserializeCtrlUp(pCallContext, pParams->cmd, &pParams->pParams, &pParams->paramsSize, &pParams->flags)); } @@ -262,8 +262,8 @@ rmresControl_Prologue_IMPL OBJGPU *pGpu = gpumgrGetGpu(pResource->rpcGpuInstance); if (pGpu != NULL && - ((IS_VIRTUAL(pGpu) && (pParams->pCookie->ctrlFlags & RMCTRL_FLAGS_ROUTE_TO_VGPU_HOST)) || - (IS_GSP_CLIENT(pGpu) && (pParams->pCookie->ctrlFlags & RMCTRL_FLAGS_ROUTE_TO_PHYSICAL)))) + ((IS_VIRTUAL(pGpu) && (pParams->pCookie->ctrlFlags & RMCTRL_FLAGS_ROUTE_TO_VGPU_HOST) + ) || (IS_GSP_CLIENT(pGpu) && (pParams->pCookie->ctrlFlags & RMCTRL_FLAGS_ROUTE_TO_PHYSICAL)))) { // // GPU lock is required to protect the RPC buffers. diff --git a/src/nvidia/src/kernel/rmapi/resource_list.h b/src/nvidia/src/kernel/rmapi/resource_list.h index f0600a0056..1da3162d20 100644 --- a/src/nvidia/src/kernel/rmapi/resource_list.h +++ b/src/nvidia/src/kernel/rmapi/resource_list.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -714,7 +714,7 @@ RS_ENTRY( /* Parents */ RS_LIST(classId(Subdevice)), /* Alloc Param Info */ RS_NONE, /* Resource Free Priority */ RS_FREE_PRIORITY_DEFAULT, - /* Flags */ RS_FLAGS_ALLOC_NON_PRIVILEGED | RS_FLAGS_ACQUIRE_GPUS_LOCK, + /* Flags */ RS_FLAGS_ALLOC_NON_PRIVILEGED | RS_FLAGS_ALLOC_RPC_TO_PHYS_RM | RS_FLAGS_ACQUIRE_GPUS_LOCK, /* Required Access Rights */ RS_ACCESS_NONE ) RS_ENTRY( @@ -1592,5 +1592,16 @@ RS_ENTRY( ) #endif +RS_ENTRY( + /* External Class */ LOCK_STRESS_OBJECT, + /* Internal Class */ LockStressObject, + /* Multi-Instance */ NV_FALSE, + /* Parents */ RS_LIST(classId(Subdevice)), + /* Alloc Param Info */ RS_NONE, + /* Resource Free Priority */ RS_FREE_PRIORITY_DEFAULT, + /* Flags */ RS_FLAGS_ALLOC_NON_PRIVILEGED, + /* Required Access Rights */ RS_ACCESS_NONE +) + // Undefine the entry macro to simplify call sites #undef RS_ENTRY diff --git a/src/nvidia/src/kernel/rmapi/rmapi.c b/src/nvidia/src/kernel/rmapi/rmapi.c index 3797abe608..202e1f2fd0 100644 --- a/src/nvidia/src/kernel/rmapi/rmapi.c +++ b/src/nvidia/src/kernel/rmapi/rmapi.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -57,6 +57,8 @@ static RM_API g_RmApiList[RMAPI_TYPE_MAX]; static NvBool g_bResServInit = NV_FALSE; static RMAPI_LOCK g_RmApiLock; +static NvU64 g_rtd3PmPathThreadId = ~0ULL; + static void _rmapiInitInterface(RM_API *pRmApi, API_SECURITY_INFO *pDefaultSecurityInfo, NvBool bTlsInternal, NvBool bApiLockInternal, NvBool bGpuLockInternal); static NV_STATUS _rmapiLockAlloc(void); @@ -401,76 +403,82 @@ rmapiInitLockInfo { pLockInfo->state = pCallContext->pLockInfo->state; - // If no clients are locked, then we need to acquire client locks - if (pCallContext->pLockInfo->pClient == NULL) - pLockInfo->state &= ~RM_LOCK_STATES_CLIENT_LOCK_ACQUIRED; - - // If we only need one client locked - else if (hSecondClient == NV01_NULL_OBJECT) + if (!serverAllClientsLockIsOwner(&g_resServ)) { - if (pCallContext->pLockInfo->pClient->hClient == hClient) - pLockInfo->pClient = pCallContext->pLockInfo->pClient; - else if ((pCallContext->pLockInfo->pSecondClient != NULL) && - (pCallContext->pLockInfo->pSecondClient->hClient == hClient)) - { - pLockInfo->pClient = pCallContext->pLockInfo->pSecondClient; - } - else + // If no clients are locked, then we need to acquire client locks + if (pCallContext->pLockInfo->pClient == NULL) pLockInfo->state &= ~RM_LOCK_STATES_CLIENT_LOCK_ACQUIRED; - } - // If we only have one client locked, but we need two - else if (pCallContext->pLockInfo->pSecondClient == NULL) - { - if ((pCallContext->pLockInfo->pClient->hClient == hClient) || - (pCallContext->pLockInfo->pClient->hClient == hSecondClient)) + // If we only need one client locked + else if (hSecondClient == NV01_NULL_OBJECT) { - pLockInfo->pClient = pCallContext->pLockInfo->pClient; - - // - // Special case: if both clients are the same - - // Set both pClient's so _serverLockDualClientWithLockInfo - // doesn't complain about the lock state being invalid. - // - if (hClient == hSecondClient) - pLockInfo->pSecondClient = pCallContext->pLockInfo->pClient; + if (pCallContext->pLockInfo->pClient->hClient == hClient) + pLockInfo->pClient = pCallContext->pLockInfo->pClient; + else if ((pCallContext->pLockInfo->pSecondClient != NULL) && + (pCallContext->pLockInfo->pSecondClient->hClient == hClient)) + { + pLockInfo->pClient = pCallContext->pLockInfo->pSecondClient; + } + else + pLockInfo->state &= ~RM_LOCK_STATES_CLIENT_LOCK_ACQUIRED; } - else - pLockInfo->state &= ~RM_LOCK_STATES_CLIENT_LOCK_ACQUIRED; - } - // If we need two clients locked, and already have two - else - { - // - // Check whether both clients match, keep the original order of the - // clients (dual client locking always locks the lower numbered client - // handle first). - // - if (((pCallContext->pLockInfo->pClient->hClient == hClient) && - (pCallContext->pLockInfo->pSecondClient->hClient == hSecondClient)) || - ((pCallContext->pLockInfo->pClient->hClient == hSecondClient) && - (pCallContext->pLockInfo->pSecondClient->hClient == hClient))) + // If we only have one client locked, but we need two + else if (pCallContext->pLockInfo->pSecondClient == NULL) { - pLockInfo->pClient = pCallContext->pLockInfo->pClient; - pLockInfo->pSecondClient = pCallContext->pLockInfo->pSecondClient; - } - - // Check whether one client handle matches - else if ((pCallContext->pLockInfo->pClient->hClient == hClient) || + if ((pCallContext->pLockInfo->pClient->hClient == hClient) || (pCallContext->pLockInfo->pClient->hClient == hSecondClient)) - { - pLockInfo->pClient = pCallContext->pLockInfo->pClient; - pLockInfo->state &= ~RM_LOCK_STATES_CLIENT_LOCK_ACQUIRED; + { + pLockInfo->pClient = pCallContext->pLockInfo->pClient; + + // + // Special case: if both clients are the same - + // Set both pClient's so _serverLockDualClientWithLockInfo + // doesn't complain about the lock state being invalid. + // + if (hClient == hSecondClient) + pLockInfo->pSecondClient = pCallContext->pLockInfo->pClient; + } + else + pLockInfo->state &= ~RM_LOCK_STATES_CLIENT_LOCK_ACQUIRED; } - else if ((pCallContext->pLockInfo->pSecondClient->hClient == hClient) || - (pCallContext->pLockInfo->pSecondClient->hClient == hSecondClient)) + + // If we need two clients locked, and already have two + else { - pLockInfo->pClient = pCallContext->pLockInfo->pSecondClient; - pLockInfo->state &= ~RM_LOCK_STATES_CLIENT_LOCK_ACQUIRED; + // + // Check whether both clients match, keep the original order of the + // clients (dual client locking always locks the lower numbered client + // handle first). + // + if (((pCallContext->pLockInfo->pClient->hClient == hClient) && + (pCallContext->pLockInfo->pSecondClient->hClient == + hSecondClient)) || + ((pCallContext->pLockInfo->pClient->hClient == hSecondClient) && + (pCallContext->pLockInfo->pSecondClient->hClient == hClient))) + { + pLockInfo->pClient = pCallContext->pLockInfo->pClient; + pLockInfo->pSecondClient = pCallContext->pLockInfo->pSecondClient; + } + + // Check whether one client handle matches + else if ((pCallContext->pLockInfo->pClient->hClient == hClient) || + (pCallContext->pLockInfo->pClient->hClient == hSecondClient)) + { + pLockInfo->pClient = pCallContext->pLockInfo->pClient; + pLockInfo->state &= ~RM_LOCK_STATES_CLIENT_LOCK_ACQUIRED; + } + else if ((pCallContext->pLockInfo->pSecondClient->hClient == + hClient) || + (pCallContext->pLockInfo->pSecondClient->hClient == + hSecondClient)) + { + pLockInfo->pClient = pCallContext->pLockInfo->pSecondClient; + pLockInfo->state &= ~RM_LOCK_STATES_CLIENT_LOCK_ACQUIRED; + } + else + pLockInfo->state &= ~RM_LOCK_STATES_CLIENT_LOCK_ACQUIRED; } - else - pLockInfo->state &= ~RM_LOCK_STATES_CLIENT_LOCK_ACQUIRED; } } } @@ -483,84 +491,13 @@ rmapiInitLockInfo pLockInfo->state |= RM_LOCK_STATES_API_LOCK_ACQUIRED; // - // If we don't have the exact clients we need locked, - // and this is an internal call we MUST have the RW API lock in order - // to prevent the client from being modified concurrently. + // Don't acquire client locks if we already hold the API lock since we might've + // already acquired RM locks that are ordered after client locks (such as higher numbered + // client/GPU locks) and don't want to violate RM lock ordering. // - if (((hClient != NV01_NULL_OBJECT) && (pLockInfo->pClient == NULL)) || - ((hSecondClient != NV01_NULL_OBJECT) && (pLockInfo->pSecondClient == NULL))) + if (rmapiLockIsOwner()) { - NvBool bPrevClientsLocked = - ((pCallContext != NULL && - pCallContext->pLockInfo != NULL) && - (pCallContext->pLockInfo->pClient != NULL || - pCallContext->pLockInfo->pSecondClient != NULL)); - - // - // Check for the RW API lock only if we have one or more non-internal client - // handles that aren't already locked. Assume that in the case of RM - // internal clients the caller, which can only be RM for internal clients, - // has checked the path's locking properly and doesn't require the RW API - // lock. However, ensure that at least the RO API lock is held. - // - - // If we haven't locked either hClient or hSecondClient yet - if (pLockInfo->pClient == NULL) - { - // - // Both client handles have to be kernel only to execute with the - // RO API lock. - // - if (!rmclientIsKernelOnlyByHandle(hClient) || - ((hSecondClient != NV01_NULL_OBJECT) && - (!rmclientIsKernelOnlyByHandle(hSecondClient)))) - { - LOCK_ASSERT_AND_RETURN(rmapiLockIsWriteOwner()); - } - - // - // Require the API lock if there are previous clients locked since - // that will prevent us from locking any individual client objects - // and therefore prevent them from being freed concurrently. - // - else if (bPrevClientsLocked) - { - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); - } - } - - // If we have 1 client already locked but we're using 2 - else if ((hSecondClient != NV01_NULL_OBJECT) && - (pLockInfo->pSecondClient == NULL)) - { - NvHandle hUnlockedClient = (pLockInfo->pClient->hClient == hClient ? - hSecondClient : hClient); - - // - // The unlocked client handle has to be unusable from user space to - // execute with the RO API lock. - // - if (!rmclientIsKernelOnlyByHandle(hUnlockedClient)) - { - LOCK_ASSERT_AND_RETURN(rmapiLockIsWriteOwner()); - } - - // - // Require the API lock if there are previous clients locked since - // that will prevent us from locking any individual client objects - // and therefore prevent them from being freed concurrently. - // - else if (bPrevClientsLocked) - { - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); - } - } - - // Don't acquire client locks if we already hold the API lock. - if (rmapiLockIsOwner()) - { - pLockInfo->flags |= RM_LOCK_FLAGS_NO_CLIENT_LOCK; - } + pLockInfo->flags |= RM_LOCK_FLAGS_NO_CLIENT_LOCK; } } @@ -833,6 +770,38 @@ rmapiLockGetTimes(NV0000_CTRL_SYSTEM_GET_LOCK_TIMES_PARAMS *pParams) pParams->holdRwApiLock = g_RmApiLock.totalRwHoldTime; } +// +// Indicates current thread is in the RTD3 PM path (rm_transition_dynamic_power) which +// means that certain locking asserts/checks must be skipped due to inability to acquire +// the API lock in this path. +// +void rmapiEnterRtd3PmPath(void) +{ + // RTD3 path cannot be entered without the GPU lock + NV_ASSERT(rmGpuLockIsOwner()); + + NV_ASSERT(g_rtd3PmPathThreadId == ~0ULL); + g_rtd3PmPathThreadId = portThreadGetCurrentThreadId(); +} + +// +// Signifies that current thread is leaving the RTD3 PM path, restoring lock +// asserting/checking behavior to normal. +// +void rmapiLeaveRtd3PmPath(void) +{ + NV_ASSERT(rmapiInRtd3PmPath()); + g_rtd3PmPathThreadId = ~0ULL; +} + +// +// Checks if current thread is currently running in the RTD3 PM path. +// +NvBool rmapiInRtd3PmPath(void) +{ + return (g_rtd3PmPathThreadId == portThreadGetCurrentThreadId()); +} + // // Mark for deletion the client resources from the data base, given a GPU mask // diff --git a/src/nvidia/src/kernel/rmapi/rmapi_cache.c b/src/nvidia/src/kernel/rmapi/rmapi_cache.c index f871c4a627..8451891f3e 100644 --- a/src/nvidia/src/kernel/rmapi/rmapi_cache.c +++ b/src/nvidia/src/kernel/rmapi/rmapi_cache.c @@ -34,23 +34,29 @@ #include "ctrl/ctrl2080/ctrl2080gpu.h" #include "ctrl/ctrl2080/ctrl2080fifo.h" #include "ctrl/ctrl2080/ctrl2080bus.h" +#include "gpu/gpu.h" typedef struct { void* params; } RmapiControlCacheEntry; +#define CACHE_GPU_FLAGS_SHIFT 32 + +// +// Stores the mapping of client object to the corresponding GPU attributes +// The key is generated by _handlesToGpuAttrKey with client and object handle // -// Stores the mapping of client object to the corresponding GPU instance -// The key is generated by _handlesToGpuInstKey with client and object handle -// The value is the instance of the GPU (pGpu->gpuInstance) the object is linked to +// The value is the combination of attribute of the GPU the object is linked to. +// The low 32 bits are used to store the GPU instance. +// THe high 32 bits are used for the above CACHE_GPU_FLAG* flags // -MAKE_MAP(ObjectToGpuInstMap, NvU64); +MAKE_MAP(ObjectToGpuAttrMap, NvU64); // // Stores the cached control value. // Each submap in the multimap stores the cached control value for one GPU. -// The key to find a submap is GPU Instance stored in ObjectToGpuInstMap +// The key to find a submap is GPU Instance stored in ObjectToGpuAttrMap // // The key inside the submap is the control command // The value inside the submap is the cached control value for the command @@ -61,25 +67,46 @@ ct_assert(sizeof(NvHandle) <= 4); #define CLIENT_KEY_SHIFT (sizeof(NvHandle) * 8) -static NvBool _isCmdSystemWide(NvU32 cmd) +static inline NvBool _isCmdSystemWide(NvU32 cmd) { return DRF_VAL(XXXX, _CTRL_CMD, _CLASS, cmd) == NV01_ROOT; } -static NvHandle _gpuInstKeyToClient(NvU64 key) +static inline NvHandle _gpuAttrKeyToClient(NvU64 key) { return (key >> CLIENT_KEY_SHIFT); } -static NvU64 _handlesToGpuInstKey(NvHandle hClient, NvHandle hObject) +static inline NvU64 _handlesToGpuAttrKey(NvHandle hClient, NvHandle hObject) { return ((NvU64)hClient << CLIENT_KEY_SHIFT) | hObject; } +static inline NvU32 _getGpuInstFromGpuAttr(NvU64 gpuAttr) +{ + return (NvU32)(gpuAttr & (NVBIT64(CACHE_GPU_FLAGS_SHIFT) - 1)); +} + +static inline NvU32 _getCacheGpuFlagsFromGpuAttr(NvU64 gpuAttr) +{ + return (NvU32)(gpuAttr >> CACHE_GPU_FLAGS_SHIFT); +} + +static NvU64 _getGpuAttrFromGpu(OBJGPU *pGpu) +{ + NvU64 gpuAttr = 0; + NvU32 cacheGpuFlags = 0; + + gpuAttr |= pGpu->gpuInstance; + gpuAttr |= ((NvU64)cacheGpuFlags) << CACHE_GPU_FLAGS_SHIFT; + + return gpuAttr; +} + static struct { /* NOTE: Size unbounded for now */ GpusControlCache gpusControlCache; - ObjectToGpuInstMap objectToGpuInstMap; + ObjectToGpuAttrMap objectToGpuAttrMap; NvU32 mode; PORT_RWLOCK *pLock; } RmapiControlCache; @@ -106,12 +133,19 @@ static void _cacheLockRelease(enum CACHE_LOCK_TYPE lockType) portSyncRwLockReleaseRead(RmapiControlCache.pLock); } +static inline +NvBool _cacheIsDisabled(void) +{ + return (rmapiControlCacheGetMode() == + NV0000_CTRL_SYSTEM_RMCTRL_CACHE_MODE_CTRL_MODE_DISABLE); +} + static RmapiControlCacheEntry* _getOrInitCacheEntry(NvU64 key1, NvU64 key2, NvBool bSet, NvU32 allocSize, NvBool *pbParamAllocated); NvBool rmapiControlIsCacheable(NvU32 flags, NvU32 accessRight, NvBool bAllowInternal) { - if (RmapiControlCache.mode == NV0000_CTRL_SYSTEM_RMCTRL_CACHE_MODE_CTRL_MODE_DISABLE) + if (_cacheIsDisabled()) return NV_FALSE; if (!(flags & RMCTRL_FLAGS_CACHEABLE_ANY)) @@ -155,7 +189,7 @@ NvBool rmapiCmdIsCacheable(NvU32 cmd, NvBool bAllowInternal) NV_STATUS rmapiControlCacheInit(void) { -#if defined(DEBUG) +#if defined(DEBUG) RmapiControlCache.mode = NV0000_CTRL_SYSTEM_RMCTRL_CACHE_MODE_CTRL_MODE_VERIFY_ONLY; #else RmapiControlCache.mode = NV0000_CTRL_SYSTEM_RMCTRL_CACHE_MODE_CTRL_MODE_ENABLE; @@ -170,47 +204,50 @@ NV_STATUS rmapiControlCacheInit(void) NV_PRINTF(LEVEL_INFO, "using cache mode %d\n", RmapiControlCache.mode); multimapInit(&RmapiControlCache.gpusControlCache, portMemAllocatorGetGlobalNonPaged()); - mapInit(&RmapiControlCache.objectToGpuInstMap, portMemAllocatorGetGlobalNonPaged()); + mapInit(&RmapiControlCache.objectToGpuAttrMap, portMemAllocatorGetGlobalNonPaged()); RmapiControlCache.pLock = portSyncRwLockCreate(portMemAllocatorGetGlobalNonPaged()); if (RmapiControlCache.pLock == NULL) { NV_PRINTF(LEVEL_ERROR, "failed to create rw lock\n"); multimapDestroy(&RmapiControlCache.gpusControlCache); - mapDestroy(&RmapiControlCache.objectToGpuInstMap); + mapDestroy(&RmapiControlCache.objectToGpuAttrMap); return NV_ERR_NO_MEMORY; } return NV_OK; } -NV_STATUS rmapiControlCacheSetGpuInstForObject +NV_STATUS rmapiControlCacheSetGpuAttrForObject ( NvHandle hClient, NvHandle hObject, - NvU32 gpuInst + OBJGPU *pGpu ) { NV_STATUS status = NV_OK; NvU64 *entry; + NvU64 gpuAttr; - if (gpuInst >= NV_MAX_DEVICES) - return NV_ERR_INVALID_PARAMETER; + if (pGpu == NULL) + return NV_ERR_INVALID_ARGUMENT; - NV_PRINTF(LEVEL_INFO, "gpu inst set for 0x%x 0x%x: 0x%x\n", hClient, hObject, gpuInst); + gpuAttr = _getGpuAttrFromGpu(pGpu); + + NV_PRINTF(LEVEL_INFO, "gpu attr set for 0x%x 0x%x: 0x%llx\n", hClient, hObject, gpuAttr); _cacheLockAcquire(LOCK_EXCLUSIVE); - entry = mapFind(&RmapiControlCache.objectToGpuInstMap, _handlesToGpuInstKey(hClient, hObject)); + entry = mapFind(&RmapiControlCache.objectToGpuAttrMap, _handlesToGpuAttrKey(hClient, hObject)); if (entry != NULL) { // set happens in object allocation, should not exist in cache already NV_PRINTF(LEVEL_WARNING, - "set existing gpu inst 0x%x 0x%x was 0x%llx is 0x%x\n", - hClient, hObject, *entry, gpuInst); + "set existing gpu attr 0x%x 0x%x was 0x%llx is 0x%llx\n", + hClient, hObject, *entry, gpuAttr); status = NV_ERR_INVALID_PARAMETER; goto done; } - entry = mapInsertNew(&RmapiControlCache.objectToGpuInstMap, _handlesToGpuInstKey(hClient, hObject)); + entry = mapInsertNew(&RmapiControlCache.objectToGpuAttrMap, _handlesToGpuAttrKey(hClient, hObject)); if (entry == NULL) { @@ -218,7 +255,7 @@ NV_STATUS rmapiControlCacheSetGpuInstForObject goto done; } - *entry = gpuInst; + *entry = gpuAttr; done: _cacheLockRelease(LOCK_EXCLUSIVE); @@ -226,22 +263,29 @@ NV_STATUS rmapiControlCacheSetGpuInstForObject } // Need to hold rmapi control cache read/write lock -static NV_STATUS _rmapiControlCacheGetGpuInstForObject +static NV_STATUS _rmapiControlCacheGetGpuAttrForObject ( NvHandle hClient, NvHandle hObject, - NvU32 *pGpuInst + NvU32 *pGpuInst, + NvU32 *pCacheGpuFlags ) { NV_STATUS status = NV_ERR_OBJECT_NOT_FOUND; - NvU64* entry = mapFind(&RmapiControlCache.objectToGpuInstMap, _handlesToGpuInstKey(hClient, hObject)); + NvU64* entry = mapFind(&RmapiControlCache.objectToGpuAttrMap, _handlesToGpuAttrKey(hClient, hObject)); - NV_PRINTF(LEVEL_INFO, "cached gpu inst lookup for 0x%x 0x%x\n", hClient, hObject); + NV_PRINTF(LEVEL_INFO, "cached gpu attr lookup for 0x%x 0x%x\n", hClient, hObject); if (entry != NULL) { - NV_PRINTF(LEVEL_INFO, "cached gpu inst for 0x%x 0x%x: 0x%llx\n", hClient, hObject, *entry); - *pGpuInst = *entry; + NV_PRINTF(LEVEL_INFO, "cached gpu attr for 0x%x 0x%x: 0x%llx\n", hClient, hObject, *entry); + + if (pGpuInst != NULL) + *pGpuInst = _getGpuInstFromGpuAttr(*entry); + + if (pCacheGpuFlags != NULL) + *pCacheGpuFlags = _getCacheGpuFlagsFromGpuAttr(*entry); + status = NV_OK; } @@ -249,39 +293,39 @@ static NV_STATUS _rmapiControlCacheGetGpuInstForObject } // Need to hold rmapi control cache write lock -static void _rmapiControlCacheFreeGpuInstForObject +static void _rmapiControlCacheFreeGpuAttrForObject ( NvHandle hClient, NvHandle hObject ) { - const NvU64 key = _handlesToGpuInstKey(hClient, hObject); - NvU64* entry = mapFind(&RmapiControlCache.objectToGpuInstMap, key); + const NvU64 key = _handlesToGpuAttrKey(hClient, hObject); + NvU64* entry = mapFind(&RmapiControlCache.objectToGpuAttrMap, key); if (entry != NULL) { - mapRemove(&RmapiControlCache.objectToGpuInstMap, entry); + mapRemove(&RmapiControlCache.objectToGpuAttrMap, entry); NV_PRINTF(LEVEL_INFO, "Gpu Inst entry with key 0x%llx freed\n", key); } } // Need to hold rmapi control cache write lock -static void _rmapiControlCacheFreeGpuInstForClient(NvHandle hClient) +static void _rmapiControlCacheFreeGpuAttrForClient(NvHandle hClient) { while (NV_TRUE) { - NvU64* entry = mapFindGEQ(&RmapiControlCache.objectToGpuInstMap, _handlesToGpuInstKey(hClient, 0)); + NvU64* entry = mapFindGEQ(&RmapiControlCache.objectToGpuAttrMap, _handlesToGpuAttrKey(hClient, 0)); NvU64 key; if (entry == NULL) break; - key = mapKey(&RmapiControlCache.objectToGpuInstMap, entry); + key = mapKey(&RmapiControlCache.objectToGpuAttrMap, entry); - if (_gpuInstKeyToClient(key) != hClient) + if (_gpuAttrKeyToClient(key) != hClient) break; - mapRemove(&RmapiControlCache.objectToGpuInstMap, entry); + mapRemove(&RmapiControlCache.objectToGpuAttrMap, entry); NV_PRINTF(LEVEL_INFO, "Gpu Inst entry with key 0x%llx freed\n", key); } } @@ -301,7 +345,7 @@ static NV_STATUS _rmapiControlCacheGet _cacheLockAcquire(LOCK_SHARED); - if (rmapiControlCacheGetMode() == NV0000_CTRL_SYSTEM_RMCTRL_CACHE_MODE_CTRL_MODE_DISABLE) + if (_cacheIsDisabled()) { // unexpected mode change. status = NV_ERR_INVALID_STATE; @@ -314,7 +358,7 @@ static NV_STATUS _rmapiControlCacheGet } else { - status = _rmapiControlCacheGetGpuInstForObject(hClient, hObject, &gpuInst); + status = _rmapiControlCacheGetGpuAttrForObject(hClient, hObject, &gpuInst, NULL); if (status != NV_OK) goto done; } @@ -348,7 +392,7 @@ static NV_STATUS _rmapiControlCacheSet _cacheLockAcquire(LOCK_EXCLUSIVE); - if (rmapiControlCacheGetMode() == NV0000_CTRL_SYSTEM_RMCTRL_CACHE_MODE_CTRL_MODE_DISABLE) + if (_cacheIsDisabled()) { // unexpected mode change. status = NV_ERR_INVALID_STATE; @@ -361,7 +405,7 @@ static NV_STATUS _rmapiControlCacheSet } else { - status = _rmapiControlCacheGetGpuInstForObject(hClient, hObject, &gpuInst); + status = _rmapiControlCacheGetGpuAttrForObject(hClient, hObject, &gpuInst, NULL); if (status != NV_OK) goto done; } @@ -482,7 +526,7 @@ _getOrInitCacheEntry return NULL; } -static NvBool _isGpuGetInfoIndexCacheable(NvU32 index) +static NvBool _isGpuGetInfoIndexCacheable(NvU32 index, NvU32 cacheGpuFlags) { switch (index) { @@ -503,7 +547,11 @@ static NvBool _isGpuGetInfoIndexCacheable(NvU32 index) case NV2080_CTRL_GPU_INFO_INDEX_GPU_DEBUGGING_CAPABILITY: case NV2080_CTRL_GPU_INFO_INDEX_CMP_SKU: case NV2080_CTRL_GPU_INFO_INDEX_DMABUF_CAPABILITY: + case NV2080_CTRL_GPU_INFO_INDEX_ECID_LO32: + case NV2080_CTRL_GPU_INFO_INDEX_ECID_HI32: + case NV2080_CTRL_GPU_INFO_INDEX_ECID_EXTENDED: return NV_TRUE; + default: return NV_FALSE; } @@ -546,12 +594,12 @@ static NvBool _isBusGetInfoIndexCacheable(NvU32 index) } } -static NvBool _isGetInfoIndexCacheable(NvU32 cmd, NvU32 index) +static NvBool _isGetInfoIndexCacheable(NvU32 cmd, NvU32 index, NvU32 cacheGpuFlags) { switch (cmd) { case NV2080_CTRL_CMD_GPU_GET_INFO_V2: - return _isGpuGetInfoIndexCacheable(index); + return _isGpuGetInfoIndexCacheable(index, cacheGpuFlags); case NV2080_CTRL_CMD_FIFO_GET_INFO: return _isFifoGetInfoIndexCacheable(index); case NV2080_CTRL_CMD_BUS_GET_INFO_V2: @@ -592,6 +640,7 @@ static NV_STATUS _getInfoCacheHandler NV_STATUS status = NV_OK; NvU32 i = 0; NvU32 gpuInst; + NvU32 cacheGpuFlags; RmapiControlCacheEntry *entry = NULL; GetInfoCacheEntry *cachedTable = NULL; const NvU32 allocSize = sizeof(GetInfoCacheEntry) * listSizeLimit; @@ -604,14 +653,14 @@ static NV_STATUS _getInfoCacheHandler _cacheLockAcquire(lockType); - if (rmapiControlCacheGetMode() == NV0000_CTRL_SYSTEM_RMCTRL_CACHE_MODE_CTRL_MODE_DISABLE) + if (_cacheIsDisabled()) { // unexpected mode change. status = NV_ERR_INVALID_STATE; goto done; } - status = _rmapiControlCacheGetGpuInstForObject(hClient, hObject, &gpuInst); + status = _rmapiControlCacheGetGpuAttrForObject(hClient, hObject, &gpuInst, &cacheGpuFlags); if (status != NV_OK) goto done; @@ -637,7 +686,7 @@ static NV_STATUS _getInfoCacheHandler if (bSet) { - if (_isGetInfoIndexCacheable(cmd, index)) + if (_isGetInfoIndexCacheable(cmd, index, cacheGpuFlags)) { if (cachedTable[index].valid) { @@ -653,7 +702,7 @@ static NV_STATUS _getInfoCacheHandler else { // if any of the entry is not cacheable or not in the cache, skip the whole cmd - if (!_isGetInfoIndexCacheable(cmd, index) || !cachedTable[index].valid) + if (!_isGetInfoIndexCacheable(cmd, index, cacheGpuFlags) || !cachedTable[index].valid) { status = NV_ERR_OBJECT_NOT_FOUND; goto done; @@ -705,14 +754,14 @@ NV_STATUS _gpuNameStringGet _cacheLockAcquire(LOCK_SHARED); - if (rmapiControlCacheGetMode() == NV0000_CTRL_SYSTEM_RMCTRL_CACHE_MODE_CTRL_MODE_DISABLE) + if (_cacheIsDisabled()) { // unexpected mode change. status = NV_ERR_INVALID_STATE; goto done; } - status = _rmapiControlCacheGetGpuInstForObject(hClient, hObject, &gpuInst); + status = _rmapiControlCacheGetGpuAttrForObject(hClient, hObject, &gpuInst, NULL); if (status != NV_OK) goto done; @@ -776,14 +825,14 @@ NV_STATUS _gpuNameStringSet _cacheLockAcquire(LOCK_EXCLUSIVE); - if (rmapiControlCacheGetMode() == NV0000_CTRL_SYSTEM_RMCTRL_CACHE_MODE_CTRL_MODE_DISABLE) + if (_cacheIsDisabled()) { // unexpected mode change. status = NV_ERR_INVALID_STATE; goto done; } - status = _rmapiControlCacheGetGpuInstForObject(hClient, hObject, &gpuInst); + status = _rmapiControlCacheGetGpuAttrForObject(hClient, hObject, &gpuInst, NULL); if (status != NV_OK) goto done; @@ -1061,7 +1110,7 @@ void rmapiControlCacheFreeAllCacheForGpu void rmapiControlCacheFreeClientEntry(NvHandle hClient) { _cacheLockAcquire(LOCK_EXCLUSIVE); - _rmapiControlCacheFreeGpuInstForClient(hClient); + _rmapiControlCacheFreeGpuAttrForClient(hClient); _cacheLockRelease(LOCK_EXCLUSIVE); } @@ -1074,7 +1123,7 @@ void rmapiControlCacheFreeObjectEntry(NvHandle hClient, NvHandle hObject) } _cacheLockAcquire(LOCK_EXCLUSIVE); - _rmapiControlCacheFreeGpuInstForObject(hClient, hObject); + _rmapiControlCacheFreeGpuAttrForObject(hClient, hObject); _cacheLockRelease(LOCK_EXCLUSIVE); } @@ -1090,7 +1139,7 @@ void rmapiControlCacheFree(void) } multimapDestroy(&RmapiControlCache.gpusControlCache); - mapDestroy(&RmapiControlCache.objectToGpuInstMap); + mapDestroy(&RmapiControlCache.objectToGpuAttrMap); portSyncRwLockDestroy(RmapiControlCache.pLock); } diff --git a/src/nvidia/src/kernel/rmapi/rmapi_utils.c b/src/nvidia/src/kernel/rmapi/rmapi_utils.c index 85bdc2d2ee..f098df353d 100644 --- a/src/nvidia/src/kernel/rmapi/rmapi_utils.c +++ b/src/nvidia/src/kernel/rmapi/rmapi_utils.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -31,7 +31,9 @@ #include "class/cl0080.h" #include "class/cl2080.h" +#include "ctrl/ctrl0080.h" #include "ctrl/ctrl2080.h" +#include "ctrl/ctrl90cc.h" NV_STATUS rmapiutilAllocClientAndDeviceHandles @@ -204,6 +206,18 @@ NvBool rmapiutilSkipErrorMessageForUnsupportedVgpuGuestControl(NvU32 cmd) case NV2080_CTRL_CMD_FB_GET_REMAPPED_ROWS: case NV2080_CTRL_CMD_ECC_GET_VOLATILE_COUNTS: case NV2080_CTRL_CMD_GPU_QUERY_INFOROM_ECC_SUPPORT: + case NV0080_CTRL_CMD_FB_GET_COMPBIT_STORE_INFO: + case NV2080_CTRL_CMD_BUS_CLEAR_PEX_COUNTERS: + case NV2080_CTRL_CMD_HSHUB_GET_AVAILABLE_MASK: + case NV2080_CTRL_CMD_I2C_WRITE_REG: + case NV2080_CTRL_CMD_I2C_READ_BUFFER: + case NV2080_CTRL_CMD_I2C_READ_REG: + case NV2080_CTRL_CMD_FB_SETUP_VPR_REGION: + case NV2080_CTRL_CMD_I2C_ACCESS: + case NV90CC_CTRL_CMD_POWER_REQUEST_FEATURES: + case NV90CC_CTRL_CMD_POWER_RELEASE_FEATURES: + case NV2080_CTRL_CMD_FLCN_USTREAMER_QUEUE_INFO: + case NV2080_CTRL_CMD_INTERNAL_NVLINK_ENABLE_COMPUTE_PEER_ADDR: return NV_TRUE; default: diff --git a/src/nvidia/src/kernel/rmapi/rpc_common.c b/src/nvidia/src/kernel/rmapi/rpc_common.c index a1fefd949a..9441c81d8d 100644 --- a/src/nvidia/src/kernel/rmapi/rpc_common.c +++ b/src/nvidia/src/kernel/rmapi/rpc_common.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/src/kernel/rmapi/rs_utils.c b/src/nvidia/src/kernel/rmapi/rs_utils.c index 96de03fce6..afb9c92484 100644 --- a/src/nvidia/src/kernel/rmapi/rs_utils.c +++ b/src/nvidia/src/kernel/rmapi/rs_utils.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2018-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -246,8 +246,11 @@ serverutilGenResourceHandle NV_STATUS status; RmClient *pClient; - // LOCK TEST: we should have the API lock here - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + // + // LOCK TEST: we should have the API lock here unless we're executing out of + // the power management path. + // + LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() || rmapiInRtd3PmPath()); pClient = serverutilGetClientUnderLock(hClient); @@ -343,25 +346,27 @@ serverutilAcquireClient ( NvHandle hClient, LOCK_ACCESS_TYPE access, + CLIENT_ENTRY **ppClientEntry, RmClient **ppClient ) { - RsClient *pRsClient; + CLIENT_ENTRY *pClientEntry; RmClient *pClient; // LOCK TEST: we should have the API lock here LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); - if (NV_OK != serverAcquireClient(&g_resServ, hClient, access, &pRsClient)) + if (NV_OK != serverAcquireClient(&g_resServ, hClient, access, &pClientEntry)) return NV_ERR_INVALID_CLIENT; - pClient = dynamicCast(pRsClient, RmClient); + pClient = dynamicCast(pClientEntry->pClient, RmClient); if (pClient == NULL) { - serverReleaseClient(&g_resServ, access, pRsClient); + serverReleaseClient(&g_resServ, access, pClientEntry); return NV_ERR_INVALID_CLIENT; } + *ppClientEntry = pClientEntry; *ppClient = pClient; return NV_OK; } @@ -370,8 +375,8 @@ void serverutilReleaseClient ( LOCK_ACCESS_TYPE access, - RmClient *pClient + CLIENT_ENTRY *pClientEntry ) { - serverReleaseClient(&g_resServ, access, staticCast(pClient, RsClient)); + serverReleaseClient(&g_resServ, access, pClientEntry); } diff --git a/src/nvidia/kernel/vgpu/ampere/rpcga102.c b/src/nvidia/src/kernel/vgpu/arch/ampere/rpcga102.c similarity index 100% rename from src/nvidia/kernel/vgpu/ampere/rpcga102.c rename to src/nvidia/src/kernel/vgpu/arch/ampere/rpcga102.c diff --git a/src/nvidia/kernel/vgpu/maxwell/rpcgm204.c b/src/nvidia/src/kernel/vgpu/arch/maxwell/rpcgm204.c similarity index 100% rename from src/nvidia/kernel/vgpu/maxwell/rpcgm204.c rename to src/nvidia/src/kernel/vgpu/arch/maxwell/rpcgm204.c diff --git a/src/nvidia/kernel/vgpu/nv/objvgpu.c b/src/nvidia/src/kernel/vgpu/objvgpu.c similarity index 99% rename from src/nvidia/kernel/vgpu/nv/objvgpu.c rename to src/nvidia/src/kernel/vgpu/objvgpu.c index 4dd395c936..fd17f97027 100644 --- a/src/nvidia/kernel/vgpu/nv/objvgpu.c +++ b/src/nvidia/src/kernel/vgpu/objvgpu.c @@ -157,7 +157,7 @@ vgpuDestructObject vgpuGspTeardownBuffers(pGpu); if (pVGpu != NULL) - teardownSysmemPfnBitMap(pGpu, pVGpu); + teardownSysmemPfnBitMap(pGpu, pVGpu); portMemFree(pVGpu); NvVGPU_Table[gpuGetInstance(pGpu)] = NULL; diff --git a/src/nvidia/kernel/vgpu/nv/rpc.c b/src/nvidia/src/kernel/vgpu/rpc.c similarity index 95% rename from src/nvidia/kernel/vgpu/nv/rpc.c rename to src/nvidia/src/kernel/vgpu/rpc.c index e693cc23ee..b0cdd5f403 100644 --- a/src/nvidia/kernel/vgpu/nv/rpc.c +++ b/src/nvidia/src/kernel/vgpu/rpc.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2008-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2008-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -72,6 +72,8 @@ #include "kernel/gpu/mig_mgr/kernel_mig_manager.h" #include "gpu/bus/kern_bus.h" +#include + #include "class/clc4c0.h" // VOLTA_COMPUTE_B, not known to RMCFG/Classes.pm #include "class/cl85b5sw.h" // GT212_DMA_COPY alloc parameters #include "ctrl/ctrl0000/ctrl0000gpuacct.h" @@ -217,7 +219,7 @@ _allocRpcMemDescSysmem( memdescSetFlag(*ppMemDesc, MEMDESC_FLAGS_KERNEL_MODE, NV_TRUE); - memdescTagAlloc(status, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_104, + memdescTagAlloc(status, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_104, (*ppMemDesc)); NV_ASSERT_OK_OR_GOTO( status, @@ -280,7 +282,7 @@ _allocRpcMemDescFbBar2Virtual( NV_MEMORY_UNCACHED, MEMDESC_FLAGS_NONE)); - memdescTagAlloc(status, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_105, + memdescTagAlloc(status, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_105, (*ppMemDesc)); NV_ASSERT_OK_OR_GOTO( status, @@ -515,6 +517,9 @@ static NV_STATUS _setupGspSharedMemory(OBJGPU *pGpu, OBJVGPU *pVGpu) KernelBus *pKernelBus = GPU_GET_KERNEL_BUS(pGpu); NvU32 memFlags = 0; + if (kbusIsPhysicalBar2InitPagetableEnabled(pKernelBus)) + memFlags = MEMDESC_FLAGS_CPU_ONLY; + if (IsGH100orBetter(pGpu) && (!kbusIsBar2Initialized(pKernelBus))) addressSpace = ADDR_SYSMEM; @@ -871,8 +876,12 @@ NV_STATUS vgpuReinitializeRpcInfraOnStateLoad(OBJGPU *pGpu) static NV_STATUS _setupGspControlBuffer(OBJGPU *pGpu, OBJVGPU *pVGpu) { NV_STATUS status; + KernelBus *pKernelBus = GPU_GET_KERNEL_BUS(pGpu); NvU32 memFlags = 0; + if (kbusIsPhysicalBar2InitPagetableEnabled(pKernelBus)) + memFlags = MEMDESC_FLAGS_CPU_ONLY; + status = _allocRpcMemDesc(pGpu, RM_PAGE_SIZE, NV_MEMORY_CONTIGUOUS, @@ -911,8 +920,12 @@ static void _teardownGspControlBuffer(OBJGPU *pGpu, OBJVGPU *pVGpu) static NV_STATUS _setupGspResponseBuffer(OBJGPU *pGpu, OBJVGPU *pVGpu) { NV_STATUS status; + KernelBus *pKernelBus = GPU_GET_KERNEL_BUS(pGpu); NvU32 memFlags = 0; + if (kbusIsPhysicalBar2InitPagetableEnabled(pKernelBus)) + memFlags = MEMDESC_FLAGS_CPU_ONLY; + status = _allocRpcMemDesc(pGpu, RM_PAGE_SIZE, NV_MEMORY_CONTIGUOUS, @@ -964,6 +977,9 @@ static NV_STATUS _setupGspMessageBuffer(OBJGPU *pGpu, OBJVGPU *pVGpu) KernelBus *pKernelBus = GPU_GET_KERNEL_BUS(pGpu); NvU32 memFlags = 0; + if(kbusIsPhysicalBar2InitPagetableEnabled(pKernelBus)) + memFlags = MEMDESC_FLAGS_CPU_ONLY; + if (IsGH100orBetter(pGpu) && (!kbusIsBar2Initialized(pKernelBus))) addressSpace = ADDR_SYSMEM; @@ -1498,6 +1514,7 @@ NV_STATUS initRpcInfrastructure_VGPU(OBJGPU *pGpu) goto fail; } + if (vgpuSysmemPfnInfo.bSysmemPfnInfoInitialized) { rmStatus = updateSharedBufferInfoInSysmemPfnBitMap(pGpu, pVGpu, NV_TRUE); @@ -2101,6 +2118,7 @@ NV_STATUS _serializeClassParams_v(OBJGPU *pGpu, OBJRPC *pRpc, NvU32 hClass, void { alloc_object_params_v *params = &rpc_message->alloc_object_v.params; NvU32 param_length = 0; + ct_assert(sizeof(alloc_object_params_v) == NV_ALLOC_STRUCTURE_SIZE_v26_00); switch (hClass) { @@ -2249,26 +2267,6 @@ NV_STATUS _serializeClassParams_v(OBJGPU *pGpu, OBJRPC *pRpc, NvU32 hClass, void break; } - case NV01_MEMORY_FLA: - { - NV_FLA_MEMORY_ALLOCATION_PARAMS *pParams = pCreateParms; - - params->param_NV_FLA_MEMORY_ALLOCATION_PARAMS.type = pParams->type; - params->param_NV_FLA_MEMORY_ALLOCATION_PARAMS.flags = pParams->flags; - params->param_NV_FLA_MEMORY_ALLOCATION_PARAMS.attr = pParams->attr; - params->param_NV_FLA_MEMORY_ALLOCATION_PARAMS.attr2 = pParams->attr2; - params->param_NV_FLA_MEMORY_ALLOCATION_PARAMS.base = pParams->base; - params->param_NV_FLA_MEMORY_ALLOCATION_PARAMS.align = pParams->align; - params->param_NV_FLA_MEMORY_ALLOCATION_PARAMS.limit = pParams->limit; - params->param_NV_FLA_MEMORY_ALLOCATION_PARAMS.flagsOs02 = pParams->flagsOs02; - params->param_NV_FLA_MEMORY_ALLOCATION_PARAMS.hExportSubdevice = pParams->hExportSubdevice; - params->param_NV_FLA_MEMORY_ALLOCATION_PARAMS.hExportHandle = pParams->hExportHandle; - params->param_NV_FLA_MEMORY_ALLOCATION_PARAMS.hExportClient = pParams->hExportClient; - - param_length = sizeof(params->param_NV_FLA_MEMORY_ALLOCATION_PARAMS); - break; - } - case AMPERE_SMC_EXEC_PARTITION_REF: { NVC638_ALLOCATION_PARAMETERS *pParams = pCreateParms; @@ -2410,6 +2408,15 @@ NV_STATUS _serializeClassParams_v25_08(OBJGPU *pGpu, OBJRPC *pRpc, NvU32 hClass, return NV_OK; } +NV_STATUS _serializeClassParams_v26_00(OBJGPU *pGpu, OBJRPC *pRpc, NvU32 hClass, void *pCreateParms) +{ + switch (hClass) + { + default: + return _serializeClassParams_v25_08(pGpu, pRpc, hClass, pCreateParms); + } +} + /* Copy params from RPC buffer*/ static NV_STATUS engine_utilization_copy_params_from_rpc_buffer_v09_0C(NvU32 cmd, void *params_in, void *Params) { @@ -2786,6 +2793,8 @@ _rpcFreeBuffersForKGrObj NV_ASSERT_OR_RETURN(pVgpuGfxpBuffers->refCountChannel != 0, NV_ERR_INVALID_STATE); --(pVgpuGfxpBuffers->refCountChannel); + kgrctxSetVgpuGfxpBuffers(pKernelGraphicsContext, pVgpuGfxpBuffers); + } else { @@ -2866,7 +2875,6 @@ static NV_STATUS _rpcFreePrologue(OBJGPU *pGpu, NvHandle hClient, NvHandle hPare categoryClassId = pMemory->categoryClassId; if ((categoryClassId == NV01_MEMORY_LOCAL_USER) || - (categoryClassId == NV01_MEMORY_FLA) || (categoryClassId == NV50_MEMORY_VIRTUAL) || (categoryClassId == NV01_MEMORY_SYSTEM) || (categoryClassId == NV01_MEMORY_SYSTEM_OS_DESCRIPTOR)) @@ -3395,6 +3403,7 @@ _allocateGfxpBuffer exit : if (status != NV_OK) { + portMemFree(pVgpuGfxpBuffers); _freeGfxpBuffer(pGpu, pDevice, hChannel, pKernelGraphicsContext); } } @@ -3435,6 +3444,7 @@ _rpcAllocBuffersForKGrObj (pVgpuGfxpBuffers->bIsBufferAllocated)) { pVgpuGfxpBuffers->refCountChannel++; + kgrctxSetVgpuGfxpBuffers(pKernelGraphicsContext, pVgpuGfxpBuffers); } else { @@ -3638,6 +3648,62 @@ NV_STATUS rpcAllocObject_v25_08(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, Nv return status; } +NV_STATUS rpcAllocObject_v26_00(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, NvHandle hChannel, NvHandle hObject, + NvU32 hClass, void *params) +{ + NV_STATUS status; + NvBool rpcToHost = NV_TRUE; + + status = _rpcAllocObjectPrologue(pGpu, pRpc, hClient, hObject, hClass, &rpcToHost); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, + "Alloc object RPC prologue failed (status: 0x%x) for hObject: 0x%x, " + "hClass: 0x%x, hChannel: 0x%x, hClient: 0x%x\n", status, + hObject, hClass, hChannel, hClient); + return status; + } + + if (rpcToHost == NV_FALSE) + return status; + + status = rpcWriteCommonHeader(pGpu, pRpc, NV_VGPU_MSG_FUNCTION_ALLOC_OBJECT, sizeof(rpc_alloc_object_v26_00)); + if (status != NV_OK) + return status; + + rpc_message->alloc_object_v.hClient = hClient; + rpc_message->alloc_object_v.hParent = hChannel; + rpc_message->alloc_object_v.hObject = hObject; + rpc_message->alloc_object_v.hClass = hClass ; + rpc_message->alloc_object_v.param_len = 0; + + if (params != NULL) + { + status = _serializeClassParams_v26_00(pGpu, pRpc, hClass, params); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, + "RmAllocObjectEx: vGPU: object RPC skipped (handle = 0x%08x, class = " + "0x%x) with non-NULL params ptr\n", hObject, hClass); + + // XXX: No RPC for unsupported classes. This must be taken care of. + // Return failure so that we can identify when this situation arises. + NV_ASSERT_OR_RETURN(0,status); + return status; + } + } + + status = _issueRpcAndWait(pGpu, pRpc); + + // Populate return values! + if ((status == NV_OK) && params) + { + status = _setRmReturnParams_v(pGpu, pRpc, hClass, params); + } + + return status; +} + NV_STATUS rpcMapMemoryDma_v03_00(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, NvHandle hDevice, NvHandle hDma, NvHandle hMemory, NvU64 offset, NvU64 length, NvU32 flags, NvU64 *pDmaOffset) { @@ -3887,10 +3953,8 @@ NV_STATUS rpcDmaControl_v24_05(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, NvH NV_STATUS rpcDmaControl_wrapper(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, NvHandle hObject, NvU32 cmd, void *pParamStructPtr, NvU32 paramSize) { - VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); - if ((pParamStructPtr == NULL && paramSize != 0) || - (pParamStructPtr != NULL && paramSize == 0)) + if (pParamStructPtr == NULL || paramSize == 0) { NV_PRINTF(LEVEL_ERROR, "NVRM_RPC: Bad pParamStructPtr/paramSize \n"); return NV_ERR_INVALID_PARAMETER; @@ -3898,88 +3962,6 @@ NV_STATUS rpcDmaControl_wrapper(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, Nv switch(cmd) { - case NV2080_CTRL_CMD_FB_GET_DYNAMIC_OFFLINED_PAGES: - { - NvU32 i; - NV2080_CTRL_FB_GET_DYNAMIC_OFFLINED_PAGES_PARAMS *pFbDynamicOfflinedPages = NULL; - - pFbDynamicOfflinedPages = (NV2080_CTRL_FB_GET_DYNAMIC_OFFLINED_PAGES_PARAMS *)pParamStructPtr; - - i = pFbDynamicOfflinedPages->baseIndex / NV2080_CTRL_FB_DYNAMIC_BLACKLIST_MAX_ENTRIES; - if (i >= MAX_ITERATIONS_DYNAMIC_BLACKLIST) - { - return NV_ERR_INVALID_ARGUMENT; - } - - pFbDynamicOfflinedPages->validEntries = pVSI->fbDynamicBlacklistedPages[i].validEntries; - if (pFbDynamicOfflinedPages->validEntries > NV2080_CTRL_FB_DYNAMIC_BLACKLIST_MAX_ENTRIES) - { - return NV_ERR_INVALID_ARGUMENT; - } - - portMemCopy(&pFbDynamicOfflinedPages->offlined, - pFbDynamicOfflinedPages->validEntries * sizeof(NV2080_CTRL_FB_DYNAMIC_OFFLINED_ADDRESS_INFO), - &pVSI->fbDynamicBlacklistedPages[i].offlined, - pFbDynamicOfflinedPages->validEntries * sizeof(NV2080_CTRL_FB_DYNAMIC_OFFLINED_ADDRESS_INFO)); - pFbDynamicOfflinedPages->bMore = pVSI->fbDynamicBlacklistedPages[i].bMore; - return NV_OK; - } - - case NV2080_CTRL_CMD_FIFO_GET_DEVICE_INFO_TABLE: - { - NvU32 i; - NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_PARAMS *pFifoDeviceInfoTable = NULL; - - pFifoDeviceInfoTable = (NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_PARAMS *)pParamStructPtr; - - i = pFifoDeviceInfoTable->baseIndex / NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_MAX_ENTRIES; - if (i >= MAX_ITERATIONS_DEVICE_INFO_TABLE) - { - return NV_ERR_INVALID_ARGUMENT; - } - - pFifoDeviceInfoTable->numEntries = pVSI->fifoDeviceInfoTable[i].numEntries; - if (pFifoDeviceInfoTable->numEntries > NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_MAX_ENTRIES) - { - return NV_ERR_INVALID_ARGUMENT; - } - - pFifoDeviceInfoTable->bMore = pVSI->fifoDeviceInfoTable[i].bMore; - - portMemCopy(&pFifoDeviceInfoTable->entries, - pFifoDeviceInfoTable->numEntries * sizeof(NV2080_CTRL_FIFO_DEVICE_ENTRY), - pVSI->fifoDeviceInfoTable[i].entries, - pFifoDeviceInfoTable->numEntries * sizeof(NV2080_CTRL_FIFO_DEVICE_ENTRY)); - return NV_OK; - } - - case NV2080_CTRL_CMD_MC_GET_ENGINE_NOTIFICATION_INTR_VECTORS: - { - NV2080_CTRL_MC_GET_ENGINE_NOTIFICATION_INTR_VECTORS_PARAMS *pMcEngineNotificationIntrVectors = NULL; - pMcEngineNotificationIntrVectors = (NV2080_CTRL_MC_GET_ENGINE_NOTIFICATION_INTR_VECTORS_PARAMS*)pParamStructPtr; - - *pMcEngineNotificationIntrVectors = pVSI->mcEngineNotificationIntrVectors; - return NV_OK; - } - - case NV2080_CTRL_CMD_MC_GET_STATIC_INTR_TABLE: - { - NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS *pMcStaticIntrTable = (NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS*)pParamStructPtr; - - *pMcStaticIntrTable = pVSI->mcStaticIntrTable; - return NV_OK; - } - - case NV2080_CTRL_CMD_GR_GET_ZCULL_INFO: - { - NV2080_CTRL_GR_GET_ZCULL_INFO_PARAMS *pGrZcullInfo = (NV2080_CTRL_GR_GET_ZCULL_INFO_PARAMS *)pParamStructPtr; - - *pGrZcullInfo = pVSI->grZcullInfo; - return NV_OK; - } - - case NV0080_CTRL_CMD_FIFO_IDLE_CHANNELS: - return NV_ERR_NOT_SUPPORTED; case NVA080_CTRL_CMD_SET_FB_USAGE: return rpcCtrlSetVgpuFbUsage_HAL(pGpu, pRpc, pParamStructPtr); @@ -4036,65 +4018,6 @@ NV_STATUS rpcDmaControl_wrapper(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, Nv case NV2080_CTRL_CMD_GPU_PROMOTE_CTX: return rpcCtrlGpuPromoteCtx_HAL(pGpu, pRpc, hClient, hObject, pParamStructPtr); - case NV2080_CTRL_CMD_FB_GET_LTC_INFO_FOR_FBP: - { - NV2080_CTRL_FB_GET_LTC_INFO_FOR_FBP_PARAMS *pFbLtcInfoForFbp = (NV2080_CTRL_FB_GET_LTC_INFO_FOR_FBP_PARAMS *)pParamStructPtr; - - if (pFbLtcInfoForFbp->fbpIndex >= MAX_FBPS) - { - return NV_ERR_INVALID_ARGUMENT; - } - - pFbLtcInfoForFbp->ltcCount = pVSI->fbLtcInfoForFbp[pFbLtcInfoForFbp->fbpIndex].ltcCount; - pFbLtcInfoForFbp->ltcMask = pVSI->fbLtcInfoForFbp[pFbLtcInfoForFbp->fbpIndex].ltcMask; - - return NV_OK; - } - - case NV2080_CTRL_CMD_CE_GET_CAPS_V2: - { - NV2080_CTRL_CE_GET_CAPS_V2_PARAMS *pCeCaps = (NV2080_CTRL_CE_GET_CAPS_V2_PARAMS *)pParamStructPtr; - NvU32 i; - NvU32 ceNumber; - - // If engine disabled, return error and not empty caps. - if ((pVSI->engineList & NVBIT64(pCeCaps->ceEngineType)) == 0) - { - portMemSet(&pCeCaps->capsTbl, 0, NV2080_CTRL_CE_CAPS_TBL_SIZE); - return NV_ERR_NOT_SUPPORTED; - } - - ceNumber = NV2080_ENGINE_TYPE_COPY_IDX(pCeCaps->ceEngineType); - - if (ceNumber >= NV2080_ENGINE_TYPE_COPY_SIZE) - { - return NV_ERR_INVALID_ARGUMENT; - } - - for (i = 0; i < NV2080_ENGINE_TYPE_COPY_SIZE; i++) - { - if (pCeCaps->ceEngineType == pVSI->ceCaps[i].ceEngineType) - { - portMemCopy(&pCeCaps->capsTbl, NV2080_CTRL_CE_CAPS_TBL_SIZE, - &pVSI->ceCaps[i].capsTbl, NV2080_CTRL_CE_CAPS_TBL_SIZE); - - return NV_OK; - } - } - - return NV_ERR_NOT_SUPPORTED; - } - - case NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS: - { - NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS *pNvLinkCaps = (NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS *)pParamStructPtr; - - portMemCopy(pNvLinkCaps, sizeof(pVSI->nvlinkCaps), - &pVSI->nvlinkCaps, sizeof(pVSI->nvlinkCaps)); - - return NV_OK; - } - case NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND: return rpcCtrlGrCtxswPreemptionBind_HAL(pGpu, pRpc, hClient, hObject, pParamStructPtr); @@ -4122,9 +4045,6 @@ NV_STATUS rpcDmaControl_wrapper(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, Nv case NV9096_CTRL_CMD_GET_ZBC_CLEAR_TABLE_ENTRY: return rpcCtrlGetZbcClearTableEntry_HAL(pGpu, pRpc, hClient, hObject, pParamStructPtr); - case NV2080_CTRL_CMD_BUS_GET_NVLINK_PEER_ID_MASK: - return rpcCtrlGetNvlinkPeerIdMask_HAL(pGpu, pRpc, hClient, hObject, pParamStructPtr); - case NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS: return rpcCtrlGetNvlinkStatus_HAL(pGpu, pRpc, hClient, hObject, pParamStructPtr); @@ -4204,22 +4124,6 @@ NV_STATUS rpcDmaControl_wrapper(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, Nv case NV2080_CTRL_CMD_TIMER_SET_GR_TICK_FREQ: return rpcCtrlTimerSetGrTickFreq_HAL(pGpu, pRpc, hClient, hObject, pParamStructPtr); - case NV2080_CTRL_CMD_GR_GET_SM_ISSUE_RATE_MODIFIER: - { - NV2080_CTRL_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS *pParams = pParamStructPtr; - - pParams->imla0 = pVSI->grSmIssueRateModifier.imla0; - pParams->fmla16 = pVSI->grSmIssueRateModifier.fmla16; - pParams->dp = pVSI->grSmIssueRateModifier.dp; - pParams->fmla32 = pVSI->grSmIssueRateModifier.fmla32; - pParams->ffma = pVSI->grSmIssueRateModifier.ffma; - pParams->imla1 = pVSI->grSmIssueRateModifier.imla1; - pParams->imla2 = pVSI->grSmIssueRateModifier.imla2; - pParams->imla3 = pVSI->grSmIssueRateModifier.imla3; - pParams->imla4 = pVSI->grSmIssueRateModifier.imla4; - return NV_OK; - } - case NV2080_CTRL_CMD_FIFO_SETUP_VF_ZOMBIE_SUBCTX_PDB: return rpcCtrlFifoSetupVfZombieSubctxPdb_HAL(pGpu, pRpc, hClient, hObject, pParamStructPtr); @@ -4235,44 +4139,6 @@ NV_STATUS rpcDmaControl_wrapper(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, Nv case NVB0CC_CTRL_CMD_INTERNAL_QUIESCE_PMA_CHANNEL: return rpcCtrlInternalQuiescePmaChannel_HAL(pGpu, pRpc, hClient, hObject, pParamStructPtr); - case NV2080_CTRL_CMD_BUS_GET_INFO_V2: - { - NV2080_CTRL_BUS_GET_INFO_V2_PARAMS *pParams = pParamStructPtr; - NvU32 i; - - if (pParams->busInfoListSize > NV2080_CTRL_BUS_INFO_MAX_LIST_SIZE_v1C_09) - { - return NV_ERR_INVALID_ARGUMENT; - } - - for (i = 0; i < pParams->busInfoListSize; i++) - { - pParams->busInfoList[i].data = pVSI->busGetInfoV2.busInfoList[pParams->busInfoList[i].index].data; - } - - return NV_OK; - } - - case NV0080_CTRL_CMD_FIFO_GET_LATENCY_BUFFER_SIZE: - { - NV0080_CTRL_FIFO_GET_LATENCY_BUFFER_SIZE_PARAMS *pFifoLatecyBufferSize = (NV0080_CTRL_FIFO_GET_LATENCY_BUFFER_SIZE_PARAMS *)pParamStructPtr; - NvU32 i; - - for (i = 0; i < NV2080_ENGINE_TYPE_LAST_v1C_09; i++) - { - if (pFifoLatecyBufferSize->engineID == pVSI->fifoLatencyBufferSize[i].engineID) - { - pFifoLatecyBufferSize->gpEntries = pVSI->fifoLatencyBufferSize[i].gpEntries; - pFifoLatecyBufferSize->pbEntries = pVSI->fifoLatencyBufferSize[i].pbEntries; - break; - } - } - - NV_ASSERT_OR_RETURN(i < NV2080_ENGINE_TYPE_LAST_v1C_09, NV_ERR_INVALID_ARGUMENT); - - return NV_OK; - } - case NVB0CC_CTRL_CMD_INTERNAL_SRIOV_PROMOTE_PMA_STREAM: return rpcCtrlInternalSriovPromotePmaStream_HAL(pGpu, pRpc, hClient, hObject, pParamStructPtr); @@ -4291,20 +4157,6 @@ NV_STATUS rpcDmaControl_wrapper(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, Nv case NV2080_CTRL_CMD_INTERNAL_MEMSYS_SET_ZBC_REFERENCED: return rpcCtrlInternalMemsysSetZbcReferenced_HAL(pGpu, pRpc, hClient, hObject, pParamStructPtr); - case NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS: - { - VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); - NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS *pParams = NULL; - - pParams = (NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS *)pParamStructPtr; - - for (NvU32 i = 0; i < NV2080_CTRL_PCIE_SUPPORTED_GPU_ATOMICS_OP_TYPE_COUNT_v1F_08; i++) { - pParams->atomicOp[i].bSupported = pVSI->pcieSupportedGpuAtomics.atomicOp[i].bSupported; - pParams->atomicOp[i].attributes = pVSI->pcieSupportedGpuAtomics.atomicOp[i].attributes; - } - return NV_OK; - } - case NVC637_CTRL_CMD_EXEC_PARTITIONS_DELETE: return rpcCtrlExecPartitionsDelete_HAL(pGpu, pRpc, hClient, hObject, pParamStructPtr); @@ -4359,60 +4211,13 @@ NV_STATUS rpcDmaControl_wrapper(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, Nv case NV0080_CTRL_CMD_GPU_GET_BRAND_CAPS: return rpcGetBrandCaps_HAL(pGpu, pRpc, hClient, hObject, cmd, pParamStructPtr, paramSize); - case NV2080_CTRL_CMD_CE_GET_ALL_CAPS: - { - VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); - NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS *pParams = NULL; - - pParams = (NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS *)pParamStructPtr; - - pParams->present = pVSI->ceGetAllCaps.present; - - for (NvU32 i = 0; i < NV2080_CTRL_MAX_PCES_v21_0A; i++) { - portMemCopy(pParams->capsTbl[i], (sizeof(NvU8) * NV2080_CTRL_CE_CAPS_TBL_SIZE_v21_0A), - pVSI->ceGetAllCaps.capsTbl[i], (sizeof(NvU8) * NV2080_CTRL_CE_CAPS_TBL_SIZE_v21_0A)); - } - return NV_OK; - } - case NVB0CC_CTRL_CMD_RESERVE_PM_AREA_PC_SAMPLER: case NVB0CC_CTRL_CMD_RELEASE_PM_AREA_PC_SAMPLER: return rpcCtrlPmAreaPcSampler_HAL(pGpu, pRpc, hClient, hObject, cmd, pParamStructPtr); - case NV2080_CTRL_CMD_BUS_GET_C2C_INFO: - { - VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); - NV2080_CTRL_CMD_BUS_GET_C2C_INFO_PARAMS *pParams = NULL; - - pParams = (NV2080_CTRL_CMD_BUS_GET_C2C_INFO_PARAMS *)pParamStructPtr; - - pParams->bIsLinkUp = pVSI->c2cInfo.bIsLinkUp; - pParams->nrLinks = pVSI->c2cInfo.nrLinks; - pParams->linkMask = pVSI->c2cInfo.linkMask; - pParams->perLinkBwMBps = pVSI->c2cInfo.perLinkBwMBps; - pParams->remoteType = pVSI->c2cInfo.remoteType; - - return NV_OK; - } - case NV2080_CTRL_CMD_GPU_QUERY_ECC_STATUS: return rpcCtrlGpuQueryEccStatus_HAL(pGpu, pRpc, hClient, hObject, pParamStructPtr); - case NV2080_CTRL_CMD_GPU_RESET_ECC_ERROR_STATUS: - { - VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); - NvU32 i; - for (i = 0; i < NV2080_CTRL_GPU_ECC_UNIT_COUNT_v24_06; i++) - { - if (pVSI->eccStatus.units[i].supported) - { - pVSI->eccStatus.units[i].sbe.count = 0; - pVSI->eccStatus.units[i].dbe.count = 0; - } - } - return NV_OK; - } - case NVC637_CTRL_CMD_EXEC_PARTITIONS_CREATE: return rpcCtrlExecPartitionsCreate_HAL(pGpu, pRpc, hClient, hObject, pParamStructPtr); @@ -4422,50 +4227,8 @@ NV_STATUS rpcDmaControl_wrapper(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, Nv case NV2080_CTRL_CMD_INTERNAL_GPU_START_FABRIC_PROBE: return rpcCtrlCmdInternalGpuStartFabricProbe_HAL(pGpu, pRpc, pParamStructPtr); - case NVA06F_CTRL_CMD_BIND : - { - return NV_OK; - } - - case NV0080_CTRL_CMD_FIFO_GET_ENGINE_CONTEXT_PROPERTIES: - { - NV_STATUS status = NV_ERR_NOT_SUPPORTED; - - if (gpuIsClientRmAllocatedCtxBufferEnabled(pGpu)) - { - NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *pParams =(NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *)pParamStructPtr; - NvU32 size = 0; - NvU32 alignment = RM_PAGE_SIZE; - NvU32 engine; - - pParams->size = 0; - pParams->alignment = 0; - - engine = DRF_VAL(0080_CTRL_FIFO, _GET_ENGINE_CONTEXT_PROPERTIES, _ENGINE_ID, - pParams->engineId); - - switch(engine) - { - case NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID_GRAPHICS: - case NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID_GRAPHICS_ZCULL: - case NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID_GRAPHICS_PREEMPT: - case NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID_GRAPHICS_SPILL: - case NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID_GRAPHICS_PAGEPOOL: - case NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID_GRAPHICS_BETACB: - case NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID_GRAPHICS_RTV: - pParams->size = NV_MAX(pVSI->ctxBuffInfo.engineContextBuffersInfo[0].engine[engine].size, size); - pParams->alignment = NV_MAX(pVSI->ctxBuffInfo.engineContextBuffersInfo[0].engine[engine].alignment, alignment); - status = NV_OK; - break; - - default: - status = NV_ERR_NOT_SUPPORTED; - } - return status; - } - - return status; - } + case NV2080_CTRL_CMD_NVLINK_INBAND_SEND_DATA: + return rpcCtrlCmdNvlinkInbandSendData_HAL(pGpu, pRpc, pParamStructPtr); default: { @@ -4564,6 +4327,39 @@ NV_STATUS rpcCtrlFbGetFsInfo_v24_00(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient return status; } +NV_STATUS rpcCtrlFbGetFsInfo_v26_04(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, NvHandle hObject, void *pParamStructPtr) +{ + NV_STATUS status = NV_OK; + NV2080_CTRL_FB_GET_FS_INFO_PARAMS *pParams = (NV2080_CTRL_FB_GET_FS_INFO_PARAMS *)pParamStructPtr; + rpc_ctrl_fb_get_fs_info_v26_04 *rpc_buffer_params = &rpc_message->ctrl_fb_get_fs_info_v26_04; + + status = rpcWriteCommonHeader(pGpu, pRpc, NV_VGPU_MSG_FUNCTION_CTRL_FB_GET_FS_INFO, + sizeof(rpc_ctrl_fb_get_fs_info_v24_00)); + if (status != NV_OK) + return status; + + ct_assert(NV2080_CTRL_FB_FS_INFO_MAX_QUERIES_v24_00 == NV2080_CTRL_FB_FS_INFO_MAX_QUERIES); + ct_assert(NV2080_CTRL_FB_FS_INFO_MAX_QUERY_SIZE_v1A_1D == NV2080_CTRL_FB_FS_INFO_MAX_QUERY_SIZE); + + rpc_buffer_params->hClient = hClient; + rpc_buffer_params->hObject = hObject; + + status = serialize_NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v26_04(pParams, (NvU8 *)&(rpc_buffer_params->params), 0, NULL); + if (status != NV_OK) + return status; + + status = _issueRpcAndWait(pGpu, pRpc); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, + "Get FB FS Info RPC failed with error 0x%x\n", status); + return status; + } + + status = deserialize_NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v26_04(pParams, (NvU8 *)&(rpc_buffer_params->params), 0, NULL); + return status; +} + NV_STATUS rpcCtrlGrmgrGetGrFsInfo_v1A_1D(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, NvHandle hObject, void *pParamStructPtr) { NV_STATUS status = NV_OK; @@ -6721,13 +6517,13 @@ NV_STATUS rpcCtrlMasterGetVirtualFunctionErrorContIntrMask_v1F_0D rpc_ctrl_master_get_virtual_function_error_cont_intr_mask_v1F_0D *rpc_params = &rpc_message->ctrl_master_get_virtual_function_error_cont_intr_mask_v1F_0D; - if ((IS_VIRTUAL_WITH_SRIOV(pGpu)) && (!IS_MIG_IN_USE(pGpu))) - { + if ((IS_VIRTUAL_WITH_SRIOV(pGpu)) && (!IS_MIG_IN_USE(pGpu))) + { VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); pParams->eccMask = pVSI->masterGetVfErrCntIntMsk.eccMask; pParams->nvlinkMask = pVSI->masterGetVfErrCntIntMsk.nvlinkMask; status = NV_OK; - return status; + return status; } status = rpcWriteCommonHeader(pGpu, @@ -7056,34 +6852,6 @@ NV_STATUS rpcCtrlGetZbcClearTableEntry_v1A_0E(OBJGPU *pGpu, OBJRPC *pRpc, NvHand return status; } -NV_STATUS rpcCtrlGetNvlinkPeerIdMask_v1A_0E(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, NvHandle hObject, void *pParamStructPtr) -{ - NV_STATUS status; - NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS *pParams = (NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS *)pParamStructPtr; - rpc_ctrl_get_nvlink_peer_id_mask_v1A_0E *rpc_params = &rpc_message->ctrl_get_nvlink_peer_id_mask_v1A_0E; - - status = rpcWriteCommonHeader(pGpu, - pRpc, - NV_VGPU_MSG_FUNCTION_CTRL_GET_NVLINK_PEER_ID_MASK, - sizeof(rpc_ctrl_get_nvlink_peer_id_mask_v1A_0E)); - if (status != NV_OK) - return status; - - rpc_params->hClient = hClient; - rpc_params->hObject = hObject; - - status = serialize_NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS_v14_00(pParams, (NvU8 *) &rpc_params->ctrlParams, 0, NULL); - if (status != NV_OK) - return status; - - status = _issueRpcAndWait(pGpu, pRpc); - if (status != NV_OK) - return status; - - status = deserialize_NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS_v14_00(pParams, (NvU8 *) &rpc_params->ctrlParams, 0, NULL); - return status; -} - NV_STATUS rpcCtrlGetNvlinkStatus_v23_04(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, NvHandle hObject, void *pParamStructPtr) { NV_STATUS status; @@ -7373,6 +7141,11 @@ NV_STATUS rpcCtrlGpuQueryEccStatus_v24_06(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle h return NV_ERR_NOT_SUPPORTED; } +NV_STATUS rpcCtrlGpuQueryEccStatus_v26_02(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, NvHandle hObject, void *pParamStructPtr) +{ + return NV_ERR_NOT_SUPPORTED; +} + NV_STATUS rpcCtrlDbgGetModeMmuDebug_v25_04(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, NvHandle hObject, void *pParamStructPtr) { NV_STATUS status; @@ -7656,11 +7429,11 @@ NV_STATUS RmRpcPerfGetCurrentPstate(OBJGPU *pGpu, } NV_STATUS rpcPerfGetLevelInfo_v03_00(OBJGPU *pGpu, - OBJRPC *pRpc, - NvHandle hClient, - NvHandle hObject, - NV2080_CTRL_PERF_GET_LEVEL_INFO_PARAMS *pParams, - NV2080_CTRL_PERF_GET_CLK_INFO *pPerfClkInfos) + OBJRPC *pRpc, + NvHandle hClient, + NvHandle hObject, + NV2080_CTRL_PERF_GET_LEVEL_INFO_PARAMS *pParams, + NV2080_CTRL_PERF_GET_CLK_INFO *pPerfClkInfos) { NV_STATUS status = NV_OK; NvU32 i, message_buffer_remaining, paramSize; @@ -8840,9 +8613,15 @@ NV_STATUS rpcGspSetSystemInfo_v17_00 rpcInfo->gpuPhysAddr = pGpu->busInfo.gpuPhysAddr; rpcInfo->gpuPhysFbAddr = pGpu->busInfo.gpuPhysFbAddr; rpcInfo->gpuPhysInstAddr = pGpu->busInfo.gpuPhysInstAddr; + rpcInfo->gpuPhysIoAddr = pGpu->busInfo.gpuPhysIoAddr; rpcInfo->nvDomainBusDeviceFunc = pGpu->busInfo.nvDomainBusDeviceFunc; rpcInfo->oorArch = (NvU8)pGpu->busInfo.oorArch; + // Cache GPU SSID info + rpcInfo->PCIDeviceID = pGpu->idInfo.PCIDeviceID; + rpcInfo->PCISubDeviceID = pGpu->idInfo.PCISubDeviceID; + rpcInfo->PCIRevisionID = pGpu->idInfo.PCIRevisionID; + KernelBif *pKernelBif = GPU_GET_KERNEL_BIF(pGpu); if (pKernelBif != NULL) { @@ -8914,11 +8693,13 @@ NV_STATUS rpcGspSetSystemInfo_v17_00 OBJTMR *pTmr = GPU_GET_TIMER(pGpu); rpcInfo->sysTimerOffsetNs = pTmr->sysTimerOffsetNs; + rpcInfo->bIsPrimary = pGpu->getProperty(pGpu, PDB_PROP_GPU_PRIMARY_DEVICE); + #if defined(NV_UNIX) && !RMCFG_FEATURE_MODS_FEATURES rpcInfo->isGridBuild = os_is_grid_supported(); #endif rpcInfo->gridBuildCsp = osGetGridCspSupport(); - + rpcInfo->bPreserveVideoMemoryAllocations = GPU_GET_KERNEL_MEMORY_SYSTEM(pGpu)->bPreserveComptagBackingStoreOnSuspend; status = _issueRpcAsync(pGpu, pRpc); } @@ -9296,15 +9077,10 @@ NV_STATUS rpcRmApiControl_GSP if (resCtrlFlags & NVOS54_FLAGS_FINN_SERIALIZED) { - // - // If it was preserialized, copy it to call context for deserialization by caller - // Otherwise deserialize it because it was serialized here - // - if (bPreSerialized) - { - portMemCopy(pCallContext->pSerializedParams, pCallContext->serializedSize, rpc_params->params, rpc_params->paramsSize); - } - else + // Copy params to call context, and deserialize here if it was not already serialized + portMemCopy(pCallContext->pSerializedParams, pCallContext->serializedSize, rpc_params->params, rpc_params->paramsSize); + + if (!bPreSerialized) { status = serverDeserializeCtrlUp(pCallContext, cmd, &pParamStructPtr, ¶msSize, &resCtrlFlags); if (status != NV_OK) @@ -9348,11 +9124,8 @@ NV_STATUS rpcRmApiControl_GSP // Free the local copy we might have allocated above portMemFree(large_message_copy); - // // Free data structures if we serialized/deserialized here - // Also check for serialized flag here as we may be called directly from within another control call - // - if ((resCtrlFlags & NVOS54_FLAGS_FINN_SERIALIZED) && !bPreSerialized) + if (!bPreSerialized || (pCallContext == &newContext)) { serverFreeSerializeStructures(pCallContext, pOriginalParams); } @@ -9645,8 +9418,8 @@ NV_STATUS rpcCtrlNvlinkGetInbandReceivedData_v25_0C rpc_data_size += sizeof(nvlink_inband_gpu_probe_rsp_msg_t); break; case NVLINK_INBAND_MSG_TYPE_MC_TEAM_SETUP_RSP: - // TODO: add support for this message type - return NV_ERR_NOT_SUPPORTED; + rpc_data_size += sizeof(nvlink_inband_mc_team_setup_rsp_msg_t); + break; default: return NV_ERR_NOT_SUPPORTED; } @@ -9673,3 +9446,29 @@ NV_STATUS rpcCtrlNvlinkGetInbandReceivedData_v25_0C return status; } + +NV_STATUS rpcCtrlCmdNvlinkInbandSendData_v26_05 +( + OBJGPU *pGpu, + OBJRPC *pRpc, + NV2080_CTRL_NVLINK_INBAND_SEND_DATA_PARAMS *pParams +) +{ + NV_STATUS status = NV_ERR_NOT_SUPPORTED; + + rpc_ctrl_cmd_nvlink_inband_send_data_v26_05* rpc_params = &rpc_message->ctrl_cmd_nvlink_inband_send_data_v26_05; + + NvU32 rpc_data_size = sizeof(*rpc_params); + + status = rpcWriteCommonHeader(pGpu, pRpc, NV_VGPU_MSG_FUNCTION_CTRL_CMD_NVLINK_INBAND_SEND_DATA, rpc_data_size); + + if (status != NV_OK) + return status; + + rpc_params->dataSize = pParams->dataSize; + portMemCopy(rpc_params->buffer, rpc_params->dataSize, pParams->buffer, pParams->dataSize); + status = _issueRpcAndWait(pGpu, pRpc); + + return status; +} + diff --git a/src/nvidia/kernel/vgpu/nv/rpcstructurecopy.c b/src/nvidia/src/kernel/vgpu/rpcstructurecopy.c similarity index 95% rename from src/nvidia/kernel/vgpu/nv/rpcstructurecopy.c rename to src/nvidia/src/kernel/vgpu/rpcstructurecopy.c index b7620400a9..a8f0bbeef3 100644 --- a/src/nvidia/kernel/vgpu/nv/rpcstructurecopy.c +++ b/src/nvidia/src/kernel/vgpu/rpcstructurecopy.c @@ -1257,6 +1257,74 @@ NV_STATUS deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v24_06(NV2080_CTRL return NVOS_STATUS_SUCCESS; } +NV_STATUS deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v26_02(NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS *eccStatusParams, NvU8 *buffer, NvU32 bufferSize, NvU32 *offset) +{ + if (!offset) + { + return NVOS_STATUS_ERROR_INVALID_ARGUMENT; + } + + // If eccStatusParams and buffer are valid, then copy data and return the offset + if (eccStatusParams && buffer) + { + NvU32 i; + NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v26_02 *eccStatusParams_v26_02 = NULL; + + if ((bufferSize < *offset) || + (bufferSize < (*offset + sizeof(NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v26_02)))) + return NV_ERR_BUFFER_TOO_SMALL; + + eccStatusParams_v26_02 = (void*)(buffer + *offset); + + eccStatusParams->bFatalPoisonError = eccStatusParams_v26_02->bFatalPoisonError; + + for (i = 0; i < NV2080_CTRL_GPU_ECC_UNIT_COUNT_v26_02; i++) { + eccStatusParams->units[i].enabled = eccStatusParams_v26_02->units[i].enabled; + eccStatusParams->units[i].scrubComplete = eccStatusParams_v26_02->units[i].scrubComplete; + eccStatusParams->units[i].supported = eccStatusParams_v26_02->units[i].supported; + eccStatusParams->units[i].dbe.count = eccStatusParams_v26_02->units[i].dbe.count; + eccStatusParams->units[i].dbeNonResettable.count = eccStatusParams_v26_02->units[i].dbeNonResettable.count; + eccStatusParams->units[i].sbe.count = eccStatusParams_v26_02->units[i].sbe.count; + eccStatusParams->units[i].sbeNonResettable.count = eccStatusParams_v26_02->units[i].sbeNonResettable.count; + } + } + *offset += sizeof(NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v26_02); + + return NVOS_STATUS_SUCCESS; +} + +NV_STATUS deserialize_GPU_EXEC_SYSPIPE_INFO_v26_01(GPU_EXEC_SYSPIPE_INFO *execSyspipeInfo, NvU8 *buffer, NvU32 bufferSize, NvU32 *offset) +{ + if (!offset) + { + return NVOS_STATUS_ERROR_INVALID_ARGUMENT; + } + + // If execSyspipeInfo and buffer are valid, then copy data and return the offset + if (execSyspipeInfo && buffer) + { + NvU32 i; + GPU_EXEC_SYSPIPE_INFO_v26_01 *execSyspipeInfo_v26_01 = NULL; + + if ((bufferSize < *offset) || + (bufferSize < (*offset + sizeof(GPU_EXEC_SYSPIPE_INFO_v26_01)))) + return NV_ERR_BUFFER_TOO_SMALL; + + execSyspipeInfo_v26_01 = (void*)(buffer + *offset); + + execSyspipeInfo->execPartCount = execSyspipeInfo_v26_01->execPartCount; + + for (i = 0; i < execSyspipeInfo_v26_01->execPartCount; i++) + { + execSyspipeInfo->execPartId[i] = execSyspipeInfo_v26_01->execPartId[i]; + execSyspipeInfo->syspipeId[i] = execSyspipeInfo_v26_01->syspipeId[i]; + } + } + *offset += sizeof(GPU_EXEC_SYSPIPE_INFO_v26_01); + + return NVOS_STATUS_SUCCESS; +} + NV_STATUS deserialize_NV2080_CTRL_GR_GET_ZCULL_INFO_PARAMS_v12_01(NV2080_CTRL_GR_GET_ZCULL_INFO_PARAMS *grZcullInfo, NvU8 *buffer, NvU32 bufferSize, NvU32 *offset) { if (!offset) @@ -1324,6 +1392,38 @@ NV_STATUS deserialize_VGPU_STATIC_PROPERTIES_v1B_01(VGPU_STATIC_PROPERTIES *vgpu return NVOS_STATUS_SUCCESS; } +NV_STATUS deserialize_VGPU_STATIC_PROPERTIES_v26_03(VGPU_STATIC_PROPERTIES *vgpuStaticProperties, NvU8 *buffer, NvU32 bufferSize, NvU32 *offset) +{ + if (!offset) + { + return NVOS_STATUS_ERROR_INVALID_ARGUMENT; + } + + // If vgpuStaticProperties and buffer are valid, then copy data and return the offset + if (vgpuStaticProperties && buffer) + { + VGPU_STATIC_PROPERTIES_v26_03 *vgpu_static_properties_v26_03 = NULL; + + if ((bufferSize < *offset) || + (bufferSize < (*offset + sizeof(VGPU_STATIC_PROPERTIES_v26_03)))) + return NV_ERR_BUFFER_TOO_SMALL; + + vgpu_static_properties_v26_03 = (void*)(buffer + *offset); + + // encSessionStatsReportingState + vgpuStaticProperties->encSessionStatsReportingState = vgpu_static_properties_v26_03->encSessionStatsReportingState; + vgpuStaticProperties->bProfilingTracingEnabled = vgpu_static_properties_v26_03->bProfilingTracingEnabled; + vgpuStaticProperties->bDebuggingEnabled = vgpu_static_properties_v26_03->bDebuggingEnabled; + vgpuStaticProperties->channelCount = vgpu_static_properties_v26_03->channelCount; + vgpuStaticProperties->bPblObjNotPresent = vgpu_static_properties_v26_03->bPblObjNotPresent; + vgpuStaticProperties->vmmuSegmentSize = vgpu_static_properties_v26_03->vmmuSegmentSize; + } + + *offset += sizeof(VGPU_STATIC_PROPERTIES_v26_03); + + return NVOS_STATUS_SUCCESS; +} + NV_STATUS deserialize_VGPU_BSP_GET_CAPS_v25_00(VGPU_BSP_GET_CAPS *vgpuBspCaps, NvU8 *buffer, NvU32 bufferSize, NvU32 *offset) { if (!offset) diff --git a/src/nvidia/kernel/vgpu/nv/vgpu_events.c b/src/nvidia/src/kernel/vgpu/vgpu_events.c similarity index 96% rename from src/nvidia/kernel/vgpu/nv/vgpu_events.c rename to src/nvidia/src/kernel/vgpu/vgpu_events.c index 118d28d1df..7f0d5f6d15 100644 --- a/src/nvidia/kernel/vgpu/nv/vgpu_events.c +++ b/src/nvidia/src/kernel/vgpu/vgpu_events.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2008-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2008-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -96,6 +96,9 @@ NV_STATUS _setupGspEventInfrastructure(OBJGPU *pGpu, OBJVGPU *pVGpu) NvU32 memFlags = 0; KernelBus *pKernelBus = GPU_GET_KERNEL_BUS(pGpu); + if (kbusIsPhysicalBar2InitPagetableEnabled(pKernelBus)) + memFlags = MEMDESC_FLAGS_CPU_ONLY; + if (IsGH100orBetter(pGpu) && (!kbusIsBar2Initialized(pKernelBus))) addressSpace = ADDR_SYSMEM; @@ -382,10 +385,16 @@ void vgpuServiceEventInbandResponse(OBJGPU *pGpu, OBJVGPU *pVGpu) } if (FLD_TEST_DRF(_VGPU_SHARED_MEMORY_POINTER, _NVLINK_INBAND_RESPONSE, _MC_SETUP, _PENDING, inband_resp_state)) { - /*TODO: add multicast support here.*/ - break; + status = rpcCtrlNvlinkGetInbandReceivedData_HAL(pGpu, pRpc, pData, + NVLINK_INBAND_MSG_TYPE_MC_TEAM_SETUP_RSP, &more); + if (status != NV_OK) + goto cleanup; + + status = knvlinkInbandMsgCallbackDispatcher(pGpu, GPU_GET_KERNEL_NVLINK(pGpu), + sizeof(*pData), (void*)pData); + if (status != NV_OK) + goto cleanup; } - break; } cleanup: if (pData != NULL) diff --git a/src/nvidia/kernel/vgpu/nv/vgpu_util.c b/src/nvidia/src/kernel/vgpu/vgpu_util.c similarity index 100% rename from src/nvidia/kernel/vgpu/nv/vgpu_util.c rename to src/nvidia/src/kernel/vgpu/vgpu_util.c diff --git a/src/nvidia/kernel/vgpu/nv/vgpuapi.c b/src/nvidia/src/kernel/vgpu/vgpuapi.c similarity index 98% rename from src/nvidia/kernel/vgpu/nv/vgpuapi.c rename to src/nvidia/src/kernel/vgpu/vgpuapi.c index 615e5f6475..75fbf4d3ee 100644 --- a/src/nvidia/kernel/vgpu/nv/vgpuapi.c +++ b/src/nvidia/src/kernel/vgpu/vgpuapi.c @@ -24,7 +24,7 @@ #include "core/core.h" #include "os/os.h" -#include "vgpuapi.h" +#include "vgpu/vgpuapi.h" #include "gpu/gpu.h" NV_STATUS diff --git a/src/nvidia/kernel/vgpu/nv/vgpuctrl.c b/src/nvidia/src/kernel/vgpu/vgpuctrl.c similarity index 99% rename from src/nvidia/kernel/vgpu/nv/vgpuctrl.c rename to src/nvidia/src/kernel/vgpu/vgpuctrl.c index caef4798ed..cd8d6663e0 100644 --- a/src/nvidia/kernel/vgpu/nv/vgpuctrl.c +++ b/src/nvidia/src/kernel/vgpu/vgpuctrl.c @@ -30,7 +30,7 @@ #include "gpu/mem_mgr/mem_mgr.h" #include "vgpu/vgpu_events.h" -#include "vgpuapi.h" +#include "vgpu/vgpuapi.h" NV_STATUS vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties_IMPL diff --git a/src/nvidia/src/kernel/virtualization/kernel_hostvgpudeviceapi.c b/src/nvidia/src/kernel/virtualization/kernel_hostvgpudeviceapi.c index ad8a819059..31770f5e9d 100644 --- a/src/nvidia/src/kernel/virtualization/kernel_hostvgpudeviceapi.c +++ b/src/nvidia/src/kernel/virtualization/kernel_hostvgpudeviceapi.c @@ -115,6 +115,7 @@ kernelhostvgpudeviceapiConstruct_IMPL pAllocParams->vgpuDeviceInstanceId, pAllocParams->bDisableDefaultSmcExecPartRestore, pAllocParams->placementId, + pAllocParams->vgpuDevName, &pKernelHostVgpuDevice); if (status != NV_OK) { @@ -371,9 +372,8 @@ kernelhostvgpudeviceapiCopyConstruct_IMPL void destroyKernelHostVgpuDeviceShare(OBJGPU *pGpu, KernelHostVgpuDeviceShr* pShare) { - NV_CHECK_OR_RETURN_VOID(LEVEL_NOTICE, pShare != NULL); - + KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice = pShare->pDevice; RsShared *pShared = staticCast(pShare, RsShared); NvS32 refCount; diff --git a/src/nvidia/src/kernel/virtualization/kernel_vgpu_mgr.c b/src/nvidia/src/kernel/virtualization/kernel_vgpu_mgr.c index 26ff6e7f65..5e141ccb87 100644 --- a/src/nvidia/src/kernel/virtualization/kernel_vgpu_mgr.c +++ b/src/nvidia/src/kernel/virtualization/kernel_vgpu_mgr.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2012-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2012-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -40,6 +40,7 @@ #include "gpu/mem_mgr/heap.h" #include "kernel/gpu/mig_mgr/kernel_mig_manager.h" #include "nvdevid.h" +#include "nvmisc.h" #define __VGPU_ALIAS_PGPU_LIST__ #include "g_vgpu_resman_specific.h" // _get_chip_id_for_alias_pgpu @@ -621,6 +622,7 @@ kvgpumgrDetachGpu(NvU32 gpuPciId) OBJSYS *pSys = SYS_GET_INSTANCE(); KernelVgpuMgr *pKernelVgpuMgr = SYS_GET_KERNEL_VGPUMGR(pSys); KERNEL_PHYS_GPU_INFO *pPhysGpuInfo; + REQUEST_VGPU_INFO_NODE *pRequestVgpu = NULL, *pRequestVgpuNext = NULL; NV_PRINTF(LEVEL_INFO, "Enter function\n"); @@ -634,6 +636,25 @@ kvgpumgrDetachGpu(NvU32 gpuPciId) pPhysGpuInfo->createdVfMask = 0; pPhysGpuInfo->assignedSwizzIdMask = 0; pPhysGpuInfo->isAttached = NV_FALSE; + pPhysGpuInfo->numCreatedVgpu = 0; + + for (i = 0; i < MAX_VGPU_TYPES_PER_PGPU; i++) + pPhysGpuInfo->supportedTypeIds[i] = NVA081_CTRL_VGPU_CONFIG_INVALID_TYPE; + + if (listCount(&(pKernelVgpuMgr->listRequestVgpuHead)) > 0) + { + for (pRequestVgpu = listHead(&(pKernelVgpuMgr->listRequestVgpuHead)); + pRequestVgpu != NULL; + pRequestVgpu = pRequestVgpuNext) + { + pRequestVgpuNext = listNext(&(pKernelVgpuMgr->listRequestVgpuHead), pRequestVgpu); + if (pRequestVgpu->gpuPciId == gpuPciId) + { + pKernelVgpuMgr->pHeap->eheapFree(pKernelVgpuMgr->pHeap, pRequestVgpu->vgpuId); + listRemove(&(pKernelVgpuMgr->listRequestVgpuHead), pRequestVgpu); + } + } + } listDestroy(&(pPhysGpuInfo->listHostVgpuDeviceHead)); @@ -846,6 +867,7 @@ kvgpumgrGuestRegister(OBJGPU *pGpu, NvU32 vgpuDeviceInstanceId, NvBool bDisableDefaultSmcExecPartRestore, NvU16 placementId, + NvU8 *pVgpuDevName, KERNEL_HOST_VGPU_DEVICE **ppKernelHostVgpuDevice) { NV_STATUS rmStatus = NV_OK; @@ -917,9 +939,10 @@ kvgpumgrGuestRegister(OBJGPU *pGpu, pRequestVgpu != NULL; pRequestVgpu = listNext(&pKernelVgpuMgr->listRequestVgpuHead, pRequestVgpu)) { - if (pRequestVgpu->deviceState == NV_VGPU_DEV_OPENED) + if (portMemCmp(pRequestVgpu->mdevUuid, pVgpuDevName, VM_UUID_SIZE) == 0) break; } + if (pRequestVgpu == NULL) { return NV_ERR_OBJECT_NOT_FOUND; @@ -2071,32 +2094,6 @@ kvgpumgrSetVgpuEncoderCapacity(OBJGPU *pGpu, NvU8 *vgpuUuid, NvU32 encoderCapaci return NV_OK; } -NV_STATUS -kvgpumgrStart(const NvU8 *pMdevUuid, void *waitQueue, NvS32 *returnStatus, - NvU8 *vmName, NvU32 qemuPid) -{ - OBJSYS *pSys = SYS_GET_INSTANCE(); - KernelVgpuMgr *pKernelVgpuMgr = SYS_GET_KERNEL_VGPUMGR(pSys); - REQUEST_VGPU_INFO_NODE *pRequestVgpu = NULL; - - for (pRequestVgpu = listHead(&(pKernelVgpuMgr->listRequestVgpuHead)); - pRequestVgpu != NULL; - pRequestVgpu = listNext(&(pKernelVgpuMgr->listRequestVgpuHead), pRequestVgpu)) - { - if (portMemCmp(pMdevUuid, pRequestVgpu->mdevUuid, VGPU_UUID_SIZE) == 0) - { - pRequestVgpu->waitQueue = waitQueue; - pRequestVgpu->returnStatus = returnStatus; - pRequestVgpu->vmName = vmName; - pRequestVgpu->qemuPid = qemuPid; - - CliAddSystemEvent(NV0000_NOTIFIERS_VM_START, 0); - return NV_OK; - } - } - return NV_ERR_OBJECT_NOT_FOUND; -} - // // Add vGPU info received on mdev_create sysfs call to REQUEST_VGPU_INFO_NODE // list. REQUEST_VGPU_INFO_NODE is currently used only for vGPU on KVM. @@ -2229,8 +2226,8 @@ kvgpumgrCreateRequestVgpu(NvU32 gpuPciId, const NvU8 *pMdevUuid, portMemCopy(pRequestVgpu->mdevUuid, VGPU_UUID_SIZE, pMdevUuid, VGPU_UUID_SIZE); pRequestVgpu->gpuPciId = gpuPciId; /* For SRIOV, this is PF's gpuPciId */ - pRequestVgpu->vgpuId = *vgpuId; pRequestVgpu->gpuPciBdf = gpuPciBdf; /* For SRIOV, this is VF's gpuPciBdf */ + pRequestVgpu->vgpuId = *vgpuId; if (IS_MIG_IN_USE(pGpu)) { @@ -2302,6 +2299,120 @@ kvgpumgrDeleteRequestVgpu(const NvU8 *pMdevUuid, NvU16 vgpuId) return NV_ERR_OBJECT_NOT_FOUND; } +NV_STATUS kvgpumgrGetAvailableInstances( + NvU32 *availInstances, + OBJGPU *pGpu, + VGPU_TYPE *vgpuTypeInfo, + NvU32 pgpuIndex, + NvU8 devfn +) +{ + NV_STATUS rmStatus = NV_OK; + OBJSYS *pSys = SYS_GET_INSTANCE(); + KernelVgpuMgr *pKernelVgpuMgr = SYS_GET_KERNEL_VGPUMGR(pSys); + OBJHYPERVISOR *pHypervisor = SYS_GET_HYPERVISOR(pSys); + + *availInstances = 0; + + /* TODO: Needs to have a proper fix this for DriverVM config */ + if (gpuIsSriovEnabled(pGpu) && + !pHypervisor->getProperty(pHypervisor, PDB_PROP_HYPERVISOR_DRIVERVM_ENABLED)) + { + NvU8 fnId = devfn - pGpu->sriovState.firstVFOffset; + + NV_ASSERT_OR_RETURN(fnId <= pGpu->sriovState.totalVFs, NV_ERR_INVALID_ARGUMENT); + + if (IS_MIG_ENABLED(pGpu)) + { + if (IS_MIG_IN_USE(pGpu)) + { + NvU64 swizzIdInUseMask = 0; + NvU32 partitionFlag = PARTITIONID_INVALID; + KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); + NvU32 id; + + swizzIdInUseMask = kmigmgrGetSwizzIdInUseMask(pGpu, pKernelMIGManager); + + if (!vgpuTypeInfo->gpuInstanceSize) + { + // Query for a non MIG vgpuType + NV_PRINTF(LEVEL_INFO, "Query for a non MIG vGPU type \n"); + rmStatus = NV_OK; + goto exit; + } + + rmStatus = kvgpumgrGetPartitionFlag(vgpuTypeInfo->vgpuTypeId, + &partitionFlag); + if (rmStatus != NV_OK) + { + // Query for a non MIG vgpuType + NV_PRINTF(LEVEL_ERROR, "Failed to get partition flags.\n"); + goto exit; + } + + // Determine valid swizzids not assigned to any vGPU device. + FOR_EACH_INDEX_IN_MASK(64, id, swizzIdInUseMask) + { + KERNEL_MIG_GPU_INSTANCE *pKernelMIGGpuInstance; + NvU64 mask = 0; + + rmStatus = kmigmgrGetGPUInstanceInfo(pGpu, pKernelMIGManager, + id, &pKernelMIGGpuInstance); + if (rmStatus != NV_OK) + { + // Didn't find requested GPU instance + NV_PRINTF(LEVEL_ERROR, + "No valid GPU instance with SwizzId - %d found\n", id); + goto exit; + } + + mask = NVBIT64(id); + + if (pKernelMIGGpuInstance->partitionFlag == partitionFlag) + { + // Validate that same ID is not already set and VF is available + if (!(mask & pKernelVgpuMgr->pgpuInfo[pgpuIndex].assignedSwizzIdMask) && + !(pKernelVgpuMgr->pgpuInfo[pgpuIndex].createdVfMask & NVBIT64(fnId))) + { + *availInstances = 1; + break; + } + } + } + FOR_EACH_INDEX_IN_MASK_END; + } + } + else + { + if (pKernelVgpuMgr->pgpuInfo[pgpuIndex].numCreatedVgpu < vgpuTypeInfo->maxInstance) + { + if (vgpuTypeInfo->gpuInstanceSize) + { + // Query for a MIG vgpuType + NV_PRINTF(LEVEL_INFO, "Query for a MIG vGPU type\n"); + rmStatus = NV_OK; + goto exit; + } + + if (!(pKernelVgpuMgr->pgpuInfo[pgpuIndex].createdVfMask & NVBIT64(fnId))) + { + if (kvgpumgrCheckVgpuTypeCreatable(pGpu, &pKernelVgpuMgr->pgpuInfo[pgpuIndex], + vgpuTypeInfo) == NV_OK) + *availInstances = 1; + } + } + } + } + else + { + if (kvgpumgrCheckVgpuTypeCreatable(pGpu, &pKernelVgpuMgr->pgpuInfo[pgpuIndex], vgpuTypeInfo) == NV_OK) + *availInstances = vgpuTypeInfo->maxInstance - pKernelVgpuMgr->pgpuInfo[pgpuIndex].numCreatedVgpu; + } + +exit: + return rmStatus; +} + NV_STATUS kvgpumgrGetHostVgpuDeviceFromMdevUuid(NvU32 gpuPciId, const NvU8 *pMdevUuid, KERNEL_HOST_VGPU_DEVICE **ppKernelHostVgpuDevice) @@ -2386,12 +2497,12 @@ _kvgpumgrIsPlacementValid(OBJGPU *pGpu, KERNEL_PHYS_GPU_INFO *pPgpuInfo, NvU32 v if (IS_GSP_CLIENT(pGpu)) { invalidPlacements = denyListAdaHopper; - length = sizeof(denyListAdaHopper) / sizeof(NvU32); + length = NV_ARRAY_ELEMENTS(denyListAdaHopper); } else { invalidPlacements = denyListAmpere; - length = sizeof(denyListAmpere) / sizeof(NvU32); + length = NV_ARRAY_ELEMENTS(denyListAmpere); } vgpuFbLength = pPgpuInfo->guestVmmuCount[vgpuTypeIndex] * gpuGetVmmuSegmentSize(pGpu); @@ -2678,8 +2789,9 @@ kvgpumgrSetSupportedPlacementIds(OBJGPU *pGpu) pPgpuInfo->heterogeneousTimesliceSizesSupported = NV_FALSE; - /* Initially, heterogeneous vgpus enabled only for sriov vGPUs on VMware/KVM */ - if (gpuIsSriovEnabled(pGpu)) + /* Heterogeneous vgpus enabled for SRIOV vGPUs on VMware/KVM */ + if (gpuIsSriovEnabled(pGpu) + ) { if (osIsVgpuVfioPresent() == NV_OK) pPgpuInfo->heterogeneousTimesliceSizesSupported = NV_TRUE; @@ -2772,12 +2884,15 @@ kvgpumgrSetSupportedPlacementIds(OBJGPU *pGpu) { pPgpuInfo->placementRegionSize = pVgpuTypeInfo->placementSize; - if (pPgpuInfo->guestVmmuCount[i]) + if (gpuIsSriovEnabled(pGpu)) { - totalVmmuCount = pPgpuInfo->guestVmmuCount[i]; + if (pPgpuInfo->guestVmmuCount[i]) + { + totalVmmuCount = pPgpuInfo->guestVmmuCount[i]; - if (IS_GSP_CLIENT(pGpu)) - totalVmmuCount += (pVgpuTypeInfo->gspHeapSize / gpuGetVmmuSegmentSize(pGpu)); + if (IS_GSP_CLIENT(pGpu)) + totalVmmuCount += (pVgpuTypeInfo->gspHeapSize / gpuGetVmmuSegmentSize(pGpu)); + } } } } @@ -2785,8 +2900,6 @@ kvgpumgrSetSupportedPlacementIds(OBJGPU *pGpu) /* * For SRIOV, the placement IDs are aligned to 1/2, 1/4, 1/8, 1/16 partitions * due to restrictions on channels assigned to VF being in power-of-2. - * TODO : Define placement IDs for legacy vGPUs which do not have - * power-of-2 channel restriction */ if (gpuIsSriovEnabled(pGpu)) { @@ -2997,24 +3110,30 @@ kvgpumgrUpdateHeterogeneousInfo(OBJGPU *pGpu, NvU32 vgpuTypeId, NvU16 *placement if (pPgpuInfo->creatablePlacementIds[i][j] != NVA081_PLACEMENT_ID_INVALID) { *placementId = pPgpuInfo->creatablePlacementIds[i][j]; - *guestFbOffset = pPgpuInfo->supportedVmmuOffsets[i][j] * - gpuGetVmmuSegmentSize(pGpu); - *guestFbLength = pPgpuInfo->guestVmmuCount[i] * - gpuGetVmmuSegmentSize(pGpu); - *gspHeapOffset = pPgpuInfo->gspHeapOffsets[i][j]; - bIdFound = NV_TRUE; - break; + if (gpuIsSriovEnabled(pGpu)) + { + *guestFbOffset = pPgpuInfo->supportedVmmuOffsets[i][j] * + gpuGetVmmuSegmentSize(pGpu); + *guestFbLength = pPgpuInfo->guestVmmuCount[i] * + gpuGetVmmuSegmentSize(pGpu); + *gspHeapOffset = pPgpuInfo->gspHeapOffsets[i][j]; + } + bIdFound = NV_TRUE; + break; } } else { if (pPgpuInfo->creatablePlacementIds[i][j] == *placementId) { - *guestFbOffset = pPgpuInfo->supportedVmmuOffsets[i][j] * - gpuGetVmmuSegmentSize(pGpu); - *guestFbLength = pPgpuInfo->guestVmmuCount[i] * - gpuGetVmmuSegmentSize(pGpu); - *gspHeapOffset = pPgpuInfo->gspHeapOffsets[i][j]; + if (gpuIsSriovEnabled(pGpu)) + { + *guestFbOffset = pPgpuInfo->supportedVmmuOffsets[i][j] * + gpuGetVmmuSegmentSize(pGpu); + *guestFbLength = pPgpuInfo->guestVmmuCount[i] * + gpuGetVmmuSegmentSize(pGpu); + *gspHeapOffset = pPgpuInfo->gspHeapOffsets[i][j]; + } bIdFound = NV_TRUE; break; } diff --git a/src/nvidia/src/kernel/virtualization/vgpuconfigapi.c b/src/nvidia/src/kernel/virtualization/vgpuconfigapi.c index 2a5df5c970..def82daa29 100644 --- a/src/nvidia/src/kernel/virtualization/vgpuconfigapi.c +++ b/src/nvidia/src/kernel/virtualization/vgpuconfigapi.c @@ -687,54 +687,6 @@ vgpuconfigapiCtrlCmdVgpuConfigEventSetNotification_IMPL return rmStatus; } -NV_STATUS -vgpuconfigapiCtrlCmdVgpuConfigNotifyStart_IMPL -( - VgpuConfigApi *pVgpuConfigApi, - NVA081_CTRL_VGPU_CONFIG_NOTIFY_START_PARAMS *pNotifyParams -) -{ - OBJSYS *pSys = SYS_GET_INSTANCE(); - KernelVgpuMgr *pKernelVgpuMgr = SYS_GET_KERNEL_VGPUMGR(pSys); - REQUEST_VGPU_INFO_NODE *pRequestVgpu = NULL; - KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice; - - NV_PRINTF(LEVEL_INFO, "%s\n", __FUNCTION__); - - for (pRequestVgpu = listHead(&pKernelVgpuMgr->listRequestVgpuHead); - pRequestVgpu != NULL; - pRequestVgpu = listNext(&pKernelVgpuMgr->listRequestVgpuHead, pRequestVgpu)) - { - if (portMemCmp(pNotifyParams->mdevUuid, pRequestVgpu->mdevUuid, VGPU_UUID_SIZE) == 0) - { - if (pRequestVgpu->returnStatus && pRequestVgpu->waitQueue) - { - *pRequestVgpu->returnStatus = pNotifyParams->returnStatus; - portStringCopy((char *)pRequestVgpu->vmName, NVA081_VM_NAME_SIZE, - (const char *)pNotifyParams->vmName, NVA081_VM_NAME_SIZE); - if (pNotifyParams->returnStatus == NV_OK) - { - pKernelHostVgpuDevice = pRequestVgpu->pKernelHostVgpuDevice; - - if (pKernelHostVgpuDevice == NULL) - { - *pRequestVgpu->returnStatus = NV_ERR_INVALID_STATE; - return NV_ERR_INVALID_STATE; - } - portStringCopy((char *)pKernelHostVgpuDevice->vgpuGuest->guestVmInfo.vmName, - sizeof(pKernelHostVgpuDevice->vgpuGuest->guestVmInfo.vmName), - (const char *)pNotifyParams->vmName, - sizeof(pNotifyParams->vmName)); - } - osVgpuVfioWake(pRequestVgpu->waitQueue); - return NV_OK; - } - return NV_ERR_INVALID_STATE; - } - } - return NV_ERR_OBJECT_NOT_FOUND; -} - NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetCreatablePlacements_IMPL ( @@ -888,10 +840,6 @@ vgpuconfigapiCtrlCmdVgpuConfigUpdatePgpuInfo_IMPL rmStatus = kvgpumgrSetSupportedPlacementIds(pGpu); if (rmStatus != NV_OK) return rmStatus; - - rmStatus = osVgpuRegisterMdev(pGpu->pOsGpuInfo); - if (rmStatus == NV_ERR_NOT_SUPPORTED) - return NV_OK; } else rmStatus = NV_ERR_INVALID_STATE; @@ -1132,8 +1080,8 @@ vgpuconfigapiCtrlCmdVgpuConfigGetFreeSwizzId_IMPL pRequestVgpu != NULL; pRequestVgpu = listNext(&pKernelVgpuMgr->listRequestVgpuHead, pRequestVgpu)) { - if (pRequestVgpu->deviceState == NV_VGPU_DEV_OPENED && - pRequestVgpu->gpuPciId == pParams->gpuPciId) + /* Check for VF's bdf */ + if (pRequestVgpu->gpuPciBdf == pParams->gpuPciId) break; } if (pRequestVgpu == NULL) @@ -1291,3 +1239,27 @@ vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo_IMPL return NV_OK; } + +NV_STATUS +vgpuconfigapiCtrlCmdVgpuSetVmName_IMPL +( + VgpuConfigApi *pVgpuConfigApi, + NVA081_CTRL_VGPU_SET_VM_NAME_PARAMS *pParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pVgpuConfigApi); + KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice = NULL; + NV_STATUS status; + + status = kvgpumgrGetHostVgpuDeviceFromMdevUuid(pGpu->gpuId, + pParams->vgpuName, + &pKernelHostVgpuDevice); + if (status != NV_OK) + return status; + + portStringCopy((char *)pKernelHostVgpuDevice->vgpuGuest->guestVmInfo.vmName, + NVA081_VM_NAME_SIZE, (const char *)pParams->vmName, NVA081_VM_NAME_SIZE); + + return NV_OK; +} + diff --git a/src/nvidia/src/libraries/libspdm/nvidia/nvspdm_crypt_null.c b/src/nvidia/src/libraries/libspdm/nvidia/nvspdm_crypt_null.c index b23de87334..69ab43bc4f 100644 --- a/src/nvidia/src/libraries/libspdm/nvidia/nvspdm_crypt_null.c +++ b/src/nvidia/src/libraries/libspdm/nvidia/nvspdm_crypt_null.c @@ -59,7 +59,6 @@ bool libspdm_ec_get_public_key_from_der(const uint8_t *der_data, return false; } - bool libspdm_rsa_get_public_key_from_der(const uint8_t *der_data, size_t der_size, void **rsa_context) diff --git a/src/nvidia/src/libraries/libspdm/nvidia/nvspdm_rmconfig.h b/src/nvidia/src/libraries/libspdm/nvidia/nvspdm_rmconfig.h index 54ae10f0ad..e491531917 100644 --- a/src/nvidia/src/libraries/libspdm/nvidia/nvspdm_rmconfig.h +++ b/src/nvidia/src/libraries/libspdm/nvidia/nvspdm_rmconfig.h @@ -120,7 +120,6 @@ // Enable runtime checks to ensure SPDM context validity. #define LIBSPDM_CHECK_SPDM_CONTEXT 1 -#include // Enable mutual authentication and encapsulated process both. #define LIBSPDM_ENABLE_CAPABILITY_MUT_AUTH_CAP 1 #define LIBSPDM_ENABLE_CAPABILITY_ENCAP_CAP 1 diff --git a/src/nvidia/src/libraries/resserv/src/rs_client.c b/src/nvidia/src/libraries/resserv/src/rs_client.c index 15ea765026..74145ef167 100644 --- a/src/nvidia/src/libraries/resserv/src/rs_client.c +++ b/src/nvidia/src/libraries/resserv/src/rs_client.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -458,6 +458,21 @@ clientValidate_IMPL return NV_OK; } +NV_STATUS +clientValidateLocks_IMPL +( + RsClient *pClient, + RsServer *pServer, + const CLIENT_ENTRY *pClientEntry +) +{ + NV_CHECK_OR_RETURN(LEVEL_SILENT, + pClientEntry->lockOwnerTid == portThreadGetCurrentThreadId(), + NV_ERR_INVALID_LOCK_STATE); + + return NV_OK; +} + RS_PRIV_LEVEL clientGetCachedPrivilege_IMPL ( @@ -493,7 +508,7 @@ clientAllocResource_IMPL NV_STATUS clientCopyResource_IMPL ( - RsClient *pClient, + RsClient *pClientDst, RsServer *pServer, RS_RES_DUP_PARAMS_INTERNAL *pParams ) @@ -502,22 +517,16 @@ clientCopyResource_IMPL CALL_CONTEXT callContext; CALL_CONTEXT *pOldContext = NULL; - RsClient *pClientDst = NULL; RsResourceRef *pParentRef = NULL; - NV_STATUS status; - status = serverGetClientUnderLock(pServer, pParams->hClientDst, &pClientDst); - if (status != NV_OK) - return status; - status = clientGetResourceRef(pClientDst, pParams->hParentDst, &pParentRef); if (status != NV_OK) return status; portMemSet(&callContext, 0, sizeof(callContext)); callContext.pServer = pServer; - callContext.pClient = pClient; + callContext.pClient = pClientDst; callContext.pResourceRef = pParams->pSrcRef; callContext.pContextRef = pParentRef; callContext.secInfo = *pParams->pSecInfo; @@ -532,14 +541,14 @@ clientCopyResource_IMPL // if (((pParams->pSecInfo->privLevel < RS_PRIV_LEVEL_KERNEL) || (pParams->flags & NV04_DUP_HANDLE_FLAGS_REJECT_KERNEL_DUP_PRIVILEGE)) && - (pServer->bRsAccessEnabled || (pParams->pSrcClient->hClient != pClient->hClient))) + (pServer->bRsAccessEnabled || (pParams->pSrcClient->hClient != pClientDst->hClient))) { RS_ACCESS_MASK rightsRequired; portMemSet(&rightsRequired, 0, sizeof(rightsRequired)); RS_ACCESS_MASK_ADD(&rightsRequired, RS_ACCESS_DUP_OBJECT); - status = rsAccessCheckRights(pParams->pSrcRef, pClient, &rightsRequired); + status = rsAccessCheckRights(pParams->pSrcRef, pClientDst, &rightsRequired); } else { @@ -552,7 +561,7 @@ clientCopyResource_IMPL // We only care about failing Require policies which apply to Dup, ignore everything else if ((pSharePolicy->action & RS_SHARE_ACTION_FLAG_REQUIRE) && RS_ACCESS_MASK_TEST(&pSharePolicy->accessMask, RS_ACCESS_DUP_OBJECT) && - !resShareCallback(pParams->pSrcRef->pResource, pClient, pParentRef, pSharePolicy)) + !resShareCallback(pParams->pSrcRef->pResource, pClientDst, pParentRef, pSharePolicy)) { status = NV_ERR_INVALID_REQUEST; break; @@ -567,7 +576,7 @@ clientCopyResource_IMPL portMemSet(¶ms, 0, sizeof(params)); - params.hClient = pClient->hClient; + params.hClient = pClientDst->hClient; params.hParent = pParams->hParentDst; params.hResource = pParams->hResourceDst; params.externalClassId = pParams->pSrcRef->externalClassId; @@ -579,7 +588,7 @@ clientCopyResource_IMPL params.pLockInfo = pParams->pLockInfo; params.allocFlags = pParams->flags; - return _clientAllocResourceHelper(pClient, pServer, ¶ms, &pParams->hResourceDst); + return _clientAllocResourceHelper(pClientDst, pServer, ¶ms, &pParams->hResourceDst); } static @@ -1121,6 +1130,7 @@ clientUnmapResourceRefMappings params.pLockInfo = &lockInfo; lockInfo.pClient = pLockInfo->pClient; lockInfo.state = pLockInfo->state; + lockInfo.flags = pLockInfo->flags; // TODO: temp WAR for bug 2840284: deadlock during recursive free operation lockInfo.flags |= RS_LOCK_FLAGS_NO_CLIENT_LOCK; @@ -1240,6 +1250,7 @@ _unmapInterMapping ? pLockInfo->pContextRef : pMapping->pContextRef; lockInfo.state = pLockInfo->state; + lockInfo.flags = pLockInfo->flags; status = serverUpdateLockFlagsForInterAutoUnmap(pServer, ¶ms); if (status != NV_OK) diff --git a/src/nvidia/src/libraries/resserv/src/rs_server.c b/src/nvidia/src/libraries/resserv/src/rs_server.c index a11a0f3beb..86688bb545 100644 --- a/src/nvidia/src/libraries/resserv/src/rs_server.c +++ b/src/nvidia/src/libraries/resserv/src/rs_server.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +29,22 @@ #include "resserv/rs_resource.h" #include "tls/tls.h" #include "nv_speculation_barrier.h" +#if !RS_STANDALONE +#include "os/os.h" +#endif + +// Describes types of clients to find when getting client entries +enum CLIENT_STATE +{ + CLIENT_PARTIALLY_INITIALIZED = NVBIT(0), + CLIENT_PENDING_FREE = NVBIT(1) +} CLIENT_STATE; + +enum CLIENT_LIST_LOCK_STATE +{ + CLIENT_LIST_LOCK_LOCKED, + CLIENT_LIST_LOCK_UNLOCKED, +}; /** * Get the RsClient from a client handle without taking locks @@ -42,25 +58,68 @@ static NV_STATUS _serverFindClient(RsServer *pServer, NvHandle hClient, RsClient * Get the CLIENT_ENTRY from a client handle without taking locks * @param[in] pServer * @param[in] hClient The handle to lookup - * @param[in] bFindPartial Include entries that have not finished constructing + * @param[in] clientState Type of clients to look for + * @param[in] clientListLockState State of the global client list lock + * @param[out] ppClientEntry The client entry associated with the handle + */ +static NvBool _serverFindClientEntryByHandle(RsServer *pServer, NvHandle hClient, enum CLIENT_STATE clientState, enum CLIENT_LIST_LOCK_STATE clientListLockState, CLIENT_ENTRY **ppClientEntry); + +/** + * Get the CLIENT_ENTRY from a client handle, incrementing the ref count if a reference + * to the CLIENT_ENTRY is held outside of this function (i.e. outside locks). + * @param[in] pServer + * @param[in] hClient The handle to lookup + * @param[in] clientState Type of clients to look for + * @param[in] clientListLockState State of the global client list lock + * @param[out] ppClientEntry The client entry associated with the handle + */ +static NvBool _serverGetClientEntryByHandle(RsServer *pServer, NvHandle hClient, enum CLIENT_STATE clientState, enum CLIENT_LIST_LOCK_STATE clientListLockState, CLIENT_ENTRY **ppClientEntry); + +/** + * Get the CLIENT_ENTRY from a client handle, incrementing the reference count if a + * reference is held outside this function and also locking the client object if "access" + * dictates we should. + * @param[in] pServer + * @param[in] hClient The handle to lookup + * @param[in] access Lock access type to lock the client object with * @param[out] ppClientEntry The client entry associated with the handle */ -static NV_STATUS _serverFindClientEntry(RsServer *pServer, NvHandle hClient, NvBool bFindPartial, CLIENT_ENTRY **ppClientEntry); +static NvBool _serverGetAndLockClientEntryByHandle(RsServer *pServer, NvHandle hClient, LOCK_ACCESS_TYPE access, CLIENT_ENTRY **ppClientEntry); + +/** + * Put the CLIENT_ENTRY, decrementing the reference count, and also + * unlocking the client object as "access" dictates we should. + * @param[in] pServer + * @param[in] access Lock access type to lock the client object with + * @param[in] pClientEntry The client entry to put/unlock + */ +static void _serverPutAndUnlockClientEntry(RsServer *pServer, LOCK_ACCESS_TYPE access, CLIENT_ENTRY *pClientEntry); /** - * Insert a CLIENT_ENTRY in the server database without taking locks + * Insert a CLIENT_ENTRY in the server database at an arbitrary location, must be + * called with client list lock taken in RW mode. * @param[in] pServer * @param[in] pClientEntry The client entry associated with the handle + * @param[in] ppClientNext The client entry to insert the entry before, or NULL if + * we should just insert at the end of the bucket list. + */ +static NV_STATUS _serverInsertClientEntry(RsServer *pServer, CLIENT_ENTRY *ppClientEntry, CLIENT_ENTRY *pClientNext); + +/** + * Mark a CLIENT_ENTRY as about to be freed + * @param[in] pServer + * @param[in] hClient The handle to lookup + * @param[out] ppClientEntry The client entry associated with the handle */ -static NV_STATUS _serverInsertClientEntry(RsServer *pServer, CLIENT_ENTRY *pClientEntry, CLIENT_ENTRY **ppClientNext); +static NvBool _serverMarkClientEntryPendingFree(RsServer *pServer, NvHandle hClient, CLIENT_ENTRY **ppClientEntry); /** - * Find the next available client handle in bucket. + * Find the next available client handle in bucket, must be called with client list lock * @param[in] pServer * @param[in] hClientIn * @param[out] pClientOut */ -static NV_STATUS _serverFindNextAvailableClientHandleInBucket(RsServer *pServer, NvHandle hClientIn, NvHandle *phClientOut, CLIENT_ENTRY ***pppClientNext); +static NV_STATUS _serverFindNextAvailableClientHandleInBucket(RsServer *pServer, NvHandle hClientIn, NvHandle *phClientOut, CLIENT_ENTRY **ppClientNext); /** * Create a client entry and a client lock for a client that does not exist yet. Used during client @@ -71,61 +130,92 @@ static NV_STATUS _serverFindNextAvailableClientHandleInBucket(RsServer *pServer, static NV_STATUS _serverCreateEntryAndLockForNewClient(RsServer *pServer, NvHandle *phClient, NvBool bInternalHandle, CLIENT_ENTRY **ppClientEntry, API_SECURITY_INFO *pSecInfo); /** - * Lock and retrieve the RsClient associated with a client handle. - * @param[in] pServer - * @param[in] access - * @param[in] hClient Handle of client to look-up - * @param[out] pClient RsClient associated with the client handle + * Lock the RsClient given a CLIENT_ENTRY + * @param[in] access Read or write lock access + * @param[in] pClientEntry The client entry to lock */ -static NV_STATUS _serverLockClient(RsServer *pServer, LOCK_ACCESS_TYPE access, NvHandle hClient, RsClient **ppClient); +static void _serverLockClient(LOCK_ACCESS_TYPE access, CLIENT_ENTRY* pClientEntry); /** * Lock and retrieve the RsClient associated with a client handle, and update lock info. - * @param[in] pServer - * @param[in] access - * @param[in] hClient Handle of client to look-up + * @param[in] pServer + * @param[in] access + * @param[in] hClient Handle of client to look-up + * @param[in] bValidateLocks Whether to validate currently held locks are sufficient * @param[inout] pLockInfo Lock state - * @param[out] pClient RsClient associated with the client handle + * @param[out] pReleaseFlags Local lock flags to keep track of what locks to release + * @param[out] pplientEntry CLIENT_ENTRY associated with the client handle */ -static NV_STATUS _serverLockClientWithLockInfo(RsServer *pServer, LOCK_ACCESS_TYPE access, NvHandle hClient, RS_LOCK_INFO *pLockInfo, NvU32 *pReleaseFlags, RsClient **ppClient); +static NV_STATUS _serverLockClientWithLockInfo(RsServer *pServer, LOCK_ACCESS_TYPE access, NvHandle hClient, NvBool bValidateLocks, RS_LOCK_INFO *pLockInfo, NvU32 *pReleaseFlags, CLIENT_ENTRY **ppClientEntry); /** * Lock and retrieve two RsClient associated with a pair of client handles, and update lock info. - * @param[in] pServer - * @param[in] access - * @param[in] hClient1, hClient2 Handles of clients to look-up and lock + * @param[in] pServer + * @param[in] access + * @param[in] hClient1, hClient2 Handles of clients to look-up and lock + * @param[in] bValidateLocks Whether to validate currently held locks are sufficient * @param[inout] pLockInfo Lock state - * @param[out] pClient1, pClient2 RsClient associated with the client handles + * @param[out] pReleaseFlags Local lock flags to keep track of what locks to release + * @param[out] ppClientEntry1 CLIENT_ENTRY associated with the first client handle + * @param[out] ppClientEntry2 CLIENT_ENTRY associated with the second client handle */ -static NV_STATUS _serverLockDualClientWithLockInfo(RsServer *pServer, LOCK_ACCESS_TYPE access, NvHandle hClient1, NvHandle hClient2, RS_LOCK_INFO *pLockInfo, NvU32 *pReleaseFlags, RsClient **ppClient1, RsClient **ppClient2); +static NV_STATUS _serverLockDualClientWithLockInfo(RsServer *pServer, LOCK_ACCESS_TYPE access, NvHandle hClient1, NvHandle hClient2, NvBool bValidateLocks, RS_LOCK_INFO *pLockInfo, NvU32 *pReleaseFlags, CLIENT_ENTRY **ppClientEntry1, CLIENT_ENTRY **ppClientEntry2); /** - * Unlock a client by handle - * @param[in] pServer - * @param[in] access - * @param[in] hClient Handle of the client to unlock + * Lock all clients, and update lock info. + * @param[in] pServer + * @param[inout] pLockInfo Lock state + * @param[out] pReleaseFlags Local lock flags to keep track of what locks to release */ -static NV_STATUS _serverUnlockClient(RsServer *pServer, LOCK_ACCESS_TYPE access, NvHandle hClient); +static NV_STATUS _serverLockAllClientsWithLockInfo(RsServer *pServer, RS_LOCK_INFO *pLockInfo, NvU32 *pReleaseFlags); /** - * Unlock a client by handle, and update lock info. + * Unlock the RsClient given a CLIENT_ENTRY + * @param[in] access Read or write lock access + * @param[in] pClientEntry The client entry to unlock + */ +static void _serverUnlockClient(LOCK_ACCESS_TYPE access, CLIENT_ENTRY* pClientEntry); + +/** + * Unlock a client and update lock info. * @param[in] pServer * @param[in] access - * @param[in] hClient Handle of the client to unlock + * @param[in] pClientEntry Client entry to unlock * @param[inout] pLockInfo Lock state * @param[inout] pReleaseFlags Flags indicating the locks that need to be released */ -static NV_STATUS _serverUnlockClientWithLockInfo(RsServer *pServer, LOCK_ACCESS_TYPE access, NvHandle hClient, RS_LOCK_INFO* pLockInfo, NvU32 *pReleaseFlags); +static void _serverUnlockClientWithLockInfo(RsServer *pServer, LOCK_ACCESS_TYPE access, CLIENT_ENTRY *pClientEntry, RS_LOCK_INFO* pLockInfo, NvU32 *pReleaseFlags); /** - * Unlock a client by handle, and update lock info. + * Unlock two clients and update lock info. * @param[in] pServer * @param[in] access - * @param[in] hClient1, hClient2 Handles of the clients to unlock + * @param[in] pClientEntry1 First client's entry to unlock + * @param[in] pClientEntry2 Second client's entry to unlock + * @param[inout] pLockInfo Lock state + * @param[inout] pReleaseFlags Flags indicating the locks that need to be released + */ +static void _serverUnlockDualClientWithLockInfo(RsServer *pServer, LOCK_ACCESS_TYPE access, CLIENT_ENTRY *pClientEntry1, CLIENT_ENTRY *pClientEntry2, RS_LOCK_INFO* pLockInfo, NvU32 *pReleaseFlags); + +/** + * Unlock all clients, and update lock info. + * @param[in] pServer * @param[inout] pLockInfo Lock state * @param[inout] pReleaseFlags Flags indicating the locks that need to be released */ -static NV_STATUS _serverUnlockDualClientWithLockInfo(RsServer *pServer, LOCK_ACCESS_TYPE access, NvHandle hClient1, NvHandle hClient2, RS_LOCK_INFO* pLockInfo, NvU32 *pReleaseFlags); +static NV_STATUS _serverUnlockAllClientsWithLockInfo(RsServer *pServer, RS_LOCK_INFO *pLockInfo, NvU32 *pReleaseFlags); + +/** + * Increment reference count for CLIENT_ENTRY, preventing it from being freed + * @param[in] pClientEntry The client entry to reference + */ +static void _serverGetClientEntry(CLIENT_ENTRY *pClientEntry); + +/** + * Decrement reference count for CLIENT_ENTRY, freeing it if it reaches 0 + * @param[in] pClientEntry The client entry to dereference + */ +static void _serverPutClientEntry(RsServer *pServer, CLIENT_ENTRY *pClientEntry); NV_STATUS serverFreeResourceTreeUnderLock(RsServer *pServer, RS_RES_FREE_PARAMS *pFreeParams) { @@ -231,11 +321,12 @@ serverConstruct NvU32 i; PORT_MEM_ALLOCATOR *pAllocator = portMemAllocatorCreateNonPaged(); - pServer->privilegeLevel = privilegeLevel; - pServer->bConstructed = NV_TRUE; - pServer->pAllocator = pAllocator; - pServer->bDebugFreeList = NV_FALSE; - pServer->bRsAccessEnabled = NV_TRUE; + pServer->privilegeLevel = privilegeLevel; + pServer->bConstructed = NV_TRUE; + pServer->pAllocator = pAllocator; + pServer->bDebugFreeList = NV_FALSE; + pServer->bRsAccessEnabled = NV_TRUE; + pServer->allClientLockOwnerTid = ~0; pServer->internalHandleBase = RS_CLIENT_INTERNAL_HANDLE_BASE; pServer->clientHandleBase = RS_CLIENT_HANDLE_BASE; pServer->activeClientCount = 0; @@ -249,11 +340,12 @@ serverConstruct for (i = 0; i < RS_CLIENT_HANDLE_BUCKET_COUNT; i++) { - listInit(&pServer->pClientSortedList[i], pAllocator); + listInitIntrusive(&pServer->pClientSortedList[i]); } pServer->clientCurrentHandleIndex = 0; - pServer->pClientListLock = portSyncRwLockCreate(pAllocator); + RS_LOCK_VALIDATOR_INIT(&pServer->clientListLockVal, LOCK_VAL_LOCK_CLASS_CLIENT_LIST, 0xcafe0000); + pServer->pClientListLock = portSyncSpinlockCreate(pAllocator); if (pServer->pClientListLock == NULL) goto fail; @@ -301,7 +393,7 @@ serverConstruct #endif if (pServer->pClientListLock != NULL) - portSyncRwLockDestroy(pServer->pClientListLock); + portSyncSpinlockDestroy(pServer->pClientListLock); if (pServer->pShareMapLock != NULL) portSyncSpinlockDestroy(pServer->pShareMapLock); @@ -337,13 +429,13 @@ serverDestruct for (i = 0; i < RS_CLIENT_HANDLE_BUCKET_COUNT; i++) { - CLIENT_ENTRY **ppClientEntry; + CLIENT_ENTRY *pClientEntry; NvHandle hClient = 0; - while ((ppClientEntry = listHead(&pServer->pClientSortedList[i])) != NULL) + while ((pClientEntry = listHead(&pServer->pClientSortedList[i])) != NULL) { RS_RES_FREE_PARAMS_INTERNAL freeParams; - lockInfo.pClient = (*ppClientEntry)->pClient; + lockInfo.pClient = pClientEntry->pClient; hClient = lockInfo.pClient->hClient; serverInitFreeParams_Recursive(hClient, hClient, &lockInfo, &freeParams); serverFreeResourceTree(pServer, &freeParams); @@ -366,7 +458,7 @@ serverDestruct #endif portSyncSpinlockDestroy(pServer->pShareMapLock); - portSyncRwLockDestroy(pServer->pClientListLock); + portSyncSpinlockDestroy(pServer->pClientListLock); portMemAllocatorRelease(pServer->pAllocator); @@ -405,29 +497,15 @@ serverSetClientHandleBase } static -NV_STATUS +void _serverFreeClient_underlock ( RsServer *pServer, - RsClient *pClient + CLIENT_ENTRY *pClientEntry ) { - CLIENT_ENTRY *pClientEntry = NULL; - NvHandle hClient; - NV_STATUS status; - PORT_RWLOCK *pLock = NULL; - - status =_serverFindClientEntry(pServer, pClient->hClient, NV_FALSE, &pClientEntry); - if (status != NV_OK) - { - return status; - } - - NV_ASSERT(pClientEntry->pClient != NULL); - - hClient = pClient->hClient; - pClientEntry->pClient = NULL; - pClientEntry->hClient = 0; + RsClient *pClient = pClientEntry->pClient; + NvHandle hClient = pClient->hClient; clientFreeAccessBackRefs(pClient, pServer); @@ -440,14 +518,15 @@ _serverFreeClient_underlock objDelete(pClient); - listRemoveFirstByValue(&pServer->pClientSortedList[hClient & RS_CLIENT_HANDLE_BUCKET_MASK], &pClientEntry); - pLock = pClientEntry->pLock; + // Now remove the client entry and decrease the client count + serverAcquireClientListLock(pServer); + listRemove( + &pServer->pClientSortedList[hClient & RS_CLIENT_HANDLE_BUCKET_MASK], + pClientEntry); + serverReleaseClientListLock(pServer); - RS_RWLOCK_RELEASE_WRITE_EXT(pLock, &pClientEntry->lockVal, NV_TRUE); - portSyncRwLockDestroy(pLock); - PORT_FREE(pServer->pAllocator, pClientEntry); - - return NV_OK; + NV_ASSERT(pClientEntry->refCount == 1); + _serverPutClientEntry(pServer, pClientEntry); } NV_STATUS @@ -473,22 +552,16 @@ serverFreeDomain for (bucket = 0; bucket < RS_CLIENT_HANDLE_BUCKET_COUNT; bucket ++) { RsClientList *pClientList = &(pServer->pClientSortedList[bucket]); - CLIENT_ENTRY **ppClientEntry = listHead(pClientList); - while (ppClientEntry != NULL) + CLIENT_ENTRY *pClientEntry = listHead(pClientList); + while (pClientEntry != NULL) { - CLIENT_ENTRY *pClientEntry = *ppClientEntry; RS_CLIENT_FREE_PARAMS params; portMemSet(¶ms, 0, sizeof(params)); - if (pClientEntry == NULL) - { - ppClientEntry = listNext(pClientList, ppClientEntry); - continue; - } params.hClient = pClientEntry->hClient; serverFreeClient(pServer, ¶ms); - ppClientEntry = listHead(pClientList); + pClientEntry = listHead(pClientList); } } return NV_OK; @@ -530,29 +603,22 @@ serverAllocClient NvBool bLockedClient = NV_FALSE; if (!pServer->bConstructed) - { - status = NV_ERR_NOT_READY; - goto done; - } + return NV_ERR_NOT_READY; // RS-TODO Assert that the RW top lock is held hClient = pParams->hClient; #if !(RS_COMPATABILITY_MODE) + // Fail if the server supplied a client id if (hClient != 0) - { - // Fail if the server supplied a client id - status = NV_ERR_INVALID_ARGUMENT; - goto done; - } + return NV_ERR_INVALID_ARGUMENT; #endif status = _serverCreateEntryAndLockForNewClient(pServer, &hClient, !!(pParams->allocState & ALLOC_STATE_INTERNAL_CLIENT_HANDLE), &pClientEntry, pParams->pSecInfo); if (status != NV_OK) - { goto done; - } + pParams->hClient = hClient; pParams->hResource = hClient; bLockedClient = NV_TRUE; @@ -564,32 +630,46 @@ serverAllocClient goto done; } - pClientEntry->pClient = pClient; - // Automatically allocate client proxy resource status = clientAllocResource(pClient, pServer, pParams); if (status != NV_OK) goto done; - // NV_PRINTF(LEVEL_INFO, "Allocated hClient: %x\n", hClient); + // + // Client list lock is required when the client becomes active in order to avoid + // race conditions with serverLockAllClients. + // + serverAcquireClientListLock(pServer); + pClientEntry->pClient = pClient; + + // Increase client count portAtomicIncrementU32(&pServer->activeClientCount); + serverReleaseClientListLock(pServer); done: if (bLockedClient) - _serverUnlockClient(pServer, LOCK_ACCESS_WRITE, pParams->hClient); + _serverUnlockClient(LOCK_ACCESS_WRITE, pClientEntry); - if ((status != NV_OK) && (status != NV_ERR_INSERT_DUPLICATE_NAME) && (hClient != 0)) + if ((status != NV_OK) && (pClientEntry != NULL)) { - if (_serverFindClientEntry(pServer, hClient, NV_TRUE, &pClientEntry) == NV_OK) - { - listRemoveFirstByValue(&pServer->pClientSortedList[hClient & RS_CLIENT_HANDLE_BUCKET_MASK], &pClientEntry); - portSyncRwLockDestroy(pClientEntry->pLock); - PORT_FREE(pServer->pAllocator, pClientEntry); - } + serverAcquireClientListLock(pServer); + listRemove( + &pServer->pClientSortedList[hClient & RS_CLIENT_HANDLE_BUCKET_MASK], + pClientEntry); + serverReleaseClientListLock(pServer); + + // + // Decrement reference count outside of client list lock, memory free is + // disallowed in the spinlock's critical section on Windows. + // + _serverPutClientEntry(pServer, pClientEntry); objDelete(pClient); } + if (pClientEntry != NULL) + _serverPutClientEntry(pServer, pClientEntry); + return status; } @@ -601,35 +681,34 @@ _serverFreeClient RS_CLIENT_FREE_PARAMS *pParams ) { - NV_STATUS status; - NV_STATUS lockStatus; - NvU32 releaseFlags = 0; - RsClient *pClient; - - lockStatus = _serverLockClient(pServer, LOCK_ACCESS_WRITE, pParams->hClient, &pClient); - if (lockStatus != NV_OK) - { - status = NV_ERR_INVALID_CLIENT; - goto done; - } - releaseFlags |= RS_LOCK_RELEASE_CLIENT_LOCK; + NV_STATUS status; + CLIENT_ENTRY *pClientEntry; + NvU32 releaseFlags = 0; - status = serverResLock_Prologue(pServer, LOCK_ACCESS_WRITE, pParams->pResFreeParams->pLockInfo, &releaseFlags); - if (status != NV_OK) - goto done; + // + // Mark the client entry as pending free which will allow us to prevent other threads + // from using the client while we deallocate resources. + // + if (!_serverMarkClientEntryPendingFree(pServer, pParams->hClient, &pClientEntry)) + return NV_ERR_INVALID_OBJECT_HANDLE; - status = _serverFreeClient_underlock(pServer, pClient); + status = serverResLock_Prologue(pServer, LOCK_ACCESS_WRITE, + pParams->pResFreeParams->pLockInfo, &releaseFlags); if (status != NV_OK) goto done; - // NV_PRINTF(LEVEL_INFO, "Freeing hClient: %x\n", hClient); - portAtomicDecrementU32(&pServer->activeClientCount); + _serverFreeClient_underlock(pServer, pClientEntry); done: serverResLock_Epilogue(pServer, LOCK_ACCESS_WRITE, pParams->pResFreeParams->pLockInfo, &releaseFlags); - if (releaseFlags & RS_LOCK_RELEASE_CLIENT_LOCK) - _serverUnlockClient(pServer, LOCK_ACCESS_WRITE, pParams->hClient); + // Undo pending free marker + if (status != NV_OK) + { + serverAcquireClientListLock(pServer); + pClientEntry->bPendingFree = NV_FALSE; + serverReleaseClientListLock(pServer); + } return status; } @@ -650,7 +729,8 @@ serverAllocResource LOCK_ACCESS_TYPE topLockAccess; NvU32 initialLockState; RS_LOCK_INFO *pLockInfo; - RsClient *pSecondClient = NULL; + CLIENT_ENTRY *pClientEntry = NULL; + CLIENT_ENTRY *pSecondClientEntry = NULL; NvHandle hSecondClient; CALL_CONTEXT callContext = {0}; @@ -694,13 +774,14 @@ serverAllocResource if (hSecondClient == 0) { status = _serverLockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, - pParams->hClient, pLockInfo, - &releaseFlags, &pParams->pClient); + pParams->hClient, NV_TRUE, + pLockInfo, &releaseFlags, + &pClientEntry); if (status != NV_OK) goto done; - if (!pParams->pClient->bActive) + if (!pClientEntry->pClient->bActive) { status = NV_ERR_INVALID_STATE; goto done; @@ -710,19 +791,24 @@ serverAllocResource { status = _serverLockDualClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pParams->hClient, hSecondClient, - pLockInfo, &releaseFlags, - &pParams->pClient, &pSecondClient); + NV_TRUE, pLockInfo, + &releaseFlags, + &pClientEntry, + &pSecondClientEntry); if (status != NV_OK) goto done; - if (!pParams->pClient->bActive || !pSecondClient->bActive) + if (!pClientEntry->pClient->bActive || + !pSecondClientEntry->pClient->bActive) { status = NV_ERR_INVALID_STATE; goto done; } } + pParams->pClient = pClientEntry->pClient; + // The second client's usage is class-dependent and should be validated // by the class's constructor status = clientValidate(pParams->pClient, pParams->pSecInfo); @@ -748,16 +834,19 @@ serverAllocResource if (!bClientAlloc) { - if (pSecondClient != NULL) + if (pClientEntry != NULL) { - _serverUnlockDualClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, - pParams->hClient, pSecondClient->hClient, + if (pSecondClientEntry != NULL) + { + _serverUnlockDualClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, + pClientEntry, pSecondClientEntry, + pLockInfo, &releaseFlags); + } + else + { + _serverUnlockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pClientEntry, pLockInfo, &releaseFlags); - } - else - { - _serverUnlockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pParams->hClient, - pLockInfo, &releaseFlags); + } } } @@ -1024,6 +1113,7 @@ serverFreeResourceTree RS_RES_FREE_PARAMS *pParams ) { + CLIENT_ENTRY *pClientEntry = NULL; RsClient *pClient = NULL; NV_STATUS status; RsResourceRef *pResourceRef = NULL; @@ -1056,10 +1146,13 @@ serverFreeResourceTree if (status != NV_OK) goto done; - status = _serverLockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pParams->hClient, pLockInfo, &releaseFlags, &pClient); + status = _serverLockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pParams->hClient, + NV_TRUE, pLockInfo, &releaseFlags, &pClientEntry); if (status != NV_OK) goto done; + pClient = pClientEntry->pClient; + status = clientValidate(pClient, pParams->pSecInfo); if (status != NV_OK) goto done; @@ -1072,7 +1165,7 @@ serverFreeResourceTree status = clientGetResourceRef(pClient, pParams->hResource, &pResourceRef); if (status != NV_OK) { - NV_PRINTF(LEVEL_NOTICE, "hObject 0x%x not found for client 0x%x\n", + NV_PRINTF(LEVEL_INFO, "hObject 0x%x not found for client 0x%x\n", pParams->hResource, pParams->hClient); #if (RS_COMPATABILITY_MODE) @@ -1213,7 +1306,10 @@ serverFreeResourceTree pClient->bActive = NV_FALSE; } - _serverUnlockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pParams->hClient, pLockInfo, &releaseFlags); + _serverUnlockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pClientEntry, pLockInfo, + &releaseFlags); + + pClientEntry = NULL; if (pParams->hClient == pParams->hResource) { @@ -1247,7 +1343,11 @@ serverFreeResourceTree bPopFreeStack = NV_FALSE; } - _serverUnlockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pParams->hClient, pLockInfo, &releaseFlags); + if (pClientEntry != NULL) + { + _serverUnlockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, + pClientEntry, pLockInfo, &releaseFlags); + } serverTopLock_Epilogue(pServer, topLockAccess, pLockInfo, &releaseFlags); // @@ -1268,16 +1368,18 @@ serverControl RS_RES_CONTROL_PARAMS *pParams ) { - NV_STATUS status; - RsClient *pClient; - RsClient *pSecondClient = NULL; - RsResourceRef *pResourceRef = NULL; - RS_LOCK_INFO *pLockInfo; - NvU32 releaseFlags = 0; - CALL_CONTEXT callContext; - CALL_CONTEXT *pOldContext = NULL; - LOCK_ACCESS_TYPE access = LOCK_ACCESS_WRITE; - NvHandle hSecondClient; + NV_STATUS status; + CLIENT_ENTRY *pClientEntry = NULL; + CLIENT_ENTRY *pSecondClientEntry = NULL; + RsClient *pClient; + RsResourceRef *pResourceRef = NULL; + RS_LOCK_INFO *pLockInfo; + NvU32 releaseFlags = 0; + CALL_CONTEXT callContext; + CALL_CONTEXT *pOldContext = NULL; + LOCK_ACCESS_TYPE access = LOCK_ACCESS_WRITE; + enum CLIENT_LOCK_TYPE clientLockType = CLIENT_LOCK_SPECIFIC; + NvHandle hSecondClient; pLockInfo = pParams->pLockInfo; NV_ASSERT_OR_RETURN(pLockInfo != NULL, NV_ERR_INVALID_ARGUMENT); @@ -1297,37 +1399,61 @@ serverControl if (status != NV_OK) goto done; - status = serverControlLookupSecondClient(pParams->cmd, pParams->pParams, - pParams->pCookie, &hSecondClient); + status = serverControlLookupClientLockFlags(pParams->pCookie, &clientLockType); if (status != NV_OK) goto done; - if (hSecondClient == 0) + if (clientLockType == CLIENT_LOCK_SPECIFIC) { - status = _serverLockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, - pParams->hClient, pLockInfo, &releaseFlags, &pClient); + status = serverControlLookupSecondClient(pParams->cmd, pParams->pParams, + pParams->pCookie, &hSecondClient); if (status != NV_OK) goto done; - if (!pClient->bActive) + if (hSecondClient == 0) { - status = NV_ERR_INVALID_STATE; - goto done; + status = _serverLockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, + pParams->hClient, + (((pParams->flags & NVOS54_FLAGS_IRQL_RAISED) == 0) && + ((pParams->flags & NVOS54_FLAGS_LOCK_BYPASS) == 0)), + pLockInfo, &releaseFlags, &pClientEntry); + if (status != NV_OK) + goto done; + + if (!pClientEntry->pClient->bActive) + { + status = NV_ERR_INVALID_STATE; + goto done; + } } + else + { + status = _serverLockDualClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, + pParams->hClient, hSecondClient, + (((pParams->flags & NVOS54_FLAGS_IRQL_RAISED) == 0) && + ((pParams->flags & NVOS54_FLAGS_LOCK_BYPASS) == 0)), + pLockInfo, &releaseFlags, &pClientEntry, &pSecondClientEntry); + if (status != NV_OK) + goto done; + + if (!pClientEntry->pClient->bActive || !pSecondClientEntry->pClient->bActive) + { + status = NV_ERR_INVALID_STATE; + goto done; + } + } + + pClient = pClientEntry->pClient; } else { - status = _serverLockDualClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, - pParams->hClient, hSecondClient, pLockInfo, &releaseFlags, - &pClient, &pSecondClient); + status = _serverLockAllClientsWithLockInfo(pServer, pLockInfo, &releaseFlags); if (status != NV_OK) goto done; - if (!pClient->bActive || !pSecondClient->bActive) - { - status = NV_ERR_INVALID_STATE; + status = _serverFindClient(pServer, pParams->hClient, &pClient); + if (status != NV_OK) goto done; - } } status = clientValidate(pClient, &pParams->secInfo); @@ -1392,16 +1518,26 @@ serverControl serverSessionLock_Epilogue(pServer, LOCK_ACCESS_WRITE, pLockInfo, &releaseFlags); - if (pSecondClient != NULL) + if (clientLockType == CLIENT_LOCK_SPECIFIC) { - _serverUnlockDualClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, - pParams->hClient, pSecondClient->hClient, - pLockInfo, &releaseFlags); + if (pClientEntry != NULL) + { + if (pSecondClientEntry != NULL) + { + _serverUnlockDualClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, + pClientEntry, pSecondClientEntry, + pLockInfo, &releaseFlags); + } + else + { + _serverUnlockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pClientEntry, + pLockInfo, &releaseFlags); + } + } } else { - _serverUnlockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, - pParams->hClient, pLockInfo, &releaseFlags); + _serverUnlockAllClientsWithLockInfo(pServer, pLockInfo, &releaseFlags); } serverTopLock_Epilogue(pServer, access, pLockInfo, &releaseFlags); @@ -1424,6 +1560,8 @@ serverCopyResource NV_STATUS status; RS_LOCK_INFO *pLockInfo = pParams->pLockInfo; NvU32 releaseFlags = 0; + CLIENT_ENTRY *pClientEntrySrc = NULL; + CLIENT_ENTRY *pClientEntryDst = NULL; RsClient *pClientSrc; RsClient *pClientDst; RsResourceRef *pResourceRefSrc; @@ -1446,12 +1584,15 @@ serverCopyResource goto done; status = _serverLockDualClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, - hClientSrc, hClientDst, + hClientSrc, hClientDst, NV_TRUE, pLockInfo, &releaseFlags, - &pClientSrc, &pClientDst); + &pClientEntrySrc, &pClientEntryDst); if (status != NV_OK) goto done; + pClientSrc = pClientEntrySrc->pClient; + pClientDst = pClientEntryDst->pClient; + if (!pClientSrc->bActive || !pClientDst->bActive) { status = NV_ERR_INVALID_STATE; @@ -1503,9 +1644,12 @@ serverCopyResource done: serverResLock_Epilogue(pServer, LOCK_ACCESS_WRITE, pParams->pLockInfo, &releaseFlags); - _serverUnlockDualClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, - hClientSrc, hClientDst, - pLockInfo, &releaseFlags); + if (pClientEntrySrc != NULL && pClientEntryDst != NULL) + { + _serverUnlockDualClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, + pClientEntrySrc, pClientEntryDst, + pLockInfo, &releaseFlags); + } serverTopLock_Epilogue(pServer, topLockAccess, pLockInfo, &releaseFlags); return status; @@ -1527,6 +1671,8 @@ _serverShareResourceAccessClient NV_STATUS status; RS_LOCK_INFO *pLockInfo = pParams->pLockInfo; NvU32 releaseFlags = 0; + CLIENT_ENTRY *pClientEntryOwner = NULL; + CLIENT_ENTRY *pClientEntryTarget = NULL; RsClient *pClientOwner; RsClient *pClientTarget; RsResourceRef *pResourceRef; @@ -1550,12 +1696,15 @@ _serverShareResourceAccessClient goto done; status = _serverLockDualClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, - hClientOwner, hClientTarget, + hClientOwner, hClientTarget, NV_TRUE, pLockInfo, &releaseFlags, - &pClientOwner, &pClientTarget); + &pClientEntryOwner, &pClientEntryTarget); if (status != NV_OK) goto done; + pClientOwner = pClientEntryOwner->pClient; + pClientTarget = pClientEntryTarget->pClient; + status = clientGetResourceRef(pClientOwner, pParams->hResource, &pResourceRef); if (status != NV_OK) goto done; @@ -1602,9 +1751,12 @@ _serverShareResourceAccessClient // hClientOwner, pParams->hResource, hClientTarget); done: - _serverUnlockDualClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, - hClientOwner, hClientTarget, - pLockInfo, &releaseFlags); + if (pClientEntryOwner != NULL && pClientEntryTarget != NULL) + { + _serverUnlockDualClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, + pClientEntryOwner, pClientEntryTarget, + pLockInfo, &releaseFlags); + } serverTopLock_Epilogue(pServer, topLockAccess, pLockInfo, &releaseFlags); return status; @@ -1621,6 +1773,7 @@ serverShareResourceAccess NV_STATUS status; RS_LOCK_INFO *pLockInfo; NvU32 releaseFlags = 0; + CLIENT_ENTRY *pClientEntry = NULL; RsClient *pClient; RsResourceRef *pResourceRef; NvU16 shareType; @@ -1658,10 +1811,13 @@ serverShareResourceAccess if (status != NV_OK) goto done; - status = _serverLockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pParams->hClient, pLockInfo, &releaseFlags, &pClient); + status = _serverLockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pParams->hClient, + NV_TRUE, pLockInfo, &releaseFlags, &pClientEntry); if (status != NV_OK) goto done; + pClient = pClientEntry->pClient; + status = clientValidate(pClient, pParams->pSecInfo); if (status != NV_OK) goto done; @@ -1694,7 +1850,11 @@ serverShareResourceAccess // NV_PRINTF(LEVEL_INFO, "hClient %x: Shared hResource: %x\n", hClient, pParams->hResource); done: - _serverUnlockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pParams->hClient, pLockInfo, &releaseFlags); + if (pClientEntry != NULL) + { + _serverUnlockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pClientEntry, + pLockInfo, &releaseFlags); + } serverTopLock_Epilogue(pServer, topLockAccess, pLockInfo, &releaseFlags); @@ -1713,6 +1873,7 @@ serverMap NV_STATUS status = NV_ERR_INVALID_STATE; CALL_CONTEXT callContext; CALL_CONTEXT *pOldContext = NULL; + CLIENT_ENTRY *pClientEntry = NULL; RsClient *pClient; RsResourceRef *pResourceRef; RsResourceRef *pContextRef = NULL; @@ -1733,10 +1894,13 @@ serverMap if (status != NV_OK) goto done; - status = _serverLockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, hClient, pLockInfo, &releaseFlags, &pClient); + status = _serverLockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, hClient, + NV_TRUE, pLockInfo, &releaseFlags, &pClientEntry); if (status != NV_OK) goto done; + pClient = pClientEntry->pClient; + if (!pClient->bActive) { status = NV_ERR_INVALID_STATE; @@ -1812,7 +1976,11 @@ serverMap } serverResLock_Epilogue(pServer, LOCK_ACCESS_WRITE, pLockInfo, &releaseFlags); - _serverUnlockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, hClient, pLockInfo, &releaseFlags); + if (pClientEntry != NULL) + { + _serverUnlockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pClientEntry, + pLockInfo, &releaseFlags); + } serverTopLock_Epilogue(pServer, topLockAccess, pLockInfo, &releaseFlags); return status; @@ -1828,6 +1996,7 @@ serverUnmap ) { NV_STATUS status = NV_ERR_INVALID_STATE; + CLIENT_ENTRY *pClientEntry = NULL; RsClient *pClient; RsResourceRef *pResourceRef; RsResource *pResource; @@ -1847,10 +2016,13 @@ serverUnmap if (status != NV_OK) goto done; - status = _serverLockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, hClient, pLockInfo, &releaseFlags, &pClient); + status = _serverLockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, hClient, + NV_TRUE, pLockInfo, &releaseFlags, &pClientEntry); if (status != NV_OK) goto done; + pClient = pClientEntry->pClient; + status = clientValidate(pClient, pParams->pSecInfo); if (status != NV_OK) goto done; @@ -1886,7 +2058,11 @@ serverUnmap done: serverUnmap_Epilogue(pServer, pParams); serverResLock_Epilogue(pServer, LOCK_ACCESS_WRITE, pLockInfo, &releaseFlags); - _serverUnlockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, hClient, pLockInfo, &releaseFlags); + if (pClientEntry != NULL) + { + _serverUnlockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pClientEntry, + pLockInfo, &releaseFlags); + } serverTopLock_Epilogue(pServer, topLockAccess, pLockInfo, &releaseFlags); return status; @@ -1899,6 +2075,7 @@ serverInterMap RS_INTER_MAP_PARAMS *pParams ) { + CLIENT_ENTRY *pClientEntry = NULL; RsClient *pClient; RsResourceRef *pMapperRef; RsResourceRef *pMappableRef; @@ -1927,10 +2104,13 @@ serverInterMap goto done; status = _serverLockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pParams->hClient, - pLockInfo, &releaseFlags, &pClient); + NV_TRUE, pLockInfo, &releaseFlags, + &pClientEntry); if (status != NV_OK) goto done; + pClient = pClientEntry->pClient; + if (!pClient->bActive) { status = NV_ERR_INVALID_STATE; @@ -2001,7 +2181,11 @@ serverInterMap refRemoveInterMapping(pMapperRef, pMapping); } - _serverUnlockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pParams->hClient, pLockInfo, &releaseFlags); + if (pClientEntry != NULL) + { + _serverUnlockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pClientEntry, + pLockInfo, &releaseFlags); + } serverTopLock_Epilogue(pServer, topLockAccess, pLockInfo, &releaseFlags); return status; @@ -2143,6 +2327,7 @@ serverInterUnmap RS_INTER_UNMAP_PARAMS *pParams ) { + CLIENT_ENTRY *pClientEntry = NULL; RsClient *pClient; RsResourceRef *pMapperRef; RsResourceRef *pContextRef; @@ -2166,10 +2351,13 @@ serverInterUnmap goto done; status = _serverLockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pParams->hClient, - pLockInfo, &releaseFlags, &pClient); + NV_TRUE, pLockInfo, &releaseFlags, + &pClientEntry); if (status != NV_OK) goto done; + pClient = pClientEntry->pClient; + status = clientValidate(pClient, pParams->pSecInfo); if (status != NV_OK) goto done; @@ -2224,7 +2412,11 @@ serverInterUnmap if (bRestoreCallContext) NV_ASSERT_OK(resservRestoreTlsCallContext(pOldContext)); - _serverUnlockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pParams->hClient, pLockInfo, &releaseFlags); + if (pClientEntry != NULL) + { + _serverUnlockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pClientEntry, + pLockInfo, &releaseFlags); + } serverTopLock_Epilogue(pServer, topLockAccess, pLockInfo, &releaseFlags); return status; @@ -2236,19 +2428,22 @@ serverAcquireClient RsServer *pServer, NvHandle hClient, LOCK_ACCESS_TYPE lockAccess, - RsClient **ppClient + CLIENT_ENTRY **ppClientEntry ) { - NV_STATUS status; - RsClient *pClient; + CLIENT_ENTRY *pClientEntry; + + if (ppClientEntry == NULL) + return NV_ERR_INVALID_ARGUMENT; // NV_PRINTF(LEVEL_INFO, "Acquiring hClient %x\n", hClient); - status = _serverLockClient(pServer, lockAccess, hClient, &pClient); - if (status != NV_OK) - return status; + if (!_serverGetAndLockClientEntryByHandle(pServer, hClient, lockAccess, + &pClientEntry)) + { + return NV_ERR_INVALID_OBJECT_HANDLE; + } - if (ppClient != NULL) - *ppClient = pClient; + *ppClientEntry = pClientEntry; return NV_OK; } @@ -2277,67 +2472,393 @@ serverGetClientUnderLock return NV_OK; } -NV_STATUS +void serverReleaseClient ( RsServer *pServer, LOCK_ACCESS_TYPE lockAccess, - RsClient *pClient + CLIENT_ENTRY *pClientEntry ) { - NV_STATUS status; - status = _serverUnlockClient(pServer, lockAccess, pClient->hClient); - return status; + _serverPutAndUnlockClientEntry(pServer, lockAccess, pClientEntry); } -static -NV_STATUS -_serverFindClientEntry +NvBool +serverIsClientLocked ( - RsServer *pServer, - NvHandle hClient, - NvBool bFindPartial, - CLIENT_ENTRY **ppClientEntry + RsServer *pServer, + NvHandle hClient ) { - RsClientList *pClientList = &(pServer->pClientSortedList[hClient & RS_CLIENT_HANDLE_BUCKET_MASK]); - CLIENT_ENTRY **ppClientEntryLoop = listHead(pClientList); - - if (ppClientEntry != NULL) - *ppClientEntry = NULL; - - while (ppClientEntryLoop != NULL) - { - CLIENT_ENTRY *pClientEntry = *ppClientEntryLoop; - ppClientEntryLoop = listNext(pClientList, ppClientEntryLoop); - if (pClientEntry == NULL) - { - continue; - } - else if (pClientEntry->hClient == hClient) - { - // Client may not have finished constructing yet - if (pClientEntry->pClient == NULL && !bFindPartial) - return NV_ERR_INVALID_OBJECT_HANDLE; - - if (ppClientEntry != NULL) - *ppClientEntry = pClientEntry; + CLIENT_ENTRY *pClientEntry; - return NV_OK; - } - else if (pClientEntry->hClient > hClient) - { - // Not found in sorted list - return NV_ERR_INVALID_OBJECT; - } - } + NV_CHECK_OR_RETURN(LEVEL_SILENT, _serverFindClientEntryByHandle(pServer, hClient, + 0, CLIENT_LIST_LOCK_UNLOCKED, &pClientEntry), NV_ERR_INVALID_OBJECT_HANDLE); - return NV_ERR_INVALID_OBJECT_HANDLE; + return (pClientEntry->lockOwnerTid == portThreadGetCurrentThreadId()); } -static -NV_STATUS -_serverFindClient + +NvBool +serverIsClientInternal +( + RsServer *pServer, + NvHandle hClient +) +{ + return ((hClient & pServer->internalHandleBase) == pServer->internalHandleBase); +} + +static NV_STATUS _serverBuildAllClientLockList +( + RsServer *pServer +) +{ + NvU32 i; + NvU32 activeClientCount; + NvBool bClientsRemaining; + NvHandle hClientBucket = RS_CLIENT_HANDLE_BASE; + CLIENT_ENTRY **ppClientListLocations; + RsLockedClientListIter lockedClientListIter; + + // + // Perform memory allocations outside of the client list lock's + // critical section since it's a spinlock. + // + ppClientListLocations = PORT_ALLOC(pServer->pAllocator, + sizeof(*ppClientListLocations) * RS_CLIENT_HANDLE_BUCKET_COUNT); + + if (ppClientListLocations == NULL) + return NV_ERR_NO_MEMORY; + + i = 0; + while (1) + { + activeClientCount = pServer->activeClientCount; + + // + // Allocate memory for locked client list outside of client list lock critical + // section. + // + listInit(&pServer->lockedClientList, pServer->pAllocator); + + for (; i < activeClientCount; i++) + { + CLIENT_ENTRY **ppClientEntry = listAppendNew(&pServer->lockedClientList); + + if (ppClientEntry == NULL) + { + listDestroy(&pServer->lockedClientList); + PORT_FREE(pServer->pAllocator, ppClientListLocations); + return NV_ERR_NO_MEMORY; + } + + *ppClientEntry = NULL; + } + + serverAcquireClientListLock(pServer); + + // + // Ensure that active client count didn't increase while we checked it + // outside of the client list lock. Increase size of the list if so. + // + if (activeClientCount >= pServer->activeClientCount) + break; + + serverReleaseClientListLock(pServer); + } + + // Initialize the client location array to start of all used client lists + for (i = 0; i < RS_CLIENT_HANDLE_BUCKET_COUNT; i++) + { + RsClientList *pClientList = &(pServer->pClientSortedList[i]); + + ppClientListLocations[i] = listHead(pClientList); + } + + bClientsRemaining = (activeClientCount > 0); + lockedClientListIter = listIterAll(&pServer->lockedClientList); + + // + // Add client entries to all clients lock list, keeping it sorted, + // using the client location array. + // + while (bClientsRemaining) + { + NvHandle hClientNextBucket = ~0; + + bClientsRemaining = NV_FALSE; + + // Iterate over client location array + for (i = 0; i < RS_CLIENT_HANDLE_BUCKET_COUNT; i++) + { + CLIENT_ENTRY *pClientEntry = ppClientListLocations[i]; + + if (pClientEntry == NULL) + continue; + + // + // Add this client to the all clients lock list if it's in range of + // the current bucket to ensure sorted order. + // + if (pClientEntry->hClient >= hClientBucket && + (pClientEntry->hClient < (hClientBucket + RS_CLIENT_HANDLE_BUCKET_COUNT))) + { + CLIENT_ENTRY **ppLockedClientEntry; + RsClientList *pClientList = &(pServer->pClientSortedList[i]); + + NV_ASSERT(listIterNext(&lockedClientListIter)); + ppLockedClientEntry = lockedClientListIter.pValue; + + // + // Ignore any partially constructed client. + // Ignore anything pending free since nothing can use this client + // object after it's been marked pending free + // + if ((pClientEntry->pClient != NULL) && !pClientEntry->bPendingFree) + { + *ppLockedClientEntry = pClientEntry; + + // + // Increase the ref count so client entry doesn't get freed when + // we release the client list lock. + // + _serverGetClientEntry(pClientEntry); + } + + pClientEntry = listNext(pClientList, pClientEntry); + ppClientListLocations[i] = pClientEntry; + + // Move to next bucket if at end of the list + if (pClientEntry == NULL) + continue; + } + + // Any remaining non-NULL client entries must be in a larger bucket + if (pClientEntry->hClient >= + (hClientBucket + RS_CLIENT_HANDLE_BUCKET_COUNT)) + { + // Update next bucket if there are remaining clients to process + hClientNextBucket = NV_MIN(hClientNextBucket, + (pClientEntry->hClient & ~RS_CLIENT_HANDLE_BUCKET_MASK)); + bClientsRemaining = NV_TRUE; + } + } + + hClientBucket = hClientNextBucket; + } + + serverReleaseClientListLock(pServer); + + // Free client list locations array since it's no longer needed + PORT_FREE(pServer->pAllocator, ppClientListLocations); + + return NV_OK; +} + +NV_STATUS +serverLockAllClients +( + RsServer *pServer +) +{ + RsLockedClientListIter lockedClientListIter; + + NV_ASSERT_OK_OR_RETURN(_serverBuildAllClientLockList(pServer)); + + lockedClientListIter = listIterAll(&pServer->lockedClientList); + + // Lock all clients in order + while (listIterNext(&lockedClientListIter)) + { + CLIENT_ENTRY *pClientEntry = *lockedClientListIter.pValue; + + if (pClientEntry != NULL) + _serverLockClient(LOCK_ACCESS_WRITE, pClientEntry); + } + + // Set all client lock owner TID + pServer->allClientLockOwnerTid = portThreadGetCurrentThreadId(); + + return NV_OK; +} + +NV_STATUS +serverUnlockAllClients +( + RsServer *pServer +) +{ + CLIENT_ENTRY **ppClientEntry = listTail(&pServer->lockedClientList); + + NV_ASSERT_OR_RETURN(serverAllClientsLockIsOwner(pServer), NV_ERR_INVALID_LOCK_STATE); + + // Unlock clients in reverse order + while (ppClientEntry != NULL) + { + CLIENT_ENTRY *pClientEntry = *ppClientEntry; + + if (pClientEntry != NULL) + { + // Unlock and restore reference count for clients + _serverPutAndUnlockClientEntry(pServer, LOCK_ACCESS_WRITE, *ppClientEntry); + } + + ppClientEntry = listPrev(&pServer->lockedClientList, ppClientEntry); + } + + // Destroy locked client list + listDestroy(&pServer->lockedClientList); + + // Unset all client lock owner TID + pServer->allClientLockOwnerTid = ~0; + + return NV_OK; +} + +static +NvBool +__serverFindClientEntryByHandle +( + RsServer *pServer, + NvHandle hClient, + enum CLIENT_STATE clientState, + enum CLIENT_LIST_LOCK_STATE clientListLockState, + NvBool bIncRefCount, + CLIENT_ENTRY **ppClientEntry +) +{ + NvBool bClientFound = NV_FALSE; + RsClientList *pClientList; + CLIENT_ENTRY *pClientEntryLoop; + + if (clientListLockState == CLIENT_LIST_LOCK_UNLOCKED) + serverAcquireClientListLock(pServer); + + pClientList = &(pServer->pClientSortedList[hClient & RS_CLIENT_HANDLE_BUCKET_MASK]); + pClientEntryLoop = listHead(pClientList); + + while (pClientEntryLoop != NULL) + { + CLIENT_ENTRY *pClientEntry = pClientEntryLoop; + pClientEntryLoop = listNext(pClientList, pClientEntryLoop); + + if (pClientEntry->hClient == hClient) + { + // Client may not have finished constructing yet + if ((pClientEntry->pClient == NULL) && + ((clientState & CLIENT_PARTIALLY_INITIALIZED) == 0)) + { + goto done; + } + + // Client may be pending free + if (pClientEntry->bPendingFree && + ((clientState & CLIENT_PENDING_FREE) == 0)) + { + goto done; + } + + if (bIncRefCount) + _serverGetClientEntry(pClientEntry); + + if (ppClientEntry != NULL) + *ppClientEntry = pClientEntry; + + bClientFound = NV_TRUE; + goto done; + } + else if (pClientEntry->hClient > hClient) + { + // Not found in sorted list + goto done; + } + } + +done: + if (clientListLockState == CLIENT_LIST_LOCK_UNLOCKED) + serverReleaseClientListLock(pServer); + + return bClientFound; +} + +static +NvBool +_serverFindClientEntryByHandle +( + RsServer *pServer, + NvHandle hClient, + enum CLIENT_STATE clientState, + enum CLIENT_LIST_LOCK_STATE clientListLockState, + CLIENT_ENTRY **ppClientEntry +) +{ + return __serverFindClientEntryByHandle(pServer, hClient, clientState, + clientListLockState, NV_FALSE, ppClientEntry); +} + +static +NvBool +_serverGetClientEntryByHandle +( + RsServer *pServer, + NvHandle hClient, + enum CLIENT_STATE clientState, + enum CLIENT_LIST_LOCK_STATE clientListLockState, + CLIENT_ENTRY **ppClientEntry +) +{ + return __serverFindClientEntryByHandle(pServer, hClient, clientState, + clientListLockState, NV_TRUE, ppClientEntry); +} + +static +NvBool +_serverGetAndLockClientEntryByHandle +( + RsServer *pServer, + NvHandle hClient, + LOCK_ACCESS_TYPE access, + CLIENT_ENTRY **ppClientEntry +) +{ + CLIENT_ENTRY *pClientEntry; + + if (!_serverGetClientEntryByHandle(pServer, hClient, 0, CLIENT_LIST_LOCK_UNLOCKED, + &pClientEntry)) + { + return NV_FALSE; + } + + _serverLockClient(access, pClientEntry); + + // Handle race condition where client entry was marked pending free + if (pClientEntry->bPendingFree) + { + _serverPutAndUnlockClientEntry(pServer, access, pClientEntry); + return NV_FALSE; + } + + *ppClientEntry = pClientEntry; + return NV_TRUE; +} + +static +void +_serverPutAndUnlockClientEntry +( + RsServer *pServer, + LOCK_ACCESS_TYPE access, + CLIENT_ENTRY *pClientEntry +) +{ + _serverUnlockClient(access, pClientEntry); + _serverPutClientEntry(pServer, pClientEntry); +} + +static +NV_STATUS +_serverFindClient ( RsServer *pServer, NvHandle hClient, @@ -2345,12 +2866,10 @@ _serverFindClient ) { CLIENT_ENTRY *pClientEntry; - NV_STATUS status; - status =_serverFindClientEntry(pServer, hClient, NV_FALSE, &pClientEntry); - if (status != NV_OK) - { - return status; - } + + NV_CHECK_OR_RETURN(LEVEL_SILENT, _serverFindClientEntryByHandle(pServer, hClient, + CLIENT_PENDING_FREE, CLIENT_LIST_LOCK_UNLOCKED, &pClientEntry), + NV_ERR_INVALID_OBJECT_HANDLE); *ppClient = pClientEntry->pClient; return NV_OK; @@ -2362,11 +2881,10 @@ _serverInsertClientEntry ( RsServer *pServer, CLIENT_ENTRY *pClientEntry, - CLIENT_ENTRY **ppClientNext + CLIENT_ENTRY *pClientNext ) { RsClientList *pClientList; - CLIENT_ENTRY **ppClientEntry; NvHandle hClient = pClientEntry->hClient; if (hClient == 0) @@ -2376,23 +2894,132 @@ _serverInsertClientEntry pClientList = &(pServer->pClientSortedList[hClient & RS_CLIENT_HANDLE_BUCKET_MASK]); - if (ppClientNext == NULL) + if (pClientNext == NULL) { - ppClientEntry = (CLIENT_ENTRY **)listAppendNew(pClientList); + listAppendExisting(pClientList, pClientEntry); } else { - ppClientEntry = (CLIENT_ENTRY **)listInsertNew(pClientList, ppClientNext); + listInsertExisting(pClientList, pClientNext, pClientEntry); } - if (ppClientEntry == NULL) + return NV_OK; +} + +/** + * Mark a CLIENT_ENTRY as about to be freed + * @param[in] pServer + * @param[in] hClient The handle to lookup + * @param[out] pClientEntry The client entry associated with the handle + * + * @return NV_TRUE if client entry was found and marked pending free + * NV_FALSE if client couldn't be found + */ +static NvBool _serverMarkClientEntryPendingFree(RsServer *pServer, NvHandle hClient, CLIENT_ENTRY **ppClientEntry) +{ + RsClientList *pClientList; + CLIENT_ENTRY *pClientEntry; + + serverAcquireClientListLock(pServer); + + pClientList = &(pServer->pClientSortedList[hClient & RS_CLIENT_HANDLE_BUCKET_MASK]); + pClientEntry = listHead(pClientList); + + while (pClientEntry != NULL) { - return NV_ERR_NO_MEMORY; + if (pClientEntry->hClient == hClient) + { + if (pClientEntry->pClient == NULL) + goto fail; + + *ppClientEntry = pClientEntry; + + // + // Mark client entry pending free if it isn't already in the process of + // being freed + // + if (pClientEntry->bPendingFree) + goto fail; + + pClientEntry->bPendingFree = NV_TRUE; + + // + // Release client list lock - retaining it while attempting to acquire a + // client lock could deadlock. + // + serverReleaseClientListLock(pServer); + + // + // If we locked this client as part of locking all client locks, ensure we + // unlock this client first to avoid self-deadlocking. Also decrement + // reference count since serverLockAllClients increments it. Remove from + // locked client list to prevent dangling reference to the CLIENT_ENTRY. + // + if (serverAllClientsLockIsOwner(pServer) && + (pClientEntry->lockOwnerTid == portThreadGetCurrentThreadId())) + { + _serverPutAndUnlockClientEntry(pServer, LOCK_ACCESS_WRITE, pClientEntry); + listRemoveFirstByValue(&pServer->lockedClientList, &pClientEntry); + } + + // + // Wait for all API's using the CLIENT_ENTRY to finish, waiting till the + // reference count reaches 1 and using the client lock to postpone execution + // until these API's finish. The caller will take care of the final decrement + // of the reference count to 0. + // + while (pClientEntry->refCount > 1) + { + _serverLockClient(LOCK_ACCESS_WRITE, pClientEntry); + _serverUnlockClient(LOCK_ACCESS_WRITE, pClientEntry); + } + + // Client is no longer active so decrement the count + portAtomicDecrementU32(&pServer->activeClientCount); + + return NV_TRUE; + } + else if (pClientEntry->hClient > hClient) + { + serverReleaseClientListLock(pServer); + + // Not found in sorted list + return NV_FALSE; + } + + pClientEntry = listNext(pClientList, pClientEntry); } - *ppClientEntry = pClientEntry; +fail: + serverReleaseClientListLock(pServer); + + return NV_FALSE; +} + +static +void +_serverGetClientEntry(CLIENT_ENTRY *pClientEntry) +{ + NV_ASSERT(!pClientEntry->bPendingFree); + portAtomicIncrementU32(&pClientEntry->refCount); +} + +static +void +_serverPutClientEntry +( + RsServer *pServer, + CLIENT_ENTRY *pClientEntry +) +{ + if (portAtomicDecrementU32(&pClientEntry->refCount) == 0) + { + pClientEntry->pClient = NULL; + pClientEntry->hClient = 0; - return NV_OK; + portSyncRwLockDestroy(pClientEntry->pLock); + PORT_FREE(pServer->pAllocator, pClientEntry); + } } static @@ -2401,17 +3028,17 @@ _serverFindNextAvailableClientHandleInBucket ( RsServer *pServer, NvHandle hClientIn, - NvHandle *phClientOut, - CLIENT_ENTRY ***pppClientNext + NvHandle *phClientOut, + CLIENT_ENTRY **ppClientNext ) { NvHandle hPrefixIn, hPrefixOut; RsClientList *pClientList = &(pServer->pClientSortedList[hClientIn & RS_CLIENT_HANDLE_BUCKET_MASK]); NvHandle hClientOut = hClientIn; - CLIENT_ENTRY **ppClientEntry = listHead(pClientList); + CLIENT_ENTRY *pClientEntry = listHead(pClientList); - *pppClientNext = NULL; - if (ppClientEntry == NULL) + *ppClientNext = NULL; + if (pClientEntry == NULL) { *phClientOut = hClientOut; return NV_OK; @@ -2421,12 +3048,11 @@ _serverFindNextAvailableClientHandleInBucket // The list is ordered by increased client handles // We need to find a value to insert or change the handle // - while (ppClientEntry != NULL) + while (pClientEntry != NULL) { - CLIENT_ENTRY *pClientEntry = *ppClientEntry; - if ((pClientEntry == NULL) || (pClientEntry->hClient < hClientOut)) + if (pClientEntry->hClient < hClientOut) { - ppClientEntry = listNext(pClientList, ppClientEntry); + pClientEntry = listNext(pClientList, pClientEntry); continue; } else if (pClientEntry->hClient == hClientOut) @@ -2439,7 +3065,7 @@ _serverFindNextAvailableClientHandleInBucket { break; } - ppClientEntry = listNext(pClientList, ppClientEntry); + pClientEntry = listNext(pClientList, pClientEntry); } hPrefixIn = hClientIn & ~RS_CLIENT_HANDLE_DECODE_MASK; @@ -2448,9 +3074,9 @@ _serverFindNextAvailableClientHandleInBucket return NV_ERR_INSUFFICIENT_RESOURCES; *phClientOut = hClientOut; - if (ppClientEntry != NULL) + if (pClientEntry != NULL) { - *pppClientNext = ppClientEntry; + *ppClientNext = pClientEntry; } return NV_OK; } @@ -2466,12 +3092,35 @@ _serverCreateEntryAndLockForNewClient API_SECURITY_INFO *pSecInfo ) { - CLIENT_ENTRY *pClientEntry; + CLIENT_ENTRY *pClientEntry = NULL; NV_STATUS status = NV_OK; NvHandle hClient = *phClient; - CLIENT_ENTRY **ppClientNext = 0; + CLIENT_ENTRY *pClientNext = NULL; PORT_RWLOCK *pLock = NULL; NvU32 handleBase = serverAllocClientHandleBase(pServer, bInternalHandle, pSecInfo); + NvBool bLockedClientList = NV_FALSE; + + // + // Perform memory allocations before taking the client list spinlock, they must + // be performed outside of the spinlock's critical section. + // + pLock = portSyncRwLockCreate(pServer->pAllocator); + if (pLock == NULL) + return NV_ERR_INSUFFICIENT_RESOURCES; + + pClientEntry = (CLIENT_ENTRY *)PORT_ALLOC(pServer->pAllocator, sizeof(CLIENT_ENTRY)); + if (pClientEntry == NULL) + { + status = NV_ERR_INSUFFICIENT_RESOURCES; + goto _serverCreateEntryAndLockForNewClient_exit; + } + + portMemSet(pClientEntry, 0, sizeof(*pClientEntry)); + + pClientEntry->pLock = pLock; + + serverAcquireClientListLock(pServer); + bLockedClientList = NV_TRUE; if (hClient == 0) { @@ -2493,7 +3142,7 @@ _serverCreateEntryAndLockForNewClient goto _serverCreateEntryAndLockForNewClient_exit; } } - while (_serverFindNextAvailableClientHandleInBucket(pServer, hClient, &hClient, &ppClientNext) != NV_OK); + while (_serverFindNextAvailableClientHandleInBucket(pServer, hClient, &hClient, &pClientNext) != NV_OK); pServer->clientCurrentHandleIndex = clientHandleIndex; } @@ -2507,17 +3156,19 @@ _serverCreateEntryAndLockForNewClient hClient = CLIENT_ENCODEHANDLE(handleBase, clientIndex); #endif - if (_serverFindClientEntry(pServer, hClient, NV_FALSE, NULL) == NV_OK) + if (_serverFindClientEntryByHandle(pServer, hClient, + CLIENT_PARTIALLY_INITIALIZED | CLIENT_PENDING_FREE, + CLIENT_LIST_LOCK_LOCKED, NULL)) { // The handle already exists status = NV_ERR_INSERT_DUPLICATE_NAME; goto _serverCreateEntryAndLockForNewClient_exit; } - status = _serverFindNextAvailableClientHandleInBucket(pServer, hClient, &hClientOut, &ppClientNext); + + status = _serverFindNextAvailableClientHandleInBucket(pServer, hClient, &hClientOut, &pClientNext); if (status != NV_OK) - { goto _serverCreateEntryAndLockForNewClient_exit; - } + if (hClient != hClientOut) { // This should not happen as we checked for duplicates already @@ -2527,37 +3178,34 @@ _serverCreateEntryAndLockForNewClient } } - pLock = portSyncRwLockCreate(pServer->pAllocator); - if (pLock == NULL) - { - status = NV_ERR_INSUFFICIENT_RESOURCES; - goto _serverCreateEntryAndLockForNewClient_exit; - } - // At this point we have a hClient, we know in which bucket and where in the bucket to insert the entry. - pClientEntry = (CLIENT_ENTRY *)PORT_ALLOC(pServer->pAllocator, sizeof(CLIENT_ENTRY)); - if (pClientEntry == NULL) - { - status = NV_ERR_INSUFFICIENT_RESOURCES; - goto _serverCreateEntryAndLockForNewClient_exit; - } - portMemSet(pClientEntry, 0, sizeof(*pClientEntry)); - pClientEntry->hClient = hClient; pClientEntry->pLock = pLock; - + pClientEntry->refCount = 1; + pClientEntry->bPendingFree = NV_FALSE; RS_LOCK_VALIDATOR_INIT(&pClientEntry->lockVal, bInternalHandle ? LOCK_VAL_LOCK_CLASS_CLIENT_INTERNAL : LOCK_VAL_LOCK_CLASS_CLIENT, hClient); - status = _serverInsertClientEntry(pServer, pClientEntry, ppClientNext); + status = _serverInsertClientEntry(pServer, pClientEntry, pClientNext); if (status != NV_OK) - { - PORT_FREE(pServer->pAllocator, pClientEntry); goto _serverCreateEntryAndLockForNewClient_exit; - } + // + // Increase the reference count so this CLIENT_ENTRY can't be freed until we're + // done using it. + // + _serverGetClientEntry(pClientEntry); + + // Release client list lock + serverReleaseClientListLock(pServer); + bLockedClientList = NV_FALSE; + + // + // Acquire the client lock here. Nothing else should have acquired it since + // pClientEntry->pClient is still NULL. + // RS_RWLOCK_ACQUIRE_WRITE(pClientEntry->pLock, &pClientEntry->lockVal); pClientEntry->lockOwnerTid = portThreadGetCurrentThreadId(); @@ -2565,40 +3213,29 @@ _serverCreateEntryAndLockForNewClient *ppClientEntry = pClientEntry; _serverCreateEntryAndLockForNewClient_exit: - if (status != NV_OK && pLock != NULL) - portSyncRwLockDestroy(pLock); + if (bLockedClientList) + serverReleaseClientListLock(pServer); + + if (status != NV_OK) + { + if (pClientEntry != NULL) + PORT_FREE(pServer->pAllocator, pClientEntry); + + if (pLock != NULL) + portSyncRwLockDestroy(pLock); + } return status; } - static -NV_STATUS +void _serverLockClient ( - RsServer *pServer, LOCK_ACCESS_TYPE access, - NvHandle hClient, - RsClient **ppClient + CLIENT_ENTRY* pClientEntry ) { - RsClient *pClient; - CLIENT_ENTRY *pClientEntry = NULL; - NV_STATUS status = NV_OK; - - status =_serverFindClientEntry(pServer, hClient, NV_FALSE, &pClientEntry); - if (status != NV_OK) - { - return status; - } - - nv_speculation_barrier(); - - if (pClientEntry->pLock == NULL) - { - return NV_ERR_INVALID_OBJECT_HANDLE; - } - if (access == LOCK_ACCESS_READ) { RS_RWLOCK_ACQUIRE_READ(pClientEntry->pLock, &pClientEntry->lockVal); @@ -2608,24 +3245,6 @@ _serverLockClient RS_RWLOCK_ACQUIRE_WRITE(pClientEntry->pLock, &pClientEntry->lockVal); pClientEntry->lockOwnerTid = portThreadGetCurrentThreadId(); } - - pClient = pClientEntry->pClient; - - if ((pClient == NULL) || (pClient->hClient != hClient)) - { - NV_ASSERT(0); - if (access == LOCK_ACCESS_READ) - RS_RWLOCK_RELEASE_READ(pClientEntry->pLock, &pClientEntry->lockVal); - else - RS_RWLOCK_RELEASE_WRITE(pClientEntry->pLock, &pClientEntry->lockVal); - - return NV_ERR_INVALID_OBJECT; - } - - if (ppClient != NULL) - *ppClient = pClient; - - return NV_OK; } static @@ -2635,39 +3254,68 @@ _serverLockClientWithLockInfo RsServer *pServer, LOCK_ACCESS_TYPE access, NvHandle hClient, + NvBool bValidateLocks, RS_LOCK_INFO *pLockInfo, NvU32 *pReleaseFlags, - RsClient **ppClient + CLIENT_ENTRY **ppClientEntry ) { - NV_STATUS status; - if ((pLockInfo->flags & RS_LOCK_FLAGS_NO_CLIENT_LOCK)) + NV_STATUS status = NV_OK; + if ((pLockInfo->flags & RS_LOCK_FLAGS_NO_CLIENT_LOCK) || + serverAllClientsLockIsOwner(pServer)) { - status = _serverFindClient(pServer, hClient, ppClient); - return status; + if (!_serverGetClientEntryByHandle(pServer, hClient, 0, + CLIENT_LIST_LOCK_UNLOCKED, ppClientEntry)) + { + return NV_ERR_INVALID_OBJECT_HANDLE; + } + + goto check_locks; } if ((pLockInfo->state & RS_LOCK_STATE_CLIENT_LOCK_ACQUIRED)) { - CLIENT_ENTRY *pClientEntry; - NV_ASSERT_OK_OR_RETURN(_serverFindClientEntry(pServer, hClient, NV_FALSE, &pClientEntry)); - NV_ASSERT_OR_RETURN(pLockInfo->pClient != NULL, NV_ERR_INVALID_STATE); - NV_ASSERT_OR_RETURN(pLockInfo->pClient == pClientEntry->pClient, NV_ERR_INVALID_STATE); - NV_ASSERT_OR_RETURN(pClientEntry->lockOwnerTid == portThreadGetCurrentThreadId(), NV_ERR_INVALID_STATE); - - *ppClient = pLockInfo->pClient; - return NV_OK; + NV_ASSERT_OR_RETURN(_serverGetClientEntryByHandle(pServer, hClient, 0, + CLIENT_LIST_LOCK_UNLOCKED, ppClientEntry), + NV_ERR_INVALID_OBJECT_HANDLE); + NV_ASSERT_OR_ELSE(pLockInfo->pClient != NULL, + status = NV_ERR_INVALID_STATE; goto done); + NV_ASSERT_OR_ELSE(pLockInfo->pClient == (*ppClientEntry)->pClient, + status = NV_ERR_INVALID_STATE; goto done); + NV_ASSERT_OR_ELSE((*ppClientEntry)->lockOwnerTid == + portThreadGetCurrentThreadId(), + status = NV_ERR_INVALID_STATE; goto done); + + goto check_locks; } - status = _serverLockClient(pServer, access, hClient, ppClient); - if (status != NV_OK) - return status; + if (!_serverGetAndLockClientEntryByHandle(pServer, hClient, access, ppClientEntry)) + return NV_ERR_INVALID_OBJECT_HANDLE; pLockInfo->state |= RS_LOCK_STATE_CLIENT_LOCK_ACQUIRED; - pLockInfo->pClient = *ppClient; + pLockInfo->pClient = (*ppClientEntry)->pClient; *pReleaseFlags |= RS_LOCK_RELEASE_CLIENT_LOCK; - return NV_OK; +check_locks: + if (bValidateLocks) + status = clientValidateLocks((*ppClientEntry)->pClient, pServer, *ppClientEntry); + +done: + if (status != NV_OK) + { + if (*pReleaseFlags & RS_LOCK_RELEASE_CLIENT_LOCK) + { + _serverUnlockClientWithLockInfo(pServer, access, *ppClientEntry, + pLockInfo, pReleaseFlags); + } + else if (*ppClientEntry != NULL) + { + _serverPutClientEntry(pServer, *ppClientEntry); + *ppClientEntry = NULL; + } + } + + return status; } static @@ -2678,123 +3326,196 @@ _serverLockDualClientWithLockInfo LOCK_ACCESS_TYPE access, NvHandle hClient1, NvHandle hClient2, + NvBool bValidateLocks, RS_LOCK_INFO *pLockInfo, NvU32 *pReleaseFlags, - RsClient **ppClient1, - RsClient **ppClient2 + CLIENT_ENTRY **ppClientEntry1, + CLIENT_ENTRY **ppClientEntry2 ) { - NV_STATUS status; + NV_STATUS status = NV_OK; // 1st and 2nd in handle order, as opposed to fixed 1 and 2 - NvHandle hClient1st; - NvHandle hClient2nd; - RsClient **ppClient1st; - RsClient **ppClient2nd; + NvHandle hClient1st; + NvHandle hClient2nd; + CLIENT_ENTRY **ppClientEntry1st; + CLIENT_ENTRY **ppClientEntry2nd; - *ppClient1 = NULL; - *ppClient2 = NULL; + *ppClientEntry1 = NULL; + *ppClientEntry2 = NULL; - if ((pLockInfo->flags & RS_LOCK_FLAGS_NO_CLIENT_LOCK)) + if ((pLockInfo->flags & RS_LOCK_FLAGS_NO_CLIENT_LOCK) || + serverAllClientsLockIsOwner(pServer)) { - status = _serverFindClient(pServer, hClient1, ppClient1); - if (status != NV_OK) - return status; + ppClientEntry1st = ppClientEntry1; + ppClientEntry2nd = ppClientEntry2; + + if (!_serverGetClientEntryByHandle(pServer, hClient1, 0, + CLIENT_LIST_LOCK_UNLOCKED, ppClientEntry1st)) + { + return NV_ERR_INVALID_OBJECT_HANDLE; + } if (hClient1 == hClient2) { - *ppClient2 = *ppClient1; + *ppClientEntry2nd = *ppClientEntry1st; } else { - status = _serverFindClient(pServer, hClient2, ppClient2); + NV_ASSERT_OR_ELSE(_serverGetClientEntryByHandle(pServer, hClient2, 0, + CLIENT_LIST_LOCK_UNLOCKED, ppClientEntry2nd), + status = NV_ERR_INVALID_OBJECT_HANDLE; goto done); } - return status; + goto check_locks; } if (hClient1 <= hClient2) { hClient1st = hClient1; - ppClient1st = ppClient1; + ppClientEntry1st = ppClientEntry1; hClient2nd = hClient2; - ppClient2nd = ppClient2; + ppClientEntry2nd = ppClientEntry2; } else { hClient1st = hClient2; - ppClient1st = ppClient2; + ppClientEntry1st = ppClientEntry2; hClient2nd = hClient1; - ppClient2nd = ppClient1; + ppClientEntry2nd = ppClientEntry1; } if ((pLockInfo->state & RS_LOCK_STATE_CLIENT_LOCK_ACQUIRED)) { - CLIENT_ENTRY *pClientEntry, *pSecondClientEntry; - NV_ASSERT_OR_RETURN(pLockInfo->pSecondClient != NULL, NV_ERR_INVALID_STATE); NV_ASSERT_OR_RETURN(pLockInfo->pClient->hClient == hClient1st, NV_ERR_INVALID_STATE); NV_ASSERT_OR_RETURN(pLockInfo->pSecondClient->hClient == hClient2nd, NV_ERR_INVALID_STATE); - NV_ASSERT_OK_OR_RETURN(_serverFindClientEntry(pServer, hClient1st, NV_FALSE, &pClientEntry)); - NV_ASSERT_OR_RETURN(pClientEntry->pClient == pLockInfo->pClient, NV_ERR_INVALID_STATE); - NV_ASSERT_OR_RETURN(pClientEntry->lockOwnerTid == portThreadGetCurrentThreadId(), NV_ERR_INVALID_STATE); + NV_ASSERT_OR_ELSE(_serverGetClientEntryByHandle(pServer, hClient1st, 0, + CLIENT_LIST_LOCK_UNLOCKED, ppClientEntry1st), + status = NV_ERR_INVALID_OBJECT_HANDLE; goto done); + NV_ASSERT_OR_ELSE((*ppClientEntry1st)->pClient == pLockInfo->pClient, + status = NV_ERR_INVALID_STATE; goto done); + NV_ASSERT_OR_ELSE((*ppClientEntry1st)->lockOwnerTid == + portThreadGetCurrentThreadId(), + status = NV_ERR_INVALID_STATE; goto done); - NV_ASSERT_OK_OR_RETURN(_serverFindClientEntry(pServer, hClient2nd, NV_FALSE, &pSecondClientEntry)); - NV_ASSERT_OR_RETURN(pSecondClientEntry->pClient == pLockInfo->pSecondClient, NV_ERR_INVALID_STATE); - NV_ASSERT_OR_RETURN(pSecondClientEntry->lockOwnerTid == pClientEntry->lockOwnerTid, NV_ERR_INVALID_STATE); + if (hClient1st == hClient2nd) + { + *ppClientEntry2nd = *ppClientEntry1st; + } + else + { + NV_ASSERT_OR_ELSE(_serverGetClientEntryByHandle(pServer, hClient2nd, 0, + CLIENT_LIST_LOCK_UNLOCKED, ppClientEntry2nd), + status = NV_ERR_INVALID_OBJECT_HANDLE; goto done); + } - *ppClient1st = pLockInfo->pClient; - *ppClient2nd = pLockInfo->pSecondClient; - return NV_OK; - } + NV_ASSERT_OR_ELSE((*ppClientEntry2nd)->pClient == pLockInfo->pSecondClient, + status = NV_ERR_INVALID_STATE; goto done); + NV_ASSERT_OR_ELSE( + (*ppClientEntry2nd)->lockOwnerTid == (*ppClientEntry1st)->lockOwnerTid, + status = NV_ERR_INVALID_STATE; goto done); - status = _serverLockClient(pServer, access, hClient1st, ppClient1st); - if (status != NV_OK) - return status; + goto check_locks; + } - if (hClient1 == hClient2) + if (!_serverGetAndLockClientEntryByHandle(pServer, hClient1st, access, + ppClientEntry1st)) { - *ppClient2nd = *ppClient1st; + return NV_ERR_INVALID_OBJECT_HANDLE; } + + if (hClient1 == hClient2) + *ppClientEntry2nd = *ppClientEntry1st; else { - status = _serverLockClient(pServer, access, hClient2nd, ppClient2nd); - if (status != NV_OK) + if (!_serverGetAndLockClientEntryByHandle(pServer, hClient2nd, access, + ppClientEntry2nd)) { - _serverUnlockClient(pServer, access, hClient1st); - return status; + _serverUnlockClient(access, *ppClientEntry1st); + status = NV_ERR_INVALID_OBJECT_HANDLE; + goto done; } } pLockInfo->state |= RS_LOCK_STATE_CLIENT_LOCK_ACQUIRED; - pLockInfo->pClient = *ppClient1st; - pLockInfo->pSecondClient = *ppClient2nd; + pLockInfo->pClient = (*ppClientEntry1st)->pClient; + pLockInfo->pSecondClient = (*ppClientEntry2nd)->pClient; *pReleaseFlags |= RS_LOCK_RELEASE_CLIENT_LOCK; - return NV_OK; +check_locks: + if (bValidateLocks) + { + status = clientValidateLocks((*ppClientEntry1st)->pClient, pServer, + *ppClientEntry1st); + + if ((status == NV_OK) && (hClient1 != hClient2)) + { + status = clientValidateLocks((*ppClientEntry2nd)->pClient, pServer, + *ppClientEntry2nd); + } + } + +done: + + if (status != NV_OK) + { + if (*pReleaseFlags & RS_LOCK_RELEASE_CLIENT_LOCK) + { + _serverUnlockDualClientWithLockInfo(pServer, access, *ppClientEntry1st, + *ppClientEntry2nd, pLockInfo, pReleaseFlags); + } + else + { + if (*ppClientEntry1st != NULL) + { + _serverPutClientEntry(pServer, *ppClientEntry1st); + *ppClientEntry1st = NULL; + } + + if ((*ppClientEntry2nd != NULL) && (*ppClientEntry2nd != *ppClientEntry1st)) + { + _serverPutClientEntry(pServer, *ppClientEntry2nd); + *ppClientEntry2nd = NULL; + } + } + } + + return status; } static NV_STATUS -_serverUnlockClient +_serverLockAllClientsWithLockInfo ( RsServer *pServer, - LOCK_ACCESS_TYPE access, - NvHandle hClient + RS_LOCK_INFO *pLockInfo, + NvU32 *pReleaseFlags ) { - CLIENT_ENTRY *pClientEntry = NULL; - NV_STATUS status = NV_OK; - - status =_serverFindClientEntry(pServer, hClient, NV_TRUE, &pClientEntry); - if (status != NV_OK) + if (!serverAllClientsLockIsOwner(pServer)) { - return status; + NV_STATUS status = serverLockAllClients(pServer); + if (status != NV_OK) + return status; + + *pReleaseFlags |= RS_LOCK_RELEASE_CLIENT_LOCK; } + return NV_OK; +} + +static +void +_serverUnlockClient +( + LOCK_ACCESS_TYPE access, + CLIENT_ENTRY* pClientEntry +) +{ if (access == LOCK_ACCESS_READ) { RS_RWLOCK_RELEASE_READ(pClientEntry->pLock, &pClientEntry->lockVal); @@ -2804,57 +3525,63 @@ _serverUnlockClient pClientEntry->lockOwnerTid = ~0; RS_RWLOCK_RELEASE_WRITE(pClientEntry->pLock, &pClientEntry->lockVal); } - - return NV_OK; } static -NV_STATUS +void _serverUnlockClientWithLockInfo ( RsServer *pServer, LOCK_ACCESS_TYPE access, - NvHandle hClient, + CLIENT_ENTRY *pClientEntry, RS_LOCK_INFO *pLockInfo, NvU32 *pReleaseFlags ) { - NV_STATUS status; if (*pReleaseFlags & RS_LOCK_RELEASE_CLIENT_LOCK) { - status = _serverUnlockClient(pServer, access, hClient); - if (status != NV_OK) - return status; + _serverUnlockClient(access, pClientEntry); pLockInfo->state &= ~RS_LOCK_STATE_CLIENT_LOCK_ACQUIRED; pLockInfo->pClient = NULL; *pReleaseFlags &= ~RS_LOCK_RELEASE_CLIENT_LOCK; } - return NV_OK; + + _serverPutClientEntry(pServer, pClientEntry); } static -NV_STATUS +void _serverUnlockDualClientWithLockInfo ( RsServer *pServer, LOCK_ACCESS_TYPE access, - NvHandle hClient1, - NvHandle hClient2, + CLIENT_ENTRY *pClientEntry1, + CLIENT_ENTRY *pClientEntry2, RS_LOCK_INFO *pLockInfo, NvU32 *pReleaseFlags ) { - // 1st and 2nd in handle order, as opposed to fixed 1 and 2 - NvHandle hClient1st = NV_MIN(hClient1, hClient2); - NvHandle hClient2nd = NV_MAX(hClient1, hClient2); - if (*pReleaseFlags & RS_LOCK_RELEASE_CLIENT_LOCK) { - // Try to unlock both, even if one fails - NV_ASSERT_OK(_serverUnlockClient(pServer, access, hClient2nd)); - if (hClient1 != hClient2) - NV_ASSERT_OK(_serverUnlockClient(pServer, access, hClient1st)); + // 1st and 2nd in handle order, as opposed to fixed 1 and 2 + CLIENT_ENTRY *pClientEntry1st; + CLIENT_ENTRY *pClientEntry2nd; + + if (pClientEntry1->pClient->hClient <= pClientEntry2->pClient->hClient) + { + pClientEntry1st = pClientEntry1; + pClientEntry2nd = pClientEntry2; + } + else + { + pClientEntry1st = pClientEntry2; + pClientEntry2nd = pClientEntry1; + } + + _serverUnlockClient(access, pClientEntry2nd); + if (pClientEntry1->pClient->hClient != pClientEntry2->pClient->hClient) + _serverUnlockClient(access, pClientEntry1st); pLockInfo->state &= ~RS_LOCK_STATE_CLIENT_LOCK_ACQUIRED; pLockInfo->pClient = NULL; @@ -2862,6 +3589,29 @@ _serverUnlockDualClientWithLockInfo *pReleaseFlags &= ~RS_LOCK_RELEASE_CLIENT_LOCK; } + _serverPutClientEntry(pServer, pClientEntry1); + + if (pClientEntry1 != pClientEntry2) + _serverPutClientEntry(pServer, pClientEntry2); +} + +NV_STATUS +_serverUnlockAllClientsWithLockInfo +( + RsServer *pServer, + RS_LOCK_INFO *pLockInfo, + NvU32 *pReleaseFlags +) +{ + if (*pReleaseFlags & RS_LOCK_RELEASE_CLIENT_LOCK) + { + NV_STATUS status = serverUnlockAllClients(pServer); + if (status != NV_OK) + return status; + + *pReleaseFlags &= ~RS_LOCK_RELEASE_CLIENT_LOCK; + } + return NV_OK; } @@ -3484,6 +4234,24 @@ serverAllocApiCopyOut } #endif +void +serverAcquireClientListLock +( + RsServer *pServer +) +{ + RS_SPINLOCK_ACQUIRE(pServer->pClientListLock, &pServer->clientListLockVal); +} + +void +serverReleaseClientListLock +( + RsServer *pServer +) +{ + RS_SPINLOCK_RELEASE(pServer->pClientListLock, &pServer->clientListLockVal); +} + #if (RS_STANDALONE) NV_STATUS serverAllocEpilogue_WAR @@ -3826,6 +4594,17 @@ serverControlLookupLockFlags } #endif +NV_STATUS +serverControlLookupClientLockFlags +( + RS_CONTROL_COOKIE *pCookie, + enum CLIENT_LOCK_TYPE *pClientLockType +) +{ + *pClientLockType = CLIENT_LOCK_SPECIFIC; + return NV_OK; +} + NV_STATUS serverMapLookupLockFlags ( diff --git a/src/nvidia/srcs.mk b/src/nvidia/srcs.mk index 43d546f26f..d6bd8220ff 100644 --- a/src/nvidia/srcs.mk +++ b/src/nvidia/srcs.mk @@ -117,6 +117,7 @@ SRCS += generated/g_kernel_sec2_nvoc.c SRCS += generated/g_kernel_sm_debugger_session_nvoc.c SRCS += generated/g_kernel_vgpu_mgr_nvoc.c SRCS += generated/g_kernel_video_engine_nvoc.c +SRCS += generated/g_lock_stress_nvoc.c SRCS += generated/g_mem_export_nvoc.c SRCS += generated/g_mem_fabric_import_ref_nvoc.c SRCS += generated/g_mem_fabric_import_v2_nvoc.c @@ -320,15 +321,6 @@ SRCS += interface/deprecated/rmapi_gss_legacy_control.c SRCS += interface/rmapi/src/g_finn_rm_api.c SRCS += kernel/nvd/nv/dbgbuffer.c SRCS += kernel/nvd/nv/nvdctrl.c -SRCS += kernel/vgpu/ampere/rpcga102.c -SRCS += kernel/vgpu/maxwell/rpcgm204.c -SRCS += kernel/vgpu/nv/objvgpu.c -SRCS += kernel/vgpu/nv/rpc.c -SRCS += kernel/vgpu/nv/rpcstructurecopy.c -SRCS += kernel/vgpu/nv/vgpu_events.c -SRCS += kernel/vgpu/nv/vgpu_util.c -SRCS += kernel/vgpu/nv/vgpuapi.c -SRCS += kernel/vgpu/nv/vgpuctrl.c SRCS += src/kernel/compute/fabric.c SRCS += src/kernel/compute/fm_session_api.c SRCS += src/kernel/compute/imex_session_api.c @@ -478,7 +470,6 @@ SRCS += src/kernel/gpu/gpu_device_mapping.c SRCS += src/kernel/gpu/gpu_engine_type.c SRCS += src/kernel/gpu/gpu_fabric_probe.c SRCS += src/kernel/gpu/gpu_gspclient.c -SRCS += src/kernel/gpu/gpu_name_kernel.c SRCS += src/kernel/gpu/gpu_protobuf.c SRCS += src/kernel/gpu/gpu_register_access_map.c SRCS += src/kernel/gpu/gpu_registry.c @@ -516,6 +507,7 @@ SRCS += src/kernel/gpu/gsp/arch/turing/kernel_gsp_vbios_tu102.c SRCS += src/kernel/gpu/gsp/kernel_gsp.c SRCS += src/kernel/gpu/gsp/kernel_gsp_booter.c SRCS += src/kernel/gpu/gsp/kernel_gsp_fwsec.c +SRCS += src/kernel/gpu/gsp/kernel_gsp_trace_rats.c SRCS += src/kernel/gpu/gsp/message_queue_cpu.c SRCS += src/kernel/gpu/host_eng/host_eng.c SRCS += src/kernel/gpu/hwpm/arch/hopper/kern_hwpm_gh100.c @@ -779,6 +771,7 @@ SRCS += src/kernel/rmapi/entry_points.c SRCS += src/kernel/rmapi/event.c SRCS += src/kernel/rmapi/event_buffer.c SRCS += src/kernel/rmapi/event_notification.c +SRCS += src/kernel/rmapi/lock_stress.c SRCS += src/kernel/rmapi/mapping.c SRCS += src/kernel/rmapi/mapping_cpu.c SRCS += src/kernel/rmapi/mapping_list.c @@ -795,6 +788,15 @@ SRCS += src/kernel/rmapi/rmapi_utils.c SRCS += src/kernel/rmapi/rpc_common.c SRCS += src/kernel/rmapi/rs_utils.c SRCS += src/kernel/rmapi/sharing.c +SRCS += src/kernel/vgpu/arch/ampere/rpcga102.c +SRCS += src/kernel/vgpu/arch/maxwell/rpcgm204.c +SRCS += src/kernel/vgpu/objvgpu.c +SRCS += src/kernel/vgpu/rpc.c +SRCS += src/kernel/vgpu/rpcstructurecopy.c +SRCS += src/kernel/vgpu/vgpu_events.c +SRCS += src/kernel/vgpu/vgpu_util.c +SRCS += src/kernel/vgpu/vgpuapi.c +SRCS += src/kernel/vgpu/vgpuctrl.c SRCS += src/kernel/virtualization/common_vgpu_mgr.c SRCS += src/kernel/virtualization/hypervisor/hyperv/hyperv.c SRCS += src/kernel/virtualization/hypervisor/hypervisor.c diff --git a/utils.mk b/utils.mk index f2c5cf723a..00a396f905 100644 --- a/utils.mk +++ b/utils.mk @@ -49,6 +49,9 @@ EXTRA_CFLAGS ?= STACK_USAGE_WARNING ?= CFLAGS += $(if $(STACK_USAGE_WARNING),-Wstack-usage=$(STACK_USAGE_WARNING)) +IMPLICIT_FALLTHROUGH_WARNING ?= +CFLAGS += $(if $(IMPLICIT_FALLTHROUGH_WARNING),-Wimplicit-fallthrough=$(IMPLICIT_FALLTHROUGH_WARNING)) + HOST_CC ?= $(CC) HOST_LD ?= $(LD) HOST_CFLAGS ?= $(CFLAGS) diff --git a/version.mk b/version.mk index a95024fb77..45cf602ceb 100644 --- a/version.mk +++ b/version.mk @@ -1,4 +1,4 @@ -NVIDIA_VERSION = 550.78 +NVIDIA_VERSION = 555.42.02 # This file. VERSION_MK_FILE := $(lastword $(MAKEFILE_LIST))